--- /dev/null
+autom4te*.cache
+aclocal.m4
+config.log
+config.status
+configure
+configure.lineno
+Makefile.in
+Makefile
+COPYING
+INSTALL
+ABOUT-NLS
+m4
+config.h
+config.h.in
+stamp-h1
--- /dev/null
+Arnim Läuger <arniml@users.sourceforge.net>, Kolja Waschk <kawk>
+
+A major part of the of UrJTAG 0.6 originally comes from the openwince JTAG
+Tools which are written by Marcel Telka <marcel@telka.sk>. Many lines of
+code have been contributed by further numerous developers, see THANKS.
+
+
+
--- /dev/null
+ GNU GENERAL PUBLIC LICENSE
+ Version 2, June 1991
+
+ Copyright (C) 1989, 1991 Free Software Foundation, Inc.,
+ 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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+ TERMS AND CONDITIONS FOR COPYING, DISTRIBUTION AND MODIFICATION
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+
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+
+This General Public License does not permit incorporating your program into
+proprietary programs. If your program is a subroutine library, you may
+consider it more useful to permit linking proprietary applications with the
+library. If this is what you want to do, use the GNU Lesser General
+Public License instead of this License.
--- /dev/null
+2009-06-04 Arnim Laeuger <arniml>
+
+ * src/bsdl/bsdl_flex.l: force Base = DECIMAL for BOUNDARY_LENGTH attribute
+
+2009-05-26 Arnim Laeuger <arniml>
+
+ * src/bus/bf561_ezkit.c, src/bus/sharc21065l.c, src/bus/bf537_stamp.c,
+ src/bus/bf533_ezkit.c, src/bus/bf533_stamp.c, src/bus/ppc405ep.c,
+ src/bus/bf548_ezkit.c: keywords
+
+ * src/bus/bf533_stamp.c: [ 2793104 ] hidden bug? in bf533-stamp.c
+ (MURANAKA Masaki)
+
+2009-05-11 Arnim Laeuger <arniml>
+
+ * src/bus/ejtag_dma.c (ejtag_dma_bus_init): invert abort condition for break
+ timeout
+
+2009-05-07 Arnim Laeuger <arniml>
+
+ * src/tap/cable/wiggler2.c: [ 2782581 ] TRST, TMS and TDI incorrectly marked
+ in wiggler2 cable
+
+ * src/cmd/test.c: [ 2776954 ] typo? on 'help test'
+
+2009-05-06 Arnim Laeuger <arniml>
+
+ * src/flash/amd.c: fix typo in S29GLxxxN
+
+2009-04-24 Rutger Hofman <rfhh>
+ * src/flash/amd_flash.c, src/bus/ejtag.c, src/bus/ejtag_dma.c: fix erroneous
+ reference to global variable 'bus' to be to a local variable/parameter.
+
+2009-04-17 Kolja Waschk <kawk>
+
+ * Makefile.am: Distribute UrJTAG.nsi in source tarball next time
+
+2009-04-17 Arnim Laeuger <arniml>
+
+ Version 0.10 released.
+
+2009-04-17 Arnim Laeuger <arniml>
+
+ * configure.ac, NEWS: set release version 0.10
+
+ * src/jtag.c: Update copyright year at both instances
+
+2009-04-17 Kolja Waschk <kawk>
+
+ * configure.ac: Last minute fix for USBCFLAGS for libusb
+ * doc/UrJTAG.txt: Info about installing precompiled version on Win
+ * src/flash/jedec.c: Add license info
+ * UrJTAG.nsi: Create links to EXE and UrJTAG.txt in Start Menu
+
+2009-04-16 Arnim Laeuger <arniml>
+
+ * THANKS: added contributors
+
+2009-04-16 Kolja Waschk <kawk>
+
+ * include/xpcu.h, src/flash/jedec_exp.c: Add license info
+ * doc/UrJTAG.txt: Info about source for 64bit/Vista inpout32.dll
+ * UrJTAG.nsi: Include inpout32.dll (needs some manual work)
+
+2009-04-16 Arnim <arniml>
+
+ * doc/UrJTAG.txt: Documentation fixes (Uwe Hermann)
+
+2009-04-13 Arnim <arniml>
+
+ * configure.ac: follow version info in NEWS
+
+2009-04-12 Arnim <arniml>
+
+ * src/tap/cable/ft2232.c: flyswatter description update
+
+ * NEWS: prepare for 0.10 release, still requires version update
+
+2009-04-10 Arnim Laeuger <arniml>
+
+ * src/flash/flash.c (flasherase): fix missing base address for block_no calculation,
+ re-use find_block() from flashmem() to align block_no calculation
+
+2009-04-08 Arnim Laeuger <arniml>
+
+ * couple of files: enable Id keyword substitution
+
+ * po/fr.po, po/rw.po, po/sk.po: update to latest status
+
+ * src/bus/bscoach.c: use english text per default
+
+ * po/POTFILES.in: update to current file list
+
+ * data/Makefile.am: added missing files for install
+
+ * doc/UrJTAG.txt: describe bus command
+
+ * doc/bsdl2jtag.1, doc/jtag.1, THANKS: Various manpage updates (Uwe Hermann)
+
+2009-04-06 Arnim Laeuger <arniml>
+
+ * src/Makefile.am, po/POTFILES.in: fix two build issues (Uwe Hermann)
+
+ * src/tap/usbconn/libftdi.c: Better errors from ftdi (Jon Smirl)
+
+ * src/flash/jedec.c: Author added.
+
+2009-04-05 Arnim Laeuger <arniml>
+
+ * configure.ac: turn feature options that are enabled by default into
+ --disable-*
+
+ * src/tap/cable/ft2232.c: check target status for UsbScarab2 (Tomek Cedro)
+
+2009-04-04 Arnim Laeuger <arniml>
+
+ * src/tap/cable/ft2232.c, src/tap/cable.c, src/tap/cable/generic_usbconn.c,
+ THANKS, doc/UrJTAG.txt: usbscarab2 cable driver added (Tomek Cedro)
+
+2009-03-30 Arnim Laeuger <arniml>
+
+ * doc/UrJTAG.txt: multi-byte description
+
+ * configure.ac: better description for flash-multi-byte
+
+2009-03-29 Arnim Laeuger <arniml>
+
+ * UrJTAG.txt: Update supported pod and device lists
+
+2009-03-28 Arnim Laeuger <arniml>
+
+ * src/tap/chain.c (chain_set_pod_signal) : keep old value of trst in
+ case trst isn't modified by mask/val
+
+ * src/tap/chain.c: [ 2610857 ] chain_set_pod_signal() looks funky
+
+ * UrJTAG.txt: typo
+
+2009-03-28 Arnim Laeuger <arniml>
+
+ * src/bsdl2jtag, src/Makefile.am, doc/UrJTAG.txt: implement bsdl2jtag
+ as a wrapper script that calls jtag shell with 'bsdl dump ...'
+
+ * src/Makefile.am, src/bsdl2jtag.c: removed bsdl2jtag
+
+2009-03-27 Arnim Laeuger <arniml>
+
+ * src/jtag.c: more than one optional file can be specified
+
+ * src/flash/jedec.c: fix memory corruption from jedec code (Jon Smirl)
+
+2009-03-26 Arnim Laeuger <arniml>
+
+ * src/cmd/initbus.c: Notify which bus is active when a new bus is initialized
+ (Jon Smirl)
+
+ * src/bus/mpc5200.c, THANKS: Support the MUX parameter on the mpc5200
+ local bus for hardware (Jon Smirl)
+
+2009-03-23 Arnim Laeuger <arniml>
+
+ * src/cmd/pod.c: show signal names for TRST and RESET
+
+2009-03-18 Arnim Laeuger <arniml>
+
+ * acinclude.m4: add libtinfo, fix for
+ [ 2691154 ] Configure fails to detect libtinfo
+
+ * src/flash/intel.c, src/flash/amd.c: activate multi byte write mode
+ for > 1, not > 0
+ [ 2690857 ] Can't write flashes
+
+2009-03-12 Arnim Laeuger <arniml>
+
+ * data/atheros/ar2312/ar2312: AR2313 flash access patch
+ (snowweihua)
+
+2009-03-08 Arnim Laeuger <arniml>
+
+ * src/svf/svf.c, src/svf/svf_bison.y, src/svf/svf.h:
+ [ 2666261 ] Add pass/fail report to SVF player
+
+ * src/svf/svf.c: avoid double free for SIR/SDR parameter strings in case
+ of a consistency check error
+
+ * src/bsdl/bsdl_sem.c: avoid leading space when printing commands
+
+2009-03-07 Arnim Laeuger <arniml>
+
+ * data/ti/tnetv1060/tnetv1060, data/ti/tnetv1061/tnetv1061:
+ init EJTAG bus automatically
+
+2009-03-05 Arnim Laeuger <arniml>
+
+ * src/tap/print_queue.c, src/bus/bscoach.c, src/bus/ejtag_dma.c,
+ src/bus/pxa2x0.c, src/bus/zefant-xs3.c, src/bus/jopcyc.c,
+ src/bus/s3c4510x.c, src/bus/ejtag.c: skip operations of *_bus_init()
+ if TAP is not in RUNTEST/IDLE state
+ [ 2658604 ] Errors when part description contains commands accessing TAP
+
+2009-03-04 Arnim Laeuger <arniml>
+
+ * src/bus/mpc5200.c: add additional address decoding to mpc5200 bus driver
+ (Jeff Wittrock)
+
+2009-03-02 Arnim Laeuger <arniml>
+
+ * data/freescale/PARTS: add stepping for MPC5200B (Jeff Wittrock)
+
+2009-03-01 Arnim Laeuger <arniml>
+
+ * data/ti/PARTS, data/ti/tnetv1060/tnetv1060, data/ti/tnetv1060/STEPPINGS,
+ data/Makefile.am:
+ TI tnetv1060 (Kenny)
+
+2009-02-27 Arnim Laeuger <arniml>
+
+ * doc/UrJTAG.txt: Warning about FTD2XX driver, USB FAQ.
+
+ * src/cmd/flashmem.c, src/flash/flash.c, include/flash.h:
+ [ 2645787 ] Bypass verify stage of flashmem cmd (Jeff Wittrock)
+
+2009-02-26 Arnim Laeuger <arniml>
+
+ * data/Makefile.am, data/MANUFACTURERS, data/ti/PARTS,
+ data/ti/tnetv1061/STEPPINGS, data/ti/tnetv1061/tnetv1061:
+ TI tnetv1061 (Kenny)
+
+ * src/svf/svf_flex.l:
+ [ 2638083 ] SVF progress indicator not visible for some .svf files
+ (William)
+
+2009-02-25 Arnim Laeuger <arniml>
+
+ * src/svf/svf_flex.l: [ 2635979 ] Replace index() to strchr()
+ (MURANAKA Masaki)
+
+2009-02-23 Arnim Laeuger <arniml>
+
+ * src/tap/usbconn/libftdi.c, src/tap/usbconn/libftd2xx.c:
+ keep JTAG dongle in current mode (Holger Schurig)
+
+ * data/atmel/at32ap7000/at32ap7000: clarifications for AVR32 data
+ (Holger Schurig)
+
+2009-02-17 Mike Frysinger <vapier@gentoo.org>
+
+ * src/bus/mpc824x.c (setup_address): Return on unhandled sizes to avoid
+ compiler warnings.
+
+ * src/bsdl2jtag.c, src/bus/mpc824x.c, src/cmd/include.c, src/cmd/scan.c,
+ src/cmd/shell.c, src/jim/intel_28f800b3.c, src/jim/some_cpu.c,
+ src/jim/tap.c, src/part/data_register.c, src/tap/cable.c,
+ src/tap/cable/generic.c, src/tap/cable/jim.c, src/tap/cable/jlink.c,
+ src/tap/cable/xpc.c, src/tap/usbconn/libusb.c: Remove spurious semicolons
+ from places they do not belong (like at the end of braces).
+
+2009-02-16 Arnim Laeuger <arniml>
+
+ * doc/UrJTAG.txt: some FAQs
+
+2009-02-13 Mike Frysinger <vapier@gentoo.org>
+
+ * include/chain.h, include/tap.h, src/tap/chain.c, src/tap/tap.c: Add a
+ prefix to all local variables named "exit" to avoid shadowing the system
+ exit() function.
+
+ * src/cmd/print.c (cmd_print_run): Use puts() to display the formatted buffer
+ rather than printf() to avoid security issues with dynamically generated
+ format strings, and to avoid warnings generated by such compilers:
+ print.c:111: warning: format not a string literal and no format arguments
+
+ * configure.ac: Put our local -I paths into CPPFLAGS before anything coming
+ from the user as we want to make sure our local paths take precedence.
+ Reported by Steve Franks from a FreeBSD report.
+
+2009-02-11 Arnim Laeuger <arniml>
+
+ * src/bsdl/bsdl_sem.c: return proper error code to upper level
+
+2009-02-07 Arnim Laeuger <arniml>
+
+ * doc/UrJTAG.txt: turn http links into real hyperlinks
+
+ * doc/UrJTAG.txt: libftdi URL changed
+
+2009-02-06 Arnim Laeuger <arniml>
+
+ * src/tap/cable/ft2232.c: fix nSRST for flyswatter (Kees Jongenburger)
+
+2009-01-26 Kolja Waschk <kawk>
+
+ * UrJTAG.nsi: Script to create Windows installer using NSIS.
+
+2009-01-22 Mike Frysinger <vapier@gentoo.org>
+
+ * src/cmd/include.c: Include ctype.h for isalpha().
+
+ * src/bsdl/bsdl_sem.c (create_register): Use %zu for size_t with printf().
+
+ * src/tap/detect.c (detect_parts): Use the PRIX64 format string for 64bit
+ types with printf().
+
+ * src/part/part.c (part_print): Use const markings with const strings.
+ * src/cmd/include.c (cmd_include_or_script_run): Likewise.
+
+ * sysdep.h: Redirect swprintf() calls to _snwprintf() for Windows as they
+ implemented a different function from ISO C (theirs does not take a count).
+
+2009-01-19 Kolja Waschk <kawk>
+
+ * doc/UrJTAG.txt,
+ include/cable.h, include/chain.h, include/pod.h, include/Makefile.am,
+ src/cmd/cmd.c, src/cmd/pod.c, src/cmd/Makefile.am, src/tap/cable.c,
+ src/tap/chain.c, src/tap/cable/wiggler.c, src/tap/cable/arcom.c,
+ src/tap/cable/mpcbdm.c, src/tap/cable/ts7800.c,
+ src/tap/cable/usbblaster.c, src/tap/cable/jlink.c,
+ src/tap/cable/generic.c, src/tap/cable/vision_ep9307.c,
+ src/tap/cable/ea253.c, src/tap/cable/triton.c, src/tap/cable/ei012.c,
+ src/tap/cable/byteblaster.c, src/tap/cable/generic.h,
+ src/tap/cable/ft2232.c, src/tap/cable/wiggler2.c,
+ src/tap/cable/keithkoep.c, src/tap/cable/lattice.c,
+ src/tap/cable/dlc5.c, src/tap/cable/xpc.c, src/svf/svf.c:
+ [ 2187351 ] Direct JTAG signal access, get/set_trst extension;
+ Integrated changes from getset_pod branch, substituting the
+ get/set_trst cable functions with more mighty get/set_signal
+ functions. Finally, this gives low level access to cable signals
+ as Sebastian Hesselbarth suggested and implemented first (thanks).
+ Arnim implemented it for the FTDI cable drivers, while I worked
+ on the parport cable drivers and new "pod" command.
+
+2009-01-16 Arnim Laeuger <arniml>
+
+ * src/cmd/parse.c: flush_chain() between commands read from file
+ [ 2499176 ] No chain_flush() when executing commands from file
+
+2009-01-03 Arnim Laeuger <arniml>
+
+ * configure.ac, src/bus/bscoach.c, src/bus/buses.c,
+ src/bus/buses.h, src/bus/Makefile.am:
+ [ 2187115 ] Bus driver for Goepel Boundary Scan Coach
+ (by Markus Schneider)
+
+2008-12-23 Arnim Laeuger <arniml>
+
+ * src/svf/svf.c: added debug output for svf_compare_tdo()
+
+2008-12-23 Kolja Waschk <kawk>
+
+ * src/tap/parport/direct.c, configure.ac, doc/UrJTAG.txt:
+ Dynamically load the InpOut32.dll for parallel port access. Tested
+ in MinGW environment (Cygwin GCC with -mno-cygwin flag), and
+ documented how to compile it. Could build a distributable EXE now.
+
+ * src/cmd/usleep.c, sysdep.h: usleep() is declared in
+ unistd.h, also present in modern MinGW environments.
+ Defining it in sysdep.h collides with unistd.h.
+
+2008-12-22 Arnim Laeuger <arniml>
+
+ * src/tap/cable/usbblaster.c:
+ limit maximum number of bytes queued, equivalent for
+ Bug 2456024 - FTD2XX fails with certain SVF file
+
+ * src/tap/cable/ft2232.c:
+ set cable frequency to real FT2232 frequency
+
+ * src/tap/usbconn/libftdi.c, src/tap/usbconn/libftd2xx.c,
+ include/usbconn/libftdx.h, src/tap/cable/ft2232.c:
+ increased MPSSE buffer size from 4k to 64k
+ mitigates performance decrease for mid-sized clock operations
+
+2008-12-21 Kolja Waschk <kawk>
+
+ * src/svf/svf.c: Fix 2456021 - SVF compare_tdo flaw
+
+ * src/tap/cable/ft2232.c, src/tap/cable/cmd_xfer.c,
+ src/tap/cable/cmd_xfer.h: limit maximum number of bytes queued
+ into one cmd buffer. Should fix problems with high clocks count for
+ SVF runtest execution (Bug 2456024 - FTD2XX fails with certain SVF file)
+
+ * configure.ac, src/tap/parport/direct.c: added detection of InpOut32
+ library and support for using it for I/O port access even under Vista
+
+2008-12-17 Kolja Waschk <kawk>
+
+ * src/tap/discovery.c: Optional (#ifdef) printf for discovery debugging
+
+2008-12-16 Kolja Waschk <kawk>
+
+ * data/Makefile.am: Added bcm6358 files, thanks Anselmo Luginbuehl
+
+2008-12-09 Kolja Waschk <kawk>
+
+ * data/broadcom/bcm6358, data/broadcom/bcm6358/bcm6358,
+ data/broadcom/bcm6358/STEPPINGS, data/broadcom/PARTS:
+ [ 2412479 ] neufbox4 support. BCM6358 data files (by
+ Julien Aube, slightly modified)
+
+ * src/flash/amd.c: [ 2412481 ] neufbox4 support: MX29LV640B
+ recognition (by Julien Aube)
+
+2008-12-08 Julien Aube <obconseil@gmail.com>
+
+ * src/bus/ejtag_dma.c, src/bus/Makefile.am, src/bus/buses.c,
+ src/bus/buses.h, configure.ac: [ 2412486 ] Support for ejtag in DMA mode.
+
+2008-12-07 Mike Frysinger <vapier@gentoo.org>
+
+ * data/analog/bf518/bf518, data/analog/bf518/STEPPINGS, data/analog/PARTS,
+ data/Makefile.am: Initial support for BF518 processors.
+
+ * data/analog/bf548/STEPPINGS: Add 0.3 silicon revision.
+
+ * data/analog/PARTS: Add BF534 and BF548M ids.
+
+2008-12-03 Arnim Laeuger <arniml>
+
+ * src/tap/cable/ft2232.c, src/tap/cable/generic_usbconn.c,
+ src/tap/cable.c, doc/UrJTAG.txt:
+ [ 2382324 ] Patch to add support for TinCanTools Flyswatter JTAG cable
+ (Mark Norman)
+
+ * include/flash.h, src/flash/amd_flash.c, src/flash/amd.c,
+ src/flash/intel.c, src/flash/flash.c, configure.ac:
+ restructure multi-byte flash programming support
+ flashmem no longer needs to know about the capabilities of
+ the flash chip to handle multi-byte programming
+
+2008-12-02 Arnim Laeuger <arniml>
+
+ * include/flash/intel.h, src/flash/intel.c:
+ support for multi-byte write mode
+ chips must match the following criteria to qualify
+ - CFI data specifies multi-byte write mode supported
+ - handled by intel.c
+ - 8 or 16 bit interface
+
+2008-12-01 Arnim Laeuger <arniml>
+ * include/flash.h, src/flash/amd_flash.c, src/flash/amd.c,
+ src/flash/intel.c, src/flash/flash.c, configure.ac:
+ support multi-byte write mode
+ chips must match the following criteria to qualify
+ - CFI data specifies multi-byte write mode supported
+ - handled by amd.c
+ - 8 or 16 bit interface
+
+ * src/bus/prototype.c (prototype_bus_new): consider amode parameter properly
+ when specified on the command line. pervious version didn't set ASHIFT in
+ this case.
+
+ * src/flash/amd.c (amd_flash_print_info): added Spansion S92GL chips
+
+2008-11-16 Kolja Waschk <kawk>
+
+ * src/bus/ejtag.c: Support BCM6348/EJTAG 3.1 (by Andy Potter/livebox)
+
+2008-10-30 Arnim Laeuger <arniml>
+
+ * src/svf/svf_bison.y, src/svf/svf.c, src/svf/svf.h:
+ removed obsolete parameter
+
+ * include/svf.h, src/cmd/svf.c, src/svf/svf.c,
+ src/svf/svf_bison.y, src/svf/svf.h, doc/UrJTAG.txt:
+ add the ref_freq option to svf command
+
+2008-10-28 Arnim Laeuger <arniml>
+
+ * src/cmd/parse.c (jtag_parse_stream): avoid clipping message when
+ reading comments (Hartley)
+
+ * renamed data/lattice/lfec2-12e/lfec2_12e to lfec2-12e
+
+ * data/MANUFACTURERS, data/lattice/lfec2-12e, data/lattice/lfec2-12e/lfec2_12e,
+ data/lattice/lfec2-12e/STEPPINGS, data/lattice/PARTS, data/lattice/lc4064zc,
+ data/lattice/lc4064zc/lc4064zc, data/lattice/lc4064zc/STEPPINGS, data/marvell/88e1118,
+ data/marvell/88e1118/88e1118, data/marvell/88e1118/STEPPINGS, data/marvell/88f5182,
+ data/marvell/88f5182/88f5182-a2, data/marvell/88f5182/STEPPINGS, data/marvell/PARTS,
+ data/Makefile.am:
+ [ 2187342 ] Technologic Systems TS-7800 JTAG support
+ (Catalin Ionescu)
+ part description files
+
+2008-10-26 Arnim Laeuger <arniml>
+
+ * configure.ac, doc/UrJTAG.txt, src/tap/Makefile.am,
+ src/tap/cable/ts7800.c, src/tap/cable.c, THANKS:
+ [ 2187342 ] Technologic Systems TS-7800 JTAG support
+ (Catalin Ionescu, Stanislav Sinyagin)
+ cable driver only
+
+ * src/cmd/print.c, doc/UrJTAG.txt:
+ [ 1964834 ] Add 'print instruction' support to print command
+ (Hartley Sweeten)
+
+2008-10-23 Arnim Laeuger <arniml>
+
+ * src/svf/svf_bison.y: initialize max_time to 0.0 if
+ the optional MAXIMUM is missing for RUNTEST commands
+
+2008-10-22 Arnim Laeuger <arniml>
+
+ * src/tap/cable/generic.c: make calibration loop more tolerant for
+ less accurate OS timers
+
+2008-10-18 Kolja Waschk <kawk
+
+ * src/cmd/usleep.c, src/cmd/cmd.c, src/cmd/Makefile.am:
+ Add usleep command (Stanislav Sinyagin)
+
+2008-10-18 Kolja Waschk <kawk>
+
+ * src/tap/cable/ft2232.c, src/tap/cable/generic_usbconn.c:
+ Add support for ARM-USB-OCD TINY (Sebastian Hesselbarth)
+
+2008-10-13 Jie Zhang <jie.zhang@analog.com>
+
+ * src/tap/cable/ft2232.c (ft2232_transfer_schedule): Don't
+ access memory out of bounds.
+
+2008-10-11 Arnim Laeuger <arniml>
+
+ * src/bus/ejtag.c (ejtag_bus_init): added remaining return values
+ (Stanislav Sinyagin)
+
+2008-09-27 Arnim Laeuger <arniml>
+
+ * include/jtag.h, src/cmd/detect.c, src/cmd/initbus.c,
+ src/cmd/print.c, src/bus/bf548_ezkit.c, src/bus/fjmem.c,
+ src/bus/ppc405ep.c, src/bus/sh7727.c, src/bus/prototype.c,
+ src/bus/sa1110.c, src/bus/ppc440gx_ebc8.c, src/bus/tx4925.c,
+ src/bus/sh7750r.c, src/bus/pxa2x0.c, src/bus/bf533_stamp.c,
+ src/bus/bf533_ezkit.c, src/bus/bf537_stamp.c, src/bus/ixp425.c,
+ src/bus/avr32.c, src/bus/h7202.c, src/bus/zefant-xs3.c,
+ src/bus/mpc824x.c, src/bus/bcm1250.c, src/bus/sharc21065l.c,
+ src/bus/readmem.c, src/bus/au1500.c, src/bus/lh7a400.c,
+ src/bus/sh7751r.c, src/bus/generic_bus.c, src/bus/mpc5200.c,
+ src/bus/jopcyc.c, src/bus/bf561_ezkit.c, src/bus/slsup3.c,
+ src/bus/writemem.c, src/bus/s3c4510x.c, src/bus/ejtag.c,
+ src/flash/amd_flash.c, src/flash/cfi.c, src/flash/jedec_exp.c,
+ src/flash/jedec.c, src/flash/intel.c:
+ [ 2102453 ] Use macros for std return values instead of literals
+
+2008-09-16 Mike Frysinger <vapier@gentoo.org>
+
+ * data/analog/bf527/STEPPINGS: Add bf527 0.2.
+ * data/analog/bf533/STEPPINGS: Add bf533 0.5 and 0.6.
+ * data/analog/bf548/STEPPINGS: Add bf548 0.2.
+
+2008-09-15 Arnim Laeuger <arniml>
+
+ * src/svf/svf.h, src/svf/svf_flex.l: SVF player fix for
+ [ 2112823 ] Conversion with strtod and similar influenced by locale
+
+2008-09-14 Kolja Waschk <kawk>
+
+ Version 0.9 released.
+
+2008-09-14 Kolja Waschk <kawk>
+
+ * configure.ac, NEWS, po/fr.po, po/rw.po, po/sk.po: Preparation
+ for release of UrJTAG 0.9 tarball
+ * include/Makefile.am, src/bsdl/Makefile.am: list new header
+ files here so they get included in distribution
+
+2008-09-09 Arnim Laeuger <arniml>
+
+ * src/cmd/detect.c: test correct return value of bus->driver->init()
+
+ * src/bsdl2jtag.c: fix from and to for downto vectors
+
+2008-09-06 Arnim Laeuger <arniml>
+
+ * src/tap/usbconn/libftdi.c, src/tap/usbconn/libftd2xx.c:
+ [ 2091744 ] Automatic detection of alternative VID/PID cables broken
+
+ * src/tap/cable/usbblaster.c: set fixed frequency and print warning
+ if a different frequency is requested
+
+ * src/tap/cable/generic.c: fixed calibration loop
+
+ * src/svf/svf.c: require frequency setting from cable for
+ RUNTEST MIN SEC command, fixes
+ [ 2090432 ] SVF programming problem with "x SEC" arg to runtest
+ also restore previous frequency setting at end of SVF execution
+
+2008-09-04 Arnim Laeuger <arniml>
+
+ * configure.ac, src/tap/usbconn/libftd2xx.c,
+ src/tap/usbconn/libftdi.c: forward and use the desc= paramter
+ [ 2085244 ] Wrong device chosen by ftd2xx driver
+
+2008-09-03 Arnim Laeuger <arniml>
+
+ * src/tap/usbconn/libftd2xx.c, src/tap/usbconn/libftdi.c:
+ use puts() and printf() instead of perror()
+
+2008-09-03 Mike Frysinger <vapier@gentoo.org>
+
+ * src/tap/parport/ppdev.c, src/tap/cable/wiggler.c,
+ src/tap/cable/generic_parport.c: Change HAVE_LINUX_PPDEV_H to
+ ENABLE_LOWLEVEL_PPDEV.
+
+ * src/tap/cable/generic_parport.c, src/tap/cable/wiggler.c:
+ Fix typo: PPDEF -> PPDEV.
+
+2008-08-27 Arnim Laeuger <arniml>
+
+ * include/Makefile.am, include/bsdl.h, include/bsdl_mode.h,
+ src/cmd/include.c, src/cmd/bsdl.c, src/bsdl/vhdl_parser.h,
+ src/bsdl/bsdl_msg.h, src/bsdl/bsdl.c, src/bsdl/bsdl_bison.y,
+ src/bsdl/vhdl_flex.l, src/bsdl/bsdl_parser.h, src/bsdl/bsdl_sem.c,
+ src/bsdl/bsdl_flex.l, src/bsdl/bsdl_types.h, src/bsdl/vhdl_bison.y,
+ src/tap/detect.c: cleaned-up bsdl subsystem, avoid double reading
+ during detect, commenting
+
+2008-08-24 Arnim Laeuger <arniml>
+
+ * src/bsdl/bsdl_sem.c (bsdl_process_cell_info): fix error with
+ repeated usage of cmd[]
+
+2008-08-22 Arnim Laeuger <arniml>
+
+ * src/bsdl/vhdl_bison.y: enhanced error reporting
+
+ * configure.ac, data/Makefile.am, src/Makefile.am,
+ src/bsdl/Makefile.am, src/bsdl/bsdl.c, src/bsdl/bsdl_bison.y,
+ src/bsdl/bsdl_flex.l, src/bsdl/bsdl_sem.c, src/bsdl/bsdl_sysdep.h,
+ data/bsdl/STD_1532_2001, data/bsdl/STD_1532_2002, src/bsdl/bsdl_msg.h,
+ src/bsdl/bsdl_parser.h, src/bsdl/bsdl_types.h, src/bsdl/vhdl_bison.y,
+ src/bsdl/vhdl_flex.l, src/bsdl/vhdl_parser.h, src/bsdl/bsdl_local.h:
+ merged from branches/bsdl 1304:1340
+ rewrite of BSDL parser
+
+2008-07-15 Arnim Laeuger <arniml>
+
+ * doc/UrJTAG.txt, src/cmd/dr.c (cmd_dr_help):
+ document feature to set active data register with dr
+
+2008-07-14 Arnim Laeuger <arniml>
+
+ * include/chain.h, include/tap.h, src/cmd/reset.c, src/tap/detect.c,
+ src/tap/chain.c, src/tap/tap.c, src/bus/fjmem.c, src/bus/avr32.c:
+ [ 1873260 ] Command 'reset' does not reset internal states
+ next round to fix this one
+
+2008-07-10 Arnim Laeuger <arniml>
+
+ * src/tap/usbconn/libftd2xx.c (usbconn_ftd2xx_open): perform device reset
+ and RX purge
+
+2008-07-09 Arnim Laeuger <arniml>
+
+ * src/tap/usbconn/libftd2xx.c: added some debugging messages
+
+ * src/tap/usbconn/libftd2xx.c (usbconn_ftd2xx_write),
+ src/tap/usbconn/libftdi.c (usbconn_ftdi_write): don't subtract from
+ p->to_recv
+
+2008-07-03 Mike Frysinger <vapier@gentoo.org>
+
+ * src/lib/ansidecl.h, src/lib/libiberty.h: Import headers from binutils
+ that the local src/lib/ files need for relocatable support.
+ * src/lib/Makefile.am (libiberty_sources): Add local headers to the list.
+
+2008-07-03 Jie Zhang <jie.zhang@analog.com>
+
+ * src/bsdl/bsdl.c: Remove trailing whitespaces.
+ * src/lib/make-relative-prefix.c: Likewise.
+ * src/lib/lbasename.c: Likewise.
+ * src/lib/lrealpath.c: Likewise.
+ * doc/UrJTAG.txt: Likewise.
+ * data/atmel/PARTS: Likewise.
+
+ * src/bus/bf537_stamp.c (bus_driver_t bf538f_ezkit_bus): New.
+ (bus_driver_t bf526_ezkit_bus): New.
+ * src/bus/buses.c (bus_drivers[]): Add bf526_ezkit_bus and
+ bf538f_ezkit_bus.
+ * src/bus/buses.h (bf526_ezkit_bus): Declare.
+ (bf538f_ezkit_bus): Declare.
+ * src/bus/Makefile.am (libbus_a_SOURCES): Add bf537_stamp.c
+ for bf526 ezkit and bf538f ezkit.
+ * configure.ac: Add bf526_ezkit and bf538f_ezkit.
+ * data/analog/PARTS: Add bf538.
+ * analog/bf538/STEPPINGS: New file.
+ * analog/bf538/bf538: New file.
+ * data/Makefile.am (nobase_dist_pkgdata_DATA): Add
+ analog/bf538/STEPPINGS and analog/bf538/bf538.
+
+ * src/tap/cable/ft2232.c: Make the gnICE comment a little more specific.
+
+2008-07-02 Jie Zhang <jie.zhang@analog.com>
+
+ * include/bus_driver.h (struct bus_driver): Add driver argument
+ to new_bus.
+ * src/cmd/initbus.c (cmd_initbus_run): Pass driver to new_bus.
+ * src/bus/bf548_ezkit.c (bf548_ezkit_bus_new): Add driver
+ argument and use it.
+ * src/bus/fjmem.c (fjmem_bus_new): Likewise.
+ * src/bus/ppc405ep.c (ppc405ep_bus_new): Likewise.
+ * src/bus/sh7727.c (sh7727_bus_new): Likewise.
+ * src/bus/prototype.c (prototype_bus_new): Likewise.
+ * src/bus/sa1110.c (sa1110_bus_new): Likewise.
+ * src/bus/ppc440gx_ebc8.c (ppc440gx_ebc8_bus_new): Likewise.
+ * src/bus/sh7750r.c (sh7750r_bus_new): Likewise.
+ * src/bus/tx4925.c (tx4925_bus_new): Likewise.
+ * src/bus/bf533_stamp.c (bf533_stamp_bus_new): Likewise.
+ * src/bus/bf533_ezkit.c (bf533_ezkit_bus_new): Likewise.
+ * src/bus/ixp425.c (ixp425_bus_new): Likewise.
+ * src/bus/avr32.c (avr32_bus_new): Likewise.
+ * src/bus/zefant-xs3.c (zefant_xs3_bus_new): Likewise.
+ * src/bus/h7202.c (h7202_bus_new): Likewise.
+ * src/bus/mpc824x.c (mpc824x_bus_new): Likewise.
+ * src/bus/bcm1250.c (bcm1250_bus_new): Likewise.
+ * src/bus/sharc21065l.c (sharc_21065L_bus_new): Likewise.
+ * src/bus/au1500.c (au1500_bus_new): Likewise.
+ * src/bus/lh7a400.c (lh7a400_bus_new): Likewise.
+ * src/bus/sh7751r.c (sh7751r_bus_new): Likewise.
+ * src/bus/mpc5200.c (mpc5200_bus_new): Likewise.
+ * src/bus/jopcyc.c (jopcyc_bus_new): Likewise.
+ * src/bus/bf561_ezkit.c (bf561_ezkit_bus_new): Likewise.
+ * src/bus/slsup3.c (slsup3_bus_new): Likewise.
+ * src/bus/s3c4510x.c (s3c4510_bus_new): Likewise.
+ * src/bus/ejtag.c (ejtag_bus_new): Likewise.
+ * src/bus/pxa2x0.c (pxa2xx_bus_new_common): Remove.
+ (pxa2xx_bus_new): New.
+ (pxa2x0_bus_new): Remove.
+ (pxa27x_bus_new): Remove.
+ (pxa2xx_bus_printinfo): New.
+ (pxa2x0_bus_printinfo): Remove.
+ (pxa27x_bus_printinfo): Remove.
+ (bus_driver_t pxa2x0_bus): Replace pxa2x0_bus_new with
+ pxa2xx_bus_new. Replace pxa2x0_bus_printinfo with
+ pxa2xx_bus_printinfo.
+ (bus_driver_t pxa27x_bus): Replace pxa27x_bus_new with
+ pxa2xx_bus_new. Replace pxa27x_bus_printinfo with
+ pxa2xx_bus_printinfo.
+ * src/bus/bf537_stamp.c (bf537_stamp_bus_new_1): Rename
+ to ...
+ (bf537_stamp_bus_new): ... this. And use the new driver
+ argument.
+ (bf537_ezkit_bus_new): Remove.
+ (bf527_ezkit_bus_new): Remove.
+ (bf537_stamp_bus_printinfo): Use description in bus driver.
+ (bf537_ezkit_bus_printinfo): Remove.
+ (bf527_ezkit_bus_printinfo): Remove.
+ (BF537_STAMP_BUS_FUNCTIONS): Define.
+ (bus_driver_t bf537_stamp_bus): Use BF537_STAMP_BUS_FUNCTIONS.
+ (bus_driver_t bf537_ezkit_bus): Likewise.
+ (bus_driver_t bf527_ezkit_bus): Likewise.
+
+2008-06-28 Kolja Waschk <kawk>
+
+ * data/sigma/smp8634/smp8634, data/sigma/smp8634/STEPPINGS,
+ data/sigma/PARTS, data/Makefile.am: Added Sigma SMP8634 (andi2k)
+ * doc/UrJTAG.txt: FAQ about CVS needed for autogen.sh and superuser
+ rights being needed for running "make install" (frankvh)
+
+2008-06-27 Arnim Laeuger <arniml>
+
+ * UrJTAG.txt: JTAGkey-Tiny
+
+ * UrJTAG.txt: update of bus driver init() function
+ * include/bus_driver.h, src/cmd/initbus.c, src/bus/bf548_ezkit.c,
+ src/bus/fjmem.c, src/bus/ppc405ep.c, src/bus/sh7727.c,
+ src/bus/prototype.c, src/bus/sa1110.c, src/bus/ppc440gx_ebc8.c,
+ src/bus/tx4925.c, src/bus/sh7750r.c, src/bus/pxa2x0.c,
+ src/bus/bf533_stamp.c, src/bus/bf533_ezkit.c, src/bus/bf537_stamp.c,
+ src/bus/ixp425.c, src/bus/avr32.c, src/bus/h7202.c,
+ src/bus/zefant-xs3.c, src/bus/mpc824x.c, src/bus/bcm1250.c,
+ src/bus/sharc21065l.c, src/bus/au1500.c, src/bus/lh7a400.c,
+ src/bus/sh7751r.c, src/bus/generic_bus.c, src/bus/mpc5200.c,
+ src/bus/jopcyc.c, src/bus/bf561_ezkit.c, src/bus/slsup3.c,
+ src/bus/s3c4510x.c, src/bus/ejtag.c, src/bus/generic_bus.h:
+ [ 1984813 ] Bus driver cleanup, separate (*init) and (*prepare)
+ functions (Hartley Sweeten)
+
+2008-06-24 Jie Zhang <jie.zhang@analog.com>
+
+ From Michael Hennerich <michael.hennerich@analog.com>
+ * src/tap/cable.c (ft2232_bfin_ujtag_cable_driver): Rename to ...
+ (ft2232_gnice_cable_driver): ... this.
+ (cable_drivers[]): Change accordingly.
+ * src/tap/cable/generic_usbconn.c
+ (usbconn_cable_bfin_ujtag_ftd2xx): Rename to ...
+ (usbconn_cable_gnice_ftd2xx): ... this.
+ (usbconn_cable_bfin_ujtag_ftdi): Rename to ...
+ (usbconn_cable_gnice_ftdi): ... this.
+ * src/tap/cable/ft2232.c (BIT_BFIN_UJTAG_nTRST): Rename to ...
+ (BIT_GNICE_nTRST): ... this.
+ (BIT_BFIN_UJTAG_nLED): Rename to ...
+ (BIT_GNICE_nLED): ... this.
+ (BITMASK_BFIN_UJTAG_nTRST): Rename to ...
+ (BITMASK_GNICE_nTRST): ... this.
+ (BITMASK_BFIN_nLED): Rename to ...
+ (BITMASK_GNICE_nLED): ... this.
+ (ft2232_bfin_urjtag_init): Rename to ...
+ (ft2232_gnice_init): ... this.
+ (ft2232_bfin_urjtag_done): Rename to ...
+ (ft2232_gnice_done): ... this.
+ (usbconn_cable_bfin_ujtag_ftdi): Rename to ...
+ (usbconn_cable_gnice_ftdi): ... this.
+ (ft2232_usbcable_help): Change accordingly.
+ (ft2232_bfin_ujtag_cable_driver): Rename to ...
+ (ft2232_gnice_cable_driver): ... this.
+ (usbconn_cable_bfin_ujtag_ftdi): Rename to ...
+ (usbconn_cable_gnice_ftdi): ... this.
+ (usbconn_cable_bfin_ujtag_ftd2xx): Rename to ...
+ (usbconn_cable_gnice_ftd2xx): ... this.
+ * po/fr.po: Update.
+ * po/rw.po: Update.
+ * po/sk.po: Update.
+
+2008-06-21 Arnim Laeuger <arniml>
+
+ * src/bus/bf548_ezkit.c, src/bus/fjmem.c, src/bus/ppc405ep.c,
+ src/bus/sh7727.c, src/bus/prototype.c, src/bus/sa1110.c,
+ src/bus/ppc440gx_ebc8.c, src/bus/tx4925.c, src/bus/sh7750r.c,
+ src/bus/pxa2x0.c, src/bus/bf533_stamp.c, src/bus/bf533_ezkit.c,
+ src/bus/bf537_stamp.c, src/bus/ixp425.c, src/bus/h7202.c,
+ src/bus/mpc824x.c, src/bus/bcm1250.c, src/bus/sharc21065l.c,
+ src/bus/au1500.c, src/bus/lh7a400.c, src/bus/sh7751r.c,
+ src/bus/generic_bus.c, src/bus/mpc5200.c, src/bus/bf561_ezkit.c,
+ src/bus/slsup3.c, src/bus/generic_bus.h:
+ [ 1984813 ] Bus driver cleanup, generic_bus_prepare function for
+ all bus drivers that just load the EXTEST instruction
+ (Hartley Sweeten)
+
+2008-06-18 Arnim Laeuger <arniml>
+
+ * include/bus_driver.h, src/bus/bf548_ezkit.c, src/bus/fjmem.c,
+ src/bus/ppc405ep.c, src/bus/sh7727.c, src/bus/prototype.c,
+ src/bus/sa1110.c, src/bus/ppc440gx_ebc8.c, src/bus/tx4925.c,
+ src/bus/sh7750r.c, src/bus/pxa2x0.c, src/bus/bf533_stamp.c,
+ src/bus/bf533_ezkit.c, src/bus/bf537_stamp.c, src/bus/ixp425.c,
+ src/bus/avr32.c, src/bus/h7202.c, src/bus/zefant-xs3.c,
+ src/bus/mpc824x.c, src/bus/bcm1250.c, src/bus/sharc21065l.c,
+ src/bus/au1500.c, src/bus/lh7a400.c, src/bus/sh7751r.c,
+ src/bus/mpc5200.c, src/bus/jopcyc.c, src/bus/bf561_ezkit.c,
+ src/bus/slsup3.c, src/bus/s3c4510x.c, src/bus/ejtag.c:
+ [ 1984813 ] Bus driver cleanup, uniquify chain and part in
+ bus_t struct (Hartley Sweeten)
+
+2008-06-16 Arnim Laeuger <arniml>
+
+ * src/cmd/initbus.c (cmd_initbus_run),
+ src/cmd/initbus.c, src/bus/bf548_ezkit.c, src/bus/fjmem.c,
+ src/bus/ppc405ep.c, src/bus/sh7727.c, src/bus/prototype.c,
+ src/bus/sa1110.c, src/bus/ppc440gx_ebc8.c, src/bus/tx4925.c,
+ src/bus/sh7750r.c, src/bus/pxa2x0.c, src/bus/bf533_stamp.c,
+ src/bus/bf533_ezkit.c, src/bus/bf537_stamp.c, src/bus/ixp425.c,
+ src/bus/avr32.c, src/bus/h7202.c, src/bus/zefant-xs3.c,
+ src/bus/mpc824x.c, src/bus/bcm1250.c, src/bus/sharc21065l.c,
+ src/bus/au1500.c, src/bus/lh7a400.c, src/bus/sh7751r.c,
+ src/bus/mpc5200.c, src/bus/jopcyc.c, src/bus/bf561_ezkit.c,
+ src/bus/slsup3.c, src/bus/s3c4510x.c, src/bus/ejtag.c:
+ [ 1984813 ] Bus driver cleanup, remove unnecessary sanity checking
+ (Hartley Sweeten)
+
+2008-06-11 Arnim Laeuger <arniml>
+
+ * po/fr.po, po/rw.po, po/sk.po: updated
+
+ * src/tap/cable/generic.c (fmax): define fallback in case libm doesn't
+ provide fmax()
+ * configure.ac: detect availability of fmax() in libm
+
+ * src/bus/bf548_ezkit.c, src/bus/ppc405ep.c, src/bus/sh7727.c,
+ src/bus/sa1110.c, src/bus/ppc440gx_ebc8.c, src/bus/tx4925.c,
+ src/bus/sh7750r.c, src/bus/pxa2x0.c, src/bus/bf533_stamp.c,
+ src/bus/bf533_ezkit.c, src/bus/bf537_stamp.c, src/bus/ixp425.c,
+ src/bus/h7202.c, src/bus/mpc824x.c, src/bus/bcm1250.c,
+ src/bus/sharc21065l.c, src/bus/au1500.c, src/bus/lh7a400.c,
+ src/bus/sh7751r.c, src/bus/mpc5200.c, src/bus/jopcyc.c,
+ src/bus/bf561_ezkit.c, src/bus/slsup3.c, src/bus/s3c4510x.c:
+ [ 1984813 ] Bus driver cleanup, second step of part 2) (Hartley Sweeten)
+ use generic_bus_attach_sig() in all bus drivers
+
+2008-06-10 Arnim Laeuger <arniml>
+
+ * src/bus/generic_bus.c, src/bus/generic_bus.h, src/bus/zefant-xs3.c:
+ [ 1984813 ] Bus driver cleanup, first step of part 2) (Hartley Sweeten)
+ generic_bus_attach_sig() added
+
+ * src/bus/au1500.c, src/bus/avr32.c, src/bus/bcm1250.c,
+ src/bus/bf533_ezkit.c, src/bus/bf533_stamp.c, src/bus/bf537_stamp.c,
+ src/bus/bf548_ezkit.c, src/bus/bf561_ezkit.c, src/bus/ejtag.c,
+ src/bus/fjmem.c, src/bus/generic_bus.c, src/bus/generic_bus.h,
+ src/bus/h7202.c, src/bus/ixp425.c, src/bus/jopcyc.c,
+ src/bus/lh7a400.c, src/bus/mpc5200.c, src/bus/mpc824x.c,
+ src/bus/ppc405ep.c, src/bus/ppc440gx_ebc8.c, src/bus/prototype.c,
+ src/bus/pxa2x0.c, src/bus/s3c4510x.c, src/bus/sa1110.c,
+ src/bus/sh7727.c, src/bus/sh7750r.c, src/bus/sh7751r.c,
+ src/bus/sharc21065l.c, src/bus/slsup3.c, src/bus/tx4925.c,
+ src/bus/zefant-xs3.c:
+ [ 1984813 ] Bus driver cleanup, second step of part 4) (Hartley Sweeten)
+ generic_bus_read() added
+
+2008-06-09 Arnim Laeuger <arniml>
+
+ * src/bus/bf548_ezkit.c, src/bus/fjmem.c, src/bus/ppc405ep.c,
+ src/bus/sh7727.c, src/bus/prototype.c, src/bus/sa1110.c,
+ src/bus/ppc440gx_ebc8.c, src/bus/tx4925.c, src/bus/sh7750r.c,
+ src/bus/pxa2x0.c, src/bus/bf533_stamp.c, src/bus/bf533_ezkit.c,
+ src/bus/bf537_stamp.c, src/bus/ixp425.c, src/bus/avr32.c,
+ src/bus/h7202.c, src/bus/zefant-xs3.c, src/bus/mpc824x.c,
+ src/bus/bcm1250.c, src/bus/sharc21065l.c, src/bus/au1500.c,
+ src/bus/lh7a400.c, src/bus/sh7751r.c, src/bus/mpc5200.c,
+ src/bus/jopcyc.c, src/bus/bf561_ezkit.c, src/bus/slsup3.c,
+ src/bus/s3c4510x.c, src/bus/ejtag.c:
+ [ 1984813 ] Bus driver cleanup, first step of part 4) (Hartley Sweeten)
+
+ * src/svf/svf_flex.l, src/flash/flash.c (flashmem):
+ avoid '\r' in i18n strings (Hartley Sweeten)
+ * po/fr.po, po/rw.po, po/sk.po: remove '\r'
+
+2008-06-06 Kolja Waschk <kawk>
+
+ * src/bus/bcm1250.c: Allow for 8 IO_CS_L signals, not just 7
+ (Hartley Sweeten)
+
+ * src/bus/bf548_ezkit.c, src/bus/fjmem.c, src/bus/ppc405ep.c,
+ src/bus/sh7727.c, src/bus/prototype.c, src/bus/sa1110.c,
+ src/bus/ppc440gx_ebc8.c, src/bus/sh7750r.c, src/bus/tx4925.c,
+ src/bus/pxa2x0.c, src/bus/bf533_stamp.c, src/bus/bf533_ezkit.c,
+ src/bus/bf537_stamp.c, src/bus/ixp425.c, src/bus/avr32.c,
+ src/bus/zefant-xs3.c, src/bus/h7202.c, src/bus/mpc824x.c,
+ src/bus/bcm1250.c, src/bus/sharc21065l.c, src/bus/au1500.c,
+ src/bus/lh7a400.c, src/bus/sh7751r.c, src/bus/generic_bus.c,
+ src/bus/mpc5200.c, src/bus/jopcyc.c, src/bus/Makefile.am,
+ src/bus/slsup3.c, src/bus/bf561_ezkit.c, src/bus/s3c4510x.c,
+ src/bus/ejtag.c, src/bus/generic_bus.h: [ 1984813 ] Bus driver
+ cleanup: Unified *bus_free functions and moved them to new
+ src/bus/generic_bus.c/h (Hartley Sweeten)
+
+2008-06-05 Arnim Laeuger <arniml>
+
+ * src/tap/usbconn/libftdi.c: issue device reset in usbconn_ftdi_open(), fixes
+ hang of FT245 chip when initializing the cable more than once
+ * src/tap/cable/usbblaster.c: split get_tdo and transfer functions into schedule
+ finish parts for deeper queueing with extended flush function
+
+2008-06-05 Kolja Waschk <kawk>
+
+ * src/bus/bf548_ezkit.c, src/bus/fjmem.c, src/bus/ppc405ep.c,
+ src/bus/sh7727.c, src/bus/prototype.c, src/bus/sa1110.c,
+ src/bus/ppc440gx_ebc8.c, src/bus/sh7750r.c, src/bus/tx4925.c,
+ src/bus/pxa2x0.c, src/bus/bf533_stamp.c, src/bus/bf533_ezkit.c,
+ src/bus/bf537_stamp.c, src/bus/ixp425.c, src/bus/avr32.c,
+ src/bus/zefant-xs3.c, src/bus/h7202.c, src/bus/mpc824x.c,
+ src/bus/bcm1250.c, src/bus/sharc21065l.c, src/bus/au1500.c,
+ src/bus/lh7a400.c, src/bus/sh7751r.c, src/bus/mpc5200.c,
+ src/bus/jopcyc.c, src/bus/slsup3.c, src/bus/bf561_ezkit.c,
+ src/bus/s3c4510x.c, src/bus/ejtag.c: Partial [ 1984813 ]
+ Bus driver cleanup: Changed mallocs to callocs, added (NULL) pointer
+ for *init to the drivers where it was missing (Hartley Sweeten)
+
+2008-05-29 Kolja Waschk <kawk>
+
+ * src/tap/cable/wiggler.c src/tap/cable/generic_usbconn.c,
+ src/tap/cable/usbblaster.c, src/tap/cable/vision_ep9307.c,
+ src/tap/cable/jim.c, src/tap/cable/ft2232.c,
+ src/tap/cable/generic_parport.c: More malloc/free cleanup
+ in cable drivers (Hartley Sweeten)
+
+2008-05-28 Kolja Waschk <kawk>
+
+ * src/cmd/cable.c, src/tap/cable/wiggler.c,
+ src/tap/cable/generic_usbconn.c, src/tap/cable/vision_ep9307.c,
+ src/tap/cable/jim.c, src/tap/cable/ft2232.c,
+ src/tap/cable/usbblaster.c, src/tap/cable/generic_parport.c: Cable
+ connect/disconnect cleanup, fix malloc/free issues (Hartley Sweeten)
+
+2008-05-27 Arnim Laeuger <arniml>
+
+ * UrJTAG.txt: document progress option of svf command
+ * src/cmd/svf.c (cmd_svf_run): new command option 'progress'
+ * src/svf/svf.c (svf_run), include/svf.h (svf_run): new parameter
+ print_progress
+ * src/svf/svf_flex.l (fix_yylloc_nl): report line / total number
+
+2008-05-26 Arnim Laeuger <arniml>
+
+ [adding svf progress output] (Steve Franks)
+ * src/svf/svf_bison.y (svf_bison_init): hand down parameters for scanner
+ initialization
+ * src/svf/svf_flex.l: output progress indicator upon newline detection
+ * src/svf/svf.c (svf_run): caluclate number of lines and pass result
+ to scanner initialization
+ * src/svf/svf.h: added "extra" data type for scanner
+
+2008-05-26 Kolja Waschk <kawk>
+
+ * src/bus/avr32.c, src/bus/buses.c, src/bus/buses.h,
+ src/bus/Makefile.am, src/flash/amd.c, THANKS, configure.ac,
+ doc/UrJTAG.txt, data/atmel/at32ap7000, data/atmel/at32ap7000/at32ap7000,
+ data/atmel/at32ap7000/STEPPINGS, data/atmel/PARTS, data/Makefile.am:
+ add support for Atmel's AT32AP7000 (by Gabor Juhos)
+
+2008-05-24 Arnim Laeuger <arniml>
+
+ * src/tap/cable/usbblaster.c (usbblaster_connect): added missing
+ malloc for cable_params
+
+2008-05-23 Mike Frysinger <vapier@gentoo.org>
+
+ * data/analog/PARTS: Add BF526 id.
+
+2008-05-21 Jie Zhang <jie.zhang@analog.com>
+
+ [ 1951767 ] bsdl2jtag cannot parse some bsdl files
+ * src/bsdl2jtag.c (endline): Prevent `:' from being scanned in.
+
+2008-05-21 Jie Zhang <jie.zhang@analog.com>
+
+ [ 1968455 ] Enter UPDATE state after register shift
+ * include/chain.h (EXITMODE_UPDATE): Define.
+ * src/tap/tap.c (tap_defer_shift_register): Enter Update-DR
+ or Update-IR when requested.
+
+2008-05-20 Arnim Laeuger <arniml>
+
+ * src/tap/cable/ft2232.c, src/tap/cable/usbblaster.c:
+ typo in help string fixed
+ * src/tap/cable/ft2232.c, src/tap/cable/usbblaster.c:
+ run on top of usbconn drivers
+ * src/tap/cable/cmd_xfer.c, src/tap/cable/cmd_xfer.h:
+ provide command queueing functions to ft2232.c and usbblaster.c
+ * src/tap/usbconn/libftd2xx.c, src/tap/usbconn/libftdi.c,
+ include/usbconn/libftdx.h, src/tap/parport/ftdi.c,
+ src/tap/parport/ftd2xx.c, src/tap/parport.c, src/tap/Makefile.am,
+ src/tap/usbconn.c, src/tap/cable/generic_usbconn.c,
+ src/tap/cable/generic_usbconn.h, doc/UrJTAG.txt:
+ ftdi & ftd2xx drivers ported from parport to usbconn
+ * src/tap/usbconn/libusb.c, include/usbconn.h: added read and write
+ * configure.ac: --enable-parport renamed to --enable-lowlevel
+ respective renaming for Makefile and C macros
+
+2008-05-13 Kolja Waschk <kawk>
+
+ * src/tap/cable/generic_usbconn.c: Read VID/PID as hexadecimal, fixes
+ Bug [1962628] VID/PID for usbconn cables are parsed as decimal
+
+2008-05-12 Kolja Waschk <kawk>
+
+ * doc/jtag.1: Explanation of [file] argument, correct location
+ of rc file (thanks Steve Franks for noticing)
+
+2008-05-09 Mike Frysinger <vapier@gentoo.org>
+
+ * data/analog/PARTS, data/Makefile.am, data/analog/bf527/:
+ Rename BF527c to BF527 and relocate files as appropriate.
+ * data/analog/PARTS, data/Makefile.am, data/analog/bf548/:
+ Rename BF549 to BF548 and relocate files as appropriate.
+ * data/analog/bf527/STEPPINGS: Add support for bf527 0.1.
+
+2005-05-06 Kolja Waschk <kawk>
+
+ * acinclude.m4, src/cmd/cmd.c, src/jtag.c:
+ Update for [ 1940323 ] OS X support for UrJTAG (by Ville Voipio)
+
+2008-05-05 Mike Frysinger <vapier@gentoo.org>
+
+ * src/svf/svf.c: Fix __MINGW32__ typo.
+ * src/flash/amd.c: Remove _() around part names.
+ * src/flash/amd_flash.c: Likewise.
+ * src/lib/safe-ctype.c: Include from libiberty as it is needed on some
+ non-POSIX ports (like mingw).
+ * src/cmd/include.c (cmd_include_or_script_run): Add handling of absolute
+ paths under Windows that take the form <letter>:\.
+ * sysdep.h, src/flash/amd.c, src/flash/amd_flash.c, src/jtag.c: Move some
+ Windows stub functions to sysdep.h so we don't have to redeclare them in
+ every single file and so we don't trigger future bitrot.
+
+2008-05-04 Mike Frysinger <vapier@gentoo.org>
+
+ * src/flash/amd.c: Handle chipid 0x22ed M29W640DT.
+
+2008-05-02 Arnim Laeuger <arniml>
+
+ * src/tap/cable/generic_usbconn.c (generic_usbconn_connect):
+ fix user_specified.driver comparison
+
+2008-05-01 Mike Frysinger <vapier@gentoo.org>
+
+ * configure.ac: Check for libusb before libftdi since the latter needs
+ the former.
+ * configure.ac: Use AC_PATH_TOOL() instead of AC_PATH_PROG() so that we
+ handle cross-compiling sanely.
+ * configure.ac: Make LIBS/CPPFLAGS sane and consistent when checking for
+ libusb and libftdi.
+ * configure.ac: Use POSIX compliant tests for equality ("=", not "==").
+
+2008-04-26 Kolja Waschk <kawk>
+
+ * src/flash/amd.c: Separate Chip name by Manufacturer (Andrey F. Ilchuk)
+
+2008-04-24 Mike Frysinger <vapier@gentoo.org>
+
+ * src/tap/usbconn/libusb.c (usbconn_libusb_connect): Use the
+ usb_get_busses() function rather than the usb_busses global
+ variable due to portability issues (like with libusb-win32).
+ * src/jtag.c (jtag_readline_loop): [ 1950315 ] Fix quiting when
+ using the non readline version.
+ * configure.ac: [ 1950061 ] Look for the ChangeLog in $srcdir.
+
+2008-04-19 Kolja Waschk <kawk>
+
+ * src/tap/parport/ftd2xx.c: SetBaudRate to 3E6, not 48E6. Should
+ fix [ 1925509 ] ftd2xx: SetBaudRate fails with FT245
+ * src/flash/intel.c: Handle chips that support "Mitsubishi
+ standard/enhanced command set" just like Intel chips. Need
+ to do more research about the differences (if any) [1946559]
+ * src/tap/cable/usbblaster.c: clock() at highest possible rate
+ using the byte shift mode for n>=8 (Thanks M. Banditt)
+ * include/cmd.h, src/cmd/cmd.c, src/jtag.c: [ 1946331 ] command
+ completion support (by Mike Frysinger)
+ * configure.ac, acinclude.m4: [ 1946114 ] make AC_PROG_SED
+ workaround sane (Mike Frysinger)
+ * include/jtag.h, src/cmd/detect.c, src/tap/detect.c:
+ [ 1946119 ] fixup relocatable jtag in detection (M.Frysinger)
+ * src/cmd/frequency.c: ensure that cable is initialized. Fixes
+ [ 1933736 ] "frequency" command segfaults without args
+
+2008-04-19 Arnim Laeuger <arniml>
+
+ * src/bsdl/Makefile.am, src/svf/Makefile.am: ensure that
+ bsdl_bison.h is generated prior to compiling bsdl_flex.c and
+ bsdl_bison.c
+ [ 1943435 ] fixup bsdl parallel build issue (part2)
+
+2008-04-13 Kolja Waschk <kawk>
+
+ * src/tap/parport/ftd2xx.c, src/tap/usbconn/libusb.c, src/lib/fclock.c,
+ src/jtag.c, src/flash/amd_flash.c, src/flash/amd.c, src/flash/jedec.c,
+ src/svf/svf.c, configure.ac, doc/UrJTAG.txt: Provide variants of
+ usleep, frealtime, mkdir for [ 1838732 ] EXE built with MinGW
+
+2008-04-11 Kolja Waschk <kawk>
+
+ * src/bsdl/bsdl.c, src/tap/parport/ftd2xx.c, src/tap/parport/ftdi.c,
+ src/tap/usbconn/libusb.c, src/lib/fclock.c, src/jtag.c:
+ [ 1940323 ] OS X support for UrJTAG (by Ville Voipio)
+
+2008-04-11 Arnim Laeuger <arniml>
+
+ * src/tap/parport/ftdi.c (ftdi_flush_output): removed unused variables
+
+2008-04-11 Jie Zhang <jie.zhang@analog.com>
+
+ From Michael Hennerich <michael.hennerich@analog.com>
+ * src/tap/parport/ftdi.c (ftdi_generic_open): Detect
+ BFIN-UJTAG cable.
+ * src/tap/cable.c (ft2232_bfin_ujtag_cable_driver): Declare.
+ (cable_drivers): Add ft2232_bfin_ujtag_cable_driver.
+ * src/tap/cable/ft2232.c (BIT_BFIN_UJTAG_nTRST,
+ BIT_BFIN_UJTAG_nLED, BITMASK_BFIN_UJTAG_nTRST,
+ BITMASK_BFIN_UJTAG_nLED): Define.
+ (ft2232_bfin_ujtag_init): New.
+ (ft2232_bfin_ujtag_done): New.
+ (ft2232_bfin_ujtag_cable_driver): Define.
+
+2008-04-10 Jie Zhang <jie.zhang@analog.com>
+
+ * src/flash/flash.c (flashmem): Show the address when verifying.
+ Show the end address when program and verify complete.
+
+2008-04-10 Jie Zhang <jie.zhang@analog.com>
+
+ From Stefan Pledl <stefan.pledl@mesutronic.de>
+ * src/bsdl2jtag.c (endline): Set mode to 0 for INSTRUCTION_LENGTH
+ and BOUNDARY_LENGTH attributes.
+ * data/atmel/atf15xx/STEPPINGS: New file.
+ * data/atmel/atf15xx/atf1504asv: New file.
+ * data/atmel/PARTS: Add atf15xx.
+ * data/Makefile.am (nobase_dist_pkgdata_DATA): Add
+ atmel/atf15xx/STEPPINGS and atmel/atf15xx/atf1504asv.
+
+2008-04-09 Jie Zhang <jie.zhang@analog.com>
+
+ * src/bus/bf537_stamp.c (bf537_stamp_bus_new_1): Renamed
+ from bf537_stamp_bus_new, but don't set driver.
+ (bf537_stamp_bus_new): Call bf537_stamp_bus_new_1 and
+ set driver here.
+ (bf537_ezkit_bus_new): Likewise.
+ (bf527_ezkit_bus_new): Likewise.
+ (bf537_ezkit_bus): Replace bf537_stamp_bus_new with
+ bf537_ezkit_bus_new.
+ (bf527_ezkit_bus_printinfo): New.
+ (bf527_ezkit_bus): Define.
+ * src/bus/buses.c (bus_drivers[]): Add bf527_ezkit_bus.
+ * src/bus/buses.h (bf527_ezkit_bus): Declare.
+ * src/bus/Makefile.am (libbus_a_SOURCES): Add bf537_stamp.c
+ if ENABLE_BUS_BF527_EZKIT. Allow ENABLE_BUS_BF537_EZKIT
+ independent on ENABLE_BUS_BF537_STAMP.
+ * configure.ac: Add bf527_ezkit.
+ * data/Makefile.am (nobase_dist_pkgdata_DATA): Add
+ analog/bf527c/STEPPINGS and analog/bf527c/bf527c.
+ * data/analog/bf527c/bf527c: New file.
+ * data/analog/bf527c/STEPPINGS: New file.
+ * data/analog/PARTS: Add bf527c.
+
+2008-04-09 Michael Hennerich <michael.hennerich@analog.com>
+
+ * data/analog/bf537/STEPPINGS: Add stepping 3.
+
+2008-04-08 Arnim Laeuger <arniml>
+
+ * src/bsdl/bsdl_flex.l (bsdl_flex_deinit): close file if still open
+
+2008-04-08 Kolja Waschk <kawk>
+
+ * src/cmd/idcode.c: [ 1936543 ] Check for set-up cable in idcode (U.Bonnes)
+
+2008-04-05 Kolja Waschk <kawk>
+
+ * src/tap/cable/usbblaster.c: [ 1934843 ] Fix for USBBLASTER (U.Bonnes)
+ * src/jtag.c: [ 1933141 ] Don't add duplicate history lines (U.Bonnes)
+
+2008-04-03 Kolja Waschk <kawk>
+
+ * src/jtag.c: Optionally use JTAG_PROMPT environment setting for
+ prompt instead of "jtag>" (by Mike Frysinger)
+
+ * include/jtag.h, src/cmd/jtag_data_dir.c, src/cmd/include.c,
+ src/cmd/Makefile.am, src/bsdl/Makefile.am, src/bsdl/bsdl_flex.l,
+ src/lib/make-relative-prefix.c, src/lib/safe-ctype.h,
+ src/lib/lbasename.c, src/lib/Makefile.am, src/lib/filenames.h,
+ src/lib/lrealpath.c, src/jtag.c, configure.ac:
+ [ 1916428 ] support runtime-relocatable urjtag (by Mike Frysinger)
+
+ * include/jtag.h, src/cmd/cmd.c, src/cmd/idcode.c, src/cmd/Makefile.am,
+ src/tap/parport/ftdi.c, src/tap/idcode.c, src/tap/Makefile.am, THANKS:
+ [ 1933730 ] new "idcode" command (by Uwe Bonnes)
+
+2008-04-03 Arnim Laeuger <arniml>
+
+ [ 1929235 ] Use less global and static variables:
+ * src/bus/jopcyc.c, src/bus/zefant-xs3.c: made global variable
+ last_address local
+ * src/svf/svf.c, src/svf/svf.h: support reentrant parser and scanner
+ * src/svf/svf_bison.y: provisions for reentrant parser
+ * src/svf/svf_flex.l: made scanner reentrant
+ * src/svf/Makefile.am: removed command line options for
+ bison and flex
+ * configure.ac: require flex 2.5.33 also for SVF scanner
+ * doc/UrJTAG.txt: document flex version for SVF scanner
+
+2008-04-02 Arnim Laeuger <arniml>
+
+ [ 1929235 ] Use less global and static variables:
+ * src/bsdl/bsdl.c, src/cmd/bsdl.c: use globals from chain_t
+ * src/tap/chain.c (chain_alloc): init BSDL globals
+ * include/chain.h: added bsdl_globs_t to chain_t
+ * include/bsdl.h: defined structure for BSDL globals
+ * src/bsdl/Makefile.am, src/bsdl/bsdl_sem.c, src/bsdl/bsdl_flex.l,
+ src/bsdl/bsdl_bison.y, src/bsdl/bsdl.c, src/bsdl/bsdl_local.h:
+ renamed bsdl.h to bsdl_local.h
+
+2008-04-01 Arnim Laeuger <arniml>
+
+ [ 1887221 ] Add configure switch to disable all cable&parport drivers:
+ * doc/UrJTAG.txt: updates for new options and summary reporting
+ * src/tap/parport.c: reworked driver referencing based on
+ ENABLE_PARPORT_* macros
+ * src/tap/cable.c: reworked driver referencing based on
+ ENABLE_CABLE_* macros
+ * src/tap/Makefile.am (libtap_a_SOURCES): include sources based on
+ ENABLE_CABLE_* and ENABLE_PARPORT_* macros
+ * src/bus/buses.c: reference bus drivers based on ENABLE_BUS_* macros
+ * src/bus/buses.h: sorted sequence of extern declarations
+ * src/bus/Makefile.am (libbus_a_SOURCES): include sources based on
+ ENABLE_BUS_* macros
+ * src/Makefile.am (jtag_LDADD): moved -lcmd to top of list to prevent
+ linker error for --enable-cable=jim
+ * configure.ac: added switches --enable-bus, --enable-cable and enable-parport
+ removed (superseeded) --enable-jim and --enable-ep9307
+
+2008-03-26 Kolja Waschk <kawk>
+
+ * src/flash/amd.c: Fix address shift (Jeff Wittrock)
+
+2008-03-15 Jie Zhang <jie.zhang@analog.com>
+
+ * include/jtag.h (jtag_parse_line): Declare.
+ (jtag_parse_stream): Declare.
+ * src/discovery.c: Move ...
+ * src/tap/discovery.c: ... here.
+ * src/detect.c: Move ...
+ * src/tap/detect.c: ... here.
+ * src/tap/Makefile.am (libtap_a_SOURCES): Add detect.c and
+ discovery.c.
+ * src/readmem.c: Move ...
+ * src/bus/readmem.c: ... here.
+ * src/writemem.c: Move ...
+ * src/bus/writemem.c: ... here.
+ * src/bus/Makefile.am (libbus_a_SOURCES): Add readmem.c and
+ writemem.c.
+ * src/flash.c: Move ...
+ * src/flash/flash.c: ... here.
+ * src/flash/Makefile.am (libflash_a_SOURCES): Add flash.c.
+ * src/jtag.c (get_token, jtag_parse_line, jtag_parse_stream,
+ jtag_parse_file): Move to ...
+ * src/cmd/parse.c: ... here.
+ * src/cmd/Makefile.am (libbus_a_SOURCES): Add parse.c.
+ * src/Makefile.am (jtag_SOURCES): Remove detect.c, discovery.c,
+ readmem.c, writemem.c and flash.c.
+ (jtag_LDADD): Add -ltap and -lflash one more time to resolve
+ undefined references.
+
+ * po/POTFILES.in: Update according to the changes above.
+ * po/fr.po, po/rw.po, po/sk.po: Update.
+
+2008-03-14 Arnim Laeuger <arniml>
+
+ * configure.ac: format AC_ARG_ENABLE help with AS_HELP_STRING macro
+
+2008-03-13 Kolja Waschk <kawk>
+
+ * po/POTFILES.in: Sorted and updated to fix [1904952] Missing xpcu_pp.c
+ prevents "make urjtag.pot-update"
+ * po/fr.po, po/rw.po, po/sk.po: Updated
+
+2008-03-10 Arnim Laeuger <arniml>
+
+ [ 1911429 ] Read TDO data from instruction shift:
+ * doc/UrJTAG.txt: removed note about SIR deficiency
+ * src/svf/svf.c (svf_sxr): request TDO capture for SIR when command specifies TDO paramters
+ * src/tap/chain.c (chain_shift_instructions_mode): use defered shifting and capture TDO
+ output when requested
+ * src/part/instruction.c (instruction_alloc): allocate tap_register out
+ * include/chain.h: parameter capture_output added to chain_shift_instructions_mode()
+ * include/instruction.h: tap_register out added
+
+2008-03-03 Arnim Laeuger <arniml>
+
+ * src/tap/parport/ftd2xx.c (ftd2xx_mpsse_open): fix FT_SetChar() parameters
+ * doc/UrJTAG.txt: fix some typos
+
+2008-03-01 Arnim <arniml>
+
+ * src/tap/parport/ftdi.c (ftdi_mpsse_open): rework sequence to fix
+ a system that shows similar hangs as reported in
+ [ 1904970 ] JTAG operations hang with libftdi
+ * src/tap/parport/ftd2xx.c (ftd2xx_mpsse_open): align with ftdi.c
+
+2008-03-01 Kolja Waschk <kawk>
+
+ * src/tap/cable/jlink.c: Added VREF detection and a call to usb_reset()
+ when cable initialization failed
+ * src/tap/cable/xpc.c: Implemented much faster access method using GPIF
+ transfers via vendor request 0xA6. Reportedly works with DLC9 now.
+
+2008-02-28 Kolja Waschk <kawk>
+
+ * doc/UrJTAG.txt: Concretized list of supported USB cables.
+ * src/detect.c: Use "include" internally instead of "script", avoid errmsg
+
+2008-02-27 Kolja Waschk <kawk>
+
+ * src/tap/cable/generic.c (generic_flush_one_by_one): Always flush,
+ don't let the queue grow unnecessarily.
+
+2008-02-27 Jie Zhang <jie.zhang@analog.com>
+
+ * include/bus.h: Don't include chain.h.
+ * include/svf.h: Include chain.h.
+ (svf_run): Add a parameter to pass chain.
+ * include/cmd.h: Include chain.h.
+ (cmd_t): Add a parameter to pass chain for run.
+ (cmd_run, cmd_test_cable): Add a parameter to pass chain.
+ * include/bus_driver.h: Include chain.h.
+ (struct bus_driver): Add a parameter to pass chain for new_bus.
+ * include/bsdl.h: Include chain.h
+ (bsdl_read_file, bsdl_scan_files): Add a parameter to pass chain.
+ * include/jtag.h (chain): Don't declare.
+ (jtag_parse_file): Add a parameter to pass chain.
+ * src/bsdl/bsdl.c (bsdl_read_file): Add a parameter to pass chain.
+ Initialize parser_priv->jtag_ctrl.chain.
+ (bsdl_scan_files): Add a parameter to pass chain.
+ * src/bsdl/bsdl_sem.c (bsdl_set_instruction_length): Call cmd_run
+ with priv->jtag_ctrl.chain.
+ * src/bsdl/bsdl.h (struct jtag_ctrl): Add chain field.
+ * src/detect.c (detect_parts): Pass chain to bsdl_scan_files
+ and cmd_run.
+ * src/bus/bf548_ezkit.c (bf548_ezkit_bus_new): Add a parameter to
+ pass chain.
+ * src/bus/fjmem.c (fjmem_bus_new): Likewise.
+ * src/bus/ppc405ep.c (ppc405ep_bus_new): Likewise.
+ * src/bus/sh7727.c (sh7727_bus_new): Likewise.
+ * src/bus/prototype.c (prototype_bus_new): Likewise.
+ * src/bus/sa1110.c (sa1110_bus_new): Likewise.
+ * src/bus/ppc440gx_ebc8.c (ppc440gx_ebc8_bus_new): Likewise.
+ * src/bus/tx4925.c (tx4925_bus_new): Likewise.
+ * src/bus/sh7750r.c (sh7750r_bus_new): Likewise.
+ * src/bus/pxa2x0.c (pxa2x0_bus_new): Likewise.
+ (pxa27x_bus_new): Likewise.
+ * src/bus/bf533_stamp.c (bf533_stamp_bus_new): Likewise.
+ * src/bus/bf533_ezkit.c (bf533_ezkit_bus_new): Likewise.
+ * src/bus/bf537_stamp.c (bf537_stamp_bus_new): Likewise.
+ * src/bus/ixp425.c (ixp425_bus_new): Likewise.
+ * src/bus/h7202.c (h7202_bus_new): Likewise.
+ * src/bus/zefant-xs3.c (zefant_xs3_bus_new): Likewise.
+ * src/bus/bcm1250.c (bcm1250_bus_new): Likewise.
+ * src/bus/sharc21065l.c (sharc_21065L_bus_new): Likewise.
+ * src/bus/au1500.c (au1500_bus_new): Likewise.
+ * src/bus/lh7a400.c (lh7a400_bus_new): Likewise.
+ * src/bus/sh7751r.c (sh7751r_bus_new): Likewise.
+ * src/bus/mpc5200.c (mpc5200_bus_new): Likewise.
+ * src/bus/jopcyc.c (jopcyc_bus_new): Likewise.
+ * src/bus/slsup3.c (slsup3_bus_new): Likewise.
+ * src/bus/bf561_ezkit.c (bf561_ezkit_bus_new): Likewise.
+ * src/bus/s3c4510x.c (s3c4510_bus_new): Likewise.
+ * src/bus/ejtag.c (ejtag_bus_new): Likewise.
+ * src/bus/mpc824x.c (mpc824x_bus_new): Likewise.
+ (mpc824x_bus_write): Change chain to CHAIN.
+ * src/svf/svf.c (yyparse): Add a parameter to pass chain. And update
+ all call sites.
+ (svf_force_reset_state): Likewise.
+ (svf_goto_state): Likewise.
+ (svf_frequency): Likewise.
+ (svf_runtest): Likewise.
+ (svf_state): Likewise.
+ (svf_sxr): Likewise.
+ (svf_trst): Likewsie.
+ (svf_run): Likewise.
+ * src/svf/svf_bison.y (yyerror): Update declaration and call sites.
+ (chain): %parse-param.
+ * src/svf/svf.h: Include chain.h and update function declarations.
+ * src/cmd/endian.c (cmd_endian_run): Add a parameter to pass chain.
+ And update all call sites.
+ * src/cmd/frequency.c (cmd_frequency_run): Likewise.
+ * src/cmd/part.c (cmd_part_run): Likewise.
+ * src/cmd/salias.c (cmd_salias_run): Likewise.
+ * src/cmd/instruction.c (cmd_instruction_run): Likewise.
+ * src/cmd/quit.c (cmd_quit_run): Likewise.
+ * src/cmd/register.c (cmd_register_run): Likewise.
+ * src/cmd/debug.c (cmd_debug_run): Likewise.
+ * src/cmd/flashmem.c (cmd_flashmem_run): Likewise.
+ * src/cmd/svf.c (cmd_svf_run): Likewise.
+ * src/cmd/peekpoke.c (cmd_peek_run): Likewise.
+ (cmd_poke_run): Likewise.
+ * src/cmd/cmd.c (cmd_test_cable): Likewise.
+ (cmd_run): Likewise.
+ * src/cmd/dr.c (cmd_dr_run): Likewise.
+ * src/cmd/cable.c (cmd_cable_run): Likewise.
+ * src/cmd/shell.c (cmd_shell_run): Likewise.
+ * src/cmd/discovery.c (cmd_discovery_run): Likewise.
+ * src/cmd/detect.c (cmd_detect_run): Likewise.
+ * src/cmd/readmem.c (cmd_readmem_run): Likewise.
+ * src/cmd/signal.c (cmd_signal_run): Likewise.
+ * src/cmd/shift.c (cmd_shift_run): Likewise.
+ * src/cmd/initbus.c (cmd_initbus_run): Likewise.
+ * src/cmd/eraseflash.c (cmd_eraseflash_run): Likewise.
+ * src/cmd/bit.c (cmd_bit_run): Likewise.
+ * src/cmd/get.c (cmd_get_run): Likewise.
+ * src/cmd/test.c (cmd_test_run): Likewise.
+ * src/cmd/reset.c (cmd_reset_run): Likewise.
+ * src/cmd/include.c (cmd_include_or_script_run): Likewise.
+ (cmd_include_run): Likewise.
+ (cmd_script_run): Likewise.
+ * src/cmd/bsdl.c (cmd_bsdl_run): Likewise.
+ * src/cmd/scan.c (cmd_scan_run): Likewise.
+ * src/cmd/detectflash.c (cmd_detectflash_run): Likewise.
+ * src/cmd/help.c (cmd_help_run): Likewise.
+ * src/cmd/writemem.c (cmd_writemem_run): Likewise.
+ * src/cmd/bus.c (cmd_bus_run): Likewise.
+ * src/cmd/set.c (cmd_set_run): Likewise.
+ * src/cmd/print.c (cmd_print_run): Likewise.
+ * src/jtag.c (chain): Don't define.
+ (jtag_parse_line): Add a parameter to pass chain.
+ And update all call sites.
+ (jtag_readline_multiple_commands_support): Likewise.
+ (jtag_readline_loop): Likewise.
+ (jtag_parse_stream): Likewise.
+ (jtag_parse_file): Likewise.
+ (jtag_parse_rc): Likewise.
+ (cleanup): Likewise.
+ (main): Define a local chain.
+
+2008-02-26 Arnim Laeuger <arniml>
+
+ * src/tap/cable/ft2232.c (send_and_receive): loopback_off moved to ftdi.c/ftd2xx.c
+ * src/tap/parport/ftd2xx.c (ftd2xx_mpsse_open): set TCK, loopback_off, reset, purge
+ * src/tap/parport/ftdi.c (ftdi_mpsse_open): set TCK, loopback_off, reset, purge
+
+2008-02-24 Mike Frysinger <vapier>
+
+ * src/jtag.c: allow people to disable startup message (1901877),
+ quit upon EOF (1901880)
+
+2008-02-25 Arnim Laeuger <arniml>
+
+ * src/bus/fjmem.c (fjmem_bus_new): accept 'len' parameter to suppress
+ data register length detection
+
+2008-02-25 Kolja Waschk <kawk>
+
+ * include/usbconn/libusb.h, src/tap/cable/jlink.c: J-Link driver
+ doesn't use global variables anymore
+
+2008-02-25 Jie Zhang <jie.zhang@analog.com>
+
+ * src/bus/buses.c (bus_drivers): bf548_ezkit_bus.
+ * src/bus/buses.h: Declare bf548_ezkit_bus.
+
+ * include/flash/cfi.h (MAJOR_VERSION_OFFSET): New macro.
+ (MAJOR_VERSION_OFFSET): New macro.
+ (MINOR_VERSION_OFFSET): New macro.
+ (ADDRESS_SENSITIVE_UNLOCK_OFFSET): New macro.
+ (ERASE_SUSPEND_OFFSET): New macro.
+ (SECTOR_PROTECT_OFFSET): New macro.
+ (SECTOR_TEMPORARY_UNPROTECT_OFFSET): New macro.
+ (SECTOR_PROTECT_SCHEME_OFFSET): New macro.
+ (SIMULTANEOUS_OPERATION_OFFSET): New macro.
+ (BURST_MODE_TYPE_OFFSET): New macro.
+ (PAGE_MODE_TYPE_OFFSET): New macro.
+ (ACC_MIN_OFFSET): New macro.
+ (ACC_MAX_OFFSET): New macro.
+ (TOP_BOTTOM_SECTOR_FLAG_OFFSET): New macro.
+ (PROGRAM_SUSPEND_OFFSET): New macro.
+ (UNLOCK_BYPASS_OFFSET): New macro.
+ (SECSI_SECTOR_SIZE_OFFSET): New macro.
+ (EMBEDDED_HWRST_TIMEOUT_MAX_OFFSET): New macro.
+ (NON_EMBEDDED_HWRST_TIMEOUT_MAX_OFFSET): New macro.
+ (ERASE_SUSPEND_TIMEOUT_MAX_OFFSET): New macro.
+ (PROGRAM_SUSPEND_TIMEOUT_MAX_OFFSET): New macro.
+ (BANK_ORGANIZATION_OFFSET): New macro.
+ (BANK_REGION_INFO_OFFSET): New macro.
+ (struct amd_pri_extened_query_structure): Define.
+ (amd_pri_extened_query_structure_t): Typedef.
+ * src/flash/cfi.c (cfi_array_free): Free primary vendor table.
+ (cfi_detect): Detect AMD CFI primary vendor-specific extended
+ query table. Reverse the order of erase block region information
+ for top boot devices.
+ * src/flash/detectflash.c (detectflash): Print out information
+ of AMD CFI primary vendor-specific extended query table.
+
+2008-02-24 Kolja Waschk <kawk>
+
+ * include/cable.h, include/usbconn.h, include/usbconn/libusb.h,
+ src/tap/cable.c, src/tap/usbconn/libusb.c, src/tap/parport.c,
+ src/tap/usbconn.c, src/tap/Makefile.am: Merged code from usb_abstraction
+ branch, adding a "usbconn" link driver (similar to the existing
+ parport link driver) for USB cables.
+
+ * src/tap/cable/generic_parport.c, src/tap/cable/generic_parport.h,
+ src/tap/cable/generic_usbconn.h, src/tap/cable/generic_usbconn.c,
+ src/tap/cable/generic.c, src/tap/cable/generic.h: Separated link-specific
+ code from generic.c into addition source files for parport and usbconn
+
+ * src/tap/cable/wiggler.c, src/tap/cable/arcom.c, src/tap/cable/mpcbdm.c,
+ src/tap/cable/usbblaster.c, src/tap/cable/jlink.c, src/tap/cable/ea253.c,
+ src/tap/cable/vision_ep9307.c, src/tap/cable/triton.c, src/tap/cable/ei012.c,
+ src/tap/cable/byteblaster.c, src/tap/cable/wiggler2.c, src/tap/cable/dlc5.c,
+ src/tap/cable/ft2232.c, src/tap/cable/keithkoep.c, src/tap/cable/lattice.c:
+ Small modifications to adapt to the changes in cable.h and generic.h
+
+ * src/tap/cable/xpc.c, src/tap/parport/xpcu_pp.c, src/tap/parport/xpcu_common.c:
+ Xilinx Platform Cable USB driver now based on usbconn link driver
+
+ * src/tap/cable/jlink.c: New driver for Segger J-Link, Atmel SAM-ICE etc.
+ based on usbconn link driver
+
+ * doc/UrJTAG.txt: Added section about link drivers
+
+2008-02-24 Eugene Boldenkov <eugene_b>
+
+ * src/bus/mpc824x.c: Add 32-bit bus support (1900847)
+
+2008-02-24 Mike Frysinger <vapier>
+
+ * configure.ac: Fix building out of tree (1899908), only use libusb flags
+ as needed (1899930), provide flag about wchar.h presence (1899922)
+ * src/cmd/print.c: Fix dependency on wchar.h (1899922)
+
+2008-02-23 Arnim Laeuger <arniml>
+
+ * extra/fjmem/README: new file
+ * doc/UrJTAG.txt: mention fjmem driver, document bus driver internals
+ * src/svf/Makefile.am (svf_flex.o svf.o): fix dependencies to svf_bison.h
+ * src/bsdl/Makefile.am (bsdl_flex.o bsdl_sem.o): fix dependencies to bsdl_bison.h
+ -> resolves [ 1899911 ]
+ * src/tap/cable/ft2232.c (send_and_receive): only flush if not TO_OUTPUT
+ * src/tap/chain.c (chain_shift_data_registers_mode): flush TO_OUTPUT instead
+ of CONSERVATIVELY
+ * src/tap/cable.c (cable_flush), include/cable.h (enum): removed CONSERVATIVELY
+ * configure.ac: conservative-flush removed
+
+2008-02-21 Arnim Laeuger <arniml>
+
+ * src/tap/parport/ftdi.c (ftdi_mpsse_open): set latency timer to 16ms
+ * src/tap/parport/ftd2xx.c (ftd2xx_mpsse_open): set latency timer to 16ms
+ * src/tap/cable/ft2232.c (send_and_receive): issue SEND_IMMEDIATE command
+ when receive bytes were scheduled
+ * src/bsdl/bsdl_bison.y, src/bsdl/bsdl.h, src/bsdl/bsdl_flex.l, src/bsdl/bsdl.c:
+ push mode and debug through init tree to avoid error message from scanner
+ in simple test mode.
+ * src/bus/fjmem.c: merged branches/jmem to trunk
+ -> added fjmem bus driver
+
+2008-02-20 Arnim Laeuger <arniml>
+
+ * data/Makefile.am (nobase_dist_pkgdata_DATA): added bsdl/STD_1149_1_2001
+
+2008-02-20 Kolja Waschk <kawk>
+
+ Version 0.8 released.
+
+2008-02-20 Kolja Waschk <kawk>
+
+ * po/fr.po, po/sk.po, po/rw.po, POTFILES.in: Regenerated or updated
+
+2008-02-19 Arnim Laeuger <arniml>
+
+ * src/bsdl/bsdl_flex.l (bsdl_flex_set_bin_x), src/bsdl/bsdl.h,
+ src/bsdl/bsdl_bison.y (Init_Text): properly support COMPLIANCE_PATTERNS
+ -> fix for [ 1896382 ]
+
+2008-02-18 Arnim Laeuger <arniml>
+
+ * src/bsdl/bsdl.c, src/bsdl/bsdl_flex.l, src/bsdl/bsdl_bison.y,
+ src/bsdl/bsdl.h, src/bsdl/bsdl_sem.c: support quiet scanning of files
+ in include.c
+ * src/cmd/include.c (cmd_include_run): check and read file if it's BSDL
+ syntax -> [ 1895936 ]
+ * doc/UrJTAG.txt: add note about BSDL support in 'include'
+
+2008-02-18 Kolja Waschk <kawk>
+
+ * doc/UrJTAG.txt: How to use initbus (and ejtag/prototype bus driver)
+ and some other smaller updates in the "commands" section. Also
+ added note about unsupported spiflash* commands, and about now
+ obsolete script command (see below)
+ * Merged src/script.c into src/include.c. The command looks for the
+ specified file in the repository if it's neither an absolute path
+ nor begins with ./ or ../, otherwise it uses the filename as is.
+ When called as "script", the command behaves as before but emits
+ a warning that "include" should be used in future.
+
+2008-02-17 Arnim Laeuger <arniml>
+
+ * configure.ac: check for pre-generated src/svf/svf_flex.c
+ -> second part of [ 1895353 ]
+ * src/bsdl/Makefile.am (noinst_HEADERS): bsdl_sysdep.h added for proper
+ release packing -> first part of [ 1895353 ]
+
+2008-02-17 Kolja Waschk <kawk>
+
+ * doc/UrJTAG.txt: How to use USB cables. THANKS: some additions
+ * include/Makefile.am: Add jim.h and jim/some_cpu.h headers for distr.
+
+2008-02-16 Arnim Laeuger <arniml>
+
+ * src/tap/cable/ft2232.c (ft2232_flush): fix inconsistency of TDO caching
+ in ft2232_flush()
+ * THANKS: to the original SVF and BSDL parser programmers
+ * src/tap/cable/ft2232.c (ft2232_generic_init, ft2232_jtagkey_init, ft2232_armusbocd_init):
+ initialize mpsse frequency via ft2232_set_frequency()
+
+2008-02-16 Kolja Waschk <kawk>
+
+ * src/jtag.c, src/tap/chain.c, include/chain.h: Always flush immediately
+ after each command when used interactively
+ * src/cmd/scan.c, src/cmd/Makefile.am, src/cmd/cmd.c: Implemented basic
+ boundary "scan" command to detect changes on input pins; tested with
+ an (completely erased) Actel ProASIC3 A3P125
+ * src/svf/svf.c: Small fix for computation of run_count from min_time
+ * doc/UrJTAG.txt: Updated doc about building with FTD2XX in Cygwin
+ * src/tap/cable.c, include/cable.h, src/tap/cable/*.c (all drivers):
+ moved cable_set_frequency functionality from cable.c to the cable
+ drivers, to fix [ 1836319 ] Delay loop calibration takes ages
+ * src/tap/cable.c: Include ftdi-based cable drivers if either libftdi or
+ FTDI's FTD2XX (CDM) drivers are present (--with-ftd2xx)
+ * src/flash/Makefile.am, src/flash/jedec_exp.c, src/flash/detectflash.c,
+ configure.ac: Experimental new code for flash detection, to be enabled
+ during configuration with --enable-jedec-exp (disabled by default)
+ * src/bus/s3c4510x.c: disable debug output (was enabled in 929..), do a
+ chain_shift_data_registers before trying to read b0size (fixes the
+ old problem of B0SIZE unknown, needed for proper flash detection)
+ * include/register.h, src/tap/register.c, src/discovery.c: report if tdo
+ seems to be stuck during detect_register_size (ie. "detect").
+
+2008-02-14 Arnim Laeuger <arniml>
+
+ * src/tap/cable.c (cable_flush), src/tap/chain.c (chain_shift_data_registers_mode),
+ include/cable.h, configure.ac: follow conservative flush strategy for transfers
+ without output capture (if not disabled via configure --disable-conservative-flush)
+
+2008-02-14 Kolja Waschk <kawk>
+
+ * src/tap/chain.c: Enabled the new^2 implementation in tap_shift_register
+ (which was implemented 2008-02-03 but not proven (now it is...))
+
+2008-02-14 Jie Zhang <jie.zhang@analog.com>
+
+ * src/bus/bf537_stamp.c: New.
+ * src/bus/bf548_ezkit.c: New.
+ * src/bus/bf561_ezkit.c: New.
+ * src/bus/buses.c (bus_drivers): Add bf537_stamp_bus,
+ bf537_ezkit_bus, and bf561_ezkit_bus.
+ * src/bus/buses.h: Declare bf537_stamp_bus, bf537_ezkit_bus,
+ and bf561_ezkit_bus.
+ * src/bus/Makefile.am (libbus_a_SOURCES): Add bf537_stamp.c,
+ bf548_ezkit.c, and bf561_ezkit.c.
+ * data/analog/bf533/STEPPINGS: Add stepping 4.
+ * data/analog/bf537/bf537: New.
+ * data/analog/bf537/STEPPINGS: New.
+ * data/analog/bf549/bf549: New.
+ * data/analog/bf549/STEPPINGS: New.
+ * data/analog/bf561/bf561: New.
+ * data/analog/bf561/STEPPINGS: New.
+ * data/analog/PARTS: Add bf537, bf549, and bf561.
+ * data/Makefile.am (nobase_dist_pkgdata_DATA): Add
+ analog/bf537/STEPPINGS, analog/bf537/bf537,
+ analog/bf549/STEPPINGS, analog/bf549/bf549,
+ and analog/bf561/STEPPINGS, analog/bf561/bf561.
+
+2008-02-13 Arnim Laeuger <arniml>
+
+ * src/tap/cable/ft2232.c: implemented control of TRST
+ second step of
+ [ 1891845 ] Add support for TRST/SRST/LEDs to FT2232 cable driver
+
+2008-02-12 Arnim Laeuger <arniml>
+
+ * src/tap/cable/ft2232.c: statically set GPIO high byte with product-specific values
+ first step of
+ [ 1891845 ] Add support for TRST/SRST/LEDs to FT2232 cable driver
+
+2008-02-11 Arnim Laeuger <arniml>
+
+ * src/bsdl/bsdl_bison.y (Store_Text): removed function Make_String()
+ the QUOTED_STRING is directly copied to buffer_for_switch
+ * src/bsdl/bsdl.h: memeber String_Val of parser_priv obseleted
+
+2008-02-10 Arnim Laeuger <arniml>
+
+ * src/tap/cable/ft2232.c (ft2232_generic_init, ft2232_jtagkey_init)
+ (ft2232_armusbocd_init, ft2232_transfer_schedule): store low byte value and direction
+ information in param structure to enable "Set Data Bits Low Byte" commands in
+ non pod-specific functions.
+
+2008-02-10 Kolja Waschk <kawk>
+
+ * acinclude.m4, configure.ac: Use local copy of AC_PROG_SED macro (renamed
+ to ACI_PROG_SED) maintain compatibility with older autoconf; fixes
+ [1890192] - autogen.sh fails on AC_PROG_SED
+ * include/cable.h, src/tap/cable/usbblaster.c, src/tap/cable/generic.c,
+ src/tap/cable/generic.h, src/tap/cable/ft2232.c, src/tap/cable.c,
+ doc/UrJTAG.txt: Extended cable_flush() to take one extra argument
+ regarding the amount of items to flush (see UrJTAG.txt for doc),
+ * cable.c: possible fix and optional more verbose output (#ifdef VERBOSE)
+ for tracking down 1884952 Internal error (queue full)
+
+2008-02-09 Arnim Laeuger <arniml>
+
+ * src/tap/cable/ft2232.c (ft2232_transfer_schedule): ensure max number of bytes for
+ a single byte operation
+ * src/svf/svf.c (svf_sxr): avoid output capture in case TDO is not specified for SDR
+
+2008-02-07 Kolja Waschk <kawk>
+
+ * src/jtag.c, doc/jtag.1: Fix dropthrough to caller if -n was given
+ (fixes [1887179] reported by A.Dyer), add command line option "-i"
+ to run interactive mode even after executing commands from files
+
+2008-02-07 Arnim Laeuger <arniml>
+
+ * src/tap/cable/ft2232.c (ft2232_connect): check parport driver setting
+ and set maxrecv accordingly
+ (send_and_receive): fix problem with send suspend detection
+ * src/tap/parport/ftdi.c (ftdi_mpsse_open): decreased latency timer
+ (ftdi_flush_output): return error code from ftdi_write_data
+ * src/tap/parport/ftd2xx.c (ftd2xx_mpsse_open): decreased latency timer
+
+2008-02-05 Arnim Laeuger <arniml>
+
+ * src/tap/cable/ft2232.c: massive rewrite to support deferred transfers
+ initial version with clean queue handling
+
+2008-02-05 Kolja Waschk <kawk>
+
+ * src/tap/cable.c: cable_queue_add_item didn't always correct q->next_free,
+ and a memory leak in cable_defer_transfer was fixed [1884952].
+
+2008-02-04 Arnim Laeuger <arniml>
+
+ * src/tap/cable/ft2232.c (ft2232_flush): rework flush implementation to benefit from
+ queued deferred transfers
+
+2008-02-04 Kolja Waschk <kawk>
+
+ * configure.ac, src/tap/parport/xpcu_common.c, src/tap/parport_xpcu_pp.c,
+ doc/UrJTAG.txt: Minor fixes regarding bug [1875234] "Can't compile
+ UrJTAG with libusb on Cygwin"
+ * src/svf/svf.c: define SA_ONESHOT SA_RESETHAND, fixes bug [1875235]
+ (On older Cygwin, SA_ONESHOT isn't known)
+
+2008-02-03 Kolja Waschk <kawk>
+
+ * src/flash/amd.c: Not only bus width but also device geometry affects
+ the address shift ([1869650] Improve flash detection and support)
+ * src/tap/tap.c, src/tap/chain.c: Split tap_shift_register into two
+ halves, one that queues transfers, another that picks up the results.
+ ([1832990] Speed improvements for USB cables) esp. for long chains
+
+2008-02-02 Arnim Laeuger <arniml>
+
+ * src/bsdl/bsdl.h, src/bsdl/bsdl_flex.l: convert filename to uppercase
+ * src/bsdl/bsdl_sem.c (create_register): don't create a new register if it's already there
+ * data/bsdl/STD_1149_1_2001: dummy file for 2001 standard added
+ * src/cmd/print.c (cmd_print_run): accept longer data register name
+ * include/data_register.h (MAXLEN_DATA_REGISTER): increased to 32 for some BSDL files
+ * src/flash/amd.c (amdstatus): increase timeout count to address
+ [ 1882111 ] Timeout in amdstatus() too small
+
+2008-02-02 Kolja Waschk <kawk>
+
+ * src/tap/cable.c: Automatically resize JTAG activity queue if necessary
+ * doc/UrJTAG.txt: New section about current cable driver internals
+
+2008-02-01 Arnim Laeuger <arniml>
+
+ * src/tap/parport/ftd2xx.c (ftd2xx_pre_connect): fix compiler warning
+ * src/tap/cable/ft2232.c: cleanup
+ (ft2232_usbcable_help): mention ftd2xx-mpsse in cable help
+
+2008-02-01 Kolja Waschk <kawk>
+
+ * include/cable.h, include/chain.h, src/tap/chain.c, src/tap/tap.c,
+ src/tap/cable/wiggler.c, src/tap/cable/arcom.c, src/tap/cable/mpcbdm.c,
+ src/tap/cable/usbblaster.c, src/tap/cable/generic.c,
+ src/tap/cable/vision_ep9307.c, src/tap/cable/ea253.c,
+ src/tap/cable/triton.c, src/tap/cable/jim.c, src/tap/cable/byteblaster.c,
+ src/tap/cable/ei012.c, src/tap/cable/generic.h, src/tap/cable/ft2232.c,
+ src/tap/cable/wiggler2.c, src/tap/cable/keithkoep.c,
+ src/tap/cable/lattice.c, src/tap/cable/dlc5.c, src/tap/cable/xpc.c,
+ src/tap/cable.c: New functions to queue "deferred" JTAG activity.
+ New code in cable drivers to flush the activity queue, both generic
+ (for parport-based and new drivers) and optimized implementations
+ for FT2232-based cables (by Arnim Laeuger) and USB-Blaster (by me).
+ Result is a vast speed improvement at least for FT2232; this
+ implements [ 1832990 ] Speed improvements for USB cables
+
+2008-01-30 Arnim Laeuger <arniml>
+
+ * src/tap/tap.c (tap_reset): set instructions of all parts to BYPASS, fix
+ [ 1873260 ] Command 'reset' does not reset internal states
+ * src/part/part.c (parts_set_instruction): catch NULL pointer
+
+2008-01-25 Kolja Waschk <kawk>
+
+ * include/jim.h, src/jim/tap.c, intel_28f800b3.c, Makefile.am,
+ some_cpu.c: Code skeleton and alloc/free calls for actual parts
+ connected to JIM's some_cpu
+
+2008-01-24 Kolja Waschk <kawk>
+
+ * tap/cable/ft2232.c, tap/parport/ftdi.c, tap/cable.c: added support
+ for Amontec JTAGkey USB cable (submitted by Laurent Gauch - Amontec)
+
+2008-01-22 Arnim Laeuger <arniml>
+
+ * src/bsdl/bsdl_flex.l, src/bsdl/bsdl_bison.y,
+ data/bsdl/STD_1149_1_1990, data/bsdl/STD_1149_1_1994:
+ update header with link to source
+
+2008-01-21 Kolja Waschk <kawk>
+
+ * New JTAG declarations for MPC5241 (from kurobox.com, enh. 1869671)
+
+2008-01-21 Arnim Laeuger <arniml>
+
+ * src/bsdl/*: use gettext for message strings, removed trailing whitespace
+
+2008-01-20 Arnim Laeuger <arniml>
+
+ * src/bsdl/bsdl_bison.y, src/bsdl/bsdl_sem.c, src/bsdl/bsdl.h:
+ support multiple port names in one port definition
+ * src/bsdl/bsdl_bison.y, src/bsdl/bsdl_sem.c, src/bsdl/bsdl.h:
+ handle vectored ports correctly, part 1 of fix for
+ [ 1875737 ] Syntax errors/Port index warning parsing ATMEL BSDL files
+ * src/bsdl/bsdl_bison.y, src/bsdl/bsdl_sem.c, src/bsdl/bsdl_flex.l:
+ support OBSERVE_ONLY attribute in cell description (like input attribute)
+ part 2 of fix for
+ [ 1875737 ] Syntax errors/Port index warning parsing ATMEL BSDL files
+
+2008-01-20 Kolja Waschk <kawk>
+
+ * src/jim/some_cpu.c, src/jim/some_cpu.bsd: Added BSDL file for some_cpu
+ * src/jim/some_cpu.c, src/jim/some_cpu.bsd, README.jim: JIM can now be
+ accessed using the prototype bus driver and displays the given address,
+ data and enable signals; example script in README.jim
+ * src_jim/tap.c: Fixed TDI shift-in
+
+2008-01-19 Kolja Waschk <kawk>
+
+ * ChangeLog: whitespace cosmetics
+ * Makefile.am, configure.ac, jim/tap.c, jim/Makefile.am, jim/README.jim,
+ tap/cable/jim.c, tap/cable.c, tap/Makefile.am, jim/some_cpu.c,
+ include/jim.h, include/jim/some_cpu.h: JTAG target simulator "JIM"
+ and a "jim" cable driver to "connect" to it; detection already works.
+
+2008-01-18 Arnim Laeuger <arniml>
+
+ * configure.ac: restructured the test logic for bison error locations and
+ the BSDL subsystem [ 1873515 ] BSDL part doesn't compile under Cygwin
+
+2008-01-18 Kolja Waschk <kawk>
+
+ * Moved the code from libbrux/ subdirectory into appropriate locations in
+ our src/ subdirectory (Enhancement 1873220):
+
+ libbrux/cmd/help.c -> src/cmd/help.c
+ libbrux/cmd/quit.c -> src/cmd/quit.c
+ libbrux/cmd/cmd.c + src/cmd.c -> src/cmd/cmd.c
+ libbrux/cmd/cmd_detectflash.c -> src/cmd/detectflash.c
+ libbrux/flash + Makefile.am -> src/flash/
+
+ * Merged the header files from openwince "include" package, which were
+ previously moved in inclow/, into our final include/ directory, omitting
+ all the files that aren't actually used by UrJTAG (Enhancement 1873220):
+
+ common.h -> n/a (use bitmask.h!)
+ openwince.h (asm/C detection) -> n/a (use #ifdef __ASSEMBLY__)
+ openwince.h (bitmasks) -> bitmask.h
+ brux/cmd.h + cmd.h -> cmd.h
+ brux/cfi.h + brux/flash.h+flash.h -> flash.h
+ brux/bus.h -> bus_driver.h
+ std/mic.h -> flash/mic.h
+ device/flash/cfi.h -> flash/cfi.h
+ device/flash/intel.h -> flash/intel.h
+ arm/pxa2x0/mc.h -> src/bus/pxa2x0_mc.h
+
+2008-01-17 Kolja Waschk <kawk>
+
+ * UrJTAG.txt: Updates regarding Cygwin ioperm package and readline library
+ * src/jtag.c: Without readline library, informative output often
+ was printed after prompt, not before
+ * src/bus/s3c4510x.c: Address alignment on A0..Ax lines changes dynamically
+ with bus width
+
+2008-01-16 Arnim Laeuger <arniml>
+
+ * src/bus/prototype.c (prototype_bus_new): properly calculate the address
+ shift based on the current bus width
+
+2008-01-15 Arnim Laeuger <arniml>
+
+ * src/bus/prototype.c (prototype_bus_new): parameter amode added
+
+2008-01-11 Arnim Laeuger <arniml>
+
+ * src/bus/prototype.c: added
+
+2008-01-09 Arnim Laeuger <arniml>
+
+ * src/bus/h7202.c (h7202_bus_new): API extension
+
+2008-01-08 Arnim Laeuger <arniml>
+
+ * src/bus/prototype.c: new prototype bus driver (Detrick Martin)
+ * src/bus/zefant-xs3.c (zefant_xs3_bus_new): API extension: cmd_params for new_bus()
+ * src/bus/sharc21065l.c (sharc_21065L_bus_new): API extension
+ * src/bus/jopcyc.c (jopcyc_bus_new): API extension
+ * src/bus/tx4925.c (tx4925_bus_new): API extension
+ * src/bus/slsup3.c (slsup3_bus_new): API extension
+ * src/bus/sh7751r.c (sh7751r_bus_new): API extension
+ * src/bus/sh7750r.c (sh7750r_bus_new): API extension
+ * src/bus/sh7727.c (sh7727_bus_new): API extension
+ * src/bus/s3c4510x.c (s3c4510_bus_new): API extension
+ * src/bus/sa1110.c (sa1110_bus_new): API extension
+ * src/bus/pxa2x0.c (pxa2x0_bus_new): API extension
+ (pxa27x_bus_new): API extension
+ * src/bus/ppc405ep.c (ppc405ep_bus_new): API extension
+ * src/bus/ppc440gx_ebc8.c (ppc440gx_ebc8_bus_new): API extension
+ * src/bus/mpc5200.c (mpc5200_bus_new): API extension
+ * src/bus/mpc824x.c (mpc824x_bus_new): API extension
+ * src/bus/lh7a400.c (lh7a400_bus_new): API extension
+ * src/bus/ixp425.c (ixp425_bus_new): API extension
+ * src/bus/bf533_ezkit.c (bf533_ezkit_bus_new): API extension
+ * src/bus/bf533_stamp.c (bf533_stamp_bus_new): API extension
+ * src/bus/ejtag.c (ejtag_bus_new): API extension
+ * src/bus/bcm1250.c (bcm1250_bus_new): API extension
+ * src/bus/au1500.c (au1500_bus_new): API extension
+ * src/bus/Makefile.am (libbus_a_SOURCES): added prototype.c
+ * src/bus/buses.c: added prototype_bus (Detrick Martin)
+ * src/cmd/initbus.c (cmd_initbus_run): hand down command parameters to bus_new()
+
+2008-01-06 Arnim Laeuger <arniml>
+
+ * src/tap/cable/wiggler.c (wiggler_connect): enable bit<->pin mapping from parameter string
+ * src/tap/cable/wiggler.c: make std_wgl_map static
+
+2007-12-31 Arnim Laeuger <arniml>
+
+ * src/bsdl/Makefile.am (noinst_HEADERS): move headers to noinst_HEADERS
+ * include/Makefile.am (noinst_HEADERS): add bsdl.h to list of headers
+ * src/bsdl/Makefile.am (libbsdl_a_SOURCES): add bsdl.h to list of sources
+
+2007-12-30 Arnim Laeuger <arniml>
+
+ * src/detect.c (detect_parts): call bsdl_scan_file() if configure result indicates inclusion of BSDL subsystem
+ * src/cmd/cmd.c: include cmd_svf and cmd_bsdl based on configure result
+ * src/Makefile.am (jtag_DEPENDENCIES): link to libsvf.a and libbsdl.a based on configure result
+ * src/cmd/Makefile.am (libcmd_a_SOURCES): compile svf.c and bsdl.c based on configure result
+ * configure.ac: added --enable-svf and --enable-bsdl
+ * README.svf: contents moved to doc/UrJTAG.txt, file deleted
+ * data/Makefile.am (nobase_dist_pkgdata_DATA): fixed merge results
+ * many files: integration of BSDL parser
+ * data/xilinx/PARTS: added xc2v80-fg256,xc2v250-fg256,xc2v1000-fg256
+ '[ 1859678 ] jtag support for xilinx xc2v80-fg256, xc2v250, xc2v1000 FPGA' (Alexander Didebulidze)
+ * data/altera/ep1c12/ep1c12: CLAMP and HIGHZ instructions activated
+
+2007-12-29 Arnim Laeuger <arniml>
+
+ * data/altera/PARTS: ep2c8 added
+ '[ 1859032 ] jtag support for Altera EP2C8' (Hartley Sweeten)
+ * data/Makefile.am (nobase_dist_pkgdata_DATA): ep2c8 files added
+ '[ 1859032 ] jtag support for Altera EP2C8' (Hartley Sweeten)
+
+2007-12-27 Arnim Laeuger <arniml>
+
+ * src/cmd/print.c (cmd_print_run): applied patch:
+ '[ 1858985 ] possible fix to print the signal aliases' (Hartley Sweeten)
+
+2007-12-26 Kolja Waschk <kawk>
+
+ * tap/cable/vision_ep9307.c, tap/cable.c, tap/Makefile.am, configure.ac:
+ Integrated first modern (single-file w/o parport) cable driver
+ (1858709: EP9307 target specific cable driver, from Hartley Sweeten)
+
+2007-12-23 Kolja Waschk <kawk>
+
+ Version 0.7 released.
+
+2007-12-23 Kolja Waschk <kawk>
+
+ * NEWS: Summarized changes since fork from openwince CVS.
+ * configure.ac: Updated copyright information.
+
+2007-12-19 Kolja Waschk <kawk>
+
+ * tap/cable/*, tap/parport/xpcu_common.c, cmd/part.c, cmd/cable.c,
+ bus/pxa2x0.c, jtag.c: fix prototypes, include stdlib (thx Hartley)
+ * src/cmd/print.c: cast uint64_t to (long long unsigned) for %llu
+
+2007-12-18 Kolja Waschk <kawk
+
+ * configure.ac, src/tap/parport/*.c: include stropts.h only if
+ it's available (needed for uClinux and others; thanks Hartley)
+ * doc/UrJTAG.txt, src/jtag.txt: Cosmetics, Copyright
+ * src/tap/Makefile.am: include cable driver for USB Blaster and
+ FT2232-based cables if any of libftdi or ftd2xx is present
+
+2007-12-16 Kolja Waschk <kawk>
+
+ * jtag.c: Don't abort on invalid command line options
+ * configure.ac: Reorganized the libusb/libftdi detection.
+ * data/MANUFACTURERS: Change 11110000111 code to point to
+ "ARM" instead of Sharp to stop misdetection of other
+ (non-Sharp) chips which use ARM cores. See Bug 1837991.
+ * libbrux/amd/amd_flash.c: Fix for [1851777] segfault when
+ running detectflash
+ * include/setdevice.h, include/Makefile.am, src/detect.c,
+ src/cmd/setdevice.c, src/cmd/cmd.c, src/cmd/Makefile.am,
+ src/jtag.c, doc/UrJTAG.txt, libbrux/flash/amd_flash.c,
+ libbrux/setdevice.h, libbrux/Makefile.am: Removed code for
+ "setdevice" command and added some documentation how to get
+ along without it.
+
+2007-12-15 Kolja Waschk <kawk>
+
+ * configure.ac, tap/parport/parport.c, tap/parport/ppi.c,
+ tap/parport/direct.c: Adapted openwince patch by Daniel
+ O'Connor, [1235990] Add support for FreeBSD's ppi interface
+ (closes our copy of that tracker item, 1829585)
+ * src/cmd/cable.c, include/cable.h, src/tap/cable/*.c: Add
+ help function to every cable; temporarily allow old syntax
+ for cable command when used for parallel port cables
+ * data/intel/pxa270/STEPPINGS, src/bus/pxa2x0.c: Integrated two
+ patches from F. Rysanek, adding C5 stepping of PXA270 and a few
+ few functions that resolve the PXA270 address space into the 6
+ default nCS windows per 64MB. (Enhancement req. 1849493)
+ * cmd/part.c, cmd/setdevice.c, cmd/instruction.c, cmd/svf.c,
+ cmd/dr.c, cmd/initbus.c, cmd/test.c, part/part.c, libbrux/cmd/cmd.c,
+ libbrux/cmd/help.c: Make command string comparisons case-insensitive
+ (fixes 1845811 "Case sensitivity in shell")
+
+2007-12-14 Kolja Waschk <kawk>
+
+ * README, doc/UrJTAG.txt: pointer to http://www.urjtag.org
+ * configure.ac, src/Makefile.am, src/tap/parport/ftd2xx.c:
+ Changes to allow linking against FTDI FTD2XX in Cygwin, initial
+ support for --with-(libftdi|libusb|ftd2xx) configure options
+
+2007-12-13 Kolja Waschk <kawk>
+
+ * configure.ac: Run "svn info" with "-R" to get latest revision
+
+2007-12-12 Arnim Laeuger <arniml>
+
+ * data/Makefile.am (nobase_dist_pkgdata_DATA): add missing '\', fixes
+ [ 1849477 ] Missing \ in data/Makefile.ac
+
+2007-12-09 Kolja Waschk <kawk>
+
+ * configure.ac: Improve detection of flex version, get Subversion
+ revision from 1. svn info, or 2. ChangeLog, or 3. Revision tag,
+ auto-detect whether -lrt is needed
+ * src/svf/svf_flex.l: derive HAVE_MODERN_FLEX internally
+ * src/jtag.c: show version from config.h, compile without readline
+ * src/version.awk: not needed; SVN info now available in config.h
+ * src/Makefile.am: removed -lrt link and version.h target
+ * doc/UrJTAG.txt: Added info about libraries, ioperm, "setdevice" cmd
+
+2007-12-08 Kolja Waschk <kawk>
+
+ * include/Makefile.am, src/Makefile.am, src/svf/Makefile.am
+ configure.ac, libbrux/configure.ac: Mention more files to
+ ensure that dist tar.gz is complete; prevent installation
+ of inclow/ headers during "make install" on top level
+
+2007-12-07 Kolja Waschk <kawk>
+
+ * README: All info moved to doc/UrJTAG.txt
+ * README_21065L: Merged into doc/UrJTAG.txt
+ * doc/UrJTAG.xml, UrJTAG.txt: converted DocBook to asciidoc
+ * COPYING: GPLv2 added
+ * AUTHORS: Updated
+ * TODO: removed (we're using SourceForge trackers)
+
+2007-12-06 Kolja Waschk <kawk>
+
+ * ChangeLog: Import SVN commit messages from past month
+ * THANKS: Added all missing names (that I know of) of the people who
+ contributed the patches that have been integrated in the past weeks
+
+2007-12-05 Arnim Laeuger <arniml>
+
+ * src/jtag.c (main): Print build number based on version.h.
+ * src/Makefile.am (version.h): Added rules to generate version.h from ChangeLog's revision tag.
+
+2007-12-04 07:06 Kolja Waschk <kawk>
+
+ * include/cable.h, include/parport.h, src/cmd/cable.c,
+ src/tap/cable/generic.c, src/tap/cable/generic.h,
+ src/tap/parport/direct.c, src/tap/parport/ftd2xx.c,
+ src/tap/parport/ftdi.c, src/tap/parport/ppdev.c,
+ src/tap/parport/xpcu_pp.c: [1839040] Make "cable" command less
+ parport-centric. Changes "cable" command syntax!
+
+2007-12-03 12:18 Kolja Waschk <kawk>
+
+ * ChangeLog: added "Revision" keyword
+
+2007-12-02 17:56 Kolja Waschk <kawk>
+
+ * trunk/include, Makefile.am, configure.ac, inclow: openwince
+ "include" package moved into "jtag" (now named "inclow")
+
+2007-11-30 07:06 Kolja Waschk <kawk>
+
+ * README: update fixes [1837364] Install instructions wrong
+
+2007-11-28 22:42 Kolja Waschk <kawk>
+
+ * doc/bsdl2jtag.1, doc/jtag.1: Imported man pages from
+ openwince-jtag Debian package (w/permission from p2@debian)
+
+2007-11-28 20:20 Kolja Waschk <kawk>
+
+ * src/jtag.c: [ 1838018 ] "Forbid" to run JTAG tools with suid root
+
+2007-11-28 19:43 Kolja Waschk <kawk>
+
+ * src/jtag.c: [ 1839756 ] (openwince [972637]) add command line
+ options to jtag
+
+2007-11-28 00:13 Kolja Waschk <kawk>
+
+ * doc/UrJTAG.xml: Integrated text from Wiki pages from Ralf,
+ Incorporated README into UrJTAG.xml
+
+2007-11-27 22:06 Kolja Waschk <kawk>
+
+ * doc/UrJTAG.xml,doc-layout.txt: renamed top-level DocBook XML file
+
+2007-11-27 22:05 Kolja Waschk <kawk>
+
+ * doc/doc-layout.txt, doc/internals.xml: Include license text(s)
+ and internals.xml
+
+2007-11-27 21:01 Kolja Waschk <kawk>
+
+ * doc/gpl.dbk, doc/lgpl.dbk: Use version 2, not 3
+
+2007-11-27 20:56 Kolja Waschk <kawk>
+
+ * doc/fdl.xml, doc/gpl.dbk, doc/lgpl.dbk: Added license texts
+ (docbook) from www.gnu.org
+
+2007-11-26 14:01 Kolja Waschk <kawk>
+
+ * src/cmd/shell.c: Clean up fix for [1837985] "shell" command
+ causes segfault
+
+2007-11-25 22:49 Kolja Waschk <kawk>
+
+ * doc/doc-layout.txt: Converted to DocBook-XSL
+
+2007-11-25 14:45 Kolja Waschk <kawk>
+
+ * doc/doc-layout.txt: Layout draft for new, comprehensive
+ documentation...
+
+2007-11-25 13:08 Kolja Waschk <kawk>
+
+ * src/cmd/shell.c: Allow arbitrary number of arguments for "shell"
+ command (fix for [1837985] "shell" command causes segfault)
+
+2007-11-25 00:02 Arnim Laeuger <arniml>
+
+ * src/tap/parport/ftd2xx.c, src/tap/parport/ftdi.c: fix for '[
+ 1836616 ] Segfault/Memory corruption if USB device inaccessible'
+
+2007-11-23 19:52 Arnim Laeuger <arniml>
+
+ * configure.ac, src/svf/Makefile.am, src/svf/svf_bison.y,
+ src/svf/svf_flex.l: make SVF parser/lexer backwards compatible to
+ pre-2.5.31 flex
+ for those the error location feature is skipped in svf_flex.l
+
+2007-11-20 20:35 Arnim Laeuger <arniml>
+
+ * configure.ac, src/cmd/cable.c, src/tap/Makefile.am,
+ src/tap/cable/ft2232.c, src/tap/parport.c,
+ src/tap/parport/ftd2xx.c, src/tap/parport/ftdi.c: ftd2xx parport
+ driver added
+
+2007-11-18 13:38 Arnim Laeuger <arniml>
+
+ * configure.ac: add some messages to show configuration summary, to
+ be extended
+
+2007-11-17 21:39 Arnim Laeuger <arniml>
+
+ * src/cmd/cable.c: report cable usage for USB & FTDI based cables
+ only in case respective support is included
+
+2007-11-16 17:50 Arnim Laeuger <arniml>
+
+ * include/cable.h, include/chain.h, src/cmd/cable.c, src/svf/svf.c,
+ src/tap/Makefile.am, src/tap/cable.c, src/tap/cable/arcom.c,
+ src/tap/cable/byteblaster.c, src/tap/cable/dlc5.c,
+ src/tap/cable/ea253.c, src/tap/cable/ei012.c,
+ src/tap/cable/ft2232.c, src/tap/cable/generic.c,
+ src/tap/cable/keithkoep.c, src/tap/cable/lattice.c,
+ src/tap/cable/mpcbdm.c, src/tap/cable/triton.c,
+ src/tap/cable/usbblaster.c, src/tap/cable/wiggler.c,
+ src/tap/cable/wiggler2.c, src/tap/cable/xpc.c, src/tap/chain.c,
+ src/tap/parport.c, src/tap/parport/ftdi.c, src/tap/tap.c: merged
+ changes from /branches/ft2232_eval@770
+ this is the initial stable version of the ft2232 cable driver
+
+2007-11-13 23:09 Arnim Laeuger <arniml>
+
+ * src/flash.c: removed obsolete declaration of amd_detect()
+
+2007-11-13 08:07 Kolja Waschk <kawk>
+
+ * configure.ac, src/tap/Makefile.am, src/tap/cable.c: Fix [ 1828368 ]
+ Compilation fails without libusb/libftdi
+
+2007-11-10 17:17 Kolja Waschk <kawk>
+
+ * data/Makefile.am, data/lattice/PARTS,
+ data/lattice/lc4128c-tqfp100,
+ data/lattice/lc4128c-tqfp100/STEPPINGS,
+ data/lattice/lc4128c-tqfp100/lc4128c-tqfp100: [ 1105256 ] jtag
+ descriptor for Lattice LC4032V-TQFP100
+
+2007-11-10 16:22 Arnim Laeuger <arniml>
+
+ * README.svf: remove links to openwince
+
+2007-11-10 01:15 Arnim Laeuger <arniml>
+
+ * src/bus/Makefile.am, src/bus/buses.c, src/bus/buses.h,
+ src/bus/zefant-xs3.c: added Zefant-XS3 bus
+
+2007-11-10 00:31 Arnim Laeuger <arniml>
+
+ * data/xilinx/xc3s1000/fg320, data/xilinx/xc3s1000/fg456,
+ data/xilinx/xc3s1000/fg676, data/xilinx/xc3s1000/ft256,
+ data/xilinx/xc3s1000/xc3s1000: xc3s1000 kw
+
+2007-11-10 00:15 Arnim Laeuger <arniml>
+
+ * data/Makefile.am, data/xilinx/xc3s1000/STEPPINGS,
+ data/xilinx/xc3s1000/fg320, data/xilinx/xc3s1000/fg456,
+ data/xilinx/xc3s1000/fg676, data/xilinx/xc3s1000/ft256,
+ data/xilinx/xc3s1000/xc3s1000,
+ data/xilinx/xc3s1000/xc3s1000_fg320,
+ data/xilinx/xc3s1000/xc3s1000_fg456,
+ data/xilinx/xc3s1000/xc3s1000_fg676,
+ data/xilinx/xc3s1000/xc3s1000_ft256,
+ data/xilinx/xc3s1000/xc3s1000l,
+ data/xilinx/xc3s1000/xc3s1000l_fg320,
+ data/xilinx/xc3s1000/xc3s1000l_fg456,
+ data/xilinx/xc3s1000/xc3s1000l_fg676,
+ data/xilinx/xc3s1000/xc3s1000l_ft256: unification xc3s1000
+
+2007-11-09 22:44 Arnim Laeuger <arniml>
+
+ * src/cmd/bit.c: fixed [ 1828672 ] cmd/bit.c broken
+
+2007-11-08 09:44 Kolja Waschk <kawk>
+
+ * configure.ac, data/Makefile.am, data/xilinx/PARTS,
+ data/xilinx/xc2c256-vq100, data/xilinx/xc2c256-vq100/STEPPINGS,
+ data/xilinx/xc2c256-vq100/xc2c256-vq100,
+ data/xilinx/xc2c64a-vq44, data/xilinx/xc2c64a-vq44/STEPPINGS,
+ data/xilinx/xc2c64a-vq44/xc2c64a-vq44, include/Makefile.am,
+ include/cable.h, include/xpcu.h, src/cmd/cable.c,
+ src/part/data_register.c, src/tap/Makefile.am, src/tap/cable.c,
+ src/tap/cable/arcom.c, src/tap/cable/byteblaster.c,
+ src/tap/cable/dlc5.c, src/tap/cable/ea253.c,
+ src/tap/cable/ei012.c, src/tap/cable/generic.c,
+ src/tap/cable/generic.h, src/tap/cable/keithkoep.c,
+ src/tap/cable/lattice.c, src/tap/cable/mpcbdm.c,
+ src/tap/cable/triton.c, src/tap/cable/usbblaster.c,
+ src/tap/cable/wiggler.c, src/tap/cable/wiggler2.c,
+ src/tap/cable/xpc.c, src/tap/parport.c, src/tap/parport/ftdi.c,
+ src/tap/parport/xpcu_common.c, src/tap/parport/xpcu_pp.c,
+ src/tap/tap.c: [ 1479632, 1649637 ] Drivers for Altera USB
+ Blaster and Xilinx Platform Cable USB
+
+2007-11-08 09:13 Kolja Waschk <kawk>
+
+ * include/Makefile.am, README, README_21065L, THANKS,
+ data/Makefile.am, data/analog/PARTS, data/analog/sharc21065l,
+ data/analog/sharc21065l/STEPPINGS,
+ data/analog/sharc21065l/sharc21065l, include/setdevice.h,
+ libbrux/Makefile.am, libbrux/flash/amd_flash.c,
+ libbrux/flash/detectflash.c, libbrux/setdevice.h,
+ src/bus/Makefile.am, src/bus/buses.c, src/bus/buses.h,
+ src/bus/sharc21065l.c, src/cmd/Makefile.am, src/cmd/cmd.c,
+ src/cmd/setdevice.c, src/detect.c, src/flash.c, src/jtag.c:
+ [ 1605981 ] JTAG Support for ADSP-21065L Processor (with
+ modifications) (Girish G Pai, Lesly A. M, Tony K Nadackal, Shaju Abraham)
+
+2007-11-08 07:33 Kolja Waschk <kawk>
+
+ * data/MANUFACTURERS, data/Makefile.am, data/admtek,
+ data/admtek/adm5120, data/admtek/adm5120/adm5120, data/atheros,
+ data/atheros/ar2312, data/atheros/ar2312/ar2312, data/brecis,
+ data/brecis/PARTS, data/brecis/msp2006,
+ data/brecis/msp2006/STEPPINGS, data/brecis/msp2006/msp2006,
+ data/hitachi/PARTS, data/hitachi/ar7300,
+ data/hitachi/ar7300/STEPPINGS, data/hitachi/ar7300/ar7300,
+ data/lexra, data/lexra/PARTS, data/lexra/lx5280,
+ data/lexra/lx5280/STEPPINGS, data/lexra/lx5280/lx5280,
+ doc/README.ejtag: [ 1429825 ] EJTAG driver (new data files) (Oleg)
+
+2007-11-08 07:11 Kolja Waschk <kawk>
+
+ * src/bus/Makefile.am, src/bus/buses.c, src/bus/buses.h,
+ src/bus/ejtag.c, src/tap/parport/ppdev.c: [ 1429825 ] EJTAG
+ driver (partial patch - only the bus driver for now) (Oleg)
+
+2007-11-07 23:17 Arnim Laeuger <arniml>
+
+ * src/bus/Makefile.am, src/bus/buses.c, src/bus/buses.h,
+ src/bus/h7202.c: [ 1585617 ] support for the Magnachip h7202 cpu
+
+2007-11-07 22:43 Arnim Laeuger <arniml>
+
+ * README.svf: update README.svf
+
+2007-11-07 22:21 Arnim Laeuger <arniml>
+
+ * src/cmd/debug.c, src/cmd/eraseflash.c, src/cmd/peekpoke.c,
+ src/cmd/script.c, src/cmd/shell.c, src/cmd/signal.c,
+ src/cmd/test.c, src/detect.c, src/jtag.c, src/part/signal.c,
+ src/readmem.c, src/svf/svf_bison.y, src/svf/svf_flex.l,
+ src/writemem.c: get rid of (most) compiler warnings
+
+2007-11-07 09:56 Kolja Waschk <kawk>
+
+ * include/bssignal.h, include/jtag.h, include/part.h, src/jtag.c:
+ Remaining diffs from gumstix repository: Add debug, test and
+ shell command, aliases for parts, small fixes.
+
+2007-11-07 09:44 Kolja Waschk <kawk>
+
+ * src/bsdl2jtag.c, src/bus/ppc440gx_ebc8.c, src/cmd/Makefile.am,
+ src/cmd/cmd.c, src/cmd/debug.c, src/cmd/part.c, src/cmd/print.c,
+ src/cmd/script.c, src/cmd/shell.c, src/cmd/signal.c,
+ src/cmd/test.c, src/detect.c, src/part/part.c, src/part/signal.c:
+ Remaining diffs from gumstix repository: Add debug, test and
+ shell command, aliases for parts, small fixes.
+
+2007-11-07 09:09 Kolja Waschk <kawk>
+
+ * doc/howto_add_support_for_more_flash.txt: [ 1460563 ] How to add
+ Support more Flash chip???
+
+2007-11-07 09:07 Kolja Waschk <kawk>
+
+ * src/writemem.c: [ 1249554 ] Writemem command to write to SRAM
+ (compile fix)
+
+2007-11-07 09:04 Kolja Waschk <kawk>
+
+ * src/svf/svf_flex.l: [ 1194137 ] better SVF diagnostics (compile
+ fix)
+
+2007-11-07 09:03 Kolja Waschk <kawk>
+
+ * src/bus/ppc405ep.c, src/bus/Makefile.am: The 405ep support patch
+ _still_ wasn't completely integrated.
+
+2007-11-07 08:55 Kolja Waschk <kawk>
+
+ * Makefile.am: Remove additional lines left over from unsuccessful
+ patch before.
+
+2007-11-07 08:47 Kolja Waschk <kawk>
+
+ * data/Makefile.am, data/xilinx/PARTS, data/xilinx/xc2s300e,
+ data/xilinx/xc2s300e/STEPPINGS, data/xilinx/xc2s300e/fg456,
+ data/xilinx/xc2s300e/ft256, data/xilinx/xc2s300e/pq208,
+ data/xilinx/xc2s300e/xc2s300e: [ 1377859 ] Device description
+ files for Xilinx XC2S300E (Spartan-IIE) (Arnim Laeuger)
+
+2007-11-07 08:41 Kolja Waschk <kawk>
+
+ * data/Makefile.am: Added Xilinx parts XC3S*
+
+2007-11-07 08:31 Kolja Waschk <kawk>
+
+ * data/Makefile.am: Added Atmel AT91SAM7S files to Makefile.am
+
+2007-11-07 08:16 Kolja Waschk <kawk>
+
+ * data/xilinx/PARTS, data/xilinx/xc18v04pc44,
+ data/xilinx/xc18v04pc44/STEPPINGS,
+ data/xilinx/xc18v04pc44/xc18v04pc44, data/xilinx/xc2s200e-pq208,
+ data/xilinx/xc2s200e-pq208/STEPPINGS,
+ data/xilinx/xc2s200e-pq208/xc2s200e-pq208, data/xilinx/xc3s1000,
+ data/xilinx/xc3s1000/STEPPINGS, data/xilinx/xc3s1000/xc3s1000,
+ data/xilinx/xc3s1000/xc3s1000_fg320,
+ data/xilinx/xc3s1000/xc3s1000_fg456,
+ data/xilinx/xc3s1000/xc3s1000_fg676,
+ data/xilinx/xc3s1000/xc3s1000_ft256,
+ data/xilinx/xc3s1000/xc3s1000l,
+ data/xilinx/xc3s1000/xc3s1000l_fg320,
+ data/xilinx/xc3s1000/xc3s1000l_fg456,
+ data/xilinx/xc3s1000/xc3s1000l_fg676,
+ data/xilinx/xc3s1000/xc3s1000l_ft256, data/xilinx/xc3s100e_die,
+ data/xilinx/xc3s100e_die/STEPPINGS,
+ data/xilinx/xc3s100e_die/xc3s100e_die,
+ data/xilinx/xc3s100e_die/xc3s100e_pq208,
+ data/xilinx/xc3s100e_die/xc3s100e_tq144,
+ data/xilinx/xc3s100e_die/xc3s100e_vq100, data/xilinx/xc3s1500,
+ data/xilinx/xc3s1500/STEPPINGS, data/xilinx/xc3s1500/xc3s1500,
+ data/xilinx/xc3s1500/xc3s1500_fg320,
+ data/xilinx/xc3s1500/xc3s1500_fg456,
+ data/xilinx/xc3s1500/xc3s1500_fg676,
+ data/xilinx/xc3s1500/xc3s1500l,
+ data/xilinx/xc3s1500/xc3s1500l_fg320,
+ data/xilinx/xc3s1500/xc3s1500l_fg456,
+ data/xilinx/xc3s1500/xc3s1500l_fg676, data/xilinx/xc3s200,
+ data/xilinx/xc3s200/STEPPINGS, data/xilinx/xc3s200/xc3s200,
+ data/xilinx/xc3s200/xc3s200_ft256,
+ data/xilinx/xc3s200/xc3s200_pq208,
+ data/xilinx/xc3s200/xc3s200_tq144,
+ data/xilinx/xc3s200/xc3s200_vq100, data/xilinx/xc3s2000,
+ data/xilinx/xc3s2000/STEPPINGS, data/xilinx/xc3s2000/xc3s2000,
+ data/xilinx/xc3s2000/xc3s2000_fg456,
+ data/xilinx/xc3s2000/xc3s2000_fg676,
+ data/xilinx/xc3s2000/xc3s2000_fg900,
+ data/xilinx/xc3s2000/xc3s2000l,
+ data/xilinx/xc3s2000/xc3s2000l_fg676,
+ data/xilinx/xc3s2000/xc3s2000l_fg900, data/xilinx/xc3s400,
+ data/xilinx/xc3s400/STEPPINGS, data/xilinx/xc3s400/xc3s400,
+ data/xilinx/xc3s400/xc3s400_fg320,
+ data/xilinx/xc3s400/xc3s400_fg456,
+ data/xilinx/xc3s400/xc3s400_ft256,
+ data/xilinx/xc3s400/xc3s400_pq208,
+ data/xilinx/xc3s400/xc3s400_tq144, data/xilinx/xc3s4000,
+ data/xilinx/xc3s4000/STEPPINGS, data/xilinx/xc3s4000/xc3s4000,
+ data/xilinx/xc3s4000/xc3s4000_fg1156,
+ data/xilinx/xc3s4000/xc3s4000_fg676,
+ data/xilinx/xc3s4000/xc3s4000_fg900,
+ data/xilinx/xc3s4000/xc3s4000l,
+ data/xilinx/xc3s4000/xc3s4000l_fg1156,
+ data/xilinx/xc3s4000/xc3s4000l_fg900, data/xilinx/xc3s50,
+ data/xilinx/xc3s50/STEPPINGS, data/xilinx/xc3s50/xc3s50,
+ data/xilinx/xc3s50/xc3s50_cp132, data/xilinx/xc3s50/xc3s50_pq208,
+ data/xilinx/xc3s50/xc3s50_tq144, data/xilinx/xc3s50/xc3s50_vq100,
+ data/xilinx/xc3s5000, data/xilinx/xc3s5000/STEPPINGS,
+ data/xilinx/xc3s5000/xc3s5000,
+ data/xilinx/xc3s5000/xc3s5000_fg1156,
+ data/xilinx/xc3s5000/xc3s5000_fg900, data/xilinx/xc3s500e_fg320,
+ data/xilinx/xc3s500e_fg320/STEPPINGS,
+ data/xilinx/xc3s500e_fg320/xc3s500e_fg320,
+ data/xilinx/xc3s500e_fg320/xc3s500e_ft256,
+ data/xilinx/xc3s500e_fg320/xc3s500e_pq208,
+ data/xilinx/xc9572xl_vq44, data/xilinx/xc9572xl_vq44/STEPPINGS,
+ data/xilinx/xc9572xl_vq44/xc9572xl_vq44, data/xilinx/xcf04s,
+ data/xilinx/xcf04s/STEPPINGS, data/xilinx/xcf04s/xcf04s: Added
+ Xilinx XC3S* parts and others from gumstix repository
+
+2007-11-07 08:10 Kolja Waschk <kawk>
+
+ * data/atmel/PARTS, data/atmel/at91sam7s256,
+ data/atmel/at91sam7s256/STEPPINGS,
+ data/atmel/at91sam7s256/at91sam7s_tq48v0,
+ data/atmel/at91sam7s256/at91sam7s_tq64v0: Added AT91SAM7S256 data
+ from gumstix repository
+
+2007-11-06 21:39 Kolja Waschk <kawk>
+
+ * src/bus/Makefile.am, src/bus/au1500.c, src/bus/bcm1250.c,
+ src/bus/buses.c, src/bus/buses.h, src/bus/jopcyc.c,
+ src/bus/lh7a400.c, src/bus/mpc5200.c, src/bus/ppc440gx_ebc8.c,
+ src/bus/slsup3.c, src/bus/tx4925.c: some more fixes, eg. ppc405
+ support patch still wasn't completely applied
+
+2007-11-06 20:56 Kolja Waschk <kawk>
+
+ * data/ibm/PARTS: [ 1173994 ] IBM PPC405EP support (PARTS file
+ wasn't updated when I applied the patch)
+
+2007-11-06 20:53 Kolja Waschk <kawk>
+
+ * src/bus/Makefile.am, src/bus/buses.c, src/bus/buses.h,
+ src/bus/jopcyc.c: [ 1281749 ] Bus driver for JOP.design Cyclone
+ boards (jopcyc+serial patch) (Arnim Laeuger)
+
+2007-11-06 20:49 Kolja Waschk <kawk>
+
+ * data/Makefile.am, data/altera/PARTS, data/altera/ep1c12,
+ data/altera/ep1c12/STEPPINGS, data/altera/ep1c12/ep1c12,
+ data/altera/ep1c12/f256, data/altera/ep1c12/f324,
+ data/altera/ep1c12/q240, data/altera/epm3064a,
+ data/altera/epm3064a/STEPPINGS, data/altera/epm3064a/epm3064a,
+ data/altera/epm3064a/l44, data/altera/epm3064a/t100,
+ data/altera/epm3064a/t44: [ 1281673 ] Device description files
+ for Altera EP1C12 and EPM3064A (Arnim Laeuger)
+
+2007-11-06 20:32 Kolja Waschk <kawk>
+
+ * include/jtag.h, src/Makefile.am, src/cmd/Makefile.am,
+ src/cmd/cmd.c, src/cmd/writemem.c, src/writemem.c: [ 1249554 ]
+ Writemem command to write to SRAM (Kent Palmkvist)
+
+2007-11-06 20:29 Kolja Waschk <kawk>
+
+ * data/Makefile.am, data/altera/PARTS, data/altera/ep1c6q240,
+ data/altera/ep1c6q240/STEPPINGS, data/altera/ep1c6q240/ep1c6q240,
+ src/bus/Makefile.am, src/bus/buses.c, src/bus/buses.h,
+ src/bus/slsup3.c: [ 1249552 ] New bus type SLS UP3 (Altera FPGA
+ board) (Kent Palmkvist)
+
+2007-11-06 20:26 Kolja Waschk <kawk>
+
+ * src/tap/cable.c, src/tap/cable/wiggler.c: [ 1236272 ] Add support
+ for Analog Devices Blackfin Processor: IGLOO.patch (Robin Getz)
+
+2007-11-06 20:24 Kolja Waschk <kawk>
+
+ * src/bus/Makefile.am, src/bus/bf533_ezkit.c,
+ src/bus/bf533_stamp.c, src/bus/buses.c, src/bus/buses.h: [
+ 1236272 ] Add support for Analog Devices Blackfin Processor:
+ STAMP_EZKIT.patch (Robin Getz)
+
+2007-11-06 20:20 Kolja Waschk <kawk>
+
+ * data/MANUFACTURERS, data/Makefile.am, data/analog,
+ data/analog/PARTS, data/analog/bf533,
+ data/analog/bf533/STEPPINGS, data/analog/bf533/bf533: [ 1236272 ]
+ Add support for Analog Devices Blackfin Processor: Blackfin.patch
+
+2007-11-06 20:15 Kolja Waschk <kawk>
+
+ * src/tap/parport/ppdev.c: [ 1194141 ] better diagnostics for
+ opening ppdev device (Hein Roehrig)
+
+2007-11-06 20:14 Kolja Waschk <kawk>
+
+ * src/svf/svf.c, src/svf/svf.h, src/svf/svf_bison.y,
+ src/svf/svf_flex.l: [ 1194137 ] better SVF diagnostics (+ manual
+ integration with previous jtag-svf-vec-hexa fix) (Hein Roehrig)
+
+2007-11-06 19:59 Kolja Waschk <kawk>
+
+ * src/svf/svf.c: [ 1194140 ] SVF better RUNTEST timing (Hein Roehrig)
+
+2007-11-06 19:53 Kolja Waschk <kawk>
+
+ * include/Makefile.am, include/cable.h, include/fclock.h, src/Makefile.am,
+ src/cmd/frequency.c, src/lib/Makefile.am, src/lib/fclock.c,
+ src/tap/cable.c: [ 1194130 ] busy-loop waiting (breaks compilation of
+ svf.c... wait for next two patches) (Hein Roehrig)
+
+2007-11-06 19:34 Kolja Waschk <kawk>
+
+ * src/tap/register.c: [ 1174000 ] Miscellanous fixes (omitting the
+ speedup for flash.c, obsoleted by an earlier patch) (Wojtek Kaniewski)
+
+2007-11-06 19:31 Kolja Waschk <kawk>
+
+ * src/bsdl2jtag.c: [ 1173997 ] bsdl2jtag bidir support (Wojtek$ Kaniewski)
+
+2007-11-06 19:29 Kolja Waschk <kawk>
+
+ * data/Makefile.am, data/ibm/ppc405ep, data/ibm/ppc405ep/STEPPINGS,
+ data/ibm/ppc405ep/ppc405ep: [ 1173994 ] IBM PPC405EP support (Wojtek
+ Kaniewski)
+
+2007-11-06 19:25 Kolja Waschk <kawk>
+
+ * src/bsdl2jtag.c: [ 1169349 ] better error codes for bsdl2jtag (Hein
+ Roehrig)
+
+2007-11-06 19:23 Kolja Waschk <kawk>
+
+ * data/sharp/lh7a400/lh7a400: [ 1164111 ] FIX of the lh7a400 port (Marko
+ Roessler)
+
+2007-11-06 19:22 Kolja Waschk <kawk>
+
+ * data/Makefile.am, data/intel/PARTS, data/intel/pxa270,
+ data/intel/pxa270/STEPPINGS, data/intel/pxa270/pxa270,
+ libbrux/flash/intel.c, src/bus/buses.c, src/bus/buses.h,
+ src/bus/pxa2x0.c, src/flash.c: [ 1112022 ] PXA270 Support (Cliff Brake)
+
+2007-11-06 19:19 Kolja Waschk <kawk>
+
+ * README.svf, include/svf.h: [ 1074347 ] SVF Player (README and
+ include file) (Arnim Laeuger)
+
+2007-11-06 19:18 Kolja Waschk <kawk>
+
+ * data/freescale, data/freescale/PARTS, data/freescale/mpc5200,
+ data/freescale/mpc5200/STEPPINGS, data/freescale/mpc5200/mpc5200,
+ src/bus/mpc5200.c: [ 1079531 ] jtag mpc5200 support (added files)
+
+2007-11-06 19:06 Kolja Waschk <kawk>
+
+ * configure.ac, data/MANUFACTURERS, data/Makefile.am,
+ include/chain.h, src/bus/Makefile.am, src/bus/buses.c,
+ src/bus/buses.h: [ 1079531 ] jtag mpc5200 support (Asier Llano Palacios)
+
+2007-11-06 19:01 Kolja Waschk <kawk>
+
+ * src/Makefile.am: add -lm because SVF player uses floor()
+
+2007-11-06 18:58 Kolja Waschk <kawk>
+
+ * src/Makefile.am, src/cmd/Makefile.am, src/cmd/cmd.c,
+ src/cmd/svf.c, src/svf, src/svf/Makefile.am, src/svf/svf.c,
+ src/svf/svf.h, src/svf/svf_bison.y, src/svf/svf_flex.l,
+ src/tap/chain.c, src/tap/tap.c: [ 1074347 ] SVF Player (4
+ patches: jtag-svf, -inc1, -goto_state, -vec-hexa) (Arnim Laeuger)
+
+2007-11-06 18:47 Kolja Waschk <kawk>
+
+ * src/tap/cable/wiggler.c, src/tap/cable/wiggler2.c: [ 1060345 ]
+ Fix certain Wigglers. (David Vrabel)
+
+2007-11-06 18:37 Kolja Waschk <kawk>
+
+ * src/cmd/bit.c: fix error from merging 972649+1012149 in bit.c
+
+2007-11-06 18:32 Kolja Waschk <kawk>
+
+ * src/cmd/bit.c: [ 1012149 ] Error messages in src/cmd/bit.c file (Jerome
+ Debard)
+
+2007-11-06 18:21 Kolja Waschk <kawk>
+
+ * src/flash.c: [ 1012144 ] User messages printed during flashmem (Jerome
+ Debard)
+
+2007-11-06 18:14 Kolja Waschk <kawk>
+
+ * src/cmd/dr.c: [ 986415 ] Allow interactive loading of DR (Martin Buck)
+
+2007-11-06 18:09 Kolja Waschk <kawk>
+
+ * src/cmd/bit.c, src/cmd/cable.c, src/cmd/dr.c, src/cmd/endian.c,
+ src/cmd/flashmem.c, src/cmd/get.c, src/cmd/print.c,
+ src/cmd/register.c, src/cmd/set.c, src/cmd/shift.c,
+ src/part/part.c, src/tap/parport/direct.c,
+ src/tap/parport/ppdev.c: [ 972649 ] make jtag more tolerant of
+ case (Andrew Dyer)
+
+2007-11-06 18:04 Kolja Waschk <kawk>
+
+ * src/bus/ixp425.c, src/bus/mpc824x.c, src/bus/pxa2x0.c,
+ src/bus/s3c4510x.c, src/bus/sa1110.c, src/bus/sh7727.c,
+ src/bus/sh7750r.c, src/bus/sh7751r.c, src/cmd/detect.c,
+ src/tap/Makefile.am, src/tap/cable.c, src/tap/cable/wiggler2.c: [
+ 909598 ] Detect 16bit flash on PXA25x 1/2 (partially included for
+ compatibility with other patches and wiggler2 driver, but actual
+ new pxa2x0 patch omitted - another later patch will fix this) (Matej)
+
+2007-11-06 17:20 Kolja Waschk <kawk>
+
+ * src/bus/s3c4510x.c, src/cmd/peekpoke.c, src/jtag.c: [ 826404 ]
+ s3c4510 bus driver (without jedec.c fix) (Krzysztof Blaszkowski)
+
+2007-11-06 16:51 Kolja Waschk <kawk>
+
+ * include/flash.h: [ 1268229 ] gcc4 compilation fix (Asier Llano Palacios)
+
+2007-11-06 09:30 Kolja Waschk <kawk>
+
+ * libbrux, trunk/libbrux: moved libbrux subdir into jtag subdir. See
+ ChangeLog there too
+
+2007-11-02 Kolja Waschk <Kolja Waschk <kawk>>
+
+ * created "UrJTAG" project as fork of openwince jtag tools. All older
+ log entries in this ChangeLog describe the openwince development.
+
+2004-11-24 Marcel Telka <marcel@telka.sk>
+
+ * src/cmd/reset.c: New file.
+ * src/discovery.c (jtag_reset): Function changed to non-static.
+ * src/cmd/Makefile.am (libcmd_a_SOURCES): Added reset.c.
+ * src/cmd/cmd.c (cmds): Added cmd_reset.
+
+2004-11-21 Marcel Telka <marcel@telka.sk>
+
+ * src/jtag.c (jtag_parse_stream, cleanup): New function.
+ (jtag_parse_file): Replaced stream parsing algorithm with jtag_parse_stream() call. Removed support
+ for special filename '-'.
+ (main): Rewritten and improved startup sequence to distinguish between interactive invocation
+ and stdin input (fixed bug 858535, thanks to Andrew Dyer for an idea).
+
+2004-11-17 Marcel Telka <marcel@telka.sk>
+
+ * acinclude.m4: New file with VL_LIB_READLINE macro (removed dependency on ac-archive package).
+ * autogen.sh: Removed acinclude call (removed dependency on ac-archive package).
+
+2004-11-16 Marcel Telka <marcel@telka.sk>
+
+ * data/MANUFACTURERS: Added Lattice Semiconductors and IBM Semiconductors (patch 1012120, Jerome Debard).
+ * data/ibm/PARTS: New file (patch 1012120, Jerome Debard).
+ * data/ibm/ppc440gx/STEPPINGS: Ditto.
+ * data/ibm/ppc440gx/ppc440gx: Ditto.
+ * data/lattice/PARTS: Ditto.
+ * data/lattice/lc4032v-tqfp48/STEPPINGS: Ditto.
+ * data/lattice/lc4032v-tqfp48/lc4032v-tqfp48: Ditto.
+ * data/lattice/m4a3-256.192-fpbga256/STEPPINGS: Ditto.
+ * data/lattice/m4a3-256.192-fpbga256/m4a3-256.192-fpbga256: Ditto.
+ * data/lattice/m4a3-64.32-tqfp48/STEPPINGS: Ditto.
+ * data/lattice/m4a3-64.32-tqfp48/m4a3-64.32-tqfp48: Ditto.
+ * data/Makefile.am (nobase_dist_pkgdata_DATA): Added new files.
+
+2004-10-22 Marcel Telka <marcel@telka.sk>
+
+ * data/MANUFACTURERS: Added Sharp manufacturer (patch 886068, Marko Rößler).
+ * data/Makefile.am (nobase_dist_pkgdata_DATA): Added new files (patch 886068, Marko Rößler).
+ * data/sharp/PARTS: New file (patch 886068, Marko Rößler).
+ * data/sharp/lh7a400/STEPPINGS: Ditto.
+ * data/sharp/lh7a400/lh7a400: Ditto.
+ * src/bus/lh7a400.c: Ditto.
+ * src/bus/Makefile.am (libbus_a_SOURCES): Added lh7a400.c (patch 886068, Marko Rößler).
+ * src/bus/buses.c (bus_drivers): Added lh7a400_bus (patch 886068, Marko Rößler).
+ * src/bus/buses.h: Ditto.
+
+2004-10-17 Marcel Telka <marcel@telka.sk>
+
+ * configure.ac (AC_INIT): Changed version number to 0.6.
+ (AM_GNU_GETTEXT_VERSION): Changed version number for gettext to 0.14.1.
+
+2004-10-17 Marcel Telka <marcel@telka.sk>
+
+ * src/tap/cable/wiggler.c (nTRST): Changed pin value (patch 1040199, Andrew Dyer).
+ (nSRESET): New pin value (patch 1040199, Andrew Dyer).
+ (wiggler_init, wiggler_clock, wiggler_get_tdo, wiggler_set_trst): Changed nTRST to not inverted
+ signal (patch 1040199, Andrew Dyer).
+
+2004-09-21 Marcel Telka <marcel@telka.sk>
+
+ * data/intel/PARTS: Added support for different IXP425 frequency variants (patch 1030647, Trevor Man).
+
+2004-08-24 Marcel Telka <marcel@telka.sk>
+
+ * src/bus/Makefile.am (libbus_a_SOURCES): Added ppc440gx_ebc8.c.
+ * src/bus/buses.c (bus_drivers): Added ppc440gx_ebc8_bus (patch 1012154, Jerome Debard).
+ * src/bus/buses.h: Ditto.
+ * src/bus/ppc440gx_ebc8.c: New file (patch 1012154, Jerome Debard).
+
+2004-08-20 Marcel Telka <marcel@telka.sk>
+
+ * src/bus/pxa2x0.c (pxa2x0_bus_init): New function.
+ (pxa250_bus_prepare): Replaced bus initialization sequence with pxa2x0_bus_init() call.
+ (pxa2x0_bus_area): Added pxa2x0_bus_init() call.
+
+2004-08-20 Marcel Telka <marcel@telka.sk>
+
+ * src/tap/Makefile.am (libtap_a_SOURCES): Added cable/lattice.c.
+ * src/tap/cable.c (cable_drivers): Added lattice_cable_driver (patch 1012138, Jerome Debard).
+ * src/tap/cable/lattice.c: New file (patch 1012138, Jerome Debard).
+
+2004-08-19 Marcel Telka <marcel@telka.sk>
+
+ * src/bus/Makefile.am (libbus_a_SOURCES): Added tx4925.c (patch 972625, Andrew Dyer).
+ * src/bus/buses.c (bus_drivers): Added tx4925_bus (patch 972625, Andrew Dyer).
+ * src/bus/buses.h: Ditto.
+ * src/bus/tx4925.c: New file (patch 972625, Andrew Dyer).
+
+2004-08-17 Marcel Telka <marcel@telka.sk>
+
+ * data/MANUFACTURERS: Added Toshiba manufacturer (patch 972621, Andrew Dyer).
+ * data/Makefile.am (nobase_dist_pkgdata_DATA): Added new files (patch 972621, Andrew Dyer).
+ * data/xilinx/PARTS: Added XCR3032XL-VQ44 entry (patch 972621, Andrew Dyer).
+ * data/xilinx/xcr3032xl-vq44/STEPPINGS: New file (patch 972621, Andrew Dyer).
+ * data/xilinx/xcr3032xl-vq44/xcr3032xl-vq44: Ditto.
+ * data/toshiba/PARTS: Ditto.
+ * data/toshiba/tx4925/STEPPINGS: Ditto.
+ * data/toshiba/tx4925/tx4925: Ditto.
+ * data/toshiba/tx4926/STEPPINGS: Ditto.
+ * data/toshiba/tx4926/tx4926: Ditto.
+
+2004-08-17 Marcel Telka <marcel@telka.sk>
+
+ * data/Makefile.am (nobase_dist_pkgdata_DATA): Added new files.
+ * data/philips/PARTS: Added XCR3128XL-VQ100 entry (patch 1010714, Michael Lauer).
+ * data/xilinx/PARTS: Added directory for XCR3128XL-VQ100 entry (patch 1010714, Michael Lauer).
+ * data/philips/xcr3128xl-vq100/STEPPINGS: New file (patch 1010714, Michael Lauer).
+ * data/philips/xcr3128xl-vq100/xcr3128xl-vq100: Ditto.
+ * data/xilinx/xcr3128xl-vq100/xcr3128xl-vq100: Ditto.
+
+2004-08-16 Marcel Telka <marcel@telka.sk>
+
+ * src/bus/pxa2x0.c (bus_params_t): Added new member: inited.
+ (INITED): New macro.
+ (pxa2x0_bus_new): Removed BOOT_DEF initialization.
+ (pxa250_bus_prepare): Added BOOT_DEF initialization.
+
+2004-08-15 Marcel Telka <marcel@telka.sk>
+
+ * include/jtag.h (detect_parts): Changed return type.
+ * src/detect.c (detect_parts): Changed return value to return number of detected parts.
+ * src/cmd/detect.c (cmd_detect_run): Added reset of the chain->parts to NULL before
+ detect_parts() call. Ignored detect_parts() return value.
+
+2004-08-13 Marcel Telka <marcel@telka.sk>
+
+ * src/jtag.c: Added missing locale.h include (patch 986414, Martin Buck).
+
+2004-08-11 Marcel Telka <marcel@telka.sk>
+
+ * Makefile.rules (RECURSIVE_TARGETS, lint-recursive): Removed.
+ (lint): Added command to run recursive make.
+ (.PHONY): Removed lint-recursive.
+
+2004-06-13 Marcel Telka <marcel@telka.sk>
+
+ * data/broadcom/PARTS: Added BCM4712 entry (Alan Wallace).
+ * data/broadcom/bcm4712/STEPPINGS: New file (Alan Wallace).
+ * data/broadcom/bcm4712/bcm4712: Ditto.
+
+2004-01-20 Marcel Telka <marcel@telka.sk>
+
+ * acinclude.m4: File removed.
+ * autogen.sh: Added acinclude call.
+
+2003-12-20 Marcel Telka <marcel@telka.sk>
+
+ * src/bus/Makefile.am (libbus_a_SOURCES): Added au1500.c.
+ * src/bus/au1500.c: New file (patch 853883, Zhang Wei).
+ * src/bus/buses.c (bus_drivers): Added au1500_bus (patch 853883, Zhang Wei).
+ * src/bus/buses.h: Added au1500_bus.
+
+2003-11-02 Marcel Telka <marcel@telka.sk>
+
+ * configure.ac (AC_INIT): Changed version number to 0.5.2.
+
+ * data/Makefile.am (nobase_dist_pkgdata_DATA): Added motorola/mpc8245/1.2.
+ * data/motorola/mpc8245/1.2: New file.
+ * src/bus/mpc824x.c: Ditto.
+ * src/bus/Makefile.am (libbus_a_SOURCES): Added mpc824x.c.
+ * src/bus/buses.c (bus_drivers): Added mpc824x_bus.
+ * src/bus/buses.h (mpc824x_bus): Added bus declaration.
+
+ * include/bsbit.h (bsbit_alloc): Changed parameter name (signals -> signal).
+ * src/part/bsbit.c (bsbit_alloc): Changed parameter behaviour.
+ * src/cmd/bit.c (cmd_bit_run): Passed exact signal to bsbit_alloc() instead of list of signals.
+
+ * src/jtag.c (main): Added cfi_array deallocation.
+
+ * src/flash.c (set_flash_driver): Used global cfi_array variable to set flash driver.
+ (flashcheck): Function removed.
+ All function calls replaced by set_flash_driver().
+ (flashmsbin): Removed local cfi_array variable.
+ (flashmem): Removed local cfi_array variable. Fixed bug with one more block erase while programming
+ data at end of previous block.
+ (flasherase): Removed local cfi_array variable. Fixed block number calculation.
+ * src/readmem.c (readmem): Fixed bug while reading address near to end of 32 bit address range.
+ * src/bus/pxa2x0.c (pxa2x0_bus_new): Added BSR sampling before BOOT_DEF initialization (bugfix).
+
+2003-10-23 Marcel Telka <marcel@telka.sk>
+
+ * include/bssignal.h (salias_t): Added new type.
+ (salias_alloc, salias_free): Adde new function prototypes.
+ * include/part.h (struct part): Added new structure member 'saliases'.
+ * src/cmd/Makefile.am (libcmd_a_SOURCES): Added salias.c.
+ * src/cmd/cmd.c (cmds): Added cmd_salias.
+ * src/cmd/salias.c: New file.
+ * src/part/part.c (part_alloc): Added saliases initialization.
+ (part_free): Added saliases deallocation.
+ (part_find_signal): Added signal aliases searching.
+ * src/part/signal.c (salias_alloc, salias_free): New functions.
+
+2003-10-20 Marcel Telka <marcel@telka.sk>
+
+ * data/hitachi/hd64465/hd64465: Completed BSR bits declaration.
+
+2003-10-20 Marcel Telka <marcel@telka.sk>
+
+ * data/Makefile.am (nobase_dist_pkgdata_DATA): Added hitachi/sh7729/STEPPINGS and hitachi/sh7729/sh7729.
+ * data/hitachi/sh7729/STEPPINGS: New file (Beregnyei Balazs).
+ * data/hitachi/sh7729/sh7729: Ditto.
+
+2003-10-17 Marcel Telka <marcel@telka.sk>
+
+ * data/Makefile.am (nobase_dist_pkgdata_DATA): Added hitachi/hd64465/hd64465.
+ * data/hitachi/hd64465/hd64465: New file.
+
+2003-10-13 Marcel Telka <marcel@telka>
+
+ * data/intel/ixp425/STEPPINGS: Added B0 stepping.
+
+2003-10-11 Marcel Telka <marcel@telka>
+
+ Version 0.5.1 released.
+
+2003-09-23 Marcel Telka <marcel@telka.sk>
+
+ * src/flash.c (flash_drivers): Added amd_16_flash_driver (Bradley D. LaRonde).
+ (find_block): New function (Bradley D. LaRonde).
+ (flashmem): Added block calculations using exact CFI data (Bradley D. LaRonde).
+
+ * src/tap/cable/triton.c (triton_init): Removed unused variable 'data'.
+
+2003-09-15 Marcel Telka <marcel@telka.sk>
+
+ * configure.ac: Fixed spelling (patch 805108, Andreas Mohr).
+ * src/jtag.c (main): Ditto.
+ * src/cmd/discovery.c (cmd_discovery_help, cmd_discovery): Ditto.
+ * src/cmd/flashmem.c (cmd_flashmem_help): Ditto.
+
+ * src/tap/cable/ei012.c: Changed comment (patch 805108, Andreas Mohr).
+ * src/tap/cable/keithkoep.c: Ditto.
+ * src/tap/cable/mpcbdm.c: Ditto.
+
+2003-09-14 Marcel Telka <marcel@telka.sk>
+
+ * src/tap/cable/triton.c: New file (patch 805103, Andreas Mohr).
+ * src/tap/Makefile.am (libtap_a_SOURCES): Added cable/triton.c (patch 805103, Andreas Mohr).
+ * src/tap/cable.c (cable_drivers): Added triton_cable_driver member (patch 805103, Andreas Mohr).
+ * src/tap/cable/generic.h (PARAM_SRESET): New macro (patch 805103, Andreas Mohr).
+ (generic_params_t): New structure member 'sreset' (patch 805103, Andreas Mohr).
+
+ * configure.ac: Changed description for --with-include parameter (thanks to Andreas Mohr).
+
+2003-09-12 Marcel Telka <marcel@telka.sk>
+
+ * configure.ac (AC_CHECK_FUNCS): Added swprintf.
+ * src/cmd/print.c (cmd_print_run): Added alternative implementation of the header printing using
+ snprintf() for platforms without swprintf() function available.
+
+2003-09-12 Marcel Telka <marcel@telka.sk>
+
+ * configure.ac (AC_INIT): Changed version number to 0.5.1.
+
+2003-09-11 Marcel Telka <marcel@telka.sk>
+
+ * src/tap/cable/wiggler.c (wiggler_init, wiggler_clock, wiggler_get_tdo, wiggler_set_trst): Fixed
+ inverted TRST signal (see patch 799377 for more info, thanks to Mike Tesch for reporting).
+
+2003-09-11 Marcel Telka <marcel@telka.sk>
+
+ * src/cmd/dr.c (cmd_dr_run): Added test for missing active instruction and data register (thanks to
+ Mike Tesch for reporting).
+
+2003-09-10 Marcel Telka <marcel@telka.sk>
+
+ * src/bus/bcm1250.c (bcm1250_bus_printinfo, bcm1250_bus): Fixed typo (compatibile->compatible) in
+ output message (thanks to Andreas Mohr).
+ * src/bus/ixp425.c (ixp425_bus_printinfo, ixp425_bus): Ditto.
+ * src/bus/pxa2x0.c (pxa2x0_bus_printinfo, pxa2x0_bus): Ditto.
+ * src/bus/s3c4510x.c (s3c4510_bus_printinfo, s3c4510_bus): Ditto.
+ * src/bus/sa1110.c (sa1110_bus_printinfo, sa1110_bus): Ditto.
+ * src/bus/sh7727.c (sh7727_bus_printinfo, sh7727_bus): Ditto.
+ * src/bus/sh7750r.c (sh7750r_bus_printinfo, sh7750r_bus): Ditto.
+ * src/bus/sh7751r.c (sh7751r_bus_printinfo, sh7751r_bus): Ditto.
+
+2003-09-05 Marcel Telka <marcel@telka.sk>
+
+ * include/bus.h (bus_drivers): Added constant declaration.
+ (new_sa1110_bus, new_pxa250_bus, new_ixp425_bus, new_sh7727_bus, new_sh7750r_bus, new_sh7751r_bus)
+ (new_bcm1250_bus): Function declarations removed.
+ * src/bus/buses.c (bus_drivers): New constant definition.
+ * src/bus/buses.h: New file.
+ * src/bus/Makefile.am (libbus_a_SOURCES): Added buses.h.
+
+ * src/bus/bcm1250.c (bcm1250_bus_printinfo): Added new function parameter 'bus'.
+ (bcm1250_bus): Changed structure type to bus_driver_t. Changed members.
+ (new_bcm1250_bus): Function renamed ...
+ (bcm1250_bus_new): ... to this one. Changed parameter list to void (and function body updated).
+ * src/bus/ixp425.c (ixp425_bus_printinfo): Added new function parameter 'bus'.
+ (ixp425_bus): Changed structure type to bus_driver_t. Changed members.
+ (new_ixp425_bus): Function renamed ...
+ (ixp425_bus_new): ... to this one. Changed parameter list to void (and function body updated).
+ * src/bus/pxa2x0.c (pxa2x0_bus_printinfo): Added new function parameter 'bus'.
+ (pxa250_bus): Structure transformed ...
+ (pxa2x0_bus): ... to this constant (changed type to bus_driver_t, changed members).
+ (new_pxa250_bus): Function renamed ...
+ (pxa2x0_bus_new): ... to this one. Changed parameter list to void (and function body updated).
+ * src/bus/s3c4510x.c (s3c4510_bus_printinfo): Added new function parameter 'bus'.
+ (s3c4510_bus): Changed structure type to bus_driver_t. Changed members.
+ (new_s3c4510_bus): Function renamed ...
+ (s3c4510_bus_new): ... to this one. Changed parameter list to void (and function body updated).
+ * src/bus/sa1110.c (sa1110_bus_printinfo): Added new function parameter 'bus'.
+ (sa1110_bus): Changed structure type to bus_driver_t. Changed members.
+ (new_sa1110_bus): Function renamed ...
+ (sa1110_bus_new): ... to this one. Changed parameter list to void (and function body updated).
+ * src/bus/sh7727.c (sh7727_bus_printinfo): Added new function parameter 'bus'.
+ (sh7727_bus): Changed structure type to bus_driver_t. Changed members.
+ (new_sh7727_bus): Function renamed ...
+ (sh7727_bus_new): ... to this one. Changed parameter list to void (and function body updated).
+ * src/bus/sh7750r.c (sh7750r_bus_printinfo): Added new function parameter 'bus'.
+ (sh7750r_bus): Changed structure type to bus_driver_t. Changed members.
+ (new_sh7750r_bus): Function renamed ...
+ (sh7750r_bus_new): ... to this one. Changed parameter list to void (and function body updated).
+ * src/bus/sh7751r.c (sh7751r_bus_printinfo): Added new function parameter 'bus'.
+ (sh7751r_bus): Changed structure type to bus_driver_t. Changed members.
+ (new_sh7751r_bus): Function renamed ...
+ (sh7751r_bus_new): ... to this one. Changed parameter list to void (and function body updated).
+
+ * src/cmd/cable.c (cmd_cable_run): Replaced bus->free() call with bus_free().
+ * src/jtag.c (main): Ditto.
+
+ * src/cmd/cmd.c (cmds): Added cmd_initbus.
+ * src/cmd/detect.c (cmd_detect_run): Removed explicit bus driver detection.
+ * src/cmd/initbus.c: New file.
+ * src/cmd/Makefile.am (libcmd_a_SOURCES): Added initbus.c.
+
+ * data/broadcom/bcm1250/bcm1250: Added 'initbus' command call.
+ * data/hitachi/sh7727/sh7727: Ditto.
+ * data/intel/ixp425/ixp425: Ditto.
+ * data/intel/pxa250/pxa250: Ditto.
+ * data/intel/pxa250/pxa250c0: Ditto.
+ * data/intel/sa1110/sa1110: Ditto.
+ * data/samsung/s3c4510b/s3c4510b: Ditto.
+
+2003-09-04 Marcel Telka <marcel@telka.sk>
+
+ * configure.ac (CPPFLAGS): Added top_srcdir into include directory list.
+
+2003-09-03 Marcel Telka <marcel@telka.sk>
+
+ * src/bus/pxa2x0.c (set_data_in, setup_data): Added new 'adr' parameter. Used real data bus width
+ for data reading (based on patch 792591, thanks to Guennadi Liakhovetski).
+ All function callers updated.
+ (pxa250_bus_read_next, pxa250_bus_read_end): Used real data bus width for data reading (based on
+ patch 792591, thanks to Guennadi Liakhovetski).
+ * src/bus/sa1110.c (set_data_in, setup_data, sa1110_bus_read_next, sa1110_bus_read_end): Ditto.
+ * src/bus/sh7727.c (set_data_in, setup_data, sh7727_bus_read_next, sh7727_bus_read_end): Ditto.
+
+2003-08-28 Marcel Telka <marcel@telka.sk>
+
+ * src/bus/pxa2x0.c (pxa250_bus_read_next, pxa250_bus_read_end): Added support for BOOT_DEF register
+ emulation.
+ (pxa2x0_bus_area): Added Memory Mapped registers (Memory Ctl) area.
+
+2003-08-28 Marcel Telka <marcel@telka.sk>
+
+ * src/readmem.c (readmem): Replaced bus_width macro with new bus_area.
+ * src/bus/bcm1250.c (bcm1250_bus_width): Function removed.
+ (bcm1250_bus_area): New function.
+ * src/bus/ixp425.c (ixp425_bus_width): Function removed.
+ (ixp425_bus_area): New function.
+ * src/bus/pxa2x0.c (pxa250_bus_width): Function removed.
+ (pxa2x0_bus_area): New function.
+ * src/bus/s3c4510x.c (s3c4510_bus_width): Function removed.
+ (s3c4510_bus_area): New function.
+ * src/bus/sa1110.c (sa1110_bus_width: Function removed.
+ (sa1110_bus_area): New function.
+ * src/bus/sh7727.c (sh7727_bus_width): Function removed.
+ (sh7727_bus_area): New function.
+ * src/bus/sh7750r.c (sh7750r_bus_width): Function removed.
+ (sh7750r_bus_area): New function.
+ * src/bus/sh7751r.c (sh7751r_bus_width): Function removed.
+ (sh7751r_bus_area): New function.
+ * src/cmd/print.c (cmd_print_run): Added bus area printing.
+
+2003-08-27 Marcel Telka <marcel@telka.sk>
+
+ * include/flash.h: Removed CFI_INTEL_ERROR_* macros.
+
+2003-08-26 Marcel Telka <marcel@telka.sk>
+
+ * src/cmd/print.c (cmd_print_run): Fixed header print format.
+
+2003-08-25 Marcel Telka <marcel@telka.sk>
+
+ * configure.ac (AC_INIT): Changed package name.
+ * src/jtag.c (main): Added full package name to banner.
+
+2003-08-22 Marcel Telka <marcel@telka.sk>
+
+ * src/tap/cable/byteblaster.c (byteblaster_init): Added additional checks for valid ByteBlaster cable
+ connection and enabled all variants of the cable (patch 793313, Rojhalat Ibrahim).
+
+2003-08-22 Marcel Telka <marcel@telka.sk>
+
+ * MANUFACTURERS: Added Altera manufacturer (Rojhalat Ibrahim).
+ * altera/PARTS: New file (Rojhalat Ibrahim).
+ * altera/ep1c20f400/STEPPINGS: Ditto.
+ * altera/ep1c20f400/ep1c20f400: Ditto.
+ * altera/epm7128aetc100/STEPPINGS: Ditto.
+ * altera/epm7128aetc100/epm7128aetc100: Ditto.
+ * Makefile.am (nobase_dist_pkgdata_DATA): Added new Altera JTAG files.
+
+2003-08-19 Marcel Telka <marcel@telka.sk>
+
+ Version 0.5 released.
+
+2003-08-19 Marcel Telka <marcel@telka.sk>
+
+ * configure.ac (AM_GNU_GETTEXT_VERSION): Changed version number to 0.12.1.
+
+2003-08-19 Marcel Telka <marcel@telka.sk>
+
+ * src/bus/s3c4510x.c: Changed comment.
+
+2003-08-19 Marcel Telka <marcel@telka.sk>
+
+ * src/bus/Makefile.am (libbus_a_SOURCES): Added s3c4510x.c.
+ * src/bus/s3c4510x.c: New file (Jiun-Shian Ho).
+
+2003-08-19 Marcel Telka <marcel@telka.sk>
+
+ * src/tap/parport/direct.c (direct_connect): Marked two indirect strings for translation.
+ * src/tap/parport/ppdev.c (ppdev_connect): Ditto.
+
+2003-08-19 Marcel Telka <marcel@telka.sk>
+
+ * sysdep.h: Renamed pkgcfg.h to config.h.
+ * configure.ac (AM_CONFIG_HEADER): Ditto.
+
+2003-08-19 Marcel Telka <marcel@telka.sk>
+
+ * src/jtag.c (main): Fixed setlocale() call.
+ * Makefile.am (noinst_HEADERS): Renamed config.h -> sysdep.h.
+ * config.h: Renamed this file ...
+ * sysdep.h: ... to this one.
+ Changed config.h -> sysdep.h include in all source files.
+
+2003-08-18 Marcel Telka <marcel@telka.sk>
+
+ * data/samsung/s3c4510b/s3c4510b: Fixed some errors in instruction declarations (Jiun-Shian Ho).
+
+2003-08-18 Marcel Telka <marcel@telka.sk>
+
+ * src/detect.c (detect_parts): Marked one forgotten string for translation.
+ * src/cmd/bit.c (cmd_bit_run): Fixed control bit setup.
+ * src/cmd/eraseflash.c (cmd_eraseflash_run): Changed formatting.
+ (cmd_eraseflash_help): Updated help text.
+ * src/cmd/flashmem.c (cmd_flashmem_help): Ditto.
+ * src/cmd/readmem.c (cmd_readmem_help): Ditto.
+
+2003-08-14 Marcel Telka <marcel@telka.sk>
+
+ * include/jtag.h (flasherase): New function prototype (patch 772267, Thomas Fröhlich).
+ * src/flash.c (flasherase): New function (patch 772267, Thomas Fröhlich).
+ * src/cmd/Makefile.am (libcmd_a_SOURCES): Added eraseflash.c (patch 772267, Thomas Fröhlich).
+ * src/cmd/cmd.c (cmds): Added cmd_eraseflash (patch 772267, Thomas Fröhlich).
+ * src/cmd/eraseflash.c: New file (patch 772267, Thomas Fröhlich).
+
+2003-08-14 Marcel Telka <marcel@telka.sk>
+
+ * src/tap/chain.c (chain_shift_instructions): Moved test for parts without active instruction before
+ shifting process.
+ (chain_shift_data_registers): Moved test for parts without active instruction or data register before
+ shifting process.
+
+2003-08-14 Marcel Telka <marcel@telka.sk>
+
+ * data/Makefile.am (nobase_dist_pkgdata_DATA): Added samsung/s3c4510b/s3c4510b.
+ * data/samsung/s3c4510b/s3c4510b: New file (Jiun-Shian Ho).
+
+2003-08-14 Marcel Telka <marcel@telka.sk>
+
+ * data/MANUFACTURERS: Changed directory name for Philips.
+ * data/Makefile.am (nobase_dist_pkgdata_DATA): Added philips/PARTS, philips/xcr3128xl-cs144/STEPPINGS, and
+ philips/xcr3128xl-cs144/xcr3128xl-cs144.
+ * data/philips/PARTS: New file.
+ * data/philips/xcr3128xl-cs144/STEPPINGS: Ditto.
+ * data/philips/xcr3128xl-cs144/xcr3128xl-cs144: Ditto.
+ * include/part.h (MAXLEN_MANUFACTURER): Increased size to 25.
+
+2003-08-13 Marcel Telka <marcel@telka.sk>
+
+ * include/jtag.h (detect_register_size): Added function declaration.
+ * src/discovery.c (detect_register_size): Changed to non-static.
+ * src/detect.c (detect_parts): Added support for parts without IDCODE.
+
+2003-08-13 Marcel Telka <marcel@telka.sk>
+
+ * src/bus/sa1110.c (sa1110_bus_width): Removed bus width printing.
+ * src/bus/sh7751r.c (sh7751r_bus_printinfo): New function.
+
+2003-08-13 Marcel Telka <marcel@telka.sk>
+
+ * include/bus.h (new_sh7751r_bus): New function declaration (patch 773533, Matan Ziv-Av).
+ * src/bus/Makefile.am (libbus_a_SOURCES): Added sh7751r.c (patch 773533, Matan Ziv-Av).
+ * src/bus/sh7751r.c: New file (patch 773533, Matan Ziv-Av).
+
+2003-08-13 Marcel Telka <marcel@telka.sk>
+
+ * include/part.h (struct part): Added new member 'id'.
+ (part_alloc): Added new parameter 'id'.
+ * src/detect.c (detect_parts): Added execution JTAG declarations as script.
+ * src/jtag.c (get_token): Added support for in-line comments.
+ * src/cmd/Makefile.am (libcmd_a_SOURCES): Added signal.c, bit.c, and register.c.
+ * src/cmd/bit.c: New file.
+ * src/cmd/register.c: Ditto.
+ * src/cmd/signal.c: Ditto.
+ * src/cmd/cmd.c (cmds): Added cmd_signal, cmd_bit, and cmd_register.
+ * src/cmd/instruction.c (cmd_instruction_run, cmd_instruction_help, cmd_instruction): Added support
+ for new instruction declaration.
+ * src/part/parse.c: File removed.
+ * src/part/Makefile.am (libpart_a_SOURCES): Removed parse.c.
+ * src/cmd/detect.c (cmd_detect_run): Fixed possible NULL pointer dereference.
+ * src/part/part.c (part_alloc): Added new parameter 'id'.
+ (part_free): Addedd id deallocation.
+ (part_print): Added support for instructions without data register.
+ * src/tap/chain.c (chain_shift_data_registers): Ditto.
+
+2003-08-13 Marcel Telka <marcel@telka.sk>
+
+ * data/broadcom/bcm5421s/bcm5421s: Fixed bad pin -> signal changes.
+
+2003-08-13 Marcel Telka <marcel@telka.sk>
+
+ * data/broadcom/bcm1250/bcm1250: Changed pin -> signal keyword.
+ * data/broadcom/bcm5421s/bcm5421s: Ditto.
+ * data/hitachi/sh7727/sh7727: Ditto.
+ * data/intel/ixp425/ixp425: Ditto.
+ * data/intel/pxa250/pxa250: Ditto.
+ * data/intel/pxa250/pxa250c0: Ditto.
+ * data/intel/sa1110/sa1110: Ditto.
+ * data/xilinx/xc2c256-tq144/xc2c256-tq144: Ditto.
+ * data/xilinx/xcr3128xl-cs144/xcr3128xl-cs144: Ditto.
+ * data/xilinx/xcr3256xl-ft256/xcr3256xl-ft256: Ditto.
+
+2003-08-12 Marcel Telka <marcel@telka.sk>
+
+ * src/bsdl2jtag.c (endline): Added support for "downto" in bit vectors and "observe_only" (patch 787346,
+ Brad Parker).
+
+2003-08-11 Marcel Telka <marcel@telka.sk>
+
+ * src/cmd/Makefile.am (libcmd_a_SOURCES): Added include.c.
+ * src/cmd/include.c: New file.
+ * src/cmd/cmd.c (cmds): Added cmd_include.
+
+2003-08-11 Marcel Telka <marcel@telka.sk>
+
+ * src/flash.c (flash_drivers): Added amd_8_flash_driver.
+
+2003-08-11 Marcel Telka <marcel@telka.sk>
+
+ * include/bus.h (buses_t): Added new structure.
+ * src/jtag.c (bus): Removed global variable.
+ * src/bus/Makefile.am (libbus_a_SOURCES): Added buses.c.
+ * src/bus/buses.c: New file.
+ * src/bus/bcm1250.c (bcm1250_bus_printinfo): New function.
+ * src/bus/ixp425.c (ixp425_bus_printinfo): Ditto.
+ * src/bus/pxa2x0.c (pxa2x0_bus_printinfo): Ditto.
+ * src/bus/sa1110.c (sa1110_bus_printinfo): Ditto.
+ * src/bus/sh7727.c (sh7727_bus_printinfo): Ditto.
+ * src/bus/sh7750r.c (sh7750r_bus_printinfo): Ditto.
+ * src/cmd/Makefile.am (libcmd_a_SOURCES): Added bus.c.
+ * src/cmd/bus.c: New file.
+ * src/cmd/cmd.c (cmds): Added cmd_bus.
+ * src/cmd/detect.c (cmd_detect_run): Added support for multiple buses detection.
+ * src/cmd/print.c (cmd_print_run): Fixed header printing while syntax error. Added support for printing
+ list of active buses.
+ (cmd_print_help): Added new parameter 'bus'.
+
+2003-08-11 Marcel Telka <marcel@telka.sk>
+
+ * configure.ac (AC_INIT): Changed version number to 0.5.
+
+ * include/chain.h (chain_t): Added active_part.
+ * src/tap/chain.c (chain_alloc): Added active_part initialization.
+ * include/part.h (parts_print): Removed 'header' parameter.
+ * src/part/part.c (parts_print): Removed header printing.
+ * src/cmd/print.c (cmd_print_run): Added header printg. Added new parameter 'chain' for print command.
+ (cmd_print_help): Added new parameter 'chain'.
+ * src/cmd/dr.c (cmd_dr_run, cmd_dr_help): Removed PART parameter.
+ * src/cmd/get.c (cmd_get_run, cmd_get_help): Ditto.
+ * src/cmd/instruction.c (cmd_instruction_run, cmd_instruction_help): Ditto.
+ * src/cmd/set.c (cmd_set_run, cmd_set_help): Ditto.
+ * src/cmd/Makefile.am (libcmd_a_SOURCES): Adde part.c.
+ * src/cmd/part.c: New file.
+ * src/cmd/cmd.c (cmds): Added cmd_part.
+
+2003-07-25 Marcel Telka <marcel@telka.sk>
+
+ * data/Makefile.am (nobase_dist_pkgdata_DATA): Added broadcom/bcm3310/STEPPINGS and
+ broadcom/bcm3310/bcm3310.
+ * data/broadcom/PARTS: Added BCM3310.
+ * data/broadcom/bcm3310/STEPPINGS: New file.
+ * data/broadcom/bcm3310/bcm3310: Ditto.
+
+2003-07-24 Marcel Telka <marcel@telka.sk>
+
+ * po/POTFILES.in: Removed missing files.
+ * configure.ac: Removed VL_LIB_READLINE macro and moved it to ...
+ * acinclude.m4: ... this new file.
+
+2003-07-16 Marcel Telka <marcel@telka.sk>
+
+ * src/jtag.c (jtag_parse_line): Fixed invalid memory allocation size (core dump).
+
+2003-07-01 Marcel Telka <marcel@telka.sk>
+
+ * include/bus.h (new_sh7750r_bus, new_bcm1250_bus): New function declarations (patch 753300, Matan Ziv-Av).
+ * src/bus/Makefile.am (libbus_a_SOURCES): Added bcm1250.c and sh7750r.c (patch 753300, Matan Ziv-Av).
+ * src/bus/bcm1250.c: New file (patch 753300, Matan Ziv-Av).
+ * src/bus/sh7750r.c: Ditto.
+ * src/cmd/detect.c (cmd_detect_run): Added bus driver for SH7750R and BCM1250 (patch 753300, Matan Ziv-Av).
+
+2003-06-19 Marcel Telka <marcel@telka.sk>
+
+ * include/jtag.h (discovery): Removed 'filename' parameter.
+ * src/discovery.c (TEST_COUNT): Changed test repeat count from 5 to 1.
+ (detect_register_size): Removed 'f' parameter. Removed output messages.
+ (jtag_reset): Removed sleep() calls.
+ (discovery): Removed 'filename' parameter. Removed support for output to file. Simplified output
+ messages.
+ * src/cmd/discovery.c (cmd_discovery_run): Removed FILENAME parameter.
+ (cmd_discovery_help): Updated help text.
+
+2003-06-18 Marcel Telka <marcel@telka.sk>
+
+ * src/discovery.c (discovery): Removed explicit JTAG chain length detection. Changed starting of the DR
+ size detection from all 1 instead all 0 for IR (patch 753298, Matan Ziv-Av).
+
+2003-06-18 Marcel Telka <marcel@telka.sk>
+
+ * /src/flash.c (flash_drivers): Added 1 x 8 bit Intel Flash driver (patch 753295, Matan Ziv-Av).
+
+2003-06-12 Marcel Telka <marcel@telka.sk>
+
+ * include/flash.h (flash_driver_t): Structure removed.
+ (flash_erase_block, flash_unlock_block, flash_program, flash_readarray): Macro removed.
+ * src/flash.c (set_flash_driver, flashcheck, flashmsbin, flashmem): Updated for new
+ flash_driver_t declared in brux/flash.h in include module.
+
+2003-06-10 Marcel Telka <marcel@telka.sk>
+
+ * include/Makefile.am (noinst_HEADERS): Removed cfi.h.
+ * include/cfi.h: File removed.
+ * src/flash.c: Updated include header files.
+
+2003-06-10 Marcel Telka <marcel@telka.sk>
+
+ * src/bus/sh7727.c (bus_params_t): Added md3 and md4.
+ (sh7727_bus_width): Moved to implementation using MD3 and MD4 (thanks to Rainer Dörken).
+ (new_sh7727_bus): Added MD3 and MD4 signal searching (thanks to Rainer Dörken).
+
+2003-06-10 Marcel Telka <marcel@telka.sk>
+
+ * src/bus/ixp425.c (ixp425_bus_width): Changed return value type (int -> unsigned int).
+ * src/bus/pxa2x0.c (pxa250_bus_width): Ditto.
+ * src/bus/sa1110.c (sa1110_bus_width): Ditto.
+ * src/bus/sh7727.c (sh7727_bus_width): Ditto.
+
+2003-06-06 Marcel Telka <marcel@telka.sk>
+
+ * src/bus/sh7727.c (bus_params_t): Fixed cs array length.
+ (setup_address): Removed address shift by BASE.
+ (sh7727_bus_read_end): Simplified CS handling.
+ (new_sh7727_bus): Fixed CS signal searching (thanks to Rainer Dörken).
+
+2003-06-03 Marcel Telka <marcel@telka.sk>
+
+ * include/cfi.h (detect_cfi): Macro removed.
+ * src/flash.c (flashcheck): Renamed detect_cfi to cfi_detect.
+
+2003-06-03 Marcel Telka <marcel@telka.sk>
+
+ * src/Makefile.am (jtag_LDADD): Added libbrux twice to resolve dependencies.
+ * src/jtag.c: Fixed cmd.h include path.
+
+2003-06-03 Marcel Telka <marcel@telka.sk>
+
+ * src/cmd/Makefile.am (libcmd_a_SOURCES): Removed quit.c, help.c, and detectflash.c.
+ * src/cmd/cmd.c (cmd_run, cmd_params, cmd_get_number): Functions moved to module libbrux,
+ file cmd/cmd.c.
+ * src/cmd/detectflash.c: File moved to module libbrux, directory cmd.
+ * src/cmd/help.c: Ditto.
+ * src/cmd/quit.c: Ditto.
+
+2003-06-03 Marcel Telka <marcel@telka.sk>
+
+ * include/Makefile.am (noinst_HEADERS): Added cmd.h.
+ * include/cmd.h: New file.
+ * src/cmd/Makefile.am (libcmd_a_SOURCES): Removed cmd.h.
+ * src/cmd/cmd.h: File removed. Partially moved to include module (file brux/cmd.h).
+
+ * src/cmd/detectflash.c (cmd_detectflash_help): Changed help text.
+
+2003-06-03 Marcel Telka <marcel@telka.sk>
+
+ * src/readmem.c (detectflash): Function extracted to module libbrux, file flash/detectflash.c.
+
+2003-06-03 Marcel Telka <marcel@telka.sk>
+
+ * include/jtag.h (detectflash, flashmem, flashmsbin): Declarations moved to include module,
+ file brux/flash.h.
+
+2003-06-03 Marcel Telka <marcel@telka.sk>
+
+ * src/cmd/cable.c (cmd_cable_run): Added bus deallocation.
+ * src/cmd/detectflash.c (cmd_detectflash_run): Removed cable connection test.
+ * src/cmd/flashmem.c (cmd_flashmem_run): Ditto.
+ * src/cmd/peekpoke.c (cmd_peek_run, cmd_poke_run): Ditto.
+ * src/cmd/readmem.c (cmd_readmem_run): Ditto.
+
+2003-06-03 Marcel Telka <marcel@telka.sk>
+
+ * src/flash.c (flashmsbin, flashmem): Removed '\r' from translatable messages.
+ * src/readmem.c (readmem): Ditto.
+
+2003-06-03 Marcel Telka <marcel@telka.sk>
+
+ * src/cmd/Makefile.am (libcmd_a_SOURCES): Added peekpoke.c (patch 747447, Matan Ziv-Av).
+ * src/cmd/cmd.c (cmds): Added peek and poke commands (patch 747447, Matan Ziv-Av).
+ * src/cmd/peekpoke.c: New file (patch 747447, Matan Ziv-Av).
+ * po/POTFILES.in: Updated.
+
+ * include/bus.h (bus_t): Declaration moved to include module (brux/bus.h).
+ * include/cfi.h (cfi_chip_t, cfi_array_t, cfi_array_free, detect_cfi): Declarations moved
+ to include module (brux/cfi.h).
+
+2003-06-02 Marcel Telka <marcel@telka.sk>
+
+ * Makefile.am (SUBDIRS): Added libbrux.
+ * configure.ac (AC_CONFIG_FILES): Removed src/flash/Makefile.
+ (AC_CONFIG_SUBDIRS): Added libbrux.
+ * src/Makefile.am (SUBDIRS): Removed flash.
+ (jtag_DEPENDENCIES): Removed flash/libflash.a, added ../libbrux/libbrux.a.
+ (jtag_LDADD): Removed libflash, added libbrux.
+ * src/flash/Makefile.am: File removed.
+ * src/flash/amd.c: File moved to module libbrux, directory flash.
+ * src/flash/cfi.c: Ditto.
+ * src/flash/intel.c: Ditto.
+
+2003-05-30 Marcel Telka <marcel@telka.sk>
+
+ * src/tap/parport/direct.c (direct_set_control): Inverted SELECT, AUTOFD, and STROBE
+ signals (bug 745824).
+ * src/tap/parport/ppdev.c (ppdev_set_control): Ditto.
+ * src/tap/cable/mpcbdm.c (mpcbdm_init, mpcbdm_set_trst): Changed (inverted) TRST handling.
+ (mpcbdm_clock, mpcbdm_get_tdo): Removed TRST setting.
+
+2003-05-29 Marcel Telka <marcel@telka.sk>
+
+ Version 0.4 released.
+
+2003-05-29 Marcel Telka <marcel@telka.sk>
+
+ * src/bsdl2jtag.c (main): Renamed 'pin' keyword to 'signal'.
+ * src/part/parse.c (read_part): Added support for 'signal' keyword.
+
+ * data/Makefile.am (nobase_dist_pkgdata_DATA): Added new files.
+ * data/dec/PARTS: New file.
+ * data/dec/sa1100/STEPPINGS: New file (thanks to Jachym Holecek).
+ * data/dec/sa1100/sa1100: New file.
+
+2003-05-28 Marcel Telka <marcel@telka.sk>
+
+ * configure.ac (AC_INIT): Changed version number to 0.4.
+
+ * src/cmd/frequency.c (cmd_frequency_run): Added support for printing current TCK frequency.
+ (cmd_frequency_help): Updated help text.
+
+ * po/POTFILES.in: Updated.
+ * src/detect.c (find_record, detect_parts): Marked messages for translation.
+ * src/discovery.c (detect_register_size, discovery): Ditto.
+ * src/flash.c (set_flash_driver, flashcheck, flashmsbin, flashmem): Ditto.
+ * src/readmem.c (readmem): Ditto.
+ * src/flash/amd.c (amd_flash_print_info, amd_32_flash_driver): Ditto.
+ * src/flash/intel.c (_intel_flash_print_info, intel_flash_erase_block, intel_flash_unlock_block)
+ (intel_flash_program, intel_32_flash_driver, intel_16_flash_driver): Ditto.
+ * src/tap/cable/arcom.c (arcom_cable_driver): Ditto.
+ * src/tap/cable/byteblaster.c (byteblaster_cable_driver): Ditto.
+ * src/tap/cable/dlc5.c (dlc5_cable_driver): Ditto.
+ * src/tap/cable/ea253.c (ea253_cable_driver): Ditto.
+ * src/tap/cable/ei012.c (ei012_cable_driver): Ditto.
+ * src/tap/cable/keithkoep.c (keithkoep_cable_driver): Ditto.
+ * src/tap/cable/mpcbdm.c (mpcbdm_cable_driver): Ditto.
+ * src/tap/cable/wiggler.c (wiggler_cable_driver): Ditto.
+
+2003-05-27 Marcel Telka <marcel@telka.sk>
+
+ * src/part/part.c (part_set_signal, part_get_signal): Moved variable declarations to beginning
+ of a block (Matan Ziv-Av).
+
+2003-05-26 Marcel Telka <marcel@telka.sk>
+
+ * include/bus.h (new_sh7727_bus): Added function declaration.
+ * src/cmd/detect.c (cmd_detect_run): Added bus driver for Hitachi SH7727.
+ * src/bus/Makefile.am (libbus_a_SOURCES): Added sh7727.c (patch 743140, Matan Ziv-Av).
+ * src/bus/sh7727.c: New file (based on patch 743140, Matan Ziv-Av).
+
+2003-05-26 Marcel Telka <marcel@telka.sk>
+
+ * include/chain.h (chain_shift_data_registers): Added new parameter `capture_output' (idea from
+ patch 743146, Matan Ziv-Av).
+ * src/tap/chain.c (chain_shift_data_registers): Ditto.
+ All chain_shift_data_registers() function callers updated.
+
+2003-05-26 Marcel Telka <marcel@telka.sk>
+
+ * data/Makefile.am (nobase_dist_pkgdata_DATA): Added broadcom/bcm5421s/STEPPINGS
+ and broadcom/bcm5421s/bcm5421s.
+ * data/MANUFACTURERS: Added new manufacturer ID code for Boradcom (patch 743129, Matan Ziv-Av).
+ * data/broadcom/PARTS: Added entry for BC5421S (patch 743129, Matan Ziv-Av).
+ * data/broadcom/bcm5421s/STEPPINGS: New file (patch 743129, Matan Ziv-Av).
+ * data/broadcom/bcm5421s/bcm5421s: Ditto.
+
+2003-05-22 Marcel Telka <marcel@telka.sk>
+
+ * configure.ac (AM_CONFIG_HEADER): Renamed acconfig.h configuration header to pkgcfg.h.
+ * config.h: Ditto.
+
+2003-05-22 Marcel Telka <marcel@telka.sk>
+
+ * config.h: New file.
+ Changed all relevant source files to include this file unconditionaly.
+ * Makefile.am (noinst_HEADERS): Added config.h.
+ * configure.ac (AM_CONFIG_HEADER): Renamed generated configuration file
+ from config.h to acconfig.h.
+
+2003-05-22 Marcel Telka <marcel@telka.sk>
+
+ * src/jtag.c: Added new global variable 'big_endian'.
+ * include/jtag.h: Ditto.
+ * src/flash.c (flashmem): Added full support for little/big endian.
+ * src/readmem.c (readmem): Ditto.
+ * src/cmd/Makefile.am (libcmd_a_SOURCES): Added endian.c.
+ * src/cmd/cmd.c (cmds): Added new command 'endian'.
+ * src/cmd/endian.c: New file.
+
+2003-05-21 Marcel Telka <marcel@telka.sk>
+
+ * Makefile.rules: New file.
+ * Makefile.am: Added Makefile.rules include.
+ (EXTRA_DIST): Added Makefile.rules.
+ * data/Makefile.am: Added Makefile.rules include.
+ * doc/Makefile.am: Ditto.
+ * include/Makefile.am: Ditto.
+ * po/Makevars: Ditto.
+ * src/Makefile.am: Ditto.
+ * src/bus/Makefile.am: Ditto.
+ * src/cmd/Makefile.am: Ditto.
+ * src/flash/Makefile.am: Ditto.
+ * src/lib/Makefile.am: Ditto.
+ * src/part/Makefile.am: Ditto.
+ * src/tap/Makefile.am: Ditto.
+
+2003-05-21 Marcel Telka <marcel@telka.sk>
+
+ * include/signal.h: Renamed this file ...
+ * include/bssignal.h: ... to this one.
+ All includes changed.
+ * include/Makefile.am (noinst_HEADERS): Renamed signal.h to bssignal.h.
+
+ * include/data_register.h: Marked local include files with double quotes.
+ * include/instruction.h: Ditto.
+ * include/part.h: Ditto.
+
+2003-05-21 Marcel Telka <marcel@telka.sk>
+
+ * include/bsbit.h (bsbit, bsbit_t): Renamed typedef bsbit to bsbit_t.
+ All occurences of the bsbit type changed to bsbit_t.
+
+2003-05-21 Marcel Telka <marcel@telka.sk>
+
+ * include/part.h (part_find_signal): New function declaration.
+ (part_set_signal, part_get_signal): Changed parameter signal name to signal pointer.
+ * src/part/part.c (part_find_signal): New function.
+ (part_set_signal, part_get_signal): Removed signal searching, used supplied pointer to signal.
+ * po/POTFILES.in: Added src/bus/ixp425.c, src/bus/pxa2x0.c, and src/bus/sa1110.c.
+ * src/bus/ixp425.c (bus_params_t, select_flash, unselect_flash, setup_address, set_data_in)
+ (setup_data, ixp425_bus_read_start, ixp425_bus_read_next, ixp425_bus_read_end, ixp425_bus_write)
+ (new_ixp425_bus): Optimized signal searching to increase bus access speed.
+ * src/bus/pxa2x0.c (bus_params_t, setup_address, set_data_in, setup_data, pxa250_bus_read_start)
+ (pxa250_bus_read_next, pxa250_bus_read_end, pxa250_bus_write, new_pxa250_bus): Ditto.
+ * src/bus/sa1110.c (bus_params_t, setup_address, set_data_in, setup_data, sa1110_bus_read_start)
+ (sa1110_bus_read_next, sa1110_bus_read_end, sa1110_bus_write, new_sa1110_bus): Ditto.
+ (sa1110_bus_width): Updated part_get_signal() function call. Added explicit signal search.
+ * src/cmd/get.c (cmd_get_run): Ditto.
+ * src/cmd/set.c (cmd_set_run): Updated part_set_signal() function call. Added explicit signal search.
+
+2003-05-20 Marcel Telka <marcel@telka.sk>
+
+ * configure.ac (AC_CONFIG_FILES): Added src/cmd/Makefile.
+ * include/Makefile.am (noinst_HEADERS): Added jtag.h.
+ * include/jtag.h: New file.
+ * po/POTFILES.in: Updated.
+ * src/Makefile.am (SUBDIRS): Added cmd.
+ (jtag_SOURCES): Removed jtag.h and help.c.
+ (jtag_DEPENDENCIES): Added cmd/libcmd.a.
+ (jtag_LDADD): Added libcmd.
+ (INCLUDES): Removed JTAG_DATA_DIR.
+ * src/help.c: File removed.
+ * src/jtag.h: Ditto.
+ * src/jtag.c (jtag_parse_line): Removed command parsing and moved it to cmd directory.
+ (jtag_parse_file): Function is no longer static.
+ * src/cmd/Makefile.am: New file.
+ * src/cmd/cable.c: Ditto.
+ * src/cmd/cmd.c: Ditto.
+ * src/cmd/cmd.h: Ditto.
+ * src/cmd/detect.c: Ditto.
+ * src/cmd/detectflash.c: Ditto.
+ * src/cmd/discovery.c: Ditto.
+ * src/cmd/dr.c: Ditto.
+ * src/cmd/flashmem.c: Ditto.
+ * src/cmd/frequency.c: Ditto.
+ * src/cmd/get.c: Ditto.
+ * src/cmd/help.c: Ditto.
+ * src/cmd/instruction.c: Ditto.
+ * src/cmd/print.c: Ditto.
+ * src/cmd/quit.c: Ditto.
+ * src/cmd/readmem.c: Ditto.
+ * src/cmd/script.c: Ditto.
+ * src/cmd/set.c: Ditto.
+ * src/cmd/shift.c: Ditto.
+
+ * src/part/part.c (parts_print): Fixed header printing.
+
+2003-05-20 Marcel Telka <marcel@telka.sk>
+
+ * src/part/data_register.c: Added l10n support. Marked messages for translation.
+ * src/part/instruction.c: Ditto.
+ * src/part/parse.c: Ditto.
+ * po/POTFILES.in: Added above files.
+
+2003-05-19 Marcel Telka <marcel@telka.sk>
+
+ * src/tap/parport/ppdev.c (ppdev_get_status): Inverted BUSY signal value.
+
+ * include/cfi.h (cfi_chip_t, cfi_array_t): New typedefs.
+ (cfi_array_free): New function prototype.
+ (detect_cfi): Changed function prototype.
+ * include/flash.h (set_flash_driver): Removed function prototype.
+ * src/flash/cfi.c (BW16): Macro removed.
+ (read2): Function removed.
+ (cfi_array_free): New function.
+ (detect_cfi): Added code to detect all CFI chips on the data bus.
+ * src/flash.c (flashcheck): Removed bus width checking. Updated due changes in src/flash/cfi.c.
+ (flashmsbin): Updated due changes in src/flash/cfi.c. Removed memory leak.
+ * src/readmem.c: Added l10n support. Marked messages for translation.
+ (detectflash): Updated due changes in src/flash/cfi.c. Removed memory leak.
+ Removed flash driver setup.
+ * po/POTFILES.in: Added src/readmem.c.
+
+2003-05-16 Marcel Telka <marcel@telka.sk>
+
+ * include/part.h (part_print): New function declaration.
+ * src/part/part.c: Marked all user visible messages for translation.
+ (part_print): New function.
+ (parts_print): Simplified. Added part_print() call.
+ * po/POTFILES.in: Added src/part/part.c.
+
+ * src/Makefile.am (jtag_DEPENDENCIES): Added flash/libflash.a.
+
+2003-05-15 Marcel Telka <marcel@telka.sk>
+
+ * include/cfi.h (detect_cfi): Added new parameter `adr'.
+ All relevant functions and callers updated.
+
+2003-05-15 Marcel Telka <marcel@telka.sk>
+
+ * configure.ac (CPPFLAGS): Added path to the openwince include arm directory.
+ * include/bus.h (bus_width): Added new `adr' parameter for this macro.
+ All relevant functions and callers updated.
+
+ * src/bus/pxa2x0.c (bus_params_t): Added last_adr and MC_registers structure members.
+ (LAST_ADR, MC_pointer): New macros.
+ (pxa250_bus_read_start, pxa250_bus_read_next, pxa250_bus_read_end, pxa250_bus_write): Disabled
+ external bus cycles for addresses above 0x04000000.
+ (pxa250_bus_width): Removed some output messages. Implemented BOOT_DEF emulation.
+ (new_pxa250_bus): Implemented BOOT_DEF emulation.
+
+2003-05-14 Marcel Telka <marcel@telka.sk>
+
+ * include/Makefile.am (noinst_HEADERS): Added cfi.h.
+ * include/cfi.h: New file.
+ * src/jtag.h (detect_cfi): Removed function declaration.
+ * src/flash.c: Replaced jtag.h include with cfi.h.
+ * src/readmem.c: Ditto.
+
+ * src/flash/Makefile.am (libflash_a_SOURCES): Added cfi.c.
+ * src/Makefie.am (jtag_SOURCES): Removed cfi.c.
+ * src/cfi.c: Moved this file ...
+ * src/flash/cfi.c: ... here and replaced jtag.h include with cfi.h one.
+
+2003-05-14 Marcel Telka <marcel@telka.sk>
+
+ * include/part.h (part_t, parts_t): Macros removed.
+ * src/detect.c: Replaced obsolete types `parts' with `parts_t' and `part' with `part_t'.
+ * src/part/parse.c: Ditto.
+ * src/part/part.c: Ditto.
+
+2003-05-14 Marcel Telka <marcel@telka.sk>
+
+ * configure.ac (AC_CONFIG_FILES): Added src/flash/Makefile.
+ * include/Makefile.am (noinst_HEADERS): Added flash.h.
+ * src/Makefile.am (SUBDIRS): Added flash.
+ (jtag_SOURCES): Removed flash.h, flash-intel.c, and flash-amd.c.
+ (jtag_LDADD): Added libflash.
+ * src/flash-amd.c: Moved this file ...
+ * src/flash/amd.c: ... here.
+ * src/flash-intel.c: Moved this file ...
+ * src/flash/intel.c: ... here.
+ * src/flash.h: Moved this file ...
+ * include/flash.h: ...here.
+ * src/flash/Makefile.am: New file.
+
+2003-05-13 Marcel Telka <marcel@telka.sk>
+
+ * src/jtag.c (jtag_parse_file): Added support for command scripts from stdin.
+
+2003-04-29 Marcel Telka <marcel@telka.sk>
+
+ * data/MANUFACTURERS: Added new manufacturer: DEC.
+
+ * src/jtag.c (jtag_create_jtagdir): Changed permissions for jtag directory.
+
+ * include/part.h (part_alloc, read_part): Changed return type from `part *' to `part_t *'.
+ (struct parts): Changed parts member type from `part **' to `part_t **'.
+ (parts_alloc): Changed return type from `parts *' to `parts_t *'.
+ * src/bus/ixp425.c (select_flash, unselect_flash, setup_address, set_data_in, setup_data):
+ Changed first parameter type from `part *' to `part_t *'.
+ * src/bus/pxa250.c (setup_address, set_data_in, setup_data): Ditto.
+ * src/bus/sa1110.c (setup_address, set_data_in, setup_data): Ditto.
+
+ * include/bus.h: Replaced static bus_driver_t architecture with dynamic bus_t.
+ Removed direct chain_t dependency. Added `params' and `prepare' members.
+ All related functions' parameter types changed.
+ * src/bus/ixp425.c (bus_params_t): New structure typedef.
+ (CHAIN, PART): New macros.
+ (ixp425_bus_prepare, ixp425_bus_free, new_ixp425_bus): New functions.
+ (ixp425_bus_driver, ixp425_bus): Renamed `ixp425_bus_driver' to `ixp425_bus' and updated
+ for new bus driver architecture.
+ * src/bus/pxa250.c (bus_params_t): New structure typedef.
+ (CHAIN, PART): New macros.
+ (pxa250_bus_prepare, pxa250_bus_free, new_pxa250_bus): New functions.
+ (pxa250_bus_driver, pxa250_bus): Renamed `pxa250_bus_driver' to `pxa250_bus' and updated
+ for new bus driver architecture.
+ * src/bus/sa1110.c (bus_params_t): New structure typedef.
+ (CHAIN, PART): New macros.
+ (sa1110_bus_prepare, sa1110_bus_free, new_sa1110_bus): New functions.
+ (sa1110_bus_driver, sa1110_bus): Renamed `sa1110_bus_driver' to `sa1110_bus' and updated
+ for new bus driver architecture.
+ * src/readmem.c (detectflash, readmem): Moved JTAG chain initialization to bus->prepare().
+ * src/flash.c (flashcheck): Ditto.
+ (flashmsbin, flashmem): Removed BYPASS instruction setup.
+ * src/jtag.c (bus_driver, bus): Replaced `bus_driver' with `bus' global variable.
+ (jtag_parse_line, main): Added `bus' deallocation.
+ * src/flash.h (flash_driver_t): Changed parameter type for all function members from
+ `chain_t*' to `bus_t *'.
+ All function callers changed.
+
+2003-04-04 Marcel Telka <marcel@telka.sk>
+
+ Version 0.3.2 released.
+
+2003-04-04 Marcel Telka <marcel@telka.sk>
+
+ * data/xilinx/PARTS: Added XCR3256XL-FT256 (Jachym Holecek).
+ * data/xilinx/xcr3256xl-ft256/STEPPINGS: New file (Jachym Holecek).
+ * data/xilinx/xcr3256xl-ft256/xcr3256xl-ft256: Ditto.
+ * data/Makefile.am (nobase_dist_pkgdata_DATA): Added new files.
+
+2003-04-02 Marcel Telka <marcel@telka.sk>
+
+ * configure.ac (AC_INIT): Changed version number to 0.3.2.
+
+2003-04-02 Marcel Telka <marcel@telka.sk>
+
+ * include/signal.h: Changed signal typedef to signal_t (thanks to Jachym Holecek).
+ All `signal' instances renamed to `signal_t'.
+ * src/tap/parport.c: Ported to NetBSD/i386 (Jachym Holecek).
+ * src/tap/parport/direct.c (parport_drivers): Conditionally removed direct_parport_driver.
+ * configure.ac: Added test for i386_set_ioperm() function. Defined HAVE_IOPERM
+ and HAVE_I386_SET_IOPERM.
+
+2003-04-01 Marcel Telka <marcel@telka.sk>
+
+ * src/tap/cable/keithkoep.c: New file.
+ * src/tap/Makefile.am (libtap_a_SOURCES): Added cable/keithkoep.c.
+ * src/tap/cable.c (cable_drivers): Added keithkoep_cable_driver.
+
+2003-03-19 Marcel Telka <marcel@telka.sk>
+
+ Version 0.3.1 released.
+
+2003-03-19 Marcel Telka <marcel@telka.sk>
+
+ * configure.ac (AC_CONFIG_FILES): Added doc/Makefile.
+ * Makefile.am (SUBDIRS): Added doc.
+
+2003-03-18 Marcel Telka <marcel@telka.sk>
+
+ * src/tap/parport/direct.c (direct_connect): Fixed cable disconnecting loop.
+
+2003-03-18 Marcel Telka <marcel@telka.sk>
+
+ * src/jtag.c (jtag_parse_line) <script>: Added support for `quit' command in scripts.
+ (jtag_parse_rc): Ditto.
+ (jtag_parse_file): Added support for comments and `quit' command in scripts.
+ (main): Added command line parameter list execution as scripts.
+ * data/intel/pxa250/STEPPING: Added support for Intel PXA255 A0 (thanks to Mike Sprauve).
+ * configure.ac (AC_INIT): Changed version number to 0.3.1.
+
+2003-03-18 Marcel Telka <marcel@telka.sk>
+
+ * po/POTFILES.in: Added src/tap/parport/direct.c and src/tap/parport/ppdev.c.
+ * src/help.c (help) <cable>: Added help for `cable ppdev' command.
+ * src/tap/parport/ppdev.c (ppdev_open): Removed debug messages.
+ * src/jtag.c (jtag_parse_line) <cable>: Added chain_disconnect() call before
+ new cable connection.
+
+2003-03-18 Marcel Telka <marcel@telka.sk>
+
+ * configure.ac (AC_CHECK_HEADERS): Added test for linux/ppdev.h.
+ * src/tap/Makefile.am (libtap_a_SOURCES): Added parport/ppdev.c.
+ * src/tap/parport.c (parport_drivers): Added ppdev parport driver.
+ * src/tap/parport/ppdev.c: New file.
+
+2003-03-18 Marcel Telka <marcel@telka.sk>
+
+ * src/bsdl2jtag.c (endline): Removed compile warning.
+
+2003-03-18 Marcel Telka <marcel@telka.sk>
+
+ * include/parport.h: New file. Added parport driver support.
+ All cable drivers modified.
+ * src/tap/parport.c: Ditto.
+ * src/tap/parport/direct.c: Ditto.
+ * src/jtag.c (jtag_parse_line) <cable>: Added parport driver support.
+ * include/Makefile.am (noinst_HEADERS): Added parport.h.
+ * src/tap/cable/generic.c: New file withgGeneric functions for cable drivers.
+ All cable drivers modified.
+ * src/tap/cable/generic.h: Ditto.
+ * src/tap/Makefile.am (libtap_a_SOURCES): Added parport.c, parport/direct.c, cable/generic.h,
+ and cable/generic.c.
+
+ * include/cable.h: Added dynamic cable objects. Added cable interpose functions.
+ All callers changed.
+ * src/tap/cable.c: Ditto.
+
+ * include/chain.h (chain_connect): Function removed.
+ (chain_disconnect): New function.
+ * src/tap/chain.c (chain_free): Modified for chain_disconnect() call.
+ (chain_connect): Removed.
+ (chain_disconnect): New function.
+
+2003-03-17 Marcel Telka <marcel@telka.sk>
+
+ * src/Makefile.am (bin_PROGRAMS, bsdl2jtag_SOURCES): Added new bsdl2jtag conversion
+ tool (Matan Ziv-Av).
+ * src/bsdl2jtag.c: New file (Matan Ziv-Av).
+
+2003-03-14 Marcel Telka <marcel@telka.sk>
+
+ * configure.ac (CPPFLAGS): Added common include paths.
+ * src/Makefile.am (INCLUDES): Removed common include paths.
+ * src/bus/Makefile.am (INCLUDES): Ditto.
+ * src/part/Makefile.am (INCLUDES): Ditto.
+ * src/tap/Makefile.am (INCLUDES): Ditto.
+
+2003-03-13 Marcel Telka <marcel@telka.sk>
+
+ * configure.ac (AC_CONFIG_HEADERS): Replaced this `new' macro ...
+ (AM_CONFIG_HEADER): ... with this `old' one to make build compatible with automake-1.6.
+ (AM_GNU_GETTEXT_VERSION): Relaxed version number from 0.11.5 to 0.11.4.
+ * src/Makefile.am (jtag_LDADD): Added LIBINTL.
+ (LIBS): Removed LIBINTL.
+ (DEFS): Removed whole content ...
+ (INCLUDE): ... and added it here.
+
+2003-03-13 Marcel Telka <marcel@telka.sk>
+
+ * include/chain.h: New file.
+ * src/tap/chain.c: Ditto.
+ * src/tap/Makefile.am (libtap_a_SOURCES): Added chain.c.
+ * include/Makefile.am (noinst_HEADERS): Added chain.h.
+ * src/jtag.c: Encapsulated parts, cable and TAP state into one object - chain.
+ All relevant function parameters changed to `chain'.
+ * src/tap/state.c: `trst' state moved to cable drivers.
+ All cable drivers changed.
+ * include/cable.h (cable_driver_t) <set_trst>: Changed return value from void to int.
+ All cable drivers changed.
+ (cable_driver_t) <get_trst>: New function.
+ Implemented this function to all cable drivers.
+ * include/part.h (part_shift_instruction, part_shift_data_register)
+ (parts_shift_instructions, parts_shift_data_registers): Funcions removed.
+ * src/part/part.c (part_shift_instruction, part_shift_data_register)
+ (parts_shift_instructions, parts_shift_data_registers): Ditto.
+ * src/tap/cable/arcom.c: Removed dependency on state.h.
+ * src/tap/cable/byteblaster.c: Ditto.
+ * src/tap/cable/dlc5.c: Ditto.
+ * src/tap/cable/ea253.c: Ditto.
+ * src/tap/cable/ei012.c: Ditto.
+ * src/tap/cable/mpcbdm.c: Ditto.
+ * src/tap/cable/wiggler.c: Ditto.
+
+ * include/state.h (bit): Replaced with common.h include.
+ (Unknown_State, Run_Test_Idle, Select_DR_Scan, Select_IR_Scan): Removed parentheses.
+ * include/tap.h (write_command): Removed unused declaration.
+
+ * src/detect.h: Removed file.
+ * src/jtag.h: New file with common jtag function declarations.
+ * src/Makefile.am (jtag_SOURCES): Removed detect.h, added jtag.h.
+ * src/cfi.c: Added jtag.h include. Moved common function declarations to jtag.h file.
+ * src/detect.c: Ditto.
+ * src/discovery.c: Ditto.
+ * src/flash.c: Ditto.
+ * src/help.c: Ditto.
+ * src/jtag.c: Ditto.
+ * src/readmem.c: Ditto.
+
+ * src/jtag.c (jtag_create_jtagdir, jtag_load_history, jtag_save_history, jtag_parse_line)
+ (jtag_readline_loop, jtag_parse_file, jtag_parse_rc): Changed functions to `static'.
+
+ * src/tap/tap.c: Added l10n support.
+ * po/POTFILES.in: Added src/tap/chain.c and src/tap/tap.c.
+
+2003-03-13 Marcel Telka <marcel@telka.sk>
+
+ * include/part.h: Renamed types part to part_t, parts to parts_t,
+ tap_register to tap_register_t.
+ * include/register.h: Renamed tap_register type to tap_register_t.
+
+2003-03-11 Marcel Telka <marcel@telka.sk>
+
+ * configure.ac: Improved openwince include package detection.
+
+2003-03-07 Marcel Telka <marcel@telka.sk>
+
+ * src/lib/getdelim.c: Added unistd.h include for ssize_t.
+ * src/lib/getline.c: Ditto.
+
+2003-03-06 Marcel Telka <marcel@telka.sk>
+
+ * configure.ac: Added test for readline library.
+ * src/Makefile.am (jtag_LDADD): Removed readline and ncurses.
+
+2003-03-06 Marcel Telka <marcel@telka.sk>
+
+ * autogen.sh: Added test for autoreconf fail.
+
+2003-02-25 Marcel Telka <marcel@telka.sk>
+
+ Version 0.3 released.
+
+2003-02-25 Marcel Telka <marcel@telka.sk>
+
+ * src/tap/cable.c: Added config.h include.
+
+2003-02-25 Marcel Telka <marcel@telka.sk>
+
+ * data/MANUFACTURERS: Added Hitachi (Matan Ziv-Av).
+ * data/Makefile.am (nobase_dist_pkgdata_DATA): Added Hitachi SH7727
+ files (Matan Ziv-Av).
+ * data/hitachi/PARTS: New file (Matan Ziv-Av).
+ * data/hitachi/sh7727/STEPPINGS: Ditto.
+ * data/hitachi/sh7727/sh7727: Ditto.
+
+2003-02-25 Marcel Telka <marcel@telka.sk>
+
+ * data/MANUFACTURERS: Added Broadcom (Matan Ziv-Av).
+ * data/Makefile.am (nobase_dist_pkgdata_DATA): Added Broadcom BCM1250
+ files (Matan Ziv-Av).
+ * data/broadcom/PARTS: New file (Matan Ziv-Av).
+ * data/broadcom/bcm1250/STEPPINGS: Ditto.
+ * data/broadcom/bcm1250/bcm1250: Ditto.
+
+2003-02-21 Marcel Telka <marcel@telka.sk>
+
+ * src/help.c (help): Marked translatable strings.
+ * src/jtag.c (jtag_parse_line): Ditto.
+ (jtag_parse_file): Ditto.
+ (main): Ditto.
+ * po/POTFILES.in: Added src/help.c and src/jtag.c.
+
+2003-02-21 Marcel Telka <marcel@telka.sk>
+
+ * src/jtag.c (main): Added conditional compilation for l10n.
+
+2003-02-20 Marcel Telka <marcel@telka.sk>
+
+ * src/Makefile.am (jtag_SOURCES): Added missing flash.h.
+ * src/jtag.c: Added missing string.h include. Moved gettext.h include
+ to the top level of the include list.
+ * src/help.c: Moved gettext.h include to the top level of the include list.
+
+2003-02-20 Marcel Telka <marcel@telka.sk>
+
+ * Makefile.am (SUBDIRS): Removed intl.
+ * autogen.sh: Replaced subsequent call of auto* tools with autoreconf one.
+ * configure.ac (AC_CONFIG_FILES): Removed intl/Makefile.
+ (AM_GNU_GETTTEXT): Added 'external' parameter.
+
+2003-02-19 Marcel Telka <marcel@telka.sk>
+
+ * configure.ac (AC_CONFIG_HEADERS): Added new macro with config.h.
+ * autogen.sh: Added autoheader invocation.
+
+2003-02-18 Marcel Telka <marcel@telka.sk>
+
+ * include/Makefile.am (noinst_HEADERS): Added gettext.h.
+
+2003-02-18 Marcel Telka <marcel@telka.sk>
+
+ * autogen.sh: Added autopoint call. Added '-I m4' parameter for aclocal.
+ * Makefile.am (SUBDIRS): Added intl, include and po.
+ (DIST_SUBDIRS): Removed.
+ (ACLOCAL_AMFLAGS): Added '-I m4'.
+ * configure.ac (AC_INIT): Changed version number to 0.3.
+ (AC_CONFIG_FILES): Added intl/Makefile and po/Makefile.in.
+ (AM_GNU_GETTEXT): Added.
+ (AM_GNU_GETTEXT_VERSION): Added with version 0.11.5.
+ * include/gettext.h: Copied new file from gettext share.
+ * po/LINGUAS: Added new empty file.
+ * po/Makevars: Added new file.
+ * po/POTFILES.in: Added new empty file.
+ * src/Makefile.am (INCLUDES): Removed JTAG_DATA_DIR.
+ (localedir): Added path to locale directory.
+ (DEFS): Added JTAG_DATA_DIR and LOCALEDIR.
+ (LIBS): Added LIBINTL.
+ * src/help.c: Included gettext.h.
+ * src/jtag.c: Included gettext.h.
+ (main): Added l10n support.
+
+2003-02-18 Marcel Telka <marcel@telka.sk>
+
+ * src/flash.c (flashmsbin): Changed flash error message.
+ (flashmem): Changed output messages. Enabled verify for 2 x 16, not
+ for 1 x 16. Added better end of file test for verify.
+
+2003-02-18 Marcel Telka <marcel@telka.sk>
+
+ * configure.ac (AC_CONFIG_FILES): Added src/bus/Makefile.
+ * src/bus.h: Moved this file...
+ * include/bus.h: ...here.
+ * include/Makefile.am (noinst_HEADERS): Added bus.h.
+ * src/ixp425.c: Moved this file...
+ * src/bus/ixp425.c: ...here.
+ * src/pxa250.c: Moved this file...
+ * src/bus/pxa2x0.c: ...here.
+ * src/sa1110.c: Moved this file...
+ * src/bus/sa1110.c: ...here.
+ * src/bus/Makefile.am: New file.
+ * src/Makefile.am (SUBDIRS): Added bus.
+ (jtag_SOURCES): Removed bus.h, ixp425.c, pxa250.c, sa1110.c.
+ (jtag_DEPENDENCIES): Added libbus.a.
+ (jtag_LDADD): Ditto.
+
+2003-02-18 Marcel Telka <marcel@telka.sk>
+
+ * src/tap/cable.c: Added <sys/types.h> include for useconds_t on some systems.
+ * src/flash-amd.c (amdstatus29): Disabled unused function.
+ (amdisprotected): Ditto.
+
+2003-02-17 Marcel Telka <marcel@telka.sk>
+
+ * src/jtag.c (jtag_parse_line): Fixed segfault for 'set' command.
+
+2003-02-17 Marcel Telka <marcel@telka.sk>
+
+ * src/jtag.c (jtag_parse_line): Added new 'get signal' command.
+ * src/help.c (help): Added help for new 'get signal' command.
+
+2003-02-17 Marcel Telka <marcel@telka.sk>
+
+ * data/intel/pxa250/pxa250: Changed comment.
+ * data/intel/pxa250/pxa250c0: Ditto.
+
+2003-02-17 Marcel Telka <marcel@telka.sk>
+
+ * src/help.c (help): Added help for new command 'script'.
+
+2003-02-17 Marcel Telka <marcel@telka.sk>
+
+ * src/flash-intel.c (intel_flash_autodetect): Fixed Intel flash algorithm Id.
+ (intel_flash_autodetect32): Ditto.
+
+2003-02-17 Marcel Telka <marcel@telka.sk>
+
+ * configure.ac (AC_CHECK_FUNCS): Added getdelim and getline.
+ (AC_CONFIG_FILES): Added src/lib/Makefile.
+ * src/Makefile.am (SUBDIRS): Added lib.
+ (jtag_DEPENDENCIES): Added libjtaglib.a.
+ (jtag_LDADD): Ditto.
+ * src/jtag.c: Added portable getline() declaration.
+ * src/lib/Makefile.am: New file.
+ * src/lib/getdelim.c: Ditto.
+ * src/lib/getline.c: Ditto.
+
+2003-02-16 Marcel Telka <marcel@telka.sk>
+
+ * src/jtag.c (jtag_creae_jtagdir): New function (Alessandro Zummo).
+ (jtag_load_history): Ditto.
+ (jtag_save_history): Ditto.
+ (jtag_readline_loop): Ditto.
+ (jtag_parse_file): Ditto.
+ (jtag_parse_rc): Ditto.
+ (jtag_parse_line): New funcion, content extracted from main function, added new
+ 'script' command (Alessandro Zummo).
+ (main): Moved parsing capability to jtag_parse_line function (Alessandro Zummo).
+
+2003-02-16 Marcel Telka <marcel@telka.sk>
+
+ * src/flash.c (flash_drivers): Added missing 1 x 16 Intel flash driver.
+
+2003-02-16 Marcel Telka <marcel@telka.sk>
+
+ * src/jtag.c (main): Corrected error message for 'instruction' command and added
+ a notice when an instruction is unknown (Alessandro Zummo).
+
+2003-02-16 Marcel Telka <marcel@telka.sk>
+
+ * src/jtag.c (main): Fixed segfault in 'detectflash'. Thanks to August Hörandl
+ for reporting this issue.
+
+2003-02-16 Marcel Telka <marcel@telka.sk>
+
+ * src/Makefile.am (jtag_SOURCES): Added new flash files with flash driver
+ framework (August Hörandl).
+ * src/flash-amd.c: New file with AMD flash support (August Hörandl).
+ * src/flash-intel.c: New file. Extracted Intel flash support from src/flash.c
+ file (August Hörandl, me).
+ * src/flash.c (set_flash_driver): New function. Added support for flash
+ drivers (August Hörandl).
+ (flashceck): Ditto.
+ (flashmsbin): Added support for flash driver (August Hörandl).
+ (flashmem): Ditto.
+ (flash_erase_block): Function moved to src/flash-intel.c (August Hörandl).
+ (flash_unlock_block): Ditto.
+ (flash_program): Ditto.
+ (flash_erase_block32): Ditto.
+ (flash_unlock_block32): Ditto.
+ (flash_program32): Ditto.
+ * src/flash.h: New file. Interface for flash drivers (August Hörandl).
+ * src/help.c (help): Added list of supported flash drivers for 'flashmem'
+ command (August Hörandl).
+ * src/readmem.c (detectflash): Removed Intel specific code. Enhanced output
+ messages (August Hörandl).
+
+2003-02-14 Marcel Telka <marcel@telka.sk>
+
+ * src/jtag.c (jtag): Added command history load/save support (August Hörandl).
+
+2003-02-14 Marcel Telka <marcel@telka.sk>
+
+ * src/readmem.c (readmem): Added support for 1 x 16 bit memory configuration and
+ buffered file writes (Christian Pellegrin).
+ * src/flash.c (flashmem): Added support for 1 x 16 bit flash configuration and
+ buffered file reads (Christian Pellegrin).
+ (flash_erase_block): Added debug messages (Christian Pellegrin).
+ (flash_unlock_block): Added debug message (Christian Pellegrin).
+ (flash_program): Ditto.
+
+2003-02-14 Marcel Telka <marcel@telka.sk>
+
+ * src/cfi.c (detect_cfi): Added support for 1 x 16 bit flash configuration (Christian
+ Pellegrin).
+ * src/detect.c (find_record): Added error message if file cannot be opened (Christian
+ Pellegrin).
+
+2003-02-14 Marcel Telka <marcel@telka.sk>
+
+ * data/xilinx/xc2c256-tq144/xc2c256-tq144: Added JTAG declarations for Xilinx
+ XC2C256-TQ144 (Alessandro Zummo).
+ * data/xilinx/xc2c256-tq144/STEPPINGS: Ditto.
+ * data/xilinx/PARTS: Ditto.
+ * data/Makefile.am: Ditto.
+
+2003-02-14 Marcel Telka <marcel@telka.sk>
+
+ * src/ixp425.c (setup_address): Removed set_gpio() call.
+ (set_gpio): Removed unused function.
+
+2003-02-13 Marcel Telka <marcel@telka.sk>
+
+ * src/ixp425.c: Added bus driver for Intel IXP425 (Christian Pellegrin).
+ * src/bus.h: Ditto.
+ * src/jtag.c (main): Ditto.
+ * src/Makefile.am (jtag_SOURCES): Added ixp425.c (Christian Pellegrin).
+
+2003-02-13 Marcel Telka <marcel@telka.sk>
+
+ * data/intel/ixp425/ixp425: Added JTAG declarations for Intel IXP425 (Christian
+ Pellegrin).
+ * data/intel/ixp425/STEPPINGS: Ditto.
+ * data/intel/PARTS: Ditto.
+ * data/Makefile.am: Ditto.
+
+2003-02-13 Marcel Telka <marcel@telka.sk>
+
+ * include/bsbit.h (BSBIT_BIDIR): Added new macro (Christian Pellegrin).
+ * src/part/bsbit.c (bsbit_alloc): Added support for bidirectional pins (Christian
+ Pellegrin).
+ * src/part/parse.ci (read_part): Ditto.
+
+2003-02-10 Marcel Telka <marcel@telka.sk>
+
+ * src/sa1110.c (sa1110_bus_read_start): Added support for all six static memory banks.
+ The function is now 'static'.
+ (sa1110_bus_read_end): Ditto.
+ (sa1110_bus_read_next): The function is now 'static'.
+ (sa1110_bus_read): Ditto.
+ (sa1110_bus_width): Ditto.
+ (sa1110_bus_write): Added support for all six static memory banks (bug 682660).
+ The function is now 'static'.
+
+2003-02-07 Marcel Telka <marcel@telka.sk>
+
+ * src/tap/cable/arcom.c: Added support for Arcom JTAG Cable (patch 682310,
+ Ian Campbell).
+ * src/tap/cable.c: Ditto.
+ * src/tap/Makefile.am: Ditto.
+
+2003-02-07 Marcel Telka <marcel@telka.sk>
+
+ * src/tap/cable/mpcbdm.c (mpcbdm_clock): Fixed port address for TRST & TRST1.
+
+2003-02-07 Marcel Telka <marcel@telka.sk>
+
+ * src/tap/cable/mpcbdm.c: Added support for Mpcbdm JTAG Cable (Christian Pellegrin).
+ * src/tap/cable.c: Ditto.
+ * src/tap/Makefile.am: Ditto.
+
+2003-02-04 Marcel Telka <marcel@telka.sk>
+
+ * src/help.c (help): Added missing short help description for 'set' command.
+ * src/jtag.c (main): Added test for uninitialized ps for 'set' command.
+ * src/tap/tap.c (tap_shift_register): Changed final state to Run-Test/Idle
+ for immediately propagation of the new BSR values.
+
+2003-02-04 Marcel Telka <marcel@telka.sk>
+
+ * src/jtag.c (main): Added more checks for syntax errors. Added support for
+ printing input data registers - command 'dr'. Added 'set signal'
+ command.
+ * src/help.c (help): Updated help for 'dr' command, added help for 'set
+ signal.
+
+2003-02-04 Marcel Telka <marcel@telka.sk>
+
+ Version 0.2.2 released.
+
+2003-02-04 Marcel Telka <marcel@telka.sk>
+
+ * configure.ac: Changed version number to 0.2.2.
+
+2003-02-04 Marcel Telka <marcel@telka.sk>
+
+ * src/flash.c (flashmsbin): Changed instructions to BYPASS after successfull
+ flash.
+ (flashmem): Ditto.
+
+2003-01-30 Marcel Telka <marcel@telka.sk>
+
+ * src/tap/cable/byteblaster.c (byteblaster_init): Added support for
+ parallel ports with I/O addresses above 0x3FF.
+ (byteblaster_done): Ditto.
+ * src/tap/cable/dlc5.c (dlc5_init): Ditto.
+ (dlc5_done): Ditto.
+ * src/tap/cable/ea253.c (ea253_init): Ditto.
+ (ea253_done): Ditto.
+ * src/tap/cable/ei012.c (ei012_init): Ditto.
+ (ei012_done): Ditto.
+ * src/tap/cable/wiggler.c (wiggler_init): Ditto.
+ (wiggler_done): Ditto.
+
+2003-01-19 Marcel Telka <marcel@telka.sk>
+
+ * configure.ac: Added AC_GNU_SOURCE.
+
+2003-01-18 Marcel Telka <marcel@telka.sk>
+
+ * src/jtag.c (main): Added new 'frequency' command.
+ * src/help.c (help): Added help for 'frequency' command.
+ * include/cable.h (cable_wait): Added new function prototype.
+ * src/tap/cable.c (cable_wait): Added new function.
+ * src/tap/cable/byteblaster.c (byteblaster_clock): Added support for TCK
+ frequency limit.
+ (byteblaster_get_tdo): Ditto.
+ * src/tap/cable/dlc5.c (dlc5_clock): Ditto.
+ (dlc5_get_tdo): Ditto.
+ * src/tap/cable/ea253.c (ea253_clock): Ditto.
+ (ea253_get_tdo): Ditto.
+ * src/tap/cable/ei012.c (ei012_clock): Ditto.
+ (ei012_get_tdo): Ditto.
+ * src/tap/cable/wiggler.c (wiggler_clock): Ditto.
+ (wiggler_get_tdo): Ditto.
+
+2003-01-16 Marcel Telka <marcel@telka.sk>
+
+ * data/MANUFACTURERS: Added Cypress (patch 669157). Thanks to Chris Ellec.
+
+2003-01-13 Marcel Telka <marcel@telka.sk>
+
+ Version 0.2.1 released.
+
+2003-01-13 Marcel Telka <marcel@telka.sk>
+
+ * include/state.h: Added new function tap_state_reset().
+ * src/tap/state.c (tap_state_reset): Ditto.
+ * src/tap/tap.c (tap_reset): Added explicit TAP state reset.
+
+2003-01-13 Marcel Telka <marcel@telka.sk>
+
+ * configure.ac: Changed version number to 0.2.1.
+
+2003-01-11 Marcel Telka <marcel@telka.sk>
+
+ * src/tap/cable/bytebaster.c: Added support for Altera ByteBlaster family cables.
+ * src/tap/cable.c: Ditto.
+ * src/tap/Makefile.am: Ditto.
+ * src/help.c (help): Increased space for cable short name.
+
+2003-01-11 Marcel Telka <marcel@telka.sk>
+
+ * src/tap/cable/wiggler.c: Added support for Macraigor Wiggler JTAG Cable (Stas Khirman).
+ * src/tap/cable.c: Ditto.
+ * src/tap/Makefile.am: Ditto.
+
+2003-01-10 Marcel Telka <marcel@telka.sk>
+
+ * src/tap/cable.c: Added missing stdlib.h include (bug 665923). Thanks to Chris Ellec.
+
+2003-01-09 Marcel Telka <marcel@telka.sk>
+
+ * src/jtag.c (main): Fixed minor typo in 'cable' output message.
+
+2003-01-09 Marcel Telka <marcel@telka.sk>
+
+ * src/discovery.c (detect_register_size): Changed register length test iteration.
+ Now the test iterates to MAX_REGISTER_LENGTH, not to MAX_REGISTER_LENGTH - 1.
+
+2003-01-08 Marcel Telka <marcel@telka.sk>
+
+ Version 0.2 released.
+
+2003-01-08 Marcel Telka <marcel@telka.sk>
+
+ * include/cable.h: Unified and simplified cable driver handling, added driver name
+ and driver description into driver interface structure.
+ * src/help.c (help): Ditto.
+ * src/jtag.c (main): Ditto.
+ * src/tap/Makefile.am: Ditto.
+ * src/tap/cable.c: Ditto.
+ * src/tap/cable/dlc5.c: Ditto.
+ * src/tap/cable/ea253.c: Ditto.
+ * src/tap/cable/ei012.c: Ditto.
+
+2003-01-08 Marcel Telka <marcel@telka.sk>
+
+ * include/cable.h: Added cable driver for ETC EI012 JTAG Cable.
+ * src/help.c (help): Ditto.
+ * src/jtag.c (main): Ditto.
+ * src/tap/Makefile.am: Ditto.
+ * src/tap/cable/ei012.c: Ditto.
+
+2003-01-08 Marcel Telka <marcel@telka.sk>
+
+ * configure.ac: Bumped version number to 0.2, added check-new and dist-bzip2
+ parameters to AM_INIT_AUTOMAKE() invocation.
+ * src/jtag.c: Updated year in initial banner.
+
+2003-01-08 Marcel Telka <marcel@telka.sk>
+
+ * include/cable.h: Added cable driver for Xilinx DLC5 JTAG Parallel Cable III.
+ * src/help.c (help): Ditto.
+ * src/jtag.c (main): Ditto.
+ * src/tap/Makefile.am: Ditto.
+ * src/tap/cable/dlc5.c: Ditto.
+
+2003-01-08 Marcel Telka <marcel@telka.sk>
+
+ * include/Makefile.am: Removed ctrl.h, added cable.h.
+ * include/ctrl.h: Removed obsolete file.
+ * include/cable.h: Added common declarations for JTAG cable drivers.
+ * src/detect.c: Replaced ctrl.h include with cable.h (JTAG cable driver support).
+ * src/discovery.c: Ditto.
+ * src/tap/tap.c: Ditto.
+ * src/help.c (help): Added help for new command 'cable'.
+ * src/jtag.c (main): Added support for JTAG cable drivers, added new command 'cable'.
+ * src/tap/Makefile.am: Removed ctrl.c, added cable/ea253.c, updated includes.
+ * src/tap/ctrl.c: Removed obsolete file.
+ * src/tap/state.c: Changed default TRST state to 1.
+ * src/tap/cable/ea253.c: Added driver for EA253 JTAG cable.
+
+2003-01-06 Marcel Telka <marcel@telka.sk>
+
+ * src/discovery.c (discovery): Fixed memory leaks, added out of memory test,
+ added test for invalid IR length.
+
+2003-01-05 Marcel Telka <marcel@telka.sk>
+
+ * include/register.h (register_inc, register_dec, register_shift_right,
+ register_shift_left): Added new functions.
+ * src/tap/register.c (register_inc, register_dec, register_shift_right,
+ register_shift_left): Ditto.
+ * src/Makefile.am: Added discovery.c file.
+ * src/discovery.c: Added new file with discovery() implementation.
+ * src/help.c (help): Added help for 'discovery' command.
+ * src/jtag.c (main): Added 'discovery' command.
+ * src/tap/tap.c (write_command): Removed unused function.
+
+2002-12-16 Marcel Telka <marcel@telka.sk>
+
+ * data/Makefile.am: Renamed intel/pxa250/pxa260 to intel/pxa250/pxa250c0.
+
+2002-12-11 Marcel Telka <marcel@telka.sk>
+
+ * data/intel/pxa250/STEPPINGS: Renamed file pxa260 to pxa250c0.
+ * data/intel/pxa260: Ditto.
+ * data/intel/pxa250c0: Ditto.
+
+2002-11-29 Marcel Telka <marcel@telka.sk>
+
+ * src/flash.c (flashmsbin, flashmem): Fixed crash if flash memory is not detected.
+ * src/readmem.c (detectflash): Ditto.
+
+2002-11-27 Marcel Telka <marcel@telka.sk>
+
+ * data/xilinx/xcr3128xl-cs144/xcr3128xl-cs144: Added pins and BSR bits.
+
+2002-11-26 Marcel Telka <marcel@telka.sk>
+
+ * data/xilinx/xcr3128xl-cs144/xcr3128xl-cs144: Added user-defined
+ instructions.
+
+2002-11-25 Marcel Telka <marcel@telka.sk>
+
+ Version 0.1 released.
+
+
+$Revision$
--- /dev/null
+#
+# $Id$
+#
+# Copyright (C) 2002 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Marcel Telka <marcel@telka.sk>, 2002.
+#
+
+include $(top_srcdir)/Makefile.rules
+
+SUBDIRS = \
+ doc \
+ include \
+ data \
+ src \
+ po
+
+DIST_SUBDIRS = \
+ $(SUBDIRS)
+
+noinst_HEADERS = \
+ sysdep.h
+
+EXTRA_DIST = \
+ Makefile.rules \
+ UrJTAG.nsi
+
+ACLOCAL_AMFLAGS = -I m4
+
--- /dev/null
+#
+# $Id$
+#
+# Copyright (C) 2003 ETC s.r.o.
+# Copyright (C) 2004 Marcel Telka
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Marcel Telka <marcel@telka.sk>, 2003, 2004.
+#
+
+lint:
+ -test "$(SOURCES)" && splint $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(SOURCES)
+ test -z "$(SUBDIRS)" || $(MAKE) RECURSIVE_TARGETS=lint-recursive $(AM_MAKEFLAGS) lint-recursive
+
+lint-am: Makefile @MAINTAINER_MODE_TRUE@ $(top_srcdir)/Makefile.rules
+
+.PHONY: lint lint-am
--- /dev/null
+$Id$
+
+urjtag-0.10
+
+ * Major internal improvements
+ - Flash write/program API function now operates on a buffer instead
+ of single bytes/words. Required for the multi-byte write mode.
+ (Arnim Laeuger)
+ - Limit maximum number of bytes queued for usbconn based cables.
+ Reduces the requested amount of memory for SVF runtest (Kolja Waschk)
+ - Command and methods to access JTAG signals directly, including
+ TRST and SRST (Sebastian Hesselbarth, Kolja Waschk, Arnim Laeuger)
+ * Improvements to the build system
+ - Several updates for Windows build compatability (Mike Frysinger)
+ - CPP include strategy sanitized (Mike Frysinger)
+ - Resolved formatting/printing mismatches (Mike Frysinger)
+ - bsdl2jtag program replaced by wrapper script (Arnim Laeuger)
+ - Man page updates (Uwe Hermann)
+ * Updates to the jtag command shell
+ - New usleep command (Stanislav Sinyagin)
+ - Added instruction parameter to the print command (Hartley Sweeten)
+ - Added ref_freq parameter to the svf command (Arnim Laeuger)
+ - New pod command (Kolja Waschk)
+ - Added noverify parameter to the flashmem command (Jeff Wittrock)
+ * Updates to the SVF player
+ - Optional reference frequency (Arnim Laeuger)
+ - Fix compare TDO flaw (Kolja Waschk)
+ - Fix progress indicator visibility (William)
+ - Add pass/fail report for progress reporting (Arnim Laeuger)
+ * New and updated bus drivers
+ - Support BCM6348/EJTAG 3.1 (by Andy Potter/livebox)
+ - Fixed address mode behvavior of prototype driver (Arnim Laeuger)
+ - Support foe EJTAG in DMA mode (Julien Aube)
+ - Added Goepel Boundary Scan Coach (Markus Schneider)
+ - Added additional address decoding for mpc5200 (Jeff Wittrock)
+ - General fix for part descriptions containing initbus (Arnim Laeuger)
+ - Support multiplexed bus operation for mpc5200 (Jon Smirl)
+ * New and updated cable drivers
+ - New FT2232 based cable ARM-USB-OCD TINY (Sebastian Hesselbarth)
+ - Parport calibration loop is more tolerant (Arnim Laeuger)
+ - Technology Systems TS-7800 support (Catalin Ionescu)
+ - New FT2232 based cable TinCanTools Flyswatter (Mark Norman)
+ - Added detection of InpOut32.dll and usage for I/O port access even
+ under Vista (Kolja Waschk)
+ - FT2232 MPSSE buffer increased to mitigate performance decrease (Arnim
+ Laeuger)
+ - Keep FTDI based JTAG dongles in current mode during initialization
+ (Holger Schurig)
+ - New FT2232 based cable UsbScarab2 (Tomek Cedro)
+ * Updated flash drivers
+ - Spansion S92GL chips added (Arnim Laeuger)
+ - Multi-byte write mode support for Intel and AMD chips (Arnim Laeuger)
+ - MX29LV640B recognition (Julien Aube)
+ - Fixed memory corruption from jedec code (Jon Smirl)
+ - Fix and polish flasherase implementation (Jeff Wittrock, Arnim Laeuger)
+ * Added new JTAG declarations for
+ - New steppings for BF527, BF533, BF548 (Mike Frysinger)
+ - New IDs for BF534 and BF548M (Mike Frysinger)
+ - Addes stepping for MPC5200B (Jeff Wittrock)
+ - Analog Devices Blackfin BF518 (Mike Frysinger)
+ - Atheros AR2313 flash access (snowwiehua)
+ - Atmel AVR32 clarifications (Holger Schurig)
+ - Broadcom BCM6358 / neufbox4 (Julien Aube)
+ - Lattice LC4064ZC (Catalin Ionescu)
+ - Lattice LFEC2-12E (Catalin Ionescu)
+ - Marvell 88E1118, 88F5182-A2 (Catalin Ionescu)
+ - Texas Instruments TNETV1060, TNETV1061 (Kenny)
+ * Updated documentation
+
+urjtag-0.9
+
+ * Completely rewritten BSDL parser, making it better maintainable,
+ extendable, and also adding support for IEEE 1532 extensions
+ (Arnim Laeuger)
+ * Major internal improvements
+ - Most if not all internal functions now take a pointer to the
+ chain configuration data as an argument, instead of using a
+ global "chain" variable. Needed for use as a library (Jie Zhang)
+ - Generally UrJTAG uses less global variables now (all)
+ - Added new "link driver" layer where previously only parport
+ was known; now there's a separate subsystem for USB cables,
+ named "usbconn". Due to the switch, some "cable" command
+ arguments for USB cables changed! (Arnim Laeuger, Kolja Waschk)
+ * Improvements to the build system
+ - Cable and link driver selection during ./configure (Arnim Laeuger)
+ - Fix building out of tree (Mike Frysinger)
+ - Support run-time relocatable UrJTAG (Mike Frysinger)
+ - Many improvements for building on Windows and generally on
+ other platforms (by Mike Frysinger)
+ - Support building under Mac OS X (Ville Voipio)
+ - Some initial work to support building in MinGW (Kolja Waschk)
+ * Updates to the jtag command shell
+ - Allow to disable startup message and quit upon EOF (Mike Frysinger)
+ - Allow customization of jtag prompt via env variable (Mike Frysinger)
+ - Don't add duplicate history lines (Uwe Bonnes)
+ - Fixes to handling of the "frequency" command (many contributors)
+ - Fix quitting when not using readline (Mike Frysinger)
+ - Fix some irritating warning messages even if there was nothing wrong
+ - New "idcode" command (Uwe Bonnes)
+ * Updates to the SVF player
+ - Added progress indicator (Steve Franks)
+ - Fix for RUNTEST command with SEC argument (Arnim Laeuger)
+ - Read TDO data from instruction shift (Arnim Laeuger)
+ * New and updated bus drivers
+ - General cleanup and malloc/free issues fixed (Hartley Sweeten)
+ - Added avr32 bus driver (Gabor Juhos)
+ - Added bf526,bf527,bf538 and bf548_ezkit bus driver (Jie Zhang)
+ - Added fjmem bus driver (A. Laeuger)
+ - Add 32 bit bus support for mpc824x (Eugene Boldenkov)
+ * New and updated cable drivers
+ - General cleanup and malloc/free issues fixed (Hartley Sweeten)
+ - Generic FT2232 driver improvements for performance and
+ stability (Arnim Laeuger)
+ - New FT2232 based cable BFIN-UJTAG/gnICE (Michael Hennerich)
+ - New Segger J-Link driver (not really functional yet) (Kolja Waschk)
+ - Xilinx XPCU cable driver now using fast GPIF transfers via vendor
+ request instead of bit banging (Kolja Waschk)
+ * Updated flash drivers
+ - Fix address shift (Jeff Wittrock)
+ - Fixes and better verbosity in flash drivers (Jie Zhang)
+ * Added new JTAG declarations for
+ - Analog Devices Blackfin BF527 (Jie Zhang)
+ - Atmel ATF1504ASV (Stefan Pledl)
+ - Atmel AT32AP7000 (Gabor Juhos)
+ * Updated documentation
+
+urjtag-0.8
+
+ * Integrated BSDL parser (Arnim Laeuger)
+ * Updates to the jtag command shell
+ - New "bsdl" command
+ - New "scan" command
+ - More flexible search algorithm for "include" and "script"
+ * New and updated bus drivers
+ - Added prototype bus driver (Detrick Martin)
+ - Added bus drivers for various Blackfin boards (Jie Zhang)
+ - Improvements in S3C4510B driver
+ * New and updated cable drivers (by A. Laeuger, unless noted otherwise)
+ - Wiggler driver with configurable pin mapping
+ - TRST/SRST and LED support in drivers for FT2232-based cables
+ - Vision EP9307 GPIO (Hartley Sweeten)
+ - Added new variants of FT2232-based cables
+ - Amontec JTAGkey (Laurent Gauch)
+ - OOCDLink-s
+ - Turtelizer 2
+ - USB to JTAG Interface
+ - Xverve DT-USB-ST Signalyzer Tool
+ * Numerous internal improvements
+ - activity queuing mechanism to speed up JTAG over USB
+ - simplified source directory layout; incorporated libbrux and inclow
+ - (hopefully) fixed problem with writing to dual-mode x8/x16 flash
+ - experimental (debug-only) new improved JEDEC flash detection
+ - improved linking with USB drivers in Cygwin environment
+ - several bug fixes and optimizations
+ * Added new JTAG declarations for
+ - Altera EP2C8 (Hartley Sweeten)
+ - Analog Devices Blackfin BF537, BF549, BF567 (Jie Zhang)
+ - Freescale MPC5241
+ - Xilinx XC2V80- XC2V250- and XC2V1000-FG256 (Alexander Didebulidze)
+ * Improved documentation
+ * Added JIM, a cable/part simulator for regression testing and demos
+
+urjtag-0.7 (2007-12-23)
+
+Also see libbrux/NEWS for more news, especially regarding the flash support.
+
+ * Integrated SVF player (Arnim Laeuger)
+ * Updates to the jtag command shell
+ - New writemem command to write to SRAM (Kent Palmkvist)
+ - New debug, test and shell commands, aliasing for parts
+ - Version output includes subversion revision number
+ - New command line options "version","help","norc"
+ - Improved diagnostics for bsdl2jtag, SVF player (Hein Roehrig)
+ - More error messages added to cmd/bit.c (Jerome Debard)
+ - More verbose output during flashmem (Jerome Debard)
+ - DR can be loaded interactively (Martin Buck)
+ - JTAG commands now parsed case insensitive (Andrew Dyer)
+ * New and updated bus drivers
+ - Added optional 'init' function to every bus driver
+ - Analog Devices Blackfin BF533 (Robin Getz)
+ - Analog Devices SHARC ADSP-21065L (Girish G.Pai,Lesly A.M,T.Nadackal,S.Abraham)
+ - Freescale MPC5200 (Asier Llano Palacios)
+ - IBM PPC405EP (Wojtek Kaniewski)
+ - Intel PXA2x0 (Cliff Brake, F.Rysanek)
+ - JOP.design Cyclone boards (Arnim Laeuger)
+ - Magnachip H7202 (Arnim Laeuger)
+ - Updated Samsung S3C4510 bus driver (Krysztof Blaszkowski)
+ - SLS Corp. UP3 (Kent Palmkvist)
+ - Zefant XS3 (Arnim Laeuger)
+ * New and updated cable drivers
+ - Cable command syntax changed to allow better integration of
+ non-parport-based cables (Laurent Pinchart)
+ - Added support for FreeBSD ppi interface
+ - Altera USB-Blaster and ixo.de usb_jtag (Kolja Waschk)
+ - EJTAG driver (Oleg)
+ - FT2232-based USB cables (Arnim Laeuger)
+ - IGLOO cable (Robin Getz)
+ - Xilinx Platform Cable USB (experimental) (Kolja Waschk)
+ - Fix for certain Wiggler cables (David Vrabel)
+ - Better diagnostics when opening ppdev (Hein Roehrig)
+ * Improved documentation:
+ - New doc/UrJTAG.txt
+ - Added man pages for jtag and bsdl2jtag
+ * Miscellaneous enhancements and fixes
+ - Improved timing and busy-loop waiting (Hein Roehrig)
+ - bidir support in bsdl2jtag (Wojtek Kaniewski)
+ - GCC4 Compilation fix (Asier Llano Palacios)
+ - Moved "libbrux" and "include" into jtag directory.
+ * Added new JTAG declarations for
+ - ADMtek ADM5120
+ - Altera EP1C6, EP1C12, EPM3064
+ - Analog Devices BF533, ADSP-21065L
+ - Atheros AR2312
+ - Atmel AT91SAM7S256
+ - Brecis MSP2006
+ - Freescale MPC5200
+ - Hitachi AR7300
+ - IBM PPC405EP
+ - Intel PXA270
+ - Lattice LC4128C
+ - Lexra LX5280
+ - Sharp LH7A400
+ - Xilinx XC18V04, XC2C256, XC2C64, xC2S200E, XC2S300E, XC3S..., XCF04S, XC9572XL
+
+jtag-0.6 (2007-11-02, never released officially; many derivatives in the wild)
+
+ * Created UrJTAG fork at http://www.urjtag.org
+ * Added new JTAG declarations for
+ - Hitachi HD64465
+ - Hitachi SH7729 (Beregnyei Balazs)
+ - Motorola MPC8245
+ - Broadcom BCM4712 (partial, Alan Wallace)
+ - Xilinx XCR3128XL-VQ100 (patch 1010714, Michael Lauer)
+ - Xilinx XCR3032XL-VQ44 (patch 972621, Andrew Dyer)
+ - Toshiba TX4925/TX4926 (patch 972621, Andrew Dyer)
+ - Sharp LH7A400 (patch 886068, Marko Rößler)
+ - IBM 440GX (patch 1012120, Jerome Debard)
+ - Lattice LC4032V (patch 1012120, Jerome Debard)
+ - Lattice M4A3-64/32 (patch 1012120, Jerome Debard)
+ - Lattice M4A3-256/192 (patch 1012120, Jerome Debard)
+ * Added new bus drivers:
+ - Motorola MPC824x
+ - AMD Alchemy Solutions Au1500 (patch 853883, Zhang Wei)
+ - Toshiba TX4925 (patch 972625, Andrew Dyer)
+ - IBM PowerPC 440GX (patch 1012154, Jerome Debard)
+ - Sharp LH7A400 (patch 886068, Marko Rößler)
+ * Added support for Lattice Parallel Port JTAG Cable (patch 1012138, Jerome Debard).
+ * Fixed pin assignment for Macraigor Wiggler JTAG Cable (patch 1040199, Andrew Dyer).
+ * Added new commands:
+ - 'salias' to define alias for a signal
+ - 'reset' to reset JTAG chain
+ * Explicit 'detectflash' command call is required before 'flashmem' command.
+ * Fixed minor bugs (including bug 857039).
+ * Fixed compiler error on Debian Woody (patch 986414, Martin Buck).
+ * Added support for different Intel IXP425 frequency variants (patch 1030647, Trevor Man).
+ * Rewritten and improved startup sequence to distinguish between interactive invocation
+ and stdin input (fixed bug 858535, thanks to Andrew Dyer for an idea).
+ * Removed support for parameter '-' (stdin).
+ * New translations:
+ - French (Michel Robitaille)
+ - Kinyarwanda (Steven Michael Murphy)
+
+jtag-0.5.1 (2003-10-11):
+
+ * Added new JTAG declarations for
+ - Altera EP1C20F400 (Rojhalat Ibrahim)
+ - Altera EPM7128AETC100 (Rojhalat Ibrahim)
+ * Added additional checks for valid ByteBlaster cable connection and enabled all variants
+ of the cable (patch 793313, Rojhalat Ibrahim).
+ * Used real data bus width for data reading in PXA2x0, SA1110, and SH7727 bus drivers
+ (based on patch 792591, thanks to Guennadi Liakhovetski).
+ * Added 'initbus' command to allow dynamic bus driver loading.
+ * Added support for flashes with multiple block erase regions for 'flashmem' (Bradley D. LaRonde).
+ * Added BOOT_DEF register emulation for PXA2x0 bus driver.
+ * Fixed inverted TRST signal for Macraigor Wiggler JTAG Cable see patch 799377 for more info,
+ thanks to Mike Tesch for reporting).
+ * Added Ka-Ro TRITON (PXA255/250) JTAG Cable driver (patch 805103, Andreas Mohr).
+ * Spelling and documentation fixes (patch 805108, Andreas Mohr).
+ * Fixed minor bugs.
+ * Updated translations:
+ - Slovak
+
+jtag-0.5 (2003-08-19):
+
+ * Fixed bug with SELECT, AUTOFD, and STROBE signals handling (bug 745824).
+ * Added new commands 'peek' and 'poke' (patch 747447, Matan Ziv-Av).
+ * Fixed bugs in SH7727 bus driver (thanks to Rainer Dörken).
+ * Added bus drivers for Hitachi SH7750R and Broadcom BCM1250 (patch 753300, Matan Ziv-Av).
+ * Added bus driver for Hitachi SH7751R (patch 773533, Matan Ziv-Av).
+ * Added bus width detection using MD3 and MD4 signals in SH7727 bus driver
+ (thanks to Rainer Dörken).
+ * Changes in 'discovery' command:
+ - removed explicit JTAG chain length detection (patch 753298, Matan Ziv-Av)
+ - simplified output messages
+ - removed support for report results to file
+ * Added new command 'part', syntax changes for 'set', 'get', 'dr', 'instruction', and
+ 'print' commands.
+ * Added support for multiple buses, added new 'bus' command to change active bus.
+ * Added initial JTAG declarations for Broadcom BCM3310 (see support request 770145 for
+ more info, thanks to Ramses VI).
+ * Added JTAG declarations for Samsung S3C4510B (Jiun-Shian Ho).
+ * Added bus driver for Samsung S3C4510X (Jiun-Shian Ho).
+ * Fixed invalid memory allocation size (core dump) in jtag_parse_line() function.
+ * Added new 'include' command.
+ * Added new commands 'signal', 'register', 'bit', and enhanced 'instruction' command
+ to allow create JTAG declarations from command line (or script).
+ * Added new 'eraseflash' command (patch 772267, Thomas Fröhlich).
+ * JTAG declarations are now executed as scripts.
+ * Added support for parts without IDCODE instruction.
+ * Added support for "downto" in bit vectors and "observe_only" into bsdl2jtag
+ (patch 787346, Brad Parker).
+ * Minor bugs fixed.
+ * New translations:
+ - Slovak
+
+jtag-0.4 (2003-05-29):
+
+ * Added support for executing scripts directly from stdin (parameter '-').
+ * Disabled external bus cycles for PXA250 for addresses above 0x04000000.
+ * Fixed bug in BUSY signal handling in Linux ppdev driver.
+ * Optimized bus drivers to increase bus access speed (readmem, flashmem, ...).
+ * Added new command 'endian' to configure access mode to external files.
+ * Added JTAG declarations for
+ - Broadcom BCM5421S (patch 743129, Matan Ziv-Av)
+ - DEC SA1100 (thanks to Jachym Holecek)
+ * Added bus driver for Hitachi SH7727 (based on patch 743140, Matan Ziv-Av).
+ * Added support for printing current JTAG frequency.
+ * Added support for 'signal' keyword (as alias for 'pin') into JTAG declarations.
+ * Minor bugs fixed.
+
+jtag-0.3.2 (2003-04-04):
+
+ * Added driver for Keith & Koep JTAG Cable.
+ * Ported to NetBSD/i386 (Jachym Holecek).
+ * Added JTAG declarations for Xilinx XCR3256XL-FT256 (Jachym Holecek).
+
+jtag-0.3.1 (2003-03-19):
+
+ * Added support for Intel PXA255 A0 (thanks to Mike Sprauve).
+ * Added support for running scripts specified as jtag command line parameters.
+ * Added support for comments in scripts. Lines started with `#' are treated as
+ comments.
+ * Added support for Linux ppdev parallel port driver. Non-root users can
+ use JTAG Tools now.
+ * Added new `bsdl2jtag' conversion tool (Matan Ziv-Av).
+
+jtag-0.3 (2003-02-25):
+
+ * Changes in interactive commands:
+ - enhanced 'dr' command functionality
+ - new 'set signal' command
+ - new 'get signal' command
+ - new 'script' command (Alessandro Zummo)
+ * Added support for JTAG cables:
+ - Mpcbdm JTAG Cable (Christian Pellegrin)
+ - Arcom JTAG Cable (patch 682310, Ian Campbell)
+ * Added JTAG declarations for
+ - Intel IXP425 (Christian Pellegrin)
+ - Xilinx XC2C256-TQ144 (Alessandro Zummo)
+ - Broadcom BCM1250 (Matan Ziv-Av)
+ - Hitachi SH7727 (Matan Ziv-Av)
+ * Added bus driver for Intel IXP425 (Christian Pellegrin).
+ * Added support for all 6 static memory banks for Intel SA1110 (bug 682660).
+ * Added support for bidirectional 'B' boundary scan bits (Christian Pellegrin).
+ * Added support for 1 x 16 bit memory configuration (Christian Pellegrin).
+ * Added buffered file reads/writes (Christian Pellegrin).
+ * Added support for flash drivers (August Hörandl).
+ * Added flash driver for AMD chips (August Hörandl).
+ * Added support for rc and history files (Alessandro Zummo).
+ * Added support for localization.
+ * Some bugs fixed.
+
+jtag-0.2.2 (2003-02-04):
+
+ * Added new manufacturer: Cypress. (patch 669157, Chris Ellec)
+ * Added new 'frequency' command to limit maximum TCK frequency
+ * Added support for parallel ports with I/O addresses above 0x3FF
+
+jtag-0.2.1 (2003-01-13):
+
+ * Fixed compile error (bug 665923, thanks to Chris Ellec).
+ * Added support for Macraigor Wiggler JTAG Cable (Stas Khirman).
+ * Added support for Altera ByteBlaster/ByteBlaster II/ByteBlasterMV
+ Parallel Port Download Cable.
+ * Fixed some other bugs.
+
+jtag-0.2 (2003-01-08):
+
+ * Completed JTAG declarations for Xilinx XCR3128XL-CS144.
+ * Fixed crash if flash memory is not detected.
+ * Added new 'discovery' command for discovery unknown JTAG chains.
+ * Added JTAG cable driver support and new 'cable' command.
+
+jtag-0.1 (2002-11-25):
+
+ * Initial public release.
--- /dev/null
+$Id$
+
+UrJTAG package is free software, covered by the GNU General Public License, and
+you are welcome to change it and/or distribute copies of it under certain
+conditions. There is absolutely no warranty for UrJTAG. Please read COPYING
+file for more info.
+
+All the information about installing and running UrJTAG is available in
+the document
+ << doc/UrJTAG.txt >>
+
+The very latest information and software updates are available at
+the project homepage
+ << http://www.urjtag.org >>
+
+
--- /dev/null
+$Id$
+
+Please complain if you find any typos, incorrect sorting,
+or someone is missing who should be listed there!
+
+Shaju Abraham
+Julien Aube
+Beregnyei Balazs
+Michael Banditt
+Krzysztof Blaszkowski
+Eugene Boldenkov
+Uwe Bonnes
+Cliff Brake
+Martin Buck
+Ian Campbell
+Jeff Carr
+Tomek Cedro
+Alex (d18c7db)
+Jerome Debard
+Kris Dickie
+Alexander Didebulidze
+Rainer Dörken
+Andrew Dyer
+Chris Ellec
+Ralf Engels
+Steve Franks
+Thomas Fröhlich
+Mike Frysinger
+Robin Getz
+Christophe Grenier
+Uwe Hermann
+Sebastian Hesselbarth
+Jiun-Shian Ho
+Jachym Holecek
+August Hörandl
+Rojhalat Ibrahim
+Andrey F. Ilchuk
+Catalin Ionescu
+Kees Jongenburger
+Gabor Juhos
+Wojtek Kaniewski
+Kenny
+Stas Khirman
+Matej Kupljen
+Arnim Läuger
+Bradley D. LaRonde
+Michael Lauer
+Guennadi Liakhovetski
+Anselmo Luginbühl
+Lesly A. M
+Raphael Mack
+Trevor Man
+Detrick Martin
+Andreas Mohr
+Jani Monoses
+Masaki Muranaka
+Tony K Nadackal
+Márton Németh
+Mark Norman
+Oleg <olegi>
+Daniel O'Connor
+Girish G Pai
+Asier Llano Palacios
+Kent Palmkvist
+Brad Parker
+Ken Parker
+Christian Pellegrin
+Laurent Pinchart
+Ramses VI
+Michel Robitaille
+Hein Roehrig
+Marko Rößler
+Yen Rui
+Frantisek Rysanek
+Benedikt Sauter
+Markus Schneider
+Holger Schurig
+Robert Sedevici
+Stanislav Sinyagin
+Jon Smirl
+Snowel (snowweihua)
+Juergen Stuber
+Hartley Sweeten
+Marcel Telka
+Mike Tesch
+Ville Voipio
+David Vrabel
+Alan Wallace
+William (wmsfuan)
+Jeff Wittrock
+Zhang Wei
+Jie Zhang
+Matan Ziv-Av
+Alessandro Zummo
--- /dev/null
+;\r
+; $Id$\r
+;\r
+; Script to create Installer for Windows platforms using \r
+; "nullsoft scriptable install system" (NSIS)\r
+; (available from http://nsis.sourceforge.net)\r
+;\r
+; Copyright (C) 2009 K. Waschk\r
+;\r
+; This program is free software; you can redistribute it and/or\r
+; modify it under the terms of the GNU General Public License\r
+; as published by the Free Software Foundation; either version 2\r
+; of the License, or (at your option) any later version.\r
+;\r
+; This program is distributed in the hope that it will be useful,\r
+; but WITHOUT ANY WARRANTY; without even the implied warranty of\r
+; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the\r
+; GNU General Public License for more details.\r
+;\r
+; You should have received a copy of the GNU General Public License\r
+; along with this program; if not, write to the Free Software\r
+; Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA\r
+; 02111-1307, USA.\r
+;\r
+; Written by K. Waschk, 2009\r
+; Based on "Modern UI Basic Example Script" by Joost Verburg\r
+;\r
+; Last tested with NSIS version 2.42\r
+;\r
+; Run makensis.exe in the root of an UrJTAG source directory\r
+; extracted from a distributed archive of UrJTAG (make dist)\r
+; after configuring and compiling. Usually you want to compile\r
+; with --with-ftd2xx, --with-inpout32, --enable-relocatable and\r
+; the CFLAGS=-mno-cygwin setting. To make UrJTAG search for\r
+; its data files and BSDL declarations in the correct path,\r
+; add JTAG_BIN_DIR and JTAG_DATA_DIR as follows to the CFLAGS\r
+; on the same line together with ./configure and its options\r
+; (this is used for building the UrJTAG.exe distributable):\r
+;\r
+; CFLAGS="-mno-cygwin -O2 -DJTAG_BIN_DIR=\\\"/\\\" -DJTAG_DATA_DIR=\\\"/data\\\""\r
+; ./configure --enable-relocatable \\r
+; --with-ftd2xx=/tmp/FTDI_CDM_204 \\r
+; --with-libusb=/tmp/LibUSB-Win32_112 \\r
+; --with-inpout32\r
+;\r
+; This script now expects InpOut32.dll in the current directory\r
+; as well. You can get an InpOut32.dll that works on 32 bit AND\r
+; 64 bit Windows, including Vista, from \r
+; http://www.highrez.co.uk/Downloads/InpOut32/\r
+;\r
+; No drivers for FTDI cables are installed. FTD2XX.DLL must be\r
+; in your PATH somewhere. It usually is installed with the cable\r
+; drivers.\r
+;\r
+;--------------------------------\r
+;Include Modern UI\r
+\r
+ !include "MUI2.nsh"\r
+\r
+;--------------------------------\r
+;General\r
+\r
+ ;Name and file\r
+ Name "UrJTAG"\r
+ OutFile "UrJTAG.exe"\r
+\r
+ ;Default installation folder\r
+ InstallDir "$PROGRAMFILES\UrJTAG"\r
+ \r
+ ;Get installation folder from registry if available\r
+ InstallDirRegKey HKCU "Software\UrJTAG" ""\r
+\r
+ ;Request application privileges for Windows Vista\r
+ RequestExecutionLevel user\r
+\r
+;--------------------------------\r
+;Interface Settings\r
+\r
+ !define MUI_ABORTWARNING\r
+\r
+;--------------------------------\r
+;Variables\r
+\r
+ Var StartMenuFolder\r
+\r
+;--------------------------------\r
+;Pages\r
+\r
+ !insertmacro MUI_PAGE_LICENSE "COPYING"\r
+ !insertmacro MUI_PAGE_COMPONENTS\r
+ !insertmacro MUI_PAGE_DIRECTORY\r
+\r
+ ;Start Menu Folder Page Configuration\r
+ !define MUI_STARTMENUPAGE_REGISTRY_ROOT "HKCU" \r
+ !define MUI_STARTMENUPAGE_REGISTRY_KEY "Software\UrJTAG" \r
+ !define MUI_STARTMENUPAGE_REGISTRY_VALUENAME "Start Menu Folder"\r
+ !insertmacro MUI_PAGE_STARTMENU Application $StartMenuFolder\r
+\r
+ !insertmacro MUI_PAGE_INSTFILES\r
+ \r
+ !insertmacro MUI_UNPAGE_CONFIRM\r
+ !insertmacro MUI_UNPAGE_INSTFILES\r
+\r
+;--------------------------------\r
+;Languages\r
+ \r
+ !insertmacro MUI_LANGUAGE "English"\r
+\r
+;--------------------------------\r
+;Installer Sections\r
+\r
+Section "UrJTAG executable" SecExe\r
+\r
+ SetOutPath "$INSTDIR"\r
+ File src\jtag.exe\r
+ File inpout32.dll\r
+ WriteRegStr HKCU "Software\UrJTAG" "" $INSTDIR\r
+ WriteUninstaller "$INSTDIR\uninst.exe"\r
+\r
+SectionEnd\r
+\r
+Section "Documentation" SecDoc\r
+\r
+ SetOutPath "$INSTDIR\doc"\r
+ File doc\UrJTAG.txt\r
+ WriteRegStr HKCU "Software\UrJTAG" "" $INSTDIR\r
+ WriteUninstaller "$INSTDIR\uninst.exe"\r
+\r
+SectionEnd\r
+\r
+Section "Data files" SecData\r
+\r
+ SetOutPath "$INSTDIR\data"\r
+ File /r /x Makefile /x Makefile.am /x Makefile.in data\*\r
+ WriteRegStr HKCU "Software\UrJTAG" "" $INSTDIR\r
+ WriteUninstaller "$INSTDIR\uninst.exe"\r
+\r
+SectionEnd\r
+\r
+Section "Start Menu Entries" SecStartMenu\r
+\r
+ !insertmacro MUI_STARTMENU_WRITE_BEGIN Application\r
+ ;Create shortcuts\r
+ CreateDirectory "$SMPROGRAMS\$StartMenuFolder"\r
+ CreateShortCut "$SMPROGRAMS\$StartMenuFolder\JTAG Shell.lnk" "$INSTDIR\jtag.exe"\r
+ CreateShortCut "$SMPROGRAMS\$StartMenuFolder\Documentation.lnk" "$INSTDIR\doc\UrJTAG.txt"\r
+ CreateShortCut "$SMPROGRAMS\$StartMenuFolder\Uninstall.lnk" "$INSTDIR\Uninstall.exe"\r
+ !insertmacro MUI_STARTMENU_WRITE_END\r
+\r
+SectionEnd\r
+\r
+\r
+\r
+;--------------------------------\r
+;Descriptions\r
+\r
+!insertmacro MUI_FUNCTION_DESCRIPTION_BEGIN\r
+\r
+ !insertmacro MUI_DESCRIPTION_TEXT ${SecExe} \\r
+ "UrJTAG executable"\r
+\r
+ !insertmacro MUI_DESCRIPTION_TEXT ${SecDoc} \\r
+ "Documentation for UrJTAG"\r
+\r
+ !insertmacro MUI_DESCRIPTION_TEXT ${SecData} \\r
+ "BSDL include files and part descriptions for autodetection"\r
+\r
+ !insertmacro MUI_DESCRIPTION_TEXT ${SecStartMenu} \\r
+ "Links to UrJTAG in Start Menu"\r
+\r
+!insertmacro MUI_FUNCTION_DESCRIPTION_END\r
+\r
+;--------------------------------\r
+;Uninstaller Section\r
+\r
+Section "Uninstall"\r
+\r
+ RMDir /r "$INSTDIR\doc"\r
+ RMDir /r "$INSTDIR\data"\r
+ Delete "$INSTDIR\jtag.exe"\r
+ Delete "$INSTDIR\uninst.exe"\r
+ RMDir /r "$INSTDIR"\r
+\r
+ !insertmacro MUI_STARTMENU_GETFOLDER Application $StartMenuFolder\r
+ Delete "$SMPROGRAMS\$StartMenuFolder\Uninstall.lnk"\r
+ RMDir "$SMPROGRAMS\$StartMenuFolder"\r
+\r
+ DeleteRegKey /ifempty HKCU "Software\UrJTAG"\r
+\r
+SectionEnd\r
--- /dev/null
+dnl @synopsis VL_LIB_READLINE
+dnl
+dnl Searches for a readline compatible library. If found, defines
+dnl `HAVE_LIBREADLINE'. If the found library has the `add_history'
+dnl function, sets also `HAVE_READLINE_HISTORY'. Also checks for the
+dnl locations of the necessary include files and sets `HAVE_READLINE_H'
+dnl or `HAVE_READLINE_READLINE_H' and `HAVE_READLINE_HISTORY_H' or
+dnl 'HAVE_HISTORY_H' if the corresponding include files exists.
+dnl
+dnl The libraries that may be readline compatible are `libedit',
+dnl `libeditline' and `libreadline'. Sometimes we need to link a termcap
+dnl library for readline to work, this macro tests these cases too by
+dnl trying to link with `libtermcap', `libcurses', `libncurses' or
+dnl `libtinfo' before giving up.
+dnl
+dnl Here is an example of how to use the information provided by this
+dnl macro to perform the necessary includes or declarations in a C file:
+dnl
+dnl #ifdef HAVE_LIBREADLINE
+dnl # if defined(HAVE_READLINE_READLINE_H)
+dnl # include <readline/readline.h>
+dnl # elif defined(HAVE_READLINE_H)
+dnl # include <readline.h>
+dnl # else /* !defined(HAVE_READLINE_H) */
+dnl extern char *readline ();
+dnl # endif /* !defined(HAVE_READLINE_H) */
+dnl char *cmdline = NULL;
+dnl #else /* !defined(HAVE_READLINE_READLINE_H) */
+dnl /* no readline */
+dnl #endif /* HAVE_LIBREADLINE */
+dnl
+dnl #ifdef HAVE_READLINE_HISTORY
+dnl # if defined(HAVE_READLINE_HISTORY_H)
+dnl # include <readline/history.h>
+dnl # elif defined(HAVE_HISTORY_H)
+dnl # include <history.h>
+dnl # else /* !defined(HAVE_HISTORY_H) */
+dnl extern void add_history ();
+dnl extern int write_history ();
+dnl extern int read_history ();
+dnl # endif /* defined(HAVE_READLINE_HISTORY_H) */
+dnl /* no history */
+dnl #endif /* HAVE_READLINE_HISTORY */
+dnl
+dnl
+dnl @version 1.1
+dnl @author Ville Laurikari <vl@iki.fi>
+dnl @author Ville Voipio <vv@iki.fi>; check for readline completion (not available in, e.g. Leopard)
+
+AC_DEFUN([VL_LIB_READLINE], [
+ AC_CACHE_CHECK([for a readline compatible library],
+ vl_cv_lib_readline, [
+ ORIG_LIBS="$LIBS"
+ for readline_lib in readline edit editline; do
+ for termcap_lib in "" termcap curses ncurses tinfo; do
+ if test -z "$termcap_lib"; then
+ TRY_LIB="-l$readline_lib"
+ else
+ TRY_LIB="-l$readline_lib -l$termcap_lib"
+ fi
+ LIBS="$ORIG_LIBS $TRY_LIB"
+ AC_TRY_LINK_FUNC(readline, vl_cv_lib_readline="$TRY_LIB")
+ if test -n "$vl_cv_lib_readline"; then
+ break
+ fi
+ done
+ if test -n "$vl_cv_lib_readline"; then
+ break
+ fi
+ done
+ if test -z "$vl_cv_lib_readline"; then
+ vl_cv_lib_readline="no"
+ LIBS="$ORIG_LIBS"
+ fi
+ ])
+
+ if test "$vl_cv_lib_readline" != "no"; then
+ AC_DEFINE(HAVE_LIBREADLINE, 1,
+ [Define if you have a readline compatible library])
+ AC_CHECK_HEADERS(readline.h readline/readline.h)
+ AC_CACHE_CHECK([whether readline supports history],
+ vl_cv_lib_readline_history,
+ [vl_cv_lib_readline_history="no"
+ AC_TRY_LINK_FUNC(add_history, vl_cv_lib_readline_history="yes")])
+ if test "$vl_cv_lib_readline_history" = "yes"; then
+ AC_DEFINE(HAVE_READLINE_HISTORY, 1, [Define if your readline library has \`add_history'])
+ AC_CHECK_HEADERS(history.h readline/history.h)
+ fi
+
+ AC_CACHE_CHECK([whether readline supports completion],
+ vl_cv_lib_readline_completion,
+ [vl_cv_lib_readline_completion="no"
+ AC_TRY_LINK_FUNC(rl_completion_matches, vl_cv_lib_readline_completion="yes")])
+ if test "$vl_cv_lib_readline_completion" = "yes"; then
+ AC_DEFINE(HAVE_READLINE_COMPLETION, 1, [Define if your readline library has \`rl_completion_matches'])
+ fi
+ fi
+
+])dnl
+
+# ACI_PROG_SED
+# ------------
+# Check for a fully functional sed program that truncates
+# as few characters as possible. Prefer GNU sed if found.
+#
+# Copyright (C) Free Software Foundation
+#
+# Copied here from autoconf-2.60 programs.m4 (AC_PROG_SED) to maintain
+# compatibility with autoconf-2.59. Can be removed from acinclude.m4 if
+# autoconf-2.60 or newer is required for other reasons..
+#
+m4_ifndef([AC_PROG_SED],[dnl
+AC_DEFUN([AC_PROG_SED],
+[AC_CACHE_CHECK([for a sed that does not truncate output], ac_cv_path_SED,
+ [dnl ac_script should not contain more than 99 commands (for HP-UX sed),
+ dnl but more than about 7000 bytes, to catch a limit in Solaris 8 /usr/ucb/sed.
+ ac_script=s/aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa/bbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbb/
+ for ac_i in 1 2 3 4 5 6 7; do
+ ac_script="$ac_script$as_nl$ac_script"
+ done
+ echo "$ac_script" | sed 99q >conftest.sed
+ $as_unset ac_script || ac_script=
+ _AC_PATH_PROG_FEATURE_CHECK(SED, [sed gsed],
+ [_AC_FEATURE_CHECK_LENGTH([ac_path_SED], [ac_cv_path_SED],
+ ["$ac_path_SED" -f conftest.sed])])])
+ SED="$ac_cv_path_SED"
+ AC_SUBST([SED])dnl
+ rm -f conftest.sed
+])# ACI_PROG_SED
+])dnl
+
+
--- /dev/null
+#!/bin/sh
+#
+# $Id$
+#
+# Copyright (C) 2002, 2003 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Marcel Telka <marcel@telka.sk>, 2002, 2003.
+#
+
+if autoreconf -i -s -v -f ; then
+ echo
+ echo "autoreconf done."
+ echo
+else
+ echo
+ echo "autoreconf failed."
+ echo
+ exit 1
+fi
+
+./configure --enable-maintainer-mode
--- /dev/null
+#
+# $Id$
+#
+# Copyright (C) 2007, 2008 Kolja Waschk and other
+# UrJTAG.org developers, (C) 2002, 2003 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Marcel Telka <marcel@telka.sk>, 2002, 2003,
+# and other UrJTAG authors, 2007, 2008, ...
+#
+
+AC_INIT(UrJTAG,0.10,http://urjtag.org,urjtag)
+
+AC_PREREQ(2.54)
+AC_COPYRIGHT([Copyright (C) 2007/08 Kolja Waschk and other UrJTAG authors; 2002/03 ETC s.r.o.])
+AC_REVISION($Revision$)
+
+# Get SVN Revision - idea from xfce-power-manager (C) 2007 by B.Tarricone
+dnl get svn revision
+AC_MSG_CHECKING([code revision])
+SVN=`which svn`
+SVN_REVISION=0
+if test -n "$SVN" -a -x "$SVN"; then
+ SVN_REVISION=`LC_ALL=C svn info -R "$srcdir" | awk 'BEGIN { x=0 } /^Revision: / { if($2>x) x=$2; } END { printf "%d\n",x }'`
+ if test "$SVN_REVISION" -ne "0" ; then
+ AC_MSG_RESULT([from svn info: $SVN_REVISION])
+ fi
+fi
+if test "$SVN_REVISION" -eq 0 -a -e "$srcdir/ChangeLog"; then
+ SVN_REVISION=`awk 'BEGIN { x=0 } /Revision: / { if($2>x) x=$2; } END { printf "%d\n",x }' "$srcdir/ChangeLog"`
+ if test "$SVN_REVISION" -ne "0" ; then
+ AC_MSG_RESULT([from ChangeLog: $SVN_REVISION])
+ fi
+fi
+if test "$SVN_REVISION" -eq "0" ; then
+ AC_MSG_RESULT([unknown, using 0])
+fi
+AC_DEFINE_UNQUOTED([SVN_REVISION], "$SVN_REVISION", [subversion revision number])
+AC_SUBST([SVN_REVISION])
+
+AC_CONFIG_AUX_DIR(tools)
+
+AM_INIT_AUTOMAKE([check-news dist-bzip2])
+
+AC_CONFIG_FILES(
+ Makefile
+ doc/Makefile
+ data/Makefile
+ include/Makefile
+ src/Makefile
+ src/lib/Makefile
+ src/tap/Makefile
+ src/part/Makefile
+ src/bus/Makefile
+ src/flash/Makefile
+ src/cmd/Makefile
+ src/svf/Makefile
+ src/bsdl/Makefile
+ src/jim/Makefile
+ po/Makefile.in
+)
+
+AM_MAINTAINER_MODE
+
+AM_CONFIG_HEADER(config.h)
+
+AC_GNU_SOURCE
+
+AM_GNU_GETTEXT(external)
+AM_GNU_GETTEXT_VERSION(0.14.1)
+
+AC_PROG_CC
+AC_PROG_RANLIB
+AC_PROG_YACC
+
+
+AC_SEARCH_LIBS([ioperm], [ioperm])
+if test "$ac_cv_search_ioperm" != "no"; then
+ AC_DEFINE(HAVE_IOPERM, 1, [Define to 1 if you have the ioperm() function])
+ HAVE_IOPERM="yes"
+else
+ AC_SEARCH_LIBS([i386_set_ioperm], [i386])
+ if test "$ac_cv_search_i386_set_ioperm" != "no"; then
+ AC_DEFINE(HAVE_I386_SET_IOPERM, 1,
+ [Define to 1 if you have the i386_set_ioperm() function])
+ HAVE_I386_SET_IOPERM="yes"
+ fi
+fi
+
+AC_CHECK_FUNCS(getline getdelim)
+AC_CHECK_FUNCS(swprintf)
+
+AC_CHECK_FUNC(clock_gettime, [], [ AC_CHECK_LIB(rt, clock_gettime) ])
+
+AC_CHECK_HEADERS([linux/ppdev.h], [HAVE_LINUX_PPDEV_H="yes"])
+AC_CHECK_HEADERS([dev/ppbus/ppi.h], [HAVE_DEV_PPBUS_PPI_H="yes"])
+AC_CHECK_HEADERS(stropts.h)
+AC_CHECK_HEADERS(wchar.h)
+
+VL_LIB_READLINE
+
+
+dnl check for libusb-config
+
+AC_ARG_WITH([libusb],
+ [AS_HELP_STRING([--with-libusb],
+ [use libusb for some USB JTAG cables])],,
+ [with_libusb=check])
+
+AS_IF([test "x$with_libusb" != xno], [
+ save_LIBS=$LIBS
+ save_CPPFLAGS=$CPPFLAGS
+ AS_IF([test "x$with_libusb" != xyes -a "x$with_libusb" != xcheck], [
+ case $host in
+ *cygwin*)
+ USBLIBS="-L$with_libusb/lib/gcc -lusb"
+ USBCFLAGS="-I$with_libusb/include"
+ ;;
+ *)
+ USBLIBS="-Lwith_libusb -lusb"
+ USBCFLAGS="-I$with_libusb"
+ ;;
+ esac
+ ],[
+ AC_PATH_TOOL(LIBUSB_CONFIG, libusb-config, no)
+ AS_IF([test "$LIBUSB_CONFIG" != "no"],[
+ USBLIBS=`$LIBUSB_CONFIG --libs`
+ USBCFLAGS=`$LIBUSB_CONFIG --cflags`
+ ],)
+ ])
+ LIBS="$LIBS $USBLIBS"
+ CPPFLAGS="$CPPFLAGS $USBCFLAGS"
+ AC_CHECK_FUNC([usb_find_devices], [
+ AC_DEFINE(HAVE_LIBUSB, 1, [Define if you have libusb])
+ HAVELIBUSB=yes
+ ],[
+ AC_MSG_WARN([*** libusb not detected. No support for USB JTAG cables via libusb.])
+ LIBS=$save_LIBS
+ CPPFLAGS=$save_CPPFLAGS
+ ])
+],)
+
+AS_IF([test "x$HAVELIBUSB" = "xyes"],[
+ AM_CONDITIONAL(HAVE_LIBUSB, true)
+],[
+ AM_CONDITIONAL(HAVE_LIBUSB, false)
+])
+
+
+dnl Use FTDI library?
+
+AC_ARG_WITH([libftdi],
+ [AS_HELP_STRING([--with-libftdi],
+ [use libftdi for FTDI-based cables])],
+ [], [with_libftdi=check])
+
+AS_IF([test "x$with_libftdi" != xno], [
+ save_LIBS=$LIBS
+ save_CPPFLAGS=$CPPFLAGS
+ AS_IF([test "x$with_libftdi" != xyes -a "x$with_libftdi" != xcheck], [
+ FTDILIBS="-L$with_libftdi -lftdi"
+ FTDICFLAGS="-I$with_libftdi"
+ ],[
+ AC_PATH_TOOL(LIBFTDI_CONFIG, libftdi-config, no)
+ AS_IF([test "$LIBFTDI_CONFIG" != "no"],[
+ FTDILIBS=`$LIBFTDI_CONFIG --libs`
+ FTDICFLAGS=`$LIBFTDI_CONFIG --cflags`
+ ],)
+ ])
+ LIBS="$FTDILIBS $LIBS"
+ CPPFLAGS="$CPPFLAGS $FTDICFLAGS"
+ AC_CHECK_FUNC([ftdi_usb_open], [
+ AC_DEFINE(HAVE_LIBFTDI, 1, [Define if you have libftdi])
+ HAVELIBFTDI=yes
+ ],[
+ AC_MSG_WARN([*** libftdi not detected. No support for FTDI-based USB JTAG cables via libftdi.])
+ LIBS=$save_LIBS
+ CPPFLAGS=$save_CPPFLAGS
+ ])
+],)
+
+AS_IF([test "x$HAVELIBFTDI" = "xyes"],[
+ AM_CONDITIONAL(HAVE_LIBFTDI, true)
+],[
+ AM_CONDITIONAL(HAVE_LIBFTDI, false)
+])
+
+
+dnl Use FTDI ftd2xx library?
+
+AC_ARG_WITH([ftd2xx],
+ [AS_HELP_STRING([--with-ftd2xx],
+ [use ftd2xx library for FTDI-based cables])],
+ [], [with_ftd2xx=check])
+
+FTD2XXLIB=
+AS_IF([test "x$with_ftd2xx" = xyes -o "x$with_ftd2xx" = xcheck], [
+ AC_CHECK_LIB([ftd2xx], [FT_OpenEx], [
+ HAVELIBFTD2XX=yes
+ LIBS="-lftd2xx $LIBS"
+ ],[
+ AC_MSG_WARN([*** libftd2xx not found. No support for FTDI-based USB JTAG cables via libftd2xx.])
+ ])
+],[
+ AS_IF([test "x$with_ftd2xx" != xno], [
+ HAVELIBFTD2XX=yes
+ case $host in
+ *cygwin*|*mingw*)
+ CFLAGS="$CFLAGS -I$with_ftd2xx"
+ AS_IF([test -d "$with_ftd2xx/i386"], [
+ FTD2XXLIB="$with_ftd2xx/i386/ftd2xx.lib"
+ ],[
+ FTD2XXLIB="$with_ftd2xx/ftd2xx.lib"
+ ])
+ ;;
+ *)
+ CFLAGS="$CFLAGS -I$with_ftd2xx -L$with_ftd2xx"
+ LIBS="-lftd2xx $LIBS"
+ ;;
+ esac
+ ],)
+])
+AS_IF([test "x$HAVELIBFTD2XX" = xyes], [
+ AM_CONDITIONAL(HAVE_LIBFTD2XX, true)
+ AC_DEFINE(HAVE_LIBFTD2XX, 1, [define if you have libftd2xx])
+],[
+ AM_CONDITIONAL(HAVE_LIBFTD2XX, false)
+])
+AC_SUBST(FTD2XXLIB)
+
+
+dnl Use InpOut I/O library?
+dnl http://www.highrez.co.uk/Downloads/InpOut32/default.htm
+
+AC_ARG_WITH([inpout32],
+ [AS_HELP_STRING([--with-inpout32],
+ [use InpOut32.dll for parallel port access on Windows])],
+ [], [with_inpout32=no])
+
+case $host in
+ *cygwin*|*mingw*) ;;
+ *) with_inpout32=no ;;
+esac
+
+AS_IF([test "x$with_inpout32" = xyes], [
+ AM_CONDITIONAL(HAVE_INPOUTXX, true)
+ AC_DEFINE(HAVE_INPOUTXX, 1, [define if you have inpout32.dll])
+],[
+ AM_CONDITIONAL(HAVE_INPOUTXX, false)
+])
+
+
+CFLAGS="$CFLAGS -Wall"
+CPPFLAGS="-I\$(top_srcdir) -I\$(top_srcdir)/include $CPPFLAGS"
+
+
+# check for lex/flex
+AC_PROG_LEX
+# check for modern version of flex
+AC_PROG_AWK
+AC_PROG_SED
+
+AS_IF([test "$LEX" = flex], [
+ ver_ge_ver () {
+ v1=$1
+ v2=$2
+ v3=$3
+ ref_v1=$4
+ ref_v2=$5
+ ref_v3=$6
+
+ AS_IF([test -n "$v1" -a "$v1" -gt "$ref_v1"], [
+ return 0
+ ])
+ AS_IF([test -n "$v1" -a "$v1" -eq "$ref_v1"], [
+ AS_IF([test "$v2" -gt "$ref_v2"], [
+ return 0
+ ])
+ AS_IF([test "$v2" -eq "$ref_v2"], [
+ AS_IF([test "$v3" -ge "$ref_v3"], [
+ return 0
+ ])
+ ])
+ ])
+
+ return 1
+ }
+
+ flex_version=`$LEX --version | $AWK '{print $2}'`
+ AS_IF([test "$flex_version" = "version"], [
+ flex_version=`$LEX --version | $AWK '{print $3}'`
+ ])
+
+ flex_v1=`echo $flex_version | $AWK -F . '{print $1}' | $SED -e 's/[a-zA-Z]//g'`
+ flex_v2=`echo $flex_version | $AWK -F . '{print $2}' | $SED -e 's/[a-zA-Z]//g'`
+ flex_v3=`echo $flex_version | $AWK -F . '{print $3}' | $SED -e 's/[a-zA-Z]//g'`
+
+ # svf and bsdl lexer require flex >= 2.5.33
+ flex_ref_v1=2
+ flex_ref_v2=5
+ flex_ref_v3=33
+ flex_ref_version="$flex_ref_v1.$flex_ref_v2.$flex_ref_v3"
+ AC_MSG_CHECKING([for flex >= $flex_ref_version, required for SVF and BSDL lexer])
+ #
+ AS_IF([ver_ge_ver $flex_v1 $flex_v2 $flex_v3 $flex_ref_v1 $flex_ref_v2 $flex_ref_v3], [
+ AC_MSG_RESULT([yes - flex $flex_version])
+ svf_lexer=true
+ bsdl_lexer=true
+ ], [
+ AC_MSG_RESULT([no - flex $flex_version])
+ svf_lexer=false
+ bsdl_lexer=false
+ ])
+], [
+ svf_lexer=false
+ bsdl_lexer=false
+])
+
+
+dnl If the transformed svf_flex.c is already existing, it doesn't matter
+dnl that flex is too old for building the lexer.
+AS_IF([test "x$svf_lexer" = xfalse], [
+ AS_IF([test -r src/svf/svf_flex.c], [
+ svf_lexer=true
+ ])
+])
+
+dnl Enable SVF player?
+AC_ARG_ENABLE(svf,
+[AS_HELP_STRING([--disable-svf], [Disable SVF player])],
+[case "${enableval}" in
+ yes) svf=true ;;
+ no) svf=false ;;
+ *) AC_MSG_ERROR(bad value ${enableval} for --enable-svf) ;;
+ esac],
+[svf=$svf_lexer])
+AS_IF([test "x$svf" = xtrue], [
+ AM_CONDITIONAL(ENABLE_SVF, true)
+ AC_DEFINE(ENABLE_SVF, 1, [define if SVF player is enabled])
+],[
+ AM_CONDITIONAL(ENABLE_SVF, false)
+])
+
+
+dnl If the transformed bsdl_flex.c is already existing, it doesn't matter
+dnl that flex is too old for building the lexer.
+AS_IF([test "x$bsdl_lexer" = xfalse], [
+ AS_IF([test -r src/bsdl/bsdl_flex.c], [
+ bsdl_lexer=true
+ ])
+])
+
+dnl Enable BSDL subsystem?
+AC_ARG_ENABLE(bsdl,
+[AS_HELP_STRING([--disable-bsdl], [Disable BSDL subsystem])],
+[case "${enableval}" in
+ yes) bsdl=true ;;
+ no) bsdl=false ;;
+ *) AC_MSG_ERROR(bad value ${enableval} for --enable-bsdl) ;;
+ esac],
+[bsdl=$bsdl_lexer])
+AS_IF([test "x$bsdl" = xtrue], [
+ AM_CONDITIONAL(ENABLE_BSDL, true)
+ AC_DEFINE(ENABLE_BSDL, 1, [define if BSDL subsystem is enabled])
+],[
+ AM_CONDITIONAL(ENABLE_BSDL, false)
+])
+
+dnl Enable experimental brute-force JEDEC flash autodetection?
+AC_ARG_ENABLE(jedec-exp,
+[AS_HELP_STRING([--enable-jedec-exp], [Enable experimental JEDEC flash detection])],
+[case "${enableval}" in
+ yes) jedecexp=true ;;
+ no) jedecexp=false ;;
+ *) AC_MSG_ERROR(bad value ${enableval} for --enable-jedec-exp) ;;
+ esac],
+[jedecexp=false])
+AS_IF([test "x$jedecexp" = xtrue], [
+ AM_CONDITIONAL(JEDEC_EXP, true)
+ AC_DEFINE(JEDEC_EXP, 1, [define if experimental JEDEC flash detection is enabled])
+],[
+ AM_CONDITIONAL(JEDEC_EXP, false)
+])
+
+
+# Macro for driver include check
+AC_DEFUN([CHECK_DRIVER], [
+ AS_IF([echo "$1" | $GREP -q $3], [
+ AC_DEFINE([$4], 1, [define if $3 is enabled])
+ AM_CONDITIONAL([$4], true)
+ $2="${$2}$3 "
+ ], [
+ AM_CONDITIONAL([$4], false)
+ ])
+])
+
+
+# Enable bus drivers
+AC_DEFUN([DEF_ENABLE_BUSDRIVERS], [\
+au1500 avr32 bcm1250 bf526_ezkit bf527_ezkit bf533_stamp bf533_ezkit bf537_stamp bf537_ezkit bf538f_ezkit bf548_ezkit bf561_ezkit bscoach ejtag ejtag_dma\
+fjmem ixp425 jopcyc h7202 lh7a400 mpc5200 mpc824x ppc405ep ppc440gx_ebc8 prototype pxa2x0 pxa27x \
+s3c4510 sa1110 sh7727 sh7750r sh7751r sharc_21065L slsup3 tx4925 zefant_xs3])
+AC_ARG_ENABLE(bus,
+[AS_HELP_STRING([--enable-bus], [Enable default set or specific bus drivers:])]
+[AS_HELP_STRING([], ['default' enables:])]
+[AS_HELP_STRING([],DEF_ENABLE_BUSDRIVERS)]
+,
+[AS_CASE([${enableval}],
+ [yes], [busdrivers=default],
+ [no], [busdrivers=none],
+ [none], [busdrivers=none],
+ [busdrivers=`echo ${enableval} | $SED -e 's/,/ /g'`])],
+[busdrivers=default])
+# expand 'default' to default enabled busdrivers
+busdrivers=`echo ${busdrivers} | $SED -e "s/default/DEF_ENABLE_BUSDRIVERS/"`
+#
+enabled_bus_drivers=''
+CHECK_DRIVER([$busdrivers], [enabled_bus_drivers], [au1500], [ENABLE_BUS_AU1500])
+CHECK_DRIVER([$busdrivers], [enabled_bus_drivers], [avr32], [ENABLE_BUS_AVR32])
+CHECK_DRIVER([$busdrivers], [enabled_bus_drivers], [bcm1250], [ENABLE_BUS_BCM1250])
+CHECK_DRIVER([$busdrivers], [enabled_bus_drivers], [bf526_ezkit], [ENABLE_BUS_BF526_EZKIT])
+CHECK_DRIVER([$busdrivers], [enabled_bus_drivers], [bf527_ezkit], [ENABLE_BUS_BF527_EZKIT])
+CHECK_DRIVER([$busdrivers], [enabled_bus_drivers], [bf533_stamp], [ENABLE_BUS_BF533_STAMP])
+CHECK_DRIVER([$busdrivers], [enabled_bus_drivers], [bf533_ezkit], [ENABLE_BUS_BF533_EZKIT])
+CHECK_DRIVER([$busdrivers], [enabled_bus_drivers], [bf537_stamp], [ENABLE_BUS_BF537_STAMP])
+CHECK_DRIVER([$busdrivers], [enabled_bus_drivers], [bf537_ezkit], [ENABLE_BUS_BF537_EZKIT])
+CHECK_DRIVER([$busdrivers], [enabled_bus_drivers], [bf538f_ezkit], [ENABLE_BUS_BF538F_EZKIT])
+CHECK_DRIVER([$busdrivers], [enabled_bus_drivers], [bf548_ezkit], [ENABLE_BUS_BF548_EZKIT])
+CHECK_DRIVER([$busdrivers], [enabled_bus_drivers], [bf561_ezkit], [ENABLE_BUS_BF561_EZKIT])
+CHECK_DRIVER([$busdrivers], [enabled_bus_drivers], [bscoach], [ENABLE_BUS_BSCOACH])
+CHECK_DRIVER([$busdrivers], [enabled_bus_drivers], [ejtag], [ENABLE_BUS_EJTAG])
+CHECK_DRIVER([$busdrivers], [enabled_bus_drivers], [ejtag_dma], [ENABLE_BUS_EJTAG_DMA])
+CHECK_DRIVER([$busdrivers], [enabled_bus_drivers], [fjmem], [ENABLE_BUS_FJMEM])
+CHECK_DRIVER([$busdrivers], [enabled_bus_drivers], [ixp425], [ENABLE_BUS_IXP425])
+CHECK_DRIVER([$busdrivers], [enabled_bus_drivers], [jopcyc], [ENABLE_BUS_JOPCYC])
+CHECK_DRIVER([$busdrivers], [enabled_bus_drivers], [h7202], [ENABLE_BUS_H7202])
+CHECK_DRIVER([$busdrivers], [enabled_bus_drivers], [lh7a400], [ENABLE_BUS_LH7A400])
+CHECK_DRIVER([$busdrivers], [enabled_bus_drivers], [mpc5200], [ENABLE_BUS_MPC5200])
+CHECK_DRIVER([$busdrivers], [enabled_bus_drivers], [mpc824x], [ENABLE_BUS_MPC824X])
+CHECK_DRIVER([$busdrivers], [enabled_bus_drivers], [ppc405ep], [ENABLE_BUS_PPC405EP])
+CHECK_DRIVER([$busdrivers], [enabled_bus_drivers], [ppc440gx_ebc8], [ENABLE_BUS_PPC440GX_EBC8])
+CHECK_DRIVER([$busdrivers], [enabled_bus_drivers], [prototype], [ENABLE_BUS_PROTOTYPE])
+CHECK_DRIVER([$busdrivers], [enabled_bus_drivers], [pxa2x0], [ENABLE_BUS_PXA2X0])
+CHECK_DRIVER([$busdrivers], [enabled_bus_drivers], [pxa27x], [ENABLE_BUS_PXA27X])
+CHECK_DRIVER([$busdrivers], [enabled_bus_drivers], [s3c4510], [ENABLE_BUS_S3C4510])
+CHECK_DRIVER([$busdrivers], [enabled_bus_drivers], [sa1110], [ENABLE_BUS_SA1110])
+CHECK_DRIVER([$busdrivers], [enabled_bus_drivers], [sh7727], [ENABLE_BUS_SH7727])
+CHECK_DRIVER([$busdrivers], [enabled_bus_drivers], [sh7750r], [ENABLE_BUS_SH7750R])
+CHECK_DRIVER([$busdrivers], [enabled_bus_drivers], [sh7751r], [ENABLE_BUS_SH7751R])
+CHECK_DRIVER([$busdrivers], [enabled_bus_drivers], [sharc_21065L], [ENABLE_BUS_SHARC_21065L])
+CHECK_DRIVER([$busdrivers], [enabled_bus_drivers], [slsup3], [ENABLE_BUS_SLSUP3])
+CHECK_DRIVER([$busdrivers], [enabled_bus_drivers], [tx4925], [ENABLE_BUS_TX4925])
+CHECK_DRIVER([$busdrivers], [enabled_bus_drivers], [zefant_xs3], [ENABLE_BUS_ZEFANT_XS3])
+
+# Enable cable drivers
+AC_DEFUN([DEF_ENABLE_CABLEDRIVERS], [\
+arcom byteblaster dlc5 ea253 ei012 ft2232 igloo jlink keithkoep lattice mpcbdm triton usbblaster wiggler xpc])
+AC_DEFUN([DEF_DISABLE_CABLEDRIVERS], [ep9307 jim ts7800])
+AC_ARG_ENABLE(cable,
+[AS_HELP_STRING([--enable-cable], [Enable default set or specific cable drivers.])]
+[AS_HELP_STRING([], ['default' enables:])]
+[AS_HELP_STRING([],DEF_ENABLE_CABLEDRIVERS)]
+[AS_HELP_STRING([], [Disabled by default are:])]
+[AS_HELP_STRING([],DEF_DISABLE_CABLEDRIVERS)]
+,
+[AS_CASE([${enableval}],
+ [yes], [cabledrivers=default],
+ [no], [cabledrivers=none],
+ [none], [cabledrivers=none],
+ [cabledrivers=`echo ${enableval} | $SED -e 's/,/ /g'`])],
+[cabledrivers=default])
+# expand 'default' to default enabled cabledrivers
+cabledrivers=`echo ${cabledrivers} | $SED -e "s/default/DEF_ENABLE_CABLEDRIVERS/"`
+# automatically disable cable drivers when a required feature is not available
+AS_IF([test "x$HAVELIBFTDI" != "xyes" -a "x$HAVELIBFTD2XX" != "xyes"], [
+ cabledrivers=`echo ${cabledrivers} | $SED -e "s/ft2232//" -e "s/usbblaster//"`
+])
+AS_IF([test "x$HAVELIBUSB" != "xyes"], [
+ cabledrivers=`echo ${cabledrivers} | $SED -e "s/jlink//" -e "s/xpc//"`
+])
+#
+enabled_cable_drivers=''
+CHECK_DRIVER([$cabledrivers], [enabled_cable_drivers], [arcom], [ENABLE_CABLE_ARCOM])
+CHECK_DRIVER([$cabledrivers], [enabled_cable_drivers], [byteblaster], [ENABLE_CABLE_BYTEBLASTER])
+CHECK_DRIVER([$cabledrivers], [enabled_cable_drivers], [dlc5], [ENABLE_CABLE_DLC5])
+CHECK_DRIVER([$cabledrivers], [enabled_cable_drivers], [ea253], [ENABLE_CABLE_EA253])
+CHECK_DRIVER([$cabledrivers], [enabled_cable_drivers], [ei012], [ENABLE_CABLE_EI012])
+CHECK_DRIVER([$cabledrivers], [enabled_cable_drivers], [ep9307], [ENABLE_CABLE_EP9307])
+CHECK_DRIVER([$cabledrivers], [enabled_cable_drivers], [ft2232], [ENABLE_CABLE_FT2232])
+CHECK_DRIVER([$cabledrivers], [enabled_cable_drivers], [igloo], [ENABLE_CABLE_IGLOO])
+CHECK_DRIVER([$cabledrivers], [enabled_cable_drivers], [jim], [ENABLE_JIM])
+CHECK_DRIVER([$cabledrivers], [enabled_cable_drivers], [jlink], [ENABLE_CABLE_JLINK])
+CHECK_DRIVER([$cabledrivers], [enabled_cable_drivers], [keithkoep], [ENABLE_CABLE_KEITHKOEP])
+CHECK_DRIVER([$cabledrivers], [enabled_cable_drivers], [lattice], [ENABLE_CABLE_LATTICE])
+CHECK_DRIVER([$cabledrivers], [enabled_cable_drivers], [mpcbdm], [ENABLE_CABLE_MPCBDM])
+CHECK_DRIVER([$cabledrivers], [enabled_cable_drivers], [triton], [ENABLE_CABLE_TRITON])
+CHECK_DRIVER([$cabledrivers], [enabled_cable_drivers], [usbblaster], [ENABLE_CABLE_USBBLASTER])
+CHECK_DRIVER([$cabledrivers], [enabled_cable_drivers], [wiggler], [ENABLE_CABLE_WIGGLER])
+CHECK_DRIVER([$cabledrivers], [enabled_cable_drivers], [xpc], [ENABLE_CABLE_XPC])
+CHECK_DRIVER([$cabledrivers], [enabled_cable_drivers], [ts7800], [ENABLE_CABLE_TS7800])
+
+
+# Enable lowlevel drivers
+AC_DEFUN([DEF_ENABLE_LOWLEVELDRIVERS], [\
+direct ftdi ftd2xx ppdev ppi])
+AC_ARG_ENABLE(lowlevel,
+[AS_HELP_STRING([--enable-lowlevel], [Enable default set or specific lowlevel drivers:])]
+[AS_HELP_STRING([], ['default' enables:])]
+[AS_HELP_STRING([],DEF_ENABLE_LOWLEVELDRIVERS)]
+,
+[AS_CASE([${enableval}],
+ [yes], [lowleveldrivers=default],
+ [no], [lowleveldrivers=none],
+ [none], [lowleveldrivers=none],
+ [lowleveldrivers=`echo ${enableval} | $SED -e 's/,/ /g'`])],
+[lowleveldrivers=default])
+# expand 'default' to default enabled lowlevel drivers
+lowleveldrivers=`echo ${lowleveldrivers} | $SED -e "s/default/DEF_ENABLE_LOWLEVELDRIVERS/"`
+# automatically disable lowlevel drivers when a required feature is not available
+AS_IF([test "x$HAVELIBFTDI" != "xyes"], [
+ lowleveldrivers=`echo ${lowleveldrivers} | $SED -e "s/ftdi//"`
+])
+AS_IF([test "x$HAVELIBFTD2XX" != "xyes"], [
+ lowleveldrivers=`echo ${lowleveldrivers} | $SED -e "s/ftd2xx//"`
+])
+AS_IF([test "x$HAVE_LINUX_PPDEV_H" != "xyes"], [
+ lowleveldrivers=`echo ${lowleveldrivers} | $SED -e "s/ppdev//"`
+])
+AS_IF([test "x$HAVE_DEV_PPBUS_PPI_H" != "xyes"], [
+ lowleveldrivers=`echo ${lowleveldrivers} | $SED -e "s/ppi//"`
+])
+AS_IF([test "x$HAVE_IOPERM" != "xyes" -a "x$HAVE_I386_SET_IOPERM" != "xyes" -a "x$HAVE_INPOUTXX" != "xyes" ], [
+ lowleveldrivers=`echo ${lowleveldrivers} | $SED -e "s/direct//"`
+])
+#
+enabled_lowlevel_drivers=''
+CHECK_DRIVER([$lowleveldrivers], [enabled_lowlevel_drivers], [direct], [ENABLE_LOWLEVEL_DIRECT])
+CHECK_DRIVER([$lowleveldrivers], [enabled_lowlevel_drivers], [ftd2xx], [ENABLE_LOWLEVEL_FTD2XX])
+CHECK_DRIVER([$lowleveldrivers], [enabled_lowlevel_drivers], [ftdi], [ENABLE_LOWLEVEL_FTDI])
+CHECK_DRIVER([$lowleveldrivers], [enabled_lowlevel_drivers], [ppdev], [ENABLE_LOWLEVEL_PPDEV])
+CHECK_DRIVER([$lowleveldrivers], [enabled_lowlevel_drivers], [ppi], [ENABLE_LOWLEVEL_PPI])
+
+
+dnl Enable a relocatable jtag?
+AC_ARG_ENABLE(relocatable,
+[AS_HELP_STRING([--enable-relocatable], [Enable relocatable paths])],
+[relocatable=$enableval], [relocatable=no])
+AS_IF([test "x$relocatable" = xyes], [
+ AM_CONDITIONAL(JTAG_RELOCATABLE, true)
+ AC_DEFINE(JTAG_RELOCATABLE, 1, [define for relocatable paths])
+],[
+ AM_CONDITIONAL(JTAG_RELOCATABLE, false)
+])
+
+
+dnl Is fmax() provided by libm?
+AC_CHECK_LIB([m], [fmax], [
+ AC_DEFINE(HAVE_FMAX, 1, [Define if -lm provides fmax()])
+])
+
+
+dnl Enable use of DMALLOC library?
+AC_ARG_ENABLE(dmalloc,
+[AS_HELP_STRING([--enable-dmalloc], [Enable heap debugging with dmalloc library])],
+[dmalloc=$enableval], [dmalloc=no])
+AS_IF([test "x$dmalloc" = xyes], [
+ AM_CONDITIONAL(DMALLOC, true)
+ AC_DEFINE(DMALLOC, 1, [define for dmalloc library])
+],[
+ AM_CONDITIONAL(DMALLOC, false)
+])
+
+
+# Enable flash multi-byte write mode?
+AC_ARG_ENABLE(flash-multi-byte,
+[AS_HELP_STRING([--disable-flash-multi-byte], [Disable flash multi-byte write mode])],
+[flash_multi_byte=$enableval], [flash_multi_byte=yes])
+AS_IF([test "x$flash_multi_byte" = xyes], [
+ AC_DEFINE(FLASH_MULTI_BYTE, 1, [define for flash multi-byte write mode])
+])
+
+
+AC_OUTPUT
+
+dnl
+dnl Configuration summary
+dnl
+AS_IF([test ${HAVELIBFTDI:-no} != no], [
+ FLAG_HAVELIBFTDI=yes
+], [
+ FLAG_HAVELIBFTDI=no
+])
+AS_IF([test ${HAVELIBUSB:-no} != no], [
+ FLAG_HAVELIBUSB=yes
+], [
+ FLAG_HAVELIBUSB=no
+])
+AS_IF([test ${HAVELIBFTD2XX:-no} != no], [
+ FLAG_HAVELIBFTD2XX=yes
+], [
+ FLAG_HAVELIBFTD2XX=no
+])
+AS_IF([test ${HAVEINPOUTXX:-no} != no], [
+ FLAG_HAVEINPOUTXX=yes
+], [
+ FLAG_HAVEINPOUTXX=no
+])
+AS_IF([test ${svf:-false} != false], [
+ FLAG_SVF=yes
+], [
+ FLAG_SVF=no
+])
+AS_IF([test ${bsdl:-false} != false], [
+ FLAG_BSDL=yes
+], [
+ FLAG_BSDL=no
+])
+AC_MSG_NOTICE([
+
+jtag is now configured for
+
+ Detected libusb : $FLAG_HAVELIBUSB
+ Detected libftdi : $FLAG_HAVELIBFTDI
+ Detected libftd2xx : $FLAG_HAVELIBFTD2XX
+ Detected inpout32 : $FLAG_HAVEINPOUTXX
+ Build SVF player : $FLAG_SVF
+ Build BSDL subsystem : $FLAG_BSDL
+ Bus drivers : $enabled_bus_drivers
+ Cable drivers : $enabled_cable_drivers
+ Lowlevel drivers : $enabled_lowlevel_drivers
+])
--- /dev/null
+Makefile
+Makefile.in
--- /dev/null
+#
+# $Id$
+#
+# Manufacturer ID database
+# Copyright (C) 2002 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Marcel Telka <marcel@telka.sk>, 2002.
+#
+# Documentation:
+# [1] JEDEC Solid State Technology Association, "Standard Manufacturer's
+# Identification Code", September 2001, Order Number: JEP106-K
+#
+
+# bits 11-1 of the Device Identification Register
+00000000110 lexra Lexr
+00000000111 hitachi Hitachi
+00000001001 intel Intel
+00000001110 freescale Freescale (Motorola)
+00000010101 philips Philips Semi. (Signetics)
+00000010111 ti Texas Instruments
+00000011000 toshiba Toshiba
+00000011111 atmel Atmel
+00000100001 lattice Lattice Semiconductors
+00000100100 ibm IBM Semiconductors
+00000110100 cypress Cypress
+00000110101 dec DEC
+00001001001 xilinx Xilinx
+00001100101 analog Analog Devices
+00001101110 altera Altera
+00010101011 lattice Lattice Semiconductors
+00010111111 broadcom Broadcom
+00101010000 broadcom Broadcom # or "Sibyte, Incorporated" ?
+00101110000 brecis Brecis (PMC-Sierra)
+00111101001 marvell Marvell
+00110101011 marvell Marvell
+11110000111 arm ARM
--- /dev/null
+#
+# $Id$
+#
+# Copyright (C) 2002 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Marcel Telka <marcel@telka.sk>, 2002.
+#
+
+include $(top_srcdir)/Makefile.rules
+
+nobase_dist_pkgdata_DATA = \
+ MANUFACTURERS \
+ admtek/adm5120/adm5120 \
+ altera/PARTS \
+ altera/ep1c20f400/STEPPINGS \
+ altera/ep1c20f400/ep1c20f400 \
+ altera/ep1c6q240/STEPPINGS \
+ altera/ep1c6q240/ep1c6q240 \
+ altera/epm7128aetc100/STEPPINGS \
+ altera/epm7128aetc100/epm7128aetc100 \
+ altera/ep1c12/STEPPINGS \
+ altera/ep1c12/ep1c12 \
+ altera/ep1c12/f256 \
+ altera/ep1c12/f324 \
+ altera/ep1c12/q240 \
+ altera/ep2c8/STEPPINGS \
+ altera/ep2c8/ep2c8 \
+ altera/ep2c8/f256 \
+ altera/ep2c8/q208 \
+ altera/ep2c8/t144 \
+ altera/epm3064a/STEPPINGS \
+ altera/epm3064a/epm3064a \
+ altera/epm3064a/l44 \
+ altera/epm3064a/t100 \
+ altera/epm3064a/t44 \
+ atheros/ar2312/ar2312 \
+ atmel/PARTS \
+ atmel/at32ap7000/STEPPINGS \
+ atmel/at32ap7000/at32ap7000 \
+ atmel/atmega128/STEPPINGS \
+ atmel/atmega128/atmega128 \
+ atmel/at91sam7s256/STEPPINGS \
+ atmel/at91sam7s256/at91sam7s_tq64v0 \
+ atmel/at91sam7s256/at91sam7s_tq48v0 \
+ atmel/atf15xx/STEPPINGS \
+ atmel/atf15xx/atf1504asv \
+ analog/PARTS \
+ analog/bf518/STEPPINGS \
+ analog/bf518/bf518 \
+ analog/bf527/STEPPINGS \
+ analog/bf527/bf527 \
+ analog/bf533/STEPPINGS \
+ analog/bf533/bf533 \
+ analog/bf537/STEPPINGS \
+ analog/bf537/bf537 \
+ analog/bf538/STEPPINGS \
+ analog/bf538/bf538 \
+ analog/bf548/STEPPINGS \
+ analog/bf548/bf548 \
+ analog/bf561/STEPPINGS \
+ analog/bf561/bf561 \
+ analog/PARTS \
+ analog/sharc21065l/STEPPINGS \
+ analog/sharc21065l/sharc21065l \
+ brecis/PARTS \
+ brecis/msp2006/STEPPINGS \
+ brecis/msp2006/msp2006 \
+ broadcom/PARTS \
+ broadcom/bcm1250/STEPPINGS \
+ broadcom/bcm1250/bcm1250 \
+ broadcom/bcm3310/STEPPINGS \
+ broadcom/bcm3310/bcm3310 \
+ broadcom/bcm4712/STEPPINGS \
+ broadcom/bcm4712/bcm4712 \
+ broadcom/bcm5421s/STEPPINGS \
+ broadcom/bcm5421s/bcm5421s \
+ broadcom/bcm6358/STEPPINGS \
+ broadcom/bcm6358/bcm6358 \
+ bsdl/STD_1149_1_1990 \
+ bsdl/STD_1149_1_1994 \
+ bsdl/STD_1149_1_2001 \
+ bsdl/STD_1532_2001 \
+ bsdl/STD_1532_2002 \
+ dec/PARTS \
+ dec/sa1100/STEPPINGS \
+ dec/sa1100/sa1100 \
+ hitachi/PARTS \
+ hitachi/ar7300/STEPPINGS \
+ hitachi/ar7300/ar7300 \
+ hitachi/hd64465/hd64465 \
+ hitachi/sh7727/STEPPINGS \
+ hitachi/sh7727/sh7727 \
+ hitachi/sh7729/STEPPINGS \
+ hitachi/sh7729/sh7729 \
+ freescale/PARTS \
+ freescale/mpc5200/STEPPINGS \
+ freescale/mpc5200/mpc5200 \
+ ibm/PARTS \
+ ibm/ppc440gx/STEPPINGS \
+ ibm/ppc440gx/ppc440gx \
+ ibm/ppc405ep/STEPPINGS \
+ ibm/ppc405ep/ppc405ep \
+ intel/PARTS \
+ intel/pxa250/STEPPINGS \
+ intel/pxa250/pxa250 \
+ intel/pxa250/pxa250c0 \
+ intel/pxa270/STEPPINGS \
+ intel/pxa270/pxa270 \
+ intel/sa1110/STEPPINGS \
+ intel/sa1110/sa1110 \
+ intel/ixp425/STEPPINGS \
+ intel/ixp425/ixp425 \
+ lattice/PARTS \
+ lattice/lc4032v-tqfp48/STEPPINGS \
+ lattice/lc4032v-tqfp48/lc4032v-tqfp48 \
+ lattice/lc4064zc/STEPPINGS \
+ lattice/lc4064zc/lc4064zc \
+ lattice/lc4128c-tqfp100/STEPPINGS \
+ lattice/lc4128c-tqfp100/lc4128c-tqfp100 \
+ lattice/lfec2-12e/STEPPINGS \
+ lattice/lfec2-12e/lfec2-12e \
+ lattice/m4a3-256.192-fpbga256/STEPPINGS \
+ lattice/m4a3-256.192-fpbga256/m4a3-256.192-fpbga256 \
+ lattice/m4a3-64.32-tqfp48/STEPPINGS \
+ lattice/m4a3-64.32-tqfp48/m4a3-64.32-tqfp48 \
+ lexra/PARTS \
+ lexra/lx5280/STEPPINGS \
+ lexra/lx5280/lx5280 \
+ marvell/PARTS \
+ marvell/88e1118/STEPPINGS \
+ marvell/88e1118/88e1118 \
+ marvell/88f5182/STEPPINGS \
+ marvell/88f5182/88f5182-a2 \
+ motorola/mpc8241/1.2 \
+ motorola/mpc8245/1.2 \
+ philips/PARTS \
+ philips/xcr3128xl-cs144/STEPPINGS \
+ philips/xcr3128xl-cs144/xcr3128xl-cs144 \
+ philips/xcr3128xl-vq100/STEPPINGS \
+ philips/xcr3128xl-vq100/xcr3128xl-vq100 \
+ samsung/s3c4510b/s3c4510b \
+ sharp/PARTS \
+ sharp/lh7a400/STEPPINGS \
+ sharp/lh7a400/lh7a400 \
+ sigma/PARTS \
+ sigma/smp8634/STEPPINGS \
+ sigma/smp8634/smp8634 \
+ ti/PARTS \
+ ti/tnetv1060/STEPPINGS \
+ ti/tnetv1060/tnetv1060 \
+ ti/tnetv1061/STEPPINGS \
+ ti/tnetv1061/tnetv1061 \
+ toshiba/PARTS \
+ toshiba/tx4925/STEPPINGS \
+ toshiba/tx4925/tx4925 \
+ toshiba/tx4926/STEPPINGS \
+ toshiba/tx4926/tx4926 \
+ xilinx/PARTS \
+ xilinx/xc18v04pc44/xc18v04pc44 \
+ xilinx/xc18v04pc44/STEPPINGS \
+ xilinx/xc2c256-tq144/STEPPINGS \
+ xilinx/xc2c256-tq144/xc2c256-tq144 \
+ xilinx/xc2c256-vq100/STEPPINGS \
+ xilinx/xc2c256-vq100/xc2c256-vq100 \
+ xilinx/xc2c64a-vq44/STEPPINGS \
+ xilinx/xc2c64a-vq44/xc2c64a-vq44 \
+ xilinx/xc2s200e-pq208/STEPPINGS \
+ xilinx/xc2s200e-pq208/xc2s200e-pq208 \
+ xilinx/xc2s300e/STEPPINGS \
+ xilinx/xc2s300e/xc2s300e \
+ xilinx/xc2v80-fg256/STEPPINGS \
+ xilinx/xc2v80-fg256/xc2v80-fg256 \
+ xilinx/xc2v250-fg256/STEPPINGS \
+ xilinx/xc2v250-fg256/xc2v250-fg256 \
+ xilinx/xc2v1000-fg256/STEPPINGS \
+ xilinx/xc2v1000-fg256/xc2v1000-fg256 \
+ xilinx/xc2s300e/pq208 \
+ xilinx/xc2s300e/ft256 \
+ xilinx/xc2s300e/fg456 \
+ xilinx/xc3s1000/fg676 \
+ xilinx/xc3s1000/xc3s1000 \
+ xilinx/xc3s1000/fg320 \
+ xilinx/xc3s1000/ft256 \
+ xilinx/xc3s1000/STEPPINGS \
+ xilinx/xc3s1000/fg456 \
+ xilinx/xc3s100e_die/xc3s100e_pq208 \
+ xilinx/xc3s100e_die/xc3s100e_tq144 \
+ xilinx/xc3s100e_die/xc3s100e_die \
+ xilinx/xc3s100e_die/STEPPINGS \
+ xilinx/xc3s100e_die/xc3s100e_vq100 \
+ xilinx/xc3s1500/xc3s1500_fg456 \
+ xilinx/xc3s1500/xc3s1500l_fg676 \
+ xilinx/xc3s1500/xc3s1500l \
+ xilinx/xc3s1500/xc3s1500l_fg320 \
+ xilinx/xc3s1500/xc3s1500_fg676 \
+ xilinx/xc3s1500/xc3s1500 \
+ xilinx/xc3s1500/xc3s1500_fg320 \
+ xilinx/xc3s1500/STEPPINGS \
+ xilinx/xc3s1500/xc3s1500l_fg456 \
+ xilinx/xc3s200/xc3s200_tq144 \
+ xilinx/xc3s200/xc3s200 \
+ xilinx/xc3s200/xc3s200_ft256 \
+ xilinx/xc3s200/xc3s200_vq100 \
+ xilinx/xc3s200/STEPPINGS \
+ xilinx/xc3s200/xc3s200_pq208 \
+ xilinx/xc3s2000/xc3s2000_fg676 \
+ xilinx/xc3s2000/xc3s2000 \
+ xilinx/xc3s2000/xc3s2000l_fg900 \
+ xilinx/xc3s2000/xc3s2000_fg900 \
+ xilinx/xc3s2000/STEPPINGS \
+ xilinx/xc3s2000/xc3s2000_fg456 \
+ xilinx/xc3s2000/xc3s2000l_fg676 \
+ xilinx/xc3s2000/xc3s2000l \
+ xilinx/xc3s400/xc3s400_fg456 \
+ xilinx/xc3s400/xc3s400_tq144 \
+ xilinx/xc3s400/xc3s400 \
+ xilinx/xc3s400/xc3s400_fg320 \
+ xilinx/xc3s400/xc3s400_ft256 \
+ xilinx/xc3s400/STEPPINGS \
+ xilinx/xc3s400/xc3s400_pq208 \
+ xilinx/xc3s4000/xc3s4000l \
+ xilinx/xc3s4000/xc3s4000_fg676 \
+ xilinx/xc3s4000/xc3s4000 \
+ xilinx/xc3s4000/xc3s4000l_fg900 \
+ xilinx/xc3s4000/xc3s4000_fg900 \
+ xilinx/xc3s4000/xc3s4000l_fg1156 \
+ xilinx/xc3s4000/STEPPINGS \
+ xilinx/xc3s4000/xc3s4000_fg1156 \
+ xilinx/xc3s50/xc3s50_pq208 \
+ xilinx/xc3s50/xc3s50_tq144 \
+ xilinx/xc3s50/xc3s50 \
+ xilinx/xc3s50/STEPPINGS \
+ xilinx/xc3s50/xc3s50_vq100 \
+ xilinx/xc3s50/xc3s50_cp132 \
+ xilinx/xc3s5000/xc3s5000 \
+ xilinx/xc3s5000/xc3s5000_fg900 \
+ xilinx/xc3s5000/STEPPINGS \
+ xilinx/xc3s5000/xc3s5000_fg1156 \
+ xilinx/xc3s500e_fg320/xc3s500e_ft256 \
+ xilinx/xc3s500e_fg320/xc3s500e_pq208 \
+ xilinx/xc3s500e_fg320/xc3s500e_fg320 \
+ xilinx/xc3s500e_fg320/STEPPINGS \
+ xilinx/xc9572xl_vq44/xc9572xl_vq44 \
+ xilinx/xc9572xl_vq44/STEPPINGS \
+ xilinx/xcf04s/xcf04s \
+ xilinx/xcf04s/STEPPINGS \
+ xilinx/xcr3032xl-vq44/STEPPINGS \
+ xilinx/xcr3032xl-vq44/xcr3032xl-vq44 \
+ xilinx/xcr3128xl-cs144/STEPPINGS \
+ xilinx/xcr3128xl-cs144/xcr3128xl-cs144 \
+ xilinx/xcr3128xl-vq100/xcr3128xl-vq100 \
+ xilinx/xcr3256xl-ft256/STEPPINGS \
+ xilinx/xcr3256xl-ft256/xcr3256xl-ft256
--- /dev/null
+#
+# $Id$
+#
+# JTAG declarations for ADMtek/Infineon ADM5120
+# Copyright (C) 2005 Marek Michalkiewicz
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Marek Michalkiewicz <marekm@amelek.gda.pl>, 2005.
+#
+
+register BR 1
+register BSR 1
+register DIR 32
+register EJIMPCODE 32
+register EJADDRESS 32
+register EJDATA 32
+register EJCONTROL 32
+register EJALL 96
+register EJFASTDATA 33
+
+instruction length 5
+
+instruction BYPASS 11111 BR
+instruction SAMPLE/PRELOAD 00010 BSR
+instruction IDCODE 00001 DIR
+instruction EJTAG_IMPCODE 00011 EJIMPCODE
+instruction EJTAG_ADDRESS 01000 EJADDRESS
+instruction EJTAG_DATA 01001 EJDATA
+instruction EJTAG_CONTROL 01010 EJCONTROL
+instruction EJTAG_ALL 01011 EJALL
+instruction EJTAGBOOT 01100 BR
+instruction NORMALBOOT 01101 BR
+instruction EJTAG_FASTDATA 01110 EJFASTDATA
+
+initbus ejtag
+endian little
--- /dev/null
+#
+# $Id$
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Rojhalat Ibrahim <ibrahim@schenk.isar.de>
+#
+
+# bits 27-12 of the Device Identification Register
+0010000010000010 ep1c6q240 EP1C6Q240
+0010000010000011 ep1c12 EP1C12
+0010000010000100 ep1c20f400 EP1C20F400
+0111000100101000 epm7128aetc100 EPM7128AETC100
+0111000001100100 epm3064a EPM3064A
+0010000010110010 ep2c8 EP2C8
--- /dev/null
+#
+# $Id$
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Arnim Laeuger <arniml@users.sourceforge.net>
+#
+
+# bits 31-28 of the Device Identification Register
+0000 ep1c12 0
--- /dev/null
+#
+# $Id$
+#
+# JTAG declarations for EP1C12
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Arnim Laeuger <arniml@users.sourceforge.net>
+#
+# Note:
+# The signals defined in this file are generic for any EP1C12.
+# Signalnames according to Altera's package tables are set in the
+# package specific scripts.
+#
+# **Testing Differential Pin Pairs**
+# Refer to the note in the original bsd-files for issues related to
+# testing differential pin pairs!
+#
+
+register BYPASS 1
+register BSR 774
+register IOCSR 4454
+register DEVICE_ID 32
+register USERCODE 32
+
+instruction length 10
+instruction BYPASS 1111111111 BYPASS
+instruction IDCODE 0000000110 DEVICE_ID
+instruction USERCODE 0000000111 USERCODE
+instruction CLAMP 0000001010 BYPASS
+instruction SAMPLE/PRELOAD 0000000101 BSR
+instruction EXTEST 0000000000 BSR
+instruction CONFIG_IO 0000001101 IOCSR
+instruction HIGHZ 0000001011 BYPASS
+
+signal BSC0
+signal BSC1
+signal BSC10
+signal BSC100
+signal BSC101
+signal BSC102
+signal BSC103
+signal BSC104
+signal BSC105
+signal BSC106
+signal BSC107
+signal BSC108
+signal BSC109
+signal BSC11
+signal BSC110
+signal BSC111
+signal BSC112
+signal BSC113
+signal BSC114
+signal BSC115
+signal BSC116
+signal BSC117
+signal BSC118
+signal BSC119
+signal BSC12
+signal BSC120
+signal BSC121
+signal BSC122
+signal BSC123
+signal BSC124
+signal BSC125
+signal BSC126
+signal BSC127
+signal BSC128
+signal BSC129
+signal BSC13
+signal BSC130
+signal BSC131
+signal BSC132
+signal BSC133
+signal BSC134
+signal BSC135
+signal BSC136
+signal BSC137
+signal BSC138
+signal BSC139
+signal BSC14
+signal BSC140
+signal BSC141
+signal BSC142
+signal BSC143
+signal BSC144
+signal BSC145
+signal BSC146
+signal BSC147
+signal BSC148
+signal BSC149
+signal BSC15
+signal BSC150
+signal BSC151
+signal BSC152
+signal BSC153
+signal BSC154
+signal BSC155
+signal BSC156
+signal BSC157
+signal BSC158
+signal BSC159
+signal BSC16
+signal BSC160
+signal BSC161
+signal BSC162
+signal BSC163
+signal BSC164
+signal BSC165
+signal BSC166
+signal BSC167
+signal BSC168
+signal BSC169
+signal BSC17
+signal BSC170
+signal BSC171
+signal BSC172
+signal BSC173
+signal BSC174
+signal BSC175
+signal BSC176
+signal BSC177
+signal BSC178
+signal BSC179
+signal BSC18
+signal BSC180
+signal BSC181
+signal BSC182
+signal BSC183
+signal BSC184
+signal BSC185
+signal BSC186
+signal BSC187
+signal BSC188
+signal BSC189
+signal BSC19
+signal BSC190
+signal BSC191
+signal BSC192
+signal BSC193
+signal BSC194
+signal BSC195
+signal BSC196
+signal BSC197
+signal BSC198
+signal BSC199
+signal BSC2
+signal BSC20
+signal BSC200
+signal BSC201
+signal BSC202
+signal BSC203
+signal BSC204
+signal BSC205
+signal BSC206
+signal BSC207
+signal BSC208
+signal BSC209
+signal BSC21
+signal BSC210
+signal BSC211
+signal BSC212
+signal BSC213
+signal BSC214
+signal BSC215
+signal BSC216
+signal BSC217
+signal BSC218
+signal BSC22
+signal BSC228
+signal BSC229
+signal BSC23
+signal BSC230
+signal BSC231
+signal BSC232
+signal BSC233
+signal BSC234
+signal BSC235
+signal BSC236
+signal BSC237
+signal BSC238
+signal BSC239
+signal BSC24
+signal BSC240
+signal BSC241
+signal BSC242
+signal BSC243
+signal BSC244
+signal BSC245
+signal BSC246
+signal BSC247
+signal BSC248
+signal BSC249
+signal BSC25
+signal BSC250
+signal BSC251
+signal BSC252
+signal BSC253
+signal BSC254
+signal BSC255
+signal BSC256
+signal BSC257
+signal BSC26
+signal BSC27
+signal BSC28
+signal BSC29
+signal BSC3
+signal BSC30
+signal BSC31
+signal BSC32
+signal BSC33
+signal BSC34
+signal BSC35
+signal BSC36
+signal BSC37
+signal BSC38
+signal BSC39
+signal BSC4
+signal BSC40
+signal BSC41
+signal BSC42
+signal BSC43
+signal BSC44
+signal BSC45
+signal BSC46
+signal BSC47
+signal BSC48
+signal BSC49
+signal BSC5
+signal BSC50
+signal BSC51
+signal BSC52
+signal BSC53
+signal BSC54
+signal BSC55
+signal BSC56
+signal BSC57
+signal BSC58
+signal BSC59
+signal BSC6
+signal BSC60
+signal BSC61
+signal BSC62
+signal BSC63
+signal BSC64
+signal BSC65
+signal BSC66
+signal BSC67
+signal BSC68
+signal BSC69
+signal BSC7
+signal BSC70
+signal BSC71
+signal BSC72
+signal BSC73
+signal BSC74
+signal BSC75
+signal BSC76
+signal BSC77
+signal BSC78
+signal BSC79
+signal BSC8
+signal BSC80
+signal BSC81
+signal BSC82
+signal BSC83
+signal BSC84
+signal BSC85
+signal BSC86
+signal BSC87
+signal BSC88
+signal BSC89
+signal BSC9
+signal BSC90
+signal BSC91
+signal BSC96
+signal BSC97
+signal BSC98
+signal BSC99
+signal CLK0
+signal CLK2
+signal DATA0
+signal DCLK
+signal MSEL0
+signal MSEL1
+
+bit 0 I ? BSC0
+bit 1 C 1 *
+bit 2 O ? BSC0 1 1 Z
+bit 3 I ? BSC1
+bit 4 C 1 *
+bit 5 O ? BSC1 4 1 Z
+bit 6 I ? BSC2
+bit 7 C 1 *
+bit 8 O ? BSC2 7 1 Z
+bit 9 I ? BSC3
+bit 10 C 1 *
+bit 11 O ? BSC3 10 1 Z
+bit 12 I ? BSC4
+bit 13 C 1 *
+bit 14 O ? BSC4 13 1 Z
+bit 15 I ? BSC5
+bit 16 C 1 *
+bit 17 O ? BSC5 16 1 Z
+bit 18 I ? BSC6
+bit 19 C 1 *
+bit 20 O ? BSC6 19 1 Z
+bit 21 I ? BSC7
+bit 22 C 1 *
+bit 23 O ? BSC7 22 1 Z
+bit 24 I ? BSC8
+bit 25 C 1 *
+bit 26 O ? BSC8 25 1 Z
+bit 27 I ? BSC9
+bit 28 C 1 *
+bit 29 O ? BSC9 28 1 Z
+bit 30 I ? BSC10
+bit 31 C 1 *
+bit 32 O ? BSC10 31 1 Z
+bit 33 I ? BSC11
+bit 34 C 1 *
+bit 35 O ? BSC11 34 1 Z
+bit 36 I ? BSC12
+bit 37 C 1 *
+bit 38 O ? BSC12 37 1 Z
+bit 39 I ? BSC13
+bit 40 C 1 *
+bit 41 O ? BSC13 40 1 Z
+bit 42 I ? BSC14
+bit 43 C 1 *
+bit 44 O ? BSC14 43 1 Z
+bit 45 I ? BSC15
+bit 46 C 1 *
+bit 47 O ? BSC15 46 1 Z
+bit 48 I ? BSC16
+bit 49 C 1 *
+bit 50 O ? BSC16 49 1 Z
+bit 51 I ? BSC17
+bit 52 C 1 *
+bit 53 O ? BSC17 52 1 Z
+bit 54 I ? BSC18
+bit 55 C 1 *
+bit 56 O ? BSC18 55 1 Z
+bit 57 I ? BSC19
+bit 58 C 1 *
+bit 59 O ? BSC19 58 1 Z
+bit 60 I ? BSC20
+bit 61 C 1 *
+bit 62 O ? BSC20 61 1 Z
+bit 63 I ? BSC21
+bit 64 C 1 *
+bit 65 O ? BSC21 64 1 Z
+bit 66 I ? BSC22
+bit 67 C 1 *
+bit 68 O ? BSC22 67 1 Z
+bit 69 I ? BSC23
+bit 70 C 1 *
+bit 71 O ? BSC23 70 1 Z
+bit 72 I ? BSC24
+bit 73 C 1 *
+bit 74 O ? BSC24 73 1 Z
+bit 75 I ? BSC25
+bit 76 C 1 *
+bit 77 O ? BSC25 76 1 Z
+bit 78 I ? BSC26
+bit 79 C 1 *
+bit 80 O ? BSC26 79 1 Z
+bit 81 I ? BSC27
+bit 82 C 1 *
+bit 83 O ? BSC27 82 1 Z
+bit 84 I ? BSC28
+bit 85 C 1 *
+bit 86 O ? BSC28 85 1 Z
+bit 87 I ? BSC29
+bit 88 C 1 *
+bit 89 O ? BSC29 88 1 Z
+bit 90 I ? BSC30
+bit 91 C 1 *
+bit 92 O ? BSC30 91 1 Z
+bit 93 I ? BSC31
+bit 94 C 1 *
+bit 95 O ? BSC31 94 1 Z
+bit 96 I ? BSC32
+bit 97 C 1 *
+bit 98 O ? BSC32 97 1 Z
+bit 99 I ? BSC33
+bit 100 C 1 *
+bit 101 O ? BSC33 100 1 Z
+bit 102 I ? BSC34
+bit 103 C 1 *
+bit 104 O ? BSC34 103 1 Z
+bit 105 I ? BSC35
+bit 106 C 1 *
+bit 107 O ? BSC35 106 1 Z
+bit 108 I ? BSC36
+bit 109 C 1 *
+bit 110 O ? BSC36 109 1 Z
+bit 111 I ? BSC37
+bit 112 C 1 *
+bit 113 O ? BSC37 112 1 Z
+bit 114 I ? BSC38
+bit 115 C 1 *
+bit 116 O ? BSC38 115 1 Z
+bit 117 I ? BSC39
+bit 118 C 1 *
+bit 119 O ? BSC39 118 1 Z
+bit 120 I ? BSC40
+bit 121 C 1 *
+bit 122 O ? BSC40 121 1 Z
+bit 123 I ? BSC41
+bit 124 C 1 *
+bit 125 O ? BSC41 124 1 Z
+bit 126 I ? BSC42
+bit 127 C 1 *
+bit 128 O ? BSC42 127 1 Z
+bit 129 I ? BSC43
+bit 130 C 1 *
+bit 131 O ? BSC43 130 1 Z
+bit 132 I ? BSC44
+bit 133 C 1 *
+bit 134 O ? BSC44 133 1 Z
+bit 135 I ? BSC45
+bit 136 C 1 *
+bit 137 O ? BSC45 136 1 Z
+bit 138 I ? BSC46
+bit 139 C 1 *
+bit 140 O ? BSC46 139 1 Z
+bit 141 I ? BSC47
+bit 142 C 1 *
+bit 143 O ? BSC47 142 1 Z
+bit 144 I ? BSC48
+bit 145 C 1 *
+bit 146 O ? BSC48 145 1 Z
+bit 147 I ? BSC49
+bit 148 C 1 *
+bit 149 O ? BSC49 148 1 Z
+bit 150 I ? BSC50
+bit 151 C 1 *
+bit 152 O ? BSC50 151 1 Z
+bit 153 I ? BSC51
+bit 154 C 1 *
+bit 155 O ? BSC51 154 1 Z
+bit 156 I ? BSC52
+bit 157 C 1 *
+bit 158 O ? BSC52 157 1 Z
+bit 159 I ? BSC53
+bit 160 C 1 *
+bit 161 O ? BSC53 160 1 Z
+bit 162 I ? BSC54
+bit 163 C 1 *
+bit 164 O ? BSC54 163 1 Z
+bit 165 I ? BSC55
+bit 166 C 1 *
+bit 167 O ? BSC55 166 1 Z
+bit 168 I ? BSC56
+bit 169 C 1 *
+bit 170 O ? BSC56 169 1 Z
+bit 171 I ? BSC57
+bit 172 C 1 *
+bit 173 O ? BSC57 172 1 Z
+bit 174 I ? BSC58
+bit 175 C 1 *
+bit 176 O ? BSC58 175 1 Z
+bit 177 I ? BSC59
+bit 178 C 1 *
+bit 179 O ? BSC59 178 1 Z
+bit 180 I ? BSC60
+bit 181 C 1 *
+bit 182 O ? BSC60 181 1 Z
+bit 183 I ? BSC61
+bit 184 C 1 *
+bit 185 O ? BSC61 184 1 Z
+bit 186 I ? BSC62
+bit 187 C 1 *
+bit 188 O ? BSC62 187 1 Z
+bit 189 I ? BSC63
+bit 190 C 1 *
+bit 191 O ? BSC63 190 1 Z
+bit 192 I ? BSC64
+bit 193 C 1 *
+bit 194 O ? BSC64 193 1 Z
+bit 195 I ? BSC65
+bit 196 C 1 *
+bit 197 O ? BSC65 196 1 Z
+bit 198 I ? BSC66
+bit 199 C 1 *
+bit 200 O ? BSC66 199 1 Z
+bit 201 I ? BSC67
+bit 202 C 1 *
+bit 203 O ? BSC67 202 1 Z
+bit 204 I ? BSC68
+bit 205 C 1 *
+bit 206 O ? BSC68 205 1 Z
+bit 207 I ? BSC69
+bit 208 C 1 *
+bit 209 O ? BSC69 208 1 Z
+bit 210 I ? BSC70
+bit 211 C 1 *
+bit 212 O ? BSC70 211 1 Z
+bit 213 I ? BSC71
+bit 214 C 1 *
+bit 215 O ? BSC71 214 1 Z
+bit 216 I ? BSC72
+bit 217 C 1 *
+bit 218 O ? BSC72 217 1 Z
+bit 219 I ? BSC73
+bit 220 C 1 *
+bit 221 O ? BSC73 220 1 Z
+bit 222 I ? BSC74
+bit 223 C 1 *
+bit 224 O ? BSC74 223 1 Z
+bit 225 I ? BSC75
+bit 226 C 1 *
+bit 227 O ? BSC75 226 1 Z
+bit 228 I ? BSC76
+bit 229 C 1 *
+bit 230 O ? BSC76 229 1 Z
+bit 231 I ? BSC77
+bit 232 C 1 *
+bit 233 O ? BSC77 232 1 Z
+bit 234 I ? BSC78
+bit 235 C 1 *
+bit 236 O ? BSC78 235 1 Z
+bit 237 I ? BSC79
+bit 238 C 1 *
+bit 239 O ? BSC79 238 1 Z
+bit 240 I ? BSC80
+bit 241 C 1 *
+bit 242 O ? BSC80 241 1 Z
+bit 243 I ? BSC81
+bit 244 C 1 *
+bit 245 O ? BSC81 244 1 Z
+bit 246 I ? BSC82
+bit 247 C 1 *
+bit 248 O ? BSC82 247 1 Z
+bit 249 I ? BSC83
+bit 250 C 1 *
+bit 251 O ? BSC83 250 1 Z
+bit 252 I ? BSC84
+bit 253 C 1 *
+bit 254 O ? BSC84 253 1 Z
+bit 255 I ? BSC85
+bit 256 C 1 *
+bit 257 O ? BSC85 256 1 Z
+bit 258 I ? BSC86
+bit 259 C 1 *
+bit 260 O ? BSC86 259 1 Z
+bit 261 I ? BSC87
+bit 262 C 1 *
+bit 263 O ? BSC87 262 1 Z
+bit 264 I ? BSC88
+bit 265 C 1 *
+bit 266 O ? BSC88 265 1 Z
+bit 267 I ? BSC89
+bit 268 C 1 *
+bit 269 O ? BSC89 268 1 Z
+bit 270 I ? BSC90
+bit 271 C 1 *
+bit 272 O ? BSC90 271 1 Z
+bit 273 I ? BSC91
+bit 274 C 1 *
+bit 275 O ? BSC91 274 1 Z
+bit 276 I ? CLK2
+bit 277 X ? *
+bit 278 X ? *
+bit 279 X ? *
+bit 280 X 1 *
+bit 281 X ? *
+bit 282 X ? *
+bit 283 X 1 *
+bit 284 X ? *
+bit 285 X ? *
+bit 286 X 1 *
+bit 287 X ? *
+bit 288 I ? BSC96
+bit 289 C 1 *
+bit 290 O ? BSC96 289 1 Z
+bit 291 I ? BSC97
+bit 292 C 1 *
+bit 293 O ? BSC97 292 1 Z
+bit 294 I ? BSC98
+bit 295 C 1 *
+bit 296 O ? BSC98 295 1 Z
+bit 297 I ? BSC99
+bit 298 C 1 *
+bit 299 O ? BSC99 298 1 Z
+bit 300 I ? BSC100
+bit 301 C 1 *
+bit 302 O ? BSC100 301 1 Z
+bit 303 I ? BSC101
+bit 304 C 1 *
+bit 305 O ? BSC101 304 1 Z
+bit 306 I ? BSC102
+bit 307 C 1 *
+bit 308 O ? BSC102 307 1 Z
+bit 309 I ? BSC103
+bit 310 C 1 *
+bit 311 O ? BSC103 310 1 Z
+bit 312 I ? BSC104
+bit 313 C 1 *
+bit 314 O ? BSC104 313 1 Z
+bit 315 I ? BSC105
+bit 316 C 1 *
+bit 317 O ? BSC105 316 1 Z
+bit 318 I ? BSC106
+bit 319 C 1 *
+bit 320 O ? BSC106 319 1 Z
+bit 321 I ? BSC107
+bit 322 C 1 *
+bit 323 O ? BSC107 322 1 Z
+bit 324 I ? BSC108
+bit 325 C 1 *
+bit 326 O ? BSC108 325 1 Z
+bit 327 I ? BSC109
+bit 328 C 1 *
+bit 329 O ? BSC109 328 1 Z
+bit 330 I ? BSC110
+bit 331 C 1 *
+bit 332 O ? BSC110 331 1 Z
+bit 333 I ? BSC111
+bit 334 C 1 *
+bit 335 O ? BSC111 334 1 Z
+bit 336 I ? BSC112
+bit 337 C 1 *
+bit 338 O ? BSC112 337 1 Z
+bit 339 I ? BSC113
+bit 340 C 1 *
+bit 341 O ? BSC113 340 1 Z
+bit 342 I ? BSC114
+bit 343 C 1 *
+bit 344 O ? BSC114 343 1 Z
+bit 345 I ? BSC115
+bit 346 C 1 *
+bit 347 O ? BSC115 346 1 Z
+bit 348 I ? BSC116
+bit 349 C 1 *
+bit 350 O ? BSC116 349 1 Z
+bit 351 I ? BSC117
+bit 352 C 1 *
+bit 353 O ? BSC117 352 1 Z
+bit 354 I ? BSC118
+bit 355 C 1 *
+bit 356 O ? BSC118 355 1 Z
+bit 357 I ? BSC119
+bit 358 C 1 *
+bit 359 O ? BSC119 358 1 Z
+bit 360 I ? BSC120
+bit 361 C 1 *
+bit 362 O ? BSC120 361 1 Z
+bit 363 I ? BSC121
+bit 364 C 1 *
+bit 365 O ? BSC121 364 1 Z
+bit 366 I ? BSC122
+bit 367 C 1 *
+bit 368 O ? BSC122 367 1 Z
+bit 369 I ? BSC123
+bit 370 C 1 *
+bit 371 O ? BSC123 370 1 Z
+bit 372 I ? BSC124
+bit 373 C 1 *
+bit 374 O ? BSC124 373 1 Z
+bit 375 I ? BSC125
+bit 376 C 1 *
+bit 377 O ? BSC125 376 1 Z
+bit 378 I ? BSC126
+bit 379 C 1 *
+bit 380 O ? BSC126 379 1 Z
+bit 381 I ? BSC127
+bit 382 C 1 *
+bit 383 O ? BSC127 382 1 Z
+bit 384 I ? BSC128
+bit 385 C 1 *
+bit 386 O ? BSC128 385 1 Z
+bit 387 I ? BSC129
+bit 388 C 1 *
+bit 389 O ? BSC129 388 1 Z
+bit 390 I ? BSC130
+bit 391 C 1 *
+bit 392 O ? BSC130 391 1 Z
+bit 393 I ? BSC131
+bit 394 C 1 *
+bit 395 O ? BSC131 394 1 Z
+bit 396 I ? BSC132
+bit 397 C 1 *
+bit 398 O ? BSC132 397 1 Z
+bit 399 I ? BSC133
+bit 400 C 1 *
+bit 401 O ? BSC133 400 1 Z
+bit 402 I ? BSC134
+bit 403 C 1 *
+bit 404 O ? BSC134 403 1 Z
+bit 405 I ? BSC135
+bit 406 C 1 *
+bit 407 O ? BSC135 406 1 Z
+bit 408 I ? BSC136
+bit 409 C 1 *
+bit 410 O ? BSC136 409 1 Z
+bit 411 I ? BSC137
+bit 412 C 1 *
+bit 413 O ? BSC137 412 1 Z
+bit 414 I ? BSC138
+bit 415 C 1 *
+bit 416 O ? BSC138 415 1 Z
+bit 417 I ? BSC139
+bit 418 C 1 *
+bit 419 O ? BSC139 418 1 Z
+bit 420 I ? BSC140
+bit 421 C 1 *
+bit 422 O ? BSC140 421 1 Z
+bit 423 I ? BSC141
+bit 424 C 1 *
+bit 425 O ? BSC141 424 1 Z
+bit 426 I ? BSC142
+bit 427 C 1 *
+bit 428 O ? BSC142 427 1 Z
+bit 429 I ? BSC143
+bit 430 C 1 *
+bit 431 O ? BSC143 430 1 Z
+bit 432 I ? BSC144
+bit 433 C 1 *
+bit 434 O ? BSC144 433 1 Z
+bit 435 I ? BSC145
+bit 436 C 1 *
+bit 437 O ? BSC145 436 1 Z
+bit 438 I ? BSC146
+bit 439 C 1 *
+bit 440 O ? BSC146 439 1 Z
+bit 441 I ? BSC147
+bit 442 C 1 *
+bit 443 O ? BSC147 442 1 Z
+bit 444 I ? BSC148
+bit 445 C 1 *
+bit 446 O ? BSC148 445 1 Z
+bit 447 I ? BSC149
+bit 448 C 1 *
+bit 449 O ? BSC149 448 1 Z
+bit 450 I ? BSC150
+bit 451 C 1 *
+bit 452 O ? BSC150 451 1 Z
+bit 453 I ? BSC151
+bit 454 C 1 *
+bit 455 O ? BSC151 454 1 Z
+bit 456 I ? BSC152
+bit 457 C 1 *
+bit 458 O ? BSC152 457 1 Z
+bit 459 I ? BSC153
+bit 460 C 1 *
+bit 461 O ? BSC153 460 1 Z
+bit 462 I ? BSC154
+bit 463 C 1 *
+bit 464 O ? BSC154 463 1 Z
+bit 465 I ? BSC155
+bit 466 C 1 *
+bit 467 O ? BSC155 466 1 Z
+bit 468 I ? BSC156
+bit 469 C 1 *
+bit 470 O ? BSC156 469 1 Z
+bit 471 I ? BSC157
+bit 472 C 1 *
+bit 473 O ? BSC157 472 1 Z
+bit 474 I ? BSC158
+bit 475 C 1 *
+bit 476 O ? BSC158 475 1 Z
+bit 477 I ? BSC159
+bit 478 C 1 *
+bit 479 O ? BSC159 478 1 Z
+bit 480 I ? BSC160
+bit 481 C 1 *
+bit 482 O ? BSC160 481 1 Z
+bit 483 I ? BSC161
+bit 484 C 1 *
+bit 485 O ? BSC161 484 1 Z
+bit 486 I ? BSC162
+bit 487 C 1 *
+bit 488 O ? BSC162 487 1 Z
+bit 489 I ? BSC163
+bit 490 C 1 *
+bit 491 O ? BSC163 490 1 Z
+bit 492 I ? BSC164
+bit 493 C 1 *
+bit 494 O ? BSC164 493 1 Z
+bit 495 I ? BSC165
+bit 496 C 1 *
+bit 497 O ? BSC165 496 1 Z
+bit 498 I ? BSC166
+bit 499 C 1 *
+bit 500 O ? BSC166 499 1 Z
+bit 501 I ? BSC167
+bit 502 C 1 *
+bit 503 O ? BSC167 502 1 Z
+bit 504 I ? BSC168
+bit 505 C 1 *
+bit 506 O ? BSC168 505 1 Z
+bit 507 I ? BSC169
+bit 508 C 1 *
+bit 509 O ? BSC169 508 1 Z
+bit 510 I ? BSC170
+bit 511 C 1 *
+bit 512 O ? BSC170 511 1 Z
+bit 513 I ? BSC171
+bit 514 C 1 *
+bit 515 O ? BSC171 514 1 Z
+bit 516 I ? BSC172
+bit 517 C 1 *
+bit 518 O ? BSC172 517 1 Z
+bit 519 I ? BSC173
+bit 520 C 1 *
+bit 521 O ? BSC173 520 1 Z
+bit 522 I ? BSC174
+bit 523 C 1 *
+bit 524 O ? BSC174 523 1 Z
+bit 525 I ? BSC175
+bit 526 C 1 *
+bit 527 O ? BSC175 526 1 Z
+bit 528 I ? BSC176
+bit 529 C 1 *
+bit 530 O ? BSC176 529 1 Z
+bit 531 I ? BSC177
+bit 532 C 1 *
+bit 533 O ? BSC177 532 1 Z
+bit 534 I ? BSC178
+bit 535 C 1 *
+bit 536 O ? BSC178 535 1 Z
+bit 537 I ? BSC179
+bit 538 C 1 *
+bit 539 O ? BSC179 538 1 Z
+bit 540 I ? BSC180
+bit 541 C 1 *
+bit 542 O ? BSC180 541 1 Z
+bit 543 I ? BSC181
+bit 544 C 1 *
+bit 545 O ? BSC181 544 1 Z
+bit 546 I ? BSC182
+bit 547 C 1 *
+bit 548 O ? BSC182 547 1 Z
+bit 549 I ? BSC183
+bit 550 C 1 *
+bit 551 O ? BSC183 550 1 Z
+bit 552 I ? BSC184
+bit 553 C 1 *
+bit 554 O ? BSC184 553 1 Z
+bit 555 I ? BSC185
+bit 556 C 1 *
+bit 557 O ? BSC185 556 1 Z
+bit 558 I ? BSC186
+bit 559 C 1 *
+bit 560 O ? BSC186 559 1 Z
+bit 561 I ? BSC187
+bit 562 C 1 *
+bit 563 O ? BSC187 562 1 Z
+bit 564 I ? BSC188
+bit 565 C 1 *
+bit 566 O ? BSC188 565 1 Z
+bit 567 I ? BSC189
+bit 568 C 1 *
+bit 569 O ? BSC189 568 1 Z
+bit 570 I ? BSC190
+bit 571 C 1 *
+bit 572 O ? BSC190 571 1 Z
+bit 573 I ? BSC191
+bit 574 C 1 *
+bit 575 O ? BSC191 574 1 Z
+bit 576 I ? BSC192
+bit 577 C 1 *
+bit 578 O ? BSC192 577 1 Z
+bit 579 I ? BSC193
+bit 580 C 1 *
+bit 581 O ? BSC193 580 1 Z
+bit 582 I ? BSC194
+bit 583 C 1 *
+bit 584 O ? BSC194 583 1 Z
+bit 585 I ? BSC195
+bit 586 C 1 *
+bit 587 O ? BSC195 586 1 Z
+bit 588 I ? BSC196
+bit 589 C 1 *
+bit 590 O ? BSC196 589 1 Z
+bit 591 I ? BSC197
+bit 592 C 1 *
+bit 593 O ? BSC197 592 1 Z
+bit 594 I ? BSC198
+bit 595 C 1 *
+bit 596 O ? BSC198 595 1 Z
+bit 597 I ? BSC199
+bit 598 C 1 *
+bit 599 O ? BSC199 598 1 Z
+bit 600 I ? BSC200
+bit 601 C 1 *
+bit 602 O ? BSC200 601 1 Z
+bit 603 I ? BSC201
+bit 604 C 1 *
+bit 605 O ? BSC201 604 1 Z
+bit 606 I ? BSC202
+bit 607 C 1 *
+bit 608 O ? BSC202 607 1 Z
+bit 609 I ? BSC203
+bit 610 C 1 *
+bit 611 O ? BSC203 610 1 Z
+bit 612 I ? BSC204
+bit 613 C 1 *
+bit 614 O ? BSC204 613 1 Z
+bit 615 I ? BSC205
+bit 616 C 1 *
+bit 617 O ? BSC205 616 1 Z
+bit 618 I ? BSC206
+bit 619 C 1 *
+bit 620 O ? BSC206 619 1 Z
+bit 621 I ? BSC207
+bit 622 C 1 *
+bit 623 O ? BSC207 622 1 Z
+bit 624 I ? BSC208
+bit 625 C 1 *
+bit 626 O ? BSC208 625 1 Z
+bit 627 I ? BSC209
+bit 628 C 1 *
+bit 629 O ? BSC209 628 1 Z
+bit 630 I ? BSC210
+bit 631 C 1 *
+bit 632 O ? BSC210 631 1 Z
+bit 633 I ? BSC211
+bit 634 C 1 *
+bit 635 O ? BSC211 634 1 Z
+bit 636 I ? BSC212
+bit 637 C 1 *
+bit 638 O ? BSC212 637 1 Z
+bit 639 I ? BSC213
+bit 640 C 1 *
+bit 641 O ? BSC213 640 1 Z
+bit 642 I ? BSC214
+bit 643 C 1 *
+bit 644 O ? BSC214 643 1 Z
+bit 645 I ? BSC215
+bit 646 C 1 *
+bit 647 O ? BSC215 646 1 Z
+bit 648 I ? BSC216
+bit 649 C 1 *
+bit 650 O ? BSC216 649 1 Z
+bit 651 I ? BSC217
+bit 652 C 1 *
+bit 653 O ? BSC217 652 1 Z
+bit 654 I ? BSC218
+bit 655 C 1 *
+bit 656 O ? BSC218 655 1 Z
+bit 657 I ? DCLK
+bit 658 C 1 *
+bit 659 O ? DCLK 658 1 Z
+bit 660 I ? MSEL1
+bit 661 X ? *
+bit 662 X ? *
+bit 663 I ? MSEL0
+bit 664 X ? *
+bit 665 X ? *
+bit 666 X ? *
+bit 667 X 1 *
+bit 668 X ? *
+bit 669 X ? *
+bit 670 X 1 *
+bit 671 X ? *
+bit 672 X ? *
+bit 673 X 1 *
+bit 674 X ? *
+bit 675 I ? CLK0
+bit 676 X ? *
+bit 677 X ? *
+bit 678 X ? *
+bit 679 X 1 *
+bit 680 X ? *
+bit 681 I ? DATA0
+bit 682 X ? *
+bit 683 X ? *
+bit 684 I ? BSC228
+bit 685 C 1 *
+bit 686 O ? BSC228 685 1 Z
+bit 687 I ? BSC229
+bit 688 C 1 *
+bit 689 O ? BSC229 688 1 Z
+bit 690 I ? BSC230
+bit 691 C 1 *
+bit 692 O ? BSC230 691 1 Z
+bit 693 I ? BSC231
+bit 694 C 1 *
+bit 695 O ? BSC231 694 1 Z
+bit 696 I ? BSC232
+bit 697 C 1 *
+bit 698 O ? BSC232 697 1 Z
+bit 699 I ? BSC233
+bit 700 C 1 *
+bit 701 O ? BSC233 700 1 Z
+bit 702 I ? BSC234
+bit 703 C 1 *
+bit 704 O ? BSC234 703 1 Z
+bit 705 I ? BSC235
+bit 706 C 1 *
+bit 707 O ? BSC235 706 1 Z
+bit 708 I ? BSC236
+bit 709 C 1 *
+bit 710 O ? BSC236 709 1 Z
+bit 711 I ? BSC237
+bit 712 C 1 *
+bit 713 O ? BSC237 712 1 Z
+bit 714 I ? BSC238
+bit 715 C 1 *
+bit 716 O ? BSC238 715 1 Z
+bit 717 I ? BSC239
+bit 718 C 1 *
+bit 719 O ? BSC239 718 1 Z
+bit 720 I ? BSC240
+bit 721 C 1 *
+bit 722 O ? BSC240 721 1 Z
+bit 723 I ? BSC241
+bit 724 C 1 *
+bit 725 O ? BSC241 724 1 Z
+bit 726 I ? BSC242
+bit 727 C 1 *
+bit 728 O ? BSC242 727 1 Z
+bit 729 I ? BSC243
+bit 730 C 1 *
+bit 731 O ? BSC243 730 1 Z
+bit 732 I ? BSC244
+bit 733 C 1 *
+bit 734 O ? BSC244 733 1 Z
+bit 735 I ? BSC245
+bit 736 C 1 *
+bit 737 O ? BSC245 736 1 Z
+bit 738 I ? BSC246
+bit 739 C 1 *
+bit 740 O ? BSC246 739 1 Z
+bit 741 I ? BSC247
+bit 742 C 1 *
+bit 743 O ? BSC247 742 1 Z
+bit 744 I ? BSC248
+bit 745 C 1 *
+bit 746 O ? BSC248 745 1 Z
+bit 747 I ? BSC249
+bit 748 C 1 *
+bit 749 O ? BSC249 748 1 Z
+bit 750 I ? BSC250
+bit 751 C 1 *
+bit 752 O ? BSC250 751 1 Z
+bit 753 I ? BSC251
+bit 754 C 1 *
+bit 755 O ? BSC251 754 1 Z
+bit 756 I ? BSC252
+bit 757 C 1 *
+bit 758 O ? BSC252 757 1 Z
+bit 759 I ? BSC253
+bit 760 C 1 *
+bit 761 O ? BSC253 760 1 Z
+bit 762 I ? BSC254
+bit 763 C 1 *
+bit 764 O ? BSC254 763 1 Z
+bit 765 I ? BSC255
+bit 766 C 1 *
+bit 767 O ? BSC255 766 1 Z
+bit 768 I ? BSC256
+bit 769 C 1 *
+bit 770 O ? BSC256 769 1 Z
+bit 771 I ? BSC257
+bit 772 C 1 *
+bit 773 O ? BSC257 772 1 Z
--- /dev/null
+#
+# $Id$
+#
+# JTAG package script for EP1C12F256
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Arnim Laeuger <arniml@users.sourceforge.net>
+#
+
+salias IOB2 BSC0
+salias IOA2 BSC1
+salias IOB3 BSC2
+salias IOC4 BSC3
+salias IOB4 BSC4
+salias IOA4 BSC5
+salias IOB5 BSC6
+salias IOC5 BSC7
+salias IOE5 BSC8
+salias IOE6 BSC9
+salias IOD5 BSC10
+salias IOD6 BSC11
+salias IOC6 BSC12
+salias IOB6 BSC13
+salias IOE7 BSC14
+salias IOA6 BSC16
+salias IOB7 BSC17
+salias IOC7 BSC18
+salias IOD7 BSC19
+salias IOB8 BSC20
+salias IOA8 BSC21
+salias IOE8 BSC22
+salias IOD8 BSC26
+salias IOC8 BSC27
+salias IOE10 BSC30
+salias IOC9 BSC33
+salias IOD9 BSC34
+salias IOB9 BSC36
+salias IOA9 BSC37
+salias IOD10 BSC38
+salias IOC10 BSC39
+salias IOB10 BSC40
+salias IOA11 BSC41
+salias IOB11 BSC42
+salias IOC11 BSC43
+salias IOD11 BSC48
+salias IOD12 BSC49
+salias IOE9 BSC50
+salias IOE11 BSC51
+salias IOE12 BSC52
+salias IOC12 BSC53
+salias IOB12 BSC54
+salias IOA13 BSC55
+salias IOB13 BSC56
+salias IOC13 BSC57
+salias IOB14 BSC58
+salias IOA15 BSC59
+salias IOB15 BSC60
+salias IOD13 BSC61
+salias IOC14 BSC62
+salias IOC15 BSC63
+salias IOB16 BSC64
+salias IOG12 BSC65
+salias IOH13 BSC66
+salias IOD14 BSC67
+salias IOE13 BSC68
+salias IOF12 BSC69
+salias IOE14 BSC70
+salias IOD15 BSC71
+salias IOD16 BSC72
+salias IOE15 BSC73
+salias IOE16 BSC74
+salias IOF15 BSC75
+salias IOF13 BSC76
+salias IOF14 BSC77
+salias IOF16 BSC78
+salias IOG15 BSC79
+salias IOG13 BSC80
+salias IOG14 BSC81
+salias IOH12 BSC91
+salias IOJ16 BSC96
+salias IOK15 BSC97
+salias IOK16 BSC108
+salias IOL16 BSC109
+salias IOL15 BSC110
+salias IOL14 BSC111
+salias IOM16 BSC112
+salias IOM15 BSC113
+salias IOL13 BSC114
+salias IOM14 BSC115
+salias IOM13 BSC116
+salias ION14 BSC117
+salias IOL12 BSC118
+salias IOK14 BSC119
+salias IOK12 BSC120
+salias ION16 BSC121
+salias ION15 BSC122
+salias IOR16 BSC123
+salias IOP15 BSC124
+salias IOP14 BSC125
+salias ION13 BSC126
+salias IOR15 BSC127
+salias IOT15 BSC128
+salias IOP13 BSC129
+salias IOR14 BSC130
+salias IOR13 BSC131
+salias IOT13 BSC132
+salias IOR12 BSC133
+salias IOP12 BSC134
+salias IOM12 BSC135
+salias IOM11 BSC136
+salias IOM9 BSC137
+salias ION12 BSC138
+salias ION11 BSC139
+salias IOP11 BSC144
+salias IOR11 BSC145
+salias IOP10 BSC146
+salias ION10 BSC147
+salias IOT11 BSC148
+salias IOR10 BSC149
+salias ION9 BSC150
+salias IOP9 BSC151
+salias IOT9 BSC153
+salias IOR9 BSC154
+salias IOM10 BSC157
+salias IOP8 BSC160
+salias ION8 BSC161
+salias IOM8 BSC165
+salias IOT8 BSC166
+salias IOR8 BSC167
+salias ION7 BSC168
+salias IOP7 BSC169
+salias IOR7 BSC170
+salias IOT6 BSC171
+salias IOM7 BSC173
+salias IOR6 BSC174
+salias IOP6 BSC175
+salias ION6 BSC176
+salias ION5 BSC177
+salias IOM6 BSC178
+salias IOM5 BSC179
+salias IOP5 BSC180
+salias IOR5 BSC181
+salias IOT4 BSC182
+salias IOR4 BSC183
+salias IOP4 BSC184
+salias IOR3 BSC185
+salias IOT2 BSC186
+salias IOR2 BSC187
+salias ION4 BSC188
+salias IOP3 BSC189
+salias IOP2 BSC190
+salias IOR1 BSC191
+salias IOL4 BSC192
+salias IOK5 BSC193
+salias ION3 BSC194
+salias IOM4 BSC195
+salias IOL5 BSC196
+salias IOM3 BSC197
+salias ION2 BSC198
+salias IOM2 BSC199
+salias ION1 BSC200
+salias IOM1 BSC201
+salias IOL2 BSC202
+salias IOL1 BSC203
+salias IOK1 BSC204
+salias IOL3 BSC205
+salias IOK2 BSC216
+salias IOJ1 BSC217
+salias IOK3 BSC218
+salias IOG4 BSC228
+salias IOH5 BSC229
+salias IOF1 BSC239
+salias IOG2 BSC240
+salias IOE1 BSC241
+salias IOF2 BSC242
+salias IOG3 BSC243
+salias IOF3 BSC244
+salias IOD1 BSC245
+salias IOE2 BSC246
+salias IOD2 BSC247
+salias IOE3 BSC248
+salias IOF5 BSC249
+salias IOE4 BSC250
+salias IOD3 BSC251
+salias IOF4 BSC252
+salias IOG5 BSC253
+salias IOB1 BSC254
+salias IOC2 BSC255
+salias IOC3 BSC256
+salias IOD4 BSC257
--- /dev/null
+#
+# $Id$
+#
+# JTAG package script for EP1C12F324
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Arnim Laeuger <arniml@users.sourceforge.net>
+#
+
+salias IOC4 BSC0
+salias IOB3 BSC1
+salias IOG8 BSC2
+salias IOF8 BSC3
+salias IOB4 BSC4
+salias IOA4 BSC5
+salias IOD5 BSC6
+salias IOC5 BSC7
+salias IOB5 BSC8
+salias IOA6 BSC9
+salias IOC6 BSC10
+salias IOB6 BSC11
+salias IOD6 BSC12
+salias IOE6 BSC13
+salias IOC7 BSC14
+salias IOD7 BSC15
+salias IOB7 BSC16
+salias IOA7 BSC17
+salias IOE7 BSC18
+salias IOE8 BSC19
+salias IOB8 BSC20
+salias IOA8 BSC21
+salias IOC8 BSC22
+salias IOD8 BSC23
+salias IOB9 BSC24
+salias IOA9 BSC25
+salias IOC9 BSC26
+salias IOD9 BSC27
+salias IOF9 BSC28
+salias IOG9 BSC29
+salias IOE10 BSC30
+salias IOA10 BSC31
+salias IOB10 BSC32
+salias IOD10 BSC33
+salias IOC10 BSC34
+salias IOE11 BSC35
+salias IOA11 BSC36
+salias IOB11 BSC37
+salias IOD11 BSC38
+salias IOC11 BSC39
+salias IOA12 BSC40
+salias IOB12 BSC41
+salias IOC12 BSC42
+salias IOD12 BSC43
+salias IOC13 BSC44
+salias IOD13 BSC45
+salias IOA13 BSC46
+salias IOB13 BSC47
+salias IOF10 BSC48
+salias IOG10 BSC49
+salias IOE13 BSC50
+salias IOC14 BSC51
+salias IOB14 BSC52
+salias IOD14 BSC53
+salias IOC15 BSC54
+salias IOA15 BSC55
+salias IOB15 BSC56
+salias IOF11 BSC57
+salias IOG11 BSC58
+salias IOB16 BSC59
+salias IOC16 BSC60
+salias IOD17 BSC61
+salias IOC17 BSC62
+salias IOD15 BSC63
+salias IOD16 BSC64
+salias IOE14 BSC65
+salias IOD18 BSC66
+salias IOE15 BSC67
+salias IOE16 BSC68
+salias IOE17 BSC69
+salias IOF15 BSC70
+salias IOF16 BSC71
+salias IOF14 BSC72
+salias IOF13 BSC73
+salias IOF17 BSC74
+salias IOF18 BSC75
+salias IOF12 BSC76
+salias IOG12 BSC77
+salias IOG16 BSC78
+salias IOG15 BSC79
+salias IOG14 BSC80
+salias IOG13 BSC81
+salias IOG17 BSC82
+salias IOG18 BSC83
+salias IOH18 BSC84
+salias IOH17 BSC85
+salias IOH16 BSC86
+salias IOH15 BSC87
+salias IOH14 BSC88
+salias IOH13 BSC89
+salias IOJ13 BSC90
+salias IOJ14 BSC91
+salias IOK15 BSC96
+salias IOK16 BSC97
+salias IOL14 BSC98
+salias IOL15 BSC99
+salias IOL16 BSC100
+salias IOL13 BSC101
+salias IOM13 BSC102
+salias IOL17 BSC103
+salias IOL18 BSC104
+salias IOM16 BSC105
+salias IOM15 BSC106
+salias IOM14 BSC107
+salias IOM17 BSC108
+salias IOM18 BSC109
+salias ION15 BSC110
+salias ION16 BSC111
+salias ION12 BSC112
+salias ION13 BSC113
+salias ION17 BSC114
+salias ION18 BSC115
+salias ION14 BSC116
+salias IOP14 BSC117
+salias IOP15 BSC118
+salias IOP17 BSC119
+salias IOP16 BSC120
+salias IOR16 BSC121
+salias IOR15 BSC122
+salias IOR18 BSC123
+salias IOR17 BSC124
+salias IOT17 BSC125
+salias IOT16 BSC126
+salias IOT15 BSC127
+salias IOU16 BSC128
+salias IOM11 BSC129
+salias ION11 BSC130
+salias IOU15 BSC131
+salias IOV15 BSC132
+salias IOR14 BSC133
+salias IOT14 BSC134
+salias IOU14 BSC135
+salias IOP13 BSC136
+salias IOP12 BSC137
+salias IOM10 BSC138
+salias ION10 BSC139
+salias IOR13 BSC140
+salias IOT13 BSC141
+salias IOU13 BSC142
+salias IOV13 BSC143
+salias IOR12 BSC144
+salias IOT12 BSC145
+salias IOU12 BSC146
+salias IOV12 BSC147
+salias IOV11 BSC148
+salias IOU11 BSC149
+salias IOT11 BSC150
+salias IOR11 BSC151
+salias IOP10 BSC152
+salias IOR10 BSC153
+salias IOT10 BSC154
+salias IOV10 BSC155
+salias IOU10 BSC156
+salias IOP9 BSC157
+salias ION9 BSC158
+salias IOM9 BSC159
+salias IOT9 BSC160
+salias IOR9 BSC161
+salias IOV9 BSC162
+salias IOU9 BSC163
+salias IOR8 BSC164
+salias IOT8 BSC165
+salias IOV8 BSC166
+salias IOU8 BSC167
+salias IOR7 BSC168
+salias IOT7 BSC169
+salias IOV7 BSC170
+salias IOU7 BSC171
+salias IOR6 BSC172
+salias IOT6 BSC173
+salias IOP7 BSC174
+salias IOP6 BSC175
+salias IOU6 BSC176
+salias IOV6 BSC177
+salias IOR5 BSC178
+salias IOR4 BSC179
+salias IOU5 BSC180
+salias IOT5 BSC181
+salias IOU4 BSC182
+salias IOT4 BSC183
+salias ION8 BSC184
+salias IOM8 BSC185
+salias IOV4 BSC186
+salias IOU3 BSC187
+salias IOT3 BSC188
+salias IOT2 BSC189
+salias IOR3 BSC190
+salias IOR2 BSC191
+salias IOP4 BSC192
+salias IOR1 BSC193
+salias IOP3 BSC194
+salias IOP2 BSC195
+salias IOP5 BSC196
+salias ION4 BSC197
+salias ION3 BSC198
+salias ION6 BSC199
+salias ION5 BSC200
+salias ION7 BSC201
+salias IOM6 BSC202
+salias ION2 BSC203
+salias ION1 BSC204
+salias IOM4 BSC205
+salias IOM5 BSC206
+salias IOM2 BSC207
+salias IOM3 BSC208
+salias IOM1 BSC209
+salias IOL4 BSC210
+salias IOL5 BSC211
+salias IOL3 BSC212
+salias IOL2 BSC213
+salias IOL6 BSC214
+salias IOL7 BSC215
+salias IOK5 BSC216
+salias IOK4 BSC217
+salias IOK6 BSC218
+salias IOJ1 BSC228
+salias IOH6 BSC229
+salias IOH5 BSC230
+salias IOH4 BSC231
+salias IOH3 BSC232
+salias IOH2 BSC233
+salias IOH1 BSC234
+salias IOG6 BSC235
+salias IOG5 BSC236
+salias IOG4 BSC237
+salias IOG3 BSC238
+salias IOF7 BSC239
+salias IOF6 BSC240
+salias IOG2 BSC241
+salias IOG1 BSC242
+salias IOF5 BSC243
+salias IOF4 BSC244
+salias IOF3 BSC245
+salias IOF2 BSC246
+salias IOE5 BSC247
+salias IOE4 BSC248
+salias IOF1 BSC249
+salias IOE2 BSC250
+salias IOE3 BSC251
+salias IOD1 BSC252
+salias IOD4 BSC253
+salias IOD2 BSC254
+salias IOD3 BSC255
+salias IOC2 BSC256
+salias IOC3 BSC257
--- /dev/null
+#
+# $Id$
+#
+# JTAG package script for EP1C12Q240
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Arnim Laeuger <arniml@users.sourceforge.net>
+#
+
+salias IO240 BSC0
+salias IO239 BSC1
+salias IO238 BSC2
+salias IO237 BSC3
+salias IO236 BSC4
+salias IO235 BSC5
+salias IO234 BSC6
+salias IO233 BSC7
+salias IO228 BSC8
+salias IO227 BSC9
+salias IO226 BSC10
+salias IO225 BSC11
+salias IO224 BSC12
+salias IO223 BSC13
+salias IO222 BSC14
+salias IO219 BSC16
+salias IO218 BSC17
+salias IO217 BSC18
+salias IO216 BSC19
+salias IO215 BSC20
+salias IO214 BSC21
+salias IO213 BSC22
+salias IO208 BSC30
+salias IO207 BSC33
+salias IO206 BSC34
+salias IO203 BSC36
+salias IO202 BSC37
+salias IO201 BSC38
+salias IO200 BSC39
+salias IO197 BSC48
+salias IO196 BSC49
+salias IO195 BSC50
+salias IO194 BSC51
+salias IO193 BSC52
+salias IO188 BSC53
+salias IO187 BSC54
+salias IO186 BSC55
+salias IO185 BSC56
+salias IO184 BSC57
+salias IO183 BSC58
+salias IO182 BSC59
+salias IO181 BSC60
+salias IO180 BSC61
+salias IO179 BSC62
+salias IO178 BSC63
+salias IO177 BSC64
+salias IO176 BSC65
+salias IO175 BSC66
+salias IO174 BSC67
+salias IO173 BSC68
+salias IO170 BSC69
+salias IO169 BSC70
+salias IO168 BSC71
+salias IO167 BSC72
+salias IO166 BSC73
+salias IO165 BSC74
+salias IO164 BSC75
+salias IO163 BSC76
+salias IO162 BSC77
+salias IO161 BSC78
+salias IO160 BSC79
+salias IO159 BSC80
+salias IO158 BSC81
+salias IO156 BSC91
+salias IO144 BSC96
+salias IO143 BSC97
+salias IO141 BSC108
+salias IO140 BSC109
+salias IO139 BSC110
+salias IO138 BSC111
+salias IO137 BSC112
+salias IO136 BSC113
+salias IO135 BSC114
+salias IO134 BSC115
+salias IO133 BSC116
+salias IO132 BSC117
+salias IO131 BSC118
+salias IO128 BSC119
+salias IO127 BSC120
+salias IO126 BSC121
+salias IO125 BSC122
+salias IO124 BSC123
+salias IO123 BSC124
+salias IO122 BSC125
+salias IO121 BSC126
+salias IO120 BSC127
+salias IO119 BSC128
+salias IO118 BSC129
+salias IO117 BSC130
+salias IO116 BSC131
+salias IO115 BSC132
+salias IO114 BSC133
+salias IO113 BSC134
+salias IO108 BSC135
+salias IO107 BSC136
+salias IO106 BSC137
+salias IO105 BSC138
+salias IO104 BSC139
+salias IO101 BSC148
+salias IO100 BSC149
+salias IO99 BSC150
+salias IO98 BSC151
+salias IO95 BSC153
+salias IO94 BSC154
+salias IO93 BSC157
+salias IO88 BSC165
+salias IO87 BSC166
+salias IO86 BSC167
+salias IO85 BSC168
+salias IO84 BSC169
+salias IO83 BSC170
+salias IO82 BSC171
+salias IO79 BSC173
+salias IO78 BSC174
+salias IO77 BSC175
+salias IO76 BSC176
+salias IO75 BSC177
+salias IO74 BSC178
+salias IO73 BSC179
+salias IO68 BSC180
+salias IO67 BSC181
+salias IO66 BSC182
+salias IO65 BSC183
+salias IO64 BSC184
+salias IO63 BSC185
+salias IO62 BSC186
+salias IO61 BSC187
+salias IO60 BSC188
+salias IO59 BSC189
+salias IO58 BSC190
+salias IO57 BSC191
+salias IO56 BSC192
+salias IO55 BSC193
+salias IO54 BSC194
+salias IO53 BSC195
+salias IO50 BSC196
+salias IO49 BSC197
+salias IO48 BSC198
+salias IO47 BSC199
+salias IO46 BSC200
+salias IO45 BSC201
+salias IO44 BSC202
+salias IO43 BSC203
+salias IO42 BSC204
+salias IO41 BSC205
+salias IO39 BSC216
+salias IO38 BSC217
+salias IO37 BSC218
+salias IO24 BSC228
+salias IO23 BSC229
+salias IO21 BSC239
+salias IO20 BSC240
+salias IO19 BSC241
+salias IO18 BSC242
+salias IO17 BSC243
+salias IO16 BSC244
+salias IO15 BSC245
+salias IO14 BSC246
+salias IO13 BSC247
+salias IO12 BSC248
+salias IO11 BSC249
+salias IO8 BSC250
+salias IO7 BSC251
+salias IO6 BSC252
+salias IO5 BSC253
+salias IO4 BSC254
+salias IO3 BSC255
+salias IO2 BSC256
+salias IO1 BSC257
--- /dev/null
+#
+# $Id$
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Rojhalat Ibrahim <ibrahim@schenk.isar.de>
+#
+
+# bits 31-28 of the Device Identification Register
+0000 ep1c20f400 0
--- /dev/null
+#
+# $Id$
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Rojhalat Ibrahim <ibrahim@schenk.isar.de>
+#
+
+signal TDI
+signal TDO
+signal TMS
+signal TCK
+signal DATA0
+signal DCLK
+signal CONF_DONE
+signal CLK0
+signal CLK1
+signal CLK2
+signal CLK3
+signal IOC3
+signal IOC2
+signal IOD3
+signal IOD2
+signal IOD4
+signal IOD1
+signal IOE4
+signal IOE5
+signal IOF3
+signal IOE3
+signal IOE2
+signal IOF4
+signal IOF5
+signal IOF2
+signal IOF1
+signal IOF6
+signal IOG5
+signal IOG1
+signal IOG2
+signal IOG6
+signal IOG7
+signal IOG3
+signal IOG4
+signal IOH7
+signal IOH1
+signal IOH2
+signal IOH3
+signal IOH4
+signal IOJ1
+signal IOJ2
+signal IOH5
+signal IOH6
+signal IOJ3
+signal IOJ4
+signal IOJ5
+signal IOJ6
+signal IOJ7
+signal IOJ8
+signal IOK2
+signal IOL4
+signal IOL8
+signal IOM8
+signal IOM2
+signal IOM1
+signal IOM5
+signal IOM6
+signal IOM4
+signal IOM3
+signal IOM7
+signal ION6
+signal ION1
+signal ION2
+signal ION4
+signal ION3
+signal ION5
+signal ION7
+signal IOP7
+signal IOP2
+signal IOP1
+signal IOP6
+signal IOP5
+signal IOP3
+signal IOP4
+signal IOR1
+signal IOR2
+signal IOR6
+signal IOR5
+signal IOR3
+signal IOR4
+signal IOT4
+signal IOT2
+signal IOT3
+signal IOU1
+signal IOU4
+signal IOU2
+signal IOU3
+signal IOV2
+signal IOV3
+signal IOW3
+signal IOY4
+signal IOV4
+signal IOW4
+signal IOT5
+signal IOU5
+signal IOV5
+signal IOW5
+signal IOT6
+signal IOT7
+signal IOW6
+signal IOY6
+signal IOU6
+signal IOV6
+signal IOW7
+signal IOY7
+signal IOR7
+signal IOT8
+signal IOV7
+signal IOU7
+signal IOV8
+signal IOU8
+signal IOW8
+signal IOY8
+signal IOU9
+signal IOV9
+signal IOT9
+signal IOR9
+signal IOY9
+signal IOW9
+signal IOT10
+signal IOU10
+signal IOV10
+signal IOW10
+signal IOY10
+signal IOV11
+signal IOU11
+signal IOW11
+signal IOY11
+signal IOR11
+signal IOY12
+signal IOW12
+signal IOT11
+signal IOT12
+signal IOU12
+signal IOV12
+signal IOT13
+signal IOR13
+signal IOY13
+signal IOW13
+signal IOU13
+signal IOV13
+signal IOR14
+signal IOT14
+signal IOW14
+signal IOY14
+signal IOU14
+signal IOV14
+signal IOV15
+signal IOU15
+signal IOY15
+signal IOW15
+signal IOT15
+signal IOT16
+signal IOW16
+signal IOV16
+signal IOV17
+signal IOU16
+signal IOY17
+signal IOW17
+signal IOW18
+signal IOV18
+signal IOV19
+signal IOU20
+signal IOU18
+signal IOU19
+signal IOU17
+signal IOT18
+signal IOT19
+signal IOT17
+signal IOR16
+signal IOR19
+signal IOR20
+signal IOR17
+signal IOR18
+signal IOR15
+signal IOP14
+signal IOP18
+signal IOP17
+signal IOP16
+signal IOP15
+signal IOP19
+signal IOP20
+signal ION14
+signal ION18
+signal ION17
+signal ION19
+signal ION20
+signal ION16
+signal ION15
+signal IOM18
+signal IOM17
+signal IOM15
+signal IOM16
+signal IOM20
+signal IOM19
+signal IOM14
+signal IOM13
+signal IOL13
+signal IOK19
+signal IOJ13
+signal IOK16
+signal IOK15
+signal IOJ18
+signal IOJ17
+signal IOJ14
+signal IOH14
+signal IOJ20
+signal IOJ19
+signal IOJ15
+signal IOJ16
+signal IOH20
+signal IOH19
+signal IOH17
+signal IOH18
+signal IOH16
+signal IOG17
+signal IOG18
+signal IOH15
+signal IOG14
+signal IOG19
+signal IOG20
+signal IOG15
+signal IOG16
+signal IOF20
+signal IOF19
+signal IOF15
+signal IOF16
+signal IOE19
+signal IOE18
+signal IOF18
+signal IOF17
+signal IOE17
+signal IOD20
+signal IOD17
+signal IOD19
+signal IOD18
+signal IOC19
+signal IOC18
+signal IOC17
+signal IOB18
+signal IOB17
+signal IOA17
+signal IOC16
+signal IOB16
+signal IOD16
+signal IOE16
+signal IOC15
+signal IOD15
+signal IOB15
+signal IOA15
+signal IOE15
+signal IOF14
+signal IOA14
+signal IOB14
+signal IOE14
+signal IOE13
+signal IOC14
+signal IOD14
+signal IOA13
+signal IOB13
+signal IOC13
+signal IOD13
+signal IOE12
+signal IOF12
+signal IOA12
+signal IOB12
+signal IOD12
+signal IOC12
+signal IOE11
+signal IOA11
+signal IOB11
+signal IOD11
+signal IOC11
+signal IOD10
+signal IOC10
+signal IOF10
+signal IOA10
+signal IOB10
+signal IOE10
+signal IOE9
+signal IOC9
+signal IOD9
+signal IOA9
+signal IOB9
+signal IOC8
+signal IOD8
+signal IOA8
+signal IOB8
+signal IOE8
+signal IOF8
+signal IOC7
+signal IOD7
+signal IOA7
+signal IOB7
+signal IOE7
+signal IOF7
+signal IOA6
+signal IOB6
+signal IOE6
+signal IOC6
+signal IOB5
+signal IOC5
+signal IOD6
+signal IOD5
+signal IOA4
+signal IOB4
+signal IOB3
+signal IOC4
+
+
+register BSR 930
+register BR 1
+register DIR 32
+
+instruction length 10
+
+instruction BYPASS 1111111111 BR
+instruction EXTEST 0000000000 BSR
+instruction SAMPLE/PRELOAD 0000000101 BSR
+instruction IDCODE 0000000110 DIR
+
+bit 929 O 1 IOC3 928 1 Z
+bit 928 C 1 *
+bit 927 I 1 IOC3
+bit 926 O 1 IOC2 925 1 Z
+bit 925 C 1 *
+bit 924 I 1 IOC2
+bit 923 O 1 IOD3 922 1 Z
+bit 922 C 1 *
+bit 921 I 1 IOD3
+bit 920 O 1 IOD2 919 1 Z
+bit 919 C 1 *
+bit 918 I 1 IOD2
+bit 917 O 1 IOD4 916 1 Z
+bit 916 C 1 *
+bit 915 I 1 IOD4
+bit 914 O 1 IOD1 913 1 Z
+bit 913 C 1 *
+bit 912 I 1 IOD1
+bit 911 O 1 IOE4 910 1 Z
+bit 910 C 1 *
+bit 909 I 1 IOE4
+bit 908 O 1 IOE5 907 1 Z
+bit 907 C 1 *
+bit 906 I 1 IOE5
+bit 905 O 1 IOF3 904 1 Z
+bit 904 C 1 *
+bit 903 I 1 IOF3
+bit 902 O 1 IOE3 901 1 Z
+bit 901 C 1 *
+bit 900 I 1 IOE3
+bit 899 O 1 IOE2 898 1 Z
+bit 898 C 1 *
+bit 897 I 1 IOE2
+bit 896 O 1 IOF4 895 1 Z
+bit 895 C 1 *
+bit 894 I 1 IOF4
+bit 893 O 1 IOF5 892 1 Z
+bit 892 C 1 *
+bit 891 I 1 IOF5
+bit 890 O 1 IOF2 889 1 Z
+bit 889 C 1 *
+bit 888 I 1 IOF2
+bit 887 O 1 IOF1 886 1 Z
+bit 886 C 1 *
+bit 885 I 1 IOF1
+bit 884 O 1 IOF6 883 1 Z
+bit 883 C 1 *
+bit 882 I 1 IOF6
+bit 881 O 1 IOG5 880 1 Z
+bit 880 C 1 *
+bit 879 I 1 IOG5
+bit 878 O 1 IOG1 877 1 Z
+bit 877 C 1 *
+bit 876 I 1 IOG1
+bit 875 O 1 IOG2 874 1 Z
+bit 874 C 1 *
+bit 873 I 1 IOG2
+bit 872 O 1 IOG6 871 1 Z
+bit 871 C 1 *
+bit 870 I 1 IOG6
+bit 869 O 1 IOG7 868 1 Z
+bit 868 C 1 *
+bit 867 I 1 IOG7
+bit 866 O 1 IOG3 865 1 Z
+bit 865 C 1 *
+bit 864 I 1 IOG3
+bit 863 O 1 IOG4 862 1 Z
+bit 862 C 1 *
+bit 861 I 1 IOG4
+bit 860 O 1 IOH7 859 1 Z
+bit 859 C 1 *
+bit 858 I 1 IOH7
+bit 857 O 1 IOH1 856 1 Z
+bit 856 C 1 *
+bit 855 I 1 IOH1
+bit 854 O 1 IOH2 853 1 Z
+bit 853 C 1 *
+bit 852 I 1 IOH2
+bit 851 O 1 IOH3 850 1 Z
+bit 850 C 1 *
+bit 849 I 1 IOH3
+bit 848 O 1 IOH4 847 1 Z
+bit 847 C 1 *
+bit 846 I 1 IOH4
+bit 845 O 1 IOJ1 844 1 Z
+bit 844 C 1 *
+bit 843 I 1 IOJ1
+bit 842 O 1 IOJ2 841 1 Z
+bit 841 C 1 *
+bit 840 I 1 IOJ2
+bit 839 O 1 IOH5 838 1 Z
+bit 838 C 1 *
+bit 837 I 1 IOH5
+bit 836 O 1 IOH6 835 1 Z
+bit 835 C 1 *
+bit 834 I 1 IOH6
+bit 833 O 1 IOJ3 832 1 Z
+bit 832 C 1 *
+bit 831 I 1 IOJ3
+bit 830 O 1 IOJ4 829 1 Z
+bit 829 C 1 *
+bit 828 I 1 IOJ4
+bit 827 O 1 IOJ5 826 1 Z
+bit 826 C 1 *
+bit 825 I 1 IOJ5
+bit 824 O 1 IOJ6 823 1 Z
+bit 823 C 1 *
+bit 822 I 1 IOJ6
+bit 821 O 1 IOJ7 820 1 Z
+bit 820 C 1 *
+bit 819 I 1 IOJ7
+bit 818 O 1 IOJ8 817 1 Z
+bit 817 C 1 *
+bit 816 I 1 IOJ8
+bit 815 O 1 IOK2 814 1 Z
+bit 814 C 1 *
+bit 813 I 1 IOK2
+bit 812 O 1 *
+bit 811 O 1 *
+bit 810 I 1 DATA0
+bit 809 O 1 *
+bit 808 O 1 *
+bit 807 O 1 *
+bit 806 O 1 *
+bit 805 O 1 *
+bit 804 I 1 CLK0
+bit 803 O 1 *
+bit 802 O 1 *
+bit 801 I 1 CLK1
+bit 800 O 1 *
+bit 799 O 1 *
+bit 798 O 1 *
+bit 797 O 1 *
+bit 796 O 1 *
+bit 795 O 1 *
+bit 794 O 1 *
+bit 793 O 1 *
+bit 792 I 1 MSEL0
+bit 791 O 1 *
+bit 790 O 1 *
+bit 789 I 1 MSEL1
+bit 788 O 1 DCLK 787 1 Z
+bit 787 C 1 *
+bit 786 I 1 DCLK
+bit 785 O 1 IOL4 784 1 Z
+bit 784 C 1 *
+bit 783 I 1 IOL4
+bit 782 O 1 IOL8 781 1 Z
+bit 781 C 1 *
+bit 780 I 1 IOL8
+bit 779 O 1 IOM8 778 1 Z
+bit 778 C 1 *
+bit 777 I 1 IOM8
+bit 776 O 1 IOM2 775 1 Z
+bit 775 C 1 *
+bit 774 I 1 IOM2
+bit 773 O 1 IOM1 772 1 Z
+bit 772 C 1 *
+bit 771 I 1 IOM1
+bit 770 O 1 IOM5 769 1 Z
+bit 769 C 1 *
+bit 768 I 1 IOM5
+bit 767 O 1 IOM6 766 1 Z
+bit 766 C 1 *
+bit 765 I 1 IOM6
+bit 764 O 1 IOM4 763 1 Z
+bit 763 C 1 *
+bit 762 I 1 IOM4
+bit 761 O 1 IOM3 760 1 Z
+bit 760 C 1 *
+bit 759 I 1 IOM3
+bit 758 O 1 IOM7 757 1 Z
+bit 757 C 1 *
+bit 756 I 1 IOM7
+bit 755 O 1 ION6 754 1 Z
+bit 754 C 1 *
+bit 753 I 1 ION6
+bit 752 O 1 ION1 751 1 Z
+bit 751 C 1 *
+bit 750 I 1 ION1
+bit 749 O 1 ION2 748 1 Z
+bit 748 C 1 *
+bit 747 I 1 ION2
+bit 746 O 1 ION4 745 1 Z
+bit 745 C 1 *
+bit 744 I 1 ION4
+bit 743 O 1 ION3 742 1 Z
+bit 742 C 1 *
+bit 741 I 1 ION3
+bit 740 O 1 ION5 739 1 Z
+bit 739 C 1 *
+bit 738 I 1 ION5
+bit 737 O 1 ION7 736 1 Z
+bit 736 C 1 *
+bit 735 I 1 ION7
+bit 734 O 1 IOP7 733 1 Z
+bit 733 C 1 *
+bit 732 I 1 IOP7
+bit 731 O 1 IOP2 730 1 Z
+bit 730 C 1 *
+bit 729 I 1 IOP2
+bit 728 O 1 IOP1 727 1 Z
+bit 727 C 1 *
+bit 726 I 1 IOP1
+bit 725 O 1 IOP6 724 1 Z
+bit 724 C 1 *
+bit 723 I 1 IOP6
+bit 722 O 1 IOP5 721 1 Z
+bit 721 C 1 *
+bit 720 I 1 IOP5
+bit 719 O 1 IOP3 718 1 Z
+bit 718 C 1 *
+bit 717 I 1 IOP3
+bit 716 O 1 IOP4 715 1 Z
+bit 715 C 1 *
+bit 714 I 1 IOP4
+bit 713 O 1 IOR1 712 1 Z
+bit 712 C 1 *
+bit 711 I 1 IOR1
+bit 710 O 1 IOR2 709 1 Z
+bit 709 C 1 *
+bit 708 I 1 IOR2
+bit 707 O 1 IOR6 706 1 Z
+bit 706 C 1 *
+bit 705 I 1 IOR6
+bit 704 O 1 IOR5 703 1 Z
+bit 703 C 1 *
+bit 702 I 1 IOR5
+bit 701 O 1 IOR3 700 1 Z
+bit 700 C 1 *
+bit 699 I 1 IOR3
+bit 698 O 1 IOR4 697 1 Z
+bit 697 C 1 *
+bit 696 I 1 IOR4
+bit 695 O 1 IOT4 694 1 Z
+bit 694 C 1 *
+bit 693 I 1 IOT4
+bit 692 O 1 IOT2 691 1 Z
+bit 691 C 1 *
+bit 690 I 1 IOT2
+bit 689 O 1 IOT3 688 1 Z
+bit 688 C 1 *
+bit 687 I 1 IOT3
+bit 686 O 1 IOU1 685 1 Z
+bit 685 C 1 *
+bit 684 I 1 IOU1
+bit 683 O 1 IOU4 682 1 Z
+bit 682 C 1 *
+bit 681 I 1 IOU4
+bit 680 O 1 IOU2 679 1 Z
+bit 679 C 1 *
+bit 678 I 1 IOU2
+bit 677 O 1 IOU3 676 1 Z
+bit 676 C 1 *
+bit 675 I 1 IOU3
+bit 674 O 1 IOV2 673 1 Z
+bit 673 C 1 *
+bit 672 I 1 IOV2
+bit 671 O 1 IOV3 670 1 Z
+bit 670 C 1 *
+bit 669 I 1 IOV3
+bit 668 O 1 IOW3 667 1 Z
+bit 667 C 1 *
+bit 666 I 1 IOW3
+bit 665 O 1 IOY4 664 1 Z
+bit 664 C 1 *
+bit 663 I 1 IOY4
+bit 662 O 1 IOV4 661 1 Z
+bit 661 C 1 *
+bit 660 I 1 IOV4
+bit 659 O 1 IOW4 658 1 Z
+bit 658 C 1 *
+bit 657 I 1 IOW4
+bit 656 O 1 IOT5 655 1 Z
+bit 655 C 1 *
+bit 654 I 1 IOT5
+bit 653 O 1 IOU5 652 1 Z
+bit 652 C 1 *
+bit 651 I 1 IOU5
+bit 650 O 1 IOV5 649 1 Z
+bit 649 C 1 *
+bit 648 I 1 IOV5
+bit 647 O 1 IOW5 646 1 Z
+bit 646 C 1 *
+bit 645 I 1 IOW5
+bit 644 O 1 IOT6 643 1 Z
+bit 643 C 1 *
+bit 642 I 1 IOT6
+bit 641 O 1 IOT7 640 1 Z
+bit 640 C 1 *
+bit 639 I 1 IOT7
+bit 638 O 1 IOW6 637 1 Z
+bit 637 C 1 *
+bit 636 I 1 IOW6
+bit 635 O 1 IOY6 634 1 Z
+bit 634 C 1 *
+bit 633 I 1 IOY6
+bit 632 O 1 IOU6 631 1 Z
+bit 631 C 1 *
+bit 630 I 1 IOU6
+bit 629 O 1 IOV6 628 1 Z
+bit 628 C 1 *
+bit 627 I 1 IOV6
+bit 626 O 1 IOW7 625 1 Z
+bit 625 C 1 *
+bit 624 I 1 IOW7
+bit 623 O 1 IOY7 622 1 Z
+bit 622 C 1 *
+bit 621 I 1 IOY7
+bit 620 O 1 IOR7 619 1 Z
+bit 619 C 1 *
+bit 618 I 1 IOR7
+bit 617 O 1 IOT8 616 1 Z
+bit 616 C 1 *
+bit 615 I 1 IOT8
+bit 614 O 1 IOV7 613 1 Z
+bit 613 C 1 *
+bit 612 I 1 IOV7
+bit 611 O 1 IOU7 610 1 Z
+bit 610 C 1 *
+bit 609 I 1 IOU7
+bit 608 O 1 IOV8 607 1 Z
+bit 607 C 1 *
+bit 606 I 1 IOV8
+bit 605 O 1 IOU8 604 1 Z
+bit 604 C 1 *
+bit 603 I 1 IOU8
+bit 602 O 1 IOW8 601 1 Z
+bit 601 C 1 *
+bit 600 I 1 IOW8
+bit 599 O 1 IOY8 598 1 Z
+bit 598 C 1 *
+bit 597 I 1 IOY8
+bit 596 O 1 IOU9 595 1 Z
+bit 595 C 1 *
+bit 594 I 1 IOU9
+bit 593 O 1 IOV9 592 1 Z
+bit 592 C 1 *
+bit 591 I 1 IOV9
+bit 590 O 1 IOT9 589 1 Z
+bit 589 C 1 *
+bit 588 I 1 IOT9
+bit 587 O 1 IOR9 586 1 Z
+bit 586 C 1 *
+bit 585 I 1 IOR9
+bit 584 O 1 IOY9 583 1 Z
+bit 583 C 1 *
+bit 582 I 1 IOY9
+bit 581 O 1 IOW9 580 1 Z
+bit 580 C 1 *
+bit 579 I 1 IOW9
+bit 578 O 1 IOT10 577 1 Z
+bit 577 C 1 *
+bit 576 I 1 IOT10
+bit 575 O 1 IOU10 574 1 Z
+bit 574 C 1 *
+bit 573 I 1 IOU10
+bit 572 O 1 IOV10 571 1 Z
+bit 571 C 1 *
+bit 570 I 1 IOV10
+bit 569 O 1 IOW10 568 1 Z
+bit 568 C 1 *
+bit 567 I 1 IOW10
+bit 566 O 1 IOY10 565 1 Z
+bit 565 C 1 *
+bit 564 I 1 IOY10
+bit 563 O 1 IOV11 562 1 Z
+bit 562 C 1 *
+bit 561 I 1 IOV11
+bit 560 O 1 IOU11 559 1 Z
+bit 559 C 1 *
+bit 558 I 1 IOU11
+bit 557 O 1 IOW11 556 1 Z
+bit 556 C 1 *
+bit 555 I 1 IOW11
+bit 554 O 1 IOY11 553 1 Z
+bit 553 C 1 *
+bit 552 I 1 IOY11
+bit 551 O 1 IOR11 550 1 Z
+bit 550 C 1 *
+bit 549 I 1 IOR11
+bit 548 O 1 IOY12 547 1 Z
+bit 547 C 1 *
+bit 546 I 1 IOY12
+bit 545 O 1 IOW12 544 1 Z
+bit 544 C 1 *
+bit 543 I 1 IOW12
+bit 542 O 1 IOT11 541 1 Z
+bit 541 C 1 *
+bit 540 I 1 IOT11
+bit 539 O 1 IOT12 538 1 Z
+bit 538 C 1 *
+bit 537 I 1 IOT12
+bit 536 O 1 IOU12 535 1 Z
+bit 535 C 1 *
+bit 534 I 1 IOU12
+bit 533 O 1 IOV12 532 1 Z
+bit 532 C 1 *
+bit 531 I 1 IOV12
+bit 530 O 1 IOT13 529 1 Z
+bit 529 C 1 *
+bit 528 I 1 IOT13
+bit 527 O 1 IOR13 526 1 Z
+bit 526 C 1 *
+bit 525 I 1 IOR13
+bit 524 O 1 IOY13 523 1 Z
+bit 523 C 1 *
+bit 522 I 1 IOY13
+bit 521 O 1 IOW13 520 1 Z
+bit 520 C 1 *
+bit 519 I 1 IOW13
+bit 518 O 1 IOU13 517 1 Z
+bit 517 C 1 *
+bit 516 I 1 IOU13
+bit 515 O 1 IOV13 514 1 Z
+bit 514 C 1 *
+bit 513 I 1 IOV13
+bit 512 O 1 IOR14 511 1 Z
+bit 511 C 1 *
+bit 510 I 1 IOR14
+bit 509 O 1 IOT14 508 1 Z
+bit 508 C 1 *
+bit 507 I 1 IOT14
+bit 506 O 1 IOW14 505 1 Z
+bit 505 C 1 *
+bit 504 I 1 IOW14
+bit 503 O 1 IOY14 502 1 Z
+bit 502 C 1 *
+bit 501 I 1 IOY14
+bit 500 O 1 IOU14 499 1 Z
+bit 499 C 1 *
+bit 498 I 1 IOU14
+bit 497 O 1 IOV14 496 1 Z
+bit 496 C 1 *
+bit 495 I 1 IOV14
+bit 494 O 1 IOV15 493 1 Z
+bit 493 C 1 *
+bit 492 I 1 IOV15
+bit 491 O 1 IOU15 490 1 Z
+bit 490 C 1 *
+bit 489 I 1 IOU15
+bit 488 O 1 IOY15 487 1 Z
+bit 487 C 1 *
+bit 486 I 1 IOY15
+bit 485 O 1 IOW15 484 1 Z
+bit 484 C 1 *
+bit 483 I 1 IOW15
+bit 482 O 1 IOT15 481 1 Z
+bit 481 C 1 *
+bit 480 I 1 IOT15
+bit 479 O 1 IOT16 478 1 Z
+bit 478 C 1 *
+bit 477 I 1 IOT16
+bit 476 O 1 IOW16 475 1 Z
+bit 475 C 1 *
+bit 474 I 1 IOW16
+bit 473 O 1 IOV16 472 1 Z
+bit 472 C 1 *
+bit 471 I 1 IOV16
+bit 470 O 1 IOV17 469 1 Z
+bit 469 C 1 *
+bit 468 I 1 IOV17
+bit 467 O 1 IOU16 466 1 Z
+bit 466 C 1 *
+bit 465 I 1 IOU16
+bit 464 O 1 IOY17 463 1 Z
+bit 463 C 1 *
+bit 462 I 1 IOY17
+bit 461 O 1 IOW17 460 1 Z
+bit 460 C 1 *
+bit 459 I 1 IOW17
+bit 458 O 1 IOW18 457 1 Z
+bit 457 C 1 *
+bit 456 I 1 IOW18
+bit 455 O 1 IOV18 454 1 Z
+bit 454 C 1 *
+bit 453 I 1 IOV18
+bit 452 O 1 IOV19 451 1 Z
+bit 451 C 1 *
+bit 450 I 1 IOV19
+bit 449 O 1 IOU20 448 1 Z
+bit 448 C 1 *
+bit 447 I 1 IOU20
+bit 446 O 1 IOU18 445 1 Z
+bit 445 C 1 *
+bit 444 I 1 IOU18
+bit 443 O 1 IOU19 442 1 Z
+bit 442 C 1 *
+bit 441 I 1 IOU19
+bit 440 O 1 IOU17 439 1 Z
+bit 439 C 1 *
+bit 438 I 1 IOU17
+bit 437 O 1 IOT18 436 1 Z
+bit 436 C 1 *
+bit 435 I 1 IOT18
+bit 434 O 1 IOT19 433 1 Z
+bit 433 C 1 *
+bit 432 I 1 IOT19
+bit 431 O 1 IOT17 430 1 Z
+bit 430 C 1 *
+bit 429 I 1 IOT17
+bit 428 O 1 IOR16 427 1 Z
+bit 427 C 1 *
+bit 426 I 1 IOR16
+bit 425 O 1 IOR19 424 1 Z
+bit 424 C 1 *
+bit 423 I 1 IOR19
+bit 422 O 1 IOR20 421 1 Z
+bit 421 C 1 *
+bit 420 I 1 IOR20
+bit 419 O 1 IOR17 418 1 Z
+bit 418 C 1 *
+bit 417 I 1 IOR17
+bit 416 O 1 IOR18 415 1 Z
+bit 415 C 1 *
+bit 414 I 1 IOR18
+bit 413 O 1 IOR15 412 1 Z
+bit 412 C 1 *
+bit 411 I 1 IOR15
+bit 410 O 1 IOP14 409 1 Z
+bit 409 C 1 *
+bit 408 I 1 IOP14
+bit 407 O 1 IOP18 406 1 Z
+bit 406 C 1 *
+bit 405 I 1 IOP18
+bit 404 O 1 IOP17 403 1 Z
+bit 403 C 1 *
+bit 402 I 1 IOP17
+bit 401 O 1 IOP16 400 1 Z
+bit 400 C 1 *
+bit 399 I 1 IOP16
+bit 398 O 1 IOP15 397 1 Z
+bit 397 C 1 *
+bit 396 I 1 IOP15
+bit 395 O 1 IOP19 394 1 Z
+bit 394 C 1 *
+bit 393 I 1 IOP19
+bit 392 O 1 IOP20 391 1 Z
+bit 391 C 1 *
+bit 390 I 1 IOP20
+bit 389 O 1 ION14 388 1 Z
+bit 388 C 1 *
+bit 387 I 1 ION14
+bit 386 O 1 ION18 385 1 Z
+bit 385 C 1 *
+bit 384 I 1 ION18
+bit 383 O 1 ION17 382 1 Z
+bit 382 C 1 *
+bit 381 I 1 ION17
+bit 380 O 1 ION19 379 1 Z
+bit 379 C 1 *
+bit 378 I 1 ION19
+bit 377 O 1 ION20 376 1 Z
+bit 376 C 1 *
+bit 375 I 1 ION20
+bit 374 O 1 ION16 373 1 Z
+bit 373 C 1 *
+bit 372 I 1 ION16
+bit 371 O 1 ION15 370 1 Z
+bit 370 C 1 *
+bit 369 I 1 ION15
+bit 368 O 1 IOM18 367 1 Z
+bit 367 C 1 *
+bit 366 I 1 IOM18
+bit 365 O 1 IOM17 364 1 Z
+bit 364 C 1 *
+bit 363 I 1 IOM17
+bit 362 O 1 IOM15 361 1 Z
+bit 361 C 1 *
+bit 360 I 1 IOM15
+bit 359 O 1 IOM16 358 1 Z
+bit 358 C 1 *
+bit 357 I 1 IOM16
+bit 356 O 1 IOM20 355 1 Z
+bit 355 C 1 *
+bit 354 I 1 IOM20
+bit 353 O 1 IOM19 352 1 Z
+bit 352 C 1 *
+bit 351 I 1 IOM19
+bit 350 O 1 IOM14 349 1 Z
+bit 349 C 1 *
+bit 348 I 1 IOM14
+bit 347 O 1 IOM13 346 1 Z
+bit 346 C 1 *
+bit 345 I 1 IOM13
+bit 344 O 1 IOL13 343 1 Z
+bit 343 C 1 *
+bit 342 I 1 IOL13
+bit 341 O 1 *
+bit 340 O 1 *
+bit 339 O 1 *
+bit 338 O 1 *
+bit 337 O 1 *
+bit 336 O 1 *
+bit 335 O 1 *
+bit 334 O 1 *
+bit 333 I 1 CLK3
+bit 332 O 1 *
+bit 331 O 1 *
+bit 330 I 1 CLK2
+bit 329 O 1 IOK19 328 1 Z
+bit 328 C 1 *
+bit 327 I 1 IOK19
+bit 326 O 1 IOJ13 325 1 Z
+bit 325 C 1 *
+bit 324 I 1 IOJ13
+bit 323 O 1 IOK16 322 1 Z
+bit 322 C 1 *
+bit 321 I 1 IOK16
+bit 320 O 1 IOK15 319 1 Z
+bit 319 C 1 *
+bit 318 I 1 IOK15
+bit 317 O 1 IOJ18 316 1 Z
+bit 316 C 1 *
+bit 315 I 1 IOJ18
+bit 314 O 1 IOJ17 313 1 Z
+bit 313 C 1 *
+bit 312 I 1 IOJ17
+bit 311 O 1 IOJ14 310 1 Z
+bit 310 C 1 *
+bit 309 I 1 IOJ14
+bit 308 O 1 IOH14 307 1 Z
+bit 307 C 1 *
+bit 306 I 1 IOH14
+bit 305 O 1 IOJ20 304 1 Z
+bit 304 C 1 *
+bit 303 I 1 IOJ20
+bit 302 O 1 IOJ19 301 1 Z
+bit 301 C 1 *
+bit 300 I 1 IOJ19
+bit 299 O 1 IOJ15 298 1 Z
+bit 298 C 1 *
+bit 297 I 1 IOJ15
+bit 296 O 1 IOJ16 295 1 Z
+bit 295 C 1 *
+bit 294 I 1 IOJ16
+bit 293 O 1 IOH20 292 1 Z
+bit 292 C 1 *
+bit 291 I 1 IOH20
+bit 290 O 1 IOH19 289 1 Z
+bit 289 C 1 *
+bit 288 I 1 IOH19
+bit 287 O 1 IOH17 286 1 Z
+bit 286 C 1 *
+bit 285 I 1 IOH17
+bit 284 O 1 IOH18 283 1 Z
+bit 283 C 1 *
+bit 282 I 1 IOH18
+bit 281 O 1 IOH16 280 1 Z
+bit 280 C 1 *
+bit 279 I 1 IOH16
+bit 278 O 1 IOG17 277 1 Z
+bit 277 C 1 *
+bit 276 I 1 IOG17
+bit 275 O 1 IOG18 274 1 Z
+bit 274 C 1 *
+bit 273 I 1 IOG18
+bit 272 O 1 IOH15 271 1 Z
+bit 271 C 1 *
+bit 270 I 1 IOH15
+bit 269 O 1 IOG14 268 1 Z
+bit 268 C 1 *
+bit 267 I 1 IOG14
+bit 266 O 1 IOG19 265 1 Z
+bit 265 C 1 *
+bit 264 I 1 IOG19
+bit 263 O 1 IOG20 262 1 Z
+bit 262 C 1 *
+bit 261 I 1 IOG20
+bit 260 O 1 IOG15 259 1 Z
+bit 259 C 1 *
+bit 258 I 1 IOG15
+bit 257 O 1 IOG16 256 1 Z
+bit 256 C 1 *
+bit 255 I 1 IOG16
+bit 254 O 1 IOF20 253 1 Z
+bit 253 C 1 *
+bit 252 I 1 IOF20
+bit 251 O 1 IOF19 250 1 Z
+bit 250 C 1 *
+bit 249 I 1 IOF19
+bit 248 O 1 IOF15 247 1 Z
+bit 247 C 1 *
+bit 246 I 1 IOF15
+bit 245 O 1 IOF16 244 1 Z
+bit 244 C 1 *
+bit 243 I 1 IOF16
+bit 242 O 1 IOE19 241 1 Z
+bit 241 C 1 *
+bit 240 I 1 IOE19
+bit 239 O 1 IOE18 238 1 Z
+bit 238 C 1 *
+bit 237 I 1 IOE18
+bit 236 O 1 IOF18 235 1 Z
+bit 235 C 1 *
+bit 234 I 1 IOF18
+bit 233 O 1 IOF17 232 1 Z
+bit 232 C 1 *
+bit 231 I 1 IOF17
+bit 230 O 1 IOE17 229 1 Z
+bit 229 C 1 *
+bit 228 I 1 IOE17
+bit 227 O 1 IOD20 226 1 Z
+bit 226 C 1 *
+bit 225 I 1 IOD20
+bit 224 O 1 IOD17 223 1 Z
+bit 223 C 1 *
+bit 222 I 1 IOD17
+bit 221 O 1 IOD19 220 1 Z
+bit 220 C 1 *
+bit 219 I 1 IOD19
+bit 218 O 1 IOD18 217 1 Z
+bit 217 C 1 *
+bit 216 I 1 IOD18
+bit 215 O 1 IOC19 214 1 Z
+bit 214 C 1 *
+bit 213 I 1 IOC19
+bit 212 O 1 IOC18 211 1 Z
+bit 211 C 1 *
+bit 210 I 1 IOC18
+bit 209 O 1 IOC17 208 1 Z
+bit 208 C 1 *
+bit 207 I 1 IOC17
+bit 206 O 1 IOB18 205 1 Z
+bit 205 C 1 *
+bit 204 I 1 IOB18
+bit 203 O 1 IOB17 202 1 Z
+bit 202 C 1 *
+bit 201 I 1 IOB17
+bit 200 O 1 IOA17 199 1 Z
+bit 199 C 1 *
+bit 198 I 1 IOA17
+bit 197 O 1 IOC16 196 1 Z
+bit 196 C 1 *
+bit 195 I 1 IOC16
+bit 194 O 1 IOB16 193 1 Z
+bit 193 C 1 *
+bit 192 I 1 IOB16
+bit 191 O 1 IOD16 190 1 Z
+bit 190 C 1 *
+bit 189 I 1 IOD16
+bit 188 O 1 IOE16 187 1 Z
+bit 187 C 1 *
+bit 186 I 1 IOE16
+bit 185 O 1 IOC15 184 1 Z
+bit 184 C 1 *
+bit 183 I 1 IOC15
+bit 182 O 1 IOD15 181 1 Z
+bit 181 C 1 *
+bit 180 I 1 IOD15
+bit 179 O 1 IOB15 178 1 Z
+bit 178 C 1 *
+bit 177 I 1 IOB15
+bit 176 O 1 IOA15 175 1 Z
+bit 175 C 1 *
+bit 174 I 1 IOA15
+bit 173 O 1 IOE15 172 1 Z
+bit 172 C 1 *
+bit 171 I 1 IOE15
+bit 170 O 1 IOF14 169 1 Z
+bit 169 C 1 *
+bit 168 I 1 IOF14
+bit 167 O 1 IOA14 166 1 Z
+bit 166 C 1 *
+bit 165 I 1 IOA14
+bit 164 O 1 IOB14 163 1 Z
+bit 163 C 1 *
+bit 162 I 1 IOB14
+bit 161 O 1 IOE14 160 1 Z
+bit 160 C 1 *
+bit 159 I 1 IOE14
+bit 158 O 1 IOE13 157 1 Z
+bit 157 C 1 *
+bit 156 I 1 IOE13
+bit 155 O 1 IOC14 154 1 Z
+bit 154 C 1 *
+bit 153 I 1 IOC14
+bit 152 O 1 IOD14 151 1 Z
+bit 151 C 1 *
+bit 150 I 1 IOD14
+bit 149 O 1 IOA13 148 1 Z
+bit 148 C 1 *
+bit 147 I 1 IOA13
+bit 146 O 1 IOB13 145 1 Z
+bit 145 C 1 *
+bit 144 I 1 IOB13
+bit 143 O 1 IOC13 142 1 Z
+bit 142 C 1 *
+bit 141 I 1 IOC13
+bit 140 O 1 IOD13 139 1 Z
+bit 139 C 1 *
+bit 138 I 1 IOD13
+bit 137 O 1 IOE12 136 1 Z
+bit 136 C 1 *
+bit 135 I 1 IOE12
+bit 134 O 1 IOF12 133 1 Z
+bit 133 C 1 *
+bit 132 I 1 IOF12
+bit 131 O 1 IOA12 130 1 Z
+bit 130 C 1 *
+bit 129 I 1 IOA12
+bit 128 O 1 IOB12 127 1 Z
+bit 127 C 1 *
+bit 126 I 1 IOB12
+bit 125 O 1 IOD12 124 1 Z
+bit 124 C 1 *
+bit 123 I 1 IOD12
+bit 122 O 1 IOC12 121 1 Z
+bit 121 C 1 *
+bit 120 I 1 IOC12
+bit 119 O 1 IOE11 118 1 Z
+bit 118 C 1 *
+bit 117 I 1 IOE11
+bit 116 O 1 IOA11 115 1 Z
+bit 115 C 1 *
+bit 114 I 1 IOA11
+bit 113 O 1 IOB11 112 1 Z
+bit 112 C 1 *
+bit 111 I 1 IOB11
+bit 110 O 1 IOD11 109 1 Z
+bit 109 C 1 *
+bit 108 I 1 IOD11
+bit 107 O 1 IOC11 106 1 Z
+bit 106 C 1 *
+bit 105 I 1 IOC11
+bit 104 O 1 IOD10 103 1 Z
+bit 103 C 1 *
+bit 102 I 1 IOD10
+bit 101 O 1 IOC10 100 1 Z
+bit 100 C 1 *
+bit 99 I 1 IOC10
+bit 98 O 1 IOF10 97 1 Z
+bit 97 C 1 *
+bit 96 I 1 IOF10
+bit 95 O 1 IOA10 94 1 Z
+bit 94 C 1 *
+bit 93 I 1 IOA10
+bit 92 O 1 IOB10 91 1 Z
+bit 91 C 1 *
+bit 90 I 1 IOB10
+bit 89 O 1 IOE10 88 1 Z
+bit 88 C 1 *
+bit 87 I 1 IOE10
+bit 86 O 1 IOE9 85 1 Z
+bit 85 C 1 *
+bit 84 I 1 IOE9
+bit 83 O 1 IOC9 82 1 Z
+bit 82 C 1 *
+bit 81 I 1 IOC9
+bit 80 O 1 IOD9 79 1 Z
+bit 79 C 1 *
+bit 78 I 1 IOD9
+bit 77 O 1 IOA9 76 1 Z
+bit 76 C 1 *
+bit 75 I 1 IOA9
+bit 74 O 1 IOB9 73 1 Z
+bit 73 C 1 *
+bit 72 I 1 IOB9
+bit 71 O 1 IOC8 70 1 Z
+bit 70 C 1 *
+bit 69 I 1 IOC8
+bit 68 O 1 IOD8 67 1 Z
+bit 67 C 1 *
+bit 66 I 1 IOD8
+bit 65 O 1 IOA8 64 1 Z
+bit 64 C 1 *
+bit 63 I 1 IOA8
+bit 62 O 1 IOB8 61 1 Z
+bit 61 C 1 *
+bit 60 I 1 IOB8
+bit 59 O 1 IOE8 58 1 Z
+bit 58 C 1 *
+bit 57 I 1 IOE8
+bit 56 O 1 IOF8 55 1 Z
+bit 55 C 1 *
+bit 54 I 1 IOF8
+bit 53 O 1 IOC7 52 1 Z
+bit 52 C 1 *
+bit 51 I 1 IOC7
+bit 50 O 1 IOD7 49 1 Z
+bit 49 C 1 *
+bit 48 I 1 IOD7
+bit 47 O 1 IOA7 46 1 Z
+bit 46 C 1 *
+bit 45 I 1 IOA7
+bit 44 O 1 IOB7 43 1 Z
+bit 43 C 1 *
+bit 42 I 1 IOB7
+bit 41 O 1 IOE7 40 1 Z
+bit 40 C 1 *
+bit 39 I 1 IOE7
+bit 38 O 1 IOF7 37 1 Z
+bit 37 C 1 *
+bit 36 I 1 IOF7
+bit 35 O 1 IOA6 34 1 Z
+bit 34 C 1 *
+bit 33 I 1 IOA6
+bit 32 O 1 IOB6 31 1 Z
+bit 31 C 1 *
+bit 30 I 1 IOB6
+bit 29 O 1 IOE6 28 1 Z
+bit 28 C 1 *
+bit 27 I 1 IOE6
+bit 26 O 1 IOC6 25 1 Z
+bit 25 C 1 *
+bit 24 I 1 IOC6
+bit 23 O 1 IOB5 22 1 Z
+bit 22 C 1 *
+bit 21 I 1 IOB5
+bit 20 O 1 IOC5 19 1 Z
+bit 19 C 1 *
+bit 18 I 1 IOC5
+bit 17 O 1 IOD6 16 1 Z
+bit 16 C 1 *
+bit 15 I 1 IOD6
+bit 14 O 1 IOD5 13 1 Z
+bit 13 C 1 *
+bit 12 I 1 IOD5
+bit 11 O 1 IOA4 10 1 Z
+bit 10 C 1 *
+bit 9 I 1 IOA4
+bit 8 O 1 IOB4 7 1 Z
+bit 7 C 1 *
+bit 6 I 1 IOB4
+bit 5 O 1 IOB3 4 1 Z
+bit 4 C 1 *
+bit 3 I 1 IOB3
+bit 2 O 1 IOC4 1 1 Z
+bit 1 C 1 *
+bit 0 I 1 IOC4
--- /dev/null
+#
+# $Id$
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Kent Palmkvist <kentp@isy.liu.se>
+#
+
+# bits 31-28 of the Device Identification Register
+0000 ep1c6q240 0
--- /dev/null
+#
+# $Id$
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Kent Palmkvist <kentp@isy.liu.se>
+#
+
+# JTAG declarations for EP1C6Q240 idcode 00000010000010000010000011011101
+# generated on Thu Jun 30 23:25:36 2005 by /home/tde/kentp/bsdl2jtag_kp.pl 0.1 from /home/tde/kentp/ep1c6q240_kp.bsd
+signal IO13
+signal IO93
+signal IO113
+signal IO203
+signal IO174
+signal IO41
+signal IO38
+signal IO127
+signal IO73
+signal IO64
+signal TMS
+signal IO83
+signal IO7
+signal IO85
+signal IO107
+signal IO118
+signal IO2
+signal IO234
+signal IO239
+signal IO135
+signal IO218
+signal IO98
+signal IO167
+signal IO137
+signal IO236
+signal IO14
+signal MSEL0
+signal IO221
+signal IO58
+signal IO184
+signal IO49
+signal IO18
+signal IO97
+signal TCK
+signal IO143
+signal IO186
+signal CLK2
+signal IO81
+signal IO63
+signal IO177
+signal IO123
+signal IO100
+signal IO144
+signal IO162
+signal IO185
+signal IO20
+signal IO198
+signal IO74
+signal IO104
+signal IO21
+signal DCLK
+signal IO217
+signal IO68
+signal IO164
+signal IO139
+signal IO45
+signal IO228
+signal IO238
+signal IO114
+signal IO188
+signal IO205
+signal IO116
+signal IO102
+signal GND
+signal IO222
+signal IO176
+signal IO56
+signal IO179
+signal IO165
+signal IO240
+signal IO1
+signal IO76
+signal IO182
+signal IO53
+signal IO200
+signal DATA0
+signal IO161
+signal IO24
+signal IO78
+signal IO94
+signal IO43
+signal IO4
+signal IO195
+signal IO16
+signal CLK0
+signal IO214
+signal IO121
+signal VCC
+signal IO47
+signal IO61
+signal IO160
+signal IO11
+signal IO82
+signal IO187
+signal IO65
+signal IO180
+signal IO213
+signal IO15
+signal IO88
+signal IO220
+signal IO156
+signal IO226
+signal IO158
+signal TDO
+signal IO126
+signal IO215
+signal IO134
+signal IO206
+signal IO23
+signal IO122
+signal IO169
+signal IO99
+signal IO54
+signal IO119
+signal IO80
+signal IO95
+signal IO128
+signal IO17
+signal IO106
+signal IO59
+signal IO202
+signal IO67
+signal IO124
+signal IO168
+signal IO132
+signal IO108
+signal IO235
+signal IO12
+signal NCONFIG
+signal NCE
+signal IO224
+signal IO233
+signal IO199
+signal IO183
+signal NCEO
+signal IO48
+signal IO19
+signal IO131
+signal IO136
+signal IO39
+signal IO96
+signal MSEL1
+signal IO6
+signal IO178
+signal IO101
+signal IO87
+signal IO175
+signal IO138
+signal TDI
+signal IO196
+signal IO193
+signal IO159
+signal IO237
+signal IO125
+signal IO105
+signal IO86
+signal IO117
+signal IO163
+signal CLK3
+signal IO140
+signal IO194
+signal IO5
+signal IO75
+signal IO50
+signal IO84
+signal IO181
+signal IO225
+signal IO170
+signal NSTATUS
+signal IO141
+signal IO207
+signal IO103
+signal IO120
+signal IO8
+signal IO166
+signal IO208
+signal CONF_DONE
+signal IO216
+signal IO79
+signal IO66
+signal IO57
+signal IO62
+signal IO77
+signal IO133
+signal IO223
+signal IO3
+signal IO55
+signal IO173
+signal IO219
+signal IO227
+signal IO60
+signal IO46
+signal IO44
+signal IO197
+signal IO204
+signal CLK1
+signal IO42
+signal IO115
+signal IO37
+signal IO201
+register BYPASS 1
+register BSR 582
+register IOCSR 3366
+register DEVICE_ID 32
+instruction length 10
+instruction BYPASS 1111111111 BYPASS
+instruction IDCODE 0000000110 DEVICE_ID
+# instruction USERCODE 0000000111 <unspecified>
+instruction SAMPLE/PRELOAD 0000000101 BSR
+instruction EXTEST 0000000000 BSR
+# instruction CLAMP 0000001010 <unspecified>
+# instruction HIGHZ 0000001011 <unspecified>
+instruction CONFIG_IO 0000001101 IOCSR
+bit 0 I ? IO240
+bit 1 C 1 *
+bit 2 O ? IO240 1 1 Z
+bit 3 I ? IO239
+bit 4 C 1 *
+bit 5 O ? IO239 4 1 Z
+bit 6 I ? IO238
+bit 7 C 1 *
+bit 8 O ? IO238 7 1 Z
+bit 9 I ? IO237
+bit 10 C 1 *
+bit 11 O ? IO237 10 1 Z
+bit 12 I ? IO236
+bit 13 C 1 *
+bit 14 O ? IO236 13 1 Z
+bit 15 I ? IO235
+bit 16 C 1 *
+bit 17 O ? IO235 16 1 Z
+bit 18 I ? IO234
+bit 19 C 1 *
+bit 20 O ? IO234 19 1 Z
+bit 21 I ? IO233
+bit 22 C 1 *
+bit 23 O ? IO233 22 1 Z
+bit 24 I ? IO228
+bit 25 C 1 *
+bit 26 O ? IO228 25 1 Z
+bit 27 I ? IO227
+bit 28 C 1 *
+bit 29 O ? IO227 28 1 Z
+bit 30 I ? IO226
+bit 31 C 1 *
+bit 32 O ? IO226 31 1 Z
+bit 33 I ? IO225
+bit 34 C 1 *
+bit 35 O ? IO225 34 1 Z
+bit 36 I ? IO224
+bit 37 C 1 *
+bit 38 O ? IO224 37 1 Z
+bit 39 I ? IO223
+bit 40 C 1 *
+bit 41 O ? IO223 40 1 Z
+bit 42 I ? IO222
+bit 43 C 1 *
+bit 44 O ? IO222 43 1 Z
+bit 45 I ? IO221
+bit 46 C 1 *
+bit 47 O ? IO221 46 1 Z
+bit 48 I ? IO220
+bit 49 C 1 *
+bit 50 O ? IO220 49 1 Z
+bit 51 I ? IO219
+bit 52 C 1 *
+bit 53 O ? IO219 52 1 Z
+bit 54 I ? IO218
+bit 55 C 1 *
+bit 56 O ? IO218 55 1 Z
+bit 57 I ? IO217
+bit 58 C 1 *
+bit 59 O ? IO217 58 1 Z
+bit 60 I ? IO216
+bit 61 C 1 *
+bit 62 O ? IO216 61 1 Z
+bit 63 I ? IO215
+bit 64 C 1 *
+bit 65 O ? IO215 64 1 Z
+bit 66 I ? IO214
+bit 67 C 1 *
+bit 68 O ? IO214 67 1 Z
+bit 69 I ? IO213
+bit 70 C 1 *
+bit 71 O ? IO213 70 1 Z
+bit 72 I ? IO208
+bit 73 C 1 *
+bit 74 O ? IO208 73 1 Z
+bit 75 I ? IO207
+bit 76 C 1 *
+bit 77 O ? IO207 76 1 Z
+bit 78 I ? IO206
+bit 79 C 1 *
+bit 80 O ? IO206 79 1 Z
+bit 81 I ? IO205
+bit 82 C 1 *
+bit 83 O ? IO205 82 1 Z
+bit 84 I ? IO204
+bit 85 C 1 *
+bit 86 O ? IO204 85 1 Z
+bit 87 I ? IO203
+bit 88 C 1 *
+bit 89 O ? IO203 88 1 Z
+bit 90 I ? IO202
+bit 91 C 1 *
+bit 92 O ? IO202 91 1 Z
+bit 93 I ? IO201
+bit 94 C 1 *
+bit 95 O ? IO201 94 1 Z
+bit 96 I ? IO200
+bit 97 C 1 *
+bit 98 O ? IO200 97 1 Z
+bit 99 I ? IO199
+bit 100 C 1 *
+bit 101 O ? IO199 100 1 Z
+bit 102 I ? IO198
+bit 103 C 1 *
+bit 104 O ? IO198 103 1 Z
+bit 105 I ? IO197
+bit 106 C 1 *
+bit 107 O ? IO197 106 1 Z
+bit 108 I ? IO196
+bit 109 C 1 *
+bit 110 O ? IO196 109 1 Z
+bit 111 I ? IO195
+bit 112 C 1 *
+bit 113 O ? IO195 112 1 Z
+bit 114 I ? IO194
+bit 115 C 1 *
+bit 116 O ? IO194 115 1 Z
+bit 117 I ? IO193
+bit 118 C 1 *
+bit 119 O ? IO193 118 1 Z
+bit 120 I ? IO188
+bit 121 C 1 *
+bit 122 O ? IO188 121 1 Z
+bit 123 I ? IO187
+bit 124 C 1 *
+bit 125 O ? IO187 124 1 Z
+bit 126 I ? IO186
+bit 127 C 1 *
+bit 128 O ? IO186 127 1 Z
+bit 129 I ? IO185
+bit 130 C 1 *
+bit 131 O ? IO185 130 1 Z
+bit 132 I ? IO184
+bit 133 C 1 *
+bit 134 O ? IO184 133 1 Z
+bit 135 I ? IO183
+bit 136 C 1 *
+bit 137 O ? IO183 136 1 Z
+bit 138 I ? IO182
+bit 139 C 1 *
+bit 140 O ? IO182 139 1 Z
+bit 141 I ? IO181
+bit 142 C 1 *
+bit 143 O ? IO181 142 1 Z
+bit 144 I ? IO180
+bit 145 C 1 *
+bit 146 O ? IO180 145 1 Z
+bit 147 I ? IO179
+bit 148 C 1 *
+bit 149 O ? IO179 148 1 Z
+bit 150 I ? IO178
+bit 151 C 1 *
+bit 152 O ? IO178 151 1 Z
+bit 153 I ? IO177
+bit 154 C 1 *
+bit 155 O ? IO177 154 1 Z
+bit 156 I ? IO176
+bit 157 C 1 *
+bit 158 O ? IO176 157 1 Z
+bit 159 I ? IO175
+bit 160 C 1 *
+bit 161 O ? IO175 160 1 Z
+bit 162 I ? IO174
+bit 163 C 1 *
+bit 164 O ? IO174 163 1 Z
+bit 165 I ? IO173
+bit 166 C 1 *
+bit 167 O ? IO173 166 1 Z
+bit 168 I ? IO170
+bit 169 C 1 *
+bit 170 O ? IO170 169 1 Z
+bit 171 I ? IO169
+bit 172 C 1 *
+bit 173 O ? IO169 172 1 Z
+bit 174 I ? IO168
+bit 175 C 1 *
+bit 176 O ? IO168 175 1 Z
+bit 177 I ? IO167
+bit 178 C 1 *
+bit 179 O ? IO167 178 1 Z
+bit 180 I ? IO166
+bit 181 C 1 *
+bit 182 O ? IO166 181 1 Z
+bit 183 I ? IO165
+bit 184 C 1 *
+bit 185 O ? IO165 184 1 Z
+bit 186 I ? IO164
+bit 187 C 1 *
+bit 188 O ? IO164 187 1 Z
+bit 189 I ? IO163
+bit 190 C 1 *
+bit 191 O ? IO163 190 1 Z
+bit 192 I ? IO162
+bit 193 C 1 *
+bit 194 O ? IO162 193 1 Z
+bit 195 I ? IO161
+bit 196 C 1 *
+bit 197 O ? IO161 196 1 Z
+bit 198 I ? IO160
+bit 199 C 1 *
+bit 200 O ? IO160 199 1 Z
+bit 201 I ? IO159
+bit 202 C 1 *
+bit 203 O ? IO159 202 1 Z
+bit 204 I ? IO158
+bit 205 C 1 *
+bit 206 O ? IO158 205 1 Z
+bit 207 I ? IO156
+bit 208 C 1 *
+bit 209 O ? IO156 208 1 Z
+bit 210 I ? CLK2
+bit 211 X ? *
+bit 212 X ? *
+bit 213 X ? *
+bit 214 X 1 *
+bit 215 X ? *
+bit 216 X ? *
+bit 217 X 1 *
+bit 218 X ? *
+bit 219 X ? *
+bit 220 X 1 *
+bit 221 X ? *
+bit 222 I ? IO144
+bit 223 C 1 *
+bit 224 O ? IO144 223 1 Z
+bit 225 I ? IO143
+bit 226 C 1 *
+bit 227 O ? IO143 226 1 Z
+bit 228 I ? IO141
+bit 229 C 1 *
+bit 230 O ? IO141 229 1 Z
+bit 231 I ? IO140
+bit 232 C 1 *
+bit 233 O ? IO140 232 1 Z
+bit 234 I ? IO139
+bit 235 C 1 *
+bit 236 O ? IO139 235 1 Z
+bit 237 I ? IO138
+bit 238 C 1 *
+bit 239 O ? IO138 238 1 Z
+bit 240 I ? IO137
+bit 241 C 1 *
+bit 242 O ? IO137 241 1 Z
+bit 243 I ? IO136
+bit 244 C 1 *
+bit 245 O ? IO136 244 1 Z
+bit 246 I ? IO135
+bit 247 C 1 *
+bit 248 O ? IO135 247 1 Z
+bit 249 I ? IO134
+bit 250 C 1 *
+bit 251 O ? IO134 250 1 Z
+bit 252 I ? IO133
+bit 253 C 1 *
+bit 254 O ? IO133 253 1 Z
+bit 255 I ? IO132
+bit 256 C 1 *
+bit 257 O ? IO132 256 1 Z
+bit 258 I ? IO131
+bit 259 C 1 *
+bit 260 O ? IO131 259 1 Z
+bit 261 I ? IO128
+bit 262 C 1 *
+bit 263 O ? IO128 262 1 Z
+bit 264 I ? IO127
+bit 265 C 1 *
+bit 266 O ? IO127 265 1 Z
+bit 267 I ? IO126
+bit 268 C 1 *
+bit 269 O ? IO126 268 1 Z
+bit 270 I ? IO125
+bit 271 C 1 *
+bit 272 O ? IO125 271 1 Z
+bit 273 I ? IO124
+bit 274 C 1 *
+bit 275 O ? IO124 274 1 Z
+bit 276 I ? IO123
+bit 277 C 1 *
+bit 278 O ? IO123 277 1 Z
+bit 279 I ? IO122
+bit 280 C 1 *
+bit 281 O ? IO122 280 1 Z
+bit 282 I ? IO121
+bit 283 C 1 *
+bit 284 O ? IO121 283 1 Z
+bit 285 I ? IO120
+bit 286 C 1 *
+bit 287 O ? IO120 286 1 Z
+bit 288 I ? IO119
+bit 289 C 1 *
+bit 290 O ? IO119 289 1 Z
+bit 291 I ? IO118
+bit 292 C 1 *
+bit 293 O ? IO118 292 1 Z
+bit 294 I ? IO117
+bit 295 C 1 *
+bit 296 O ? IO117 295 1 Z
+bit 297 I ? IO116
+bit 298 C 1 *
+bit 299 O ? IO116 298 1 Z
+bit 300 I ? IO115
+bit 301 C 1 *
+bit 302 O ? IO115 301 1 Z
+bit 303 I ? IO114
+bit 304 C 1 *
+bit 305 O ? IO114 304 1 Z
+bit 306 I ? IO113
+bit 307 C 1 *
+bit 308 O ? IO113 307 1 Z
+bit 309 I ? IO108
+bit 310 C 1 *
+bit 311 O ? IO108 310 1 Z
+bit 312 I ? IO107
+bit 313 C 1 *
+bit 314 O ? IO107 313 1 Z
+bit 315 I ? IO106
+bit 316 C 1 *
+bit 317 O ? IO106 316 1 Z
+bit 318 I ? IO105
+bit 319 C 1 *
+bit 320 O ? IO105 319 1 Z
+bit 321 I ? IO104
+bit 322 C 1 *
+bit 323 O ? IO104 322 1 Z
+bit 324 I ? IO103
+bit 325 C 1 *
+bit 326 O ? IO103 325 1 Z
+bit 327 I ? IO102
+bit 328 C 1 *
+bit 329 O ? IO102 328 1 Z
+bit 330 I ? IO101
+bit 331 C 1 *
+bit 332 O ? IO101 331 1 Z
+bit 333 I ? IO100
+bit 334 C 1 *
+bit 335 O ? IO100 334 1 Z
+bit 336 I ? IO99
+bit 337 C 1 *
+bit 338 O ? IO99 337 1 Z
+bit 339 I ? IO98
+bit 340 C 1 *
+bit 341 O ? IO98 340 1 Z
+bit 342 I ? IO97
+bit 343 C 1 *
+bit 344 O ? IO97 343 1 Z
+bit 345 I ? IO96
+bit 346 C 1 *
+bit 347 O ? IO96 346 1 Z
+bit 348 I ? IO95
+bit 349 C 1 *
+bit 350 O ? IO95 349 1 Z
+bit 351 I ? IO94
+bit 352 C 1 *
+bit 353 O ? IO94 352 1 Z
+bit 354 I ? IO93
+bit 355 C 1 *
+bit 356 O ? IO93 355 1 Z
+bit 357 I ? IO88
+bit 358 C 1 *
+bit 359 O ? IO88 358 1 Z
+bit 360 I ? IO87
+bit 361 C 1 *
+bit 362 O ? IO87 361 1 Z
+bit 363 I ? IO86
+bit 364 C 1 *
+bit 365 O ? IO86 364 1 Z
+bit 366 I ? IO85
+bit 367 C 1 *
+bit 368 O ? IO85 367 1 Z
+bit 369 I ? IO84
+bit 370 C 1 *
+bit 371 O ? IO84 370 1 Z
+bit 372 I ? IO83
+bit 373 C 1 *
+bit 374 O ? IO83 373 1 Z
+bit 375 I ? IO82
+bit 376 C 1 *
+bit 377 O ? IO82 376 1 Z
+bit 378 I ? IO81
+bit 379 C 1 *
+bit 380 O ? IO81 379 1 Z
+bit 381 I ? IO80
+bit 382 C 1 *
+bit 383 O ? IO80 382 1 Z
+bit 384 I ? IO79
+bit 385 C 1 *
+bit 386 O ? IO79 385 1 Z
+bit 387 I ? IO78
+bit 388 C 1 *
+bit 389 O ? IO78 388 1 Z
+bit 390 I ? IO77
+bit 391 C 1 *
+bit 392 O ? IO77 391 1 Z
+bit 393 I ? IO76
+bit 394 C 1 *
+bit 395 O ? IO76 394 1 Z
+bit 396 I ? IO75
+bit 397 C 1 *
+bit 398 O ? IO75 397 1 Z
+bit 399 I ? IO74
+bit 400 C 1 *
+bit 401 O ? IO74 400 1 Z
+bit 402 I ? IO73
+bit 403 C 1 *
+bit 404 O ? IO73 403 1 Z
+bit 405 I ? IO68
+bit 406 C 1 *
+bit 407 O ? IO68 406 1 Z
+bit 408 I ? IO67
+bit 409 C 1 *
+bit 410 O ? IO67 409 1 Z
+bit 411 I ? IO66
+bit 412 C 1 *
+bit 413 O ? IO66 412 1 Z
+bit 414 I ? IO65
+bit 415 C 1 *
+bit 416 O ? IO65 415 1 Z
+bit 417 I ? IO64
+bit 418 C 1 *
+bit 419 O ? IO64 418 1 Z
+bit 420 I ? IO63
+bit 421 C 1 *
+bit 422 O ? IO63 421 1 Z
+bit 423 I ? IO62
+bit 424 C 1 *
+bit 425 O ? IO62 424 1 Z
+bit 426 I ? IO61
+bit 427 C 1 *
+bit 428 O ? IO61 427 1 Z
+bit 429 I ? IO60
+bit 430 C 1 *
+bit 431 O ? IO60 430 1 Z
+bit 432 I ? IO59
+bit 433 C 1 *
+bit 434 O ? IO59 433 1 Z
+bit 435 I ? IO58
+bit 436 C 1 *
+bit 437 O ? IO58 436 1 Z
+bit 438 I ? IO57
+bit 439 C 1 *
+bit 440 O ? IO57 439 1 Z
+bit 441 I ? IO56
+bit 442 C 1 *
+bit 443 O ? IO56 442 1 Z
+bit 444 I ? IO55
+bit 445 C 1 *
+bit 446 O ? IO55 445 1 Z
+bit 447 I ? IO54
+bit 448 C 1 *
+bit 449 O ? IO54 448 1 Z
+bit 450 I ? IO53
+bit 451 C 1 *
+bit 452 O ? IO53 451 1 Z
+bit 453 I ? IO50
+bit 454 C 1 *
+bit 455 O ? IO50 454 1 Z
+bit 456 I ? IO49
+bit 457 C 1 *
+bit 458 O ? IO49 457 1 Z
+bit 459 I ? IO48
+bit 460 C 1 *
+bit 461 O ? IO48 460 1 Z
+bit 462 I ? IO47
+bit 463 C 1 *
+bit 464 O ? IO47 463 1 Z
+bit 465 I ? IO46
+bit 466 C 1 *
+bit 467 O ? IO46 466 1 Z
+bit 468 I ? IO45
+bit 469 C 1 *
+bit 470 O ? IO45 469 1 Z
+bit 471 I ? IO44
+bit 472 C 1 *
+bit 473 O ? IO44 472 1 Z
+bit 474 I ? IO43
+bit 475 C 1 *
+bit 476 O ? IO43 475 1 Z
+bit 477 I ? IO42
+bit 478 C 1 *
+bit 479 O ? IO42 478 1 Z
+bit 480 I ? IO41
+bit 481 C 1 *
+bit 482 O ? IO41 481 1 Z
+bit 483 I ? IO39
+bit 484 C 1 *
+bit 485 O ? IO39 484 1 Z
+bit 486 I ? IO38
+bit 487 C 1 *
+bit 488 O ? IO38 487 1 Z
+bit 489 I ? IO37
+bit 490 C 1 *
+bit 491 O ? IO37 490 1 Z
+bit 492 I ? DCLK
+bit 493 C 1 *
+bit 494 O ? DCLK 493 1 Z
+bit 495 I ? MSEL1
+bit 496 X ? *
+bit 497 X ? *
+bit 498 I ? MSEL0
+bit 499 X ? *
+bit 500 X ? *
+bit 501 X ? *
+bit 502 X 1 *
+bit 503 X ? *
+bit 504 X ? *
+bit 505 X 1 *
+bit 506 X ? *
+bit 507 X ? *
+bit 508 X 1 *
+bit 509 X ? *
+bit 510 I ? CLK0
+bit 511 X ? *
+bit 512 X ? *
+bit 513 X ? *
+bit 514 X 1 *
+bit 515 X ? *
+bit 516 I ? DATA0
+bit 517 X ? *
+bit 518 X ? *
+bit 519 I ? IO24
+bit 520 C 1 *
+bit 521 O ? IO24 520 1 Z
+bit 522 I ? IO23
+bit 523 C 1 *
+bit 524 O ? IO23 523 1 Z
+bit 525 I ? IO21
+bit 526 C 1 *
+bit 527 O ? IO21 526 1 Z
+bit 528 I ? IO20
+bit 529 C 1 *
+bit 530 O ? IO20 529 1 Z
+bit 531 I ? IO19
+bit 532 C 1 *
+bit 533 O ? IO19 532 1 Z
+bit 534 I ? IO18
+bit 535 C 1 *
+bit 536 O ? IO18 535 1 Z
+bit 537 I ? IO17
+bit 538 C 1 *
+bit 539 O ? IO17 538 1 Z
+bit 540 I ? IO16
+bit 541 C 1 *
+bit 542 O ? IO16 541 1 Z
+bit 543 I ? IO15
+bit 544 C 1 *
+bit 545 O ? IO15 544 1 Z
+bit 546 I ? IO14
+bit 547 C 1 *
+bit 548 O ? IO14 547 1 Z
+bit 549 I ? IO13
+bit 550 C 1 *
+bit 551 O ? IO13 550 1 Z
+bit 552 I ? IO12
+bit 553 C 1 *
+bit 554 O ? IO12 553 1 Z
+bit 555 I ? IO11
+bit 556 C 1 *
+bit 557 O ? IO11 556 1 Z
+bit 558 I ? IO8
+bit 559 C 1 *
+bit 560 O ? IO8 559 1 Z
+bit 561 I ? IO7
+bit 562 C 1 *
+bit 563 O ? IO7 562 1 Z
+bit 564 I ? IO6
+bit 565 C 1 *
+bit 566 O ? IO6 565 1 Z
+bit 567 I ? IO5
+bit 568 C 1 *
+bit 569 O ? IO5 568 1 Z
+bit 570 I ? IO4
+bit 571 C 1 *
+bit 572 O ? IO4 571 1 Z
+bit 573 I ? IO3
+bit 574 C 1 *
+bit 575 O ? IO3 574 1 Z
+bit 576 I ? IO2
+bit 577 C 1 *
+bit 578 O ? IO2 577 1 Z
+bit 579 I ? IO1
+bit 580 C 1 *
+bit 581 O ? IO1 580 1 Z
--- /dev/null
+#
+# $Id$
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by H Hartley Sweeten <hsweeten@visionengravers.com>
+#
+
+# bits 31-28 of the Device Identification Register
+0000 ep2c8 0
--- /dev/null
+#
+# $Id$
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by H Hartley Sweeten <hsweeten@visionengravers.com>
+#
+# Note:
+# The signals defined in this file are generic for any EP2C8/EP2C8A.
+# Signalnames according to Altera's package tables are set in the
+# package specific scripts.
+#
+# **Testing Differential Pin Pairs**
+# Refer to the note in the original bsd-files for issues related to
+# testing differential pin pairs!
+#
+# Pins T144-1/Q208-1/F256-C3 (BSC198) and T144-2/Q208-2/F256-F4 (BSC197)
+# are dedicated output pins (ASDO and nCSO respectively) when the MSEL
+# pins are connected to set the device in Active Serial programming mode.
+# This configuration file assumes that that mode is not used. Therefore,
+# they are specified as I/O pins.
+#
+# | Version (4 bits) | Part number (16 bits) | Manufacturer Id (11 bits) | LSB (1 bit) |
+# IDCODE: | 0000 | 0010 0000 1011 0010 | 000 0110 1110 | 1 |
+#
+# Documentation:
+# [1] Altera Corporation, "Cyclone II Device Handbook", CII5V1-3.2
+# [2] Altera Corporation, "Pin Information for the Cyclone(r) II EP2C8 & EP2C8A Devices", Version 1.8
+# [3] Altera Corporation, "EP2C8F256.BSD", Revision 1.03, 11/10/2006
+# [4] Altera Corporation, "EP2C8Q208.BSD", Revision 1.03, 11/10/2006
+# [5] Altera Corporation, "EP2C8T144.BSD", Revision 1.03, 11/10/2006
+
+register BYPASS 1
+register BSR 597
+register IOCSR 5640
+register DEVICE_ID 32
+register USERCODE 32
+
+instruction length 10
+instruction BYPASS 1111111111 BYPASS
+instruction IDCODE 0000000110 DEVICE_ID
+instruction USERCODE 0000000111 USERCODE
+instruction CLAMP 0000001010 BYPASS
+instruction SAMPLE/PRELOAD 0000000101 BSR
+instruction EXTEST 0000001111 BSR
+instruction CONFIG_IO 0000001101 IOCSR
+instruction HIGHZ 0000001011 BYPASS
+
+
+ # Bank VREFB Group Pin Name Optional Function(s) Configuration Function T144 Q208 F256
+ # ---- ----------- -------- -------------------- ---------------------- ---- ---- ----
+signal BSC198 # B1 VREFB1N0 IO ASDO ASDO 1 1 C3
+signal BSC197 # B1 VREFB1N0 IO nCSO nCSO 2 2 F4
+signal BSC196 # B1 VREFB1N0 IO LVDS15p CRC_ERROR 3 3 C1
+signal BSC195 # B1 VREFB1N0 IO LVDS15n CLKUSR 4 4 C2
+signal BSC194 # B1 VREFB1N0 IO LVDS14p 5 D5
+signal BSC193 # B1 VREFB1N0 IO LVDS14n 6 E5
+ # B1 VREFB1N0 VCCIO1 5 7
+signal BSC192 # B1 VREFB1N0 IO LVDS13p 8 F5
+ # B1 VREFB1N0 GND 6 9
+signal BSC191 # B1 VREFB1N0 IO LVDS13n 10
+signal BSC190 # B1 VREFB1N0 IO LVDS12p 11 D3
+signal BSC189 # B1 VREFB1N0 IO LVDS12n 12 D4
+ # B1 VREFB1N0 VCCIO1
+signal BSC188 # B1 VREFB1N0 IO VREFB1N0 7 13 F3
+signal BSC187 # B1 VREFB1N0 IO LVDS11p D2
+signal BSC186 # B1 VREFB1N0 IO LVDS11n D1
+signal BSC185 # B1 VREFB1N0 IO LVDS10p E3
+signal BSC184 # B1 VREFB1N0 IO LVDS10n E4
+ # B1 VREFB1N0 GND
+signal BSC183 # B1 VREFB1N0 IO G4
+signal BSC182 # B1 VREFB1N0 IO LVDS9p J6
+signal BSC181 # B1 VREFB1N0 IO LVDS9n H6
+signal BSC180 # B1 VREFB1N0 IO LVDS8p 8 14 E1
+signal BSC179 # B1 VREFB1N0 IO LVDS8n 9 15 E2
+ # B1 VREFB1N0 VCCIO1
+signal TDO # B1 VREFB1N0 TDO TDO 10 16 G2
+signal TMS # B1 VREFB1N0 TMS TMS 11 17 G1
+signal TCK # B1 VREFB1N0 TCK TCK 12 18 F2
+signal TDI # B1 VREFB1N0 TDI TDI 13 19 F5
+signal BSC178 # B1 VREFB1N0 DATA0 DATA0 DATA0 14 20 F1
+signal BSC177 # B1 VREFB1N0 DCLK DCLK DCLK 15 21 H4
+signal BSC176 # B1 VREFB1N0 nCE nCE 16 22 G5
+signal BSC175 # B1 VREFB1N0 CLK0 LVDSCLK0p/input(3) 17 23 H2
+signal BSC174 # B1 VREFB1N0 CLK1 LVDSCLK0n/input(3) 18 24 H1
+ # B1 VREFB1N0 GND 19 25
+signal BSC173 # B1 VREFB1N0 nCONFIG nCONFIG 20 26 J5
+signal BSC172 # B1 VREFB1N1 CLK2 LVDSCLK1p/input(3) 21 27 J2
+signal BSC171 # B1 VREFB1N1 CLK3 LVDSCLK1n/input(3) 22 28 J1
+ # B1 VREFB1N1 VCCIO1 23 29
+signal BSC170 # B1 VREFB1N1 IO LVDS7p 24 30 K2
+signal BSC169 # B1 VREFB1N1 IO LVDS7n 25 31 K1
+signal BSC168 # B1 VREFB1N1 IO LVDS6p K4
+ # B1 VREFB1N1 VCCINT 26 32
+signal BSC167 # B1 VREFB1N1 IO LVDS6n 33 K5
+signal BSC166 # B1 VREFB1N1 IO 34
+signal BSC165 # B1 VREFB1N1 IO LVDS5p 35 L1
+ # B1 VREFB1N1 GND 27 36
+signal BSC164 # B1 VREFB1N1 IO LVDS5n L2
+ # B1 VREFB1N1 GND
+signal BSC163 # B1 VREFB1N1 IO VREFB1N1 28 37 J4
+ # B1 VREFB1N1 VCCIO1
+signal BSC162 # B1 VREFB1N1 IO LVDS4p M1
+signal BSC161 # B1 VREFB1N1 IO LVDS4n M2
+signal BSC160 # B1 VREFB1N1 IO LVDS3p M3
+ # B1 VREFB1N1 GND 38
+signal BSC159 # B1 VREFB1N1 IO LVDS3n 39 L3
+signal BSC158 # B1 VREFB1N1 IO LVDS2p 40 N1
+signal BSC157 # B1 VREFB1N1 IO LVDS2n 41 N2
+signal BSC156 # B1 VREFB1N1 IO LVDS1p P1
+signal BSC155 # B1 VREFB1N1 IO LVDS1n P2
+ # B1 VREFB1N1 VCCIO1 29 42
+signal BSC154 # B1 VREFB1N1 IO 43
+signal BSC153 # B1 VREFB1N1 IO LVDS0p 44 N3
+signal BSC152 # B1 VREFB1N1 IO LVDS0n 45 N4
+signal BSC151 # B1 VREFB1N1 IO 30 46 P3
+signal BSC150 # B1 VREFB1N1 IO PLL1_OUTp 31 47 L4
+signal BSC149 # B1 VREFB1N1 IO PLL1_OUTn 32 48 M4
+ # B1 VREFB1N1 GND 33 49
+ # B1 VREFB1N1 GND_PLL1 34 50 L5
+ # B1 VREFB1N1 VCCD_PLL1 35 51 L6
+ # B1 VREFB1N1 GND_PLL1 36 52 N5
+ # B4 VREFB4N1 VCCA_PLL1 37 53 M5
+ # B4 VREFB4N1 GNDA_PLL1 38 54 M6
+ # B4 VREFB4N1 GND 39 55
+signal BSC148 # B4 VREFB4N1 IO LVDS77n DEV_OE 40 56 R3
+signal BSC147 # B4 VREFB4N1 IO LVDS77p 41 57 T3
+signal BSC146 # B4 VREFB4N1 IO LVDS76p 42 58 P5
+signal BSC145 # B4 VREFB4N1 IO LVDS76n 43 59 P4
+signal BSC144 # B4 VREFB4N1 IO LVDS75p 44 60 T4
+signal BSC143 # B4 VREFB4N1 IO LVDS75n 45 61 R4
+ # B4 VREFB4N1 VCCIO4 46 62
+signal BSC142 # B4 VREFB4N1 IO LVDS74p 47 63 T5
+ # B4 VREFB4N1 GND
+signal BSC141 # B4 VREFB4N1 IO LVDS74n 48 64 R5
+signal BSC140 # B4 VREFB4N1 IO N7
+signal BSC139 # B4 VREFB4N1 IO LVDS73p K7
+signal BSC138 # B4 VREFB4N1 IO LVDS73n K6
+ # B4 VREFB4N1 VCCIO4
+ # B4 VREFB4N1 GND
+signal BSC137 # B4 VREFB4N1 IO LVDS72p T6
+ # B4 VREFB4N1 GND 49 65
+signal BSC136 # B4 VREFB4N1 IO LVDS72n R6
+signal BSC135 # B4 VREFB4N1 IO LVDS71p P6
+signal BSC134 # B4 VREFB4N1 IO LVDS71n N6
+ # B4 VREFB4N1 VCCINT 50 66
+signal BSC133 # B4 VREFB4N1 IO VREFB4N1 51 67 N8
+ # B4 VREFB4N1 VCCIO4
+ # B4 VREFB4N1 GND
+signal BSC132 # B4 VREFB4N1 IO LVDS70p 52 68 T7
+signal BSC131 # B4 VREFB4N1 IO LVDS70n 69 R7
+signal BSC130 # B4 VREFB4N1 IO LVDS69p L7
+signal BSC129 # B4 VREFB4N1 IO LVDS69n L8
+signal BSC128 # B4 VREFB4N1 IO LVDS68p 53 70 T8
+ # B4 VREFB4N1 VCCIO4 54 71
+signal BSC127 # B4 VREFB4N1 IO LVDS68n 55 72 R8
+ # B4 VREFB4N1 GND 56 73
+signal BSC126 # B4 VREFB4N1 IO LVDS67p 57 74 T9
+signal BSC125 # B4 VREFB4N1 IO LVDS67n 58 75 R9
+signal BSC124 # B4 VREFB4N0 IO LVDS66p 59 76 N9
+signal BSC123 # B4 VREFB4N0 IO LVDS66n 60 77 N10
+ # B4 VREFB4N1 GND 61 78
+signal BSC122 # B4 VREFB4N0 IO LVDS65p T11
+ # B4 VREFB4N1 VCCINT 62 79
+signal BSC121 # B4 VREFB4N0 IO LVDS65n R11
+ # B4 VREFB4N1 VCCIO4
+signal BSC120 # B4 VREFB4N0 IO 80 P11
+ # B4 VREFB4N0 GND
+signal BSC119 # B4 VREFB4N0 IO LVDS64p 81 L9
+signal BSC118 # B4 VREFB4N0 IO LVDS64n 82 L10
+ # B4 VREFB4N0 VCCIO4 83
+signal BSC117 # B4 VREFB4N0 IO LVDS63p 84 R10
+ # B4 VREFB4N0 GND 85
+signal BSC116 # B4 VREFB4N0 IO LVDS63n 86 T10
+signal BSC115 # B4 VREFB4N0 IO LVDS62p 87 K11
+signal BSC114 # B4 VREFB4N0 IO LVDS62n 88 K10
+signal BSC113 # B4 VREFB4N0 IO VREFB4N0 63 89 N11
+signal BSC112 # B4 VREFB4N0 IO LVDS61p 90 P12
+ # B4 VREFB4N0 VCCIO4 91
+signal BSC111 # B4 VREFB4N0 IO LVDS61n 92 P13
+ # B4 VREFB4N0 GND 93
+signal BSC110 # B4 VREFB4N0 IO LVDS60p 64 94 T12
+signal BSC109 # B4 VREFB4N0 IO LVDS60n 65 95 R12
+signal BSC108 # B4 VREFB4N0 IO 96
+signal BSC107 # B4 VREFB4N0 IO LVDS59p 97 T13
+ # B4 VREFB4N0 VCCIO4 66 98
+signal BSC106 # B4 VREFB4N0 IO LVDS59n 67 99 R13
+ # B4 VREFB4N0 GND 68 100
+signal BSC105 # B4 VREFB4N0 IO LVDS58p 69 101 T14
+signal BSC104 # B4 VREFB4N0 IO LVDS58n 70 102 R14
+signal BSC103 # B4 VREFB4N0 IO LVDS57p 71 103 M11
+signal BSC102 # B4 VREFB4N0 IO LVDS57n 72 104 L11
+signal BSC101 # B3 VREFB3N1 IO LVDS56n 73 105 N12
+signal BSC100 # B3 VREFB3N1 IO LVDS56p 74 106 M12
+signal BSC099 # B3 VREFB3N1 IO LVDS55n L12
+signal BSC098 # B3 VREFB3N1 IO LVDS55p K13
+signal BSC097 # B3 VREFB3N1 IO LVDS54n INIT_DONE 75 107 N13
+signal BSC096 # B3 VREFB3N1 IO LVDS54p nCEO 76 108 N14
+ # B3 VREFB3N1 VCCIO3 77 109
+signal BSC095 # B3 VREFB3N1 IO LVDS53n 110 P15
+ # B3 VREFB3N1 GND 78 111
+signal BSC094 # B3 VREFB3N1 IO LVDS53p 112 P16
+signal BSC093 # B3 VREFB3N1 IO LVDS52n 113 N15
+signal BSC092 # B3 VREFB3N1 IO LVDS52p 114 N16
+signal BSC091 # B3 VREFB3N1 IO P14
+signal BSC090 # B3 VREFB3N1 IO LVDS51n 115
+signal BSC089 # B3 VREFB3N1 IO LVDS51p 116
+signal BSC088 # B3 VREFB3N1 IO VREFB3N1 79 117 M14
+signal BSC087 # B3 VREFB3N1 IO LVDS50n M15
+ # B3 VREFB3N1 VCCIO3
+signal BSC086 # B3 VREFB3N1 IO LVDS50p M16
+ # B3 VREFB3N1 GND
+signal BSC085 # B3 VREFB3N1 IO 118
+ # B3 VREFB3N1 GND 80 119
+signal BSC084 # B3 VREFB3N1 IO L14
+signal BSC083 # B3 VREFB3N1 IO LVDS49n L15
+signal BSC082 # B3 VREFB3N1 IO LVDS49p L16
+ # B3 VREFB3N1 VCCINT 81 120
+signal BSC081 # B3 VREFB3N1 nSTATUS nSTATUS 82 121 M13
+ # B3 VREFB3N1 VCCIO3 122
+signal BSC080 # B3 VREFB3N1 CONF_DONE CONF_DONE 83 123 L13
+ # B3 VREFB3N1 GND 124
+signal BSC079 # B3 VREFB3N1 MSEL1 MSEL1 84 125 K12
+signal BSC078 # B3 VREFB3N1 MSEL0 MSEL0 85 126 J13
+signal BSC077 # B3 VREFB3N1 IO LVDS48n 86 127 K16
+signal BSC076 # B3 VREFB3N1 IO LVDS48p 87 128 K15
+signal BSC075 # B3 VREFB3N1 CLK7 LVDSCLK3n/input(3) 88 129 J16
+signal BSC074 # B3 VREFB3N1 CLK6 LVDSCLK3p/input(3) 89 130 J15
+signal BSC073 # B3 VREFB3N0 CLK5 LVDSCLK2n/input(3) 90 131 H15
+signal BSC072 # B3 VREFB3N0 CLK4 LVDSCLK2p/input(3) 91 132 H16
+signal BSC071 # B3 VREFB3N0 IO LVDS47n 92 133 H12
+signal BSC070 # B3 VREFB3N0 IO LVDS47p 93 134 J12
+signal BSC069 # B3 VREFB3N0 IO LVDS46n 94 135 G16
+ # B3 VREFB3N0 VCCIO3 95 136
+signal BSC068 # B3 VREFB3N0 IO LVDS46p 96 137 G15
+signal BSC067 # B3 VREFB3N0 IO LVDS46n 97 138 F15
+signal BSC066 # B3 VREFB3N0 IO LVDS45p 139 F16
+ # B3 VREFB3N0 GND 98 140
+signal BSC065 # B3 VREFB3N0 IO LVDS44n 141 J11
+signal BSC064 # B3 VREFB3N0 IO LVDS44p 142 H11
+signal BSC063 # B3 VREFB3N0 IO LVDS43n G12
+signal BSC062 # B3 VREFB3N0 IO LVDS43p G13
+signal BSC061 # B3 VREFB3N0 IO LVDS32n 143 E13
+signal BSC060 # B3 VREFB3N0 IO LVDS42p 144 F13
+signal BSC059 # B3 VREFB3N0 IO VREFB3N0 99 145 H13
+ # B3 VREFB3N0 VCCIO3
+signal BSC058 # B3 VREFB3N0 IO LVDS41n D15
+signal BSC057 # B3 VREFB3N0 IO LVDS41p D16
+signal BSC056 # B3 VREFB3N0 IO LVDS40n E15
+ # B3 VREFB3N0 GND
+signal BSC055 # B3 VREFB3N0 IO LVDS40p E16
+signal BSC054 # B3 VREFB3N0 IO F14
+signal BSC053 # B3 VREFB3N0 IO LVDS39n 100 146 C15
+signal BSC052 # B3 VREFB3N0 IO LVDS39p 101 147 C16
+ # B3 VREFB3N0 VCCIO3 102 148
+signal BSC051 # B3 VREFB3N0 IO LVDS38n 149 C14
+signal BSC050 # B3 VREFB3N0 IO LVDS38p 150 D13
+signal BSC049 # B3 VREFB3N0 IO PLL2_OUTp 103 151 E14
+signal BSC048 # B3 VREFB3N0 IO PLL2_OUTn 104 152 D14
+ # B3 VREFB3N0 GND 105 153
+ # B3 VREFB3N0 GND_PLL2 106 154 F12
+ # B3 VREFB3N0 VCCD_PLL2 107 155 F11
+ # B3 VREFB3N0 GND_PLL2 108 156 D12
+ # B2 VREFB2N0 VCCA_PLL2 109 157 E12
+ # B2 VREFB2N0 GNDA_PLL2 110 158 E11
+ # B2 VREFB2N0 GND 111 159
+signal BSC047 # B2 VREFB2N0 IO LVDS37n 112 160 B14
+signal BSC046 # B2 VREFB2N0 IO LVDS37p 113 161 A14
+signal BSC045 # B2 VREFB2N0 IO LVDS36n 114 162 C13
+signal BSC044 # B2 VREFB2N0 IO LVDS36p 115 163 C12
+signal BSC043 # B2 VREFB2N0 IO LVDS35n 164 B13
+signal BSC042 # B2 VREFB2N0 IO LVDS35p 165 A13
+ # B2 VREFB2N0 VCCIO2 116 166
+ # B2 VREFB2N0 GND 117 167
+signal BSC041 # B2 VREFB2N0 IO LVDS34n 118 168 B12
+signal BSC040 # B2 VREFB2N0 IO LVDS34p 119 169 A12
+signal BSC039 # B2 VREFB2N0 IO VREFB2N0 120 170 C11
+signal BSC038 # B2 VREFB2N0 IO LVDS33n 121 171 B11
+ # B2 VREFB2N0 VCCIO2 172
+signal BSC037 # B2 VREFB2N0 IO LVDS33p 122 173 A11
+ # B2 VREFB2N0 GND 174
+signal BSC036 # B2 VREFB2N0 IO LVDS32n G10
+signal BSC035 # B2 VREFB2N0 IO LVDS32p G11
+signal BSC034 # B2 VREFB2N0 IO LVDS31n 175 B10
+ # B2 VREFB2N0 VCCIO2
+signal BSC033 # B2 VREFB2N0 IO LVDS21p 176 A10
+ # B2 VREFB2N0 GND
+signal BSC032 # B2 VREFB2N0 IO LVDS30n F10
+signal BSC031 # B2 VREFB2N0 IO LVDS30p F9
+signal BSC030 # B2 VREFB2N0 IO D9
+ # B2 VREFB2N0 GND 123 177
+ # B2 VREFB2N0 VCCINT 124 178
+signal BSC029 # B2 VREFB2N0 IO LVDS29n 125 179 D11
+ # B2 VREFB2N0 VCCIO2
+signal BSC028 # B2 VREFB2N0 IO LVDS29p 126 180 D10
+ # B2 VREFB2N0 GND
+signal BSC027 # B2 VREFB2N0 IO LVDS28n 181 A9
+signal BSC026 # B2 VREFB2N0 IO LVDS28p 182 B9
+signal BSC025 # B2 VREFB2N1 IO LVDS27n A8
+signal BSC024 # B2 VREFB2N1 IO LVDS27p B8
+ # B2 VREFB2N1 VCCIO2 127 183
+signal BSC023 # B2 VREFB2N1 IO LVDS26n A7
+ # B2 VREFB2N1 GND 128 184
+signal BSC022 # B2 VREFB2N1 IO LVDS26p 129 185 B7
+ # B2 VREFB2N1 GND 130 186
+signal BSC021 # B2 VREFB2N1 IO LVDS25n 187 F7
+signal BSC020 # B2 VREFB2N1 IO LVDS25p 188 F8
+signal BSC019 # B2 VREFB2N1 IO LVDS24n 189
+ # B2 VREFB2N1 VCCINT 131 190
+signal BSC018 # B2 VREFB2N1 IO LVDS24p 191
+signal BSC017 # B2 VREFB2N1 IO VREFB2N1 132 192 D8
+signal BSC016 # B2 VREFB2N1 IO LVDS23n 133 193 B6
+ # B2 VREFB2N1 VCCIO2 194
+signal BSC015 # B2 VREFB2N1 IO LVDS23p 134 195 A6
+ # B2 VREFB2N1 GND 196
+signal BSC014 # B2 VREFB2N1 IO LVDS22n G6
+signal BSC013 # B2 VREFB2N1 IO LVDS22p G7
+signal BSC012 # B2 VREFB2N1 IO D7
+signal BSC011 # B2 VREFB2N1 IO LVDS21n 197 D6
+ # B2 VREFB2N1 VCCIO2
+signal BSC010 # B2 VREFB2N1 IO LVDS21p 198 C6
+ # B2 VREFB2N1 GND
+signal BSC009 # B2 VREFB2N1 IO LVDS20n C5
+signal BSC008 # B2 VREFB2N1 IO LVDS20p C4
+signal BSC007 # B2 VREFB2N1 IO LVDS19n 135 199 B5
+signal BSC006 # B2 VREFB2N1 IO LVDS19p 136 200 A5
+signal BSC005 # B2 VREFB2N1 IO LVDS18n 137 201 B4
+ # B2 VREFB2N1 VCCIO2 138 202
+signal BSC004 # B2 VREFB2N1 IO LVDS18p 139 203 A4
+ # B2 VREFB2N1 GND 140 204
+signal BSC003 # B2 VREFB2N1 IO LVDS17p 141 205 A3
+signal BSC002 # B2 VREFB2N1 IO LVDS17n DEV_CLRn 142 206 B3
+signal BSC001 # B2 VREFB2N1 IO LVDS16p 143 207 E6
+signal BSC000 # B2 VREFB2N1 IO LVDS16n 144 208 F6
+ # VCCINT G9
+ # VCCINT H7
+ # VCCINT H10
+ # VCCINT J7
+ # VCCINT J10
+ # VCCINT K8
+ # VCCIO1 B1
+ # VCCIO1 G3
+ # VCCIO1 K3
+ # VCCIO1 R1
+ # VCCIO4 M7
+ # VCCIO4 M10
+ # VCCIO4 P7
+ # VCCIO4 P10
+ # VCCIO4 T2
+ # VCCIO4 T15
+ # VCCIO3 B16
+ # VCCIO3 G14
+ # VCCIO3 K14
+ # VCCIO3 R16
+ # VCCIO2 A2
+ # VCCIO2 A15
+ # VCCIO2 C7
+ # VCCIO2 C10
+ # VCCIO2 E7
+ # VCCIO2 E10
+ # GND G8
+ # GND H8
+ # GND H9
+ # GND J8
+ # GND J9
+ # GND K9
+ # GND A1
+ # GND A16
+ # GND B2
+ # GND B15
+ # GND C8
+ # GND C9
+ # GND E8
+ # GND E9
+ # GND H3
+ # GND H14
+ # GND J3
+ # GND J14
+ # GND M8
+ # GND M9
+ # GND P8
+ # GND P9
+ # GND R2
+ # GND R15
+ # GND T1
+ # GND T16
+
+#
+# BSC group 198
+# T144 - I/O pin 1 (dedicated output pin in AS mode)
+# Q208 - I/O pin 1 (dedicated output pin in AS mode)
+# F256 - I/O pin C3 (dedicated output pin in AS mode)
+#
+bit 596 O 1 BSC198 595 1 Z
+bit 595 C 1 *
+bit 594 I 1 BSC198
+#
+# BSC group 197
+# T144 - I/O pin 2 (dedicated output pin in AS mode)
+# Q208 - I/O pin 2 (dedicated output pin in AS mode)
+# F256 - I/O pin F4 (dedicated output pin in AS mode)
+#
+bit 593 O 1 BSC197 592 1 Z
+bit 592 C 1 *
+bit 591 I 1 BSC197
+#
+# BSC group 196
+# T144 - I/O pin 3
+# Q208 - I/O pin 3
+# F256 - I/O pin C1
+#
+bit 590 O 1 BSC196 589 1 Z
+bit 589 C 1 *
+bit 588 I 1 BSC196
+#
+# BSC group 195
+# T144 - I/O pin 4
+# Q208 - I/O pin 4
+# F256 - I/O pin C2
+#
+bit 587 O 1 BSC195 586 1 Z
+bit 586 C 1 *
+bit 585 I 1 BSC195
+#
+# BSC group 194 for
+# T144 - unused pad
+# Q208 - I/O pin 5
+# F256 - I/O pin D5
+#
+bit 584 O 1 BSC194 583 1 Z
+bit 583 C 1 *
+bit 582 I 1 BSC194
+#
+# BSC group 193 for
+# T144 - unused pad
+# Q208 - I/O pin 6
+# F256 - I/O pin E5
+#
+bit 581 O 1 BSC193 580 1 Z
+bit 580 C 1 *
+bit 579 I 1 BSC193
+#
+# BSC group 192
+# T144 - unused pad
+# Q208 - I/O pin 8
+# F256 - I/O pin F5
+#
+bit 578 O 1 BSC192 577 1 Z
+bit 577 C 1 *
+bit 576 I 1 BSC192
+#
+# BSC group 191
+# T144 - unused pad
+# Q208 - I/O pin 10
+# F256 - unused pad
+#
+bit 575 O 1 BSC191 574 1 Z
+bit 574 C 1 *
+bit 573 I 1 BSC191
+#
+# BSC group 190
+# T144 - unused pad
+# Q208 - I/O pin 11
+# F256 - I/O pin D3
+#
+bit 572 O 1 BSC190 571 1 Z
+bit 571 C 1 *
+bit 570 I 1 BSC190
+#
+# BSC group 189
+# T144 - unused pad
+# Q208 - I/O pin 12
+# F256 - I/O pin D4
+#
+bit 569 O 1 BSC189 568 1 Z
+bit 568 C 1 *
+bit 567 I 1 BSC189
+#
+# BSC group 188
+# T144 - I/O pin 7
+# Q208 - I/O pin 13
+# F256 - I/O pin F3
+#
+bit 566 O 1 BSC188 565 1 Z
+bit 565 C 1 *
+bit 564 I 1 BSC188
+#
+# BSC group 187
+# T144 - unused pad
+# Q208 - unused pad
+# F256 - I/O pin D2
+#
+bit 563 O 1 BSC187 562 1 Z
+bit 562 C 1 *
+bit 561 I 1 BSC187
+#
+# BSC group 186
+# T144 - unused pad
+# Q208 - unused pad
+# F256 - I/O pin D1
+#
+bit 560 O 1 BSC186 559 1 Z
+bit 559 C 1 *
+bit 558 I 1 BSC186
+#
+# BSC group 185
+# T144 - unused pad
+# Q208 - unused pad
+# F256 - I/O pin E3
+#
+bit 557 O 1 BSC185 556 1 Z
+bit 556 C 1 *
+bit 555 I 1 BSC185
+#
+# BSC group 184
+# T144 - unused pad
+# Q208 - unused pad
+# F256 - I/O pin E4
+#
+bit 554 O 1 BSC184 553 1 Z
+bit 553 C 1 *
+bit 552 I 1 BSC184
+#
+# BSC group 183
+# T144 - unused pad
+# Q208 - unused pad
+# F256 - I/O pin G4
+#
+bit 551 O 1 BSC183 550 1 Z
+bit 550 C 1 *
+bit 549 I 1 BSC183
+#
+# BSC group 182
+# T144 - unused pad
+# Q208 - unused pad
+# F256 - I/O pin J6
+#
+bit 548 O 1 BSC182 547 1 Z
+bit 547 C 1 *
+bit 546 I 1 BSC182
+#
+# BSC group 181
+# T144 - unused pad
+# Q208 - unused pad
+# F256 - I/O pin H6
+#
+bit 545 O 1 BSC181 544 1 Z
+bit 544 C 1 *
+bit 543 I 1 BSC181
+#
+# BSC group 180
+# T144 - I/O pin 8
+# Q208 - I/O pin 14
+# F256 - I/O pin E1
+#
+bit 542 O 1 BSC180 541 1 Z
+bit 541 C 1 *
+bit 540 I 1 BSC180
+#
+# BSC group 179
+# T144 - I/O pin 9
+# Q208 - I/O pin 15
+# F256 - I/O pin E2
+#
+bit 539 O 1 BSC179 538 1 Z
+bit 538 C 1 *
+bit 537 I 1 BSC179
+#
+# BSC group 178 (DATA0)
+# T144 - Family-specific input pin 14
+# Q208 - Family-specific input pin 20
+# F256 - Family-specific input pin F1
+#
+bit 536 O 1 *
+bit 535 O 1 *
+bit 534 I 1 BSC178
+#
+# BSC group 177 (DCLK)
+# T144 - Family-specific input pin 15
+# Q208 - Family-specific input pin 21
+# F256 - Family-specific input pin H4
+#
+bit 533 O 1 BSC177 532 1 Z
+bit 532 C 1 *
+bit 531 I 1 BSC177
+#
+# BSC group 176 (nCE)
+# T144 - untestable Family-specific pin 16
+# Q208 - untestable Family-specific pin 22
+# F256 - untestable Family-specific pin G5
+#
+bit 530 O 1 *
+bit 529 O 1 *
+bit 528 O 1 *
+#
+# BSC group 175 (CLK0)
+# T144 - Family-specific input pin 17
+# Q208 - Family-specific input pin 23
+# F256 - Family-specific input pin H2
+#
+bit 527 O 1 *
+bit 526 O 1 *
+bit 525 I 1 BSC175
+#
+# BSC group 174 (CLK1)
+# T144 - Family-specific input pin 18
+# Q208 - Family-specific input pin 24
+# F256 - Family-specific input pin H1
+#
+bit 524 O 1 *
+bit 523 O 1 *
+bit 522 I 1 BSC174
+#
+# BSC group 173 (nCONFIG)
+# T144 - untestable Family-specific pin 20
+# Q208 - untestable Family-specific pin 26
+# F256 - untestable Family-specific pin J5
+#
+bit 521 O 1 *
+bit 520 O 1 *
+bit 519 O 1 *
+#
+# BSC group 172 (CLK2)
+# T144 - Family-specific input pin 21
+# Q208 - Family-specific input pin 27
+# F256 - Family-specific input pin J2
+#
+bit 518 O 1 *
+bit 517 O 1 *
+bit 516 I 1 BSC172
+#
+# BSC group 171 (CLK3)
+# T144 - Family-specific input pin 22
+# Q208 - Family-specific input pin 28
+# F256 - Family-specific input pin J1
+#
+bit 515 O 1 *
+bit 514 O 1 *
+bit 513 I 1 BSC171
+#
+# BSC group 170
+# T144 - I/O pin 24
+# Q208 - I/O pin 30
+# F256 - I/O pin K2
+#
+bit 512 O 1 BSC170 511 1 Z
+bit 511 C 1 *
+bit 510 I 1 BSC170
+#
+# BSC group 169
+# T144 - I/O pin 25
+# Q208 - I/O pin 31
+# F256 - I/O pin K1
+#
+bit 509 O 1 BSC169 508 1 Z
+bit 508 C 1 *
+bit 507 I 1 BSC169
+#
+# BSC group 168
+# T144 - unused pad
+# Q208 - unused pad
+# F256 - I/O pin K4
+#
+bit 506 O 1 BSC168 505 1 Z
+bit 505 C 1 *
+bit 504 I 1 BSC168
+#
+# BSC group 167
+# T144 - unused pad
+# Q208 - I/O pin 33
+# F256 - I/O pin K5
+#
+bit 503 O 1 BSC167 502 1 Z
+bit 502 C 1 *
+bit 501 I 1 BSC167
+#
+# BSC group 166
+# T144 - unused pad
+# Q208 - I/O pin 34
+# F256 - unused pad
+#
+bit 500 O 1 BSC166 499 1 Z
+bit 499 C 1 *
+bit 498 I 1 BSC166
+#
+# BSC group 165
+# T144 - unused pad
+# Q208 - I/O pin 35
+# F256 - I/O pin L1
+#
+bit 497 O 1 BSC165 496 1 Z
+bit 496 C 1 *
+bit 495 I 1 BSC165
+#
+# BSC group 164
+# T144 - unused pad
+# Q208 - unused pad
+# F256 - I/O pin L2
+#
+bit 494 O 1 BSC164 493 1 Z
+bit 493 C 1 *
+bit 492 I 1 BSC164
+#
+# BSC group 163
+# T144 - I/O pin 28
+# Q208 - I/O pin 37
+# F256 - I/O pin J4
+#
+bit 491 O 1 BSC163 490 1 Z
+bit 490 C 1 *
+bit 489 I 1 BSC163
+#
+# BSC group 162
+# T144 - unused pad
+# Q208 - unused pad
+# F256 - I/O pin M1
+#
+bit 488 O 1 BSC162 487 1 Z
+bit 487 C 1 *
+bit 486 I 1 BSC162
+#
+# BSC group 161
+# T144 - unused pad
+# Q208 - unused pad
+# F256 - I/O pin M2
+#
+bit 485 O 1 BSC161 484 1 Z
+bit 484 C 1 *
+bit 483 I 1 BSC161
+#
+# BSC group 160
+# T144 - unused pad
+# Q208 - unused pad
+# F256 - I/O pin M3
+#
+bit 482 O 1 BSC160 481 1 Z
+bit 481 C 1 *
+bit 480 I 1 BSC160
+#
+# BSC group 159
+# T144 - unused pad
+# Q208 - I/O pin 39
+# F256 - I/O pin L3
+#
+bit 479 O 1 BSC159 478 1 Z
+bit 478 C 1 *
+bit 477 I 1 BSC159
+#
+# BSC group 158
+# T144 - unused pad
+# Q208 - I/O pin 40
+# F256 - I/O pin N1
+#
+bit 476 O 1 BSC158 475 1 Z
+bit 475 C 1 *
+bit 474 I 1 BSC158
+#
+# BSC group 157
+# T144 - unused pad
+# Q208 - I/O pin 41
+# F256 - I/O pin N2
+#
+bit 473 O 1 BSC157 472 1 Z
+bit 472 C 1 *
+bit 471 I 1 BSC157
+#
+# BSC group 156
+# T144 - unused pad
+# Q208 - unused pad
+# F256 - I/O pin P1
+#
+bit 470 O 1 BSC156 469 1 Z
+bit 469 C 1 *
+bit 468 I 1 BSC156
+#
+# BSC group 155
+# T144 - unused pad
+# Q208 - unused pad
+# F256 - I/O pin P2
+#
+bit 467 O 1 BSC155 466 1 Z
+bit 466 C 1 *
+bit 465 I 1 BSC155
+#
+# BSC group 154
+# T144 - unused pad
+# Q208 - I/O pin 43
+# F256 - unused pad
+#
+bit 464 O 1 BSC154 463 1 Z
+bit 463 C 1 *
+bit 462 I 1 BSC154
+#
+# BSC group 153
+# T144 - unused pad
+# Q208 - I/O pin 44
+# F256 - I/O pin N3
+#
+bit 461 O 1 BSC153 460 1 Z
+bit 460 C 1 *
+bit 459 I 1 BSC153
+#
+# BSC group 152
+# T144 - unused pad
+# Q208 - I/O pin 45
+# F256 - I/O pin N4
+#
+bit 458 O 1 BSC152 457 1 Z
+bit 457 C 1 *
+bit 456 I 1 BSC152
+#
+# BSC group 151
+# T144 - I/O pin 30
+# Q208 - I/O pin 46
+# F256 - I/O pin P3
+#
+bit 455 O 1 BSC151 454 1 Z
+bit 454 C 1 *
+bit 453 I 1 BSC151
+#
+# BSC group 150
+# T144 - I/O pin 31
+# Q208 - I/O pin 47
+# F256 - I/O pin L4
+#
+bit 452 O 1 BSC150 451 1 Z
+bit 451 C 1 *
+bit 450 I 1 BSC150
+#
+# BSC group 149
+# T144 - I/O pin 32
+# Q208 - I/O pin 48
+# F256 - I/O pin M4
+#
+bit 449 O 1 BSC149 448 1 Z
+bit 448 C 1 *
+bit 447 I 1 BSC149
+#
+# BSC group 148
+# T144 - I/O pin 40
+# Q208 - I/O pin 56
+# F256 - I/O pin R3
+#
+bit 446 O 1 BSC148 445 1 Z
+bit 445 C 1 *
+bit 444 I 1 BSC148
+#
+# BSC group 147
+# T144 - I/O pin 41
+# Q208 - I/O pin 57
+# F256 - I/O pin T3
+#
+bit 443 O 1 BSC147 442 1 Z
+bit 442 C 1 *
+bit 441 I 1 BSC147
+#
+# BSC group 146
+# T144 - I/O pin 42
+# Q208 - I/O pin 58
+# F256 - I/O pin P5
+#
+bit 440 O 1 BSC146 439 1 Z
+bit 439 C 1 *
+bit 438 I 1 BSC146
+#
+# BSC group 145
+# T144 - I/O pin 43
+# Q208 - I/O pin 59
+# F256 - I/O pin P4
+#
+bit 437 O 1 BSC145 436 1 Z
+bit 436 C 1 *
+bit 435 I 1 BSC145
+#
+# BSC group 144
+# T144 - I/O pin 44
+# Q208 - I/O pin 60
+# F256 - I/O pin T4
+#
+bit 434 O 1 BSC144 433 1 Z
+bit 433 C 1 *
+bit 432 I 1 BSC144
+#
+# BSC group 143
+# T144 - I/O pin 45
+# Q208 - I/O pin 61
+# F256 - I/O pin R4
+#
+bit 431 O 1 BSC143 430 1 Z
+bit 430 C 1 *
+bit 429 I 1 BSC143
+#
+# BSC group 142
+# T144 - I/O pin 47
+# Q208 - I/O pin 63
+# F256 - I/O pin T5
+#
+bit 428 O 1 BSC142 427 1 Z
+bit 427 C 1 *
+bit 426 I 1 BSC142
+#
+# BSC group 141
+# T144 - I/O pin 48
+# Q208 - I/O pin 64
+# F256 - I/O pin R5
+#
+bit 425 O 1 BSC141 424 1 Z
+bit 424 C 1 *
+bit 423 I 1 BSC141
+#
+# BSC group 140
+# T144 - unused pad
+# Q208 - unused pad
+# F256 - I/O pin N7
+#
+bit 422 O 1 BSC140 421 1 Z
+bit 421 C 1 *
+bit 420 I 1 BSC140
+#
+# BSC group 139
+# T144 - unused pad
+# Q208 - unused pad
+# F256 - I/O pin K7
+#
+bit 419 O 1 BSC139 418 1 Z
+bit 418 C 1 *
+bit 417 I 1 BSC139
+#
+# BSC group 138
+# T144 - unused pad
+# Q208 - unused pad
+# F256 - I/O pin K6
+#
+bit 416 O 1 BSC138 415 1 Z
+bit 415 C 1 *
+bit 414 I 1 BSC138
+#
+# BSC group 137
+# T144 - unused pad
+# Q208 - unused pad
+# F256 - I/O pin T6
+#
+bit 413 O 1 BSC137 412 1 Z
+bit 412 C 1 *
+bit 411 I 1 BSC137
+#
+# BSC group 136
+# T144 - unused pad
+# Q208 - unused pad
+# F256 - I/O pin R6
+#
+bit 410 O 1 BSC136 409 1 Z
+bit 409 C 1 *
+bit 408 I 1 BSC136
+#
+# BSC group 135
+# T144 - unused pad
+# Q208 - unused pad
+# F256 - I/O pin P6
+#
+bit 407 O 1 BSC135 406 1 Z
+bit 406 C 1 *
+bit 405 I 1 BSC135
+#
+# BSC group 134
+# T144 - unused pad
+# Q208 - unused pad
+# F256 - I/O pin N6
+#
+bit 404 O 1 BSC134 403 1 Z
+bit 403 C 1 *
+bit 402 I 1 BSC134
+#
+# BSC group 133
+# T144 - I/O pin 51
+# Q208 - I/O pin 67
+# F256 - I/O pin N8
+#
+bit 401 O 1 BSC133 400 1 Z
+bit 400 C 1 *
+bit 399 I 1 BSC133
+#
+# BSC group 132
+# T144 - I/O pin 52
+# Q208 - I/O pin 68
+# F256 - I/O pin T7
+#
+bit 398 O 1 BSC132 397 1 Z
+bit 397 C 1 *
+bit 396 I 1 BSC132
+#
+# BSC group 131
+# T144 - unused pad
+# Q208 - I/O pin 69
+# F256 - I/O pin R7
+#
+bit 395 O 1 BSC131 394 1 Z
+bit 394 C 1 *
+bit 393 I 1 BSC131
+#
+# BSC group 130
+# T144 - unused pad
+# Q208 - unused pad
+# F256 - I/O pin L7
+#
+bit 392 O 1 BSC130 391 1 Z
+bit 391 C 1 *
+bit 390 I 1 BSC130
+#
+# BSC group 129
+# T144 - unused pad
+# Q208 - unused pad
+# F256 - I/O pin L8
+#
+bit 389 O 1 BSC129 388 1 Z
+bit 388 C 1 *
+bit 387 I 1 BSC129
+#
+# BSC group 128
+# T144 - I/O pin 53
+# Q208 - I/O pin 70
+# F256 - I/O pin T8
+#
+bit 386 O 1 BSC128 385 1 Z
+bit 385 C 1 *
+bit 384 I 1 BSC128
+#
+# BSC group 127
+# T144 - I/O pin 55
+# Q208 - I/O pin 72
+# F256 - I/O pin R8
+#
+bit 383 O 1 BSC127 382 1 Z
+bit 382 C 1 *
+bit 381 I 1 BSC127
+#
+# BSC group 126
+# T144 - I/O pin 57
+# Q208 - I/O pin 74
+# F256 - I/O pin T9
+#
+bit 380 O 1 BSC126 379 1 Z
+bit 379 C 1 *
+bit 378 I 1 BSC126
+#
+# BSC group 125
+# T144 - I/O pin 58
+# Q208 - I/O pin 75
+# F256 - I/O pin R9
+#
+bit 377 O 1 BSC125 376 1 Z
+bit 376 C 1 *
+bit 375 I 1 BSC125
+#
+# BSC group 124
+# T144 - I/O pin 59
+# Q208 - I/O pin 76
+# F256 - I/O pin N9
+#
+bit 374 O 1 BSC124 373 1 Z
+bit 373 C 1 *
+bit 372 I 1 BSC124
+#
+# BSC group 123
+# T144 - I/O pin 60
+# Q208 - I/O pin 77
+# F256 - I/O pin N10
+#
+bit 371 O 1 BSC123 370 1 Z
+bit 370 C 1 *
+bit 369 I 1 BSC123
+#
+# BSC group 122
+# T144 - unused pad
+# Q208 - unused pad
+# F256 - I/O pin T11
+#
+bit 368 O 1 BSC122 367 1 Z
+bit 367 C 1 *
+bit 366 I 1 BSC122
+#
+# BSC group 121
+# T144 - unused pad
+# Q208 - unused pad
+# F256 - I/O pin R11
+#
+bit 365 O 1 BSC121 364 1 Z
+bit 364 C 1 *
+bit 363 I 1 BSC121
+#
+# BSC group 120
+# T144 - unused pad
+# Q208 - I/O pin 80
+# F256 - I/O pin P11
+#
+bit 362 O 1 BSC120 361 1 Z
+bit 361 C 1 *
+bit 360 I 1 BSC120
+#
+# BSC group 119
+# T144 - unused pad
+# Q208 - I/O pin 81
+# F256 - I/O pin L9
+#
+bit 359 O 1 BSC119 358 1 Z
+bit 358 C 1 *
+bit 357 I 1 BSC119
+#
+# BSC group 118
+# T144 - unused pad
+# Q208 - I/O pin 82
+# F256 - I/O pin L10
+#
+bit 356 O 1 BSC118 355 1 Z
+bit 355 C 1 *
+bit 354 I 1 BSC118
+#
+# BSC group 117
+# T144 - unused pad
+# Q208 - I/O pin 84
+# F256 - I/O pin R10
+#
+bit 353 O 1 BSC117 352 1 Z
+bit 352 C 1 *
+bit 351 I 1 BSC117
+#
+# BSC group 116
+# T144 - unused pad
+# Q208 - I/O pin 86
+# F256 - I/O pin T10
+#
+bit 350 O 1 BSC116 349 1 Z
+bit 349 C 1 *
+bit 348 I 1 BSC116
+#
+# BSC group 115
+# T144 - unused pad
+# Q208 - I/O pin 87
+# F256 - I/O pin K11
+#
+bit 347 O 1 BSC115 346 1 Z
+bit 346 C 1 *
+bit 345 I 1 BSC115
+#
+# BSC group 114
+# T144 - unused pad
+# Q208 - I/O pin 88
+# F256 - I/O pin K10
+#
+bit 344 O 1 BSC114 343 1 Z
+bit 343 C 1 *
+bit 342 I 1 BSC114
+#
+# BSC group 113
+# T144 - I/O pin 63
+# Q208 - I/O pin 89
+# F256 - I/O pin N11
+#
+bit 341 O 1 BSC113 340 1 Z
+bit 340 C 1 *
+bit 339 I 1 BSC113
+#
+# BSC group 112
+# T144 - unused pad
+# Q208 - I/O pin 90
+# F256 - I/O pin P12
+#
+bit 338 O 1 BSC112 337 1 Z
+bit 337 C 1 *
+bit 336 I 1 BSC112
+#
+# BSC group 111
+# T144 - unused pad
+# Q208 - I/O pin 92
+# F256 - I/O pin P13
+#
+bit 335 O 1 BSC111 334 1 Z
+bit 334 C 1 *
+bit 333 I 1 BSC111
+#
+# BSC group 110
+# T144 - I/O pin 64
+# Q208 - I/O pin 94
+# F256 - I/O pin T12
+#
+bit 332 O 1 BSC110 331 1 Z
+bit 331 C 1 *
+bit 330 I 1 BSC110
+#
+# BSC group 109
+# T144 - I/O pin 65
+# Q208 - I/O pin 95
+# F256 - I/O pin R12
+#
+bit 329 O 1 BSC109 328 1 Z
+bit 328 C 1 *
+bit 327 I 1 BSC109
+#
+# BSC group 108
+# T144 - unused pad
+# Q208 - I/O pin 96
+# F256 - unused pad
+#
+bit 326 O 1 BSC108 325 1 Z
+bit 325 C 1 *
+bit 324 I 1 BSC108
+#
+# BSC group 107
+# T144 - unused pad
+# Q208 - I/O pin 97
+# F256 - I/O pin T13
+#
+bit 323 O 1 BSC107 322 1 Z
+bit 322 C 1 *
+bit 321 I 1 BSC107
+#
+# BSC group 106
+# T144 - I/O pin 67
+# Q208 - I/O pin 99
+# F256 - I/O pin R13
+#
+bit 320 O 1 BSC106 319 1 Z
+bit 319 C 1 *
+bit 318 I 1 BSC106
+#
+# BSC group 105
+# T144 - I/O pin 69
+# Q208 - I/O pin 101
+# F256 - I/O pin T14
+#
+bit 317 O 1 BSC105 316 1 Z
+bit 316 C 1 *
+bit 315 I 1 BSC105
+#
+# BSC group 104
+# T144 - I/O pin 70
+# Q208 - I/O pin 102
+# F256 - I/O pin R14
+#
+bit 314 O 1 BSC104 313 1 Z
+bit 313 C 1 *
+bit 312 I 1 BSC104
+#
+# BSC group 103
+# T144 - I/O pin 71
+# Q208 - I/O pin 103
+# F256 - I/O pin M11
+#
+bit 311 O 1 BSC103 310 1 Z
+bit 310 C 1 *
+bit 309 I 1 BSC103
+#
+# BSC group 102
+# T144 - I/O pin 72
+# Q208 - I/O pin 104
+# F256 - I/O pin L11
+#
+bit 308 O 1 BSC102 307 1 Z
+bit 307 C 1 *
+bit 306 I 1 BSC102
+#
+# BSC group 101
+# T144 - I/O pin 73
+# Q208 - I/O pin 105
+# F256 - I/O pin N12
+#
+bit 305 O 1 BSC101 304 1 Z
+bit 304 C 1 *
+bit 303 I 1 BSC101
+#
+# BSC group 100
+# T144 - I/O pin 74
+# Q208 - I/O pin 106
+# F256 - I/O pin M12
+#
+bit 302 O 1 BSC100 301 1 Z
+bit 301 C 1 *
+bit 300 I 1 BSC100
+#
+# BSC group 99
+# T144 - unused pad
+# Q208 - unused pad
+# F256 - I/O pin L12
+#
+bit 299 O 1 BSC099 298 1 Z
+bit 298 C 1 *
+bit 297 I 1 BSC099
+#
+# BSC group 98
+# T144 - unused pad
+# Q208 - unused pad
+# F256 - I/O pin K13
+#
+bit 296 O 1 BSC098 295 1 Z
+bit 295 C 1 *
+bit 294 I 1 BSC098
+#
+# BSC group 97
+# T144 - I/O pin 75
+# Q208 - I/O pin 107
+# F256 - I/O pin N13
+#
+bit 293 O 1 BSC097 292 1 Z
+bit 292 C 1 *
+bit 291 I 1 BSC097
+#
+# BSC group 96
+# T144 - I/O pin 76
+# Q208 - I/O pin 108
+# F256 - I/O pin N14
+#
+bit 290 O 1 BSC096 289 1 Z
+bit 289 C 1 *
+bit 288 I 1 BSC096
+#
+# BSC group 95
+# T144 - unused pad
+# Q208 - I/O pin 110
+# F256 - I/O pin P15
+#
+bit 287 O 1 BSC095 286 1 Z
+bit 286 C 1 *
+bit 285 I 1 BSC095
+#
+# BSC group 94
+# T144 - unused pad
+# Q208 - I/O pin 112
+# F256 - I/O pin P16
+#
+bit 284 O 1 BSC094 283 1 Z
+bit 283 C 1 *
+bit 282 I 1 BSC094
+#
+# BSC group 93
+# T144 - unused pad
+# Q208 - I/O pin 113
+# F256 - I/O pin N15
+#
+bit 281 O 1 BSC093 280 1 Z
+bit 280 C 1 *
+bit 279 I 1 BSC093
+#
+# BSC group 92
+# T144 - unused pad
+# Q208 - I/O pin 114
+# F256 - I/O pin N16
+#
+bit 278 O 1 BSC092 277 1 Z
+bit 277 C 1 *
+bit 276 I 1 BSC092
+#
+# BSC group 91
+# T144 - unused pad
+# Q208 - unused pad
+# F256 - I/O pin P14
+#
+bit 275 O 1 BSC091 274 1 Z
+bit 274 C 1 *
+bit 273 I 1 BSC091
+#
+# BSC group 90
+# T144 - unused pad
+# Q208 - I/O pin 115
+# F256 - unused pad
+#
+bit 272 O 1 BSC090 271 1 Z
+bit 271 C 1 *
+bit 270 I 1 BSC090
+#
+# BSC group 89
+# T144 - unused pad
+# Q208 - I/O pin 116
+# F256 - unused pad
+#
+bit 269 O 1 BSC089 268 1 Z
+bit 268 C 1 *
+bit 267 I 1 BSC089
+#
+# BSC group 88
+# T144 - I/O pin 79
+# Q208 - I/O pin 117
+# F256 - I/O pin M14
+#
+bit 266 O 1 BSC088 265 1 Z
+bit 265 C 1 *
+bit 264 I 1 BSC088
+#
+# BSC group 87
+# T144 - unused pad
+# Q208 - unused pad
+# F256 - I/O pin M15
+#
+bit 263 O 1 BSC087 262 1 Z
+bit 262 C 1 *
+bit 261 I 1 BSC087
+#
+# BSC group 86
+# T144 - unused pad
+# Q208 - unused pad
+# F256 - I/O pin M16
+#
+bit 260 O 1 BSC086 259 1 Z
+bit 259 C 1 *
+bit 258 I 1 BSC086
+#
+# BSC group 85
+# T144 - unused pad
+# Q208 - I/O pin 118
+# F256 - unused pad
+#
+bit 257 O 1 BSC085 256 1 Z
+bit 256 C 1 *
+bit 255 I 1 BSC085
+#
+# BSC group 84
+# T144 - unused pad
+# Q208 - unused pad
+# F256 - I/O pin L14
+#
+bit 254 O 1 BSC084 253 1 Z
+bit 253 C 1 *
+bit 252 I 1 BSC084
+#
+# BSC group 83
+# T144 - unused pad
+# Q208 - unused pad
+# F256 - I/O pin L15
+#
+bit 251 O 1 BSC083 250 1 Z
+bit 250 C 1 *
+bit 249 I 1 BSC083
+#
+# BSC group 82
+# T144 - unused pad
+# Q208 - unused pad
+# F256 - I/O pin L16
+#
+bit 248 O 1 BSC082 247 1 Z
+bit 247 C 1 *
+bit 246 I 1 BSC082
+#
+# BSC group 81 (nSTATUS)
+# T144 - untestable Family-specific pin 82
+# Q208 - untestable Family-specific pin 121
+# F256 - untestable Family-specific pin M13
+#
+bit 245 O 1 *
+bit 244 O 1 *
+bit 243 O 1 *
+#
+# BSC group 80 (CONF_DONE)
+# T144 - untestable Family-specific pin 83
+# Q208 - untestable Family-specific pin 123
+# F256 - untestable Family-specific pin L13
+#
+bit 242 O 1 *
+bit 241 O 1 *
+bit 240 O 1 *
+#
+# BSC group 79 (MSEL1)
+# T144 - Family-specific input pin 84
+# Q208 - Family-specific input pin 125
+# F256 - Family-specific input pin K12
+#
+bit 239 O 1 *
+bit 238 O 1 *
+bit 237 I 1 BSC079
+#
+# BSC group 78 (MSEL0)
+# T144 - Family-specific input pin 85
+# Q208 - Family-specific input pin 126
+# F256 - Family-specific input pin J13
+#
+bit 236 O 1 *
+bit 235 O 1 *
+bit 234 I 1 BSC078
+#
+# BSC group 77
+# T144 - I/O pin 86
+# Q208 - I/O pin 127
+# F256 - I/O pin K16
+#
+bit 233 O 1 BSC077 232 1 Z
+bit 232 C 1 *
+bit 231 I 1 BSC077
+#
+# BSC group 76
+# T144 - I/O pin 87
+# Q208 - I/O pin 128
+# F256 - I/O pin K15
+#
+bit 230 O 1 BSC076 229 1 Z
+bit 229 C 1 *
+bit 228 I 1 BSC076
+#
+# BSC group 75 (CLK7)
+# T144 - Family-specific input pin 88
+# Q208 - Family-specific input pin 129
+# F256 - Family-specific input pin J16
+#
+bit 227 O 1 *
+bit 226 O 1 *
+bit 225 I 1 BSC075
+#
+# BSC group 74 (CLK6)
+# T144 - Family-specific input pin 89
+# Q208 - Family-specific input pin 130
+# F256 - Family-specific input pin J15
+#
+bit 224 O 1 *
+bit 223 O 1 *
+bit 222 I 1 BSC074
+#
+# BSC group 73 (CLK5)
+# T144 - Family-specific input pin 90
+# Q208 - Family-specific input pin 131
+# F256 - Family-specific input pin H15
+#
+bit 221 O 1 *
+bit 220 O 1 *
+bit 219 I 1 BSC073
+#
+# BSC group 72 (CLK4)
+# T144 - Family-specific input pin 91
+# Q208 - Family-specific input pin 132
+# F256 - Family-specific input pin H16
+#
+bit 218 O 1 *
+bit 217 O 1 *
+bit 216 I 1 BSC072
+#
+# BSC group 71
+# T144 - I/O pin 92
+# Q208 - I/O pin 133
+# F256 - I/O pin H12
+#
+bit 215 O 1 BSC071 214 1 Z
+bit 214 C 1 *
+bit 213 I 1 BSC071
+#
+# BSC group 70
+# T144 - I/O pin 93
+# Q208 - I/O pin 134
+# F256 - I/O pin J12
+#
+bit 212 O 1 BSC070 211 1 Z
+bit 211 C 1 *
+bit 210 I 1 BSC070
+#
+# BSC group 69
+# T144 - I/O pin 94
+# Q208 - I/O pin 135
+# F256 - I/O pin G16
+#
+bit 209 O 1 BSC069 208 1 Z
+bit 208 C 1 *
+bit 207 I 1 BSC069
+#
+# BSC group 68
+# T144 - I/O pin 96
+# Q208 - I/O pin 137
+# F256 - I/O pin G15
+#
+bit 206 O 1 BSC068 205 1 Z
+bit 205 C 1 *
+bit 204 I 1 BSC068
+#
+# BSC group 67
+# T144 - I/O pin 97
+# Q208 - I/O pin 138
+# F256 - I/O pin F15
+#
+bit 203 O 1 BSC067 202 1 Z
+bit 202 C 1 *
+bit 201 I 1 BSC067
+#
+# BSC group 66
+# T144 - unused pad
+# Q208 - I/O pin 139
+# F256 - I/O pin F16
+#
+bit 200 O 1 BSC066 199 1 Z
+bit 199 C 1 *
+bit 198 I 1 BSC066
+#
+# BSC group 65
+# T144 - unused pad
+# Q208 - I/O pin 141
+# F256 - I/O pin J11
+#
+bit 197 O 1 BSC065 196 1 Z
+bit 196 C 1 *
+bit 195 I 1 BSC065
+#
+# BSC group 64
+# T144 - unused pad
+# Q208 - I/O pin 142
+# F256 - I/O pin H11
+#
+bit 194 O 1 BSC064 193 1 Z
+bit 193 C 1 *
+bit 192 I 1 BSC064
+#
+# BSC group 63
+# T144 - unused pad
+# Q208 - unused pad
+# F256 - I/O pin G12
+#
+bit 191 O 1 BSC063 190 1 Z
+bit 190 C 1 *
+bit 189 I 1 BSC063
+#
+# BSC group 62
+# T144 - unused pad
+# Q208 - unused pad
+# F256 - I/O pin G13
+#
+bit 188 O 1 BSC062 187 1 Z
+bit 187 C 1 *
+bit 186 I 1 BSC062
+#
+# BSC group 61
+# T144 - unused pad
+# Q208 - I/O pin 143
+# F256 - I/O pin E13
+#
+bit 185 O 1 BSC061 184 1 Z
+bit 184 C 1 *
+bit 183 I 1 BSC061
+#
+# BSC group 60
+# T144 - unused pad
+# Q208 - I/O pin 144
+# F256 - I/O pin F13
+#
+bit 182 O 1 BSC060 181 1 Z
+bit 181 C 1 *
+bit 180 I 1 BSC060
+#
+# BSC group 59
+# T144 - I/O pin 99
+# Q208 - I/O pin 145
+# F256 - I/O pin H13
+#
+bit 179 O 1 BSC059 178 1 Z
+bit 178 C 1 *
+bit 177 I 1 BSC059
+#
+# BSC group 58
+# T144 - unused pad
+# Q208 - unused pad
+# F256 - I/O pin D15
+#
+bit 176 O 1 BSC058 175 1 Z
+bit 175 C 1 *
+bit 174 I 1 BSC058
+#
+# BSC group 57
+# T144 - unused pad
+# Q208 - unused pad
+# F256 - I/O pin D16
+#
+bit 173 O 1 BSC057 172 1 Z
+bit 172 C 1 *
+bit 171 I 1 BSC057
+#
+# BSC group 56
+# T144 - unused pad
+# Q208 - unused pad
+# F256 - I/O pin E15
+#
+bit 170 O 1 BSC056 169 1 Z
+bit 169 C 1 *
+bit 168 I 1 BSC056
+#
+# BSC group 55
+# T144 - unused pad
+# Q208 - unused pad
+# F256 - I/O pin E16
+#
+bit 167 O 1 BSC055 166 1 Z
+bit 166 C 1 *
+bit 165 I 1 BSC055
+#
+# BSC group 54
+# T144 - unused pad
+# Q208 - unused pad
+# F256 - I/O pin F14
+#
+bit 164 O 1 BSC054 163 1 Z
+bit 163 C 1 *
+bit 162 I 1 BSC054
+#
+# BSC group 53
+# T144 - I/O pin 100
+# Q208 - I/O pin 146
+# F256 - I/O pin C15
+#
+bit 161 O 1 BSC053 160 1 Z
+bit 160 C 1 *
+bit 159 I 1 BSC053
+#
+# BSC group 52
+# T144 - I/O pin 101
+# Q208 - I/O pin 147
+# F256 - I/O pin C16
+#
+bit 158 O 1 BSC052 157 1 Z
+bit 157 C 1 *
+bit 156 I 1 BSC052
+#
+# BSC group 51
+# T144 - unused pad
+# Q208 - I/O pin 149
+# F256 - I/O pin C14
+#
+bit 155 O 1 BSC051 154 1 Z
+bit 154 C 1 *
+bit 153 I 1 BSC051
+#
+# BSC group 50
+# T144 - unused pad
+# Q208 - I/O pin 150
+# F256 - I/O pin D13
+#
+bit 152 O 1 BSC050 151 1 Z
+bit 151 C 1 *
+bit 150 I 1 BSC050
+#
+# BSC group 49
+# T144 - I/O pin 103
+# Q208 - I/O pin 151
+# F256 - I/O pin E14
+#
+bit 149 O 1 BSC049 148 1 Z
+bit 148 C 1 *
+bit 147 I 1 BSC049
+#
+# BSC group 48
+# T144 - I/O pin 104
+# Q208 - I/O pin 152
+# F256 - I/O pin D14
+#
+bit 146 O 1 BSC048 145 1 Z
+bit 145 C 1 *
+bit 144 I 1 BSC048
+#
+# BSC group 47
+# T144 - I/O pin 112
+# Q208 - I/O pin 160
+# F256 - I/O pin B14
+#
+bit 143 O 1 BSC047 142 1 Z
+bit 142 C 1 *
+bit 141 I 1 BSC047
+#
+# BSC group 46
+# T144 - I/O pin 113
+# Q208 - I/O pin 161
+# F256 - I/O pin A14
+#
+bit 140 O 1 BSC046 139 1 Z
+bit 139 C 1 *
+bit 138 I 1 BSC046
+#
+# BSC group 45
+# T144 - I/O pin 114
+# Q208 - I/O pin 162
+# F256 - I/O pin C13
+#
+bit 137 O 1 BSC045 136 1 Z
+bit 136 C 1 *
+bit 135 I 1 BSC045
+#
+# BSC group 44
+# T144 - I/O pin 115
+# Q208 - I/O pin 163
+# F256 - I/O pin C12
+#
+bit 134 O 1 BSC044 133 1 Z
+bit 133 C 1 *
+bit 132 I 1 BSC044
+#
+# BSC group 43
+# T144 - unused pad
+# Q208 - I/O pin 164
+# F256 - I/O pin B13
+#
+bit 131 O 1 BSC043 130 1 Z
+bit 130 C 1 *
+bit 129 I 1 BSC043
+#
+# BSC group 42
+# T144 - unused pad
+# Q208 - I/O pin 165
+# F256 - I/O pin A13
+#
+bit 128 O 1 BSC042 127 1 Z
+bit 127 C 1 *
+bit 126 I 1 BSC042
+#
+# BSC group 41
+# T144 - I/O pin 118
+# Q208 - I/O pin 168
+# F256 - I/O pin B12
+#
+bit 125 O 1 BSC041 124 1 Z
+bit 124 C 1 *
+bit 123 I 1 BSC041
+#
+# BSC group 40
+# T144 - I/O pin 119
+# Q208 - I/O pin 169
+# F256 - I/O pin A12
+#
+bit 122 O 1 BSC040 121 1 Z
+bit 121 C 1 *
+bit 120 I 1 BSC040
+#
+# BSC group 39
+# T144 - I/O pin 120
+# Q208 - I/O pin 170
+# F256 - I/O pin C11
+#
+bit 119 O 1 BSC039 118 1 Z
+bit 118 C 1 *
+bit 117 I 1 BSC039
+#
+# BSC group 38
+# T144 - I/O pin 121
+# Q208 - I/O pin 171
+# F256 - I/O pin B11
+#
+bit 116 O 1 BSC038 115 1 Z
+bit 115 C 1 *
+bit 114 I 1 BSC038
+#
+# BSC group 37
+# T144 - I/O pin 122
+# Q208 - I/O pin 173
+# F256 - I/O pin A11
+#
+bit 113 O 1 BSC037 112 1 Z
+bit 112 C 1 *
+bit 111 I 1 BSC037
+#
+# BSC group 36
+# T144 - unused pad
+# Q208 - unused pad
+# F256 - I/O pin G10
+#
+bit 110 O 1 BSC036 109 1 Z
+bit 109 C 1 *
+bit 108 I 1 BSC036
+#
+# BSC group 35
+# T144 - unused pad
+# Q208 - unused pad
+# F256 - I/O pin G11
+#
+bit 107 O 1 BSC035 106 1 Z
+bit 106 C 1 *
+bit 105 I 1 BSC035
+#
+# BSC group 34
+# T144 - unused pad
+# Q208 - I/O pin 175
+# F256 - I/O pin B10
+#
+bit 104 O 1 BSC034 103 1 Z
+bit 103 C 1 *
+bit 102 I 1 BSC034
+#
+# BSC group 33
+# T144 - unused pad
+# Q208 - I/O pin 176
+# F256 - I/O pin A10
+#
+bit 101 O 1 BSC033 100 1 Z
+bit 100 C 1 *
+bit 99 I 1 BSC033
+#
+# BSC group 32
+# T144 - unused pad
+# Q208 - unused pad
+# F256 - I/O pin F10
+#
+bit 98 O 1 BSC032 97 1 Z
+bit 97 C 1 *
+bit 96 I 1 BSC032
+#
+# BSC group 31
+# T144 - unused pad
+# Q208 - unused pad
+# F256 - I/O pin F9
+#
+bit 95 O 1 BSC031 94 1 Z
+bit 94 C 1 *
+bit 93 I 1 BSC031
+#
+# BSC group 30
+# T144 - unused pad
+# Q208 - unused pad
+# F256 - I/O pin D9
+#
+bit 92 O 1 BSC030 91 1 Z
+bit 91 C 1 *
+bit 90 I 1 BSC030
+#
+# BSC group 29
+# T144 - I/O pin 125
+# Q208 - I/O pin 179
+# F256 - I/O pin D11
+#
+bit 89 O 1 BSC029 88 1 Z
+bit 88 C 1 *
+bit 87 I 1 BSC029
+#
+# BSC group 28
+# T144 - I/O pin 126
+# Q208 - I/O pin 180
+# F256 - I/O pin D10
+#
+bit 86 O 1 BSC028 85 1 Z
+bit 85 C 1 *
+bit 84 I 1 BSC028
+#
+# BSC group 27
+# T144 - unused pad
+# Q208 - I/O pin 181
+# F256 - I/O pin A9
+#
+bit 83 O 1 BSC027 82 1 Z
+bit 82 C 1 *
+bit 81 I 1 BSC027
+#
+# BSC group 26
+# T144 - unused pad
+# Q208 - I/O pin 182
+# F256 - I/O pin B9
+#
+bit 80 O 1 BSC026 79 1 Z
+bit 79 C 1 *
+bit 78 I 1 BSC026
+#
+# BSC group 25
+# T144 - unused pad
+# Q208 - unused pad
+# F256 - I/O pin A8
+#
+bit 77 O 1 BSC025 76 1 Z
+bit 76 C 1 *
+bit 75 I 1 BSC025
+#
+# BSC group 24
+# T144 - unused pad
+# Q208 - unused pad
+# F256 - I/O pin B8
+#
+bit 74 O 1 BSC024 73 1 Z
+bit 73 C 1 *
+bit 72 I 1 BSC024
+#
+# BSC group 23
+# T144 - unused pad
+# Q208 - unused pad
+# F256 - I/O pin A7
+#
+bit 71 O 1 BSC023 70 1 Z
+bit 70 C 1 *
+bit 69 I 1 BSC023
+#
+# BSC group 22
+# T144 - I/O pin 129
+# Q208 - I/O pin 185
+# F256 - I/O pin B7
+#
+bit 68 O 1 BSC022 67 1 Z
+bit 67 C 1 *
+bit 66 I 1 BSC022
+#
+# BSC group 21
+# T144 - unused pad
+# Q208 - I/O pin 187
+# F256 - I/O pin F7
+#
+bit 65 O 1 BSC021 64 1 Z
+bit 64 C 1 *
+bit 63 I 1 BSC021
+#
+# BSC group 20
+# T144 - unused pad
+# Q208 - I/O pin 188
+# F256 - F8
+#
+bit 62 O 1 BSC020 61 1 Z
+bit 61 C 1 *
+bit 60 I 1 BSC020
+#
+# BSC group 19
+# T144 - unused pad
+# Q208 - I/O pin 189
+# F256 - unused pad
+#
+bit 59 O 1 BSC019 58 1 Z
+bit 58 C 1 *
+bit 57 I 1 BSC019
+#
+# BSC group 18
+# T144 - unused pad
+# Q208 - I/O pad 191
+# F256 - unused pad
+#
+bit 56 O 1 BSC018 55 1 Z
+bit 55 C 1 *
+bit 54 I 1 BSC018
+#
+# BSC group 17
+# T144 - I/O pin 132
+# Q208 - I/O pin 192
+# F256 - I/O pin D8
+#
+bit 53 O 1 BSC017 52 1 Z
+bit 52 C 1 *
+bit 51 I 1 BSC017
+#
+# BSC group 16
+# T144 - I/O pin 133
+# Q208 - I/O pin 193
+# F256 - I/O pin B6
+#
+bit 50 O 1 BSC016 49 1 Z
+bit 49 C 1 *
+bit 48 I 1 BSC016
+#
+# BSC group 15
+# T144 - I/O pin 134
+# Q208 - I/O pin 195
+# F256 - I/O pin A6
+#
+bit 47 O 1 BSC015 46 1 Z
+bit 46 C 1 *
+bit 45 I 1 BSC015
+#
+# BSC group 14
+# T144 - unused pad
+# Q208 - unused pad
+# F256 - I/O pin G6
+#
+bit 44 O 1 BSC014 43 1 Z
+bit 43 C 1 *
+bit 42 I 1 BSC014
+#
+# BSC group 13
+# T144 - unused pad
+# Q208 - unused pad
+# F256 - I/O pin G7
+#
+bit 41 O 1 BSC013 40 1 Z
+bit 40 C 1 *
+bit 39 I 1 BSC013
+#
+# BSC group 12
+# T144 - unused pad
+# Q208 - unused pad
+# F256 - I/O pin D7
+#
+bit 38 O 1 BSC012 37 1 Z
+bit 37 C 1 *
+bit 36 I 1 BSC012
+#
+# BSC group 11
+# T144 - unused pad
+# Q208 - I/O pin 197
+# F256 - I/O pin D6
+#
+bit 35 O 1 BSC011 34 1 Z
+bit 34 C 1 *
+bit 33 I 1 BSC011
+#
+# BSC group 10
+# T144 - unused pad
+# Q208 - I/O pin 198
+# F256 - I/O pin C6
+#
+bit 32 O 1 BSC010 31 1 Z
+bit 31 C 1 *
+bit 30 I 1 BSC010
+#
+# BSC group 9
+# T144 - unused pad
+# Q208 - unused pad
+# F256 - I/O pin C5
+#
+bit 29 O 1 BSC009 28 1 Z
+bit 28 C 1 *
+bit 27 I 1 BSC009
+#
+# BSC group 8
+# T144 - unused pad
+# Q208 - unused pad
+# F256 - I/O pin C4
+#
+bit 26 O 1 BSC008 25 1 Z
+bit 25 C 1 *
+bit 24 I 1 BSC008
+#
+# BSC group 7
+# T144 - I/O pin 135
+# Q208 - I/O pin 199
+# F256 - I/O pin B5
+#
+bit 23 O 1 BSC007 22 1 Z
+bit 22 C 1 *
+bit 21 I 1 BSC007
+#
+# BSC group 6
+# T144 - I/O pin 136
+# Q208 - I/O pin 200
+# F256 - I/O pin A5
+#
+bit 20 O 1 BSC006 19 1 Z
+bit 19 C 1 *
+bit 18 I 1 BSC006
+#
+# BSC group 5
+# T144 - I/O pin 137
+# Q208 - I/O pin 201
+# F256 - I/O pin B4
+#
+bit 17 O 1 BSC005 16 1 Z
+bit 16 C 1 *
+bit 15 I 1 BSC005
+#
+# BSC group 4
+# T144 - I/O pin 139
+# Q208 - I/O pin 203
+# F256 - I/O pin A4
+#
+bit 14 O 1 BSC004 13 1 Z
+bit 13 C 1 *
+bit 12 I 1 BSC004
+#
+# BSC group 3
+# T144 - I/O pin 141
+# Q208 - I/O pin 205
+# F256 - I/O pin A3
+#
+bit 11 O 1 BSC003 10 1 Z
+bit 10 C 1 *
+bit 9 I 1 BSC003
+#
+# BSC group 2
+# T144 - I/O pin 142
+# Q208 - I/O pin 206
+# F256 - I/O pin B3
+#
+bit 8 O 1 BSC002 7 1 Z
+bit 7 C 1 *
+bit 6 I 1 BSC002
+#
+# BSC group 1
+# T144 - I/O pin 143
+# Q208 - I/O pin 207
+# F256 - I/O pin E6
+#
+bit 5 O 1 BSC001 4 1 Z
+bit 4 C 1 *
+bit 3 I 1 BSC001
+#
+# BSC group 0
+# T144 - I/O pin 144
+# Q208 - I/O pin 208
+# F256 - I/O pin F6
+#
+bit 2 O 1 BSC000 1 1 Z
+bit 1 C 1 *
+bit 0 I 1 BSC000
--- /dev/null
+#
+# $Id$
+#
+# JTAG package script for EP2C8F256
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by H Hartley Sweeten <hsweeten@visionengravers.com>
+#
+# Note:
+# The signals defined in this file as unused pad are specified as
+# I/O pins in the main configuration file ep2c8.
+#
+
+salias IOC3 BSC198 # Note: this pin is specified as I/O. If AS mode is specified by MSEL it is output only (ASDO)
+salias IOF4 BSC197 # Note: this pin is specified as I/O. If AS mode is specified by MSEL it is output only (nCSO)
+salias IOC1 BSC196
+salias IOC2 BSC195
+salias IOD5 BSC194
+salias IOE5 BSC193
+salias IOF5 BSC192
+# BSC191 # unused pad
+salias IOD3 BSC190
+salias IOD4 BSC189
+salias IOF3 BSC188
+salias IOD2 BSC187
+salias IOD1 BSC186
+salias IOE3 BSC185
+salias IOE4 BSC184
+salias IOG4 BSC183
+salias IOJ6 BSC182
+salias IOH6 BSC181
+salias IOE1 BSC180
+salias IOE2 BSC179
+salias DATA0 BSC178 # Family-specific input pin F1
+salias DCLK BSC177 # Family-specific input pin H4
+# nCE BSC176 # untestable Family-specific pin G5
+salias CLK0 BSC175 # Family-specific input pin H2
+salias CLK1 BSC174 # Family-specific input pin H1
+# nCONFIG BSC173 # untestable Family-specific pin J5
+salias CLK2 BSC172 # Family-specific input pin J2
+salias CLK3 BSC171 # Family-specific input pin J1
+salias IOK2 BSC170
+salias IOK1 BSC169
+salias IOK4 BSC168
+salias IOK5 BSC167
+# BSC166 # unused pad
+salias IOL1 BSC165
+salias IOL2 BSC164
+salias IOJ4 BSC163
+salias IOM1 BSC162
+salias IOM2 BSC161
+salias IOM3 BSC160
+salias IOL3 BSC159
+salias ION1 BSC158
+salias ION2 BSC157
+salias IOP1 BSC156
+salias IOP2 BSC155
+# BSC154 # unused pad
+salias ION3 BSC153
+salias ION4 BSC152
+salias IOP3 BSC151
+salias IOL4 BSC150
+salias IOM4 BSC149
+salias IOR3 BSC148
+salias IOT3 BSC147
+salias IOP5 BSC146
+salias IOP4 BSC145
+salias IOT4 BSC144
+salias IOR4 BSC143
+salias IOT5 BSC142
+salias IOR5 BSC141
+salias ION7 BSC140
+salias IOK7 BSC139
+salias IOK6 BSC138
+salias IOT6 BSC137
+salias IOR6 BSC136
+salias IOP6 BSC135
+salias ION6 BSC134
+salias ION8 BSC133
+salias IOT7 BSC132
+salias IOR7 BSC131
+salias IOL7 BSC130
+salias IOL8 BSC129
+salias IOT8 BSC128
+salias IOR8 BSC127
+salias IOT9 BSC126
+salias IOR9 BSC125
+salias ION9 BSC124
+salias ION10 BSC123
+salias IOT11 BSC122
+salias IOR11 BSC121
+salias IOP11 BSC120
+salias IOL9 BSC119
+salias IOL10 BSC118
+salias IOR10 BSC117
+salias IOT10 BSC116
+salias IOK11 BSC115
+salias IOK10 BSC114
+salias ION11 BSC113
+salias IOP12 BSC112
+salias IOP13 BSC111
+salias IOT12 BSC110
+salias IOR12 BSC109
+# BSC108 # unused pad
+salias IOT13 BSC107
+salias IOR13 BSC106
+salias IOT14 BSC105
+salias IOR14 BSC104
+salias IOM11 BSC103
+salias IOL11 BSC102
+salias ION12 BSC101
+salias IOM12 BSC100
+salias IOL12 BSC099
+salias IOK13 BSC098
+salias ION13 BSC097
+salias ION14 BSC096
+salias IOP15 BSC095
+salias IOP16 BSC094
+salias ION15 BSC093
+salias ION16 BSC092
+salias IOP14 BSC091
+# BSC090 # unused pad
+# BSC089 # unused pad
+salias IOM14 BSC088
+salias IOM15 BSC087
+salias IOM16 BSC086
+# BSC085 # unused pad
+salias IOL14 BSC084
+salias IOL15 BSC083
+salias IOL16 BSC082
+# nSTATUS BSC081 # untestable Family-specific pin M13
+# CONF_DONE BSC080 # untestable Family-specific pin L13
+salias MSEL1 BSC079 # Family-specific input pin K12
+salias MSEL0 BSC078 # Family-specific input pin J13
+salias IOK16 BSC077
+salias IOK15 BSC076
+salias CLK7 BSC075 # Family-specific input pin J16
+salias CLK6 BSC074 # Family-specific input pin J15
+salias CLK5 BSC073 # Family-specific input pin H15
+salias CLK4 BSC072 # Family-specific input pin H16
+salias IOH12 BSC071
+salias IOJ12 BSC070
+salias IOG16 BSC069
+salias IOG15 BSC068
+salias IOF15 BSC067
+salias IOF16 BSC066
+salias IOJ11 BSC065
+salias IOH11 BSC064
+salias IOG12 BSC063
+salias IOG13 BSC062
+salias IOE13 BSC061
+salias IOF13 BSC060
+salias IOH13 BSC059
+salias IOD15 BSC058
+salias IOD16 BSC057
+salias IOE15 BSC056
+salias IOE16 BSC055
+salias IOF14 BSC054
+salias IOC15 BSC053
+salias IOC16 BSC052
+salias IOC14 BSC051
+salias IOD13 BSC050
+salias IOE14 BSC049
+salias IOD14 BSC048
+salias IOB14 BSC047
+salias IOA14 BSC046
+salias IOC13 BSC045
+salias IOC12 BSC044
+salias IOB13 BSC043
+salias IOA13 BSC042
+salias IOB12 BSC041
+salias IOA12 BSC040
+salias IOC11 BSC039
+salias IOB11 BSC038
+salias IOA11 BSC037
+salias IOG10 BSC036
+salias IOG11 BSC035
+salias IOB10 BSC034
+salias IOA10 BSC033
+salias IOF10 BSC032
+salias IOF9 BSC031
+salias IOD9 BSC030
+salias IOD11 BSC029
+salias IOD10 BSC028
+salias IOA9 BSC027
+salias IOB9 BSC026
+salias IOA8 BSC025
+salias IOB8 BSC024
+salias IOA7 BSC023
+salias IOB7 BSC022
+salias IOF7 BSC021
+salias IOF8 BSC020
+# BSC019 # unused pad
+# BSC018 # unused pad
+salias IOD8 BSC017
+salias IOB6 BSC016
+salias IOA6 BSC015
+salias IOG6 BSC014
+salias IOG7 BSC013
+salias IOD7 BSC012
+salias IOD6 BSC011
+salias IOC6 BSC010
+salias IOC5 BSC009
+salias IOC4 BSC008
+salias IOB5 BSC007
+salias IOA5 BSC006
+salias IOB4 BSC005
+salias IOA4 BSC004
+salias IOA3 BSC003
+salias IOB3 BSC002
+salias IOE6 BSC001
+salias IOF6 BSC000
--- /dev/null
+#
+# $Id$
+#
+# JTAG package script for EP2C8Q208
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by H Hartley Sweeten <hsweeten@visionengravers.com>
+#
+# Note:
+# The signals defined in this file as unused pad are specified as
+# I/O pins in the main configuration file ep2c8.
+#
+
+salias IO1 BSC198 # Note: this pin is specified as I/O. If AS mode is specified by MSEL it is output only (ASDO)
+salias IO2 BSC197 # Note: this pin is specified as I/O. If AS mode is specified by MSEL it is output only (nCSO)
+salias IO3 BSC196
+salias IO4 BSC195
+salias IO5 BSC194
+salias IO6 BSC193
+salias IO8 BSC192
+salias IO10 BSC191
+salias IO11 BSC190
+salias IO12 BSC189
+salias IO13 BSC188
+# BSC187 # unused pad
+# BSC186 # unused pad
+# BSC185 # unused pad
+# BSC184 # unused pad
+# BSC183 # unused pad
+# BSC182 # unused pad
+# BSC181 # unused pad
+salias IO14 BSC180
+salias IO15 BSC179
+salias DATA0 BSC178 # Family-specific input pin 20
+salias DCLK BSC177 # Family-specific input pin 21
+# nCE BSC176 # untestable Family-specific pin 22
+salias CLK0 BSC175 # Family-specific input pin 23
+salias CLK1 BSC174 # Family-specific input pin 24
+# nCONFIG BSC173 # untestable Family-specific pin 26
+salias CLK2 BSC172 # Family-specific input pin 27
+salias CLK3 BSC171 # Family-specific input pin 28
+salias IO30 BSC170
+salias IO31 BSC169
+# BSC168 # unused pad
+salias IO33 BSC167
+salias IO34 BSC166
+salias IO35 BSC165
+# BSC164 # unused pad
+salias IO37 BSC163
+# BSC162 # unused pad
+# BSC161 # unused pad
+# BSC160 # unused pad
+salias IO39 BSC159
+salias IO40 BSC158
+salias IO41 BSC157
+# BSC156 # unused pad
+# BSC155 # unused pad
+salias IO43 BSC154
+salias IO44 BSC153
+salias IO45 BSC152
+salias IO46 BSC151
+salias IO47 BSC150
+salias IO48 BSC149
+salias IO56 BSC148
+salias IO57 BSC147
+salias IO58 BSC146
+salias IO59 BSC145
+salias IO60 BSC144
+salias IO61 BSC143
+salias IO63 BSC142
+salias IO64 BSC141
+# BSC140 # unused pad
+# BSC139 # unused pad
+# BSC138 # unused pad
+# BSC137 # unused pad
+# BSC136 # unused pad
+# BSC135 # unused pad
+# BSC134 # unused pad
+salias IO67 BSC133
+salias IO68 BSC132
+salias IO69 BSC131
+# BSC130 # unused pad
+# BSC129 # unused pad
+salias IO70 BSC128
+salias IO72 BSC127
+salias IO74 BSC126
+salias IO75 BSC125
+salias IO76 BSC124
+salias IO77 BSC123
+# BSC122 # unused pad
+# BSC121 # unused pad
+salias IO80 BSC120
+salias IO81 BSC119
+salias IO82 BSC118
+salias IO84 BSC117
+salias IO86 BSC116
+salias IO87 BSC115
+salias IO88 BSC114
+salias IO89 BSC113
+salias IO90 BSC112
+salias IO92 BSC111
+salias IO94 BSC110
+salias IO95 BSC109
+salias IO96 BSC108
+salias IO97 BSC107
+salias IO99 BSC106
+salias IO101 BSC105
+salias IO102 BSC104
+salias IO103 BSC103
+salias IO104 BSC102
+salias IO105 BSC101
+salias IO106 BSC100
+# BSC099 # unused pad
+# BSC098 # unused pad
+salias IO107 BSC097
+salias IO108 BSC096
+salias IO110 BSC095
+salias IO112 BSC094
+salias IO113 BSC093
+salias IO114 BSC092
+# BSC091 # unused pad
+salias IO115 BSC090
+salias IO116 BSC089
+salias IO117 BSC088
+# BSC087 # unused pad
+# BSC086 # unused pad
+salias IO118 BSC085
+# BSC084 # unused pad
+# BSC083 # unused pad
+# BSC082 # unused pad
+# nSTATUS BSC081 # untestable Family-specific pin 121
+# CONF_DONE BSC080 # untestable Family-specific pin 123
+salias MSEL1 BSC079 # Family-specific input pin 125
+salias MSEL0 BSC078 # Family-specific input pin 126
+salias IO127 BSC077
+salias IO128 BSC076
+salias CLK7 BSC075 # Family-specific input pin 129
+salias CLK6 BSC074 # Family-specific input pin 130
+salias CLK5 BSC073 # Family-specific input pin 131
+salias CLK4 BSC072 # Family-specific input pin 132
+salias IO133 BSC071
+salias IO134 BSC070
+salias IO135 BSC069
+salias IO137 BSC068
+salias IO138 BSC067
+salias IO139 BSC066
+salias IO141 BSC065
+salias IO142 BSC064
+# BSC063 # unused pad
+# BSC062 # unused pad
+salias IO143 BSC061
+salias IO144 BSC060
+salias IO145 BSC059
+# BSC058 # unused pad
+# BSC057 # unused pad
+# BSC056 # unused pad
+# BSC055 # unused pad
+# BSC054 # unused pad
+salias IO146 BSC053
+salias IO147 BSC052
+salias IO149 BSC051
+salias IO150 BSC050
+salias IO151 BSC049
+salias IO152 BSC048
+salias IO160 BSC047
+salias IO161 BSC046
+salias IO162 BSC045
+salias IO163 BSC044
+salias IO164 BSC043
+salias IO165 BSC042
+salias IO168 BSC041
+salias IO169 BSC040
+salias IO170 BSC039
+salias IO171 BSC038
+salias IO173 BSC037
+# BSC036 # unused pad
+# BSC035 # unused pad
+salias IO175 BSC034
+salias IO176 BSC033
+# BSC032 # unused pad
+# BSC031 # unused pad
+# BSC030 # unused pad
+salias IO179 BSC029
+salias IO180 BSC028
+salias IO181 BSC027
+salias IO182 BSC026
+# BSC025 # unused pad
+# BSC024 # unused pad
+# BSC023 # unused pad
+salias IO185 BSC022
+salias IO187 BSC021
+salias IO188 BSC020
+salias IO189 BSC019
+salias IO191 BSC018
+salias IO192 BSC017
+salias IO193 BSC016
+salias IO195 BSC015
+# BSC014 # unused pad
+# BSC013 # unused pad
+# BSC012 # unused pad
+salias IO197 BSC011
+salias IO198 BSC010
+# BSC009 # unused pad
+# BSC008 # unused pad
+salias IO199 BSC007
+salias IO200 BSC006
+salias IO201 BSC005
+salias IO203 BSC004
+salias IO205 BSC003
+salias IO206 BSC002
+salias IO207 BSC001
+salias IO208 BSC000
--- /dev/null
+#
+# $Id$
+#
+# JTAG package script for EP2C8T144
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by H Hartley Sweeten <hsweeten@visionengravers.com>
+#
+# Note:
+# The signals defined in this file as unused pad are specified as
+# I/O pins in the main configuration file ep2c8.
+#
+
+salias IO1 BSC198 # Note: this pin is specified as I/O. If AS mode is specified by MSEL it is output only (ASDO)
+salias IO2 BSC197 # Note: this pin is specified as I/O. If AS mode is specified by MSEL it is output only (nCSO)
+salias IO3 BSC196
+salias IO4 BSC195
+# BSC194 # unused pad
+# BSC193 # unused pad
+# BSC192 # unused pad
+# BSC191 # unused pad
+# BSC190 # unused pad
+# BSC189 # unused pad
+salias IO7 BSC188
+# BSC187 # unused pad
+# BSC186 # unused pad
+# BSC185 # unused pad
+# BSC184 # unused pad
+# BSC183 # unused pad
+# BSC182 # unused pad
+# BSC181 # unused pad
+salias IO8 BSC180
+salias IO9 BSC179
+salias DATA0 BSC178 # Family-specific input pin 14
+salias DCLK BSC177 # Family-specific input pin 15
+# nCE BSC176 # untestable Family-specific pin 16
+salias CLK0 BSC175 # Family-specific input pin 17
+salias CLK1 BSC174 # Family-specific input pin 18
+# nCONFIG BSC173 # untestable Family-specific pin 20
+salias CLK2 BSC172 # Family-specific input pin 21
+salias CLK3 BSC171 # Family-specific input pin 22
+salias IO24 BSC170
+salias IO25 BSC169
+# BSC168 # unused pad
+# BSC167 # unused pad
+# BSC166 # unused pad
+# BSC165 # unused pad
+# BSC164 # unused pad
+salias IO28 BSC163
+# BSC162 # unused pad
+# BSC161 # unused pad
+# BSC160 # unused pad
+# BSC159 # unused pad
+# BSC158 # unused pad
+# BSC157 # unused pad
+# BSC156 # unused pad
+# BSC155 # unused pad
+# BSC154 # unused pad
+# BSC153 # unused pad
+# BSC152 # unused pad
+salias IO30 BSC151
+salias IO31 BSC150
+salias IO32 BSC149
+salias IO40 BSC148
+salias IO41 BSC147
+salias IO42 BSC146
+salias IO43 BSC145
+salias IO44 BSC144
+salias IO45 BSC143
+salias IO47 BSC142
+salias IO48 BSC141
+# BSC140 # unused pad
+# BSC139 # unused pad
+# BSC138 # unused pad
+# BSC137 # unused pad
+# BSC136 # unused pad
+# BSC135 # unused pad
+# BSC134 # unused pad
+salias IO51 BSC133
+salias IO52 BSC132
+# BSC131 # unused pad
+# BSC130 # unused pad
+# BSC129 # unused pad
+salias IO53 BSC128
+salias IO55 BSC127
+salias IO57 BSC126
+salias IO58 BSC125
+salias IO59 BSC124
+salias IO60 BSC123
+# BSC122 # unused pad
+# BSC121 # unused pad
+# BSC120 # unused pad
+# BSC119 # unused pad
+# BSC118 # unused pad
+# BSC117 # unused pad
+# BSC116 # unused pad
+# BSC115 # unused pad
+# BSC114 # unused pad
+salias IO63 BSC113
+# BSC112 # unused pad
+# BSC111 # unused pad
+salias IO64 BSC110
+salias IO65 BSC109
+# BSC108 # unused pad
+# BSC107 # unused pad
+salias IO67 BSC106
+salias IO69 BSC105
+salias IO70 BSC104
+salias IO71 BSC103
+salias IO72 BSC102
+salias IO73 BSC101
+salias IO74 BSC100
+# BSC099 # unused pad
+# BSC098 # unused pad
+salias IO75 BSC097
+salias IO76 BSC096
+# BSC095 # unused pad
+# BSC094 # unused pad
+# BSC093 # unused pad
+# BSC092 # unused pad
+# BSC091 # unused pad
+# BSC090 # unused pad
+# BSC089 # unused pad
+salias IO79 BSC088
+# BSC087 # unused pad
+# BSC086 # unused pad
+# BSC085 # unused pad
+# BSC084 # unused pad
+# BSC083 # unused pad
+# BSC082 # unused pad
+# nSTATUS BSC081 # untestable Family-specific pin 82
+# CONF_DONE BSC080 # untestable Family-specific pin 83
+salias MSEL1 BSC079 # Family-specific input pin 84
+salias MSEL0 BSC078 # Family-specific input pin 85
+salias IO86 BSC077
+salias IO87 BSC076
+salias CLK7 BSC075 # Family-specific input pin 88
+salias CLK6 BSC074 # Family-specific input pin 89
+salias CLK5 BSC073 # Family-specific input pin 90
+salias CLK4 BSC072 # Family-specific input pin 91
+salias IO92 BSC071
+salias IO93 BSC070
+salias IO94 BSC069
+salias IO96 BSC068
+salias IO97 BSC067
+# BSC066 # unused pad
+# BSC065 # unused pad
+# BSC064 # unused pad
+# BSC063 # unused pad
+# BSC062 # unused pad
+# BSC061 # unused pad
+# BSC060 # unused pad
+salias IO99 BSC059
+# BSC058 # unused pad
+# BSC057 # unused pad
+# BSC056 # unused pad
+# BSC055 # unused pad
+# BSC054 # unused pad
+salias IO100 BSC053
+salias IO101 BSC052
+# BSC051 # unused pad
+# BSC050 # unused pad
+salias IO103 BSC049
+salias IO104 BSC048
+salias IO112 BSC047
+salias IO113 BSC046
+salias IO114 BSC045
+salias IO115 BSC044
+# BSC043 # unused pad
+# BSC042 # unused pad
+salias IO118 BSC041
+salias IO119 BSC040
+salias IO120 BSC039
+salias IO121 BSC038
+salias IO122 BSC037
+# BSC036 # unused pad
+# BSC035 # unused pad
+# BSC034 # unused pad
+# BSC033 # unused pad
+# BSC032 # unused pad
+# BSC031 # unused pad
+# BSC030 # unused pad
+salias IO125 BSC029
+salias IO126 BSC028
+# BSC027 # unused pad
+# BSC026 # unused pad
+# BSC025 # unused pad
+# BSC024 # unused pad
+# BSC023 # unused pad
+salias IO129 BSC022
+# BSC021 # unused pad
+# BSC020 # unused pad
+# BSC019 # unused pad
+# BSC018 # unused pad
+salias IO132 BSC017
+salias IO133 BSC016
+salias IO134 BSC015
+# BSC014 # unused pad
+# BSC013 # unused pad
+# BSC012 # unused pad
+# BSC011 # unused pad
+# BSC010 # unused pad
+# BSC009 # unused pad
+# BSC008 # unused pad
+salias IO135 BSC007
+salias IO136 BSC006
+salias IO137 BSC005
+salias IO139 BSC004
+salias IO141 BSC003
+salias IO142 BSC002
+salias IO143 BSC001
+salias IO144 BSC000
--- /dev/null
+#
+# $Id$
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Arnim Laeuger <arniml@users.sourceforge.net>
+#
+
+# bits 31-28 of the Device Identification Register
+0001 epm3064a 1
--- /dev/null
+#
+# $Id$
+#
+# JTAG declarations for EPM3064A
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Arnim Laeuger <arniml@users.sourceforge.net>
+#
+# Note:
+# The signals defined in this file are generic for any EPM3064A.
+# Signalnames according to Altera's package tables are set in the
+# package specific scripts.
+#
+
+register BYPASS 1
+register BSR 192
+register DEVICE_ID 32
+register USERCODE 32
+
+instruction length 10
+instruction BYPASS 1111111111 BYPASS
+instruction IDCODE 0001011001 DEVICE_ID
+instruction USERCODE 0000000111 USERCODE
+instruction SAMPLE/PRELOAD 0001010101 BSR
+instruction EXTEST 0000000000 BSR
+
+signal BSC0
+signal BSC1
+signal BSC10
+signal BSC11
+signal BSC12
+signal BSC13
+signal BSC14
+signal BSC15
+signal BSC16
+signal BSC17
+signal BSC18
+signal BSC19
+signal BSC2
+signal BSC20
+signal BSC21
+signal BSC22
+signal BSC23
+signal BSC24
+signal BSC25
+signal BSC26
+signal BSC27
+signal BSC28
+signal BSC29
+signal BSC3
+signal BSC30
+signal BSC31
+signal BSC32
+signal BSC33
+signal BSC34
+signal BSC35
+signal BSC36
+signal BSC37
+signal BSC38
+signal BSC39
+signal BSC4
+signal BSC40
+signal BSC41
+signal BSC42
+signal BSC43
+signal BSC44
+signal BSC45
+signal BSC46
+signal BSC47
+signal BSC48
+signal BSC49
+signal BSC5
+signal BSC50
+signal BSC51
+signal BSC52
+signal BSC53
+signal BSC54
+signal BSC55
+signal BSC56
+signal BSC57
+signal BSC58
+signal BSC59
+signal BSC6
+signal BSC60
+signal BSC61
+signal BSC62
+signal BSC63
+signal BSC7
+signal BSC8
+signal BSC9
+
+bit 0 I ? BSC0
+bit 1 X ? *
+bit 2 X ? *
+bit 3 I ? BSC1
+bit 4 X ? *
+bit 5 X ? *
+bit 6 I ? BSC2
+bit 7 C 0 *
+bit 8 O ? BSC2 7 0 Z
+bit 9 I ? BSC3
+bit 10 C 0 *
+bit 11 O ? BSC3 10 0 Z
+bit 12 I ? BSC4
+bit 13 C 0 *
+bit 14 O ? BSC4 13 0 Z
+bit 15 I ? BSC5
+bit 16 C 0 *
+bit 17 O ? BSC5 16 0 Z
+bit 18 I ? BSC6
+bit 19 C 0 *
+bit 20 O ? BSC6 19 0 Z
+bit 21 I ? BSC7
+bit 22 C 0 *
+bit 23 O ? BSC7 22 0 Z
+bit 24 I ? BSC8
+bit 25 C 0 *
+bit 26 O ? BSC8 25 0 Z
+bit 27 I ? BSC9
+bit 28 C 0 *
+bit 29 O ? BSC9 28 0 Z
+bit 30 I ? BSC10
+bit 31 C 0 *
+bit 32 O ? BSC10 31 0 Z
+bit 33 I ? BSC11
+bit 34 C 0 *
+bit 35 O ? BSC11 34 0 Z
+bit 36 I ? BSC12
+bit 37 C 0 *
+bit 38 O ? BSC12 37 0 Z
+bit 39 I ? BSC13
+bit 40 C 0 *
+bit 41 O ? BSC13 40 0 Z
+bit 42 I ? BSC14
+bit 43 C 0 *
+bit 44 O ? BSC14 43 0 Z
+bit 45 I ? BSC15
+bit 46 C 0 *
+bit 47 O ? BSC15 46 0 Z
+bit 48 I ? BSC16
+bit 49 C 0 *
+bit 50 O ? BSC16 49 0 Z
+bit 51 I ? BSC17
+bit 52 C 0 *
+bit 53 O ? BSC17 52 0 Z
+bit 54 I ? BSC18
+bit 55 C 0 *
+bit 56 O ? BSC18 55 0 Z
+bit 57 I ? BSC19
+bit 58 C 0 *
+bit 59 O ? BSC19 58 0 Z
+bit 60 I ? BSC20
+bit 61 C 0 *
+bit 62 O ? BSC20 61 0 Z
+bit 63 I ? BSC21
+bit 64 C 0 *
+bit 65 O ? BSC21 64 0 Z
+bit 66 I ? BSC22
+bit 67 C 0 *
+bit 68 O ? BSC22 67 0 Z
+bit 69 I ? BSC23
+bit 70 C 0 *
+bit 71 O ? BSC23 70 0 Z
+bit 72 I ? BSC24
+bit 73 C 0 *
+bit 74 O ? BSC24 73 0 Z
+bit 75 I ? BSC25
+bit 76 C 0 *
+bit 77 O ? BSC25 76 0 Z
+bit 78 I ? BSC26
+bit 79 C 0 *
+bit 80 O ? BSC26 79 0 Z
+bit 81 I ? BSC27
+bit 82 C 0 *
+bit 83 O ? BSC27 82 0 Z
+bit 84 I ? BSC28
+bit 85 C 0 *
+bit 86 O ? BSC28 85 0 Z
+bit 87 I ? BSC29
+bit 88 C 0 *
+bit 89 O ? BSC29 88 0 Z
+bit 90 I ? BSC30
+bit 91 C 0 *
+bit 92 O ? BSC30 91 0 Z
+bit 93 I ? BSC31
+bit 94 C 0 *
+bit 95 O ? BSC31 94 0 Z
+bit 96 I ? BSC32
+bit 97 C 0 *
+bit 98 O ? BSC32 97 0 Z
+bit 99 I ? BSC33
+bit 100 C 0 *
+bit 101 O ? BSC33 100 0 Z
+bit 102 I ? BSC34
+bit 103 C 0 *
+bit 104 O ? BSC34 103 0 Z
+bit 105 I ? BSC35
+bit 106 C 0 *
+bit 107 O ? BSC35 106 0 Z
+bit 108 I ? BSC36
+bit 109 C 0 *
+bit 110 O ? BSC36 109 0 Z
+bit 111 I ? BSC37
+bit 112 C 0 *
+bit 113 O ? BSC37 112 0 Z
+bit 114 I ? BSC38
+bit 115 C 0 *
+bit 116 O ? BSC38 115 0 Z
+bit 117 I ? BSC39
+bit 118 C 0 *
+bit 119 O ? BSC39 118 0 Z
+bit 120 I ? BSC40
+bit 121 C 0 *
+bit 122 O ? BSC40 121 0 Z
+bit 123 I ? BSC41
+bit 124 C 0 *
+bit 125 O ? BSC41 124 0 Z
+bit 126 I ? BSC42
+bit 127 C 0 *
+bit 128 O ? BSC42 127 0 Z
+bit 129 I ? BSC43
+bit 130 C 0 *
+bit 131 O ? BSC43 130 0 Z
+bit 132 I ? BSC44
+bit 133 C 0 *
+bit 134 O ? BSC44 133 0 Z
+bit 135 I ? BSC45
+bit 136 C 0 *
+bit 137 O ? BSC45 136 0 Z
+bit 138 I ? BSC46
+bit 139 C 0 *
+bit 140 O ? BSC46 139 0 Z
+bit 141 I ? BSC47
+bit 142 C 0 *
+bit 143 O ? BSC47 142 0 Z
+bit 144 I ? BSC48
+bit 145 C 0 *
+bit 146 O ? BSC48 145 0 Z
+bit 147 I ? BSC49
+bit 148 C 0 *
+bit 149 O ? BSC49 148 0 Z
+bit 150 I ? BSC50
+bit 151 C 0 *
+bit 152 O ? BSC50 151 0 Z
+bit 153 I ? BSC51
+bit 154 C 0 *
+bit 155 O ? BSC51 154 0 Z
+bit 156 I ? BSC52
+bit 157 C 0 *
+bit 158 O ? BCS52 157 0 Z
+bit 159 I ? BSC53
+bit 160 C 0 *
+bit 161 O ? BSC53 160 0 Z
+bit 162 I ? BSC54
+bit 163 C 0 *
+bit 164 O ? BSC54 163 0 Z
+bit 165 I ? BSC55
+bit 166 C 0 *
+bit 167 O ? BSC55 166 0 Z
+bit 168 I ? BSC56
+bit 169 C 0 *
+bit 170 O ? BSC56 169 0 Z
+bit 171 I ? BSC57
+bit 172 C 0 *
+bit 173 O ? BSC57 172 0 Z
+bit 174 I ? BSC58
+bit 175 C 0 *
+bit 176 O ? BSC58 175 0 Z
+bit 177 I ? BSC59
+bit 178 C 0 *
+bit 179 O ? BSC59 178 0 Z
+bit 180 I ? BSC60
+bit 181 C 0 *
+bit 182 O ? BSC60 181 0 Z
+bit 183 I ? BSC61
+bit 184 C 0 *
+bit 185 O ? BSC61 184 0 Z
+bit 186 I ? BSC62
+bit 187 X ? *
+bit 188 X ? *
+bit 189 I ? BSC63
+bit 190 X ? *
+bit 191 X ? *
--- /dev/null
+#
+# $Id$
+#
+# JTAG package script for EPM3064AL44
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Arnim Laeuger <arniml@users.sourceforge.net>
+#
+
+salias IN44 BSC0
+salias IN43 BSC1
+salias IO41 BSC2
+salias IO40 BSC4
+salias IO39 BSC9
+salias IO37 BSC12
+salias IO34 BSC14
+salias IO33 BSC16
+salias IO31 BSC18
+salias IO29 BSC23
+salias IO28 BSC24
+salias IO27 BSC27
+salias IO26 BSC28
+salias IO25 BSC29
+salias IO24 BSC31
+salias IO21 BSC32
+salias IO20 BSC34
+salias IO19 BSC35
+salias IO18 BSC36
+salias IO16 BSC40
+salias IO14 BSC45
+salias IO12 BSC47
+salias IO11 BSC49
+salias IO9 BSC50
+salias IO8 BSC51
+salias IO6 BSC56
+salias IO5 BSC59
+salias IO4 BSC61
+salias IN2 BSC62
+salias IN1 BSC63
--- /dev/null
+#
+# $Id$
+#
+# JTAG package script for EPM3064AT100
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Arnim Laeuger <arniml@users.sourceforge.net>
+#
+
+salias IN88 BSC0
+salias IN87 BSC1
+salias IO85 BSC2
+salias IO84 BSC3
+salias IO83 BSC4
+salias IO81 BSC5
+salias IO80 BSC6
+salias IO79 BSC7
+salias IO76 BSC8
+salias IO75 BSC9
+salias IO71 BSC10
+salias IO69 BSC11
+salias IO68 BSC12
+salias IO67 BSC13
+salias IO64 BSC15
+salias IO63 BSC16
+salias IO61 BSC17
+salias IO60 BSC18
+salias IO58 BSC19
+salias IO57 BSC20
+salias IO56 BSC21
+salias IO54 BSC22
+salias IO52 BSC23
+salias IO48 BSC24
+salias IO47 BSC25
+salias IO46 BSC26
+salias IO45 BSC27
+salias IO44 BSC28
+salias IO42 BSC29
+salias IO41 BSC30
+salias IO40 BSC31
+salias IO37 BSC32
+salias IO36 BSC33
+salias IO35 BSC34
+salias IO32 BSC36
+salias IO31 BSC37
+salias IO30 BSC38
+salias IO29 BSC39
+salias IO25 BSC40
+salias IO23 BSC41
+salias IO21 BSC42
+salias IO20 BSC43
+salias IO19 BSC44
+salias IO17 BSC45
+salias IO16 BSC46
+salias IO14 BSC47
+salias IO13 BSC48
+salias IO12 BSC49
+salias IO10 BSC50
+salias IO9 BSC51
+salias IO8 BSC52
+salias IO6 BSC53
+salias IO100 BSC54
+salias IO99 BSC55
+salias IO98 BSC56
+salias IO97 BSC57
+salias IO96 BSC58
+salias IO94 BSC59
+salias IO93 BSC60
+salias IO92 BSC61
+salias IN90 BSC62
+salias IN89 BSC63
--- /dev/null
+#
+# $Id$
+#
+# JTAG package script for EPM3064AT44
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Arnim Laeuger <arniml@users.sourceforge.net>
+#
+
+salias IN38 BSC0
+salias IN37 BSC1
+salias IO35 BSC2
+salias IO34 BSC4
+salias IO33 BSC9
+salias IO31 BSC12
+salias IO28 BSC14
+salias IO27 BSC16
+salias IO25 BSC18
+salias IO23 BSC23
+salias IO22 BSC24
+salias IO21 BSC27
+salias IO20 BSC28
+salias IO19 BSC29
+salias IO18 BSC31
+salias IO15 BSC32
+salias IO14 BSC34
+salias IO13 BSC35
+salias IO12 BSC36
+salias IO10 BSC40
+salias IO8 BSC45
+salias IO6 BSC47
+salias IO5 BSC49
+salias IO3 BSC50
+salias IO2 BSC51
+salias IO44 BSC56
+salias IO43 BSC59
+salias IO42 BSC61
+salias IN40 BSC62
+salias IN39 BSC63
--- /dev/null
+#
+# $Id$
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Rojhalat Ibrahim <ibrahim@schenk.isar.de>
+#
+
+# bits 31-28 of the Device Identification Register
+0001 epm7128aetc100 1
--- /dev/null
+#
+# $Id$
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Rojhalat Ibrahim <ibrahim@schenk.isar.de>
+#
+
+signal tdi
+signal tck
+signal tms
+signal tdo
+signal IO1
+signal IO2
+signal IO5
+signal IO6
+signal IO7
+signal IO8
+signal IO9
+signal IO10
+signal IO12
+signal IO13
+signal IO14
+signal IO16
+signal IO17
+signal IO19
+signal IO20
+signal IO21
+signal IO22
+signal IO23
+signal IO24
+signal IO25
+signal IO27
+signal IO28
+signal IO29
+signal IO30
+signal IO31
+signal IO32
+signal IO33
+signal IO35
+signal IO36
+signal IO37
+signal IO40
+signal IO41
+signal IO42
+signal IO44
+signal IO45
+signal IO46
+signal IO47
+signal IO48
+signal IO49
+signal IO50
+signal IO52
+signal IO53
+signal IO54
+signal IO55
+signal IO56
+signal IO57
+signal IO58
+signal IO60
+signal IO61
+signal IO63
+signal IO64
+signal IO65
+signal IO67
+signal IO68
+signal IO69
+signal IO70
+signal IO71
+signal IO72
+signal IO75
+signal IO76
+signal IO77
+signal IO78
+signal IO79
+signal IO80
+signal IO81
+signal IO83
+signal IO84
+signal IO85
+signal IN87
+signal IN88
+signal IN89
+signal IN90
+signal IO92
+signal IO93
+signal IO94
+signal IO96
+signal IO97
+signal IO98
+signal IO99
+signal IO100
+
+
+# mandatory data registers
+register BSR 288
+register BR 1
+
+# optional data registers
+register DIR 32
+
+# instructions
+instruction length 10
+
+# mandatory instructions
+instruction EXTEST 0000000000 BSR
+instruction SAMPLE/PRELOAD 0001010101 BSR
+instruction BYPASS 1111111111 BR
+instruction IDCODE 0001011001 DIR
+instruction USERCODE 0000000111 DIR
+
+
+bit 287 O 1 *
+bit 286 O 1 *
+bit 285 I 1 IN89
+bit 284 O 1 *
+bit 283 O 1 *
+bit 282 I 1 IN90
+bit 281 O 1 IO92 280 0 Z
+bit 280 C 0 *
+bit 279 I 1 IO92
+bit 278 O 1 IO93 277 0 Z
+bit 277 C 0 *
+bit 276 I 1 IO93
+bit 275 O 1 IO94 274 0 Z
+bit 274 C 0 *
+bit 273 I 1 IO94
+bit 272 O 1 *
+bit 271 O 0 *
+bit 270 O 1 *
+bit 269 O 1 IO96 268 0 Z
+bit 268 C 0 *
+bit 267 I 1 IO96
+bit 266 O 1 IO97 265 0 Z
+bit 265 C 0 *
+bit 264 I 1 IO97
+bit 263 O 1 IO98 262 0 Z
+bit 262 C 0 *
+bit 261 I 1 IO98
+bit 260 O 1 IO99 259 0 Z
+bit 259 C 0 *
+bit 258 I 1 IO99
+bit 257 O 1 IO100 256 0 Z
+bit 256 C 0 *
+bit 255 I 1 IO100
+bit 254 O 1 *
+bit 253 O 0 *
+bit 252 O 1 *
+bit 251 O 1 IO1 250 0 Z
+bit 250 C 0 *
+bit 249 I 1 IO1
+bit 248 O 1 IO2 247 0 Z
+bit 247 C 0 *
+bit 246 I 1 IO2
+bit 245 O 1 IO5 244 0 Z
+bit 244 C 0 *
+bit 243 I 1 IO5
+bit 242 O 1 IO6 241 0 Z
+bit 241 C 0 *
+bit 240 I 1 IO6
+bit 239 O 1 *
+bit 238 O 0 *
+bit 237 O 1 *
+bit 236 O 1 IO7 235 0 Z
+bit 235 C 0 *
+bit 234 I 1 IO7
+bit 233 O 1 IO8 232 0 Z
+bit 232 C 0 *
+bit 231 I 1 IO8
+bit 230 O 1 IO9 229 0 Z
+bit 229 C 0 *
+bit 228 I 1 IO9
+bit 227 O 1 IO10 226 0 Z
+bit 226 C 0 *
+bit 225 I 1 IO10
+bit 224 O 1 IO12 223 0 Z
+bit 223 C 0 *
+bit 222 I 1 IO12
+bit 221 O 1 *
+bit 220 O 0 *
+bit 219 O 1 *
+bit 218 O 1 IO13 217 0 Z
+bit 217 C 0 *
+bit 216 I 1 IO13
+bit 215 O 1 IO14 214 0 Z
+bit 214 C 0 *
+bit 213 I 1 IO14
+bit 212 O 1 IO16 211 0 Z
+bit 211 C 0 *
+bit 210 I 1 IO16
+bit 209 O 1 IO17 208 0 Z
+bit 208 C 0 *
+bit 207 I 1 IO17
+bit 206 O 1 *
+bit 205 O 0 *
+bit 204 O 1 *
+bit 203 O 1 IO19 202 0 Z
+bit 202 C 0 *
+bit 201 I 1 IO19
+bit 200 O 1 IO20 199 0 Z
+bit 199 C 0 *
+bit 198 I 1 IO20
+bit 197 O 1 IO21 196 0 Z
+bit 196 C 0 *
+bit 195 I 1 IO21
+bit 194 O 1 IO22 193 0 Z
+bit 193 C 0 *
+bit 192 I 1 IO22
+bit 191 O 1 IO23 190 0 Z
+bit 190 C 0 *
+bit 189 I 1 IO23
+bit 188 O 1 *
+bit 187 O 0 *
+bit 186 O 1 *
+bit 185 O 1 IO24 184 0 Z
+bit 184 C 0 *
+bit 183 I 1 IO24
+bit 182 O 1 IO25 181 0 Z
+bit 181 C 0 *
+bit 180 I 1 IO25
+bit 179 O 1 IO27 178 0 Z
+bit 178 C 0 *
+bit 177 I 1 IO27
+bit 176 O 1 IO28 175 0 Z
+bit 175 C 0 *
+bit 174 I 1 IO28
+bit 173 O 1 IO29 172 0 Z
+bit 172 C 0 *
+bit 171 I 1 IO29
+bit 170 O 1 *
+bit 169 O 0 *
+bit 168 O 1 *
+bit 167 O 1 IO30 166 0 Z
+bit 166 C 0 *
+bit 165 I 1 IO30
+bit 164 O 1 IO31 163 0 Z
+bit 163 C 0 *
+bit 162 I 1 IO31
+bit 161 O 1 IO32 160 0 Z
+bit 160 C 0 *
+bit 159 I 1 IO32
+bit 158 O 1 IO33 157 0 Z
+bit 157 C 0 *
+bit 156 I 1 IO33
+bit 155 O 1 IO35 154 0 Z
+bit 154 C 0 *
+bit 153 I 1 IO35
+bit 152 O 1 *
+bit 151 O 0 *
+bit 150 O 1 *
+bit 149 O 1 IO36 148 0 Z
+bit 148 C 0 *
+bit 147 I 1 IO36
+bit 146 O 1 IO37 145 0 Z
+bit 145 C 0 *
+bit 144 I 1 IO37
+bit 143 O 1 IO40 142 0 Z
+bit 142 C 0 *
+bit 141 I 1 IO40
+bit 140 O 1 IO41 139 0 Z
+bit 139 C 0 *
+bit 138 I 1 IO41
+bit 137 O 1 *
+bit 136 O 0 *
+bit 135 O 1 *
+bit 134 O 1 IO42 133 0 Z
+bit 133 C 0 *
+bit 132 I 1 IO42
+bit 131 O 1 IO44 130 0 Z
+bit 130 C 0 *
+bit 129 I 1 IO44
+bit 128 O 1 IO45 127 0 Z
+bit 127 C 0 *
+bit 126 I 1 IO45
+bit 125 O 1 IO46 124 0 Z
+bit 124 C 0 *
+bit 123 I 1 IO46
+bit 122 O 1 IO47 121 0 Z
+bit 121 C 0 *
+bit 120 I 1 IO47
+bit 119 O 1 *
+bit 118 O 0 *
+bit 117 O 1 *
+bit 116 O 1 IO48 115 0 Z
+bit 115 C 0 *
+bit 114 I 1 IO48
+bit 113 O 1 IO49 112 0 Z
+bit 112 C 0 *
+bit 111 I 1 IO49
+bit 110 O 1 IO50 109 0 Z
+bit 109 C 0 *
+bit 108 I 1 IO50
+bit 107 O 1 IO52 106 0 Z
+bit 106 C 0 *
+bit 105 I 1 IO52
+bit 104 O 1 IO53 103 0 Z
+bit 103 C 0 *
+bit 102 I 1 IO53
+bit 101 O 1 *
+bit 100 O 0 *
+bit 99 O 1 *
+bit 98 O 1 IO54 97 0 Z
+bit 97 C 0 *
+bit 96 I 1 IO54
+bit 95 O 1 IO55 94 0 Z
+bit 94 C 0 *
+bit 93 I 1 IO55
+bit 92 O 1 IO56 91 0 Z
+bit 91 C 0 *
+bit 90 I 1 IO56
+bit 89 O 1 IO57 88 0 Z
+bit 88 C 0 *
+bit 87 I 1 IO57
+bit 86 O 1 IO58 85 0 Z
+bit 85 C 0 *
+bit 84 I 1 IO58
+bit 83 O 1 *
+bit 82 O 0 *
+bit 81 O 1 *
+bit 80 O 1 IO60 79 0 Z
+bit 79 C 0 *
+bit 78 I 1 IO60
+bit 77 O 1 IO61 76 0 Z
+bit 76 C 0 *
+bit 75 I 1 IO61
+bit 74 O 1 IO63 73 0 Z
+bit 73 C 0 *
+bit 72 I 1 IO63
+bit 71 O 1 IO64 70 0 Z
+bit 70 C 0 *
+bit 69 I 1 IO64
+bit 68 O 1 *
+bit 67 O 0 *
+bit 66 O 1 *
+bit 65 O 1 IO65 64 0 Z
+bit 64 C 0 *
+bit 63 I 1 IO65
+bit 62 O 1 IO67 61 0 Z
+bit 61 C 0 *
+bit 60 I 1 IO67
+bit 59 O 1 IO68 58 0 Z
+bit 58 C 0 *
+bit 57 I 1 IO68
+bit 56 O 1 IO69 55 0 Z
+bit 55 C 0 *
+bit 54 I 1 IO69
+bit 53 O 1 IO70 52 0 Z
+bit 52 C 0 *
+bit 51 I 1 IO70
+bit 50 O 1 *
+bit 49 O 0 *
+bit 48 O 1 *
+bit 47 O 1 IO71 46 0 Z
+bit 46 C 0 *
+bit 45 I 1 IO71
+bit 44 O 1 IO72 43 0 Z
+bit 43 C 0 *
+bit 42 I 1 IO72
+bit 41 O 1 IO75 40 0 Z
+bit 40 C 0 *
+bit 39 I 1 IO75
+bit 38 O 1 IO76 37 0 Z
+bit 37 C 0 *
+bit 36 I 1 IO76
+bit 35 O 1 *
+bit 34 O 0 *
+bit 33 O 1 *
+bit 32 O 1 IO77 31 0 Z
+bit 31 C 0 *
+bit 30 I 1 IO77
+bit 29 O 1 IO78 28 0 Z
+bit 28 C 0 *
+bit 27 I 1 IO78
+bit 26 O 1 IO79 25 0 Z
+bit 25 C 0 *
+bit 24 I 1 IO79
+bit 23 O 1 IO80 22 0 Z
+bit 22 C 0 *
+bit 21 I 1 IO80
+bit 20 O 1 IO81 19 0 Z
+bit 19 C 0 *
+bit 18 I 1 IO81
+bit 17 O 1 *
+bit 16 O 0 *
+bit 15 O 1 *
+bit 14 O 1 IO83 13 0 Z
+bit 13 C 0 *
+bit 12 I 1 IO83
+bit 11 O 1 IO84 10 0 Z
+bit 10 C 0 *
+bit 9 I 1 IO84
+bit 8 O 1 IO85 7 0 Z
+bit 7 C 0 *
+bit 6 I 1 IO85
+bit 5 O 1 *
+bit 4 O 1 *
+bit 3 I 1 IN87
+bit 2 O 1 *
+bit 1 O 1 *
+bit 0 I 1 IN88
+
--- /dev/null
+#
+# $Id: PARTS,v 1.1.1.1 2005/03/18 15:02:50 klingler Exp $
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Richard Klingler <richard@klingler.net>
+#
+
+# bits 27-12 of the Device Identification Register
+0010011110100111 sharc21065l SHARC
+0010011111101000 bf518 BF518
+0010011111100100 bf527 BF526
+0010011111100000 bf527 BF527
+0010011110100101 bf533 BF533
+0010011111000110 bf537 BF534
+0010011111001000 bf537 BF537
+0010011111000100 bf538 BF538
+0010011111011110 bf548 BF548
+0010011111101010 bf548 BF548M
+0010011110111011 bf561 BF561
--- /dev/null
+#
+# $Id: STEPPINGS 75 2005-11-11 09:12:34Z jiez $
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+#
+
+# bits 31-28 of the Device Identification Register
+0000 bf518 0
--- /dev/null
+signal ADDR1
+signal ADDR2
+signal ADDR3
+signal ADDR4
+signal ADDR5
+signal ADDR6
+signal ADDR7
+signal ADDR8
+signal ADDR9
+signal ADDR10
+signal ADDR11
+signal ADDR12
+signal ADDR13
+signal ADDR14
+signal ADDR15
+signal ADDR16
+signal ADDR17
+signal ADDR18
+signal ADDR19
+signal DATA0
+signal DATA1
+signal DATA2
+signal DATA3
+signal DATA4
+signal DATA5
+signal DATA6
+signal DATA7
+signal DATA8
+signal DATA9
+signal DATA10
+signal DATA11
+signal DATA12
+signal DATA13
+signal DATA14
+signal DATA15
+signal PF0
+signal PF1
+signal PF2
+signal PF3
+signal PF4
+signal PF5
+signal PF6
+signal PF7
+signal PF8
+signal PF9
+signal PF10
+signal PF11
+signal PF12
+signal PF13
+signal PF14
+signal PF15
+signal PG0
+signal PG1
+signal PG2
+signal PG3
+signal PG4
+signal PG5
+signal PG6
+signal PG7
+signal PG8
+signal PG9
+signal PG10
+signal PG11
+signal PG12
+signal PG13
+signal PG14
+signal PG15
+signal PH0
+signal PH1
+signal PH2
+signal PH3
+signal PH4
+signal PH5
+signal PH6
+signal PH7
+signal PH8
+signal PH9
+signal PH10
+signal PH11
+signal PH12
+signal PH13
+signal PH14
+signal PH15
+signal BMODE0
+signal BMODE1
+signal BMODE2
+signal BMODE3
+signal PJ1
+signal PJ0
+signal PJ2
+signal PJ3
+signal NMI_B
+signal RESET_B
+signal CLKOUT
+signal AMS_B0
+signal AMS_B1
+signal AMS_B2
+signal AMS_B3
+signal AOE_B
+signal ARE_B
+signal AWE_B
+signal ARDY
+signal SCKE
+signal SMS_B
+signal SRAS_B
+signal SCAS_B
+signal SWE_B
+signal SA10
+signal ABE_B0
+signal ABE_B1
+signal TCK
+signal TDI
+signal TDO
+signal TMS
+signal TRST_B
+signal GND0
+signal GND1
+signal GND2
+signal GND3
+signal GND4
+signal GND5
+signal GND6
+signal GND7
+signal GND8
+signal GND9
+signal GND10
+signal GND11
+signal GND12
+signal GND13
+signal GND14
+signal GND15
+signal GND16
+signal GND17
+signal GND18
+signal GND19
+signal GND20
+signal GND21
+signal GND22
+signal GND23
+signal GND24
+signal GND25
+signal GND26
+signal GND27
+signal GND28
+signal GND29
+signal GND30
+signal GND31
+signal GND32
+signal GND33
+signal GND34
+signal GND35
+signal GND36
+signal GND37
+signal GND38
+signal GND39
+signal GND40
+signal GND41
+signal GND42
+signal GND43
+signal GND44
+signal GND45
+signal GND46
+signal GND47
+signal GND48
+signal GND49
+signal GND50
+signal GND51
+signal GND52
+signal GND53
+signal GND54
+signal VDDOTP
+signal OTPVPP
+signal USB_ID
+signal USB_RSET
+signal VDDUSB0
+signal VDDUSB1
+signal USB_VREF
+signal USB_XTALIN
+signal USB_XTALOUT
+signal VDDEXT0
+signal VDDEXT1
+signal VDDEXT2
+signal VDDEXT3
+signal VDDEXT4
+signal VDDEXT5
+signal VDDEXT6
+signal VDDEXT7
+signal VDDEXT8
+signal VDDEXT9
+signal VDDEXT10
+signal VDDEXT11
+signal VDDEXT12
+signal VDDEXT13
+signal VDDEXT14
+signal VDDEXT15
+signal VDDEXT16
+signal VDDEXT17
+signal VDDEXT18
+signal VDDEXT19
+signal RTXI
+signal RTXO
+signal SSPG
+signal CLKIN
+signal VROUT
+signal EXT_WAKE
+signal USB_DM
+signal USB_DP
+signal USB_VBUS
+signal CLKBUF
+signal VDDRTC
+signal VDDMEM0
+signal VDDMEM1
+signal VDDMEM2
+signal VDDMEM3
+signal VDDMEM4
+signal VDDMEM5
+signal VDDMEM6
+signal VDDMEM7
+signal VDDMEM8
+signal VDDMEM9
+signal VDDMEM10
+signal VDDMEM11
+signal VDDMEM12
+signal VDDMEM13
+signal VDDMEM14
+signal VDDMEM15
+signal VDDMEM16
+signal VDDMEM17
+signal VDDINT0
+signal VDDINT1
+signal VDDINT2
+signal VDDINT3
+signal VDDINT4
+signal VDDINT5
+signal VDDINT6
+signal VDDINT7
+signal VDDINT8
+signal VDDINT9
+signal VDDINT10
+signal VDDINT11
+signal VDDINT12
+signal VDDINT13
+signal VDDINT14
+signal VDDINT15
+signal VDDINT16
+signal VDDINT17
+signal VDDINT18
+signal VDDINT19
+signal VDDINT20
+signal VDDINT21
+signal VDDINT22
+signal VDDINT23
+signal VDDINT24
+signal VDDINT25
+signal VDDINT26
+signal VDDINT27
+signal VDDINT28
+signal VDDINT29
+signal VDDINT30
+signal VDDINT31
+signal VDDINT32
+signal VRSEL
+signal XTAL
+signal ADCLRC
+signal ADCDAT
+signal DACLRC
+signal DACDAT
+signal BCLK
+signal XTO
+signal XTI_MCLK
+signal LHPOUT
+signal RHPOUT
+signal CSCL
+signal CSDA
+signal CCLKOUT
+signal CSB
+signal CMODE
+signal LLINEIN
+signal LOUT
+signal RLINEIN
+signal ROUT
+signal VMID
+signal MICBIAS
+signal MICIN
+signal AVDD0
+signal AVDD1
+signal AGND0
+signal AGND1
+
+register BSR 233
+register BR 1
+register DIR 32
+register DBGSTAT 16
+register DBGCTL 16
+register EMUIR 32
+register EMUIR64 64
+register EMUDAT 32
+register EMUPC 32
+
+instruction length 5
+
+instruction EXTEST 00000 BSR
+instruction SAMPLE/PRELOAD 10000 BSR
+instruction IDCODE 00010 DIR
+instruction BYPASS 11111 BR
+instruction DBGSTAT_SCAN 01100 DBGSTAT
+instruction DBGCTL_SCAN 00100 DBGCTL
+instruction EMUIR_SCAN 01000 EMUIR
+instruction EMUIR64_SCAN 01000 EMUIR64
+instruction EMUDAT_SCAN 10100 EMUDAT
+instruction EMUPC_SCAN 11110 EMUPC
+
+bit 232 C 0 *
+bit 231 O 1 ADDR14 8 0 Z
+bit 230 O 1 ADDR15 8 0 Z
+bit 229 O 1 ADDR16 8 0 Z
+bit 228 O 1 ADDR17 8 0 Z
+bit 227 O 1 ADDR18 8 0 Z
+bit 226 O 1 ADDR19 8 0 Z
+bit 225 O 1 DATA0 232 0 Z
+bit 224 I 1 DATA0
+bit 223 O 1 DATA1 232 0 Z
+bit 222 I 1 DATA1
+bit 221 O 1 DATA2 232 0 Z
+bit 220 I 1 DATA2
+bit 219 O 1 DATA3 232 0 Z
+bit 218 I 1 DATA3
+bit 217 O 1 DATA4 232 0 Z
+bit 216 I 1 DATA4
+bit 215 O 1 DATA5 232 0 Z
+bit 214 I 1 DATA5
+bit 213 O 1 DATA6 232 0 Z
+bit 212 I 1 DATA6
+bit 211 O 1 DATA7 232 0 Z
+bit 210 I 1 DATA7
+bit 209 O 1 DATA8 232 0 Z
+bit 208 I 1 DATA8
+bit 207 O 1 DATA9 232 0 Z
+bit 206 I 1 DATA9
+bit 205 O 1 DATA10 232 0 Z
+bit 204 I 1 DATA10
+bit 203 O 1 DATA11 232 0 Z
+bit 202 I 1 DATA11
+bit 201 O 1 DATA12 232 0 Z
+bit 200 I 1 DATA12
+bit 199 O 1 DATA13 232 0 Z
+bit 198 I 1 DATA13
+bit 197 O 1 DATA14 232 0 Z
+bit 196 I 1 DATA14
+bit 195 O 1 DATA15 232 0 Z
+bit 194 I 1 DATA15
+bit 193 C 0 *
+bit 192 O 1 PG0 193 0 Z
+bit 191 I 1 PG0
+bit 190 C 0 *
+bit 189 O 1 PG1 190 0 Z
+bit 188 I 1 PG1
+bit 187 C 0 *
+bit 186 O 1 PG2 187 0 Z
+bit 185 I 1 PG2
+bit 184 C 0 *
+bit 183 O 1 PG3 184 0 Z
+bit 182 I 1 PG3
+bit 181 I 1 BMODE0
+bit 180 I 1 BMODE1
+bit 179 I 1 BMODE2
+bit 178 I 1 BMODE3
+bit 177 C 0 *
+bit 176 O 1 PG4 177 0 Z
+bit 175 I 1 PG4
+bit 174 C 0 *
+bit 173 O 1 PG5 174 0 Z
+bit 172 I 1 PG5
+bit 171 C 0 *
+bit 170 O 1 PG6 171 0 Z
+bit 169 I 1 PG6
+bit 168 C 0 *
+bit 167 O 1 PG7 168 0 Z
+bit 166 I 1 PG7
+bit 165 C 0 *
+bit 164 O 1 PG8 165 0 Z
+bit 163 I 1 PG8
+bit 162 C 0 *
+bit 161 O 1 PG9 162 0 Z
+bit 160 I 1 PG9
+bit 159 C 0 *
+bit 158 O 1 PG10 159 0 Z
+bit 157 I 1 PG10
+bit 156 C 0 *
+bit 155 O 1 PG11 156 0 Z
+bit 154 I 1 PG11
+bit 153 C 0 *
+bit 152 O 1 PG12 153 0 Z
+bit 151 I 1 PG12
+bit 150 C 0 *
+bit 149 O 1 PG13 150 0 Z
+bit 148 I 1 PG13
+bit 147 C 0 *
+bit 146 O 1 PG14 147 0 Z
+bit 145 I 1 PG14
+bit 144 C 0 *
+bit 143 O 1 PG15 144 0 Z
+bit 142 I 1 PG15
+bit 141 I 1 PJ1
+bit 140 C 0 *
+bit 139 O 1 PJ0 140 0 Z
+bit 138 I 1 PJ0
+bit 137 C 0 *
+bit 136 O 1 PF0 137 0 Z
+bit 135 I 1 PF0
+bit 134 C 0 *
+bit 133 O 1 PF1 134 0 Z
+bit 132 I 1 PF1
+bit 131 C 0 *
+bit 130 O 1 PF2 131 0 Z
+bit 129 I 1 PF2
+bit 128 C 0 *
+bit 127 O 1 PF3 128 0 Z
+bit 126 I 1 PF3
+bit 125 C 0 *
+bit 124 O 1 PF4 125 0 Z
+bit 123 I 1 PF4
+bit 122 C 0 *
+bit 121 O 1 PF5 122 0 Z
+bit 120 I 1 PF5
+bit 119 C 0 *
+bit 118 O 1 PF6 119 0 Z
+bit 117 I 1 PF6
+bit 116 C 0 *
+bit 115 O 1 PF7 116 0 Z
+bit 114 I 1 PF7
+bit 113 C 0 *
+bit 112 O 1 PF8 113 0 Z
+bit 111 I 1 PF8
+bit 110 C 0 *
+bit 109 O 1 PF9 110 0 Z
+bit 108 I 1 PF9
+bit 107 C 0 *
+bit 106 O 1 PF10 107 0 Z
+bit 105 I 1 PF10
+bit 104 C 0 *
+bit 103 O 1 PF11 104 0 Z
+bit 102 I 1 PF11
+bit 101 O 1 *
+bit 100 O 1 PJ2 100 1 Z
+bit 99 I 1 PJ2
+bit 98 O 1 *
+bit 97 O 1 PJ3 97 1 Z
+bit 96 I 1 PJ3
+bit 95 C 0 *
+bit 94 O 1 PF12 95 0 Z
+bit 93 I 1 PF12
+bit 92 C 0 *
+bit 91 O 1 PF13 92 0 Z
+bit 90 I 1 PF13
+bit 89 C 0 *
+bit 88 O 1 PF14 89 0 Z
+bit 87 I 1 PF14
+bit 86 C 0 *
+bit 85 O 1 PF15 86 0 Z
+bit 84 I 1 PF15
+bit 83 C 0 *
+bit 82 O 1 PH0 83 0 Z
+bit 81 I 1 PH0
+bit 80 C 0 *
+bit 79 O 1 PH1 80 0 Z
+bit 78 I 1 PH1
+bit 77 C 0 *
+bit 76 O 1 PH2 77 0 Z
+bit 75 I 1 PH2
+bit 74 C 0 *
+bit 73 O 1 PH3 74 0 Z
+bit 72 I 1 PH3
+bit 71 C 0 *
+bit 70 O 1 PH4 71 0 Z
+bit 69 I 1 PH4
+bit 68 C 0 *
+bit 67 O 1 PH5 68 0 Z
+bit 66 I 1 PH5
+bit 65 C 0 *
+bit 64 O 1 PH6 65 0 Z
+bit 63 I 1 PH6
+bit 62 C 0 *
+bit 61 O 1 PH7 62 0 Z
+bit 60 I 1 PH7
+bit 59 C 0 *
+bit 58 O 1 PH8 59 0 Z
+bit 57 I 1 PH8
+bit 56 O 0 *
+bit 55 C 0 *
+bit 54 O 1 PH9 55 0 Z
+bit 53 I 1 PH9
+bit 52 C 0 *
+bit 51 O 1 PH10 52 0 Z
+bit 50 I 1 PH10
+bit 49 C 0 *
+bit 48 O 1 PH11 49 0 Z
+bit 47 I 1 PH11
+bit 46 C 0 *
+bit 45 O 1 PH12 46 0 Z
+bit 44 I 1 PH12
+bit 43 C 0 *
+bit 42 O 1 PH13 43 0 Z
+bit 41 I 1 PH13
+bit 40 C 0 *
+bit 39 O 1 PH14 40 0 Z
+bit 38 I 1 PH14
+bit 37 C 0 *
+bit 36 O 1 PH15 37 0 Z
+bit 35 I 1 PH15
+bit 34 I 1 NMI_B
+bit 33 I 1 RESET_B
+bit 32 C 0 *
+bit 31 O 1 CLKOUT 32 0 Z
+bit 30 O 1 AMS_B0 25 0 Z
+bit 29 O 1 AMS_B1 25 0 Z
+bit 28 O 1 AMS_B2 25 0 Z
+bit 27 O 1 AMS_B3 25 0 Z
+bit 26 O 1 AOE_B 25 0 Z
+bit 25 C 0 *
+bit 24 O 1 ARE_B 25 0 Z
+bit 23 O 1 AWE_B 25 0 Z
+bit 22 I 1 ARDY
+bit 21 O 1 SCKE 32 0 Z
+bit 20 O 1 SMS_B 32 0 Z
+bit 19 O 1 SRAS_B 32 0 Z
+bit 18 O 1 SCAS_B 32 0 Z
+bit 17 O 1 SWE_B 32 0 Z
+bit 16 O 1 SA10 32 0 Z
+bit 15 O 1 ABE_B0 8 0 Z
+bit 14 O 1 ABE_B1 8 0 Z
+bit 13 O 1 ADDR1 8 0 Z
+bit 12 O 1 ADDR2 8 0 Z
+bit 11 O 1 ADDR3 8 0 Z
+bit 10 O 1 ADDR4 8 0 Z
+bit 9 O 1 ADDR5 8 0 Z
+bit 8 C 0 *
+bit 7 O 1 ADDR6 8 0 Z
+bit 6 O 1 ADDR7 8 0 Z
+bit 5 O 1 ADDR8 8 0 Z
+bit 4 O 1 ADDR9 8 0 Z
+bit 3 O 1 ADDR10 8 0 Z
+bit 2 O 1 ADDR11 8 0 Z
+bit 1 O 1 ADDR12 8 0 Z
+bit 0 O 1 ADDR13 8 0 Z
--- /dev/null
+#
+# $Id: STEPPINGS 75 2005-11-11 09:12:34Z jiez $
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+#
+
+# bits 31-28 of the Device Identification Register
+0000 bf527 0
+0001 bf527 1
+0010 bf527 2
--- /dev/null
+signal ADDR1
+signal ADDR2
+signal ADDR3
+signal ADDR4
+signal ADDR5
+signal ADDR6
+signal ADDR7
+signal ADDR8
+signal ADDR9
+signal ADDR10
+signal ADDR11
+signal ADDR12
+signal ADDR13
+signal ADDR14
+signal ADDR15
+signal ADDR16
+signal ADDR17
+signal ADDR18
+signal ADDR19
+signal DATA0
+signal DATA1
+signal DATA2
+signal DATA3
+signal DATA4
+signal DATA5
+signal DATA6
+signal DATA7
+signal DATA8
+signal DATA9
+signal DATA10
+signal DATA11
+signal DATA12
+signal DATA13
+signal DATA14
+signal DATA15
+signal PF0
+signal PF1
+signal PF2
+signal PF3
+signal PF4
+signal PF5
+signal PF6
+signal PF7
+signal PF8
+signal PF9
+signal PF10
+signal PF11
+signal PF12
+signal PF13
+signal PF14
+signal PF15
+signal PG0
+signal PG1
+signal PG2
+signal PG3
+signal PG4
+signal PG5
+signal PG6
+signal PG7
+signal PG8
+signal PG9
+signal PG10
+signal PG11
+signal PG12
+signal PG13
+signal PG14
+signal PG15
+signal PH0
+signal PH1
+signal PH2
+signal PH3
+signal PH4
+signal PH5
+signal PH6
+signal PH7
+signal PH8
+signal PH9
+signal PH10
+signal PH11
+signal PH12
+signal PH13
+signal PH14
+signal PH15
+signal BMODE0
+signal BMODE1
+signal BMODE2
+signal BMODE3
+signal PJ1
+signal PJ0
+signal PJ2
+signal PJ3
+signal NMI_B
+signal RESET_B
+signal CLKOUT
+signal AMS_B0
+signal AMS_B1
+signal AMS_B2
+signal AMS_B3
+signal AOE_B
+signal ARE_B
+signal AWE_B
+signal ARDY
+signal SCKE
+signal SMS_B
+signal SRAS_B
+signal SCAS_B
+signal SWE_B
+signal SA10
+signal ABE_B0
+signal ABE_B1
+signal TCK
+signal TDI
+signal TDO
+signal TMS
+signal TRST_B
+signal GND0
+signal GND1
+signal GND2
+signal GND3
+signal GND4
+signal GND5
+signal GND6
+signal GND7
+signal GND8
+signal GND9
+signal GND10
+signal GND11
+signal GND12
+signal GND13
+signal GND14
+signal GND15
+signal GND16
+signal GND17
+signal GND18
+signal GND19
+signal GND20
+signal GND21
+signal GND22
+signal GND23
+signal GND24
+signal GND25
+signal GND26
+signal GND27
+signal GND28
+signal GND29
+signal GND30
+signal GND31
+signal GND32
+signal GND33
+signal GND34
+signal GND35
+signal GND36
+signal GND37
+signal GND38
+signal GND39
+signal GND40
+signal GND41
+signal GND42
+signal GND43
+signal GND44
+signal GND45
+signal GND46
+signal GND47
+signal GND48
+signal GND49
+signal GND50
+signal GND51
+signal GND52
+signal GND53
+signal GND54
+signal VDDOTP
+signal OTPVPP
+signal USB_ID
+signal USB_RSET
+signal VDDUSB0
+signal VDDUSB1
+signal USB_VREF
+signal USB_XTALIN
+signal USB_XTALOUT
+signal VDDEXT0
+signal VDDEXT1
+signal VDDEXT2
+signal VDDEXT3
+signal VDDEXT4
+signal VDDEXT5
+signal VDDEXT6
+signal VDDEXT7
+signal VDDEXT8
+signal VDDEXT9
+signal VDDEXT10
+signal VDDEXT11
+signal VDDEXT12
+signal VDDEXT13
+signal VDDEXT14
+signal VDDEXT15
+signal VDDEXT16
+signal VDDEXT17
+signal VDDEXT18
+signal VDDEXT19
+signal RTXI
+signal RTXO
+signal SSPG
+signal CLKIN
+signal VROUT
+signal EXT_WAKE
+signal USB_DM
+signal USB_DP
+signal USB_VBUS
+signal CLKBUF
+signal VDDRTC
+signal VDDMEM0
+signal VDDMEM1
+signal VDDMEM2
+signal VDDMEM3
+signal VDDMEM4
+signal VDDMEM5
+signal VDDMEM6
+signal VDDMEM7
+signal VDDMEM8
+signal VDDMEM9
+signal VDDMEM10
+signal VDDMEM11
+signal VDDMEM12
+signal VDDMEM13
+signal VDDMEM14
+signal VDDMEM15
+signal VDDMEM16
+signal VDDMEM17
+signal VDDINT0
+signal VDDINT1
+signal VDDINT2
+signal VDDINT3
+signal VDDINT4
+signal VDDINT5
+signal VDDINT6
+signal VDDINT7
+signal VDDINT8
+signal VDDINT9
+signal VDDINT10
+signal VDDINT11
+signal VDDINT12
+signal VDDINT13
+signal VDDINT14
+signal VDDINT15
+signal VDDINT16
+signal VDDINT17
+signal VDDINT18
+signal VDDINT19
+signal VDDINT20
+signal VDDINT21
+signal VDDINT22
+signal VDDINT23
+signal VDDINT24
+signal VDDINT25
+signal VDDINT26
+signal VDDINT27
+signal VDDINT28
+signal VDDINT29
+signal VDDINT30
+signal VDDINT31
+signal VDDINT32
+signal VRSEL
+signal XTAL
+signal ADCLRC
+signal ADCDAT
+signal DACLRC
+signal DACDAT
+signal BCLK
+signal XTO
+signal XTI_MCLK
+signal LHPOUT
+signal RHPOUT
+signal CSCL
+signal CSDA
+signal CCLKOUT
+signal CSB
+signal CMODE
+signal LLINEIN
+signal LOUT
+signal RLINEIN
+signal ROUT
+signal VMID
+signal MICBIAS
+signal MICIN
+signal AVDD0
+signal AVDD1
+signal AGND0
+signal AGND1
+
+register BSR 233
+register BR 1
+register DIR 32
+
+instruction length 5
+
+instruction EXTEST 00000 BSR
+instruction SAMPLE/PRELOAD 10000 BSR
+instruction IDCODE 00010 DIR
+instruction BYPASS 11111 BR
+
+bit 232 C 0 *
+bit 231 O 1 ADDR14 8 0 Z
+bit 230 O 1 ADDR15 8 0 Z
+bit 229 O 1 ADDR16 8 0 Z
+bit 228 O 1 ADDR17 8 0 Z
+bit 227 O 1 ADDR18 8 0 Z
+bit 226 O 1 ADDR19 8 0 Z
+bit 225 O 1 DATA0 232 0 Z
+bit 224 I 1 DATA0
+bit 223 O 1 DATA1 232 0 Z
+bit 222 I 1 DATA1
+bit 221 O 1 DATA2 232 0 Z
+bit 220 I 1 DATA2
+bit 219 O 1 DATA3 232 0 Z
+bit 218 I 1 DATA3
+bit 217 O 1 DATA4 232 0 Z
+bit 216 I 1 DATA4
+bit 215 O 1 DATA5 232 0 Z
+bit 214 I 1 DATA5
+bit 213 O 1 DATA6 232 0 Z
+bit 212 I 1 DATA6
+bit 211 O 1 DATA7 232 0 Z
+bit 210 I 1 DATA7
+bit 209 O 1 DATA8 232 0 Z
+bit 208 I 1 DATA8
+bit 207 O 1 DATA9 232 0 Z
+bit 206 I 1 DATA9
+bit 205 O 1 DATA10 232 0 Z
+bit 204 I 1 DATA10
+bit 203 O 1 DATA11 232 0 Z
+bit 202 I 1 DATA11
+bit 201 O 1 DATA12 232 0 Z
+bit 200 I 1 DATA12
+bit 199 O 1 DATA13 232 0 Z
+bit 198 I 1 DATA13
+bit 197 O 1 DATA14 232 0 Z
+bit 196 I 1 DATA14
+bit 195 O 1 DATA15 232 0 Z
+bit 194 I 1 DATA15
+bit 193 C 0 *
+bit 192 O 1 PG0 193 0 Z
+bit 191 I 1 PG0
+bit 190 C 0 *
+bit 189 O 1 PG1 190 0 Z
+bit 188 I 1 PG1
+bit 187 C 0 *
+bit 186 O 1 PG2 187 0 Z
+bit 185 I 1 PG2
+bit 184 C 0 *
+bit 183 O 1 PG3 184 0 Z
+bit 182 I 1 PG3
+bit 181 I 1 BMODE0
+bit 180 I 1 BMODE1
+bit 179 I 1 BMODE2
+bit 178 I 1 BMODE3
+bit 177 C 0 *
+bit 176 O 1 PG4 177 0 Z
+bit 175 I 1 PG4
+bit 174 C 0 *
+bit 173 O 1 PG5 174 0 Z
+bit 172 I 1 PG5
+bit 171 C 0 *
+bit 170 O 1 PG6 171 0 Z
+bit 169 I 1 PG6
+bit 168 C 0 *
+bit 167 O 1 PG7 168 0 Z
+bit 166 I 1 PG7
+bit 165 C 0 *
+bit 164 O 1 PG8 165 0 Z
+bit 163 I 1 PG8
+bit 162 C 0 *
+bit 161 O 1 PG9 162 0 Z
+bit 160 I 1 PG9
+bit 159 C 0 *
+bit 158 O 1 PG10 159 0 Z
+bit 157 I 1 PG10
+bit 156 C 0 *
+bit 155 O 1 PG11 156 0 Z
+bit 154 I 1 PG11
+bit 153 C 0 *
+bit 152 O 1 PG12 153 0 Z
+bit 151 I 1 PG12
+bit 150 C 0 *
+bit 149 O 1 PG13 150 0 Z
+bit 148 I 1 PG13
+bit 147 C 0 *
+bit 146 O 1 PG14 147 0 Z
+bit 145 I 1 PG14
+bit 144 C 0 *
+bit 143 O 1 PG15 144 0 Z
+bit 142 I 1 PG15
+bit 141 I 1 PJ1
+bit 140 C 0 *
+bit 139 O 1 PJ0 140 0 Z
+bit 138 I 1 PJ0
+bit 137 C 0 *
+bit 136 O 1 PF0 137 0 Z
+bit 135 I 1 PF0
+bit 134 C 0 *
+bit 133 O 1 PF1 134 0 Z
+bit 132 I 1 PF1
+bit 131 C 0 *
+bit 130 O 1 PF2 131 0 Z
+bit 129 I 1 PF2
+bit 128 C 0 *
+bit 127 O 1 PF3 128 0 Z
+bit 126 I 1 PF3
+bit 125 C 0 *
+bit 124 O 1 PF4 125 0 Z
+bit 123 I 1 PF4
+bit 122 C 0 *
+bit 121 O 1 PF5 122 0 Z
+bit 120 I 1 PF5
+bit 119 C 0 *
+bit 118 O 1 PF6 119 0 Z
+bit 117 I 1 PF6
+bit 116 C 0 *
+bit 115 O 1 PF7 116 0 Z
+bit 114 I 1 PF7
+bit 113 C 0 *
+bit 112 O 1 PF8 113 0 Z
+bit 111 I 1 PF8
+bit 110 C 0 *
+bit 109 O 1 PF9 110 0 Z
+bit 108 I 1 PF9
+bit 107 C 0 *
+bit 106 O 1 PF10 107 0 Z
+bit 105 I 1 PF10
+bit 104 C 0 *
+bit 103 O 1 PF11 104 0 Z
+bit 102 I 1 PF11
+bit 101 O 1 *
+bit 100 O 1 PJ2 100 1 Z
+bit 99 I 1 PJ2
+bit 98 O 1 *
+bit 97 O 1 PJ3 97 1 Z
+bit 96 I 1 PJ3
+bit 95 C 0 *
+bit 94 O 1 PF12 95 0 Z
+bit 93 I 1 PF12
+bit 92 C 0 *
+bit 91 O 1 PF13 92 0 Z
+bit 90 I 1 PF13
+bit 89 C 0 *
+bit 88 O 1 PF14 89 0 Z
+bit 87 I 1 PF14
+bit 86 C 0 *
+bit 85 O 1 PF15 86 0 Z
+bit 84 I 1 PF15
+bit 83 C 0 *
+bit 82 O 1 PH0 83 0 Z
+bit 81 I 1 PH0
+bit 80 C 0 *
+bit 79 O 1 PH1 80 0 Z
+bit 78 I 1 PH1
+bit 77 C 0 *
+bit 76 O 1 PH2 77 0 Z
+bit 75 I 1 PH2
+bit 74 C 0 *
+bit 73 O 1 PH3 74 0 Z
+bit 72 I 1 PH3
+bit 71 C 0 *
+bit 70 O 1 PH4 71 0 Z
+bit 69 I 1 PH4
+bit 68 C 0 *
+bit 67 O 1 PH5 68 0 Z
+bit 66 I 1 PH5
+bit 65 C 0 *
+bit 64 O 1 PH6 65 0 Z
+bit 63 I 1 PH6
+bit 62 C 0 *
+bit 61 O 1 PH7 62 0 Z
+bit 60 I 1 PH7
+bit 59 C 0 *
+bit 58 O 1 PH8 59 0 Z
+bit 57 I 1 PH8
+bit 56 O 0 *
+bit 55 C 0 *
+bit 54 O 1 PH9 55 0 Z
+bit 53 I 1 PH9
+bit 52 C 0 *
+bit 51 O 1 PH10 52 0 Z
+bit 50 I 1 PH10
+bit 49 C 0 *
+bit 48 O 1 PH11 49 0 Z
+bit 47 I 1 PH11
+bit 46 C 0 *
+bit 45 O 1 PH12 46 0 Z
+bit 44 I 1 PH12
+bit 43 C 0 *
+bit 42 O 1 PH13 43 0 Z
+bit 41 I 1 PH13
+bit 40 C 0 *
+bit 39 O 1 PH14 40 0 Z
+bit 38 I 1 PH14
+bit 37 C 0 *
+bit 36 O 1 PH15 37 0 Z
+bit 35 I 1 PH15
+bit 34 I 1 NMI_B
+bit 33 I 1 RESET_B
+bit 32 C 0 *
+bit 31 O 1 CLKOUT 32 0 Z
+bit 30 O 1 AMS_B0 25 0 Z
+bit 29 O 1 AMS_B1 25 0 Z
+bit 28 O 1 AMS_B2 25 0 Z
+bit 27 O 1 AMS_B3 25 0 Z
+bit 26 O 1 AOE_B 25 0 Z
+bit 25 C 0 *
+bit 24 O 1 ARE_B 25 0 Z
+bit 23 O 1 AWE_B 25 0 Z
+bit 22 I 1 ARDY
+bit 21 O 1 SCKE 32 0 Z
+bit 20 O 1 SMS_B 32 0 Z
+bit 19 O 1 SRAS_B 32 0 Z
+bit 18 O 1 SCAS_B 32 0 Z
+bit 17 O 1 SWE_B 32 0 Z
+bit 16 O 1 SA10 32 0 Z
+bit 15 O 1 ABE_B0 8 0 Z
+bit 14 O 1 ABE_B1 8 0 Z
+bit 13 O 1 ADDR1 8 0 Z
+bit 12 O 1 ADDR2 8 0 Z
+bit 11 O 1 ADDR3 8 0 Z
+bit 10 O 1 ADDR4 8 0 Z
+bit 9 O 1 ADDR5 8 0 Z
+bit 8 C 0 *
+bit 7 O 1 ADDR6 8 0 Z
+bit 6 O 1 ADDR7 8 0 Z
+bit 5 O 1 ADDR8 8 0 Z
+bit 4 O 1 ADDR9 8 0 Z
+bit 3 O 1 ADDR10 8 0 Z
+bit 2 O 1 ADDR11 8 0 Z
+bit 1 O 1 ADDR12 8 0 Z
+bit 0 O 1 ADDR13 8 0 Z
--- /dev/null
+#
+# $Id: STEPPINGS,v 1.3 2005/07/08 15:05:41 rgetz Exp $
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Richard Klingler <richard@klingler.net>
+#
+
+# bits 31-28 of the Device Identification Register
+0000 bf533 0
+0001 bf533 1
+0010 bf533 2
+0011 bf533 3
+0100 bf533 4
+0101 bf533 5
+0110 bf533 6
--- /dev/null
+signal ADDR[1]
+signal ADDR[2]
+signal ADDR[3]
+signal ADDR[4]
+signal ADDR[5]
+signal ADDR[6]
+signal ADDR[7]
+signal ADDR[8]
+signal ADDR[9]
+signal ADDR[10]
+signal ADDR[11]
+signal ADDR[12]
+signal ADDR[13]
+signal ADDR[14]
+signal ADDR[15]
+signal ADDR[16]
+signal ADDR[17]
+signal ADDR[18]
+signal ADDR[19]
+signal AMS_B0
+signal AMS_B1
+signal AMS_B2
+signal AMS_B3
+signal AOE_B
+signal ARDY
+signal ARE_B
+signal AWE_B
+signal ABE_B0
+signal ABE_B1
+signal BG_B
+signal BGH_B
+signal BMODE0
+signal BMODE1
+signal BR_B
+signal DATA[0]
+signal DATA[1]
+signal DATA[2]
+signal DATA[3]
+signal DATA[4]
+signal DATA[5]
+signal DATA[6]
+signal DATA[7]
+signal DATA[8]
+signal DATA[9]
+signal DATA[10]
+signal DATA[11]
+signal DATA[12]
+signal DATA[13]
+signal DATA[14]
+signal DATA[15]
+signal DR0PRI
+signal DR0SEC
+signal DR1PRI
+signal DR1SEC
+signal DT0PRI
+signal DT0SEC
+signal DT1PRI
+signal DT1SEC
+signal MISO
+signal MOSI
+signal NMI
+signal PF0
+signal PF1
+signal PF2
+signal PF3
+signal PF4
+signal PF5
+signal PF6
+signal PF7
+signal PF8
+signal PF9
+signal PF10
+signal PF11
+signal PF12
+signal PF13
+signal PF14
+signal PF15
+signal PP_CLK
+signal PP0
+signal PP1
+signal PP2
+signal PP3
+signal RESET_B
+signal RFS0
+signal RFS1
+signal RSCLK0
+signal RSCLK1
+signal TSCLK0
+signal TSCLK1
+signal CLKOUT
+signal RX
+signal TX
+signal SA10
+signal SCAS_B
+signal SCK
+signal SCKE
+signal SMS_B
+signal SRAS_B
+signal SWE_B
+signal TCK
+signal TDI
+signal TDO
+signal TMS
+signal TRST_B
+signal EMU_B
+signal TEST
+signal TFS0
+signal TFS1
+signal TMR0
+signal TMR1
+signal TMR2
+signal RTXI
+signal RTXO
+signal VDD_INT0
+signal VDD_INT1
+signal VDD_INT2
+signal VDD_INT3
+signal VDD_INT4
+signal VDD_INT5
+signal VDD_EXT0
+signal VDD_EXT1
+signal VDD_EXT2
+signal VDD_EXT3
+signal VDD_EXT4
+signal VDD_EXT5
+signal VDD_EXT6
+signal VDD_EXT7
+signal VDD_EXT8
+signal VDD_EXT9
+signal VDD_EXT10
+signal VDD_EXT11
+signal GND0
+signal GND1
+signal GND2
+signal GND3
+signal GND4
+signal GND5
+signal GND6
+signal GND7
+signal GND8
+signal GND9
+signal GND10
+signal GND11
+signal GND12
+signal GND13
+signal GND14
+signal GND15
+signal GND16
+signal GND17
+signal GND18
+signal GND19
+signal GND20
+signal GND21
+signal GND22
+signal GND23
+signal VDD_RTC
+signal CLKIN
+signal XTAL
+signal VROUT0
+
+register BSR 197
+register BR 1
+register DIR 32
+
+instruction length 5
+
+instruction EXTEST 00000 BSR
+instruction SAMPLE/PRELOAD 10000 BSR
+instruction IDCODE 00010 DIR
+instruction BYPASS 11111 BR
+
+bit 196 C 0 *
+bit 195 O 1 DATA[0] 196 0 Z
+bit 194 I 1 DATA[0]
+bit 193 O 1 DATA[1] 196 0 Z
+bit 192 I 1 DATA[1]
+bit 191 O 1 DATA[2] 196 0 Z
+bit 190 I 1 DATA[2]
+bit 189 O 1 DATA[3] 196 0 Z
+bit 188 I 1 DATA[3]
+bit 187 O 1 DATA[4] 196 0 Z
+bit 186 I 1 DATA[4]
+bit 185 O 1 DATA[5] 196 0 Z
+bit 184 I 1 DATA[5]
+bit 183 O 1 DATA[6] 196 0 Z
+bit 182 I 1 DATA[6]
+bit 181 O 1 DATA[7] 196 0 Z
+bit 180 I 1 DATA[7]
+bit 179 O 1 DATA[8] 196 0 Z
+bit 178 I 1 DATA[8]
+bit 177 O 1 DATA[9] 196 0 Z
+bit 176 I 1 DATA[9]
+bit 175 O 1 DATA[10] 196 0 Z
+bit 174 I 1 DATA[10]
+bit 173 O 1 DATA[11] 196 0 Z
+bit 172 I 1 DATA[11]
+bit 171 O 1 DATA[12] 196 0 Z
+bit 170 I 1 DATA[12]
+bit 169 O 1 DATA[13] 196 0 Z
+bit 168 I 1 DATA[13]
+bit 167 O 1 DATA[14] 196 0 Z
+bit 166 I 1 DATA[14]
+bit 165 O 1 DATA[15] 196 0 Z
+bit 164 I 1 DATA[15]
+bit 163 I 1 TEST
+bit 162 I 1 BMODE0
+bit 161 I 1 BMODE1
+bit 160 I 1 RX
+bit 159 O 1 TX
+bit 158 C 0 *
+bit 157 O 1 TMR0 158 0 Z
+bit 156 I 1 TMR0
+bit 155 C 0 *
+bit 154 O 1 TMR1 155 0 Z
+bit 153 I 1 TMR1
+bit 152 C 0 *
+bit 151 O 1 TMR2 152 0 Z
+bit 150 I 1 TMR2
+bit 149 C 0 *
+bit 148 O 1 RSCLK0 149 0 Z
+bit 147 I 1 RSCLK0
+bit 146 C 0 *
+bit 145 O 1 RFS0 146 0 Z
+bit 144 I 1 RFS0
+bit 143 I 1 DR0PRI
+bit 142 I 1 DR0SEC
+bit 141 C 0 *
+bit 140 O 1 TSCLK0 141 0 Z
+bit 139 I 1 TSCLK0
+bit 138 C 0 *
+bit 137 O 1 TFS0 138 0 Z
+bit 136 I 1 TFS0
+bit 135 C 0 *
+bit 134 O 1 DT0PRI 135 0 Z
+bit 133 C 0 *
+bit 132 O 1 DT0SEC 133 0 Z
+bit 131 C 0 *
+bit 130 O 1 RSCLK1 131 0 Z
+bit 129 I 1 RSCLK1
+bit 128 C 0 *
+bit 127 O 1 RFS1 128 0 Z
+bit 126 I 1 RFS1
+bit 125 I 1 DR1PRI
+bit 124 I 1 DR1SEC
+bit 123 C 0 *
+bit 122 O 1 TSCLK1 123 0 Z
+bit 121 I 1 TSCLK1
+bit 120 C 0 *
+bit 119 O 1 TFS1 120 0 Z
+bit 118 I 1 TFS1
+bit 117 C 0 *
+bit 116 O 1 DT1PRI 117 0 Z
+bit 115 C 0 *
+bit 114 O 1 DT1SEC 115 0 Z
+bit 113 C 0 *
+bit 112 O 1 MOSI 113 0 Z
+bit 111 I 1 MOSI
+bit 110 C 0 *
+bit 109 O 1 MISO 110 0 Z
+bit 108 I 1 MISO
+bit 107 C 0 *
+bit 106 O 1 SCK 107 0 Z
+bit 105 I 1 SCK
+bit 104 C 0 *
+bit 103 O 1 PF0 104 0 Z
+bit 102 I 1 PF0
+bit 101 C 0 *
+bit 100 O 1 PF1 101 0 Z
+bit 99 I 1 PF1
+bit 98 C 0 *
+bit 97 O 1 PF2 98 0 Z
+bit 96 I 1 PF2
+bit 95 C 0 *
+bit 94 O 1 PF3 95 0 Z
+bit 93 I 1 PF3
+bit 92 C 0 *
+bit 91 O 1 PF4 92 0 Z
+bit 90 I 1 PF4
+bit 89 C 0 *
+bit 88 O 1 PF5 89 0 Z
+bit 87 I 1 PF5
+bit 86 C 0 *
+bit 85 O 1 PF6 86 0 Z
+bit 84 I 1 PF6
+bit 83 C 0 *
+bit 82 O 1 PF7 83 0 Z
+bit 81 I 1 PF7
+bit 80 C 0 *
+bit 79 O 1 PF8 80 0 Z
+bit 78 I 1 PF8
+bit 77 C 0 *
+bit 76 O 1 PF9 77 0 Z
+bit 75 I 1 PF9
+bit 74 C 0 *
+bit 73 O 1 PF10 74 0 Z
+bit 72 I 1 PF10
+bit 71 C 0 *
+bit 70 O 1 PF11 71 0 Z
+bit 69 I 1 PF11
+bit 68 C 0 *
+bit 67 O 1 PF12 68 0 Z
+bit 66 I 1 PF12
+bit 65 C 0 *
+bit 64 O 1 PF13 65 0 Z
+bit 63 I 1 PF13
+bit 62 C 0 *
+bit 61 O 1 PF14 62 0 Z
+bit 60 I 1 PF14
+bit 59 C 0 *
+bit 58 O 1 PF15 59 0 Z
+bit 57 I 1 PF15
+bit 56 C 0 *
+bit 55 O 1 PP3 56 0 Z
+bit 54 I 1 PP3
+bit 53 C 0 *
+bit 52 O 1 PP2 53 0 Z
+bit 51 I 1 PP2
+bit 50 C 0 *
+bit 49 O 1 PP1 50 0 Z
+bit 48 I 1 PP1
+bit 47 C 0 *
+bit 46 O 1 PP0 47 0 Z
+bit 45 I 1 PP0
+bit 44 I 1 PP_CLK
+bit 43 I 1 NMI
+bit 42 I 1 RESET_B
+bit 41 O 1 SCKE 39 0 Z
+bit 40 O 1 SMS_B 39 0 Z
+bit 39 C 0 *
+bit 38 O 1 CLKOUT 39 0 Z
+bit 37 O 1 SRAS_B 39 0 Z
+bit 36 O 1 SCAS_B 39 0 Z
+bit 35 O 1 SWE_B 39 0 Z
+bit 34 O 1 SA10 39 0 Z
+bit 33 I 1 BR_B
+bit 32 I 1 ARDY
+bit 31 O 1 AMS_B0 27 0 Z
+bit 30 O 1 AMS_B1 27 0 Z
+bit 29 O 1 AMS_B2 27 0 Z
+bit 28 O 1 AMS_B3 27 0 Z
+bit 27 C 0 *
+bit 26 O 1 AOE_B 27 0 Z
+bit 25 O 1 ARE_B 27 0 Z
+bit 24 O 1 AWE_B 27 0 Z
+bit 23 O 1 ABE_B0 17 0 Z
+bit 22 O 1 ABE_B1 17 0 Z
+bit 21 O 1 ADDR[1] 17 0 Z
+bit 20 O 1 ADDR[2] 17 0 Z
+bit 19 O 1 ADDR[3] 17 0 Z
+bit 18 O 1 ADDR[4] 17 0 Z
+bit 17 C 0 *
+bit 16 O 1 ADDR[5] 17 0 Z
+bit 15 O 1 ADDR[6] 17 0 Z
+bit 14 O 1 ADDR[7] 17 0 Z
+bit 13 O 1 ADDR[8] 17 0 Z
+bit 12 O 1 ADDR[9] 17 0 Z
+bit 11 O 1 ADDR[10] 17 0 Z
+bit 10 O 1 ADDR[11] 17 0 Z
+bit 9 O 1 ADDR[12] 17 0 Z
+bit 8 O 1 ADDR[13] 17 0 Z
+bit 7 O 1 ADDR[14] 17 0 Z
+bit 6 O 1 ADDR[15] 17 0 Z
+bit 5 O 1 ADDR[16] 17 0 Z
+bit 4 O 1 ADDR[17] 17 0 Z
+bit 3 O 1 ADDR[18] 17 0 Z
+bit 2 O 1 ADDR[19] 17 0 Z
+bit 1 O 1 BGH_B
+bit 0 O 1 BG_B
--- /dev/null
+#
+# $Id: STEPPINGS 75 2005-11-11 09:12:34Z jiez $
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Richard Klingler <richard@klingler.net>
+#
+
+# bits 31-28 of the Device Identification Register
+0000 bf537 0
+0001 bf537 1
+0010 bf537 2
+0011 bf537 3
--- /dev/null
+signal ADDR1
+signal ADDR2
+signal ADDR3
+signal ADDR4
+signal ADDR5
+signal ADDR6
+signal ADDR7
+signal ADDR8
+signal ADDR9
+signal ADDR10
+signal ADDR11
+signal ADDR12
+signal ADDR13
+signal ADDR14
+signal ADDR15
+signal ADDR16
+signal ADDR17
+signal ADDR18
+signal ADDR19
+signal AMS_B0
+signal AMS_B1
+signal AMS_B2
+signal AMS_B3
+signal AOE_B
+signal ARDY
+signal ARE_B
+signal AWE_B
+signal ABE_B0
+signal ABE_B1
+signal BG_B
+signal BGH_B
+signal BMODE0
+signal BMODE1
+signal BMODE2
+signal BR_B
+signal DATA0
+signal DATA1
+signal DATA2
+signal DATA3
+signal DATA4
+signal DATA5
+signal DATA6
+signal DATA7
+signal DATA8
+signal DATA9
+signal DATA10
+signal DATA11
+signal DATA12
+signal DATA13
+signal DATA14
+signal DATA15
+signal NMI
+signal PF0
+signal PF1
+signal PF2
+signal PF3
+signal PF4
+signal PF5
+signal PF6
+signal PF7
+signal PF8
+signal PF9
+signal PF10
+signal PF11
+signal PF12
+signal PF13
+signal PF14
+signal PF15
+signal PG0
+signal PG1
+signal PG2
+signal PG3
+signal PG4
+signal PG5
+signal PG6
+signal PG7
+signal PG8
+signal PG9
+signal PG10
+signal PG11
+signal PG12
+signal PG13
+signal PG14
+signal PG15
+signal PH0
+signal PH1
+signal PH2
+signal PH3
+signal PH4
+signal PH5
+signal PH6
+signal PH7
+signal PH8
+signal PH9
+signal PH10
+signal PH11
+signal PH12
+signal PH13
+signal PH14
+signal PH15
+signal PJ0
+signal PJ1
+signal PJ2
+signal PJ3
+signal PJ4
+signal PJ5
+signal PJ6
+signal PJ7
+signal PJ8
+signal PJ9
+signal PJ10
+signal PJ11
+signal RESET_B
+signal CLKOUT
+signal SA10
+signal SCAS_B
+signal SCKE
+signal SMS_B
+signal SRAS_B
+signal SWE_B
+signal TDI
+signal TDO
+signal TCK
+signal TMS
+signal TRST_B
+signal TEST
+signal EMU_B
+signal RTXI
+signal RTXO
+signal VDD_INT0
+signal VDD_INT1
+signal VDD_INT2
+signal VDD_INT3
+signal VDD_INT4
+signal VDD_INT5
+signal VDD_INT6
+signal VDD_EXT0
+signal VDD_EXT1
+signal VDD_EXT2
+signal VDD_EXT3
+signal VDD_EXT4
+signal VDD_EXT5
+signal VDD_EXT6
+signal VDD_EXT7
+signal VDD_EXT8
+signal VDD_EXT9
+signal VDD_EXT10
+signal VDD_EXT11
+signal VDD_EXT12
+signal VDD_EXT13
+signal VDD_EXT14
+signal VDD_EXT15
+signal GND0
+signal GND1
+signal GND2
+signal GND3
+signal GND4
+signal GND5
+signal GND6
+signal GND7
+signal GND8
+signal GND9
+signal GND10
+signal GND11
+signal GND12
+signal GND13
+signal GND14
+signal GND15
+signal GND16
+signal GND17
+signal GND18
+signal GND19
+signal GND20
+signal GND21
+signal GND22
+signal GND23
+signal VDD_RTC
+signal CLKIN
+signal XTAL
+signal CLKBUF
+signal VROUT0
+
+register BSR 261
+register BR 1
+register DIR 32
+
+instruction length 5
+
+instruction BYPASS 11111 BR
+instruction EXTEST 00000 BSR
+instruction SAMPLE/PRELOAD 10000 BSR
+instruction IDCODE 00010 DIR
+
+bit 260 C 0 *
+bit 259 O 1 DATA0 260 0 Z
+bit 258 I 1 DATA0
+bit 257 O 1 DATA1 260 0 Z
+bit 256 I 1 DATA1
+bit 255 O 1 DATA2 260 0 Z
+bit 254 I 1 DATA2
+bit 253 O 1 DATA3 260 0 Z
+bit 252 I 1 DATA3
+bit 251 O 1 DATA4 260 0 Z
+bit 250 I 1 DATA4
+bit 249 O 1 DATA5 260 0 Z
+bit 248 I 1 DATA5
+bit 247 O 1 DATA6 260 0 Z
+bit 246 I 1 DATA6
+bit 245 O 1 DATA7 260 0 Z
+bit 244 I 1 DATA7
+bit 243 O 1 DATA8 260 0 Z
+bit 242 I 1 DATA8
+bit 241 O 1 DATA9 260 0 Z
+bit 240 I 1 DATA9
+bit 239 O 1 DATA10 260 0 Z
+bit 238 I 1 DATA10
+bit 237 O 1 DATA11 260 0 Z
+bit 236 I 1 DATA11
+bit 235 O 1 DATA12 260 0 Z
+bit 234 I 1 DATA12
+bit 233 O 1 DATA13 260 0 Z
+bit 232 I 1 DATA13
+bit 231 O 1 DATA14 260 0 Z
+bit 230 I 1 DATA14
+bit 229 O 1 DATA15 260 0 Z
+bit 228 I 1 DATA15
+bit 227 I 1 TEST
+bit 226 I 1 BMODE0
+bit 225 I 1 BMODE1
+bit 224 I 1 BMODE2
+bit 223 C 0 *
+bit 222 O 1 PF0 223 0 Z
+bit 221 I 1 PF0
+bit 220 C 0 *
+bit 219 O 1 PF1 220 0 Z
+bit 218 I 1 PF1
+bit 217 C 0 *
+bit 216 O 1 PF2 217 0 Z
+bit 215 I 1 PF2
+bit 214 C 0 *
+bit 213 O 1 PF3 214 0 Z
+bit 212 I 1 PF3
+bit 211 C 0 *
+bit 210 O 1 PF4 211 0 Z
+bit 209 I 1 PF4
+bit 208 C 0 *
+bit 207 O 1 PF5 208 0 Z
+bit 206 I 1 PF5
+bit 205 C 0 *
+bit 204 O 1 PF6 205 0 Z
+bit 203 I 1 PF6
+bit 202 C 0 *
+bit 201 O 1 PF7 202 0 Z
+bit 200 I 1 PF7
+bit 199 C 0 *
+bit 198 O 1 PF8 199 0 Z
+bit 197 I 1 PF8
+bit 196 C 0 *
+bit 195 O 1 PF9 196 0 Z
+bit 194 I 1 PF9
+bit 193 C 0 *
+bit 192 O 1 PF10 193 0 Z
+bit 191 I 1 PF10
+bit 190 C 0 *
+bit 189 O 1 PF11 190 0 Z
+bit 188 I 1 PF11
+bit 187 C 0 *
+bit 186 O 1 PF12 187 0 Z
+bit 185 I 1 PF12
+bit 184 C 0 *
+bit 183 O 1 PF13 184 0 Z
+bit 182 I 1 PF13
+bit 181 C 0 *
+bit 180 O 1 PF14 181 0 Z
+bit 179 I 1 PF14
+bit 178 C 0 *
+bit 177 O 1 PF15 178 0 Z
+bit 176 I 1 PF15
+bit 175 C 0 *
+bit 174 O 1 PG0 175 0 Z
+bit 173 I 1 PG0
+bit 172 C 0 *
+bit 171 O 1 PG1 172 0 Z
+bit 170 I 1 PG1
+bit 169 C 0 *
+bit 168 O 1 PG2 169 0 Z
+bit 167 I 1 PG2
+bit 166 C 0 *
+bit 165 O 1 PG3 166 0 Z
+bit 164 I 1 PG3
+bit 163 C 0 *
+bit 162 O 1 PG4 163 0 Z
+bit 161 I 1 PG4
+bit 160 C 0 *
+bit 159 O 1 PG5 160 0 Z
+bit 158 I 1 PG5
+bit 157 C 0 *
+bit 156 O 1 PG6 157 0 Z
+bit 155 I 1 PG6
+bit 154 C 0 *
+bit 153 O 1 PG7 154 0 Z
+bit 152 I 1 PG7
+bit 151 C 0 *
+bit 150 O 1 PG10 151 0 Z
+bit 149 I 1 PG10
+bit 148 C 0 *
+bit 147 O 1 PG11 148 0 Z
+bit 146 I 1 PG11
+bit 145 C 0 *
+bit 144 O 1 PG12 145 0 Z
+bit 143 I 1 PG12
+bit 142 C 0 *
+bit 141 O 1 PG8 142 0 Z
+bit 140 I 1 PG8
+bit 139 C 0 *
+bit 138 O 1 PG9 139 0 Z
+bit 137 I 1 PG9
+bit 136 C 0 *
+bit 135 O 1 PG13 136 0 Z
+bit 134 I 1 PG13
+bit 133 C 0 *
+bit 132 O 1 PG14 133 0 Z
+bit 131 I 1 PG14
+bit 130 C 0 *
+bit 129 O 1 PG15 130 0 Z
+bit 128 I 1 PG15
+bit 127 C 0 *
+bit 126 O 1 PH0 127 0 Z
+bit 125 I 1 PH0
+bit 124 C 0 *
+bit 123 O 1 PH1 124 0 Z
+bit 122 I 1 PH1
+bit 121 C 0 *
+bit 120 O 1 PH2 121 0 Z
+bit 119 I 1 PH2
+bit 118 C 0 *
+bit 117 O 1 PH3 118 0 Z
+bit 116 I 1 PH3
+bit 115 C 0 *
+bit 114 O 1 PH4 115 0 Z
+bit 113 I 1 PH4
+bit 112 C 0 *
+bit 111 O 1 PH5 112 0 Z
+bit 110 I 1 PH5
+bit 109 C 0 *
+bit 108 O 1 PH6 109 0 Z
+bit 107 I 1 PH6
+bit 106 C 0 *
+bit 105 O 1 PH7 106 0 Z
+bit 104 I 1 PH7
+bit 103 C 0 *
+bit 102 O 1 PH8 103 0 Z
+bit 101 I 1 PH8
+bit 100 C 0 *
+bit 99 O 1 PH9 100 0 Z
+bit 98 I 1 PH9
+bit 97 C 0 *
+bit 96 O 1 PH10 97 0 Z
+bit 95 I 1 PH10
+bit 94 C 0 *
+bit 93 O 1 PH11 94 0 Z
+bit 92 I 1 PH11
+bit 91 C 0 *
+bit 90 O 1 PH12 91 0 Z
+bit 89 I 1 PH12
+bit 88 C 0 *
+bit 87 O 1 PH13 88 0 Z
+bit 86 I 1 PH13
+bit 85 C 0 *
+bit 84 O 1 PH14 85 0 Z
+bit 83 I 1 PH14
+bit 82 C 0 *
+bit 81 O 1 PH15 82 0 Z
+bit 80 I 1 PH15
+bit 79 C 0 *
+bit 78 O 1 PJ0 79 0 Z
+bit 77 I 1 PJ0
+bit 76 C 0 *
+bit 75 O 1 PJ1 76 0 Z
+bit 74 I 1 PJ1
+bit 73 C 0 *
+bit 72 O 1 PJ6 73 0 Z
+bit 71 I 1 PJ6
+bit 70 C 0 *
+bit 69 O 1 PJ7 70 0 Z
+bit 68 I 1 PJ7
+bit 67 C 0 *
+bit 66 O 1 PJ8 67 0 Z
+bit 65 I 1 PJ8
+bit 64 C 0 *
+bit 63 O 1 PJ4 64 0 Z
+bit 62 I 1 PJ4
+bit 61 C 0 *
+bit 60 O 1 PJ5 61 0 Z
+bit 59 I 1 PJ5
+bit 58 C 0 *
+bit 57 O 1 PJ9 58 0 Z
+bit 56 I 1 PJ9
+bit 55 C 0 *
+bit 54 O 1 PJ10 55 0 Z
+bit 53 I 1 PJ10
+bit 52 C 0 *
+bit 51 O 1 PJ11 52 0 Z
+bit 50 I 1 PJ11
+bit 49 C 0 *
+bit 48 O 1 PJ2 49 0 Z
+bit 47 I 1 PJ2
+bit 46 C 0 *
+bit 45 O 1 PJ3 46 0 Z
+bit 44 I 1 PJ3
+bit 43 I 1 NMI
+bit 42 I 1 RESET_B
+bit 41 O 1 SCKE 39 0 Z
+bit 40 O 1 SMS_B 39 0 Z
+bit 39 C 0 *
+bit 38 O 1 CLKOUT 39 0 Z
+bit 37 O 1 SRAS_B 39 0 Z
+bit 36 O 1 SCAS_B 39 0 Z
+bit 35 O 1 SWE_B 39 0 Z
+bit 34 O 1 SA10 39 0 Z
+bit 33 I 1 BR_B
+bit 32 I 1 ARDY
+bit 31 O 1 AMS_B0 27 0 Z
+bit 30 O 1 AMS_B1 27 0 Z
+bit 29 O 1 AMS_B2 27 0 Z
+bit 28 O 1 AMS_B3 27 0 Z
+bit 27 C 0 *
+bit 26 O 1 AOE_B 27 0 Z
+bit 25 O 1 ARE_B 27 0 Z
+bit 24 O 1 AWE_B 27 0 Z
+bit 23 O 1 ABE_B0 17 0 Z
+bit 22 O 1 ABE_B1 17 0 Z
+bit 21 O 1 ADDR1 17 0 Z
+bit 20 O 1 ADDR2 17 0 Z
+bit 19 O 1 ADDR3 17 0 Z
+bit 18 O 1 ADDR4 17 0 Z
+bit 17 C 0 *
+bit 16 O 1 ADDR5 17 0 Z
+bit 15 O 1 ADDR6 17 0 Z
+bit 14 O 1 ADDR7 17 0 Z
+bit 13 O 1 ADDR8 17 0 Z
+bit 12 O 1 ADDR9 17 0 Z
+bit 11 O 1 ADDR10 17 0 Z
+bit 10 O 1 ADDR11 17 0 Z
+bit 9 O 1 ADDR12 17 0 Z
+bit 8 O 1 ADDR13 17 0 Z
+bit 7 O 1 ADDR14 17 0 Z
+bit 6 O 1 ADDR15 17 0 Z
+bit 5 O 1 ADDR16 17 0 Z
+bit 4 O 1 ADDR17 17 0 Z
+bit 3 O 1 ADDR18 17 0 Z
+bit 2 O 1 ADDR19 17 0 Z
+bit 1 O 1 BGH_B
+bit 0 O 1 BG_B
--- /dev/null
+#
+# $Id: STEPPINGS 75 2005-11-11 09:12:34Z jiez $
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Richard Klingler <richard@klingler.net>
+#
+
+# bits 31-28 of the Device Identification Register
+0000 bf538 0
+0001 bf538 1
+0010 bf538 2
+0011 bf538 3
+0100 bf538 4
+0101 bf538 5
--- /dev/null
+signal ABE_B0
+signal ABE_B1
+signal ADDR1
+signal ADDR2
+signal ADDR3
+signal ADDR4
+signal ADDR5
+signal ADDR6
+signal ADDR7
+signal ADDR8
+signal ADDR9
+signal ADDR10
+signal ADDR11
+signal ADDR12
+signal ADDR13
+signal ADDR14
+signal ADDR15
+signal ADDR16
+signal ADDR17
+signal ADDR18
+signal ADDR19
+signal AMS_B0
+signal AMS_B1
+signal AMS_B2
+signal AMS_B3
+signal AOE_B
+signal ARDY
+signal ARE_B
+signal AWE_B
+signal BG_B
+signal BGH_B
+signal BMODE0
+signal BMODE1
+signal BR_B
+signal CANRX
+signal CANTX
+signal CLKIN
+signal CLKOUT
+signal DATA0
+signal DATA1
+signal DATA2
+signal DATA3
+signal DATA4
+signal DATA5
+signal DATA6
+signal DATA7
+signal DATA8
+signal DATA9
+signal DATA10
+signal DATA11
+signal DATA12
+signal DATA13
+signal DATA14
+signal DATA15
+signal DR0PRI
+signal DR0SEC
+signal DR1PRI
+signal DR1SEC
+signal DR2PRI
+signal DR2SEC
+signal DR3PRI
+signal DR3SEC
+signal DT0PRI
+signal DT0SEC
+signal DT1PRI
+signal DT1SEC
+signal DT2PRI
+signal DT2SEC
+signal DT3PRI
+signal DT3SEC
+signal EMU_B
+signal FCE_B
+signal FRESET_B
+signal GND0
+signal GND1
+signal GND2
+signal GND3
+signal GND4
+signal GND5
+signal GND6
+signal GND7
+signal GND8
+signal GND9
+signal GND10
+signal GND11
+signal GND12
+signal GND13
+signal GND14
+signal GND15
+signal GND16
+signal GND17
+signal GND18
+signal GND19
+signal GND20
+signal GND21
+signal GND22
+signal GND23
+signal GND24
+signal GND25
+signal GND26
+signal GND27
+signal GND28
+signal GND29
+signal GND30
+signal GND31
+signal GND32
+signal GND33
+signal GND34
+signal GND35
+signal GND36
+signal GND37
+signal GND38
+signal GND39
+signal GND40
+signal GND41
+signal GND42
+signal GND43
+signal GND44
+signal GND45
+signal GND46
+signal GND47
+signal GND48
+signal GND49
+signal GND50
+signal GND51
+signal GND52
+signal GND53
+signal GND54
+signal GND55
+signal GND56
+signal GND57
+signal GND58
+signal GND59
+signal GND60
+signal GND61
+signal GND62
+signal GND63
+signal GND64
+signal GND65
+signal GND66
+signal GND67
+signal GND68
+signal GND69
+signal GND70
+signal GND71
+signal GND72
+signal GND73
+signal GND74
+signal GND75
+signal GND76
+signal GND77
+signal GND78
+signal GND79
+signal GND80
+signal GND81
+signal GND82
+signal GND83
+signal GND84
+signal GND85
+signal GND86
+signal GND87
+signal GND88
+signal GND89
+signal GND90
+signal GND91
+signal GND92
+signal GND93
+signal GND94
+signal GND95
+signal GND96
+signal GND97
+signal GND98
+signal GND99
+signal GND100
+signal GND101
+signal GND102
+signal GND103
+signal GND104
+signal GND105
+signal GND106
+signal GND107
+signal GND108
+signal GND109
+signal GND110
+signal GND111
+signal GND112
+signal GND113
+signal GND114
+signal GND115
+signal GND116
+signal GND117
+signal GND118
+signal GP
+signal GPW_B
+signal MISO0
+signal MISO1
+signal MISO2
+signal MOSI0
+signal MOSI1
+signal MOSI2
+signal PC4
+signal PC6
+signal PC7
+signal PC8
+signal PC5
+signal NC
+signal NMI_B
+signal PC9
+signal PF0
+signal PF1
+signal PF2
+signal PF3
+signal PF4
+signal PF5
+signal PF6
+signal PF7
+signal PF8
+signal PF9
+signal PF10
+signal PF11
+signal PF12
+signal PF13
+signal PF14
+signal PF15
+signal PPI_CLK
+signal PPI0
+signal PPI1
+signal PPI2
+signal PPI3
+signal RESET_B
+signal RFS0
+signal RFS1
+signal RFS2
+signal RFS3
+signal RSCLK0
+signal RSCLK1
+signal RSCLK2
+signal RSCLK3
+signal RTXI
+signal RTXO
+signal RX0
+signal RX1
+signal RX2
+signal SA10
+signal SCAS_B
+signal SCK0
+signal SCK1
+signal SCK2
+signal SCKE
+signal SCL0
+signal SCL1
+signal SDA0
+signal SDA1
+signal SMS_B
+signal SPI1SS_B
+signal SPI1SEL1_B
+signal SPI2SS_B
+signal SPI2SEL1_B
+signal SRAS_B
+signal SWE_B
+signal TCK
+signal TDI
+signal TDO
+signal TFS0
+signal TFS1
+signal TFS2
+signal TFS3
+signal TMR0
+signal TMR1
+signal TMR2
+signal TMS
+signal TRST_B
+signal TSCLK0
+signal TSCLK1
+signal TSCLK2
+signal TSCLK3
+signal TX0
+signal TX1
+signal TX2
+signal VDDEXT0
+signal VDDEXT1
+signal VDDEXT2
+signal VDDEXT3
+signal VDDEXT4
+signal VDDEXT5
+signal VDDEXT6
+signal VDDEXT7
+signal VDDEXT8
+signal VDDEXT9
+signal VDDEXT10
+signal VDDEXT11
+signal VDDEXT12
+signal VDDEXT13
+signal VDDEXT14
+signal VDDEXT15
+signal VDDEXT16
+signal VDDEXT17
+signal VDDEXT18
+signal VDDEXT19
+signal VDDINT0
+signal VDDINT1
+signal VDDINT2
+signal VDDINT3
+signal VDDINT4
+signal VDDINT5
+signal VDDINT6
+signal VDDINT7
+signal VDDINT8
+signal VDDINT9
+signal VDDINT10
+signal VDDINT11
+signal VDDRTC
+signal VROUT0
+signal VROUT1
+
+register BSR 325
+register BR 1
+register DIR 32
+
+instruction length 5
+
+instruction BYPASS 11111 BR
+instruction EXTEST 00000 BSR
+instruction SAMPLE/PRELOAD 10000 BSR
+instruction IDCODE 00010 DIR
+
+bit 324 C 0 *
+bit 323 O 1 DATA0 324 0 Z
+bit 322 I 1 DATA0
+bit 321 O 1 DATA1 324 0 Z
+bit 320 I 1 DATA1
+bit 319 O 1 DATA2 324 0 Z
+bit 318 I 1 DATA2
+bit 317 C 0 *
+bit 316 O 1 TSCLK2 317 0 Z
+bit 315 I 1 TSCLK2
+bit 314 C 0 *
+bit 313 O 1 DR2SEC 314 0 Z
+bit 312 I 1 DR2SEC
+bit 311 C 0 *
+bit 310 O 1 DR2PRI 311 0 Z
+bit 309 I 1 DR2PRI
+bit 308 O 1 DATA3 324 0 Z
+bit 307 I 1 DATA3
+bit 306 O 1 DATA4 324 0 Z
+bit 305 I 1 DATA4
+bit 304 O 1 DATA5 324 0 Z
+bit 303 I 1 DATA5
+bit 302 O 1 DATA6 324 0 Z
+bit 301 I 1 DATA6
+bit 300 C 0 *
+bit 299 O 1 RFS2 300 0 Z
+bit 298 I 1 RFS2
+bit 297 O 1 DATA7 324 0 Z
+bit 296 I 1 DATA7
+bit 295 O 1 DATA8 324 0 Z
+bit 294 I 1 DATA8
+bit 293 O 1 DATA9 324 0 Z
+bit 292 I 1 DATA9
+bit 291 O 1 DATA10 324 0 Z
+bit 290 I 1 DATA10
+bit 289 O 1 DATA11 324 0 Z
+bit 288 I 1 DATA11
+bit 287 C 0 *
+bit 286 O 1 RSCLK2 287 0 Z
+bit 285 I 1 RSCLK2
+bit 284 C 0 *
+bit 283 O 1 RX2 284 0 Z
+bit 282 I 1 RX2
+bit 281 O 1 DATA12 324 0 Z
+bit 280 I 1 DATA12
+bit 279 O 1 DATA13 324 0 Z
+bit 278 I 1 DATA13
+bit 277 O 1 DATA14 324 0 Z
+bit 276 I 1 DATA14
+bit 275 O 1 DATA15 324 0 Z
+bit 274 I 1 DATA15
+bit 273 I 1 BMODE0
+bit 272 I 1 BMODE1
+bit 271 I 1 RX0
+bit 270 O 1 TX0
+bit 269 C 0 *
+bit 268 O 1 RSCLK1 269 0 Z
+bit 267 I 1 RSCLK1
+bit 266 C 0 *
+bit 265 O 1 TMR0 266 0 Z
+bit 264 I 1 TMR0
+bit 263 C 0 *
+bit 262 O 1 TMR1 263 0 Z
+bit 261 I 1 TMR1
+bit 260 C 0 *
+bit 259 O 1 TMR2 260 0 Z
+bit 258 I 1 TMR2
+bit 257 C 0 *
+bit 256 O 1 RSCLK0 257 0 Z
+bit 255 I 1 RSCLK0
+bit 254 C 0 *
+bit 253 O 1 RFS0 254 0 Z
+bit 252 I 1 RFS0
+bit 251 I 1 DR0PRI
+bit 250 I 1 DR0SEC
+bit 249 C 0 *
+bit 248 O 1 RFS1 249 0 Z
+bit 247 I 1 RFS1
+bit 246 I 1 DR1PRI
+bit 245 I 1 DR1SEC
+bit 244 C 0 *
+bit 243 O 1 TSCLK0 244 0 Z
+bit 242 I 1 TSCLK0
+bit 241 C 0 *
+bit 240 O 1 TFS0 241 0 Z
+bit 239 I 1 TFS0
+bit 238 C 0 *
+bit 237 O 1 DT0PRI 238 0 Z
+bit 236 C 0 *
+bit 235 O 1 DT0SEC 236 0 Z
+bit 234 C 0 *
+bit 233 O 1 PF0 234 0 Z
+bit 232 I 1 PF0
+bit 231 C 0 *
+bit 230 O 1 PF1 231 0 Z
+bit 229 I 1 PF1
+bit 228 C 0 *
+bit 227 O 1 PF2 228 0 Z
+bit 226 I 1 PF2
+bit 225 C 0 *
+bit 224 O 1 PF3 225 0 Z
+bit 223 I 1 PF3
+bit 222 C 0 *
+bit 221 O 1 PF4 222 0 Z
+bit 220 I 1 PF4
+bit 219 C 0 *
+bit 218 O 1 PF5 219 0 Z
+bit 217 I 1 PF5
+bit 216 C 0 *
+bit 215 O 1 TSCLK1 216 0 Z
+bit 214 I 1 TSCLK1
+bit 213 C 0 *
+bit 212 O 1 TFS1 213 0 Z
+bit 211 I 1 TFS1
+bit 210 C 0 *
+bit 209 O 1 DT1PRI 210 0 Z
+bit 208 C 0 *
+bit 207 O 1 PF6 208 0 Z
+bit 206 I 1 PF6
+bit 205 C 0 *
+bit 204 O 1 MOSI0 205 0 Z
+bit 203 I 1 MOSI0
+bit 202 C 0 *
+bit 201 O 1 MISO0 202 0 Z
+bit 200 I 1 MISO0
+bit 199 C 0 *
+bit 198 O 1 DT1SEC 199 0 Z
+bit 197 C 0 *
+bit 196 O 1 SCK0 197 0 Z
+bit 195 I 1 SCK0
+bit 194 C 0 *
+bit 193 O 1 PF7 194 0 Z
+bit 192 I 1 PF7
+bit 191 C 0 *
+bit 190 O 1 PF8 191 0 Z
+bit 189 I 1 PF8
+bit 188 C 0 *
+bit 187 O 1 PF9 188 0 Z
+bit 186 I 1 PF9
+bit 185 C 0 *
+bit 184 O 1 PF10 185 0 Z
+bit 183 I 1 PF10
+bit 182 C 0 *
+bit 181 O 1 PF11 182 0 Z
+bit 180 I 1 PF11
+bit 179 C 0 *
+bit 178 O 1 PF12 179 0 Z
+bit 177 I 1 PF12
+bit 176 C 0 *
+bit 175 O 1 PF13 176 0 Z
+bit 174 I 1 PF13
+bit 173 C 0 *
+bit 172 O 1 PF14 173 0 Z
+bit 171 I 1 PF14
+bit 170 C 0 *
+bit 169 O 1 PF15 170 0 Z
+bit 168 I 1 PF15
+bit 167 C 0 *
+bit 166 O 1 PPI3 167 0 Z
+bit 165 I 1 PPI3
+bit 164 C 0 *
+bit 163 O 1 PPI2 164 0 Z
+bit 162 I 1 PPI2
+bit 161 C 0 *
+bit 160 O 1 PPI1 161 0 Z
+bit 159 I 1 PPI1
+bit 158 C 0 *
+bit 157 O 1 PPI0 158 0 Z
+bit 156 I 1 PPI0
+bit 155 C 0 *
+bit 154 O 1 RX1 155 0 Z
+bit 153 I 1 RX1
+bit 152 C 0 *
+bit 151 O 1 TX1 152 0 Z
+bit 150 I 1 TX1
+bit 149 I 1 PPI_CLK
+bit 148 C 0 *
+bit 147 O 1 SCL0 148 0 Z
+bit 146 I 1 SCL0
+bit 145 C 0 *
+bit 144 O 1 SDA0 145 0 Z
+bit 143 I 1 SDA0
+bit 142 O 0 *
+bit 141 O 0 *
+bit 140 I 1 CANRX
+bit 139 C 0 *
+bit 138 O 1 CANTX 139 0 Z
+bit 137 I 1 CANTX
+bit 136 C 0 *
+bit 135 O 1 SPI2SEL1_B 136 0 Z
+bit 134 I 1 SPI2SEL1_B
+bit 133 C 0 *
+bit 132 O 1 SPI2SS_B 133 0 Z
+bit 131 I 1 SPI2SS_B
+bit 130 C 0 *
+bit 129 O 1 MOSI2 130 0 Z
+bit 128 I 1 MOSI2
+bit 127 C 0 *
+bit 126 O 1 MISO2 127 0 Z
+bit 125 I 1 MISO2
+bit 124 I 1 NMI_B
+bit 123 I 1 RESET_B
+bit 122 C 0 *
+bit 121 O 1 SCK2 122 0 Z
+bit 120 I 1 SCK2
+bit 119 C 0 *
+bit 118 O 1 SPI1SEL1_B 119 0 Z
+bit 117 I 1 SPI1SEL1_B
+bit 116 C 0 *
+bit 115 O 1 SPI1SS_B 116 0 Z
+bit 114 I 1 SPI1SS_B
+bit 113 C 0 *
+bit 112 O 1 MOSI1 113 0 Z
+bit 111 I 1 MOSI1
+bit 110 C 0 *
+bit 109 O 1 MISO1 110 0 Z
+bit 108 I 1 MISO1
+bit 107 C 0 *
+bit 106 O 1 SCK1 107 0 Z
+bit 105 I 1 SCK1
+bit 104 C 0 *
+bit 103 O 1 SCL1 104 0 Z
+bit 102 I 1 SCL1
+bit 101 C 0 *
+bit 100 O 1 SDA1 101 0 Z
+bit 99 I 1 SDA1
+bit 98 C 0 *
+bit 97 O 1 PC9 98 0 Z
+bit 96 I 1 PC9
+bit 95 O 0 *
+bit 94 O 0 *
+bit 93 I 1 GPW_B
+bit 92 O 1 SCKE 84 0 Z
+bit 91 O 1 SMS_B 84 0 Z
+bit 90 C 0 *
+bit 89 O 1 PC6 90 0 Z
+bit 88 I 1 PC6
+bit 87 C 0 *
+bit 86 O 1 PC7 87 0 Z
+bit 85 I 1 PC7
+bit 84 C 0 *
+bit 83 O 1 CLKOUT 84 0 Z
+bit 82 I 1 ARDY
+bit 81 I 1 BR_B
+bit 80 C 0 *
+bit 79 O 1 DT3SEC 80 0 Z
+bit 78 I 1 DT3SEC
+bit 77 C 0 *
+bit 76 O 1 DT3PRI 77 0 Z
+bit 75 I 1 DT3PRI
+bit 74 C 0 *
+bit 73 O 1 TFS3 74 0 Z
+bit 72 I 1 TFS3
+bit 71 O 1 SRAS_B 84 0 Z
+bit 70 O 1 SCAS_B 84 0 Z
+bit 69 O 1 SWE_B 84 0 Z
+bit 68 O 1 SA10 84 0 Z
+bit 67 C 0 *
+bit 66 O 1 PC8 67 0 Z
+bit 65 I 1 PC8
+bit 64 C 0 *
+bit 63 O 1 PC5 64 0 Z
+bit 62 I 1 PC5
+bit 61 O 0 *
+bit 60 O 0 *
+bit 59 I 1 PC4
+bit 58 O 1 AMS_B0 45 0 Z
+bit 57 C 0 *
+bit 56 O 1 TSCLK3 57 0 Z
+bit 55 I 1 TSCLK3
+bit 54 C 0 *
+bit 53 O 1 DR3SEC 54 0 Z
+bit 52 I 1 DR3SEC
+bit 51 C 0 *
+bit 50 O 1 DR3PRI 51 0 Z
+bit 49 I 1 DR3PRI
+bit 48 O 1 AMS_B1 45 0 Z
+bit 47 O 1 AMS_B2 45 0 Z
+bit 46 O 1 AMS_B3 45 0 Z
+bit 45 C 0 *
+bit 44 O 1 AOE_B 45 0 Z
+bit 43 O 1 ARE_B 45 0 Z
+bit 42 O 1 AWE_B 45 0 Z
+bit 41 O 1 ABE_B0 26 0 Z
+bit 40 O 1 ABE_B1 26 0 Z
+bit 39 C 0 *
+bit 38 O 1 RFS3 39 0 Z
+bit 37 I 1 RFS3
+bit 36 C 0 *
+bit 35 O 1 RSCLK3 36 0 Z
+bit 34 I 1 RSCLK3
+bit 33 C 0 *
+bit 32 O 1 TX2 33 0 Z
+bit 31 I 1 TX2
+bit 30 O 1 ADDR1 26 0 Z
+bit 29 O 1 ADDR2 26 0 Z
+bit 28 O 1 ADDR3 26 0 Z
+bit 27 O 1 ADDR4 26 0 Z
+bit 26 C 0 *
+bit 25 O 1 ADDR5 26 0 Z
+bit 24 O 1 ADDR6 26 0 Z
+bit 23 O 1 ADDR7 26 0 Z
+bit 22 O 1 ADDR8 26 0 Z
+bit 21 O 1 ADDR9 26 0 Z
+bit 20 O 1 ADDR10 26 0 Z
+bit 19 O 1 ADDR11 26 0 Z
+bit 18 O 1 ADDR12 26 0 Z
+bit 17 O 1 ADDR13 26 0 Z
+bit 16 O 1 ADDR14 26 0 Z
+bit 15 C 0 *
+bit 14 O 1 DT2SEC 15 0 Z
+bit 13 I 1 DT2SEC
+bit 12 C 0 *
+bit 11 O 1 DT2PRI 12 0 Z
+bit 10 I 1 DT2PRI
+bit 9 O 1 ADDR15 26 0 Z
+bit 8 O 1 ADDR16 26 0 Z
+bit 7 O 1 ADDR17 26 0 Z
+bit 6 O 1 ADDR18 26 0 Z
+bit 5 O 1 ADDR19 26 0 Z
+bit 4 C 0 *
+bit 3 O 1 TFS2 4 0 Z
+bit 2 I 1 TFS2
+bit 1 O 1 BGH_B
+bit 0 O 1 BG_B
--- /dev/null
+#
+# $Id: STEPPINGS 75 2005-11-11 09:12:34Z jiez $
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Richard Klingler <richard@klingler.net>
+#
+
+# bits 31-28 of the Device Identification Register
+0000 bf548 0
+0001 bf548 1
+0010 bf548 2
+0011 bf548 3
--- /dev/null
+signal PORTA_0
+signal PORTA_1
+signal PORTA_2
+signal PORTA_3
+signal PORTA_4
+signal PORTA_5
+signal PORTA_6
+signal PORTA_7
+signal PORTA_8
+signal PORTA_9
+signal PORTA_10
+signal PORTA_11
+signal PORTA_12
+signal PORTA_13
+signal PORTA_14
+signal PORTA_15
+signal PORTB_0
+signal PORTB_1
+signal PORTB_2
+signal PORTB_3
+signal PORTB_4
+signal PORTB_5
+signal PORTB_6
+signal PORTB_7
+signal PORTB_8
+signal PORTB_9
+signal PORTB_10
+signal PORTB_11
+signal PORTB_12
+signal PORTB_13
+signal PORTB_14
+signal PORTC_0
+signal PORTC_1
+signal PORTC_2
+signal PORTC_3
+signal PORTC_4
+signal PORTC_5
+signal PORTC_6
+signal PORTC_7
+signal PORTC_8
+signal PORTC_9
+signal PORTC_10
+signal PORTC_11
+signal PORTC_12
+signal PORTC_13
+signal PORTD_0
+signal PORTD_1
+signal PORTD_2
+signal PORTD_3
+signal PORTD_4
+signal PORTD_5
+signal PORTD_6
+signal PORTD_7
+signal PORTD_8
+signal PORTD_9
+signal PORTD_10
+signal PORTD_11
+signal PORTD_12
+signal PORTD_13
+signal PORTD_14
+signal PORTD_15
+signal PORTE_0
+signal PORTE_1
+signal PORTE_2
+signal PORTE_3
+signal PORTE_4
+signal PORTE_5
+signal PORTE_6
+signal PORTE_7
+signal PORTE_8
+signal PORTE_9
+signal PORTE_10
+signal PORTE_11
+signal PORTE_12
+signal PORTE_13
+signal PORTE_14
+signal PORTE_15
+signal PORTF_0
+signal PORTF_1
+signal PORTF_2
+signal PORTF_3
+signal PORTF_4
+signal PORTF_5
+signal PORTF_6
+signal PORTF_7
+signal PORTF_8
+signal PORTF_9
+signal PORTF_10
+signal PORTF_11
+signal PORTF_12
+signal PORTF_13
+signal PORTF_14
+signal PORTF_15
+signal PORTG_0
+signal PORTG_1
+signal PORTG_2
+signal PORTG_3
+signal PORTG_4
+signal PORTG_5
+signal PORTG_6
+signal PORTG_7
+signal PORTG_8
+signal PORTG_9
+signal PORTG_10
+signal PORTG_11
+signal PORTG_12
+signal PORTG_13
+signal PORTG_14
+signal PORTG_15
+signal PORTH_0
+signal PORTH_1
+signal PORTH_2
+signal PORTH_3
+signal PORTH_4
+signal PORTH_5
+signal PORTH_6
+signal PORTH_7
+signal PORTH_8
+signal PORTH_9
+signal PORTH_10
+signal PORTH_11
+signal PORTH_12
+signal PORTH_13
+signal PORTI_0
+signal PORTI_1
+signal PORTI_2
+signal PORTI_3
+signal PORTI_4
+signal PORTI_5
+signal PORTI_6
+signal PORTI_7
+signal PORTI_8
+signal PORTI_9
+signal PORTI_10
+signal PORTI_11
+signal PORTI_12
+signal PORTI_13
+signal PORTI_14
+signal PORTI_15
+signal PORTJ_0
+signal PORTJ_1
+signal PORTJ_2
+signal PORTJ_3
+signal PORTJ_4
+signal PORTJ_5
+signal PORTJ_6
+signal PORTJ_7
+signal PORTJ_8
+signal PORTJ_9
+signal PORTJ_10
+signal PORTJ_11
+signal PORTJ_12
+signal PORTJ_13
+signal ATAPI_PDIAG
+signal ABE0B
+signal ABE1B
+signal CLKOUT
+signal DQ0
+signal DQ1
+signal DQ2
+signal DQ3
+signal DQ4
+signal DQ5
+signal DQ6
+signal DQ7
+signal DQ8
+signal DQ9
+signal DQ10
+signal DQ11
+signal DQ12
+signal DQ13
+signal DQ14
+signal DQ15
+signal LDM
+signal UDM
+signal LDQS
+signal UDQS
+signal BA0
+signal BA1
+signal A0
+signal A1
+signal A2
+signal A3
+signal A4
+signal A5
+signal A6
+signal A7
+signal A8
+signal A9
+signal A10
+signal A11
+signal A12
+signal WE_B
+signal CAS_B
+signal RAS_B
+signal CS0_B
+signal CS1_B
+signal CKE
+signal CK2_B
+signal CK2
+signal CK1_B
+signal CK1
+signal DATA15
+signal DATA14
+signal DATA13
+signal DATA12
+signal DATA11
+signal DATA10
+signal DATA9
+signal DATA8
+signal DATA7
+signal DATA6
+signal DATA5
+signal DATA4
+signal DATA3
+signal DATA2
+signal DATA1
+signal DATA0
+signal AWEB
+signal AREB
+signal RESETB
+signal NMIB
+signal AOEB
+signal AMS3B
+signal AMS2B
+signal AMS1B
+signal AMS0B
+signal ADDR3
+signal ADDR2
+signal ADDR1
+signal MFS
+signal BMODE0
+signal BMODE1
+signal BMODE2
+signal BMODE3
+signal TCK
+signal TDI
+signal TDO
+signal TMS
+signal TRSTB
+signal EMU_B
+signal IVDD0
+signal IVDD1
+signal IVDD2
+signal IVDD3
+signal IVDD4
+signal IVDD5
+signal IVDD6
+signal IVDD7
+signal IVDD8
+signal IVDD9
+signal IVDD10
+signal IVDD11
+signal IVDD12
+signal IVDD13
+signal IVDD14
+signal EVDD0
+signal EVDD1
+signal EVDD2
+signal EVDD3
+signal EVDD4
+signal EVDD5
+signal EVDD6
+signal EVDD7
+signal EVDD8
+signal EVDD9
+signal EVDD10
+signal EVDD11
+signal EVDD12
+signal EVDD13
+signal EVDD14
+signal EVDD15
+signal EVDD16
+signal EVDD17
+signal EVDD18
+signal EVDD19
+signal EVDD20
+signal EVDD21
+signal EVDD22
+signal EVDD23
+signal EVDD24
+signal EVDD25
+signal EVDD26
+signal EVDD27
+signal EVDD28
+signal EVDD29
+signal EVDD30
+signal EVDD31
+signal DVDD0
+signal DVDD1
+signal DVDD2
+signal DVDD3
+signal DVDD4
+signal DVDD5
+signal DVDD6
+signal DVDD7
+signal DVDD8
+signal DVDD9
+signal DVDD10
+signal GND0
+signal GND1
+signal GND2
+signal GND3
+signal GND4
+signal GND5
+signal GND6
+signal GND7
+signal GND8
+signal GND9
+signal GND10
+signal GND11
+signal GND12
+signal GND13
+signal GND14
+signal GND15
+signal GND16
+signal GND17
+signal GND18
+signal GND19
+signal GND20
+signal GND21
+signal GND22
+signal GND23
+signal GND24
+signal GND25
+signal GND26
+signal GND27
+signal GND28
+signal GND29
+signal GND30
+signal GND31
+signal GND32
+signal GND33
+signal GND34
+signal GND35
+signal GND36
+signal GND37
+signal GND38
+signal GND39
+signal GND40
+signal GND41
+signal GND42
+signal GND43
+signal GND44
+signal GND45
+signal GND46
+signal GND47
+signal GND48
+signal GND49
+signal GND50
+signal GND51
+signal GND52
+signal GND53
+signal GND54
+signal GND55
+signal GND56
+signal GND57
+signal GND58
+signal GND59
+signal GND60
+signal GND61
+signal GND62
+signal GND63
+signal GND64
+signal GND65
+signal GND66
+signal GND67
+signal GND68
+signal GND69
+signal EGND_MC
+signal EGND_MX
+signal EVDD_MC
+signal EVDD_MX
+signal IVDD_MP
+signal IGND_MP
+signal RTCVDD
+signal EXT_WAKE
+signal DDR_VREF
+signal DDR_VSSR
+signal CLKIN
+signal XTAL
+signal RTXI
+signal RTXO
+signal PHYCLK
+signal MLF_M
+signal MLF_P
+signal MXI
+signal MXO
+signal VROUT_A
+signal VROUT_B
+signal USB_DP
+signal USB_DM
+signal USB_ID
+signal USB_RSET
+signal USB_VBUS
+signal USB_VDDA
+signal USB_VDDB
+signal USB_VREF
+signal USB_XI
+
+register BSR 636
+register BR 1
+register DIR 32
+
+instruction length 5
+
+instruction EXTEST 00000 BSR
+instruction SAMPLE/PRELOAD 10000 BSR
+instruction IDCODE 00010 DIR
+instruction BYPASS 11111 BR
+
+bit 635 C 0 *
+bit 634 O 1 PORTA_10 635 0 Z
+bit 633 I 1 PORTA_10
+bit 632 C 0 *
+bit 631 O 1 PORTA_11 632 0 Z
+bit 630 I 1 PORTA_11
+bit 629 C 0 *
+bit 628 O 1 PORTA_12 629 0 Z
+bit 627 I 1 PORTA_12
+bit 626 C 0 *
+bit 625 O 1 PORTA_13 626 0 Z
+bit 624 I 1 PORTA_13
+bit 623 C 0 *
+bit 622 O 1 PORTA_14 623 0 Z
+bit 621 I 1 PORTA_14
+bit 620 C 0 *
+bit 619 O 1 PORTA_15 620 0 Z
+bit 618 I 1 PORTA_15
+bit 617 C 0 *
+bit 616 O 1 PORTB_12 617 0 Z
+bit 615 I 1 PORTB_12
+bit 614 C 0 *
+bit 613 O 1 PORTB_13 614 0 Z
+bit 612 I 1 PORTB_13
+bit 611 C 0 *
+bit 610 O 1 PORTB_14 611 0 Z
+bit 609 I 1 PORTB_14
+bit 608 C 0 *
+bit 607 O 1 PORTB_8 608 0 Z
+bit 606 I 1 PORTB_8
+bit 605 C 0 *
+bit 604 O 1 PORTB_9 605 0 Z
+bit 603 I 1 PORTB_9
+bit 602 C 0 *
+bit 601 O 1 PORTB_10 602 0 Z
+bit 600 I 1 PORTB_10
+bit 599 C 0 *
+bit 598 O 1 PORTB_11 599 0 Z
+bit 597 I 1 PORTB_11
+bit 596 C 0 *
+bit 595 O 1 PORTB_4 596 0 Z
+bit 594 I 1 PORTB_4
+bit 593 C 0 *
+bit 592 O 1 PORTB_5 593 0 Z
+bit 591 I 1 PORTB_5
+bit 590 C 0 *
+bit 589 O 1 PORTB_6 590 0 Z
+bit 588 I 1 PORTB_6
+bit 587 C 0 *
+bit 586 O 1 PORTB_7 587 0 Z
+bit 585 I 1 PORTB_7
+bit 584 O 1 *
+bit 583 O 1 PORTB_1 583 1 Z
+bit 582 I 1 PORTB_1
+bit 581 O 1 *
+bit 580 O 1 PORTB_0 580 1 Z
+bit 579 I 1 PORTB_0
+bit 578 C 0 *
+bit 577 O 1 PORTB_2 578 0 Z
+bit 576 I 1 PORTB_2
+bit 575 C 0 *
+bit 574 O 1 PORTB_3 575 0 Z
+bit 573 I 1 PORTB_3
+bit 572 O 0 *
+bit 571 I 1 BMODE3
+bit 570 I 1 BMODE2
+bit 569 I 1 BMODE1
+bit 568 I 1 BMODE0
+bit 567 C 0 *
+bit 566 O 1 PORTD_14 567 0 Z
+bit 565 I 1 PORTD_14
+bit 564 C 0 *
+bit 563 O 1 PORTD_15 564 0 Z
+bit 562 I 1 PORTD_15
+bit 561 C 0 *
+bit 560 O 1 PORTD_13 561 0 Z
+bit 559 I 1 PORTD_13
+bit 558 C 0 *
+bit 557 O 1 PORTD_12 558 0 Z
+bit 556 I 1 PORTD_12
+bit 555 C 0 *
+bit 554 O 1 PORTD_11 555 0 Z
+bit 553 I 1 PORTD_11
+bit 552 C 0 *
+bit 551 O 1 PORTD_10 552 0 Z
+bit 550 I 1 PORTD_10
+bit 549 C 0 *
+bit 548 O 1 PORTD_9 549 0 Z
+bit 547 I 1 PORTD_9
+bit 546 C 0 *
+bit 545 O 1 PORTD_8 546 0 Z
+bit 544 I 1 PORTD_8
+bit 543 C 0 *
+bit 542 O 1 PORTD_7 543 0 Z
+bit 541 I 1 PORTD_7
+bit 540 C 0 *
+bit 539 O 1 PORTD_6 540 0 Z
+bit 538 I 1 PORTD_6
+bit 537 C 0 *
+bit 536 O 1 PORTD_5 537 0 Z
+bit 535 I 1 PORTD_5
+bit 534 C 0 *
+bit 533 O 1 PORTD_4 534 0 Z
+bit 532 I 1 PORTD_4
+bit 531 C 0 *
+bit 530 O 1 PORTD_3 531 0 Z
+bit 529 I 1 PORTD_3
+bit 528 C 0 *
+bit 527 O 1 PORTD_2 528 0 Z
+bit 526 I 1 PORTD_2
+bit 525 C 0 *
+bit 524 O 1 PORTD_1 525 0 Z
+bit 523 I 1 PORTD_1
+bit 522 C 0 *
+bit 521 O 1 PORTD_0 522 0 Z
+bit 520 I 1 PORTD_0
+bit 519 C 0 *
+bit 518 O 1 PORTE_13 519 0 Z
+bit 517 I 1 PORTE_13
+bit 516 C 0 *
+bit 515 O 1 PORTE_12 516 0 Z
+bit 514 I 1 PORTE_12
+bit 513 C 0 *
+bit 512 O 1 PORTE_11 513 0 Z
+bit 511 I 1 PORTE_11
+bit 510 C 0 *
+bit 509 O 1 PORTG_4 510 0 Z
+bit 508 I 1 PORTG_4
+bit 507 C 0 *
+bit 506 O 1 PORTG_3 507 0 Z
+bit 505 I 1 PORTG_3
+bit 504 C 0 *
+bit 503 O 1 PORTF_15 504 0 Z
+bit 502 I 1 PORTF_15
+bit 501 C 0 *
+bit 500 O 1 PORTF_14 501 0 Z
+bit 499 I 1 PORTF_14
+bit 498 C 0 *
+bit 497 O 1 PORTF_13 498 0 Z
+bit 496 I 1 PORTF_13
+bit 495 C 0 *
+bit 494 O 1 PORTF_12 495 0 Z
+bit 493 I 1 PORTF_12
+bit 492 C 0 *
+bit 491 O 1 PORTF_11 492 0 Z
+bit 490 I 1 PORTF_11
+bit 489 C 0 *
+bit 488 O 1 PORTF_10 489 0 Z
+bit 487 I 1 PORTF_10
+bit 486 C 0 *
+bit 485 O 1 PORTF_9 486 0 Z
+bit 484 I 1 PORTF_9
+bit 483 C 0 *
+bit 482 O 1 PORTF_8 483 0 Z
+bit 481 I 1 PORTF_8
+bit 480 C 0 *
+bit 479 O 1 PORTF_7 480 0 Z
+bit 478 I 1 PORTF_7
+bit 477 C 0 *
+bit 476 O 1 PORTF_6 477 0 Z
+bit 475 I 1 PORTF_6
+bit 474 C 0 *
+bit 473 O 1 PORTF_5 474 0 Z
+bit 472 I 1 PORTF_5
+bit 471 C 0 *
+bit 470 O 1 PORTF_4 471 0 Z
+bit 469 I 1 PORTF_4
+bit 468 C 0 *
+bit 467 O 1 PORTF_3 468 0 Z
+bit 466 I 1 PORTF_3
+bit 465 C 0 *
+bit 464 O 1 PORTF_2 465 0 Z
+bit 463 I 1 PORTF_2
+bit 462 C 0 *
+bit 461 O 1 PORTF_1 462 0 Z
+bit 460 I 1 PORTF_1
+bit 459 C 0 *
+bit 458 O 1 PORTF_0 459 0 Z
+bit 457 I 1 PORTF_0
+bit 456 C 0 *
+bit 455 O 1 PORTG_2 456 0 Z
+bit 454 I 1 PORTG_2
+bit 453 C 0 *
+bit 452 O 1 PORTG_1 453 0 Z
+bit 451 I 1 PORTG_1
+bit 450 C 0 *
+bit 449 O 1 PORTG_0 450 0 Z
+bit 448 I 1 PORTG_0
+bit 447 C 0 *
+bit 446 O 1 PORTC_3 447 0 Z
+bit 445 I 1 PORTC_3
+bit 444 C 0 *
+bit 443 O 1 PORTC_2 444 0 Z
+bit 442 I 1 PORTC_2
+bit 441 C 0 *
+bit 440 O 1 PORTC_1 441 0 Z
+bit 439 I 1 PORTC_1
+bit 438 C 0 *
+bit 437 O 1 PORTC_0 438 0 Z
+bit 436 I 1 PORTC_0
+bit 435 C 0 *
+bit 434 O 1 PORTC_7 435 0 Z
+bit 433 I 1 PORTC_7
+bit 432 C 0 *
+bit 431 O 1 PORTC_6 432 0 Z
+bit 430 I 1 PORTC_6
+bit 429 C 0 *
+bit 428 O 1 PORTC_5 429 0 Z
+bit 427 I 1 PORTC_5
+bit 426 C 0 *
+bit 425 O 1 PORTC_4 426 0 Z
+bit 424 I 1 PORTC_4
+bit 423 C 0 *
+bit 422 O 1 PORTH_7 423 0 Z
+bit 421 I 1 PORTH_7
+bit 420 C 0 *
+bit 419 O 1 PORTH_5 420 0 Z
+bit 418 I 1 PORTH_5
+bit 417 C 0 *
+bit 416 O 1 MFS 417 0 Z
+bit 415 I 1 MFS
+bit 414 C 0 *
+bit 413 O 1 PORTH_6 414 0 Z
+bit 412 I 1 PORTH_6
+bit 411 C 0 *
+bit 410 O 1 ADDR1 411 0 Z
+bit 409 I 1 ADDR1
+bit 408 C 0 *
+bit 407 O 1 ADDR2 408 0 Z
+bit 406 I 1 ADDR2
+bit 405 C 0 *
+bit 404 O 1 ADDR3 405 0 Z
+bit 403 I 1 ADDR3
+bit 402 C 0 *
+bit 401 O 1 PORTH_8 402 0 Z
+bit 400 I 1 PORTH_8
+bit 399 C 0 *
+bit 398 O 1 PORTH_9 399 0 Z
+bit 397 I 1 PORTH_9
+bit 396 C 0 *
+bit 395 O 1 PORTH_10 396 0 Z
+bit 394 I 1 PORTH_10
+bit 393 C 0 *
+bit 392 O 1 PORTH_11 393 0 Z
+bit 391 I 1 PORTH_11
+bit 390 C 0 *
+bit 389 O 1 PORTH_12 390 0 Z
+bit 388 I 1 PORTH_12
+bit 387 C 0 *
+bit 386 O 1 PORTH_13 387 0 Z
+bit 385 I 1 PORTH_13
+bit 384 C 0 *
+bit 383 O 1 PORTI_0 384 0 Z
+bit 382 I 1 PORTI_0
+bit 381 C 0 *
+bit 380 O 1 PORTI_1 381 0 Z
+bit 379 I 1 PORTI_1
+bit 378 C 0 *
+bit 377 O 1 PORTI_2 378 0 Z
+bit 376 I 1 PORTI_2
+bit 375 C 0 *
+bit 374 O 1 PORTI_3 375 0 Z
+bit 373 I 1 PORTI_3
+bit 372 C 0 *
+bit 371 O 1 PORTI_4 372 0 Z
+bit 370 I 1 PORTI_4
+bit 369 C 0 *
+bit 368 O 1 PORTI_5 369 0 Z
+bit 367 I 1 PORTI_5
+bit 366 C 0 *
+bit 365 O 1 PORTI_6 366 0 Z
+bit 364 I 1 PORTI_6
+bit 363 C 0 *
+bit 362 O 1 PORTI_7 363 0 Z
+bit 361 I 1 PORTI_7
+bit 360 C 0 *
+bit 359 O 1 PORTI_8 360 0 Z
+bit 358 I 1 PORTI_8
+bit 357 C 0 *
+bit 356 O 1 PORTI_9 357 0 Z
+bit 355 I 1 PORTI_9
+bit 354 C 0 *
+bit 353 O 1 PORTI_10 354 0 Z
+bit 352 I 1 PORTI_10
+bit 351 C 0 *
+bit 350 O 1 PORTI_11 351 0 Z
+bit 349 I 1 PORTI_11
+bit 348 C 0 *
+bit 347 O 1 PORTI_12 348 0 Z
+bit 346 I 1 PORTI_12
+bit 345 C 0 *
+bit 344 O 1 PORTI_13 345 0 Z
+bit 343 I 1 PORTI_13
+bit 342 C 0 *
+bit 341 O 1 PORTI_14 342 0 Z
+bit 340 I 1 PORTI_14
+bit 339 C 0 *
+bit 338 O 1 PORTI_15 339 0 Z
+bit 337 I 1 PORTI_15
+bit 336 C 0 *
+bit 335 O 1 AMS0B 336 0 Z
+bit 334 I 1 AMS0B
+bit 333 C 0 *
+bit 332 O 1 AMS1B 333 0 Z
+bit 331 I 1 AMS1B
+bit 330 C 0 *
+bit 329 O 1 AMS2B 330 0 Z
+bit 328 I 1 AMS2B
+bit 327 C 0 *
+bit 326 O 1 AMS3B 327 0 Z
+bit 325 I 1 AMS3B
+bit 324 C 0 *
+bit 323 O 1 AOEB 324 0 Z
+bit 322 I 1 AOEB
+bit 321 I 1 NMIB
+bit 320 I 1 RESETB
+bit 319 C 0 *
+bit 318 O 1 AREB 319 0 Z
+bit 317 I 1 AREB
+bit 316 C 0 *
+bit 315 O 1 AWEB 316 0 Z
+bit 314 I 1 AWEB
+bit 313 C 0 *
+bit 312 O 1 DATA0 313 0 Z
+bit 311 I 1 DATA0
+bit 310 C 0 *
+bit 309 O 1 DATA1 310 0 Z
+bit 308 I 1 DATA1
+bit 307 C 0 *
+bit 306 O 1 DATA2 307 0 Z
+bit 305 I 1 DATA2
+bit 304 C 0 *
+bit 303 O 1 DATA3 304 0 Z
+bit 302 I 1 DATA3
+bit 301 C 0 *
+bit 300 O 1 DATA4 301 0 Z
+bit 299 I 1 DATA4
+bit 298 C 0 *
+bit 297 O 1 DATA5 298 0 Z
+bit 296 I 1 DATA5
+bit 295 C 0 *
+bit 294 O 1 DATA6 295 0 Z
+bit 293 I 1 DATA6
+bit 292 C 0 *
+bit 291 O 1 DATA7 292 0 Z
+bit 290 I 1 DATA7
+bit 289 C 0 *
+bit 288 O 1 DATA8 289 0 Z
+bit 287 I 1 DATA8
+bit 286 C 0 *
+bit 285 O 1 DATA9 286 0 Z
+bit 284 I 1 DATA9
+bit 283 C 0 *
+bit 282 O 1 DATA10 283 0 Z
+bit 281 I 1 DATA10
+bit 280 C 0 *
+bit 279 O 1 DATA11 280 0 Z
+bit 278 I 1 DATA11
+bit 277 C 0 *
+bit 276 O 1 DATA12 277 0 Z
+bit 275 I 1 DATA12
+bit 274 C 0 *
+bit 273 O 1 DATA13 274 0 Z
+bit 272 I 1 DATA13
+bit 271 C 0 *
+bit 270 O 1 DATA14 271 0 Z
+bit 269 I 1 DATA14
+bit 268 C 0 *
+bit 267 O 1 DATA15 268 0 Z
+bit 266 I 1 DATA15
+bit 265 C 0 *
+bit 264 O 1 ABE1B 265 0 Z
+bit 263 I 1 ABE1B
+bit 262 C 0 *
+bit 261 O 1 ABE0B 262 0 Z
+bit 260 I 1 ABE0B
+bit 259 O 1 CK1
+bit 258 O 1 CK1_B
+bit 257 O 1 CK2
+bit 256 O 1 CK2_B
+bit 255 O 1 CKE
+bit 254 O 1 CS1_B
+bit 253 O 1 CS0_B
+bit 252 O 1 RAS_B
+bit 251 O 1 CAS_B
+bit 250 O 1 WE_B
+bit 249 O 1 A12
+bit 248 O 1 A11
+bit 247 O 1 A10
+bit 246 O 1 A9
+bit 245 O 1 A8
+bit 244 O 1 A7
+bit 243 O 1 A6
+bit 242 O 1 A5
+bit 241 O 1 A4
+bit 240 O 1 A3
+bit 239 O 1 A2
+bit 238 O 1 A1
+bit 237 O 1 A0
+bit 236 O 1 BA1
+bit 235 O 1 BA0
+bit 234 C 0 *
+bit 233 O 1 UDQS 234 0 Z
+bit 232 I 1 UDQS
+bit 231 C 0 *
+bit 230 O 1 LDQS 231 0 Z
+bit 229 I 1 LDQS
+bit 228 O 1 UDM
+bit 227 O 1 LDM
+bit 226 C 0 *
+bit 225 O 1 DQ15 226 0 Z
+bit 224 I 1 DQ15
+bit 223 C 0 *
+bit 222 O 1 DQ14 223 0 Z
+bit 221 I 1 DQ14
+bit 220 C 0 *
+bit 219 O 1 DQ13 220 0 Z
+bit 218 I 1 DQ13
+bit 217 C 0 *
+bit 216 O 1 DQ12 217 0 Z
+bit 215 I 1 DQ12
+bit 214 C 0 *
+bit 213 O 1 DQ11 214 0 Z
+bit 212 I 1 DQ11
+bit 211 C 0 *
+bit 210 O 1 DQ10 211 0 Z
+bit 209 I 1 DQ10
+bit 208 C 0 *
+bit 207 O 1 DQ9 208 0 Z
+bit 206 I 1 DQ9
+bit 205 C 0 *
+bit 204 O 1 DQ8 205 0 Z
+bit 203 I 1 DQ8
+bit 202 C 0 *
+bit 201 O 1 DQ7 202 0 Z
+bit 200 I 1 DQ7
+bit 199 C 0 *
+bit 198 O 1 DQ6 199 0 Z
+bit 197 I 1 DQ6
+bit 196 C 0 *
+bit 195 O 1 DQ5 196 0 Z
+bit 194 I 1 DQ5
+bit 193 C 0 *
+bit 192 O 1 DQ4 193 0 Z
+bit 191 I 1 DQ4
+bit 190 C 0 *
+bit 189 O 1 DQ3 190 0 Z
+bit 188 I 1 DQ3
+bit 187 C 0 *
+bit 186 O 1 DQ2 187 0 Z
+bit 185 I 1 DQ2
+bit 184 C 0 *
+bit 183 O 1 DQ1 184 0 Z
+bit 182 I 1 DQ1
+bit 181 C 0 *
+bit 180 O 1 DQ0 181 0 Z
+bit 179 I 1 DQ0
+bit 178 O 1 CLKOUT
+bit 177 C 0 *
+bit 176 O 1 PORTJ_11 177 0 Z
+bit 175 I 1 PORTJ_11
+bit 174 C 0 *
+bit 173 O 1 PORTJ_12 174 0 Z
+bit 172 I 1 PORTJ_12
+bit 171 C 0 *
+bit 170 O 1 PORTJ_13 171 0 Z
+bit 169 I 1 PORTJ_13
+bit 168 C 0 *
+bit 167 O 1 PORTJ_0 168 0 Z
+bit 166 I 1 PORTJ_0
+bit 165 C 0 *
+bit 164 O 1 PORTJ_1 165 0 Z
+bit 163 I 1 PORTJ_1
+bit 162 C 0 *
+bit 161 O 1 PORTJ_2 162 0 Z
+bit 160 I 1 PORTJ_2
+bit 159 C 0 *
+bit 158 O 1 PORTJ_3 159 0 Z
+bit 157 I 1 PORTJ_3
+bit 156 C 0 *
+bit 155 O 1 PORTJ_4 156 0 Z
+bit 154 I 1 PORTJ_4
+bit 153 I 1 ATAPI_PDIAG
+bit 152 C 0 *
+bit 151 O 1 PORTJ_5 152 0 Z
+bit 150 I 1 PORTJ_5
+bit 149 C 0 *
+bit 148 O 1 PORTJ_6 149 0 Z
+bit 147 I 1 PORTJ_6
+bit 146 C 0 *
+bit 145 O 1 PORTJ_7 146 0 Z
+bit 144 I 1 PORTJ_7
+bit 143 C 0 *
+bit 142 O 1 PORTJ_8 143 0 Z
+bit 141 I 1 PORTJ_8
+bit 140 C 0 *
+bit 139 O 1 PORTJ_9 140 0 Z
+bit 138 I 1 PORTJ_9
+bit 137 C 0 *
+bit 136 O 1 PORTJ_10 137 0 Z
+bit 135 I 1 PORTJ_10
+bit 134 C 0 *
+bit 133 O 1 PORTG_13 134 0 Z
+bit 132 I 1 PORTG_13
+bit 131 C 0 *
+bit 130 O 1 PORTG_12 131 0 Z
+bit 129 I 1 PORTG_12
+bit 128 C 0 *
+bit 127 O 1 PORTE_7 128 0 Z
+bit 126 I 1 PORTE_7
+bit 125 C 0 *
+bit 124 O 1 PORTE_8 125 0 Z
+bit 123 I 1 PORTE_8
+bit 122 C 0 *
+bit 121 O 1 PORTE_9 122 0 Z
+bit 120 I 1 PORTE_9
+bit 119 C 0 *
+bit 118 O 1 PORTE_10 119 0 Z
+bit 117 I 1 PORTE_10
+bit 116 C 0 *
+bit 115 O 1 PORTE_0 116 0 Z
+bit 114 I 1 PORTE_0
+bit 113 C 0 *
+bit 112 O 1 PORTE_1 113 0 Z
+bit 111 I 1 PORTE_1
+bit 110 C 0 *
+bit 109 O 1 PORTE_2 110 0 Z
+bit 108 I 1 PORTE_2
+bit 107 C 0 *
+bit 106 O 1 PORTE_4 107 0 Z
+bit 105 I 1 PORTE_4
+bit 104 C 0 *
+bit 103 O 1 PORTE_5 104 0 Z
+bit 102 I 1 PORTE_5
+bit 101 C 0 *
+bit 100 O 1 PORTE_6 101 0 Z
+bit 99 I 1 PORTE_6
+bit 98 C 0 *
+bit 97 O 1 PORTH_4 98 0 Z
+bit 96 I 1 PORTH_4
+bit 95 C 0 *
+bit 94 O 1 PORTH_3 95 0 Z
+bit 93 I 1 PORTH_3
+bit 92 C 0 *
+bit 91 O 1 PORTH_2 92 0 Z
+bit 90 I 1 PORTH_2
+bit 89 C 0 *
+bit 88 O 1 PORTH_0 89 0 Z
+bit 87 I 1 PORTH_0
+bit 86 O 1 *
+bit 85 O 1 PORTE_15 85 1 Z
+bit 84 I 1 PORTE_15
+bit 83 O 1 *
+bit 82 O 1 PORTE_14 82 1 Z
+bit 81 I 1 PORTE_14
+bit 80 C 0 *
+bit 79 O 1 PORTG_8 80 0 Z
+bit 78 I 1 PORTG_8
+bit 77 C 0 *
+bit 76 O 1 PORTG_9 77 0 Z
+bit 75 I 1 PORTG_9
+bit 74 C 0 *
+bit 73 O 1 PORTG_10 74 0 Z
+bit 72 I 1 PORTG_10
+bit 71 C 0 *
+bit 70 O 1 PORTG_11 71 0 Z
+bit 69 I 1 PORTG_11
+bit 68 C 0 *
+bit 67 O 1 PORTG_5 68 0 Z
+bit 66 I 1 PORTG_5
+bit 65 C 0 *
+bit 64 O 1 PORTG_6 65 0 Z
+bit 63 I 1 PORTG_6
+bit 62 C 0 *
+bit 61 O 1 PORTG_7 62 0 Z
+bit 60 I 1 PORTG_7
+bit 59 C 0 *
+bit 58 O 1 PORTE_3 59 0 Z
+bit 57 I 1 PORTE_3
+bit 56 C 0 *
+bit 55 O 1 PORTH_1 56 0 Z
+bit 54 I 1 PORTH_1
+bit 53 C 0 *
+bit 52 O 1 PORTC_13 53 0 Z
+bit 51 I 1 PORTC_13
+bit 50 C 0 *
+bit 49 O 1 PORTC_12 50 0 Z
+bit 48 I 1 PORTC_12
+bit 47 C 0 *
+bit 46 O 1 PORTC_11 47 0 Z
+bit 45 I 1 PORTC_11
+bit 44 C 0 *
+bit 43 O 1 PORTC_10 44 0 Z
+bit 42 I 1 PORTC_10
+bit 41 C 0 *
+bit 40 O 1 PORTC_9 41 0 Z
+bit 39 I 1 PORTC_9
+bit 38 C 0 *
+bit 37 O 1 PORTC_8 38 0 Z
+bit 36 I 1 PORTC_8
+bit 35 C 0 *
+bit 34 O 1 PORTG_15 35 0 Z
+bit 33 I 1 PORTG_15
+bit 32 C 0 *
+bit 31 O 1 PORTG_14 32 0 Z
+bit 30 I 1 PORTG_14
+bit 29 C 0 *
+bit 28 O 1 PORTA_0 29 0 Z
+bit 27 I 1 PORTA_0
+bit 26 C 0 *
+bit 25 O 1 PORTA_1 26 0 Z
+bit 24 I 1 PORTA_1
+bit 23 C 0 *
+bit 22 O 1 PORTA_2 23 0 Z
+bit 21 I 1 PORTA_2
+bit 20 C 0 *
+bit 19 O 1 PORTA_3 20 0 Z
+bit 18 I 1 PORTA_3
+bit 17 C 0 *
+bit 16 O 1 PORTA_4 17 0 Z
+bit 15 I 1 PORTA_4
+bit 14 C 0 *
+bit 13 O 1 PORTA_5 14 0 Z
+bit 12 I 1 PORTA_5
+bit 11 C 0 *
+bit 10 O 1 PORTA_6 11 0 Z
+bit 9 I 1 PORTA_6
+bit 8 C 0 *
+bit 7 O 1 PORTA_7 8 0 Z
+bit 6 I 1 PORTA_7
+bit 5 C 0 *
+bit 4 O 1 PORTA_8 5 0 Z
+bit 3 I 1 PORTA_8
+bit 2 C 0 *
+bit 1 O 1 PORTA_9 2 0 Z
+bit 0 I 1 PORTA_9
--- /dev/null
+#
+# $Id: STEPPINGS 82 2006-11-06 04:22:52Z jiez $
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Richard Klingler <richard@klingler.net>
+#
+
+# bits 31-28 of the Device Identification Register
+0010 bf561 2
+0011 bf561 3
+0101 bf561 5
--- /dev/null
+signal ADDR2
+signal ADDR3
+signal ADDR4
+signal ADDR5
+signal ADDR6
+signal ADDR7
+signal ADDR8
+signal ADDR9
+signal ADDR10
+signal ADDR11
+signal ADDR12
+signal ADDR13
+signal ADDR14
+signal ADDR15
+signal ADDR16
+signal ADDR17
+signal ADDR18
+signal ADDR19
+signal ADDR20
+signal ADDR21
+signal ADDR22
+signal ADDR23
+signal ADDR24
+signal ADDR25
+signal DATA0
+signal DATA1
+signal DATA2
+signal DATA3
+signal DATA4
+signal DATA5
+signal DATA6
+signal DATA7
+signal DATA8
+signal DATA9
+signal DATA10
+signal DATA11
+signal DATA12
+signal DATA13
+signal DATA14
+signal DATA15
+signal DATA16
+signal DATA17
+signal DATA18
+signal DATA19
+signal DATA20
+signal DATA21
+signal DATA22
+signal DATA23
+signal DATA24
+signal DATA25
+signal DATA26
+signal DATA27
+signal DATA28
+signal DATA29
+signal DATA30
+signal DATA31
+signal AMS_B0
+signal AMS_B1
+signal AMS_B2
+signal AMS_B3
+signal AOE_B
+signal ARDY
+signal ARE_B
+signal AWE_B
+signal ABE_B0
+signal ABE_B1
+signal ABE_B2
+signal ABE_B3
+signal BG_B
+signal BGH_B
+signal BMODE0
+signal BMODE1
+signal BR_B
+signal BY_PASS
+signal PPI1_DATA0
+signal PPI1_DATA1
+signal PPI1_DATA2
+signal PPI1_DATA3
+signal PPI1_DATA4
+signal PPI1_DATA5
+signal PPI1_DATA6
+signal PPI1_DATA7
+signal PPI1_DATA8
+signal PPI1_DATA9
+signal PPI1_DATA10
+signal PPI1_DATA11
+signal PPI1_DATA12
+signal PPI1_DATA13
+signal PPI1_DATA14
+signal PPI1_DATA15
+signal PPI2_DATA0
+signal PPI2_DATA1
+signal PPI2_DATA2
+signal PPI2_DATA3
+signal PPI2_DATA4
+signal PPI2_DATA5
+signal PPI2_DATA6
+signal PPI2_DATA7
+signal PPI2_DATA8
+signal PPI2_DATA9
+signal PPI2_DATA10
+signal PPI2_DATA11
+signal PPI2_DATA12
+signal PPI2_DATA13
+signal PPI2_DATA14
+signal PPI2_DATA15
+signal DR0PRI
+signal DR0SEC
+signal DR1PRI
+signal DR1SEC
+signal DT0PRI
+signal DT0SEC
+signal DT1PRI
+signal DT1SEC
+signal MISO
+signal MOSI
+signal NMI_0
+signal NMI_1
+signal PF0
+signal PF1
+signal PF2
+signal PF3
+signal PF4
+signal PF5
+signal PF6
+signal PF7
+signal PF8
+signal PF9
+signal PF10
+signal PF11
+signal PF12
+signal PF13
+signal PF14
+signal PF15
+signal RESET_B
+signal RFS0
+signal RFS1
+signal RSCLK0
+signal RSCLK1
+signal TSCLK0
+signal TSCLK1
+signal RX
+signal TX
+signal SA10
+signal SCAS_B
+signal SCK
+signal SCKE
+signal SLEEP
+signal SMS_B0
+signal SMS_B1
+signal SMS_B2
+signal SMS_B3
+signal SRAS_B
+signal SWE_B
+signal SCLK0
+signal SCLK1
+signal TCK
+signal TDI
+signal TDO
+signal TMS
+signal TRST_B
+signal EMU_B
+signal TEST
+signal TFS0
+signal TFS1
+signal PPI1_CLK
+signal PPI2_CLK
+signal PPI1_SYNC1
+signal PPI1_SYNC2
+signal PPI1_SYNC3
+signal PPI2_SYNC1
+signal PPI2_SYNC2
+signal PPI2_SYNC3
+signal VDD_INT0
+signal VDD_INT1
+signal VDD_INT2
+signal VDD_INT3
+signal VDD_INT4
+signal VDD_INT5
+signal VDD_INT6
+signal VDD_INT7
+signal VDD_INT8
+signal GND_INT0
+signal GND_INT1
+signal GND_INT2
+signal GND_INT3
+signal GND_INT4
+signal GND_INT5
+signal GND_INT6
+signal VDD_EXT0
+signal VDD_EXT1
+signal VDD_EXT2
+signal VDD_EXT3
+signal VDD_EXT4
+signal VDD_EXT5
+signal VDD_EXT6
+signal VDD_EXT7
+signal VDD_EXT8
+signal VDD_EXT9
+signal VDD_EXT10
+signal VDD_EXT11
+signal VDD_EXT12
+signal VDD_EXT13
+signal VDD_EXT14
+signal VDD_EXT15
+signal VDD_EXT16
+signal VDD_EXT17
+signal VDD_EXT18
+signal CLKIN
+signal XTAL
+signal VREF_FLT
+signal VREG
+signal PSMON_VDD
+signal PSMON_GND
+signal GND_EXT0
+signal GND_EXT1
+signal GND_EXT2
+signal GND_EXT3
+signal GND_EXT4
+signal GND_EXT5
+signal GND_EXT6
+signal GND_EXT7
+signal GND_EXT8
+signal GND_EXT9
+signal GND_EXT10
+signal GND_EXT11
+signal GND_EXT12
+signal GND_EXT13
+signal GND_EXT14
+signal GND_EXT15
+signal GND_EXT16
+signal GND_EXT17
+signal GND_EXT18
+
+register BSR 355
+register BR 1
+register DIR 32
+
+instruction length 5
+
+instruction BYPASS 11111 BR
+instruction EXTEST 00000 BSR
+instruction SAMPLE/PRELOAD 10000 BSR
+instruction IDCODE 00010 DIR
+
+bit 354 I 1 TEST
+bit 353 I 1 BMODE1
+bit 352 I 1 BMODE0
+bit 351 O 1 SLEEP
+bit 350 I 1 NMI_0
+bit 349 C 0 *
+bit 348 O 1 MISO 349 0 Z
+bit 347 I 1 MISO
+bit 346 C 0 *
+bit 345 O 1 MOSI 346 0 Z
+bit 344 I 1 MOSI
+bit 343 C 0 *
+bit 342 O 1 SCK 343 0 Z
+bit 341 I 1 SCK
+bit 340 C 0 *
+bit 339 O 1 RX 340 0 Z
+bit 338 I 1 RX
+bit 337 C 0 *
+bit 336 O 1 TX 337 0 Z
+bit 335 I 1 TX
+bit 334 C 0 *
+bit 333 O 1 RSCLK1 334 0 Z
+bit 332 I 1 RSCLK1
+bit 331 C 0 *
+bit 330 O 1 RFS1 331 0 Z
+bit 329 I 1 RFS1
+bit 328 C 0 *
+bit 327 O 1 DR1SEC 328 0 Z
+bit 326 I 1 DR1SEC
+bit 325 C 0 *
+bit 324 O 1 DR1PRI 325 0 Z
+bit 323 I 1 DR1PRI
+bit 322 C 0 *
+bit 321 O 1 TSCLK1 322 0 Z
+bit 320 I 1 TSCLK1
+bit 319 C 0 *
+bit 318 O 1 TFS1 319 0 Z
+bit 317 I 1 TFS1
+bit 316 C 0 *
+bit 315 O 1 DT1SEC 316 0 Z
+bit 314 I 1 DT1SEC
+bit 313 C 0 *
+bit 312 O 1 DT1PRI 313 0 Z
+bit 311 I 1 DT1PRI
+bit 310 C 0 *
+bit 309 O 1 RSCLK0 310 0 Z
+bit 308 I 1 RSCLK0
+bit 307 C 0 *
+bit 306 O 1 RFS0 307 0 Z
+bit 305 I 1 RFS0
+bit 304 C 0 *
+bit 303 O 1 DR0SEC 304 0 Z
+bit 302 I 1 DR0SEC
+bit 301 C 0 *
+bit 300 O 1 DR0PRI 301 0 Z
+bit 299 I 1 DR0PRI
+bit 298 C 0 *
+bit 297 O 1 TSCLK0 298 0 Z
+bit 296 I 1 TSCLK0
+bit 295 C 0 *
+bit 294 O 1 TFS0 295 0 Z
+bit 293 I 1 TFS0
+bit 292 C 0 *
+bit 291 O 1 DT0SEC 292 0 Z
+bit 290 I 1 DT0SEC
+bit 289 C 0 *
+bit 288 O 1 DT0PRI 289 0 Z
+bit 287 I 1 DT0PRI
+bit 286 O 1 DATA31 254 0 Z
+bit 285 I 1 DATA31
+bit 284 O 1 DATA30 254 0 Z
+bit 283 I 1 DATA30
+bit 282 O 1 DATA29 254 0 Z
+bit 281 I 1 DATA29
+bit 280 O 1 DATA28 254 0 Z
+bit 279 I 1 DATA28
+bit 278 O 1 DATA27 254 0 Z
+bit 277 I 1 DATA27
+bit 276 O 1 DATA26 254 0 Z
+bit 275 I 1 DATA26
+bit 274 O 1 DATA25 254 0 Z
+bit 273 I 1 DATA25
+bit 272 O 1 DATA24 254 0 Z
+bit 271 I 1 DATA24
+bit 270 O 1 DATA23 254 0 Z
+bit 269 I 1 DATA23
+bit 268 O 1 DATA22 254 0 Z
+bit 267 I 1 DATA22
+bit 266 O 1 DATA21 254 0 Z
+bit 265 I 1 DATA21
+bit 264 O 1 DATA20 254 0 Z
+bit 263 I 1 DATA20
+bit 262 O 1 DATA19 254 0 Z
+bit 261 I 1 DATA19
+bit 260 O 1 DATA18 254 0 Z
+bit 259 I 1 DATA18
+bit 258 O 1 DATA17 254 0 Z
+bit 257 I 1 DATA17
+bit 256 O 1 DATA16 254 0 Z
+bit 255 I 1 DATA16
+bit 254 C 0 *
+bit 253 O 1 DATA15 221 0 Z
+bit 252 I 1 DATA15
+bit 251 O 1 DATA14 221 0 Z
+bit 250 I 1 DATA14
+bit 249 O 1 DATA13 221 0 Z
+bit 248 I 1 DATA13
+bit 247 O 1 DATA12 221 0 Z
+bit 246 I 1 DATA12
+bit 245 O 1 DATA11 221 0 Z
+bit 244 I 1 DATA11
+bit 243 O 1 DATA10 221 0 Z
+bit 242 I 1 DATA10
+bit 241 O 1 DATA9 221 0 Z
+bit 240 I 1 DATA9
+bit 239 O 1 DATA8 221 0 Z
+bit 238 I 1 DATA8
+bit 237 O 1 DATA7 221 0 Z
+bit 236 I 1 DATA7
+bit 235 O 1 DATA6 221 0 Z
+bit 234 I 1 DATA6
+bit 233 O 1 DATA5 221 0 Z
+bit 232 I 1 DATA5
+bit 231 O 1 DATA4 221 0 Z
+bit 230 I 1 DATA4
+bit 229 O 1 DATA3 221 0 Z
+bit 228 I 1 DATA3
+bit 227 O 1 DATA2 221 0 Z
+bit 226 I 1 DATA2
+bit 225 O 1 DATA1 221 0 Z
+bit 224 I 1 DATA1
+bit 223 O 1 DATA0 221 0 Z
+bit 222 I 1 DATA0
+bit 221 C 0 *
+bit 220 O 1 ADDR2 219 0 Z
+bit 219 C 0 *
+bit 218 O 1 ADDR3 219 0 Z
+bit 217 O 1 ADDR4 219 0 Z
+bit 216 O 1 ADDR5 219 0 Z
+bit 215 O 1 ADDR6 219 0 Z
+bit 214 O 1 ADDR7 219 0 Z
+bit 213 O 1 ADDR8 219 0 Z
+bit 212 O 1 ABE_B3 219 0 Z
+bit 211 O 1 ABE_B2 219 0 Z
+bit 210 O 1 ABE_B1 219 0 Z
+bit 209 O 1 ABE_B0 219 0 Z
+bit 208 O 1 BGH_B
+bit 207 O 1 BG_B
+bit 206 I 1 BR_B
+bit 205 O 1 SA10 194 0 Z
+bit 204 O 1 SCLK1 194 0 Z
+bit 203 O 1 SCLK0 194 0 Z
+bit 202 O 1 SWE_B 194 0 Z
+bit 201 O 1 SCAS_B 194 0 Z
+bit 200 O 1 SCKE 194 0 Z
+bit 199 O 1 SRAS_B 194 0 Z
+bit 198 O 1 SMS_B3 194 0 Z
+bit 197 O 1 SMS_B2 194 0 Z
+bit 196 O 1 SMS_B1 194 0 Z
+bit 195 O 1 SMS_B0 194 0 Z
+bit 194 C 0 *
+bit 193 I 1 ARDY
+bit 192 O 1 ARE_B 189 0 Z
+bit 191 O 1 AOE_B 189 0 Z
+bit 190 O 1 AWE_B 189 0 Z
+bit 189 C 0 *
+bit 188 O 1 AMS_B0 189 0 Z
+bit 187 O 1 AMS_B1 189 0 Z
+bit 186 O 1 AMS_B2 189 0 Z
+bit 185 O 1 AMS_B3 189 0 Z
+bit 184 O 1 ADDR9 175 0 Z
+bit 183 O 1 ADDR10 175 0 Z
+bit 182 O 1 ADDR11 175 0 Z
+bit 181 O 1 ADDR12 175 0 Z
+bit 180 O 1 ADDR13 175 0 Z
+bit 179 O 1 ADDR14 175 0 Z
+bit 178 O 1 ADDR15 175 0 Z
+bit 177 O 1 ADDR16 175 0 Z
+bit 176 O 1 ADDR17 175 0 Z
+bit 175 C 0 *
+bit 174 O 1 ADDR18 175 0 Z
+bit 173 O 1 ADDR19 175 0 Z
+bit 172 O 1 ADDR20 175 0 Z
+bit 171 O 1 ADDR21 175 0 Z
+bit 170 O 1 ADDR22 175 0 Z
+bit 169 O 1 ADDR23 175 0 Z
+bit 168 O 1 ADDR24 175 0 Z
+bit 167 O 1 ADDR25 175 0 Z
+bit 166 I 1 PPI2_CLK
+bit 165 I 1 PPI1_CLK
+bit 164 C 0 *
+bit 163 O 1 PPI1_SYNC3 164 0 Z
+bit 162 I 1 PPI1_SYNC3
+bit 161 C 0 *
+bit 160 O 1 PPI1_SYNC2 161 0 Z
+bit 159 I 1 PPI1_SYNC2
+bit 158 C 0 *
+bit 157 O 1 PPI1_SYNC1 158 0 Z
+bit 156 I 1 PPI1_SYNC1
+bit 155 C 0 *
+bit 154 O 1 PPI1_DATA15 155 0 Z
+bit 153 I 1 PPI1_DATA15
+bit 152 C 0 *
+bit 151 O 1 PPI1_DATA14 152 0 Z
+bit 150 I 1 PPI1_DATA14
+bit 149 C 0 *
+bit 148 O 1 PPI1_DATA13 149 0 Z
+bit 147 I 1 PPI1_DATA13
+bit 146 C 0 *
+bit 145 O 1 PPI1_DATA12 146 0 Z
+bit 144 I 1 PPI1_DATA12
+bit 143 C 0 *
+bit 142 O 1 PPI1_DATA11 143 0 Z
+bit 141 I 1 PPI1_DATA11
+bit 140 C 0 *
+bit 139 O 1 PPI1_DATA10 140 0 Z
+bit 138 I 1 PPI1_DATA10
+bit 137 I 1 RESET_B
+bit 136 I 1 BY_PASS
+bit 135 C 0 *
+bit 134 O 1 PPI1_DATA9 135 0 Z
+bit 133 I 1 PPI1_DATA9
+bit 132 C 0 *
+bit 131 O 1 PPI1_DATA8 132 0 Z
+bit 130 I 1 PPI1_DATA8
+bit 129 C 0 *
+bit 128 O 1 PPI1_DATA7 129 0 Z
+bit 127 I 1 PPI1_DATA7
+bit 126 C 0 *
+bit 125 O 1 PPI1_DATA6 126 0 Z
+bit 124 I 1 PPI1_DATA6
+bit 123 C 0 *
+bit 122 O 1 PPI1_DATA5 123 0 Z
+bit 121 I 1 PPI1_DATA5
+bit 120 C 0 *
+bit 119 O 1 PPI1_DATA4 120 0 Z
+bit 118 I 1 PPI1_DATA4
+bit 117 C 0 *
+bit 116 O 1 PPI1_DATA3 117 0 Z
+bit 115 I 1 PPI1_DATA3
+bit 114 C 0 *
+bit 113 O 1 PPI1_DATA2 114 0 Z
+bit 112 I 1 PPI1_DATA2
+bit 111 C 0 *
+bit 110 O 1 PPI1_DATA1 111 0 Z
+bit 109 I 1 PPI1_DATA1
+bit 108 C 0 *
+bit 107 O 1 PPI1_DATA0 108 0 Z
+bit 106 I 1 PPI1_DATA0
+bit 105 C 0 *
+bit 104 O 1 PPI2_SYNC3 105 0 Z
+bit 103 I 1 PPI2_SYNC3
+bit 102 C 0 *
+bit 101 O 1 PPI2_SYNC2 102 0 Z
+bit 100 I 1 PPI2_SYNC2
+bit 99 C 0 *
+bit 98 O 1 PPI2_SYNC1 99 0 Z
+bit 97 I 1 PPI2_SYNC1
+bit 96 C 0 *
+bit 95 O 1 PPI2_DATA15 96 0 Z
+bit 94 I 1 PPI2_DATA15
+bit 93 C 0 *
+bit 92 O 1 PPI2_DATA14 93 0 Z
+bit 91 I 1 PPI2_DATA14
+bit 90 C 0 *
+bit 89 O 1 PPI2_DATA13 90 0 Z
+bit 88 I 1 PPI2_DATA13
+bit 87 C 0 *
+bit 86 O 1 PPI2_DATA12 87 0 Z
+bit 85 I 1 PPI2_DATA12
+bit 84 C 0 *
+bit 83 O 1 PPI2_DATA11 84 0 Z
+bit 82 I 1 PPI2_DATA11
+bit 81 C 0 *
+bit 80 O 1 PPI2_DATA10 81 0 Z
+bit 79 I 1 PPI2_DATA10
+bit 78 C 0 *
+bit 77 O 1 PPI2_DATA9 78 0 Z
+bit 76 I 1 PPI2_DATA9
+bit 75 C 0 *
+bit 74 O 1 PPI2_DATA8 75 0 Z
+bit 73 I 1 PPI2_DATA8
+bit 72 C 0 *
+bit 71 O 1 PPI2_DATA7 72 0 Z
+bit 70 I 1 PPI2_DATA7
+bit 69 C 0 *
+bit 68 O 1 PPI2_DATA6 69 0 Z
+bit 67 I 1 PPI2_DATA6
+bit 66 C 0 *
+bit 65 O 1 PPI2_DATA5 66 0 Z
+bit 64 I 1 PPI2_DATA5
+bit 63 C 0 *
+bit 62 O 1 PPI2_DATA4 63 0 Z
+bit 61 I 1 PPI2_DATA4
+bit 60 C 0 *
+bit 59 O 1 PPI2_DATA3 60 0 Z
+bit 58 I 1 PPI2_DATA3
+bit 57 C 0 *
+bit 56 O 1 PPI2_DATA2 57 0 Z
+bit 55 I 1 PPI2_DATA2
+bit 54 C 0 *
+bit 53 O 1 PPI2_DATA1 54 0 Z
+bit 52 I 1 PPI2_DATA1
+bit 51 C 0 *
+bit 50 O 1 PPI2_DATA0 51 0 Z
+bit 49 I 1 PPI2_DATA0
+bit 48 C 0 *
+bit 47 O 1 PF0 48 0 Z
+bit 46 I 1 PF0
+bit 45 C 0 *
+bit 44 O 1 PF1 45 0 Z
+bit 43 I 1 PF1
+bit 42 C 0 *
+bit 41 O 1 PF2 42 0 Z
+bit 40 I 1 PF2
+bit 39 C 0 *
+bit 38 O 1 PF3 39 0 Z
+bit 37 I 1 PF3
+bit 36 C 0 *
+bit 35 O 1 PF4 36 0 Z
+bit 34 I 1 PF4
+bit 33 C 0 *
+bit 32 O 1 PF5 33 0 Z
+bit 31 I 1 PF5
+bit 30 C 0 *
+bit 29 O 1 PF6 30 0 Z
+bit 28 I 1 PF6
+bit 27 C 0 *
+bit 26 O 1 PF7 27 0 Z
+bit 25 I 1 PF7
+bit 24 C 0 *
+bit 23 O 1 PF8 24 0 Z
+bit 22 I 1 PF8
+bit 21 C 0 *
+bit 20 O 1 PF9 21 0 Z
+bit 19 I 1 PF9
+bit 18 C 0 *
+bit 17 O 1 PF10 18 0 Z
+bit 16 I 1 PF10
+bit 15 C 0 *
+bit 14 O 1 PF11 15 0 Z
+bit 13 I 1 PF11
+bit 12 C 0 *
+bit 11 O 1 PF12 12 0 Z
+bit 10 I 1 PF12
+bit 9 C 0 *
+bit 8 O 1 PF13 9 0 Z
+bit 7 I 1 PF13
+bit 6 C 0 *
+bit 5 O 1 PF14 6 0 Z
+bit 4 I 1 PF14
+bit 3 C 0 *
+bit 2 O 1 PF15 3 0 Z
+bit 1 I 1 PF15
+bit 0 I 1 NMI_1
--- /dev/null
+#\r
+# $Id: STEPPINGS v 1.0 20/09/2006 $\r
+#\r
+# Copyright (C) 2006 Kila Medical Systems.\r
+#\r
+# This program is free software; you can redistribute it and/or\r
+# modify it under the terms of the GNU General Public License\r
+# as published by the Free Software Foundation; either version 2\r
+# of the License, or (at your option) any later version.\r
+#\r
+# This program is distributed in the hope that it will be useful,\r
+# but WITHOUT ANY WARRANTY; without even the implied warranty of\r
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the\r
+# GNU General Public License for more details.\r
+#\r
+# You should have received a copy of the GNU General Public License\r
+# along with this program; if not, write to the Free Software\r
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA\r
+# 02111-1307, USA.\r
+#\r
+# Written by Lesly A.M <leslyam@kila.com>, 2006\r
+#\r
+# Documentation:\r
+# [1] Analog Devices Inc.,"ADSP-21065L SHARC Technical Reference", September 1998\r
+#\r
+#\r
+# bits 31-28 of the Device Identification Register\r
+0000 sharc21065l 0\r
+0001 sharc21065l 1\r
+0010 sharc21065l 2\r
+0011 sharc21065l 3\r
+\r
--- /dev/null
+#
+# $Id: sharc21065l,v 1.0 20/09/2006 $
+#
+# JTAG declarations for ADSP SHARC 21065L
+# Copyright (C) 2006 Kila Medical Systems.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Lesly A.M <leslyam@kila.com>, 2006
+#
+# Documentation:
+# [1] Analog Devices Inc.,"ADSP-21065L SHARC Technical Reference", September 1998
+# [2] Analog Devices Inc.,"BSDL Description for ADSP-21065L: MBGA Package", BSDL rev 1.1
+# http://www.analog.com/UploadedFiles/BSDL_Files/435954194035486111591903bsdl_21065l_bga.txt
+#
+#
+
+
+signal ADDR0
+signal ADDR1
+signal ADDR2
+signal ADDR3
+signal ADDR4
+signal ADDR5
+signal ADDR6
+signal ADDR7
+signal ADDR8
+signal ADDR9
+signal ADDR10
+signal ADDR11
+signal ADDR12
+signal ADDR13
+signal ADDR14
+signal ADDR15
+signal ADDR16
+signal ADDR17
+signal ADDR18
+signal ADDR19
+signal ADDR20
+signal ADDR21
+signal ADDR22
+signal ADDR23
+signal DATA0
+signal DATA1
+signal DATA2
+signal DATA3
+signal DATA4
+signal DATA5
+signal DATA6
+signal DATA7
+signal DATA8
+signal DATA9
+signal DATA10
+signal DATA11
+signal DATA12
+signal DATA13
+signal DATA14
+signal DATA15
+signal DATA16
+signal DATA17
+signal DATA18
+signal DATA19
+signal DATA20
+signal DATA21
+signal DATA22
+signal DATA23
+signal DATA24
+signal DATA25
+signal DATA26
+signal DATA27
+signal DATA28
+signal DATA29
+signal DATA30
+signal DATA31
+signal MS0
+signal MS1
+signal MS2
+signal MS3
+signal RD_B
+signal WR_B
+signal SW_B
+signal ACK
+signal TS_B
+signal IRQ0_B
+signal IRQ1_B
+signal IRQ2_B
+signal FLAG0
+signal FLAG1
+signal FLAG2
+signal FLAG3
+signal FLAG4
+signal FLAG5
+signal FLAG6
+signal FLAG7
+signal FLAG8
+signal FLAG9
+signal FLAG10
+signal FLAG11
+signal HBR_B
+signal HBG_B
+signal CS_B
+signal REDY
+signal DMAR1_B
+signal DMAR2_B
+signal DMAG1_B
+signal DMAG2_B
+signal BR1
+signal BR2
+signal ID0
+signal ID1
+signal CPA_B
+signal DT0A
+signal DT0B
+signal DR0A
+signal DR0B
+signal TCLK0
+signal RCLK0
+signal TFS0
+signal RFS0
+signal DT1A
+signal DT1B
+signal DR1A
+signal DR1B
+signal TCLK1
+signal RCLK1
+signal TFS1
+signal RFS1
+signal BSEL
+signal BMS_B
+signal CLKIN
+signal RESET_B
+signal TCK
+signal TMS
+signal TDI
+signal TDO
+signal TRST
+signal EMU
+signal BMSTR
+signal SDWE_B
+signal SDA10
+signal CAS_B
+signal RAS_B
+signal DQM
+signal SDCKE
+signal SDCLK0
+signal SDCLK1
+signal PWM_EVENT0
+signal PWM_EVENT1
+signal VDD0
+signal VDD1
+signal VDD2
+signal VDD3
+signal VDD4
+signal VDD5
+signal VDD6
+signal VDD7
+signal VDD8
+signal VDD9
+signal VDD10
+signal VDD11
+signal VDD12
+signal VDD13
+signal VDD14
+signal VDD15
+signal VDD16
+signal VDD17
+signal VDD18
+signal VDD19
+signal VDD20
+signal VDD21
+signal GND0
+signal GND1
+signal GND2
+signal GND3
+signal GND4
+signal GND5
+signal GND6
+signal GND7
+signal GND8
+signal GND9
+signal GND10
+signal GND11
+signal GND12
+signal GND13
+signal GND14
+signal GND15
+signal GND16
+signal GND17
+signal GND18
+signal GND19
+signal GND20
+signal GND21
+signal GND22
+signal GND23
+signal GND24
+signal GND25
+signal GND26
+signal GND27
+signal GND28
+signal GND29
+signal GND30
+signal GND31
+signal GND32
+signal GND33
+
+register BSR 285
+register BR 1
+register DIR 32
+
+instruction length 5
+
+instruction BYPASS 11111 BR
+instruction EXTEST 00000 BSR
+instruction SAMPLE/PRELOAD 10000 BSR
+
+bit 284 O 1 EMU 278 0 Z
+bit 283 I 1 ID0
+bit 282 I 1 ID1
+bit 281 O 1 *
+bit 280 O 1 *
+bit 279 O 1 *
+bit 278 C 0 *
+bit 277 C 0 *
+bit 276 I 1 FLAG4
+bit 275 O 1 FLAG4 277 0 Z
+bit 274 I 1 FLAG5
+bit 273 O 1 FLAG5 270 0 Z
+bit 272 I 1 FLAG6
+bit 271 O 1 FLAG6 269 0 Z
+bit 270 C 0 *
+bit 269 C 0 *
+bit 268 C 0 *
+bit 267 I 1 FLAG7
+bit 266 O 1 FLAG7 268 0 Z
+bit 265 I 1 DATA31
+bit 264 O 1 DATA31 243 0 Z
+bit 263 I 1 DATA30
+bit 262 O 1 DATA30 243 0 Z
+bit 261 I 1 DATA29
+bit 260 O 1 DATA29 243 0 Z
+bit 259 I 1 DATA28
+bit 258 O 1 DATA28 243 0 Z
+bit 257 I 1 DATA27
+bit 256 O 1 DATA27 243 0 Z
+bit 255 I 1 DATA26
+bit 254 O 1 DATA26 243 0 Z
+bit 253 I 1 DATA25
+bit 252 O 1 DATA25 243 0 Z
+bit 251 I 1 DATA24
+bit 250 O 1 DATA24 243 0 Z
+bit 249 I 1 DATA23
+bit 248 O 1 DATA23 243 0 Z
+bit 247 I 1 DATA22
+bit 246 O 1 DATA22 243 0 Z
+bit 245 I 1 DATA21
+bit 244 O 1 DATA21 243 0 Z
+bit 243 C 0 *
+bit 242 O 1 *
+bit 241 O 1 *
+bit 240 O 1 *
+bit 239 I 1 DATA20
+bit 238 O 1 DATA20 243 0 Z
+bit 237 I 1 DATA19
+bit 236 O 1 DATA19 243 0 Z
+bit 235 I 1 DATA18
+bit 234 O 1 DATA18 243 0 Z
+bit 233 I 1 DATA17
+bit 232 O 1 DATA17 243 0 Z
+bit 231 I 1 DATA16
+bit 230 O 1 DATA16 243 0 Z
+bit 229 I 1 DATA15
+bit 228 O 1 DATA15 243 0 Z
+bit 227 I 1 DATA14
+bit 226 O 1 DATA14 243 0 Z
+bit 225 O 1 *
+bit 224 O 1 *
+bit 223 O 1 *
+bit 222 O 1 *
+bit 221 O 1 *
+bit 220 O 1 *
+bit 219 I 1 DATA13
+bit 218 O 1 DATA13 209 0 Z
+bit 217 I 1 DATA12
+bit 216 O 1 DATA12 209 0 Z
+bit 215 I 1 DATA11
+bit 214 O 1 DATA11 209 0 Z
+bit 213 I 1 DATA10
+bit 212 O 1 DATA10 209 0 Z
+bit 211 I 1 DATA9
+bit 210 O 1 DATA9 209 0 Z
+bit 209 C 0 *
+bit 208 I 1 DATA8
+bit 207 O 1 DATA8 209 0 Z
+bit 206 I 1 DATA7
+bit 205 O 1 DATA7 209 0 Z
+bit 204 I 1 DATA6
+bit 203 O 1 DATA6 209 0 Z
+bit 202 I 1 DATA5
+bit 201 O 1 DATA5 209 0 Z
+bit 200 I 1 DATA4
+bit 199 O 1 DATA4 209 0 Z
+bit 198 I 1 DATA3
+bit 197 O 1 DATA3 209 0 Z
+bit 196 I 1 DATA2
+bit 195 O 1 DATA2 209 0 Z
+bit 194 I 1 DATA1
+bit 193 O 1 DATA1 209 0 Z
+bit 192 I 1 DATA0
+bit 191 O 1 DATA0 209 0 Z
+bit 190 C 0 *
+bit 189 I 1 FLAG8
+bit 188 O 1 FLAG8 190 0 Z
+bit 187 I 1 FLAG9
+bit 186 O 1 FLAG9 183 0 Z
+bit 185 I 1 FLAG10
+bit 184 O 1 FLAG10 182 0 Z
+bit 183 C 0 *
+bit 182 C 0 *
+bit 181 C 0 *
+bit 180 I 1 FLAG11
+bit 179 O 1 FLAG11 181 0 Z
+bit 178 I 1 MS3
+bit 177 O 1 MS3 153 0 Z
+bit 176 I 1 MS2
+bit 175 O 1 MS2 153 0 Z
+bit 174 I 1 MS1
+bit 173 O 1 MS1 153 0 Z
+bit 172 I 1 MS0
+bit 171 O 1 MS0 153 0 Z
+bit 170 I 1 ACK
+bit 169 O 1 ACK 167 0 Z
+bit 168 O 1 *
+bit 167 C 0 *
+bit 166 I 1 CPA_B
+bit 165 O 1 CPA_B 165 1 Z
+bit 164 I 1 SW_B
+bit 163 O 1 SW_B 153 0 Z
+bit 162 O 1 REDY 161 0 Z
+bit 161 C 0 *
+bit 160 I 1 RD_B
+bit 159 O 1 RD_B 153 0 Z
+bit 158 I 1 WR_B
+bit 157 O 1 WR_B 153 0 Z
+bit 156 O 1 *
+bit 155 I 1 TS_B
+bit 154 I 1 CS_B
+bit 153 C 0 *
+bit 152 O 1 BMSTR
+bit 151 I 1 HBG_B
+bit 150 O 1 HBG_B 147 0 Z
+bit 149 O 1 DMAG2_B 153 0 Z
+bit 148 O 1 DMAG1_B 153 0 Z
+bit 147 C 0 *
+bit 146 O 1 SDA10 131 0 Z
+bit 145 I 1 SDCKE
+bit 144 O 1 SDCKE 131 0 Z
+bit 143 O 1 DQM 131 0 Z
+bit 142 I 1 SDWE_B
+bit 141 O 1 SDWE_B 131 0 Z
+bit 140 I 1 CAS_B
+bit 139 O 1 CAS_B 131 0 Z
+bit 138 I 1 RAS_B
+bit 137 O 1 RAS_B 131 0 Z
+bit 136 I 1 HBR_B
+bit 135 I 1 DMAR2_B
+bit 134 I 1 DMAR1_B
+bit 133 I 1 SDCLK0
+bit 132 O 1 SDCLK0 131 0 Z
+bit 131 C 0 *
+bit 130 I 1 SDCLK1
+bit 129 O 1 SDCLK1 128 0 Z
+bit 128 C 0 *
+bit 127 I 1 CLKIN
+bit 126 I 1 BR2
+bit 125 O 1 BR2 120 0 Z
+bit 124 I 1 BR1
+bit 123 O 1 BR1 119 0 Z
+bit 122 I 1 PWM_EVENT0
+bit 121 O 1 PWM_EVENT0 118 0 Z
+bit 120 C 0 *
+bit 119 C 0 *
+bit 118 C 0 *
+bit 117 C 0 *
+bit 116 I 1 PWM_EVENT1
+bit 115 O 1 PWM_EVENT1 117 0 Z
+bit 114 O 1 DT1B 112 0 Z
+bit 113 O 1 DT1A 111 0 Z
+bit 112 C 0 *
+bit 111 C 0 *
+bit 110 C 0 *
+bit 109 I 1 TCLK1
+bit 108 O 1 TCLK1 110 0 Z
+bit 107 I 1 TFS1
+bit 106 O 1 TFS1 101 0 Z
+bit 105 I 1 DR1B
+bit 104 I 1 DR1A
+bit 103 I 1 RCLK1
+bit 102 O 1 RCLK1 100 0 Z
+bit 101 C 0 *
+bit 100 C 0 *
+bit 99 C 0 *
+bit 98 I 1 RFS1
+bit 97 O 1 RFS1 99 0 Z
+bit 96 O 1 DT0B 94 0 Z
+bit 95 O 1 DT0A 93 0 Z
+bit 94 C 0 *
+bit 93 C 0 *
+bit 92 C 0 *
+bit 91 I 1 TCLK0
+bit 90 O 1 TCLK0 92 0 Z
+bit 89 I 1 TFS0
+bit 88 O 1 TFS0 83 0 Z
+bit 87 I 1 DR0B
+bit 86 I 1 DR0A
+bit 85 I 1 RCLK0
+bit 84 O 1 RCLK0 82 0 Z
+bit 83 C 0 *
+bit 82 C 0 *
+bit 81 C 0 *
+bit 80 I 1 RFS0
+bit 79 O 1 RFS0 81 0 Z
+bit 78 O 1 *
+bit 77 O 1 *
+bit 76 O 1 *
+bit 75 I 1 IRQ2_B
+bit 74 I 1 IRQ1_B
+bit 73 I 1 IRQ0_B
+bit 72 O 1 *
+bit 71 O 1 *
+bit 70 O 1 *
+bit 69 O 1 *
+bit 68 O 1 *
+bit 67 O 1 *
+bit 66 I 1 FLAG3
+bit 65 O 1 FLAG3 64 0 Z
+bit 64 C 0 *
+bit 63 C 0 *
+bit 62 I 1 FLAG2
+bit 61 O 1 FLAG2 63 0 Z
+bit 60 I 1 FLAG1
+bit 59 O 1 FLAG1 56 0 Z
+bit 58 I 1 FLAG0
+bit 57 O 1 FLAG0 55 0 Z
+bit 56 C 0 *
+bit 55 C 0 *
+bit 54 I 1 ADDR0
+bit 53 O 1 ADDR0 36 0 Z
+bit 52 I 1 ADDR1
+bit 51 O 1 ADDR1 36 0 Z
+bit 50 I 1 ADDR2
+bit 49 O 1 ADDR2 36 0 Z
+bit 48 I 1 ADDR3
+bit 47 O 1 ADDR3 36 0 Z
+bit 46 I 1 ADDR4
+bit 45 O 1 ADDR4 36 0 Z
+bit 44 I 1 ADDR5
+bit 43 O 1 ADDR5 36 0 Z
+bit 42 I 1 ADDR6
+bit 41 O 1 ADDR6 36 0 Z
+bit 40 I 1 ADDR7
+bit 39 O 1 ADDR7 36 0 Z
+bit 38 I 1 ADDR8
+bit 37 O 1 ADDR8 36 0 Z
+bit 36 C 0 *
+bit 35 I 1 ADDR9
+bit 34 O 1 ADDR9 36 0 Z
+bit 33 I 1 ADDR10
+bit 32 O 1 ADDR10 36 0 Z
+bit 31 I 1 ADDR11
+bit 30 O 1 ADDR11 36 0 Z
+bit 29 I 1 ADDR12
+bit 28 O 1 ADDR12 36 0 Z
+bit 27 I 1 ADDR13
+bit 26 O 1 ADDR13 36 0 Z
+bit 25 I 1 ADDR14
+bit 24 O 1 ADDR14 36 0 Z
+bit 23 I 1 ADDR15
+bit 22 O 1 ADDR15 36 0 Z
+bit 21 I 1 ADDR16
+bit 20 O 1 ADDR16 36 0 Z
+bit 19 I 1 ADDR17
+bit 18 O 1 ADDR17 36 0 Z
+bit 17 I 1 ADDR18
+bit 16 O 1 ADDR18 36 0 Z
+bit 15 I 1 ADDR19
+bit 14 O 1 ADDR19 36 0 Z
+bit 13 I 1 ADDR20
+bit 12 O 1 ADDR20 36 0 Z
+bit 11 I 1 ADDR21
+bit 10 O 1 ADDR21 36 0 Z
+bit 9 I 1 ADDR22
+bit 8 O 1 ADDR22 36 0 Z
+bit 7 I 1 ADDR23
+bit 6 O 1 ADDR23 36 0 Z
+bit 5 I 1 RESET_B
+bit 4 C 0 *
+bit 3 O 1 *
+bit 2 I 1 BMS_B
+bit 1 O 1 BMS_B 4 0 Z
+bit 0 I 1 BSEL
+
+initbus SHARC_21065L
--- /dev/null
+#
+# $Id$
+#
+# JTAG declarations for Atheros AR2312
+# Copyright (C) 2005 Marek Michalkiewicz
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Marek Michalkiewicz <marekm@amelek.gda.pl>, 2005.
+#
+
+register BR 1
+register BSR 1
+register DIR 32
+register EJIMPCODE 32
+register EJADDRESS 32
+register EJDATA 32
+register EJCONTROL 32
+register EJALL 96
+register EJFASTDATA 33
+
+instruction length 5
+
+instruction BYPASS 11111 BR
+instruction SAMPLE/PRELOAD 00010 BSR
+instruction IDCODE 00001 DIR
+instruction EJTAG_IMPCODE 00011 EJIMPCODE
+instruction EJTAG_ADDRESS 01000 EJADDRESS
+instruction EJTAG_DATA 01001 EJDATA
+instruction EJTAG_CONTROL 01010 EJCONTROL
+instruction EJTAG_ALL 01011 EJALL
+instruction EJTAGBOOT 01100 BR
+instruction NORMALBOOT 01101 BR
+instruction EJTAG_FASTDATA 01110 EJFASTDATA
+
+initbus ejtag
+endian big
+#Enable flash read/write
+poke 0x58400000 0x100e3ce1
--- /dev/null
+#
+# $Id$
+#
+# Copyright (C) 2002 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Marcel Telka <marcel@telka.sk>, 2002.
+# Modified by Stefan Pledl <stefan.pledl@mesutronic.de>, 2007.
+#
+# Documentation:
+# [1] Atmel Corporation, "ATmega128(L) - 8-bit AVR Microcontroller with
+# 128K Bytes In-System Programmable Flash", 2002, Rev. 2467E-AVR-05/02
+#
+# [2] Atmel Corporation, 1504BSDL.ZIP - BSDL files for ATF1504AS/ASL and
+# ATF1504ASV/ASVL
+#
+# [3] Atmel Corporation, "AT32AP7000 - High Performance, Low Power
+# AVR(R)32 32-Bit Microcontroller", Rev. 32003K-AVR32-10/07
+#
+
+# bits 27-12 of the Device Identification Register
+1001011100000010 atmega128 ATmega128 # see Table 100 in [1]
+0101101100000110 at91sam7s64 AT91SAM7S64
+0101101100000111 at91sam7s32 AT91SAM7S32
+0101101100001001 at91sam7s256 AT91SAM7S256
+0101101100001010 at91sam7s128 AT91SAM7S128
+0101101100001100 at91sam7s321 AT91SAM7S321
+0001010100010100 atf15xx ATF1504ASV # see 1504ASV_J44.bsd
+ # in [2]
+0001111010000010 at32ap7000 AT32AP7000 # see Table 38-11 in [3]
+
--- /dev/null
+#
+# $Id$
+#
+# Copyright (c) 2008 Gabor Juhos <juhosg@openwrt.org>
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Documentation:
+# [1] Atmel Corporation, "AT32AP7000 - High Performance, Low Power
+# AVR(R)32 32-Bit Microcontroller", Rev. 32003K-AVR32-10/07
+#
+
+# bits 31-28 of the Device Identification Register
+# see Table 38-11 in [1]
+0000 at32ap7000 A
+0001 at32ap7000 B
+0010 at32ap7000 C
--- /dev/null
+#
+# $Id$
+#
+# Copyright (c) 2008 Gabor Juhos <juhosg@openwrt.org>
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Documentation:
+# [1] Atmel Corporation, "AT32AP7000 - High Performance, Low Power
+# AVR(R)32 32-Bit Microcontroller", Rev. 32003K-AVR32-10/07
+# http://www.atmel.com/dyn/resources/prod_documents/doc32003.pdf
+#
+
+# mandatory data registers
+register BSR 388 # Boundary Scan Register
+register BR 1 # Bypass Register
+# optional data registers
+register DIR 32 # Device Identification Register
+# user-defined registers
+register ARR 5 # AVR Reset Register
+register NAR 34 # Nexus Access Register
+register MWAR 35 # Memory Word Access Register
+register MBAR 34 # Memory Block Access Register
+register CAR 1 # Cancel Access Register
+register SYR 16 # Sync Register
+
+# see page 909 in [1]
+instruction length 5
+
+# mandatory instructions
+instruction EXTEST 00000 BSR # see page 914 in [1]
+instruction IDCODE 00001 DIR # see page 914 in [1]
+instruction SAMPLE/PRELOAD 00010 BSR # see page 914 in [1]
+instruction BYPASS 01111 BR # see page 915 in [1]
+
+# optional instructions
+instruction INTEST 00100 BSR # see page 914 in [1]
+instruction CLAMP 00110 BR # see page 915 in [1]
+
+# user-defined instructions
+instruction AVR_RESET 01100 ARR # see page 919 in [1]
+instruction NEXUS_ACCESS 10000 NAR # see page 916 in [1]
+instruction MEMORY_WORD_ACCESS 10001 MWAR # see page 917 in [1]
+instruction MEMORY_BLOCK_ACCESS 10010 MBAR # see page 918 in [1]
+instruction CANCEL_ACCESS 10011 CAR # see page 918 in [1]
+instruction SYNC 10111 SYR # see page 919 in [1]
+
+# undocumented instructions, detected by the "discovery" command:
+#Detecting DR length for IR 11000 ... 35
+#Detecting DR length for IR 11001 ... 32
+#Detecting DR length for IR 11010 ... 35
+#Detecting DR length for IR 11011 ... 64
+#Detecting DR length for IR 11111 ... 1 # probably BYPASS
+
+signal AGNDOSC
+signal AGNDPLL
+signal AGNDUSB
+signal AVDDOSC
+signal AVDDPLL
+signal AVDDUSB
+signal EVTI_N
+signal FSDM
+signal FSDP
+signal GNDCORE_0
+signal GNDCORE_1
+signal GNDCORE_2
+signal GNDCORE_3
+signal GNDCORE_4
+signal GNDCORE_5
+signal GNDIOP_CBL
+signal GNDIOP_CBR
+signal GNDIOP_CUL
+signal GNDIOP_CUR
+signal GNDIOP_0
+signal GNDIOP_1
+signal GNDIOP_2
+signal GNDIOP_3
+signal GNDIOP_4a
+signal GNDIOP_4b
+signal GNDIOP_6a
+signal GNDIOP_6b
+signal GNDIOP_7
+signal GNDIOP_8a
+signal GNDIOP_8b
+signal GNDIOP_9a
+signal GNDIOP_9b
+signal GNDIOP_10
+signal HSDM
+signal HSDP
+signal OSCEN_N
+signal PA00
+signal PA01
+signal PA02
+signal PA03
+signal PA04
+signal PA05
+signal PA06
+signal PA07
+signal PA08
+signal PA09
+signal PA10
+signal PA11
+signal PA12
+signal PA13
+signal PA14
+signal PA15
+signal PA16
+signal PA17
+signal PA18
+signal PA19
+signal PA20
+signal PA21
+signal PA22
+signal PA23
+signal PA24
+signal PA25
+signal PA26
+signal PA27
+signal PA28
+signal PA29
+signal PA30
+signal PA31
+signal PB00
+signal PB01
+signal PB02
+signal PB03
+signal PB04
+signal PB05
+signal PB06
+signal PB07
+signal PB08
+signal PB09
+signal PB10
+signal PB11
+signal PB12
+signal PB13
+signal PB14
+signal PB15
+signal PB16
+signal PB17
+signal PB18
+signal PB19
+signal PB20
+signal PB21
+signal PB22
+signal PB23
+signal PB24
+signal PB25
+signal PB26
+signal PB27
+signal PB28
+signal PB29
+signal PB30
+signal PC00
+signal PC01
+signal PC02
+signal PC03
+signal PC04
+signal PC05
+signal PC06
+signal PC07
+signal PC08
+signal PC09
+signal PC10
+signal PC11
+signal PC12
+signal PC13
+signal PC14
+signal PC15
+signal PC16
+signal PC17
+signal PC18
+signal PC19
+signal PC20
+signal PC21
+signal PC22
+signal PC23
+signal PC24
+signal PC25
+signal PC26
+signal PC27
+signal PC28
+signal PC29
+signal PC30
+signal PC31
+signal PD00
+signal PD01
+signal PD02
+signal PD03
+signal PD04
+signal PD05
+signal PD06
+signal PD07
+signal PD08
+signal PD09
+signal PD10
+signal PD11
+signal PD12
+signal PD13
+signal PD14
+signal PD15
+signal PD16
+signal PD17
+signal PE00
+signal PE01
+signal PE02
+signal PE03
+signal PE04
+signal PE05
+signal PE06
+signal PE07
+signal PE08
+signal PE09
+signal PE10
+signal PE11
+signal PE12
+signal PE13
+signal PE14
+signal PE15
+signal PE16
+signal PE17
+signal PE18
+signal PE19
+signal PE20
+signal PE21
+signal PE22
+signal PE23
+signal PE24
+signal PE25
+signal PE26
+signal PLL0
+signal PLL1
+signal PX00
+signal PX01
+signal PX02
+signal PX03
+signal PX04
+signal PX05
+signal PX06
+signal PX07
+signal PX08
+signal PX09
+signal PX10
+signal PX11
+signal PX12
+signal PX13
+signal PX14
+signal PX15
+signal PX16
+signal PX17
+signal PX18
+signal PX19
+signal PX20
+signal PX21
+signal PX22
+signal PX23
+signal PX24
+signal PX25
+signal PX26
+signal PX27
+signal PX28
+signal PX29
+signal PX30
+signal PX31
+signal PX32
+signal PX33
+signal PX34
+signal PX35
+signal PX36
+signal PX37
+signal PX38
+signal PX39
+signal PX40
+signal PX41
+signal PX42
+signal PX43
+signal PX44
+signal PX45
+signal PX46
+signal PX47
+signal PX48
+signal PX49
+signal PX50
+signal PX51
+signal PX52
+signal PX53
+signal RESET_N
+signal TCK
+signal TDI
+signal TDO
+signal TMS
+signal TRST_N
+signal VBG
+signal VDDCORE_0
+signal VDDCORE_1
+signal VDDCORE_2
+signal VDDCORE_3
+signal VDDCORE_4
+signal VDDIOP_CBL
+signal VDDIOP_CBR
+signal VDDIOP_CUL
+signal VDDIOP_CUR
+signal VDDIOP_0a
+signal VDDIOP_0b
+signal VDDIOP_1
+signal VDDIOP_2a
+signal VDDIOP_2b
+signal VDDIOP_3
+signal VDDIOP_4a
+signal VDDIOP_4b
+signal VDDIOP_6a
+signal VDDIOP_6b
+signal VDDIOP_7
+signal VDDIOP_8a
+signal VDDIOP_8b
+signal VDDIOP_9a
+signal VDDIOP_9b
+signal VDDIOP_10a
+signal VDDIOP_10b
+signal VDDIOP_11
+signal WAKE_N
+signal XIN0
+signal XIN1
+signal XIN32
+signal XOUT0
+signal XOUT1
+
+# Boundary Scan Register bits
+
+bit 387 C 1 *
+bit 386 B 1 PD00 387 1 Z
+bit 385 C 1 *
+bit 384 B 1 PD01 385 1 Z
+bit 383 C 1 *
+bit 382 B 1 PD02 383 1 Z
+bit 381 C 1 *
+bit 380 B 1 PE17 381 1 Z
+bit 379 C 1 *
+bit 378 B 1 PE18 379 1 Z
+bit 377 C 1 *
+bit 376 B 1 PX47 377 1 Z
+bit 375 C 1 *
+bit 374 B 1 PX48 375 1 Z
+bit 373 C 1 *
+bit 372 B 1 PX49 373 1 Z
+bit 371 C 1 *
+bit 370 B 1 PX50 371 1 Z
+bit 369 C 1 *
+bit 368 B 1 PX51 369 1 Z
+bit 367 C 1 *
+bit 366 B 1 PX32 367 1 Z
+bit 365 C 1 *
+bit 364 B 1 PX33 365 1 Z
+bit 363 C 1 *
+bit 362 B 1 PX00 363 1 Z
+bit 361 C 1 *
+bit 360 B 1 PX01 361 1 Z
+bit 359 C 1 *
+bit 358 B 1 PX02 359 1 Z
+bit 357 C 1 *
+bit 356 B 1 PX03 357 1 Z
+bit 355 C 1 *
+bit 354 B 1 PX04 355 1 Z
+bit 353 C 1 *
+bit 352 B 1 PX05 353 1 Z
+bit 351 C 1 *
+bit 350 B 1 PD03 351 1 Z
+bit 349 C 1 *
+bit 348 B 1 PD04 349 1 Z
+bit 347 C 1 *
+bit 346 B 1 PD05 347 1 Z
+bit 345 C 1 *
+bit 344 B 1 PD06 345 1 Z
+bit 343 C 1 *
+bit 342 B 1 PD07 343 1 Z
+bit 341 C 1 *
+bit 340 B 1 PD08 341 1 Z
+bit 339 C 1 *
+bit 338 B 1 PD09 339 1 Z
+bit 337 C 1 *
+bit 336 B 1 PA00 337 1 Z
+bit 335 C 1 *
+bit 334 B 1 PA01 335 1 Z
+bit 333 C 1 *
+bit 332 B 1 PA02 333 1 Z
+bit 331 C 1 *
+bit 330 B 1 PA03 331 1 Z
+bit 329 C 1 *
+bit 328 B 1 PA04 329 1 Z
+bit 327 C 1 *
+bit 326 B 1 PA05 327 1 Z
+bit 325 C 1 *
+bit 324 B 1 PB24 325 1 Z
+bit 323 C 1 *
+bit 322 B 1 PB25 323 1 Z
+bit 321 C 1 *
+bit 320 B 1 PA08 321 1 Z
+bit 319 C 1 *
+bit 318 B 1 PA09 319 1 Z
+bit 317 C 1 *
+bit 316 B 1 PA10 317 1 Z
+bit 315 C 1 *
+bit 314 B 1 PA11 315 1 Z
+bit 313 C 1 *
+bit 312 B 1 PA12 313 1 Z
+bit 311 C 1 *
+bit 310 B 1 PA13 311 1 Z
+bit 309 C 1 *
+bit 308 B 1 PA14 309 1 Z
+bit 307 C 1 *
+bit 306 B 1 PA15 307 1 Z
+bit 305 C 1 *
+bit 304 B 1 PA16 305 1 Z
+bit 303 C 1 *
+bit 302 B 1 PA17 303 1 Z
+bit 301 C 1 *
+bit 300 B 1 PA18 301 1 Z
+bit 299 C 1 *
+bit 298 B 1 PA19 299 1 Z
+bit 297 C 1 *
+bit 296 B 1 PA20 297 1 Z
+bit 295 C 1 *
+bit 294 B 1 PA21 295 1 Z
+bit 293 C 1 *
+bit 292 B 1 PA22 293 1 Z
+bit 291 C 1 *
+bit 290 B 1 PD10 291 1 Z
+bit 289 C 1 *
+bit 288 B 1 PA23 289 1 Z
+bit 287 C 1 *
+bit 286 B 1 PA24 287 1 Z
+bit 285 C 1 *
+bit 284 B 1 PD11 285 1 Z
+bit 283 C 1 *
+bit 282 B 1 PD12 283 1 Z
+bit 281 C 1 *
+bit 280 B 1 PD13 281 1 Z
+bit 279 C 1 *
+bit 278 B 1 PD14 279 1 Z
+bit 277 C 1 *
+bit 276 B 1 PD15 277 1 Z
+bit 275 C 1 *
+bit 274 B 1 PD16 275 1 Z
+bit 273 C 1 *
+bit 272 B 1 PD17 273 1 Z
+bit 271 C 1 *
+bit 270 B 1 PA25 271 1 Z
+bit 269 C 1 *
+bit 268 B 1 PA26 269 1 Z
+bit 267 C 1 *
+bit 266 B 1 PA27 267 1 Z
+bit 265 C 1 *
+bit 264 B 1 PA28 265 1 Z
+bit 263 C 1 *
+bit 262 B 1 PA29 263 1 Z
+bit 261 C 1 *
+bit 260 B 1 PA30 261 1 Z
+bit 259 C 1 *
+bit 258 B 1 PA31 259 1 Z
+bit 257 C 1 *
+bit 256 B 1 PB26 257 1 Z
+bit 255 C 1 *
+bit 254 B 1 PB27 255 1 Z
+bit 253 C 1 *
+bit 252 B 1 PB28 253 1 Z
+bit 251 C 1 *
+bit 250 B 1 PX53 251 1 Z
+bit 249 C 1 *
+bit 248 B 1 PX52 249 1 Z
+bit 247 C 1 *
+bit 246 B 1 PX41 247 1 Z
+bit 245 C 1 *
+bit 244 B 1 PE25 245 1 Z
+bit 243 C 1 *
+bit 242 B 1 PE24 243 1 Z
+bit 241 C 1 *
+bit 240 B 1 PE23 241 1 Z
+bit 239 C 1 *
+bit 238 B 1 PE22 239 1 Z
+bit 237 C 1 *
+bit 236 B 1 PE21 237 1 Z
+bit 235 C 1 *
+bit 234 B 1 PE20 235 1 Z
+bit 233 C 1 *
+bit 232 B 1 PE19 233 1 Z
+bit 231 C 1 *
+bit 230 B 1 PX06 231 1 Z
+bit 229 C 1 *
+bit 228 B 1 PX07 229 1 Z
+bit 227 C 1 *
+bit 226 B 1 PX08 227 1 Z
+bit 225 C 1 *
+bit 224 B 1 PX09 225 1 Z
+bit 223 C 1 *
+bit 222 B 1 PX10 223 1 Z
+bit 221 C 1 *
+bit 220 B 1 PX11 221 1 Z
+bit 219 C 1 *
+bit 218 B 1 PB29 219 1 Z
+bit 217 C 1 *
+bit 216 B 1 PB30 217 1 Z
+bit 215 C 1 *
+bit 214 B 1 PX12 215 1 Z
+bit 213 C 1 *
+bit 212 B 1 PX13 213 1 Z
+bit 211 C 1 *
+bit 210 B 1 PC01 211 1 Z
+bit 209 C 1 *
+bit 208 B 1 PC02 209 1 Z
+bit 207 C 1 *
+bit 206 B 1 PC03 207 1 Z
+bit 205 C 1 *
+bit 204 B 1 PC04 205 1 Z
+bit 203 C 1 *
+bit 202 B 1 PC00 203 1 Z
+bit 201 C 1 *
+bit 200 B 1 PX14 201 1 Z
+bit 199 C 1 *
+bit 198 B 1 PX15 199 1 Z
+bit 197 C 1 *
+bit 196 B 1 PX16 197 1 Z
+bit 195 C 1 *
+bit 194 B 1 PX17 195 1 Z
+bit 193 C 1 *
+bit 192 B 1 PX34 193 1 Z
+bit 191 C 1 *
+bit 190 B 1 PX35 191 1 Z
+bit 189 C 1 *
+bit 188 B 1 PX36 189 1 Z
+bit 187 C 1 *
+bit 186 B 1 PX37 187 1 Z
+bit 185 C 1 *
+bit 184 B 1 PX38 185 1 Z
+bit 183 C 1 *
+bit 182 B 1 PX18 183 1 Z
+bit 181 C 1 *
+bit 180 B 1 PX19 181 1 Z
+bit 179 C 1 *
+bit 178 B 1 PX20 179 1 Z
+bit 177 C 1 *
+bit 176 B 1 PX21 177 1 Z
+bit 175 C 1 *
+bit 174 B 1 PX22 175 1 Z
+bit 173 C 1 *
+bit 172 B 1 PX23 173 1 Z
+bit 171 C 1 *
+bit 170 B 1 PX24 171 1 Z
+bit 169 C 1 *
+bit 168 B 1 PX25 169 1 Z
+bit 167 C 1 *
+bit 166 B 1 PX26 167 1 Z
+bit 165 C 1 *
+bit 164 B 1 PX27 165 1 Z
+bit 163 C 1 *
+bit 162 B 1 PX28 163 1 Z
+bit 161 C 1 *
+bit 160 B 1 PX29 161 1 Z
+bit 159 C 1 *
+bit 158 B 1 PX30 159 1 Z
+bit 157 C 1 *
+bit 156 B 1 PX31 157 1 Z
+bit 155 C 1 *
+bit 154 B 1 PC05 155 1 Z
+bit 153 C 1 *
+bit 152 B 1 PC06 153 1 Z
+bit 151 C 1 *
+bit 150 B 1 PE26 151 1 Z
+bit 149 C 1 *
+bit 148 B 1 PX39 149 1 Z
+bit 147 C 1 *
+bit 146 B 1 PC07 147 1 Z
+bit 145 C 1 *
+bit 144 B 1 PC08 145 1 Z
+bit 143 C 1 *
+bit 142 B 1 PC09 143 1 Z
+bit 141 C 1 *
+bit 140 B 1 PC10 141 1 Z
+bit 139 C 1 *
+bit 138 B 1 PC11 139 1 Z
+bit 137 C 1 *
+bit 136 B 1 PC12 137 1 Z
+bit 135 C 1 *
+bit 134 B 1 PC13 135 1 Z
+bit 133 C 1 *
+bit 132 B 1 PC14 133 1 Z
+bit 131 C 1 *
+bit 130 B 1 PC15 131 1 Z
+bit 129 C 1 *
+bit 128 B 1 PX40 129 1 Z
+bit 127 C 1 *
+bit 126 B 1 PX42 127 1 Z
+bit 125 C 1 *
+bit 124 B 1 PX43 125 1 Z
+bit 123 C 1 *
+bit 122 B 1 PX44 123 1 Z
+bit 121 C 1 *
+bit 120 B 1 PX45 121 1 Z
+bit 119 C 1 *
+bit 118 B 1 PX46 119 1 Z
+bit 117 C 1 *
+bit 116 B 1 PB00 117 1 Z
+bit 115 C 1 *
+bit 114 B 1 PB01 115 1 Z
+bit 113 C 1 *
+bit 112 B 1 PB02 113 1 Z
+bit 111 C 1 *
+bit 110 B 1 PB03 111 1 Z
+bit 109 C 1 *
+bit 108 B 1 PB04 109 1 Z
+bit 107 C 1 *
+bit 106 B 1 PB05 107 1 Z
+bit 105 C 1 *
+bit 104 B 1 PB06 105 1 Z
+bit 103 C 1 *
+bit 102 B 1 PB07 103 1 Z
+bit 101 C 1 *
+bit 100 B 1 PB08 101 1 Z
+bit 99 C 1 *
+bit 98 B 1 PB09 99 1 Z
+bit 97 C 1 *
+bit 96 B 1 PC16 97 1 Z
+bit 95 C 1 *
+bit 94 B 1 PC17 95 1 Z
+bit 93 C 1 *
+bit 92 B 1 PB10 93 1 Z
+bit 91 C 1 *
+bit 90 B 1 PB11 91 1 Z
+bit 89 C 1 *
+bit 88 B 1 PB12 89 1 Z
+bit 87 C 1 *
+bit 86 B 1 PB13 87 1 Z
+bit 85 C 1 *
+bit 84 B 1 PB14 85 1 Z
+bit 83 C 1 *
+bit 82 B 1 PB15 83 1 Z
+bit 81 C 1 *
+bit 80 B 1 PB16 81 1 Z
+bit 79 C 1 *
+bit 78 B 1 PB17 79 1 Z
+bit 77 C 1 *
+bit 76 B 1 PB18 77 1 Z
+bit 75 C 1 *
+bit 74 B 1 PB19 75 1 Z
+bit 73 C 1 *
+bit 72 B 1 PB20 73 1 Z
+bit 71 C 1 *
+bit 70 B 1 PB21 71 1 Z
+bit 69 C 1 *
+bit 68 B 1 PB22 69 1 Z
+bit 67 C 1 *
+bit 66 B 1 PB23 67 1 Z
+bit 65 C 1 *
+bit 64 B 1 PC18 65 1 Z
+bit 63 C 1 *
+bit 62 B 1 PA06 63 1 Z
+bit 61 C 1 *
+bit 60 B 1 PA07 61 1 Z
+bit 59 C 1 *
+bit 58 B 1 PC19 59 1 Z
+bit 57 C 1 *
+bit 56 B 1 PC20 57 1 Z
+bit 55 C 1 *
+bit 54 B 1 PC21 55 1 Z
+bit 53 C 1 *
+bit 52 B 1 PC22 53 1 Z
+bit 51 C 1 *
+bit 50 B 1 PC23 51 1 Z
+bit 49 C 1 *
+bit 48 B 1 PC24 49 1 Z
+bit 47 C 1 *
+bit 46 B 1 PC25 47 1 Z
+bit 45 C 1 *
+bit 44 B 1 PC26 45 1 Z
+bit 43 C 1 *
+bit 42 B 1 PC27 43 1 Z
+bit 41 C 1 *
+bit 40 B 1 PC28 41 1 Z
+bit 39 C 1 *
+bit 38 B 1 PC29 39 1 Z
+bit 37 C 1 *
+bit 36 B 1 PC30 37 1 Z
+bit 35 C 1 *
+bit 34 B 1 PC31 35 1 Z
+bit 33 C 1 *
+bit 32 B 1 PE00 33 1 Z
+bit 31 C 1 *
+bit 30 B 1 PE01 31 1 Z
+bit 29 C 1 *
+bit 28 B 1 PE02 29 1 Z
+bit 27 C 1 *
+bit 26 B 1 PE03 27 1 Z
+bit 25 C 1 *
+bit 24 B 1 PE04 25 1 Z
+bit 23 C 1 *
+bit 22 B 1 PE05 23 1 Z
+bit 21 C 1 *
+bit 20 B 1 PE06 21 1 Z
+bit 19 C 1 *
+bit 18 B 1 PE07 19 1 Z
+bit 17 C 1 *
+bit 16 B 1 PE08 17 1 Z
+bit 15 C 1 *
+bit 14 B 1 PE09 15 1 Z
+bit 13 C 1 *
+bit 12 B 1 PE10 13 1 Z
+bit 11 C 1 *
+bit 10 B 1 PE11 11 1 Z
+bit 9 C 1 *
+bit 8 B 1 PE12 9 1 Z
+bit 7 C 1 *
+bit 6 B 1 PE13 7 1 Z
+bit 5 C 1 *
+bit 4 B 1 PE14 5 1 Z
+bit 3 C 1 *
+bit 2 B 1 PE15 3 1 Z
+bit 1 C 1 *
+bit 0 B 1 PE16 1 1 Z
+
+endian big
--- /dev/null
+#
+# $Id: STEPPINGS,v 1.1 2002/08/23 14:08:33 telka Exp $
+#
+# Copyright (C) 2002 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Marcel Telka <marcel@telka.sk>, 2002.
+#
+# Documentation:
+# [1] Atmel Corporation, "ATmega128(L) - 8-bit AVR Microcontroller with
+# 128K Bytes In-System Programmable Flash", 2002, Rev. 2467E-AVR-05/02
+#
+
+# bits 31-28 of the Device Identification Register
+# see Table 99 in [1]
+0000 at91sam7s_tq64v0 0
--- /dev/null
+signal erase
+signal icetck
+signal icetdi
+signal icetms
+signal jtagsel
+signal selv32
+signal test
+signal nrst
+signal pa0
+signal pa1
+signal pa10
+signal pa11
+signal pa12
+signal pa13
+signal pa14
+signal pa15
+signal pa16
+signal pa17
+signal pa18
+signal pa19
+signal pa2
+signal pa20
+signal pa3
+signal pa4
+signal pa5
+signal pa6
+signal pa7
+signal pa8
+signal pa9
+
+register BSR 97
+register BR 1
+register DIR 32
+
+instruction length 3
+
+instruction BYPASS 111 BR
+instruction EXTEST 000 BSR
+instruction SAMPLE/PRELOAD 001 BSR
+instruction IDCODE 010 DIR
+
+bit 96 I 1 pa17
+bit 95 O 1 pa17 94 1 Z
+bit 94 C 1 *
+bit 93 I 1 pa18
+bit 92 O 1 pa18 91 1 Z
+bit 91 C 1 *
+bit 90 O 1 *
+bit 89 O 1 *
+bit 88 O 1 *
+bit 87 I 1 pa19
+bit 86 O 1 pa19 85 1 Z
+bit 85 C 1 *
+bit 84 I 1 pa20
+bit 83 O 1 pa20 82 1 Z
+bit 82 C 1 *
+bit 81 I 1 pa16
+bit 80 O 1 pa16 79 1 Z
+bit 79 C 1 *
+bit 78 I 1 pa15
+bit 77 O 1 pa15 76 1 Z
+bit 76 C 1 *
+bit 75 I 1 pa14
+bit 74 O 1 pa14 73 1 Z
+bit 73 C 1 *
+bit 72 I 1 pa13
+bit 71 O 1 pa13 70 1 Z
+bit 70 C 1 *
+bit 69 O 1 *
+bit 68 O 1 *
+bit 67 O 1 *
+bit 66 O 1 *
+bit 65 O 1 *
+bit 64 O 1 *
+bit 63 O 1 *
+bit 62 O 1 *
+bit 61 O 1 *
+bit 60 I 1 pa12
+bit 59 O 1 pa12 58 1 Z
+bit 58 C 1 *
+bit 57 I 1 pa11
+bit 56 O 1 pa11 55 1 Z
+bit 55 C 1 *
+bit 54 I 1 pa10
+bit 53 O 1 pa10 52 1 Z
+bit 52 C 1 *
+bit 51 I 1 pa9
+bit 50 O 1 pa9 49 1 Z
+bit 49 C 1 *
+bit 48 I 1 pa8
+bit 47 O 1 pa8 46 1 Z
+bit 46 C 1 *
+bit 45 I 1 pa7
+bit 44 O 1 pa7 43 1 Z
+bit 43 C 1 *
+bit 42 I 1 pa6
+bit 41 O 1 pa6 40 1 Z
+bit 40 C 1 *
+bit 39 I 1 pa5
+bit 38 O 1 pa5 37 1 Z
+bit 37 C 1 *
+bit 36 I 1 pa4
+bit 35 O 1 pa4 34 1 Z
+bit 34 C 1 *
+bit 33 O 1 *
+bit 32 O 1 *
+bit 31 O 1 *
+bit 30 O 1 *
+bit 29 O 1 *
+bit 28 O 1 *
+bit 27 O 1 *
+bit 26 O 1 *
+bit 25 O 1 *
+bit 24 O 1 *
+bit 23 O 1 *
+bit 22 O 1 *
+bit 21 I 1 pa3
+bit 20 O 1 pa3 19 1 Z
+bit 19 C 1 *
+bit 18 I 1 pa2
+bit 17 O 1 pa2 16 1 Z
+bit 16 C 1 *
+bit 15 I 1 pa1
+bit 14 O 1 pa1 13 1 Z
+bit 13 C 1 *
+bit 12 I 1 pa0
+bit 11 O 1 pa0 10 1 Z
+bit 10 C 1 *
+bit 9 O 1 *
+bit 8 O 1 *
+bit 7 O 1 *
+bit 6 O 1 *
+bit 5 O 1 *
+bit 4 O 1 *
+bit 3 O 1 *
+bit 2 O 1 *
+bit 1 O 1 *
+bit 0 I 1 erase
--- /dev/null
+signal erase 55
+signal icetck 53
+signal icetdi 33
+signal icetms 51
+signal jtagsel 50
+signal selv32 61
+signal test 40
+signal nrst 39
+signal pa0 48
+signal pa1 47
+signal pa10 29
+signal pa11 28
+signal pa12 27
+signal pa13 22
+signal pa14 21
+signal pa15 20
+signal pa16 19
+signal pa17 9
+signal pa18 10
+signal pa19 13
+signal pa2 44
+signal pa20 16
+signal pa3 43
+signal pa4 36
+signal pa5 35
+signal pa6 34
+signal pa7 32
+signal pa8 31
+signal pa9 30
+
+register BSR 97
+register BR 1
+register DIR 32
+
+instruction length 3
+
+instruction BYPASS 111 BR
+instruction EXTEST 000 BSR
+instruction SAMPLE/PRELOAD 001 BSR
+instruction IDCODE 010 DIR
+
+bit 96 I 1 pa17
+bit 95 O 1 pa17 94 1 Z
+bit 94 C 1 *
+bit 93 I 1 pa18
+bit 92 O 1 pa18 91 1 Z
+bit 91 C 1 *
+bit 90 O 1 *
+bit 89 O 1 *
+bit 88 O 1 *
+bit 87 I 1 pa19
+bit 86 O 1 pa19 85 1 Z
+bit 85 C 1 *
+bit 84 I 1 pa20
+bit 83 O 1 pa20 82 1 Z
+bit 82 C 1 *
+bit 81 I 1 pa16
+bit 80 O 1 pa16 79 1 Z
+bit 79 C 1 *
+bit 78 I 1 pa15
+bit 77 O 1 pa15 76 1 Z
+bit 76 C 1 *
+bit 75 I 1 pa14
+bit 74 O 1 pa14 73 1 Z
+bit 73 C 1 *
+bit 72 I 1 pa13
+bit 71 O 1 pa13 70 1 Z
+bit 70 C 1 *
+bit 69 O 1 *
+bit 68 O 1 *
+bit 67 O 1 *
+bit 66 O 1 *
+bit 65 O 1 *
+bit 64 O 1 *
+bit 63 O 1 *
+bit 62 O 1 *
+bit 61 O 1 *
+bit 60 I 1 pa12
+bit 59 O 1 pa12 58 1 Z
+bit 58 C 1 *
+bit 57 I 1 pa11
+bit 56 O 1 pa11 55 1 Z
+bit 55 C 1 *
+bit 54 I 1 pa10
+bit 53 O 1 pa10 52 1 Z
+bit 52 C 1 *
+bit 51 I 1 pa9
+bit 50 O 1 pa9 49 1 Z
+bit 49 C 1 *
+bit 48 I 1 pa8
+bit 47 O 1 pa8 46 1 Z
+bit 46 C 1 *
+bit 45 I 1 pa7
+bit 44 O 1 pa7 43 1 Z
+bit 43 C 1 *
+bit 42 I 1 pa6
+bit 41 O 1 pa6 40 1 Z
+bit 40 C 1 *
+bit 39 I 1 pa5
+bit 38 O 1 pa5 37 1 Z
+bit 37 C 1 *
+bit 36 I 1 pa4
+bit 35 O 1 pa4 34 1 Z
+bit 34 C 1 *
+bit 33 O 1 *
+bit 32 O 1 *
+bit 31 O 1 *
+bit 30 O 1 *
+bit 29 O 1 *
+bit 28 O 1 *
+bit 27 O 1 *
+bit 26 O 1 *
+bit 25 O 1 *
+bit 24 O 1 *
+bit 23 O 1 *
+bit 22 O 1 *
+bit 21 I 1 pa3
+bit 20 O 1 pa3 19 1 Z
+bit 19 C 1 *
+bit 18 I 1 pa2
+bit 17 O 1 pa2 16 1 Z
+bit 16 C 1 *
+bit 15 I 1 pa1
+bit 14 O 1 pa1 13 1 Z
+bit 13 C 1 *
+bit 12 I 1 pa0
+bit 11 O 1 pa0 10 1 Z
+bit 10 C 1 *
+bit 9 O 1 *
+bit 8 O 1 *
+bit 7 O 1 *
+bit 6 O 1 *
+bit 5 O 1 *
+bit 4 O 1 *
+bit 3 O 1 *
+bit 2 O 1 *
+bit 1 O 1 *
+bit 0 I 1 erase
--- /dev/null
+#
+# $Id: STEPPINGS 20 2005-05-24 02:39:42Z philwil $
+#
+# Copyright (C) 2002 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Marcel Telka <marcel@telka.sk>, 2002.
+# Modified by Stefan Pledl <stefan.pledl@mesutronic.de>, 2007
+#
+# Documentation:
+# [1] Atmel Corporation, 1504BSDL.ZIP - BSDL files for ATF1504AS/ASL and
+# ATF1504ASV/ASVL
+#
+
+# bits 31-28 of the Device Identification Register
+0000 atf1504asv A
--- /dev/null
+#
+# $Id: STEPPINGS 20 2005-05-24 02:39:42Z philwil $
+#
+# Copyright (C) 2002 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Generated by Stefan Pledl <stefan.pledl@mesutronic.de>, 2007
+# with bsdl2jtag
+#
+# Documentation:
+# [1] Atmel Corporation, 1504BSDL.ZIP - BSDL files for ATF1504AS/ASL and
+# ATF1504ASV/ASVL
+#
+
+signal IO4
+signal IO5
+signal IO6
+signal IO8
+signal IO9
+signal IO11
+signal IO12
+signal IO14
+signal IO16
+signal IO17
+signal IO18
+signal IO19
+signal IO20
+signal IO21
+signal IO24
+signal IO25
+signal IO26
+signal IO27
+signal IO28
+signal IO29
+signal IO31
+signal IO33
+signal IO34
+signal IO36
+signal IO37
+signal IO39
+signal IO40
+signal IO41
+signal TCK
+signal TDI
+signal TDO
+signal TMS
+signal DIN1
+signal DIN2
+signal DIN3
+signal DIN4
+signal VCC1
+signal VCC2
+signal VCC3
+signal VCC4
+signal GND1
+signal GND2
+signal GND3
+
+register BSR 192
+register BR 1
+register DIR 32
+
+instruction length 10
+
+instruction EXTEST 0000000000 BSR
+instruction BYPASS 1111111111 BR
+instruction SAMPLE/PRELOAD 0001010101 BSR
+instruction IDCODE 0001011001 DIR
+
+bit 191 O 1 IO4 190 0 Z
+bit 190 C 0 *
+bit 189 O 1 *
+bit 188 O 0 *
+bit 187 O 1 IO5 186 0 Z
+bit 186 C 0 *
+bit 185 O 1 *
+bit 184 O 0 *
+bit 183 O 1 *
+bit 182 O 0 *
+bit 181 O 1 IO6 180 0 Z
+bit 180 C 0 *
+bit 179 O 1 *
+bit 178 O 0 *
+bit 177 O 1 *
+bit 176 O 0 *
+bit 175 O 1 *
+bit 174 O 0 *
+bit 173 O 1 *
+bit 172 O 0 *
+bit 171 O 1 *
+bit 170 O 0 *
+bit 169 O 1 IO8 168 0 Z
+bit 168 C 0 *
+bit 167 O 1 IO9 166 0 Z
+bit 166 C 0 *
+bit 165 O 1 IO11 164 0 Z
+bit 164 C 0 *
+bit 163 O 1 *
+bit 162 O 0 *
+bit 161 O 1 IO12 160 0 Z
+bit 160 C 0 *
+bit 159 O 1 *
+bit 158 O 0 *
+bit 157 O 1 *
+bit 156 O 0 *
+bit 155 O 1 IO14 154 0 Z
+bit 154 C 0 *
+bit 153 O 1 *
+bit 152 O 0 *
+bit 151 O 1 *
+bit 150 O 0 *
+bit 149 O 1 *
+bit 148 O 0 *
+bit 147 O 1 *
+bit 146 O 0 *
+bit 145 O 1 IO16 144 0 Z
+bit 144 C 0 *
+bit 143 O 1 IO17 142 0 Z
+bit 142 C 0 *
+bit 141 O 1 *
+bit 140 O 0 *
+bit 139 O 1 *
+bit 138 O 0 *
+bit 137 O 1 IO18 136 0 Z
+bit 136 C 0 *
+bit 135 O 1 IO19 134 0 Z
+bit 134 C 0 *
+bit 133 O 1 IO20 132 0 Z
+bit 132 C 0 *
+bit 131 O 1 *
+bit 130 O 0 *
+bit 129 O 1 IO21 128 0 Z
+bit 128 C 0 *
+bit 127 O 1 IO24 126 0 Z
+bit 126 C 0 *
+bit 125 O 1 *
+bit 124 O 0 *
+bit 123 O 1 IO25 122 0 Z
+bit 122 C 0 *
+bit 121 O 1 IO26 120 0 Z
+bit 120 C 0 *
+bit 119 O 1 IO27 118 0 Z
+bit 118 C 0 *
+bit 117 O 1 *
+bit 116 O 0 *
+bit 115 O 1 *
+bit 114 O 0 *
+bit 113 O 1 IO28 112 0 Z
+bit 112 C 0 *
+bit 111 O 1 IO29 110 0 Z
+bit 110 C 0 *
+bit 109 O 1 *
+bit 108 O 0 *
+bit 107 O 1 *
+bit 106 O 0 *
+bit 105 O 1 *
+bit 104 O 0 *
+bit 103 O 1 *
+bit 102 O 0 *
+bit 101 O 1 IO31 100 0 Z
+bit 100 C 0 *
+bit 99 O 1 *
+bit 98 O 0 *
+bit 97 O 1 *
+bit 96 O 0 *
+bit 95 O 1 IO33 94 0 Z
+bit 94 C 0 *
+bit 93 O 1 *
+bit 92 O 0 *
+bit 91 O 1 IO34 90 0 Z
+bit 90 C 0 *
+bit 89 O 1 IO36 88 0 Z
+bit 88 C 0 *
+bit 87 O 1 IO37 86 0 Z
+bit 86 C 0 *
+bit 85 O 1 *
+bit 84 O 0 *
+bit 83 O 1 *
+bit 82 O 0 *
+bit 81 O 1 *
+bit 80 O 0 *
+bit 79 O 1 IO39 78 0 Z
+bit 78 C 0 *
+bit 77 O 1 *
+bit 76 O 0 *
+bit 75 O 1 *
+bit 74 O 0 *
+bit 73 O 1 *
+bit 72 O 0 *
+bit 71 O 1 *
+bit 70 O 0 *
+bit 69 O 1 IO40 68 0 Z
+bit 68 C 0 *
+bit 67 O 1 *
+bit 66 O 0 *
+bit 65 O 1 IO41 64 0 Z
+bit 64 C 0 *
+bit 63 I 1 DIN1
+bit 62 I 1 DIN2
+bit 61 I 1 IO4
+bit 60 O 1 *
+bit 59 I 1 IO5
+bit 58 O 1 *
+bit 57 O 1 *
+bit 56 I 1 IO6
+bit 55 O 1 *
+bit 54 O 1 *
+bit 53 O 1 *
+bit 52 O 1 *
+bit 51 I 1 IO8
+bit 50 I 1 IO9
+bit 49 I 1 IO11
+bit 48 O 1 *
+bit 47 I 1 IO12
+bit 46 O 1 *
+bit 45 I 1 IO14
+bit 44 O 1 *
+bit 43 O 1 *
+bit 42 O 1 *
+bit 41 O 1 *
+bit 40 I 1 IO16
+bit 39 I 1 IO17
+bit 38 O 1 *
+bit 37 O 1 *
+bit 36 I 1 IO18
+bit 35 I 1 IO19
+bit 34 I 1 IO20
+bit 33 O 1 *
+bit 32 I 1 IO21
+bit 31 I 1 IO24
+bit 30 O 1 *
+bit 29 I 1 IO25
+bit 28 I 1 IO26
+bit 27 I 1 IO27
+bit 26 O 1 *
+bit 25 O 1 *
+bit 24 I 1 IO28
+bit 23 I 1 IO29
+bit 22 O 1 *
+bit 21 O 1 *
+bit 20 O 1 *
+bit 19 O 1 *
+bit 18 I 1 IO31
+bit 17 O 1 *
+bit 16 I 1 IO33
+bit 15 O 1 *
+bit 14 I 1 IO34
+bit 13 I 1 IO36
+bit 12 I 1 IO37
+bit 11 O 1 *
+bit 10 O 1 *
+bit 9 I 1 IO39
+bit 8 O 1 *
+bit 7 O 1 *
+bit 6 O 1 *
+bit 5 O 1 *
+bit 4 I 1 IO40
+bit 3 O 1 *
+bit 2 I 1 IO41
+bit 1 I 1 DIN3
+bit 0 I 1 DIN4
--- /dev/null
+#
+# $Id$
+#
+# Copyright (C) 2002 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Marcel Telka <marcel@telka.sk>, 2002.
+#
+# Documentation:
+# [1] Atmel Corporation, "ATmega128(L) - 8-bit AVR Microcontroller with
+# 128K Bytes In-System Programmable Flash", 2002, Rev. 2467E-AVR-05/02
+#
+
+# bits 31-28 of the Device Identification Register
+# see Table 99 in [1]
+0011 atmega128 C
+0101 atmega128 F
+0110 atmega128 G
--- /dev/null
+#
+# $Id$
+#
+# JTAG declarations for ATmega128
+# Copyright (C) 2002 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Marcel Telka <marcel@telka.sk>, 2002.
+#
+# Documentation:
+# [1] Atmel Corporation, "ATmega128(L) - 8-bit AVR Microcontroller with
+# 128K Bytes In-System Programmable Flash", 2002, Rev. 2467E-AVR-05/02
+#
+
+# mandatory data registers
+register BSR 205 # see Table 106 in [1]
+register BR 1
+# optional data registers
+register DIR 32
+# user-defined registers
+register RR 1 # Reset Register
+register PER 16 # Programming Enable Register
+register PCR 15 # Programming Command Register
+register VFPLR 2048 # Virtual Flash Page Load Register
+register VFPRR 2056 # Virtual Flash Page Read Register
+
+# see page 250 in [1]
+instruction length 4
+# mandatory instructions
+instruction EXTEST 0000 BSR # see page 250 in [1]
+instruction SAMPLE/PRELOAD 0010 BSR # see page 251 in [1]
+instruction BYPASS 1111 BR # see page 251 in [1]
+# optional instructions
+instruction IDCODE 0001 DIR # see page 250 in [1]
+# user-defined instructions
+instruction AVR_RESET 1100 RR # see page 251 and page 303 in [1]
+# unknown data registers for PRIVATE? instructions
+#instruction PRIVATE0 1000 # see page 246 in [1]
+#instruction PRIVATE1 1001 # see page 246 in [1]
+#instruction PRIVATE2 1010 # see page 246 in [1]
+#instruction PRIVATE3 1011 # see page 246 in [1]
+instruction PROG_ENABLE 0100 PER # see page 303 in [1]
+instruction PROG_COMMANDS 0101 PCR # see page 304 in [1]
+instruction PROG_PAGELOAD 0110 VFPLR # see page 304 in [1]
+instruction PROG_PAGEREAD 0111 VFPRR # see page 304 in [1]
--- /dev/null
+#
+# $Id$
+#
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+#
+
+# bits 27-12 of the Device Identification Register
+0000001000000010 msp2006 MSP2006
--- /dev/null
+#
+# $Id$
+#
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+#
+
+# bits 31-28 of the Device Identification Register
+0001 msp2006 1
--- /dev/null
+#
+# $Id$
+
+register BR 1
+register BSR 1
+register DIR 32
+register EJIMPCODE 32
+register EJADDRESS 32
+register EJDATA 32
+register EJCONTROL 32
+register EJALL 96
+register EJFASTDATA 33
+
+instruction length 5
+
+instruction BYPASS 11111 BR
+instruction SAMPLE/PRELOAD 00010 BSR
+instruction IDCODE 00001 DIR
+instruction EJTAG_IMPCODE 00011 EJIMPCODE
+instruction EJTAG_ADDRESS 01000 EJADDRESS
+instruction EJTAG_DATA 01001 EJDATA
+instruction EJTAG_CONTROL 01010 EJCONTROL
+instruction EJTAG_ALL 01011 EJALL
+instruction EJTAGBOOT 01100 BR
+instruction NORMALBOOT 01101 BR
+instruction EJTAG_FASTDATA 01110 EJFASTDATA
+
+initbus ejtag
+endian big
--- /dev/null
+#
+# $Id$
+#
+# Copyright (C) 2003 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Matan Ziv-Av <matan@svgalib.org>, 2003.
+#
+
+# bits 27-12 of the Device Identification Register
+0001001001010000 bcm1250 BCM1250
+0011001100010000 bcm3310 BCM3310
+0101010000100001 bcm5421s BCM5421S
+0100011100010010 bcm4712 BCM4712
+0110001101011000 bcm6358 BCM6358
--- /dev/null
+#
+# $Id$
+#
+# Copyright (C) 2003 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Matan Ziv-Av <matan@svgalib.org>, 2003.
+#
+
+# bits 31-28 of the Device Identification Register
+0011 bcm1250 Ver 3
+1011 bcm1250 Ver 11
--- /dev/null
+#
+# $Id$
+#
+# JTAG declarations for BCM1250
+# Copyright (C) 2003 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Matan Ziv-Av <matan@svgalib.org>, 2003.
+#
+
+signal TRST_L
+signal TMS
+signal TDO
+signal TDI
+signal TCK
+signal SPARE2
+signal SPARE3
+signal SPARE4
+signal SPARE5
+signal SDA0
+signal SDA1
+signal SCL0
+signal SCL1
+signal S1_TIN
+signal S1_RTS_TSTROBE
+signal S1_RIN
+signal S1_DOUT
+signal S1_DIN
+signal S1_CTS_TCLKIN
+signal S1_COUT
+signal S1_CIN_RCLKIN
+signal S0_TIN
+signal S0_RTS_TSTROBE
+signal S0_RIN
+signal S0_DOUT
+signal S0_DIN
+signal S0_CTS_TCLKIN
+signal S0_COUT
+signal S0_CIN_RCLKIN
+signal RESET_L
+signal RESETOUT_L
+signal REFCLK2
+signal REFCLK01
+signal P_TRDY_L
+signal P_STOP_L
+signal P_SERR_L
+signal P_RST_L
+signal P_REQ_l0
+signal P_REQ_L1
+signal P_REQ_L2
+signal P_REQ_L3
+signal P_PERR_L
+signal P_PAR
+signal P_IRDY_L
+signal P_INTD_L
+signal P_INTC_L
+signal P_INTB_L
+signal P_INTA_L
+signal P_GNT_l0
+signal P_GNT_L1
+signal P_GNT_L2
+signal P_GNT_L3
+signal P_FRAME_L
+signal P_DEVSEL_L
+signal P_CLK
+signal P_CBE_L0
+signal P_CBE_L1
+signal P_CBE_L2
+signal P_CBE_L3
+signal P_AD0
+signal P_AD1
+signal P_AD2
+signal P_AD3
+signal P_AD4
+signal P_AD5
+signal P_AD6
+signal P_AD7
+signal P_AD8
+signal P_AD9
+signal P_AD10
+signal P_AD11
+signal P_AD12
+signal P_AD13
+signal P_AD14
+signal P_AD15
+signal P_AD16
+signal P_AD17
+signal P_AD18
+signal P_AD19
+signal P_AD20
+signal P_AD21
+signal P_AD22
+signal P_AD23
+signal P_AD24
+signal P_AD25
+signal P_AD26
+signal P_AD27
+signal P_AD28
+signal P_AD29
+signal P_AD30
+signal P_AD31
+signal PLLBYP
+signal PC_ENVPP
+signal PC_ENV5V
+signal PC_ENV3V
+signal M1_WE_L
+signal M1_RAS_L
+signal M1_ECC0
+signal M1_ECC1
+signal M1_ECC2
+signal M1_ECC3
+signal M1_ECC4
+signal M1_ECC5
+signal M1_ECC6
+signal M1_ECC7
+signal M1_DQS0
+signal M1_DQS1
+signal M1_DQS2
+signal M1_DQS3
+signal M1_DQS4
+signal M1_DQS5
+signal M1_DQS6
+signal M1_DQS7
+signal M1_DQS8
+signal M1_DQ0
+signal M1_DQ1
+signal M1_DQ2
+signal M1_DQ3
+signal M1_DQ4
+signal M1_DQ5
+signal M1_DQ6
+signal M1_DQ7
+signal M1_DQ8
+signal M1_DQ9
+signal M1_DQ10
+signal M1_DQ11
+signal M1_DQ12
+signal M1_DQ13
+signal M1_DQ14
+signal M1_DQ15
+signal M1_DQ16
+signal M1_DQ17
+signal M1_DQ18
+signal M1_DQ19
+signal M1_DQ20
+signal M1_DQ21
+signal M1_DQ22
+signal M1_DQ23
+signal M1_DQ24
+signal M1_DQ25
+signal M1_DQ26
+signal M1_DQ27
+signal M1_DQ28
+signal M1_DQ29
+signal M1_DQ30
+signal M1_DQ31
+signal M1_DQ32
+signal M1_DQ33
+signal M1_DQ34
+signal M1_DQ35
+signal M1_DQ36
+signal M1_DQ37
+signal M1_DQ38
+signal M1_DQ39
+signal M1_DQ40
+signal M1_DQ41
+signal M1_DQ42
+signal M1_DQ43
+signal M1_DQ44
+signal M1_DQ45
+signal M1_DQ46
+signal M1_DQ47
+signal M1_DQ48
+signal M1_DQ49
+signal M1_DQ50
+signal M1_DQ51
+signal M1_DQ52
+signal M1_DQ53
+signal M1_DQ54
+signal M1_DQ55
+signal M1_DQ56
+signal M1_DQ57
+signal M1_DQ58
+signal M1_DQ59
+signal M1_DQ60
+signal M1_DQ61
+signal M1_DQ62
+signal M1_DQ63
+signal M1_CS_L0
+signal M1_CS_L1
+signal M1_CS_L2
+signal M1_CS_L3
+signal M1_CLK_L
+signal M1_CLK
+signal M1_CKE
+signal M1_CAS_L
+signal M1_BA0
+signal M1_BA1
+signal M1_A0
+signal M1_A1
+signal M1_A2
+signal M1_A3
+signal M1_A4
+signal M1_A5
+signal M1_A6
+signal M1_A7
+signal M1_A8
+signal M1_A9
+signal M1_A10
+signal M1_A11
+signal M1_A12
+signal M0_WE_L
+signal M0_RAS_L
+signal M0_ECC0
+signal M0_ECC1
+signal M0_ECC2
+signal M0_ECC3
+signal M0_ECC4
+signal M0_ECC5
+signal M0_ECC6
+signal M0_ECC7
+signal M0_DQS0
+signal M0_DQS1
+signal M0_DQS2
+signal M0_DQS3
+signal M0_DQS4
+signal M0_DQS5
+signal M0_DQS6
+signal M0_DQS7
+signal M0_DQS8
+signal M0_DQ0
+signal M0_DQ1
+signal M0_DQ2
+signal M0_DQ3
+signal M0_DQ4
+signal M0_DQ5
+signal M0_DQ6
+signal M0_DQ7
+signal M0_DQ8
+signal M0_DQ9
+signal M0_DQ10
+signal M0_DQ11
+signal M0_DQ12
+signal M0_DQ13
+signal M0_DQ14
+signal M0_DQ15
+signal M0_DQ16
+signal M0_DQ17
+signal M0_DQ18
+signal M0_DQ19
+signal M0_DQ20
+signal M0_DQ21
+signal M0_DQ22
+signal M0_DQ23
+signal M0_DQ24
+signal M0_DQ25
+signal M0_DQ26
+signal M0_DQ27
+signal M0_DQ28
+signal M0_DQ29
+signal M0_DQ30
+signal M0_DQ31
+signal M0_DQ32
+signal M0_DQ33
+signal M0_DQ34
+signal M0_DQ35
+signal M0_DQ36
+signal M0_DQ37
+signal M0_DQ38
+signal M0_DQ39
+signal M0_DQ40
+signal M0_DQ41
+signal M0_DQ42
+signal M0_DQ43
+signal M0_DQ44
+signal M0_DQ45
+signal M0_DQ46
+signal M0_DQ47
+signal M0_DQ48
+signal M0_DQ49
+signal M0_DQ50
+signal M0_DQ51
+signal M0_DQ52
+signal M0_DQ53
+signal M0_DQ54
+signal M0_DQ55
+signal M0_DQ56
+signal M0_DQ57
+signal M0_DQ58
+signal M0_DQ59
+signal M0_DQ60
+signal M0_DQ61
+signal M0_DQ62
+signal M0_DQ63
+signal M0_CS_L0
+signal M0_CS_L1
+signal M0_CS_L2
+signal M0_CS_L3
+signal M0_CLK_L
+signal M0_CLK
+signal M0_CKE
+signal M0_CAS_L
+signal M0_BA0
+signal M0_BA1
+signal M0_A0
+signal M0_A1
+signal M0_A2
+signal M0_A3
+signal M0_A4
+signal M0_A5
+signal M0_A6
+signal M0_A7
+signal M0_A8
+signal M0_A9
+signal M0_A10
+signal M0_A11
+signal M0_A12
+signal LDT_TX_CTLP
+signal LDT_TX_CTLN
+signal LDT_TX_CLKP
+signal LDT_TX_CLKN
+signal LDT_TX_CADP0
+signal LDT_TX_CADP1
+signal LDT_TX_CADP2
+signal LDT_TX_CADP3
+signal LDT_TX_CADP4
+signal LDT_TX_CADP5
+signal LDT_TX_CADP6
+signal LDT_TX_CADP7
+signal LDT_TX_CADN0
+signal LDT_TX_CADN1
+signal LDT_TX_CADN2
+signal LDT_TX_CADN3
+signal LDT_TX_CADN4
+signal LDT_TX_CADN5
+signal LDT_TX_CADN6
+signal LDT_TX_CADN7
+signal LDT_RX_CTLP
+signal LDT_RX_CTLN
+signal LDT_RX_CADP0
+signal LDT_RX_CADP1
+signal LDT_RX_CADP2
+signal LDT_RX_CADP3
+signal LDT_RX_CADP4
+signal LDT_RX_CADP5
+signal LDT_RX_CADP6
+signal LDT_RX_CADP7
+signal LDT_RX_CADN0
+signal LDT_RX_CADN1
+signal LDT_RX_CADN2
+signal LDT_RX_CADN3
+signal LDT_RX_CADN4
+signal LDT_RX_CADN5
+signal LDT_RX_CADN6
+signal LDT_RX_CADN7
+signal LDT_RESET_L
+signal LDT_PWROK
+signal IO_WR_L
+signal IO_RW
+signal IO_RDY
+signal IO_OE_L
+signal IO_CS_L0
+signal IO_CS_L1
+signal IO_CS_L2
+signal IO_CS_L3
+signal IO_CS_L4
+signal IO_CS_L5
+signal IO_CS_L6
+signal IO_CS_L7
+signal IO_CLK100
+signal IO_ALE
+signal IO_AD0
+signal IO_AD1
+signal IO_AD2
+signal IO_AD3
+signal IO_AD4
+signal IO_AD5
+signal IO_AD6
+signal IO_AD7
+signal IO_AD8
+signal IO_AD9
+signal IO_AD10
+signal IO_AD11
+signal IO_AD12
+signal IO_AD13
+signal IO_AD14
+signal IO_AD15
+signal IO_AD16
+signal IO_AD17
+signal IO_AD18
+signal IO_AD19
+signal IO_AD20
+signal IO_AD21
+signal IO_AD22
+signal IO_AD23
+signal IO_AD24
+signal IO_AD25
+signal IO_AD26
+signal IO_AD27
+signal IO_AD28
+signal IO_AD29
+signal IO_AD30
+signal IO_AD31
+signal GPIO0
+signal GPIO1
+signal GPIO2
+signal GPIO3
+signal GPIO4
+signal GPIO5
+signal GPIO6
+signal GPIO7
+signal GPIO8
+signal GPIO9
+signal GPIO10
+signal GPIO11
+signal GPIO12
+signal GPIO13
+signal GPIO14
+signal GPIO15
+signal E2_TXER
+signal E2_TXEN
+signal E2_TXD0
+signal E2_TXD1
+signal E2_TXD2
+signal E2_TXD3
+signal E2_TXD4
+signal E2_TXD5
+signal E2_TXD6
+signal E2_TXD7
+signal E2_TCLKO
+signal E2_TCLKI
+signal E2_RXER
+signal E2_RXDV
+signal E2_RXD0
+signal E2_RXD1
+signal E2_RXD2
+signal E2_RXD3
+signal E2_RXD4
+signal E2_RXD5
+signal E2_RXD6
+signal E2_RXD7
+signal E2_RCLK
+signal E2_MDIO
+signal E2_MDC
+signal E2_GENO
+signal E2_CRS
+signal E2_COL
+signal E1_TXER
+signal E1_TXEN
+signal E1_TXD0
+signal E1_TXD1
+signal E1_TXD2
+signal E1_TXD3
+signal E1_TXD4
+signal E1_TXD5
+signal E1_TXD6
+signal E1_TXD7
+signal E1_TCLKO
+signal E1_TCLKI
+signal E1_RXER
+signal E1_RXDV
+signal E1_RXD0
+signal E1_RXD1
+signal E1_RXD2
+signal E1_RXD3
+signal E1_RXD4
+signal E1_RXD5
+signal E1_RXD6
+signal E1_RXD7
+signal E1_RCLK
+signal E1_MDIO
+signal E1_MDC
+signal E1_GENO
+signal E1_CRS
+signal E1_COL
+signal E0_TXER
+signal E0_TXEN
+signal E0_TXD0
+signal E0_TXD1
+signal E0_TXD2
+signal E0_TXD3
+signal E0_TXD4
+signal E0_TXD5
+signal E0_TXD6
+signal E0_TXD7
+signal E0_TCLKO
+signal E0_TCLKI
+signal E0_RXER
+signal E0_RXDV
+signal E0_RXD0
+signal E0_RXD1
+signal E0_RXD2
+signal E0_RXD3
+signal E0_RXD4
+signal E0_RXD5
+signal E0_RXD6
+signal E0_RXD7
+signal E0_RCLK
+signal E0_MDIO
+signal E0_MDC
+signal E0_GENO
+signal E0_CRS
+signal E0_COL
+signal DEBUG_L
+signal COLDRES_L
+signal CLK100P
+signal CLK100N
+signal GND0
+signal GND1
+signal GND2
+signal GND3
+signal GND4
+signal GND5
+signal GND6
+signal GND7
+signal GND8
+signal GND9
+signal GND10
+signal GND11
+signal GND12
+signal GND13
+signal GND14
+signal GND15
+signal GND16
+signal GND17
+signal GND18
+signal GND19
+signal GND20
+signal GND21
+signal GND22
+signal GND23
+signal GND24
+signal GND25
+signal GND26
+signal GND27
+signal GND28
+signal GND29
+signal GND30
+signal GND31
+signal GND32
+signal GND33
+signal GND34
+signal GND35
+signal GND36
+signal GND37
+signal GND38
+signal GND39
+signal GND40
+signal GND41
+signal GND42
+signal GND43
+signal GND44
+signal GND45
+signal GND46
+signal GND47
+signal GND48
+signal GND49
+signal GND50
+signal GND51
+signal GND52
+signal GND53
+signal GND54
+signal GND55
+signal GND56
+signal GND57
+signal GND58
+signal GND59
+signal GND60
+signal GND61
+signal GND62
+signal GND63
+signal GND64
+signal GND65
+signal GND66
+signal GND67
+signal GND68
+signal GND69
+signal GND70
+signal GND71
+signal GND72
+signal GND73
+signal GND74
+signal GND75
+signal GND76
+signal GND77
+signal GND78
+signal GND79
+signal GND80
+signal GND81
+signal GND82
+signal GND83
+signal GND84
+signal GND85
+signal GND86
+signal GND87
+signal GND88
+signal GND89
+signal GND90
+signal GND91
+signal GND92
+signal GND93
+signal GND94
+signal GND95
+signal GND96
+signal GND97
+signal GND98
+signal GND99
+signal GND100
+signal GND101
+signal GND102
+signal GND103
+signal GND104
+signal GND105
+signal GND106
+signal GND107
+signal GND108
+signal GND109
+signal GND110
+signal GND111
+signal GND112
+signal GND113
+signal GND114
+signal GND115
+signal GND116
+signal GND117
+signal GND118
+signal GND119
+signal GND120
+signal GND121
+signal GND122
+signal GND123
+signal GND124
+signal GND125
+signal GND126
+signal GND127
+signal GND128
+signal GND129
+signal GND130
+signal GND131
+signal GND132
+signal GND133
+signal GND134
+signal GND135
+signal GND136
+signal GND137
+signal GND138
+signal GND139
+signal GND140
+signal GND141
+signal GND142
+signal GND143
+signal GND144
+signal GND145
+signal GND146
+signal GND147
+signal GND148
+signal GND149
+signal GND150
+signal GND151
+signal GND152
+signal GND153
+signal GND154
+signal GND155
+signal GND156
+signal GND157
+signal GND158
+signal GND159
+signal GND160
+signal GND161
+signal GND162
+signal GND163
+signal GND164
+signal GND165
+signal GND166
+signal GND167
+signal GND168
+signal GND169
+signal GND170
+signal GND171
+signal GND172
+signal GND173
+signal GND174
+signal GND175
+signal GND176
+signal GND177
+signal GND178
+signal GND179
+signal GND180
+signal LDT_RX_CAL0
+signal LDT_RX_CAL1
+signal LDT_RX_CLKN
+signal LDT_RX_CLKP
+signal LDT_TX_CAL0
+signal LDT_TX_CAL1
+signal M0_VREF
+signal M1_VREF
+signal TEMPN
+signal TEMPP
+signal VDDCORE0
+signal VDDCORE1
+signal VDDCORE2
+signal VDDCORE3
+signal VDDCORE4
+signal VDDCORE5
+signal VDDCORE6
+signal VDDCORE7
+signal VDDCORE8
+signal VDDCORE9
+signal VDDCORE10
+signal VDDCORE11
+signal VDDCORE12
+signal VDDCORE13
+signal VDDCORE14
+signal VDDCORE15
+signal VDDCORE16
+signal VDDCORE17
+signal VDDCORE18
+signal VDDCORE19
+signal VDDCORE20
+signal VDDCORE21
+signal VDDCORE22
+signal VDDCORE23
+signal VDDCORE24
+signal VDDCORE25
+signal VDDCORE26
+signal VDDCORE27
+signal VDDCORE28
+signal VDDCORE29
+signal VDDCORE30
+signal VDDCORE31
+signal VDDCORE32
+signal VDDCORE33
+signal VDDCORE34
+signal VDDCORE35
+signal VDDCORE36
+signal VDDCORE37
+signal VDDCORE38
+signal VDDCORE39
+signal VDDCORE40
+signal VDDCORE41
+signal VDDCORE42
+signal VDDCORE43
+signal VDDCORE44
+signal VDDCORE45
+signal VDDCORE46
+signal VDDIO0
+signal VDDIO1
+signal VDDIO2
+signal VDDIO3
+signal VDDIO4
+signal VDDIO5
+signal VDDIO6
+signal VDDIO7
+signal VDDIO8
+signal VDDIO9
+signal VDDIO10
+signal VDDIO11
+signal VDDIO12
+signal VDDIO13
+signal VDDIO14
+signal VDDIO15
+signal VDDIO16
+signal VDDIO17
+signal VDDIO18
+signal VDDIO19
+signal VDDIO20
+signal VDDIO21
+signal VDDIO22
+signal VDDIO23
+signal VDDIO24
+signal VDDIO25
+signal VDDIO26
+signal VDDIO27
+signal VDDIO28
+signal VDDIO29
+signal VDDIO30
+signal VDDIO31
+signal VDDIO32
+signal VDDIO33
+signal VDDIO34
+signal VDDIO35
+signal VDDIO36
+signal VDDIO37
+signal VDDIO38
+signal VDDIO39
+signal VDDIO40
+signal VDDIO41
+signal VDDIO42
+signal VDDIO43
+signal VDDIO44
+signal VDDIO45
+signal VDDIO46
+signal VDDIO47
+signal VDDIO48
+signal VDDIO49
+signal VDDIO50
+signal VDDIO51
+signal VDDIO52
+signal VDDIO53
+signal VDDIO54
+signal VDDIO55
+signal VDDLDT0
+signal VDDLDT1
+signal VDDLDT2
+signal VDDLDT3
+signal VDDLDT4
+signal VDDLDT5
+signal VDDLDT6
+signal VDDLDT7
+signal VDDLDT8
+signal VDDLDT9
+signal VDDLDT10
+signal VDDLDT11
+signal VDDLDT12
+signal VDDLDT13
+signal VDDLDT14
+signal VDDLDT15
+signal VDDLDT16
+signal VDDLDT17
+signal VDDLDT18
+signal VDDMEM0
+signal VDDMEM1
+signal VDDMEM2
+signal VDDMEM3
+signal VDDMEM4
+signal VDDMEM5
+signal VDDMEM6
+signal VDDMEM7
+signal VDDMEM8
+signal VDDMEM9
+signal VDDMEM10
+signal VDDMEM11
+signal VDDMEM12
+signal VDDMEM13
+signal VDDMEM14
+signal VDDMEM15
+signal VDDMEM16
+signal VDDMEM17
+signal VDDMEM18
+signal VDDMEM19
+signal VDDMEM20
+signal VDDMEM21
+signal VDDMEM22
+signal VDDMEM23
+signal VDDMEM24
+signal VDDMEM25
+signal VDDMEM26
+signal VDDMEM27
+signal VDDMEM28
+signal VDDMEM29
+signal VDDMEM30
+signal VDDMEM31
+signal VDDMEM32
+signal VDDMEM33
+signal VDDMEM34
+signal VDDMEM35
+signal VDDMEM36
+signal VDDMEM37
+signal VDDMEM38
+signal VDDMEM39
+signal VDDMEM40
+signal VDDMEM41
+signal VDDMEM42
+signal VDDMEM43
+signal VDDMEM44
+signal VDDMEM45
+signal VDDMEM46
+signal VDDMEM47
+signal VDDMEM48
+
+register BSR 1434
+register BR 1
+register DIR 32
+register CTRL 12
+register DATAR 277
+register ADDRR 77
+register SCD 64
+register IMP 32
+
+
+instruction length 6
+
+instruction EXTEST 000000 BSR
+instruction IDCODE 000001 DIR
+instruction SAMPLE/PRELOAD 111101 BSR
+instruction BYPASS 111111 BR
+instruction CONTROLL 001010 CTRL
+instruction DATA 001001 DATAR
+instruction ADDR 001000 ADDRR
+instruction SCANSCD 110110 SCD
+instruction IMPCODE 000011 IMP
+
+bit 1433 O 0 *
+bit 1432 O 0 *
+bit 1431 O 0 *
+bit 1430 O 0 *
+bit 1429 O 0 *
+bit 1428 O 0 *
+bit 1427 O 0 *
+bit 1426 O 0 *
+bit 1425 O 0 *
+bit 1424 O 0 *
+bit 1423 O 0 *
+bit 1422 O 0 *
+bit 1421 O 0 *
+bit 1420 O 0 *
+bit 1419 O 0 *
+bit 1418 O 0 *
+bit 1417 C 0 *
+bit 1416 O 0 *
+bit 1415 O 0 *
+bit 1414 I 1 LDT_RX_CTLP
+bit 1413 I 1 LDT_RX_CTLN
+bit 1412 O 1 LDT_TX_CADP0 1417 0 Z
+bit 1411 O 1 LDT_TX_CADN0 1417 0 Z
+bit 1410 I 1 LDT_RX_CADP7
+bit 1409 I 1 LDT_RX_CADN7
+bit 1408 O 1 LDT_TX_CADP1 1417 0 Z
+bit 1407 O 1 LDT_TX_CADN1 1417 0 Z
+bit 1406 I 1 LDT_RX_CADP6
+bit 1405 I 1 LDT_RX_CADN6
+bit 1404 O 1 LDT_TX_CADP2 1417 0 Z
+bit 1403 O 1 LDT_TX_CADN2 1417 0 Z
+bit 1402 I 1 LDT_RX_CADP5
+bit 1401 I 1 LDT_RX_CADN5
+bit 1400 O 1 LDT_TX_CADP3 1417 0 Z
+bit 1399 O 1 LDT_TX_CADN3 1417 0 Z
+bit 1398 I 1 LDT_RX_CADP4
+bit 1397 I 1 LDT_RX_CADN4
+bit 1396 O 1 LDT_TX_CLKP 1417 0 Z
+bit 1395 O 1 LDT_TX_CLKN 1417 0 Z
+bit 1394 O 1 LDT_TX_CADP4 1417 0 Z
+bit 1393 O 1 LDT_TX_CADN4 1417 0 Z
+bit 1392 I 1 LDT_RX_CADP3
+bit 1391 I 1 LDT_RX_CADN3
+bit 1390 O 1 LDT_TX_CADP5 1417 0 Z
+bit 1389 O 1 LDT_TX_CADN5 1417 0 Z
+bit 1388 I 1 LDT_RX_CADP2
+bit 1387 I 1 LDT_RX_CADN2
+bit 1386 O 1 LDT_TX_CADP6 1417 0 Z
+bit 1385 O 1 LDT_TX_CADN6 1417 0 Z
+bit 1384 I 1 LDT_RX_CADP1
+bit 1383 I 1 LDT_RX_CADN1
+bit 1382 O 1 LDT_TX_CADP7 1417 0 Z
+bit 1381 O 1 LDT_TX_CADN7 1417 0 Z
+bit 1380 I 1 LDT_RX_CADP0
+bit 1379 I 1 LDT_RX_CADN0
+bit 1378 O 1 LDT_TX_CTLP 1417 0 Z
+bit 1377 O 1 LDT_TX_CTLN 1417 0 Z
+bit 1376 O 1 LDT_PWROK 1375 0 Z
+bit 1375 C 0 *
+bit 1374 I 1 LDT_PWROK
+bit 1373 O 1 LDT_RESET_L 1372 0 Z
+bit 1372 C 0 *
+bit 1371 I 1 LDT_RESET_L
+bit 1370 O 1 M1_DQ0 1369 0 Z
+bit 1369 C 0 *
+bit 1368 I 1 M1_DQ0
+bit 1367 O 1 M1_DQ1 1366 0 Z
+bit 1366 C 0 *
+bit 1365 I 1 M1_DQ1
+bit 1364 O 1 M1_DQ2 1363 0 Z
+bit 1363 C 0 *
+bit 1362 I 1 M1_DQ2
+bit 1361 O 1 M1_DQ3 1360 0 Z
+bit 1360 C 0 *
+bit 1359 I 1 M1_DQ3
+bit 1358 O 1 M1_DQS0 1357 0 Z
+bit 1357 C 0 *
+bit 1356 I 1 M1_DQS0
+bit 1355 O 1 M1_DQ4 1354 0 Z
+bit 1354 C 0 *
+bit 1353 I 1 M1_DQ4
+bit 1352 O 1 M1_DQ5 1351 0 Z
+bit 1351 C 0 *
+bit 1350 I 1 M1_DQ5
+bit 1349 O 1 M1_DQ6 1348 0 Z
+bit 1348 C 0 *
+bit 1347 I 1 M1_DQ6
+bit 1346 O 1 M1_DQ7 1345 0 Z
+bit 1345 C 0 *
+bit 1344 I 1 M1_DQ7
+bit 1343 O 1 M1_DQ8 1342 0 Z
+bit 1342 C 0 *
+bit 1341 I 1 M1_DQ8
+bit 1340 O 1 M1_DQ9 1339 0 Z
+bit 1339 C 0 *
+bit 1338 I 1 M1_DQ9
+bit 1337 O 1 M1_DQ10 1336 0 Z
+bit 1336 C 0 *
+bit 1335 I 1 M1_DQ10
+bit 1334 O 1 M1_DQ11 1333 0 Z
+bit 1333 C 0 *
+bit 1332 I 1 M1_DQ11
+bit 1331 O 1 M1_DQS1 1330 0 Z
+bit 1330 C 0 *
+bit 1329 I 1 M1_DQS1
+bit 1328 O 1 M1_DQ12 1327 0 Z
+bit 1327 C 0 *
+bit 1326 I 1 M1_DQ12
+bit 1325 O 1 M1_DQ13 1324 0 Z
+bit 1324 C 0 *
+bit 1323 I 1 M1_DQ13
+bit 1322 O 1 M1_DQ14 1321 0 Z
+bit 1321 C 0 *
+bit 1320 I 1 M1_DQ14
+bit 1319 O 1 M1_DQ15 1318 0 Z
+bit 1318 C 0 *
+bit 1317 I 1 M1_DQ15
+bit 1316 O 1 M1_DQ16 1315 0 Z
+bit 1315 C 0 *
+bit 1314 I 1 M1_DQ16
+bit 1313 O 1 M1_DQ17 1312 0 Z
+bit 1312 C 0 *
+bit 1311 I 1 M1_DQ17
+bit 1310 O 1 M1_DQ18 1309 0 Z
+bit 1309 C 0 *
+bit 1308 I 1 M1_DQ18
+bit 1307 O 1 M1_DQ19 1306 0 Z
+bit 1306 C 0 *
+bit 1305 I 1 M1_DQ19
+bit 1304 O 1 M1_DQS2 1303 0 Z
+bit 1303 C 0 *
+bit 1302 I 1 M1_DQS2
+bit 1301 O 1 M1_DQ20 1300 0 Z
+bit 1300 C 0 *
+bit 1299 I 1 M1_DQ20
+bit 1298 O 1 M1_DQ21 1297 0 Z
+bit 1297 C 0 *
+bit 1296 I 1 M1_DQ21
+bit 1295 O 1 M1_DQ22 1294 0 Z
+bit 1294 C 0 *
+bit 1293 I 1 M1_DQ22
+bit 1292 O 1 M1_DQ23 1291 0 Z
+bit 1291 C 0 *
+bit 1290 I 1 M1_DQ23
+bit 1289 O 1 M1_DQ24 1288 0 Z
+bit 1288 C 0 *
+bit 1287 I 1 M1_DQ24
+bit 1286 O 1 M1_DQ25 1285 0 Z
+bit 1285 C 0 *
+bit 1284 I 1 M1_DQ25
+bit 1283 O 1 M1_DQ26 1282 0 Z
+bit 1282 C 0 *
+bit 1281 I 1 M1_DQ26
+bit 1280 O 1 M1_DQ27 1279 0 Z
+bit 1279 C 0 *
+bit 1278 I 1 M1_DQ27
+bit 1277 O 1 M1_DQS3 1276 0 Z
+bit 1276 C 0 *
+bit 1275 I 1 M1_DQS3
+bit 1274 O 1 M1_DQ28 1273 0 Z
+bit 1273 C 0 *
+bit 1272 I 1 M1_DQ28
+bit 1271 O 1 M1_DQ29 1270 0 Z
+bit 1270 C 0 *
+bit 1269 I 1 M1_DQ29
+bit 1268 O 1 M1_DQ30 1267 0 Z
+bit 1267 C 0 *
+bit 1266 I 1 M1_DQ30
+bit 1265 O 1 M1_DQ31 1264 0 Z
+bit 1264 C 0 *
+bit 1263 I 1 M1_DQ31
+bit 1262 O 1 M1_A12 1261 0 Z
+bit 1261 C 0 *
+bit 1260 O 0 *
+bit 1259 O 1 M1_A8 1258 0 Z
+bit 1258 C 0 *
+bit 1257 O 0 *
+bit 1256 O 1 M1_A11 1255 0 Z
+bit 1255 C 0 *
+bit 1254 O 0 *
+bit 1253 O 1 M1_A5 1252 0 Z
+bit 1252 C 0 *
+bit 1251 O 0 *
+bit 1250 O 1 M1_A9 1249 0 Z
+bit 1249 C 0 *
+bit 1248 O 0 *
+bit 1247 O 1 M1_A6 1246 0 Z
+bit 1246 C 0 *
+bit 1245 O 0 *
+bit 1244 O 1 M1_A7 1243 0 Z
+bit 1243 C 0 *
+bit 1242 O 0 *
+bit 1241 O 1 M1_A2 1240 0 Z
+bit 1240 C 0 *
+bit 1239 O 0 *
+bit 1238 O 1 M1_A4 1237 0 Z
+bit 1237 C 0 *
+bit 1236 O 0 *
+bit 1235 O 1 M1_A1 1234 0 Z
+bit 1234 C 0 *
+bit 1233 O 0 *
+bit 1232 O 1 M1_A3 1231 0 Z
+bit 1231 C 0 *
+bit 1230 O 0 *
+bit 1229 O 1 M1_BA1 1228 0 Z
+bit 1228 C 0 *
+bit 1227 O 0 *
+bit 1226 O 1 M1_A0 1225 0 Z
+bit 1225 C 0 *
+bit 1224 O 0 *
+bit 1223 O 1 M1_WE_L 1222 0 Z
+bit 1222 C 0 *
+bit 1221 O 0 *
+bit 1220 O 1 M1_A10 1219 0 Z
+bit 1219 C 0 *
+bit 1218 O 0 *
+bit 1217 O 1 M1_CAS_L 1216 0 Z
+bit 1216 C 0 *
+bit 1215 O 0 *
+bit 1214 O 1 M1_BA0 1213 0 Z
+bit 1213 C 0 *
+bit 1212 O 0 *
+bit 1211 O 1 M1_CS_L1 1210 0 Z
+bit 1210 C 0 *
+bit 1209 O 0 *
+bit 1208 O 1 M1_CS_L0 1207 0 Z
+bit 1207 C 0 *
+bit 1206 O 0 *
+bit 1205 O 1 M1_CS_L2 1204 0 Z
+bit 1204 C 0 *
+bit 1203 O 0 *
+bit 1202 O 1 M1_RAS_L 1201 0 Z
+bit 1201 C 0 *
+bit 1200 O 0 *
+bit 1199 O 1 M1_CS_L3 1198 0 Z
+bit 1198 C 0 *
+bit 1197 O 0 *
+bit 1196 O 1 M1_CLK 1195 0 Z
+bit 1195 C 0 *
+bit 1194 O 0 *
+bit 1193 O 1 M1_CKE 1192 0 Z
+bit 1192 C 0 *
+bit 1191 O 0 *
+bit 1190 O 1 M1_CLK_L 1189 0 Z
+bit 1189 C 0 *
+bit 1188 O 0 *
+bit 1187 O 1 M1_ECC0 1186 0 Z
+bit 1186 C 0 *
+bit 1185 I 1 M1_ECC0
+bit 1184 O 1 M1_ECC1 1183 0 Z
+bit 1183 C 0 *
+bit 1182 I 1 M1_ECC1
+bit 1181 O 1 M1_ECC2 1180 0 Z
+bit 1180 C 0 *
+bit 1179 I 1 M1_ECC2
+bit 1178 O 1 M1_ECC3 1177 0 Z
+bit 1177 C 0 *
+bit 1176 I 1 M1_ECC3
+bit 1175 O 1 M1_DQS8 1174 0 Z
+bit 1174 C 0 *
+bit 1173 I 1 M1_DQS8
+bit 1172 O 1 M1_ECC4 1171 0 Z
+bit 1171 C 0 *
+bit 1170 I 1 M1_ECC4
+bit 1169 O 1 M1_ECC5 1168 0 Z
+bit 1168 C 0 *
+bit 1167 I 1 M1_ECC5
+bit 1166 O 1 M1_ECC6 1165 0 Z
+bit 1165 C 0 *
+bit 1164 I 1 M1_ECC6
+bit 1163 O 1 M1_ECC7 1162 0 Z
+bit 1162 C 0 *
+bit 1161 I 1 M1_ECC7
+bit 1160 O 1 M1_DQ32 1159 0 Z
+bit 1159 C 0 *
+bit 1158 I 1 M1_DQ32
+bit 1157 O 1 M1_DQ33 1156 0 Z
+bit 1156 C 0 *
+bit 1155 I 1 M1_DQ33
+bit 1154 O 1 M1_DQ34 1153 0 Z
+bit 1153 C 0 *
+bit 1152 I 1 M1_DQ34
+bit 1151 O 1 M1_DQ35 1150 0 Z
+bit 1150 C 0 *
+bit 1149 I 1 M1_DQ35
+bit 1148 O 1 M1_DQS4 1147 0 Z
+bit 1147 C 0 *
+bit 1146 I 1 M1_DQS4
+bit 1145 O 1 M1_DQ36 1144 0 Z
+bit 1144 C 0 *
+bit 1143 I 1 M1_DQ36
+bit 1142 O 1 M1_DQ37 1141 0 Z
+bit 1141 C 0 *
+bit 1140 I 1 M1_DQ37
+bit 1139 O 1 M1_DQ38 1138 0 Z
+bit 1138 C 0 *
+bit 1137 I 1 M1_DQ38
+bit 1136 O 1 M1_DQ39 1135 0 Z
+bit 1135 C 0 *
+bit 1134 I 1 M1_DQ39
+bit 1133 O 1 M1_DQ40 1132 0 Z
+bit 1132 C 0 *
+bit 1131 I 1 M1_DQ40
+bit 1130 O 1 M1_DQ41 1129 0 Z
+bit 1129 C 0 *
+bit 1128 I 1 M1_DQ41
+bit 1127 O 1 M1_DQ42 1126 0 Z
+bit 1126 C 0 *
+bit 1125 I 1 M1_DQ42
+bit 1124 O 1 M1_DQ43 1123 0 Z
+bit 1123 C 0 *
+bit 1122 I 1 M1_DQ43
+bit 1121 O 1 M1_DQS5 1120 0 Z
+bit 1120 C 0 *
+bit 1119 I 1 M1_DQS5
+bit 1118 O 1 M1_DQ44 1117 0 Z
+bit 1117 C 0 *
+bit 1116 I 1 M1_DQ44
+bit 1115 O 1 M1_DQ45 1114 0 Z
+bit 1114 C 0 *
+bit 1113 I 1 M1_DQ45
+bit 1112 O 1 M1_DQ46 1111 0 Z
+bit 1111 C 0 *
+bit 1110 I 1 M1_DQ46
+bit 1109 O 1 M1_DQ47 1108 0 Z
+bit 1108 C 0 *
+bit 1107 I 1 M1_DQ47
+bit 1106 O 1 M1_DQ48 1105 0 Z
+bit 1105 C 0 *
+bit 1104 I 1 M1_DQ48
+bit 1103 O 1 M1_DQ49 1102 0 Z
+bit 1102 C 0 *
+bit 1101 I 1 M1_DQ49
+bit 1100 O 1 M1_DQ50 1099 0 Z
+bit 1099 C 0 *
+bit 1098 I 1 M1_DQ50
+bit 1097 O 1 M1_DQ51 1096 0 Z
+bit 1096 C 0 *
+bit 1095 I 1 M1_DQ51
+bit 1094 O 1 M1_DQS6 1093 0 Z
+bit 1093 C 0 *
+bit 1092 I 1 M1_DQS6
+bit 1091 O 1 M1_DQ52 1090 0 Z
+bit 1090 C 0 *
+bit 1089 I 1 M1_DQ52
+bit 1088 O 1 M1_DQ53 1087 0 Z
+bit 1087 C 0 *
+bit 1086 I 1 M1_DQ53
+bit 1085 O 1 M1_DQ54 1084 0 Z
+bit 1084 C 0 *
+bit 1083 I 1 M1_DQ54
+bit 1082 O 1 M1_DQ55 1081 0 Z
+bit 1081 C 0 *
+bit 1080 I 1 M1_DQ55
+bit 1079 O 1 M1_DQ56 1078 0 Z
+bit 1078 C 0 *
+bit 1077 I 1 M1_DQ56
+bit 1076 O 1 M1_DQ57 1075 0 Z
+bit 1075 C 0 *
+bit 1074 I 1 M1_DQ57
+bit 1073 O 1 M1_DQ58 1072 0 Z
+bit 1072 C 0 *
+bit 1071 I 1 M1_DQ58
+bit 1070 O 1 M1_DQ59 1069 0 Z
+bit 1069 C 0 *
+bit 1068 I 1 M1_DQ59
+bit 1067 O 1 M1_DQS7 1066 0 Z
+bit 1066 C 0 *
+bit 1065 I 1 M1_DQS7
+bit 1064 O 1 M1_DQ60 1063 0 Z
+bit 1063 C 0 *
+bit 1062 I 1 M1_DQ60
+bit 1061 O 1 M1_DQ61 1060 0 Z
+bit 1060 C 0 *
+bit 1059 I 1 M1_DQ61
+bit 1058 O 1 M1_DQ62 1057 0 Z
+bit 1057 C 0 *
+bit 1056 I 1 M1_DQ62
+bit 1055 O 1 M1_DQ63 1054 0 Z
+bit 1054 C 0 *
+bit 1053 I 1 M1_DQ63
+bit 1052 O 1 M0_DQ63 1051 0 Z
+bit 1051 C 0 *
+bit 1050 I 1 M0_DQ63
+bit 1049 O 1 M0_DQ62 1048 0 Z
+bit 1048 C 0 *
+bit 1047 I 1 M0_DQ62
+bit 1046 O 1 M0_DQ61 1045 0 Z
+bit 1045 C 0 *
+bit 1044 I 1 M0_DQ61
+bit 1043 O 1 M0_DQ60 1042 0 Z
+bit 1042 C 0 *
+bit 1041 I 1 M0_DQ60
+bit 1040 O 1 M0_DQS7 1039 0 Z
+bit 1039 C 0 *
+bit 1038 I 1 M0_DQS7
+bit 1037 O 1 M0_DQ59 1036 0 Z
+bit 1036 C 0 *
+bit 1035 I 1 M0_DQ59
+bit 1034 O 1 M0_DQ58 1033 0 Z
+bit 1033 C 0 *
+bit 1032 I 1 M0_DQ58
+bit 1031 O 1 M0_DQ57 1030 0 Z
+bit 1030 C 0 *
+bit 1029 I 1 M0_DQ57
+bit 1028 O 1 M0_DQ56 1027 0 Z
+bit 1027 C 0 *
+bit 1026 I 1 M0_DQ56
+bit 1025 O 1 M0_DQ55 1024 0 Z
+bit 1024 C 0 *
+bit 1023 I 1 M0_DQ55
+bit 1022 O 1 M0_DQ54 1021 0 Z
+bit 1021 C 0 *
+bit 1020 I 1 M0_DQ54
+bit 1019 O 1 M0_DQ53 1018 0 Z
+bit 1018 C 0 *
+bit 1017 I 1 M0_DQ53
+bit 1016 O 1 M0_DQ52 1015 0 Z
+bit 1015 C 0 *
+bit 1014 I 1 M0_DQ52
+bit 1013 O 1 M0_DQS6 1012 0 Z
+bit 1012 C 0 *
+bit 1011 I 1 M0_DQS6
+bit 1010 O 1 M0_DQ51 1009 0 Z
+bit 1009 C 0 *
+bit 1008 I 1 M0_DQ51
+bit 1007 O 1 M0_DQ50 1006 0 Z
+bit 1006 C 0 *
+bit 1005 I 1 M0_DQ50
+bit 1004 O 1 M0_DQ49 1003 0 Z
+bit 1003 C 0 *
+bit 1002 I 1 M0_DQ49
+bit 1001 O 1 M0_DQ48 1000 0 Z
+bit 1000 C 0 *
+bit 999 I 1 M0_DQ48
+bit 998 O 1 M0_DQ47 997 0 Z
+bit 997 C 0 *
+bit 996 I 1 M0_DQ47
+bit 995 O 1 M0_DQ46 994 0 Z
+bit 994 C 0 *
+bit 993 I 1 M0_DQ46
+bit 992 O 1 M0_DQ45 991 0 Z
+bit 991 C 0 *
+bit 990 I 1 M0_DQ45
+bit 989 O 1 M0_DQ44 988 0 Z
+bit 988 C 0 *
+bit 987 I 1 M0_DQ44
+bit 986 O 1 M0_DQS5 985 0 Z
+bit 985 C 0 *
+bit 984 I 1 M0_DQS5
+bit 983 O 1 M0_DQ43 982 0 Z
+bit 982 C 0 *
+bit 981 I 1 M0_DQ43
+bit 980 O 1 M0_DQ42 979 0 Z
+bit 979 C 0 *
+bit 978 I 1 M0_DQ42
+bit 977 O 1 M0_DQ41 976 0 Z
+bit 976 C 0 *
+bit 975 I 1 M0_DQ41
+bit 974 O 1 M0_DQ40 973 0 Z
+bit 973 C 0 *
+bit 972 I 1 M0_DQ40
+bit 971 O 1 M0_DQ39 970 0 Z
+bit 970 C 0 *
+bit 969 I 1 M0_DQ39
+bit 968 O 1 M0_DQ38 967 0 Z
+bit 967 C 0 *
+bit 966 I 1 M0_DQ38
+bit 965 O 1 M0_DQ37 964 0 Z
+bit 964 C 0 *
+bit 963 I 1 M0_DQ37
+bit 962 O 1 M0_DQ36 961 0 Z
+bit 961 C 0 *
+bit 960 I 1 M0_DQ36
+bit 959 O 1 M0_DQS4 958 0 Z
+bit 958 C 0 *
+bit 957 I 1 M0_DQS4
+bit 956 O 1 M0_DQ35 955 0 Z
+bit 955 C 0 *
+bit 954 I 1 M0_DQ35
+bit 953 O 1 M0_DQ34 952 0 Z
+bit 952 C 0 *
+bit 951 I 1 M0_DQ34
+bit 950 O 1 M0_DQ33 949 0 Z
+bit 949 C 0 *
+bit 948 I 1 M0_DQ33
+bit 947 O 1 M0_DQ32 946 0 Z
+bit 946 C 0 *
+bit 945 I 1 M0_DQ32
+bit 944 O 1 M0_ECC7 943 0 Z
+bit 943 C 0 *
+bit 942 I 1 M0_ECC7
+bit 941 O 1 M0_ECC6 940 0 Z
+bit 940 C 0 *
+bit 939 I 1 M0_ECC6
+bit 938 O 1 M0_ECC5 937 0 Z
+bit 937 C 0 *
+bit 936 I 1 M0_ECC5
+bit 935 O 1 M0_ECC4 934 0 Z
+bit 934 C 0 *
+bit 933 I 1 M0_ECC4
+bit 932 O 1 M0_DQS8 931 0 Z
+bit 931 C 0 *
+bit 930 I 1 M0_DQS8
+bit 929 O 1 M0_ECC3 928 0 Z
+bit 928 C 0 *
+bit 927 I 1 M0_ECC3
+bit 926 O 1 M0_ECC2 925 0 Z
+bit 925 C 0 *
+bit 924 I 1 M0_ECC2
+bit 923 O 1 M0_ECC1 922 0 Z
+bit 922 C 0 *
+bit 921 I 1 M0_ECC1
+bit 920 O 1 M0_ECC0 919 0 Z
+bit 919 C 0 *
+bit 918 I 1 M0_ECC0
+bit 917 O 1 M0_CS_L3 916 0 Z
+bit 916 C 0 *
+bit 915 O 0 *
+bit 914 O 1 M0_CLK_L 913 0 Z
+bit 913 C 0 *
+bit 912 O 0 *
+bit 911 O 1 M0_CKE 910 0 Z
+bit 910 C 0 *
+bit 909 O 0 *
+bit 908 O 1 M0_CLK 907 0 Z
+bit 907 C 0 *
+bit 906 O 0 *
+bit 905 O 1 M0_CS_L2 904 0 Z
+bit 904 C 0 *
+bit 903 O 0 *
+bit 902 O 1 M0_RAS_L 901 0 Z
+bit 901 C 0 *
+bit 900 O 0 *
+bit 899 O 1 M0_CS_L1 898 0 Z
+bit 898 C 0 *
+bit 897 O 0 *
+bit 896 O 1 M0_CS_L0 895 0 Z
+bit 895 C 0 *
+bit 894 O 0 *
+bit 893 O 1 M0_CAS_L 892 0 Z
+bit 892 C 0 *
+bit 891 O 0 *
+bit 890 O 1 M0_BA0 889 0 Z
+bit 889 C 0 *
+bit 888 O 0 *
+bit 887 O 1 M0_WE_L 886 0 Z
+bit 886 C 0 *
+bit 885 O 0 *
+bit 884 O 1 M0_A10 883 0 Z
+bit 883 C 0 *
+bit 882 O 0 *
+bit 881 O 1 M0_BA1 880 0 Z
+bit 880 C 0 *
+bit 879 O 0 *
+bit 878 O 1 M0_A2 877 0 Z
+bit 877 C 0 *
+bit 876 O 0 *
+bit 875 O 1 M0_A0 874 0 Z
+bit 874 C 0 *
+bit 873 O 0 *
+bit 872 O 1 M0_A4 871 0 Z
+bit 871 C 0 *
+bit 870 O 0 *
+bit 869 O 1 M0_A1 868 0 Z
+bit 868 C 0 *
+bit 867 O 0 *
+bit 866 O 1 M0_A3 865 0 Z
+bit 865 C 0 *
+bit 864 O 0 *
+bit 863 O 1 M0_A9 862 0 Z
+bit 862 C 0 *
+bit 861 O 0 *
+bit 860 O 1 M0_A6 859 0 Z
+bit 859 C 0 *
+bit 858 O 0 *
+bit 857 O 1 M0_A11 856 0 Z
+bit 856 C 0 *
+bit 855 O 0 *
+bit 854 O 1 M0_A5 853 0 Z
+bit 853 C 0 *
+bit 852 O 0 *
+bit 851 O 1 M0_A7 850 0 Z
+bit 850 C 0 *
+bit 849 O 0 *
+bit 848 O 1 M0_A12 847 0 Z
+bit 847 C 0 *
+bit 846 O 0 *
+bit 845 O 1 M0_A8 844 0 Z
+bit 844 C 0 *
+bit 843 O 0 *
+bit 842 O 1 M0_DQ31 841 0 Z
+bit 841 C 0 *
+bit 840 I 1 M0_DQ31
+bit 839 O 1 M0_DQ30 838 0 Z
+bit 838 C 0 *
+bit 837 I 1 M0_DQ30
+bit 836 O 1 M0_DQ29 835 0 Z
+bit 835 C 0 *
+bit 834 I 1 M0_DQ29
+bit 833 O 1 M0_DQ28 832 0 Z
+bit 832 C 0 *
+bit 831 I 1 M0_DQ28
+bit 830 O 1 M0_DQS3 829 0 Z
+bit 829 C 0 *
+bit 828 I 1 M0_DQS3
+bit 827 O 1 M0_DQ27 826 0 Z
+bit 826 C 0 *
+bit 825 I 1 M0_DQ27
+bit 824 O 1 M0_DQ26 823 0 Z
+bit 823 C 0 *
+bit 822 I 1 M0_DQ26
+bit 821 O 1 M0_DQ25 820 0 Z
+bit 820 C 0 *
+bit 819 I 1 M0_DQ25
+bit 818 O 1 M0_DQ24 817 0 Z
+bit 817 C 0 *
+bit 816 I 1 M0_DQ24
+bit 815 O 1 M0_DQ23 814 0 Z
+bit 814 C 0 *
+bit 813 I 1 M0_DQ23
+bit 812 O 1 M0_DQ22 811 0 Z
+bit 811 C 0 *
+bit 810 I 1 M0_DQ22
+bit 809 O 1 M0_DQ21 808 0 Z
+bit 808 C 0 *
+bit 807 I 1 M0_DQ21
+bit 806 O 1 M0_DQ20 805 0 Z
+bit 805 C 0 *
+bit 804 I 1 M0_DQ20
+bit 803 O 1 M0_DQS2 802 0 Z
+bit 802 C 0 *
+bit 801 I 1 M0_DQS2
+bit 800 O 1 M0_DQ19 799 0 Z
+bit 799 C 0 *
+bit 798 I 1 M0_DQ19
+bit 797 O 1 M0_DQ18 796 0 Z
+bit 796 C 0 *
+bit 795 I 1 M0_DQ18
+bit 794 O 1 M0_DQ17 793 0 Z
+bit 793 C 0 *
+bit 792 I 1 M0_DQ17
+bit 791 O 1 M0_DQ16 790 0 Z
+bit 790 C 0 *
+bit 789 I 1 M0_DQ16
+bit 788 O 1 M0_DQ15 787 0 Z
+bit 787 C 0 *
+bit 786 I 1 M0_DQ15
+bit 785 O 1 M0_DQ14 784 0 Z
+bit 784 C 0 *
+bit 783 I 1 M0_DQ14
+bit 782 O 1 M0_DQ13 781 0 Z
+bit 781 C 0 *
+bit 780 I 1 M0_DQ13
+bit 779 O 1 M0_DQ12 778 0 Z
+bit 778 C 0 *
+bit 777 I 1 M0_DQ12
+bit 776 O 1 M0_DQS1 775 0 Z
+bit 775 C 0 *
+bit 774 I 1 M0_DQS1
+bit 773 O 1 M0_DQ11 772 0 Z
+bit 772 C 0 *
+bit 771 I 1 M0_DQ11
+bit 770 O 1 M0_DQ10 769 0 Z
+bit 769 C 0 *
+bit 768 I 1 M0_DQ10
+bit 767 O 1 M0_DQ9 766 0 Z
+bit 766 C 0 *
+bit 765 I 1 M0_DQ9
+bit 764 O 1 M0_DQ8 763 0 Z
+bit 763 C 0 *
+bit 762 I 1 M0_DQ8
+bit 761 O 1 M0_DQ7 760 0 Z
+bit 760 C 0 *
+bit 759 I 1 M0_DQ7
+bit 758 O 1 M0_DQ6 757 0 Z
+bit 757 C 0 *
+bit 756 I 1 M0_DQ6
+bit 755 O 1 M0_DQ5 754 0 Z
+bit 754 C 0 *
+bit 753 I 1 M0_DQ5
+bit 752 O 1 M0_DQ4 751 0 Z
+bit 751 C 0 *
+bit 750 I 1 M0_DQ4
+bit 749 O 1 M0_DQS0 748 0 Z
+bit 748 C 0 *
+bit 747 I 1 M0_DQS0
+bit 746 O 1 M0_DQ3 745 0 Z
+bit 745 C 0 *
+bit 744 I 1 M0_DQ3
+bit 743 O 1 M0_DQ2 742 0 Z
+bit 742 C 0 *
+bit 741 I 1 M0_DQ2
+bit 740 O 1 M0_DQ1 739 0 Z
+bit 739 C 0 *
+bit 738 I 1 M0_DQ1
+bit 737 O 1 M0_DQ0 736 0 Z
+bit 736 C 0 *
+bit 735 I 1 M0_DQ0
+bit 734 O 0 *
+bit 733 O 0 *
+bit 732 I 1 E0_RXDV
+bit 731 O 1 E0_MDIO 730 0 Z
+bit 730 C 0 *
+bit 729 I 1 E0_MDIO
+bit 728 O 0 *
+bit 727 O 0 *
+bit 726 I 1 E0_RXER
+bit 725 O 1 E0_MDC 724 0 Z
+bit 724 C 0 *
+bit 723 O 0 *
+bit 722 O 0 *
+bit 721 O 0 *
+bit 720 I 1 E0_TCLKI
+bit 719 O 1 E0_TXD0 718 0 Z
+bit 718 C 0 *
+bit 717 O 0 *
+bit 716 O 0 *
+bit 715 O 0 *
+bit 714 I 1 E0_RXD7
+bit 713 O 1 E0_TXD1 712 0 Z
+bit 712 C 0 *
+bit 711 O 0 *
+bit 710 O 0 *
+bit 709 O 0 *
+bit 708 I 1 E0_RXD6
+bit 707 O 1 E0_TXD2 706 0 Z
+bit 706 C 0 *
+bit 705 O 0 *
+bit 704 O 0 *
+bit 703 O 0 *
+bit 702 I 1 E0_RXD5
+bit 701 O 1 E0_TXD3 700 0 Z
+bit 700 C 0 *
+bit 699 O 0 *
+bit 698 O 0 *
+bit 697 O 0 *
+bit 696 I 1 E0_RXD4
+bit 695 O 1 E0_TCLKO 694 0 Z
+bit 694 C 0 *
+bit 693 O 0 *
+bit 692 O 0 *
+bit 691 O 0 *
+bit 690 I 1 E0_RXD3
+bit 689 O 1 E0_TXD4 688 0 Z
+bit 688 C 0 *
+bit 687 O 0 *
+bit 686 O 0 *
+bit 685 O 0 *
+bit 684 I 1 E0_RXD2
+bit 683 O 1 E0_TXD5 682 0 Z
+bit 682 C 0 *
+bit 681 O 0 *
+bit 680 O 0 *
+bit 679 O 0 *
+bit 678 I 1 E0_RXD1
+bit 677 O 1 E0_TXD6 676 0 Z
+bit 676 C 0 *
+bit 675 O 0 *
+bit 674 O 0 *
+bit 673 O 0 *
+bit 672 I 1 E0_RXD0
+bit 671 O 1 E0_TXD7 670 0 Z
+bit 670 C 0 *
+bit 669 O 0 *
+bit 668 O 0 *
+bit 667 O 0 *
+bit 666 I 1 E0_RCLK
+bit 665 O 1 E0_TXER 664 0 Z
+bit 664 C 0 *
+bit 663 O 0 *
+bit 662 O 0 *
+bit 661 O 0 *
+bit 660 I 1 E0_CRS
+bit 659 O 1 E0_GENO 658 0 Z
+bit 658 C 0 *
+bit 657 O 0 *
+bit 656 O 0 *
+bit 655 O 0 *
+bit 654 I 1 E0_COL
+bit 653 O 1 E0_TXEN 652 0 Z
+bit 652 C 0 *
+bit 651 O 0 *
+bit 650 O 0 *
+bit 649 O 0 *
+bit 648 I 1 REFCLK01
+bit 647 O 1 E1_MDC 646 0 Z
+bit 646 C 0 *
+bit 645 O 0 *
+bit 644 O 0 *
+bit 643 O 0 *
+bit 642 I 1 E1_RCLK
+bit 641 O 1 E1_MDIO 640 0 Z
+bit 640 C 0 *
+bit 639 I 1 E1_MDIO
+bit 638 O 0 *
+bit 637 O 0 *
+bit 636 I 1 E1_RXER
+bit 635 O 1 E1_TXD0 634 0 Z
+bit 634 C 0 *
+bit 633 O 0 *
+bit 632 O 0 *
+bit 631 O 0 *
+bit 630 I 1 E1_RXDV
+bit 629 O 1 E1_TXD1 628 0 Z
+bit 628 C 0 *
+bit 627 O 0 *
+bit 626 O 0 *
+bit 625 O 0 *
+bit 624 I 1 E1_RXD7
+bit 623 O 1 E1_TXD2 622 0 Z
+bit 622 C 0 *
+bit 621 O 0 *
+bit 620 O 0 *
+bit 619 O 0 *
+bit 618 I 1 E1_RXD6
+bit 617 O 1 E1_TXD3 616 0 Z
+bit 616 C 0 *
+bit 615 O 0 *
+bit 614 O 0 *
+bit 613 O 0 *
+bit 612 I 1 E1_RXD5
+bit 611 O 1 E1_TCLKO 610 0 Z
+bit 610 C 0 *
+bit 609 O 0 *
+bit 608 O 0 *
+bit 607 O 0 *
+bit 606 I 1 E1_RXD4
+bit 605 O 1 E1_TXD4 604 0 Z
+bit 604 C 0 *
+bit 603 O 0 *
+bit 602 O 0 *
+bit 601 O 0 *
+bit 600 I 1 E1_RXD3
+bit 599 O 1 E1_TXD5 598 0 Z
+bit 598 C 0 *
+bit 597 O 0 *
+bit 596 O 0 *
+bit 595 O 0 *
+bit 594 I 1 E1_RXD2
+bit 593 O 1 E1_TXD6 592 0 Z
+bit 592 C 0 *
+bit 591 O 0 *
+bit 590 O 0 *
+bit 589 O 0 *
+bit 588 I 1 E1_RXD1
+bit 587 O 1 E1_TXD7 586 0 Z
+bit 586 C 0 *
+bit 585 O 0 *
+bit 584 O 0 *
+bit 583 O 0 *
+bit 582 I 1 E1_RXD0
+bit 581 O 1 E1_TXEN 580 0 Z
+bit 580 C 0 *
+bit 579 O 0 *
+bit 578 O 0 *
+bit 577 O 0 *
+bit 576 I 1 E1_TCLKI
+bit 575 O 1 E1_TXER 574 0 Z
+bit 574 C 0 *
+bit 573 O 0 *
+bit 572 O 0 *
+bit 571 O 0 *
+bit 570 I 1 E1_CRS
+bit 569 O 1 E1_GENO 568 0 Z
+bit 568 C 0 *
+bit 567 O 0 *
+bit 566 O 0 *
+bit 565 O 0 *
+bit 564 I 1 E1_COL
+bit 563 O 1 E2_MDC 562 0 Z
+bit 562 C 0 *
+bit 561 O 0 *
+bit 560 O 0 *
+bit 559 O 0 *
+bit 558 I 1 E2_RCLK
+bit 557 O 1 E2_MDIO 556 0 Z
+bit 556 C 0 *
+bit 555 I 1 E2_MDIO
+bit 554 O 0 *
+bit 553 O 0 *
+bit 552 I 1 REFCLK2
+bit 551 O 1 E2_TXD0 550 0 Z
+bit 550 C 0 *
+bit 549 O 0 *
+bit 548 O 0 *
+bit 547 O 0 *
+bit 546 I 1 E2_RXDV
+bit 545 O 1 E2_TXD1 544 0 Z
+bit 544 C 0 *
+bit 543 O 0 *
+bit 542 O 0 *
+bit 541 O 0 *
+bit 540 I 1 E2_RXER
+bit 539 O 1 E2_TXD2 538 0 Z
+bit 538 C 0 *
+bit 537 O 0 *
+bit 536 O 0 *
+bit 535 O 0 *
+bit 534 I 1 E2_RXD7
+bit 533 O 1 E2_TXD3 532 0 Z
+bit 532 C 0 *
+bit 531 O 0 *
+bit 530 O 0 *
+bit 529 O 0 *
+bit 528 I 1 E2_RXD6
+bit 527 O 1 E2_TCLKO 526 0 Z
+bit 526 C 0 *
+bit 525 O 0 *
+bit 524 O 0 *
+bit 523 O 0 *
+bit 522 I 1 E2_RXD5
+bit 521 O 1 E2_TXD4 520 0 Z
+bit 520 C 0 *
+bit 519 O 0 *
+bit 518 O 0 *
+bit 517 O 0 *
+bit 516 I 1 E2_RXD4
+bit 515 O 1 E2_TXD5 514 0 Z
+bit 514 C 0 *
+bit 513 O 0 *
+bit 512 O 0 *
+bit 511 O 0 *
+bit 510 I 1 E2_RXD3
+bit 509 O 1 E2_TXD6 508 0 Z
+bit 508 C 0 *
+bit 507 O 0 *
+bit 506 O 0 *
+bit 505 O 0 *
+bit 504 I 1 E2_RXD2
+bit 503 O 1 E2_TXD7 502 0 Z
+bit 502 C 0 *
+bit 501 O 0 *
+bit 500 O 0 *
+bit 499 O 0 *
+bit 498 I 1 E2_RXD1
+bit 497 O 1 E2_TXER 496 0 Z
+bit 496 C 0 *
+bit 495 O 0 *
+bit 494 O 0 *
+bit 493 O 0 *
+bit 492 I 1 E2_RXD0
+bit 491 O 1 E2_TXEN 490 0 Z
+bit 490 C 0 *
+bit 489 O 0 *
+bit 488 O 0 *
+bit 487 O 0 *
+bit 486 I 1 E2_TCLKI
+bit 485 O 1 E2_GENO 484 0 Z
+bit 484 C 0 *
+bit 483 O 0 *
+bit 482 O 0 *
+bit 481 O 0 *
+bit 480 I 1 E2_CRS
+bit 479 O 0 *
+bit 478 O 0 *
+bit 477 I 1 E2_COL
+bit 476 O 1 IO_RW 475 0 Z
+bit 475 C 0 *
+bit 474 O 0 *
+bit 473 O 0 *
+bit 472 O 0 *
+bit 471 I 1 SPARE2
+bit 470 O 0 *
+bit 469 O 0 *
+bit 468 I 1 SPARE4
+bit 467 O 0 *
+bit 466 O 0 *
+bit 465 I 1 SPARE3
+bit 464 O 1 S1_COUT 463 0 Z
+bit 463 C 0 *
+bit 462 O 0 *
+bit 461 O 0 *
+bit 460 O 0 *
+bit 459 I 1 S1_DIN
+bit 458 O 0 *
+bit 457 O 0 *
+bit 456 I 1 S1_RIN
+bit 455 O 0 *
+bit 454 O 0 *
+bit 453 I 1 S1_CIN_RCLKIN
+bit 452 O 1 S1_RTS_TSTROBE 451 0 Z
+bit 451 C 0 *
+bit 450 O 0 *
+bit 449 O 0 *
+bit 448 O 0 *
+bit 447 I 1 S1_TIN
+bit 446 O 0 *
+bit 445 O 0 *
+bit 444 I 1 S1_CTS_TCLKIN
+bit 443 O 1 GPIO1 442 0 Z
+bit 442 C 0 *
+bit 441 I 1 GPIO1
+bit 440 O 1 S1_DOUT 439 0 Z
+bit 439 C 0 *
+bit 438 O 0 *
+bit 437 O 0 *
+bit 436 O 0 *
+bit 435 I 1 S0_DIN
+bit 434 O 1 S0_RTS_TSTROBE 433 0 Z
+bit 433 C 0 *
+bit 432 O 0 *
+bit 431 O 0 *
+bit 430 O 0 *
+bit 429 I 1 S0_RIN
+bit 428 O 1 S0_COUT 427 0 Z
+bit 427 C 0 *
+bit 426 O 0 *
+bit 425 O 0 *
+bit 424 O 0 *
+bit 423 I 1 S0_CIN_RCLKIN
+bit 422 O 0 *
+bit 421 O 0 *
+bit 420 I 1 S0_CTS_TCLKIN
+bit 419 O 0 *
+bit 418 O 0 *
+bit 417 I 1 S0_TIN
+bit 416 O 1 S0_DOUT 415 0 Z
+bit 415 C 0 *
+bit 414 O 0 *
+bit 413 O 1 GPIO5 412 0 Z
+bit 412 C 0 *
+bit 411 I 1 GPIO5
+bit 410 O 1 GPIO0 409 0 Z
+bit 409 C 0 *
+bit 408 I 1 GPIO0
+bit 407 O 1 GPIO4 406 0 Z
+bit 406 C 0 *
+bit 405 I 1 GPIO4
+bit 404 O 1 GPIO3 403 0 Z
+bit 403 C 0 *
+bit 402 I 1 GPIO3
+bit 401 O 1 GPIO2 400 0 Z
+bit 400 C 0 *
+bit 399 I 1 GPIO2
+bit 398 O 0 *
+bit 397 O 0 *
+bit 396 I 1 IO_RDY
+bit 395 O 1 IO_OE_L 394 0 Z
+bit 394 C 0 *
+bit 393 O 0 *
+bit 392 O 1 IO_WR_L 391 0 Z
+bit 391 C 0 *
+bit 390 O 0 *
+bit 389 O 1 IO_ALE 388 0 Z
+bit 388 C 0 *
+bit 387 O 0 *
+bit 386 O 1 IO_CS_L7 385 0 Z
+bit 385 C 0 *
+bit 384 O 0 *
+bit 383 O 1 IO_CS_L6 382 0 Z
+bit 382 C 0 *
+bit 381 O 0 *
+bit 380 O 1 IO_CS_L5 379 0 Z
+bit 379 C 0 *
+bit 378 O 0 *
+bit 377 O 1 IO_CS_L4 376 0 Z
+bit 376 C 0 *
+bit 375 O 0 *
+bit 374 O 1 IO_CS_L3 373 0 Z
+bit 373 C 0 *
+bit 372 O 0 *
+bit 371 O 1 IO_CS_L2 370 0 Z
+bit 370 C 0 *
+bit 369 O 0 *
+bit 368 O 1 IO_CS_L1 367 0 Z
+bit 367 C 0 *
+bit 366 O 0 *
+bit 365 O 1 IO_CS_L0 364 0 Z
+bit 364 C 0 *
+bit 363 O 0 *
+bit 362 O 1 IO_AD31 361 0 Z
+bit 361 C 0 *
+bit 360 I 1 IO_AD31
+bit 359 O 1 IO_AD30 358 0 Z
+bit 358 C 0 *
+bit 357 I 1 IO_AD30
+bit 356 O 1 IO_AD28 355 0 Z
+bit 355 C 0 *
+bit 354 I 1 IO_AD28
+bit 353 O 1 IO_AD29 352 0 Z
+bit 352 C 0 *
+bit 351 I 1 IO_AD29
+bit 350 O 1 IO_AD27 349 0 Z
+bit 349 C 0 *
+bit 348 I 1 IO_AD27
+bit 347 O 1 IO_AD26 346 0 Z
+bit 346 C 0 *
+bit 345 I 1 IO_AD26
+bit 344 O 1 IO_AD25 343 0 Z
+bit 343 C 0 *
+bit 342 I 1 IO_AD25
+bit 341 O 1 IO_AD24 340 0 Z
+bit 340 C 0 *
+bit 339 I 1 IO_AD24
+bit 338 O 1 IO_AD23 337 0 Z
+bit 337 C 0 *
+bit 336 I 1 IO_AD23
+bit 335 O 1 IO_AD22 334 0 Z
+bit 334 C 0 *
+bit 333 I 1 IO_AD22
+bit 332 O 1 IO_AD21 331 0 Z
+bit 331 C 0 *
+bit 330 I 1 IO_AD21
+bit 329 O 1 IO_AD20 328 0 Z
+bit 328 C 0 *
+bit 327 I 1 IO_AD20
+bit 326 O 1 IO_AD19 325 0 Z
+bit 325 C 0 *
+bit 324 I 1 IO_AD19
+bit 323 O 1 IO_AD18 322 0 Z
+bit 322 C 0 *
+bit 321 I 1 IO_AD18
+bit 320 O 1 IO_AD17 319 0 Z
+bit 319 C 0 *
+bit 318 I 1 IO_AD17
+bit 317 O 1 IO_AD15 316 0 Z
+bit 316 C 0 *
+bit 315 I 1 IO_AD15
+bit 314 O 1 IO_AD16 313 0 Z
+bit 313 C 0 *
+bit 312 I 1 IO_AD16
+bit 311 O 1 IO_AD11 310 0 Z
+bit 310 C 0 *
+bit 309 I 1 IO_AD11
+bit 308 O 1 IO_AD14 307 0 Z
+bit 307 C 0 *
+bit 306 I 1 IO_AD14
+bit 305 O 1 IO_AD12 304 0 Z
+bit 304 C 0 *
+bit 303 I 1 IO_AD12
+bit 302 O 1 IO_AD13 301 0 Z
+bit 301 C 0 *
+bit 300 I 1 IO_AD13
+bit 299 O 1 IO_AD10 298 0 Z
+bit 298 C 0 *
+bit 297 I 1 IO_AD10
+bit 296 O 1 IO_AD9 295 0 Z
+bit 295 C 0 *
+bit 294 I 1 IO_AD9
+bit 293 O 0 *
+bit 292 O 0 *
+bit 291 I 1 SPARE5
+bit 290 O 0 *
+bit 289 O 0 *
+bit 288 O 0 *
+bit 287 O 0 *
+bit 286 O 0 *
+bit 285 I 1 CLK100N
+bit 284 O 0 *
+bit 283 O 0 *
+bit 282 I 1 PLLBYP
+bit 281 O 0 *
+bit 280 O 0 *
+bit 279 I 1 CLK100P
+bit 278 O 0 *
+bit 277 O 0 *
+bit 276 O 0 *
+bit 275 O 1 RESETOUT_L 274 0 Z
+bit 274 C 0 *
+bit 273 O 0 *
+bit 272 O 1 IO_AD8 271 0 Z
+bit 271 C 0 *
+bit 270 I 1 IO_AD8
+bit 269 O 1 IO_AD7 268 0 Z
+bit 268 C 0 *
+bit 267 I 1 IO_AD7
+bit 266 O 1 DEBUG_L 265 0 Z
+bit 265 C 0 *
+bit 264 I 1 DEBUG_L
+bit 263 O 1 IO_AD6 262 0 Z
+bit 262 C 0 *
+bit 261 I 1 IO_AD6
+bit 260 O 1 IO_AD5 259 0 Z
+bit 259 C 0 *
+bit 258 I 1 IO_AD5
+bit 257 O 1 IO_AD3 256 0 Z
+bit 256 C 0 *
+bit 255 I 1 IO_AD3
+bit 254 O 1 IO_AD4 253 0 Z
+bit 253 C 0 *
+bit 252 I 1 IO_AD4
+bit 251 O 1 IO_AD2 250 0 Z
+bit 250 C 0 *
+bit 249 I 1 IO_AD2
+bit 248 O 1 IO_AD1 247 0 Z
+bit 247 C 0 *
+bit 246 I 1 IO_AD1
+bit 245 O 1 IO_AD0 244 0 Z
+bit 244 C 0 *
+bit 243 I 1 IO_AD0
+bit 242 O 1 GPIO6 241 0 Z
+bit 241 C 0 *
+bit 240 I 1 GPIO6
+bit 239 O 1 GPIO7 238 0 Z
+bit 238 C 0 *
+bit 237 I 1 GPIO7
+bit 236 O 1 GPIO8 235 0 Z
+bit 235 C 0 *
+bit 234 I 1 GPIO8
+bit 233 O 1 GPIO9 232 0 Z
+bit 232 C 0 *
+bit 231 I 1 GPIO9
+bit 230 O 1 GPIO10 229 0 Z
+bit 229 C 0 *
+bit 228 I 1 GPIO10
+bit 227 O 1 IO_CLK100 226 0 Z
+bit 226 C 0 *
+bit 225 O 0 *
+bit 224 O 1 GPIO11 223 0 Z
+bit 223 C 0 *
+bit 222 I 1 GPIO11
+bit 221 O 1 GPIO12 220 0 Z
+bit 220 C 0 *
+bit 219 I 1 GPIO12
+bit 218 O 1 GPIO13 217 0 Z
+bit 217 C 0 *
+bit 216 I 1 GPIO13
+bit 215 O 1 PC_ENVPP 214 0 Z
+bit 214 C 0 *
+bit 213 O 0 *
+bit 212 O 1 GPIO14 211 0 Z
+bit 211 C 0 *
+bit 210 I 1 GPIO14
+bit 209 O 1 PC_ENV5V 208 0 Z
+bit 208 C 0 *
+bit 207 O 0 *
+bit 206 O 1 GPIO15 205 0 Z
+bit 205 C 0 *
+bit 204 I 1 GPIO15
+bit 203 O 1 SCL1 202 0 Z
+bit 202 C 0 *
+bit 201 I 1 SCL1
+bit 200 O 1 PC_ENV3V 199 0 Z
+bit 199 C 0 *
+bit 198 O 0 *
+bit 197 O 1 P_GNT_L3 196 0 Z
+bit 196 C 0 *
+bit 195 O 0 *
+bit 194 O 1 SDA1 193 0 Z
+bit 193 C 0 *
+bit 192 I 1 SDA1
+bit 191 O 1 SCL0 190 0 Z
+bit 190 C 0 *
+bit 189 I 1 SCL0
+bit 188 O 1 SDA0 187 0 Z
+bit 187 C 0 *
+bit 186 I 1 SDA0
+bit 185 O 1 P_GNT_L2 184 0 Z
+bit 184 C 0 *
+bit 183 O 0 *
+bit 182 O 0 *
+bit 181 O 0 *
+bit 180 I 1 P_CLK
+bit 179 O 1 P_REQ_l0 178 0 Z
+bit 178 C 0 *
+bit 177 I 1 P_REQ_l0
+bit 176 O 0 *
+bit 175 O 0 *
+bit 174 I 1 P_REQ_L3
+bit 173 O 1 P_GNT_L1 172 0 Z
+bit 172 C 0 *
+bit 171 O 0 *
+bit 170 O 0 *
+bit 169 O 0 *
+bit 168 I 1 P_REQ_L1
+bit 167 O 1 P_GNT_l0 166 0 Z
+bit 166 C 0 *
+bit 165 I 1 P_GNT_l0
+bit 164 O 0 *
+bit 163 O 0 *
+bit 162 I 1 P_REQ_L2
+bit 161 O 1 P_IRDY_L 160 0 Z
+bit 160 C 0 *
+bit 159 I 1 P_IRDY_L
+bit 158 O 1 P_FRAME_L 157 0 Z
+bit 157 C 0 *
+bit 156 I 1 P_FRAME_L
+bit 155 O 1 P_TRDY_L 154 0 Z
+bit 154 C 0 *
+bit 153 I 1 P_TRDY_L
+bit 152 O 1 P_DEVSEL_L 151 0 Z
+bit 151 C 0 *
+bit 150 I 1 P_DEVSEL_L
+bit 149 O 1 P_PERR_L 148 0 Z
+bit 148 C 0 *
+bit 147 I 1 P_PERR_L
+bit 146 O 1 P_STOP_L 145 0 Z
+bit 145 C 0 *
+bit 144 I 1 P_STOP_L
+bit 143 O 1 P_PAR 142 0 Z
+bit 142 C 0 *
+bit 141 I 1 P_PAR
+bit 140 O 1 P_SERR_L 139 0 Z
+bit 139 C 0 *
+bit 138 I 1 P_SERR_L
+bit 137 O 1 P_INTA_L 136 0 Z
+bit 136 C 0 *
+bit 135 I 1 P_INTA_L
+bit 134 O 1 P_CBE_L3 133 0 Z
+bit 133 C 0 *
+bit 132 I 1 P_CBE_L3
+bit 131 O 0 *
+bit 130 O 0 *
+bit 129 I 1 P_INTB_L
+bit 128 O 1 P_CBE_L2 127 0 Z
+bit 127 C 0 *
+bit 126 I 1 P_CBE_L2
+bit 125 O 0 *
+bit 124 O 0 *
+bit 123 I 1 P_INTC_L
+bit 122 O 1 P_CBE_L1 121 0 Z
+bit 121 C 0 *
+bit 120 I 1 P_CBE_L1
+bit 119 O 0 *
+bit 118 O 0 *
+bit 117 I 1 P_INTD_L
+bit 116 O 1 P_CBE_L0 115 0 Z
+bit 115 C 0 *
+bit 114 I 1 P_CBE_L0
+bit 113 O 1 P_RST_L 112 0 Z
+bit 112 C 0 *
+bit 111 O 0 *
+bit 110 O 0 *
+bit 109 O 0 *
+bit 108 O 0 *
+bit 107 O 0 *
+bit 106 O 0 *
+bit 105 O 0 *
+bit 104 O 0 *
+bit 103 O 0 *
+bit 102 O 0 *
+bit 101 O 0 *
+bit 100 O 0 *
+bit 99 O 0 *
+bit 98 O 1 P_AD0 97 0 Z
+bit 97 C 0 *
+bit 96 I 1 P_AD0
+bit 95 O 0 *
+bit 94 O 0 *
+bit 93 O 0 *
+bit 92 O 1 P_AD1 91 0 Z
+bit 91 C 0 *
+bit 90 I 1 P_AD1
+bit 89 O 1 P_AD2 88 0 Z
+bit 88 C 0 *
+bit 87 I 1 P_AD2
+bit 86 O 1 P_AD7 85 0 Z
+bit 85 C 0 *
+bit 84 I 1 P_AD7
+bit 83 O 1 P_AD3 82 0 Z
+bit 82 C 0 *
+bit 81 I 1 P_AD3
+bit 80 O 1 P_AD8 79 0 Z
+bit 79 C 0 *
+bit 78 I 1 P_AD8
+bit 77 O 1 P_AD4 76 0 Z
+bit 76 C 0 *
+bit 75 I 1 P_AD4
+bit 74 O 1 P_AD9 73 0 Z
+bit 73 C 0 *
+bit 72 I 1 P_AD9
+bit 71 O 1 P_AD5 70 0 Z
+bit 70 C 0 *
+bit 69 I 1 P_AD5
+bit 68 O 1 P_AD10 67 0 Z
+bit 67 C 0 *
+bit 66 I 1 P_AD10
+bit 65 O 1 P_AD6 64 0 Z
+bit 64 C 0 *
+bit 63 I 1 P_AD6
+bit 62 O 1 P_AD13 61 0 Z
+bit 61 C 0 *
+bit 60 I 1 P_AD13
+bit 59 O 1 P_AD11 58 0 Z
+bit 58 C 0 *
+bit 57 I 1 P_AD11
+bit 56 O 1 P_AD16 55 0 Z
+bit 55 C 0 *
+bit 54 I 1 P_AD16
+bit 53 O 1 P_AD12 52 0 Z
+bit 52 C 0 *
+bit 51 I 1 P_AD12
+bit 50 O 1 P_AD17 49 0 Z
+bit 49 C 0 *
+bit 48 I 1 P_AD17
+bit 47 O 1 P_AD15 46 0 Z
+bit 46 C 0 *
+bit 45 I 1 P_AD15
+bit 44 O 1 P_AD18 43 0 Z
+bit 43 C 0 *
+bit 42 I 1 P_AD18
+bit 41 O 1 P_AD14 40 0 Z
+bit 40 C 0 *
+bit 39 I 1 P_AD14
+bit 38 O 1 P_AD21 37 0 Z
+bit 37 C 0 *
+bit 36 I 1 P_AD21
+bit 35 O 1 P_AD19 34 0 Z
+bit 34 C 0 *
+bit 33 I 1 P_AD19
+bit 32 O 1 P_AD24 31 0 Z
+bit 31 C 0 *
+bit 30 I 1 P_AD24
+bit 29 O 1 P_AD22 28 0 Z
+bit 28 C 0 *
+bit 27 I 1 P_AD22
+bit 26 O 1 P_AD25 25 0 Z
+bit 25 C 0 *
+bit 24 I 1 P_AD25
+bit 23 O 1 P_AD23 22 0 Z
+bit 22 C 0 *
+bit 21 I 1 P_AD23
+bit 20 O 1 P_AD28 19 0 Z
+bit 19 C 0 *
+bit 18 I 1 P_AD28
+bit 17 O 1 P_AD20 16 0 Z
+bit 16 C 0 *
+bit 15 I 1 P_AD20
+bit 14 O 1 P_AD27 13 0 Z
+bit 13 C 0 *
+bit 12 I 1 P_AD27
+bit 11 O 1 P_AD26 10 0 Z
+bit 10 C 0 *
+bit 9 I 1 P_AD26
+bit 8 O 1 P_AD30 7 0 Z
+bit 7 C 0 *
+bit 6 I 1 P_AD30
+bit 5 O 1 P_AD29 4 0 Z
+bit 4 C 0 *
+bit 3 I 1 P_AD29
+bit 2 O 1 P_AD31 1 0 Z
+bit 1 C 0 *
+bit 0 I 1 P_AD31
+
+initbus bcm1250
--- /dev/null
+#
+# $Id$
+#
+# Copyright (C) 2003 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Marcel Telka <marcel@telka.sk>, 2003.
+#
+
+# bits 31-28 of the Device Identification Register
+0000 bcm3310 0
--- /dev/null
+#
+# $Id$
+#
+# JTAG declarations for Broadcom BCM3310
+# Copyright (C) 2003 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Marcel Telka <marcel@telka.sk>, 2003.
+#
+
+# mandatory data registers
+register BSR 397
+register BR 1
+# optional data registers
+register DIR 32
+
+instruction length 5
+# mandatory instructions
+instruction EXTEST 00000 BSR # TODO: EXTEST instruction value not verified
+instruction SAMPLE/PRELOAD 00010 BSR # TODO: SAMPLE/PRELOAD instruction value not verified
+instruction BYPASS 11111 BR
+# optional instructions
+instruction IDCODE 00001 DIR # TODO: IDCODE instruction value not verified
--- /dev/null
+#
+# $Id$
+#
+# Copyright (C) 2004 Alan Wallace <aww@adelphia.net>
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Alan Wallace <aww@adelphia.net>, 2004.
+#
+
+# bits 31-28 of the Device Identification Register
+0001 bcm4712 Ver 1
--- /dev/null
+#
+# $Id$
+#
+# JTAG declarations for Broadcom BCM4712
+# Copyright (C) 2004 Alan Wallace <aww@adelphia.net>
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Alan Wallace <aww@adelphia.net>, 2004.
+#
+
+# mandatory data registers
+register BSR 594
+register BR 1
+
+# optional data registers
+register DIR 32
+
+instruction length 8
+# mandatory instructions
+instruction EXTEST 00000000 BSR
+instruction SAMPLE/PRELOAD 00000010 BSR
+instruction BYPASS 11111111 BR
+
+# optional instructions
+instruction IDCODE 00000001 DIR
--- /dev/null
+#
+# $Id$
+#
+# Copyright (C) 2003 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Matan Ziv-Av <matan@svgalib.org>, 2003.
+#
+
+0001 bcm5421s V1
--- /dev/null
+#
+# $Id$
+#
+# JTAG declarations for BCM5421S
+# Copyright (C) 2003 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Matan Ziv-Av <matan@svgalib.org>, 2003.
+#
+
+signal PAD_gtx_clk
+signal PAD_txd10
+signal PAD_txd11
+signal PAD_txd12
+signal PAD_txd13
+signal PAD_txd14
+signal PAD_txd15
+signal PAD_txd16
+signal PAD_txd17
+signal PAD_tx_en
+signal PAD_tx_er
+signal PAD_clk125
+signal PAD_col
+signal PAD_crs
+signal PAD_rbc0
+signal PAD_rbc1
+signal PAD_rxc
+signal PAD_rxd10
+signal PAD_rxd11
+signal PAD_rxd12
+signal PAD_rxd13
+signal PAD_rxd14
+signal PAD_rxd15
+signal PAD_rxd16
+signal PAD_rxd17
+signal PAD_rx_dv
+signal PAD_rx_er
+signal PAD_txc
+signal PAD_bcm5421s_en
+signal PAD_edgerate
+signal PAD_mdc
+signal PAD_ovdd_2_5v_enPAD_reset_n
+signal PAD_reset_n
+signal PAD_tck
+signal PAD_tdi
+signal PAD_test0
+signal PAD_test1
+signal PAD_tms
+signal PAD_tpin0
+signal PAD_tpin1
+signal PAD_tpin2
+signal PAD_tpin3
+signal PAD_tpin4
+signal PAD_tpin5
+signal PAD_tpin6
+signal PAD_tpin7
+signal PAD_tpin8
+signal PAD_trstb
+signal PAD_en10b
+signal PAD_f1000
+signal PAD_fdxled_n
+signal PAD_intr_n
+signal PAD_link_n1
+signal PAD_link_n2
+signal PAD_mdio
+signal PAD_phya0
+signal PAD_phya1
+signal PAD_phya2
+signal PAD_phya3
+signal PAD_phya4
+signal PAD_rcvled_n
+signal PAD_slave_n
+signal PAD_spd0
+signal PAD_xmtled_n
+signal PAD_tdo
+signal PAD_srxdn
+signal PAD_srxdp
+signal PAD_stxdn
+signal PAD_stxdp
+signal PAD_stxcn
+signal PAD_stxcp
+signal PAD_sergnd
+signal PAD_serpllavdd
+signal PAD_serpllavss
+signal PAD_serplldvdd
+signal PAD_serplldvss
+signal PAD_servdd11
+signal PAD_servdd25
+signal PAD_reg_cntl0
+signal PAD_reg_cntl1
+signal PAD_reg_sense1
+signal PAD_reg_sense2
+signal PAD_reg_supply1
+signal PAD_reg_supply2
+signal PAD_trimdac10
+signal PAD_trimdac11
+signal PAD_trimdac12
+signal PAD_trimdac13
+signal PAD_trimhyb10
+signal PAD_trimhyb11
+signal PAD_trimhyb12
+signal PAD_trimhyb13
+signal PAD_trimhpf10
+signal PAD_trimhpf11
+signal PAD_xtali
+signal PAD_xtali2
+signal PAD_xtalo
+signal PAD_xtalo2
+signal PAD_xtalgnd1
+signal PAD_xtalgnd2
+signal PAD_xtalvdd1
+signal PAD_xtalvdd2
+signal PAD_xtalvdd3
+signal PAD_xtalvdd2
+signal PAD_plldgnd
+signal PAD_plldvdd
+signal PAD_pllgnd
+signal PAD_pllvdd
+signal PAD_tvcoi
+signal CORE_VDD
+signal CORE_VSS
+signal OVDD
+signal OGND
+signal PVDD
+signal PAD_rdac1
+signal PAD_extvref1
+signal PAD_bagnd_0
+signal PAD_bavdd_0
+signal PAD_bavdd_1
+signal PAD_rxavdd0_0
+signal PAD_rxavdd1_0
+signal PAD_rxavdd2_0
+signal PAD_rxavdd3_0
+signal PAD_txavdd0_0
+signal PAD_txavdd1_0
+signal PAD_txavdd2_0
+signal PAD_txavdd3_0
+signal PAD_rxagnd0_0
+signal PAD_rxagnd1_0
+signal PAD_rxagnd2_0
+signal PAD_rxagnd3_0
+signal PAD_txagnd0_0
+signal PAD_txagnd1_0
+signal PAD_txagnd2_0
+signal PAD_txagnd3_0
+signal PAD_tdp1_0
+signal PAD_tdn1_0
+signal PAD_tdn1_1
+signal PAD_tdp1_1
+signal PAD_tdp1_2
+signal PAD_tdn1_2
+signal PAD_tdn1_3
+
+register BSR 150
+register BR 1
+register DIR 32
+
+instruction length 3
+
+instruction BYPASS 111 BR
+instruction EXTEST 000 BSR
+instruction SAMPLE/PRELOAD 010 BSR
+instruction IDCODE 101 DIR
+
+bit 149 I 1 PAD_rxd13
+bit 148 O 1 PAD_rxd13 147 1 Z
+bit 147 C 1 *
+bit 146 I 1 PAD_rxd12
+bit 145 O 1 PAD_rxd12 144 1 Z
+bit 144 C 1 *
+bit 143 I 1 PAD_rxd11
+bit 142 O 1 PAD_rxd11 141 1 Z
+bit 141 C 1 *
+bit 140 I 1 PAD_rxd10
+bit 139 O 1 PAD_rxd10 138 1 Z
+bit 138 C 1 *
+bit 137 I 1 PAD_col
+bit 136 O 1 PAD_col 135 1 Z
+bit 135 C 1 *
+bit 134 I 1 PAD_crs
+bit 133 O 1 PAD_crs 132 1 Z
+bit 132 C 1 *
+bit 131 I 1 PAD_clk125
+bit 130 O 1 PAD_clk125 129 1 Z
+bit 129 C 1 *
+bit 128 I 1 PAD_reset_n
+bit 127 I 1 PAD_mdc
+bit 126 I 1 PAD_mdio
+bit 125 O 1 PAD_mdio 124 1 Z
+bit 124 C 1 *
+bit 123 I 1 PAD_tpin8
+bit 122 I 1 PAD_en10b
+bit 121 O 1 PAD_en10b 120 1 Z
+bit 120 C 1 *
+bit 119 I 1 PAD_f1000
+bit 118 O 1 PAD_f1000 117 1 Z
+bit 117 C 1 *
+bit 116 I 1 PAD_spd0
+bit 115 O 1 PAD_spd0 114 1 Z
+bit 114 C 1 *
+bit 113 O 1 *
+bit 112 O 1 *
+bit 111 I 1 PAD_phya4
+bit 110 O 1 PAD_phya4 109 1 Z
+bit 109 C 1 *
+bit 108 I 1 PAD_phya3
+bit 107 O 1 PAD_phya3 106 1 Z
+bit 106 C 1 *
+bit 105 I 1 PAD_phya2
+bit 104 O 1 PAD_phya2 103 1 Z
+bit 103 C 1 *
+bit 102 I 1 PAD_phya1
+bit 101 O 1 PAD_phya1 100 1 Z
+bit 100 C 1 *
+bit 99 I 1 PAD_phya0
+bit 98 O 1 PAD_phya0 97 1 Z
+bit 97 C 1 *
+bit 96 I 1 PAD_test1
+bit 95 I 1 PAD_test0
+bit 94 I 1 PAD_xmtled_n
+bit 93 O 1 PAD_xmtled_n 92 1 Z
+bit 92 C 1 *
+bit 91 I 1 PAD_rcvled_n
+bit 90 O 1 PAD_rcvled_n 89 1 Z
+bit 89 C 1 *
+bit 88 I 1 PAD_link_n2
+bit 87 O 1 PAD_link_n2 86 1 Z
+bit 86 C 1 *
+bit 85 I 1 PAD_link_n1
+bit 84 O 1 PAD_link_n1 83 1 Z
+bit 83 C 1 *
+bit 82 I 1 PAD_fdxled_n
+bit 81 O 1 PAD_fdxled_n 80 1 Z
+bit 80 C 1 *
+bit 79 I 1 PAD_slave_n
+bit 78 O 1 PAD_slave_n 77 1 Z
+bit 77 C 1 *
+bit 76 I 1 PAD_intr_n
+bit 75 O 1 PAD_intr_n 74 1 Z
+bit 74 C 1 *
+bit 73 I 1 PAD_tpin0
+bit 72 I 1 PAD_tpin1
+bit 71 I 1 PAD_tpin2
+bit 70 I 1 PAD_tpin3
+bit 69 I 1 PAD_tpin4
+bit 68 I 1 PAD_tpin5
+bit 67 O 1 PAD_tpin5 66 1 Z
+bit 66 C 1 *
+bit 65 I 1 PAD_tpin6
+bit 64 I 1 PAD_tpin7
+bit 63 I 1 PAD_txc
+bit 62 O 1 PAD_txc 61 1 Z
+bit 61 C 1 *
+bit 60 I 1 PAD_txd10
+bit 59 O 1 *
+bit 58 C 1 *
+bit 57 I 1 PAD_txd11
+bit 56 O 1 *
+bit 55 C 1 *
+bit 54 I 1 PAD_txd12
+bit 53 O 1 *
+bit 52 C 1 *
+bit 51 I 1 PAD_txd13
+bit 50 O 1 *
+bit 49 C 1 *
+bit 48 I 1 PAD_txd14
+bit 47 O 1 *
+bit 46 C 1 *
+bit 45 I 1 PAD_txd15
+bit 44 O 1 *
+bit 43 C 1 *
+bit 42 I 1 PAD_txd16
+bit 41 O 1 *
+bit 40 C 1 *
+bit 39 I 1 PAD_txd17
+bit 38 O 1 *
+bit 37 C 1 *
+bit 36 I 1 PAD_tx_er
+bit 35 O 1 *
+bit 34 C 1 *
+bit 33 I 1 PAD_tx_en
+bit 32 O 1 *
+bit 31 C 1 *
+bit 30 I 1 PAD_gtx_clk
+bit 29 O 1 *
+bit 28 C 1 *
+bit 27 I 1 PAD_rbc0
+bit 26 O 1 PAD_rbc0 25 1 Z
+bit 25 C 1 *
+bit 24 I 1 PAD_rbc1
+bit 23 O 1 PAD_rbc1 22 1 Z
+bit 22 C 1 *
+bit 21 I 1 PAD_rxc
+bit 20 O 1 PAD_rxc 19 1 Z
+bit 19 C 1 *
+bit 18 I 1 PAD_rx_er
+bit 17 O 1 PAD_rx_er 16 1 Z
+bit 16 C 1 *
+bit 15 I 1 PAD_rx_dv
+bit 14 O 1 PAD_rx_dv 13 1 Z
+bit 13 C 1 *
+bit 12 I 1 PAD_rxd17
+bit 11 O 1 PAD_rxd17 10 1 Z
+bit 10 C 1 *
+bit 9 I 1 PAD_rxd16
+bit 8 O 1 PAD_rxd16 7 1 Z
+bit 7 C 1 *
+bit 6 I 1 PAD_rxd15
+bit 5 O 1 PAD_rxd15 4 1 Z
+bit 4 C 1 *
+bit 3 I 1 PAD_edgerate
+bit 2 I 1 PAD_rxd14
+bit 1 O 1 PAD_rxd14 0 1 Z
+bit 0 C 1 *
--- /dev/null
+#
+# $Id: STEPPINGS 442 2003-05-26 09:04:38Z telka $
+#
+# Copyright (C) 2008 Julien Aube
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+
+0000 bcm6358 V1
+
--- /dev/null
+#
+# $Id$
+#
+# JTAG declarations for Atheros AR2312
+# Also valid for Broadcom BCM6358 (J. Aube)
+#
+# Copyright (C) 2005 Marek Michalkiewicz
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Marek Michalkiewicz <marekm@amelek.gda.pl>, 2005.
+#
+
+register BR 1
+register BSR 1
+register DIR 32
+register EJIMPCODE 32
+register EJADDRESS 32
+register EJDATA 32
+register EJCONTROL 32
+register EJALL 96
+register EJFASTDATA 33
+
+instruction length 5
+
+instruction BYPASS 11111 BR
+instruction SAMPLE/PRELOAD 00010 BSR
+instruction IDCODE 00001 DIR
+instruction EJTAG_IMPCODE 00011 EJIMPCODE
+instruction EJTAG_ADDRESS 01000 EJADDRESS
+instruction EJTAG_DATA 01001 EJDATA
+instruction EJTAG_CONTROL 01010 EJCONTROL
+instruction EJTAG_ALL 01011 EJALL
+instruction EJTAGBOOT 01100 BR
+instruction NORMALBOOT 01101 BR
+instruction EJTAG_FASTDATA 01110 EJFASTDATA
+
+endian big
+initbus ejtag_dma
+
--- /dev/null
+--
+-- $Id$
+--
+-- Email header accompanying the original Yacc code:
+-- http://www.eda.org/vug_bbs/bsdl.parser
+--
+-- -----------------------------------8<--------------------------------------
+--
+-- Hello All,
+--
+-- This is this first mailing of the BSDL* Version 0.0 parser specifications
+-- we are sending to people who request it from our publicized E-Mail address;
+--
+-- bsdl%hpmtlx@hplabs.HP.com
+--
+-- You are free to redistribute this at will, but we feel that it would be
+-- better if respondents asked for it directly so that their addresses can
+-- be entered into our list for future mailings and updates.
+--
+-- It would be helpful if you could confirm receipt of this transmission.
+-- We also would be very interested to hear about your experiences with this
+-- information and what you are planning to do with BSDL.
+--
+-- Regards,
+--
+-- Ken Parker
+-- Hewlett-Packard Company
+--
+--
+-- *Boundary-Scan Description Language - as documented in:
+--
+-- "A Language for Describing Boundary-Scan Devices", K.P. Parker
+-- and S. Oresjo, Proceedings 1990 International Test Conference,
+-- Washington DC, pp 222-234
+--
+--
+-- - -----------------cut here---------------------------------------------------
+--
+--
+-- 901004.0721 Hewlett-Packard Company
+-- 901016.1049 Manufacturing Test Division
+-- P.O. Box 301
+-- Loveland, Colorado 80537
+-- USA
+--
+-- October 1990
+-- Hello BSDL Parser Requestor,
+--
+-- This Electronic Mail reply contains the computer specifications for
+-- Hewlett-Packard's Version 0.0 BSDL parser. This section of the reply
+-- explains the contents of the rest of this file.
+--
+-- This file is composed of seven (7) parts:
+--
+-- 1) How to use this file
+--
+-- 2) UNIX* Lex source (lexicographical tokenizing rules)
+--
+-- 3) UNIX* Yacc source (BNF-like syntax description)
+--
+-- 4) A sample main program to recognize BSDL.
+--
+-- 5) A BSDL description of the Texas Instruments 74bct8374 that is
+-- recognized by the parser, for testing purposes.
+--
+-- 6) The VHDL package STD_1149_1_1990 needed by this parser.
+--
+-- 7) [added 901016] Porting experiences to other systems.
+--
+--
+-- RECOMMENDATION: Save a copy of this file in archival storage before
+-- processing it via the instructions below. This will
+-- allow you to recover from errors, and allow you to
+-- compare subsequently released data for changes.
+--
+-- DISCLAIMERS:
+--
+-- 1. The IEEE 1149.1 Working Group has not endorsed BSDL Version 0.0 and
+-- therefore no person may represent it as an IEEE standard or imply that
+-- a resulting IEEE standard will be identical to it.
+--
+-- 2. The IEEE 1149.1 Working Group recognizes that BSDL Version 0.0 is a
+-- well-conceived initiative that is likely to excelerate the creation
+-- of tools that support the 1149.1 standard. As such, changes and
+-- enhancements will be carefully considered so as not to needlessly
+-- disrupt these development efforts. The overriding goal is the
+-- ultimate success of the 1149.1 standard.
+--
+-- LEGAL NOTICES:
+--
+-- Hewlett-Packard Company makes no warranty of any kind with regard to
+-- this information, including, but not limited to, the implied
+-- waranties of merchantability and fitness for a particular purpose.
+--
+-- Hewlett-Packard Company shall not be liable for errors contained
+-- herein or direct, indirect, special, incidental, or consequential
+-- damages in connection with the furnishing, performance, or use of
+-- this material.
+--
+--
+-- *UNIX is a trademark of AT&T in the USA and other countries.
+--
+
+-- STD_1149_1_1990 VHDL Package and Package Body in support of
+-- BSDL Version 0.0
+--
+
+ package STD_1149_1_1990 is -- Created 900525
+
+ -- Give pin mapping declarations
+
+ attribute PIN_MAP : string;
+ subtype PIN_MAP_STRING is string;
+
+ -- Give TAP control declarations
+
+ type CLOCK_LEVEL is (LOW, BOTH);
+ type CLOCK_INFO is record
+ FREQ : real;
+ LEVEL: CLOCK_LEVEL;
+ end record;
+
+ attribute TAP_SCAN_IN : boolean;
+ attribute TAP_SCAN_OUT : boolean;
+ attribute TAP_SCAN_CLOCK: CLOCK_INFO;
+ attribute TAP_SCAN_MODE : boolean;
+ attribute TAP_SCAN_RESET: boolean;
+
+ -- Give instruction register declarations
+
+ attribute INSTRUCTION_LENGTH : integer;
+ attribute INSTRUCTION_OPCODE : string;
+ attribute INSTRUCTION_CAPTURE : string;
+ attribute INSTRUCTION_DISABLE : string;
+ attribute INSTRUCTION_GUARD : string;
+ attribute INSTRUCTION_PRIVATE : string;
+ attribute INSTRUCTION_USAGE : string;
+ attribute INSTRUCTION_SEQUENCE : string;
+
+ -- Give ID and USER code declarations
+
+ type ID_BITS is ('0', '1', 'x', 'X');
+ type ID_STRING is array (31 downto 0) of ID_BITS;
+ attribute IDCODE_REGISTER : ID_STRING;
+ attribute USERCODE_REGISTER: ID_STRING;
+
+ -- Give register declarations
+
+ attribute REGISTER_ACCESS : string;
+
+ -- Give boundary cell declarations
+
+ type BSCAN_INST is (EXTEST, SAMPLE, INTEST, RUNBIST);
+ type CELL_TYPE is (INPUT, INTERNAL, CLOCK,
+ CONTROL, CONTROLR, OUTPUT2,
+ OUTPUT3, BIDIR_IN, BIDIR_OUT);
+ type CAP_DATA is (PI, PO, UPD, CAP, X, ZERO, ONE);
+ type CELL_DATA is record
+ CT : CELL_TYPE;
+ I : BSCAN_INST;
+ CD : CAP_DATA;
+ end record;
+ type CELL_INFO is array (positive range <>) of CELL_DATA;
+
+ -- Boundary Cell defered constants (see package body)
+
+ constant BC_1 : CELL_INFO;
+ constant BC_2 : CELL_INFO;
+ constant BC_3 : CELL_INFO;
+ constant BC_4 : CELL_INFO;
+ constant BC_5 : CELL_INFO;
+ constant BC_6 : CELL_INFO;
+
+ -- Boundary Register declarations
+
+ attribute BOUNDARY_CELLS : string;
+ attribute BOUNDARY_LENGTH : integer;
+ attribute BOUNDARY_REGISTER : string;
+
+ -- Miscellaneous
+
+ attribute DESIGN_WARNING : string;
+end STD_1149_1_1990; -- End of 1149.1-1990 Package
+
+
+package body STD_1149_1_1990 is -- Standard Boundary Cells
+ -- Written 900525
+
+-- Description for f10-12, f10-16, f10-18c, f10-18d, f10-21c
+
+constant BC_1 : CELL_INFO :=
+ ((INPUT, EXTEST, PI), (OUTPUT2, EXTEST, PI),
+ (INPUT, SAMPLE, PI), (OUTPUT2, SAMPLE, PI),
+ (INPUT, INTEST, PI), (OUTPUT2, INTEST, PI),
+ (INPUT, RUNBIST, PI), (OUTPUT2, RUNBIST, PI),
+ (OUTPUT3, EXTEST, PI), (INTERNAL, EXTEST, PI),
+ (OUTPUT3, SAMPLE, PI), (INTERNAL, SAMPLE, PI),
+ (OUTPUT3, INTEST, PI), (INTERNAL, INTEST, PI),
+ (OUTPUT3, RUNBIST, PI), (INTERNAL, RUNBIST, PI),
+ (CONTROL, EXTEST, PI), (CONTROLR, EXTEST, PI),
+ (CONTROL, SAMPLE, PI), (CONTROLR, SAMPLE, PI),
+ (CONTROL, INTEST, PI), (CONTROLR, INTEST, PI),
+ (CONTROL, RUNBIST, PI), (CONTROLR, RUNBIST, PI) );
+
+-- Description for f10-8, f10-17, f10-19c, f10-19d, f10-22c
+
+constant BC_2 : CELL_INFO :=
+ ((INPUT, EXTEST, PI), (OUTPUT2, EXTEST, UPD),
+ (INPUT, SAMPLE, PI), (OUTPUT2, SAMPLE, PI),
+ (INPUT, INTEST, UPD), -- Intest on output2 not supported
+ (INPUT, RUNBIST, UPD), (OUTPUT2, RUNBIST, UPD),
+ (OUTPUT3, EXTEST, UPD), (INTERNAL, EXTEST, PI),
+ (OUTPUT3, SAMPLE, PI), (INTERNAL, SAMPLE, PI),
+ (OUTPUT3, INTEST, PI), (INTERNAL, INTEST, UPD),
+ (OUTPUT3, RUNBIST, PI), (INTERNAL, RUNBIST, UPD),
+ (CONTROL, EXTEST, UPD), (CONTROLR, EXTEST, UPD),
+ (CONTROL, SAMPLE, PI), (CONTROLR, SAMPLE, PI),
+ (CONTROL, INTEST, PI), (CONTROLR, INTEST, PI),
+ (CONTROL, RUNBIST, PI), (CONTROLR, RUNBIST, PI) );
+
+-- Description for f10-9
+
+constant BC_3 : CELL_INFO :=
+ ((INPUT, EXTEST, PI), (INTERNAL, EXTEST, PI),
+ (INPUT, SAMPLE, PI), (INTERNAL, SAMPLE, PI),
+ (INPUT, INTEST, PI), (INTERNAL, INTEST, PI),
+ (INPUT, RUNBIST, PI), (INTERNAL, RUNBIST, PI) );
+
+-- Description for f10-10, f10-11
+
+constant BC_4 : CELL_INFO :=
+ ((INPUT, EXTEST, PI), -- Intest on input not supported
+ (INPUT, SAMPLE, PI), -- Runbist on input not supported
+ (CLOCK, EXTEST, PI), (INTERNAL, EXTEST, PI),
+ (CLOCK, SAMPLE, PI), (INTERNAL, SAMPLE, PI),
+ (CLOCK, INTEST, PI), (INTERNAL, INTEST, PI),
+ (CLOCK, RUNBIST, PI), (INTERNAL, RUNBIST, PI) );
+
+-- Description for f10-20c, a combined Input/Control
+
+constant BC_5 : CELL_INFO :=
+ ((INPUT, EXTEST, PI), (CONTROL, EXTEST, PI),
+ (INPUT, SAMPLE, PI), (CONTROL, SAMPLE, PI),
+ (INPUT, INTEST, UPD), (CONTROL, INTEST, UPD),
+ (INPUT, RUNBIST, PI), (CONTROL, RUNBIST, PI) );
+
+-- Description for f10-22d, a reversible cell
+
+constant BC_6 : CELL_INFO :=
+ ((BIDIR_IN, EXTEST, PI), (BIDIR_OUT, EXTEST, UPD),
+ (BIDIR_IN, SAMPLE, PI), (BIDIR_OUT, SAMPLE, PI),
+ (BIDIR_IN, INTEST, UPD), (BIDIR_OUT, INTEST, PI),
+ (BIDIR_IN, RUNBIST, UPD), (BIDIR_OUT, RUNBIST, PI) );
+
+end STD_1149_1_1990; -- End of 1149.1-1990 Package Body
--- /dev/null
+--
+-- $Id$
+--
+-- Email header accompanying the original Yacc code:
+-- http://www.eda.org/vug_bbs/bsdl.parser
+--
+-- -----------------------------------8<--------------------------------------
+--
+-- Hello All,
+--
+-- This is this first mailing of the BSDL* Version 0.0 parser specifications
+-- we are sending to people who request it from our publicized E-Mail address;
+--
+-- bsdl%hpmtlx@hplabs.HP.com
+--
+-- You are free to redistribute this at will, but we feel that it would be
+-- better if respondents asked for it directly so that their addresses can
+-- be entered into our list for future mailings and updates.
+--
+-- It would be helpful if you could confirm receipt of this transmission.
+-- We also would be very interested to hear about your experiences with this
+-- information and what you are planning to do with BSDL.
+--
+-- Regards,
+--
+-- Ken Parker
+-- Hewlett-Packard Company
+--
+--
+-- *Boundary-Scan Description Language - as documented in:
+--
+-- "A Language for Describing Boundary-Scan Devices", K.P. Parker
+-- and S. Oresjo, Proceedings 1990 International Test Conference,
+-- Washington DC, pp 222-234
+--
+--
+-- - -----------------cut here---------------------------------------------------
+--
+--
+-- 901004.0721 Hewlett-Packard Company
+-- 901016.1049 Manufacturing Test Division
+-- P.O. Box 301
+-- Loveland, Colorado 80537
+-- USA
+--
+-- October 1990
+-- Hello BSDL Parser Requestor,
+--
+-- This Electronic Mail reply contains the computer specifications for
+-- Hewlett-Packard's Version 0.0 BSDL parser. This section of the reply
+-- explains the contents of the rest of this file.
+--
+-- This file is composed of seven (7) parts:
+--
+-- 1) How to use this file
+--
+-- 2) UNIX* Lex source (lexicographical tokenizing rules)
+--
+-- 3) UNIX* Yacc source (BNF-like syntax description)
+--
+-- 4) A sample main program to recognize BSDL.
+--
+-- 5) A BSDL description of the Texas Instruments 74bct8374 that is
+-- recognized by the parser, for testing purposes.
+--
+-- 6) The VHDL package STD_1149_1_1990 needed by this parser.
+--
+-- 7) [added 901016] Porting experiences to other systems.
+--
+--
+-- RECOMMENDATION: Save a copy of this file in archival storage before
+-- processing it via the instructions below. This will
+-- allow you to recover from errors, and allow you to
+-- compare subsequently released data for changes.
+--
+-- DISCLAIMERS:
+--
+-- 1. The IEEE 1149.1 Working Group has not endorsed BSDL Version 0.0 and
+-- therefore no person may represent it as an IEEE standard or imply that
+-- a resulting IEEE standard will be identical to it.
+--
+-- 2. The IEEE 1149.1 Working Group recognizes that BSDL Version 0.0 is a
+-- well-conceived initiative that is likely to excelerate the creation
+-- of tools that support the 1149.1 standard. As such, changes and
+-- enhancements will be carefully considered so as not to needlessly
+-- disrupt these development efforts. The overriding goal is the
+-- ultimate success of the 1149.1 standard.
+--
+-- LEGAL NOTICES:
+--
+-- Hewlett-Packard Company makes no warranty of any kind with regard to
+-- this information, including, but not limited to, the implied
+-- waranties of merchantability and fitness for a particular purpose.
+--
+-- Hewlett-Packard Company shall not be liable for errors contained
+-- herein or direct, indirect, special, incidental, or consequential
+-- damages in connection with the furnishing, performance, or use of
+-- this material.
+--
+--
+-- *UNIX is a trademark of AT&T in the USA and other countries.
+--
+
+-- STD_1149_1_1990 VHDL Package and Package Body in support of
+-- BSDL Version 0.0
+--
+
+-- package STD_1149_1_1990 is -- Created 900525
+ package STD_1149_1_1994 is
+
+ -- Give pin mapping declarations
+
+ attribute PIN_MAP : string;
+ subtype PIN_MAP_STRING is string;
+
+ -- Give TAP control declarations
+
+ type CLOCK_LEVEL is (LOW, BOTH);
+ type CLOCK_INFO is record
+ FREQ : real;
+ LEVEL: CLOCK_LEVEL;
+ end record;
+
+ attribute TAP_SCAN_IN : boolean;
+ attribute TAP_SCAN_OUT : boolean;
+ attribute TAP_SCAN_CLOCK: CLOCK_INFO;
+ attribute TAP_SCAN_MODE : boolean;
+ attribute TAP_SCAN_RESET: boolean;
+
+ -- Give instruction register declarations
+
+ attribute INSTRUCTION_LENGTH : integer;
+ attribute INSTRUCTION_OPCODE : string;
+ attribute INSTRUCTION_CAPTURE : string;
+ attribute INSTRUCTION_DISABLE : string;
+ attribute INSTRUCTION_GUARD : string;
+ attribute INSTRUCTION_PRIVATE : string;
+ attribute INSTRUCTION_USAGE : string;
+ attribute INSTRUCTION_SEQUENCE : string;
+
+ -- Give ID and USER code declarations
+
+ type ID_BITS is ('0', '1', 'x', 'X');
+ type ID_STRING is array (31 downto 0) of ID_BITS;
+ attribute IDCODE_REGISTER : ID_STRING;
+ attribute USERCODE_REGISTER: ID_STRING;
+
+ -- Give register declarations
+
+ attribute REGISTER_ACCESS : string;
+
+ -- Give boundary cell declarations
+
+ type BSCAN_INST is (EXTEST, SAMPLE, INTEST, RUNBIST);
+ type CELL_TYPE is (INPUT, INTERNAL, CLOCK,
+ CONTROL, CONTROLR, OUTPUT2,
+ OUTPUT3, BIDIR_IN, BIDIR_OUT);
+ type CAP_DATA is (PI, PO, UPD, CAP, X, ZERO, ONE);
+ type CELL_DATA is record
+ CT : CELL_TYPE;
+ I : BSCAN_INST;
+ CD : CAP_DATA;
+ end record;
+ type CELL_INFO is array (positive range <>) of CELL_DATA;
+
+ -- Boundary Cell defered constants (see package body)
+
+ constant BC_1 : CELL_INFO;
+ constant BC_2 : CELL_INFO;
+ constant BC_3 : CELL_INFO;
+ constant BC_4 : CELL_INFO;
+ constant BC_5 : CELL_INFO;
+ constant BC_6 : CELL_INFO;
+
+ -- Boundary Register declarations
+
+ attribute BOUNDARY_CELLS : string;
+ attribute BOUNDARY_LENGTH : integer;
+ attribute BOUNDARY_REGISTER : string;
+
+ -- Miscellaneous
+
+ attribute DESIGN_WARNING : string;
+--end STD_1149_1_1990; -- End of 1149.1-1990 Package
+end STD_1149_1_1994;
+
+
+--package body STD_1149_1_1990 is -- Standard Boundary Cells
+ -- Written 900525
+package body STD_1149_1_1994 is
+
+-- Description for f10-12, f10-16, f10-18c, f10-18d, f10-21c
+
+constant BC_1 : CELL_INFO :=
+ ((INPUT, EXTEST, PI), (OUTPUT2, EXTEST, PI),
+ (INPUT, SAMPLE, PI), (OUTPUT2, SAMPLE, PI),
+ (INPUT, INTEST, PI), (OUTPUT2, INTEST, PI),
+ (INPUT, RUNBIST, PI), (OUTPUT2, RUNBIST, PI),
+ (OUTPUT3, EXTEST, PI), (INTERNAL, EXTEST, PI),
+ (OUTPUT3, SAMPLE, PI), (INTERNAL, SAMPLE, PI),
+ (OUTPUT3, INTEST, PI), (INTERNAL, INTEST, PI),
+ (OUTPUT3, RUNBIST, PI), (INTERNAL, RUNBIST, PI),
+ (CONTROL, EXTEST, PI), (CONTROLR, EXTEST, PI),
+ (CONTROL, SAMPLE, PI), (CONTROLR, SAMPLE, PI),
+ (CONTROL, INTEST, PI), (CONTROLR, INTEST, PI),
+ (CONTROL, RUNBIST, PI), (CONTROLR, RUNBIST, PI) );
+
+-- Description for f10-8, f10-17, f10-19c, f10-19d, f10-22c
+
+constant BC_2 : CELL_INFO :=
+ ((INPUT, EXTEST, PI), (OUTPUT2, EXTEST, UPD),
+ (INPUT, SAMPLE, PI), (OUTPUT2, SAMPLE, PI),
+ (INPUT, INTEST, UPD), -- Intest on output2 not supported
+ (INPUT, RUNBIST, UPD), (OUTPUT2, RUNBIST, UPD),
+ (OUTPUT3, EXTEST, UPD), (INTERNAL, EXTEST, PI),
+ (OUTPUT3, SAMPLE, PI), (INTERNAL, SAMPLE, PI),
+ (OUTPUT3, INTEST, PI), (INTERNAL, INTEST, UPD),
+ (OUTPUT3, RUNBIST, PI), (INTERNAL, RUNBIST, UPD),
+ (CONTROL, EXTEST, UPD), (CONTROLR, EXTEST, UPD),
+ (CONTROL, SAMPLE, PI), (CONTROLR, SAMPLE, PI),
+ (CONTROL, INTEST, PI), (CONTROLR, INTEST, PI),
+ (CONTROL, RUNBIST, PI), (CONTROLR, RUNBIST, PI) );
+
+-- Description for f10-9
+
+constant BC_3 : CELL_INFO :=
+ ((INPUT, EXTEST, PI), (INTERNAL, EXTEST, PI),
+ (INPUT, SAMPLE, PI), (INTERNAL, SAMPLE, PI),
+ (INPUT, INTEST, PI), (INTERNAL, INTEST, PI),
+ (INPUT, RUNBIST, PI), (INTERNAL, RUNBIST, PI) );
+
+-- Description for f10-10, f10-11
+
+constant BC_4 : CELL_INFO :=
+ ((INPUT, EXTEST, PI), -- Intest on input not supported
+ (INPUT, SAMPLE, PI), -- Runbist on input not supported
+ (CLOCK, EXTEST, PI), (INTERNAL, EXTEST, PI),
+ (CLOCK, SAMPLE, PI), (INTERNAL, SAMPLE, PI),
+ (CLOCK, INTEST, PI), (INTERNAL, INTEST, PI),
+ (CLOCK, RUNBIST, PI), (INTERNAL, RUNBIST, PI) );
+
+-- Description for f10-20c, a combined Input/Control
+
+constant BC_5 : CELL_INFO :=
+ ((INPUT, EXTEST, PI), (CONTROL, EXTEST, PI),
+ (INPUT, SAMPLE, PI), (CONTROL, SAMPLE, PI),
+ (INPUT, INTEST, UPD), (CONTROL, INTEST, UPD),
+ (INPUT, RUNBIST, PI), (CONTROL, RUNBIST, PI) );
+
+-- Description for f10-22d, a reversible cell
+
+constant BC_6 : CELL_INFO :=
+ ((BIDIR_IN, EXTEST, PI), (BIDIR_OUT, EXTEST, UPD),
+ (BIDIR_IN, SAMPLE, PI), (BIDIR_OUT, SAMPLE, PI),
+ (BIDIR_IN, INTEST, UPD), (BIDIR_OUT, INTEST, PI),
+ (BIDIR_IN, RUNBIST, UPD), (BIDIR_OUT, RUNBIST, PI) );
+
+--end STD_1149_1_1990; -- End of 1149.1-1990 Package Body
+end STD_1149_1_1994;
--- /dev/null
+--
+-- $Id$
+--
+-- Email header accompanying the original Yacc code:
+-- http://www.eda.org/vug_bbs/bsdl.parser
+--
+-- -----------------------------------8<--------------------------------------
+--
+-- Hello All,
+--
+-- This is this first mailing of the BSDL* Version 0.0 parser specifications
+-- we are sending to people who request it from our publicized E-Mail address;
+--
+-- bsdl%hpmtlx@hplabs.HP.com
+--
+-- You are free to redistribute this at will, but we feel that it would be
+-- better if respondents asked for it directly so that their addresses can
+-- be entered into our list for future mailings and updates.
+--
+-- It would be helpful if you could confirm receipt of this transmission.
+-- We also would be very interested to hear about your experiences with this
+-- information and what you are planning to do with BSDL.
+--
+-- Regards,
+--
+-- Ken Parker
+-- Hewlett-Packard Company
+--
+--
+-- *Boundary-Scan Description Language - as documented in:
+--
+-- "A Language for Describing Boundary-Scan Devices", K.P. Parker
+-- and S. Oresjo, Proceedings 1990 International Test Conference,
+-- Washington DC, pp 222-234
+--
+--
+-- - -----------------cut here---------------------------------------------------
+--
+--
+-- 901004.0721 Hewlett-Packard Company
+-- 901016.1049 Manufacturing Test Division
+-- P.O. Box 301
+-- Loveland, Colorado 80537
+-- USA
+--
+-- October 1990
+-- Hello BSDL Parser Requestor,
+--
+-- This Electronic Mail reply contains the computer specifications for
+-- Hewlett-Packard's Version 0.0 BSDL parser. This section of the reply
+-- explains the contents of the rest of this file.
+--
+-- This file is composed of seven (7) parts:
+--
+-- 1) How to use this file
+--
+-- 2) UNIX* Lex source (lexicographical tokenizing rules)
+--
+-- 3) UNIX* Yacc source (BNF-like syntax description)
+--
+-- 4) A sample main program to recognize BSDL.
+--
+-- 5) A BSDL description of the Texas Instruments 74bct8374 that is
+-- recognized by the parser, for testing purposes.
+--
+-- 6) The VHDL package STD_1149_1_1990 needed by this parser.
+--
+-- 7) [added 901016] Porting experiences to other systems.
+--
+--
+-- RECOMMENDATION: Save a copy of this file in archival storage before
+-- processing it via the instructions below. This will
+-- allow you to recover from errors, and allow you to
+-- compare subsequently released data for changes.
+--
+-- DISCLAIMERS:
+--
+-- 1. The IEEE 1149.1 Working Group has not endorsed BSDL Version 0.0 and
+-- therefore no person may represent it as an IEEE standard or imply that
+-- a resulting IEEE standard will be identical to it.
+--
+-- 2. The IEEE 1149.1 Working Group recognizes that BSDL Version 0.0 is a
+-- well-conceived initiative that is likely to excelerate the creation
+-- of tools that support the 1149.1 standard. As such, changes and
+-- enhancements will be carefully considered so as not to needlessly
+-- disrupt these development efforts. The overriding goal is the
+-- ultimate success of the 1149.1 standard.
+--
+-- LEGAL NOTICES:
+--
+-- Hewlett-Packard Company makes no warranty of any kind with regard to
+-- this information, including, but not limited to, the implied
+-- waranties of merchantability and fitness for a particular purpose.
+--
+-- Hewlett-Packard Company shall not be liable for errors contained
+-- herein or direct, indirect, special, incidental, or consequential
+-- damages in connection with the furnishing, performance, or use of
+-- this material.
+--
+--
+-- *UNIX is a trademark of AT&T in the USA and other countries.
+--
+
+-- STD_1149_1_1990 VHDL Package and Package Body in support of
+-- BSDL Version 0.0
+--
+
+-- package STD_1149_1_1990 is -- Created 900525
+ package STD_1149_1_2001 is
+
+ -- Give pin mapping declarations
+
+ attribute PIN_MAP : string;
+ subtype PIN_MAP_STRING is string;
+
+ -- Give TAP control declarations
+
+ type CLOCK_LEVEL is (LOW, BOTH);
+ type CLOCK_INFO is record
+ FREQ : real;
+ LEVEL: CLOCK_LEVEL;
+ end record;
+
+ attribute TAP_SCAN_IN : boolean;
+ attribute TAP_SCAN_OUT : boolean;
+ attribute TAP_SCAN_CLOCK: CLOCK_INFO;
+ attribute TAP_SCAN_MODE : boolean;
+ attribute TAP_SCAN_RESET: boolean;
+
+ -- Give instruction register declarations
+
+ attribute INSTRUCTION_LENGTH : integer;
+ attribute INSTRUCTION_OPCODE : string;
+ attribute INSTRUCTION_CAPTURE : string;
+ attribute INSTRUCTION_DISABLE : string;
+ attribute INSTRUCTION_GUARD : string;
+ attribute INSTRUCTION_PRIVATE : string;
+ attribute INSTRUCTION_USAGE : string;
+ attribute INSTRUCTION_SEQUENCE : string;
+
+ -- Give ID and USER code declarations
+
+ type ID_BITS is ('0', '1', 'x', 'X');
+ type ID_STRING is array (31 downto 0) of ID_BITS;
+ attribute IDCODE_REGISTER : ID_STRING;
+ attribute USERCODE_REGISTER: ID_STRING;
+
+ -- Give register declarations
+
+ attribute REGISTER_ACCESS : string;
+
+ -- Give boundary cell declarations
+
+ type BSCAN_INST is (EXTEST, SAMPLE, INTEST, RUNBIST);
+ type CELL_TYPE is (INPUT, INTERNAL, CLOCK,
+ CONTROL, CONTROLR, OUTPUT2,
+ OUTPUT3, BIDIR_IN, BIDIR_OUT);
+ type CAP_DATA is (PI, PO, UPD, CAP, X, ZERO, ONE);
+ type CELL_DATA is record
+ CT : CELL_TYPE;
+ I : BSCAN_INST;
+ CD : CAP_DATA;
+ end record;
+ type CELL_INFO is array (positive range <>) of CELL_DATA;
+
+ -- Boundary Cell defered constants (see package body)
+
+ constant BC_1 : CELL_INFO;
+ constant BC_2 : CELL_INFO;
+ constant BC_3 : CELL_INFO;
+ constant BC_4 : CELL_INFO;
+ constant BC_5 : CELL_INFO;
+ constant BC_6 : CELL_INFO;
+
+ -- Boundary Register declarations
+
+ attribute BOUNDARY_CELLS : string;
+ attribute BOUNDARY_LENGTH : integer;
+ attribute BOUNDARY_REGISTER : string;
+
+ -- Miscellaneous
+
+ attribute DESIGN_WARNING : string;
+--end STD_1149_1_1990; -- End of 1149.1-1990 Package
+end STD_1149_1_2001;
+
+
+--package body STD_1149_1_1990 is -- Standard Boundary Cells
+ -- Written 900525
+package body STD_1149_1_2001 is
+
+-- Description for f10-12, f10-16, f10-18c, f10-18d, f10-21c
+
+constant BC_1 : CELL_INFO :=
+ ((INPUT, EXTEST, PI), (OUTPUT2, EXTEST, PI),
+ (INPUT, SAMPLE, PI), (OUTPUT2, SAMPLE, PI),
+ (INPUT, INTEST, PI), (OUTPUT2, INTEST, PI),
+ (INPUT, RUNBIST, PI), (OUTPUT2, RUNBIST, PI),
+ (OUTPUT3, EXTEST, PI), (INTERNAL, EXTEST, PI),
+ (OUTPUT3, SAMPLE, PI), (INTERNAL, SAMPLE, PI),
+ (OUTPUT3, INTEST, PI), (INTERNAL, INTEST, PI),
+ (OUTPUT3, RUNBIST, PI), (INTERNAL, RUNBIST, PI),
+ (CONTROL, EXTEST, PI), (CONTROLR, EXTEST, PI),
+ (CONTROL, SAMPLE, PI), (CONTROLR, SAMPLE, PI),
+ (CONTROL, INTEST, PI), (CONTROLR, INTEST, PI),
+ (CONTROL, RUNBIST, PI), (CONTROLR, RUNBIST, PI) );
+
+-- Description for f10-8, f10-17, f10-19c, f10-19d, f10-22c
+
+constant BC_2 : CELL_INFO :=
+ ((INPUT, EXTEST, PI), (OUTPUT2, EXTEST, UPD),
+ (INPUT, SAMPLE, PI), (OUTPUT2, SAMPLE, PI),
+ (INPUT, INTEST, UPD), -- Intest on output2 not supported
+ (INPUT, RUNBIST, UPD), (OUTPUT2, RUNBIST, UPD),
+ (OUTPUT3, EXTEST, UPD), (INTERNAL, EXTEST, PI),
+ (OUTPUT3, SAMPLE, PI), (INTERNAL, SAMPLE, PI),
+ (OUTPUT3, INTEST, PI), (INTERNAL, INTEST, UPD),
+ (OUTPUT3, RUNBIST, PI), (INTERNAL, RUNBIST, UPD),
+ (CONTROL, EXTEST, UPD), (CONTROLR, EXTEST, UPD),
+ (CONTROL, SAMPLE, PI), (CONTROLR, SAMPLE, PI),
+ (CONTROL, INTEST, PI), (CONTROLR, INTEST, PI),
+ (CONTROL, RUNBIST, PI), (CONTROLR, RUNBIST, PI) );
+
+-- Description for f10-9
+
+constant BC_3 : CELL_INFO :=
+ ((INPUT, EXTEST, PI), (INTERNAL, EXTEST, PI),
+ (INPUT, SAMPLE, PI), (INTERNAL, SAMPLE, PI),
+ (INPUT, INTEST, PI), (INTERNAL, INTEST, PI),
+ (INPUT, RUNBIST, PI), (INTERNAL, RUNBIST, PI) );
+
+-- Description for f10-10, f10-11
+
+constant BC_4 : CELL_INFO :=
+ ((INPUT, EXTEST, PI), -- Intest on input not supported
+ (INPUT, SAMPLE, PI), -- Runbist on input not supported
+ (CLOCK, EXTEST, PI), (INTERNAL, EXTEST, PI),
+ (CLOCK, SAMPLE, PI), (INTERNAL, SAMPLE, PI),
+ (CLOCK, INTEST, PI), (INTERNAL, INTEST, PI),
+ (CLOCK, RUNBIST, PI), (INTERNAL, RUNBIST, PI) );
+
+-- Description for f10-20c, a combined Input/Control
+
+constant BC_5 : CELL_INFO :=
+ ((INPUT, EXTEST, PI), (CONTROL, EXTEST, PI),
+ (INPUT, SAMPLE, PI), (CONTROL, SAMPLE, PI),
+ (INPUT, INTEST, UPD), (CONTROL, INTEST, UPD),
+ (INPUT, RUNBIST, PI), (CONTROL, RUNBIST, PI) );
+
+-- Description for f10-22d, a reversible cell
+
+constant BC_6 : CELL_INFO :=
+ ((BIDIR_IN, EXTEST, PI), (BIDIR_OUT, EXTEST, UPD),
+ (BIDIR_IN, SAMPLE, PI), (BIDIR_OUT, SAMPLE, PI),
+ (BIDIR_IN, INTEST, UPD), (BIDIR_OUT, INTEST, PI),
+ (BIDIR_IN, RUNBIST, UPD), (BIDIR_OUT, RUNBIST, PI) );
+
+--end STD_1149_1_1990; -- End of 1149.1-1990 Package Body
+end STD_1149_1_2001;
--- /dev/null
+Package STD_1532_2001 is -- Attribute definitions for ISC description
+ use STD_1149_1_2001.all; -- Refer to BSDL definitions
+
+ attribute ISC_Conformance: BSDL_Extension;
+ attribute ISC_Pin_Behavior: BSDL_Extension;
+ attribute ISC_Fixed_System_Pins: BSDL_Extension; -- Optional
+ attribute ISC_Status: BSDL_Extension;
+ attribute ISC_Blank_Usercode: BSDL_Extension;
+ attribute ISC_Security: BSDL_Extension; -- Optional
+ attribute ISC_Flow: BSDL_Extension;
+ attribute ISC_Procedure: BSDL_Extension;
+ attribute ISC_Action: BSDL_Extension;
+ attribute ISC_Illegal_Exit: BSDL_Extension; -- Optional
+ attribute ISC_Design_Warning: BSDL_Extension; -- Optional
+end STD_1532_2001;
+
+Package Body STD_1532_2001 is
+ -- No content, this package body is required by BSDL syntax
+end STD_1532_2001;
--- /dev/null
+Package STD_1532_2002 is -- Attribute definitions for ISC description
+ use STD_1149_1_2001.all; -- Refer to BSDL definitions
+
+ attribute ISC_Conformance: BSDL_Extension;
+ attribute ISC_Pin_Behavior: BSDL_Extension;
+ attribute ISC_Fixed_System_Pins: BSDL_Extension; -- Optional
+ attribute ISC_Status: BSDL_Extension;
+ attribute ISC_Blank_Usercode: BSDL_Extension;
+ attribute ISC_Security: BSDL_Extension; -- Optional
+ attribute ISC_Flow: BSDL_Extension;
+ attribute ISC_Procedure: BSDL_Extension;
+ attribute ISC_Action: BSDL_Extension;
+ attribute ISC_Illegal_Exit: BSDL_Extension; -- Optional
+ attribute ISC_Design_Warning: BSDL_Extension; -- Optional
+end STD_1532_2002;
+
+Package Body STD_1532_2002 is
+ -- No content, this package body is required by BSDL syntax
+end STD_1532_2002;
--- /dev/null
+#
+# $Id$
+#
+# Copyright (C) 2003 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Marcel Telka <marcel@telka.sk>, 2003.
+#
+
+# bits 27-12 of the Device Identification Register
+0001000010000100 sa1100 SA1100
--- /dev/null
+#
+# $Id$
+#
+# Copyright (C) 2003 Jachym Holecek <freza@psi.cz>
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Jachym Holecek <freza@psi.cz>, 2003.
+#
+
+# bits 31-28 of the Device Identification Register
+1011 sa1100 rev11
--- /dev/null
+#
+# $Id$
+#
+# JTAG declarations for SA-1100
+# Copyright (C) 2003 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Marcel Telka <marcel@telka.sk>, 2003.
+#
+
+signal A(0)
+signal A(1)
+signal A(2)
+signal A(3)
+signal A(4)
+signal A(5)
+signal A(6)
+signal A(7)
+signal A(8)
+signal A(9)
+signal A(10)
+signal A(11)
+signal A(12)
+signal A(13)
+signal A(14)
+signal A(15)
+signal A(16)
+signal A(17)
+signal A(18)
+signal A(19)
+signal A(20)
+signal A(21)
+signal A(22)
+signal A(23)
+signal A(24)
+signal A(25)
+signal BATTF
+signal CAS(0)
+signal CAS(1)
+signal CAS(2)
+signal CAS(3)
+signal CS(0)
+signal CS(1)
+signal CS(2)
+signal CS(3)
+signal D(0)
+signal D(1)
+signal D(2)
+signal D(3)
+signal D(4)
+signal D(5)
+signal D(6)
+signal D(7)
+signal D(8)
+signal D(9)
+signal D(10)
+signal D(11)
+signal D(12)
+signal D(13)
+signal D(14)
+signal D(15)
+signal D(16)
+signal D(17)
+signal D(18)
+signal D(19)
+signal D(20)
+signal D(21)
+signal D(22)
+signal D(23)
+signal D(24)
+signal D(25)
+signal D(26)
+signal D(27)
+signal D(28)
+signal D(29)
+signal D(30)
+signal D(31)
+signal GP(0)
+signal GP(1)
+signal GP(2)
+signal GP(3)
+signal GP(4)
+signal GP(5)
+signal GP(6)
+signal GP(7)
+signal GP(8)
+signal GP(9)
+signal GP(10)
+signal GP(11)
+signal GP(12)
+signal GP(13)
+signal GP(14)
+signal GP(15)
+signal GP(16)
+signal GP(17)
+signal GP(18)
+signal GP(19)
+signal GP(20)
+signal GP(21)
+signal GP(22)
+signal GP(23)
+signal GP(24)
+signal GP(25)
+signal GP(26)
+signal GP(27)
+signal IOIS16
+signal LBIAS
+signal LDD(0)
+signal LDD(1)
+signal LDD(2)
+signal LDD(3)
+signal LDD(4)
+signal LDD(5)
+signal LDD(6)
+signal LDD(7)
+signal LFCLK
+signal LLCLK
+signal LPCLK
+signal OE
+signal PCE1
+signal PCE2
+signal PIOR
+signal PIOW
+signal POE
+signal PREG
+signal PSKTSEL
+signal PWAIT
+signal PWE
+signal RAS(0)
+signal RAS(1)
+signal RAS(2)
+signal RAS(3)
+signal RESET
+signal RESETO
+signal ROMSEL
+signal RXD1
+signal RXD2
+signal RXD3
+signal RXDC
+signal SCLKC
+signal SFRMC
+signal TXD1
+signal TXD2
+signal TXD3
+signal TXDC
+signal UDCN
+signal UDCP
+signal VDDFA
+signal WE
+
+# mandatory data registers
+register BSR 279 # Boundary Scan Register
+register BR 1 # Bypass Register
+# optional data registers
+register DIR 32 # Device Identification Register
+
+instruction length 5
+
+# mandatory instructions
+instruction EXTEST 00000 BSR
+instruction SAMPLE/PRELOAD 00001 BSR
+instruction BYPASS 11111 BR
+
+# optional instructions
+instruction CLAMP 00100 BR
+instruction HIGHZ 00101 BR
+instruction IDCODE 00110 DIR
+
+# BSR bits
+bit 278 I ? BATTF
+bit 277 I ? VDDFA
+bit 276 X ? .
+bit 275 C 0 .
+bit 274 O ? SFRMC 275 0 Z
+bit 273 I ? SFRMC
+bit 272 C 0 .
+bit 271 O ? SCLKC 272 0 Z
+bit 270 I ? SCLKC
+bit 269 C 0 .
+bit 268 O ? RXDC 269 0 Z
+bit 267 I ? RXDC
+bit 266 C ? .
+bit 265 O ? TXDC 266 0 Z
+bit 264 I ? TXDC
+bit 263 O ? D(0) 199 1 Z
+bit 262 I ? D(0)
+bit 261 O ? D(8) 199 1 Z
+bit 260 I ? D(8)
+bit 259 O ? D(16) 199 1 Z
+bit 258 I ? D(16)
+bit 257 O ? D(24) 199 1 Z
+bit 256 I ? D(24)
+bit 255 O ? D(1) 199 1 Z
+bit 254 I ? D(1)
+bit 253 O ? D(9) 199 1 Z
+bit 252 I ? D(9)
+bit 251 O ? D(17) 199 1 Z
+bit 250 I ? D(17)
+bit 249 O ? D(25) 199 1 Z
+bit 248 I ? D(25)
+bit 247 O ? D(2) 199 1 Z
+bit 246 I ? D(2)
+bit 245 O ? D(10) 199 1 Z
+bit 244 I ? D(10)
+bit 243 O ? D(18) 199 1 Z
+bit 242 I ? D(18)
+bit 241 O ? D(26) 199 1 Z
+bit 240 I ? D(26)
+bit 239 O ? D(3) 199 1 Z
+bit 238 I ? D(3)
+bit 237 O ? D(11) 199 1 Z
+bit 236 I ? D(11)
+bit 235 O ? D(19) 199 1 Z
+bit 234 I ? D(19)
+bit 233 O ? D(27) 199 1 Z
+bit 232 I ? D(27)
+bit 231 O ? D(4) 199 1 Z
+bit 230 I ? D(4)
+bit 229 O ? D(12) 199 1 Z
+bit 228 I ? D(12)
+bit 227 O ? D(20) 199 1 Z
+bit 226 I ? D(20)
+bit 225 O ? D(28) 199 1 Z
+bit 224 I ? D(28)
+bit 223 O ? D(5) 199 1 Z
+bit 222 I ? D(5)
+bit 221 O ? D(13) 199 1 Z
+bit 220 I ? D(13)
+bit 219 O ? D(21) 199 1 Z
+bit 218 I ? D(21)
+bit 217 O ? D(29) 199 1 Z
+bit 216 I ? D(29)
+bit 215 O ? D(6) 199 1 Z
+bit 214 I ? D(6)
+bit 213 O ? D(14) 199 1 Z
+bit 212 I ? D(14)
+bit 211 O ? D(22) 199 1 Z
+bit 210 I ? D(22)
+bit 209 O ? D(30) 199 1 Z
+bit 208 I ? D(30)
+bit 207 O ? D(7) 199 1 Z
+bit 206 I ? D(7)
+bit 205 O ? D(15) 199 1 Z
+bit 204 I ? D(15)
+bit 203 O ? D(23) 199 1 Z
+bit 202 I ? D(23)
+bit 201 O ? D(31) 199 1 Z
+bit 200 I ? D(31)
+bit 199 C 1 .
+bit 198 C 0 .
+bit 197 O ? GP(27) 198 0 Z
+bit 196 I ? GP(27)
+bit 195 C 0 .
+bit 194 O ? GP(26) 195 0 Z
+bit 193 I ? GP(26)
+bit 192 C 0 .
+bit 191 O ? GP(25) 192 0 Z
+bit 190 I ? GP(25)
+bit 189 C 0 .
+bit 188 O ? GP(24) 189 0 Z
+bit 187 I ? GP(24)
+bit 186 C 0 .
+bit 185 O ? GP(23) 186 0 Z
+bit 184 I ? GP(23)
+bit 183 C 0 .
+bit 182 O ? GP(22) 183 0 Z
+bit 181 I ? GP(22)
+bit 180 C 0 .
+bit 179 O ? GP(21) 180 0 Z
+bit 178 I ? GP(21)
+bit 177 C 0 .
+bit 176 O ? GP(20) 177 0 Z
+bit 175 I ? GP(20)
+bit 174 C 0 .
+bit 173 O ? GP(19) 174 0 Z
+bit 172 I ? GP(19)
+bit 171 C 0 .
+bit 170 O ? GP(18) 171 0 Z
+bit 169 I ? GP(18)
+bit 168 C 0 .
+bit 167 O ? GP(17) 168 0 Z
+bit 166 I ? GP(17)
+bit 165 C 0 .
+bit 164 O ? GP(16) 165 0 Z
+bit 163 I ? GP(16)
+bit 162 C 0 .
+bit 161 O ? GP(15) 162 0 Z
+bit 160 I ? GP(15)
+bit 159 C 0 .
+bit 158 O ? GP(14) 159 0 Z
+bit 157 I ? GP(14)
+bit 156 C 0 .
+bit 155 O ? GP(13) 156 0 Z
+bit 154 I ? GP(13)
+bit 153 C 0 .
+bit 152 O ? GP(12) 153 0 Z
+bit 151 I ? GP(12)
+bit 150 C 0 .
+bit 149 O ? GP(11) 150 0 Z
+bit 148 I ? GP(11)
+bit 147 C 0 .
+bit 146 O ? GP(10) 147 0 Z
+bit 145 I ? GP(10)
+bit 144 C 0 .
+bit 143 O ? GP(9) 144 0 Z
+bit 142 I ? GP(9)
+bit 141 C 0 .
+bit 140 O ? GP(8) 141 0 Z
+bit 139 I ? GP(8)
+bit 138 C 0 .
+bit 137 O ? GP(7) 138 0 Z
+bit 136 I ? GP(7)
+bit 135 C 0 .
+bit 134 O ? GP(6) 135 0 Z
+bit 133 I ? GP(6)
+bit 132 C 0 .
+bit 131 O ? GP(5) 132 0 Z
+bit 130 I ? GP(5)
+bit 129 C 0 .
+bit 128 O ? GP(4) 129 0 Z
+bit 127 I ? GP(4)
+bit 126 C 0 .
+bit 125 O ? GP(3) 126 0 Z
+bit 124 I ? GP(3)
+bit 123 C 0 .
+bit 122 O ? GP(2) 123 0 Z
+bit 121 I ? GP(2)
+bit 120 C 0 .
+bit 119 O ? GP(1) 120 0 Z
+bit 118 I ? GP(1)
+bit 117 C 0 .
+bit 116 O ? GP(0) 117 0 Z
+bit 115 I ? GP(0)
+bit 114 C 0 .
+bit 113 O ? LBIAS 114 0 Z
+bit 112 I ? LBIAS
+bit 111 C 0 .
+bit 110 O ? LPCLK 111 0 Z
+bit 109 I ? LPCLK
+bit 108 C 0 .
+bit 107 O ? LDD(0) 108 0 Z
+bit 106 I ? LDD(0)
+bit 105 C 0 .
+bit 104 O ? LDD(1) 105 0 Z
+bit 103 I ? LDD(1)
+bit 102 C 0 .
+bit 101 O ? LDD(2) 102 0 Z
+bit 100 I ? LDD(2)
+bit 99 C 0 .
+bit 98 O ? LDD(3) 99 0 Z
+bit 97 I ? LDD(3)
+bit 96 C 0 .
+bit 95 O ? LDD(4) 96 0 Z
+bit 94 I ? LDD(4)
+bit 93 C 0 .
+bit 92 O ? LDD(5) 93 0 Z
+bit 91 I ? LDD(5)
+bit 90 C 0 .
+bit 89 O ? LDD(6) 90 0 Z
+bit 88 I ? LDD(6)
+bit 87 C 0 .
+bit 86 O ? LDD(7) 87 0 Z
+bit 85 I ? LDD(7)
+bit 84 C 0 .
+bit 83 O ? LLCLK 84 0 Z
+bit 82 I ? LLCLK
+bit 81 C 0 .
+bit 80 O ? LFCLK 81 0 Z
+bit 79 I ? LFCLK
+bit 78 O ? POE
+bit 77 O ? PWE
+bit 76 O ? PIOR
+bit 75 O ? PIOW
+bit 74 O ? PSKTSEL
+bit 73 I ? IOIS16
+bit 72 I ? PWAIT
+bit 71 O ? PREG
+bit 70 O ? PCE2
+bit 69 O ? PCE1
+bit 68 C 1 .
+bit 67 O ? WE 68 1 Z
+bit 66 O ? OE 68 1 Z
+bit 65 O ? RAS(3) 68 1 Z
+bit 64 O ? RAS(2) 68 1 Z
+bit 63 O ? RAS(1) 68 1 Z
+bit 62 O ? RAS(0) 68 1 Z
+bit 61 O ? CAS(3) 68 1 Z
+bit 60 O ? CAS(2) 68 1 Z
+bit 59 O ? CAS(1) 68 1 Z
+bit 58 O ? CAS(0) 68 1 Z
+bit 57 O ? CS(3) 68 1 Z
+bit 56 O ? CS(2) 68 1 Z
+bit 55 O ? CS(1) 68 1 Z
+bit 54 O ? CS(0) 68 1 Z
+bit 53 O ? A(25) 68 1 Z
+bit 52 O ? A(24) 68 1 Z
+bit 51 O ? A(23) 68 1 Z
+bit 50 O ? A(22) 68 1 Z
+bit 49 O ? A(21) 68 1 Z
+bit 48 O ? A(20) 68 1 Z
+bit 47 O ? A(19) 68 1 Z
+bit 46 O ? A(18) 68 1 Z
+bit 45 O ? A(17) 68 1 Z
+bit 44 O ? A(16) 68 1 Z
+bit 43 O ? A(15) 68 1 Z
+bit 42 O ? A(14) 68 1 Z
+bit 41 O ? A(13) 68 1 Z
+bit 40 O ? A(12) 68 1 Z
+bit 39 O ? A(11) 68 1 Z
+bit 38 O ? A(10) 68 1 Z
+bit 37 O ? A(9) 68 1 Z
+bit 36 O ? A(8) 68 1 Z
+bit 35 O ? A(7) 68 1 Z
+bit 34 O ? A(6) 68 1 Z
+bit 33 O ? A(5) 68 1 Z
+bit 32 O ? A(4) 68 1 Z
+bit 31 O ? A(3) 68 1 Z
+bit 30 O ? A(2) 68 1 Z
+bit 29 O ? A(1) 68 1 Z
+bit 28 O ? A(0) 68 1 Z
+bit 27 C 1 .
+bit 26 O ? UDCN 27 1 Z
+bit 25 I ? UDCN
+bit 24 X ? .
+bit 23 C 1 .
+bit 22 O ? UDCP 23 1 Z
+bit 21 I ? UDCP
+bit 20 C 0 .
+bit 19 O ? RXD1 20 0 Z
+bit 18 I ? RXD1
+bit 17 C 0 .
+bit 16 O ? TXD1 17 0 Z
+bit 15 I ? TXD1
+bit 14 C 0 .
+bit 13 O ? RXD2 14 0 Z
+bit 12 I ? RXD2
+bit 11 C 0 .
+bit 10 O ? TXD2 11 0 Z
+bit 9 I ? TXD2
+bit 8 C 0 .
+bit 7 O ? RXD3 8 0 Z
+bit 6 I ? RXD3
+bit 5 C 0 .
+bit 4 O ? TXD3 5 0 Z
+bit 3 I ? TXD3
+bit 2 I ? RESET
+bit 1 O ? RESETO
+bit 0 I ? ROMSEL
--- /dev/null
+#
+# $Id$
+#
+# Copyright (C) 2002 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Asier Llano <a.llano@usyscom.com>, 2004.
+#
+# Documentation:
+# [1] Freescale, "Freescale MPC5200 Users Guide", Rev. 2, 08/2004
+# Order Number: MPC5200UG
+#
+
+# bits 27-12 of the Device Identification Register
+0000000000010001 mpc5200 mpc5200 # see 21.8.1.1 in [1]
--- /dev/null
+#
+# $Id$
+#
+# Copyright (C) 2002 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Asier Llano <a.llano@usyscom.com>, 2004.
+#
+# Documentation:
+# [1] Freescale, "Freescale MPC5200 Users Guide", Rev. 2, 08/2004
+# Order Number: MPC5200UG
+#
+
+# bits 31-28 of the Device Identification Register
+# see 21.8.1.1 in [1]
+0000 mpc5200 0
+0001 mpc5200 B
--- /dev/null
+#
+# $Id$
+#
+# Copyright (C) 2002 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Asier Llano <a.llano@usyscom.com>, 2004.
+#
+# Documentation:
+# [1] Freescale, "Freescale MPC5200 Users Guide", Rev. 2, 08/2004
+# Order Number: MPC5200UG
+# [2] Freescale, "MPC5200BSDL", Rev. 1.2,
+# Order Number: MPC5200BSDL
+#
+
+# see Table 2-1 in [1]
+signal TEST_MODE_0 B02
+signal TEST_MODE_1 A01
+signal TEST_SEL_0 B01
+signal TEST_SEL_1 C03
+signal RTC_XTAL_IN C02
+signal RTC_XTAL_OUT C01
+signal TIMER_2 D03
+signal TIMER_3 D02
+signal TIMER_4 D01
+signal TIMER_5 E03
+signal TIMER_6 E02
+signal TIMER_7 E01
+signal USB_9 F03
+signal USB_8 F02
+signal USB_7 F01
+signal USB_6 G04
+signal USB_5 G03
+signal USB_4 G02
+signal USB_3 G01
+signal USB_2 H03
+signal USB_1 H02
+signal USB_0 H01
+signal ETH_17 J04
+signal ETH_10 J03
+signal ETH_4 J02
+signal ETH_3 J01
+signal ETH_2 K03
+signal ETH_1 K02
+signal ETH_0 K01
+signal ETH_11 L04
+signal ETH_5 L03
+signal ETH_16 L02
+signal ETH_9 L01
+signal ETH_8 M03
+signal ETH_12 M02
+signal ETH_13 M01
+signal ETH_14 N04
+signal ETH_15 N03
+signal ETH_6 N02
+signal ETH_7 N01
+signal IRQ0 P03
+signal IRQ2 P02
+signal IRQ1 P01
+signal PCI_GNT_B R04
+signal EXT_AD_30 R03
+signal PCI_RESET_B R02
+signal IRQ3 R01
+signal EXT_AD_28 T03
+signal EXT_AD_26 T02
+signal PCI_CLOCK T01
+signal EXT_AD_24 U03
+signal PCI_IDSEL U02
+signal PCI_REQ_B U01
+signal EXT_AD_20 V02
+signal EXT_AD_31 V01
+signal EXT_AD_29 W01
+signal EXT_AD_27 Y01
+signal EXT_AD_25 W02
+signal PCI_CBE_3_B Y02
+signal EXT_AD_22 V03
+signal EXT_AD_23 W03
+signal EXT_AD_21 Y03
+signal EXT_AD_18 V04
+signal EXT_AD_16 W04
+signal EXT_AD_19 Y04
+signal PCI_FRAME_B V05
+signal PCI_TRDY_B W05
+signal EXT_AD_17 Y05
+signal PCI_STOP_B V06
+signal PCI_CBE_2_B W06
+signal PCI_IRDY_B Y06
+signal PCI_PAR V07
+signal PCI_DEVSEL_B W07
+signal PCI_PERR_B Y07
+signal EXT_AD_15 U08
+signal EXT_AD_13 V08
+signal PCI_SERR_B W08
+signal PCI_CBE_1_B Y08
+signal EXT_AD_11 V09
+signal EXT_AD_14 W09
+signal EXT_AD_12 Y09
+signal EXT_AD_9 V10
+signal PCI_CBE_0_B W10
+signal EXT_AD_10 Y10
+signal EXT_AD_6 U11
+signal EXT_AD_4 V11
+signal EXT_AD_8 W11
+signal EXT_AD_7 Y11
+signal EXT_AD_2 V12
+signal EXT_AD_5 W12
+signal EXT_AD_3 Y12
+signal EXT_AD_0 V13
+signal EXT_AD_1 W13
+signal LP_TS_B Y13
+signal LP_ACK U14
+signal LP_ALE_B V14
+signal LP_CS0_B W14
+signal LP_CS1_B Y14
+signal LP_CS2_B V15
+signal LP_CS3_B W15
+signal LP_CS4_B Y15
+signal LP_CS5_B V16
+signal LP_RW W16
+signal ATA_ISOLATION Y16
+signal ATA_DRQ V17
+signal ATA_IOW_B W17
+signal ATA_IOR_B Y17
+signal ATA_IOCHRDY W18
+signal ATA_DACK_B Y18
+signal ATA_INTRQ Y19
+signal TIMER_0 Y20
+signal I2C_1 W19
+signal I2C_3 W20
+signal TIMER_1 V18
+signal I2C_0 V19
+signal I2C_2 V20
+signal MEM_MDQ_31 U18
+signal MEM_MDQ_1 U19
+signal MEM_MDQ_0 U20
+signal MEM_MDQ_30 T18
+signal MEM_MDQ_3 T19
+signal MEM_MDQ_2 T20
+signal MEM_MDQ_28 R17
+signal MEM_MDQ_29 R18
+signal MEM_MDQ_5 R19
+signal MEM_MDQ_4 R20
+signal MEM_MDQ_27 P18
+signal MEM_MDQ_7 P19
+signal MEM_MDQ_6 P20
+signal MEM_MDQ_25 N17
+signal MEM_MDQ_26 N18
+signal MEM_DQM_0 N19
+signal MEM_MDQS_0 N20
+signal MEM_MDQ_24 M18
+signal MEM_MDQ_14 M19
+signal MEM_MDQ_15 M20
+signal MEM_DQM_3 L17
+signal MEM_MDQS_3 L18
+signal MEM_MDQ_12 L19
+signal MEM_MDQ_13 L20
+signal MEM_MDQ_23 K18
+signal MEM_MDQ_10 K19
+signal MEM_MDQ_11 K20
+signal MEM_MDQ_22 J17
+signal MEM_MDQ_21 J18
+signal MEM_MDQ_8 J19
+signal MEM_MDQ_9 J20
+signal MEM_MDQ_20 H18
+signal MEM_DQM_1 H19
+signal MEM_MDQS_1 H20
+signal MEM_MDQ_18 G17
+signal MEM_MDQ_19 G18
+signal MEM_CLK G19
+signal MEM_CLK_B G20 G19
+signal MEM_MDQ_17 F18
+signal MEM_MA_12 F19
+signal MEM_CLK_EN F20
+signal MEM_MDQ_16 E18
+signal MEM_MA_9 E19
+signal MEM_MA_11 E20
+signal MEM_MDQS_2 D18
+signal MEM_MA_7 D19
+signal MEM_MA_8 D20
+signal MEM_MA_6 C20
+signal MEM_MA_5 C19
+signal MEM_MA_4 B20
+signal MEM_DQM_2 A20
+signal MEM_CAS_B B19
+signal MEM_WE_B A19
+signal MEM_MBA_0 C18
+signal MEM_CS_0_B B18
+signal MEM_RAS_B A18
+signal MEM_MA_0 C17
+signal MEM_MA_10 B17
+signal MEM_MBA_1 A17
+signal MEM_MA_3 C16
+signal MEM_MA_2 B16
+signal MEM_MA_1 A16
+signal GPIO_WKUP_6 C15
+signal SYS_PLL_TPA B15
+signal SYS_XTAL_IN A15
+signal SYS_XTAL_OUT D14
+signal SYS_PLL_AVSS C14
+signal SYS_PLL_AVDD B14
+signal SRESET_B A14
+signal PSC6_3 C13
+signal HRESET_B B13
+signal PORRESET_B A13
+signal GPIO_WKUP_7 C12
+signal PSC6_0 B12
+signal PSC6_2 A12
+signal PSC6_1 C11
+signal PSC1_0 B11
+signal PSC1_1 A11
+signal PSC1_2 C10
+signal PSC1_3 B10
+signal PSC1_4 A10
+signal PSC2_0 C09
+signal PSC2_1 B09
+signal PSC2_2 A09
+signal LP_OE D08
+signal CORE_PLL_AVDD C08
+signal PSC2_3 B08
+signal PSC2_4 A08
+signal PSC3_0 C07
+signal PSC3_1 B07
+signal PSC3_2 A07
+signal PSC3_3 C06
+signal PSC3_4 B06
+signal PSC3_5 A06
+signal PSC3_6 C05
+signal PSC3_7 B05
+signal PSC3_8 A05
+signal PSC3_9 C04
+signal JTAG_TCK B04
+signal JTAG_TMS A04
+signal JTAG_TDI A03
+signal JTAG_TRST_B B03
+signal JTAG_TDO A02
+signal VDD_MEM_IO P17 M17 T17 K17 F17 E17 H17 D17 D15 D13 D12
+signal VDD_IO U16 U13 U10 U09 U06 U05 T04 F04 E04 H04 D09 D06
+signal VDD_CORE U15 U12 U07 P04 K04 M04 D10 D07 D05 D11
+signal VSS_IO_CORE D16
+
+
+register BSR 615
+register BR 1
+register DIR 32
+
+instruction length 6
+
+# see Table 21-2 in [1]
+
+# Mandatory instructions
+instruction IDCODE 011101 DIR
+instruction BYPASS 111111 BR
+instruction SAMPLE/PRELOAD 100000 BSR
+instruction EXTEST 000000 BSR
+
+# Optional instructions
+instruction CLAMP 100001 BR
+instruction HIGHZ 011111 BR
+
+
+# see [2]
+bit 614 I 1 PSC3_9
+bit 613 O 1 PSC3_9 612 1 Z
+bit 612 C 1 *
+bit 611 I 1 PSC3_8
+bit 610 O 1 PSC3_8 609 1 Z
+bit 609 C 1 *
+bit 608 I 1 PSC3_7
+bit 607 O 1 PSC3_7 606 1 Z
+bit 606 C 1 *
+bit 605 I 1 PSC3_6
+bit 604 O 1 PSC3_6 603 1 Z
+bit 603 C 1 *
+bit 602 I 1 PSC3_5
+bit 601 O 1 PSC3_5 600 1 Z
+bit 600 C 1 *
+bit 599 I 1 PSC3_4
+bit 598 O 1 PSC3_4 597 1 Z
+bit 597 C 1 *
+bit 596 I 1 PSC3_3
+bit 595 O 1 PSC3_3 594 1 Z
+bit 594 C 1 *
+bit 593 I 1 PSC3_2
+bit 592 O 1 PSC3_2 591 1 Z
+bit 591 C 1 *
+bit 590 I 1 PSC3_1
+bit 589 O 1 PSC3_1 588 1 Z
+bit 588 C 1 *
+bit 587 I 1 PSC3_0
+bit 586 O 1 PSC3_0 585 1 Z
+bit 585 C 1 *
+bit 584 I 1 PSC2_4
+bit 583 O 1 PSC2_4 582 1 Z
+bit 582 C 1 *
+bit 581 I 1 PSC2_3
+bit 580 O 1 PSC2_3 579 1 Z
+bit 579 C 1 *
+bit 578 I 1 LP_OE
+bit 577 O 1 LP_OE 576 1 Z
+bit 576 C 1 *
+bit 575 I 1 PSC2_2
+bit 574 O 1 PSC2_2 573 1 Z
+bit 573 C 1 *
+bit 572 I 1 PSC2_1
+bit 571 O 1 PSC2_1 570 1 Z
+bit 570 C 1 *
+bit 569 I 1 PSC2_0
+bit 568 O 1 PSC2_0 567 1 Z
+bit 567 C 1 *
+bit 566 I 1 PSC1_4
+bit 565 O 1 PSC1_4 564 1 Z
+bit 564 C 1 *
+bit 563 I 1 PSC1_3
+bit 562 O 1 PSC1_3 561 1 Z
+bit 561 C 1 *
+bit 560 I 1 PSC1_2
+bit 559 O 1 PSC1_2 558 1 Z
+bit 558 C 1 *
+bit 557 I 1 PSC1_1
+bit 556 O 1 PSC1_1 555 1 Z
+bit 555 C 1 *
+bit 554 I 1 PSC1_0
+bit 553 O 1 PSC1_0 552 1 Z
+bit 552 C 1 *
+bit 551 I 1 PSC6_1
+bit 550 O 1 PSC6_1 549 1 Z
+bit 549 C 1 *
+bit 548 I 1 PSC6_2
+bit 547 O 1 PSC6_2 546 1 Z
+bit 546 C 1 *
+bit 545 I 1 PSC6_0
+bit 544 O 1 PSC6_0 543 1 Z
+bit 543 C 1 *
+bit 542 I 1 GPIO_WKUP_7
+bit 541 O 1 GPIO_WKUP_7 540 1 Z
+bit 540 C 1 *
+bit 539 I 1 PORRESET_B
+bit 538 O 0 *
+bit 537 O 0 *
+bit 536 I 1 HRESET_B
+bit 535 O 1 HRESET_B 534 1 Z
+bit 534 C 1 *
+bit 533 I 1 PSC6_3
+bit 532 O 1 PSC6_3 531 1 Z
+bit 531 C 1 *
+bit 530 I 1 SRESET_B
+bit 529 O 1 SRESET_B 528 1 Z
+bit 528 C 1 *
+bit 527 I 1 SYS_PLL_TPA
+bit 526 O 1 SYS_PLL_TPA 525 1 Z
+bit 525 C 1 *
+bit 524 I 1 GPIO_WKUP_6
+bit 523 O 1 GPIO_WKUP_6 522 1 Z
+bit 522 C 1 *
+bit 521 I 1 MEM_MA_1
+bit 520 O 1 MEM_MA_1 519 1 Z
+bit 519 C 1 *
+bit 518 I 1 MEM_MA_2
+bit 517 O 1 MEM_MA_2 516 1 Z
+bit 516 C 1 *
+bit 515 I 1 MEM_MA_3
+bit 514 O 1 MEM_MA_3 513 1 Z
+bit 513 C 1 *
+bit 512 I 1 MEM_MBA_1
+bit 511 O 1 MEM_MBA_1 510 1 Z
+bit 510 C 1 *
+bit 509 I 1 MEM_MA_10
+bit 508 O 1 MEM_MA_10 507 1 Z
+bit 507 C 1 *
+bit 506 I 1 MEM_MA_0
+bit 505 O 1 MEM_MA_0 504 1 Z
+bit 504 C 1 *
+bit 503 I 1 MEM_RAS_B
+bit 502 O 1 MEM_RAS_B 501 1 Z
+bit 501 C 1 *
+bit 500 I 1 MEM_CS_0_B
+bit 499 O 1 MEM_CS_0_B 498 1 Z
+bit 498 C 1 *
+bit 497 I 1 MEM_MBA_0
+bit 496 O 1 MEM_MBA_0 495 1 Z
+bit 495 C 1 *
+bit 494 I 1 MEM_WE_B
+bit 493 O 1 MEM_WE_B 492 1 Z
+bit 492 C 1 *
+bit 491 I 1 MEM_CAS_B
+bit 490 O 1 MEM_CAS_B 489 1 Z
+bit 489 C 1 *
+bit 488 I 1 MEM_DQM_2
+bit 487 O 1 MEM_DQM_2 486 1 Z
+bit 486 C 1 *
+bit 485 I 1 MEM_MA_4
+bit 484 O 1 MEM_MA_4 483 1 Z
+bit 483 C 1 *
+bit 482 I 1 MEM_MA_5
+bit 481 O 1 MEM_MA_5 480 1 Z
+bit 480 C 1 *
+bit 479 I 1 MEM_MA_6
+bit 478 O 1 MEM_MA_6 477 1 Z
+bit 477 C 1 *
+bit 476 I 1 MEM_MA_8
+bit 475 O 1 MEM_MA_8 474 1 Z
+bit 474 C 1 *
+bit 473 I 1 MEM_MA_7
+bit 472 O 1 MEM_MA_7 471 1 Z
+bit 471 C 1 *
+bit 470 I 1 MEM_MDQS_2
+bit 469 O 1 MEM_MDQS_2 468 1 Z
+bit 468 C 1 *
+bit 467 I 1 MEM_MA_11
+bit 466 O 1 MEM_MA_11 465 1 Z
+bit 465 C 1 *
+bit 464 I 1 MEM_MA_9
+bit 463 O 1 MEM_MA_9 462 1 Z
+bit 462 C 1 *
+bit 461 I 1 MEM_MDQ_16
+bit 460 O 1 MEM_MDQ_16 459 1 Z
+bit 459 C 1 *
+bit 458 I 1 MEM_CLK_EN
+bit 457 O 1 MEM_CLK_EN 456 1 Z
+bit 456 C 1 *
+bit 455 I 1 MEM_MA_12
+bit 454 O 1 MEM_MA_12 453 1 Z
+bit 453 C 1 *
+bit 452 I 1 MEM_MDQ_17
+bit 451 O 1 MEM_MDQ_17 450 1 Z
+bit 450 C 1 *
+bit 449 I 1 MEM_CLK_B
+bit 448 O 1 MEM_CLK_B 447 1 Z
+bit 447 C 1 *
+bit 446 I 1 MEM_CLK
+bit 445 O 1 MEM_CLK 444 1 Z
+bit 444 C 1 *
+bit 443 I 1 MEM_MDQ_19
+bit 442 O 1 MEM_MDQ_19 441 1 Z
+bit 441 C 1 *
+bit 440 I 1 MEM_MDQ_18
+bit 439 O 1 MEM_MDQ_18 438 1 Z
+bit 438 C 1 *
+bit 437 I 1 MEM_MDQS_1
+bit 436 O 1 MEM_MDQS_1 435 1 Z
+bit 435 C 1 *
+bit 434 I 1 MEM_DQM_1
+bit 433 O 1 MEM_DQM_1 432 1 Z
+bit 432 C 1 *
+bit 431 I 1 MEM_MDQ_20
+bit 430 O 1 MEM_MDQ_20 429 1 Z
+bit 429 C 1 *
+bit 428 I 1 MEM_MDQ_9
+bit 427 O 1 MEM_MDQ_9 426 1 Z
+bit 426 C 1 *
+bit 425 I 1 MEM_MDQ_8
+bit 424 O 1 MEM_MDQ_8 423 1 Z
+bit 423 C 1 *
+bit 422 I 1 MEM_MDQ_21
+bit 421 O 1 MEM_MDQ_21 420 1 Z
+bit 420 C 1 *
+bit 419 I 1 MEM_MDQ_22
+bit 418 O 1 MEM_MDQ_22 417 1 Z
+bit 417 C 1 *
+bit 416 I 1 MEM_MDQ_11
+bit 415 O 1 MEM_MDQ_11 414 1 Z
+bit 414 C 1 *
+bit 413 I 1 MEM_MDQ_10
+bit 412 O 1 MEM_MDQ_10 411 1 Z
+bit 411 C 1 *
+bit 410 I 1 MEM_MDQ_23
+bit 409 O 1 MEM_MDQ_23 408 1 Z
+bit 408 C 1 *
+bit 407 I 1 MEM_MDQ_13
+bit 406 O 1 MEM_MDQ_13 405 1 Z
+bit 405 C 1 *
+bit 404 I 1 MEM_MDQ_12
+bit 403 O 1 MEM_MDQ_12 402 1 Z
+bit 402 C 1 *
+bit 401 I 1 MEM_MDQS_3
+bit 400 O 1 MEM_MDQS_3 399 1 Z
+bit 399 C 1 *
+bit 398 I 1 MEM_DQM_3
+bit 397 O 1 MEM_DQM_3 396 1 Z
+bit 396 C 1 *
+bit 395 I 1 MEM_MDQ_15
+bit 394 O 1 MEM_MDQ_15 393 1 Z
+bit 393 C 1 *
+bit 392 I 1 MEM_MDQ_14
+bit 391 O 1 MEM_MDQ_14 390 1 Z
+bit 390 C 1 *
+bit 389 I 1 MEM_MDQ_24
+bit 388 O 1 MEM_MDQ_24 387 1 Z
+bit 387 C 1 *
+bit 386 I 1 MEM_MDQS_0
+bit 385 O 1 MEM_MDQS_0 384 1 Z
+bit 384 C 1 *
+bit 383 I 1 MEM_DQM_0
+bit 382 O 1 MEM_DQM_0 381 1 Z
+bit 381 C 1 *
+bit 380 I 1 MEM_MDQ_26
+bit 379 O 1 MEM_MDQ_26 378 1 Z
+bit 378 C 1 *
+bit 377 I 1 MEM_MDQ_25
+bit 376 O 1 MEM_MDQ_25 375 1 Z
+bit 375 C 1 *
+bit 374 I 1 MEM_MDQ_6
+bit 373 O 1 MEM_MDQ_6 372 1 Z
+bit 372 C 1 *
+bit 371 I 1 MEM_MDQ_7
+bit 370 O 1 MEM_MDQ_7 369 1 Z
+bit 369 C 1 *
+bit 368 I 1 MEM_MDQ_27
+bit 367 O 1 MEM_MDQ_27 366 1 Z
+bit 366 C 1 *
+bit 365 I 1 MEM_MDQ_4
+bit 364 O 1 MEM_MDQ_4 363 1 Z
+bit 363 C 1 *
+bit 362 I 1 MEM_MDQ_5
+bit 361 O 1 MEM_MDQ_5 360 1 Z
+bit 360 C 1 *
+bit 359 I 1 MEM_MDQ_29
+bit 358 O 1 MEM_MDQ_29 357 1 Z
+bit 357 C 1 *
+bit 356 I 1 MEM_MDQ_28
+bit 355 O 1 MEM_MDQ_28 354 1 Z
+bit 354 C 1 *
+bit 353 I 1 MEM_MDQ_2
+bit 352 O 1 MEM_MDQ_2 351 1 Z
+bit 351 C 1 *
+bit 350 I 1 MEM_MDQ_3
+bit 349 O 1 MEM_MDQ_3 348 1 Z
+bit 348 C 1 *
+bit 347 I 1 MEM_MDQ_30
+bit 346 O 1 MEM_MDQ_30 345 1 Z
+bit 345 C 1 *
+bit 344 I 1 MEM_MDQ_0
+bit 343 O 1 MEM_MDQ_0 342 1 Z
+bit 342 C 1 *
+bit 341 I 1 MEM_MDQ_1
+bit 340 O 1 MEM_MDQ_1 339 1 Z
+bit 339 C 1 *
+bit 338 I 1 MEM_MDQ_31
+bit 337 O 1 MEM_MDQ_31 336 1 Z
+bit 336 C 1 *
+bit 335 I 1 I2C_2
+bit 334 O 1 I2C_2 333 1 Z
+bit 333 C 1 *
+bit 332 I 1 I2C_0
+bit 331 O 1 I2C_0 330 1 Z
+bit 330 C 1 *
+bit 329 I 1 TIMER_1
+bit 328 O 1 TIMER_1 327 1 Z
+bit 327 C 1 *
+bit 326 I 1 I2C_3
+bit 325 O 1 I2C_3 324 1 Z
+bit 324 C 1 *
+bit 323 I 1 I2C_1
+bit 322 O 1 I2C_1 321 1 Z
+bit 321 C 1 *
+bit 320 I 1 TIMER_0
+bit 319 O 1 TIMER_0 318 1 Z
+bit 318 C 1 *
+bit 317 I 1 ATA_INTRQ
+bit 316 O 1 ATA_INTRQ 315 1 Z
+bit 315 C 1 *
+bit 314 I 1 ATA_DACK_B
+bit 313 O 1 ATA_DACK_B 312 1 Z
+bit 312 C 1 *
+bit 311 I 1 ATA_IOCHRDY
+bit 310 O 1 ATA_IOCHRDY 309 1 Z
+bit 309 C 1 *
+bit 308 I 1 ATA_IOR_B
+bit 307 O 1 ATA_IOR_B 306 1 Z
+bit 306 C 1 *
+bit 305 I 1 ATA_IOW_B
+bit 304 O 1 ATA_IOW_B 303 1 Z
+bit 303 C 1 *
+bit 302 I 1 ATA_DRQ
+bit 301 O 1 ATA_DRQ 300 1 Z
+bit 300 C 1 *
+bit 299 I 1 ATA_ISOLATION
+bit 298 O 1 ATA_ISOLATION 297 1 Z
+bit 297 C 1 *
+bit 296 I 1 LP_RW
+bit 295 O 1 LP_RW 294 1 Z
+bit 294 C 1 *
+bit 293 I 1 LP_CS5_B
+bit 292 O 1 LP_CS5_B 291 1 Z
+bit 291 C 1 *
+bit 290 I 1 LP_CS4_B
+bit 289 O 1 LP_CS4_B 288 1 Z
+bit 288 C 1 *
+bit 287 I 1 LP_CS3_B
+bit 286 O 1 LP_CS3_B 285 1 Z
+bit 285 C 1 *
+bit 284 I 1 LP_CS2_B
+bit 283 O 1 LP_CS2_B 282 1 Z
+bit 282 C 1 *
+bit 281 I 1 LP_CS1_B
+bit 280 O 1 LP_CS1_B 279 1 Z
+bit 279 C 1 *
+bit 278 I 1 LP_CS0_B
+bit 277 O 1 LP_CS0_B 276 1 Z
+bit 276 C 1 *
+bit 275 I 1 LP_ALE_B
+bit 274 O 1 LP_ALE_B 273 1 Z
+bit 273 C 1 *
+bit 272 I 1 LP_ACK
+bit 271 O 1 LP_ACK 270 1 Z
+bit 270 C 1 *
+bit 269 I 1 LP_TS_B
+bit 268 O 1 LP_TS_B 267 1 Z
+bit 267 C 1 *
+bit 266 I 1 EXT_AD_1
+bit 265 O 1 EXT_AD_1 264 1 Z
+bit 264 C 1 *
+bit 263 I 1 EXT_AD_0
+bit 262 O 1 EXT_AD_0 261 1 Z
+bit 261 C 1 *
+bit 260 I 1 EXT_AD_3
+bit 259 O 1 EXT_AD_3 258 1 Z
+bit 258 C 1 *
+bit 257 I 1 EXT_AD_5
+bit 256 O 1 EXT_AD_5 255 1 Z
+bit 255 C 1 *
+bit 254 I 1 EXT_AD_2
+bit 253 O 1 EXT_AD_2 252 1 Z
+bit 252 C 1 *
+bit 251 I 1 EXT_AD_7
+bit 250 O 1 EXT_AD_7 249 1 Z
+bit 249 C 1 *
+bit 248 I 1 EXT_AD_8
+bit 247 O 1 EXT_AD_8 246 1 Z
+bit 246 C 1 *
+bit 245 I 1 EXT_AD_4
+bit 244 O 1 EXT_AD_4 243 1 Z
+bit 243 C 1 *
+bit 242 I 1 EXT_AD_6
+bit 241 O 1 EXT_AD_6 240 1 Z
+bit 240 C 1 *
+bit 239 I 1 EXT_AD_10
+bit 238 O 1 EXT_AD_10 237 1 Z
+bit 237 C 1 *
+bit 236 I 1 PCI_CBE_0_B
+bit 235 O 1 PCI_CBE_0_B 234 1 Z
+bit 234 C 1 *
+bit 233 I 1 EXT_AD_9
+bit 232 O 1 EXT_AD_9 231 1 Z
+bit 231 C 1 *
+bit 230 I 1 EXT_AD_12
+bit 229 O 1 EXT_AD_12 228 1 Z
+bit 228 C 1 *
+bit 227 I 1 EXT_AD_14
+bit 226 O 1 EXT_AD_14 225 1 Z
+bit 225 C 1 *
+bit 224 I 1 EXT_AD_11
+bit 223 O 1 EXT_AD_11 222 1 Z
+bit 222 C 1 *
+bit 221 I 1 PCI_CBE_1_B
+bit 220 O 1 PCI_CBE_1_B 219 1 Z
+bit 219 C 1 *
+bit 218 I 1 PCI_SERR_B
+bit 217 O 1 PCI_SERR_B 216 1 Z
+bit 216 C 1 *
+bit 215 I 1 EXT_AD_13
+bit 214 O 1 EXT_AD_13 213 1 Z
+bit 213 C 1 *
+bit 212 I 1 EXT_AD_15
+bit 211 O 1 EXT_AD_15 210 1 Z
+bit 210 C 1 *
+bit 209 I 1 PCI_PERR_B
+bit 208 O 1 PCI_PERR_B 207 1 Z
+bit 207 C 1 *
+bit 206 I 1 PCI_DEVSEL_B
+bit 205 O 1 PCI_DEVSEL_B 204 1 Z
+bit 204 C 1 *
+bit 203 I 1 PCI_PAR
+bit 202 O 1 PCI_PAR 201 1 Z
+bit 201 C 1 *
+bit 200 I 1 PCI_IRDY_B
+bit 199 O 1 PCI_IRDY_B 198 1 Z
+bit 198 C 1 *
+bit 197 I 1 PCI_CBE_2_B
+bit 196 O 1 PCI_CBE_2_B 195 1 Z
+bit 195 C 1 *
+bit 194 I 1 PCI_STOP_B
+bit 193 O 1 PCI_STOP_B 192 1 Z
+bit 192 C 1 *
+bit 191 I 1 EXT_AD_17
+bit 190 O 1 EXT_AD_17 189 1 Z
+bit 189 C 1 *
+bit 188 I 1 PCI_TRDY_B
+bit 187 O 1 PCI_TRDY_B 186 1 Z
+bit 186 C 1 *
+bit 185 I 1 PCI_FRAME_B
+bit 184 O 1 PCI_FRAME_B 183 1 Z
+bit 183 C 1 *
+bit 182 I 1 EXT_AD_19
+bit 181 O 1 EXT_AD_19 180 1 Z
+bit 180 C 1 *
+bit 179 I 1 EXT_AD_16
+bit 178 O 1 EXT_AD_16 177 1 Z
+bit 177 C 1 *
+bit 176 I 1 EXT_AD_18
+bit 175 O 1 EXT_AD_18 174 1 Z
+bit 174 C 1 *
+bit 173 I 1 EXT_AD_21
+bit 172 O 1 EXT_AD_21 171 1 Z
+bit 171 C 1 *
+bit 170 I 1 EXT_AD_23
+bit 169 O 1 EXT_AD_23 168 1 Z
+bit 168 C 1 *
+bit 167 I 1 EXT_AD_22
+bit 166 O 1 EXT_AD_22 165 1 Z
+bit 165 C 1 *
+bit 164 I 1 PCI_CBE_3_B
+bit 163 O 1 PCI_CBE_3_B 162 1 Z
+bit 162 C 1 *
+bit 161 I 1 EXT_AD_25
+bit 160 O 1 EXT_AD_25 159 1 Z
+bit 159 C 1 *
+bit 158 I 1 EXT_AD_27
+bit 157 O 1 EXT_AD_27 156 1 Z
+bit 156 C 1 *
+bit 155 I 1 EXT_AD_29
+bit 154 O 1 EXT_AD_29 153 1 Z
+bit 153 C 1 *
+bit 152 I 1 EXT_AD_31
+bit 151 O 1 EXT_AD_31 150 1 Z
+bit 150 C 1 *
+bit 149 I 1 EXT_AD_20
+bit 148 O 1 EXT_AD_20 147 1 Z
+bit 147 C 1 *
+bit 146 I 1 PCI_REQ_B
+bit 145 O 1 PCI_REQ_B 144 1 Z
+bit 144 C 1 *
+bit 143 I 1 PCI_IDSEL
+bit 142 O 1 PCI_IDSEL 141 1 Z
+bit 141 C 1 *
+bit 140 I 1 EXT_AD_24
+bit 139 O 1 EXT_AD_24 138 1 Z
+bit 138 C 1 *
+bit 137 I 1 PCI_CLOCK
+bit 136 O 1 PCI_CLOCK 135 1 Z
+bit 135 C 1 *
+bit 134 I 1 EXT_AD_26
+bit 133 O 1 EXT_AD_26 132 1 Z
+bit 132 C 1 *
+bit 131 I 1 EXT_AD_28
+bit 130 O 1 EXT_AD_28 129 1 Z
+bit 129 C 1 *
+bit 128 I 1 IRQ3
+bit 127 O 1 IRQ3 126 1 Z
+bit 126 C 1 *
+bit 125 I 1 PCI_RESET_B
+bit 124 O 1 PCI_RESET_B 123 1 Z
+bit 123 C 1 *
+bit 122 I 1 EXT_AD_30
+bit 121 O 1 EXT_AD_30 120 1 Z
+bit 120 C 1 *
+bit 119 I 1 PCI_GNT_B
+bit 118 O 1 PCI_GNT_B 117 1 Z
+bit 117 C 1 *
+bit 116 I 1 IRQ1
+bit 115 O 1 IRQ1 114 1 Z
+bit 114 C 1 *
+bit 113 I 1 IRQ2
+bit 112 O 1 IRQ2 111 1 Z
+bit 111 C 1 *
+bit 110 I 1 IRQ0
+bit 109 O 1 IRQ0 108 1 Z
+bit 108 C 1 *
+bit 107 I 1 ETH_7
+bit 106 O 1 ETH_7 105 1 Z
+bit 105 C 1 *
+bit 104 I 1 ETH_6
+bit 103 O 1 ETH_6 102 1 Z
+bit 102 C 1 *
+bit 101 I 1 ETH_15
+bit 100 O 1 ETH_15 99 1 Z
+bit 99 C 1 *
+bit 98 I 1 ETH_14
+bit 97 O 1 ETH_14 96 1 Z
+bit 96 C 1 *
+bit 95 I 1 ETH_13
+bit 94 O 1 ETH_13 93 1 Z
+bit 93 C 1 *
+bit 92 I 1 ETH_12
+bit 91 O 1 ETH_12 90 1 Z
+bit 90 C 1 *
+bit 89 I 1 ETH_8
+bit 88 O 1 ETH_8 87 1 Z
+bit 87 C 1 *
+bit 86 I 1 ETH_9
+bit 85 O 1 ETH_9 84 1 Z
+bit 84 C 1 *
+bit 83 I 1 ETH_16
+bit 82 O 1 ETH_16 81 1 Z
+bit 81 C 1 *
+bit 80 I 1 ETH_5
+bit 79 O 1 ETH_5 78 1 Z
+bit 78 C 1 *
+bit 77 I 1 ETH_11
+bit 76 O 1 ETH_11 75 1 Z
+bit 75 C 1 *
+bit 74 I 1 ETH_0
+bit 73 O 1 ETH_0 72 1 Z
+bit 72 C 1 *
+bit 71 I 1 ETH_1
+bit 70 O 1 ETH_1 69 1 Z
+bit 69 C 1 *
+bit 68 I 1 ETH_2
+bit 67 O 1 ETH_2 66 1 Z
+bit 66 C 1 *
+bit 65 I 1 ETH_3
+bit 64 O 1 ETH_3 63 1 Z
+bit 63 C 1 *
+bit 62 I 1 ETH_4
+bit 61 O 1 ETH_4 60 1 Z
+bit 60 C 1 *
+bit 59 I 1 ETH_10
+bit 58 O 1 ETH_10 57 1 Z
+bit 57 C 1 *
+bit 56 I 1 ETH_17
+bit 55 O 1 ETH_17 54 1 Z
+bit 54 C 1 *
+bit 53 I 1 USB_0
+bit 52 O 1 USB_0 51 1 Z
+bit 51 C 1 *
+bit 50 I 1 USB_1
+bit 49 O 1 USB_1 48 1 Z
+bit 48 C 1 *
+bit 47 I 1 USB_2
+bit 46 O 1 USB_2 45 1 Z
+bit 45 C 1 *
+bit 44 I 1 USB_3
+bit 43 O 1 USB_3 42 1 Z
+bit 42 C 1 *
+bit 41 I 1 USB_4
+bit 40 O 1 USB_4 39 1 Z
+bit 39 C 1 *
+bit 38 I 1 USB_5
+bit 37 O 1 USB_5 36 1 Z
+bit 36 C 1 *
+bit 35 I 1 USB_6
+bit 34 O 1 USB_6 33 1 Z
+bit 33 C 1 *
+bit 32 I 1 USB_7
+bit 31 O 1 USB_7 30 1 Z
+bit 30 C 1 *
+bit 29 I 1 USB_8
+bit 28 O 1 USB_8 27 1 Z
+bit 27 C 1 *
+bit 26 I 1 USB_9
+bit 25 O 1 USB_9 24 1 Z
+bit 24 C 1 *
+bit 23 I 1 TIMER_7
+bit 22 O 1 TIMER_7 21 1 Z
+bit 21 C 1 *
+bit 20 I 1 TIMER_6
+bit 19 O 1 TIMER_6 18 1 Z
+bit 18 C 1 *
+bit 17 I 1 TIMER_5
+bit 16 O 1 TIMER_5 15 1 Z
+bit 15 C 1 *
+bit 14 I 1 TIMER_4
+bit 13 O 1 TIMER_4 12 1 Z
+bit 12 C 1 *
+bit 11 I 1 TIMER_3
+bit 10 O 1 TIMER_3 9 1 Z
+bit 9 C 1 *
+bit 8 I 1 TIMER_2
+bit 7 O 1 TIMER_2 6 1 Z
+bit 6 C 1 *
+bit 5 I 1 TEST_SEL_1
+bit 4 O 1 TEST_SEL_1 3 1 Z
+bit 3 C 1 *
+bit 2 I 1 TEST_SEL_0
+bit 1 O 1 TEST_SEL_0 0 1 Z
+bit 0 C 1 *
+
+initbus mpc5200
--- /dev/null
+#
+# $Id$
+#
+# Copyright (C) 2003 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Matan Ziv-Av <matan@svgalib.org>, 2003.
+#
+
+# bits 27-12 of the Device Identification Register
+0000000000000001 ar7300 AR7300
+0000000001000010 sh7727 SH7727
+0111010101101110 sh7727 SH7727
--- /dev/null
+#
+# $Id$
+#
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+#
+
+# bits 31-28 of the Device Identification Register
+0000 ar7300 0
--- /dev/null
+#
+# $Id$
+
+register BR 1
+register BSR 1
+register DIR 32
+register EJIMPCODE 32
+register EJADDRESS 32
+register EJDATA 32
+register EJCONTROL 32
+register EJALL 96
+register EJFASTDATA 33
+
+instruction length 5
+
+instruction BYPASS 11111 BR
+instruction SAMPLE/PRELOAD 00010 BSR
+instruction IDCODE 00001 DIR
+instruction EJTAG_IMPCODE 00011 EJIMPCODE
+instruction EJTAG_ADDRESS 01000 EJADDRESS
+instruction EJTAG_DATA 01001 EJDATA
+instruction EJTAG_CONTROL 01010 EJCONTROL
+instruction EJTAG_ALL 01011 EJALL
+instruction EJTAGBOOT 01100 BR
+instruction NORMALBOOT 01101 BR
+instruction EJTAG_FASTDATA 01110 EJFASTDATA
+
+initbus ejtag
+endian big
--- /dev/null
+#
+# $Id$
+#
+# JTAG declarations for Hitachi HD64465BP/HD64465BQ
+# Copyright (C) 2003 Elcom s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Marcel Telka <marcel@telka.sk>, 2003.
+#
+# Documentation:
+# [1] Hitachi Ltd., "Windows CE Intelligent Peripheral Controller
+# HD64465 User's Manual", 03/08/01, Rev. 3.0, ADE-602-168B
+#
+
+# Test Mode (see Table 4.3 in [1])
+signal TST
+signal TDI
+signal TDO
+signal TMS
+signal TCK
+signal TRST
+
+# CPU interface (see Table 4.4 in [1])
+signal CKIO
+signal A0
+signal A1
+signal A2
+signal A3
+signal A4
+signal A5
+signal A6
+signal A7
+signal A8
+signal A9
+signal A10
+signal A11
+signal A12
+signal A13
+signal A14
+signal A15
+signal A16
+signal A17
+signal A18
+signal A19
+signal A20
+signal A21
+signal A22
+signal A23
+signal A24
+signal A25
+signal D0
+signal D1
+signal D2
+signal D3
+signal D4
+signal D5
+signal D6
+signal D7
+signal D8
+signal D9
+signal D10
+signal D11
+signal D12
+signal D13
+signal D14
+signal D15
+signal D16
+signal D17
+signal D18
+signal D19
+signal D20
+signal D21
+signal D22
+signal D23
+signal D24
+signal D25
+signal D26
+signal D27
+signal D28
+signal D29
+signal D30
+signal D31
+signal nCS4
+signal nWE0
+signal nWE1
+signal nWE2
+signal nWE3
+signal nRDWR
+signal nRD
+signal nRDY
+signal nBS
+signal nDREQ0
+signal nDREQ1
+signal DRAK0
+signal DRAK1
+signal nIRQ0
+signal SH_MODE
+signal nCE1B
+signal nCE2B
+signal nCE1A
+signal nCE2A
+signal nIOIS16
+
+# PCMCIA 0 (see Table 4.5 in [1])
+signal PCC0A0
+signal PCC0A1
+signal PCC0A2
+signal PCC0A3
+signal PCC0A4
+signal PCC0A5
+signal PCC0A6
+signal PCC0A7
+signal PCC0A8
+signal PCC0A9
+signal PCC0A10
+signal PCC0A11
+signal PCC0A12
+signal PCC0A13
+signal PCC0A14
+signal PCC0A15
+signal PCC0A16
+signal PCC0A17
+signal PCC0A18
+signal PCC0A19
+signal PCC0A20
+signal PCC0A21
+signal PCC0A22
+signal PCC0A23
+signal PCC0A24
+signal PCC0A25
+signal PCC0D0
+signal PCC0D1
+signal PCC0D2
+signal PCC0D3
+signal PCC0D4
+signal PCC0D5
+signal PCC0D6
+signal PCC0D7
+signal PCC0D8
+signal PCC0D9
+signal PCC0D10
+signal PCC0D11
+signal PCC0D12
+signal PCC0D13
+signal PCC0D14
+signal PCC0D15
+signal nPCC0CE1B
+signal nPCC0CE2B
+signal nRDB
+signal nWEB
+signal nPCC0ICIORDB
+signal nPCC0ICIOWRB
+signal PCC0RESET
+signal nPCC0WAIT
+signal nPCC0WP
+signal PCC0RDY
+signal PCC0BVD1
+signal PCC0BVD2
+signal nPCC0CD1
+signal nPCC0CD2
+signal nPCC0VS1
+signal nPCC0VS2
+signal nPCC0REG
+signal VCC0SEL1
+signal VCC0SEL0
+signal VCC0VPP1
+signal VCC0VPP0
+
+# PCMCIA 1 (see Table 4.6 in [1])
+signal PCC1A0
+signal PCC1A1
+signal PCC1A2
+signal PCC1A3
+signal PCC1A4
+signal PCC1A5
+signal PCC1A6
+signal PCC1A7
+signal PCC1A8
+signal PCC1A9
+signal PCC1A10
+signal PCC1A11
+signal PCC1A12
+signal PCC1A13
+signal PCC1A14
+signal PCC1A15
+signal PCC1A16
+signal PCC1A17
+signal PCC1A18
+signal PCC1A19
+signal PCC1A20
+signal PCC1A21
+signal PCC1A22
+signal PCC1A23
+signal PCC1A24
+signal PCC1A25
+signal PCC1D0
+signal PCC1D1
+signal PCC1D2
+signal PCC1D3
+signal PCC1D4
+signal PCC1D5
+signal PCC1D6
+signal PCC1D7
+signal PCC1D8
+signal PCC1D9
+signal PCC1D10
+signal PCC1D11
+signal PCC1D12
+signal PCC1D13
+signal PCC1D14
+signal PCC1D15
+signal nPCC1CE1A
+signal nPCC1CE2A
+signal nRDA
+signal nWEA
+signal nPCC1ICIORDA
+signal nPCC1ICIOWRA
+signal PCC1RESET
+signal nPCC1WAIT
+signal nPCC1WP
+signal PCC1RDY
+signal PCC1BVD1
+signal PCC1BVD2
+signal nPCC1CD1
+signal nPCC1CD2
+signal nPCC1VS1
+signal nPCC1VS2
+signal nPCC1REG
+signal VCC1SEL1
+signal VCC1SEL0
+signal VCC1VPP1
+signal VCC1VPP0
+
+# UART 0 (see Table 4.7 in [1])
+signal TXD0
+signal RXD0
+signal nRTS0
+signal nCTS0
+signal nDTR0
+signal nDSR0
+signal nDCD0
+signal nRI0
+
+# IrDA (see Table 4.8 in [1])
+signal MODSEL
+signal TXD
+signal nRX
+
+# Printer Interface (see Table 4.9 in [1])
+signal nSTB
+signal nAFD
+signal nERR
+signal nINIT
+signal nSLIN
+signal nACK
+signal BUSY
+signal PE
+signal SLCT
+signal PPD0
+signal PPD1
+signal PPD2
+signal PPD3
+signal PPD4
+signal PPD5
+signal PPD6
+signal PPD7
+
+# AFE Interface (see Table 4.10 in [1])
+signal DOUT
+signal DIN
+signal SCLK
+signal HC1
+signal FS
+signal nAFERST
+signal nAFEPDN
+signal MCLKO
+signal OFFHOOK
+signal RING
+
+# CODEC Interface (see Table 4.11 in [1])
+signal ACCLK
+signal nACRST
+signal nACPD
+signal SIBDIN
+signal SIBCLK
+signal SIBDOUT
+signal SIBSYNC
+
+# USB Interface (see Table 4.12 in [1])
+signal nUSBPEN
+signal nUSBOVR
+signal USBD1P
+signal USBD1M
+signal USBD2P
+signal USBD2M
+
+# Keyboard Interface (see Table 4.13 in [1])
+signal nKBCS
+signal nXIOW
+signal nXIOR
+signal KBIRQ0
+signal KBIRQ1
+
+# IO Port A (see Table 4.14 in [1])
+signal PA0
+signal PA1
+signal PA2
+signal PA3
+signal PA4
+signal PA5
+signal PA6
+signal PA7
+
+# IO Port B (see Table 4.15 in [1])
+signal PB0
+signal PB1
+signal PB2
+signal PB3
+signal PB4
+signal PB5
+signal PB6
+signal PB7
+
+# IO Port C (see Table 4.16 in [1])
+signal PC0
+signal PC1
+signal PC2
+signal PC3
+signal PC4
+signal PC5
+signal PC6
+signal PC7
+
+# IO Port D (see Table 4.17 in [1])
+signal PD0
+signal PD1
+signal PD2
+signal PD3
+signal PD4
+signal PD5
+signal PD6
+signal PD7
+
+# IO Port E (see Table 4.18 in [1])
+signal PE0
+signal PE1
+signal PE2
+signal PE3
+signal PE4
+signal PE5
+signal PE6
+signal PE7
+
+# 10-bit ADC Interface (see Table 4.19 in [1])
+signal TSMX
+signal TSMY
+signal TSPX
+signal TSPY
+
+# PS/2 Interface (see Table 4.20 in [1])
+signal KBCK
+signal KBDATA
+signal MSCK
+signal MSDATA
+
+# System Reset Interface (see Table 4.21 in [1])
+signal nRESETPI
+signal nRESETMI
+signal nRESETPO
+signal nRESETMO
+
+# Crystal Interface (see Table 4.22 in [1])
+signal AFECK
+signal AFECKE
+signal UCK
+signal UCKE
+
+# Miscellaneous Interface (see Table 4.23 in [1])
+signal PWM0
+signal PWM1
+signal P80LE
+
+# No Connected Pins (see Table 4.24 in [1])
+signal NC(1)
+signal NC(2)
+signal NC(3)
+signal NC(4)
+signal NC(5)
+signal NC(6)
+signal NC(7)
+signal NC(8)
+signal NC(9)
+signal NC(10)
+signal NC(11)
+signal NC(12)
+signal NC(13)
+signal NC(14)
+
+# Power/Ground (see Tabe 4.25 in [1])
+signal VSS
+signal VCC
+signal VCC5
+signal VCCA
+signal VCCB
+signal AVCC1
+signal AVSS1
+signal AVCC2
+signal AVSS2
+signal AVCC3
+signal AVSS3
+signal AVCC4
+signal AVSS4
+signal AVCC5
+signal AVCC6
+signal AVSS6
+
+# mandatory data registers
+register BSR 550
+register BR 1
+
+# instructions
+instruction length 3
+# mandatory instructions
+instruction BYPASS 111 BR
+instruction EXTEST 000 BSR
+instruction SAMPLE/PRELOAD 001 BSR
+
+# boundary scan register
+bit 549 I ? nBS
+bit 548 I ? RING
+bit 547 I ? FS
+bit 546 I ? SCLK
+bit 545 I ? DIN
+bit 544 O ? nAFERST
+bit 543 O ? nAFEPDN
+bit 542 O ? HC1 541 0 Z
+bit 541 C 0 .
+bit 540 O ? OFFHOOK 541 0 Z
+bit 539 O ? MCLKO 541 0 Z
+bit 538 O ? DOUT 541 0 Z
+bit 537 O ? PA0 535 0 Z
+bit 536 I ? PA0
+bit 535 C 0 .
+bit 534 O ? PA1 532 0 Z
+bit 533 I ? PA1
+bit 532 C 0 .
+bit 531 O ? PA2 529 0 Z
+bit 530 I ? PA2
+bit 529 C 0 .
+bit 528 O ? PA3 526 0 Z
+bit 527 I ? PA3
+bit 526 C 0 .
+bit 525 O ? PA4 523 0 Z
+bit 524 I ? PA4
+bit 523 C 0 .
+bit 522 O ? PA5 520 0 Z
+bit 521 I ? PA5
+bit 520 C 0 .
+bit 519 O ? PA6 517 0 Z
+bit 518 I ? PA6
+bit 517 C 0 .
+bit 516 O ? PA7 514 0 Z
+bit 515 I ? PA7
+bit 514 C 0 .
+bit 513 O ? nXIOW
+bit 512 O ? nXIOR
+bit 511 O ? nKBCS
+bit 510 I ? KBIRQ0
+bit 509 I ? KBIRQ1
+bit 508 O ? P80LE
+bit 507 I ? CKIO
+bit 506 I ? nRESETPI
+bit 505 I ? SH_MODE
+bit 504 I ? A12
+bit 503 I ? A11
+bit 502 I ? A10
+bit 501 I ? A9
+bit 500 I ? A8
+bit 499 I ? A7
+bit 498 I ? A6
+bit 497 I ? A5
+bit 496 I ? A4
+bit 495 I ? A3
+bit 494 I ? A2
+bit 493 I ? A1
+bit 492 I ? A0
+bit 491 O ? D31 489 0 Z
+bit 490 I ? D31
+bit 489 C 0 .
+bit 488 O ? D30 489 0 Z
+bit 487 I ? D30
+bit 486 O ? D29 489 0 Z
+bit 485 I ? D29
+bit 484 O ? D28 489 0 Z
+bit 483 I ? D28
+bit 482 O ? D27 489 0 Z
+bit 481 I ? D27
+bit 480 O ? D26 489 0 Z
+bit 479 I ? D26
+bit 478 O ? D25 489 0 Z
+bit 477 I ? D25
+bit 476 O ? D24 489 0 Z
+bit 475 I ? D24
+bit 474 O ? D15 472 0 Z
+bit 473 I ? D15
+bit 472 C 0 .
+bit 471 O ? D14 472 0 Z
+bit 470 I ? D14
+bit 469 O ? D13 472 0 Z
+bit 468 I ? D13
+bit 467 O ? D12 472 0 Z
+bit 466 I ? D12
+bit 465 O ? D11 472 0 Z
+bit 464 I ? D11
+bit 463 O ? D10 472 0 Z
+bit 462 I ? D10
+bit 461 O ? D9 472 0 Z
+bit 460 I ? D9
+bit 459 O ? D8 472 0 Z
+bit 458 I ? D8
+bit 457 O ? D23 455 0 Z
+bit 456 I ? D23
+bit 455 C 0 .
+bit 454 O ? D22 455 0 Z
+bit 453 I ? D22
+bit 452 O ? D21 455 0 Z
+bit 451 I ? D21
+bit 450 O ? D20 455 0 Z
+bit 449 I ? D20
+bit 448 O ? D19 455 0 Z
+bit 447 I ? D19
+bit 446 O ? D18 455 0 Z
+bit 445 I ? D18
+bit 444 O ? D17 455 0 Z
+bit 443 I ? D17
+bit 442 O ? D16 455 0 Z
+bit 441 I ? D16
+bit 440 O ? D7 438 0 Z
+bit 439 I ? D7
+bit 438 C 0 .
+bit 437 O ? D6 438 0 Z
+bit 436 I ? D6
+bit 435 O ? D5 438 0 Z
+bit 434 I ? D5
+bit 433 O ? D4 438 0 Z
+bit 432 I ? D4
+bit 431 O ? D3 438 0 Z
+bit 430 I ? D3
+bit 429 O ? D2 438 0 Z
+bit 428 I ? D2
+bit 427 O ? D1 438 0 Z
+bit 426 I ? D1
+bit 425 O ? D0 438 0 Z
+bit 424 I ? D0
+bit 423 O ? nIRQ0
+bit 422 O ? nRDY 421 0 Z
+bit 421 C 0 .
+bit 420 I ? DRAK1
+bit 419 O ? nDREQ1
+bit 418 I ? DRAK0
+bit 417 O ? nDREQ0
+bit 416 I ? A13
+bit 415 I ? A14
+bit 414 I ? A15
+bit 413 I ? A16
+bit 412 I ? A17
+bit 411 I ? A18
+bit 410 I ? A19
+bit 409 I ? A20
+bit 408 I ? A21
+bit 407 I ? A22
+bit 406 I ? A23
+bit 405 I ? A24
+bit 404 I ? A25
+bit 403 I ? nCS4
+bit 402 I ? nRDWR
+bit 401 I ? nRD
+bit 400 I ? nWE0
+bit 399 I ? nWE1
+bit 398 I ? nWE2
+bit 397 I ? nWE3
+bit 396 I ? nCE2A
+bit 395 I ? nCE1A
+bit 394 I ? nCE2B
+bit 393 I ? nCE1B
+bit 392 O ? nIOIS16 391 0 Z
+bit 391 C 0 .
+bit 390 O ? VCC0SEL1
+bit 389 O ? VCC0SEL0
+bit 388 O ? VCC0VPP1
+bit 387 O ? VCC0VPP0
+bit 386 I ? nPCC0CD2
+bit 385 I ? nPCC0CD1
+bit 384 I ? nPCC0VS2
+bit 383 I ? nPCC0VS1
+bit 382 I ? PCC0BVD2
+bit 381 I ? PCC0BVD1
+bit 380 I ? PCC0RDY
+bit 379 I ? nPCC0WP
+bit 378 I ? nPCC0WAIT
+bit 377 O ? PCC0D0 375 0 Z
+bit 376 I ? PCC0D0
+bit 375 C 0 .
+bit 374 O ? PCC0D8 372 0 Z
+bit 373 I ? PCC0D8
+bit 372 C 0 .
+bit 371 O ? PCC0D1 375 0 Z
+bit 370 I ? PCC0D1
+bit 369 O ? PCC0D9 372 0 Z
+bit 368 I ? PCC0D9
+bit 367 O ? PCC0D2 375 0 Z
+bit 366 I ? PCC0D2
+bit 365 O ? PCC0D10 372 0 Z
+bit 364 I ? PCC0D10
+bit 363 O ? PCC0D3 375 0 Z
+bit 362 I ? PCC0D3
+bit 361 O ? PCC0D11 372 0 Z
+bit 360 I ? PCC0D11
+bit 359 O ? PCC0A25 358 0 Z
+bit 358 C 0 .
+bit 357 O ? PCC0A24 358 0 Z
+bit 356 O ? PCC0A23 358 0 Z
+bit 355 O ? PCC0A22 358 0 Z
+bit 354 O ? PCC0A21 358 0 Z
+bit 353 O ? PCC0A20 358 0 Z
+bit 352 O ? PCC0A19 358 0 Z
+bit 351 O ? PCC0A18 358 0 Z
+bit 350 O ? PCC0A17 358 0 Z
+bit 349 O ? PCC0A16 358 0 Z
+bit 348 O ? PCC0A15 358 0 Z
+bit 347 O ? PCC0A14 358 0 Z
+bit 346 O ? PCC0A13 358 0 Z
+bit 345 O ? PCC0RESET 358 0 Z
+bit 344 O ? nPCC0ICIORDB 358 0 Z
+bit 343 O ? nPCC0ICIOWRB 358 0 Z
+bit 342 O ? nWEB 358 0 Z
+bit 341 O ? nRDB 358 0 Z
+bit 340 O ? nPCC0CE1B 358 0 Z
+bit 339 O ? nPCC0CE2B 358 0 Z
+bit 338 O ? nPCC0REG 358 0 Z
+bit 337 O ? PCC0A12 358 0 Z
+bit 336 O ? PCC0A11 358 0 Z
+bit 335 O ? PCC0A10 358 0 Z
+bit 334 O ? PCC0A9 358 0 Z
+bit 333 O ? PCC0A8 358 0 Z
+bit 332 O ? PCC0A7 358 0 Z
+bit 331 O ? PCC0A6 358 0 Z
+bit 330 O ? PCC0A5 358 0 Z
+bit 329 O ? PCC0A4 358 0 Z
+bit 328 O ? PCC0A3 358 0 Z
+bit 327 O ? PCC0A2 358 0 Z
+bit 326 O ? PCC0A1 358 0 Z
+bit 325 O ? PCC0A0 358 0 Z
+bit 324 O ? PCC0D12 372 0 Z
+bit 323 I ? PCC0D12
+bit 322 O ? PCC0D4 375 0 Z
+bit 321 I ? PCC0D4
+bit 320 O ? PCC0D13 372 0 Z
+bit 319 I ? PCC0D13
+bit 318 O ? PCC0D5 375 0 Z
+bit 317 I ? PCC0D5
+bit 316 O ? PCC0D14 372 0 Z
+bit 315 I ? PCC0D14
+bit 314 O ? PCC0D6 375 0 Z
+bit 313 I ? PCC0D6
+bit 312 O ? PCC0D15 372 0 Z
+bit 311 I ? PCC0D15
+bit 310 O ? PCC0D7 375 0 Z
+bit 309 I ? PCC0D7
+bit 308 O ? PCC1A15 307 0 Z
+bit 307 C 0 .
+bit 306 O ? PCC1A14 307 0 Z
+bit 305 O ? PCC1A13 307 0 Z
+bit 304 O ? PCC1A12 307 0 Z
+bit 303 O ? PCC1A11 307 0 Z
+bit 302 O ? PCC1A10 307 0 Z
+bit 301 O ? PCC1A9 307 0 Z
+bit 300 O ? PCC1A8 307 0 Z
+bit 299 O ? PCC1A7 307 0 Z
+bit 298 O ? PCC1A6 307 0 Z
+bit 297 O ? PCC1A5 307 0 Z
+bit 296 O ? PCC1A4 307 0 Z
+bit 295 O ? PCC1A3 307 0 Z
+bit 294 O ? PCC1A2 307 0 Z
+bit 293 O ? PCC1A1 307 0 Z
+bit 292 O ? PCC1A0 307 0 Z
+bit 291 O ? PCC1D7 289 0 Z
+bit 290 I ? PCC1D7
+bit 289 C 0 .
+bit 288 O ? PCC1D15 286 0 Z
+bit 287 I ? PCC1D15
+bit 286 C 0 .
+bit 285 O ? PCC1D6 289 0 Z
+bit 284 I ? PCC1D6
+bit 283 O ? PCC1D14 286 0 Z
+bit 282 I ? PCC1D14
+bit 281 O ? PCC1D5 289 0 Z
+bit 280 I ? PCC1D5
+bit 279 O ? PCC1D13 286 0 Z
+bit 278 I ? PCC1D13
+bit 277 O ? PCC1D4 289 0 Z
+bit 276 I ? PCC1D4
+bit 275 O ? PCC1D12 286 0 Z
+bit 274 I ? PCC1D12
+bit 273 O ? PCC1D3 289 0 Z
+bit 272 I ? PCC1D3
+bit 271 O ? PCC1D11 286 0 Z
+bit 270 I ? PCC1D11
+bit 269 O ? PCC1D2 289 0 Z
+bit 268 I ? PCC1D2
+bit 267 O ? PCC1D10 286 0 Z
+bit 266 I ? PCC1D10
+bit 265 O ? PCC1D1 289 0 Z
+bit 264 I ? PCC1D1
+bit 263 O ? PCC1D9 286 0 Z
+bit 262 I ? PCC1D9
+bit 261 O ? PCC1D0 289 0 Z
+bit 260 I ? PCC1D0
+bit 259 O ? PCC1D8 286 0 Z
+bit 258 I ? PCC1D8
+bit 257 O ? PCC1A16 307 0 Z
+bit 256 O ? PCC1A17 307 0 Z
+bit 255 O ? PCC1A18 307 0 Z
+bit 254 O ? PCC1A19 307 0 Z
+bit 253 O ? PCC1A20 307 0 Z
+bit 252 O ? PCC1A21 307 0 Z
+bit 251 O ? PCC1A22 307 0 Z
+bit 250 O ? PCC1A23 307 0 Z
+bit 249 O ? PCC1A24 307 0 Z
+bit 248 O ? PCC1A25 307 0 Z
+bit 247 O ? nPCC1REG 307 0 Z
+bit 246 O ? nPCC1CE2A 307 0 Z
+bit 245 O ? nPCC1CE1A 307 0 Z
+bit 244 O ? nRDA 307 0 Z
+bit 243 O ? nWEA 307 0 Z
+bit 242 O ? nPCC1ICIORDA 307 0 Z
+bit 241 O ? nPCC1ICIOWRA 307 0 Z
+bit 240 O ? PCC1RESET 307 0 Z
+bit 239 I ? nPCC1WAIT
+bit 238 I ? nPCC1WP
+bit 237 I ? PCC1RDY
+bit 236 I ? PCC1BVD1
+bit 235 I ? PCC1BVD2
+bit 234 I ? nPCC1VS1
+bit 233 I ? nPCC1VS2
+bit 232 I ? nPCC1CD1
+bit 231 I ? nPCC1CD2
+bit 230 O ? VCC1VPP0
+bit 229 O ? VCC1VPP1
+bit 228 O ? VCC1SEL0
+bit 227 O ? VCC1SEL1
+bit 226 O ? NC(14) 224 0 Z
+bit 225 I ? NC(14)
+bit 224 C 0 .
+bit 223 O ? NC(13) 221 0 Z
+bit 222 I ? NC(13)
+bit 221 C 0 .
+bit 220 O ? NC(12) 218 0 Z
+bit 219 I ? NC(12)
+bit 218 C 0 .
+bit 217 O ? NC(11) 215 0 Z
+bit 216 I ? NC(11)
+bit 215 C 0 .
+bit 214 O ? NC(10) 212 0 Z
+bit 213 I ? NC(10)
+bit 212 C 0 .
+bit 211 O ? NC(9) 209 0 Z
+bit 210 I ? NC(9)
+bit 209 C 0 .
+bit 208 O ? NC(8) 206 0 Z
+bit 207 I ? NC(8)
+bit 206 C 0 .
+bit 205 O ? NC(7) 203 0 Z
+bit 204 I ? NC(7)
+bit 203 C 0 .
+bit 202 O ? NC(6) 200 0 Z
+bit 201 I ? NC(6)
+bit 200 C 0 .
+bit 199 O ? NC(5) 197 0 Z
+bit 198 I ? NC(5)
+bit 197 C 0 .
+bit 196 O ? NC(4) 194 0 Z
+bit 195 I ? NC(4)
+bit 194 C 0 .
+bit 193 O ? NC(3) 191 0 Z
+bit 192 I ? NC(3)
+bit 191 C 0 .
+bit 190 O ? NC(2) 188 0 Z
+bit 189 I ? NC(2)
+bit 188 C 0 .
+bit 187 O ? NC(1) 185 0 Z
+bit 186 I ? NC(1)
+bit 185 C 0 .
+bit 184 O ? PWM0 182 0 Z
+bit 183 I ? PWM0
+bit 182 C 0 .
+bit 181 O ? nRESETMI 179 0 Z
+bit 180 I ? nRESETMI
+bit 179 C 0 .
+bit 178 O ? nRESETPO 176 0 Z
+bit 177 I ? nRESETPO
+bit 176 C 0 .
+bit 175 O ? nRESETMO 173 0 Z
+bit 174 I ? nRESETMO
+bit 173 C 0 .
+bit 172 O ? PWM1 170 0 Z
+bit 171 I ? PWM1
+bit 170 C 0 .
+bit 169 O ? KBCK 167 0 Z
+bit 168 I ? KBCK
+bit 167 C 0 .
+bit 166 O ? KBDATA 164 0 Z
+bit 165 I ? KBDATA
+bit 164 C 0 .
+bit 163 O ? MSCK 161 0 Z
+bit 162 I ? MSCK
+bit 161 C 0 .
+bit 160 O ? MSDATA 158 0 Z
+bit 159 I ? MSDATA
+bit 158 C 0 .
+bit 157 O ? PE7 155 0 Z
+bit 156 I ? PE7
+bit 155 C 0 .
+bit 154 O ? PE6 152 0 Z
+bit 153 I ? PE6
+bit 152 C 0 .
+bit 151 O ? PE5 149 0 Z
+bit 150 I ? PE5
+bit 149 C 0 .
+bit 148 O ? PE4 146 0 Z
+bit 147 I ? PE4
+bit 146 C 0 .
+bit 145 O ? PE3 143 0 Z
+bit 144 I ? PE3
+bit 143 C 0 .
+bit 142 O ? PE2 140 0 Z
+bit 141 I ? PE2
+bit 140 C 0 .
+bit 139 O ? PE1 137 0 Z
+bit 138 I ? PE1
+bit 137 C 0 .
+bit 136 O ? PE0 134 0 Z
+bit 135 I ? PE0
+bit 134 C 0 .
+bit 133 O ? PD7 131 0 Z
+bit 132 I ? PD7
+bit 131 C 0 .
+bit 130 O ? PD6 128 0 Z
+bit 129 I ? PD6
+bit 128 C 0 .
+bit 127 O ? PD5 125 0 Z
+bit 126 I ? PD5
+bit 125 C 0 .
+bit 124 O ? PD4 122 0 Z
+bit 123 I ? PD4
+bit 122 C 0 .
+bit 121 O ? PD3 119 0 Z
+bit 120 I ? PD3
+bit 119 C 0 .
+bit 118 O ? PD2 116 0 Z
+bit 117 I ? PD2
+bit 116 C 0 .
+bit 115 O ? PD1 113 0 Z
+bit 114 I ? PD1
+bit 113 C 0 .
+bit 112 O ? PD0 110 0 Z
+bit 111 I ? PD0
+bit 110 C 0 .
+bit 109 O ? PC7 107 0 Z
+bit 108 I ? PC7
+bit 107 C 0 .
+bit 106 O ? PC6 104 0 Z
+bit 105 I ? PC6
+bit 104 C 0 .
+bit 103 O ? PC5 101 0 Z
+bit 102 I ? PC5
+bit 101 C 0 .
+bit 100 O ? PC4 98 0 Z
+bit 99 I ? PC4
+bit 98 C 0 .
+bit 97 I ? RXD0
+bit 96 I ? nCTS0
+bit 95 I ? nDSR0
+bit 94 I ? nDCD0
+bit 93 I ? nRI0
+bit 92 O ? TXD0
+bit 91 O ? nRTS0
+bit 90 O ? nDTR0
+bit 89 O ? PC3 87 0 Z
+bit 88 I ? PC3
+bit 87 C 0 .
+bit 86 O ? PC2 84 0 Z
+bit 85 I ? PC2
+bit 84 C 0 .
+bit 83 O ? PC1 81 0 Z
+bit 82 I ? PC1
+bit 81 C 0 .
+bit 80 O ? PC0 78 0 Z
+bit 79 I ? PC0
+bit 78 C 0 .
+bit 77 O ? nUSBPEN 75 0 Z
+bit 76 I ? nUSBPEN
+bit 75 C 0 .
+bit 74 I ? nUSBOVR
+bit 73 O ? MODSEL 71 0 Z
+bit 72 I ? MODSEL
+bit 71 C 0 .
+bit 70 O ? TXD
+bit 69 O ? nRX 67 0 Z
+bit 68 I ? nRX
+bit 67 C 0 .
+bit 66 O ? PPD0 64 0 Z
+bit 65 I ? PPD0
+bit 64 C 0 .
+bit 63 O ? PPD1 64 0 Z
+bit 62 I ? PPD1
+bit 61 O ? PPD2 64 0 Z
+bit 60 I ? PPD2
+bit 59 O ? PPD3 64 0 Z
+bit 58 I ? PPD3
+bit 57 O ? nINIT 56 0 Z
+bit 56 C 0 .
+bit 55 I ? nERR
+bit 54 O ? nAFD 56 0 Z
+bit 53 O ? nSTB 56 0 Z
+bit 52 I ? SLCT
+bit 51 I ? PE
+bit 50 I ? BUSY
+bit 49 I ? nACK
+bit 48 O ? nSLIN 56 0 Z
+bit 47 O ? PPD4 64 0 Z
+bit 46 I ? PPD4
+bit 45 O ? PPD5 64 0 Z
+bit 44 I ? PPD5
+bit 43 O ? PPD6 64 0 Z
+bit 42 I ? PPD6
+bit 41 O ? PPD7 64 0 Z
+bit 40 I ? PPD7
+bit 39 O ? PB0 37 0 Z
+bit 38 I ? PB0
+bit 37 C 0 .
+bit 36 O ? PB1 34 0 Z
+bit 35 I ? PB1
+bit 34 C 0 .
+bit 33 O ? PB2 31 0 Z
+bit 32 I ? PB2
+bit 31 C 0 .
+bit 30 O ? PB3 28 0 Z
+bit 29 I ? PB3
+bit 28 C 0 .
+bit 27 O ? PB4 25 0 Z
+bit 26 I ? PB4
+bit 25 C 0 .
+bit 24 O ? PB5 22 0 Z
+bit 23 I ? PB5
+bit 22 C 0 .
+bit 21 O ? PB6 19 0 Z
+bit 20 I ? PB6
+bit 19 C 0 .
+bit 18 O ? PB7 16 0 Z
+bit 17 I ? PB7
+bit 16 C 0 .
+bit 15 O ? nACPD 13 0 Z
+bit 14 I ? nACPD
+bit 13 C 0 .
+bit 12 O ? ACCLK 11 0 Z
+bit 11 C 0 .
+bit 10 I ? SIBDIN
+bit 9 O ? SIBCLK 7 0 Z
+bit 8 I ? SIBCLK
+bit 7 C 0 .
+bit 6 O ? SIBDOUT 5 0 Z
+bit 5 C 0 .
+bit 4 O ? SIBSYNC 2 0 Z
+bit 3 I ? SIBSYNC
+bit 2 C 0 .
+bit 1 O ? nACRST 0 0 Z
+bit 0 C 0 .
--- /dev/null
+#
+# $Id$
+#
+# Copyright (C) 2003 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Matan Ziv-Av <matan@svgalib.org>, 2003.
+#
+
+# bits 31-28 of the Device Identification Register
+0000 sh7727 V0
--- /dev/null
+#
+# $Id$
+#
+# JTAG declarations for SH7727
+# Copyright (C) 2003 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Matan Ziv-Av <matan@svgalib.org>, 2003.
+#
+# Documentation:
+# [1] Hitachi, Ltd., "Hitachi SuperH RISC Engine SH7727 Hardware Manual",
+# 2003-01-31, ADE-602-209C Rev. 4.0
+#
+
+signal VCC1
+signal XTAL2
+signal EXTAL2
+signal VSS1
+signal MD1
+signal MD2
+signal NMI
+signal IRQ0
+signal IRQ1
+signal IRQ2
+signal IRQ3
+signal IRQ4
+signal VEPWC
+signal VCPWC
+signal MD5
+signal BREQ
+signal BACK
+signal VSS2
+signal CKIO2
+signal VCC2
+signal D31
+signal D30
+signal D29
+signal D28
+signal D27
+signal D26
+signal D25
+signal D24
+signal VSS3
+signal D23
+signal VCC3
+signal D22
+signal D21
+signal D20
+signal VSS4
+signal D19
+signal VCC4
+signal D18
+signal D17
+signal D16
+signal D15
+signal VSS5
+signal D14
+signal VCC5
+signal D13
+signal D12
+signal D11
+signal D10
+signal D9
+signal D8
+signal D7
+signal D6
+signal VSS6
+signal D5
+signal VCC6
+signal D4
+signal D3
+signal D2
+signal D1
+signal D0
+signal A0
+signal A1
+signal A2
+signal VSS7
+signal A3
+signal VCC7
+signal A4
+signal A5
+signal A6
+signal A7
+signal A8
+signal A9
+signal A10
+signal A11
+signal VSS8
+signal A12
+signal VCC8
+signal A13
+signal A14
+signal A15
+signal A16
+signal A17
+signal A18
+signal A19
+signal A20
+signal VSS9
+signal A21
+signal VCC9
+signal A22
+signal A23
+signal VSS10
+signal A24
+signal VCC10
+signal A25
+signal BS
+signal RD
+signal WE0
+signal WE1
+signal WE2
+signal VSS11
+signal WE3
+signal VCC11
+signal RDWR
+signal PTE7
+signal CS0
+signal CS2
+signal CS3
+signal CS4
+signal CS5
+signal CS6
+signal CE2A
+signal CE2B
+signal AFE_HC1
+signal AFE_RLYCNT
+signal VSS12
+signal AFE_SCLK
+signal VCC12
+signal AFE_FS
+signal AFE_RXIN
+signal AFE_TXOUT
+signal AFE_RDET
+signal USB1D_SUSPEND
+signal USB1_OVR_CRNT
+signal USB2_OVR_CRNT
+signal RTS2
+signal USB1_PWR_EN
+signal USB2_PWR_EN
+signal CKE
+signal RAS
+signal PTJ1
+signal CAS
+signal VSS13
+signal PTJ3
+signal VCC13
+signal PTJ4
+signal PTJ5
+signal VSS14
+signal CL1
+signal VCC14
+signal DON
+signal M_DISP
+signal FLM
+signal TDO
+signal DRAK0
+signal DACK0
+signal WAPIN
+signal RESETM
+signal ADTRG
+signal IOIS16
+signal ASEMDO
+signal PTG5
+signal PTG4
+signal PTG3
+signal PTG2
+signal VSS15
+signal PTG1
+signal VCC15
+signal PTG0
+signal VSS16
+signal TRST
+signal VCC16
+signal TMS
+signal TDI
+signal TCK
+signal PTF3
+signal PTF2
+signal PTF1
+signal PTF0
+signal MD0
+signal VCC17
+signal CAP1
+signal VSS17
+signal VSS18
+signal CAP2
+signal VCC18
+signal PTH6
+signal VSS19
+signal VCC19
+signal XTAL
+signal EXTAL
+signal LCD15
+signal LCD14
+signal LCD13
+signal LCD12
+signal STATUS0
+signal STATUS1
+signal CL2
+signal VSS20
+signal CKIO
+signal VCC20
+signal TXD0
+signal SCK0
+signal TXD_SIO
+signal SIOMCLK
+signal TXD2
+signal SCK_SIO
+signal SIOFSYNC
+signal RXD0
+signal RXD_SIO
+signal VSS21
+signal RXD2
+signal VCC21
+signal CTS2
+signal LCD11
+signal LCD10
+signal LCD9
+signal VSS22
+signal LCD8
+signal VCC22
+signal LCD7
+signal LCD6
+signal LCD5
+signal LCD4
+signal LCD3
+signal LCD2
+signal LCD1
+signal LCD0
+signal DREQ0
+signal LCK
+signal RESETP
+signal CA
+signal MD3
+signal MD4
+signal VCC23
+signal AVCC1
+signal USB1_P
+signal USB1_M
+signal AVSS1
+signal USB2_P
+signal USB2_M
+signal AVCC2
+signal AVSS2
+signal AN2
+signal AN3
+signal AN4
+signal AN5
+signal AVCC3
+signal AN6
+signal AN7
+
+register BSR 392
+register BR 1
+register DIR 32
+
+instruction length 16
+
+instruction EXTEST 0000111111111111 BSR
+instruction SAMPLE/PRELOAD 0100111111111111 BSR
+instruction IDCODE 1110111111111111 DIR
+instruction BYPASS 1111111111111111 BR
+
+bit 391 I 1 D31
+bit 390 I 1 D30
+bit 389 I 1 D29
+bit 388 I 1 D28
+bit 387 I 1 D27
+bit 386 I 1 D26
+bit 385 I 1 D25
+bit 384 I 1 D24
+bit 383 I 1 D23
+bit 382 I 1 D22
+bit 381 I 1 D21
+bit 380 I 1 D20
+bit 379 I 1 D19
+bit 378 I 1 D18
+bit 377 I 1 D17
+bit 376 I 1 D16
+bit 375 I 1 D15
+bit 374 I 1 D14
+bit 373 I 1 D13
+bit 372 I 1 D12
+bit 371 I 1 D11
+bit 370 I 1 D10
+bit 369 I 1 D9
+bit 368 I 1 D8
+bit 367 I 1 D7
+bit 366 I 1 D6
+bit 365 I 1 D5
+bit 364 I 1 D4
+bit 363 I 1 D3
+bit 362 I 1 D2
+bit 361 I 1 D1
+bit 360 I 1 D0
+bit 359 I 1 MD1
+bit 358 I 1 MD2
+bit 357 I 1 NMI
+bit 356 I 1 IRQ0
+bit 355 I 1 IRQ1
+bit 354 I 1 IRQ2
+bit 353 I 1 IRQ3
+bit 352 I 1 IRQ4
+bit 351 I 1 MD5
+bit 350 I 1 BREQ
+bit 349 O 1 VEPWC 314 1 Z
+bit 348 O 1 VCPWC 313 1 Z
+bit 347 O 1 BACK 312 1 Z
+bit 346 O 1 D31 311 1 Z
+bit 345 O 1 D30 310 1 Z
+bit 344 O 1 D29 309 1 Z
+bit 343 O 1 D28 308 1 Z
+bit 342 O 1 D27 307 1 Z
+bit 341 O 1 D26 306 1 Z
+bit 340 O 1 D25 305 1 Z
+bit 339 O 1 D24 304 1 Z
+bit 338 O 1 D23 303 1 Z
+bit 337 O 1 D22 302 1 Z
+bit 336 O 1 D21 301 1 Z
+bit 335 O 1 D20 300 1 Z
+bit 334 O 1 D19 299 1 Z
+bit 333 O 1 D18 298 1 Z
+bit 332 O 1 D17 297 1 Z
+bit 331 O 1 D16 296 1 Z
+bit 330 O 1 D15 295 1 Z
+bit 329 O 1 D14 294 1 Z
+bit 328 O 1 D13 293 1 Z
+bit 327 O 1 D12 292 1 Z
+bit 326 O 1 D11 291 1 Z
+bit 325 O 1 D10 290 1 Z
+bit 324 O 1 D9 289 1 Z
+bit 323 O 1 D8 288 1 Z
+bit 322 O 1 D7 287 1 Z
+bit 321 O 1 D6 286 1 Z
+bit 320 O 1 D5 285 1 Z
+bit 319 O 1 D4 284 1 Z
+bit 318 O 1 D3 283 1 Z
+bit 317 O 1 D2 282 1 Z
+bit 316 O 1 D1 281 1 Z
+bit 315 O 1 D0 280 1 Z
+bit 314 C 1 *
+bit 313 C 1 *
+bit 312 C 1 *
+bit 311 C 1 *
+bit 310 C 1 *
+bit 309 C 1 *
+bit 308 C 1 *
+bit 307 C 1 *
+bit 306 C 1 *
+bit 305 C 1 *
+bit 304 C 1 *
+bit 303 C 1 *
+bit 302 C 1 *
+bit 301 C 1 *
+bit 300 C 1 *
+bit 299 C 1 *
+bit 298 C 1 *
+bit 297 C 1 *
+bit 296 C 1 *
+bit 295 C 1 *
+bit 294 C 1 *
+bit 293 C 1 *
+bit 292 C 1 *
+bit 291 C 1 *
+bit 290 C 1 *
+bit 289 C 1 *
+bit 288 C 1 *
+bit 287 C 1 *
+bit 286 C 1 *
+bit 285 C 1 *
+bit 284 C 1 *
+bit 283 C 1 *
+bit 282 C 1 *
+bit 281 C 1 *
+bit 280 C 1 *
+bit 279 I 1 BS
+bit 278 I 1 WE2
+bit 277 I 1 WE3
+bit 276 I 1 PTE7
+bit 275 I 1 CS4
+bit 274 I 1 CS5
+bit 273 I 1 CE2A
+bit 272 I 1 CE2B
+bit 271 I 1 AFE_HC1
+bit 270 I 1 AFE_RLYCNT
+bit 269 I 1 AFE_SCLK
+bit 268 I 1 AFE_FS
+bit 267 I 1 AFE_RXIN
+bit 266 I 1 AFE_TXOUT
+bit 265 O 1 A0 217 1 Z
+bit 264 O 1 A1 216 1 Z
+bit 263 O 1 A2 215 1 Z
+bit 262 O 1 A3 214 1 Z
+bit 261 O 1 A4 213 1 Z
+bit 260 O 1 A5 212 1 Z
+bit 259 O 1 A6 211 1 Z
+bit 258 O 1 A7 210 1 Z
+bit 257 O 1 A8 209 1 Z
+bit 256 O 1 A9 208 1 Z
+bit 255 O 1 A10 207 1 Z
+bit 254 O 1 A11 206 1 Z
+bit 253 O 1 A12 205 1 Z
+bit 252 O 1 A13 204 1 Z
+bit 251 O 1 A14 203 1 Z
+bit 250 O 1 A15 202 1 Z
+bit 249 O 1 A16 201 1 Z
+bit 248 O 1 A17 200 1 Z
+bit 247 O 1 A18 199 1 Z
+bit 246 O 1 A19 198 1 Z
+bit 245 O 1 A20 197 1 Z
+bit 244 O 1 A21 196 1 Z
+bit 243 O 1 A22 195 1 Z
+bit 242 O 1 A23 194 1 Z
+bit 241 O 1 A24 193 1 Z
+bit 240 O 1 A25 192 1 Z
+bit 239 O 1 BS 191 1 Z
+bit 238 O 1 RD 190 1 Z
+bit 237 O 1 WE0 189 1 Z
+bit 236 O 1 WE1 188 1 Z
+bit 235 O 1 WE2 187 1 Z
+bit 234 O 1 WE3 186 1 Z
+bit 233 O 1 RDWR 185 1 Z
+bit 232 O 1 PTE7 184 1 Z
+bit 231 O 1 CS0 183 1 Z
+bit 230 O 1 CS2 182 1 Z
+bit 229 O 1 CS3 181 1 Z
+bit 228 O 1 CS4 180 1 Z
+bit 227 O 1 CS5 179 1 Z
+bit 226 O 1 CS6 178 1 Z
+bit 225 O 1 CE2A 177 1 Z
+bit 224 O 1 CE2B 176 1 Z
+bit 223 O 1 AFE_HC1 175 1 Z
+bit 222 O 1 AFE_RLYCNT 174 1 Z
+bit 221 O 1 AFE_SCLK 173 1 Z
+bit 220 O 1 AFE_FS 172 1 Z
+bit 219 O 1 AFE_RXIN 171 1 Z
+bit 218 O 1 AFE_TXOUT 170 1 Z
+bit 217 C 1 *
+bit 216 C 1 *
+bit 215 C 1 *
+bit 214 C 1 *
+bit 213 C 1 *
+bit 212 C 1 *
+bit 211 C 1 *
+bit 210 C 1 *
+bit 209 C 1 *
+bit 208 C 1 *
+bit 207 C 1 *
+bit 206 C 1 *
+bit 205 C 1 *
+bit 204 C 1 *
+bit 203 C 1 *
+bit 202 C 1 *
+bit 201 C 1 *
+bit 200 C 1 *
+bit 199 C 1 *
+bit 198 C 1 *
+bit 197 C 1 *
+bit 196 C 1 *
+bit 195 C 1 *
+bit 194 C 1 *
+bit 193 C 1 *
+bit 192 C 1 *
+bit 191 C 1 *
+bit 190 C 1 *
+bit 189 C 1 *
+bit 188 C 1 *
+bit 187 C 1 *
+bit 186 C 1 *
+bit 185 C 1 *
+bit 184 C 1 *
+bit 183 C 1 *
+bit 182 C 1 *
+bit 181 C 1 *
+bit 180 C 1 *
+bit 179 C 1 *
+bit 178 C 1 *
+bit 177 C 1 *
+bit 176 C 1 *
+bit 175 C 1 *
+bit 174 C 1 *
+bit 173 C 1 *
+bit 172 C 1 *
+bit 171 C 1 *
+bit 170 C 1 *
+bit 169 I 1 AFE_RDET
+bit 168 I 1 USB1D_SUSPEND
+bit 167 I 1 USB1_OVR_CRNT
+bit 166 I 1 USB2_OVR_CRNT
+bit 165 I 1 RTS2
+bit 164 I 1 USB1_PWR_EN
+bit 163 I 1 USB2_PWR_EN
+bit 162 I 1 CKE
+bit 161 I 1 RAS
+bit 160 I 1 PTJ1
+bit 159 I 1 CAS
+bit 158 I 1 PTJ0
+bit 157 I 1 PTJ4
+bit 156 I 1 PTJ5
+bit 155 I 1 CL1
+bit 154 I 1 DON
+bit 153 I 1 M_DISP
+bit 152 I 1 FLM
+bit 151 I 1 WAPIN
+bit 150 I 1 PTH6
+bit 149 I 1 IOIS16
+bit 148 I 1 PTG5
+bit 147 I 1 PTG4
+bit 146 I 1 PTG3
+bit 145 I 1 PTG2
+bit 144 I 1 PTG1
+bit 143 I 1 PTG0
+bit 142 I 1 ADTRG
+bit 141 I 1 PTF3
+bit 140 I 1 PTF2
+bit 139 I 1 PTF1
+bit 138 I 1 PTF0
+bit 137 I 1 MD0
+bit 136 O 1 AFE_RDET 109 1 Z
+bit 135 O 1 USB1D_SUSPEND 108 1 Z
+bit 134 O 1 RTS2 107 1 Z
+bit 133 O 1 USB1_PWR_EN 106 1 Z
+bit 132 O 1 USB2_PWR_EN 105 1 Z
+bit 131 O 1 CKE 104 1 Z
+bit 130 O 1 RAS 103 1 Z
+bit 129 O 1 PTJ1 102 1 Z
+bit 128 O 1 CAS 101 1 Z
+bit 127 O 1 PTJ3 100 1 Z
+bit 126 O 1 PTJ4 99 1 Z
+bit 125 O 1 PTJ5 98 1 Z
+bit 124 O 1 CL1 97 1 Z
+bit 123 O 1 DON 96 1 Z
+bit 122 O 1 M_DISP 95 1 Z
+bit 121 O 1 FLM 94 1 Z
+bit 120 O 1 DRAK0 93 1 Z
+bit 119 O 1 DACK0 92 1 Z
+bit 118 O 1 PTG5 91 1 Z
+bit 117 O 1 PTG3 90 1 Z
+bit 116 O 1 PTG2 89 1 Z
+bit 115 O 1 PTG1 88 1 Z
+bit 114 O 1 PTG0 87 1 Z
+bit 113 O 1 PTF3 86 1 Z
+bit 112 O 1 PTF2 85 1 Z
+bit 111 O 1 PTF1 84 1 Z
+bit 110 O 1 PTF0 83 1 Z
+bit 109 C 1 *
+bit 108 C 1 *
+bit 107 C 1 *
+bit 106 C 1 *
+bit 105 C 1 *
+bit 104 C 1 *
+bit 103 C 1 *
+bit 102 C 1 *
+bit 101 C 1 *
+bit 100 C 1 *
+bit 99 C 1 *
+bit 98 C 1 *
+bit 97 C 1 *
+bit 96 C 1 *
+bit 95 C 1 *
+bit 94 C 1 *
+bit 93 C 1 *
+bit 92 C 1 *
+bit 91 C 1 *
+bit 90 C 1 *
+bit 89 C 1 *
+bit 88 C 1 *
+bit 87 C 1 *
+bit 86 C 1 *
+bit 85 C 1 *
+bit 84 C 1 *
+bit 83 C 1 *
+bit 82 I 1 LCD15
+bit 81 I 1 LCD14
+bit 80 I 1 LCD13
+bit 79 I 1 LCD12
+bit 78 I 1 STATUS0
+bit 77 I 1 STATUS1
+bit 76 I 1 CL2
+bit 75 I 1 SCK0
+bit 74 I 1 SIOMCLK
+bit 73 I 1 SCK_SIO
+bit 72 I 1 SIOFSYNC
+bit 71 I 1 RXD0
+bit 70 I 1 RXD2
+bit 69 I 1 LCD7
+bit 68 I 1 LCD6
+bit 67 I 1 LCD1
+bit 66 I 1 LCD0
+bit 65 I 1 DREQ0
+bit 64 I 1 LCK
+bit 63 I 1 RXD_SIO
+bit 62 I 1 CTS2
+bit 61 I 1 LCD11
+bit 60 I 1 LCD10
+bit 59 I 1 LCD9
+bit 58 I 1 LCD8
+bit 57 I 1 LCD5
+bit 56 I 1 LCD4
+bit 55 I 1 LCD3
+bit 54 I 1 LCD2
+bit 53 I 1 MD3
+bit 52 I 1 MD4
+bit 51 O 1 LCD15 25 1 Z
+bit 50 O 1 LCD14 24 1 Z
+bit 49 O 1 LCD13 23 1 Z
+bit 48 O 1 LCD12 22 1 Z
+bit 47 O 1 STATUS0 21 1 Z
+bit 46 O 1 STATUS1 20 1 Z
+bit 45 O 1 CL2 19 1 Z
+bit 44 O 1 TXD0 18 1 Z
+bit 43 O 1 SCK0 17 1 Z
+bit 42 O 1 TXD_SIO 16 1 Z
+bit 41 O 1 SIOMCLK 15 1 Z
+bit 40 O 1 TXD2 14 1 Z
+bit 39 O 1 SCK_SIO 13 1 Z
+bit 38 O 1 SIOFSYNC 12 1 Z
+bit 37 O 1 LCD11 11 1 Z
+bit 36 O 1 LCD10 10 1 Z
+bit 35 O 1 LCD9 9 1 Z
+bit 34 O 1 LCD8 8 1 Z
+bit 33 O 1 LCD7 7 1 Z
+bit 32 O 1 LCD6 6 1 Z
+bit 31 O 1 LCD5 5 1 Z
+bit 30 O 1 LCD4 4 1 Z
+bit 29 O 1 LCD3 3 1 Z
+bit 28 O 1 LCD2 2 1 Z
+bit 27 O 1 LCD1 1 1 Z
+bit 26 O 1 LCD0 0 1 Z
+bit 25 C 1 *
+bit 24 C 1 *
+bit 23 C 1 *
+bit 22 C 1 *
+bit 21 C 1 *
+bit 20 C 1 *
+bit 19 C 1 *
+bit 18 C 1 *
+bit 17 C 1 *
+bit 16 C 1 *
+bit 15 C 1 *
+bit 14 C 1 *
+bit 13 C 1 *
+bit 12 C 1 *
+bit 11 C 1 *
+bit 10 C 1 *
+bit 9 C 1 *
+bit 8 C 1 *
+bit 7 C 1 *
+bit 6 C 1 *
+bit 5 C 1 *
+bit 4 C 1 *
+bit 3 C 1 *
+bit 2 C 1 *
+bit 1 C 1 *
+bit 0 C 1 *
+
+initbus sh7727
--- /dev/null
+#
+# $Id$
+#
+# Copyright (C) 2003 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Matan Ziv-Av <matan@svgalib.org>, 2003.
+#
+
+# bits 31-28 of the Device Identification Register
+0000 sh7729 V0
--- /dev/null
+#
+# $Id: sh7729,v 1.0 2003/18/10 21:09:11
+#
+# JTAG declarations for SH7729
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Balazs Beregnyei <bereg@impulzus.sch.bme.hu>, 2003.
+#
+# Documentation:
+# [1] Hitachi, Ltd., "Hitachi SuperH RISC Engine SH7729 Hardware Manual"
+#
+
+signal MD1
+signal MD2
+signal VCC0
+signal XTAL2
+signal EXTAL2
+signal VSS0
+signal NMI
+signal IRQ0
+signal IRQ1
+signal IRQ2
+signal IRQ3
+signal IRQ4
+signal D31
+signal D30
+signal D29
+signal D28
+signal D27
+signal D26
+signal VSS1
+signal D25
+signal VCC1
+signal D24
+signal D23
+signal D22
+signal D21
+signal D20
+signal VSS2
+signal D19
+signal VCC2
+signal D18
+signal D17
+signal D16
+signal VSS3
+signal D15
+signal VCC3
+signal D14
+signal D13
+signal D12
+signal D11
+signal D10
+signal D9
+signal D8
+signal D7
+signal D6
+signal VSS4
+signal D5
+signal VCC4
+signal D4
+signal D3
+signal D2
+signal D1
+signal D0
+signal A0
+signal A1
+signal A2
+signal A3
+signal VSS5
+signal A4
+signal VCC5
+signal A5
+signal A6
+signal A7
+signal A8
+signal A9
+signal A10
+signal A11
+signal A12
+signal A13
+signal VSS6
+signal A14
+signal VCC6
+signal A15
+signal A16
+signal A17
+signal A18
+signal A19
+signal A20
+signal A21
+signal VSS7
+signal A22
+signal VCC7
+signal A23
+signal VSS8
+signal A24
+signal VCC8
+signal A25
+signal BS
+signal RD
+signal WE0
+signal WE1
+signal WE2
+signal WE3
+signal RDWR
+signal AUDSYNC
+signal VSS9
+signal CS0
+signal VCC9
+signal CS2
+signal CS3
+signal CS4
+signal CS5
+signal CS6
+signal CE2A
+signal CE2B
+signal CKE
+signal RAS3L
+signal PTJ1
+signal CASL
+signal VSS10
+signal CASU
+signal VCC10
+signal PTJ4
+signal PTJ5
+signal DACK0
+signal DACK1
+signal PTE6
+signal PTE3
+signal RAS3U
+signal PTE1
+signal TDO
+signal BACK
+signal BREQ
+signal WAIT
+signal RESETM
+signal ADTRG
+signal IOIS16
+signal ASEMD0
+signal ASEBRKAK
+signal CKIO2
+signal AUDATA3
+signal AUDATA2
+signal VSS11
+signal AUDATA1
+signal VCC11
+signal AUDATA0
+signal TRST
+signal TMS
+signal TDI
+signal TCK
+signal IRLS3
+signal IRLS2
+signal IRLS1
+signal IRLS0
+signal MD0
+signal VCC12
+signal CAP1
+signal VSS12
+signal VSS13
+signal CAP2
+signal VCC13
+signal AUDCK
+signal VSS14
+signal VSS15
+signal VCC15
+signal XTAL
+signal EXTAL
+signal STATUS0
+signal STATUS1
+signal TCLK
+signal IRQOUT
+signal VSS16
+signal CKIO
+signal VCC16
+signal TXD0
+signal SCK0
+signal TXD1
+signal SCK1
+signal TXD2
+signal SCK2
+signal RTS2
+signal RXD0
+signal RXD1
+signal VSS17
+signal RXD2
+signal VCC17
+signal CTS2
+signal MCS7
+signal MCS6
+signal MCS5
+signal MCS4
+signal VSS18
+signal WAKEUP
+signal VCC18
+signal RESETOUT
+signal MCS3
+signal MCS2
+signal MCS1
+signal MCS0
+signal DRAK0
+signal DRAK1
+signal DREQ0
+signal DREQ1
+signal RESETP
+signal CA
+signal MD3
+signal MD4
+signal MD5
+signal VSS19
+signal AN0
+signal AN1
+signal AN2
+signal AN3
+signal AN4
+signal AN5
+signal VCC19
+signal AN6
+signal AN7
+signal VSS20
+
+register BSR 339
+register BR 1
+register DIR 32
+
+instruction length 16
+
+instruction EXTEST 0000111111111111 BSR
+instruction SAMPLE/PRELOAD 0100111111111111 BSR
+instruction IDCODE 1110111111111111 DIR
+instruction BYPASS 1111111111111111 BR
+
+bit 338 I 1 D31
+bit 337 I 1 D30
+bit 336 I 1 D29
+bit 335 I 1 D28
+bit 334 I 1 D27
+bit 333 I 1 D26
+bit 332 I 1 D25
+bit 331 I 1 D24
+bit 330 I 1 D23
+bit 329 I 1 D22
+bit 328 I 1 D21
+bit 327 I 1 D20
+bit 326 I 1 D19
+bit 325 I 1 D18
+bit 324 I 1 D17
+bit 323 I 1 D16
+bit 322 I 1 D15
+bit 321 I 1 D14
+bit 320 I 1 D13
+bit 319 I 1 D12
+bit 318 I 1 D11
+bit 317 I 1 D10
+bit 316 I 1 D9
+bit 315 I 1 D8
+bit 314 I 1 D7
+bit 313 I 1 D6
+bit 312 I 1 D5
+bit 311 I 1 D4
+bit 310 I 1 D3
+bit 309 I 1 D2
+bit 308 I 1 D1
+bit 307 I 1 D0
+bit 306 I 1 MD1
+bit 305 I 1 MD2
+bit 304 I 1 NMI
+bit 303 I 1 IRQ0
+bit 302 I 1 IRQ1
+bit 301 I 1 IRQ2
+bit 300 I 1 IRQ3
+bit 299 I 1 IRQ4
+bit 298 O 1 D31 266 1 Z
+bit 297 O 1 D30 265 1 Z
+bit 296 O 1 D29 264 1 Z
+bit 295 O 1 D28 263 1 Z
+bit 294 O 1 D27 262 1 Z
+bit 293 O 1 D26 261 1 Z
+bit 292 O 1 D25 260 1 Z
+bit 291 O 1 D24 259 1 Z
+bit 290 O 1 D23 258 1 Z
+bit 289 O 1 D22 257 1 Z
+bit 288 O 1 D21 256 1 Z
+bit 287 O 1 D20 255 1 Z
+bit 286 O 1 D19 254 1 Z
+bit 285 O 1 D18 253 1 Z
+bit 284 O 1 D17 252 1 Z
+bit 283 O 1 D16 251 1 Z
+bit 282 O 1 D15 250 1 Z
+bit 281 O 1 D14 249 1 Z
+bit 280 O 1 D13 248 1 Z
+bit 279 O 1 D12 247 1 Z
+bit 278 O 1 D11 246 1 Z
+bit 277 O 1 D10 245 1 Z
+bit 276 O 1 D9 244 1 Z
+bit 275 O 1 D8 243 1 Z
+bit 274 O 1 D7 242 1 Z
+bit 273 O 1 D6 241 1 Z
+bit 272 O 1 D5 240 1 Z
+bit 271 O 1 D4 239 1 Z
+bit 270 O 1 D3 238 1 Z
+bit 269 O 1 D2 237 1 Z
+bit 268 O 1 D1 236 1 Z
+bit 267 O 1 D0 235 1 Z
+bit 266 C 1 *
+bit 265 C 1 *
+bit 264 C 1 *
+bit 263 C 1 *
+bit 262 C 1 *
+bit 261 C 1 *
+bit 260 C 1 *
+bit 259 C 1 *
+bit 258 C 1 *
+bit 257 C 1 *
+bit 256 C 1 *
+bit 255 C 1 *
+bit 254 C 1 *
+bit 253 C 1 *
+bit 252 C 1 *
+bit 251 C 1 *
+bit 250 C 1 *
+bit 249 C 1 *
+bit 248 C 1 *
+bit 247 C 1 *
+bit 246 C 1 *
+bit 245 C 1 *
+bit 244 C 1 *
+bit 243 C 1 *
+bit 242 C 1 *
+bit 241 C 1 *
+bit 240 C 1 *
+bit 239 C 1 *
+bit 238 C 1 *
+bit 237 C 1 *
+bit 236 C 1 *
+bit 235 C 1 *
+bit 234 I 1 BS
+bit 233 I 1 WE2
+bit 232 I 1 WE3
+bit 231 I 1 AUDSYNC
+bit 230 I 1 CS2
+bit 229 I 1 CS3
+bit 228 I 1 CS4
+bit 227 I 1 CS5
+bit 226 I 1 CE2A
+bit 225 I 1 CE2B
+bit 224 O 1 A0 182 1 Z
+bit 223 O 1 A1 181 1 Z
+bit 222 O 1 A2 180 1 Z
+bit 221 O 1 A3 179 1 Z
+bit 220 O 1 A4 178 1 Z
+bit 219 O 1 A5 177 1 Z
+bit 218 O 1 A6 176 1 Z
+bit 217 O 1 A7 175 1 Z
+bit 216 O 1 A8 174 1 Z
+bit 215 O 1 A9 173 1 Z
+bit 214 O 1 A10 172 1 Z
+bit 213 O 1 A11 171 1 Z
+bit 212 O 1 A12 170 1 Z
+bit 211 O 1 A13 169 1 Z
+bit 210 O 1 A14 168 1 Z
+bit 209 O 1 A15 167 1 Z
+bit 208 O 1 A16 166 1 Z
+bit 207 O 1 A17 165 1 Z
+bit 206 O 1 A18 164 1 Z
+bit 205 O 1 A19 163 1 Z
+bit 204 O 1 A20 162 1 Z
+bit 203 O 1 A21 161 1 Z
+bit 202 O 1 A22 160 1 Z
+bit 201 O 1 A23 159 1 Z
+bit 200 O 1 A24 158 1 Z
+bit 199 O 1 A25 157 1 Z
+bit 198 O 1 BS 156 1 Z
+bit 197 O 1 RD 155 1 Z
+bit 196 O 1 WE0 154 1 Z
+bit 195 O 1 WE1 153 1 Z
+bit 194 O 1 WE2 152 1 Z
+bit 193 O 1 WE3 151 1 Z
+bit 192 O 1 RDWR 150 1 Z
+bit 191 O 1 AUDSYNC 149 1 Z
+bit 190 O 1 CS0 148 1 Z
+bit 189 O 1 CS2 147 1 Z
+bit 188 O 1 CS3 146 1 Z
+bit 187 O 1 CS4 145 1 Z
+bit 186 O 1 CS5 144 1 Z
+bit 185 O 1 CS6 143 1 Z
+bit 184 O 1 CE2A 142 1 Z
+bit 183 O 1 CE2B 141 1 Z
+bit 182 C 1 *
+bit 181 C 1 *
+bit 180 C 1 *
+bit 179 C 1 *
+bit 178 C 1 *
+bit 177 C 1 *
+bit 176 C 1 *
+bit 175 C 1 *
+bit 174 C 1 *
+bit 173 C 1 *
+bit 172 C 1 *
+bit 171 C 1 *
+bit 170 C 1 *
+bit 169 C 1 *
+bit 168 C 1 *
+bit 167 C 1 *
+bit 166 C 1 *
+bit 165 C 1 *
+bit 164 C 1 *
+bit 163 C 1 *
+bit 162 C 1 *
+bit 161 C 1 *
+bit 160 C 1 *
+bit 159 C 1 *
+bit 158 C 1 *
+bit 157 C 1 *
+bit 156 C 1 *
+bit 155 C 1 *
+bit 154 C 1 *
+bit 153 C 1 *
+bit 152 C 1 *
+bit 151 C 1 *
+bit 150 C 1 *
+bit 149 C 1 *
+bit 148 C 1 *
+bit 147 C 1 *
+bit 146 C 1 *
+bit 145 C 1 *
+bit 144 C 1 *
+bit 143 C 1 *
+bit 142 C 1 *
+bit 141 C 1 *
+bit 140 I 1 CKE
+bit 139 I 1 RAS3L
+bit 138 I 1 RAS2L
+bit 137 I 1 CASLL
+bit 136 I 1 CASLH
+bit 135 I 1 CASHL
+bit 134 I 1 CASHH
+bit 133 I 1 DACK0
+bit 132 I 1 DACK1
+bit 131 I 1 CAS2L
+bit 130 I 1 CAS2H
+bit 129 I 1 RAS3U
+bit 128 I 1 RAS2U
+bit 127 I 1 BREQ
+bit 126 I 1 WAIT
+bit 125 I 1 AUDCK
+bit 124 I 1 IOIS16
+bit 123 I 1 ASEBRKAK
+bit 122 I 1 PTG4
+bit 121 I 1 AUDATA3
+bit 120 I 1 AUDATA2
+bit 119 I 1 AUDATA1
+bit 118 I 1 AUDATA0
+bit 117 I 1 ADTRG
+bit 116 I 1 IRLS3
+bit 115 I 1 IRLS2
+bit 114 I 1 IRLS1
+bit 113 I 1 IRLS0
+bit 112 I 1 MD0
+bit 111 O 1 CKE 92 1 Z
+bit 110 O 1 RAS3L 91 1 Z
+bit 109 O 1 RAS2L 90 1 Z
+bit 108 O 1 CASLL 89 1 Z
+bit 107 O 1 CASLH 88 1 Z
+bit 106 O 1 CASHL 87 1 Z
+bit 105 O 1 CASHH 86 1 Z
+bit 104 O 1 DACK0 85 1 Z
+bit 103 O 1 DACK1 84 1 Z
+bit 102 O 1 CAS2L 83 1 Z
+bit 101 O 1 CAS2H 82 1 Z
+bit 100 O 1 RAS3U 81 1 Z
+bit 99 O 1 RAS2U 80 1 Z
+bit 98 O 1 BACK 79 1 Z
+bit 97 O 1 ASEBRKAK 78 1 Z
+bit 96 O 1 AUDATA3 77 1 Z
+bit 95 O 1 AUDATA2 76 1 Z
+bit 94 O 1 AUDATA1 75 1 Z
+bit 93 O 1 AUDATA0 74 1 Z
+bit 92 C 1 *
+bit 91 C 1 *
+bit 90 C 1 *
+bit 89 C 1 *
+bit 88 C 1 *
+bit 87 C 1 *
+bit 86 C 1 *
+bit 85 C 1 *
+bit 84 C 1 *
+bit 83 C 1 *
+bit 82 C 1 *
+bit 81 C 1 *
+bit 80 C 1 *
+bit 79 C 1 *
+bit 78 C 1 *
+bit 77 C 1 *
+bit 76 C 1 *
+bit 75 C 1 *
+bit 74 C 1 *
+bit 73 I 1 STATUS0
+bit 72 I 1 STATUS1
+bit 71 I 1 TCLK
+bit 70 I 1 SCK0
+bit 69 I 1 SCK1
+bit 68 I 1 SCK2
+bit 67 I 1 RTS2
+bit 66 I 1 RXD0
+bit 65 I 1 RXD2
+bit 64 I 1 WAKEUP
+bit 63 I 1 RESETOUT
+bit 62 I 1 DRAK0
+bit 61 I 1 DRAK1
+bit 60 I 1 DREQ0
+bit 59 I 1 DREQ1
+bit 58 I 1 RXD1
+bit 57 I 1 CTS2
+bit 56 I 1 MCS7
+bit 55 I 1 MCS6
+bit 54 I 1 MCS5
+bit 53 I 1 MCS4
+bit 52 I 1 MCS3
+bit 51 I 1 MCS2
+bit 50 I 1 MCS1
+bit 49 I 1 MCS0
+bit 48 I 1 MD3
+bit 47 I 1 MD4
+bit 46 I 1 MD5
+bit 45 O 1 STATUS0 22 1 Z
+bit 44 O 1 STATUS1 21 1 Z
+bit 43 O 1 TCLK 20 1 Z
+bit 42 O 1 IRQOUT 19 1 Z
+bit 41 O 1 TXD0 18 1 Z
+bit 40 O 1 SCK0 17 1 Z
+bit 39 O 1 TXD1 16 1 Z
+bit 38 O 1 SCK1 15 1 Z
+bit 37 O 1 TXD2 14 1 Z
+bit 36 O 1 SCK2 13 1 Z
+bit 35 O 1 RTS2 12 1 Z
+bit 34 O 1 MCS7 11 1 Z
+bit 33 O 1 MCS6 10 1 Z
+bit 32 O 1 MCS5 9 1 Z
+bit 31 O 1 MCS4 8 1 Z
+bit 30 O 1 WAKEUP 7 1 Z
+bit 29 O 1 RESETOUT 6 1 Z
+bit 28 O 1 MCS3 5 1 Z
+bit 27 O 1 MCS2 4 1 Z
+bit 26 O 1 MCS1 3 1 Z
+bit 25 O 1 MCS0 2 1 Z
+bit 24 O 1 DRAK0 1 1 Z
+bit 23 O 1 DRAK1 0 1 Z
+bit 22 C 1 *
+bit 21 C 1 *
+bit 20 C 1 *
+bit 19 C 1 *
+bit 18 C 1 *
+bit 17 C 1 *
+bit 16 C 1 *
+bit 15 C 1 *
+bit 14 C 1 *
+bit 13 C 1 *
+bit 12 C 1 *
+bit 11 C 1 *
+bit 10 C 1 *
+bit 9 C 1 *
+bit 8 C 1 *
+bit 7 C 1 *
+bit 6 C 1 *
+bit 5 C 1 *
+bit 4 C 1 *
+bit 3 C 1 *
+bit 2 C 1 *
+bit 1 C 1 *
+bit 0 C 1 *
+
+initbus sh7727
--- /dev/null
+#
+# $Id$
+#
+# Copyright (C) 2002 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Marcel Telka <marcel@telka.sk>, 2002.
+#
+
+# bits 27-12 of the Device Identification Register
+0010000001010100 ppc440gx IBM440GX
+0000001001100111 ppc405ep PowerPC 405EP
--- /dev/null
+0001 ppc405ep A
+0010 ppc405ep B
+0011 ppc405ep C
--- /dev/null
+signal TDI
+signal TMS
+signal TRST
+signal TCK
+signal TDO
+signal SysClk
+signal AVDD
+signal AGND
+signal SysReset
+signal TesetEn
+signal Halt
+signal SysErr
+signal MemData0
+signal MemData1
+signal MemData2
+signal MemData3
+signal MemData4
+signal MemData5
+signal MemData6
+signal MemData7
+signal MemData8
+signal MemData9
+signal MemData10
+signal MemData11
+signal MemData12
+signal MemData13
+signal MemData14
+signal MemData15
+signal MemData16
+signal MemData17
+signal MemData18
+signal MemData19
+signal MemData20
+signal MemData21
+signal MemData22
+signal MemData23
+signal MemData24
+signal MemData25
+signal MemData26
+signal MemData27
+signal MemData28
+signal MemData29
+signal MemData30
+signal MemData31
+signal MemAddr0
+signal MemAddr1
+signal MemAddr2
+signal MemAddr3
+signal MemAddr4
+signal MemAddr5
+signal MemAddr6
+signal MemAddr7
+signal MemAddr8
+signal MemAddr9
+signal MemAddr10
+signal MemAddr11
+signal MemAddr12
+signal BA0
+signal BA1
+signal RAS
+signal CAS
+signal DQM0
+signal DQM1
+signal DQM2
+signal DQM3
+signal BankSel0
+signal BankSel1
+signal WE
+signal ClkEn0
+signal ClkEn1
+signal MemClkOut0
+signal MemClkOut1
+signal PerData0
+signal PerData1
+signal PerData2
+signal PerData3
+signal PerData4
+signal PerData5
+signal PerData6
+signal PerData7
+signal PerData8
+signal PerData9
+signal PerData10
+signal PerData11
+signal PerData12
+signal PerData13
+signal PerData14
+signal PerData15
+signal PerAddr6
+signal PerAddr7
+signal PerAddr8
+signal PerAddr9
+signal PerAddr10
+signal PerAddr11
+signal PerAddr12
+signal PerAddr13
+signal PerAddr14
+signal PerAddr15
+signal PerAddr16
+signal PerAddr17
+signal PerAddr18
+signal PerAddr19
+signal PerAddr20
+signal PerAddr21
+signal PerAddr22
+signal PerAddr23
+signal PerAddr24
+signal PerAddr25
+signal PerAddr26
+signal PerAddr27
+signal PerAddr28
+signal PerAddr29
+signal PerAddr30
+signal PerAddr31
+signal PerWBE0
+signal PerWBE1
+signal PerCS0
+signal PerOE
+signal PerRnW
+signal PerReady
+signal PerClk
+signal ExtReset
+signal PCIAD0
+signal PCIAD1
+signal PCIAD2
+signal PCIAD3
+signal PCIAD4
+signal PCIAD5
+signal PCIAD6
+signal PCIAD7
+signal PCIAD8
+signal PCIAD9
+signal PCIAD10
+signal PCIAD11
+signal PCIAD12
+signal PCIAD13
+signal PCIAD14
+signal PCIAD15
+signal PCIAD16
+signal PCIAD17
+signal PCIAD18
+signal PCIAD19
+signal PCIAD20
+signal PCIAD21
+signal PCIAD22
+signal PCIAD23
+signal PCIAD24
+signal PCIAD25
+signal PCIAD26
+signal PCIAD27
+signal PCIAD28
+signal PCIAD29
+signal PCIAD30
+signal PCIAD31
+signal PCIC0_BE0
+signal PCIC0_BE1
+signal PCIC0_BE2
+signal PCIC0_BE3
+signal PCIParity
+signal PCIFrame
+signal PCIIRDY
+signal PCITRDY
+signal PCIStop
+signal PCIDevSel
+signal PCIIDSel
+signal PCISErr
+signal PCIPErr
+signal PCIClk
+signal PCIReset
+signal PCIINT_PerWE
+signal PCIReq0_Gnt
+signal PCIReq1
+signal PCIReq2
+signal PCIGnt0_Req
+signal PCIGnt1
+signal PCIGnt2
+signal UART0_Rx
+signal UART0_Tx
+signal UART0_CTS
+signal UART0_RTS
+signal IICSCL
+signal IICSDA
+signal PerBlast_GPIO0
+signal GPIO1_TS1E
+signal GPIO2_TS2E
+signal GPIO3_TS1O
+signal GPIO4_TS2O
+signal GPIO5_TS3
+signal GPIO6_TS4
+signal GPIO7_TS5
+signal GPIO8_TS6
+signal GPIO9_TrcClk
+signal PerCS1_GPIO10
+signal PerCS2_GPIO11
+signal PerCS3_GPIO12
+signal PerCS4_GPIO13
+signal PerAddr3_GPIO14
+signal PerAddr4_GPIO15
+signal PerAddr5_GPIO16
+signal IRQ0_GPIO17
+signal IRQ1_GPIO18
+signal IRQ2_GPIO19
+signal IRQ3_GPIO20
+signal IRQ4_GPIO21
+signal IRQ5_GPIO22
+signal IRQ6_GPIO23
+signal UART0_DCD_GPIO24UART0_DSR_GPIO25UART0_RI_GPIO26
+signal UART0_DSR_GPIO25UART0_RI_GPIO26
+signal UART0_RI_GPIO26
+signal UART0_DTR_GPIO27UART1_Rx_GPIO28
+signal UART1_Rx_GPIO28
+signal UART1_Tx_GPIO29
+signal RejectPkt0_GPIO3RejectPkt1_GPIO3PHY0Rx0D0
+signal RejectPkt1_GPIO3PHY0Rx0D0
+signal PHY0Rx0D0
+signal PHY0Rx0D1
+signal PHY0Rx0D2
+signal PHY0Rx0D3
+signal EMC0Tx0D0
+signal EMC0Tx0D1
+signal EMC0Tx0D2
+signal EMC0Tx0D3
+signal PHY0RxErr
+signal PHY0Rx0Clk
+signal PHY0Rx0DV
+signal PHY0CrS0
+signal EMC0Tx0Err
+signal EMC0Tx0En
+signal PHY0Tx0Clk
+signal PHY0Col0
+signal EMCMDIO
+signal EMCMDClk
+signal PHY0Rx1D0
+signal PHY0Rx1D1
+signal PHY0Rx1D2
+signal PHY0Rx1D3
+signal EMC0Tx1D0
+signal EMC0Tx1D1
+signal EMC0Tx1D2
+signal EMC0Tx1D3
+signal PHY0Rx1Err
+signal PHY0Rx1Clk
+signal PHY0Rx1DV
+signal PHY0Col1
+signal EMC0Tx1Err
+signal EMC0Tx1En
+signal PHY0Tx1Clk
+signal PHY0CrS1
+signal GND1
+signal GND2
+signal GND3
+signal GND4
+signal GND5
+signal GND6
+signal GND7
+signal GND8
+signal GND9
+signal GND10
+signal GND11
+signal GND12
+signal GND13
+signal GND14
+signal GND15
+signal GND16
+signal GND17
+signal GND18
+signal GND19
+signal GND20
+signal GND21
+signal GND22
+signal GND23
+signal GND24
+signal GND25
+signal GND26
+signal GND27
+signal GND28
+signal GND29
+signal GND30
+signal GND31
+signal GND32
+signal GND33
+signal GND34
+signal GND35
+signal GND36
+signal GND37
+signal GND38
+signal GND39
+signal GND40
+signal GND41
+signal GND42
+signal GND43
+signal GND44
+signal GND45
+signal GND46
+signal GND47
+signal GND48
+signal GND49
+signal GND50
+signal GND51
+signal GND52
+signal GND53
+signal GND54
+signal GND55
+signal GND56
+signal GND57
+signal GND58
+signal GND59
+signal GND60
+signal GND61
+signal GND62
+signal GND63
+signal GND64
+signal GND65
+signal GND66
+signal GND67
+signal GND68
+signal GND69
+signal GND70
+signal GND71
+signal GND72
+signal GND73
+signal GND74
+signal GND75
+signal GND76
+signal GND77
+signal GND78
+signal VDD1
+signal VDD2
+signal VDD3
+signal VDD4
+signal VDD5
+signal VDD6
+signal VDD7
+signal VDD8
+signal VDD9
+signal VDD10
+signal VDD11
+signal VDD12
+signal VDD13
+signal VDD14
+signal VDD15
+signal VDD16
+signal VDD17
+signal VDD18
+signal VDD19
+signal VDD20
+signal VDD21
+signal VDD22
+signal VDD23
+signal VDD24
+signal VDD25
+signal VDD26
+signal VDD27
+signal VDD28
+signal VDD29
+signal VDD30
+signal VDD31
+signal VDD32
+signal VDD33
+signal VDD34
+signal VDD35
+signal VDD36
+signal VDD37
+signal VDD38
+signal VDD39
+signal VDD40
+signal OVDD1
+signal OVDD2
+signal OVDD3
+signal OVDD4
+signal OVDD5
+signal OVDD6
+signal OVDD7
+signal OVDD8
+signal OVDD9
+signal OVDD10
+signal OVDD11
+signal OVDD12
+signal OVDD13
+signal OVDD14
+signal OVDD15
+signal OVDD16
+signal OVDD17
+signal OVDD18
+
+register BSR 300
+register BR 1
+register DIR 32
+
+instruction length 7
+
+instruction EXTEST 0000000 BSR
+instruction SAMPLE/PRELOAD 1111010 BSR
+instruction IDCODE 1111011 DIR
+instruction BYPASS 1111100 BR
+
+bit 299 B 1 MemData20 290 0 Z
+bit 298 B 1 MemData18 290 0 Z
+bit 297 B 1 MemData19 290 0 Z
+bit 296 C 0 *
+bit 295 B 1 IICSCL 296 0 Z
+bit 294 B 1 MemData17 290 0 Z
+bit 293 C 0 *
+bit 292 B 1 EMCMDIO 293 0 Z
+bit 291 O 1 EMCMDClk
+bit 290 C 0 *
+bit 289 B 1 MemData16 290 0 Z
+bit 288 B 1 MemData15 278 0 Z
+bit 287 B 1 MemData14 278 0 Z
+bit 286 B 1 MemData13 278 0 Z
+bit 285 B 1 MemData12 278 0 Z
+bit 284 I 1 PHY0Tx0Clk
+bit 283 O 1 DQM1
+bit 282 B 1 MemData11 278 0 Z
+bit 281 B 1 MemData10 278 0 Z
+bit 280 I 1 PHY0Col0
+bit 279 B 1 MemData9 278 0 Z
+bit 278 C 0 *
+bit 277 B 1 MemData8 278 0 Z
+bit 276 I 1 PHY0CrS0
+bit 275 B 1 MemData7 264 0 Z
+bit 274 I 1 PHY0Rx0DV
+bit 273 B 1 MemData6 264 0 Z
+bit 272 B 1 MemData5 264 0 Z
+bit 271 I 1 PHY0Rx0Clk
+bit 270 B 1 MemData4 264 0 Z
+bit 269 O 1 DQM0
+bit 268 B 1 MemData3 264 0 Z
+bit 267 I 1 PHY0RxErr
+bit 266 B 1 MemData2 264 0 Z
+bit 265 B 1 MemData1 264 0 Z
+bit 264 C 0 *
+bit 263 B 1 MemData0 264 0 Z
+bit 262 O 1 BankSel1
+bit 261 O 1 BankSel0
+bit 260 I 1 PHY0Rx0D3
+bit 259 O 1 ClkEn1
+bit 258 O 1 MemClkOut1
+bit 257 O 1 ClkEn0
+bit 256 O 1 MemClkOut0
+bit 255 O 1 WE
+bit 254 O 1 CAS
+bit 253 O 1 MemAddr0
+bit 252 O 1 RAS
+bit 251 O 1 BA1
+bit 250 O 1 BA0
+bit 249 O 1 MemAddr1
+bit 248 I 1 PHY0Rx0D2
+bit 247 O 1 MemAddr2
+bit 246 O 1 MemAddr3
+bit 245 I 1 PHY0Rx0D0
+bit 244 O 1 MemAddr4
+bit 243 O 1 SysClk
+bit 242 B 1 SysErr 229 0 Z
+bit 241 O 1 MemAddr5
+bit 240 O 1 MemAddr6
+bit 239 O 1 MemAddr7
+bit 238 O 1 MemAddr8
+bit 237 O 1 MemAddr9
+bit 236 C 0 *
+bit 235 B 1 SysReset 236 0 Z
+bit 234 O 1 MemAddr11
+bit 233 O 1 MemAddr10
+bit 232 O 1 MemAddr12
+bit 231 C 0 *
+bit 230 B 1 GPIO1_TS1E 231 0 Z
+bit 229 C 0 *
+bit 228 I 1 PHY0Rx0D1
+bit 227 C 0 *
+bit 226 B 1 RejectPkt0_GPIO30 227 0 Z
+bit 225 C 0 *
+bit 224 B 1 RejectPkt1_GPIO31 225 0 Z
+bit 223 C 0 *
+bit 222 B 1 GPIO2_TS2E 223 0 Z
+bit 221 C 0 *
+bit 220 B 1 GPIO3_TS1O 221 0 Z
+bit 219 C 0 *
+bit 218 B 1 GPIO4_TS2O 219 0 Z
+bit 217 C 0 *
+bit 216 B 1 IRQ0_GPIO17 217 0 Z
+bit 215 C 0 *
+bit 214 B 1 IRQ1_GPIO18 215 0 Z
+bit 213 C 0 *
+bit 212 B 1 IRQ2_GPIO19 213 0 Z
+bit 211 C 0 *
+bit 210 B 1 GPIO5_TS3 211 0 Z
+bit 209 C 0 *
+bit 208 B 1 IRQ3_GPIO20 209 0 Z
+bit 207 C 0 *
+bit 206 B 1 GPIO6_TS4 207 0 Z
+bit 205 C 0 *
+bit 204 B 1 GPIO7_TS5 205 0 Z
+bit 203 C 0 *
+bit 202 B 1 GPIO8_TS6 203 0 Z
+bit 201 C 0 *
+bit 200 B 1 GPIO9_TrcClk 201 0 Z
+bit 199 C 0 *
+bit 198 B 1 IRQ4_GPIO21 199 0 Z
+bit 197 C 0 *
+bit 196 B 1 IRQ5_GPIO22 197 0 Z
+bit 195 C 0 *
+bit 194 B 1 IRQ6_GPIO23 195 0 Z
+bit 193 B 1 PCIAD31 190 0 Z
+bit 192 B 1 PCIAD30 190 0 Z
+bit 191 B 1 PCIAD29 190 0 Z
+bit 190 C 0 *
+bit 189 B 1 PCIAD28 190 0 Z
+bit 188 B 1 PCIAD27 184 0 Z
+bit 187 B 1 PCIC0_BE3 130 0 Z
+bit 186 B 1 PCIAD26 184 0 Z
+bit 185 B 1 PCIAD25 184 0 Z
+bit 184 C 0 *
+bit 183 B 1 PCIAD24 184 0 Z
+bit 182 B 1 PCIAD23 179 0 Z
+bit 181 B 1 PCIAD22 179 0 Z
+bit 180 B 1 PCIAD21 179 0 Z
+bit 179 C 0 *
+bit 178 B 1 PCIAD20 179 0 Z
+bit 177 B 1 PCIC0_BE2 130 0 Z
+bit 176 B 1 PCIAD19 173 0 Z
+bit 175 B 1 PCIAD18 173 0 Z
+bit 174 B 1 PCIAD17 173 0 Z
+bit 173 C 0 *
+bit 172 B 1 PCIAD16 173 0 Z
+bit 171 C 0 *
+bit 170 B 1 PCIParity 171 0 Z
+bit 169 C 0 *
+bit 168 B 1 PCIPErr 169 0 Z
+bit 167 C 0 *
+bit 166 B 1 PCISErr 167 0 Z
+bit 165 B 1 PCIDevSel 163 0 Z
+bit 164 B 1 PCIStop 163 0 Z
+bit 163 C 0 *
+bit 162 B 1 PCITRDY 163 0 Z
+bit 161 C 0 *
+bit 160 B 1 PCIIRDY 161 0 Z
+bit 159 C 0 *
+bit 158 B 1 PCIFrame 159 0 Z
+bit 157 O 1 PCIReset
+bit 156 O 1 PCIGnt2 152 0 Z
+bit 155 O 1 PCIGnt1 152 0 Z
+bit 154 I 1 PCIReq2
+bit 153 I 1 PCIReq1
+bit 152 C 0 *
+bit 151 O 1 PCIGnt0_Req 152 0 Z
+bit 150 B 1 PCIAD15 142 0 Z
+bit 149 B 1 PCIAD14 142 0 Z
+bit 148 I 1 PCIReq0_Gnt
+bit 147 I 1 Halt
+bit 146 B 1 PCIAD13 142 0 Z
+bit 145 I 1 PCIIDSel
+bit 144 I 1 PCIClk
+bit 143 B 1 PCIC0_BE1 130 0 Z
+bit 142 C 0 *
+bit 141 B 1 PCIAD12 142 0 Z
+bit 140 B 1 PCIAD11 137 0 Z
+bit 139 B 1 PCIAD10 137 0 Z
+bit 138 B 1 PCIAD9 137 0 Z
+bit 137 C 0 *
+bit 136 B 1 PCIAD8 137 0 Z
+bit 135 B 1 PCIAD7 132 0 Z
+bit 134 B 1 PCIAD6 132 0 Z
+bit 133 B 1 PCIAD5 132 0 Z
+bit 132 C 0 *
+bit 131 B 1 PCIAD4 132 0 Z
+bit 130 C 0 *
+bit 129 B 1 PCIC0_BE0 130 0 Z
+bit 128 B 1 PCIAD3 125 0 Z
+bit 127 B 1 PCIAD2 125 0 Z
+bit 126 B 1 PCIAD1 125 0 Z
+bit 125 C 0 *
+bit 124 B 1 PCIAD0 125 0 Z
+bit 123 C 0 *
+bit 122 O 1 PCIINT_PerWE 123 0 Z
+bit 121 O 1 EMC0Tx1En
+bit 120 O 1 EMC0Tx1Err
+bit 119 O 1 EMC0Tx1D0
+bit 118 O 1 EMC0Tx1D3
+bit 117 O 1 EMC0Tx1D2
+bit 116 O 1 EMC0Tx1D1
+bit 115 O 1 PerAddr31
+bit 114 O 1 PerAddr30
+bit 113 O 1 PerAddr29
+bit 112 O 1 PerAddr28
+bit 111 O 1 PerAddr27
+bit 110 O 1 PerAddr26
+bit 109 O 1 PerAddr25
+bit 108 O 1 PerAddr24
+bit 107 O 1 PerAddr23
+bit 106 O 1 PerAddr22
+bit 105 O 1 PerAddr21
+bit 104 O 1 PerAddr20
+bit 103 O 1 PerAddr19
+bit 102 O 1 PerAddr18
+bit 101 C 0 *
+bit 100 B 1 PerBlast_GPIO0 101 0 Z
+bit 99 O 1 PerAddr17
+bit 98 O 1 PerAddr16
+bit 97 O 1 PerAddr15
+bit 96 O 1 PerAddr14
+bit 95 O 1 PerAddr13
+bit 94 O 1 PerAddr12
+bit 93 O 1 PerAddr11
+bit 92 O 1 PerAddr10
+bit 91 O 1 PerAddr9
+bit 90 O 1 PerAddr8
+bit 89 O 1 PerAddr7
+bit 88 O 1 PerAddr6
+bit 87 I 1 PHY0Tx1Clk
+bit 86 C 0 *
+bit 85 B 1 PerAddr5_GPIO16 86 0 Z
+bit 84 I 1 PHY0CrS1
+bit 83 I 1 PHY0Rx1DV
+bit 82 I 1 PHY0Col1
+bit 81 C 0 *
+bit 80 B 1 PerAddr4_GPIO15 81 0 Z
+bit 79 C 0 *
+bit 78 B 1 PerAddr3_GPIO14 79 0 Z
+bit 77 O 1 PerClk
+bit 76 C 0 *
+bit 75 B 1 PerCS4_GPIO13 76 0 Z
+bit 74 I 1 PerReady
+bit 73 O 1 ExtReset
+bit 72 I 1 PHY0Rx1Err
+bit 71 C 0 *
+bit 70 B 1 PerCS1_GPIO10 71 0 Z
+bit 69 O 1 PerCS0
+bit 68 C 0 *
+bit 67 B 1 PerCS3_GPIO12 68 0 Z
+bit 66 O 1 PerRnW
+bit 65 C 0 *
+bit 64 B 1 PerData15 43 0 Z
+bit 63 B 1 PerCS2_GPIO11 65 0 Z
+bit 62 O 1 PerOE
+bit 61 I 1 PHY0Rx1Clk
+bit 60 O 1 PerWBE1
+bit 59 O 1 PerWBE0
+bit 58 B 1 PerData12 43 0 Z
+bit 57 I 1 PHY0Rx1D3
+bit 56 B 1 PerData14 43 0 Z
+bit 55 B 1 PerData13 43 0 Z
+bit 54 I 1 PHY0Rx1D2
+bit 53 B 1 PerData11 43 0 Z
+bit 52 I 1 PHY0Rx1D1
+bit 51 B 1 PerData10 43 0 Z
+bit 50 B 1 PerData9 43 0 Z
+bit 49 C 0 *
+bit 48 B 1 UART1_Tx_GPIO29 49 0 Z
+bit 47 C 0 *
+bit 46 B 1 UART1_Rx_GPIO28 47 0 Z
+bit 45 C 0 *
+bit 44 B 1 UART0_DTR_GPIO27 45 0 Z
+bit 43 C 0 *
+bit 42 B 1 PerData8 43 0 Z
+bit 41 B 1 PerData7 25 0 Z
+bit 40 C 0 *
+bit 39 B 1 UART0_RI_GPIO26 40 0 Z
+bit 38 C 0 *
+bit 37 B 1 UART0_DSR_GPIO25 38 0 Z
+bit 36 B 1 PerData6 25 0 Z
+bit 35 B 1 PerData5 25 0 Z
+bit 34 O 1 EMC0Tx0D2
+bit 33 B 1 PerData4 25 0 Z
+bit 32 B 1 PerData3 25 0 Z
+bit 31 C 0 *
+bit 30 B 1 UART0_DCD_GPIO24 31 0 Z
+bit 29 B 1 UART0_RTS 229 0 Z
+bit 28 O 1 EMC0Tx0D1
+bit 27 B 1 PerData2 25 0 Z
+bit 26 B 1 PerData1 25 0 Z
+bit 25 C 0 *
+bit 24 B 1 PerData0 25 0 Z
+bit 23 O 1 EMC0Tx0D3
+bit 22 I 1 PHY0Rx1D0
+bit 21 B 1 UART0_Tx 229 0 Z
+bit 20 B 1 MemData31 7 0 Z
+bit 19 B 1 MemData30 7 0 Z
+bit 18 I 1 UART0_Rx
+bit 17 B 1 MemData29 7 0 Z
+bit 16 B 1 MemData28 7 0 Z
+bit 15 I 1 UART0_CTS
+bit 14 O 1 DQM3
+bit 13 O 1 EMC0Tx0D0
+bit 12 B 1 MemData27 7 0 Z
+bit 11 B 1 MemData26 7 0 Z
+bit 10 B 1 MemData25 7 0 Z
+bit 9 O 1 EMC0Tx0Err
+bit 8 O 1 EMC0Tx0En
+bit 7 C 0 *
+bit 6 B 1 MemData24 7 0 Z
+bit 5 B 1 MemData23 290 0 Z
+bit 4 B 1 MemData22 290 0 Z
+bit 3 C 0 *
+bit 2 B 1 IICSDA 3 0 Z
+bit 1 B 1 MemData21 290 0 Z
+bit 0 O 1 DQM2
+
+initbus ppc405ep
+endian big
--- /dev/null
+#
+# $Id$
+#
+# Copyright (C) 2002 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Marcel Telka <marcel@telka.sk>, 2002.
+#
+
+# bits 31-28 of the Device Identification Register
+
+0001 ppc440gx A
+0010 ppc440gx B
+0011 ppc440gx C
--- /dev/null
+#
+# $Id$
+#
+# JTAG declarations for IBM PPC440GX
+# Copyright (C) 2002 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Marcel Telka <marcel@telka.sk>, 2002.
+#
+
+
+signal DMAACK0 N05
+signal DMAACK1 P07
+signal DMAACK2 P06
+signal DMAACK3 P11
+signal DMAEOT0 R16
+signal DMAEOT1 P15
+signal DMAEOT2 P16
+signal DMAEOT3 M16
+signal DMAREQ0 R03
+signal DMAREQ1 M11
+signal DMAREQ2 N11
+signal DMAREQ3 P01
+signal EBCADR0 D11
+signal EBCADR1 C11
+signal EBCADR10 C20
+signal EBCADR11 A16
+signal EBCADR12 A13
+signal EBCADR13 B14
+signal EBCADR14 C14
+signal EBCADR15 D14
+signal EBCADR16 B20
+signal EBCADR17 L15
+signal EBCADR18 L21
+signal EBCADR19 L22
+signal EBCADR2 B11
+signal EBCADR20 M22
+signal EBCADR21 M01
+signal EBCADR22 L24
+signal EBCADR23 P24
+signal EBCADR24 T19
+signal EBCADR25 R24
+signal EBCADR26 U22
+signal EBCADR27 U24
+signal EBCADR28 N03
+signal EBCADR29 V20
+signal EBCADR3 A12
+signal EBCADR30 V23
+signal EBCADR31 V21
+signal EBCADR4 A19
+signal EBCADR5 D18
+signal EBCADR6 E11
+signal EBCADR7 M03
+signal EBCADR8 N01
+signal EBCADR9 E14
+signal EBCBE0_N T18
+signal EBCBE1_N V19
+signal EBCBE2_N W22
+signal EBCBE3_N W24
+signal EBCBLAST_N C07
+signal EBCCS0_N E17
+signal EBCCS1_N L10
+signal EBCCS2_N V04
+signal EBCCS3_N T24
+signal EBCCS4_N L03
+signal EBCCS5_N T03
+signal EBCCS6_N L13
+signal EBCCS7_N U03
+signal EBCDATA0 H24
+signal EBCDATA1 H22
+signal EBCDATA10 J19
+signal EBCDATA11 J18
+signal EBCDATA12 J17
+signal EBCDATA13 J15
+signal EBCDATA14 J14
+signal EBCDATA15 J13
+signal EBCDATA16 J12
+signal EBCDATA17 J11
+signal EBCDATA18 J10
+signal EBCDATA19 J09
+signal EBCDATA2 H20
+signal EBCDATA20 L14
+signal EBCDATA21 K24
+signal EBCDATA22 K22
+signal EBCDATA23 K20
+signal EBCDATA24 K18
+signal EBCDATA25 K16
+signal EBCDATA26 K14
+signal EBCDATA27 K11
+signal EBCDATA28 K09
+signal EBCDATA29 L19
+signal EBCDATA3 G20
+signal EBCDATA30 L17
+signal EBCDATA31 L16
+signal EBCDATA4 G19
+signal EBCDATA5 H18
+signal EBCDATA6 J23
+signal EBCDATA7 J22
+signal EBCDATA8 J21
+signal EBCDATA9 J20
+signal EBCOE_N M09
+signal EBCPAR0 T23
+signal EBCPAR1 T22
+signal EBCPAR2 W20
+signal EBCPAR3 U20
+signal EBCREADY N07
+signal EBCRNW P05
+signal EBCWE_N P02
+signal EBMIBUSREQ AA24
+signal EBMICK U18
+signal EBMIERR P21
+signal EBMIEXTACK_N AA22
+signal EBMIEXTREQ_N AB23
+signal EBMIHOLDACK Y21
+signal EBMIHOLDREQ Y23
+signal EBMIRESET_N T17
+signal ENETCOL J07
+signal ENETCRS K07
+signal ENETMDCK J08
+signal ENETMDIO L05
+signal ENETRXCK J02
+signal ENETRXD0 G03
+signal ENETRXD1 E01
+signal ENETRXD2 A07
+signal ENETRXD3 H09
+signal ENETRXDV K01
+signal ENETRXER K03
+signal ENETTXCK J06
+signal ENETTXD0 L09
+signal ENETTXD1 K05
+signal ENETTXD2 J04
+signal ENETTXD3 J03
+signal ENETTXEN L06
+signal ENETTXER C05
+signal GMC1RXCTL P04
+signal GMC1TXCTL L07
+signal GMCREFCLK L01
+signal IIC0SCK G11
+signal IIC0SDATA G13
+signal IIC1SCK_GPIO16 H11
+signal IIC1SDATA_GPIO17 H14
+signal IRQ0_GPIO0 N18
+signal IRQ10_GPIO10 V18
+signal IRQ1_GPIO1 L20
+signal IRQ2_GPIO2 P20
+signal IRQ3_GPIO3 L18
+signal IRQ4_GPIO4 N14
+signal IRQ5_GPIO5 M20
+signal IRQ6_GPIO6 M14
+signal IRQ7_GPIO7 P18
+signal IRQ8_GPIO8 N20
+signal IRQ9_GPIO9 P22
+signal JTAGTCK V22
+signal JTAGTDI Y24
+signal JTAGTDO Y22
+signal JTAGTMS AB22
+signal JTAGTRST_N N24
+signal LSSD_RE L02
+signal LTIDRINH2 A05
+signal LTITESTEN M05
+signal MEMADR0 Y19
+signal MEMADR1 AD20
+signal MEMADR10 W16
+signal MEMADR11 Y11
+signal MEMADR12 V10
+signal MEMADR2 Y20
+signal MEMADR3 AB20
+signal MEMADR4 AD18
+signal MEMADR5 AD16
+signal MEMADR6 AB18
+signal MEMADR7 Y14
+signal MEMADR8 V13
+signal MEMADR9 V11
+signal MEMBA0 AA16
+signal MEMBA1 AD09
+signal MEMBSEL0_N AB15
+signal MEMBSEL1_N W14
+signal MEMBSEL2_N AD11
+signal MEMBSEL3_N AD05
+signal MEMCAS_N AB05
+signal MEMCKE0 AD17
+signal MEMCKE1 AB10
+signal MEMCKE2 Y09
+signal MEMCKE3 W09
+signal MEMDATA0 AD21
+signal MEMDATA1 AB21
+signal MEMDATA10 Y17
+signal MEMDATA11 AB16
+signal MEMDATA12 AC18
+signal MEMDATA13 Y18
+signal MEMDATA14 R14
+signal MEMDATA15 AB17
+signal MEMDATA16 AA14
+signal MEMDATA17 AD15
+signal MEMDATA18 T15
+signal MEMDATA19 V15
+signal MEMDATA2 AC22
+signal MEMDATA20 Y16
+signal MEMDATA21 U14
+signal MEMDATA22 T13
+signal MEMDATA23 Y15
+signal MEMDATA24 AD13
+signal MEMDATA25 AD14
+signal MEMDATA26 V14
+signal MEMDATA27 Y13
+signal MEMDATA28 P12
+signal MEMDATA29 AB12
+signal MEMDATA3 AA20
+signal MEMDATA30 Y12
+signal MEMDATA31 V12
+signal MEMDATA32 W11
+signal MEMDATA33 AD12
+signal MEMDATA34 Y10
+signal MEMDATA35 T12
+signal MEMDATA36 U11
+signal MEMDATA37 T11
+signal MEMDATA38 T10
+signal MEMDATA39 AD10
+signal MEMDATA4 U16
+signal MEMDATA40 AB08
+signal MEMDATA41 AD08
+signal MEMDATA42 R11
+signal MEMDATA43 Y07
+signal MEMDATA44 AC07
+signal MEMDATA45 AB09
+signal MEMDATA46 Y06
+signal MEMDATA47 Y08
+signal MEMDATA48 AA01
+signal MEMDATA49 AA03
+signal MEMDATA5 V17
+signal MEMDATA50 AB02
+signal MEMDATA51 Y01
+signal MEMDATA52 AB03
+signal MEMDATA53 Y02
+signal MEMDATA54 V07
+signal MEMDATA55 V01
+signal MEMDATA56 T08
+signal MEMDATA57 U07
+signal MEMDATA58 W01
+signal MEMDATA59 W03
+signal MEMDATA6 AD19
+signal MEMDATA60 V06
+signal MEMDATA61 T07
+signal MEMDATA62 W05
+signal MEMDATA63 U05
+signal MEMDATA7 AB19
+signal MEMDATA8 W18
+signal MEMDATA9 V16
+signal MEMDM0 T16
+signal MEMDM1 AA18
+signal MEMDM2 AB14
+signal MEMDM3 P13
+signal MEMDM4 AA09
+signal MEMDM5 AA07
+signal MEMDM6 Y03
+signal MEMDM7 V03
+signal MEMDM8 AC05
+signal MEMDQS0 AC20
+signal MEMDQS1 AC16
+signal MEMDQS2 AC14
+signal MEMDQS3 AB13
+signal MEMDQS4 AC11
+signal MEMDQS5 AC09
+signal MEMDQS6 Y04
+signal MEMDQS7 T01
+signal MEMDQS8 AA05
+signal MEMECC0 AB07
+signal MEMECC1 AB06
+signal MEMECC2 AD06
+signal MEMECC3 W07
+signal MEMECC4 U09
+signal MEMECC5 AC03
+signal MEMECC6 AB04
+signal MEMECC7 AD04
+signal MEMRAS_N AD07
+signal MEMSYSCK V09
+signal MEMSYSCK_N V08
+signal MEMVREFR1 T14
+signal MEMVREFR2 T09
+signal MEMWE_N Y05
+signal PCIACK64_N D09
+signal PCIAD0 C17
+signal PCIAD1 B09
+signal PCIAD10 C15
+signal PCIAD11 E15
+signal PCIAD12 G15
+signal PCIAD13 B16
+signal PCIAD14 C16
+signal PCIAD15 D16
+signal PCIAD16 E18
+signal PCIAD17 E19
+signal PCIAD18 F18
+signal PCIAD19 G18
+signal PCIAD2 G10
+signal PCIAD20 D20
+signal PCIAD21 A20
+signal PCIAD22 A21
+signal PCIAD23 C21
+signal PCIAD24 F22
+signal PCIAD25 B22
+signal PCIAD26 G21
+signal PCIAD27 E23
+signal PCIAD28 C23
+signal PCIAD29 F24
+signal PCIAD3 E10
+signal PCIAD30 D22
+signal PCIAD31 D24
+signal PCIAD32 H03
+signal PCIAD33 H01
+signal PCIAD34 L08
+signal PCIAD35 F01
+signal PCIAD36 D01
+signal PCIAD37 J05
+signal PCIAD38 H05
+signal PCIAD39 G02
+signal PCIAD4 C10
+signal PCIAD40 E02
+signal PCIAD41 C02
+signal PCIAD42 A08
+signal PCIAD43 G05
+signal PCIAD44 F03
+signal PCIAD45 D03
+signal PCIAD46 B03
+signal PCIAD47 H07
+signal PCIAD48 G04
+signal PCIAD49 E04
+signal PCIAD5 A10
+signal PCIAD50 C04
+signal PCIAD51 A04
+signal PCIAD52 F05
+signal PCIAD53 D05
+signal PCIAD54 B05
+signal PCIAD55 C09
+signal PCIAD56 E06
+signal PCIAD57 C06
+signal PCIAD58 A06
+signal PCIAD59 F07
+signal PCIAD6 F11
+signal PCIAD60 E07
+signal PCIAD61 D07
+signal PCIAD62 B07
+signal PCIAD63 E08
+signal PCIAD7 G12
+signal PCIAD8 G14
+signal PCIAD9 A15
+signal PCICLK E03
+signal PCIC_BE0_N F14
+signal PCIC_BE1_N E16
+signal PCIC_BE2_N C19
+signal PCIC_BE3_N F20
+signal PCIC_BE4_N C08
+signal PCIC_BE5_N C03
+signal PCIC_BE6_N G09
+signal PCIC_BE7_N F09
+signal PCIDEVSEL_N E13
+signal PCIFRAME_N A11
+signal PCIGNT0_N E22
+signal PCIGNT1_N_IRQ12 C22
+signal PCIGNT2_N N22
+signal PCIGNT3_N M18
+signal PCIGNT4_N R22
+signal PCIGNT5_N P19
+signal PCIIDSEL G07
+signal PCIINTA_N M07
+signal PCIIRDY_N E12
+signal PCIM66EN A14
+signal PCIPAR F16
+signal PCIPAR64 L04
+signal PCIPERR_N A17
+signal PCIREQ0_N E24
+signal PCIREQ1_N_IRQ11 E21
+signal PCIREQ2_N E20
+signal PCIREQ3_N R20
+signal PCIREQ4_N G23
+signal PCIREQ5_N R18
+signal PCIREQ64_N E09
+signal PCIRST_N M24
+signal PCISERR_N A18
+signal PCISTOP_N L12
+signal PCITRDY_N C12
+signal PCIX133UP G08
+signal PCIXCAP L23
+signal SYSCKTK U01
+signal SYSCLK G22
+signal SYSERROR T02
+signal SYSHALT_N V05
+signal SYSMEMPLLG AA11
+signal SYSMEMPLLV AB11
+signal SYSPCIPLLG J01
+signal SYSPCIPLLV G01
+signal SYSPLLG J24
+signal SYSPLLV G24
+signal SYSRESET_N P10
+signal TRACEBR0_GPIO18 N16
+signal TRACEBR1_GPIO19 P17
+signal TRACEBR2_GPIO20 T20
+signal TRACECK R05
+signal TRACEES0_GPIO21 T21
+signal TRACEES1_GPIO22 P23
+signal TRACEES2_GPIO23 N09
+signal TRACEES3_GPIO24 P08
+signal TRACEES4_GPIO25 T05
+signal TRACETE1_GPIO11 P14
+signal TRACETS0_GPIO26 T04
+signal TRACETS1_GPIO27 P03
+signal TRACETS2_GPIO28 R07
+signal TRACETS3_GPIO29 P09
+signal TRACETS4_GPIO30 R09
+signal TRACETS5_GPIO31 T06
+signal TRACETS6 R01
+signal UART0CTS_N C13
+signal UART0DCD_N V24
+signal UART0DSR_N V02
+signal UART0DTR_N B18
+signal UART0RI_N H16
+signal UART0RTS_N G16
+signal UART0RX G17
+signal UART0TX L11
+signal UART1DSR_CTS_GPIO14_N G06
+signal UART1RTS_DTR_GPIO15_N E05
+signal UART1RX_GPIO12 C18
+signal UART1TX_GPIO13 J16
+signal UARTSERCK A09
+signal P_GND B06 B10 B13 B17 B21 D04 D08 D12 D15 D19 D23 F02 F10 F13 F17 F21 H04 H08 H12 H15 H23 K02 K06 K10 K13 K17 K21 M04 M08 M12 M15 M19 M23 N02 N06 N10 N13 N17 N21 R04 R08 R12 R15 R19 R23 U02 U10 U13 U17 U21 W04 W08 W12 W15 W23 AA02 AA06 AA10 AA13 AA17 AA21 AC04 AC08 AC12 AC15 AC19
+signal P_VDD B08 B15 D06 D13 D21 F04 F12 F19 H02 H17 K12 K15 K23 M06 M10 M13 M21 N04 N12 N15 N19 R02 R10 R13 U08 U23 W06 W13 W21 AA04 AA12 AA19 AC10 AC17
+signal P_VDD2 B04 B12 B19 D02 D10 D17 F08 F15 F23 H06 H10 H13 H21 K04 K08 K19 M02 M17 N08 N23 R06 R17 R21 U04 U19 W02 AA23
+signal P_VDD3 U12 U15 W10 W17 AA08 AA15 AC06 AC13 AC21
+
+
+# mandatory data registers
+register BSR 769 # Boundary Scan Register
+register BR 1 # Bypass Register
+
+# optional data registers
+register DIR 32 # Device Identification Register
+
+instruction length 8
+
+# mandatory instructions
+instruction EXTEST 00000000 BSR
+instruction SAMPLE/PRELOAD 11110010 BSR
+instruction BYPASS 11111111 BR
+
+# optional instructions
+instruction CLAMP 11110110 BR
+instruction HIGHZ 11110101 BR
+instruction IDCODE 11110011 DIR
+
+
+
+# Boundary Scan Register bit definition
+bit 0 B ? PCIAD31 1 0 Z
+bit 1 C 0 PCIAD31
+bit 2 B ? PCIAD30 3 0 Z
+bit 3 C 0 PCIAD30
+bit 4 B ? PCIAD28 5 0 Z
+bit 5 C 0 PCIAD28
+bit 6 B ? PCIREQ0_N 7 0 Z
+bit 7 C 0 PCIREQ0_N
+bit 8 I ? PCIREQ1_N_IRQ11
+bit 9 B ? PCIGNT1_N_IRQ12 10 0 Z
+bit 10 C 0 PCIGNT1_N_IRQ12
+bit 11 B ? PCIAD27 12 0 Z
+bit 12 C 0 PCIAD27
+bit 13 B ? PCIAD19 14 0 Z
+bit 14 C 0 PCIAD19
+bit 15 B ? PCIGNT0_N 16 0 Z
+bit 16 C 0 PCIGNT0_N
+bit 17 B ? PCIAD29 18 0 Z
+bit 18 C 0 PCIAD29
+bit 19 B ? PCIAD24 20 0 Z
+bit 20 C 0 PCIAD24
+bit 21 I ? SYSCLK
+bit 22 B ? PCIC_BE3_N 23 0 Z
+bit 23 C 0 PCIC_BE3_N
+bit 24 B ? PCIAD26 25 0 Z
+bit 25 C 0 PCIAD26
+bit 26 B ? PCIREQ4_N 27 0 Z
+bit 27 C 0 PCIREQ4_N
+bit 28 I ? PCIXCAP
+bit 29 B ? DMAEOT3 30 0 Z
+bit 30 C 0 DMAEOT3
+bit 31 O ? PCIRST_N 32 0 Z
+bit 32 C 0 PCIRST_N
+bit 33 O ? PCIGNT3_N 34 0 Z
+bit 34 C 0 PCIGNT3_N
+bit 35 B ? IRQ5_GPIO5 36 0 Z
+bit 36 C 0 IRQ5_GPIO5
+bit 37 B ? IRQ1_GPIO1 38 0 Z
+bit 38 C 0 IRQ1_GPIO1
+bit 39 B ? IRQ3_GPIO3 40 0 Z
+bit 40 C 0 IRQ3_GPIO3
+bit 41 B ? IRQ6_GPIO6 42 0 Z
+bit 42 C 0 IRQ6_GPIO6
+bit 43 B ? IRQ4_GPIO4 44 0 Z
+bit 44 C 0 IRQ4_GPIO4
+bit 45 B ? IRQ0_GPIO0 46 0 Z
+bit 46 C 0 IRQ0_GPIO0
+bit 47 B ? IRQ2_GPIO2 48 0 Z
+bit 48 C 0 IRQ2_GPIO2
+bit 49 O ? PCIGNT2_N 50 0 Z
+bit 50 C 0 PCIGNT2_N
+bit 51 B ? IRQ8_GPIO8 52 0 Z
+bit 52 C 0 IRQ8_GPIO8
+bit 53 B ? IRQ7_GPIO7 54 0 Z
+bit 54 C 0 IRQ7_GPIO7
+bit 55 O ? PCIGNT5_N 56 0 Z
+bit 56 C 0 PCIGNT5_N
+bit 57 B ? TRACETE1_GPIO11 58 0 Z
+bit 58 C 0 TRACETE1_GPIO11
+bit 59 O ? PCIGNT4_N 60 0 Z
+bit 60 C 0 PCIGNT4_N
+bit 61 B ? PCIREQ3_N 62 0 Z
+bit 62 C 0 PCIREQ3_N
+bit 63 B ? TRACEBR0_GPIO18 64 0 Z
+bit 64 C 0 TRACEBR0_GPIO18
+bit 65 B ? TRACEBR1_GPIO19 66 0 Z
+bit 66 C 0 TRACEBR1_GPIO19
+bit 67 B ? TRACEBR2_GPIO20 68 0 Z
+bit 68 C 0 TRACEBR2_GPIO20
+bit 69 B ? TRACEES0_GPIO21 70 0 Z
+bit 70 C 0 TRACEES0_GPIO21
+bit 71 B ? TRACEES1_GPIO22 72 0 Z
+bit 72 C 0 TRACEES1_GPIO22
+bit 73 B ? IRQ9_GPIO9 74 0 Z
+bit 74 C 0 IRQ9_GPIO9
+bit 75 B ? PCIREQ5_N 76 0 Z
+bit 76 C 0 PCIREQ5_N
+bit 77 B ? DMAEOT2 78 0 Z
+bit 78 C 0 DMAEOT2
+bit 79 B ? DMAEOT0 80 0 Z
+bit 80 C 0 DMAEOT0
+bit 81 B ? EBMIERR 82 0 Z
+bit 82 C 0 EBMIERR
+bit 83 B ? DMAEOT1 84 0 Z
+bit 84 C 0 DMAEOT1
+bit 85 O ? EBMICK 86 0 Z
+bit 86 C 0 EBMICK
+bit 87 O ? EBMIRESET_N 88 0 Z
+bit 88 C 0 EBMIRESET_N
+bit 89 I ? UART0DCD_N
+bit 90 B ? IRQ10_GPIO10 91 0 Z
+bit 91 C 0 IRQ10_GPIO10
+bit 92 B ? EBMIHOLDREQ 93 0 Z
+bit 93 C 0 EBMIHOLDREQ
+bit 94 O ? EBMIHOLDACK 95 0 Z
+bit 95 C 0 EBMIHOLDACK
+bit 96 B ? EBMIEXTREQ_N 97 0 Z
+bit 97 C 0 EBMIEXTREQ_N
+bit 98 O ? EBMIEXTACK_N 99 0 Z
+bit 99 C 0 EBMIEXTACK_N
+bit 100 O ? EBMIBUSREQ 101 0 Z
+bit 101 C 0 EBMIBUSREQ
+bit 102 B ? PCIAD51 103 0 Z
+bit 103 C 0 PCIAD51
+bit 104 B ? PCIAD50 105 0 Z
+bit 105 C 0 PCIAD50
+bit 106 B ? PCIAD46 107 0 Z
+bit 107 C 0 PCIAD46
+bit 108 B ? PCIAD53 109 0 Z
+bit 109 C 0 PCIAD53
+bit 110 B ? UART1RTS_DTR_GPIO15_N 111 0 Z
+bit 111 C 0 UART1RTS_DTR_GPIO15_N
+bit 112 B ? PCIAD54 113 0 Z
+bit 113 C 0 PCIAD54
+bit 114 B ? ENETTXER 115 0 Z
+bit 115 C 0 ENETTXER
+bit 116 B ? ENETRXD2 117 0 Z
+bit 117 C 0 ENETRXD2
+bit 118 B ? ENETRXD3 119 0 Z
+bit 119 C 0 ENETRXD3
+bit 120 O ? PCIX133UP 121 0 Z
+bit 121 C 0 PCIX133UP
+bit 122 B ? PCIAD58 123 0 Z
+bit 123 C 0 PCIAD58
+bit 124 B ? PCIAD57 125 0 Z
+bit 125 C 0 PCIAD57
+bit 126 I ? UARTSERCK
+bit 127 B ? PCIAD59 128 0 Z
+bit 128 C 0 PCIAD59
+bit 129 B ? PCIC_BE6_N 130 0 Z
+bit 130 C 0 PCIC_BE6_N
+bit 131 B ? PCIAD63 132 0 Z
+bit 132 C 0 PCIAD63
+bit 133 B ? PCIAD56 134 0 Z
+bit 134 C 0 PCIAD56
+bit 135 B ? PCIAD55 136 0 Z
+bit 136 C 0 PCIAD55
+bit 137 B ? PCIAD1 138 0 Z
+bit 138 C 0 PCIAD1
+bit 139 B ? PCIAD61 140 0 Z
+bit 140 C 0 PCIAD61
+bit 141 B ? PCIAD62 142 0 Z
+bit 142 C 0 PCIAD62
+bit 143 B ? PCIAD60 144 0 Z
+bit 144 C 0 PCIAD60
+bit 145 B ? PCIAD42 146 0 Z
+bit 146 C 0 PCIAD42
+bit 147 B ? PCIC_BE4_N 148 0 Z
+bit 148 C 0 PCIC_BE4_N
+bit 149 B ? PCIAD5 150 0 Z
+bit 150 C 0 PCIAD5
+bit 151 B ? PCIC_BE7_N 152 0 Z
+bit 152 C 0 PCIC_BE7_N
+bit 153 B ? PCIAD2 154 0 Z
+bit 154 C 0 PCIAD2
+bit 155 B ? PCIACK64_N 156 0 Z
+bit 156 C 0 PCIACK64_N
+bit 157 B ? PCIREQ64_N 158 0 Z
+bit 158 C 0 PCIREQ64_N
+bit 159 B ? PCIAD3 160 0 Z
+bit 160 C 0 PCIAD3
+bit 161 B ? PCIAD4 162 0 Z
+bit 162 C 0 PCIAD4
+bit 163 B ? PCIFRAME_N 164 0 Z
+bit 164 C 0 PCIFRAME_N
+bit 165 B ? PCIAD6 166 0 Z
+bit 166 C 0 PCIAD6
+bit 167 B ? PCIAD7 168 0 Z
+bit 168 C 0 PCIAD7
+bit 169 B ? PCIIRDY_N 170 0 Z
+bit 170 C 0 PCIIRDY_N
+bit 171 B ? PCITRDY_N 172 0 Z
+bit 172 C 0 PCITRDY_N
+bit 173 B ? PCISTOP_N 174 0 Z
+bit 174 C 0 PCISTOP_N
+bit 175 I ? UART0CTS_N
+bit 176 B ? PCIDEVSEL_N 177 0 Z
+bit 177 C 0 PCIDEVSEL_N
+bit 178 B ? PCIAD8 179 0 Z
+bit 179 C 0 PCIAD8
+bit 180 B ? PCIC_BE0_N 181 0 Z
+bit 181 C 0 PCIC_BE0_N
+bit 182 I ? PCIM66EN
+bit 183 B ? PCIAD10 184 0 Z
+bit 184 C 0 PCIAD10
+bit 185 B ? PCIAD11 186 0 Z
+bit 186 C 0 PCIAD11
+bit 187 B ? PCIC_BE1_N 188 0 Z
+bit 188 C 0 PCIC_BE1_N
+bit 189 B ? PCIAD15 190 0 Z
+bit 190 C 0 PCIAD15
+bit 191 B ? PCIAD12 192 0 Z
+bit 192 C 0 PCIAD12
+bit 193 B ? PCIPAR 194 0 Z
+bit 194 C 0 PCIPAR
+bit 195 B ? PCIAD9 196 0 Z
+bit 196 C 0 PCIAD9
+bit 197 B ? PCIAD0 198 0 Z
+bit 198 C 0 PCIAD0
+bit 199 B ? PCIPERR_N 200 0 Z
+bit 200 C 0 PCIPERR_N
+bit 201 B ? PCIAD16 202 0 Z
+bit 202 C 0 PCIAD16
+bit 203 O ? UART0DTR_N 204 0 Z
+bit 204 C 0 UART0DTR_N
+bit 205 B ? PCIAD13 206 0 Z
+bit 206 C 0 PCIAD13
+bit 207 B ? PCIAD14 208 0 Z
+bit 208 C 0 PCIAD14
+bit 209 B ? PCIAD17 210 0 Z
+bit 210 C 0 PCIAD17
+bit 211 O ? UART0RTS_N 212 0 Z
+bit 212 C 0 UART0RTS_N
+bit 213 B ? PCIAD18 214 0 Z
+bit 214 C 0 PCIAD18
+bit 215 B ? UART1RX_GPIO12 216 0 Z
+bit 216 C 0 UART1RX_GPIO12
+bit 217 B ? PCIC_BE2_N 218 0 Z
+bit 218 C 0 PCIC_BE2_N
+bit 219 I ? UART0RX
+bit 220 I ? UART0RI_N
+bit 221 B ? PCISERR_N 222 0 Z
+bit 222 C 0 PCISERR_N
+bit 223 B ? UART1TX_GPIO13 224 0 Z
+bit 224 C 0 UART1TX_GPIO13
+bit 225 B ? PCIREQ2_N 226 0 Z
+bit 226 C 0 PCIREQ2_N
+bit 227 B ? PCIAD20 228 0 Z
+bit 228 C 0 PCIAD20
+bit 229 B ? PCIAD21 230 0 Z
+bit 230 C 0 PCIAD21
+bit 231 B ? PCIAD25 232 0 Z
+bit 232 C 0 PCIAD25
+bit 233 B ? PCIAD23 234 0 Z
+bit 234 C 0 PCIAD23
+bit 235 B ? PCIAD22 236 0 Z
+bit 236 C 0 PCIAD22
+bit 237 B ? MEMDATA48 238 0 Z
+bit 238 C 0 MEMDATA48
+bit 239 B ? MEMDATA49 240 0 Z
+bit 240 C 0 MEMDATA49
+bit 241 B ? MEMDATA50 242 0 Z
+bit 242 C 0 MEMDATA50
+bit 243 B ? MEMDATA51 244 0 Z
+bit 244 C 0 MEMDATA51
+bit 245 B ? MEMDQS6 246 0 Z
+bit 246 C 0 MEMDQS6
+bit 247 B ? MEMDATA52 248 0 Z
+bit 248 C 0 MEMDATA52
+bit 249 B ? MEMDATA53 250 0 Z
+bit 250 C 0 MEMDATA53
+bit 251 B ? MEMDATA54 252 0 Z
+bit 252 C 0 MEMDATA54
+bit 253 O ? MEMDM6 254 0 Z
+bit 254 C 0 MEMDM6
+bit 255 B ? MEMDATA55 256 0 Z
+bit 256 C 0 MEMDATA55
+bit 257 B ? MEMDATA56 258 0 Z
+bit 258 C 0 MEMDATA56
+bit 259 B ? MEMDATA57 260 0 Z
+bit 260 C 0 MEMDATA57
+bit 261 B ? MEMDATA58 262 0 Z
+bit 262 C 0 MEMDATA58
+bit 263 B ? MEMDATA59 264 0 Z
+bit 264 C 0 MEMDATA59
+bit 265 B ? MEMDQS7 266 0 Z
+bit 266 C 0 MEMDQS7
+bit 267 I ? MEMDM7 268 0 Z
+bit 268 C 0 MEMDM7
+bit 269 B ? MEMDATA60 270 0 Z
+bit 270 C 0 MEMDATA60
+bit 271 B ? MEMDATA61 272 0 Z
+bit 272 C 0 MEMDATA61
+bit 273 B ? MEMDATA63 274 0 Z
+bit 274 C 0 MEMDATA63
+bit 275 B ? MEMDATA62 276 0 Z
+bit 276 C 0 MEMDATA62
+bit 277 O ? SYSERROR 278 0 Z
+bit 278 C 0 SYSERROR
+bit 279 I ? UART0DSR_N
+bit 280 I ? SYSHALT_N
+bit 281 B ? SYSRESET_N 282 0 Z
+bit 282 C 0 SYSRESET_N
+bit 283 I ? SYSCKTK
+bit 284 I ? GMC1RXCTL
+bit 285 B ? TRACETS6 286 0 Z
+bit 286 C 0 TRACETS6
+bit 287 B ? TRACETS5_GPIO31 288 0 Z
+bit 288 C 0 TRACETS5_GPIO31
+bit 289 B ? TRACETS4_GPIO30 290 0 Z
+bit 290 C 0 TRACETS4_GPIO30
+bit 291 B ? TRACETS3_GPIO29 292 0 Z
+bit 292 C 0 TRACETS3_GPIO29
+bit 293 B ? TRACETS2_GPIO28 294 0 Z
+bit 294 C 0 TRACETS2_GPIO28
+bit 295 B ? TRACETS1_GPIO27 296 0 Z
+bit 296 C 0 TRACETS1_GPIO27
+bit 297 B ? TRACETS0_GPIO26 298 0 Z
+bit 298 C 0 TRACETS0_GPIO26
+bit 299 B ? TRACEES4_GPIO25 300 0 Z
+bit 300 C 0 TRACEES4_GPIO25
+bit 301 B ? TRACEES3_GPIO24 302 0 Z
+bit 302 C 0 TRACEES3_GPIO24
+bit 303 B ? TRACEES2_GPIO23 304 0 Z
+bit 304 C 0 TRACEES2_GPIO23
+bit 305 O ? TRACECK 306 0 Z
+bit 306 C 0 TRACECK
+bit 307 I ? DMAREQ0
+bit 308 B ? DMAREQ3 309 0 Z
+bit 309 C 0 DMAREQ3
+bit 310 B ? DMAACK3 311 0 Z
+bit 311 C 0 DMAACK3
+bit 312 B ? DMAACK2 313 0 Z
+bit 313 C 0 DMAACK2
+bit 314 O ? DMAACK1 315 0 Z
+bit 315 C 0 DMAACK1
+bit 316 O ? DMAACK0 317 0 Z
+bit 317 C 0 DMAACK0
+bit 318 I ? DMAREQ2
+bit 319 I ? DMAREQ1
+bit 320 B ? GMC1TXCTL 321 0 Z
+bit 321 C 0 GMC1TXCTL
+bit 322 B ? ENETMDIO 323 0 Z
+bit 323 C 0 ENETMDIO
+bit 324 O ? PCIINTA_N 325 0 Z
+bit 325 C 0 PCIINTA_N
+bit 326 O ? ENETTXEN 327 0 Z
+bit 327 C 0 ENETTXEN
+bit 328 O ? UART0TX 329 0 Z
+bit 329 C 0 UART0TX
+bit 330 I ? GMCREFCLK
+bit 331 B ? ENETRXER 332 0 Z
+bit 332 C 0 ENETRXER
+bit 333 O ? ENETTXD1 334 0 Z
+bit 334 C 0 ENETTXD1
+bit 335 B ? PCIAD34 336 0 Z
+bit 336 C 0 PCIAD34
+bit 337 B ? PCIAD37 338 0 Z
+bit 338 C 0 PCIAD37
+bit 339 O ? ENETTXD2 340 0 Z
+bit 340 C 0 ENETTXD2
+bit 341 B ? ENETCRS 342 0 Z
+bit 342 C 0 ENETCRS
+bit 343 O ? ENETTXD0 344 0 Z
+bit 344 C 0 ENETTXD0
+bit 345 I ? ENETTXCK
+bit 346 B ? ENETRXDV 347 0 Z
+bit 347 C 0 ENETRXDV
+bit 348 B ? PCIPAR64 349 0 Z
+bit 349 C 0 PCIPAR64
+bit 350 B ? PCIAD32 351 0 Z
+bit 351 C 0 PCIAD32
+bit 352 B ? PCIAD33 353 0 Z
+bit 353 C 0 PCIAD33
+bit 354 B ? PCIAD43 355 0 Z
+bit 355 C 0 PCIAD43
+bit 356 B ? PCIAD39 357 0 Z
+bit 357 C 0 PCIAD39
+bit 358 B ? PCIAD48 359 0 Z
+bit 359 C 0 PCIAD48
+bit 360 B ? ENETRXCK 361 0 Z
+bit 361 C 0 ENETRXCK
+bit 362 O ? ENETTXD3 363 0 Z
+bit 363 C 0 ENETTXD3
+bit 364 B ? PCIAD52 365 0 Z
+bit 365 C 0 PCIAD52
+bit 366 B ? PCIAD38 367 0 Z
+bit 367 C 0 PCIAD38
+bit 368 B ? ENETCOL 369 0 Z
+bit 369 C 0 ENETCOL
+bit 370 B ? UART1DSR_CTS_GPIO14_N 371 0 Z
+bit 371 C 0 UART1DSR_CTS_GPIO14_N
+bit 372 B ? ENETRXD0 373 0 Z
+bit 373 C 0 ENETRXD0
+bit 374 B ? PCIAD44 375 0 Z
+bit 375 C 0 PCIAD44
+bit 376 B ? PCIAD35 377 0 Z
+bit 377 C 0 PCIAD35
+bit 378 B ? PCIAD47 379 0 Z
+bit 379 C 0 PCIAD47
+bit 380 O ? ENETMDCK 381 0 Z
+bit 381 C 0 ENETMDCK
+bit 382 I ? PCICLK
+bit 383 I ? PCIIDSEL
+bit 384 B ? PCIAD40 385 0 Z
+bit 385 C 0 PCIAD40
+bit 386 B ? PCIC_BE5_N 387 0 Z
+bit 387 C 0 PCIC_BE5_N
+bit 388 B ? PCIAD49 389 0 Z
+bit 389 C 0 PCIAD49
+bit 390 B ? ENETRXD1 391 0 Z
+bit 391 C 0 ENETRXD1
+bit 392 B ? PCIAD41 393 0 Z
+bit 393 C 0 PCIAD41
+bit 394 B ? PCIAD45 395 0 Z
+bit 395 C 0 PCIAD45
+bit 396 B ? PCIAD36 397 0 Z
+bit 397 C 0 PCIAD36
+bit 398 B ? MEMDATA0 399 0 Z
+bit 399 C 0 MEMDATA0
+bit 400 B ? MEMDATA1 401 0 Z
+bit 401 C 0 MEMDATA1
+bit 402 B ? MEMDATA2 403 0 Z
+bit 403 C 0 MEMDATA2
+bit 404 O ? MEMADR1 405 0 Z
+bit 405 C 0 MEMADR1
+bit 406 B ? MEMDATA3 407 0 Z
+bit 407 C 0 MEMDATA3
+bit 408 O ? MEMADR2 409 0 Z
+bit 409 C 0 MEMADR2
+bit 410 B ? MEMDQS0 411 0 Z
+bit 411 C 0 MEMDQS0
+bit 412 O ? MEMDM0 413 0 Z
+bit 413 C 0 MEMDM0
+bit 414 O ? MEMADR3 415 0 Z
+bit 415 C 0 MEMADR3
+bit 416 O ? MEMADR4 417 0 Z
+bit 417 C 0 MEMADR4
+bit 418 B ? MEMDATA4 419 0 Z
+bit 419 C 0 MEMDATA4
+bit 420 B ? MEMDATA5 421 0 Z
+bit 421 C 0 MEMDATA5
+bit 422 B ? MEMDATA6 423 0 Z
+bit 423 C 0 MEMDATA6
+bit 424 B ? MEMDATA7 425 0 Z
+bit 425 C 0 MEMDATA7
+bit 426 O ? MEMADR5 427 0 Z
+bit 427 C 0 MEMADR5
+bit 428 O ? MEMADR6 429 0 Z
+bit 429 C 0 MEMADR6
+bit 430 B ? MEMDATA8 431 0 Z
+bit 431 C 0 MEMDATA8
+bit 432 B ? MEMDATA9 433 0 Z
+bit 433 C 0 MEMDATA9
+bit 434 B ? MEMDATA10 435 0 Z
+bit 435 C 0 MEMDATA10
+bit 436 O ? MEMADR0 437 0 Z
+bit 437 C 0 MEMADR0
+bit 438 B ? MEMDATA11 439 0 Z
+bit 439 C 0 MEMDATA11
+bit 440 B ? MEMDQS1 441 0 Z
+bit 441 C 0 MEMDQS1
+bit 442 O ? MEMDM1 443 0 Z
+bit 443 C 0 MEMDM1
+bit 444 B ? MEMDATA12 445 0 Z
+bit 445 C 0 MEMDATA12
+bit 446 B ? MEMDATA13 447 0 Z
+bit 447 C 0 MEMDATA13
+bit 448 B ? MEMDATA14 449 0 Z
+bit 449 C 0 MEMDATA14
+bit 450 O ? MEMCKE0 451 0 Z
+bit 451 C 0 MEMCKE0
+bit 452 B ? MEMDATA15 453 0 Z
+bit 453 C 0 MEMDATA15
+bit 454 B ? MEMDATA16 455 0 Z
+bit 455 C 0 MEMDATA16
+bit 456 B ? MEMDATA17 457 0 Z
+bit 457 C 0 MEMDATA17
+bit 458 O ? MEMADR10 459 0 Z
+bit 459 C 0 MEMADR10
+bit 460 B ? MEMDATA18 461 0 Z
+bit 461 C 0 MEMDATA18
+bit 462 B ? MEMDATA19 463 0 Z
+bit 463 C 0 MEMDATA19
+bit 464 O ? MEMDM2 465 0 Z
+bit 465 C 0 MEMDM2
+bit 466 B ? MEMDQS2 467 0 Z
+bit 467 C 0 MEMDQS2
+bit 468 O ? MEMBA0 469 0 Z
+bit 469 C 0 MEMBA0
+bit 470 B ? MEMDATA20 471 0 Z
+bit 471 C 0 MEMDATA20
+bit 472 B ? MEMDATA21 473 0 Z
+bit 473 C 0 MEMDATA21
+bit 474 B ? MEMDATA22 475 0 Z
+bit 475 C 0 MEMDATA22
+bit 476 B ? MEMDATA23 477 0 Z
+bit 477 C 0 MEMDATA23
+bit 478 O ? MEMBSEL0_N 479 0 Z
+bit 479 C 0 MEMBSEL0_N
+bit 480 B ? MEMDATA24 481 0 Z
+bit 481 C 0 MEMDATA24
+bit 482 B ? MEMDATA25 483 0 Z
+bit 483 C 0 MEMDATA25
+bit 484 O ? MEMBSEL1_N 485 0 Z
+bit 485 C 0 MEMBSEL1_N
+bit 486 B ? MEMDATA26 487 0 Z
+bit 487 C 0 MEMDATA26
+bit 488 B ? MEMDATA27 489 0 Z
+bit 489 C 0 MEMDATA27
+bit 490 B ? MEMDQS3 491 0 Z
+bit 491 C 0 MEMDQS3
+bit 492 O ? MEMADR7 493 0 Z
+bit 493 C 0 MEMADR7
+bit 494 O ? MEMADR8 495 0 Z
+bit 495 C 0 MEMADR8
+bit 496 O ? MEMDM3 497 0 Z
+bit 497 C 0 MEMDM3
+bit 498 B ? MEMDATA28 499 0 Z
+bit 499 C 0 MEMDATA28
+bit 500 O ? MEMADR9 501 0 Z
+bit 501 C 0 MEMADR9
+bit 502 O ? MEMADR11 503 0 Z
+bit 503 C 0 MEMADR11
+bit 504 B ? MEMDATA29 505 0 Z
+bit 505 C 0 MEMDATA29
+bit 506 B ? MEMDATA30 507 0 Z
+bit 507 C 0 MEMDATA30
+bit 508 B ? MEMDATA31 509 0 Z
+bit 509 C 0 MEMDATA31
+bit 510 B ? MEMDATA32 511 0 Z
+bit 511 C 0 MEMDATA32
+bit 512 O ? MEMBSEL2_N 513 0 Z
+bit 513 C 0 MEMBSEL2_N
+bit 514 B ? MEMDATA33 515 0 Z
+bit 515 C 0 MEMDATA33
+bit 516 O ? MEMCKE1 517 0 Z
+bit 517 C 0 MEMCKE1
+bit 518 B ? MEMDATA34 519 0 Z
+bit 519 C 0 MEMDATA34
+bit 520 B ? MEMDATA35 521 0 Z
+bit 521 C 0 MEMDATA35
+bit 522 B ? MEMDATA36 523 0 Z
+bit 523 C 0 MEMDATA36
+bit 524 O ? MEMCKE2 525 0 Z
+bit 525 C 0 MEMCKE2
+bit 526 O ? MEMDM4 527 0 Z
+bit 527 C 0 MEMDM4
+bit 528 B ? MEMDQS4 529 0 Z
+bit 529 C 0 MEMDQS4
+bit 530 O ? MEMADR12 531 0 Z
+bit 531 C 0 MEMADR12
+bit 532 B ? MEMDATA37 533 0 Z
+bit 533 C 0 MEMDATA37
+bit 534 B ? MEMDATA38 535 0 Z
+bit 535 C 0 MEMDATA38
+bit 536 O ? MEMCKE3 537 0 Z
+bit 537 C 0 MEMCKE3
+bit 538 B ? MEMDATA39 539 0 Z
+bit 539 C 0 MEMDATA39
+bit 540 B ? MEMDATA40 541 0 Z
+bit 541 C 0 MEMDATA40
+bit 542 B ? MEMDATA41 543 0 Z
+bit 543 C 0 MEMDATA41
+bit 544 B ? MEMDATA42 545 0 Z
+bit 545 C 0 MEMDATA42
+bit 546 B ? MEMDATA43 547 0 Z
+bit 547 C 0 MEMDATA43
+bit 548 B ? MEMDATA44 549 0 Z
+bit 549 C 0 MEMDATA44
+bit 550 O ? MEMDM5 551 0 Z
+bit 551 C 0 MEMDM5
+bit 552 B ? MEMDQS5 553 0 Z
+bit 553 C 0 MEMDQS5
+bit 554 B ? MEMDATA45 555 0 Z
+bit 555 C 0 MEMDATA45
+bit 556 B ? MEMDATA46 557 0 Z
+bit 557 C 0 MEMDATA46
+bit 558 B ? MEMDATA47 559 0 Z
+bit 559 C 0 MEMDATA47
+bit 560 O ? MEMSYSCK 561 0 Z
+bit 561 C 0 MEMSYSCK
+bit 562 B ? MEMECC0 563 0 Z
+bit 563 C 0 MEMECC0
+bit 564 O ? MEMBA1 565 0 Z
+bit 565 C 0 MEMBA1
+bit 566 B ? MEMECC1 567 0 Z
+bit 567 C 0 MEMECC1
+bit 568 B ? MEMECC2 569 0 Z
+bit 569 C 0 MEMECC2
+bit 570 B ? MEMECC3 571 0 Z
+bit 571 C 0 MEMECC3
+bit 572 B ? MEMECC4 573 0 Z
+bit 573 C 0 MEMECC4
+bit 574 O ? MEMRAS_N 575 0 Z
+bit 575 C 0 MEMRAS_N
+bit 576 O ? MEMCAS_N 577 0 Z
+bit 577 C 0 MEMCAS_N
+bit 578 O ? MEMDM8 579 0 Z
+bit 579 C 0 MEMDM8
+bit 580 O ? MEMWE_N 581 0 Z
+bit 581 C 0 MEMWE_N
+bit 582 B ? MEMDQS8 583 0 Z
+bit 583 C 0 MEMDQS8
+bit 584 O ? MEMBSEL3_N 585 0 Z
+bit 585 C 0 MEMBSEL3_N
+bit 586 B ? MEMECC5 587 0 Z
+bit 587 C 0 MEMECC5
+bit 588 B ? MEMECC6 589 0 Z
+bit 589 C 0 MEMECC6
+bit 590 B ? MEMECC7 591 0 Z
+bit 591 C 0 MEMECC7
+bit 592 B ? EBCDATA12 593 0 Z
+bit 593 C 0 EBCDATA12
+bit 594 B ? EBCDATA5 595 0 Z
+bit 595 C 0 EBCDATA5
+bit 596 B ? EBCDATA4 597 0 Z
+bit 597 C 0 EBCDATA4
+bit 598 B ? EBCDATA11 599 0 Z
+bit 599 C 0 EBCDATA11
+bit 600 B ? EBCDATA2 601 0 Z
+bit 601 C 0 EBCDATA2
+bit 602 B ? EBCDATA7 603 0 Z
+bit 603 C 0 EBCDATA7
+bit 604 B ? EBCDATA6 605 0 Z
+bit 605 C 0 EBCDATA6
+bit 606 B ? EBCDATA3 607 0 Z
+bit 607 C 0 EBCDATA3
+bit 608 B ? EBCADR17 609 0 Z
+bit 609 C 0 EBCADR17
+bit 610 B ? EBCDATA0 611 0 Z
+bit 611 C 0 EBCDATA0
+bit 612 B ? EBCDATA1 613 0 Z
+bit 613 C 0 EBCDATA1
+bit 614 B ? EBCADR18 615 0 Z
+bit 615 C 0 EBCADR18
+bit 616 B ? EBCDATA21 617 0 Z
+bit 617 C 0 EBCDATA21
+bit 618 B ? EBCDATA10 619 0 Z
+bit 619 C 0 EBCDATA10
+bit 620 B ? EBCDATA25 621 0 Z
+bit 621 C 0 EBCDATA25
+bit 622 B ? EBCDATA31 623 0 Z
+bit 623 C 0 EBCDATA31
+bit 624 B ? EBCDATA24 625 0 Z
+bit 625 C 0 EBCDATA24
+bit 626 B ? EBCADR19 627 0 Z
+bit 627 C 0 EBCADR19
+bit 628 B ? EBCDATA8 629 0 Z
+bit 629 C 0 EBCDATA8
+bit 630 B ? EBCDATA9 631 0 Z
+bit 631 C 0 EBCDATA9
+bit 632 B ? EBCDATA30 633 0 Z
+bit 633 C 0 EBCDATA30
+bit 634 B ? EBCDATA23 635 0 Z
+bit 635 C 0 EBCDATA23
+bit 636 B ? EBCDATA22 637 0 Z
+bit 637 C 0 EBCDATA22
+bit 638 B ? EBCADR22 639 0 Z
+bit 639 C 0 EBCADR22
+bit 640 B ? EBCDATA20 641 0 Z
+bit 641 C 0 EBCDATA20
+bit 642 B ? EBCDATA29 643 0 Z
+bit 643 C 0 EBCDATA29
+bit 644 B ? EBCADR20 645 0 Z
+bit 645 C 0 EBCADR20
+bit 646 B ? EBCADR23 647 0 Z
+bit 647 C 0 EBCADR23
+bit 648 B ? EBCADR24 649 0 Z
+bit 649 C 0 EBCADR24
+bit 650 B ? EBCADR25 651 0 Z
+bit 651 C 0 EBCADR25
+bit 652 B ? EBCADR26 653 0 Z
+bit 653 C 0 EBCADR26
+bit 654 B ? EBCADR27 655 0 Z
+bit 655 C 0 EBCADR27
+bit 656 B ? EBCADR29 657 0 Z
+bit 657 C 0 EBCADR29
+bit 658 B ? EBCADR30 659 0 Z
+bit 659 C 0 EBCADR30
+bit 660 B ? EBCADR31 661 0 Z
+bit 661 C 0 EBCADR31
+bit 662 B ? EBCPAR0 663 0 Z
+bit 663 C 0 EBCPAR0
+bit 664 B ? EBCPAR1 665 0 Z
+bit 665 C 0 EBCPAR1
+bit 666 B ? EBCPAR2 667 0 Z
+bit 667 C 0 EBCPAR2
+bit 668 B ? EBCPAR3 669 0 Z
+bit 669 C 0 EBCPAR3
+bit 670 B ? EBCBE0_N 671 0 Z
+bit 671 C 0 EBCBE0_N
+bit 672 B ? EBCBE1_N 673 0 Z
+bit 673 C 0 EBCBE1_N
+bit 674 O ? EBCCS3_N 675 0 Z
+bit 675 C 0 EBCCS3_N
+bit 676 B ? EBCBE2_N 677 0 Z
+bit 677 C 0 EBCBE2_N
+bit 678 B ? EBCBE3_N 679 0 Z
+bit 679 C 0 EBCBE3_N
+bit 680 B ? EBCDATA19 681 0 Z
+bit 681 C 0 EBCDATA19
+bit 682 B ? EBCBLAST_N 683 0 Z
+bit 683 C 0 EBCBLAST_N
+bit 684 B ? EBCDATA27 685 0 Z
+bit 685 C 0 EBCDATA27
+bit 686 B ? EBCADR0 687 0 Z
+bit 687 C 0 EBCADR0
+bit 688 B ? EBCDATA18 689 0 Z
+bit 689 C 0 EBCDATA18
+bit 690 B ? EBCDATA17 691 0 Z
+bit 691 C 0 EBCDATA17
+bit 692 B ? EBCADR1 693 0 Z
+bit 693 C 0 EBCADR1
+bit 694 B ? EBCADR2 695 0 Z
+bit 695 C 0 EBCADR2
+bit 696 B ? IIC1SCK_GPIO16 697 0 Z
+bit 697 C 0 IIC1SCK_GPIO16
+bit 698 B ? EBCDATA16 699 0 Z
+bit 699 C 0 EBCDATA16
+bit 700 B ? EBCADR3 701 0 Z
+bit 701 C 0 EBCADR3
+bit 702 B ? EBCADR6 703 0 Z
+bit 703 C 0 EBCADR6
+bit 704 B ? IIC0SCK 705 0 Z
+bit 705 C 0 IIC0SCK
+bit 706 O ? EBCCS6_N 707 0 Z
+bit 707 C 0 EBCCS6_N
+bit 708 B ? IIC0SDATA 709 0 Z
+bit 709 C 0 IIC0SDATA
+bit 710 B ? EBCADR9 711 0 Z
+bit 711 C 0 EBCADR9
+bit 712 B ? EBCADR12 713 0 Z
+bit 713 C 0 EBCADR12
+bit 714 B ? EBCDATA15 715 0 Z
+bit 715 C 0 EBCDATA15
+bit 716 B ? IIC1SDATA_GPIO17 717 0 Z
+bit 717 C 0 IIC1SDATA_GPIO17
+bit 718 B ? EBCADR13 719 0 Z
+bit 719 C 0 EBCADR13
+bit 720 B ? EBCADR14 721 0 Z
+bit 721 C 0 EBCADR14
+bit 722 B ? EBCDATA14 723 0 Z
+bit 723 C 0 EBCDATA14
+bit 724 B ? EBCDATA13 725 0 Z
+bit 725 C 0 EBCDATA13
+bit 726 B ? EBCADR15 727 0 Z
+bit 727 C 0 EBCADR15
+bit 728 B ? EBCDATA26 729 0 Z
+bit 729 C 0 EBCDATA26
+bit 730 B ? EBCADR5 731 0 Z
+bit 731 C 0 EBCADR5
+bit 732 O ? EBCCS0_N 733 0 Z
+bit 733 C 0 EBCCS0_N
+bit 734 B ? EBCADR11 735 0 Z
+bit 735 C 0 EBCADR11
+bit 736 B ? EBCADR4 737 0 Z
+bit 737 C 0 EBCADR4
+bit 738 B ? EBCADR10 739 0 Z
+bit 739 C 0 EBCADR10
+bit 740 B ? EBCADR16 741 0 Z
+bit 741 C 0 EBCADR16
+bit 742 O ? EBCCS5_N 743 0 Z
+bit 743 C 0 EBCCS5_N
+bit 744 O ? EBCCS2_N 745 0 Z
+bit 745 C 0 EBCCS2_N
+bit 746 O ? EBCCS7_N 747 0 Z
+bit 747 C 0 EBCCS7_N
+bit 748 O ? EBCWE_N 749 0 Z
+bit 749 C 0 EBCWE_N
+bit 750 B ? EBCADR8 751 0 Z
+bit 751 C 0 EBCADR8
+bit 752 B ? EBCADR28 753 0 Z
+bit 753 C 0 EBCADR28
+bit 754 B ? EBCRNW 755 0 Z
+bit 755 C 0 EBCRNW
+bit 756 I ? EBCREADY
+bit 757 B ? EBCADR7 758 0 Z
+bit 758 C 0 EBCADR7
+bit 759 B ? EBCADR21 760 0 Z
+bit 760 C 0 EBCADR21
+bit 761 O ? EBCOE_N 762 0 Z
+bit 762 C 0 EBCOE_N
+bit 763 O ? EBCCS4_N 764 0 Z
+bit 764 C 0 EBCCS4_N
+bit 765 B ? EBCDATA28 766 0 Z
+bit 766 C 0 EBCDATA28
+bit 767 O ? EBCCS1_N 768 0 Z
+bit 768 C 0 EBCCS1_N
--- /dev/null
+#
+# $Id$
+#
+# Copyright (C) 2002 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Marcel Telka <marcel@telka.sk>, 2002.
+#
+# Documentation:
+# [1] Intel Corporation, "Intel StrongARM SA-1110 Microprocessor
+# Developer's Manual", October 2001, Order Number: 278240-004
+# [2] Intel Corporation, "Intel XScale Microarchitecture for the PXA250
+# and PXA210 Applications Processors User's Manual", February 2002,
+# Order Number: 278525-001
+#
+
+# bits 27-12 of the Device Identification Register
+1001001001100001 sa1110 SA1110 # see 16.6.2 in [1]
+1001001001100100 pxa250 PXA250 # see 9.4.3 in [2]
+1001001001101100 pxa210 PXA210 # see 9.4.3 in [2]
+1001001001110100 ixp425 IXP425-533MHz # see IXP425 bdsl file from the devel CD
+1001001001110101 ixp425 IXP425-400MHz # see IXP425 bdsl file from the devel CD
+1001001001110111 ixp425 IXP425-266MHz # see IXP425 bdsl file from the devel CD
+1001001001100101 pxa270 PXA270 # see bulbcx.dat from Intel Jflash source code
+
--- /dev/null
+#
+# $Id$
+#
+# Copyright (C) 2002 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Christian Pellegrin <chri@ascensit.com>, 2003.
+#
+
+# bits 31-28 of the Device Identification Register
+0000 ixp425 A0
+0001 ixp425 B0
--- /dev/null
+#
+# $Id$
+#
+# JTAG declarations for IXP425
+# Copyright (C) 2002 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Christian Pellegrin <chri@ascensit.com>, 2003.
+#
+
+signal EX_CS[0] K26
+signal EX_CS[1] L24
+signal EX_CS[2] M22
+signal EX_CS[3] J26
+signal EX_CS[4] K24
+signal EX_CS[5] J25
+signal EX_CS[6] H26
+signal EX_CS[7] K23
+signal EX_WR F22
+signal EX_RD A23
+signal EX_RDY[0] V26
+signal EX_RDY[1] U24
+signal EX_RDY[2] U23
+signal EX_RDY[3] T22
+signal EX_IOWAIT B23
+signal EX_CLK M23
+signal EX_ALE D22
+signal EX_ADDR[0] G1
+signal EX_ADDR[1] H2
+signal EX_ADDR[2] H1
+signal EX_ADDR[3] H6
+signal EX_ADDR[4] J6
+signal EX_ADDR[5] J5
+signal EX_ADDR[6] J3
+signal EX_ADDR[7] J1
+signal EX_ADDR[8] K1
+signal EX_ADDR[9] K2
+signal EX_ADDR[10] K5
+signal EX_ADDR[11] K6
+signal EX_ADDR[12] L1
+signal EX_ADDR[13] L3
+signal EX_ADDR[14] M1
+signal EX_ADDR[15] M3
+signal EX_ADDR[16] N3
+signal EX_ADDR[17] P1
+signal EX_ADDR[18] R1
+signal EX_ADDR[19] P2
+signal EX_ADDR[20] R3
+signal EX_ADDR[21] T4
+signal EX_ADDR[22] R5
+signal EX_ADDR[23] P5
+signal EX_ADDR[24] T5
+signal EX_ADDR[25] P4
+signal EX_DATA[0] N4
+signal EX_DATA[1] M5
+signal EX_DATA[2] L5
+signal EX_DATA[3] T6
+signal EX_DATA[4] N6
+signal EX_DATA[5] T7
+signal EX_DATA[6] M6
+signal EX_DATA[7] M7
+signal EX_DATA[8] M9
+signal EX_DATA[9] T10
+signal EX_DATA[10] R9
+signal EX_DATA[11] T11
+signal EX_DATA[12] P11
+signal EX_DATA[13] N10
+signal EX_DATA[14] T12
+signal EX_DATA[15] M10
+signal EX_DATA[16] H3
+signal EX_DATA[17] H5
+signal EX_DATA[18] J4
+signal EX_DATA[19] K3
+signal EX_DATA[20] L4
+signal EX_DATA[21] M2
+signal EX_DATA[22] N1
+signal EX_DATA[23] T3
+signal EX_DATA[24] P6
+signal EX_DATA[25] R7
+signal EX_DATA[26] P7
+signal EX_DATA[27] P8
+signal EX_DATA[28] L8
+signal EX_DATA[29] P10
+signal EX_DATA[30] R11
+signal EX_DATA[31] P12
+signal GPIO[0] U25
+signal GPIO[1] U22
+signal GPIO[2] V24
+signal GPIO[3] W26
+signal GPIO[4] W25
+signal GPIO[5] Y26
+signal GPIO[6] V22
+signal GPIO[7] W23
+signal GPIO[8] AA26
+signal GPIO[9] V21
+signal GPIO[10] Y24
+signal GPIO[11] AB26
+signal GPIO[12] AA24
+signal GPIO[13] AC26
+signal GPIO[14] W21
+signal GPIO[15] Y22
+
+# mandatory data registers
+register BSR 498 # Boundary Scan Register
+register BR 1 # Bypass Register
+# optional data registers
+register DIR 32 # Device Identification Register
+
+instruction length 7
+# mandatory instructions
+instruction EXTEST 0000000 BSR
+instruction SAMPLE/PRELOAD 0000001 BSR
+instruction BYPASS 1111111 BR
+# optional instructions
+instruction CLAMP 1001001 BR
+instruction HIGHZ 1001010 BR
+instruction IDCODE 1111110 DIR
+
+# boundary scan register
+
+bit 497 C ? .
+bit 496 C ? .
+bit 495 C ? .
+bit 494 C ? .
+bit 493 C ? .
+bit 492 C ? .
+bit 491 C ? .
+bit 490 C ? .
+bit 489 C ? .
+bit 488 C ? .
+bit 487 C ? .
+bit 486 C ? .
+bit 485 C ? .
+bit 484 C ? .
+bit 483 C ? .
+bit 482 C ? .
+bit 481 C ? .
+bit 480 C ? .
+bit 479 C ? .
+bit 478 C ? .
+bit 477 C ? .
+bit 476 C ? .
+bit 475 C ? .
+bit 474 C ? .
+bit 473 C ? .
+bit 472 C ? .
+bit 471 C ? .
+bit 470 C ? .
+bit 469 C ? .
+bit 468 C ? .
+bit 467 C ? .
+bit 466 C ? .
+bit 465 C ? .
+bit 464 C ? .
+bit 463 C ? .
+bit 462 C ? .
+bit 461 C ? .
+bit 460 C ? .
+bit 459 C ? .
+bit 458 C ? .
+bit 457 C ? .
+bit 456 C ? .
+bit 455 C ? .
+bit 454 C ? .
+bit 453 C ? .
+bit 452 C ? .
+bit 451 C ? .
+bit 450 C ? .
+bit 449 C ? .
+bit 448 C ? .
+bit 447 C ? .
+bit 446 C ? .
+bit 445 C ? .
+bit 444 C ? .
+bit 443 C ? .
+bit 442 C ? .
+bit 441 C ? .
+bit 440 C ? .
+bit 439 C ? .
+bit 438 C ? .
+bit 437 C ? .
+bit 436 C ? .
+bit 435 C ? .
+bit 434 C ? .
+bit 433 C ? .
+bit 432 C ? .
+bit 431 C ? .
+bit 430 C ? .
+bit 429 C ? .
+bit 428 C ? .
+bit 427 C ? .
+bit 426 C ? .
+bit 425 C ? .
+bit 424 C ? .
+bit 423 C ? .
+bit 422 C ? .
+bit 421 C ? .
+bit 420 C ? .
+bit 419 C ? .
+bit 418 C ? .
+bit 417 C ? .
+bit 416 C ? .
+bit 415 C ? .
+bit 414 C ? .
+bit 413 C ? .
+bit 412 C ? .
+bit 411 C ? .
+bit 410 C ? .
+bit 409 C ? .
+bit 408 C ? .
+bit 407 C ? .
+bit 406 C ? .
+bit 405 C ? .
+bit 404 C ? .
+bit 403 C ? .
+bit 402 C ? .
+bit 401 C ? .
+bit 400 C ? .
+bit 399 C ? .
+bit 398 C ? .
+bit 397 C ? .
+bit 396 C ? .
+bit 395 C ? .
+bit 394 C ? .
+bit 393 C ? .
+bit 392 C ? .
+bit 391 C ? .
+bit 390 C ? .
+bit 389 C ? .
+bit 388 C ? .
+bit 387 C ? .
+bit 386 C ? .
+bit 385 C ? .
+bit 384 B ? GPIO[1] 369 1 Z
+bit 383 B ? GPIO[2] 368 1 Z
+bit 382 B ? GPIO[3] 367 1 Z
+bit 381 B ? GPIO[4] 366 1 Z
+bit 380 B ? GPIO[5] 365 1 Z
+bit 379 B ? GPIO[6] 364 1 Z
+bit 378 B ? GPIO[7] 363 1 Z
+bit 377 B ? GPIO[8] 362 1 Z
+bit 376 B ? GPIO[9] 361 1 Z
+bit 375 B ? GPIO[10] 360 1 Z
+bit 374 B ? GPIO[11] 359 1 Z
+bit 373 B ? GPIO[12] 358 1 Z
+bit 372 B ? GPIO[13] 357 1 Z
+bit 371 B ? GPIO[14] 356 1 Z
+bit 370 B ? GPIO[15] 355 1 Z
+bit 369 C ? .
+bit 368 C ? .
+bit 367 C ? .
+bit 366 C ? .
+bit 365 C ? .
+bit 364 C ? .
+bit 363 C ? .
+bit 362 C ? .
+bit 361 C ? .
+bit 360 C ? .
+bit 359 C ? .
+bit 358 C ? .
+bit 357 C ? .
+bit 356 C ? .
+bit 355 C ? .
+bit 354 I ? EX_IOWAIT
+bit 353 I ? EX_CLK
+bit 352 O ? EX_ALE 297 1 Z
+bit 351 O ? EX_ADDR[0] 296 1 Z
+bit 350 O ? EX_ADDR[1] 295 1 Z
+bit 349 O ? EX_ADDR[2] 294 1 Z
+bit 348 O ? EX_ADDR[3] 293 1 Z
+bit 347 O ? EX_ADDR[4] 292 1 Z
+bit 346 O ? EX_ADDR[5] 291 1 Z
+bit 345 O ? EX_ADDR[6] 290 1 Z
+bit 344 O ? EX_ADDR[7] 289 1 Z
+bit 343 O ? EX_ADDR[8] 288 1 Z
+bit 342 O ? EX_ADDR[9] 287 1 Z
+bit 341 O ? EX_ADDR[10] 286 1 Z
+bit 340 O ? EX_ADDR[11] 285 1 Z
+bit 339 O ? EX_ADDR[12] 284 1 Z
+bit 338 O ? EX_ADDR[13] 283 1 Z
+bit 337 O ? EX_ADDR[14] 282 1 Z
+bit 336 O ? EX_ADDR[15] 281 1 Z
+bit 335 O ? EX_ADDR[16] 280 1 Z
+bit 334 O ? EX_ADDR[17] 279 1 Z
+bit 333 O ? EX_ADDR[18] 278 1 Z
+bit 332 O ? EX_ADDR[19] 277 1 Z
+bit 331 O ? EX_ADDR[20] 276 1 Z
+bit 330 O ? EX_ADDR[21] 275 1 Z
+bit 329 O ? EX_ADDR[22] 274 1 Z
+bit 328 O ? EX_ADDR[23] 273 1 Z
+bit 327 O ? EX_WR 272 1 Z
+bit 326 O ? EX_RD 271 1 Z
+bit 325 O ? EX_CS[0] 270 1 Z
+bit 324 O ? EX_CS[1] 269 1 Z
+bit 323 O ? EX_CS[2] 268 1 Z
+bit 322 O ? EX_CS[3] 267 1 Z
+bit 321 O ? EX_CS[4] 266 1 Z
+bit 320 O ? EX_CS[5] 265 1 Z
+bit 319 O ? EX_CS[6] 264 1 Z
+bit 318 O ? EX_CS[7] 263 1 Z
+bit 317 B ? EX_DATA[0] 262 1 Z
+bit 316 B ? EX_DATA[1] 261 1 Z
+bit 315 B ? EX_DATA[2] 260 1 Z
+bit 314 B ? EX_DATA[3] 259 1 Z
+bit 313 B ? EX_DATA[4] 258 1 Z
+bit 312 B ? EX_DATA[5] 257 1 Z
+bit 311 B ? EX_DATA[6] 256 1 Z
+bit 310 B ? EX_DATA[7] 255 1 Z
+bit 309 B ? EX_DATA[8] 254 1 Z
+bit 308 B ? EX_DATA[9] 253 1 Z
+bit 307 B ? EX_DATA[10] 252 1 Z
+bit 306 B ? EX_DATA[11] 251 1 Z
+bit 305 B ? EX_DATA[12] 250 1 Z
+bit 304 B ? EX_DATA[13] 249 1 Z
+bit 303 B ? EX_DATA[14] 248 1 Z
+bit 302 B ? EX_DATA[15] 247 1 Z
+bit 301 I ? EX_RDY[0]
+bit 300 I ? EX_RDY[1]
+bit 299 I ? EX_RDY[2]
+bit 298 I ? EX_RDY[3]
+bit 297 C ? .
+bit 296 C ? .
+bit 295 C ? .
+bit 294 C ? .
+bit 293 C ? .
+bit 292 C ? .
+bit 291 C ? .
+bit 290 C ? .
+bit 289 C ? .
+bit 288 C ? .
+bit 287 C ? .
+bit 286 C ? .
+bit 285 C ? .
+bit 284 C ? .
+bit 283 C ? .
+bit 282 C ? .
+bit 281 C ? .
+bit 280 C ? .
+bit 279 C ? .
+bit 278 C ? .
+bit 277 C ? .
+bit 276 C ? .
+bit 275 C ? .
+bit 274 C ? .
+bit 273 C ? .
+bit 272 C ? .
+bit 271 C ? .
+bit 270 C ? .
+bit 269 C ? .
+bit 268 C ? .
+bit 267 C ? .
+bit 266 C ? .
+bit 265 C ? .
+bit 264 C ? .
+bit 263 C ? .
+bit 262 C ? .
+bit 261 C ? .
+bit 260 C ? .
+bit 259 C ? .
+bit 258 C ? .
+bit 257 C ? .
+bit 256 C ? .
+bit 255 C ? .
+bit 254 C ? .
+bit 253 C ? .
+bit 252 C ? .
+bit 251 C ? .
+bit 250 C ? .
+bit 249 C ? .
+bit 248 C ? .
+bit 247 C ? .
+bit 246 C ? .
+bit 245 C ? .
+bit 244 C ? .
+bit 243 C ? .
+bit 242 C ? .
+bit 241 C ? .
+bit 240 C ? .
+bit 239 C ? .
+bit 238 C ? .
+bit 237 C ? .
+bit 236 C ? .
+bit 235 C ? .
+bit 234 C ? .
+bit 233 C ? .
+bit 232 C ? .
+bit 231 C ? .
+bit 230 C ? .
+bit 229 C ? .
+bit 228 C ? .
+bit 227 C ? .
+bit 226 C ? .
+bit 225 C ? .
+bit 224 C ? .
+bit 223 C ? .
+bit 222 C ? .
+bit 221 C ? .
+bit 220 C ? .
+bit 219 C ? .
+bit 218 C ? .
+bit 217 C ? .
+bit 216 C ? .
+bit 215 C ? .
+bit 214 C ? .
+bit 213 C ? .
+bit 212 C ? .
+bit 211 C ? .
+bit 210 C ? .
+bit 209 C ? .
+bit 208 C ? .
+bit 207 C ? .
+bit 206 C ? .
+bit 205 C ? .
+bit 204 C ? .
+bit 203 C ? .
+bit 202 C ? .
+bit 201 C ? .
+bit 200 C ? .
+bit 199 C ? .
+bit 198 C ? .
+bit 197 C ? .
+bit 196 C ? .
+bit 195 C ? .
+bit 194 C ? .
+bit 193 C ? .
+bit 192 C ? .
+bit 191 C ? .
+bit 190 C ? .
+bit 189 C ? .
+bit 188 C ? .
+bit 187 C ? .
+bit 186 C ? .
+bit 185 C ? .
+bit 184 C ? .
+bit 183 C ? .
+bit 182 C ? .
+bit 181 C ? .
+bit 180 C ? .
+bit 179 C ? .
+bit 178 C ? .
+bit 177 C ? .
+bit 176 C ? .
+bit 175 C ? .
+bit 174 C ? .
+bit 173 C ? .
+bit 172 C ? .
+bit 171 C ? .
+bit 170 C ? .
+bit 169 C ? .
+bit 168 C ? .
+bit 167 C ? .
+bit 166 C ? .
+bit 165 C ? .
+bit 164 C ? .
+bit 163 C ? .
+bit 162 C ? .
+bit 161 C ? .
+bit 160 C ? .
+bit 159 C ? .
+bit 158 C ? .
+bit 157 C ? .
+bit 156 C ? .
+bit 155 C ? .
+bit 154 C ? .
+bit 153 C ? .
+bit 152 C ? .
+bit 151 C ? .
+bit 150 C ? .
+bit 149 C ? .
+bit 148 C ? .
+bit 147 C ? .
+bit 146 C ? .
+bit 145 C ? .
+bit 144 C ? .
+bit 143 C ? .
+bit 142 C ? .
+bit 141 C ? .
+bit 140 C ? .
+bit 139 C ? .
+bit 138 C ? .
+bit 137 C ? .
+bit 136 C ? .
+bit 135 C ? .
+bit 134 C ? .
+bit 133 C ? .
+bit 132 C ? .
+bit 131 C ? .
+bit 130 C ? .
+bit 129 C ? .
+bit 128 C ? .
+bit 127 C ? .
+bit 126 C ? .
+bit 125 C ? .
+bit 124 C ? .
+bit 123 C ? .
+bit 122 C ? .
+bit 121 C ? .
+bit 120 C ? .
+bit 119 C ? .
+bit 118 C ? .
+bit 117 C ? .
+bit 116 C ? .
+bit 115 C ? .
+bit 114 C ? .
+bit 113 C ? .
+bit 112 C ? .
+bit 111 C ? .
+bit 110 C ? .
+bit 109 C ? .
+bit 108 C ? .
+bit 107 C ? .
+bit 106 C ? .
+bit 105 C ? .
+bit 104 C ? .
+bit 103 C ? .
+bit 102 C ? .
+bit 101 C ? .
+bit 100 C ? .
+bit 99 C ? .
+bit 98 C ? .
+bit 97 C ? .
+bit 96 C ? .
+bit 95 C ? .
+bit 94 C ? .
+bit 93 C ? .
+bit 92 C ? .
+bit 91 C ? .
+bit 90 C ? .
+bit 89 C ? .
+bit 88 C ? .
+bit 87 C ? .
+bit 86 C ? .
+bit 85 C ? .
+bit 84 C ? .
+bit 83 C ? .
+bit 82 C ? .
+bit 81 C ? .
+bit 80 C ? .
+bit 79 C ? .
+bit 78 C ? .
+bit 77 C ? .
+bit 76 C ? .
+bit 75 C ? .
+bit 74 C ? .
+bit 73 C ? .
+bit 72 C ? .
+bit 71 C ? .
+bit 70 C ? .
+bit 69 C ? .
+bit 68 C ? .
+bit 67 C ? .
+bit 66 C ? .
+bit 65 C ? .
+bit 64 C ? .
+bit 63 C ? .
+bit 62 C ? .
+bit 61 C ? .
+bit 60 C ? .
+bit 59 C ? .
+bit 58 C ? .
+bit 57 C ? .
+bit 56 C ? .
+bit 55 C ? .
+bit 54 C ? .
+bit 53 C ? .
+bit 52 C ? .
+bit 51 C ? .
+bit 50 C ? .
+bit 49 C ? .
+bit 48 C ? .
+bit 47 C ? .
+bit 46 C ? .
+bit 45 C ? .
+bit 44 C ? .
+bit 43 C ? .
+bit 42 C ? .
+bit 41 C ? .
+bit 40 C ? .
+bit 39 C ? .
+bit 38 C ? .
+bit 37 C ? .
+bit 36 C ? .
+bit 35 C ? .
+bit 34 C ? .
+bit 33 C ? .
+bit 32 C ? .
+bit 31 C ? .
+bit 30 C ? .
+bit 29 C ? .
+bit 28 C ? .
+bit 27 C ? .
+bit 26 C ? .
+bit 25 C ? .
+bit 24 C ? .
+bit 23 C ? .
+bit 22 C ? .
+bit 21 C ? .
+bit 20 C ? .
+bit 19 C ? .
+bit 18 C ? .
+bit 17 C ? .
+bit 16 C ? .
+bit 15 C ? .
+bit 14 C ? .
+bit 13 C ? .
+bit 12 C ? .
+bit 11 C ? .
+bit 10 C ? .
+bit 9 C ? .
+bit 8 C ? .
+bit 7 C ? .
+bit 6 C ? .
+bit 5 C ? .
+bit 4 C ? .
+bit 3 C ? .
+bit 2 C ? .
+bit 1 C ? .
+bit 0 C ? .
+
+initbus ixp425
--- /dev/null
+#
+# $Id$
+#
+# Copyright (C) 2002 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Marcel Telka <marcel@telka.sk>, 2002.
+#
+# Documentation:
+# [1] Intel Corporation, "Intel PXA250 and PXA210 Application Processors
+# Specification Update", February 2003, Order Number: 278534-012
+#
+
+# bits 31-28 of the Device Identification Register
+# see D55. in [1]
+0000 pxa250 A0
+0001 pxa250 A1
+0010 pxa250 B0
+0011 pxa250 B1
+0100 pxa250 B2
+0101 pxa250c0 C0
+0110 pxa250c0 PXA255A0
--- /dev/null
+#
+# $Id$
+#
+# JTAG declarations for PXA250
+# Copyright (C) 2002 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Marcel Telka <marcel@telka.sk>, 2002.
+#
+# Documentation:
+# [1] Intel Corporation, "Intel PXA250 and PXA210 Application Processors
+# Design Guide", February 2002, Order Number: 278523-001
+# [2] Intel Corporation, "Intel XScale Microarchitecture for the PXA250
+# and PXA210 Application Processors User's Manual", February 2002,
+# Order Number: 278525-001
+# [3] Intel Corporation, "BSDL description for top level entity pxa250_jtag", 2002-03-06,
+# http://developer.intel.com/design/pca/applicationsprocessors/bsdl/PXA250_bsdl_bga.txt
+# [4] Intel Corporation, "Intel PXA250 and PXA210 Application Processors
+# Specification Update", January 2003, Order Number: 278534-011
+#
+
+# see Table 1-4 in [1] and D29. in [4]
+signal nACRESET D10
+signal nBATT_FAULT K12
+signal BOOT_SEL[0] G16
+signal BOOT_SEL[1] G13
+signal BOOT_SEL[2] F13
+signal nCS[0] N8
+signal DQM[0] M8
+signal DQM[1] B1
+signal DQM[2] B2
+signal DQM[3] L7
+signal GPIO[0] L10
+signal GPIO[1] L12
+signal GPIO[2] L13
+signal GPIO[3] K14
+signal GPIO[4] J12
+signal GPIO[5] J11
+signal GPIO[6] H14
+signal GPIO[7] G15
+signal GPIO[8] F14
+signal GPIO[9] F12
+signal GPIO[10] F7
+signal GPIO[11] A7
+signal GPIO[12] B6
+signal GPIO[13] B5
+signal GPIO[14] B4
+signal GPIO[15] T8
+signal GPIO[16] E12
+signal GPIO[17] D12
+signal GPIO[18] C1
+signal GPIO[19] N14
+signal GPIO[20] N12
+signal GPIO[21] N15
+signal GPIO[22] M12
+signal GPIO[23] F9
+signal GPIO[24] E9
+signal GPIO[25] D9
+signal GPIO[26] A9
+signal GPIO[27] B9
+signal GPIO[28] C9
+signal GPIO[29] E10
+signal GPIO[30] A10
+signal GPIO[31] E11
+signal GPIO[32] A16
+signal GPIO[33] T13
+signal GPIO[34] A13
+signal GPIO[35] A14
+signal GPIO[36] A12
+signal GPIO[37] B11
+signal GPIO[38] B10
+signal GPIO[39] E13
+signal GPIO[40] F10
+signal GPIO[41] F8
+signal GPIO[42] B13
+signal GPIO[43] D13
+signal GPIO[44] A15
+signal GPIO[45] B14
+signal GPIO[46] B15
+signal GPIO[47] C15
+signal GPIO[48] P13
+signal GPIO[49] T14
+signal GPIO[50] T15
+signal GPIO[51] R15
+signal GPIO[52] P14
+signal GPIO[53] R16
+signal GPIO[54] P16
+signal GPIO[55] M13
+signal GPIO[56] N16
+signal GPIO[57] M16
+signal GPIO[58] E7
+signal GPIO[59] D7
+signal GPIO[60] C7
+signal GPIO[61] B7
+signal GPIO[62] E6
+signal GPIO[63] D6
+signal GPIO[64] E5
+signal GPIO[65] A6
+signal GPIO[66] C5
+signal GPIO[67] A5
+signal GPIO[68] D5
+signal GPIO[69] A4
+signal GPIO[70] A3
+signal GPIO[71] A2
+signal GPIO[72] C3
+signal GPIO[73] B3
+signal GPIO[74] E8
+signal GPIO[75] D8
+signal GPIO[76] B8
+signal GPIO[77] A8
+signal GPIO[78] P9
+signal GPIO[79] T9
+signal GPIO[80] R13
+signal MA[0] G1
+signal MA[1] H2
+signal MA[2] H1
+signal MA[3] H6
+signal MA[4] J6
+signal MA[5] J5
+signal MA[6] J3
+signal MA[7] J1
+signal MA[8] K1
+signal MA[9] K2
+signal MA[10] K5
+signal MA[11] K6
+signal MA[12] L1
+signal MA[13] L3
+signal MA[14] M1
+signal MA[15] M3
+signal MA[16] N3
+signal MA[17] P1
+signal MA[18] R1
+signal MA[19] P2
+signal MA[20] R3
+signal MA[21] T4
+signal MA[22] R5
+signal MA[23] P5
+signal MA[24] T5
+signal MA[25] P4
+signal MD[0] N4
+signal MD[1] M5
+signal MD[2] L5
+signal MD[3] T6
+signal MD[4] N6
+signal MD[5] T7
+signal MD[6] M6
+signal MD[7] M7
+signal MD[8] M9
+signal MD[9] T10
+signal MD[10] R9
+signal MD[11] T11
+signal MD[12] P11
+signal MD[13] N10
+signal MD[14] T12
+signal MD[15] M10
+signal MD[16] H3
+signal MD[17] H5
+signal MD[18] J4
+signal MD[19] K3
+signal MD[20] L4
+signal MD[21] M2
+signal MD[22] N1
+signal MD[23] T3
+signal MD[24] P6
+signal MD[25] R7
+signal MD[26] P7
+signal MD[27] P8
+signal MD[28] L8
+signal MD[29] P10
+signal MD[30] R11
+signal MD[31] P12
+signal MMCMD D14
+signal MMDAT B16
+signal nOE G5
+signal PEXTAL K16
+signal PLL_VCC J15
+signal PLL_VSS J16
+signal PWR_EN L11
+signal PXTAL K15
+signal RDnWR D3
+signal nRESET J13
+signal nRESET_OUT K11
+signal SCL D11
+signal SDA A11
+signal nSDCAS F3
+signal SDCKE[0] E4
+signal SDCKE[1] E3
+signal SDCLK[0] D2
+signal SDCLK[1] F5
+signal SDCLK[2] D1
+signal nSDCS[0] F1
+signal nSDCS[1] G6
+signal nSDCS[2] G3
+signal nSDCS[3] F2
+signal nSDRAS E1
+signal TCK H12
+signal TDI H15
+signal TDO H16
+signal TEST G12
+signal TESTCLK G11
+signal TEXTAL L15
+signal TXTAL L16
+signal TMS H13
+signal nTRST H11
+signal USB_N B12
+signal USB_P C12
+signal VCC F11 G7 G9 H10 J7 K8 K10 L6 L9
+signal VCCN A1 D4 F4 H4 K4 M4 M14 N5 N7 N9 N11 N13 P3 T2 T16
+signal VCCQ C6 C10 C13 D15 E14 G14 M11
+signal nVDD_FAULT K13
+signal VSS C16 H8 H9 J8 J9 T1
+signal VSSN C2 E2 G2 J2 L2 M15 N2 P15 R2 R4 R6 R8 R10 R12 R14
+signal VSSQ C4 C8 C11 C14 D16 E15 E16 F6 F15 F16 G8 G10 H7 J10 J14 K7 K9 L14
+signal nWE G4
+
+# mandatory data registers
+register BSR 385 # Boundary Scan Register (see [3])
+register BR 1 # Bypass Register
+# optional data registers
+register DIR 32 # Device Identification Register
+# user defined registers
+register DBG_SR 36 # see 10.10 in [2]
+register LDIC_SR1 33 # see 10.13.2 in [2]
+
+# see 9.3.1 in [2]
+instruction length 5
+# mandatory instructions
+instruction EXTEST 00000 BSR
+instruction SAMPLE/PRELOAD 00001 BSR
+instruction BYPASS 11111 BR
+# optional instructions
+instruction CLAMP 00100 BR
+instruction HIGHZ 01000 BR
+instruction IDCODE 11110 DIR
+# user-defined instructions
+instruction DBGRX 00010 DBG_SR
+instruction LDIC 00111 LDIC_SR1
+instruction SELDCSR 01001 DBG_SR # see 10.10.1 in [2]
+instruction DBGTX 10000 DBG_SR
+
+# see [3]
+bit 384 I ? nRESET
+bit 383 I ? BOOT_SEL[2]
+bit 382 I ? BOOT_SEL[1]
+bit 381 I ? BOOT_SEL[0]
+bit 380 I ? nBATT_FAULT
+bit 379 I ? nVDD_FAULT
+bit 378 I ? TESTCLK
+bit 377 I ? TEST
+bit 376 X ? .
+bit 375 I ? MD[31]
+bit 374 I ? MD[30]
+bit 373 I ? MD[29]
+bit 372 I ? MD[28]
+bit 371 I ? MD[27]
+bit 370 I ? MD[26]
+bit 369 I ? MD[25]
+bit 368 I ? MD[24]
+bit 367 I ? MD[23]
+bit 366 I ? MD[22]
+bit 365 I ? MD[21]
+bit 364 I ? MD[20]
+bit 363 I ? MD[19]
+bit 362 I ? MD[18]
+bit 361 I ? MD[17]
+bit 360 I ? MD[16]
+bit 359 I ? MD[15]
+bit 358 I ? MD[14]
+bit 357 I ? MD[13]
+bit 356 I ? MD[12]
+bit 355 I ? MD[11]
+bit 354 I ? MD[10]
+bit 353 I ? MD[9]
+bit 352 I ? MD[8]
+bit 351 I ? MD[7]
+bit 350 I ? MD[6]
+bit 349 I ? MD[5]
+bit 348 I ? MD[4]
+bit 347 I ? MD[3]
+bit 346 I ? MD[2]
+bit 345 I ? MD[1]
+bit 344 I ? MD[0]
+bit 343 I ? MMCMD
+bit 342 I ? MMDAT
+bit 341 I ? USB_P
+bit 340 I ? USB_N
+bit 339 I ? SDA
+bit 338 I ? SCL
+bit 337 I ? GPIO[80]
+bit 336 I ? GPIO[79]
+bit 335 I ? GPIO[78]
+bit 334 I ? GPIO[77]
+bit 333 I ? GPIO[76]
+bit 332 I ? GPIO[75]
+bit 331 I ? GPIO[74]
+bit 330 I ? GPIO[73]
+bit 329 I ? GPIO[72]
+bit 328 I ? GPIO[71]
+bit 327 I ? GPIO[70]
+bit 326 I ? GPIO[69]
+bit 325 I ? GPIO[68]
+bit 324 I ? GPIO[67]
+bit 323 I ? GPIO[66]
+bit 322 I ? GPIO[65]
+bit 321 I ? GPIO[64]
+bit 320 I ? GPIO[63]
+bit 319 I ? GPIO[62]
+bit 318 I ? GPIO[61]
+bit 317 I ? GPIO[60]
+bit 316 I ? GPIO[59]
+bit 315 I ? GPIO[58]
+bit 314 I ? GPIO[57]
+bit 313 I ? GPIO[56]
+bit 312 I ? GPIO[55]
+bit 311 I ? GPIO[54]
+bit 310 I ? GPIO[53]
+bit 309 I ? GPIO[52]
+bit 308 I ? GPIO[51]
+bit 307 I ? GPIO[50]
+bit 306 I ? GPIO[49]
+bit 305 I ? GPIO[48]
+bit 304 I ? GPIO[47]
+bit 303 I ? GPIO[46]
+bit 302 I ? GPIO[45]
+bit 301 I ? GPIO[44]
+bit 300 I ? GPIO[43]
+bit 299 I ? GPIO[42]
+bit 298 I ? GPIO[41]
+bit 297 I ? GPIO[40]
+bit 296 I ? GPIO[39]
+bit 295 I ? GPIO[38]
+bit 294 I ? GPIO[37]
+bit 293 I ? GPIO[36]
+bit 292 I ? GPIO[35]
+bit 291 I ? GPIO[34]
+bit 290 I ? GPIO[33]
+bit 289 I ? GPIO[32]
+bit 288 I ? GPIO[31]
+bit 287 I ? GPIO[30]
+bit 286 I ? GPIO[29]
+bit 285 I ? GPIO[28]
+bit 284 I ? GPIO[27]
+bit 283 I ? GPIO[26]
+bit 282 I ? GPIO[25]
+bit 281 I ? GPIO[24]
+bit 280 I ? GPIO[23]
+bit 279 I ? GPIO[22]
+bit 278 I ? GPIO[21]
+bit 277 I ? GPIO[20]
+bit 276 I ? GPIO[19]
+bit 275 I ? GPIO[18]
+bit 274 I ? GPIO[17]
+bit 273 I ? GPIO[16]
+bit 272 I ? GPIO[15]
+bit 271 I ? GPIO[14]
+bit 270 I ? GPIO[13]
+bit 269 I ? GPIO[12]
+bit 268 I ? GPIO[11]
+bit 267 I ? GPIO[10]
+bit 266 I ? GPIO[9]
+bit 265 I ? GPIO[8]
+bit 264 I ? GPIO[7]
+bit 263 I ? GPIO[6]
+bit 262 I ? GPIO[5]
+bit 261 I ? GPIO[4]
+bit 260 I ? GPIO[3]
+bit 259 I ? GPIO[2]
+bit 258 I ? GPIO[1]
+bit 257 I ? GPIO[0]
+bit 256 O ? MA[25] 208 0 Z
+bit 255 O ? MA[24] 208 0 Z
+bit 254 O ? MA[23] 208 0 Z
+bit 253 O ? MA[22] 208 0 Z
+bit 252 O ? MA[21] 208 0 Z
+bit 251 O ? MA[20] 208 0 Z
+bit 250 O ? MA[19] 208 0 Z
+bit 249 O ? MA[18] 208 0 Z
+bit 248 O ? MA[17] 208 0 Z
+bit 247 O ? MA[16] 208 0 Z
+bit 246 O ? MA[15] 208 0 Z
+bit 245 O ? MA[14] 208 0 Z
+bit 244 O ? MA[13] 208 0 Z
+bit 243 O ? MA[12] 208 0 Z
+bit 242 O ? MA[11] 208 0 Z
+bit 241 O ? MA[10] 208 0 Z
+bit 240 O ? MA[9] 208 0 Z
+bit 239 O ? MA[8] 208 0 Z
+bit 238 O ? MA[7] 208 0 Z
+bit 237 O ? MA[6] 208 0 Z
+bit 236 O ? MA[5] 208 0 Z
+bit 235 O ? MA[4] 208 0 Z
+bit 234 O ? MA[3] 208 0 Z
+bit 233 O ? MA[2] 208 0 Z
+bit 232 O ? MA[1] 208 0 Z
+bit 231 O ? MA[0] 208 0 Z
+bit 230 O ? nCS[0] 206 0 Z
+bit 229 O ? nOE 207 0 Z
+bit 228 O ? nWE 207 0 Z
+bit 227 O ? nSDRAS 208 0 Z
+bit 226 O ? nSDCAS 208 0 Z
+bit 225 O ? DQM[3] 205 0 Z
+bit 224 O ? DQM[2] 205 0 Z
+bit 223 O ? DQM[1] 208 0 Z
+bit 222 O ? DQM[0] 208 0 Z
+bit 221 O ? nSDCS[3]
+bit 220 O ? nSDCS[2]
+bit 219 O ? nSDCS[1]
+bit 218 O ? nSDCS[0] 208 0 Z
+bit 217 O ? SDCKE[1]
+bit 216 O ? SDCKE[0]
+bit 215 O ? SDCLK[2]
+bit 214 O ? SDCLK[1] 208 0 Z
+bit 213 O ? SDCLK[0]
+bit 212 O ? RDnWR 205 0 Z
+bit 211 O ? nACRESET
+bit 210 O ? nRESET_OUT
+bit 209 O ? PWR_EN
+bit 208 C ? .
+bit 207 C ? .
+bit 206 C ? .
+bit 205 C ? .
+bit 204 O ? MD[31] 84 0 Z
+bit 203 O ? MD[30] 84 0 Z
+bit 202 O ? MD[29] 84 0 Z
+bit 201 O ? MD[28] 84 0 Z
+bit 200 O ? MD[27] 84 0 Z
+bit 199 O ? MD[26] 84 0 Z
+bit 198 O ? MD[25] 84 0 Z
+bit 197 O ? MD[24] 84 0 Z
+bit 196 O ? MD[23] 84 0 Z
+bit 195 O ? MD[22] 84 0 Z
+bit 194 O ? MD[21] 84 0 Z
+bit 193 O ? MD[20] 84 0 Z
+bit 192 O ? MD[19] 84 0 Z
+bit 191 O ? MD[18] 84 0 Z
+bit 190 O ? MD[17] 84 0 Z
+bit 189 O ? MD[16] 84 0 Z
+bit 188 O ? MD[15] 85 0 Z
+bit 187 O ? MD[14] 85 0 Z
+bit 186 O ? MD[13] 85 0 Z
+bit 185 O ? MD[12] 85 0 Z
+bit 184 O ? MD[11] 85 0 Z
+bit 183 O ? MD[10] 85 0 Z
+bit 182 O ? MD[9] 85 0 Z
+bit 181 O ? MD[8] 85 0 Z
+bit 180 O ? MD[7] 85 0 Z
+bit 179 O ? MD[6] 85 0 Z
+bit 178 O ? MD[5] 85 0 Z
+bit 177 O ? MD[4] 85 0 Z
+bit 176 O ? MD[3] 85 0 Z
+bit 175 O ? MD[2] 85 0 Z
+bit 174 O ? MD[1] 85 0 Z
+bit 173 O ? MD[0] 85 0 Z
+bit 172 O ? MMCMD 83 0 Z
+bit 171 O ? MMDAT 82 0 Z
+bit 170 O ? USB_P 81 0 Z
+bit 169 O ? USB_N 81 0 Z
+bit 168 O ? SDA # FIXME: see WEAK1 in [3]
+bit 167 O ? SCL # FIXME: see WEAK1 in [3]
+bit 166 O ? GPIO[80] 80 0 Z
+bit 165 O ? GPIO[79] 79 0 Z
+bit 164 O ? GPIO[78] 78 0 Z
+bit 163 O ? GPIO[77] 77 0 Z
+bit 162 O ? GPIO[76] 76 0 Z
+bit 161 O ? GPIO[75] 75 0 Z
+bit 160 O ? GPIO[74] 74 0 Z
+bit 159 O ? GPIO[73] 73 0 Z
+bit 158 O ? GPIO[72] 72 0 Z
+bit 157 O ? GPIO[71] 71 0 Z
+bit 156 O ? GPIO[70] 70 0 Z
+bit 155 O ? GPIO[69] 69 0 Z
+bit 154 O ? GPIO[68] 68 0 Z
+bit 153 O ? GPIO[67] 67 0 Z
+bit 152 O ? GPIO[66] 66 0 Z
+bit 151 O ? GPIO[65] 65 0 Z
+bit 150 O ? GPIO[64] 64 0 Z
+bit 149 O ? GPIO[63] 63 0 Z
+bit 148 O ? GPIO[62] 62 0 Z
+bit 147 O ? GPIO[61] 61 0 Z
+bit 146 O ? GPIO[60] 60 0 Z
+bit 145 O ? GPIO[59] 59 0 Z
+bit 144 O ? GPIO[58] 58 0 Z
+bit 143 O ? GPIO[57] 57 0 Z
+bit 142 O ? GPIO[56] 56 0 Z
+bit 141 O ? GPIO[55] 55 0 Z
+bit 140 O ? GPIO[54] 54 0 Z
+bit 139 O ? GPIO[53] 53 0 Z
+bit 138 O ? GPIO[52] 52 0 Z
+bit 137 O ? GPIO[51] 51 0 Z
+bit 136 O ? GPIO[50] 50 0 Z
+bit 135 O ? GPIO[49] 49 0 Z
+bit 134 O ? GPIO[48] 48 0 Z
+bit 133 O ? GPIO[47] 47 0 Z
+bit 132 O ? GPIO[46] 46 0 Z
+bit 131 O ? GPIO[45] 45 0 Z
+bit 130 O ? GPIO[44] 44 0 Z
+bit 129 O ? GPIO[43] 43 0 Z
+bit 128 O ? GPIO[42] 42 0 Z
+bit 127 O ? GPIO[41] 41 0 Z
+bit 126 O ? GPIO[40] 40 0 Z
+bit 125 O ? GPIO[39] 39 0 Z
+bit 124 O ? GPIO[38] 38 0 Z
+bit 123 O ? GPIO[37] 37 0 Z
+bit 122 O ? GPIO[36] 36 0 Z
+bit 121 O ? GPIO[35] 35 0 Z
+bit 120 O ? GPIO[34] 34 0 Z
+bit 119 O ? GPIO[33] 33 0 Z
+bit 118 O ? GPIO[32] 32 0 Z
+bit 117 O ? GPIO[31] 31 0 Z
+bit 116 O ? GPIO[30] 30 0 Z
+bit 115 O ? GPIO[29] 29 0 Z
+bit 114 O ? GPIO[28] 28 0 Z
+bit 113 O ? GPIO[27] 27 0 Z
+bit 112 O ? GPIO[26] 26 0 Z
+bit 111 O ? GPIO[25] 25 0 Z
+bit 110 O ? GPIO[24] 24 0 Z
+bit 109 O ? GPIO[23] 23 0 Z
+bit 108 O ? GPIO[22] 22 0 Z
+bit 107 O ? GPIO[21] 21 0 Z
+bit 106 O ? GPIO[20] 20 0 Z
+bit 105 O ? GPIO[19] 19 0 Z
+bit 104 O ? GPIO[18] 18 0 Z
+bit 103 O ? GPIO[17] 17 0 Z
+bit 102 O ? GPIO[16] 16 0 Z
+bit 101 O ? GPIO[15] 15 0 Z
+bit 100 O ? GPIO[14] 14 0 Z
+bit 99 O ? GPIO[13] 13 0 Z
+bit 98 O ? GPIO[12] 12 0 Z
+bit 97 O ? GPIO[11] 11 0 Z
+bit 96 O ? GPIO[10] 10 0 Z
+bit 95 O ? GPIO[9] 9 0 Z
+bit 94 O ? GPIO[8] 8 0 Z
+bit 93 O ? GPIO[7] 7 0 Z
+bit 92 O ? GPIO[6] 6 0 Z
+bit 91 O ? GPIO[5] 5 0 Z
+bit 90 O ? GPIO[4] 4 0 Z
+bit 89 O ? GPIO[3] 3 0 Z
+bit 88 O ? GPIO[2] 2 0 Z
+bit 87 O ? GPIO[1] 1 0 Z
+bit 86 O ? GPIO[0] 0 0 Z
+bit 85 C ? .
+bit 84 C ? .
+bit 83 C ? .
+bit 82 C ? .
+bit 81 C ? .
+bit 80 C ? .
+bit 79 C ? .
+bit 78 C ? .
+bit 77 C ? .
+bit 76 C ? .
+bit 75 C ? .
+bit 74 C ? .
+bit 73 C ? .
+bit 72 C ? .
+bit 71 C ? .
+bit 70 C ? .
+bit 69 C ? .
+bit 68 C ? .
+bit 67 C ? .
+bit 66 C ? .
+bit 65 C ? .
+bit 64 C ? .
+bit 63 C ? .
+bit 62 C ? .
+bit 61 C ? .
+bit 60 C ? .
+bit 59 C ? .
+bit 58 C ? .
+bit 57 C ? .
+bit 56 C ? .
+bit 55 C ? .
+bit 54 C ? .
+bit 53 C ? .
+bit 52 C ? .
+bit 51 C ? .
+bit 50 C ? .
+bit 49 C ? .
+bit 48 C ? .
+bit 47 C ? .
+bit 46 C ? .
+bit 45 C ? .
+bit 44 C ? .
+bit 43 C ? .
+bit 42 C ? .
+bit 41 C ? .
+bit 40 C ? .
+bit 39 C ? .
+bit 38 C ? .
+bit 37 C ? .
+bit 36 C ? .
+bit 35 C ? .
+bit 34 C ? .
+bit 33 C ? .
+bit 32 C ? .
+bit 31 C ? .
+bit 30 C ? .
+bit 29 C ? .
+bit 28 C ? .
+bit 27 C ? .
+bit 26 C ? .
+bit 25 C ? .
+bit 24 C ? .
+bit 23 C ? .
+bit 22 C ? .
+bit 21 C ? .
+bit 20 C ? .
+bit 19 C ? .
+bit 18 C ? .
+bit 17 C ? .
+bit 16 C ? .
+bit 15 C ? .
+bit 14 C ? .
+bit 13 C ? .
+bit 12 C ? .
+bit 11 C ? .
+bit 10 C ? .
+bit 9 C ? .
+bit 8 C ? .
+bit 7 C ? .
+bit 6 C ? .
+bit 5 C ? .
+bit 4 C ? .
+bit 3 C ? .
+bit 2 C ? .
+bit 1 C ? .
+bit 0 C ? .
+
+initbus pxa2x0
--- /dev/null
+#
+# $Id$
+#
+# JTAG declarations for PXA250C0
+# Copyright (C) 2002 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Marcel Telka <marcel@telka.sk>, 2002.
+#
+# Documentation:
+# [1] Intel Corporation, "Intel PXA250 and PXA210 Application Processors
+# Design Guide", February 2002, Order Number: 278523-001
+# [2] Intel Corporation, "Intel XScale Microarchitecture for the PXA250
+# and PXA210 Application Processors User's Manual", February 2002,
+# Order Number: 278525-001
+# [3] Intel Corporation, "BSDL Description for Top-Level Entity pxa26x_jtag_B0 Revision: C0 v1_6",
+# http://developer.intel.com/design/pca/applicationsprocessors/bsdl/PXA26x_bsdl_B0_v1_6.bsdl
+# [4] Intel Corporation, "Intel PXA250 and PXA210 Application Processors
+# Specification Update", January 2003, Order Number: 278534-011
+# [5] Intel Corporation, "Intel PXA26x Processor Family Developer's Manual",
+# October 2002, Order Number: 278638-001
+#
+
+# see Table 1-4 in [1] and D29. in [4]
+signal nACRESET D10
+signal nBATT_FAULT K12
+signal BOOT_SEL[0] G16
+signal BOOT_SEL[1] G13
+signal BOOT_SEL[2] F13
+signal nCS[0] N8
+signal DQM[0] M8
+signal DQM[1] B1
+signal DQM[2] B2
+signal DQM[3] L7
+signal GPIO[0] L10
+signal GPIO[1] L12
+signal GPIO[2] L13
+signal GPIO[3] K14
+signal GPIO[4] J12
+signal GPIO[5] J11
+signal GPIO[6] H14
+signal GPIO[7] G15
+signal GPIO[8] F14
+signal GPIO[9] F12
+signal GPIO[10] F7
+signal GPIO[11] A7
+signal GPIO[12] B6
+signal GPIO[13] B5
+signal GPIO[14] B4
+signal GPIO[15] T8
+signal GPIO[16] E12
+signal GPIO[17] D12
+signal GPIO[18] C1
+signal GPIO[19] N14
+signal GPIO[20] N12
+signal GPIO[21] N15
+signal GPIO[22] M12
+signal GPIO[23] F9
+signal GPIO[24] E9
+signal GPIO[25] D9
+signal GPIO[26] A9
+signal GPIO[27] B9
+signal GPIO[28] C9
+signal GPIO[29] E10
+signal GPIO[30] A10
+signal GPIO[31] E11
+signal GPIO[32] A16
+signal GPIO[33] T13
+signal GPIO[34] A13
+signal GPIO[35] A14
+signal GPIO[36] A12
+signal GPIO[37] B11
+signal GPIO[38] B10
+signal GPIO[39] E13
+signal GPIO[40] F10
+signal GPIO[41] F8
+signal GPIO[42] B13
+signal GPIO[43] D13
+signal GPIO[44] A15
+signal GPIO[45] B14
+signal GPIO[46] B15
+signal GPIO[47] C15
+signal GPIO[48] P13
+signal GPIO[49] T14
+signal GPIO[50] T15
+signal GPIO[51] R15
+signal GPIO[52] P14
+signal GPIO[53] R16
+signal GPIO[54] P16
+signal GPIO[55] M13
+signal GPIO[56] N16
+signal GPIO[57] M16
+signal GPIO[58] E7
+signal GPIO[59] D7
+signal GPIO[60] C7
+signal GPIO[61] B7
+signal GPIO[62] E6
+signal GPIO[63] D6
+signal GPIO[64] E5
+signal GPIO[65] A6
+signal GPIO[66] C5
+signal GPIO[67] A5
+signal GPIO[68] D5
+signal GPIO[69] A4
+signal GPIO[70] A3
+signal GPIO[71] A2
+signal GPIO[72] C3
+signal GPIO[73] B3
+signal GPIO[74] E8
+signal GPIO[75] D8
+signal GPIO[76] B8
+signal GPIO[77] A8
+signal GPIO[78] P9
+signal GPIO[79] T9
+signal GPIO[80] R13
+signal MA[0] G1
+signal MA[1] H2
+signal MA[2] H1
+signal MA[3] H6
+signal MA[4] J6
+signal MA[5] J5
+signal MA[6] J3
+signal MA[7] J1
+signal MA[8] K1
+signal MA[9] K2
+signal MA[10] K5
+signal MA[11] K6
+signal MA[12] L1
+signal MA[13] L3
+signal MA[14] M1
+signal MA[15] M3
+signal MA[16] N3
+signal MA[17] P1
+signal MA[18] R1
+signal MA[19] P2
+signal MA[20] R3
+signal MA[21] T4
+signal MA[22] R5
+signal MA[23] P5
+signal MA[24] T5
+signal MA[25] P4
+signal MD[0] N4
+signal MD[1] M5
+signal MD[2] L5
+signal MD[3] T6
+signal MD[4] N6
+signal MD[5] T7
+signal MD[6] M6
+signal MD[7] M7
+signal MD[8] M9
+signal MD[9] T10
+signal MD[10] R9
+signal MD[11] T11
+signal MD[12] P11
+signal MD[13] N10
+signal MD[14] T12
+signal MD[15] M10
+signal MD[16] H3
+signal MD[17] H5
+signal MD[18] J4
+signal MD[19] K3
+signal MD[20] L4
+signal MD[21] M2
+signal MD[22] N1
+signal MD[23] T3
+signal MD[24] P6
+signal MD[25] R7
+signal MD[26] P7
+signal MD[27] P8
+signal MD[28] L8
+signal MD[29] P10
+signal MD[30] R11
+signal MD[31] P12
+signal MMCMD D14
+signal MMDAT B16
+signal nOE G5
+signal PEXTAL K16
+signal PLL_VCC J15
+signal PLL_VSS J16
+signal PWR_EN L11
+signal PXTAL K15
+signal RDnWR D3
+signal nRESET J13
+signal nRESET_OUT K11
+signal SCL D11
+signal SDA A11
+signal nSDCAS F3
+signal SDCKE[0] E4
+signal SDCKE[1] E3
+signal SDCLK[0] D2
+signal SDCLK[1] F5
+signal SDCLK[2] D1
+signal nSDCS[0] F1
+signal nSDCS[1] G6
+signal nSDCS[2] G3
+signal nSDCS[3] F2
+signal nSDRAS E1
+signal TCK H12
+signal TDI H15
+signal TDO H16
+signal TEST G12
+signal TESTCLK G11
+signal TEXTAL L15
+signal TXTAL L16
+signal TMS H13
+signal nTRST H11
+signal USB_N B12
+signal USB_P C12
+signal VCC F11 G7 G9 H10 J7 K8 K10 L6 L9
+signal VCCN A1 D4 F4 H4 K4 M4 M14 N5 N7 N9 N11 N13 P3 T2 T16
+signal VCCQ C6 C10 C13 D15 E14 G14 M11
+signal nVDD_FAULT K13
+signal VSS C16 H8 H9 J8 J9 T1
+signal VSSN C2 E2 G2 J2 L2 M15 N2 P15 R2 R4 R6 R8 R10 R12 R14
+signal VSSQ C4 C8 C11 C14 D16 E15 E16 F6 F15 F16 G8 G10 H7 J10 J14 K7 K9 L14
+signal nWE G4
+
+# mandatory data registers
+register BSR 410 # Boundary Scan Register (see [3])
+register BR 1 # Bypass Register
+# optional data registers
+register DIR 32 # Device Identification Register
+# user defined registers
+register DBG_SR 36 # see 10.10 in [2]
+register LDIC_SR1 33 # see 10.13.2 in [2]
+
+# see 9.3.1 in [2]
+instruction length 5
+# mandatory instructions
+instruction EXTEST 00000 BSR
+instruction SAMPLE/PRELOAD 00001 BSR
+instruction BYPASS 11111 BR
+# optional instructions
+instruction CLAMP 00100 BR
+instruction HIGHZ 01000 BR
+instruction IDCODE 11110 DIR
+# user-defined instructions
+instruction DBGRX 00010 DBG_SR
+instruction LDIC 00111 LDIC_SR1
+instruction SELDCSR 01001 DBG_SR # see 10.10.1 in [2]
+instruction DBGTX 10000 DBG_SR
+
+# see [3]
+bit 409 I ? nRESET
+bit 408 I ? BOOT_SEL[2]
+bit 407 I ? BOOT_SEL[1]
+bit 406 I ? BOOT_SEL[0]
+bit 405 I ? nBATT_FAULT
+bit 404 I ? nVDD_FAULT
+bit 403 I ? TESTCLK
+bit 402 I ? TEST
+bit 401 X ? .
+bit 400 I ? MD[31]
+bit 399 I ? MD[30]
+bit 398 I ? MD[29]
+bit 397 I ? MD[28]
+bit 396 I ? MD[27]
+bit 395 I ? MD[26]
+bit 394 I ? MD[25]
+bit 393 I ? MD[24]
+bit 392 I ? MD[23]
+bit 391 I ? MD[22]
+bit 390 I ? MD[21]
+bit 389 I ? MD[20]
+bit 388 I ? MD[19]
+bit 387 I ? MD[18]
+bit 386 I ? MD[17]
+bit 385 I ? MD[16]
+bit 384 I ? MD[15]
+bit 383 I ? MD[14]
+bit 382 I ? MD[13]
+bit 381 I ? MD[12]
+bit 380 I ? MD[11]
+bit 379 I ? MD[10]
+bit 378 I ? MD[9]
+bit 377 I ? MD[8]
+bit 376 I ? MD[7]
+bit 375 I ? MD[6]
+bit 374 I ? MD[5]
+bit 373 I ? MD[4]
+bit 372 I ? MD[3]
+bit 371 I ? MD[2]
+bit 370 I ? MD[1]
+bit 369 I ? MD[0]
+bit 368 I ? MMCMD
+bit 367 I ? MMDAT
+bit 366 I ? USB_P
+bit 365 I ? USB_N
+bit 364 I ? SDA
+bit 363 I ? SCL
+bit 362 I ? nACRESET # see Table 2-7. in [5]
+bit 361 I ? RDnWR # see Table 2-7. in [5]
+bit 360 I ? nSDCS[3] # see Table 2-7. in [5]
+bit 359 I ? nSDCS[2] # see Table 2-7. in [5]
+bit 358 I ? GPIO[85]
+bit 357 I ? GPIO[84]
+bit 356 I ? GPIO[83]
+bit 355 I ? GPIO[82]
+bit 354 I ? GPIO[81]
+bit 353 I ? GPIO[80]
+bit 352 I ? GPIO[79]
+bit 351 I ? GPIO[78]
+bit 350 I ? GPIO[77]
+bit 349 I ? GPIO[76]
+bit 348 I ? GPIO[75]
+bit 347 I ? GPIO[74]
+bit 346 I ? GPIO[73]
+bit 345 I ? GPIO[72]
+bit 344 I ? GPIO[71]
+bit 343 I ? GPIO[70]
+bit 342 I ? GPIO[69]
+bit 341 I ? GPIO[68]
+bit 340 I ? GPIO[67]
+bit 339 I ? GPIO[66]
+bit 338 I ? GPIO[65]
+bit 337 I ? GPIO[64]
+bit 336 I ? GPIO[63]
+bit 335 I ? GPIO[62]
+bit 334 I ? GPIO[61]
+bit 333 I ? GPIO[60]
+bit 332 I ? GPIO[59]
+bit 331 I ? GPIO[58]
+bit 330 I ? GPIO[57]
+bit 329 I ? GPIO[56]
+bit 328 I ? GPIO[55]
+bit 327 I ? GPIO[54]
+bit 326 I ? GPIO[53]
+bit 325 I ? GPIO[52]
+bit 324 I ? GPIO[51]
+bit 323 I ? GPIO[50]
+bit 322 I ? GPIO[49]
+bit 321 I ? GPIO[48]
+bit 320 I ? GPIO[47]
+bit 319 I ? GPIO[46]
+bit 318 I ? GPIO[45]
+bit 317 I ? GPIO[44]
+bit 316 I ? GPIO[43]
+bit 315 I ? GPIO[42]
+bit 314 I ? GPIO[41]
+bit 313 I ? GPIO[40]
+bit 312 I ? GPIO[39]
+bit 311 I ? GPIO[38]
+bit 310 I ? GPIO[37]
+bit 309 I ? GPIO[36]
+bit 308 I ? GPIO[35]
+bit 307 I ? GPIO[34]
+bit 306 I ? GPIO[33]
+bit 305 I ? GPIO[32]
+bit 304 I ? GPIO[31]
+bit 303 I ? GPIO[30]
+bit 302 I ? GPIO[29]
+bit 301 I ? GPIO[28]
+bit 300 I ? GPIO[27]
+bit 299 I ? GPIO[26]
+bit 298 I ? GPIO[25]
+bit 297 I ? GPIO[24]
+bit 296 I ? GPIO[23]
+bit 295 I ? GPIO[22]
+bit 294 I ? GPIO[21]
+bit 293 I ? GPIO[20]
+bit 292 I ? GPIO[19]
+bit 291 I ? GPIO[18]
+bit 290 I ? GPIO[17]
+bit 289 I ? GPIO[16]
+bit 288 I ? GPIO[15]
+bit 287 I ? GPIO[14]
+bit 286 I ? GPIO[13]
+bit 285 I ? GPIO[12]
+bit 284 I ? GPIO[11]
+bit 283 I ? GPIO[10]
+bit 282 I ? GPIO[9]
+bit 281 I ? GPIO[8]
+bit 280 I ? GPIO[7]
+bit 279 I ? GPIO[6]
+bit 278 I ? GPIO[5]
+bit 277 I ? GPIO[4]
+bit 276 I ? GPIO[3]
+bit 275 I ? GPIO[2]
+bit 274 I ? GPIO[1]
+bit 273 I ? GPIO[0]
+bit 272 O ? MA[25] 226 0 Z
+bit 271 O ? MA[24] 226 0 Z
+bit 270 O ? MA[23] 226 0 Z
+bit 269 O ? MA[22] 226 0 Z
+bit 268 O ? MA[21] 226 0 Z
+bit 267 O ? MA[20] 226 0 Z
+bit 266 O ? MA[19] 226 0 Z
+bit 265 O ? MA[18] 226 0 Z
+bit 264 O ? MA[17] 226 0 Z
+bit 263 O ? MA[16] 226 0 Z
+bit 262 O ? MA[15] 226 0 Z
+bit 261 O ? MA[14] 226 0 Z
+bit 260 O ? MA[13] 226 0 Z
+bit 259 O ? MA[12] 226 0 Z
+bit 258 O ? MA[11] 226 0 Z
+bit 257 O ? MA[10] 226 0 Z
+bit 256 O ? MA[9] 226 0 Z
+bit 255 O ? MA[8] 226 0 Z
+bit 254 O ? MA[7] 226 0 Z
+bit 253 O ? MA[6] 226 0 Z
+bit 252 O ? MA[5] 226 0 Z
+bit 251 O ? MA[4] 226 0 Z
+bit 250 O ? MA[3] 226 0 Z
+bit 249 O ? MA[2] 226 0 Z
+bit 248 O ? MA[1] 226 0 Z
+bit 247 O ? MA[0] 226 0 Z
+bit 246 O ? nCS[0] 224 0 Z
+bit 245 O ? nOE 225 0 Z
+bit 244 O ? nWE 225 0 Z
+bit 243 O ? nSDRAS 226 0 Z
+bit 242 O ? nSDCAS 226 0 Z
+bit 241 O ? DQM[3] 223 0 Z
+bit 240 O ? DQM[2] 223 0 Z
+bit 239 O ? DQM[1] 226 0 Z
+bit 238 O ? DQM[0] 226 0 Z
+bit 237 C ? .
+bit 236 C ? .
+bit 235 O ? nSDCS[1]
+bit 234 O ? nSDCS[0] 226 0 Z
+bit 233 O ? SDCKE[1]
+bit 232 O ? SDCKE[0]
+bit 231 O ? SDCLK[2]
+bit 230 O ? SDCLK[1] 226 0 Z
+bit 229 O ? SDCLK[0]
+bit 228 O ? nRESET_OUT
+bit 227 O ? PWR_EN
+bit 226 C ? .
+bit 225 C ? .
+bit 224 C ? .
+bit 223 C ? .
+bit 222 O ? MD[31] 93 0 Z
+bit 221 O ? MD[30] 93 0 Z
+bit 220 O ? MD[29] 93 0 Z
+bit 219 O ? MD[28] 93 0 Z
+bit 218 O ? MD[27] 93 0 Z
+bit 217 O ? MD[26] 93 0 Z
+bit 216 O ? MD[25] 93 0 Z
+bit 215 O ? MD[24] 93 0 Z
+bit 214 O ? MD[23] 93 0 Z
+bit 213 O ? MD[22] 93 0 Z
+bit 212 O ? MD[21] 93 0 Z
+bit 211 O ? MD[20] 93 0 Z
+bit 210 O ? MD[19] 93 0 Z
+bit 209 O ? MD[18] 93 0 Z
+bit 208 O ? MD[17] 93 0 Z
+bit 207 O ? MD[16] 93 0 Z
+bit 206 O ? MD[15] 94 0 Z
+bit 205 O ? MD[14] 94 0 Z
+bit 204 O ? MD[13] 94 0 Z
+bit 203 O ? MD[12] 94 0 Z
+bit 202 O ? MD[11] 94 0 Z
+bit 201 O ? MD[10] 94 0 Z
+bit 200 O ? MD[9] 94 0 Z
+bit 199 O ? MD[8] 94 0 Z
+bit 198 O ? MD[7] 94 0 Z
+bit 197 O ? MD[6] 94 0 Z
+bit 196 O ? MD[5] 94 0 Z
+bit 195 O ? MD[4] 94 0 Z
+bit 194 O ? MD[3] 94 0 Z
+bit 193 O ? MD[2] 94 0 Z
+bit 192 O ? MD[1] 94 0 Z
+bit 191 O ? MD[0] 94 0 Z
+bit 190 O ? MMCMD 92 0 Z
+bit 189 O ? MMDAT 91 0 Z
+bit 188 O ? USB_P 90 0 Z
+bit 187 O ? USB_N 90 0 Z
+bit 186 O ? SDA 237 0 Z
+bit 185 O ? SCL 236 0 Z
+bit 184 O ? nACRESET 89 0 Z # see Table 2-7. in [5]
+bit 183 O ? RDnWR 88 0 Z # see Table 2-7. in [5]
+bit 182 O ? nSDCS[3] 87 0 Z # see Table 2-7. in [5]
+bit 181 O ? nSDCS[2] 86 0 Z # see Table 2-7. in [5]
+bit 180 O ? GPIO[85] 85 0 Z
+bit 179 O ? GPIO[84] 84 0 Z
+bit 178 O ? GPIO[83] 83 0 Z
+bit 177 O ? GPIO[82] 82 0 Z
+bit 176 O ? GPIO[81] 81 0 Z
+bit 175 O ? GPIO[80] 80 0 Z
+bit 174 O ? GPIO[79] 79 0 Z
+bit 173 O ? GPIO[78] 78 0 Z
+bit 172 O ? GPIO[77] 77 0 Z
+bit 171 O ? GPIO[76] 76 0 Z
+bit 170 O ? GPIO[75] 75 0 Z
+bit 169 O ? GPIO[74] 74 0 Z
+bit 168 O ? GPIO[73] 73 0 Z
+bit 167 O ? GPIO[72] 72 0 Z
+bit 166 O ? GPIO[71] 71 0 Z
+bit 165 O ? GPIO[70] 70 0 Z
+bit 164 O ? GPIO[69] 69 0 Z
+bit 163 O ? GPIO[68] 68 0 Z
+bit 162 O ? GPIO[67] 67 0 Z
+bit 161 O ? GPIO[66] 66 0 Z
+bit 160 O ? GPIO[65] 65 0 Z
+bit 159 O ? GPIO[64] 64 0 Z
+bit 158 O ? GPIO[63] 63 0 Z
+bit 157 O ? GPIO[62] 62 0 Z
+bit 156 O ? GPIO[61] 61 0 Z
+bit 155 O ? GPIO[60] 60 0 Z
+bit 154 O ? GPIO[59] 59 0 Z
+bit 153 O ? GPIO[58] 58 0 Z
+bit 152 O ? GPIO[57] 57 0 Z
+bit 151 O ? GPIO[56] 56 0 Z
+bit 150 O ? GPIO[55] 55 0 Z
+bit 149 O ? GPIO[54] 54 0 Z
+bit 148 O ? GPIO[53] 53 0 Z
+bit 147 O ? GPIO[52] 52 0 Z
+bit 146 O ? GPIO[51] 51 0 Z
+bit 145 O ? GPIO[50] 50 0 Z
+bit 144 O ? GPIO[49] 49 0 Z
+bit 143 O ? GPIO[48] 48 0 Z
+bit 142 O ? GPIO[47] 47 0 Z
+bit 141 O ? GPIO[46] 46 0 Z
+bit 140 O ? GPIO[45] 45 0 Z
+bit 139 O ? GPIO[44] 44 0 Z
+bit 138 O ? GPIO[43] 43 0 Z
+bit 137 O ? GPIO[42] 42 0 Z
+bit 136 O ? GPIO[41] 41 0 Z
+bit 135 O ? GPIO[40] 40 0 Z
+bit 134 O ? GPIO[39] 39 0 Z
+bit 133 O ? GPIO[38] 38 0 Z
+bit 132 O ? GPIO[37] 37 0 Z
+bit 131 O ? GPIO[36] 36 0 Z
+bit 130 O ? GPIO[35] 35 0 Z
+bit 129 O ? GPIO[34] 34 0 Z
+bit 128 O ? GPIO[33] 33 0 Z
+bit 127 O ? GPIO[32] 32 0 Z
+bit 126 O ? GPIO[31] 31 0 Z
+bit 125 O ? GPIO[30] 30 0 Z
+bit 124 O ? GPIO[29] 29 0 Z
+bit 123 O ? GPIO[28] 28 0 Z
+bit 122 O ? GPIO[27] 27 0 Z
+bit 121 O ? GPIO[26] 26 0 Z
+bit 120 O ? GPIO[25] 25 0 Z
+bit 119 O ? GPIO[24] 24 0 Z
+bit 118 O ? GPIO[23] 23 0 Z
+bit 117 O ? GPIO[22] 22 0 Z
+bit 116 O ? GPIO[21] 21 0 Z
+bit 115 O ? GPIO[20] 20 0 Z
+bit 114 O ? GPIO[19] 19 0 Z
+bit 113 O ? GPIO[18] 18 0 Z
+bit 112 O ? GPIO[17] 17 0 Z
+bit 111 O ? GPIO[16] 16 0 Z
+bit 110 O ? GPIO[15] 15 0 Z
+bit 109 O ? GPIO[14] 14 0 Z
+bit 108 O ? GPIO[13] 13 0 Z
+bit 107 O ? GPIO[12] 12 0 Z
+bit 106 O ? GPIO[11] 11 0 Z
+bit 105 O ? GPIO[10] 10 0 Z
+bit 104 O ? GPIO[9] 9 0 Z
+bit 103 O ? GPIO[8] 8 0 Z
+bit 102 O ? GPIO[7] 7 0 Z
+bit 101 O ? GPIO[6] 6 0 Z
+bit 100 O ? GPIO[5] 5 0 Z
+bit 99 O ? GPIO[4] 4 0 Z
+bit 98 O ? GPIO[3] 3 0 Z
+bit 97 O ? GPIO[2] 2 0 Z
+bit 96 O ? GPIO[1] 1 0 Z
+bit 95 O ? GPIO[0] 0 0 Z
+bit 94 C ? .
+bit 93 C ? .
+bit 92 C ? .
+bit 91 C ? .
+bit 90 C ? .
+bit 89 C ? .
+bit 88 C ? .
+bit 87 C ? .
+bit 86 C ? .
+bit 85 C ? .
+bit 84 C ? .
+bit 83 C ? .
+bit 82 C ? .
+bit 81 C ? .
+bit 80 C ? .
+bit 79 C ? .
+bit 78 C ? .
+bit 77 C ? .
+bit 76 C ? .
+bit 75 C ? .
+bit 74 C ? .
+bit 73 C ? .
+bit 72 C ? .
+bit 71 C ? .
+bit 70 C ? .
+bit 69 C ? .
+bit 68 C ? .
+bit 67 C ? .
+bit 66 C ? .
+bit 65 C ? .
+bit 64 C ? .
+bit 63 C ? .
+bit 62 C ? .
+bit 61 C ? .
+bit 60 C ? .
+bit 59 C ? .
+bit 58 C ? .
+bit 57 C ? .
+bit 56 C ? .
+bit 55 C ? .
+bit 54 C ? .
+bit 53 C ? .
+bit 52 C ? .
+bit 51 C ? .
+bit 50 C ? .
+bit 49 C ? .
+bit 48 C ? .
+bit 47 C ? .
+bit 46 C ? .
+bit 45 C ? .
+bit 44 C ? .
+bit 43 C ? .
+bit 42 C ? .
+bit 41 C ? .
+bit 40 C ? .
+bit 39 C ? .
+bit 38 C ? .
+bit 37 C ? .
+bit 36 C ? .
+bit 35 C ? .
+bit 34 C ? .
+bit 33 C ? .
+bit 32 C ? .
+bit 31 C ? .
+bit 30 C ? .
+bit 29 C ? .
+bit 28 C ? .
+bit 27 C ? .
+bit 26 C ? .
+bit 25 C ? .
+bit 24 C ? .
+bit 23 C ? .
+bit 22 C ? .
+bit 21 C ? .
+bit 20 C ? .
+bit 19 C ? .
+bit 18 C ? .
+bit 17 C ? .
+bit 16 C ? .
+bit 15 C ? .
+bit 14 C ? .
+bit 13 C ? .
+bit 12 C ? .
+bit 11 C ? .
+bit 10 C ? .
+bit 9 C ? .
+bit 8 C ? .
+bit 7 C ? .
+bit 6 C ? .
+bit 5 C ? .
+bit 4 C ? .
+bit 3 C ? .
+bit 2 C ? .
+bit 1 C ? .
+bit 0 C ? .
+
+initbus pxa2x0
--- /dev/null
+#
+# $Id: STEPPINGS,v 1.7 2003/03/18 22:54:45 telka Exp $
+#
+# Copyright (C) 2004 BEC Systems <http://bec-systems.com>
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Cliff Brake <cliff.brake@gmail.com>
+#
+# Documentation:
+# [1] Intel Corporation, "Intel PXA270 Developers Manual"
+# February 2003, Order Number: 278534-012
+#
+
+# bits 31-28 of the Device Identification Register
+# see D55. in [1]
+0000 pxa270 A0
+0001 pxa270 A1
+0010 pxa270 B0
+0011 pxa270 B1
+0100 pxa270 C0
+0111 pxa270 C5
+
--- /dev/null
+#
+# $Id: pxa250c0,v 1.4 2003/09/05 21:09:11 telka Exp $
+#
+# JTAG declarations for PXA250C0
+# Copyright (C) 2002 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Marcel Telka <marcel@telka.sk>, 2002.
+#
+# 2005-01-03: Cliff Brake <cliff.brake@gmail.com> <http://bec-systems.com>
+# - Modified for PXA270 (from PXA255)
+#
+# Documentation:
+# [1] Intel Corporation, "Jflash source code",
+#
+# [2] Intel Corporation, "Intel PAX270 Processor Electrical, Mechanical,
+# and Thermal Specification", December 2004, Order Number: 280002-004
+
+# signals -- see "bulbcx.dat" file in [1] and Table 4-1 in [2]
+
+signal nBATT_FAULT AB24
+signal BOOT_SEL AB23
+signal CLK_REQ W24
+signal nCS[0] B3
+signal DQM[0] AB9
+signal DQM[1] AB10
+signal DQM[2] AC9
+signal DQM[3] AC10
+signal GPIO[0] V22
+signal GPIO[1] Y24
+signal SYS_EN AA24 # dedicated
+signal GPIO[3] W21
+signal GPIO[4] W23
+signal PWR_CAP[0] AB21
+signal PWR_CAP[1] AD22
+signal PWR_CAP[2] AC22
+signal PWR_CAP[3] AA20
+signal GPIO[9] U22
+signal GPIO[10] V23
+signal GPIO[11] C11
+signal GPIO[12] B10
+signal GPIO[13] C10
+signal GPIO[14] T24
+signal GPIO[15] A3
+signal GPIO[16] A18
+signal GPIO[17] C16
+signal GPIO[18] B9
+signal GPIO[19] R22
+signal GPIO[20] AB6
+signal GPIO[21] AD5
+signal GPIO[22] D13
+signal GPIO[23] B16
+signal GPIO[24] A17
+signal GPIO[25] D16
+signal GPIO[26] B15
+signal GPIO[27] C15
+signal GPIO[28] A14
+signal GPIO[29] B13
+signal GPIO[30] C13
+signal GPIO[31] C12
+signal GPIO[32] A20
+signal GPIO[33] B6
+signal GPIO[34] A21
+signal GPIO[35] B19
+signal GPIO[36] C14
+signal GPIO[37] A15
+signal GPIO[38] B14
+signal GPIO[39] D19
+signal GPIO[40] D14
+signal GPIO[41] C18
+signal GPIO[42] C21
+signal GPIO[43] C22
+signal GPIO[44] B20
+signal GPIO[45] C19
+signal GPIO[46] B11
+signal GPIO[47] A11
+signal GPIO[48] AC13
+signal GPIO[49] A10
+signal GPIO[50] AB13
+signal GPIO[51] AD13
+signal GPIO[52] AC14
+signal GPIO[53] AB14
+signal GPIO[54] AA14
+signal GPIO[55] AA10
+signal GPIO[56] AB11
+signal GPIO[57] AC11
+signal GPIO[58] G24
+signal GPIO[59] G22
+signal GPIO[60] G23
+signal GPIO[61] H24
+signal GPIO[62] H22
+signal GPIO[63] H23
+signal GPIO[64] J22
+signal GPIO[65] K24
+signal GPIO[66] K22
+signal GPIO[67] K23
+signal GPIO[68] L21
+signal GPIO[69] L23
+signal GPIO[70] M24
+signal GPIO[71] L22
+signal GPIO[72] N24
+signal GPIO[73] M22
+signal GPIO[74] R23
+signal GPIO[75] P23
+signal GPIO[76] P22
+signal GPIO[77] R21
+signal GPIO[78] B7
+signal GPIO[79] C8
+signal GPIO[80] C7
+signal GPIO[81] AB12
+signal GPIO[82] AD9
+signal GPIO[83] AD10
+signal GPIO[84] AA11
+signal GPIO[85] AC12
+signal GPIO[86] N22
+signal GPIO[87] N23
+signal GPIO[88] C23
+signal GPIO[89] D22
+signal GPIO[90] F22
+signal GPIO[91] F23
+signal GPIO[92] A19
+signal GPIO[93] AB19
+signal GPIO[94] AD19
+signal GPIO[95] AA18
+signal GPIO[96] AC19
+signal GPIO[97] AA17
+signal GPIO[98] AD18
+signal GPIO[99] AB18
+signal GPIO[100] AC18
+signal GPIO[101] AC17
+signal GPIO[102] AB17
+signal GPIO[103] AC16
+signal GPIO[104] AD15
+signal GPIO[105] AB16
+signal GPIO[106] AB15
+signal GPIO[107] AC15
+signal GPIO[108] AD14
+signal GPIO[109] D17
+signal GPIO[110] B17
+signal GPIO[111] C17
+signal GPIO[112] B18
+signal GPIO[113] A13
+signal GPIO[114] D24
+signal GPIO[115] E21
+signal GPIO[116] C24
+signal GPIO[117] D20
+signal GPIO[118] A22
+signal MA[0] C6
+signal MA[1] A6
+signal MA[2] K4
+signal MA[3] J1
+signal MA[4] K2
+signal MA[5] K3
+signal MA[6] J2
+signal MA[7] J3
+signal MA[8] G1
+signal MA[9] H2
+signal MA[10] H3
+signal MA[11] G2
+signal MA[12] G3
+signal MA[13] E1
+signal MA[14] F2
+signal MA[15] G4
+signal MA[16] F3
+signal MA[17] D1
+signal MA[18] C1
+signal MA[19] E3
+signal MA[20] E4
+signal MA[21] D2
+signal MA[22] C2
+signal MA[23] D4
+signal MA[24] C4
+signal MA[25] D6
+signal MD[0] AB4
+signal MD[1] AB1
+signal MD[2] AA3
+signal MD[3] Y3
+signal MD[4] Y2
+signal MD[5] U4
+signal MD[6] V3
+signal MD[7] U1
+signal MD[8] T3
+signal MD[9] R4
+signal MD[10] P4
+signal MD[11] P2
+signal MD[12] N3
+signal MD[13] M4
+signal MD[14] L1
+signal MD[15] K1
+signal MD[16] AA4
+signal MD[17] AB3
+signal MD[18] AA1
+signal MD[19] Y1
+signal MD[20] W1
+signal MD[21] V1
+signal MD[22] V2
+signal MD[23] T1
+signal MD[24] R1
+signal MD[25] R3
+signal MD[26] P3
+signal MD[27] N1
+signal MD[28] N2
+signal MD[29] M3
+signal MD[30] M2
+signal MD[31] L2
+signal nOE AC5
+signal PWR_EN Y23
+signal PWR_OUT AB22
+signal PXTAL_IN AC21
+signal PXTAL_OUT AD21
+signal nRESET Y22
+signal nRESET_OUT Y21
+signal RDnWR C9
+signal nSDCAS AA6
+signal nSDCS[0] AB7
+signal nSDCS[1] AB8
+signal SDCKE[1] AD6
+signal SDCLK[0] AC4
+signal SDCLK[1] AD7
+signal SDCLK[2] AD3
+signal nSDRAS AC7
+signal TEST U24
+signal TESTCLK T23
+signal TXTAL_IN AA22
+signal TXTAL_OUT AA23
+signal TDI U23
+signal TMS T21
+signal TCK T22
+signal TDO V24
+signal nTRST U21
+signal UIO E23
+signal USBC_N C20
+signal USBC_P B22
+signal USBH_N_0 D23
+signal USBH_P_0 E22
+signal VCC_BATT AB20
+signal VCC_BB AD12
+signal VCC_CORE AD11 T2 AD4 W3 B21 M23 R24 AD16 F24 L24 J23 D3 A7 B12
+signal VCC_IO AD17 A12 A16
+signal VCC_LCD J24 P24
+signal VCC_MEM W2 AC6 A4 B8 AC8 AA2 U2 AD8 F1 H1 M1 AD1 AC1 AC2 AD2 L3 E2 C3 P1
+signal VCC_PLL AC20
+signal VCC_RAM B4 A5 A8 A9
+signal VCC_USB A23 A24 B23 B24
+signal VCC_USIM E24
+signal VSS_BB AA13
+signal VSS_CORE AA12 W4 D8 D12 D21 G21 K21 P21 AA7 U3 M21 AA15 D10 J21 A1 B1 A2 B2 D7 B5
+signal VSS_IO D11 D15 D18 F21 H21 N21 AA19 AA16
+signal VSS_MEM Y4 C5 R2 N4 D9 AA9 AA8 AA5 V4 T4 L4 AB2 AC3 J4 H4 F4 D5
+signal VSS_PAD V21 AD23 AC23 AD24 AC24 AA21
+signal VSS_PLL AD20
+signal nVDD_FAULT W22
+signal nWE AB5
+
+# mandatory data registers
+register BSR 504 # Boundary Scan Register (see [3])
+register BR 1 # Bypass Register
+# optional data registers
+register DIR 32 # Device Identification Register
+# user defined registers
+#register DBG_SR 36 # see 10.10 in [2]
+#register LDIC_SR1 33 # see 10.13.2 in [2]
+
+# see 9.3.1 in [2]
+instruction length 7
+# mandatory instructions
+instruction EXTEST 0000000 BSR
+instruction SAMPLE/PRELOAD 0000001 BSR
+instruction BYPASS 1111111 BR
+# optional instructions
+instruction CLAMP 0000100 BR
+instruction HIGHZ 0001000 BR
+instruction IDCODE 1111110 DIR
+# user-defined instructions
+#instruction DBGRX 00010 DBG_SR
+#instruction LDIC 00111 LDIC_SR1
+#instruction SELDCSR 01001 DBG_SR # see 10.10.1 in [2]
+#instruction DBGTX 10000 DBG_SR
+
+#========================================================================
+
+bit 503 O 0 *
+bit 502 I 1 USBH_P_0
+bit 501 O 0 *
+bit 500 I 1 USBH_N_0
+bit 499 I 1 USBC_P
+bit 498 I 1 USBC_N
+bit 497 I 1 UIO
+bit 496 I 1 TESTCLK
+bit 495 I 1 TEST
+bit 494 I 1 NVDD_FAULT
+bit 493 I 1 NRESET
+bit 492 I 1 NBATT_FAULT
+bit 491 I 1 MD[0]
+bit 490 I 1 MD[1]
+bit 489 I 1 MD[2]
+bit 488 I 1 MD[3]
+bit 487 I 1 MD[4]
+bit 486 I 1 MD[5]
+bit 485 I 1 MD[6]
+bit 484 I 1 MD[7]
+bit 483 I 1 MD[8]
+bit 482 I 1 MD[9]
+bit 481 I 1 MD[10]
+bit 480 I 1 MD[11]
+bit 479 I 1 MD[12]
+bit 478 I 1 MD[13]
+bit 477 I 1 MD[14]
+bit 476 I 1 MD[15]
+bit 475 I 1 MD[16]
+bit 474 I 1 MD[17]
+bit 473 I 1 MD[18]
+bit 472 I 1 MD[19]
+bit 471 I 1 MD[20]
+bit 470 I 1 MD[21]
+bit 469 I 1 MD[22]
+bit 468 I 1 MD[23]
+bit 467 I 1 MD[24]
+bit 466 I 1 MD[25]
+bit 465 I 1 MD[26]
+bit 464 I 1 MD[27]
+bit 463 I 1 MD[28]
+bit 462 I 1 MD[29]
+bit 461 I 1 MD[30]
+bit 460 I 1 MD[31]
+bit 459 I 1 GPIO[0]
+bit 458 I 1 GPIO[1]
+bit 457 I 1 GPIO[2]
+bit 456 I 1 GPIO[3]
+bit 455 I 1 GPIO[4]
+bit 454 I 1 GPIO[5]
+bit 453 I 1 GPIO[6]
+bit 452 I 1 GPIO[7]
+bit 451 I 1 GPIO[8]
+bit 450 I 1 GPIO[9]
+bit 449 I 1 GPIO[10]
+bit 448 I 1 GPIO[11]
+bit 447 I 1 GPIO[12]
+bit 446 I 1 GPIO[13]
+bit 445 I 1 GPIO[14]
+bit 444 I 1 GPIO[15]
+bit 443 I 1 GPIO[16]
+bit 442 I 1 GPIO[17]
+bit 441 I 1 GPIO[18]
+bit 440 I 1 GPIO[19]
+bit 439 I 1 GPIO[20]
+bit 438 I 1 GPIO[21]
+bit 437 I 1 GPIO[22]
+bit 436 I 1 GPIO[23]
+bit 435 I 1 GPIO[24]
+bit 434 I 1 GPIO[25]
+bit 433 I 1 GPIO[26]
+bit 432 I 1 GPIO[27]
+bit 431 I 1 GPIO[28]
+bit 430 I 1 GPIO[29]
+bit 429 I 1 GPIO[30]
+bit 428 I 1 GPIO[31]
+bit 427 I 1 GPIO[32]
+bit 426 I 1 GPIO[33]
+bit 425 I 1 GPIO[34]
+bit 424 I 1 GPIO[35]
+bit 423 I 1 GPIO[36]
+bit 422 I 1 GPIO[37]
+bit 421 I 1 GPIO[38]
+bit 420 I 1 GPIO[39]
+bit 419 I 1 GPIO[40]
+bit 418 I 1 GPIO[41]
+bit 417 I 1 GPIO[42]
+bit 416 I 1 GPIO[43]
+bit 415 I 1 GPIO[44]
+bit 414 I 1 GPIO[45]
+bit 413 I 1 GPIO[46]
+bit 412 I 1 GPIO[47]
+bit 411 I 1 GPIO[48]
+bit 410 I 1 GPIO[49]
+bit 409 I 1 GPIO[50]
+bit 408 I 1 GPIO[51]
+bit 407 I 1 GPIO[52]
+bit 406 I 1 GPIO[53]
+bit 405 I 1 GPIO[54]
+bit 404 I 1 GPIO[55]
+bit 403 I 1 GPIO[56]
+bit 402 I 1 GPIO[57]
+bit 401 I 1 GPIO[58]
+bit 400 I 1 GPIO[59]
+bit 399 I 1 GPIO[60]
+bit 398 I 1 GPIO[61]
+bit 397 I 1 GPIO[62]
+bit 396 I 1 GPIO[63]
+bit 395 I 1 GPIO[64]
+bit 394 I 1 GPIO[65]
+bit 393 I 1 GPIO[66]
+bit 392 I 1 GPIO[67]
+bit 391 I 1 GPIO[68]
+bit 390 I 1 GPIO[69]
+bit 389 I 1 GPIO[70]
+bit 388 I 1 GPIO[71]
+bit 387 I 1 GPIO[72]
+bit 386 I 1 GPIO[73]
+bit 385 I 1 GPIO[74]
+bit 384 I 1 GPIO[75]
+bit 383 I 1 GPIO[76]
+bit 382 I 1 GPIO[77]
+bit 381 I 1 GPIO[78]
+bit 380 I 1 GPIO[79]
+bit 379 I 1 GPIO[80]
+bit 378 I 1 GPIO[81]
+bit 377 I 1 GPIO[82]
+bit 376 I 1 GPIO[83]
+bit 375 I 1 GPIO[84]
+bit 374 I 1 GPIO[85]
+bit 373 I 1 GPIO[86]
+bit 372 I 1 GPIO[87]
+bit 371 I 1 GPIO[88]
+bit 370 I 1 GPIO[89]
+bit 369 I 1 GPIO[90]
+bit 368 I 1 GPIO[91]
+bit 367 I 1 GPIO[92]
+bit 366 I 1 GPIO[93]
+bit 365 I 1 GPIO[94]
+bit 364 I 1 GPIO[95]
+bit 363 I 1 GPIO[96]
+bit 362 I 1 GPIO[97]
+bit 361 I 1 GPIO[98]
+bit 360 I 1 GPIO[99]
+bit 359 I 1 GPIO[100]
+bit 358 I 1 GPIO[101]
+bit 357 I 1 GPIO[102]
+bit 356 I 1 GPIO[103]
+bit 355 I 1 GPIO[104]
+bit 354 I 1 GPIO[105]
+bit 353 I 1 GPIO[106]
+bit 352 I 1 GPIO[107]
+bit 351 I 1 GPIO[108]
+bit 350 I 1 GPIO[109]
+bit 349 I 1 GPIO[110]
+bit 348 I 1 GPIO[111]
+bit 347 I 1 GPIO[112]
+bit 346 I 1 GPIO[113]
+bit 345 I 1 GPIO[114]
+bit 344 I 1 GPIO[115]
+bit 343 I 1 GPIO[116]
+bit 342 I 1 GPIO[117]
+bit 341 I 1 GPIO[118]
+bit 340 O 0 *
+bit 339 O 0 *
+bit 338 I 1 CLK_REQ
+bit 337 I 1 BOOT_SEL
+bit 336 O 0 *
+bit 335 O 1 USBH_P_0 331 1 Z
+bit 334 O 0 *
+bit 333 O 1 USBH_N_0 331 1 Z
+bit 332 O 1 *
+bit 331 C 1 *
+bit 330 O 1 USBC_P 328 0 Z
+bit 329 O 1 USBC_N 328 0 Z
+bit 328 C 0 *
+bit 327 C 0 *
+bit 326 O 1 UIO 327 0 Z
+bit 325 C 0 *
+bit 324 O 1 SDCLK[2] 75 0 Z
+bit 323 O 1 SDCLK[1] 69 0 Z
+bit 322 O 1 SDCKE[1] 75 0 Z
+bit 321 O 1 nSDRAS 69 0 Z
+bit 320 O 1 nSDCS[1] 75 0 Z
+bit 319 O 1 nSDCS[0] 69 0 Z
+bit 318 O 1 GPIO[0] 197 0 Z
+bit 317 O 1 GPIO[1] 196 0 Z
+bit 316 O 1 GPIO[2] 195 0 Z
+bit 315 O 1 GPIO[3] 194 0 Z
+bit 314 O 1 GPIO[4] 193 0 Z
+bit 313 O 1 GPIO[5] 192 0 Z
+bit 312 O 1 GPIO[6] 191 0 Z
+bit 311 O 1 GPIO[7] 190 0 Z
+bit 310 O 1 GPIO[8] 189 0 Z
+bit 309 O 1 GPIO[9] 188 0 Z
+bit 308 O 1 GPIO[10] 187 0 Z
+bit 307 O 1 GPIO[11] 186 0 Z
+bit 306 O 1 GPIO[12] 185 0 Z
+bit 305 O 1 GPIO[13] 184 0 Z
+bit 304 O 1 GPIO[14] 183 0 Z
+bit 303 O 1 GPIO[15] 182 0 Z
+bit 302 O 1 GPIO[16] 181 0 Z
+bit 301 O 1 GPIO[17] 180 0 Z
+bit 300 O 1 GPIO[18] 179 0 Z
+bit 299 O 1 GPIO[19] 178 0 Z
+bit 298 O 1 GPIO[20] 177 0 Z
+bit 297 O 1 GPIO[21] 176 0 Z
+bit 296 O 1 GPIO[22] 175 0 Z
+bit 295 O 1 GPIO[23] 174 0 Z
+bit 294 O 1 GPIO[24] 173 0 Z
+bit 293 O 1 GPIO[25] 172 0 Z
+bit 292 O 1 GPIO[26] 171 0 Z
+bit 291 O 1 GPIO[27] 170 0 Z
+bit 290 O 1 GPIO[28] 169 0 Z
+bit 289 O 1 GPIO[29] 168 0 Z
+bit 288 O 1 GPIO[30] 167 0 Z
+bit 287 O 1 GPIO[31] 166 0 Z
+bit 286 O 1 GPIO[32] 165 0 Z
+bit 285 O 1 GPIO[33] 164 0 Z
+bit 284 O 1 GPIO[34] 163 0 Z
+bit 283 O 1 GPIO[35] 162 0 Z
+bit 282 O 1 GPIO[36] 161 0 Z
+bit 281 O 1 GPIO[37] 160 0 Z
+bit 280 O 1 GPIO[38] 159 0 Z
+bit 279 O 1 GPIO[39] 158 0 Z
+bit 278 O 1 GPIO[40] 157 0 Z
+bit 277 O 1 GPIO[41] 156 0 Z
+bit 276 O 1 GPIO[42] 155 0 Z
+bit 275 O 1 GPIO[43] 154 0 Z
+bit 274 O 1 GPIO[44] 153 0 Z
+bit 273 O 1 GPIO[45] 152 0 Z
+bit 272 O 1 GPIO[46] 151 0 Z
+bit 271 O 1 GPIO[47] 150 0 Z
+bit 270 O 1 GPIO[48] 149 0 Z
+bit 269 O 1 GPIO[49] 148 0 Z
+bit 268 O 1 GPIO[50] 147 0 Z
+bit 267 O 1 GPIO[51] 146 0 Z
+bit 266 O 1 GPIO[52] 145 0 Z
+bit 265 O 1 GPIO[53] 144 0 Z
+bit 264 O 1 GPIO[54] 143 0 Z
+bit 263 O 1 GPIO[55] 142 0 Z
+bit 262 O 1 GPIO[56] 141 0 Z
+bit 261 O 1 GPIO[57] 140 0 Z
+bit 260 O 1 GPIO[58] 139 0 Z
+bit 259 O 1 GPIO[59] 138 0 Z
+bit 258 O 1 GPIO[60] 137 0 Z
+bit 257 O 1 GPIO[61] 136 0 Z
+bit 256 O 1 GPIO[62] 135 0 Z
+bit 255 O 1 GPIO[63] 134 0 Z
+bit 254 O 1 GPIO[64] 133 0 Z
+bit 253 O 1 GPIO[65] 132 0 Z
+bit 252 O 1 GPIO[66] 131 0 Z
+bit 251 O 1 GPIO[67] 130 0 Z
+bit 250 O 1 GPIO[68] 129 0 Z
+bit 249 O 1 GPIO[69] 128 0 Z
+bit 248 O 1 GPIO[70] 127 0 Z
+bit 247 O 1 GPIO[71] 126 0 Z
+bit 246 O 1 GPIO[72] 125 0 Z
+bit 245 O 1 GPIO[73] 124 0 Z
+bit 244 O 1 GPIO[74] 123 0 Z
+bit 243 O 1 GPIO[75] 122 0 Z
+bit 242 O 1 GPIO[76] 121 0 Z
+bit 241 O 1 GPIO[77] 120 0 Z
+bit 240 O 1 GPIO[78] 119 0 Z
+bit 239 O 1 GPIO[79] 118 0 Z
+bit 238 O 1 GPIO[80] 117 0 Z
+bit 237 O 1 GPIO[81] 116 0 Z
+bit 236 O 1 GPIO[82] 115 0 Z
+bit 235 O 1 GPIO[83] 114 0 Z
+bit 234 O 1 GPIO[84] 113 0 Z
+bit 233 O 1 GPIO[85] 112 0 Z
+bit 232 O 1 GPIO[86] 111 0 Z
+bit 231 O 1 GPIO[87] 110 0 Z
+bit 230 O 1 GPIO[88] 109 0 Z
+bit 229 O 1 GPIO[89] 108 0 Z
+bit 228 O 1 GPIO[90] 107 0 Z
+bit 227 O 1 GPIO[91] 106 0 Z
+bit 226 O 1 GPIO[92] 105 0 Z
+bit 225 O 1 GPIO[93] 104 0 Z
+bit 224 O 1 GPIO[94] 103 0 Z
+bit 223 O 1 GPIO[95] 102 0 Z
+bit 222 O 1 GPIO[96] 101 0 Z
+bit 221 O 1 GPIO[97] 100 0 Z
+bit 220 O 1 GPIO[98] 99 0 Z
+bit 219 O 1 GPIO[99] 98 0 Z
+bit 218 O 1 GPIO[100] 97 0 Z
+bit 217 O 1 GPIO[101] 96 0 Z
+bit 216 O 1 GPIO[102] 95 0 Z
+bit 215 O 1 GPIO[103] 94 0 Z
+bit 214 O 1 GPIO[104] 93 0 Z
+bit 213 O 1 GPIO[105] 92 0 Z
+bit 212 O 1 GPIO[106] 91 0 Z
+bit 211 O 1 GPIO[107] 90 0 Z
+bit 210 O 1 GPIO[108] 89 0 Z
+bit 209 O 1 GPIO[109] 88 0 Z
+bit 208 O 1 GPIO[110] 87 0 Z
+bit 207 O 1 GPIO[111] 86 0 Z
+bit 206 O 1 GPIO[112] 85 0 Z
+bit 205 O 1 GPIO[113] 84 0 Z
+bit 204 O 1 GPIO[114] 83 0 Z
+bit 203 O 1 GPIO[115] 82 0 Z
+bit 202 O 1 GPIO[116] 81 0 Z
+bit 201 O 1 GPIO[117] 80 0 Z
+bit 200 O 1 GPIO[118] 79 0 Z
+bit 199 O 0 *
+bit 198 O 0 *
+bit 197 C 0 *
+bit 196 C 0 *
+bit 195 C 0 *
+bit 194 C 0 *
+bit 193 C 0 *
+bit 192 C 0 *
+bit 191 C 0 *
+bit 190 C 0 *
+bit 189 C 0 *
+bit 188 C 0 *
+bit 187 C 0 *
+bit 186 C 0 *
+bit 185 C 0 *
+bit 184 C 0 *
+bit 183 C 0 *
+bit 182 C 0 *
+bit 181 C 0 *
+bit 180 C 0 *
+bit 179 C 0 *
+bit 178 C 0 *
+bit 177 C 0 *
+bit 176 C 0 *
+bit 175 C 0 *
+bit 174 C 0 *
+bit 173 C 0 *
+bit 172 C 0 *
+bit 171 C 0 *
+bit 170 C 0 *
+bit 169 C 0 *
+bit 168 C 0 *
+bit 167 C 0 *
+bit 166 C 0 *
+bit 165 C 0 *
+bit 164 C 0 *
+bit 163 C 0 *
+bit 162 C 0 *
+bit 161 C 0 *
+bit 160 C 0 *
+bit 159 C 0 *
+bit 158 C 0 *
+bit 157 C 0 *
+bit 156 C 0 *
+bit 155 C 0 *
+bit 154 C 0 *
+bit 153 C 0 *
+bit 152 C 0 *
+bit 151 C 0 *
+bit 150 C 0 *
+bit 149 C 0 *
+bit 148 C 0 *
+bit 147 C 0 *
+bit 146 C 0 *
+bit 145 C 0 *
+bit 144 C 0 *
+bit 143 C 0 *
+bit 142 C 0 *
+bit 141 C 0 *
+bit 140 C 0 *
+bit 139 C 0 *
+bit 138 C 0 *
+bit 137 C 0 *
+bit 136 C 0 *
+bit 135 C 0 *
+bit 134 C 0 *
+bit 133 C 0 *
+bit 132 C 0 *
+bit 131 C 0 *
+bit 130 C 0 *
+bit 129 C 0 *
+bit 128 C 0 *
+bit 127 C 0 *
+bit 126 C 0 *
+bit 125 C 0 *
+bit 124 C 0 *
+bit 123 C 0 *
+bit 122 C 0 *
+bit 121 C 0 *
+bit 120 C 0 *
+bit 119 C 0 *
+bit 118 C 0 *
+bit 117 C 0 *
+bit 116 C 0 *
+bit 115 C 0 *
+bit 114 C 0 *
+bit 113 C 0 *
+bit 112 C 0 *
+bit 111 C 0 *
+bit 110 C 0 *
+bit 109 C 0 *
+bit 108 C 0 *
+bit 107 C 0 *
+bit 106 C 0 *
+bit 105 C 0 *
+bit 104 C 0 *
+bit 103 C 0 *
+bit 102 C 0 *
+bit 101 C 0 *
+bit 100 C 0 *
+bit 99 C 0 *
+bit 98 C 0 *
+bit 97 C 0 *
+bit 96 C 0 *
+bit 95 C 0 *
+bit 94 C 0 *
+bit 93 C 0 *
+bit 92 C 0 *
+bit 91 C 0 *
+bit 90 C 0 *
+bit 89 C 0 *
+bit 88 C 0 *
+bit 87 C 0 *
+bit 86 C 0 *
+bit 85 C 0 *
+bit 84 C 0 *
+bit 83 C 0 *
+bit 82 C 0 *
+bit 81 C 0 *
+bit 80 C 0 *
+bit 79 C 0 *
+bit 78 O 0 *
+bit 77 O 0 *
+bit 76 O 1 CLK_REQ 325 0 Z
+bit 75 C 0 *
+bit 74 C 0 *
+bit 73 C 0 *
+bit 72 C 0 *
+bit 71 C 0 *
+bit 70 C 0 *
+bit 69 C 0 *
+bit 68 O 1 RDnWR 69 0 Z
+bit 67 O 1 DQM[0] 69 0 Z
+bit 66 O 1 DQM[1] 69 0 Z
+bit 65 O 1 DQM[2] 70 0 Z
+bit 64 O 1 DQM[3] 70 0 Z
+bit 63 O 0 *
+bit 62 O 1 SDCLK[0] 75 0 Z
+bit 61 O 1 nCS[0] 74 0 Z
+bit 60 O 1 nOE 74 0 Z
+bit 59 O 1 nWE 73 0 Z
+bit 58 O 1 nSDCAS 69 0 Z
+bit 57 O 1 MD[0] 71 0 Z
+bit 56 O 1 MD[1] 71 0 Z
+bit 55 O 1 MD[2] 71 0 Z
+bit 54 O 1 MD[3] 71 0 Z
+bit 53 O 1 MD[4] 71 0 Z
+bit 52 O 1 MD[5] 71 0 Z
+bit 51 O 1 MD[6] 71 0 Z
+bit 50 O 1 MD[7] 71 0 Z
+bit 49 O 1 MD[8] 71 0 Z
+bit 48 O 1 MD[9] 71 0 Z
+bit 47 O 1 MD[10] 71 0 Z
+bit 46 O 1 MD[11] 71 0 Z
+bit 45 O 1 MD[12] 71 0 Z
+bit 44 O 1 MD[13] 71 0 Z
+bit 43 O 1 MD[14] 71 0 Z
+bit 42 O 1 MD[15] 71 0 Z
+bit 41 O 1 MD[16] 72 0 Z
+bit 40 O 1 MD[17] 72 0 Z
+bit 39 O 1 MD[18] 72 0 Z
+bit 38 O 1 MD[19] 72 0 Z
+bit 37 O 1 MD[20] 72 0 Z
+bit 36 O 1 MD[21] 72 0 Z
+bit 35 O 1 MD[22] 72 0 Z
+bit 34 O 1 MD[23] 72 0 Z
+bit 33 O 1 MD[24] 72 0 Z
+bit 32 O 1 MD[25] 72 0 Z
+bit 31 O 1 MD[26] 72 0 Z
+bit 30 O 1 MD[27] 72 0 Z
+bit 29 O 1 MD[28] 72 0 Z
+bit 28 O 1 MD[29] 72 0 Z
+bit 27 O 1 MD[30] 72 0 Z
+bit 26 O 1 MD[31] 72 0 Z
+bit 25 O 1 MA[0] 69 0 Z
+bit 24 O 1 MA[1] 69 0 Z
+bit 23 O 1 MA[2] 69 0 Z
+bit 22 O 1 MA[3] 69 0 Z
+bit 21 O 1 MA[4] 69 0 Z
+bit 20 O 1 MA[5] 69 0 Z
+bit 19 O 1 MA[6] 69 0 Z
+bit 18 O 1 MA[7] 69 0 Z
+bit 17 O 1 MA[8] 69 0 Z
+bit 16 O 1 MA[9] 69 0 Z
+bit 15 O 1 MA[10] 69 0 Z
+bit 14 O 1 MA[11] 69 0 Z
+bit 13 O 1 MA[12] 69 0 Z
+bit 12 O 1 MA[13] 69 0 Z
+bit 11 O 1 MA[14] 69 0 Z
+bit 10 O 1 MA[15] 69 0 Z
+bit 9 O 1 MA[16] 69 0 Z
+bit 8 O 1 MA[17] 69 0 Z
+bit 7 O 1 MA[18] 69 0 Z
+bit 6 O 1 MA[19] 69 0 Z
+bit 5 O 1 MA[20] 69 0 Z
+bit 4 O 1 MA[21] 69 0 Z
+bit 3 O 1 MA[22] 69 0 Z
+bit 2 O 1 MA[23] 69 0 Z
+bit 1 O 1 MA[24] 69 0 Z
+bit 0 O 1 MA[25] 69 0 Z
+
+initbus pxa27x
+
--- /dev/null
+#
+# $Id$
+#
+# Copyright (C) 2002 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Marcel Telka <marcel@telka.sk>, 2002.
+#
+# Documentation:
+# [1] Intel Corporation, "Intel StrongARM SA-1110 Microprocessor
+# Developer's Manual", October 2001, Order Number: 278240-004
+#
+
+# bits 31-28 of the Device Identification Register
+# see 16.6.2 in [1]
+0000 sa1110 A0
+0100 sa1110 B0
+0101 sa1110 B1
+0110 sa1110 B2
+1000 sa1110 B4
+1001 sa1110 B5
--- /dev/null
+#
+# $Id$
+#
+# JTAG declarations for SA-1110
+# Copyright (C) 2002 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Marcel Telka <marcel@telka.sk>, 2002.
+#
+# Documentation:
+# [1] Intel Corporation, "Intel StrongARM SA-1110 Microprocessor
+# Developer's Manual", October 2001, Order Number: 278240-004
+# [2] Intel Corporation, "Intel StrongARM SA-1110 Microprocessor
+# Specification Update", December 2001, Order Number: 278259-023
+#
+
+# see Table 14-2 in [1]
+signal A0 D12
+signal A1 C12
+signal A2 B12
+signal A3 A13
+signal A4 C13
+signal A5 B13
+signal A6 A14
+signal A7 A15
+signal A8 A16
+signal A9 B15
+signal A10 B14
+signal A11 C14
+signal A12 B16
+signal A13 D13
+signal A14 E13
+signal A15 C16
+signal A16 D15
+signal A17 E14
+signal A18 D16
+signal A19 E15
+signal A20 F14
+signal A21 E16
+signal A22 F15
+signal A23 F13
+signal A24 G13
+signal A25 F16
+signal BATT_FAULT A4
+signal nCAS0 J14
+signal nCAS1 J15
+signal nCAS2 K15
+signal nCAS3 K13
+signal nCS0 G14
+signal nCS1 G15
+signal nCS2 G16
+signal nCS3 H14
+signal nCS4 H15
+signal nCS5 H16
+signal D0 E4
+signal D1 F4
+signal D2 F2
+signal D3 G2
+signal D4 H1
+signal D5 J4
+signal D6 K1
+signal D7 L1
+signal D8 D2
+signal D9 E2
+signal D10 F1
+signal D11 H6
+signal D12 J6
+signal D13 J1
+signal D14 K4
+signal D15 L4
+signal D16 D1
+signal D17 E1
+signal D18 G4
+signal D19 G1
+signal D20 J2
+signal D21 K2
+signal D22 L3
+signal D23 M2
+signal D24 E3
+signal D25 F3
+signal D26 G3
+signal D27 H4
+signal D28 J3
+signal D29 K3
+signal D30 L2
+signal D31 M1
+signal GP0 T10
+signal GP1 P10
+signal GP2 R10
+signal GP3 N10
+signal GP4 T9
+signal GP5 P9
+signal GP6 R8
+signal GP7 N8
+signal GP8 P8
+signal GP9 T7
+signal GP10 P7
+signal GP11 T6
+signal GP12 R7
+signal GP13 R6
+signal GP14 P6
+signal GP15 N6
+signal GP16 T5
+signal GP17 R5
+signal GP18 P5
+signal GP19 T4
+signal GP20 R4
+signal GP21 T3
+signal GP22 R3
+signal GP23 T2
+signal GP24 P4
+signal GP25 R2
+signal GP26 T1
+signal GP27 R1
+signal nIOIS16 N13
+signal L_BIAS R11
+signal L_FCLK T14
+signal L_LCLK R14
+signal L_PCLK P11
+signal LDD0 N12
+signal LDD1 T11
+signal LDD2 R12
+signal LDD3 P12
+signal LDD4 T12
+signal LDD5 R13
+signal LDD6 T13
+signal LDD7 P13
+signal nOE M15
+signal nPCE1 M16
+signal nPCE2 N15
+signal PEXTAL A8
+signal nPIOR T16
+signal nPIOW R16
+signal nPOE R15
+signal nPREG N14
+signal PSKTSEL P16
+signal nPWAIT N16
+signal nPWE T16
+signal PWR_EN A3
+signal PXTAL B8
+signal nRAS0 K16
+signal nRAS1 L13
+signal nRAS2 L14
+signal nRAS3 L15
+signal RD_nWR J13
+signal RDY H13
+signal nRESET B7
+signal nRESET_OUT C7
+signal ROM_SEL D6 # typo in Table 14-2 in [1] ('ROMSEL' is bad pin name)
+signal RXD_1 B11
+signal RXD_2 B10
+signal RXD_3 C10
+signal RXD_C B1
+signal SCLK_C A2
+signal nSDCAS L16
+signal SDCKE0 N1
+signal SDCKE1 N2
+signal SDCLK0 P1
+signal SDCLK1 N3
+signal SDCLK2 M3
+signal nSDRAS M14
+signal SFRM_C B3
+signal SMROM_EN M4
+signal TCK C5
+signal TCK_BYP A6
+signal TDI A5
+signal TDO B5
+signal TESTCLK B6
+signal TEXTAL C9
+signal TMS C6
+signal nTRST B4
+signal TXTAL B9
+signal TXD_1 A11
+signal TXD_2 D10
+signal TXD_3 A10
+signal TXD_C C2
+signal UDC- A12
+signal UDC+ C11
+signal VDD A7 C1 C15 H3 J16 P3 P15 T8
+signal VDD_FAULT C4
+signal VDDP C8
+signal VDDX1 D5 D9 D11 E6 E7 E8 E9 E10 E11 K10 K11 L10 L11 M6 M7 M8 M9 M10 M11 N7 N9 N11
+signal VDDX2 E12 F5 F12 G5 G12 H5 H12 J5 J12 K5 K12 L5 L12 M5 M12 N4 N5
+signal VDDX3 D7
+signal VSS A8 D3 D8 D14 H2 K14 P2 P14 R9
+signal VSSX A1 B2 C3 D4 E5 F6 F7 F8 F9 F10 F11 G6 G7 G8 G9 G10 G11 H7 H8 H9 H10 H11 J7 J8 J9 J10 J11 K6 K7 K8 K9 L6 L7 L8 L9
+signal nWE M13
+
+# mandatory data registers
+register BSR 292 # Boundary Scan Register (see Table 16-2 in [1])
+register BR 1 # Bypass Register
+# optional data registers
+register DIR 32 # Device Identification Register
+
+# see 16.5 in [1]
+instruction length 5
+
+# mandatory instructions
+instruction EXTEST 00000 BSR
+instruction SAMPLE/PRELOAD 00001 BSR
+instruction BYPASS 11111 BR
+
+# optional instructions
+instruction CLAMP 00100 BR
+instruction HIGHZ 00101 BR
+instruction IDCODE 00110 DIR
+
+# see Table 16-2 in [1]
+bit 291 I ? BATT_FAULT
+bit 290 I ? VDD_FAULT
+bit 289 O 1 PWR_EN
+bit 288 C 0 SFRM_C
+bit 287 O ? SFRM_C 288 0 Z
+bit 286 I ? SFRM_C
+bit 285 C 0 SCLK_C
+bit 284 O ? SCLK_C 285 0 Z
+bit 283 I ? SCLK_C
+bit 282 C 0 RXD_C
+bit 281 O ? RXD_C 282 0 Z
+bit 280 I ? RXD_C
+bit 279 C 0 TXD_C
+bit 278 O ? TXD_C 279 0 Z
+bit 277 I ? TXD_C
+bit 276 O ? D0 212 1 Z
+bit 275 I ? D0
+bit 274 O ? D8 212 1 Z
+bit 273 I ? D8
+bit 272 O ? D16 212 1 Z
+bit 271 I ? D16
+bit 270 O ? D24 212 1 Z
+bit 269 I ? D24
+bit 268 O ? D1 212 1 Z
+bit 267 I ? D1
+bit 266 O ? D9 212 1 Z
+bit 265 I ? D9
+bit 264 O ? D17 212 1 Z
+bit 263 I ? D17
+bit 262 O ? D25 212 1 Z
+bit 261 I ? D25
+bit 260 O ? D2 212 1 Z
+bit 259 I ? D2
+bit 258 O ? D10 212 1 Z
+bit 257 I ? D10
+bit 256 O ? D18 212 1 Z
+bit 255 I ? D18
+bit 254 O ? D26 212 1 Z
+bit 253 I ? D26
+bit 252 O ? D3 212 1 Z
+bit 251 I ? D3
+bit 250 O ? D11 212 1 Z
+bit 249 I ? D11
+bit 248 O ? D19 212 1 Z
+bit 247 I ? D19
+bit 246 O ? D27 212 1 Z
+bit 245 I ? D27
+bit 244 O ? D4 212 1 Z
+bit 243 I ? D4
+bit 242 O ? D12 212 1 Z
+bit 241 I ? D12
+bit 240 O ? D20 212 1 Z
+bit 239 I ? D20
+bit 238 O ? D28 212 1 Z
+bit 237 I ? D28
+bit 236 O ? D5 212 1 Z
+bit 235 I ? D5
+bit 234 O ? D13 212 1 Z
+bit 233 I ? D13
+bit 232 O ? D21 212 1 Z
+bit 231 I ? D21
+bit 230 O ? D29 212 1 Z
+bit 229 I ? D29
+bit 228 O ? D6 212 1 Z
+bit 227 I ? D6
+bit 226 O ? D14 212 1 Z
+bit 225 I ? D14
+bit 224 O ? D22 212 1 Z
+bit 223 I ? D22
+bit 222 O ? D30 212 1 Z
+bit 221 I ? D30
+bit 220 O ? D7 212 1 Z
+bit 219 I ? D7
+bit 218 O ? D15 212 1 Z
+bit 217 I ? D15
+bit 216 O ? D23 212 1 Z
+bit 215 I ? D23
+bit 214 O ? D31 212 1 Z
+bit 213 I ? D31
+bit 212 C 1 D[31:0]
+bit 211 O 0 SDCLK2
+bit 210 O 1 SDCKE1
+bit 209 C 1 SDCLK1
+bit 208 O ? SDCLK1 209 1 Z # error (bad name) in Table 16-2 in [1]
+bit 207 O 0 SDCLK0
+bit 206 O 0 SDCKE0
+bit 205 I ? SMROM_EN
+bit 204 C 0 GP27
+bit 203 O ? GP27 204 0 Z
+bit 202 I ? GP27
+bit 201 C 0 GP26
+bit 200 O ? GP26 201 0 Z
+bit 199 I ? GP26
+bit 198 C 0 GP25
+bit 197 O ? GP25 198 0 Z
+bit 196 I ? GP25
+bit 195 C 0 GP24
+bit 194 O ? GP24 195 0 Z
+bit 193 I ? GP24
+bit 192 C 0 GP23
+bit 191 O ? GP23 192 0 Z
+bit 190 I ? GP23
+bit 189 C 0 GP22
+bit 188 O ? GP22 189 0 Z
+bit 187 I ? GP22
+bit 186 C 0 GP21
+bit 185 O ? GP21 186 0 Z
+bit 184 I ? GP21
+bit 183 C 0 GP20
+bit 182 O ? GP20 183 0 Z
+bit 181 I ? GP20
+bit 180 C 0 GP19
+bit 179 O ? GP19 180 0 Z
+bit 178 I ? GP19
+bit 177 C 0 GP18
+bit 176 O ? GP18 177 0 Z
+bit 175 I ? GP18
+bit 174 C 0 GP17
+bit 173 O ? GP17 174 0 Z
+bit 172 I ? GP17
+bit 171 C 0 GP16
+bit 170 O ? GP16 171 0 Z
+bit 169 I ? GP16
+bit 168 C 0 GP15
+bit 167 O ? GP15 168 0 Z
+bit 166 I ? GP15
+bit 165 C 0 GP14
+bit 164 O ? GP14 165 0 Z
+bit 163 I ? GP14
+bit 162 C 0 GP13
+bit 161 O ? GP13 162 0 Z
+bit 160 I ? GP13
+bit 159 C 0 GP12
+bit 158 O ? GP12 159 0 Z
+bit 157 I ? GP12
+bit 156 C 0 GP11
+bit 155 O ? GP11 156 0 Z
+bit 154 I ? GP11
+bit 153 C 0 GP10
+bit 152 O ? GP10 153 0 Z
+bit 151 I ? GP10
+bit 150 C 0 GP9
+bit 149 O ? GP9 150 0 Z
+bit 148 I ? GP9
+bit 147 C 0 GP8
+bit 146 O ? GP8 147 0 Z
+bit 145 I ? GP8
+bit 144 C 0 GP7
+bit 143 O ? GP7 144 0 Z
+bit 142 I ? GP7
+bit 141 C 0 GP6
+bit 140 O ? GP6 141 0 Z
+bit 139 I ? GP6
+bit 138 C 0 GP5
+bit 137 O ? GP5 138 0 Z
+bit 136 I ? GP5
+bit 135 C 0 GP4
+bit 134 O ? GP4 135 0 Z
+bit 133 I ? GP4
+bit 132 C 0 GP3
+bit 131 O ? GP3 132 0 Z
+bit 130 I ? GP3
+bit 129 C 0 GP2
+bit 128 O ? GP2 129 0 Z
+bit 127 I ? GP2
+bit 126 C 0 GP1
+bit 125 O ? GP1 126 0 Z
+bit 124 I ? GP1
+bit 123 C 0 GP0
+bit 122 O ? GP0 123 0 Z
+bit 121 I ? GP0
+bit 120 C 0 L_BIAS
+bit 119 O ? L_BIAS 120 0 Z
+bit 118 I ? L_BIAS
+bit 117 C 0 L_PCLK
+bit 116 O ? L_PCLK 117 0 Z
+bit 115 I ? L_PCLK
+bit 114 C 0 LDD0
+bit 113 O ? LDD0 114 0 Z
+bit 112 I ? LDD0
+bit 111 C 0 LDD1
+bit 110 O ? LDD1 111 0 Z
+bit 109 I ? LDD1
+bit 108 C 0 LDD2
+bit 107 O ? LDD2 108 0 Z
+bit 106 I ? LDD2
+bit 105 C 0 LDD3
+bit 104 O ? LDD3 105 0 Z
+bit 103 I ? LDD3
+bit 102 C 0 LDD4
+bit 101 O ? LDD4 102 0 Z
+bit 100 I ? LDD4
+bit 99 C 0 LDD5
+bit 98 O ? LDD5 99 0 Z
+bit 97 I ? LDD5
+bit 96 C 0 LDD6
+bit 95 O ? LDD6 96 0 Z
+bit 94 I ? LDD6
+bit 93 C 0 LDD7
+bit 92 O ? LDD7 93 0 Z
+bit 91 I ? LDD7
+bit 90 C 0 L_LCLK
+bit 89 O ? L_LCLK 90 0 Z
+bit 88 I ? L_LCLK
+bit 87 C 0 L_FCLK
+bit 86 O ? L_FCLK 87 0 Z
+bit 85 I ? L_FCLK
+bit 84 O 0 nPOE
+bit 83 O 0 nPWE
+bit 82 O 0 nPIOR
+bit 81 O 0 nPIOW
+bit 80 O 0 PSKTSEL
+bit 79 I ? nIOIS16
+bit 78 I ? nPWAIT
+bit 77 O 0 nPREG
+bit 76 O 1 nPCE2
+bit 75 O 1 nPCE1
+bit 74 O 1 .
+bit 73 O 1 nWE 74 1 Z
+bit 72 O 0 nOE 74 1 Z
+bit 71 O 0 nSDRAS 74 1 Z
+bit 70 O 0 nSDCAS 74 1 Z
+bit 69 O 0 nRAS3
+bit 68 O 0 nRAS2
+bit 67 O 0 nRAS1
+bit 66 O 1 nRAS0 74 1 Z
+bit 65 O 1 nCAS3 74 1 Z
+bit 64 O 1 nCAS2 74 1 Z
+bit 63 O 1 nCAS1 74 1 Z
+bit 62 O 1 nCAS0 74 1 Z
+bit 61 O 0 RD_nWR
+bit 60 I ? RDY
+bit 59 O 1 nCS5
+bit 58 O 1 nCS4
+bit 57 O 1 nCS3
+bit 56 O 1 nCS2
+bit 55 O 1 nCS1
+bit 54 O 1 nCS0
+bit 53 O 0 A25 74 1 Z
+bit 52 O 0 A24 74 1 Z
+bit 51 O 0 A23 74 1 Z
+bit 50 O 0 A22 74 1 Z
+bit 49 O 0 A21 74 1 Z
+bit 48 O 0 A20 74 1 Z
+bit 47 O 0 A19 74 1 Z
+bit 46 O 0 A18 74 1 Z
+bit 45 O 0 A17 74 1 Z
+bit 44 O 0 A16 74 1 Z
+bit 43 O 0 A15 74 1 Z
+bit 42 O 0 A14 74 1 Z
+bit 41 O 0 A13 74 1 Z
+bit 40 O 0 A12 74 1 Z
+bit 39 O 0 A11 74 1 Z
+bit 38 O 0 A10 74 1 Z
+bit 37 O 0 A9 74 1 Z
+bit 36 O 0 A8 74 1 Z
+bit 35 O 0 A7 74 1 Z
+bit 34 O 0 A6 74 1 Z
+bit 33 O 0 A5 74 1 Z
+bit 32 O 0 A4 74 1 Z
+bit 31 O 0 A3 74 1 Z
+bit 30 O 0 A2 74 1 Z
+bit 29 O 0 A1 74 1 Z
+bit 28 O 0 A0 74 1 Z
+bit 27 C 1 UDC-
+bit 26 O ? UDC- 27 1 Z
+bit 25 I ? UDC-
+bit 24 X ? UDC-/UDC+
+bit 23 C 1 UDC+
+bit 22 O ? UDC+ 23 1 Z
+bit 21 I ? UDC+
+bit 20 C 0 RXD_1
+bit 19 O ? RXD_1 20 0 Z
+bit 18 I ? RXD_1
+bit 17 C 0 TXD_1
+bit 16 O ? TXD_1 17 0 Z
+bit 15 I ? TXD_1
+bit 14 C 0 RXD_2
+bit 13 O ? RXD_2 14 0 Z
+bit 12 I ? RXD_2
+bit 11 C 0 TXD_2
+bit 10 O ? TXD_2 11 0 Z
+bit 9 I ? TXD_2
+bit 8 C 0 RXD_3
+bit 7 O ? RXD_3 8 0 Z
+bit 6 I ? RXD_3
+bit 5 C 0 TXD_3
+bit 4 O ? TXD_3 5 0 Z
+bit 3 I ? TXD_3
+bit 2 I ? nRESET
+bit 1 O 1 nRESET_OUT
+bit 0 I ? ROM_SEL
+
+initbus sa1110
--- /dev/null
+#
+# $Id$
+#
+# Copyright (C) 2002 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Marcel Telka <marcel@telka.sk>, 2002.
+#
+
+# bits 27-12 of the Device Identification Register
+0111010010000110 m4a3-64.32-tqfp48 M4A3-64/32-TQFP48
+0001100000000101 lc4032v-tqfp48 LC4032V-TQFP48
+0000011000001111 m4a3-256.192-fpbga256 M4A3-256/192-fpBGA256
+0001100000010000 lc4128c-tqfp100 LC4128C-TQFP100
+0001001001110001 lfec2-12e LFE2-12E
+0001100000001100 lc4064zc LC4064ZC
--- /dev/null
+#
+# $Id$
+#
+# Copyright (C) 2002 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Marcel Telka <marcel@telka.sk>, 2002.
+#
+
+# bits 31-28 of the Device Identification Register
+
+0000 lc4032v-tqfp48 0
+0001 lc4032v-tqfp48 1
--- /dev/null
+#
+# $Id$
+#
+# JTAG declarations for Lattice LC4032V (48-pin TQFP)
+# Copyright (C) 2002 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Marcel Telka <marcel@telka.sk>, 2002.
+#
+
+signal IOA0 44
+signal IOA1 45
+signal IOA2 46
+signal IOA3 47
+signal IOA4 48
+signal IOA5 2
+signal IOA6 3
+signal IOA7 4
+signal IOA8 7
+signal IOA9 8
+signal IOA10 9
+signal IOA11 10
+signal IOA12 14
+signal IOA13 15
+signal IOA14 16
+signal IOA15 17
+signal IOB0 20
+signal IOB1 21
+signal IOB2 22
+signal IOB3 23
+signal IOB4 24
+signal IOB5 26
+signal IOB6 27
+signal IOB7 28
+signal IOB8 31
+signal IOB9 32
+signal IOB10 33
+signal IOB11 34
+signal IOB12 38
+signal IOB13 39
+signal IOB14 40
+signal IOB15 41
+signal CLK0 43
+signal CLK1 18
+signal CLK2 19
+signal CLK3 42
+signal TDI 1
+signal TCK 11
+signal TMS 25
+signal TDO 35
+signal GND0 5
+signal GND1 29
+signal GND 13 37
+signal VCCO0 6
+signal VCCO1 30
+signal VCC 12 36
+
+
+# mandatory data registers
+register BSR 68 # Boundary Scan Register
+register BR 1 # Bypass Register
+
+# optional data registers
+register DIR 32 # Device Identification Register
+
+instruction length 8
+
+# mandatory instructions
+instruction EXTEST 00000000 BSR
+instruction SAMPLE/PRELOAD 00011100 BSR
+instruction BYPASS 11111111 BR
+
+# optional instructions
+instruction IDCODE 00010110 DIR
+instruction USERCODE 00010111 DIR
+instruction HIGHZ 00011000 BR
+instruction CLAMP 00100000 BR
+
+# ISC instructions
+#instruction ISC_ENABLE 00010101
+#instruction ISC_DISABLE 00011110
+#instruction ISC_NOOP 00110000
+#instruction ISC_ADDRESS_SHIFT 00000001
+#instruction ISC_DATA_SHIFT 00000010
+#instruction ISC_ERASE 00000011
+#instruction ISC_DISCHARGE 00010100
+#instruction ISC_PROGRAM_INCR 00100111
+#instruction ISC_READ_INCR 00101010
+#instruction ISC_PROGRAM_SECURITY 00001001
+#instruction ISC_PROGRAM_DONE 00101111
+#instruction ISC_ERASE_DONE 00100100
+#instruction ISC_PROGRAM_USERCODE 00011010
+#instruction LSC_ADDRESS_INIT 00100001
+
+
+# Boundary Scan Register bit definition
+
+bit 67 I ? CLK0
+bit 66 B ? IOA0 65 0 Z
+bit 65 C 0 IOA0
+bit 64 B ? IOA1 63 0 Z
+bit 63 C 0 IOA1
+bit 62 B ? IOA2 61 0 Z
+bit 61 C 0 IOA2
+bit 60 B ? IOA3 59 0 Z
+bit 59 C 0 IOA3
+bit 58 B ? IOA4 57 0 Z
+bit 57 C 0 IOA4
+bit 56 B ? IOA5 55 0 Z
+bit 55 C 0 IOA5
+bit 54 B ? IOA6 53 0 Z
+bit 53 C 0 IOA6
+bit 52 B ? IOA7 51 0 Z
+bit 51 C 0 IOA7
+bit 50 B ? IOA8 49 0 Z
+bit 49 C 0 IOA8
+bit 48 B ? IOA9 47 0 Z
+bit 47 C 0 IOA9
+bit 46 B ? IOA10 45 0 Z
+bit 45 C 0 IOA10
+bit 44 B ? IOA11 43 0 Z
+bit 43 C 0 IOA11
+bit 42 B ? IOA12 41 0 Z
+bit 41 C 0 IOA12
+bit 40 B ? IOA13 39 0 Z
+bit 39 C 0 IOA13
+bit 38 B ? IOA14 37 0 Z
+bit 37 C 0 IOA14
+bit 36 B ? IOA15 35 0 Z
+bit 35 C 0 IOA15
+bit 34 I ? CLK1
+bit 33 I ? CLK2
+bit 32 B ? IOB0 31 0 Z
+bit 31 C 0 IOB0
+bit 30 B ? IOB1 29 0 Z
+bit 29 C 0 IOB1
+bit 28 B ? IOB2 27 0 Z
+bit 27 C 0 IOB2
+bit 26 B ? IOB3 25 0 Z
+bit 25 C 0 IOB3
+bit 24 B ? IOB4 23 0 Z
+bit 23 C 0 IOB4
+bit 22 B ? IOB5 21 0 Z
+bit 21 C 0 IOB5
+bit 20 B ? IOB6 19 0 Z
+bit 19 C 0 IOB6
+bit 18 B ? IOB7 17 0 Z
+bit 17 C 0 IOB7
+bit 16 B ? IOB8 15 0 Z
+bit 15 C 0 IOB8
+bit 14 B ? IOB9 13 0 Z
+bit 13 C 0 IOB9
+bit 12 B ? IOB10 11 0 Z
+bit 11 C 0 IOB10
+bit 10 B ? IOB11 9 0 Z
+bit 9 C 0 IOB11
+bit 8 B ? IOB12 7 0 Z
+bit 7 C 0 IOB12
+bit 6 B ? IOB13 5 0 Z
+bit 5 C 0 IOB13
+bit 4 B ? IOB14 3 0 Z
+bit 3 C 0 IOB14
+bit 2 B ? IOB15 1 0 Z
+bit 1 C 0 IOB15
+bit 0 I ? CLK3
--- /dev/null
+#
+# $Id$
+#
+# Copyright (C) 2002 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Marcel Telka <marcel@telka.sk>, 2002.
+#
+
+# bits 31-28 of the Device Identification Register
+
+0001 lc4064zc 0
+0011 lc4064zc 1
+0101 lc4064zc 2
+0111 lc4064zc 3
+1001 lc4064zc 4
+1011 lc4064zc 5
+1101 lc4064zc 6
+1111 lc4064zc 7
--- /dev/null
+##############################################################################
+#
+# Lattice LC4064ZC part description file
+#
+# This file represents the superset of the following packages:
+# * TQFP 48
+# * csBGA 56
+# * TQFP 100
+# * csBGA 132
+#
+##############################################################################
+
+signal IOA8
+signal IOA9
+signal IOA10
+signal IOA11
+signal IOA12
+signal IOA13
+signal IOA14
+signal IOA15
+signal I0
+signal I1
+signal I2
+signal I3
+signal I4
+signal I5
+signal IOB15
+signal IOB14
+signal IOB13
+signal IOB12
+signal IOB11
+signal IOB10
+signal IOB9
+signal IOB8
+signal IOB7
+signal IOB6
+signal IOB5
+signal IOB4
+signal IOB3
+signal IOB2
+signal IOB1
+signal IOB0
+signal CLK1
+signal CLK2
+signal IOC0
+signal IOC1
+signal IOC2
+signal IOC3
+signal IOC4
+signal IOC5
+signal IOC6
+signal IOC7
+signal IOC8
+signal IOC9
+signal IOC10
+signal IOC11
+signal IOC12
+signal IOC13
+signal IOC14
+signal IOC15
+signal IOD15
+signal IOD14
+signal IOD13
+signal IOD12
+signal IOD11
+signal IOD10
+signal IOD9
+signal IOD8
+signal IOD7
+signal IOD6
+signal IOD5
+signal IOD4
+signal IOD3
+signal IOD2
+signal IOD1
+signal IOD0
+signal CLK3
+signal CLK0
+signal IOA0
+signal IOA1
+signal IOA2
+signal IOA3
+signal IOA4
+signal IOA5
+signal IOA6
+
+register BSR 138
+register BR 1
+register DIR 32
+
+instruction length 8
+
+instruction BYPASS 11111111 BR
+instruction SAMPLE/PRELOAD 00011100 BSR
+instruction EXTEST 00000000 BSR
+instruction IDCODE 00010110 DIR
+instruction USERCODE 00010111 DIR
+instruction HIGHZ 00011000 BR
+instruction CLAMP 00100000 BR
+
+bit 137 I 1 CLK0
+bit 136 B 1 IOA0 135 0 Z
+bit 135 C 0 *
+bit 134 B 1 IOA1 133 0 Z
+bit 133 C 0 *
+bit 132 B 1 IOA2 131 0 Z
+bit 131 C 0 *
+bit 130 B 1 IOA3 129 0 Z
+bit 129 C 0 *
+bit 128 B 1 IOA4 127 0 Z
+bit 127 C 0 *
+bit 126 B 1 IOA5 125 0 Z
+bit 125 C 0 *
+bit 124 B 1 IOA6 123 0 Z
+bit 123 C 0 *
+bit 122 B 1 IOA7 121 0 Z
+bit 121 C 0 *
+bit 120 B 1 IOA8 119 0 Z
+bit 119 C 0 *
+bit 118 B 1 IOA9 117 0 Z
+bit 117 C 0 *
+bit 116 B 1 IOA10 115 0 Z
+bit 115 C 0 *
+bit 114 B 1 IOA11 113 0 Z
+bit 113 C 0 *
+bit 112 B 1 IOA12 111 0 Z
+bit 111 C 0 *
+bit 110 B 1 IOA13 109 0 Z
+bit 109 C 0 *
+bit 108 B 1 IOA14 107 0 Z
+bit 107 C 0 *
+bit 106 B 1 IOA15 105 0 Z
+bit 105 C 0 *
+bit 104 I 1 I0
+bit 103 I 1 I1
+bit 102 I 1 I2
+bit 101 B 1 IOB0 100 0 Z
+bit 100 C 0 *
+bit 99 B 1 IOB1 98 0 Z
+bit 98 C 0 *
+bit 97 B 1 IOB2 96 0 Z
+bit 96 C 0 *
+bit 95 B 1 IOB3 94 0 Z
+bit 94 C 0 *
+bit 93 B 1 IOB4 92 0 Z
+bit 92 C 0 *
+bit 91 B 1 IOB5 90 0 Z
+bit 90 C 0 *
+bit 89 B 1 IOB6 88 0 Z
+bit 88 C 0 *
+bit 87 B 1 IOB7 86 0 Z
+bit 86 C 0 *
+bit 85 B 1 IOB8 84 0 Z
+bit 84 C 0 *
+bit 83 B 1 IOB9 82 0 Z
+bit 82 C 0 *
+bit 81 B 1 IOB10 80 0 Z
+bit 80 C 0 *
+bit 79 B 1 IOB11 78 0 Z
+bit 78 C 0 *
+bit 77 B 1 IOB12 76 0 Z
+bit 76 C 0 *
+bit 75 B 1 IOB13 74 0 Z
+bit 74 C 0 *
+bit 73 B 1 IOB14 72 0 Z
+bit 72 C 0 *
+bit 71 B 1 IOB15 70 0 Z
+bit 70 C 0 *
+bit 69 I 1 CLK1
+bit 68 I 1 CLK2
+bit 67 B 1 IOC0 66 0 Z
+bit 66 C 0 *
+bit 65 B 1 IOC1 64 0 Z
+bit 64 C 0 *
+bit 63 B 1 IOC2 62 0 Z
+bit 62 C 0 *
+bit 61 B 1 IOC3 60 0 Z
+bit 60 C 0 *
+bit 59 B 1 IOC4 58 0 Z
+bit 58 C 0 *
+bit 57 B 1 IOC5 56 0 Z
+bit 56 C 0 *
+bit 55 B 1 IOC6 54 0 Z
+bit 54 C 0 *
+bit 53 B 1 IOC7 52 0 Z
+bit 52 C 0 *
+bit 51 B 1 IOC8 50 0 Z
+bit 50 C 0 *
+bit 49 B 1 IOC9 48 0 Z
+bit 48 C 0 *
+bit 47 B 1 IOC10 46 0 Z
+bit 46 C 0 *
+bit 45 B 1 IOC11 44 0 Z
+bit 44 C 0 *
+bit 43 B 1 IOC12 42 0 Z
+bit 42 C 0 *
+bit 41 B 1 IOC13 40 0 Z
+bit 40 C 0 *
+bit 39 B 1 IOC14 38 0 Z
+bit 38 C 0 *
+bit 37 B 1 IOC15 36 0 Z
+bit 36 C 0 *
+bit 35 I 1 I3
+bit 34 I 1 I4
+bit 33 I 1 I5
+bit 32 B 1 IOD0 31 0 Z
+bit 31 C 0 *
+bit 30 B 1 IOD1 29 0 Z
+bit 29 C 0 *
+bit 28 B 1 IOD2 27 0 Z
+bit 27 C 0 *
+bit 26 B 1 IOD3 25 0 Z
+bit 25 C 0 *
+bit 24 B 1 IOD4 23 0 Z
+bit 23 C 0 *
+bit 22 B 1 IOD5 21 0 Z
+bit 21 C 0 *
+bit 20 B 1 IOD6 19 0 Z
+bit 19 C 0 *
+bit 18 B 1 IOD7 17 0 Z
+bit 17 C 0 *
+bit 16 B 1 IOD8 15 0 Z
+bit 15 C 0 *
+bit 14 B 1 IOD9 13 0 Z
+bit 13 C 0 *
+bit 12 B 1 IOD10 11 0 Z
+bit 11 C 0 *
+bit 10 B 1 IOD11 9 0 Z
+bit 9 C 0 *
+bit 8 B 1 IOD12 7 0 Z
+bit 7 C 0 *
+bit 6 B 1 IOD13 5 0 Z
+bit 5 C 0 *
+bit 4 B 1 IOD14 3 0 Z
+bit 3 C 0 *
+bit 2 B 1 IOD15 1 0 Z
+bit 1 C 0 *
+bit 0 I 1 CLK3
--- /dev/null
+#
+# $Id$
+#
+# Copyright (C) 2004 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Ian Campbell <icampbell@arcom.com>, 2004
+#
+
+# bits 31-28 of the Device Identification Register
+0000 lc4128c-tqfp100 0
--- /dev/null
+#
+# $Id$
+#
+# JTAG declarations for Lattice LC4128C (100-pin TQFP)
+# Copyright (C) 2004 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Generated from lc4128ct100_isc.bsm using bsdl2jtag by
+# Ian Campbell <icampbell@arcom.com>, 2004.
+#
+# lc4128ct100_isc.bsm had the following copyright:
+# Copyright 2000 - 2003 Lattice Semiconductor Corporation
+# 5555 NE Moore Ct., Hillsboro, OR 97124
+# All rights reserved. No part of this program or publication
+# may be reproduced, transmitted, transcribed, stored in a
+# retrieval system, or translated into any language or
+# computer language, in any form or by any means without this
+# notice appearing within.
+
+signal GND0 1
+signal GND1 2
+signal GND2 3
+signal GND3 4
+signal TDI 5
+signal IOB0 6
+signal IOB2 7
+signal IOB4 8
+signal IOB6 9
+signal GNDO00 10
+signal GNDO01 11
+signal GNDO02 12
+signal GNDO03 13
+signal IOB8 14
+signal IOB10 15
+signal IOB12 16
+signal IOB13 17
+signal I0 18
+signal I1 19
+signal I2 20
+signal I3 21
+signal I4 22
+signal I5 23
+signal VCCO00 24
+signal VCCO01 25
+signal VCCO02 26
+signal IOC14 27
+signal IOC12 28
+signal IOC10 29
+signal IOC8 30
+signal IOC6 31
+signal IOC5 32
+signal IOC4 33
+signal IOC2 34
+signal TCK 35
+signal VCC0 36
+signal VCC1 37
+signal VCC2 38
+signal VCC3 39
+signal IOD13 40
+signal IOD12 41
+signal IOD10 42
+signal IOD8 43
+signal IOD6 44
+signal IOD4 45
+signal IOD2 46
+signal IOD0 47
+signal CLK1 48
+signal CLK2 49
+signal IOE0 50
+signal IOE2 51
+signal IOE4 52
+signal IOE6 53
+signal VCCO10 54
+signal VCCO11 55
+signal VCCO12 56
+signal GNDO10 57
+signal GNDO11 58
+signal GNDO12 59
+signal GNDO13 60
+signal IOE8 61
+signal IOE10 62
+signal IOE12 63
+signal IOE14 64
+signal TMS 65
+signal IOF0 66
+signal IOF2 67
+signal IOF4 68
+signal IOF6 69
+signal IOF8 70
+signal IOF10 71
+signal IOF12 72
+signal IOF13 73
+signal IOG14 74
+signal IOG12 75
+signal IOG10 76
+signal IOG8 77
+signal IOG6 78
+signal IOG5 79
+signal IOG4 80
+signal IOG2 81
+signal TDO 82
+signal IOH13 83
+signal IOH12 84
+signal IOH10 85
+signal IOH8 86
+signal IOH6 87
+signal IOH4 88
+signal IOH2 89
+signal IOH0 90
+signal CLK3 91
+signal CLK0 92
+signal IOA0 93
+signal IOA2 94
+signal IOA4 95
+signal IOA6 96
+signal IOA8 97
+signal IOA10 98
+signal IOA12 99
+
+register BSR 196
+register BR 1
+register DIR 32
+
+instruction length 8
+
+instruction BYPASS 11111111 BR
+instruction SAMPLE/PRELOAD 00011100 BSR
+instruction EXTEST 00000000 BSR
+instruction IDCODE 00010110 DIR
+
+bit 195 I 1 CLK0
+bit 194 O 1 IOA0 193 0 Z
+bit 193 C 0 *
+bit 192 O 0 *
+bit 191 O 0 *
+bit 190 O 1 IOA2 189 0 Z
+bit 189 C 0 *
+bit 188 O 1 IOA4 187 0 Z
+bit 187 C 0 *
+bit 186 O 0 *
+bit 185 O 0 *
+bit 184 O 1 IOA6 183 0 Z
+bit 183 C 0 *
+bit 182 O 1 IOA8 181 0 Z
+bit 181 C 0 *
+bit 180 O 0 *
+bit 179 O 0 *
+bit 178 O 1 IOA10 177 0 Z
+bit 177 C 0 *
+bit 176 O 1 IOA12 175 0 Z
+bit 175 C 0 *
+bit 174 O 0 *
+bit 173 O 0 *
+bit 172 O 1 IOA14 171 0 Z
+bit 171 C 0 *
+bit 170 O 1 IOB0 169 0 Z
+bit 169 C 0 *
+bit 168 O 0 *
+bit 167 O 0 *
+bit 166 O 1 IOB2 165 0 Z
+bit 165 C 0 *
+bit 164 O 1 IOB4 163 0 Z
+bit 163 C 0 *
+bit 162 O 0 *
+bit 161 O 0 *
+bit 160 O 1 IOB6 159 0 Z
+bit 159 C 0 *
+bit 158 O 1 IOB8 157 0 Z
+bit 157 C 0 *
+bit 156 O 0 *
+bit 155 O 0 *
+bit 154 O 1 IOB10 153 0 Z
+bit 153 C 0 *
+bit 152 O 1 IOB12 151 0 Z
+bit 151 C 0 *
+bit 150 O 1 IOB13 149 0 Z
+bit 149 C 0 *
+bit 148 O 1 I0 147 0 Z
+bit 147 C 0 *
+bit 146 O 1 IOD0 145 0 Z
+bit 145 C 0 *
+bit 144 O 0 *
+bit 143 O 0 *
+bit 142 O 1 IOD2 141 0 Z
+bit 141 C 0 *
+bit 140 O 1 IOD4 139 0 Z
+bit 139 C 0 *
+bit 138 O 0 *
+bit 137 O 0 *
+bit 136 O 1 IOD6 135 0 Z
+bit 135 C 0 *
+bit 134 O 1 IOD8 133 0 Z
+bit 133 C 0 *
+bit 132 O 0 *
+bit 131 O 0 *
+bit 130 O 1 IOD10 129 0 Z
+bit 129 C 0 *
+bit 128 O 1 IOD12 127 0 Z
+bit 127 C 0 *
+bit 126 O 1 IOD13 125 0 Z
+bit 125 C 0 *
+bit 124 O 1 I2 123 0 Z
+bit 123 C 0 *
+bit 122 O 1 I1 121 0 Z
+bit 121 C 0 *
+bit 120 O 0 *
+bit 119 O 0 *
+bit 118 O 1 IOC2 117 0 Z
+bit 117 C 0 *
+bit 116 O 1 IOC4 115 0 Z
+bit 115 C 0 *
+bit 114 O 1 IOC5 113 0 Z
+bit 113 C 0 *
+bit 112 O 1 IOC6 111 0 Z
+bit 111 C 0 *
+bit 110 O 1 IOC8 109 0 Z
+bit 109 C 0 *
+bit 108 O 0 *
+bit 107 O 0 *
+bit 106 O 1 IOC10 105 0 Z
+bit 105 C 0 *
+bit 104 O 1 IOC12 103 0 Z
+bit 103 C 0 *
+bit 102 O 0 *
+bit 101 O 0 *
+bit 100 O 1 IOC14 99 0 Z
+bit 99 C 0 *
+bit 98 I 1 CLK1
+bit 97 I 1 CLK2
+bit 96 O 1 IOE0 95 0 Z
+bit 95 C 0 *
+bit 94 O 0 *
+bit 93 O 0 *
+bit 92 O 1 IOE2 91 0 Z
+bit 91 C 0 *
+bit 90 O 1 IOE4 89 0 Z
+bit 89 C 0 *
+bit 88 O 0 *
+bit 87 O 0 *
+bit 86 O 1 IOE6 85 0 Z
+bit 85 C 0 *
+bit 84 O 1 IOE8 83 0 Z
+bit 83 C 0 *
+bit 82 O 0 *
+bit 81 O 0 *
+bit 80 O 1 IOE10 79 0 Z
+bit 79 C 0 *
+bit 78 O 1 IOE12 77 0 Z
+bit 77 C 0 *
+bit 76 O 0 *
+bit 75 O 0 *
+bit 74 O 1 IOE14 73 0 Z
+bit 73 C 0 *
+bit 72 O 1 IOF0 71 0 Z
+bit 71 C 0 *
+bit 70 O 0 *
+bit 69 O 0 *
+bit 68 O 1 IOF2 67 0 Z
+bit 67 C 0 *
+bit 66 O 1 IOF4 65 0 Z
+bit 65 C 0 *
+bit 64 O 0 *
+bit 63 O 0 *
+bit 62 O 1 IOF6 61 0 Z
+bit 61 C 0 *
+bit 60 O 1 IOF8 59 0 Z
+bit 59 C 0 *
+bit 58 O 0 *
+bit 57 O 0 *
+bit 56 O 1 IOF10 55 0 Z
+bit 55 C 0 *
+bit 54 O 1 IOF12 53 0 Z
+bit 53 C 0 *
+bit 52 O 1 IOF13 51 0 Z
+bit 51 C 0 *
+bit 50 O 1 I3 49 0 Z
+bit 49 C 0 *
+bit 48 O 1 IOH0 47 0 Z
+bit 47 C 0 *
+bit 46 O 0 *
+bit 45 O 0 *
+bit 44 O 1 IOH2 43 0 Z
+bit 43 C 0 *
+bit 42 O 1 IOH4 41 0 Z
+bit 41 C 0 *
+bit 40 O 0 *
+bit 39 O 0 *
+bit 38 O 1 IOH6 37 0 Z
+bit 37 C 0 *
+bit 36 O 1 IOH8 35 0 Z
+bit 35 C 0 *
+bit 34 O 0 *
+bit 33 O 0 *
+bit 32 O 1 IOH10 31 0 Z
+bit 31 C 0 *
+bit 30 O 1 IOH12 29 0 Z
+bit 29 C 0 *
+bit 28 O 1 IOH13 27 0 Z
+bit 27 C 0 *
+bit 26 O 1 I5 25 0 Z
+bit 25 C 0 *
+bit 24 O 1 I4 23 0 Z
+bit 23 C 0 *
+bit 22 O 0 *
+bit 21 O 0 *
+bit 20 O 1 IOG2 19 0 Z
+bit 19 C 0 *
+bit 18 O 1 IOG4 17 0 Z
+bit 17 C 0 *
+bit 16 O 1 IOG5 15 0 Z
+bit 15 C 0 *
+bit 14 O 1 IOG6 13 0 Z
+bit 13 C 0 *
+bit 12 O 1 IOG8 11 0 Z
+bit 11 C 0 *
+bit 10 O 0 *
+bit 9 O 0 *
+bit 8 O 1 IOG10 7 0 Z
+bit 7 C 0 *
+bit 6 O 1 IOG12 5 0 Z
+bit 5 C 0 *
+bit 4 O 0 *
+bit 3 O 0 *
+bit 2 O 1 IOG14 1 0 Z
+bit 1 C 0 *
+bit 0 I 1 CLK3
--- /dev/null
+#
+# $Id$
+#
+# Copyright (C) 2002 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Marcel Telka <marcel@telka.sk>, 2002.
+#
+
+# bits 31-28 of the Device Identification Register
+
+0000 lfec2-12e 0
--- /dev/null
+##############################################################################
+#
+# Lattice LFEC2_12E part description file
+#
+# This file represents the superset of the following packages:
+# * TQFP 144
+# * PQFP 208
+# * FPBGA 256
+# * FPBGA 484
+#
+##############################################################################
+
+signal PT2A
+signal PT2B
+signal PT3A
+signal PT3B
+signal PT4A
+signal PT5A
+signal PT4B
+signal PT5B
+signal PT6A
+signal PT7A
+signal PT6B
+signal PT7B
+signal PT8A
+signal PT9A
+signal PT8B
+signal PT9B
+signal PT10A
+signal PT10B
+signal PT11A
+signal PT12A
+signal PT11B
+signal PT12B
+signal PT13A
+signal PT14A
+signal PT13B
+signal PT14B
+signal PT15A
+signal PT16A
+signal PT15B
+signal PT16B
+signal PT17A
+signal PT18A
+signal PT17B
+signal PT18B
+signal PT20A
+signal PT21A
+signal PT20B
+signal PT21B
+signal PT22A
+signal PT22B
+signal PT23A
+signal PT23B
+signal PT24A
+signal PT25A
+signal PT24B
+signal PT25B
+signal PT26A
+signal PT27A
+signal PT26B
+signal PT27B
+signal PT28A
+signal PT28B
+signal PT30A
+signal PT30B
+signal PT31A
+signal PT31B
+signal PT32A
+signal PT32B
+signal PT33A
+signal PT34A
+signal PT33B
+signal PT34B
+signal PT35A
+signal PT36A
+signal PT35B
+signal PT36B
+signal PT37A
+signal PT37B
+signal PT39A
+signal PT39B
+signal PT40A
+signal PT40B
+signal PT42A
+signal PT43A
+signal PT42B
+signal PT43B
+signal PT44A
+signal PT45A
+signal PT44B
+signal PT45B
+signal PT46A
+signal PT46B
+signal PT47A
+signal PT48A
+signal PT47B
+signal PT48B
+signal PT49A
+signal PT50A
+signal PT49B
+signal PT50B
+signal PT51A
+signal PT52A
+signal PT51B
+signal PT52B
+signal PT53A
+signal PT54A
+signal PT53B
+signal PT54B
+signal PT55A
+signal PT55B
+signal PR3A
+signal PR2A
+signal PR3B
+signal PR2B
+signal PR5A
+signal PR4A
+signal PR5B
+signal PR4B
+signal PR7A
+signal PR6A
+signal PR7B
+signal PR6B
+signal PR9A
+signal PR8A
+signal PR9B
+signal PR8B
+signal PR10A
+signal PR10B
+signal PR12A
+signal PR11A
+signal PR12B
+signal PR11B
+signal PR13A
+signal PR13B
+signal PR15A
+signal PR15B
+signal PR16A
+signal PR16B
+signal PR17A
+signal PR17B
+signal PR18A
+signal PR18B
+signal PR20A
+signal PR20B
+signal PR22A
+signal PR22B
+signal PR21A
+signal PR21B
+signal PR23B
+signal PR23A
+signal PR24A
+signal PR24B
+signal PR25A
+signal PR26B
+signal PR25B
+signal PR27A
+signal PR26A
+signal PR27B
+signal PR28A
+signal PR29A
+signal PR28B
+signal DONE
+signal PR30A
+signal CCLK
+signal PR29B
+signal INITN
+signal PR30B
+signal CFG0
+signal PROGRAMN
+signal CFG1
+signal CFG2
+signal PB55B
+signal PB55A
+signal PB54B
+signal PB53B
+signal PB54A
+signal PB53A
+signal PB52B
+signal PB51B
+signal PB52A
+signal PB51A
+signal PB50B
+signal PB49B
+signal PB50A
+signal PB49A
+signal PB48B
+signal PB48A
+signal PB47B
+signal PB47A
+signal PB46B
+signal PB46A
+signal PB45B
+signal PB44B
+signal PB45A
+signal PB44A
+signal PB43B
+signal PB42B
+signal PB43A
+signal PB42A
+signal PB41B
+signal PB40B
+signal PB41A
+signal PB40A
+signal PB39B
+signal PB39A
+signal PB37B
+signal PB37A
+signal PB36B
+signal PB35B
+signal PB36A
+signal PB35A
+signal PB34B
+signal PB33B
+signal PB34A
+signal PB33A
+signal PB32B
+signal PB32A
+signal PB31B
+signal PB31A
+signal PB26B
+signal PB26A
+signal PB25B
+signal PB24B
+signal PB25A
+signal PB24A
+signal PB23B
+signal PB22B
+signal PB23A
+signal PB22A
+signal PB21B
+signal PB20B
+signal PB21A
+signal PB20A
+signal PB18B
+signal PB17B
+signal PB18A
+signal PB17A
+signal PB16B
+signal PB15B
+signal PB16A
+signal PB15A
+signal PB14B
+signal PB13B
+signal PB14A
+signal PB13A
+signal PB12B
+signal PB11B
+signal PB12A
+signal PB11A
+signal PB9B
+signal PB8B
+signal PB9A
+signal PB8A
+signal PB7B
+signal PB6B
+signal PB7A
+signal PB6A
+signal PB5B
+signal PB4B
+signal PB5A
+signal PB4A
+signal PB3B
+signal PB2B
+signal PB3A
+signal PB2A
+signal PL30B
+signal PL31B
+signal PL30A
+signal PL31A
+signal PL28B
+signal PL29B
+signal PL28A
+signal PL29A
+signal PL27B
+signal PL26B
+signal PL27A
+signal PL26A
+signal PL25B
+signal PL24B
+signal PL25A
+signal PL24A
+signal PL23B
+signal PL22B
+signal PL21B
+signal PL23A
+signal PL22A
+signal PL20B
+signal PL21A
+signal PL20A
+signal PL18B
+signal PL18A
+signal PL17B
+signal PL17A
+signal PL16B
+signal PL16A
+signal PL15B
+signal PL15A
+signal PL13B
+signal PL13A
+signal PL12B
+signal PL12A
+signal PL11B
+signal PL11A
+signal PL10B
+signal PL10A
+signal PL8B
+signal PL9B
+signal PL8A
+signal PL9A
+signal PL7B
+signal PL6B
+signal PL6A
+signal PL7A
+signal PL4B
+signal PL5B
+signal PL4A
+signal PL5A
+signal PL2B
+signal PL3B
+signal PL2A
+signal PL3A
+
+register BSR 643
+register BR 1
+register DIR 32
+
+instruction length 8
+
+instruction IDCODE 00011001 DIR
+instruction SAMPLE/PRELOAD 00011100 BSR
+instruction BYPASS 11111111 BR
+instruction EXTEST 11010101 BSR
+instruction USERCODE 00010111 DIR
+instruction HIGHZ 00011000 BYPASS
+instruction CLAMP 00100000 BYPASS
+
+bit 642 B 1 PB26B 641 1 Z
+bit 641 C 1 *
+bit 640 B 1 PB26A 639 1 Z
+bit 639 C 1 *
+bit 638 B 1 PB25B 637 1 Z
+bit 637 C 1 *
+bit 636 B 1 PB25A 635 1 Z
+bit 635 C 1 *
+bit 634 B 1 PB24B 633 1 Z
+bit 633 C 1 *
+bit 632 B 1 PB24A 631 1 Z
+bit 631 C 1 *
+bit 630 B 1 PB23B 629 1 Z
+bit 629 C 1 *
+bit 628 B 1 PB23A 627 1 Z
+bit 627 C 1 *
+bit 626 B 1 PB22B 625 1 Z
+bit 625 C 1 *
+bit 624 B 1 PB22A 623 1 Z
+bit 623 C 1 *
+bit 622 B 1 PB21B 621 1 Z
+bit 621 C 1 *
+bit 620 B 1 PB21A 619 1 Z
+bit 619 C 1 *
+bit 618 B 1 PB20B 617 1 Z
+bit 617 C 1 *
+bit 616 B 1 PB20A 615 1 Z
+bit 615 C 1 *
+bit 614 O 1 *
+bit 613 O 1 *
+bit 612 O 1 *
+bit 611 O 1 *
+bit 610 B 1 PB18B 609 1 Z
+bit 609 C 1 *
+bit 608 B 1 PB18A 607 1 Z
+bit 607 C 1 *
+bit 606 B 1 PB17B 605 1 Z
+bit 605 C 1 *
+bit 604 B 1 PB17A 603 1 Z
+bit 603 C 1 *
+bit 602 B 1 PB16B 601 1 Z
+bit 601 C 1 *
+bit 600 B 1 PB16A 599 1 Z
+bit 599 C 1 *
+bit 598 B 1 PB15B 597 1 Z
+bit 597 C 1 *
+bit 596 B 1 PB15A 595 1 Z
+bit 595 C 1 *
+bit 594 B 1 PB14B 593 1 Z
+bit 593 C 1 *
+bit 592 B 1 PB14A 591 1 Z
+bit 591 C 1 *
+bit 590 B 1 PB13B 589 1 Z
+bit 589 C 1 *
+bit 588 B 1 PB13A 587 1 Z
+bit 587 C 1 *
+bit 586 B 1 PB12B 585 1 Z
+bit 585 C 1 *
+bit 584 B 1 PB12A 583 1 Z
+bit 583 C 1 *
+bit 582 B 1 PB11B 581 1 Z
+bit 581 C 1 *
+bit 580 B 1 PB11A 579 1 Z
+bit 579 C 1 *
+bit 578 O 1 *
+bit 577 O 1 *
+bit 576 O 1 *
+bit 575 O 1 *
+bit 574 B 1 PB9B 573 1 Z
+bit 573 C 1 *
+bit 572 B 1 PB9A 571 1 Z
+bit 571 C 1 *
+bit 570 B 1 PB8B 569 1 Z
+bit 569 C 1 *
+bit 568 B 1 PB8A 567 1 Z
+bit 567 C 1 *
+bit 566 B 1 PB7B 565 1 Z
+bit 565 C 1 *
+bit 564 B 1 PB7A 563 1 Z
+bit 563 C 1 *
+bit 562 B 1 PB6B 561 1 Z
+bit 561 C 1 *
+bit 560 B 1 PB6A 559 1 Z
+bit 559 C 1 *
+bit 558 B 1 PB5B 557 1 Z
+bit 557 C 1 *
+bit 556 B 1 PB5A 555 1 Z
+bit 555 C 1 *
+bit 554 B 1 PB4B 553 1 Z
+bit 553 C 1 *
+bit 552 B 1 PB4A 551 1 Z
+bit 551 C 1 *
+bit 550 B 1 PB3B 549 1 Z
+bit 549 C 1 *
+bit 548 B 1 PB3A 547 1 Z
+bit 547 C 1 *
+bit 546 B 1 PB2B 545 1 Z
+bit 545 C 1 *
+bit 544 B 1 PB2A 543 1 Z
+bit 543 C 1 *
+bit 542 O 1 *
+bit 541 B 1 PL31B 540 1 Z
+bit 540 C 1 *
+bit 539 B 1 PL31A 538 1 Z
+bit 538 C 1 *
+bit 537 B 1 PL30B 536 1 Z
+bit 536 C 1 *
+bit 535 B 1 PL30A 534 1 Z
+bit 534 C 1 *
+bit 533 B 1 PL29B 532 1 Z
+bit 532 C 1 *
+bit 531 B 1 PL29A 530 1 Z
+bit 530 C 1 *
+bit 529 B 1 PL28B 528 1 Z
+bit 528 C 1 *
+bit 527 B 1 PL28A 526 1 Z
+bit 526 C 1 *
+bit 525 B 1 PL27B 524 1 Z
+bit 524 C 1 *
+bit 523 B 1 PL27A 522 1 Z
+bit 522 C 1 *
+bit 521 B 1 PL26B 520 1 Z
+bit 520 C 1 *
+bit 519 B 1 PL26A 518 1 Z
+bit 518 C 1 *
+bit 517 B 1 PL25B 516 1 Z
+bit 516 C 1 *
+bit 515 B 1 PL25A 514 1 Z
+bit 514 C 1 *
+bit 513 B 1 PL24B 512 1 Z
+bit 512 C 1 *
+bit 511 B 1 PL24A 510 1 Z
+bit 510 C 1 *
+bit 509 B 1 PL23B 508 1 Z
+bit 508 C 1 *
+bit 507 B 1 PL23A 506 1 Z
+bit 506 C 1 *
+bit 505 B 1 PL22B 504 1 Z
+bit 504 C 1 *
+bit 503 B 1 PL22A 502 1 Z
+bit 502 C 1 *
+bit 501 B 1 PL21B 500 1 Z
+bit 500 C 1 *
+bit 499 B 1 PL21A 498 1 Z
+bit 498 C 1 *
+bit 497 B 1 PL20B 496 1 Z
+bit 496 C 1 *
+bit 495 B 1 PL20A 494 1 Z
+bit 494 C 1 *
+bit 493 B 1 PL18B 492 1 Z
+bit 492 C 1 *
+bit 491 B 1 PL18A 490 1 Z
+bit 490 C 1 *
+bit 489 B 1 PL17B 488 1 Z
+bit 488 C 1 *
+bit 487 B 1 PL17A 486 1 Z
+bit 486 C 1 *
+bit 485 B 1 PL16B 484 1 Z
+bit 484 C 1 *
+bit 483 B 1 PL16A 482 1 Z
+bit 482 C 1 *
+bit 481 B 1 PL15B 480 1 Z
+bit 480 C 1 *
+bit 479 B 1 PL15A 478 1 Z
+bit 478 C 1 *
+bit 477 B 1 PL13B 476 1 Z
+bit 476 C 1 *
+bit 475 B 1 PL13A 474 1 Z
+bit 474 C 1 *
+bit 473 B 1 PL12B 472 1 Z
+bit 472 C 1 *
+bit 471 B 1 PL12A 470 1 Z
+bit 470 C 1 *
+bit 469 B 1 PL11B 468 1 Z
+bit 468 C 1 *
+bit 467 B 1 PL11A 466 1 Z
+bit 466 C 1 *
+bit 465 B 1 PL10B 464 1 Z
+bit 464 C 1 *
+bit 463 B 1 PL10A 462 1 Z
+bit 462 C 1 *
+bit 461 B 1 PL9B 460 1 Z
+bit 460 C 1 *
+bit 459 B 1 PL9A 458 1 Z
+bit 458 C 1 *
+bit 457 B 1 PL8B 456 1 Z
+bit 456 C 1 *
+bit 455 B 1 PL8A 454 1 Z
+bit 454 C 1 *
+bit 453 B 1 PL7B 452 1 Z
+bit 452 C 1 *
+bit 451 B 1 PL7A 450 1 Z
+bit 450 C 1 *
+bit 449 B 1 PL6B 448 1 Z
+bit 448 C 1 *
+bit 447 B 1 PL6A 446 1 Z
+bit 446 C 1 *
+bit 445 B 1 PL5B 444 1 Z
+bit 444 C 1 *
+bit 443 B 1 PL5A 442 1 Z
+bit 442 C 1 *
+bit 441 B 1 PL4B 440 1 Z
+bit 440 C 1 *
+bit 439 B 1 PL4A 438 1 Z
+bit 438 C 1 *
+bit 437 B 1 PL3B 436 1 Z
+bit 436 C 1 *
+bit 435 B 1 PL3A 434 1 Z
+bit 434 C 1 *
+bit 433 B 1 PL2B 432 1 Z
+bit 432 C 1 *
+bit 431 B 1 PL2A 430 1 Z
+bit 430 C 1 *
+bit 429 B 1 PT2A 428 1 Z
+bit 428 C 1 *
+bit 427 B 1 PT2B 426 1 Z
+bit 426 C 1 *
+bit 425 B 1 PT3A 424 1 Z
+bit 424 C 1 *
+bit 423 B 1 PT3B 422 1 Z
+bit 422 C 1 *
+bit 421 B 1 PT4A 420 1 Z
+bit 420 C 1 *
+bit 419 B 1 PT4B 418 1 Z
+bit 418 C 1 *
+bit 417 B 1 PT5A 416 1 Z
+bit 416 C 1 *
+bit 415 B 1 PT5B 414 1 Z
+bit 414 C 1 *
+bit 413 B 1 PT6A 412 1 Z
+bit 412 C 1 *
+bit 411 B 1 PT6B 410 1 Z
+bit 410 C 1 *
+bit 409 B 1 PT7A 408 1 Z
+bit 408 C 1 *
+bit 407 B 1 PT7B 406 1 Z
+bit 406 C 1 *
+bit 405 B 1 PT8A 404 1 Z
+bit 404 C 1 *
+bit 403 B 1 PT8B 402 1 Z
+bit 402 C 1 *
+bit 401 B 1 PT9A 400 1 Z
+bit 400 C 1 *
+bit 399 B 1 PT9B 398 1 Z
+bit 398 C 1 *
+bit 397 B 1 PT10A 396 1 Z
+bit 396 C 1 *
+bit 395 B 1 PT10B 394 1 Z
+bit 394 C 1 *
+bit 393 B 1 PT11A 392 1 Z
+bit 392 C 1 *
+bit 391 B 1 PT11B 390 1 Z
+bit 390 C 1 *
+bit 389 B 1 PT12A 388 1 Z
+bit 388 C 1 *
+bit 387 B 1 PT12B 386 1 Z
+bit 386 C 1 *
+bit 385 B 1 PT13A 384 1 Z
+bit 384 C 1 *
+bit 383 B 1 PT13B 382 1 Z
+bit 382 C 1 *
+bit 381 B 1 PT14A 380 1 Z
+bit 380 C 1 *
+bit 379 B 1 PT14B 378 1 Z
+bit 378 C 1 *
+bit 377 B 1 PT15A 376 1 Z
+bit 376 C 1 *
+bit 375 B 1 PT15B 374 1 Z
+bit 374 C 1 *
+bit 373 B 1 PT16A 372 1 Z
+bit 372 C 1 *
+bit 371 B 1 PT16B 370 1 Z
+bit 370 C 1 *
+bit 369 B 1 PT17A 368 1 Z
+bit 368 C 1 *
+bit 367 B 1 PT17B 366 1 Z
+bit 366 C 1 *
+bit 365 B 1 PT18A 364 1 Z
+bit 364 C 1 *
+bit 363 B 1 PT18B 362 1 Z
+bit 362 C 1 *
+bit 361 O 1 *
+bit 360 O 1 *
+bit 359 O 1 *
+bit 358 O 1 *
+bit 357 B 1 PT20A 356 1 Z
+bit 356 C 1 *
+bit 355 B 1 PT20B 354 1 Z
+bit 354 C 1 *
+bit 353 B 1 PT21A 352 1 Z
+bit 352 C 1 *
+bit 351 B 1 PT21B 350 1 Z
+bit 350 C 1 *
+bit 349 B 1 PT22A 348 1 Z
+bit 348 C 1 *
+bit 347 B 1 PT22B 346 1 Z
+bit 346 C 1 *
+bit 345 B 1 PT23A 344 1 Z
+bit 344 C 1 *
+bit 343 B 1 PT23B 342 1 Z
+bit 342 C 1 *
+bit 341 B 1 PT24A 340 1 Z
+bit 340 C 1 *
+bit 339 B 1 PT24B 338 1 Z
+bit 338 C 1 *
+bit 337 B 1 PT25A 336 1 Z
+bit 336 C 1 *
+bit 335 B 1 PT25B 334 1 Z
+bit 334 C 1 *
+bit 333 B 1 PT26A 332 1 Z
+bit 332 C 1 *
+bit 331 B 1 PT26B 330 1 Z
+bit 330 C 1 *
+bit 329 B 1 PT27A 328 1 Z
+bit 328 C 1 *
+bit 327 B 1 PT27B 326 1 Z
+bit 326 C 1 *
+bit 325 B 1 PT28A 324 1 Z
+bit 324 C 1 *
+bit 323 B 1 PT28B 322 1 Z
+bit 322 C 1 *
+bit 321 B 1 PT30A 320 1 Z
+bit 320 C 1 *
+bit 319 B 1 PT30B 318 1 Z
+bit 318 C 1 *
+bit 317 B 1 PT31A 316 1 Z
+bit 316 C 1 *
+bit 315 B 1 PT31B 314 1 Z
+bit 314 C 1 *
+bit 313 B 1 PT32A 312 1 Z
+bit 312 C 1 *
+bit 311 B 1 PT32B 310 1 Z
+bit 310 C 1 *
+bit 309 B 1 PT33A 308 1 Z
+bit 308 C 1 *
+bit 307 B 1 PT33B 306 1 Z
+bit 306 C 1 *
+bit 305 B 1 PT34A 304 1 Z
+bit 304 C 1 *
+bit 303 B 1 PT34B 302 1 Z
+bit 302 C 1 *
+bit 301 B 1 PT35A 300 1 Z
+bit 300 C 1 *
+bit 299 B 1 PT35B 298 1 Z
+bit 298 C 1 *
+bit 297 B 1 PT36A 296 1 Z
+bit 296 C 1 *
+bit 295 B 1 PT36B 294 1 Z
+bit 294 C 1 *
+bit 293 B 1 PT37A 292 1 Z
+bit 292 C 1 *
+bit 291 B 1 PT37B 290 1 Z
+bit 290 C 1 *
+bit 289 O 1 *
+bit 288 O 1 *
+bit 287 O 1 *
+bit 286 O 1 *
+bit 285 B 1 PT39A 284 1 Z
+bit 284 C 1 *
+bit 283 B 1 PT39B 282 1 Z
+bit 282 C 1 *
+bit 281 B 1 PT40A 280 1 Z
+bit 280 C 1 *
+bit 279 B 1 PT40B 278 1 Z
+bit 278 C 1 *
+bit 277 O 1 *
+bit 276 O 1 *
+bit 275 O 1 *
+bit 274 O 1 *
+bit 273 B 1 PT42A 272 1 Z
+bit 272 C 1 *
+bit 271 B 1 PT42B 270 1 Z
+bit 270 C 1 *
+bit 269 B 1 PT43A 268 1 Z
+bit 268 C 1 *
+bit 267 B 1 PT43B 266 1 Z
+bit 266 C 1 *
+bit 265 B 1 PT44A 264 1 Z
+bit 264 C 1 *
+bit 263 B 1 PT44B 262 1 Z
+bit 262 C 1 *
+bit 261 B 1 PT45A 260 1 Z
+bit 260 C 1 *
+bit 259 B 1 PT45B 258 1 Z
+bit 258 C 1 *
+bit 257 B 1 PT46A 256 1 Z
+bit 256 C 1 *
+bit 255 B 1 PT46B 254 1 Z
+bit 254 C 1 *
+bit 253 B 1 PT47A 252 1 Z
+bit 252 C 1 *
+bit 251 B 1 PT47B 250 1 Z
+bit 250 C 1 *
+bit 249 B 1 PT48A 248 1 Z
+bit 248 C 1 *
+bit 247 B 1 PT48B 246 1 Z
+bit 246 C 1 *
+bit 245 B 1 PT49A 244 1 Z
+bit 244 C 1 *
+bit 243 B 1 PT49B 242 1 Z
+bit 242 C 1 *
+bit 241 B 1 PT50A 240 1 Z
+bit 240 C 1 *
+bit 239 B 1 PT50B 238 1 Z
+bit 238 C 1 *
+bit 237 B 1 PT51A 236 1 Z
+bit 236 C 1 *
+bit 235 B 1 PT51B 234 1 Z
+bit 234 C 1 *
+bit 233 B 1 PT52A 232 1 Z
+bit 232 C 1 *
+bit 231 B 1 PT52B 230 1 Z
+bit 230 C 1 *
+bit 229 B 1 PT53A 228 1 Z
+bit 228 C 1 *
+bit 227 B 1 PT53B 226 1 Z
+bit 226 C 1 *
+bit 225 B 1 PT54A 224 1 Z
+bit 224 C 1 *
+bit 223 B 1 PT54B 222 1 Z
+bit 222 C 1 *
+bit 221 B 1 PT55A 220 1 Z
+bit 220 C 1 *
+bit 219 B 1 PT55B 218 1 Z
+bit 218 C 1 *
+bit 217 B 1 PR2A 216 1 Z
+bit 216 C 1 *
+bit 215 B 1 PR2B 214 1 Z
+bit 214 C 1 *
+bit 213 B 1 PR3A 212 1 Z
+bit 212 C 1 *
+bit 211 B 1 PR3B 210 1 Z
+bit 210 C 1 *
+bit 209 B 1 PR4A 208 1 Z
+bit 208 C 1 *
+bit 207 B 1 PR4B 206 1 Z
+bit 206 C 1 *
+bit 205 B 1 PR5A 204 1 Z
+bit 204 C 1 *
+bit 203 B 1 PR5B 202 1 Z
+bit 202 C 1 *
+bit 201 B 1 PR6A 200 1 Z
+bit 200 C 1 *
+bit 199 B 1 PR6B 198 1 Z
+bit 198 C 1 *
+bit 197 B 1 PR7A 196 1 Z
+bit 196 C 1 *
+bit 195 B 1 PR7B 194 1 Z
+bit 194 C 1 *
+bit 193 B 1 PR8A 192 1 Z
+bit 192 C 1 *
+bit 191 B 1 PR8B 190 1 Z
+bit 190 C 1 *
+bit 189 B 1 PR9A 188 1 Z
+bit 188 C 1 *
+bit 187 B 1 PR9B 186 1 Z
+bit 186 C 1 *
+bit 185 B 1 PR10A 184 1 Z
+bit 184 C 1 *
+bit 183 B 1 PR10B 182 1 Z
+bit 182 C 1 *
+bit 181 B 1 PR11A 180 1 Z
+bit 180 C 1 *
+bit 179 B 1 PR11B 178 1 Z
+bit 178 C 1 *
+bit 177 B 1 PR12A 176 1 Z
+bit 176 C 1 *
+bit 175 B 1 PR12B 174 1 Z
+bit 174 C 1 *
+bit 173 B 1 PR13A 172 1 Z
+bit 172 C 1 *
+bit 171 B 1 PR13B 170 1 Z
+bit 170 C 1 *
+bit 169 B 1 PR15A 168 1 Z
+bit 168 C 1 *
+bit 167 B 1 PR15B 166 1 Z
+bit 166 C 1 *
+bit 165 B 1 PR16A 164 1 Z
+bit 164 C 1 *
+bit 163 B 1 PR16B 162 1 Z
+bit 162 C 1 *
+bit 161 B 1 PR17A 160 1 Z
+bit 160 C 1 *
+bit 159 B 1 PR17B 158 1 Z
+bit 158 C 1 *
+bit 157 B 1 PR18A 156 1 Z
+bit 156 C 1 *
+bit 155 B 1 PR18B 154 1 Z
+bit 154 C 1 *
+bit 153 B 1 PR20A 152 1 Z
+bit 152 C 1 *
+bit 151 B 1 PR20B 150 1 Z
+bit 150 C 1 *
+bit 149 B 1 PR21A 148 1 Z
+bit 148 C 1 *
+bit 147 B 1 PR21B 146 1 Z
+bit 146 C 1 *
+bit 145 B 1 PR22A 144 1 Z
+bit 144 C 1 *
+bit 143 B 1 PR22B 142 1 Z
+bit 142 C 1 *
+bit 141 B 1 PR23A 140 1 Z
+bit 140 C 1 *
+bit 139 B 1 PR23B 138 1 Z
+bit 138 C 1 *
+bit 137 B 1 PR24A 136 1 Z
+bit 136 C 1 *
+bit 135 B 1 PR24B 134 1 Z
+bit 134 C 1 *
+bit 133 B 1 PR25A 132 1 Z
+bit 132 C 1 *
+bit 131 B 1 PR25B 130 1 Z
+bit 130 C 1 *
+bit 129 B 1 PR26A 128 1 Z
+bit 128 C 1 *
+bit 127 B 1 PR26B 126 1 Z
+bit 126 C 1 *
+bit 125 B 1 PR27A 124 1 Z
+bit 124 C 1 *
+bit 123 B 1 PR27B 122 1 Z
+bit 122 C 1 *
+bit 121 B 1 PR28A 120 1 Z
+bit 120 C 1 *
+bit 119 B 1 PR28B 118 1 Z
+bit 118 C 1 *
+bit 117 B 1 PR29A 116 1 Z
+bit 116 C 1 *
+bit 115 B 1 PR29B 114 1 Z
+bit 114 C 1 *
+bit 113 B 1 PR30A 112 1 Z
+bit 112 C 1 *
+bit 111 B 1 PR30B 110 1 Z
+bit 110 C 1 *
+bit 109 B 1 DONE 108 1 Z
+bit 108 C 1 *
+bit 107 B 1 INITN 106 1 Z
+bit 106 C 1 *
+bit 105 B 1 CCLK 104 1 Z
+bit 104 C 1 *
+bit 103 I 1 PROGRAMN
+bit 102 I 1 CFG0
+bit 101 I 1 CFG1
+bit 100 I 1 CFG2
+bit 99 B 1 PB55B 98 1 Z
+bit 98 C 1 *
+bit 97 B 1 PB55A 96 1 Z
+bit 96 C 1 *
+bit 95 B 1 PB54B 94 1 Z
+bit 94 C 1 *
+bit 93 B 1 PB54A 92 1 Z
+bit 92 C 1 *
+bit 91 B 1 PB53B 90 1 Z
+bit 90 C 1 *
+bit 89 B 1 PB53A 88 1 Z
+bit 88 C 1 *
+bit 87 B 1 PB52B 86 1 Z
+bit 86 C 1 *
+bit 85 B 1 PB52A 84 1 Z
+bit 84 C 1 *
+bit 83 B 1 PB51B 82 1 Z
+bit 82 C 1 *
+bit 81 B 1 PB51A 80 1 Z
+bit 80 C 1 *
+bit 79 B 1 PB50B 78 1 Z
+bit 78 C 1 *
+bit 77 B 1 PB50A 76 1 Z
+bit 76 C 1 *
+bit 75 B 1 PB49B 74 1 Z
+bit 74 C 1 *
+bit 73 B 1 PB49A 72 1 Z
+bit 72 C 1 *
+bit 71 B 1 PB48B 70 1 Z
+bit 70 C 1 *
+bit 69 B 1 PB48A 68 1 Z
+bit 68 C 1 *
+bit 67 B 1 PB47B 66 1 Z
+bit 66 C 1 *
+bit 65 B 1 PB47A 64 1 Z
+bit 64 C 1 *
+bit 63 B 1 PB46B 62 1 Z
+bit 62 C 1 *
+bit 61 B 1 PB46A 60 1 Z
+bit 60 C 1 *
+bit 59 B 1 PB45B 58 1 Z
+bit 58 C 1 *
+bit 57 B 1 PB45A 56 1 Z
+bit 56 C 1 *
+bit 55 B 1 PB44B 54 1 Z
+bit 54 C 1 *
+bit 53 B 1 PB44A 52 1 Z
+bit 52 C 1 *
+bit 51 B 1 PB43B 50 1 Z
+bit 50 C 1 *
+bit 49 B 1 PB43A 48 1 Z
+bit 48 C 1 *
+bit 47 B 1 PB42B 46 1 Z
+bit 46 C 1 *
+bit 45 B 1 PB42A 44 1 Z
+bit 44 C 1 *
+bit 43 B 1 PB41B 42 1 Z
+bit 42 C 1 *
+bit 41 B 1 PB41A 40 1 Z
+bit 40 C 1 *
+bit 39 B 1 PB40B 38 1 Z
+bit 38 C 1 *
+bit 37 B 1 PB40A 36 1 Z
+bit 36 C 1 *
+bit 35 B 1 PB39B 34 1 Z
+bit 34 C 1 *
+bit 33 B 1 PB39A 32 1 Z
+bit 32 C 1 *
+bit 31 O 1 *
+bit 30 O 1 *
+bit 29 O 1 *
+bit 28 O 1 *
+bit 27 B 1 PB37B 26 1 Z
+bit 26 C 1 *
+bit 25 B 1 PB37A 24 1 Z
+bit 24 C 1 *
+bit 23 B 1 PB36B 22 1 Z
+bit 22 C 1 *
+bit 21 B 1 PB36A 20 1 Z
+bit 20 C 1 *
+bit 19 B 1 PB35B 18 1 Z
+bit 18 C 1 *
+bit 17 B 1 PB35A 16 1 Z
+bit 16 C 1 *
+bit 15 B 1 PB34B 14 1 Z
+bit 14 C 1 *
+bit 13 B 1 PB34A 12 1 Z
+bit 12 C 1 *
+bit 11 B 1 PB33B 10 1 Z
+bit 10 C 1 *
+bit 9 B 1 PB33A 8 1 Z
+bit 8 C 1 *
+bit 7 B 1 PB32B 6 1 Z
+bit 6 C 1 *
+bit 5 B 1 PB32A 4 1 Z
+bit 4 C 1 *
+bit 3 B 1 PB31B 2 1 Z
+bit 2 C 1 *
+bit 1 B 1 PB31A 0 1 Z
+bit 0 C 1 *
--- /dev/null
+#
+# $Id$
+#
+# Copyright (C) 2002 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Marcel Telka <marcel@telka.sk>, 2002.
+#
+
+# bits 31-28 of the Device Identification Register
+
+0000 m4a3-256.192-fpbga256 0
--- /dev/null
+#
+# $Id$
+#
+# JTAG declarations for Lattice M4A3-256/192 (256-pin fpBGA)
+# Copyright (C) 2002 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Marcel Telka <marcel@telka.sk>, 2002.
+#
+
+
+signal CLK0 A6
+signal CLK1 T8
+signal CLK2 T11
+signal CLK3 E9
+signal TDI C2
+signal TMS P3
+signal TCK N3
+signal TDO D14
+signal NC B1 E5 C14 E15
+signal VCC E13 G13 K13 N13 D11 N11 G10 K10 D9 H9 J9 N9 H8 J8 G7 K7 D6 N6 D4 F4 H4 K4 M4
+signal GND D13 F13 H13 J13 L13 M13 D12 N12 D10 H10 J10 N10 G9 K9 D8 G8 K8 N8 D7 H7 J7 N7 D5 N5 E4 G4 J4 L4 N4
+signal IO_A0 B8
+signal IO_A2 A8
+signal IO_A4 E7
+signal IO_A6 A7
+signal IO_A8 F7
+signal IO_A10 B7
+signal IO_A12 C7
+signal IO_A14 B6
+signal IO_B0 E6
+signal IO_B1 A5
+signal IO_B2 B5
+signal IO_B3 F6
+signal IO_B4 C6
+signal IO_B5 A4
+signal IO_B6 C5
+signal IO_B7 A3
+signal IO_B8 B4
+signal IO_B9 D3
+signal IO_B10 A2
+signal IO_B11 B3
+signal IO_B12 A1
+signal IO_B13 B2
+signal IO_B14 C3
+signal IO_B15 C4
+signal IO_C0 H5
+signal IO_C1 G2
+signal IO_C2 G3
+signal IO_C3 H6
+signal IO_C4 G5
+signal IO_C5 F1
+signal IO_C6 F2
+signal IO_C7 E1
+signal IO_C8 F3
+signal IO_C9 G6
+signal IO_C10 F5
+signal IO_C11 E2
+signal IO_C12 E3
+signal IO_C13 D1
+signal IO_C14 D2
+signal IO_C15 C1
+signal IO_D0 K5
+signal IO_D2 K6
+signal IO_D4 H1
+signal IO_D6 H2
+signal IO_D8 H3
+signal IO_D10 J5
+signal IO_D12 J6
+signal IO_D14 G1
+signal IO_E0 J2
+signal IO_E2 J3
+signal IO_E4 J1
+signal IO_E6 L5
+signal IO_E8 L6
+signal IO_E10 M5
+signal IO_E12 K2
+signal IO_E14 K3
+signal IO_F0 K1
+signal IO_F1 L1
+signal IO_F2 M1
+signal IO_F3 L3
+signal IO_F4 L2
+signal IO_F5 N1
+signal IO_F6 P1
+signal IO_F7 M2
+signal IO_F8 N2
+signal IO_F9 P2
+signal IO_F10 R1
+signal IO_F11 R2
+signal IO_F12 M3
+signal IO_F13 T1
+signal IO_F14 T2
+signal IO_F15 R3
+signal IO_G0 R7
+signal IO_G1 T6
+signal IO_G2 M8
+signal IO_G3 L8
+signal IO_G4 R6
+signal IO_G5 L7
+signal IO_G6 T5
+signal IO_G7 P6
+signal IO_G8 M7
+signal IO_G9 R5
+signal IO_G10 T4
+signal IO_G11 M6
+signal IO_G12 P5
+signal IO_G13 R4
+signal IO_G14 T3
+signal IO_G15 P4
+signal IO_H0 T9
+signal IO_H2 P9
+signal IO_H4 M9
+signal IO_H6 L9
+signal IO_H8 R8
+signal IO_H10 P8
+signal IO_H12 P7
+signal IO_H14 T7
+signal IO_I0 R9
+signal IO_I2 T10
+signal IO_I4 L10
+signal IO_I6 R10
+signal IO_I8 M10
+signal IO_I10 P10
+signal IO_I12 R11
+signal IO_I14 T12
+signal IO_J0 R12
+signal IO_J1 M11
+signal IO_J2 P11
+signal IO_J3 M12
+signal IO_J4 P12
+signal IO_J5 T13
+signal IO_J6 T14
+signal IO_J7 R13
+signal IO_J8 R14
+signal IO_J9 T15
+signal IO_J10 T16
+signal IO_J11 R15
+signal IO_J12 R16
+signal IO_J13 P15
+signal IO_J14 P14
+signal IO_J15 P13
+signal IO_K0 K15
+signal IO_K1 K14
+signal IO_K2 K11
+signal IO_K3 K12
+signal IO_K4 L16
+signal IO_K5 L15
+signal IO_K6 L11
+signal IO_K7 L14
+signal IO_K8 M16
+signal IO_K9 M15
+signal IO_K10 L12
+signal IO_K11 M14
+signal IO_K12 N16
+signal IO_K13 N15
+signal IO_K14 P16
+signal IO_K15 N14
+signal IO_L0 H12
+signal IO_L2 H11
+signal IO_L4 J16
+signal IO_L6 J15
+signal IO_L8 J14
+signal IO_L10 J11
+signal IO_L12 J12
+signal IO_L14 K16
+signal IO_M0 H16
+signal IO_M2 H14
+signal IO_M4 H15
+signal IO_M6 G16
+signal IO_M8 G12
+signal IO_M10 G14
+signal IO_M12 G15
+signal IO_M14 G11
+signal IO_N0 F16
+signal IO_N1 F11
+signal IO_N2 F12
+signal IO_N3 F14
+signal IO_N4 E16
+signal IO_N5 F15
+signal IO_N6 D16
+signal IO_N7 D15
+signal IO_N8 E12
+signal IO_N9 E11
+signal IO_N10 E14
+signal IO_N11 C16
+signal IO_N12 C15
+signal IO_N13 B16
+signal IO_N14 B15
+signal IO_N15 A16
+signal IO_O0 B10
+signal IO_O1 F9
+signal IO_O2 C11
+signal IO_O3 C10
+signal IO_O4 A11
+signal IO_O5 B11
+signal IO_O6 A12
+signal IO_O7 B12
+signal IO_O8 F10
+signal IO_O9 A13
+signal IO_O10 C12
+signal IO_O11 B13
+signal IO_O12 A14
+signal IO_O13 A15
+signal IO_O14 B14
+signal IO_O15 C13
+signal IO_P0 C8
+signal IO_P2 F8
+signal IO_P4 A9
+signal IO_P6 B9
+signal IO_P8 E8
+signal IO_P10 C9
+signal IO_P12 E10
+signal IO_P14 A10
+
+
+# mandatory data registers
+register BSR 772 # Boundary Scan Register
+register BR 1 # Bypass Register
+
+# optional data registers
+register DIR 32 # Device Identification Register
+
+instruction length 6
+
+# mandatory instructions
+instruction EXTEST 000000 BSR
+instruction SAMPLE/PRELOAD 000010 BSR
+instruction BYPASS 111111 BR
+
+# optional instructions
+instruction IDCODE 000001 DIR
+instruction USERCODE 010000 DIR
+instruction HIGHZ 010001 BR
+
+
+# Boundary Scan Register bit definition
+
+
+# 1. The order of the I/O cell is INPUT - OUTPUT - OE
+# 2. The output is disabled when a 0 is shifted into the
+# OE cell.
+# 3. The pictoral representation of the Boundary scan
+# register is found in the JEDEC specification for M4A3-256/192 160.
+#
+# -------------------------------------- CLK0 ------------------------------------
+bit 771 I ? CLK0
+
+# ----------------------------- A0,A2,A4,A8,A10,A12,A14 --------------------------
+
+bit 770 I ? IO_A0 # A0
+bit 769 O ? IO_A0 768 0 Z
+bit 768 C 0 IO_A0
+
+bit 767 O 1 * # A1
+bit 766 O 1 *
+bit 765 O 1 *
+
+bit 764 I ? IO_A1 # A2
+bit 763 O ? IO_A1 762 0 Z
+bit 762 C 0 IO_A1
+
+bit 761 O 1 * # A3
+bit 760 O 1 *
+bit 759 O 1 *
+
+bit 758 I ? IO_A2 # A4
+bit 757 O ? IO_A2 756 0 Z
+bit 756 C 0 IO_A2
+
+bit 755 O 1 * # A5
+bit 754 O 1 *
+bit 753 O 1 *
+
+bit 752 I ? IO_A3 # A6
+bit 751 O ? IO_A3 750 0 Z
+bit 750 C 0 IO_A3
+
+bit 749 O 1 * # A7
+bit 748 O 1 *
+bit 747 O 1 *
+
+bit 746 I ? IO_A4 # A8
+bit 745 O ? IO_A4 744 0 Z
+bit 744 C 0 IO_A4
+
+bit 743 O 1 * # A9
+bit 742 O 1 *
+bit 741 O 1 *
+
+bit 740 I ? IO_A5 # A10
+bit 739 O ? IO_A5 738 0 Z
+bit 738 C 0 IO_A5
+
+bit 737 O 1 * # A11
+bit 736 O 1 *
+bit 735 O 1 *
+
+bit 734 I ? IO_A6 # A12
+bit 733 O ? IO_A6 732 0 Z
+bit 732 C 0 IO_A6
+
+bit 731 O 1 * # A13
+bit 730 O 1 *
+bit 729 O 1 *
+
+bit 728 I ? IO_A7 # A14
+bit 727 O ? IO_A7 726 0 Z
+bit 726 C 0 IO_A7
+
+bit 725 O 1 * # A15
+bit 724 O 1 *
+bit 723 O 1 *
+
+# ------------------------------------ B0 - B15 ----------------------------------
+
+bit 722 I ? IO_B0 # B0
+bit 721 O ? IO_B0 720 0 Z
+bit 720 C 0 IO_B0
+
+bit 719 I ? IO_B1 # B1
+bit 718 O ? IO_B1 717 0 Z
+bit 717 C 0 IO_B1
+
+bit 716 I ? IO_B2 # B2
+bit 715 O ? IO_B2 714 0 Z
+bit 714 C 0 IO_B2
+
+bit 713 I ? IO_B3 # B3
+bit 712 O ? IO_B3 711 0 Z
+bit 711 C 0 IO_B3
+
+bit 710 I ? IO_B4 # B4
+bit 709 O ? IO_B4 708 0 Z
+bit 708 C 0 IO_B4
+
+bit 707 I ? IO_B5 # B5
+bit 706 O ? IO_B5 705 0 Z
+bit 705 C 0 IO_B5
+
+bit 704 I ? IO_B6 # B6
+bit 703 O ? IO_B6 702 0 Z
+bit 702 C 0 IO_B6
+
+bit 701 I ? IO_B7 # B7
+bit 700 O ? IO_B7 699 0 Z
+bit 699 C 0 IO_B7
+
+bit 698 I ? IO_B8 # B8
+bit 697 O ? IO_B8 696 0 Z
+bit 696 C 0 IO_B8
+
+bit 695 I ? IO_B9 # B9
+bit 694 O ? IO_B9 693 0 Z
+bit 693 C 0 IO_B9
+
+bit 692 I ? IO_B10 # B10
+bit 691 O ? IO_B10 690 0 Z
+bit 690 C 0 IO_B10
+
+bit 689 I ? IO_B11 # B11
+bit 688 O ? IO_B11 687 0 Z
+bit 687 C 0 IO_B11
+
+bit 686 I ? IO_B12 # B12
+bit 685 O ? IO_B12 684 0 Z
+bit 684 C 0 IO_B12
+
+bit 683 I ? IO_B13 # B13
+bit 682 O ? IO_B13 681 0 Z
+bit 681 C 0 IO_B13
+
+bit 680 I ? IO_B14 # B14
+bit 679 O ? IO_B14 678 0 Z
+bit 678 C 0 IO_B14
+
+bit 677 I ? IO_B15 # B15
+bit 676 O ? IO_B15 675 0 Z
+bit 675 C 0 IO_B15
+
+# ----------------------------- D0D2D4D8D10D12D14 --------------------------
+
+bit 674 I ? IO_D0 # D0
+bit 673 O ? IO_D0 672 0 Z
+bit 672 C 0 IO_D0
+
+bit 671 O 1 * # D1
+bit 670 O 1 *
+bit 669 O 1 *
+
+bit 668 I ? IO_D1 # D2
+bit 667 O ? IO_D1 666 0 Z
+bit 666 C 0 IO_D1
+
+bit 665 O 1 * # D3
+bit 664 O 1 *
+bit 663 O 1 *
+
+bit 662 I ? IO_D2 # D4
+bit 661 O ? IO_D2 660 0 Z
+bit 660 C 0 IO_D2
+
+bit 659 O 1 * # D5
+bit 658 O 1 *
+bit 657 O 1 *
+
+bit 656 I ? IO_D3 # D6
+bit 655 O ? IO_D3 654 0 Z
+bit 654 C 0 IO_D3
+
+bit 653 O 1 * # D7
+bit 652 O 1 *
+bit 651 O 1 *
+
+bit 650 I ? IO_D4 # D8
+bit 649 O ? IO_D4 648 0 Z
+bit 648 C 0 IO_D4
+
+bit 647 O 1 * # D9
+bit 646 O 1 *
+bit 645 O 1 *
+
+bit 644 I ? IO_D5 # D10
+bit 643 O ? IO_D5 642 0 Z
+bit 642 C 0 IO_D5
+
+bit 641 O 1 * # D11
+bit 640 O 1 *
+bit 639 O 1 *
+
+bit 638 I ? IO_D6 # D12
+bit 637 O ? IO_D6 636 0 Z
+bit 636 C 0 IO_D6
+
+bit 635 O 1 * # D13
+bit 634 O 1 *
+bit 633 O 1 *
+
+bit 632 I ? IO_D7 # D14
+bit 631 O ? IO_D7 630 0 Z
+bit 630 C 0 IO_D7
+
+bit 629 O 1 * # D15
+bit 628 O 1 *
+bit 627 O 1 *
+
+# ------------------------------------ C0 - C15 ----------------------------------
+
+bit 626 I ? IO_C0 # C0
+bit 625 O ? IO_C0 624 0 Z
+bit 624 C 0 IO_C0
+
+bit 623 I ? IO_C1 # C1
+bit 622 O ? IO_C1 621 0 Z
+bit 621 C 0 IO_C1
+
+bit 620 I ? IO_C2 # C2
+bit 619 O ? IO_C2 618 0 Z
+bit 618 C 0 IO_C2
+
+bit 617 I ? IO_C3 # C3
+bit 616 O ? IO_C3 615 0 Z
+bit 615 C 0 IO_C3
+
+bit 614 I ? IO_C4 # C4
+bit 613 O ? IO_C4 612 0 Z
+bit 612 C 0 IO_C4
+
+bit 611 I ? IO_C5 # C5
+bit 610 O ? IO_C5 609 0 Z
+bit 609 C 0 IO_C5
+
+bit 608 I ? IO_C6 # C6
+bit 607 O ? IO_C6 606 0 Z
+bit 606 C 0 IO_C6
+
+bit 605 I ? IO_C7 # C7
+bit 604 O ? IO_C7 603 0 Z
+bit 603 C 0 IO_C7
+
+bit 602 I ? IO_C8 # C8
+bit 601 O ? IO_C8 600 0 Z
+bit 600 C 0 IO_C8
+
+bit 599 I ? IO_C9 # C9
+bit 598 O ? IO_C9 597 0 Z
+bit 597 C 0 IO_C9
+
+bit 596 I ? IO_C10 # C10
+bit 595 O ? IO_C10 594 0 Z
+bit 594 C 0 IO_C10
+
+bit 593 I ? IO_C11 # C11
+bit 592 O ? IO_C11 591 0 Z
+bit 591 C 0 IO_C11
+
+bit 590 I ? IO_C12 # C12
+bit 589 O ? IO_C12 588 0 Z
+bit 588 C 0 IO_C12
+
+bit 587 I ? IO_C13 # C13
+bit 586 O ? IO_C13 585 0 Z
+bit 585 C 0 IO_C13
+
+bit 584 I ? IO_C14 # C14
+bit 583 O ? IO_C14 582 0 Z
+bit 582 C 0 IO_C14
+
+bit 581 I ? IO_C15 # C15
+bit 580 O ? IO_C15 579 0 Z
+bit 579 C 0 IO_C15
+
+# ----------------------------- E0E2E4E8E10E12E14 --------------------------
+
+bit 578 I ? IO_E0 # E0
+bit 577 O ? IO_E0 576 0 Z
+bit 576 C 0 IO_E0
+
+bit 575 O 1 * # E1
+bit 574 O 1 *
+bit 573 O 1 *
+
+bit 572 I ? IO_E1 # E2
+bit 571 O ? IO_E1 570 0 Z
+bit 570 C 0 IO_E1
+
+bit 569 O 1 * # E3
+bit 568 O 1 *
+bit 567 O 1 *
+
+bit 566 I ? IO_E2 # E4
+bit 565 O ? IO_E2 564 0 Z
+bit 564 C 0 IO_E2
+
+bit 563 O 1 * # E5
+bit 562 O 1 *
+bit 561 O 1 *
+
+bit 560 I ? IO_E3 # E6
+bit 559 O ? IO_E3 558 0 Z
+bit 558 C 0 IO_E3
+
+bit 557 O 1 * # E7
+bit 556 O 1 *
+bit 555 O 1 *
+
+bit 554 I ? IO_E4 # E8
+bit 553 O ? IO_E4 552 0 Z
+bit 552 C 0 IO_E4
+
+bit 551 O 1 * # E9
+bit 550 O 1 *
+bit 549 O 1 *
+
+bit 548 I ? IO_E5 # E10
+bit 547 O ? IO_E5 546 0 Z
+bit 546 C 0 IO_E5
+
+bit 545 O 1 * # E11
+bit 544 O 1 *
+bit 543 O 1 *
+
+bit 542 I ? IO_E6 # E12
+bit 541 O ? IO_E6 540 0 Z
+bit 540 C 0 IO_E6
+
+bit 539 O 1 * # E13
+bit 538 O 1 *
+bit 537 O 1 *
+
+bit 536 I ? IO_E7 # E14
+bit 535 O ? IO_E7 534 0 Z
+bit 534 C 0 IO_E7
+
+bit 533 O 1 * # E15
+bit 532 O 1 *
+bit 531 O 1 *
+
+# ------------------------------------ F0 - F15 ----------------------------------
+
+bit 530 I ? IO_F0 # F0
+bit 529 O ? IO_F0 528 0 Z
+bit 528 C 0 IO_F0
+
+bit 527 I ? IO_F1 # F1
+bit 526 O ? IO_F1 525 0 Z
+bit 525 C 0 IO_F1
+
+bit 524 I ? IO_F2 # F2
+bit 523 O ? IO_F2 522 0 Z
+bit 522 C 0 IO_F2
+
+bit 521 I ? IO_F3 # F3
+bit 520 O ? IO_F3 519 0 Z
+bit 519 C 0 IO_F3
+
+bit 518 I ? IO_F4 # F4
+bit 517 O ? IO_F4 516 0 Z
+bit 516 C 0 IO_F4
+
+bit 515 I ? IO_F5 # F5
+bit 514 O ? IO_F5 513 0 Z
+bit 513 C 0 IO_F5
+
+bit 512 I ? IO_F6 # F6
+bit 511 O ? IO_F6 510 0 Z
+bit 510 C 0 IO_F6
+
+bit 509 I ? IO_F7 # F7
+bit 508 O ? IO_F7 507 0 Z
+bit 507 C 0 IO_F7
+
+bit 506 I ? IO_F8 # F8
+bit 505 O ? IO_F8 504 0 Z
+bit 504 C 0 IO_F8
+
+bit 503 I ? IO_F9 # F9
+bit 502 O ? IO_F9 501 0 Z
+bit 501 C 0 IO_F9
+
+bit 500 I ? IO_F10 # F10
+bit 499 O ? IO_F10 498 0 Z
+bit 498 C 0 IO_F10
+
+bit 497 I ? IO_F11 # F11
+bit 496 O ? IO_F11 495 0 Z
+bit 495 C 0 IO_F11
+
+bit 494 I ? IO_F12 # F12
+bit 493 O ? IO_F12 492 0 Z
+bit 492 C 0 IO_F12
+
+bit 491 I ? IO_F13 # F13
+bit 490 O ? IO_F13 489 0 Z
+bit 489 C 0 IO_F13
+
+bit 488 I ? IO_F14 # F14
+bit 487 O ? IO_F14 486 0 Z
+bit 486 C 0 IO_F14
+
+bit 485 I ? IO_F15 # F15
+bit 484 O ? IO_F15 483 0 Z
+bit 483 C 0 IO_F15
+
+# ----------------------------- H0H2H4H8H10H12H14 --------------------------
+
+bit 482 I ? IO_H0 # H0
+bit 481 O ? IO_H0 480 0 Z
+bit 480 C 0 IO_H0
+
+bit 479 O 1 * # H1
+bit 478 O 1 *
+bit 477 O 1 *
+
+bit 476 I ? IO_H1 # H2
+bit 475 O ? IO_H1 474 0 Z
+bit 474 C 0 IO_H1
+
+bit 473 O 1 * # H3
+bit 472 O 1 *
+bit 471 O 1 *
+
+bit 470 I ? IO_H2 # H4
+bit 469 O ? IO_H2 468 0 Z
+bit 468 C 0 IO_H2
+
+bit 467 O 1 * # H5
+bit 466 O 1 *
+bit 465 O 1 *
+
+bit 464 I ? IO_H3 # H6
+bit 463 O ? IO_H3 462 0 Z
+bit 462 C 0 IO_H3
+
+bit 461 O 1 * # H7
+bit 460 O 1 *
+bit 459 O 1 *
+
+bit 458 I ? IO_H4 # H8
+bit 457 O ? IO_H4 456 0 Z
+bit 456 C 0 IO_H4
+
+bit 455 O 1 * # H9
+bit 454 O 1 *
+bit 453 O 1 *
+
+bit 452 I ? IO_H5 # H10
+bit 451 O ? IO_H5 450 0 Z
+bit 450 C 0 IO_H5
+
+bit 449 O 1 * # H11
+bit 448 O 1 *
+bit 447 O 1 *
+
+bit 446 I ? IO_H6 # H12
+bit 445 O ? IO_H6 444 0 Z
+bit 444 C 0 IO_H6
+
+bit 443 O 1 * # H13
+bit 442 O 1 *
+bit 441 O 1 *
+
+bit 440 I ? IO_H7 # H14
+bit 439 O ? IO_H7 438 0 Z
+bit 438 C 0 IO_H7
+
+bit 437 O 1 * # H15
+bit 436 O 1 *
+bit 435 O 1 *
+
+# ------------------------------------ G0 - G15 ----------------------------------
+
+bit 434 I ? IO_G0 # G0
+bit 433 O ? IO_G0 432 0 Z
+bit 432 C 0 IO_G0
+
+bit 431 I ? IO_G1 # G1
+bit 430 O ? IO_G1 429 0 Z
+bit 429 C 0 IO_G1
+
+bit 428 I ? IO_G2 # G2
+bit 427 O ? IO_G2 426 0 Z
+bit 426 C 0 IO_G2
+
+bit 425 I ? IO_G3 # G3
+bit 424 O ? IO_G3 423 0 Z
+bit 423 C 0 IO_G3
+
+bit 422 I ? IO_G4 # G4
+bit 421 O ? IO_G4 420 0 Z
+bit 420 C 0 IO_G4
+
+bit 419 I ? IO_G5 # G5
+bit 418 O ? IO_G5 417 0 Z
+bit 417 C 0 IO_G5
+
+bit 416 I ? IO_G6 # G6
+bit 415 O ? IO_G6 414 0 Z
+bit 414 C 0 IO_G6
+
+bit 413 I ? IO_G7 # G7
+bit 412 O ? IO_G7 411 0 Z
+bit 411 C 0 IO_G7
+
+bit 410 I ? IO_G8 # G8
+bit 409 O ? IO_G8 408 0 Z
+bit 408 C 0 IO_G8
+
+bit 407 I ? IO_G9 # G9
+bit 406 O ? IO_G9 405 0 Z
+bit 405 C 0 IO_G9
+
+bit 404 I ? IO_G10 # G10
+bit 403 O ? IO_G10 402 0 Z
+bit 402 C 0 IO_G10
+
+bit 401 I ? IO_G11 # G11
+bit 400 O ? IO_G11 399 0 Z
+bit 399 C 0 IO_G11
+
+bit 398 I ? IO_G12 # G12
+bit 397 O ? IO_G12 396 0 Z
+bit 396 C 0 IO_G12
+
+bit 395 I ? IO_G13 # G13
+bit 394 O ? IO_G13 393 0 Z
+bit 393 C 0 IO_G13
+
+bit 392 I ? IO_G14 # G14
+bit 391 O ? IO_G14 390 0 Z
+bit 390 C 0 IO_G14
+
+bit 389 I ? IO_G15 # G15
+bit 388 O ? IO_G15 387 0 Z
+bit 387 C 0 IO_G15
+
+# ---------------------------------- CLK1 - CLK2 --------------------------------
+
+bit 386 I ? CLK1
+bit 385 I ? CLK2
+
+# ----------------------------- I0I2I4I8I10I12I14 --------------------------
+
+bit 384 I ? IO_I0 # I0
+bit 383 O ? IO_I0 382 0 Z
+bit 382 C 0 IO_I0
+
+bit 381 O 1 * # I1
+bit 380 O 1 *
+bit 379 O 1 *
+
+bit 378 I ? IO_I1 # I2
+bit 377 O ? IO_I1 376 0 Z
+bit 376 C 0 IO_I1
+
+bit 375 O 1 * # I3
+bit 374 O 1 *
+bit 373 O 1 *
+
+bit 372 I ? IO_I2 # I4
+bit 371 O ? IO_I2 370 0 Z
+bit 370 C 0 IO_I2
+
+bit 369 O 1 * # I5
+bit 368 O 1 *
+bit 367 O 1 *
+
+bit 366 I ? IO_I3 # I6
+bit 365 O ? IO_I3 364 0 Z
+bit 364 C 0 IO_I3
+
+bit 363 O 1 * # I7
+bit 362 O 1 *
+bit 361 O 1 *
+
+bit 360 I ? IO_I4 # I8
+bit 359 O ? IO_I4 358 0 Z
+bit 358 C 0 IO_I4
+
+bit 357 O 1 * # I9
+bit 356 O 1 *
+bit 355 O 1 *
+
+bit 354 I ? IO_I5 # I10
+bit 353 O ? IO_I5 352 0 Z
+bit 352 C 0 IO_I5
+
+bit 351 O 1 * # I11
+bit 350 O 1 *
+bit 349 O 1 *
+
+bit 348 I ? IO_I6 # I12
+bit 347 O ? IO_I6 346 0 Z
+bit 346 C 0 IO_I6
+
+bit 345 O 1 * # I13
+bit 344 O 1 *
+bit 343 O 1 *
+
+bit 342 I ? IO_I7 # I14
+bit 341 O ? IO_I7 340 0 Z
+bit 340 C 0 IO_I7
+
+bit 339 O 1 * # I15
+bit 338 O 1 *
+bit 337 O 1 *
+
+# ---------------------------------- J0 - J15 --------------------------------
+
+bit 336 I ? IO_J0 # J0
+bit 335 O ? IO_J0 334 0 Z
+bit 334 C 0 IO_J0
+
+bit 333 I ? IO_J1 # J1
+bit 332 O ? IO_J1 331 0 Z
+bit 331 C 0 IO_J1
+
+bit 330 I ? IO_J2 # J2
+bit 329 O ? IO_J2 328 0 Z
+bit 328 C 0 IO_J2
+
+bit 327 I ? IO_J3 # J3
+bit 326 O ? IO_J3 325 0 Z
+bit 325 C 0 IO_J3
+
+bit 324 I ? IO_J4 # J4
+bit 323 O ? IO_J4 322 0 Z
+bit 322 C 0 IO_J4
+
+bit 321 I ? IO_J5 # J5
+bit 320 O ? IO_J5 319 0 Z
+bit 319 C 0 IO_J5
+
+bit 318 I ? IO_J6 # J6
+bit 317 O ? IO_J6 316 0 Z
+bit 316 C 0 IO_J6
+
+bit 315 I ? IO_J7 # J7
+bit 314 O ? IO_J7 313 0 Z
+bit 313 C 0 IO_J7
+
+bit 312 I ? IO_J8 # J8
+bit 311 O ? IO_J8 310 0 Z
+bit 310 C 0 IO_J8
+
+bit 309 I ? IO_J9 # J9
+bit 308 O ? IO_J9 307 0 Z
+bit 307 C 0 IO_J9
+
+bit 306 I ? IO_J10 # J10
+bit 305 O ? IO_J10 304 0 Z
+bit 304 C 0 IO_J10
+
+bit 303 I ? IO_J11 # J11
+bit 302 O ? IO_J11 301 0 Z
+bit 301 C 0 IO_J11
+
+bit 300 I ? IO_J12 # J12
+bit 299 O ? IO_J12 298 0 Z
+bit 298 C 0 IO_J12
+
+bit 297 I ? IO_J13 # J13
+bit 296 O ? IO_J13 295 0 Z
+bit 295 C 0 IO_J13
+
+bit 294 I ? IO_J14 # J14
+bit 293 O ? IO_J14 292 0 Z
+bit 292 C 0 IO_J14
+
+bit 291 I ? IO_J15 # J15
+bit 290 O ? IO_J15 289 0 Z
+bit 289 C 0 IO_J15
+
+# ----------------------------- L0L2L4L8L10L12L14 --------------------------
+
+bit 288 I ? IO_L0 # L0
+bit 287 O ? IO_L0 286 0 Z
+bit 286 C 0 IO_L0
+
+bit 285 O 1 * # L1
+bit 284 O 1 *
+bit 283 O 1 *
+
+bit 282 I ? IO_L1 # L2
+bit 281 O ? IO_L1 280 0 Z
+bit 280 C 0 IO_L1
+
+bit 279 O 1 * # L3
+bit 278 O 1 *
+bit 277 O 1 *
+
+bit 276 I ? IO_L2 # L4
+bit 275 O ? IO_L2 274 0 Z
+bit 274 C 0 IO_L2
+
+bit 273 O 1 * # L5
+bit 272 O 1 *
+bit 271 O 1 *
+
+bit 270 I ? IO_L3 # L6
+bit 269 O ? IO_L3 268 0 Z
+bit 268 C 0 IO_L3
+
+bit 267 O 1 * # L7
+bit 266 O 1 *
+bit 265 O 1 *
+
+bit 264 I ? IO_L4 # L8
+bit 263 O ? IO_L4 262 0 Z
+bit 262 C 0 IO_L4
+
+bit 261 O 1 * # L9
+bit 260 O 1 *
+bit 259 O 1 *
+
+bit 258 I ? IO_L5 # L10
+bit 257 O ? IO_L5 256 0 Z
+bit 256 C 0 IO_L5
+
+bit 255 O 1 * # L11
+bit 254 O 1 *
+bit 253 O 1 *
+
+bit 252 I ? IO_L6 # L12
+bit 251 O ? IO_L6 250 0 Z
+bit 250 C 0 IO_L6
+
+bit 249 O 1 * # L13
+bit 248 O 1 *
+bit 247 O 1 *
+
+bit 246 I ? IO_L7 # L14
+bit 245 O ? IO_L7 244 0 Z
+bit 244 C 0 IO_L7
+
+bit 243 O 1 * # L15
+bit 242 O 1 *
+bit 241 O 1 *
+
+# ----------------------------------- K0 - K15 ---------------------------------
+
+bit 240 I ? IO_K0 # K0
+bit 239 O ? IO_K0 238 0 Z
+bit 238 C 0 IO_K0
+
+bit 237 I ? IO_K1 # K1
+bit 236 O ? IO_K1 235 0 Z
+bit 235 C 0 IO_K1
+
+bit 234 I ? IO_K2 # K2
+bit 233 O ? IO_K2 232 0 Z
+bit 232 C 0 IO_K2
+
+bit 231 I ? IO_K3 # K3
+bit 230 O ? IO_K3 229 0 Z
+bit 229 C 0 IO_K3
+
+bit 228 I ? IO_K4 # K4
+bit 227 O ? IO_K4 226 0 Z
+bit 226 C 0 IO_K4
+
+bit 225 I ? IO_K5 # K5
+bit 224 O ? IO_K5 223 0 Z
+bit 223 C 0 IO_K5
+
+bit 222 I ? IO_K6 # K6
+bit 221 O ? IO_K6 220 0 Z
+bit 220 C 0 IO_K6
+
+bit 219 I ? IO_K7 # K7
+bit 218 O ? IO_K7 217 0 Z
+bit 217 C 0 IO_K7
+
+bit 216 I ? IO_K8 # K8
+bit 215 O ? IO_K8 214 0 Z
+bit 214 C 0 IO_K8
+
+bit 213 I ? IO_K9 # K9
+bit 212 O ? IO_K9 211 0 Z
+bit 211 C 0 IO_K9
+
+bit 210 I ? IO_K10 # K10
+bit 209 O ? IO_K10 208 0 Z
+bit 208 C 0 IO_K10
+
+bit 207 I ? IO_K11 # K11
+bit 206 O ? IO_K11 205 0 Z
+bit 205 C 0 IO_K11
+
+bit 204 I ? IO_K12 # K12
+bit 203 O ? IO_K12 202 0 Z
+bit 202 C 0 IO_K12
+
+bit 201 I ? IO_K13 # K13
+bit 200 O ? IO_K13 199 0 Z
+bit 199 C 0 IO_K13
+
+bit 198 I ? IO_K14 # K14
+bit 197 O ? IO_K14 196 0 Z
+bit 196 C 0 IO_K14
+
+bit 195 I ? IO_K15 # K15
+bit 194 O ? IO_K15 193 0 Z
+bit 193 C 0 IO_K15
+
+# ----------------------------- M0M2M4M8M10M12M14 --------------------------
+
+bit 192 I ? IO_M0 # M0
+bit 191 O ? IO_M0 190 0 Z
+bit 190 C 0 IO_M0
+
+bit 189 O 1 * # M1
+bit 188 O 1 *
+bit 187 O 1 *
+
+bit 186 I ? IO_M1 # M2
+bit 185 O ? IO_M1 184 0 Z
+bit 184 C 0 IO_M1
+
+bit 183 O 1 * # M3
+bit 182 O 1 *
+bit 181 O 1 *
+
+bit 180 I ? IO_M2 # M4
+bit 179 O ? IO_M2 178 0 Z
+bit 178 C 0 IO_M2
+
+bit 177 O 1 * # M5
+bit 176 O 1 *
+bit 175 O 1 *
+
+bit 174 I ? IO_M3 # M6
+bit 173 O ? IO_M3 172 0 Z
+bit 172 C 0 IO_M3
+
+bit 171 O 1 * # M7
+bit 170 O 1 *
+bit 169 O 1 *
+
+bit 168 I ? IO_M4 # M8
+bit 167 O ? IO_M4 166 0 Z
+bit 166 C 0 IO_M4
+
+bit 165 O 1 * # M9
+bit 164 O 1 *
+bit 163 O 1 *
+
+bit 162 I ? IO_M5 # M10
+bit 161 O ? IO_M5 160 0 Z
+bit 160 C 0 IO_M5
+
+bit 159 O 1 * # M11
+bit 158 O 1 *
+bit 157 O 1 *
+
+bit 156 I ? IO_M6 # M12
+bit 155 O ? IO_M6 154 0 Z
+bit 154 C 0 IO_M6
+
+bit 153 O 1 * # M13
+bit 152 O 1 *
+bit 151 O 1 *
+
+bit 150 I ? IO_M7 # M14
+bit 149 O ? IO_M7 148 0 Z
+bit 148 C 0 IO_M7
+
+bit 147 O 1 * # M15
+bit 146 O 1 *
+bit 145 O 1 *
+
+# ------------------------------------ N0 - N15 ----------------------------------
+
+bit 144 I ? IO_N0 # N0
+bit 143 O ? IO_N0 142 0 Z
+bit 142 C 0 IO_N0
+
+bit 141 I ? IO_N1 # N1
+bit 140 O ? IO_N1 139 0 Z
+bit 139 C 0 IO_N1
+
+bit 138 I ? IO_N2 # N2
+bit 137 O ? IO_N2 136 0 Z
+bit 136 C 0 IO_N2
+
+bit 135 I ? IO_N3 # N3
+bit 134 O ? IO_N3 133 0 Z
+bit 133 C 0 IO_N3
+
+bit 132 I ? IO_N4 # N4
+bit 131 O ? IO_N4 130 0 Z
+bit 130 C 0 IO_N4
+
+bit 129 I ? IO_N5 # N5
+bit 128 O ? IO_N5 127 0 Z
+bit 127 C 0 IO_N5
+
+bit 126 I ? IO_N6 # N6
+bit 125 O ? IO_N6 124 0 Z
+bit 124 C 0 IO_N6
+
+bit 123 I ? IO_N7 # N7
+bit 122 O ? IO_N7 121 0 Z
+bit 121 C 0 IO_N7
+
+bit 120 I ? IO_N8 # N8
+bit 119 O ? IO_N8 118 0 Z
+bit 118 C 0 IO_N8
+
+bit 117 I ? IO_N9 # N9
+bit 116 O ? IO_N9 115 0 Z
+bit 115 C 0 IO_N9
+
+bit 114 I ? IO_N10 # N10
+bit 113 O ? IO_N10 112 0 Z
+bit 112 C 0 IO_N10
+
+bit 111 I ? IO_N11 # N11
+bit 110 O ? IO_N11 109 0 Z
+bit 109 C 0 IO_N11
+
+bit 108 I ? IO_N12 # N12
+bit 107 O ? IO_N12 106 0 Z
+bit 106 C 0 IO_N12
+
+bit 105 I ? IO_N13 # N13
+bit 104 O ? IO_N13 103 0 Z
+bit 103 C 0 IO_N13
+
+bit 102 I ? IO_N14 # N14
+bit 101 O ? IO_N14 100 0 Z
+bit 100 C 0 IO_N14
+
+bit 99 I ? IO_N15 # N15
+bit 98 O ? IO_N15 97 0 Z
+bit 97 C 0 IO_N15
+
+# ----------------------------- P0P2P4P8P10P12P14 --------------------------
+
+bit 96 I ? IO_P0 # P0
+bit 95 O ? IO_P0 94 0 Z
+bit 94 C 0 IO_P0
+
+bit 93 O 1 * # P1
+bit 92 O 1 *
+bit 91 O 1 *
+
+bit 90 I ? IO_P1 # P2
+bit 89 O ? IO_P1 88 0 Z
+bit 88 C 0 IO_P1
+
+bit 87 O 1 * # P3
+bit 86 O 1 *
+bit 85 O 1 *
+
+bit 84 I ? IO_P2 # P4
+bit 83 O ? IO_P2 82 0 Z
+bit 82 C 0 IO_P2
+
+bit 81 O 1 * # P5
+bit 80 O 1 *
+bit 79 O 1 *
+
+bit 78 I ? IO_P3 # P6
+bit 77 O ? IO_P3 76 0 Z
+bit 76 C 0 IO_P3
+
+bit 75 O 1 * # P7
+bit 74 O 1 *
+bit 73 O 1 *
+
+bit 72 I ? IO_P4 # P8
+bit 71 O ? IO_P4 70 0 Z
+bit 70 C 0 IO_P4
+
+bit 69 O 1 * # P9
+bit 68 O 1 *
+bit 67 O 1 *
+
+bit 66 I ? IO_P5 # P10
+bit 65 O ? IO_P5 64 0 Z
+bit 64 C 0 IO_P5
+
+bit 63 O 1 * # P11
+bit 62 O 1 *
+bit 61 O 1 *
+
+bit 60 I ? IO_P6 # P12
+bit 59 O ? IO_P6 58 0 Z
+bit 58 C 0 IO_P6
+
+bit 57 O 1 * # P13
+bit 56 O 1 *
+bit 55 O 1 *
+
+bit 54 I ? IO_P7 # P14
+bit 53 O ? IO_P7 52 0 Z
+bit 52 C 0 IO_P7
+
+bit 51 O 1 * # P15
+bit 50 O 1 *
+bit 49 O 1 *
+
+# ------------------------------------ O0 - O15 ----------------------------------
+
+bit 48 I ? IO_O0 # O0
+bit 47 O ? IO_O0 46 0 Z
+bit 46 C 0 IO_O0
+
+bit 45 I ? IO_O1 # O1
+bit 44 O ? IO_O1 43 0 Z
+bit 43 C 0 IO_O1
+
+bit 42 I ? IO_O2 # O2
+bit 41 O ? IO_O2 40 0 Z
+bit 40 C 0 IO_O2
+
+bit 39 I ? IO_O3 # O3
+bit 38 O ? IO_O3 37 0 Z
+bit 37 C 0 IO_O3
+
+bit 36 I ? IO_O4 # O4
+bit 35 O ? IO_O4 34 0 Z
+bit 34 C 0 IO_O4
+
+bit 33 I ? IO_O5 # O5
+bit 32 O ? IO_O5 31 0 Z
+bit 31 C 0 IO_O5
+
+bit 30 I ? IO_O6 # O6
+bit 29 O ? IO_O6 28 0 Z
+bit 28 C 0 IO_O6
+
+bit 27 I ? IO_O7 # O7
+bit 26 O ? IO_O7 25 0 Z
+bit 25 C 0 IO_O7
+
+bit 24 I ? IO_O8 # O8
+bit 23 O ? IO_O8 22 0 Z
+bit 22 C 0 IO_O8
+
+bit 21 I ? IO_O9 # O9
+bit 20 O ? IO_O9 19 0 Z
+bit 19 C 0 IO_O9
+
+bit 18 I ? IO_O10 # O10
+bit 17 O ? IO_O10 16 0 Z
+bit 16 C 0 IO_O10
+
+bit 15 I ? IO_O11 # O11
+bit 14 O ? IO_O11 13 0 Z
+bit 13 C 0 IO_O11
+
+bit 12 I ? IO_O12 # O12
+bit 11 O ? IO_O12 10 0 Z
+bit 10 C 0 IO_O12
+
+bit 9 I ? IO_O13 # O13
+bit 8 O ? IO_O13 7 0 Z
+bit 7 C 0 IO_O13
+
+bit 6 I ? IO_O14 # O14
+bit 5 O ? IO_O14 4 0 Z
+bit 4 C 0 IO_O14
+
+bit 3 I ? IO_O15 # O15
+bit 2 O ? IO_O15 1 0 Z
+bit 1 C 0 IO_O15
+
+# -------------------------------------- CLK3 ------------------------------------
+
+bit 0 I ? CLK3
--- /dev/null
+#
+# $Id$
+#
+# Copyright (C) 2002 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Marcel Telka <marcel@telka.sk>, 2002.
+#
+
+# bits 31-28 of the Device Identification Register
+
+0001 m4a3-64.32-tqfp48 1
--- /dev/null
+#
+# $Id$
+#
+# JTAG declarations for Lattice M4A3-64/32 (48-pin TQFP)
+# Copyright (C) 2002 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Marcel Telka <marcel@telka.sk>, 2002.
+#
+
+signal IOA0 44
+signal IOA1 45
+signal IOA2 46
+signal IOA3 47
+signal IOA4 48
+signal IOA5 1
+signal IOA6 2
+signal IOA7 3
+signal IOB0 9
+signal IOB1 10
+signal IOB2 11
+signal IOB3 12
+signal IOB4 13
+signal IOB5 14
+signal IOB6 15
+signal IOB7 16
+signal IOC0 20
+signal IOC1 21
+signal IOC2 22
+signal IOC3 23
+signal IOC4 24
+signal IOC5 25
+signal IOC6 26
+signal IOC7 27
+signal IOD0 33
+signal IOD1 34
+signal IOD2 35
+signal IOD3 36
+signal IOD4 37
+signal IOD5 38
+signal IOD6 39
+signal IOD7 40
+signal CLK0 5
+signal CLK1 29
+signal TDI 4
+signal TCK 8
+signal TMS 28
+signal TDO 32
+signal GND 7 19 31 43
+signal NC 6 18 30 42
+signal VCC 17 41
+
+# mandatory data registers
+register BSR 98 # Boundary Scan Register
+register BR 1 # Bypass Register
+
+# optional data registers
+register DIR 32 # Device Identification Register
+
+instruction length 6
+
+# mandatory instructions
+instruction EXTEST 000000 BSR
+instruction SAMPLE/PRELOAD 000100 BSR
+instruction BYPASS 111111 BR
+
+# optional instructions
+instruction IDCODE 000001 DIR
+instruction USERCODE 010000 DIR
+instruction HIGHZ 010001 BR
+instruction CLAMP 100000 BR
+
+
+# Boundary Scan Register bit definition
+
+bit 97 I ? IOA0
+bit 96 O ? IOA0 95 0 Z
+bit 95 C 0 IOA0
+bit 94 I ? IOA1
+bit 93 O ? IOA1 92 0 Z
+bit 92 C 0 IOA1
+bit 91 I ? IOA2
+bit 90 O ? IOA2 89 0 Z
+bit 89 C 0 IOA2
+bit 88 I ? IOA3
+bit 87 O ? IOA3 86 0 Z
+bit 86 C 0 IOA3
+bit 85 I ? IOA4
+bit 84 O ? IOA4 83 0 Z
+bit 83 C 0 IOA4
+bit 82 I ? IOA5
+bit 81 O ? IOA5 80 0 Z
+bit 80 C 0 IOA5
+bit 79 I ? IOA6
+bit 78 O ? IOA6 77 0 Z
+bit 77 C 0 IOA6
+bit 76 I ? IOA7
+bit 75 O ? IOA7 74 0 Z
+bit 74 C 0 IOA7
+bit 73 I ? CLK0
+bit 72 I ? IOB0
+bit 71 O ? IOB0 70 0 Z
+bit 70 C 0 IOB0
+bit 69 I ? IOB1
+bit 68 O ? IOB1 67 0 Z
+bit 67 C 0 IOB1
+bit 66 I ? IOB2
+bit 65 O ? IOB2 64 0 Z
+bit 64 C 0 IOB2
+bit 63 I ? IOB3
+bit 62 O ? IOB3 61 0 Z
+bit 61 C 0 IOB3
+bit 60 I ? IOB4
+bit 59 O ? IOB4 58 0 Z
+bit 58 C 0 IOB4
+bit 57 I ? IOB5
+bit 56 O ? IOB5 55 0 Z
+bit 55 C 0 IOB5
+bit 54 I ? IOB6
+bit 53 O ? IOB6 52 0 Z
+bit 52 C 0 IOB6
+bit 51 I ? IOB7
+bit 50 O ? IOB7 49 0 Z
+bit 49 C 0 IOB7
+bit 48 I ? IOC0
+bit 47 O ? IOC0 46 0 Z
+bit 46 C 0 IOC0
+bit 45 I ? IOC1
+bit 44 O ? IOC1 43 0 Z
+bit 43 C 0 IOC1
+bit 42 I ? IOC2
+bit 41 O ? IOC2 40 0 Z
+bit 40 C 0 IOC2
+bit 39 I ? IOC3
+bit 38 O ? IOC3 37 0 Z
+bit 37 C 0 IOC3
+bit 36 I ? IOC4
+bit 35 O ? IOC4 34 0 Z
+bit 34 C 0 IOC4
+bit 33 I ? IOC5
+bit 32 O ? IOC5 31 0 Z
+bit 31 C 0 IOC5
+bit 30 I ? IOC6
+bit 29 O ? IOC6 28 0 Z
+bit 28 C 0 IOC6
+bit 27 I ? IOC7
+bit 26 O ? IOC7 25 0 Z
+bit 25 C 0 IOC7
+bit 24 I ? CLK1
+bit 23 I ? IOD0
+bit 22 O ? IOD0 21 0 Z
+bit 21 C 0 IOD0
+bit 20 I ? IOD1
+bit 19 O ? IOD1 18 0 Z
+bit 18 C 0 IOD1
+bit 17 I ? IOD2
+bit 16 O ? IOD2 15 0 Z
+bit 15 C 0 IOD2
+bit 14 I ? IOD3
+bit 13 O ? IOD3 12 0 Z
+bit 12 C 0 IOD3
+bit 11 I ? IOD4
+bit 10 O ? IOD4 9 0 Z
+bit 9 C 0 IOD4
+bit 8 I ? IOD5
+bit 7 O ? IOD5 6 0 Z
+bit 6 C 0 IOD5
+bit 5 I ? IOD6
+bit 4 O ? IOD6 3 0 Z
+bit 3 C 0 IOD6
+bit 2 I ? IOD7
+bit 1 O ? IOD7 0 0 Z
+bit 0 C 0 IOD7
--- /dev/null
+#
+# $Id$
+#
+# Copyright (C) 2005 Marek Michalkiewicz
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Marek Michalkiewicz <marekm@amelek.gda.pl>, 2005.
+#
+
+# bits 27-12 of the Device Identification Register
+0101001010000000 lx5280 LX5280
--- /dev/null
+#
+# $Id$
+#
+# Copyright (C) 2005 Marek Michalkiewicz
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Marek Michalkiewicz <marekm@amelek.gda.pl>, 2005.
+#
+
+# bits 31-28 of the Device Identification Register
+0001 lx5280 1
--- /dev/null
+#
+# $Id$
+#
+# JTAG declarations for Lexra LX5280 (Realtek RTL8181, RTL8186)
+# Copyright (C) 2005 Marek Michalkiewicz
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Marek Michalkiewicz <marekm@amelek.gda.pl>, 2005.
+#
+
+register BR 1
+register DIR 32
+register EJIMPCODE 32
+register EJADDRESS 32
+register EJDATA 32
+register EJCONTROL 32
+register EJALL 96
+
+instruction length 5
+
+instruction BYPASS 11111 BR
+instruction IDCODE 00001 DIR
+instruction EJTAG_IMPCODE 00011 EJIMPCODE
+instruction EJTAG_ADDRESS 01000 EJADDRESS
+instruction EJTAG_DATA 01001 EJDATA
+instruction EJTAG_CONTROL 01010 EJCONTROL
+instruction EJTAG_ALL 01011 EJALL
+
+initbus ejtag
+endian big
--- /dev/null
+#
+# $Id$
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+
+# mandatory data registers
+register BR 1 # Bypass Register
+
+# optional data registers
+register DIR 32 # Device Identification Register
+
+instruction length 8
+
+# mandatory instructions
+instruction BYPASS 11111111 BR
--- /dev/null
+#
+# $Id$
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+
+# bits 31-28 of the Device Identification Register
+
+0000 88e1118 0
--- /dev/null
+#
+# $Id$
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+
+# mandatory data registers
+register BR 1 # Bypass Register
+
+# optional data registers
+register DIR 32 # Device Identification Register
+
+instruction length 4
+
+# mandatory instructions
+instruction BYPASS 1111 BR
--- /dev/null
+#
+# $Id$
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+
+# bits 31-28 of the Device Identification Register
+
+0020 88f5182-a2 A2
--- /dev/null
+#
+# $Id$
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+
+# bits 27-12 of the Device Identification Register
+0000000000001010 88e1118 MV88E1118
+0101000110000010 88f5182 MV88F5182
--- /dev/null
+#
+# $Id: 1.2,v 1.1 2003/11/02 23:13:01 telka Exp $
+#
+# JTAG declarations for Motorola MPC8241 rev. 1.2 (or higher)
+# Copyright (C) 2003 Marcel Telka
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Documentation:
+# [1] Motorola, Inc., "MPC8241 Integrated Processor Hardware Specifications",
+# MPC8241EC/D, Rev. 3, 7/2003
+# [2] Motorola, Inc., "Motorola PowerPC MPC8241 (TM) 603/PCI Bridge/Memory
+# Controller Boundary Scan Description Language - MPC8241 Revision
+# 1.2 (or higher)", Oct 29, 2002
+#
+
+# signal list (see Table 17 in [1])
+
+# PCI Interface Signals
+signal nC/BE3 V11
+signal nC/BE2 V7
+signal nC/BE1 W3
+signal nC/BE0 R3
+signal nDEVSEL U6
+signal nFRAME T8
+signal nIRDY U7
+signal nLOCK V6
+signal AD31 U13
+signal AD30 V13
+signal AD29 U11
+signal AD28 W14
+signal AD27 V14
+signal AD26 U12
+signal AD25 W10
+signal AD24 T10
+signal AD23 V10
+signal AD22 U9
+signal AD21 V9
+signal AD20 W9
+signal AD19 W8
+signal AD18 T9
+signal AD17 W7
+signal AD16 V8
+signal AD15 V4
+signal AD14 W4
+signal AD13 V3
+signal AD12 V2
+signal AD11 T5
+signal AD10 R6
+signal AD9 V1
+signal AD8 T2
+signal AD7 U3
+signal AD6 P3
+signal AD5 T4
+signal AD4 R1
+signal AD3 T3
+signal AD2 R4
+signal AD1 U2
+signal AD0 U1
+signal PAR R7
+signal nGNT3 W15
+signal nGNT2 U15
+signal nGNT1 W17
+signal nGNT0 V12
+signal nGNT4 T11
+signal nREQ3 V16
+signal nREQ2 U14
+signal nREQ1 T15
+signal nREQ0 V15
+signal nREQ4 W13
+signal nPERR T7
+signal nSERR U5
+signal nSTOP W5
+signal nTRDY W6
+signal nINTA T12
+signal IDSEL U10
+
+# Memory Interface Signals
+signal MDL0 M19
+signal MDL1 M17
+signal MDL2 L16
+signal MDL3 L17
+signal MDL4 K18
+signal MDL5 J18
+signal MDL6 K17
+signal MDL7 K16
+signal MDL8 J15
+signal MDL9 J17
+signal MDL10 H18
+signal MDL11 F16
+signal MDL12 H16
+signal MDL13 H15
+signal MDL14 G17
+signal MDL15 D19
+signal MDL16 B3
+signal MDL17 C4
+signal MDL18 C2
+signal MDL19 D3
+signal MDL20 G5
+signal MDL21 E1
+signal MDL22 H5
+signal MDL23 E2
+signal MDL24 F1
+signal MDL25 F2
+signal MDL26 G2
+signal MDL27 J5
+signal MDL28 H1
+signal MDL29 H4
+signal MDL30 J4
+signal MDL31 J1
+signal MDH0 M18
+signal MDH1 L18
+signal MDH2 L15
+signal MDH3 K19
+signal MDH4 K15
+signal MDH5 J19
+signal MDH6 J16
+signal MDH7 H17
+signal MDH8 G19
+signal MDH9 G18
+signal MDH10 G16
+signal MDH11 D18
+signal MDH12 F18
+signal MDH13 E18
+signal MDH14 G15
+signal MDH15 E15
+signal MDH16 C3
+signal MDH17 D4
+signal MDH18 E5
+signal MDH19 F5
+signal MDH20 D1
+signal MDH21 E4
+signal MDH22 D2
+signal MDH23 E3
+signal MDH24 F4
+signal MDH25 G3
+signal MDH26 G4
+signal MDH27 G1
+signal MDH28 H2
+signal MDH29 J3
+signal MDH30 J2
+signal MDH31 K5
+signal DQM0 A18
+signal DQM1 B18
+signal DQM2 A6
+signal DQM3 C7
+signal DQM4 D15
+signal DQM5 D14
+signal DQM6 A9
+signal DQM7 B8
+signal nCS0 A17
+signal nCS1 B17
+signal nCS2 C16
+signal nCS3 C17
+signal nCS4 C9
+signal nCS5 C8
+signal nCS6 A10
+signal nCS7 B10
+signal nFOE A7
+signal nRCS0 C10
+signal nRCS1 B9
+signal nRCS2 P18
+signal nRCS3 N18
+signal SDMA1 A15
+signal SDMA0 B15
+signal SDMA11 A11
+signal SDMA10 B12
+signal SDMA9 A12
+signal SDMA8 C12
+signal SDMA7 B13
+signal SDMA6 C13
+signal SDMA5 D12
+signal SDMA4 A14
+signal SDMA3 C14
+signal SDMA2 B14
+signal nDRDY P1
+signal SDMA12 L3
+signal SDMA13 K3
+signal SDMA14 K2
+signal SDBA1 C11
+signal SDBA0 B11
+signal PAR0 E19
+signal PAR1 C19
+signal PAR2 D5
+signal PAR3 D6
+signal PAR4 E16
+signal PAR5 F17
+signal PAR6 B2
+signal PAR7 C1
+signal nSDRAS B19
+signal nSDCAS D16
+signal CKE C6
+signal nWE B16
+signal nAS A16
+
+# PIC Control Signals
+signal IRQ0 P4
+signal IRQ1 R2
+signal IRQ2 U19
+signal IRQ3 P15
+signal IRQ4 P2
+
+# I2C Control Signals
+signal SDA R17
+signal SCL R19
+
+# DUART Control Signals
+signal SOUT1 T16
+signal SIN1 U16
+signal SOUT2 W18
+signal SIN2 V19
+
+# Clock-Out Signals
+salias PCI_CLK0 SOUT1
+salias PCI_CLK1 SIN1
+salias PCI_CLK2 SOUT2
+salias PCI_CLK3 SIN2
+signal PCI_CLK4 V17
+signal PCI_SYNC_OUT U17
+signal PCI_SYNC_IN V18
+signal SDRAM_CLK0 D7
+signal SDRAM_CLK1 B7
+signal SDRAM_CLK2 C5
+signal SDRAM_CLK3 A5
+signal SDRAM_SYNC_OUT B4
+signal SDRAM_SYNC_IN A4
+signal CKO L1
+signal OSC_IN R17
+
+# Miscellaneous Signals
+signal nHRST_CTRL M2
+signal nHRST_CPU L4
+signal nMCP K4
+signal NMI M1
+signal nSMI L2
+salias nSRESET SDMA12
+salias TBEN SDMA13
+signal nQACK A3
+salias nCHKSTOP_IN SDMA14
+salias TRIG_IN nRCS2
+salias TRIG_OUT nRCS3
+signal MAA0 E17
+signal MAA1 D17
+signal MAA2 C18
+signal nMIV K1
+signal PMAA0 N19
+signal PMAA1 N17
+signal PMAA2 M15
+
+# Test/Configuration Signals
+signal PLL_CFG0 N3
+signal PLL_CFG1 N2
+signal PLL_CFG2 N1
+signal PLL_CFG3 M4
+signal PLL_CFG4 M3
+signal nTEST0 P16
+# nDRDY
+signal RTC D13
+signal TCK T19
+signal TDI N15
+signal TDO T17
+signal TMS T18
+signal nTRST R16
+
+# Power and Ground Signals
+signal GND F07 F08 F09 F11 F12 F13 G07 G08 G09 G10 G11 G12 G13 H07 H08 H09 H10 H11 H12 H13 J07 J08 J09 J10 J11 J12 J13 K07 K08 K09 K10 K11 K12 K13 L07 L08 L09 L10 L11 L12 L13 M07 M08 M09 M10 M11 M12 M13 N07 N08 N09 N10 N11 N12 N13 P08 P09 P10 P11 P12 P13 R15
+signal LVDD R18 U18 T1 U4 T6 W11 T14
+signal GVDD D09 D10 D11 E06 E07 E08 E09 E10 E11 E12 E13 E14 F06 F14 G06 G14 H06 H14 J06 J14 K06 K14 L06 L14 M06 M14 N06 N14 P06 P07 P14 R08 R09 R10 R11 R12
+signal OVDD GVDD
+signal VDD F03 H3 L5 N4 P5 V5 U8 W12 W16 R13 P19 L19 H19 F19 F15 C15 A13 A8 B5 A2
+signal NC N5 W2 B1
+signal AVDD M5
+signal AVDD2 R14
+
+# Debug/Manufacturing Pins
+salias DA0 nQACK
+salias DA1 CKO
+signal DA2 R5
+salias DA3 PCI_CLK4
+salias DA4 nREQ4
+salias DA5 nGNT4
+salias DA10 PLL_CFG0
+salias DA9 PLL_CFG1
+salias DA8 PLL_CFG2
+salias DA7 PLL_CFG3
+salias DA6 PLL_CFG4
+signal DA11 T13
+signal DA12 M16
+signal DA13 N16
+signal DA14 B6
+signal DA15 D8
+
+# see [2]
+# mandatory data registers
+register BSR 507
+register BR 1
+
+# see [2]
+instruction length 8
+# mandatory instructions
+instruction EXTEST 00000000 BSR
+instruction SAMPLE/PRELOAD 11000000 BSR
+instruction BYPASS 11111111 BR
+# optional instructions
+instruction HIGHZ 11110000 BR
+instruction CLAMP 11110001 BR
+
+# see [2]
+bit 506 B 0 nC/BE0 298 0 Z
+bit 505 B 0 nIRQ1 504 0 Z
+bit 504 C 0 .
+bit 503 I ? nIRQ0
+bit 502 B 0 nIRQ4 501 0 Z
+bit 501 C 0 .
+bit 500 I ? nDRDY
+bit 499 B 0 PLL_CFG0 132 0 Z
+bit 498 B 0 PLL_CFG1 132 0 Z
+bit 497 B 0 PLL_CFG2 132 0 Z
+bit 496 B 0 PLL_CFG3 132 0 Z
+bit 495 B 0 PLL_CFG4 132 0 Z
+bit 494 I ? nHRST_CTRL
+bit 493 I ? nHRST_CPU
+bit 492 O 0 SDRAM_SYNC_OUT 133 0 Z
+bit 491 I ? SDRAM_SYNC_IN
+bit 490 B 0 nMCP 251 0 Z
+bit 489 X ? .
+bit 488 I ? NMI
+bit 487 O 0 nMIV 222 0 Z
+bit 486 B 0 PAR0 188 0 Z
+bit 485 B 0 PAR1 188 0 Z
+bit 484 B 0 PAR2 188 0 Z
+bit 483 B 0 PAR3 188 0 Z
+bit 482 B 0 PAR4 189 0 Z
+bit 481 B 0 PAR5 189 0 Z
+bit 480 B 0 PAR6 189 0 Z
+bit 479 B 0 PAR7 189 0 Z
+bit 478 X ? .
+bit 477 X ? .
+bit 476 X ? .
+bit 475 X ? .
+bit 474 X ? .
+bit 473 X ? .
+bit 472 X ? .
+bit 471 X ? .
+bit 470 X ? .
+bit 469 X ? .
+bit 468 X ? .
+bit 467 X ? .
+bit 466 X ? .
+bit 465 X ? .
+bit 464 X ? .
+bit 463 X ? .
+bit 462 X ? .
+bit 461 X ? .
+bit 460 X ? .
+bit 459 X ? .
+bit 458 X ? .
+bit 457 X ? .
+bit 456 X ? .
+bit 455 X ? .
+bit 454 X ? .
+bit 453 X ? .
+bit 452 X ? .
+bit 451 X ? .
+bit 450 X ? .
+bit 449 X ? .
+bit 448 X ? .
+bit 447 X ? .
+bit 446 X ? .
+bit 445 X ? .
+bit 444 X ? .
+bit 443 X ? .
+bit 442 X ? .
+bit 441 X ? .
+bit 440 X ? .
+bit 439 X ? .
+bit 438 X ? .
+bit 437 X ? .
+bit 436 C 0 .
+bit 435 X ? .
+bit 434 B 0 MDH0 436 0 Z
+bit 433 B 0 MDH1 436 0 Z
+bit 432 B 0 MDH2 436 0 Z
+bit 431 B 0 MDH3 436 0 Z
+bit 430 B 0 MDH4 436 0 Z
+bit 429 B 0 MDH5 436 0 Z
+bit 428 B 0 MDH6 436 0 Z
+bit 427 B 0 MDH7 436 0 Z
+bit 426 B 0 MDH8 436 0 Z
+bit 425 B 0 MDH9 436 0 Z
+bit 424 B 0 MDH10 436 0 Z
+bit 423 B 0 MDH11 436 0 Z
+bit 422 B 0 MDH12 436 0 Z
+bit 421 B 0 MDH13 436 0 Z
+bit 420 B 0 MDH14 436 0 Z
+bit 419 B 0 MDH15 436 0 Z
+bit 418 B 0 MDH16 436 0 Z
+bit 417 B 0 MDH17 436 0 Z
+bit 416 B 0 MDH18 436 0 Z
+bit 415 B 0 MDH19 436 0 Z
+bit 414 B 0 MDH20 436 0 Z
+bit 413 B 0 MDH21 436 0 Z
+bit 412 B 0 MDH22 436 0 Z
+bit 411 B 0 MDH23 436 0 Z
+bit 410 B 0 MDH24 436 0 Z
+bit 409 B 0 MDH25 436 0 Z
+bit 408 B 0 MDH26 436 0 Z
+bit 407 B 0 MDH27 436 0 Z
+bit 406 B 0 MDH28 436 0 Z
+bit 405 B 0 MDH29 436 0 Z
+bit 404 B 0 MDH30 436 0 Z
+bit 403 B 0 MDH31 436 0 Z
+bit 402 B 0 nFOE 223 0 Z
+bit 401 C 0 .
+bit 400 O 0 nRCS1 224 0 Z
+bit 399 B 0 nRCS0 223 0 Z
+bit 398 O 0 SDRAM_CLK0 397 0 Z
+bit 397 C 0 .
+bit 396 O 0 SDRAM_CLK2 395 0 Z
+bit 395 C 0 .
+bit 394 O 0 SDRAM_CLK3 393 0 Z
+bit 393 C 0 .
+bit 392 B 0 CKE 401 0 Z
+bit 391 O 0 SDBA0 224 0 Z
+bit 390 X ? .
+bit 389 X ? .
+bit 388 X ? .
+bit 387 X ? .
+bit 386 X ? .
+bit 385 X ? .
+bit 384 X ? .
+bit 383 X ? .
+bit 382 X ? .
+bit 381 X ? .
+bit 380 X ? .
+bit 379 X ? .
+bit 378 X ? .
+bit 377 X ? .
+bit 376 X ? .
+bit 375 X ? .
+bit 374 X ? .
+bit 373 X ? .
+bit 372 X ? .
+bit 371 X ? .
+bit 370 X ? .
+bit 369 X ? .
+bit 368 X ? .
+bit 367 X ? .
+bit 366 X ? .
+bit 365 X ? .
+bit 364 X ? .
+bit 363 X ? .
+bit 362 X ? .
+bit 361 X ? .
+bit 360 X ? .
+bit 359 X ? .
+bit 358 C 0 .
+bit 357 B 0 MDL0 358 0 Z
+bit 356 B 0 MDL1 358 0 Z
+bit 355 B 0 MDL2 358 0 Z
+bit 354 B 0 MDL3 358 0 Z
+bit 353 B 0 MDL4 358 0 Z
+bit 352 B 0 MDL5 358 0 Z
+bit 351 B 0 MDL6 358 0 Z
+bit 350 B 0 MDL7 358 0 Z
+bit 349 B 0 MDL8 358 0 Z
+bit 348 B 0 MDL9 358 0 Z
+bit 347 B 0 MDL10 358 0 Z
+bit 346 B 0 MDL11 358 0 Z
+bit 345 B 0 MDL12 358 0 Z
+bit 344 B 0 MDL13 358 0 Z
+bit 343 B 0 MDL14 358 0 Z
+bit 342 B 0 MDL15 358 0 Z
+bit 341 B 0 MDL16 358 0 Z
+bit 340 B 0 MDL17 358 0 Z
+bit 339 B 0 MDL18 358 0 Z
+bit 338 B 0 MDL19 358 0 Z
+bit 337 B 0 MDL20 358 0 Z
+bit 336 B 0 MDL21 358 0 Z
+bit 335 B 0 MDL22 358 0 Z
+bit 334 B 0 MDL23 358 0 Z
+bit 333 B 0 MDL24 358 0 Z
+bit 332 B 0 MDL25 358 0 Z
+bit 331 B 0 MDL26 358 0 Z
+bit 330 B 0 MDL27 358 0 Z
+bit 329 B 0 MDL28 358 0 Z
+bit 328 B 0 MDL29 358 0 Z
+bit 327 B 0 MDL30 358 0 Z
+bit 326 B 0 MDL31 358 0 Z
+bit 325 B 0 SDMA0 223 0 Z
+bit 324 B 0 SDMA1 223 0 Z
+bit 323 O 0 SDMA2 224 0 Z
+bit 322 O 0 SDMA3 224 0 Z
+bit 321 O 0 SDMA4 224 0 Z
+bit 320 O 0 SDMA5 224 0 Z
+bit 319 O 0 SDMA6 224 0 Z
+bit 318 O 0 SDMA7 224 0 Z
+bit 317 O 0 SDMA8 224 0 Z
+bit 316 O 0 SDMA9 224 0 Z
+bit 315 O 0 SDMA10 224 0 Z
+bit 314 O 0 SDMA11 224 0 Z
+bit 313 X ? .
+bit 312 X ? .
+bit 311 X ? .
+bit 310 O 0 SDBA1 224 0 Z
+bit 309 B 0 PAR 299 0 Z
+bit 308 C 0 .
+bit 307 O 0 SDRAM_CLK1 308 0 Z
+bit 306 X ? .
+bit 305 X ? .
+bit 304 O 0 DQM2 224 0 Z
+bit 303 O 0 DQM5 224 0 Z
+bit 302 O 0 DQM4 224 0 Z
+bit 301 O 0 DQM3 224 0 Z
+bit 300 X ? .
+bit 299 C 0 .
+bit 298 C 0 .
+bit 297 C 0 .
+bit 296 C 0 .
+bit 295 X ? .
+bit 294 X ? .
+bit 293 X ? .
+bit 292 X ? .
+bit 291 B 0 nTRDY 296 0 Z
+bit 290 X ? .
+bit 289 B 0 nGNT4 223 0 Z
+bit 288 O 0 nGNT2 223 0 Z
+bit 287 X ? .
+bit 286 X ? .
+bit 285 X ? .
+bit 284 X ? .
+bit 283 X ? .
+bit 282 O 0 nCS2 224 0 Z
+bit 281 O 0 nCS0 224 0 Z
+bit 280 O 0 nCS1 224 0 Z
+bit 279 X ? .
+bit 278 X ? .
+bit 277 X ? .
+bit 276 C 0 .
+bit 275 B 0 nINTA 276 0 Z
+bit 274 X ? .
+bit 273 B 0 nSRESET 131 0 Z
+bit 272 B 0 nQACK 223 0 Z
+bit 271 X ? .
+bit 270 X ? .
+bit 269 X ? .
+bit 268 X ? .
+bit 267 X ? .
+bit 266 X ? .
+bit 265 X ? .
+bit 264 X ? .
+bit 263 X ? .
+bit 262 X ? .
+bit 261 X ? .
+bit 260 X ? .
+bit 259 X ? .
+bit 258 X ? .
+bit 257 X ? .
+bit 256 X ? .
+bit 255 X ? .
+bit 254 X ? .
+bit 253 X ? .
+bit 252 X ? .
+bit 251 C 0 .
+bit 250 X ? .
+bit 249 C 0 .
+bit 248 X ? .
+bit 247 X ? .
+bit 246 X ? .
+bit 245 X ? .
+bit 244 X ? .
+bit 243 X ? .
+bit 242 X ? .
+bit 241 X ? .
+bit 240 X ? .
+bit 239 X ? .
+bit 238 X ? .
+bit 237 X ? .
+bit 236 X ? .
+bit 235 O 0 nCS4 224 0 Z
+bit 234 O 0 nCS5 224 0 Z
+bit 233 O 0 DQM0 224 0 Z
+bit 232 O 0 DQM6 224 0 Z
+bit 231 O 0 DQM1 224 0 Z
+bit 230 O 0 DQM7 224 0 Z
+bit 229 X ? .
+bit 228 X ? .
+bit 227 X ? .
+bit 226 X ? .
+bit 225 X ? .
+bit 224 C 0 .
+bit 223 C 0 .
+bit 222 C 0 .
+bit 221 O 0 nGNT1 223 0 Z
+bit 220 X ? .
+bit 219 C 0 .
+bit 218 O 0 nCS6 224 0 Z
+bit 217 O 0 nCS7 224 0 Z
+bit 216 O 0 nSDRAS 224 0 Z
+bit 215 O 0 nCS3 224 0 Z
+bit 214 O 0 nAS 223 0 Z
+bit 213 X ? .
+bit 212 I ? RTC
+bit 211 O 0 TRIG_OUT 219 0 Z
+bit 210 B 0 TBEN 130 0 Z
+bit 209 X ? .
+bit 208 X ? .
+bit 207 O 0 nGNT3 223 0 Z
+bit 206 O 0 nGNT0 223 0 Z
+bit 205 O 0 CKO 249 0 Z
+bit 204 O 0 nWE 224 0 Z
+bit 203 C 0 .
+bit 202 C 0 .
+bit 201 C 0 .
+bit 200 C 0 .
+bit 199 C 0 .
+bit 198 C 0 .
+bit 197 O 0 PCI_CLK4 203 0 Z
+bit 196 O 0 PCI_SYNC_OUT 202 0 Z
+bit 195 B 0 PCI_CLK3 200 0 Z
+bit 194 O 0 PCI_CLK2 201 0 Z
+bit 193 B 0 PCI_CLK1 198 0 Z
+bit 192 O 0 PCI_CLK0 199 0 Z
+bit 191 C 0 .
+bit 190 X ? .
+bit 189 C 0 .
+bit 188 C 0 .
+bit 187 C 0 .
+bit 186 C 0 .
+bit 185 B 0 TRIG_IN 130 0 Z
+bit 184 B 0 nCHKSTOP_IN 131 0 Z
+bit 183 X ? .
+bit 182 X ? .
+bit 181 X ? .
+bit 180 X ? .
+bit 179 X ? .
+bit 178 X ? .
+bit 177 X ? .
+bit 176 X ? .
+bit 175 X ? .
+bit 174 X ? .
+bit 173 X ? .
+bit 172 X ? .
+bit 171 X ? .
+bit 170 X ? .
+bit 169 X ? .
+bit 168 O 0 nSDCAS 224 0 Z
+bit 167 X ? .
+bit 166 X ? .
+bit 165 X ? .
+bit 164 X ? .
+bit 163 X ? .
+bit 162 B 0 MAA2 223 0 Z
+bit 161 X ? .
+bit 160 X ? .
+bit 159 X ? .
+bit 158 X ? .
+bit 157 X ? .
+bit 156 X ? .
+bit 155 O 0 DA15 223 0 Z
+bit 154 X ? .
+bit 153 O 0 DA14 223 0 Z
+bit 152 O 0 DA11 223 0 Z
+bit 151 O 0 DA13 223 0 Z
+bit 150 O 0 DA2 223 0 Z
+bit 149 O 0 DA12 223 0 Z
+bit 148 X ? .
+bit 147 X ? .
+bit 146 X ? .
+bit 145 X ? .
+bit 144 X ? .
+bit 143 X ? .
+bit 142 X ? .
+bit 141 X ? .
+bit 140 X ? .
+bit 139 X ? .
+bit 138 X ? .
+bit 137 X ? .
+bit 136 X ? .
+bit 135 X ? .
+bit 134 X ? .
+bit 133 C 0 .
+bit 132 C 0 .
+bit 131 C 0 .
+bit 130 C 0 .
+bit 129 X ? .
+bit 128 X ? .
+bit 127 X ? .
+bit 126 X ? .
+bit 125 X ? .
+bit 124 X ? .
+bit 123 X ? .
+bit 122 X ? .
+bit 121 X ? .
+bit 120 X ? .
+bit 119 X ? .
+bit 118 X ? .
+bit 117 X ? .
+bit 116 X ? .
+bit 115 X ? .
+bit 114 X ? .
+bit 113 X ? .
+bit 112 X ? .
+bit 111 X ? .
+bit 110 B 0 AD11 21 0 Z
+bit 109 B 0 AD10 21 0 Z
+bit 108 B 0 AD9 21 0 Z
+bit 107 B 0 AD8 21 0 Z
+bit 106 B 0 AD7 21 0 Z
+bit 105 B 0 AD6 21 0 Z
+bit 104 B 0 AD5 21 0 Z
+bit 103 B 0 AD4 21 0 Z
+bit 102 B 0 AD3 21 0 Z
+bit 101 B 0 AD2 21 0 Z
+bit 100 B 0 AD1 21 0 Z
+bit 99 B 0 AD0 21 0 Z
+bit 98 X ? .
+bit 97 X ? .
+bit 96 X ? .
+bit 95 X ? .
+bit 94 X ? .
+bit 93 X ? .
+bit 92 X ? .
+bit 91 X ? .
+bit 90 X ? .
+bit 89 X ? .
+bit 88 X ? .
+bit 87 X ? .
+bit 86 X ? .
+bit 85 X ? .
+bit 84 X ? .
+bit 83 X ? .
+bit 82 X ? .
+bit 81 X ? .
+bit 80 X ? .
+bit 79 X ? .
+bit 78 X ? .
+bit 77 X ? .
+bit 76 X ? .
+bit 75 X ? .
+bit 74 X ? .
+bit 73 X ? .
+bit 72 X ? .
+bit 71 X ? .
+bit 70 X ? .
+bit 69 X ? .
+bit 68 X ? .
+bit 67 X ? .
+bit 66 X ? .
+bit 65 B 0 nFRAME 297 0 Z
+bit 64 B 0 nC/BE3 298 0 Z
+bit 63 B 0 nC/BE2 298 0 Z
+bit 62 B 0 nC/BE1 298 0 Z
+bit 61 B 0 nDEVSEL 186 0 Z
+bit 60 B 0 nPERR 187 0 Z
+bit 59 B 0 nSTOP 54 0 Z
+bit 58 I ? nLOCK
+bit 57 X ? .
+bit 56 C 0 .
+bit 55 B 0 nIRDY 56 0 Z
+bit 54 C 0 .
+bit 53 X ? .
+bit 52 X ? .
+bit 51 B 0 MAA1 223 0 Z
+bit 50 B 0 PMAA0 223 0 Z
+bit 49 B 0 PMAA1 223 0 Z
+bit 48 B 0 PMAA2 223 0 Z
+bit 47 B 0 MAA0 223 0 Z
+bit 46 X ? .
+bit 45 I ? OSC_IN
+bit 44 C 0 .
+bit 43 C 0 .
+bit 42 B 0 SCL 44 0 Z
+bit 41 B 0 SDA 43 0 Z
+bit 40 B 0 IRQ2 39 0 Z
+bit 39 C 0 .
+bit 38 C 0 .
+bit 37 B 0 IRQ3 38 0 Z
+bit 36 I ? PCI_SYNC_IN
+bit 35 X ? .
+bit 34 X ? .
+bit 33 X ? .
+bit 32 I ? nSMI
+bit 31 X ? .
+bit 30 X ? .
+bit 29 X ? .
+bit 28 I ? IDSEL
+bit 27 I ? nREQ0
+bit 26 I ? nREQ1
+bit 25 I ? nREQ2
+bit 24 I ? nREQ3
+bit 23 B 0 nREQ4 132 0 Z
+bit 22 B 0 nSERR 191 0 Z
+bit 21 C 0 .
+bit 20 X ? .
+bit 19 B 0 AD16 21 0 Z
+bit 18 B 0 AD17 21 0 Z
+bit 17 B 0 AD18 21 0 Z
+bit 16 B 0 AD19 21 0 Z
+bit 15 B 0 AD20 21 0 Z
+bit 14 B 0 AD21 21 0 Z
+bit 13 B 0 AD22 21 0 Z
+bit 12 B 0 AD23 21 0 Z
+bit 11 B 0 AD24 21 0 Z
+bit 10 B 0 AD25 21 0 Z
+bit 9 B 0 AD26 21 0 Z
+bit 8 B 0 AD27 21 0 Z
+bit 7 B 0 AD28 21 0 Z
+bit 6 B 0 AD29 21 0 Z
+bit 5 B 0 AD30 21 0 Z
+bit 4 B 0 AD31 21 0 Z
+bit 3 B 0 AD15 21 0 Z
+bit 2 B 0 AD14 21 0 Z
+bit 1 B 0 AD13 21 0 Z
+bit 0 B 0 AD12 21 0 Z
+
+initbus mpc824x
--- /dev/null
+#
+# $Id$
+#
+# JTAG declarations for Motorola MPC8245 rev. 1.2 (or higher)
+# Copyright (C) 2003 Marcel Telka
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Documentation:
+# [1] Motorola, Inc., "MPC8245 Integrated Processor Hardware Specifications",
+# MPC8245EC/D, Rev. 3, 7/2003
+# [2] Motorola, Inc., "Motorola PowerPC MPC8245 (TM) 603/PCI Bridge/Memory
+# Controller Boundary Scan Description Language - MPC8245 Revision
+# 1.2 (or higher)", Oct 29, 2002
+#
+
+# signal list (see Table 17 in [1])
+
+# PCI Interface Signals
+signal nC/BE3 P25
+signal nC/BE2 K23
+signal nC/BE1 F23
+signal nC/BE0 A25
+signal nDEVSEL H26
+signal nFRAME J24
+signal nIRDY K25
+signal nLOCK J26
+signal AD31 V25
+signal AD30 U25
+signal AD29 U26
+signal AD28 U24
+signal AD27 U23
+signal AD26 T25
+signal AD25 T26
+signal AD24 R25
+signal AD23 R26
+signal AD22 N26
+signal AD21 N25
+signal AD20 N23
+signal AD19 M26
+signal AD18 M25
+signal AD17 L25
+signal AD16 L26
+signal AD15 F24
+signal AD14 E26
+signal AD13 E25
+signal AD12 E23
+signal AD11 D26
+signal AD10 D25
+signal AD9 C26
+signal AD8 A26
+signal AD7 B26
+signal AD6 A24
+signal AD5 B24
+signal AD4 D19
+signal AD3 B23
+signal AD2 B22
+signal AD1 D22
+signal AD0 C22
+signal PAR G25
+signal nGNT3 W25
+signal nGNT2 W24
+signal nGNT1 W23
+signal nGNT0 V26
+signal nGNT4 W26
+signal nREQ3 Y25
+signal nREQ2 AA26
+signal nREQ1 AA25
+signal nREQ0 AB26
+signal nREQ4 Y26
+signal nPERR G26
+signal nSERR F26
+signal nSTOP H25
+signal nTRDY K26
+signal nINTA AC26
+signal IDSEL P26
+
+# Memory Interface Signals
+signal MDL0 AD17
+signal MDL1 AE17
+signal MDL2 AE15
+signal MDL3 AF15
+signal MDL4 AC14
+signal MDL5 AE13
+signal MDL6 AF13
+signal MDL7 AF12
+signal MDL8 AF11
+signal MDL9 AF10
+signal MDL10 AF9
+signal MDL11 AD8
+signal MDL12 AF8
+signal MDL13 AF7
+signal MDL14 AF6
+signal MDL15 AE5
+signal MDL16 B1
+signal MDL17 A1
+signal MDL18 A3
+signal MDL19 A4
+signal MDL20 A5
+signal MDL21 A6
+signal MDL22 A7
+signal MDL23 D7
+signal MDL24 A8
+signal MDL25 B8
+signal MDL26 A10
+signal MDL27 D10
+signal MDL28 A12
+signal MDL29 B11
+signal MDL30 B12
+signal MDL31 A14
+signal MDH0 AC17
+signal MDH1 AF16
+signal MDH2 AE16
+signal MDH3 AE14
+signal MDH4 AF14
+signal MDH5 AC13
+signal MDH6 AE12
+signal MDH7 AE11
+signal MDH8 AE10
+signal MDH9 AE9
+signal MDH10 AE8
+signal MDH11 AC7
+signal MDH12 AE7
+signal MDH13 AE6
+signal MDH14 AF5
+signal MDH15 AC5
+signal MDH16 E4
+signal MDH17 A2
+signal MDH18 B3
+signal MDH19 D4
+signal MDH20 B4
+signal MDH21 B5
+signal MDH22 D6
+signal MDH23 C6
+signal MDH24 B7
+signal MDH25 C9
+signal MDH26 A9
+signal MDH27 B10
+signal MDH28 A11
+signal MDH29 A13
+signal MDH30 B13
+signal MDH31 A15
+signal DQM0 AB1
+signal DQM1 AB2
+signal DQM2 K3
+signal DQM3 K2
+signal DQM4 AC1
+signal DQM5 AC2
+signal DQM6 K1
+signal DQM7 J1
+signal nCS0 Y4
+signal nCS1 AA3
+signal nCS2 AA4
+signal nCS3 AC4
+signal nCS4 M2
+signal nCS5 L2
+signal nCS6 M1
+signal nCS7 L1
+signal nFOE H1
+signal nRCS0 N4
+signal nRCS1 N2
+signal nRCS2 AF20
+signal nRCS3 AC18
+signal SDMA1 W1
+signal SDMA0 W2
+signal SDMA11 N1
+signal SDMA10 R1
+signal SDMA9 R2
+signal SDMA8 T1
+signal SDMA7 T2
+signal SDMA6 U4
+signal SDMA5 U2
+signal SDMA4 U1
+signal SDMA3 V1
+signal SDMA2 V3
+signal nDRDY B20
+signal SDMA12 B16
+signal SDMA13 B14
+signal SDMA14 D14
+signal SDBA1 P1
+signal SDBA0 P2
+signal PAR0 AF3
+signal PAR1 AE3
+signal PAR2 G4
+signal PAR3 E2
+signal PAR4 AE4
+signal PAR5 AF4
+signal PAR6 D2
+signal PAR7 C2
+signal nSDRAS AD1
+signal nSDCAS AD2
+signal CKE H2
+signal nWE AA1
+signal nAS Y1
+
+# PIC Control Signals
+signal IRQ0 C19
+signal IRQ1 B21
+signal IRQ2 AC22
+signal IRQ3 AE24
+signal IRQ4 A23
+
+# I2C Control Signals
+signal SDA AE20
+signal SCL AF21
+
+# DUART Control Signals
+signal SOUT1 AC25
+signal SIN1 AB25
+signal SOUT2 AE26
+signal SIN2 AF25
+
+# Clock-Out Signals
+salias PCI_CLK0 SOUT1
+salias PCI_CLK1 SIN1
+salias PCI_CLK2 SOUT2
+salias PCI_CLK3 SIN2
+signal PCI_CLK4 AF26
+signal PCI_SYNC_OUT AD25
+signal PCI_SYNC_IN AB23
+signal SDRAM_CLK0 D1
+signal SDRAM_CLK1 G1
+signal SDRAM_CLK2 G2
+signal SDRAM_CLK3 E1
+signal SDRAM_SYNC_OUT C1
+signal SDRAM_SYNC_IN H3
+signal CKO B15
+signal OSC_IN AD21
+
+# Miscellaneous Signals
+signal nHRST_CTRL A20
+signal nHRST_CPU A19
+signal nMCP A17
+signal NMI D16
+signal nSMI A18
+salias nSRESET SDMA12
+salias TBEN SDMA13
+signal nQACK F2
+salias nCHKSTOP_IN SDMA14
+salias TRIG_IN nRCS2
+salias TRIG_OUT nRCS3
+signal MAA0 AF2
+signal MAA1 AF1
+signal MAA2 AE1
+signal nMIV A16
+signal PMAA0 AD18
+signal PMAA1 AF18
+signal PMAA2 AE19
+
+# Test/Configuration Signals
+signal PLL_CFG0 A22
+signal PLL_CFG1 B19
+signal PLL_CFG2 A21
+signal PLL_CFG3 B18
+signal PLL_CFG4 B17
+signal nTEST0 AD22
+# nDRDY
+signal RTC Y2
+signal TCK AF22
+signal TDI AF23
+signal TDO AC21
+signal TMS AE22
+signal nTRST AE23
+
+# Power and Ground Signals
+signal GND AA2 AA23 AC12 AC15 AC24 AC3 AC6 AC9 AD11 AD14 AD16 AD19 AD23 AD4 AE18 AE2 AE21 AE25 B2 B25 B6 B9 C11 C13 C16 C23 C4 C8 D12 D15 D18 D21 D24 D3 F25 F4 H24 J25 J4 L24 L3 M23 M4 N24 P3 R23 R4 T24 T3 V2 V23 W3
+signal LVDD AC20 AC23 D20 D23 G23 P23 Y23
+signal GVDD AB3 AB4 AC10 AC11 AC8 AD10 AD13 AD15 AD3 AD5 AD7 C10 C12 C3 C5 C7 D13 D5 D9 E3 G3 H4 K4 L4 N3 P4 R3 U3 V4 Y3
+signal OVDD AB24 AD20 AD24 C14 C20 C24 E24 G24 J23 K24 M24 P24 T23 Y24
+signal VDD AA24 AC16 AC19 AD12 AD6 AD9 C15 C18 C21 D11 D8 F3 H23 J3 L23 M3 R24 T4 V24 W4
+signal NC D17
+signal AVDD C17
+signal AVDD2 AF24
+
+# Debug/Manufacturing Pins
+salias DA0 nQACK
+salias DA1 CKO
+signal DA2 C25
+salias DA3 PCI_CLK4
+salias DA4 nREQ4
+salias DA5 nGNT4
+salias DA10 PLL_CFG0
+salias DA9 PLL_CFG1
+salias DA8 PLL_CFG2
+salias DA7 PLL_CFG3
+salias DA6 PLL_CFG4
+signal DA11 AD26
+signal DA12 AF17
+signal DA13 AF19
+signal DA14 F1
+signal DA15 J2
+
+# see [2]
+# mandatory data registers
+register BSR 507
+register BR 1
+
+# see [2]
+instruction length 8
+# mandatory instructions
+instruction EXTEST 00000000 BSR
+instruction SAMPLE/PRELOAD 11000000 BSR
+instruction BYPASS 11111111 BR
+# optional instructions
+instruction HIGHZ 11110000 BR
+instruction CLAMP 11110001 BR
+
+# see [2]
+bit 506 B 0 nC/BE0 298 0 Z
+bit 505 B 0 nIRQ1 504 0 Z
+bit 504 C 0 .
+bit 503 I ? nIRQ0
+bit 502 B 0 nIRQ4 501 0 Z
+bit 501 C 0 .
+bit 500 I ? nDRDY
+bit 499 B 0 PLL_CFG0 132 0 Z
+bit 498 B 0 PLL_CFG1 132 0 Z
+bit 497 B 0 PLL_CFG2 132 0 Z
+bit 496 B 0 PLL_CFG3 132 0 Z
+bit 495 B 0 PLL_CFG4 132 0 Z
+bit 494 I ? nHRST_CTRL
+bit 493 I ? nHRST_CPU
+bit 492 O 0 SDRAM_SYNC_OUT 133 0 Z
+bit 491 I ? SDRAM_SYNC_IN
+bit 490 B 0 nMCP 251 0 Z
+bit 489 X ? .
+bit 488 I ? NMI
+bit 487 O 0 nMIV 222 0 Z
+bit 486 B 0 PAR0 188 0 Z
+bit 485 B 0 PAR1 188 0 Z
+bit 484 B 0 PAR2 188 0 Z
+bit 483 B 0 PAR3 188 0 Z
+bit 482 B 0 PAR4 189 0 Z
+bit 481 B 0 PAR5 189 0 Z
+bit 480 B 0 PAR6 189 0 Z
+bit 479 B 0 PAR7 189 0 Z
+bit 478 X ? .
+bit 477 X ? .
+bit 476 X ? .
+bit 475 X ? .
+bit 474 X ? .
+bit 473 X ? .
+bit 472 X ? .
+bit 471 X ? .
+bit 470 X ? .
+bit 469 X ? .
+bit 468 X ? .
+bit 467 X ? .
+bit 466 X ? .
+bit 465 X ? .
+bit 464 X ? .
+bit 463 X ? .
+bit 462 X ? .
+bit 461 X ? .
+bit 460 X ? .
+bit 459 X ? .
+bit 458 X ? .
+bit 457 X ? .
+bit 456 X ? .
+bit 455 X ? .
+bit 454 X ? .
+bit 453 X ? .
+bit 452 X ? .
+bit 451 X ? .
+bit 450 X ? .
+bit 449 X ? .
+bit 448 X ? .
+bit 447 X ? .
+bit 446 X ? .
+bit 445 X ? .
+bit 444 X ? .
+bit 443 X ? .
+bit 442 X ? .
+bit 441 X ? .
+bit 440 X ? .
+bit 439 X ? .
+bit 438 X ? .
+bit 437 X ? .
+bit 436 C 0 .
+bit 435 X ? .
+bit 434 B 0 MDH0 436 0 Z
+bit 433 B 0 MDH1 436 0 Z
+bit 432 B 0 MDH2 436 0 Z
+bit 431 B 0 MDH3 436 0 Z
+bit 430 B 0 MDH4 436 0 Z
+bit 429 B 0 MDH5 436 0 Z
+bit 428 B 0 MDH6 436 0 Z
+bit 427 B 0 MDH7 436 0 Z
+bit 426 B 0 MDH8 436 0 Z
+bit 425 B 0 MDH9 436 0 Z
+bit 424 B 0 MDH10 436 0 Z
+bit 423 B 0 MDH11 436 0 Z
+bit 422 B 0 MDH12 436 0 Z
+bit 421 B 0 MDH13 436 0 Z
+bit 420 B 0 MDH14 436 0 Z
+bit 419 B 0 MDH15 436 0 Z
+bit 418 B 0 MDH16 436 0 Z
+bit 417 B 0 MDH17 436 0 Z
+bit 416 B 0 MDH18 436 0 Z
+bit 415 B 0 MDH19 436 0 Z
+bit 414 B 0 MDH20 436 0 Z
+bit 413 B 0 MDH21 436 0 Z
+bit 412 B 0 MDH22 436 0 Z
+bit 411 B 0 MDH23 436 0 Z
+bit 410 B 0 MDH24 436 0 Z
+bit 409 B 0 MDH25 436 0 Z
+bit 408 B 0 MDH26 436 0 Z
+bit 407 B 0 MDH27 436 0 Z
+bit 406 B 0 MDH28 436 0 Z
+bit 405 B 0 MDH29 436 0 Z
+bit 404 B 0 MDH30 436 0 Z
+bit 403 B 0 MDH31 436 0 Z
+bit 402 B 0 nFOE 223 0 Z
+bit 401 C 0 .
+bit 400 O 0 nRCS1 224 0 Z
+bit 399 B 0 nRCS0 223 0 Z
+bit 398 O 0 SDRAM_CLK0 397 0 Z
+bit 397 C 0 .
+bit 396 O 0 SDRAM_CLK2 395 0 Z
+bit 395 C 0 .
+bit 394 O 0 SDRAM_CLK3 393 0 Z
+bit 393 C 0 .
+bit 392 B 0 CKE 401 0 Z
+bit 391 O 0 SDBA0 224 0 Z
+bit 390 X ? .
+bit 389 X ? .
+bit 388 X ? .
+bit 387 X ? .
+bit 386 X ? .
+bit 385 X ? .
+bit 384 X ? .
+bit 383 X ? .
+bit 382 X ? .
+bit 381 X ? .
+bit 380 X ? .
+bit 379 X ? .
+bit 378 X ? .
+bit 377 X ? .
+bit 376 X ? .
+bit 375 X ? .
+bit 374 X ? .
+bit 373 X ? .
+bit 372 X ? .
+bit 371 X ? .
+bit 370 X ? .
+bit 369 X ? .
+bit 368 X ? .
+bit 367 X ? .
+bit 366 X ? .
+bit 365 X ? .
+bit 364 X ? .
+bit 363 X ? .
+bit 362 X ? .
+bit 361 X ? .
+bit 360 X ? .
+bit 359 X ? .
+bit 358 C 0 .
+bit 357 B 0 MDL0 358 0 Z
+bit 356 B 0 MDL1 358 0 Z
+bit 355 B 0 MDL2 358 0 Z
+bit 354 B 0 MDL3 358 0 Z
+bit 353 B 0 MDL4 358 0 Z
+bit 352 B 0 MDL5 358 0 Z
+bit 351 B 0 MDL6 358 0 Z
+bit 350 B 0 MDL7 358 0 Z
+bit 349 B 0 MDL8 358 0 Z
+bit 348 B 0 MDL9 358 0 Z
+bit 347 B 0 MDL10 358 0 Z
+bit 346 B 0 MDL11 358 0 Z
+bit 345 B 0 MDL12 358 0 Z
+bit 344 B 0 MDL13 358 0 Z
+bit 343 B 0 MDL14 358 0 Z
+bit 342 B 0 MDL15 358 0 Z
+bit 341 B 0 MDL16 358 0 Z
+bit 340 B 0 MDL17 358 0 Z
+bit 339 B 0 MDL18 358 0 Z
+bit 338 B 0 MDL19 358 0 Z
+bit 337 B 0 MDL20 358 0 Z
+bit 336 B 0 MDL21 358 0 Z
+bit 335 B 0 MDL22 358 0 Z
+bit 334 B 0 MDL23 358 0 Z
+bit 333 B 0 MDL24 358 0 Z
+bit 332 B 0 MDL25 358 0 Z
+bit 331 B 0 MDL26 358 0 Z
+bit 330 B 0 MDL27 358 0 Z
+bit 329 B 0 MDL28 358 0 Z
+bit 328 B 0 MDL29 358 0 Z
+bit 327 B 0 MDL30 358 0 Z
+bit 326 B 0 MDL31 358 0 Z
+bit 325 B 0 SDMA0 223 0 Z
+bit 324 B 0 SDMA1 223 0 Z
+bit 323 O 0 SDMA2 224 0 Z
+bit 322 O 0 SDMA3 224 0 Z
+bit 321 O 0 SDMA4 224 0 Z
+bit 320 O 0 SDMA5 224 0 Z
+bit 319 O 0 SDMA6 224 0 Z
+bit 318 O 0 SDMA7 224 0 Z
+bit 317 O 0 SDMA8 224 0 Z
+bit 316 O 0 SDMA9 224 0 Z
+bit 315 O 0 SDMA10 224 0 Z
+bit 314 O 0 SDMA11 224 0 Z
+bit 313 X ? .
+bit 312 X ? .
+bit 311 X ? .
+bit 310 O 0 SDBA1 224 0 Z
+bit 309 B 0 PAR 299 0 Z
+bit 308 C 0 .
+bit 307 O 0 SDRAM_CLK1 308 0 Z
+bit 306 X ? .
+bit 305 X ? .
+bit 304 O 0 DQM2 224 0 Z
+bit 303 O 0 DQM5 224 0 Z
+bit 302 O 0 DQM4 224 0 Z
+bit 301 O 0 DQM3 224 0 Z
+bit 300 X ? .
+bit 299 C 0 .
+bit 298 C 0 .
+bit 297 C 0 .
+bit 296 C 0 .
+bit 295 X ? .
+bit 294 X ? .
+bit 293 X ? .
+bit 292 X ? .
+bit 291 B 0 nTRDY 296 0 Z
+bit 290 X ? .
+bit 289 B 0 nGNT4 223 0 Z
+bit 288 O 0 nGNT2 223 0 Z
+bit 287 X ? .
+bit 286 X ? .
+bit 285 X ? .
+bit 284 X ? .
+bit 283 X ? .
+bit 282 O 0 nCS2 224 0 Z
+bit 281 O 0 nCS0 224 0 Z
+bit 280 O 0 nCS1 224 0 Z
+bit 279 X ? .
+bit 278 X ? .
+bit 277 X ? .
+bit 276 C 0 .
+bit 275 B 0 nINTA 276 0 Z
+bit 274 X ? .
+bit 273 B 0 nSRESET 131 0 Z
+bit 272 B 0 nQACK 223 0 Z
+bit 271 X ? .
+bit 270 X ? .
+bit 269 X ? .
+bit 268 X ? .
+bit 267 X ? .
+bit 266 X ? .
+bit 265 X ? .
+bit 264 X ? .
+bit 263 X ? .
+bit 262 X ? .
+bit 261 X ? .
+bit 260 X ? .
+bit 259 X ? .
+bit 258 X ? .
+bit 257 X ? .
+bit 256 X ? .
+bit 255 X ? .
+bit 254 X ? .
+bit 253 X ? .
+bit 252 X ? .
+bit 251 C 0 .
+bit 250 X ? .
+bit 249 C 0 .
+bit 248 X ? .
+bit 247 X ? .
+bit 246 X ? .
+bit 245 X ? .
+bit 244 X ? .
+bit 243 X ? .
+bit 242 X ? .
+bit 241 X ? .
+bit 240 X ? .
+bit 239 X ? .
+bit 238 X ? .
+bit 237 X ? .
+bit 236 X ? .
+bit 235 O 0 nCS4 224 0 Z
+bit 234 O 0 nCS5 224 0 Z
+bit 233 O 0 DQM0 224 0 Z
+bit 232 O 0 DQM6 224 0 Z
+bit 231 O 0 DQM1 224 0 Z
+bit 230 O 0 DQM7 224 0 Z
+bit 229 X ? .
+bit 228 X ? .
+bit 227 X ? .
+bit 226 X ? .
+bit 225 X ? .
+bit 224 C 0 .
+bit 223 C 0 .
+bit 222 C 0 .
+bit 221 O 0 nGNT1 223 0 Z
+bit 220 X ? .
+bit 219 C 0 .
+bit 218 O 0 nCS6 224 0 Z
+bit 217 O 0 nCS7 224 0 Z
+bit 216 O 0 nSDRAS 224 0 Z
+bit 215 O 0 nCS3 224 0 Z
+bit 214 O 0 nAS 223 0 Z
+bit 213 X ? .
+bit 212 I ? RTC
+bit 211 O 0 TRIG_OUT 219 0 Z
+bit 210 B 0 TBEN 130 0 Z
+bit 209 X ? .
+bit 208 X ? .
+bit 207 O 0 nGNT3 223 0 Z
+bit 206 O 0 nGNT0 223 0 Z
+bit 205 O 0 CKO 249 0 Z
+bit 204 O 0 nWE 224 0 Z
+bit 203 C 0 .
+bit 202 C 0 .
+bit 201 C 0 .
+bit 200 C 0 .
+bit 199 C 0 .
+bit 198 C 0 .
+bit 197 O 0 PCI_CLK4 203 0 Z
+bit 196 O 0 PCI_SYNC_OUT 202 0 Z
+bit 195 B 0 PCI_CLK3 200 0 Z
+bit 194 O 0 PCI_CLK2 201 0 Z
+bit 193 B 0 PCI_CLK1 198 0 Z
+bit 192 O 0 PCI_CLK0 199 0 Z
+bit 191 C 0 .
+bit 190 X ? .
+bit 189 C 0 .
+bit 188 C 0 .
+bit 187 C 0 .
+bit 186 C 0 .
+bit 185 B 0 TRIG_IN 130 0 Z
+bit 184 B 0 nCHKSTOP_IN 131 0 Z
+bit 183 X ? .
+bit 182 X ? .
+bit 181 X ? .
+bit 180 X ? .
+bit 179 X ? .
+bit 178 X ? .
+bit 177 X ? .
+bit 176 X ? .
+bit 175 X ? .
+bit 174 X ? .
+bit 173 X ? .
+bit 172 X ? .
+bit 171 X ? .
+bit 170 X ? .
+bit 169 X ? .
+bit 168 O 0 nSDCAS 224 0 Z
+bit 167 X ? .
+bit 166 X ? .
+bit 165 X ? .
+bit 164 X ? .
+bit 163 X ? .
+bit 162 B 0 MAA2 223 0 Z
+bit 161 X ? .
+bit 160 X ? .
+bit 159 X ? .
+bit 158 X ? .
+bit 157 X ? .
+bit 156 X ? .
+bit 155 O 0 DA15 223 0 Z
+bit 154 X ? .
+bit 153 O 0 DA14 223 0 Z
+bit 152 O 0 DA11 223 0 Z
+bit 151 O 0 DA13 223 0 Z
+bit 150 O 0 DA2 223 0 Z
+bit 149 O 0 DA12 223 0 Z
+bit 148 X ? .
+bit 147 X ? .
+bit 146 X ? .
+bit 145 X ? .
+bit 144 X ? .
+bit 143 X ? .
+bit 142 X ? .
+bit 141 X ? .
+bit 140 X ? .
+bit 139 X ? .
+bit 138 X ? .
+bit 137 X ? .
+bit 136 X ? .
+bit 135 X ? .
+bit 134 X ? .
+bit 133 C 0 .
+bit 132 C 0 .
+bit 131 C 0 .
+bit 130 C 0 .
+bit 129 X ? .
+bit 128 X ? .
+bit 127 X ? .
+bit 126 X ? .
+bit 125 X ? .
+bit 124 X ? .
+bit 123 X ? .
+bit 122 X ? .
+bit 121 X ? .
+bit 120 X ? .
+bit 119 X ? .
+bit 118 X ? .
+bit 117 X ? .
+bit 116 X ? .
+bit 115 X ? .
+bit 114 X ? .
+bit 113 X ? .
+bit 112 X ? .
+bit 111 X ? .
+bit 110 B 0 AD11 21 0 Z
+bit 109 B 0 AD10 21 0 Z
+bit 108 B 0 AD9 21 0 Z
+bit 107 B 0 AD8 21 0 Z
+bit 106 B 0 AD7 21 0 Z
+bit 105 B 0 AD6 21 0 Z
+bit 104 B 0 AD5 21 0 Z
+bit 103 B 0 AD4 21 0 Z
+bit 102 B 0 AD3 21 0 Z
+bit 101 B 0 AD2 21 0 Z
+bit 100 B 0 AD1 21 0 Z
+bit 99 B 0 AD0 21 0 Z
+bit 98 X ? .
+bit 97 X ? .
+bit 96 X ? .
+bit 95 X ? .
+bit 94 X ? .
+bit 93 X ? .
+bit 92 X ? .
+bit 91 X ? .
+bit 90 X ? .
+bit 89 X ? .
+bit 88 X ? .
+bit 87 X ? .
+bit 86 X ? .
+bit 85 X ? .
+bit 84 X ? .
+bit 83 X ? .
+bit 82 X ? .
+bit 81 X ? .
+bit 80 X ? .
+bit 79 X ? .
+bit 78 X ? .
+bit 77 X ? .
+bit 76 X ? .
+bit 75 X ? .
+bit 74 X ? .
+bit 73 X ? .
+bit 72 X ? .
+bit 71 X ? .
+bit 70 X ? .
+bit 69 X ? .
+bit 68 X ? .
+bit 67 X ? .
+bit 66 X ? .
+bit 65 B 0 nFRAME 297 0 Z
+bit 64 B 0 nC/BE3 298 0 Z
+bit 63 B 0 nC/BE2 298 0 Z
+bit 62 B 0 nC/BE1 298 0 Z
+bit 61 B 0 nDEVSEL 186 0 Z
+bit 60 B 0 nPERR 187 0 Z
+bit 59 B 0 nSTOP 54 0 Z
+bit 58 I ? nLOCK
+bit 57 X ? .
+bit 56 C 0 .
+bit 55 B 0 nIRDY 56 0 Z
+bit 54 C 0 .
+bit 53 X ? .
+bit 52 X ? .
+bit 51 B 0 MAA1 223 0 Z
+bit 50 B 0 PMAA0 223 0 Z
+bit 49 B 0 PMAA1 223 0 Z
+bit 48 B 0 PMAA2 223 0 Z
+bit 47 B 0 MAA0 223 0 Z
+bit 46 X ? .
+bit 45 I ? OSC_IN
+bit 44 C 0 .
+bit 43 C 0 .
+bit 42 B 0 SCL 44 0 Z
+bit 41 B 0 SDA 43 0 Z
+bit 40 B 0 IRQ2 39 0 Z
+bit 39 C 0 .
+bit 38 C 0 .
+bit 37 B 0 IRQ3 38 0 Z
+bit 36 I ? PCI_SYNC_IN
+bit 35 X ? .
+bit 34 X ? .
+bit 33 X ? .
+bit 32 I ? nSMI
+bit 31 X ? .
+bit 30 X ? .
+bit 29 X ? .
+bit 28 I ? IDSEL
+bit 27 I ? nREQ0
+bit 26 I ? nREQ1
+bit 25 I ? nREQ2
+bit 24 I ? nREQ3
+bit 23 B 0 nREQ4 132 0 Z
+bit 22 B 0 nSERR 191 0 Z
+bit 21 C 0 .
+bit 20 X ? .
+bit 19 B 0 AD16 21 0 Z
+bit 18 B 0 AD17 21 0 Z
+bit 17 B 0 AD18 21 0 Z
+bit 16 B 0 AD19 21 0 Z
+bit 15 B 0 AD20 21 0 Z
+bit 14 B 0 AD21 21 0 Z
+bit 13 B 0 AD22 21 0 Z
+bit 12 B 0 AD23 21 0 Z
+bit 11 B 0 AD24 21 0 Z
+bit 10 B 0 AD25 21 0 Z
+bit 9 B 0 AD26 21 0 Z
+bit 8 B 0 AD27 21 0 Z
+bit 7 B 0 AD28 21 0 Z
+bit 6 B 0 AD29 21 0 Z
+bit 5 B 0 AD30 21 0 Z
+bit 4 B 0 AD31 21 0 Z
+bit 3 B 0 AD15 21 0 Z
+bit 2 B 0 AD14 21 0 Z
+bit 1 B 0 AD13 21 0 Z
+bit 0 B 0 AD12 21 0 Z
+
+initbus mpc824x
--- /dev/null
+#
+# $Id$
+#
+# Copyright (C) 2002 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Marcel Telka <marcel@telka.sk>, 2002.
+#
+
+# bits 27-12 of the Device Identification Register
+0100100010001001 xcr3128xl-vq100 XCR3128XL-VQ100
+0100100010001100 xcr3128xl-cs144 XCR3128XL-CS144
--- /dev/null
+#
+# $Id$
+#
+# Copyright (C) 2002 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Marcel Telka <marcel@telka.sk>, 2002.
+#
+
+# bits 31-28 of the Device Identification Register
+0000 xcr3128xl-cs144 0
--- /dev/null
+#
+# $Id$
+#
+# Copyright (C) 2003 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Marcel Telka <marcel@telka.sk>, 2003.
+#
+
+# This part is same as Xilinx XCR3128XL-CS144
+include xilinx/xcr3128xl-cs144/xcr3128xl-cs144
--- /dev/null
+#
+# $Id$
+#
+# Copyright (C) 2002 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Marcel Telka <marcel@telka.sk>, 2002.
+#
+
+# bits 31-28 of the Device Identification Register
+0000 xcr3128xl-vq100 0
--- /dev/null
+#
+# $Id$
+#
+# Copyright (C) 2003 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Marcel Telka <marcel@telka.sk>, 2003.
+#
+
+# This part is same as Xilinx XCR3128XL-VQ100
+include xilinx/xcr3128xl-vq100/xcr3128xl-vq100
--- /dev/null
+#
+# $Id$
+#
+# JTAG declarations for Samsung S3C4510B
+# Copyright (C) 2003 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Jiun-Shian Ho <asky@syncom.com.tw>, 2003.
+#
+# Documentation:
+# [1] Samsung Electronics Co., Ltd., "S3C4510B 32-Bit RISC Microcontroller
+# User's Manual", Revision 1, August 2000,
+# Order Number: 21-S3-C4510B-082000
+#
+
+# see Table A-2 or BSDL file (Page: A-13 ~ A-15) in [1]
+signal nUADTR1 3
+signal UATXD1 4
+signal nUADSR1 5
+signal nDTRA 6
+signal RXDA 7
+signal nRTSA 8
+signal TXDA 9
+signal nCTSA 10
+signal nDCDA 13
+signal RXCA 14
+signal nSYNCA 15
+signal TXCA 16
+signal nDTRB 17
+signal RXDB 18
+signal nRTSB 19
+signal TXDB 20
+signal nCTSB 23
+signal nDCDB 24
+signal RXCB 25
+signal nSYNCB 26
+signal TXCB 27
+signal CRS_CRS_10M 28
+signal RX_DV_LINK10 29
+signal RXD0_RXD_10M 30
+signal RXD1 33
+signal RXD2 34
+signal RXD3 35
+signal RX_ERR 36
+signal RX_CLK_RXCLK_10M 37
+signal COL_COL_10M 38
+signal TXD0_TXD_10M 39
+signal TXD1_LOOP10 40
+signal TXD2 43
+signal TXD3 44
+signal TX_ERR_PCOMP_10M 45
+signal TX_CLK_TXCLK_10M 46
+signal TX_EN_TXEN_10M 47
+signal MDIO 48
+signal LITTLE 49
+signal MDC 50
+signal TCK 58
+signal TMS 59
+signal TDI 60
+signal TDO 61
+signal nTRST 62
+signal TMODE 63
+signal UCLK 64
+signal nECS0 67
+signal nECS1 68
+signal nECS2 69
+signal nECS3 70
+signal nEWAIT 71
+signal nOE 72
+signal B0SIZE0 73
+signal B0SIZE1 74
+signal CLKOEN 76
+signal MCLK 80
+signal nRESET 82
+signal CLKSEL 83 # PCLKSEL vs. CLKSEL ?
+signal nRCS0 75
+signal nRCS1 84
+signal nRCS2 85
+signal nRCS3 86
+signal nRCS4 87
+signal nRCS5 88
+signal nRAS0 89
+signal nRAS1 90
+signal nRAS2 91
+signal nRAS3 94
+signal nCAS0 95
+signal nCAS1 96
+signal nCAS2 97
+signal nCAS3 98
+signal nDWE 99
+signal nWBE0 100
+signal nWBE1 101
+signal nWBE2 102
+signal nWBE3 107
+signal ExtMREQ 108
+signal ExtMACK 109
+signal ADDR0 110
+signal ADDR1 111
+signal ADDR2 112
+signal ADDR3 113
+signal ADDR4 114
+signal ADDR5 115
+signal ADDR6 116
+signal ADDR7 117
+signal ADDR8 120
+signal ADDR9 121
+signal ADDR10 122
+signal ADDR11 123
+signal ADDR12 124
+signal ADDR13 125
+signal ADDR14 126
+signal ADDR15 127
+signal ADDR16 128
+signal ADDR17 129
+signal ADDR18 132
+signal ADDR19 133
+signal ADDR20 134
+signal ADDR21 135
+signal XDATA0 136
+signal XDATA1 137
+signal XDATA2 138
+signal XDATA3 139
+signal XDATA4 140
+signal XDATA5 141
+signal XDATA6 144
+signal XDATA7 145
+signal XDATA8 146
+signal XDATA9 147
+signal XDATA10 148
+signal XDATA11 149
+signal XDATA12 150
+signal XDATA13 151
+signal XDATA14 152
+signal XDATA15 153
+signal XDATA16 154
+signal XDATA17 159
+signal XDATA18 160
+signal XDATA19 161
+signal XDATA20 162
+signal XDATA21 163
+signal XDATA22 164
+signal XDATA23 165
+signal XDATA24 166
+signal XDATA25 169
+signal XDATA26 170
+signal XDATA27 171
+signal XDATA28 172
+signal XDATA29 173
+signal XDATA30 174
+signal XDATA31 175
+signal P0 176
+signal P1 179
+signal P2 180
+signal P3 181
+signal P4 182
+signal P5 183
+signal P6 184
+signal P7 185
+signal P8 186
+signal P9 189
+signal P10 190
+signal P11 191
+signal P12 192
+signal P13 193
+signal P14 194
+signal P15 195
+signal P16 196
+signal P17 199
+signal SCL 200
+signal SDA 201
+signal UARXD0 202
+signal nUADTR0 203
+signal UATXD0 204
+signal nUADSR0 205
+signal UARXD1 206
+signal VDDP 1 21 41 53 78 103 118 142 157 177 197
+signal VDDI 11 31 51 65 92 105 130 155 167 187 207
+signal VSSP 2 22 42 54 79 93 106 131 156 168 188 208
+signal VSSI 12 32 52 66 81 104 119 143 158 178 198
+
+# mandatory data registers
+register BSR 233 # Boundary Scan Register (see Appendix-A (Page A-16) in [1])
+register BR 1 # Bypass Register
+# optional data registers
+register DIR 32 # Device Identification Register
+
+register SCAN 4 # Select scan channel for ARM
+
+# Appendix-A (Page A-16) in [1]
+instruction length 4
+
+# see Table A-6 in [1]
+# mandatory instructions
+instruction EXTEST 0000 BSR
+instruction SAMPLE/PRELOAD 0011 BSR
+instruction BYPASS 1111 BR
+
+# optional instructions
+instruction HIGHZ 0111 BR
+instruction IDCODE 1110 DIR
+instruction INTEST 1100 BSR
+instruction CLAMP 0101 BR
+
+instruction CLAMPZ 1001 BR
+instruction RESTART 0100 BR
+instruction SCAN_N 0010 SCAN
+
+# see Table A-2 or BSDL file (Page: A-16 ~ A-23) in [1]
+bit 232 I ? nUADTR1
+bit 231 O ? UATXD1
+bit 230 O ? nUADSR1
+bit 229 O ? nDTRA
+bit 228 I ? RXDA
+bit 227 O ? nRTSA
+bit 226 O ? TXDA
+bit 225 I ? nCTSA
+bit 224 I ? nDCDA
+bit 223 I ? RXCA
+bit 222 O ? nSYNCA
+bit 221 I ? TXCA
+bit 220 O ? TXCA 219 1 Z
+bit 219 C 1 TXCA
+bit 218 O ? nDTRB
+bit 217 I ? RXDB
+bit 216 O ? nRTSB
+bit 215 O ? TXDB
+bit 214 I ? nCTSB
+bit 213 I ? nDCDB
+bit 212 I ? RXCB
+bit 211 O ? nSYNCB
+bit 210 I ? TXCB
+bit 209 O ? TXCB 208 1 Z
+bit 208 C 1 TXCB
+bit 207 I ? CRS_CRS_10M
+bit 206 I ? RX_DV_LINK10
+bit 205 I ? RXD0_RXD_10M
+bit 204 I ? RXD1
+bit 203 I ? RXD2
+bit 202 I ? RXD3
+bit 201 I ? RX_ERR
+bit 200 I ? RX_CLK_RXCLK_10M
+bit 199 I ? COL_COL_10M
+bit 198 O ? TXD0_TXD_10M
+bit 197 O ? TXD1_LOOP10
+bit 196 O ? TXD2
+bit 195 O ? TXD3
+bit 194 O ? TX_ERR_PCOMP_10M
+bit 193 I ? TX_CLK_TXCLK_10M
+bit 192 O ? TX_EN_TXEN_10M
+bit 191 I ? MDIO
+bit 190 O ? MDIO 189 1 Z
+bit 189 C 1 MDIO
+bit 188 I ? LITTLE
+bit 187 O ? MDC
+bit 186 I ? TMODE
+bit 185 I ? UCLK
+bit 184 C 1 .
+bit 183 O ? nECS0 184 1 Z
+bit 182 O ? nECS1 184 1 Z
+bit 181 O ? nECS2 184 1 Z
+bit 180 O ? nECS3 184 1 Z
+bit 179 I ? nEWAIT
+bit 178 O ? nOE 184 1 Z
+bit 177 I ? B0SIZE0
+bit 176 I ? B0SIZE1
+bit 175 O ? nRCS0 184 1 Z
+bit 174 I ? CLKOEN
+bit 173 O ? MCLKO
+bit 172 I ? MCLK
+bit 171 I ? nRESET
+bit 170 I ? CLKSEL
+bit 169 O ? nRCS1 184 1 Z
+bit 168 O ? nRCS2 184 1 Z
+bit 167 O ? nRCS3 184 1 Z
+bit 166 O ? nRCS4 184 1 Z
+bit 165 O ? nRCS5 184 1 Z
+bit 164 O ? nRAS0 184 1 Z
+bit 163 O ? nRAS1 184 1 Z
+bit 162 O ? nRAS2 184 1 Z
+bit 161 O ? nRAS3 184 1 Z
+bit 160 O ? nCAS0 184 1 Z
+bit 159 O ? nCAS1 184 1 Z
+bit 158 O ? nCAS2 184 1 Z
+bit 157 O ? nCAS3 184 1 Z
+bit 156 O ? nDWE 184 1 Z
+bit 155 O ? nWBE0 184 1 Z
+bit 154 O ? nWBE1 184 1 Z
+bit 153 O ? nWBE2 184 1 Z
+bit 152 O ? nWBE3 184 1 Z
+bit 151 I ? ExtMREQ
+bit 150 O ? ExtMACK
+bit 149 O ? ADDR0 184 1 Z
+bit 148 O ? ADDR1 184 1 Z
+bit 147 O ? ADDR2 184 1 Z
+bit 146 O ? ADDR3 184 1 Z
+bit 145 O ? ADDR4 184 1 Z
+bit 144 O ? ADDR5 184 1 Z
+bit 143 O ? ADDR6 184 1 Z
+bit 142 O ? ADDR7 184 1 Z
+bit 141 O ? ADDR8 184 1 Z
+bit 140 O ? ADDR9 184 1 Z
+bit 139 O ? ADDR10 184 1 Z
+bit 138 O ? ADDR11 184 1 Z
+bit 137 O ? ADDR12 184 1 Z
+bit 136 O ? ADDR13 184 1 Z
+bit 135 O ? ADDR14 184 1 Z
+bit 134 O ? ADDR15 184 1 Z
+bit 133 O ? ADDR16 184 1 Z
+bit 132 O ? ADDR17 184 1 Z
+bit 131 O ? ADDR18 184 1 Z
+bit 130 O ? ADDR19 184 1 Z
+bit 129 O ? ADDR20 184 1 Z
+bit 128 O ? ADDR21 184 1 Z
+bit 127 C 1 .
+bit 126 I ? XDATA0
+bit 125 O ? XDATA0 127 1 Z
+bit 124 I ? XDATA1
+bit 123 O ? XDATA1 127 1 Z
+bit 122 I ? XDATA2
+bit 121 O ? XDATA2 127 1 Z
+bit 120 I ? XDATA3
+bit 119 O ? XDATA3 127 1 Z
+bit 118 I ? XDATA4
+bit 117 O ? XDATA4 127 1 Z
+bit 116 I ? XDATA5
+bit 115 O ? XDATA5 127 1 Z
+bit 114 I ? XDATA6
+bit 113 O ? XDATA6 127 1 Z
+bit 112 I ? XDATA7
+bit 111 O ? XDATA7 127 1 Z
+bit 110 I ? XDATA8
+bit 109 O ? XDATA8 127 1 Z
+bit 108 I ? XDATA9
+bit 107 O ? XDATA9 127 1 Z
+bit 106 I ? XDATA10
+bit 105 O ? XDATA10 127 1 Z
+bit 104 I ? XDATA11
+bit 103 O ? XDATA11 127 1 Z
+bit 102 I ? XDATA12
+bit 101 O ? XDATA12 127 1 Z
+bit 100 I ? XDATA13
+bit 99 O ? XDATA13 127 1 Z
+bit 98 I ? XDATA14
+bit 97 O ? XDATA14 127 1 Z
+bit 96 I ? XDATA15
+bit 95 O ? XDATA15 127 1 Z
+bit 94 I ? XDATA16
+bit 93 O ? XDATA16 127 1 Z
+bit 92 I ? XDATA17
+bit 91 O ? XDATA17 127 1 Z
+bit 90 I ? XDATA18
+bit 89 O ? XDATA18 127 1 Z
+bit 88 I ? XDATA19
+bit 87 O ? XDATA19 127 1 Z
+bit 86 I ? XDATA20
+bit 85 O ? XDATA20 127 1 Z
+bit 84 I ? XDATA21
+bit 83 O ? XDATA21 127 1 Z
+bit 82 I ? XDATA22
+bit 81 O ? XDATA22 127 1 Z
+bit 80 I ? XDATA23
+bit 79 O ? XDATA23 127 1 Z
+bit 78 I ? XDATA24
+bit 77 O ? XDATA24 127 1 Z
+bit 76 I ? XDATA25
+bit 75 O ? XDATA25 127 1 Z
+bit 74 I ? XDATA26
+bit 73 O ? XDATA26 127 1 Z
+bit 72 I ? XDATA27
+bit 71 O ? XDATA27 127 1 Z
+bit 70 I ? XDATA28
+bit 69 O ? XDATA28 127 1 Z
+bit 68 I ? XDATA29
+bit 67 O ? XDATA29 127 1 Z
+bit 66 I ? XDATA30
+bit 65 O ? XDATA30 127 1 Z
+bit 64 I ? XDATA31
+bit 63 O ? XDATA31 127 1 Z
+bit 62 I ? P0
+bit 61 O ? P0 60 1 Z
+bit 60 C 1 P0
+bit 59 I ? P1
+bit 58 O ? P1 57 1 Z
+bit 57 C 1 P1
+bit 56 I ? P2
+bit 55 O ? P2 54 1 Z
+bit 54 C 1 P2
+bit 53 I ? P3
+bit 52 O ? P3 51 1 Z
+bit 51 C 1 P3
+bit 50 I ? P4
+bit 49 O ? P4 48 1 Z
+bit 48 C 1 P4
+bit 47 I ? P5
+bit 46 O ? P5 45 1 Z
+bit 45 C 1 P5
+bit 44 I ? P6
+bit 43 O ? P6 42 1 Z
+bit 42 C 1 P6
+bit 41 I ? P7
+bit 40 O ? P7 39 1 Z
+bit 39 C 1 P7
+bit 38 I ? P8
+bit 37 O ? P8 36 1 Z
+bit 36 C 1 P8
+bit 35 I ? P9
+bit 34 O ? P9 33 1 Z
+bit 33 C 1 P9
+bit 32 I ? P10
+bit 31 O ? P10 30 1 Z
+bit 30 C 1 P10
+bit 29 I ? P11
+bit 28 O ? P11 27 1 Z
+bit 27 C 1 P11
+bit 26 I ? P12
+bit 25 O ? P12 24 1 Z
+bit 24 C 1 P12
+bit 23 I ? P13
+bit 22 O ? P13 21 1 Z
+bit 21 C 1 P13
+bit 20 I ? P14
+bit 19 O ? P14 18 1 Z
+bit 18 C 1 P14
+bit 17 I ? P15
+bit 16 O ? P15 15 1 Z
+bit 15 C 1 P15
+bit 14 I ? P16
+bit 13 O ? P16 12 1 Z
+bit 12 C 1 P16
+bit 11 I ? P17
+bit 10 O ? P17 9 1 Z
+bit 9 C 1 P17
+bit 8 I 0 SCL
+bit 7 O 1 SCL 7 1 Z
+bit 6 I ? SDA
+bit 5 O 1 SDA 5 1 Z
+bit 4 I ? UARXD0
+bit 3 I ? nUADTR0
+bit 2 O ? UATXD0
+bit 1 O ? nUADSR0
+bit 0 I ? UARXD1
+
+initbus s3c4510x
--- /dev/null
+#
+# $Id$
+#
+# Copyright (C) 2004 IDK Chemnitz GmbH
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Marko Roessler <marko.roessler@indakom.de> , 2004.
+#
+# bits 27-12 of the Device Identification Register
+0000100100100010 lh7a400 LH7A400
--- /dev/null
+#
+# $Id$
+#
+# Copyright (C) 2004 IDK Chemnitz GmbH
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Marko Roessler <marko.roessler@indakom.de>, 2004.
+#
+# bits 31-28 of the Device Identification Register
+0000 lh7a400 A
--- /dev/null
+#
+# $Id$
+#
+# Copyright (C) 2004 IDK Chemnitz GmbH
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Marko Roessler <marko.roessler@indakom.de> , 2004.
+#
+
+# mandatory data registers
+register BSR 507
+register BR 1
+register IR 4
+register DIR 32
+
+# see page 250 in [1]
+instruction length 4
+# mandatory instructions
+instruction EXTEST 0000 BSR #
+instruction SCAN_N 0010 BSR # choose chain
+instruction INTEST 1100 BSR #
+instruction IDCODE 1110 DIR #
+instruction BYPASS 1111 BR #
+instruction CLAMP 0101 BSR #
+instruction HIGHZ 0111 BSR #
+instruction CLAMPZ 1001 BSR #
+instruction SAMPLE/PRELOAD 0011 BSR #
+
+
+
+signal CS6 B10
+signal CS7 C10
+signal nCS3 M12
+signal nCS2 P13
+signal nCS1 K10
+signal nCS0 K11
+signal nWE3 D10
+signal OSCEN P14
+signal PA7 L3
+signal PA6 L2
+signal PA5 L1
+signal PA4 K5
+signal PA3 K3
+signal PA2 K2
+signal PA1 K1
+signal PA0 J5
+signal PB7 N3
+signal PB6 N2
+signal PB5 N1
+signal PB4 M4
+signal PB3 M2
+signal PB2 L7
+signal PB1 L5
+signal PB0 L4
+signal PC7 R2
+signal PC6 T2
+signal PC5 T1
+signal PC4 L8
+signal PC3 K6
+signal PC2 R1
+signal PC1 P2
+signal PC0 P1
+signal PD7 R10
+signal PD6 P10
+signal PD5 T9
+signal PD4 R9
+signal PD3 N11
+signal PD2 K8
+signal PD1 L11
+signal PD0 M11
+signal PE3 M10
+signal PE2 M9
+signal PE1 N10
+signal PE0 L10
+signal PF7 C5
+signal PF6 E6
+signal PF5 D6
+signal PF4 B5
+signal PF3 H8
+signal PF2 C6
+signal PF1 B6
+signal PF0 A6
+signal PG7 N4
+signal PG6 M8
+signal PG5 M7
+signal PG4 N6
+signal PG3 M6
+signal PG2 L6
+signal PG1 T3
+signal PG0 R3
+signal PH7 T5
+signal PH6 R5
+signal PH5 P5
+signal PH4 P8
+signal PH3 N7
+signal PH2 T4
+signal PH1 R4
+signal PH0 P4
+signal IRTX2 F2
+signal IRRX2 F3
+signal UARTTXD2 F4
+signal UARTRXD2 J7
+signal UARTCTS2 E2
+signal UARTDCD2 E3
+signal UARTDSR2 E5
+signal XTAL32OUT P15
+signal XTAL32IN P16
+signal AC97IN A4
+signal AC97CLK C4
+signal AC97OUT D5
+signal AC97SYNC B4
+signal SSPRX J1
+signal SSPFRM J3
+signal SSPTX J2
+signal SSPCLK H4
+signal PGMCLK J6
+signal PWM1 B7
+signal PWM0 C7
+signal PWMEN1 D7
+signal PWMEN0 E7
+signal COL7 H2
+signal COL6 H1
+signal COL5 G5
+signal COL4 G4
+signal COL3 G2
+signal COL2 G1
+signal COL1 F5
+signal COL0 F6
+signal BUZ H3
+signal D31 D11
+signal D30 B11
+signal D29 B12
+signal D28 G10
+signal D27 E12
+signal D26 C13
+signal D25 B13
+signal D24 A14
+signal D23 A16
+signal D22 F10
+signal D21 D14
+signal D20 H10
+signal D19 D16
+signal D18 E14
+signal D17 F12
+signal D16 F15
+signal D15 G12
+signal D14 G11
+signal D13 G15
+signal D12 H13
+signal D11 H15
+signal D10 J10
+signal D9 J13
+signal D8 J15
+signal D7 K12
+signal D6 H11
+signal D5 L14
+signal D4 L15
+signal D3 L16
+signal D2 N13
+signal D1 M15
+signal D0 L12
+signal A27 A8
+signal A26 F8
+signal A25 G8
+signal A24 A13
+signal A23 A15
+signal A22 B16
+signal A21 C16
+signal A20 D15
+signal A19 F11
+signal A18 E13
+signal A17 E16
+signal A16 F14
+signal A15 F16
+signal A14 G13
+signal A13 G14
+signal A12 G16
+signal A11 H14
+signal A10 H16
+signal A9 J9
+signal A8 J14
+signal A7 J16
+signal A6 J8
+signal A5 K14
+signal A4 K15
+signal A3 K16
+signal A2 M13
+signal A1 N14
+signal A0 M16
+signal nBATCHG D2
+signal nEXTPWR C2
+signal BATOK D1
+signal nPOR D3
+signal MEDCHG C3
+signal XTALIN R13
+signal XTALOUT T13
+signal nURESET H6
+signal WAKEUP D4
+signal nPWRFL E4
+signal LCDLP R8
+signal LCDDCLK N9
+signal LCDFP R6
+signal LCDM P9
+signal LCDVD3 N8
+signal LCDVD2 T7
+signal LCDVD1 R7
+signal LCDVD0 P7
+signal nRAS F9
+signal nCAS C11
+signal nSWE C12
+signal nSCS3 A12
+signal nSCS2 E11
+signal nSCS1 D13
+signal nSCS0 C14
+signal SCLK A10
+signal SCKEN3 G9
+signal DQM0 A9
+signal DQM1 B9
+signal DQM2 D9
+signal DQM3 E9
+signal nWE0 C8
+signal nOE D8
+signal MMCCLK A3
+signal MMCCMD B3
+signal MMCDATA A2
+signal nTEST1 R15
+signal nTEST0 T12
+signal WIDTH1 R12
+signal WIDTH0 P11
+signal USBDP T15
+signal USBDN T16
+signal TDI A1
+signal TDO B2
+signal TMST C1
+signal TCLK B1
+signal VDD G17 F1 K7 M1 M5 T6 R14 M14 J11 J12 F13 E10 B8
+signal VSS H7 G3 K4 N5 P6 T14 R16 N16 K13 H9 C15 A11 E8 A5 F7
+signal VDDC E1 J4 P3 T8 K9 L13 E15 D12 A7
+signal VSSC C9 M3 L9 T10 N15 H12 B15 G6
+signal VDDA1 R11
+signal VSSA1 T11
+signal VDDA2 N12
+signal VSSA2 P12
+
+
+
+bit 506 I 1 nEXTPWR
+bit 505 I 1 MEDCHG
+bit 504 I 1 BATOK
+bit 503 I 1 nBATCHG
+bit 502 I 1 WAKEUP
+bit 501 I 1 UARTCTS2
+bit 500 C 0 UARTCTS2
+bit 499 O 1 UARTCTS2 500 0 Z
+bit 498 I 1 UARTDCD2
+bit 497 C 0 UARTDCD2
+bit 496 O 1 UARTDCD2 497 0 Z
+bit 495 I 1 nPWRFL
+bit 494 I 1 UARTDSR2
+bit 493 C 0 UARTDSR2
+bit 492 O 1 UARTDSR2 493 0 Z
+bit 491 I 1 IRTX2
+bit 490 C 0 IRTX2
+bit 489 O 1 IRTX2 490 0 Z
+bit 488 I 1 IRRX2
+bit 487 C 0 IRRX2
+bit 486 O 1 IRRX2 487 0 Z
+bit 485 I 1 UARTTXD2
+bit 484 C 0 UARTTXD2
+bit 483 O 1 UARTTXD2 484 0 Z
+bit 482 I 1 UARTRXD2
+bit 481 C 0 UARTRXD2
+bit 480 O 1 UARTRXD2 481 0 Z
+bit 479 I 1 COL0
+bit 478 C 0 COL0
+bit 477 O 1 COL0 478 0 Z
+bit 476 I 1 COL1
+bit 475 C 0 COL1
+bit 474 O 1 COL1 475 0 Z
+bit 473 I 1 COL2
+bit 472 C 0 COL2
+bit 471 O 1 COL2 472 0 Z
+bit 470 I 1 COL3
+bit 469 C 0 COL3
+bit 468 O 1 COL3 469 0 Z
+bit 467 I 1 COL4
+bit 466 C 0 COL4
+bit 465 O 1 COL4 466 0 Z
+bit 464 I 1 COL5
+bit 463 C 0 COL5
+bit 462 O 1 COL5 463 0 Z
+bit 461 I 1 COL6
+bit 460 C 0 COL6
+bit 459 O 1 COL6 460 0 Z
+bit 458 I 1 COL7
+bit 457 C 0 COL7
+bit 456 O 1 COL7 457 0 Z
+bit 455 I 1 BUZ
+bit 454 C 0 BUZ
+bit 453 O 1 BUZ 454 0 Z
+bit 452 C 0 SSPCLK
+bit 451 O 1 SSPCLK 452 0 Z
+bit 450 C 0 PGMCLK
+bit 449 O 1 PGMCLK 450 0 Z
+bit 448 I 1 SSPRX
+bit 447 C 0 SSPRX
+bit 446 O 1 SSPRX 447 0 Z
+bit 445 C 0 SSPTX
+bit 444 O 1 SSPTX 445 0 Z
+bit 443 C 0 SSPFRM
+bit 442 O 1 SSPFRM 443 0 Z
+bit 441 I 1 PA0
+bit 440 C 0 PA0
+bit 439 O 1 PA0 440 0 Z
+bit 438 I 1 PA1
+bit 437 C 0 PA1
+bit 436 O 1 PA1 437 0 Z
+bit 435 I 1 PA2
+bit 434 C 0 PA2
+bit 433 O 1 PA2 434 0 Z
+bit 432 I 1 PA3
+bit 431 C 0 PA3
+bit 430 O 1 PA3 431 0 Z
+bit 429 I 1 PA4
+bit 428 C 0 PA4
+bit 427 O 1 PA4 428 0 Z
+bit 426 I 1 PA5
+bit 425 C 0 PA5
+bit 424 O 1 PA5 425 0 Z
+bit 423 I 1 PA6
+bit 422 C 0 PA6
+bit 421 O 1 PA6 422 0 Z
+bit 420 I 1 PA7
+bit 419 C 0 PA7
+bit 418 O 1 PA7 419 0 Z
+bit 417 I 1 PB0
+bit 416 C 0 PB0
+bit 415 O 1 PB0 416 0 Z
+bit 414 I 1 PB1
+bit 413 C 0 PB1
+bit 412 O 1 PB1 413 0 Z
+bit 411 I 1 PB2
+bit 410 C 0 PB2
+bit 409 O 1 PB2 410 0 Z
+bit 408 I 1 PB3
+bit 407 C 0 PB3
+bit 406 O 1 PB3 407 0 Z
+bit 405 I 1 PB4
+bit 404 C 0 PB4
+bit 403 O 1 PB4 404 0 Z
+bit 402 I 1 PB5
+bit 401 C 0 PB5
+bit 400 O 1 PB5 401 0 Z
+bit 399 I 1 PB6
+bit 398 C 0 PB6
+bit 397 O 1 PB6 398 0 Z
+bit 396 I 1 PB7
+bit 395 C 0 PB7
+bit 394 O 1 PB7 395 0 Z
+bit 393 I 1 PC0
+bit 392 C 0 PC0
+bit 391 O 1 PC0 392 0 Z
+bit 390 I 1 PC1
+bit 389 C 0 PC1
+bit 388 O 1 PC1 389 0 Z
+bit 387 I 1 PC2
+bit 386 C 0 PC2
+bit 385 O 1 PC2 386 0 Z
+bit 384 I 1 PC3
+bit 383 C 0 PC3
+bit 382 O 1 PC3 383 0 Z
+bit 381 I 1 PC4
+bit 380 C 0 PC4
+bit 379 O 1 PC4 380 0 Z
+bit 378 I 1 PC5
+bit 377 C 0 PC5
+bit 376 O 1 PC5 377 0 Z
+bit 375 I 1 PC6
+bit 374 C 0 PC6
+bit 373 O 1 PC6 374 0 Z
+bit 372 I 1 PC7
+bit 371 C 0 PC7
+bit 370 O 1 PC7 371 0 Z
+bit 369 I 1 PG0
+bit 368 C 0 PG0
+bit 367 O 1 PG0 368 0 Z
+bit 366 I 1 PG1
+bit 365 C 0 PG1
+bit 364 O 1 PG1 365 0 Z
+bit 363 I 1 PG2
+bit 362 C 0 PG2
+bit 361 O 1 PG2 362 0 Z
+bit 360 I 1 PG3
+bit 359 C 0 PG3
+bit 358 O 1 PG3 359 0 Z
+bit 357 I 1 PG4
+bit 356 C 0 PG4
+bit 355 O 1 PG4 356 0 Z
+bit 354 I 1 PG5
+bit 353 C 0 PG5
+bit 352 O 1 PG5 353 0 Z
+bit 351 I 1 PG6
+bit 350 C 0 PG6
+bit 349 O 1 PG6 350 0 Z
+bit 348 I 1 PG7
+bit 347 C 0 PG7
+bit 346 O 1 PG7 347 0 Z
+bit 345 I 1 PH0
+bit 344 C 0 PH0
+bit 343 O 1 PH0 344 0 Z
+bit 342 I 1 PH1
+bit 341 C 0 PH1
+bit 340 O 1 PH1 341 0 Z
+bit 339 I 1 PH2
+bit 338 C 0 PH2
+bit 337 O 1 PH2 338 0 Z
+bit 336 I 1 PH3
+bit 335 C 0 PH3
+bit 334 O 1 PH3 335 0 Z
+bit 333 I 1 PH4
+bit 332 C 0 PH4
+bit 331 O 1 PH4 332 0 Z
+bit 330 I 1 PH5
+bit 329 C 0 PH5
+bit 328 O 1 PH5 329 0 Z
+bit 327 I 1 PH6
+bit 326 C 0 PH6
+bit 325 O 1 PH6 326 0 Z
+bit 324 I 1 PH7
+bit 323 C 0 PH7
+bit 322 O 1 PH7 323 0 Z
+bit 321 C 0 LCDFP
+bit 320 O 1 LCDFP 321 0 Z
+bit 319 C 0 LCDVD0
+bit 318 O 1 LCDVD0 319 0 Z
+bit 317 C 0 LCDVD1
+bit 316 O 1 LCDVD1 317 0 Z
+bit 315 C 0 LCDVD2
+bit 314 O 1 LCDVD2 315 0 Z
+bit 313 C 0 LCDVD3
+bit 312 O 1 LCDVD3 313 0 Z
+bit 311 I 1 PE0
+bit 310 C 0 PE0
+bit 309 O 1 PE0 310 0 Z
+bit 308 C 0 LCDLP
+bit 307 O 1 LCDLP 308 0 Z
+bit 306 C 0 LCDM
+bit 305 O 1 LCDM 306 0 Z
+bit 304 C 0 LCDDCLK
+bit 303 O 1 LCDDCLK 304 0 Z
+bit 302 I 1 PE1
+bit 301 C 0 PE1
+bit 300 O 1 PE1 301 0 Z
+bit 299 I 1 PE2
+bit 298 C 0 PE2
+bit 297 O 1 PE2 298 0 Z
+bit 296 I 1 PE3
+bit 295 C 0 PE3
+bit 294 O 1 PE3 295 0 Z
+bit 293 I 1 PD0
+bit 292 C 0 PD0
+bit 291 O 1 PD0 292 0 Z
+bit 290 I 1 PD1
+bit 289 C 0 PD1
+bit 288 O 1 PD1 289 0 Z
+bit 287 I 1 PD2
+bit 286 C 0 PD2
+bit 285 O 1 PD2 286 0 Z
+bit 284 I 1 PD3
+bit 283 C 0 PD3
+bit 282 O 1 PD3 283 0 Z
+bit 281 I 1 PD4
+bit 280 C 0 PD4
+bit 279 O 1 PD4 280 0 Z
+bit 278 I 1 PD5
+bit 277 C 0 PD5
+bit 276 O 1 PD5 277 0 Z
+bit 275 I 1 PD6
+bit 274 C 0 PD6
+bit 273 O 1 PD6 274 0 Z
+bit 272 I 1 PD7
+bit 271 C 0 PD7
+bit 270 O 1 PD7 271 0 Z
+bit 269 I 1 WIDTH0
+bit 268 I 1 WIDTH1
+bit 267 C 0 nCS0
+bit 266 O 1 nCS0 267 0 Z
+bit 265 C 0 nCS1
+bit 264 O 1 nCS1 265 0 Z
+bit 263 I 1 OSCEN
+bit 262 C 0 OSCEN
+bit 261 O 1 OSCEN 262 0 Z
+bit 260 C 0 nCS2
+bit 259 O 1 nCS2 260 0 Z
+bit 258 C 0 nCS3
+bit 257 O 1 nCS3 258 0 Z
+bit 256 I 1 D0
+bit 255 C 0 D0
+bit 254 O 1 D0 255 0 Z
+bit 253 C 0 A0
+bit 252 O 1 A0 253 0 Z
+bit 251 I 1 D1
+bit 250 C 0 D1
+bit 249 O 1 D1 250 0 Z
+bit 248 C 0 A1
+bit 247 O 1 A1 248 0 Z
+bit 246 I 1 D2
+bit 245 C 0 D2
+bit 244 O 1 D2 245 0 Z
+bit 243 C 0 A2
+bit 242 O 1 A2 243 0 Z
+bit 241 I 1 D3
+bit 240 C 0 D3
+bit 239 O 1 D3 240 0 Z
+bit 238 C 0 A3
+bit 237 O 1 A3 238 0 Z
+bit 236 I 1 D4
+bit 235 C 0 D4
+bit 234 O 1 D4 235 0 Z
+bit 233 C 0 A4
+bit 232 O 1 A4 233 0 Z
+bit 231 I 1 D5
+bit 230 C 0 D5
+bit 229 O 1 D5 230 0 Z
+bit 228 C 0 A5
+bit 227 O 1 A5 228 0 Z
+bit 226 I 1 D6
+bit 225 C 0 D6
+bit 224 O 1 D6 225 0 Z
+bit 223 C 0 A6
+bit 222 O 1 A6 223 0 Z
+bit 221 I 1 D7
+bit 220 C 0 D7
+bit 219 O 1 D7 220 0 Z
+bit 218 C 0 A7
+bit 217 O 1 A7 218 0 Z
+bit 216 I 1 D8
+bit 215 C 0 D8
+bit 214 O 1 D8 215 0 Z
+bit 213 C 0 A8
+bit 212 O 1 A8 213 0 Z
+bit 211 I 1 D9
+bit 210 C 0 D9
+bit 209 O 1 D9 210 0 Z
+bit 208 C 0 A9
+bit 207 O 1 A9 208 0 Z
+bit 206 I 1 D10
+bit 205 C 0 D10
+bit 204 O 1 D10 205 0 Z
+bit 203 C 0 A10
+bit 202 O 1 A10 203 0 Z
+bit 201 I 1 D11
+bit 200 C 0 D11
+bit 199 O 1 D11 200 0 Z
+bit 198 C 0 A11
+bit 197 O 1 A11 198 0 Z
+bit 196 I 1 D12
+bit 195 C 0 D12
+bit 194 O 1 D12 195 0 Z
+bit 193 C 0 A12
+bit 192 O 1 A12 193 0 Z
+bit 191 I 1 D13
+bit 190 C 0 D13
+bit 189 O 1 D13 190 0 Z
+bit 188 C 0 A13
+bit 187 O 1 A13 188 0 Z
+bit 186 I 1 D14
+bit 185 C 0 D14
+bit 184 O 1 D14 185 0 Z
+bit 183 C 0 A14
+bit 182 O 1 A14 183 0 Z
+bit 181 I 1 D15
+bit 180 C 0 D15
+bit 179 O 1 D15 180 0 Z
+bit 178 C 0 A15
+bit 177 O 1 A15 178 0 Z
+bit 176 I 1 D16
+bit 175 C 0 D16
+bit 174 O 1 D16 175 0 Z
+bit 173 C 0 A16
+bit 172 O 1 A16 173 0 Z
+bit 171 I 1 D17
+bit 170 C 0 D17
+bit 169 O 1 D17 170 0 Z
+bit 168 C 0 A17
+bit 167 O 1 A17 168 0 Z
+bit 166 I 1 D18
+bit 165 C 0 D18
+bit 164 O 1 D18 165 0 Z
+bit 163 C 0 A18
+bit 162 O 1 A18 163 0 Z
+bit 161 I 1 D19
+bit 160 C 0 D19
+bit 159 O 1 D19 160 0 Z
+bit 158 C 0 A19
+bit 157 O 1 A19 158 0 Z
+bit 156 I 1 D20
+bit 155 C 0 D20
+bit 154 O 1 D20 155 0 Z
+bit 153 C 0 A20
+bit 152 O 1 A20 153 0 Z
+bit 151 I 1 D21
+bit 150 C 0 D21
+bit 149 O 1 D21 150 0 Z
+bit 148 C 0 A21
+bit 147 O 1 A21 148 0 Z
+bit 146 I 1 D22
+bit 145 C 0 D22
+bit 144 O 1 D22 145 0 Z
+bit 143 C 0 A22
+bit 142 O 1 A22 143 0 Z
+bit 141 I 1 D23
+bit 140 C 0 D23
+bit 139 O 1 D23 140 0 Z
+bit 138 C 0 A23
+bit 137 O 1 A23 138 0 Z
+bit 136 I 1 D24
+bit 135 C 0 D24
+bit 134 O 1 D24 135 0 Z
+bit 133 C 0 A24
+bit 132 O 1 A24 133 0 Z
+bit 131 I 1 D25
+bit 130 C 0 D25
+bit 129 O 1 D25 130 0 Z
+bit 128 I 1 nSCS0
+bit 127 C 0 nSCS0
+bit 126 O 1 nSCS0 127 0 Z
+bit 125 I 1 D26
+bit 124 C 0 D26
+bit 123 O 1 D26 124 0 Z
+bit 122 I 1 nSCS1
+bit 121 C 0 nSCS1
+bit 120 O 1 nSCS1 121 0 Z
+bit 119 I 1 D27
+bit 118 C 0 D27
+bit 117 O 1 D27 118 0 Z
+bit 116 I 1 nSCS2
+bit 115 C 0 nSCS2
+bit 114 O 1 nSCS2 115 0 Z
+bit 113 I 1 D28
+bit 112 C 0 D28
+bit 111 O 1 D28 112 0 Z
+bit 110 I 1 nSCS3
+bit 109 C 0 nSCS3
+bit 108 O 1 nSCS3 109 0 Z
+bit 107 I 1 D29
+bit 106 C 0 D29
+bit 105 O 1 D29 106 0 Z
+bit 104 C 0 nSWE
+bit 103 O 1 nSWE 104 0 Z
+bit 102 I 1 D30
+bit 101 C 0 D30
+bit 100 O 1 D30 101 0 Z
+bit 99 I 1 nCAS
+bit 98 C 0 nCAS
+bit 97 O 1 nCAS 98 0 Z
+bit 96 I 1 D31
+bit 95 C 0 D31
+bit 94 O 1 D31 95 0 Z
+bit 93 I 1 nRAS
+bit 92 C 0 nRAS
+bit 91 O 1 nRAS 92 0 Z
+bit 90 I 1 SCKEN3
+bit 89 C 0 SCKEN3
+bit 88 O 1 SCKEN3 89 0 Z
+bit 87 I 1 SCLK
+bit 86 C 0 SCLK
+bit 85 O 1 SCLK 86 0 Z
+bit 84 C 0 CS6
+bit 83 O 1 CS6 84 0 Z
+bit 82 C 0 CS7
+bit 81 O 1 CS7 82 0 Z
+bit 80 C 0 nWE3
+bit 79 O 1 nWE3 80 0 Z
+bit 78 I 1 DQM0
+bit 77 C 0 DQM0
+bit 76 O 1 DQM0 77 0 Z
+bit 75 I 1 DQM1
+bit 74 C 0 DQM1
+bit 73 O 1 DQM1 74 0 Z
+bit 72 I 1 DQM2
+bit 71 C 0 DQM2
+bit 70 O 1 DQM2 71 0 Z
+bit 69 C 0 DQM3
+bit 68 O 1 DQM3 69 0 Z
+bit 67 C 0 nOE
+bit 66 O 1 nOE 67 0 Z
+bit 65 I 1 nWE0
+bit 64 C 0 nWE0
+bit 63 O 1 nWE0 64 0 Z
+bit 62 I 1 A25
+bit 61 C 0 A25
+bit 60 O 1 A25 61 0 Z
+bit 59 I 1 A26
+bit 58 C 0 A26
+bit 57 O 1 A26 58 0 Z
+bit 56 C 0 A27
+bit 55 O 1 A27 56 0 Z
+bit 54 I 1 PWMEN0
+bit 53 C 0 PWMEN0
+bit 52 O 1 PWMEN0 53 0 Z
+bit 51 I 1 PWMEN1
+bit 50 C 0 PWMEN1
+bit 49 O 1 PWMEN1 50 0 Z
+bit 48 I 1 PWM0
+bit 47 C 0 PWM0
+bit 46 O 1 PWM0 47 0 Z
+bit 45 I 1 PWM1
+bit 44 C 0 PWM1
+bit 43 O 1 PWM1 44 0 Z
+bit 42 I 1 PF0
+bit 41 C 0 PF0
+bit 40 O 1 PF0 41 0 Z
+bit 39 I 1 PF1
+bit 38 C 0 PF1
+bit 37 O 1 PF1 38 0 Z
+bit 36 I 1 PF2
+bit 35 C 0 PF2
+bit 34 O 1 PF2 35 0 Z
+bit 33 I 1 PF4
+bit 32 C 0 PF4
+bit 31 O 1 PF4 32 0 Z
+bit 30 I 1 PF5
+bit 29 C 0 PF5
+bit 28 O 1 PF5 29 0 Z
+bit 27 I 1 PF6
+bit 26 C 0 PF6
+bit 25 O 1 PF6 26 0 Z
+bit 24 I 1 PF7
+bit 23 C 0 PF7
+bit 22 O 1 PF7 23 0 Z
+bit 21 I 1 AC97CLK
+bit 20 C 0 AC97CLK
+bit 19 O 1 AC97CLK 20 0 Z
+bit 18 I 1 PF3
+bit 17 C 0 PF3
+bit 16 O 1 PF3 17 0 Z
+bit 15 C 0 AC97OUT
+bit 14 O 1 AC97OUT 15 0 Z
+bit 13 C 0 AC97SYNC
+bit 12 O 1 AC97SYNC 13 0 Z
+bit 11 I 1 AC97IN
+bit 10 C 0 AC97IN
+bit 9 O 1 AC97IN 10 0 Z
+bit 8 I 1 MMCCLK
+bit 7 C 0 MMCCLK
+bit 6 O 1 MMCCLK 7 0 Z
+bit 5 I 1 MMCCMD
+bit 4 C 0 MMCCMD
+bit 3 O 1 MMCCMD 4 0 Z
+bit 2 I 1 MMCDATA
+bit 1 C 0 MMCDATA
+bit 0 O 1 MMCDATA 1 0 Z
--- /dev/null
+#
+# $Id: PARTS 599 2004-06-13 18:16:43Z telka $
+#
+# Copyright (C) 2008 andi2k (sf.net)
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# bits 27-12 of the Device Identification Register
+1000011000110000 smp8634 SMP8634
--- /dev/null
+#
+# $Id: STEPPINGS 380 2003-02-25 08:26:15Z telka $
+#
+# Copyright (C) 2008 andi2k (sf.net)
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# bits 31-28 of the Device Identification Register
+0000 smp8634 1
--- /dev/null
+#
+# $Id: smp8634 599 2004-06-13 18:16:43Z telka $
+#
+# Copyright (C) 2008 andi2k (sf.net)
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+
+register BR 1
+register BSR 1
+register DIR 32
+register EJIMPCODE 32
+register EJADDRESS 32
+register EJDATA 32
+register EJCONTROL 32
+register EJALL 96
+register EJFASTDATA 33
+
+instruction length 5
+
+instruction BYPASS 11111 BR
+instruction SAMPLE/PRELOAD 00010 BSR
+instruction IDCODE 00001 DIR
+instruction EJTAG_IMPCODE 00011 EJIMPCODE
+instruction EJTAG_ADDRESS 01000 EJADDRESS
+instruction EJTAG_DATA 01001 EJDATA
+instruction EJTAG_CONTROL 01010 EJCONTROL
+instruction EJTAG_ALL 01011 EJALL
+instruction EJTAGBOOT 01100 BR
+instruction NORMALBOOT 01101 BR
+instruction EJTAG_FASTDATA 01110 EJFASTDATA
+
+initbus ejtag
+endian little
+
+
--- /dev/null
+#
+# $Id$
+#
+# Copyright (C) 2009 aSmig (sf.net)
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+#
+# Documentation:
+#
+
+# bits 27-12 of the Device Identification Register
+1011010100101101 tnetv1060 TNETV1060
+1011011011000110 tnetv1061 TNETV1061
--- /dev/null
+#
+# $Id$
+#
+# Copyright (C) 2009 aSmig (sf.net)
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+#
+# Documentation:
+#
+
+# bits 31-28 of the Device Identification Register
+0000 tnetv1060 NoDoc
--- /dev/null
+#
+# $Id$
+#
+# JTAG declarations for TNETV1060
+# Copyright (C) 2009 aSmig (sf.net)
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+#
+# Documentation:
+# [1] Texas Instruments, "TNETV1060 Communications Processor
+# for VoIP Gateway Applications Data Manual", June 2004,
+# Literature Number SPRS255
+# [2] MIPS Technologies, "MIPS32 4KETM Processor Core Family
+# Software User’s Manual", January 2004, Document Number:
+# MD00103
+# [3] MIPS Technologies, "MIPS® EJTAG Specification", November
+# 2008, Document Number: MD00047
+#
+
+# see Table 3-2 in [1]
+signal AIC_CLK_I R1
+signal AIC_CLK_O T1
+signal ALT_CLK_I P21
+signal EJTAG_DINT E3
+signal EJTAG_SYSRST E2
+signal EJTAG_TCK F2
+signal EJTAG_TDI G3
+signal EJTAG_TDO F1
+signal EJTAG_TMS G2
+signal EJTAG_TRST0 F3
+signal EJTAG_TRST1 E1
+signal EM_A0 J21
+signal EM_A1 J20
+signal EM_A2 H22
+signal EM_A3 H21
+signal EM_A4 H20
+signal EM_A5 G22
+signal EM_A6 G21
+signal EM_A7 G20
+signal EM_A8 F22
+signal EM_A9 F21
+signal EM_A10 F20
+signal EM_A11 F19
+signal EM_A12 E22
+signal EM_A13 E21
+signal EM_A14 E20
+signal EM_A15 E19
+signal EM_A16 D22
+signal EM_A17 D21
+signal EM_A18 D20
+signal EM_A19 C22
+signal EM_A20 C21
+signal EM_A21 C19
+signal EM_A22 B20
+signal EM_A23 A20
+signal EM_CAS A5
+signal EM_CKE D5
+signal EM_CLK D6
+signal EM_CS0 C8
+signal EM_CS1 B8
+signal EM_CS2 A8
+signal EM_CS3 C7
+signal EM_CS4 B7
+signal EM_CS5 A7
+signal EM_D0 B10
+signal EM_D1 A10
+signal EM_D2 B11
+signal EM_D3 A11
+signal EM_D4 C11
+signal EM_D5 D11
+signal EM_D6 B12
+signal EM_D7 A12
+signal EM_D8 C12
+signal EM_D9 D12
+signal EM_D10 B13
+signal EM_D11 A13
+signal EM_D12 C13
+signal EM_D13 B14
+signal EM_D14 A14
+signal EM_D15 C14
+signal EM_D16 B15
+signal EM_D17 A15
+signal EM_D18 C15
+signal EM_D19 B16
+signal EM_D20 A16
+signal EM_D21 C16
+signal EM_D22 B17
+signal EM_D23 A17
+signal EM_D24 C17
+signal EM_D25 D17
+signal EM_D26 B18
+signal EM_D27 A18
+signal EM_D28 C18
+signal EM_D29 D18
+signal EM_D30 A19
+signal EM_D31 B19
+signal EM_HIZ C6
+signal EM_OE B5
+signal EM_RAS A6
+signal EM_RW C5
+signal EM_WAIT B6
+signal EM_WE_DQM0 C10
+signal EM_WE_DQM1 C9
+signal EM_WE_DQM2 B9
+signal EM_WE_DQM3 A9
+signal EM_WE A4
+signal GPIO0 R3
+signal GPIO1 T3
+signal GPIO2 U3
+signal GPIO3 T2
+signal GPIO4 U2
+signal GPIO5 V2
+signal GPIO6 U1
+signal GPIO7 V1
+signal JTAG_EMU0 H3
+signal JTAG_EMU1 G1
+signal JTAG_TCK J3
+signal JTAG_TDI H1
+signal JTAG_TDO J2
+signal JTAG_TMS J1
+signal JTAG_TRST H2
+signal KEYPAD0 AB7
+signal KEYPAD1 AA7
+signal KEYPAD2 AB8
+signal KEYPAD3 AA8
+signal KEYPAD4 Y8
+signal KEYPAD5 AB9
+signal KEYPAD6 AA9
+signal KEYPAD7 Y9
+signal KEYPAD8 AB10
+signal KEYPAD9 AA10
+signal KEYPAD10 Y10
+signal KEYPAD11 AB11
+signal KEYPAD12 AA11
+signal KEYPAD13 W11
+signal KEYPAD14 Y11
+signal KEYPAD15 AB12
+signal LCD_BIAS_E0 AA12
+signal LCD_D0 Y13
+signal LCD_D1 AB14
+signal LCD_D2 AA14
+signal LCD_D3 Y14
+signal LCD_D4 AB15
+signal LCD_D5 AA15
+signal LCD_D6 Y15
+signal LCD_D7 AB16
+signal LCD_D8 AA16
+signal LCD_D9 Y16
+signal LCD_D10 AB17
+signal LCD_D11 AA17
+signal LCD_D12 Y17
+signal LCD_D13 W17
+signal LCD_D14 AB18
+signal LCD_D15 AA18
+signal LCD_E1 AB13
+signal LCD_HSYNC_W W12
+signal LCD_PIXEL_STRB Y12
+signal LCD_VSYNC_A AA13
+signal McBSP_CLK_RX M3
+signal McBSP_CLK_TX N2
+signal McBSP_D_RX N3
+signal McBSP_D_TX P1
+signal McBSP_FS_RX P2
+signal McBSP_FS_TX P3
+signal P0_100MB AB19
+signal P0_ACTIVITY AB20
+signal P0_FDUPLEX AA20
+signal P0_LINK AA19
+signal P0_RX_M W19
+signal P0_RX_P Y19
+signal P0_TX_M V22
+signal P0_TX_P W22
+signal P1_100MB AB21
+signal P1_ACTIVITY AB22
+signal P1_FDUPLEX AA22
+signal P1_LINK AA21
+signal P1_RX_M R19
+signal P1_RX_P P19
+signal P1_TX_M T22
+signal P1_TX_P R22
+signal PHY_REF W18
+signal PHY_REF_RTN Y18
+signal PHY_TEST Y21
+signal REF_CLK_I P22
+signal REF_CLK_O N22
+signal RESET_I C1
+signal RESET_O C0
+signal SSP0 D3
+signal SSP1 D1
+signal SSP2 D2
+signal SSP3 E4
+signal TELE_CLK_I L19
+signal TELE_CLK_O J22
+signal TELE_CS K20
+signal TELE_DCLK M19
+signal TELE_DI N20
+signal TELE_DO M20
+signal TELE_FS L20
+signal TELE_INT K21
+signal TELE_RESET K22
+signal TELE_RINGIN1 M21
+signal TELE_RINGIN2 M22
+signal TELE_RINGIN3 L21
+signal TELE_RINGIN4 L22
+signal TEST F4
+signal UART_CTS B3
+signal UART_RTS A3
+signal UART_RX B4
+signal UART_TX C4
+signal VLYNQ5_CLK K3
+signal VLYNQ5_RX_D0 K2
+signal VLYNQ5_RX_D1 K1
+signal VLYNQ5_TX_D0 L2
+signal VLYNQ5_TX_D1 L1
+signal VR_BASE1 AB6
+signal VR_BASE2 R2
+signal VR_BASE3 Y22
+signal VR_ENBL AA6
+signal VDD J10 J11 J12 J13 K9 K14 L9 L14 M9 M14 N9 N14 P10 P11 P12 P13
+signal VDDS D7 D8 D9 D10 D13 D14 D15 D16 G4 G19 H4 H19 J4 J19 K4 K19 N4 P4 W9 W10 W13 W14 W15 W16
+signal VDDA N19 P20 R4 T4 U19 U20 U21 U22 W7 W8 Y20
+signal VSS A1 A2 A21 A22 B1 B2 B21 B22 C3 C20 D4 D19 J9 J14 K10 K11
+# VSS line was too long
+signal VSS2 K12 K13 L10 L11 L12 L13 M10 M11 M12 M13 N10 N11 N12 N13
+signal VSS_AIC AA1 AA2 AB1 AB2 P9 N21 P14 R20 R21 T19 T20 T21 V19 V20 V21 W4 W20 W21
+signal NC A3 AA4 AA5 AB3 AB4 AB5 L3 L4 M1 M2 M4 N1 U4 V3 V4 W1 W2 W3 W5 W6 Y1 Y2 Y4 Y5 Y6 Y7
+
+# see [2] 9.3.3.2 - 9.3.3.7
+# see also discovery output
+register BSR 1
+register BR 1
+register DIR 32
+register EJIMPCODE 32
+register EJADDRESS 32
+register EJDATA 32
+register EJCONTROL 32
+register EJALL 96
+register EJFASTDATA 33
+
+# see [2] 9.3.3 Test Access Port (TAP) Instructions
+# see also discovery output
+instruction length 5
+
+# see [2] Table 9-20 Implemented EJTAG Instructions
+# see also [3] Table 7.1 TAP Instruction Overview
+instruction BYPASS 11111 BR
+instruction SAMPLE/PRELOAD 00010 BSR # not in datasheets
+instruction IDCODE 00001 DIR
+instruction EJTAG_IMPCODE 00011 EJIMPCODE
+instruction EJTAG_ADDRESS 01000 EJADDRESS
+instruction EJTAG_DATA 01001 EJDATA
+instruction EJTAG_CONTROL 01010 EJCONTROL
+instruction EJTAG_ALL 01011 EJALL
+instruction EJTAGBOOT 01100 BR
+instruction NORMALBOOT 01101 BR
+instruction EJTAG_FASTDATA 01110 EJFASTDATA
+instruction TCBCONTROLA 10000 BR
+instruction TCBCONTROLB 10001 BR
+instruction TCBDATA 10010 BR
+
+initbus ejtag
+endian little
--- /dev/null
+#
+# $Id$
+#
+# Copyright (C) 2009 aSmig (sf.net)
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+#
+# Documentation:
+#
+
+# bits 31-28 of the Device Identification Register
+0001 tnetv1061 NoDoc
--- /dev/null
+#
+# $Id$
+#
+# JTAG declarations for TNETV1061
+# Copyright (C) 2009 aSmig (sf.net)
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+#
+# Documentation:
+# [1] MIPS Technologies, "MIPS32 4KETM Processor Core Family
+# Software User’s Manual", January 2004, Document Number:
+# MD00103
+# [2] MIPS Technologies, "MIPS® EJTAG Specification", November
+# 2008, Document Number: MD00047
+#
+
+# see [1] 9.3.3.2 - 9.3.3.7
+# see also discovery output
+register BSR 1
+register BR 1
+register DIR 32
+register EJIMPCODE 32
+register EJADDRESS 32
+register EJDATA 32
+register EJCONTROL 32
+register EJALL 96
+register EJFASTDATA 33
+
+# see [1] 9.3.3 Test Access Port (TAP) Instructions
+# see also discovery output
+instruction length 5
+
+# see [1] Table 9-20 Implemented EJTAG Instructions
+# see also [2] Table 7.1 TAP Instruction Overview
+instruction BYPASS 11111 BR
+instruction SAMPLE/PRELOAD 00010 BSR # not in datasheets
+instruction IDCODE 00001 DIR
+instruction EJTAG_IMPCODE 00011 EJIMPCODE
+instruction EJTAG_ADDRESS 01000 EJADDRESS
+instruction EJTAG_DATA 01001 EJDATA
+instruction EJTAG_CONTROL 01010 EJCONTROL
+instruction EJTAG_ALL 01011 EJALL
+instruction EJTAGBOOT 01100 BR
+instruction NORMALBOOT 01101 BR
+instruction EJTAG_FASTDATA 01110 EJFASTDATA
+instruction TCBCONTROLA 10000 BR
+instruction TCBCONTROLB 10001 BR
+instruction TCBDATA 10010 BR
+
+initbus ejtag
+endian little
--- /dev/null
+#
+# $Id$
+#
+# Copyright (C) 2003 RightHand Technologies, Inc.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Andrew Dyer <adyer@righthandtech.com>, 2003.
+#
+
+# bits 27-12 of the Device Identification Register
+0000000000011110 tx4925 TX4925
+0000000000011111 tx4926 TX4926
--- /dev/null
+#
+# $Id$
+#
+# Copyright (C) 2003 RightHand Technologies, Inc.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Andrew Dyer <adyer@righthandtech.com>, 2003.
+#
+
+# bits 31-28 of the Device Identification Register
+0000 tx4925 0
--- /dev/null
+#
+# $Id$
+#
+# JTAG declarations for Toshiba TX4925
+# Copyright (C) 2004 RightHand Technologies, Inc.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Andrew Dyer <adyer@righthandtech.com>, 2004.
+#
+# Documentation:
+# [1] Toshiba Corporation,
+# "64-Bit TX System RISC TX49 Family TMPR4925 Rev. 2.0"
+# [2] Toshiba Corporation, "BSDL file for TMPR4925"
+#
+signal VDDC0
+signal VDDC1
+signal VDDC2
+signal VDDC3
+signal VDDC4
+signal VDDC5
+signal VDDC6
+signal VDDC7
+signal VDDC8
+signal VDDC9
+signal VDDC10
+signal VDDC11
+signal VDDC12
+signal VDDC13
+signal VDDC14
+signal VDDC15
+signal VDDC16
+signal VDDC17
+signal VDDS0
+signal VDDS1
+signal VDDS2
+signal VDDS3
+signal VDDS4
+signal VDDS5
+signal VDDS6
+signal VDDS7
+signal VDDS8
+signal VDDS9
+signal VDDS10
+signal VDDS11
+signal VDDS12
+signal VDDS13
+signal VDDS14
+signal VDDS15
+signal VDDS16
+signal VDDS17
+signal VDDS18
+signal VDDS19
+signal VDDS20
+signal VSS0
+signal VSS1
+signal VSS2
+signal VSS3
+signal VSS4
+signal VSS5
+signal VSS6
+signal VSS7
+signal VSS8
+signal VSS9
+signal VSS10
+signal VSS11
+signal VSS12
+signal VSS13
+signal VSS14
+signal VSS15
+signal VSS16
+signal VSS17
+signal VSS18
+signal VSS19
+signal VSS20
+signal VSS21
+signal VSS22
+signal VSS23
+signal VSS24
+signal VSS25
+signal VSS26
+signal VSS27
+signal VSS28
+signal VSS29
+signal COLDRESET
+signal PON
+signal MSTRCLK
+signal TEST
+signal PLLVDD
+signal PLLVSS
+signal NMI
+signal SCANENB
+signal C32KIN
+signal SYSCLK
+signal BWE_3
+signal BWE_2
+signal BWE_1
+signal BWE_0
+signal SDCLK_1
+signal SDCLK_0
+signal SDCLKIN
+signal GNT_3
+signal GNT_2
+signal GNT_1
+signal GNT_0
+signal REQ_3
+signal REQ_2
+signal REQ_1
+signal REQ_0
+signal PERR
+signal SERR
+signal PCIAD_31
+signal PCIAD_30
+signal PCIAD_29
+signal PCIAD_28
+signal PCIAD_27
+signal PCIAD_26
+signal PCIAD_25
+signal PCIAD_24
+signal PCIAD_23
+signal PCIAD_22
+signal PCIAD_21
+signal PCIAD_20
+signal PCIAD_19
+signal PCIAD_18
+signal PCIAD_17
+signal PCIAD_16
+signal PCIAD_15
+signal PCIAD_14
+signal PCIAD_13
+signal PCIAD_12
+signal PCIAD_11
+signal PCIAD_10
+signal PCIAD_9
+signal PCIAD_8
+signal PCIAD_7
+signal PCIAD_6
+signal PCIAD_5
+signal PCIAD_4
+signal PCIAD_3
+signal PCIAD_2
+signal PCIAD_1
+signal PCIAD_0
+signal C_BE_3
+signal C_BE_2
+signal C_BE_1
+signal C_BE_0
+signal PAR
+signal FRAME
+signal TRDY
+signal IRDY
+signal IDSEL
+signal STOP
+signal DEVSEL
+signal PCICLK_2
+signal PCICLK_1
+signal PCICLKIO
+signal TDI
+signal TMS
+signal TCK
+signal TRST
+signal BC32K
+signal DATA_31
+signal DATA_30
+signal DATA_29
+signal DATA_28
+signal DATA_27
+signal DATA_26
+signal DATA_25
+signal DATA_24
+signal DATA_23
+signal DATA_22
+signal DATA_21
+signal DATA_20
+signal DATA_19
+signal DATA_18
+signal DATA_17
+signal DATA_16
+signal DATA_15
+signal DATA_14
+signal DATA_13
+signal DATA_12
+signal DATA_11
+signal DATA_10
+signal DATA_9
+signal DATA_8
+signal DATA_7
+signal DATA_6
+signal DATA_5
+signal DATA_4
+signal DATA_3
+signal DATA_2
+signal DATA_1
+signal DATA_0
+signal ADDR_19
+signal ADDR_18
+signal ADDR_17
+signal ADDR_16
+signal ADDR_15
+signal ADDR_14
+signal ADDR_13
+signal ADDR_12
+signal ADDR_11
+signal ADDR_10
+signal ADDR_9
+signal ADDR_8
+signal ADDR_7
+signal ADDR_6
+signal ADDR_5
+signal ADDR_4
+signal ADDR_3
+signal ADDR_2
+signal ADDR_1
+signal ADDR_0
+signal ACK
+signal ROMCE_3
+signal ROMCE_2
+signal ROMCE_1
+signal ROMCE_0
+signal PIO_31
+signal PIO_30
+signal PIO_29
+signal PIO_28
+signal PIO_27
+signal PIO_26
+signal PIO_25
+signal PIO_24
+signal PIO_23
+signal PIO_22
+signal PIO_21
+signal PIO_20
+signal PIO_19
+signal PIO_18
+signal PIO_17
+signal PIO_16
+signal PIO_15
+signal PIO_14
+signal PIO_13
+signal PIO_12
+signal PIO_11
+signal PIO_10
+signal PIO_9
+signal PIO_8
+signal PIO_7
+signal PIO_6
+signal PIO_5
+signal PIO_4
+signal PIO_3
+signal PIO_2
+signal PIO_1
+signal PIO_0
+signal BUSSPRT
+signal UAE
+signal SWE
+signal OE
+signal SDCS_3
+signal SDCS_2
+signal SDCS_1
+signal SDCS_0
+signal RAS
+signal CAS
+signal DQM_3
+signal DQM_2
+signal DQM_1
+signal DQM_0
+signal WE
+signal CKE
+signal DA10
+signal RP
+signal C32KOUT
+
+register BSR 356
+register BR 1
+register DIR 32
+register EJIMPCODE 32
+register EJADDRESS 36
+register EJDATA 64
+register EJCONTROL 32
+register EJALL 132
+
+instruction length 8
+
+instruction BYPASS 11111111 BR
+instruction SAMPLE/PRELOAD 00000001 BSR
+instruction EXTEST 00000000 BSR
+instruction IDCODE 00000011 DIR
+instruction EJTAG_IMPCODE 10000011 EJIMPCODE
+instruction EJTAG_ADDRESS 10001000 EJADDRESS
+instruction EJTAG_DATA 10001001 EJDATA
+instruction EJTAG_CONTROL 10001010 EJCONTROL
+instruction EJATG_ALL 10001011 EJALL
+# instruction PCTRACE 10010000 # docs are unclear about what this does
+
+bit 355 O 1 GNT_0 354 1 Z
+bit 354 C 1 *
+bit 353 O 0 PCICLKIO 352 1 Z
+bit 352 C 1 *
+bit 351 O 0 PCICLK_1 350 1 Z
+bit 350 C 1 *
+bit 349 O 0 PCICLK_2 348 1 Z
+bit 348 C 1 *
+bit 347 O 1 REQ_0 346 1 Z
+bit 346 C 1 *
+bit 345 O 1 GNT_1 344 1 Z
+bit 344 C 1 *
+bit 343 O 1 REQ_1 342 1 Z
+bit 342 C 1 *
+bit 341 O 1 GNT_2 340 1 Z
+bit 340 C 1 *
+bit 339 O 1 REQ_2 338 1 Z
+bit 338 C 1 *
+bit 337 O 1 GNT_3 336 1 Z
+bit 336 C 1 *
+bit 335 O 1 REQ_3 334 1 Z
+bit 334 C 1 *
+bit 333 O 1 PCIAD_31 332 1 Z
+bit 332 C 1 *
+bit 331 O 1 PCIAD_30 330 1 Z
+bit 330 C 1 *
+bit 329 O 1 PCIAD_29 328 1 Z
+bit 328 C 1 *
+bit 327 O 1 PCIAD_28 326 1 Z
+bit 326 C 1 *
+bit 325 O 1 PCIAD_27 324 1 Z
+bit 324 C 1 *
+bit 323 O 1 PCIAD_26 322 1 Z
+bit 322 C 1 *
+bit 321 O 1 PCIAD_25 320 1 Z
+bit 320 C 1 *
+bit 319 O 1 PCIAD_24 318 1 Z
+bit 318 C 1 *
+bit 317 O 1 C_BE_3 316 1 Z
+bit 316 C 1 *
+bit 315 O 1 IDSEL 314 1 Z
+bit 314 C 1 *
+bit 313 O 1 PCIAD_23 312 1 Z
+bit 312 C 1 *
+bit 311 O 1 PCIAD_22 310 1 Z
+bit 310 C 1 *
+bit 309 O 1 PCIAD_21 308 1 Z
+bit 308 C 1 *
+bit 307 O 1 PCIAD_20 306 1 Z
+bit 306 C 1 *
+bit 305 O 1 PCIAD_19 304 1 Z
+bit 304 C 1 *
+bit 303 O 1 PCIAD_17 302 1 Z
+bit 302 C 1 *
+bit 301 O 1 PCIAD_18 300 1 Z
+bit 300 C 1 *
+bit 299 O 1 FRAME 298 1 Z
+bit 298 C 1 *
+bit 297 O 1 C_BE_2 296 1 Z
+bit 296 C 1 *
+bit 295 O 1 PCIAD_16 294 1 Z
+bit 294 C 1 *
+bit 293 O 1 STOP 292 1 Z
+bit 292 C 1 *
+bit 291 O 1 DEVSEL 290 1 Z
+bit 290 C 1 *
+bit 289 O 1 TRDY 288 1 Z
+bit 288 C 1 *
+bit 287 O 1 IRDY 286 1 Z
+bit 286 C 1 *
+bit 285 O 1 SERR 284 1 Z
+bit 284 C 1 *
+bit 283 O 1 PERR 282 1 Z
+bit 282 C 1 *
+bit 281 O 1 PCIAD_15 280 1 Z
+bit 280 C 1 *
+bit 279 O 1 C_BE_1 278 1 Z
+bit 278 C 1 *
+bit 277 O 1 PAR 276 1 Z
+bit 276 C 1 *
+bit 275 O 1 PCIAD_12 274 1 Z
+bit 274 C 1 *
+bit 273 O 1 PCIAD_13 272 1 Z
+bit 272 C 1 *
+bit 271 O 1 PCIAD_14 270 1 Z
+bit 270 C 1 *
+bit 269 O 1 PCIAD_9 268 1 Z
+bit 268 C 1 *
+bit 267 O 1 PCIAD_10 266 1 Z
+bit 266 C 1 *
+bit 265 O 1 PCIAD_11 264 1 Z
+bit 264 C 1 *
+bit 263 O 1 C_BE_0 262 1 Z
+bit 262 C 1 *
+bit 261 O 1 PCIAD_8 260 1 Z
+bit 260 C 1 *
+bit 259 O 1 PCIAD_4 258 1 Z
+bit 258 C 1 *
+bit 257 O 1 PCIAD_0 256 1 Z
+bit 256 C 1 *
+bit 255 O 1 PCIAD_5 254 1 Z
+bit 254 C 1 *
+bit 253 O 1 PCIAD_1 252 1 Z
+bit 252 C 1 *
+bit 251 O 1 PCIAD_6 250 1 Z
+bit 250 C 1 *
+bit 249 O 1 PCIAD_2 248 1 Z
+bit 248 C 1 *
+bit 247 O 1 PCIAD_7 246 1 Z
+bit 246 C 1 *
+bit 245 O 1 PCIAD_3 244 1 Z
+bit 244 C 1 *
+bit 243 O 1 BWE_0 242 1 Z
+bit 242 C 1 *
+bit 241 O 1 BWE_1 240 1 Z
+bit 240 C 1 *
+bit 239 O 1 SYSCLK 238 1 Z
+bit 238 C 1 *
+bit 237 O 1 BWE_2 236 1 Z
+bit 236 C 1 *
+bit 235 O 1 BWE_3 234 1 Z
+bit 234 C 1 *
+bit 233 O 1 UAE 232 1 Z
+bit 232 C 1 *
+bit 231 O 1 SWE 230 1 Z
+bit 230 C 1 *
+bit 229 O 1 ADDR_0 228 1 Z
+bit 228 C 1 *
+bit 227 O 1 ADDR_1 226 1 Z
+bit 226 C 1 *
+bit 225 O 1 ADDR_2 224 1 Z
+bit 224 C 1 *
+bit 223 O 1 ADDR_3 222 1 Z
+bit 222 C 1 *
+bit 221 O 1 ADDR_4 220 1 Z
+bit 220 C 1 *
+bit 219 O 1 ROMCE_3 218 1 Z
+bit 218 C 1 *
+bit 217 O 1 ROMCE_2 216 1 Z
+bit 216 C 1 *
+bit 215 O 1 ADDR_15 214 1 Z
+bit 214 C 1 *
+bit 213 O 1 OE 212 1 Z
+bit 212 C 1 *
+bit 211 O 1 PIO_0 210 1 Z
+bit 210 C 1 *
+bit 209 O 1 PIO_2 208 1 Z
+bit 208 C 1 *
+bit 207 O 1 ROMCE_1 206 1 Z
+bit 206 C 1 *
+bit 205 O 1 ROMCE_0 204 1 Z
+bit 204 C 1 *
+bit 203 O 1 BUSSPRT 202 1 Z
+bit 202 C 1 *
+bit 201 O 1 PIO_4 200 1 Z
+bit 200 C 1 *
+bit 199 O 1 ACK 198 1 Z
+bit 198 C 1 *
+bit 197 O 1 PIO_3 196 1 Z
+bit 196 C 1 *
+bit 195 O 1 PIO_1 194 1 Z
+bit 194 C 1 *
+bit 193 O 1 PIO_11 192 1 Z
+bit 192 C 1 *
+bit 191 O 1 PIO_10 190 1 Z
+bit 190 C 1 *
+bit 189 O 1 PIO_5 188 1 Z
+bit 188 C 1 *
+bit 187 O 1 PIO_6 186 1 Z
+bit 186 C 1 *
+bit 185 O 1 PIO_8 184 1 Z
+bit 184 C 1 *
+bit 183 O 1 PIO_9 182 1 Z
+bit 182 C 1 *
+bit 181 O 1 PIO_12 180 1 Z
+bit 180 C 1 *
+bit 179 O 1 PIO_17 178 1 Z
+bit 178 C 1 *
+bit 177 O 1 PIO_13 176 1 Z
+bit 176 C 1 *
+bit 175 O 1 PIO_7 174 1 Z
+bit 174 C 1 *
+bit 173 O 1 PIO_14 172 1 Z
+bit 172 C 1 *
+bit 171 O 1 PIO_15 170 1 Z
+bit 170 C 1 *
+bit 169 O 1 PIO_16 168 1 Z
+bit 168 C 1 *
+bit 167 O 1 BC32K 166 1 Z
+bit 166 C 1 *
+bit 165 O 1 *
+bit 164 O 1 *
+bit 163 O 1 *
+bit 162 O 1 *
+bit 161 O 1 *
+bit 160 O 1 *
+bit 159 B 1 DATA_0 158 1 Z
+bit 158 C 1 *
+bit 157 B 1 DATA_16 156 1 Z
+bit 156 C 1 *
+bit 155 B 1 DATA_1 154 1 Z
+bit 154 C 1 *
+bit 153 B 1 DATA_17 152 1 Z
+bit 152 C 1 *
+bit 151 B 1 DATA_2 150 1 Z
+bit 150 C 1 *
+bit 149 B 1 DATA_18 148 1 Z
+bit 148 C 1 *
+bit 147 B 1 DATA_3 146 1 Z
+bit 146 C 1 *
+bit 145 B 1 DATA_19 144 1 Z
+bit 144 C 1 *
+bit 143 B 1 DATA_4 142 1 Z
+bit 142 C 1 *
+bit 141 B 1 DATA_20 140 1 Z
+bit 140 C 1 *
+bit 139 B 1 DATA_5 138 1 Z
+bit 138 C 1 *
+bit 137 B 1 DATA_21 136 1 Z
+bit 136 C 1 *
+bit 135 B 1 DATA_6 134 1 Z
+bit 134 C 1 *
+bit 133 B 1 DATA_22 132 1 Z
+bit 132 C 1 *
+bit 131 B 1 DATA_23 130 1 Z
+bit 130 C 1 *
+bit 129 B 1 DATA_8 128 1 Z
+bit 128 C 1 *
+bit 127 B 1 DATA_7 126 1 Z
+bit 126 C 1 *
+bit 125 B 1 DATA_24 124 1 Z
+bit 124 C 1 *
+bit 123 B 1 DATA_9 122 1 Z
+bit 122 C 1 *
+bit 121 B 1 DATA_25 120 1 Z
+bit 120 C 1 *
+bit 119 B 1 DATA_26 118 1 Z
+bit 118 C 1 *
+bit 117 B 1 DATA_10 116 1 Z
+bit 116 C 1 *
+bit 115 B 1 DATA_27 114 1 Z
+bit 114 C 1 *
+bit 113 B 1 DATA_11 112 1 Z
+bit 112 C 1 *
+bit 111 B 1 DATA_28 110 1 Z
+bit 110 C 1 *
+bit 109 B 1 DATA_12 108 1 Z
+bit 108 C 1 *
+bit 107 B 1 DATA_29 106 1 Z
+bit 106 C 1 *
+bit 105 B 1 DATA_13 104 1 Z
+bit 104 C 1 *
+bit 103 B 1 DATA_15 102 1 Z
+bit 102 C 1 *
+bit 101 B 1 DATA_30 100 1 Z
+bit 100 C 1 *
+bit 99 B 1 DATA_14 98 1 Z
+bit 98 C 1 *
+bit 97 O 1 RP 96 1 Z
+bit 96 C 1 *
+bit 95 B 1 DATA_31 94 1 Z
+bit 94 C 1 *
+bit 93 O 1 DQM_0 92 1 Z
+bit 92 C 1 *
+bit 91 O 1 CAS 90 1 Z
+bit 90 C 1 *
+bit 89 O 1 WE 88 1 Z
+bit 88 C 1 *
+bit 87 O 1 DQM_1 86 1 Z
+bit 86 C 1 *
+bit 85 O 1 SDCS_0 84 1 Z
+bit 84 C 1 *
+bit 83 O 1 DQM_2 82 1 Z
+bit 82 C 1 *
+bit 81 O 1 DQM_3 80 1 Z
+bit 80 C 1 *
+bit 79 O 1 ADDR_5 78 1 Z
+bit 78 C 1 *
+bit 77 O 1 RAS 76 1 Z
+bit 76 C 1 *
+bit 75 O 1 SDCS_1 74 1 Z
+bit 74 C 1 *
+bit 73 O 1 ADDR_6 72 1 Z
+bit 72 C 1 *
+bit 71 O 1 ADDR_7 70 1 Z
+bit 70 C 1 *
+bit 69 O 1 ADDR_8 68 1 Z
+bit 68 C 1 *
+bit 67 O 1 ADDR_9 66 1 Z
+bit 66 C 1 *
+bit 65 O 1 ADDR_10 64 1 Z
+bit 64 C 1 *
+bit 63 O 1 ADDR_11 62 1 Z
+bit 62 C 1 *
+bit 61 O 1 ADDR_12 60 1 Z
+bit 60 C 1 *
+bit 59 O 1 ADDR_13 58 1 Z
+bit 58 C 1 *
+bit 57 O 1 ADDR_14 56 1 Z
+bit 56 C 1 *
+bit 55 O 1 DA10 54 1 Z
+bit 54 C 1 *
+bit 53 O 1 ADDR_16 52 1 Z
+bit 52 C 1 *
+bit 51 O 1 ADDR_19 50 1 Z
+bit 50 C 1 *
+bit 49 O 1 ADDR_18 48 1 Z
+bit 48 C 1 *
+bit 47 O 1 ADDR_17 46 1 Z
+bit 46 C 1 *
+bit 45 O 1 CKE 44 1 Z
+bit 44 C 1 *
+bit 43 O 1 SDCS_2 42 1 Z
+bit 42 C 1 *
+bit 41 O 1 *
+bit 40 O 1 *
+bit 39 O 1 SDCS_3 38 1 Z
+bit 38 C 1 *
+bit 37 O 1 SDCLK_0 36 1 Z
+bit 36 C 1 *
+bit 35 O 1 SDCLK_1 34 1 Z
+bit 34 C 1 *
+bit 33 O 1 *
+bit 32 O 1 *
+bit 31 O 1 SDCLKIN 30 1 Z
+bit 30 C 1 *
+bit 29 O 1 PIO_20 28 1 Z
+bit 28 C 1 *
+bit 27 O 1 *
+bit 26 O 1 *
+bit 25 O 1 PIO_19 24 1 Z
+bit 24 C 1 *
+bit 23 O 1 PIO_18 22 1 Z
+bit 22 C 1 *
+bit 21 O 1 PIO_23 20 1 Z
+bit 20 C 1 *
+bit 19 O 1 PIO_22 18 1 Z
+bit 18 C 1 *
+bit 17 O 1 PIO_21 16 1 Z
+bit 16 C 1 *
+bit 15 O 1 PIO_27 14 1 Z
+bit 14 C 1 *
+bit 13 O 1 PIO_29 12 1 Z
+bit 12 C 1 *
+bit 11 O 1 PIO_28 10 1 Z
+bit 10 C 1 *
+bit 9 O 1 PIO_30 8 1 Z
+bit 8 C 1 *
+bit 7 O 1 PIO_24 6 1 Z
+bit 6 C 1 *
+bit 5 O 1 PIO_31 4 1 Z
+bit 4 C 1 *
+bit 3 O 1 PIO_25 2 1 Z
+bit 2 C 1 *
+bit 1 O 1 PIO_26 0 1 Z
+bit 0 C 1 *
--- /dev/null
+#
+# $Id$
+#
+# Copyright (C) 2003 RightHand Technologies, Inc.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Andrew Dyer <adyer@righthandtech.com>, 2003.
+#
+
+# bits 31-28 of the Device Identification Register
+0000 tx4926 0
--- /dev/null
+#
+# $Id$
+#
+# JTAG declarations for Toshiba TX4926
+# Copyright (C) 2004 RightHand Technologies, Inc.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Andrew Dyer <adyer@righthandtech.com>, 2004.
+#
+# Documentation:
+# [1] Toshiba Corporation,
+# "64-Bit TX System RISC TX49 Family TMPR4926 Rev. 2.0"
+# [2] Toshiba Corporation, "BSDL file for TMPR4925"
+#
+signal VDDC0
+signal VDDC1
+signal VDDC2
+signal VDDC3
+signal VDDC4
+signal VDDC5
+signal VDDC6
+signal VDDC7
+signal VDDC8
+signal VDDC9
+signal VDDC10
+signal VDDC11
+signal VDDC12
+signal VDDC13
+signal VDDC14
+signal VDDC15
+signal VDDC16
+signal VDDC17
+signal VDDS0
+signal VDDS1
+signal VDDS2
+signal VDDS3
+signal VDDS4
+signal VDDS5
+signal VDDS6
+signal VDDS7
+signal VDDS8
+signal VDDS9
+signal VDDS10
+signal VDDS11
+signal VDDS12
+signal VDDS13
+signal VDDS14
+signal VDDS15
+signal VDDS16
+signal VDDS17
+signal VDDS18
+signal VDDS19
+signal VDDS20
+signal VSS0
+signal VSS1
+signal VSS2
+signal VSS3
+signal VSS4
+signal VSS5
+signal VSS6
+signal VSS7
+signal VSS8
+signal VSS9
+signal VSS10
+signal VSS11
+signal VSS12
+signal VSS13
+signal VSS14
+signal VSS15
+signal VSS16
+signal VSS17
+signal VSS18
+signal VSS19
+signal VSS20
+signal VSS21
+signal VSS22
+signal VSS23
+signal VSS24
+signal VSS25
+signal VSS26
+signal VSS27
+signal VSS28
+signal VSS29
+signal COLDRESET
+signal PON
+signal MSTRCLK
+signal TEST
+signal PLLVDD
+signal PLLVSS
+signal NMI
+signal SCANENB
+signal C32KIN
+signal SYSCLK
+signal BWE_3
+signal BWE_2
+signal BWE_1
+signal BWE_0
+signal SDCLK_1
+signal SDCLK_0
+signal SDCLKIN
+signal GNT_3
+signal GNT_2
+signal GNT_1
+signal GNT_0
+signal REQ_3
+signal REQ_2
+signal REQ_1
+signal REQ_0
+signal PERR
+signal SERR
+signal PCIAD_31
+signal PCIAD_30
+signal PCIAD_29
+signal PCIAD_28
+signal PCIAD_27
+signal PCIAD_26
+signal PCIAD_25
+signal PCIAD_24
+signal PCIAD_23
+signal PCIAD_22
+signal PCIAD_21
+signal PCIAD_20
+signal PCIAD_19
+signal PCIAD_18
+signal PCIAD_17
+signal PCIAD_16
+signal PCIAD_15
+signal PCIAD_14
+signal PCIAD_13
+signal PCIAD_12
+signal PCIAD_11
+signal PCIAD_10
+signal PCIAD_9
+signal PCIAD_8
+signal PCIAD_7
+signal PCIAD_6
+signal PCIAD_5
+signal PCIAD_4
+signal PCIAD_3
+signal PCIAD_2
+signal PCIAD_1
+signal PCIAD_0
+signal C_BE_3
+signal C_BE_2
+signal C_BE_1
+signal C_BE_0
+signal PAR
+signal FRAME
+signal TRDY
+signal IRDY
+signal IDSEL
+signal STOP
+signal DEVSEL
+signal PCICLK_2
+signal PCICLK_1
+signal PCICLKIO
+signal TDI
+signal TMS
+signal TCK
+signal TRST
+signal BC32K
+signal DATA_31
+signal DATA_30
+signal DATA_29
+signal DATA_28
+signal DATA_27
+signal DATA_26
+signal DATA_25
+signal DATA_24
+signal DATA_23
+signal DATA_22
+signal DATA_21
+signal DATA_20
+signal DATA_19
+signal DATA_18
+signal DATA_17
+signal DATA_16
+signal DATA_15
+signal DATA_14
+signal DATA_13
+signal DATA_12
+signal DATA_11
+signal DATA_10
+signal DATA_9
+signal DATA_8
+signal DATA_7
+signal DATA_6
+signal DATA_5
+signal DATA_4
+signal DATA_3
+signal DATA_2
+signal DATA_1
+signal DATA_0
+signal ADDR_19
+signal ADDR_18
+signal ADDR_17
+signal ADDR_16
+signal ADDR_15
+signal ADDR_14
+signal ADDR_13
+signal ADDR_12
+signal ADDR_11
+signal ADDR_10
+signal ADDR_9
+signal ADDR_8
+signal ADDR_7
+signal ADDR_6
+signal ADDR_5
+signal ADDR_4
+signal ADDR_3
+signal ADDR_2
+signal ADDR_1
+signal ADDR_0
+signal ACK
+signal ROMCE_3
+signal ROMCE_2
+signal ROMCE_1
+signal ROMCE_0
+signal PIO_31
+signal PIO_30
+signal PIO_29
+signal PIO_28
+signal PIO_27
+signal PIO_26
+signal PIO_25
+signal PIO_24
+signal PIO_23
+signal PIO_22
+signal PIO_21
+signal PIO_20
+signal PIO_19
+signal PIO_18
+signal PIO_17
+signal PIO_16
+signal PIO_15
+signal PIO_14
+signal PIO_13
+signal PIO_12
+signal PIO_11
+signal PIO_10
+signal PIO_9
+signal PIO_8
+signal PIO_7
+signal PIO_6
+signal PIO_5
+signal PIO_4
+signal PIO_3
+signal PIO_2
+signal PIO_1
+signal PIO_0
+signal BUSSPRT
+signal UAE
+signal SWE
+signal OE
+signal SDCS_3
+signal SDCS_2
+signal SDCS_1
+signal SDCS_0
+signal RAS
+signal CAS
+signal DQM_3
+signal DQM_2
+signal DQM_1
+signal DQM_0
+signal WE
+signal CKE
+signal DA10
+signal RP
+signal C32KOUT
+
+register BSR 356
+register BR 1
+register DIR 32
+register EJIMPCODE 32
+register EJADDRESS 36
+register EJDATA 64
+register EJCONTROL 32
+register EJALL 132
+
+instruction length 8
+
+instruction BYPASS 11111111 BR
+instruction SAMPLE/PRELOAD 00000001 BSR
+instruction EXTEST 00000000 BSR
+instruction IDCODE 00000011 DIR
+instruction EJTAG_IMPCODE 10000011 EJIMPCODE
+instruction EJTAG_ADDRESS 10001000 EJADDRESS
+instruction EJTAG_DATA 10001001 EJDATA
+instruction EJTAG_CONTROL 10001010 EJCONTROL
+instruction EJATG_ALL 10001011 EJALL
+# instruction PCTRACE 10010000 # docs are unclear about what this does
+
+bit 355 O 1 GNT_0 354 1 Z
+bit 354 C 1 *
+bit 353 O 0 PCICLKIO 352 1 Z
+bit 352 C 1 *
+bit 351 O 0 PCICLK_1 350 1 Z
+bit 350 C 1 *
+bit 349 O 0 PCICLK_2 348 1 Z
+bit 348 C 1 *
+bit 347 O 1 REQ_0 346 1 Z
+bit 346 C 1 *
+bit 345 O 1 GNT_1 344 1 Z
+bit 344 C 1 *
+bit 343 O 1 REQ_1 342 1 Z
+bit 342 C 1 *
+bit 341 O 1 GNT_2 340 1 Z
+bit 340 C 1 *
+bit 339 O 1 REQ_2 338 1 Z
+bit 338 C 1 *
+bit 337 O 1 GNT_3 336 1 Z
+bit 336 C 1 *
+bit 335 O 1 REQ_3 334 1 Z
+bit 334 C 1 *
+bit 333 O 1 PCIAD_31 332 1 Z
+bit 332 C 1 *
+bit 331 O 1 PCIAD_30 330 1 Z
+bit 330 C 1 *
+bit 329 O 1 PCIAD_29 328 1 Z
+bit 328 C 1 *
+bit 327 O 1 PCIAD_28 326 1 Z
+bit 326 C 1 *
+bit 325 O 1 PCIAD_27 324 1 Z
+bit 324 C 1 *
+bit 323 O 1 PCIAD_26 322 1 Z
+bit 322 C 1 *
+bit 321 O 1 PCIAD_25 320 1 Z
+bit 320 C 1 *
+bit 319 O 1 PCIAD_24 318 1 Z
+bit 318 C 1 *
+bit 317 O 1 C_BE_3 316 1 Z
+bit 316 C 1 *
+bit 315 O 1 IDSEL 314 1 Z
+bit 314 C 1 *
+bit 313 O 1 PCIAD_23 312 1 Z
+bit 312 C 1 *
+bit 311 O 1 PCIAD_22 310 1 Z
+bit 310 C 1 *
+bit 309 O 1 PCIAD_21 308 1 Z
+bit 308 C 1 *
+bit 307 O 1 PCIAD_20 306 1 Z
+bit 306 C 1 *
+bit 305 O 1 PCIAD_19 304 1 Z
+bit 304 C 1 *
+bit 303 O 1 PCIAD_17 302 1 Z
+bit 302 C 1 *
+bit 301 O 1 PCIAD_18 300 1 Z
+bit 300 C 1 *
+bit 299 O 1 FRAME 298 1 Z
+bit 298 C 1 *
+bit 297 O 1 C_BE_2 296 1 Z
+bit 296 C 1 *
+bit 295 O 1 PCIAD_16 294 1 Z
+bit 294 C 1 *
+bit 293 O 1 STOP 292 1 Z
+bit 292 C 1 *
+bit 291 O 1 DEVSEL 290 1 Z
+bit 290 C 1 *
+bit 289 O 1 TRDY 288 1 Z
+bit 288 C 1 *
+bit 287 O 1 IRDY 286 1 Z
+bit 286 C 1 *
+bit 285 O 1 SERR 284 1 Z
+bit 284 C 1 *
+bit 283 O 1 PERR 282 1 Z
+bit 282 C 1 *
+bit 281 O 1 PCIAD_15 280 1 Z
+bit 280 C 1 *
+bit 279 O 1 C_BE_1 278 1 Z
+bit 278 C 1 *
+bit 277 O 1 PAR 276 1 Z
+bit 276 C 1 *
+bit 275 O 1 PCIAD_12 274 1 Z
+bit 274 C 1 *
+bit 273 O 1 PCIAD_13 272 1 Z
+bit 272 C 1 *
+bit 271 O 1 PCIAD_14 270 1 Z
+bit 270 C 1 *
+bit 269 O 1 PCIAD_9 268 1 Z
+bit 268 C 1 *
+bit 267 O 1 PCIAD_10 266 1 Z
+bit 266 C 1 *
+bit 265 O 1 PCIAD_11 264 1 Z
+bit 264 C 1 *
+bit 263 O 1 C_BE_0 262 1 Z
+bit 262 C 1 *
+bit 261 O 1 PCIAD_8 260 1 Z
+bit 260 C 1 *
+bit 259 O 1 PCIAD_4 258 1 Z
+bit 258 C 1 *
+bit 257 O 1 PCIAD_0 256 1 Z
+bit 256 C 1 *
+bit 255 O 1 PCIAD_5 254 1 Z
+bit 254 C 1 *
+bit 253 O 1 PCIAD_1 252 1 Z
+bit 252 C 1 *
+bit 251 O 1 PCIAD_6 250 1 Z
+bit 250 C 1 *
+bit 249 O 1 PCIAD_2 248 1 Z
+bit 248 C 1 *
+bit 247 O 1 PCIAD_7 246 1 Z
+bit 246 C 1 *
+bit 245 O 1 PCIAD_3 244 1 Z
+bit 244 C 1 *
+bit 243 O 1 BWE_0 242 1 Z
+bit 242 C 1 *
+bit 241 O 1 BWE_1 240 1 Z
+bit 240 C 1 *
+bit 239 O 1 SYSCLK 238 1 Z
+bit 238 C 1 *
+bit 237 O 1 BWE_2 236 1 Z
+bit 236 C 1 *
+bit 235 O 1 BWE_3 234 1 Z
+bit 234 C 1 *
+bit 233 O 1 UAE 232 1 Z
+bit 232 C 1 *
+bit 231 O 1 SWE 230 1 Z
+bit 230 C 1 *
+bit 229 O 1 ADDR_0 228 1 Z
+bit 228 C 1 *
+bit 227 O 1 ADDR_1 226 1 Z
+bit 226 C 1 *
+bit 225 O 1 ADDR_2 224 1 Z
+bit 224 C 1 *
+bit 223 O 1 ADDR_3 222 1 Z
+bit 222 C 1 *
+bit 221 O 1 ADDR_4 220 1 Z
+bit 220 C 1 *
+bit 219 O 1 ROMCE_3 218 1 Z
+bit 218 C 1 *
+bit 217 O 1 ROMCE_2 216 1 Z
+bit 216 C 1 *
+bit 215 O 1 ADDR_15 214 1 Z
+bit 214 C 1 *
+bit 213 O 1 OE 212 1 Z
+bit 212 C 1 *
+bit 211 O 1 PIO_0 210 1 Z
+bit 210 C 1 *
+bit 209 O 1 PIO_2 208 1 Z
+bit 208 C 1 *
+bit 207 O 1 ROMCE_1 206 1 Z
+bit 206 C 1 *
+bit 205 O 1 ROMCE_0 204 1 Z
+bit 204 C 1 *
+bit 203 O 1 BUSSPRT 202 1 Z
+bit 202 C 1 *
+bit 201 O 1 PIO_4 200 1 Z
+bit 200 C 1 *
+bit 199 O 1 ACK 198 1 Z
+bit 198 C 1 *
+bit 197 O 1 PIO_3 196 1 Z
+bit 196 C 1 *
+bit 195 O 1 PIO_1 194 1 Z
+bit 194 C 1 *
+bit 193 O 1 PIO_11 192 1 Z
+bit 192 C 1 *
+bit 191 O 1 PIO_10 190 1 Z
+bit 190 C 1 *
+bit 189 O 1 PIO_5 188 1 Z
+bit 188 C 1 *
+bit 187 O 1 PIO_6 186 1 Z
+bit 186 C 1 *
+bit 185 O 1 PIO_8 184 1 Z
+bit 184 C 1 *
+bit 183 O 1 PIO_9 182 1 Z
+bit 182 C 1 *
+bit 181 O 1 PIO_12 180 1 Z
+bit 180 C 1 *
+bit 179 O 1 PIO_17 178 1 Z
+bit 178 C 1 *
+bit 177 O 1 PIO_13 176 1 Z
+bit 176 C 1 *
+bit 175 O 1 PIO_7 174 1 Z
+bit 174 C 1 *
+bit 173 O 1 PIO_14 172 1 Z
+bit 172 C 1 *
+bit 171 O 1 PIO_15 170 1 Z
+bit 170 C 1 *
+bit 169 O 1 PIO_16 168 1 Z
+bit 168 C 1 *
+bit 167 O 1 BC32K 166 1 Z
+bit 166 C 1 *
+bit 165 O 1 *
+bit 164 O 1 *
+bit 163 O 1 *
+bit 162 O 1 *
+bit 161 O 1 *
+bit 160 O 1 *
+bit 159 B 1 DATA_0 158 1 Z
+bit 158 C 1 *
+bit 157 B 1 DATA_16 156 1 Z
+bit 156 C 1 *
+bit 155 B 1 DATA_1 154 1 Z
+bit 154 C 1 *
+bit 153 B 1 DATA_17 152 1 Z
+bit 152 C 1 *
+bit 151 B 1 DATA_2 150 1 Z
+bit 150 C 1 *
+bit 149 B 1 DATA_18 148 1 Z
+bit 148 C 1 *
+bit 147 B 1 DATA_3 146 1 Z
+bit 146 C 1 *
+bit 145 B 1 DATA_19 144 1 Z
+bit 144 C 1 *
+bit 143 B 1 DATA_4 142 1 Z
+bit 142 C 1 *
+bit 141 B 1 DATA_20 140 1 Z
+bit 140 C 1 *
+bit 139 B 1 DATA_5 138 1 Z
+bit 138 C 1 *
+bit 137 B 1 DATA_21 136 1 Z
+bit 136 C 1 *
+bit 135 B 1 DATA_6 134 1 Z
+bit 134 C 1 *
+bit 133 B 1 DATA_22 132 1 Z
+bit 132 C 1 *
+bit 131 B 1 DATA_23 130 1 Z
+bit 130 C 1 *
+bit 129 B 1 DATA_8 128 1 Z
+bit 128 C 1 *
+bit 127 B 1 DATA_7 126 1 Z
+bit 126 C 1 *
+bit 125 B 1 DATA_24 124 1 Z
+bit 124 C 1 *
+bit 123 B 1 DATA_9 122 1 Z
+bit 122 C 1 *
+bit 121 B 1 DATA_25 120 1 Z
+bit 120 C 1 *
+bit 119 B 1 DATA_26 118 1 Z
+bit 118 C 1 *
+bit 117 B 1 DATA_10 116 1 Z
+bit 116 C 1 *
+bit 115 B 1 DATA_27 114 1 Z
+bit 114 C 1 *
+bit 113 B 1 DATA_11 112 1 Z
+bit 112 C 1 *
+bit 111 B 1 DATA_28 110 1 Z
+bit 110 C 1 *
+bit 109 B 1 DATA_12 108 1 Z
+bit 108 C 1 *
+bit 107 B 1 DATA_29 106 1 Z
+bit 106 C 1 *
+bit 105 B 1 DATA_13 104 1 Z
+bit 104 C 1 *
+bit 103 B 1 DATA_15 102 1 Z
+bit 102 C 1 *
+bit 101 B 1 DATA_30 100 1 Z
+bit 100 C 1 *
+bit 99 B 1 DATA_14 98 1 Z
+bit 98 C 1 *
+bit 97 O 1 RP 96 1 Z
+bit 96 C 1 *
+bit 95 B 1 DATA_31 94 1 Z
+bit 94 C 1 *
+bit 93 O 1 DQM_0 92 1 Z
+bit 92 C 1 *
+bit 91 O 1 CAS 90 1 Z
+bit 90 C 1 *
+bit 89 O 1 WE 88 1 Z
+bit 88 C 1 *
+bit 87 O 1 DQM_1 86 1 Z
+bit 86 C 1 *
+bit 85 O 1 SDCS_0 84 1 Z
+bit 84 C 1 *
+bit 83 O 1 DQM_2 82 1 Z
+bit 82 C 1 *
+bit 81 O 1 DQM_3 80 1 Z
+bit 80 C 1 *
+bit 79 O 1 ADDR_5 78 1 Z
+bit 78 C 1 *
+bit 77 O 1 RAS 76 1 Z
+bit 76 C 1 *
+bit 75 O 1 SDCS_1 74 1 Z
+bit 74 C 1 *
+bit 73 O 1 ADDR_6 72 1 Z
+bit 72 C 1 *
+bit 71 O 1 ADDR_7 70 1 Z
+bit 70 C 1 *
+bit 69 O 1 ADDR_8 68 1 Z
+bit 68 C 1 *
+bit 67 O 1 ADDR_9 66 1 Z
+bit 66 C 1 *
+bit 65 O 1 ADDR_10 64 1 Z
+bit 64 C 1 *
+bit 63 O 1 ADDR_11 62 1 Z
+bit 62 C 1 *
+bit 61 O 1 ADDR_12 60 1 Z
+bit 60 C 1 *
+bit 59 O 1 ADDR_13 58 1 Z
+bit 58 C 1 *
+bit 57 O 1 ADDR_14 56 1 Z
+bit 56 C 1 *
+bit 55 O 1 DA10 54 1 Z
+bit 54 C 1 *
+bit 53 O 1 ADDR_16 52 1 Z
+bit 52 C 1 *
+bit 51 O 1 ADDR_19 50 1 Z
+bit 50 C 1 *
+bit 49 O 1 ADDR_18 48 1 Z
+bit 48 C 1 *
+bit 47 O 1 ADDR_17 46 1 Z
+bit 46 C 1 *
+bit 45 O 1 CKE 44 1 Z
+bit 44 C 1 *
+bit 43 O 1 SDCS_2 42 1 Z
+bit 42 C 1 *
+bit 41 O 1 *
+bit 40 O 1 *
+bit 39 O 1 SDCS_3 38 1 Z
+bit 38 C 1 *
+bit 37 O 1 SDCLK_0 36 1 Z
+bit 36 C 1 *
+bit 35 O 1 SDCLK_1 34 1 Z
+bit 34 C 1 *
+bit 33 O 1 *
+bit 32 O 1 *
+bit 31 O 1 SDCLKIN 30 1 Z
+bit 30 C 1 *
+bit 29 O 1 PIO_20 28 1 Z
+bit 28 C 1 *
+bit 27 O 1 *
+bit 26 O 1 *
+bit 25 O 1 PIO_19 24 1 Z
+bit 24 C 1 *
+bit 23 O 1 PIO_18 22 1 Z
+bit 22 C 1 *
+bit 21 O 1 PIO_23 20 1 Z
+bit 20 C 1 *
+bit 19 O 1 PIO_22 18 1 Z
+bit 18 C 1 *
+bit 17 O 1 PIO_21 16 1 Z
+bit 16 C 1 *
+bit 15 O 1 PIO_27 14 1 Z
+bit 14 C 1 *
+bit 13 O 1 PIO_29 12 1 Z
+bit 12 C 1 *
+bit 11 O 1 PIO_28 10 1 Z
+bit 10 C 1 *
+bit 9 O 1 PIO_30 8 1 Z
+bit 8 C 1 *
+bit 7 O 1 PIO_24 6 1 Z
+bit 6 C 1 *
+bit 5 O 1 PIO_31 4 1 Z
+bit 4 C 1 *
+bit 3 O 1 PIO_25 2 1 Z
+bit 2 C 1 *
+bit 1 O 1 PIO_26 0 1 Z
+bit 0 C 1 *
--- /dev/null
+#
+# $Id$
+#
+# Copyright (C) 2002 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Marcel Telka <marcel@telka.sk>, 2002.
+#
+
+# bits 27-12 of the Device Identification Register
+0100100000001110 xcr3032xl-vq44 XCR3032XL-VQ44
+0100100010001001 xcr3128xl-vq100 XCR3128XL-VQ100
+0100100010001011 . XCR3128XL-TQ144
+0100100010001100 xcr3128xl-cs144 XCR3128XL-CS144
+0100100101001110 xcr3256xl-ft256 XCR3256XL-FT256
+0110110101001010 xc2c256-vq100 XC2C256-VQ100
+0110110101001100 xc2c256-tq144 XC2C256-TQ144
+0110111001011110 xc2c64a-vq44 XC2C64-VQ44
+0000101000100000 xc2s300e XC2S300E
+0001010000001101 xc3s50 xc3s50
+0001010000010100 xc3s200 xc3s200
+0001010000011100 xc3s400 xc3s400
+0001010000101000 xc3s1000 xc3s1000
+0001010000110100 xc3s1500 xc3s1500
+0001010001000000 xc3s2000 xc3s2000
+0001010001001000 xc3s4000 xc3s4000
+0001010001010000 xc3s5000 xc3s5000
+0001110000010000 xc3s100e_die xc3s100e_die
+0001110000100010 xc3s500e_fg320 xc3s500e_fg320
+0101000001000100 xcf01s xcf01s
+0101000001000101 xcf02s xcf02s
+0101000001000110 xcf04s xcf04s
+0101000001010111 xcf08p xcf08p
+0101000001011000 xcf16p xcf16p
+0101000001011001 xcf32p xcf32p
+0001011001011000 xc4vlx15 xc4vlx15
+0001011001111100 xc4vlx25 xc4vlx25
+0001011010100100 xc4vlx40 xc4vlx40
+0001011010110100 xc4vlx60 xc4vlx60
+0001011011011000 xc4vlx80 xc4vlx80
+0001011100000000 xc4vlx100 xc4vlx100
+0001011100011000 xc4vlx160 xc4vlx160
+0001011100110100 xc4vlx200 xc4vlx200
+0001111001011000 xc4vfx12 xc4vfx12
+0001111001100100 xc4vfx20 xc4vfx20
+0001111010110100 xc4vfx60 xc4vfx60
+0010000001101000 xc4vsx25 xc4vsx25
+0010000010001000 xc4vsx35 xc4vsx35
+0010000010110000 xc4vsx55 xc4vsx55
+0000101000011100 xc2s200e-pq208 XC2S200E-PQ208
+1001011000000100 xc9572xl_vq44 XC9572XL_VQ44
+0101000000100110 xc18v04pc44 XC18V04_PC44
+0001000000010000 xc2v80-fg256 XC2V80-FG256
+0001000000011000 xc2v250-fg256 XC2V250-FG256
+0001000000101000 xc2v1000-fg256 XC2V1000-FG256
--- /dev/null
+#
+# $Id: STEPPINGS,v 1.1 2003/02/14 11:14:56 telka Exp $
+#
+# Copyright (C) 2003 Tower Technologies s.r.l.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Alessandro Zummo <azummo@towertech.it>, 2003.
+# DJF:w
+
+# bits 31-28 of the Device Identification Register
+0000 xc18v04pc44 0
--- /dev/null
+signal TDI 9
+signal TMS 11
+signal Gnd_2 12
+signal TCK 13
+signal Vcco_1 14
+signal D4 15
+signal CF 16
+signal Reset_OE 19
+signal D6 31
+signal CE 21
+signal Vcco_2 22
+signal Vcc_1 23
+signal Gnd_3 24
+signal D7 25
+signal CEO 27
+signal D5 31
+signal Vcco_3 32
+signal D3 33
+signal Gnd_4 34
+signal D1 35
+signal TDO 37
+signal Vpp
+signal Vcco_4 42
+signal Vcc_2 41
+signal D0 2
+signal Gnd_1 3
+signal D2 4
+signal CLK 5
+
+register BSR 25
+register BR 1
+register DIR 32
+
+instruction length 8
+
+instruction BYPASS 11111111 BR
+instruction SAMPLE/PRELOAD 00000001 BSR
+instruction EXTEST 00000000 BSR
+instruction IDCODE 11111110 DIR
+
+bit 24 O 1 D4 23 0 Z
+bit 23 C 0 *
+bit 22 O 1 CF 21 0 Z
+bit 21 C 0 *
+bit 20 I 1 Reset_OE
+bit 19 O 1 Reset_OE 18 0 Z
+bit 18 C 0 *
+bit 17 O 1 D6 16 0 Z
+bit 16 C 0 *
+bit 15 I 1 CE
+bit 14 O 1 D7 13 0 Z
+bit 13 C 0 *
+bit 12 O 1 CEO 11 0 Z
+bit 11 C 0 *
+bit 10 O 1 D5 9 0 Z
+bit 9 C 0 *
+bit 8 O 1 D3 7 0 Z
+bit 7 C 0 *
+bit 6 O 1 D1 5 0 Z
+bit 5 C 0 *
+bit 4 O 1 D0 3 0 Z
+bit 3 C 0 *
+bit 2 O 1 D2 1 0 Z
+bit 1 C 0 *
+bit 0 I 1 CLK
--- /dev/null
+#
+# $Id$
+#
+# Copyright (C) 2003 Tower Technologies s.r.l.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Alessandro Zummo <azummo@towertech.it>, 2003.
+#
+
+# bits 31-28 of the Device Identification Register
+0000 xc2c256-tq144 0
--- /dev/null
+#
+# $Id$
+#
+# JTAG declarations for XC2C256-TQ144
+# Copyright (C) 2003 Tower Technologies s.r.l.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Alessandro Zummo <azummo@towertech.it>, 2003.
+#
+# Documentation:
+# [1] Xilinx Inc., "CoolRunner-II CPLD Family Advance Product Specification",
+# DS090 (v1.3) September 24, 2002
+# [2] Xilinx Inc., "BSDL file for device XC2C256, package TQ144
+# Revision: 1.5", 2002-10-08
+# [3] Xilinx Inc., "XC2C256 CoolRunner-II CPLD Advance Product Specification",
+# DS094 (v1.2) November 20, 2002
+
+# see [2]
+
+signal tdi 63
+signal tck 67
+signal tms 65
+signal tdo 122
+signal IO_2 143
+signal IO_3 142
+signal IO_5 140
+signal IO_6 139
+signal IO_7 138
+signal IO_8 137
+signal IO_11 2
+signal IO_13 3
+signal IO_14 4
+signal IO_15 5
+signal IO_17 6
+signal IO_18 7
+signal IO_19 9
+signal IO_20 10
+signal IO_22 136
+signal IO_23 135
+signal IO_24 134
+signal IO_26 133
+signal IO_30 132
+signal IO_32 131
+signal IO_33 11
+signal IO_34 12
+signal IO_35 13
+signal IO_36 14
+signal IO_37 15
+signal IO_38 16
+signal IO_39 17
+signal IO_41 18
+signal IO_45 33
+signal IO_47 32
+signal IO_48 31
+signal IO_49 30
+signal IO_52 28
+signal IO_55 34
+signal IO_56 35
+signal IO_58 38
+signal IO_61 39
+signal IO_62 40
+signal IO_63 41
+signal IO_64 42
+signal IO_65 43
+signal IO_70 26
+signal IO_71 25
+signal IO_72 24
+signal IO_73 23
+signal IO_74 22
+signal IO_75 21
+signal IO_76 20
+signal IO_77 19
+signal IO_78 44
+signal IO_79 45
+signal IO_80 46
+signal IO_82 48
+signal IO_83 49
+signal IO_84 50
+signal IO_85 51
+signal IO_86 52
+signal IO_90 112
+signal IO_91 113
+signal IO_93 114
+signal IO_95 115
+signal IO_97 116
+signal IO_98 117
+signal IO_99 118
+signal IO_100 119
+signal IO_102 111
+signal IO_103 110
+signal IO_104 107
+signal IO_105 106
+signal IO_106 105
+signal IO_107 104
+signal IO_109 103
+signal IO_111 102
+signal IO_113 101
+signal IO_118 120
+signal IO_119 121
+signal IO_120 124
+signal IO_121 125
+signal IO_122 126
+signal IO_123 128
+signal IO_124 129
+signal IO_125 130
+signal IO_127 100
+signal IO_132 98
+signal IO_133 97
+signal IO_134 96
+signal IO_135 95
+signal IO_136 94
+signal IO_138 75
+signal IO_139 76
+signal IO_140 77
+signal IO_142 78
+signal IO_143 79
+signal IO_144 80
+signal IO_145 81
+signal IO_146 82
+signal IO_149 74
+signal IO_150 71
+signal IO_151 70
+signal IO_152 69
+signal IO_154 68
+signal IO_156 66
+signal IO_157 64
+signal IO_159 61
+signal IO_161 83
+signal IO_166 85
+signal IO_167 86
+signal IO_168 87
+signal IO_169 88
+signal IO_170 91
+signal IO_171 92
+signal IO_176 60
+signal IO_177 59
+signal IO_178 58
+signal IO_179 57
+signal IO_180 56
+signal IO_182 54
+signal IO_183 53
+
+# mandatory data registers
+register BSR 552 # see [2]
+register BR 1
+
+# optional data registers
+register DIR 32
+
+# user-defined registers
+register ISPSR 274 # ISP (In-System Programming) Shift Register, see [2]
+
+
+# instructions - see [2]
+instruction length 8
+
+# mandatory instructions - see [2]
+instruction EXTEST 00000000 BSR
+instruction SAMPLE/PRELOAD 00000011 BSR
+instruction BYPASS 11111111 BR
+instruction INTEST 00000010 BSR
+instruction IDCODE 00000001 DIR
+instruction USERCODE 11111101 DIR
+instruction HIGHZ 11111100 BR
+instruction CLAMP 11111010 BR
+
+# user-defined instructions - see [2]
+instruction ISC_ENABLE_CLAMP 11101001 BR
+instruction ISC_ENABLEOTF 11100100 ISPSR
+instruction ISC_ENABLE 11101000 ISPSR
+instruction ISC_SRAM_READ 11100111 ISPSR
+instruction ISC_SRAM_WRITE 11100110 ISPSR
+instruction ISC_ERASE 11101101 ISPSR
+instruction ISC_PROGRAM 11101010 ISPSR
+instruction ISC_READ 11101110 ISPSR
+instruction ISC_INIT 11110000 ISPSR
+instruction ISC_DISABLE 11000000 ISPSR
+instruction TEST_ENABLE 00010001 ISPSR
+instruction BULKPROG 00010010 ISPSR
+instruction ERASE_ALL 00010100 ISPSR
+instruction MVERIFY 00010011 ISPSR
+instruction TEST_DISABLE 00010101 ISPSR
+instruction ISC_NOOP 11100000 BR
+
+
+# see [2]
+bit 551 X ? .
+bit 550 X ? .
+bit 549 X ? .
+bit 548 X ? .
+bit 547 X ? .
+bit 546 X ? .
+bit 545 I ? IO_2
+bit 544 O ? IO_2 543 0 Z
+bit 543 C ? .
+bit 542 I ? IO_3
+bit 541 O ? IO_3 540 0 Z
+bit 540 C ? .
+bit 539 X ? .
+bit 538 X ? .
+bit 537 X ? .
+bit 536 I ? IO_5
+bit 535 O ? IO_5 534 0 Z
+bit 534 C ? .
+bit 533 I ? IO_6
+bit 532 O ? IO_6 531 0 Z
+bit 531 C ? .
+bit 530 I ? IO_7
+bit 529 O ? IO_7 528 0 Z
+bit 528 C ? .
+bit 527 I ? IO_8
+bit 526 O ? IO_8 525 0 Z
+bit 525 C ? .
+bit 524 X ? .
+bit 523 X ? .
+bit 522 X ? .
+bit 521 X ? .
+bit 520 X ? .
+bit 519 X ? .
+bit 518 I ? IO_22
+bit 517 O ? IO_22 516 0 Z
+bit 516 C ? .
+bit 515 I ? IO_23
+bit 514 O ? IO_23 513 0 Z
+bit 513 C ? .
+bit 512 I ? IO_24
+bit 511 O ? IO_24 510 0 Z
+bit 510 C ? .
+bit 509 X ? .
+bit 508 X ? .
+bit 507 X ? .
+bit 506 I ? IO_26
+bit 505 O ? IO_26 504 0 Z
+bit 504 C ? .
+bit 503 X ? .
+bit 502 X ? .
+bit 501 X ? .
+bit 500 X ? .
+bit 499 X ? .
+bit 498 X ? .
+bit 497 X ? .
+bit 496 X ? .
+bit 495 X ? .
+bit 494 I ? IO_30
+bit 493 O ? IO_30 492 0 Z
+bit 492 C ? .
+bit 491 X ? .
+bit 490 X ? .
+bit 489 X ? .
+bit 488 I ? IO_32
+bit 487 O ? IO_32 486 0 Z
+bit 486 C ? .
+bit 485 I ? IO_11
+bit 484 O ? IO_11 483 0 Z
+bit 483 C ? .
+bit 482 X ? .
+bit 481 X ? .
+bit 480 X ? .
+bit 479 I ? IO_13
+bit 478 O ? IO_13 477 0 Z
+bit 477 C ? .
+bit 476 I ? IO_14
+bit 475 O ? IO_14 474 0 Z
+bit 474 C ? .
+bit 473 I ? IO_15
+bit 472 O ? IO_15 471 0 Z
+bit 471 C ? .
+bit 470 X ? .
+bit 469 X ? .
+bit 468 X ? .
+bit 467 I ? IO_17
+bit 466 O ? IO_17 465 0 Z
+bit 465 C ? .
+bit 464 I ? IO_18
+bit 463 O ? IO_18 462 0 Z
+bit 462 C ? .
+bit 461 I ? IO_19
+bit 460 O ? IO_19 459 0 Z
+bit 459 C ? .
+bit 458 I ? IO_20
+bit 457 O ? IO_20 456 0 Z
+bit 456 C ? .
+bit 455 X ? .
+bit 454 X ? .
+bit 453 X ? .
+bit 452 I ? IO_33
+bit 451 O ? IO_33 450 0 Z
+bit 450 C ? .
+bit 449 I ? IO_34
+bit 448 O ? IO_34 447 0 Z
+bit 447 C ? .
+bit 446 I ? IO_35
+bit 445 O ? IO_35 444 0 Z
+bit 444 C ? .
+bit 443 I ? IO_36
+bit 442 O ? IO_36 441 0 Z
+bit 441 C ? .
+bit 440 I ? IO_37
+bit 439 O ? IO_37 438 0 Z
+bit 438 C ? .
+bit 437 I ? IO_38
+bit 436 O ? IO_38 435 0 Z
+bit 435 C ? .
+bit 434 I ? IO_39
+bit 433 O ? IO_39 432 0 Z
+bit 432 C ? .
+bit 431 X ? .
+bit 430 X ? .
+bit 429 X ? .
+bit 428 I ? IO_41
+bit 427 O ? IO_41 426 0 Z
+bit 426 C ? .
+bit 425 X ? .
+bit 424 X ? .
+bit 423 X ? .
+bit 422 X ? .
+bit 421 X ? .
+bit 420 X ? .
+bit 419 X ? .
+bit 418 X ? .
+bit 417 X ? .
+bit 416 I ? IO_45
+bit 415 O ? IO_45 414 0 Z
+bit 414 C ? .
+bit 413 X ? .
+bit 412 X ? .
+bit 411 X ? .
+bit 410 I ? IO_47
+bit 409 O ? IO_47 408 0 Z
+bit 408 C ? .
+bit 407 I ? IO_48
+bit 406 O ? IO_48 405 0 Z
+bit 405 C ? .
+bit 404 I ? IO_49
+bit 403 O ? IO_49 402 0 Z
+bit 402 C ? .
+bit 401 X ? .
+bit 400 X ? .
+bit 399 X ? .
+bit 398 X ? .
+bit 397 X ? .
+bit 396 X ? .
+bit 395 I ? IO_52
+bit 394 O ? IO_52 393 0 Z
+bit 393 C ? .
+bit 392 X ? .
+bit 391 X ? .
+bit 390 X ? .
+bit 389 X ? .
+bit 388 X ? .
+bit 387 X ? .
+bit 386 X ? .
+bit 385 X ? .
+bit 384 X ? .
+bit 383 X ? .
+bit 382 X ? .
+bit 381 X ? .
+bit 380 X ? .
+bit 379 X ? .
+bit 378 X ? .
+bit 377 X ? .
+bit 376 X ? .
+bit 375 X ? .
+bit 374 I ? IO_70
+bit 373 O ? IO_70 372 0 Z
+bit 372 C ? .
+bit 371 I ? IO_71
+bit 370 O ? IO_71 369 0 Z
+bit 369 C ? .
+bit 368 I ? IO_72
+bit 367 O ? IO_72 366 0 Z
+bit 366 C ? .
+bit 365 I ? IO_73
+bit 364 O ? IO_73 363 0 Z
+bit 363 C ? .
+bit 362 I ? IO_74
+bit 361 O ? IO_74 360 0 Z
+bit 360 C ? .
+bit 359 I ? IO_75
+bit 358 O ? IO_75 357 0 Z
+bit 357 C ? .
+bit 356 I ? IO_76
+bit 355 O ? IO_76 354 0 Z
+bit 354 C ? .
+bit 353 I ? IO_77
+bit 352 O ? IO_77 351 0 Z
+bit 351 C ? .
+bit 350 I ? IO_55
+bit 349 O ? IO_55 348 0 Z
+bit 348 C ? .
+bit 347 I ? IO_56
+bit 346 O ? IO_56 345 0 Z
+bit 345 C ? .
+bit 344 X ? .
+bit 343 X ? .
+bit 342 X ? .
+bit 341 I ? IO_58
+bit 340 O ? IO_58 339 0 Z
+bit 339 C ? .
+bit 338 X ? .
+bit 337 X ? .
+bit 336 X ? .
+bit 335 X ? .
+bit 334 X ? .
+bit 333 X ? .
+bit 332 I ? IO_61
+bit 331 O ? IO_61 330 0 Z
+bit 330 C ? .
+bit 329 I ? IO_62
+bit 328 O ? IO_62 327 0 Z
+bit 327 C ? .
+bit 326 I ? IO_63
+bit 325 O ? IO_63 324 0 Z
+bit 324 C ? .
+bit 323 I ? IO_64
+bit 322 O ? IO_64 321 0 Z
+bit 321 C ? .
+bit 320 I ? IO_65
+bit 319 O ? IO_65 318 0 Z
+bit 318 C ? .
+bit 317 I ? IO_78
+bit 316 O ? IO_78 315 0 Z
+bit 315 C ? .
+bit 314 I ? IO_79
+bit 313 O ? IO_79 312 0 Z
+bit 312 C ? .
+bit 311 I ? IO_80
+bit 310 O ? IO_80 309 0 Z
+bit 309 C ? .
+bit 308 X ? .
+bit 307 X ? .
+bit 306 X ? .
+bit 305 I ? IO_82
+bit 304 O ? IO_82 303 0 Z
+bit 303 C ? .
+bit 302 I ? IO_83
+bit 301 O ? IO_83 300 0 Z
+bit 300 C ? .
+bit 299 I ? IO_84
+bit 298 O ? IO_84 297 0 Z
+bit 297 C ? .
+bit 296 I ? IO_85
+bit 295 O ? IO_85 294 0 Z
+bit 294 C ? .
+bit 293 I ? IO_86
+bit 292 O ? IO_86 291 0 Z
+bit 291 C ? .
+bit 290 X ? .
+bit 289 X ? .
+bit 288 X ? .
+bit 287 X ? .
+bit 286 X ? .
+bit 285 X ? .
+bit 284 X ? .
+bit 283 X ? .
+bit 282 X ? .
+bit 281 I ? IO_90
+bit 280 O ? IO_90 279 0 Z
+bit 279 C ? .
+bit 278 I ? IO_91
+bit 277 O ? IO_91 276 0 Z
+bit 276 C ? .
+bit 275 X ? .
+bit 274 X ? .
+bit 273 X ? .
+bit 272 I ? IO_93
+bit 271 O ? IO_93 270 0 Z
+bit 270 C ? .
+bit 269 X ? .
+bit 268 X ? .
+bit 267 X ? .
+bit 266 I ? IO_95
+bit 265 O ? IO_95 264 0 Z
+bit 264 C ? .
+bit 263 X ? .
+bit 262 X ? .
+bit 261 X ? .
+bit 260 I ? IO_97
+bit 259 O ? IO_97 258 0 Z
+bit 258 C ? .
+bit 257 I ? IO_98
+bit 256 O ? IO_98 255 0 Z
+bit 255 C ? .
+bit 254 I ? IO_99
+bit 253 O ? IO_99 252 0 Z
+bit 252 C ? .
+bit 251 I ? IO_100
+bit 250 O ? IO_100 249 0 Z
+bit 249 C ? .
+bit 248 X ? .
+bit 247 X ? .
+bit 246 X ? .
+bit 245 X ? .
+bit 244 X ? .
+bit 243 X ? .
+bit 242 X ? .
+bit 241 X ? .
+bit 240 X ? .
+bit 239 X ? .
+bit 238 X ? .
+bit 237 X ? .
+bit 236 X ? .
+bit 235 X ? .
+bit 234 X ? .
+bit 233 I ? IO_118
+bit 232 O ? IO_118 231 0 Z
+bit 231 C ? .
+bit 230 I ? IO_119
+bit 229 O ? IO_119 228 0 Z
+bit 228 C ? .
+bit 227 I ? IO_120
+bit 226 O ? IO_120 225 0 Z
+bit 225 C ? .
+bit 224 I ? IO_121
+bit 223 O ? IO_121 222 0 Z
+bit 222 C ? .
+bit 221 I ? IO_122
+bit 220 O ? IO_122 219 0 Z
+bit 219 C ? .
+bit 218 I ? IO_123
+bit 217 O ? IO_123 216 0 Z
+bit 216 C ? .
+bit 215 I ? IO_124
+bit 214 O ? IO_124 213 0 Z
+bit 213 C ? .
+bit 212 I ? IO_125
+bit 211 O ? IO_125 210 0 Z
+bit 210 C ? .
+bit 209 I ? IO_102
+bit 208 O ? IO_102 207 0 Z
+bit 207 C ? .
+bit 206 I ? IO_103
+bit 205 O ? IO_103 204 0 Z
+bit 204 C ? .
+bit 203 I ? IO_104
+bit 202 O ? IO_104 201 0 Z
+bit 201 C ? .
+bit 200 I ? IO_105
+bit 199 O ? IO_105 198 0 Z
+bit 198 C ? .
+bit 197 I ? IO_106
+bit 196 O ? IO_106 195 0 Z
+bit 195 C ? .
+bit 194 I ? IO_107
+bit 193 O ? IO_107 192 0 Z
+bit 192 C ? .
+bit 191 X ? .
+bit 190 X ? .
+bit 189 X ? .
+bit 188 I ? IO_109
+bit 187 O ? IO_109 186 0 Z
+bit 186 C ? .
+bit 185 X ? .
+bit 184 X ? .
+bit 183 X ? .
+bit 182 I ? IO_111
+bit 181 O ? IO_111 180 0 Z
+bit 180 C ? .
+bit 179 X ? .
+bit 178 X ? .
+bit 177 X ? .
+bit 176 I ? IO_113
+bit 175 O ? IO_113 174 0 Z
+bit 174 C ? .
+bit 173 X ? .
+bit 172 X ? .
+bit 171 X ? .
+bit 170 I ? IO_127
+bit 169 O ? IO_127 168 0 Z
+bit 168 C ? .
+bit 167 X ? .
+bit 166 X ? .
+bit 165 X ? .
+bit 164 X ? .
+bit 163 X ? .
+bit 162 X ? .
+bit 161 X ? .
+bit 160 X ? .
+bit 159 X ? .
+bit 158 X ? .
+bit 157 X ? .
+bit 156 X ? .
+bit 155 I ? IO_132
+bit 154 O ? IO_132 153 0 Z
+bit 153 C ? .
+bit 152 I ? IO_133
+bit 151 O ? IO_133 150 0 Z
+bit 150 C ? .
+bit 149 I ? IO_134
+bit 148 O ? IO_134 147 0 Z
+bit 147 C ? .
+bit 146 I ? IO_135
+bit 145 O ? IO_135 144 0 Z
+bit 144 C ? .
+bit 143 I ? IO_136
+bit 142 O ? IO_136 141 0 Z
+bit 141 C ? .
+bit 140 X ? .
+bit 139 X ? .
+bit 138 X ? .
+bit 137 I ? IO_138
+bit 136 O ? IO_138 135 0 Z
+bit 135 C ? .
+bit 134 I ? IO_139
+bit 133 O ? IO_139 132 0 Z
+bit 132 C ? .
+bit 131 I ? IO_140
+bit 130 O ? IO_140 129 0 Z
+bit 129 C ? .
+bit 128 X ? .
+bit 127 X ? .
+bit 126 X ? .
+bit 125 I ? IO_142
+bit 124 O ? IO_142 123 0 Z
+bit 123 C ? .
+bit 122 I ? IO_143
+bit 121 O ? IO_143 120 0 Z
+bit 120 C ? .
+bit 119 I ? IO_144
+bit 118 O ? IO_144 117 0 Z
+bit 117 C ? .
+bit 116 I ? IO_145
+bit 115 O ? IO_145 114 0 Z
+bit 114 C ? .
+bit 113 I ? IO_146
+bit 112 O ? IO_146 111 0 Z
+bit 111 C ? .
+bit 110 X ? .
+bit 109 X ? .
+bit 108 X ? .
+bit 107 X ? .
+bit 106 X ? .
+bit 105 X ? .
+bit 104 X ? .
+bit 103 X ? .
+bit 102 X ? .
+bit 101 I ? IO_161
+bit 100 O ? IO_161 99 0 Z
+bit 99 C ? .
+bit 98 X ? .
+bit 97 X ? .
+bit 96 X ? .
+bit 95 X ? .
+bit 94 X ? .
+bit 93 X ? .
+bit 92 X ? .
+bit 91 X ? .
+bit 90 X ? .
+bit 89 X ? .
+bit 88 X ? .
+bit 87 X ? .
+bit 86 I ? IO_166
+bit 85 O ? IO_166 84 0 Z
+bit 84 C ? .
+bit 83 I ? IO_167
+bit 82 O ? IO_167 81 0 Z
+bit 81 C ? .
+bit 80 I ? IO_168
+bit 79 O ? IO_168 78 0 Z
+bit 78 C ? .
+bit 77 I ? IO_169
+bit 76 O ? IO_169 75 0 Z
+bit 75 C ? .
+bit 74 I ? IO_170
+bit 73 O ? IO_170 72 0 Z
+bit 72 C ? .
+bit 71 I ? IO_171
+bit 70 O ? IO_171 69 0 Z
+bit 69 C ? .
+bit 68 I ? IO_149
+bit 67 O ? IO_149 66 0 Z
+bit 66 C ? .
+bit 65 I ? IO_150
+bit 64 O ? IO_150 63 0 Z
+bit 63 C ? .
+bit 62 I ? IO_151
+bit 61 O ? IO_151 60 0 Z
+bit 60 C ? .
+bit 59 I ? IO_152
+bit 58 O ? IO_152 57 0 Z
+bit 57 C ? .
+bit 56 X ? .
+bit 55 X ? .
+bit 54 X ? .
+bit 53 I ? IO_154
+bit 52 O ? IO_154 51 0 Z
+bit 51 C ? .
+bit 50 X ? .
+bit 49 X ? .
+bit 48 X ? .
+bit 47 I ? IO_156
+bit 46 O ? IO_156 45 0 Z
+bit 45 C ? .
+bit 44 I ? IO_157
+bit 43 O ? IO_157 42 0 Z
+bit 42 C ? .
+bit 41 X ? .
+bit 40 X ? .
+bit 39 X ? .
+bit 38 I ? IO_159
+bit 37 O ? IO_159 36 0 Z
+bit 36 C ? .
+bit 35 X ? .
+bit 34 X ? .
+bit 33 X ? .
+bit 32 X ? .
+bit 31 X ? .
+bit 30 X ? .
+bit 29 X ? .
+bit 28 X ? .
+bit 27 X ? .
+bit 26 X ? .
+bit 25 X ? .
+bit 24 X ? .
+bit 23 I ? IO_176
+bit 22 O ? IO_176 21 0 Z
+bit 21 C ? .
+bit 20 I ? IO_177
+bit 19 O ? IO_177 18 0 Z
+bit 18 C ? .
+bit 17 I ? IO_178
+bit 16 O ? IO_178 15 0 Z
+bit 15 C ? .
+bit 14 I ? IO_179
+bit 13 O ? IO_179 12 0 Z
+bit 12 C ? .
+bit 11 I ? IO_180
+bit 10 O ? IO_180 9 0 Z
+bit 9 C ? .
+bit 8 X ? .
+bit 7 X ? .
+bit 6 X ? .
+bit 5 I ? IO_182
+bit 4 O ? IO_182 3 0 Z
+bit 3 C ? .
+bit 2 I ? IO_183
+bit 1 O ? IO_183 0 0 Z
+bit 0 C ? .
--- /dev/null
+#
+# $Id: STEPPINGS,v 1.1 2003/02/14 11:14:56 telka Exp $
+#
+# Copyright (C) 2003 Tower Technologies s.r.l.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Kolja Waschk, ixo.de, 2007
+#
+
+# bits 31-28 of the Device Identification Register
+0000 xc2c256-vq100 0
+0001 xc2c256-vq100 1
--- /dev/null
+#
+# $Id: xc2c256-tq144,v 1.2 2003/08/13 09:24:36 telka Exp $
+#
+# JTAG declarations for XC2C256-VQ100
+#
+# Based on the declarations for XC2C256-TQ144,
+# Written by Alessandro Zummo <azummo@towertech.it>, 2003.
+# Copyright (C) 2003 Tower Technologies s.r.l.,
+# and bsdl2jtag output with Xilinx file [2] as input.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Documentation:
+# [1] Xilinx Inc., "CoolRunner-II CPLD Family Advance Product Specification",
+# DS090 (v1.3) September 24, 2002
+# [2] Xilinx Inc., "BSDL file for device XC2C256, package VQ144
+# Revision: 1.11", 2006-10-17
+# [3] Xilinx Inc., "XC2C256 CoolRunner-II CPLD Advance Product Specification",
+# DS094 (v1.2) November 20, 2002
+
+# mandatory data registers
+register BSR 552 # see [2]
+register BR 1
+
+# optional data registers
+register DIR 32
+
+# user-defined registers
+register ISPSR 274 # ISP (In-System Programming) Shift Register, see [2]
+
+# instructions - see [2]
+instruction length 8
+
+# mandatory instructions - see [2]
+instruction EXTEST 00000000 BSR
+instruction SAMPLE/PRELOAD 00000011 BSR
+instruction BYPASS 11111111 BR
+instruction INTEST 00000010 BSR
+instruction IDCODE 00000001 DIR
+instruction USERCODE 11111101 DIR
+instruction HIGHZ 11111100 BR
+instruction CLAMP 11111010 BR
+
+# user-defined instructions - see [2]
+instruction ISC_ENABLE_CLAMP 11101001 BR
+instruction ISC_ENABLEOTF 11100100 ISPSR
+instruction ISC_ENABLE 11101000 ISPSR
+instruction ISC_SRAM_READ 11100111 ISPSR
+instruction ISC_SRAM_WRITE 11100110 ISPSR
+instruction ISC_ERASE 11101101 ISPSR
+instruction ISC_PROGRAM 11101010 ISPSR
+instruction ISC_READ 11101110 ISPSR
+instruction ISC_INIT 11110000 ISPSR
+instruction ISC_DISABLE 11000000 ISPSR
+instruction TEST_ENABLE 00010001 ISPSR
+instruction BULKPROG 00010010 ISPSR
+instruction ERASE_ALL 00010100 ISPSR
+instruction MVERIFY 00010011 ISPSR
+instruction TEST_DISABLE 00010101 ISPSR
+instruction ISC_NOOP 11100000 BR
+
+# signals - derived from [2] using bsdl2jtag
+signal tdi
+signal tck
+signal tms
+signal tdo
+signal IO_2
+signal IO_5
+signal IO_6
+signal IO_7
+signal IO_8
+signal IO_11
+signal IO_13
+signal IO_15
+signal IO_17
+signal IO_19
+signal IO_20
+signal IO_26
+signal IO_28
+signal IO_30
+signal IO_32
+signal IO_33
+signal IO_34
+signal IO_35
+signal IO_37
+signal IO_38
+signal IO_40
+signal IO_47
+signal IO_49
+signal IO_56
+signal IO_58
+signal IO_61
+signal IO_63
+signal IO_65
+signal IO_70
+signal IO_71
+signal IO_72
+signal IO_73
+signal IO_74
+signal IO_75
+signal IO_83
+signal IO_84
+signal IO_85
+signal IO_86
+signal IO_87
+signal IO_88
+signal IO_90
+signal IO_91
+signal IO_93
+signal IO_95
+signal IO_97
+signal IO_102
+signal IO_103
+signal IO_104
+signal IO_105
+signal IO_106
+signal IO_107
+signal IO_109
+signal IO_120
+signal IO_121
+signal IO_122
+signal IO_123
+signal IO_132
+signal IO_134
+signal IO_135
+signal IO_136
+signal IO_139
+signal IO_141
+signal IO_143
+signal IO_145
+signal IO_149
+signal IO_151
+signal IO_153
+signal IO_157
+signal IO_158
+signal IO_166
+signal IO_167
+signal IO_168
+signal IO_169
+signal IO_170
+signal IO_171
+signal IO_176
+signal IO_177
+signal IO_178
+signal IO_179
+signal IO_180
+signal vdd1
+signal vdd2
+signal vdd3
+signal vdd4
+signal vdd5
+signal vdd6
+signal vdd7
+signal gnd1
+signal gnd2
+signal gnd3
+signal gnd4
+signal gnd5
+signal gnd6
+signal gnd7
+
+# bits - derived from [2] using bsdl2jtag
+bit 551 O 1 *
+bit 550 O 1 *
+bit 549 O 1 *
+bit 548 O 1 *
+bit 547 O 1 *
+bit 546 O 1 *
+bit 545 I 1 IO_2
+bit 544 O 1 IO_2 543 0 Z
+bit 543 C 0 *
+bit 542 O 1 *
+bit 541 O 1 *
+bit 540 O 1 *
+bit 539 O 1 *
+bit 538 O 1 *
+bit 537 O 1 *
+bit 536 I 1 IO_5
+bit 535 O 1 IO_5 534 0 Z
+bit 534 C 0 *
+bit 533 I 1 IO_6
+bit 532 O 1 IO_6 531 0 Z
+bit 531 C 0 *
+bit 530 I 1 IO_7
+bit 529 O 1 IO_7 528 0 Z
+bit 528 C 0 *
+bit 527 I 1 IO_8
+bit 526 O 1 IO_8 525 0 Z
+bit 525 C 0 *
+bit 524 O 1 *
+bit 523 O 1 *
+bit 522 O 1 *
+bit 521 O 1 *
+bit 520 O 1 *
+bit 519 O 1 *
+bit 518 O 1 *
+bit 517 O 1 *
+bit 516 O 1 *
+bit 515 O 1 *
+bit 514 O 1 *
+bit 513 O 1 *
+bit 512 O 1 *
+bit 511 O 1 *
+bit 510 O 1 *
+bit 509 O 1 *
+bit 508 O 1 *
+bit 507 O 1 *
+bit 506 I 1 IO_26
+bit 505 O 1 IO_26 504 0 Z
+bit 504 C 0 *
+bit 503 O 1 *
+bit 502 O 1 *
+bit 501 O 1 *
+bit 500 I 1 IO_28
+bit 499 O 1 IO_28 498 0 Z
+bit 498 C 0 *
+bit 497 O 1 *
+bit 496 O 1 *
+bit 495 O 1 *
+bit 494 I 1 IO_30
+bit 493 O 1 IO_30 492 0 Z
+bit 492 C 0 *
+bit 491 O 1 *
+bit 490 O 1 *
+bit 489 O 1 *
+bit 488 I 1 IO_32
+bit 487 O 1 IO_32 486 0 Z
+bit 486 C 0 *
+bit 485 I 1 IO_11
+bit 484 O 1 IO_11 483 0 Z
+bit 483 C 0 *
+bit 482 O 1 *
+bit 481 O 1 *
+bit 480 O 1 *
+bit 479 I 1 IO_13
+bit 478 O 1 IO_13 477 0 Z
+bit 477 C 0 *
+bit 476 O 1 *
+bit 475 O 1 *
+bit 474 O 1 *
+bit 473 I 1 IO_15
+bit 472 O 1 IO_15 471 0 Z
+bit 471 C 0 *
+bit 470 O 1 *
+bit 469 O 1 *
+bit 468 O 1 *
+bit 467 I 1 IO_17
+bit 466 O 1 IO_17 465 0 Z
+bit 465 C 0 *
+bit 464 O 1 *
+bit 463 O 1 *
+bit 462 O 1 *
+bit 461 I 1 IO_19
+bit 460 O 1 IO_19 459 0 Z
+bit 459 C 0 *
+bit 458 I 1 IO_20
+bit 457 O 1 IO_20 456 0 Z
+bit 456 C 0 *
+bit 455 O 1 *
+bit 454 O 1 *
+bit 453 O 1 *
+bit 452 I 1 IO_33
+bit 451 O 1 IO_33 450 0 Z
+bit 450 C 0 *
+bit 449 I 1 IO_34
+bit 448 O 1 IO_34 447 0 Z
+bit 447 C 0 *
+bit 446 I 1 IO_35
+bit 445 O 1 IO_35 444 0 Z
+bit 444 C 0 *
+bit 443 O 1 *
+bit 442 O 1 *
+bit 441 O 1 *
+bit 440 I 1 IO_37
+bit 439 O 1 IO_37 438 0 Z
+bit 438 C 0 *
+bit 437 I 1 IO_38
+bit 436 O 1 IO_38 435 0 Z
+bit 435 C 0 *
+bit 434 O 1 *
+bit 433 O 1 *
+bit 432 O 1 *
+bit 431 I 1 IO_40
+bit 430 O 1 IO_40 429 0 Z
+bit 429 C 0 *
+bit 428 O 1 *
+bit 427 O 1 *
+bit 426 O 1 *
+bit 425 O 1 *
+bit 424 O 1 *
+bit 423 O 1 *
+bit 422 O 1 *
+bit 421 O 1 *
+bit 420 O 1 *
+bit 419 O 1 *
+bit 418 O 1 *
+bit 417 O 1 *
+bit 416 O 1 *
+bit 415 O 1 *
+bit 414 O 1 *
+bit 413 O 1 *
+bit 412 O 1 *
+bit 411 O 1 *
+bit 410 I 1 IO_47
+bit 409 O 1 IO_47 408 0 Z
+bit 408 C 0 *
+bit 407 O 1 *
+bit 406 O 1 *
+bit 405 O 1 *
+bit 404 I 1 IO_49
+bit 403 O 1 IO_49 402 0 Z
+bit 402 C 0 *
+bit 401 O 1 *
+bit 400 O 1 *
+bit 399 O 1 *
+bit 398 O 1 *
+bit 397 O 1 *
+bit 396 O 1 *
+bit 395 O 1 *
+bit 394 O 1 *
+bit 393 O 1 *
+bit 392 O 1 *
+bit 391 O 1 *
+bit 390 O 1 *
+bit 389 O 1 *
+bit 388 O 1 *
+bit 387 O 1 *
+bit 386 O 1 *
+bit 385 O 1 *
+bit 384 O 1 *
+bit 383 O 1 *
+bit 382 O 1 *
+bit 381 O 1 *
+bit 380 O 1 *
+bit 379 O 1 *
+bit 378 O 1 *
+bit 377 O 1 *
+bit 376 O 1 *
+bit 375 O 1 *
+bit 374 I 1 IO_70
+bit 373 O 1 IO_70 372 0 Z
+bit 372 C 0 *
+bit 371 I 1 IO_71
+bit 370 O 1 IO_71 369 0 Z
+bit 369 C 0 *
+bit 368 I 1 IO_72
+bit 367 O 1 IO_72 366 0 Z
+bit 366 C 0 *
+bit 365 I 1 IO_73
+bit 364 O 1 IO_73 363 0 Z
+bit 363 C 0 *
+bit 362 I 1 IO_74
+bit 361 O 1 IO_74 360 0 Z
+bit 360 C 0 *
+bit 359 I 1 IO_75
+bit 358 O 1 IO_75 357 0 Z
+bit 357 C 0 *
+bit 356 O 1 *
+bit 355 O 1 *
+bit 354 O 1 *
+bit 353 O 1 *
+bit 352 O 1 *
+bit 351 O 1 *
+bit 350 O 1 *
+bit 349 O 1 *
+bit 348 O 1 *
+bit 347 I 1 IO_56
+bit 346 O 1 IO_56 345 0 Z
+bit 345 C 0 *
+bit 344 O 1 *
+bit 343 O 1 *
+bit 342 O 1 *
+bit 341 I 1 IO_58
+bit 340 O 1 IO_58 339 0 Z
+bit 339 C 0 *
+bit 338 O 1 *
+bit 337 O 1 *
+bit 336 O 1 *
+bit 335 O 1 *
+bit 334 O 1 *
+bit 333 O 1 *
+bit 332 I 1 IO_61
+bit 331 O 1 IO_61 330 0 Z
+bit 330 C 0 *
+bit 329 O 1 *
+bit 328 O 1 *
+bit 327 O 1 *
+bit 326 I 1 IO_63
+bit 325 O 1 IO_63 324 0 Z
+bit 324 C 0 *
+bit 323 O 1 *
+bit 322 O 1 *
+bit 321 O 1 *
+bit 320 I 1 IO_65
+bit 319 O 1 IO_65 318 0 Z
+bit 318 C 0 *
+bit 317 O 1 *
+bit 316 O 1 *
+bit 315 O 1 *
+bit 314 O 1 *
+bit 313 O 1 *
+bit 312 O 1 *
+bit 311 O 1 *
+bit 310 O 1 *
+bit 309 O 1 *
+bit 308 O 1 *
+bit 307 O 1 *
+bit 306 O 1 *
+bit 305 O 1 *
+bit 304 O 1 *
+bit 303 O 1 *
+bit 302 I 1 IO_83
+bit 301 O 1 IO_83 300 0 Z
+bit 300 C 0 *
+bit 299 I 1 IO_84
+bit 298 O 1 IO_84 297 0 Z
+bit 297 C 0 *
+bit 296 I 1 IO_85
+bit 295 O 1 IO_85 294 0 Z
+bit 294 C 0 *
+bit 293 I 1 IO_86
+bit 292 O 1 IO_86 291 0 Z
+bit 291 C 0 *
+bit 290 I 1 IO_87
+bit 289 O 1 IO_87 288 0 Z
+bit 288 C 0 *
+bit 287 I 1 IO_88
+bit 286 O 1 IO_88 285 0 Z
+bit 285 C 0 *
+bit 284 O 1 *
+bit 283 O 1 *
+bit 282 O 1 *
+bit 281 I 1 IO_90
+bit 280 O 1 IO_90 279 0 Z
+bit 279 C 0 *
+bit 278 I 1 IO_91
+bit 277 O 1 IO_91 276 0 Z
+bit 276 C 0 *
+bit 275 O 1 *
+bit 274 O 1 *
+bit 273 O 1 *
+bit 272 I 1 IO_93
+bit 271 O 1 IO_93 270 0 Z
+bit 270 C 0 *
+bit 269 O 1 *
+bit 268 O 1 *
+bit 267 O 1 *
+bit 266 I 1 IO_95
+bit 265 O 1 IO_95 264 0 Z
+bit 264 C 0 *
+bit 263 O 1 *
+bit 262 O 1 *
+bit 261 O 1 *
+bit 260 I 1 IO_97
+bit 259 O 1 IO_97 258 0 Z
+bit 258 C 0 *
+bit 257 O 1 *
+bit 256 O 1 *
+bit 255 O 1 *
+bit 254 O 1 *
+bit 253 O 1 *
+bit 252 O 1 *
+bit 251 O 1 *
+bit 250 O 1 *
+bit 249 O 1 *
+bit 248 O 1 *
+bit 247 O 1 *
+bit 246 O 1 *
+bit 245 O 1 *
+bit 244 O 1 *
+bit 243 O 1 *
+bit 242 O 1 *
+bit 241 O 1 *
+bit 240 O 1 *
+bit 239 O 1 *
+bit 238 O 1 *
+bit 237 O 1 *
+bit 236 O 1 *
+bit 235 O 1 *
+bit 234 O 1 *
+bit 233 O 1 *
+bit 232 O 1 *
+bit 231 O 1 *
+bit 230 O 1 *
+bit 229 O 1 *
+bit 228 O 1 *
+bit 227 I 1 IO_120
+bit 226 O 1 IO_120 225 0 Z
+bit 225 C 0 *
+bit 224 I 1 IO_121
+bit 223 O 1 IO_121 222 0 Z
+bit 222 C 0 *
+bit 221 I 1 IO_122
+bit 220 O 1 IO_122 219 0 Z
+bit 219 C 0 *
+bit 218 I 1 IO_123
+bit 217 O 1 IO_123 216 0 Z
+bit 216 C 0 *
+bit 215 O 1 *
+bit 214 O 1 *
+bit 213 O 1 *
+bit 212 O 1 *
+bit 211 O 1 *
+bit 210 O 1 *
+bit 209 I 1 IO_102
+bit 208 O 1 IO_102 207 0 Z
+bit 207 C 0 *
+bit 206 I 1 IO_103
+bit 205 O 1 IO_103 204 0 Z
+bit 204 C 0 *
+bit 203 I 1 IO_104
+bit 202 O 1 IO_104 201 0 Z
+bit 201 C 0 *
+bit 200 I 1 IO_105
+bit 199 O 1 IO_105 198 0 Z
+bit 198 C 0 *
+bit 197 I 1 IO_106
+bit 196 O 1 IO_106 195 0 Z
+bit 195 C 0 *
+bit 194 I 1 IO_107
+bit 193 O 1 IO_107 192 0 Z
+bit 192 C 0 *
+bit 191 O 1 *
+bit 190 O 1 *
+bit 189 O 1 *
+bit 188 I 1 IO_109
+bit 187 O 1 IO_109 186 0 Z
+bit 186 C 0 *
+bit 185 O 1 *
+bit 184 O 1 *
+bit 183 O 1 *
+bit 182 O 1 *
+bit 181 O 1 *
+bit 180 O 1 *
+bit 179 O 1 *
+bit 178 O 1 *
+bit 177 O 1 *
+bit 176 O 1 *
+bit 175 O 1 *
+bit 174 O 1 *
+bit 173 O 1 *
+bit 172 O 1 *
+bit 171 O 1 *
+bit 170 O 1 *
+bit 169 O 1 *
+bit 168 O 1 *
+bit 167 O 1 *
+bit 166 O 1 *
+bit 165 O 1 *
+bit 164 O 1 *
+bit 163 O 1 *
+bit 162 O 1 *
+bit 161 O 1 *
+bit 160 O 1 *
+bit 159 O 1 *
+bit 158 O 1 *
+bit 157 O 1 *
+bit 156 O 1 *
+bit 155 I 1 IO_132
+bit 154 O 1 IO_132 153 0 Z
+bit 153 C 0 *
+bit 152 O 1 *
+bit 151 O 1 *
+bit 150 O 1 *
+bit 149 I 1 IO_134
+bit 148 O 1 IO_134 147 0 Z
+bit 147 C 0 *
+bit 146 I 1 IO_135
+bit 145 O 1 IO_135 144 0 Z
+bit 144 C 0 *
+bit 143 I 1 IO_136
+bit 142 O 1 IO_136 141 0 Z
+bit 141 C 0 *
+bit 140 O 1 *
+bit 139 O 1 *
+bit 138 O 1 *
+bit 137 O 1 *
+bit 136 O 1 *
+bit 135 O 1 *
+bit 134 I 1 IO_139
+bit 133 O 1 IO_139 132 0 Z
+bit 132 C 0 *
+bit 131 O 1 *
+bit 130 O 1 *
+bit 129 O 1 *
+bit 128 I 1 IO_141
+bit 127 O 1 IO_141 126 0 Z
+bit 126 C 0 *
+bit 125 O 1 *
+bit 124 O 1 *
+bit 123 O 1 *
+bit 122 I 1 IO_143
+bit 121 O 1 IO_143 120 0 Z
+bit 120 C 0 *
+bit 119 O 1 *
+bit 118 O 1 *
+bit 117 O 1 *
+bit 116 I 1 IO_145
+bit 115 O 1 IO_145 114 0 Z
+bit 114 C 0 *
+bit 113 O 1 *
+bit 112 O 1 *
+bit 111 O 1 *
+bit 110 O 1 *
+bit 109 O 1 *
+bit 108 O 1 *
+bit 107 O 1 *
+bit 106 O 1 *
+bit 105 O 1 *
+bit 104 O 1 *
+bit 103 O 1 *
+bit 102 O 1 *
+bit 101 O 1 *
+bit 100 O 1 *
+bit 99 O 1 *
+bit 98 O 1 *
+bit 97 O 1 *
+bit 96 O 1 *
+bit 95 O 1 *
+bit 94 O 1 *
+bit 93 O 1 *
+bit 92 O 1 *
+bit 91 O 1 *
+bit 90 O 1 *
+bit 89 O 1 *
+bit 88 O 1 *
+bit 87 O 1 *
+bit 86 I 1 IO_166
+bit 85 O 1 IO_166 84 0 Z
+bit 84 C 0 *
+bit 83 I 1 IO_167
+bit 82 O 1 IO_167 81 0 Z
+bit 81 C 0 *
+bit 80 I 1 IO_168
+bit 79 O 1 IO_168 78 0 Z
+bit 78 C 0 *
+bit 77 I 1 IO_169
+bit 76 O 1 IO_169 75 0 Z
+bit 75 C 0 *
+bit 74 I 1 IO_170
+bit 73 O 1 IO_170 72 0 Z
+bit 72 C 0 *
+bit 71 I 1 IO_171
+bit 70 O 1 IO_171 69 0 Z
+bit 69 C 0 *
+bit 68 I 1 IO_149
+bit 67 O 1 IO_149 66 0 Z
+bit 66 C 0 *
+bit 65 O 1 *
+bit 64 O 1 *
+bit 63 O 1 *
+bit 62 I 1 IO_151
+bit 61 O 1 IO_151 60 0 Z
+bit 60 C 0 *
+bit 59 O 1 *
+bit 58 O 1 *
+bit 57 O 1 *
+bit 56 I 1 IO_153
+bit 55 O 1 IO_153 54 0 Z
+bit 54 C 0 *
+bit 53 O 1 *
+bit 52 O 1 *
+bit 51 O 1 *
+bit 50 O 1 *
+bit 49 O 1 *
+bit 48 O 1 *
+bit 47 O 1 *
+bit 46 O 1 *
+bit 45 O 1 *
+bit 44 I 1 IO_157
+bit 43 O 1 IO_157 42 0 Z
+bit 42 C 0 *
+bit 41 I 1 IO_158
+bit 40 O 1 IO_158 39 0 Z
+bit 39 C 0 *
+bit 38 O 1 *
+bit 37 O 1 *
+bit 36 O 1 *
+bit 35 O 1 *
+bit 34 O 1 *
+bit 33 O 1 *
+bit 32 O 1 *
+bit 31 O 1 *
+bit 30 O 1 *
+bit 29 O 1 *
+bit 28 O 1 *
+bit 27 O 1 *
+bit 26 O 1 *
+bit 25 O 1 *
+bit 24 O 1 *
+bit 23 I 1 IO_176
+bit 22 O 1 IO_176 21 0 Z
+bit 21 C 0 *
+bit 20 I 1 IO_177
+bit 19 O 1 IO_177 18 0 Z
+bit 18 C 0 *
+bit 17 I 1 IO_178
+bit 16 O 1 IO_178 15 0 Z
+bit 15 C 0 *
+bit 14 I 1 IO_179
+bit 13 O 1 IO_179 12 0 Z
+bit 12 C 0 *
+bit 11 I 1 IO_180
+bit 10 O 1 IO_180 9 0 Z
+bit 9 C 0 *
+bit 8 O 1 *
+bit 7 O 1 *
+bit 6 O 1 *
+bit 5 O 1 *
+bit 4 O 1 *
+bit 3 O 1 *
+bit 2 O 1 *
+bit 1 O 1 *
+bit 0 O 1 *
--- /dev/null
+#
+# $Id: STEPPINGS,v 1.1 2003/02/14 11:14:56 telka Exp $
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+
+# bits 31-28 of the Device Identification Register
+0000 xc2c64a-vq44 0
--- /dev/null
+signal tdi
+signal tck
+signal tms
+signal tdo
+signal IO_0
+signal IO_1
+signal IO_2
+signal IO_8
+signal IO_9
+signal IO_10
+signal IO_11
+signal IO_12
+signal IO_16
+signal IO_17
+signal IO_20
+signal IO_21
+signal IO_22
+signal IO_23
+signal IO_25
+signal IO_27
+signal IO_28
+signal IO_32
+signal IO_33
+signal IO_34
+signal IO_37
+signal IO_41
+signal IO_42
+signal IO_43
+signal IO_45
+signal IO_46
+signal IO_48
+signal IO_49
+signal IO_54
+signal IO_58
+signal IO_60
+signal IO_61
+signal vdd1
+signal vdd2
+signal vdd3
+signal gnd1
+signal gnd2
+signal gnd3
+
+register BSR 192
+register BR 1
+register DIR 32
+
+instruction length 8
+
+instruction BYPASS 11111111 BR
+instruction SAMPLE/PRELOAD 00000011 BSR
+instruction EXTEST 00000000 BSR
+instruction IDCODE 00000001 DIR
+
+bit 191 I 1 IO_0
+bit 190 O 1 IO_0 189 0 Z
+bit 189 C 0 *
+bit 188 I 1 IO_1
+bit 187 O 1 IO_1 186 0 Z
+bit 186 C 0 *
+bit 185 I 1 IO_2
+bit 184 O 1 IO_2 183 0 Z
+bit 183 C 0 *
+bit 182 O 1 *
+bit 181 O 1 *
+bit 180 O 1 *
+bit 179 O 1 *
+bit 178 O 1 *
+bit 177 O 1 *
+bit 176 O 1 *
+bit 175 O 1 *
+bit 174 O 1 *
+bit 173 O 1 *
+bit 172 O 1 *
+bit 171 O 1 *
+bit 170 O 1 *
+bit 169 O 1 *
+bit 168 O 1 *
+bit 167 I 1 IO_8
+bit 166 O 1 IO_8 165 0 Z
+bit 165 C 0 *
+bit 164 I 1 IO_9
+bit 163 O 1 IO_9 162 0 Z
+bit 162 C 0 *
+bit 161 I 1 IO_10
+bit 160 O 1 IO_10 159 0 Z
+bit 159 C 0 *
+bit 158 I 1 IO_11
+bit 157 O 1 IO_11 156 0 Z
+bit 156 C 0 *
+bit 155 I 1 IO_12
+bit 154 O 1 IO_12 153 0 Z
+bit 153 C 0 *
+bit 152 O 1 *
+bit 151 O 1 *
+bit 150 O 1 *
+bit 149 O 1 *
+bit 148 O 1 *
+bit 147 O 1 *
+bit 146 O 1 *
+bit 145 O 1 *
+bit 144 O 1 *
+bit 143 I 1 IO_32
+bit 142 O 1 IO_32 141 0 Z
+bit 141 C 0 *
+bit 140 I 1 IO_33
+bit 139 O 1 IO_33 138 0 Z
+bit 138 C 0 *
+bit 137 I 1 IO_34
+bit 136 O 1 IO_34 135 0 Z
+bit 135 C 0 *
+bit 134 O 1 *
+bit 133 O 1 *
+bit 132 O 1 *
+bit 131 O 1 *
+bit 130 O 1 *
+bit 129 O 1 *
+bit 128 I 1 IO_37
+bit 127 O 1 IO_37 126 0 Z
+bit 126 C 0 *
+bit 125 O 1 *
+bit 124 O 1 *
+bit 123 O 1 *
+bit 122 O 1 *
+bit 121 O 1 *
+bit 120 O 1 *
+bit 119 O 1 *
+bit 118 O 1 *
+bit 117 O 1 *
+bit 116 I 1 IO_41
+bit 115 O 1 IO_41 114 0 Z
+bit 114 C 0 *
+bit 113 I 1 IO_42
+bit 112 O 1 IO_42 111 0 Z
+bit 111 C 0 *
+bit 110 I 1 IO_43
+bit 109 O 1 IO_43 108 0 Z
+bit 108 C 0 *
+bit 107 O 1 *
+bit 106 O 1 *
+bit 105 O 1 *
+bit 104 I 1 IO_45
+bit 103 O 1 IO_45 102 0 Z
+bit 102 C 0 *
+bit 101 I 1 IO_46
+bit 100 O 1 IO_46 99 0 Z
+bit 99 C 0 *
+bit 98 O 1 *
+bit 97 O 1 *
+bit 96 O 1 *
+bit 95 I 1 IO_16
+bit 94 O 1 IO_16 93 0 Z
+bit 93 C 0 *
+bit 92 I 1 IO_17
+bit 91 O 1 IO_17 90 0 Z
+bit 90 C 0 *
+bit 89 O 1 *
+bit 88 O 1 *
+bit 87 O 1 *
+bit 86 O 1 *
+bit 85 O 1 *
+bit 84 O 1 *
+bit 83 I 1 IO_20
+bit 82 O 1 IO_20 81 0 Z
+bit 81 C 0 *
+bit 80 I 1 IO_21
+bit 79 O 1 IO_21 78 0 Z
+bit 78 C 0 *
+bit 77 I 1 IO_22
+bit 76 O 1 IO_22 75 0 Z
+bit 75 C 0 *
+bit 74 I 1 IO_23
+bit 73 O 1 IO_23 72 0 Z
+bit 72 C 0 *
+bit 71 O 1 *
+bit 70 O 1 *
+bit 69 O 1 *
+bit 68 I 1 IO_25
+bit 67 O 1 IO_25 66 0 Z
+bit 66 C 0 *
+bit 65 O 1 *
+bit 64 O 1 *
+bit 63 O 1 *
+bit 62 I 1 IO_27
+bit 61 O 1 IO_27 60 0 Z
+bit 60 C 0 *
+bit 59 I 1 IO_28
+bit 58 O 1 IO_28 57 0 Z
+bit 57 C 0 *
+bit 56 O 1 *
+bit 55 O 1 *
+bit 54 O 1 *
+bit 53 O 1 *
+bit 52 O 1 *
+bit 51 O 1 *
+bit 50 O 1 *
+bit 49 O 1 *
+bit 48 O 1 *
+bit 47 I 1 IO_48
+bit 46 O 1 IO_48 45 0 Z
+bit 45 C 0 *
+bit 44 I 1 IO_49
+bit 43 O 1 IO_49 42 0 Z
+bit 42 C 0 *
+bit 41 O 1 *
+bit 40 O 1 *
+bit 39 O 1 *
+bit 38 O 1 *
+bit 37 O 1 *
+bit 36 O 1 *
+bit 35 O 1 *
+bit 34 O 1 *
+bit 33 O 1 *
+bit 32 O 1 *
+bit 31 O 1 *
+bit 30 O 1 *
+bit 29 I 1 IO_54
+bit 28 O 1 IO_54 27 0 Z
+bit 27 C 0 *
+bit 26 O 1 *
+bit 25 O 1 *
+bit 24 O 1 *
+bit 23 O 1 *
+bit 22 O 1 *
+bit 21 O 1 *
+bit 20 O 1 *
+bit 19 O 1 *
+bit 18 O 1 *
+bit 17 I 1 IO_58
+bit 16 O 1 IO_58 15 0 Z
+bit 15 C 0 *
+bit 14 O 1 *
+bit 13 O 1 *
+bit 12 O 1 *
+bit 11 I 1 IO_60
+bit 10 O 1 IO_60 9 0 Z
+bit 9 C 0 *
+bit 8 I 1 IO_61
+bit 7 O 1 IO_61 6 0 Z
+bit 6 C 0 *
+bit 5 I 1 IO_62
+bit 4 O 1 IO_62 3 0 Z
+bit 3 C 0 *
+bit 2 O 1 *
+bit 1 O 1 *
+bit 0 O 1 *
--- /dev/null
+#
+# $Id: STEPPINGS,v 1.1 2003/02/14 11:14:56 telka Exp $
+#
+# Copyright (C) 2003 Tower Technologies s.r.l.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Alessandro Zummo <azummo@towertech.it>, 2003.
+# DJF:w
+
+# bits 31-28 of the Device Identification Register
+0010 xc2s200e-pq208 0
--- /dev/null
+signal CCLK_P155
+signal DONE_P104
+signal GCK0_P80
+signal GCK1_P77
+signal GCK2_P182
+signal GCK3_P185
+signal GND1
+signal GND2
+signal GND3
+signal GND4
+signal GND5
+signal GND6
+signal GND7
+signal GND8
+signal GND9
+signal GND10
+signal GND11
+signal GND12
+signal GND13
+signal GND14
+signal GND15
+signal GND16
+signal GND17
+signal GND18
+signal GND19
+signal GND20
+signal GND21
+signal GND22
+signal GND23
+signal GND24
+signal INIT_P107
+signal M0_P52
+signal M1_P50
+signal M2_P54
+signal PROGRAM
+signal TCK
+signal TDI
+signal TDO
+signal TMS
+signal VCCINT1
+signal VCCINT2
+signal VCCINT3
+signal VCCINT4
+signal VCCINT5
+signal VCCINT6
+signal VCCINT7
+signal VCCINT8
+signal VCCINT9
+signal VCCINT10
+signal VCCINT11
+signal VCCINT12
+signal VCCO1
+signal VCCO2
+signal VCCO3
+signal VCCO4
+signal VCCO5
+signal VCCO6
+signal VCCO7
+signal VCCO8
+signal VCCO9
+signal VCCO10
+signal VCCO11
+signal VCCO12
+signal VCCO13
+signal VCCO14
+signal VCCO15
+signal VCCO16
+signal IO_P3
+signal IO_P4
+signal IO_P5
+signal IO_P6
+signal IO_P7
+signal IO_P8
+signal IO_P9
+signal IO_P10
+signal IO_P11
+signal IO_P15
+signal IO_P16
+signal IO_P17
+signal IO_P18
+signal IO_P20
+signal IO_P21
+signal IO_P22
+signal IO_P23
+signal IO_P24
+signal IO_P27
+signal IO_P29
+signal IO_P30
+signal IO_P31
+signal IO_P33
+signal IO_P34
+signal IO_P35
+signal IO_P36
+signal IO_P40
+signal IO_P41
+signal IO_P42
+signal IO_P43
+signal IO_P44
+signal IO_P45
+signal IO_P46
+signal IO_P47
+signal IO_P48
+signal IO_P49
+signal IO_P55
+signal IO_P56
+signal IO_P57
+signal IO_P58
+signal IO_P59
+signal IO_P60
+signal IO_P61
+signal IO_P62
+signal IO_P63
+signal IO_P64
+signal IO_P68
+signal IO_P69
+signal IO_P70
+signal IO_P71
+signal IO_P73
+signal IO_P74
+signal IO_P75
+signal IO_P81
+signal IO_P82
+signal IO_P83
+signal IO_P84
+signal IO_P86
+signal IO_P87
+signal IO_P88
+signal IO_P89
+signal IO_P93
+signal IO_P94
+signal IO_P95
+signal IO_P96
+signal IO_P97
+signal IO_P98
+signal IO_P99
+signal IO_P100
+signal IO_P101
+signal IO_P102
+signal IO_P108
+signal IO_P109
+signal IO_P110
+signal IO_P111
+signal IO_P112
+signal IO_P113
+signal IO_P114
+signal IO_P115
+signal IO_P116
+signal IO_P120
+signal IO_P121
+signal IO_P122
+signal IO_P123
+signal IO_P125
+signal IO_P126
+signal IO_P127
+signal IO_P129
+signal IO_P132
+signal IO_P133
+signal IO_P134
+signal IO_P135
+signal IO_P136
+signal IO_P138
+signal IO_P139
+signal IO_P140
+signal IO_P141
+signal IO_P145
+signal IO_P146
+signal IO_P147
+signal IO_P148
+signal IO_P149
+signal IO_P150
+signal IO_P151
+signal IO_P152
+signal IO_P153
+signal IO_P154
+signal IO_P160
+signal IO_P161
+signal IO_P162
+signal IO_P163
+signal IO_P164
+signal IO_P165
+signal IO_P166
+signal IO_P167
+signal IO_P168
+signal IO_P169
+signal IO_P173
+signal IO_P174
+signal IO_P175
+signal IO_P176
+signal IO_P178
+signal IO_P179
+signal IO_P180
+signal IO_P181
+signal IO_P187
+signal IO_P188
+signal IO_P189
+signal IO_P191
+signal IO_P192
+signal IO_P193
+signal IO_P194
+signal IO_P198
+signal IO_P199
+signal IO_P200
+signal IO_P201
+signal IO_P202
+signal IO_P203
+signal IO_P204
+signal IO_P205
+
+register BSR 1022
+register BR 1
+register DIR 32
+
+instruction length 5
+
+instruction SAMPLE/PRELOAD 00001 BSR
+instruction IDCODE 01001 DIR
+instruction EXTEST 00000 BSR
+instruction BYPASS 11111 BR
+
+bit 1021 I 1 CCLK_P155
+bit 1020 O 1 CCLK_P155 1019 1 Z
+bit 1019 C 1 *
+bit 1018 I 1 IO_P154
+bit 1017 O 1 IO_P154 1016 1 Z
+bit 1016 C 1 *
+bit 1015 I 1 IO_P153
+bit 1014 O 1 IO_P153 1013 1 Z
+bit 1013 C 1 *
+bit 1012 O 1 *
+bit 1011 O 1 *
+bit 1010 O 1 *
+bit 1009 O 1 *
+bit 1008 O 1 *
+bit 1007 O 1 *
+bit 1006 O 1 *
+bit 1005 O 1 *
+bit 1004 O 1 *
+bit 1003 O 1 *
+bit 1002 O 1 *
+bit 1001 O 1 *
+bit 1000 I 1 IO_P152
+bit 999 O 1 IO_P152 998 1 Z
+bit 998 C 1 *
+bit 997 O 1 *
+bit 996 O 1 *
+bit 995 O 1 *
+bit 994 O 1 *
+bit 993 O 1 *
+bit 992 O 1 *
+bit 991 O 1 *
+bit 990 O 1 *
+bit 989 O 1 *
+bit 988 O 1 *
+bit 987 O 1 *
+bit 986 O 1 *
+bit 985 I 1 IO_P151
+bit 984 O 1 IO_P151 983 1 Z
+bit 983 C 1 *
+bit 982 I 1 IO_P150
+bit 981 O 1 IO_P150 980 1 Z
+bit 980 C 1 *
+bit 979 I 1 IO_P149
+bit 978 O 1 IO_P149 977 1 Z
+bit 977 C 1 *
+bit 976 O 1 *
+bit 975 O 1 *
+bit 974 O 1 *
+bit 973 O 1 *
+bit 972 O 1 *
+bit 971 O 1 *
+bit 970 O 1 *
+bit 969 O 1 *
+bit 968 O 1 *
+bit 967 I 1 IO_P148
+bit 966 O 1 IO_P148 965 1 Z
+bit 965 C 1 *
+bit 964 I 1 IO_P147
+bit 963 O 1 IO_P147 962 1 Z
+bit 962 C 1 *
+bit 961 O 1 *
+bit 960 O 1 *
+bit 959 O 1 *
+bit 958 I 1 IO_P146
+bit 957 O 1 IO_P146 956 1 Z
+bit 956 C 1 *
+bit 955 I 1 IO_P145
+bit 954 O 1 IO_P145 953 1 Z
+bit 953 C 1 *
+bit 952 I 1 IO_P141
+bit 951 O 1 IO_P141 950 1 Z
+bit 950 C 1 *
+bit 949 I 1 IO_P140
+bit 948 O 1 IO_P140 947 1 Z
+bit 947 C 1 *
+bit 946 O 1 *
+bit 945 O 1 *
+bit 944 O 1 *
+bit 943 O 1 *
+bit 942 O 1 *
+bit 941 O 1 *
+bit 940 O 1 *
+bit 939 O 1 *
+bit 938 O 1 *
+bit 937 O 1 *
+bit 936 O 1 *
+bit 935 O 1 *
+bit 934 O 1 *
+bit 933 O 1 *
+bit 932 O 1 *
+bit 931 O 1 *
+bit 930 O 1 *
+bit 929 O 1 *
+bit 928 I 1 IO_P139
+bit 927 O 1 IO_P139 926 1 Z
+bit 926 C 1 *
+bit 925 I 1 IO_P138
+bit 924 O 1 IO_P138 923 1 Z
+bit 923 C 1 *
+bit 922 I 1 IO_P136
+bit 921 O 1 IO_P136 920 1 Z
+bit 920 C 1 *
+bit 919 I 1 IO_P135
+bit 918 O 1 IO_P135 917 1 Z
+bit 917 C 1 *
+bit 916 O 1 *
+bit 915 O 1 *
+bit 914 O 1 *
+bit 913 O 1 *
+bit 912 O 1 *
+bit 911 O 1 *
+bit 910 O 1 *
+bit 909 O 1 *
+bit 908 O 1 *
+bit 907 I 1 IO_P134
+bit 906 O 1 IO_P134 905 1 Z
+bit 905 C 1 *
+bit 904 O 1 *
+bit 903 O 1 *
+bit 902 O 1 *
+bit 901 O 1 *
+bit 900 O 1 *
+bit 899 O 1 *
+bit 898 I 1 IO_P133
+bit 897 O 1 IO_P133 896 1 Z
+bit 896 C 1 *
+bit 895 I 1 IO_P132
+bit 894 O 1 IO_P132 893 1 Z
+bit 893 C 1 *
+bit 892 I 1 IO_P129
+bit 891 O 1 IO_P129 890 1 Z
+bit 890 C 1 *
+bit 889 O 1 *
+bit 888 O 1 *
+bit 887 O 1 *
+bit 886 O 1 *
+bit 885 O 1 *
+bit 884 O 1 *
+bit 883 O 1 *
+bit 882 O 1 *
+bit 881 O 1 *
+bit 880 I 1 IO_P127
+bit 879 O 1 IO_P127 878 1 Z
+bit 878 C 1 *
+bit 877 O 1 *
+bit 876 O 1 *
+bit 875 O 1 *
+bit 874 O 1 *
+bit 873 O 1 *
+bit 872 O 1 *
+bit 871 O 1 *
+bit 870 O 1 *
+bit 869 O 1 *
+bit 868 I 1 IO_P126
+bit 867 O 1 IO_P126 866 1 Z
+bit 866 C 1 *
+bit 865 I 1 IO_P125
+bit 864 O 1 IO_P125 863 1 Z
+bit 863 C 1 *
+bit 862 I 1 IO_P123
+bit 861 O 1 IO_P123 860 1 Z
+bit 860 C 1 *
+bit 859 I 1 IO_P122
+bit 858 O 1 IO_P122 857 1 Z
+bit 857 C 1 *
+bit 856 O 1 *
+bit 855 O 1 *
+bit 854 O 1 *
+bit 853 O 1 *
+bit 852 O 1 *
+bit 851 O 1 *
+bit 850 O 1 *
+bit 849 O 1 *
+bit 848 O 1 *
+bit 847 O 1 *
+bit 846 O 1 *
+bit 845 O 1 *
+bit 844 O 1 *
+bit 843 O 1 *
+bit 842 O 1 *
+bit 841 O 1 *
+bit 840 O 1 *
+bit 839 O 1 *
+bit 838 I 1 IO_P121
+bit 837 O 1 IO_P121 836 1 Z
+bit 836 C 1 *
+bit 835 I 1 IO_P120
+bit 834 O 1 IO_P120 833 1 Z
+bit 833 C 1 *
+bit 832 I 1 IO_P116
+bit 831 O 1 IO_P116 830 1 Z
+bit 830 C 1 *
+bit 829 I 1 IO_P115
+bit 828 O 1 IO_P115 827 1 Z
+bit 827 C 1 *
+bit 826 O 1 *
+bit 825 O 1 *
+bit 824 O 1 *
+bit 823 I 1 IO_P114
+bit 822 O 1 IO_P114 821 1 Z
+bit 821 C 1 *
+bit 820 I 1 IO_P113
+bit 819 O 1 IO_P113 818 1 Z
+bit 818 C 1 *
+bit 817 O 1 *
+bit 816 O 1 *
+bit 815 O 1 *
+bit 814 O 1 *
+bit 813 O 1 *
+bit 812 O 1 *
+bit 811 O 1 *
+bit 810 O 1 *
+bit 809 O 1 *
+bit 808 I 1 IO_P112
+bit 807 O 1 IO_P112 806 1 Z
+bit 806 C 1 *
+bit 805 I 1 IO_P111
+bit 804 O 1 IO_P111 803 1 Z
+bit 803 C 1 *
+bit 802 I 1 IO_P110
+bit 801 O 1 IO_P110 800 1 Z
+bit 800 C 1 *
+bit 799 O 1 *
+bit 798 O 1 *
+bit 797 O 1 *
+bit 796 O 1 *
+bit 795 O 1 *
+bit 794 O 1 *
+bit 793 O 1 *
+bit 792 O 1 *
+bit 791 O 1 *
+bit 790 O 1 *
+bit 789 O 1 *
+bit 788 O 1 *
+bit 787 I 1 IO_P109
+bit 786 O 1 IO_P109 785 1 Z
+bit 785 C 1 *
+bit 784 O 1 *
+bit 783 O 1 *
+bit 782 O 1 *
+bit 781 O 1 *
+bit 780 O 1 *
+bit 779 O 1 *
+bit 778 O 1 *
+bit 777 O 1 *
+bit 776 O 1 *
+bit 775 O 1 *
+bit 774 O 1 *
+bit 773 O 1 *
+bit 772 I 1 IO_P108
+bit 771 O 1 IO_P108 770 1 Z
+bit 770 C 1 *
+bit 769 I 1 INIT_P107
+bit 768 O 1 INIT_P107 767 1 Z
+bit 767 C 1 *
+bit 766 O 1 *
+bit 765 I 1 DONE_P104
+bit 764 O 1 DONE_P104 763 1 Z
+bit 763 C 1 *
+bit 762 I 1 IO_P102
+bit 761 O 1 IO_P102 760 1 Z
+bit 760 C 1 *
+bit 759 I 1 IO_P101
+bit 758 O 1 IO_P101 757 1 Z
+bit 757 C 1 *
+bit 756 O 1 *
+bit 755 O 1 *
+bit 754 O 1 *
+bit 753 O 1 *
+bit 752 O 1 *
+bit 751 O 1 *
+bit 750 O 1 *
+bit 749 O 1 *
+bit 748 O 1 *
+bit 747 O 1 *
+bit 746 O 1 *
+bit 745 O 1 *
+bit 744 I 1 IO_P100
+bit 743 O 1 IO_P100 742 1 Z
+bit 742 C 1 *
+bit 741 O 1 *
+bit 740 O 1 *
+bit 739 O 1 *
+bit 738 O 1 *
+bit 737 O 1 *
+bit 736 O 1 *
+bit 735 O 1 *
+bit 734 O 1 *
+bit 733 O 1 *
+bit 732 O 1 *
+bit 731 O 1 *
+bit 730 O 1 *
+bit 729 I 1 IO_P99
+bit 728 O 1 IO_P99 727 1 Z
+bit 727 C 1 *
+bit 726 I 1 IO_P98
+bit 725 O 1 IO_P98 724 1 Z
+bit 724 C 1 *
+bit 723 I 1 IO_P97
+bit 722 O 1 IO_P97 721 1 Z
+bit 721 C 1 *
+bit 720 O 1 *
+bit 719 O 1 *
+bit 718 O 1 *
+bit 717 O 1 *
+bit 716 O 1 *
+bit 715 O 1 *
+bit 714 O 1 *
+bit 713 O 1 *
+bit 712 O 1 *
+bit 711 I 1 IO_P96
+bit 710 O 1 IO_P96 709 1 Z
+bit 709 C 1 *
+bit 708 I 1 IO_P95
+bit 707 O 1 IO_P95 706 1 Z
+bit 706 C 1 *
+bit 705 O 1 *
+bit 704 O 1 *
+bit 703 O 1 *
+bit 702 I 1 IO_P94
+bit 701 O 1 IO_P94 700 1 Z
+bit 700 C 1 *
+bit 699 I 1 IO_P93
+bit 698 O 1 IO_P93 697 1 Z
+bit 697 C 1 *
+bit 696 I 1 IO_P89
+bit 695 O 1 IO_P89 694 1 Z
+bit 694 C 1 *
+bit 693 I 1 IO_P88
+bit 692 O 1 IO_P88 691 1 Z
+bit 691 C 1 *
+bit 690 O 1 *
+bit 689 O 1 *
+bit 688 O 1 *
+bit 687 O 1 *
+bit 686 O 1 *
+bit 685 O 1 *
+bit 684 O 1 *
+bit 683 O 1 *
+bit 682 O 1 *
+bit 681 O 1 *
+bit 680 O 1 *
+bit 679 O 1 *
+bit 678 O 1 *
+bit 677 O 1 *
+bit 676 O 1 *
+bit 675 O 1 *
+bit 674 O 1 *
+bit 673 O 1 *
+bit 672 I 1 IO_P87
+bit 671 O 1 IO_P87 670 1 Z
+bit 670 C 1 *
+bit 669 I 1 IO_P86
+bit 668 O 1 IO_P86 667 1 Z
+bit 667 C 1 *
+bit 666 I 1 IO_P84
+bit 665 O 1 IO_P84 664 1 Z
+bit 664 C 1 *
+bit 663 I 1 IO_P83
+bit 662 O 1 IO_P83 661 1 Z
+bit 661 C 1 *
+bit 660 O 1 *
+bit 659 O 1 *
+bit 658 O 1 *
+bit 657 O 1 *
+bit 656 O 1 *
+bit 655 O 1 *
+bit 654 O 1 *
+bit 653 O 1 *
+bit 652 O 1 *
+bit 651 I 1 IO_P82
+bit 650 O 1 IO_P82 649 1 Z
+bit 649 C 1 *
+bit 648 O 1 *
+bit 647 O 1 *
+bit 646 O 1 *
+bit 645 O 1 *
+bit 644 O 1 *
+bit 643 O 1 *
+bit 642 O 1 *
+bit 641 O 1 *
+bit 640 O 1 *
+bit 639 I 1 IO_P81
+bit 638 O 1 IO_P81 637 1 Z
+bit 637 C 1 *
+bit 636 I 1 GCK0_P80
+bit 635 I 1 GCK1_P77
+bit 634 I 1 IO_P75
+bit 633 O 1 IO_P75 632 1 Z
+bit 632 C 1 *
+bit 631 O 1 *
+bit 630 O 1 *
+bit 629 O 1 *
+bit 628 O 1 *
+bit 627 O 1 *
+bit 626 O 1 *
+bit 625 O 1 *
+bit 624 O 1 *
+bit 623 O 1 *
+bit 622 O 1 *
+bit 621 O 1 *
+bit 620 O 1 *
+bit 619 O 1 *
+bit 618 O 1 *
+bit 617 O 1 *
+bit 616 O 1 *
+bit 615 O 1 *
+bit 614 O 1 *
+bit 613 O 1 *
+bit 612 O 1 *
+bit 611 O 1 *
+bit 610 I 1 IO_P74
+bit 609 O 1 IO_P74 608 1 Z
+bit 608 C 1 *
+bit 607 I 1 IO_P73
+bit 606 O 1 IO_P73 605 1 Z
+bit 605 C 1 *
+bit 604 I 1 IO_P71
+bit 603 O 1 IO_P71 602 1 Z
+bit 602 C 1 *
+bit 601 I 1 IO_P70
+bit 600 O 1 IO_P70 599 1 Z
+bit 599 C 1 *
+bit 598 O 1 *
+bit 597 O 1 *
+bit 596 O 1 *
+bit 595 O 1 *
+bit 594 O 1 *
+bit 593 O 1 *
+bit 592 O 1 *
+bit 591 O 1 *
+bit 590 O 1 *
+bit 589 O 1 *
+bit 588 O 1 *
+bit 587 O 1 *
+bit 586 O 1 *
+bit 585 O 1 *
+bit 584 O 1 *
+bit 583 O 1 *
+bit 582 O 1 *
+bit 581 O 1 *
+bit 580 I 1 IO_P69
+bit 579 O 1 IO_P69 578 1 Z
+bit 578 C 1 *
+bit 577 I 1 IO_P68
+bit 576 O 1 IO_P68 575 1 Z
+bit 575 C 1 *
+bit 574 I 1 IO_P64
+bit 573 O 1 IO_P64 572 1 Z
+bit 572 C 1 *
+bit 571 I 1 IO_P63
+bit 570 O 1 IO_P63 569 1 Z
+bit 569 C 1 *
+bit 568 O 1 *
+bit 567 O 1 *
+bit 566 O 1 *
+bit 565 I 1 IO_P62
+bit 564 O 1 IO_P62 563 1 Z
+bit 563 C 1 *
+bit 562 I 1 IO_P61
+bit 561 O 1 IO_P61 560 1 Z
+bit 560 C 1 *
+bit 559 O 1 *
+bit 558 O 1 *
+bit 557 O 1 *
+bit 556 O 1 *
+bit 555 O 1 *
+bit 554 O 1 *
+bit 553 O 1 *
+bit 552 O 1 *
+bit 551 O 1 *
+bit 550 I 1 IO_P60
+bit 549 O 1 IO_P60 548 1 Z
+bit 548 C 1 *
+bit 547 I 1 IO_P59
+bit 546 O 1 IO_P59 545 1 Z
+bit 545 C 1 *
+bit 544 I 1 IO_P58
+bit 543 O 1 IO_P58 542 1 Z
+bit 542 C 1 *
+bit 541 O 1 *
+bit 540 O 1 *
+bit 539 O 1 *
+bit 538 O 1 *
+bit 537 O 1 *
+bit 536 O 1 *
+bit 535 O 1 *
+bit 534 O 1 *
+bit 533 O 1 *
+bit 532 O 1 *
+bit 531 O 1 *
+bit 530 O 1 *
+bit 529 I 1 IO_P57
+bit 528 O 1 IO_P57 527 1 Z
+bit 527 C 1 *
+bit 526 O 1 *
+bit 525 O 1 *
+bit 524 O 1 *
+bit 523 O 1 *
+bit 522 O 1 *
+bit 521 O 1 *
+bit 520 O 1 *
+bit 519 O 1 *
+bit 518 O 1 *
+bit 517 O 1 *
+bit 516 O 1 *
+bit 515 O 1 *
+bit 514 I 1 IO_P56
+bit 513 O 1 IO_P56 512 1 Z
+bit 512 C 1 *
+bit 511 I 1 IO_P55
+bit 510 O 1 IO_P55 509 1 Z
+bit 509 C 1 *
+bit 508 I 1 M2_P54
+bit 507 I 1 M0_P52
+bit 506 I 1 M1_P50
+bit 505 I 1 IO_P49
+bit 504 O 1 IO_P49 503 1 Z
+bit 503 C 1 *
+bit 502 I 1 IO_P48
+bit 501 O 1 IO_P48 500 1 Z
+bit 500 C 1 *
+bit 499 O 1 *
+bit 498 O 1 *
+bit 497 O 1 *
+bit 496 O 1 *
+bit 495 O 1 *
+bit 494 O 1 *
+bit 493 O 1 *
+bit 492 O 1 *
+bit 491 O 1 *
+bit 490 O 1 *
+bit 489 O 1 *
+bit 488 O 1 *
+bit 487 I 1 IO_P47
+bit 486 O 1 IO_P47 485 1 Z
+bit 485 C 1 *
+bit 484 O 1 *
+bit 483 O 1 *
+bit 482 O 1 *
+bit 481 O 1 *
+bit 480 O 1 *
+bit 479 O 1 *
+bit 478 O 1 *
+bit 477 O 1 *
+bit 476 O 1 *
+bit 475 O 1 *
+bit 474 O 1 *
+bit 473 O 1 *
+bit 472 I 1 IO_P46
+bit 471 O 1 IO_P46 470 1 Z
+bit 470 C 1 *
+bit 469 I 1 IO_P45
+bit 468 O 1 IO_P45 467 1 Z
+bit 467 C 1 *
+bit 466 I 1 IO_P44
+bit 465 O 1 IO_P44 464 1 Z
+bit 464 C 1 *
+bit 463 O 1 *
+bit 462 O 1 *
+bit 461 O 1 *
+bit 460 O 1 *
+bit 459 O 1 *
+bit 458 O 1 *
+bit 457 O 1 *
+bit 456 O 1 *
+bit 455 O 1 *
+bit 454 I 1 IO_P43
+bit 453 O 1 IO_P43 452 1 Z
+bit 452 C 1 *
+bit 451 I 1 IO_P42
+bit 450 O 1 IO_P42 449 1 Z
+bit 449 C 1 *
+bit 448 O 1 *
+bit 447 O 1 *
+bit 446 O 1 *
+bit 445 I 1 IO_P41
+bit 444 O 1 IO_P41 443 1 Z
+bit 443 C 1 *
+bit 442 I 1 IO_P40
+bit 441 O 1 IO_P40 440 1 Z
+bit 440 C 1 *
+bit 439 I 1 IO_P36
+bit 438 O 1 IO_P36 437 1 Z
+bit 437 C 1 *
+bit 436 I 1 IO_P35
+bit 435 O 1 IO_P35 434 1 Z
+bit 434 C 1 *
+bit 433 O 1 *
+bit 432 O 1 *
+bit 431 O 1 *
+bit 430 O 1 *
+bit 429 O 1 *
+bit 428 O 1 *
+bit 427 O 1 *
+bit 426 O 1 *
+bit 425 O 1 *
+bit 424 O 1 *
+bit 423 O 1 *
+bit 422 O 1 *
+bit 421 O 1 *
+bit 420 O 1 *
+bit 419 O 1 *
+bit 418 O 1 *
+bit 417 O 1 *
+bit 416 O 1 *
+bit 415 I 1 IO_P34
+bit 414 O 1 IO_P34 413 1 Z
+bit 413 C 1 *
+bit 412 I 1 IO_P33
+bit 411 O 1 IO_P33 410 1 Z
+bit 410 C 1 *
+bit 409 I 1 IO_P31
+bit 408 O 1 IO_P31 407 1 Z
+bit 407 C 1 *
+bit 406 I 1 IO_P30
+bit 405 O 1 IO_P30 404 1 Z
+bit 404 C 1 *
+bit 403 O 1 *
+bit 402 O 1 *
+bit 401 O 1 *
+bit 400 O 1 *
+bit 399 O 1 *
+bit 398 O 1 *
+bit 397 O 1 *
+bit 396 O 1 *
+bit 395 O 1 *
+bit 394 I 1 IO_P29
+bit 393 O 1 IO_P29 392 1 Z
+bit 392 C 1 *
+bit 391 O 1 *
+bit 390 O 1 *
+bit 389 O 1 *
+bit 388 O 1 *
+bit 387 O 1 *
+bit 386 O 1 *
+bit 385 O 1 *
+bit 384 O 1 *
+bit 383 O 1 *
+bit 382 I 1 IO_P27
+bit 381 O 1 IO_P27 380 1 Z
+bit 380 C 1 *
+bit 379 I 1 IO_P24
+bit 378 O 1 IO_P24 377 1 Z
+bit 377 C 1 *
+bit 376 I 1 IO_P23
+bit 375 O 1 IO_P23 374 1 Z
+bit 374 C 1 *
+bit 373 O 1 *
+bit 372 O 1 *
+bit 371 O 1 *
+bit 370 O 1 *
+bit 369 O 1 *
+bit 368 O 1 *
+bit 367 I 1 IO_P22
+bit 366 O 1 IO_P22 365 1 Z
+bit 365 C 1 *
+bit 364 O 1 *
+bit 363 O 1 *
+bit 362 O 1 *
+bit 361 O 1 *
+bit 360 O 1 *
+bit 359 O 1 *
+bit 358 O 1 *
+bit 357 O 1 *
+bit 356 O 1 *
+bit 355 I 1 IO_P21
+bit 354 O 1 IO_P21 353 1 Z
+bit 353 C 1 *
+bit 352 I 1 IO_P20
+bit 351 O 1 IO_P20 350 1 Z
+bit 350 C 1 *
+bit 349 I 1 IO_P18
+bit 348 O 1 IO_P18 347 1 Z
+bit 347 C 1 *
+bit 346 I 1 IO_P17
+bit 345 O 1 IO_P17 344 1 Z
+bit 344 C 1 *
+bit 343 O 1 *
+bit 342 O 1 *
+bit 341 O 1 *
+bit 340 O 1 *
+bit 339 O 1 *
+bit 338 O 1 *
+bit 337 O 1 *
+bit 336 O 1 *
+bit 335 O 1 *
+bit 334 O 1 *
+bit 333 O 1 *
+bit 332 O 1 *
+bit 331 O 1 *
+bit 330 O 1 *
+bit 329 O 1 *
+bit 328 O 1 *
+bit 327 O 1 *
+bit 326 O 1 *
+bit 325 I 1 IO_P16
+bit 324 O 1 IO_P16 323 1 Z
+bit 323 C 1 *
+bit 322 I 1 IO_P15
+bit 321 O 1 IO_P15 320 1 Z
+bit 320 C 1 *
+bit 319 I 1 IO_P11
+bit 318 O 1 IO_P11 317 1 Z
+bit 317 C 1 *
+bit 316 I 1 IO_P10
+bit 315 O 1 IO_P10 314 1 Z
+bit 314 C 1 *
+bit 313 O 1 *
+bit 312 O 1 *
+bit 311 O 1 *
+bit 310 I 1 IO_P9
+bit 309 O 1 IO_P9 308 1 Z
+bit 308 C 1 *
+bit 307 I 1 IO_P8
+bit 306 O 1 IO_P8 305 1 Z
+bit 305 C 1 *
+bit 304 O 1 *
+bit 303 O 1 *
+bit 302 O 1 *
+bit 301 O 1 *
+bit 300 O 1 *
+bit 299 O 1 *
+bit 298 O 1 *
+bit 297 O 1 *
+bit 296 O 1 *
+bit 295 I 1 IO_P7
+bit 294 O 1 IO_P7 293 1 Z
+bit 293 C 1 *
+bit 292 I 1 IO_P6
+bit 291 O 1 IO_P6 290 1 Z
+bit 290 C 1 *
+bit 289 I 1 IO_P5
+bit 288 O 1 IO_P5 287 1 Z
+bit 287 C 1 *
+bit 286 O 1 *
+bit 285 O 1 *
+bit 284 O 1 *
+bit 283 O 1 *
+bit 282 O 1 *
+bit 281 O 1 *
+bit 280 O 1 *
+bit 279 O 1 *
+bit 278 O 1 *
+bit 277 O 1 *
+bit 276 O 1 *
+bit 275 O 1 *
+bit 274 I 1 IO_P4
+bit 273 O 1 IO_P4 272 1 Z
+bit 272 C 1 *
+bit 271 O 1 *
+bit 270 O 1 *
+bit 269 O 1 *
+bit 268 O 1 *
+bit 267 O 1 *
+bit 266 O 1 *
+bit 265 O 1 *
+bit 264 O 1 *
+bit 263 O 1 *
+bit 262 O 1 *
+bit 261 O 1 *
+bit 260 O 1 *
+bit 259 I 1 IO_P3
+bit 258 O 1 IO_P3 257 1 Z
+bit 257 C 1 *
+bit 256 O 1 *
+bit 255 O 1 *
+bit 254 O 1 *
+bit 253 O 1 *
+bit 252 O 1 *
+bit 251 O 1 *
+bit 250 I 1 IO_P206
+bit 249 O 1 IO_P206 248 1 Z
+bit 248 C 1 *
+bit 247 O 1 *
+bit 246 O 1 *
+bit 245 O 1 *
+bit 244 O 1 *
+bit 243 O 1 *
+bit 242 O 1 *
+bit 241 O 1 *
+bit 240 O 1 *
+bit 239 O 1 *
+bit 238 O 1 *
+bit 237 O 1 *
+bit 236 O 1 *
+bit 235 I 1 IO_P205
+bit 234 O 1 IO_P205 233 1 Z
+bit 233 C 1 *
+bit 232 O 1 *
+bit 231 O 1 *
+bit 230 O 1 *
+bit 229 O 1 *
+bit 228 O 1 *
+bit 227 O 1 *
+bit 226 O 1 *
+bit 225 O 1 *
+bit 224 O 1 *
+bit 223 O 1 *
+bit 222 O 1 *
+bit 221 O 1 *
+bit 220 I 1 IO_P204
+bit 219 O 1 IO_P204 218 1 Z
+bit 218 C 1 *
+bit 217 I 1 IO_P203
+bit 216 O 1 IO_P203 215 1 Z
+bit 215 C 1 *
+bit 214 I 1 IO_P202
+bit 213 O 1 IO_P202 212 1 Z
+bit 212 C 1 *
+bit 211 O 1 *
+bit 210 O 1 *
+bit 209 O 1 *
+bit 208 O 1 *
+bit 207 O 1 *
+bit 206 O 1 *
+bit 205 O 1 *
+bit 204 O 1 *
+bit 203 O 1 *
+bit 202 I 1 IO_P201
+bit 201 O 1 IO_P201 200 1 Z
+bit 200 C 1 *
+bit 199 I 1 IO_P200
+bit 198 O 1 IO_P200 197 1 Z
+bit 197 C 1 *
+bit 196 O 1 *
+bit 195 O 1 *
+bit 194 O 1 *
+bit 193 I 1 IO_P199
+bit 192 O 1 IO_P199 191 1 Z
+bit 191 C 1 *
+bit 190 I 1 IO_P198
+bit 189 O 1 IO_P198 188 1 Z
+bit 188 C 1 *
+bit 187 I 1 IO_P194
+bit 186 O 1 IO_P194 185 1 Z
+bit 185 C 1 *
+bit 184 I 1 IO_P193
+bit 183 O 1 IO_P193 182 1 Z
+bit 182 C 1 *
+bit 181 O 1 *
+bit 180 O 1 *
+bit 179 O 1 *
+bit 178 O 1 *
+bit 177 O 1 *
+bit 176 O 1 *
+bit 175 O 1 *
+bit 174 O 1 *
+bit 173 O 1 *
+bit 172 O 1 *
+bit 171 O 1 *
+bit 170 O 1 *
+bit 169 O 1 *
+bit 168 O 1 *
+bit 167 O 1 *
+bit 166 O 1 *
+bit 165 O 1 *
+bit 164 O 1 *
+bit 163 I 1 IO_P192
+bit 162 O 1 IO_P192 161 1 Z
+bit 161 C 1 *
+bit 160 I 1 IO_P191
+bit 159 O 1 IO_P191 158 1 Z
+bit 158 C 1 *
+bit 157 I 1 IO_P189
+bit 156 O 1 IO_P189 155 1 Z
+bit 155 C 1 *
+bit 154 I 1 IO_P188
+bit 153 O 1 IO_P188 152 1 Z
+bit 152 C 1 *
+bit 151 O 1 *
+bit 150 O 1 *
+bit 149 O 1 *
+bit 148 O 1 *
+bit 147 O 1 *
+bit 146 O 1 *
+bit 145 O 1 *
+bit 144 O 1 *
+bit 143 O 1 *
+bit 142 O 1 *
+bit 141 O 1 *
+bit 140 O 1 *
+bit 139 O 1 *
+bit 138 O 1 *
+bit 137 O 1 *
+bit 136 O 1 *
+bit 135 O 1 *
+bit 134 O 1 *
+bit 133 O 1 *
+bit 132 O 1 *
+bit 131 O 1 *
+bit 130 I 1 IO_P187
+bit 129 O 1 IO_P187 128 1 Z
+bit 128 C 1 *
+bit 127 I 1 GCK3_P185
+bit 126 I 1 GCK2_P182
+bit 125 I 1 IO_P181
+bit 124 O 1 IO_P181 123 1 Z
+bit 123 C 1 *
+bit 122 O 1 *
+bit 121 O 1 *
+bit 120 O 1 *
+bit 119 O 1 *
+bit 118 O 1 *
+bit 117 O 1 *
+bit 116 O 1 *
+bit 115 O 1 *
+bit 114 O 1 *
+bit 113 I 1 IO_P180
+bit 112 O 1 IO_P180 111 1 Z
+bit 111 C 1 *
+bit 110 O 1 *
+bit 109 O 1 *
+bit 108 O 1 *
+bit 107 O 1 *
+bit 106 O 1 *
+bit 105 O 1 *
+bit 104 O 1 *
+bit 103 O 1 *
+bit 102 O 1 *
+bit 101 I 1 IO_P179
+bit 100 O 1 IO_P179 99 1 Z
+bit 99 C 1 *
+bit 98 I 1 IO_P178
+bit 97 O 1 IO_P178 96 1 Z
+bit 96 C 1 *
+bit 95 I 1 IO_P176
+bit 94 O 1 IO_P176 93 1 Z
+bit 93 C 1 *
+bit 92 I 1 IO_P175
+bit 91 O 1 IO_P175 90 1 Z
+bit 90 C 1 *
+bit 89 O 1 *
+bit 88 O 1 *
+bit 87 O 1 *
+bit 86 O 1 *
+bit 85 O 1 *
+bit 84 O 1 *
+bit 83 O 1 *
+bit 82 O 1 *
+bit 81 O 1 *
+bit 80 O 1 *
+bit 79 O 1 *
+bit 78 O 1 *
+bit 77 O 1 *
+bit 76 O 1 *
+bit 75 O 1 *
+bit 74 O 1 *
+bit 73 O 1 *
+bit 72 O 1 *
+bit 71 I 1 IO_P174
+bit 70 O 1 IO_P174 69 1 Z
+bit 69 C 1 *
+bit 68 I 1 IO_P173
+bit 67 O 1 IO_P173 66 1 Z
+bit 66 C 1 *
+bit 65 I 1 IO_P169
+bit 64 O 1 IO_P169 63 1 Z
+bit 63 C 1 *
+bit 62 I 1 IO_P168
+bit 61 O 1 IO_P168 60 1 Z
+bit 60 C 1 *
+bit 59 O 1 *
+bit 58 O 1 *
+bit 57 O 1 *
+bit 56 I 1 IO_P167
+bit 55 O 1 IO_P167 54 1 Z
+bit 54 C 1 *
+bit 53 I 1 IO_P166
+bit 52 O 1 IO_P166 51 1 Z
+bit 51 C 1 *
+bit 50 O 1 *
+bit 49 O 1 *
+bit 48 O 1 *
+bit 47 O 1 *
+bit 46 O 1 *
+bit 45 O 1 *
+bit 44 O 1 *
+bit 43 O 1 *
+bit 42 O 1 *
+bit 41 I 1 IO_P165
+bit 40 O 1 IO_P165 39 1 Z
+bit 39 C 1 *
+bit 38 I 1 IO_P164
+bit 37 O 1 IO_P164 36 1 Z
+bit 36 C 1 *
+bit 35 I 1 IO_P163
+bit 34 O 1 IO_P163 33 1 Z
+bit 33 C 1 *
+bit 32 O 1 *
+bit 31 O 1 *
+bit 30 O 1 *
+bit 29 O 1 *
+bit 28 O 1 *
+bit 27 O 1 *
+bit 26 O 1 *
+bit 25 O 1 *
+bit 24 O 1 *
+bit 23 O 1 *
+bit 22 O 1 *
+bit 21 O 1 *
+bit 20 I 1 IO_P162
+bit 19 O 1 IO_P162 18 1 Z
+bit 18 C 1 *
+bit 17 O 1 *
+bit 16 O 1 *
+bit 15 O 1 *
+bit 14 O 1 *
+bit 13 O 1 *
+bit 12 O 1 *
+bit 11 O 1 *
+bit 10 O 1 *
+bit 9 O 1 *
+bit 8 O 1 *
+bit 7 O 1 *
+bit 6 O 1 *
+bit 5 I 1 IO_P161
+bit 4 O 1 IO_P161 3 1 Z
+bit 3 C 1 *
+bit 2 I 1 IO_P160
+bit 1 O 1 IO_P160 0 1 Z
+bit 0 C 1 *
--- /dev/null
+#
+# $Id$
+#
+# Copyright (C) 2003 Tower Technologies s.r.l.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Arnim Laeuger <arniml@users.sourceforge.net>, 2005.
+#
+
+# bits 31-28 of the Device Identification Register
+1001 xc2s300e 9
--- /dev/null
+#
+# $Id$
+#
+# JTAG package script for XC2S300E-FG456
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Arnim Laeuger <arniml@users.sourceforge.net>
+#
+
+salias CCLK_B22 CCLK_PAD437
+salias DONE_W20 DONE_PAD313
+salias GCK0_AA12 GCK0_PAD254
+salias GCK1_AB12 GCK1_PAD250
+salias GCK2_A11 GCK2_PAD500
+salias GCK3_C11 GCK3_PAD2
+salias INIT_W21 INIT_PAD317
+salias IO_A10 IO_PAD9
+salias IO_A12 IO_PAD499
+salias IO_A13 IO_PAD490
+salias IO_A14 IO_PAD481
+salias IO_A15 IO_PAD475
+salias IO_A16 IO_PAD466
+salias IO_A17 IO_PAD456
+salias IO_A18 IO_PAD452
+salias IO_A19 IO_PAD449
+salias IO_A20 IO_PAD445
+salias IO_A3 IO_PAD54
+salias IO_A4 IO_PAD53
+salias IO_A5 IO_PAD47
+salias IO_A6 IO_PAD42
+salias IO_A7 IO_PAD35
+salias IO_A8 IO_PAD27
+salias IO_A9 IO_PAD19
+salias IO_AA10 IO_PAD231
+salias IO_AA11 IO_PAD246
+salias IO_AA13 IO_PAD261
+salias IO_AA14 IO_PAD271
+salias IO_AA15 IO_PAD278
+salias IO_AA16 IO_PAD288
+salias IO_AA17 IO_PAD293
+salias IO_AA18 IO_PAD300
+salias IO_AA19 IO_PAD305
+salias IO_AA20 IO_PAD310
+salias IO_AA3 IO_PAD193
+salias IO_AA5 IO_PAD196
+salias IO_AA6 IO_PAD203
+salias IO_AA7 IO_PAD209
+salias IO_AA8 IO_PAD215
+salias IO_AA9 IO_PAD224
+salias IO_AB10 IO_PAD225
+salias IO_AB11 IO_PAD247
+salias IO_AB13 IO_PAD260
+salias IO_AB14 IO_PAD270
+salias IO_AB15 IO_PAD272
+salias IO_AB16 IO_PAD286
+salias IO_AB17 IO_PAD287
+salias IO_AB18 IO_PAD297
+salias IO_AB19 IO_PAD304
+salias IO_AB20 IO_PAD309
+salias IO_AB21 IO_PAD307
+salias IO_AB3 IO_PAD194
+salias IO_AB4 IO_PAD195
+salias IO_AB5 IO_PAD200
+salias IO_AB6 IO_PAD201
+salias IO_AB7 IO_PAD208
+salias IO_AB8 IO_PAD214
+salias IO_AB9 IO_PAD223
+salias IO_B10 IO_PAD10
+salias IO_B11 IO_PAD5
+salias IO_B12 IO_PAD494
+salias IO_B13 IO_PAD489
+salias IO_B14 IO_PAD480
+salias IO_B15 IO_PAD474
+salias IO_B16 IO_PAD465
+salias IO_B17 IO_PAD455
+salias IO_B18 IO_PAD451
+salias IO_B19 IO_PAD448
+salias IO_B20 IO_PAD444
+salias IO_B3 IO_PAD55
+salias IO_B4 IO_PAD50
+salias IO_B5 IO_PAD48
+salias IO_B6 IO_PAD43
+salias IO_B7 IO_PAD36
+salias IO_B8 IO_PAD28
+salias IO_B9 IO_PAD20
+salias IO_C10 IO_PAD12
+salias IO_C12 IO_PAD493
+salias IO_C13 IO_PAD484
+salias IO_C14 IO_PAD478
+salias IO_C15 IO_PAD469
+salias IO_C16 IO_PAD463
+salias IO_C17 IO_PAD454
+salias IO_C18 IO_PAD447
+salias IO_C1 IO_PAD67
+salias IO_C21 IO_PAD436
+salias IO_C22 IO_PAD435
+salias IO_C2 IO_PAD66
+salias IO_C4 IO_PAD56
+salias IO_C5 IO_PAD51
+salias IO_C6 IO_PAD46
+salias IO_C7 IO_PAD37
+salias IO_C8 IO_PAD33
+salias IO_C9 IO_PAD22
+salias IO_D10 IO_PAD13
+salias IO_D11 IO_PAD6
+salias IO_D12 IO_PAD496
+salias IO_D13 IO_PAD483
+salias IO_D14 IO_PAD477
+salias IO_D15 IO_PAD468
+salias IO_D16 IO_PAD462
+salias IO_D17 IO_PAD453
+salias IO_D18 IO_PAD446
+salias IO_D1 IO_PAD69
+salias IO_D20 IO_PAD433
+salias IO_D21 IO_PAD428
+salias IO_D22 IO_PAD427
+salias IO_D2 IO_PAD68
+salias IO_D3 IO_PAD65
+salias IO_D5 IO_PAD58
+salias IO_D6 IO_PAD49
+salias IO_D7 IO_PAD39
+salias IO_D8 IO_PAD34
+salias IO_D9 IO_PAD24
+salias IO_E10 IO_PAD21
+salias IO_E11 IO_PAD11
+salias IO_E12 IO_PAD497
+salias IO_E13 IO_PAD482
+salias IO_E14 IO_PAD476
+salias IO_E15 IO_PAD461
+salias IO_E16 IO_PAD459
+salias IO_E17 IO_PAD460
+salias IO_E19 IO_PAD432
+salias IO_E1 IO_PAD73
+salias IO_E20 IO_PAD431
+salias IO_E21 IO_PAD422
+salias IO_E22 IO_PAD418
+salias IO_E2 IO_PAD71
+salias IO_E3 IO_PAD72
+salias IO_E7 IO_PAD41
+salias IO_E8 IO_PAD40
+salias IO_E9 IO_PAD26
+salias IO_F10 IO_PAD18
+salias IO_F11 IO_PAD7
+salias IO_F12 IO_PAD498
+salias IO_F13 IO_PAD491
+salias IO_F14 IO_PAD467
+salias IO_F18 IO_PAD426
+salias IO_F19 IO_PAD425
+salias IO_F1 IO_PAD81
+salias IO_F20 IO_PAD423
+salias IO_F21 IO_PAD419
+salias IO_F22 IO_PAD412
+salias IO_F2 IO_PAD80
+salias IO_F3 IO_PAD77
+salias IO_F4 IO_PAD76
+salias IO_F5 IO_PAD74
+salias IO_F9 IO_PAD25
+salias IO_G18 IO_PAD417
+salias IO_G19 IO_PAD416
+salias IO_G1 IO_PAD87
+salias IO_G20 IO_PAD415
+salias IO_G21 IO_PAD413
+salias IO_G22 IO_PAD411
+salias IO_G2 IO_PAD86
+salias IO_G3 IO_PAD84
+salias IO_G4 IO_PAD83
+salias IO_G5 IO_PAD82
+salias IO_H18 IO_PAD410
+salias IO_H19 IO_PAD409
+salias IO_H1 IO_PAD96
+salias IO_H20 IO_PAD404
+salias IO_H21 IO_PAD403
+salias IO_H22 IO_PAD400
+salias IO_H2 IO_PAD95
+salias IO_H3 IO_PAD89
+salias IO_H4 IO_PAD90
+salias IO_H5 IO_PAD88
+salias IO_J17 IO_PAD402
+salias IO_J18 IO_PAD401
+salias IO_J19 IO_PAD398
+salias IO_J1 IO_PAD103
+salias IO_J20 IO_PAD397
+salias IO_J21 IO_PAD396
+salias IO_J22 IO_PAD395
+salias IO_J2 IO_PAD102
+salias IO_J3 IO_PAD101
+salias IO_J4 IO_PAD98
+salias IO_J5 IO_PAD99
+salias IO_J6 IO_PAD97
+salias IO_K17 IO_PAD394
+salias IO_K18 IO_PAD389
+salias IO_K19 IO_PAD388
+salias IO_K1 IO_PAD114
+salias IO_K20 IO_PAD387
+salias IO_K21 IO_PAD386
+salias IO_K22 IO_PAD385
+salias IO_K2 IO_PAD112
+salias IO_K3 IO_PAD110
+salias IO_K4 IO_PAD111
+salias IO_K5 IO_PAD104
+salias IO_K6 IO_PAD105
+salias IO_L17 IO_PAD383
+salias IO_L18 IO_PAD382
+salias IO_L19 IO_PAD381
+salias IO_L1 IO_PAD115
+salias IO_L20 IO_PAD380
+salias IO_L21 IO_PAD379
+salias IO_L22 IO_PAD375
+salias IO_L2 IO_PAD118
+salias IO_L3 IO_PAD117
+salias IO_L4 IO_PAD119
+salias IO_L5 IO_PAD120
+salias IO_L6 IO_PAD121
+salias IO_M17 IO_PAD372
+salias IO_M18 IO_PAD370
+salias IO_M19 IO_PAD371
+salias IO_M1 IO_PAD125
+salias IO_M20 IO_PAD367
+salias IO_M21 IO_PAD368
+salias IO_M22 IO_PAD365
+salias IO_M2 IO_PAD128
+salias IO_M3 IO_PAD129
+salias IO_M4 IO_PAD130
+salias IO_M5 IO_PAD132
+salias IO_M6 IO_PAD133
+salias IO_N17 IO_PAD364
+salias IO_N18 IO_PAD363
+salias IO_N19 IO_PAD357
+salias IO_N1 IO_PAD134
+salias IO_N20 IO_PAD358
+salias IO_N21 IO_PAD355
+salias IO_N22 IO_PAD354
+salias IO_N2 IO_PAD135
+salias IO_N3 IO_PAD136
+salias IO_N4 IO_PAD141
+salias IO_N5 IO_PAD142
+salias IO_N6 IO_PAD143
+salias IO_P17 IO_PAD356
+salias IO_P18 IO_PAD351
+salias IO_P19 IO_PAD352
+salias IO_P1 IO_PAD144
+salias IO_P20 IO_PAD350
+salias IO_P21 IO_PAD349
+salias IO_P22 IO_PAD348
+salias IO_P2 IO_PAD145
+salias IO_P3 IO_PAD148
+salias IO_P4 IO_PAD149
+salias IO_P5 IO_PAD150
+salias IO_P6 IO_PAD151
+salias IO_R18 IO_PAD342
+salias IO_R19 IO_PAD343
+salias IO_R1 IO_PAD147
+salias IO_R20 IO_PAD341
+salias IO_R21 IO_PAD339
+salias IO_R22 IO_PAD340
+salias IO_R2 IO_PAD156
+salias IO_R3 IO_PAD157
+salias IO_R4 IO_PAD158
+salias IO_R5 IO_PAD159
+salias IO_T18 IO_PAD336
+salias IO_T19 IO_PAD337
+salias IO_T1 IO_PAD165
+salias IO_T20 IO_PAD335
+salias IO_T21 IO_PAD333
+salias IO_T22 IO_PAD334
+salias IO_T2 IO_PAD160
+salias IO_T3 IO_PAD162
+salias IO_T4 IO_PAD163
+salias IO_T5 IO_PAD164
+salias IO_U10 IO_PAD239
+salias IO_U11 IO_PAD240
+salias IO_U12 IO_PAD258
+salias IO_U13 IO_PAD269
+salias IO_U14 IO_PAD276
+salias IO_U18 IO_PAD329
+salias IO_U19 IO_PAD330
+salias IO_U1 IO_PAD166
+salias IO_U20 IO_PAD327
+salias IO_U21 IO_PAD326
+salias IO_U22 IO_PAD325
+salias IO_U2 IO_PAD169
+salias IO_U3 IO_PAD170
+salias IO_U4 IO_PAD172
+salias IO_U9 IO_PAD230
+salias IO_V10 IO_PAD238
+salias IO_V11 IO_PAD242
+salias IO_V12 IO_PAD257
+salias IO_V13 IO_PAD264
+salias IO_V14 IO_PAD277
+salias IO_V15 IO_PAD285
+salias IO_V16 IO_PAD292
+salias IO_V17 IO_PAD299
+salias IO_V19 IO_PAD321
+salias IO_V1 IO_PAD173
+salias IO_V20 IO_PAD322
+salias IO_V21 IO_PAD320
+salias IO_V22 IO_PAD324
+salias IO_V2 IO_PAD175
+salias IO_V3 IO_PAD178
+salias IO_V4 IO_PAD179
+salias IO_V6 IO_PAD204
+salias IO_V7 IO_PAD211
+salias IO_V8 IO_PAD217
+salias IO_V9 IO_PAD229
+salias IO_W10 IO_PAD232
+salias IO_W11 IO_PAD243
+salias IO_W12 IO_PAD256
+salias IO_W13 IO_PAD263
+salias IO_W14 IO_PAD275
+salias IO_W15 IO_PAD284
+salias IO_W16 IO_PAD291
+salias IO_W17 IO_PAD298
+salias IO_W18 IO_PAD302
+salias IO_W1 IO_PAD174
+salias IO_W22 IO_PAD319
+salias IO_W2 IO_PAD177
+salias IO_W3 IO_PAD183
+salias IO_W5 IO_PAD197
+salias IO_W6 IO_PAD205
+salias IO_W7 IO_PAD212
+salias IO_W8 IO_PAD218
+salias IO_W9 IO_PAD226
+salias IO_Y10 IO_PAD233
+salias IO_Y11 IO_PAD245
+salias IO_Y12 IO_PAD255
+salias IO_Y13 IO_PAD262
+salias IO_Y14 IO_PAD273
+salias IO_Y15 IO_PAD279
+salias IO_Y16 IO_PAD290
+salias IO_Y17 IO_PAD294
+salias IO_Y18 IO_PAD301
+salias IO_Y19 IO_PAD306
+salias IO_Y1 IO_PAD180
+salias IO_Y22 IO_PAD318
+salias IO_Y2 IO_PAD182
+salias IO_Y5 IO_PAD198
+salias IO_Y6 IO_PAD202
+salias IO_Y7 IO_PAD210
+salias IO_Y8 IO_PAD216
+salias IO_Y9 IO_PAD227
+salias M0_AA1 M0_PAD187
+salias M1_U5 M1_PAD184
+salias M2_AB2 M2_PAD190
--- /dev/null
+#
+# $Id$
+#
+# JTAG package script for XC2S300E-FT256
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Arnim Laeuger <arniml@users.sourceforge.net>
+#
+
+salias CCLK_A15 CCLK_PAD437
+salias DONE_T15 DONE_PAD313
+salias GCK0_T9 GCK0_PAD254
+salias GCK1_T8 GCK1_PAD250
+salias GCK2_B8 GCK2_PAD500
+salias GCK3_C8 GCK3_PAD2
+salias INIT_P15 INIT_PAD317
+salias IO_A10 IO_PAD484
+salias IO_A11 IO_PAD469
+salias IO_A12 IO_PAD456
+salias IO_A13 IO_PAD445
+salias IO_A14 IO_PAD444
+salias IO_A3 IO_PAD51
+salias IO_A4 IO_PAD50
+salias IO_A5 IO_PAD33
+salias IO_A6 IO_PAD22
+salias IO_A7 IO_PAD9
+salias IO_A8 IO_PAD499
+salias IO_A9 IO_PAD496
+salias IO_B10 IO_PAD483
+salias IO_B11 IO_PAD468
+salias IO_B12 IO_PAD455
+salias IO_B13 IO_PAD451
+salias IO_B16 IO_PAD435
+salias IO_B3 IO_PAD58
+salias IO_B4 IO_PAD46
+salias IO_B5 IO_PAD34
+salias IO_B6 IO_PAD27
+salias IO_B7 IO_PAD19
+salias IO_B9 IO_PAD494
+salias IO_C10 IO_PAD480
+salias IO_C11 IO_PAD466
+salias IO_C12 IO_PAD452
+salias IO_C15 IO_PAD436
+salias IO_C16 IO_PAD419
+salias IO_C1 IO_PAD71
+salias IO_C2 IO_PAD69
+salias IO_C4 IO_PAD47
+salias IO_C5 IO_PAD43
+salias IO_C6 IO_PAD28
+salias IO_C7 IO_PAD18
+salias IO_C9 IO_PAD490
+salias IO_D10 IO_PAD475
+salias IO_D11 IO_PAD465
+salias IO_D12 IO_PAD459
+salias IO_D14 IO_PAD428
+salias IO_D15 IO_PAD418
+salias IO_D16 IO_PAD410
+salias IO_D1 IO_PAD77
+salias IO_D2 IO_PAD76
+salias IO_D3 IO_PAD65
+salias IO_D5 IO_PAD42
+salias IO_D6 IO_PAD36
+salias IO_D7 IO_PAD13
+salias IO_D8 IO_PAD5
+salias IO_D9 IO_PAD489
+salias IO_E10 IO_PAD474
+salias IO_E11 IO_PAD460
+salias IO_E13 IO_PAD427
+salias IO_E14 IO_PAD415
+salias IO_E15 IO_PAD409
+salias IO_E16 IO_PAD400
+salias IO_E1 IO_PAD86
+salias IO_E2 IO_PAD84
+salias IO_E3 IO_PAD80
+salias IO_E4 IO_PAD81
+salias IO_E6 IO_PAD37
+salias IO_E7 IO_PAD12
+salias IO_F12 IO_PAD423
+salias IO_F13 IO_PAD413
+salias IO_F14 IO_PAD404
+salias IO_F15 IO_PAD398
+salias IO_F16 IO_PAD389
+salias IO_F1 IO_PAD96
+salias IO_F2 IO_PAD95
+salias IO_F3 IO_PAD90
+salias IO_F4 IO_PAD89
+salias IO_F5 IO_PAD99
+salias IO_G12 IO_PAD422
+salias IO_G13 IO_PAD403
+salias IO_G14 IO_PAD395
+salias IO_G15 IO_PAD388
+salias IO_G16 IO_PAD380
+salias IO_G1 IO_PAD111
+salias IO_G2 IO_PAD110
+salias IO_G3 IO_PAD104
+salias IO_G4 IO_PAD105
+salias IO_G5 IO_PAD101
+salias IO_H13 IO_PAD394
+salias IO_H14 IO_PAD383
+salias IO_H15 IO_PAD385
+salias IO_H16 IO_PAD379
+salias IO_H1 IO_PAD121
+salias IO_H2 IO_PAD120
+salias IO_H3 IO_PAD117
+salias IO_H4 IO_PAD115
+salias IO_J13 IO_PAD375
+salias IO_J14 IO_PAD364
+salias IO_J15 IO_PAD368
+salias IO_J16 IO_PAD370
+salias IO_J1 IO_PAD135
+salias IO_J2 IO_PAD130
+salias IO_J3 IO_PAD132
+salias IO_J4 IO_PAD125
+salias IO_K12 IO_PAD358
+salias IO_K13 IO_PAD363
+salias IO_K14 IO_PAD349
+salias IO_K15 IO_PAD352
+salias IO_K16 IO_PAD354
+salias IO_K1 IO_PAD136
+salias IO_K2 IO_PAD141
+salias IO_K3 IO_PAD142
+salias IO_K4 IO_PAD150
+salias IO_K5 IO_PAD151
+salias IO_L12 IO_PAD357
+salias IO_L13 IO_PAD348
+salias IO_L14 IO_PAD340
+salias IO_L15 IO_PAD342
+salias IO_L16 IO_PAD343
+salias IO_L1 IO_PAD145
+salias IO_L2 IO_PAD147
+salias IO_L3 IO_PAD156
+salias IO_L4 IO_PAD165
+salias IO_L5 IO_PAD166
+salias IO_M10 IO_PAD279
+salias IO_M11 IO_PAD294
+salias IO_M13 IO_PAD337
+salias IO_M14 IO_PAD330
+salias IO_M15 IO_PAD333
+salias IO_M16 IO_PAD334
+salias IO_M1 IO_PAD160
+salias IO_M2 IO_PAD157
+salias IO_M3 IO_PAD169
+salias IO_M4 IO_PAD170
+salias IO_M6 IO_PAD223
+salias IO_M7 IO_PAD238
+salias IO_N10 IO_PAD278
+salias IO_N11 IO_PAD293
+salias IO_N12 IO_PAD298
+salias IO_N14 IO_PAD329
+salias IO_N15 IO_PAD322
+salias IO_N16 IO_PAD324
+salias IO_N1 IO_PAD162
+salias IO_N2 IO_PAD174
+salias IO_N3 IO_PAD175
+salias IO_N5 IO_PAD204
+salias IO_N6 IO_PAD214
+salias IO_N7 IO_PAD224
+salias IO_N8 IO_PAD239
+salias IO_N9 IO_PAD260
+salias IO_P10 IO_PAD269
+salias IO_P11 IO_PAD284
+salias IO_P12 IO_PAD297
+salias IO_P13 IO_PAD304
+salias IO_P16 IO_PAD318
+salias IO_P1 IO_PAD182
+salias IO_P2 IO_PAD183
+salias IO_P4 IO_PAD193
+salias IO_P5 IO_PAD205
+salias IO_P6 IO_PAD215
+salias IO_P7 IO_PAD229
+salias IO_P8 IO_PAD243
+salias IO_P9 IO_PAD258
+salias IO_R10 IO_PAD264
+salias IO_R11 IO_PAD270
+salias IO_R12 IO_PAD285
+salias IO_R13 IO_PAD302
+salias IO_R14 IO_PAD310
+salias IO_R4 IO_PAD194
+salias IO_R5 IO_PAD208
+salias IO_R6 IO_PAD217
+salias IO_R7 IO_PAD232
+salias IO_R8 IO_PAD247
+salias IO_R9 IO_PAD255
+salias IO_T10 IO_PAD263
+salias IO_T11 IO_PAD273
+salias IO_T12 IO_PAD287
+salias IO_T13 IO_PAD288
+salias IO_T14 IO_PAD309
+salias IO_T3 IO_PAD200
+salias IO_T4 IO_PAD201
+salias IO_T5 IO_PAD209
+salias IO_T6 IO_PAD218
+salias IO_T7 IO_PAD233
+salias M0_T2 M0_PAD187
+salias M1_R1 M1_PAD184
+salias M2_R3 M2_PAD190
--- /dev/null
+#
+# $Id$
+#
+# JTAG package script for XC2S300E-PQ240
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Arnim Laeuger <arniml@users.sourceforge.net>
+#
+
+salias CCLK_P155 CCLK_PAD437
+salias DONE_P104 DONE_PAD313
+salias GCK0_P80 GCK0_PAD254
+salias GCK1_P77 GCK1_PAD250
+salias GCK2_P182 GCK2_PAD500
+salias GCK3_P185 GCK3_PAD2
+salias INIT_P107 INIT_PAD317
+salias IO_P100 IO_PAD302
+salias IO_P101 IO_PAD309
+salias IO_P102 IO_PAD310
+salias IO_P108 IO_PAD318
+salias IO_P109 IO_PAD324
+salias IO_P10 IO_PAD89
+salias IO_P110 IO_PAD330
+salias IO_P111 IO_PAD333
+salias IO_P112 IO_PAD334
+salias IO_P113 IO_PAD339
+salias IO_P114 IO_PAD341
+salias IO_P115 IO_PAD342
+salias IO_P116 IO_PAD343
+salias IO_P11 IO_PAD90
+salias IO_P120 IO_PAD348
+salias IO_P121 IO_PAD349
+salias IO_P122 IO_PAD354
+salias IO_P123 IO_PAD355
+salias IO_P125 IO_PAD363
+salias IO_P126 IO_PAD364
+salias IO_P127 IO_PAD370
+salias IO_P129 IO_PAD375
+salias IO_P132 IO_PAD379
+salias IO_P133 IO_PAD380
+salias IO_P134 IO_PAD383
+salias IO_P135 IO_PAD388
+salias IO_P136 IO_PAD389
+salias IO_P138 IO_PAD394
+salias IO_P139 IO_PAD395
+salias IO_P140 IO_PAD403
+salias IO_P141 IO_PAD404
+salias IO_P145 IO_PAD409
+salias IO_P146 IO_PAD410
+salias IO_P147 IO_PAD411
+salias IO_P148 IO_PAD413
+salias IO_P149 IO_PAD418
+salias IO_P150 IO_PAD419
+salias IO_P151 IO_PAD422
+salias IO_P152 IO_PAD428
+salias IO_P153 IO_PAD435
+salias IO_P154 IO_PAD436
+salias IO_P15 IO_PAD95
+salias IO_P160 IO_PAD444
+salias IO_P161 IO_PAD445
+salias IO_P162 IO_PAD451
+salias IO_P163 IO_PAD456
+salias IO_P164 IO_PAD459
+salias IO_P165 IO_PAD460
+salias IO_P166 IO_PAD465
+salias IO_P167 IO_PAD467
+salias IO_P168 IO_PAD468
+salias IO_P169 IO_PAD469
+salias IO_P16 IO_PAD96
+salias IO_P173 IO_PAD474
+salias IO_P174 IO_PAD475
+salias IO_P175 IO_PAD483
+salias IO_P176 IO_PAD484
+salias IO_P178 IO_PAD489
+salias IO_P179 IO_PAD490
+salias IO_P17 IO_PAD104
+salias IO_P180 IO_PAD496
+salias IO_P181 IO_PAD499
+salias IO_P187 IO_PAD5
+salias IO_P188 IO_PAD12
+salias IO_P189 IO_PAD13
+salias IO_P18 IO_PAD105
+salias IO_P191 IO_PAD18
+salias IO_P192 IO_PAD19
+salias IO_P193 IO_PAD27
+salias IO_P194 IO_PAD28
+salias IO_P198 IO_PAD33
+salias IO_P199 IO_PAD34
+salias IO_P200 IO_PAD35
+salias IO_P201 IO_PAD37
+salias IO_P202 IO_PAD42
+salias IO_P203 IO_PAD43
+salias IO_P204 IO_PAD46
+salias IO_P205 IO_PAD51
+salias IO_P206 IO_PAD58
+salias IO_P20 IO_PAD110
+salias IO_P21 IO_PAD111
+salias IO_P22 IO_PAD117
+salias IO_P23 IO_PAD120
+salias IO_P24 IO_PAD121
+salias IO_P27 IO_PAD125
+salias IO_P29 IO_PAD130
+salias IO_P30 IO_PAD135
+salias IO_P31 IO_PAD136
+salias IO_P33 IO_PAD144
+salias IO_P34 IO_PAD145
+salias IO_P35 IO_PAD150
+salias IO_P36 IO_PAD151
+salias IO_P3 IO_PAD65
+salias IO_P40 IO_PAD156
+salias IO_P41 IO_PAD157
+salias IO_P42 IO_PAD158
+salias IO_P43 IO_PAD160
+salias IO_P44 IO_PAD165
+salias IO_P45 IO_PAD166
+salias IO_P46 IO_PAD169
+salias IO_P47 IO_PAD175
+salias IO_P48 IO_PAD182
+salias IO_P49 IO_PAD183
+salias IO_P4 IO_PAD71
+salias IO_P55 IO_PAD193
+salias IO_P56 IO_PAD194
+salias IO_P57 IO_PAD200
+salias IO_P58 IO_PAD205
+salias IO_P59 IO_PAD208
+salias IO_P5 IO_PAD77
+salias IO_P60 IO_PAD209
+salias IO_P61 IO_PAD214
+salias IO_P62 IO_PAD215
+salias IO_P63 IO_PAD217
+salias IO_P64 IO_PAD218
+salias IO_P68 IO_PAD223
+salias IO_P69 IO_PAD224
+salias IO_P6 IO_PAD80
+salias IO_P70 IO_PAD232
+salias IO_P71 IO_PAD233
+salias IO_P73 IO_PAD238
+salias IO_P74 IO_PAD239
+salias IO_P75 IO_PAD247
+salias IO_P7 IO_PAD81
+salias IO_P81 IO_PAD255
+salias IO_P82 IO_PAD258
+salias IO_P83 IO_PAD263
+salias IO_P84 IO_PAD264
+salias IO_P86 IO_PAD269
+salias IO_P87 IO_PAD270
+salias IO_P88 IO_PAD278
+salias IO_P89 IO_PAD279
+salias IO_P8 IO_PAD86
+salias IO_P93 IO_PAD284
+salias IO_P94 IO_PAD285
+salias IO_P95 IO_PAD286
+salias IO_P96 IO_PAD288
+salias IO_P97 IO_PAD293
+salias IO_P98 IO_PAD294
+salias IO_P99 IO_PAD297
+salias IO_P9 IO_PAD88
+salias M0_P52 M0_PAD187
+salias M1_P50 M1_PAD184
+salias M2_P54 M2_PAD190
--- /dev/null
+#
+# $Id$
+#
+# JTAG declarations for XC2S300E
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Arnim Laeuger <arniml@users.sourceforge.net>
+#
+# Note:
+# The signals defined in this file are generic for any XC2S300E.
+# Signalnames according to Altera's package tables are set in the
+# package specific scripts.
+#
+
+
+signal CCLK_PAD437
+signal DONE_PAD313
+signal DXN_PAD192
+signal DXP_PAD191
+signal GCK0_PAD254
+signal GCK1_PAD250
+signal GCK2_PAD500
+signal GCK3_PAD2
+signal INIT_PAD317
+signal M0_PAD187
+signal M1_PAD184
+signal M2_PAD190
+signal PROGRAM
+signal IO_PAD5
+signal IO_PAD6
+signal IO_PAD7
+signal IO_PAD9
+signal IO_PAD10
+signal IO_PAD11
+signal IO_PAD12
+signal IO_PAD13
+signal IO_PAD18
+signal IO_PAD19
+signal IO_PAD20
+signal IO_PAD21
+signal IO_PAD22
+signal IO_PAD24
+signal IO_PAD25
+signal IO_PAD26
+signal IO_PAD27
+signal IO_PAD28
+signal IO_PAD33
+signal IO_PAD34
+signal IO_PAD35
+signal IO_PAD36
+signal IO_PAD37
+signal IO_PAD39
+signal IO_PAD40
+signal IO_PAD41
+signal IO_PAD42
+signal IO_PAD43
+signal IO_PAD46
+signal IO_PAD47
+signal IO_PAD48
+signal IO_PAD49
+signal IO_PAD50
+signal IO_PAD51
+signal IO_PAD53
+signal IO_PAD54
+signal IO_PAD55
+signal IO_PAD56
+signal IO_PAD58
+signal IO_PAD65
+signal IO_PAD66
+signal IO_PAD67
+signal IO_PAD68
+signal IO_PAD69
+signal IO_PAD71
+signal IO_PAD72
+signal IO_PAD73
+signal IO_PAD74
+signal IO_PAD76
+signal IO_PAD77
+signal IO_PAD80
+signal IO_PAD81
+signal IO_PAD82
+signal IO_PAD83
+signal IO_PAD84
+signal IO_PAD86
+signal IO_PAD87
+signal IO_PAD88
+signal IO_PAD89
+signal IO_PAD90
+signal IO_PAD95
+signal IO_PAD96
+signal IO_PAD97
+signal IO_PAD98
+signal IO_PAD99
+signal IO_PAD101
+signal IO_PAD102
+signal IO_PAD103
+signal IO_PAD104
+signal IO_PAD105
+signal IO_PAD110
+signal IO_PAD111
+signal IO_PAD112
+signal IO_PAD114
+signal IO_PAD115
+signal IO_PAD117
+signal IO_PAD118
+signal IO_PAD119
+signal IO_PAD120
+signal IO_PAD121
+signal IO_PAD125
+signal IO_PAD128
+signal IO_PAD129
+signal IO_PAD130
+signal IO_PAD132
+signal IO_PAD133
+signal IO_PAD134
+signal IO_PAD135
+signal IO_PAD136
+signal IO_PAD141
+signal IO_PAD142
+signal IO_PAD143
+signal IO_PAD144
+signal IO_PAD145
+signal IO_PAD147
+signal IO_PAD148
+signal IO_PAD149
+signal IO_PAD150
+signal IO_PAD151
+signal IO_PAD156
+signal IO_PAD157
+signal IO_PAD158
+signal IO_PAD159
+signal IO_PAD160
+signal IO_PAD162
+signal IO_PAD163
+signal IO_PAD164
+signal IO_PAD165
+signal IO_PAD166
+signal IO_PAD169
+signal IO_PAD170
+signal IO_PAD172
+signal IO_PAD173
+signal IO_PAD174
+signal IO_PAD175
+signal IO_PAD177
+signal IO_PAD178
+signal IO_PAD179
+signal IO_PAD180
+signal IO_PAD182
+signal IO_PAD183
+signal IO_PAD193
+signal IO_PAD194
+signal IO_PAD195
+signal IO_PAD196
+signal IO_PAD197
+signal IO_PAD198
+signal IO_PAD200
+signal IO_PAD201
+signal IO_PAD202
+signal IO_PAD203
+signal IO_PAD204
+signal IO_PAD205
+signal IO_PAD208
+signal IO_PAD209
+signal IO_PAD210
+signal IO_PAD211
+signal IO_PAD212
+signal IO_PAD214
+signal IO_PAD215
+signal IO_PAD216
+signal IO_PAD217
+signal IO_PAD218
+signal IO_PAD223
+signal IO_PAD224
+signal IO_PAD225
+signal IO_PAD226
+signal IO_PAD227
+signal IO_PAD229
+signal IO_PAD230
+signal IO_PAD231
+signal IO_PAD232
+signal IO_PAD233
+signal IO_PAD238
+signal IO_PAD239
+signal IO_PAD240
+signal IO_PAD242
+signal IO_PAD243
+signal IO_PAD245
+signal IO_PAD246
+signal IO_PAD247
+signal IO_PAD255
+signal IO_PAD256
+signal IO_PAD257
+signal IO_PAD258
+signal IO_PAD260
+signal IO_PAD261
+signal IO_PAD262
+signal IO_PAD263
+signal IO_PAD264
+signal IO_PAD269
+signal IO_PAD270
+signal IO_PAD271
+signal IO_PAD272
+signal IO_PAD273
+signal IO_PAD275
+signal IO_PAD276
+signal IO_PAD277
+signal IO_PAD278
+signal IO_PAD279
+signal IO_PAD284
+signal IO_PAD285
+signal IO_PAD286
+signal IO_PAD287
+signal IO_PAD288
+signal IO_PAD290
+signal IO_PAD291
+signal IO_PAD292
+signal IO_PAD293
+signal IO_PAD294
+signal IO_PAD297
+signal IO_PAD298
+signal IO_PAD299
+signal IO_PAD300
+signal IO_PAD301
+signal IO_PAD302
+signal IO_PAD304
+signal IO_PAD305
+signal IO_PAD306
+signal IO_PAD307
+signal IO_PAD309
+signal IO_PAD310
+signal IO_PAD318
+signal IO_PAD319
+signal IO_PAD320
+signal IO_PAD321
+signal IO_PAD322
+signal IO_PAD324
+signal IO_PAD325
+signal IO_PAD326
+signal IO_PAD327
+signal IO_PAD329
+signal IO_PAD330
+signal IO_PAD333
+signal IO_PAD334
+signal IO_PAD335
+signal IO_PAD336
+signal IO_PAD337
+signal IO_PAD339
+signal IO_PAD340
+signal IO_PAD341
+signal IO_PAD342
+signal IO_PAD343
+signal IO_PAD348
+signal IO_PAD349
+signal IO_PAD350
+signal IO_PAD351
+signal IO_PAD352
+signal IO_PAD354
+signal IO_PAD355
+signal IO_PAD356
+signal IO_PAD357
+signal IO_PAD358
+signal IO_PAD363
+signal IO_PAD364
+signal IO_PAD365
+signal IO_PAD367
+signal IO_PAD368
+signal IO_PAD370
+signal IO_PAD371
+signal IO_PAD372
+signal IO_PAD375
+signal IO_PAD379
+signal IO_PAD380
+signal IO_PAD381
+signal IO_PAD382
+signal IO_PAD383
+signal IO_PAD385
+signal IO_PAD386
+signal IO_PAD387
+signal IO_PAD388
+signal IO_PAD389
+signal IO_PAD394
+signal IO_PAD395
+signal IO_PAD396
+signal IO_PAD397
+signal IO_PAD398
+signal IO_PAD400
+signal IO_PAD401
+signal IO_PAD402
+signal IO_PAD403
+signal IO_PAD404
+signal IO_PAD409
+signal IO_PAD410
+signal IO_PAD411
+signal IO_PAD412
+signal IO_PAD413
+signal IO_PAD415
+signal IO_PAD416
+signal IO_PAD417
+signal IO_PAD418
+signal IO_PAD419
+signal IO_PAD422
+signal IO_PAD423
+signal IO_PAD425
+signal IO_PAD426
+signal IO_PAD427
+signal IO_PAD428
+signal IO_PAD430
+signal IO_PAD431
+signal IO_PAD432
+signal IO_PAD433
+signal IO_PAD435
+signal IO_PAD436
+signal IO_PAD444
+signal IO_PAD445
+signal IO_PAD446
+signal IO_PAD447
+signal IO_PAD448
+signal IO_PAD449
+signal IO_PAD451
+signal IO_PAD452
+signal IO_PAD453
+signal IO_PAD454
+signal IO_PAD455
+signal IO_PAD456
+signal IO_PAD459
+signal IO_PAD460
+signal IO_PAD461
+signal IO_PAD462
+signal IO_PAD463
+signal IO_PAD465
+signal IO_PAD466
+signal IO_PAD467
+signal IO_PAD468
+signal IO_PAD469
+signal IO_PAD474
+signal IO_PAD475
+signal IO_PAD476
+signal IO_PAD477
+signal IO_PAD478
+signal IO_PAD480
+signal IO_PAD481
+signal IO_PAD482
+signal IO_PAD483
+signal IO_PAD484
+signal IO_PAD489
+signal IO_PAD490
+signal IO_PAD491
+signal IO_PAD493
+signal IO_PAD494
+signal IO_PAD496
+signal IO_PAD497
+signal IO_PAD498
+
+register BSR 1166
+register BR 1
+register DIR 32
+
+instruction length 5
+
+instruction SAMPLE/PRELOAD 00001 BSR
+instruction IDCODE 01001 DIR
+instruction EXTEST 00000 BSR
+instruction BYPASS 11111 BR
+
+bit 1165 I 1 CCLK_PAD437
+bit 1164 O 1 CCLK_PAD437 1163 1 Z
+bit 1163 C 1 *
+bit 1162 I 1 IO_PAD436
+bit 1161 O 1 IO_PAD436 1160 1 Z
+bit 1160 C 1 *
+bit 1159 I 1 IO_PAD435
+bit 1158 O 1 IO_PAD435 1157 1 Z
+bit 1157 C 1 *
+bit 1156 I 1 IO_PAD433
+bit 1155 O 1 IO_PAD433 1154 1 Z
+bit 1154 C 1 *
+bit 1153 I 1 IO_PAD432
+bit 1152 O 1 IO_PAD432 1151 1 Z
+bit 1151 C 1 *
+bit 1150 I 1 IO_PAD431
+bit 1149 O 1 IO_PAD431 1148 1 Z
+bit 1148 C 1 *
+bit 1147 I 1 IO_PAD430
+bit 1146 O 1 IO_PAD430 1145 1 Z
+bit 1145 C 1 *
+bit 1144 I 1 IO_PAD428
+bit 1143 O 1 IO_PAD428 1142 1 Z
+bit 1142 C 1 *
+bit 1141 I 1 IO_PAD427
+bit 1140 O 1 IO_PAD427 1139 1 Z
+bit 1139 C 1 *
+bit 1138 I 1 IO_PAD426
+bit 1137 O 1 IO_PAD426 1136 1 Z
+bit 1136 C 1 *
+bit 1135 I 1 IO_PAD425
+bit 1134 O 1 IO_PAD425 1133 1 Z
+bit 1133 C 1 *
+bit 1132 I 1 IO_PAD423
+bit 1131 O 1 IO_PAD423 1130 1 Z
+bit 1130 C 1 *
+bit 1129 I 1 IO_PAD422
+bit 1128 O 1 IO_PAD422 1127 1 Z
+bit 1127 C 1 *
+bit 1126 I 1 IO_PAD419
+bit 1125 O 1 IO_PAD419 1124 1 Z
+bit 1124 C 1 *
+bit 1123 I 1 IO_PAD418
+bit 1122 O 1 IO_PAD418 1121 1 Z
+bit 1121 C 1 *
+bit 1120 O 1 *
+bit 1119 O 1 *
+bit 1118 O 1 *
+bit 1117 I 1 IO_PAD417
+bit 1116 O 1 IO_PAD417 1115 1 Z
+bit 1115 C 1 *
+bit 1114 I 1 IO_PAD416
+bit 1113 O 1 IO_PAD416 1112 1 Z
+bit 1112 C 1 *
+bit 1111 I 1 IO_PAD415
+bit 1110 O 1 IO_PAD415 1109 1 Z
+bit 1109 C 1 *
+bit 1108 I 1 IO_PAD413
+bit 1107 O 1 IO_PAD413 1106 1 Z
+bit 1106 C 1 *
+bit 1105 I 1 IO_PAD412
+bit 1104 O 1 IO_PAD412 1103 1 Z
+bit 1103 C 1 *
+bit 1102 O 1 *
+bit 1101 O 1 *
+bit 1100 O 1 *
+bit 1099 I 1 IO_PAD411
+bit 1098 O 1 IO_PAD411 1097 1 Z
+bit 1097 C 1 *
+bit 1096 I 1 IO_PAD410
+bit 1095 O 1 IO_PAD410 1094 1 Z
+bit 1094 C 1 *
+bit 1093 I 1 IO_PAD409
+bit 1092 O 1 IO_PAD409 1091 1 Z
+bit 1091 C 1 *
+bit 1090 I 1 IO_PAD404
+bit 1089 O 1 IO_PAD404 1088 1 Z
+bit 1088 C 1 *
+bit 1087 I 1 IO_PAD403
+bit 1086 O 1 IO_PAD403 1085 1 Z
+bit 1085 C 1 *
+bit 1084 O 1 *
+bit 1083 O 1 *
+bit 1082 O 1 *
+bit 1081 I 1 IO_PAD402
+bit 1080 O 1 IO_PAD402 1079 1 Z
+bit 1079 C 1 *
+bit 1078 I 1 IO_PAD401
+bit 1077 O 1 IO_PAD401 1076 1 Z
+bit 1076 C 1 *
+bit 1075 I 1 IO_PAD400
+bit 1074 O 1 IO_PAD400 1073 1 Z
+bit 1073 C 1 *
+bit 1072 I 1 IO_PAD398
+bit 1071 O 1 IO_PAD398 1070 1 Z
+bit 1070 C 1 *
+bit 1069 I 1 IO_PAD397
+bit 1068 O 1 IO_PAD397 1067 1 Z
+bit 1067 C 1 *
+bit 1066 O 1 *
+bit 1065 O 1 *
+bit 1064 O 1 *
+bit 1063 I 1 IO_PAD396
+bit 1062 O 1 IO_PAD396 1061 1 Z
+bit 1061 C 1 *
+bit 1060 I 1 IO_PAD395
+bit 1059 O 1 IO_PAD395 1058 1 Z
+bit 1058 C 1 *
+bit 1057 I 1 IO_PAD394
+bit 1056 O 1 IO_PAD394 1055 1 Z
+bit 1055 C 1 *
+bit 1054 I 1 IO_PAD389
+bit 1053 O 1 IO_PAD389 1052 1 Z
+bit 1052 C 1 *
+bit 1051 I 1 IO_PAD388
+bit 1050 O 1 IO_PAD388 1049 1 Z
+bit 1049 C 1 *
+bit 1048 O 1 *
+bit 1047 O 1 *
+bit 1046 O 1 *
+bit 1045 I 1 IO_PAD387
+bit 1044 O 1 IO_PAD387 1043 1 Z
+bit 1043 C 1 *
+bit 1042 I 1 IO_PAD386
+bit 1041 O 1 IO_PAD386 1040 1 Z
+bit 1040 C 1 *
+bit 1039 I 1 IO_PAD385
+bit 1038 O 1 IO_PAD385 1037 1 Z
+bit 1037 C 1 *
+bit 1036 I 1 IO_PAD383
+bit 1035 O 1 IO_PAD383 1034 1 Z
+bit 1034 C 1 *
+bit 1033 I 1 IO_PAD382
+bit 1032 O 1 IO_PAD382 1031 1 Z
+bit 1031 C 1 *
+bit 1030 O 1 *
+bit 1029 O 1 *
+bit 1028 O 1 *
+bit 1027 I 1 IO_PAD381
+bit 1026 O 1 IO_PAD381 1025 1 Z
+bit 1025 C 1 *
+bit 1024 I 1 IO_PAD380
+bit 1023 O 1 IO_PAD380 1022 1 Z
+bit 1022 C 1 *
+bit 1021 I 1 IO_PAD379
+bit 1020 O 1 IO_PAD379 1019 1 Z
+bit 1019 C 1 *
+bit 1018 I 1 IO_PAD375
+bit 1017 O 1 IO_PAD375 1016 1 Z
+bit 1016 C 1 *
+bit 1015 O 1 *
+bit 1014 O 1 *
+bit 1013 O 1 *
+bit 1012 I 1 IO_PAD372
+bit 1011 O 1 IO_PAD372 1010 1 Z
+bit 1010 C 1 *
+bit 1009 O 1 *
+bit 1008 O 1 *
+bit 1007 O 1 *
+bit 1006 I 1 IO_PAD371
+bit 1005 O 1 IO_PAD371 1004 1 Z
+bit 1004 C 1 *
+bit 1003 I 1 IO_PAD370
+bit 1002 O 1 IO_PAD370 1001 1 Z
+bit 1001 C 1 *
+bit 1000 I 1 IO_PAD368
+bit 999 O 1 IO_PAD368 998 1 Z
+bit 998 C 1 *
+bit 997 I 1 IO_PAD367
+bit 996 O 1 IO_PAD367 995 1 Z
+bit 995 C 1 *
+bit 994 I 1 IO_PAD365
+bit 993 O 1 IO_PAD365 992 1 Z
+bit 992 C 1 *
+bit 991 O 1 *
+bit 990 O 1 *
+bit 989 O 1 *
+bit 988 I 1 IO_PAD364
+bit 987 O 1 IO_PAD364 986 1 Z
+bit 986 C 1 *
+bit 985 I 1 IO_PAD363
+bit 984 O 1 IO_PAD363 983 1 Z
+bit 983 C 1 *
+bit 982 I 1 IO_PAD358
+bit 981 O 1 IO_PAD358 980 1 Z
+bit 980 C 1 *
+bit 979 I 1 IO_PAD357
+bit 978 O 1 IO_PAD357 977 1 Z
+bit 977 C 1 *
+bit 976 I 1 IO_PAD356
+bit 975 O 1 IO_PAD356 974 1 Z
+bit 974 C 1 *
+bit 973 O 1 *
+bit 972 O 1 *
+bit 971 O 1 *
+bit 970 I 1 IO_PAD355
+bit 969 O 1 IO_PAD355 968 1 Z
+bit 968 C 1 *
+bit 967 I 1 IO_PAD354
+bit 966 O 1 IO_PAD354 965 1 Z
+bit 965 C 1 *
+bit 964 I 1 IO_PAD352
+bit 963 O 1 IO_PAD352 962 1 Z
+bit 962 C 1 *
+bit 961 I 1 IO_PAD351
+bit 960 O 1 IO_PAD351 959 1 Z
+bit 959 C 1 *
+bit 958 I 1 IO_PAD350
+bit 957 O 1 IO_PAD350 956 1 Z
+bit 956 C 1 *
+bit 955 O 1 *
+bit 954 O 1 *
+bit 953 O 1 *
+bit 952 I 1 IO_PAD349
+bit 951 O 1 IO_PAD349 950 1 Z
+bit 950 C 1 *
+bit 949 I 1 IO_PAD348
+bit 948 O 1 IO_PAD348 947 1 Z
+bit 947 C 1 *
+bit 946 I 1 IO_PAD343
+bit 945 O 1 IO_PAD343 944 1 Z
+bit 944 C 1 *
+bit 943 I 1 IO_PAD342
+bit 942 O 1 IO_PAD342 941 1 Z
+bit 941 C 1 *
+bit 940 I 1 IO_PAD341
+bit 939 O 1 IO_PAD341 938 1 Z
+bit 938 C 1 *
+bit 937 O 1 *
+bit 936 O 1 *
+bit 935 O 1 *
+bit 934 I 1 IO_PAD340
+bit 933 O 1 IO_PAD340 932 1 Z
+bit 932 C 1 *
+bit 931 I 1 IO_PAD339
+bit 930 O 1 IO_PAD339 929 1 Z
+bit 929 C 1 *
+bit 928 I 1 IO_PAD337
+bit 927 O 1 IO_PAD337 926 1 Z
+bit 926 C 1 *
+bit 925 I 1 IO_PAD336
+bit 924 O 1 IO_PAD336 923 1 Z
+bit 923 C 1 *
+bit 922 I 1 IO_PAD335
+bit 921 O 1 IO_PAD335 920 1 Z
+bit 920 C 1 *
+bit 919 O 1 *
+bit 918 O 1 *
+bit 917 O 1 *
+bit 916 I 1 IO_PAD334
+bit 915 O 1 IO_PAD334 914 1 Z
+bit 914 C 1 *
+bit 913 I 1 IO_PAD333
+bit 912 O 1 IO_PAD333 911 1 Z
+bit 911 C 1 *
+bit 910 I 1 IO_PAD330
+bit 909 O 1 IO_PAD330 908 1 Z
+bit 908 C 1 *
+bit 907 I 1 IO_PAD329
+bit 906 O 1 IO_PAD329 905 1 Z
+bit 905 C 1 *
+bit 904 I 1 IO_PAD327
+bit 903 O 1 IO_PAD327 902 1 Z
+bit 902 C 1 *
+bit 901 I 1 IO_PAD326
+bit 900 O 1 IO_PAD326 899 1 Z
+bit 899 C 1 *
+bit 898 I 1 IO_PAD325
+bit 897 O 1 IO_PAD325 896 1 Z
+bit 896 C 1 *
+bit 895 I 1 IO_PAD324
+bit 894 O 1 IO_PAD324 893 1 Z
+bit 893 C 1 *
+bit 892 I 1 IO_PAD322
+bit 891 O 1 IO_PAD322 890 1 Z
+bit 890 C 1 *
+bit 889 I 1 IO_PAD321
+bit 888 O 1 IO_PAD321 887 1 Z
+bit 887 C 1 *
+bit 886 I 1 IO_PAD320
+bit 885 O 1 IO_PAD320 884 1 Z
+bit 884 C 1 *
+bit 883 I 1 IO_PAD319
+bit 882 O 1 IO_PAD319 881 1 Z
+bit 881 C 1 *
+bit 880 I 1 IO_PAD318
+bit 879 O 1 IO_PAD318 878 1 Z
+bit 878 C 1 *
+bit 877 I 1 INIT_PAD317
+bit 876 O 1 INIT_PAD317 875 1 Z
+bit 875 C 1 *
+bit 874 O 1 *
+bit 873 I 1 DONE_PAD313
+bit 872 O 1 DONE_PAD313 871 1 Z
+bit 871 C 1 *
+bit 870 I 1 IO_PAD310
+bit 869 O 1 IO_PAD310 868 1 Z
+bit 868 C 1 *
+bit 867 I 1 IO_PAD309
+bit 866 O 1 IO_PAD309 865 1 Z
+bit 865 C 1 *
+bit 864 I 1 IO_PAD307
+bit 863 O 1 IO_PAD307 862 1 Z
+bit 862 C 1 *
+bit 861 I 1 IO_PAD306
+bit 860 O 1 IO_PAD306 859 1 Z
+bit 859 C 1 *
+bit 858 I 1 IO_PAD305
+bit 857 O 1 IO_PAD305 856 1 Z
+bit 856 C 1 *
+bit 855 I 1 IO_PAD304
+bit 854 O 1 IO_PAD304 853 1 Z
+bit 853 C 1 *
+bit 852 I 1 IO_PAD302
+bit 851 O 1 IO_PAD302 850 1 Z
+bit 850 C 1 *
+bit 849 I 1 IO_PAD301
+bit 848 O 1 IO_PAD301 847 1 Z
+bit 847 C 1 *
+bit 846 I 1 IO_PAD300
+bit 845 O 1 IO_PAD300 844 1 Z
+bit 844 C 1 *
+bit 843 I 1 IO_PAD299
+bit 842 O 1 IO_PAD299 841 1 Z
+bit 841 C 1 *
+bit 840 I 1 IO_PAD298
+bit 839 O 1 IO_PAD298 838 1 Z
+bit 838 C 1 *
+bit 837 I 1 IO_PAD297
+bit 836 O 1 IO_PAD297 835 1 Z
+bit 835 C 1 *
+bit 834 I 1 IO_PAD294
+bit 833 O 1 IO_PAD294 832 1 Z
+bit 832 C 1 *
+bit 831 I 1 IO_PAD293
+bit 830 O 1 IO_PAD293 829 1 Z
+bit 829 C 1 *
+bit 828 O 1 *
+bit 827 O 1 *
+bit 826 O 1 *
+bit 825 I 1 IO_PAD292
+bit 824 O 1 IO_PAD292 823 1 Z
+bit 823 C 1 *
+bit 822 I 1 IO_PAD291
+bit 821 O 1 IO_PAD291 820 1 Z
+bit 820 C 1 *
+bit 819 I 1 IO_PAD290
+bit 818 O 1 IO_PAD290 817 1 Z
+bit 817 C 1 *
+bit 816 I 1 IO_PAD288
+bit 815 O 1 IO_PAD288 814 1 Z
+bit 814 C 1 *
+bit 813 I 1 IO_PAD287
+bit 812 O 1 IO_PAD287 811 1 Z
+bit 811 C 1 *
+bit 810 O 1 *
+bit 809 O 1 *
+bit 808 O 1 *
+bit 807 I 1 IO_PAD286
+bit 806 O 1 IO_PAD286 805 1 Z
+bit 805 C 1 *
+bit 804 I 1 IO_PAD285
+bit 803 O 1 IO_PAD285 802 1 Z
+bit 802 C 1 *
+bit 801 I 1 IO_PAD284
+bit 800 O 1 IO_PAD284 799 1 Z
+bit 799 C 1 *
+bit 798 I 1 IO_PAD279
+bit 797 O 1 IO_PAD279 796 1 Z
+bit 796 C 1 *
+bit 795 I 1 IO_PAD278
+bit 794 O 1 IO_PAD278 793 1 Z
+bit 793 C 1 *
+bit 792 O 1 *
+bit 791 O 1 *
+bit 790 O 1 *
+bit 789 I 1 IO_PAD277
+bit 788 O 1 IO_PAD277 787 1 Z
+bit 787 C 1 *
+bit 786 I 1 IO_PAD276
+bit 785 O 1 IO_PAD276 784 1 Z
+bit 784 C 1 *
+bit 783 I 1 IO_PAD275
+bit 782 O 1 IO_PAD275 781 1 Z
+bit 781 C 1 *
+bit 780 I 1 IO_PAD273
+bit 779 O 1 IO_PAD273 778 1 Z
+bit 778 C 1 *
+bit 777 I 1 IO_PAD272
+bit 776 O 1 IO_PAD272 775 1 Z
+bit 775 C 1 *
+bit 774 O 1 *
+bit 773 O 1 *
+bit 772 O 1 *
+bit 771 I 1 IO_PAD271
+bit 770 O 1 IO_PAD271 769 1 Z
+bit 769 C 1 *
+bit 768 I 1 IO_PAD270
+bit 767 O 1 IO_PAD270 766 1 Z
+bit 766 C 1 *
+bit 765 I 1 IO_PAD269
+bit 764 O 1 IO_PAD269 763 1 Z
+bit 763 C 1 *
+bit 762 I 1 IO_PAD264
+bit 761 O 1 IO_PAD264 760 1 Z
+bit 760 C 1 *
+bit 759 I 1 IO_PAD263
+bit 758 O 1 IO_PAD263 757 1 Z
+bit 757 C 1 *
+bit 756 O 1 *
+bit 755 O 1 *
+bit 754 O 1 *
+bit 753 I 1 IO_PAD262
+bit 752 O 1 IO_PAD262 751 1 Z
+bit 751 C 1 *
+bit 750 I 1 IO_PAD261
+bit 749 O 1 IO_PAD261 748 1 Z
+bit 748 C 1 *
+bit 747 I 1 IO_PAD260
+bit 746 O 1 IO_PAD260 745 1 Z
+bit 745 C 1 *
+bit 744 I 1 IO_PAD258
+bit 743 O 1 IO_PAD258 742 1 Z
+bit 742 C 1 *
+bit 741 I 1 IO_PAD257
+bit 740 O 1 IO_PAD257 739 1 Z
+bit 739 C 1 *
+bit 738 O 1 *
+bit 737 O 1 *
+bit 736 O 1 *
+bit 735 I 1 IO_PAD256
+bit 734 O 1 IO_PAD256 733 1 Z
+bit 733 C 1 *
+bit 732 O 1 *
+bit 731 O 1 *
+bit 730 O 1 *
+bit 729 I 1 IO_PAD255
+bit 728 O 1 IO_PAD255 727 1 Z
+bit 727 C 1 *
+bit 726 I 1 GCK0_PAD254
+bit 725 I 1 GCK1_PAD250
+bit 724 I 1 IO_PAD247
+bit 723 O 1 IO_PAD247 722 1 Z
+bit 722 C 1 *
+bit 721 O 1 *
+bit 720 O 1 *
+bit 719 O 1 *
+bit 718 O 1 *
+bit 717 O 1 *
+bit 716 O 1 *
+bit 715 O 1 *
+bit 714 O 1 *
+bit 713 O 1 *
+bit 712 I 1 IO_PAD246
+bit 711 O 1 IO_PAD246 710 1 Z
+bit 710 C 1 *
+bit 709 I 1 IO_PAD245
+bit 708 O 1 IO_PAD245 707 1 Z
+bit 707 C 1 *
+bit 706 I 1 IO_PAD243
+bit 705 O 1 IO_PAD243 704 1 Z
+bit 704 C 1 *
+bit 703 I 1 IO_PAD242
+bit 702 O 1 IO_PAD242 701 1 Z
+bit 701 C 1 *
+bit 700 I 1 IO_PAD240
+bit 699 O 1 IO_PAD240 698 1 Z
+bit 698 C 1 *
+bit 697 O 1 *
+bit 696 O 1 *
+bit 695 O 1 *
+bit 694 I 1 IO_PAD239
+bit 693 O 1 IO_PAD239 692 1 Z
+bit 692 C 1 *
+bit 691 I 1 IO_PAD238
+bit 690 O 1 IO_PAD238 689 1 Z
+bit 689 C 1 *
+bit 688 I 1 IO_PAD233
+bit 687 O 1 IO_PAD233 686 1 Z
+bit 686 C 1 *
+bit 685 I 1 IO_PAD232
+bit 684 O 1 IO_PAD232 683 1 Z
+bit 683 C 1 *
+bit 682 I 1 IO_PAD231
+bit 681 O 1 IO_PAD231 680 1 Z
+bit 680 C 1 *
+bit 679 O 1 *
+bit 678 O 1 *
+bit 677 O 1 *
+bit 676 I 1 IO_PAD230
+bit 675 O 1 IO_PAD230 674 1 Z
+bit 674 C 1 *
+bit 673 I 1 IO_PAD229
+bit 672 O 1 IO_PAD229 671 1 Z
+bit 671 C 1 *
+bit 670 I 1 IO_PAD227
+bit 669 O 1 IO_PAD227 668 1 Z
+bit 668 C 1 *
+bit 667 I 1 IO_PAD226
+bit 666 O 1 IO_PAD226 665 1 Z
+bit 665 C 1 *
+bit 664 I 1 IO_PAD225
+bit 663 O 1 IO_PAD225 662 1 Z
+bit 662 C 1 *
+bit 661 O 1 *
+bit 660 O 1 *
+bit 659 O 1 *
+bit 658 I 1 IO_PAD224
+bit 657 O 1 IO_PAD224 656 1 Z
+bit 656 C 1 *
+bit 655 I 1 IO_PAD223
+bit 654 O 1 IO_PAD223 653 1 Z
+bit 653 C 1 *
+bit 652 I 1 IO_PAD218
+bit 651 O 1 IO_PAD218 650 1 Z
+bit 650 C 1 *
+bit 649 I 1 IO_PAD217
+bit 648 O 1 IO_PAD217 647 1 Z
+bit 647 C 1 *
+bit 646 I 1 IO_PAD216
+bit 645 O 1 IO_PAD216 644 1 Z
+bit 644 C 1 *
+bit 643 O 1 *
+bit 642 O 1 *
+bit 641 O 1 *
+bit 640 I 1 IO_PAD215
+bit 639 O 1 IO_PAD215 638 1 Z
+bit 638 C 1 *
+bit 637 I 1 IO_PAD214
+bit 636 O 1 IO_PAD214 635 1 Z
+bit 635 C 1 *
+bit 634 I 1 IO_PAD212
+bit 633 O 1 IO_PAD212 632 1 Z
+bit 632 C 1 *
+bit 631 I 1 IO_PAD211
+bit 630 O 1 IO_PAD211 629 1 Z
+bit 629 C 1 *
+bit 628 I 1 IO_PAD210
+bit 627 O 1 IO_PAD210 626 1 Z
+bit 626 C 1 *
+bit 625 O 1 *
+bit 624 O 1 *
+bit 623 O 1 *
+bit 622 I 1 IO_PAD209
+bit 621 O 1 IO_PAD209 620 1 Z
+bit 620 C 1 *
+bit 619 I 1 IO_PAD208
+bit 618 O 1 IO_PAD208 617 1 Z
+bit 617 C 1 *
+bit 616 I 1 IO_PAD205
+bit 615 O 1 IO_PAD205 614 1 Z
+bit 614 C 1 *
+bit 613 I 1 IO_PAD204
+bit 612 O 1 IO_PAD204 611 1 Z
+bit 611 C 1 *
+bit 610 I 1 IO_PAD203
+bit 609 O 1 IO_PAD203 608 1 Z
+bit 608 C 1 *
+bit 607 I 1 IO_PAD202
+bit 606 O 1 IO_PAD202 605 1 Z
+bit 605 C 1 *
+bit 604 I 1 IO_PAD201
+bit 603 O 1 IO_PAD201 602 1 Z
+bit 602 C 1 *
+bit 601 I 1 IO_PAD200
+bit 600 O 1 IO_PAD200 599 1 Z
+bit 599 C 1 *
+bit 598 I 1 IO_PAD198
+bit 597 O 1 IO_PAD198 596 1 Z
+bit 596 C 1 *
+bit 595 I 1 IO_PAD197
+bit 594 O 1 IO_PAD197 593 1 Z
+bit 593 C 1 *
+bit 592 I 1 IO_PAD196
+bit 591 O 1 IO_PAD196 590 1 Z
+bit 590 C 1 *
+bit 589 I 1 IO_PAD195
+bit 588 O 1 IO_PAD195 587 1 Z
+bit 587 C 1 *
+bit 586 I 1 IO_PAD194
+bit 585 O 1 IO_PAD194 584 1 Z
+bit 584 C 1 *
+bit 583 I 1 IO_PAD193
+bit 582 O 1 IO_PAD193 581 1 Z
+bit 581 C 1 *
+bit 580 I 1 M2_PAD190
+bit 579 I 1 M0_PAD187
+bit 578 I 1 M1_PAD184
+bit 577 I 1 IO_PAD183
+bit 576 O 1 IO_PAD183 575 1 Z
+bit 575 C 1 *
+bit 574 I 1 IO_PAD182
+bit 573 O 1 IO_PAD182 572 1 Z
+bit 572 C 1 *
+bit 571 I 1 IO_PAD180
+bit 570 O 1 IO_PAD180 569 1 Z
+bit 569 C 1 *
+bit 568 I 1 IO_PAD179
+bit 567 O 1 IO_PAD179 566 1 Z
+bit 566 C 1 *
+bit 565 I 1 IO_PAD178
+bit 564 O 1 IO_PAD178 563 1 Z
+bit 563 C 1 *
+bit 562 I 1 IO_PAD177
+bit 561 O 1 IO_PAD177 560 1 Z
+bit 560 C 1 *
+bit 559 I 1 IO_PAD175
+bit 558 O 1 IO_PAD175 557 1 Z
+bit 557 C 1 *
+bit 556 I 1 IO_PAD174
+bit 555 O 1 IO_PAD174 554 1 Z
+bit 554 C 1 *
+bit 553 I 1 IO_PAD173
+bit 552 O 1 IO_PAD173 551 1 Z
+bit 551 C 1 *
+bit 550 I 1 IO_PAD172
+bit 549 O 1 IO_PAD172 548 1 Z
+bit 548 C 1 *
+bit 547 I 1 IO_PAD170
+bit 546 O 1 IO_PAD170 545 1 Z
+bit 545 C 1 *
+bit 544 I 1 IO_PAD169
+bit 543 O 1 IO_PAD169 542 1 Z
+bit 542 C 1 *
+bit 541 I 1 IO_PAD166
+bit 540 O 1 IO_PAD166 539 1 Z
+bit 539 C 1 *
+bit 538 I 1 IO_PAD165
+bit 537 O 1 IO_PAD165 536 1 Z
+bit 536 C 1 *
+bit 535 O 1 *
+bit 534 O 1 *
+bit 533 O 1 *
+bit 532 I 1 IO_PAD164
+bit 531 O 1 IO_PAD164 530 1 Z
+bit 530 C 1 *
+bit 529 I 1 IO_PAD163
+bit 528 O 1 IO_PAD163 527 1 Z
+bit 527 C 1 *
+bit 526 I 1 IO_PAD162
+bit 525 O 1 IO_PAD162 524 1 Z
+bit 524 C 1 *
+bit 523 I 1 IO_PAD160
+bit 522 O 1 IO_PAD160 521 1 Z
+bit 521 C 1 *
+bit 520 I 1 IO_PAD159
+bit 519 O 1 IO_PAD159 518 1 Z
+bit 518 C 1 *
+bit 517 O 1 *
+bit 516 O 1 *
+bit 515 O 1 *
+bit 514 I 1 IO_PAD158
+bit 513 O 1 IO_PAD158 512 1 Z
+bit 512 C 1 *
+bit 511 I 1 IO_PAD157
+bit 510 O 1 IO_PAD157 509 1 Z
+bit 509 C 1 *
+bit 508 I 1 IO_PAD156
+bit 507 O 1 IO_PAD156 506 1 Z
+bit 506 C 1 *
+bit 505 I 1 IO_PAD151
+bit 504 O 1 IO_PAD151 503 1 Z
+bit 503 C 1 *
+bit 502 I 1 IO_PAD150
+bit 501 O 1 IO_PAD150 500 1 Z
+bit 500 C 1 *
+bit 499 O 1 *
+bit 498 O 1 *
+bit 497 O 1 *
+bit 496 I 1 IO_PAD149
+bit 495 O 1 IO_PAD149 494 1 Z
+bit 494 C 1 *
+bit 493 I 1 IO_PAD148
+bit 492 O 1 IO_PAD148 491 1 Z
+bit 491 C 1 *
+bit 490 I 1 IO_PAD147
+bit 489 O 1 IO_PAD147 488 1 Z
+bit 488 C 1 *
+bit 487 I 1 IO_PAD145
+bit 486 O 1 IO_PAD145 485 1 Z
+bit 485 C 1 *
+bit 484 I 1 IO_PAD144
+bit 483 O 1 IO_PAD144 482 1 Z
+bit 482 C 1 *
+bit 481 O 1 *
+bit 480 O 1 *
+bit 479 O 1 *
+bit 478 I 1 IO_PAD143
+bit 477 O 1 IO_PAD143 476 1 Z
+bit 476 C 1 *
+bit 475 I 1 IO_PAD142
+bit 474 O 1 IO_PAD142 473 1 Z
+bit 473 C 1 *
+bit 472 I 1 IO_PAD141
+bit 471 O 1 IO_PAD141 470 1 Z
+bit 470 C 1 *
+bit 469 I 1 IO_PAD136
+bit 468 O 1 IO_PAD136 467 1 Z
+bit 467 C 1 *
+bit 466 I 1 IO_PAD135
+bit 465 O 1 IO_PAD135 464 1 Z
+bit 464 C 1 *
+bit 463 O 1 *
+bit 462 O 1 *
+bit 461 O 1 *
+bit 460 I 1 IO_PAD134
+bit 459 O 1 IO_PAD134 458 1 Z
+bit 458 C 1 *
+bit 457 I 1 IO_PAD133
+bit 456 O 1 IO_PAD133 455 1 Z
+bit 455 C 1 *
+bit 454 I 1 IO_PAD132
+bit 453 O 1 IO_PAD132 452 1 Z
+bit 452 C 1 *
+bit 451 I 1 IO_PAD130
+bit 450 O 1 IO_PAD130 449 1 Z
+bit 449 C 1 *
+bit 448 I 1 IO_PAD129
+bit 447 O 1 IO_PAD129 446 1 Z
+bit 446 C 1 *
+bit 445 O 1 *
+bit 444 O 1 *
+bit 443 O 1 *
+bit 442 I 1 IO_PAD128
+bit 441 O 1 IO_PAD128 440 1 Z
+bit 440 C 1 *
+bit 439 O 1 *
+bit 438 O 1 *
+bit 437 O 1 *
+bit 436 I 1 IO_PAD125
+bit 435 O 1 IO_PAD125 434 1 Z
+bit 434 C 1 *
+bit 433 I 1 IO_PAD121
+bit 432 O 1 IO_PAD121 431 1 Z
+bit 431 C 1 *
+bit 430 I 1 IO_PAD120
+bit 429 O 1 IO_PAD120 428 1 Z
+bit 428 C 1 *
+bit 427 I 1 IO_PAD119
+bit 426 O 1 IO_PAD119 425 1 Z
+bit 425 C 1 *
+bit 424 O 1 *
+bit 423 O 1 *
+bit 422 O 1 *
+bit 421 I 1 IO_PAD118
+bit 420 O 1 IO_PAD118 419 1 Z
+bit 419 C 1 *
+bit 418 I 1 IO_PAD117
+bit 417 O 1 IO_PAD117 416 1 Z
+bit 416 C 1 *
+bit 415 I 1 IO_PAD115
+bit 414 O 1 IO_PAD115 413 1 Z
+bit 413 C 1 *
+bit 412 I 1 IO_PAD114
+bit 411 O 1 IO_PAD114 410 1 Z
+bit 410 C 1 *
+bit 409 I 1 IO_PAD112
+bit 408 O 1 IO_PAD112 407 1 Z
+bit 407 C 1 *
+bit 406 O 1 *
+bit 405 O 1 *
+bit 404 O 1 *
+bit 403 I 1 IO_PAD111
+bit 402 O 1 IO_PAD111 401 1 Z
+bit 401 C 1 *
+bit 400 I 1 IO_PAD110
+bit 399 O 1 IO_PAD110 398 1 Z
+bit 398 C 1 *
+bit 397 I 1 IO_PAD105
+bit 396 O 1 IO_PAD105 395 1 Z
+bit 395 C 1 *
+bit 394 I 1 IO_PAD104
+bit 393 O 1 IO_PAD104 392 1 Z
+bit 392 C 1 *
+bit 391 I 1 IO_PAD103
+bit 390 O 1 IO_PAD103 389 1 Z
+bit 389 C 1 *
+bit 388 O 1 *
+bit 387 O 1 *
+bit 386 O 1 *
+bit 385 I 1 IO_PAD102
+bit 384 O 1 IO_PAD102 383 1 Z
+bit 383 C 1 *
+bit 382 I 1 IO_PAD101
+bit 381 O 1 IO_PAD101 380 1 Z
+bit 380 C 1 *
+bit 379 I 1 IO_PAD99
+bit 378 O 1 IO_PAD99 377 1 Z
+bit 377 C 1 *
+bit 376 I 1 IO_PAD98
+bit 375 O 1 IO_PAD98 374 1 Z
+bit 374 C 1 *
+bit 373 I 1 IO_PAD97
+bit 372 O 1 IO_PAD97 371 1 Z
+bit 371 C 1 *
+bit 370 O 1 *
+bit 369 O 1 *
+bit 368 O 1 *
+bit 367 I 1 IO_PAD96
+bit 366 O 1 IO_PAD96 365 1 Z
+bit 365 C 1 *
+bit 364 I 1 IO_PAD95
+bit 363 O 1 IO_PAD95 362 1 Z
+bit 362 C 1 *
+bit 361 I 1 IO_PAD90
+bit 360 O 1 IO_PAD90 359 1 Z
+bit 359 C 1 *
+bit 358 I 1 IO_PAD89
+bit 357 O 1 IO_PAD89 356 1 Z
+bit 356 C 1 *
+bit 355 I 1 IO_PAD88
+bit 354 O 1 IO_PAD88 353 1 Z
+bit 353 C 1 *
+bit 352 O 1 *
+bit 351 O 1 *
+bit 350 O 1 *
+bit 349 I 1 IO_PAD87
+bit 348 O 1 IO_PAD87 347 1 Z
+bit 347 C 1 *
+bit 346 I 1 IO_PAD86
+bit 345 O 1 IO_PAD86 344 1 Z
+bit 344 C 1 *
+bit 343 I 1 IO_PAD84
+bit 342 O 1 IO_PAD84 341 1 Z
+bit 341 C 1 *
+bit 340 I 1 IO_PAD83
+bit 339 O 1 IO_PAD83 338 1 Z
+bit 338 C 1 *
+bit 337 I 1 IO_PAD82
+bit 336 O 1 IO_PAD82 335 1 Z
+bit 335 C 1 *
+bit 334 O 1 *
+bit 333 O 1 *
+bit 332 O 1 *
+bit 331 I 1 IO_PAD81
+bit 330 O 1 IO_PAD81 329 1 Z
+bit 329 C 1 *
+bit 328 I 1 IO_PAD80
+bit 327 O 1 IO_PAD80 326 1 Z
+bit 326 C 1 *
+bit 325 I 1 IO_PAD77
+bit 324 O 1 IO_PAD77 323 1 Z
+bit 323 C 1 *
+bit 322 I 1 IO_PAD76
+bit 321 O 1 IO_PAD76 320 1 Z
+bit 320 C 1 *
+bit 319 I 1 IO_PAD74
+bit 318 O 1 IO_PAD74 317 1 Z
+bit 317 C 1 *
+bit 316 I 1 IO_PAD73
+bit 315 O 1 IO_PAD73 314 1 Z
+bit 314 C 1 *
+bit 313 I 1 IO_PAD72
+bit 312 O 1 IO_PAD72 311 1 Z
+bit 311 C 1 *
+bit 310 I 1 IO_PAD71
+bit 309 O 1 IO_PAD71 308 1 Z
+bit 308 C 1 *
+bit 307 I 1 IO_PAD69
+bit 306 O 1 IO_PAD69 305 1 Z
+bit 305 C 1 *
+bit 304 I 1 IO_PAD68
+bit 303 O 1 IO_PAD68 302 1 Z
+bit 302 C 1 *
+bit 301 I 1 IO_PAD67
+bit 300 O 1 IO_PAD67 299 1 Z
+bit 299 C 1 *
+bit 298 I 1 IO_PAD66
+bit 297 O 1 IO_PAD66 296 1 Z
+bit 296 C 1 *
+bit 295 I 1 IO_PAD65
+bit 294 O 1 IO_PAD65 293 1 Z
+bit 293 C 1 *
+bit 292 O 1 *
+bit 291 O 1 *
+bit 290 O 1 *
+bit 289 O 1 *
+bit 288 O 1 *
+bit 287 O 1 *
+bit 286 I 1 IO_PAD58
+bit 285 O 1 IO_PAD58 284 1 Z
+bit 284 C 1 *
+bit 283 I 1 IO_PAD56
+bit 282 O 1 IO_PAD56 281 1 Z
+bit 281 C 1 *
+bit 280 I 1 IO_PAD55
+bit 279 O 1 IO_PAD55 278 1 Z
+bit 278 C 1 *
+bit 277 I 1 IO_PAD54
+bit 276 O 1 IO_PAD54 275 1 Z
+bit 275 C 1 *
+bit 274 I 1 IO_PAD53
+bit 273 O 1 IO_PAD53 272 1 Z
+bit 272 C 1 *
+bit 271 I 1 IO_PAD51
+bit 270 O 1 IO_PAD51 269 1 Z
+bit 269 C 1 *
+bit 268 I 1 IO_PAD50
+bit 267 O 1 IO_PAD50 266 1 Z
+bit 266 C 1 *
+bit 265 I 1 IO_PAD49
+bit 264 O 1 IO_PAD49 263 1 Z
+bit 263 C 1 *
+bit 262 I 1 IO_PAD48
+bit 261 O 1 IO_PAD48 260 1 Z
+bit 260 C 1 *
+bit 259 I 1 IO_PAD47
+bit 258 O 1 IO_PAD47 257 1 Z
+bit 257 C 1 *
+bit 256 I 1 IO_PAD46
+bit 255 O 1 IO_PAD46 254 1 Z
+bit 254 C 1 *
+bit 253 I 1 IO_PAD43
+bit 252 O 1 IO_PAD43 251 1 Z
+bit 251 C 1 *
+bit 250 I 1 IO_PAD42
+bit 249 O 1 IO_PAD42 248 1 Z
+bit 248 C 1 *
+bit 247 O 1 *
+bit 246 O 1 *
+bit 245 O 1 *
+bit 244 I 1 IO_PAD41
+bit 243 O 1 IO_PAD41 242 1 Z
+bit 242 C 1 *
+bit 241 I 1 IO_PAD40
+bit 240 O 1 IO_PAD40 239 1 Z
+bit 239 C 1 *
+bit 238 I 1 IO_PAD39
+bit 237 O 1 IO_PAD39 236 1 Z
+bit 236 C 1 *
+bit 235 I 1 IO_PAD37
+bit 234 O 1 IO_PAD37 233 1 Z
+bit 233 C 1 *
+bit 232 I 1 IO_PAD36
+bit 231 O 1 IO_PAD36 230 1 Z
+bit 230 C 1 *
+bit 229 O 1 *
+bit 228 O 1 *
+bit 227 O 1 *
+bit 226 I 1 IO_PAD35
+bit 225 O 1 IO_PAD35 224 1 Z
+bit 224 C 1 *
+bit 223 I 1 IO_PAD34
+bit 222 O 1 IO_PAD34 221 1 Z
+bit 221 C 1 *
+bit 220 I 1 IO_PAD33
+bit 219 O 1 IO_PAD33 218 1 Z
+bit 218 C 1 *
+bit 217 I 1 IO_PAD28
+bit 216 O 1 IO_PAD28 215 1 Z
+bit 215 C 1 *
+bit 214 I 1 IO_PAD27
+bit 213 O 1 IO_PAD27 212 1 Z
+bit 212 C 1 *
+bit 211 O 1 *
+bit 210 O 1 *
+bit 209 O 1 *
+bit 208 I 1 IO_PAD26
+bit 207 O 1 IO_PAD26 206 1 Z
+bit 206 C 1 *
+bit 205 I 1 IO_PAD25
+bit 204 O 1 IO_PAD25 203 1 Z
+bit 203 C 1 *
+bit 202 I 1 IO_PAD24
+bit 201 O 1 IO_PAD24 200 1 Z
+bit 200 C 1 *
+bit 199 I 1 IO_PAD22
+bit 198 O 1 IO_PAD22 197 1 Z
+bit 197 C 1 *
+bit 196 I 1 IO_PAD21
+bit 195 O 1 IO_PAD21 194 1 Z
+bit 194 C 1 *
+bit 193 O 1 *
+bit 192 O 1 *
+bit 191 O 1 *
+bit 190 I 1 IO_PAD20
+bit 189 O 1 IO_PAD20 188 1 Z
+bit 188 C 1 *
+bit 187 I 1 IO_PAD19
+bit 186 O 1 IO_PAD19 185 1 Z
+bit 185 C 1 *
+bit 184 I 1 IO_PAD18
+bit 183 O 1 IO_PAD18 182 1 Z
+bit 182 C 1 *
+bit 181 I 1 IO_PAD13
+bit 180 O 1 IO_PAD13 179 1 Z
+bit 179 C 1 *
+bit 178 I 1 IO_PAD12
+bit 177 O 1 IO_PAD12 176 1 Z
+bit 176 C 1 *
+bit 175 O 1 *
+bit 174 O 1 *
+bit 173 O 1 *
+bit 172 I 1 IO_PAD11
+bit 171 O 1 IO_PAD11 170 1 Z
+bit 170 C 1 *
+bit 169 I 1 IO_PAD10
+bit 168 O 1 IO_PAD10 167 1 Z
+bit 167 C 1 *
+bit 166 I 1 IO_PAD9
+bit 165 O 1 IO_PAD9 164 1 Z
+bit 164 C 1 *
+bit 163 I 1 IO_PAD7
+bit 162 O 1 IO_PAD7 161 1 Z
+bit 161 C 1 *
+bit 160 I 1 IO_PAD6
+bit 159 O 1 IO_PAD6 158 1 Z
+bit 158 C 1 *
+bit 157 O 1 *
+bit 156 O 1 *
+bit 155 O 1 *
+bit 154 O 1 *
+bit 153 O 1 *
+bit 152 O 1 *
+bit 151 O 1 *
+bit 150 O 1 *
+bit 149 O 1 *
+bit 148 I 1 IO_PAD5
+bit 147 O 1 IO_PAD5 146 1 Z
+bit 146 C 1 *
+bit 145 I 1 GCK3_PAD2
+bit 144 I 1 GCK2_PAD500
+bit 143 I 1 IO_PAD499
+bit 142 O 1 IO_PAD499 141 1 Z
+bit 141 C 1 *
+bit 140 O 1 *
+bit 139 O 1 *
+bit 138 O 1 *
+bit 137 I 1 IO_PAD498
+bit 136 O 1 IO_PAD498 135 1 Z
+bit 135 C 1 *
+bit 134 O 1 *
+bit 133 O 1 *
+bit 132 O 1 *
+bit 131 I 1 IO_PAD497
+bit 130 O 1 IO_PAD497 129 1 Z
+bit 129 C 1 *
+bit 128 I 1 IO_PAD496
+bit 127 O 1 IO_PAD496 126 1 Z
+bit 126 C 1 *
+bit 125 I 1 IO_PAD494
+bit 124 O 1 IO_PAD494 123 1 Z
+bit 123 C 1 *
+bit 122 I 1 IO_PAD493
+bit 121 O 1 IO_PAD493 120 1 Z
+bit 120 C 1 *
+bit 119 I 1 IO_PAD491
+bit 118 O 1 IO_PAD491 117 1 Z
+bit 117 C 1 *
+bit 116 O 1 *
+bit 115 O 1 *
+bit 114 O 1 *
+bit 113 I 1 IO_PAD490
+bit 112 O 1 IO_PAD490 111 1 Z
+bit 111 C 1 *
+bit 110 I 1 IO_PAD489
+bit 109 O 1 IO_PAD489 108 1 Z
+bit 108 C 1 *
+bit 107 I 1 IO_PAD484
+bit 106 O 1 IO_PAD484 105 1 Z
+bit 105 C 1 *
+bit 104 I 1 IO_PAD483
+bit 103 O 1 IO_PAD483 102 1 Z
+bit 102 C 1 *
+bit 101 I 1 IO_PAD482
+bit 100 O 1 IO_PAD482 99 1 Z
+bit 99 C 1 *
+bit 98 O 1 *
+bit 97 O 1 *
+bit 96 O 1 *
+bit 95 I 1 IO_PAD481
+bit 94 O 1 IO_PAD481 93 1 Z
+bit 93 C 1 *
+bit 92 I 1 IO_PAD480
+bit 91 O 1 IO_PAD480 90 1 Z
+bit 90 C 1 *
+bit 89 I 1 IO_PAD478
+bit 88 O 1 IO_PAD478 87 1 Z
+bit 87 C 1 *
+bit 86 I 1 IO_PAD477
+bit 85 O 1 IO_PAD477 84 1 Z
+bit 84 C 1 *
+bit 83 I 1 IO_PAD476
+bit 82 O 1 IO_PAD476 81 1 Z
+bit 81 C 1 *
+bit 80 O 1 *
+bit 79 O 1 *
+bit 78 O 1 *
+bit 77 I 1 IO_PAD475
+bit 76 O 1 IO_PAD475 75 1 Z
+bit 75 C 1 *
+bit 74 I 1 IO_PAD474
+bit 73 O 1 IO_PAD474 72 1 Z
+bit 72 C 1 *
+bit 71 I 1 IO_PAD469
+bit 70 O 1 IO_PAD469 69 1 Z
+bit 69 C 1 *
+bit 68 I 1 IO_PAD468
+bit 67 O 1 IO_PAD468 66 1 Z
+bit 66 C 1 *
+bit 65 I 1 IO_PAD467
+bit 64 O 1 IO_PAD467 63 1 Z
+bit 63 C 1 *
+bit 62 O 1 *
+bit 61 O 1 *
+bit 60 O 1 *
+bit 59 I 1 IO_PAD466
+bit 58 O 1 IO_PAD466 57 1 Z
+bit 57 C 1 *
+bit 56 I 1 IO_PAD465
+bit 55 O 1 IO_PAD465 54 1 Z
+bit 54 C 1 *
+bit 53 I 1 IO_PAD463
+bit 52 O 1 IO_PAD463 51 1 Z
+bit 51 C 1 *
+bit 50 I 1 IO_PAD462
+bit 49 O 1 IO_PAD462 48 1 Z
+bit 48 C 1 *
+bit 47 I 1 IO_PAD461
+bit 46 O 1 IO_PAD461 45 1 Z
+bit 45 C 1 *
+bit 44 O 1 *
+bit 43 O 1 *
+bit 42 O 1 *
+bit 41 I 1 IO_PAD460
+bit 40 O 1 IO_PAD460 39 1 Z
+bit 39 C 1 *
+bit 38 I 1 IO_PAD459
+bit 37 O 1 IO_PAD459 36 1 Z
+bit 36 C 1 *
+bit 35 I 1 IO_PAD456
+bit 34 O 1 IO_PAD456 33 1 Z
+bit 33 C 1 *
+bit 32 I 1 IO_PAD455
+bit 31 O 1 IO_PAD455 30 1 Z
+bit 30 C 1 *
+bit 29 I 1 IO_PAD454
+bit 28 O 1 IO_PAD454 27 1 Z
+bit 27 C 1 *
+bit 26 I 1 IO_PAD453
+bit 25 O 1 IO_PAD453 24 1 Z
+bit 24 C 1 *
+bit 23 I 1 IO_PAD452
+bit 22 O 1 IO_PAD452 21 1 Z
+bit 21 C 1 *
+bit 20 I 1 IO_PAD451
+bit 19 O 1 IO_PAD451 18 1 Z
+bit 18 C 1 *
+bit 17 I 1 IO_PAD449
+bit 16 O 1 IO_PAD449 15 1 Z
+bit 15 C 1 *
+bit 14 I 1 IO_PAD448
+bit 13 O 1 IO_PAD448 12 1 Z
+bit 12 C 1 *
+bit 11 I 1 IO_PAD447
+bit 10 O 1 IO_PAD447 9 1 Z
+bit 9 C 1 *
+bit 8 I 1 IO_PAD446
+bit 7 O 1 IO_PAD446 6 1 Z
+bit 6 C 1 *
+bit 5 I 1 IO_PAD445
+bit 4 O 1 IO_PAD445 3 1 Z
+bit 3 C 1 *
+bit 2 I 1 IO_PAD444
+bit 1 O 1 IO_PAD444 0 1 Z
+bit 0 C 1 *
--- /dev/null
+#
+# $Id$
+#
+# Copyright (C) 2002 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Marcel Telka <marcel@telka.sk>, 2002.
+#
+
+# bits 31-28 of the Device Identification Register
+#0010 xc2v1000-fg256 0
+0011 xc2v1000-fg256 0
--- /dev/null
+signal CCLK_P15
+signal DONE_R14
+signal GND1
+signal GND2
+signal GND3
+signal GND4
+signal GND5
+signal GND6
+signal GND7
+signal GND8
+signal GND9
+signal GND10
+signal GND11
+signal GND12
+signal GND13
+signal GND14
+signal GND15
+signal GND16
+signal GND17
+signal GND18
+signal GND19
+signal GND20
+signal GND21
+signal GND22
+signal GND23
+signal GND24
+signal GND25
+signal GND26
+signal GND27
+signal GND28
+signal GND29
+signal GND30
+signal GND31
+signal GND32
+signal HSWAP_EN_B3
+signal M0_T2
+signal M1_P2
+signal M2_R3
+signal PROG_B
+signal PWRDWN_B
+signal RSVD1
+signal RSVD2
+signal RSVD3
+signal TCK
+signal TDI
+signal TDO
+signal TMS
+signal VBATT
+signal VCCAUX1
+signal VCCAUX2
+signal VCCAUX3
+signal VCCAUX4
+signal VCCINT1
+signal VCCINT2
+signal VCCINT3
+signal VCCINT4
+signal VCCINT5
+signal VCCINT6
+signal VCCINT7
+signal VCCINT8
+signal VCCO01
+signal VCCO02
+signal VCCO03
+signal VCCO11
+signal VCCO12
+signal VCCO13
+signal VCCO21
+signal VCCO22
+signal VCCO23
+signal VCCO31
+signal VCCO32
+signal VCCO33
+signal VCCO41
+signal VCCO42
+signal VCCO43
+signal VCCO51
+signal VCCO52
+signal VCCO53
+signal VCCO61
+signal VCCO62
+signal VCCO63
+signal VCCO71
+signal VCCO72
+signal VCCO73
+signal IO_A5
+signal IO_A6
+signal IO_A7
+signal IO_A8
+signal IO_A9
+signal IO_A10
+signal IO_A11
+signal IO_A12
+signal IO_B4
+signal IO_B5
+signal IO_B6
+signal IO_B7
+signal IO_B8
+signal IO_B9
+signal IO_B10
+signal IO_B11
+signal IO_B12
+signal IO_B13
+signal IO_C1
+signal IO_C4
+signal IO_C5
+signal IO_C6
+signal IO_C7
+signal IO_C8
+signal IO_C9
+signal IO_C10
+signal IO_C11
+signal IO_C12
+signal IO_C13
+signal IO_C16
+signal IO_D1
+signal IO_D2
+signal IO_D3
+signal IO_D5
+signal IO_D6
+signal IO_D7
+signal IO_D8
+signal IO_D9
+signal IO_D10
+signal IO_D11
+signal IO_D12
+signal IO_D14
+signal IO_D15
+signal IO_D16
+signal IO_E1
+signal IO_E2
+signal IO_E3
+signal IO_E4
+signal IO_E6
+signal IO_E7
+signal IO_E10
+signal IO_E11
+signal IO_E13
+signal IO_E14
+signal IO_E15
+signal IO_E16
+signal IO_F1
+signal IO_F2
+signal IO_F3
+signal IO_F4
+signal IO_F5
+signal IO_F12
+signal IO_F13
+signal IO_F14
+signal IO_F15
+signal IO_F16
+signal IO_G1
+signal IO_G2
+signal IO_G3
+signal IO_G4
+signal IO_G5
+signal IO_G12
+signal IO_G13
+signal IO_G14
+signal IO_G15
+signal IO_G16
+signal IO_H1
+signal IO_H2
+signal IO_H3
+signal IO_H4
+signal IO_H13
+signal IO_H14
+signal IO_H15
+signal IO_H16
+signal IO_J1
+signal IO_J2
+signal IO_J3
+signal IO_J4
+signal IO_J13
+signal IO_J14
+signal IO_J15
+signal IO_J16
+signal IO_K1
+signal IO_K2
+signal IO_K3
+signal IO_K4
+signal IO_K5
+signal IO_K12
+signal IO_K13
+signal IO_K14
+signal IO_K15
+signal IO_K16
+signal IO_L1
+signal IO_L2
+signal IO_L3
+signal IO_L4
+signal IO_L5
+signal IO_L12
+signal IO_L13
+signal IO_L14
+signal IO_L15
+signal IO_L16
+signal IO_M1
+signal IO_M2
+signal IO_M3
+signal IO_M4
+signal IO_M6
+signal IO_M7
+signal IO_M10
+signal IO_M11
+signal IO_M13
+signal IO_M14
+signal IO_M15
+signal IO_M16
+signal IO_N1
+signal IO_N2
+signal IO_N3
+signal IO_N5
+signal IO_N6
+signal IO_N7
+signal IO_N8
+signal IO_N9
+signal IO_N10
+signal IO_N11
+signal IO_N12
+signal IO_N14
+signal IO_N15
+signal IO_N16
+signal IO_P1
+signal IO_P4
+signal IO_P5
+signal IO_P6
+signal IO_P7
+signal IO_P8
+signal IO_P9
+signal IO_P10
+signal IO_P11
+signal IO_P12
+signal IO_P13
+signal IO_P16
+signal IO_R4
+signal IO_R5
+signal IO_R6
+signal IO_R7
+signal IO_R8
+signal IO_R9
+signal IO_R10
+signal IO_R11
+signal IO_R12
+signal IO_R13
+signal IO_T3
+signal IO_T4
+signal IO_T5
+signal IO_T6
+signal IO_T7
+signal IO_T8
+signal IO_T9
+signal IO_T10
+signal IO_T11
+signal IO_T12
+signal IO_T13
+
+register BSR 1308
+register BR 1
+register DIR 32
+
+instruction length 6
+
+instruction EXTEST 000000 BSR
+instruction SAMPLE/PRELOAD 000001 BSR
+instruction IDCODE 001001 DIR
+instruction BYPASS 111111 BR
+
+bit 1307 I 1 IO_C16
+bit 1306 O 1 IO_C16 1305 1 Z
+bit 1305 C 1 *
+bit 1304 I 1 IO_D16
+bit 1303 O 1 IO_D16 1302 1 Z
+bit 1302 C 1 *
+bit 1301 I 1 IO_D14
+bit 1300 O 1 IO_D14 1299 1 Z
+bit 1299 C 1 *
+bit 1298 I 1 IO_D15
+bit 1297 O 1 IO_D15 1296 1 Z
+bit 1296 C 1 *
+bit 1295 I 1 IO_E13
+bit 1294 O 1 IO_E13 1293 1 Z
+bit 1293 C 1 *
+bit 1292 I 1 IO_E14
+bit 1291 O 1 IO_E14 1290 1 Z
+bit 1290 C 1 *
+bit 1289 I 1 IO_E15
+bit 1288 O 1 IO_E15 1287 1 Z
+bit 1287 C 1 *
+bit 1286 I 1 IO_E16
+bit 1285 O 1 IO_E16 1284 1 Z
+bit 1284 C 1 *
+bit 1283 O 1 *
+bit 1282 O 1 *
+bit 1281 O 1 *
+bit 1280 O 1 *
+bit 1279 O 1 *
+bit 1278 O 1 *
+bit 1277 I 1 IO_F13
+bit 1276 O 1 IO_F13 1275 1 Z
+bit 1275 C 1 *
+bit 1274 I 1 IO_F14
+bit 1273 O 1 IO_F14 1272 1 Z
+bit 1272 C 1 *
+bit 1271 O 1 *
+bit 1270 O 1 *
+bit 1269 O 1 *
+bit 1268 O 1 *
+bit 1267 O 1 *
+bit 1266 O 1 *
+bit 1265 O 1 *
+bit 1264 O 1 *
+bit 1263 O 1 *
+bit 1262 O 1 *
+bit 1261 O 1 *
+bit 1260 O 1 *
+bit 1259 O 1 *
+bit 1258 O 1 *
+bit 1257 O 1 *
+bit 1256 O 1 *
+bit 1255 O 1 *
+bit 1254 O 1 *
+bit 1253 O 1 *
+bit 1252 O 1 *
+bit 1251 O 1 *
+bit 1250 O 1 *
+bit 1249 O 1 *
+bit 1248 O 1 *
+bit 1247 O 1 *
+bit 1246 O 1 *
+bit 1245 O 1 *
+bit 1244 O 1 *
+bit 1243 O 1 *
+bit 1242 O 1 *
+bit 1241 O 1 *
+bit 1240 O 1 *
+bit 1239 O 1 *
+bit 1238 O 1 *
+bit 1237 O 1 *
+bit 1236 O 1 *
+bit 1235 I 1 IO_F15
+bit 1234 O 1 IO_F15 1233 1 Z
+bit 1233 C 1 *
+bit 1232 I 1 IO_F16
+bit 1231 O 1 IO_F16 1230 1 Z
+bit 1230 C 1 *
+bit 1229 O 1 *
+bit 1228 O 1 *
+bit 1227 O 1 *
+bit 1226 O 1 *
+bit 1225 O 1 *
+bit 1224 O 1 *
+bit 1223 I 1 IO_F12
+bit 1222 O 1 IO_F12 1221 1 Z
+bit 1221 C 1 *
+bit 1220 I 1 IO_G12
+bit 1219 O 1 IO_G12 1218 1 Z
+bit 1218 C 1 *
+bit 1217 O 1 *
+bit 1216 O 1 *
+bit 1215 O 1 *
+bit 1214 O 1 *
+bit 1213 O 1 *
+bit 1212 O 1 *
+bit 1211 O 1 *
+bit 1210 O 1 *
+bit 1209 O 1 *
+bit 1208 O 1 *
+bit 1207 O 1 *
+bit 1206 O 1 *
+bit 1205 O 1 *
+bit 1204 O 1 *
+bit 1203 O 1 *
+bit 1202 O 1 *
+bit 1201 O 1 *
+bit 1200 O 1 *
+bit 1199 O 1 *
+bit 1198 O 1 *
+bit 1197 O 1 *
+bit 1196 O 1 *
+bit 1195 O 1 *
+bit 1194 O 1 *
+bit 1193 O 1 *
+bit 1192 O 1 *
+bit 1191 O 1 *
+bit 1190 O 1 *
+bit 1189 O 1 *
+bit 1188 O 1 *
+bit 1187 O 1 *
+bit 1186 O 1 *
+bit 1185 O 1 *
+bit 1184 O 1 *
+bit 1183 O 1 *
+bit 1182 O 1 *
+bit 1181 O 1 *
+bit 1180 O 1 *
+bit 1179 O 1 *
+bit 1178 O 1 *
+bit 1177 O 1 *
+bit 1176 O 1 *
+bit 1175 O 1 *
+bit 1174 O 1 *
+bit 1173 O 1 *
+bit 1172 O 1 *
+bit 1171 O 1 *
+bit 1170 O 1 *
+bit 1169 O 1 *
+bit 1168 O 1 *
+bit 1167 O 1 *
+bit 1166 O 1 *
+bit 1165 O 1 *
+bit 1164 O 1 *
+bit 1163 I 1 IO_G13
+bit 1162 O 1 IO_G13 1161 1 Z
+bit 1161 C 1 *
+bit 1160 I 1 IO_G14
+bit 1159 O 1 IO_G14 1158 1 Z
+bit 1158 C 1 *
+bit 1157 O 1 *
+bit 1156 O 1 *
+bit 1155 O 1 *
+bit 1154 O 1 *
+bit 1153 O 1 *
+bit 1152 O 1 *
+bit 1151 I 1 IO_G15
+bit 1150 O 1 IO_G15 1149 1 Z
+bit 1149 C 1 *
+bit 1148 I 1 IO_G16
+bit 1147 O 1 IO_G16 1146 1 Z
+bit 1146 C 1 *
+bit 1145 I 1 IO_H13
+bit 1144 O 1 IO_H13 1143 1 Z
+bit 1143 C 1 *
+bit 1142 I 1 IO_H14
+bit 1141 O 1 IO_H14 1140 1 Z
+bit 1140 C 1 *
+bit 1139 O 1 *
+bit 1138 O 1 *
+bit 1137 O 1 *
+bit 1136 O 1 *
+bit 1135 O 1 *
+bit 1134 O 1 *
+bit 1133 I 1 IO_H15
+bit 1132 O 1 IO_H15 1131 1 Z
+bit 1131 C 1 *
+bit 1130 I 1 IO_H16
+bit 1129 O 1 IO_H16 1128 1 Z
+bit 1128 C 1 *
+bit 1127 I 1 IO_J16
+bit 1126 O 1 IO_J16 1125 1 Z
+bit 1125 C 1 *
+bit 1124 I 1 IO_J15
+bit 1123 O 1 IO_J15 1122 1 Z
+bit 1122 C 1 *
+bit 1121 O 1 *
+bit 1120 O 1 *
+bit 1119 O 1 *
+bit 1118 O 1 *
+bit 1117 O 1 *
+bit 1116 O 1 *
+bit 1115 I 1 IO_J14
+bit 1114 O 1 IO_J14 1113 1 Z
+bit 1113 C 1 *
+bit 1112 I 1 IO_J13
+bit 1111 O 1 IO_J13 1110 1 Z
+bit 1110 C 1 *
+bit 1109 I 1 IO_K16
+bit 1108 O 1 IO_K16 1107 1 Z
+bit 1107 C 1 *
+bit 1106 I 1 IO_K15
+bit 1105 O 1 IO_K15 1104 1 Z
+bit 1104 C 1 *
+bit 1103 O 1 *
+bit 1102 O 1 *
+bit 1101 O 1 *
+bit 1100 O 1 *
+bit 1099 O 1 *
+bit 1098 O 1 *
+bit 1097 I 1 IO_K14
+bit 1096 O 1 IO_K14 1095 1 Z
+bit 1095 C 1 *
+bit 1094 I 1 IO_K13
+bit 1093 O 1 IO_K13 1092 1 Z
+bit 1092 C 1 *
+bit 1091 O 1 *
+bit 1090 O 1 *
+bit 1089 O 1 *
+bit 1088 O 1 *
+bit 1087 O 1 *
+bit 1086 O 1 *
+bit 1085 O 1 *
+bit 1084 O 1 *
+bit 1083 O 1 *
+bit 1082 O 1 *
+bit 1081 O 1 *
+bit 1080 O 1 *
+bit 1079 O 1 *
+bit 1078 O 1 *
+bit 1077 O 1 *
+bit 1076 O 1 *
+bit 1075 O 1 *
+bit 1074 O 1 *
+bit 1073 O 1 *
+bit 1072 O 1 *
+bit 1071 O 1 *
+bit 1070 O 1 *
+bit 1069 O 1 *
+bit 1068 O 1 *
+bit 1067 O 1 *
+bit 1066 O 1 *
+bit 1065 O 1 *
+bit 1064 O 1 *
+bit 1063 O 1 *
+bit 1062 O 1 *
+bit 1061 O 1 *
+bit 1060 O 1 *
+bit 1059 O 1 *
+bit 1058 O 1 *
+bit 1057 O 1 *
+bit 1056 O 1 *
+bit 1055 O 1 *
+bit 1054 O 1 *
+bit 1053 O 1 *
+bit 1052 O 1 *
+bit 1051 O 1 *
+bit 1050 O 1 *
+bit 1049 O 1 *
+bit 1048 O 1 *
+bit 1047 O 1 *
+bit 1046 O 1 *
+bit 1045 O 1 *
+bit 1044 O 1 *
+bit 1043 O 1 *
+bit 1042 O 1 *
+bit 1041 O 1 *
+bit 1040 O 1 *
+bit 1039 O 1 *
+bit 1038 O 1 *
+bit 1037 I 1 IO_K12
+bit 1036 O 1 IO_K12 1035 1 Z
+bit 1035 C 1 *
+bit 1034 I 1 IO_L12
+bit 1033 O 1 IO_L12 1032 1 Z
+bit 1032 C 1 *
+bit 1031 O 1 *
+bit 1030 O 1 *
+bit 1029 O 1 *
+bit 1028 O 1 *
+bit 1027 O 1 *
+bit 1026 O 1 *
+bit 1025 I 1 IO_L16
+bit 1024 O 1 IO_L16 1023 1 Z
+bit 1023 C 1 *
+bit 1022 I 1 IO_L15
+bit 1021 O 1 IO_L15 1020 1 Z
+bit 1020 C 1 *
+bit 1019 O 1 *
+bit 1018 O 1 *
+bit 1017 O 1 *
+bit 1016 O 1 *
+bit 1015 O 1 *
+bit 1014 O 1 *
+bit 1013 O 1 *
+bit 1012 O 1 *
+bit 1011 O 1 *
+bit 1010 O 1 *
+bit 1009 O 1 *
+bit 1008 O 1 *
+bit 1007 O 1 *
+bit 1006 O 1 *
+bit 1005 O 1 *
+bit 1004 O 1 *
+bit 1003 O 1 *
+bit 1002 O 1 *
+bit 1001 O 1 *
+bit 1000 O 1 *
+bit 999 O 1 *
+bit 998 O 1 *
+bit 997 O 1 *
+bit 996 O 1 *
+bit 995 O 1 *
+bit 994 O 1 *
+bit 993 O 1 *
+bit 992 O 1 *
+bit 991 O 1 *
+bit 990 O 1 *
+bit 989 O 1 *
+bit 988 O 1 *
+bit 987 O 1 *
+bit 986 O 1 *
+bit 985 O 1 *
+bit 984 O 1 *
+bit 983 I 1 IO_L14
+bit 982 O 1 IO_L14 981 1 Z
+bit 981 C 1 *
+bit 980 I 1 IO_L13
+bit 979 O 1 IO_L13 978 1 Z
+bit 978 C 1 *
+bit 977 O 1 *
+bit 976 O 1 *
+bit 975 O 1 *
+bit 974 O 1 *
+bit 973 O 1 *
+bit 972 O 1 *
+bit 971 I 1 IO_M16
+bit 970 O 1 IO_M16 969 1 Z
+bit 969 C 1 *
+bit 968 I 1 IO_M15
+bit 967 O 1 IO_M15 966 1 Z
+bit 966 C 1 *
+bit 965 I 1 IO_M14
+bit 964 O 1 IO_M14 963 1 Z
+bit 963 C 1 *
+bit 962 I 1 IO_M13
+bit 961 O 1 IO_M13 960 1 Z
+bit 960 C 1 *
+bit 959 I 1 IO_N15
+bit 958 O 1 IO_N15 957 1 Z
+bit 957 C 1 *
+bit 956 I 1 IO_N14
+bit 955 O 1 IO_N14 954 1 Z
+bit 954 C 1 *
+bit 953 I 1 IO_N16
+bit 952 O 1 IO_N16 951 1 Z
+bit 951 C 1 *
+bit 950 I 1 IO_P16
+bit 949 O 1 IO_P16 948 1 Z
+bit 948 C 1 *
+bit 947 I 1 CCLK_P15
+bit 946 O 1 CCLK_P15 945 1 Z
+bit 945 C 1 *
+bit 944 O 1 *
+bit 943 I 1 DONE_R14
+bit 942 O 1 DONE_R14 941 1 Z
+bit 941 C 1 *
+bit 940 I 1 IO_T14
+bit 939 O 1 IO_T14 938 1 Z
+bit 938 C 1 *
+bit 937 I 1 IO_T13
+bit 936 O 1 IO_T13 935 1 Z
+bit 935 C 1 *
+bit 934 I 1 IO_P13
+bit 933 O 1 IO_P13 932 1 Z
+bit 932 C 1 *
+bit 931 I 1 IO_R13
+bit 930 O 1 IO_R13 929 1 Z
+bit 929 C 1 *
+bit 928 I 1 IO_N12
+bit 927 O 1 IO_N12 926 1 Z
+bit 926 C 1 *
+bit 925 I 1 IO_P12
+bit 924 O 1 IO_P12 923 1 Z
+bit 923 C 1 *
+bit 922 I 1 IO_R12
+bit 921 O 1 IO_R12 920 1 Z
+bit 920 C 1 *
+bit 919 I 1 IO_T12
+bit 918 O 1 IO_T12 917 1 Z
+bit 917 C 1 *
+bit 916 I 1 IO_N11
+bit 915 O 1 IO_N11 914 1 Z
+bit 914 C 1 *
+bit 913 I 1 IO_P11
+bit 912 O 1 IO_P11 911 1 Z
+bit 911 C 1 *
+bit 910 O 1 *
+bit 909 O 1 *
+bit 908 O 1 *
+bit 907 O 1 *
+bit 906 O 1 *
+bit 905 O 1 *
+bit 904 O 1 *
+bit 903 O 1 *
+bit 902 O 1 *
+bit 901 O 1 *
+bit 900 O 1 *
+bit 899 O 1 *
+bit 898 O 1 *
+bit 897 O 1 *
+bit 896 O 1 *
+bit 895 O 1 *
+bit 894 O 1 *
+bit 893 O 1 *
+bit 892 O 1 *
+bit 891 O 1 *
+bit 890 O 1 *
+bit 889 O 1 *
+bit 888 O 1 *
+bit 887 O 1 *
+bit 886 O 1 *
+bit 885 O 1 *
+bit 884 O 1 *
+bit 883 O 1 *
+bit 882 O 1 *
+bit 881 O 1 *
+bit 880 O 1 *
+bit 879 O 1 *
+bit 878 O 1 *
+bit 877 O 1 *
+bit 876 O 1 *
+bit 875 O 1 *
+bit 874 O 1 *
+bit 873 O 1 *
+bit 872 O 1 *
+bit 871 O 1 *
+bit 870 O 1 *
+bit 869 O 1 *
+bit 868 O 1 *
+bit 867 O 1 *
+bit 866 O 1 *
+bit 865 O 1 *
+bit 864 O 1 *
+bit 863 O 1 *
+bit 862 O 1 *
+bit 861 O 1 *
+bit 860 O 1 *
+bit 859 O 1 *
+bit 858 O 1 *
+bit 857 O 1 *
+bit 856 O 1 *
+bit 855 O 1 *
+bit 854 O 1 *
+bit 853 O 1 *
+bit 852 O 1 *
+bit 851 O 1 *
+bit 850 O 1 *
+bit 849 O 1 *
+bit 848 O 1 *
+bit 847 O 1 *
+bit 846 O 1 *
+bit 845 O 1 *
+bit 844 O 1 *
+bit 843 O 1 *
+bit 842 O 1 *
+bit 841 O 1 *
+bit 840 O 1 *
+bit 839 O 1 *
+bit 838 O 1 *
+bit 837 O 1 *
+bit 836 O 1 *
+bit 835 O 1 *
+bit 834 O 1 *
+bit 833 O 1 *
+bit 832 I 1 IO_R11
+bit 831 O 1 IO_R11 830 1 Z
+bit 830 C 1 *
+bit 829 I 1 IO_T11
+bit 828 O 1 IO_T11 827 1 Z
+bit 827 C 1 *
+bit 826 I 1 IO_M11
+bit 825 O 1 IO_M11 824 1 Z
+bit 824 C 1 *
+bit 823 I 1 IO_M10
+bit 822 O 1 IO_M10 821 1 Z
+bit 821 C 1 *
+bit 820 I 1 IO_N10
+bit 819 O 1 IO_N10 818 1 Z
+bit 818 C 1 *
+bit 817 I 1 IO_P10
+bit 816 O 1 IO_P10 815 1 Z
+bit 815 C 1 *
+bit 814 I 1 IO_R10
+bit 813 O 1 IO_R10 812 1 Z
+bit 812 C 1 *
+bit 811 I 1 IO_T10
+bit 810 O 1 IO_T10 809 1 Z
+bit 809 C 1 *
+bit 808 I 1 IO_N9
+bit 807 O 1 IO_N9 806 1 Z
+bit 806 C 1 *
+bit 805 I 1 IO_P9
+bit 804 O 1 IO_P9 803 1 Z
+bit 803 C 1 *
+bit 802 I 1 IO_R9
+bit 801 O 1 IO_R9 800 1 Z
+bit 800 C 1 *
+bit 799 I 1 IO_T9
+bit 798 O 1 IO_T9 797 1 Z
+bit 797 C 1 *
+bit 796 I 1 IO_T8
+bit 795 O 1 IO_T8 794 1 Z
+bit 794 C 1 *
+bit 793 I 1 IO_R8
+bit 792 O 1 IO_R8 791 1 Z
+bit 791 C 1 *
+bit 790 I 1 IO_P8
+bit 789 O 1 IO_P8 788 1 Z
+bit 788 C 1 *
+bit 787 I 1 IO_N8
+bit 786 O 1 IO_N8 785 1 Z
+bit 785 C 1 *
+bit 784 I 1 IO_T7
+bit 783 O 1 IO_T7 782 1 Z
+bit 782 C 1 *
+bit 781 I 1 IO_R7
+bit 780 O 1 IO_R7 779 1 Z
+bit 779 C 1 *
+bit 778 I 1 IO_P7
+bit 777 O 1 IO_P7 776 1 Z
+bit 776 C 1 *
+bit 775 I 1 IO_N7
+bit 774 O 1 IO_N7 773 1 Z
+bit 773 C 1 *
+bit 772 I 1 IO_M7
+bit 771 O 1 IO_M7 770 1 Z
+bit 770 C 1 *
+bit 769 I 1 IO_M6
+bit 768 O 1 IO_M6 767 1 Z
+bit 767 C 1 *
+bit 766 I 1 IO_T6
+bit 765 O 1 IO_T6 764 1 Z
+bit 764 C 1 *
+bit 763 I 1 IO_R6
+bit 762 O 1 IO_R6 761 1 Z
+bit 761 C 1 *
+bit 760 O 1 *
+bit 759 O 1 *
+bit 758 O 1 *
+bit 757 O 1 *
+bit 756 O 1 *
+bit 755 O 1 *
+bit 754 O 1 *
+bit 753 O 1 *
+bit 752 O 1 *
+bit 751 O 1 *
+bit 750 O 1 *
+bit 749 O 1 *
+bit 748 O 1 *
+bit 747 O 1 *
+bit 746 O 1 *
+bit 745 O 1 *
+bit 744 O 1 *
+bit 743 O 1 *
+bit 742 O 1 *
+bit 741 O 1 *
+bit 740 O 1 *
+bit 739 O 1 *
+bit 738 O 1 *
+bit 737 O 1 *
+bit 736 O 1 *
+bit 735 O 1 *
+bit 734 O 1 *
+bit 733 O 1 *
+bit 732 O 1 *
+bit 731 O 1 *
+bit 730 O 1 *
+bit 729 O 1 *
+bit 728 O 1 *
+bit 727 O 1 *
+bit 726 O 1 *
+bit 725 O 1 *
+bit 724 O 1 *
+bit 723 O 1 *
+bit 722 O 1 *
+bit 721 O 1 *
+bit 720 O 1 *
+bit 719 O 1 *
+bit 718 O 1 *
+bit 717 O 1 *
+bit 716 O 1 *
+bit 715 O 1 *
+bit 714 O 1 *
+bit 713 O 1 *
+bit 712 O 1 *
+bit 711 O 1 *
+bit 710 O 1 *
+bit 709 O 1 *
+bit 708 O 1 *
+bit 707 O 1 *
+bit 706 O 1 *
+bit 705 O 1 *
+bit 704 O 1 *
+bit 703 O 1 *
+bit 702 O 1 *
+bit 701 O 1 *
+bit 700 O 1 *
+bit 699 O 1 *
+bit 698 O 1 *
+bit 697 O 1 *
+bit 696 O 1 *
+bit 695 O 1 *
+bit 694 O 1 *
+bit 693 O 1 *
+bit 692 O 1 *
+bit 691 O 1 *
+bit 690 O 1 *
+bit 689 O 1 *
+bit 688 O 1 *
+bit 687 O 1 *
+bit 686 O 1 *
+bit 685 O 1 *
+bit 684 O 1 *
+bit 683 O 1 *
+bit 682 I 1 IO_P6
+bit 681 O 1 IO_P6 680 1 Z
+bit 680 C 1 *
+bit 679 I 1 IO_N6
+bit 678 O 1 IO_N6 677 1 Z
+bit 677 C 1 *
+bit 676 I 1 IO_T5
+bit 675 O 1 IO_T5 674 1 Z
+bit 674 C 1 *
+bit 673 I 1 IO_R5
+bit 672 O 1 IO_R5 671 1 Z
+bit 671 C 1 *
+bit 670 I 1 IO_P5
+bit 669 O 1 IO_P5 668 1 Z
+bit 668 C 1 *
+bit 667 I 1 IO_N5
+bit 666 O 1 IO_N5 665 1 Z
+bit 665 C 1 *
+bit 664 I 1 IO_R4
+bit 663 O 1 IO_R4 662 1 Z
+bit 662 C 1 *
+bit 661 I 1 IO_P4
+bit 660 O 1 IO_P4 659 1 Z
+bit 659 C 1 *
+bit 658 I 1 IO_T4
+bit 657 O 1 IO_T4 656 1 Z
+bit 656 C 1 *
+bit 655 I 1 IO_T3
+bit 654 O 1 IO_T3 653 1 Z
+bit 653 C 1 *
+bit 652 I 1 M2_R3
+bit 651 I 1 M0_T2
+bit 650 I 1 M1_P2
+bit 649 I 1 IO_P1
+bit 648 O 1 IO_P1 647 1 Z
+bit 647 C 1 *
+bit 646 I 1 IO_N1
+bit 645 O 1 IO_N1 644 1 Z
+bit 644 C 1 *
+bit 643 I 1 IO_N3
+bit 642 O 1 IO_N3 641 1 Z
+bit 641 C 1 *
+bit 640 I 1 IO_N2
+bit 639 O 1 IO_N2 638 1 Z
+bit 638 C 1 *
+bit 637 I 1 IO_M4
+bit 636 O 1 IO_M4 635 1 Z
+bit 635 C 1 *
+bit 634 I 1 IO_M3
+bit 633 O 1 IO_M3 632 1 Z
+bit 632 C 1 *
+bit 631 I 1 IO_M2
+bit 630 O 1 IO_M2 629 1 Z
+bit 629 C 1 *
+bit 628 I 1 IO_M1
+bit 627 O 1 IO_M1 626 1 Z
+bit 626 C 1 *
+bit 625 O 1 *
+bit 624 O 1 *
+bit 623 O 1 *
+bit 622 O 1 *
+bit 621 O 1 *
+bit 620 O 1 *
+bit 619 I 1 IO_L4
+bit 618 O 1 IO_L4 617 1 Z
+bit 617 C 1 *
+bit 616 I 1 IO_L3
+bit 615 O 1 IO_L3 614 1 Z
+bit 614 C 1 *
+bit 613 O 1 *
+bit 612 O 1 *
+bit 611 O 1 *
+bit 610 O 1 *
+bit 609 O 1 *
+bit 608 O 1 *
+bit 607 O 1 *
+bit 606 O 1 *
+bit 605 O 1 *
+bit 604 O 1 *
+bit 603 O 1 *
+bit 602 O 1 *
+bit 601 O 1 *
+bit 600 O 1 *
+bit 599 O 1 *
+bit 598 O 1 *
+bit 597 O 1 *
+bit 596 O 1 *
+bit 595 O 1 *
+bit 594 O 1 *
+bit 593 O 1 *
+bit 592 O 1 *
+bit 591 O 1 *
+bit 590 O 1 *
+bit 589 O 1 *
+bit 588 O 1 *
+bit 587 O 1 *
+bit 586 O 1 *
+bit 585 O 1 *
+bit 584 O 1 *
+bit 583 O 1 *
+bit 582 O 1 *
+bit 581 O 1 *
+bit 580 O 1 *
+bit 579 O 1 *
+bit 578 O 1 *
+bit 577 I 1 IO_L2
+bit 576 O 1 IO_L2 575 1 Z
+bit 575 C 1 *
+bit 574 I 1 IO_L1
+bit 573 O 1 IO_L1 572 1 Z
+bit 572 C 1 *
+bit 571 O 1 *
+bit 570 O 1 *
+bit 569 O 1 *
+bit 568 O 1 *
+bit 567 O 1 *
+bit 566 O 1 *
+bit 565 I 1 IO_L5
+bit 564 O 1 IO_L5 563 1 Z
+bit 563 C 1 *
+bit 562 I 1 IO_K5
+bit 561 O 1 IO_K5 560 1 Z
+bit 560 C 1 *
+bit 559 O 1 *
+bit 558 O 1 *
+bit 557 O 1 *
+bit 556 O 1 *
+bit 555 O 1 *
+bit 554 O 1 *
+bit 553 O 1 *
+bit 552 O 1 *
+bit 551 O 1 *
+bit 550 O 1 *
+bit 549 O 1 *
+bit 548 O 1 *
+bit 547 O 1 *
+bit 546 O 1 *
+bit 545 O 1 *
+bit 544 O 1 *
+bit 543 O 1 *
+bit 542 O 1 *
+bit 541 O 1 *
+bit 540 O 1 *
+bit 539 O 1 *
+bit 538 O 1 *
+bit 537 O 1 *
+bit 536 O 1 *
+bit 535 O 1 *
+bit 534 O 1 *
+bit 533 O 1 *
+bit 532 O 1 *
+bit 531 O 1 *
+bit 530 O 1 *
+bit 529 O 1 *
+bit 528 O 1 *
+bit 527 O 1 *
+bit 526 O 1 *
+bit 525 O 1 *
+bit 524 O 1 *
+bit 523 O 1 *
+bit 522 O 1 *
+bit 521 O 1 *
+bit 520 O 1 *
+bit 519 O 1 *
+bit 518 O 1 *
+bit 517 O 1 *
+bit 516 O 1 *
+bit 515 O 1 *
+bit 514 O 1 *
+bit 513 O 1 *
+bit 512 O 1 *
+bit 511 O 1 *
+bit 510 O 1 *
+bit 509 O 1 *
+bit 508 O 1 *
+bit 507 O 1 *
+bit 506 O 1 *
+bit 505 I 1 IO_K4
+bit 504 O 1 IO_K4 503 1 Z
+bit 503 C 1 *
+bit 502 I 1 IO_K3
+bit 501 O 1 IO_K3 500 1 Z
+bit 500 C 1 *
+bit 499 O 1 *
+bit 498 O 1 *
+bit 497 O 1 *
+bit 496 O 1 *
+bit 495 O 1 *
+bit 494 O 1 *
+bit 493 I 1 IO_K2
+bit 492 O 1 IO_K2 491 1 Z
+bit 491 C 1 *
+bit 490 I 1 IO_K1
+bit 489 O 1 IO_K1 488 1 Z
+bit 488 C 1 *
+bit 487 I 1 IO_J4
+bit 486 O 1 IO_J4 485 1 Z
+bit 485 C 1 *
+bit 484 I 1 IO_J3
+bit 483 O 1 IO_J3 482 1 Z
+bit 482 C 1 *
+bit 481 O 1 *
+bit 480 O 1 *
+bit 479 O 1 *
+bit 478 O 1 *
+bit 477 O 1 *
+bit 476 O 1 *
+bit 475 I 1 IO_J2
+bit 474 O 1 IO_J2 473 1 Z
+bit 473 C 1 *
+bit 472 I 1 IO_J1
+bit 471 O 1 IO_J1 470 1 Z
+bit 470 C 1 *
+bit 469 I 1 IO_H1
+bit 468 O 1 IO_H1 467 1 Z
+bit 467 C 1 *
+bit 466 I 1 IO_H2
+bit 465 O 1 IO_H2 464 1 Z
+bit 464 C 1 *
+bit 463 O 1 *
+bit 462 O 1 *
+bit 461 O 1 *
+bit 460 O 1 *
+bit 459 O 1 *
+bit 458 O 1 *
+bit 457 I 1 IO_H3
+bit 456 O 1 IO_H3 455 1 Z
+bit 455 C 1 *
+bit 454 I 1 IO_H4
+bit 453 O 1 IO_H4 452 1 Z
+bit 452 C 1 *
+bit 451 I 1 IO_G1
+bit 450 O 1 IO_G1 449 1 Z
+bit 449 C 1 *
+bit 448 I 1 IO_G2
+bit 447 O 1 IO_G2 446 1 Z
+bit 446 C 1 *
+bit 445 O 1 *
+bit 444 O 1 *
+bit 443 O 1 *
+bit 442 O 1 *
+bit 441 O 1 *
+bit 440 O 1 *
+bit 439 I 1 IO_G3
+bit 438 O 1 IO_G3 437 1 Z
+bit 437 C 1 *
+bit 436 I 1 IO_G4
+bit 435 O 1 IO_G4 434 1 Z
+bit 434 C 1 *
+bit 433 O 1 *
+bit 432 O 1 *
+bit 431 O 1 *
+bit 430 O 1 *
+bit 429 O 1 *
+bit 428 O 1 *
+bit 427 O 1 *
+bit 426 O 1 *
+bit 425 O 1 *
+bit 424 O 1 *
+bit 423 O 1 *
+bit 422 O 1 *
+bit 421 O 1 *
+bit 420 O 1 *
+bit 419 O 1 *
+bit 418 O 1 *
+bit 417 O 1 *
+bit 416 O 1 *
+bit 415 O 1 *
+bit 414 O 1 *
+bit 413 O 1 *
+bit 412 O 1 *
+bit 411 O 1 *
+bit 410 O 1 *
+bit 409 O 1 *
+bit 408 O 1 *
+bit 407 O 1 *
+bit 406 O 1 *
+bit 405 O 1 *
+bit 404 O 1 *
+bit 403 O 1 *
+bit 402 O 1 *
+bit 401 O 1 *
+bit 400 O 1 *
+bit 399 O 1 *
+bit 398 O 1 *
+bit 397 O 1 *
+bit 396 O 1 *
+bit 395 O 1 *
+bit 394 O 1 *
+bit 393 O 1 *
+bit 392 O 1 *
+bit 391 O 1 *
+bit 390 O 1 *
+bit 389 O 1 *
+bit 388 O 1 *
+bit 387 O 1 *
+bit 386 O 1 *
+bit 385 O 1 *
+bit 384 O 1 *
+bit 383 O 1 *
+bit 382 O 1 *
+bit 381 O 1 *
+bit 380 O 1 *
+bit 379 I 1 IO_G5
+bit 378 O 1 IO_G5 377 1 Z
+bit 377 C 1 *
+bit 376 I 1 IO_F5
+bit 375 O 1 IO_F5 374 1 Z
+bit 374 C 1 *
+bit 373 O 1 *
+bit 372 O 1 *
+bit 371 O 1 *
+bit 370 O 1 *
+bit 369 O 1 *
+bit 368 O 1 *
+bit 367 I 1 IO_F1
+bit 366 O 1 IO_F1 365 1 Z
+bit 365 C 1 *
+bit 364 I 1 IO_F2
+bit 363 O 1 IO_F2 362 1 Z
+bit 362 C 1 *
+bit 361 O 1 *
+bit 360 O 1 *
+bit 359 O 1 *
+bit 358 O 1 *
+bit 357 O 1 *
+bit 356 O 1 *
+bit 355 O 1 *
+bit 354 O 1 *
+bit 353 O 1 *
+bit 352 O 1 *
+bit 351 O 1 *
+bit 350 O 1 *
+bit 349 O 1 *
+bit 348 O 1 *
+bit 347 O 1 *
+bit 346 O 1 *
+bit 345 O 1 *
+bit 344 O 1 *
+bit 343 O 1 *
+bit 342 O 1 *
+bit 341 O 1 *
+bit 340 O 1 *
+bit 339 O 1 *
+bit 338 O 1 *
+bit 337 O 1 *
+bit 336 O 1 *
+bit 335 O 1 *
+bit 334 O 1 *
+bit 333 O 1 *
+bit 332 O 1 *
+bit 331 O 1 *
+bit 330 O 1 *
+bit 329 O 1 *
+bit 328 O 1 *
+bit 327 O 1 *
+bit 326 O 1 *
+bit 325 I 1 IO_F3
+bit 324 O 1 IO_F3 323 1 Z
+bit 323 C 1 *
+bit 322 I 1 IO_F4
+bit 321 O 1 IO_F4 320 1 Z
+bit 320 C 1 *
+bit 319 O 1 *
+bit 318 O 1 *
+bit 317 O 1 *
+bit 316 O 1 *
+bit 315 O 1 *
+bit 314 O 1 *
+bit 313 I 1 IO_E1
+bit 312 O 1 IO_E1 311 1 Z
+bit 311 C 1 *
+bit 310 I 1 IO_E2
+bit 309 O 1 IO_E2 308 1 Z
+bit 308 C 1 *
+bit 307 I 1 IO_E3
+bit 306 O 1 IO_E3 305 1 Z
+bit 305 C 1 *
+bit 304 I 1 IO_E4
+bit 303 O 1 IO_E4 302 1 Z
+bit 302 C 1 *
+bit 301 I 1 IO_D2
+bit 300 O 1 IO_D2 299 1 Z
+bit 299 C 1 *
+bit 298 I 1 IO_D3
+bit 297 O 1 IO_D3 296 1 Z
+bit 296 C 1 *
+bit 295 I 1 IO_D1
+bit 294 O 1 IO_D1 293 1 Z
+bit 293 C 1 *
+bit 292 I 1 IO_C1
+bit 291 O 1 IO_C1 290 1 Z
+bit 290 C 1 *
+bit 289 O 1 *
+bit 288 I 1 HSWAP_EN_B3
+bit 287 I 1 IO_C4
+bit 286 O 1 IO_C4 285 1 Z
+bit 285 C 1 *
+bit 284 I 1 IO_B4
+bit 283 O 1 IO_B4 282 1 Z
+bit 282 C 1 *
+bit 281 I 1 IO_D5
+bit 280 O 1 IO_D5 279 1 Z
+bit 279 C 1 *
+bit 278 I 1 IO_C5
+bit 277 O 1 IO_C5 276 1 Z
+bit 276 C 1 *
+bit 275 I 1 IO_B5
+bit 274 O 1 IO_B5 273 1 Z
+bit 273 C 1 *
+bit 272 I 1 IO_A5
+bit 271 O 1 IO_A5 270 1 Z
+bit 270 C 1 *
+bit 269 I 1 IO_D6
+bit 268 O 1 IO_D6 267 1 Z
+bit 267 C 1 *
+bit 266 I 1 IO_C6
+bit 265 O 1 IO_C6 264 1 Z
+bit 264 C 1 *
+bit 263 I 1 IO_B6
+bit 262 O 1 IO_B6 261 1 Z
+bit 261 C 1 *
+bit 260 I 1 IO_A6
+bit 259 O 1 IO_A6 258 1 Z
+bit 258 C 1 *
+bit 257 O 1 *
+bit 256 O 1 *
+bit 255 O 1 *
+bit 254 O 1 *
+bit 253 O 1 *
+bit 252 O 1 *
+bit 251 O 1 *
+bit 250 O 1 *
+bit 249 O 1 *
+bit 248 O 1 *
+bit 247 O 1 *
+bit 246 O 1 *
+bit 245 O 1 *
+bit 244 O 1 *
+bit 243 O 1 *
+bit 242 O 1 *
+bit 241 O 1 *
+bit 240 O 1 *
+bit 239 O 1 *
+bit 238 O 1 *
+bit 237 O 1 *
+bit 236 O 1 *
+bit 235 O 1 *
+bit 234 O 1 *
+bit 233 O 1 *
+bit 232 O 1 *
+bit 231 O 1 *
+bit 230 O 1 *
+bit 229 O 1 *
+bit 228 O 1 *
+bit 227 O 1 *
+bit 226 O 1 *
+bit 225 O 1 *
+bit 224 O 1 *
+bit 223 O 1 *
+bit 222 O 1 *
+bit 221 O 1 *
+bit 220 O 1 *
+bit 219 O 1 *
+bit 218 O 1 *
+bit 217 O 1 *
+bit 216 O 1 *
+bit 215 O 1 *
+bit 214 O 1 *
+bit 213 O 1 *
+bit 212 O 1 *
+bit 211 O 1 *
+bit 210 O 1 *
+bit 209 O 1 *
+bit 208 O 1 *
+bit 207 O 1 *
+bit 206 O 1 *
+bit 205 O 1 *
+bit 204 O 1 *
+bit 203 O 1 *
+bit 202 O 1 *
+bit 201 O 1 *
+bit 200 O 1 *
+bit 199 O 1 *
+bit 198 O 1 *
+bit 197 O 1 *
+bit 196 O 1 *
+bit 195 O 1 *
+bit 194 O 1 *
+bit 193 O 1 *
+bit 192 O 1 *
+bit 191 O 1 *
+bit 190 O 1 *
+bit 189 O 1 *
+bit 188 O 1 *
+bit 187 O 1 *
+bit 186 O 1 *
+bit 185 O 1 *
+bit 184 O 1 *
+bit 183 O 1 *
+bit 182 O 1 *
+bit 181 O 1 *
+bit 180 O 1 *
+bit 179 O 1 *
+bit 178 O 1 *
+bit 177 O 1 *
+bit 176 O 1 *
+bit 175 O 1 *
+bit 174 O 1 *
+bit 173 I 1 IO_E6
+bit 172 O 1 IO_E6 171 1 Z
+bit 171 C 1 *
+bit 170 I 1 IO_E7
+bit 169 O 1 IO_E7 168 1 Z
+bit 168 C 1 *
+bit 167 I 1 IO_D7
+bit 166 O 1 IO_D7 165 1 Z
+bit 165 C 1 *
+bit 164 I 1 IO_C7
+bit 163 O 1 IO_C7 162 1 Z
+bit 162 C 1 *
+bit 161 I 1 IO_B7
+bit 160 O 1 IO_B7 159 1 Z
+bit 159 C 1 *
+bit 158 I 1 IO_A7
+bit 157 O 1 IO_A7 156 1 Z
+bit 156 C 1 *
+bit 155 I 1 IO_D8
+bit 154 O 1 IO_D8 153 1 Z
+bit 153 C 1 *
+bit 152 I 1 IO_C8
+bit 151 O 1 IO_C8 150 1 Z
+bit 150 C 1 *
+bit 149 I 1 IO_B8
+bit 148 O 1 IO_B8 147 1 Z
+bit 147 C 1 *
+bit 146 I 1 IO_A8
+bit 145 O 1 IO_A8 144 1 Z
+bit 144 C 1 *
+bit 143 I 1 IO_A9
+bit 142 O 1 IO_A9 141 1 Z
+bit 141 C 1 *
+bit 140 I 1 IO_B9
+bit 139 O 1 IO_B9 138 1 Z
+bit 138 C 1 *
+bit 137 I 1 IO_C9
+bit 136 O 1 IO_C9 135 1 Z
+bit 135 C 1 *
+bit 134 I 1 IO_D9
+bit 133 O 1 IO_D9 132 1 Z
+bit 132 C 1 *
+bit 131 I 1 IO_A10
+bit 130 O 1 IO_A10 129 1 Z
+bit 129 C 1 *
+bit 128 I 1 IO_B10
+bit 127 O 1 IO_B10 126 1 Z
+bit 126 C 1 *
+bit 125 I 1 IO_C10
+bit 124 O 1 IO_C10 123 1 Z
+bit 123 C 1 *
+bit 122 I 1 IO_D10
+bit 121 O 1 IO_D10 120 1 Z
+bit 120 C 1 *
+bit 119 I 1 IO_E10
+bit 118 O 1 IO_E10 117 1 Z
+bit 117 C 1 *
+bit 116 I 1 IO_E11
+bit 115 O 1 IO_E11 114 1 Z
+bit 114 C 1 *
+bit 113 O 1 *
+bit 112 O 1 *
+bit 111 O 1 *
+bit 110 O 1 *
+bit 109 O 1 *
+bit 108 O 1 *
+bit 107 O 1 *
+bit 106 O 1 *
+bit 105 O 1 *
+bit 104 O 1 *
+bit 103 O 1 *
+bit 102 O 1 *
+bit 101 O 1 *
+bit 100 O 1 *
+bit 99 O 1 *
+bit 98 O 1 *
+bit 97 O 1 *
+bit 96 O 1 *
+bit 95 O 1 *
+bit 94 O 1 *
+bit 93 O 1 *
+bit 92 O 1 *
+bit 91 O 1 *
+bit 90 O 1 *
+bit 89 O 1 *
+bit 88 O 1 *
+bit 87 O 1 *
+bit 86 O 1 *
+bit 85 O 1 *
+bit 84 O 1 *
+bit 83 O 1 *
+bit 82 O 1 *
+bit 81 O 1 *
+bit 80 O 1 *
+bit 79 O 1 *
+bit 78 O 1 *
+bit 77 O 1 *
+bit 76 O 1 *
+bit 75 O 1 *
+bit 74 O 1 *
+bit 73 O 1 *
+bit 72 O 1 *
+bit 71 O 1 *
+bit 70 O 1 *
+bit 69 O 1 *
+bit 68 O 1 *
+bit 67 O 1 *
+bit 66 O 1 *
+bit 65 O 1 *
+bit 64 O 1 *
+bit 63 O 1 *
+bit 62 O 1 *
+bit 61 O 1 *
+bit 60 O 1 *
+bit 59 O 1 *
+bit 58 O 1 *
+bit 57 O 1 *
+bit 56 O 1 *
+bit 55 O 1 *
+bit 54 O 1 *
+bit 53 O 1 *
+bit 52 O 1 *
+bit 51 O 1 *
+bit 50 O 1 *
+bit 49 O 1 *
+bit 48 O 1 *
+bit 47 O 1 *
+bit 46 O 1 *
+bit 45 O 1 *
+bit 44 O 1 *
+bit 43 O 1 *
+bit 42 O 1 *
+bit 41 O 1 *
+bit 40 O 1 *
+bit 39 O 1 *
+bit 38 O 1 *
+bit 37 O 1 *
+bit 36 O 1 *
+bit 35 O 1 *
+bit 34 O 1 *
+bit 33 O 1 *
+bit 32 O 1 *
+bit 31 O 1 *
+bit 30 O 1 *
+bit 29 I 1 IO_A11
+bit 28 O 1 IO_A11 27 1 Z
+bit 27 C 1 *
+bit 26 I 1 IO_B11
+bit 25 O 1 IO_B11 24 1 Z
+bit 24 C 1 *
+bit 23 I 1 IO_C11
+bit 22 O 1 IO_C11 21 1 Z
+bit 21 C 1 *
+bit 20 I 1 IO_D11
+bit 19 O 1 IO_D11 18 1 Z
+bit 18 C 1 *
+bit 17 I 1 IO_A12
+bit 16 O 1 IO_A12 15 1 Z
+bit 15 C 1 *
+bit 14 I 1 IO_B12
+bit 13 O 1 IO_B12 12 1 Z
+bit 12 C 1 *
+bit 11 I 1 IO_C12
+bit 10 O 1 IO_C12 9 1 Z
+bit 9 C 1 *
+bit 8 I 1 IO_D12
+bit 7 O 1 IO_D12 6 1 Z
+bit 6 C 1 *
+bit 5 I 1 IO_B13
+bit 4 O 1 IO_B13 3 1 Z
+bit 3 C 1 *
+bit 2 I 1 IO_C13
+bit 1 O 1 IO_C13 0 1 Z
+bit 0 C 1 *
--- /dev/null
+#
+# $Id$
+#
+# Copyright (C) 2002 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Marcel Telka <marcel@telka.sk>, 2002.
+#
+
+# bits 31-28 of the Device Identification Register
+0000 xc2v250-fg256 0
--- /dev/null
+signal CCLK_P15
+signal DONE_R14
+signal GND1
+signal GND2
+signal GND3
+signal GND4
+signal GND5
+signal GND6
+signal GND7
+signal GND8
+signal GND9
+signal GND10
+signal GND11
+signal GND12
+signal GND13
+signal GND14
+signal GND15
+signal GND16
+signal GND17
+signal GND18
+signal GND19
+signal GND20
+signal GND21
+signal GND22
+signal GND23
+signal GND24
+signal GND25
+signal GND26
+signal GND27
+signal GND28
+signal GND29
+signal GND30
+signal GND31
+signal GND32
+signal HSWAP_EN_B3
+signal M0_T2
+signal M1_P2
+signal M2_R3
+signal PROG_B
+signal PWRDWN_B
+signal RSVD1
+signal RSVD2
+signal RSVD3
+signal TCK
+signal TDI
+signal TDO
+signal TMS
+signal VBATT
+signal VCCAUX1
+signal VCCAUX2
+signal VCCAUX3
+signal VCCAUX4
+signal VCCINT1
+signal VCCINT2
+signal VCCINT3
+signal VCCINT4
+signal VCCINT5
+signal VCCINT6
+signal VCCINT7
+signal VCCINT8
+signal VCCO01
+signal VCCO02
+signal VCCO03
+signal VCCO11
+signal VCCO12
+signal VCCO13
+signal VCCO21
+signal VCCO22
+signal VCCO23
+signal VCCO31
+signal VCCO32
+signal VCCO33
+signal VCCO41
+signal VCCO42
+signal VCCO43
+signal VCCO51
+signal VCCO52
+signal VCCO53
+signal VCCO61
+signal VCCO62
+signal VCCO63
+signal VCCO71
+signal VCCO72
+signal VCCO73
+signal IO_A5
+signal IO_A6
+signal IO_A7
+signal IO_A8
+signal IO_A9
+signal IO_A10
+signal IO_A11
+signal IO_A12
+signal IO_B4
+signal IO_B5
+signal IO_B6
+signal IO_B7
+signal IO_B8
+signal IO_B9
+signal IO_B10
+signal IO_B11
+signal IO_B12
+signal IO_B13
+signal IO_C1
+signal IO_C4
+signal IO_C5
+signal IO_C6
+signal IO_C7
+signal IO_C8
+signal IO_C9
+signal IO_C10
+signal IO_C11
+signal IO_C12
+signal IO_C13
+signal IO_C16
+signal IO_D1
+signal IO_D2
+signal IO_D3
+signal IO_D5
+signal IO_D6
+signal IO_D7
+signal IO_D8
+signal IO_D9
+signal IO_D10
+signal IO_D11
+signal IO_D12
+signal IO_D14
+signal IO_D15
+signal IO_D16
+signal IO_E1
+signal IO_E2
+signal IO_E3
+signal IO_E4
+signal IO_E6
+signal IO_E7
+signal IO_E10
+signal IO_E11
+signal IO_E13
+signal IO_E14
+signal IO_E15
+signal IO_E16
+signal IO_F1
+signal IO_F2
+signal IO_F3
+signal IO_F4
+signal IO_F5
+signal IO_F12
+signal IO_F13
+signal IO_F14
+signal IO_F15
+signal IO_F16
+signal IO_G1
+signal IO_G2
+signal IO_G3
+signal IO_G4
+signal IO_G5
+signal IO_G12
+signal IO_G13
+signal IO_G14
+signal IO_G15
+signal IO_G16
+signal IO_H1
+signal IO_H2
+signal IO_H3
+signal IO_H4
+signal IO_H13
+signal IO_H14
+signal IO_H15
+signal IO_H16
+signal IO_J1
+signal IO_J2
+signal IO_J3
+signal IO_J4
+signal IO_J13
+signal IO_J14
+signal IO_J15
+signal IO_J16
+signal IO_K1
+signal IO_K2
+signal IO_K3
+signal IO_K4
+signal IO_K5
+signal IO_K12
+signal IO_K13
+signal IO_K14
+signal IO_K15
+signal IO_K16
+signal IO_L1
+signal IO_L2
+signal IO_L3
+signal IO_L4
+signal IO_L5
+signal IO_L12
+signal IO_L13
+signal IO_L14
+signal IO_L15
+signal IO_L16
+signal IO_M1
+signal IO_M2
+signal IO_M3
+signal IO_M4
+signal IO_M6
+signal IO_M7
+signal IO_M10
+signal IO_M11
+signal IO_M13
+signal IO_M14
+signal IO_M15
+signal IO_M16
+signal IO_N1
+signal IO_N2
+signal IO_N3
+signal IO_N5
+signal IO_N6
+signal IO_N7
+signal IO_N8
+signal IO_N9
+signal IO_N10
+signal IO_N11
+signal IO_N12
+signal IO_N14
+signal IO_N15
+signal IO_N16
+signal IO_P1
+signal IO_P4
+signal IO_P5
+signal IO_P6
+signal IO_P7
+signal IO_P8
+signal IO_P9
+signal IO_P10
+signal IO_P11
+signal IO_P12
+signal IO_P13
+signal IO_P16
+signal IO_R4
+signal IO_R5
+signal IO_R6
+signal IO_R7
+signal IO_R8
+signal IO_R9
+signal IO_R10
+signal IO_R11
+signal IO_R12
+signal IO_R13
+signal IO_T3
+signal IO_T4
+signal IO_T5
+signal IO_T6
+signal IO_T7
+signal IO_T8
+signal IO_T9
+signal IO_T10
+signal IO_T11
+signal IO_T12
+signal IO_T13
+
+register BSR 732
+register BR 1
+register DIR 32
+
+instruction length 6
+
+instruction EXTEST 000000 BSR
+instruction SAMPLE/PRELOAD 000001 BSR
+instruction IDCODE 001001 DIR
+instruction BYPASS 111111 BR
+
+bit 731 I 1 IO_C16
+bit 730 O 1 IO_C16 729 1 Z
+bit 729 C 1 *
+bit 728 I 1 IO_D16
+bit 727 O 1 IO_D16 726 1 Z
+bit 726 C 1 *
+bit 725 I 1 IO_D14
+bit 724 O 1 IO_D14 723 1 Z
+bit 723 C 1 *
+bit 722 I 1 IO_D15
+bit 721 O 1 IO_D15 720 1 Z
+bit 720 C 1 *
+bit 719 I 1 IO_E13
+bit 718 O 1 IO_E13 717 1 Z
+bit 717 C 1 *
+bit 716 I 1 IO_E14
+bit 715 O 1 IO_E14 714 1 Z
+bit 714 C 1 *
+bit 713 I 1 IO_E15
+bit 712 O 1 IO_E15 711 1 Z
+bit 711 C 1 *
+bit 710 I 1 IO_E16
+bit 709 O 1 IO_E16 708 1 Z
+bit 708 C 1 *
+bit 707 O 1 *
+bit 706 O 1 *
+bit 705 O 1 *
+bit 704 O 1 *
+bit 703 O 1 *
+bit 702 O 1 *
+bit 701 I 1 IO_F13
+bit 700 O 1 IO_F13 699 1 Z
+bit 699 C 1 *
+bit 698 I 1 IO_F14
+bit 697 O 1 IO_F14 696 1 Z
+bit 696 C 1 *
+bit 695 I 1 IO_F15
+bit 694 O 1 IO_F15 693 1 Z
+bit 693 C 1 *
+bit 692 I 1 IO_F16
+bit 691 O 1 IO_F16 690 1 Z
+bit 690 C 1 *
+bit 689 O 1 *
+bit 688 O 1 *
+bit 687 O 1 *
+bit 686 O 1 *
+bit 685 O 1 *
+bit 684 O 1 *
+bit 683 I 1 IO_F12
+bit 682 O 1 IO_F12 681 1 Z
+bit 681 C 1 *
+bit 680 I 1 IO_G12
+bit 679 O 1 IO_G12 678 1 Z
+bit 678 C 1 *
+bit 677 O 1 *
+bit 676 O 1 *
+bit 675 O 1 *
+bit 674 O 1 *
+bit 673 O 1 *
+bit 672 O 1 *
+bit 671 O 1 *
+bit 670 O 1 *
+bit 669 O 1 *
+bit 668 O 1 *
+bit 667 O 1 *
+bit 666 O 1 *
+bit 665 O 1 *
+bit 664 O 1 *
+bit 663 O 1 *
+bit 662 O 1 *
+bit 661 O 1 *
+bit 660 O 1 *
+bit 659 I 1 IO_G13
+bit 658 O 1 IO_G13 657 1 Z
+bit 657 C 1 *
+bit 656 I 1 IO_G14
+bit 655 O 1 IO_G14 654 1 Z
+bit 654 C 1 *
+bit 653 O 1 *
+bit 652 O 1 *
+bit 651 O 1 *
+bit 650 O 1 *
+bit 649 O 1 *
+bit 648 O 1 *
+bit 647 I 1 IO_G15
+bit 646 O 1 IO_G15 645 1 Z
+bit 645 C 1 *
+bit 644 I 1 IO_G16
+bit 643 O 1 IO_G16 642 1 Z
+bit 642 C 1 *
+bit 641 I 1 IO_H13
+bit 640 O 1 IO_H13 639 1 Z
+bit 639 C 1 *
+bit 638 I 1 IO_H14
+bit 637 O 1 IO_H14 636 1 Z
+bit 636 C 1 *
+bit 635 O 1 *
+bit 634 O 1 *
+bit 633 O 1 *
+bit 632 O 1 *
+bit 631 O 1 *
+bit 630 O 1 *
+bit 629 I 1 IO_H15
+bit 628 O 1 IO_H15 627 1 Z
+bit 627 C 1 *
+bit 626 I 1 IO_H16
+bit 625 O 1 IO_H16 624 1 Z
+bit 624 C 1 *
+bit 623 I 1 IO_J16
+bit 622 O 1 IO_J16 621 1 Z
+bit 621 C 1 *
+bit 620 I 1 IO_J15
+bit 619 O 1 IO_J15 618 1 Z
+bit 618 C 1 *
+bit 617 O 1 *
+bit 616 O 1 *
+bit 615 O 1 *
+bit 614 O 1 *
+bit 613 O 1 *
+bit 612 O 1 *
+bit 611 I 1 IO_J14
+bit 610 O 1 IO_J14 609 1 Z
+bit 609 C 1 *
+bit 608 I 1 IO_J13
+bit 607 O 1 IO_J13 606 1 Z
+bit 606 C 1 *
+bit 605 I 1 IO_K16
+bit 604 O 1 IO_K16 603 1 Z
+bit 603 C 1 *
+bit 602 I 1 IO_K15
+bit 601 O 1 IO_K15 600 1 Z
+bit 600 C 1 *
+bit 599 O 1 *
+bit 598 O 1 *
+bit 597 O 1 *
+bit 596 O 1 *
+bit 595 O 1 *
+bit 594 O 1 *
+bit 593 I 1 IO_K14
+bit 592 O 1 IO_K14 591 1 Z
+bit 591 C 1 *
+bit 590 I 1 IO_K13
+bit 589 O 1 IO_K13 588 1 Z
+bit 588 C 1 *
+bit 587 O 1 *
+bit 586 O 1 *
+bit 585 O 1 *
+bit 584 O 1 *
+bit 583 O 1 *
+bit 582 O 1 *
+bit 581 O 1 *
+bit 580 O 1 *
+bit 579 O 1 *
+bit 578 O 1 *
+bit 577 O 1 *
+bit 576 O 1 *
+bit 575 O 1 *
+bit 574 O 1 *
+bit 573 O 1 *
+bit 572 O 1 *
+bit 571 O 1 *
+bit 570 O 1 *
+bit 569 I 1 IO_K12
+bit 568 O 1 IO_K12 567 1 Z
+bit 567 C 1 *
+bit 566 I 1 IO_L12
+bit 565 O 1 IO_L12 564 1 Z
+bit 564 C 1 *
+bit 563 O 1 *
+bit 562 O 1 *
+bit 561 O 1 *
+bit 560 O 1 *
+bit 559 O 1 *
+bit 558 O 1 *
+bit 557 I 1 IO_L16
+bit 556 O 1 IO_L16 555 1 Z
+bit 555 C 1 *
+bit 554 I 1 IO_L15
+bit 553 O 1 IO_L15 552 1 Z
+bit 552 C 1 *
+bit 551 I 1 IO_L14
+bit 550 O 1 IO_L14 549 1 Z
+bit 549 C 1 *
+bit 548 I 1 IO_L13
+bit 547 O 1 IO_L13 546 1 Z
+bit 546 C 1 *
+bit 545 O 1 *
+bit 544 O 1 *
+bit 543 O 1 *
+bit 542 O 1 *
+bit 541 O 1 *
+bit 540 O 1 *
+bit 539 I 1 IO_M16
+bit 538 O 1 IO_M16 537 1 Z
+bit 537 C 1 *
+bit 536 I 1 IO_M15
+bit 535 O 1 IO_M15 534 1 Z
+bit 534 C 1 *
+bit 533 I 1 IO_M14
+bit 532 O 1 IO_M14 531 1 Z
+bit 531 C 1 *
+bit 530 I 1 IO_M13
+bit 529 O 1 IO_M13 528 1 Z
+bit 528 C 1 *
+bit 527 I 1 IO_N15
+bit 526 O 1 IO_N15 525 1 Z
+bit 525 C 1 *
+bit 524 I 1 IO_N14
+bit 523 O 1 IO_N14 522 1 Z
+bit 522 C 1 *
+bit 521 I 1 IO_N16
+bit 520 O 1 IO_N16 519 1 Z
+bit 519 C 1 *
+bit 518 I 1 IO_P16
+bit 517 O 1 IO_P16 516 1 Z
+bit 516 C 1 *
+bit 515 I 1 CCLK_P15
+bit 514 O 1 CCLK_P15 513 1 Z
+bit 513 C 1 *
+bit 512 O 1 *
+bit 511 I 1 DONE_R14
+bit 510 O 1 DONE_R14 509 1 Z
+bit 509 C 1 *
+bit 508 I 1 IO_T14
+bit 507 O 1 IO_T14 506 1 Z
+bit 506 C 1 *
+bit 505 I 1 IO_T13
+bit 504 O 1 IO_T13 503 1 Z
+bit 503 C 1 *
+bit 502 I 1 IO_P13
+bit 501 O 1 IO_P13 500 1 Z
+bit 500 C 1 *
+bit 499 I 1 IO_R13
+bit 498 O 1 IO_R13 497 1 Z
+bit 497 C 1 *
+bit 496 I 1 IO_N12
+bit 495 O 1 IO_N12 494 1 Z
+bit 494 C 1 *
+bit 493 I 1 IO_P12
+bit 492 O 1 IO_P12 491 1 Z
+bit 491 C 1 *
+bit 490 I 1 IO_R12
+bit 489 O 1 IO_R12 488 1 Z
+bit 488 C 1 *
+bit 487 I 1 IO_T12
+bit 486 O 1 IO_T12 485 1 Z
+bit 485 C 1 *
+bit 484 I 1 IO_N11
+bit 483 O 1 IO_N11 482 1 Z
+bit 482 C 1 *
+bit 481 I 1 IO_P11
+bit 480 O 1 IO_P11 479 1 Z
+bit 479 C 1 *
+bit 478 O 1 *
+bit 477 O 1 *
+bit 476 O 1 *
+bit 475 O 1 *
+bit 474 O 1 *
+bit 473 O 1 *
+bit 472 I 1 IO_R11
+bit 471 O 1 IO_R11 470 1 Z
+bit 470 C 1 *
+bit 469 I 1 IO_T11
+bit 468 O 1 IO_T11 467 1 Z
+bit 467 C 1 *
+bit 466 I 1 IO_M11
+bit 465 O 1 IO_M11 464 1 Z
+bit 464 C 1 *
+bit 463 I 1 IO_M10
+bit 462 O 1 IO_M10 461 1 Z
+bit 461 C 1 *
+bit 460 I 1 IO_N10
+bit 459 O 1 IO_N10 458 1 Z
+bit 458 C 1 *
+bit 457 I 1 IO_P10
+bit 456 O 1 IO_P10 455 1 Z
+bit 455 C 1 *
+bit 454 I 1 IO_R10
+bit 453 O 1 IO_R10 452 1 Z
+bit 452 C 1 *
+bit 451 I 1 IO_T10
+bit 450 O 1 IO_T10 449 1 Z
+bit 449 C 1 *
+bit 448 I 1 IO_N9
+bit 447 O 1 IO_N9 446 1 Z
+bit 446 C 1 *
+bit 445 I 1 IO_P9
+bit 444 O 1 IO_P9 443 1 Z
+bit 443 C 1 *
+bit 442 I 1 IO_R9
+bit 441 O 1 IO_R9 440 1 Z
+bit 440 C 1 *
+bit 439 I 1 IO_T9
+bit 438 O 1 IO_T9 437 1 Z
+bit 437 C 1 *
+bit 436 I 1 IO_T8
+bit 435 O 1 IO_T8 434 1 Z
+bit 434 C 1 *
+bit 433 I 1 IO_R8
+bit 432 O 1 IO_R8 431 1 Z
+bit 431 C 1 *
+bit 430 I 1 IO_P8
+bit 429 O 1 IO_P8 428 1 Z
+bit 428 C 1 *
+bit 427 I 1 IO_N8
+bit 426 O 1 IO_N8 425 1 Z
+bit 425 C 1 *
+bit 424 I 1 IO_T7
+bit 423 O 1 IO_T7 422 1 Z
+bit 422 C 1 *
+bit 421 I 1 IO_R7
+bit 420 O 1 IO_R7 419 1 Z
+bit 419 C 1 *
+bit 418 I 1 IO_P7
+bit 417 O 1 IO_P7 416 1 Z
+bit 416 C 1 *
+bit 415 I 1 IO_N7
+bit 414 O 1 IO_N7 413 1 Z
+bit 413 C 1 *
+bit 412 I 1 IO_M7
+bit 411 O 1 IO_M7 410 1 Z
+bit 410 C 1 *
+bit 409 I 1 IO_M6
+bit 408 O 1 IO_M6 407 1 Z
+bit 407 C 1 *
+bit 406 I 1 IO_T6
+bit 405 O 1 IO_T6 404 1 Z
+bit 404 C 1 *
+bit 403 I 1 IO_R6
+bit 402 O 1 IO_R6 401 1 Z
+bit 401 C 1 *
+bit 400 O 1 *
+bit 399 O 1 *
+bit 398 O 1 *
+bit 397 O 1 *
+bit 396 O 1 *
+bit 395 O 1 *
+bit 394 I 1 IO_P6
+bit 393 O 1 IO_P6 392 1 Z
+bit 392 C 1 *
+bit 391 I 1 IO_N6
+bit 390 O 1 IO_N6 389 1 Z
+bit 389 C 1 *
+bit 388 I 1 IO_T5
+bit 387 O 1 IO_T5 386 1 Z
+bit 386 C 1 *
+bit 385 I 1 IO_R5
+bit 384 O 1 IO_R5 383 1 Z
+bit 383 C 1 *
+bit 382 I 1 IO_P5
+bit 381 O 1 IO_P5 380 1 Z
+bit 380 C 1 *
+bit 379 I 1 IO_N5
+bit 378 O 1 IO_N5 377 1 Z
+bit 377 C 1 *
+bit 376 I 1 IO_R4
+bit 375 O 1 IO_R4 374 1 Z
+bit 374 C 1 *
+bit 373 I 1 IO_P4
+bit 372 O 1 IO_P4 371 1 Z
+bit 371 C 1 *
+bit 370 I 1 IO_T4
+bit 369 O 1 IO_T4 368 1 Z
+bit 368 C 1 *
+bit 367 I 1 IO_T3
+bit 366 O 1 IO_T3 365 1 Z
+bit 365 C 1 *
+bit 364 I 1 M2_R3
+bit 363 I 1 M0_T2
+bit 362 I 1 M1_P2
+bit 361 I 1 IO_P1
+bit 360 O 1 IO_P1 359 1 Z
+bit 359 C 1 *
+bit 358 I 1 IO_N1
+bit 357 O 1 IO_N1 356 1 Z
+bit 356 C 1 *
+bit 355 I 1 IO_N3
+bit 354 O 1 IO_N3 353 1 Z
+bit 353 C 1 *
+bit 352 I 1 IO_N2
+bit 351 O 1 IO_N2 350 1 Z
+bit 350 C 1 *
+bit 349 I 1 IO_M4
+bit 348 O 1 IO_M4 347 1 Z
+bit 347 C 1 *
+bit 346 I 1 IO_M3
+bit 345 O 1 IO_M3 344 1 Z
+bit 344 C 1 *
+bit 343 I 1 IO_M2
+bit 342 O 1 IO_M2 341 1 Z
+bit 341 C 1 *
+bit 340 I 1 IO_M1
+bit 339 O 1 IO_M1 338 1 Z
+bit 338 C 1 *
+bit 337 O 1 *
+bit 336 O 1 *
+bit 335 O 1 *
+bit 334 O 1 *
+bit 333 O 1 *
+bit 332 O 1 *
+bit 331 I 1 IO_L4
+bit 330 O 1 IO_L4 329 1 Z
+bit 329 C 1 *
+bit 328 I 1 IO_L3
+bit 327 O 1 IO_L3 326 1 Z
+bit 326 C 1 *
+bit 325 I 1 IO_L2
+bit 324 O 1 IO_L2 323 1 Z
+bit 323 C 1 *
+bit 322 I 1 IO_L1
+bit 321 O 1 IO_L1 320 1 Z
+bit 320 C 1 *
+bit 319 O 1 *
+bit 318 O 1 *
+bit 317 O 1 *
+bit 316 O 1 *
+bit 315 O 1 *
+bit 314 O 1 *
+bit 313 I 1 IO_L5
+bit 312 O 1 IO_L5 311 1 Z
+bit 311 C 1 *
+bit 310 I 1 IO_K5
+bit 309 O 1 IO_K5 308 1 Z
+bit 308 C 1 *
+bit 307 O 1 *
+bit 306 O 1 *
+bit 305 O 1 *
+bit 304 O 1 *
+bit 303 O 1 *
+bit 302 O 1 *
+bit 301 O 1 *
+bit 300 O 1 *
+bit 299 O 1 *
+bit 298 O 1 *
+bit 297 O 1 *
+bit 296 O 1 *
+bit 295 O 1 *
+bit 294 O 1 *
+bit 293 O 1 *
+bit 292 O 1 *
+bit 291 O 1 *
+bit 290 O 1 *
+bit 289 I 1 IO_K4
+bit 288 O 1 IO_K4 287 1 Z
+bit 287 C 1 *
+bit 286 I 1 IO_K3
+bit 285 O 1 IO_K3 284 1 Z
+bit 284 C 1 *
+bit 283 O 1 *
+bit 282 O 1 *
+bit 281 O 1 *
+bit 280 O 1 *
+bit 279 O 1 *
+bit 278 O 1 *
+bit 277 I 1 IO_K2
+bit 276 O 1 IO_K2 275 1 Z
+bit 275 C 1 *
+bit 274 I 1 IO_K1
+bit 273 O 1 IO_K1 272 1 Z
+bit 272 C 1 *
+bit 271 I 1 IO_J4
+bit 270 O 1 IO_J4 269 1 Z
+bit 269 C 1 *
+bit 268 I 1 IO_J3
+bit 267 O 1 IO_J3 266 1 Z
+bit 266 C 1 *
+bit 265 O 1 *
+bit 264 O 1 *
+bit 263 O 1 *
+bit 262 O 1 *
+bit 261 O 1 *
+bit 260 O 1 *
+bit 259 I 1 IO_J2
+bit 258 O 1 IO_J2 257 1 Z
+bit 257 C 1 *
+bit 256 I 1 IO_J1
+bit 255 O 1 IO_J1 254 1 Z
+bit 254 C 1 *
+bit 253 I 1 IO_H1
+bit 252 O 1 IO_H1 251 1 Z
+bit 251 C 1 *
+bit 250 I 1 IO_H2
+bit 249 O 1 IO_H2 248 1 Z
+bit 248 C 1 *
+bit 247 O 1 *
+bit 246 O 1 *
+bit 245 O 1 *
+bit 244 O 1 *
+bit 243 O 1 *
+bit 242 O 1 *
+bit 241 I 1 IO_H3
+bit 240 O 1 IO_H3 239 1 Z
+bit 239 C 1 *
+bit 238 I 1 IO_H4
+bit 237 O 1 IO_H4 236 1 Z
+bit 236 C 1 *
+bit 235 I 1 IO_G1
+bit 234 O 1 IO_G1 233 1 Z
+bit 233 C 1 *
+bit 232 I 1 IO_G2
+bit 231 O 1 IO_G2 230 1 Z
+bit 230 C 1 *
+bit 229 O 1 *
+bit 228 O 1 *
+bit 227 O 1 *
+bit 226 O 1 *
+bit 225 O 1 *
+bit 224 O 1 *
+bit 223 I 1 IO_G3
+bit 222 O 1 IO_G3 221 1 Z
+bit 221 C 1 *
+bit 220 I 1 IO_G4
+bit 219 O 1 IO_G4 218 1 Z
+bit 218 C 1 *
+bit 217 O 1 *
+bit 216 O 1 *
+bit 215 O 1 *
+bit 214 O 1 *
+bit 213 O 1 *
+bit 212 O 1 *
+bit 211 O 1 *
+bit 210 O 1 *
+bit 209 O 1 *
+bit 208 O 1 *
+bit 207 O 1 *
+bit 206 O 1 *
+bit 205 O 1 *
+bit 204 O 1 *
+bit 203 O 1 *
+bit 202 O 1 *
+bit 201 O 1 *
+bit 200 O 1 *
+bit 199 I 1 IO_G5
+bit 198 O 1 IO_G5 197 1 Z
+bit 197 C 1 *
+bit 196 I 1 IO_F5
+bit 195 O 1 IO_F5 194 1 Z
+bit 194 C 1 *
+bit 193 O 1 *
+bit 192 O 1 *
+bit 191 O 1 *
+bit 190 O 1 *
+bit 189 O 1 *
+bit 188 O 1 *
+bit 187 I 1 IO_F1
+bit 186 O 1 IO_F1 185 1 Z
+bit 185 C 1 *
+bit 184 I 1 IO_F2
+bit 183 O 1 IO_F2 182 1 Z
+bit 182 C 1 *
+bit 181 I 1 IO_F3
+bit 180 O 1 IO_F3 179 1 Z
+bit 179 C 1 *
+bit 178 I 1 IO_F4
+bit 177 O 1 IO_F4 176 1 Z
+bit 176 C 1 *
+bit 175 O 1 *
+bit 174 O 1 *
+bit 173 O 1 *
+bit 172 O 1 *
+bit 171 O 1 *
+bit 170 O 1 *
+bit 169 I 1 IO_E1
+bit 168 O 1 IO_E1 167 1 Z
+bit 167 C 1 *
+bit 166 I 1 IO_E2
+bit 165 O 1 IO_E2 164 1 Z
+bit 164 C 1 *
+bit 163 I 1 IO_E3
+bit 162 O 1 IO_E3 161 1 Z
+bit 161 C 1 *
+bit 160 I 1 IO_E4
+bit 159 O 1 IO_E4 158 1 Z
+bit 158 C 1 *
+bit 157 I 1 IO_D2
+bit 156 O 1 IO_D2 155 1 Z
+bit 155 C 1 *
+bit 154 I 1 IO_D3
+bit 153 O 1 IO_D3 152 1 Z
+bit 152 C 1 *
+bit 151 I 1 IO_D1
+bit 150 O 1 IO_D1 149 1 Z
+bit 149 C 1 *
+bit 148 I 1 IO_C1
+bit 147 O 1 IO_C1 146 1 Z
+bit 146 C 1 *
+bit 145 O 1 *
+bit 144 I 1 HSWAP_EN_B3
+bit 143 I 1 IO_C4
+bit 142 O 1 IO_C4 141 1 Z
+bit 141 C 1 *
+bit 140 I 1 IO_B4
+bit 139 O 1 IO_B4 138 1 Z
+bit 138 C 1 *
+bit 137 I 1 IO_D5
+bit 136 O 1 IO_D5 135 1 Z
+bit 135 C 1 *
+bit 134 I 1 IO_C5
+bit 133 O 1 IO_C5 132 1 Z
+bit 132 C 1 *
+bit 131 I 1 IO_B5
+bit 130 O 1 IO_B5 129 1 Z
+bit 129 C 1 *
+bit 128 I 1 IO_A5
+bit 127 O 1 IO_A5 126 1 Z
+bit 126 C 1 *
+bit 125 I 1 IO_D6
+bit 124 O 1 IO_D6 123 1 Z
+bit 123 C 1 *
+bit 122 I 1 IO_C6
+bit 121 O 1 IO_C6 120 1 Z
+bit 120 C 1 *
+bit 119 I 1 IO_B6
+bit 118 O 1 IO_B6 117 1 Z
+bit 117 C 1 *
+bit 116 I 1 IO_A6
+bit 115 O 1 IO_A6 114 1 Z
+bit 114 C 1 *
+bit 113 O 1 *
+bit 112 O 1 *
+bit 111 O 1 *
+bit 110 O 1 *
+bit 109 O 1 *
+bit 108 O 1 *
+bit 107 O 1 *
+bit 106 O 1 *
+bit 105 O 1 *
+bit 104 O 1 *
+bit 103 O 1 *
+bit 102 O 1 *
+bit 101 I 1 IO_E6
+bit 100 O 1 IO_E6 99 1 Z
+bit 99 C 1 *
+bit 98 I 1 IO_E7
+bit 97 O 1 IO_E7 96 1 Z
+bit 96 C 1 *
+bit 95 I 1 IO_D7
+bit 94 O 1 IO_D7 93 1 Z
+bit 93 C 1 *
+bit 92 I 1 IO_C7
+bit 91 O 1 IO_C7 90 1 Z
+bit 90 C 1 *
+bit 89 I 1 IO_B7
+bit 88 O 1 IO_B7 87 1 Z
+bit 87 C 1 *
+bit 86 I 1 IO_A7
+bit 85 O 1 IO_A7 84 1 Z
+bit 84 C 1 *
+bit 83 I 1 IO_D8
+bit 82 O 1 IO_D8 81 1 Z
+bit 81 C 1 *
+bit 80 I 1 IO_C8
+bit 79 O 1 IO_C8 78 1 Z
+bit 78 C 1 *
+bit 77 I 1 IO_B8
+bit 76 O 1 IO_B8 75 1 Z
+bit 75 C 1 *
+bit 74 I 1 IO_A8
+bit 73 O 1 IO_A8 72 1 Z
+bit 72 C 1 *
+bit 71 I 1 IO_A9
+bit 70 O 1 IO_A9 69 1 Z
+bit 69 C 1 *
+bit 68 I 1 IO_B9
+bit 67 O 1 IO_B9 66 1 Z
+bit 66 C 1 *
+bit 65 I 1 IO_C9
+bit 64 O 1 IO_C9 63 1 Z
+bit 63 C 1 *
+bit 62 I 1 IO_D9
+bit 61 O 1 IO_D9 60 1 Z
+bit 60 C 1 *
+bit 59 I 1 IO_A10
+bit 58 O 1 IO_A10 57 1 Z
+bit 57 C 1 *
+bit 56 I 1 IO_B10
+bit 55 O 1 IO_B10 54 1 Z
+bit 54 C 1 *
+bit 53 I 1 IO_C10
+bit 52 O 1 IO_C10 51 1 Z
+bit 51 C 1 *
+bit 50 I 1 IO_D10
+bit 49 O 1 IO_D10 48 1 Z
+bit 48 C 1 *
+bit 47 I 1 IO_E10
+bit 46 O 1 IO_E10 45 1 Z
+bit 45 C 1 *
+bit 44 I 1 IO_E11
+bit 43 O 1 IO_E11 42 1 Z
+bit 42 C 1 *
+bit 41 O 1 *
+bit 40 O 1 *
+bit 39 O 1 *
+bit 38 O 1 *
+bit 37 O 1 *
+bit 36 O 1 *
+bit 35 O 1 *
+bit 34 O 1 *
+bit 33 O 1 *
+bit 32 O 1 *
+bit 31 O 1 *
+bit 30 O 1 *
+bit 29 I 1 IO_A11
+bit 28 O 1 IO_A11 27 1 Z
+bit 27 C 1 *
+bit 26 I 1 IO_B11
+bit 25 O 1 IO_B11 24 1 Z
+bit 24 C 1 *
+bit 23 I 1 IO_C11
+bit 22 O 1 IO_C11 21 1 Z
+bit 21 C 1 *
+bit 20 I 1 IO_D11
+bit 19 O 1 IO_D11 18 1 Z
+bit 18 C 1 *
+bit 17 I 1 IO_A12
+bit 16 O 1 IO_A12 15 1 Z
+bit 15 C 1 *
+bit 14 I 1 IO_B12
+bit 13 O 1 IO_B12 12 1 Z
+bit 12 C 1 *
+bit 11 I 1 IO_C12
+bit 10 O 1 IO_C12 9 1 Z
+bit 9 C 1 *
+bit 8 I 1 IO_D12
+bit 7 O 1 IO_D12 6 1 Z
+bit 6 C 1 *
+bit 5 I 1 IO_B13
+bit 4 O 1 IO_B13 3 1 Z
+bit 3 C 1 *
+bit 2 I 1 IO_C13
+bit 1 O 1 IO_C13 0 1 Z
+bit 0 C 1 *
--- /dev/null
+#
+# $Id$
+#
+# Copyright (C) 2002 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Marcel Telka <marcel@telka.sk>, 2002.
+#
+
+# bits 31-28 of the Device Identification Register
+0000 xc2v80-fg256 0
--- /dev/null
+signal CCLK_P15
+signal DONE_R14
+signal GND1
+signal GND2
+signal GND3
+signal GND4
+signal GND5
+signal GND6
+signal GND7
+signal GND8
+signal GND9
+signal GND10
+signal GND11
+signal GND12
+signal GND13
+signal GND14
+signal GND15
+signal GND16
+signal GND17
+signal GND18
+signal GND19
+signal GND20
+signal GND21
+signal GND22
+signal GND23
+signal GND24
+signal GND25
+signal GND26
+signal GND27
+signal GND28
+signal GND29
+signal GND30
+signal GND31
+signal GND32
+signal HSWAP_EN_B3
+signal M0_T2
+signal M1_P2
+signal M2_R3
+signal NOCONNECT1
+signal NOCONNECT2
+signal NOCONNECT3
+signal NOCONNECT4
+signal NOCONNECT5
+signal NOCONNECT6
+signal NOCONNECT7
+signal NOCONNECT8
+signal NOCONNECT9
+signal NOCONNECT10
+signal NOCONNECT11
+signal NOCONNECT12
+signal NOCONNECT13
+signal NOCONNECT14
+signal NOCONNECT15
+signal NOCONNECT16
+signal NOCONNECT17
+signal NOCONNECT18
+signal NOCONNECT19
+signal NOCONNECT20
+signal NOCONNECT21
+signal NOCONNECT22
+signal NOCONNECT23
+signal NOCONNECT24
+signal NOCONNECT25
+signal NOCONNECT26
+signal NOCONNECT27
+signal NOCONNECT28
+signal NOCONNECT29
+signal NOCONNECT30
+signal NOCONNECT31
+signal NOCONNECT32
+signal NOCONNECT33
+signal NOCONNECT34
+signal NOCONNECT35
+signal NOCONNECT36
+signal NOCONNECT37
+signal NOCONNECT38
+signal NOCONNECT39
+signal NOCONNECT40
+signal NOCONNECT41
+signal NOCONNECT42
+signal NOCONNECT43
+signal NOCONNECT44
+signal NOCONNECT45
+signal NOCONNECT46
+signal NOCONNECT47
+signal NOCONNECT48
+signal NOCONNECT49
+signal NOCONNECT50
+signal NOCONNECT51
+signal NOCONNECT52
+signal PROG_B
+signal PWRDWN_B
+signal RSVD1
+signal RSVD2
+signal RSVD3
+signal TCK
+signal TDI
+signal TDO
+signal TMS
+signal VBATT
+signal VCCAUX1
+signal VCCAUX2
+signal VCCAUX3
+signal VCCAUX4
+signal VCCINT1
+signal VCCINT2
+signal VCCINT3
+signal VCCINT4
+signal VCCINT5
+signal VCCINT6
+signal VCCINT7
+signal VCCINT8
+signal VCCO01
+signal VCCO02
+signal VCCO03
+signal VCCO11
+signal VCCO12
+signal VCCO13
+signal VCCO21
+signal VCCO22
+signal VCCO23
+signal VCCO31
+signal VCCO32
+signal VCCO33
+signal VCCO41
+signal VCCO42
+signal VCCO43
+signal VCCO51
+signal VCCO52
+signal VCCO53
+signal VCCO61
+signal VCCO62
+signal VCCO63
+signal VCCO71
+signal VCCO72
+signal VCCO73
+signal IO_A5
+signal IO_A7
+signal IO_A8
+signal IO_A9
+signal IO_A10
+signal IO_A12
+signal IO_B4
+signal IO_B5
+signal IO_B7
+signal IO_B8
+signal IO_B9
+signal IO_B10
+signal IO_B12
+signal IO_B13
+signal IO_C1
+signal IO_C4
+signal IO_C5
+signal IO_C8
+signal IO_C9
+signal IO_C12
+signal IO_C13
+signal IO_C16
+signal IO_D1
+signal IO_D2
+signal IO_D3
+signal IO_D5
+signal IO_D8
+signal IO_D9
+signal IO_D12
+signal IO_D14
+signal IO_D15
+signal IO_D16
+signal IO_E1
+signal IO_E2
+signal IO_E3
+signal IO_E4
+signal IO_E13
+signal IO_E14
+signal IO_E15
+signal IO_E16
+signal IO_F3
+signal IO_F4
+signal IO_F13
+signal IO_F14
+signal IO_G1
+signal IO_G2
+signal IO_G3
+signal IO_G4
+signal IO_G13
+signal IO_G14
+signal IO_G15
+signal IO_G16
+signal IO_H1
+signal IO_H2
+signal IO_H3
+signal IO_H4
+signal IO_H13
+signal IO_H14
+signal IO_H15
+signal IO_H16
+signal IO_J1
+signal IO_J2
+signal IO_J3
+signal IO_J4
+signal IO_J13
+signal IO_J14
+signal IO_J15
+signal IO_J16
+signal IO_K1
+signal IO_K2
+signal IO_K3
+signal IO_K4
+signal IO_K13
+signal IO_K14
+signal IO_K15
+signal IO_K16
+signal IO_L3
+signal IO_L4
+signal IO_L13
+signal IO_L14
+signal IO_M1
+signal IO_M2
+signal IO_M3
+signal IO_M4
+signal IO_M13
+signal IO_M14
+signal IO_M15
+signal IO_M16
+signal IO_N1
+signal IO_N2
+signal IO_N3
+signal IO_N5
+signal IO_N8
+signal IO_N9
+signal IO_N12
+signal IO_N14
+signal IO_N15
+signal IO_N16
+signal IO_P1
+signal IO_P4
+signal IO_P5
+signal IO_P8
+signal IO_P9
+signal IO_P12
+signal IO_P13
+signal IO_P16
+signal IO_R4
+signal IO_R7
+signal IO_R8
+signal IO_R9
+signal IO_R10
+signal IO_R13
+signal IO_T3
+signal IO_T4
+signal IO_T7
+signal IO_T8
+signal IO_T9
+signal IO_T10
+signal IO_T13
+
+register BSR 444
+register BR 1
+register DIR 32
+
+instruction length 6
+
+instruction EXTEST 000000 BSR
+instruction SAMPLE/PRELOAD 000001 BSR
+instruction IDCODE 001001 DIR
+instruction BYPASS 111111 BR
+
+bit 443 I 1 IO_C16
+bit 442 O 1 IO_C16 441 1 Z
+bit 441 C 1 *
+bit 440 I 1 IO_D16
+bit 439 O 1 IO_D16 438 1 Z
+bit 438 C 1 *
+bit 437 I 1 IO_D14
+bit 436 O 1 IO_D14 435 1 Z
+bit 435 C 1 *
+bit 434 I 1 IO_D15
+bit 433 O 1 IO_D15 432 1 Z
+bit 432 C 1 *
+bit 431 I 1 IO_E13
+bit 430 O 1 IO_E13 429 1 Z
+bit 429 C 1 *
+bit 428 I 1 IO_E14
+bit 427 O 1 IO_E14 426 1 Z
+bit 426 C 1 *
+bit 425 I 1 IO_E15
+bit 424 O 1 IO_E15 423 1 Z
+bit 423 C 1 *
+bit 422 I 1 IO_E16
+bit 421 O 1 IO_E16 420 1 Z
+bit 420 C 1 *
+bit 419 O 1 *
+bit 418 O 1 *
+bit 417 O 1 *
+bit 416 O 1 *
+bit 415 O 1 *
+bit 414 O 1 *
+bit 413 I 1 IO_F13
+bit 412 O 1 IO_F13 411 1 Z
+bit 411 C 1 *
+bit 410 I 1 IO_F14
+bit 409 O 1 IO_F14 408 1 Z
+bit 408 C 1 *
+bit 407 I 1 IO_G13
+bit 406 O 1 IO_G13 405 1 Z
+bit 405 C 1 *
+bit 404 I 1 IO_G14
+bit 403 O 1 IO_G14 402 1 Z
+bit 402 C 1 *
+bit 401 O 1 *
+bit 400 O 1 *
+bit 399 O 1 *
+bit 398 O 1 *
+bit 397 O 1 *
+bit 396 O 1 *
+bit 395 I 1 IO_G15
+bit 394 O 1 IO_G15 393 1 Z
+bit 393 C 1 *
+bit 392 I 1 IO_G16
+bit 391 O 1 IO_G16 390 1 Z
+bit 390 C 1 *
+bit 389 I 1 IO_H13
+bit 388 O 1 IO_H13 387 1 Z
+bit 387 C 1 *
+bit 386 I 1 IO_H14
+bit 385 O 1 IO_H14 384 1 Z
+bit 384 C 1 *
+bit 383 O 1 *
+bit 382 O 1 *
+bit 381 O 1 *
+bit 380 O 1 *
+bit 379 O 1 *
+bit 378 O 1 *
+bit 377 I 1 IO_H15
+bit 376 O 1 IO_H15 375 1 Z
+bit 375 C 1 *
+bit 374 I 1 IO_H16
+bit 373 O 1 IO_H16 372 1 Z
+bit 372 C 1 *
+bit 371 I 1 IO_J16
+bit 370 O 1 IO_J16 369 1 Z
+bit 369 C 1 *
+bit 368 I 1 IO_J15
+bit 367 O 1 IO_J15 366 1 Z
+bit 366 C 1 *
+bit 365 O 1 *
+bit 364 O 1 *
+bit 363 O 1 *
+bit 362 O 1 *
+bit 361 O 1 *
+bit 360 O 1 *
+bit 359 I 1 IO_J14
+bit 358 O 1 IO_J14 357 1 Z
+bit 357 C 1 *
+bit 356 I 1 IO_J13
+bit 355 O 1 IO_J13 354 1 Z
+bit 354 C 1 *
+bit 353 I 1 IO_K16
+bit 352 O 1 IO_K16 351 1 Z
+bit 351 C 1 *
+bit 350 I 1 IO_K15
+bit 349 O 1 IO_K15 348 1 Z
+bit 348 C 1 *
+bit 347 O 1 *
+bit 346 O 1 *
+bit 345 O 1 *
+bit 344 O 1 *
+bit 343 O 1 *
+bit 342 O 1 *
+bit 341 I 1 IO_K14
+bit 340 O 1 IO_K14 339 1 Z
+bit 339 C 1 *
+bit 338 I 1 IO_K13
+bit 337 O 1 IO_K13 336 1 Z
+bit 336 C 1 *
+bit 335 I 1 IO_L14
+bit 334 O 1 IO_L14 333 1 Z
+bit 333 C 1 *
+bit 332 I 1 IO_L13
+bit 331 O 1 IO_L13 330 1 Z
+bit 330 C 1 *
+bit 329 O 1 *
+bit 328 O 1 *
+bit 327 O 1 *
+bit 326 O 1 *
+bit 325 O 1 *
+bit 324 O 1 *
+bit 323 I 1 IO_M16
+bit 322 O 1 IO_M16 321 1 Z
+bit 321 C 1 *
+bit 320 I 1 IO_M15
+bit 319 O 1 IO_M15 318 1 Z
+bit 318 C 1 *
+bit 317 I 1 IO_M14
+bit 316 O 1 IO_M14 315 1 Z
+bit 315 C 1 *
+bit 314 I 1 IO_M13
+bit 313 O 1 IO_M13 312 1 Z
+bit 312 C 1 *
+bit 311 I 1 IO_N15
+bit 310 O 1 IO_N15 309 1 Z
+bit 309 C 1 *
+bit 308 I 1 IO_N14
+bit 307 O 1 IO_N14 306 1 Z
+bit 306 C 1 *
+bit 305 I 1 IO_N16
+bit 304 O 1 IO_N16 303 1 Z
+bit 303 C 1 *
+bit 302 I 1 IO_P16
+bit 301 O 1 IO_P16 300 1 Z
+bit 300 C 1 *
+bit 299 I 1 CCLK_P15
+bit 298 O 1 CCLK_P15 297 1 Z
+bit 297 C 1 *
+bit 296 O 1 *
+bit 295 I 1 DONE_R14
+bit 294 O 1 DONE_R14 293 1 Z
+bit 293 C 1 *
+bit 292 I 1 IO_T14
+bit 291 O 1 IO_T14 290 1 Z
+bit 290 C 1 *
+bit 289 I 1 IO_T13
+bit 288 O 1 IO_T13 287 1 Z
+bit 287 C 1 *
+bit 286 I 1 IO_P13
+bit 285 O 1 IO_P13 284 1 Z
+bit 284 C 1 *
+bit 283 I 1 IO_R13
+bit 282 O 1 IO_R13 281 1 Z
+bit 281 C 1 *
+bit 280 I 1 IO_N12
+bit 279 O 1 IO_N12 278 1 Z
+bit 278 C 1 *
+bit 277 I 1 IO_P12
+bit 276 O 1 IO_P12 275 1 Z
+bit 275 C 1 *
+bit 274 I 1 IO_R10
+bit 273 O 1 IO_R10 272 1 Z
+bit 272 C 1 *
+bit 271 I 1 IO_T10
+bit 270 O 1 IO_T10 269 1 Z
+bit 269 C 1 *
+bit 268 I 1 IO_N9
+bit 267 O 1 IO_N9 266 1 Z
+bit 266 C 1 *
+bit 265 I 1 IO_P9
+bit 264 O 1 IO_P9 263 1 Z
+bit 263 C 1 *
+bit 262 I 1 IO_R9
+bit 261 O 1 IO_R9 260 1 Z
+bit 260 C 1 *
+bit 259 I 1 IO_T9
+bit 258 O 1 IO_T9 257 1 Z
+bit 257 C 1 *
+bit 256 I 1 IO_T8
+bit 255 O 1 IO_T8 254 1 Z
+bit 254 C 1 *
+bit 253 I 1 IO_R8
+bit 252 O 1 IO_R8 251 1 Z
+bit 251 C 1 *
+bit 250 I 1 IO_P8
+bit 249 O 1 IO_P8 248 1 Z
+bit 248 C 1 *
+bit 247 I 1 IO_N8
+bit 246 O 1 IO_N8 245 1 Z
+bit 245 C 1 *
+bit 244 I 1 IO_T7
+bit 243 O 1 IO_T7 242 1 Z
+bit 242 C 1 *
+bit 241 I 1 IO_R7
+bit 240 O 1 IO_R7 239 1 Z
+bit 239 C 1 *
+bit 238 I 1 IO_P5
+bit 237 O 1 IO_P5 236 1 Z
+bit 236 C 1 *
+bit 235 I 1 IO_N5
+bit 234 O 1 IO_N5 233 1 Z
+bit 233 C 1 *
+bit 232 I 1 IO_R4
+bit 231 O 1 IO_R4 230 1 Z
+bit 230 C 1 *
+bit 229 I 1 IO_P4
+bit 228 O 1 IO_P4 227 1 Z
+bit 227 C 1 *
+bit 226 I 1 IO_T4
+bit 225 O 1 IO_T4 224 1 Z
+bit 224 C 1 *
+bit 223 I 1 IO_T3
+bit 222 O 1 IO_T3 221 1 Z
+bit 221 C 1 *
+bit 220 I 1 M2_R3
+bit 219 I 1 M0_T2
+bit 218 I 1 M1_P2
+bit 217 I 1 IO_P1
+bit 216 O 1 IO_P1 215 1 Z
+bit 215 C 1 *
+bit 214 I 1 IO_N1
+bit 213 O 1 IO_N1 212 1 Z
+bit 212 C 1 *
+bit 211 I 1 IO_N3
+bit 210 O 1 IO_N3 209 1 Z
+bit 209 C 1 *
+bit 208 I 1 IO_N2
+bit 207 O 1 IO_N2 206 1 Z
+bit 206 C 1 *
+bit 205 I 1 IO_M4
+bit 204 O 1 IO_M4 203 1 Z
+bit 203 C 1 *
+bit 202 I 1 IO_M3
+bit 201 O 1 IO_M3 200 1 Z
+bit 200 C 1 *
+bit 199 I 1 IO_M2
+bit 198 O 1 IO_M2 197 1 Z
+bit 197 C 1 *
+bit 196 I 1 IO_M1
+bit 195 O 1 IO_M1 194 1 Z
+bit 194 C 1 *
+bit 193 O 1 *
+bit 192 O 1 *
+bit 191 O 1 *
+bit 190 O 1 *
+bit 189 O 1 *
+bit 188 O 1 *
+bit 187 I 1 IO_L4
+bit 186 O 1 IO_L4 185 1 Z
+bit 185 C 1 *
+bit 184 I 1 IO_L3
+bit 183 O 1 IO_L3 182 1 Z
+bit 182 C 1 *
+bit 181 I 1 IO_K4
+bit 180 O 1 IO_K4 179 1 Z
+bit 179 C 1 *
+bit 178 I 1 IO_K3
+bit 177 O 1 IO_K3 176 1 Z
+bit 176 C 1 *
+bit 175 O 1 *
+bit 174 O 1 *
+bit 173 O 1 *
+bit 172 O 1 *
+bit 171 O 1 *
+bit 170 O 1 *
+bit 169 I 1 IO_K2
+bit 168 O 1 IO_K2 167 1 Z
+bit 167 C 1 *
+bit 166 I 1 IO_K1
+bit 165 O 1 IO_K1 164 1 Z
+bit 164 C 1 *
+bit 163 I 1 IO_J4
+bit 162 O 1 IO_J4 161 1 Z
+bit 161 C 1 *
+bit 160 I 1 IO_J3
+bit 159 O 1 IO_J3 158 1 Z
+bit 158 C 1 *
+bit 157 O 1 *
+bit 156 O 1 *
+bit 155 O 1 *
+bit 154 O 1 *
+bit 153 O 1 *
+bit 152 O 1 *
+bit 151 I 1 IO_J2
+bit 150 O 1 IO_J2 149 1 Z
+bit 149 C 1 *
+bit 148 I 1 IO_J1
+bit 147 O 1 IO_J1 146 1 Z
+bit 146 C 1 *
+bit 145 I 1 IO_H1
+bit 144 O 1 IO_H1 143 1 Z
+bit 143 C 1 *
+bit 142 I 1 IO_H2
+bit 141 O 1 IO_H2 140 1 Z
+bit 140 C 1 *
+bit 139 O 1 *
+bit 138 O 1 *
+bit 137 O 1 *
+bit 136 O 1 *
+bit 135 O 1 *
+bit 134 O 1 *
+bit 133 I 1 IO_H3
+bit 132 O 1 IO_H3 131 1 Z
+bit 131 C 1 *
+bit 130 I 1 IO_H4
+bit 129 O 1 IO_H4 128 1 Z
+bit 128 C 1 *
+bit 127 I 1 IO_G1
+bit 126 O 1 IO_G1 125 1 Z
+bit 125 C 1 *
+bit 124 I 1 IO_G2
+bit 123 O 1 IO_G2 122 1 Z
+bit 122 C 1 *
+bit 121 O 1 *
+bit 120 O 1 *
+bit 119 O 1 *
+bit 118 O 1 *
+bit 117 O 1 *
+bit 116 O 1 *
+bit 115 I 1 IO_G3
+bit 114 O 1 IO_G3 113 1 Z
+bit 113 C 1 *
+bit 112 I 1 IO_G4
+bit 111 O 1 IO_G4 110 1 Z
+bit 110 C 1 *
+bit 109 I 1 IO_F3
+bit 108 O 1 IO_F3 107 1 Z
+bit 107 C 1 *
+bit 106 I 1 IO_F4
+bit 105 O 1 IO_F4 104 1 Z
+bit 104 C 1 *
+bit 103 O 1 *
+bit 102 O 1 *
+bit 101 O 1 *
+bit 100 O 1 *
+bit 99 O 1 *
+bit 98 O 1 *
+bit 97 I 1 IO_E1
+bit 96 O 1 IO_E1 95 1 Z
+bit 95 C 1 *
+bit 94 I 1 IO_E2
+bit 93 O 1 IO_E2 92 1 Z
+bit 92 C 1 *
+bit 91 I 1 IO_E3
+bit 90 O 1 IO_E3 89 1 Z
+bit 89 C 1 *
+bit 88 I 1 IO_E4
+bit 87 O 1 IO_E4 86 1 Z
+bit 86 C 1 *
+bit 85 I 1 IO_D2
+bit 84 O 1 IO_D2 83 1 Z
+bit 83 C 1 *
+bit 82 I 1 IO_D3
+bit 81 O 1 IO_D3 80 1 Z
+bit 80 C 1 *
+bit 79 I 1 IO_D1
+bit 78 O 1 IO_D1 77 1 Z
+bit 77 C 1 *
+bit 76 I 1 IO_C1
+bit 75 O 1 IO_C1 74 1 Z
+bit 74 C 1 *
+bit 73 O 1 *
+bit 72 I 1 HSWAP_EN_B3
+bit 71 I 1 IO_C4
+bit 70 O 1 IO_C4 69 1 Z
+bit 69 C 1 *
+bit 68 I 1 IO_B4
+bit 67 O 1 IO_B4 66 1 Z
+bit 66 C 1 *
+bit 65 I 1 IO_D5
+bit 64 O 1 IO_D5 63 1 Z
+bit 63 C 1 *
+bit 62 I 1 IO_C5
+bit 61 O 1 IO_C5 60 1 Z
+bit 60 C 1 *
+bit 59 I 1 IO_B5
+bit 58 O 1 IO_B5 57 1 Z
+bit 57 C 1 *
+bit 56 I 1 IO_A5
+bit 55 O 1 IO_A5 54 1 Z
+bit 54 C 1 *
+bit 53 I 1 IO_B7
+bit 52 O 1 IO_B7 51 1 Z
+bit 51 C 1 *
+bit 50 I 1 IO_A7
+bit 49 O 1 IO_A7 48 1 Z
+bit 48 C 1 *
+bit 47 I 1 IO_D8
+bit 46 O 1 IO_D8 45 1 Z
+bit 45 C 1 *
+bit 44 I 1 IO_C8
+bit 43 O 1 IO_C8 42 1 Z
+bit 42 C 1 *
+bit 41 I 1 IO_B8
+bit 40 O 1 IO_B8 39 1 Z
+bit 39 C 1 *
+bit 38 I 1 IO_A8
+bit 37 O 1 IO_A8 36 1 Z
+bit 36 C 1 *
+bit 35 I 1 IO_A9
+bit 34 O 1 IO_A9 33 1 Z
+bit 33 C 1 *
+bit 32 I 1 IO_B9
+bit 31 O 1 IO_B9 30 1 Z
+bit 30 C 1 *
+bit 29 I 1 IO_C9
+bit 28 O 1 IO_C9 27 1 Z
+bit 27 C 1 *
+bit 26 I 1 IO_D9
+bit 25 O 1 IO_D9 24 1 Z
+bit 24 C 1 *
+bit 23 I 1 IO_A10
+bit 22 O 1 IO_A10 21 1 Z
+bit 21 C 1 *
+bit 20 I 1 IO_B10
+bit 19 O 1 IO_B10 18 1 Z
+bit 18 C 1 *
+bit 17 I 1 IO_A12
+bit 16 O 1 IO_A12 15 1 Z
+bit 15 C 1 *
+bit 14 I 1 IO_B12
+bit 13 O 1 IO_B12 12 1 Z
+bit 12 C 1 *
+bit 11 I 1 IO_C12
+bit 10 O 1 IO_C12 9 1 Z
+bit 9 C 1 *
+bit 8 I 1 IO_D12
+bit 7 O 1 IO_D12 6 1 Z
+bit 6 C 1 *
+bit 5 I 1 IO_B13
+bit 4 O 1 IO_B13 3 1 Z
+bit 3 C 1 *
+bit 2 I 1 IO_C13
+bit 1 O 1 IO_C13 0 1 Z
+bit 0 C 1 *
--- /dev/null
+0000 xc3s1000 0
+0001 xc3s1000 1
--- /dev/null
+#
+# $Id$
+#
+# JTAG package script for XC3S1000-FG320
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Arnim Laeuger <arniml@users.sourceforge.net>
+#
+
+salias CCLK_T15 CCLK_PAD349
+salias DONE_R15 DONE_PAD348
+salias HSWAP_EN_E6 HSWAP_EN_PAD70
+salias IO_B3 IO_PAD69
+salias IO_A17 IO_PAD488
+salias IO_C16 IO_PAD482
+salias IO_C17 IO_PAD481
+salias IO_B18 IO_PAD473
+salias IO_C18 IO_PAD471
+salias IO_D17 IO_PAD470
+salias IO_D18 IO_PAD469
+salias IO_D16 IO_PAD467
+salias IO_E16 IO_PAD465
+salias IO_E17 IO_PAD464
+salias IO_E18 IO_PAD463
+salias IO_F15 IO_PAD462
+salias IO_E15 IO_PAD461
+salias IO_F14 IO_PAD459
+salias IO_G14 IO_PAD457
+salias IO_G18 IO_PAD455
+salias IO_F17 IO_PAD453
+salias IO_G15 IO_PAD452
+salias IO_G16 IO_PAD451
+salias IO_H13 IO_PAD446
+salias IO_H14 IO_PAD445
+salias IO_H16 IO_PAD433
+salias IO_H15 IO_PAD431
+salias IO_H17 IO_PAD429
+salias IO_H18 IO_PAD427
+salias IO_J13 IO_PAD424
+salias IO_J18 IO_PAD423
+salias IO_J17 IO_PAD421
+salias IO_J15 IO_PAD419
+salias IO_J14 IO_PAD418
+salias IO_K17 IO_PAD417
+salias IO_K18 IO_PAD416
+salias IO_K13 IO_PAD414
+salias IO_K14 IO_PAD412
+salias IO_K15 IO_PAD411
+salias IO_L18 IO_PAD408
+salias IO_L17 IO_PAD406
+salias IO_L15 IO_PAD404
+salias IO_L16 IO_PAD402
+salias IO_L14 IO_PAD390
+salias IO_B4 IO_PAD48
+salias IO_L13 IO_PAD389
+salias IO_M18 IO_PAD384
+salias IO_N17 IO_PAD383
+salias IO_M15 IO_PAD382
+salias IO_M16 IO_PAD380
+salias IO_M14 IO_PAD378
+salias IO_N14 IO_PAD376
+salias IO_P15 IO_PAD374
+salias IO_C4 IO_PAD46
+salias IO_N15 IO_PAD373
+salias IO_P18 IO_PAD372
+salias IO_P17 IO_PAD371
+salias IO_R17 IO_PAD370
+salias IO_R18 IO_PAD368
+salias IO_P16 IO_PAD366
+salias IO_R16 IO_PAD365
+salias IO_T18 IO_PAD364
+salias IO_U18 IO_PAD362
+salias IO_C5 IO_PAD44
+salias IO_T17 IO_PAD354
+salias IO_T16 IO_PAD353
+salias IO_V17 IO_PAD347
+salias IO_U16 IO_PAD346
+salias IO_V16 IO_PAD345
+salias IO_A2 IO_PAD68
+salias IO_D5 IO_PAD42
+salias IO_P14 IO_PAD337
+salias IO_R14 IO_PAD336
+salias IO_U15 IO_PAD326
+salias IO_V15 IO_PAD324
+salias IO_T14 IO_PAD322
+salias IO_U14 IO_PAD320
+salias IO_A4 IO_PAD40
+salias IO_V14 IO_PAD316
+salias IO_U13 IO_PAD314
+salias IO_A5 IO_PAD39
+salias IO_R13 IO_PAD304
+salias IO_P13 IO_PAD302
+salias IO_P12 IO_PAD301
+salias IO_T12 IO_PAD300
+salias IO_R12 IO_PAD298
+salias IO_V12 IO_PAD296
+salias IO_V11 IO_PAD294
+salias IO_R11 IO_PAD291
+salias IO_T11 IO_PAD290
+salias IO_N11 IO_PAD288
+salias IO_P11 IO_PAD287
+salias IO_R10 IO_PAD286
+salias IO_U10 IO_PAD284
+salias IO_V10 IO_PAD282
+salias IO_N10 IO_PAD281
+salias IO_P10 IO_PAD280
+salias IO_R9 IO_PAD278
+salias IO_N9 IO_PAD277
+salias IO_P9 IO_PAD276
+salias IO_U9 IO_PAD274
+salias IO_V9 IO_PAD272
+salias IO_N8 IO_PAD271
+salias IO_R8 IO_PAD270
+salias IO_T8 IO_PAD268
+salias IO_V8 IO_PAD267
+salias IO_V7 IO_PAD266
+salias IO_P8 IO_PAD264
+salias IO_R7 IO_PAD262
+salias IO_T7 IO_PAD260
+salias IO_D6 IO_PAD36
+salias IO_P6 IO_PAD258
+salias IO_P7 IO_PAD257
+salias IO_U6 IO_PAD256
+salias IO_V5 IO_PAD242
+salias IO_U5 IO_PAD241
+salias IO_R6 IO_PAD240
+salias IO_R5 IO_PAD239
+salias IO_V4 IO_PAD236
+salias IO_U4 IO_PAD234
+salias IO_T5 IO_PAD221
+salias IO_T4 IO_PAD220
+salias IO_V3 IO_PAD211
+salias IO_V2 IO_PAD210
+salias IO_T3 IO_PAD204
+salias IO_T2 IO_PAD203
+salias IO_A3 IO_PAD67
+salias IO_U1 IO_PAD195
+salias IO_T1 IO_PAD193
+salias IO_R2 IO_PAD192
+salias IO_R1 IO_PAD191
+salias IO_R3 IO_PAD189
+salias IO_P3 IO_PAD187
+salias IO_P2 IO_PAD186
+salias IO_P1 IO_PAD185
+salias IO_N4 IO_PAD184
+salias IO_P4 IO_PAD183
+salias IO_N5 IO_PAD181
+salias IO_M5 IO_PAD179
+salias IO_M3 IO_PAD177
+salias IO_M4 IO_PAD175
+salias IO_N2 IO_PAD174
+salias IO_M1 IO_PAD173
+salias IO_L6 IO_PAD168
+salias IO_L5 IO_PAD167
+salias IO_L3 IO_PAD155
+salias IO_L4 IO_PAD153
+salias IO_L2 IO_PAD151
+salias IO_L1 IO_PAD149
+salias IO_B5 IO_PAD26
+salias IO_K6 IO_PAD146
+salias IO_K5 IO_PAD145
+salias IO_K4 IO_PAD143
+salias IO_K1 IO_PAD141
+salias IO_K2 IO_PAD140
+salias IO_J5 IO_PAD139
+salias IO_J4 IO_PAD138
+salias IO_J1 IO_PAD136
+salias IO_J2 IO_PAD134
+salias IO_J6 IO_PAD133
+salias IO_B6 IO_PAD24
+salias IO_H1 IO_PAD130
+salias IO_H2 IO_PAD128
+salias IO_H4 IO_PAD126
+salias IO_H3 IO_PAD124
+salias IO_E7 IO_PAD23
+salias IO_H5 IO_PAD112
+salias IO_H6 IO_PAD111
+salias IO_G4 IO_PAD106
+salias IO_C7 IO_PAD22
+salias IO_G3 IO_PAD105
+salias IO_G1 IO_PAD104
+salias IO_F2 IO_PAD102
+salias IO_G5 IO_PAD100
+salias IO_F5 IO_PAD98
+salias IO_E4 IO_PAD96
+salias IO_F4 IO_PAD95
+salias IO_E2 IO_PAD94
+salias IO_E1 IO_PAD93
+salias IO_E3 IO_PAD92
+salias IO_D7 IO_PAD20
+salias IO_D3 IO_PAD90
+salias IO_D1 IO_PAD88
+salias IO_D2 IO_PAD87
+salias IO_C1 IO_PAD86
+salias IO_B1 IO_PAD84
+salias IO_C8 IO_PAD18
+salias IO_C3 IO_PAD76
+salias IO_C2 IO_PAD75
+salias IO_D8 IO_PAD16
+salias IO_E8 IO_PAD13
+salias IO_F8 IO_PAD12
+salias IO_A7 IO_PAD10
+salias IO_A8 IO_PAD9
+salias IO_D9 IO_PAD8
+salias IO_B9 IO_PAD6
+salias IO_A9 IO_PAD4
+salias IO_E9 IO_PAD3
+salias IO_F9 IO_PAD2
+salias IO_D10 IO_PAD555
+salias IO_E10 IO_PAD554
+salias IO_F10 IO_PAD553
+salias IO_A10 IO_PAD551
+salias IO_B10 IO_PAD549
+salias IO_A11 IO_PAD548
+salias IO_C11 IO_PAD547
+salias IO_D11 IO_PAD545
+salias IO_F11 IO_PAD544
+salias IO_E11 IO_PAD543
+salias IO_A12 IO_PAD541
+salias IO_C12 IO_PAD539
+salias IO_D12 IO_PAD537
+salias IO_E13 IO_PAD535
+salias IO_E12 IO_PAD534
+salias IO_B13 IO_PAD533
+salias IO_D14 IO_PAD528
+salias IO_D13 IO_PAD527
+salias IO_A14 IO_PAD519
+salias IO_B14 IO_PAD518
+salias IO_C14 IO_PAD517
+salias IO_C15 IO_PAD516
+salias IO_A15 IO_PAD513
+salias IO_B15 IO_PAD511
+salias IO_A16 IO_PAD489
+salias M0_P5 M0_PAD412
+salias M1_U3 M1_PAD411
+salias M2_R4 M2_PAD413
--- /dev/null
+#
+# $Id$
+#
+# JTAG package script for XC3S1000-FG456
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Arnim Laeuger <arniml@users.sourceforge.net>
+#
+
+salias CCLK_AA22 CCLK_PAD349
+salias DONE_AB21 DONE_PAD348
+salias HSWAP_EN_B3 HSWAP_EN_PAD70
+salias IO_A3 IO_PAD69
+salias IO_C5 IO_PAD58
+salias IO_B20 IO_PAD488
+salias IO_C20 IO_PAD482
+salias IO_C21 IO_PAD481
+salias IO_C22 IO_PAD474
+salias IO_D20 IO_PAD473
+salias IO_D19 IO_PAD471
+salias IO_D21 IO_PAD470
+salias IO_D22 IO_PAD469
+salias IO_E18 IO_PAD467
+salias IO_F18 IO_PAD465
+salias IO_E19 IO_PAD464
+salias IO_E20 IO_PAD463
+salias IO_E21 IO_PAD462
+salias IO_E22 IO_PAD461
+salias IO_G17 IO_PAD459
+salias IO_G18 IO_PAD457
+salias IO_F19 IO_PAD455
+salias IO_G19 IO_PAD453
+salias IO_F20 IO_PAD452
+salias IO_F21 IO_PAD451
+salias IO_G20 IO_PAD449
+salias IO_H19 IO_PAD447
+salias IO_G21 IO_PAD446
+salias IO_G22 IO_PAD445
+salias IO_H18 IO_PAD444
+salias IO_J17 IO_PAD443
+salias IO_H21 IO_PAD442
+salias IO_H22 IO_PAD441
+salias IO_J18 IO_PAD440
+salias IO_J19 IO_PAD439
+salias IO_J21 IO_PAD438
+salias IO_J22 IO_PAD437
+salias IO_K17 IO_PAD436
+salias IO_K18 IO_PAD435
+salias IO_K19 IO_PAD433
+salias IO_K20 IO_PAD431
+salias IO_K21 IO_PAD429
+salias IO_K22 IO_PAD427
+salias IO_L17 IO_PAD425
+salias IO_L18 IO_PAD424
+salias IO_L19 IO_PAD423
+salias IO_L20 IO_PAD421
+salias IO_L21 IO_PAD419
+salias IO_L22 IO_PAD418
+salias IO_M22 IO_PAD417
+salias IO_M21 IO_PAD416
+salias IO_M20 IO_PAD414
+salias IO_M19 IO_PAD412
+salias IO_M18 IO_PAD411
+salias IO_M17 IO_PAD410
+salias IO_N22 IO_PAD408
+salias IO_N21 IO_PAD406
+salias IO_N20 IO_PAD404
+salias IO_N19 IO_PAD402
+salias IO_N18 IO_PAD400
+salias IO_F6 IO_PAD50
+salias IO_N17 IO_PAD399
+salias IO_P22 IO_PAD398
+salias IO_P21 IO_PAD397
+salias IO_P18 IO_PAD396
+salias IO_P17 IO_PAD395
+salias IO_P19 IO_PAD394
+salias IO_R19 IO_PAD393
+salias IO_R22 IO_PAD392
+salias IO_R21 IO_PAD391
+salias IO_T22 IO_PAD390
+salias IO_B5 IO_PAD48
+salias IO_T21 IO_PAD389
+salias IO_T20 IO_PAD388
+salias IO_T19 IO_PAD386
+salias IO_R18 IO_PAD384
+salias IO_T18 IO_PAD383
+salias IO_U21 IO_PAD382
+salias IO_U20 IO_PAD380
+salias IO_T17 IO_PAD378
+salias IO_U18 IO_PAD376
+salias IO_V22 IO_PAD374
+salias IO_A5 IO_PAD46
+salias IO_V21 IO_PAD373
+salias IO_U19 IO_PAD372
+salias IO_V20 IO_PAD371
+salias IO_W21 IO_PAD370
+salias IO_W20 IO_PAD368
+salias IO_V19 IO_PAD366
+salias IO_W19 IO_PAD365
+salias IO_W22 IO_PAD364
+salias IO_Y22 IO_PAD362
+salias IO_Y21 IO_PAD361
+salias IO_E6 IO_PAD44
+salias IO_Y20 IO_PAD354
+salias IO_Y19 IO_PAD353
+salias IO_V18 IO_PAD347
+salias IO_AA20 IO_PAD346
+salias IO_AB20 IO_PAD345
+salias IO_B4 IO_PAD68
+salias IO_D6 IO_PAD42
+salias IO_AA19 IO_PAD339
+salias IO_AB19 IO_PAD338
+salias IO_W18 IO_PAD337
+salias IO_Y18 IO_PAD336
+salias IO_F7 IO_PAD41
+salias IO_U17 IO_PAD328
+salias IO_AA18 IO_PAD326
+salias IO_AB18 IO_PAD324
+salias IO_V17 IO_PAD322
+salias IO_W17 IO_PAD320
+salias IO_U16 IO_PAD319
+salias IO_Y17 IO_PAD318
+salias IO_AA17 IO_PAD317
+salias IO_C6 IO_PAD40
+salias IO_V16 IO_PAD316
+salias IO_W16 IO_PAD315
+salias IO_Y16 IO_PAD314
+salias IO_AA16 IO_PAD313
+salias IO_AB16 IO_PAD312
+salias IO_V15 IO_PAD310
+salias IO_W15 IO_PAD309
+salias IO_AA15 IO_PAD307
+salias IO_AB15 IO_PAD306
+salias IO_B6 IO_PAD39
+salias IO_U14 IO_PAD304
+salias IO_V14 IO_PAD302
+salias IO_W14 IO_PAD301
+salias IO_AA14 IO_PAD300
+salias IO_AB14 IO_PAD298
+salias IO_U13 IO_PAD296
+salias IO_V13 IO_PAD294
+salias IO_W13 IO_PAD292
+salias IO_Y13 IO_PAD291
+salias IO_AA13 IO_PAD290
+salias IO_E7 IO_PAD38
+salias IO_U12 IO_PAD288
+salias IO_V12 IO_PAD287
+salias IO_AB13 IO_PAD286
+salias IO_W12 IO_PAD284
+salias IO_Y12 IO_PAD282
+salias IO_AA12 IO_PAD281
+salias IO_AB12 IO_PAD280
+salias IO_AB11 IO_PAD278
+salias IO_AA11 IO_PAD277
+salias IO_Y11 IO_PAD276
+salias IO_D7 IO_PAD37
+salias IO_W11 IO_PAD274
+salias IO_V11 IO_PAD272
+salias IO_U11 IO_PAD271
+salias IO_AB10 IO_PAD270
+salias IO_AA10 IO_PAD268
+salias IO_Y10 IO_PAD267
+salias IO_W10 IO_PAD266
+salias IO_V10 IO_PAD264
+salias IO_AB9 IO_PAD262
+salias IO_AA9 IO_PAD260
+salias IO_C7 IO_PAD36
+salias IO_W9 IO_PAD258
+salias IO_V9 IO_PAD257
+salias IO_U10 IO_PAD256
+salias IO_AB8 IO_PAD254
+salias IO_AA8 IO_PAD252
+salias IO_W8 IO_PAD251
+salias IO_V8 IO_PAD250
+salias IO_U9 IO_PAD249
+salias IO_AB7 IO_PAD248
+salias IO_AA7 IO_PAD246
+salias IO_B7 IO_PAD35
+salias IO_Y7 IO_PAD245
+salias IO_W7 IO_PAD244
+salias IO_V7 IO_PAD243
+salias IO_AA6 IO_PAD242
+salias IO_Y6 IO_PAD241
+salias IO_W6 IO_PAD240
+salias IO_V6 IO_PAD239
+salias IO_U7 IO_PAD238
+salias IO_AB5 IO_PAD236
+salias IO_AA5 IO_PAD234
+salias IO_A7 IO_PAD34
+salias IO_Y5 IO_PAD232
+salias IO_W5 IO_PAD230
+salias IO_U6 IO_PAD222
+salias IO_AB4 IO_PAD221
+salias IO_AA4 IO_PAD220
+salias IO_E8 IO_PAD32
+salias IO_Y4 IO_PAD211
+salias IO_AA3 IO_PAD210
+salias IO_Y3 IO_PAD204
+salias IO_Y2 IO_PAD203
+salias IO_A4 IO_PAD67
+salias IO_D8 IO_PAD31
+salias IO_Y1 IO_PAD196
+salias IO_W4 IO_PAD195
+salias IO_W3 IO_PAD193
+salias IO_W2 IO_PAD192
+salias IO_W1 IO_PAD191
+salias IO_V5 IO_PAD189
+salias IO_U5 IO_PAD187
+salias IO_V4 IO_PAD186
+salias IO_V3 IO_PAD185
+salias IO_V2 IO_PAD184
+salias IO_V1 IO_PAD183
+salias IO_T6 IO_PAD181
+salias IO_T5 IO_PAD179
+salias IO_U4 IO_PAD177
+salias IO_T4 IO_PAD175
+salias IO_U3 IO_PAD174
+salias IO_B8 IO_PAD29
+salias IO_U2 IO_PAD173
+salias IO_T3 IO_PAD171
+salias IO_R4 IO_PAD169
+salias IO_T2 IO_PAD168
+salias IO_T1 IO_PAD167
+salias IO_R5 IO_PAD166
+salias IO_P6 IO_PAD165
+salias IO_R2 IO_PAD164
+salias IO_R1 IO_PAD163
+salias IO_P5 IO_PAD162
+salias IO_A8 IO_PAD28
+salias IO_P4 IO_PAD161
+salias IO_P2 IO_PAD160
+salias IO_P1 IO_PAD159
+salias IO_N6 IO_PAD158
+salias IO_N5 IO_PAD157
+salias IO_N4 IO_PAD155
+salias IO_N3 IO_PAD153
+salias IO_N2 IO_PAD151
+salias IO_N1 IO_PAD149
+salias IO_M6 IO_PAD147
+salias IO_F9 IO_PAD26
+salias IO_M5 IO_PAD146
+salias IO_M4 IO_PAD145
+salias IO_M3 IO_PAD143
+salias IO_M2 IO_PAD141
+salias IO_M1 IO_PAD140
+salias IO_L1 IO_PAD139
+salias IO_L2 IO_PAD138
+salias IO_L3 IO_PAD136
+salias IO_L4 IO_PAD134
+salias IO_L5 IO_PAD133
+salias IO_E9 IO_PAD24
+salias IO_L6 IO_PAD132
+salias IO_K1 IO_PAD130
+salias IO_K2 IO_PAD128
+salias IO_K3 IO_PAD126
+salias IO_K4 IO_PAD124
+salias IO_K5 IO_PAD122
+salias IO_K6 IO_PAD121
+salias IO_J1 IO_PAD120
+salias IO_J2 IO_PAD119
+salias IO_J5 IO_PAD118
+salias IO_D9 IO_PAD23
+salias IO_J6 IO_PAD117
+salias IO_J4 IO_PAD116
+salias IO_H4 IO_PAD115
+salias IO_H1 IO_PAD114
+salias IO_H2 IO_PAD113
+salias IO_G1 IO_PAD112
+salias IO_G2 IO_PAD111
+salias IO_G3 IO_PAD110
+salias IO_G4 IO_PAD108
+salias IO_H5 IO_PAD106
+salias IO_B9 IO_PAD22
+salias IO_G5 IO_PAD105
+salias IO_F2 IO_PAD104
+salias IO_F3 IO_PAD102
+salias IO_G6 IO_PAD100
+salias IO_F5 IO_PAD98
+salias IO_E1 IO_PAD96
+salias IO_E2 IO_PAD95
+salias IO_F4 IO_PAD94
+salias IO_E3 IO_PAD93
+salias IO_D3 IO_PAD92
+salias IO_A9 IO_PAD20
+salias IO_D2 IO_PAD90
+salias IO_E4 IO_PAD88
+salias IO_D4 IO_PAD87
+salias IO_D1 IO_PAD86
+salias IO_C1 IO_PAD84
+salias IO_C2 IO_PAD83
+salias IO_F10 IO_PAD18
+salias IO_C3 IO_PAD76
+salias IO_C4 IO_PAD75
+salias IO_E10 IO_PAD16
+salias IO_D10 IO_PAD14
+salias IO_C10 IO_PAD13
+salias IO_B10 IO_PAD12
+salias IO_F11 IO_PAD10
+salias IO_E11 IO_PAD9
+salias IO_A10 IO_PAD8
+salias IO_D11 IO_PAD6
+salias IO_C11 IO_PAD4
+salias IO_B11 IO_PAD3
+salias IO_A11 IO_PAD2
+salias IO_A12 IO_PAD555
+salias IO_B12 IO_PAD554
+salias IO_C12 IO_PAD553
+salias IO_D12 IO_PAD551
+salias IO_E12 IO_PAD549
+salias IO_F12 IO_PAD548
+salias IO_A13 IO_PAD547
+salias IO_B13 IO_PAD545
+salias IO_C13 IO_PAD544
+salias IO_D13 IO_PAD543
+salias IO_E13 IO_PAD541
+salias IO_A14 IO_PAD539
+salias IO_B14 IO_PAD537
+salias IO_D14 IO_PAD535
+salias IO_E14 IO_PAD534
+salias IO_F13 IO_PAD533
+salias IO_B15 IO_PAD531
+salias IO_A15 IO_PAD529
+salias IO_D15 IO_PAD528
+salias IO_E15 IO_PAD527
+salias IO_F14 IO_PAD526
+salias IO_A16 IO_PAD525
+salias IO_B16 IO_PAD523
+salias IO_C16 IO_PAD522
+salias IO_D16 IO_PAD521
+salias IO_E16 IO_PAD520
+salias IO_B17 IO_PAD519
+salias IO_C17 IO_PAD518
+salias IO_D17 IO_PAD517
+salias IO_E5 IO_PAD60
+salias IO_E17 IO_PAD516
+salias IO_F16 IO_PAD515
+salias IO_A18 IO_PAD513
+salias IO_B18 IO_PAD511
+salias IO_C18 IO_PAD509
+salias IO_D18 IO_PAD507
+salias IO_D5 IO_PAD59
+salias IO_F17 IO_PAD499
+salias IO_A19 IO_PAD498
+salias IO_B19 IO_PAD497
+salias IO_C19 IO_PAD489
+salias M0_AB2 M0_PAD412
+salias M1_AA1 M1_PAD411
+salias M2_AB3 M2_PAD413
--- /dev/null
+#
+# $Id$
+#
+# JTAG package script for XC3S1000-FG676
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Arnim Laeuger <arniml@users.sourceforge.net>
+#
+
+salias CCLK_AD26 CCLK_PAD349
+salias DONE_AC24 DONE_PAD348
+salias HSWAP_EN_C2 HSWAP_EN_PAD70
+salias IO_B3 IO_PAD69
+salias IO_B5 IO_PAD58
+salias IO_E22 IO_PAD488
+salias IO_C25 IO_PAD482
+salias IO_C26 IO_PAD481
+salias IO_E23 IO_PAD480
+salias IO_E24 IO_PAD479
+salias IO_D25 IO_PAD478
+salias IO_D26 IO_PAD477
+salias IO_H20 IO_PAD475
+salias IO_H21 IO_PAD474
+salias IO_H22 IO_PAD473
+salias IO_A5 IO_PAD56
+salias IO_J21 IO_PAD471
+salias IO_H23 IO_PAD470
+salias IO_H24 IO_PAD469
+salias IO_H25 IO_PAD467
+salias IO_H26 IO_PAD465
+salias IO_J20 IO_PAD464
+salias IO_K20 IO_PAD463
+salias IO_J22 IO_PAD462
+salias IO_J23 IO_PAD461
+salias IO_J24 IO_PAD459
+salias IO_E6 IO_PAD54
+salias IO_J25 IO_PAD457
+salias IO_K21 IO_PAD455
+salias IO_K22 IO_PAD453
+salias IO_K23 IO_PAD452
+salias IO_K24 IO_PAD451
+salias IO_K25 IO_PAD449
+salias IO_K26 IO_PAD447
+salias IO_L19 IO_PAD446
+salias IO_L20 IO_PAD445
+salias IO_L21 IO_PAD444
+salias IO_D6 IO_PAD53
+salias IO_L22 IO_PAD443
+salias IO_L25 IO_PAD442
+salias IO_L26 IO_PAD441
+salias IO_M19 IO_PAD440
+salias IO_M20 IO_PAD439
+salias IO_M21 IO_PAD438
+salias IO_M22 IO_PAD437
+salias IO_L23 IO_PAD436
+salias IO_M24 IO_PAD435
+salias IO_M25 IO_PAD433
+salias IO_C6 IO_PAD52
+salias IO_M26 IO_PAD431
+salias IO_N19 IO_PAD429
+salias IO_N20 IO_PAD427
+salias IO_N21 IO_PAD425
+salias IO_N22 IO_PAD424
+salias IO_N23 IO_PAD423
+salias IO_N24 IO_PAD421
+salias IO_N25 IO_PAD419
+salias IO_N26 IO_PAD418
+salias IO_P26 IO_PAD417
+salias IO_B6 IO_PAD51
+salias IO_P25 IO_PAD416
+salias IO_P24 IO_PAD414
+salias IO_P23 IO_PAD412
+salias IO_P22 IO_PAD411
+salias IO_P21 IO_PAD410
+salias IO_P20 IO_PAD408
+salias IO_P19 IO_PAD406
+salias IO_R26 IO_PAD404
+salias IO_R25 IO_PAD402
+salias IO_R24 IO_PAD400
+salias IO_A6 IO_PAD50
+salias IO_T23 IO_PAD399
+salias IO_R22 IO_PAD398
+salias IO_R21 IO_PAD397
+salias IO_R20 IO_PAD396
+salias IO_R19 IO_PAD395
+salias IO_T26 IO_PAD394
+salias IO_T25 IO_PAD393
+salias IO_T22 IO_PAD392
+salias IO_T21 IO_PAD391
+salias IO_T20 IO_PAD390
+salias IO_E7 IO_PAD48
+salias IO_T19 IO_PAD389
+salias IO_U26 IO_PAD388
+salias IO_U25 IO_PAD386
+salias IO_U24 IO_PAD384
+salias IO_U23 IO_PAD383
+salias IO_U22 IO_PAD382
+salias IO_U21 IO_PAD380
+salias IO_V25 IO_PAD378
+salias IO_V24 IO_PAD376
+salias IO_V23 IO_PAD374
+salias IO_D7 IO_PAD46
+salias IO_V22 IO_PAD373
+salias IO_U20 IO_PAD372
+salias IO_V20 IO_PAD371
+salias IO_W26 IO_PAD370
+salias IO_W25 IO_PAD368
+salias IO_W24 IO_PAD366
+salias IO_W23 IO_PAD365
+salias IO_V21 IO_PAD364
+salias IO_W22 IO_PAD362
+salias IO_Y26 IO_PAD361
+salias IO_B7 IO_PAD44
+salias IO_Y25 IO_PAD360
+salias IO_AC26 IO_PAD358
+salias IO_AC25 IO_PAD357
+salias IO_AB24 IO_PAD356
+salias IO_AB23 IO_PAD355
+salias IO_AA22 IO_PAD354
+salias IO_AA21 IO_PAD353
+salias IO_AD25 IO_PAD347
+salias IO_AB22 IO_PAD346
+salias IO_AC22 IO_PAD345
+salias IO_E5 IO_PAD68
+salias IO_A7 IO_PAD42
+salias IO_AE24 IO_PAD343
+salias IO_AF24 IO_PAD342
+salias IO_AD23 IO_PAD340
+salias IO_AE23 IO_PAD339
+salias IO_AF23 IO_PAD338
+salias IO_AD22 IO_PAD337
+salias IO_AE22 IO_PAD336
+salias IO_AF22 IO_PAD334
+salias IO_AB21 IO_PAD332
+salias IO_AC21 IO_PAD331
+salias IO_F7 IO_PAD41
+salias IO_AD21 IO_PAD330
+salias IO_AE21 IO_PAD329
+salias IO_AF21 IO_PAD328
+salias IO_AB20 IO_PAD326
+salias IO_AC20 IO_PAD324
+salias IO_AE20 IO_PAD322
+salias IO_AF20 IO_PAD320
+salias IO_AA20 IO_PAD319
+salias IO_AE19 IO_PAD318
+salias IO_AF19 IO_PAD317
+salias IO_B8 IO_PAD40
+salias IO_Y18 IO_PAD316
+salias IO_AA18 IO_PAD315
+salias IO_Y17 IO_PAD314
+salias IO_AC17 IO_PAD313
+salias IO_AA17 IO_PAD312
+salias IO_AD17 IO_PAD310
+salias IO_AB17 IO_PAD309
+salias IO_W16 IO_PAD308
+salias IO_Y16 IO_PAD307
+salias IO_AA16 IO_PAD306
+salias IO_A8 IO_PAD39
+salias IO_AB16 IO_PAD304
+salias IO_AC16 IO_PAD302
+salias IO_W15 IO_PAD301
+salias IO_Y15 IO_PAD300
+salias IO_W14 IO_PAD298
+salias IO_AA15 IO_PAD296
+salias IO_AB15 IO_PAD294
+salias IO_AD15 IO_PAD292
+salias IO_AE15 IO_PAD291
+salias IO_AF15 IO_PAD290
+salias IO_G9 IO_PAD38
+salias IO_Y14 IO_PAD288
+salias IO_AA14 IO_PAD287
+salias IO_AB14 IO_PAD286
+salias IO_AC14 IO_PAD284
+salias IO_AD14 IO_PAD282
+salias IO_AE14 IO_PAD281
+salias IO_AF14 IO_PAD280
+salias IO_AF13 IO_PAD278
+salias IO_AE13 IO_PAD277
+salias IO_AD13 IO_PAD276
+salias IO_F9 IO_PAD37
+salias IO_AC13 IO_PAD274
+salias IO_AB13 IO_PAD272
+salias IO_AA13 IO_PAD271
+salias IO_Y13 IO_PAD270
+salias IO_W13 IO_PAD268
+salias IO_AF12 IO_PAD267
+salias IO_AE12 IO_PAD266
+salias IO_AD12 IO_PAD264
+salias IO_AB12 IO_PAD262
+salias IO_AA12 IO_PAD260
+salias IO_G10 IO_PAD36
+salias IO_Y12 IO_PAD258
+salias IO_W12 IO_PAD257
+salias IO_AC11 IO_PAD256
+salias IO_AB11 IO_PAD254
+salias IO_AA11 IO_PAD252
+salias IO_Y11 IO_PAD251
+salias IO_W11 IO_PAD250
+salias IO_AD10 IO_PAD249
+salias IO_AC10 IO_PAD248
+salias IO_AB10 IO_PAD246
+salias IO_F10 IO_PAD35
+salias IO_AA10 IO_PAD245
+salias IO_Y10 IO_PAD244
+salias IO_AB9 IO_PAD243
+salias IO_AA9 IO_PAD242
+salias IO_Y9 IO_PAD241
+salias IO_AF8 IO_PAD240
+salias IO_AE8 IO_PAD239
+salias IO_Y8 IO_PAD238
+salias IO_AF7 IO_PAD236
+salias IO_AE7 IO_PAD234
+salias IO_E10 IO_PAD34
+salias IO_AC7 IO_PAD232
+salias IO_AB7 IO_PAD230
+salias IO_AA7 IO_PAD229
+salias IO_AF6 IO_PAD228
+salias IO_AE6 IO_PAD227
+salias IO_AD6 IO_PAD226
+salias IO_AC6 IO_PAD224
+salias IO_AF5 IO_PAD222
+salias IO_AE5 IO_PAD221
+salias IO_AD5 IO_PAD220
+salias IO_D10 IO_PAD32
+salias IO_AB6 IO_PAD219
+salias IO_AA6 IO_PAD218
+salias IO_AF4 IO_PAD216
+salias IO_AE4 IO_PAD215
+salias IO_AD4 IO_PAD214
+salias IO_AC5 IO_PAD211
+salias IO_AB5 IO_PAD210
+salias IO_AD2 IO_PAD204
+salias IO_AD1 IO_PAD203
+salias IO_AB4 IO_PAD202
+salias IO_D5 IO_PAD67
+salias IO_C10 IO_PAD31
+salias IO_AB3 IO_PAD201
+salias IO_AC2 IO_PAD200
+salias IO_AC1 IO_PAD199
+salias IO_W7 IO_PAD197
+salias IO_W6 IO_PAD196
+salias IO_V6 IO_PAD195
+salias IO_W5 IO_PAD193
+salias IO_W4 IO_PAD192
+salias IO_W3 IO_PAD191
+salias IO_W2 IO_PAD189
+salias IO_H11 IO_PAD30
+salias IO_W1 IO_PAD187
+salias IO_V7 IO_PAD186
+salias IO_U7 IO_PAD185
+salias IO_V5 IO_PAD184
+salias IO_V4 IO_PAD183
+salias IO_V3 IO_PAD181
+salias IO_V2 IO_PAD179
+salias IO_U6 IO_PAD177
+salias IO_U5 IO_PAD175
+salias IO_U4 IO_PAD174
+salias IO_G11 IO_PAD29
+salias IO_U3 IO_PAD173
+salias IO_U2 IO_PAD171
+salias IO_U1 IO_PAD169
+salias IO_T8 IO_PAD168
+salias IO_T7 IO_PAD167
+salias IO_T6 IO_PAD166
+salias IO_T5 IO_PAD165
+salias IO_T2 IO_PAD164
+salias IO_T1 IO_PAD163
+salias IO_R8 IO_PAD162
+salias IO_F11 IO_PAD28
+salias IO_R7 IO_PAD161
+salias IO_R6 IO_PAD160
+salias IO_R5 IO_PAD159
+salias IO_T4 IO_PAD158
+salias IO_R3 IO_PAD157
+salias IO_R2 IO_PAD155
+salias IO_R1 IO_PAD153
+salias IO_P8 IO_PAD151
+salias IO_P7 IO_PAD149
+salias IO_P6 IO_PAD147
+salias IO_E11 IO_PAD26
+salias IO_P5 IO_PAD146
+salias IO_P4 IO_PAD145
+salias IO_P3 IO_PAD143
+salias IO_P2 IO_PAD141
+salias IO_P1 IO_PAD140
+salias IO_N1 IO_PAD139
+salias IO_N2 IO_PAD138
+salias IO_N3 IO_PAD136
+salias IO_N4 IO_PAD134
+salias IO_N5 IO_PAD133
+salias IO_D11 IO_PAD24
+salias IO_N6 IO_PAD132
+salias IO_N7 IO_PAD130
+salias IO_N8 IO_PAD128
+salias IO_M1 IO_PAD126
+salias IO_M2 IO_PAD124
+salias IO_M3 IO_PAD122
+salias IO_L4 IO_PAD121
+salias IO_M6 IO_PAD120
+salias IO_M5 IO_PAD119
+salias IO_M7 IO_PAD118
+salias IO_H12 IO_PAD23
+salias IO_M8 IO_PAD117
+salias IO_L1 IO_PAD116
+salias IO_L2 IO_PAD115
+salias IO_L5 IO_PAD114
+salias IO_L6 IO_PAD113
+salias IO_L7 IO_PAD112
+salias IO_L8 IO_PAD111
+salias IO_K1 IO_PAD110
+salias IO_K2 IO_PAD108
+salias IO_K3 IO_PAD106
+salias IO_G12 IO_PAD22
+salias IO_K4 IO_PAD105
+salias IO_K5 IO_PAD104
+salias IO_K6 IO_PAD102
+salias IO_J2 IO_PAD100
+salias IO_J3 IO_PAD98
+salias IO_J4 IO_PAD96
+salias IO_J5 IO_PAD95
+salias IO_K7 IO_PAD94
+salias IO_J7 IO_PAD93
+salias IO_H1 IO_PAD92
+salias IO_H13 IO_PAD20
+salias IO_H2 IO_PAD90
+salias IO_H3 IO_PAD88
+salias IO_H4 IO_PAD87
+salias IO_J6 IO_PAD86
+salias IO_H5 IO_PAD84
+salias IO_G1 IO_PAD83
+salias IO_G2 IO_PAD82
+salias IO_D1 IO_PAD80
+salias IO_D2 IO_PAD79
+salias IO_E3 IO_PAD78
+salias IO_F12 IO_PAD18
+salias IO_E4 IO_PAD77
+salias IO_F5 IO_PAD76
+salias IO_F6 IO_PAD75
+salias IO_E12 IO_PAD16
+salias IO_C12 IO_PAD14
+salias IO_B12 IO_PAD13
+salias IO_A12 IO_PAD12
+salias IO_G13 IO_PAD10
+salias IO_F13 IO_PAD9
+salias IO_E13 IO_PAD8
+salias IO_D13 IO_PAD6
+salias IO_C13 IO_PAD4
+salias IO_B13 IO_PAD3
+salias IO_A3 IO_PAD64
+salias IO_A13 IO_PAD2
+salias IO_A14 IO_PAD555
+salias IO_B14 IO_PAD554
+salias IO_C14 IO_PAD553
+salias IO_D14 IO_PAD551
+salias IO_E14 IO_PAD549
+salias IO_F14 IO_PAD548
+salias IO_G14 IO_PAD547
+salias IO_H14 IO_PAD545
+salias IO_A15 IO_PAD544
+salias IO_C4 IO_PAD62
+salias IO_B15 IO_PAD543
+salias IO_C15 IO_PAD541
+salias IO_E15 IO_PAD539
+salias IO_F15 IO_PAD537
+salias IO_G15 IO_PAD535
+salias IO_H15 IO_PAD534
+salias IO_D16 IO_PAD533
+salias IO_E16 IO_PAD531
+salias IO_F16 IO_PAD529
+salias IO_G16 IO_PAD528
+salias IO_B4 IO_PAD61
+salias IO_H16 IO_PAD527
+salias IO_C17 IO_PAD526
+salias IO_D17 IO_PAD525
+salias IO_E17 IO_PAD523
+salias IO_F17 IO_PAD522
+salias IO_G17 IO_PAD521
+salias IO_E18 IO_PAD520
+salias IO_F18 IO_PAD519
+salias IO_G18 IO_PAD518
+salias IO_A19 IO_PAD517
+salias IO_A4 IO_PAD60
+salias IO_B19 IO_PAD516
+salias IO_G19 IO_PAD515
+salias IO_A20 IO_PAD513
+salias IO_B20 IO_PAD511
+salias IO_D20 IO_PAD509
+salias IO_E20 IO_PAD507
+salias IO_F20 IO_PAD506
+salias IO_A21 IO_PAD505
+salias IO_B21 IO_PAD504
+salias IO_C21 IO_PAD503
+salias IO_C5 IO_PAD59
+salias IO_D21 IO_PAD501
+salias IO_A22 IO_PAD499
+salias IO_B22 IO_PAD498
+salias IO_C22 IO_PAD497
+salias IO_E21 IO_PAD496
+salias IO_F21 IO_PAD495
+salias IO_A23 IO_PAD493
+salias IO_B23 IO_PAD492
+salias IO_C23 IO_PAD491
+salias IO_D22 IO_PAD489
+salias M0_AE3 M0_PAD412
+salias M1_AC3 M1_PAD411
+salias M2_AF3 M2_PAD413
--- /dev/null
+#
+# $Id$
+#
+# JTAG package script for XC3S1000-FT256
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Arnim Laeuger <arniml@users.sourceforge.net>
+#
+
+salias CCLK_T15 CCLK_PAD349
+salias DONE_R14 DONE_PAD348
+salias HSWAP_EN_C4 HSWAP_EN_PAD70
+salias IO_A3 IO_PAD69
+salias IO_B14 IO_PAD488
+salias IO_B16 IO_PAD482
+salias IO_C16 IO_PAD481
+salias IO_C15 IO_PAD473
+salias IO_D14 IO_PAD471
+salias IO_D15 IO_PAD470
+salias IO_D16 IO_PAD469
+salias IO_E13 IO_PAD467
+salias IO_E14 IO_PAD465
+salias IO_E15 IO_PAD464
+salias IO_E16 IO_PAD463
+salias IO_F12 IO_PAD462
+salias IO_F13 IO_PAD461
+salias IO_F14 IO_PAD459
+salias IO_F15 IO_PAD457
+salias IO_G12 IO_PAD455
+salias IO_G13 IO_PAD453
+salias IO_G14 IO_PAD452
+salias IO_G15 IO_PAD451
+salias IO_G16 IO_PAD424
+salias IO_H13 IO_PAD423
+salias IO_H14 IO_PAD421
+salias IO_H15 IO_PAD419
+salias IO_H16 IO_PAD418
+salias IO_J16 IO_PAD417
+salias IO_K16 IO_PAD416
+salias IO_J14 IO_PAD414
+salias IO_J13 IO_PAD412
+salias IO_K15 IO_PAD411
+salias IO_K14 IO_PAD384
+salias IO_K13 IO_PAD383
+salias IO_K12 IO_PAD382
+salias IO_L12 IO_PAD380
+salias IO_L15 IO_PAD378
+salias IO_L14 IO_PAD376
+salias IO_L13 IO_PAD374
+salias IO_M13 IO_PAD373
+salias IO_M16 IO_PAD372
+salias IO_M15 IO_PAD371
+salias IO_M14 IO_PAD370
+salias IO_N14 IO_PAD368
+salias IO_N16 IO_PAD366
+salias IO_N15 IO_PAD365
+salias IO_P15 IO_PAD364
+salias IO_P14 IO_PAD362
+salias IO_P16 IO_PAD354
+salias IO_R16 IO_PAD353
+salias IO_P13 IO_PAD347
+salias IO_R13 IO_PAD346
+salias IO_T13 IO_PAD345
+salias IO_B4 IO_PAD68
+salias IO_T14 IO_PAD316
+salias IO_N12 IO_PAD314
+salias IO_P12 IO_PAD304
+salias IO_R12 IO_PAD302
+salias IO_T12 IO_PAD301
+salias IO_M11 IO_PAD300
+salias IO_N11 IO_PAD298
+salias IO_P11 IO_PAD296
+salias IO_R11 IO_PAD294
+salias IO_M10 IO_PAD291
+salias IO_N10 IO_PAD290
+salias IO_P10 IO_PAD288
+salias IO_R10 IO_PAD287
+salias IO_T10 IO_PAD286
+salias IO_N9 IO_PAD284
+salias IO_P9 IO_PAD282
+salias IO_R9 IO_PAD281
+salias IO_T9 IO_PAD280
+salias IO_T8 IO_PAD278
+salias IO_P8 IO_PAD277
+salias IO_N8 IO_PAD276
+salias IO_T7 IO_PAD274
+salias IO_R7 IO_PAD272
+salias IO_P7 IO_PAD271
+salias IO_N7 IO_PAD270
+salias IO_M7 IO_PAD268
+salias IO_R6 IO_PAD267
+salias IO_P6 IO_PAD266
+salias IO_N5 IO_PAD264
+salias IO_N6 IO_PAD262
+salias IO_M6 IO_PAD260
+salias IO_D5 IO_PAD36
+salias IO_R5 IO_PAD258
+salias IO_P5 IO_PAD257
+salias IO_T5 IO_PAD256
+salias IO_T4 IO_PAD236
+salias IO_R4 IO_PAD234
+salias IO_T3 IO_PAD211
+salias IO_R3 IO_PAD210
+salias IO_R1 IO_PAD204
+salias IO_P1 IO_PAD203
+salias IO_A4 IO_PAD67
+salias IO_P2 IO_PAD195
+salias IO_N3 IO_PAD193
+salias IO_N2 IO_PAD192
+salias IO_N1 IO_PAD191
+salias IO_M4 IO_PAD189
+salias IO_M3 IO_PAD187
+salias IO_M2 IO_PAD186
+salias IO_M1 IO_PAD185
+salias IO_L5 IO_PAD184
+salias IO_L4 IO_PAD183
+salias IO_L3 IO_PAD181
+salias IO_L2 IO_PAD179
+salias IO_K5 IO_PAD177
+salias IO_K4 IO_PAD175
+salias IO_K3 IO_PAD174
+salias IO_K2 IO_PAD173
+salias IO_C5 IO_PAD26
+salias IO_K1 IO_PAD146
+salias IO_J4 IO_PAD145
+salias IO_J3 IO_PAD143
+salias IO_J2 IO_PAD141
+salias IO_J1 IO_PAD140
+salias IO_H1 IO_PAD139
+salias IO_G1 IO_PAD138
+salias IO_H3 IO_PAD136
+salias IO_H4 IO_PAD134
+salias IO_G2 IO_PAD133
+salias IO_B5 IO_PAD24
+salias IO_A5 IO_PAD23
+salias IO_G3 IO_PAD106
+salias IO_E6 IO_PAD22
+salias IO_G4 IO_PAD105
+salias IO_G5 IO_PAD104
+salias IO_F5 IO_PAD102
+salias IO_F2 IO_PAD100
+salias IO_F3 IO_PAD98
+salias IO_F4 IO_PAD96
+salias IO_E4 IO_PAD95
+salias IO_E1 IO_PAD94
+salias IO_E2 IO_PAD93
+salias IO_E3 IO_PAD92
+salias IO_D6 IO_PAD20
+salias IO_D3 IO_PAD90
+salias IO_D1 IO_PAD88
+salias IO_D2 IO_PAD87
+salias IO_C2 IO_PAD86
+salias IO_C3 IO_PAD84
+salias IO_C6 IO_PAD18
+salias IO_C1 IO_PAD76
+salias IO_B1 IO_PAD75
+salias IO_B6 IO_PAD16
+salias IO_E7 IO_PAD13
+salias IO_D7 IO_PAD12
+salias IO_C7 IO_PAD10
+salias IO_B7 IO_PAD9
+salias IO_A7 IO_PAD8
+salias IO_D8 IO_PAD6
+salias IO_C8 IO_PAD4
+salias IO_B8 IO_PAD3
+salias IO_A8 IO_PAD2
+salias IO_A9 IO_PAD555
+salias IO_C9 IO_PAD554
+salias IO_D9 IO_PAD553
+salias IO_A10 IO_PAD551
+salias IO_B10 IO_PAD549
+salias IO_C10 IO_PAD548
+salias IO_D10 IO_PAD547
+salias IO_E10 IO_PAD545
+salias IO_B11 IO_PAD544
+salias IO_C11 IO_PAD543
+salias IO_D12 IO_PAD541
+salias IO_D11 IO_PAD539
+salias IO_E11 IO_PAD537
+salias IO_B12 IO_PAD535
+salias IO_C12 IO_PAD534
+salias IO_A12 IO_PAD533
+salias IO_A13 IO_PAD513
+salias IO_B13 IO_PAD511
+salias IO_A14 IO_PAD489
+salias M0_P3 M0_PAD412
+salias M1_T2 M1_PAD411
+salias M2_P4 M2_PAD413
--- /dev/null
+#
+# $Id: xc3s1000,v 1.1 2006/02/11 00:45:41 arnim Exp $
+#
+# JTAG declarations for XC3S1000
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Arnim Laeuger <arniml@users.sourceforge.net>
+#
+# Note:
+# The signals defined in this file are generic for any XC3S1000.
+# Signalnames according to Xilinx' package tables are set in the
+# package specific scripts.
+#
+
+signal CCLK_PAD349
+signal DONE_PAD348
+signal HSWAP_EN_PAD70
+signal IO_PAD10
+signal IO_PAD100
+signal IO_PAD102
+signal IO_PAD104
+signal IO_PAD105
+signal IO_PAD106
+signal IO_PAD108
+signal IO_PAD110
+signal IO_PAD111
+signal IO_PAD112
+signal IO_PAD113
+signal IO_PAD114
+signal IO_PAD115
+signal IO_PAD116
+signal IO_PAD117
+signal IO_PAD118
+signal IO_PAD119
+signal IO_PAD12
+signal IO_PAD120
+signal IO_PAD121
+signal IO_PAD122
+signal IO_PAD124
+signal IO_PAD126
+signal IO_PAD128
+signal IO_PAD13
+signal IO_PAD130
+signal IO_PAD132
+signal IO_PAD133
+signal IO_PAD134
+signal IO_PAD136
+signal IO_PAD138
+signal IO_PAD139
+signal IO_PAD14
+signal IO_PAD140
+signal IO_PAD141
+signal IO_PAD143
+signal IO_PAD145
+signal IO_PAD146
+signal IO_PAD147
+signal IO_PAD149
+signal IO_PAD151
+signal IO_PAD153
+signal IO_PAD155
+signal IO_PAD157
+signal IO_PAD158
+signal IO_PAD159
+signal IO_PAD16
+signal IO_PAD160
+signal IO_PAD161
+signal IO_PAD162
+signal IO_PAD163
+signal IO_PAD164
+signal IO_PAD165
+signal IO_PAD166
+signal IO_PAD167
+signal IO_PAD168
+signal IO_PAD169
+signal IO_PAD171
+signal IO_PAD173
+signal IO_PAD174
+signal IO_PAD175
+signal IO_PAD177
+signal IO_PAD179
+signal IO_PAD18
+signal IO_PAD181
+signal IO_PAD183
+signal IO_PAD184
+signal IO_PAD185
+signal IO_PAD186
+signal IO_PAD187
+signal IO_PAD189
+signal IO_PAD191
+signal IO_PAD192
+signal IO_PAD193
+signal IO_PAD195
+signal IO_PAD196
+signal IO_PAD197
+signal IO_PAD199
+signal IO_PAD2
+signal IO_PAD20
+signal IO_PAD200
+signal IO_PAD201
+signal IO_PAD202
+signal IO_PAD203
+signal IO_PAD204
+signal IO_PAD210
+signal IO_PAD211
+signal IO_PAD214
+signal IO_PAD215
+signal IO_PAD216
+signal IO_PAD218
+signal IO_PAD219
+signal IO_PAD22
+signal IO_PAD220
+signal IO_PAD221
+signal IO_PAD222
+signal IO_PAD224
+signal IO_PAD226
+signal IO_PAD227
+signal IO_PAD228
+signal IO_PAD229
+signal IO_PAD23
+signal IO_PAD230
+signal IO_PAD232
+signal IO_PAD234
+signal IO_PAD236
+signal IO_PAD238
+signal IO_PAD239
+signal IO_PAD24
+signal IO_PAD240
+signal IO_PAD241
+signal IO_PAD242
+signal IO_PAD243
+signal IO_PAD244
+signal IO_PAD245
+signal IO_PAD246
+signal IO_PAD248
+signal IO_PAD249
+signal IO_PAD250
+signal IO_PAD251
+signal IO_PAD252
+signal IO_PAD254
+signal IO_PAD256
+signal IO_PAD257
+signal IO_PAD258
+signal IO_PAD26
+signal IO_PAD260
+signal IO_PAD262
+signal IO_PAD264
+signal IO_PAD266
+signal IO_PAD267
+signal IO_PAD268
+signal IO_PAD270
+signal IO_PAD271
+signal IO_PAD272
+signal IO_PAD274
+signal IO_PAD276
+signal IO_PAD277
+signal IO_PAD278
+signal IO_PAD28
+signal IO_PAD280
+signal IO_PAD281
+signal IO_PAD282
+signal IO_PAD284
+signal IO_PAD286
+signal IO_PAD287
+signal IO_PAD288
+signal IO_PAD29
+signal IO_PAD290
+signal IO_PAD291
+signal IO_PAD292
+signal IO_PAD294
+signal IO_PAD296
+signal IO_PAD298
+signal IO_PAD3
+signal IO_PAD30
+signal IO_PAD300
+signal IO_PAD301
+signal IO_PAD302
+signal IO_PAD304
+signal IO_PAD306
+signal IO_PAD307
+signal IO_PAD308
+signal IO_PAD309
+signal IO_PAD31
+signal IO_PAD310
+signal IO_PAD312
+signal IO_PAD313
+signal IO_PAD314
+signal IO_PAD315
+signal IO_PAD316
+signal IO_PAD317
+signal IO_PAD318
+signal IO_PAD319
+signal IO_PAD32
+signal IO_PAD320
+signal IO_PAD322
+signal IO_PAD324
+signal IO_PAD326
+signal IO_PAD328
+signal IO_PAD329
+signal IO_PAD330
+signal IO_PAD331
+signal IO_PAD332
+signal IO_PAD334
+signal IO_PAD336
+signal IO_PAD337
+signal IO_PAD338
+signal IO_PAD339
+signal IO_PAD34
+signal IO_PAD340
+signal IO_PAD342
+signal IO_PAD343
+signal IO_PAD345
+signal IO_PAD346
+signal IO_PAD347
+signal IO_PAD35
+signal IO_PAD353
+signal IO_PAD354
+signal IO_PAD355
+signal IO_PAD356
+signal IO_PAD357
+signal IO_PAD358
+signal IO_PAD36
+signal IO_PAD360
+signal IO_PAD361
+signal IO_PAD362
+signal IO_PAD364
+signal IO_PAD365
+signal IO_PAD366
+signal IO_PAD368
+signal IO_PAD37
+signal IO_PAD370
+signal IO_PAD371
+signal IO_PAD372
+signal IO_PAD373
+signal IO_PAD374
+signal IO_PAD376
+signal IO_PAD378
+signal IO_PAD38
+signal IO_PAD380
+signal IO_PAD382
+signal IO_PAD383
+signal IO_PAD384
+signal IO_PAD386
+signal IO_PAD388
+signal IO_PAD389
+signal IO_PAD39
+signal IO_PAD390
+signal IO_PAD391
+signal IO_PAD392
+signal IO_PAD393
+signal IO_PAD394
+signal IO_PAD395
+signal IO_PAD396
+signal IO_PAD397
+signal IO_PAD398
+signal IO_PAD399
+signal IO_PAD4
+signal IO_PAD40
+signal IO_PAD400
+signal IO_PAD402
+signal IO_PAD404
+signal IO_PAD406
+signal IO_PAD408
+signal IO_PAD41
+signal IO_PAD410
+signal IO_PAD411
+signal IO_PAD412
+signal IO_PAD414
+signal IO_PAD416
+signal IO_PAD417
+signal IO_PAD418
+signal IO_PAD419
+signal IO_PAD42
+signal IO_PAD421
+signal IO_PAD423
+signal IO_PAD424
+signal IO_PAD425
+signal IO_PAD427
+signal IO_PAD429
+signal IO_PAD431
+signal IO_PAD433
+signal IO_PAD435
+signal IO_PAD436
+signal IO_PAD437
+signal IO_PAD438
+signal IO_PAD439
+signal IO_PAD44
+signal IO_PAD440
+signal IO_PAD441
+signal IO_PAD442
+signal IO_PAD443
+signal IO_PAD444
+signal IO_PAD445
+signal IO_PAD446
+signal IO_PAD447
+signal IO_PAD449
+signal IO_PAD451
+signal IO_PAD452
+signal IO_PAD453
+signal IO_PAD455
+signal IO_PAD457
+signal IO_PAD459
+signal IO_PAD46
+signal IO_PAD461
+signal IO_PAD462
+signal IO_PAD463
+signal IO_PAD464
+signal IO_PAD465
+signal IO_PAD467
+signal IO_PAD469
+signal IO_PAD470
+signal IO_PAD471
+signal IO_PAD473
+signal IO_PAD474
+signal IO_PAD475
+signal IO_PAD477
+signal IO_PAD478
+signal IO_PAD479
+signal IO_PAD48
+signal IO_PAD480
+signal IO_PAD481
+signal IO_PAD482
+signal IO_PAD488
+signal IO_PAD489
+signal IO_PAD491
+signal IO_PAD492
+signal IO_PAD493
+signal IO_PAD495
+signal IO_PAD496
+signal IO_PAD497
+signal IO_PAD498
+signal IO_PAD499
+signal IO_PAD50
+signal IO_PAD501
+signal IO_PAD503
+signal IO_PAD504
+signal IO_PAD505
+signal IO_PAD506
+signal IO_PAD507
+signal IO_PAD509
+signal IO_PAD51
+signal IO_PAD511
+signal IO_PAD513
+signal IO_PAD515
+signal IO_PAD516
+signal IO_PAD517
+signal IO_PAD518
+signal IO_PAD519
+signal IO_PAD52
+signal IO_PAD520
+signal IO_PAD521
+signal IO_PAD522
+signal IO_PAD523
+signal IO_PAD525
+signal IO_PAD526
+signal IO_PAD527
+signal IO_PAD528
+signal IO_PAD529
+signal IO_PAD53
+signal IO_PAD531
+signal IO_PAD533
+signal IO_PAD534
+signal IO_PAD535
+signal IO_PAD537
+signal IO_PAD539
+signal IO_PAD54
+signal IO_PAD541
+signal IO_PAD543
+signal IO_PAD544
+signal IO_PAD545
+signal IO_PAD547
+signal IO_PAD548
+signal IO_PAD549
+signal IO_PAD551
+signal IO_PAD553
+signal IO_PAD554
+signal IO_PAD555
+signal IO_PAD56
+signal IO_PAD58
+signal IO_PAD59
+signal IO_PAD6
+signal IO_PAD60
+signal IO_PAD61
+signal IO_PAD62
+signal IO_PAD64
+signal IO_PAD65
+signal IO_PAD67
+signal IO_PAD68
+signal IO_PAD69
+signal IO_PAD75
+signal IO_PAD76
+signal IO_PAD77
+signal IO_PAD78
+signal IO_PAD79
+signal IO_PAD8
+signal IO_PAD80
+signal IO_PAD82
+signal IO_PAD83
+signal IO_PAD84
+signal IO_PAD86
+signal IO_PAD87
+signal IO_PAD88
+signal IO_PAD9
+signal IO_PAD90
+signal IO_PAD92
+signal IO_PAD93
+signal IO_PAD94
+signal IO_PAD95
+signal IO_PAD96
+signal IO_PAD98
+signal M0_PAD412
+signal M1_PAD411
+signal M2_PAD413
+
+
+register BYPASS 1
+register BSR 1187
+register DEVICE_ID 32
+
+instruction length 6
+
+instruction IDCODE 001001 DEVICE_ID
+instruction SAMPLE/PRELOAD 000001 BSR
+instruction INTEST 000111 BSR
+instruction HIGHZ 001010 BYPASS
+instruction BYPASS 111111 BYPASS
+instruction USERCODE 001000 DEVICE_ID
+instruction EXTEST 000000 BSR
+
+bit 0 C 1 *
+bit 1 O ? IO_PAD488 0 1 Z
+bit 2 I ? IO_PAD488
+bit 3 C 1 *
+bit 4 O ? IO_PAD489 3 1 Z
+bit 5 I ? IO_PAD489
+bit 6 C 1 *
+bit 7 O ? IO_PAD491 6 1 Z
+bit 8 I ? IO_PAD491
+bit 9 C 1 *
+bit 10 O ? IO_PAD492 9 1 Z
+bit 11 I ? IO_PAD492
+bit 12 C 1 *
+bit 13 O ? IO_PAD493 12 1 Z
+bit 14 I ? IO_PAD493
+bit 15 C 1 *
+bit 16 O ? IO_PAD495 15 1 Z
+bit 17 I ? IO_PAD495
+bit 18 C 1 *
+bit 19 O ? IO_PAD496 18 1 Z
+bit 20 I ? IO_PAD496
+bit 21 C 1 *
+bit 22 O ? IO_PAD497 21 1 Z
+bit 23 I ? IO_PAD497
+bit 24 C 1 *
+bit 25 O ? IO_PAD498 24 1 Z
+bit 26 I ? IO_PAD498
+bit 27 C 1 *
+bit 28 O ? IO_PAD499 27 1 Z
+bit 29 I ? IO_PAD499
+bit 30 C 1 *
+bit 31 O ? IO_PAD501 30 1 Z
+bit 32 I ? IO_PAD501
+bit 33 C 1 *
+bit 34 O ? IO_PAD503 33 1 Z
+bit 35 I ? IO_PAD503
+bit 36 C 1 *
+bit 37 O ? IO_PAD504 36 1 Z
+bit 38 I ? IO_PAD504
+bit 39 C 1 *
+bit 40 O ? IO_PAD505 39 1 Z
+bit 41 I ? IO_PAD505
+bit 42 C 1 *
+bit 43 O ? IO_PAD506 42 1 Z
+bit 44 I ? IO_PAD506
+bit 45 C 1 *
+bit 46 O ? IO_PAD507 45 1 Z
+bit 47 I ? IO_PAD507
+bit 48 C 1 *
+bit 49 O ? IO_PAD509 48 1 Z
+bit 50 I ? IO_PAD509
+bit 51 C 1 *
+bit 52 O ? IO_PAD511 51 1 Z
+bit 53 I ? IO_PAD511
+bit 54 C 1 *
+bit 55 O ? IO_PAD513 54 1 Z
+bit 56 I ? IO_PAD513
+bit 57 C 1 *
+bit 58 O ? IO_PAD515 57 1 Z
+bit 59 I ? IO_PAD515
+bit 60 C 1 *
+bit 61 O ? IO_PAD516 60 1 Z
+bit 62 I ? IO_PAD516
+bit 63 C 1 *
+bit 64 O ? IO_PAD517 63 1 Z
+bit 65 I ? IO_PAD517
+bit 66 C 1 *
+bit 67 O ? IO_PAD518 66 1 Z
+bit 68 I ? IO_PAD518
+bit 69 C 1 *
+bit 70 O ? IO_PAD519 69 1 Z
+bit 71 I ? IO_PAD519
+bit 72 C 1 *
+bit 73 O ? IO_PAD520 72 1 Z
+bit 74 I ? IO_PAD520
+bit 75 C 1 *
+bit 76 O ? IO_PAD521 75 1 Z
+bit 77 I ? IO_PAD521
+bit 78 C 1 *
+bit 79 O ? IO_PAD522 78 1 Z
+bit 80 I ? IO_PAD522
+bit 81 C 1 *
+bit 82 O ? IO_PAD523 81 1 Z
+bit 83 I ? IO_PAD523
+bit 84 C 1 *
+bit 85 O ? IO_PAD525 84 1 Z
+bit 86 I ? IO_PAD525
+bit 87 C 1 *
+bit 88 O ? IO_PAD526 87 1 Z
+bit 89 I ? IO_PAD526
+bit 90 C 1 *
+bit 91 O ? IO_PAD527 90 1 Z
+bit 92 I ? IO_PAD527
+bit 93 C 1 *
+bit 94 O ? IO_PAD528 93 1 Z
+bit 95 I ? IO_PAD528
+bit 96 C 1 *
+bit 97 O ? IO_PAD529 96 1 Z
+bit 98 I ? IO_PAD529
+bit 99 C 1 *
+bit 100 O ? IO_PAD531 99 1 Z
+bit 101 I ? IO_PAD531
+bit 102 C 1 *
+bit 103 O ? IO_PAD533 102 1 Z
+bit 104 I ? IO_PAD533
+bit 105 C 1 *
+bit 106 O ? IO_PAD534 105 1 Z
+bit 107 I ? IO_PAD534
+bit 108 C 1 *
+bit 109 O ? IO_PAD535 108 1 Z
+bit 110 I ? IO_PAD535
+bit 111 C 1 *
+bit 112 O ? IO_PAD537 111 1 Z
+bit 113 I ? IO_PAD537
+bit 114 C 1 *
+bit 115 O ? IO_PAD539 114 1 Z
+bit 116 I ? IO_PAD539
+bit 117 C 1 *
+bit 118 O ? IO_PAD541 117 1 Z
+bit 119 I ? IO_PAD541
+bit 120 C 1 *
+bit 121 O ? IO_PAD543 120 1 Z
+bit 122 I ? IO_PAD543
+bit 123 C 1 *
+bit 124 O ? IO_PAD544 123 1 Z
+bit 125 I ? IO_PAD544
+bit 126 C 1 *
+bit 127 O ? IO_PAD545 126 1 Z
+bit 128 I ? IO_PAD545
+bit 129 C 1 *
+bit 130 O ? IO_PAD547 129 1 Z
+bit 131 I ? IO_PAD547
+bit 132 C 1 *
+bit 133 O ? IO_PAD548 132 1 Z
+bit 134 I ? IO_PAD548
+bit 135 C 1 *
+bit 136 O ? IO_PAD549 135 1 Z
+bit 137 I ? IO_PAD549
+bit 138 C 1 *
+bit 139 O ? IO_PAD551 138 1 Z
+bit 140 I ? IO_PAD551
+bit 141 C 1 *
+bit 142 O ? IO_PAD553 141 1 Z
+bit 143 I ? IO_PAD553
+bit 144 C 1 *
+bit 145 O ? IO_PAD554 144 1 Z
+bit 146 I ? IO_PAD554
+bit 147 C 1 *
+bit 148 O ? IO_PAD555 147 1 Z
+bit 149 I ? IO_PAD555
+bit 150 C 1 *
+bit 151 O ? IO_PAD2 150 1 Z
+bit 152 I ? IO_PAD2
+bit 153 C 1 *
+bit 154 O ? IO_PAD3 153 1 Z
+bit 155 I ? IO_PAD3
+bit 156 C 1 *
+bit 157 O ? IO_PAD4 156 1 Z
+bit 158 I ? IO_PAD4
+bit 159 C 1 *
+bit 160 O ? IO_PAD6 159 1 Z
+bit 161 I ? IO_PAD6
+bit 162 C 1 *
+bit 163 O ? IO_PAD8 162 1 Z
+bit 164 I ? IO_PAD8
+bit 165 C 1 *
+bit 166 O ? IO_PAD9 165 1 Z
+bit 167 I ? IO_PAD9
+bit 168 C 1 *
+bit 169 O ? IO_PAD10 168 1 Z
+bit 170 I ? IO_PAD10
+bit 171 C 1 *
+bit 172 O ? IO_PAD12 171 1 Z
+bit 173 I ? IO_PAD12
+bit 174 C 1 *
+bit 175 O ? IO_PAD13 174 1 Z
+bit 176 I ? IO_PAD13
+bit 177 C 1 *
+bit 178 O ? IO_PAD14 177 1 Z
+bit 179 I ? IO_PAD14
+bit 180 C 1 *
+bit 181 O ? IO_PAD16 180 1 Z
+bit 182 I ? IO_PAD16
+bit 183 C 1 *
+bit 184 O ? IO_PAD18 183 1 Z
+bit 185 I ? IO_PAD18
+bit 186 C 1 *
+bit 187 O ? IO_PAD20 186 1 Z
+bit 188 I ? IO_PAD20
+bit 189 C 1 *
+bit 190 O ? IO_PAD22 189 1 Z
+bit 191 I ? IO_PAD22
+bit 192 C 1 *
+bit 193 O ? IO_PAD23 192 1 Z
+bit 194 I ? IO_PAD23
+bit 195 C 1 *
+bit 196 O ? IO_PAD24 195 1 Z
+bit 197 I ? IO_PAD24
+bit 198 C 1 *
+bit 199 O ? IO_PAD26 198 1 Z
+bit 200 I ? IO_PAD26
+bit 201 C 1 *
+bit 202 O ? IO_PAD28 201 1 Z
+bit 203 I ? IO_PAD28
+bit 204 C 1 *
+bit 205 O ? IO_PAD29 204 1 Z
+bit 206 I ? IO_PAD29
+bit 207 C 1 *
+bit 208 O ? IO_PAD30 207 1 Z
+bit 209 I ? IO_PAD30
+bit 210 C 1 *
+bit 211 O ? IO_PAD31 210 1 Z
+bit 212 I ? IO_PAD31
+bit 213 C 1 *
+bit 214 O ? IO_PAD32 213 1 Z
+bit 215 I ? IO_PAD32
+bit 216 C 1 *
+bit 217 O ? IO_PAD34 216 1 Z
+bit 218 I ? IO_PAD34
+bit 219 C 1 *
+bit 220 O ? IO_PAD35 219 1 Z
+bit 221 I ? IO_PAD35
+bit 222 C 1 *
+bit 223 O ? IO_PAD36 222 1 Z
+bit 224 I ? IO_PAD36
+bit 225 C 1 *
+bit 226 O ? IO_PAD37 225 1 Z
+bit 227 I ? IO_PAD37
+bit 228 C 1 *
+bit 229 O ? IO_PAD38 228 1 Z
+bit 230 I ? IO_PAD38
+bit 231 C 1 *
+bit 232 O ? IO_PAD39 231 1 Z
+bit 233 I ? IO_PAD39
+bit 234 C 1 *
+bit 235 O ? IO_PAD40 234 1 Z
+bit 236 I ? IO_PAD40
+bit 237 C 1 *
+bit 238 O ? IO_PAD41 237 1 Z
+bit 239 I ? IO_PAD41
+bit 240 C 1 *
+bit 241 O ? IO_PAD42 240 1 Z
+bit 242 I ? IO_PAD42
+bit 243 C 1 *
+bit 244 O ? IO_PAD44 243 1 Z
+bit 245 I ? IO_PAD44
+bit 246 C 1 *
+bit 247 O ? IO_PAD46 246 1 Z
+bit 248 I ? IO_PAD46
+bit 249 C 1 *
+bit 250 O ? IO_PAD48 249 1 Z
+bit 251 I ? IO_PAD48
+bit 252 C 1 *
+bit 253 O ? IO_PAD50 252 1 Z
+bit 254 I ? IO_PAD50
+bit 255 C 1 *
+bit 256 O ? IO_PAD51 255 1 Z
+bit 257 I ? IO_PAD51
+bit 258 C 1 *
+bit 259 O ? IO_PAD52 258 1 Z
+bit 260 I ? IO_PAD52
+bit 261 C 1 *
+bit 262 O ? IO_PAD53 261 1 Z
+bit 263 I ? IO_PAD53
+bit 264 C 1 *
+bit 265 O ? IO_PAD54 264 1 Z
+bit 266 I ? IO_PAD54
+bit 267 C 1 *
+bit 268 O ? IO_PAD56 267 1 Z
+bit 269 I ? IO_PAD56
+bit 270 C 1 *
+bit 271 O ? IO_PAD58 270 1 Z
+bit 272 I ? IO_PAD58
+bit 273 C 1 *
+bit 274 O ? IO_PAD59 273 1 Z
+bit 275 I ? IO_PAD59
+bit 276 C 1 *
+bit 277 O ? IO_PAD60 276 1 Z
+bit 278 I ? IO_PAD60
+bit 279 C 1 *
+bit 280 O ? IO_PAD61 279 1 Z
+bit 281 I ? IO_PAD61
+bit 282 C 1 *
+bit 283 O ? IO_PAD62 282 1 Z
+bit 284 I ? IO_PAD62
+bit 285 C 1 *
+bit 286 O ? IO_PAD64 285 1 Z
+bit 287 I ? IO_PAD64
+bit 288 C 1 *
+bit 289 O ? IO_PAD65 288 1 Z
+bit 290 I ? IO_PAD65
+bit 291 C 1 *
+bit 292 O ? IO_PAD67 291 1 Z
+bit 293 I ? IO_PAD67
+bit 294 C 1 *
+bit 295 O ? IO_PAD68 294 1 Z
+bit 296 I ? IO_PAD68
+bit 297 C 1 *
+bit 298 O ? IO_PAD69 297 1 Z
+bit 299 I ? IO_PAD69
+bit 300 I ? HSWAP_EN_PAD70
+bit 301 X 1 *
+bit 302 C 1 *
+bit 303 O ? IO_PAD75 302 1 Z
+bit 304 I ? IO_PAD75
+bit 305 C 1 *
+bit 306 O ? IO_PAD76 305 1 Z
+bit 307 I ? IO_PAD76
+bit 308 C 1 *
+bit 309 O ? IO_PAD77 308 1 Z
+bit 310 I ? IO_PAD77
+bit 311 C 1 *
+bit 312 O ? IO_PAD78 311 1 Z
+bit 313 I ? IO_PAD78
+bit 314 C 1 *
+bit 315 O ? IO_PAD79 314 1 Z
+bit 316 I ? IO_PAD79
+bit 317 C 1 *
+bit 318 O ? IO_PAD80 317 1 Z
+bit 319 I ? IO_PAD80
+bit 320 C 1 *
+bit 321 O ? IO_PAD82 320 1 Z
+bit 322 I ? IO_PAD82
+bit 323 C 1 *
+bit 324 O ? IO_PAD83 323 1 Z
+bit 325 I ? IO_PAD83
+bit 326 C 1 *
+bit 327 O ? IO_PAD84 326 1 Z
+bit 328 I ? IO_PAD84
+bit 329 C 1 *
+bit 330 O ? IO_PAD86 329 1 Z
+bit 331 I ? IO_PAD86
+bit 332 C 1 *
+bit 333 O ? IO_PAD87 332 1 Z
+bit 334 I ? IO_PAD87
+bit 335 C 1 *
+bit 336 O ? IO_PAD88 335 1 Z
+bit 337 I ? IO_PAD88
+bit 338 C 1 *
+bit 339 O ? IO_PAD90 338 1 Z
+bit 340 I ? IO_PAD90
+bit 341 C 1 *
+bit 342 O ? IO_PAD92 341 1 Z
+bit 343 I ? IO_PAD92
+bit 344 C 1 *
+bit 345 O ? IO_PAD93 344 1 Z
+bit 346 I ? IO_PAD93
+bit 347 C 1 *
+bit 348 O ? IO_PAD94 347 1 Z
+bit 349 I ? IO_PAD94
+bit 350 C 1 *
+bit 351 O ? IO_PAD95 350 1 Z
+bit 352 I ? IO_PAD95
+bit 353 C 1 *
+bit 354 O ? IO_PAD96 353 1 Z
+bit 355 I ? IO_PAD96
+bit 356 C 1 *
+bit 357 O ? IO_PAD98 356 1 Z
+bit 358 I ? IO_PAD98
+bit 359 C 1 *
+bit 360 O ? IO_PAD100 359 1 Z
+bit 361 I ? IO_PAD100
+bit 362 C 1 *
+bit 363 O ? IO_PAD102 362 1 Z
+bit 364 I ? IO_PAD102
+bit 365 C 1 *
+bit 366 O ? IO_PAD104 365 1 Z
+bit 367 I ? IO_PAD104
+bit 368 C 1 *
+bit 369 O ? IO_PAD105 368 1 Z
+bit 370 I ? IO_PAD105
+bit 371 C 1 *
+bit 372 O ? IO_PAD106 371 1 Z
+bit 373 I ? IO_PAD106
+bit 374 C 1 *
+bit 375 O ? IO_PAD108 374 1 Z
+bit 376 I ? IO_PAD108
+bit 377 C 1 *
+bit 378 O ? IO_PAD110 377 1 Z
+bit 379 I ? IO_PAD110
+bit 380 C 1 *
+bit 381 O ? IO_PAD111 380 1 Z
+bit 382 I ? IO_PAD111
+bit 383 C 1 *
+bit 384 O ? IO_PAD112 383 1 Z
+bit 385 I ? IO_PAD112
+bit 386 C 1 *
+bit 387 O ? IO_PAD113 386 1 Z
+bit 388 I ? IO_PAD113
+bit 389 C 1 *
+bit 390 O ? IO_PAD114 389 1 Z
+bit 391 I ? IO_PAD114
+bit 392 C 1 *
+bit 393 O ? IO_PAD115 392 1 Z
+bit 394 I ? IO_PAD115
+bit 395 C 1 *
+bit 396 O ? IO_PAD116 395 1 Z
+bit 397 I ? IO_PAD116
+bit 398 C 1 *
+bit 399 O ? IO_PAD117 398 1 Z
+bit 400 I ? IO_PAD117
+bit 401 C 1 *
+bit 402 O ? IO_PAD118 401 1 Z
+bit 403 I ? IO_PAD118
+bit 404 C 1 *
+bit 405 O ? IO_PAD119 404 1 Z
+bit 406 I ? IO_PAD119
+bit 407 C 1 *
+bit 408 O ? IO_PAD120 407 1 Z
+bit 409 I ? IO_PAD120
+bit 410 C 1 *
+bit 411 O ? IO_PAD121 410 1 Z
+bit 412 I ? IO_PAD121
+bit 413 C 1 *
+bit 414 O ? IO_PAD122 413 1 Z
+bit 415 I ? IO_PAD122
+bit 416 C 1 *
+bit 417 O ? IO_PAD124 416 1 Z
+bit 418 I ? IO_PAD124
+bit 419 C 1 *
+bit 420 O ? IO_PAD126 419 1 Z
+bit 421 I ? IO_PAD126
+bit 422 C 1 *
+bit 423 O ? IO_PAD128 422 1 Z
+bit 424 I ? IO_PAD128
+bit 425 C 1 *
+bit 426 O ? IO_PAD130 425 1 Z
+bit 427 I ? IO_PAD130
+bit 428 C 1 *
+bit 429 O ? IO_PAD132 428 1 Z
+bit 430 I ? IO_PAD132
+bit 431 C 1 *
+bit 432 O ? IO_PAD133 431 1 Z
+bit 433 I ? IO_PAD133
+bit 434 C 1 *
+bit 435 O ? IO_PAD134 434 1 Z
+bit 436 I ? IO_PAD134
+bit 437 C 1 *
+bit 438 O ? IO_PAD136 437 1 Z
+bit 439 I ? IO_PAD136
+bit 440 C 1 *
+bit 441 O ? IO_PAD138 440 1 Z
+bit 442 I ? IO_PAD138
+bit 443 C 1 *
+bit 444 O ? IO_PAD139 443 1 Z
+bit 445 I ? IO_PAD139
+bit 446 C 1 *
+bit 447 O ? IO_PAD140 446 1 Z
+bit 448 I ? IO_PAD140
+bit 449 C 1 *
+bit 450 O ? IO_PAD141 449 1 Z
+bit 451 I ? IO_PAD141
+bit 452 C 1 *
+bit 453 O ? IO_PAD143 452 1 Z
+bit 454 I ? IO_PAD143
+bit 455 C 1 *
+bit 456 O ? IO_PAD145 455 1 Z
+bit 457 I ? IO_PAD145
+bit 458 C 1 *
+bit 459 O ? IO_PAD146 458 1 Z
+bit 460 I ? IO_PAD146
+bit 461 C 1 *
+bit 462 O ? IO_PAD147 461 1 Z
+bit 463 I ? IO_PAD147
+bit 464 C 1 *
+bit 465 O ? IO_PAD149 464 1 Z
+bit 466 I ? IO_PAD149
+bit 467 C 1 *
+bit 468 O ? IO_PAD151 467 1 Z
+bit 469 I ? IO_PAD151
+bit 470 C 1 *
+bit 471 O ? IO_PAD153 470 1 Z
+bit 472 I ? IO_PAD153
+bit 473 C 1 *
+bit 474 O ? IO_PAD155 473 1 Z
+bit 475 I ? IO_PAD155
+bit 476 C 1 *
+bit 477 O ? IO_PAD157 476 1 Z
+bit 478 I ? IO_PAD157
+bit 479 C 1 *
+bit 480 O ? IO_PAD158 479 1 Z
+bit 481 I ? IO_PAD158
+bit 482 C 1 *
+bit 483 O ? IO_PAD159 482 1 Z
+bit 484 I ? IO_PAD159
+bit 485 C 1 *
+bit 486 O ? IO_PAD160 485 1 Z
+bit 487 I ? IO_PAD160
+bit 488 C 1 *
+bit 489 O ? IO_PAD161 488 1 Z
+bit 490 I ? IO_PAD161
+bit 491 C 1 *
+bit 492 O ? IO_PAD162 491 1 Z
+bit 493 I ? IO_PAD162
+bit 494 C 1 *
+bit 495 O ? IO_PAD163 494 1 Z
+bit 496 I ? IO_PAD163
+bit 497 C 1 *
+bit 498 O ? IO_PAD164 497 1 Z
+bit 499 I ? IO_PAD164
+bit 500 C 1 *
+bit 501 O ? IO_PAD165 500 1 Z
+bit 502 I ? IO_PAD165
+bit 503 C 1 *
+bit 504 O ? IO_PAD166 503 1 Z
+bit 505 I ? IO_PAD166
+bit 506 C 1 *
+bit 507 O ? IO_PAD167 506 1 Z
+bit 508 I ? IO_PAD167
+bit 509 C 1 *
+bit 510 O ? IO_PAD168 509 1 Z
+bit 511 I ? IO_PAD168
+bit 512 C 1 *
+bit 513 O ? IO_PAD169 512 1 Z
+bit 514 I ? IO_PAD169
+bit 515 C 1 *
+bit 516 O ? IO_PAD171 515 1 Z
+bit 517 I ? IO_PAD171
+bit 518 C 1 *
+bit 519 O ? IO_PAD173 518 1 Z
+bit 520 I ? IO_PAD173
+bit 521 C 1 *
+bit 522 O ? IO_PAD174 521 1 Z
+bit 523 I ? IO_PAD174
+bit 524 C 1 *
+bit 525 O ? IO_PAD175 524 1 Z
+bit 526 I ? IO_PAD175
+bit 527 C 1 *
+bit 528 O ? IO_PAD177 527 1 Z
+bit 529 I ? IO_PAD177
+bit 530 C 1 *
+bit 531 O ? IO_PAD179 530 1 Z
+bit 532 I ? IO_PAD179
+bit 533 C 1 *
+bit 534 O ? IO_PAD181 533 1 Z
+bit 535 I ? IO_PAD181
+bit 536 C 1 *
+bit 537 O ? IO_PAD183 536 1 Z
+bit 538 I ? IO_PAD183
+bit 539 C 1 *
+bit 540 O ? IO_PAD184 539 1 Z
+bit 541 I ? IO_PAD184
+bit 542 C 1 *
+bit 543 O ? IO_PAD185 542 1 Z
+bit 544 I ? IO_PAD185
+bit 545 C 1 *
+bit 546 O ? IO_PAD186 545 1 Z
+bit 547 I ? IO_PAD186
+bit 548 C 1 *
+bit 549 O ? IO_PAD187 548 1 Z
+bit 550 I ? IO_PAD187
+bit 551 C 1 *
+bit 552 O ? IO_PAD189 551 1 Z
+bit 553 I ? IO_PAD189
+bit 554 C 1 *
+bit 555 O ? IO_PAD191 554 1 Z
+bit 556 I ? IO_PAD191
+bit 557 C 1 *
+bit 558 O ? IO_PAD192 557 1 Z
+bit 559 I ? IO_PAD192
+bit 560 C 1 *
+bit 561 O ? IO_PAD193 560 1 Z
+bit 562 I ? IO_PAD193
+bit 563 C 1 *
+bit 564 O ? IO_PAD195 563 1 Z
+bit 565 I ? IO_PAD195
+bit 566 C 1 *
+bit 567 O ? IO_PAD196 566 1 Z
+bit 568 I ? IO_PAD196
+bit 569 C 1 *
+bit 570 O ? IO_PAD197 569 1 Z
+bit 571 I ? IO_PAD197
+bit 572 C 1 *
+bit 573 O ? IO_PAD199 572 1 Z
+bit 574 I ? IO_PAD199
+bit 575 C 1 *
+bit 576 O ? IO_PAD200 575 1 Z
+bit 577 I ? IO_PAD200
+bit 578 C 1 *
+bit 579 O ? IO_PAD201 578 1 Z
+bit 580 I ? IO_PAD201
+bit 581 C 1 *
+bit 582 O ? IO_PAD202 581 1 Z
+bit 583 I ? IO_PAD202
+bit 584 C 1 *
+bit 585 O ? IO_PAD203 584 1 Z
+bit 586 I ? IO_PAD203
+bit 587 C 1 *
+bit 588 O ? IO_PAD204 587 1 Z
+bit 589 I ? IO_PAD204
+bit 590 I ? M1_PAD207
+bit 591 I ? M0_PAD208
+bit 592 I ? M2_PAD209
+bit 593 C 1 *
+bit 594 O ? IO_PAD210 593 1 Z
+bit 595 I ? IO_PAD210
+bit 596 C 1 *
+bit 597 O ? IO_PAD211 596 1 Z
+bit 598 I ? IO_PAD211
+bit 599 C 1 *
+bit 600 O ? IO_PAD214 599 1 Z
+bit 601 I ? IO_PAD214
+bit 602 C 1 *
+bit 603 O ? IO_PAD215 602 1 Z
+bit 604 I ? IO_PAD215
+bit 605 C 1 *
+bit 606 O ? IO_PAD216 605 1 Z
+bit 607 I ? IO_PAD216
+bit 608 C 1 *
+bit 609 O ? IO_PAD218 608 1 Z
+bit 610 I ? IO_PAD218
+bit 611 C 1 *
+bit 612 O ? IO_PAD219 611 1 Z
+bit 613 I ? IO_PAD219
+bit 614 C 1 *
+bit 615 O ? IO_PAD220 614 1 Z
+bit 616 I ? IO_PAD220
+bit 617 C 1 *
+bit 618 O ? IO_PAD221 617 1 Z
+bit 619 I ? IO_PAD221
+bit 620 C 1 *
+bit 621 O ? IO_PAD222 620 1 Z
+bit 622 I ? IO_PAD222
+bit 623 C 1 *
+bit 624 O ? IO_PAD224 623 1 Z
+bit 625 I ? IO_PAD224
+bit 626 C 1 *
+bit 627 O ? IO_PAD226 626 1 Z
+bit 628 I ? IO_PAD226
+bit 629 C 1 *
+bit 630 O ? IO_PAD227 629 1 Z
+bit 631 I ? IO_PAD227
+bit 632 C 1 *
+bit 633 O ? IO_PAD228 632 1 Z
+bit 634 I ? IO_PAD228
+bit 635 C 1 *
+bit 636 O ? IO_PAD229 635 1 Z
+bit 637 I ? IO_PAD229
+bit 638 C 1 *
+bit 639 O ? IO_PAD230 638 1 Z
+bit 640 I ? IO_PAD230
+bit 641 C 1 *
+bit 642 O ? IO_PAD232 641 1 Z
+bit 643 I ? IO_PAD232
+bit 644 C 1 *
+bit 645 O ? IO_PAD234 644 1 Z
+bit 646 I ? IO_PAD234
+bit 647 C 1 *
+bit 648 O ? IO_PAD236 647 1 Z
+bit 649 I ? IO_PAD236
+bit 650 C 1 *
+bit 651 O ? IO_PAD238 650 1 Z
+bit 652 I ? IO_PAD238
+bit 653 C 1 *
+bit 654 O ? IO_PAD239 653 1 Z
+bit 655 I ? IO_PAD239
+bit 656 C 1 *
+bit 657 O ? IO_PAD240 656 1 Z
+bit 658 I ? IO_PAD240
+bit 659 C 1 *
+bit 660 O ? IO_PAD241 659 1 Z
+bit 661 I ? IO_PAD241
+bit 662 C 1 *
+bit 663 O ? IO_PAD242 662 1 Z
+bit 664 I ? IO_PAD242
+bit 665 C 1 *
+bit 666 O ? IO_PAD243 665 1 Z
+bit 667 I ? IO_PAD243
+bit 668 C 1 *
+bit 669 O ? IO_PAD244 668 1 Z
+bit 670 I ? IO_PAD244
+bit 671 C 1 *
+bit 672 O ? IO_PAD245 671 1 Z
+bit 673 I ? IO_PAD245
+bit 674 C 1 *
+bit 675 O ? IO_PAD246 674 1 Z
+bit 676 I ? IO_PAD246
+bit 677 C 1 *
+bit 678 O ? IO_PAD248 677 1 Z
+bit 679 I ? IO_PAD248
+bit 680 C 1 *
+bit 681 O ? IO_PAD249 680 1 Z
+bit 682 I ? IO_PAD249
+bit 683 C 1 *
+bit 684 O ? IO_PAD250 683 1 Z
+bit 685 I ? IO_PAD250
+bit 686 C 1 *
+bit 687 O ? IO_PAD251 686 1 Z
+bit 688 I ? IO_PAD251
+bit 689 C 1 *
+bit 690 O ? IO_PAD252 689 1 Z
+bit 691 I ? IO_PAD252
+bit 692 C 1 *
+bit 693 O ? IO_PAD254 692 1 Z
+bit 694 I ? IO_PAD254
+bit 695 C 1 *
+bit 696 O ? IO_PAD256 695 1 Z
+bit 697 I ? IO_PAD256
+bit 698 C 1 *
+bit 699 O ? IO_PAD257 698 1 Z
+bit 700 I ? IO_PAD257
+bit 701 C 1 *
+bit 702 O ? IO_PAD258 701 1 Z
+bit 703 I ? IO_PAD258
+bit 704 C 1 *
+bit 705 O ? IO_PAD260 704 1 Z
+bit 706 I ? IO_PAD260
+bit 707 C 1 *
+bit 708 O ? IO_PAD262 707 1 Z
+bit 709 I ? IO_PAD262
+bit 710 C 1 *
+bit 711 O ? IO_PAD264 710 1 Z
+bit 712 I ? IO_PAD264
+bit 713 C 1 *
+bit 714 O ? IO_PAD266 713 1 Z
+bit 715 I ? IO_PAD266
+bit 716 C 1 *
+bit 717 O ? IO_PAD267 716 1 Z
+bit 718 I ? IO_PAD267
+bit 719 C 1 *
+bit 720 O ? IO_PAD268 719 1 Z
+bit 721 I ? IO_PAD268
+bit 722 C 1 *
+bit 723 O ? IO_PAD270 722 1 Z
+bit 724 I ? IO_PAD270
+bit 725 C 1 *
+bit 726 O ? IO_PAD271 725 1 Z
+bit 727 I ? IO_PAD271
+bit 728 C 1 *
+bit 729 O ? IO_PAD272 728 1 Z
+bit 730 I ? IO_PAD272
+bit 731 C 1 *
+bit 732 O ? IO_PAD274 731 1 Z
+bit 733 I ? IO_PAD274
+bit 734 C 1 *
+bit 735 O ? IO_PAD276 734 1 Z
+bit 736 I ? IO_PAD276
+bit 737 C 1 *
+bit 738 O ? IO_PAD277 737 1 Z
+bit 739 I ? IO_PAD277
+bit 740 C 1 *
+bit 741 O ? IO_PAD278 740 1 Z
+bit 742 I ? IO_PAD278
+bit 743 C 1 *
+bit 744 O ? IO_PAD280 743 1 Z
+bit 745 I ? IO_PAD280
+bit 746 C 1 *
+bit 747 O ? IO_PAD281 746 1 Z
+bit 748 I ? IO_PAD281
+bit 749 C 1 *
+bit 750 O ? IO_PAD282 749 1 Z
+bit 751 I ? IO_PAD282
+bit 752 C 1 *
+bit 753 O ? IO_PAD284 752 1 Z
+bit 754 I ? IO_PAD284
+bit 755 C 1 *
+bit 756 O ? IO_PAD286 755 1 Z
+bit 757 I ? IO_PAD286
+bit 758 C 1 *
+bit 759 O ? IO_PAD287 758 1 Z
+bit 760 I ? IO_PAD287
+bit 761 C 1 *
+bit 762 O ? IO_PAD288 761 1 Z
+bit 763 I ? IO_PAD288
+bit 764 C 1 *
+bit 765 O ? IO_PAD290 764 1 Z
+bit 766 I ? IO_PAD290
+bit 767 C 1 *
+bit 768 O ? IO_PAD291 767 1 Z
+bit 769 I ? IO_PAD291
+bit 770 C 1 *
+bit 771 O ? IO_PAD292 770 1 Z
+bit 772 I ? IO_PAD292
+bit 773 C 1 *
+bit 774 O ? IO_PAD294 773 1 Z
+bit 775 I ? IO_PAD294
+bit 776 C 1 *
+bit 777 O ? IO_PAD296 776 1 Z
+bit 778 I ? IO_PAD296
+bit 779 C 1 *
+bit 780 O ? IO_PAD298 779 1 Z
+bit 781 I ? IO_PAD298
+bit 782 C 1 *
+bit 783 O ? IO_PAD300 782 1 Z
+bit 784 I ? IO_PAD300
+bit 785 C 1 *
+bit 786 O ? IO_PAD301 785 1 Z
+bit 787 I ? IO_PAD301
+bit 788 C 1 *
+bit 789 O ? IO_PAD302 788 1 Z
+bit 790 I ? IO_PAD302
+bit 791 C 1 *
+bit 792 O ? IO_PAD304 791 1 Z
+bit 793 I ? IO_PAD304
+bit 794 C 1 *
+bit 795 O ? IO_PAD306 794 1 Z
+bit 796 I ? IO_PAD306
+bit 797 C 1 *
+bit 798 O ? IO_PAD307 797 1 Z
+bit 799 I ? IO_PAD307
+bit 800 C 1 *
+bit 801 O ? IO_PAD308 800 1 Z
+bit 802 I ? IO_PAD308
+bit 803 C 1 *
+bit 804 O ? IO_PAD309 803 1 Z
+bit 805 I ? IO_PAD309
+bit 806 C 1 *
+bit 807 O ? IO_PAD310 806 1 Z
+bit 808 I ? IO_PAD310
+bit 809 C 1 *
+bit 810 O ? IO_PAD312 809 1 Z
+bit 811 I ? IO_PAD312
+bit 812 C 1 *
+bit 813 O ? IO_PAD313 812 1 Z
+bit 814 I ? IO_PAD313
+bit 815 C 1 *
+bit 816 O ? IO_PAD314 815 1 Z
+bit 817 I ? IO_PAD314
+bit 818 C 1 *
+bit 819 O ? IO_PAD315 818 1 Z
+bit 820 I ? IO_PAD315
+bit 821 C 1 *
+bit 822 O ? IO_PAD316 821 1 Z
+bit 823 I ? IO_PAD316
+bit 824 C 1 *
+bit 825 O ? IO_PAD317 824 1 Z
+bit 826 I ? IO_PAD317
+bit 827 C 1 *
+bit 828 O ? IO_PAD318 827 1 Z
+bit 829 I ? IO_PAD318
+bit 830 C 1 *
+bit 831 O ? IO_PAD319 830 1 Z
+bit 832 I ? IO_PAD319
+bit 833 C 1 *
+bit 834 O ? IO_PAD320 833 1 Z
+bit 835 I ? IO_PAD320
+bit 836 C 1 *
+bit 837 O ? IO_PAD322 836 1 Z
+bit 838 I ? IO_PAD322
+bit 839 C 1 *
+bit 840 O ? IO_PAD324 839 1 Z
+bit 841 I ? IO_PAD324
+bit 842 C 1 *
+bit 843 O ? IO_PAD326 842 1 Z
+bit 844 I ? IO_PAD326
+bit 845 C 1 *
+bit 846 O ? IO_PAD328 845 1 Z
+bit 847 I ? IO_PAD328
+bit 848 C 1 *
+bit 849 O ? IO_PAD329 848 1 Z
+bit 850 I ? IO_PAD329
+bit 851 C 1 *
+bit 852 O ? IO_PAD330 851 1 Z
+bit 853 I ? IO_PAD330
+bit 854 C 1 *
+bit 855 O ? IO_PAD331 854 1 Z
+bit 856 I ? IO_PAD331
+bit 857 C 1 *
+bit 858 O ? IO_PAD332 857 1 Z
+bit 859 I ? IO_PAD332
+bit 860 C 1 *
+bit 861 O ? IO_PAD334 860 1 Z
+bit 862 I ? IO_PAD334
+bit 863 C 1 *
+bit 864 O ? IO_PAD336 863 1 Z
+bit 865 I ? IO_PAD336
+bit 866 C 1 *
+bit 867 O ? IO_PAD337 866 1 Z
+bit 868 I ? IO_PAD337
+bit 869 C 1 *
+bit 870 O ? IO_PAD338 869 1 Z
+bit 871 I ? IO_PAD338
+bit 872 C 1 *
+bit 873 O ? IO_PAD339 872 1 Z
+bit 874 I ? IO_PAD339
+bit 875 C 1 *
+bit 876 O ? IO_PAD340 875 1 Z
+bit 877 I ? IO_PAD340
+bit 878 C 1 *
+bit 879 O ? IO_PAD342 878 1 Z
+bit 880 I ? IO_PAD342
+bit 881 C 1 *
+bit 882 O ? IO_PAD343 881 1 Z
+bit 883 I ? IO_PAD343
+bit 884 C 1 *
+bit 885 O ? IO_PAD345 884 1 Z
+bit 886 I ? IO_PAD345
+bit 887 C 1 *
+bit 888 O ? IO_PAD346 887 1 Z
+bit 889 I ? IO_PAD346
+bit 890 C 1 *
+bit 891 O ? IO_PAD347 890 1 Z
+bit 892 I ? IO_PAD347
+bit 893 C 1 *
+bit 894 O ? DONE_PAD348 893 1 Z
+bit 895 I ? DONE_PAD348
+bit 896 C 1 *
+bit 897 O ? CCLK_PAD349 896 1 Z
+bit 898 I ? CCLK_PAD349
+bit 899 C 1 *
+bit 900 O ? IO_PAD353 899 1 Z
+bit 901 I ? IO_PAD353
+bit 902 C 1 *
+bit 903 O ? IO_PAD354 902 1 Z
+bit 904 I ? IO_PAD354
+bit 905 C 1 *
+bit 906 O ? IO_PAD355 905 1 Z
+bit 907 I ? IO_PAD355
+bit 908 C 1 *
+bit 909 O ? IO_PAD356 908 1 Z
+bit 910 I ? IO_PAD356
+bit 911 C 1 *
+bit 912 O ? IO_PAD357 911 1 Z
+bit 913 I ? IO_PAD357
+bit 914 C 1 *
+bit 915 O ? IO_PAD358 914 1 Z
+bit 916 I ? IO_PAD358
+bit 917 C 1 *
+bit 918 O ? IO_PAD360 917 1 Z
+bit 919 I ? IO_PAD360
+bit 920 C 1 *
+bit 921 O ? IO_PAD361 920 1 Z
+bit 922 I ? IO_PAD361
+bit 923 C 1 *
+bit 924 O ? IO_PAD362 923 1 Z
+bit 925 I ? IO_PAD362
+bit 926 C 1 *
+bit 927 O ? IO_PAD364 926 1 Z
+bit 928 I ? IO_PAD364
+bit 929 C 1 *
+bit 930 O ? IO_PAD365 929 1 Z
+bit 931 I ? IO_PAD365
+bit 932 C 1 *
+bit 933 O ? IO_PAD366 932 1 Z
+bit 934 I ? IO_PAD366
+bit 935 C 1 *
+bit 936 O ? IO_PAD368 935 1 Z
+bit 937 I ? IO_PAD368
+bit 938 C 1 *
+bit 939 O ? IO_PAD370 938 1 Z
+bit 940 I ? IO_PAD370
+bit 941 C 1 *
+bit 942 O ? IO_PAD371 941 1 Z
+bit 943 I ? IO_PAD371
+bit 944 C 1 *
+bit 945 O ? IO_PAD372 944 1 Z
+bit 946 I ? IO_PAD372
+bit 947 C 1 *
+bit 948 O ? IO_PAD373 947 1 Z
+bit 949 I ? IO_PAD373
+bit 950 C 1 *
+bit 951 O ? IO_PAD374 950 1 Z
+bit 952 I ? IO_PAD374
+bit 953 C 1 *
+bit 954 O ? IO_PAD376 953 1 Z
+bit 955 I ? IO_PAD376
+bit 956 C 1 *
+bit 957 O ? IO_PAD378 956 1 Z
+bit 958 I ? IO_PAD378
+bit 959 C 1 *
+bit 960 O ? IO_PAD380 959 1 Z
+bit 961 I ? IO_PAD380
+bit 962 C 1 *
+bit 963 O ? IO_PAD382 962 1 Z
+bit 964 I ? IO_PAD382
+bit 965 C 1 *
+bit 966 O ? IO_PAD383 965 1 Z
+bit 967 I ? IO_PAD383
+bit 968 C 1 *
+bit 969 O ? IO_PAD384 968 1 Z
+bit 970 I ? IO_PAD384
+bit 971 C 1 *
+bit 972 O ? IO_PAD386 971 1 Z
+bit 973 I ? IO_PAD386
+bit 974 C 1 *
+bit 975 O ? IO_PAD388 974 1 Z
+bit 976 I ? IO_PAD388
+bit 977 C 1 *
+bit 978 O ? IO_PAD389 977 1 Z
+bit 979 I ? IO_PAD389
+bit 980 C 1 *
+bit 981 O ? IO_PAD390 980 1 Z
+bit 982 I ? IO_PAD390
+bit 983 C 1 *
+bit 984 O ? IO_PAD391 983 1 Z
+bit 985 I ? IO_PAD391
+bit 986 C 1 *
+bit 987 O ? IO_PAD392 986 1 Z
+bit 988 I ? IO_PAD392
+bit 989 C 1 *
+bit 990 O ? IO_PAD393 989 1 Z
+bit 991 I ? IO_PAD393
+bit 992 C 1 *
+bit 993 O ? IO_PAD394 992 1 Z
+bit 994 I ? IO_PAD394
+bit 995 C 1 *
+bit 996 O ? IO_PAD395 995 1 Z
+bit 997 I ? IO_PAD395
+bit 998 C 1 *
+bit 999 O ? IO_PAD396 998 1 Z
+bit 1000 I ? IO_PAD396
+bit 1001 C 1 *
+bit 1002 O ? IO_PAD397 1001 1 Z
+bit 1003 I ? IO_PAD397
+bit 1004 C 1 *
+bit 1005 O ? IO_PAD398 1004 1 Z
+bit 1006 I ? IO_PAD398
+bit 1007 C 1 *
+bit 1008 O ? IO_PAD399 1007 1 Z
+bit 1009 I ? IO_PAD399
+bit 1010 C 1 *
+bit 1011 O ? IO_PAD400 1010 1 Z
+bit 1012 I ? IO_PAD400
+bit 1013 C 1 *
+bit 1014 O ? IO_PAD402 1013 1 Z
+bit 1015 I ? IO_PAD402
+bit 1016 C 1 *
+bit 1017 O ? IO_PAD404 1016 1 Z
+bit 1018 I ? IO_PAD404
+bit 1019 C 1 *
+bit 1020 O ? IO_PAD406 1019 1 Z
+bit 1021 I ? IO_PAD406
+bit 1022 C 1 *
+bit 1023 O ? IO_PAD408 1022 1 Z
+bit 1024 I ? IO_PAD408
+bit 1025 C 1 *
+bit 1026 O ? IO_PAD410 1025 1 Z
+bit 1027 I ? IO_PAD410
+bit 1028 C 1 *
+bit 1029 O ? IO_PAD411 1028 1 Z
+bit 1030 I ? IO_PAD411
+bit 1031 C 1 *
+bit 1032 O ? IO_PAD412 1031 1 Z
+bit 1033 I ? IO_PAD412
+bit 1034 C 1 *
+bit 1035 O ? IO_PAD414 1034 1 Z
+bit 1036 I ? IO_PAD414
+bit 1037 C 1 *
+bit 1038 O ? IO_PAD416 1037 1 Z
+bit 1039 I ? IO_PAD416
+bit 1040 C 1 *
+bit 1041 O ? IO_PAD417 1040 1 Z
+bit 1042 I ? IO_PAD417
+bit 1043 C 1 *
+bit 1044 O ? IO_PAD418 1043 1 Z
+bit 1045 I ? IO_PAD418
+bit 1046 C 1 *
+bit 1047 O ? IO_PAD419 1046 1 Z
+bit 1048 I ? IO_PAD419
+bit 1049 C 1 *
+bit 1050 O ? IO_PAD421 1049 1 Z
+bit 1051 I ? IO_PAD421
+bit 1052 C 1 *
+bit 1053 O ? IO_PAD423 1052 1 Z
+bit 1054 I ? IO_PAD423
+bit 1055 C 1 *
+bit 1056 O ? IO_PAD424 1055 1 Z
+bit 1057 I ? IO_PAD424
+bit 1058 C 1 *
+bit 1059 O ? IO_PAD425 1058 1 Z
+bit 1060 I ? IO_PAD425
+bit 1061 C 1 *
+bit 1062 O ? IO_PAD427 1061 1 Z
+bit 1063 I ? IO_PAD427
+bit 1064 C 1 *
+bit 1065 O ? IO_PAD429 1064 1 Z
+bit 1066 I ? IO_PAD429
+bit 1067 C 1 *
+bit 1068 O ? IO_PAD431 1067 1 Z
+bit 1069 I ? IO_PAD431
+bit 1070 C 1 *
+bit 1071 O ? IO_PAD433 1070 1 Z
+bit 1072 I ? IO_PAD433
+bit 1073 C 1 *
+bit 1074 O ? IO_PAD435 1073 1 Z
+bit 1075 I ? IO_PAD435
+bit 1076 C 1 *
+bit 1077 O ? IO_PAD436 1076 1 Z
+bit 1078 I ? IO_PAD436
+bit 1079 C 1 *
+bit 1080 O ? IO_PAD437 1079 1 Z
+bit 1081 I ? IO_PAD437
+bit 1082 C 1 *
+bit 1083 O ? IO_PAD438 1082 1 Z
+bit 1084 I ? IO_PAD438
+bit 1085 C 1 *
+bit 1086 O ? IO_PAD439 1085 1 Z
+bit 1087 I ? IO_PAD439
+bit 1088 C 1 *
+bit 1089 O ? IO_PAD440 1088 1 Z
+bit 1090 I ? IO_PAD440
+bit 1091 C 1 *
+bit 1092 O ? IO_PAD441 1091 1 Z
+bit 1093 I ? IO_PAD441
+bit 1094 C 1 *
+bit 1095 O ? IO_PAD442 1094 1 Z
+bit 1096 I ? IO_PAD442
+bit 1097 C 1 *
+bit 1098 O ? IO_PAD443 1097 1 Z
+bit 1099 I ? IO_PAD443
+bit 1100 C 1 *
+bit 1101 O ? IO_PAD444 1100 1 Z
+bit 1102 I ? IO_PAD444
+bit 1103 C 1 *
+bit 1104 O ? IO_PAD445 1103 1 Z
+bit 1105 I ? IO_PAD445
+bit 1106 C 1 *
+bit 1107 O ? IO_PAD446 1106 1 Z
+bit 1108 I ? IO_PAD446
+bit 1109 C 1 *
+bit 1110 O ? IO_PAD447 1109 1 Z
+bit 1111 I ? IO_PAD447
+bit 1112 C 1 *
+bit 1113 O ? IO_PAD449 1112 1 Z
+bit 1114 I ? IO_PAD449
+bit 1115 C 1 *
+bit 1116 O ? IO_PAD451 1115 1 Z
+bit 1117 I ? IO_PAD451
+bit 1118 C 1 *
+bit 1119 O ? IO_PAD452 1118 1 Z
+bit 1120 I ? IO_PAD452
+bit 1121 C 1 *
+bit 1122 O ? IO_PAD453 1121 1 Z
+bit 1123 I ? IO_PAD453
+bit 1124 C 1 *
+bit 1125 O ? IO_PAD455 1124 1 Z
+bit 1126 I ? IO_PAD455
+bit 1127 C 1 *
+bit 1128 O ? IO_PAD457 1127 1 Z
+bit 1129 I ? IO_PAD457
+bit 1130 C 1 *
+bit 1131 O ? IO_PAD459 1130 1 Z
+bit 1132 I ? IO_PAD459
+bit 1133 C 1 *
+bit 1134 O ? IO_PAD461 1133 1 Z
+bit 1135 I ? IO_PAD461
+bit 1136 C 1 *
+bit 1137 O ? IO_PAD462 1136 1 Z
+bit 1138 I ? IO_PAD462
+bit 1139 C 1 *
+bit 1140 O ? IO_PAD463 1139 1 Z
+bit 1141 I ? IO_PAD463
+bit 1142 C 1 *
+bit 1143 O ? IO_PAD464 1142 1 Z
+bit 1144 I ? IO_PAD464
+bit 1145 C 1 *
+bit 1146 O ? IO_PAD465 1145 1 Z
+bit 1147 I ? IO_PAD465
+bit 1148 C 1 *
+bit 1149 O ? IO_PAD467 1148 1 Z
+bit 1150 I ? IO_PAD467
+bit 1151 C 1 *
+bit 1152 O ? IO_PAD469 1151 1 Z
+bit 1153 I ? IO_PAD469
+bit 1154 C 1 *
+bit 1155 O ? IO_PAD470 1154 1 Z
+bit 1156 I ? IO_PAD470
+bit 1157 C 1 *
+bit 1158 O ? IO_PAD471 1157 1 Z
+bit 1159 I ? IO_PAD471
+bit 1160 C 1 *
+bit 1161 O ? IO_PAD473 1160 1 Z
+bit 1162 I ? IO_PAD473
+bit 1163 C 1 *
+bit 1164 O ? IO_PAD474 1163 1 Z
+bit 1165 I ? IO_PAD474
+bit 1166 C 1 *
+bit 1167 O ? IO_PAD475 1166 1 Z
+bit 1168 I ? IO_PAD475
+bit 1169 C 1 *
+bit 1170 O ? IO_PAD477 1169 1 Z
+bit 1171 I ? IO_PAD477
+bit 1172 C 1 *
+bit 1173 O ? IO_PAD478 1172 1 Z
+bit 1174 I ? IO_PAD478
+bit 1175 C 1 *
+bit 1176 O ? IO_PAD479 1175 1 Z
+bit 1177 I ? IO_PAD479
+bit 1178 C 1 *
+bit 1179 O ? IO_PAD480 1178 1 Z
+bit 1180 I ? IO_PAD480
+bit 1181 C 1 *
+bit 1182 O ? IO_PAD481 1181 1 Z
+bit 1183 I ? IO_PAD481
+bit 1184 C 1 *
+bit 1185 O ? IO_PAD482 1184 1 Z
+bit 1186 I ? IO_PAD482
--- /dev/null
+0000 xc3s100e_die 0
--- /dev/null
+signal TCK
+signal TDI
+signal TDO
+signal TMS
+signal PAD38
+signal PAD75
+signal PAD39
+signal PAD76
+signal IPAD41
+signal PAD78
+signal PAD79
+signal IPAD80
+signal IPAD81
+signal IPAD46
+signal IPAD86
+signal IPAD3
+signal IPAD6
+signal PAD40
+signal PROG_B
+signal PAD42
+signal PAD43
+signal PAD44
+signal PAD45
+signal PAD82
+signal PAD47
+signal PAD83
+signal IPAD12
+signal PAD48
+signal PAD84
+signal IPAD13
+signal PAD49
+signal PAD85
+signal IPAD50
+signal PAD87
+signal PAD88
+signal DONE
+signal PAD89
+signal PAD101
+signal IPAD90
+signal IPAD19
+signal PAD102
+signal PAD103
+signal IPAD57
+signal PAD105
+signal IPAD95
+signal PAD106
+signal PAD107
+signal PAD108
+signal IPAD100
+signal IPAD104
+signal PAD10
+signal PAD11
+signal PAD14
+signal PAD51
+signal PAD15
+signal PAD52
+signal PAD16
+signal PAD53
+signal PAD17
+signal PAD54
+signal PAD18
+signal PAD91
+signal PAD55
+signal IPAD20
+signal PAD92
+signal PAD56
+signal PAD93
+signal PAD94
+signal PAD58
+signal IPAD23
+signal PAD59
+signal PAD96
+signal IPAD60
+signal PAD97
+signal PAD1
+signal IPAD26
+signal PAD98
+signal PAD2
+signal IPAD27
+signal PAD99
+signal PAD4
+signal IPAD66
+signal PAD5
+signal IPAD67
+signal PAD7
+signal PAD8
+signal PAD9
+signal PAD21
+signal PAD22
+signal PAD24
+signal PAD61
+signal PAD25
+signal PAD62
+signal PAD63
+signal PAD64
+signal PAD28
+signal PAD65
+signal PAD29
+signal PAD68
+signal IPAD32
+signal PAD69
+signal IPAD36
+signal IPAD73
+signal IPAD74
+signal IPAD77
+signal PAD30
+signal PAD31
+signal PAD33
+signal PAD70
+signal PAD34
+signal PAD71
+signal PAD35
+signal PAD72
+signal PAD37
+signal GND0
+signal GND1
+signal GND2
+signal GND3
+signal GND4
+signal GND5
+signal GND6
+signal GND7
+signal GND8
+signal GND9
+signal GND10
+signal GND11
+signal GND12
+signal GND13
+signal VDD0
+signal VDD1
+signal VDD2
+signal VDD3
+signal VDD4
+signal VDD5
+signal VDD6
+signal VDD7
+signal VDD8
+signal VDD9
+signal VDD10
+signal VDD11
+signal VDD12
+signal VDD13
+signal Vaux0
+signal Vaux1
+signal Vaux2
+
+register BSR 272
+register BR 1
+register DIR 32
+
+instruction length 6
+
+instruction SAMPLE/PRELOAD 100000 BSR
+instruction IDCODE 100100 DIR
+instruction EXTEST 111100 BSR
+instruction BYPASS 111111 BR
+
+bit 271 I 1 IPAD27
+bit 270 I 1 PAD28
+bit 269 O 1 PAD28 268 0 Z
+bit 268 C 0 *
+bit 267 I 1 PAD29
+bit 266 O 1 PAD29 265 0 Z
+bit 265 C 0 *
+bit 264 I 1 PAD30
+bit 263 O 1 PAD30 262 0 Z
+bit 262 C 0 *
+bit 261 I 1 PAD31
+bit 260 O 1 PAD31 259 0 Z
+bit 259 C 0 *
+bit 258 I 1 IPAD32
+bit 257 I 1 PAD33
+bit 256 O 1 PAD33 255 0 Z
+bit 255 C 0 *
+bit 254 I 1 PAD34
+bit 253 O 1 PAD34 252 0 Z
+bit 252 C 0 *
+bit 251 I 1 PAD35
+bit 250 O 1 PAD35 249 0 Z
+bit 249 C 0 *
+bit 248 I 1 IPAD36
+bit 247 I 1 PAD37
+bit 246 O 1 PAD37 245 0 Z
+bit 245 C 0 *
+bit 244 I 1 PAD38
+bit 243 O 1 PAD38 242 0 Z
+bit 242 C 0 *
+bit 241 I 1 PAD39
+bit 240 O 1 PAD39 239 0 Z
+bit 239 C 0 *
+bit 238 I 1 PAD40
+bit 237 O 1 PAD40 236 0 Z
+bit 236 C 0 *
+bit 235 I 1 IPAD41
+bit 234 I 1 PAD42
+bit 233 O 1 PAD42 232 0 Z
+bit 232 C 0 *
+bit 231 I 1 PAD43
+bit 230 O 1 PAD43 229 0 Z
+bit 229 C 0 *
+bit 228 I 1 PAD44
+bit 227 O 1 PAD44 226 0 Z
+bit 226 C 0 *
+bit 225 I 1 PAD45
+bit 224 O 1 PAD45 223 0 Z
+bit 223 C 0 *
+bit 222 I 1 IPAD46
+bit 221 I 1 PAD47
+bit 220 O 1 PAD47 219 0 Z
+bit 219 C 0 *
+bit 218 I 1 PAD48
+bit 217 O 1 PAD48 216 0 Z
+bit 216 C 0 *
+bit 215 I 1 PAD49
+bit 214 O 1 PAD49 213 0 Z
+bit 213 C 0 *
+bit 212 I 1 IPAD50
+bit 211 I 1 PAD51
+bit 210 O 1 PAD51 209 0 Z
+bit 209 C 0 *
+bit 208 I 1 PAD52
+bit 207 O 1 PAD52 206 0 Z
+bit 206 C 0 *
+bit 205 I 1 PAD53
+bit 204 O 1 PAD53 203 0 Z
+bit 203 C 0 *
+bit 202 I 1 PAD54
+bit 201 O 1 PAD54 200 0 Z
+bit 200 C 0 *
+bit 199 I 1 DONE
+bit 198 O 1 *
+bit 197 O 1 *
+bit 196 I 1 PAD55
+bit 195 O 1 PAD55 194 0 Z
+bit 194 C 0 *
+bit 193 I 1 PAD56
+bit 192 O 1 PAD56 191 0 Z
+bit 191 C 0 *
+bit 190 I 1 IPAD57
+bit 189 I 1 PAD58
+bit 188 O 1 PAD58 187 0 Z
+bit 187 C 0 *
+bit 186 I 1 PAD59
+bit 185 O 1 PAD59 184 0 Z
+bit 184 C 0 *
+bit 183 I 1 IPAD60
+bit 182 I 1 PAD61
+bit 181 O 1 PAD61 180 0 Z
+bit 180 C 0 *
+bit 179 I 1 PAD62
+bit 178 O 1 PAD62 177 0 Z
+bit 177 C 0 *
+bit 176 I 1 PAD63
+bit 175 O 1 PAD63 174 0 Z
+bit 174 C 0 *
+bit 173 I 1 PAD64
+bit 172 O 1 PAD64 171 0 Z
+bit 171 C 0 *
+bit 170 I 1 PAD65
+bit 169 O 1 PAD65 168 0 Z
+bit 168 C 0 *
+bit 167 I 1 IPAD66
+bit 166 I 1 IPAD67
+bit 165 I 1 PAD68
+bit 164 O 1 PAD68 163 0 Z
+bit 163 C 0 *
+bit 162 I 1 PAD69
+bit 161 O 1 PAD69 160 0 Z
+bit 160 C 0 *
+bit 159 I 1 PAD70
+bit 158 O 1 PAD70 157 0 Z
+bit 157 C 0 *
+bit 156 I 1 PAD71
+bit 155 O 1 PAD71 154 0 Z
+bit 154 C 0 *
+bit 153 I 1 PAD72
+bit 152 O 1 PAD72 151 0 Z
+bit 151 C 0 *
+bit 150 I 1 IPAD73
+bit 149 I 1 IPAD74
+bit 148 I 1 PAD75
+bit 147 O 1 PAD75 146 0 Z
+bit 146 C 0 *
+bit 145 I 1 PAD76
+bit 144 O 1 PAD76 143 0 Z
+bit 143 C 0 *
+bit 142 I 1 IPAD77
+bit 141 I 1 PAD78
+bit 140 O 1 PAD78 139 0 Z
+bit 139 C 0 *
+bit 138 I 1 PAD79
+bit 137 O 1 PAD79 136 0 Z
+bit 136 C 0 *
+bit 135 I 1 IPAD80
+bit 134 I 1 IPAD81
+bit 133 I 1 PAD82
+bit 132 O 1 PAD82 131 0 Z
+bit 131 C 0 *
+bit 130 I 1 PAD83
+bit 129 O 1 PAD83 128 0 Z
+bit 128 C 0 *
+bit 127 I 1 PAD84
+bit 126 O 1 PAD84 125 0 Z
+bit 125 C 0 *
+bit 124 I 1 PAD85
+bit 123 O 1 PAD85 122 0 Z
+bit 122 C 0 *
+bit 121 I 1 IPAD86
+bit 120 I 1 PAD87
+bit 119 O 1 PAD87 118 0 Z
+bit 118 C 0 *
+bit 117 I 1 PAD88
+bit 116 O 1 PAD88 115 0 Z
+bit 115 C 0 *
+bit 114 I 1 PAD89
+bit 113 O 1 PAD89 112 0 Z
+bit 112 C 0 *
+bit 111 I 1 IPAD90
+bit 110 I 1 PAD91
+bit 109 O 1 PAD91 108 0 Z
+bit 108 C 0 *
+bit 107 I 1 PAD92
+bit 106 O 1 PAD92 105 0 Z
+bit 105 C 0 *
+bit 104 I 1 PAD93
+bit 103 O 1 PAD93 102 0 Z
+bit 102 C 0 *
+bit 101 I 1 PAD94
+bit 100 O 1 PAD94 99 0 Z
+bit 99 C 0 *
+bit 98 I 1 IPAD95
+bit 97 I 1 PAD96
+bit 96 O 1 PAD96 95 0 Z
+bit 95 C 0 *
+bit 94 I 1 PAD97
+bit 93 O 1 PAD97 92 0 Z
+bit 92 C 0 *
+bit 91 I 1 PAD98
+bit 90 O 1 PAD98 89 0 Z
+bit 89 C 0 *
+bit 88 I 1 PAD99
+bit 87 O 1 PAD99 86 0 Z
+bit 86 C 0 *
+bit 85 I 1 IPAD100
+bit 84 I 1 PAD101
+bit 83 O 1 PAD101 82 0 Z
+bit 82 C 0 *
+bit 81 I 1 PAD102
+bit 80 O 1 PAD102 79 0 Z
+bit 79 C 0 *
+bit 78 I 1 PAD103
+bit 77 O 1 PAD103 76 0 Z
+bit 76 C 0 *
+bit 75 I 1 IPAD104
+bit 74 I 1 PAD105
+bit 73 O 1 PAD105 72 0 Z
+bit 72 C 0 *
+bit 71 I 1 PAD106
+bit 70 O 1 PAD106 69 0 Z
+bit 69 C 0 *
+bit 68 I 1 PAD107
+bit 67 O 1 PAD107 66 0 Z
+bit 66 C 0 *
+bit 65 I 1 PAD108
+bit 64 O 1 PAD108 63 0 Z
+bit 63 C 0 *
+bit 62 I 1 PROG_B
+bit 61 I 1 PAD1
+bit 60 O 1 PAD1 59 0 Z
+bit 59 C 0 *
+bit 58 I 1 PAD2
+bit 57 O 1 PAD2 56 0 Z
+bit 56 C 0 *
+bit 55 I 1 IPAD3
+bit 54 I 1 PAD4
+bit 53 O 1 PAD4 52 0 Z
+bit 52 C 0 *
+bit 51 I 1 PAD5
+bit 50 O 1 PAD5 49 0 Z
+bit 49 C 0 *
+bit 48 I 1 IPAD6
+bit 47 I 1 PAD7
+bit 46 O 1 PAD7 45 0 Z
+bit 45 C 0 *
+bit 44 I 1 PAD8
+bit 43 O 1 PAD8 42 0 Z
+bit 42 C 0 *
+bit 41 I 1 PAD9
+bit 40 O 1 PAD9 39 0 Z
+bit 39 C 0 *
+bit 38 I 1 PAD10
+bit 37 O 1 PAD10 36 0 Z
+bit 36 C 0 *
+bit 35 I 1 PAD11
+bit 34 O 1 PAD11 33 0 Z
+bit 33 C 0 *
+bit 32 I 1 IPAD12
+bit 31 I 1 IPAD13
+bit 30 I 1 PAD14
+bit 29 O 1 PAD14 28 0 Z
+bit 28 C 0 *
+bit 27 I 1 PAD15
+bit 26 O 1 PAD15 25 0 Z
+bit 25 C 0 *
+bit 24 I 1 PAD16
+bit 23 O 1 PAD16 22 0 Z
+bit 22 C 0 *
+bit 21 I 1 PAD17
+bit 20 O 1 PAD17 19 0 Z
+bit 19 C 0 *
+bit 18 I 1 PAD18
+bit 17 O 1 PAD18 16 0 Z
+bit 16 C 0 *
+bit 15 I 1 IPAD19
+bit 14 I 1 IPAD20
+bit 13 I 1 PAD21
+bit 12 O 1 PAD21 11 0 Z
+bit 11 C 0 *
+bit 10 I 1 PAD22
+bit 9 O 1 PAD22 8 0 Z
+bit 8 C 0 *
+bit 7 I 1 IPAD23
+bit 6 I 1 PAD24
+bit 5 O 1 PAD24 4 0 Z
+bit 4 C 0 *
+bit 3 I 1 PAD25
+bit 2 O 1 PAD25 1 0 Z
+bit 1 C 0 *
+bit 0 I 1 IPAD26
--- /dev/null
+signal TCK
+signal TDI
+signal TDO
+signal TMS
+signal PAD38
+signal PAD75
+signal PAD39
+signal PAD76
+signal IPAD41
+signal PAD78
+signal PAD79
+signal IPAD80
+signal IPAD81
+signal IPAD46
+signal IPAD86
+signal IPAD3
+signal IPAD6
+signal PAD40
+signal PROG_B
+signal PAD42
+signal PAD43
+signal PAD44
+signal PAD45
+signal PAD82
+signal PAD47
+signal PAD83
+signal IPAD12
+signal PAD48
+signal PAD84
+signal IPAD13
+signal PAD49
+signal PAD85
+signal IPAD50
+signal PAD87
+signal PAD88
+signal DONE
+signal PAD89
+signal PAD101
+signal IPAD90
+signal IPAD19
+signal PAD102
+signal PAD103
+signal IPAD57
+signal PAD105
+signal IPAD95
+signal PAD106
+signal PAD107
+signal PAD108
+signal IPAD100
+signal IPAD104
+signal PAD10
+signal PAD11
+signal PAD14
+signal PAD51
+signal PAD15
+signal PAD52
+signal PAD16
+signal PAD53
+signal PAD17
+signal PAD54
+signal PAD18
+signal PAD91
+signal PAD55
+signal IPAD20
+signal PAD92
+signal PAD56
+signal PAD93
+signal PAD94
+signal PAD58
+signal IPAD23
+signal PAD59
+signal PAD96
+signal IPAD60
+signal PAD97
+signal PAD1
+signal IPAD26
+signal PAD98
+signal PAD2
+signal IPAD27
+signal PAD99
+signal PAD4
+signal IPAD66
+signal PAD5
+signal IPAD67
+signal PAD7
+signal PAD8
+signal PAD9
+signal PAD21
+signal PAD22
+signal PAD24
+signal PAD61
+signal PAD25
+signal PAD62
+signal PAD63
+signal PAD64
+signal PAD28
+signal PAD65
+signal PAD29
+signal PAD68
+signal IPAD32
+signal PAD69
+signal IPAD36
+signal IPAD73
+signal IPAD74
+signal IPAD77
+signal PAD30
+signal PAD31
+signal PAD33
+signal PAD70
+signal PAD34
+signal PAD71
+signal PAD35
+signal PAD72
+signal PAD37
+signal GND0
+signal GND1
+signal GND2
+signal GND3
+signal GND4
+signal GND5
+signal GND6
+signal GND7
+signal GND8
+signal GND9
+signal GND10
+signal GND11
+signal GND12
+signal GND13
+signal VDD0
+signal VDD1
+signal VDD2
+signal VDD3
+signal VDD4
+signal VDD5
+signal VDD6
+signal VDD7
+signal VDD8
+signal VDD9
+signal VDD10
+signal VDD11
+signal VDD12
+signal VDD13
+signal Vaux0
+signal Vaux1
+signal Vaux2
+
+register BSR 272
+register BR 1
+register DIR 32
+
+instruction length 6
+
+instruction SAMPLE/PRELOAD 100000 BSR
+instruction IDCODE 100100 DIR
+instruction EXTEST 111100 BSR
+instruction BYPASS 111111 BR
+
+bit 271 I 1 IPAD27
+bit 270 I 1 PAD28
+bit 269 O 1 PAD28 268 0 Z
+bit 268 C 0 *
+bit 267 I 1 PAD29
+bit 266 O 1 PAD29 265 0 Z
+bit 265 C 0 *
+bit 264 I 1 PAD30
+bit 263 O 1 PAD30 262 0 Z
+bit 262 C 0 *
+bit 261 I 1 PAD31
+bit 260 O 1 PAD31 259 0 Z
+bit 259 C 0 *
+bit 258 I 1 IPAD32
+bit 257 I 1 PAD33
+bit 256 O 1 PAD33 255 0 Z
+bit 255 C 0 *
+bit 254 I 1 PAD34
+bit 253 O 1 PAD34 252 0 Z
+bit 252 C 0 *
+bit 251 I 1 PAD35
+bit 250 O 1 PAD35 249 0 Z
+bit 249 C 0 *
+bit 248 I 1 IPAD36
+bit 247 I 1 PAD37
+bit 246 O 1 PAD37 245 0 Z
+bit 245 C 0 *
+bit 244 I 1 PAD38
+bit 243 O 1 PAD38 242 0 Z
+bit 242 C 0 *
+bit 241 I 1 PAD39
+bit 240 O 1 PAD39 239 0 Z
+bit 239 C 0 *
+bit 238 I 1 PAD40
+bit 237 O 1 PAD40 236 0 Z
+bit 236 C 0 *
+bit 235 I 1 IPAD41
+bit 234 I 1 PAD42
+bit 233 O 1 PAD42 232 0 Z
+bit 232 C 0 *
+bit 231 I 1 PAD43
+bit 230 O 1 PAD43 229 0 Z
+bit 229 C 0 *
+bit 228 I 1 PAD44
+bit 227 O 1 PAD44 226 0 Z
+bit 226 C 0 *
+bit 225 I 1 PAD45
+bit 224 O 1 PAD45 223 0 Z
+bit 223 C 0 *
+bit 222 I 1 IPAD46
+bit 221 I 1 PAD47
+bit 220 O 1 PAD47 219 0 Z
+bit 219 C 0 *
+bit 218 I 1 PAD48
+bit 217 O 1 PAD48 216 0 Z
+bit 216 C 0 *
+bit 215 I 1 PAD49
+bit 214 O 1 PAD49 213 0 Z
+bit 213 C 0 *
+bit 212 I 1 IPAD50
+bit 211 I 1 PAD51
+bit 210 O 1 PAD51 209 0 Z
+bit 209 C 0 *
+bit 208 I 1 PAD52
+bit 207 O 1 PAD52 206 0 Z
+bit 206 C 0 *
+bit 205 I 1 PAD53
+bit 204 O 1 PAD53 203 0 Z
+bit 203 C 0 *
+bit 202 I 1 PAD54
+bit 201 O 1 PAD54 200 0 Z
+bit 200 C 0 *
+bit 199 I 1 DONE
+bit 198 O 1 *
+bit 197 O 1 *
+bit 196 I 1 PAD55
+bit 195 O 1 PAD55 194 0 Z
+bit 194 C 0 *
+bit 193 I 1 PAD56
+bit 192 O 1 PAD56 191 0 Z
+bit 191 C 0 *
+bit 190 I 1 IPAD57
+bit 189 I 1 PAD58
+bit 188 O 1 PAD58 187 0 Z
+bit 187 C 0 *
+bit 186 I 1 PAD59
+bit 185 O 1 PAD59 184 0 Z
+bit 184 C 0 *
+bit 183 I 1 IPAD60
+bit 182 I 1 PAD61
+bit 181 O 1 PAD61 180 0 Z
+bit 180 C 0 *
+bit 179 I 1 PAD62
+bit 178 O 1 PAD62 177 0 Z
+bit 177 C 0 *
+bit 176 I 1 PAD63
+bit 175 O 1 PAD63 174 0 Z
+bit 174 C 0 *
+bit 173 I 1 PAD64
+bit 172 O 1 PAD64 171 0 Z
+bit 171 C 0 *
+bit 170 I 1 PAD65
+bit 169 O 1 PAD65 168 0 Z
+bit 168 C 0 *
+bit 167 I 1 IPAD66
+bit 166 I 1 IPAD67
+bit 165 I 1 PAD68
+bit 164 O 1 PAD68 163 0 Z
+bit 163 C 0 *
+bit 162 I 1 PAD69
+bit 161 O 1 PAD69 160 0 Z
+bit 160 C 0 *
+bit 159 I 1 PAD70
+bit 158 O 1 PAD70 157 0 Z
+bit 157 C 0 *
+bit 156 I 1 PAD71
+bit 155 O 1 PAD71 154 0 Z
+bit 154 C 0 *
+bit 153 I 1 PAD72
+bit 152 O 1 PAD72 151 0 Z
+bit 151 C 0 *
+bit 150 I 1 IPAD73
+bit 149 I 1 IPAD74
+bit 148 I 1 PAD75
+bit 147 O 1 PAD75 146 0 Z
+bit 146 C 0 *
+bit 145 I 1 PAD76
+bit 144 O 1 PAD76 143 0 Z
+bit 143 C 0 *
+bit 142 I 1 IPAD77
+bit 141 I 1 PAD78
+bit 140 O 1 PAD78 139 0 Z
+bit 139 C 0 *
+bit 138 I 1 PAD79
+bit 137 O 1 PAD79 136 0 Z
+bit 136 C 0 *
+bit 135 I 1 IPAD80
+bit 134 I 1 IPAD81
+bit 133 I 1 PAD82
+bit 132 O 1 PAD82 131 0 Z
+bit 131 C 0 *
+bit 130 I 1 PAD83
+bit 129 O 1 PAD83 128 0 Z
+bit 128 C 0 *
+bit 127 I 1 PAD84
+bit 126 O 1 PAD84 125 0 Z
+bit 125 C 0 *
+bit 124 I 1 PAD85
+bit 123 O 1 PAD85 122 0 Z
+bit 122 C 0 *
+bit 121 I 1 IPAD86
+bit 120 I 1 PAD87
+bit 119 O 1 PAD87 118 0 Z
+bit 118 C 0 *
+bit 117 I 1 PAD88
+bit 116 O 1 PAD88 115 0 Z
+bit 115 C 0 *
+bit 114 I 1 PAD89
+bit 113 O 1 PAD89 112 0 Z
+bit 112 C 0 *
+bit 111 I 1 IPAD90
+bit 110 I 1 PAD91
+bit 109 O 1 PAD91 108 0 Z
+bit 108 C 0 *
+bit 107 I 1 PAD92
+bit 106 O 1 PAD92 105 0 Z
+bit 105 C 0 *
+bit 104 I 1 PAD93
+bit 103 O 1 PAD93 102 0 Z
+bit 102 C 0 *
+bit 101 I 1 PAD94
+bit 100 O 1 PAD94 99 0 Z
+bit 99 C 0 *
+bit 98 I 1 IPAD95
+bit 97 I 1 PAD96
+bit 96 O 1 PAD96 95 0 Z
+bit 95 C 0 *
+bit 94 I 1 PAD97
+bit 93 O 1 PAD97 92 0 Z
+bit 92 C 0 *
+bit 91 I 1 PAD98
+bit 90 O 1 PAD98 89 0 Z
+bit 89 C 0 *
+bit 88 I 1 PAD99
+bit 87 O 1 PAD99 86 0 Z
+bit 86 C 0 *
+bit 85 I 1 IPAD100
+bit 84 I 1 PAD101
+bit 83 O 1 PAD101 82 0 Z
+bit 82 C 0 *
+bit 81 I 1 PAD102
+bit 80 O 1 PAD102 79 0 Z
+bit 79 C 0 *
+bit 78 I 1 PAD103
+bit 77 O 1 PAD103 76 0 Z
+bit 76 C 0 *
+bit 75 I 1 IPAD104
+bit 74 I 1 PAD105
+bit 73 O 1 PAD105 72 0 Z
+bit 72 C 0 *
+bit 71 I 1 PAD106
+bit 70 O 1 PAD106 69 0 Z
+bit 69 C 0 *
+bit 68 I 1 PAD107
+bit 67 O 1 PAD107 66 0 Z
+bit 66 C 0 *
+bit 65 I 1 PAD108
+bit 64 O 1 PAD108 63 0 Z
+bit 63 C 0 *
+bit 62 I 1 PROG_B
+bit 61 I 1 PAD1
+bit 60 O 1 PAD1 59 0 Z
+bit 59 C 0 *
+bit 58 I 1 PAD2
+bit 57 O 1 PAD2 56 0 Z
+bit 56 C 0 *
+bit 55 I 1 IPAD3
+bit 54 I 1 PAD4
+bit 53 O 1 PAD4 52 0 Z
+bit 52 C 0 *
+bit 51 I 1 PAD5
+bit 50 O 1 PAD5 49 0 Z
+bit 49 C 0 *
+bit 48 I 1 IPAD6
+bit 47 I 1 PAD7
+bit 46 O 1 PAD7 45 0 Z
+bit 45 C 0 *
+bit 44 I 1 PAD8
+bit 43 O 1 PAD8 42 0 Z
+bit 42 C 0 *
+bit 41 I 1 PAD9
+bit 40 O 1 PAD9 39 0 Z
+bit 39 C 0 *
+bit 38 I 1 PAD10
+bit 37 O 1 PAD10 36 0 Z
+bit 36 C 0 *
+bit 35 I 1 PAD11
+bit 34 O 1 PAD11 33 0 Z
+bit 33 C 0 *
+bit 32 I 1 IPAD12
+bit 31 I 1 IPAD13
+bit 30 I 1 PAD14
+bit 29 O 1 PAD14 28 0 Z
+bit 28 C 0 *
+bit 27 I 1 PAD15
+bit 26 O 1 PAD15 25 0 Z
+bit 25 C 0 *
+bit 24 I 1 PAD16
+bit 23 O 1 PAD16 22 0 Z
+bit 22 C 0 *
+bit 21 I 1 PAD17
+bit 20 O 1 PAD17 19 0 Z
+bit 19 C 0 *
+bit 18 I 1 PAD18
+bit 17 O 1 PAD18 16 0 Z
+bit 16 C 0 *
+bit 15 I 1 IPAD19
+bit 14 I 1 IPAD20
+bit 13 I 1 PAD21
+bit 12 O 1 PAD21 11 0 Z
+bit 11 C 0 *
+bit 10 I 1 PAD22
+bit 9 O 1 PAD22 8 0 Z
+bit 8 C 0 *
+bit 7 I 1 IPAD23
+bit 6 I 1 PAD24
+bit 5 O 1 PAD24 4 0 Z
+bit 4 C 0 *
+bit 3 I 1 PAD25
+bit 2 O 1 PAD25 1 0 Z
+bit 1 C 0 *
+bit 0 I 1 IPAD26
--- /dev/null
+signal TCK
+signal TDI
+signal TDO
+signal TMS
+signal PAD38
+signal PAD75
+signal PAD39
+signal PAD76
+signal IPAD41
+signal PAD78
+signal PAD79
+signal IPAD80
+signal IPAD81
+signal IPAD46
+signal IPAD86
+signal IPAD3
+signal IPAD6
+signal PAD40
+signal PROG_B
+signal PAD42
+signal PAD43
+signal PAD44
+signal PAD45
+signal PAD82
+signal PAD47
+signal PAD83
+signal IPAD12
+signal PAD48
+signal PAD84
+signal IPAD13
+signal PAD49
+signal PAD85
+signal IPAD50
+signal PAD87
+signal PAD88
+signal DONE
+signal PAD89
+signal PAD101
+signal IPAD90
+signal IPAD19
+signal PAD102
+signal PAD103
+signal IPAD57
+signal PAD105
+signal IPAD95
+signal PAD106
+signal PAD107
+signal PAD108
+signal IPAD100
+signal IPAD104
+signal PAD10
+signal PAD11
+signal PAD14
+signal PAD51
+signal PAD15
+signal PAD52
+signal PAD16
+signal PAD53
+signal PAD17
+signal PAD54
+signal PAD18
+signal PAD91
+signal PAD55
+signal IPAD20
+signal PAD92
+signal PAD56
+signal PAD93
+signal PAD94
+signal PAD58
+signal IPAD23
+signal PAD59
+signal PAD96
+signal IPAD60
+signal PAD97
+signal PAD1
+signal IPAD26
+signal PAD98
+signal PAD2
+signal IPAD27
+signal PAD99
+signal PAD4
+signal IPAD66
+signal PAD5
+signal IPAD67
+signal PAD7
+signal PAD8
+signal PAD9
+signal PAD21
+signal PAD22
+signal PAD24
+signal PAD61
+signal PAD25
+signal PAD62
+signal PAD63
+signal PAD64
+signal PAD28
+signal PAD65
+signal PAD29
+signal PAD68
+signal IPAD32
+signal PAD69
+signal IPAD36
+signal IPAD73
+signal IPAD74
+signal IPAD77
+signal PAD30
+signal PAD31
+signal PAD33
+signal PAD70
+signal PAD34
+signal PAD71
+signal PAD35
+signal PAD72
+signal PAD37
+signal GND0
+signal GND1
+signal GND2
+signal GND3
+signal GND4
+signal GND5
+signal GND6
+signal GND7
+signal GND8
+signal GND9
+signal GND10
+signal GND11
+signal GND12
+signal VDD0
+signal VDD1
+signal VDD2
+signal VDD3
+signal VDD4
+signal VDD5
+signal VDD6
+signal VDD7
+signal VDD8
+signal VDD9
+signal VDD10
+signal VDD11
+signal VDD12
+signal Vaux0
+signal Vaux1
+signal Vaux2
+
+register BSR 272
+register BR 1
+register DIR 32
+
+instruction length 6
+
+instruction SAMPLE/PRELOAD 100000 BSR
+instruction IDCODE 100100 DIR
+instruction EXTEST 111100 BSR
+instruction BYPASS 111111 BR
+
+bit 271 I 1 IPAD27
+bit 270 I 1 PAD28
+bit 269 O 1 PAD28 268 0 Z
+bit 268 C 0 *
+bit 267 I 1 PAD29
+bit 266 O 1 PAD29 265 0 Z
+bit 265 C 0 *
+bit 264 I 1 PAD30
+bit 263 O 1 PAD30 262 0 Z
+bit 262 C 0 *
+bit 261 I 1 PAD31
+bit 260 O 1 PAD31 259 0 Z
+bit 259 C 0 *
+bit 258 I 1 IPAD32
+bit 257 I 1 PAD33
+bit 256 O 1 PAD33 255 0 Z
+bit 255 C 0 *
+bit 254 I 1 PAD34
+bit 253 O 1 PAD34 252 0 Z
+bit 252 C 0 *
+bit 251 I 1 PAD35
+bit 250 O 1 PAD35 249 0 Z
+bit 249 C 0 *
+bit 248 I 1 IPAD36
+bit 247 I 1 PAD37
+bit 246 O 1 PAD37 245 0 Z
+bit 245 C 0 *
+bit 244 I 1 PAD38
+bit 243 O 1 PAD38 242 0 Z
+bit 242 C 0 *
+bit 241 I 1 PAD39
+bit 240 O 1 PAD39 239 0 Z
+bit 239 C 0 *
+bit 238 I 1 PAD40
+bit 237 O 1 PAD40 236 0 Z
+bit 236 C 0 *
+bit 235 I 1 IPAD41
+bit 234 I 1 PAD42
+bit 233 O 1 PAD42 232 0 Z
+bit 232 C 0 *
+bit 231 I 1 PAD43
+bit 230 O 1 PAD43 229 0 Z
+bit 229 C 0 *
+bit 228 I 1 PAD44
+bit 227 O 1 PAD44 226 0 Z
+bit 226 C 0 *
+bit 225 I 1 PAD45
+bit 224 O 1 PAD45 223 0 Z
+bit 223 C 0 *
+bit 222 I 1 IPAD46
+bit 221 I 1 PAD47
+bit 220 O 1 PAD47 219 0 Z
+bit 219 C 0 *
+bit 218 I 1 PAD48
+bit 217 O 1 PAD48 216 0 Z
+bit 216 C 0 *
+bit 215 I 1 PAD49
+bit 214 O 1 PAD49 213 0 Z
+bit 213 C 0 *
+bit 212 I 1 IPAD50
+bit 211 I 1 PAD51
+bit 210 O 1 PAD51 209 0 Z
+bit 209 C 0 *
+bit 208 I 1 PAD52
+bit 207 O 1 PAD52 206 0 Z
+bit 206 C 0 *
+bit 205 I 1 PAD53
+bit 204 O 1 PAD53 203 0 Z
+bit 203 C 0 *
+bit 202 I 1 PAD54
+bit 201 O 1 PAD54 200 0 Z
+bit 200 C 0 *
+bit 199 I 1 DONE
+bit 198 O 1 *
+bit 197 O 1 *
+bit 196 I 1 PAD55
+bit 195 O 1 PAD55 194 0 Z
+bit 194 C 0 *
+bit 193 I 1 PAD56
+bit 192 O 1 PAD56 191 0 Z
+bit 191 C 0 *
+bit 190 I 1 IPAD57
+bit 189 I 1 PAD58
+bit 188 O 1 PAD58 187 0 Z
+bit 187 C 0 *
+bit 186 I 1 PAD59
+bit 185 O 1 PAD59 184 0 Z
+bit 184 C 0 *
+bit 183 I 1 IPAD60
+bit 182 I 1 PAD61
+bit 181 O 1 PAD61 180 0 Z
+bit 180 C 0 *
+bit 179 I 1 PAD62
+bit 178 O 1 PAD62 177 0 Z
+bit 177 C 0 *
+bit 176 I 1 PAD63
+bit 175 O 1 PAD63 174 0 Z
+bit 174 C 0 *
+bit 173 I 1 PAD64
+bit 172 O 1 PAD64 171 0 Z
+bit 171 C 0 *
+bit 170 I 1 PAD65
+bit 169 O 1 PAD65 168 0 Z
+bit 168 C 0 *
+bit 167 I 1 IPAD66
+bit 166 I 1 IPAD67
+bit 165 I 1 PAD68
+bit 164 O 1 PAD68 163 0 Z
+bit 163 C 0 *
+bit 162 I 1 PAD69
+bit 161 O 1 PAD69 160 0 Z
+bit 160 C 0 *
+bit 159 I 1 PAD70
+bit 158 O 1 PAD70 157 0 Z
+bit 157 C 0 *
+bit 156 I 1 PAD71
+bit 155 O 1 PAD71 154 0 Z
+bit 154 C 0 *
+bit 153 I 1 PAD72
+bit 152 O 1 PAD72 151 0 Z
+bit 151 C 0 *
+bit 150 I 1 IPAD73
+bit 149 I 1 IPAD74
+bit 148 I 1 PAD75
+bit 147 O 1 PAD75 146 0 Z
+bit 146 C 0 *
+bit 145 I 1 PAD76
+bit 144 O 1 PAD76 143 0 Z
+bit 143 C 0 *
+bit 142 I 1 IPAD77
+bit 141 I 1 PAD78
+bit 140 O 1 PAD78 139 0 Z
+bit 139 C 0 *
+bit 138 I 1 PAD79
+bit 137 O 1 PAD79 136 0 Z
+bit 136 C 0 *
+bit 135 I 1 IPAD80
+bit 134 I 1 IPAD81
+bit 133 I 1 PAD82
+bit 132 O 1 PAD82 131 0 Z
+bit 131 C 0 *
+bit 130 I 1 PAD83
+bit 129 O 1 PAD83 128 0 Z
+bit 128 C 0 *
+bit 127 I 1 PAD84
+bit 126 O 1 PAD84 125 0 Z
+bit 125 C 0 *
+bit 124 I 1 PAD85
+bit 123 O 1 PAD85 122 0 Z
+bit 122 C 0 *
+bit 121 I 1 IPAD86
+bit 120 I 1 PAD87
+bit 119 O 1 PAD87 118 0 Z
+bit 118 C 0 *
+bit 117 I 1 PAD88
+bit 116 O 1 PAD88 115 0 Z
+bit 115 C 0 *
+bit 114 I 1 PAD89
+bit 113 O 1 PAD89 112 0 Z
+bit 112 C 0 *
+bit 111 I 1 IPAD90
+bit 110 I 1 PAD91
+bit 109 O 1 PAD91 108 0 Z
+bit 108 C 0 *
+bit 107 I 1 PAD92
+bit 106 O 1 PAD92 105 0 Z
+bit 105 C 0 *
+bit 104 I 1 PAD93
+bit 103 O 1 PAD93 102 0 Z
+bit 102 C 0 *
+bit 101 I 1 PAD94
+bit 100 O 1 PAD94 99 0 Z
+bit 99 C 0 *
+bit 98 I 1 IPAD95
+bit 97 I 1 PAD96
+bit 96 O 1 PAD96 95 0 Z
+bit 95 C 0 *
+bit 94 I 1 PAD97
+bit 93 O 1 PAD97 92 0 Z
+bit 92 C 0 *
+bit 91 I 1 PAD98
+bit 90 O 1 PAD98 89 0 Z
+bit 89 C 0 *
+bit 88 I 1 PAD99
+bit 87 O 1 PAD99 86 0 Z
+bit 86 C 0 *
+bit 85 I 1 IPAD100
+bit 84 I 1 PAD101
+bit 83 O 1 PAD101 82 0 Z
+bit 82 C 0 *
+bit 81 I 1 PAD102
+bit 80 O 1 PAD102 79 0 Z
+bit 79 C 0 *
+bit 78 I 1 PAD103
+bit 77 O 1 PAD103 76 0 Z
+bit 76 C 0 *
+bit 75 I 1 IPAD104
+bit 74 I 1 PAD105
+bit 73 O 1 PAD105 72 0 Z
+bit 72 C 0 *
+bit 71 I 1 PAD106
+bit 70 O 1 PAD106 69 0 Z
+bit 69 C 0 *
+bit 68 I 1 PAD107
+bit 67 O 1 PAD107 66 0 Z
+bit 66 C 0 *
+bit 65 I 1 PAD108
+bit 64 O 1 PAD108 63 0 Z
+bit 63 C 0 *
+bit 62 I 1 PROG_B
+bit 61 I 1 PAD1
+bit 60 O 1 PAD1 59 0 Z
+bit 59 C 0 *
+bit 58 I 1 PAD2
+bit 57 O 1 PAD2 56 0 Z
+bit 56 C 0 *
+bit 55 I 1 IPAD3
+bit 54 I 1 PAD4
+bit 53 O 1 PAD4 52 0 Z
+bit 52 C 0 *
+bit 51 I 1 PAD5
+bit 50 O 1 PAD5 49 0 Z
+bit 49 C 0 *
+bit 48 I 1 IPAD6
+bit 47 I 1 PAD7
+bit 46 O 1 PAD7 45 0 Z
+bit 45 C 0 *
+bit 44 I 1 PAD8
+bit 43 O 1 PAD8 42 0 Z
+bit 42 C 0 *
+bit 41 I 1 PAD9
+bit 40 O 1 PAD9 39 0 Z
+bit 39 C 0 *
+bit 38 I 1 PAD10
+bit 37 O 1 PAD10 36 0 Z
+bit 36 C 0 *
+bit 35 I 1 PAD11
+bit 34 O 1 PAD11 33 0 Z
+bit 33 C 0 *
+bit 32 I 1 IPAD12
+bit 31 I 1 IPAD13
+bit 30 I 1 PAD14
+bit 29 O 1 PAD14 28 0 Z
+bit 28 C 0 *
+bit 27 I 1 PAD15
+bit 26 O 1 PAD15 25 0 Z
+bit 25 C 0 *
+bit 24 I 1 PAD16
+bit 23 O 1 PAD16 22 0 Z
+bit 22 C 0 *
+bit 21 I 1 PAD17
+bit 20 O 1 PAD17 19 0 Z
+bit 19 C 0 *
+bit 18 I 1 PAD18
+bit 17 O 1 PAD18 16 0 Z
+bit 16 C 0 *
+bit 15 I 1 IPAD19
+bit 14 I 1 IPAD20
+bit 13 I 1 PAD21
+bit 12 O 1 PAD21 11 0 Z
+bit 11 C 0 *
+bit 10 I 1 PAD22
+bit 9 O 1 PAD22 8 0 Z
+bit 8 C 0 *
+bit 7 I 1 IPAD23
+bit 6 I 1 PAD24
+bit 5 O 1 PAD24 4 0 Z
+bit 4 C 0 *
+bit 3 I 1 PAD25
+bit 2 O 1 PAD25 1 0 Z
+bit 1 C 0 *
+bit 0 I 1 IPAD26
--- /dev/null
+signal TCK
+signal TDI
+signal TDO
+signal TMS
+signal PAD56
+signal PAD92
+signal PAD38
+signal PAD93
+signal PAD75
+signal PAD39
+signal PAD58
+signal PAD94
+signal PAD76
+signal PAD59
+signal PAD96
+signal PAD78
+signal PAD97
+signal PAD79
+signal PAD98
+signal PAD1
+signal PAD99
+signal PAD2
+signal IPAD66
+signal IPAD67
+signal PAD7
+signal PAD8
+signal PAD9
+signal PROG_B
+signal PAD40
+signal PAD24
+signal PAD42
+signal PAD25
+signal PAD61
+signal PAD43
+signal PAD62
+signal PAD44
+signal PAD63
+signal PAD45
+signal PAD64
+signal PAD82
+signal PAD65
+signal PAD83
+signal PAD48
+signal IPAD12
+signal PAD49
+signal IPAD13
+signal PAD68
+signal PAD69
+signal DONE
+signal IPAD36
+signal IPAD73
+signal PAD105
+signal PAD106
+signal IPAD95
+signal PAD107
+signal PAD108
+signal PAD10
+signal PAD11
+signal PAD14
+signal PAD15
+signal PAD34
+signal PAD70
+signal PAD35
+signal PAD71
+signal PAD53
+signal PAD17
+signal PAD72
+signal PAD54
+signal PAD18
+signal PAD37
+signal PAD55
+signal PAD91
+signal GND0
+signal GND1
+signal GND2
+signal GND3
+signal GND4
+signal GND5
+signal GND6
+signal GND7
+signal GND8
+signal GND9
+signal GND10
+signal GND11
+signal VDD0
+signal VDD1
+signal VDD2
+signal VDD3
+signal VDD4
+signal VDD5
+signal VDD6
+signal VDD7
+signal VDD8
+signal VDD9
+signal VDD10
+signal VDD11
+signal Vaux0
+signal Vaux1
+signal Vaux2
+
+register BSR 272
+register BR 1
+register DIR 32
+
+instruction length 6
+
+instruction SAMPLE/PRELOAD 100000 BSR
+instruction IDCODE 100100 DIR
+instruction EXTEST 111100 BSR
+instruction BYPASS 111111 BR
+
+bit 271 O 1 *
+bit 270 O 1 *
+bit 269 O 1 *
+bit 268 O 1 *
+bit 267 O 1 *
+bit 266 O 1 *
+bit 265 O 1 *
+bit 264 O 1 *
+bit 263 O 1 *
+bit 262 O 1 *
+bit 261 O 1 *
+bit 260 O 1 *
+bit 259 O 1 *
+bit 258 O 1 *
+bit 257 O 1 *
+bit 256 O 1 *
+bit 255 O 1 *
+bit 254 I 1 PAD34
+bit 253 O 1 PAD34 252 0 Z
+bit 252 C 0 *
+bit 251 I 1 PAD35
+bit 250 O 1 PAD35 249 0 Z
+bit 249 C 0 *
+bit 248 I 1 IPAD36
+bit 247 I 1 PAD37
+bit 246 O 1 PAD37 245 0 Z
+bit 245 C 0 *
+bit 244 I 1 PAD38
+bit 243 O 1 PAD38 242 0 Z
+bit 242 C 0 *
+bit 241 I 1 PAD39
+bit 240 O 1 PAD39 239 0 Z
+bit 239 C 0 *
+bit 238 I 1 PAD40
+bit 237 O 1 PAD40 236 0 Z
+bit 236 C 0 *
+bit 235 O 1 *
+bit 234 I 1 PAD42
+bit 233 O 1 PAD42 232 0 Z
+bit 232 C 0 *
+bit 231 I 1 PAD43
+bit 230 O 1 PAD43 229 0 Z
+bit 229 C 0 *
+bit 228 I 1 PAD44
+bit 227 O 1 PAD44 226 0 Z
+bit 226 C 0 *
+bit 225 I 1 PAD45
+bit 224 O 1 PAD45 223 0 Z
+bit 223 C 0 *
+bit 222 O 1 *
+bit 221 O 1 *
+bit 220 O 1 *
+bit 219 O 1 *
+bit 218 I 1 PAD48
+bit 217 O 1 PAD48 216 0 Z
+bit 216 C 0 *
+bit 215 I 1 PAD49
+bit 214 O 1 PAD49 213 0 Z
+bit 213 C 0 *
+bit 212 O 1 *
+bit 211 O 1 *
+bit 210 O 1 *
+bit 209 O 1 *
+bit 208 O 1 *
+bit 207 O 1 *
+bit 206 O 1 *
+bit 205 I 1 PAD53
+bit 204 O 1 PAD53 203 0 Z
+bit 203 C 0 *
+bit 202 I 1 PAD54
+bit 201 O 1 PAD54 200 0 Z
+bit 200 C 0 *
+bit 199 I 1 DONE
+bit 198 O 1 *
+bit 197 O 1 *
+bit 196 I 1 PAD55
+bit 195 O 1 PAD55 194 0 Z
+bit 194 C 0 *
+bit 193 I 1 PAD56
+bit 192 O 1 PAD56 191 0 Z
+bit 191 C 0 *
+bit 190 O 1 *
+bit 189 I 1 PAD58
+bit 188 O 1 PAD58 187 0 Z
+bit 187 C 0 *
+bit 186 I 1 PAD59
+bit 185 O 1 PAD59 184 0 Z
+bit 184 C 0 *
+bit 183 O 1 *
+bit 182 I 1 PAD61
+bit 181 O 1 PAD61 180 0 Z
+bit 180 C 0 *
+bit 179 I 1 PAD62
+bit 178 O 1 PAD62 177 0 Z
+bit 177 C 0 *
+bit 176 I 1 PAD63
+bit 175 O 1 PAD63 174 0 Z
+bit 174 C 0 *
+bit 173 I 1 PAD64
+bit 172 O 1 PAD64 171 0 Z
+bit 171 C 0 *
+bit 170 I 1 PAD65
+bit 169 O 1 PAD65 168 0 Z
+bit 168 C 0 *
+bit 167 I 1 IPAD66
+bit 166 I 1 IPAD67
+bit 165 I 1 PAD68
+bit 164 O 1 PAD68 163 0 Z
+bit 163 C 0 *
+bit 162 I 1 PAD69
+bit 161 O 1 PAD69 160 0 Z
+bit 160 C 0 *
+bit 159 I 1 PAD70
+bit 158 O 1 PAD70 157 0 Z
+bit 157 C 0 *
+bit 156 I 1 PAD71
+bit 155 O 1 PAD71 154 0 Z
+bit 154 C 0 *
+bit 153 I 1 PAD72
+bit 152 O 1 PAD72 151 0 Z
+bit 151 C 0 *
+bit 150 I 1 IPAD73
+bit 149 O 1 *
+bit 148 I 1 PAD75
+bit 147 O 1 PAD75 146 0 Z
+bit 146 C 0 *
+bit 145 I 1 PAD76
+bit 144 O 1 PAD76 143 0 Z
+bit 143 C 0 *
+bit 142 O 1 *
+bit 141 I 1 PAD78
+bit 140 O 1 PAD78 139 0 Z
+bit 139 C 0 *
+bit 138 I 1 PAD79
+bit 137 O 1 PAD79 136 0 Z
+bit 136 C 0 *
+bit 135 O 1 *
+bit 134 O 1 *
+bit 133 I 1 PAD82
+bit 132 O 1 PAD82 131 0 Z
+bit 131 C 0 *
+bit 130 I 1 PAD83
+bit 129 O 1 PAD83 128 0 Z
+bit 128 C 0 *
+bit 127 O 1 *
+bit 126 O 1 *
+bit 125 O 1 *
+bit 124 O 1 *
+bit 123 O 1 *
+bit 122 O 1 *
+bit 121 O 1 *
+bit 120 O 1 *
+bit 119 O 1 *
+bit 118 O 1 *
+bit 117 O 1 *
+bit 116 O 1 *
+bit 115 O 1 *
+bit 114 O 1 *
+bit 113 O 1 *
+bit 112 O 1 *
+bit 111 O 1 *
+bit 110 I 1 PAD91
+bit 109 O 1 PAD91 108 0 Z
+bit 108 C 0 *
+bit 107 I 1 PAD92
+bit 106 O 1 PAD92 105 0 Z
+bit 105 C 0 *
+bit 104 I 1 PAD93
+bit 103 O 1 PAD93 102 0 Z
+bit 102 C 0 *
+bit 101 I 1 PAD94
+bit 100 O 1 PAD94 99 0 Z
+bit 99 C 0 *
+bit 98 I 1 IPAD95
+bit 97 I 1 PAD96
+bit 96 O 1 PAD96 95 0 Z
+bit 95 C 0 *
+bit 94 I 1 PAD97
+bit 93 O 1 PAD97 92 0 Z
+bit 92 C 0 *
+bit 91 I 1 PAD98
+bit 90 O 1 PAD98 89 0 Z
+bit 89 C 0 *
+bit 88 I 1 PAD99
+bit 87 O 1 PAD99 86 0 Z
+bit 86 C 0 *
+bit 85 O 1 *
+bit 84 O 1 *
+bit 83 O 1 *
+bit 82 O 1 *
+bit 81 O 1 *
+bit 80 O 1 *
+bit 79 O 1 *
+bit 78 O 1 *
+bit 77 O 1 *
+bit 76 O 1 *
+bit 75 O 1 *
+bit 74 I 1 PAD105
+bit 73 O 1 PAD105 72 0 Z
+bit 72 C 0 *
+bit 71 I 1 PAD106
+bit 70 O 1 PAD106 69 0 Z
+bit 69 C 0 *
+bit 68 I 1 PAD107
+bit 67 O 1 PAD107 66 0 Z
+bit 66 C 0 *
+bit 65 I 1 PAD108
+bit 64 O 1 PAD108 63 0 Z
+bit 63 C 0 *
+bit 62 I 1 PROG_B
+bit 61 I 1 PAD1
+bit 60 O 1 PAD1 59 0 Z
+bit 59 C 0 *
+bit 58 I 1 PAD2
+bit 57 O 1 PAD2 56 0 Z
+bit 56 C 0 *
+bit 55 O 1 *
+bit 54 O 1 *
+bit 53 O 1 *
+bit 52 O 1 *
+bit 51 O 1 *
+bit 50 O 1 *
+bit 49 O 1 *
+bit 48 O 1 *
+bit 47 I 1 PAD7
+bit 46 O 1 PAD7 45 0 Z
+bit 45 C 0 *
+bit 44 I 1 PAD8
+bit 43 O 1 PAD8 42 0 Z
+bit 42 C 0 *
+bit 41 I 1 PAD9
+bit 40 O 1 PAD9 39 0 Z
+bit 39 C 0 *
+bit 38 I 1 PAD10
+bit 37 O 1 PAD10 36 0 Z
+bit 36 C 0 *
+bit 35 I 1 PAD11
+bit 34 O 1 PAD11 33 0 Z
+bit 33 C 0 *
+bit 32 I 1 IPAD12
+bit 31 I 1 IPAD13
+bit 30 I 1 PAD14
+bit 29 O 1 PAD14 28 0 Z
+bit 28 C 0 *
+bit 27 I 1 PAD15
+bit 26 O 1 PAD15 25 0 Z
+bit 25 C 0 *
+bit 24 O 1 *
+bit 23 O 1 *
+bit 22 O 1 *
+bit 21 I 1 PAD17
+bit 20 O 1 PAD17 19 0 Z
+bit 19 C 0 *
+bit 18 I 1 PAD18
+bit 17 O 1 PAD18 16 0 Z
+bit 16 C 0 *
+bit 15 O 1 *
+bit 14 O 1 *
+bit 13 O 1 *
+bit 12 O 1 *
+bit 11 O 1 *
+bit 10 O 1 *
+bit 9 O 1 *
+bit 8 O 1 *
+bit 7 O 1 *
+bit 6 I 1 PAD24
+bit 5 O 1 PAD24 4 0 Z
+bit 4 C 0 *
+bit 3 I 1 PAD25
+bit 2 O 1 PAD25 1 0 Z
+bit 1 C 0 *
+bit 0 O 1 *
--- /dev/null
+0000 xc3s1500 0
--- /dev/null
+signal GND1
+signal GND2
+signal GND3
+signal GND4
+signal GND5
+signal GND6
+signal GND7
+signal GND8
+signal GND9
+signal GND10
+signal GND11
+signal GND12
+signal GND13
+signal GND14
+signal GND15
+signal GND16
+signal GND17
+signal GND18
+signal GND19
+signal GND20
+signal GND21
+signal GND22
+signal GND23
+signal GND24
+signal GND25
+signal GND26
+signal GND27
+signal GND28
+signal GND29
+signal GND30
+signal GND31
+signal GND32
+signal GND33
+signal GND34
+signal GND35
+signal GND36
+signal GND37
+signal GND38
+signal GND39
+signal GND40
+signal GND41
+signal GND42
+signal GND43
+signal GND44
+signal GND45
+signal GND46
+signal GND47
+signal GND48
+signal GND49
+signal GND50
+signal GND51
+signal GND52
+signal GND53
+signal GND54
+signal GND55
+signal GND56
+signal GND57
+signal GND58
+signal GND59
+signal GND60
+signal GND61
+signal GND62
+signal GND63
+signal GND64
+signal GND65
+signal GND66
+signal GND67
+signal GND68
+signal GND69
+signal GND70
+signal GND71
+signal GND72
+signal GND73
+signal GND74
+signal GND75
+signal GND76
+signal GND77
+signal GND78
+signal GND79
+signal GND80
+signal GND81
+signal GND82
+signal GND83
+signal GND84
+signal GND85
+signal CCLK_PAD458
+signal DONE_PAD457
+signal HSWAP_EN_PAD96
+signal M0_PAD267
+signal M1_PAD266
+signal M2_PAD268
+signal PROG_B
+signal TCK
+signal TDI
+signal TDO
+signal TMS
+signal VCCAUX1
+signal VCCAUX2
+signal VCCAUX3
+signal VCCAUX4
+signal VCCAUX5
+signal VCCAUX6
+signal VCCAUX7
+signal VCCAUX8
+signal VCCAUX9
+signal VCCAUX10
+signal VCCAUX11
+signal VCCAUX12
+signal VCCAUX13
+signal VCCAUX14
+signal VCCAUX15
+signal VCCAUX16
+signal VCCAUX17
+signal VCCAUX18
+signal VCCAUX19
+signal VCCAUX20
+signal VCCAUX21
+signal VCCAUX22
+signal VCCAUX23
+signal VCCAUX24
+signal VCCINT1
+signal VCCINT2
+signal VCCINT3
+signal VCCINT4
+signal VCCINT5
+signal VCCINT6
+signal VCCINT7
+signal VCCINT8
+signal VCCINT9
+signal VCCINT10
+signal VCCINT11
+signal VCCINT12
+signal VCCINT13
+signal VCCINT14
+signal VCCINT15
+signal VCCINT16
+signal VCCINT17
+signal VCCINT18
+signal VCCINT19
+signal VCCINT20
+signal VCCINT21
+signal VCCINT22
+signal VCCINT23
+signal VCCINT24
+signal VCCO01
+signal VCCO02
+signal VCCO03
+signal VCCO04
+signal VCCO05
+signal VCCO06
+signal VCCO07
+signal VCCO08
+signal VCCO09
+signal VCCO010
+signal VCCO11
+signal VCCO12
+signal VCCO13
+signal VCCO14
+signal VCCO15
+signal VCCO16
+signal VCCO17
+signal VCCO18
+signal VCCO19
+signal VCCO110
+signal VCCO21
+signal VCCO22
+signal VCCO23
+signal VCCO24
+signal VCCO25
+signal VCCO26
+signal VCCO27
+signal VCCO31
+signal VCCO32
+signal VCCO33
+signal VCCO34
+signal VCCO35
+signal VCCO36
+signal VCCO37
+signal VCCO41
+signal VCCO42
+signal VCCO43
+signal VCCO44
+signal VCCO45
+signal VCCO46
+signal VCCO47
+signal VCCO48
+signal VCCO49
+signal VCCO410
+signal VCCO51
+signal VCCO52
+signal VCCO53
+signal VCCO54
+signal VCCO55
+signal VCCO56
+signal VCCO57
+signal VCCO58
+signal VCCO59
+signal VCCO510
+signal VCCO61
+signal VCCO62
+signal VCCO63
+signal VCCO64
+signal VCCO65
+signal VCCO66
+signal VCCO67
+signal VCCO71
+signal VCCO72
+signal VCCO73
+signal VCCO74
+signal VCCO75
+signal VCCO76
+signal VCCO77
+signal IO_PAD2
+signal IO_PAD3
+signal IO_PAD4
+signal IO_PAD6
+signal IO_PAD8
+signal IO_PAD9
+signal IO_PAD10
+signal IO_PAD12
+signal IO_PAD13
+signal IO_PAD14
+signal IO_PAD16
+signal IO_PAD18
+signal IO_PAD20
+signal IO_PAD22
+signal IO_PAD23
+signal IO_PAD24
+signal IO_PAD25
+signal IO_PAD26
+signal IO_PAD28
+signal IO_PAD30
+signal IO_PAD31
+signal IO_PAD32
+signal IO_PAD33
+signal IO_PAD34
+signal IO_PAD35
+signal IO_PAD36
+signal IO_PAD38
+signal IO_PAD40
+signal IO_PAD42
+signal IO_PAD44
+signal IO_PAD46
+signal IO_PAD48
+signal IO_PAD49
+signal IO_PAD50
+signal IO_PAD51
+signal IO_PAD52
+signal IO_PAD54
+signal IO_PAD56
+signal IO_PAD57
+signal IO_PAD58
+signal IO_PAD60
+signal IO_PAD61
+signal IO_PAD62
+signal IO_PAD64
+signal IO_PAD65
+signal IO_PAD66
+signal IO_PAD68
+signal IO_PAD70
+signal IO_PAD72
+signal IO_PAD74
+signal IO_PAD75
+signal IO_PAD76
+signal IO_PAD77
+signal IO_PAD78
+signal IO_PAD80
+signal IO_PAD82
+signal IO_PAD83
+signal IO_PAD84
+signal IO_PAD85
+signal IO_PAD86
+signal IO_PAD88
+signal IO_PAD89
+signal IO_PAD93
+signal IO_PAD94
+signal IO_PAD95
+signal IO_PAD100
+signal IO_PAD101
+signal IO_PAD102
+signal IO_PAD103
+signal IO_PAD104
+signal IO_PAD105
+signal IO_PAD106
+signal IO_PAD108
+signal IO_PAD109
+signal IO_PAD110
+signal IO_PAD111
+signal IO_PAD112
+signal IO_PAD114
+signal IO_PAD116
+signal IO_PAD118
+signal IO_PAD120
+signal IO_PAD121
+signal IO_PAD122
+signal IO_PAD124
+signal IO_PAD125
+signal IO_PAD126
+signal IO_PAD128
+signal IO_PAD129
+signal IO_PAD130
+signal IO_PAD132
+signal IO_PAD134
+signal IO_PAD135
+signal IO_PAD136
+signal IO_PAD137
+signal IO_PAD138
+signal IO_PAD140
+signal IO_PAD142
+signal IO_PAD144
+signal IO_PAD146
+signal IO_PAD147
+signal IO_PAD148
+signal IO_PAD150
+signal IO_PAD152
+signal IO_PAD153
+signal IO_PAD154
+signal IO_PAD155
+signal IO_PAD156
+signal IO_PAD157
+signal IO_PAD158
+signal IO_PAD159
+signal IO_PAD160
+signal IO_PAD161
+signal IO_PAD162
+signal IO_PAD163
+signal IO_PAD164
+signal IO_PAD166
+signal IO_PAD168
+signal IO_PAD170
+signal IO_PAD172
+signal IO_PAD174
+signal IO_PAD175
+signal IO_PAD176
+signal IO_PAD178
+signal IO_PAD180
+signal IO_PAD181
+signal IO_PAD183
+signal IO_PAD184
+signal IO_PAD186
+signal IO_PAD188
+signal IO_PAD189
+signal IO_PAD190
+signal IO_PAD192
+signal IO_PAD194
+signal IO_PAD196
+signal IO_PAD198
+signal IO_PAD200
+signal IO_PAD201
+signal IO_PAD202
+signal IO_PAD203
+signal IO_PAD204
+signal IO_PAD205
+signal IO_PAD206
+signal IO_PAD207
+signal IO_PAD208
+signal IO_PAD209
+signal IO_PAD210
+signal IO_PAD211
+signal IO_PAD212
+signal IO_PAD214
+signal IO_PAD216
+signal IO_PAD217
+signal IO_PAD218
+signal IO_PAD220
+signal IO_PAD222
+signal IO_PAD224
+signal IO_PAD226
+signal IO_PAD227
+signal IO_PAD228
+signal IO_PAD229
+signal IO_PAD230
+signal IO_PAD232
+signal IO_PAD234
+signal IO_PAD235
+signal IO_PAD236
+signal IO_PAD238
+signal IO_PAD239
+signal IO_PAD240
+signal IO_PAD242
+signal IO_PAD243
+signal IO_PAD244
+signal IO_PAD246
+signal IO_PAD248
+signal IO_PAD250
+signal IO_PAD252
+signal IO_PAD253
+signal IO_PAD254
+signal IO_PAD255
+signal IO_PAD256
+signal IO_PAD258
+signal IO_PAD259
+signal IO_PAD260
+signal IO_PAD261
+signal IO_PAD262
+signal IO_PAD263
+signal IO_PAD264
+signal IO_PAD269
+signal IO_PAD270
+signal IO_PAD274
+signal IO_PAD275
+signal IO_PAD276
+signal IO_PAD278
+signal IO_PAD279
+signal IO_PAD280
+signal IO_PAD281
+signal IO_PAD282
+signal IO_PAD284
+signal IO_PAD286
+signal IO_PAD287
+signal IO_PAD288
+signal IO_PAD289
+signal IO_PAD290
+signal IO_PAD292
+signal IO_PAD294
+signal IO_PAD296
+signal IO_PAD298
+signal IO_PAD299
+signal IO_PAD300
+signal IO_PAD302
+signal IO_PAD303
+signal IO_PAD304
+signal IO_PAD306
+signal IO_PAD307
+signal IO_PAD308
+signal IO_PAD310
+signal IO_PAD312
+signal IO_PAD313
+signal IO_PAD314
+signal IO_PAD315
+signal IO_PAD316
+signal IO_PAD318
+signal IO_PAD320
+signal IO_PAD322
+signal IO_PAD324
+signal IO_PAD326
+signal IO_PAD328
+signal IO_PAD329
+signal IO_PAD330
+signal IO_PAD331
+signal IO_PAD332
+signal IO_PAD333
+signal IO_PAD334
+signal IO_PAD336
+signal IO_PAD338
+signal IO_PAD339
+signal IO_PAD340
+signal IO_PAD341
+signal IO_PAD342
+signal IO_PAD344
+signal IO_PAD346
+signal IO_PAD348
+signal IO_PAD350
+signal IO_PAD351
+signal IO_PAD352
+signal IO_PAD354
+signal IO_PAD355
+signal IO_PAD356
+signal IO_PAD358
+signal IO_PAD360
+signal IO_PAD361
+signal IO_PAD362
+signal IO_PAD364
+signal IO_PAD365
+signal IO_PAD366
+signal IO_PAD368
+signal IO_PAD370
+signal IO_PAD371
+signal IO_PAD372
+signal IO_PAD374
+signal IO_PAD375
+signal IO_PAD376
+signal IO_PAD378
+signal IO_PAD380
+signal IO_PAD382
+signal IO_PAD384
+signal IO_PAD385
+signal IO_PAD386
+signal IO_PAD387
+signal IO_PAD388
+signal IO_PAD390
+signal IO_PAD392
+signal IO_PAD393
+signal IO_PAD394
+signal IO_PAD395
+signal IO_PAD396
+signal IO_PAD397
+signal IO_PAD398
+signal IO_PAD400
+signal IO_PAD402
+signal IO_PAD404
+signal IO_PAD406
+signal IO_PAD408
+signal IO_PAD410
+signal IO_PAD411
+signal IO_PAD412
+signal IO_PAD413
+signal IO_PAD414
+signal IO_PAD416
+signal IO_PAD418
+signal IO_PAD419
+signal IO_PAD420
+signal IO_PAD422
+signal IO_PAD423
+signal IO_PAD424
+signal IO_PAD426
+signal IO_PAD427
+signal IO_PAD428
+signal IO_PAD430
+signal IO_PAD432
+signal IO_PAD434
+signal IO_PAD436
+signal IO_PAD437
+signal IO_PAD438
+signal IO_PAD439
+signal IO_PAD440
+signal IO_PAD442
+signal IO_PAD444
+signal IO_PAD445
+signal IO_PAD446
+signal IO_PAD447
+signal IO_PAD448
+signal IO_PAD450
+signal IO_PAD451
+signal IO_PAD454
+signal IO_PAD455
+signal IO_PAD456
+signal IO_PAD461
+signal IO_PAD462
+signal IO_PAD463
+signal IO_PAD464
+signal IO_PAD465
+signal IO_PAD466
+signal IO_PAD467
+signal IO_PAD469
+signal IO_PAD470
+signal IO_PAD471
+signal IO_PAD472
+signal IO_PAD473
+signal IO_PAD475
+signal IO_PAD477
+signal IO_PAD479
+signal IO_PAD481
+signal IO_PAD482
+signal IO_PAD483
+signal IO_PAD485
+signal IO_PAD486
+signal IO_PAD487
+signal IO_PAD489
+signal IO_PAD490
+signal IO_PAD491
+signal IO_PAD493
+signal IO_PAD495
+signal IO_PAD496
+signal IO_PAD497
+signal IO_PAD498
+signal IO_PAD499
+signal IO_PAD501
+signal IO_PAD503
+signal IO_PAD505
+signal IO_PAD507
+signal IO_PAD508
+signal IO_PAD509
+signal IO_PAD511
+signal IO_PAD513
+signal IO_PAD514
+signal IO_PAD515
+signal IO_PAD516
+signal IO_PAD517
+signal IO_PAD518
+signal IO_PAD519
+signal IO_PAD520
+signal IO_PAD521
+signal IO_PAD522
+signal IO_PAD523
+signal IO_PAD524
+signal IO_PAD525
+signal IO_PAD527
+signal IO_PAD529
+signal IO_PAD531
+signal IO_PAD533
+signal IO_PAD535
+signal IO_PAD536
+signal IO_PAD537
+signal IO_PAD539
+signal IO_PAD541
+signal IO_PAD542
+signal IO_PAD544
+signal IO_PAD545
+signal IO_PAD547
+signal IO_PAD549
+signal IO_PAD550
+signal IO_PAD551
+signal IO_PAD553
+signal IO_PAD555
+signal IO_PAD557
+signal IO_PAD559
+signal IO_PAD561
+signal IO_PAD562
+signal IO_PAD563
+signal IO_PAD564
+signal IO_PAD565
+signal IO_PAD566
+signal IO_PAD567
+signal IO_PAD568
+signal IO_PAD569
+signal IO_PAD570
+signal IO_PAD571
+signal IO_PAD572
+signal IO_PAD573
+signal IO_PAD575
+signal IO_PAD577
+signal IO_PAD578
+signal IO_PAD579
+signal IO_PAD581
+signal IO_PAD583
+signal IO_PAD585
+signal IO_PAD587
+signal IO_PAD588
+signal IO_PAD589
+signal IO_PAD590
+signal IO_PAD591
+signal IO_PAD593
+signal IO_PAD595
+signal IO_PAD596
+signal IO_PAD597
+signal IO_PAD599
+signal IO_PAD600
+signal IO_PAD601
+signal IO_PAD603
+signal IO_PAD604
+signal IO_PAD605
+signal IO_PAD607
+signal IO_PAD609
+signal IO_PAD611
+signal IO_PAD613
+signal IO_PAD614
+signal IO_PAD615
+signal IO_PAD616
+signal IO_PAD617
+signal IO_PAD619
+signal IO_PAD620
+signal IO_PAD621
+signal IO_PAD622
+signal IO_PAD623
+signal IO_PAD624
+signal IO_PAD625
+signal IO_PAD630
+signal IO_PAD631
+signal IO_PAD633
+signal IO_PAD634
+signal IO_PAD635
+signal IO_PAD637
+signal IO_PAD638
+signal IO_PAD639
+signal IO_PAD640
+signal IO_PAD641
+signal IO_PAD643
+signal IO_PAD645
+signal IO_PAD646
+signal IO_PAD647
+signal IO_PAD648
+signal IO_PAD649
+signal IO_PAD651
+signal IO_PAD653
+signal IO_PAD655
+signal IO_PAD657
+signal IO_PAD658
+signal IO_PAD659
+signal IO_PAD661
+signal IO_PAD662
+signal IO_PAD663
+signal IO_PAD665
+signal IO_PAD666
+signal IO_PAD667
+signal IO_PAD669
+signal IO_PAD671
+signal IO_PAD672
+signal IO_PAD673
+signal IO_PAD674
+signal IO_PAD675
+signal IO_PAD677
+signal IO_PAD679
+signal IO_PAD681
+signal IO_PAD683
+signal IO_PAD685
+signal IO_PAD687
+signal IO_PAD688
+signal IO_PAD689
+signal IO_PAD690
+signal IO_PAD691
+signal IO_PAD692
+signal IO_PAD693
+signal IO_PAD695
+signal IO_PAD697
+signal IO_PAD698
+signal IO_PAD699
+signal IO_PAD700
+signal IO_PAD701
+signal IO_PAD703
+signal IO_PAD705
+signal IO_PAD707
+signal IO_PAD709
+signal IO_PAD710
+signal IO_PAD711
+signal IO_PAD713
+signal IO_PAD714
+signal IO_PAD715
+signal IO_PAD717
+signal IO_PAD719
+signal IO_PAD720
+
+register BSR 1559
+register BR 1
+register DIR 32
+
+instruction length 6
+
+instruction EXTEST 000000 BSR
+instruction SAMPLE/PRELOAD 000001 BSR
+instruction IDCODE 001001 DIR
+instruction BYPASS 111111 BR
+
+bit 1558 I 1 IO_PAD625
+bit 1557 O 1 IO_PAD625 1556 1 Z
+bit 1556 C 1 *
+bit 1555 I 1 IO_PAD624
+bit 1554 O 1 IO_PAD624 1553 1 Z
+bit 1553 C 1 *
+bit 1552 I 1 IO_PAD623
+bit 1551 O 1 IO_PAD623 1550 1 Z
+bit 1550 C 1 *
+bit 1549 I 1 IO_PAD622
+bit 1548 O 1 IO_PAD622 1547 1 Z
+bit 1547 C 1 *
+bit 1546 I 1 IO_PAD621
+bit 1545 O 1 IO_PAD621 1544 1 Z
+bit 1544 C 1 *
+bit 1543 I 1 IO_PAD620
+bit 1542 O 1 IO_PAD620 1541 1 Z
+bit 1541 C 1 *
+bit 1540 I 1 IO_PAD619
+bit 1539 O 1 IO_PAD619 1538 1 Z
+bit 1538 C 1 *
+bit 1537 I 1 IO_PAD617
+bit 1536 O 1 IO_PAD617 1535 1 Z
+bit 1535 C 1 *
+bit 1534 I 1 IO_PAD616
+bit 1533 O 1 IO_PAD616 1532 1 Z
+bit 1532 C 1 *
+bit 1531 I 1 IO_PAD615
+bit 1530 O 1 IO_PAD615 1529 1 Z
+bit 1529 C 1 *
+bit 1528 I 1 IO_PAD614
+bit 1527 O 1 IO_PAD614 1526 1 Z
+bit 1526 C 1 *
+bit 1525 I 1 IO_PAD613
+bit 1524 O 1 IO_PAD613 1523 1 Z
+bit 1523 C 1 *
+bit 1522 I 1 IO_PAD611
+bit 1521 O 1 IO_PAD611 1520 1 Z
+bit 1520 C 1 *
+bit 1519 I 1 IO_PAD609
+bit 1518 O 1 IO_PAD609 1517 1 Z
+bit 1517 C 1 *
+bit 1516 I 1 IO_PAD607
+bit 1515 O 1 IO_PAD607 1514 1 Z
+bit 1514 C 1 *
+bit 1513 I 1 IO_PAD605
+bit 1512 O 1 IO_PAD605 1511 1 Z
+bit 1511 C 1 *
+bit 1510 I 1 IO_PAD604
+bit 1509 O 1 IO_PAD604 1508 1 Z
+bit 1508 C 1 *
+bit 1507 I 1 IO_PAD603
+bit 1506 O 1 IO_PAD603 1505 1 Z
+bit 1505 C 1 *
+bit 1504 I 1 IO_PAD601
+bit 1503 O 1 IO_PAD601 1502 1 Z
+bit 1502 C 1 *
+bit 1501 I 1 IO_PAD600
+bit 1500 O 1 IO_PAD600 1499 1 Z
+bit 1499 C 1 *
+bit 1498 I 1 IO_PAD599
+bit 1497 O 1 IO_PAD599 1496 1 Z
+bit 1496 C 1 *
+bit 1495 I 1 IO_PAD597
+bit 1494 O 1 IO_PAD597 1493 1 Z
+bit 1493 C 1 *
+bit 1492 I 1 IO_PAD596
+bit 1491 O 1 IO_PAD596 1490 1 Z
+bit 1490 C 1 *
+bit 1489 I 1 IO_PAD595
+bit 1488 O 1 IO_PAD595 1487 1 Z
+bit 1487 C 1 *
+bit 1486 I 1 IO_PAD593
+bit 1485 O 1 IO_PAD593 1484 1 Z
+bit 1484 C 1 *
+bit 1483 I 1 IO_PAD591
+bit 1482 O 1 IO_PAD591 1481 1 Z
+bit 1481 C 1 *
+bit 1480 I 1 IO_PAD590
+bit 1479 O 1 IO_PAD590 1478 1 Z
+bit 1478 C 1 *
+bit 1477 I 1 IO_PAD589
+bit 1476 O 1 IO_PAD589 1475 1 Z
+bit 1475 C 1 *
+bit 1474 I 1 IO_PAD588
+bit 1473 O 1 IO_PAD588 1472 1 Z
+bit 1472 C 1 *
+bit 1471 I 1 IO_PAD587
+bit 1470 O 1 IO_PAD587 1469 1 Z
+bit 1469 C 1 *
+bit 1468 I 1 IO_PAD585
+bit 1467 O 1 IO_PAD585 1466 1 Z
+bit 1466 C 1 *
+bit 1465 I 1 IO_PAD583
+bit 1464 O 1 IO_PAD583 1463 1 Z
+bit 1463 C 1 *
+bit 1462 I 1 IO_PAD581
+bit 1461 O 1 IO_PAD581 1460 1 Z
+bit 1460 C 1 *
+bit 1459 I 1 IO_PAD579
+bit 1458 O 1 IO_PAD579 1457 1 Z
+bit 1457 C 1 *
+bit 1456 I 1 IO_PAD578
+bit 1455 O 1 IO_PAD578 1454 1 Z
+bit 1454 C 1 *
+bit 1453 I 1 IO_PAD577
+bit 1452 O 1 IO_PAD577 1451 1 Z
+bit 1451 C 1 *
+bit 1450 I 1 IO_PAD575
+bit 1449 O 1 IO_PAD575 1448 1 Z
+bit 1448 C 1 *
+bit 1447 I 1 IO_PAD573
+bit 1446 O 1 IO_PAD573 1445 1 Z
+bit 1445 C 1 *
+bit 1444 I 1 IO_PAD572
+bit 1443 O 1 IO_PAD572 1442 1 Z
+bit 1442 C 1 *
+bit 1441 I 1 IO_PAD571
+bit 1440 O 1 IO_PAD571 1439 1 Z
+bit 1439 C 1 *
+bit 1438 I 1 IO_PAD570
+bit 1437 O 1 IO_PAD570 1436 1 Z
+bit 1436 C 1 *
+bit 1435 I 1 IO_PAD569
+bit 1434 O 1 IO_PAD569 1433 1 Z
+bit 1433 C 1 *
+bit 1432 I 1 IO_PAD568
+bit 1431 O 1 IO_PAD568 1430 1 Z
+bit 1430 C 1 *
+bit 1429 I 1 IO_PAD567
+bit 1428 O 1 IO_PAD567 1427 1 Z
+bit 1427 C 1 *
+bit 1426 O 1 *
+bit 1425 O 1 *
+bit 1424 O 1 *
+bit 1423 O 1 *
+bit 1422 O 1 *
+bit 1421 O 1 *
+bit 1420 I 1 IO_PAD566
+bit 1419 O 1 IO_PAD566 1418 1 Z
+bit 1418 C 1 *
+bit 1417 I 1 IO_PAD565
+bit 1416 O 1 IO_PAD565 1415 1 Z
+bit 1415 C 1 *
+bit 1414 I 1 IO_PAD564
+bit 1413 O 1 IO_PAD564 1412 1 Z
+bit 1412 C 1 *
+bit 1411 I 1 IO_PAD563
+bit 1410 O 1 IO_PAD563 1409 1 Z
+bit 1409 C 1 *
+bit 1408 I 1 IO_PAD562
+bit 1407 O 1 IO_PAD562 1406 1 Z
+bit 1406 C 1 *
+bit 1405 I 1 IO_PAD561
+bit 1404 O 1 IO_PAD561 1403 1 Z
+bit 1403 C 1 *
+bit 1402 I 1 IO_PAD559
+bit 1401 O 1 IO_PAD559 1400 1 Z
+bit 1400 C 1 *
+bit 1399 I 1 IO_PAD557
+bit 1398 O 1 IO_PAD557 1397 1 Z
+bit 1397 C 1 *
+bit 1396 I 1 IO_PAD555
+bit 1395 O 1 IO_PAD555 1394 1 Z
+bit 1394 C 1 *
+bit 1393 I 1 IO_PAD553
+bit 1392 O 1 IO_PAD553 1391 1 Z
+bit 1391 C 1 *
+bit 1390 O 1 *
+bit 1389 O 1 *
+bit 1388 O 1 *
+bit 1387 O 1 *
+bit 1386 O 1 *
+bit 1385 O 1 *
+bit 1384 I 1 IO_PAD551
+bit 1383 O 1 IO_PAD551 1382 1 Z
+bit 1382 C 1 *
+bit 1381 I 1 IO_PAD550
+bit 1380 O 1 IO_PAD550 1379 1 Z
+bit 1379 C 1 *
+bit 1378 I 1 IO_PAD549
+bit 1377 O 1 IO_PAD549 1376 1 Z
+bit 1376 C 1 *
+bit 1375 I 1 IO_PAD547
+bit 1374 O 1 IO_PAD547 1373 1 Z
+bit 1373 C 1 *
+bit 1372 I 1 IO_PAD545
+bit 1371 O 1 IO_PAD545 1370 1 Z
+bit 1370 C 1 *
+bit 1369 I 1 IO_PAD544
+bit 1368 O 1 IO_PAD544 1367 1 Z
+bit 1367 C 1 *
+bit 1366 I 1 IO_PAD542
+bit 1365 O 1 IO_PAD542 1364 1 Z
+bit 1364 C 1 *
+bit 1363 I 1 IO_PAD541
+bit 1362 O 1 IO_PAD541 1361 1 Z
+bit 1361 C 1 *
+bit 1360 I 1 IO_PAD539
+bit 1359 O 1 IO_PAD539 1358 1 Z
+bit 1358 C 1 *
+bit 1357 I 1 IO_PAD537
+bit 1356 O 1 IO_PAD537 1355 1 Z
+bit 1355 C 1 *
+bit 1354 I 1 IO_PAD536
+bit 1353 O 1 IO_PAD536 1352 1 Z
+bit 1352 C 1 *
+bit 1351 I 1 IO_PAD535
+bit 1350 O 1 IO_PAD535 1349 1 Z
+bit 1349 C 1 *
+bit 1348 O 1 *
+bit 1347 O 1 *
+bit 1346 O 1 *
+bit 1345 O 1 *
+bit 1344 O 1 *
+bit 1343 O 1 *
+bit 1342 I 1 IO_PAD533
+bit 1341 O 1 IO_PAD533 1340 1 Z
+bit 1340 C 1 *
+bit 1339 I 1 IO_PAD531
+bit 1338 O 1 IO_PAD531 1337 1 Z
+bit 1337 C 1 *
+bit 1336 I 1 IO_PAD529
+bit 1335 O 1 IO_PAD529 1334 1 Z
+bit 1334 C 1 *
+bit 1333 I 1 IO_PAD527
+bit 1332 O 1 IO_PAD527 1331 1 Z
+bit 1331 C 1 *
+bit 1330 I 1 IO_PAD525
+bit 1329 O 1 IO_PAD525 1328 1 Z
+bit 1328 C 1 *
+bit 1327 I 1 IO_PAD524
+bit 1326 O 1 IO_PAD524 1325 1 Z
+bit 1325 C 1 *
+bit 1324 I 1 IO_PAD523
+bit 1323 O 1 IO_PAD523 1322 1 Z
+bit 1322 C 1 *
+bit 1321 I 1 IO_PAD522
+bit 1320 O 1 IO_PAD522 1319 1 Z
+bit 1319 C 1 *
+bit 1318 I 1 IO_PAD521
+bit 1317 O 1 IO_PAD521 1316 1 Z
+bit 1316 C 1 *
+bit 1315 I 1 IO_PAD520
+bit 1314 O 1 IO_PAD520 1313 1 Z
+bit 1313 C 1 *
+bit 1312 O 1 *
+bit 1311 O 1 *
+bit 1310 O 1 *
+bit 1309 O 1 *
+bit 1308 O 1 *
+bit 1307 O 1 *
+bit 1306 I 1 IO_PAD519
+bit 1305 O 1 IO_PAD519 1304 1 Z
+bit 1304 C 1 *
+bit 1303 I 1 IO_PAD518
+bit 1302 O 1 IO_PAD518 1301 1 Z
+bit 1301 C 1 *
+bit 1300 I 1 IO_PAD517
+bit 1299 O 1 IO_PAD517 1298 1 Z
+bit 1298 C 1 *
+bit 1297 I 1 IO_PAD516
+bit 1296 O 1 IO_PAD516 1295 1 Z
+bit 1295 C 1 *
+bit 1294 I 1 IO_PAD515
+bit 1293 O 1 IO_PAD515 1292 1 Z
+bit 1292 C 1 *
+bit 1291 I 1 IO_PAD514
+bit 1290 O 1 IO_PAD514 1289 1 Z
+bit 1289 C 1 *
+bit 1288 I 1 IO_PAD513
+bit 1287 O 1 IO_PAD513 1286 1 Z
+bit 1286 C 1 *
+bit 1285 I 1 IO_PAD511
+bit 1284 O 1 IO_PAD511 1283 1 Z
+bit 1283 C 1 *
+bit 1282 I 1 IO_PAD509
+bit 1281 O 1 IO_PAD509 1280 1 Z
+bit 1280 C 1 *
+bit 1279 I 1 IO_PAD508
+bit 1278 O 1 IO_PAD508 1277 1 Z
+bit 1277 C 1 *
+bit 1276 I 1 IO_PAD507
+bit 1275 O 1 IO_PAD507 1274 1 Z
+bit 1274 C 1 *
+bit 1273 I 1 IO_PAD505
+bit 1272 O 1 IO_PAD505 1271 1 Z
+bit 1271 C 1 *
+bit 1270 I 1 IO_PAD503
+bit 1269 O 1 IO_PAD503 1268 1 Z
+bit 1268 C 1 *
+bit 1267 I 1 IO_PAD501
+bit 1266 O 1 IO_PAD501 1265 1 Z
+bit 1265 C 1 *
+bit 1264 I 1 IO_PAD499
+bit 1263 O 1 IO_PAD499 1262 1 Z
+bit 1262 C 1 *
+bit 1261 I 1 IO_PAD498
+bit 1260 O 1 IO_PAD498 1259 1 Z
+bit 1259 C 1 *
+bit 1258 I 1 IO_PAD497
+bit 1257 O 1 IO_PAD497 1256 1 Z
+bit 1256 C 1 *
+bit 1255 I 1 IO_PAD496
+bit 1254 O 1 IO_PAD496 1253 1 Z
+bit 1253 C 1 *
+bit 1252 I 1 IO_PAD495
+bit 1251 O 1 IO_PAD495 1250 1 Z
+bit 1250 C 1 *
+bit 1249 I 1 IO_PAD493
+bit 1248 O 1 IO_PAD493 1247 1 Z
+bit 1247 C 1 *
+bit 1246 I 1 IO_PAD491
+bit 1245 O 1 IO_PAD491 1244 1 Z
+bit 1244 C 1 *
+bit 1243 I 1 IO_PAD490
+bit 1242 O 1 IO_PAD490 1241 1 Z
+bit 1241 C 1 *
+bit 1240 I 1 IO_PAD489
+bit 1239 O 1 IO_PAD489 1238 1 Z
+bit 1238 C 1 *
+bit 1237 I 1 IO_PAD487
+bit 1236 O 1 IO_PAD487 1235 1 Z
+bit 1235 C 1 *
+bit 1234 I 1 IO_PAD486
+bit 1233 O 1 IO_PAD486 1232 1 Z
+bit 1232 C 1 *
+bit 1231 I 1 IO_PAD485
+bit 1230 O 1 IO_PAD485 1229 1 Z
+bit 1229 C 1 *
+bit 1228 I 1 IO_PAD483
+bit 1227 O 1 IO_PAD483 1226 1 Z
+bit 1226 C 1 *
+bit 1225 I 1 IO_PAD482
+bit 1224 O 1 IO_PAD482 1223 1 Z
+bit 1223 C 1 *
+bit 1222 I 1 IO_PAD481
+bit 1221 O 1 IO_PAD481 1220 1 Z
+bit 1220 C 1 *
+bit 1219 I 1 IO_PAD479
+bit 1218 O 1 IO_PAD479 1217 1 Z
+bit 1217 C 1 *
+bit 1216 I 1 IO_PAD477
+bit 1215 O 1 IO_PAD477 1214 1 Z
+bit 1214 C 1 *
+bit 1213 I 1 IO_PAD475
+bit 1212 O 1 IO_PAD475 1211 1 Z
+bit 1211 C 1 *
+bit 1210 I 1 IO_PAD473
+bit 1209 O 1 IO_PAD473 1208 1 Z
+bit 1208 C 1 *
+bit 1207 I 1 IO_PAD472
+bit 1206 O 1 IO_PAD472 1205 1 Z
+bit 1205 C 1 *
+bit 1204 I 1 IO_PAD471
+bit 1203 O 1 IO_PAD471 1202 1 Z
+bit 1202 C 1 *
+bit 1201 I 1 IO_PAD470
+bit 1200 O 1 IO_PAD470 1199 1 Z
+bit 1199 C 1 *
+bit 1198 I 1 IO_PAD469
+bit 1197 O 1 IO_PAD469 1196 1 Z
+bit 1196 C 1 *
+bit 1195 I 1 IO_PAD467
+bit 1194 O 1 IO_PAD467 1193 1 Z
+bit 1193 C 1 *
+bit 1192 I 1 IO_PAD466
+bit 1191 O 1 IO_PAD466 1190 1 Z
+bit 1190 C 1 *
+bit 1189 I 1 IO_PAD465
+bit 1188 O 1 IO_PAD465 1187 1 Z
+bit 1187 C 1 *
+bit 1186 I 1 IO_PAD464
+bit 1185 O 1 IO_PAD464 1184 1 Z
+bit 1184 C 1 *
+bit 1183 I 1 IO_PAD463
+bit 1182 O 1 IO_PAD463 1181 1 Z
+bit 1181 C 1 *
+bit 1180 I 1 IO_PAD462
+bit 1179 O 1 IO_PAD462 1178 1 Z
+bit 1178 C 1 *
+bit 1177 I 1 IO_PAD461
+bit 1176 O 1 IO_PAD461 1175 1 Z
+bit 1175 C 1 *
+bit 1174 I 1 CCLK_PAD458
+bit 1173 O 1 CCLK_PAD458 1172 1 Z
+bit 1172 C 1 *
+bit 1171 I 1 DONE_PAD457
+bit 1170 O 1 DONE_PAD457 1169 1 Z
+bit 1169 C 1 *
+bit 1168 I 1 IO_PAD456
+bit 1167 O 1 IO_PAD456 1166 1 Z
+bit 1166 C 1 *
+bit 1165 I 1 IO_PAD455
+bit 1164 O 1 IO_PAD455 1163 1 Z
+bit 1163 C 1 *
+bit 1162 I 1 IO_PAD454
+bit 1161 O 1 IO_PAD454 1160 1 Z
+bit 1160 C 1 *
+bit 1159 I 1 IO_PAD451
+bit 1158 O 1 IO_PAD451 1157 1 Z
+bit 1157 C 1 *
+bit 1156 I 1 IO_PAD450
+bit 1155 O 1 IO_PAD450 1154 1 Z
+bit 1154 C 1 *
+bit 1153 I 1 IO_PAD448
+bit 1152 O 1 IO_PAD448 1151 1 Z
+bit 1151 C 1 *
+bit 1150 I 1 IO_PAD447
+bit 1149 O 1 IO_PAD447 1148 1 Z
+bit 1148 C 1 *
+bit 1147 I 1 IO_PAD446
+bit 1146 O 1 IO_PAD446 1145 1 Z
+bit 1145 C 1 *
+bit 1144 I 1 IO_PAD445
+bit 1143 O 1 IO_PAD445 1142 1 Z
+bit 1142 C 1 *
+bit 1141 I 1 IO_PAD444
+bit 1140 O 1 IO_PAD444 1139 1 Z
+bit 1139 C 1 *
+bit 1138 I 1 IO_PAD442
+bit 1137 O 1 IO_PAD442 1136 1 Z
+bit 1136 C 1 *
+bit 1135 I 1 IO_PAD440
+bit 1134 O 1 IO_PAD440 1133 1 Z
+bit 1133 C 1 *
+bit 1132 I 1 IO_PAD439
+bit 1131 O 1 IO_PAD439 1130 1 Z
+bit 1130 C 1 *
+bit 1129 I 1 IO_PAD438
+bit 1128 O 1 IO_PAD438 1127 1 Z
+bit 1127 C 1 *
+bit 1126 I 1 IO_PAD437
+bit 1125 O 1 IO_PAD437 1124 1 Z
+bit 1124 C 1 *
+bit 1123 I 1 IO_PAD436
+bit 1122 O 1 IO_PAD436 1121 1 Z
+bit 1121 C 1 *
+bit 1120 I 1 IO_PAD434
+bit 1119 O 1 IO_PAD434 1118 1 Z
+bit 1118 C 1 *
+bit 1117 I 1 IO_PAD432
+bit 1116 O 1 IO_PAD432 1115 1 Z
+bit 1115 C 1 *
+bit 1114 I 1 IO_PAD430
+bit 1113 O 1 IO_PAD430 1112 1 Z
+bit 1112 C 1 *
+bit 1111 I 1 IO_PAD428
+bit 1110 O 1 IO_PAD428 1109 1 Z
+bit 1109 C 1 *
+bit 1108 I 1 IO_PAD427
+bit 1107 O 1 IO_PAD427 1106 1 Z
+bit 1106 C 1 *
+bit 1105 I 1 IO_PAD426
+bit 1104 O 1 IO_PAD426 1103 1 Z
+bit 1103 C 1 *
+bit 1102 I 1 IO_PAD424
+bit 1101 O 1 IO_PAD424 1100 1 Z
+bit 1100 C 1 *
+bit 1099 I 1 IO_PAD423
+bit 1098 O 1 IO_PAD423 1097 1 Z
+bit 1097 C 1 *
+bit 1096 I 1 IO_PAD422
+bit 1095 O 1 IO_PAD422 1094 1 Z
+bit 1094 C 1 *
+bit 1093 I 1 IO_PAD420
+bit 1092 O 1 IO_PAD420 1091 1 Z
+bit 1091 C 1 *
+bit 1090 I 1 IO_PAD419
+bit 1089 O 1 IO_PAD419 1088 1 Z
+bit 1088 C 1 *
+bit 1087 I 1 IO_PAD418
+bit 1086 O 1 IO_PAD418 1085 1 Z
+bit 1085 C 1 *
+bit 1084 I 1 IO_PAD416
+bit 1083 O 1 IO_PAD416 1082 1 Z
+bit 1082 C 1 *
+bit 1081 I 1 IO_PAD414
+bit 1080 O 1 IO_PAD414 1079 1 Z
+bit 1079 C 1 *
+bit 1078 I 1 IO_PAD413
+bit 1077 O 1 IO_PAD413 1076 1 Z
+bit 1076 C 1 *
+bit 1075 I 1 IO_PAD412
+bit 1074 O 1 IO_PAD412 1073 1 Z
+bit 1073 C 1 *
+bit 1072 I 1 IO_PAD411
+bit 1071 O 1 IO_PAD411 1070 1 Z
+bit 1070 C 1 *
+bit 1069 I 1 IO_PAD410
+bit 1068 O 1 IO_PAD410 1067 1 Z
+bit 1067 C 1 *
+bit 1066 I 1 IO_PAD408
+bit 1065 O 1 IO_PAD408 1064 1 Z
+bit 1064 C 1 *
+bit 1063 I 1 IO_PAD406
+bit 1062 O 1 IO_PAD406 1061 1 Z
+bit 1061 C 1 *
+bit 1060 I 1 IO_PAD404
+bit 1059 O 1 IO_PAD404 1058 1 Z
+bit 1058 C 1 *
+bit 1057 I 1 IO_PAD402
+bit 1056 O 1 IO_PAD402 1055 1 Z
+bit 1055 C 1 *
+bit 1054 I 1 IO_PAD400
+bit 1053 O 1 IO_PAD400 1052 1 Z
+bit 1052 C 1 *
+bit 1051 I 1 IO_PAD398
+bit 1050 O 1 IO_PAD398 1049 1 Z
+bit 1049 C 1 *
+bit 1048 I 1 IO_PAD397
+bit 1047 O 1 IO_PAD397 1046 1 Z
+bit 1046 C 1 *
+bit 1045 I 1 IO_PAD396
+bit 1044 O 1 IO_PAD396 1043 1 Z
+bit 1043 C 1 *
+bit 1042 I 1 IO_PAD395
+bit 1041 O 1 IO_PAD395 1040 1 Z
+bit 1040 C 1 *
+bit 1039 I 1 IO_PAD394
+bit 1038 O 1 IO_PAD394 1037 1 Z
+bit 1037 C 1 *
+bit 1036 I 1 IO_PAD393
+bit 1035 O 1 IO_PAD393 1034 1 Z
+bit 1034 C 1 *
+bit 1033 I 1 IO_PAD392
+bit 1032 O 1 IO_PAD392 1031 1 Z
+bit 1031 C 1 *
+bit 1030 I 1 IO_PAD390
+bit 1029 O 1 IO_PAD390 1028 1 Z
+bit 1028 C 1 *
+bit 1027 I 1 IO_PAD388
+bit 1026 O 1 IO_PAD388 1025 1 Z
+bit 1025 C 1 *
+bit 1024 I 1 IO_PAD387
+bit 1023 O 1 IO_PAD387 1022 1 Z
+bit 1022 C 1 *
+bit 1021 I 1 IO_PAD386
+bit 1020 O 1 IO_PAD386 1019 1 Z
+bit 1019 C 1 *
+bit 1018 I 1 IO_PAD385
+bit 1017 O 1 IO_PAD385 1016 1 Z
+bit 1016 C 1 *
+bit 1015 I 1 IO_PAD384
+bit 1014 O 1 IO_PAD384 1013 1 Z
+bit 1013 C 1 *
+bit 1012 I 1 IO_PAD382
+bit 1011 O 1 IO_PAD382 1010 1 Z
+bit 1010 C 1 *
+bit 1009 I 1 IO_PAD380
+bit 1008 O 1 IO_PAD380 1007 1 Z
+bit 1007 C 1 *
+bit 1006 I 1 IO_PAD378
+bit 1005 O 1 IO_PAD378 1004 1 Z
+bit 1004 C 1 *
+bit 1003 I 1 IO_PAD376
+bit 1002 O 1 IO_PAD376 1001 1 Z
+bit 1001 C 1 *
+bit 1000 I 1 IO_PAD375
+bit 999 O 1 IO_PAD375 998 1 Z
+bit 998 C 1 *
+bit 997 I 1 IO_PAD374
+bit 996 O 1 IO_PAD374 995 1 Z
+bit 995 C 1 *
+bit 994 I 1 IO_PAD372
+bit 993 O 1 IO_PAD372 992 1 Z
+bit 992 C 1 *
+bit 991 I 1 IO_PAD371
+bit 990 O 1 IO_PAD371 989 1 Z
+bit 989 C 1 *
+bit 988 I 1 IO_PAD370
+bit 987 O 1 IO_PAD370 986 1 Z
+bit 986 C 1 *
+bit 985 I 1 IO_PAD368
+bit 984 O 1 IO_PAD368 983 1 Z
+bit 983 C 1 *
+bit 982 I 1 IO_PAD366
+bit 981 O 1 IO_PAD366 980 1 Z
+bit 980 C 1 *
+bit 979 I 1 IO_PAD365
+bit 978 O 1 IO_PAD365 977 1 Z
+bit 977 C 1 *
+bit 976 I 1 IO_PAD364
+bit 975 O 1 IO_PAD364 974 1 Z
+bit 974 C 1 *
+bit 973 I 1 IO_PAD362
+bit 972 O 1 IO_PAD362 971 1 Z
+bit 971 C 1 *
+bit 970 I 1 IO_PAD361
+bit 969 O 1 IO_PAD361 968 1 Z
+bit 968 C 1 *
+bit 967 I 1 IO_PAD360
+bit 966 O 1 IO_PAD360 965 1 Z
+bit 965 C 1 *
+bit 964 I 1 IO_PAD358
+bit 963 O 1 IO_PAD358 962 1 Z
+bit 962 C 1 *
+bit 961 I 1 IO_PAD356
+bit 960 O 1 IO_PAD356 959 1 Z
+bit 959 C 1 *
+bit 958 I 1 IO_PAD355
+bit 957 O 1 IO_PAD355 956 1 Z
+bit 956 C 1 *
+bit 955 I 1 IO_PAD354
+bit 954 O 1 IO_PAD354 953 1 Z
+bit 953 C 1 *
+bit 952 I 1 IO_PAD352
+bit 951 O 1 IO_PAD352 950 1 Z
+bit 950 C 1 *
+bit 949 I 1 IO_PAD351
+bit 948 O 1 IO_PAD351 947 1 Z
+bit 947 C 1 *
+bit 946 I 1 IO_PAD350
+bit 945 O 1 IO_PAD350 944 1 Z
+bit 944 C 1 *
+bit 943 I 1 IO_PAD348
+bit 942 O 1 IO_PAD348 941 1 Z
+bit 941 C 1 *
+bit 940 I 1 IO_PAD346
+bit 939 O 1 IO_PAD346 938 1 Z
+bit 938 C 1 *
+bit 937 I 1 IO_PAD344
+bit 936 O 1 IO_PAD344 935 1 Z
+bit 935 C 1 *
+bit 934 I 1 IO_PAD342
+bit 933 O 1 IO_PAD342 932 1 Z
+bit 932 C 1 *
+bit 931 I 1 IO_PAD341
+bit 930 O 1 IO_PAD341 929 1 Z
+bit 929 C 1 *
+bit 928 I 1 IO_PAD340
+bit 927 O 1 IO_PAD340 926 1 Z
+bit 926 C 1 *
+bit 925 I 1 IO_PAD339
+bit 924 O 1 IO_PAD339 923 1 Z
+bit 923 C 1 *
+bit 922 I 1 IO_PAD338
+bit 921 O 1 IO_PAD338 920 1 Z
+bit 920 C 1 *
+bit 919 I 1 IO_PAD336
+bit 918 O 1 IO_PAD336 917 1 Z
+bit 917 C 1 *
+bit 916 I 1 IO_PAD334
+bit 915 O 1 IO_PAD334 914 1 Z
+bit 914 C 1 *
+bit 913 I 1 IO_PAD333
+bit 912 O 1 IO_PAD333 911 1 Z
+bit 911 C 1 *
+bit 910 I 1 IO_PAD332
+bit 909 O 1 IO_PAD332 908 1 Z
+bit 908 C 1 *
+bit 907 I 1 IO_PAD331
+bit 906 O 1 IO_PAD331 905 1 Z
+bit 905 C 1 *
+bit 904 I 1 IO_PAD330
+bit 903 O 1 IO_PAD330 902 1 Z
+bit 902 C 1 *
+bit 901 I 1 IO_PAD329
+bit 900 O 1 IO_PAD329 899 1 Z
+bit 899 C 1 *
+bit 898 I 1 IO_PAD328
+bit 897 O 1 IO_PAD328 896 1 Z
+bit 896 C 1 *
+bit 895 I 1 IO_PAD326
+bit 894 O 1 IO_PAD326 893 1 Z
+bit 893 C 1 *
+bit 892 I 1 IO_PAD324
+bit 891 O 1 IO_PAD324 890 1 Z
+bit 890 C 1 *
+bit 889 I 1 IO_PAD322
+bit 888 O 1 IO_PAD322 887 1 Z
+bit 887 C 1 *
+bit 886 I 1 IO_PAD320
+bit 885 O 1 IO_PAD320 884 1 Z
+bit 884 C 1 *
+bit 883 I 1 IO_PAD318
+bit 882 O 1 IO_PAD318 881 1 Z
+bit 881 C 1 *
+bit 880 I 1 IO_PAD316
+bit 879 O 1 IO_PAD316 878 1 Z
+bit 878 C 1 *
+bit 877 I 1 IO_PAD315
+bit 876 O 1 IO_PAD315 875 1 Z
+bit 875 C 1 *
+bit 874 I 1 IO_PAD314
+bit 873 O 1 IO_PAD314 872 1 Z
+bit 872 C 1 *
+bit 871 I 1 IO_PAD313
+bit 870 O 1 IO_PAD313 869 1 Z
+bit 869 C 1 *
+bit 868 I 1 IO_PAD312
+bit 867 O 1 IO_PAD312 866 1 Z
+bit 866 C 1 *
+bit 865 I 1 IO_PAD310
+bit 864 O 1 IO_PAD310 863 1 Z
+bit 863 C 1 *
+bit 862 I 1 IO_PAD308
+bit 861 O 1 IO_PAD308 860 1 Z
+bit 860 C 1 *
+bit 859 I 1 IO_PAD307
+bit 858 O 1 IO_PAD307 857 1 Z
+bit 857 C 1 *
+bit 856 I 1 IO_PAD306
+bit 855 O 1 IO_PAD306 854 1 Z
+bit 854 C 1 *
+bit 853 I 1 IO_PAD304
+bit 852 O 1 IO_PAD304 851 1 Z
+bit 851 C 1 *
+bit 850 I 1 IO_PAD303
+bit 849 O 1 IO_PAD303 848 1 Z
+bit 848 C 1 *
+bit 847 I 1 IO_PAD302
+bit 846 O 1 IO_PAD302 845 1 Z
+bit 845 C 1 *
+bit 844 I 1 IO_PAD300
+bit 843 O 1 IO_PAD300 842 1 Z
+bit 842 C 1 *
+bit 841 I 1 IO_PAD299
+bit 840 O 1 IO_PAD299 839 1 Z
+bit 839 C 1 *
+bit 838 I 1 IO_PAD298
+bit 837 O 1 IO_PAD298 836 1 Z
+bit 836 C 1 *
+bit 835 I 1 IO_PAD296
+bit 834 O 1 IO_PAD296 833 1 Z
+bit 833 C 1 *
+bit 832 I 1 IO_PAD294
+bit 831 O 1 IO_PAD294 830 1 Z
+bit 830 C 1 *
+bit 829 I 1 IO_PAD292
+bit 828 O 1 IO_PAD292 827 1 Z
+bit 827 C 1 *
+bit 826 I 1 IO_PAD290
+bit 825 O 1 IO_PAD290 824 1 Z
+bit 824 C 1 *
+bit 823 I 1 IO_PAD289
+bit 822 O 1 IO_PAD289 821 1 Z
+bit 821 C 1 *
+bit 820 I 1 IO_PAD288
+bit 819 O 1 IO_PAD288 818 1 Z
+bit 818 C 1 *
+bit 817 I 1 IO_PAD287
+bit 816 O 1 IO_PAD287 815 1 Z
+bit 815 C 1 *
+bit 814 I 1 IO_PAD286
+bit 813 O 1 IO_PAD286 812 1 Z
+bit 812 C 1 *
+bit 811 I 1 IO_PAD284
+bit 810 O 1 IO_PAD284 809 1 Z
+bit 809 C 1 *
+bit 808 I 1 IO_PAD282
+bit 807 O 1 IO_PAD282 806 1 Z
+bit 806 C 1 *
+bit 805 I 1 IO_PAD281
+bit 804 O 1 IO_PAD281 803 1 Z
+bit 803 C 1 *
+bit 802 I 1 IO_PAD280
+bit 801 O 1 IO_PAD280 800 1 Z
+bit 800 C 1 *
+bit 799 I 1 IO_PAD279
+bit 798 O 1 IO_PAD279 797 1 Z
+bit 797 C 1 *
+bit 796 I 1 IO_PAD278
+bit 795 O 1 IO_PAD278 794 1 Z
+bit 794 C 1 *
+bit 793 I 1 IO_PAD276
+bit 792 O 1 IO_PAD276 791 1 Z
+bit 791 C 1 *
+bit 790 I 1 IO_PAD275
+bit 789 O 1 IO_PAD275 788 1 Z
+bit 788 C 1 *
+bit 787 I 1 IO_PAD274
+bit 786 O 1 IO_PAD274 785 1 Z
+bit 785 C 1 *
+bit 784 I 1 IO_PAD270
+bit 783 O 1 IO_PAD270 782 1 Z
+bit 782 C 1 *
+bit 781 I 1 IO_PAD269
+bit 780 O 1 IO_PAD269 779 1 Z
+bit 779 C 1 *
+bit 778 I 1 M2_PAD268
+bit 777 I 1 M0_PAD267
+bit 776 I 1 M1_PAD266
+bit 775 I 1 IO_PAD264
+bit 774 O 1 IO_PAD264 773 1 Z
+bit 773 C 1 *
+bit 772 I 1 IO_PAD263
+bit 771 O 1 IO_PAD263 770 1 Z
+bit 770 C 1 *
+bit 769 I 1 IO_PAD262
+bit 768 O 1 IO_PAD262 767 1 Z
+bit 767 C 1 *
+bit 766 I 1 IO_PAD261
+bit 765 O 1 IO_PAD261 764 1 Z
+bit 764 C 1 *
+bit 763 I 1 IO_PAD260
+bit 762 O 1 IO_PAD260 761 1 Z
+bit 761 C 1 *
+bit 760 I 1 IO_PAD259
+bit 759 O 1 IO_PAD259 758 1 Z
+bit 758 C 1 *
+bit 757 I 1 IO_PAD258
+bit 756 O 1 IO_PAD258 755 1 Z
+bit 755 C 1 *
+bit 754 I 1 IO_PAD256
+bit 753 O 1 IO_PAD256 752 1 Z
+bit 752 C 1 *
+bit 751 I 1 IO_PAD255
+bit 750 O 1 IO_PAD255 749 1 Z
+bit 749 C 1 *
+bit 748 I 1 IO_PAD254
+bit 747 O 1 IO_PAD254 746 1 Z
+bit 746 C 1 *
+bit 745 I 1 IO_PAD253
+bit 744 O 1 IO_PAD253 743 1 Z
+bit 743 C 1 *
+bit 742 I 1 IO_PAD252
+bit 741 O 1 IO_PAD252 740 1 Z
+bit 740 C 1 *
+bit 739 I 1 IO_PAD250
+bit 738 O 1 IO_PAD250 737 1 Z
+bit 737 C 1 *
+bit 736 I 1 IO_PAD248
+bit 735 O 1 IO_PAD248 734 1 Z
+bit 734 C 1 *
+bit 733 I 1 IO_PAD246
+bit 732 O 1 IO_PAD246 731 1 Z
+bit 731 C 1 *
+bit 730 I 1 IO_PAD244
+bit 729 O 1 IO_PAD244 728 1 Z
+bit 728 C 1 *
+bit 727 I 1 IO_PAD243
+bit 726 O 1 IO_PAD243 725 1 Z
+bit 725 C 1 *
+bit 724 I 1 IO_PAD242
+bit 723 O 1 IO_PAD242 722 1 Z
+bit 722 C 1 *
+bit 721 I 1 IO_PAD240
+bit 720 O 1 IO_PAD240 719 1 Z
+bit 719 C 1 *
+bit 718 I 1 IO_PAD239
+bit 717 O 1 IO_PAD239 716 1 Z
+bit 716 C 1 *
+bit 715 I 1 IO_PAD238
+bit 714 O 1 IO_PAD238 713 1 Z
+bit 713 C 1 *
+bit 712 I 1 IO_PAD236
+bit 711 O 1 IO_PAD236 710 1 Z
+bit 710 C 1 *
+bit 709 I 1 IO_PAD235
+bit 708 O 1 IO_PAD235 707 1 Z
+bit 707 C 1 *
+bit 706 I 1 IO_PAD234
+bit 705 O 1 IO_PAD234 704 1 Z
+bit 704 C 1 *
+bit 703 I 1 IO_PAD232
+bit 702 O 1 IO_PAD232 701 1 Z
+bit 701 C 1 *
+bit 700 I 1 IO_PAD230
+bit 699 O 1 IO_PAD230 698 1 Z
+bit 698 C 1 *
+bit 697 I 1 IO_PAD229
+bit 696 O 1 IO_PAD229 695 1 Z
+bit 695 C 1 *
+bit 694 I 1 IO_PAD228
+bit 693 O 1 IO_PAD228 692 1 Z
+bit 692 C 1 *
+bit 691 I 1 IO_PAD227
+bit 690 O 1 IO_PAD227 689 1 Z
+bit 689 C 1 *
+bit 688 I 1 IO_PAD226
+bit 687 O 1 IO_PAD226 686 1 Z
+bit 686 C 1 *
+bit 685 I 1 IO_PAD224
+bit 684 O 1 IO_PAD224 683 1 Z
+bit 683 C 1 *
+bit 682 I 1 IO_PAD222
+bit 681 O 1 IO_PAD222 680 1 Z
+bit 680 C 1 *
+bit 679 I 1 IO_PAD220
+bit 678 O 1 IO_PAD220 677 1 Z
+bit 677 C 1 *
+bit 676 I 1 IO_PAD218
+bit 675 O 1 IO_PAD218 674 1 Z
+bit 674 C 1 *
+bit 673 I 1 IO_PAD217
+bit 672 O 1 IO_PAD217 671 1 Z
+bit 671 C 1 *
+bit 670 I 1 IO_PAD216
+bit 669 O 1 IO_PAD216 668 1 Z
+bit 668 C 1 *
+bit 667 I 1 IO_PAD214
+bit 666 O 1 IO_PAD214 665 1 Z
+bit 665 C 1 *
+bit 664 I 1 IO_PAD212
+bit 663 O 1 IO_PAD212 662 1 Z
+bit 662 C 1 *
+bit 661 I 1 IO_PAD211
+bit 660 O 1 IO_PAD211 659 1 Z
+bit 659 C 1 *
+bit 658 I 1 IO_PAD210
+bit 657 O 1 IO_PAD210 656 1 Z
+bit 656 C 1 *
+bit 655 I 1 IO_PAD209
+bit 654 O 1 IO_PAD209 653 1 Z
+bit 653 C 1 *
+bit 652 I 1 IO_PAD208
+bit 651 O 1 IO_PAD208 650 1 Z
+bit 650 C 1 *
+bit 649 I 1 IO_PAD207
+bit 648 O 1 IO_PAD207 647 1 Z
+bit 647 C 1 *
+bit 646 I 1 IO_PAD206
+bit 645 O 1 IO_PAD206 644 1 Z
+bit 644 C 1 *
+bit 643 O 1 *
+bit 642 O 1 *
+bit 641 O 1 *
+bit 640 O 1 *
+bit 639 O 1 *
+bit 638 O 1 *
+bit 637 I 1 IO_PAD205
+bit 636 O 1 IO_PAD205 635 1 Z
+bit 635 C 1 *
+bit 634 I 1 IO_PAD204
+bit 633 O 1 IO_PAD204 632 1 Z
+bit 632 C 1 *
+bit 631 I 1 IO_PAD203
+bit 630 O 1 IO_PAD203 629 1 Z
+bit 629 C 1 *
+bit 628 I 1 IO_PAD202
+bit 627 O 1 IO_PAD202 626 1 Z
+bit 626 C 1 *
+bit 625 I 1 IO_PAD201
+bit 624 O 1 IO_PAD201 623 1 Z
+bit 623 C 1 *
+bit 622 I 1 IO_PAD200
+bit 621 O 1 IO_PAD200 620 1 Z
+bit 620 C 1 *
+bit 619 I 1 IO_PAD198
+bit 618 O 1 IO_PAD198 617 1 Z
+bit 617 C 1 *
+bit 616 I 1 IO_PAD196
+bit 615 O 1 IO_PAD196 614 1 Z
+bit 614 C 1 *
+bit 613 I 1 IO_PAD194
+bit 612 O 1 IO_PAD194 611 1 Z
+bit 611 C 1 *
+bit 610 I 1 IO_PAD192
+bit 609 O 1 IO_PAD192 608 1 Z
+bit 608 C 1 *
+bit 607 O 1 *
+bit 606 O 1 *
+bit 605 O 1 *
+bit 604 O 1 *
+bit 603 O 1 *
+bit 602 O 1 *
+bit 601 I 1 IO_PAD190
+bit 600 O 1 IO_PAD190 599 1 Z
+bit 599 C 1 *
+bit 598 I 1 IO_PAD189
+bit 597 O 1 IO_PAD189 596 1 Z
+bit 596 C 1 *
+bit 595 I 1 IO_PAD188
+bit 594 O 1 IO_PAD188 593 1 Z
+bit 593 C 1 *
+bit 592 I 1 IO_PAD186
+bit 591 O 1 IO_PAD186 590 1 Z
+bit 590 C 1 *
+bit 589 I 1 IO_PAD184
+bit 588 O 1 IO_PAD184 587 1 Z
+bit 587 C 1 *
+bit 586 I 1 IO_PAD183
+bit 585 O 1 IO_PAD183 584 1 Z
+bit 584 C 1 *
+bit 583 I 1 IO_PAD181
+bit 582 O 1 IO_PAD181 581 1 Z
+bit 581 C 1 *
+bit 580 I 1 IO_PAD180
+bit 579 O 1 IO_PAD180 578 1 Z
+bit 578 C 1 *
+bit 577 I 1 IO_PAD178
+bit 576 O 1 IO_PAD178 575 1 Z
+bit 575 C 1 *
+bit 574 I 1 IO_PAD176
+bit 573 O 1 IO_PAD176 572 1 Z
+bit 572 C 1 *
+bit 571 I 1 IO_PAD175
+bit 570 O 1 IO_PAD175 569 1 Z
+bit 569 C 1 *
+bit 568 I 1 IO_PAD174
+bit 567 O 1 IO_PAD174 566 1 Z
+bit 566 C 1 *
+bit 565 O 1 *
+bit 564 O 1 *
+bit 563 O 1 *
+bit 562 O 1 *
+bit 561 O 1 *
+bit 560 O 1 *
+bit 559 I 1 IO_PAD172
+bit 558 O 1 IO_PAD172 557 1 Z
+bit 557 C 1 *
+bit 556 I 1 IO_PAD170
+bit 555 O 1 IO_PAD170 554 1 Z
+bit 554 C 1 *
+bit 553 I 1 IO_PAD168
+bit 552 O 1 IO_PAD168 551 1 Z
+bit 551 C 1 *
+bit 550 I 1 IO_PAD166
+bit 549 O 1 IO_PAD166 548 1 Z
+bit 548 C 1 *
+bit 547 I 1 IO_PAD164
+bit 546 O 1 IO_PAD164 545 1 Z
+bit 545 C 1 *
+bit 544 I 1 IO_PAD163
+bit 543 O 1 IO_PAD163 542 1 Z
+bit 542 C 1 *
+bit 541 I 1 IO_PAD162
+bit 540 O 1 IO_PAD162 539 1 Z
+bit 539 C 1 *
+bit 538 I 1 IO_PAD161
+bit 537 O 1 IO_PAD161 536 1 Z
+bit 536 C 1 *
+bit 535 I 1 IO_PAD160
+bit 534 O 1 IO_PAD160 533 1 Z
+bit 533 C 1 *
+bit 532 I 1 IO_PAD159
+bit 531 O 1 IO_PAD159 530 1 Z
+bit 530 C 1 *
+bit 529 O 1 *
+bit 528 O 1 *
+bit 527 O 1 *
+bit 526 O 1 *
+bit 525 O 1 *
+bit 524 O 1 *
+bit 523 I 1 IO_PAD158
+bit 522 O 1 IO_PAD158 521 1 Z
+bit 521 C 1 *
+bit 520 I 1 IO_PAD157
+bit 519 O 1 IO_PAD157 518 1 Z
+bit 518 C 1 *
+bit 517 I 1 IO_PAD156
+bit 516 O 1 IO_PAD156 515 1 Z
+bit 515 C 1 *
+bit 514 I 1 IO_PAD155
+bit 513 O 1 IO_PAD155 512 1 Z
+bit 512 C 1 *
+bit 511 I 1 IO_PAD154
+bit 510 O 1 IO_PAD154 509 1 Z
+bit 509 C 1 *
+bit 508 I 1 IO_PAD153
+bit 507 O 1 IO_PAD153 506 1 Z
+bit 506 C 1 *
+bit 505 I 1 IO_PAD152
+bit 504 O 1 IO_PAD152 503 1 Z
+bit 503 C 1 *
+bit 502 I 1 IO_PAD150
+bit 501 O 1 IO_PAD150 500 1 Z
+bit 500 C 1 *
+bit 499 I 1 IO_PAD148
+bit 498 O 1 IO_PAD148 497 1 Z
+bit 497 C 1 *
+bit 496 I 1 IO_PAD147
+bit 495 O 1 IO_PAD147 494 1 Z
+bit 494 C 1 *
+bit 493 I 1 IO_PAD146
+bit 492 O 1 IO_PAD146 491 1 Z
+bit 491 C 1 *
+bit 490 I 1 IO_PAD144
+bit 489 O 1 IO_PAD144 488 1 Z
+bit 488 C 1 *
+bit 487 I 1 IO_PAD142
+bit 486 O 1 IO_PAD142 485 1 Z
+bit 485 C 1 *
+bit 484 I 1 IO_PAD140
+bit 483 O 1 IO_PAD140 482 1 Z
+bit 482 C 1 *
+bit 481 I 1 IO_PAD138
+bit 480 O 1 IO_PAD138 479 1 Z
+bit 479 C 1 *
+bit 478 I 1 IO_PAD137
+bit 477 O 1 IO_PAD137 476 1 Z
+bit 476 C 1 *
+bit 475 I 1 IO_PAD136
+bit 474 O 1 IO_PAD136 473 1 Z
+bit 473 C 1 *
+bit 472 I 1 IO_PAD135
+bit 471 O 1 IO_PAD135 470 1 Z
+bit 470 C 1 *
+bit 469 I 1 IO_PAD134
+bit 468 O 1 IO_PAD134 467 1 Z
+bit 467 C 1 *
+bit 466 I 1 IO_PAD132
+bit 465 O 1 IO_PAD132 464 1 Z
+bit 464 C 1 *
+bit 463 I 1 IO_PAD130
+bit 462 O 1 IO_PAD130 461 1 Z
+bit 461 C 1 *
+bit 460 I 1 IO_PAD129
+bit 459 O 1 IO_PAD129 458 1 Z
+bit 458 C 1 *
+bit 457 I 1 IO_PAD128
+bit 456 O 1 IO_PAD128 455 1 Z
+bit 455 C 1 *
+bit 454 I 1 IO_PAD126
+bit 453 O 1 IO_PAD126 452 1 Z
+bit 452 C 1 *
+bit 451 I 1 IO_PAD125
+bit 450 O 1 IO_PAD125 449 1 Z
+bit 449 C 1 *
+bit 448 I 1 IO_PAD124
+bit 447 O 1 IO_PAD124 446 1 Z
+bit 446 C 1 *
+bit 445 I 1 IO_PAD122
+bit 444 O 1 IO_PAD122 443 1 Z
+bit 443 C 1 *
+bit 442 I 1 IO_PAD121
+bit 441 O 1 IO_PAD121 440 1 Z
+bit 440 C 1 *
+bit 439 I 1 IO_PAD120
+bit 438 O 1 IO_PAD120 437 1 Z
+bit 437 C 1 *
+bit 436 I 1 IO_PAD118
+bit 435 O 1 IO_PAD118 434 1 Z
+bit 434 C 1 *
+bit 433 I 1 IO_PAD116
+bit 432 O 1 IO_PAD116 431 1 Z
+bit 431 C 1 *
+bit 430 I 1 IO_PAD114
+bit 429 O 1 IO_PAD114 428 1 Z
+bit 428 C 1 *
+bit 427 I 1 IO_PAD112
+bit 426 O 1 IO_PAD112 425 1 Z
+bit 425 C 1 *
+bit 424 I 1 IO_PAD111
+bit 423 O 1 IO_PAD111 422 1 Z
+bit 422 C 1 *
+bit 421 I 1 IO_PAD110
+bit 420 O 1 IO_PAD110 419 1 Z
+bit 419 C 1 *
+bit 418 I 1 IO_PAD109
+bit 417 O 1 IO_PAD109 416 1 Z
+bit 416 C 1 *
+bit 415 I 1 IO_PAD108
+bit 414 O 1 IO_PAD108 413 1 Z
+bit 413 C 1 *
+bit 412 I 1 IO_PAD106
+bit 411 O 1 IO_PAD106 410 1 Z
+bit 410 C 1 *
+bit 409 I 1 IO_PAD105
+bit 408 O 1 IO_PAD105 407 1 Z
+bit 407 C 1 *
+bit 406 I 1 IO_PAD104
+bit 405 O 1 IO_PAD104 404 1 Z
+bit 404 C 1 *
+bit 403 I 1 IO_PAD103
+bit 402 O 1 IO_PAD103 401 1 Z
+bit 401 C 1 *
+bit 400 I 1 IO_PAD102
+bit 399 O 1 IO_PAD102 398 1 Z
+bit 398 C 1 *
+bit 397 I 1 IO_PAD101
+bit 396 O 1 IO_PAD101 395 1 Z
+bit 395 C 1 *
+bit 394 I 1 IO_PAD100
+bit 393 O 1 IO_PAD100 392 1 Z
+bit 392 C 1 *
+bit 391 O 1 *
+bit 390 I 1 HSWAP_EN_PAD96
+bit 389 I 1 IO_PAD95
+bit 388 O 1 IO_PAD95 387 1 Z
+bit 387 C 1 *
+bit 386 I 1 IO_PAD94
+bit 385 O 1 IO_PAD94 384 1 Z
+bit 384 C 1 *
+bit 383 I 1 IO_PAD93
+bit 382 O 1 IO_PAD93 381 1 Z
+bit 381 C 1 *
+bit 380 I 1 IO_PAD89
+bit 379 O 1 IO_PAD89 378 1 Z
+bit 378 C 1 *
+bit 377 I 1 IO_PAD88
+bit 376 O 1 IO_PAD88 375 1 Z
+bit 375 C 1 *
+bit 374 I 1 IO_PAD86
+bit 373 O 1 IO_PAD86 372 1 Z
+bit 372 C 1 *
+bit 371 I 1 IO_PAD85
+bit 370 O 1 IO_PAD85 369 1 Z
+bit 369 C 1 *
+bit 368 I 1 IO_PAD84
+bit 367 O 1 IO_PAD84 366 1 Z
+bit 366 C 1 *
+bit 365 I 1 IO_PAD83
+bit 364 O 1 IO_PAD83 363 1 Z
+bit 363 C 1 *
+bit 362 I 1 IO_PAD82
+bit 361 O 1 IO_PAD82 360 1 Z
+bit 360 C 1 *
+bit 359 I 1 IO_PAD80
+bit 358 O 1 IO_PAD80 357 1 Z
+bit 357 C 1 *
+bit 356 I 1 IO_PAD78
+bit 355 O 1 IO_PAD78 354 1 Z
+bit 354 C 1 *
+bit 353 I 1 IO_PAD77
+bit 352 O 1 IO_PAD77 351 1 Z
+bit 351 C 1 *
+bit 350 I 1 IO_PAD76
+bit 349 O 1 IO_PAD76 348 1 Z
+bit 348 C 1 *
+bit 347 I 1 IO_PAD75
+bit 346 O 1 IO_PAD75 345 1 Z
+bit 345 C 1 *
+bit 344 I 1 IO_PAD74
+bit 343 O 1 IO_PAD74 342 1 Z
+bit 342 C 1 *
+bit 341 I 1 IO_PAD72
+bit 340 O 1 IO_PAD72 339 1 Z
+bit 339 C 1 *
+bit 338 I 1 IO_PAD70
+bit 337 O 1 IO_PAD70 336 1 Z
+bit 336 C 1 *
+bit 335 I 1 IO_PAD68
+bit 334 O 1 IO_PAD68 333 1 Z
+bit 333 C 1 *
+bit 332 I 1 IO_PAD66
+bit 331 O 1 IO_PAD66 330 1 Z
+bit 330 C 1 *
+bit 329 I 1 IO_PAD65
+bit 328 O 1 IO_PAD65 327 1 Z
+bit 327 C 1 *
+bit 326 I 1 IO_PAD64
+bit 325 O 1 IO_PAD64 324 1 Z
+bit 324 C 1 *
+bit 323 I 1 IO_PAD62
+bit 322 O 1 IO_PAD62 321 1 Z
+bit 321 C 1 *
+bit 320 I 1 IO_PAD61
+bit 319 O 1 IO_PAD61 318 1 Z
+bit 318 C 1 *
+bit 317 I 1 IO_PAD60
+bit 316 O 1 IO_PAD60 315 1 Z
+bit 315 C 1 *
+bit 314 I 1 IO_PAD58
+bit 313 O 1 IO_PAD58 312 1 Z
+bit 312 C 1 *
+bit 311 I 1 IO_PAD57
+bit 310 O 1 IO_PAD57 309 1 Z
+bit 309 C 1 *
+bit 308 I 1 IO_PAD56
+bit 307 O 1 IO_PAD56 306 1 Z
+bit 306 C 1 *
+bit 305 I 1 IO_PAD54
+bit 304 O 1 IO_PAD54 303 1 Z
+bit 303 C 1 *
+bit 302 I 1 IO_PAD52
+bit 301 O 1 IO_PAD52 300 1 Z
+bit 300 C 1 *
+bit 299 I 1 IO_PAD51
+bit 298 O 1 IO_PAD51 297 1 Z
+bit 297 C 1 *
+bit 296 I 1 IO_PAD50
+bit 295 O 1 IO_PAD50 294 1 Z
+bit 294 C 1 *
+bit 293 I 1 IO_PAD49
+bit 292 O 1 IO_PAD49 291 1 Z
+bit 291 C 1 *
+bit 290 I 1 IO_PAD48
+bit 289 O 1 IO_PAD48 288 1 Z
+bit 288 C 1 *
+bit 287 I 1 IO_PAD46
+bit 286 O 1 IO_PAD46 285 1 Z
+bit 285 C 1 *
+bit 284 I 1 IO_PAD44
+bit 283 O 1 IO_PAD44 282 1 Z
+bit 282 C 1 *
+bit 281 I 1 IO_PAD42
+bit 280 O 1 IO_PAD42 279 1 Z
+bit 279 C 1 *
+bit 278 I 1 IO_PAD40
+bit 277 O 1 IO_PAD40 276 1 Z
+bit 276 C 1 *
+bit 275 I 1 IO_PAD38
+bit 274 O 1 IO_PAD38 273 1 Z
+bit 273 C 1 *
+bit 272 I 1 IO_PAD36
+bit 271 O 1 IO_PAD36 270 1 Z
+bit 270 C 1 *
+bit 269 I 1 IO_PAD35
+bit 268 O 1 IO_PAD35 267 1 Z
+bit 267 C 1 *
+bit 266 I 1 IO_PAD34
+bit 265 O 1 IO_PAD34 264 1 Z
+bit 264 C 1 *
+bit 263 I 1 IO_PAD33
+bit 262 O 1 IO_PAD33 261 1 Z
+bit 261 C 1 *
+bit 260 I 1 IO_PAD32
+bit 259 O 1 IO_PAD32 258 1 Z
+bit 258 C 1 *
+bit 257 I 1 IO_PAD31
+bit 256 O 1 IO_PAD31 255 1 Z
+bit 255 C 1 *
+bit 254 I 1 IO_PAD30
+bit 253 O 1 IO_PAD30 252 1 Z
+bit 252 C 1 *
+bit 251 I 1 IO_PAD28
+bit 250 O 1 IO_PAD28 249 1 Z
+bit 249 C 1 *
+bit 248 I 1 IO_PAD26
+bit 247 O 1 IO_PAD26 246 1 Z
+bit 246 C 1 *
+bit 245 I 1 IO_PAD25
+bit 244 O 1 IO_PAD25 243 1 Z
+bit 243 C 1 *
+bit 242 I 1 IO_PAD24
+bit 241 O 1 IO_PAD24 240 1 Z
+bit 240 C 1 *
+bit 239 I 1 IO_PAD23
+bit 238 O 1 IO_PAD23 237 1 Z
+bit 237 C 1 *
+bit 236 I 1 IO_PAD22
+bit 235 O 1 IO_PAD22 234 1 Z
+bit 234 C 1 *
+bit 233 I 1 IO_PAD20
+bit 232 O 1 IO_PAD20 231 1 Z
+bit 231 C 1 *
+bit 230 I 1 IO_PAD18
+bit 229 O 1 IO_PAD18 228 1 Z
+bit 228 C 1 *
+bit 227 I 1 IO_PAD16
+bit 226 O 1 IO_PAD16 225 1 Z
+bit 225 C 1 *
+bit 224 I 1 IO_PAD14
+bit 223 O 1 IO_PAD14 222 1 Z
+bit 222 C 1 *
+bit 221 I 1 IO_PAD13
+bit 220 O 1 IO_PAD13 219 1 Z
+bit 219 C 1 *
+bit 218 I 1 IO_PAD12
+bit 217 O 1 IO_PAD12 216 1 Z
+bit 216 C 1 *
+bit 215 I 1 IO_PAD10
+bit 214 O 1 IO_PAD10 213 1 Z
+bit 213 C 1 *
+bit 212 I 1 IO_PAD9
+bit 211 O 1 IO_PAD9 210 1 Z
+bit 210 C 1 *
+bit 209 I 1 IO_PAD8
+bit 208 O 1 IO_PAD8 207 1 Z
+bit 207 C 1 *
+bit 206 I 1 IO_PAD6
+bit 205 O 1 IO_PAD6 204 1 Z
+bit 204 C 1 *
+bit 203 I 1 IO_PAD4
+bit 202 O 1 IO_PAD4 201 1 Z
+bit 201 C 1 *
+bit 200 I 1 IO_PAD3
+bit 199 O 1 IO_PAD3 198 1 Z
+bit 198 C 1 *
+bit 197 I 1 IO_PAD2
+bit 196 O 1 IO_PAD2 195 1 Z
+bit 195 C 1 *
+bit 194 I 1 IO_PAD721
+bit 193 O 1 IO_PAD721 192 1 Z
+bit 192 C 1 *
+bit 191 I 1 IO_PAD720
+bit 190 O 1 IO_PAD720 189 1 Z
+bit 189 C 1 *
+bit 188 I 1 IO_PAD719
+bit 187 O 1 IO_PAD719 186 1 Z
+bit 186 C 1 *
+bit 185 I 1 IO_PAD717
+bit 184 O 1 IO_PAD717 183 1 Z
+bit 183 C 1 *
+bit 182 I 1 IO_PAD715
+bit 181 O 1 IO_PAD715 180 1 Z
+bit 180 C 1 *
+bit 179 I 1 IO_PAD714
+bit 178 O 1 IO_PAD714 177 1 Z
+bit 177 C 1 *
+bit 176 I 1 IO_PAD713
+bit 175 O 1 IO_PAD713 174 1 Z
+bit 174 C 1 *
+bit 173 I 1 IO_PAD711
+bit 172 O 1 IO_PAD711 171 1 Z
+bit 171 C 1 *
+bit 170 I 1 IO_PAD710
+bit 169 O 1 IO_PAD710 168 1 Z
+bit 168 C 1 *
+bit 167 I 1 IO_PAD709
+bit 166 O 1 IO_PAD709 165 1 Z
+bit 165 C 1 *
+bit 164 I 1 IO_PAD707
+bit 163 O 1 IO_PAD707 162 1 Z
+bit 162 C 1 *
+bit 161 I 1 IO_PAD705
+bit 160 O 1 IO_PAD705 159 1 Z
+bit 159 C 1 *
+bit 158 I 1 IO_PAD703
+bit 157 O 1 IO_PAD703 156 1 Z
+bit 156 C 1 *
+bit 155 I 1 IO_PAD701
+bit 154 O 1 IO_PAD701 153 1 Z
+bit 153 C 1 *
+bit 152 I 1 IO_PAD700
+bit 151 O 1 IO_PAD700 150 1 Z
+bit 150 C 1 *
+bit 149 I 1 IO_PAD699
+bit 148 O 1 IO_PAD699 147 1 Z
+bit 147 C 1 *
+bit 146 I 1 IO_PAD698
+bit 145 O 1 IO_PAD698 144 1 Z
+bit 144 C 1 *
+bit 143 I 1 IO_PAD697
+bit 142 O 1 IO_PAD697 141 1 Z
+bit 141 C 1 *
+bit 140 I 1 IO_PAD695
+bit 139 O 1 IO_PAD695 138 1 Z
+bit 138 C 1 *
+bit 137 I 1 IO_PAD693
+bit 136 O 1 IO_PAD693 135 1 Z
+bit 135 C 1 *
+bit 134 I 1 IO_PAD692
+bit 133 O 1 IO_PAD692 132 1 Z
+bit 132 C 1 *
+bit 131 I 1 IO_PAD691
+bit 130 O 1 IO_PAD691 129 1 Z
+bit 129 C 1 *
+bit 128 I 1 IO_PAD690
+bit 127 O 1 IO_PAD690 126 1 Z
+bit 126 C 1 *
+bit 125 I 1 IO_PAD689
+bit 124 O 1 IO_PAD689 123 1 Z
+bit 123 C 1 *
+bit 122 I 1 IO_PAD688
+bit 121 O 1 IO_PAD688 120 1 Z
+bit 120 C 1 *
+bit 119 I 1 IO_PAD687
+bit 118 O 1 IO_PAD687 117 1 Z
+bit 117 C 1 *
+bit 116 I 1 IO_PAD685
+bit 115 O 1 IO_PAD685 114 1 Z
+bit 114 C 1 *
+bit 113 I 1 IO_PAD683
+bit 112 O 1 IO_PAD683 111 1 Z
+bit 111 C 1 *
+bit 110 I 1 IO_PAD681
+bit 109 O 1 IO_PAD681 108 1 Z
+bit 108 C 1 *
+bit 107 I 1 IO_PAD679
+bit 106 O 1 IO_PAD679 105 1 Z
+bit 105 C 1 *
+bit 104 I 1 IO_PAD677
+bit 103 O 1 IO_PAD677 102 1 Z
+bit 102 C 1 *
+bit 101 I 1 IO_PAD675
+bit 100 O 1 IO_PAD675 99 1 Z
+bit 99 C 1 *
+bit 98 I 1 IO_PAD674
+bit 97 O 1 IO_PAD674 96 1 Z
+bit 96 C 1 *
+bit 95 I 1 IO_PAD673
+bit 94 O 1 IO_PAD673 93 1 Z
+bit 93 C 1 *
+bit 92 I 1 IO_PAD672
+bit 91 O 1 IO_PAD672 90 1 Z
+bit 90 C 1 *
+bit 89 I 1 IO_PAD671
+bit 88 O 1 IO_PAD671 87 1 Z
+bit 87 C 1 *
+bit 86 I 1 IO_PAD669
+bit 85 O 1 IO_PAD669 84 1 Z
+bit 84 C 1 *
+bit 83 I 1 IO_PAD667
+bit 82 O 1 IO_PAD667 81 1 Z
+bit 81 C 1 *
+bit 80 I 1 IO_PAD666
+bit 79 O 1 IO_PAD666 78 1 Z
+bit 78 C 1 *
+bit 77 I 1 IO_PAD665
+bit 76 O 1 IO_PAD665 75 1 Z
+bit 75 C 1 *
+bit 74 I 1 IO_PAD663
+bit 73 O 1 IO_PAD663 72 1 Z
+bit 72 C 1 *
+bit 71 I 1 IO_PAD662
+bit 70 O 1 IO_PAD662 69 1 Z
+bit 69 C 1 *
+bit 68 I 1 IO_PAD661
+bit 67 O 1 IO_PAD661 66 1 Z
+bit 66 C 1 *
+bit 65 I 1 IO_PAD659
+bit 64 O 1 IO_PAD659 63 1 Z
+bit 63 C 1 *
+bit 62 I 1 IO_PAD658
+bit 61 O 1 IO_PAD658 60 1 Z
+bit 60 C 1 *
+bit 59 I 1 IO_PAD657
+bit 58 O 1 IO_PAD657 57 1 Z
+bit 57 C 1 *
+bit 56 I 1 IO_PAD655
+bit 55 O 1 IO_PAD655 54 1 Z
+bit 54 C 1 *
+bit 53 I 1 IO_PAD653
+bit 52 O 1 IO_PAD653 51 1 Z
+bit 51 C 1 *
+bit 50 I 1 IO_PAD651
+bit 49 O 1 IO_PAD651 48 1 Z
+bit 48 C 1 *
+bit 47 I 1 IO_PAD649
+bit 46 O 1 IO_PAD649 45 1 Z
+bit 45 C 1 *
+bit 44 I 1 IO_PAD648
+bit 43 O 1 IO_PAD648 42 1 Z
+bit 42 C 1 *
+bit 41 I 1 IO_PAD647
+bit 40 O 1 IO_PAD647 39 1 Z
+bit 39 C 1 *
+bit 38 I 1 IO_PAD646
+bit 37 O 1 IO_PAD646 36 1 Z
+bit 36 C 1 *
+bit 35 I 1 IO_PAD645
+bit 34 O 1 IO_PAD645 33 1 Z
+bit 33 C 1 *
+bit 32 I 1 IO_PAD643
+bit 31 O 1 IO_PAD643 30 1 Z
+bit 30 C 1 *
+bit 29 I 1 IO_PAD641
+bit 28 O 1 IO_PAD641 27 1 Z
+bit 27 C 1 *
+bit 26 I 1 IO_PAD640
+bit 25 O 1 IO_PAD640 24 1 Z
+bit 24 C 1 *
+bit 23 I 1 IO_PAD639
+bit 22 O 1 IO_PAD639 21 1 Z
+bit 21 C 1 *
+bit 20 I 1 IO_PAD638
+bit 19 O 1 IO_PAD638 18 1 Z
+bit 18 C 1 *
+bit 17 I 1 IO_PAD637
+bit 16 O 1 IO_PAD637 15 1 Z
+bit 15 C 1 *
+bit 14 I 1 IO_PAD635
+bit 13 O 1 IO_PAD635 12 1 Z
+bit 12 C 1 *
+bit 11 I 1 IO_PAD634
+bit 10 O 1 IO_PAD634 9 1 Z
+bit 9 C 1 *
+bit 8 I 1 IO_PAD633
+bit 7 O 1 IO_PAD633 6 1 Z
+bit 6 C 1 *
+bit 5 I 1 IO_PAD631
+bit 4 O 1 IO_PAD631 3 1 Z
+bit 3 C 1 *
+bit 2 I 1 IO_PAD630
+bit 1 O 1 IO_PAD630 0 1 Z
+bit 0 C 1 *
--- /dev/null
+signal GND1
+signal GND2
+signal GND3
+signal GND4
+signal GND5
+signal GND6
+signal GND7
+signal GND8
+signal GND9
+signal GND10
+signal GND11
+signal GND12
+signal GND13
+signal GND14
+signal GND15
+signal GND16
+signal GND17
+signal GND18
+signal GND19
+signal GND20
+signal GND21
+signal GND22
+signal GND23
+signal GND24
+signal GND25
+signal GND26
+signal GND27
+signal GND28
+signal GND29
+signal GND30
+signal GND31
+signal GND32
+signal GND33
+signal GND34
+signal GND35
+signal GND36
+signal GND37
+signal GND38
+signal GND39
+signal GND40
+signal CCLK_T15
+signal DONE_R15
+signal HSWAP_EN_E6
+signal M0_P5
+signal M1_U3
+signal M2_R4
+signal PROG_B
+signal TCK
+signal TDI
+signal TDO
+signal TMS
+signal VCCAUX1
+signal VCCAUX2
+signal VCCAUX3
+signal VCCAUX4
+signal VCCAUX5
+signal VCCAUX6
+signal VCCAUX7
+signal VCCAUX8
+signal VCCINT1
+signal VCCINT2
+signal VCCINT3
+signal VCCINT4
+signal VCCINT5
+signal VCCINT6
+signal VCCINT7
+signal VCCINT8
+signal VCCINT9
+signal VCCINT10
+signal VCCINT11
+signal VCCINT12
+signal VCCO01
+signal VCCO02
+signal VCCO03
+signal VCCO04
+signal VCCO11
+signal VCCO12
+signal VCCO13
+signal VCCO14
+signal VCCO21
+signal VCCO22
+signal VCCO23
+signal VCCO31
+signal VCCO32
+signal VCCO33
+signal VCCO41
+signal VCCO42
+signal VCCO43
+signal VCCO44
+signal VCCO51
+signal VCCO52
+signal VCCO53
+signal VCCO54
+signal VCCO61
+signal VCCO62
+signal VCCO63
+signal VCCO71
+signal VCCO72
+signal VCCO73
+signal IO_A2
+signal IO_A3
+signal IO_A4
+signal IO_A5
+signal IO_A7
+signal IO_A8
+signal IO_A9
+signal IO_A10
+signal IO_A11
+signal IO_A12
+signal IO_A14
+signal IO_A15
+signal IO_A16
+signal IO_A17
+signal IO_B1
+signal IO_B3
+signal IO_B4
+signal IO_B5
+signal IO_B6
+signal IO_B9
+signal IO_B10
+signal IO_B13
+signal IO_B14
+signal IO_B15
+signal IO_B18
+signal IO_C1
+signal IO_C2
+signal IO_C3
+signal IO_C4
+signal IO_C5
+signal IO_C7
+signal IO_C8
+signal IO_C11
+signal IO_C12
+signal IO_C14
+signal IO_C15
+signal IO_C16
+signal IO_C17
+signal IO_C18
+signal IO_D1
+signal IO_D2
+signal IO_D3
+signal IO_D5
+signal IO_D6
+signal IO_D7
+signal IO_D8
+signal IO_D9
+signal IO_D10
+signal IO_D11
+signal IO_D12
+signal IO_D13
+signal IO_D14
+signal IO_D16
+signal IO_D17
+signal IO_D18
+signal IO_E1
+signal IO_E2
+signal IO_E3
+signal IO_E4
+signal IO_E7
+signal IO_E8
+signal IO_E9
+signal IO_E10
+signal IO_E11
+signal IO_E12
+signal IO_E13
+signal IO_E15
+signal IO_E16
+signal IO_E17
+signal IO_E18
+signal IO_F2
+signal IO_F4
+signal IO_F5
+signal IO_F8
+signal IO_F9
+signal IO_F10
+signal IO_F11
+signal IO_F14
+signal IO_F15
+signal IO_F17
+signal IO_G1
+signal IO_G3
+signal IO_G4
+signal IO_G5
+signal IO_G14
+signal IO_G15
+signal IO_G16
+signal IO_G18
+signal IO_H1
+signal IO_H2
+signal IO_H3
+signal IO_H4
+signal IO_H5
+signal IO_H6
+signal IO_H13
+signal IO_H14
+signal IO_H15
+signal IO_H16
+signal IO_H17
+signal IO_H18
+signal IO_J1
+signal IO_J2
+signal IO_J4
+signal IO_J5
+signal IO_J6
+signal IO_J13
+signal IO_J14
+signal IO_J15
+signal IO_J17
+signal IO_J18
+signal IO_K1
+signal IO_K2
+signal IO_K4
+signal IO_K5
+signal IO_K6
+signal IO_K13
+signal IO_K14
+signal IO_K15
+signal IO_K17
+signal IO_K18
+signal IO_L1
+signal IO_L2
+signal IO_L3
+signal IO_L4
+signal IO_L5
+signal IO_L6
+signal IO_L13
+signal IO_L14
+signal IO_L15
+signal IO_L16
+signal IO_L17
+signal IO_L18
+signal IO_M1
+signal IO_M3
+signal IO_M4
+signal IO_M5
+signal IO_M14
+signal IO_M15
+signal IO_M16
+signal IO_M18
+signal IO_N2
+signal IO_N4
+signal IO_N5
+signal IO_N8
+signal IO_N9
+signal IO_N10
+signal IO_N11
+signal IO_N14
+signal IO_N15
+signal IO_N17
+signal IO_P1
+signal IO_P2
+signal IO_P3
+signal IO_P4
+signal IO_P6
+signal IO_P7
+signal IO_P8
+signal IO_P9
+signal IO_P10
+signal IO_P11
+signal IO_P12
+signal IO_P13
+signal IO_P14
+signal IO_P15
+signal IO_P16
+signal IO_P17
+signal IO_P18
+signal IO_R1
+signal IO_R2
+signal IO_R3
+signal IO_R5
+signal IO_R6
+signal IO_R7
+signal IO_R8
+signal IO_R9
+signal IO_R10
+signal IO_R11
+signal IO_R12
+signal IO_R13
+signal IO_R14
+signal IO_R16
+signal IO_R17
+signal IO_R18
+signal IO_T1
+signal IO_T2
+signal IO_T3
+signal IO_T4
+signal IO_T5
+signal IO_T7
+signal IO_T8
+signal IO_T11
+signal IO_T12
+signal IO_T14
+signal IO_T16
+signal IO_T17
+signal IO_T18
+signal IO_U1
+signal IO_U4
+signal IO_U5
+signal IO_U6
+signal IO_U9
+signal IO_U10
+signal IO_U13
+signal IO_U14
+signal IO_U15
+signal IO_U16
+signal IO_U18
+signal IO_V2
+signal IO_V3
+signal IO_V4
+signal IO_V5
+signal IO_V7
+signal IO_V8
+signal IO_V9
+signal IO_V10
+signal IO_V11
+signal IO_V12
+signal IO_V14
+signal IO_V15
+signal IO_V16
+
+register BSR 1559
+register BR 1
+register DIR 32
+
+instruction length 6
+
+instruction EXTEST 000000 BSR
+instruction SAMPLE/PRELOAD 000001 BSR
+instruction IDCODE 001001 DIR
+instruction BYPASS 111111 BR
+
+bit 1558 I 1 IO_C16
+bit 1557 O 1 IO_C16 1556 1 Z
+bit 1556 C 1 *
+bit 1555 I 1 IO_C17
+bit 1554 O 1 IO_C17 1553 1 Z
+bit 1553 C 1 *
+bit 1552 O 1 *
+bit 1551 O 1 *
+bit 1550 O 1 *
+bit 1549 O 1 *
+bit 1548 O 1 *
+bit 1547 O 1 *
+bit 1546 O 1 *
+bit 1545 O 1 *
+bit 1544 O 1 *
+bit 1543 O 1 *
+bit 1542 O 1 *
+bit 1541 O 1 *
+bit 1540 O 1 *
+bit 1539 O 1 *
+bit 1538 O 1 *
+bit 1537 O 1 *
+bit 1536 O 1 *
+bit 1535 O 1 *
+bit 1534 O 1 *
+bit 1533 O 1 *
+bit 1532 O 1 *
+bit 1531 O 1 *
+bit 1530 O 1 *
+bit 1529 O 1 *
+bit 1528 O 1 *
+bit 1527 O 1 *
+bit 1526 O 1 *
+bit 1525 O 1 *
+bit 1524 O 1 *
+bit 1523 O 1 *
+bit 1522 O 1 *
+bit 1521 O 1 *
+bit 1520 O 1 *
+bit 1519 O 1 *
+bit 1518 O 1 *
+bit 1517 O 1 *
+bit 1516 O 1 *
+bit 1515 O 1 *
+bit 1514 O 1 *
+bit 1513 O 1 *
+bit 1512 O 1 *
+bit 1511 O 1 *
+bit 1510 O 1 *
+bit 1509 O 1 *
+bit 1508 O 1 *
+bit 1507 O 1 *
+bit 1506 O 1 *
+bit 1505 O 1 *
+bit 1504 O 1 *
+bit 1503 O 1 *
+bit 1502 O 1 *
+bit 1501 O 1 *
+bit 1500 O 1 *
+bit 1499 O 1 *
+bit 1498 I 1 IO_B18
+bit 1497 O 1 IO_B18 1496 1 Z
+bit 1496 C 1 *
+bit 1495 I 1 IO_C18
+bit 1494 O 1 IO_C18 1493 1 Z
+bit 1493 C 1 *
+bit 1492 I 1 IO_D17
+bit 1491 O 1 IO_D17 1490 1 Z
+bit 1490 C 1 *
+bit 1489 I 1 IO_D18
+bit 1488 O 1 IO_D18 1487 1 Z
+bit 1487 C 1 *
+bit 1486 I 1 IO_D16
+bit 1485 O 1 IO_D16 1484 1 Z
+bit 1484 C 1 *
+bit 1483 I 1 IO_E16
+bit 1482 O 1 IO_E16 1481 1 Z
+bit 1481 C 1 *
+bit 1480 I 1 IO_E17
+bit 1479 O 1 IO_E17 1478 1 Z
+bit 1478 C 1 *
+bit 1477 I 1 IO_E18
+bit 1476 O 1 IO_E18 1475 1 Z
+bit 1475 C 1 *
+bit 1474 I 1 IO_F15
+bit 1473 O 1 IO_F15 1472 1 Z
+bit 1472 C 1 *
+bit 1471 I 1 IO_E15
+bit 1470 O 1 IO_E15 1469 1 Z
+bit 1469 C 1 *
+bit 1468 I 1 IO_F14
+bit 1467 O 1 IO_F14 1466 1 Z
+bit 1466 C 1 *
+bit 1465 I 1 IO_G14
+bit 1464 O 1 IO_G14 1463 1 Z
+bit 1463 C 1 *
+bit 1462 I 1 IO_G18
+bit 1461 O 1 IO_G18 1460 1 Z
+bit 1460 C 1 *
+bit 1459 I 1 IO_F17
+bit 1458 O 1 IO_F17 1457 1 Z
+bit 1457 C 1 *
+bit 1456 I 1 IO_G15
+bit 1455 O 1 IO_G15 1454 1 Z
+bit 1454 C 1 *
+bit 1453 I 1 IO_G16
+bit 1452 O 1 IO_G16 1451 1 Z
+bit 1451 C 1 *
+bit 1450 O 1 *
+bit 1449 O 1 *
+bit 1448 O 1 *
+bit 1447 O 1 *
+bit 1446 O 1 *
+bit 1445 O 1 *
+bit 1444 I 1 IO_H13
+bit 1443 O 1 IO_H13 1442 1 Z
+bit 1442 C 1 *
+bit 1441 I 1 IO_H14
+bit 1440 O 1 IO_H14 1439 1 Z
+bit 1439 C 1 *
+bit 1438 O 1 *
+bit 1437 O 1 *
+bit 1436 O 1 *
+bit 1435 O 1 *
+bit 1434 O 1 *
+bit 1433 O 1 *
+bit 1432 O 1 *
+bit 1431 O 1 *
+bit 1430 O 1 *
+bit 1429 O 1 *
+bit 1428 O 1 *
+bit 1427 O 1 *
+bit 1426 O 1 *
+bit 1425 O 1 *
+bit 1424 O 1 *
+bit 1423 O 1 *
+bit 1422 O 1 *
+bit 1421 O 1 *
+bit 1420 O 1 *
+bit 1419 O 1 *
+bit 1418 O 1 *
+bit 1417 O 1 *
+bit 1416 O 1 *
+bit 1415 O 1 *
+bit 1414 O 1 *
+bit 1413 O 1 *
+bit 1412 O 1 *
+bit 1411 O 1 *
+bit 1410 O 1 *
+bit 1409 O 1 *
+bit 1408 O 1 *
+bit 1407 O 1 *
+bit 1406 O 1 *
+bit 1405 O 1 *
+bit 1404 O 1 *
+bit 1403 O 1 *
+bit 1402 I 1 IO_H16
+bit 1401 O 1 IO_H16 1400 1 Z
+bit 1400 C 1 *
+bit 1399 I 1 IO_H15
+bit 1398 O 1 IO_H15 1397 1 Z
+bit 1397 C 1 *
+bit 1396 I 1 IO_H17
+bit 1395 O 1 IO_H17 1394 1 Z
+bit 1394 C 1 *
+bit 1393 I 1 IO_H18
+bit 1392 O 1 IO_H18 1391 1 Z
+bit 1391 C 1 *
+bit 1390 O 1 *
+bit 1389 O 1 *
+bit 1388 O 1 *
+bit 1387 O 1 *
+bit 1386 O 1 *
+bit 1385 O 1 *
+bit 1384 O 1 *
+bit 1383 O 1 *
+bit 1382 O 1 *
+bit 1381 I 1 IO_J13
+bit 1380 O 1 IO_J13 1379 1 Z
+bit 1379 C 1 *
+bit 1378 I 1 IO_J18
+bit 1377 O 1 IO_J18 1376 1 Z
+bit 1376 C 1 *
+bit 1375 I 1 IO_J17
+bit 1374 O 1 IO_J17 1373 1 Z
+bit 1373 C 1 *
+bit 1372 I 1 IO_J15
+bit 1371 O 1 IO_J15 1370 1 Z
+bit 1370 C 1 *
+bit 1369 I 1 IO_J14
+bit 1368 O 1 IO_J14 1367 1 Z
+bit 1367 C 1 *
+bit 1366 I 1 IO_K17
+bit 1365 O 1 IO_K17 1364 1 Z
+bit 1364 C 1 *
+bit 1363 I 1 IO_K18
+bit 1362 O 1 IO_K18 1361 1 Z
+bit 1361 C 1 *
+bit 1360 I 1 IO_K13
+bit 1359 O 1 IO_K13 1358 1 Z
+bit 1358 C 1 *
+bit 1357 I 1 IO_K14
+bit 1356 O 1 IO_K14 1355 1 Z
+bit 1355 C 1 *
+bit 1354 I 1 IO_K15
+bit 1353 O 1 IO_K15 1352 1 Z
+bit 1352 C 1 *
+bit 1351 O 1 *
+bit 1350 O 1 *
+bit 1349 O 1 *
+bit 1348 O 1 *
+bit 1347 O 1 *
+bit 1346 O 1 *
+bit 1345 O 1 *
+bit 1344 O 1 *
+bit 1343 O 1 *
+bit 1342 I 1 IO_L18
+bit 1341 O 1 IO_L18 1340 1 Z
+bit 1340 C 1 *
+bit 1339 I 1 IO_L17
+bit 1338 O 1 IO_L17 1337 1 Z
+bit 1337 C 1 *
+bit 1336 I 1 IO_L15
+bit 1335 O 1 IO_L15 1334 1 Z
+bit 1334 C 1 *
+bit 1333 I 1 IO_L16
+bit 1332 O 1 IO_L16 1331 1 Z
+bit 1331 C 1 *
+bit 1330 O 1 *
+bit 1329 O 1 *
+bit 1328 O 1 *
+bit 1327 O 1 *
+bit 1326 O 1 *
+bit 1325 O 1 *
+bit 1324 O 1 *
+bit 1323 O 1 *
+bit 1322 O 1 *
+bit 1321 O 1 *
+bit 1320 O 1 *
+bit 1319 O 1 *
+bit 1318 O 1 *
+bit 1317 O 1 *
+bit 1316 O 1 *
+bit 1315 O 1 *
+bit 1314 O 1 *
+bit 1313 O 1 *
+bit 1312 O 1 *
+bit 1311 O 1 *
+bit 1310 O 1 *
+bit 1309 O 1 *
+bit 1308 O 1 *
+bit 1307 O 1 *
+bit 1306 O 1 *
+bit 1305 O 1 *
+bit 1304 O 1 *
+bit 1303 O 1 *
+bit 1302 O 1 *
+bit 1301 O 1 *
+bit 1300 O 1 *
+bit 1299 O 1 *
+bit 1298 O 1 *
+bit 1297 O 1 *
+bit 1296 O 1 *
+bit 1295 O 1 *
+bit 1294 I 1 IO_L14
+bit 1293 O 1 IO_L14 1292 1 Z
+bit 1292 C 1 *
+bit 1291 I 1 IO_L13
+bit 1290 O 1 IO_L13 1289 1 Z
+bit 1289 C 1 *
+bit 1288 O 1 *
+bit 1287 O 1 *
+bit 1286 O 1 *
+bit 1285 O 1 *
+bit 1284 O 1 *
+bit 1283 O 1 *
+bit 1282 I 1 IO_M18
+bit 1281 O 1 IO_M18 1280 1 Z
+bit 1280 C 1 *
+bit 1279 I 1 IO_N17
+bit 1278 O 1 IO_N17 1277 1 Z
+bit 1277 C 1 *
+bit 1276 I 1 IO_M15
+bit 1275 O 1 IO_M15 1274 1 Z
+bit 1274 C 1 *
+bit 1273 I 1 IO_M16
+bit 1272 O 1 IO_M16 1271 1 Z
+bit 1271 C 1 *
+bit 1270 I 1 IO_M14
+bit 1269 O 1 IO_M14 1268 1 Z
+bit 1268 C 1 *
+bit 1267 I 1 IO_N14
+bit 1266 O 1 IO_N14 1265 1 Z
+bit 1265 C 1 *
+bit 1264 I 1 IO_P15
+bit 1263 O 1 IO_P15 1262 1 Z
+bit 1262 C 1 *
+bit 1261 I 1 IO_N15
+bit 1260 O 1 IO_N15 1259 1 Z
+bit 1259 C 1 *
+bit 1258 I 1 IO_P18
+bit 1257 O 1 IO_P18 1256 1 Z
+bit 1256 C 1 *
+bit 1255 I 1 IO_P17
+bit 1254 O 1 IO_P17 1253 1 Z
+bit 1253 C 1 *
+bit 1252 I 1 IO_R17
+bit 1251 O 1 IO_R17 1250 1 Z
+bit 1250 C 1 *
+bit 1249 I 1 IO_R18
+bit 1248 O 1 IO_R18 1247 1 Z
+bit 1247 C 1 *
+bit 1246 I 1 IO_P16
+bit 1245 O 1 IO_P16 1244 1 Z
+bit 1244 C 1 *
+bit 1243 I 1 IO_R16
+bit 1242 O 1 IO_R16 1241 1 Z
+bit 1241 C 1 *
+bit 1240 I 1 IO_T18
+bit 1239 O 1 IO_T18 1238 1 Z
+bit 1238 C 1 *
+bit 1237 I 1 IO_U18
+bit 1236 O 1 IO_U18 1235 1 Z
+bit 1235 C 1 *
+bit 1234 O 1 *
+bit 1233 O 1 *
+bit 1232 O 1 *
+bit 1231 O 1 *
+bit 1230 O 1 *
+bit 1229 O 1 *
+bit 1228 O 1 *
+bit 1227 O 1 *
+bit 1226 O 1 *
+bit 1225 O 1 *
+bit 1224 O 1 *
+bit 1223 O 1 *
+bit 1222 O 1 *
+bit 1221 O 1 *
+bit 1220 O 1 *
+bit 1219 O 1 *
+bit 1218 O 1 *
+bit 1217 O 1 *
+bit 1216 O 1 *
+bit 1215 O 1 *
+bit 1214 O 1 *
+bit 1213 O 1 *
+bit 1212 O 1 *
+bit 1211 O 1 *
+bit 1210 O 1 *
+bit 1209 O 1 *
+bit 1208 O 1 *
+bit 1207 O 1 *
+bit 1206 O 1 *
+bit 1205 O 1 *
+bit 1204 O 1 *
+bit 1203 O 1 *
+bit 1202 O 1 *
+bit 1201 O 1 *
+bit 1200 O 1 *
+bit 1199 O 1 *
+bit 1198 O 1 *
+bit 1197 O 1 *
+bit 1196 O 1 *
+bit 1195 O 1 *
+bit 1194 O 1 *
+bit 1193 O 1 *
+bit 1192 O 1 *
+bit 1191 O 1 *
+bit 1190 O 1 *
+bit 1189 O 1 *
+bit 1188 O 1 *
+bit 1187 O 1 *
+bit 1186 O 1 *
+bit 1185 O 1 *
+bit 1184 O 1 *
+bit 1183 O 1 *
+bit 1182 O 1 *
+bit 1181 O 1 *
+bit 1180 I 1 IO_T17
+bit 1179 O 1 IO_T17 1178 1 Z
+bit 1178 C 1 *
+bit 1177 I 1 IO_T16
+bit 1176 O 1 IO_T16 1175 1 Z
+bit 1175 C 1 *
+bit 1174 I 1 CCLK_T15
+bit 1173 O 1 CCLK_T15 1172 1 Z
+bit 1172 C 1 *
+bit 1171 I 1 DONE_R15
+bit 1170 O 1 DONE_R15 1169 1 Z
+bit 1169 C 1 *
+bit 1168 I 1 IO_V17
+bit 1167 O 1 IO_V17 1166 1 Z
+bit 1166 C 1 *
+bit 1165 I 1 IO_U16
+bit 1164 O 1 IO_U16 1163 1 Z
+bit 1163 C 1 *
+bit 1162 I 1 IO_V16
+bit 1161 O 1 IO_V16 1160 1 Z
+bit 1160 C 1 *
+bit 1159 O 1 *
+bit 1158 O 1 *
+bit 1157 O 1 *
+bit 1156 O 1 *
+bit 1155 O 1 *
+bit 1154 O 1 *
+bit 1153 O 1 *
+bit 1152 O 1 *
+bit 1151 O 1 *
+bit 1150 O 1 *
+bit 1149 O 1 *
+bit 1148 O 1 *
+bit 1147 O 1 *
+bit 1146 O 1 *
+bit 1145 O 1 *
+bit 1144 I 1 IO_P14
+bit 1143 O 1 IO_P14 1142 1 Z
+bit 1142 C 1 *
+bit 1141 I 1 IO_R14
+bit 1140 O 1 IO_R14 1139 1 Z
+bit 1139 C 1 *
+bit 1138 O 1 *
+bit 1137 O 1 *
+bit 1136 O 1 *
+bit 1135 O 1 *
+bit 1134 O 1 *
+bit 1133 O 1 *
+bit 1132 O 1 *
+bit 1131 O 1 *
+bit 1130 O 1 *
+bit 1129 O 1 *
+bit 1128 O 1 *
+bit 1127 O 1 *
+bit 1126 O 1 *
+bit 1125 O 1 *
+bit 1124 O 1 *
+bit 1123 O 1 *
+bit 1122 O 1 *
+bit 1121 O 1 *
+bit 1120 I 1 IO_U15
+bit 1119 O 1 IO_U15 1118 1 Z
+bit 1118 C 1 *
+bit 1117 I 1 IO_V15
+bit 1116 O 1 IO_V15 1115 1 Z
+bit 1115 C 1 *
+bit 1114 I 1 IO_T14
+bit 1113 O 1 IO_T14 1112 1 Z
+bit 1112 C 1 *
+bit 1111 I 1 IO_U14
+bit 1110 O 1 IO_U14 1109 1 Z
+bit 1109 C 1 *
+bit 1108 O 1 *
+bit 1107 O 1 *
+bit 1106 O 1 *
+bit 1105 O 1 *
+bit 1104 O 1 *
+bit 1103 O 1 *
+bit 1102 O 1 *
+bit 1101 O 1 *
+bit 1100 O 1 *
+bit 1099 O 1 *
+bit 1098 O 1 *
+bit 1097 O 1 *
+bit 1096 O 1 *
+bit 1095 O 1 *
+bit 1094 O 1 *
+bit 1093 O 1 *
+bit 1092 O 1 *
+bit 1091 O 1 *
+bit 1090 O 1 *
+bit 1089 O 1 *
+bit 1088 O 1 *
+bit 1087 O 1 *
+bit 1086 O 1 *
+bit 1085 O 1 *
+bit 1084 I 1 IO_V14
+bit 1083 O 1 IO_V14 1082 1 Z
+bit 1082 C 1 *
+bit 1081 O 1 *
+bit 1080 O 1 *
+bit 1079 O 1 *
+bit 1078 O 1 *
+bit 1077 O 1 *
+bit 1076 O 1 *
+bit 1075 O 1 *
+bit 1074 O 1 *
+bit 1073 O 1 *
+bit 1072 O 1 *
+bit 1071 O 1 *
+bit 1070 O 1 *
+bit 1069 O 1 *
+bit 1068 O 1 *
+bit 1067 O 1 *
+bit 1066 O 1 *
+bit 1065 O 1 *
+bit 1064 O 1 *
+bit 1063 I 1 IO_U13
+bit 1062 O 1 IO_U13 1061 1 Z
+bit 1061 C 1 *
+bit 1060 O 1 *
+bit 1059 O 1 *
+bit 1058 O 1 *
+bit 1057 O 1 *
+bit 1056 O 1 *
+bit 1055 O 1 *
+bit 1054 O 1 *
+bit 1053 O 1 *
+bit 1052 O 1 *
+bit 1051 O 1 *
+bit 1050 O 1 *
+bit 1049 O 1 *
+bit 1048 O 1 *
+bit 1047 O 1 *
+bit 1046 O 1 *
+bit 1045 O 1 *
+bit 1044 O 1 *
+bit 1043 O 1 *
+bit 1042 O 1 *
+bit 1041 O 1 *
+bit 1040 O 1 *
+bit 1039 O 1 *
+bit 1038 O 1 *
+bit 1037 O 1 *
+bit 1036 O 1 *
+bit 1035 O 1 *
+bit 1034 O 1 *
+bit 1033 O 1 *
+bit 1032 O 1 *
+bit 1031 O 1 *
+bit 1030 I 1 IO_R13
+bit 1029 O 1 IO_R13 1028 1 Z
+bit 1028 C 1 *
+bit 1027 I 1 IO_P13
+bit 1026 O 1 IO_P13 1025 1 Z
+bit 1025 C 1 *
+bit 1024 O 1 *
+bit 1023 O 1 *
+bit 1022 O 1 *
+bit 1021 O 1 *
+bit 1020 O 1 *
+bit 1019 O 1 *
+bit 1018 I 1 IO_P12
+bit 1017 O 1 IO_P12 1016 1 Z
+bit 1016 C 1 *
+bit 1015 I 1 IO_T12
+bit 1014 O 1 IO_T12 1013 1 Z
+bit 1013 C 1 *
+bit 1012 I 1 IO_R12
+bit 1011 O 1 IO_R12 1010 1 Z
+bit 1010 C 1 *
+bit 1009 I 1 IO_V12
+bit 1008 O 1 IO_V12 1007 1 Z
+bit 1007 C 1 *
+bit 1006 I 1 IO_V11
+bit 1005 O 1 IO_V11 1004 1 Z
+bit 1004 C 1 *
+bit 1003 O 1 *
+bit 1002 O 1 *
+bit 1001 O 1 *
+bit 1000 I 1 IO_R11
+bit 999 O 1 IO_R11 998 1 Z
+bit 998 C 1 *
+bit 997 I 1 IO_T11
+bit 996 O 1 IO_T11 995 1 Z
+bit 995 C 1 *
+bit 994 I 1 IO_N11
+bit 993 O 1 IO_N11 992 1 Z
+bit 992 C 1 *
+bit 991 I 1 IO_P11
+bit 990 O 1 IO_P11 989 1 Z
+bit 989 C 1 *
+bit 988 I 1 IO_R10
+bit 987 O 1 IO_R10 986 1 Z
+bit 986 C 1 *
+bit 985 I 1 IO_U10
+bit 984 O 1 IO_U10 983 1 Z
+bit 983 C 1 *
+bit 982 I 1 IO_V10
+bit 981 O 1 IO_V10 980 1 Z
+bit 980 C 1 *
+bit 979 I 1 IO_N10
+bit 978 O 1 IO_N10 977 1 Z
+bit 977 C 1 *
+bit 976 I 1 IO_P10
+bit 975 O 1 IO_P10 974 1 Z
+bit 974 C 1 *
+bit 973 I 1 IO_R9
+bit 972 O 1 IO_R9 971 1 Z
+bit 971 C 1 *
+bit 970 I 1 IO_N9
+bit 969 O 1 IO_N9 968 1 Z
+bit 968 C 1 *
+bit 967 I 1 IO_P9
+bit 966 O 1 IO_P9 965 1 Z
+bit 965 C 1 *
+bit 964 I 1 IO_U9
+bit 963 O 1 IO_U9 962 1 Z
+bit 962 C 1 *
+bit 961 I 1 IO_V9
+bit 960 O 1 IO_V9 959 1 Z
+bit 959 C 1 *
+bit 958 I 1 IO_N8
+bit 957 O 1 IO_N8 956 1 Z
+bit 956 C 1 *
+bit 955 I 1 IO_R8
+bit 954 O 1 IO_R8 953 1 Z
+bit 953 C 1 *
+bit 952 I 1 IO_T8
+bit 951 O 1 IO_T8 950 1 Z
+bit 950 C 1 *
+bit 949 I 1 IO_V8
+bit 948 O 1 IO_V8 947 1 Z
+bit 947 C 1 *
+bit 946 I 1 IO_V7
+bit 945 O 1 IO_V7 944 1 Z
+bit 944 C 1 *
+bit 943 I 1 IO_P8
+bit 942 O 1 IO_P8 941 1 Z
+bit 941 C 1 *
+bit 940 I 1 IO_R7
+bit 939 O 1 IO_R7 938 1 Z
+bit 938 C 1 *
+bit 937 I 1 IO_T7
+bit 936 O 1 IO_T7 935 1 Z
+bit 935 C 1 *
+bit 934 I 1 IO_P6
+bit 933 O 1 IO_P6 932 1 Z
+bit 932 C 1 *
+bit 931 I 1 IO_P7
+bit 930 O 1 IO_P7 929 1 Z
+bit 929 C 1 *
+bit 928 I 1 IO_U6
+bit 927 O 1 IO_U6 926 1 Z
+bit 926 C 1 *
+bit 925 O 1 *
+bit 924 O 1 *
+bit 923 O 1 *
+bit 922 O 1 *
+bit 921 O 1 *
+bit 920 O 1 *
+bit 919 O 1 *
+bit 918 O 1 *
+bit 917 O 1 *
+bit 916 O 1 *
+bit 915 O 1 *
+bit 914 O 1 *
+bit 913 O 1 *
+bit 912 O 1 *
+bit 911 O 1 *
+bit 910 O 1 *
+bit 909 O 1 *
+bit 908 O 1 *
+bit 907 O 1 *
+bit 906 O 1 *
+bit 905 O 1 *
+bit 904 O 1 *
+bit 903 O 1 *
+bit 902 O 1 *
+bit 901 O 1 *
+bit 900 O 1 *
+bit 899 O 1 *
+bit 898 O 1 *
+bit 897 O 1 *
+bit 896 O 1 *
+bit 895 O 1 *
+bit 894 O 1 *
+bit 893 O 1 *
+bit 892 O 1 *
+bit 891 O 1 *
+bit 890 O 1 *
+bit 889 O 1 *
+bit 888 O 1 *
+bit 887 O 1 *
+bit 886 O 1 *
+bit 885 O 1 *
+bit 884 O 1 *
+bit 883 O 1 *
+bit 882 O 1 *
+bit 881 O 1 *
+bit 880 O 1 *
+bit 879 O 1 *
+bit 878 O 1 *
+bit 877 O 1 *
+bit 876 O 1 *
+bit 875 O 1 *
+bit 874 O 1 *
+bit 873 O 1 *
+bit 872 O 1 *
+bit 871 O 1 *
+bit 870 O 1 *
+bit 869 O 1 *
+bit 868 O 1 *
+bit 867 O 1 *
+bit 866 O 1 *
+bit 865 I 1 IO_V5
+bit 864 O 1 IO_V5 863 1 Z
+bit 863 C 1 *
+bit 862 I 1 IO_U5
+bit 861 O 1 IO_U5 860 1 Z
+bit 860 C 1 *
+bit 859 I 1 IO_R6
+bit 858 O 1 IO_R6 857 1 Z
+bit 857 C 1 *
+bit 856 I 1 IO_R5
+bit 855 O 1 IO_R5 854 1 Z
+bit 854 C 1 *
+bit 853 O 1 *
+bit 852 O 1 *
+bit 851 O 1 *
+bit 850 O 1 *
+bit 849 O 1 *
+bit 848 O 1 *
+bit 847 O 1 *
+bit 846 O 1 *
+bit 845 O 1 *
+bit 844 O 1 *
+bit 843 O 1 *
+bit 842 O 1 *
+bit 841 O 1 *
+bit 840 O 1 *
+bit 839 O 1 *
+bit 838 O 1 *
+bit 837 O 1 *
+bit 836 O 1 *
+bit 835 I 1 IO_V4
+bit 834 O 1 IO_V4 833 1 Z
+bit 833 C 1 *
+bit 832 I 1 IO_U4
+bit 831 O 1 IO_U4 830 1 Z
+bit 830 C 1 *
+bit 829 O 1 *
+bit 828 O 1 *
+bit 827 O 1 *
+bit 826 O 1 *
+bit 825 O 1 *
+bit 824 O 1 *
+bit 823 O 1 *
+bit 822 O 1 *
+bit 821 O 1 *
+bit 820 O 1 *
+bit 819 O 1 *
+bit 818 O 1 *
+bit 817 O 1 *
+bit 816 O 1 *
+bit 815 O 1 *
+bit 814 O 1 *
+bit 813 O 1 *
+bit 812 O 1 *
+bit 811 O 1 *
+bit 810 O 1 *
+bit 809 O 1 *
+bit 808 O 1 *
+bit 807 O 1 *
+bit 806 O 1 *
+bit 805 I 1 IO_T5
+bit 804 O 1 IO_T5 803 1 Z
+bit 803 C 1 *
+bit 802 I 1 IO_T4
+bit 801 O 1 IO_T4 800 1 Z
+bit 800 C 1 *
+bit 799 O 1 *
+bit 798 O 1 *
+bit 797 O 1 *
+bit 796 O 1 *
+bit 795 O 1 *
+bit 794 O 1 *
+bit 793 O 1 *
+bit 792 O 1 *
+bit 791 O 1 *
+bit 790 O 1 *
+bit 789 O 1 *
+bit 788 O 1 *
+bit 787 O 1 *
+bit 786 O 1 *
+bit 785 O 1 *
+bit 784 I 1 IO_V3
+bit 783 O 1 IO_V3 782 1 Z
+bit 782 C 1 *
+bit 781 I 1 IO_V2
+bit 780 O 1 IO_V2 779 1 Z
+bit 779 C 1 *
+bit 778 I 1 M2_R4
+bit 777 I 1 M0_P5
+bit 776 I 1 M1_U3
+bit 775 I 1 IO_T3
+bit 774 O 1 IO_T3 773 1 Z
+bit 773 C 1 *
+bit 772 I 1 IO_T2
+bit 771 O 1 IO_T2 770 1 Z
+bit 770 C 1 *
+bit 769 O 1 *
+bit 768 O 1 *
+bit 767 O 1 *
+bit 766 O 1 *
+bit 765 O 1 *
+bit 764 O 1 *
+bit 763 O 1 *
+bit 762 O 1 *
+bit 761 O 1 *
+bit 760 O 1 *
+bit 759 O 1 *
+bit 758 O 1 *
+bit 757 O 1 *
+bit 756 O 1 *
+bit 755 O 1 *
+bit 754 O 1 *
+bit 753 O 1 *
+bit 752 O 1 *
+bit 751 O 1 *
+bit 750 O 1 *
+bit 749 O 1 *
+bit 748 O 1 *
+bit 747 O 1 *
+bit 746 O 1 *
+bit 745 O 1 *
+bit 744 O 1 *
+bit 743 O 1 *
+bit 742 O 1 *
+bit 741 O 1 *
+bit 740 O 1 *
+bit 739 O 1 *
+bit 738 O 1 *
+bit 737 O 1 *
+bit 736 O 1 *
+bit 735 O 1 *
+bit 734 O 1 *
+bit 733 O 1 *
+bit 732 O 1 *
+bit 731 O 1 *
+bit 730 O 1 *
+bit 729 O 1 *
+bit 728 O 1 *
+bit 727 O 1 *
+bit 726 O 1 *
+bit 725 O 1 *
+bit 724 O 1 *
+bit 723 O 1 *
+bit 722 O 1 *
+bit 721 O 1 *
+bit 720 O 1 *
+bit 719 O 1 *
+bit 718 O 1 *
+bit 717 O 1 *
+bit 716 O 1 *
+bit 715 I 1 IO_U1
+bit 714 O 1 IO_U1 713 1 Z
+bit 713 C 1 *
+bit 712 I 1 IO_T1
+bit 711 O 1 IO_T1 710 1 Z
+bit 710 C 1 *
+bit 709 I 1 IO_R2
+bit 708 O 1 IO_R2 707 1 Z
+bit 707 C 1 *
+bit 706 I 1 IO_R1
+bit 705 O 1 IO_R1 704 1 Z
+bit 704 C 1 *
+bit 703 I 1 IO_R3
+bit 702 O 1 IO_R3 701 1 Z
+bit 701 C 1 *
+bit 700 I 1 IO_P3
+bit 699 O 1 IO_P3 698 1 Z
+bit 698 C 1 *
+bit 697 I 1 IO_P2
+bit 696 O 1 IO_P2 695 1 Z
+bit 695 C 1 *
+bit 694 I 1 IO_P1
+bit 693 O 1 IO_P1 692 1 Z
+bit 692 C 1 *
+bit 691 I 1 IO_N4
+bit 690 O 1 IO_N4 689 1 Z
+bit 689 C 1 *
+bit 688 I 1 IO_P4
+bit 687 O 1 IO_P4 686 1 Z
+bit 686 C 1 *
+bit 685 I 1 IO_N5
+bit 684 O 1 IO_N5 683 1 Z
+bit 683 C 1 *
+bit 682 I 1 IO_M5
+bit 681 O 1 IO_M5 680 1 Z
+bit 680 C 1 *
+bit 679 I 1 IO_M3
+bit 678 O 1 IO_M3 677 1 Z
+bit 677 C 1 *
+bit 676 I 1 IO_M4
+bit 675 O 1 IO_M4 674 1 Z
+bit 674 C 1 *
+bit 673 I 1 IO_N2
+bit 672 O 1 IO_N2 671 1 Z
+bit 671 C 1 *
+bit 670 I 1 IO_M1
+bit 669 O 1 IO_M1 668 1 Z
+bit 668 C 1 *
+bit 667 O 1 *
+bit 666 O 1 *
+bit 665 O 1 *
+bit 664 O 1 *
+bit 663 O 1 *
+bit 662 O 1 *
+bit 661 I 1 IO_L6
+bit 660 O 1 IO_L6 659 1 Z
+bit 659 C 1 *
+bit 658 I 1 IO_L5
+bit 657 O 1 IO_L5 656 1 Z
+bit 656 C 1 *
+bit 655 O 1 *
+bit 654 O 1 *
+bit 653 O 1 *
+bit 652 O 1 *
+bit 651 O 1 *
+bit 650 O 1 *
+bit 649 O 1 *
+bit 648 O 1 *
+bit 647 O 1 *
+bit 646 O 1 *
+bit 645 O 1 *
+bit 644 O 1 *
+bit 643 O 1 *
+bit 642 O 1 *
+bit 641 O 1 *
+bit 640 O 1 *
+bit 639 O 1 *
+bit 638 O 1 *
+bit 637 O 1 *
+bit 636 O 1 *
+bit 635 O 1 *
+bit 634 O 1 *
+bit 633 O 1 *
+bit 632 O 1 *
+bit 631 O 1 *
+bit 630 O 1 *
+bit 629 O 1 *
+bit 628 O 1 *
+bit 627 O 1 *
+bit 626 O 1 *
+bit 625 O 1 *
+bit 624 O 1 *
+bit 623 O 1 *
+bit 622 O 1 *
+bit 621 O 1 *
+bit 620 O 1 *
+bit 619 I 1 IO_L3
+bit 618 O 1 IO_L3 617 1 Z
+bit 617 C 1 *
+bit 616 I 1 IO_L4
+bit 615 O 1 IO_L4 614 1 Z
+bit 614 C 1 *
+bit 613 I 1 IO_L2
+bit 612 O 1 IO_L2 611 1 Z
+bit 611 C 1 *
+bit 610 I 1 IO_L1
+bit 609 O 1 IO_L1 608 1 Z
+bit 608 C 1 *
+bit 607 O 1 *
+bit 606 O 1 *
+bit 605 O 1 *
+bit 604 O 1 *
+bit 603 O 1 *
+bit 602 O 1 *
+bit 601 O 1 *
+bit 600 O 1 *
+bit 599 O 1 *
+bit 598 I 1 IO_K6
+bit 597 O 1 IO_K6 596 1 Z
+bit 596 C 1 *
+bit 595 I 1 IO_K5
+bit 594 O 1 IO_K5 593 1 Z
+bit 593 C 1 *
+bit 592 I 1 IO_K4
+bit 591 O 1 IO_K4 590 1 Z
+bit 590 C 1 *
+bit 589 I 1 IO_K1
+bit 588 O 1 IO_K1 587 1 Z
+bit 587 C 1 *
+bit 586 I 1 IO_K2
+bit 585 O 1 IO_K2 584 1 Z
+bit 584 C 1 *
+bit 583 I 1 IO_J5
+bit 582 O 1 IO_J5 581 1 Z
+bit 581 C 1 *
+bit 580 I 1 IO_J4
+bit 579 O 1 IO_J4 578 1 Z
+bit 578 C 1 *
+bit 577 I 1 IO_J1
+bit 576 O 1 IO_J1 575 1 Z
+bit 575 C 1 *
+bit 574 I 1 IO_J2
+bit 573 O 1 IO_J2 572 1 Z
+bit 572 C 1 *
+bit 571 I 1 IO_J6
+bit 570 O 1 IO_J6 569 1 Z
+bit 569 C 1 *
+bit 568 O 1 *
+bit 567 O 1 *
+bit 566 O 1 *
+bit 565 O 1 *
+bit 564 O 1 *
+bit 563 O 1 *
+bit 562 O 1 *
+bit 561 O 1 *
+bit 560 O 1 *
+bit 559 I 1 IO_H1
+bit 558 O 1 IO_H1 557 1 Z
+bit 557 C 1 *
+bit 556 I 1 IO_H2
+bit 555 O 1 IO_H2 554 1 Z
+bit 554 C 1 *
+bit 553 I 1 IO_H4
+bit 552 O 1 IO_H4 551 1 Z
+bit 551 C 1 *
+bit 550 I 1 IO_H3
+bit 549 O 1 IO_H3 548 1 Z
+bit 548 C 1 *
+bit 547 O 1 *
+bit 546 O 1 *
+bit 545 O 1 *
+bit 544 O 1 *
+bit 543 O 1 *
+bit 542 O 1 *
+bit 541 O 1 *
+bit 540 O 1 *
+bit 539 O 1 *
+bit 538 O 1 *
+bit 537 O 1 *
+bit 536 O 1 *
+bit 535 O 1 *
+bit 534 O 1 *
+bit 533 O 1 *
+bit 532 O 1 *
+bit 531 O 1 *
+bit 530 O 1 *
+bit 529 O 1 *
+bit 528 O 1 *
+bit 527 O 1 *
+bit 526 O 1 *
+bit 525 O 1 *
+bit 524 O 1 *
+bit 523 O 1 *
+bit 522 O 1 *
+bit 521 O 1 *
+bit 520 O 1 *
+bit 519 O 1 *
+bit 518 O 1 *
+bit 517 O 1 *
+bit 516 O 1 *
+bit 515 O 1 *
+bit 514 O 1 *
+bit 513 O 1 *
+bit 512 O 1 *
+bit 511 I 1 IO_H5
+bit 510 O 1 IO_H5 509 1 Z
+bit 509 C 1 *
+bit 508 I 1 IO_H6
+bit 507 O 1 IO_H6 506 1 Z
+bit 506 C 1 *
+bit 505 O 1 *
+bit 504 O 1 *
+bit 503 O 1 *
+bit 502 O 1 *
+bit 501 O 1 *
+bit 500 O 1 *
+bit 499 I 1 IO_G4
+bit 498 O 1 IO_G4 497 1 Z
+bit 497 C 1 *
+bit 496 I 1 IO_G3
+bit 495 O 1 IO_G3 494 1 Z
+bit 494 C 1 *
+bit 493 I 1 IO_G1
+bit 492 O 1 IO_G1 491 1 Z
+bit 491 C 1 *
+bit 490 I 1 IO_F2
+bit 489 O 1 IO_F2 488 1 Z
+bit 488 C 1 *
+bit 487 I 1 IO_G5
+bit 486 O 1 IO_G5 485 1 Z
+bit 485 C 1 *
+bit 484 I 1 IO_F5
+bit 483 O 1 IO_F5 482 1 Z
+bit 482 C 1 *
+bit 481 I 1 IO_E4
+bit 480 O 1 IO_E4 479 1 Z
+bit 479 C 1 *
+bit 478 I 1 IO_F4
+bit 477 O 1 IO_F4 476 1 Z
+bit 476 C 1 *
+bit 475 I 1 IO_E2
+bit 474 O 1 IO_E2 473 1 Z
+bit 473 C 1 *
+bit 472 I 1 IO_E1
+bit 471 O 1 IO_E1 470 1 Z
+bit 470 C 1 *
+bit 469 I 1 IO_E3
+bit 468 O 1 IO_E3 467 1 Z
+bit 467 C 1 *
+bit 466 I 1 IO_D3
+bit 465 O 1 IO_D3 464 1 Z
+bit 464 C 1 *
+bit 463 I 1 IO_D1
+bit 462 O 1 IO_D1 461 1 Z
+bit 461 C 1 *
+bit 460 I 1 IO_D2
+bit 459 O 1 IO_D2 458 1 Z
+bit 458 C 1 *
+bit 457 I 1 IO_C1
+bit 456 O 1 IO_C1 455 1 Z
+bit 455 C 1 *
+bit 454 I 1 IO_B1
+bit 453 O 1 IO_B1 452 1 Z
+bit 452 C 1 *
+bit 451 O 1 *
+bit 450 O 1 *
+bit 449 O 1 *
+bit 448 O 1 *
+bit 447 O 1 *
+bit 446 O 1 *
+bit 445 O 1 *
+bit 444 O 1 *
+bit 443 O 1 *
+bit 442 O 1 *
+bit 441 O 1 *
+bit 440 O 1 *
+bit 439 O 1 *
+bit 438 O 1 *
+bit 437 O 1 *
+bit 436 O 1 *
+bit 435 O 1 *
+bit 434 O 1 *
+bit 433 O 1 *
+bit 432 O 1 *
+bit 431 O 1 *
+bit 430 O 1 *
+bit 429 O 1 *
+bit 428 O 1 *
+bit 427 O 1 *
+bit 426 O 1 *
+bit 425 O 1 *
+bit 424 O 1 *
+bit 423 O 1 *
+bit 422 O 1 *
+bit 421 O 1 *
+bit 420 O 1 *
+bit 419 O 1 *
+bit 418 O 1 *
+bit 417 O 1 *
+bit 416 O 1 *
+bit 415 O 1 *
+bit 414 O 1 *
+bit 413 O 1 *
+bit 412 O 1 *
+bit 411 O 1 *
+bit 410 O 1 *
+bit 409 O 1 *
+bit 408 O 1 *
+bit 407 O 1 *
+bit 406 O 1 *
+bit 405 O 1 *
+bit 404 O 1 *
+bit 403 O 1 *
+bit 402 O 1 *
+bit 401 O 1 *
+bit 400 O 1 *
+bit 399 O 1 *
+bit 398 O 1 *
+bit 397 I 1 IO_C3
+bit 396 O 1 IO_C3 395 1 Z
+bit 395 C 1 *
+bit 394 I 1 IO_C2
+bit 393 O 1 IO_C2 392 1 Z
+bit 392 C 1 *
+bit 391 O 1 *
+bit 390 I 1 HSWAP_EN_E6
+bit 389 I 1 IO_B3
+bit 388 O 1 IO_B3 387 1 Z
+bit 387 C 1 *
+bit 386 I 1 IO_A2
+bit 385 O 1 IO_A2 384 1 Z
+bit 384 C 1 *
+bit 383 I 1 IO_A3
+bit 382 O 1 IO_A3 381 1 Z
+bit 381 C 1 *
+bit 380 O 1 *
+bit 379 O 1 *
+bit 378 O 1 *
+bit 377 O 1 *
+bit 376 O 1 *
+bit 375 O 1 *
+bit 374 O 1 *
+bit 373 O 1 *
+bit 372 O 1 *
+bit 371 O 1 *
+bit 370 O 1 *
+bit 369 O 1 *
+bit 368 O 1 *
+bit 367 O 1 *
+bit 366 O 1 *
+bit 365 O 1 *
+bit 364 O 1 *
+bit 363 O 1 *
+bit 362 O 1 *
+bit 361 O 1 *
+bit 360 O 1 *
+bit 359 O 1 *
+bit 358 O 1 *
+bit 357 O 1 *
+bit 356 O 1 *
+bit 355 O 1 *
+bit 354 O 1 *
+bit 353 O 1 *
+bit 352 O 1 *
+bit 351 O 1 *
+bit 350 O 1 *
+bit 349 O 1 *
+bit 348 O 1 *
+bit 347 O 1 *
+bit 346 O 1 *
+bit 345 O 1 *
+bit 344 O 1 *
+bit 343 O 1 *
+bit 342 O 1 *
+bit 341 I 1 IO_B4
+bit 340 O 1 IO_B4 339 1 Z
+bit 339 C 1 *
+bit 338 I 1 IO_C4
+bit 337 O 1 IO_C4 336 1 Z
+bit 336 C 1 *
+bit 335 I 1 IO_C5
+bit 334 O 1 IO_C5 333 1 Z
+bit 333 C 1 *
+bit 332 I 1 IO_D5
+bit 331 O 1 IO_D5 330 1 Z
+bit 330 C 1 *
+bit 329 O 1 *
+bit 328 O 1 *
+bit 327 O 1 *
+bit 326 O 1 *
+bit 325 O 1 *
+bit 324 O 1 *
+bit 323 O 1 *
+bit 322 O 1 *
+bit 321 O 1 *
+bit 320 O 1 *
+bit 319 O 1 *
+bit 318 O 1 *
+bit 317 O 1 *
+bit 316 O 1 *
+bit 315 O 1 *
+bit 314 O 1 *
+bit 313 O 1 *
+bit 312 O 1 *
+bit 311 I 1 IO_A4
+bit 310 O 1 IO_A4 309 1 Z
+bit 309 C 1 *
+bit 308 I 1 IO_A5
+bit 307 O 1 IO_A5 306 1 Z
+bit 306 C 1 *
+bit 305 O 1 *
+bit 304 O 1 *
+bit 303 O 1 *
+bit 302 O 1 *
+bit 301 O 1 *
+bit 300 O 1 *
+bit 299 O 1 *
+bit 298 O 1 *
+bit 297 O 1 *
+bit 296 O 1 *
+bit 295 O 1 *
+bit 294 O 1 *
+bit 293 O 1 *
+bit 292 O 1 *
+bit 291 O 1 *
+bit 290 O 1 *
+bit 289 O 1 *
+bit 288 O 1 *
+bit 287 O 1 *
+bit 286 O 1 *
+bit 285 O 1 *
+bit 284 I 1 IO_D6
+bit 283 O 1 IO_D6 282 1 Z
+bit 282 C 1 *
+bit 281 O 1 *
+bit 280 O 1 *
+bit 279 O 1 *
+bit 278 O 1 *
+bit 277 O 1 *
+bit 276 O 1 *
+bit 275 O 1 *
+bit 274 O 1 *
+bit 273 O 1 *
+bit 272 O 1 *
+bit 271 O 1 *
+bit 270 O 1 *
+bit 269 O 1 *
+bit 268 O 1 *
+bit 267 O 1 *
+bit 266 O 1 *
+bit 265 O 1 *
+bit 264 O 1 *
+bit 263 O 1 *
+bit 262 O 1 *
+bit 261 O 1 *
+bit 260 O 1 *
+bit 259 O 1 *
+bit 258 O 1 *
+bit 257 O 1 *
+bit 256 O 1 *
+bit 255 O 1 *
+bit 254 O 1 *
+bit 253 O 1 *
+bit 252 O 1 *
+bit 251 I 1 IO_B5
+bit 250 O 1 IO_B5 249 1 Z
+bit 249 C 1 *
+bit 248 I 1 IO_B6
+bit 247 O 1 IO_B6 246 1 Z
+bit 246 C 1 *
+bit 245 O 1 *
+bit 244 O 1 *
+bit 243 O 1 *
+bit 242 O 1 *
+bit 241 O 1 *
+bit 240 O 1 *
+bit 239 I 1 IO_E7
+bit 238 O 1 IO_E7 237 1 Z
+bit 237 C 1 *
+bit 236 I 1 IO_C7
+bit 235 O 1 IO_C7 234 1 Z
+bit 234 C 1 *
+bit 233 I 1 IO_D7
+bit 232 O 1 IO_D7 231 1 Z
+bit 231 C 1 *
+bit 230 I 1 IO_C8
+bit 229 O 1 IO_C8 228 1 Z
+bit 228 C 1 *
+bit 227 I 1 IO_D8
+bit 226 O 1 IO_D8 225 1 Z
+bit 225 C 1 *
+bit 224 O 1 *
+bit 223 O 1 *
+bit 222 O 1 *
+bit 221 I 1 IO_E8
+bit 220 O 1 IO_E8 219 1 Z
+bit 219 C 1 *
+bit 218 I 1 IO_F8
+bit 217 O 1 IO_F8 216 1 Z
+bit 216 C 1 *
+bit 215 I 1 IO_A7
+bit 214 O 1 IO_A7 213 1 Z
+bit 213 C 1 *
+bit 212 I 1 IO_A8
+bit 211 O 1 IO_A8 210 1 Z
+bit 210 C 1 *
+bit 209 I 1 IO_D9
+bit 208 O 1 IO_D9 207 1 Z
+bit 207 C 1 *
+bit 206 I 1 IO_B9
+bit 205 O 1 IO_B9 204 1 Z
+bit 204 C 1 *
+bit 203 I 1 IO_A9
+bit 202 O 1 IO_A9 201 1 Z
+bit 201 C 1 *
+bit 200 I 1 IO_E9
+bit 199 O 1 IO_E9 198 1 Z
+bit 198 C 1 *
+bit 197 I 1 IO_F9
+bit 196 O 1 IO_F9 195 1 Z
+bit 195 C 1 *
+bit 194 I 1 IO_D10
+bit 193 O 1 IO_D10 192 1 Z
+bit 192 C 1 *
+bit 191 I 1 IO_E10
+bit 190 O 1 IO_E10 189 1 Z
+bit 189 C 1 *
+bit 188 I 1 IO_F10
+bit 187 O 1 IO_F10 186 1 Z
+bit 186 C 1 *
+bit 185 I 1 IO_A10
+bit 184 O 1 IO_A10 183 1 Z
+bit 183 C 1 *
+bit 182 I 1 IO_B10
+bit 181 O 1 IO_B10 180 1 Z
+bit 180 C 1 *
+bit 179 I 1 IO_A11
+bit 178 O 1 IO_A11 177 1 Z
+bit 177 C 1 *
+bit 176 I 1 IO_C11
+bit 175 O 1 IO_C11 174 1 Z
+bit 174 C 1 *
+bit 173 I 1 IO_D11
+bit 172 O 1 IO_D11 171 1 Z
+bit 171 C 1 *
+bit 170 I 1 IO_F11
+bit 169 O 1 IO_F11 168 1 Z
+bit 168 C 1 *
+bit 167 I 1 IO_E11
+bit 166 O 1 IO_E11 165 1 Z
+bit 165 C 1 *
+bit 164 I 1 IO_A12
+bit 163 O 1 IO_A12 162 1 Z
+bit 162 C 1 *
+bit 161 I 1 IO_C12
+bit 160 O 1 IO_C12 159 1 Z
+bit 159 C 1 *
+bit 158 I 1 IO_D12
+bit 157 O 1 IO_D12 156 1 Z
+bit 156 C 1 *
+bit 155 I 1 IO_E13
+bit 154 O 1 IO_E13 153 1 Z
+bit 153 C 1 *
+bit 152 I 1 IO_E12
+bit 151 O 1 IO_E12 150 1 Z
+bit 150 C 1 *
+bit 149 I 1 IO_B13
+bit 148 O 1 IO_B13 147 1 Z
+bit 147 C 1 *
+bit 146 O 1 *
+bit 145 O 1 *
+bit 144 O 1 *
+bit 143 O 1 *
+bit 142 O 1 *
+bit 141 O 1 *
+bit 140 O 1 *
+bit 139 O 1 *
+bit 138 O 1 *
+bit 137 O 1 *
+bit 136 O 1 *
+bit 135 O 1 *
+bit 134 O 1 *
+bit 133 O 1 *
+bit 132 O 1 *
+bit 131 I 1 IO_D14
+bit 130 O 1 IO_D14 129 1 Z
+bit 129 C 1 *
+bit 128 I 1 IO_D13
+bit 127 O 1 IO_D13 126 1 Z
+bit 126 C 1 *
+bit 125 O 1 *
+bit 124 O 1 *
+bit 123 O 1 *
+bit 122 O 1 *
+bit 121 O 1 *
+bit 120 O 1 *
+bit 119 O 1 *
+bit 118 O 1 *
+bit 117 O 1 *
+bit 116 O 1 *
+bit 115 O 1 *
+bit 114 O 1 *
+bit 113 O 1 *
+bit 112 O 1 *
+bit 111 O 1 *
+bit 110 O 1 *
+bit 109 O 1 *
+bit 108 O 1 *
+bit 107 O 1 *
+bit 106 O 1 *
+bit 105 O 1 *
+bit 104 O 1 *
+bit 103 O 1 *
+bit 102 O 1 *
+bit 101 O 1 *
+bit 100 O 1 *
+bit 99 O 1 *
+bit 98 O 1 *
+bit 97 O 1 *
+bit 96 O 1 *
+bit 95 O 1 *
+bit 94 O 1 *
+bit 93 O 1 *
+bit 92 O 1 *
+bit 91 O 1 *
+bit 90 O 1 *
+bit 89 O 1 *
+bit 88 O 1 *
+bit 87 O 1 *
+bit 86 I 1 IO_A14
+bit 85 O 1 IO_A14 84 1 Z
+bit 84 C 1 *
+bit 83 I 1 IO_B14
+bit 82 O 1 IO_B14 81 1 Z
+bit 81 C 1 *
+bit 80 I 1 IO_C14
+bit 79 O 1 IO_C14 78 1 Z
+bit 78 C 1 *
+bit 77 I 1 IO_C15
+bit 76 O 1 IO_C15 75 1 Z
+bit 75 C 1 *
+bit 74 O 1 *
+bit 73 O 1 *
+bit 72 O 1 *
+bit 71 O 1 *
+bit 70 O 1 *
+bit 69 O 1 *
+bit 68 O 1 *
+bit 67 O 1 *
+bit 66 O 1 *
+bit 65 O 1 *
+bit 64 O 1 *
+bit 63 O 1 *
+bit 62 O 1 *
+bit 61 O 1 *
+bit 60 O 1 *
+bit 59 O 1 *
+bit 58 O 1 *
+bit 57 O 1 *
+bit 56 I 1 IO_A15
+bit 55 O 1 IO_A15 54 1 Z
+bit 54 C 1 *
+bit 53 I 1 IO_B15
+bit 52 O 1 IO_B15 51 1 Z
+bit 51 C 1 *
+bit 50 O 1 *
+bit 49 O 1 *
+bit 48 O 1 *
+bit 47 O 1 *
+bit 46 O 1 *
+bit 45 O 1 *
+bit 44 O 1 *
+bit 43 O 1 *
+bit 42 O 1 *
+bit 41 O 1 *
+bit 40 O 1 *
+bit 39 O 1 *
+bit 38 O 1 *
+bit 37 O 1 *
+bit 36 O 1 *
+bit 35 O 1 *
+bit 34 O 1 *
+bit 33 O 1 *
+bit 32 O 1 *
+bit 31 O 1 *
+bit 30 O 1 *
+bit 29 O 1 *
+bit 28 O 1 *
+bit 27 O 1 *
+bit 26 O 1 *
+bit 25 O 1 *
+bit 24 O 1 *
+bit 23 O 1 *
+bit 22 O 1 *
+bit 21 O 1 *
+bit 20 O 1 *
+bit 19 O 1 *
+bit 18 O 1 *
+bit 17 O 1 *
+bit 16 O 1 *
+bit 15 O 1 *
+bit 14 O 1 *
+bit 13 O 1 *
+bit 12 O 1 *
+bit 11 O 1 *
+bit 10 O 1 *
+bit 9 O 1 *
+bit 8 O 1 *
+bit 7 O 1 *
+bit 6 O 1 *
+bit 5 I 1 IO_A16
+bit 4 O 1 IO_A16 3 1 Z
+bit 3 C 1 *
+bit 2 I 1 IO_A17
+bit 1 O 1 IO_A17 0 1 Z
+bit 0 C 1 *
--- /dev/null
+signal GND1
+signal GND2
+signal GND3
+signal GND4
+signal GND5
+signal GND6
+signal GND7
+signal GND8
+signal GND9
+signal GND10
+signal GND11
+signal GND12
+signal GND13
+signal GND14
+signal GND15
+signal GND16
+signal GND17
+signal GND18
+signal GND19
+signal GND20
+signal GND21
+signal GND22
+signal GND23
+signal GND24
+signal GND25
+signal GND26
+signal GND27
+signal GND28
+signal GND29
+signal GND30
+signal GND31
+signal GND32
+signal GND33
+signal GND34
+signal GND35
+signal GND36
+signal GND37
+signal GND38
+signal GND39
+signal GND40
+signal GND41
+signal GND42
+signal GND43
+signal GND44
+signal GND45
+signal GND46
+signal GND47
+signal GND48
+signal GND49
+signal GND50
+signal GND51
+signal GND52
+signal CCLK_AA22
+signal DONE_AB21
+signal HSWAP_EN_B3
+signal M0_AB2
+signal M1_AA1
+signal M2_AB3
+signal PROG_B
+signal TCK
+signal TDI
+signal TDO
+signal TMS
+signal VCCAUX1
+signal VCCAUX2
+signal VCCAUX3
+signal VCCAUX4
+signal VCCAUX5
+signal VCCAUX6
+signal VCCAUX7
+signal VCCAUX8
+signal VCCINT1
+signal VCCINT2
+signal VCCINT3
+signal VCCINT4
+signal VCCINT5
+signal VCCINT6
+signal VCCINT7
+signal VCCINT8
+signal VCCINT9
+signal VCCINT10
+signal VCCINT11
+signal VCCINT12
+signal VCCO01
+signal VCCO02
+signal VCCO03
+signal VCCO04
+signal VCCO05
+signal VCCO11
+signal VCCO12
+signal VCCO13
+signal VCCO14
+signal VCCO15
+signal VCCO21
+signal VCCO22
+signal VCCO23
+signal VCCO24
+signal VCCO25
+signal VCCO31
+signal VCCO32
+signal VCCO33
+signal VCCO34
+signal VCCO35
+signal VCCO41
+signal VCCO42
+signal VCCO43
+signal VCCO44
+signal VCCO45
+signal VCCO51
+signal VCCO52
+signal VCCO53
+signal VCCO54
+signal VCCO55
+signal VCCO61
+signal VCCO62
+signal VCCO63
+signal VCCO64
+signal VCCO65
+signal VCCO71
+signal VCCO72
+signal VCCO73
+signal VCCO74
+signal VCCO75
+signal IO_A3
+signal IO_A4
+signal IO_A5
+signal IO_A7
+signal IO_A8
+signal IO_A9
+signal IO_A10
+signal IO_A11
+signal IO_A12
+signal IO_A13
+signal IO_A14
+signal IO_A15
+signal IO_A16
+signal IO_A18
+signal IO_A19
+signal IO_B4
+signal IO_B5
+signal IO_B6
+signal IO_B7
+signal IO_B8
+signal IO_B9
+signal IO_B10
+signal IO_B11
+signal IO_B12
+signal IO_B13
+signal IO_B14
+signal IO_B15
+signal IO_B16
+signal IO_B17
+signal IO_B18
+signal IO_B19
+signal IO_B20
+signal IO_C1
+signal IO_C2
+signal IO_C3
+signal IO_C4
+signal IO_C5
+signal IO_C6
+signal IO_C7
+signal IO_C10
+signal IO_C11
+signal IO_C12
+signal IO_C13
+signal IO_C16
+signal IO_C17
+signal IO_C18
+signal IO_C19
+signal IO_C20
+signal IO_C21
+signal IO_C22
+signal IO_D1
+signal IO_D2
+signal IO_D3
+signal IO_D4
+signal IO_D5
+signal IO_D6
+signal IO_D7
+signal IO_D8
+signal IO_D9
+signal IO_D10
+signal IO_D11
+signal IO_D12
+signal IO_D13
+signal IO_D14
+signal IO_D15
+signal IO_D16
+signal IO_D17
+signal IO_D18
+signal IO_D19
+signal IO_D20
+signal IO_D21
+signal IO_D22
+signal IO_E1
+signal IO_E2
+signal IO_E3
+signal IO_E4
+signal IO_E5
+signal IO_E6
+signal IO_E7
+signal IO_E8
+signal IO_E9
+signal IO_E10
+signal IO_E11
+signal IO_E12
+signal IO_E13
+signal IO_E14
+signal IO_E15
+signal IO_E16
+signal IO_E17
+signal IO_E18
+signal IO_E19
+signal IO_E20
+signal IO_E21
+signal IO_E22
+signal IO_F2
+signal IO_F3
+signal IO_F4
+signal IO_F5
+signal IO_F6
+signal IO_F7
+signal IO_F9
+signal IO_F10
+signal IO_F11
+signal IO_F12
+signal IO_F13
+signal IO_F14
+signal IO_F16
+signal IO_F17
+signal IO_F18
+signal IO_F19
+signal IO_F20
+signal IO_F21
+signal IO_G1
+signal IO_G2
+signal IO_G3
+signal IO_G4
+signal IO_G5
+signal IO_G6
+signal IO_G17
+signal IO_G18
+signal IO_G19
+signal IO_G20
+signal IO_G21
+signal IO_G22
+signal IO_H1
+signal IO_H2
+signal IO_H4
+signal IO_H5
+signal IO_H18
+signal IO_H19
+signal IO_H21
+signal IO_H22
+signal IO_J1
+signal IO_J2
+signal IO_J4
+signal IO_J5
+signal IO_J6
+signal IO_J17
+signal IO_J18
+signal IO_J19
+signal IO_J21
+signal IO_J22
+signal IO_K1
+signal IO_K2
+signal IO_K3
+signal IO_K4
+signal IO_K5
+signal IO_K6
+signal IO_K17
+signal IO_K18
+signal IO_K19
+signal IO_K20
+signal IO_K21
+signal IO_K22
+signal IO_L1
+signal IO_L2
+signal IO_L3
+signal IO_L4
+signal IO_L5
+signal IO_L6
+signal IO_L17
+signal IO_L18
+signal IO_L19
+signal IO_L20
+signal IO_L21
+signal IO_L22
+signal IO_M1
+signal IO_M2
+signal IO_M3
+signal IO_M4
+signal IO_M5
+signal IO_M6
+signal IO_M17
+signal IO_M18
+signal IO_M19
+signal IO_M20
+signal IO_M21
+signal IO_M22
+signal IO_N1
+signal IO_N2
+signal IO_N3
+signal IO_N4
+signal IO_N5
+signal IO_N6
+signal IO_N17
+signal IO_N18
+signal IO_N19
+signal IO_N20
+signal IO_N21
+signal IO_N22
+signal IO_P1
+signal IO_P2
+signal IO_P4
+signal IO_P5
+signal IO_P6
+signal IO_P17
+signal IO_P18
+signal IO_P19
+signal IO_P21
+signal IO_P22
+signal IO_R1
+signal IO_R2
+signal IO_R4
+signal IO_R5
+signal IO_R18
+signal IO_R19
+signal IO_R21
+signal IO_R22
+signal IO_T1
+signal IO_T2
+signal IO_T3
+signal IO_T4
+signal IO_T5
+signal IO_T6
+signal IO_T17
+signal IO_T18
+signal IO_T19
+signal IO_T20
+signal IO_T21
+signal IO_T22
+signal IO_U2
+signal IO_U3
+signal IO_U4
+signal IO_U5
+signal IO_U6
+signal IO_U7
+signal IO_U9
+signal IO_U10
+signal IO_U11
+signal IO_U12
+signal IO_U13
+signal IO_U14
+signal IO_U16
+signal IO_U17
+signal IO_U18
+signal IO_U19
+signal IO_U20
+signal IO_U21
+signal IO_V1
+signal IO_V2
+signal IO_V3
+signal IO_V4
+signal IO_V5
+signal IO_V6
+signal IO_V7
+signal IO_V8
+signal IO_V9
+signal IO_V10
+signal IO_V11
+signal IO_V12
+signal IO_V13
+signal IO_V14
+signal IO_V15
+signal IO_V16
+signal IO_V17
+signal IO_V18
+signal IO_V19
+signal IO_V20
+signal IO_V21
+signal IO_V22
+signal IO_W1
+signal IO_W2
+signal IO_W3
+signal IO_W4
+signal IO_W5
+signal IO_W6
+signal IO_W7
+signal IO_W8
+signal IO_W9
+signal IO_W10
+signal IO_W11
+signal IO_W12
+signal IO_W13
+signal IO_W14
+signal IO_W15
+signal IO_W16
+signal IO_W17
+signal IO_W18
+signal IO_W19
+signal IO_W20
+signal IO_W21
+signal IO_W22
+signal IO_Y1
+signal IO_Y2
+signal IO_Y3
+signal IO_Y4
+signal IO_Y5
+signal IO_Y6
+signal IO_Y7
+signal IO_Y10
+signal IO_Y11
+signal IO_Y12
+signal IO_Y13
+signal IO_Y16
+signal IO_Y17
+signal IO_Y18
+signal IO_Y19
+signal IO_Y20
+signal IO_Y21
+signal IO_Y22
+signal IO_AA3
+signal IO_AA4
+signal IO_AA5
+signal IO_AA6
+signal IO_AA7
+signal IO_AA8
+signal IO_AA9
+signal IO_AA10
+signal IO_AA11
+signal IO_AA12
+signal IO_AA13
+signal IO_AA14
+signal IO_AA15
+signal IO_AA16
+signal IO_AA17
+signal IO_AA18
+signal IO_AA19
+signal IO_AA20
+signal IO_AB4
+signal IO_AB5
+signal IO_AB7
+signal IO_AB8
+signal IO_AB9
+signal IO_AB10
+signal IO_AB11
+signal IO_AB12
+signal IO_AB13
+signal IO_AB14
+signal IO_AB15
+signal IO_AB16
+signal IO_AB18
+signal IO_AB19
+
+register BSR 1559
+register BR 1
+register DIR 32
+
+instruction length 6
+
+instruction EXTEST 000000 BSR
+instruction SAMPLE/PRELOAD 000001 BSR
+instruction IDCODE 001001 DIR
+instruction BYPASS 111111 BR
+
+bit 1558 I 1 IO_C20
+bit 1557 O 1 IO_C20 1556 1 Z
+bit 1556 C 1 *
+bit 1555 I 1 IO_C21
+bit 1554 O 1 IO_C21 1553 1 Z
+bit 1553 C 1 *
+bit 1552 O 1 *
+bit 1551 O 1 *
+bit 1550 O 1 *
+bit 1549 O 1 *
+bit 1548 O 1 *
+bit 1547 O 1 *
+bit 1546 O 1 *
+bit 1545 O 1 *
+bit 1544 O 1 *
+bit 1543 O 1 *
+bit 1542 O 1 *
+bit 1541 O 1 *
+bit 1540 O 1 *
+bit 1539 O 1 *
+bit 1538 O 1 *
+bit 1537 O 1 *
+bit 1536 O 1 *
+bit 1535 O 1 *
+bit 1534 O 1 *
+bit 1533 O 1 *
+bit 1532 O 1 *
+bit 1531 O 1 *
+bit 1530 O 1 *
+bit 1529 O 1 *
+bit 1528 O 1 *
+bit 1527 O 1 *
+bit 1526 O 1 *
+bit 1525 O 1 *
+bit 1524 O 1 *
+bit 1523 O 1 *
+bit 1522 O 1 *
+bit 1521 O 1 *
+bit 1520 O 1 *
+bit 1519 O 1 *
+bit 1518 O 1 *
+bit 1517 O 1 *
+bit 1516 O 1 *
+bit 1515 O 1 *
+bit 1514 O 1 *
+bit 1513 O 1 *
+bit 1512 O 1 *
+bit 1511 O 1 *
+bit 1510 O 1 *
+bit 1509 O 1 *
+bit 1508 O 1 *
+bit 1507 O 1 *
+bit 1506 O 1 *
+bit 1505 O 1 *
+bit 1504 O 1 *
+bit 1503 O 1 *
+bit 1502 O 1 *
+bit 1501 I 1 IO_C22
+bit 1500 O 1 IO_C22 1499 1 Z
+bit 1499 C 1 *
+bit 1498 I 1 IO_D20
+bit 1497 O 1 IO_D20 1496 1 Z
+bit 1496 C 1 *
+bit 1495 I 1 IO_D19
+bit 1494 O 1 IO_D19 1493 1 Z
+bit 1493 C 1 *
+bit 1492 I 1 IO_D21
+bit 1491 O 1 IO_D21 1490 1 Z
+bit 1490 C 1 *
+bit 1489 I 1 IO_D22
+bit 1488 O 1 IO_D22 1487 1 Z
+bit 1487 C 1 *
+bit 1486 I 1 IO_E18
+bit 1485 O 1 IO_E18 1484 1 Z
+bit 1484 C 1 *
+bit 1483 I 1 IO_F18
+bit 1482 O 1 IO_F18 1481 1 Z
+bit 1481 C 1 *
+bit 1480 I 1 IO_E19
+bit 1479 O 1 IO_E19 1478 1 Z
+bit 1478 C 1 *
+bit 1477 I 1 IO_E20
+bit 1476 O 1 IO_E20 1475 1 Z
+bit 1475 C 1 *
+bit 1474 I 1 IO_E21
+bit 1473 O 1 IO_E21 1472 1 Z
+bit 1472 C 1 *
+bit 1471 I 1 IO_E22
+bit 1470 O 1 IO_E22 1469 1 Z
+bit 1469 C 1 *
+bit 1468 I 1 IO_G17
+bit 1467 O 1 IO_G17 1466 1 Z
+bit 1466 C 1 *
+bit 1465 I 1 IO_G18
+bit 1464 O 1 IO_G18 1463 1 Z
+bit 1463 C 1 *
+bit 1462 I 1 IO_F19
+bit 1461 O 1 IO_F19 1460 1 Z
+bit 1460 C 1 *
+bit 1459 I 1 IO_G19
+bit 1458 O 1 IO_G19 1457 1 Z
+bit 1457 C 1 *
+bit 1456 I 1 IO_F20
+bit 1455 O 1 IO_F20 1454 1 Z
+bit 1454 C 1 *
+bit 1453 I 1 IO_F21
+bit 1452 O 1 IO_F21 1451 1 Z
+bit 1451 C 1 *
+bit 1450 I 1 IO_G20
+bit 1449 O 1 IO_G20 1448 1 Z
+bit 1448 C 1 *
+bit 1447 I 1 IO_H19
+bit 1446 O 1 IO_H19 1445 1 Z
+bit 1445 C 1 *
+bit 1444 I 1 IO_G21
+bit 1443 O 1 IO_G21 1442 1 Z
+bit 1442 C 1 *
+bit 1441 I 1 IO_G22
+bit 1440 O 1 IO_G22 1439 1 Z
+bit 1439 C 1 *
+bit 1438 I 1 IO_H18
+bit 1437 O 1 IO_H18 1436 1 Z
+bit 1436 C 1 *
+bit 1435 I 1 IO_J17
+bit 1434 O 1 IO_J17 1433 1 Z
+bit 1433 C 1 *
+bit 1432 I 1 IO_H21
+bit 1431 O 1 IO_H21 1430 1 Z
+bit 1430 C 1 *
+bit 1429 I 1 IO_H22
+bit 1428 O 1 IO_H22 1427 1 Z
+bit 1427 C 1 *
+bit 1426 O 1 *
+bit 1425 O 1 *
+bit 1424 O 1 *
+bit 1423 O 1 *
+bit 1422 O 1 *
+bit 1421 O 1 *
+bit 1420 I 1 IO_J18
+bit 1419 O 1 IO_J18 1418 1 Z
+bit 1418 C 1 *
+bit 1417 I 1 IO_J19
+bit 1416 O 1 IO_J19 1415 1 Z
+bit 1415 C 1 *
+bit 1414 I 1 IO_J21
+bit 1413 O 1 IO_J21 1412 1 Z
+bit 1412 C 1 *
+bit 1411 I 1 IO_J22
+bit 1410 O 1 IO_J22 1409 1 Z
+bit 1409 C 1 *
+bit 1408 I 1 IO_K17
+bit 1407 O 1 IO_K17 1406 1 Z
+bit 1406 C 1 *
+bit 1405 I 1 IO_K18
+bit 1404 O 1 IO_K18 1403 1 Z
+bit 1403 C 1 *
+bit 1402 I 1 IO_K19
+bit 1401 O 1 IO_K19 1400 1 Z
+bit 1400 C 1 *
+bit 1399 I 1 IO_K20
+bit 1398 O 1 IO_K20 1397 1 Z
+bit 1397 C 1 *
+bit 1396 I 1 IO_K21
+bit 1395 O 1 IO_K21 1394 1 Z
+bit 1394 C 1 *
+bit 1393 I 1 IO_K22
+bit 1392 O 1 IO_K22 1391 1 Z
+bit 1391 C 1 *
+bit 1390 O 1 *
+bit 1389 O 1 *
+bit 1388 O 1 *
+bit 1387 O 1 *
+bit 1386 O 1 *
+bit 1385 O 1 *
+bit 1384 I 1 IO_L17
+bit 1383 O 1 IO_L17 1382 1 Z
+bit 1382 C 1 *
+bit 1381 I 1 IO_L18
+bit 1380 O 1 IO_L18 1379 1 Z
+bit 1379 C 1 *
+bit 1378 I 1 IO_L19
+bit 1377 O 1 IO_L19 1376 1 Z
+bit 1376 C 1 *
+bit 1375 I 1 IO_L20
+bit 1374 O 1 IO_L20 1373 1 Z
+bit 1373 C 1 *
+bit 1372 I 1 IO_L21
+bit 1371 O 1 IO_L21 1370 1 Z
+bit 1370 C 1 *
+bit 1369 I 1 IO_L22
+bit 1368 O 1 IO_L22 1367 1 Z
+bit 1367 C 1 *
+bit 1366 I 1 IO_M22
+bit 1365 O 1 IO_M22 1364 1 Z
+bit 1364 C 1 *
+bit 1363 I 1 IO_M21
+bit 1362 O 1 IO_M21 1361 1 Z
+bit 1361 C 1 *
+bit 1360 I 1 IO_M20
+bit 1359 O 1 IO_M20 1358 1 Z
+bit 1358 C 1 *
+bit 1357 I 1 IO_M19
+bit 1356 O 1 IO_M19 1355 1 Z
+bit 1355 C 1 *
+bit 1354 I 1 IO_M18
+bit 1353 O 1 IO_M18 1352 1 Z
+bit 1352 C 1 *
+bit 1351 I 1 IO_M17
+bit 1350 O 1 IO_M17 1349 1 Z
+bit 1349 C 1 *
+bit 1348 O 1 *
+bit 1347 O 1 *
+bit 1346 O 1 *
+bit 1345 O 1 *
+bit 1344 O 1 *
+bit 1343 O 1 *
+bit 1342 I 1 IO_N22
+bit 1341 O 1 IO_N22 1340 1 Z
+bit 1340 C 1 *
+bit 1339 I 1 IO_N21
+bit 1338 O 1 IO_N21 1337 1 Z
+bit 1337 C 1 *
+bit 1336 I 1 IO_N20
+bit 1335 O 1 IO_N20 1334 1 Z
+bit 1334 C 1 *
+bit 1333 I 1 IO_N19
+bit 1332 O 1 IO_N19 1331 1 Z
+bit 1331 C 1 *
+bit 1330 I 1 IO_N18
+bit 1329 O 1 IO_N18 1328 1 Z
+bit 1328 C 1 *
+bit 1327 I 1 IO_N17
+bit 1326 O 1 IO_N17 1325 1 Z
+bit 1325 C 1 *
+bit 1324 I 1 IO_P22
+bit 1323 O 1 IO_P22 1322 1 Z
+bit 1322 C 1 *
+bit 1321 I 1 IO_P21
+bit 1320 O 1 IO_P21 1319 1 Z
+bit 1319 C 1 *
+bit 1318 I 1 IO_P18
+bit 1317 O 1 IO_P18 1316 1 Z
+bit 1316 C 1 *
+bit 1315 I 1 IO_P17
+bit 1314 O 1 IO_P17 1313 1 Z
+bit 1313 C 1 *
+bit 1312 O 1 *
+bit 1311 O 1 *
+bit 1310 O 1 *
+bit 1309 O 1 *
+bit 1308 O 1 *
+bit 1307 O 1 *
+bit 1306 I 1 IO_P19
+bit 1305 O 1 IO_P19 1304 1 Z
+bit 1304 C 1 *
+bit 1303 I 1 IO_R19
+bit 1302 O 1 IO_R19 1301 1 Z
+bit 1301 C 1 *
+bit 1300 I 1 IO_R22
+bit 1299 O 1 IO_R22 1298 1 Z
+bit 1298 C 1 *
+bit 1297 I 1 IO_R21
+bit 1296 O 1 IO_R21 1295 1 Z
+bit 1295 C 1 *
+bit 1294 I 1 IO_T22
+bit 1293 O 1 IO_T22 1292 1 Z
+bit 1292 C 1 *
+bit 1291 I 1 IO_T21
+bit 1290 O 1 IO_T21 1289 1 Z
+bit 1289 C 1 *
+bit 1288 I 1 IO_T20
+bit 1287 O 1 IO_T20 1286 1 Z
+bit 1286 C 1 *
+bit 1285 I 1 IO_T19
+bit 1284 O 1 IO_T19 1283 1 Z
+bit 1283 C 1 *
+bit 1282 I 1 IO_R18
+bit 1281 O 1 IO_R18 1280 1 Z
+bit 1280 C 1 *
+bit 1279 I 1 IO_T18
+bit 1278 O 1 IO_T18 1277 1 Z
+bit 1277 C 1 *
+bit 1276 I 1 IO_U21
+bit 1275 O 1 IO_U21 1274 1 Z
+bit 1274 C 1 *
+bit 1273 I 1 IO_U20
+bit 1272 O 1 IO_U20 1271 1 Z
+bit 1271 C 1 *
+bit 1270 I 1 IO_T17
+bit 1269 O 1 IO_T17 1268 1 Z
+bit 1268 C 1 *
+bit 1267 I 1 IO_U18
+bit 1266 O 1 IO_U18 1265 1 Z
+bit 1265 C 1 *
+bit 1264 I 1 IO_V22
+bit 1263 O 1 IO_V22 1262 1 Z
+bit 1262 C 1 *
+bit 1261 I 1 IO_V21
+bit 1260 O 1 IO_V21 1259 1 Z
+bit 1259 C 1 *
+bit 1258 I 1 IO_U19
+bit 1257 O 1 IO_U19 1256 1 Z
+bit 1256 C 1 *
+bit 1255 I 1 IO_V20
+bit 1254 O 1 IO_V20 1253 1 Z
+bit 1253 C 1 *
+bit 1252 I 1 IO_W21
+bit 1251 O 1 IO_W21 1250 1 Z
+bit 1250 C 1 *
+bit 1249 I 1 IO_W20
+bit 1248 O 1 IO_W20 1247 1 Z
+bit 1247 C 1 *
+bit 1246 I 1 IO_V19
+bit 1245 O 1 IO_V19 1244 1 Z
+bit 1244 C 1 *
+bit 1243 I 1 IO_W19
+bit 1242 O 1 IO_W19 1241 1 Z
+bit 1241 C 1 *
+bit 1240 I 1 IO_W22
+bit 1239 O 1 IO_W22 1238 1 Z
+bit 1238 C 1 *
+bit 1237 I 1 IO_Y22
+bit 1236 O 1 IO_Y22 1235 1 Z
+bit 1235 C 1 *
+bit 1234 I 1 IO_Y21
+bit 1233 O 1 IO_Y21 1232 1 Z
+bit 1232 C 1 *
+bit 1231 O 1 *
+bit 1230 O 1 *
+bit 1229 O 1 *
+bit 1228 O 1 *
+bit 1227 O 1 *
+bit 1226 O 1 *
+bit 1225 O 1 *
+bit 1224 O 1 *
+bit 1223 O 1 *
+bit 1222 O 1 *
+bit 1221 O 1 *
+bit 1220 O 1 *
+bit 1219 O 1 *
+bit 1218 O 1 *
+bit 1217 O 1 *
+bit 1216 O 1 *
+bit 1215 O 1 *
+bit 1214 O 1 *
+bit 1213 O 1 *
+bit 1212 O 1 *
+bit 1211 O 1 *
+bit 1210 O 1 *
+bit 1209 O 1 *
+bit 1208 O 1 *
+bit 1207 O 1 *
+bit 1206 O 1 *
+bit 1205 O 1 *
+bit 1204 O 1 *
+bit 1203 O 1 *
+bit 1202 O 1 *
+bit 1201 O 1 *
+bit 1200 O 1 *
+bit 1199 O 1 *
+bit 1198 O 1 *
+bit 1197 O 1 *
+bit 1196 O 1 *
+bit 1195 O 1 *
+bit 1194 O 1 *
+bit 1193 O 1 *
+bit 1192 O 1 *
+bit 1191 O 1 *
+bit 1190 O 1 *
+bit 1189 O 1 *
+bit 1188 O 1 *
+bit 1187 O 1 *
+bit 1186 O 1 *
+bit 1185 O 1 *
+bit 1184 O 1 *
+bit 1183 O 1 *
+bit 1182 O 1 *
+bit 1181 O 1 *
+bit 1180 I 1 IO_Y20
+bit 1179 O 1 IO_Y20 1178 1 Z
+bit 1178 C 1 *
+bit 1177 I 1 IO_Y19
+bit 1176 O 1 IO_Y19 1175 1 Z
+bit 1175 C 1 *
+bit 1174 I 1 CCLK_AA22
+bit 1173 O 1 CCLK_AA22 1172 1 Z
+bit 1172 C 1 *
+bit 1171 I 1 DONE_AB21
+bit 1170 O 1 DONE_AB21 1169 1 Z
+bit 1169 C 1 *
+bit 1168 I 1 IO_V18
+bit 1167 O 1 IO_V18 1166 1 Z
+bit 1166 C 1 *
+bit 1165 I 1 IO_AA20
+bit 1164 O 1 IO_AA20 1163 1 Z
+bit 1163 C 1 *
+bit 1162 I 1 IO_AB20
+bit 1161 O 1 IO_AB20 1160 1 Z
+bit 1160 C 1 *
+bit 1159 O 1 *
+bit 1158 O 1 *
+bit 1157 O 1 *
+bit 1156 O 1 *
+bit 1155 O 1 *
+bit 1154 O 1 *
+bit 1153 O 1 *
+bit 1152 O 1 *
+bit 1151 O 1 *
+bit 1150 I 1 IO_AA19
+bit 1149 O 1 IO_AA19 1148 1 Z
+bit 1148 C 1 *
+bit 1147 I 1 IO_AB19
+bit 1146 O 1 IO_AB19 1145 1 Z
+bit 1145 C 1 *
+bit 1144 I 1 IO_W18
+bit 1143 O 1 IO_W18 1142 1 Z
+bit 1142 C 1 *
+bit 1141 I 1 IO_Y18
+bit 1140 O 1 IO_Y18 1139 1 Z
+bit 1139 C 1 *
+bit 1138 O 1 *
+bit 1137 O 1 *
+bit 1136 O 1 *
+bit 1135 O 1 *
+bit 1134 O 1 *
+bit 1133 O 1 *
+bit 1132 O 1 *
+bit 1131 O 1 *
+bit 1130 O 1 *
+bit 1129 O 1 *
+bit 1128 O 1 *
+bit 1127 O 1 *
+bit 1126 O 1 *
+bit 1125 O 1 *
+bit 1124 O 1 *
+bit 1123 I 1 IO_U17
+bit 1122 O 1 IO_U17 1121 1 Z
+bit 1121 C 1 *
+bit 1120 I 1 IO_AA18
+bit 1119 O 1 IO_AA18 1118 1 Z
+bit 1118 C 1 *
+bit 1117 I 1 IO_AB18
+bit 1116 O 1 IO_AB18 1115 1 Z
+bit 1115 C 1 *
+bit 1114 I 1 IO_V17
+bit 1113 O 1 IO_V17 1112 1 Z
+bit 1112 C 1 *
+bit 1111 I 1 IO_W17
+bit 1110 O 1 IO_W17 1109 1 Z
+bit 1109 C 1 *
+bit 1108 I 1 IO_U16
+bit 1107 O 1 IO_U16 1106 1 Z
+bit 1106 C 1 *
+bit 1105 O 1 *
+bit 1104 O 1 *
+bit 1103 O 1 *
+bit 1102 O 1 *
+bit 1101 O 1 *
+bit 1100 O 1 *
+bit 1099 O 1 *
+bit 1098 O 1 *
+bit 1097 O 1 *
+bit 1096 O 1 *
+bit 1095 O 1 *
+bit 1094 O 1 *
+bit 1093 O 1 *
+bit 1092 O 1 *
+bit 1091 O 1 *
+bit 1090 I 1 IO_Y17
+bit 1089 O 1 IO_Y17 1088 1 Z
+bit 1088 C 1 *
+bit 1087 I 1 IO_AA17
+bit 1086 O 1 IO_AA17 1085 1 Z
+bit 1085 C 1 *
+bit 1084 I 1 IO_V16
+bit 1083 O 1 IO_V16 1082 1 Z
+bit 1082 C 1 *
+bit 1081 I 1 IO_W16
+bit 1080 O 1 IO_W16 1079 1 Z
+bit 1079 C 1 *
+bit 1078 O 1 *
+bit 1077 O 1 *
+bit 1076 O 1 *
+bit 1075 O 1 *
+bit 1074 O 1 *
+bit 1073 O 1 *
+bit 1072 O 1 *
+bit 1071 O 1 *
+bit 1070 O 1 *
+bit 1069 O 1 *
+bit 1068 O 1 *
+bit 1067 O 1 *
+bit 1066 O 1 *
+bit 1065 O 1 *
+bit 1064 O 1 *
+bit 1063 I 1 IO_Y16
+bit 1062 O 1 IO_Y16 1061 1 Z
+bit 1061 C 1 *
+bit 1060 I 1 IO_AA16
+bit 1059 O 1 IO_AA16 1058 1 Z
+bit 1058 C 1 *
+bit 1057 I 1 IO_AB16
+bit 1056 O 1 IO_AB16 1055 1 Z
+bit 1055 C 1 *
+bit 1054 I 1 IO_V15
+bit 1053 O 1 IO_V15 1052 1 Z
+bit 1052 C 1 *
+bit 1051 I 1 IO_W15
+bit 1050 O 1 IO_W15 1049 1 Z
+bit 1049 C 1 *
+bit 1048 O 1 *
+bit 1047 O 1 *
+bit 1046 O 1 *
+bit 1045 O 1 *
+bit 1044 O 1 *
+bit 1043 O 1 *
+bit 1042 O 1 *
+bit 1041 O 1 *
+bit 1040 O 1 *
+bit 1039 I 1 IO_AA15
+bit 1038 O 1 IO_AA15 1037 1 Z
+bit 1037 C 1 *
+bit 1036 I 1 IO_AB15
+bit 1035 O 1 IO_AB15 1034 1 Z
+bit 1034 C 1 *
+bit 1033 O 1 *
+bit 1032 O 1 *
+bit 1031 O 1 *
+bit 1030 I 1 IO_U14
+bit 1029 O 1 IO_U14 1028 1 Z
+bit 1028 C 1 *
+bit 1027 I 1 IO_V14
+bit 1026 O 1 IO_V14 1025 1 Z
+bit 1025 C 1 *
+bit 1024 O 1 *
+bit 1023 O 1 *
+bit 1022 O 1 *
+bit 1021 O 1 *
+bit 1020 O 1 *
+bit 1019 O 1 *
+bit 1018 I 1 IO_W14
+bit 1017 O 1 IO_W14 1016 1 Z
+bit 1016 C 1 *
+bit 1015 I 1 IO_AA14
+bit 1014 O 1 IO_AA14 1013 1 Z
+bit 1013 C 1 *
+bit 1012 I 1 IO_AB14
+bit 1011 O 1 IO_AB14 1010 1 Z
+bit 1010 C 1 *
+bit 1009 I 1 IO_U13
+bit 1008 O 1 IO_U13 1007 1 Z
+bit 1007 C 1 *
+bit 1006 I 1 IO_V13
+bit 1005 O 1 IO_V13 1004 1 Z
+bit 1004 C 1 *
+bit 1003 I 1 IO_W13
+bit 1002 O 1 IO_W13 1001 1 Z
+bit 1001 C 1 *
+bit 1000 I 1 IO_Y13
+bit 999 O 1 IO_Y13 998 1 Z
+bit 998 C 1 *
+bit 997 I 1 IO_AA13
+bit 996 O 1 IO_AA13 995 1 Z
+bit 995 C 1 *
+bit 994 I 1 IO_U12
+bit 993 O 1 IO_U12 992 1 Z
+bit 992 C 1 *
+bit 991 I 1 IO_V12
+bit 990 O 1 IO_V12 989 1 Z
+bit 989 C 1 *
+bit 988 I 1 IO_AB13
+bit 987 O 1 IO_AB13 986 1 Z
+bit 986 C 1 *
+bit 985 I 1 IO_W12
+bit 984 O 1 IO_W12 983 1 Z
+bit 983 C 1 *
+bit 982 I 1 IO_Y12
+bit 981 O 1 IO_Y12 980 1 Z
+bit 980 C 1 *
+bit 979 I 1 IO_AA12
+bit 978 O 1 IO_AA12 977 1 Z
+bit 977 C 1 *
+bit 976 I 1 IO_AB12
+bit 975 O 1 IO_AB12 974 1 Z
+bit 974 C 1 *
+bit 973 I 1 IO_AB11
+bit 972 O 1 IO_AB11 971 1 Z
+bit 971 C 1 *
+bit 970 I 1 IO_AA11
+bit 969 O 1 IO_AA11 968 1 Z
+bit 968 C 1 *
+bit 967 I 1 IO_Y11
+bit 966 O 1 IO_Y11 965 1 Z
+bit 965 C 1 *
+bit 964 I 1 IO_W11
+bit 963 O 1 IO_W11 962 1 Z
+bit 962 C 1 *
+bit 961 I 1 IO_V11
+bit 960 O 1 IO_V11 959 1 Z
+bit 959 C 1 *
+bit 958 I 1 IO_U11
+bit 957 O 1 IO_U11 956 1 Z
+bit 956 C 1 *
+bit 955 I 1 IO_AB10
+bit 954 O 1 IO_AB10 953 1 Z
+bit 953 C 1 *
+bit 952 I 1 IO_AA10
+bit 951 O 1 IO_AA10 950 1 Z
+bit 950 C 1 *
+bit 949 I 1 IO_Y10
+bit 948 O 1 IO_Y10 947 1 Z
+bit 947 C 1 *
+bit 946 I 1 IO_W10
+bit 945 O 1 IO_W10 944 1 Z
+bit 944 C 1 *
+bit 943 I 1 IO_V10
+bit 942 O 1 IO_V10 941 1 Z
+bit 941 C 1 *
+bit 940 I 1 IO_AB9
+bit 939 O 1 IO_AB9 938 1 Z
+bit 938 C 1 *
+bit 937 I 1 IO_AA9
+bit 936 O 1 IO_AA9 935 1 Z
+bit 935 C 1 *
+bit 934 I 1 IO_W9
+bit 933 O 1 IO_W9 932 1 Z
+bit 932 C 1 *
+bit 931 I 1 IO_V9
+bit 930 O 1 IO_V9 929 1 Z
+bit 929 C 1 *
+bit 928 I 1 IO_U10
+bit 927 O 1 IO_U10 926 1 Z
+bit 926 C 1 *
+bit 925 O 1 *
+bit 924 O 1 *
+bit 923 O 1 *
+bit 922 O 1 *
+bit 921 O 1 *
+bit 920 O 1 *
+bit 919 I 1 IO_AB8
+bit 918 O 1 IO_AB8 917 1 Z
+bit 917 C 1 *
+bit 916 I 1 IO_AA8
+bit 915 O 1 IO_AA8 914 1 Z
+bit 914 C 1 *
+bit 913 O 1 *
+bit 912 O 1 *
+bit 911 O 1 *
+bit 910 I 1 IO_W8
+bit 909 O 1 IO_W8 908 1 Z
+bit 908 C 1 *
+bit 907 I 1 IO_V8
+bit 906 O 1 IO_V8 905 1 Z
+bit 905 C 1 *
+bit 904 O 1 *
+bit 903 O 1 *
+bit 902 O 1 *
+bit 901 O 1 *
+bit 900 O 1 *
+bit 899 O 1 *
+bit 898 I 1 IO_U9
+bit 897 O 1 IO_U9 896 1 Z
+bit 896 C 1 *
+bit 895 I 1 IO_AB7
+bit 894 O 1 IO_AB7 893 1 Z
+bit 893 C 1 *
+bit 892 I 1 IO_AA7
+bit 891 O 1 IO_AA7 890 1 Z
+bit 890 C 1 *
+bit 889 I 1 IO_Y7
+bit 888 O 1 IO_Y7 887 1 Z
+bit 887 C 1 *
+bit 886 I 1 IO_W7
+bit 885 O 1 IO_W7 884 1 Z
+bit 884 C 1 *
+bit 883 O 1 *
+bit 882 O 1 *
+bit 881 O 1 *
+bit 880 O 1 *
+bit 879 O 1 *
+bit 878 O 1 *
+bit 877 O 1 *
+bit 876 O 1 *
+bit 875 O 1 *
+bit 874 O 1 *
+bit 873 O 1 *
+bit 872 O 1 *
+bit 871 O 1 *
+bit 870 O 1 *
+bit 869 O 1 *
+bit 868 I 1 IO_V7
+bit 867 O 1 IO_V7 866 1 Z
+bit 866 C 1 *
+bit 865 I 1 IO_AA6
+bit 864 O 1 IO_AA6 863 1 Z
+bit 863 C 1 *
+bit 862 I 1 IO_Y6
+bit 861 O 1 IO_Y6 860 1 Z
+bit 860 C 1 *
+bit 859 I 1 IO_W6
+bit 858 O 1 IO_W6 857 1 Z
+bit 857 C 1 *
+bit 856 I 1 IO_V6
+bit 855 O 1 IO_V6 854 1 Z
+bit 854 C 1 *
+bit 853 O 1 *
+bit 852 O 1 *
+bit 851 O 1 *
+bit 850 O 1 *
+bit 849 O 1 *
+bit 848 O 1 *
+bit 847 O 1 *
+bit 846 O 1 *
+bit 845 O 1 *
+bit 844 O 1 *
+bit 843 O 1 *
+bit 842 O 1 *
+bit 841 O 1 *
+bit 840 O 1 *
+bit 839 O 1 *
+bit 838 I 1 IO_U7
+bit 837 O 1 IO_U7 836 1 Z
+bit 836 C 1 *
+bit 835 I 1 IO_AB5
+bit 834 O 1 IO_AB5 833 1 Z
+bit 833 C 1 *
+bit 832 I 1 IO_AA5
+bit 831 O 1 IO_AA5 830 1 Z
+bit 830 C 1 *
+bit 829 I 1 IO_Y5
+bit 828 O 1 IO_Y5 827 1 Z
+bit 827 C 1 *
+bit 826 I 1 IO_W5
+bit 825 O 1 IO_W5 824 1 Z
+bit 824 C 1 *
+bit 823 O 1 *
+bit 822 O 1 *
+bit 821 O 1 *
+bit 820 O 1 *
+bit 819 O 1 *
+bit 818 O 1 *
+bit 817 O 1 *
+bit 816 O 1 *
+bit 815 O 1 *
+bit 814 O 1 *
+bit 813 O 1 *
+bit 812 O 1 *
+bit 811 O 1 *
+bit 810 O 1 *
+bit 809 O 1 *
+bit 808 I 1 IO_U6
+bit 807 O 1 IO_U6 806 1 Z
+bit 806 C 1 *
+bit 805 I 1 IO_AB4
+bit 804 O 1 IO_AB4 803 1 Z
+bit 803 C 1 *
+bit 802 I 1 IO_AA4
+bit 801 O 1 IO_AA4 800 1 Z
+bit 800 C 1 *
+bit 799 O 1 *
+bit 798 O 1 *
+bit 797 O 1 *
+bit 796 O 1 *
+bit 795 O 1 *
+bit 794 O 1 *
+bit 793 O 1 *
+bit 792 O 1 *
+bit 791 O 1 *
+bit 790 O 1 *
+bit 789 O 1 *
+bit 788 O 1 *
+bit 787 O 1 *
+bit 786 O 1 *
+bit 785 O 1 *
+bit 784 I 1 IO_Y4
+bit 783 O 1 IO_Y4 782 1 Z
+bit 782 C 1 *
+bit 781 I 1 IO_AA3
+bit 780 O 1 IO_AA3 779 1 Z
+bit 779 C 1 *
+bit 778 I 1 M2_AB3
+bit 777 I 1 M0_AB2
+bit 776 I 1 M1_AA1
+bit 775 I 1 IO_Y3
+bit 774 O 1 IO_Y3 773 1 Z
+bit 773 C 1 *
+bit 772 I 1 IO_Y2
+bit 771 O 1 IO_Y2 770 1 Z
+bit 770 C 1 *
+bit 769 O 1 *
+bit 768 O 1 *
+bit 767 O 1 *
+bit 766 O 1 *
+bit 765 O 1 *
+bit 764 O 1 *
+bit 763 O 1 *
+bit 762 O 1 *
+bit 761 O 1 *
+bit 760 O 1 *
+bit 759 O 1 *
+bit 758 O 1 *
+bit 757 O 1 *
+bit 756 O 1 *
+bit 755 O 1 *
+bit 754 O 1 *
+bit 753 O 1 *
+bit 752 O 1 *
+bit 751 O 1 *
+bit 750 O 1 *
+bit 749 O 1 *
+bit 748 O 1 *
+bit 747 O 1 *
+bit 746 O 1 *
+bit 745 O 1 *
+bit 744 O 1 *
+bit 743 O 1 *
+bit 742 O 1 *
+bit 741 O 1 *
+bit 740 O 1 *
+bit 739 O 1 *
+bit 738 O 1 *
+bit 737 O 1 *
+bit 736 O 1 *
+bit 735 O 1 *
+bit 734 O 1 *
+bit 733 O 1 *
+bit 732 O 1 *
+bit 731 O 1 *
+bit 730 O 1 *
+bit 729 O 1 *
+bit 728 O 1 *
+bit 727 O 1 *
+bit 726 O 1 *
+bit 725 O 1 *
+bit 724 O 1 *
+bit 723 O 1 *
+bit 722 O 1 *
+bit 721 O 1 *
+bit 720 O 1 *
+bit 719 O 1 *
+bit 718 I 1 IO_Y1
+bit 717 O 1 IO_Y1 716 1 Z
+bit 716 C 1 *
+bit 715 I 1 IO_W4
+bit 714 O 1 IO_W4 713 1 Z
+bit 713 C 1 *
+bit 712 I 1 IO_W3
+bit 711 O 1 IO_W3 710 1 Z
+bit 710 C 1 *
+bit 709 I 1 IO_W2
+bit 708 O 1 IO_W2 707 1 Z
+bit 707 C 1 *
+bit 706 I 1 IO_W1
+bit 705 O 1 IO_W1 704 1 Z
+bit 704 C 1 *
+bit 703 I 1 IO_V5
+bit 702 O 1 IO_V5 701 1 Z
+bit 701 C 1 *
+bit 700 I 1 IO_U5
+bit 699 O 1 IO_U5 698 1 Z
+bit 698 C 1 *
+bit 697 I 1 IO_V4
+bit 696 O 1 IO_V4 695 1 Z
+bit 695 C 1 *
+bit 694 I 1 IO_V3
+bit 693 O 1 IO_V3 692 1 Z
+bit 692 C 1 *
+bit 691 I 1 IO_V2
+bit 690 O 1 IO_V2 689 1 Z
+bit 689 C 1 *
+bit 688 I 1 IO_V1
+bit 687 O 1 IO_V1 686 1 Z
+bit 686 C 1 *
+bit 685 I 1 IO_T6
+bit 684 O 1 IO_T6 683 1 Z
+bit 683 C 1 *
+bit 682 I 1 IO_T5
+bit 681 O 1 IO_T5 680 1 Z
+bit 680 C 1 *
+bit 679 I 1 IO_U4
+bit 678 O 1 IO_U4 677 1 Z
+bit 677 C 1 *
+bit 676 I 1 IO_T4
+bit 675 O 1 IO_T4 674 1 Z
+bit 674 C 1 *
+bit 673 I 1 IO_U3
+bit 672 O 1 IO_U3 671 1 Z
+bit 671 C 1 *
+bit 670 I 1 IO_U2
+bit 669 O 1 IO_U2 668 1 Z
+bit 668 C 1 *
+bit 667 I 1 IO_T3
+bit 666 O 1 IO_T3 665 1 Z
+bit 665 C 1 *
+bit 664 I 1 IO_R4
+bit 663 O 1 IO_R4 662 1 Z
+bit 662 C 1 *
+bit 661 I 1 IO_T2
+bit 660 O 1 IO_T2 659 1 Z
+bit 659 C 1 *
+bit 658 I 1 IO_T1
+bit 657 O 1 IO_T1 656 1 Z
+bit 656 C 1 *
+bit 655 I 1 IO_R5
+bit 654 O 1 IO_R5 653 1 Z
+bit 653 C 1 *
+bit 652 I 1 IO_P6
+bit 651 O 1 IO_P6 650 1 Z
+bit 650 C 1 *
+bit 649 I 1 IO_R2
+bit 648 O 1 IO_R2 647 1 Z
+bit 647 C 1 *
+bit 646 I 1 IO_R1
+bit 645 O 1 IO_R1 644 1 Z
+bit 644 C 1 *
+bit 643 O 1 *
+bit 642 O 1 *
+bit 641 O 1 *
+bit 640 O 1 *
+bit 639 O 1 *
+bit 638 O 1 *
+bit 637 I 1 IO_P5
+bit 636 O 1 IO_P5 635 1 Z
+bit 635 C 1 *
+bit 634 I 1 IO_P4
+bit 633 O 1 IO_P4 632 1 Z
+bit 632 C 1 *
+bit 631 I 1 IO_P2
+bit 630 O 1 IO_P2 629 1 Z
+bit 629 C 1 *
+bit 628 I 1 IO_P1
+bit 627 O 1 IO_P1 626 1 Z
+bit 626 C 1 *
+bit 625 I 1 IO_N6
+bit 624 O 1 IO_N6 623 1 Z
+bit 623 C 1 *
+bit 622 I 1 IO_N5
+bit 621 O 1 IO_N5 620 1 Z
+bit 620 C 1 *
+bit 619 I 1 IO_N4
+bit 618 O 1 IO_N4 617 1 Z
+bit 617 C 1 *
+bit 616 I 1 IO_N3
+bit 615 O 1 IO_N3 614 1 Z
+bit 614 C 1 *
+bit 613 I 1 IO_N2
+bit 612 O 1 IO_N2 611 1 Z
+bit 611 C 1 *
+bit 610 I 1 IO_N1
+bit 609 O 1 IO_N1 608 1 Z
+bit 608 C 1 *
+bit 607 O 1 *
+bit 606 O 1 *
+bit 605 O 1 *
+bit 604 O 1 *
+bit 603 O 1 *
+bit 602 O 1 *
+bit 601 I 1 IO_M6
+bit 600 O 1 IO_M6 599 1 Z
+bit 599 C 1 *
+bit 598 I 1 IO_M5
+bit 597 O 1 IO_M5 596 1 Z
+bit 596 C 1 *
+bit 595 I 1 IO_M4
+bit 594 O 1 IO_M4 593 1 Z
+bit 593 C 1 *
+bit 592 I 1 IO_M3
+bit 591 O 1 IO_M3 590 1 Z
+bit 590 C 1 *
+bit 589 I 1 IO_M2
+bit 588 O 1 IO_M2 587 1 Z
+bit 587 C 1 *
+bit 586 I 1 IO_M1
+bit 585 O 1 IO_M1 584 1 Z
+bit 584 C 1 *
+bit 583 I 1 IO_L1
+bit 582 O 1 IO_L1 581 1 Z
+bit 581 C 1 *
+bit 580 I 1 IO_L2
+bit 579 O 1 IO_L2 578 1 Z
+bit 578 C 1 *
+bit 577 I 1 IO_L3
+bit 576 O 1 IO_L3 575 1 Z
+bit 575 C 1 *
+bit 574 I 1 IO_L4
+bit 573 O 1 IO_L4 572 1 Z
+bit 572 C 1 *
+bit 571 I 1 IO_L5
+bit 570 O 1 IO_L5 569 1 Z
+bit 569 C 1 *
+bit 568 I 1 IO_L6
+bit 567 O 1 IO_L6 566 1 Z
+bit 566 C 1 *
+bit 565 O 1 *
+bit 564 O 1 *
+bit 563 O 1 *
+bit 562 O 1 *
+bit 561 O 1 *
+bit 560 O 1 *
+bit 559 I 1 IO_K1
+bit 558 O 1 IO_K1 557 1 Z
+bit 557 C 1 *
+bit 556 I 1 IO_K2
+bit 555 O 1 IO_K2 554 1 Z
+bit 554 C 1 *
+bit 553 I 1 IO_K3
+bit 552 O 1 IO_K3 551 1 Z
+bit 551 C 1 *
+bit 550 I 1 IO_K4
+bit 549 O 1 IO_K4 548 1 Z
+bit 548 C 1 *
+bit 547 I 1 IO_K5
+bit 546 O 1 IO_K5 545 1 Z
+bit 545 C 1 *
+bit 544 I 1 IO_K6
+bit 543 O 1 IO_K6 542 1 Z
+bit 542 C 1 *
+bit 541 I 1 IO_J1
+bit 540 O 1 IO_J1 539 1 Z
+bit 539 C 1 *
+bit 538 I 1 IO_J2
+bit 537 O 1 IO_J2 536 1 Z
+bit 536 C 1 *
+bit 535 I 1 IO_J5
+bit 534 O 1 IO_J5 533 1 Z
+bit 533 C 1 *
+bit 532 I 1 IO_J6
+bit 531 O 1 IO_J6 530 1 Z
+bit 530 C 1 *
+bit 529 O 1 *
+bit 528 O 1 *
+bit 527 O 1 *
+bit 526 O 1 *
+bit 525 O 1 *
+bit 524 O 1 *
+bit 523 I 1 IO_J4
+bit 522 O 1 IO_J4 521 1 Z
+bit 521 C 1 *
+bit 520 I 1 IO_H4
+bit 519 O 1 IO_H4 518 1 Z
+bit 518 C 1 *
+bit 517 I 1 IO_H1
+bit 516 O 1 IO_H1 515 1 Z
+bit 515 C 1 *
+bit 514 I 1 IO_H2
+bit 513 O 1 IO_H2 512 1 Z
+bit 512 C 1 *
+bit 511 I 1 IO_G1
+bit 510 O 1 IO_G1 509 1 Z
+bit 509 C 1 *
+bit 508 I 1 IO_G2
+bit 507 O 1 IO_G2 506 1 Z
+bit 506 C 1 *
+bit 505 I 1 IO_G3
+bit 504 O 1 IO_G3 503 1 Z
+bit 503 C 1 *
+bit 502 I 1 IO_G4
+bit 501 O 1 IO_G4 500 1 Z
+bit 500 C 1 *
+bit 499 I 1 IO_H5
+bit 498 O 1 IO_H5 497 1 Z
+bit 497 C 1 *
+bit 496 I 1 IO_G5
+bit 495 O 1 IO_G5 494 1 Z
+bit 494 C 1 *
+bit 493 I 1 IO_F2
+bit 492 O 1 IO_F2 491 1 Z
+bit 491 C 1 *
+bit 490 I 1 IO_F3
+bit 489 O 1 IO_F3 488 1 Z
+bit 488 C 1 *
+bit 487 I 1 IO_G6
+bit 486 O 1 IO_G6 485 1 Z
+bit 485 C 1 *
+bit 484 I 1 IO_F5
+bit 483 O 1 IO_F5 482 1 Z
+bit 482 C 1 *
+bit 481 I 1 IO_E1
+bit 480 O 1 IO_E1 479 1 Z
+bit 479 C 1 *
+bit 478 I 1 IO_E2
+bit 477 O 1 IO_E2 476 1 Z
+bit 476 C 1 *
+bit 475 I 1 IO_F4
+bit 474 O 1 IO_F4 473 1 Z
+bit 473 C 1 *
+bit 472 I 1 IO_E3
+bit 471 O 1 IO_E3 470 1 Z
+bit 470 C 1 *
+bit 469 I 1 IO_D3
+bit 468 O 1 IO_D3 467 1 Z
+bit 467 C 1 *
+bit 466 I 1 IO_D2
+bit 465 O 1 IO_D2 464 1 Z
+bit 464 C 1 *
+bit 463 I 1 IO_E4
+bit 462 O 1 IO_E4 461 1 Z
+bit 461 C 1 *
+bit 460 I 1 IO_D4
+bit 459 O 1 IO_D4 458 1 Z
+bit 458 C 1 *
+bit 457 I 1 IO_D1
+bit 456 O 1 IO_D1 455 1 Z
+bit 455 C 1 *
+bit 454 I 1 IO_C1
+bit 453 O 1 IO_C1 452 1 Z
+bit 452 C 1 *
+bit 451 I 1 IO_C2
+bit 450 O 1 IO_C2 449 1 Z
+bit 449 C 1 *
+bit 448 O 1 *
+bit 447 O 1 *
+bit 446 O 1 *
+bit 445 O 1 *
+bit 444 O 1 *
+bit 443 O 1 *
+bit 442 O 1 *
+bit 441 O 1 *
+bit 440 O 1 *
+bit 439 O 1 *
+bit 438 O 1 *
+bit 437 O 1 *
+bit 436 O 1 *
+bit 435 O 1 *
+bit 434 O 1 *
+bit 433 O 1 *
+bit 432 O 1 *
+bit 431 O 1 *
+bit 430 O 1 *
+bit 429 O 1 *
+bit 428 O 1 *
+bit 427 O 1 *
+bit 426 O 1 *
+bit 425 O 1 *
+bit 424 O 1 *
+bit 423 O 1 *
+bit 422 O 1 *
+bit 421 O 1 *
+bit 420 O 1 *
+bit 419 O 1 *
+bit 418 O 1 *
+bit 417 O 1 *
+bit 416 O 1 *
+bit 415 O 1 *
+bit 414 O 1 *
+bit 413 O 1 *
+bit 412 O 1 *
+bit 411 O 1 *
+bit 410 O 1 *
+bit 409 O 1 *
+bit 408 O 1 *
+bit 407 O 1 *
+bit 406 O 1 *
+bit 405 O 1 *
+bit 404 O 1 *
+bit 403 O 1 *
+bit 402 O 1 *
+bit 401 O 1 *
+bit 400 O 1 *
+bit 399 O 1 *
+bit 398 O 1 *
+bit 397 I 1 IO_C3
+bit 396 O 1 IO_C3 395 1 Z
+bit 395 C 1 *
+bit 394 I 1 IO_C4
+bit 393 O 1 IO_C4 392 1 Z
+bit 392 C 1 *
+bit 391 O 1 *
+bit 390 I 1 HSWAP_EN_B3
+bit 389 I 1 IO_A3
+bit 388 O 1 IO_A3 387 1 Z
+bit 387 C 1 *
+bit 386 I 1 IO_B4
+bit 385 O 1 IO_B4 384 1 Z
+bit 384 C 1 *
+bit 383 I 1 IO_A4
+bit 382 O 1 IO_A4 381 1 Z
+bit 381 C 1 *
+bit 380 O 1 *
+bit 379 O 1 *
+bit 378 O 1 *
+bit 377 O 1 *
+bit 376 O 1 *
+bit 375 O 1 *
+bit 374 O 1 *
+bit 373 O 1 *
+bit 372 O 1 *
+bit 371 O 1 *
+bit 370 O 1 *
+bit 369 O 1 *
+bit 368 I 1 IO_E5
+bit 367 O 1 IO_E5 366 1 Z
+bit 366 C 1 *
+bit 365 I 1 IO_D5
+bit 364 O 1 IO_D5 363 1 Z
+bit 363 C 1 *
+bit 362 I 1 IO_C5
+bit 361 O 1 IO_C5 360 1 Z
+bit 360 C 1 *
+bit 359 O 1 *
+bit 358 O 1 *
+bit 357 O 1 *
+bit 356 O 1 *
+bit 355 O 1 *
+bit 354 O 1 *
+bit 353 O 1 *
+bit 352 O 1 *
+bit 351 O 1 *
+bit 350 O 1 *
+bit 349 O 1 *
+bit 348 O 1 *
+bit 347 O 1 *
+bit 346 O 1 *
+bit 345 O 1 *
+bit 344 I 1 IO_F6
+bit 343 O 1 IO_F6 342 1 Z
+bit 342 C 1 *
+bit 341 I 1 IO_B5
+bit 340 O 1 IO_B5 339 1 Z
+bit 339 C 1 *
+bit 338 I 1 IO_A5
+bit 337 O 1 IO_A5 336 1 Z
+bit 336 C 1 *
+bit 335 I 1 IO_E6
+bit 334 O 1 IO_E6 333 1 Z
+bit 333 C 1 *
+bit 332 I 1 IO_D6
+bit 331 O 1 IO_D6 330 1 Z
+bit 330 C 1 *
+bit 329 I 1 IO_F7
+bit 328 O 1 IO_F7 327 1 Z
+bit 327 C 1 *
+bit 326 O 1 *
+bit 325 O 1 *
+bit 324 O 1 *
+bit 323 O 1 *
+bit 322 O 1 *
+bit 321 O 1 *
+bit 320 O 1 *
+bit 319 O 1 *
+bit 318 O 1 *
+bit 317 O 1 *
+bit 316 O 1 *
+bit 315 O 1 *
+bit 314 O 1 *
+bit 313 O 1 *
+bit 312 O 1 *
+bit 311 I 1 IO_C6
+bit 310 O 1 IO_C6 309 1 Z
+bit 309 C 1 *
+bit 308 I 1 IO_B6
+bit 307 O 1 IO_B6 306 1 Z
+bit 306 C 1 *
+bit 305 I 1 IO_E7
+bit 304 O 1 IO_E7 303 1 Z
+bit 303 C 1 *
+bit 302 I 1 IO_D7
+bit 301 O 1 IO_D7 300 1 Z
+bit 300 C 1 *
+bit 299 O 1 *
+bit 298 O 1 *
+bit 297 O 1 *
+bit 296 O 1 *
+bit 295 O 1 *
+bit 294 O 1 *
+bit 293 O 1 *
+bit 292 O 1 *
+bit 291 O 1 *
+bit 290 O 1 *
+bit 289 O 1 *
+bit 288 O 1 *
+bit 287 O 1 *
+bit 286 O 1 *
+bit 285 O 1 *
+bit 284 I 1 IO_C7
+bit 283 O 1 IO_C7 282 1 Z
+bit 282 C 1 *
+bit 281 I 1 IO_B7
+bit 280 O 1 IO_B7 279 1 Z
+bit 279 C 1 *
+bit 278 I 1 IO_A7
+bit 277 O 1 IO_A7 276 1 Z
+bit 276 C 1 *
+bit 275 I 1 IO_E8
+bit 274 O 1 IO_E8 273 1 Z
+bit 273 C 1 *
+bit 272 I 1 IO_D8
+bit 271 O 1 IO_D8 270 1 Z
+bit 270 C 1 *
+bit 269 O 1 *
+bit 268 O 1 *
+bit 267 O 1 *
+bit 266 O 1 *
+bit 265 O 1 *
+bit 264 O 1 *
+bit 263 O 1 *
+bit 262 O 1 *
+bit 261 O 1 *
+bit 260 I 1 IO_B8
+bit 259 O 1 IO_B8 258 1 Z
+bit 258 C 1 *
+bit 257 I 1 IO_A8
+bit 256 O 1 IO_A8 255 1 Z
+bit 255 C 1 *
+bit 254 O 1 *
+bit 253 O 1 *
+bit 252 O 1 *
+bit 251 I 1 IO_F9
+bit 250 O 1 IO_F9 249 1 Z
+bit 249 C 1 *
+bit 248 I 1 IO_E9
+bit 247 O 1 IO_E9 246 1 Z
+bit 246 C 1 *
+bit 245 O 1 *
+bit 244 O 1 *
+bit 243 O 1 *
+bit 242 O 1 *
+bit 241 O 1 *
+bit 240 O 1 *
+bit 239 I 1 IO_D9
+bit 238 O 1 IO_D9 237 1 Z
+bit 237 C 1 *
+bit 236 I 1 IO_B9
+bit 235 O 1 IO_B9 234 1 Z
+bit 234 C 1 *
+bit 233 I 1 IO_A9
+bit 232 O 1 IO_A9 231 1 Z
+bit 231 C 1 *
+bit 230 I 1 IO_F10
+bit 229 O 1 IO_F10 228 1 Z
+bit 228 C 1 *
+bit 227 I 1 IO_E10
+bit 226 O 1 IO_E10 225 1 Z
+bit 225 C 1 *
+bit 224 I 1 IO_D10
+bit 223 O 1 IO_D10 222 1 Z
+bit 222 C 1 *
+bit 221 I 1 IO_C10
+bit 220 O 1 IO_C10 219 1 Z
+bit 219 C 1 *
+bit 218 I 1 IO_B10
+bit 217 O 1 IO_B10 216 1 Z
+bit 216 C 1 *
+bit 215 I 1 IO_F11
+bit 214 O 1 IO_F11 213 1 Z
+bit 213 C 1 *
+bit 212 I 1 IO_E11
+bit 211 O 1 IO_E11 210 1 Z
+bit 210 C 1 *
+bit 209 I 1 IO_A10
+bit 208 O 1 IO_A10 207 1 Z
+bit 207 C 1 *
+bit 206 I 1 IO_D11
+bit 205 O 1 IO_D11 204 1 Z
+bit 204 C 1 *
+bit 203 I 1 IO_C11
+bit 202 O 1 IO_C11 201 1 Z
+bit 201 C 1 *
+bit 200 I 1 IO_B11
+bit 199 O 1 IO_B11 198 1 Z
+bit 198 C 1 *
+bit 197 I 1 IO_A11
+bit 196 O 1 IO_A11 195 1 Z
+bit 195 C 1 *
+bit 194 I 1 IO_A12
+bit 193 O 1 IO_A12 192 1 Z
+bit 192 C 1 *
+bit 191 I 1 IO_B12
+bit 190 O 1 IO_B12 189 1 Z
+bit 189 C 1 *
+bit 188 I 1 IO_C12
+bit 187 O 1 IO_C12 186 1 Z
+bit 186 C 1 *
+bit 185 I 1 IO_D12
+bit 184 O 1 IO_D12 183 1 Z
+bit 183 C 1 *
+bit 182 I 1 IO_E12
+bit 181 O 1 IO_E12 180 1 Z
+bit 180 C 1 *
+bit 179 I 1 IO_F12
+bit 178 O 1 IO_F12 177 1 Z
+bit 177 C 1 *
+bit 176 I 1 IO_A13
+bit 175 O 1 IO_A13 174 1 Z
+bit 174 C 1 *
+bit 173 I 1 IO_B13
+bit 172 O 1 IO_B13 171 1 Z
+bit 171 C 1 *
+bit 170 I 1 IO_C13
+bit 169 O 1 IO_C13 168 1 Z
+bit 168 C 1 *
+bit 167 I 1 IO_D13
+bit 166 O 1 IO_D13 165 1 Z
+bit 165 C 1 *
+bit 164 I 1 IO_E13
+bit 163 O 1 IO_E13 162 1 Z
+bit 162 C 1 *
+bit 161 I 1 IO_A14
+bit 160 O 1 IO_A14 159 1 Z
+bit 159 C 1 *
+bit 158 I 1 IO_B14
+bit 157 O 1 IO_B14 156 1 Z
+bit 156 C 1 *
+bit 155 I 1 IO_D14
+bit 154 O 1 IO_D14 153 1 Z
+bit 153 C 1 *
+bit 152 I 1 IO_E14
+bit 151 O 1 IO_E14 150 1 Z
+bit 150 C 1 *
+bit 149 I 1 IO_F13
+bit 148 O 1 IO_F13 147 1 Z
+bit 147 C 1 *
+bit 146 O 1 *
+bit 145 O 1 *
+bit 144 O 1 *
+bit 143 O 1 *
+bit 142 O 1 *
+bit 141 O 1 *
+bit 140 I 1 IO_B15
+bit 139 O 1 IO_B15 138 1 Z
+bit 138 C 1 *
+bit 137 I 1 IO_A15
+bit 136 O 1 IO_A15 135 1 Z
+bit 135 C 1 *
+bit 134 O 1 *
+bit 133 O 1 *
+bit 132 O 1 *
+bit 131 I 1 IO_D15
+bit 130 O 1 IO_D15 129 1 Z
+bit 129 C 1 *
+bit 128 I 1 IO_E15
+bit 127 O 1 IO_E15 126 1 Z
+bit 126 C 1 *
+bit 125 O 1 *
+bit 124 O 1 *
+bit 123 O 1 *
+bit 122 O 1 *
+bit 121 O 1 *
+bit 120 O 1 *
+bit 119 I 1 IO_F14
+bit 118 O 1 IO_F14 117 1 Z
+bit 117 C 1 *
+bit 116 I 1 IO_A16
+bit 115 O 1 IO_A16 114 1 Z
+bit 114 C 1 *
+bit 113 I 1 IO_B16
+bit 112 O 1 IO_B16 111 1 Z
+bit 111 C 1 *
+bit 110 I 1 IO_C16
+bit 109 O 1 IO_C16 108 1 Z
+bit 108 C 1 *
+bit 107 I 1 IO_D16
+bit 106 O 1 IO_D16 105 1 Z
+bit 105 C 1 *
+bit 104 O 1 *
+bit 103 O 1 *
+bit 102 O 1 *
+bit 101 O 1 *
+bit 100 O 1 *
+bit 99 O 1 *
+bit 98 O 1 *
+bit 97 O 1 *
+bit 96 O 1 *
+bit 95 O 1 *
+bit 94 O 1 *
+bit 93 O 1 *
+bit 92 O 1 *
+bit 91 O 1 *
+bit 90 O 1 *
+bit 89 I 1 IO_E16
+bit 88 O 1 IO_E16 87 1 Z
+bit 87 C 1 *
+bit 86 I 1 IO_B17
+bit 85 O 1 IO_B17 84 1 Z
+bit 84 C 1 *
+bit 83 I 1 IO_C17
+bit 82 O 1 IO_C17 81 1 Z
+bit 81 C 1 *
+bit 80 I 1 IO_D17
+bit 79 O 1 IO_D17 78 1 Z
+bit 78 C 1 *
+bit 77 I 1 IO_E17
+bit 76 O 1 IO_E17 75 1 Z
+bit 75 C 1 *
+bit 74 O 1 *
+bit 73 O 1 *
+bit 72 O 1 *
+bit 71 O 1 *
+bit 70 O 1 *
+bit 69 O 1 *
+bit 68 O 1 *
+bit 67 O 1 *
+bit 66 O 1 *
+bit 65 O 1 *
+bit 64 O 1 *
+bit 63 O 1 *
+bit 62 O 1 *
+bit 61 O 1 *
+bit 60 O 1 *
+bit 59 I 1 IO_F16
+bit 58 O 1 IO_F16 57 1 Z
+bit 57 C 1 *
+bit 56 I 1 IO_A18
+bit 55 O 1 IO_A18 54 1 Z
+bit 54 C 1 *
+bit 53 I 1 IO_B18
+bit 52 O 1 IO_B18 51 1 Z
+bit 51 C 1 *
+bit 50 I 1 IO_C18
+bit 49 O 1 IO_C18 48 1 Z
+bit 48 C 1 *
+bit 47 I 1 IO_D18
+bit 46 O 1 IO_D18 45 1 Z
+bit 45 C 1 *
+bit 44 O 1 *
+bit 43 O 1 *
+bit 42 O 1 *
+bit 41 O 1 *
+bit 40 O 1 *
+bit 39 O 1 *
+bit 38 O 1 *
+bit 37 O 1 *
+bit 36 O 1 *
+bit 35 O 1 *
+bit 34 O 1 *
+bit 33 O 1 *
+bit 32 O 1 *
+bit 31 O 1 *
+bit 30 O 1 *
+bit 29 I 1 IO_F17
+bit 28 O 1 IO_F17 27 1 Z
+bit 27 C 1 *
+bit 26 I 1 IO_A19
+bit 25 O 1 IO_A19 24 1 Z
+bit 24 C 1 *
+bit 23 I 1 IO_B19
+bit 22 O 1 IO_B19 21 1 Z
+bit 21 C 1 *
+bit 20 O 1 *
+bit 19 O 1 *
+bit 18 O 1 *
+bit 17 O 1 *
+bit 16 O 1 *
+bit 15 O 1 *
+bit 14 O 1 *
+bit 13 O 1 *
+bit 12 O 1 *
+bit 11 O 1 *
+bit 10 O 1 *
+bit 9 O 1 *
+bit 8 O 1 *
+bit 7 O 1 *
+bit 6 O 1 *
+bit 5 I 1 IO_C19
+bit 4 O 1 IO_C19 3 1 Z
+bit 3 C 1 *
+bit 2 I 1 IO_B20
+bit 1 O 1 IO_B20 0 1 Z
+bit 0 C 1 *
--- /dev/null
+signal GND1
+signal GND2
+signal GND3
+signal GND4
+signal GND5
+signal GND6
+signal GND7
+signal GND8
+signal GND9
+signal GND10
+signal GND11
+signal GND12
+signal GND13
+signal GND14
+signal GND15
+signal GND16
+signal GND17
+signal GND18
+signal GND19
+signal GND20
+signal GND21
+signal GND22
+signal GND23
+signal GND24
+signal GND25
+signal GND26
+signal GND27
+signal GND28
+signal GND29
+signal GND30
+signal GND31
+signal GND32
+signal GND33
+signal GND34
+signal GND35
+signal GND36
+signal GND37
+signal GND38
+signal GND39
+signal GND40
+signal GND41
+signal GND42
+signal GND43
+signal GND44
+signal GND45
+signal GND46
+signal GND47
+signal GND48
+signal GND49
+signal GND50
+signal GND51
+signal GND52
+signal GND53
+signal GND54
+signal GND55
+signal GND56
+signal GND57
+signal GND58
+signal GND59
+signal GND60
+signal GND61
+signal GND62
+signal GND63
+signal GND64
+signal GND65
+signal GND66
+signal GND67
+signal GND68
+signal GND69
+signal GND70
+signal GND71
+signal GND72
+signal GND73
+signal GND74
+signal GND75
+signal GND76
+signal CCLK_AD26
+signal DONE_AC24
+signal HSWAP_EN_C2
+signal M0_AE3
+signal M1_AC3
+signal M2_AF3
+signal PROG_B
+signal TCK
+signal TDI
+signal TDO
+signal TMS
+signal VCCAUX1
+signal VCCAUX2
+signal VCCAUX3
+signal VCCAUX4
+signal VCCAUX5
+signal VCCAUX6
+signal VCCAUX7
+signal VCCAUX8
+signal VCCAUX9
+signal VCCAUX10
+signal VCCAUX11
+signal VCCAUX12
+signal VCCAUX13
+signal VCCAUX14
+signal VCCAUX15
+signal VCCAUX16
+signal VCCINT1
+signal VCCINT2
+signal VCCINT3
+signal VCCINT4
+signal VCCINT5
+signal VCCINT6
+signal VCCINT7
+signal VCCINT8
+signal VCCINT9
+signal VCCINT10
+signal VCCINT11
+signal VCCINT12
+signal VCCINT13
+signal VCCINT14
+signal VCCINT15
+signal VCCINT16
+signal VCCINT17
+signal VCCINT18
+signal VCCINT19
+signal VCCINT20
+signal VCCO01
+signal VCCO02
+signal VCCO03
+signal VCCO04
+signal VCCO05
+signal VCCO06
+signal VCCO07
+signal VCCO08
+signal VCCO11
+signal VCCO12
+signal VCCO13
+signal VCCO14
+signal VCCO15
+signal VCCO16
+signal VCCO17
+signal VCCO18
+signal VCCO21
+signal VCCO22
+signal VCCO23
+signal VCCO24
+signal VCCO25
+signal VCCO26
+signal VCCO27
+signal VCCO28
+signal VCCO31
+signal VCCO32
+signal VCCO33
+signal VCCO34
+signal VCCO35
+signal VCCO36
+signal VCCO37
+signal VCCO38
+signal VCCO41
+signal VCCO42
+signal VCCO43
+signal VCCO44
+signal VCCO45
+signal VCCO46
+signal VCCO47
+signal VCCO48
+signal VCCO51
+signal VCCO52
+signal VCCO53
+signal VCCO54
+signal VCCO55
+signal VCCO56
+signal VCCO57
+signal VCCO58
+signal VCCO61
+signal VCCO62
+signal VCCO63
+signal VCCO64
+signal VCCO65
+signal VCCO66
+signal VCCO67
+signal VCCO68
+signal VCCO71
+signal VCCO72
+signal VCCO73
+signal VCCO74
+signal VCCO75
+signal VCCO76
+signal VCCO77
+signal VCCO78
+signal IO_A3
+signal IO_A4
+signal IO_A5
+signal IO_A6
+signal IO_A7
+signal IO_A8
+signal IO_A10
+signal IO_A11
+signal IO_A12
+signal IO_A13
+signal IO_A14
+signal IO_A15
+signal IO_A16
+signal IO_A17
+signal IO_A19
+signal IO_A20
+signal IO_A21
+signal IO_A22
+signal IO_A23
+signal IO_B3
+signal IO_B4
+signal IO_B5
+signal IO_B6
+signal IO_B7
+signal IO_B8
+signal IO_B9
+signal IO_B10
+signal IO_B11
+signal IO_B12
+signal IO_B13
+signal IO_B14
+signal IO_B15
+signal IO_B16
+signal IO_B17
+signal IO_B18
+signal IO_B19
+signal IO_B20
+signal IO_B21
+signal IO_B22
+signal IO_B23
+signal IO_C4
+signal IO_C5
+signal IO_C6
+signal IO_C8
+signal IO_C9
+signal IO_C10
+signal IO_C12
+signal IO_C13
+signal IO_C14
+signal IO_C15
+signal IO_C17
+signal IO_C18
+signal IO_C19
+signal IO_C21
+signal IO_C22
+signal IO_C23
+signal IO_C25
+signal IO_C26
+signal IO_D1
+signal IO_D2
+signal IO_D5
+signal IO_D6
+signal IO_D7
+signal IO_D8
+signal IO_D9
+signal IO_D10
+signal IO_D11
+signal IO_D13
+signal IO_D14
+signal IO_D16
+signal IO_D17
+signal IO_D18
+signal IO_D19
+signal IO_D20
+signal IO_D21
+signal IO_D22
+signal IO_D25
+signal IO_D26
+signal IO_E1
+signal IO_E2
+signal IO_E3
+signal IO_E4
+signal IO_E5
+signal IO_E6
+signal IO_E7
+signal IO_E8
+signal IO_E9
+signal IO_E10
+signal IO_E11
+signal IO_E12
+signal IO_E13
+signal IO_E14
+signal IO_E15
+signal IO_E16
+signal IO_E17
+signal IO_E18
+signal IO_E19
+signal IO_E20
+signal IO_E21
+signal IO_E22
+signal IO_E23
+signal IO_E24
+signal IO_E25
+signal IO_E26
+signal IO_F1
+signal IO_F2
+signal IO_F3
+signal IO_F4
+signal IO_F5
+signal IO_F6
+signal IO_F7
+signal IO_F8
+signal IO_F9
+signal IO_F10
+signal IO_F11
+signal IO_F12
+signal IO_F13
+signal IO_F14
+signal IO_F15
+signal IO_F16
+signal IO_F17
+signal IO_F18
+signal IO_F19
+signal IO_F20
+signal IO_F21
+signal IO_F23
+signal IO_F24
+signal IO_F25
+signal IO_F26
+signal IO_G1
+signal IO_G2
+signal IO_G4
+signal IO_G5
+signal IO_G6
+signal IO_G7
+signal IO_G8
+signal IO_G9
+signal IO_G10
+signal IO_G11
+signal IO_G12
+signal IO_G13
+signal IO_G14
+signal IO_G15
+signal IO_G16
+signal IO_G17
+signal IO_G18
+signal IO_G19
+signal IO_G20
+signal IO_G21
+signal IO_G22
+signal IO_G23
+signal IO_G25
+signal IO_G26
+signal IO_H1
+signal IO_H2
+signal IO_H3
+signal IO_H4
+signal IO_H5
+signal IO_H6
+signal IO_H7
+signal IO_H11
+signal IO_H12
+signal IO_H13
+signal IO_H14
+signal IO_H15
+signal IO_H16
+signal IO_H20
+signal IO_H21
+signal IO_H22
+signal IO_H23
+signal IO_H24
+signal IO_H25
+signal IO_H26
+signal IO_J2
+signal IO_J3
+signal IO_J4
+signal IO_J5
+signal IO_J6
+signal IO_J7
+signal IO_J20
+signal IO_J21
+signal IO_J22
+signal IO_J23
+signal IO_J24
+signal IO_J25
+signal IO_K1
+signal IO_K2
+signal IO_K3
+signal IO_K4
+signal IO_K5
+signal IO_K6
+signal IO_K7
+signal IO_K20
+signal IO_K21
+signal IO_K22
+signal IO_K23
+signal IO_K24
+signal IO_K25
+signal IO_K26
+signal IO_L1
+signal IO_L2
+signal IO_L4
+signal IO_L5
+signal IO_L6
+signal IO_L7
+signal IO_L8
+signal IO_L19
+signal IO_L20
+signal IO_L21
+signal IO_L22
+signal IO_L23
+signal IO_L25
+signal IO_L26
+signal IO_M1
+signal IO_M2
+signal IO_M3
+signal IO_M5
+signal IO_M6
+signal IO_M7
+signal IO_M8
+signal IO_M19
+signal IO_M20
+signal IO_M21
+signal IO_M22
+signal IO_M24
+signal IO_M25
+signal IO_M26
+signal IO_N1
+signal IO_N2
+signal IO_N3
+signal IO_N4
+signal IO_N5
+signal IO_N6
+signal IO_N7
+signal IO_N8
+signal IO_N19
+signal IO_N20
+signal IO_N21
+signal IO_N22
+signal IO_N23
+signal IO_N24
+signal IO_N25
+signal IO_N26
+signal IO_P1
+signal IO_P2
+signal IO_P3
+signal IO_P4
+signal IO_P5
+signal IO_P6
+signal IO_P7
+signal IO_P8
+signal IO_P19
+signal IO_P20
+signal IO_P21
+signal IO_P22
+signal IO_P23
+signal IO_P24
+signal IO_P25
+signal IO_P26
+signal IO_R1
+signal IO_R2
+signal IO_R3
+signal IO_R5
+signal IO_R6
+signal IO_R7
+signal IO_R8
+signal IO_R19
+signal IO_R20
+signal IO_R21
+signal IO_R22
+signal IO_R24
+signal IO_R25
+signal IO_R26
+signal IO_T1
+signal IO_T2
+signal IO_T4
+signal IO_T5
+signal IO_T6
+signal IO_T7
+signal IO_T8
+signal IO_T19
+signal IO_T20
+signal IO_T21
+signal IO_T22
+signal IO_T23
+signal IO_T25
+signal IO_T26
+signal IO_U1
+signal IO_U2
+signal IO_U3
+signal IO_U4
+signal IO_U5
+signal IO_U6
+signal IO_U7
+signal IO_U20
+signal IO_U21
+signal IO_U22
+signal IO_U23
+signal IO_U24
+signal IO_U25
+signal IO_U26
+signal IO_V2
+signal IO_V3
+signal IO_V4
+signal IO_V5
+signal IO_V6
+signal IO_V7
+signal IO_V20
+signal IO_V21
+signal IO_V22
+signal IO_V23
+signal IO_V24
+signal IO_V25
+signal IO_W1
+signal IO_W2
+signal IO_W3
+signal IO_W4
+signal IO_W5
+signal IO_W6
+signal IO_W7
+signal IO_W11
+signal IO_W12
+signal IO_W13
+signal IO_W14
+signal IO_W15
+signal IO_W16
+signal IO_W20
+signal IO_W21
+signal IO_W22
+signal IO_W23
+signal IO_W24
+signal IO_W25
+signal IO_W26
+signal IO_Y1
+signal IO_Y2
+signal IO_Y4
+signal IO_Y5
+signal IO_Y6
+signal IO_Y7
+signal IO_Y8
+signal IO_Y9
+signal IO_Y10
+signal IO_Y11
+signal IO_Y12
+signal IO_Y13
+signal IO_Y14
+signal IO_Y15
+signal IO_Y16
+signal IO_Y17
+signal IO_Y18
+signal IO_Y19
+signal IO_Y20
+signal IO_Y21
+signal IO_Y22
+signal IO_Y23
+signal IO_Y25
+signal IO_Y26
+signal IO_AA1
+signal IO_AA2
+signal IO_AA3
+signal IO_AA4
+signal IO_AA6
+signal IO_AA7
+signal IO_AA8
+signal IO_AA9
+signal IO_AA10
+signal IO_AA11
+signal IO_AA12
+signal IO_AA13
+signal IO_AA14
+signal IO_AA15
+signal IO_AA16
+signal IO_AA17
+signal IO_AA18
+signal IO_AA19
+signal IO_AA20
+signal IO_AA21
+signal IO_AA22
+signal IO_AA23
+signal IO_AA24
+signal IO_AA25
+signal IO_AA26
+signal IO_AB1
+signal IO_AB2
+signal IO_AB3
+signal IO_AB4
+signal IO_AB5
+signal IO_AB6
+signal IO_AB7
+signal IO_AB8
+signal IO_AB9
+signal IO_AB10
+signal IO_AB11
+signal IO_AB12
+signal IO_AB13
+signal IO_AB14
+signal IO_AB15
+signal IO_AB16
+signal IO_AB17
+signal IO_AB18
+signal IO_AB19
+signal IO_AB20
+signal IO_AB21
+signal IO_AB22
+signal IO_AB23
+signal IO_AB24
+signal IO_AB25
+signal IO_AB26
+signal IO_AC1
+signal IO_AC2
+signal IO_AC5
+signal IO_AC6
+signal IO_AC7
+signal IO_AC8
+signal IO_AC9
+signal IO_AC10
+signal IO_AC11
+signal IO_AC13
+signal IO_AC14
+signal IO_AC16
+signal IO_AC17
+signal IO_AC18
+signal IO_AC19
+signal IO_AC20
+signal IO_AC21
+signal IO_AC22
+signal IO_AC25
+signal IO_AC26
+signal IO_AD1
+signal IO_AD2
+signal IO_AD4
+signal IO_AD5
+signal IO_AD6
+signal IO_AD8
+signal IO_AD9
+signal IO_AD10
+signal IO_AD12
+signal IO_AD13
+signal IO_AD14
+signal IO_AD15
+signal IO_AD17
+signal IO_AD18
+signal IO_AD19
+signal IO_AD21
+signal IO_AD22
+signal IO_AD23
+signal IO_AD25
+signal IO_AE4
+signal IO_AE5
+signal IO_AE6
+signal IO_AE7
+signal IO_AE8
+signal IO_AE9
+signal IO_AE10
+signal IO_AE11
+signal IO_AE12
+signal IO_AE13
+signal IO_AE14
+signal IO_AE15
+signal IO_AE16
+signal IO_AE17
+signal IO_AE18
+signal IO_AE19
+signal IO_AE20
+signal IO_AE21
+signal IO_AE22
+signal IO_AE23
+signal IO_AE24
+signal IO_AF4
+signal IO_AF5
+signal IO_AF6
+signal IO_AF7
+signal IO_AF8
+signal IO_AF10
+signal IO_AF11
+signal IO_AF12
+signal IO_AF13
+signal IO_AF14
+signal IO_AF15
+signal IO_AF16
+signal IO_AF17
+signal IO_AF19
+signal IO_AF20
+signal IO_AF21
+signal IO_AF22
+signal IO_AF23
+
+register BSR 1559
+register BR 1
+register DIR 32
+
+instruction length 6
+
+instruction EXTEST 000000 BSR
+instruction SAMPLE/PRELOAD 000001 BSR
+instruction IDCODE 001001 DIR
+instruction BYPASS 111111 BR
+
+bit 1558 I 1 IO_C25
+bit 1557 O 1 IO_C25 1556 1 Z
+bit 1556 C 1 *
+bit 1555 I 1 IO_C26
+bit 1554 O 1 IO_C26 1553 1 Z
+bit 1553 C 1 *
+bit 1552 I 1 IO_E23
+bit 1551 O 1 IO_E23 1550 1 Z
+bit 1550 C 1 *
+bit 1549 I 1 IO_E24
+bit 1548 O 1 IO_E24 1547 1 Z
+bit 1547 C 1 *
+bit 1546 I 1 IO_D25
+bit 1545 O 1 IO_D25 1544 1 Z
+bit 1544 C 1 *
+bit 1543 I 1 IO_D26
+bit 1542 O 1 IO_D26 1541 1 Z
+bit 1541 C 1 *
+bit 1540 I 1 IO_E25
+bit 1539 O 1 IO_E25 1538 1 Z
+bit 1538 C 1 *
+bit 1537 I 1 IO_E26
+bit 1536 O 1 IO_E26 1535 1 Z
+bit 1535 C 1 *
+bit 1534 I 1 IO_G20
+bit 1533 O 1 IO_G20 1532 1 Z
+bit 1532 C 1 *
+bit 1531 I 1 IO_G21
+bit 1530 O 1 IO_G21 1529 1 Z
+bit 1529 C 1 *
+bit 1528 I 1 IO_F23
+bit 1527 O 1 IO_F23 1526 1 Z
+bit 1526 C 1 *
+bit 1525 I 1 IO_F24
+bit 1524 O 1 IO_F24 1523 1 Z
+bit 1523 C 1 *
+bit 1522 I 1 IO_G22
+bit 1521 O 1 IO_G22 1520 1 Z
+bit 1520 C 1 *
+bit 1519 I 1 IO_G23
+bit 1518 O 1 IO_G23 1517 1 Z
+bit 1517 C 1 *
+bit 1516 I 1 IO_F25
+bit 1515 O 1 IO_F25 1514 1 Z
+bit 1514 C 1 *
+bit 1513 I 1 IO_F26
+bit 1512 O 1 IO_F26 1511 1 Z
+bit 1511 C 1 *
+bit 1510 I 1 IO_G25
+bit 1509 O 1 IO_G25 1508 1 Z
+bit 1508 C 1 *
+bit 1507 I 1 IO_G26
+bit 1506 O 1 IO_G26 1505 1 Z
+bit 1505 C 1 *
+bit 1504 I 1 IO_H20
+bit 1503 O 1 IO_H20 1502 1 Z
+bit 1502 C 1 *
+bit 1501 I 1 IO_H21
+bit 1500 O 1 IO_H21 1499 1 Z
+bit 1499 C 1 *
+bit 1498 I 1 IO_H22
+bit 1497 O 1 IO_H22 1496 1 Z
+bit 1496 C 1 *
+bit 1495 I 1 IO_J21
+bit 1494 O 1 IO_J21 1493 1 Z
+bit 1493 C 1 *
+bit 1492 I 1 IO_H23
+bit 1491 O 1 IO_H23 1490 1 Z
+bit 1490 C 1 *
+bit 1489 I 1 IO_H24
+bit 1488 O 1 IO_H24 1487 1 Z
+bit 1487 C 1 *
+bit 1486 I 1 IO_H25
+bit 1485 O 1 IO_H25 1484 1 Z
+bit 1484 C 1 *
+bit 1483 I 1 IO_H26
+bit 1482 O 1 IO_H26 1481 1 Z
+bit 1481 C 1 *
+bit 1480 I 1 IO_J20
+bit 1479 O 1 IO_J20 1478 1 Z
+bit 1478 C 1 *
+bit 1477 I 1 IO_K20
+bit 1476 O 1 IO_K20 1475 1 Z
+bit 1475 C 1 *
+bit 1474 I 1 IO_J22
+bit 1473 O 1 IO_J22 1472 1 Z
+bit 1472 C 1 *
+bit 1471 I 1 IO_J23
+bit 1470 O 1 IO_J23 1469 1 Z
+bit 1469 C 1 *
+bit 1468 I 1 IO_J24
+bit 1467 O 1 IO_J24 1466 1 Z
+bit 1466 C 1 *
+bit 1465 I 1 IO_J25
+bit 1464 O 1 IO_J25 1463 1 Z
+bit 1463 C 1 *
+bit 1462 I 1 IO_K21
+bit 1461 O 1 IO_K21 1460 1 Z
+bit 1460 C 1 *
+bit 1459 I 1 IO_K22
+bit 1458 O 1 IO_K22 1457 1 Z
+bit 1457 C 1 *
+bit 1456 I 1 IO_K23
+bit 1455 O 1 IO_K23 1454 1 Z
+bit 1454 C 1 *
+bit 1453 I 1 IO_K24
+bit 1452 O 1 IO_K24 1451 1 Z
+bit 1451 C 1 *
+bit 1450 I 1 IO_K25
+bit 1449 O 1 IO_K25 1448 1 Z
+bit 1448 C 1 *
+bit 1447 I 1 IO_K26
+bit 1446 O 1 IO_K26 1445 1 Z
+bit 1445 C 1 *
+bit 1444 I 1 IO_L19
+bit 1443 O 1 IO_L19 1442 1 Z
+bit 1442 C 1 *
+bit 1441 I 1 IO_L20
+bit 1440 O 1 IO_L20 1439 1 Z
+bit 1439 C 1 *
+bit 1438 I 1 IO_L21
+bit 1437 O 1 IO_L21 1436 1 Z
+bit 1436 C 1 *
+bit 1435 I 1 IO_L22
+bit 1434 O 1 IO_L22 1433 1 Z
+bit 1433 C 1 *
+bit 1432 I 1 IO_L25
+bit 1431 O 1 IO_L25 1430 1 Z
+bit 1430 C 1 *
+bit 1429 I 1 IO_L26
+bit 1428 O 1 IO_L26 1427 1 Z
+bit 1427 C 1 *
+bit 1426 O 1 *
+bit 1425 O 1 *
+bit 1424 O 1 *
+bit 1423 O 1 *
+bit 1422 O 1 *
+bit 1421 O 1 *
+bit 1420 I 1 IO_M19
+bit 1419 O 1 IO_M19 1418 1 Z
+bit 1418 C 1 *
+bit 1417 I 1 IO_M20
+bit 1416 O 1 IO_M20 1415 1 Z
+bit 1415 C 1 *
+bit 1414 I 1 IO_M21
+bit 1413 O 1 IO_M21 1412 1 Z
+bit 1412 C 1 *
+bit 1411 I 1 IO_M22
+bit 1410 O 1 IO_M22 1409 1 Z
+bit 1409 C 1 *
+bit 1408 I 1 IO_L23
+bit 1407 O 1 IO_L23 1406 1 Z
+bit 1406 C 1 *
+bit 1405 I 1 IO_M24
+bit 1404 O 1 IO_M24 1403 1 Z
+bit 1403 C 1 *
+bit 1402 I 1 IO_M25
+bit 1401 O 1 IO_M25 1400 1 Z
+bit 1400 C 1 *
+bit 1399 I 1 IO_M26
+bit 1398 O 1 IO_M26 1397 1 Z
+bit 1397 C 1 *
+bit 1396 I 1 IO_N19
+bit 1395 O 1 IO_N19 1394 1 Z
+bit 1394 C 1 *
+bit 1393 I 1 IO_N20
+bit 1392 O 1 IO_N20 1391 1 Z
+bit 1391 C 1 *
+bit 1390 O 1 *
+bit 1389 O 1 *
+bit 1388 O 1 *
+bit 1387 O 1 *
+bit 1386 O 1 *
+bit 1385 O 1 *
+bit 1384 I 1 IO_N21
+bit 1383 O 1 IO_N21 1382 1 Z
+bit 1382 C 1 *
+bit 1381 I 1 IO_N22
+bit 1380 O 1 IO_N22 1379 1 Z
+bit 1379 C 1 *
+bit 1378 I 1 IO_N23
+bit 1377 O 1 IO_N23 1376 1 Z
+bit 1376 C 1 *
+bit 1375 I 1 IO_N24
+bit 1374 O 1 IO_N24 1373 1 Z
+bit 1373 C 1 *
+bit 1372 I 1 IO_N25
+bit 1371 O 1 IO_N25 1370 1 Z
+bit 1370 C 1 *
+bit 1369 I 1 IO_N26
+bit 1368 O 1 IO_N26 1367 1 Z
+bit 1367 C 1 *
+bit 1366 I 1 IO_P26
+bit 1365 O 1 IO_P26 1364 1 Z
+bit 1364 C 1 *
+bit 1363 I 1 IO_P25
+bit 1362 O 1 IO_P25 1361 1 Z
+bit 1361 C 1 *
+bit 1360 I 1 IO_P24
+bit 1359 O 1 IO_P24 1358 1 Z
+bit 1358 C 1 *
+bit 1357 I 1 IO_P23
+bit 1356 O 1 IO_P23 1355 1 Z
+bit 1355 C 1 *
+bit 1354 I 1 IO_P22
+bit 1353 O 1 IO_P22 1352 1 Z
+bit 1352 C 1 *
+bit 1351 I 1 IO_P21
+bit 1350 O 1 IO_P21 1349 1 Z
+bit 1349 C 1 *
+bit 1348 O 1 *
+bit 1347 O 1 *
+bit 1346 O 1 *
+bit 1345 O 1 *
+bit 1344 O 1 *
+bit 1343 O 1 *
+bit 1342 I 1 IO_P20
+bit 1341 O 1 IO_P20 1340 1 Z
+bit 1340 C 1 *
+bit 1339 I 1 IO_P19
+bit 1338 O 1 IO_P19 1337 1 Z
+bit 1337 C 1 *
+bit 1336 I 1 IO_R26
+bit 1335 O 1 IO_R26 1334 1 Z
+bit 1334 C 1 *
+bit 1333 I 1 IO_R25
+bit 1332 O 1 IO_R25 1331 1 Z
+bit 1331 C 1 *
+bit 1330 I 1 IO_R24
+bit 1329 O 1 IO_R24 1328 1 Z
+bit 1328 C 1 *
+bit 1327 I 1 IO_T23
+bit 1326 O 1 IO_T23 1325 1 Z
+bit 1325 C 1 *
+bit 1324 I 1 IO_R22
+bit 1323 O 1 IO_R22 1322 1 Z
+bit 1322 C 1 *
+bit 1321 I 1 IO_R21
+bit 1320 O 1 IO_R21 1319 1 Z
+bit 1319 C 1 *
+bit 1318 I 1 IO_R20
+bit 1317 O 1 IO_R20 1316 1 Z
+bit 1316 C 1 *
+bit 1315 I 1 IO_R19
+bit 1314 O 1 IO_R19 1313 1 Z
+bit 1313 C 1 *
+bit 1312 O 1 *
+bit 1311 O 1 *
+bit 1310 O 1 *
+bit 1309 O 1 *
+bit 1308 O 1 *
+bit 1307 O 1 *
+bit 1306 I 1 IO_T26
+bit 1305 O 1 IO_T26 1304 1 Z
+bit 1304 C 1 *
+bit 1303 I 1 IO_T25
+bit 1302 O 1 IO_T25 1301 1 Z
+bit 1301 C 1 *
+bit 1300 I 1 IO_T22
+bit 1299 O 1 IO_T22 1298 1 Z
+bit 1298 C 1 *
+bit 1297 I 1 IO_T21
+bit 1296 O 1 IO_T21 1295 1 Z
+bit 1295 C 1 *
+bit 1294 I 1 IO_T20
+bit 1293 O 1 IO_T20 1292 1 Z
+bit 1292 C 1 *
+bit 1291 I 1 IO_T19
+bit 1290 O 1 IO_T19 1289 1 Z
+bit 1289 C 1 *
+bit 1288 I 1 IO_U26
+bit 1287 O 1 IO_U26 1286 1 Z
+bit 1286 C 1 *
+bit 1285 I 1 IO_U25
+bit 1284 O 1 IO_U25 1283 1 Z
+bit 1283 C 1 *
+bit 1282 I 1 IO_U24
+bit 1281 O 1 IO_U24 1280 1 Z
+bit 1280 C 1 *
+bit 1279 I 1 IO_U23
+bit 1278 O 1 IO_U23 1277 1 Z
+bit 1277 C 1 *
+bit 1276 I 1 IO_U22
+bit 1275 O 1 IO_U22 1274 1 Z
+bit 1274 C 1 *
+bit 1273 I 1 IO_U21
+bit 1272 O 1 IO_U21 1271 1 Z
+bit 1271 C 1 *
+bit 1270 I 1 IO_V25
+bit 1269 O 1 IO_V25 1268 1 Z
+bit 1268 C 1 *
+bit 1267 I 1 IO_V24
+bit 1266 O 1 IO_V24 1265 1 Z
+bit 1265 C 1 *
+bit 1264 I 1 IO_V23
+bit 1263 O 1 IO_V23 1262 1 Z
+bit 1262 C 1 *
+bit 1261 I 1 IO_V22
+bit 1260 O 1 IO_V22 1259 1 Z
+bit 1259 C 1 *
+bit 1258 I 1 IO_U20
+bit 1257 O 1 IO_U20 1256 1 Z
+bit 1256 C 1 *
+bit 1255 I 1 IO_V20
+bit 1254 O 1 IO_V20 1253 1 Z
+bit 1253 C 1 *
+bit 1252 I 1 IO_W26
+bit 1251 O 1 IO_W26 1250 1 Z
+bit 1250 C 1 *
+bit 1249 I 1 IO_W25
+bit 1248 O 1 IO_W25 1247 1 Z
+bit 1247 C 1 *
+bit 1246 I 1 IO_W24
+bit 1245 O 1 IO_W24 1244 1 Z
+bit 1244 C 1 *
+bit 1243 I 1 IO_W23
+bit 1242 O 1 IO_W23 1241 1 Z
+bit 1241 C 1 *
+bit 1240 I 1 IO_V21
+bit 1239 O 1 IO_V21 1238 1 Z
+bit 1238 C 1 *
+bit 1237 I 1 IO_W22
+bit 1236 O 1 IO_W22 1235 1 Z
+bit 1235 C 1 *
+bit 1234 I 1 IO_Y26
+bit 1233 O 1 IO_Y26 1232 1 Z
+bit 1232 C 1 *
+bit 1231 I 1 IO_Y25
+bit 1230 O 1 IO_Y25 1229 1 Z
+bit 1229 C 1 *
+bit 1228 I 1 IO_W21
+bit 1227 O 1 IO_W21 1226 1 Z
+bit 1226 C 1 *
+bit 1225 I 1 IO_W20
+bit 1224 O 1 IO_W20 1223 1 Z
+bit 1223 C 1 *
+bit 1222 I 1 IO_AA26
+bit 1221 O 1 IO_AA26 1220 1 Z
+bit 1220 C 1 *
+bit 1219 I 1 IO_AA25
+bit 1218 O 1 IO_AA25 1217 1 Z
+bit 1217 C 1 *
+bit 1216 I 1 IO_Y23
+bit 1215 O 1 IO_Y23 1214 1 Z
+bit 1214 C 1 *
+bit 1213 I 1 IO_Y22
+bit 1212 O 1 IO_Y22 1211 1 Z
+bit 1211 C 1 *
+bit 1210 I 1 IO_AA24
+bit 1209 O 1 IO_AA24 1208 1 Z
+bit 1208 C 1 *
+bit 1207 I 1 IO_AA23
+bit 1206 O 1 IO_AA23 1205 1 Z
+bit 1205 C 1 *
+bit 1204 I 1 IO_AB26
+bit 1203 O 1 IO_AB26 1202 1 Z
+bit 1202 C 1 *
+bit 1201 I 1 IO_AB25
+bit 1200 O 1 IO_AB25 1199 1 Z
+bit 1199 C 1 *
+bit 1198 I 1 IO_Y21
+bit 1197 O 1 IO_Y21 1196 1 Z
+bit 1196 C 1 *
+bit 1195 I 1 IO_Y20
+bit 1194 O 1 IO_Y20 1193 1 Z
+bit 1193 C 1 *
+bit 1192 I 1 IO_AC26
+bit 1191 O 1 IO_AC26 1190 1 Z
+bit 1190 C 1 *
+bit 1189 I 1 IO_AC25
+bit 1188 O 1 IO_AC25 1187 1 Z
+bit 1187 C 1 *
+bit 1186 I 1 IO_AB24
+bit 1185 O 1 IO_AB24 1184 1 Z
+bit 1184 C 1 *
+bit 1183 I 1 IO_AB23
+bit 1182 O 1 IO_AB23 1181 1 Z
+bit 1181 C 1 *
+bit 1180 I 1 IO_AA22
+bit 1179 O 1 IO_AA22 1178 1 Z
+bit 1178 C 1 *
+bit 1177 I 1 IO_AA21
+bit 1176 O 1 IO_AA21 1175 1 Z
+bit 1175 C 1 *
+bit 1174 I 1 CCLK_AD26
+bit 1173 O 1 CCLK_AD26 1172 1 Z
+bit 1172 C 1 *
+bit 1171 I 1 DONE_AC24
+bit 1170 O 1 DONE_AC24 1169 1 Z
+bit 1169 C 1 *
+bit 1168 I 1 IO_AD25
+bit 1167 O 1 IO_AD25 1166 1 Z
+bit 1166 C 1 *
+bit 1165 I 1 IO_AB22
+bit 1164 O 1 IO_AB22 1163 1 Z
+bit 1163 C 1 *
+bit 1162 I 1 IO_AC22
+bit 1161 O 1 IO_AC22 1160 1 Z
+bit 1160 C 1 *
+bit 1159 I 1 IO_AE24
+bit 1158 O 1 IO_AE24 1157 1 Z
+bit 1157 C 1 *
+bit 1156 I 1 IO_AF24
+bit 1155 O 1 IO_AF24 1154 1 Z
+bit 1154 C 1 *
+bit 1153 I 1 IO_AD23
+bit 1152 O 1 IO_AD23 1151 1 Z
+bit 1151 C 1 *
+bit 1150 I 1 IO_AE23
+bit 1149 O 1 IO_AE23 1148 1 Z
+bit 1148 C 1 *
+bit 1147 I 1 IO_AF23
+bit 1146 O 1 IO_AF23 1145 1 Z
+bit 1145 C 1 *
+bit 1144 I 1 IO_AD22
+bit 1143 O 1 IO_AD22 1142 1 Z
+bit 1142 C 1 *
+bit 1141 I 1 IO_AE22
+bit 1140 O 1 IO_AE22 1139 1 Z
+bit 1139 C 1 *
+bit 1138 I 1 IO_AF22
+bit 1137 O 1 IO_AF22 1136 1 Z
+bit 1136 C 1 *
+bit 1135 I 1 IO_AB21
+bit 1134 O 1 IO_AB21 1133 1 Z
+bit 1133 C 1 *
+bit 1132 I 1 IO_AC21
+bit 1131 O 1 IO_AC21 1130 1 Z
+bit 1130 C 1 *
+bit 1129 I 1 IO_AD21
+bit 1128 O 1 IO_AD21 1127 1 Z
+bit 1127 C 1 *
+bit 1126 I 1 IO_AE21
+bit 1125 O 1 IO_AE21 1124 1 Z
+bit 1124 C 1 *
+bit 1123 I 1 IO_AF21
+bit 1122 O 1 IO_AF21 1121 1 Z
+bit 1121 C 1 *
+bit 1120 I 1 IO_AB20
+bit 1119 O 1 IO_AB20 1118 1 Z
+bit 1118 C 1 *
+bit 1117 I 1 IO_AC20
+bit 1116 O 1 IO_AC20 1115 1 Z
+bit 1115 C 1 *
+bit 1114 I 1 IO_AE20
+bit 1113 O 1 IO_AE20 1112 1 Z
+bit 1112 C 1 *
+bit 1111 I 1 IO_AF20
+bit 1110 O 1 IO_AF20 1109 1 Z
+bit 1109 C 1 *
+bit 1108 I 1 IO_AA20
+bit 1107 O 1 IO_AA20 1106 1 Z
+bit 1106 C 1 *
+bit 1105 I 1 IO_Y19
+bit 1104 O 1 IO_Y19 1103 1 Z
+bit 1103 C 1 *
+bit 1102 I 1 IO_AA19
+bit 1101 O 1 IO_AA19 1100 1 Z
+bit 1100 C 1 *
+bit 1099 I 1 IO_AB19
+bit 1098 O 1 IO_AB19 1097 1 Z
+bit 1097 C 1 *
+bit 1096 I 1 IO_AC19
+bit 1095 O 1 IO_AC19 1094 1 Z
+bit 1094 C 1 *
+bit 1093 I 1 IO_AD19
+bit 1092 O 1 IO_AD19 1091 1 Z
+bit 1091 C 1 *
+bit 1090 I 1 IO_AE19
+bit 1089 O 1 IO_AE19 1088 1 Z
+bit 1088 C 1 *
+bit 1087 I 1 IO_AF19
+bit 1086 O 1 IO_AF19 1085 1 Z
+bit 1085 C 1 *
+bit 1084 I 1 IO_Y18
+bit 1083 O 1 IO_Y18 1082 1 Z
+bit 1082 C 1 *
+bit 1081 I 1 IO_AA18
+bit 1080 O 1 IO_AA18 1079 1 Z
+bit 1079 C 1 *
+bit 1078 O 1 *
+bit 1077 O 1 *
+bit 1076 O 1 *
+bit 1075 I 1 IO_AB18
+bit 1074 O 1 IO_AB18 1073 1 Z
+bit 1073 C 1 *
+bit 1072 I 1 IO_AC18
+bit 1071 O 1 IO_AC18 1070 1 Z
+bit 1070 C 1 *
+bit 1069 I 1 IO_AD18
+bit 1068 O 1 IO_AD18 1067 1 Z
+bit 1067 C 1 *
+bit 1066 I 1 IO_AE18
+bit 1065 O 1 IO_AE18 1064 1 Z
+bit 1064 C 1 *
+bit 1063 I 1 IO_Y17
+bit 1062 O 1 IO_Y17 1061 1 Z
+bit 1061 C 1 *
+bit 1060 I 1 IO_AC17
+bit 1059 O 1 IO_AC17 1058 1 Z
+bit 1058 C 1 *
+bit 1057 I 1 IO_AA17
+bit 1056 O 1 IO_AA17 1055 1 Z
+bit 1055 C 1 *
+bit 1054 I 1 IO_AD17
+bit 1053 O 1 IO_AD17 1052 1 Z
+bit 1052 C 1 *
+bit 1051 I 1 IO_AB17
+bit 1050 O 1 IO_AB17 1049 1 Z
+bit 1049 C 1 *
+bit 1048 I 1 IO_W16
+bit 1047 O 1 IO_W16 1046 1 Z
+bit 1046 C 1 *
+bit 1045 I 1 IO_AE17
+bit 1044 O 1 IO_AE17 1043 1 Z
+bit 1043 C 1 *
+bit 1042 I 1 IO_AF17
+bit 1041 O 1 IO_AF17 1040 1 Z
+bit 1040 C 1 *
+bit 1039 I 1 IO_Y16
+bit 1038 O 1 IO_Y16 1037 1 Z
+bit 1037 C 1 *
+bit 1036 I 1 IO_AA16
+bit 1035 O 1 IO_AA16 1034 1 Z
+bit 1034 C 1 *
+bit 1033 O 1 *
+bit 1032 O 1 *
+bit 1031 O 1 *
+bit 1030 I 1 IO_AB16
+bit 1029 O 1 IO_AB16 1028 1 Z
+bit 1028 C 1 *
+bit 1027 I 1 IO_AC16
+bit 1026 O 1 IO_AC16 1025 1 Z
+bit 1025 C 1 *
+bit 1024 I 1 IO_AE16
+bit 1023 O 1 IO_AE16 1022 1 Z
+bit 1022 C 1 *
+bit 1021 I 1 IO_AF16
+bit 1020 O 1 IO_AF16 1019 1 Z
+bit 1019 C 1 *
+bit 1018 I 1 IO_W15
+bit 1017 O 1 IO_W15 1016 1 Z
+bit 1016 C 1 *
+bit 1015 I 1 IO_Y15
+bit 1014 O 1 IO_Y15 1013 1 Z
+bit 1013 C 1 *
+bit 1012 I 1 IO_W14
+bit 1011 O 1 IO_W14 1010 1 Z
+bit 1010 C 1 *
+bit 1009 I 1 IO_AA15
+bit 1008 O 1 IO_AA15 1007 1 Z
+bit 1007 C 1 *
+bit 1006 I 1 IO_AB15
+bit 1005 O 1 IO_AB15 1004 1 Z
+bit 1004 C 1 *
+bit 1003 I 1 IO_AD15
+bit 1002 O 1 IO_AD15 1001 1 Z
+bit 1001 C 1 *
+bit 1000 I 1 IO_AE15
+bit 999 O 1 IO_AE15 998 1 Z
+bit 998 C 1 *
+bit 997 I 1 IO_AF15
+bit 996 O 1 IO_AF15 995 1 Z
+bit 995 C 1 *
+bit 994 I 1 IO_Y14
+bit 993 O 1 IO_Y14 992 1 Z
+bit 992 C 1 *
+bit 991 I 1 IO_AA14
+bit 990 O 1 IO_AA14 989 1 Z
+bit 989 C 1 *
+bit 988 I 1 IO_AB14
+bit 987 O 1 IO_AB14 986 1 Z
+bit 986 C 1 *
+bit 985 I 1 IO_AC14
+bit 984 O 1 IO_AC14 983 1 Z
+bit 983 C 1 *
+bit 982 I 1 IO_AD14
+bit 981 O 1 IO_AD14 980 1 Z
+bit 980 C 1 *
+bit 979 I 1 IO_AE14
+bit 978 O 1 IO_AE14 977 1 Z
+bit 977 C 1 *
+bit 976 I 1 IO_AF14
+bit 975 O 1 IO_AF14 974 1 Z
+bit 974 C 1 *
+bit 973 I 1 IO_AF13
+bit 972 O 1 IO_AF13 971 1 Z
+bit 971 C 1 *
+bit 970 I 1 IO_AE13
+bit 969 O 1 IO_AE13 968 1 Z
+bit 968 C 1 *
+bit 967 I 1 IO_AD13
+bit 966 O 1 IO_AD13 965 1 Z
+bit 965 C 1 *
+bit 964 I 1 IO_AC13
+bit 963 O 1 IO_AC13 962 1 Z
+bit 962 C 1 *
+bit 961 I 1 IO_AB13
+bit 960 O 1 IO_AB13 959 1 Z
+bit 959 C 1 *
+bit 958 I 1 IO_AA13
+bit 957 O 1 IO_AA13 956 1 Z
+bit 956 C 1 *
+bit 955 I 1 IO_Y13
+bit 954 O 1 IO_Y13 953 1 Z
+bit 953 C 1 *
+bit 952 I 1 IO_W13
+bit 951 O 1 IO_W13 950 1 Z
+bit 950 C 1 *
+bit 949 I 1 IO_AF12
+bit 948 O 1 IO_AF12 947 1 Z
+bit 947 C 1 *
+bit 946 I 1 IO_AE12
+bit 945 O 1 IO_AE12 944 1 Z
+bit 944 C 1 *
+bit 943 I 1 IO_AD12
+bit 942 O 1 IO_AD12 941 1 Z
+bit 941 C 1 *
+bit 940 I 1 IO_AB12
+bit 939 O 1 IO_AB12 938 1 Z
+bit 938 C 1 *
+bit 937 I 1 IO_AA12
+bit 936 O 1 IO_AA12 935 1 Z
+bit 935 C 1 *
+bit 934 I 1 IO_Y12
+bit 933 O 1 IO_Y12 932 1 Z
+bit 932 C 1 *
+bit 931 I 1 IO_W12
+bit 930 O 1 IO_W12 929 1 Z
+bit 929 C 1 *
+bit 928 I 1 IO_AC11
+bit 927 O 1 IO_AC11 926 1 Z
+bit 926 C 1 *
+bit 925 I 1 IO_AF11
+bit 924 O 1 IO_AF11 923 1 Z
+bit 923 C 1 *
+bit 922 I 1 IO_AE11
+bit 921 O 1 IO_AE11 920 1 Z
+bit 920 C 1 *
+bit 919 I 1 IO_AB11
+bit 918 O 1 IO_AB11 917 1 Z
+bit 917 C 1 *
+bit 916 I 1 IO_AA11
+bit 915 O 1 IO_AA11 914 1 Z
+bit 914 C 1 *
+bit 913 O 1 *
+bit 912 O 1 *
+bit 911 O 1 *
+bit 910 I 1 IO_Y11
+bit 909 O 1 IO_Y11 908 1 Z
+bit 908 C 1 *
+bit 907 I 1 IO_W11
+bit 906 O 1 IO_W11 905 1 Z
+bit 905 C 1 *
+bit 904 I 1 IO_AF10
+bit 903 O 1 IO_AF10 902 1 Z
+bit 902 C 1 *
+bit 901 I 1 IO_AE10
+bit 900 O 1 IO_AE10 899 1 Z
+bit 899 C 1 *
+bit 898 I 1 IO_AD10
+bit 897 O 1 IO_AD10 896 1 Z
+bit 896 C 1 *
+bit 895 I 1 IO_AC10
+bit 894 O 1 IO_AC10 893 1 Z
+bit 893 C 1 *
+bit 892 I 1 IO_AB10
+bit 891 O 1 IO_AB10 890 1 Z
+bit 890 C 1 *
+bit 889 I 1 IO_AA10
+bit 888 O 1 IO_AA10 887 1 Z
+bit 887 C 1 *
+bit 886 I 1 IO_Y10
+bit 885 O 1 IO_Y10 884 1 Z
+bit 884 C 1 *
+bit 883 O 1 *
+bit 882 O 1 *
+bit 881 O 1 *
+bit 880 I 1 IO_AE9
+bit 879 O 1 IO_AE9 878 1 Z
+bit 878 C 1 *
+bit 877 I 1 IO_AD9
+bit 876 O 1 IO_AD9 875 1 Z
+bit 875 C 1 *
+bit 874 I 1 IO_AC9
+bit 873 O 1 IO_AC9 872 1 Z
+bit 872 C 1 *
+bit 871 O 1 *
+bit 870 O 1 *
+bit 869 O 1 *
+bit 868 I 1 IO_AB9
+bit 867 O 1 IO_AB9 866 1 Z
+bit 866 C 1 *
+bit 865 I 1 IO_AA9
+bit 864 O 1 IO_AA9 863 1 Z
+bit 863 C 1 *
+bit 862 I 1 IO_Y9
+bit 861 O 1 IO_Y9 860 1 Z
+bit 860 C 1 *
+bit 859 I 1 IO_AF8
+bit 858 O 1 IO_AF8 857 1 Z
+bit 857 C 1 *
+bit 856 I 1 IO_AE8
+bit 855 O 1 IO_AE8 854 1 Z
+bit 854 C 1 *
+bit 853 O 1 *
+bit 852 O 1 *
+bit 851 O 1 *
+bit 850 I 1 IO_AD8
+bit 849 O 1 IO_AD8 848 1 Z
+bit 848 C 1 *
+bit 847 I 1 IO_AC8
+bit 846 O 1 IO_AC8 845 1 Z
+bit 845 C 1 *
+bit 844 I 1 IO_AB8
+bit 843 O 1 IO_AB8 842 1 Z
+bit 842 C 1 *
+bit 841 I 1 IO_AA8
+bit 840 O 1 IO_AA8 839 1 Z
+bit 839 C 1 *
+bit 838 I 1 IO_Y8
+bit 837 O 1 IO_Y8 836 1 Z
+bit 836 C 1 *
+bit 835 I 1 IO_AF7
+bit 834 O 1 IO_AF7 833 1 Z
+bit 833 C 1 *
+bit 832 I 1 IO_AE7
+bit 831 O 1 IO_AE7 830 1 Z
+bit 830 C 1 *
+bit 829 I 1 IO_AC7
+bit 828 O 1 IO_AC7 827 1 Z
+bit 827 C 1 *
+bit 826 I 1 IO_AB7
+bit 825 O 1 IO_AB7 824 1 Z
+bit 824 C 1 *
+bit 823 I 1 IO_AA7
+bit 822 O 1 IO_AA7 821 1 Z
+bit 821 C 1 *
+bit 820 I 1 IO_AF6
+bit 819 O 1 IO_AF6 818 1 Z
+bit 818 C 1 *
+bit 817 I 1 IO_AE6
+bit 816 O 1 IO_AE6 815 1 Z
+bit 815 C 1 *
+bit 814 I 1 IO_AD6
+bit 813 O 1 IO_AD6 812 1 Z
+bit 812 C 1 *
+bit 811 I 1 IO_AC6
+bit 810 O 1 IO_AC6 809 1 Z
+bit 809 C 1 *
+bit 808 I 1 IO_AF5
+bit 807 O 1 IO_AF5 806 1 Z
+bit 806 C 1 *
+bit 805 I 1 IO_AE5
+bit 804 O 1 IO_AE5 803 1 Z
+bit 803 C 1 *
+bit 802 I 1 IO_AD5
+bit 801 O 1 IO_AD5 800 1 Z
+bit 800 C 1 *
+bit 799 I 1 IO_AB6
+bit 798 O 1 IO_AB6 797 1 Z
+bit 797 C 1 *
+bit 796 I 1 IO_AA6
+bit 795 O 1 IO_AA6 794 1 Z
+bit 794 C 1 *
+bit 793 I 1 IO_AF4
+bit 792 O 1 IO_AF4 791 1 Z
+bit 791 C 1 *
+bit 790 I 1 IO_AE4
+bit 789 O 1 IO_AE4 788 1 Z
+bit 788 C 1 *
+bit 787 I 1 IO_AD4
+bit 786 O 1 IO_AD4 785 1 Z
+bit 785 C 1 *
+bit 784 I 1 IO_AC5
+bit 783 O 1 IO_AC5 782 1 Z
+bit 782 C 1 *
+bit 781 I 1 IO_AB5
+bit 780 O 1 IO_AB5 779 1 Z
+bit 779 C 1 *
+bit 778 I 1 M2_AF3
+bit 777 I 1 M0_AE3
+bit 776 I 1 M1_AC3
+bit 775 I 1 IO_AD2
+bit 774 O 1 IO_AD2 773 1 Z
+bit 773 C 1 *
+bit 772 I 1 IO_AD1
+bit 771 O 1 IO_AD1 770 1 Z
+bit 770 C 1 *
+bit 769 I 1 IO_AB4
+bit 768 O 1 IO_AB4 767 1 Z
+bit 767 C 1 *
+bit 766 I 1 IO_AB3
+bit 765 O 1 IO_AB3 764 1 Z
+bit 764 C 1 *
+bit 763 I 1 IO_AC2
+bit 762 O 1 IO_AC2 761 1 Z
+bit 761 C 1 *
+bit 760 I 1 IO_AC1
+bit 759 O 1 IO_AC1 758 1 Z
+bit 758 C 1 *
+bit 757 I 1 IO_AB2
+bit 756 O 1 IO_AB2 755 1 Z
+bit 755 C 1 *
+bit 754 I 1 IO_AB1
+bit 753 O 1 IO_AB1 752 1 Z
+bit 752 C 1 *
+bit 751 I 1 IO_Y7
+bit 750 O 1 IO_Y7 749 1 Z
+bit 749 C 1 *
+bit 748 I 1 IO_Y6
+bit 747 O 1 IO_Y6 746 1 Z
+bit 746 C 1 *
+bit 745 I 1 IO_AA4
+bit 744 O 1 IO_AA4 743 1 Z
+bit 743 C 1 *
+bit 742 I 1 IO_AA3
+bit 741 O 1 IO_AA3 740 1 Z
+bit 740 C 1 *
+bit 739 I 1 IO_Y5
+bit 738 O 1 IO_Y5 737 1 Z
+bit 737 C 1 *
+bit 736 I 1 IO_Y4
+bit 735 O 1 IO_Y4 734 1 Z
+bit 734 C 1 *
+bit 733 I 1 IO_AA2
+bit 732 O 1 IO_AA2 731 1 Z
+bit 731 C 1 *
+bit 730 I 1 IO_AA1
+bit 729 O 1 IO_AA1 728 1 Z
+bit 728 C 1 *
+bit 727 I 1 IO_Y2
+bit 726 O 1 IO_Y2 725 1 Z
+bit 725 C 1 *
+bit 724 I 1 IO_Y1
+bit 723 O 1 IO_Y1 722 1 Z
+bit 722 C 1 *
+bit 721 I 1 IO_W7
+bit 720 O 1 IO_W7 719 1 Z
+bit 719 C 1 *
+bit 718 I 1 IO_W6
+bit 717 O 1 IO_W6 716 1 Z
+bit 716 C 1 *
+bit 715 I 1 IO_V6
+bit 714 O 1 IO_V6 713 1 Z
+bit 713 C 1 *
+bit 712 I 1 IO_W5
+bit 711 O 1 IO_W5 710 1 Z
+bit 710 C 1 *
+bit 709 I 1 IO_W4
+bit 708 O 1 IO_W4 707 1 Z
+bit 707 C 1 *
+bit 706 I 1 IO_W3
+bit 705 O 1 IO_W3 704 1 Z
+bit 704 C 1 *
+bit 703 I 1 IO_W2
+bit 702 O 1 IO_W2 701 1 Z
+bit 701 C 1 *
+bit 700 I 1 IO_W1
+bit 699 O 1 IO_W1 698 1 Z
+bit 698 C 1 *
+bit 697 I 1 IO_V7
+bit 696 O 1 IO_V7 695 1 Z
+bit 695 C 1 *
+bit 694 I 1 IO_U7
+bit 693 O 1 IO_U7 692 1 Z
+bit 692 C 1 *
+bit 691 I 1 IO_V5
+bit 690 O 1 IO_V5 689 1 Z
+bit 689 C 1 *
+bit 688 I 1 IO_V4
+bit 687 O 1 IO_V4 686 1 Z
+bit 686 C 1 *
+bit 685 I 1 IO_V3
+bit 684 O 1 IO_V3 683 1 Z
+bit 683 C 1 *
+bit 682 I 1 IO_V2
+bit 681 O 1 IO_V2 680 1 Z
+bit 680 C 1 *
+bit 679 I 1 IO_U6
+bit 678 O 1 IO_U6 677 1 Z
+bit 677 C 1 *
+bit 676 I 1 IO_U5
+bit 675 O 1 IO_U5 674 1 Z
+bit 674 C 1 *
+bit 673 I 1 IO_U4
+bit 672 O 1 IO_U4 671 1 Z
+bit 671 C 1 *
+bit 670 I 1 IO_U3
+bit 669 O 1 IO_U3 668 1 Z
+bit 668 C 1 *
+bit 667 I 1 IO_U2
+bit 666 O 1 IO_U2 665 1 Z
+bit 665 C 1 *
+bit 664 I 1 IO_U1
+bit 663 O 1 IO_U1 662 1 Z
+bit 662 C 1 *
+bit 661 I 1 IO_T8
+bit 660 O 1 IO_T8 659 1 Z
+bit 659 C 1 *
+bit 658 I 1 IO_T7
+bit 657 O 1 IO_T7 656 1 Z
+bit 656 C 1 *
+bit 655 I 1 IO_T6
+bit 654 O 1 IO_T6 653 1 Z
+bit 653 C 1 *
+bit 652 I 1 IO_T5
+bit 651 O 1 IO_T5 650 1 Z
+bit 650 C 1 *
+bit 649 I 1 IO_T2
+bit 648 O 1 IO_T2 647 1 Z
+bit 647 C 1 *
+bit 646 I 1 IO_T1
+bit 645 O 1 IO_T1 644 1 Z
+bit 644 C 1 *
+bit 643 O 1 *
+bit 642 O 1 *
+bit 641 O 1 *
+bit 640 O 1 *
+bit 639 O 1 *
+bit 638 O 1 *
+bit 637 I 1 IO_R8
+bit 636 O 1 IO_R8 635 1 Z
+bit 635 C 1 *
+bit 634 I 1 IO_R7
+bit 633 O 1 IO_R7 632 1 Z
+bit 632 C 1 *
+bit 631 I 1 IO_R6
+bit 630 O 1 IO_R6 629 1 Z
+bit 629 C 1 *
+bit 628 I 1 IO_R5
+bit 627 O 1 IO_R5 626 1 Z
+bit 626 C 1 *
+bit 625 I 1 IO_T4
+bit 624 O 1 IO_T4 623 1 Z
+bit 623 C 1 *
+bit 622 I 1 IO_R3
+bit 621 O 1 IO_R3 620 1 Z
+bit 620 C 1 *
+bit 619 I 1 IO_R2
+bit 618 O 1 IO_R2 617 1 Z
+bit 617 C 1 *
+bit 616 I 1 IO_R1
+bit 615 O 1 IO_R1 614 1 Z
+bit 614 C 1 *
+bit 613 I 1 IO_P8
+bit 612 O 1 IO_P8 611 1 Z
+bit 611 C 1 *
+bit 610 I 1 IO_P7
+bit 609 O 1 IO_P7 608 1 Z
+bit 608 C 1 *
+bit 607 O 1 *
+bit 606 O 1 *
+bit 605 O 1 *
+bit 604 O 1 *
+bit 603 O 1 *
+bit 602 O 1 *
+bit 601 I 1 IO_P6
+bit 600 O 1 IO_P6 599 1 Z
+bit 599 C 1 *
+bit 598 I 1 IO_P5
+bit 597 O 1 IO_P5 596 1 Z
+bit 596 C 1 *
+bit 595 I 1 IO_P4
+bit 594 O 1 IO_P4 593 1 Z
+bit 593 C 1 *
+bit 592 I 1 IO_P3
+bit 591 O 1 IO_P3 590 1 Z
+bit 590 C 1 *
+bit 589 I 1 IO_P2
+bit 588 O 1 IO_P2 587 1 Z
+bit 587 C 1 *
+bit 586 I 1 IO_P1
+bit 585 O 1 IO_P1 584 1 Z
+bit 584 C 1 *
+bit 583 I 1 IO_N1
+bit 582 O 1 IO_N1 581 1 Z
+bit 581 C 1 *
+bit 580 I 1 IO_N2
+bit 579 O 1 IO_N2 578 1 Z
+bit 578 C 1 *
+bit 577 I 1 IO_N3
+bit 576 O 1 IO_N3 575 1 Z
+bit 575 C 1 *
+bit 574 I 1 IO_N4
+bit 573 O 1 IO_N4 572 1 Z
+bit 572 C 1 *
+bit 571 I 1 IO_N5
+bit 570 O 1 IO_N5 569 1 Z
+bit 569 C 1 *
+bit 568 I 1 IO_N6
+bit 567 O 1 IO_N6 566 1 Z
+bit 566 C 1 *
+bit 565 O 1 *
+bit 564 O 1 *
+bit 563 O 1 *
+bit 562 O 1 *
+bit 561 O 1 *
+bit 560 O 1 *
+bit 559 I 1 IO_N7
+bit 558 O 1 IO_N7 557 1 Z
+bit 557 C 1 *
+bit 556 I 1 IO_N8
+bit 555 O 1 IO_N8 554 1 Z
+bit 554 C 1 *
+bit 553 I 1 IO_M1
+bit 552 O 1 IO_M1 551 1 Z
+bit 551 C 1 *
+bit 550 I 1 IO_M2
+bit 549 O 1 IO_M2 548 1 Z
+bit 548 C 1 *
+bit 547 I 1 IO_M3
+bit 546 O 1 IO_M3 545 1 Z
+bit 545 C 1 *
+bit 544 I 1 IO_L4
+bit 543 O 1 IO_L4 542 1 Z
+bit 542 C 1 *
+bit 541 I 1 IO_M6
+bit 540 O 1 IO_M6 539 1 Z
+bit 539 C 1 *
+bit 538 I 1 IO_M5
+bit 537 O 1 IO_M5 536 1 Z
+bit 536 C 1 *
+bit 535 I 1 IO_M7
+bit 534 O 1 IO_M7 533 1 Z
+bit 533 C 1 *
+bit 532 I 1 IO_M8
+bit 531 O 1 IO_M8 530 1 Z
+bit 530 C 1 *
+bit 529 O 1 *
+bit 528 O 1 *
+bit 527 O 1 *
+bit 526 O 1 *
+bit 525 O 1 *
+bit 524 O 1 *
+bit 523 I 1 IO_L1
+bit 522 O 1 IO_L1 521 1 Z
+bit 521 C 1 *
+bit 520 I 1 IO_L2
+bit 519 O 1 IO_L2 518 1 Z
+bit 518 C 1 *
+bit 517 I 1 IO_L5
+bit 516 O 1 IO_L5 515 1 Z
+bit 515 C 1 *
+bit 514 I 1 IO_L6
+bit 513 O 1 IO_L6 512 1 Z
+bit 512 C 1 *
+bit 511 I 1 IO_L7
+bit 510 O 1 IO_L7 509 1 Z
+bit 509 C 1 *
+bit 508 I 1 IO_L8
+bit 507 O 1 IO_L8 506 1 Z
+bit 506 C 1 *
+bit 505 I 1 IO_K1
+bit 504 O 1 IO_K1 503 1 Z
+bit 503 C 1 *
+bit 502 I 1 IO_K2
+bit 501 O 1 IO_K2 500 1 Z
+bit 500 C 1 *
+bit 499 I 1 IO_K3
+bit 498 O 1 IO_K3 497 1 Z
+bit 497 C 1 *
+bit 496 I 1 IO_K4
+bit 495 O 1 IO_K4 494 1 Z
+bit 494 C 1 *
+bit 493 I 1 IO_K5
+bit 492 O 1 IO_K5 491 1 Z
+bit 491 C 1 *
+bit 490 I 1 IO_K6
+bit 489 O 1 IO_K6 488 1 Z
+bit 488 C 1 *
+bit 487 I 1 IO_J2
+bit 486 O 1 IO_J2 485 1 Z
+bit 485 C 1 *
+bit 484 I 1 IO_J3
+bit 483 O 1 IO_J3 482 1 Z
+bit 482 C 1 *
+bit 481 I 1 IO_J4
+bit 480 O 1 IO_J4 479 1 Z
+bit 479 C 1 *
+bit 478 I 1 IO_J5
+bit 477 O 1 IO_J5 476 1 Z
+bit 476 C 1 *
+bit 475 I 1 IO_K7
+bit 474 O 1 IO_K7 473 1 Z
+bit 473 C 1 *
+bit 472 I 1 IO_J7
+bit 471 O 1 IO_J7 470 1 Z
+bit 470 C 1 *
+bit 469 I 1 IO_H1
+bit 468 O 1 IO_H1 467 1 Z
+bit 467 C 1 *
+bit 466 I 1 IO_H2
+bit 465 O 1 IO_H2 464 1 Z
+bit 464 C 1 *
+bit 463 I 1 IO_H3
+bit 462 O 1 IO_H3 461 1 Z
+bit 461 C 1 *
+bit 460 I 1 IO_H4
+bit 459 O 1 IO_H4 458 1 Z
+bit 458 C 1 *
+bit 457 I 1 IO_J6
+bit 456 O 1 IO_J6 455 1 Z
+bit 455 C 1 *
+bit 454 I 1 IO_H5
+bit 453 O 1 IO_H5 452 1 Z
+bit 452 C 1 *
+bit 451 I 1 IO_G1
+bit 450 O 1 IO_G1 449 1 Z
+bit 449 C 1 *
+bit 448 I 1 IO_G2
+bit 447 O 1 IO_G2 446 1 Z
+bit 446 C 1 *
+bit 445 I 1 IO_H6
+bit 444 O 1 IO_H6 443 1 Z
+bit 443 C 1 *
+bit 442 I 1 IO_H7
+bit 441 O 1 IO_H7 440 1 Z
+bit 440 C 1 *
+bit 439 I 1 IO_F1
+bit 438 O 1 IO_F1 437 1 Z
+bit 437 C 1 *
+bit 436 I 1 IO_F2
+bit 435 O 1 IO_F2 434 1 Z
+bit 434 C 1 *
+bit 433 I 1 IO_G4
+bit 432 O 1 IO_G4 431 1 Z
+bit 431 C 1 *
+bit 430 I 1 IO_G5
+bit 429 O 1 IO_G5 428 1 Z
+bit 428 C 1 *
+bit 427 I 1 IO_F3
+bit 426 O 1 IO_F3 425 1 Z
+bit 425 C 1 *
+bit 424 I 1 IO_F4
+bit 423 O 1 IO_F4 422 1 Z
+bit 422 C 1 *
+bit 421 I 1 IO_E1
+bit 420 O 1 IO_E1 419 1 Z
+bit 419 C 1 *
+bit 418 I 1 IO_E2
+bit 417 O 1 IO_E2 416 1 Z
+bit 416 C 1 *
+bit 415 I 1 IO_G6
+bit 414 O 1 IO_G6 413 1 Z
+bit 413 C 1 *
+bit 412 I 1 IO_G7
+bit 411 O 1 IO_G7 410 1 Z
+bit 410 C 1 *
+bit 409 I 1 IO_D1
+bit 408 O 1 IO_D1 407 1 Z
+bit 407 C 1 *
+bit 406 I 1 IO_D2
+bit 405 O 1 IO_D2 404 1 Z
+bit 404 C 1 *
+bit 403 I 1 IO_E3
+bit 402 O 1 IO_E3 401 1 Z
+bit 401 C 1 *
+bit 400 I 1 IO_E4
+bit 399 O 1 IO_E4 398 1 Z
+bit 398 C 1 *
+bit 397 I 1 IO_F5
+bit 396 O 1 IO_F5 395 1 Z
+bit 395 C 1 *
+bit 394 I 1 IO_F6
+bit 393 O 1 IO_F6 392 1 Z
+bit 392 C 1 *
+bit 391 O 1 *
+bit 390 I 1 HSWAP_EN_C2
+bit 389 I 1 IO_B3
+bit 388 O 1 IO_B3 387 1 Z
+bit 387 C 1 *
+bit 386 I 1 IO_E5
+bit 385 O 1 IO_E5 384 1 Z
+bit 384 C 1 *
+bit 383 I 1 IO_D5
+bit 382 O 1 IO_D5 381 1 Z
+bit 381 C 1 *
+bit 380 O 1 *
+bit 379 O 1 *
+bit 378 O 1 *
+bit 377 I 1 IO_A3
+bit 376 O 1 IO_A3 375 1 Z
+bit 375 C 1 *
+bit 374 I 1 IO_C4
+bit 373 O 1 IO_C4 372 1 Z
+bit 372 C 1 *
+bit 371 I 1 IO_B4
+bit 370 O 1 IO_B4 369 1 Z
+bit 369 C 1 *
+bit 368 I 1 IO_A4
+bit 367 O 1 IO_A4 366 1 Z
+bit 366 C 1 *
+bit 365 I 1 IO_C5
+bit 364 O 1 IO_C5 363 1 Z
+bit 363 C 1 *
+bit 362 I 1 IO_B5
+bit 361 O 1 IO_B5 360 1 Z
+bit 360 C 1 *
+bit 359 I 1 IO_A5
+bit 358 O 1 IO_A5 357 1 Z
+bit 357 C 1 *
+bit 356 I 1 IO_E6
+bit 355 O 1 IO_E6 354 1 Z
+bit 354 C 1 *
+bit 353 I 1 IO_D6
+bit 352 O 1 IO_D6 351 1 Z
+bit 351 C 1 *
+bit 350 I 1 IO_C6
+bit 349 O 1 IO_C6 348 1 Z
+bit 348 C 1 *
+bit 347 I 1 IO_B6
+bit 346 O 1 IO_B6 345 1 Z
+bit 345 C 1 *
+bit 344 I 1 IO_A6
+bit 343 O 1 IO_A6 342 1 Z
+bit 342 C 1 *
+bit 341 I 1 IO_E7
+bit 340 O 1 IO_E7 339 1 Z
+bit 339 C 1 *
+bit 338 I 1 IO_D7
+bit 337 O 1 IO_D7 336 1 Z
+bit 336 C 1 *
+bit 335 I 1 IO_B7
+bit 334 O 1 IO_B7 333 1 Z
+bit 333 C 1 *
+bit 332 I 1 IO_A7
+bit 331 O 1 IO_A7 330 1 Z
+bit 330 C 1 *
+bit 329 I 1 IO_F7
+bit 328 O 1 IO_F7 327 1 Z
+bit 327 C 1 *
+bit 326 I 1 IO_G8
+bit 325 O 1 IO_G8 324 1 Z
+bit 324 C 1 *
+bit 323 I 1 IO_F8
+bit 322 O 1 IO_F8 321 1 Z
+bit 321 C 1 *
+bit 320 I 1 IO_E8
+bit 319 O 1 IO_E8 318 1 Z
+bit 318 C 1 *
+bit 317 I 1 IO_D8
+bit 316 O 1 IO_D8 315 1 Z
+bit 315 C 1 *
+bit 314 I 1 IO_C8
+bit 313 O 1 IO_C8 312 1 Z
+bit 312 C 1 *
+bit 311 I 1 IO_B8
+bit 310 O 1 IO_B8 309 1 Z
+bit 309 C 1 *
+bit 308 I 1 IO_A8
+bit 307 O 1 IO_A8 306 1 Z
+bit 306 C 1 *
+bit 305 I 1 IO_G9
+bit 304 O 1 IO_G9 303 1 Z
+bit 303 C 1 *
+bit 302 I 1 IO_F9
+bit 301 O 1 IO_F9 300 1 Z
+bit 300 C 1 *
+bit 299 O 1 *
+bit 298 O 1 *
+bit 297 O 1 *
+bit 296 I 1 IO_E9
+bit 295 O 1 IO_E9 294 1 Z
+bit 294 C 1 *
+bit 293 I 1 IO_D9
+bit 292 O 1 IO_D9 291 1 Z
+bit 291 C 1 *
+bit 290 I 1 IO_C9
+bit 289 O 1 IO_C9 288 1 Z
+bit 288 C 1 *
+bit 287 I 1 IO_B9
+bit 286 O 1 IO_B9 285 1 Z
+bit 285 C 1 *
+bit 284 I 1 IO_G10
+bit 283 O 1 IO_G10 282 1 Z
+bit 282 C 1 *
+bit 281 I 1 IO_F10
+bit 280 O 1 IO_F10 279 1 Z
+bit 279 C 1 *
+bit 278 I 1 IO_E10
+bit 277 O 1 IO_E10 276 1 Z
+bit 276 C 1 *
+bit 275 I 1 IO_D10
+bit 274 O 1 IO_D10 273 1 Z
+bit 273 C 1 *
+bit 272 I 1 IO_C10
+bit 271 O 1 IO_C10 270 1 Z
+bit 270 C 1 *
+bit 269 I 1 IO_H11
+bit 268 O 1 IO_H11 267 1 Z
+bit 267 C 1 *
+bit 266 I 1 IO_B10
+bit 265 O 1 IO_B10 264 1 Z
+bit 264 C 1 *
+bit 263 I 1 IO_A10
+bit 262 O 1 IO_A10 261 1 Z
+bit 261 C 1 *
+bit 260 I 1 IO_G11
+bit 259 O 1 IO_G11 258 1 Z
+bit 258 C 1 *
+bit 257 I 1 IO_F11
+bit 256 O 1 IO_F11 255 1 Z
+bit 255 C 1 *
+bit 254 O 1 *
+bit 253 O 1 *
+bit 252 O 1 *
+bit 251 I 1 IO_E11
+bit 250 O 1 IO_E11 249 1 Z
+bit 249 C 1 *
+bit 248 I 1 IO_D11
+bit 247 O 1 IO_D11 246 1 Z
+bit 246 C 1 *
+bit 245 I 1 IO_B11
+bit 244 O 1 IO_B11 243 1 Z
+bit 243 C 1 *
+bit 242 I 1 IO_A11
+bit 241 O 1 IO_A11 240 1 Z
+bit 240 C 1 *
+bit 239 I 1 IO_H12
+bit 238 O 1 IO_H12 237 1 Z
+bit 237 C 1 *
+bit 236 I 1 IO_G12
+bit 235 O 1 IO_G12 234 1 Z
+bit 234 C 1 *
+bit 233 I 1 IO_H13
+bit 232 O 1 IO_H13 231 1 Z
+bit 231 C 1 *
+bit 230 I 1 IO_F12
+bit 229 O 1 IO_F12 228 1 Z
+bit 228 C 1 *
+bit 227 I 1 IO_E12
+bit 226 O 1 IO_E12 225 1 Z
+bit 225 C 1 *
+bit 224 I 1 IO_C12
+bit 223 O 1 IO_C12 222 1 Z
+bit 222 C 1 *
+bit 221 I 1 IO_B12
+bit 220 O 1 IO_B12 219 1 Z
+bit 219 C 1 *
+bit 218 I 1 IO_A12
+bit 217 O 1 IO_A12 216 1 Z
+bit 216 C 1 *
+bit 215 I 1 IO_G13
+bit 214 O 1 IO_G13 213 1 Z
+bit 213 C 1 *
+bit 212 I 1 IO_F13
+bit 211 O 1 IO_F13 210 1 Z
+bit 210 C 1 *
+bit 209 I 1 IO_E13
+bit 208 O 1 IO_E13 207 1 Z
+bit 207 C 1 *
+bit 206 I 1 IO_D13
+bit 205 O 1 IO_D13 204 1 Z
+bit 204 C 1 *
+bit 203 I 1 IO_C13
+bit 202 O 1 IO_C13 201 1 Z
+bit 201 C 1 *
+bit 200 I 1 IO_B13
+bit 199 O 1 IO_B13 198 1 Z
+bit 198 C 1 *
+bit 197 I 1 IO_A13
+bit 196 O 1 IO_A13 195 1 Z
+bit 195 C 1 *
+bit 194 I 1 IO_A14
+bit 193 O 1 IO_A14 192 1 Z
+bit 192 C 1 *
+bit 191 I 1 IO_B14
+bit 190 O 1 IO_B14 189 1 Z
+bit 189 C 1 *
+bit 188 I 1 IO_C14
+bit 187 O 1 IO_C14 186 1 Z
+bit 186 C 1 *
+bit 185 I 1 IO_D14
+bit 184 O 1 IO_D14 183 1 Z
+bit 183 C 1 *
+bit 182 I 1 IO_E14
+bit 181 O 1 IO_E14 180 1 Z
+bit 180 C 1 *
+bit 179 I 1 IO_F14
+bit 178 O 1 IO_F14 177 1 Z
+bit 177 C 1 *
+bit 176 I 1 IO_G14
+bit 175 O 1 IO_G14 174 1 Z
+bit 174 C 1 *
+bit 173 I 1 IO_H14
+bit 172 O 1 IO_H14 171 1 Z
+bit 171 C 1 *
+bit 170 I 1 IO_A15
+bit 169 O 1 IO_A15 168 1 Z
+bit 168 C 1 *
+bit 167 I 1 IO_B15
+bit 166 O 1 IO_B15 165 1 Z
+bit 165 C 1 *
+bit 164 I 1 IO_C15
+bit 163 O 1 IO_C15 162 1 Z
+bit 162 C 1 *
+bit 161 I 1 IO_E15
+bit 160 O 1 IO_E15 159 1 Z
+bit 159 C 1 *
+bit 158 I 1 IO_F15
+bit 157 O 1 IO_F15 156 1 Z
+bit 156 C 1 *
+bit 155 I 1 IO_G15
+bit 154 O 1 IO_G15 153 1 Z
+bit 153 C 1 *
+bit 152 I 1 IO_H15
+bit 151 O 1 IO_H15 150 1 Z
+bit 150 C 1 *
+bit 149 I 1 IO_D16
+bit 148 O 1 IO_D16 147 1 Z
+bit 147 C 1 *
+bit 146 I 1 IO_A16
+bit 145 O 1 IO_A16 144 1 Z
+bit 144 C 1 *
+bit 143 I 1 IO_B16
+bit 142 O 1 IO_B16 141 1 Z
+bit 141 C 1 *
+bit 140 I 1 IO_E16
+bit 139 O 1 IO_E16 138 1 Z
+bit 138 C 1 *
+bit 137 I 1 IO_F16
+bit 136 O 1 IO_F16 135 1 Z
+bit 135 C 1 *
+bit 134 O 1 *
+bit 133 O 1 *
+bit 132 O 1 *
+bit 131 I 1 IO_G16
+bit 130 O 1 IO_G16 129 1 Z
+bit 129 C 1 *
+bit 128 I 1 IO_H16
+bit 127 O 1 IO_H16 126 1 Z
+bit 126 C 1 *
+bit 125 I 1 IO_A17
+bit 124 O 1 IO_A17 123 1 Z
+bit 123 C 1 *
+bit 122 I 1 IO_B17
+bit 121 O 1 IO_B17 120 1 Z
+bit 120 C 1 *
+bit 119 I 1 IO_C17
+bit 118 O 1 IO_C17 117 1 Z
+bit 117 C 1 *
+bit 116 I 1 IO_D17
+bit 115 O 1 IO_D17 114 1 Z
+bit 114 C 1 *
+bit 113 I 1 IO_E17
+bit 112 O 1 IO_E17 111 1 Z
+bit 111 C 1 *
+bit 110 I 1 IO_F17
+bit 109 O 1 IO_F17 108 1 Z
+bit 108 C 1 *
+bit 107 I 1 IO_G17
+bit 106 O 1 IO_G17 105 1 Z
+bit 105 C 1 *
+bit 104 O 1 *
+bit 103 O 1 *
+bit 102 O 1 *
+bit 101 I 1 IO_B18
+bit 100 O 1 IO_B18 99 1 Z
+bit 99 C 1 *
+bit 98 I 1 IO_C18
+bit 97 O 1 IO_C18 96 1 Z
+bit 96 C 1 *
+bit 95 I 1 IO_D18
+bit 94 O 1 IO_D18 93 1 Z
+bit 93 C 1 *
+bit 92 O 1 *
+bit 91 O 1 *
+bit 90 O 1 *
+bit 89 I 1 IO_E18
+bit 88 O 1 IO_E18 87 1 Z
+bit 87 C 1 *
+bit 86 I 1 IO_F18
+bit 85 O 1 IO_F18 84 1 Z
+bit 84 C 1 *
+bit 83 I 1 IO_G18
+bit 82 O 1 IO_G18 81 1 Z
+bit 81 C 1 *
+bit 80 I 1 IO_A19
+bit 79 O 1 IO_A19 78 1 Z
+bit 78 C 1 *
+bit 77 I 1 IO_B19
+bit 76 O 1 IO_B19 75 1 Z
+bit 75 C 1 *
+bit 74 O 1 *
+bit 73 O 1 *
+bit 72 O 1 *
+bit 71 I 1 IO_C19
+bit 70 O 1 IO_C19 69 1 Z
+bit 69 C 1 *
+bit 68 I 1 IO_D19
+bit 67 O 1 IO_D19 66 1 Z
+bit 66 C 1 *
+bit 65 I 1 IO_E19
+bit 64 O 1 IO_E19 63 1 Z
+bit 63 C 1 *
+bit 62 I 1 IO_F19
+bit 61 O 1 IO_F19 60 1 Z
+bit 60 C 1 *
+bit 59 I 1 IO_G19
+bit 58 O 1 IO_G19 57 1 Z
+bit 57 C 1 *
+bit 56 I 1 IO_A20
+bit 55 O 1 IO_A20 54 1 Z
+bit 54 C 1 *
+bit 53 I 1 IO_B20
+bit 52 O 1 IO_B20 51 1 Z
+bit 51 C 1 *
+bit 50 I 1 IO_D20
+bit 49 O 1 IO_D20 48 1 Z
+bit 48 C 1 *
+bit 47 I 1 IO_E20
+bit 46 O 1 IO_E20 45 1 Z
+bit 45 C 1 *
+bit 44 I 1 IO_F20
+bit 43 O 1 IO_F20 42 1 Z
+bit 42 C 1 *
+bit 41 I 1 IO_A21
+bit 40 O 1 IO_A21 39 1 Z
+bit 39 C 1 *
+bit 38 I 1 IO_B21
+bit 37 O 1 IO_B21 36 1 Z
+bit 36 C 1 *
+bit 35 I 1 IO_C21
+bit 34 O 1 IO_C21 33 1 Z
+bit 33 C 1 *
+bit 32 I 1 IO_D21
+bit 31 O 1 IO_D21 30 1 Z
+bit 30 C 1 *
+bit 29 I 1 IO_A22
+bit 28 O 1 IO_A22 27 1 Z
+bit 27 C 1 *
+bit 26 I 1 IO_B22
+bit 25 O 1 IO_B22 24 1 Z
+bit 24 C 1 *
+bit 23 I 1 IO_C22
+bit 22 O 1 IO_C22 21 1 Z
+bit 21 C 1 *
+bit 20 I 1 IO_E21
+bit 19 O 1 IO_E21 18 1 Z
+bit 18 C 1 *
+bit 17 I 1 IO_F21
+bit 16 O 1 IO_F21 15 1 Z
+bit 15 C 1 *
+bit 14 I 1 IO_A23
+bit 13 O 1 IO_A23 12 1 Z
+bit 12 C 1 *
+bit 11 I 1 IO_B23
+bit 10 O 1 IO_B23 9 1 Z
+bit 9 C 1 *
+bit 8 I 1 IO_C23
+bit 7 O 1 IO_C23 6 1 Z
+bit 6 C 1 *
+bit 5 I 1 IO_D22
+bit 4 O 1 IO_D22 3 1 Z
+bit 3 C 1 *
+bit 2 I 1 IO_E22
+bit 1 O 1 IO_E22 0 1 Z
+bit 0 C 1 *
--- /dev/null
+signal GND1
+signal GND2
+signal GND3
+signal GND4
+signal GND5
+signal GND6
+signal GND7
+signal GND8
+signal GND9
+signal GND10
+signal GND11
+signal GND12
+signal GND13
+signal GND14
+signal GND15
+signal GND16
+signal GND17
+signal GND18
+signal GND19
+signal GND20
+signal GND21
+signal GND22
+signal GND23
+signal GND24
+signal GND25
+signal GND26
+signal GND27
+signal GND28
+signal GND29
+signal GND30
+signal GND31
+signal GND32
+signal GND33
+signal GND34
+signal GND35
+signal GND36
+signal GND37
+signal GND38
+signal GND39
+signal GND40
+signal GND41
+signal GND42
+signal GND43
+signal GND44
+signal GND45
+signal GND46
+signal GND47
+signal GND48
+signal GND49
+signal GND50
+signal GND51
+signal GND52
+signal GND53
+signal GND54
+signal GND55
+signal GND56
+signal GND57
+signal GND58
+signal GND59
+signal GND60
+signal GND61
+signal GND62
+signal GND63
+signal GND64
+signal GND65
+signal GND66
+signal GND67
+signal GND68
+signal GND69
+signal GND70
+signal GND71
+signal GND72
+signal GND73
+signal GND74
+signal GND75
+signal GND76
+signal GND77
+signal GND78
+signal GND79
+signal GND80
+signal GND81
+signal GND82
+signal GND83
+signal GND84
+signal GND85
+signal CCLK_PAD458
+signal DONE_PAD457
+signal HSWAP_EN_PAD96
+signal M0_PAD267
+signal M1_PAD266
+signal M2_PAD268
+signal PROG_B
+signal TCK
+signal TDI
+signal TDO
+signal TMS
+signal VCCAUX1
+signal VCCAUX2
+signal VCCAUX3
+signal VCCAUX4
+signal VCCAUX5
+signal VCCAUX6
+signal VCCAUX7
+signal VCCAUX8
+signal VCCAUX9
+signal VCCAUX10
+signal VCCAUX11
+signal VCCAUX12
+signal VCCAUX13
+signal VCCAUX14
+signal VCCAUX15
+signal VCCAUX16
+signal VCCAUX17
+signal VCCAUX18
+signal VCCAUX19
+signal VCCAUX20
+signal VCCAUX21
+signal VCCAUX22
+signal VCCAUX23
+signal VCCAUX24
+signal VCCINT1
+signal VCCINT2
+signal VCCINT3
+signal VCCINT4
+signal VCCINT5
+signal VCCINT6
+signal VCCINT7
+signal VCCINT8
+signal VCCINT9
+signal VCCINT10
+signal VCCINT11
+signal VCCINT12
+signal VCCINT13
+signal VCCINT14
+signal VCCINT15
+signal VCCINT16
+signal VCCINT17
+signal VCCINT18
+signal VCCINT19
+signal VCCINT20
+signal VCCINT21
+signal VCCINT22
+signal VCCINT23
+signal VCCINT24
+signal VCCO01
+signal VCCO02
+signal VCCO03
+signal VCCO04
+signal VCCO05
+signal VCCO06
+signal VCCO07
+signal VCCO08
+signal VCCO09
+signal VCCO010
+signal VCCO11
+signal VCCO12
+signal VCCO13
+signal VCCO14
+signal VCCO15
+signal VCCO16
+signal VCCO17
+signal VCCO18
+signal VCCO19
+signal VCCO110
+signal VCCO21
+signal VCCO22
+signal VCCO23
+signal VCCO24
+signal VCCO25
+signal VCCO26
+signal VCCO27
+signal VCCO31
+signal VCCO32
+signal VCCO33
+signal VCCO34
+signal VCCO35
+signal VCCO36
+signal VCCO37
+signal VCCO41
+signal VCCO42
+signal VCCO43
+signal VCCO44
+signal VCCO45
+signal VCCO46
+signal VCCO47
+signal VCCO48
+signal VCCO49
+signal VCCO410
+signal VCCO51
+signal VCCO52
+signal VCCO53
+signal VCCO54
+signal VCCO55
+signal VCCO56
+signal VCCO57
+signal VCCO58
+signal VCCO59
+signal VCCO510
+signal VCCO61
+signal VCCO62
+signal VCCO63
+signal VCCO64
+signal VCCO65
+signal VCCO66
+signal VCCO67
+signal VCCO71
+signal VCCO72
+signal VCCO73
+signal VCCO74
+signal VCCO75
+signal VCCO76
+signal VCCO77
+signal IO_PAD2
+signal IO_PAD3
+signal IO_PAD4
+signal IO_PAD6
+signal IO_PAD8
+signal IO_PAD9
+signal IO_PAD10
+signal IO_PAD12
+signal IO_PAD13
+signal IO_PAD14
+signal IO_PAD16
+signal IO_PAD18
+signal IO_PAD20
+signal IO_PAD22
+signal IO_PAD23
+signal IO_PAD24
+signal IO_PAD25
+signal IO_PAD26
+signal IO_PAD28
+signal IO_PAD30
+signal IO_PAD31
+signal IO_PAD32
+signal IO_PAD33
+signal IO_PAD34
+signal IO_PAD35
+signal IO_PAD36
+signal IO_PAD38
+signal IO_PAD40
+signal IO_PAD42
+signal IO_PAD44
+signal IO_PAD46
+signal IO_PAD48
+signal IO_PAD49
+signal IO_PAD50
+signal IO_PAD51
+signal IO_PAD52
+signal IO_PAD54
+signal IO_PAD56
+signal IO_PAD57
+signal IO_PAD58
+signal IO_PAD60
+signal IO_PAD61
+signal IO_PAD62
+signal IO_PAD64
+signal IO_PAD65
+signal IO_PAD66
+signal IO_PAD68
+signal IO_PAD70
+signal IO_PAD72
+signal IO_PAD74
+signal IO_PAD75
+signal IO_PAD76
+signal IO_PAD77
+signal IO_PAD78
+signal IO_PAD80
+signal IO_PAD82
+signal IO_PAD83
+signal IO_PAD84
+signal IO_PAD85
+signal IO_PAD86
+signal IO_PAD88
+signal IO_PAD89
+signal IO_PAD93
+signal IO_PAD94
+signal IO_PAD95
+signal IO_PAD100
+signal IO_PAD101
+signal IO_PAD102
+signal IO_PAD103
+signal IO_PAD104
+signal IO_PAD105
+signal IO_PAD106
+signal IO_PAD108
+signal IO_PAD109
+signal IO_PAD110
+signal IO_PAD111
+signal IO_PAD112
+signal IO_PAD114
+signal IO_PAD116
+signal IO_PAD118
+signal IO_PAD120
+signal IO_PAD121
+signal IO_PAD122
+signal IO_PAD124
+signal IO_PAD125
+signal IO_PAD126
+signal IO_PAD128
+signal IO_PAD129
+signal IO_PAD130
+signal IO_PAD132
+signal IO_PAD134
+signal IO_PAD135
+signal IO_PAD136
+signal IO_PAD137
+signal IO_PAD138
+signal IO_PAD140
+signal IO_PAD142
+signal IO_PAD144
+signal IO_PAD146
+signal IO_PAD147
+signal IO_PAD148
+signal IO_PAD150
+signal IO_PAD152
+signal IO_PAD153
+signal IO_PAD154
+signal IO_PAD155
+signal IO_PAD156
+signal IO_PAD157
+signal IO_PAD158
+signal IO_PAD159
+signal IO_PAD160
+signal IO_PAD161
+signal IO_PAD162
+signal IO_PAD163
+signal IO_PAD164
+signal IO_PAD166
+signal IO_PAD168
+signal IO_PAD170
+signal IO_PAD172
+signal IO_PAD174
+signal IO_PAD175
+signal IO_PAD176
+signal IO_PAD178
+signal IO_PAD180
+signal IO_PAD181
+signal IO_PAD183
+signal IO_PAD184
+signal IO_PAD186
+signal IO_PAD188
+signal IO_PAD189
+signal IO_PAD190
+signal IO_PAD192
+signal IO_PAD194
+signal IO_PAD196
+signal IO_PAD198
+signal IO_PAD200
+signal IO_PAD201
+signal IO_PAD202
+signal IO_PAD203
+signal IO_PAD204
+signal IO_PAD205
+signal IO_PAD206
+signal IO_PAD207
+signal IO_PAD208
+signal IO_PAD209
+signal IO_PAD210
+signal IO_PAD211
+signal IO_PAD212
+signal IO_PAD214
+signal IO_PAD216
+signal IO_PAD217
+signal IO_PAD218
+signal IO_PAD220
+signal IO_PAD222
+signal IO_PAD224
+signal IO_PAD226
+signal IO_PAD227
+signal IO_PAD228
+signal IO_PAD229
+signal IO_PAD230
+signal IO_PAD232
+signal IO_PAD234
+signal IO_PAD235
+signal IO_PAD236
+signal IO_PAD238
+signal IO_PAD239
+signal IO_PAD240
+signal IO_PAD242
+signal IO_PAD243
+signal IO_PAD244
+signal IO_PAD246
+signal IO_PAD248
+signal IO_PAD250
+signal IO_PAD252
+signal IO_PAD253
+signal IO_PAD254
+signal IO_PAD255
+signal IO_PAD256
+signal IO_PAD258
+signal IO_PAD259
+signal IO_PAD260
+signal IO_PAD261
+signal IO_PAD262
+signal IO_PAD263
+signal IO_PAD264
+signal IO_PAD269
+signal IO_PAD270
+signal IO_PAD274
+signal IO_PAD275
+signal IO_PAD276
+signal IO_PAD278
+signal IO_PAD279
+signal IO_PAD280
+signal IO_PAD281
+signal IO_PAD282
+signal IO_PAD284
+signal IO_PAD286
+signal IO_PAD287
+signal IO_PAD288
+signal IO_PAD289
+signal IO_PAD290
+signal IO_PAD292
+signal IO_PAD294
+signal IO_PAD296
+signal IO_PAD298
+signal IO_PAD299
+signal IO_PAD300
+signal IO_PAD302
+signal IO_PAD303
+signal IO_PAD304
+signal IO_PAD306
+signal IO_PAD307
+signal IO_PAD308
+signal IO_PAD310
+signal IO_PAD312
+signal IO_PAD313
+signal IO_PAD314
+signal IO_PAD315
+signal IO_PAD316
+signal IO_PAD318
+signal IO_PAD320
+signal IO_PAD322
+signal IO_PAD324
+signal IO_PAD326
+signal IO_PAD328
+signal IO_PAD329
+signal IO_PAD330
+signal IO_PAD331
+signal IO_PAD332
+signal IO_PAD333
+signal IO_PAD334
+signal IO_PAD336
+signal IO_PAD338
+signal IO_PAD339
+signal IO_PAD340
+signal IO_PAD341
+signal IO_PAD342
+signal IO_PAD344
+signal IO_PAD346
+signal IO_PAD348
+signal IO_PAD350
+signal IO_PAD351
+signal IO_PAD352
+signal IO_PAD354
+signal IO_PAD355
+signal IO_PAD356
+signal IO_PAD358
+signal IO_PAD360
+signal IO_PAD361
+signal IO_PAD362
+signal IO_PAD364
+signal IO_PAD365
+signal IO_PAD366
+signal IO_PAD368
+signal IO_PAD370
+signal IO_PAD371
+signal IO_PAD372
+signal IO_PAD374
+signal IO_PAD375
+signal IO_PAD376
+signal IO_PAD378
+signal IO_PAD380
+signal IO_PAD382
+signal IO_PAD384
+signal IO_PAD385
+signal IO_PAD386
+signal IO_PAD387
+signal IO_PAD388
+signal IO_PAD390
+signal IO_PAD392
+signal IO_PAD393
+signal IO_PAD394
+signal IO_PAD395
+signal IO_PAD396
+signal IO_PAD397
+signal IO_PAD398
+signal IO_PAD400
+signal IO_PAD402
+signal IO_PAD404
+signal IO_PAD406
+signal IO_PAD408
+signal IO_PAD410
+signal IO_PAD411
+signal IO_PAD412
+signal IO_PAD413
+signal IO_PAD414
+signal IO_PAD416
+signal IO_PAD418
+signal IO_PAD419
+signal IO_PAD420
+signal IO_PAD422
+signal IO_PAD423
+signal IO_PAD424
+signal IO_PAD426
+signal IO_PAD427
+signal IO_PAD428
+signal IO_PAD430
+signal IO_PAD432
+signal IO_PAD434
+signal IO_PAD436
+signal IO_PAD437
+signal IO_PAD438
+signal IO_PAD439
+signal IO_PAD440
+signal IO_PAD442
+signal IO_PAD444
+signal IO_PAD445
+signal IO_PAD446
+signal IO_PAD447
+signal IO_PAD448
+signal IO_PAD450
+signal IO_PAD451
+signal IO_PAD454
+signal IO_PAD455
+signal IO_PAD456
+signal IO_PAD461
+signal IO_PAD462
+signal IO_PAD463
+signal IO_PAD464
+signal IO_PAD465
+signal IO_PAD466
+signal IO_PAD467
+signal IO_PAD469
+signal IO_PAD470
+signal IO_PAD471
+signal IO_PAD472
+signal IO_PAD473
+signal IO_PAD475
+signal IO_PAD477
+signal IO_PAD479
+signal IO_PAD481
+signal IO_PAD482
+signal IO_PAD483
+signal IO_PAD485
+signal IO_PAD486
+signal IO_PAD487
+signal IO_PAD489
+signal IO_PAD490
+signal IO_PAD491
+signal IO_PAD493
+signal IO_PAD495
+signal IO_PAD496
+signal IO_PAD497
+signal IO_PAD498
+signal IO_PAD499
+signal IO_PAD501
+signal IO_PAD503
+signal IO_PAD505
+signal IO_PAD507
+signal IO_PAD508
+signal IO_PAD509
+signal IO_PAD511
+signal IO_PAD513
+signal IO_PAD514
+signal IO_PAD515
+signal IO_PAD516
+signal IO_PAD517
+signal IO_PAD518
+signal IO_PAD519
+signal IO_PAD520
+signal IO_PAD521
+signal IO_PAD522
+signal IO_PAD523
+signal IO_PAD524
+signal IO_PAD525
+signal IO_PAD527
+signal IO_PAD529
+signal IO_PAD531
+signal IO_PAD533
+signal IO_PAD535
+signal IO_PAD536
+signal IO_PAD537
+signal IO_PAD539
+signal IO_PAD541
+signal IO_PAD542
+signal IO_PAD544
+signal IO_PAD545
+signal IO_PAD547
+signal IO_PAD549
+signal IO_PAD550
+signal IO_PAD551
+signal IO_PAD553
+signal IO_PAD555
+signal IO_PAD557
+signal IO_PAD559
+signal IO_PAD561
+signal IO_PAD562
+signal IO_PAD563
+signal IO_PAD564
+signal IO_PAD565
+signal IO_PAD566
+signal IO_PAD567
+signal IO_PAD568
+signal IO_PAD569
+signal IO_PAD570
+signal IO_PAD571
+signal IO_PAD572
+signal IO_PAD573
+signal IO_PAD575
+signal IO_PAD577
+signal IO_PAD578
+signal IO_PAD579
+signal IO_PAD581
+signal IO_PAD583
+signal IO_PAD585
+signal IO_PAD587
+signal IO_PAD588
+signal IO_PAD589
+signal IO_PAD590
+signal IO_PAD591
+signal IO_PAD593
+signal IO_PAD595
+signal IO_PAD596
+signal IO_PAD597
+signal IO_PAD599
+signal IO_PAD600
+signal IO_PAD601
+signal IO_PAD603
+signal IO_PAD604
+signal IO_PAD605
+signal IO_PAD607
+signal IO_PAD609
+signal IO_PAD611
+signal IO_PAD613
+signal IO_PAD614
+signal IO_PAD615
+signal IO_PAD616
+signal IO_PAD617
+signal IO_PAD619
+signal IO_PAD620
+signal IO_PAD621
+signal IO_PAD622
+signal IO_PAD623
+signal IO_PAD624
+signal IO_PAD625
+signal IO_PAD630
+signal IO_PAD631
+signal IO_PAD633
+signal IO_PAD634
+signal IO_PAD635
+signal IO_PAD637
+signal IO_PAD638
+signal IO_PAD639
+signal IO_PAD640
+signal IO_PAD641
+signal IO_PAD643
+signal IO_PAD645
+signal IO_PAD646
+signal IO_PAD647
+signal IO_PAD648
+signal IO_PAD649
+signal IO_PAD651
+signal IO_PAD653
+signal IO_PAD655
+signal IO_PAD657
+signal IO_PAD658
+signal IO_PAD659
+signal IO_PAD661
+signal IO_PAD662
+signal IO_PAD663
+signal IO_PAD665
+signal IO_PAD666
+signal IO_PAD667
+signal IO_PAD669
+signal IO_PAD671
+signal IO_PAD672
+signal IO_PAD673
+signal IO_PAD674
+signal IO_PAD675
+signal IO_PAD677
+signal IO_PAD679
+signal IO_PAD681
+signal IO_PAD683
+signal IO_PAD685
+signal IO_PAD687
+signal IO_PAD688
+signal IO_PAD689
+signal IO_PAD690
+signal IO_PAD691
+signal IO_PAD692
+signal IO_PAD693
+signal IO_PAD695
+signal IO_PAD697
+signal IO_PAD698
+signal IO_PAD699
+signal IO_PAD700
+signal IO_PAD701
+signal IO_PAD703
+signal IO_PAD705
+signal IO_PAD707
+signal IO_PAD709
+signal IO_PAD710
+signal IO_PAD711
+signal IO_PAD713
+signal IO_PAD714
+signal IO_PAD715
+signal IO_PAD717
+signal IO_PAD719
+signal IO_PAD720
+
+register BSR 1559
+register BR 1
+register DIR 32
+
+instruction length 6
+
+instruction EXTEST 000000 BSR
+instruction SAMPLE/PRELOAD 000001 BSR
+instruction IDCODE 001001 DIR
+instruction BYPASS 111111 BR
+
+bit 1558 I 1 IO_PAD625
+bit 1557 O 1 IO_PAD625 1556 1 Z
+bit 1556 C 1 *
+bit 1555 I 1 IO_PAD624
+bit 1554 O 1 IO_PAD624 1553 1 Z
+bit 1553 C 1 *
+bit 1552 I 1 IO_PAD623
+bit 1551 O 1 IO_PAD623 1550 1 Z
+bit 1550 C 1 *
+bit 1549 I 1 IO_PAD622
+bit 1548 O 1 IO_PAD622 1547 1 Z
+bit 1547 C 1 *
+bit 1546 I 1 IO_PAD621
+bit 1545 O 1 IO_PAD621 1544 1 Z
+bit 1544 C 1 *
+bit 1543 I 1 IO_PAD620
+bit 1542 O 1 IO_PAD620 1541 1 Z
+bit 1541 C 1 *
+bit 1540 I 1 IO_PAD619
+bit 1539 O 1 IO_PAD619 1538 1 Z
+bit 1538 C 1 *
+bit 1537 I 1 IO_PAD617
+bit 1536 O 1 IO_PAD617 1535 1 Z
+bit 1535 C 1 *
+bit 1534 I 1 IO_PAD616
+bit 1533 O 1 IO_PAD616 1532 1 Z
+bit 1532 C 1 *
+bit 1531 I 1 IO_PAD615
+bit 1530 O 1 IO_PAD615 1529 1 Z
+bit 1529 C 1 *
+bit 1528 I 1 IO_PAD614
+bit 1527 O 1 IO_PAD614 1526 1 Z
+bit 1526 C 1 *
+bit 1525 I 1 IO_PAD613
+bit 1524 O 1 IO_PAD613 1523 1 Z
+bit 1523 C 1 *
+bit 1522 I 1 IO_PAD611
+bit 1521 O 1 IO_PAD611 1520 1 Z
+bit 1520 C 1 *
+bit 1519 I 1 IO_PAD609
+bit 1518 O 1 IO_PAD609 1517 1 Z
+bit 1517 C 1 *
+bit 1516 I 1 IO_PAD607
+bit 1515 O 1 IO_PAD607 1514 1 Z
+bit 1514 C 1 *
+bit 1513 I 1 IO_PAD605
+bit 1512 O 1 IO_PAD605 1511 1 Z
+bit 1511 C 1 *
+bit 1510 I 1 IO_PAD604
+bit 1509 O 1 IO_PAD604 1508 1 Z
+bit 1508 C 1 *
+bit 1507 I 1 IO_PAD603
+bit 1506 O 1 IO_PAD603 1505 1 Z
+bit 1505 C 1 *
+bit 1504 I 1 IO_PAD601
+bit 1503 O 1 IO_PAD601 1502 1 Z
+bit 1502 C 1 *
+bit 1501 I 1 IO_PAD600
+bit 1500 O 1 IO_PAD600 1499 1 Z
+bit 1499 C 1 *
+bit 1498 I 1 IO_PAD599
+bit 1497 O 1 IO_PAD599 1496 1 Z
+bit 1496 C 1 *
+bit 1495 I 1 IO_PAD597
+bit 1494 O 1 IO_PAD597 1493 1 Z
+bit 1493 C 1 *
+bit 1492 I 1 IO_PAD596
+bit 1491 O 1 IO_PAD596 1490 1 Z
+bit 1490 C 1 *
+bit 1489 I 1 IO_PAD595
+bit 1488 O 1 IO_PAD595 1487 1 Z
+bit 1487 C 1 *
+bit 1486 I 1 IO_PAD593
+bit 1485 O 1 IO_PAD593 1484 1 Z
+bit 1484 C 1 *
+bit 1483 I 1 IO_PAD591
+bit 1482 O 1 IO_PAD591 1481 1 Z
+bit 1481 C 1 *
+bit 1480 I 1 IO_PAD590
+bit 1479 O 1 IO_PAD590 1478 1 Z
+bit 1478 C 1 *
+bit 1477 I 1 IO_PAD589
+bit 1476 O 1 IO_PAD589 1475 1 Z
+bit 1475 C 1 *
+bit 1474 I 1 IO_PAD588
+bit 1473 O 1 IO_PAD588 1472 1 Z
+bit 1472 C 1 *
+bit 1471 I 1 IO_PAD587
+bit 1470 O 1 IO_PAD587 1469 1 Z
+bit 1469 C 1 *
+bit 1468 I 1 IO_PAD585
+bit 1467 O 1 IO_PAD585 1466 1 Z
+bit 1466 C 1 *
+bit 1465 I 1 IO_PAD583
+bit 1464 O 1 IO_PAD583 1463 1 Z
+bit 1463 C 1 *
+bit 1462 I 1 IO_PAD581
+bit 1461 O 1 IO_PAD581 1460 1 Z
+bit 1460 C 1 *
+bit 1459 I 1 IO_PAD579
+bit 1458 O 1 IO_PAD579 1457 1 Z
+bit 1457 C 1 *
+bit 1456 I 1 IO_PAD578
+bit 1455 O 1 IO_PAD578 1454 1 Z
+bit 1454 C 1 *
+bit 1453 I 1 IO_PAD577
+bit 1452 O 1 IO_PAD577 1451 1 Z
+bit 1451 C 1 *
+bit 1450 I 1 IO_PAD575
+bit 1449 O 1 IO_PAD575 1448 1 Z
+bit 1448 C 1 *
+bit 1447 I 1 IO_PAD573
+bit 1446 O 1 IO_PAD573 1445 1 Z
+bit 1445 C 1 *
+bit 1444 I 1 IO_PAD572
+bit 1443 O 1 IO_PAD572 1442 1 Z
+bit 1442 C 1 *
+bit 1441 I 1 IO_PAD571
+bit 1440 O 1 IO_PAD571 1439 1 Z
+bit 1439 C 1 *
+bit 1438 I 1 IO_PAD570
+bit 1437 O 1 IO_PAD570 1436 1 Z
+bit 1436 C 1 *
+bit 1435 I 1 IO_PAD569
+bit 1434 O 1 IO_PAD569 1433 1 Z
+bit 1433 C 1 *
+bit 1432 I 1 IO_PAD568
+bit 1431 O 1 IO_PAD568 1430 1 Z
+bit 1430 C 1 *
+bit 1429 I 1 IO_PAD567
+bit 1428 O 1 IO_PAD567 1427 1 Z
+bit 1427 C 1 *
+bit 1426 O 1 *
+bit 1425 O 1 *
+bit 1424 O 1 *
+bit 1423 O 1 *
+bit 1422 O 1 *
+bit 1421 O 1 *
+bit 1420 I 1 IO_PAD566
+bit 1419 O 1 IO_PAD566 1418 1 Z
+bit 1418 C 1 *
+bit 1417 I 1 IO_PAD565
+bit 1416 O 1 IO_PAD565 1415 1 Z
+bit 1415 C 1 *
+bit 1414 I 1 IO_PAD564
+bit 1413 O 1 IO_PAD564 1412 1 Z
+bit 1412 C 1 *
+bit 1411 I 1 IO_PAD563
+bit 1410 O 1 IO_PAD563 1409 1 Z
+bit 1409 C 1 *
+bit 1408 I 1 IO_PAD562
+bit 1407 O 1 IO_PAD562 1406 1 Z
+bit 1406 C 1 *
+bit 1405 I 1 IO_PAD561
+bit 1404 O 1 IO_PAD561 1403 1 Z
+bit 1403 C 1 *
+bit 1402 I 1 IO_PAD559
+bit 1401 O 1 IO_PAD559 1400 1 Z
+bit 1400 C 1 *
+bit 1399 I 1 IO_PAD557
+bit 1398 O 1 IO_PAD557 1397 1 Z
+bit 1397 C 1 *
+bit 1396 I 1 IO_PAD555
+bit 1395 O 1 IO_PAD555 1394 1 Z
+bit 1394 C 1 *
+bit 1393 I 1 IO_PAD553
+bit 1392 O 1 IO_PAD553 1391 1 Z
+bit 1391 C 1 *
+bit 1390 O 1 *
+bit 1389 O 1 *
+bit 1388 O 1 *
+bit 1387 O 1 *
+bit 1386 O 1 *
+bit 1385 O 1 *
+bit 1384 I 1 IO_PAD551
+bit 1383 O 1 IO_PAD551 1382 1 Z
+bit 1382 C 1 *
+bit 1381 I 1 IO_PAD550
+bit 1380 O 1 IO_PAD550 1379 1 Z
+bit 1379 C 1 *
+bit 1378 I 1 IO_PAD549
+bit 1377 O 1 IO_PAD549 1376 1 Z
+bit 1376 C 1 *
+bit 1375 I 1 IO_PAD547
+bit 1374 O 1 IO_PAD547 1373 1 Z
+bit 1373 C 1 *
+bit 1372 I 1 IO_PAD545
+bit 1371 O 1 IO_PAD545 1370 1 Z
+bit 1370 C 1 *
+bit 1369 I 1 IO_PAD544
+bit 1368 O 1 IO_PAD544 1367 1 Z
+bit 1367 C 1 *
+bit 1366 I 1 IO_PAD542
+bit 1365 O 1 IO_PAD542 1364 1 Z
+bit 1364 C 1 *
+bit 1363 I 1 IO_PAD541
+bit 1362 O 1 IO_PAD541 1361 1 Z
+bit 1361 C 1 *
+bit 1360 I 1 IO_PAD539
+bit 1359 O 1 IO_PAD539 1358 1 Z
+bit 1358 C 1 *
+bit 1357 I 1 IO_PAD537
+bit 1356 O 1 IO_PAD537 1355 1 Z
+bit 1355 C 1 *
+bit 1354 I 1 IO_PAD536
+bit 1353 O 1 IO_PAD536 1352 1 Z
+bit 1352 C 1 *
+bit 1351 I 1 IO_PAD535
+bit 1350 O 1 IO_PAD535 1349 1 Z
+bit 1349 C 1 *
+bit 1348 O 1 *
+bit 1347 O 1 *
+bit 1346 O 1 *
+bit 1345 O 1 *
+bit 1344 O 1 *
+bit 1343 O 1 *
+bit 1342 I 1 IO_PAD533
+bit 1341 O 1 IO_PAD533 1340 1 Z
+bit 1340 C 1 *
+bit 1339 I 1 IO_PAD531
+bit 1338 O 1 IO_PAD531 1337 1 Z
+bit 1337 C 1 *
+bit 1336 I 1 IO_PAD529
+bit 1335 O 1 IO_PAD529 1334 1 Z
+bit 1334 C 1 *
+bit 1333 I 1 IO_PAD527
+bit 1332 O 1 IO_PAD527 1331 1 Z
+bit 1331 C 1 *
+bit 1330 I 1 IO_PAD525
+bit 1329 O 1 IO_PAD525 1328 1 Z
+bit 1328 C 1 *
+bit 1327 I 1 IO_PAD524
+bit 1326 O 1 IO_PAD524 1325 1 Z
+bit 1325 C 1 *
+bit 1324 I 1 IO_PAD523
+bit 1323 O 1 IO_PAD523 1322 1 Z
+bit 1322 C 1 *
+bit 1321 I 1 IO_PAD522
+bit 1320 O 1 IO_PAD522 1319 1 Z
+bit 1319 C 1 *
+bit 1318 I 1 IO_PAD521
+bit 1317 O 1 IO_PAD521 1316 1 Z
+bit 1316 C 1 *
+bit 1315 I 1 IO_PAD520
+bit 1314 O 1 IO_PAD520 1313 1 Z
+bit 1313 C 1 *
+bit 1312 O 1 *
+bit 1311 O 1 *
+bit 1310 O 1 *
+bit 1309 O 1 *
+bit 1308 O 1 *
+bit 1307 O 1 *
+bit 1306 I 1 IO_PAD519
+bit 1305 O 1 IO_PAD519 1304 1 Z
+bit 1304 C 1 *
+bit 1303 I 1 IO_PAD518
+bit 1302 O 1 IO_PAD518 1301 1 Z
+bit 1301 C 1 *
+bit 1300 I 1 IO_PAD517
+bit 1299 O 1 IO_PAD517 1298 1 Z
+bit 1298 C 1 *
+bit 1297 I 1 IO_PAD516
+bit 1296 O 1 IO_PAD516 1295 1 Z
+bit 1295 C 1 *
+bit 1294 I 1 IO_PAD515
+bit 1293 O 1 IO_PAD515 1292 1 Z
+bit 1292 C 1 *
+bit 1291 I 1 IO_PAD514
+bit 1290 O 1 IO_PAD514 1289 1 Z
+bit 1289 C 1 *
+bit 1288 I 1 IO_PAD513
+bit 1287 O 1 IO_PAD513 1286 1 Z
+bit 1286 C 1 *
+bit 1285 I 1 IO_PAD511
+bit 1284 O 1 IO_PAD511 1283 1 Z
+bit 1283 C 1 *
+bit 1282 I 1 IO_PAD509
+bit 1281 O 1 IO_PAD509 1280 1 Z
+bit 1280 C 1 *
+bit 1279 I 1 IO_PAD508
+bit 1278 O 1 IO_PAD508 1277 1 Z
+bit 1277 C 1 *
+bit 1276 I 1 IO_PAD507
+bit 1275 O 1 IO_PAD507 1274 1 Z
+bit 1274 C 1 *
+bit 1273 I 1 IO_PAD505
+bit 1272 O 1 IO_PAD505 1271 1 Z
+bit 1271 C 1 *
+bit 1270 I 1 IO_PAD503
+bit 1269 O 1 IO_PAD503 1268 1 Z
+bit 1268 C 1 *
+bit 1267 I 1 IO_PAD501
+bit 1266 O 1 IO_PAD501 1265 1 Z
+bit 1265 C 1 *
+bit 1264 I 1 IO_PAD499
+bit 1263 O 1 IO_PAD499 1262 1 Z
+bit 1262 C 1 *
+bit 1261 I 1 IO_PAD498
+bit 1260 O 1 IO_PAD498 1259 1 Z
+bit 1259 C 1 *
+bit 1258 I 1 IO_PAD497
+bit 1257 O 1 IO_PAD497 1256 1 Z
+bit 1256 C 1 *
+bit 1255 I 1 IO_PAD496
+bit 1254 O 1 IO_PAD496 1253 1 Z
+bit 1253 C 1 *
+bit 1252 I 1 IO_PAD495
+bit 1251 O 1 IO_PAD495 1250 1 Z
+bit 1250 C 1 *
+bit 1249 I 1 IO_PAD493
+bit 1248 O 1 IO_PAD493 1247 1 Z
+bit 1247 C 1 *
+bit 1246 I 1 IO_PAD491
+bit 1245 O 1 IO_PAD491 1244 1 Z
+bit 1244 C 1 *
+bit 1243 I 1 IO_PAD490
+bit 1242 O 1 IO_PAD490 1241 1 Z
+bit 1241 C 1 *
+bit 1240 I 1 IO_PAD489
+bit 1239 O 1 IO_PAD489 1238 1 Z
+bit 1238 C 1 *
+bit 1237 I 1 IO_PAD487
+bit 1236 O 1 IO_PAD487 1235 1 Z
+bit 1235 C 1 *
+bit 1234 I 1 IO_PAD486
+bit 1233 O 1 IO_PAD486 1232 1 Z
+bit 1232 C 1 *
+bit 1231 I 1 IO_PAD485
+bit 1230 O 1 IO_PAD485 1229 1 Z
+bit 1229 C 1 *
+bit 1228 I 1 IO_PAD483
+bit 1227 O 1 IO_PAD483 1226 1 Z
+bit 1226 C 1 *
+bit 1225 I 1 IO_PAD482
+bit 1224 O 1 IO_PAD482 1223 1 Z
+bit 1223 C 1 *
+bit 1222 I 1 IO_PAD481
+bit 1221 O 1 IO_PAD481 1220 1 Z
+bit 1220 C 1 *
+bit 1219 I 1 IO_PAD479
+bit 1218 O 1 IO_PAD479 1217 1 Z
+bit 1217 C 1 *
+bit 1216 I 1 IO_PAD477
+bit 1215 O 1 IO_PAD477 1214 1 Z
+bit 1214 C 1 *
+bit 1213 I 1 IO_PAD475
+bit 1212 O 1 IO_PAD475 1211 1 Z
+bit 1211 C 1 *
+bit 1210 I 1 IO_PAD473
+bit 1209 O 1 IO_PAD473 1208 1 Z
+bit 1208 C 1 *
+bit 1207 I 1 IO_PAD472
+bit 1206 O 1 IO_PAD472 1205 1 Z
+bit 1205 C 1 *
+bit 1204 I 1 IO_PAD471
+bit 1203 O 1 IO_PAD471 1202 1 Z
+bit 1202 C 1 *
+bit 1201 I 1 IO_PAD470
+bit 1200 O 1 IO_PAD470 1199 1 Z
+bit 1199 C 1 *
+bit 1198 I 1 IO_PAD469
+bit 1197 O 1 IO_PAD469 1196 1 Z
+bit 1196 C 1 *
+bit 1195 I 1 IO_PAD467
+bit 1194 O 1 IO_PAD467 1193 1 Z
+bit 1193 C 1 *
+bit 1192 I 1 IO_PAD466
+bit 1191 O 1 IO_PAD466 1190 1 Z
+bit 1190 C 1 *
+bit 1189 I 1 IO_PAD465
+bit 1188 O 1 IO_PAD465 1187 1 Z
+bit 1187 C 1 *
+bit 1186 I 1 IO_PAD464
+bit 1185 O 1 IO_PAD464 1184 1 Z
+bit 1184 C 1 *
+bit 1183 I 1 IO_PAD463
+bit 1182 O 1 IO_PAD463 1181 1 Z
+bit 1181 C 1 *
+bit 1180 I 1 IO_PAD462
+bit 1179 O 1 IO_PAD462 1178 1 Z
+bit 1178 C 1 *
+bit 1177 I 1 IO_PAD461
+bit 1176 O 1 IO_PAD461 1175 1 Z
+bit 1175 C 1 *
+bit 1174 I 1 CCLK_PAD458
+bit 1173 O 1 CCLK_PAD458 1172 1 Z
+bit 1172 C 1 *
+bit 1171 I 1 DONE_PAD457
+bit 1170 O 1 DONE_PAD457 1169 1 Z
+bit 1169 C 1 *
+bit 1168 I 1 IO_PAD456
+bit 1167 O 1 IO_PAD456 1166 1 Z
+bit 1166 C 1 *
+bit 1165 I 1 IO_PAD455
+bit 1164 O 1 IO_PAD455 1163 1 Z
+bit 1163 C 1 *
+bit 1162 I 1 IO_PAD454
+bit 1161 O 1 IO_PAD454 1160 1 Z
+bit 1160 C 1 *
+bit 1159 I 1 IO_PAD451
+bit 1158 O 1 IO_PAD451 1157 1 Z
+bit 1157 C 1 *
+bit 1156 I 1 IO_PAD450
+bit 1155 O 1 IO_PAD450 1154 1 Z
+bit 1154 C 1 *
+bit 1153 I 1 IO_PAD448
+bit 1152 O 1 IO_PAD448 1151 1 Z
+bit 1151 C 1 *
+bit 1150 I 1 IO_PAD447
+bit 1149 O 1 IO_PAD447 1148 1 Z
+bit 1148 C 1 *
+bit 1147 I 1 IO_PAD446
+bit 1146 O 1 IO_PAD446 1145 1 Z
+bit 1145 C 1 *
+bit 1144 I 1 IO_PAD445
+bit 1143 O 1 IO_PAD445 1142 1 Z
+bit 1142 C 1 *
+bit 1141 I 1 IO_PAD444
+bit 1140 O 1 IO_PAD444 1139 1 Z
+bit 1139 C 1 *
+bit 1138 I 1 IO_PAD442
+bit 1137 O 1 IO_PAD442 1136 1 Z
+bit 1136 C 1 *
+bit 1135 I 1 IO_PAD440
+bit 1134 O 1 IO_PAD440 1133 1 Z
+bit 1133 C 1 *
+bit 1132 I 1 IO_PAD439
+bit 1131 O 1 IO_PAD439 1130 1 Z
+bit 1130 C 1 *
+bit 1129 I 1 IO_PAD438
+bit 1128 O 1 IO_PAD438 1127 1 Z
+bit 1127 C 1 *
+bit 1126 I 1 IO_PAD437
+bit 1125 O 1 IO_PAD437 1124 1 Z
+bit 1124 C 1 *
+bit 1123 I 1 IO_PAD436
+bit 1122 O 1 IO_PAD436 1121 1 Z
+bit 1121 C 1 *
+bit 1120 I 1 IO_PAD434
+bit 1119 O 1 IO_PAD434 1118 1 Z
+bit 1118 C 1 *
+bit 1117 I 1 IO_PAD432
+bit 1116 O 1 IO_PAD432 1115 1 Z
+bit 1115 C 1 *
+bit 1114 I 1 IO_PAD430
+bit 1113 O 1 IO_PAD430 1112 1 Z
+bit 1112 C 1 *
+bit 1111 I 1 IO_PAD428
+bit 1110 O 1 IO_PAD428 1109 1 Z
+bit 1109 C 1 *
+bit 1108 I 1 IO_PAD427
+bit 1107 O 1 IO_PAD427 1106 1 Z
+bit 1106 C 1 *
+bit 1105 I 1 IO_PAD426
+bit 1104 O 1 IO_PAD426 1103 1 Z
+bit 1103 C 1 *
+bit 1102 I 1 IO_PAD424
+bit 1101 O 1 IO_PAD424 1100 1 Z
+bit 1100 C 1 *
+bit 1099 I 1 IO_PAD423
+bit 1098 O 1 IO_PAD423 1097 1 Z
+bit 1097 C 1 *
+bit 1096 I 1 IO_PAD422
+bit 1095 O 1 IO_PAD422 1094 1 Z
+bit 1094 C 1 *
+bit 1093 I 1 IO_PAD420
+bit 1092 O 1 IO_PAD420 1091 1 Z
+bit 1091 C 1 *
+bit 1090 I 1 IO_PAD419
+bit 1089 O 1 IO_PAD419 1088 1 Z
+bit 1088 C 1 *
+bit 1087 I 1 IO_PAD418
+bit 1086 O 1 IO_PAD418 1085 1 Z
+bit 1085 C 1 *
+bit 1084 I 1 IO_PAD416
+bit 1083 O 1 IO_PAD416 1082 1 Z
+bit 1082 C 1 *
+bit 1081 I 1 IO_PAD414
+bit 1080 O 1 IO_PAD414 1079 1 Z
+bit 1079 C 1 *
+bit 1078 I 1 IO_PAD413
+bit 1077 O 1 IO_PAD413 1076 1 Z
+bit 1076 C 1 *
+bit 1075 I 1 IO_PAD412
+bit 1074 O 1 IO_PAD412 1073 1 Z
+bit 1073 C 1 *
+bit 1072 I 1 IO_PAD411
+bit 1071 O 1 IO_PAD411 1070 1 Z
+bit 1070 C 1 *
+bit 1069 I 1 IO_PAD410
+bit 1068 O 1 IO_PAD410 1067 1 Z
+bit 1067 C 1 *
+bit 1066 I 1 IO_PAD408
+bit 1065 O 1 IO_PAD408 1064 1 Z
+bit 1064 C 1 *
+bit 1063 I 1 IO_PAD406
+bit 1062 O 1 IO_PAD406 1061 1 Z
+bit 1061 C 1 *
+bit 1060 I 1 IO_PAD404
+bit 1059 O 1 IO_PAD404 1058 1 Z
+bit 1058 C 1 *
+bit 1057 I 1 IO_PAD402
+bit 1056 O 1 IO_PAD402 1055 1 Z
+bit 1055 C 1 *
+bit 1054 I 1 IO_PAD400
+bit 1053 O 1 IO_PAD400 1052 1 Z
+bit 1052 C 1 *
+bit 1051 I 1 IO_PAD398
+bit 1050 O 1 IO_PAD398 1049 1 Z
+bit 1049 C 1 *
+bit 1048 I 1 IO_PAD397
+bit 1047 O 1 IO_PAD397 1046 1 Z
+bit 1046 C 1 *
+bit 1045 I 1 IO_PAD396
+bit 1044 O 1 IO_PAD396 1043 1 Z
+bit 1043 C 1 *
+bit 1042 I 1 IO_PAD395
+bit 1041 O 1 IO_PAD395 1040 1 Z
+bit 1040 C 1 *
+bit 1039 I 1 IO_PAD394
+bit 1038 O 1 IO_PAD394 1037 1 Z
+bit 1037 C 1 *
+bit 1036 I 1 IO_PAD393
+bit 1035 O 1 IO_PAD393 1034 1 Z
+bit 1034 C 1 *
+bit 1033 I 1 IO_PAD392
+bit 1032 O 1 IO_PAD392 1031 1 Z
+bit 1031 C 1 *
+bit 1030 I 1 IO_PAD390
+bit 1029 O 1 IO_PAD390 1028 1 Z
+bit 1028 C 1 *
+bit 1027 I 1 IO_PAD388
+bit 1026 O 1 IO_PAD388 1025 1 Z
+bit 1025 C 1 *
+bit 1024 I 1 IO_PAD387
+bit 1023 O 1 IO_PAD387 1022 1 Z
+bit 1022 C 1 *
+bit 1021 I 1 IO_PAD386
+bit 1020 O 1 IO_PAD386 1019 1 Z
+bit 1019 C 1 *
+bit 1018 I 1 IO_PAD385
+bit 1017 O 1 IO_PAD385 1016 1 Z
+bit 1016 C 1 *
+bit 1015 I 1 IO_PAD384
+bit 1014 O 1 IO_PAD384 1013 1 Z
+bit 1013 C 1 *
+bit 1012 I 1 IO_PAD382
+bit 1011 O 1 IO_PAD382 1010 1 Z
+bit 1010 C 1 *
+bit 1009 I 1 IO_PAD380
+bit 1008 O 1 IO_PAD380 1007 1 Z
+bit 1007 C 1 *
+bit 1006 I 1 IO_PAD378
+bit 1005 O 1 IO_PAD378 1004 1 Z
+bit 1004 C 1 *
+bit 1003 I 1 IO_PAD376
+bit 1002 O 1 IO_PAD376 1001 1 Z
+bit 1001 C 1 *
+bit 1000 I 1 IO_PAD375
+bit 999 O 1 IO_PAD375 998 1 Z
+bit 998 C 1 *
+bit 997 I 1 IO_PAD374
+bit 996 O 1 IO_PAD374 995 1 Z
+bit 995 C 1 *
+bit 994 I 1 IO_PAD372
+bit 993 O 1 IO_PAD372 992 1 Z
+bit 992 C 1 *
+bit 991 I 1 IO_PAD371
+bit 990 O 1 IO_PAD371 989 1 Z
+bit 989 C 1 *
+bit 988 I 1 IO_PAD370
+bit 987 O 1 IO_PAD370 986 1 Z
+bit 986 C 1 *
+bit 985 I 1 IO_PAD368
+bit 984 O 1 IO_PAD368 983 1 Z
+bit 983 C 1 *
+bit 982 I 1 IO_PAD366
+bit 981 O 1 IO_PAD366 980 1 Z
+bit 980 C 1 *
+bit 979 I 1 IO_PAD365
+bit 978 O 1 IO_PAD365 977 1 Z
+bit 977 C 1 *
+bit 976 I 1 IO_PAD364
+bit 975 O 1 IO_PAD364 974 1 Z
+bit 974 C 1 *
+bit 973 I 1 IO_PAD362
+bit 972 O 1 IO_PAD362 971 1 Z
+bit 971 C 1 *
+bit 970 I 1 IO_PAD361
+bit 969 O 1 IO_PAD361 968 1 Z
+bit 968 C 1 *
+bit 967 I 1 IO_PAD360
+bit 966 O 1 IO_PAD360 965 1 Z
+bit 965 C 1 *
+bit 964 I 1 IO_PAD358
+bit 963 O 1 IO_PAD358 962 1 Z
+bit 962 C 1 *
+bit 961 I 1 IO_PAD356
+bit 960 O 1 IO_PAD356 959 1 Z
+bit 959 C 1 *
+bit 958 I 1 IO_PAD355
+bit 957 O 1 IO_PAD355 956 1 Z
+bit 956 C 1 *
+bit 955 I 1 IO_PAD354
+bit 954 O 1 IO_PAD354 953 1 Z
+bit 953 C 1 *
+bit 952 I 1 IO_PAD352
+bit 951 O 1 IO_PAD352 950 1 Z
+bit 950 C 1 *
+bit 949 I 1 IO_PAD351
+bit 948 O 1 IO_PAD351 947 1 Z
+bit 947 C 1 *
+bit 946 I 1 IO_PAD350
+bit 945 O 1 IO_PAD350 944 1 Z
+bit 944 C 1 *
+bit 943 I 1 IO_PAD348
+bit 942 O 1 IO_PAD348 941 1 Z
+bit 941 C 1 *
+bit 940 I 1 IO_PAD346
+bit 939 O 1 IO_PAD346 938 1 Z
+bit 938 C 1 *
+bit 937 I 1 IO_PAD344
+bit 936 O 1 IO_PAD344 935 1 Z
+bit 935 C 1 *
+bit 934 I 1 IO_PAD342
+bit 933 O 1 IO_PAD342 932 1 Z
+bit 932 C 1 *
+bit 931 I 1 IO_PAD341
+bit 930 O 1 IO_PAD341 929 1 Z
+bit 929 C 1 *
+bit 928 I 1 IO_PAD340
+bit 927 O 1 IO_PAD340 926 1 Z
+bit 926 C 1 *
+bit 925 I 1 IO_PAD339
+bit 924 O 1 IO_PAD339 923 1 Z
+bit 923 C 1 *
+bit 922 I 1 IO_PAD338
+bit 921 O 1 IO_PAD338 920 1 Z
+bit 920 C 1 *
+bit 919 I 1 IO_PAD336
+bit 918 O 1 IO_PAD336 917 1 Z
+bit 917 C 1 *
+bit 916 I 1 IO_PAD334
+bit 915 O 1 IO_PAD334 914 1 Z
+bit 914 C 1 *
+bit 913 I 1 IO_PAD333
+bit 912 O 1 IO_PAD333 911 1 Z
+bit 911 C 1 *
+bit 910 I 1 IO_PAD332
+bit 909 O 1 IO_PAD332 908 1 Z
+bit 908 C 1 *
+bit 907 I 1 IO_PAD331
+bit 906 O 1 IO_PAD331 905 1 Z
+bit 905 C 1 *
+bit 904 I 1 IO_PAD330
+bit 903 O 1 IO_PAD330 902 1 Z
+bit 902 C 1 *
+bit 901 I 1 IO_PAD329
+bit 900 O 1 IO_PAD329 899 1 Z
+bit 899 C 1 *
+bit 898 I 1 IO_PAD328
+bit 897 O 1 IO_PAD328 896 1 Z
+bit 896 C 1 *
+bit 895 I 1 IO_PAD326
+bit 894 O 1 IO_PAD326 893 1 Z
+bit 893 C 1 *
+bit 892 I 1 IO_PAD324
+bit 891 O 1 IO_PAD324 890 1 Z
+bit 890 C 1 *
+bit 889 I 1 IO_PAD322
+bit 888 O 1 IO_PAD322 887 1 Z
+bit 887 C 1 *
+bit 886 I 1 IO_PAD320
+bit 885 O 1 IO_PAD320 884 1 Z
+bit 884 C 1 *
+bit 883 I 1 IO_PAD318
+bit 882 O 1 IO_PAD318 881 1 Z
+bit 881 C 1 *
+bit 880 I 1 IO_PAD316
+bit 879 O 1 IO_PAD316 878 1 Z
+bit 878 C 1 *
+bit 877 I 1 IO_PAD315
+bit 876 O 1 IO_PAD315 875 1 Z
+bit 875 C 1 *
+bit 874 I 1 IO_PAD314
+bit 873 O 1 IO_PAD314 872 1 Z
+bit 872 C 1 *
+bit 871 I 1 IO_PAD313
+bit 870 O 1 IO_PAD313 869 1 Z
+bit 869 C 1 *
+bit 868 I 1 IO_PAD312
+bit 867 O 1 IO_PAD312 866 1 Z
+bit 866 C 1 *
+bit 865 I 1 IO_PAD310
+bit 864 O 1 IO_PAD310 863 1 Z
+bit 863 C 1 *
+bit 862 I 1 IO_PAD308
+bit 861 O 1 IO_PAD308 860 1 Z
+bit 860 C 1 *
+bit 859 I 1 IO_PAD307
+bit 858 O 1 IO_PAD307 857 1 Z
+bit 857 C 1 *
+bit 856 I 1 IO_PAD306
+bit 855 O 1 IO_PAD306 854 1 Z
+bit 854 C 1 *
+bit 853 I 1 IO_PAD304
+bit 852 O 1 IO_PAD304 851 1 Z
+bit 851 C 1 *
+bit 850 I 1 IO_PAD303
+bit 849 O 1 IO_PAD303 848 1 Z
+bit 848 C 1 *
+bit 847 I 1 IO_PAD302
+bit 846 O 1 IO_PAD302 845 1 Z
+bit 845 C 1 *
+bit 844 I 1 IO_PAD300
+bit 843 O 1 IO_PAD300 842 1 Z
+bit 842 C 1 *
+bit 841 I 1 IO_PAD299
+bit 840 O 1 IO_PAD299 839 1 Z
+bit 839 C 1 *
+bit 838 I 1 IO_PAD298
+bit 837 O 1 IO_PAD298 836 1 Z
+bit 836 C 1 *
+bit 835 I 1 IO_PAD296
+bit 834 O 1 IO_PAD296 833 1 Z
+bit 833 C 1 *
+bit 832 I 1 IO_PAD294
+bit 831 O 1 IO_PAD294 830 1 Z
+bit 830 C 1 *
+bit 829 I 1 IO_PAD292
+bit 828 O 1 IO_PAD292 827 1 Z
+bit 827 C 1 *
+bit 826 I 1 IO_PAD290
+bit 825 O 1 IO_PAD290 824 1 Z
+bit 824 C 1 *
+bit 823 I 1 IO_PAD289
+bit 822 O 1 IO_PAD289 821 1 Z
+bit 821 C 1 *
+bit 820 I 1 IO_PAD288
+bit 819 O 1 IO_PAD288 818 1 Z
+bit 818 C 1 *
+bit 817 I 1 IO_PAD287
+bit 816 O 1 IO_PAD287 815 1 Z
+bit 815 C 1 *
+bit 814 I 1 IO_PAD286
+bit 813 O 1 IO_PAD286 812 1 Z
+bit 812 C 1 *
+bit 811 I 1 IO_PAD284
+bit 810 O 1 IO_PAD284 809 1 Z
+bit 809 C 1 *
+bit 808 I 1 IO_PAD282
+bit 807 O 1 IO_PAD282 806 1 Z
+bit 806 C 1 *
+bit 805 I 1 IO_PAD281
+bit 804 O 1 IO_PAD281 803 1 Z
+bit 803 C 1 *
+bit 802 I 1 IO_PAD280
+bit 801 O 1 IO_PAD280 800 1 Z
+bit 800 C 1 *
+bit 799 I 1 IO_PAD279
+bit 798 O 1 IO_PAD279 797 1 Z
+bit 797 C 1 *
+bit 796 I 1 IO_PAD278
+bit 795 O 1 IO_PAD278 794 1 Z
+bit 794 C 1 *
+bit 793 I 1 IO_PAD276
+bit 792 O 1 IO_PAD276 791 1 Z
+bit 791 C 1 *
+bit 790 I 1 IO_PAD275
+bit 789 O 1 IO_PAD275 788 1 Z
+bit 788 C 1 *
+bit 787 I 1 IO_PAD274
+bit 786 O 1 IO_PAD274 785 1 Z
+bit 785 C 1 *
+bit 784 I 1 IO_PAD270
+bit 783 O 1 IO_PAD270 782 1 Z
+bit 782 C 1 *
+bit 781 I 1 IO_PAD269
+bit 780 O 1 IO_PAD269 779 1 Z
+bit 779 C 1 *
+bit 778 I 1 M2_PAD268
+bit 777 I 1 M0_PAD267
+bit 776 I 1 M1_PAD266
+bit 775 I 1 IO_PAD264
+bit 774 O 1 IO_PAD264 773 1 Z
+bit 773 C 1 *
+bit 772 I 1 IO_PAD263
+bit 771 O 1 IO_PAD263 770 1 Z
+bit 770 C 1 *
+bit 769 I 1 IO_PAD262
+bit 768 O 1 IO_PAD262 767 1 Z
+bit 767 C 1 *
+bit 766 I 1 IO_PAD261
+bit 765 O 1 IO_PAD261 764 1 Z
+bit 764 C 1 *
+bit 763 I 1 IO_PAD260
+bit 762 O 1 IO_PAD260 761 1 Z
+bit 761 C 1 *
+bit 760 I 1 IO_PAD259
+bit 759 O 1 IO_PAD259 758 1 Z
+bit 758 C 1 *
+bit 757 I 1 IO_PAD258
+bit 756 O 1 IO_PAD258 755 1 Z
+bit 755 C 1 *
+bit 754 I 1 IO_PAD256
+bit 753 O 1 IO_PAD256 752 1 Z
+bit 752 C 1 *
+bit 751 I 1 IO_PAD255
+bit 750 O 1 IO_PAD255 749 1 Z
+bit 749 C 1 *
+bit 748 I 1 IO_PAD254
+bit 747 O 1 IO_PAD254 746 1 Z
+bit 746 C 1 *
+bit 745 I 1 IO_PAD253
+bit 744 O 1 IO_PAD253 743 1 Z
+bit 743 C 1 *
+bit 742 I 1 IO_PAD252
+bit 741 O 1 IO_PAD252 740 1 Z
+bit 740 C 1 *
+bit 739 I 1 IO_PAD250
+bit 738 O 1 IO_PAD250 737 1 Z
+bit 737 C 1 *
+bit 736 I 1 IO_PAD248
+bit 735 O 1 IO_PAD248 734 1 Z
+bit 734 C 1 *
+bit 733 I 1 IO_PAD246
+bit 732 O 1 IO_PAD246 731 1 Z
+bit 731 C 1 *
+bit 730 I 1 IO_PAD244
+bit 729 O 1 IO_PAD244 728 1 Z
+bit 728 C 1 *
+bit 727 I 1 IO_PAD243
+bit 726 O 1 IO_PAD243 725 1 Z
+bit 725 C 1 *
+bit 724 I 1 IO_PAD242
+bit 723 O 1 IO_PAD242 722 1 Z
+bit 722 C 1 *
+bit 721 I 1 IO_PAD240
+bit 720 O 1 IO_PAD240 719 1 Z
+bit 719 C 1 *
+bit 718 I 1 IO_PAD239
+bit 717 O 1 IO_PAD239 716 1 Z
+bit 716 C 1 *
+bit 715 I 1 IO_PAD238
+bit 714 O 1 IO_PAD238 713 1 Z
+bit 713 C 1 *
+bit 712 I 1 IO_PAD236
+bit 711 O 1 IO_PAD236 710 1 Z
+bit 710 C 1 *
+bit 709 I 1 IO_PAD235
+bit 708 O 1 IO_PAD235 707 1 Z
+bit 707 C 1 *
+bit 706 I 1 IO_PAD234
+bit 705 O 1 IO_PAD234 704 1 Z
+bit 704 C 1 *
+bit 703 I 1 IO_PAD232
+bit 702 O 1 IO_PAD232 701 1 Z
+bit 701 C 1 *
+bit 700 I 1 IO_PAD230
+bit 699 O 1 IO_PAD230 698 1 Z
+bit 698 C 1 *
+bit 697 I 1 IO_PAD229
+bit 696 O 1 IO_PAD229 695 1 Z
+bit 695 C 1 *
+bit 694 I 1 IO_PAD228
+bit 693 O 1 IO_PAD228 692 1 Z
+bit 692 C 1 *
+bit 691 I 1 IO_PAD227
+bit 690 O 1 IO_PAD227 689 1 Z
+bit 689 C 1 *
+bit 688 I 1 IO_PAD226
+bit 687 O 1 IO_PAD226 686 1 Z
+bit 686 C 1 *
+bit 685 I 1 IO_PAD224
+bit 684 O 1 IO_PAD224 683 1 Z
+bit 683 C 1 *
+bit 682 I 1 IO_PAD222
+bit 681 O 1 IO_PAD222 680 1 Z
+bit 680 C 1 *
+bit 679 I 1 IO_PAD220
+bit 678 O 1 IO_PAD220 677 1 Z
+bit 677 C 1 *
+bit 676 I 1 IO_PAD218
+bit 675 O 1 IO_PAD218 674 1 Z
+bit 674 C 1 *
+bit 673 I 1 IO_PAD217
+bit 672 O 1 IO_PAD217 671 1 Z
+bit 671 C 1 *
+bit 670 I 1 IO_PAD216
+bit 669 O 1 IO_PAD216 668 1 Z
+bit 668 C 1 *
+bit 667 I 1 IO_PAD214
+bit 666 O 1 IO_PAD214 665 1 Z
+bit 665 C 1 *
+bit 664 I 1 IO_PAD212
+bit 663 O 1 IO_PAD212 662 1 Z
+bit 662 C 1 *
+bit 661 I 1 IO_PAD211
+bit 660 O 1 IO_PAD211 659 1 Z
+bit 659 C 1 *
+bit 658 I 1 IO_PAD210
+bit 657 O 1 IO_PAD210 656 1 Z
+bit 656 C 1 *
+bit 655 I 1 IO_PAD209
+bit 654 O 1 IO_PAD209 653 1 Z
+bit 653 C 1 *
+bit 652 I 1 IO_PAD208
+bit 651 O 1 IO_PAD208 650 1 Z
+bit 650 C 1 *
+bit 649 I 1 IO_PAD207
+bit 648 O 1 IO_PAD207 647 1 Z
+bit 647 C 1 *
+bit 646 I 1 IO_PAD206
+bit 645 O 1 IO_PAD206 644 1 Z
+bit 644 C 1 *
+bit 643 O 1 *
+bit 642 O 1 *
+bit 641 O 1 *
+bit 640 O 1 *
+bit 639 O 1 *
+bit 638 O 1 *
+bit 637 I 1 IO_PAD205
+bit 636 O 1 IO_PAD205 635 1 Z
+bit 635 C 1 *
+bit 634 I 1 IO_PAD204
+bit 633 O 1 IO_PAD204 632 1 Z
+bit 632 C 1 *
+bit 631 I 1 IO_PAD203
+bit 630 O 1 IO_PAD203 629 1 Z
+bit 629 C 1 *
+bit 628 I 1 IO_PAD202
+bit 627 O 1 IO_PAD202 626 1 Z
+bit 626 C 1 *
+bit 625 I 1 IO_PAD201
+bit 624 O 1 IO_PAD201 623 1 Z
+bit 623 C 1 *
+bit 622 I 1 IO_PAD200
+bit 621 O 1 IO_PAD200 620 1 Z
+bit 620 C 1 *
+bit 619 I 1 IO_PAD198
+bit 618 O 1 IO_PAD198 617 1 Z
+bit 617 C 1 *
+bit 616 I 1 IO_PAD196
+bit 615 O 1 IO_PAD196 614 1 Z
+bit 614 C 1 *
+bit 613 I 1 IO_PAD194
+bit 612 O 1 IO_PAD194 611 1 Z
+bit 611 C 1 *
+bit 610 I 1 IO_PAD192
+bit 609 O 1 IO_PAD192 608 1 Z
+bit 608 C 1 *
+bit 607 O 1 *
+bit 606 O 1 *
+bit 605 O 1 *
+bit 604 O 1 *
+bit 603 O 1 *
+bit 602 O 1 *
+bit 601 I 1 IO_PAD190
+bit 600 O 1 IO_PAD190 599 1 Z
+bit 599 C 1 *
+bit 598 I 1 IO_PAD189
+bit 597 O 1 IO_PAD189 596 1 Z
+bit 596 C 1 *
+bit 595 I 1 IO_PAD188
+bit 594 O 1 IO_PAD188 593 1 Z
+bit 593 C 1 *
+bit 592 I 1 IO_PAD186
+bit 591 O 1 IO_PAD186 590 1 Z
+bit 590 C 1 *
+bit 589 I 1 IO_PAD184
+bit 588 O 1 IO_PAD184 587 1 Z
+bit 587 C 1 *
+bit 586 I 1 IO_PAD183
+bit 585 O 1 IO_PAD183 584 1 Z
+bit 584 C 1 *
+bit 583 I 1 IO_PAD181
+bit 582 O 1 IO_PAD181 581 1 Z
+bit 581 C 1 *
+bit 580 I 1 IO_PAD180
+bit 579 O 1 IO_PAD180 578 1 Z
+bit 578 C 1 *
+bit 577 I 1 IO_PAD178
+bit 576 O 1 IO_PAD178 575 1 Z
+bit 575 C 1 *
+bit 574 I 1 IO_PAD176
+bit 573 O 1 IO_PAD176 572 1 Z
+bit 572 C 1 *
+bit 571 I 1 IO_PAD175
+bit 570 O 1 IO_PAD175 569 1 Z
+bit 569 C 1 *
+bit 568 I 1 IO_PAD174
+bit 567 O 1 IO_PAD174 566 1 Z
+bit 566 C 1 *
+bit 565 O 1 *
+bit 564 O 1 *
+bit 563 O 1 *
+bit 562 O 1 *
+bit 561 O 1 *
+bit 560 O 1 *
+bit 559 I 1 IO_PAD172
+bit 558 O 1 IO_PAD172 557 1 Z
+bit 557 C 1 *
+bit 556 I 1 IO_PAD170
+bit 555 O 1 IO_PAD170 554 1 Z
+bit 554 C 1 *
+bit 553 I 1 IO_PAD168
+bit 552 O 1 IO_PAD168 551 1 Z
+bit 551 C 1 *
+bit 550 I 1 IO_PAD166
+bit 549 O 1 IO_PAD166 548 1 Z
+bit 548 C 1 *
+bit 547 I 1 IO_PAD164
+bit 546 O 1 IO_PAD164 545 1 Z
+bit 545 C 1 *
+bit 544 I 1 IO_PAD163
+bit 543 O 1 IO_PAD163 542 1 Z
+bit 542 C 1 *
+bit 541 I 1 IO_PAD162
+bit 540 O 1 IO_PAD162 539 1 Z
+bit 539 C 1 *
+bit 538 I 1 IO_PAD161
+bit 537 O 1 IO_PAD161 536 1 Z
+bit 536 C 1 *
+bit 535 I 1 IO_PAD160
+bit 534 O 1 IO_PAD160 533 1 Z
+bit 533 C 1 *
+bit 532 I 1 IO_PAD159
+bit 531 O 1 IO_PAD159 530 1 Z
+bit 530 C 1 *
+bit 529 O 1 *
+bit 528 O 1 *
+bit 527 O 1 *
+bit 526 O 1 *
+bit 525 O 1 *
+bit 524 O 1 *
+bit 523 I 1 IO_PAD158
+bit 522 O 1 IO_PAD158 521 1 Z
+bit 521 C 1 *
+bit 520 I 1 IO_PAD157
+bit 519 O 1 IO_PAD157 518 1 Z
+bit 518 C 1 *
+bit 517 I 1 IO_PAD156
+bit 516 O 1 IO_PAD156 515 1 Z
+bit 515 C 1 *
+bit 514 I 1 IO_PAD155
+bit 513 O 1 IO_PAD155 512 1 Z
+bit 512 C 1 *
+bit 511 I 1 IO_PAD154
+bit 510 O 1 IO_PAD154 509 1 Z
+bit 509 C 1 *
+bit 508 I 1 IO_PAD153
+bit 507 O 1 IO_PAD153 506 1 Z
+bit 506 C 1 *
+bit 505 I 1 IO_PAD152
+bit 504 O 1 IO_PAD152 503 1 Z
+bit 503 C 1 *
+bit 502 I 1 IO_PAD150
+bit 501 O 1 IO_PAD150 500 1 Z
+bit 500 C 1 *
+bit 499 I 1 IO_PAD148
+bit 498 O 1 IO_PAD148 497 1 Z
+bit 497 C 1 *
+bit 496 I 1 IO_PAD147
+bit 495 O 1 IO_PAD147 494 1 Z
+bit 494 C 1 *
+bit 493 I 1 IO_PAD146
+bit 492 O 1 IO_PAD146 491 1 Z
+bit 491 C 1 *
+bit 490 I 1 IO_PAD144
+bit 489 O 1 IO_PAD144 488 1 Z
+bit 488 C 1 *
+bit 487 I 1 IO_PAD142
+bit 486 O 1 IO_PAD142 485 1 Z
+bit 485 C 1 *
+bit 484 I 1 IO_PAD140
+bit 483 O 1 IO_PAD140 482 1 Z
+bit 482 C 1 *
+bit 481 I 1 IO_PAD138
+bit 480 O 1 IO_PAD138 479 1 Z
+bit 479 C 1 *
+bit 478 I 1 IO_PAD137
+bit 477 O 1 IO_PAD137 476 1 Z
+bit 476 C 1 *
+bit 475 I 1 IO_PAD136
+bit 474 O 1 IO_PAD136 473 1 Z
+bit 473 C 1 *
+bit 472 I 1 IO_PAD135
+bit 471 O 1 IO_PAD135 470 1 Z
+bit 470 C 1 *
+bit 469 I 1 IO_PAD134
+bit 468 O 1 IO_PAD134 467 1 Z
+bit 467 C 1 *
+bit 466 I 1 IO_PAD132
+bit 465 O 1 IO_PAD132 464 1 Z
+bit 464 C 1 *
+bit 463 I 1 IO_PAD130
+bit 462 O 1 IO_PAD130 461 1 Z
+bit 461 C 1 *
+bit 460 I 1 IO_PAD129
+bit 459 O 1 IO_PAD129 458 1 Z
+bit 458 C 1 *
+bit 457 I 1 IO_PAD128
+bit 456 O 1 IO_PAD128 455 1 Z
+bit 455 C 1 *
+bit 454 I 1 IO_PAD126
+bit 453 O 1 IO_PAD126 452 1 Z
+bit 452 C 1 *
+bit 451 I 1 IO_PAD125
+bit 450 O 1 IO_PAD125 449 1 Z
+bit 449 C 1 *
+bit 448 I 1 IO_PAD124
+bit 447 O 1 IO_PAD124 446 1 Z
+bit 446 C 1 *
+bit 445 I 1 IO_PAD122
+bit 444 O 1 IO_PAD122 443 1 Z
+bit 443 C 1 *
+bit 442 I 1 IO_PAD121
+bit 441 O 1 IO_PAD121 440 1 Z
+bit 440 C 1 *
+bit 439 I 1 IO_PAD120
+bit 438 O 1 IO_PAD120 437 1 Z
+bit 437 C 1 *
+bit 436 I 1 IO_PAD118
+bit 435 O 1 IO_PAD118 434 1 Z
+bit 434 C 1 *
+bit 433 I 1 IO_PAD116
+bit 432 O 1 IO_PAD116 431 1 Z
+bit 431 C 1 *
+bit 430 I 1 IO_PAD114
+bit 429 O 1 IO_PAD114 428 1 Z
+bit 428 C 1 *
+bit 427 I 1 IO_PAD112
+bit 426 O 1 IO_PAD112 425 1 Z
+bit 425 C 1 *
+bit 424 I 1 IO_PAD111
+bit 423 O 1 IO_PAD111 422 1 Z
+bit 422 C 1 *
+bit 421 I 1 IO_PAD110
+bit 420 O 1 IO_PAD110 419 1 Z
+bit 419 C 1 *
+bit 418 I 1 IO_PAD109
+bit 417 O 1 IO_PAD109 416 1 Z
+bit 416 C 1 *
+bit 415 I 1 IO_PAD108
+bit 414 O 1 IO_PAD108 413 1 Z
+bit 413 C 1 *
+bit 412 I 1 IO_PAD106
+bit 411 O 1 IO_PAD106 410 1 Z
+bit 410 C 1 *
+bit 409 I 1 IO_PAD105
+bit 408 O 1 IO_PAD105 407 1 Z
+bit 407 C 1 *
+bit 406 I 1 IO_PAD104
+bit 405 O 1 IO_PAD104 404 1 Z
+bit 404 C 1 *
+bit 403 I 1 IO_PAD103
+bit 402 O 1 IO_PAD103 401 1 Z
+bit 401 C 1 *
+bit 400 I 1 IO_PAD102
+bit 399 O 1 IO_PAD102 398 1 Z
+bit 398 C 1 *
+bit 397 I 1 IO_PAD101
+bit 396 O 1 IO_PAD101 395 1 Z
+bit 395 C 1 *
+bit 394 I 1 IO_PAD100
+bit 393 O 1 IO_PAD100 392 1 Z
+bit 392 C 1 *
+bit 391 O 1 *
+bit 390 I 1 HSWAP_EN_PAD96
+bit 389 I 1 IO_PAD95
+bit 388 O 1 IO_PAD95 387 1 Z
+bit 387 C 1 *
+bit 386 I 1 IO_PAD94
+bit 385 O 1 IO_PAD94 384 1 Z
+bit 384 C 1 *
+bit 383 I 1 IO_PAD93
+bit 382 O 1 IO_PAD93 381 1 Z
+bit 381 C 1 *
+bit 380 I 1 IO_PAD89
+bit 379 O 1 IO_PAD89 378 1 Z
+bit 378 C 1 *
+bit 377 I 1 IO_PAD88
+bit 376 O 1 IO_PAD88 375 1 Z
+bit 375 C 1 *
+bit 374 I 1 IO_PAD86
+bit 373 O 1 IO_PAD86 372 1 Z
+bit 372 C 1 *
+bit 371 I 1 IO_PAD85
+bit 370 O 1 IO_PAD85 369 1 Z
+bit 369 C 1 *
+bit 368 I 1 IO_PAD84
+bit 367 O 1 IO_PAD84 366 1 Z
+bit 366 C 1 *
+bit 365 I 1 IO_PAD83
+bit 364 O 1 IO_PAD83 363 1 Z
+bit 363 C 1 *
+bit 362 I 1 IO_PAD82
+bit 361 O 1 IO_PAD82 360 1 Z
+bit 360 C 1 *
+bit 359 I 1 IO_PAD80
+bit 358 O 1 IO_PAD80 357 1 Z
+bit 357 C 1 *
+bit 356 I 1 IO_PAD78
+bit 355 O 1 IO_PAD78 354 1 Z
+bit 354 C 1 *
+bit 353 I 1 IO_PAD77
+bit 352 O 1 IO_PAD77 351 1 Z
+bit 351 C 1 *
+bit 350 I 1 IO_PAD76
+bit 349 O 1 IO_PAD76 348 1 Z
+bit 348 C 1 *
+bit 347 I 1 IO_PAD75
+bit 346 O 1 IO_PAD75 345 1 Z
+bit 345 C 1 *
+bit 344 I 1 IO_PAD74
+bit 343 O 1 IO_PAD74 342 1 Z
+bit 342 C 1 *
+bit 341 I 1 IO_PAD72
+bit 340 O 1 IO_PAD72 339 1 Z
+bit 339 C 1 *
+bit 338 I 1 IO_PAD70
+bit 337 O 1 IO_PAD70 336 1 Z
+bit 336 C 1 *
+bit 335 I 1 IO_PAD68
+bit 334 O 1 IO_PAD68 333 1 Z
+bit 333 C 1 *
+bit 332 I 1 IO_PAD66
+bit 331 O 1 IO_PAD66 330 1 Z
+bit 330 C 1 *
+bit 329 I 1 IO_PAD65
+bit 328 O 1 IO_PAD65 327 1 Z
+bit 327 C 1 *
+bit 326 I 1 IO_PAD64
+bit 325 O 1 IO_PAD64 324 1 Z
+bit 324 C 1 *
+bit 323 I 1 IO_PAD62
+bit 322 O 1 IO_PAD62 321 1 Z
+bit 321 C 1 *
+bit 320 I 1 IO_PAD61
+bit 319 O 1 IO_PAD61 318 1 Z
+bit 318 C 1 *
+bit 317 I 1 IO_PAD60
+bit 316 O 1 IO_PAD60 315 1 Z
+bit 315 C 1 *
+bit 314 I 1 IO_PAD58
+bit 313 O 1 IO_PAD58 312 1 Z
+bit 312 C 1 *
+bit 311 I 1 IO_PAD57
+bit 310 O 1 IO_PAD57 309 1 Z
+bit 309 C 1 *
+bit 308 I 1 IO_PAD56
+bit 307 O 1 IO_PAD56 306 1 Z
+bit 306 C 1 *
+bit 305 I 1 IO_PAD54
+bit 304 O 1 IO_PAD54 303 1 Z
+bit 303 C 1 *
+bit 302 I 1 IO_PAD52
+bit 301 O 1 IO_PAD52 300 1 Z
+bit 300 C 1 *
+bit 299 I 1 IO_PAD51
+bit 298 O 1 IO_PAD51 297 1 Z
+bit 297 C 1 *
+bit 296 I 1 IO_PAD50
+bit 295 O 1 IO_PAD50 294 1 Z
+bit 294 C 1 *
+bit 293 I 1 IO_PAD49
+bit 292 O 1 IO_PAD49 291 1 Z
+bit 291 C 1 *
+bit 290 I 1 IO_PAD48
+bit 289 O 1 IO_PAD48 288 1 Z
+bit 288 C 1 *
+bit 287 I 1 IO_PAD46
+bit 286 O 1 IO_PAD46 285 1 Z
+bit 285 C 1 *
+bit 284 I 1 IO_PAD44
+bit 283 O 1 IO_PAD44 282 1 Z
+bit 282 C 1 *
+bit 281 I 1 IO_PAD42
+bit 280 O 1 IO_PAD42 279 1 Z
+bit 279 C 1 *
+bit 278 I 1 IO_PAD40
+bit 277 O 1 IO_PAD40 276 1 Z
+bit 276 C 1 *
+bit 275 I 1 IO_PAD38
+bit 274 O 1 IO_PAD38 273 1 Z
+bit 273 C 1 *
+bit 272 I 1 IO_PAD36
+bit 271 O 1 IO_PAD36 270 1 Z
+bit 270 C 1 *
+bit 269 I 1 IO_PAD35
+bit 268 O 1 IO_PAD35 267 1 Z
+bit 267 C 1 *
+bit 266 I 1 IO_PAD34
+bit 265 O 1 IO_PAD34 264 1 Z
+bit 264 C 1 *
+bit 263 I 1 IO_PAD33
+bit 262 O 1 IO_PAD33 261 1 Z
+bit 261 C 1 *
+bit 260 I 1 IO_PAD32
+bit 259 O 1 IO_PAD32 258 1 Z
+bit 258 C 1 *
+bit 257 I 1 IO_PAD31
+bit 256 O 1 IO_PAD31 255 1 Z
+bit 255 C 1 *
+bit 254 I 1 IO_PAD30
+bit 253 O 1 IO_PAD30 252 1 Z
+bit 252 C 1 *
+bit 251 I 1 IO_PAD28
+bit 250 O 1 IO_PAD28 249 1 Z
+bit 249 C 1 *
+bit 248 I 1 IO_PAD26
+bit 247 O 1 IO_PAD26 246 1 Z
+bit 246 C 1 *
+bit 245 I 1 IO_PAD25
+bit 244 O 1 IO_PAD25 243 1 Z
+bit 243 C 1 *
+bit 242 I 1 IO_PAD24
+bit 241 O 1 IO_PAD24 240 1 Z
+bit 240 C 1 *
+bit 239 I 1 IO_PAD23
+bit 238 O 1 IO_PAD23 237 1 Z
+bit 237 C 1 *
+bit 236 I 1 IO_PAD22
+bit 235 O 1 IO_PAD22 234 1 Z
+bit 234 C 1 *
+bit 233 I 1 IO_PAD20
+bit 232 O 1 IO_PAD20 231 1 Z
+bit 231 C 1 *
+bit 230 I 1 IO_PAD18
+bit 229 O 1 IO_PAD18 228 1 Z
+bit 228 C 1 *
+bit 227 I 1 IO_PAD16
+bit 226 O 1 IO_PAD16 225 1 Z
+bit 225 C 1 *
+bit 224 I 1 IO_PAD14
+bit 223 O 1 IO_PAD14 222 1 Z
+bit 222 C 1 *
+bit 221 I 1 IO_PAD13
+bit 220 O 1 IO_PAD13 219 1 Z
+bit 219 C 1 *
+bit 218 I 1 IO_PAD12
+bit 217 O 1 IO_PAD12 216 1 Z
+bit 216 C 1 *
+bit 215 I 1 IO_PAD10
+bit 214 O 1 IO_PAD10 213 1 Z
+bit 213 C 1 *
+bit 212 I 1 IO_PAD9
+bit 211 O 1 IO_PAD9 210 1 Z
+bit 210 C 1 *
+bit 209 I 1 IO_PAD8
+bit 208 O 1 IO_PAD8 207 1 Z
+bit 207 C 1 *
+bit 206 I 1 IO_PAD6
+bit 205 O 1 IO_PAD6 204 1 Z
+bit 204 C 1 *
+bit 203 I 1 IO_PAD4
+bit 202 O 1 IO_PAD4 201 1 Z
+bit 201 C 1 *
+bit 200 I 1 IO_PAD3
+bit 199 O 1 IO_PAD3 198 1 Z
+bit 198 C 1 *
+bit 197 I 1 IO_PAD2
+bit 196 O 1 IO_PAD2 195 1 Z
+bit 195 C 1 *
+bit 194 I 1 IO_PAD721
+bit 193 O 1 IO_PAD721 192 1 Z
+bit 192 C 1 *
+bit 191 I 1 IO_PAD720
+bit 190 O 1 IO_PAD720 189 1 Z
+bit 189 C 1 *
+bit 188 I 1 IO_PAD719
+bit 187 O 1 IO_PAD719 186 1 Z
+bit 186 C 1 *
+bit 185 I 1 IO_PAD717
+bit 184 O 1 IO_PAD717 183 1 Z
+bit 183 C 1 *
+bit 182 I 1 IO_PAD715
+bit 181 O 1 IO_PAD715 180 1 Z
+bit 180 C 1 *
+bit 179 I 1 IO_PAD714
+bit 178 O 1 IO_PAD714 177 1 Z
+bit 177 C 1 *
+bit 176 I 1 IO_PAD713
+bit 175 O 1 IO_PAD713 174 1 Z
+bit 174 C 1 *
+bit 173 I 1 IO_PAD711
+bit 172 O 1 IO_PAD711 171 1 Z
+bit 171 C 1 *
+bit 170 I 1 IO_PAD710
+bit 169 O 1 IO_PAD710 168 1 Z
+bit 168 C 1 *
+bit 167 I 1 IO_PAD709
+bit 166 O 1 IO_PAD709 165 1 Z
+bit 165 C 1 *
+bit 164 I 1 IO_PAD707
+bit 163 O 1 IO_PAD707 162 1 Z
+bit 162 C 1 *
+bit 161 I 1 IO_PAD705
+bit 160 O 1 IO_PAD705 159 1 Z
+bit 159 C 1 *
+bit 158 I 1 IO_PAD703
+bit 157 O 1 IO_PAD703 156 1 Z
+bit 156 C 1 *
+bit 155 I 1 IO_PAD701
+bit 154 O 1 IO_PAD701 153 1 Z
+bit 153 C 1 *
+bit 152 I 1 IO_PAD700
+bit 151 O 1 IO_PAD700 150 1 Z
+bit 150 C 1 *
+bit 149 I 1 IO_PAD699
+bit 148 O 1 IO_PAD699 147 1 Z
+bit 147 C 1 *
+bit 146 I 1 IO_PAD698
+bit 145 O 1 IO_PAD698 144 1 Z
+bit 144 C 1 *
+bit 143 I 1 IO_PAD697
+bit 142 O 1 IO_PAD697 141 1 Z
+bit 141 C 1 *
+bit 140 I 1 IO_PAD695
+bit 139 O 1 IO_PAD695 138 1 Z
+bit 138 C 1 *
+bit 137 I 1 IO_PAD693
+bit 136 O 1 IO_PAD693 135 1 Z
+bit 135 C 1 *
+bit 134 I 1 IO_PAD692
+bit 133 O 1 IO_PAD692 132 1 Z
+bit 132 C 1 *
+bit 131 I 1 IO_PAD691
+bit 130 O 1 IO_PAD691 129 1 Z
+bit 129 C 1 *
+bit 128 I 1 IO_PAD690
+bit 127 O 1 IO_PAD690 126 1 Z
+bit 126 C 1 *
+bit 125 I 1 IO_PAD689
+bit 124 O 1 IO_PAD689 123 1 Z
+bit 123 C 1 *
+bit 122 I 1 IO_PAD688
+bit 121 O 1 IO_PAD688 120 1 Z
+bit 120 C 1 *
+bit 119 I 1 IO_PAD687
+bit 118 O 1 IO_PAD687 117 1 Z
+bit 117 C 1 *
+bit 116 I 1 IO_PAD685
+bit 115 O 1 IO_PAD685 114 1 Z
+bit 114 C 1 *
+bit 113 I 1 IO_PAD683
+bit 112 O 1 IO_PAD683 111 1 Z
+bit 111 C 1 *
+bit 110 I 1 IO_PAD681
+bit 109 O 1 IO_PAD681 108 1 Z
+bit 108 C 1 *
+bit 107 I 1 IO_PAD679
+bit 106 O 1 IO_PAD679 105 1 Z
+bit 105 C 1 *
+bit 104 I 1 IO_PAD677
+bit 103 O 1 IO_PAD677 102 1 Z
+bit 102 C 1 *
+bit 101 I 1 IO_PAD675
+bit 100 O 1 IO_PAD675 99 1 Z
+bit 99 C 1 *
+bit 98 I 1 IO_PAD674
+bit 97 O 1 IO_PAD674 96 1 Z
+bit 96 C 1 *
+bit 95 I 1 IO_PAD673
+bit 94 O 1 IO_PAD673 93 1 Z
+bit 93 C 1 *
+bit 92 I 1 IO_PAD672
+bit 91 O 1 IO_PAD672 90 1 Z
+bit 90 C 1 *
+bit 89 I 1 IO_PAD671
+bit 88 O 1 IO_PAD671 87 1 Z
+bit 87 C 1 *
+bit 86 I 1 IO_PAD669
+bit 85 O 1 IO_PAD669 84 1 Z
+bit 84 C 1 *
+bit 83 I 1 IO_PAD667
+bit 82 O 1 IO_PAD667 81 1 Z
+bit 81 C 1 *
+bit 80 I 1 IO_PAD666
+bit 79 O 1 IO_PAD666 78 1 Z
+bit 78 C 1 *
+bit 77 I 1 IO_PAD665
+bit 76 O 1 IO_PAD665 75 1 Z
+bit 75 C 1 *
+bit 74 I 1 IO_PAD663
+bit 73 O 1 IO_PAD663 72 1 Z
+bit 72 C 1 *
+bit 71 I 1 IO_PAD662
+bit 70 O 1 IO_PAD662 69 1 Z
+bit 69 C 1 *
+bit 68 I 1 IO_PAD661
+bit 67 O 1 IO_PAD661 66 1 Z
+bit 66 C 1 *
+bit 65 I 1 IO_PAD659
+bit 64 O 1 IO_PAD659 63 1 Z
+bit 63 C 1 *
+bit 62 I 1 IO_PAD658
+bit 61 O 1 IO_PAD658 60 1 Z
+bit 60 C 1 *
+bit 59 I 1 IO_PAD657
+bit 58 O 1 IO_PAD657 57 1 Z
+bit 57 C 1 *
+bit 56 I 1 IO_PAD655
+bit 55 O 1 IO_PAD655 54 1 Z
+bit 54 C 1 *
+bit 53 I 1 IO_PAD653
+bit 52 O 1 IO_PAD653 51 1 Z
+bit 51 C 1 *
+bit 50 I 1 IO_PAD651
+bit 49 O 1 IO_PAD651 48 1 Z
+bit 48 C 1 *
+bit 47 I 1 IO_PAD649
+bit 46 O 1 IO_PAD649 45 1 Z
+bit 45 C 1 *
+bit 44 I 1 IO_PAD648
+bit 43 O 1 IO_PAD648 42 1 Z
+bit 42 C 1 *
+bit 41 I 1 IO_PAD647
+bit 40 O 1 IO_PAD647 39 1 Z
+bit 39 C 1 *
+bit 38 I 1 IO_PAD646
+bit 37 O 1 IO_PAD646 36 1 Z
+bit 36 C 1 *
+bit 35 I 1 IO_PAD645
+bit 34 O 1 IO_PAD645 33 1 Z
+bit 33 C 1 *
+bit 32 I 1 IO_PAD643
+bit 31 O 1 IO_PAD643 30 1 Z
+bit 30 C 1 *
+bit 29 I 1 IO_PAD641
+bit 28 O 1 IO_PAD641 27 1 Z
+bit 27 C 1 *
+bit 26 I 1 IO_PAD640
+bit 25 O 1 IO_PAD640 24 1 Z
+bit 24 C 1 *
+bit 23 I 1 IO_PAD639
+bit 22 O 1 IO_PAD639 21 1 Z
+bit 21 C 1 *
+bit 20 I 1 IO_PAD638
+bit 19 O 1 IO_PAD638 18 1 Z
+bit 18 C 1 *
+bit 17 I 1 IO_PAD637
+bit 16 O 1 IO_PAD637 15 1 Z
+bit 15 C 1 *
+bit 14 I 1 IO_PAD635
+bit 13 O 1 IO_PAD635 12 1 Z
+bit 12 C 1 *
+bit 11 I 1 IO_PAD634
+bit 10 O 1 IO_PAD634 9 1 Z
+bit 9 C 1 *
+bit 8 I 1 IO_PAD633
+bit 7 O 1 IO_PAD633 6 1 Z
+bit 6 C 1 *
+bit 5 I 1 IO_PAD631
+bit 4 O 1 IO_PAD631 3 1 Z
+bit 3 C 1 *
+bit 2 I 1 IO_PAD630
+bit 1 O 1 IO_PAD630 0 1 Z
+bit 0 C 1 *
--- /dev/null
+signal GND1
+signal GND2
+signal GND3
+signal GND4
+signal GND5
+signal GND6
+signal GND7
+signal GND8
+signal GND9
+signal GND10
+signal GND11
+signal GND12
+signal GND13
+signal GND14
+signal GND15
+signal GND16
+signal GND17
+signal GND18
+signal GND19
+signal GND20
+signal GND21
+signal GND22
+signal GND23
+signal GND24
+signal GND25
+signal GND26
+signal GND27
+signal GND28
+signal GND29
+signal GND30
+signal GND31
+signal GND32
+signal GND33
+signal GND34
+signal GND35
+signal GND36
+signal GND37
+signal GND38
+signal GND39
+signal GND40
+signal CCLK_T15
+signal DONE_R15
+signal HSWAP_EN_E6
+signal M0_P5
+signal M1_U3
+signal M2_R4
+signal PROG_B
+signal TCK
+signal TDI
+signal TDO
+signal TMS
+signal VCCAUX1
+signal VCCAUX2
+signal VCCAUX3
+signal VCCAUX4
+signal VCCAUX5
+signal VCCAUX6
+signal VCCAUX7
+signal VCCAUX8
+signal VCCINT1
+signal VCCINT2
+signal VCCINT3
+signal VCCINT4
+signal VCCINT5
+signal VCCINT6
+signal VCCINT7
+signal VCCINT8
+signal VCCINT9
+signal VCCINT10
+signal VCCINT11
+signal VCCINT12
+signal VCCO01
+signal VCCO02
+signal VCCO03
+signal VCCO04
+signal VCCO11
+signal VCCO12
+signal VCCO13
+signal VCCO14
+signal VCCO21
+signal VCCO22
+signal VCCO23
+signal VCCO31
+signal VCCO32
+signal VCCO33
+signal VCCO41
+signal VCCO42
+signal VCCO43
+signal VCCO44
+signal VCCO51
+signal VCCO52
+signal VCCO53
+signal VCCO54
+signal VCCO61
+signal VCCO62
+signal VCCO63
+signal VCCO71
+signal VCCO72
+signal VCCO73
+signal IO_A2
+signal IO_A3
+signal IO_A4
+signal IO_A5
+signal IO_A7
+signal IO_A8
+signal IO_A9
+signal IO_A10
+signal IO_A11
+signal IO_A12
+signal IO_A14
+signal IO_A15
+signal IO_A16
+signal IO_A17
+signal IO_B1
+signal IO_B3
+signal IO_B4
+signal IO_B5
+signal IO_B6
+signal IO_B9
+signal IO_B10
+signal IO_B13
+signal IO_B14
+signal IO_B15
+signal IO_B18
+signal IO_C1
+signal IO_C2
+signal IO_C3
+signal IO_C4
+signal IO_C5
+signal IO_C7
+signal IO_C8
+signal IO_C11
+signal IO_C12
+signal IO_C14
+signal IO_C15
+signal IO_C16
+signal IO_C17
+signal IO_C18
+signal IO_D1
+signal IO_D2
+signal IO_D3
+signal IO_D5
+signal IO_D6
+signal IO_D7
+signal IO_D8
+signal IO_D9
+signal IO_D10
+signal IO_D11
+signal IO_D12
+signal IO_D13
+signal IO_D14
+signal IO_D16
+signal IO_D17
+signal IO_D18
+signal IO_E1
+signal IO_E2
+signal IO_E3
+signal IO_E4
+signal IO_E7
+signal IO_E8
+signal IO_E9
+signal IO_E10
+signal IO_E11
+signal IO_E12
+signal IO_E13
+signal IO_E15
+signal IO_E16
+signal IO_E17
+signal IO_E18
+signal IO_F2
+signal IO_F4
+signal IO_F5
+signal IO_F8
+signal IO_F9
+signal IO_F10
+signal IO_F11
+signal IO_F14
+signal IO_F15
+signal IO_F17
+signal IO_G1
+signal IO_G3
+signal IO_G4
+signal IO_G5
+signal IO_G14
+signal IO_G15
+signal IO_G16
+signal IO_G18
+signal IO_H1
+signal IO_H2
+signal IO_H3
+signal IO_H4
+signal IO_H5
+signal IO_H6
+signal IO_H13
+signal IO_H14
+signal IO_H15
+signal IO_H16
+signal IO_H17
+signal IO_H18
+signal IO_J1
+signal IO_J2
+signal IO_J4
+signal IO_J5
+signal IO_J6
+signal IO_J13
+signal IO_J14
+signal IO_J15
+signal IO_J17
+signal IO_J18
+signal IO_K1
+signal IO_K2
+signal IO_K4
+signal IO_K5
+signal IO_K6
+signal IO_K13
+signal IO_K14
+signal IO_K15
+signal IO_K17
+signal IO_K18
+signal IO_L1
+signal IO_L2
+signal IO_L3
+signal IO_L4
+signal IO_L5
+signal IO_L6
+signal IO_L13
+signal IO_L14
+signal IO_L15
+signal IO_L16
+signal IO_L17
+signal IO_L18
+signal IO_M1
+signal IO_M3
+signal IO_M4
+signal IO_M5
+signal IO_M14
+signal IO_M15
+signal IO_M16
+signal IO_M18
+signal IO_N2
+signal IO_N4
+signal IO_N5
+signal IO_N8
+signal IO_N9
+signal IO_N10
+signal IO_N11
+signal IO_N14
+signal IO_N15
+signal IO_N17
+signal IO_P1
+signal IO_P2
+signal IO_P3
+signal IO_P4
+signal IO_P6
+signal IO_P7
+signal IO_P8
+signal IO_P9
+signal IO_P10
+signal IO_P11
+signal IO_P12
+signal IO_P13
+signal IO_P14
+signal IO_P15
+signal IO_P16
+signal IO_P17
+signal IO_P18
+signal IO_R1
+signal IO_R2
+signal IO_R3
+signal IO_R5
+signal IO_R6
+signal IO_R7
+signal IO_R8
+signal IO_R9
+signal IO_R10
+signal IO_R11
+signal IO_R12
+signal IO_R13
+signal IO_R14
+signal IO_R16
+signal IO_R17
+signal IO_R18
+signal IO_T1
+signal IO_T2
+signal IO_T3
+signal IO_T4
+signal IO_T5
+signal IO_T7
+signal IO_T8
+signal IO_T11
+signal IO_T12
+signal IO_T14
+signal IO_T16
+signal IO_T17
+signal IO_T18
+signal IO_U1
+signal IO_U4
+signal IO_U5
+signal IO_U6
+signal IO_U9
+signal IO_U10
+signal IO_U13
+signal IO_U14
+signal IO_U15
+signal IO_U16
+signal IO_U18
+signal IO_V2
+signal IO_V3
+signal IO_V4
+signal IO_V5
+signal IO_V7
+signal IO_V8
+signal IO_V9
+signal IO_V10
+signal IO_V11
+signal IO_V12
+signal IO_V14
+signal IO_V15
+signal IO_V16
+
+register BSR 1559
+register BR 1
+register DIR 32
+
+instruction length 6
+
+instruction EXTEST 000000 BSR
+instruction SAMPLE/PRELOAD 000001 BSR
+instruction IDCODE 001001 DIR
+instruction BYPASS 111111 BR
+
+bit 1558 I 1 IO_C16
+bit 1557 O 1 IO_C16 1556 1 Z
+bit 1556 C 1 *
+bit 1555 I 1 IO_C17
+bit 1554 O 1 IO_C17 1553 1 Z
+bit 1553 C 1 *
+bit 1552 O 1 *
+bit 1551 O 1 *
+bit 1550 O 1 *
+bit 1549 O 1 *
+bit 1548 O 1 *
+bit 1547 O 1 *
+bit 1546 O 1 *
+bit 1545 O 1 *
+bit 1544 O 1 *
+bit 1543 O 1 *
+bit 1542 O 1 *
+bit 1541 O 1 *
+bit 1540 O 1 *
+bit 1539 O 1 *
+bit 1538 O 1 *
+bit 1537 O 1 *
+bit 1536 O 1 *
+bit 1535 O 1 *
+bit 1534 O 1 *
+bit 1533 O 1 *
+bit 1532 O 1 *
+bit 1531 O 1 *
+bit 1530 O 1 *
+bit 1529 O 1 *
+bit 1528 O 1 *
+bit 1527 O 1 *
+bit 1526 O 1 *
+bit 1525 O 1 *
+bit 1524 O 1 *
+bit 1523 O 1 *
+bit 1522 O 1 *
+bit 1521 O 1 *
+bit 1520 O 1 *
+bit 1519 O 1 *
+bit 1518 O 1 *
+bit 1517 O 1 *
+bit 1516 O 1 *
+bit 1515 O 1 *
+bit 1514 O 1 *
+bit 1513 O 1 *
+bit 1512 O 1 *
+bit 1511 O 1 *
+bit 1510 O 1 *
+bit 1509 O 1 *
+bit 1508 O 1 *
+bit 1507 O 1 *
+bit 1506 O 1 *
+bit 1505 O 1 *
+bit 1504 O 1 *
+bit 1503 O 1 *
+bit 1502 O 1 *
+bit 1501 O 1 *
+bit 1500 O 1 *
+bit 1499 O 1 *
+bit 1498 I 1 IO_B18
+bit 1497 O 1 IO_B18 1496 1 Z
+bit 1496 C 1 *
+bit 1495 I 1 IO_C18
+bit 1494 O 1 IO_C18 1493 1 Z
+bit 1493 C 1 *
+bit 1492 I 1 IO_D17
+bit 1491 O 1 IO_D17 1490 1 Z
+bit 1490 C 1 *
+bit 1489 I 1 IO_D18
+bit 1488 O 1 IO_D18 1487 1 Z
+bit 1487 C 1 *
+bit 1486 I 1 IO_D16
+bit 1485 O 1 IO_D16 1484 1 Z
+bit 1484 C 1 *
+bit 1483 I 1 IO_E16
+bit 1482 O 1 IO_E16 1481 1 Z
+bit 1481 C 1 *
+bit 1480 I 1 IO_E17
+bit 1479 O 1 IO_E17 1478 1 Z
+bit 1478 C 1 *
+bit 1477 I 1 IO_E18
+bit 1476 O 1 IO_E18 1475 1 Z
+bit 1475 C 1 *
+bit 1474 I 1 IO_F15
+bit 1473 O 1 IO_F15 1472 1 Z
+bit 1472 C 1 *
+bit 1471 I 1 IO_E15
+bit 1470 O 1 IO_E15 1469 1 Z
+bit 1469 C 1 *
+bit 1468 I 1 IO_F14
+bit 1467 O 1 IO_F14 1466 1 Z
+bit 1466 C 1 *
+bit 1465 I 1 IO_G14
+bit 1464 O 1 IO_G14 1463 1 Z
+bit 1463 C 1 *
+bit 1462 I 1 IO_G18
+bit 1461 O 1 IO_G18 1460 1 Z
+bit 1460 C 1 *
+bit 1459 I 1 IO_F17
+bit 1458 O 1 IO_F17 1457 1 Z
+bit 1457 C 1 *
+bit 1456 I 1 IO_G15
+bit 1455 O 1 IO_G15 1454 1 Z
+bit 1454 C 1 *
+bit 1453 I 1 IO_G16
+bit 1452 O 1 IO_G16 1451 1 Z
+bit 1451 C 1 *
+bit 1450 O 1 *
+bit 1449 O 1 *
+bit 1448 O 1 *
+bit 1447 O 1 *
+bit 1446 O 1 *
+bit 1445 O 1 *
+bit 1444 I 1 IO_H13
+bit 1443 O 1 IO_H13 1442 1 Z
+bit 1442 C 1 *
+bit 1441 I 1 IO_H14
+bit 1440 O 1 IO_H14 1439 1 Z
+bit 1439 C 1 *
+bit 1438 O 1 *
+bit 1437 O 1 *
+bit 1436 O 1 *
+bit 1435 O 1 *
+bit 1434 O 1 *
+bit 1433 O 1 *
+bit 1432 O 1 *
+bit 1431 O 1 *
+bit 1430 O 1 *
+bit 1429 O 1 *
+bit 1428 O 1 *
+bit 1427 O 1 *
+bit 1426 O 1 *
+bit 1425 O 1 *
+bit 1424 O 1 *
+bit 1423 O 1 *
+bit 1422 O 1 *
+bit 1421 O 1 *
+bit 1420 O 1 *
+bit 1419 O 1 *
+bit 1418 O 1 *
+bit 1417 O 1 *
+bit 1416 O 1 *
+bit 1415 O 1 *
+bit 1414 O 1 *
+bit 1413 O 1 *
+bit 1412 O 1 *
+bit 1411 O 1 *
+bit 1410 O 1 *
+bit 1409 O 1 *
+bit 1408 O 1 *
+bit 1407 O 1 *
+bit 1406 O 1 *
+bit 1405 O 1 *
+bit 1404 O 1 *
+bit 1403 O 1 *
+bit 1402 I 1 IO_H16
+bit 1401 O 1 IO_H16 1400 1 Z
+bit 1400 C 1 *
+bit 1399 I 1 IO_H15
+bit 1398 O 1 IO_H15 1397 1 Z
+bit 1397 C 1 *
+bit 1396 I 1 IO_H17
+bit 1395 O 1 IO_H17 1394 1 Z
+bit 1394 C 1 *
+bit 1393 I 1 IO_H18
+bit 1392 O 1 IO_H18 1391 1 Z
+bit 1391 C 1 *
+bit 1390 O 1 *
+bit 1389 O 1 *
+bit 1388 O 1 *
+bit 1387 O 1 *
+bit 1386 O 1 *
+bit 1385 O 1 *
+bit 1384 O 1 *
+bit 1383 O 1 *
+bit 1382 O 1 *
+bit 1381 I 1 IO_J13
+bit 1380 O 1 IO_J13 1379 1 Z
+bit 1379 C 1 *
+bit 1378 I 1 IO_J18
+bit 1377 O 1 IO_J18 1376 1 Z
+bit 1376 C 1 *
+bit 1375 I 1 IO_J17
+bit 1374 O 1 IO_J17 1373 1 Z
+bit 1373 C 1 *
+bit 1372 I 1 IO_J15
+bit 1371 O 1 IO_J15 1370 1 Z
+bit 1370 C 1 *
+bit 1369 I 1 IO_J14
+bit 1368 O 1 IO_J14 1367 1 Z
+bit 1367 C 1 *
+bit 1366 I 1 IO_K17
+bit 1365 O 1 IO_K17 1364 1 Z
+bit 1364 C 1 *
+bit 1363 I 1 IO_K18
+bit 1362 O 1 IO_K18 1361 1 Z
+bit 1361 C 1 *
+bit 1360 I 1 IO_K13
+bit 1359 O 1 IO_K13 1358 1 Z
+bit 1358 C 1 *
+bit 1357 I 1 IO_K14
+bit 1356 O 1 IO_K14 1355 1 Z
+bit 1355 C 1 *
+bit 1354 I 1 IO_K15
+bit 1353 O 1 IO_K15 1352 1 Z
+bit 1352 C 1 *
+bit 1351 O 1 *
+bit 1350 O 1 *
+bit 1349 O 1 *
+bit 1348 O 1 *
+bit 1347 O 1 *
+bit 1346 O 1 *
+bit 1345 O 1 *
+bit 1344 O 1 *
+bit 1343 O 1 *
+bit 1342 I 1 IO_L18
+bit 1341 O 1 IO_L18 1340 1 Z
+bit 1340 C 1 *
+bit 1339 I 1 IO_L17
+bit 1338 O 1 IO_L17 1337 1 Z
+bit 1337 C 1 *
+bit 1336 I 1 IO_L15
+bit 1335 O 1 IO_L15 1334 1 Z
+bit 1334 C 1 *
+bit 1333 I 1 IO_L16
+bit 1332 O 1 IO_L16 1331 1 Z
+bit 1331 C 1 *
+bit 1330 O 1 *
+bit 1329 O 1 *
+bit 1328 O 1 *
+bit 1327 O 1 *
+bit 1326 O 1 *
+bit 1325 O 1 *
+bit 1324 O 1 *
+bit 1323 O 1 *
+bit 1322 O 1 *
+bit 1321 O 1 *
+bit 1320 O 1 *
+bit 1319 O 1 *
+bit 1318 O 1 *
+bit 1317 O 1 *
+bit 1316 O 1 *
+bit 1315 O 1 *
+bit 1314 O 1 *
+bit 1313 O 1 *
+bit 1312 O 1 *
+bit 1311 O 1 *
+bit 1310 O 1 *
+bit 1309 O 1 *
+bit 1308 O 1 *
+bit 1307 O 1 *
+bit 1306 O 1 *
+bit 1305 O 1 *
+bit 1304 O 1 *
+bit 1303 O 1 *
+bit 1302 O 1 *
+bit 1301 O 1 *
+bit 1300 O 1 *
+bit 1299 O 1 *
+bit 1298 O 1 *
+bit 1297 O 1 *
+bit 1296 O 1 *
+bit 1295 O 1 *
+bit 1294 I 1 IO_L14
+bit 1293 O 1 IO_L14 1292 1 Z
+bit 1292 C 1 *
+bit 1291 I 1 IO_L13
+bit 1290 O 1 IO_L13 1289 1 Z
+bit 1289 C 1 *
+bit 1288 O 1 *
+bit 1287 O 1 *
+bit 1286 O 1 *
+bit 1285 O 1 *
+bit 1284 O 1 *
+bit 1283 O 1 *
+bit 1282 I 1 IO_M18
+bit 1281 O 1 IO_M18 1280 1 Z
+bit 1280 C 1 *
+bit 1279 I 1 IO_N17
+bit 1278 O 1 IO_N17 1277 1 Z
+bit 1277 C 1 *
+bit 1276 I 1 IO_M15
+bit 1275 O 1 IO_M15 1274 1 Z
+bit 1274 C 1 *
+bit 1273 I 1 IO_M16
+bit 1272 O 1 IO_M16 1271 1 Z
+bit 1271 C 1 *
+bit 1270 I 1 IO_M14
+bit 1269 O 1 IO_M14 1268 1 Z
+bit 1268 C 1 *
+bit 1267 I 1 IO_N14
+bit 1266 O 1 IO_N14 1265 1 Z
+bit 1265 C 1 *
+bit 1264 I 1 IO_P15
+bit 1263 O 1 IO_P15 1262 1 Z
+bit 1262 C 1 *
+bit 1261 I 1 IO_N15
+bit 1260 O 1 IO_N15 1259 1 Z
+bit 1259 C 1 *
+bit 1258 I 1 IO_P18
+bit 1257 O 1 IO_P18 1256 1 Z
+bit 1256 C 1 *
+bit 1255 I 1 IO_P17
+bit 1254 O 1 IO_P17 1253 1 Z
+bit 1253 C 1 *
+bit 1252 I 1 IO_R17
+bit 1251 O 1 IO_R17 1250 1 Z
+bit 1250 C 1 *
+bit 1249 I 1 IO_R18
+bit 1248 O 1 IO_R18 1247 1 Z
+bit 1247 C 1 *
+bit 1246 I 1 IO_P16
+bit 1245 O 1 IO_P16 1244 1 Z
+bit 1244 C 1 *
+bit 1243 I 1 IO_R16
+bit 1242 O 1 IO_R16 1241 1 Z
+bit 1241 C 1 *
+bit 1240 I 1 IO_T18
+bit 1239 O 1 IO_T18 1238 1 Z
+bit 1238 C 1 *
+bit 1237 I 1 IO_U18
+bit 1236 O 1 IO_U18 1235 1 Z
+bit 1235 C 1 *
+bit 1234 O 1 *
+bit 1233 O 1 *
+bit 1232 O 1 *
+bit 1231 O 1 *
+bit 1230 O 1 *
+bit 1229 O 1 *
+bit 1228 O 1 *
+bit 1227 O 1 *
+bit 1226 O 1 *
+bit 1225 O 1 *
+bit 1224 O 1 *
+bit 1223 O 1 *
+bit 1222 O 1 *
+bit 1221 O 1 *
+bit 1220 O 1 *
+bit 1219 O 1 *
+bit 1218 O 1 *
+bit 1217 O 1 *
+bit 1216 O 1 *
+bit 1215 O 1 *
+bit 1214 O 1 *
+bit 1213 O 1 *
+bit 1212 O 1 *
+bit 1211 O 1 *
+bit 1210 O 1 *
+bit 1209 O 1 *
+bit 1208 O 1 *
+bit 1207 O 1 *
+bit 1206 O 1 *
+bit 1205 O 1 *
+bit 1204 O 1 *
+bit 1203 O 1 *
+bit 1202 O 1 *
+bit 1201 O 1 *
+bit 1200 O 1 *
+bit 1199 O 1 *
+bit 1198 O 1 *
+bit 1197 O 1 *
+bit 1196 O 1 *
+bit 1195 O 1 *
+bit 1194 O 1 *
+bit 1193 O 1 *
+bit 1192 O 1 *
+bit 1191 O 1 *
+bit 1190 O 1 *
+bit 1189 O 1 *
+bit 1188 O 1 *
+bit 1187 O 1 *
+bit 1186 O 1 *
+bit 1185 O 1 *
+bit 1184 O 1 *
+bit 1183 O 1 *
+bit 1182 O 1 *
+bit 1181 O 1 *
+bit 1180 I 1 IO_T17
+bit 1179 O 1 IO_T17 1178 1 Z
+bit 1178 C 1 *
+bit 1177 I 1 IO_T16
+bit 1176 O 1 IO_T16 1175 1 Z
+bit 1175 C 1 *
+bit 1174 I 1 CCLK_T15
+bit 1173 O 1 CCLK_T15 1172 1 Z
+bit 1172 C 1 *
+bit 1171 I 1 DONE_R15
+bit 1170 O 1 DONE_R15 1169 1 Z
+bit 1169 C 1 *
+bit 1168 I 1 IO_V17
+bit 1167 O 1 IO_V17 1166 1 Z
+bit 1166 C 1 *
+bit 1165 I 1 IO_U16
+bit 1164 O 1 IO_U16 1163 1 Z
+bit 1163 C 1 *
+bit 1162 I 1 IO_V16
+bit 1161 O 1 IO_V16 1160 1 Z
+bit 1160 C 1 *
+bit 1159 O 1 *
+bit 1158 O 1 *
+bit 1157 O 1 *
+bit 1156 O 1 *
+bit 1155 O 1 *
+bit 1154 O 1 *
+bit 1153 O 1 *
+bit 1152 O 1 *
+bit 1151 O 1 *
+bit 1150 O 1 *
+bit 1149 O 1 *
+bit 1148 O 1 *
+bit 1147 O 1 *
+bit 1146 O 1 *
+bit 1145 O 1 *
+bit 1144 I 1 IO_P14
+bit 1143 O 1 IO_P14 1142 1 Z
+bit 1142 C 1 *
+bit 1141 I 1 IO_R14
+bit 1140 O 1 IO_R14 1139 1 Z
+bit 1139 C 1 *
+bit 1138 O 1 *
+bit 1137 O 1 *
+bit 1136 O 1 *
+bit 1135 O 1 *
+bit 1134 O 1 *
+bit 1133 O 1 *
+bit 1132 O 1 *
+bit 1131 O 1 *
+bit 1130 O 1 *
+bit 1129 O 1 *
+bit 1128 O 1 *
+bit 1127 O 1 *
+bit 1126 O 1 *
+bit 1125 O 1 *
+bit 1124 O 1 *
+bit 1123 O 1 *
+bit 1122 O 1 *
+bit 1121 O 1 *
+bit 1120 I 1 IO_U15
+bit 1119 O 1 IO_U15 1118 1 Z
+bit 1118 C 1 *
+bit 1117 I 1 IO_V15
+bit 1116 O 1 IO_V15 1115 1 Z
+bit 1115 C 1 *
+bit 1114 I 1 IO_T14
+bit 1113 O 1 IO_T14 1112 1 Z
+bit 1112 C 1 *
+bit 1111 I 1 IO_U14
+bit 1110 O 1 IO_U14 1109 1 Z
+bit 1109 C 1 *
+bit 1108 O 1 *
+bit 1107 O 1 *
+bit 1106 O 1 *
+bit 1105 O 1 *
+bit 1104 O 1 *
+bit 1103 O 1 *
+bit 1102 O 1 *
+bit 1101 O 1 *
+bit 1100 O 1 *
+bit 1099 O 1 *
+bit 1098 O 1 *
+bit 1097 O 1 *
+bit 1096 O 1 *
+bit 1095 O 1 *
+bit 1094 O 1 *
+bit 1093 O 1 *
+bit 1092 O 1 *
+bit 1091 O 1 *
+bit 1090 O 1 *
+bit 1089 O 1 *
+bit 1088 O 1 *
+bit 1087 O 1 *
+bit 1086 O 1 *
+bit 1085 O 1 *
+bit 1084 I 1 IO_V14
+bit 1083 O 1 IO_V14 1082 1 Z
+bit 1082 C 1 *
+bit 1081 O 1 *
+bit 1080 O 1 *
+bit 1079 O 1 *
+bit 1078 O 1 *
+bit 1077 O 1 *
+bit 1076 O 1 *
+bit 1075 O 1 *
+bit 1074 O 1 *
+bit 1073 O 1 *
+bit 1072 O 1 *
+bit 1071 O 1 *
+bit 1070 O 1 *
+bit 1069 O 1 *
+bit 1068 O 1 *
+bit 1067 O 1 *
+bit 1066 O 1 *
+bit 1065 O 1 *
+bit 1064 O 1 *
+bit 1063 I 1 IO_U13
+bit 1062 O 1 IO_U13 1061 1 Z
+bit 1061 C 1 *
+bit 1060 O 1 *
+bit 1059 O 1 *
+bit 1058 O 1 *
+bit 1057 O 1 *
+bit 1056 O 1 *
+bit 1055 O 1 *
+bit 1054 O 1 *
+bit 1053 O 1 *
+bit 1052 O 1 *
+bit 1051 O 1 *
+bit 1050 O 1 *
+bit 1049 O 1 *
+bit 1048 O 1 *
+bit 1047 O 1 *
+bit 1046 O 1 *
+bit 1045 O 1 *
+bit 1044 O 1 *
+bit 1043 O 1 *
+bit 1042 O 1 *
+bit 1041 O 1 *
+bit 1040 O 1 *
+bit 1039 O 1 *
+bit 1038 O 1 *
+bit 1037 O 1 *
+bit 1036 O 1 *
+bit 1035 O 1 *
+bit 1034 O 1 *
+bit 1033 O 1 *
+bit 1032 O 1 *
+bit 1031 O 1 *
+bit 1030 I 1 IO_R13
+bit 1029 O 1 IO_R13 1028 1 Z
+bit 1028 C 1 *
+bit 1027 I 1 IO_P13
+bit 1026 O 1 IO_P13 1025 1 Z
+bit 1025 C 1 *
+bit 1024 O 1 *
+bit 1023 O 1 *
+bit 1022 O 1 *
+bit 1021 O 1 *
+bit 1020 O 1 *
+bit 1019 O 1 *
+bit 1018 I 1 IO_P12
+bit 1017 O 1 IO_P12 1016 1 Z
+bit 1016 C 1 *
+bit 1015 I 1 IO_T12
+bit 1014 O 1 IO_T12 1013 1 Z
+bit 1013 C 1 *
+bit 1012 I 1 IO_R12
+bit 1011 O 1 IO_R12 1010 1 Z
+bit 1010 C 1 *
+bit 1009 I 1 IO_V12
+bit 1008 O 1 IO_V12 1007 1 Z
+bit 1007 C 1 *
+bit 1006 I 1 IO_V11
+bit 1005 O 1 IO_V11 1004 1 Z
+bit 1004 C 1 *
+bit 1003 O 1 *
+bit 1002 O 1 *
+bit 1001 O 1 *
+bit 1000 I 1 IO_R11
+bit 999 O 1 IO_R11 998 1 Z
+bit 998 C 1 *
+bit 997 I 1 IO_T11
+bit 996 O 1 IO_T11 995 1 Z
+bit 995 C 1 *
+bit 994 I 1 IO_N11
+bit 993 O 1 IO_N11 992 1 Z
+bit 992 C 1 *
+bit 991 I 1 IO_P11
+bit 990 O 1 IO_P11 989 1 Z
+bit 989 C 1 *
+bit 988 I 1 IO_R10
+bit 987 O 1 IO_R10 986 1 Z
+bit 986 C 1 *
+bit 985 I 1 IO_U10
+bit 984 O 1 IO_U10 983 1 Z
+bit 983 C 1 *
+bit 982 I 1 IO_V10
+bit 981 O 1 IO_V10 980 1 Z
+bit 980 C 1 *
+bit 979 I 1 IO_N10
+bit 978 O 1 IO_N10 977 1 Z
+bit 977 C 1 *
+bit 976 I 1 IO_P10
+bit 975 O 1 IO_P10 974 1 Z
+bit 974 C 1 *
+bit 973 I 1 IO_R9
+bit 972 O 1 IO_R9 971 1 Z
+bit 971 C 1 *
+bit 970 I 1 IO_N9
+bit 969 O 1 IO_N9 968 1 Z
+bit 968 C 1 *
+bit 967 I 1 IO_P9
+bit 966 O 1 IO_P9 965 1 Z
+bit 965 C 1 *
+bit 964 I 1 IO_U9
+bit 963 O 1 IO_U9 962 1 Z
+bit 962 C 1 *
+bit 961 I 1 IO_V9
+bit 960 O 1 IO_V9 959 1 Z
+bit 959 C 1 *
+bit 958 I 1 IO_N8
+bit 957 O 1 IO_N8 956 1 Z
+bit 956 C 1 *
+bit 955 I 1 IO_R8
+bit 954 O 1 IO_R8 953 1 Z
+bit 953 C 1 *
+bit 952 I 1 IO_T8
+bit 951 O 1 IO_T8 950 1 Z
+bit 950 C 1 *
+bit 949 I 1 IO_V8
+bit 948 O 1 IO_V8 947 1 Z
+bit 947 C 1 *
+bit 946 I 1 IO_V7
+bit 945 O 1 IO_V7 944 1 Z
+bit 944 C 1 *
+bit 943 I 1 IO_P8
+bit 942 O 1 IO_P8 941 1 Z
+bit 941 C 1 *
+bit 940 I 1 IO_R7
+bit 939 O 1 IO_R7 938 1 Z
+bit 938 C 1 *
+bit 937 I 1 IO_T7
+bit 936 O 1 IO_T7 935 1 Z
+bit 935 C 1 *
+bit 934 I 1 IO_P6
+bit 933 O 1 IO_P6 932 1 Z
+bit 932 C 1 *
+bit 931 I 1 IO_P7
+bit 930 O 1 IO_P7 929 1 Z
+bit 929 C 1 *
+bit 928 I 1 IO_U6
+bit 927 O 1 IO_U6 926 1 Z
+bit 926 C 1 *
+bit 925 O 1 *
+bit 924 O 1 *
+bit 923 O 1 *
+bit 922 O 1 *
+bit 921 O 1 *
+bit 920 O 1 *
+bit 919 O 1 *
+bit 918 O 1 *
+bit 917 O 1 *
+bit 916 O 1 *
+bit 915 O 1 *
+bit 914 O 1 *
+bit 913 O 1 *
+bit 912 O 1 *
+bit 911 O 1 *
+bit 910 O 1 *
+bit 909 O 1 *
+bit 908 O 1 *
+bit 907 O 1 *
+bit 906 O 1 *
+bit 905 O 1 *
+bit 904 O 1 *
+bit 903 O 1 *
+bit 902 O 1 *
+bit 901 O 1 *
+bit 900 O 1 *
+bit 899 O 1 *
+bit 898 O 1 *
+bit 897 O 1 *
+bit 896 O 1 *
+bit 895 O 1 *
+bit 894 O 1 *
+bit 893 O 1 *
+bit 892 O 1 *
+bit 891 O 1 *
+bit 890 O 1 *
+bit 889 O 1 *
+bit 888 O 1 *
+bit 887 O 1 *
+bit 886 O 1 *
+bit 885 O 1 *
+bit 884 O 1 *
+bit 883 O 1 *
+bit 882 O 1 *
+bit 881 O 1 *
+bit 880 O 1 *
+bit 879 O 1 *
+bit 878 O 1 *
+bit 877 O 1 *
+bit 876 O 1 *
+bit 875 O 1 *
+bit 874 O 1 *
+bit 873 O 1 *
+bit 872 O 1 *
+bit 871 O 1 *
+bit 870 O 1 *
+bit 869 O 1 *
+bit 868 O 1 *
+bit 867 O 1 *
+bit 866 O 1 *
+bit 865 I 1 IO_V5
+bit 864 O 1 IO_V5 863 1 Z
+bit 863 C 1 *
+bit 862 I 1 IO_U5
+bit 861 O 1 IO_U5 860 1 Z
+bit 860 C 1 *
+bit 859 I 1 IO_R6
+bit 858 O 1 IO_R6 857 1 Z
+bit 857 C 1 *
+bit 856 I 1 IO_R5
+bit 855 O 1 IO_R5 854 1 Z
+bit 854 C 1 *
+bit 853 O 1 *
+bit 852 O 1 *
+bit 851 O 1 *
+bit 850 O 1 *
+bit 849 O 1 *
+bit 848 O 1 *
+bit 847 O 1 *
+bit 846 O 1 *
+bit 845 O 1 *
+bit 844 O 1 *
+bit 843 O 1 *
+bit 842 O 1 *
+bit 841 O 1 *
+bit 840 O 1 *
+bit 839 O 1 *
+bit 838 O 1 *
+bit 837 O 1 *
+bit 836 O 1 *
+bit 835 I 1 IO_V4
+bit 834 O 1 IO_V4 833 1 Z
+bit 833 C 1 *
+bit 832 I 1 IO_U4
+bit 831 O 1 IO_U4 830 1 Z
+bit 830 C 1 *
+bit 829 O 1 *
+bit 828 O 1 *
+bit 827 O 1 *
+bit 826 O 1 *
+bit 825 O 1 *
+bit 824 O 1 *
+bit 823 O 1 *
+bit 822 O 1 *
+bit 821 O 1 *
+bit 820 O 1 *
+bit 819 O 1 *
+bit 818 O 1 *
+bit 817 O 1 *
+bit 816 O 1 *
+bit 815 O 1 *
+bit 814 O 1 *
+bit 813 O 1 *
+bit 812 O 1 *
+bit 811 O 1 *
+bit 810 O 1 *
+bit 809 O 1 *
+bit 808 O 1 *
+bit 807 O 1 *
+bit 806 O 1 *
+bit 805 I 1 IO_T5
+bit 804 O 1 IO_T5 803 1 Z
+bit 803 C 1 *
+bit 802 I 1 IO_T4
+bit 801 O 1 IO_T4 800 1 Z
+bit 800 C 1 *
+bit 799 O 1 *
+bit 798 O 1 *
+bit 797 O 1 *
+bit 796 O 1 *
+bit 795 O 1 *
+bit 794 O 1 *
+bit 793 O 1 *
+bit 792 O 1 *
+bit 791 O 1 *
+bit 790 O 1 *
+bit 789 O 1 *
+bit 788 O 1 *
+bit 787 O 1 *
+bit 786 O 1 *
+bit 785 O 1 *
+bit 784 I 1 IO_V3
+bit 783 O 1 IO_V3 782 1 Z
+bit 782 C 1 *
+bit 781 I 1 IO_V2
+bit 780 O 1 IO_V2 779 1 Z
+bit 779 C 1 *
+bit 778 I 1 M2_R4
+bit 777 I 1 M0_P5
+bit 776 I 1 M1_U3
+bit 775 I 1 IO_T3
+bit 774 O 1 IO_T3 773 1 Z
+bit 773 C 1 *
+bit 772 I 1 IO_T2
+bit 771 O 1 IO_T2 770 1 Z
+bit 770 C 1 *
+bit 769 O 1 *
+bit 768 O 1 *
+bit 767 O 1 *
+bit 766 O 1 *
+bit 765 O 1 *
+bit 764 O 1 *
+bit 763 O 1 *
+bit 762 O 1 *
+bit 761 O 1 *
+bit 760 O 1 *
+bit 759 O 1 *
+bit 758 O 1 *
+bit 757 O 1 *
+bit 756 O 1 *
+bit 755 O 1 *
+bit 754 O 1 *
+bit 753 O 1 *
+bit 752 O 1 *
+bit 751 O 1 *
+bit 750 O 1 *
+bit 749 O 1 *
+bit 748 O 1 *
+bit 747 O 1 *
+bit 746 O 1 *
+bit 745 O 1 *
+bit 744 O 1 *
+bit 743 O 1 *
+bit 742 O 1 *
+bit 741 O 1 *
+bit 740 O 1 *
+bit 739 O 1 *
+bit 738 O 1 *
+bit 737 O 1 *
+bit 736 O 1 *
+bit 735 O 1 *
+bit 734 O 1 *
+bit 733 O 1 *
+bit 732 O 1 *
+bit 731 O 1 *
+bit 730 O 1 *
+bit 729 O 1 *
+bit 728 O 1 *
+bit 727 O 1 *
+bit 726 O 1 *
+bit 725 O 1 *
+bit 724 O 1 *
+bit 723 O 1 *
+bit 722 O 1 *
+bit 721 O 1 *
+bit 720 O 1 *
+bit 719 O 1 *
+bit 718 O 1 *
+bit 717 O 1 *
+bit 716 O 1 *
+bit 715 I 1 IO_U1
+bit 714 O 1 IO_U1 713 1 Z
+bit 713 C 1 *
+bit 712 I 1 IO_T1
+bit 711 O 1 IO_T1 710 1 Z
+bit 710 C 1 *
+bit 709 I 1 IO_R2
+bit 708 O 1 IO_R2 707 1 Z
+bit 707 C 1 *
+bit 706 I 1 IO_R1
+bit 705 O 1 IO_R1 704 1 Z
+bit 704 C 1 *
+bit 703 I 1 IO_R3
+bit 702 O 1 IO_R3 701 1 Z
+bit 701 C 1 *
+bit 700 I 1 IO_P3
+bit 699 O 1 IO_P3 698 1 Z
+bit 698 C 1 *
+bit 697 I 1 IO_P2
+bit 696 O 1 IO_P2 695 1 Z
+bit 695 C 1 *
+bit 694 I 1 IO_P1
+bit 693 O 1 IO_P1 692 1 Z
+bit 692 C 1 *
+bit 691 I 1 IO_N4
+bit 690 O 1 IO_N4 689 1 Z
+bit 689 C 1 *
+bit 688 I 1 IO_P4
+bit 687 O 1 IO_P4 686 1 Z
+bit 686 C 1 *
+bit 685 I 1 IO_N5
+bit 684 O 1 IO_N5 683 1 Z
+bit 683 C 1 *
+bit 682 I 1 IO_M5
+bit 681 O 1 IO_M5 680 1 Z
+bit 680 C 1 *
+bit 679 I 1 IO_M3
+bit 678 O 1 IO_M3 677 1 Z
+bit 677 C 1 *
+bit 676 I 1 IO_M4
+bit 675 O 1 IO_M4 674 1 Z
+bit 674 C 1 *
+bit 673 I 1 IO_N2
+bit 672 O 1 IO_N2 671 1 Z
+bit 671 C 1 *
+bit 670 I 1 IO_M1
+bit 669 O 1 IO_M1 668 1 Z
+bit 668 C 1 *
+bit 667 O 1 *
+bit 666 O 1 *
+bit 665 O 1 *
+bit 664 O 1 *
+bit 663 O 1 *
+bit 662 O 1 *
+bit 661 I 1 IO_L6
+bit 660 O 1 IO_L6 659 1 Z
+bit 659 C 1 *
+bit 658 I 1 IO_L5
+bit 657 O 1 IO_L5 656 1 Z
+bit 656 C 1 *
+bit 655 O 1 *
+bit 654 O 1 *
+bit 653 O 1 *
+bit 652 O 1 *
+bit 651 O 1 *
+bit 650 O 1 *
+bit 649 O 1 *
+bit 648 O 1 *
+bit 647 O 1 *
+bit 646 O 1 *
+bit 645 O 1 *
+bit 644 O 1 *
+bit 643 O 1 *
+bit 642 O 1 *
+bit 641 O 1 *
+bit 640 O 1 *
+bit 639 O 1 *
+bit 638 O 1 *
+bit 637 O 1 *
+bit 636 O 1 *
+bit 635 O 1 *
+bit 634 O 1 *
+bit 633 O 1 *
+bit 632 O 1 *
+bit 631 O 1 *
+bit 630 O 1 *
+bit 629 O 1 *
+bit 628 O 1 *
+bit 627 O 1 *
+bit 626 O 1 *
+bit 625 O 1 *
+bit 624 O 1 *
+bit 623 O 1 *
+bit 622 O 1 *
+bit 621 O 1 *
+bit 620 O 1 *
+bit 619 I 1 IO_L3
+bit 618 O 1 IO_L3 617 1 Z
+bit 617 C 1 *
+bit 616 I 1 IO_L4
+bit 615 O 1 IO_L4 614 1 Z
+bit 614 C 1 *
+bit 613 I 1 IO_L2
+bit 612 O 1 IO_L2 611 1 Z
+bit 611 C 1 *
+bit 610 I 1 IO_L1
+bit 609 O 1 IO_L1 608 1 Z
+bit 608 C 1 *
+bit 607 O 1 *
+bit 606 O 1 *
+bit 605 O 1 *
+bit 604 O 1 *
+bit 603 O 1 *
+bit 602 O 1 *
+bit 601 O 1 *
+bit 600 O 1 *
+bit 599 O 1 *
+bit 598 I 1 IO_K6
+bit 597 O 1 IO_K6 596 1 Z
+bit 596 C 1 *
+bit 595 I 1 IO_K5
+bit 594 O 1 IO_K5 593 1 Z
+bit 593 C 1 *
+bit 592 I 1 IO_K4
+bit 591 O 1 IO_K4 590 1 Z
+bit 590 C 1 *
+bit 589 I 1 IO_K1
+bit 588 O 1 IO_K1 587 1 Z
+bit 587 C 1 *
+bit 586 I 1 IO_K2
+bit 585 O 1 IO_K2 584 1 Z
+bit 584 C 1 *
+bit 583 I 1 IO_J5
+bit 582 O 1 IO_J5 581 1 Z
+bit 581 C 1 *
+bit 580 I 1 IO_J4
+bit 579 O 1 IO_J4 578 1 Z
+bit 578 C 1 *
+bit 577 I 1 IO_J1
+bit 576 O 1 IO_J1 575 1 Z
+bit 575 C 1 *
+bit 574 I 1 IO_J2
+bit 573 O 1 IO_J2 572 1 Z
+bit 572 C 1 *
+bit 571 I 1 IO_J6
+bit 570 O 1 IO_J6 569 1 Z
+bit 569 C 1 *
+bit 568 O 1 *
+bit 567 O 1 *
+bit 566 O 1 *
+bit 565 O 1 *
+bit 564 O 1 *
+bit 563 O 1 *
+bit 562 O 1 *
+bit 561 O 1 *
+bit 560 O 1 *
+bit 559 I 1 IO_H1
+bit 558 O 1 IO_H1 557 1 Z
+bit 557 C 1 *
+bit 556 I 1 IO_H2
+bit 555 O 1 IO_H2 554 1 Z
+bit 554 C 1 *
+bit 553 I 1 IO_H4
+bit 552 O 1 IO_H4 551 1 Z
+bit 551 C 1 *
+bit 550 I 1 IO_H3
+bit 549 O 1 IO_H3 548 1 Z
+bit 548 C 1 *
+bit 547 O 1 *
+bit 546 O 1 *
+bit 545 O 1 *
+bit 544 O 1 *
+bit 543 O 1 *
+bit 542 O 1 *
+bit 541 O 1 *
+bit 540 O 1 *
+bit 539 O 1 *
+bit 538 O 1 *
+bit 537 O 1 *
+bit 536 O 1 *
+bit 535 O 1 *
+bit 534 O 1 *
+bit 533 O 1 *
+bit 532 O 1 *
+bit 531 O 1 *
+bit 530 O 1 *
+bit 529 O 1 *
+bit 528 O 1 *
+bit 527 O 1 *
+bit 526 O 1 *
+bit 525 O 1 *
+bit 524 O 1 *
+bit 523 O 1 *
+bit 522 O 1 *
+bit 521 O 1 *
+bit 520 O 1 *
+bit 519 O 1 *
+bit 518 O 1 *
+bit 517 O 1 *
+bit 516 O 1 *
+bit 515 O 1 *
+bit 514 O 1 *
+bit 513 O 1 *
+bit 512 O 1 *
+bit 511 I 1 IO_H5
+bit 510 O 1 IO_H5 509 1 Z
+bit 509 C 1 *
+bit 508 I 1 IO_H6
+bit 507 O 1 IO_H6 506 1 Z
+bit 506 C 1 *
+bit 505 O 1 *
+bit 504 O 1 *
+bit 503 O 1 *
+bit 502 O 1 *
+bit 501 O 1 *
+bit 500 O 1 *
+bit 499 I 1 IO_G4
+bit 498 O 1 IO_G4 497 1 Z
+bit 497 C 1 *
+bit 496 I 1 IO_G3
+bit 495 O 1 IO_G3 494 1 Z
+bit 494 C 1 *
+bit 493 I 1 IO_G1
+bit 492 O 1 IO_G1 491 1 Z
+bit 491 C 1 *
+bit 490 I 1 IO_F2
+bit 489 O 1 IO_F2 488 1 Z
+bit 488 C 1 *
+bit 487 I 1 IO_G5
+bit 486 O 1 IO_G5 485 1 Z
+bit 485 C 1 *
+bit 484 I 1 IO_F5
+bit 483 O 1 IO_F5 482 1 Z
+bit 482 C 1 *
+bit 481 I 1 IO_E4
+bit 480 O 1 IO_E4 479 1 Z
+bit 479 C 1 *
+bit 478 I 1 IO_F4
+bit 477 O 1 IO_F4 476 1 Z
+bit 476 C 1 *
+bit 475 I 1 IO_E2
+bit 474 O 1 IO_E2 473 1 Z
+bit 473 C 1 *
+bit 472 I 1 IO_E1
+bit 471 O 1 IO_E1 470 1 Z
+bit 470 C 1 *
+bit 469 I 1 IO_E3
+bit 468 O 1 IO_E3 467 1 Z
+bit 467 C 1 *
+bit 466 I 1 IO_D3
+bit 465 O 1 IO_D3 464 1 Z
+bit 464 C 1 *
+bit 463 I 1 IO_D1
+bit 462 O 1 IO_D1 461 1 Z
+bit 461 C 1 *
+bit 460 I 1 IO_D2
+bit 459 O 1 IO_D2 458 1 Z
+bit 458 C 1 *
+bit 457 I 1 IO_C1
+bit 456 O 1 IO_C1 455 1 Z
+bit 455 C 1 *
+bit 454 I 1 IO_B1
+bit 453 O 1 IO_B1 452 1 Z
+bit 452 C 1 *
+bit 451 O 1 *
+bit 450 O 1 *
+bit 449 O 1 *
+bit 448 O 1 *
+bit 447 O 1 *
+bit 446 O 1 *
+bit 445 O 1 *
+bit 444 O 1 *
+bit 443 O 1 *
+bit 442 O 1 *
+bit 441 O 1 *
+bit 440 O 1 *
+bit 439 O 1 *
+bit 438 O 1 *
+bit 437 O 1 *
+bit 436 O 1 *
+bit 435 O 1 *
+bit 434 O 1 *
+bit 433 O 1 *
+bit 432 O 1 *
+bit 431 O 1 *
+bit 430 O 1 *
+bit 429 O 1 *
+bit 428 O 1 *
+bit 427 O 1 *
+bit 426 O 1 *
+bit 425 O 1 *
+bit 424 O 1 *
+bit 423 O 1 *
+bit 422 O 1 *
+bit 421 O 1 *
+bit 420 O 1 *
+bit 419 O 1 *
+bit 418 O 1 *
+bit 417 O 1 *
+bit 416 O 1 *
+bit 415 O 1 *
+bit 414 O 1 *
+bit 413 O 1 *
+bit 412 O 1 *
+bit 411 O 1 *
+bit 410 O 1 *
+bit 409 O 1 *
+bit 408 O 1 *
+bit 407 O 1 *
+bit 406 O 1 *
+bit 405 O 1 *
+bit 404 O 1 *
+bit 403 O 1 *
+bit 402 O 1 *
+bit 401 O 1 *
+bit 400 O 1 *
+bit 399 O 1 *
+bit 398 O 1 *
+bit 397 I 1 IO_C3
+bit 396 O 1 IO_C3 395 1 Z
+bit 395 C 1 *
+bit 394 I 1 IO_C2
+bit 393 O 1 IO_C2 392 1 Z
+bit 392 C 1 *
+bit 391 O 1 *
+bit 390 I 1 HSWAP_EN_E6
+bit 389 I 1 IO_B3
+bit 388 O 1 IO_B3 387 1 Z
+bit 387 C 1 *
+bit 386 I 1 IO_A2
+bit 385 O 1 IO_A2 384 1 Z
+bit 384 C 1 *
+bit 383 I 1 IO_A3
+bit 382 O 1 IO_A3 381 1 Z
+bit 381 C 1 *
+bit 380 O 1 *
+bit 379 O 1 *
+bit 378 O 1 *
+bit 377 O 1 *
+bit 376 O 1 *
+bit 375 O 1 *
+bit 374 O 1 *
+bit 373 O 1 *
+bit 372 O 1 *
+bit 371 O 1 *
+bit 370 O 1 *
+bit 369 O 1 *
+bit 368 O 1 *
+bit 367 O 1 *
+bit 366 O 1 *
+bit 365 O 1 *
+bit 364 O 1 *
+bit 363 O 1 *
+bit 362 O 1 *
+bit 361 O 1 *
+bit 360 O 1 *
+bit 359 O 1 *
+bit 358 O 1 *
+bit 357 O 1 *
+bit 356 O 1 *
+bit 355 O 1 *
+bit 354 O 1 *
+bit 353 O 1 *
+bit 352 O 1 *
+bit 351 O 1 *
+bit 350 O 1 *
+bit 349 O 1 *
+bit 348 O 1 *
+bit 347 O 1 *
+bit 346 O 1 *
+bit 345 O 1 *
+bit 344 O 1 *
+bit 343 O 1 *
+bit 342 O 1 *
+bit 341 I 1 IO_B4
+bit 340 O 1 IO_B4 339 1 Z
+bit 339 C 1 *
+bit 338 I 1 IO_C4
+bit 337 O 1 IO_C4 336 1 Z
+bit 336 C 1 *
+bit 335 I 1 IO_C5
+bit 334 O 1 IO_C5 333 1 Z
+bit 333 C 1 *
+bit 332 I 1 IO_D5
+bit 331 O 1 IO_D5 330 1 Z
+bit 330 C 1 *
+bit 329 O 1 *
+bit 328 O 1 *
+bit 327 O 1 *
+bit 326 O 1 *
+bit 325 O 1 *
+bit 324 O 1 *
+bit 323 O 1 *
+bit 322 O 1 *
+bit 321 O 1 *
+bit 320 O 1 *
+bit 319 O 1 *
+bit 318 O 1 *
+bit 317 O 1 *
+bit 316 O 1 *
+bit 315 O 1 *
+bit 314 O 1 *
+bit 313 O 1 *
+bit 312 O 1 *
+bit 311 I 1 IO_A4
+bit 310 O 1 IO_A4 309 1 Z
+bit 309 C 1 *
+bit 308 I 1 IO_A5
+bit 307 O 1 IO_A5 306 1 Z
+bit 306 C 1 *
+bit 305 O 1 *
+bit 304 O 1 *
+bit 303 O 1 *
+bit 302 O 1 *
+bit 301 O 1 *
+bit 300 O 1 *
+bit 299 O 1 *
+bit 298 O 1 *
+bit 297 O 1 *
+bit 296 O 1 *
+bit 295 O 1 *
+bit 294 O 1 *
+bit 293 O 1 *
+bit 292 O 1 *
+bit 291 O 1 *
+bit 290 O 1 *
+bit 289 O 1 *
+bit 288 O 1 *
+bit 287 O 1 *
+bit 286 O 1 *
+bit 285 O 1 *
+bit 284 I 1 IO_D6
+bit 283 O 1 IO_D6 282 1 Z
+bit 282 C 1 *
+bit 281 O 1 *
+bit 280 O 1 *
+bit 279 O 1 *
+bit 278 O 1 *
+bit 277 O 1 *
+bit 276 O 1 *
+bit 275 O 1 *
+bit 274 O 1 *
+bit 273 O 1 *
+bit 272 O 1 *
+bit 271 O 1 *
+bit 270 O 1 *
+bit 269 O 1 *
+bit 268 O 1 *
+bit 267 O 1 *
+bit 266 O 1 *
+bit 265 O 1 *
+bit 264 O 1 *
+bit 263 O 1 *
+bit 262 O 1 *
+bit 261 O 1 *
+bit 260 O 1 *
+bit 259 O 1 *
+bit 258 O 1 *
+bit 257 O 1 *
+bit 256 O 1 *
+bit 255 O 1 *
+bit 254 O 1 *
+bit 253 O 1 *
+bit 252 O 1 *
+bit 251 I 1 IO_B5
+bit 250 O 1 IO_B5 249 1 Z
+bit 249 C 1 *
+bit 248 I 1 IO_B6
+bit 247 O 1 IO_B6 246 1 Z
+bit 246 C 1 *
+bit 245 O 1 *
+bit 244 O 1 *
+bit 243 O 1 *
+bit 242 O 1 *
+bit 241 O 1 *
+bit 240 O 1 *
+bit 239 I 1 IO_E7
+bit 238 O 1 IO_E7 237 1 Z
+bit 237 C 1 *
+bit 236 I 1 IO_C7
+bit 235 O 1 IO_C7 234 1 Z
+bit 234 C 1 *
+bit 233 I 1 IO_D7
+bit 232 O 1 IO_D7 231 1 Z
+bit 231 C 1 *
+bit 230 I 1 IO_C8
+bit 229 O 1 IO_C8 228 1 Z
+bit 228 C 1 *
+bit 227 I 1 IO_D8
+bit 226 O 1 IO_D8 225 1 Z
+bit 225 C 1 *
+bit 224 O 1 *
+bit 223 O 1 *
+bit 222 O 1 *
+bit 221 I 1 IO_E8
+bit 220 O 1 IO_E8 219 1 Z
+bit 219 C 1 *
+bit 218 I 1 IO_F8
+bit 217 O 1 IO_F8 216 1 Z
+bit 216 C 1 *
+bit 215 I 1 IO_A7
+bit 214 O 1 IO_A7 213 1 Z
+bit 213 C 1 *
+bit 212 I 1 IO_A8
+bit 211 O 1 IO_A8 210 1 Z
+bit 210 C 1 *
+bit 209 I 1 IO_D9
+bit 208 O 1 IO_D9 207 1 Z
+bit 207 C 1 *
+bit 206 I 1 IO_B9
+bit 205 O 1 IO_B9 204 1 Z
+bit 204 C 1 *
+bit 203 I 1 IO_A9
+bit 202 O 1 IO_A9 201 1 Z
+bit 201 C 1 *
+bit 200 I 1 IO_E9
+bit 199 O 1 IO_E9 198 1 Z
+bit 198 C 1 *
+bit 197 I 1 IO_F9
+bit 196 O 1 IO_F9 195 1 Z
+bit 195 C 1 *
+bit 194 I 1 IO_D10
+bit 193 O 1 IO_D10 192 1 Z
+bit 192 C 1 *
+bit 191 I 1 IO_E10
+bit 190 O 1 IO_E10 189 1 Z
+bit 189 C 1 *
+bit 188 I 1 IO_F10
+bit 187 O 1 IO_F10 186 1 Z
+bit 186 C 1 *
+bit 185 I 1 IO_A10
+bit 184 O 1 IO_A10 183 1 Z
+bit 183 C 1 *
+bit 182 I 1 IO_B10
+bit 181 O 1 IO_B10 180 1 Z
+bit 180 C 1 *
+bit 179 I 1 IO_A11
+bit 178 O 1 IO_A11 177 1 Z
+bit 177 C 1 *
+bit 176 I 1 IO_C11
+bit 175 O 1 IO_C11 174 1 Z
+bit 174 C 1 *
+bit 173 I 1 IO_D11
+bit 172 O 1 IO_D11 171 1 Z
+bit 171 C 1 *
+bit 170 I 1 IO_F11
+bit 169 O 1 IO_F11 168 1 Z
+bit 168 C 1 *
+bit 167 I 1 IO_E11
+bit 166 O 1 IO_E11 165 1 Z
+bit 165 C 1 *
+bit 164 I 1 IO_A12
+bit 163 O 1 IO_A12 162 1 Z
+bit 162 C 1 *
+bit 161 I 1 IO_C12
+bit 160 O 1 IO_C12 159 1 Z
+bit 159 C 1 *
+bit 158 I 1 IO_D12
+bit 157 O 1 IO_D12 156 1 Z
+bit 156 C 1 *
+bit 155 I 1 IO_E13
+bit 154 O 1 IO_E13 153 1 Z
+bit 153 C 1 *
+bit 152 I 1 IO_E12
+bit 151 O 1 IO_E12 150 1 Z
+bit 150 C 1 *
+bit 149 I 1 IO_B13
+bit 148 O 1 IO_B13 147 1 Z
+bit 147 C 1 *
+bit 146 O 1 *
+bit 145 O 1 *
+bit 144 O 1 *
+bit 143 O 1 *
+bit 142 O 1 *
+bit 141 O 1 *
+bit 140 O 1 *
+bit 139 O 1 *
+bit 138 O 1 *
+bit 137 O 1 *
+bit 136 O 1 *
+bit 135 O 1 *
+bit 134 O 1 *
+bit 133 O 1 *
+bit 132 O 1 *
+bit 131 I 1 IO_D14
+bit 130 O 1 IO_D14 129 1 Z
+bit 129 C 1 *
+bit 128 I 1 IO_D13
+bit 127 O 1 IO_D13 126 1 Z
+bit 126 C 1 *
+bit 125 O 1 *
+bit 124 O 1 *
+bit 123 O 1 *
+bit 122 O 1 *
+bit 121 O 1 *
+bit 120 O 1 *
+bit 119 O 1 *
+bit 118 O 1 *
+bit 117 O 1 *
+bit 116 O 1 *
+bit 115 O 1 *
+bit 114 O 1 *
+bit 113 O 1 *
+bit 112 O 1 *
+bit 111 O 1 *
+bit 110 O 1 *
+bit 109 O 1 *
+bit 108 O 1 *
+bit 107 O 1 *
+bit 106 O 1 *
+bit 105 O 1 *
+bit 104 O 1 *
+bit 103 O 1 *
+bit 102 O 1 *
+bit 101 O 1 *
+bit 100 O 1 *
+bit 99 O 1 *
+bit 98 O 1 *
+bit 97 O 1 *
+bit 96 O 1 *
+bit 95 O 1 *
+bit 94 O 1 *
+bit 93 O 1 *
+bit 92 O 1 *
+bit 91 O 1 *
+bit 90 O 1 *
+bit 89 O 1 *
+bit 88 O 1 *
+bit 87 O 1 *
+bit 86 I 1 IO_A14
+bit 85 O 1 IO_A14 84 1 Z
+bit 84 C 1 *
+bit 83 I 1 IO_B14
+bit 82 O 1 IO_B14 81 1 Z
+bit 81 C 1 *
+bit 80 I 1 IO_C14
+bit 79 O 1 IO_C14 78 1 Z
+bit 78 C 1 *
+bit 77 I 1 IO_C15
+bit 76 O 1 IO_C15 75 1 Z
+bit 75 C 1 *
+bit 74 O 1 *
+bit 73 O 1 *
+bit 72 O 1 *
+bit 71 O 1 *
+bit 70 O 1 *
+bit 69 O 1 *
+bit 68 O 1 *
+bit 67 O 1 *
+bit 66 O 1 *
+bit 65 O 1 *
+bit 64 O 1 *
+bit 63 O 1 *
+bit 62 O 1 *
+bit 61 O 1 *
+bit 60 O 1 *
+bit 59 O 1 *
+bit 58 O 1 *
+bit 57 O 1 *
+bit 56 I 1 IO_A15
+bit 55 O 1 IO_A15 54 1 Z
+bit 54 C 1 *
+bit 53 I 1 IO_B15
+bit 52 O 1 IO_B15 51 1 Z
+bit 51 C 1 *
+bit 50 O 1 *
+bit 49 O 1 *
+bit 48 O 1 *
+bit 47 O 1 *
+bit 46 O 1 *
+bit 45 O 1 *
+bit 44 O 1 *
+bit 43 O 1 *
+bit 42 O 1 *
+bit 41 O 1 *
+bit 40 O 1 *
+bit 39 O 1 *
+bit 38 O 1 *
+bit 37 O 1 *
+bit 36 O 1 *
+bit 35 O 1 *
+bit 34 O 1 *
+bit 33 O 1 *
+bit 32 O 1 *
+bit 31 O 1 *
+bit 30 O 1 *
+bit 29 O 1 *
+bit 28 O 1 *
+bit 27 O 1 *
+bit 26 O 1 *
+bit 25 O 1 *
+bit 24 O 1 *
+bit 23 O 1 *
+bit 22 O 1 *
+bit 21 O 1 *
+bit 20 O 1 *
+bit 19 O 1 *
+bit 18 O 1 *
+bit 17 O 1 *
+bit 16 O 1 *
+bit 15 O 1 *
+bit 14 O 1 *
+bit 13 O 1 *
+bit 12 O 1 *
+bit 11 O 1 *
+bit 10 O 1 *
+bit 9 O 1 *
+bit 8 O 1 *
+bit 7 O 1 *
+bit 6 O 1 *
+bit 5 I 1 IO_A16
+bit 4 O 1 IO_A16 3 1 Z
+bit 3 C 1 *
+bit 2 I 1 IO_A17
+bit 1 O 1 IO_A17 0 1 Z
+bit 0 C 1 *
--- /dev/null
+signal GND1
+signal GND2
+signal GND3
+signal GND4
+signal GND5
+signal GND6
+signal GND7
+signal GND8
+signal GND9
+signal GND10
+signal GND11
+signal GND12
+signal GND13
+signal GND14
+signal GND15
+signal GND16
+signal GND17
+signal GND18
+signal GND19
+signal GND20
+signal GND21
+signal GND22
+signal GND23
+signal GND24
+signal GND25
+signal GND26
+signal GND27
+signal GND28
+signal GND29
+signal GND30
+signal GND31
+signal GND32
+signal GND33
+signal GND34
+signal GND35
+signal GND36
+signal GND37
+signal GND38
+signal GND39
+signal GND40
+signal GND41
+signal GND42
+signal GND43
+signal GND44
+signal GND45
+signal GND46
+signal GND47
+signal GND48
+signal GND49
+signal GND50
+signal GND51
+signal GND52
+signal CCLK_AA22
+signal DONE_AB21
+signal HSWAP_EN_B3
+signal M0_AB2
+signal M1_AA1
+signal M2_AB3
+signal PROG_B
+signal TCK
+signal TDI
+signal TDO
+signal TMS
+signal VCCAUX1
+signal VCCAUX2
+signal VCCAUX3
+signal VCCAUX4
+signal VCCAUX5
+signal VCCAUX6
+signal VCCAUX7
+signal VCCAUX8
+signal VCCINT1
+signal VCCINT2
+signal VCCINT3
+signal VCCINT4
+signal VCCINT5
+signal VCCINT6
+signal VCCINT7
+signal VCCINT8
+signal VCCINT9
+signal VCCINT10
+signal VCCINT11
+signal VCCINT12
+signal VCCO01
+signal VCCO02
+signal VCCO03
+signal VCCO04
+signal VCCO05
+signal VCCO11
+signal VCCO12
+signal VCCO13
+signal VCCO14
+signal VCCO15
+signal VCCO21
+signal VCCO22
+signal VCCO23
+signal VCCO24
+signal VCCO25
+signal VCCO31
+signal VCCO32
+signal VCCO33
+signal VCCO34
+signal VCCO35
+signal VCCO41
+signal VCCO42
+signal VCCO43
+signal VCCO44
+signal VCCO45
+signal VCCO51
+signal VCCO52
+signal VCCO53
+signal VCCO54
+signal VCCO55
+signal VCCO61
+signal VCCO62
+signal VCCO63
+signal VCCO64
+signal VCCO65
+signal VCCO71
+signal VCCO72
+signal VCCO73
+signal VCCO74
+signal VCCO75
+signal IO_A3
+signal IO_A4
+signal IO_A5
+signal IO_A7
+signal IO_A8
+signal IO_A9
+signal IO_A10
+signal IO_A11
+signal IO_A12
+signal IO_A13
+signal IO_A14
+signal IO_A15
+signal IO_A16
+signal IO_A18
+signal IO_A19
+signal IO_B4
+signal IO_B5
+signal IO_B6
+signal IO_B7
+signal IO_B8
+signal IO_B9
+signal IO_B10
+signal IO_B11
+signal IO_B12
+signal IO_B13
+signal IO_B14
+signal IO_B15
+signal IO_B16
+signal IO_B17
+signal IO_B18
+signal IO_B19
+signal IO_B20
+signal IO_C1
+signal IO_C2
+signal IO_C3
+signal IO_C4
+signal IO_C5
+signal IO_C6
+signal IO_C7
+signal IO_C10
+signal IO_C11
+signal IO_C12
+signal IO_C13
+signal IO_C16
+signal IO_C17
+signal IO_C18
+signal IO_C19
+signal IO_C20
+signal IO_C21
+signal IO_C22
+signal IO_D1
+signal IO_D2
+signal IO_D3
+signal IO_D4
+signal IO_D5
+signal IO_D6
+signal IO_D7
+signal IO_D8
+signal IO_D9
+signal IO_D10
+signal IO_D11
+signal IO_D12
+signal IO_D13
+signal IO_D14
+signal IO_D15
+signal IO_D16
+signal IO_D17
+signal IO_D18
+signal IO_D19
+signal IO_D20
+signal IO_D21
+signal IO_D22
+signal IO_E1
+signal IO_E2
+signal IO_E3
+signal IO_E4
+signal IO_E5
+signal IO_E6
+signal IO_E7
+signal IO_E8
+signal IO_E9
+signal IO_E10
+signal IO_E11
+signal IO_E12
+signal IO_E13
+signal IO_E14
+signal IO_E15
+signal IO_E16
+signal IO_E17
+signal IO_E18
+signal IO_E19
+signal IO_E20
+signal IO_E21
+signal IO_E22
+signal IO_F2
+signal IO_F3
+signal IO_F4
+signal IO_F5
+signal IO_F6
+signal IO_F7
+signal IO_F9
+signal IO_F10
+signal IO_F11
+signal IO_F12
+signal IO_F13
+signal IO_F14
+signal IO_F16
+signal IO_F17
+signal IO_F18
+signal IO_F19
+signal IO_F20
+signal IO_F21
+signal IO_G1
+signal IO_G2
+signal IO_G3
+signal IO_G4
+signal IO_G5
+signal IO_G6
+signal IO_G17
+signal IO_G18
+signal IO_G19
+signal IO_G20
+signal IO_G21
+signal IO_G22
+signal IO_H1
+signal IO_H2
+signal IO_H4
+signal IO_H5
+signal IO_H18
+signal IO_H19
+signal IO_H21
+signal IO_H22
+signal IO_J1
+signal IO_J2
+signal IO_J4
+signal IO_J5
+signal IO_J6
+signal IO_J17
+signal IO_J18
+signal IO_J19
+signal IO_J21
+signal IO_J22
+signal IO_K1
+signal IO_K2
+signal IO_K3
+signal IO_K4
+signal IO_K5
+signal IO_K6
+signal IO_K17
+signal IO_K18
+signal IO_K19
+signal IO_K20
+signal IO_K21
+signal IO_K22
+signal IO_L1
+signal IO_L2
+signal IO_L3
+signal IO_L4
+signal IO_L5
+signal IO_L6
+signal IO_L17
+signal IO_L18
+signal IO_L19
+signal IO_L20
+signal IO_L21
+signal IO_L22
+signal IO_M1
+signal IO_M2
+signal IO_M3
+signal IO_M4
+signal IO_M5
+signal IO_M6
+signal IO_M17
+signal IO_M18
+signal IO_M19
+signal IO_M20
+signal IO_M21
+signal IO_M22
+signal IO_N1
+signal IO_N2
+signal IO_N3
+signal IO_N4
+signal IO_N5
+signal IO_N6
+signal IO_N17
+signal IO_N18
+signal IO_N19
+signal IO_N20
+signal IO_N21
+signal IO_N22
+signal IO_P1
+signal IO_P2
+signal IO_P4
+signal IO_P5
+signal IO_P6
+signal IO_P17
+signal IO_P18
+signal IO_P19
+signal IO_P21
+signal IO_P22
+signal IO_R1
+signal IO_R2
+signal IO_R4
+signal IO_R5
+signal IO_R18
+signal IO_R19
+signal IO_R21
+signal IO_R22
+signal IO_T1
+signal IO_T2
+signal IO_T3
+signal IO_T4
+signal IO_T5
+signal IO_T6
+signal IO_T17
+signal IO_T18
+signal IO_T19
+signal IO_T20
+signal IO_T21
+signal IO_T22
+signal IO_U2
+signal IO_U3
+signal IO_U4
+signal IO_U5
+signal IO_U6
+signal IO_U7
+signal IO_U9
+signal IO_U10
+signal IO_U11
+signal IO_U12
+signal IO_U13
+signal IO_U14
+signal IO_U16
+signal IO_U17
+signal IO_U18
+signal IO_U19
+signal IO_U20
+signal IO_U21
+signal IO_V1
+signal IO_V2
+signal IO_V3
+signal IO_V4
+signal IO_V5
+signal IO_V6
+signal IO_V7
+signal IO_V8
+signal IO_V9
+signal IO_V10
+signal IO_V11
+signal IO_V12
+signal IO_V13
+signal IO_V14
+signal IO_V15
+signal IO_V16
+signal IO_V17
+signal IO_V18
+signal IO_V19
+signal IO_V20
+signal IO_V21
+signal IO_V22
+signal IO_W1
+signal IO_W2
+signal IO_W3
+signal IO_W4
+signal IO_W5
+signal IO_W6
+signal IO_W7
+signal IO_W8
+signal IO_W9
+signal IO_W10
+signal IO_W11
+signal IO_W12
+signal IO_W13
+signal IO_W14
+signal IO_W15
+signal IO_W16
+signal IO_W17
+signal IO_W18
+signal IO_W19
+signal IO_W20
+signal IO_W21
+signal IO_W22
+signal IO_Y1
+signal IO_Y2
+signal IO_Y3
+signal IO_Y4
+signal IO_Y5
+signal IO_Y6
+signal IO_Y7
+signal IO_Y10
+signal IO_Y11
+signal IO_Y12
+signal IO_Y13
+signal IO_Y16
+signal IO_Y17
+signal IO_Y18
+signal IO_Y19
+signal IO_Y20
+signal IO_Y21
+signal IO_Y22
+signal IO_AA3
+signal IO_AA4
+signal IO_AA5
+signal IO_AA6
+signal IO_AA7
+signal IO_AA8
+signal IO_AA9
+signal IO_AA10
+signal IO_AA11
+signal IO_AA12
+signal IO_AA13
+signal IO_AA14
+signal IO_AA15
+signal IO_AA16
+signal IO_AA17
+signal IO_AA18
+signal IO_AA19
+signal IO_AA20
+signal IO_AB4
+signal IO_AB5
+signal IO_AB7
+signal IO_AB8
+signal IO_AB9
+signal IO_AB10
+signal IO_AB11
+signal IO_AB12
+signal IO_AB13
+signal IO_AB14
+signal IO_AB15
+signal IO_AB16
+signal IO_AB18
+signal IO_AB19
+
+register BSR 1559
+register BR 1
+register DIR 32
+
+instruction length 6
+
+instruction EXTEST 000000 BSR
+instruction SAMPLE/PRELOAD 000001 BSR
+instruction IDCODE 001001 DIR
+instruction BYPASS 111111 BR
+
+bit 1558 I 1 IO_C20
+bit 1557 O 1 IO_C20 1556 1 Z
+bit 1556 C 1 *
+bit 1555 I 1 IO_C21
+bit 1554 O 1 IO_C21 1553 1 Z
+bit 1553 C 1 *
+bit 1552 O 1 *
+bit 1551 O 1 *
+bit 1550 O 1 *
+bit 1549 O 1 *
+bit 1548 O 1 *
+bit 1547 O 1 *
+bit 1546 O 1 *
+bit 1545 O 1 *
+bit 1544 O 1 *
+bit 1543 O 1 *
+bit 1542 O 1 *
+bit 1541 O 1 *
+bit 1540 O 1 *
+bit 1539 O 1 *
+bit 1538 O 1 *
+bit 1537 O 1 *
+bit 1536 O 1 *
+bit 1535 O 1 *
+bit 1534 O 1 *
+bit 1533 O 1 *
+bit 1532 O 1 *
+bit 1531 O 1 *
+bit 1530 O 1 *
+bit 1529 O 1 *
+bit 1528 O 1 *
+bit 1527 O 1 *
+bit 1526 O 1 *
+bit 1525 O 1 *
+bit 1524 O 1 *
+bit 1523 O 1 *
+bit 1522 O 1 *
+bit 1521 O 1 *
+bit 1520 O 1 *
+bit 1519 O 1 *
+bit 1518 O 1 *
+bit 1517 O 1 *
+bit 1516 O 1 *
+bit 1515 O 1 *
+bit 1514 O 1 *
+bit 1513 O 1 *
+bit 1512 O 1 *
+bit 1511 O 1 *
+bit 1510 O 1 *
+bit 1509 O 1 *
+bit 1508 O 1 *
+bit 1507 O 1 *
+bit 1506 O 1 *
+bit 1505 O 1 *
+bit 1504 O 1 *
+bit 1503 O 1 *
+bit 1502 O 1 *
+bit 1501 I 1 IO_C22
+bit 1500 O 1 IO_C22 1499 1 Z
+bit 1499 C 1 *
+bit 1498 I 1 IO_D20
+bit 1497 O 1 IO_D20 1496 1 Z
+bit 1496 C 1 *
+bit 1495 I 1 IO_D19
+bit 1494 O 1 IO_D19 1493 1 Z
+bit 1493 C 1 *
+bit 1492 I 1 IO_D21
+bit 1491 O 1 IO_D21 1490 1 Z
+bit 1490 C 1 *
+bit 1489 I 1 IO_D22
+bit 1488 O 1 IO_D22 1487 1 Z
+bit 1487 C 1 *
+bit 1486 I 1 IO_E18
+bit 1485 O 1 IO_E18 1484 1 Z
+bit 1484 C 1 *
+bit 1483 I 1 IO_F18
+bit 1482 O 1 IO_F18 1481 1 Z
+bit 1481 C 1 *
+bit 1480 I 1 IO_E19
+bit 1479 O 1 IO_E19 1478 1 Z
+bit 1478 C 1 *
+bit 1477 I 1 IO_E20
+bit 1476 O 1 IO_E20 1475 1 Z
+bit 1475 C 1 *
+bit 1474 I 1 IO_E21
+bit 1473 O 1 IO_E21 1472 1 Z
+bit 1472 C 1 *
+bit 1471 I 1 IO_E22
+bit 1470 O 1 IO_E22 1469 1 Z
+bit 1469 C 1 *
+bit 1468 I 1 IO_G17
+bit 1467 O 1 IO_G17 1466 1 Z
+bit 1466 C 1 *
+bit 1465 I 1 IO_G18
+bit 1464 O 1 IO_G18 1463 1 Z
+bit 1463 C 1 *
+bit 1462 I 1 IO_F19
+bit 1461 O 1 IO_F19 1460 1 Z
+bit 1460 C 1 *
+bit 1459 I 1 IO_G19
+bit 1458 O 1 IO_G19 1457 1 Z
+bit 1457 C 1 *
+bit 1456 I 1 IO_F20
+bit 1455 O 1 IO_F20 1454 1 Z
+bit 1454 C 1 *
+bit 1453 I 1 IO_F21
+bit 1452 O 1 IO_F21 1451 1 Z
+bit 1451 C 1 *
+bit 1450 I 1 IO_G20
+bit 1449 O 1 IO_G20 1448 1 Z
+bit 1448 C 1 *
+bit 1447 I 1 IO_H19
+bit 1446 O 1 IO_H19 1445 1 Z
+bit 1445 C 1 *
+bit 1444 I 1 IO_G21
+bit 1443 O 1 IO_G21 1442 1 Z
+bit 1442 C 1 *
+bit 1441 I 1 IO_G22
+bit 1440 O 1 IO_G22 1439 1 Z
+bit 1439 C 1 *
+bit 1438 I 1 IO_H18
+bit 1437 O 1 IO_H18 1436 1 Z
+bit 1436 C 1 *
+bit 1435 I 1 IO_J17
+bit 1434 O 1 IO_J17 1433 1 Z
+bit 1433 C 1 *
+bit 1432 I 1 IO_H21
+bit 1431 O 1 IO_H21 1430 1 Z
+bit 1430 C 1 *
+bit 1429 I 1 IO_H22
+bit 1428 O 1 IO_H22 1427 1 Z
+bit 1427 C 1 *
+bit 1426 O 1 *
+bit 1425 O 1 *
+bit 1424 O 1 *
+bit 1423 O 1 *
+bit 1422 O 1 *
+bit 1421 O 1 *
+bit 1420 I 1 IO_J18
+bit 1419 O 1 IO_J18 1418 1 Z
+bit 1418 C 1 *
+bit 1417 I 1 IO_J19
+bit 1416 O 1 IO_J19 1415 1 Z
+bit 1415 C 1 *
+bit 1414 I 1 IO_J21
+bit 1413 O 1 IO_J21 1412 1 Z
+bit 1412 C 1 *
+bit 1411 I 1 IO_J22
+bit 1410 O 1 IO_J22 1409 1 Z
+bit 1409 C 1 *
+bit 1408 I 1 IO_K17
+bit 1407 O 1 IO_K17 1406 1 Z
+bit 1406 C 1 *
+bit 1405 I 1 IO_K18
+bit 1404 O 1 IO_K18 1403 1 Z
+bit 1403 C 1 *
+bit 1402 I 1 IO_K19
+bit 1401 O 1 IO_K19 1400 1 Z
+bit 1400 C 1 *
+bit 1399 I 1 IO_K20
+bit 1398 O 1 IO_K20 1397 1 Z
+bit 1397 C 1 *
+bit 1396 I 1 IO_K21
+bit 1395 O 1 IO_K21 1394 1 Z
+bit 1394 C 1 *
+bit 1393 I 1 IO_K22
+bit 1392 O 1 IO_K22 1391 1 Z
+bit 1391 C 1 *
+bit 1390 O 1 *
+bit 1389 O 1 *
+bit 1388 O 1 *
+bit 1387 O 1 *
+bit 1386 O 1 *
+bit 1385 O 1 *
+bit 1384 I 1 IO_L17
+bit 1383 O 1 IO_L17 1382 1 Z
+bit 1382 C 1 *
+bit 1381 I 1 IO_L18
+bit 1380 O 1 IO_L18 1379 1 Z
+bit 1379 C 1 *
+bit 1378 I 1 IO_L19
+bit 1377 O 1 IO_L19 1376 1 Z
+bit 1376 C 1 *
+bit 1375 I 1 IO_L20
+bit 1374 O 1 IO_L20 1373 1 Z
+bit 1373 C 1 *
+bit 1372 I 1 IO_L21
+bit 1371 O 1 IO_L21 1370 1 Z
+bit 1370 C 1 *
+bit 1369 I 1 IO_L22
+bit 1368 O 1 IO_L22 1367 1 Z
+bit 1367 C 1 *
+bit 1366 I 1 IO_M22
+bit 1365 O 1 IO_M22 1364 1 Z
+bit 1364 C 1 *
+bit 1363 I 1 IO_M21
+bit 1362 O 1 IO_M21 1361 1 Z
+bit 1361 C 1 *
+bit 1360 I 1 IO_M20
+bit 1359 O 1 IO_M20 1358 1 Z
+bit 1358 C 1 *
+bit 1357 I 1 IO_M19
+bit 1356 O 1 IO_M19 1355 1 Z
+bit 1355 C 1 *
+bit 1354 I 1 IO_M18
+bit 1353 O 1 IO_M18 1352 1 Z
+bit 1352 C 1 *
+bit 1351 I 1 IO_M17
+bit 1350 O 1 IO_M17 1349 1 Z
+bit 1349 C 1 *
+bit 1348 O 1 *
+bit 1347 O 1 *
+bit 1346 O 1 *
+bit 1345 O 1 *
+bit 1344 O 1 *
+bit 1343 O 1 *
+bit 1342 I 1 IO_N22
+bit 1341 O 1 IO_N22 1340 1 Z
+bit 1340 C 1 *
+bit 1339 I 1 IO_N21
+bit 1338 O 1 IO_N21 1337 1 Z
+bit 1337 C 1 *
+bit 1336 I 1 IO_N20
+bit 1335 O 1 IO_N20 1334 1 Z
+bit 1334 C 1 *
+bit 1333 I 1 IO_N19
+bit 1332 O 1 IO_N19 1331 1 Z
+bit 1331 C 1 *
+bit 1330 I 1 IO_N18
+bit 1329 O 1 IO_N18 1328 1 Z
+bit 1328 C 1 *
+bit 1327 I 1 IO_N17
+bit 1326 O 1 IO_N17 1325 1 Z
+bit 1325 C 1 *
+bit 1324 I 1 IO_P22
+bit 1323 O 1 IO_P22 1322 1 Z
+bit 1322 C 1 *
+bit 1321 I 1 IO_P21
+bit 1320 O 1 IO_P21 1319 1 Z
+bit 1319 C 1 *
+bit 1318 I 1 IO_P18
+bit 1317 O 1 IO_P18 1316 1 Z
+bit 1316 C 1 *
+bit 1315 I 1 IO_P17
+bit 1314 O 1 IO_P17 1313 1 Z
+bit 1313 C 1 *
+bit 1312 O 1 *
+bit 1311 O 1 *
+bit 1310 O 1 *
+bit 1309 O 1 *
+bit 1308 O 1 *
+bit 1307 O 1 *
+bit 1306 I 1 IO_P19
+bit 1305 O 1 IO_P19 1304 1 Z
+bit 1304 C 1 *
+bit 1303 I 1 IO_R19
+bit 1302 O 1 IO_R19 1301 1 Z
+bit 1301 C 1 *
+bit 1300 I 1 IO_R22
+bit 1299 O 1 IO_R22 1298 1 Z
+bit 1298 C 1 *
+bit 1297 I 1 IO_R21
+bit 1296 O 1 IO_R21 1295 1 Z
+bit 1295 C 1 *
+bit 1294 I 1 IO_T22
+bit 1293 O 1 IO_T22 1292 1 Z
+bit 1292 C 1 *
+bit 1291 I 1 IO_T21
+bit 1290 O 1 IO_T21 1289 1 Z
+bit 1289 C 1 *
+bit 1288 I 1 IO_T20
+bit 1287 O 1 IO_T20 1286 1 Z
+bit 1286 C 1 *
+bit 1285 I 1 IO_T19
+bit 1284 O 1 IO_T19 1283 1 Z
+bit 1283 C 1 *
+bit 1282 I 1 IO_R18
+bit 1281 O 1 IO_R18 1280 1 Z
+bit 1280 C 1 *
+bit 1279 I 1 IO_T18
+bit 1278 O 1 IO_T18 1277 1 Z
+bit 1277 C 1 *
+bit 1276 I 1 IO_U21
+bit 1275 O 1 IO_U21 1274 1 Z
+bit 1274 C 1 *
+bit 1273 I 1 IO_U20
+bit 1272 O 1 IO_U20 1271 1 Z
+bit 1271 C 1 *
+bit 1270 I 1 IO_T17
+bit 1269 O 1 IO_T17 1268 1 Z
+bit 1268 C 1 *
+bit 1267 I 1 IO_U18
+bit 1266 O 1 IO_U18 1265 1 Z
+bit 1265 C 1 *
+bit 1264 I 1 IO_V22
+bit 1263 O 1 IO_V22 1262 1 Z
+bit 1262 C 1 *
+bit 1261 I 1 IO_V21
+bit 1260 O 1 IO_V21 1259 1 Z
+bit 1259 C 1 *
+bit 1258 I 1 IO_U19
+bit 1257 O 1 IO_U19 1256 1 Z
+bit 1256 C 1 *
+bit 1255 I 1 IO_V20
+bit 1254 O 1 IO_V20 1253 1 Z
+bit 1253 C 1 *
+bit 1252 I 1 IO_W21
+bit 1251 O 1 IO_W21 1250 1 Z
+bit 1250 C 1 *
+bit 1249 I 1 IO_W20
+bit 1248 O 1 IO_W20 1247 1 Z
+bit 1247 C 1 *
+bit 1246 I 1 IO_V19
+bit 1245 O 1 IO_V19 1244 1 Z
+bit 1244 C 1 *
+bit 1243 I 1 IO_W19
+bit 1242 O 1 IO_W19 1241 1 Z
+bit 1241 C 1 *
+bit 1240 I 1 IO_W22
+bit 1239 O 1 IO_W22 1238 1 Z
+bit 1238 C 1 *
+bit 1237 I 1 IO_Y22
+bit 1236 O 1 IO_Y22 1235 1 Z
+bit 1235 C 1 *
+bit 1234 I 1 IO_Y21
+bit 1233 O 1 IO_Y21 1232 1 Z
+bit 1232 C 1 *
+bit 1231 O 1 *
+bit 1230 O 1 *
+bit 1229 O 1 *
+bit 1228 O 1 *
+bit 1227 O 1 *
+bit 1226 O 1 *
+bit 1225 O 1 *
+bit 1224 O 1 *
+bit 1223 O 1 *
+bit 1222 O 1 *
+bit 1221 O 1 *
+bit 1220 O 1 *
+bit 1219 O 1 *
+bit 1218 O 1 *
+bit 1217 O 1 *
+bit 1216 O 1 *
+bit 1215 O 1 *
+bit 1214 O 1 *
+bit 1213 O 1 *
+bit 1212 O 1 *
+bit 1211 O 1 *
+bit 1210 O 1 *
+bit 1209 O 1 *
+bit 1208 O 1 *
+bit 1207 O 1 *
+bit 1206 O 1 *
+bit 1205 O 1 *
+bit 1204 O 1 *
+bit 1203 O 1 *
+bit 1202 O 1 *
+bit 1201 O 1 *
+bit 1200 O 1 *
+bit 1199 O 1 *
+bit 1198 O 1 *
+bit 1197 O 1 *
+bit 1196 O 1 *
+bit 1195 O 1 *
+bit 1194 O 1 *
+bit 1193 O 1 *
+bit 1192 O 1 *
+bit 1191 O 1 *
+bit 1190 O 1 *
+bit 1189 O 1 *
+bit 1188 O 1 *
+bit 1187 O 1 *
+bit 1186 O 1 *
+bit 1185 O 1 *
+bit 1184 O 1 *
+bit 1183 O 1 *
+bit 1182 O 1 *
+bit 1181 O 1 *
+bit 1180 I 1 IO_Y20
+bit 1179 O 1 IO_Y20 1178 1 Z
+bit 1178 C 1 *
+bit 1177 I 1 IO_Y19
+bit 1176 O 1 IO_Y19 1175 1 Z
+bit 1175 C 1 *
+bit 1174 I 1 CCLK_AA22
+bit 1173 O 1 CCLK_AA22 1172 1 Z
+bit 1172 C 1 *
+bit 1171 I 1 DONE_AB21
+bit 1170 O 1 DONE_AB21 1169 1 Z
+bit 1169 C 1 *
+bit 1168 I 1 IO_V18
+bit 1167 O 1 IO_V18 1166 1 Z
+bit 1166 C 1 *
+bit 1165 I 1 IO_AA20
+bit 1164 O 1 IO_AA20 1163 1 Z
+bit 1163 C 1 *
+bit 1162 I 1 IO_AB20
+bit 1161 O 1 IO_AB20 1160 1 Z
+bit 1160 C 1 *
+bit 1159 O 1 *
+bit 1158 O 1 *
+bit 1157 O 1 *
+bit 1156 O 1 *
+bit 1155 O 1 *
+bit 1154 O 1 *
+bit 1153 O 1 *
+bit 1152 O 1 *
+bit 1151 O 1 *
+bit 1150 I 1 IO_AA19
+bit 1149 O 1 IO_AA19 1148 1 Z
+bit 1148 C 1 *
+bit 1147 I 1 IO_AB19
+bit 1146 O 1 IO_AB19 1145 1 Z
+bit 1145 C 1 *
+bit 1144 I 1 IO_W18
+bit 1143 O 1 IO_W18 1142 1 Z
+bit 1142 C 1 *
+bit 1141 I 1 IO_Y18
+bit 1140 O 1 IO_Y18 1139 1 Z
+bit 1139 C 1 *
+bit 1138 O 1 *
+bit 1137 O 1 *
+bit 1136 O 1 *
+bit 1135 O 1 *
+bit 1134 O 1 *
+bit 1133 O 1 *
+bit 1132 O 1 *
+bit 1131 O 1 *
+bit 1130 O 1 *
+bit 1129 O 1 *
+bit 1128 O 1 *
+bit 1127 O 1 *
+bit 1126 O 1 *
+bit 1125 O 1 *
+bit 1124 O 1 *
+bit 1123 I 1 IO_U17
+bit 1122 O 1 IO_U17 1121 1 Z
+bit 1121 C 1 *
+bit 1120 I 1 IO_AA18
+bit 1119 O 1 IO_AA18 1118 1 Z
+bit 1118 C 1 *
+bit 1117 I 1 IO_AB18
+bit 1116 O 1 IO_AB18 1115 1 Z
+bit 1115 C 1 *
+bit 1114 I 1 IO_V17
+bit 1113 O 1 IO_V17 1112 1 Z
+bit 1112 C 1 *
+bit 1111 I 1 IO_W17
+bit 1110 O 1 IO_W17 1109 1 Z
+bit 1109 C 1 *
+bit 1108 I 1 IO_U16
+bit 1107 O 1 IO_U16 1106 1 Z
+bit 1106 C 1 *
+bit 1105 O 1 *
+bit 1104 O 1 *
+bit 1103 O 1 *
+bit 1102 O 1 *
+bit 1101 O 1 *
+bit 1100 O 1 *
+bit 1099 O 1 *
+bit 1098 O 1 *
+bit 1097 O 1 *
+bit 1096 O 1 *
+bit 1095 O 1 *
+bit 1094 O 1 *
+bit 1093 O 1 *
+bit 1092 O 1 *
+bit 1091 O 1 *
+bit 1090 I 1 IO_Y17
+bit 1089 O 1 IO_Y17 1088 1 Z
+bit 1088 C 1 *
+bit 1087 I 1 IO_AA17
+bit 1086 O 1 IO_AA17 1085 1 Z
+bit 1085 C 1 *
+bit 1084 I 1 IO_V16
+bit 1083 O 1 IO_V16 1082 1 Z
+bit 1082 C 1 *
+bit 1081 I 1 IO_W16
+bit 1080 O 1 IO_W16 1079 1 Z
+bit 1079 C 1 *
+bit 1078 O 1 *
+bit 1077 O 1 *
+bit 1076 O 1 *
+bit 1075 O 1 *
+bit 1074 O 1 *
+bit 1073 O 1 *
+bit 1072 O 1 *
+bit 1071 O 1 *
+bit 1070 O 1 *
+bit 1069 O 1 *
+bit 1068 O 1 *
+bit 1067 O 1 *
+bit 1066 O 1 *
+bit 1065 O 1 *
+bit 1064 O 1 *
+bit 1063 I 1 IO_Y16
+bit 1062 O 1 IO_Y16 1061 1 Z
+bit 1061 C 1 *
+bit 1060 I 1 IO_AA16
+bit 1059 O 1 IO_AA16 1058 1 Z
+bit 1058 C 1 *
+bit 1057 I 1 IO_AB16
+bit 1056 O 1 IO_AB16 1055 1 Z
+bit 1055 C 1 *
+bit 1054 I 1 IO_V15
+bit 1053 O 1 IO_V15 1052 1 Z
+bit 1052 C 1 *
+bit 1051 I 1 IO_W15
+bit 1050 O 1 IO_W15 1049 1 Z
+bit 1049 C 1 *
+bit 1048 O 1 *
+bit 1047 O 1 *
+bit 1046 O 1 *
+bit 1045 O 1 *
+bit 1044 O 1 *
+bit 1043 O 1 *
+bit 1042 O 1 *
+bit 1041 O 1 *
+bit 1040 O 1 *
+bit 1039 I 1 IO_AA15
+bit 1038 O 1 IO_AA15 1037 1 Z
+bit 1037 C 1 *
+bit 1036 I 1 IO_AB15
+bit 1035 O 1 IO_AB15 1034 1 Z
+bit 1034 C 1 *
+bit 1033 O 1 *
+bit 1032 O 1 *
+bit 1031 O 1 *
+bit 1030 I 1 IO_U14
+bit 1029 O 1 IO_U14 1028 1 Z
+bit 1028 C 1 *
+bit 1027 I 1 IO_V14
+bit 1026 O 1 IO_V14 1025 1 Z
+bit 1025 C 1 *
+bit 1024 O 1 *
+bit 1023 O 1 *
+bit 1022 O 1 *
+bit 1021 O 1 *
+bit 1020 O 1 *
+bit 1019 O 1 *
+bit 1018 I 1 IO_W14
+bit 1017 O 1 IO_W14 1016 1 Z
+bit 1016 C 1 *
+bit 1015 I 1 IO_AA14
+bit 1014 O 1 IO_AA14 1013 1 Z
+bit 1013 C 1 *
+bit 1012 I 1 IO_AB14
+bit 1011 O 1 IO_AB14 1010 1 Z
+bit 1010 C 1 *
+bit 1009 I 1 IO_U13
+bit 1008 O 1 IO_U13 1007 1 Z
+bit 1007 C 1 *
+bit 1006 I 1 IO_V13
+bit 1005 O 1 IO_V13 1004 1 Z
+bit 1004 C 1 *
+bit 1003 I 1 IO_W13
+bit 1002 O 1 IO_W13 1001 1 Z
+bit 1001 C 1 *
+bit 1000 I 1 IO_Y13
+bit 999 O 1 IO_Y13 998 1 Z
+bit 998 C 1 *
+bit 997 I 1 IO_AA13
+bit 996 O 1 IO_AA13 995 1 Z
+bit 995 C 1 *
+bit 994 I 1 IO_U12
+bit 993 O 1 IO_U12 992 1 Z
+bit 992 C 1 *
+bit 991 I 1 IO_V12
+bit 990 O 1 IO_V12 989 1 Z
+bit 989 C 1 *
+bit 988 I 1 IO_AB13
+bit 987 O 1 IO_AB13 986 1 Z
+bit 986 C 1 *
+bit 985 I 1 IO_W12
+bit 984 O 1 IO_W12 983 1 Z
+bit 983 C 1 *
+bit 982 I 1 IO_Y12
+bit 981 O 1 IO_Y12 980 1 Z
+bit 980 C 1 *
+bit 979 I 1 IO_AA12
+bit 978 O 1 IO_AA12 977 1 Z
+bit 977 C 1 *
+bit 976 I 1 IO_AB12
+bit 975 O 1 IO_AB12 974 1 Z
+bit 974 C 1 *
+bit 973 I 1 IO_AB11
+bit 972 O 1 IO_AB11 971 1 Z
+bit 971 C 1 *
+bit 970 I 1 IO_AA11
+bit 969 O 1 IO_AA11 968 1 Z
+bit 968 C 1 *
+bit 967 I 1 IO_Y11
+bit 966 O 1 IO_Y11 965 1 Z
+bit 965 C 1 *
+bit 964 I 1 IO_W11
+bit 963 O 1 IO_W11 962 1 Z
+bit 962 C 1 *
+bit 961 I 1 IO_V11
+bit 960 O 1 IO_V11 959 1 Z
+bit 959 C 1 *
+bit 958 I 1 IO_U11
+bit 957 O 1 IO_U11 956 1 Z
+bit 956 C 1 *
+bit 955 I 1 IO_AB10
+bit 954 O 1 IO_AB10 953 1 Z
+bit 953 C 1 *
+bit 952 I 1 IO_AA10
+bit 951 O 1 IO_AA10 950 1 Z
+bit 950 C 1 *
+bit 949 I 1 IO_Y10
+bit 948 O 1 IO_Y10 947 1 Z
+bit 947 C 1 *
+bit 946 I 1 IO_W10
+bit 945 O 1 IO_W10 944 1 Z
+bit 944 C 1 *
+bit 943 I 1 IO_V10
+bit 942 O 1 IO_V10 941 1 Z
+bit 941 C 1 *
+bit 940 I 1 IO_AB9
+bit 939 O 1 IO_AB9 938 1 Z
+bit 938 C 1 *
+bit 937 I 1 IO_AA9
+bit 936 O 1 IO_AA9 935 1 Z
+bit 935 C 1 *
+bit 934 I 1 IO_W9
+bit 933 O 1 IO_W9 932 1 Z
+bit 932 C 1 *
+bit 931 I 1 IO_V9
+bit 930 O 1 IO_V9 929 1 Z
+bit 929 C 1 *
+bit 928 I 1 IO_U10
+bit 927 O 1 IO_U10 926 1 Z
+bit 926 C 1 *
+bit 925 O 1 *
+bit 924 O 1 *
+bit 923 O 1 *
+bit 922 O 1 *
+bit 921 O 1 *
+bit 920 O 1 *
+bit 919 I 1 IO_AB8
+bit 918 O 1 IO_AB8 917 1 Z
+bit 917 C 1 *
+bit 916 I 1 IO_AA8
+bit 915 O 1 IO_AA8 914 1 Z
+bit 914 C 1 *
+bit 913 O 1 *
+bit 912 O 1 *
+bit 911 O 1 *
+bit 910 I 1 IO_W8
+bit 909 O 1 IO_W8 908 1 Z
+bit 908 C 1 *
+bit 907 I 1 IO_V8
+bit 906 O 1 IO_V8 905 1 Z
+bit 905 C 1 *
+bit 904 O 1 *
+bit 903 O 1 *
+bit 902 O 1 *
+bit 901 O 1 *
+bit 900 O 1 *
+bit 899 O 1 *
+bit 898 I 1 IO_U9
+bit 897 O 1 IO_U9 896 1 Z
+bit 896 C 1 *
+bit 895 I 1 IO_AB7
+bit 894 O 1 IO_AB7 893 1 Z
+bit 893 C 1 *
+bit 892 I 1 IO_AA7
+bit 891 O 1 IO_AA7 890 1 Z
+bit 890 C 1 *
+bit 889 I 1 IO_Y7
+bit 888 O 1 IO_Y7 887 1 Z
+bit 887 C 1 *
+bit 886 I 1 IO_W7
+bit 885 O 1 IO_W7 884 1 Z
+bit 884 C 1 *
+bit 883 O 1 *
+bit 882 O 1 *
+bit 881 O 1 *
+bit 880 O 1 *
+bit 879 O 1 *
+bit 878 O 1 *
+bit 877 O 1 *
+bit 876 O 1 *
+bit 875 O 1 *
+bit 874 O 1 *
+bit 873 O 1 *
+bit 872 O 1 *
+bit 871 O 1 *
+bit 870 O 1 *
+bit 869 O 1 *
+bit 868 I 1 IO_V7
+bit 867 O 1 IO_V7 866 1 Z
+bit 866 C 1 *
+bit 865 I 1 IO_AA6
+bit 864 O 1 IO_AA6 863 1 Z
+bit 863 C 1 *
+bit 862 I 1 IO_Y6
+bit 861 O 1 IO_Y6 860 1 Z
+bit 860 C 1 *
+bit 859 I 1 IO_W6
+bit 858 O 1 IO_W6 857 1 Z
+bit 857 C 1 *
+bit 856 I 1 IO_V6
+bit 855 O 1 IO_V6 854 1 Z
+bit 854 C 1 *
+bit 853 O 1 *
+bit 852 O 1 *
+bit 851 O 1 *
+bit 850 O 1 *
+bit 849 O 1 *
+bit 848 O 1 *
+bit 847 O 1 *
+bit 846 O 1 *
+bit 845 O 1 *
+bit 844 O 1 *
+bit 843 O 1 *
+bit 842 O 1 *
+bit 841 O 1 *
+bit 840 O 1 *
+bit 839 O 1 *
+bit 838 I 1 IO_U7
+bit 837 O 1 IO_U7 836 1 Z
+bit 836 C 1 *
+bit 835 I 1 IO_AB5
+bit 834 O 1 IO_AB5 833 1 Z
+bit 833 C 1 *
+bit 832 I 1 IO_AA5
+bit 831 O 1 IO_AA5 830 1 Z
+bit 830 C 1 *
+bit 829 I 1 IO_Y5
+bit 828 O 1 IO_Y5 827 1 Z
+bit 827 C 1 *
+bit 826 I 1 IO_W5
+bit 825 O 1 IO_W5 824 1 Z
+bit 824 C 1 *
+bit 823 O 1 *
+bit 822 O 1 *
+bit 821 O 1 *
+bit 820 O 1 *
+bit 819 O 1 *
+bit 818 O 1 *
+bit 817 O 1 *
+bit 816 O 1 *
+bit 815 O 1 *
+bit 814 O 1 *
+bit 813 O 1 *
+bit 812 O 1 *
+bit 811 O 1 *
+bit 810 O 1 *
+bit 809 O 1 *
+bit 808 I 1 IO_U6
+bit 807 O 1 IO_U6 806 1 Z
+bit 806 C 1 *
+bit 805 I 1 IO_AB4
+bit 804 O 1 IO_AB4 803 1 Z
+bit 803 C 1 *
+bit 802 I 1 IO_AA4
+bit 801 O 1 IO_AA4 800 1 Z
+bit 800 C 1 *
+bit 799 O 1 *
+bit 798 O 1 *
+bit 797 O 1 *
+bit 796 O 1 *
+bit 795 O 1 *
+bit 794 O 1 *
+bit 793 O 1 *
+bit 792 O 1 *
+bit 791 O 1 *
+bit 790 O 1 *
+bit 789 O 1 *
+bit 788 O 1 *
+bit 787 O 1 *
+bit 786 O 1 *
+bit 785 O 1 *
+bit 784 I 1 IO_Y4
+bit 783 O 1 IO_Y4 782 1 Z
+bit 782 C 1 *
+bit 781 I 1 IO_AA3
+bit 780 O 1 IO_AA3 779 1 Z
+bit 779 C 1 *
+bit 778 I 1 M2_AB3
+bit 777 I 1 M0_AB2
+bit 776 I 1 M1_AA1
+bit 775 I 1 IO_Y3
+bit 774 O 1 IO_Y3 773 1 Z
+bit 773 C 1 *
+bit 772 I 1 IO_Y2
+bit 771 O 1 IO_Y2 770 1 Z
+bit 770 C 1 *
+bit 769 O 1 *
+bit 768 O 1 *
+bit 767 O 1 *
+bit 766 O 1 *
+bit 765 O 1 *
+bit 764 O 1 *
+bit 763 O 1 *
+bit 762 O 1 *
+bit 761 O 1 *
+bit 760 O 1 *
+bit 759 O 1 *
+bit 758 O 1 *
+bit 757 O 1 *
+bit 756 O 1 *
+bit 755 O 1 *
+bit 754 O 1 *
+bit 753 O 1 *
+bit 752 O 1 *
+bit 751 O 1 *
+bit 750 O 1 *
+bit 749 O 1 *
+bit 748 O 1 *
+bit 747 O 1 *
+bit 746 O 1 *
+bit 745 O 1 *
+bit 744 O 1 *
+bit 743 O 1 *
+bit 742 O 1 *
+bit 741 O 1 *
+bit 740 O 1 *
+bit 739 O 1 *
+bit 738 O 1 *
+bit 737 O 1 *
+bit 736 O 1 *
+bit 735 O 1 *
+bit 734 O 1 *
+bit 733 O 1 *
+bit 732 O 1 *
+bit 731 O 1 *
+bit 730 O 1 *
+bit 729 O 1 *
+bit 728 O 1 *
+bit 727 O 1 *
+bit 726 O 1 *
+bit 725 O 1 *
+bit 724 O 1 *
+bit 723 O 1 *
+bit 722 O 1 *
+bit 721 O 1 *
+bit 720 O 1 *
+bit 719 O 1 *
+bit 718 I 1 IO_Y1
+bit 717 O 1 IO_Y1 716 1 Z
+bit 716 C 1 *
+bit 715 I 1 IO_W4
+bit 714 O 1 IO_W4 713 1 Z
+bit 713 C 1 *
+bit 712 I 1 IO_W3
+bit 711 O 1 IO_W3 710 1 Z
+bit 710 C 1 *
+bit 709 I 1 IO_W2
+bit 708 O 1 IO_W2 707 1 Z
+bit 707 C 1 *
+bit 706 I 1 IO_W1
+bit 705 O 1 IO_W1 704 1 Z
+bit 704 C 1 *
+bit 703 I 1 IO_V5
+bit 702 O 1 IO_V5 701 1 Z
+bit 701 C 1 *
+bit 700 I 1 IO_U5
+bit 699 O 1 IO_U5 698 1 Z
+bit 698 C 1 *
+bit 697 I 1 IO_V4
+bit 696 O 1 IO_V4 695 1 Z
+bit 695 C 1 *
+bit 694 I 1 IO_V3
+bit 693 O 1 IO_V3 692 1 Z
+bit 692 C 1 *
+bit 691 I 1 IO_V2
+bit 690 O 1 IO_V2 689 1 Z
+bit 689 C 1 *
+bit 688 I 1 IO_V1
+bit 687 O 1 IO_V1 686 1 Z
+bit 686 C 1 *
+bit 685 I 1 IO_T6
+bit 684 O 1 IO_T6 683 1 Z
+bit 683 C 1 *
+bit 682 I 1 IO_T5
+bit 681 O 1 IO_T5 680 1 Z
+bit 680 C 1 *
+bit 679 I 1 IO_U4
+bit 678 O 1 IO_U4 677 1 Z
+bit 677 C 1 *
+bit 676 I 1 IO_T4
+bit 675 O 1 IO_T4 674 1 Z
+bit 674 C 1 *
+bit 673 I 1 IO_U3
+bit 672 O 1 IO_U3 671 1 Z
+bit 671 C 1 *
+bit 670 I 1 IO_U2
+bit 669 O 1 IO_U2 668 1 Z
+bit 668 C 1 *
+bit 667 I 1 IO_T3
+bit 666 O 1 IO_T3 665 1 Z
+bit 665 C 1 *
+bit 664 I 1 IO_R4
+bit 663 O 1 IO_R4 662 1 Z
+bit 662 C 1 *
+bit 661 I 1 IO_T2
+bit 660 O 1 IO_T2 659 1 Z
+bit 659 C 1 *
+bit 658 I 1 IO_T1
+bit 657 O 1 IO_T1 656 1 Z
+bit 656 C 1 *
+bit 655 I 1 IO_R5
+bit 654 O 1 IO_R5 653 1 Z
+bit 653 C 1 *
+bit 652 I 1 IO_P6
+bit 651 O 1 IO_P6 650 1 Z
+bit 650 C 1 *
+bit 649 I 1 IO_R2
+bit 648 O 1 IO_R2 647 1 Z
+bit 647 C 1 *
+bit 646 I 1 IO_R1
+bit 645 O 1 IO_R1 644 1 Z
+bit 644 C 1 *
+bit 643 O 1 *
+bit 642 O 1 *
+bit 641 O 1 *
+bit 640 O 1 *
+bit 639 O 1 *
+bit 638 O 1 *
+bit 637 I 1 IO_P5
+bit 636 O 1 IO_P5 635 1 Z
+bit 635 C 1 *
+bit 634 I 1 IO_P4
+bit 633 O 1 IO_P4 632 1 Z
+bit 632 C 1 *
+bit 631 I 1 IO_P2
+bit 630 O 1 IO_P2 629 1 Z
+bit 629 C 1 *
+bit 628 I 1 IO_P1
+bit 627 O 1 IO_P1 626 1 Z
+bit 626 C 1 *
+bit 625 I 1 IO_N6
+bit 624 O 1 IO_N6 623 1 Z
+bit 623 C 1 *
+bit 622 I 1 IO_N5
+bit 621 O 1 IO_N5 620 1 Z
+bit 620 C 1 *
+bit 619 I 1 IO_N4
+bit 618 O 1 IO_N4 617 1 Z
+bit 617 C 1 *
+bit 616 I 1 IO_N3
+bit 615 O 1 IO_N3 614 1 Z
+bit 614 C 1 *
+bit 613 I 1 IO_N2
+bit 612 O 1 IO_N2 611 1 Z
+bit 611 C 1 *
+bit 610 I 1 IO_N1
+bit 609 O 1 IO_N1 608 1 Z
+bit 608 C 1 *
+bit 607 O 1 *
+bit 606 O 1 *
+bit 605 O 1 *
+bit 604 O 1 *
+bit 603 O 1 *
+bit 602 O 1 *
+bit 601 I 1 IO_M6
+bit 600 O 1 IO_M6 599 1 Z
+bit 599 C 1 *
+bit 598 I 1 IO_M5
+bit 597 O 1 IO_M5 596 1 Z
+bit 596 C 1 *
+bit 595 I 1 IO_M4
+bit 594 O 1 IO_M4 593 1 Z
+bit 593 C 1 *
+bit 592 I 1 IO_M3
+bit 591 O 1 IO_M3 590 1 Z
+bit 590 C 1 *
+bit 589 I 1 IO_M2
+bit 588 O 1 IO_M2 587 1 Z
+bit 587 C 1 *
+bit 586 I 1 IO_M1
+bit 585 O 1 IO_M1 584 1 Z
+bit 584 C 1 *
+bit 583 I 1 IO_L1
+bit 582 O 1 IO_L1 581 1 Z
+bit 581 C 1 *
+bit 580 I 1 IO_L2
+bit 579 O 1 IO_L2 578 1 Z
+bit 578 C 1 *
+bit 577 I 1 IO_L3
+bit 576 O 1 IO_L3 575 1 Z
+bit 575 C 1 *
+bit 574 I 1 IO_L4
+bit 573 O 1 IO_L4 572 1 Z
+bit 572 C 1 *
+bit 571 I 1 IO_L5
+bit 570 O 1 IO_L5 569 1 Z
+bit 569 C 1 *
+bit 568 I 1 IO_L6
+bit 567 O 1 IO_L6 566 1 Z
+bit 566 C 1 *
+bit 565 O 1 *
+bit 564 O 1 *
+bit 563 O 1 *
+bit 562 O 1 *
+bit 561 O 1 *
+bit 560 O 1 *
+bit 559 I 1 IO_K1
+bit 558 O 1 IO_K1 557 1 Z
+bit 557 C 1 *
+bit 556 I 1 IO_K2
+bit 555 O 1 IO_K2 554 1 Z
+bit 554 C 1 *
+bit 553 I 1 IO_K3
+bit 552 O 1 IO_K3 551 1 Z
+bit 551 C 1 *
+bit 550 I 1 IO_K4
+bit 549 O 1 IO_K4 548 1 Z
+bit 548 C 1 *
+bit 547 I 1 IO_K5
+bit 546 O 1 IO_K5 545 1 Z
+bit 545 C 1 *
+bit 544 I 1 IO_K6
+bit 543 O 1 IO_K6 542 1 Z
+bit 542 C 1 *
+bit 541 I 1 IO_J1
+bit 540 O 1 IO_J1 539 1 Z
+bit 539 C 1 *
+bit 538 I 1 IO_J2
+bit 537 O 1 IO_J2 536 1 Z
+bit 536 C 1 *
+bit 535 I 1 IO_J5
+bit 534 O 1 IO_J5 533 1 Z
+bit 533 C 1 *
+bit 532 I 1 IO_J6
+bit 531 O 1 IO_J6 530 1 Z
+bit 530 C 1 *
+bit 529 O 1 *
+bit 528 O 1 *
+bit 527 O 1 *
+bit 526 O 1 *
+bit 525 O 1 *
+bit 524 O 1 *
+bit 523 I 1 IO_J4
+bit 522 O 1 IO_J4 521 1 Z
+bit 521 C 1 *
+bit 520 I 1 IO_H4
+bit 519 O 1 IO_H4 518 1 Z
+bit 518 C 1 *
+bit 517 I 1 IO_H1
+bit 516 O 1 IO_H1 515 1 Z
+bit 515 C 1 *
+bit 514 I 1 IO_H2
+bit 513 O 1 IO_H2 512 1 Z
+bit 512 C 1 *
+bit 511 I 1 IO_G1
+bit 510 O 1 IO_G1 509 1 Z
+bit 509 C 1 *
+bit 508 I 1 IO_G2
+bit 507 O 1 IO_G2 506 1 Z
+bit 506 C 1 *
+bit 505 I 1 IO_G3
+bit 504 O 1 IO_G3 503 1 Z
+bit 503 C 1 *
+bit 502 I 1 IO_G4
+bit 501 O 1 IO_G4 500 1 Z
+bit 500 C 1 *
+bit 499 I 1 IO_H5
+bit 498 O 1 IO_H5 497 1 Z
+bit 497 C 1 *
+bit 496 I 1 IO_G5
+bit 495 O 1 IO_G5 494 1 Z
+bit 494 C 1 *
+bit 493 I 1 IO_F2
+bit 492 O 1 IO_F2 491 1 Z
+bit 491 C 1 *
+bit 490 I 1 IO_F3
+bit 489 O 1 IO_F3 488 1 Z
+bit 488 C 1 *
+bit 487 I 1 IO_G6
+bit 486 O 1 IO_G6 485 1 Z
+bit 485 C 1 *
+bit 484 I 1 IO_F5
+bit 483 O 1 IO_F5 482 1 Z
+bit 482 C 1 *
+bit 481 I 1 IO_E1
+bit 480 O 1 IO_E1 479 1 Z
+bit 479 C 1 *
+bit 478 I 1 IO_E2
+bit 477 O 1 IO_E2 476 1 Z
+bit 476 C 1 *
+bit 475 I 1 IO_F4
+bit 474 O 1 IO_F4 473 1 Z
+bit 473 C 1 *
+bit 472 I 1 IO_E3
+bit 471 O 1 IO_E3 470 1 Z
+bit 470 C 1 *
+bit 469 I 1 IO_D3
+bit 468 O 1 IO_D3 467 1 Z
+bit 467 C 1 *
+bit 466 I 1 IO_D2
+bit 465 O 1 IO_D2 464 1 Z
+bit 464 C 1 *
+bit 463 I 1 IO_E4
+bit 462 O 1 IO_E4 461 1 Z
+bit 461 C 1 *
+bit 460 I 1 IO_D4
+bit 459 O 1 IO_D4 458 1 Z
+bit 458 C 1 *
+bit 457 I 1 IO_D1
+bit 456 O 1 IO_D1 455 1 Z
+bit 455 C 1 *
+bit 454 I 1 IO_C1
+bit 453 O 1 IO_C1 452 1 Z
+bit 452 C 1 *
+bit 451 I 1 IO_C2
+bit 450 O 1 IO_C2 449 1 Z
+bit 449 C 1 *
+bit 448 O 1 *
+bit 447 O 1 *
+bit 446 O 1 *
+bit 445 O 1 *
+bit 444 O 1 *
+bit 443 O 1 *
+bit 442 O 1 *
+bit 441 O 1 *
+bit 440 O 1 *
+bit 439 O 1 *
+bit 438 O 1 *
+bit 437 O 1 *
+bit 436 O 1 *
+bit 435 O 1 *
+bit 434 O 1 *
+bit 433 O 1 *
+bit 432 O 1 *
+bit 431 O 1 *
+bit 430 O 1 *
+bit 429 O 1 *
+bit 428 O 1 *
+bit 427 O 1 *
+bit 426 O 1 *
+bit 425 O 1 *
+bit 424 O 1 *
+bit 423 O 1 *
+bit 422 O 1 *
+bit 421 O 1 *
+bit 420 O 1 *
+bit 419 O 1 *
+bit 418 O 1 *
+bit 417 O 1 *
+bit 416 O 1 *
+bit 415 O 1 *
+bit 414 O 1 *
+bit 413 O 1 *
+bit 412 O 1 *
+bit 411 O 1 *
+bit 410 O 1 *
+bit 409 O 1 *
+bit 408 O 1 *
+bit 407 O 1 *
+bit 406 O 1 *
+bit 405 O 1 *
+bit 404 O 1 *
+bit 403 O 1 *
+bit 402 O 1 *
+bit 401 O 1 *
+bit 400 O 1 *
+bit 399 O 1 *
+bit 398 O 1 *
+bit 397 I 1 IO_C3
+bit 396 O 1 IO_C3 395 1 Z
+bit 395 C 1 *
+bit 394 I 1 IO_C4
+bit 393 O 1 IO_C4 392 1 Z
+bit 392 C 1 *
+bit 391 O 1 *
+bit 390 I 1 HSWAP_EN_B3
+bit 389 I 1 IO_A3
+bit 388 O 1 IO_A3 387 1 Z
+bit 387 C 1 *
+bit 386 I 1 IO_B4
+bit 385 O 1 IO_B4 384 1 Z
+bit 384 C 1 *
+bit 383 I 1 IO_A4
+bit 382 O 1 IO_A4 381 1 Z
+bit 381 C 1 *
+bit 380 O 1 *
+bit 379 O 1 *
+bit 378 O 1 *
+bit 377 O 1 *
+bit 376 O 1 *
+bit 375 O 1 *
+bit 374 O 1 *
+bit 373 O 1 *
+bit 372 O 1 *
+bit 371 O 1 *
+bit 370 O 1 *
+bit 369 O 1 *
+bit 368 I 1 IO_E5
+bit 367 O 1 IO_E5 366 1 Z
+bit 366 C 1 *
+bit 365 I 1 IO_D5
+bit 364 O 1 IO_D5 363 1 Z
+bit 363 C 1 *
+bit 362 I 1 IO_C5
+bit 361 O 1 IO_C5 360 1 Z
+bit 360 C 1 *
+bit 359 O 1 *
+bit 358 O 1 *
+bit 357 O 1 *
+bit 356 O 1 *
+bit 355 O 1 *
+bit 354 O 1 *
+bit 353 O 1 *
+bit 352 O 1 *
+bit 351 O 1 *
+bit 350 O 1 *
+bit 349 O 1 *
+bit 348 O 1 *
+bit 347 O 1 *
+bit 346 O 1 *
+bit 345 O 1 *
+bit 344 I 1 IO_F6
+bit 343 O 1 IO_F6 342 1 Z
+bit 342 C 1 *
+bit 341 I 1 IO_B5
+bit 340 O 1 IO_B5 339 1 Z
+bit 339 C 1 *
+bit 338 I 1 IO_A5
+bit 337 O 1 IO_A5 336 1 Z
+bit 336 C 1 *
+bit 335 I 1 IO_E6
+bit 334 O 1 IO_E6 333 1 Z
+bit 333 C 1 *
+bit 332 I 1 IO_D6
+bit 331 O 1 IO_D6 330 1 Z
+bit 330 C 1 *
+bit 329 I 1 IO_F7
+bit 328 O 1 IO_F7 327 1 Z
+bit 327 C 1 *
+bit 326 O 1 *
+bit 325 O 1 *
+bit 324 O 1 *
+bit 323 O 1 *
+bit 322 O 1 *
+bit 321 O 1 *
+bit 320 O 1 *
+bit 319 O 1 *
+bit 318 O 1 *
+bit 317 O 1 *
+bit 316 O 1 *
+bit 315 O 1 *
+bit 314 O 1 *
+bit 313 O 1 *
+bit 312 O 1 *
+bit 311 I 1 IO_C6
+bit 310 O 1 IO_C6 309 1 Z
+bit 309 C 1 *
+bit 308 I 1 IO_B6
+bit 307 O 1 IO_B6 306 1 Z
+bit 306 C 1 *
+bit 305 I 1 IO_E7
+bit 304 O 1 IO_E7 303 1 Z
+bit 303 C 1 *
+bit 302 I 1 IO_D7
+bit 301 O 1 IO_D7 300 1 Z
+bit 300 C 1 *
+bit 299 O 1 *
+bit 298 O 1 *
+bit 297 O 1 *
+bit 296 O 1 *
+bit 295 O 1 *
+bit 294 O 1 *
+bit 293 O 1 *
+bit 292 O 1 *
+bit 291 O 1 *
+bit 290 O 1 *
+bit 289 O 1 *
+bit 288 O 1 *
+bit 287 O 1 *
+bit 286 O 1 *
+bit 285 O 1 *
+bit 284 I 1 IO_C7
+bit 283 O 1 IO_C7 282 1 Z
+bit 282 C 1 *
+bit 281 I 1 IO_B7
+bit 280 O 1 IO_B7 279 1 Z
+bit 279 C 1 *
+bit 278 I 1 IO_A7
+bit 277 O 1 IO_A7 276 1 Z
+bit 276 C 1 *
+bit 275 I 1 IO_E8
+bit 274 O 1 IO_E8 273 1 Z
+bit 273 C 1 *
+bit 272 I 1 IO_D8
+bit 271 O 1 IO_D8 270 1 Z
+bit 270 C 1 *
+bit 269 O 1 *
+bit 268 O 1 *
+bit 267 O 1 *
+bit 266 O 1 *
+bit 265 O 1 *
+bit 264 O 1 *
+bit 263 O 1 *
+bit 262 O 1 *
+bit 261 O 1 *
+bit 260 I 1 IO_B8
+bit 259 O 1 IO_B8 258 1 Z
+bit 258 C 1 *
+bit 257 I 1 IO_A8
+bit 256 O 1 IO_A8 255 1 Z
+bit 255 C 1 *
+bit 254 O 1 *
+bit 253 O 1 *
+bit 252 O 1 *
+bit 251 I 1 IO_F9
+bit 250 O 1 IO_F9 249 1 Z
+bit 249 C 1 *
+bit 248 I 1 IO_E9
+bit 247 O 1 IO_E9 246 1 Z
+bit 246 C 1 *
+bit 245 O 1 *
+bit 244 O 1 *
+bit 243 O 1 *
+bit 242 O 1 *
+bit 241 O 1 *
+bit 240 O 1 *
+bit 239 I 1 IO_D9
+bit 238 O 1 IO_D9 237 1 Z
+bit 237 C 1 *
+bit 236 I 1 IO_B9
+bit 235 O 1 IO_B9 234 1 Z
+bit 234 C 1 *
+bit 233 I 1 IO_A9
+bit 232 O 1 IO_A9 231 1 Z
+bit 231 C 1 *
+bit 230 I 1 IO_F10
+bit 229 O 1 IO_F10 228 1 Z
+bit 228 C 1 *
+bit 227 I 1 IO_E10
+bit 226 O 1 IO_E10 225 1 Z
+bit 225 C 1 *
+bit 224 I 1 IO_D10
+bit 223 O 1 IO_D10 222 1 Z
+bit 222 C 1 *
+bit 221 I 1 IO_C10
+bit 220 O 1 IO_C10 219 1 Z
+bit 219 C 1 *
+bit 218 I 1 IO_B10
+bit 217 O 1 IO_B10 216 1 Z
+bit 216 C 1 *
+bit 215 I 1 IO_F11
+bit 214 O 1 IO_F11 213 1 Z
+bit 213 C 1 *
+bit 212 I 1 IO_E11
+bit 211 O 1 IO_E11 210 1 Z
+bit 210 C 1 *
+bit 209 I 1 IO_A10
+bit 208 O 1 IO_A10 207 1 Z
+bit 207 C 1 *
+bit 206 I 1 IO_D11
+bit 205 O 1 IO_D11 204 1 Z
+bit 204 C 1 *
+bit 203 I 1 IO_C11
+bit 202 O 1 IO_C11 201 1 Z
+bit 201 C 1 *
+bit 200 I 1 IO_B11
+bit 199 O 1 IO_B11 198 1 Z
+bit 198 C 1 *
+bit 197 I 1 IO_A11
+bit 196 O 1 IO_A11 195 1 Z
+bit 195 C 1 *
+bit 194 I 1 IO_A12
+bit 193 O 1 IO_A12 192 1 Z
+bit 192 C 1 *
+bit 191 I 1 IO_B12
+bit 190 O 1 IO_B12 189 1 Z
+bit 189 C 1 *
+bit 188 I 1 IO_C12
+bit 187 O 1 IO_C12 186 1 Z
+bit 186 C 1 *
+bit 185 I 1 IO_D12
+bit 184 O 1 IO_D12 183 1 Z
+bit 183 C 1 *
+bit 182 I 1 IO_E12
+bit 181 O 1 IO_E12 180 1 Z
+bit 180 C 1 *
+bit 179 I 1 IO_F12
+bit 178 O 1 IO_F12 177 1 Z
+bit 177 C 1 *
+bit 176 I 1 IO_A13
+bit 175 O 1 IO_A13 174 1 Z
+bit 174 C 1 *
+bit 173 I 1 IO_B13
+bit 172 O 1 IO_B13 171 1 Z
+bit 171 C 1 *
+bit 170 I 1 IO_C13
+bit 169 O 1 IO_C13 168 1 Z
+bit 168 C 1 *
+bit 167 I 1 IO_D13
+bit 166 O 1 IO_D13 165 1 Z
+bit 165 C 1 *
+bit 164 I 1 IO_E13
+bit 163 O 1 IO_E13 162 1 Z
+bit 162 C 1 *
+bit 161 I 1 IO_A14
+bit 160 O 1 IO_A14 159 1 Z
+bit 159 C 1 *
+bit 158 I 1 IO_B14
+bit 157 O 1 IO_B14 156 1 Z
+bit 156 C 1 *
+bit 155 I 1 IO_D14
+bit 154 O 1 IO_D14 153 1 Z
+bit 153 C 1 *
+bit 152 I 1 IO_E14
+bit 151 O 1 IO_E14 150 1 Z
+bit 150 C 1 *
+bit 149 I 1 IO_F13
+bit 148 O 1 IO_F13 147 1 Z
+bit 147 C 1 *
+bit 146 O 1 *
+bit 145 O 1 *
+bit 144 O 1 *
+bit 143 O 1 *
+bit 142 O 1 *
+bit 141 O 1 *
+bit 140 I 1 IO_B15
+bit 139 O 1 IO_B15 138 1 Z
+bit 138 C 1 *
+bit 137 I 1 IO_A15
+bit 136 O 1 IO_A15 135 1 Z
+bit 135 C 1 *
+bit 134 O 1 *
+bit 133 O 1 *
+bit 132 O 1 *
+bit 131 I 1 IO_D15
+bit 130 O 1 IO_D15 129 1 Z
+bit 129 C 1 *
+bit 128 I 1 IO_E15
+bit 127 O 1 IO_E15 126 1 Z
+bit 126 C 1 *
+bit 125 O 1 *
+bit 124 O 1 *
+bit 123 O 1 *
+bit 122 O 1 *
+bit 121 O 1 *
+bit 120 O 1 *
+bit 119 I 1 IO_F14
+bit 118 O 1 IO_F14 117 1 Z
+bit 117 C 1 *
+bit 116 I 1 IO_A16
+bit 115 O 1 IO_A16 114 1 Z
+bit 114 C 1 *
+bit 113 I 1 IO_B16
+bit 112 O 1 IO_B16 111 1 Z
+bit 111 C 1 *
+bit 110 I 1 IO_C16
+bit 109 O 1 IO_C16 108 1 Z
+bit 108 C 1 *
+bit 107 I 1 IO_D16
+bit 106 O 1 IO_D16 105 1 Z
+bit 105 C 1 *
+bit 104 O 1 *
+bit 103 O 1 *
+bit 102 O 1 *
+bit 101 O 1 *
+bit 100 O 1 *
+bit 99 O 1 *
+bit 98 O 1 *
+bit 97 O 1 *
+bit 96 O 1 *
+bit 95 O 1 *
+bit 94 O 1 *
+bit 93 O 1 *
+bit 92 O 1 *
+bit 91 O 1 *
+bit 90 O 1 *
+bit 89 I 1 IO_E16
+bit 88 O 1 IO_E16 87 1 Z
+bit 87 C 1 *
+bit 86 I 1 IO_B17
+bit 85 O 1 IO_B17 84 1 Z
+bit 84 C 1 *
+bit 83 I 1 IO_C17
+bit 82 O 1 IO_C17 81 1 Z
+bit 81 C 1 *
+bit 80 I 1 IO_D17
+bit 79 O 1 IO_D17 78 1 Z
+bit 78 C 1 *
+bit 77 I 1 IO_E17
+bit 76 O 1 IO_E17 75 1 Z
+bit 75 C 1 *
+bit 74 O 1 *
+bit 73 O 1 *
+bit 72 O 1 *
+bit 71 O 1 *
+bit 70 O 1 *
+bit 69 O 1 *
+bit 68 O 1 *
+bit 67 O 1 *
+bit 66 O 1 *
+bit 65 O 1 *
+bit 64 O 1 *
+bit 63 O 1 *
+bit 62 O 1 *
+bit 61 O 1 *
+bit 60 O 1 *
+bit 59 I 1 IO_F16
+bit 58 O 1 IO_F16 57 1 Z
+bit 57 C 1 *
+bit 56 I 1 IO_A18
+bit 55 O 1 IO_A18 54 1 Z
+bit 54 C 1 *
+bit 53 I 1 IO_B18
+bit 52 O 1 IO_B18 51 1 Z
+bit 51 C 1 *
+bit 50 I 1 IO_C18
+bit 49 O 1 IO_C18 48 1 Z
+bit 48 C 1 *
+bit 47 I 1 IO_D18
+bit 46 O 1 IO_D18 45 1 Z
+bit 45 C 1 *
+bit 44 O 1 *
+bit 43 O 1 *
+bit 42 O 1 *
+bit 41 O 1 *
+bit 40 O 1 *
+bit 39 O 1 *
+bit 38 O 1 *
+bit 37 O 1 *
+bit 36 O 1 *
+bit 35 O 1 *
+bit 34 O 1 *
+bit 33 O 1 *
+bit 32 O 1 *
+bit 31 O 1 *
+bit 30 O 1 *
+bit 29 I 1 IO_F17
+bit 28 O 1 IO_F17 27 1 Z
+bit 27 C 1 *
+bit 26 I 1 IO_A19
+bit 25 O 1 IO_A19 24 1 Z
+bit 24 C 1 *
+bit 23 I 1 IO_B19
+bit 22 O 1 IO_B19 21 1 Z
+bit 21 C 1 *
+bit 20 O 1 *
+bit 19 O 1 *
+bit 18 O 1 *
+bit 17 O 1 *
+bit 16 O 1 *
+bit 15 O 1 *
+bit 14 O 1 *
+bit 13 O 1 *
+bit 12 O 1 *
+bit 11 O 1 *
+bit 10 O 1 *
+bit 9 O 1 *
+bit 8 O 1 *
+bit 7 O 1 *
+bit 6 O 1 *
+bit 5 I 1 IO_C19
+bit 4 O 1 IO_C19 3 1 Z
+bit 3 C 1 *
+bit 2 I 1 IO_B20
+bit 1 O 1 IO_B20 0 1 Z
+bit 0 C 1 *
--- /dev/null
+signal GND1
+signal GND2
+signal GND3
+signal GND4
+signal GND5
+signal GND6
+signal GND7
+signal GND8
+signal GND9
+signal GND10
+signal GND11
+signal GND12
+signal GND13
+signal GND14
+signal GND15
+signal GND16
+signal GND17
+signal GND18
+signal GND19
+signal GND20
+signal GND21
+signal GND22
+signal GND23
+signal GND24
+signal GND25
+signal GND26
+signal GND27
+signal GND28
+signal GND29
+signal GND30
+signal GND31
+signal GND32
+signal GND33
+signal GND34
+signal GND35
+signal GND36
+signal GND37
+signal GND38
+signal GND39
+signal GND40
+signal GND41
+signal GND42
+signal GND43
+signal GND44
+signal GND45
+signal GND46
+signal GND47
+signal GND48
+signal GND49
+signal GND50
+signal GND51
+signal GND52
+signal GND53
+signal GND54
+signal GND55
+signal GND56
+signal GND57
+signal GND58
+signal GND59
+signal GND60
+signal GND61
+signal GND62
+signal GND63
+signal GND64
+signal GND65
+signal GND66
+signal GND67
+signal GND68
+signal GND69
+signal GND70
+signal GND71
+signal GND72
+signal GND73
+signal GND74
+signal GND75
+signal GND76
+signal CCLK_AD26
+signal DONE_AC24
+signal HSWAP_EN_C2
+signal M0_AE3
+signal M1_AC3
+signal M2_AF3
+signal PROG_B
+signal TCK
+signal TDI
+signal TDO
+signal TMS
+signal VCCAUX1
+signal VCCAUX2
+signal VCCAUX3
+signal VCCAUX4
+signal VCCAUX5
+signal VCCAUX6
+signal VCCAUX7
+signal VCCAUX8
+signal VCCAUX9
+signal VCCAUX10
+signal VCCAUX11
+signal VCCAUX12
+signal VCCAUX13
+signal VCCAUX14
+signal VCCAUX15
+signal VCCAUX16
+signal VCCINT1
+signal VCCINT2
+signal VCCINT3
+signal VCCINT4
+signal VCCINT5
+signal VCCINT6
+signal VCCINT7
+signal VCCINT8
+signal VCCINT9
+signal VCCINT10
+signal VCCINT11
+signal VCCINT12
+signal VCCINT13
+signal VCCINT14
+signal VCCINT15
+signal VCCINT16
+signal VCCINT17
+signal VCCINT18
+signal VCCINT19
+signal VCCINT20
+signal VCCO01
+signal VCCO02
+signal VCCO03
+signal VCCO04
+signal VCCO05
+signal VCCO06
+signal VCCO07
+signal VCCO08
+signal VCCO11
+signal VCCO12
+signal VCCO13
+signal VCCO14
+signal VCCO15
+signal VCCO16
+signal VCCO17
+signal VCCO18
+signal VCCO21
+signal VCCO22
+signal VCCO23
+signal VCCO24
+signal VCCO25
+signal VCCO26
+signal VCCO27
+signal VCCO28
+signal VCCO31
+signal VCCO32
+signal VCCO33
+signal VCCO34
+signal VCCO35
+signal VCCO36
+signal VCCO37
+signal VCCO38
+signal VCCO41
+signal VCCO42
+signal VCCO43
+signal VCCO44
+signal VCCO45
+signal VCCO46
+signal VCCO47
+signal VCCO48
+signal VCCO51
+signal VCCO52
+signal VCCO53
+signal VCCO54
+signal VCCO55
+signal VCCO56
+signal VCCO57
+signal VCCO58
+signal VCCO61
+signal VCCO62
+signal VCCO63
+signal VCCO64
+signal VCCO65
+signal VCCO66
+signal VCCO67
+signal VCCO68
+signal VCCO71
+signal VCCO72
+signal VCCO73
+signal VCCO74
+signal VCCO75
+signal VCCO76
+signal VCCO77
+signal VCCO78
+signal IO_A3
+signal IO_A4
+signal IO_A5
+signal IO_A6
+signal IO_A7
+signal IO_A8
+signal IO_A10
+signal IO_A11
+signal IO_A12
+signal IO_A13
+signal IO_A14
+signal IO_A15
+signal IO_A16
+signal IO_A17
+signal IO_A19
+signal IO_A20
+signal IO_A21
+signal IO_A22
+signal IO_A23
+signal IO_B3
+signal IO_B4
+signal IO_B5
+signal IO_B6
+signal IO_B7
+signal IO_B8
+signal IO_B9
+signal IO_B10
+signal IO_B11
+signal IO_B12
+signal IO_B13
+signal IO_B14
+signal IO_B15
+signal IO_B16
+signal IO_B17
+signal IO_B18
+signal IO_B19
+signal IO_B20
+signal IO_B21
+signal IO_B22
+signal IO_B23
+signal IO_C4
+signal IO_C5
+signal IO_C6
+signal IO_C8
+signal IO_C9
+signal IO_C10
+signal IO_C12
+signal IO_C13
+signal IO_C14
+signal IO_C15
+signal IO_C17
+signal IO_C18
+signal IO_C19
+signal IO_C21
+signal IO_C22
+signal IO_C23
+signal IO_C25
+signal IO_C26
+signal IO_D1
+signal IO_D2
+signal IO_D5
+signal IO_D6
+signal IO_D7
+signal IO_D8
+signal IO_D9
+signal IO_D10
+signal IO_D11
+signal IO_D13
+signal IO_D14
+signal IO_D16
+signal IO_D17
+signal IO_D18
+signal IO_D19
+signal IO_D20
+signal IO_D21
+signal IO_D22
+signal IO_D25
+signal IO_D26
+signal IO_E1
+signal IO_E2
+signal IO_E3
+signal IO_E4
+signal IO_E5
+signal IO_E6
+signal IO_E7
+signal IO_E8
+signal IO_E9
+signal IO_E10
+signal IO_E11
+signal IO_E12
+signal IO_E13
+signal IO_E14
+signal IO_E15
+signal IO_E16
+signal IO_E17
+signal IO_E18
+signal IO_E19
+signal IO_E20
+signal IO_E21
+signal IO_E22
+signal IO_E23
+signal IO_E24
+signal IO_E25
+signal IO_E26
+signal IO_F1
+signal IO_F2
+signal IO_F3
+signal IO_F4
+signal IO_F5
+signal IO_F6
+signal IO_F7
+signal IO_F8
+signal IO_F9
+signal IO_F10
+signal IO_F11
+signal IO_F12
+signal IO_F13
+signal IO_F14
+signal IO_F15
+signal IO_F16
+signal IO_F17
+signal IO_F18
+signal IO_F19
+signal IO_F20
+signal IO_F21
+signal IO_F23
+signal IO_F24
+signal IO_F25
+signal IO_F26
+signal IO_G1
+signal IO_G2
+signal IO_G4
+signal IO_G5
+signal IO_G6
+signal IO_G7
+signal IO_G8
+signal IO_G9
+signal IO_G10
+signal IO_G11
+signal IO_G12
+signal IO_G13
+signal IO_G14
+signal IO_G15
+signal IO_G16
+signal IO_G17
+signal IO_G18
+signal IO_G19
+signal IO_G20
+signal IO_G21
+signal IO_G22
+signal IO_G23
+signal IO_G25
+signal IO_G26
+signal IO_H1
+signal IO_H2
+signal IO_H3
+signal IO_H4
+signal IO_H5
+signal IO_H6
+signal IO_H7
+signal IO_H11
+signal IO_H12
+signal IO_H13
+signal IO_H14
+signal IO_H15
+signal IO_H16
+signal IO_H20
+signal IO_H21
+signal IO_H22
+signal IO_H23
+signal IO_H24
+signal IO_H25
+signal IO_H26
+signal IO_J2
+signal IO_J3
+signal IO_J4
+signal IO_J5
+signal IO_J6
+signal IO_J7
+signal IO_J20
+signal IO_J21
+signal IO_J22
+signal IO_J23
+signal IO_J24
+signal IO_J25
+signal IO_K1
+signal IO_K2
+signal IO_K3
+signal IO_K4
+signal IO_K5
+signal IO_K6
+signal IO_K7
+signal IO_K20
+signal IO_K21
+signal IO_K22
+signal IO_K23
+signal IO_K24
+signal IO_K25
+signal IO_K26
+signal IO_L1
+signal IO_L2
+signal IO_L4
+signal IO_L5
+signal IO_L6
+signal IO_L7
+signal IO_L8
+signal IO_L19
+signal IO_L20
+signal IO_L21
+signal IO_L22
+signal IO_L23
+signal IO_L25
+signal IO_L26
+signal IO_M1
+signal IO_M2
+signal IO_M3
+signal IO_M5
+signal IO_M6
+signal IO_M7
+signal IO_M8
+signal IO_M19
+signal IO_M20
+signal IO_M21
+signal IO_M22
+signal IO_M24
+signal IO_M25
+signal IO_M26
+signal IO_N1
+signal IO_N2
+signal IO_N3
+signal IO_N4
+signal IO_N5
+signal IO_N6
+signal IO_N7
+signal IO_N8
+signal IO_N19
+signal IO_N20
+signal IO_N21
+signal IO_N22
+signal IO_N23
+signal IO_N24
+signal IO_N25
+signal IO_N26
+signal IO_P1
+signal IO_P2
+signal IO_P3
+signal IO_P4
+signal IO_P5
+signal IO_P6
+signal IO_P7
+signal IO_P8
+signal IO_P19
+signal IO_P20
+signal IO_P21
+signal IO_P22
+signal IO_P23
+signal IO_P24
+signal IO_P25
+signal IO_P26
+signal IO_R1
+signal IO_R2
+signal IO_R3
+signal IO_R5
+signal IO_R6
+signal IO_R7
+signal IO_R8
+signal IO_R19
+signal IO_R20
+signal IO_R21
+signal IO_R22
+signal IO_R24
+signal IO_R25
+signal IO_R26
+signal IO_T1
+signal IO_T2
+signal IO_T4
+signal IO_T5
+signal IO_T6
+signal IO_T7
+signal IO_T8
+signal IO_T19
+signal IO_T20
+signal IO_T21
+signal IO_T22
+signal IO_T23
+signal IO_T25
+signal IO_T26
+signal IO_U1
+signal IO_U2
+signal IO_U3
+signal IO_U4
+signal IO_U5
+signal IO_U6
+signal IO_U7
+signal IO_U20
+signal IO_U21
+signal IO_U22
+signal IO_U23
+signal IO_U24
+signal IO_U25
+signal IO_U26
+signal IO_V2
+signal IO_V3
+signal IO_V4
+signal IO_V5
+signal IO_V6
+signal IO_V7
+signal IO_V20
+signal IO_V21
+signal IO_V22
+signal IO_V23
+signal IO_V24
+signal IO_V25
+signal IO_W1
+signal IO_W2
+signal IO_W3
+signal IO_W4
+signal IO_W5
+signal IO_W6
+signal IO_W7
+signal IO_W11
+signal IO_W12
+signal IO_W13
+signal IO_W14
+signal IO_W15
+signal IO_W16
+signal IO_W20
+signal IO_W21
+signal IO_W22
+signal IO_W23
+signal IO_W24
+signal IO_W25
+signal IO_W26
+signal IO_Y1
+signal IO_Y2
+signal IO_Y4
+signal IO_Y5
+signal IO_Y6
+signal IO_Y7
+signal IO_Y8
+signal IO_Y9
+signal IO_Y10
+signal IO_Y11
+signal IO_Y12
+signal IO_Y13
+signal IO_Y14
+signal IO_Y15
+signal IO_Y16
+signal IO_Y17
+signal IO_Y18
+signal IO_Y19
+signal IO_Y20
+signal IO_Y21
+signal IO_Y22
+signal IO_Y23
+signal IO_Y25
+signal IO_Y26
+signal IO_AA1
+signal IO_AA2
+signal IO_AA3
+signal IO_AA4
+signal IO_AA6
+signal IO_AA7
+signal IO_AA8
+signal IO_AA9
+signal IO_AA10
+signal IO_AA11
+signal IO_AA12
+signal IO_AA13
+signal IO_AA14
+signal IO_AA15
+signal IO_AA16
+signal IO_AA17
+signal IO_AA18
+signal IO_AA19
+signal IO_AA20
+signal IO_AA21
+signal IO_AA22
+signal IO_AA23
+signal IO_AA24
+signal IO_AA25
+signal IO_AA26
+signal IO_AB1
+signal IO_AB2
+signal IO_AB3
+signal IO_AB4
+signal IO_AB5
+signal IO_AB6
+signal IO_AB7
+signal IO_AB8
+signal IO_AB9
+signal IO_AB10
+signal IO_AB11
+signal IO_AB12
+signal IO_AB13
+signal IO_AB14
+signal IO_AB15
+signal IO_AB16
+signal IO_AB17
+signal IO_AB18
+signal IO_AB19
+signal IO_AB20
+signal IO_AB21
+signal IO_AB22
+signal IO_AB23
+signal IO_AB24
+signal IO_AB25
+signal IO_AB26
+signal IO_AC1
+signal IO_AC2
+signal IO_AC5
+signal IO_AC6
+signal IO_AC7
+signal IO_AC8
+signal IO_AC9
+signal IO_AC10
+signal IO_AC11
+signal IO_AC13
+signal IO_AC14
+signal IO_AC16
+signal IO_AC17
+signal IO_AC18
+signal IO_AC19
+signal IO_AC20
+signal IO_AC21
+signal IO_AC22
+signal IO_AC25
+signal IO_AC26
+signal IO_AD1
+signal IO_AD2
+signal IO_AD4
+signal IO_AD5
+signal IO_AD6
+signal IO_AD8
+signal IO_AD9
+signal IO_AD10
+signal IO_AD12
+signal IO_AD13
+signal IO_AD14
+signal IO_AD15
+signal IO_AD17
+signal IO_AD18
+signal IO_AD19
+signal IO_AD21
+signal IO_AD22
+signal IO_AD23
+signal IO_AD25
+signal IO_AE4
+signal IO_AE5
+signal IO_AE6
+signal IO_AE7
+signal IO_AE8
+signal IO_AE9
+signal IO_AE10
+signal IO_AE11
+signal IO_AE12
+signal IO_AE13
+signal IO_AE14
+signal IO_AE15
+signal IO_AE16
+signal IO_AE17
+signal IO_AE18
+signal IO_AE19
+signal IO_AE20
+signal IO_AE21
+signal IO_AE22
+signal IO_AE23
+signal IO_AE24
+signal IO_AF4
+signal IO_AF5
+signal IO_AF6
+signal IO_AF7
+signal IO_AF8
+signal IO_AF10
+signal IO_AF11
+signal IO_AF12
+signal IO_AF13
+signal IO_AF14
+signal IO_AF15
+signal IO_AF16
+signal IO_AF17
+signal IO_AF19
+signal IO_AF20
+signal IO_AF21
+signal IO_AF22
+signal IO_AF23
+
+register BSR 1559
+register BR 1
+register DIR 32
+
+instruction length 6
+
+instruction EXTEST 000000 BSR
+instruction SAMPLE/PRELOAD 000001 BSR
+instruction IDCODE 001001 DIR
+instruction BYPASS 111111 BR
+
+bit 1558 I 1 IO_C25
+bit 1557 O 1 IO_C25 1556 1 Z
+bit 1556 C 1 *
+bit 1555 I 1 IO_C26
+bit 1554 O 1 IO_C26 1553 1 Z
+bit 1553 C 1 *
+bit 1552 I 1 IO_E23
+bit 1551 O 1 IO_E23 1550 1 Z
+bit 1550 C 1 *
+bit 1549 I 1 IO_E24
+bit 1548 O 1 IO_E24 1547 1 Z
+bit 1547 C 1 *
+bit 1546 I 1 IO_D25
+bit 1545 O 1 IO_D25 1544 1 Z
+bit 1544 C 1 *
+bit 1543 I 1 IO_D26
+bit 1542 O 1 IO_D26 1541 1 Z
+bit 1541 C 1 *
+bit 1540 I 1 IO_E25
+bit 1539 O 1 IO_E25 1538 1 Z
+bit 1538 C 1 *
+bit 1537 I 1 IO_E26
+bit 1536 O 1 IO_E26 1535 1 Z
+bit 1535 C 1 *
+bit 1534 I 1 IO_G20
+bit 1533 O 1 IO_G20 1532 1 Z
+bit 1532 C 1 *
+bit 1531 I 1 IO_G21
+bit 1530 O 1 IO_G21 1529 1 Z
+bit 1529 C 1 *
+bit 1528 I 1 IO_F23
+bit 1527 O 1 IO_F23 1526 1 Z
+bit 1526 C 1 *
+bit 1525 I 1 IO_F24
+bit 1524 O 1 IO_F24 1523 1 Z
+bit 1523 C 1 *
+bit 1522 I 1 IO_G22
+bit 1521 O 1 IO_G22 1520 1 Z
+bit 1520 C 1 *
+bit 1519 I 1 IO_G23
+bit 1518 O 1 IO_G23 1517 1 Z
+bit 1517 C 1 *
+bit 1516 I 1 IO_F25
+bit 1515 O 1 IO_F25 1514 1 Z
+bit 1514 C 1 *
+bit 1513 I 1 IO_F26
+bit 1512 O 1 IO_F26 1511 1 Z
+bit 1511 C 1 *
+bit 1510 I 1 IO_G25
+bit 1509 O 1 IO_G25 1508 1 Z
+bit 1508 C 1 *
+bit 1507 I 1 IO_G26
+bit 1506 O 1 IO_G26 1505 1 Z
+bit 1505 C 1 *
+bit 1504 I 1 IO_H20
+bit 1503 O 1 IO_H20 1502 1 Z
+bit 1502 C 1 *
+bit 1501 I 1 IO_H21
+bit 1500 O 1 IO_H21 1499 1 Z
+bit 1499 C 1 *
+bit 1498 I 1 IO_H22
+bit 1497 O 1 IO_H22 1496 1 Z
+bit 1496 C 1 *
+bit 1495 I 1 IO_J21
+bit 1494 O 1 IO_J21 1493 1 Z
+bit 1493 C 1 *
+bit 1492 I 1 IO_H23
+bit 1491 O 1 IO_H23 1490 1 Z
+bit 1490 C 1 *
+bit 1489 I 1 IO_H24
+bit 1488 O 1 IO_H24 1487 1 Z
+bit 1487 C 1 *
+bit 1486 I 1 IO_H25
+bit 1485 O 1 IO_H25 1484 1 Z
+bit 1484 C 1 *
+bit 1483 I 1 IO_H26
+bit 1482 O 1 IO_H26 1481 1 Z
+bit 1481 C 1 *
+bit 1480 I 1 IO_J20
+bit 1479 O 1 IO_J20 1478 1 Z
+bit 1478 C 1 *
+bit 1477 I 1 IO_K20
+bit 1476 O 1 IO_K20 1475 1 Z
+bit 1475 C 1 *
+bit 1474 I 1 IO_J22
+bit 1473 O 1 IO_J22 1472 1 Z
+bit 1472 C 1 *
+bit 1471 I 1 IO_J23
+bit 1470 O 1 IO_J23 1469 1 Z
+bit 1469 C 1 *
+bit 1468 I 1 IO_J24
+bit 1467 O 1 IO_J24 1466 1 Z
+bit 1466 C 1 *
+bit 1465 I 1 IO_J25
+bit 1464 O 1 IO_J25 1463 1 Z
+bit 1463 C 1 *
+bit 1462 I 1 IO_K21
+bit 1461 O 1 IO_K21 1460 1 Z
+bit 1460 C 1 *
+bit 1459 I 1 IO_K22
+bit 1458 O 1 IO_K22 1457 1 Z
+bit 1457 C 1 *
+bit 1456 I 1 IO_K23
+bit 1455 O 1 IO_K23 1454 1 Z
+bit 1454 C 1 *
+bit 1453 I 1 IO_K24
+bit 1452 O 1 IO_K24 1451 1 Z
+bit 1451 C 1 *
+bit 1450 I 1 IO_K25
+bit 1449 O 1 IO_K25 1448 1 Z
+bit 1448 C 1 *
+bit 1447 I 1 IO_K26
+bit 1446 O 1 IO_K26 1445 1 Z
+bit 1445 C 1 *
+bit 1444 I 1 IO_L19
+bit 1443 O 1 IO_L19 1442 1 Z
+bit 1442 C 1 *
+bit 1441 I 1 IO_L20
+bit 1440 O 1 IO_L20 1439 1 Z
+bit 1439 C 1 *
+bit 1438 I 1 IO_L21
+bit 1437 O 1 IO_L21 1436 1 Z
+bit 1436 C 1 *
+bit 1435 I 1 IO_L22
+bit 1434 O 1 IO_L22 1433 1 Z
+bit 1433 C 1 *
+bit 1432 I 1 IO_L25
+bit 1431 O 1 IO_L25 1430 1 Z
+bit 1430 C 1 *
+bit 1429 I 1 IO_L26
+bit 1428 O 1 IO_L26 1427 1 Z
+bit 1427 C 1 *
+bit 1426 O 1 *
+bit 1425 O 1 *
+bit 1424 O 1 *
+bit 1423 O 1 *
+bit 1422 O 1 *
+bit 1421 O 1 *
+bit 1420 I 1 IO_M19
+bit 1419 O 1 IO_M19 1418 1 Z
+bit 1418 C 1 *
+bit 1417 I 1 IO_M20
+bit 1416 O 1 IO_M20 1415 1 Z
+bit 1415 C 1 *
+bit 1414 I 1 IO_M21
+bit 1413 O 1 IO_M21 1412 1 Z
+bit 1412 C 1 *
+bit 1411 I 1 IO_M22
+bit 1410 O 1 IO_M22 1409 1 Z
+bit 1409 C 1 *
+bit 1408 I 1 IO_L23
+bit 1407 O 1 IO_L23 1406 1 Z
+bit 1406 C 1 *
+bit 1405 I 1 IO_M24
+bit 1404 O 1 IO_M24 1403 1 Z
+bit 1403 C 1 *
+bit 1402 I 1 IO_M25
+bit 1401 O 1 IO_M25 1400 1 Z
+bit 1400 C 1 *
+bit 1399 I 1 IO_M26
+bit 1398 O 1 IO_M26 1397 1 Z
+bit 1397 C 1 *
+bit 1396 I 1 IO_N19
+bit 1395 O 1 IO_N19 1394 1 Z
+bit 1394 C 1 *
+bit 1393 I 1 IO_N20
+bit 1392 O 1 IO_N20 1391 1 Z
+bit 1391 C 1 *
+bit 1390 O 1 *
+bit 1389 O 1 *
+bit 1388 O 1 *
+bit 1387 O 1 *
+bit 1386 O 1 *
+bit 1385 O 1 *
+bit 1384 I 1 IO_N21
+bit 1383 O 1 IO_N21 1382 1 Z
+bit 1382 C 1 *
+bit 1381 I 1 IO_N22
+bit 1380 O 1 IO_N22 1379 1 Z
+bit 1379 C 1 *
+bit 1378 I 1 IO_N23
+bit 1377 O 1 IO_N23 1376 1 Z
+bit 1376 C 1 *
+bit 1375 I 1 IO_N24
+bit 1374 O 1 IO_N24 1373 1 Z
+bit 1373 C 1 *
+bit 1372 I 1 IO_N25
+bit 1371 O 1 IO_N25 1370 1 Z
+bit 1370 C 1 *
+bit 1369 I 1 IO_N26
+bit 1368 O 1 IO_N26 1367 1 Z
+bit 1367 C 1 *
+bit 1366 I 1 IO_P26
+bit 1365 O 1 IO_P26 1364 1 Z
+bit 1364 C 1 *
+bit 1363 I 1 IO_P25
+bit 1362 O 1 IO_P25 1361 1 Z
+bit 1361 C 1 *
+bit 1360 I 1 IO_P24
+bit 1359 O 1 IO_P24 1358 1 Z
+bit 1358 C 1 *
+bit 1357 I 1 IO_P23
+bit 1356 O 1 IO_P23 1355 1 Z
+bit 1355 C 1 *
+bit 1354 I 1 IO_P22
+bit 1353 O 1 IO_P22 1352 1 Z
+bit 1352 C 1 *
+bit 1351 I 1 IO_P21
+bit 1350 O 1 IO_P21 1349 1 Z
+bit 1349 C 1 *
+bit 1348 O 1 *
+bit 1347 O 1 *
+bit 1346 O 1 *
+bit 1345 O 1 *
+bit 1344 O 1 *
+bit 1343 O 1 *
+bit 1342 I 1 IO_P20
+bit 1341 O 1 IO_P20 1340 1 Z
+bit 1340 C 1 *
+bit 1339 I 1 IO_P19
+bit 1338 O 1 IO_P19 1337 1 Z
+bit 1337 C 1 *
+bit 1336 I 1 IO_R26
+bit 1335 O 1 IO_R26 1334 1 Z
+bit 1334 C 1 *
+bit 1333 I 1 IO_R25
+bit 1332 O 1 IO_R25 1331 1 Z
+bit 1331 C 1 *
+bit 1330 I 1 IO_R24
+bit 1329 O 1 IO_R24 1328 1 Z
+bit 1328 C 1 *
+bit 1327 I 1 IO_T23
+bit 1326 O 1 IO_T23 1325 1 Z
+bit 1325 C 1 *
+bit 1324 I 1 IO_R22
+bit 1323 O 1 IO_R22 1322 1 Z
+bit 1322 C 1 *
+bit 1321 I 1 IO_R21
+bit 1320 O 1 IO_R21 1319 1 Z
+bit 1319 C 1 *
+bit 1318 I 1 IO_R20
+bit 1317 O 1 IO_R20 1316 1 Z
+bit 1316 C 1 *
+bit 1315 I 1 IO_R19
+bit 1314 O 1 IO_R19 1313 1 Z
+bit 1313 C 1 *
+bit 1312 O 1 *
+bit 1311 O 1 *
+bit 1310 O 1 *
+bit 1309 O 1 *
+bit 1308 O 1 *
+bit 1307 O 1 *
+bit 1306 I 1 IO_T26
+bit 1305 O 1 IO_T26 1304 1 Z
+bit 1304 C 1 *
+bit 1303 I 1 IO_T25
+bit 1302 O 1 IO_T25 1301 1 Z
+bit 1301 C 1 *
+bit 1300 I 1 IO_T22
+bit 1299 O 1 IO_T22 1298 1 Z
+bit 1298 C 1 *
+bit 1297 I 1 IO_T21
+bit 1296 O 1 IO_T21 1295 1 Z
+bit 1295 C 1 *
+bit 1294 I 1 IO_T20
+bit 1293 O 1 IO_T20 1292 1 Z
+bit 1292 C 1 *
+bit 1291 I 1 IO_T19
+bit 1290 O 1 IO_T19 1289 1 Z
+bit 1289 C 1 *
+bit 1288 I 1 IO_U26
+bit 1287 O 1 IO_U26 1286 1 Z
+bit 1286 C 1 *
+bit 1285 I 1 IO_U25
+bit 1284 O 1 IO_U25 1283 1 Z
+bit 1283 C 1 *
+bit 1282 I 1 IO_U24
+bit 1281 O 1 IO_U24 1280 1 Z
+bit 1280 C 1 *
+bit 1279 I 1 IO_U23
+bit 1278 O 1 IO_U23 1277 1 Z
+bit 1277 C 1 *
+bit 1276 I 1 IO_U22
+bit 1275 O 1 IO_U22 1274 1 Z
+bit 1274 C 1 *
+bit 1273 I 1 IO_U21
+bit 1272 O 1 IO_U21 1271 1 Z
+bit 1271 C 1 *
+bit 1270 I 1 IO_V25
+bit 1269 O 1 IO_V25 1268 1 Z
+bit 1268 C 1 *
+bit 1267 I 1 IO_V24
+bit 1266 O 1 IO_V24 1265 1 Z
+bit 1265 C 1 *
+bit 1264 I 1 IO_V23
+bit 1263 O 1 IO_V23 1262 1 Z
+bit 1262 C 1 *
+bit 1261 I 1 IO_V22
+bit 1260 O 1 IO_V22 1259 1 Z
+bit 1259 C 1 *
+bit 1258 I 1 IO_U20
+bit 1257 O 1 IO_U20 1256 1 Z
+bit 1256 C 1 *
+bit 1255 I 1 IO_V20
+bit 1254 O 1 IO_V20 1253 1 Z
+bit 1253 C 1 *
+bit 1252 I 1 IO_W26
+bit 1251 O 1 IO_W26 1250 1 Z
+bit 1250 C 1 *
+bit 1249 I 1 IO_W25
+bit 1248 O 1 IO_W25 1247 1 Z
+bit 1247 C 1 *
+bit 1246 I 1 IO_W24
+bit 1245 O 1 IO_W24 1244 1 Z
+bit 1244 C 1 *
+bit 1243 I 1 IO_W23
+bit 1242 O 1 IO_W23 1241 1 Z
+bit 1241 C 1 *
+bit 1240 I 1 IO_V21
+bit 1239 O 1 IO_V21 1238 1 Z
+bit 1238 C 1 *
+bit 1237 I 1 IO_W22
+bit 1236 O 1 IO_W22 1235 1 Z
+bit 1235 C 1 *
+bit 1234 I 1 IO_Y26
+bit 1233 O 1 IO_Y26 1232 1 Z
+bit 1232 C 1 *
+bit 1231 I 1 IO_Y25
+bit 1230 O 1 IO_Y25 1229 1 Z
+bit 1229 C 1 *
+bit 1228 I 1 IO_W21
+bit 1227 O 1 IO_W21 1226 1 Z
+bit 1226 C 1 *
+bit 1225 I 1 IO_W20
+bit 1224 O 1 IO_W20 1223 1 Z
+bit 1223 C 1 *
+bit 1222 I 1 IO_AA26
+bit 1221 O 1 IO_AA26 1220 1 Z
+bit 1220 C 1 *
+bit 1219 I 1 IO_AA25
+bit 1218 O 1 IO_AA25 1217 1 Z
+bit 1217 C 1 *
+bit 1216 I 1 IO_Y23
+bit 1215 O 1 IO_Y23 1214 1 Z
+bit 1214 C 1 *
+bit 1213 I 1 IO_Y22
+bit 1212 O 1 IO_Y22 1211 1 Z
+bit 1211 C 1 *
+bit 1210 I 1 IO_AA24
+bit 1209 O 1 IO_AA24 1208 1 Z
+bit 1208 C 1 *
+bit 1207 I 1 IO_AA23
+bit 1206 O 1 IO_AA23 1205 1 Z
+bit 1205 C 1 *
+bit 1204 I 1 IO_AB26
+bit 1203 O 1 IO_AB26 1202 1 Z
+bit 1202 C 1 *
+bit 1201 I 1 IO_AB25
+bit 1200 O 1 IO_AB25 1199 1 Z
+bit 1199 C 1 *
+bit 1198 I 1 IO_Y21
+bit 1197 O 1 IO_Y21 1196 1 Z
+bit 1196 C 1 *
+bit 1195 I 1 IO_Y20
+bit 1194 O 1 IO_Y20 1193 1 Z
+bit 1193 C 1 *
+bit 1192 I 1 IO_AC26
+bit 1191 O 1 IO_AC26 1190 1 Z
+bit 1190 C 1 *
+bit 1189 I 1 IO_AC25
+bit 1188 O 1 IO_AC25 1187 1 Z
+bit 1187 C 1 *
+bit 1186 I 1 IO_AB24
+bit 1185 O 1 IO_AB24 1184 1 Z
+bit 1184 C 1 *
+bit 1183 I 1 IO_AB23
+bit 1182 O 1 IO_AB23 1181 1 Z
+bit 1181 C 1 *
+bit 1180 I 1 IO_AA22
+bit 1179 O 1 IO_AA22 1178 1 Z
+bit 1178 C 1 *
+bit 1177 I 1 IO_AA21
+bit 1176 O 1 IO_AA21 1175 1 Z
+bit 1175 C 1 *
+bit 1174 I 1 CCLK_AD26
+bit 1173 O 1 CCLK_AD26 1172 1 Z
+bit 1172 C 1 *
+bit 1171 I 1 DONE_AC24
+bit 1170 O 1 DONE_AC24 1169 1 Z
+bit 1169 C 1 *
+bit 1168 I 1 IO_AD25
+bit 1167 O 1 IO_AD25 1166 1 Z
+bit 1166 C 1 *
+bit 1165 I 1 IO_AB22
+bit 1164 O 1 IO_AB22 1163 1 Z
+bit 1163 C 1 *
+bit 1162 I 1 IO_AC22
+bit 1161 O 1 IO_AC22 1160 1 Z
+bit 1160 C 1 *
+bit 1159 I 1 IO_AE24
+bit 1158 O 1 IO_AE24 1157 1 Z
+bit 1157 C 1 *
+bit 1156 I 1 IO_AF24
+bit 1155 O 1 IO_AF24 1154 1 Z
+bit 1154 C 1 *
+bit 1153 I 1 IO_AD23
+bit 1152 O 1 IO_AD23 1151 1 Z
+bit 1151 C 1 *
+bit 1150 I 1 IO_AE23
+bit 1149 O 1 IO_AE23 1148 1 Z
+bit 1148 C 1 *
+bit 1147 I 1 IO_AF23
+bit 1146 O 1 IO_AF23 1145 1 Z
+bit 1145 C 1 *
+bit 1144 I 1 IO_AD22
+bit 1143 O 1 IO_AD22 1142 1 Z
+bit 1142 C 1 *
+bit 1141 I 1 IO_AE22
+bit 1140 O 1 IO_AE22 1139 1 Z
+bit 1139 C 1 *
+bit 1138 I 1 IO_AF22
+bit 1137 O 1 IO_AF22 1136 1 Z
+bit 1136 C 1 *
+bit 1135 I 1 IO_AB21
+bit 1134 O 1 IO_AB21 1133 1 Z
+bit 1133 C 1 *
+bit 1132 I 1 IO_AC21
+bit 1131 O 1 IO_AC21 1130 1 Z
+bit 1130 C 1 *
+bit 1129 I 1 IO_AD21
+bit 1128 O 1 IO_AD21 1127 1 Z
+bit 1127 C 1 *
+bit 1126 I 1 IO_AE21
+bit 1125 O 1 IO_AE21 1124 1 Z
+bit 1124 C 1 *
+bit 1123 I 1 IO_AF21
+bit 1122 O 1 IO_AF21 1121 1 Z
+bit 1121 C 1 *
+bit 1120 I 1 IO_AB20
+bit 1119 O 1 IO_AB20 1118 1 Z
+bit 1118 C 1 *
+bit 1117 I 1 IO_AC20
+bit 1116 O 1 IO_AC20 1115 1 Z
+bit 1115 C 1 *
+bit 1114 I 1 IO_AE20
+bit 1113 O 1 IO_AE20 1112 1 Z
+bit 1112 C 1 *
+bit 1111 I 1 IO_AF20
+bit 1110 O 1 IO_AF20 1109 1 Z
+bit 1109 C 1 *
+bit 1108 I 1 IO_AA20
+bit 1107 O 1 IO_AA20 1106 1 Z
+bit 1106 C 1 *
+bit 1105 I 1 IO_Y19
+bit 1104 O 1 IO_Y19 1103 1 Z
+bit 1103 C 1 *
+bit 1102 I 1 IO_AA19
+bit 1101 O 1 IO_AA19 1100 1 Z
+bit 1100 C 1 *
+bit 1099 I 1 IO_AB19
+bit 1098 O 1 IO_AB19 1097 1 Z
+bit 1097 C 1 *
+bit 1096 I 1 IO_AC19
+bit 1095 O 1 IO_AC19 1094 1 Z
+bit 1094 C 1 *
+bit 1093 I 1 IO_AD19
+bit 1092 O 1 IO_AD19 1091 1 Z
+bit 1091 C 1 *
+bit 1090 I 1 IO_AE19
+bit 1089 O 1 IO_AE19 1088 1 Z
+bit 1088 C 1 *
+bit 1087 I 1 IO_AF19
+bit 1086 O 1 IO_AF19 1085 1 Z
+bit 1085 C 1 *
+bit 1084 I 1 IO_Y18
+bit 1083 O 1 IO_Y18 1082 1 Z
+bit 1082 C 1 *
+bit 1081 I 1 IO_AA18
+bit 1080 O 1 IO_AA18 1079 1 Z
+bit 1079 C 1 *
+bit 1078 O 1 *
+bit 1077 O 1 *
+bit 1076 O 1 *
+bit 1075 I 1 IO_AB18
+bit 1074 O 1 IO_AB18 1073 1 Z
+bit 1073 C 1 *
+bit 1072 I 1 IO_AC18
+bit 1071 O 1 IO_AC18 1070 1 Z
+bit 1070 C 1 *
+bit 1069 I 1 IO_AD18
+bit 1068 O 1 IO_AD18 1067 1 Z
+bit 1067 C 1 *
+bit 1066 I 1 IO_AE18
+bit 1065 O 1 IO_AE18 1064 1 Z
+bit 1064 C 1 *
+bit 1063 I 1 IO_Y17
+bit 1062 O 1 IO_Y17 1061 1 Z
+bit 1061 C 1 *
+bit 1060 I 1 IO_AC17
+bit 1059 O 1 IO_AC17 1058 1 Z
+bit 1058 C 1 *
+bit 1057 I 1 IO_AA17
+bit 1056 O 1 IO_AA17 1055 1 Z
+bit 1055 C 1 *
+bit 1054 I 1 IO_AD17
+bit 1053 O 1 IO_AD17 1052 1 Z
+bit 1052 C 1 *
+bit 1051 I 1 IO_AB17
+bit 1050 O 1 IO_AB17 1049 1 Z
+bit 1049 C 1 *
+bit 1048 I 1 IO_W16
+bit 1047 O 1 IO_W16 1046 1 Z
+bit 1046 C 1 *
+bit 1045 I 1 IO_AE17
+bit 1044 O 1 IO_AE17 1043 1 Z
+bit 1043 C 1 *
+bit 1042 I 1 IO_AF17
+bit 1041 O 1 IO_AF17 1040 1 Z
+bit 1040 C 1 *
+bit 1039 I 1 IO_Y16
+bit 1038 O 1 IO_Y16 1037 1 Z
+bit 1037 C 1 *
+bit 1036 I 1 IO_AA16
+bit 1035 O 1 IO_AA16 1034 1 Z
+bit 1034 C 1 *
+bit 1033 O 1 *
+bit 1032 O 1 *
+bit 1031 O 1 *
+bit 1030 I 1 IO_AB16
+bit 1029 O 1 IO_AB16 1028 1 Z
+bit 1028 C 1 *
+bit 1027 I 1 IO_AC16
+bit 1026 O 1 IO_AC16 1025 1 Z
+bit 1025 C 1 *
+bit 1024 I 1 IO_AE16
+bit 1023 O 1 IO_AE16 1022 1 Z
+bit 1022 C 1 *
+bit 1021 I 1 IO_AF16
+bit 1020 O 1 IO_AF16 1019 1 Z
+bit 1019 C 1 *
+bit 1018 I 1 IO_W15
+bit 1017 O 1 IO_W15 1016 1 Z
+bit 1016 C 1 *
+bit 1015 I 1 IO_Y15
+bit 1014 O 1 IO_Y15 1013 1 Z
+bit 1013 C 1 *
+bit 1012 I 1 IO_W14
+bit 1011 O 1 IO_W14 1010 1 Z
+bit 1010 C 1 *
+bit 1009 I 1 IO_AA15
+bit 1008 O 1 IO_AA15 1007 1 Z
+bit 1007 C 1 *
+bit 1006 I 1 IO_AB15
+bit 1005 O 1 IO_AB15 1004 1 Z
+bit 1004 C 1 *
+bit 1003 I 1 IO_AD15
+bit 1002 O 1 IO_AD15 1001 1 Z
+bit 1001 C 1 *
+bit 1000 I 1 IO_AE15
+bit 999 O 1 IO_AE15 998 1 Z
+bit 998 C 1 *
+bit 997 I 1 IO_AF15
+bit 996 O 1 IO_AF15 995 1 Z
+bit 995 C 1 *
+bit 994 I 1 IO_Y14
+bit 993 O 1 IO_Y14 992 1 Z
+bit 992 C 1 *
+bit 991 I 1 IO_AA14
+bit 990 O 1 IO_AA14 989 1 Z
+bit 989 C 1 *
+bit 988 I 1 IO_AB14
+bit 987 O 1 IO_AB14 986 1 Z
+bit 986 C 1 *
+bit 985 I 1 IO_AC14
+bit 984 O 1 IO_AC14 983 1 Z
+bit 983 C 1 *
+bit 982 I 1 IO_AD14
+bit 981 O 1 IO_AD14 980 1 Z
+bit 980 C 1 *
+bit 979 I 1 IO_AE14
+bit 978 O 1 IO_AE14 977 1 Z
+bit 977 C 1 *
+bit 976 I 1 IO_AF14
+bit 975 O 1 IO_AF14 974 1 Z
+bit 974 C 1 *
+bit 973 I 1 IO_AF13
+bit 972 O 1 IO_AF13 971 1 Z
+bit 971 C 1 *
+bit 970 I 1 IO_AE13
+bit 969 O 1 IO_AE13 968 1 Z
+bit 968 C 1 *
+bit 967 I 1 IO_AD13
+bit 966 O 1 IO_AD13 965 1 Z
+bit 965 C 1 *
+bit 964 I 1 IO_AC13
+bit 963 O 1 IO_AC13 962 1 Z
+bit 962 C 1 *
+bit 961 I 1 IO_AB13
+bit 960 O 1 IO_AB13 959 1 Z
+bit 959 C 1 *
+bit 958 I 1 IO_AA13
+bit 957 O 1 IO_AA13 956 1 Z
+bit 956 C 1 *
+bit 955 I 1 IO_Y13
+bit 954 O 1 IO_Y13 953 1 Z
+bit 953 C 1 *
+bit 952 I 1 IO_W13
+bit 951 O 1 IO_W13 950 1 Z
+bit 950 C 1 *
+bit 949 I 1 IO_AF12
+bit 948 O 1 IO_AF12 947 1 Z
+bit 947 C 1 *
+bit 946 I 1 IO_AE12
+bit 945 O 1 IO_AE12 944 1 Z
+bit 944 C 1 *
+bit 943 I 1 IO_AD12
+bit 942 O 1 IO_AD12 941 1 Z
+bit 941 C 1 *
+bit 940 I 1 IO_AB12
+bit 939 O 1 IO_AB12 938 1 Z
+bit 938 C 1 *
+bit 937 I 1 IO_AA12
+bit 936 O 1 IO_AA12 935 1 Z
+bit 935 C 1 *
+bit 934 I 1 IO_Y12
+bit 933 O 1 IO_Y12 932 1 Z
+bit 932 C 1 *
+bit 931 I 1 IO_W12
+bit 930 O 1 IO_W12 929 1 Z
+bit 929 C 1 *
+bit 928 I 1 IO_AC11
+bit 927 O 1 IO_AC11 926 1 Z
+bit 926 C 1 *
+bit 925 I 1 IO_AF11
+bit 924 O 1 IO_AF11 923 1 Z
+bit 923 C 1 *
+bit 922 I 1 IO_AE11
+bit 921 O 1 IO_AE11 920 1 Z
+bit 920 C 1 *
+bit 919 I 1 IO_AB11
+bit 918 O 1 IO_AB11 917 1 Z
+bit 917 C 1 *
+bit 916 I 1 IO_AA11
+bit 915 O 1 IO_AA11 914 1 Z
+bit 914 C 1 *
+bit 913 O 1 *
+bit 912 O 1 *
+bit 911 O 1 *
+bit 910 I 1 IO_Y11
+bit 909 O 1 IO_Y11 908 1 Z
+bit 908 C 1 *
+bit 907 I 1 IO_W11
+bit 906 O 1 IO_W11 905 1 Z
+bit 905 C 1 *
+bit 904 I 1 IO_AF10
+bit 903 O 1 IO_AF10 902 1 Z
+bit 902 C 1 *
+bit 901 I 1 IO_AE10
+bit 900 O 1 IO_AE10 899 1 Z
+bit 899 C 1 *
+bit 898 I 1 IO_AD10
+bit 897 O 1 IO_AD10 896 1 Z
+bit 896 C 1 *
+bit 895 I 1 IO_AC10
+bit 894 O 1 IO_AC10 893 1 Z
+bit 893 C 1 *
+bit 892 I 1 IO_AB10
+bit 891 O 1 IO_AB10 890 1 Z
+bit 890 C 1 *
+bit 889 I 1 IO_AA10
+bit 888 O 1 IO_AA10 887 1 Z
+bit 887 C 1 *
+bit 886 I 1 IO_Y10
+bit 885 O 1 IO_Y10 884 1 Z
+bit 884 C 1 *
+bit 883 O 1 *
+bit 882 O 1 *
+bit 881 O 1 *
+bit 880 I 1 IO_AE9
+bit 879 O 1 IO_AE9 878 1 Z
+bit 878 C 1 *
+bit 877 I 1 IO_AD9
+bit 876 O 1 IO_AD9 875 1 Z
+bit 875 C 1 *
+bit 874 I 1 IO_AC9
+bit 873 O 1 IO_AC9 872 1 Z
+bit 872 C 1 *
+bit 871 O 1 *
+bit 870 O 1 *
+bit 869 O 1 *
+bit 868 I 1 IO_AB9
+bit 867 O 1 IO_AB9 866 1 Z
+bit 866 C 1 *
+bit 865 I 1 IO_AA9
+bit 864 O 1 IO_AA9 863 1 Z
+bit 863 C 1 *
+bit 862 I 1 IO_Y9
+bit 861 O 1 IO_Y9 860 1 Z
+bit 860 C 1 *
+bit 859 I 1 IO_AF8
+bit 858 O 1 IO_AF8 857 1 Z
+bit 857 C 1 *
+bit 856 I 1 IO_AE8
+bit 855 O 1 IO_AE8 854 1 Z
+bit 854 C 1 *
+bit 853 O 1 *
+bit 852 O 1 *
+bit 851 O 1 *
+bit 850 I 1 IO_AD8
+bit 849 O 1 IO_AD8 848 1 Z
+bit 848 C 1 *
+bit 847 I 1 IO_AC8
+bit 846 O 1 IO_AC8 845 1 Z
+bit 845 C 1 *
+bit 844 I 1 IO_AB8
+bit 843 O 1 IO_AB8 842 1 Z
+bit 842 C 1 *
+bit 841 I 1 IO_AA8
+bit 840 O 1 IO_AA8 839 1 Z
+bit 839 C 1 *
+bit 838 I 1 IO_Y8
+bit 837 O 1 IO_Y8 836 1 Z
+bit 836 C 1 *
+bit 835 I 1 IO_AF7
+bit 834 O 1 IO_AF7 833 1 Z
+bit 833 C 1 *
+bit 832 I 1 IO_AE7
+bit 831 O 1 IO_AE7 830 1 Z
+bit 830 C 1 *
+bit 829 I 1 IO_AC7
+bit 828 O 1 IO_AC7 827 1 Z
+bit 827 C 1 *
+bit 826 I 1 IO_AB7
+bit 825 O 1 IO_AB7 824 1 Z
+bit 824 C 1 *
+bit 823 I 1 IO_AA7
+bit 822 O 1 IO_AA7 821 1 Z
+bit 821 C 1 *
+bit 820 I 1 IO_AF6
+bit 819 O 1 IO_AF6 818 1 Z
+bit 818 C 1 *
+bit 817 I 1 IO_AE6
+bit 816 O 1 IO_AE6 815 1 Z
+bit 815 C 1 *
+bit 814 I 1 IO_AD6
+bit 813 O 1 IO_AD6 812 1 Z
+bit 812 C 1 *
+bit 811 I 1 IO_AC6
+bit 810 O 1 IO_AC6 809 1 Z
+bit 809 C 1 *
+bit 808 I 1 IO_AF5
+bit 807 O 1 IO_AF5 806 1 Z
+bit 806 C 1 *
+bit 805 I 1 IO_AE5
+bit 804 O 1 IO_AE5 803 1 Z
+bit 803 C 1 *
+bit 802 I 1 IO_AD5
+bit 801 O 1 IO_AD5 800 1 Z
+bit 800 C 1 *
+bit 799 I 1 IO_AB6
+bit 798 O 1 IO_AB6 797 1 Z
+bit 797 C 1 *
+bit 796 I 1 IO_AA6
+bit 795 O 1 IO_AA6 794 1 Z
+bit 794 C 1 *
+bit 793 I 1 IO_AF4
+bit 792 O 1 IO_AF4 791 1 Z
+bit 791 C 1 *
+bit 790 I 1 IO_AE4
+bit 789 O 1 IO_AE4 788 1 Z
+bit 788 C 1 *
+bit 787 I 1 IO_AD4
+bit 786 O 1 IO_AD4 785 1 Z
+bit 785 C 1 *
+bit 784 I 1 IO_AC5
+bit 783 O 1 IO_AC5 782 1 Z
+bit 782 C 1 *
+bit 781 I 1 IO_AB5
+bit 780 O 1 IO_AB5 779 1 Z
+bit 779 C 1 *
+bit 778 I 1 M2_AF3
+bit 777 I 1 M0_AE3
+bit 776 I 1 M1_AC3
+bit 775 I 1 IO_AD2
+bit 774 O 1 IO_AD2 773 1 Z
+bit 773 C 1 *
+bit 772 I 1 IO_AD1
+bit 771 O 1 IO_AD1 770 1 Z
+bit 770 C 1 *
+bit 769 I 1 IO_AB4
+bit 768 O 1 IO_AB4 767 1 Z
+bit 767 C 1 *
+bit 766 I 1 IO_AB3
+bit 765 O 1 IO_AB3 764 1 Z
+bit 764 C 1 *
+bit 763 I 1 IO_AC2
+bit 762 O 1 IO_AC2 761 1 Z
+bit 761 C 1 *
+bit 760 I 1 IO_AC1
+bit 759 O 1 IO_AC1 758 1 Z
+bit 758 C 1 *
+bit 757 I 1 IO_AB2
+bit 756 O 1 IO_AB2 755 1 Z
+bit 755 C 1 *
+bit 754 I 1 IO_AB1
+bit 753 O 1 IO_AB1 752 1 Z
+bit 752 C 1 *
+bit 751 I 1 IO_Y7
+bit 750 O 1 IO_Y7 749 1 Z
+bit 749 C 1 *
+bit 748 I 1 IO_Y6
+bit 747 O 1 IO_Y6 746 1 Z
+bit 746 C 1 *
+bit 745 I 1 IO_AA4
+bit 744 O 1 IO_AA4 743 1 Z
+bit 743 C 1 *
+bit 742 I 1 IO_AA3
+bit 741 O 1 IO_AA3 740 1 Z
+bit 740 C 1 *
+bit 739 I 1 IO_Y5
+bit 738 O 1 IO_Y5 737 1 Z
+bit 737 C 1 *
+bit 736 I 1 IO_Y4
+bit 735 O 1 IO_Y4 734 1 Z
+bit 734 C 1 *
+bit 733 I 1 IO_AA2
+bit 732 O 1 IO_AA2 731 1 Z
+bit 731 C 1 *
+bit 730 I 1 IO_AA1
+bit 729 O 1 IO_AA1 728 1 Z
+bit 728 C 1 *
+bit 727 I 1 IO_Y2
+bit 726 O 1 IO_Y2 725 1 Z
+bit 725 C 1 *
+bit 724 I 1 IO_Y1
+bit 723 O 1 IO_Y1 722 1 Z
+bit 722 C 1 *
+bit 721 I 1 IO_W7
+bit 720 O 1 IO_W7 719 1 Z
+bit 719 C 1 *
+bit 718 I 1 IO_W6
+bit 717 O 1 IO_W6 716 1 Z
+bit 716 C 1 *
+bit 715 I 1 IO_V6
+bit 714 O 1 IO_V6 713 1 Z
+bit 713 C 1 *
+bit 712 I 1 IO_W5
+bit 711 O 1 IO_W5 710 1 Z
+bit 710 C 1 *
+bit 709 I 1 IO_W4
+bit 708 O 1 IO_W4 707 1 Z
+bit 707 C 1 *
+bit 706 I 1 IO_W3
+bit 705 O 1 IO_W3 704 1 Z
+bit 704 C 1 *
+bit 703 I 1 IO_W2
+bit 702 O 1 IO_W2 701 1 Z
+bit 701 C 1 *
+bit 700 I 1 IO_W1
+bit 699 O 1 IO_W1 698 1 Z
+bit 698 C 1 *
+bit 697 I 1 IO_V7
+bit 696 O 1 IO_V7 695 1 Z
+bit 695 C 1 *
+bit 694 I 1 IO_U7
+bit 693 O 1 IO_U7 692 1 Z
+bit 692 C 1 *
+bit 691 I 1 IO_V5
+bit 690 O 1 IO_V5 689 1 Z
+bit 689 C 1 *
+bit 688 I 1 IO_V4
+bit 687 O 1 IO_V4 686 1 Z
+bit 686 C 1 *
+bit 685 I 1 IO_V3
+bit 684 O 1 IO_V3 683 1 Z
+bit 683 C 1 *
+bit 682 I 1 IO_V2
+bit 681 O 1 IO_V2 680 1 Z
+bit 680 C 1 *
+bit 679 I 1 IO_U6
+bit 678 O 1 IO_U6 677 1 Z
+bit 677 C 1 *
+bit 676 I 1 IO_U5
+bit 675 O 1 IO_U5 674 1 Z
+bit 674 C 1 *
+bit 673 I 1 IO_U4
+bit 672 O 1 IO_U4 671 1 Z
+bit 671 C 1 *
+bit 670 I 1 IO_U3
+bit 669 O 1 IO_U3 668 1 Z
+bit 668 C 1 *
+bit 667 I 1 IO_U2
+bit 666 O 1 IO_U2 665 1 Z
+bit 665 C 1 *
+bit 664 I 1 IO_U1
+bit 663 O 1 IO_U1 662 1 Z
+bit 662 C 1 *
+bit 661 I 1 IO_T8
+bit 660 O 1 IO_T8 659 1 Z
+bit 659 C 1 *
+bit 658 I 1 IO_T7
+bit 657 O 1 IO_T7 656 1 Z
+bit 656 C 1 *
+bit 655 I 1 IO_T6
+bit 654 O 1 IO_T6 653 1 Z
+bit 653 C 1 *
+bit 652 I 1 IO_T5
+bit 651 O 1 IO_T5 650 1 Z
+bit 650 C 1 *
+bit 649 I 1 IO_T2
+bit 648 O 1 IO_T2 647 1 Z
+bit 647 C 1 *
+bit 646 I 1 IO_T1
+bit 645 O 1 IO_T1 644 1 Z
+bit 644 C 1 *
+bit 643 O 1 *
+bit 642 O 1 *
+bit 641 O 1 *
+bit 640 O 1 *
+bit 639 O 1 *
+bit 638 O 1 *
+bit 637 I 1 IO_R8
+bit 636 O 1 IO_R8 635 1 Z
+bit 635 C 1 *
+bit 634 I 1 IO_R7
+bit 633 O 1 IO_R7 632 1 Z
+bit 632 C 1 *
+bit 631 I 1 IO_R6
+bit 630 O 1 IO_R6 629 1 Z
+bit 629 C 1 *
+bit 628 I 1 IO_R5
+bit 627 O 1 IO_R5 626 1 Z
+bit 626 C 1 *
+bit 625 I 1 IO_T4
+bit 624 O 1 IO_T4 623 1 Z
+bit 623 C 1 *
+bit 622 I 1 IO_R3
+bit 621 O 1 IO_R3 620 1 Z
+bit 620 C 1 *
+bit 619 I 1 IO_R2
+bit 618 O 1 IO_R2 617 1 Z
+bit 617 C 1 *
+bit 616 I 1 IO_R1
+bit 615 O 1 IO_R1 614 1 Z
+bit 614 C 1 *
+bit 613 I 1 IO_P8
+bit 612 O 1 IO_P8 611 1 Z
+bit 611 C 1 *
+bit 610 I 1 IO_P7
+bit 609 O 1 IO_P7 608 1 Z
+bit 608 C 1 *
+bit 607 O 1 *
+bit 606 O 1 *
+bit 605 O 1 *
+bit 604 O 1 *
+bit 603 O 1 *
+bit 602 O 1 *
+bit 601 I 1 IO_P6
+bit 600 O 1 IO_P6 599 1 Z
+bit 599 C 1 *
+bit 598 I 1 IO_P5
+bit 597 O 1 IO_P5 596 1 Z
+bit 596 C 1 *
+bit 595 I 1 IO_P4
+bit 594 O 1 IO_P4 593 1 Z
+bit 593 C 1 *
+bit 592 I 1 IO_P3
+bit 591 O 1 IO_P3 590 1 Z
+bit 590 C 1 *
+bit 589 I 1 IO_P2
+bit 588 O 1 IO_P2 587 1 Z
+bit 587 C 1 *
+bit 586 I 1 IO_P1
+bit 585 O 1 IO_P1 584 1 Z
+bit 584 C 1 *
+bit 583 I 1 IO_N1
+bit 582 O 1 IO_N1 581 1 Z
+bit 581 C 1 *
+bit 580 I 1 IO_N2
+bit 579 O 1 IO_N2 578 1 Z
+bit 578 C 1 *
+bit 577 I 1 IO_N3
+bit 576 O 1 IO_N3 575 1 Z
+bit 575 C 1 *
+bit 574 I 1 IO_N4
+bit 573 O 1 IO_N4 572 1 Z
+bit 572 C 1 *
+bit 571 I 1 IO_N5
+bit 570 O 1 IO_N5 569 1 Z
+bit 569 C 1 *
+bit 568 I 1 IO_N6
+bit 567 O 1 IO_N6 566 1 Z
+bit 566 C 1 *
+bit 565 O 1 *
+bit 564 O 1 *
+bit 563 O 1 *
+bit 562 O 1 *
+bit 561 O 1 *
+bit 560 O 1 *
+bit 559 I 1 IO_N7
+bit 558 O 1 IO_N7 557 1 Z
+bit 557 C 1 *
+bit 556 I 1 IO_N8
+bit 555 O 1 IO_N8 554 1 Z
+bit 554 C 1 *
+bit 553 I 1 IO_M1
+bit 552 O 1 IO_M1 551 1 Z
+bit 551 C 1 *
+bit 550 I 1 IO_M2
+bit 549 O 1 IO_M2 548 1 Z
+bit 548 C 1 *
+bit 547 I 1 IO_M3
+bit 546 O 1 IO_M3 545 1 Z
+bit 545 C 1 *
+bit 544 I 1 IO_L4
+bit 543 O 1 IO_L4 542 1 Z
+bit 542 C 1 *
+bit 541 I 1 IO_M6
+bit 540 O 1 IO_M6 539 1 Z
+bit 539 C 1 *
+bit 538 I 1 IO_M5
+bit 537 O 1 IO_M5 536 1 Z
+bit 536 C 1 *
+bit 535 I 1 IO_M7
+bit 534 O 1 IO_M7 533 1 Z
+bit 533 C 1 *
+bit 532 I 1 IO_M8
+bit 531 O 1 IO_M8 530 1 Z
+bit 530 C 1 *
+bit 529 O 1 *
+bit 528 O 1 *
+bit 527 O 1 *
+bit 526 O 1 *
+bit 525 O 1 *
+bit 524 O 1 *
+bit 523 I 1 IO_L1
+bit 522 O 1 IO_L1 521 1 Z
+bit 521 C 1 *
+bit 520 I 1 IO_L2
+bit 519 O 1 IO_L2 518 1 Z
+bit 518 C 1 *
+bit 517 I 1 IO_L5
+bit 516 O 1 IO_L5 515 1 Z
+bit 515 C 1 *
+bit 514 I 1 IO_L6
+bit 513 O 1 IO_L6 512 1 Z
+bit 512 C 1 *
+bit 511 I 1 IO_L7
+bit 510 O 1 IO_L7 509 1 Z
+bit 509 C 1 *
+bit 508 I 1 IO_L8
+bit 507 O 1 IO_L8 506 1 Z
+bit 506 C 1 *
+bit 505 I 1 IO_K1
+bit 504 O 1 IO_K1 503 1 Z
+bit 503 C 1 *
+bit 502 I 1 IO_K2
+bit 501 O 1 IO_K2 500 1 Z
+bit 500 C 1 *
+bit 499 I 1 IO_K3
+bit 498 O 1 IO_K3 497 1 Z
+bit 497 C 1 *
+bit 496 I 1 IO_K4
+bit 495 O 1 IO_K4 494 1 Z
+bit 494 C 1 *
+bit 493 I 1 IO_K5
+bit 492 O 1 IO_K5 491 1 Z
+bit 491 C 1 *
+bit 490 I 1 IO_K6
+bit 489 O 1 IO_K6 488 1 Z
+bit 488 C 1 *
+bit 487 I 1 IO_J2
+bit 486 O 1 IO_J2 485 1 Z
+bit 485 C 1 *
+bit 484 I 1 IO_J3
+bit 483 O 1 IO_J3 482 1 Z
+bit 482 C 1 *
+bit 481 I 1 IO_J4
+bit 480 O 1 IO_J4 479 1 Z
+bit 479 C 1 *
+bit 478 I 1 IO_J5
+bit 477 O 1 IO_J5 476 1 Z
+bit 476 C 1 *
+bit 475 I 1 IO_K7
+bit 474 O 1 IO_K7 473 1 Z
+bit 473 C 1 *
+bit 472 I 1 IO_J7
+bit 471 O 1 IO_J7 470 1 Z
+bit 470 C 1 *
+bit 469 I 1 IO_H1
+bit 468 O 1 IO_H1 467 1 Z
+bit 467 C 1 *
+bit 466 I 1 IO_H2
+bit 465 O 1 IO_H2 464 1 Z
+bit 464 C 1 *
+bit 463 I 1 IO_H3
+bit 462 O 1 IO_H3 461 1 Z
+bit 461 C 1 *
+bit 460 I 1 IO_H4
+bit 459 O 1 IO_H4 458 1 Z
+bit 458 C 1 *
+bit 457 I 1 IO_J6
+bit 456 O 1 IO_J6 455 1 Z
+bit 455 C 1 *
+bit 454 I 1 IO_H5
+bit 453 O 1 IO_H5 452 1 Z
+bit 452 C 1 *
+bit 451 I 1 IO_G1
+bit 450 O 1 IO_G1 449 1 Z
+bit 449 C 1 *
+bit 448 I 1 IO_G2
+bit 447 O 1 IO_G2 446 1 Z
+bit 446 C 1 *
+bit 445 I 1 IO_H6
+bit 444 O 1 IO_H6 443 1 Z
+bit 443 C 1 *
+bit 442 I 1 IO_H7
+bit 441 O 1 IO_H7 440 1 Z
+bit 440 C 1 *
+bit 439 I 1 IO_F1
+bit 438 O 1 IO_F1 437 1 Z
+bit 437 C 1 *
+bit 436 I 1 IO_F2
+bit 435 O 1 IO_F2 434 1 Z
+bit 434 C 1 *
+bit 433 I 1 IO_G4
+bit 432 O 1 IO_G4 431 1 Z
+bit 431 C 1 *
+bit 430 I 1 IO_G5
+bit 429 O 1 IO_G5 428 1 Z
+bit 428 C 1 *
+bit 427 I 1 IO_F3
+bit 426 O 1 IO_F3 425 1 Z
+bit 425 C 1 *
+bit 424 I 1 IO_F4
+bit 423 O 1 IO_F4 422 1 Z
+bit 422 C 1 *
+bit 421 I 1 IO_E1
+bit 420 O 1 IO_E1 419 1 Z
+bit 419 C 1 *
+bit 418 I 1 IO_E2
+bit 417 O 1 IO_E2 416 1 Z
+bit 416 C 1 *
+bit 415 I 1 IO_G6
+bit 414 O 1 IO_G6 413 1 Z
+bit 413 C 1 *
+bit 412 I 1 IO_G7
+bit 411 O 1 IO_G7 410 1 Z
+bit 410 C 1 *
+bit 409 I 1 IO_D1
+bit 408 O 1 IO_D1 407 1 Z
+bit 407 C 1 *
+bit 406 I 1 IO_D2
+bit 405 O 1 IO_D2 404 1 Z
+bit 404 C 1 *
+bit 403 I 1 IO_E3
+bit 402 O 1 IO_E3 401 1 Z
+bit 401 C 1 *
+bit 400 I 1 IO_E4
+bit 399 O 1 IO_E4 398 1 Z
+bit 398 C 1 *
+bit 397 I 1 IO_F5
+bit 396 O 1 IO_F5 395 1 Z
+bit 395 C 1 *
+bit 394 I 1 IO_F6
+bit 393 O 1 IO_F6 392 1 Z
+bit 392 C 1 *
+bit 391 O 1 *
+bit 390 I 1 HSWAP_EN_C2
+bit 389 I 1 IO_B3
+bit 388 O 1 IO_B3 387 1 Z
+bit 387 C 1 *
+bit 386 I 1 IO_E5
+bit 385 O 1 IO_E5 384 1 Z
+bit 384 C 1 *
+bit 383 I 1 IO_D5
+bit 382 O 1 IO_D5 381 1 Z
+bit 381 C 1 *
+bit 380 O 1 *
+bit 379 O 1 *
+bit 378 O 1 *
+bit 377 I 1 IO_A3
+bit 376 O 1 IO_A3 375 1 Z
+bit 375 C 1 *
+bit 374 I 1 IO_C4
+bit 373 O 1 IO_C4 372 1 Z
+bit 372 C 1 *
+bit 371 I 1 IO_B4
+bit 370 O 1 IO_B4 369 1 Z
+bit 369 C 1 *
+bit 368 I 1 IO_A4
+bit 367 O 1 IO_A4 366 1 Z
+bit 366 C 1 *
+bit 365 I 1 IO_C5
+bit 364 O 1 IO_C5 363 1 Z
+bit 363 C 1 *
+bit 362 I 1 IO_B5
+bit 361 O 1 IO_B5 360 1 Z
+bit 360 C 1 *
+bit 359 I 1 IO_A5
+bit 358 O 1 IO_A5 357 1 Z
+bit 357 C 1 *
+bit 356 I 1 IO_E6
+bit 355 O 1 IO_E6 354 1 Z
+bit 354 C 1 *
+bit 353 I 1 IO_D6
+bit 352 O 1 IO_D6 351 1 Z
+bit 351 C 1 *
+bit 350 I 1 IO_C6
+bit 349 O 1 IO_C6 348 1 Z
+bit 348 C 1 *
+bit 347 I 1 IO_B6
+bit 346 O 1 IO_B6 345 1 Z
+bit 345 C 1 *
+bit 344 I 1 IO_A6
+bit 343 O 1 IO_A6 342 1 Z
+bit 342 C 1 *
+bit 341 I 1 IO_E7
+bit 340 O 1 IO_E7 339 1 Z
+bit 339 C 1 *
+bit 338 I 1 IO_D7
+bit 337 O 1 IO_D7 336 1 Z
+bit 336 C 1 *
+bit 335 I 1 IO_B7
+bit 334 O 1 IO_B7 333 1 Z
+bit 333 C 1 *
+bit 332 I 1 IO_A7
+bit 331 O 1 IO_A7 330 1 Z
+bit 330 C 1 *
+bit 329 I 1 IO_F7
+bit 328 O 1 IO_F7 327 1 Z
+bit 327 C 1 *
+bit 326 I 1 IO_G8
+bit 325 O 1 IO_G8 324 1 Z
+bit 324 C 1 *
+bit 323 I 1 IO_F8
+bit 322 O 1 IO_F8 321 1 Z
+bit 321 C 1 *
+bit 320 I 1 IO_E8
+bit 319 O 1 IO_E8 318 1 Z
+bit 318 C 1 *
+bit 317 I 1 IO_D8
+bit 316 O 1 IO_D8 315 1 Z
+bit 315 C 1 *
+bit 314 I 1 IO_C8
+bit 313 O 1 IO_C8 312 1 Z
+bit 312 C 1 *
+bit 311 I 1 IO_B8
+bit 310 O 1 IO_B8 309 1 Z
+bit 309 C 1 *
+bit 308 I 1 IO_A8
+bit 307 O 1 IO_A8 306 1 Z
+bit 306 C 1 *
+bit 305 I 1 IO_G9
+bit 304 O 1 IO_G9 303 1 Z
+bit 303 C 1 *
+bit 302 I 1 IO_F9
+bit 301 O 1 IO_F9 300 1 Z
+bit 300 C 1 *
+bit 299 O 1 *
+bit 298 O 1 *
+bit 297 O 1 *
+bit 296 I 1 IO_E9
+bit 295 O 1 IO_E9 294 1 Z
+bit 294 C 1 *
+bit 293 I 1 IO_D9
+bit 292 O 1 IO_D9 291 1 Z
+bit 291 C 1 *
+bit 290 I 1 IO_C9
+bit 289 O 1 IO_C9 288 1 Z
+bit 288 C 1 *
+bit 287 I 1 IO_B9
+bit 286 O 1 IO_B9 285 1 Z
+bit 285 C 1 *
+bit 284 I 1 IO_G10
+bit 283 O 1 IO_G10 282 1 Z
+bit 282 C 1 *
+bit 281 I 1 IO_F10
+bit 280 O 1 IO_F10 279 1 Z
+bit 279 C 1 *
+bit 278 I 1 IO_E10
+bit 277 O 1 IO_E10 276 1 Z
+bit 276 C 1 *
+bit 275 I 1 IO_D10
+bit 274 O 1 IO_D10 273 1 Z
+bit 273 C 1 *
+bit 272 I 1 IO_C10
+bit 271 O 1 IO_C10 270 1 Z
+bit 270 C 1 *
+bit 269 I 1 IO_H11
+bit 268 O 1 IO_H11 267 1 Z
+bit 267 C 1 *
+bit 266 I 1 IO_B10
+bit 265 O 1 IO_B10 264 1 Z
+bit 264 C 1 *
+bit 263 I 1 IO_A10
+bit 262 O 1 IO_A10 261 1 Z
+bit 261 C 1 *
+bit 260 I 1 IO_G11
+bit 259 O 1 IO_G11 258 1 Z
+bit 258 C 1 *
+bit 257 I 1 IO_F11
+bit 256 O 1 IO_F11 255 1 Z
+bit 255 C 1 *
+bit 254 O 1 *
+bit 253 O 1 *
+bit 252 O 1 *
+bit 251 I 1 IO_E11
+bit 250 O 1 IO_E11 249 1 Z
+bit 249 C 1 *
+bit 248 I 1 IO_D11
+bit 247 O 1 IO_D11 246 1 Z
+bit 246 C 1 *
+bit 245 I 1 IO_B11
+bit 244 O 1 IO_B11 243 1 Z
+bit 243 C 1 *
+bit 242 I 1 IO_A11
+bit 241 O 1 IO_A11 240 1 Z
+bit 240 C 1 *
+bit 239 I 1 IO_H12
+bit 238 O 1 IO_H12 237 1 Z
+bit 237 C 1 *
+bit 236 I 1 IO_G12
+bit 235 O 1 IO_G12 234 1 Z
+bit 234 C 1 *
+bit 233 I 1 IO_H13
+bit 232 O 1 IO_H13 231 1 Z
+bit 231 C 1 *
+bit 230 I 1 IO_F12
+bit 229 O 1 IO_F12 228 1 Z
+bit 228 C 1 *
+bit 227 I 1 IO_E12
+bit 226 O 1 IO_E12 225 1 Z
+bit 225 C 1 *
+bit 224 I 1 IO_C12
+bit 223 O 1 IO_C12 222 1 Z
+bit 222 C 1 *
+bit 221 I 1 IO_B12
+bit 220 O 1 IO_B12 219 1 Z
+bit 219 C 1 *
+bit 218 I 1 IO_A12
+bit 217 O 1 IO_A12 216 1 Z
+bit 216 C 1 *
+bit 215 I 1 IO_G13
+bit 214 O 1 IO_G13 213 1 Z
+bit 213 C 1 *
+bit 212 I 1 IO_F13
+bit 211 O 1 IO_F13 210 1 Z
+bit 210 C 1 *
+bit 209 I 1 IO_E13
+bit 208 O 1 IO_E13 207 1 Z
+bit 207 C 1 *
+bit 206 I 1 IO_D13
+bit 205 O 1 IO_D13 204 1 Z
+bit 204 C 1 *
+bit 203 I 1 IO_C13
+bit 202 O 1 IO_C13 201 1 Z
+bit 201 C 1 *
+bit 200 I 1 IO_B13
+bit 199 O 1 IO_B13 198 1 Z
+bit 198 C 1 *
+bit 197 I 1 IO_A13
+bit 196 O 1 IO_A13 195 1 Z
+bit 195 C 1 *
+bit 194 I 1 IO_A14
+bit 193 O 1 IO_A14 192 1 Z
+bit 192 C 1 *
+bit 191 I 1 IO_B14
+bit 190 O 1 IO_B14 189 1 Z
+bit 189 C 1 *
+bit 188 I 1 IO_C14
+bit 187 O 1 IO_C14 186 1 Z
+bit 186 C 1 *
+bit 185 I 1 IO_D14
+bit 184 O 1 IO_D14 183 1 Z
+bit 183 C 1 *
+bit 182 I 1 IO_E14
+bit 181 O 1 IO_E14 180 1 Z
+bit 180 C 1 *
+bit 179 I 1 IO_F14
+bit 178 O 1 IO_F14 177 1 Z
+bit 177 C 1 *
+bit 176 I 1 IO_G14
+bit 175 O 1 IO_G14 174 1 Z
+bit 174 C 1 *
+bit 173 I 1 IO_H14
+bit 172 O 1 IO_H14 171 1 Z
+bit 171 C 1 *
+bit 170 I 1 IO_A15
+bit 169 O 1 IO_A15 168 1 Z
+bit 168 C 1 *
+bit 167 I 1 IO_B15
+bit 166 O 1 IO_B15 165 1 Z
+bit 165 C 1 *
+bit 164 I 1 IO_C15
+bit 163 O 1 IO_C15 162 1 Z
+bit 162 C 1 *
+bit 161 I 1 IO_E15
+bit 160 O 1 IO_E15 159 1 Z
+bit 159 C 1 *
+bit 158 I 1 IO_F15
+bit 157 O 1 IO_F15 156 1 Z
+bit 156 C 1 *
+bit 155 I 1 IO_G15
+bit 154 O 1 IO_G15 153 1 Z
+bit 153 C 1 *
+bit 152 I 1 IO_H15
+bit 151 O 1 IO_H15 150 1 Z
+bit 150 C 1 *
+bit 149 I 1 IO_D16
+bit 148 O 1 IO_D16 147 1 Z
+bit 147 C 1 *
+bit 146 I 1 IO_A16
+bit 145 O 1 IO_A16 144 1 Z
+bit 144 C 1 *
+bit 143 I 1 IO_B16
+bit 142 O 1 IO_B16 141 1 Z
+bit 141 C 1 *
+bit 140 I 1 IO_E16
+bit 139 O 1 IO_E16 138 1 Z
+bit 138 C 1 *
+bit 137 I 1 IO_F16
+bit 136 O 1 IO_F16 135 1 Z
+bit 135 C 1 *
+bit 134 O 1 *
+bit 133 O 1 *
+bit 132 O 1 *
+bit 131 I 1 IO_G16
+bit 130 O 1 IO_G16 129 1 Z
+bit 129 C 1 *
+bit 128 I 1 IO_H16
+bit 127 O 1 IO_H16 126 1 Z
+bit 126 C 1 *
+bit 125 I 1 IO_A17
+bit 124 O 1 IO_A17 123 1 Z
+bit 123 C 1 *
+bit 122 I 1 IO_B17
+bit 121 O 1 IO_B17 120 1 Z
+bit 120 C 1 *
+bit 119 I 1 IO_C17
+bit 118 O 1 IO_C17 117 1 Z
+bit 117 C 1 *
+bit 116 I 1 IO_D17
+bit 115 O 1 IO_D17 114 1 Z
+bit 114 C 1 *
+bit 113 I 1 IO_E17
+bit 112 O 1 IO_E17 111 1 Z
+bit 111 C 1 *
+bit 110 I 1 IO_F17
+bit 109 O 1 IO_F17 108 1 Z
+bit 108 C 1 *
+bit 107 I 1 IO_G17
+bit 106 O 1 IO_G17 105 1 Z
+bit 105 C 1 *
+bit 104 O 1 *
+bit 103 O 1 *
+bit 102 O 1 *
+bit 101 I 1 IO_B18
+bit 100 O 1 IO_B18 99 1 Z
+bit 99 C 1 *
+bit 98 I 1 IO_C18
+bit 97 O 1 IO_C18 96 1 Z
+bit 96 C 1 *
+bit 95 I 1 IO_D18
+bit 94 O 1 IO_D18 93 1 Z
+bit 93 C 1 *
+bit 92 O 1 *
+bit 91 O 1 *
+bit 90 O 1 *
+bit 89 I 1 IO_E18
+bit 88 O 1 IO_E18 87 1 Z
+bit 87 C 1 *
+bit 86 I 1 IO_F18
+bit 85 O 1 IO_F18 84 1 Z
+bit 84 C 1 *
+bit 83 I 1 IO_G18
+bit 82 O 1 IO_G18 81 1 Z
+bit 81 C 1 *
+bit 80 I 1 IO_A19
+bit 79 O 1 IO_A19 78 1 Z
+bit 78 C 1 *
+bit 77 I 1 IO_B19
+bit 76 O 1 IO_B19 75 1 Z
+bit 75 C 1 *
+bit 74 O 1 *
+bit 73 O 1 *
+bit 72 O 1 *
+bit 71 I 1 IO_C19
+bit 70 O 1 IO_C19 69 1 Z
+bit 69 C 1 *
+bit 68 I 1 IO_D19
+bit 67 O 1 IO_D19 66 1 Z
+bit 66 C 1 *
+bit 65 I 1 IO_E19
+bit 64 O 1 IO_E19 63 1 Z
+bit 63 C 1 *
+bit 62 I 1 IO_F19
+bit 61 O 1 IO_F19 60 1 Z
+bit 60 C 1 *
+bit 59 I 1 IO_G19
+bit 58 O 1 IO_G19 57 1 Z
+bit 57 C 1 *
+bit 56 I 1 IO_A20
+bit 55 O 1 IO_A20 54 1 Z
+bit 54 C 1 *
+bit 53 I 1 IO_B20
+bit 52 O 1 IO_B20 51 1 Z
+bit 51 C 1 *
+bit 50 I 1 IO_D20
+bit 49 O 1 IO_D20 48 1 Z
+bit 48 C 1 *
+bit 47 I 1 IO_E20
+bit 46 O 1 IO_E20 45 1 Z
+bit 45 C 1 *
+bit 44 I 1 IO_F20
+bit 43 O 1 IO_F20 42 1 Z
+bit 42 C 1 *
+bit 41 I 1 IO_A21
+bit 40 O 1 IO_A21 39 1 Z
+bit 39 C 1 *
+bit 38 I 1 IO_B21
+bit 37 O 1 IO_B21 36 1 Z
+bit 36 C 1 *
+bit 35 I 1 IO_C21
+bit 34 O 1 IO_C21 33 1 Z
+bit 33 C 1 *
+bit 32 I 1 IO_D21
+bit 31 O 1 IO_D21 30 1 Z
+bit 30 C 1 *
+bit 29 I 1 IO_A22
+bit 28 O 1 IO_A22 27 1 Z
+bit 27 C 1 *
+bit 26 I 1 IO_B22
+bit 25 O 1 IO_B22 24 1 Z
+bit 24 C 1 *
+bit 23 I 1 IO_C22
+bit 22 O 1 IO_C22 21 1 Z
+bit 21 C 1 *
+bit 20 I 1 IO_E21
+bit 19 O 1 IO_E21 18 1 Z
+bit 18 C 1 *
+bit 17 I 1 IO_F21
+bit 16 O 1 IO_F21 15 1 Z
+bit 15 C 1 *
+bit 14 I 1 IO_A23
+bit 13 O 1 IO_A23 12 1 Z
+bit 12 C 1 *
+bit 11 I 1 IO_B23
+bit 10 O 1 IO_B23 9 1 Z
+bit 9 C 1 *
+bit 8 I 1 IO_C23
+bit 7 O 1 IO_C23 6 1 Z
+bit 6 C 1 *
+bit 5 I 1 IO_D22
+bit 4 O 1 IO_D22 3 1 Z
+bit 3 C 1 *
+bit 2 I 1 IO_E22
+bit 1 O 1 IO_E22 0 1 Z
+bit 0 C 1 *
--- /dev/null
+0000 xc3s200 0
--- /dev/null
+signal GND1
+signal GND2
+signal GND3
+signal GND4
+signal GND5
+signal GND6
+signal GND7
+signal GND8
+signal GND9
+signal GND10
+signal GND11
+signal GND12
+signal GND13
+signal GND14
+signal GND15
+signal GND16
+signal GND17
+signal GND18
+signal GND19
+signal GND20
+signal GND21
+signal GND22
+signal GND23
+signal GND24
+signal GND25
+signal GND26
+signal GND27
+signal GND28
+signal GND29
+signal GND30
+signal GND31
+signal GND32
+signal GND33
+signal GND34
+signal GND35
+signal GND36
+signal GND37
+signal GND38
+signal GND39
+signal GND40
+signal GND41
+signal GND42
+signal GND43
+signal GND44
+signal GND45
+signal GND46
+signal GND47
+signal GND48
+signal GND49
+signal GND50
+signal GND51
+signal GND52
+signal GND53
+signal GND54
+signal GND55
+signal GND56
+signal NC1
+signal NC2
+signal NC3
+signal NC4
+signal NC5
+signal NC6
+signal NC7
+signal NC8
+signal NC9
+signal NC10
+signal CCLK_PAD208
+signal DONE_PAD207
+signal HSWAP_EN_PAD41
+signal M0_PAD125
+signal M1_PAD124
+signal M2_PAD126
+signal PROG_B
+signal TCK
+signal TDI
+signal TDO
+signal TMS
+signal VCCAUX1
+signal VCCAUX2
+signal VCCAUX3
+signal VCCAUX4
+signal VCCAUX5
+signal VCCAUX6
+signal VCCAUX7
+signal VCCAUX8
+signal VCCINT1
+signal VCCINT2
+signal VCCINT3
+signal VCCINT4
+signal VCCINT5
+signal VCCINT6
+signal VCCINT7
+signal VCCINT8
+signal VCCO01
+signal VCCO02
+signal VCCO03
+signal VCCO04
+signal VCCO05
+signal VCCO11
+signal VCCO12
+signal VCCO13
+signal VCCO14
+signal VCCO15
+signal VCCO16
+signal VCCO21
+signal VCCO22
+signal VCCO23
+signal VCCO24
+signal VCCO25
+signal VCCO31
+signal VCCO32
+signal VCCO33
+signal VCCO34
+signal VCCO35
+signal VCCO41
+signal VCCO42
+signal VCCO43
+signal VCCO44
+signal VCCO45
+signal VCCO51
+signal VCCO52
+signal VCCO53
+signal VCCO54
+signal VCCO55
+signal VCCO56
+signal VCCO61
+signal VCCO62
+signal VCCO63
+signal VCCO64
+signal VCCO65
+signal VCCO71
+signal VCCO72
+signal VCCO73
+signal VCCO74
+signal VCCO75
+signal IO_PAD2
+signal IO_PAD3
+signal IO_PAD4
+signal IO_PAD6
+signal IO_PAD8
+signal IO_PAD9
+signal IO_PAD10
+signal IO_PAD12
+signal IO_PAD13
+signal IO_PAD14
+signal IO_PAD16
+signal IO_PAD18
+signal IO_PAD20
+signal IO_PAD22
+signal IO_PAD24
+signal IO_PAD25
+signal IO_PAD28
+signal IO_PAD30
+signal IO_PAD31
+signal IO_PAD32
+signal IO_PAD33
+signal IO_PAD34
+signal IO_PAD38
+signal IO_PAD39
+signal IO_PAD40
+signal IO_PAD47
+signal IO_PAD48
+signal IO_PAD50
+signal IO_PAD52
+signal IO_PAD53
+signal IO_PAD54
+signal IO_PAD56
+signal IO_PAD58
+signal IO_PAD59
+signal IO_PAD60
+signal IO_PAD61
+signal IO_PAD62
+signal IO_PAD64
+signal IO_PAD66
+signal IO_PAD68
+signal IO_PAD70
+signal IO_PAD71
+signal IO_PAD72
+signal IO_PAD74
+signal IO_PAD75
+signal IO_PAD76
+signal IO_PAD78
+signal IO_PAD80
+signal IO_PAD82
+signal IO_PAD85
+signal IO_PAD87
+signal IO_PAD89
+signal IO_PAD91
+signal IO_PAD92
+signal IO_PAD93
+signal IO_PAD95
+signal IO_PAD96
+signal IO_PAD97
+signal IO_PAD99
+signal IO_PAD101
+signal IO_PAD103
+signal IO_PAD105
+signal IO_PAD106
+signal IO_PAD107
+signal IO_PAD108
+signal IO_PAD109
+signal IO_PAD111
+signal IO_PAD113
+signal IO_PAD114
+signal IO_PAD115
+signal IO_PAD117
+signal IO_PAD119
+signal IO_PAD120
+signal IO_PAD127
+signal IO_PAD128
+signal IO_PAD131
+signal IO_PAD133
+signal IO_PAD134
+signal IO_PAD135
+signal IO_PAD136
+signal IO_PAD137
+signal IO_PAD139
+signal IO_PAD142
+signal IO_PAD143
+signal IO_PAD145
+signal IO_PAD147
+signal IO_PAD149
+signal IO_PAD151
+signal IO_PAD153
+signal IO_PAD154
+signal IO_PAD155
+signal IO_PAD157
+signal IO_PAD158
+signal IO_PAD159
+signal IO_PAD161
+signal IO_PAD163
+signal IO_PAD164
+signal IO_PAD165
+signal IO_PAD169
+signal IO_PAD170
+signal IO_PAD171
+signal IO_PAD173
+signal IO_PAD175
+signal IO_PAD176
+signal IO_PAD177
+signal IO_PAD179
+signal IO_PAD180
+signal IO_PAD181
+signal IO_PAD183
+signal IO_PAD185
+signal IO_PAD187
+signal IO_PAD189
+signal IO_PAD191
+signal IO_PAD192
+signal IO_PAD195
+signal IO_PAD197
+signal IO_PAD198
+signal IO_PAD199
+signal IO_PAD200
+signal IO_PAD201
+signal IO_PAD204
+signal IO_PAD205
+signal IO_PAD206
+signal IO_PAD212
+signal IO_PAD213
+signal IO_PAD215
+signal IO_PAD217
+signal IO_PAD218
+signal IO_PAD219
+signal IO_PAD221
+signal IO_PAD223
+signal IO_PAD224
+signal IO_PAD225
+signal IO_PAD226
+signal IO_PAD227
+signal IO_PAD229
+signal IO_PAD231
+signal IO_PAD233
+signal IO_PAD235
+signal IO_PAD236
+signal IO_PAD237
+signal IO_PAD239
+signal IO_PAD240
+signal IO_PAD241
+signal IO_PAD243
+signal IO_PAD245
+signal IO_PAD247
+signal IO_PAD250
+signal IO_PAD252
+signal IO_PAD254
+signal IO_PAD256
+signal IO_PAD257
+signal IO_PAD258
+signal IO_PAD260
+signal IO_PAD261
+signal IO_PAD262
+signal IO_PAD264
+signal IO_PAD266
+signal IO_PAD268
+signal IO_PAD270
+signal IO_PAD271
+signal IO_PAD272
+signal IO_PAD273
+signal IO_PAD274
+signal IO_PAD276
+signal IO_PAD278
+signal IO_PAD279
+signal IO_PAD280
+signal IO_PAD282
+signal IO_PAD284
+signal IO_PAD285
+signal IO_PAD292
+signal IO_PAD293
+signal IO_PAD296
+signal IO_PAD298
+signal IO_PAD299
+signal IO_PAD300
+signal IO_PAD301
+signal IO_PAD302
+signal IO_PAD304
+signal IO_PAD307
+signal IO_PAD308
+signal IO_PAD310
+signal IO_PAD312
+signal IO_PAD314
+signal IO_PAD316
+signal IO_PAD318
+signal IO_PAD319
+signal IO_PAD320
+signal IO_PAD322
+signal IO_PAD323
+signal IO_PAD324
+signal IO_PAD326
+signal IO_PAD328
+signal IO_PAD329
+
+register BSR 599
+register BR 1
+register DIR 32
+
+instruction length 6
+
+instruction EXTEST 000000 BSR
+instruction SAMPLE/PRELOAD 000001 BSR
+instruction IDCODE 001001 DIR
+instruction BYPASS 111111 BR
+
+bit 598 I 1 IO_PAD285
+bit 597 O 1 IO_PAD285 596 1 Z
+bit 596 C 1 *
+bit 595 I 1 IO_PAD284
+bit 594 O 1 IO_PAD284 593 1 Z
+bit 593 C 1 *
+bit 592 I 1 IO_PAD282
+bit 591 O 1 IO_PAD282 590 1 Z
+bit 590 C 1 *
+bit 589 I 1 IO_PAD280
+bit 588 O 1 IO_PAD280 587 1 Z
+bit 587 C 1 *
+bit 586 I 1 IO_PAD279
+bit 585 O 1 IO_PAD279 584 1 Z
+bit 584 C 1 *
+bit 583 I 1 IO_PAD278
+bit 582 O 1 IO_PAD278 581 1 Z
+bit 581 C 1 *
+bit 580 I 1 IO_PAD276
+bit 579 O 1 IO_PAD276 578 1 Z
+bit 578 C 1 *
+bit 577 I 1 IO_PAD274
+bit 576 O 1 IO_PAD274 575 1 Z
+bit 575 C 1 *
+bit 574 I 1 IO_PAD273
+bit 573 O 1 IO_PAD273 572 1 Z
+bit 572 C 1 *
+bit 571 I 1 IO_PAD272
+bit 570 O 1 IO_PAD272 569 1 Z
+bit 569 C 1 *
+bit 568 I 1 IO_PAD271
+bit 567 O 1 IO_PAD271 566 1 Z
+bit 566 C 1 *
+bit 565 I 1 IO_PAD270
+bit 564 O 1 IO_PAD270 563 1 Z
+bit 563 C 1 *
+bit 562 I 1 IO_PAD268
+bit 561 O 1 IO_PAD268 560 1 Z
+bit 560 C 1 *
+bit 559 I 1 IO_PAD266
+bit 558 O 1 IO_PAD266 557 1 Z
+bit 557 C 1 *
+bit 556 I 1 IO_PAD264
+bit 555 O 1 IO_PAD264 554 1 Z
+bit 554 C 1 *
+bit 553 I 1 IO_PAD262
+bit 552 O 1 IO_PAD262 551 1 Z
+bit 551 C 1 *
+bit 550 I 1 IO_PAD261
+bit 549 O 1 IO_PAD261 548 1 Z
+bit 548 C 1 *
+bit 547 I 1 IO_PAD260
+bit 546 O 1 IO_PAD260 545 1 Z
+bit 545 C 1 *
+bit 544 I 1 IO_PAD258
+bit 543 O 1 IO_PAD258 542 1 Z
+bit 542 C 1 *
+bit 541 I 1 IO_PAD257
+bit 540 O 1 IO_PAD257 539 1 Z
+bit 539 C 1 *
+bit 538 I 1 IO_PAD256
+bit 537 O 1 IO_PAD256 536 1 Z
+bit 536 C 1 *
+bit 535 I 1 IO_PAD254
+bit 534 O 1 IO_PAD254 533 1 Z
+bit 533 C 1 *
+bit 532 I 1 IO_PAD252
+bit 531 O 1 IO_PAD252 530 1 Z
+bit 530 C 1 *
+bit 529 I 1 IO_PAD250
+bit 528 O 1 IO_PAD250 527 1 Z
+bit 527 C 1 *
+bit 526 I 1 IO_PAD247
+bit 525 O 1 IO_PAD247 524 1 Z
+bit 524 C 1 *
+bit 523 I 1 IO_PAD245
+bit 522 O 1 IO_PAD245 521 1 Z
+bit 521 C 1 *
+bit 520 I 1 IO_PAD243
+bit 519 O 1 IO_PAD243 518 1 Z
+bit 518 C 1 *
+bit 517 I 1 IO_PAD241
+bit 516 O 1 IO_PAD241 515 1 Z
+bit 515 C 1 *
+bit 514 I 1 IO_PAD240
+bit 513 O 1 IO_PAD240 512 1 Z
+bit 512 C 1 *
+bit 511 I 1 IO_PAD239
+bit 510 O 1 IO_PAD239 509 1 Z
+bit 509 C 1 *
+bit 508 I 1 IO_PAD237
+bit 507 O 1 IO_PAD237 506 1 Z
+bit 506 C 1 *
+bit 505 I 1 IO_PAD236
+bit 504 O 1 IO_PAD236 503 1 Z
+bit 503 C 1 *
+bit 502 I 1 IO_PAD235
+bit 501 O 1 IO_PAD235 500 1 Z
+bit 500 C 1 *
+bit 499 I 1 IO_PAD233
+bit 498 O 1 IO_PAD233 497 1 Z
+bit 497 C 1 *
+bit 496 I 1 IO_PAD231
+bit 495 O 1 IO_PAD231 494 1 Z
+bit 494 C 1 *
+bit 493 I 1 IO_PAD229
+bit 492 O 1 IO_PAD229 491 1 Z
+bit 491 C 1 *
+bit 490 I 1 IO_PAD227
+bit 489 O 1 IO_PAD227 488 1 Z
+bit 488 C 1 *
+bit 487 I 1 IO_PAD226
+bit 486 O 1 IO_PAD226 485 1 Z
+bit 485 C 1 *
+bit 484 I 1 IO_PAD225
+bit 483 O 1 IO_PAD225 482 1 Z
+bit 482 C 1 *
+bit 481 I 1 IO_PAD224
+bit 480 O 1 IO_PAD224 479 1 Z
+bit 479 C 1 *
+bit 478 I 1 IO_PAD223
+bit 477 O 1 IO_PAD223 476 1 Z
+bit 476 C 1 *
+bit 475 I 1 IO_PAD221
+bit 474 O 1 IO_PAD221 473 1 Z
+bit 473 C 1 *
+bit 472 I 1 IO_PAD219
+bit 471 O 1 IO_PAD219 470 1 Z
+bit 470 C 1 *
+bit 469 I 1 IO_PAD218
+bit 468 O 1 IO_PAD218 467 1 Z
+bit 467 C 1 *
+bit 466 I 1 IO_PAD217
+bit 465 O 1 IO_PAD217 464 1 Z
+bit 464 C 1 *
+bit 463 I 1 IO_PAD215
+bit 462 O 1 IO_PAD215 461 1 Z
+bit 461 C 1 *
+bit 460 I 1 IO_PAD213
+bit 459 O 1 IO_PAD213 458 1 Z
+bit 458 C 1 *
+bit 457 I 1 IO_PAD212
+bit 456 O 1 IO_PAD212 455 1 Z
+bit 455 C 1 *
+bit 454 I 1 CCLK_PAD208
+bit 453 O 1 CCLK_PAD208 452 1 Z
+bit 452 C 1 *
+bit 451 I 1 DONE_PAD207
+bit 450 O 1 DONE_PAD207 449 1 Z
+bit 449 C 1 *
+bit 448 I 1 IO_PAD206
+bit 447 O 1 IO_PAD206 446 1 Z
+bit 446 C 1 *
+bit 445 I 1 IO_PAD205
+bit 444 O 1 IO_PAD205 443 1 Z
+bit 443 C 1 *
+bit 442 I 1 IO_PAD204
+bit 441 O 1 IO_PAD204 440 1 Z
+bit 440 C 1 *
+bit 439 I 1 IO_PAD201
+bit 438 O 1 IO_PAD201 437 1 Z
+bit 437 C 1 *
+bit 436 I 1 IO_PAD200
+bit 435 O 1 IO_PAD200 434 1 Z
+bit 434 C 1 *
+bit 433 I 1 IO_PAD199
+bit 432 O 1 IO_PAD199 431 1 Z
+bit 431 C 1 *
+bit 430 I 1 IO_PAD198
+bit 429 O 1 IO_PAD198 428 1 Z
+bit 428 C 1 *
+bit 427 I 1 IO_PAD197
+bit 426 O 1 IO_PAD197 425 1 Z
+bit 425 C 1 *
+bit 424 I 1 IO_PAD195
+bit 423 O 1 IO_PAD195 422 1 Z
+bit 422 C 1 *
+bit 421 I 1 IO_PAD192
+bit 420 O 1 IO_PAD192 419 1 Z
+bit 419 C 1 *
+bit 418 I 1 IO_PAD191
+bit 417 O 1 IO_PAD191 416 1 Z
+bit 416 C 1 *
+bit 415 I 1 IO_PAD189
+bit 414 O 1 IO_PAD189 413 1 Z
+bit 413 C 1 *
+bit 412 I 1 IO_PAD187
+bit 411 O 1 IO_PAD187 410 1 Z
+bit 410 C 1 *
+bit 409 I 1 IO_PAD185
+bit 408 O 1 IO_PAD185 407 1 Z
+bit 407 C 1 *
+bit 406 I 1 IO_PAD183
+bit 405 O 1 IO_PAD183 404 1 Z
+bit 404 C 1 *
+bit 403 I 1 IO_PAD181
+bit 402 O 1 IO_PAD181 401 1 Z
+bit 401 C 1 *
+bit 400 I 1 IO_PAD180
+bit 399 O 1 IO_PAD180 398 1 Z
+bit 398 C 1 *
+bit 397 I 1 IO_PAD179
+bit 396 O 1 IO_PAD179 395 1 Z
+bit 395 C 1 *
+bit 394 I 1 IO_PAD177
+bit 393 O 1 IO_PAD177 392 1 Z
+bit 392 C 1 *
+bit 391 I 1 IO_PAD176
+bit 390 O 1 IO_PAD176 389 1 Z
+bit 389 C 1 *
+bit 388 I 1 IO_PAD175
+bit 387 O 1 IO_PAD175 386 1 Z
+bit 386 C 1 *
+bit 385 I 1 IO_PAD173
+bit 384 O 1 IO_PAD173 383 1 Z
+bit 383 C 1 *
+bit 382 I 1 IO_PAD171
+bit 381 O 1 IO_PAD171 380 1 Z
+bit 380 C 1 *
+bit 379 I 1 IO_PAD170
+bit 378 O 1 IO_PAD170 377 1 Z
+bit 377 C 1 *
+bit 376 I 1 IO_PAD169
+bit 375 O 1 IO_PAD169 374 1 Z
+bit 374 C 1 *
+bit 373 I 1 IO_PAD165
+bit 372 O 1 IO_PAD165 371 1 Z
+bit 371 C 1 *
+bit 370 I 1 IO_PAD164
+bit 369 O 1 IO_PAD164 368 1 Z
+bit 368 C 1 *
+bit 367 I 1 IO_PAD163
+bit 366 O 1 IO_PAD163 365 1 Z
+bit 365 C 1 *
+bit 364 I 1 IO_PAD161
+bit 363 O 1 IO_PAD161 362 1 Z
+bit 362 C 1 *
+bit 361 I 1 IO_PAD159
+bit 360 O 1 IO_PAD159 359 1 Z
+bit 359 C 1 *
+bit 358 I 1 IO_PAD158
+bit 357 O 1 IO_PAD158 356 1 Z
+bit 356 C 1 *
+bit 355 I 1 IO_PAD157
+bit 354 O 1 IO_PAD157 353 1 Z
+bit 353 C 1 *
+bit 352 I 1 IO_PAD155
+bit 351 O 1 IO_PAD155 350 1 Z
+bit 350 C 1 *
+bit 349 I 1 IO_PAD154
+bit 348 O 1 IO_PAD154 347 1 Z
+bit 347 C 1 *
+bit 346 I 1 IO_PAD153
+bit 345 O 1 IO_PAD153 344 1 Z
+bit 344 C 1 *
+bit 343 I 1 IO_PAD151
+bit 342 O 1 IO_PAD151 341 1 Z
+bit 341 C 1 *
+bit 340 I 1 IO_PAD149
+bit 339 O 1 IO_PAD149 338 1 Z
+bit 338 C 1 *
+bit 337 I 1 IO_PAD147
+bit 336 O 1 IO_PAD147 335 1 Z
+bit 335 C 1 *
+bit 334 I 1 IO_PAD145
+bit 333 O 1 IO_PAD145 332 1 Z
+bit 332 C 1 *
+bit 331 I 1 IO_PAD143
+bit 330 O 1 IO_PAD143 329 1 Z
+bit 329 C 1 *
+bit 328 I 1 IO_PAD142
+bit 327 O 1 IO_PAD142 326 1 Z
+bit 326 C 1 *
+bit 325 I 1 IO_PAD139
+bit 324 O 1 IO_PAD139 323 1 Z
+bit 323 C 1 *
+bit 322 I 1 IO_PAD137
+bit 321 O 1 IO_PAD137 320 1 Z
+bit 320 C 1 *
+bit 319 I 1 IO_PAD136
+bit 318 O 1 IO_PAD136 317 1 Z
+bit 317 C 1 *
+bit 316 I 1 IO_PAD135
+bit 315 O 1 IO_PAD135 314 1 Z
+bit 314 C 1 *
+bit 313 I 1 IO_PAD134
+bit 312 O 1 IO_PAD134 311 1 Z
+bit 311 C 1 *
+bit 310 I 1 IO_PAD133
+bit 309 O 1 IO_PAD133 308 1 Z
+bit 308 C 1 *
+bit 307 I 1 IO_PAD131
+bit 306 O 1 IO_PAD131 305 1 Z
+bit 305 C 1 *
+bit 304 I 1 IO_PAD128
+bit 303 O 1 IO_PAD128 302 1 Z
+bit 302 C 1 *
+bit 301 I 1 IO_PAD127
+bit 300 O 1 IO_PAD127 299 1 Z
+bit 299 C 1 *
+bit 298 I 1 M2_PAD126
+bit 297 I 1 M0_PAD125
+bit 296 I 1 M1_PAD124
+bit 295 I 1 IO_PAD120
+bit 294 O 1 IO_PAD120 293 1 Z
+bit 293 C 1 *
+bit 292 I 1 IO_PAD119
+bit 291 O 1 IO_PAD119 290 1 Z
+bit 290 C 1 *
+bit 289 I 1 IO_PAD117
+bit 288 O 1 IO_PAD117 287 1 Z
+bit 287 C 1 *
+bit 286 I 1 IO_PAD115
+bit 285 O 1 IO_PAD115 284 1 Z
+bit 284 C 1 *
+bit 283 I 1 IO_PAD114
+bit 282 O 1 IO_PAD114 281 1 Z
+bit 281 C 1 *
+bit 280 I 1 IO_PAD113
+bit 279 O 1 IO_PAD113 278 1 Z
+bit 278 C 1 *
+bit 277 I 1 IO_PAD111
+bit 276 O 1 IO_PAD111 275 1 Z
+bit 275 C 1 *
+bit 274 I 1 IO_PAD109
+bit 273 O 1 IO_PAD109 272 1 Z
+bit 272 C 1 *
+bit 271 I 1 IO_PAD108
+bit 270 O 1 IO_PAD108 269 1 Z
+bit 269 C 1 *
+bit 268 I 1 IO_PAD107
+bit 267 O 1 IO_PAD107 266 1 Z
+bit 266 C 1 *
+bit 265 I 1 IO_PAD106
+bit 264 O 1 IO_PAD106 263 1 Z
+bit 263 C 1 *
+bit 262 I 1 IO_PAD105
+bit 261 O 1 IO_PAD105 260 1 Z
+bit 260 C 1 *
+bit 259 I 1 IO_PAD103
+bit 258 O 1 IO_PAD103 257 1 Z
+bit 257 C 1 *
+bit 256 I 1 IO_PAD101
+bit 255 O 1 IO_PAD101 254 1 Z
+bit 254 C 1 *
+bit 253 I 1 IO_PAD99
+bit 252 O 1 IO_PAD99 251 1 Z
+bit 251 C 1 *
+bit 250 I 1 IO_PAD97
+bit 249 O 1 IO_PAD97 248 1 Z
+bit 248 C 1 *
+bit 247 I 1 IO_PAD96
+bit 246 O 1 IO_PAD96 245 1 Z
+bit 245 C 1 *
+bit 244 I 1 IO_PAD95
+bit 243 O 1 IO_PAD95 242 1 Z
+bit 242 C 1 *
+bit 241 I 1 IO_PAD93
+bit 240 O 1 IO_PAD93 239 1 Z
+bit 239 C 1 *
+bit 238 I 1 IO_PAD92
+bit 237 O 1 IO_PAD92 236 1 Z
+bit 236 C 1 *
+bit 235 I 1 IO_PAD91
+bit 234 O 1 IO_PAD91 233 1 Z
+bit 233 C 1 *
+bit 232 I 1 IO_PAD89
+bit 231 O 1 IO_PAD89 230 1 Z
+bit 230 C 1 *
+bit 229 I 1 IO_PAD87
+bit 228 O 1 IO_PAD87 227 1 Z
+bit 227 C 1 *
+bit 226 I 1 IO_PAD85
+bit 225 O 1 IO_PAD85 224 1 Z
+bit 224 C 1 *
+bit 223 I 1 IO_PAD82
+bit 222 O 1 IO_PAD82 221 1 Z
+bit 221 C 1 *
+bit 220 I 1 IO_PAD80
+bit 219 O 1 IO_PAD80 218 1 Z
+bit 218 C 1 *
+bit 217 I 1 IO_PAD78
+bit 216 O 1 IO_PAD78 215 1 Z
+bit 215 C 1 *
+bit 214 I 1 IO_PAD76
+bit 213 O 1 IO_PAD76 212 1 Z
+bit 212 C 1 *
+bit 211 I 1 IO_PAD75
+bit 210 O 1 IO_PAD75 209 1 Z
+bit 209 C 1 *
+bit 208 I 1 IO_PAD74
+bit 207 O 1 IO_PAD74 206 1 Z
+bit 206 C 1 *
+bit 205 I 1 IO_PAD72
+bit 204 O 1 IO_PAD72 203 1 Z
+bit 203 C 1 *
+bit 202 I 1 IO_PAD71
+bit 201 O 1 IO_PAD71 200 1 Z
+bit 200 C 1 *
+bit 199 I 1 IO_PAD70
+bit 198 O 1 IO_PAD70 197 1 Z
+bit 197 C 1 *
+bit 196 I 1 IO_PAD68
+bit 195 O 1 IO_PAD68 194 1 Z
+bit 194 C 1 *
+bit 193 I 1 IO_PAD66
+bit 192 O 1 IO_PAD66 191 1 Z
+bit 191 C 1 *
+bit 190 I 1 IO_PAD64
+bit 189 O 1 IO_PAD64 188 1 Z
+bit 188 C 1 *
+bit 187 I 1 IO_PAD62
+bit 186 O 1 IO_PAD62 185 1 Z
+bit 185 C 1 *
+bit 184 I 1 IO_PAD61
+bit 183 O 1 IO_PAD61 182 1 Z
+bit 182 C 1 *
+bit 181 I 1 IO_PAD60
+bit 180 O 1 IO_PAD60 179 1 Z
+bit 179 C 1 *
+bit 178 I 1 IO_PAD59
+bit 177 O 1 IO_PAD59 176 1 Z
+bit 176 C 1 *
+bit 175 I 1 IO_PAD58
+bit 174 O 1 IO_PAD58 173 1 Z
+bit 173 C 1 *
+bit 172 I 1 IO_PAD56
+bit 171 O 1 IO_PAD56 170 1 Z
+bit 170 C 1 *
+bit 169 I 1 IO_PAD54
+bit 168 O 1 IO_PAD54 167 1 Z
+bit 167 C 1 *
+bit 166 I 1 IO_PAD53
+bit 165 O 1 IO_PAD53 164 1 Z
+bit 164 C 1 *
+bit 163 I 1 IO_PAD52
+bit 162 O 1 IO_PAD52 161 1 Z
+bit 161 C 1 *
+bit 160 I 1 IO_PAD50
+bit 159 O 1 IO_PAD50 158 1 Z
+bit 158 C 1 *
+bit 157 I 1 IO_PAD48
+bit 156 O 1 IO_PAD48 155 1 Z
+bit 155 C 1 *
+bit 154 I 1 IO_PAD47
+bit 153 O 1 IO_PAD47 152 1 Z
+bit 152 C 1 *
+bit 151 O 1 *
+bit 150 I 1 HSWAP_EN_PAD41
+bit 149 I 1 IO_PAD40
+bit 148 O 1 IO_PAD40 147 1 Z
+bit 147 C 1 *
+bit 146 I 1 IO_PAD39
+bit 145 O 1 IO_PAD39 144 1 Z
+bit 144 C 1 *
+bit 143 I 1 IO_PAD38
+bit 142 O 1 IO_PAD38 141 1 Z
+bit 141 C 1 *
+bit 140 I 1 IO_PAD34
+bit 139 O 1 IO_PAD34 138 1 Z
+bit 138 C 1 *
+bit 137 I 1 IO_PAD33
+bit 136 O 1 IO_PAD33 135 1 Z
+bit 135 C 1 *
+bit 134 I 1 IO_PAD32
+bit 133 O 1 IO_PAD32 132 1 Z
+bit 132 C 1 *
+bit 131 I 1 IO_PAD31
+bit 130 O 1 IO_PAD31 129 1 Z
+bit 129 C 1 *
+bit 128 I 1 IO_PAD30
+bit 127 O 1 IO_PAD30 126 1 Z
+bit 126 C 1 *
+bit 125 I 1 IO_PAD28
+bit 124 O 1 IO_PAD28 123 1 Z
+bit 123 C 1 *
+bit 122 I 1 IO_PAD25
+bit 121 O 1 IO_PAD25 120 1 Z
+bit 120 C 1 *
+bit 119 I 1 IO_PAD24
+bit 118 O 1 IO_PAD24 117 1 Z
+bit 117 C 1 *
+bit 116 I 1 IO_PAD22
+bit 115 O 1 IO_PAD22 114 1 Z
+bit 114 C 1 *
+bit 113 I 1 IO_PAD20
+bit 112 O 1 IO_PAD20 111 1 Z
+bit 111 C 1 *
+bit 110 I 1 IO_PAD18
+bit 109 O 1 IO_PAD18 108 1 Z
+bit 108 C 1 *
+bit 107 I 1 IO_PAD16
+bit 106 O 1 IO_PAD16 105 1 Z
+bit 105 C 1 *
+bit 104 I 1 IO_PAD14
+bit 103 O 1 IO_PAD14 102 1 Z
+bit 102 C 1 *
+bit 101 I 1 IO_PAD13
+bit 100 O 1 IO_PAD13 99 1 Z
+bit 99 C 1 *
+bit 98 I 1 IO_PAD12
+bit 97 O 1 IO_PAD12 96 1 Z
+bit 96 C 1 *
+bit 95 I 1 IO_PAD10
+bit 94 O 1 IO_PAD10 93 1 Z
+bit 93 C 1 *
+bit 92 I 1 IO_PAD9
+bit 91 O 1 IO_PAD9 90 1 Z
+bit 90 C 1 *
+bit 89 I 1 IO_PAD8
+bit 88 O 1 IO_PAD8 87 1 Z
+bit 87 C 1 *
+bit 86 I 1 IO_PAD6
+bit 85 O 1 IO_PAD6 84 1 Z
+bit 84 C 1 *
+bit 83 I 1 IO_PAD4
+bit 82 O 1 IO_PAD4 81 1 Z
+bit 81 C 1 *
+bit 80 I 1 IO_PAD3
+bit 79 O 1 IO_PAD3 78 1 Z
+bit 78 C 1 *
+bit 77 I 1 IO_PAD2
+bit 76 O 1 IO_PAD2 75 1 Z
+bit 75 C 1 *
+bit 74 I 1 IO_PAD330
+bit 73 O 1 IO_PAD330 72 1 Z
+bit 72 C 1 *
+bit 71 I 1 IO_PAD329
+bit 70 O 1 IO_PAD329 69 1 Z
+bit 69 C 1 *
+bit 68 I 1 IO_PAD328
+bit 67 O 1 IO_PAD328 66 1 Z
+bit 66 C 1 *
+bit 65 I 1 IO_PAD326
+bit 64 O 1 IO_PAD326 63 1 Z
+bit 63 C 1 *
+bit 62 I 1 IO_PAD324
+bit 61 O 1 IO_PAD324 60 1 Z
+bit 60 C 1 *
+bit 59 I 1 IO_PAD323
+bit 58 O 1 IO_PAD323 57 1 Z
+bit 57 C 1 *
+bit 56 I 1 IO_PAD322
+bit 55 O 1 IO_PAD322 54 1 Z
+bit 54 C 1 *
+bit 53 I 1 IO_PAD320
+bit 52 O 1 IO_PAD320 51 1 Z
+bit 51 C 1 *
+bit 50 I 1 IO_PAD319
+bit 49 O 1 IO_PAD319 48 1 Z
+bit 48 C 1 *
+bit 47 I 1 IO_PAD318
+bit 46 O 1 IO_PAD318 45 1 Z
+bit 45 C 1 *
+bit 44 I 1 IO_PAD316
+bit 43 O 1 IO_PAD316 42 1 Z
+bit 42 C 1 *
+bit 41 I 1 IO_PAD314
+bit 40 O 1 IO_PAD314 39 1 Z
+bit 39 C 1 *
+bit 38 I 1 IO_PAD312
+bit 37 O 1 IO_PAD312 36 1 Z
+bit 36 C 1 *
+bit 35 I 1 IO_PAD310
+bit 34 O 1 IO_PAD310 33 1 Z
+bit 33 C 1 *
+bit 32 I 1 IO_PAD308
+bit 31 O 1 IO_PAD308 30 1 Z
+bit 30 C 1 *
+bit 29 I 1 IO_PAD307
+bit 28 O 1 IO_PAD307 27 1 Z
+bit 27 C 1 *
+bit 26 I 1 IO_PAD304
+bit 25 O 1 IO_PAD304 24 1 Z
+bit 24 C 1 *
+bit 23 I 1 IO_PAD302
+bit 22 O 1 IO_PAD302 21 1 Z
+bit 21 C 1 *
+bit 20 I 1 IO_PAD301
+bit 19 O 1 IO_PAD301 18 1 Z
+bit 18 C 1 *
+bit 17 I 1 IO_PAD300
+bit 16 O 1 IO_PAD300 15 1 Z
+bit 15 C 1 *
+bit 14 I 1 IO_PAD299
+bit 13 O 1 IO_PAD299 12 1 Z
+bit 12 C 1 *
+bit 11 I 1 IO_PAD298
+bit 10 O 1 IO_PAD298 9 1 Z
+bit 9 C 1 *
+bit 8 I 1 IO_PAD296
+bit 7 O 1 IO_PAD296 6 1 Z
+bit 6 C 1 *
+bit 5 I 1 IO_PAD293
+bit 4 O 1 IO_PAD293 3 1 Z
+bit 3 C 1 *
+bit 2 I 1 IO_PAD292
+bit 1 O 1 IO_PAD292 0 1 Z
+bit 0 C 1 *
--- /dev/null
+signal GND1
+signal GND2
+signal GND3
+signal GND4
+signal GND5
+signal GND6
+signal GND7
+signal GND8
+signal GND9
+signal GND10
+signal GND11
+signal GND12
+signal GND13
+signal GND14
+signal GND15
+signal GND16
+signal GND17
+signal GND18
+signal GND19
+signal GND20
+signal GND21
+signal GND22
+signal GND23
+signal GND24
+signal GND25
+signal GND26
+signal GND27
+signal GND28
+signal GND29
+signal GND30
+signal GND31
+signal GND32
+signal CCLK_T15
+signal DONE_R14
+signal HSWAP_EN_C4
+signal M0_P3
+signal M1_T2
+signal M2_P4
+signal PROG_B
+signal TCK
+signal TDI
+signal TDO
+signal TMS
+signal VCCAUX1
+signal VCCAUX2
+signal VCCAUX3
+signal VCCAUX4
+signal VCCAUX5
+signal VCCAUX6
+signal VCCAUX7
+signal VCCAUX8
+signal VCCINT1
+signal VCCINT2
+signal VCCINT3
+signal VCCINT4
+signal VCCINT5
+signal VCCINT6
+signal VCCINT7
+signal VCCINT8
+signal VCCO01
+signal VCCO02
+signal VCCO03
+signal VCCO11
+signal VCCO12
+signal VCCO13
+signal VCCO21
+signal VCCO22
+signal VCCO23
+signal VCCO31
+signal VCCO32
+signal VCCO33
+signal VCCO41
+signal VCCO42
+signal VCCO43
+signal VCCO51
+signal VCCO52
+signal VCCO53
+signal VCCO61
+signal VCCO62
+signal VCCO63
+signal VCCO71
+signal VCCO72
+signal VCCO73
+signal IO_A3
+signal IO_A4
+signal IO_A5
+signal IO_A7
+signal IO_A8
+signal IO_A9
+signal IO_A10
+signal IO_A12
+signal IO_A13
+signal IO_A14
+signal IO_B1
+signal IO_B4
+signal IO_B5
+signal IO_B6
+signal IO_B7
+signal IO_B8
+signal IO_B10
+signal IO_B11
+signal IO_B12
+signal IO_B13
+signal IO_B14
+signal IO_B16
+signal IO_C1
+signal IO_C2
+signal IO_C3
+signal IO_C5
+signal IO_C6
+signal IO_C7
+signal IO_C8
+signal IO_C9
+signal IO_C10
+signal IO_C11
+signal IO_C12
+signal IO_C15
+signal IO_C16
+signal IO_D1
+signal IO_D2
+signal IO_D3
+signal IO_D5
+signal IO_D6
+signal IO_D7
+signal IO_D8
+signal IO_D9
+signal IO_D10
+signal IO_D11
+signal IO_D12
+signal IO_D14
+signal IO_D15
+signal IO_D16
+signal IO_E1
+signal IO_E2
+signal IO_E3
+signal IO_E4
+signal IO_E6
+signal IO_E7
+signal IO_E10
+signal IO_E11
+signal IO_E13
+signal IO_E14
+signal IO_E15
+signal IO_E16
+signal IO_F2
+signal IO_F3
+signal IO_F4
+signal IO_F5
+signal IO_F12
+signal IO_F13
+signal IO_F14
+signal IO_F15
+signal IO_G1
+signal IO_G2
+signal IO_G3
+signal IO_G4
+signal IO_G5
+signal IO_G12
+signal IO_G13
+signal IO_G14
+signal IO_G15
+signal IO_G16
+signal IO_H1
+signal IO_H3
+signal IO_H4
+signal IO_H13
+signal IO_H14
+signal IO_H15
+signal IO_H16
+signal IO_J1
+signal IO_J2
+signal IO_J3
+signal IO_J4
+signal IO_J13
+signal IO_J14
+signal IO_J16
+signal IO_K1
+signal IO_K2
+signal IO_K3
+signal IO_K4
+signal IO_K5
+signal IO_K12
+signal IO_K13
+signal IO_K14
+signal IO_K15
+signal IO_K16
+signal IO_L2
+signal IO_L3
+signal IO_L4
+signal IO_L5
+signal IO_L12
+signal IO_L13
+signal IO_L14
+signal IO_L15
+signal IO_M1
+signal IO_M2
+signal IO_M3
+signal IO_M4
+signal IO_M6
+signal IO_M7
+signal IO_M10
+signal IO_M11
+signal IO_M13
+signal IO_M14
+signal IO_M15
+signal IO_M16
+signal IO_N1
+signal IO_N2
+signal IO_N3
+signal IO_N5
+signal IO_N6
+signal IO_N7
+signal IO_N8
+signal IO_N9
+signal IO_N10
+signal IO_N11
+signal IO_N12
+signal IO_N14
+signal IO_N15
+signal IO_N16
+signal IO_P1
+signal IO_P2
+signal IO_P5
+signal IO_P6
+signal IO_P7
+signal IO_P8
+signal IO_P9
+signal IO_P10
+signal IO_P11
+signal IO_P12
+signal IO_P13
+signal IO_P14
+signal IO_P15
+signal IO_P16
+signal IO_R1
+signal IO_R3
+signal IO_R4
+signal IO_R5
+signal IO_R6
+signal IO_R7
+signal IO_R9
+signal IO_R10
+signal IO_R11
+signal IO_R12
+signal IO_R13
+signal IO_R16
+signal IO_T3
+signal IO_T4
+signal IO_T5
+signal IO_T7
+signal IO_T8
+signal IO_T9
+signal IO_T10
+signal IO_T12
+signal IO_T13
+
+register BSR 599
+register BR 1
+register DIR 32
+
+instruction length 6
+
+instruction EXTEST 000000 BSR
+instruction SAMPLE/PRELOAD 000001 BSR
+instruction IDCODE 001001 DIR
+instruction BYPASS 111111 BR
+
+bit 598 I 1 IO_B16
+bit 597 O 1 IO_B16 596 1 Z
+bit 596 C 1 *
+bit 595 I 1 IO_C16
+bit 594 O 1 IO_C16 593 1 Z
+bit 593 C 1 *
+bit 592 I 1 IO_C15
+bit 591 O 1 IO_C15 590 1 Z
+bit 590 C 1 *
+bit 589 I 1 IO_D14
+bit 588 O 1 IO_D14 587 1 Z
+bit 587 C 1 *
+bit 586 I 1 IO_D15
+bit 585 O 1 IO_D15 584 1 Z
+bit 584 C 1 *
+bit 583 I 1 IO_D16
+bit 582 O 1 IO_D16 581 1 Z
+bit 581 C 1 *
+bit 580 I 1 IO_E13
+bit 579 O 1 IO_E13 578 1 Z
+bit 578 C 1 *
+bit 577 I 1 IO_E14
+bit 576 O 1 IO_E14 575 1 Z
+bit 575 C 1 *
+bit 574 I 1 IO_E15
+bit 573 O 1 IO_E15 572 1 Z
+bit 572 C 1 *
+bit 571 I 1 IO_E16
+bit 570 O 1 IO_E16 569 1 Z
+bit 569 C 1 *
+bit 568 I 1 IO_F12
+bit 567 O 1 IO_F12 566 1 Z
+bit 566 C 1 *
+bit 565 I 1 IO_F13
+bit 564 O 1 IO_F13 563 1 Z
+bit 563 C 1 *
+bit 562 I 1 IO_F14
+bit 561 O 1 IO_F14 560 1 Z
+bit 560 C 1 *
+bit 559 I 1 IO_F15
+bit 558 O 1 IO_F15 557 1 Z
+bit 557 C 1 *
+bit 556 I 1 IO_G12
+bit 555 O 1 IO_G12 554 1 Z
+bit 554 C 1 *
+bit 553 I 1 IO_G13
+bit 552 O 1 IO_G13 551 1 Z
+bit 551 C 1 *
+bit 550 I 1 IO_G14
+bit 549 O 1 IO_G14 548 1 Z
+bit 548 C 1 *
+bit 547 I 1 IO_G15
+bit 546 O 1 IO_G15 545 1 Z
+bit 545 C 1 *
+bit 544 O 1 *
+bit 543 O 1 *
+bit 542 O 1 *
+bit 541 I 1 IO_G16
+bit 540 O 1 IO_G16 539 1 Z
+bit 539 C 1 *
+bit 538 I 1 IO_H13
+bit 537 O 1 IO_H13 536 1 Z
+bit 536 C 1 *
+bit 535 I 1 IO_H14
+bit 534 O 1 IO_H14 533 1 Z
+bit 533 C 1 *
+bit 532 I 1 IO_H15
+bit 531 O 1 IO_H15 530 1 Z
+bit 530 C 1 *
+bit 529 I 1 IO_H16
+bit 528 O 1 IO_H16 527 1 Z
+bit 527 C 1 *
+bit 526 I 1 IO_J16
+bit 525 O 1 IO_J16 524 1 Z
+bit 524 C 1 *
+bit 523 I 1 IO_K16
+bit 522 O 1 IO_K16 521 1 Z
+bit 521 C 1 *
+bit 520 I 1 IO_J14
+bit 519 O 1 IO_J14 518 1 Z
+bit 518 C 1 *
+bit 517 I 1 IO_J13
+bit 516 O 1 IO_J13 515 1 Z
+bit 515 C 1 *
+bit 514 I 1 IO_K15
+bit 513 O 1 IO_K15 512 1 Z
+bit 512 C 1 *
+bit 511 O 1 *
+bit 510 O 1 *
+bit 509 O 1 *
+bit 508 I 1 IO_K14
+bit 507 O 1 IO_K14 506 1 Z
+bit 506 C 1 *
+bit 505 I 1 IO_K13
+bit 504 O 1 IO_K13 503 1 Z
+bit 503 C 1 *
+bit 502 I 1 IO_K12
+bit 501 O 1 IO_K12 500 1 Z
+bit 500 C 1 *
+bit 499 I 1 IO_L12
+bit 498 O 1 IO_L12 497 1 Z
+bit 497 C 1 *
+bit 496 I 1 IO_L15
+bit 495 O 1 IO_L15 494 1 Z
+bit 494 C 1 *
+bit 493 I 1 IO_L14
+bit 492 O 1 IO_L14 491 1 Z
+bit 491 C 1 *
+bit 490 I 1 IO_L13
+bit 489 O 1 IO_L13 488 1 Z
+bit 488 C 1 *
+bit 487 I 1 IO_M13
+bit 486 O 1 IO_M13 485 1 Z
+bit 485 C 1 *
+bit 484 I 1 IO_M16
+bit 483 O 1 IO_M16 482 1 Z
+bit 482 C 1 *
+bit 481 I 1 IO_M15
+bit 480 O 1 IO_M15 479 1 Z
+bit 479 C 1 *
+bit 478 I 1 IO_M14
+bit 477 O 1 IO_M14 476 1 Z
+bit 476 C 1 *
+bit 475 I 1 IO_N14
+bit 474 O 1 IO_N14 473 1 Z
+bit 473 C 1 *
+bit 472 I 1 IO_N16
+bit 471 O 1 IO_N16 470 1 Z
+bit 470 C 1 *
+bit 469 I 1 IO_N15
+bit 468 O 1 IO_N15 467 1 Z
+bit 467 C 1 *
+bit 466 I 1 IO_P15
+bit 465 O 1 IO_P15 464 1 Z
+bit 464 C 1 *
+bit 463 I 1 IO_P14
+bit 462 O 1 IO_P14 461 1 Z
+bit 461 C 1 *
+bit 460 I 1 IO_P16
+bit 459 O 1 IO_P16 458 1 Z
+bit 458 C 1 *
+bit 457 I 1 IO_R16
+bit 456 O 1 IO_R16 455 1 Z
+bit 455 C 1 *
+bit 454 I 1 CCLK_T15
+bit 453 O 1 CCLK_T15 452 1 Z
+bit 452 C 1 *
+bit 451 I 1 DONE_R14
+bit 450 O 1 DONE_R14 449 1 Z
+bit 449 C 1 *
+bit 448 I 1 IO_P13
+bit 447 O 1 IO_P13 446 1 Z
+bit 446 C 1 *
+bit 445 I 1 IO_R13
+bit 444 O 1 IO_R13 443 1 Z
+bit 443 C 1 *
+bit 442 I 1 IO_T13
+bit 441 O 1 IO_T13 440 1 Z
+bit 440 C 1 *
+bit 439 I 1 IO_T14
+bit 438 O 1 IO_T14 437 1 Z
+bit 437 C 1 *
+bit 436 O 1 *
+bit 435 O 1 *
+bit 434 O 1 *
+bit 433 I 1 IO_N12
+bit 432 O 1 IO_N12 431 1 Z
+bit 431 C 1 *
+bit 430 O 1 *
+bit 429 O 1 *
+bit 428 O 1 *
+bit 427 O 1 *
+bit 426 O 1 *
+bit 425 O 1 *
+bit 424 I 1 IO_P12
+bit 423 O 1 IO_P12 422 1 Z
+bit 422 C 1 *
+bit 421 I 1 IO_R12
+bit 420 O 1 IO_R12 419 1 Z
+bit 419 C 1 *
+bit 418 I 1 IO_T12
+bit 417 O 1 IO_T12 416 1 Z
+bit 416 C 1 *
+bit 415 I 1 IO_M11
+bit 414 O 1 IO_M11 413 1 Z
+bit 413 C 1 *
+bit 412 I 1 IO_N11
+bit 411 O 1 IO_N11 410 1 Z
+bit 410 C 1 *
+bit 409 I 1 IO_P11
+bit 408 O 1 IO_P11 407 1 Z
+bit 407 C 1 *
+bit 406 I 1 IO_R11
+bit 405 O 1 IO_R11 404 1 Z
+bit 404 C 1 *
+bit 403 O 1 *
+bit 402 O 1 *
+bit 401 O 1 *
+bit 400 I 1 IO_M10
+bit 399 O 1 IO_M10 398 1 Z
+bit 398 C 1 *
+bit 397 I 1 IO_N10
+bit 396 O 1 IO_N10 395 1 Z
+bit 395 C 1 *
+bit 394 I 1 IO_P10
+bit 393 O 1 IO_P10 392 1 Z
+bit 392 C 1 *
+bit 391 I 1 IO_R10
+bit 390 O 1 IO_R10 389 1 Z
+bit 389 C 1 *
+bit 388 I 1 IO_T10
+bit 387 O 1 IO_T10 386 1 Z
+bit 386 C 1 *
+bit 385 I 1 IO_N9
+bit 384 O 1 IO_N9 383 1 Z
+bit 383 C 1 *
+bit 382 I 1 IO_P9
+bit 381 O 1 IO_P9 380 1 Z
+bit 380 C 1 *
+bit 379 I 1 IO_R9
+bit 378 O 1 IO_R9 377 1 Z
+bit 377 C 1 *
+bit 376 I 1 IO_T9
+bit 375 O 1 IO_T9 374 1 Z
+bit 374 C 1 *
+bit 373 I 1 IO_T8
+bit 372 O 1 IO_T8 371 1 Z
+bit 371 C 1 *
+bit 370 I 1 IO_P8
+bit 369 O 1 IO_P8 368 1 Z
+bit 368 C 1 *
+bit 367 I 1 IO_N8
+bit 366 O 1 IO_N8 365 1 Z
+bit 365 C 1 *
+bit 364 I 1 IO_T7
+bit 363 O 1 IO_T7 362 1 Z
+bit 362 C 1 *
+bit 361 I 1 IO_R7
+bit 360 O 1 IO_R7 359 1 Z
+bit 359 C 1 *
+bit 358 I 1 IO_P7
+bit 357 O 1 IO_P7 356 1 Z
+bit 356 C 1 *
+bit 355 I 1 IO_N7
+bit 354 O 1 IO_N7 353 1 Z
+bit 353 C 1 *
+bit 352 I 1 IO_M7
+bit 351 O 1 IO_M7 350 1 Z
+bit 350 C 1 *
+bit 349 I 1 IO_R6
+bit 348 O 1 IO_R6 347 1 Z
+bit 347 C 1 *
+bit 346 I 1 IO_P6
+bit 345 O 1 IO_P6 344 1 Z
+bit 344 C 1 *
+bit 343 I 1 IO_N5
+bit 342 O 1 IO_N5 341 1 Z
+bit 341 C 1 *
+bit 340 I 1 IO_N6
+bit 339 O 1 IO_N6 338 1 Z
+bit 338 C 1 *
+bit 337 I 1 IO_M6
+bit 336 O 1 IO_M6 335 1 Z
+bit 335 C 1 *
+bit 334 I 1 IO_R5
+bit 333 O 1 IO_R5 332 1 Z
+bit 332 C 1 *
+bit 331 I 1 IO_P5
+bit 330 O 1 IO_P5 329 1 Z
+bit 329 C 1 *
+bit 328 I 1 IO_T5
+bit 327 O 1 IO_T5 326 1 Z
+bit 326 C 1 *
+bit 325 O 1 *
+bit 324 O 1 *
+bit 323 O 1 *
+bit 322 O 1 *
+bit 321 O 1 *
+bit 320 O 1 *
+bit 319 O 1 *
+bit 318 O 1 *
+bit 317 O 1 *
+bit 316 O 1 *
+bit 315 O 1 *
+bit 314 O 1 *
+bit 313 O 1 *
+bit 312 O 1 *
+bit 311 O 1 *
+bit 310 I 1 IO_T4
+bit 309 O 1 IO_T4 308 1 Z
+bit 308 C 1 *
+bit 307 I 1 IO_R4
+bit 306 O 1 IO_R4 305 1 Z
+bit 305 C 1 *
+bit 304 I 1 IO_T3
+bit 303 O 1 IO_T3 302 1 Z
+bit 302 C 1 *
+bit 301 I 1 IO_R3
+bit 300 O 1 IO_R3 299 1 Z
+bit 299 C 1 *
+bit 298 I 1 M2_P4
+bit 297 I 1 M0_P3
+bit 296 I 1 M1_T2
+bit 295 I 1 IO_R1
+bit 294 O 1 IO_R1 293 1 Z
+bit 293 C 1 *
+bit 292 I 1 IO_P1
+bit 291 O 1 IO_P1 290 1 Z
+bit 290 C 1 *
+bit 289 I 1 IO_P2
+bit 288 O 1 IO_P2 287 1 Z
+bit 287 C 1 *
+bit 286 I 1 IO_N3
+bit 285 O 1 IO_N3 284 1 Z
+bit 284 C 1 *
+bit 283 I 1 IO_N2
+bit 282 O 1 IO_N2 281 1 Z
+bit 281 C 1 *
+bit 280 I 1 IO_N1
+bit 279 O 1 IO_N1 278 1 Z
+bit 278 C 1 *
+bit 277 I 1 IO_M4
+bit 276 O 1 IO_M4 275 1 Z
+bit 275 C 1 *
+bit 274 I 1 IO_M3
+bit 273 O 1 IO_M3 272 1 Z
+bit 272 C 1 *
+bit 271 I 1 IO_M2
+bit 270 O 1 IO_M2 269 1 Z
+bit 269 C 1 *
+bit 268 I 1 IO_M1
+bit 267 O 1 IO_M1 266 1 Z
+bit 266 C 1 *
+bit 265 I 1 IO_L5
+bit 264 O 1 IO_L5 263 1 Z
+bit 263 C 1 *
+bit 262 I 1 IO_L4
+bit 261 O 1 IO_L4 260 1 Z
+bit 260 C 1 *
+bit 259 I 1 IO_L3
+bit 258 O 1 IO_L3 257 1 Z
+bit 257 C 1 *
+bit 256 I 1 IO_L2
+bit 255 O 1 IO_L2 254 1 Z
+bit 254 C 1 *
+bit 253 I 1 IO_K5
+bit 252 O 1 IO_K5 251 1 Z
+bit 251 C 1 *
+bit 250 I 1 IO_K4
+bit 249 O 1 IO_K4 248 1 Z
+bit 248 C 1 *
+bit 247 I 1 IO_K3
+bit 246 O 1 IO_K3 245 1 Z
+bit 245 C 1 *
+bit 244 I 1 IO_K2
+bit 243 O 1 IO_K2 242 1 Z
+bit 242 C 1 *
+bit 241 O 1 *
+bit 240 O 1 *
+bit 239 O 1 *
+bit 238 I 1 IO_K1
+bit 237 O 1 IO_K1 236 1 Z
+bit 236 C 1 *
+bit 235 I 1 IO_J4
+bit 234 O 1 IO_J4 233 1 Z
+bit 233 C 1 *
+bit 232 I 1 IO_J3
+bit 231 O 1 IO_J3 230 1 Z
+bit 230 C 1 *
+bit 229 I 1 IO_J2
+bit 228 O 1 IO_J2 227 1 Z
+bit 227 C 1 *
+bit 226 I 1 IO_J1
+bit 225 O 1 IO_J1 224 1 Z
+bit 224 C 1 *
+bit 223 I 1 IO_H1
+bit 222 O 1 IO_H1 221 1 Z
+bit 221 C 1 *
+bit 220 I 1 IO_G1
+bit 219 O 1 IO_G1 218 1 Z
+bit 218 C 1 *
+bit 217 I 1 IO_H3
+bit 216 O 1 IO_H3 215 1 Z
+bit 215 C 1 *
+bit 214 I 1 IO_H4
+bit 213 O 1 IO_H4 212 1 Z
+bit 212 C 1 *
+bit 211 I 1 IO_G2
+bit 210 O 1 IO_G2 209 1 Z
+bit 209 C 1 *
+bit 208 O 1 *
+bit 207 O 1 *
+bit 206 O 1 *
+bit 205 I 1 IO_G3
+bit 204 O 1 IO_G3 203 1 Z
+bit 203 C 1 *
+bit 202 I 1 IO_G4
+bit 201 O 1 IO_G4 200 1 Z
+bit 200 C 1 *
+bit 199 I 1 IO_G5
+bit 198 O 1 IO_G5 197 1 Z
+bit 197 C 1 *
+bit 196 I 1 IO_F5
+bit 195 O 1 IO_F5 194 1 Z
+bit 194 C 1 *
+bit 193 I 1 IO_F2
+bit 192 O 1 IO_F2 191 1 Z
+bit 191 C 1 *
+bit 190 I 1 IO_F3
+bit 189 O 1 IO_F3 188 1 Z
+bit 188 C 1 *
+bit 187 I 1 IO_F4
+bit 186 O 1 IO_F4 185 1 Z
+bit 185 C 1 *
+bit 184 I 1 IO_E4
+bit 183 O 1 IO_E4 182 1 Z
+bit 182 C 1 *
+bit 181 I 1 IO_E1
+bit 180 O 1 IO_E1 179 1 Z
+bit 179 C 1 *
+bit 178 I 1 IO_E2
+bit 177 O 1 IO_E2 176 1 Z
+bit 176 C 1 *
+bit 175 I 1 IO_E3
+bit 174 O 1 IO_E3 173 1 Z
+bit 173 C 1 *
+bit 172 I 1 IO_D3
+bit 171 O 1 IO_D3 170 1 Z
+bit 170 C 1 *
+bit 169 I 1 IO_D1
+bit 168 O 1 IO_D1 167 1 Z
+bit 167 C 1 *
+bit 166 I 1 IO_D2
+bit 165 O 1 IO_D2 164 1 Z
+bit 164 C 1 *
+bit 163 I 1 IO_C2
+bit 162 O 1 IO_C2 161 1 Z
+bit 161 C 1 *
+bit 160 I 1 IO_C3
+bit 159 O 1 IO_C3 158 1 Z
+bit 158 C 1 *
+bit 157 I 1 IO_C1
+bit 156 O 1 IO_C1 155 1 Z
+bit 155 C 1 *
+bit 154 I 1 IO_B1
+bit 153 O 1 IO_B1 152 1 Z
+bit 152 C 1 *
+bit 151 O 1 *
+bit 150 I 1 HSWAP_EN_C4
+bit 149 I 1 IO_A3
+bit 148 O 1 IO_A3 147 1 Z
+bit 147 C 1 *
+bit 146 I 1 IO_B4
+bit 145 O 1 IO_B4 144 1 Z
+bit 144 C 1 *
+bit 143 I 1 IO_A4
+bit 142 O 1 IO_A4 141 1 Z
+bit 141 C 1 *
+bit 140 O 1 *
+bit 139 O 1 *
+bit 138 O 1 *
+bit 137 O 1 *
+bit 136 O 1 *
+bit 135 O 1 *
+bit 134 I 1 IO_D5
+bit 133 O 1 IO_D5 132 1 Z
+bit 132 C 1 *
+bit 131 O 1 *
+bit 130 O 1 *
+bit 129 O 1 *
+bit 128 O 1 *
+bit 127 O 1 *
+bit 126 O 1 *
+bit 125 I 1 IO_C5
+bit 124 O 1 IO_C5 123 1 Z
+bit 123 C 1 *
+bit 122 I 1 IO_B5
+bit 121 O 1 IO_B5 120 1 Z
+bit 120 C 1 *
+bit 119 I 1 IO_A5
+bit 118 O 1 IO_A5 117 1 Z
+bit 117 C 1 *
+bit 116 I 1 IO_E6
+bit 115 O 1 IO_E6 114 1 Z
+bit 114 C 1 *
+bit 113 I 1 IO_D6
+bit 112 O 1 IO_D6 111 1 Z
+bit 111 C 1 *
+bit 110 I 1 IO_C6
+bit 109 O 1 IO_C6 108 1 Z
+bit 108 C 1 *
+bit 107 I 1 IO_B6
+bit 106 O 1 IO_B6 105 1 Z
+bit 105 C 1 *
+bit 104 O 1 *
+bit 103 O 1 *
+bit 102 O 1 *
+bit 101 I 1 IO_E7
+bit 100 O 1 IO_E7 99 1 Z
+bit 99 C 1 *
+bit 98 I 1 IO_D7
+bit 97 O 1 IO_D7 96 1 Z
+bit 96 C 1 *
+bit 95 I 1 IO_C7
+bit 94 O 1 IO_C7 93 1 Z
+bit 93 C 1 *
+bit 92 I 1 IO_B7
+bit 91 O 1 IO_B7 90 1 Z
+bit 90 C 1 *
+bit 89 I 1 IO_A7
+bit 88 O 1 IO_A7 87 1 Z
+bit 87 C 1 *
+bit 86 I 1 IO_D8
+bit 85 O 1 IO_D8 84 1 Z
+bit 84 C 1 *
+bit 83 I 1 IO_C8
+bit 82 O 1 IO_C8 81 1 Z
+bit 81 C 1 *
+bit 80 I 1 IO_B8
+bit 79 O 1 IO_B8 78 1 Z
+bit 78 C 1 *
+bit 77 I 1 IO_A8
+bit 76 O 1 IO_A8 75 1 Z
+bit 75 C 1 *
+bit 74 I 1 IO_A9
+bit 73 O 1 IO_A9 72 1 Z
+bit 72 C 1 *
+bit 71 I 1 IO_C9
+bit 70 O 1 IO_C9 69 1 Z
+bit 69 C 1 *
+bit 68 I 1 IO_D9
+bit 67 O 1 IO_D9 66 1 Z
+bit 66 C 1 *
+bit 65 I 1 IO_A10
+bit 64 O 1 IO_A10 63 1 Z
+bit 63 C 1 *
+bit 62 I 1 IO_B10
+bit 61 O 1 IO_B10 60 1 Z
+bit 60 C 1 *
+bit 59 I 1 IO_C10
+bit 58 O 1 IO_C10 57 1 Z
+bit 57 C 1 *
+bit 56 I 1 IO_D10
+bit 55 O 1 IO_D10 54 1 Z
+bit 54 C 1 *
+bit 53 I 1 IO_E10
+bit 52 O 1 IO_E10 51 1 Z
+bit 51 C 1 *
+bit 50 I 1 IO_B11
+bit 49 O 1 IO_B11 48 1 Z
+bit 48 C 1 *
+bit 47 I 1 IO_C11
+bit 46 O 1 IO_C11 45 1 Z
+bit 45 C 1 *
+bit 44 I 1 IO_D12
+bit 43 O 1 IO_D12 42 1 Z
+bit 42 C 1 *
+bit 41 I 1 IO_D11
+bit 40 O 1 IO_D11 39 1 Z
+bit 39 C 1 *
+bit 38 I 1 IO_E11
+bit 37 O 1 IO_E11 36 1 Z
+bit 36 C 1 *
+bit 35 I 1 IO_B12
+bit 34 O 1 IO_B12 33 1 Z
+bit 33 C 1 *
+bit 32 I 1 IO_C12
+bit 31 O 1 IO_C12 30 1 Z
+bit 30 C 1 *
+bit 29 I 1 IO_A12
+bit 28 O 1 IO_A12 27 1 Z
+bit 27 C 1 *
+bit 26 O 1 *
+bit 25 O 1 *
+bit 24 O 1 *
+bit 23 O 1 *
+bit 22 O 1 *
+bit 21 O 1 *
+bit 20 O 1 *
+bit 19 O 1 *
+bit 18 O 1 *
+bit 17 O 1 *
+bit 16 O 1 *
+bit 15 O 1 *
+bit 14 O 1 *
+bit 13 O 1 *
+bit 12 O 1 *
+bit 11 I 1 IO_A13
+bit 10 O 1 IO_A13 9 1 Z
+bit 9 C 1 *
+bit 8 I 1 IO_B13
+bit 7 O 1 IO_B13 6 1 Z
+bit 6 C 1 *
+bit 5 I 1 IO_A14
+bit 4 O 1 IO_A14 3 1 Z
+bit 3 C 1 *
+bit 2 I 1 IO_B14
+bit 1 O 1 IO_B14 0 1 Z
+bit 0 C 1 *
--- /dev/null
+signal GND1
+signal GND2
+signal GND3
+signal GND4
+signal GND5
+signal GND6
+signal GND7
+signal GND8
+signal GND9
+signal GND10
+signal GND11
+signal GND12
+signal GND13
+signal GND14
+signal GND15
+signal GND16
+signal GND17
+signal GND18
+signal GND19
+signal GND20
+signal GND21
+signal GND22
+signal GND23
+signal GND24
+signal GND25
+signal GND26
+signal GND27
+signal GND28
+signal CCLK_P104
+signal DONE_P103
+signal HSWAP_EN_P206
+signal M0_P55
+signal M1_P54
+signal M2_P56
+signal PROG_B
+signal TCK
+signal TDI
+signal TDO
+signal TMS
+signal VCCAUX1
+signal VCCAUX2
+signal VCCAUX3
+signal VCCAUX4
+signal VCCAUX5
+signal VCCAUX6
+signal VCCAUX7
+signal VCCAUX8
+signal VCCINT1
+signal VCCINT2
+signal VCCINT3
+signal VCCINT4
+signal VCCO01
+signal VCCO02
+signal VCCO11
+signal VCCO12
+signal VCCO21
+signal VCCO22
+signal VCCO31
+signal VCCO32
+signal VCCO41
+signal VCCO42
+signal VCCO51
+signal VCCO52
+signal VCCO61
+signal VCCO62
+signal VCCO71
+signal VCCO72
+signal IO_P2
+signal IO_P3
+signal IO_P4
+signal IO_P5
+signal IO_P7
+signal IO_P9
+signal IO_P10
+signal IO_P11
+signal IO_P12
+signal IO_P13
+signal IO_P15
+signal IO_P16
+signal IO_P18
+signal IO_P19
+signal IO_P20
+signal IO_P21
+signal IO_P22
+signal IO_P24
+signal IO_P26
+signal IO_P27
+signal IO_P28
+signal IO_P29
+signal IO_P31
+signal IO_P33
+signal IO_P34
+signal IO_P35
+signal IO_P36
+signal IO_P37
+signal IO_P39
+signal IO_P40
+signal IO_P42
+signal IO_P43
+signal IO_P44
+signal IO_P45
+signal IO_P46
+signal IO_P48
+signal IO_P50
+signal IO_P51
+signal IO_P52
+signal IO_P57
+signal IO_P58
+signal IO_P61
+signal IO_P62
+signal IO_P63
+signal IO_P64
+signal IO_P65
+signal IO_P67
+signal IO_P68
+signal IO_P71
+signal IO_P72
+signal IO_P74
+signal IO_P76
+signal IO_P77
+signal IO_P78
+signal IO_P79
+signal IO_P80
+signal IO_P81
+signal IO_P83
+signal IO_P85
+signal IO_P86
+signal IO_P87
+signal IO_P90
+signal IO_P92
+signal IO_P93
+signal IO_P94
+signal IO_P95
+signal IO_P96
+signal IO_P97
+signal IO_P100
+signal IO_P101
+signal IO_P102
+signal IO_P106
+signal IO_P107
+signal IO_P108
+signal IO_P109
+signal IO_P111
+signal IO_P113
+signal IO_P114
+signal IO_P115
+signal IO_P116
+signal IO_P117
+signal IO_P119
+signal IO_P120
+signal IO_P122
+signal IO_P123
+signal IO_P124
+signal IO_P125
+signal IO_P126
+signal IO_P128
+signal IO_P130
+signal IO_P131
+signal IO_P132
+signal IO_P133
+signal IO_P135
+signal IO_P137
+signal IO_P138
+signal IO_P139
+signal IO_P140
+signal IO_P141
+signal IO_P143
+signal IO_P144
+signal IO_P146
+signal IO_P147
+signal IO_P148
+signal IO_P149
+signal IO_P150
+signal IO_P152
+signal IO_P154
+signal IO_P155
+signal IO_P156
+signal IO_P161
+signal IO_P162
+signal IO_P165
+signal IO_P166
+signal IO_P167
+signal IO_P168
+signal IO_P169
+signal IO_P171
+signal IO_P172
+signal IO_P175
+signal IO_P176
+signal IO_P178
+signal IO_P180
+signal IO_P181
+signal IO_P182
+signal IO_P183
+signal IO_P184
+signal IO_P185
+signal IO_P187
+signal IO_P189
+signal IO_P190
+signal IO_P191
+signal IO_P194
+signal IO_P196
+signal IO_P197
+signal IO_P198
+signal IO_P199
+signal IO_P200
+signal IO_P203
+signal IO_P204
+
+register BSR 599
+register BR 1
+register DIR 32
+
+instruction length 6
+
+instruction EXTEST 000000 BSR
+instruction SAMPLE/PRELOAD 000001 BSR
+instruction IDCODE 001001 DIR
+instruction BYPASS 111111 BR
+
+bit 598 I 1 IO_P156
+bit 597 O 1 IO_P156 596 1 Z
+bit 596 C 1 *
+bit 595 I 1 IO_P155
+bit 594 O 1 IO_P155 593 1 Z
+bit 593 C 1 *
+bit 592 O 1 *
+bit 591 O 1 *
+bit 590 O 1 *
+bit 589 O 1 *
+bit 588 O 1 *
+bit 587 O 1 *
+bit 586 O 1 *
+bit 585 O 1 *
+bit 584 O 1 *
+bit 583 I 1 IO_P154
+bit 582 O 1 IO_P154 581 1 Z
+bit 581 C 1 *
+bit 580 I 1 IO_P152
+bit 579 O 1 IO_P152 578 1 Z
+bit 578 C 1 *
+bit 577 I 1 IO_P150
+bit 576 O 1 IO_P150 575 1 Z
+bit 575 C 1 *
+bit 574 I 1 IO_P149
+bit 573 O 1 IO_P149 572 1 Z
+bit 572 C 1 *
+bit 571 I 1 IO_P148
+bit 570 O 1 IO_P148 569 1 Z
+bit 569 C 1 *
+bit 568 I 1 IO_P147
+bit 567 O 1 IO_P147 566 1 Z
+bit 566 C 1 *
+bit 565 I 1 IO_P146
+bit 564 O 1 IO_P146 563 1 Z
+bit 563 C 1 *
+bit 562 I 1 IO_P144
+bit 561 O 1 IO_P144 560 1 Z
+bit 560 C 1 *
+bit 559 I 1 IO_P143
+bit 558 O 1 IO_P143 557 1 Z
+bit 557 C 1 *
+bit 556 I 1 IO_P141
+bit 555 O 1 IO_P141 554 1 Z
+bit 554 C 1 *
+bit 553 I 1 IO_P140
+bit 552 O 1 IO_P140 551 1 Z
+bit 551 C 1 *
+bit 550 I 1 IO_P139
+bit 549 O 1 IO_P139 548 1 Z
+bit 548 C 1 *
+bit 547 I 1 IO_P138
+bit 546 O 1 IO_P138 545 1 Z
+bit 545 C 1 *
+bit 544 O 1 *
+bit 543 O 1 *
+bit 542 O 1 *
+bit 541 O 1 *
+bit 540 O 1 *
+bit 539 O 1 *
+bit 538 I 1 IO_P137
+bit 537 O 1 IO_P137 536 1 Z
+bit 536 C 1 *
+bit 535 I 1 IO_P135
+bit 534 O 1 IO_P135 533 1 Z
+bit 533 C 1 *
+bit 532 I 1 IO_P133
+bit 531 O 1 IO_P133 530 1 Z
+bit 530 C 1 *
+bit 529 I 1 IO_P132
+bit 528 O 1 IO_P132 527 1 Z
+bit 527 C 1 *
+bit 526 I 1 IO_P131
+bit 525 O 1 IO_P131 524 1 Z
+bit 524 C 1 *
+bit 523 I 1 IO_P130
+bit 522 O 1 IO_P130 521 1 Z
+bit 521 C 1 *
+bit 520 I 1 IO_P128
+bit 519 O 1 IO_P128 518 1 Z
+bit 518 C 1 *
+bit 517 I 1 IO_P126
+bit 516 O 1 IO_P126 515 1 Z
+bit 515 C 1 *
+bit 514 O 1 *
+bit 513 O 1 *
+bit 512 O 1 *
+bit 511 O 1 *
+bit 510 O 1 *
+bit 509 O 1 *
+bit 508 I 1 IO_P125
+bit 507 O 1 IO_P125 506 1 Z
+bit 506 C 1 *
+bit 505 I 1 IO_P124
+bit 504 O 1 IO_P124 503 1 Z
+bit 503 C 1 *
+bit 502 I 1 IO_P123
+bit 501 O 1 IO_P123 500 1 Z
+bit 500 C 1 *
+bit 499 I 1 IO_P122
+bit 498 O 1 IO_P122 497 1 Z
+bit 497 C 1 *
+bit 496 I 1 IO_P120
+bit 495 O 1 IO_P120 494 1 Z
+bit 494 C 1 *
+bit 493 I 1 IO_P119
+bit 492 O 1 IO_P119 491 1 Z
+bit 491 C 1 *
+bit 490 I 1 IO_P117
+bit 489 O 1 IO_P117 488 1 Z
+bit 488 C 1 *
+bit 487 I 1 IO_P116
+bit 486 O 1 IO_P116 485 1 Z
+bit 485 C 1 *
+bit 484 I 1 IO_P115
+bit 483 O 1 IO_P115 482 1 Z
+bit 482 C 1 *
+bit 481 I 1 IO_P114
+bit 480 O 1 IO_P114 479 1 Z
+bit 479 C 1 *
+bit 478 I 1 IO_P113
+bit 477 O 1 IO_P113 476 1 Z
+bit 476 C 1 *
+bit 475 I 1 IO_P111
+bit 474 O 1 IO_P111 473 1 Z
+bit 473 C 1 *
+bit 472 I 1 IO_P109
+bit 471 O 1 IO_P109 470 1 Z
+bit 470 C 1 *
+bit 469 I 1 IO_P108
+bit 468 O 1 IO_P108 467 1 Z
+bit 467 C 1 *
+bit 466 O 1 *
+bit 465 O 1 *
+bit 464 O 1 *
+bit 463 O 1 *
+bit 462 O 1 *
+bit 461 O 1 *
+bit 460 I 1 IO_P107
+bit 459 O 1 IO_P107 458 1 Z
+bit 458 C 1 *
+bit 457 I 1 IO_P106
+bit 456 O 1 IO_P106 455 1 Z
+bit 455 C 1 *
+bit 454 I 1 CCLK_P104
+bit 453 O 1 CCLK_P104 452 1 Z
+bit 452 C 1 *
+bit 451 I 1 DONE_P103
+bit 450 O 1 DONE_P103 449 1 Z
+bit 449 C 1 *
+bit 448 I 1 IO_P102
+bit 447 O 1 IO_P102 446 1 Z
+bit 446 C 1 *
+bit 445 I 1 IO_P101
+bit 444 O 1 IO_P101 443 1 Z
+bit 443 C 1 *
+bit 442 I 1 IO_P100
+bit 441 O 1 IO_P100 440 1 Z
+bit 440 C 1 *
+bit 439 I 1 IO_P97
+bit 438 O 1 IO_P97 437 1 Z
+bit 437 C 1 *
+bit 436 O 1 *
+bit 435 O 1 *
+bit 434 O 1 *
+bit 433 I 1 IO_P96
+bit 432 O 1 IO_P96 431 1 Z
+bit 431 C 1 *
+bit 430 O 1 *
+bit 429 O 1 *
+bit 428 O 1 *
+bit 427 O 1 *
+bit 426 O 1 *
+bit 425 O 1 *
+bit 424 I 1 IO_P95
+bit 423 O 1 IO_P95 422 1 Z
+bit 422 C 1 *
+bit 421 I 1 IO_P94
+bit 420 O 1 IO_P94 419 1 Z
+bit 419 C 1 *
+bit 418 I 1 IO_P93
+bit 417 O 1 IO_P93 416 1 Z
+bit 416 C 1 *
+bit 415 I 1 IO_P92
+bit 414 O 1 IO_P92 413 1 Z
+bit 413 C 1 *
+bit 412 I 1 IO_P90
+bit 411 O 1 IO_P90 410 1 Z
+bit 410 C 1 *
+bit 409 O 1 *
+bit 408 O 1 *
+bit 407 O 1 *
+bit 406 O 1 *
+bit 405 O 1 *
+bit 404 O 1 *
+bit 403 O 1 *
+bit 402 O 1 *
+bit 401 O 1 *
+bit 400 O 1 *
+bit 399 O 1 *
+bit 398 O 1 *
+bit 397 O 1 *
+bit 396 O 1 *
+bit 395 O 1 *
+bit 394 I 1 IO_P87
+bit 393 O 1 IO_P87 392 1 Z
+bit 392 C 1 *
+bit 391 I 1 IO_P86
+bit 390 O 1 IO_P86 389 1 Z
+bit 389 C 1 *
+bit 388 I 1 IO_P85
+bit 387 O 1 IO_P85 386 1 Z
+bit 386 C 1 *
+bit 385 I 1 IO_P83
+bit 384 O 1 IO_P83 383 1 Z
+bit 383 C 1 *
+bit 382 I 1 IO_P81
+bit 381 O 1 IO_P81 380 1 Z
+bit 380 C 1 *
+bit 379 I 1 IO_P80
+bit 378 O 1 IO_P80 377 1 Z
+bit 377 C 1 *
+bit 376 I 1 IO_P79
+bit 375 O 1 IO_P79 374 1 Z
+bit 374 C 1 *
+bit 373 I 1 IO_P78
+bit 372 O 1 IO_P78 371 1 Z
+bit 371 C 1 *
+bit 370 I 1 IO_P77
+bit 369 O 1 IO_P77 368 1 Z
+bit 368 C 1 *
+bit 367 I 1 IO_P76
+bit 366 O 1 IO_P76 365 1 Z
+bit 365 C 1 *
+bit 364 I 1 IO_P74
+bit 363 O 1 IO_P74 362 1 Z
+bit 362 C 1 *
+bit 361 I 1 IO_P72
+bit 360 O 1 IO_P72 359 1 Z
+bit 359 C 1 *
+bit 358 I 1 IO_P71
+bit 357 O 1 IO_P71 356 1 Z
+bit 356 C 1 *
+bit 355 O 1 *
+bit 354 O 1 *
+bit 353 O 1 *
+bit 352 O 1 *
+bit 351 O 1 *
+bit 350 O 1 *
+bit 349 O 1 *
+bit 348 O 1 *
+bit 347 O 1 *
+bit 346 O 1 *
+bit 345 O 1 *
+bit 344 O 1 *
+bit 343 O 1 *
+bit 342 O 1 *
+bit 341 O 1 *
+bit 340 I 1 IO_P68
+bit 339 O 1 IO_P68 338 1 Z
+bit 338 C 1 *
+bit 337 I 1 IO_P67
+bit 336 O 1 IO_P67 335 1 Z
+bit 335 C 1 *
+bit 334 I 1 IO_P65
+bit 333 O 1 IO_P65 332 1 Z
+bit 332 C 1 *
+bit 331 I 1 IO_P64
+bit 330 O 1 IO_P64 329 1 Z
+bit 329 C 1 *
+bit 328 I 1 IO_P63
+bit 327 O 1 IO_P63 326 1 Z
+bit 326 C 1 *
+bit 325 O 1 *
+bit 324 O 1 *
+bit 323 O 1 *
+bit 322 O 1 *
+bit 321 O 1 *
+bit 320 O 1 *
+bit 319 O 1 *
+bit 318 O 1 *
+bit 317 O 1 *
+bit 316 O 1 *
+bit 315 O 1 *
+bit 314 O 1 *
+bit 313 O 1 *
+bit 312 O 1 *
+bit 311 O 1 *
+bit 310 I 1 IO_P62
+bit 309 O 1 IO_P62 308 1 Z
+bit 308 C 1 *
+bit 307 I 1 IO_P61
+bit 306 O 1 IO_P61 305 1 Z
+bit 305 C 1 *
+bit 304 I 1 IO_P58
+bit 303 O 1 IO_P58 302 1 Z
+bit 302 C 1 *
+bit 301 I 1 IO_P57
+bit 300 O 1 IO_P57 299 1 Z
+bit 299 C 1 *
+bit 298 I 1 M2_P56
+bit 297 I 1 M0_P55
+bit 296 I 1 M1_P54
+bit 295 I 1 IO_P52
+bit 294 O 1 IO_P52 293 1 Z
+bit 293 C 1 *
+bit 292 I 1 IO_P51
+bit 291 O 1 IO_P51 290 1 Z
+bit 290 C 1 *
+bit 289 O 1 *
+bit 288 O 1 *
+bit 287 O 1 *
+bit 286 O 1 *
+bit 285 O 1 *
+bit 284 O 1 *
+bit 283 O 1 *
+bit 282 O 1 *
+bit 281 O 1 *
+bit 280 I 1 IO_P50
+bit 279 O 1 IO_P50 278 1 Z
+bit 278 C 1 *
+bit 277 I 1 IO_P48
+bit 276 O 1 IO_P48 275 1 Z
+bit 275 C 1 *
+bit 274 I 1 IO_P46
+bit 273 O 1 IO_P46 272 1 Z
+bit 272 C 1 *
+bit 271 I 1 IO_P45
+bit 270 O 1 IO_P45 269 1 Z
+bit 269 C 1 *
+bit 268 I 1 IO_P44
+bit 267 O 1 IO_P44 266 1 Z
+bit 266 C 1 *
+bit 265 I 1 IO_P43
+bit 264 O 1 IO_P43 263 1 Z
+bit 263 C 1 *
+bit 262 I 1 IO_P42
+bit 261 O 1 IO_P42 260 1 Z
+bit 260 C 1 *
+bit 259 I 1 IO_P40
+bit 258 O 1 IO_P40 257 1 Z
+bit 257 C 1 *
+bit 256 I 1 IO_P39
+bit 255 O 1 IO_P39 254 1 Z
+bit 254 C 1 *
+bit 253 I 1 IO_P37
+bit 252 O 1 IO_P37 251 1 Z
+bit 251 C 1 *
+bit 250 I 1 IO_P36
+bit 249 O 1 IO_P36 248 1 Z
+bit 248 C 1 *
+bit 247 I 1 IO_P35
+bit 246 O 1 IO_P35 245 1 Z
+bit 245 C 1 *
+bit 244 I 1 IO_P34
+bit 243 O 1 IO_P34 242 1 Z
+bit 242 C 1 *
+bit 241 O 1 *
+bit 240 O 1 *
+bit 239 O 1 *
+bit 238 O 1 *
+bit 237 O 1 *
+bit 236 O 1 *
+bit 235 I 1 IO_P33
+bit 234 O 1 IO_P33 233 1 Z
+bit 233 C 1 *
+bit 232 I 1 IO_P31
+bit 231 O 1 IO_P31 230 1 Z
+bit 230 C 1 *
+bit 229 I 1 IO_P29
+bit 228 O 1 IO_P29 227 1 Z
+bit 227 C 1 *
+bit 226 I 1 IO_P28
+bit 225 O 1 IO_P28 224 1 Z
+bit 224 C 1 *
+bit 223 I 1 IO_P27
+bit 222 O 1 IO_P27 221 1 Z
+bit 221 C 1 *
+bit 220 I 1 IO_P26
+bit 219 O 1 IO_P26 218 1 Z
+bit 218 C 1 *
+bit 217 I 1 IO_P24
+bit 216 O 1 IO_P24 215 1 Z
+bit 215 C 1 *
+bit 214 I 1 IO_P22
+bit 213 O 1 IO_P22 212 1 Z
+bit 212 C 1 *
+bit 211 O 1 *
+bit 210 O 1 *
+bit 209 O 1 *
+bit 208 O 1 *
+bit 207 O 1 *
+bit 206 O 1 *
+bit 205 I 1 IO_P21
+bit 204 O 1 IO_P21 203 1 Z
+bit 203 C 1 *
+bit 202 I 1 IO_P20
+bit 201 O 1 IO_P20 200 1 Z
+bit 200 C 1 *
+bit 199 I 1 IO_P19
+bit 198 O 1 IO_P19 197 1 Z
+bit 197 C 1 *
+bit 196 I 1 IO_P18
+bit 195 O 1 IO_P18 194 1 Z
+bit 194 C 1 *
+bit 193 I 1 IO_P16
+bit 192 O 1 IO_P16 191 1 Z
+bit 191 C 1 *
+bit 190 I 1 IO_P15
+bit 189 O 1 IO_P15 188 1 Z
+bit 188 C 1 *
+bit 187 I 1 IO_P13
+bit 186 O 1 IO_P13 185 1 Z
+bit 185 C 1 *
+bit 184 I 1 IO_P12
+bit 183 O 1 IO_P12 182 1 Z
+bit 182 C 1 *
+bit 181 I 1 IO_P11
+bit 180 O 1 IO_P11 179 1 Z
+bit 179 C 1 *
+bit 178 I 1 IO_P10
+bit 177 O 1 IO_P10 176 1 Z
+bit 176 C 1 *
+bit 175 I 1 IO_P9
+bit 174 O 1 IO_P9 173 1 Z
+bit 173 C 1 *
+bit 172 I 1 IO_P7
+bit 171 O 1 IO_P7 170 1 Z
+bit 170 C 1 *
+bit 169 O 1 *
+bit 168 O 1 *
+bit 167 O 1 *
+bit 166 O 1 *
+bit 165 O 1 *
+bit 164 O 1 *
+bit 163 I 1 IO_P5
+bit 162 O 1 IO_P5 161 1 Z
+bit 161 C 1 *
+bit 160 I 1 IO_P4
+bit 159 O 1 IO_P4 158 1 Z
+bit 158 C 1 *
+bit 157 I 1 IO_P3
+bit 156 O 1 IO_P3 155 1 Z
+bit 155 C 1 *
+bit 154 I 1 IO_P2
+bit 153 O 1 IO_P2 152 1 Z
+bit 152 C 1 *
+bit 151 O 1 *
+bit 150 I 1 HSWAP_EN_P206
+bit 149 I 1 IO_P205
+bit 148 O 1 IO_P205 147 1 Z
+bit 147 C 1 *
+bit 146 I 1 IO_P204
+bit 145 O 1 IO_P204 144 1 Z
+bit 144 C 1 *
+bit 143 I 1 IO_P203
+bit 142 O 1 IO_P203 141 1 Z
+bit 141 C 1 *
+bit 140 O 1 *
+bit 139 O 1 *
+bit 138 O 1 *
+bit 137 O 1 *
+bit 136 O 1 *
+bit 135 O 1 *
+bit 134 I 1 IO_P200
+bit 133 O 1 IO_P200 132 1 Z
+bit 132 C 1 *
+bit 131 O 1 *
+bit 130 O 1 *
+bit 129 O 1 *
+bit 128 O 1 *
+bit 127 O 1 *
+bit 126 O 1 *
+bit 125 I 1 IO_P199
+bit 124 O 1 IO_P199 123 1 Z
+bit 123 C 1 *
+bit 122 I 1 IO_P198
+bit 121 O 1 IO_P198 120 1 Z
+bit 120 C 1 *
+bit 119 I 1 IO_P197
+bit 118 O 1 IO_P197 117 1 Z
+bit 117 C 1 *
+bit 116 I 1 IO_P196
+bit 115 O 1 IO_P196 114 1 Z
+bit 114 C 1 *
+bit 113 I 1 IO_P194
+bit 112 O 1 IO_P194 111 1 Z
+bit 111 C 1 *
+bit 110 O 1 *
+bit 109 O 1 *
+bit 108 O 1 *
+bit 107 O 1 *
+bit 106 O 1 *
+bit 105 O 1 *
+bit 104 O 1 *
+bit 103 O 1 *
+bit 102 O 1 *
+bit 101 O 1 *
+bit 100 O 1 *
+bit 99 O 1 *
+bit 98 O 1 *
+bit 97 O 1 *
+bit 96 O 1 *
+bit 95 I 1 IO_P191
+bit 94 O 1 IO_P191 93 1 Z
+bit 93 C 1 *
+bit 92 I 1 IO_P190
+bit 91 O 1 IO_P190 90 1 Z
+bit 90 C 1 *
+bit 89 I 1 IO_P189
+bit 88 O 1 IO_P189 87 1 Z
+bit 87 C 1 *
+bit 86 I 1 IO_P187
+bit 85 O 1 IO_P187 84 1 Z
+bit 84 C 1 *
+bit 83 I 1 IO_P185
+bit 82 O 1 IO_P185 81 1 Z
+bit 81 C 1 *
+bit 80 I 1 IO_P184
+bit 79 O 1 IO_P184 78 1 Z
+bit 78 C 1 *
+bit 77 I 1 IO_P183
+bit 76 O 1 IO_P183 75 1 Z
+bit 75 C 1 *
+bit 74 I 1 IO_P182
+bit 73 O 1 IO_P182 72 1 Z
+bit 72 C 1 *
+bit 71 I 1 IO_P181
+bit 70 O 1 IO_P181 69 1 Z
+bit 69 C 1 *
+bit 68 I 1 IO_P180
+bit 67 O 1 IO_P180 66 1 Z
+bit 66 C 1 *
+bit 65 I 1 IO_P178
+bit 64 O 1 IO_P178 63 1 Z
+bit 63 C 1 *
+bit 62 I 1 IO_P176
+bit 61 O 1 IO_P176 60 1 Z
+bit 60 C 1 *
+bit 59 I 1 IO_P175
+bit 58 O 1 IO_P175 57 1 Z
+bit 57 C 1 *
+bit 56 O 1 *
+bit 55 O 1 *
+bit 54 O 1 *
+bit 53 O 1 *
+bit 52 O 1 *
+bit 51 O 1 *
+bit 50 O 1 *
+bit 49 O 1 *
+bit 48 O 1 *
+bit 47 O 1 *
+bit 46 O 1 *
+bit 45 O 1 *
+bit 44 O 1 *
+bit 43 O 1 *
+bit 42 O 1 *
+bit 41 I 1 IO_P172
+bit 40 O 1 IO_P172 39 1 Z
+bit 39 C 1 *
+bit 38 I 1 IO_P171
+bit 37 O 1 IO_P171 36 1 Z
+bit 36 C 1 *
+bit 35 I 1 IO_P169
+bit 34 O 1 IO_P169 33 1 Z
+bit 33 C 1 *
+bit 32 I 1 IO_P168
+bit 31 O 1 IO_P168 30 1 Z
+bit 30 C 1 *
+bit 29 I 1 IO_P167
+bit 28 O 1 IO_P167 27 1 Z
+bit 27 C 1 *
+bit 26 O 1 *
+bit 25 O 1 *
+bit 24 O 1 *
+bit 23 O 1 *
+bit 22 O 1 *
+bit 21 O 1 *
+bit 20 O 1 *
+bit 19 O 1 *
+bit 18 O 1 *
+bit 17 O 1 *
+bit 16 O 1 *
+bit 15 O 1 *
+bit 14 O 1 *
+bit 13 O 1 *
+bit 12 O 1 *
+bit 11 I 1 IO_P166
+bit 10 O 1 IO_P166 9 1 Z
+bit 9 C 1 *
+bit 8 I 1 IO_P165
+bit 7 O 1 IO_P165 6 1 Z
+bit 6 C 1 *
+bit 5 I 1 IO_P162
+bit 4 O 1 IO_P162 3 1 Z
+bit 3 C 1 *
+bit 2 I 1 IO_P161
+bit 1 O 1 IO_P161 0 1 Z
+bit 0 C 1 *
--- /dev/null
+signal GND1
+signal GND2
+signal GND3
+signal GND4
+signal GND5
+signal GND6
+signal GND7
+signal GND8
+signal GND9
+signal GND10
+signal GND11
+signal GND12
+signal GND13
+signal GND14
+signal GND15
+signal GND16
+signal CCLK_P72
+signal DONE_P71
+signal HSWAP_EN_P142
+signal M0_P38
+signal M1_P37
+signal M2_P39
+signal PROG_B
+signal TCK
+signal TDI
+signal TDO
+signal TMS
+signal VCCAUX1
+signal VCCAUX2
+signal VCCAUX3
+signal VCCAUX4
+signal VCCINT1
+signal VCCINT2
+signal VCCINT3
+signal VCCINT4
+signal VCCO011
+signal VCCO012
+signal VCCO013
+signal VCCO231
+signal VCCO232
+signal VCCO233
+signal VCCO451
+signal VCCO452
+signal VCCO453
+signal VCCO671
+signal VCCO672
+signal VCCO673
+signal IO_P1
+signal IO_P2
+signal IO_P4
+signal IO_P5
+signal IO_P6
+signal IO_P7
+signal IO_P8
+signal IO_P10
+signal IO_P11
+signal IO_P12
+signal IO_P13
+signal IO_P14
+signal IO_P15
+signal IO_P17
+signal IO_P18
+signal IO_P20
+signal IO_P21
+signal IO_P23
+signal IO_P24
+signal IO_P25
+signal IO_P26
+signal IO_P27
+signal IO_P28
+signal IO_P30
+signal IO_P31
+signal IO_P32
+signal IO_P33
+signal IO_P35
+signal IO_P36
+signal IO_P40
+signal IO_P41
+signal IO_P44
+signal IO_P46
+signal IO_P47
+signal IO_P50
+signal IO_P51
+signal IO_P52
+signal IO_P53
+signal IO_P55
+signal IO_P56
+signal IO_P57
+signal IO_P58
+signal IO_P59
+signal IO_P60
+signal IO_P63
+signal IO_P65
+signal IO_P68
+signal IO_P69
+signal IO_P70
+signal IO_P73
+signal IO_P74
+signal IO_P76
+signal IO_P77
+signal IO_P78
+signal IO_P79
+signal IO_P80
+signal IO_P82
+signal IO_P83
+signal IO_P84
+signal IO_P85
+signal IO_P86
+signal IO_P87
+signal IO_P89
+signal IO_P90
+signal IO_P92
+signal IO_P93
+signal IO_P95
+signal IO_P96
+signal IO_P97
+signal IO_P98
+signal IO_P99
+signal IO_P100
+signal IO_P102
+signal IO_P103
+signal IO_P104
+signal IO_P105
+signal IO_P107
+signal IO_P108
+signal IO_P112
+signal IO_P113
+signal IO_P116
+signal IO_P118
+signal IO_P119
+signal IO_P122
+signal IO_P123
+signal IO_P124
+signal IO_P125
+signal IO_P127
+signal IO_P128
+signal IO_P129
+signal IO_P130
+signal IO_P131
+signal IO_P132
+signal IO_P135
+signal IO_P137
+signal IO_P140
+
+register BSR 599
+register BR 1
+register DIR 32
+
+instruction length 6
+
+instruction EXTEST 000000 BSR
+instruction SAMPLE/PRELOAD 000001 BSR
+instruction IDCODE 001001 DIR
+instruction BYPASS 111111 BR
+
+bit 598 I 1 IO_P108
+bit 597 O 1 IO_P108 596 1 Z
+bit 596 C 1 *
+bit 595 I 1 IO_P107
+bit 594 O 1 IO_P107 593 1 Z
+bit 593 C 1 *
+bit 592 O 1 *
+bit 591 O 1 *
+bit 590 O 1 *
+bit 589 O 1 *
+bit 588 O 1 *
+bit 587 O 1 *
+bit 586 O 1 *
+bit 585 O 1 *
+bit 584 O 1 *
+bit 583 O 1 *
+bit 582 O 1 *
+bit 581 O 1 *
+bit 580 O 1 *
+bit 579 O 1 *
+bit 578 O 1 *
+bit 577 O 1 *
+bit 576 O 1 *
+bit 575 O 1 *
+bit 574 I 1 IO_P105
+bit 573 O 1 IO_P105 572 1 Z
+bit 572 C 1 *
+bit 571 I 1 IO_P104
+bit 570 O 1 IO_P104 569 1 Z
+bit 569 C 1 *
+bit 568 I 1 IO_P103
+bit 567 O 1 IO_P103 566 1 Z
+bit 566 C 1 *
+bit 565 I 1 IO_P102
+bit 564 O 1 IO_P102 563 1 Z
+bit 563 C 1 *
+bit 562 I 1 IO_P100
+bit 561 O 1 IO_P100 560 1 Z
+bit 560 C 1 *
+bit 559 I 1 IO_P99
+bit 558 O 1 IO_P99 557 1 Z
+bit 557 C 1 *
+bit 556 I 1 IO_P98
+bit 555 O 1 IO_P98 554 1 Z
+bit 554 C 1 *
+bit 553 I 1 IO_P97
+bit 552 O 1 IO_P97 551 1 Z
+bit 551 C 1 *
+bit 550 I 1 IO_P96
+bit 549 O 1 IO_P96 548 1 Z
+bit 548 C 1 *
+bit 547 I 1 IO_P95
+bit 546 O 1 IO_P95 545 1 Z
+bit 545 C 1 *
+bit 544 O 1 *
+bit 543 O 1 *
+bit 542 O 1 *
+bit 541 O 1 *
+bit 540 O 1 *
+bit 539 O 1 *
+bit 538 O 1 *
+bit 537 O 1 *
+bit 536 O 1 *
+bit 535 O 1 *
+bit 534 O 1 *
+bit 533 O 1 *
+bit 532 I 1 IO_P93
+bit 531 O 1 IO_P93 530 1 Z
+bit 530 C 1 *
+bit 529 I 1 IO_P92
+bit 528 O 1 IO_P92 527 1 Z
+bit 527 C 1 *
+bit 526 I 1 IO_P90
+bit 525 O 1 IO_P90 524 1 Z
+bit 524 C 1 *
+bit 523 I 1 IO_P89
+bit 522 O 1 IO_P89 521 1 Z
+bit 521 C 1 *
+bit 520 O 1 *
+bit 519 O 1 *
+bit 518 O 1 *
+bit 517 O 1 *
+bit 516 O 1 *
+bit 515 O 1 *
+bit 514 O 1 *
+bit 513 O 1 *
+bit 512 O 1 *
+bit 511 O 1 *
+bit 510 O 1 *
+bit 509 O 1 *
+bit 508 I 1 IO_P87
+bit 507 O 1 IO_P87 506 1 Z
+bit 506 C 1 *
+bit 505 I 1 IO_P86
+bit 504 O 1 IO_P86 503 1 Z
+bit 503 C 1 *
+bit 502 I 1 IO_P85
+bit 501 O 1 IO_P85 500 1 Z
+bit 500 C 1 *
+bit 499 I 1 IO_P84
+bit 498 O 1 IO_P84 497 1 Z
+bit 497 C 1 *
+bit 496 I 1 IO_P83
+bit 495 O 1 IO_P83 494 1 Z
+bit 494 C 1 *
+bit 493 I 1 IO_P82
+bit 492 O 1 IO_P82 491 1 Z
+bit 491 C 1 *
+bit 490 I 1 IO_P80
+bit 489 O 1 IO_P80 488 1 Z
+bit 488 C 1 *
+bit 487 I 1 IO_P79
+bit 486 O 1 IO_P79 485 1 Z
+bit 485 C 1 *
+bit 484 I 1 IO_P78
+bit 483 O 1 IO_P78 482 1 Z
+bit 482 C 1 *
+bit 481 I 1 IO_P77
+bit 480 O 1 IO_P77 479 1 Z
+bit 479 C 1 *
+bit 478 I 1 IO_P76
+bit 477 O 1 IO_P76 476 1 Z
+bit 476 C 1 *
+bit 475 O 1 *
+bit 474 O 1 *
+bit 473 O 1 *
+bit 472 O 1 *
+bit 471 O 1 *
+bit 470 O 1 *
+bit 469 O 1 *
+bit 468 O 1 *
+bit 467 O 1 *
+bit 466 O 1 *
+bit 465 O 1 *
+bit 464 O 1 *
+bit 463 O 1 *
+bit 462 O 1 *
+bit 461 O 1 *
+bit 460 I 1 IO_P74
+bit 459 O 1 IO_P74 458 1 Z
+bit 458 C 1 *
+bit 457 I 1 IO_P73
+bit 456 O 1 IO_P73 455 1 Z
+bit 455 C 1 *
+bit 454 I 1 CCLK_P72
+bit 453 O 1 CCLK_P72 452 1 Z
+bit 452 C 1 *
+bit 451 I 1 DONE_P71
+bit 450 O 1 DONE_P71 449 1 Z
+bit 449 C 1 *
+bit 448 I 1 IO_P70
+bit 447 O 1 IO_P70 446 1 Z
+bit 446 C 1 *
+bit 445 I 1 IO_P69
+bit 444 O 1 IO_P69 443 1 Z
+bit 443 C 1 *
+bit 442 I 1 IO_P68
+bit 441 O 1 IO_P68 440 1 Z
+bit 440 C 1 *
+bit 439 O 1 *
+bit 438 O 1 *
+bit 437 O 1 *
+bit 436 O 1 *
+bit 435 O 1 *
+bit 434 O 1 *
+bit 433 O 1 *
+bit 432 O 1 *
+bit 431 O 1 *
+bit 430 O 1 *
+bit 429 O 1 *
+bit 428 O 1 *
+bit 427 O 1 *
+bit 426 O 1 *
+bit 425 O 1 *
+bit 424 O 1 *
+bit 423 O 1 *
+bit 422 O 1 *
+bit 421 O 1 *
+bit 420 O 1 *
+bit 419 O 1 *
+bit 418 O 1 *
+bit 417 O 1 *
+bit 416 O 1 *
+bit 415 I 1 IO_P65
+bit 414 O 1 IO_P65 413 1 Z
+bit 413 C 1 *
+bit 412 I 1 IO_P63
+bit 411 O 1 IO_P63 410 1 Z
+bit 410 C 1 *
+bit 409 O 1 *
+bit 408 O 1 *
+bit 407 O 1 *
+bit 406 O 1 *
+bit 405 O 1 *
+bit 404 O 1 *
+bit 403 O 1 *
+bit 402 O 1 *
+bit 401 O 1 *
+bit 400 O 1 *
+bit 399 O 1 *
+bit 398 O 1 *
+bit 397 O 1 *
+bit 396 O 1 *
+bit 395 O 1 *
+bit 394 I 1 IO_P60
+bit 393 O 1 IO_P60 392 1 Z
+bit 392 C 1 *
+bit 391 I 1 IO_P59
+bit 390 O 1 IO_P59 389 1 Z
+bit 389 C 1 *
+bit 388 O 1 *
+bit 387 O 1 *
+bit 386 O 1 *
+bit 385 I 1 IO_P58
+bit 384 O 1 IO_P58 383 1 Z
+bit 383 C 1 *
+bit 382 I 1 IO_P57
+bit 381 O 1 IO_P57 380 1 Z
+bit 380 C 1 *
+bit 379 I 1 IO_P56
+bit 378 O 1 IO_P56 377 1 Z
+bit 377 C 1 *
+bit 376 I 1 IO_P55
+bit 375 O 1 IO_P55 374 1 Z
+bit 374 C 1 *
+bit 373 O 1 *
+bit 372 O 1 *
+bit 371 O 1 *
+bit 370 I 1 IO_P53
+bit 369 O 1 IO_P53 368 1 Z
+bit 368 C 1 *
+bit 367 I 1 IO_P52
+bit 366 O 1 IO_P52 365 1 Z
+bit 365 C 1 *
+bit 364 I 1 IO_P51
+bit 363 O 1 IO_P51 362 1 Z
+bit 362 C 1 *
+bit 361 I 1 IO_P50
+bit 360 O 1 IO_P50 359 1 Z
+bit 359 C 1 *
+bit 358 O 1 *
+bit 357 O 1 *
+bit 356 O 1 *
+bit 355 O 1 *
+bit 354 O 1 *
+bit 353 O 1 *
+bit 352 O 1 *
+bit 351 O 1 *
+bit 350 O 1 *
+bit 349 O 1 *
+bit 348 O 1 *
+bit 347 O 1 *
+bit 346 O 1 *
+bit 345 O 1 *
+bit 344 O 1 *
+bit 343 O 1 *
+bit 342 O 1 *
+bit 341 O 1 *
+bit 340 I 1 IO_P47
+bit 339 O 1 IO_P47 338 1 Z
+bit 338 C 1 *
+bit 337 I 1 IO_P46
+bit 336 O 1 IO_P46 335 1 Z
+bit 335 C 1 *
+bit 334 I 1 IO_P44
+bit 333 O 1 IO_P44 332 1 Z
+bit 332 C 1 *
+bit 331 O 1 *
+bit 330 O 1 *
+bit 329 O 1 *
+bit 328 O 1 *
+bit 327 O 1 *
+bit 326 O 1 *
+bit 325 O 1 *
+bit 324 O 1 *
+bit 323 O 1 *
+bit 322 O 1 *
+bit 321 O 1 *
+bit 320 O 1 *
+bit 319 O 1 *
+bit 318 O 1 *
+bit 317 O 1 *
+bit 316 O 1 *
+bit 315 O 1 *
+bit 314 O 1 *
+bit 313 O 1 *
+bit 312 O 1 *
+bit 311 O 1 *
+bit 310 O 1 *
+bit 309 O 1 *
+bit 308 O 1 *
+bit 307 O 1 *
+bit 306 O 1 *
+bit 305 O 1 *
+bit 304 I 1 IO_P41
+bit 303 O 1 IO_P41 302 1 Z
+bit 302 C 1 *
+bit 301 I 1 IO_P40
+bit 300 O 1 IO_P40 299 1 Z
+bit 299 C 1 *
+bit 298 I 1 M2_P39
+bit 297 I 1 M0_P38
+bit 296 I 1 M1_P37
+bit 295 I 1 IO_P36
+bit 294 O 1 IO_P36 293 1 Z
+bit 293 C 1 *
+bit 292 I 1 IO_P35
+bit 291 O 1 IO_P35 290 1 Z
+bit 290 C 1 *
+bit 289 O 1 *
+bit 288 O 1 *
+bit 287 O 1 *
+bit 286 O 1 *
+bit 285 O 1 *
+bit 284 O 1 *
+bit 283 O 1 *
+bit 282 O 1 *
+bit 281 O 1 *
+bit 280 O 1 *
+bit 279 O 1 *
+bit 278 O 1 *
+bit 277 O 1 *
+bit 276 O 1 *
+bit 275 O 1 *
+bit 274 O 1 *
+bit 273 O 1 *
+bit 272 O 1 *
+bit 271 I 1 IO_P33
+bit 270 O 1 IO_P33 269 1 Z
+bit 269 C 1 *
+bit 268 I 1 IO_P32
+bit 267 O 1 IO_P32 266 1 Z
+bit 266 C 1 *
+bit 265 I 1 IO_P31
+bit 264 O 1 IO_P31 263 1 Z
+bit 263 C 1 *
+bit 262 I 1 IO_P30
+bit 261 O 1 IO_P30 260 1 Z
+bit 260 C 1 *
+bit 259 I 1 IO_P28
+bit 258 O 1 IO_P28 257 1 Z
+bit 257 C 1 *
+bit 256 I 1 IO_P27
+bit 255 O 1 IO_P27 254 1 Z
+bit 254 C 1 *
+bit 253 I 1 IO_P26
+bit 252 O 1 IO_P26 251 1 Z
+bit 251 C 1 *
+bit 250 I 1 IO_P25
+bit 249 O 1 IO_P25 248 1 Z
+bit 248 C 1 *
+bit 247 I 1 IO_P24
+bit 246 O 1 IO_P24 245 1 Z
+bit 245 C 1 *
+bit 244 I 1 IO_P23
+bit 243 O 1 IO_P23 242 1 Z
+bit 242 C 1 *
+bit 241 O 1 *
+bit 240 O 1 *
+bit 239 O 1 *
+bit 238 O 1 *
+bit 237 O 1 *
+bit 236 O 1 *
+bit 235 O 1 *
+bit 234 O 1 *
+bit 233 O 1 *
+bit 232 O 1 *
+bit 231 O 1 *
+bit 230 O 1 *
+bit 229 I 1 IO_P21
+bit 228 O 1 IO_P21 227 1 Z
+bit 227 C 1 *
+bit 226 I 1 IO_P20
+bit 225 O 1 IO_P20 224 1 Z
+bit 224 C 1 *
+bit 223 I 1 IO_P18
+bit 222 O 1 IO_P18 221 1 Z
+bit 221 C 1 *
+bit 220 I 1 IO_P17
+bit 219 O 1 IO_P17 218 1 Z
+bit 218 C 1 *
+bit 217 O 1 *
+bit 216 O 1 *
+bit 215 O 1 *
+bit 214 O 1 *
+bit 213 O 1 *
+bit 212 O 1 *
+bit 211 O 1 *
+bit 210 O 1 *
+bit 209 O 1 *
+bit 208 O 1 *
+bit 207 O 1 *
+bit 206 O 1 *
+bit 205 I 1 IO_P15
+bit 204 O 1 IO_P15 203 1 Z
+bit 203 C 1 *
+bit 202 I 1 IO_P14
+bit 201 O 1 IO_P14 200 1 Z
+bit 200 C 1 *
+bit 199 I 1 IO_P13
+bit 198 O 1 IO_P13 197 1 Z
+bit 197 C 1 *
+bit 196 I 1 IO_P12
+bit 195 O 1 IO_P12 194 1 Z
+bit 194 C 1 *
+bit 193 I 1 IO_P11
+bit 192 O 1 IO_P11 191 1 Z
+bit 191 C 1 *
+bit 190 I 1 IO_P10
+bit 189 O 1 IO_P10 188 1 Z
+bit 188 C 1 *
+bit 187 I 1 IO_P8
+bit 186 O 1 IO_P8 185 1 Z
+bit 185 C 1 *
+bit 184 I 1 IO_P7
+bit 183 O 1 IO_P7 182 1 Z
+bit 182 C 1 *
+bit 181 I 1 IO_P6
+bit 180 O 1 IO_P6 179 1 Z
+bit 179 C 1 *
+bit 178 I 1 IO_P5
+bit 177 O 1 IO_P5 176 1 Z
+bit 176 C 1 *
+bit 175 I 1 IO_P4
+bit 174 O 1 IO_P4 173 1 Z
+bit 173 C 1 *
+bit 172 O 1 *
+bit 171 O 1 *
+bit 170 O 1 *
+bit 169 O 1 *
+bit 168 O 1 *
+bit 167 O 1 *
+bit 166 O 1 *
+bit 165 O 1 *
+bit 164 O 1 *
+bit 163 O 1 *
+bit 162 O 1 *
+bit 161 O 1 *
+bit 160 O 1 *
+bit 159 O 1 *
+bit 158 O 1 *
+bit 157 I 1 IO_P2
+bit 156 O 1 IO_P2 155 1 Z
+bit 155 C 1 *
+bit 154 I 1 IO_P1
+bit 153 O 1 IO_P1 152 1 Z
+bit 152 C 1 *
+bit 151 O 1 *
+bit 150 I 1 HSWAP_EN_P142
+bit 149 O 1 *
+bit 148 O 1 *
+bit 147 O 1 *
+bit 146 I 1 IO_P141
+bit 145 O 1 IO_P141 144 1 Z
+bit 144 C 1 *
+bit 143 I 1 IO_P140
+bit 142 O 1 IO_P140 141 1 Z
+bit 141 C 1 *
+bit 140 O 1 *
+bit 139 O 1 *
+bit 138 O 1 *
+bit 137 O 1 *
+bit 136 O 1 *
+bit 135 O 1 *
+bit 134 O 1 *
+bit 133 O 1 *
+bit 132 O 1 *
+bit 131 O 1 *
+bit 130 O 1 *
+bit 129 O 1 *
+bit 128 O 1 *
+bit 127 O 1 *
+bit 126 O 1 *
+bit 125 O 1 *
+bit 124 O 1 *
+bit 123 O 1 *
+bit 122 O 1 *
+bit 121 O 1 *
+bit 120 O 1 *
+bit 119 O 1 *
+bit 118 O 1 *
+bit 117 O 1 *
+bit 116 I 1 IO_P137
+bit 115 O 1 IO_P137 114 1 Z
+bit 114 C 1 *
+bit 113 I 1 IO_P135
+bit 112 O 1 IO_P135 111 1 Z
+bit 111 C 1 *
+bit 110 O 1 *
+bit 109 O 1 *
+bit 108 O 1 *
+bit 107 O 1 *
+bit 106 O 1 *
+bit 105 O 1 *
+bit 104 O 1 *
+bit 103 O 1 *
+bit 102 O 1 *
+bit 101 O 1 *
+bit 100 O 1 *
+bit 99 O 1 *
+bit 98 O 1 *
+bit 97 O 1 *
+bit 96 O 1 *
+bit 95 I 1 IO_P132
+bit 94 O 1 IO_P132 93 1 Z
+bit 93 C 1 *
+bit 92 I 1 IO_P131
+bit 91 O 1 IO_P131 90 1 Z
+bit 90 C 1 *
+bit 89 O 1 *
+bit 88 O 1 *
+bit 87 O 1 *
+bit 86 I 1 IO_P130
+bit 85 O 1 IO_P130 84 1 Z
+bit 84 C 1 *
+bit 83 I 1 IO_P129
+bit 82 O 1 IO_P129 81 1 Z
+bit 81 C 1 *
+bit 80 I 1 IO_P128
+bit 79 O 1 IO_P128 78 1 Z
+bit 78 C 1 *
+bit 77 I 1 IO_P127
+bit 76 O 1 IO_P127 75 1 Z
+bit 75 C 1 *
+bit 74 O 1 *
+bit 73 O 1 *
+bit 72 O 1 *
+bit 71 I 1 IO_P125
+bit 70 O 1 IO_P125 69 1 Z
+bit 69 C 1 *
+bit 68 I 1 IO_P124
+bit 67 O 1 IO_P124 66 1 Z
+bit 66 C 1 *
+bit 65 I 1 IO_P123
+bit 64 O 1 IO_P123 63 1 Z
+bit 63 C 1 *
+bit 62 I 1 IO_P122
+bit 61 O 1 IO_P122 60 1 Z
+bit 60 C 1 *
+bit 59 O 1 *
+bit 58 O 1 *
+bit 57 O 1 *
+bit 56 O 1 *
+bit 55 O 1 *
+bit 54 O 1 *
+bit 53 O 1 *
+bit 52 O 1 *
+bit 51 O 1 *
+bit 50 O 1 *
+bit 49 O 1 *
+bit 48 O 1 *
+bit 47 O 1 *
+bit 46 O 1 *
+bit 45 O 1 *
+bit 44 O 1 *
+bit 43 O 1 *
+bit 42 O 1 *
+bit 41 I 1 IO_P119
+bit 40 O 1 IO_P119 39 1 Z
+bit 39 C 1 *
+bit 38 I 1 IO_P118
+bit 37 O 1 IO_P118 36 1 Z
+bit 36 C 1 *
+bit 35 I 1 IO_P116
+bit 34 O 1 IO_P116 33 1 Z
+bit 33 C 1 *
+bit 32 O 1 *
+bit 31 O 1 *
+bit 30 O 1 *
+bit 29 O 1 *
+bit 28 O 1 *
+bit 27 O 1 *
+bit 26 O 1 *
+bit 25 O 1 *
+bit 24 O 1 *
+bit 23 O 1 *
+bit 22 O 1 *
+bit 21 O 1 *
+bit 20 O 1 *
+bit 19 O 1 *
+bit 18 O 1 *
+bit 17 O 1 *
+bit 16 O 1 *
+bit 15 O 1 *
+bit 14 O 1 *
+bit 13 O 1 *
+bit 12 O 1 *
+bit 11 O 1 *
+bit 10 O 1 *
+bit 9 O 1 *
+bit 8 O 1 *
+bit 7 O 1 *
+bit 6 O 1 *
+bit 5 I 1 IO_P113
+bit 4 O 1 IO_P113 3 1 Z
+bit 3 C 1 *
+bit 2 I 1 IO_P112
+bit 1 O 1 IO_P112 0 1 Z
+bit 0 C 1 *
--- /dev/null
+signal GND1
+signal GND2
+signal GND3
+signal GND4
+signal GND5
+signal GND6
+signal GND7
+signal GND8
+signal GND9
+signal GND10
+signal CCLK_P52
+signal DONE_P51
+signal HSWAP_EN_P98
+signal M0_P25
+signal M1_P24
+signal M2_P26
+signal PROG_B
+signal TCK
+signal TDI
+signal TDO
+signal TMS
+signal VCCAUX1
+signal VCCAUX2
+signal VCCAUX3
+signal VCCAUX4
+signal VCCINT1
+signal VCCINT2
+signal VCCINT3
+signal VCCINT4
+signal VCCO0
+signal VCCO1
+signal VCCO2
+signal VCCO3
+signal VCCO4
+signal VCCO5
+signal VCCO6
+signal VCCO7
+signal IO_P1
+signal IO_P2
+signal IO_P4
+signal IO_P5
+signal IO_P8
+signal IO_P9
+signal IO_P11
+signal IO_P12
+signal IO_P13
+signal IO_P14
+signal IO_P15
+signal IO_P16
+signal IO_P17
+signal IO_P21
+signal IO_P22
+signal IO_P23
+signal IO_P27
+signal IO_P28
+signal IO_P30
+signal IO_P32
+signal IO_P34
+signal IO_P35
+signal IO_P36
+signal IO_P37
+signal IO_P38
+signal IO_P39
+signal IO_P40
+signal IO_P42
+signal IO_P43
+signal IO_P44
+signal IO_P47
+signal IO_P48
+signal IO_P49
+signal IO_P50
+signal IO_P53
+signal IO_P54
+signal IO_P55
+signal IO_P59
+signal IO_P60
+signal IO_P61
+signal IO_P62
+signal IO_P63
+signal IO_P64
+signal IO_P65
+signal IO_P67
+signal IO_P68
+signal IO_P71
+signal IO_P72
+signal IO_P74
+signal IO_P75
+signal IO_P79
+signal IO_P80
+signal IO_P81
+signal IO_P85
+signal IO_P86
+signal IO_P87
+signal IO_P88
+signal IO_P89
+signal IO_P90
+signal IO_P91
+signal IO_P92
+signal IO_P96
+
+register BSR 599
+register BR 1
+register DIR 32
+
+instruction length 6
+
+instruction EXTEST 000000 BSR
+instruction SAMPLE/PRELOAD 000001 BSR
+instruction IDCODE 001001 DIR
+instruction BYPASS 111111 BR
+
+bit 598 I 1 IO_P75
+bit 597 O 1 IO_P75 596 1 Z
+bit 596 C 1 *
+bit 595 I 1 IO_P74
+bit 594 O 1 IO_P74 593 1 Z
+bit 593 C 1 *
+bit 592 O 1 *
+bit 591 O 1 *
+bit 590 O 1 *
+bit 589 O 1 *
+bit 588 O 1 *
+bit 587 O 1 *
+bit 586 O 1 *
+bit 585 O 1 *
+bit 584 O 1 *
+bit 583 O 1 *
+bit 582 O 1 *
+bit 581 O 1 *
+bit 580 O 1 *
+bit 579 O 1 *
+bit 578 O 1 *
+bit 577 O 1 *
+bit 576 O 1 *
+bit 575 O 1 *
+bit 574 O 1 *
+bit 573 O 1 *
+bit 572 O 1 *
+bit 571 O 1 *
+bit 570 O 1 *
+bit 569 O 1 *
+bit 568 I 1 IO_P72
+bit 567 O 1 IO_P72 566 1 Z
+bit 566 C 1 *
+bit 565 I 1 IO_P71
+bit 564 O 1 IO_P71 563 1 Z
+bit 563 C 1 *
+bit 562 O 1 *
+bit 561 O 1 *
+bit 560 O 1 *
+bit 559 O 1 *
+bit 558 O 1 *
+bit 557 O 1 *
+bit 556 O 1 *
+bit 555 O 1 *
+bit 554 O 1 *
+bit 553 O 1 *
+bit 552 O 1 *
+bit 551 O 1 *
+bit 550 I 1 IO_P68
+bit 549 O 1 IO_P68 548 1 Z
+bit 548 C 1 *
+bit 547 I 1 IO_P67
+bit 546 O 1 IO_P67 545 1 Z
+bit 545 C 1 *
+bit 544 O 1 *
+bit 543 O 1 *
+bit 542 O 1 *
+bit 541 O 1 *
+bit 540 O 1 *
+bit 539 O 1 *
+bit 538 O 1 *
+bit 537 O 1 *
+bit 536 O 1 *
+bit 535 O 1 *
+bit 534 O 1 *
+bit 533 O 1 *
+bit 532 I 1 IO_P65
+bit 531 O 1 IO_P65 530 1 Z
+bit 530 C 1 *
+bit 529 I 1 IO_P64
+bit 528 O 1 IO_P64 527 1 Z
+bit 527 C 1 *
+bit 526 I 1 IO_P63
+bit 525 O 1 IO_P63 524 1 Z
+bit 524 C 1 *
+bit 523 I 1 IO_P62
+bit 522 O 1 IO_P62 521 1 Z
+bit 521 C 1 *
+bit 520 O 1 *
+bit 519 O 1 *
+bit 518 O 1 *
+bit 517 O 1 *
+bit 516 O 1 *
+bit 515 O 1 *
+bit 514 O 1 *
+bit 513 O 1 *
+bit 512 O 1 *
+bit 511 O 1 *
+bit 510 O 1 *
+bit 509 O 1 *
+bit 508 I 1 IO_P61
+bit 507 O 1 IO_P61 506 1 Z
+bit 506 C 1 *
+bit 505 I 1 IO_P60
+bit 504 O 1 IO_P60 503 1 Z
+bit 503 C 1 *
+bit 502 I 1 IO_P59
+bit 501 O 1 IO_P59 500 1 Z
+bit 500 C 1 *
+bit 499 O 1 *
+bit 498 O 1 *
+bit 497 O 1 *
+bit 496 O 1 *
+bit 495 O 1 *
+bit 494 O 1 *
+bit 493 O 1 *
+bit 492 O 1 *
+bit 491 O 1 *
+bit 490 O 1 *
+bit 489 O 1 *
+bit 488 O 1 *
+bit 487 O 1 *
+bit 486 O 1 *
+bit 485 O 1 *
+bit 484 I 1 IO_P55
+bit 483 O 1 IO_P55 482 1 Z
+bit 482 C 1 *
+bit 481 O 1 *
+bit 480 O 1 *
+bit 479 O 1 *
+bit 478 O 1 *
+bit 477 O 1 *
+bit 476 O 1 *
+bit 475 O 1 *
+bit 474 O 1 *
+bit 473 O 1 *
+bit 472 O 1 *
+bit 471 O 1 *
+bit 470 O 1 *
+bit 469 O 1 *
+bit 468 O 1 *
+bit 467 O 1 *
+bit 466 O 1 *
+bit 465 O 1 *
+bit 464 O 1 *
+bit 463 O 1 *
+bit 462 O 1 *
+bit 461 O 1 *
+bit 460 I 1 IO_P54
+bit 459 O 1 IO_P54 458 1 Z
+bit 458 C 1 *
+bit 457 I 1 IO_P53
+bit 456 O 1 IO_P53 455 1 Z
+bit 455 C 1 *
+bit 454 I 1 CCLK_P52
+bit 453 O 1 CCLK_P52 452 1 Z
+bit 452 C 1 *
+bit 451 I 1 DONE_P51
+bit 450 O 1 DONE_P51 449 1 Z
+bit 449 C 1 *
+bit 448 O 1 *
+bit 447 O 1 *
+bit 446 O 1 *
+bit 445 I 1 IO_P50
+bit 444 O 1 IO_P50 443 1 Z
+bit 443 C 1 *
+bit 442 I 1 IO_P49
+bit 441 O 1 IO_P49 440 1 Z
+bit 440 C 1 *
+bit 439 O 1 *
+bit 438 O 1 *
+bit 437 O 1 *
+bit 436 O 1 *
+bit 435 O 1 *
+bit 434 O 1 *
+bit 433 O 1 *
+bit 432 O 1 *
+bit 431 O 1 *
+bit 430 O 1 *
+bit 429 O 1 *
+bit 428 O 1 *
+bit 427 O 1 *
+bit 426 O 1 *
+bit 425 O 1 *
+bit 424 O 1 *
+bit 423 O 1 *
+bit 422 O 1 *
+bit 421 O 1 *
+bit 420 O 1 *
+bit 419 O 1 *
+bit 418 O 1 *
+bit 417 O 1 *
+bit 416 O 1 *
+bit 415 I 1 IO_P48
+bit 414 O 1 IO_P48 413 1 Z
+bit 413 C 1 *
+bit 412 I 1 IO_P47
+bit 411 O 1 IO_P47 410 1 Z
+bit 410 C 1 *
+bit 409 O 1 *
+bit 408 O 1 *
+bit 407 O 1 *
+bit 406 O 1 *
+bit 405 O 1 *
+bit 404 O 1 *
+bit 403 O 1 *
+bit 402 O 1 *
+bit 401 O 1 *
+bit 400 O 1 *
+bit 399 O 1 *
+bit 398 O 1 *
+bit 397 O 1 *
+bit 396 O 1 *
+bit 395 O 1 *
+bit 394 I 1 IO_P44
+bit 393 O 1 IO_P44 392 1 Z
+bit 392 C 1 *
+bit 391 I 1 IO_P43
+bit 390 O 1 IO_P43 389 1 Z
+bit 389 C 1 *
+bit 388 O 1 *
+bit 387 O 1 *
+bit 386 O 1 *
+bit 385 I 1 IO_P42
+bit 384 O 1 IO_P42 383 1 Z
+bit 383 C 1 *
+bit 382 I 1 IO_P40
+bit 381 O 1 IO_P40 380 1 Z
+bit 380 C 1 *
+bit 379 I 1 IO_P39
+bit 378 O 1 IO_P39 377 1 Z
+bit 377 C 1 *
+bit 376 I 1 IO_P38
+bit 375 O 1 IO_P38 374 1 Z
+bit 374 C 1 *
+bit 373 O 1 *
+bit 372 O 1 *
+bit 371 O 1 *
+bit 370 I 1 IO_P37
+bit 369 O 1 IO_P37 368 1 Z
+bit 368 C 1 *
+bit 367 I 1 IO_P36
+bit 366 O 1 IO_P36 365 1 Z
+bit 365 C 1 *
+bit 364 I 1 IO_P35
+bit 363 O 1 IO_P35 362 1 Z
+bit 362 C 1 *
+bit 361 I 1 IO_P34
+bit 360 O 1 IO_P34 359 1 Z
+bit 359 C 1 *
+bit 358 O 1 *
+bit 357 O 1 *
+bit 356 O 1 *
+bit 355 O 1 *
+bit 354 O 1 *
+bit 353 O 1 *
+bit 352 O 1 *
+bit 351 O 1 *
+bit 350 O 1 *
+bit 349 O 1 *
+bit 348 O 1 *
+bit 347 O 1 *
+bit 346 O 1 *
+bit 345 O 1 *
+bit 344 O 1 *
+bit 343 O 1 *
+bit 342 O 1 *
+bit 341 O 1 *
+bit 340 I 1 IO_P32
+bit 339 O 1 IO_P32 338 1 Z
+bit 338 C 1 *
+bit 337 I 1 IO_P30
+bit 336 O 1 IO_P30 335 1 Z
+bit 335 C 1 *
+bit 334 O 1 *
+bit 333 O 1 *
+bit 332 O 1 *
+bit 331 O 1 *
+bit 330 O 1 *
+bit 329 O 1 *
+bit 328 O 1 *
+bit 327 O 1 *
+bit 326 O 1 *
+bit 325 O 1 *
+bit 324 O 1 *
+bit 323 O 1 *
+bit 322 O 1 *
+bit 321 O 1 *
+bit 320 O 1 *
+bit 319 O 1 *
+bit 318 O 1 *
+bit 317 O 1 *
+bit 316 O 1 *
+bit 315 O 1 *
+bit 314 O 1 *
+bit 313 O 1 *
+bit 312 O 1 *
+bit 311 O 1 *
+bit 310 O 1 *
+bit 309 O 1 *
+bit 308 O 1 *
+bit 307 O 1 *
+bit 306 O 1 *
+bit 305 O 1 *
+bit 304 I 1 IO_P28
+bit 303 O 1 IO_P28 302 1 Z
+bit 302 C 1 *
+bit 301 I 1 IO_P27
+bit 300 O 1 IO_P27 299 1 Z
+bit 299 C 1 *
+bit 298 I 1 M2_P26
+bit 297 I 1 M0_P25
+bit 296 I 1 M1_P24
+bit 295 I 1 IO_P23
+bit 294 O 1 IO_P23 293 1 Z
+bit 293 C 1 *
+bit 292 I 1 IO_P22
+bit 291 O 1 IO_P22 290 1 Z
+bit 290 C 1 *
+bit 289 O 1 *
+bit 288 O 1 *
+bit 287 O 1 *
+bit 286 O 1 *
+bit 285 O 1 *
+bit 284 O 1 *
+bit 283 O 1 *
+bit 282 O 1 *
+bit 281 O 1 *
+bit 280 O 1 *
+bit 279 O 1 *
+bit 278 O 1 *
+bit 277 O 1 *
+bit 276 O 1 *
+bit 275 O 1 *
+bit 274 O 1 *
+bit 273 O 1 *
+bit 272 O 1 *
+bit 271 O 1 *
+bit 270 O 1 *
+bit 269 O 1 *
+bit 268 I 1 IO_P21
+bit 267 O 1 IO_P21 266 1 Z
+bit 266 C 1 *
+bit 265 O 1 *
+bit 264 O 1 *
+bit 263 O 1 *
+bit 262 O 1 *
+bit 261 O 1 *
+bit 260 O 1 *
+bit 259 O 1 *
+bit 258 O 1 *
+bit 257 O 1 *
+bit 256 O 1 *
+bit 255 O 1 *
+bit 254 O 1 *
+bit 253 O 1 *
+bit 252 O 1 *
+bit 251 O 1 *
+bit 250 I 1 IO_P17
+bit 249 O 1 IO_P17 248 1 Z
+bit 248 C 1 *
+bit 247 I 1 IO_P16
+bit 246 O 1 IO_P16 245 1 Z
+bit 245 C 1 *
+bit 244 I 1 IO_P15
+bit 243 O 1 IO_P15 242 1 Z
+bit 242 C 1 *
+bit 241 O 1 *
+bit 240 O 1 *
+bit 239 O 1 *
+bit 238 O 1 *
+bit 237 O 1 *
+bit 236 O 1 *
+bit 235 O 1 *
+bit 234 O 1 *
+bit 233 O 1 *
+bit 232 O 1 *
+bit 231 O 1 *
+bit 230 O 1 *
+bit 229 I 1 IO_P14
+bit 228 O 1 IO_P14 227 1 Z
+bit 227 C 1 *
+bit 226 I 1 IO_P13
+bit 225 O 1 IO_P13 224 1 Z
+bit 224 C 1 *
+bit 223 I 1 IO_P12
+bit 222 O 1 IO_P12 221 1 Z
+bit 221 C 1 *
+bit 220 I 1 IO_P11
+bit 219 O 1 IO_P11 218 1 Z
+bit 218 C 1 *
+bit 217 O 1 *
+bit 216 O 1 *
+bit 215 O 1 *
+bit 214 O 1 *
+bit 213 O 1 *
+bit 212 O 1 *
+bit 211 O 1 *
+bit 210 O 1 *
+bit 209 O 1 *
+bit 208 O 1 *
+bit 207 O 1 *
+bit 206 O 1 *
+bit 205 O 1 *
+bit 204 O 1 *
+bit 203 O 1 *
+bit 202 O 1 *
+bit 201 O 1 *
+bit 200 O 1 *
+bit 199 I 1 IO_P9
+bit 198 O 1 IO_P9 197 1 Z
+bit 197 C 1 *
+bit 196 I 1 IO_P8
+bit 195 O 1 IO_P8 194 1 Z
+bit 194 C 1 *
+bit 193 O 1 *
+bit 192 O 1 *
+bit 191 O 1 *
+bit 190 O 1 *
+bit 189 O 1 *
+bit 188 O 1 *
+bit 187 I 1 IO_P5
+bit 186 O 1 IO_P5 185 1 Z
+bit 185 C 1 *
+bit 184 I 1 IO_P4
+bit 183 O 1 IO_P4 182 1 Z
+bit 182 C 1 *
+bit 181 O 1 *
+bit 180 O 1 *
+bit 179 O 1 *
+bit 178 O 1 *
+bit 177 O 1 *
+bit 176 O 1 *
+bit 175 O 1 *
+bit 174 O 1 *
+bit 173 O 1 *
+bit 172 O 1 *
+bit 171 O 1 *
+bit 170 O 1 *
+bit 169 O 1 *
+bit 168 O 1 *
+bit 167 O 1 *
+bit 166 O 1 *
+bit 165 O 1 *
+bit 164 O 1 *
+bit 163 O 1 *
+bit 162 O 1 *
+bit 161 O 1 *
+bit 160 O 1 *
+bit 159 O 1 *
+bit 158 O 1 *
+bit 157 I 1 IO_P2
+bit 156 O 1 IO_P2 155 1 Z
+bit 155 C 1 *
+bit 154 I 1 IO_P1
+bit 153 O 1 IO_P1 152 1 Z
+bit 152 C 1 *
+bit 151 O 1 *
+bit 150 I 1 HSWAP_EN_P98
+bit 149 O 1 *
+bit 148 O 1 *
+bit 147 O 1 *
+bit 146 I 1 IO_P97
+bit 145 O 1 IO_P97 144 1 Z
+bit 144 C 1 *
+bit 143 I 1 IO_P96
+bit 142 O 1 IO_P96 141 1 Z
+bit 141 C 1 *
+bit 140 O 1 *
+bit 139 O 1 *
+bit 138 O 1 *
+bit 137 O 1 *
+bit 136 O 1 *
+bit 135 O 1 *
+bit 134 O 1 *
+bit 133 O 1 *
+bit 132 O 1 *
+bit 131 O 1 *
+bit 130 O 1 *
+bit 129 O 1 *
+bit 128 O 1 *
+bit 127 O 1 *
+bit 126 O 1 *
+bit 125 O 1 *
+bit 124 O 1 *
+bit 123 O 1 *
+bit 122 O 1 *
+bit 121 O 1 *
+bit 120 O 1 *
+bit 119 O 1 *
+bit 118 O 1 *
+bit 117 O 1 *
+bit 116 O 1 *
+bit 115 O 1 *
+bit 114 O 1 *
+bit 113 O 1 *
+bit 112 O 1 *
+bit 111 O 1 *
+bit 110 O 1 *
+bit 109 O 1 *
+bit 108 O 1 *
+bit 107 O 1 *
+bit 106 O 1 *
+bit 105 O 1 *
+bit 104 O 1 *
+bit 103 O 1 *
+bit 102 O 1 *
+bit 101 O 1 *
+bit 100 O 1 *
+bit 99 O 1 *
+bit 98 O 1 *
+bit 97 O 1 *
+bit 96 O 1 *
+bit 95 O 1 *
+bit 94 O 1 *
+bit 93 O 1 *
+bit 92 O 1 *
+bit 91 O 1 *
+bit 90 O 1 *
+bit 89 O 1 *
+bit 88 O 1 *
+bit 87 O 1 *
+bit 86 I 1 IO_P92
+bit 85 O 1 IO_P92 84 1 Z
+bit 84 C 1 *
+bit 83 I 1 IO_P91
+bit 82 O 1 IO_P91 81 1 Z
+bit 81 C 1 *
+bit 80 I 1 IO_P90
+bit 79 O 1 IO_P90 78 1 Z
+bit 78 C 1 *
+bit 77 I 1 IO_P89
+bit 76 O 1 IO_P89 75 1 Z
+bit 75 C 1 *
+bit 74 O 1 *
+bit 73 O 1 *
+bit 72 O 1 *
+bit 71 I 1 IO_P88
+bit 70 O 1 IO_P88 69 1 Z
+bit 69 C 1 *
+bit 68 I 1 IO_P87
+bit 67 O 1 IO_P87 66 1 Z
+bit 66 C 1 *
+bit 65 I 1 IO_P86
+bit 64 O 1 IO_P86 63 1 Z
+bit 63 C 1 *
+bit 62 I 1 IO_P85
+bit 61 O 1 IO_P85 60 1 Z
+bit 60 C 1 *
+bit 59 O 1 *
+bit 58 O 1 *
+bit 57 O 1 *
+bit 56 O 1 *
+bit 55 O 1 *
+bit 54 O 1 *
+bit 53 O 1 *
+bit 52 O 1 *
+bit 51 O 1 *
+bit 50 O 1 *
+bit 49 O 1 *
+bit 48 O 1 *
+bit 47 O 1 *
+bit 46 O 1 *
+bit 45 O 1 *
+bit 44 O 1 *
+bit 43 O 1 *
+bit 42 O 1 *
+bit 41 O 1 *
+bit 40 O 1 *
+bit 39 O 1 *
+bit 38 O 1 *
+bit 37 O 1 *
+bit 36 O 1 *
+bit 35 O 1 *
+bit 34 O 1 *
+bit 33 O 1 *
+bit 32 O 1 *
+bit 31 O 1 *
+bit 30 O 1 *
+bit 29 I 1 IO_P81
+bit 28 O 1 IO_P81 27 1 Z
+bit 27 C 1 *
+bit 26 O 1 *
+bit 25 O 1 *
+bit 24 O 1 *
+bit 23 O 1 *
+bit 22 O 1 *
+bit 21 O 1 *
+bit 20 O 1 *
+bit 19 O 1 *
+bit 18 O 1 *
+bit 17 O 1 *
+bit 16 O 1 *
+bit 15 O 1 *
+bit 14 O 1 *
+bit 13 O 1 *
+bit 12 O 1 *
+bit 11 O 1 *
+bit 10 O 1 *
+bit 9 O 1 *
+bit 8 O 1 *
+bit 7 O 1 *
+bit 6 O 1 *
+bit 5 I 1 IO_P80
+bit 4 O 1 IO_P80 3 1 Z
+bit 3 C 1 *
+bit 2 I 1 IO_P79
+bit 1 O 1 IO_P79 0 1 Z
+bit 0 C 1 *
--- /dev/null
+0000 xc3s2000 0
--- /dev/null
+signal GND1
+signal GND2
+signal GND3
+signal GND4
+signal GND5
+signal GND6
+signal GND7
+signal GND8
+signal GND9
+signal GND10
+signal GND11
+signal GND12
+signal GND13
+signal GND14
+signal GND15
+signal GND16
+signal GND17
+signal GND18
+signal GND19
+signal GND20
+signal GND21
+signal GND22
+signal GND23
+signal GND24
+signal GND25
+signal GND26
+signal GND27
+signal GND28
+signal GND29
+signal GND30
+signal GND31
+signal GND32
+signal GND33
+signal GND34
+signal GND35
+signal GND36
+signal GND37
+signal GND38
+signal GND39
+signal GND40
+signal GND41
+signal GND42
+signal GND43
+signal GND44
+signal GND45
+signal GND46
+signal GND47
+signal GND48
+signal GND49
+signal GND50
+signal GND51
+signal GND52
+signal GND53
+signal GND54
+signal GND55
+signal GND56
+signal GND57
+signal GND58
+signal GND59
+signal GND60
+signal GND61
+signal GND62
+signal GND63
+signal GND64
+signal GND65
+signal GND66
+signal GND67
+signal GND68
+signal GND69
+signal GND70
+signal GND71
+signal GND72
+signal GND73
+signal GND74
+signal GND75
+signal GND76
+signal GND77
+signal GND78
+signal GND79
+signal GND80
+signal GND81
+signal GND82
+signal GND83
+signal GND84
+signal GND85
+signal GND86
+signal GND87
+signal GND88
+signal GND89
+signal GND90
+signal GND91
+signal GND92
+signal GND93
+signal GND94
+signal GND95
+signal GND96
+signal GND97
+signal GND98
+signal GND99
+signal GND100
+signal GND101
+signal GND102
+signal GND103
+signal GND104
+signal GND105
+signal GND106
+signal GND107
+signal GND108
+signal GND109
+signal GND110
+signal GND111
+signal GND112
+signal CCLK_PAD544
+signal DONE_PAD543
+signal HSWAP_EN_PAD112
+signal M0_PAD319
+signal M1_PAD318
+signal M2_PAD320
+signal PROG_B
+signal TCK
+signal TDI
+signal TDO
+signal TMS
+signal VCCAUX1
+signal VCCAUX2
+signal VCCAUX3
+signal VCCAUX4
+signal VCCAUX5
+signal VCCAUX6
+signal VCCAUX7
+signal VCCAUX8
+signal VCCAUX9
+signal VCCAUX10
+signal VCCAUX11
+signal VCCAUX12
+signal VCCAUX13
+signal VCCAUX14
+signal VCCAUX15
+signal VCCAUX16
+signal VCCAUX17
+signal VCCAUX18
+signal VCCAUX19
+signal VCCAUX20
+signal VCCAUX21
+signal VCCAUX22
+signal VCCAUX23
+signal VCCAUX24
+signal VCCINT1
+signal VCCINT2
+signal VCCINT3
+signal VCCINT4
+signal VCCINT5
+signal VCCINT6
+signal VCCINT7
+signal VCCINT8
+signal VCCINT9
+signal VCCINT10
+signal VCCINT11
+signal VCCINT12
+signal VCCINT13
+signal VCCINT14
+signal VCCINT15
+signal VCCINT16
+signal VCCINT17
+signal VCCINT18
+signal VCCINT19
+signal VCCINT20
+signal VCCINT21
+signal VCCINT22
+signal VCCINT23
+signal VCCINT24
+signal VCCO01
+signal VCCO02
+signal VCCO03
+signal VCCO04
+signal VCCO05
+signal VCCO06
+signal VCCO07
+signal VCCO08
+signal VCCO09
+signal VCCO010
+signal VCCO11
+signal VCCO12
+signal VCCO13
+signal VCCO14
+signal VCCO15
+signal VCCO16
+signal VCCO17
+signal VCCO18
+signal VCCO19
+signal VCCO110
+signal VCCO21
+signal VCCO22
+signal VCCO23
+signal VCCO24
+signal VCCO25
+signal VCCO26
+signal VCCO27
+signal VCCO28
+signal VCCO29
+signal VCCO31
+signal VCCO32
+signal VCCO33
+signal VCCO34
+signal VCCO35
+signal VCCO36
+signal VCCO37
+signal VCCO38
+signal VCCO39
+signal VCCO41
+signal VCCO42
+signal VCCO43
+signal VCCO44
+signal VCCO45
+signal VCCO46
+signal VCCO47
+signal VCCO48
+signal VCCO49
+signal VCCO410
+signal VCCO51
+signal VCCO52
+signal VCCO53
+signal VCCO54
+signal VCCO55
+signal VCCO56
+signal VCCO57
+signal VCCO58
+signal VCCO59
+signal VCCO510
+signal VCCO61
+signal VCCO62
+signal VCCO63
+signal VCCO64
+signal VCCO65
+signal VCCO66
+signal VCCO67
+signal VCCO68
+signal VCCO69
+signal VCCO71
+signal VCCO72
+signal VCCO73
+signal VCCO74
+signal VCCO75
+signal VCCO76
+signal VCCO77
+signal VCCO78
+signal VCCO79
+signal IO_PAD2
+signal IO_PAD3
+signal IO_PAD4
+signal IO_PAD6
+signal IO_PAD8
+signal IO_PAD9
+signal IO_PAD10
+signal IO_PAD12
+signal IO_PAD13
+signal IO_PAD14
+signal IO_PAD16
+signal IO_PAD18
+signal IO_PAD20
+signal IO_PAD22
+signal IO_PAD23
+signal IO_PAD24
+signal IO_PAD25
+signal IO_PAD26
+signal IO_PAD28
+signal IO_PAD30
+signal IO_PAD31
+signal IO_PAD32
+signal IO_PAD33
+signal IO_PAD34
+signal IO_PAD35
+signal IO_PAD36
+signal IO_PAD38
+signal IO_PAD40
+signal IO_PAD41
+signal IO_PAD42
+signal IO_PAD44
+signal IO_PAD45
+signal IO_PAD46
+signal IO_PAD48
+signal IO_PAD50
+signal IO_PAD52
+signal IO_PAD54
+signal IO_PAD55
+signal IO_PAD56
+signal IO_PAD57
+signal IO_PAD58
+signal IO_PAD60
+signal IO_PAD62
+signal IO_PAD63
+signal IO_PAD64
+signal IO_PAD66
+signal IO_PAD67
+signal IO_PAD68
+signal IO_PAD69
+signal IO_PAD70
+signal IO_PAD72
+signal IO_PAD73
+signal IO_PAD74
+signal IO_PAD76
+signal IO_PAD77
+signal IO_PAD78
+signal IO_PAD80
+signal IO_PAD82
+signal IO_PAD84
+signal IO_PAD86
+signal IO_PAD87
+signal IO_PAD88
+signal IO_PAD89
+signal IO_PAD90
+signal IO_PAD92
+signal IO_PAD94
+signal IO_PAD95
+signal IO_PAD96
+signal IO_PAD97
+signal IO_PAD98
+signal IO_PAD100
+signal IO_PAD101
+signal IO_PAD102
+signal IO_PAD104
+signal IO_PAD105
+signal IO_PAD106
+signal IO_PAD108
+signal IO_PAD109
+signal IO_PAD110
+signal IO_PAD111
+signal IO_PAD116
+signal IO_PAD117
+signal IO_PAD118
+signal IO_PAD120
+signal IO_PAD121
+signal IO_PAD122
+signal IO_PAD123
+signal IO_PAD124
+signal IO_PAD126
+signal IO_PAD128
+signal IO_PAD129
+signal IO_PAD130
+signal IO_PAD131
+signal IO_PAD132
+signal IO_PAD134
+signal IO_PAD136
+signal IO_PAD138
+signal IO_PAD140
+signal IO_PAD141
+signal IO_PAD142
+signal IO_PAD144
+signal IO_PAD146
+signal IO_PAD147
+signal IO_PAD148
+signal IO_PAD149
+signal IO_PAD150
+signal IO_PAD152
+signal IO_PAD153
+signal IO_PAD154
+signal IO_PAD155
+signal IO_PAD156
+signal IO_PAD158
+signal IO_PAD159
+signal IO_PAD160
+signal IO_PAD162
+signal IO_PAD164
+signal IO_PAD165
+signal IO_PAD166
+signal IO_PAD167
+signal IO_PAD168
+signal IO_PAD170
+signal IO_PAD172
+signal IO_PAD174
+signal IO_PAD176
+signal IO_PAD177
+signal IO_PAD178
+signal IO_PAD180
+signal IO_PAD182
+signal IO_PAD183
+signal IO_PAD184
+signal IO_PAD185
+signal IO_PAD186
+signal IO_PAD187
+signal IO_PAD188
+signal IO_PAD190
+signal IO_PAD192
+signal IO_PAD193
+signal IO_PAD194
+signal IO_PAD195
+signal IO_PAD196
+signal IO_PAD198
+signal IO_PAD200
+signal IO_PAD202
+signal IO_PAD204
+signal IO_PAD205
+signal IO_PAD206
+signal IO_PAD208
+signal IO_PAD209
+signal IO_PAD210
+signal IO_PAD212
+signal IO_PAD214
+signal IO_PAD215
+signal IO_PAD217
+signal IO_PAD218
+signal IO_PAD220
+signal IO_PAD222
+signal IO_PAD223
+signal IO_PAD224
+signal IO_PAD226
+signal IO_PAD227
+signal IO_PAD228
+signal IO_PAD230
+signal IO_PAD232
+signal IO_PAD234
+signal IO_PAD236
+signal IO_PAD237
+signal IO_PAD238
+signal IO_PAD239
+signal IO_PAD240
+signal IO_PAD242
+signal IO_PAD244
+signal IO_PAD245
+signal IO_PAD246
+signal IO_PAD247
+signal IO_PAD248
+signal IO_PAD249
+signal IO_PAD250
+signal IO_PAD252
+signal IO_PAD254
+signal IO_PAD255
+signal IO_PAD256
+signal IO_PAD258
+signal IO_PAD260
+signal IO_PAD262
+signal IO_PAD264
+signal IO_PAD265
+signal IO_PAD266
+signal IO_PAD267
+signal IO_PAD268
+signal IO_PAD270
+signal IO_PAD272
+signal IO_PAD273
+signal IO_PAD274
+signal IO_PAD276
+signal IO_PAD277
+signal IO_PAD278
+signal IO_PAD279
+signal IO_PAD280
+signal IO_PAD282
+signal IO_PAD283
+signal IO_PAD284
+signal IO_PAD285
+signal IO_PAD286
+signal IO_PAD288
+signal IO_PAD290
+signal IO_PAD291
+signal IO_PAD292
+signal IO_PAD294
+signal IO_PAD296
+signal IO_PAD298
+signal IO_PAD300
+signal IO_PAD301
+signal IO_PAD302
+signal IO_PAD303
+signal IO_PAD304
+signal IO_PAD306
+signal IO_PAD308
+signal IO_PAD309
+signal IO_PAD310
+signal IO_PAD311
+signal IO_PAD312
+signal IO_PAD314
+signal IO_PAD315
+signal IO_PAD316
+signal IO_PAD321
+signal IO_PAD322
+signal IO_PAD323
+signal IO_PAD324
+signal IO_PAD326
+signal IO_PAD327
+signal IO_PAD328
+signal IO_PAD330
+signal IO_PAD331
+signal IO_PAD332
+signal IO_PAD334
+signal IO_PAD335
+signal IO_PAD336
+signal IO_PAD337
+signal IO_PAD338
+signal IO_PAD340
+signal IO_PAD342
+signal IO_PAD343
+signal IO_PAD344
+signal IO_PAD345
+signal IO_PAD346
+signal IO_PAD348
+signal IO_PAD350
+signal IO_PAD352
+signal IO_PAD354
+signal IO_PAD355
+signal IO_PAD356
+signal IO_PAD358
+signal IO_PAD359
+signal IO_PAD360
+signal IO_PAD362
+signal IO_PAD363
+signal IO_PAD364
+signal IO_PAD365
+signal IO_PAD366
+signal IO_PAD368
+signal IO_PAD369
+signal IO_PAD370
+signal IO_PAD372
+signal IO_PAD374
+signal IO_PAD375
+signal IO_PAD376
+signal IO_PAD377
+signal IO_PAD378
+signal IO_PAD380
+signal IO_PAD382
+signal IO_PAD384
+signal IO_PAD386
+signal IO_PAD387
+signal IO_PAD388
+signal IO_PAD390
+signal IO_PAD391
+signal IO_PAD392
+signal IO_PAD394
+signal IO_PAD396
+signal IO_PAD397
+signal IO_PAD398
+signal IO_PAD399
+signal IO_PAD400
+signal IO_PAD401
+signal IO_PAD402
+signal IO_PAD404
+signal IO_PAD406
+signal IO_PAD407
+signal IO_PAD408
+signal IO_PAD409
+signal IO_PAD410
+signal IO_PAD412
+signal IO_PAD414
+signal IO_PAD416
+signal IO_PAD418
+signal IO_PAD419
+signal IO_PAD420
+signal IO_PAD422
+signal IO_PAD423
+signal IO_PAD424
+signal IO_PAD426
+signal IO_PAD428
+signal IO_PAD429
+signal IO_PAD430
+signal IO_PAD432
+signal IO_PAD433
+signal IO_PAD434
+signal IO_PAD436
+signal IO_PAD438
+signal IO_PAD439
+signal IO_PAD440
+signal IO_PAD442
+signal IO_PAD443
+signal IO_PAD444
+signal IO_PAD446
+signal IO_PAD448
+signal IO_PAD450
+signal IO_PAD452
+signal IO_PAD453
+signal IO_PAD454
+signal IO_PAD455
+signal IO_PAD456
+signal IO_PAD458
+signal IO_PAD460
+signal IO_PAD461
+signal IO_PAD462
+signal IO_PAD463
+signal IO_PAD464
+signal IO_PAD465
+signal IO_PAD466
+signal IO_PAD468
+signal IO_PAD470
+signal IO_PAD471
+signal IO_PAD472
+signal IO_PAD474
+signal IO_PAD475
+signal IO_PAD476
+signal IO_PAD478
+signal IO_PAD480
+signal IO_PAD482
+signal IO_PAD484
+signal IO_PAD485
+signal IO_PAD486
+signal IO_PAD487
+signal IO_PAD488
+signal IO_PAD490
+signal IO_PAD492
+signal IO_PAD493
+signal IO_PAD494
+signal IO_PAD496
+signal IO_PAD497
+signal IO_PAD498
+signal IO_PAD499
+signal IO_PAD500
+signal IO_PAD502
+signal IO_PAD503
+signal IO_PAD504
+signal IO_PAD506
+signal IO_PAD507
+signal IO_PAD508
+signal IO_PAD510
+signal IO_PAD512
+signal IO_PAD514
+signal IO_PAD516
+signal IO_PAD517
+signal IO_PAD518
+signal IO_PAD519
+signal IO_PAD520
+signal IO_PAD522
+signal IO_PAD524
+signal IO_PAD525
+signal IO_PAD526
+signal IO_PAD527
+signal IO_PAD528
+signal IO_PAD530
+signal IO_PAD531
+signal IO_PAD532
+signal IO_PAD534
+signal IO_PAD535
+signal IO_PAD536
+signal IO_PAD538
+signal IO_PAD539
+signal IO_PAD540
+signal IO_PAD541
+signal IO_PAD547
+signal IO_PAD548
+signal IO_PAD549
+signal IO_PAD551
+signal IO_PAD552
+signal IO_PAD553
+signal IO_PAD554
+signal IO_PAD555
+signal IO_PAD557
+signal IO_PAD559
+signal IO_PAD560
+signal IO_PAD561
+signal IO_PAD562
+signal IO_PAD563
+signal IO_PAD565
+signal IO_PAD567
+signal IO_PAD569
+signal IO_PAD571
+signal IO_PAD572
+signal IO_PAD573
+signal IO_PAD575
+signal IO_PAD577
+signal IO_PAD578
+signal IO_PAD579
+signal IO_PAD580
+signal IO_PAD581
+signal IO_PAD583
+signal IO_PAD584
+signal IO_PAD585
+signal IO_PAD586
+signal IO_PAD587
+signal IO_PAD589
+signal IO_PAD590
+signal IO_PAD591
+signal IO_PAD593
+signal IO_PAD595
+signal IO_PAD596
+signal IO_PAD597
+signal IO_PAD598
+signal IO_PAD599
+signal IO_PAD601
+signal IO_PAD603
+signal IO_PAD605
+signal IO_PAD607
+signal IO_PAD608
+signal IO_PAD609
+signal IO_PAD611
+signal IO_PAD613
+signal IO_PAD614
+signal IO_PAD615
+signal IO_PAD616
+signal IO_PAD617
+signal IO_PAD618
+signal IO_PAD619
+signal IO_PAD621
+signal IO_PAD623
+signal IO_PAD624
+signal IO_PAD625
+signal IO_PAD626
+signal IO_PAD627
+signal IO_PAD629
+signal IO_PAD631
+signal IO_PAD633
+signal IO_PAD635
+signal IO_PAD636
+signal IO_PAD637
+signal IO_PAD639
+signal IO_PAD640
+signal IO_PAD641
+signal IO_PAD643
+signal IO_PAD645
+signal IO_PAD646
+signal IO_PAD648
+signal IO_PAD649
+signal IO_PAD651
+signal IO_PAD653
+signal IO_PAD654
+signal IO_PAD655
+signal IO_PAD657
+signal IO_PAD658
+signal IO_PAD659
+signal IO_PAD661
+signal IO_PAD663
+signal IO_PAD665
+signal IO_PAD667
+signal IO_PAD668
+signal IO_PAD669
+signal IO_PAD670
+signal IO_PAD671
+signal IO_PAD673
+signal IO_PAD675
+signal IO_PAD676
+signal IO_PAD677
+signal IO_PAD678
+signal IO_PAD679
+signal IO_PAD680
+signal IO_PAD681
+signal IO_PAD683
+signal IO_PAD685
+signal IO_PAD686
+signal IO_PAD687
+signal IO_PAD689
+signal IO_PAD691
+signal IO_PAD693
+signal IO_PAD695
+signal IO_PAD696
+signal IO_PAD697
+signal IO_PAD698
+signal IO_PAD699
+signal IO_PAD701
+signal IO_PAD703
+signal IO_PAD704
+signal IO_PAD705
+signal IO_PAD707
+signal IO_PAD708
+signal IO_PAD709
+signal IO_PAD710
+signal IO_PAD711
+signal IO_PAD713
+signal IO_PAD714
+signal IO_PAD715
+signal IO_PAD716
+signal IO_PAD717
+signal IO_PAD719
+signal IO_PAD721
+signal IO_PAD722
+signal IO_PAD723
+signal IO_PAD725
+signal IO_PAD727
+signal IO_PAD729
+signal IO_PAD731
+signal IO_PAD732
+signal IO_PAD733
+signal IO_PAD734
+signal IO_PAD735
+signal IO_PAD737
+signal IO_PAD739
+signal IO_PAD740
+signal IO_PAD741
+signal IO_PAD742
+signal IO_PAD743
+signal IO_PAD745
+signal IO_PAD746
+signal IO_PAD747
+signal IO_PAD752
+signal IO_PAD753
+signal IO_PAD754
+signal IO_PAD755
+signal IO_PAD757
+signal IO_PAD758
+signal IO_PAD759
+signal IO_PAD761
+signal IO_PAD762
+signal IO_PAD763
+signal IO_PAD765
+signal IO_PAD766
+signal IO_PAD767
+signal IO_PAD768
+signal IO_PAD769
+signal IO_PAD771
+signal IO_PAD773
+signal IO_PAD774
+signal IO_PAD775
+signal IO_PAD776
+signal IO_PAD777
+signal IO_PAD779
+signal IO_PAD781
+signal IO_PAD783
+signal IO_PAD785
+signal IO_PAD786
+signal IO_PAD787
+signal IO_PAD789
+signal IO_PAD790
+signal IO_PAD791
+signal IO_PAD793
+signal IO_PAD794
+signal IO_PAD795
+signal IO_PAD796
+signal IO_PAD797
+signal IO_PAD799
+signal IO_PAD800
+signal IO_PAD801
+signal IO_PAD803
+signal IO_PAD805
+signal IO_PAD806
+signal IO_PAD807
+signal IO_PAD808
+signal IO_PAD809
+signal IO_PAD811
+signal IO_PAD813
+signal IO_PAD815
+signal IO_PAD817
+signal IO_PAD818
+signal IO_PAD819
+signal IO_PAD821
+signal IO_PAD822
+signal IO_PAD823
+signal IO_PAD825
+signal IO_PAD827
+signal IO_PAD828
+signal IO_PAD829
+signal IO_PAD830
+signal IO_PAD831
+signal IO_PAD832
+signal IO_PAD833
+signal IO_PAD835
+signal IO_PAD837
+signal IO_PAD838
+signal IO_PAD839
+signal IO_PAD840
+signal IO_PAD841
+signal IO_PAD843
+signal IO_PAD845
+signal IO_PAD847
+signal IO_PAD849
+signal IO_PAD850
+signal IO_PAD851
+signal IO_PAD853
+signal IO_PAD854
+signal IO_PAD855
+signal IO_PAD857
+signal IO_PAD859
+signal IO_PAD860
+
+register BSR 1931
+register BR 1
+register DIR 32
+
+instruction length 6
+
+instruction EXTEST 000000 BSR
+instruction SAMPLE/PRELOAD 000001 BSR
+instruction IDCODE 001001 DIR
+instruction BYPASS 111111 BR
+
+bit 1930 I 1 IO_PAD747
+bit 1929 O 1 IO_PAD747 1928 1 Z
+bit 1928 C 1 *
+bit 1927 I 1 IO_PAD746
+bit 1926 O 1 IO_PAD746 1925 1 Z
+bit 1925 C 1 *
+bit 1924 I 1 IO_PAD745
+bit 1923 O 1 IO_PAD745 1922 1 Z
+bit 1922 C 1 *
+bit 1921 I 1 IO_PAD743
+bit 1920 O 1 IO_PAD743 1919 1 Z
+bit 1919 C 1 *
+bit 1918 I 1 IO_PAD742
+bit 1917 O 1 IO_PAD742 1916 1 Z
+bit 1916 C 1 *
+bit 1915 I 1 IO_PAD741
+bit 1914 O 1 IO_PAD741 1913 1 Z
+bit 1913 C 1 *
+bit 1912 I 1 IO_PAD740
+bit 1911 O 1 IO_PAD740 1910 1 Z
+bit 1910 C 1 *
+bit 1909 I 1 IO_PAD739
+bit 1908 O 1 IO_PAD739 1907 1 Z
+bit 1907 C 1 *
+bit 1906 I 1 IO_PAD737
+bit 1905 O 1 IO_PAD737 1904 1 Z
+bit 1904 C 1 *
+bit 1903 I 1 IO_PAD735
+bit 1902 O 1 IO_PAD735 1901 1 Z
+bit 1901 C 1 *
+bit 1900 I 1 IO_PAD734
+bit 1899 O 1 IO_PAD734 1898 1 Z
+bit 1898 C 1 *
+bit 1897 I 1 IO_PAD733
+bit 1896 O 1 IO_PAD733 1895 1 Z
+bit 1895 C 1 *
+bit 1894 I 1 IO_PAD732
+bit 1893 O 1 IO_PAD732 1892 1 Z
+bit 1892 C 1 *
+bit 1891 I 1 IO_PAD731
+bit 1890 O 1 IO_PAD731 1889 1 Z
+bit 1889 C 1 *
+bit 1888 I 1 IO_PAD729
+bit 1887 O 1 IO_PAD729 1886 1 Z
+bit 1886 C 1 *
+bit 1885 I 1 IO_PAD727
+bit 1884 O 1 IO_PAD727 1883 1 Z
+bit 1883 C 1 *
+bit 1882 I 1 IO_PAD725
+bit 1881 O 1 IO_PAD725 1880 1 Z
+bit 1880 C 1 *
+bit 1879 I 1 IO_PAD723
+bit 1878 O 1 IO_PAD723 1877 1 Z
+bit 1877 C 1 *
+bit 1876 I 1 IO_PAD722
+bit 1875 O 1 IO_PAD722 1874 1 Z
+bit 1874 C 1 *
+bit 1873 I 1 IO_PAD721
+bit 1872 O 1 IO_PAD721 1871 1 Z
+bit 1871 C 1 *
+bit 1870 I 1 IO_PAD719
+bit 1869 O 1 IO_PAD719 1868 1 Z
+bit 1868 C 1 *
+bit 1867 I 1 IO_PAD717
+bit 1866 O 1 IO_PAD717 1865 1 Z
+bit 1865 C 1 *
+bit 1864 I 1 IO_PAD716
+bit 1863 O 1 IO_PAD716 1862 1 Z
+bit 1862 C 1 *
+bit 1861 I 1 IO_PAD715
+bit 1860 O 1 IO_PAD715 1859 1 Z
+bit 1859 C 1 *
+bit 1858 I 1 IO_PAD714
+bit 1857 O 1 IO_PAD714 1856 1 Z
+bit 1856 C 1 *
+bit 1855 I 1 IO_PAD713
+bit 1854 O 1 IO_PAD713 1853 1 Z
+bit 1853 C 1 *
+bit 1852 I 1 IO_PAD711
+bit 1851 O 1 IO_PAD711 1850 1 Z
+bit 1850 C 1 *
+bit 1849 I 1 IO_PAD710
+bit 1848 O 1 IO_PAD710 1847 1 Z
+bit 1847 C 1 *
+bit 1846 I 1 IO_PAD709
+bit 1845 O 1 IO_PAD709 1844 1 Z
+bit 1844 C 1 *
+bit 1843 I 1 IO_PAD708
+bit 1842 O 1 IO_PAD708 1841 1 Z
+bit 1841 C 1 *
+bit 1840 I 1 IO_PAD707
+bit 1839 O 1 IO_PAD707 1838 1 Z
+bit 1838 C 1 *
+bit 1837 I 1 IO_PAD705
+bit 1836 O 1 IO_PAD705 1835 1 Z
+bit 1835 C 1 *
+bit 1834 I 1 IO_PAD704
+bit 1833 O 1 IO_PAD704 1832 1 Z
+bit 1832 C 1 *
+bit 1831 I 1 IO_PAD703
+bit 1830 O 1 IO_PAD703 1829 1 Z
+bit 1829 C 1 *
+bit 1828 O 1 *
+bit 1827 O 1 *
+bit 1826 O 1 *
+bit 1825 O 1 *
+bit 1824 O 1 *
+bit 1823 O 1 *
+bit 1822 I 1 IO_PAD701
+bit 1821 O 1 IO_PAD701 1820 1 Z
+bit 1820 C 1 *
+bit 1819 I 1 IO_PAD699
+bit 1818 O 1 IO_PAD699 1817 1 Z
+bit 1817 C 1 *
+bit 1816 I 1 IO_PAD698
+bit 1815 O 1 IO_PAD698 1814 1 Z
+bit 1814 C 1 *
+bit 1813 I 1 IO_PAD697
+bit 1812 O 1 IO_PAD697 1811 1 Z
+bit 1811 C 1 *
+bit 1810 I 1 IO_PAD696
+bit 1809 O 1 IO_PAD696 1808 1 Z
+bit 1808 C 1 *
+bit 1807 I 1 IO_PAD695
+bit 1806 O 1 IO_PAD695 1805 1 Z
+bit 1805 C 1 *
+bit 1804 I 1 IO_PAD693
+bit 1803 O 1 IO_PAD693 1802 1 Z
+bit 1802 C 1 *
+bit 1801 I 1 IO_PAD691
+bit 1800 O 1 IO_PAD691 1799 1 Z
+bit 1799 C 1 *
+bit 1798 I 1 IO_PAD689
+bit 1797 O 1 IO_PAD689 1796 1 Z
+bit 1796 C 1 *
+bit 1795 I 1 IO_PAD687
+bit 1794 O 1 IO_PAD687 1793 1 Z
+bit 1793 C 1 *
+bit 1792 I 1 IO_PAD686
+bit 1791 O 1 IO_PAD686 1790 1 Z
+bit 1790 C 1 *
+bit 1789 I 1 IO_PAD685
+bit 1788 O 1 IO_PAD685 1787 1 Z
+bit 1787 C 1 *
+bit 1786 O 1 *
+bit 1785 O 1 *
+bit 1784 O 1 *
+bit 1783 O 1 *
+bit 1782 O 1 *
+bit 1781 O 1 *
+bit 1780 I 1 IO_PAD683
+bit 1779 O 1 IO_PAD683 1778 1 Z
+bit 1778 C 1 *
+bit 1777 I 1 IO_PAD681
+bit 1776 O 1 IO_PAD681 1775 1 Z
+bit 1775 C 1 *
+bit 1774 I 1 IO_PAD680
+bit 1773 O 1 IO_PAD680 1772 1 Z
+bit 1772 C 1 *
+bit 1771 I 1 IO_PAD679
+bit 1770 O 1 IO_PAD679 1769 1 Z
+bit 1769 C 1 *
+bit 1768 I 1 IO_PAD678
+bit 1767 O 1 IO_PAD678 1766 1 Z
+bit 1766 C 1 *
+bit 1765 I 1 IO_PAD677
+bit 1764 O 1 IO_PAD677 1763 1 Z
+bit 1763 C 1 *
+bit 1762 I 1 IO_PAD676
+bit 1761 O 1 IO_PAD676 1760 1 Z
+bit 1760 C 1 *
+bit 1759 I 1 IO_PAD675
+bit 1758 O 1 IO_PAD675 1757 1 Z
+bit 1757 C 1 *
+bit 1756 O 1 *
+bit 1755 O 1 *
+bit 1754 O 1 *
+bit 1753 O 1 *
+bit 1752 O 1 *
+bit 1751 O 1 *
+bit 1750 I 1 IO_PAD673
+bit 1749 O 1 IO_PAD673 1748 1 Z
+bit 1748 C 1 *
+bit 1747 I 1 IO_PAD671
+bit 1746 O 1 IO_PAD671 1745 1 Z
+bit 1745 C 1 *
+bit 1744 I 1 IO_PAD670
+bit 1743 O 1 IO_PAD670 1742 1 Z
+bit 1742 C 1 *
+bit 1741 I 1 IO_PAD669
+bit 1740 O 1 IO_PAD669 1739 1 Z
+bit 1739 C 1 *
+bit 1738 I 1 IO_PAD668
+bit 1737 O 1 IO_PAD668 1736 1 Z
+bit 1736 C 1 *
+bit 1735 I 1 IO_PAD667
+bit 1734 O 1 IO_PAD667 1733 1 Z
+bit 1733 C 1 *
+bit 1732 I 1 IO_PAD665
+bit 1731 O 1 IO_PAD665 1730 1 Z
+bit 1730 C 1 *
+bit 1729 I 1 IO_PAD663
+bit 1728 O 1 IO_PAD663 1727 1 Z
+bit 1727 C 1 *
+bit 1726 I 1 IO_PAD661
+bit 1725 O 1 IO_PAD661 1724 1 Z
+bit 1724 C 1 *
+bit 1723 I 1 IO_PAD659
+bit 1722 O 1 IO_PAD659 1721 1 Z
+bit 1721 C 1 *
+bit 1720 O 1 *
+bit 1719 O 1 *
+bit 1718 O 1 *
+bit 1717 O 1 *
+bit 1716 O 1 *
+bit 1715 O 1 *
+bit 1714 I 1 IO_PAD658
+bit 1713 O 1 IO_PAD658 1712 1 Z
+bit 1712 C 1 *
+bit 1711 I 1 IO_PAD657
+bit 1710 O 1 IO_PAD657 1709 1 Z
+bit 1709 C 1 *
+bit 1708 I 1 IO_PAD655
+bit 1707 O 1 IO_PAD655 1706 1 Z
+bit 1706 C 1 *
+bit 1705 I 1 IO_PAD654
+bit 1704 O 1 IO_PAD654 1703 1 Z
+bit 1703 C 1 *
+bit 1702 I 1 IO_PAD653
+bit 1701 O 1 IO_PAD653 1700 1 Z
+bit 1700 C 1 *
+bit 1699 I 1 IO_PAD651
+bit 1698 O 1 IO_PAD651 1697 1 Z
+bit 1697 C 1 *
+bit 1696 I 1 IO_PAD649
+bit 1695 O 1 IO_PAD649 1694 1 Z
+bit 1694 C 1 *
+bit 1693 I 1 IO_PAD648
+bit 1692 O 1 IO_PAD648 1691 1 Z
+bit 1691 C 1 *
+bit 1690 I 1 IO_PAD646
+bit 1689 O 1 IO_PAD646 1688 1 Z
+bit 1688 C 1 *
+bit 1687 I 1 IO_PAD645
+bit 1686 O 1 IO_PAD645 1685 1 Z
+bit 1685 C 1 *
+bit 1684 I 1 IO_PAD643
+bit 1683 O 1 IO_PAD643 1682 1 Z
+bit 1682 C 1 *
+bit 1681 I 1 IO_PAD641
+bit 1680 O 1 IO_PAD641 1679 1 Z
+bit 1679 C 1 *
+bit 1678 I 1 IO_PAD640
+bit 1677 O 1 IO_PAD640 1676 1 Z
+bit 1676 C 1 *
+bit 1675 I 1 IO_PAD639
+bit 1674 O 1 IO_PAD639 1673 1 Z
+bit 1673 C 1 *
+bit 1672 I 1 IO_PAD637
+bit 1671 O 1 IO_PAD637 1670 1 Z
+bit 1670 C 1 *
+bit 1669 I 1 IO_PAD636
+bit 1668 O 1 IO_PAD636 1667 1 Z
+bit 1667 C 1 *
+bit 1666 O 1 *
+bit 1665 O 1 *
+bit 1664 O 1 *
+bit 1663 O 1 *
+bit 1662 O 1 *
+bit 1661 O 1 *
+bit 1660 I 1 IO_PAD635
+bit 1659 O 1 IO_PAD635 1658 1 Z
+bit 1658 C 1 *
+bit 1657 I 1 IO_PAD633
+bit 1656 O 1 IO_PAD633 1655 1 Z
+bit 1655 C 1 *
+bit 1654 I 1 IO_PAD631
+bit 1653 O 1 IO_PAD631 1652 1 Z
+bit 1652 C 1 *
+bit 1651 I 1 IO_PAD629
+bit 1650 O 1 IO_PAD629 1649 1 Z
+bit 1649 C 1 *
+bit 1648 I 1 IO_PAD627
+bit 1647 O 1 IO_PAD627 1646 1 Z
+bit 1646 C 1 *
+bit 1645 I 1 IO_PAD626
+bit 1644 O 1 IO_PAD626 1643 1 Z
+bit 1643 C 1 *
+bit 1642 I 1 IO_PAD625
+bit 1641 O 1 IO_PAD625 1640 1 Z
+bit 1640 C 1 *
+bit 1639 I 1 IO_PAD624
+bit 1638 O 1 IO_PAD624 1637 1 Z
+bit 1637 C 1 *
+bit 1636 I 1 IO_PAD623
+bit 1635 O 1 IO_PAD623 1634 1 Z
+bit 1634 C 1 *
+bit 1633 I 1 IO_PAD621
+bit 1632 O 1 IO_PAD621 1631 1 Z
+bit 1631 C 1 *
+bit 1630 O 1 *
+bit 1629 O 1 *
+bit 1628 O 1 *
+bit 1627 O 1 *
+bit 1626 O 1 *
+bit 1625 O 1 *
+bit 1624 I 1 IO_PAD619
+bit 1623 O 1 IO_PAD619 1622 1 Z
+bit 1622 C 1 *
+bit 1621 I 1 IO_PAD618
+bit 1620 O 1 IO_PAD618 1619 1 Z
+bit 1619 C 1 *
+bit 1618 I 1 IO_PAD617
+bit 1617 O 1 IO_PAD617 1616 1 Z
+bit 1616 C 1 *
+bit 1615 I 1 IO_PAD616
+bit 1614 O 1 IO_PAD616 1613 1 Z
+bit 1613 C 1 *
+bit 1612 I 1 IO_PAD615
+bit 1611 O 1 IO_PAD615 1610 1 Z
+bit 1610 C 1 *
+bit 1609 I 1 IO_PAD614
+bit 1608 O 1 IO_PAD614 1607 1 Z
+bit 1607 C 1 *
+bit 1606 I 1 IO_PAD613
+bit 1605 O 1 IO_PAD613 1604 1 Z
+bit 1604 C 1 *
+bit 1603 I 1 IO_PAD611
+bit 1602 O 1 IO_PAD611 1601 1 Z
+bit 1601 C 1 *
+bit 1600 O 1 *
+bit 1599 O 1 *
+bit 1598 O 1 *
+bit 1597 O 1 *
+bit 1596 O 1 *
+bit 1595 O 1 *
+bit 1594 I 1 IO_PAD609
+bit 1593 O 1 IO_PAD609 1592 1 Z
+bit 1592 C 1 *
+bit 1591 I 1 IO_PAD608
+bit 1590 O 1 IO_PAD608 1589 1 Z
+bit 1589 C 1 *
+bit 1588 I 1 IO_PAD607
+bit 1587 O 1 IO_PAD607 1586 1 Z
+bit 1586 C 1 *
+bit 1585 I 1 IO_PAD605
+bit 1584 O 1 IO_PAD605 1583 1 Z
+bit 1583 C 1 *
+bit 1582 I 1 IO_PAD603
+bit 1581 O 1 IO_PAD603 1580 1 Z
+bit 1580 C 1 *
+bit 1579 I 1 IO_PAD601
+bit 1578 O 1 IO_PAD601 1577 1 Z
+bit 1577 C 1 *
+bit 1576 I 1 IO_PAD599
+bit 1575 O 1 IO_PAD599 1574 1 Z
+bit 1574 C 1 *
+bit 1573 I 1 IO_PAD598
+bit 1572 O 1 IO_PAD598 1571 1 Z
+bit 1571 C 1 *
+bit 1570 I 1 IO_PAD597
+bit 1569 O 1 IO_PAD597 1568 1 Z
+bit 1568 C 1 *
+bit 1567 I 1 IO_PAD596
+bit 1566 O 1 IO_PAD596 1565 1 Z
+bit 1565 C 1 *
+bit 1564 I 1 IO_PAD595
+bit 1563 O 1 IO_PAD595 1562 1 Z
+bit 1562 C 1 *
+bit 1561 I 1 IO_PAD593
+bit 1560 O 1 IO_PAD593 1559 1 Z
+bit 1559 C 1 *
+bit 1558 O 1 *
+bit 1557 O 1 *
+bit 1556 O 1 *
+bit 1555 O 1 *
+bit 1554 O 1 *
+bit 1553 O 1 *
+bit 1552 I 1 IO_PAD591
+bit 1551 O 1 IO_PAD591 1550 1 Z
+bit 1550 C 1 *
+bit 1549 I 1 IO_PAD590
+bit 1548 O 1 IO_PAD590 1547 1 Z
+bit 1547 C 1 *
+bit 1546 I 1 IO_PAD589
+bit 1545 O 1 IO_PAD589 1544 1 Z
+bit 1544 C 1 *
+bit 1543 I 1 IO_PAD587
+bit 1542 O 1 IO_PAD587 1541 1 Z
+bit 1541 C 1 *
+bit 1540 I 1 IO_PAD586
+bit 1539 O 1 IO_PAD586 1538 1 Z
+bit 1538 C 1 *
+bit 1537 I 1 IO_PAD585
+bit 1536 O 1 IO_PAD585 1535 1 Z
+bit 1535 C 1 *
+bit 1534 I 1 IO_PAD584
+bit 1533 O 1 IO_PAD584 1532 1 Z
+bit 1532 C 1 *
+bit 1531 I 1 IO_PAD583
+bit 1530 O 1 IO_PAD583 1529 1 Z
+bit 1529 C 1 *
+bit 1528 I 1 IO_PAD581
+bit 1527 O 1 IO_PAD581 1526 1 Z
+bit 1526 C 1 *
+bit 1525 I 1 IO_PAD580
+bit 1524 O 1 IO_PAD580 1523 1 Z
+bit 1523 C 1 *
+bit 1522 I 1 IO_PAD579
+bit 1521 O 1 IO_PAD579 1520 1 Z
+bit 1520 C 1 *
+bit 1519 I 1 IO_PAD578
+bit 1518 O 1 IO_PAD578 1517 1 Z
+bit 1517 C 1 *
+bit 1516 I 1 IO_PAD577
+bit 1515 O 1 IO_PAD577 1514 1 Z
+bit 1514 C 1 *
+bit 1513 I 1 IO_PAD575
+bit 1512 O 1 IO_PAD575 1511 1 Z
+bit 1511 C 1 *
+bit 1510 I 1 IO_PAD573
+bit 1509 O 1 IO_PAD573 1508 1 Z
+bit 1508 C 1 *
+bit 1507 I 1 IO_PAD572
+bit 1506 O 1 IO_PAD572 1505 1 Z
+bit 1505 C 1 *
+bit 1504 I 1 IO_PAD571
+bit 1503 O 1 IO_PAD571 1502 1 Z
+bit 1502 C 1 *
+bit 1501 I 1 IO_PAD569
+bit 1500 O 1 IO_PAD569 1499 1 Z
+bit 1499 C 1 *
+bit 1498 I 1 IO_PAD567
+bit 1497 O 1 IO_PAD567 1496 1 Z
+bit 1496 C 1 *
+bit 1495 I 1 IO_PAD565
+bit 1494 O 1 IO_PAD565 1493 1 Z
+bit 1493 C 1 *
+bit 1492 I 1 IO_PAD563
+bit 1491 O 1 IO_PAD563 1490 1 Z
+bit 1490 C 1 *
+bit 1489 I 1 IO_PAD562
+bit 1488 O 1 IO_PAD562 1487 1 Z
+bit 1487 C 1 *
+bit 1486 I 1 IO_PAD561
+bit 1485 O 1 IO_PAD561 1484 1 Z
+bit 1484 C 1 *
+bit 1483 I 1 IO_PAD560
+bit 1482 O 1 IO_PAD560 1481 1 Z
+bit 1481 C 1 *
+bit 1480 I 1 IO_PAD559
+bit 1479 O 1 IO_PAD559 1478 1 Z
+bit 1478 C 1 *
+bit 1477 I 1 IO_PAD557
+bit 1476 O 1 IO_PAD557 1475 1 Z
+bit 1475 C 1 *
+bit 1474 I 1 IO_PAD555
+bit 1473 O 1 IO_PAD555 1472 1 Z
+bit 1472 C 1 *
+bit 1471 I 1 IO_PAD554
+bit 1470 O 1 IO_PAD554 1469 1 Z
+bit 1469 C 1 *
+bit 1468 I 1 IO_PAD553
+bit 1467 O 1 IO_PAD553 1466 1 Z
+bit 1466 C 1 *
+bit 1465 I 1 IO_PAD552
+bit 1464 O 1 IO_PAD552 1463 1 Z
+bit 1463 C 1 *
+bit 1462 I 1 IO_PAD551
+bit 1461 O 1 IO_PAD551 1460 1 Z
+bit 1460 C 1 *
+bit 1459 I 1 IO_PAD549
+bit 1458 O 1 IO_PAD549 1457 1 Z
+bit 1457 C 1 *
+bit 1456 I 1 IO_PAD548
+bit 1455 O 1 IO_PAD548 1454 1 Z
+bit 1454 C 1 *
+bit 1453 I 1 IO_PAD547
+bit 1452 O 1 IO_PAD547 1451 1 Z
+bit 1451 C 1 *
+bit 1450 I 1 CCLK_PAD544
+bit 1449 O 1 CCLK_PAD544 1448 1 Z
+bit 1448 C 1 *
+bit 1447 I 1 DONE_PAD543
+bit 1446 O 1 DONE_PAD543 1445 1 Z
+bit 1445 C 1 *
+bit 1444 I 1 IO_PAD541
+bit 1443 O 1 IO_PAD541 1442 1 Z
+bit 1442 C 1 *
+bit 1441 I 1 IO_PAD540
+bit 1440 O 1 IO_PAD540 1439 1 Z
+bit 1439 C 1 *
+bit 1438 I 1 IO_PAD539
+bit 1437 O 1 IO_PAD539 1436 1 Z
+bit 1436 C 1 *
+bit 1435 I 1 IO_PAD538
+bit 1434 O 1 IO_PAD538 1433 1 Z
+bit 1433 C 1 *
+bit 1432 I 1 IO_PAD536
+bit 1431 O 1 IO_PAD536 1430 1 Z
+bit 1430 C 1 *
+bit 1429 I 1 IO_PAD535
+bit 1428 O 1 IO_PAD535 1427 1 Z
+bit 1427 C 1 *
+bit 1426 I 1 IO_PAD534
+bit 1425 O 1 IO_PAD534 1424 1 Z
+bit 1424 C 1 *
+bit 1423 I 1 IO_PAD532
+bit 1422 O 1 IO_PAD532 1421 1 Z
+bit 1421 C 1 *
+bit 1420 I 1 IO_PAD531
+bit 1419 O 1 IO_PAD531 1418 1 Z
+bit 1418 C 1 *
+bit 1417 I 1 IO_PAD530
+bit 1416 O 1 IO_PAD530 1415 1 Z
+bit 1415 C 1 *
+bit 1414 I 1 IO_PAD528
+bit 1413 O 1 IO_PAD528 1412 1 Z
+bit 1412 C 1 *
+bit 1411 I 1 IO_PAD527
+bit 1410 O 1 IO_PAD527 1409 1 Z
+bit 1409 C 1 *
+bit 1408 I 1 IO_PAD526
+bit 1407 O 1 IO_PAD526 1406 1 Z
+bit 1406 C 1 *
+bit 1405 I 1 IO_PAD525
+bit 1404 O 1 IO_PAD525 1403 1 Z
+bit 1403 C 1 *
+bit 1402 I 1 IO_PAD524
+bit 1401 O 1 IO_PAD524 1400 1 Z
+bit 1400 C 1 *
+bit 1399 I 1 IO_PAD522
+bit 1398 O 1 IO_PAD522 1397 1 Z
+bit 1397 C 1 *
+bit 1396 I 1 IO_PAD520
+bit 1395 O 1 IO_PAD520 1394 1 Z
+bit 1394 C 1 *
+bit 1393 I 1 IO_PAD519
+bit 1392 O 1 IO_PAD519 1391 1 Z
+bit 1391 C 1 *
+bit 1390 I 1 IO_PAD518
+bit 1389 O 1 IO_PAD518 1388 1 Z
+bit 1388 C 1 *
+bit 1387 I 1 IO_PAD517
+bit 1386 O 1 IO_PAD517 1385 1 Z
+bit 1385 C 1 *
+bit 1384 I 1 IO_PAD516
+bit 1383 O 1 IO_PAD516 1382 1 Z
+bit 1382 C 1 *
+bit 1381 I 1 IO_PAD514
+bit 1380 O 1 IO_PAD514 1379 1 Z
+bit 1379 C 1 *
+bit 1378 I 1 IO_PAD512
+bit 1377 O 1 IO_PAD512 1376 1 Z
+bit 1376 C 1 *
+bit 1375 I 1 IO_PAD510
+bit 1374 O 1 IO_PAD510 1373 1 Z
+bit 1373 C 1 *
+bit 1372 I 1 IO_PAD508
+bit 1371 O 1 IO_PAD508 1370 1 Z
+bit 1370 C 1 *
+bit 1369 I 1 IO_PAD507
+bit 1368 O 1 IO_PAD507 1367 1 Z
+bit 1367 C 1 *
+bit 1366 I 1 IO_PAD506
+bit 1365 O 1 IO_PAD506 1364 1 Z
+bit 1364 C 1 *
+bit 1363 I 1 IO_PAD504
+bit 1362 O 1 IO_PAD504 1361 1 Z
+bit 1361 C 1 *
+bit 1360 I 1 IO_PAD503
+bit 1359 O 1 IO_PAD503 1358 1 Z
+bit 1358 C 1 *
+bit 1357 I 1 IO_PAD502
+bit 1356 O 1 IO_PAD502 1355 1 Z
+bit 1355 C 1 *
+bit 1354 I 1 IO_PAD500
+bit 1353 O 1 IO_PAD500 1352 1 Z
+bit 1352 C 1 *
+bit 1351 I 1 IO_PAD499
+bit 1350 O 1 IO_PAD499 1349 1 Z
+bit 1349 C 1 *
+bit 1348 I 1 IO_PAD498
+bit 1347 O 1 IO_PAD498 1346 1 Z
+bit 1346 C 1 *
+bit 1345 I 1 IO_PAD497
+bit 1344 O 1 IO_PAD497 1343 1 Z
+bit 1343 C 1 *
+bit 1342 I 1 IO_PAD496
+bit 1341 O 1 IO_PAD496 1340 1 Z
+bit 1340 C 1 *
+bit 1339 I 1 IO_PAD494
+bit 1338 O 1 IO_PAD494 1337 1 Z
+bit 1337 C 1 *
+bit 1336 I 1 IO_PAD493
+bit 1335 O 1 IO_PAD493 1334 1 Z
+bit 1334 C 1 *
+bit 1333 I 1 IO_PAD492
+bit 1332 O 1 IO_PAD492 1331 1 Z
+bit 1331 C 1 *
+bit 1330 I 1 IO_PAD490
+bit 1329 O 1 IO_PAD490 1328 1 Z
+bit 1328 C 1 *
+bit 1327 I 1 IO_PAD488
+bit 1326 O 1 IO_PAD488 1325 1 Z
+bit 1325 C 1 *
+bit 1324 I 1 IO_PAD487
+bit 1323 O 1 IO_PAD487 1322 1 Z
+bit 1322 C 1 *
+bit 1321 I 1 IO_PAD486
+bit 1320 O 1 IO_PAD486 1319 1 Z
+bit 1319 C 1 *
+bit 1318 I 1 IO_PAD485
+bit 1317 O 1 IO_PAD485 1316 1 Z
+bit 1316 C 1 *
+bit 1315 I 1 IO_PAD484
+bit 1314 O 1 IO_PAD484 1313 1 Z
+bit 1313 C 1 *
+bit 1312 I 1 IO_PAD482
+bit 1311 O 1 IO_PAD482 1310 1 Z
+bit 1310 C 1 *
+bit 1309 I 1 IO_PAD480
+bit 1308 O 1 IO_PAD480 1307 1 Z
+bit 1307 C 1 *
+bit 1306 I 1 IO_PAD478
+bit 1305 O 1 IO_PAD478 1304 1 Z
+bit 1304 C 1 *
+bit 1303 I 1 IO_PAD476
+bit 1302 O 1 IO_PAD476 1301 1 Z
+bit 1301 C 1 *
+bit 1300 I 1 IO_PAD475
+bit 1299 O 1 IO_PAD475 1298 1 Z
+bit 1298 C 1 *
+bit 1297 I 1 IO_PAD474
+bit 1296 O 1 IO_PAD474 1295 1 Z
+bit 1295 C 1 *
+bit 1294 I 1 IO_PAD472
+bit 1293 O 1 IO_PAD472 1292 1 Z
+bit 1292 C 1 *
+bit 1291 I 1 IO_PAD471
+bit 1290 O 1 IO_PAD471 1289 1 Z
+bit 1289 C 1 *
+bit 1288 I 1 IO_PAD470
+bit 1287 O 1 IO_PAD470 1286 1 Z
+bit 1286 C 1 *
+bit 1285 I 1 IO_PAD468
+bit 1284 O 1 IO_PAD468 1283 1 Z
+bit 1283 C 1 *
+bit 1282 I 1 IO_PAD466
+bit 1281 O 1 IO_PAD466 1280 1 Z
+bit 1280 C 1 *
+bit 1279 I 1 IO_PAD465
+bit 1278 O 1 IO_PAD465 1277 1 Z
+bit 1277 C 1 *
+bit 1276 I 1 IO_PAD464
+bit 1275 O 1 IO_PAD464 1274 1 Z
+bit 1274 C 1 *
+bit 1273 I 1 IO_PAD463
+bit 1272 O 1 IO_PAD463 1271 1 Z
+bit 1271 C 1 *
+bit 1270 I 1 IO_PAD462
+bit 1269 O 1 IO_PAD462 1268 1 Z
+bit 1268 C 1 *
+bit 1267 I 1 IO_PAD461
+bit 1266 O 1 IO_PAD461 1265 1 Z
+bit 1265 C 1 *
+bit 1264 I 1 IO_PAD460
+bit 1263 O 1 IO_PAD460 1262 1 Z
+bit 1262 C 1 *
+bit 1261 I 1 IO_PAD458
+bit 1260 O 1 IO_PAD458 1259 1 Z
+bit 1259 C 1 *
+bit 1258 I 1 IO_PAD456
+bit 1257 O 1 IO_PAD456 1256 1 Z
+bit 1256 C 1 *
+bit 1255 I 1 IO_PAD455
+bit 1254 O 1 IO_PAD455 1253 1 Z
+bit 1253 C 1 *
+bit 1252 I 1 IO_PAD454
+bit 1251 O 1 IO_PAD454 1250 1 Z
+bit 1250 C 1 *
+bit 1249 I 1 IO_PAD453
+bit 1248 O 1 IO_PAD453 1247 1 Z
+bit 1247 C 1 *
+bit 1246 I 1 IO_PAD452
+bit 1245 O 1 IO_PAD452 1244 1 Z
+bit 1244 C 1 *
+bit 1243 I 1 IO_PAD450
+bit 1242 O 1 IO_PAD450 1241 1 Z
+bit 1241 C 1 *
+bit 1240 I 1 IO_PAD448
+bit 1239 O 1 IO_PAD448 1238 1 Z
+bit 1238 C 1 *
+bit 1237 I 1 IO_PAD446
+bit 1236 O 1 IO_PAD446 1235 1 Z
+bit 1235 C 1 *
+bit 1234 I 1 IO_PAD444
+bit 1233 O 1 IO_PAD444 1232 1 Z
+bit 1232 C 1 *
+bit 1231 I 1 IO_PAD443
+bit 1230 O 1 IO_PAD443 1229 1 Z
+bit 1229 C 1 *
+bit 1228 I 1 IO_PAD442
+bit 1227 O 1 IO_PAD442 1226 1 Z
+bit 1226 C 1 *
+bit 1225 I 1 IO_PAD440
+bit 1224 O 1 IO_PAD440 1223 1 Z
+bit 1223 C 1 *
+bit 1222 I 1 IO_PAD439
+bit 1221 O 1 IO_PAD439 1220 1 Z
+bit 1220 C 1 *
+bit 1219 I 1 IO_PAD438
+bit 1218 O 1 IO_PAD438 1217 1 Z
+bit 1217 C 1 *
+bit 1216 I 1 IO_PAD436
+bit 1215 O 1 IO_PAD436 1214 1 Z
+bit 1214 C 1 *
+bit 1213 I 1 IO_PAD434
+bit 1212 O 1 IO_PAD434 1211 1 Z
+bit 1211 C 1 *
+bit 1210 I 1 IO_PAD433
+bit 1209 O 1 IO_PAD433 1208 1 Z
+bit 1208 C 1 *
+bit 1207 I 1 IO_PAD432
+bit 1206 O 1 IO_PAD432 1205 1 Z
+bit 1205 C 1 *
+bit 1204 I 1 IO_PAD430
+bit 1203 O 1 IO_PAD430 1202 1 Z
+bit 1202 C 1 *
+bit 1201 I 1 IO_PAD429
+bit 1200 O 1 IO_PAD429 1199 1 Z
+bit 1199 C 1 *
+bit 1198 I 1 IO_PAD428
+bit 1197 O 1 IO_PAD428 1196 1 Z
+bit 1196 C 1 *
+bit 1195 I 1 IO_PAD426
+bit 1194 O 1 IO_PAD426 1193 1 Z
+bit 1193 C 1 *
+bit 1192 I 1 IO_PAD424
+bit 1191 O 1 IO_PAD424 1190 1 Z
+bit 1190 C 1 *
+bit 1189 I 1 IO_PAD423
+bit 1188 O 1 IO_PAD423 1187 1 Z
+bit 1187 C 1 *
+bit 1186 I 1 IO_PAD422
+bit 1185 O 1 IO_PAD422 1184 1 Z
+bit 1184 C 1 *
+bit 1183 I 1 IO_PAD420
+bit 1182 O 1 IO_PAD420 1181 1 Z
+bit 1181 C 1 *
+bit 1180 I 1 IO_PAD419
+bit 1179 O 1 IO_PAD419 1178 1 Z
+bit 1178 C 1 *
+bit 1177 I 1 IO_PAD418
+bit 1176 O 1 IO_PAD418 1175 1 Z
+bit 1175 C 1 *
+bit 1174 I 1 IO_PAD416
+bit 1173 O 1 IO_PAD416 1172 1 Z
+bit 1172 C 1 *
+bit 1171 I 1 IO_PAD414
+bit 1170 O 1 IO_PAD414 1169 1 Z
+bit 1169 C 1 *
+bit 1168 I 1 IO_PAD412
+bit 1167 O 1 IO_PAD412 1166 1 Z
+bit 1166 C 1 *
+bit 1165 I 1 IO_PAD410
+bit 1164 O 1 IO_PAD410 1163 1 Z
+bit 1163 C 1 *
+bit 1162 I 1 IO_PAD409
+bit 1161 O 1 IO_PAD409 1160 1 Z
+bit 1160 C 1 *
+bit 1159 I 1 IO_PAD408
+bit 1158 O 1 IO_PAD408 1157 1 Z
+bit 1157 C 1 *
+bit 1156 I 1 IO_PAD407
+bit 1155 O 1 IO_PAD407 1154 1 Z
+bit 1154 C 1 *
+bit 1153 I 1 IO_PAD406
+bit 1152 O 1 IO_PAD406 1151 1 Z
+bit 1151 C 1 *
+bit 1150 I 1 IO_PAD404
+bit 1149 O 1 IO_PAD404 1148 1 Z
+bit 1148 C 1 *
+bit 1147 I 1 IO_PAD402
+bit 1146 O 1 IO_PAD402 1145 1 Z
+bit 1145 C 1 *
+bit 1144 I 1 IO_PAD401
+bit 1143 O 1 IO_PAD401 1142 1 Z
+bit 1142 C 1 *
+bit 1141 I 1 IO_PAD400
+bit 1140 O 1 IO_PAD400 1139 1 Z
+bit 1139 C 1 *
+bit 1138 I 1 IO_PAD399
+bit 1137 O 1 IO_PAD399 1136 1 Z
+bit 1136 C 1 *
+bit 1135 I 1 IO_PAD398
+bit 1134 O 1 IO_PAD398 1133 1 Z
+bit 1133 C 1 *
+bit 1132 I 1 IO_PAD397
+bit 1131 O 1 IO_PAD397 1130 1 Z
+bit 1130 C 1 *
+bit 1129 I 1 IO_PAD396
+bit 1128 O 1 IO_PAD396 1127 1 Z
+bit 1127 C 1 *
+bit 1126 I 1 IO_PAD394
+bit 1125 O 1 IO_PAD394 1124 1 Z
+bit 1124 C 1 *
+bit 1123 I 1 IO_PAD392
+bit 1122 O 1 IO_PAD392 1121 1 Z
+bit 1121 C 1 *
+bit 1120 I 1 IO_PAD391
+bit 1119 O 1 IO_PAD391 1118 1 Z
+bit 1118 C 1 *
+bit 1117 I 1 IO_PAD390
+bit 1116 O 1 IO_PAD390 1115 1 Z
+bit 1115 C 1 *
+bit 1114 I 1 IO_PAD388
+bit 1113 O 1 IO_PAD388 1112 1 Z
+bit 1112 C 1 *
+bit 1111 I 1 IO_PAD387
+bit 1110 O 1 IO_PAD387 1109 1 Z
+bit 1109 C 1 *
+bit 1108 I 1 IO_PAD386
+bit 1107 O 1 IO_PAD386 1106 1 Z
+bit 1106 C 1 *
+bit 1105 I 1 IO_PAD384
+bit 1104 O 1 IO_PAD384 1103 1 Z
+bit 1103 C 1 *
+bit 1102 I 1 IO_PAD382
+bit 1101 O 1 IO_PAD382 1100 1 Z
+bit 1100 C 1 *
+bit 1099 I 1 IO_PAD380
+bit 1098 O 1 IO_PAD380 1097 1 Z
+bit 1097 C 1 *
+bit 1096 I 1 IO_PAD378
+bit 1095 O 1 IO_PAD378 1094 1 Z
+bit 1094 C 1 *
+bit 1093 I 1 IO_PAD377
+bit 1092 O 1 IO_PAD377 1091 1 Z
+bit 1091 C 1 *
+bit 1090 I 1 IO_PAD376
+bit 1089 O 1 IO_PAD376 1088 1 Z
+bit 1088 C 1 *
+bit 1087 I 1 IO_PAD375
+bit 1086 O 1 IO_PAD375 1085 1 Z
+bit 1085 C 1 *
+bit 1084 I 1 IO_PAD374
+bit 1083 O 1 IO_PAD374 1082 1 Z
+bit 1082 C 1 *
+bit 1081 I 1 IO_PAD372
+bit 1080 O 1 IO_PAD372 1079 1 Z
+bit 1079 C 1 *
+bit 1078 I 1 IO_PAD370
+bit 1077 O 1 IO_PAD370 1076 1 Z
+bit 1076 C 1 *
+bit 1075 I 1 IO_PAD369
+bit 1074 O 1 IO_PAD369 1073 1 Z
+bit 1073 C 1 *
+bit 1072 I 1 IO_PAD368
+bit 1071 O 1 IO_PAD368 1070 1 Z
+bit 1070 C 1 *
+bit 1069 I 1 IO_PAD366
+bit 1068 O 1 IO_PAD366 1067 1 Z
+bit 1067 C 1 *
+bit 1066 I 1 IO_PAD365
+bit 1065 O 1 IO_PAD365 1064 1 Z
+bit 1064 C 1 *
+bit 1063 I 1 IO_PAD364
+bit 1062 O 1 IO_PAD364 1061 1 Z
+bit 1061 C 1 *
+bit 1060 I 1 IO_PAD363
+bit 1059 O 1 IO_PAD363 1058 1 Z
+bit 1058 C 1 *
+bit 1057 I 1 IO_PAD362
+bit 1056 O 1 IO_PAD362 1055 1 Z
+bit 1055 C 1 *
+bit 1054 I 1 IO_PAD360
+bit 1053 O 1 IO_PAD360 1052 1 Z
+bit 1052 C 1 *
+bit 1051 I 1 IO_PAD359
+bit 1050 O 1 IO_PAD359 1049 1 Z
+bit 1049 C 1 *
+bit 1048 I 1 IO_PAD358
+bit 1047 O 1 IO_PAD358 1046 1 Z
+bit 1046 C 1 *
+bit 1045 I 1 IO_PAD356
+bit 1044 O 1 IO_PAD356 1043 1 Z
+bit 1043 C 1 *
+bit 1042 I 1 IO_PAD355
+bit 1041 O 1 IO_PAD355 1040 1 Z
+bit 1040 C 1 *
+bit 1039 I 1 IO_PAD354
+bit 1038 O 1 IO_PAD354 1037 1 Z
+bit 1037 C 1 *
+bit 1036 I 1 IO_PAD352
+bit 1035 O 1 IO_PAD352 1034 1 Z
+bit 1034 C 1 *
+bit 1033 I 1 IO_PAD350
+bit 1032 O 1 IO_PAD350 1031 1 Z
+bit 1031 C 1 *
+bit 1030 I 1 IO_PAD348
+bit 1029 O 1 IO_PAD348 1028 1 Z
+bit 1028 C 1 *
+bit 1027 I 1 IO_PAD346
+bit 1026 O 1 IO_PAD346 1025 1 Z
+bit 1025 C 1 *
+bit 1024 I 1 IO_PAD345
+bit 1023 O 1 IO_PAD345 1022 1 Z
+bit 1022 C 1 *
+bit 1021 I 1 IO_PAD344
+bit 1020 O 1 IO_PAD344 1019 1 Z
+bit 1019 C 1 *
+bit 1018 I 1 IO_PAD343
+bit 1017 O 1 IO_PAD343 1016 1 Z
+bit 1016 C 1 *
+bit 1015 I 1 IO_PAD342
+bit 1014 O 1 IO_PAD342 1013 1 Z
+bit 1013 C 1 *
+bit 1012 I 1 IO_PAD340
+bit 1011 O 1 IO_PAD340 1010 1 Z
+bit 1010 C 1 *
+bit 1009 I 1 IO_PAD338
+bit 1008 O 1 IO_PAD338 1007 1 Z
+bit 1007 C 1 *
+bit 1006 I 1 IO_PAD337
+bit 1005 O 1 IO_PAD337 1004 1 Z
+bit 1004 C 1 *
+bit 1003 I 1 IO_PAD336
+bit 1002 O 1 IO_PAD336 1001 1 Z
+bit 1001 C 1 *
+bit 1000 I 1 IO_PAD335
+bit 999 O 1 IO_PAD335 998 1 Z
+bit 998 C 1 *
+bit 997 I 1 IO_PAD334
+bit 996 O 1 IO_PAD334 995 1 Z
+bit 995 C 1 *
+bit 994 I 1 IO_PAD332
+bit 993 O 1 IO_PAD332 992 1 Z
+bit 992 C 1 *
+bit 991 I 1 IO_PAD331
+bit 990 O 1 IO_PAD331 989 1 Z
+bit 989 C 1 *
+bit 988 I 1 IO_PAD330
+bit 987 O 1 IO_PAD330 986 1 Z
+bit 986 C 1 *
+bit 985 I 1 IO_PAD328
+bit 984 O 1 IO_PAD328 983 1 Z
+bit 983 C 1 *
+bit 982 I 1 IO_PAD327
+bit 981 O 1 IO_PAD327 980 1 Z
+bit 980 C 1 *
+bit 979 I 1 IO_PAD326
+bit 978 O 1 IO_PAD326 977 1 Z
+bit 977 C 1 *
+bit 976 I 1 IO_PAD324
+bit 975 O 1 IO_PAD324 974 1 Z
+bit 974 C 1 *
+bit 973 I 1 IO_PAD323
+bit 972 O 1 IO_PAD323 971 1 Z
+bit 971 C 1 *
+bit 970 I 1 IO_PAD322
+bit 969 O 1 IO_PAD322 968 1 Z
+bit 968 C 1 *
+bit 967 I 1 IO_PAD321
+bit 966 O 1 IO_PAD321 965 1 Z
+bit 965 C 1 *
+bit 964 I 1 M2_PAD320
+bit 963 I 1 M0_PAD319
+bit 962 I 1 M1_PAD318
+bit 961 I 1 IO_PAD316
+bit 960 O 1 IO_PAD316 959 1 Z
+bit 959 C 1 *
+bit 958 I 1 IO_PAD315
+bit 957 O 1 IO_PAD315 956 1 Z
+bit 956 C 1 *
+bit 955 I 1 IO_PAD314
+bit 954 O 1 IO_PAD314 953 1 Z
+bit 953 C 1 *
+bit 952 I 1 IO_PAD312
+bit 951 O 1 IO_PAD312 950 1 Z
+bit 950 C 1 *
+bit 949 I 1 IO_PAD311
+bit 948 O 1 IO_PAD311 947 1 Z
+bit 947 C 1 *
+bit 946 I 1 IO_PAD310
+bit 945 O 1 IO_PAD310 944 1 Z
+bit 944 C 1 *
+bit 943 I 1 IO_PAD309
+bit 942 O 1 IO_PAD309 941 1 Z
+bit 941 C 1 *
+bit 940 I 1 IO_PAD308
+bit 939 O 1 IO_PAD308 938 1 Z
+bit 938 C 1 *
+bit 937 I 1 IO_PAD306
+bit 936 O 1 IO_PAD306 935 1 Z
+bit 935 C 1 *
+bit 934 I 1 IO_PAD304
+bit 933 O 1 IO_PAD304 932 1 Z
+bit 932 C 1 *
+bit 931 I 1 IO_PAD303
+bit 930 O 1 IO_PAD303 929 1 Z
+bit 929 C 1 *
+bit 928 I 1 IO_PAD302
+bit 927 O 1 IO_PAD302 926 1 Z
+bit 926 C 1 *
+bit 925 I 1 IO_PAD301
+bit 924 O 1 IO_PAD301 923 1 Z
+bit 923 C 1 *
+bit 922 I 1 IO_PAD300
+bit 921 O 1 IO_PAD300 920 1 Z
+bit 920 C 1 *
+bit 919 I 1 IO_PAD298
+bit 918 O 1 IO_PAD298 917 1 Z
+bit 917 C 1 *
+bit 916 I 1 IO_PAD296
+bit 915 O 1 IO_PAD296 914 1 Z
+bit 914 C 1 *
+bit 913 I 1 IO_PAD294
+bit 912 O 1 IO_PAD294 911 1 Z
+bit 911 C 1 *
+bit 910 I 1 IO_PAD292
+bit 909 O 1 IO_PAD292 908 1 Z
+bit 908 C 1 *
+bit 907 I 1 IO_PAD291
+bit 906 O 1 IO_PAD291 905 1 Z
+bit 905 C 1 *
+bit 904 I 1 IO_PAD290
+bit 903 O 1 IO_PAD290 902 1 Z
+bit 902 C 1 *
+bit 901 I 1 IO_PAD288
+bit 900 O 1 IO_PAD288 899 1 Z
+bit 899 C 1 *
+bit 898 I 1 IO_PAD286
+bit 897 O 1 IO_PAD286 896 1 Z
+bit 896 C 1 *
+bit 895 I 1 IO_PAD285
+bit 894 O 1 IO_PAD285 893 1 Z
+bit 893 C 1 *
+bit 892 I 1 IO_PAD284
+bit 891 O 1 IO_PAD284 890 1 Z
+bit 890 C 1 *
+bit 889 I 1 IO_PAD283
+bit 888 O 1 IO_PAD283 887 1 Z
+bit 887 C 1 *
+bit 886 I 1 IO_PAD282
+bit 885 O 1 IO_PAD282 884 1 Z
+bit 884 C 1 *
+bit 883 I 1 IO_PAD280
+bit 882 O 1 IO_PAD280 881 1 Z
+bit 881 C 1 *
+bit 880 I 1 IO_PAD279
+bit 879 O 1 IO_PAD279 878 1 Z
+bit 878 C 1 *
+bit 877 I 1 IO_PAD278
+bit 876 O 1 IO_PAD278 875 1 Z
+bit 875 C 1 *
+bit 874 I 1 IO_PAD277
+bit 873 O 1 IO_PAD277 872 1 Z
+bit 872 C 1 *
+bit 871 I 1 IO_PAD276
+bit 870 O 1 IO_PAD276 869 1 Z
+bit 869 C 1 *
+bit 868 I 1 IO_PAD274
+bit 867 O 1 IO_PAD274 866 1 Z
+bit 866 C 1 *
+bit 865 I 1 IO_PAD273
+bit 864 O 1 IO_PAD273 863 1 Z
+bit 863 C 1 *
+bit 862 I 1 IO_PAD272
+bit 861 O 1 IO_PAD272 860 1 Z
+bit 860 C 1 *
+bit 859 O 1 *
+bit 858 O 1 *
+bit 857 O 1 *
+bit 856 O 1 *
+bit 855 O 1 *
+bit 854 O 1 *
+bit 853 I 1 IO_PAD270
+bit 852 O 1 IO_PAD270 851 1 Z
+bit 851 C 1 *
+bit 850 I 1 IO_PAD268
+bit 849 O 1 IO_PAD268 848 1 Z
+bit 848 C 1 *
+bit 847 I 1 IO_PAD267
+bit 846 O 1 IO_PAD267 845 1 Z
+bit 845 C 1 *
+bit 844 I 1 IO_PAD266
+bit 843 O 1 IO_PAD266 842 1 Z
+bit 842 C 1 *
+bit 841 I 1 IO_PAD265
+bit 840 O 1 IO_PAD265 839 1 Z
+bit 839 C 1 *
+bit 838 I 1 IO_PAD264
+bit 837 O 1 IO_PAD264 836 1 Z
+bit 836 C 1 *
+bit 835 I 1 IO_PAD262
+bit 834 O 1 IO_PAD262 833 1 Z
+bit 833 C 1 *
+bit 832 I 1 IO_PAD260
+bit 831 O 1 IO_PAD260 830 1 Z
+bit 830 C 1 *
+bit 829 I 1 IO_PAD258
+bit 828 O 1 IO_PAD258 827 1 Z
+bit 827 C 1 *
+bit 826 I 1 IO_PAD256
+bit 825 O 1 IO_PAD256 824 1 Z
+bit 824 C 1 *
+bit 823 I 1 IO_PAD255
+bit 822 O 1 IO_PAD255 821 1 Z
+bit 821 C 1 *
+bit 820 I 1 IO_PAD254
+bit 819 O 1 IO_PAD254 818 1 Z
+bit 818 C 1 *
+bit 817 O 1 *
+bit 816 O 1 *
+bit 815 O 1 *
+bit 814 O 1 *
+bit 813 O 1 *
+bit 812 O 1 *
+bit 811 I 1 IO_PAD252
+bit 810 O 1 IO_PAD252 809 1 Z
+bit 809 C 1 *
+bit 808 I 1 IO_PAD250
+bit 807 O 1 IO_PAD250 806 1 Z
+bit 806 C 1 *
+bit 805 I 1 IO_PAD249
+bit 804 O 1 IO_PAD249 803 1 Z
+bit 803 C 1 *
+bit 802 I 1 IO_PAD248
+bit 801 O 1 IO_PAD248 800 1 Z
+bit 800 C 1 *
+bit 799 I 1 IO_PAD247
+bit 798 O 1 IO_PAD247 797 1 Z
+bit 797 C 1 *
+bit 796 I 1 IO_PAD246
+bit 795 O 1 IO_PAD246 794 1 Z
+bit 794 C 1 *
+bit 793 I 1 IO_PAD245
+bit 792 O 1 IO_PAD245 791 1 Z
+bit 791 C 1 *
+bit 790 I 1 IO_PAD244
+bit 789 O 1 IO_PAD244 788 1 Z
+bit 788 C 1 *
+bit 787 O 1 *
+bit 786 O 1 *
+bit 785 O 1 *
+bit 784 O 1 *
+bit 783 O 1 *
+bit 782 O 1 *
+bit 781 I 1 IO_PAD242
+bit 780 O 1 IO_PAD242 779 1 Z
+bit 779 C 1 *
+bit 778 I 1 IO_PAD240
+bit 777 O 1 IO_PAD240 776 1 Z
+bit 776 C 1 *
+bit 775 I 1 IO_PAD239
+bit 774 O 1 IO_PAD239 773 1 Z
+bit 773 C 1 *
+bit 772 I 1 IO_PAD238
+bit 771 O 1 IO_PAD238 770 1 Z
+bit 770 C 1 *
+bit 769 I 1 IO_PAD237
+bit 768 O 1 IO_PAD237 767 1 Z
+bit 767 C 1 *
+bit 766 I 1 IO_PAD236
+bit 765 O 1 IO_PAD236 764 1 Z
+bit 764 C 1 *
+bit 763 I 1 IO_PAD234
+bit 762 O 1 IO_PAD234 761 1 Z
+bit 761 C 1 *
+bit 760 I 1 IO_PAD232
+bit 759 O 1 IO_PAD232 758 1 Z
+bit 758 C 1 *
+bit 757 I 1 IO_PAD230
+bit 756 O 1 IO_PAD230 755 1 Z
+bit 755 C 1 *
+bit 754 I 1 IO_PAD228
+bit 753 O 1 IO_PAD228 752 1 Z
+bit 752 C 1 *
+bit 751 O 1 *
+bit 750 O 1 *
+bit 749 O 1 *
+bit 748 O 1 *
+bit 747 O 1 *
+bit 746 O 1 *
+bit 745 I 1 IO_PAD227
+bit 744 O 1 IO_PAD227 743 1 Z
+bit 743 C 1 *
+bit 742 I 1 IO_PAD226
+bit 741 O 1 IO_PAD226 740 1 Z
+bit 740 C 1 *
+bit 739 I 1 IO_PAD224
+bit 738 O 1 IO_PAD224 737 1 Z
+bit 737 C 1 *
+bit 736 I 1 IO_PAD223
+bit 735 O 1 IO_PAD223 734 1 Z
+bit 734 C 1 *
+bit 733 I 1 IO_PAD222
+bit 732 O 1 IO_PAD222 731 1 Z
+bit 731 C 1 *
+bit 730 I 1 IO_PAD220
+bit 729 O 1 IO_PAD220 728 1 Z
+bit 728 C 1 *
+bit 727 I 1 IO_PAD218
+bit 726 O 1 IO_PAD218 725 1 Z
+bit 725 C 1 *
+bit 724 I 1 IO_PAD217
+bit 723 O 1 IO_PAD217 722 1 Z
+bit 722 C 1 *
+bit 721 I 1 IO_PAD215
+bit 720 O 1 IO_PAD215 719 1 Z
+bit 719 C 1 *
+bit 718 I 1 IO_PAD214
+bit 717 O 1 IO_PAD214 716 1 Z
+bit 716 C 1 *
+bit 715 I 1 IO_PAD212
+bit 714 O 1 IO_PAD212 713 1 Z
+bit 713 C 1 *
+bit 712 I 1 IO_PAD210
+bit 711 O 1 IO_PAD210 710 1 Z
+bit 710 C 1 *
+bit 709 I 1 IO_PAD209
+bit 708 O 1 IO_PAD209 707 1 Z
+bit 707 C 1 *
+bit 706 I 1 IO_PAD208
+bit 705 O 1 IO_PAD208 704 1 Z
+bit 704 C 1 *
+bit 703 I 1 IO_PAD206
+bit 702 O 1 IO_PAD206 701 1 Z
+bit 701 C 1 *
+bit 700 I 1 IO_PAD205
+bit 699 O 1 IO_PAD205 698 1 Z
+bit 698 C 1 *
+bit 697 O 1 *
+bit 696 O 1 *
+bit 695 O 1 *
+bit 694 O 1 *
+bit 693 O 1 *
+bit 692 O 1 *
+bit 691 I 1 IO_PAD204
+bit 690 O 1 IO_PAD204 689 1 Z
+bit 689 C 1 *
+bit 688 I 1 IO_PAD202
+bit 687 O 1 IO_PAD202 686 1 Z
+bit 686 C 1 *
+bit 685 I 1 IO_PAD200
+bit 684 O 1 IO_PAD200 683 1 Z
+bit 683 C 1 *
+bit 682 I 1 IO_PAD198
+bit 681 O 1 IO_PAD198 680 1 Z
+bit 680 C 1 *
+bit 679 I 1 IO_PAD196
+bit 678 O 1 IO_PAD196 677 1 Z
+bit 677 C 1 *
+bit 676 I 1 IO_PAD195
+bit 675 O 1 IO_PAD195 674 1 Z
+bit 674 C 1 *
+bit 673 I 1 IO_PAD194
+bit 672 O 1 IO_PAD194 671 1 Z
+bit 671 C 1 *
+bit 670 I 1 IO_PAD193
+bit 669 O 1 IO_PAD193 668 1 Z
+bit 668 C 1 *
+bit 667 I 1 IO_PAD192
+bit 666 O 1 IO_PAD192 665 1 Z
+bit 665 C 1 *
+bit 664 I 1 IO_PAD190
+bit 663 O 1 IO_PAD190 662 1 Z
+bit 662 C 1 *
+bit 661 O 1 *
+bit 660 O 1 *
+bit 659 O 1 *
+bit 658 O 1 *
+bit 657 O 1 *
+bit 656 O 1 *
+bit 655 I 1 IO_PAD188
+bit 654 O 1 IO_PAD188 653 1 Z
+bit 653 C 1 *
+bit 652 I 1 IO_PAD187
+bit 651 O 1 IO_PAD187 650 1 Z
+bit 650 C 1 *
+bit 649 I 1 IO_PAD186
+bit 648 O 1 IO_PAD186 647 1 Z
+bit 647 C 1 *
+bit 646 I 1 IO_PAD185
+bit 645 O 1 IO_PAD185 644 1 Z
+bit 644 C 1 *
+bit 643 I 1 IO_PAD184
+bit 642 O 1 IO_PAD184 641 1 Z
+bit 641 C 1 *
+bit 640 I 1 IO_PAD183
+bit 639 O 1 IO_PAD183 638 1 Z
+bit 638 C 1 *
+bit 637 I 1 IO_PAD182
+bit 636 O 1 IO_PAD182 635 1 Z
+bit 635 C 1 *
+bit 634 I 1 IO_PAD180
+bit 633 O 1 IO_PAD180 632 1 Z
+bit 632 C 1 *
+bit 631 O 1 *
+bit 630 O 1 *
+bit 629 O 1 *
+bit 628 O 1 *
+bit 627 O 1 *
+bit 626 O 1 *
+bit 625 I 1 IO_PAD178
+bit 624 O 1 IO_PAD178 623 1 Z
+bit 623 C 1 *
+bit 622 I 1 IO_PAD177
+bit 621 O 1 IO_PAD177 620 1 Z
+bit 620 C 1 *
+bit 619 I 1 IO_PAD176
+bit 618 O 1 IO_PAD176 617 1 Z
+bit 617 C 1 *
+bit 616 I 1 IO_PAD174
+bit 615 O 1 IO_PAD174 614 1 Z
+bit 614 C 1 *
+bit 613 I 1 IO_PAD172
+bit 612 O 1 IO_PAD172 611 1 Z
+bit 611 C 1 *
+bit 610 I 1 IO_PAD170
+bit 609 O 1 IO_PAD170 608 1 Z
+bit 608 C 1 *
+bit 607 I 1 IO_PAD168
+bit 606 O 1 IO_PAD168 605 1 Z
+bit 605 C 1 *
+bit 604 I 1 IO_PAD167
+bit 603 O 1 IO_PAD167 602 1 Z
+bit 602 C 1 *
+bit 601 I 1 IO_PAD166
+bit 600 O 1 IO_PAD166 599 1 Z
+bit 599 C 1 *
+bit 598 I 1 IO_PAD165
+bit 597 O 1 IO_PAD165 596 1 Z
+bit 596 C 1 *
+bit 595 I 1 IO_PAD164
+bit 594 O 1 IO_PAD164 593 1 Z
+bit 593 C 1 *
+bit 592 I 1 IO_PAD162
+bit 591 O 1 IO_PAD162 590 1 Z
+bit 590 C 1 *
+bit 589 O 1 *
+bit 588 O 1 *
+bit 587 O 1 *
+bit 586 O 1 *
+bit 585 O 1 *
+bit 584 O 1 *
+bit 583 I 1 IO_PAD160
+bit 582 O 1 IO_PAD160 581 1 Z
+bit 581 C 1 *
+bit 580 I 1 IO_PAD159
+bit 579 O 1 IO_PAD159 578 1 Z
+bit 578 C 1 *
+bit 577 I 1 IO_PAD158
+bit 576 O 1 IO_PAD158 575 1 Z
+bit 575 C 1 *
+bit 574 I 1 IO_PAD156
+bit 573 O 1 IO_PAD156 572 1 Z
+bit 572 C 1 *
+bit 571 I 1 IO_PAD155
+bit 570 O 1 IO_PAD155 569 1 Z
+bit 569 C 1 *
+bit 568 I 1 IO_PAD154
+bit 567 O 1 IO_PAD154 566 1 Z
+bit 566 C 1 *
+bit 565 I 1 IO_PAD153
+bit 564 O 1 IO_PAD153 563 1 Z
+bit 563 C 1 *
+bit 562 I 1 IO_PAD152
+bit 561 O 1 IO_PAD152 560 1 Z
+bit 560 C 1 *
+bit 559 I 1 IO_PAD150
+bit 558 O 1 IO_PAD150 557 1 Z
+bit 557 C 1 *
+bit 556 I 1 IO_PAD149
+bit 555 O 1 IO_PAD149 554 1 Z
+bit 554 C 1 *
+bit 553 I 1 IO_PAD148
+bit 552 O 1 IO_PAD148 551 1 Z
+bit 551 C 1 *
+bit 550 I 1 IO_PAD147
+bit 549 O 1 IO_PAD147 548 1 Z
+bit 548 C 1 *
+bit 547 I 1 IO_PAD146
+bit 546 O 1 IO_PAD146 545 1 Z
+bit 545 C 1 *
+bit 544 I 1 IO_PAD144
+bit 543 O 1 IO_PAD144 542 1 Z
+bit 542 C 1 *
+bit 541 I 1 IO_PAD142
+bit 540 O 1 IO_PAD142 539 1 Z
+bit 539 C 1 *
+bit 538 I 1 IO_PAD141
+bit 537 O 1 IO_PAD141 536 1 Z
+bit 536 C 1 *
+bit 535 I 1 IO_PAD140
+bit 534 O 1 IO_PAD140 533 1 Z
+bit 533 C 1 *
+bit 532 I 1 IO_PAD138
+bit 531 O 1 IO_PAD138 530 1 Z
+bit 530 C 1 *
+bit 529 I 1 IO_PAD136
+bit 528 O 1 IO_PAD136 527 1 Z
+bit 527 C 1 *
+bit 526 I 1 IO_PAD134
+bit 525 O 1 IO_PAD134 524 1 Z
+bit 524 C 1 *
+bit 523 I 1 IO_PAD132
+bit 522 O 1 IO_PAD132 521 1 Z
+bit 521 C 1 *
+bit 520 I 1 IO_PAD131
+bit 519 O 1 IO_PAD131 518 1 Z
+bit 518 C 1 *
+bit 517 I 1 IO_PAD130
+bit 516 O 1 IO_PAD130 515 1 Z
+bit 515 C 1 *
+bit 514 I 1 IO_PAD129
+bit 513 O 1 IO_PAD129 512 1 Z
+bit 512 C 1 *
+bit 511 I 1 IO_PAD128
+bit 510 O 1 IO_PAD128 509 1 Z
+bit 509 C 1 *
+bit 508 I 1 IO_PAD126
+bit 507 O 1 IO_PAD126 506 1 Z
+bit 506 C 1 *
+bit 505 I 1 IO_PAD124
+bit 504 O 1 IO_PAD124 503 1 Z
+bit 503 C 1 *
+bit 502 I 1 IO_PAD123
+bit 501 O 1 IO_PAD123 500 1 Z
+bit 500 C 1 *
+bit 499 I 1 IO_PAD122
+bit 498 O 1 IO_PAD122 497 1 Z
+bit 497 C 1 *
+bit 496 I 1 IO_PAD121
+bit 495 O 1 IO_PAD121 494 1 Z
+bit 494 C 1 *
+bit 493 I 1 IO_PAD120
+bit 492 O 1 IO_PAD120 491 1 Z
+bit 491 C 1 *
+bit 490 I 1 IO_PAD118
+bit 489 O 1 IO_PAD118 488 1 Z
+bit 488 C 1 *
+bit 487 I 1 IO_PAD117
+bit 486 O 1 IO_PAD117 485 1 Z
+bit 485 C 1 *
+bit 484 I 1 IO_PAD116
+bit 483 O 1 IO_PAD116 482 1 Z
+bit 482 C 1 *
+bit 481 O 1 *
+bit 480 I 1 HSWAP_EN_PAD112
+bit 479 I 1 IO_PAD111
+bit 478 O 1 IO_PAD111 477 1 Z
+bit 477 C 1 *
+bit 476 I 1 IO_PAD110
+bit 475 O 1 IO_PAD110 474 1 Z
+bit 474 C 1 *
+bit 473 I 1 IO_PAD109
+bit 472 O 1 IO_PAD109 471 1 Z
+bit 471 C 1 *
+bit 470 I 1 IO_PAD108
+bit 469 O 1 IO_PAD108 468 1 Z
+bit 468 C 1 *
+bit 467 I 1 IO_PAD106
+bit 466 O 1 IO_PAD106 465 1 Z
+bit 465 C 1 *
+bit 464 I 1 IO_PAD105
+bit 463 O 1 IO_PAD105 462 1 Z
+bit 462 C 1 *
+bit 461 I 1 IO_PAD104
+bit 460 O 1 IO_PAD104 459 1 Z
+bit 459 C 1 *
+bit 458 I 1 IO_PAD102
+bit 457 O 1 IO_PAD102 456 1 Z
+bit 456 C 1 *
+bit 455 I 1 IO_PAD101
+bit 454 O 1 IO_PAD101 453 1 Z
+bit 453 C 1 *
+bit 452 I 1 IO_PAD100
+bit 451 O 1 IO_PAD100 450 1 Z
+bit 450 C 1 *
+bit 449 I 1 IO_PAD98
+bit 448 O 1 IO_PAD98 447 1 Z
+bit 447 C 1 *
+bit 446 I 1 IO_PAD97
+bit 445 O 1 IO_PAD97 444 1 Z
+bit 444 C 1 *
+bit 443 I 1 IO_PAD96
+bit 442 O 1 IO_PAD96 441 1 Z
+bit 441 C 1 *
+bit 440 I 1 IO_PAD95
+bit 439 O 1 IO_PAD95 438 1 Z
+bit 438 C 1 *
+bit 437 I 1 IO_PAD94
+bit 436 O 1 IO_PAD94 435 1 Z
+bit 435 C 1 *
+bit 434 I 1 IO_PAD92
+bit 433 O 1 IO_PAD92 432 1 Z
+bit 432 C 1 *
+bit 431 I 1 IO_PAD90
+bit 430 O 1 IO_PAD90 429 1 Z
+bit 429 C 1 *
+bit 428 I 1 IO_PAD89
+bit 427 O 1 IO_PAD89 426 1 Z
+bit 426 C 1 *
+bit 425 I 1 IO_PAD88
+bit 424 O 1 IO_PAD88 423 1 Z
+bit 423 C 1 *
+bit 422 I 1 IO_PAD87
+bit 421 O 1 IO_PAD87 420 1 Z
+bit 420 C 1 *
+bit 419 I 1 IO_PAD86
+bit 418 O 1 IO_PAD86 417 1 Z
+bit 417 C 1 *
+bit 416 I 1 IO_PAD84
+bit 415 O 1 IO_PAD84 414 1 Z
+bit 414 C 1 *
+bit 413 I 1 IO_PAD82
+bit 412 O 1 IO_PAD82 411 1 Z
+bit 411 C 1 *
+bit 410 I 1 IO_PAD80
+bit 409 O 1 IO_PAD80 408 1 Z
+bit 408 C 1 *
+bit 407 I 1 IO_PAD78
+bit 406 O 1 IO_PAD78 405 1 Z
+bit 405 C 1 *
+bit 404 I 1 IO_PAD77
+bit 403 O 1 IO_PAD77 402 1 Z
+bit 402 C 1 *
+bit 401 I 1 IO_PAD76
+bit 400 O 1 IO_PAD76 399 1 Z
+bit 399 C 1 *
+bit 398 I 1 IO_PAD74
+bit 397 O 1 IO_PAD74 396 1 Z
+bit 396 C 1 *
+bit 395 I 1 IO_PAD73
+bit 394 O 1 IO_PAD73 393 1 Z
+bit 393 C 1 *
+bit 392 I 1 IO_PAD72
+bit 391 O 1 IO_PAD72 390 1 Z
+bit 390 C 1 *
+bit 389 I 1 IO_PAD70
+bit 388 O 1 IO_PAD70 387 1 Z
+bit 387 C 1 *
+bit 386 I 1 IO_PAD69
+bit 385 O 1 IO_PAD69 384 1 Z
+bit 384 C 1 *
+bit 383 I 1 IO_PAD68
+bit 382 O 1 IO_PAD68 381 1 Z
+bit 381 C 1 *
+bit 380 I 1 IO_PAD67
+bit 379 O 1 IO_PAD67 378 1 Z
+bit 378 C 1 *
+bit 377 I 1 IO_PAD66
+bit 376 O 1 IO_PAD66 375 1 Z
+bit 375 C 1 *
+bit 374 I 1 IO_PAD64
+bit 373 O 1 IO_PAD64 372 1 Z
+bit 372 C 1 *
+bit 371 I 1 IO_PAD63
+bit 370 O 1 IO_PAD63 369 1 Z
+bit 369 C 1 *
+bit 368 I 1 IO_PAD62
+bit 367 O 1 IO_PAD62 366 1 Z
+bit 366 C 1 *
+bit 365 I 1 IO_PAD60
+bit 364 O 1 IO_PAD60 363 1 Z
+bit 363 C 1 *
+bit 362 I 1 IO_PAD58
+bit 361 O 1 IO_PAD58 360 1 Z
+bit 360 C 1 *
+bit 359 I 1 IO_PAD57
+bit 358 O 1 IO_PAD57 357 1 Z
+bit 357 C 1 *
+bit 356 I 1 IO_PAD56
+bit 355 O 1 IO_PAD56 354 1 Z
+bit 354 C 1 *
+bit 353 I 1 IO_PAD55
+bit 352 O 1 IO_PAD55 351 1 Z
+bit 351 C 1 *
+bit 350 I 1 IO_PAD54
+bit 349 O 1 IO_PAD54 348 1 Z
+bit 348 C 1 *
+bit 347 I 1 IO_PAD52
+bit 346 O 1 IO_PAD52 345 1 Z
+bit 345 C 1 *
+bit 344 I 1 IO_PAD50
+bit 343 O 1 IO_PAD50 342 1 Z
+bit 342 C 1 *
+bit 341 I 1 IO_PAD48
+bit 340 O 1 IO_PAD48 339 1 Z
+bit 339 C 1 *
+bit 338 I 1 IO_PAD46
+bit 337 O 1 IO_PAD46 336 1 Z
+bit 336 C 1 *
+bit 335 I 1 IO_PAD45
+bit 334 O 1 IO_PAD45 333 1 Z
+bit 333 C 1 *
+bit 332 I 1 IO_PAD44
+bit 331 O 1 IO_PAD44 330 1 Z
+bit 330 C 1 *
+bit 329 I 1 IO_PAD42
+bit 328 O 1 IO_PAD42 327 1 Z
+bit 327 C 1 *
+bit 326 I 1 IO_PAD41
+bit 325 O 1 IO_PAD41 324 1 Z
+bit 324 C 1 *
+bit 323 I 1 IO_PAD40
+bit 322 O 1 IO_PAD40 321 1 Z
+bit 321 C 1 *
+bit 320 I 1 IO_PAD38
+bit 319 O 1 IO_PAD38 318 1 Z
+bit 318 C 1 *
+bit 317 I 1 IO_PAD36
+bit 316 O 1 IO_PAD36 315 1 Z
+bit 315 C 1 *
+bit 314 I 1 IO_PAD35
+bit 313 O 1 IO_PAD35 312 1 Z
+bit 312 C 1 *
+bit 311 I 1 IO_PAD34
+bit 310 O 1 IO_PAD34 309 1 Z
+bit 309 C 1 *
+bit 308 I 1 IO_PAD33
+bit 307 O 1 IO_PAD33 306 1 Z
+bit 306 C 1 *
+bit 305 I 1 IO_PAD32
+bit 304 O 1 IO_PAD32 303 1 Z
+bit 303 C 1 *
+bit 302 I 1 IO_PAD31
+bit 301 O 1 IO_PAD31 300 1 Z
+bit 300 C 1 *
+bit 299 I 1 IO_PAD30
+bit 298 O 1 IO_PAD30 297 1 Z
+bit 297 C 1 *
+bit 296 I 1 IO_PAD28
+bit 295 O 1 IO_PAD28 294 1 Z
+bit 294 C 1 *
+bit 293 I 1 IO_PAD26
+bit 292 O 1 IO_PAD26 291 1 Z
+bit 291 C 1 *
+bit 290 I 1 IO_PAD25
+bit 289 O 1 IO_PAD25 288 1 Z
+bit 288 C 1 *
+bit 287 I 1 IO_PAD24
+bit 286 O 1 IO_PAD24 285 1 Z
+bit 285 C 1 *
+bit 284 I 1 IO_PAD23
+bit 283 O 1 IO_PAD23 282 1 Z
+bit 282 C 1 *
+bit 281 I 1 IO_PAD22
+bit 280 O 1 IO_PAD22 279 1 Z
+bit 279 C 1 *
+bit 278 I 1 IO_PAD20
+bit 277 O 1 IO_PAD20 276 1 Z
+bit 276 C 1 *
+bit 275 I 1 IO_PAD18
+bit 274 O 1 IO_PAD18 273 1 Z
+bit 273 C 1 *
+bit 272 I 1 IO_PAD16
+bit 271 O 1 IO_PAD16 270 1 Z
+bit 270 C 1 *
+bit 269 I 1 IO_PAD14
+bit 268 O 1 IO_PAD14 267 1 Z
+bit 267 C 1 *
+bit 266 I 1 IO_PAD13
+bit 265 O 1 IO_PAD13 264 1 Z
+bit 264 C 1 *
+bit 263 I 1 IO_PAD12
+bit 262 O 1 IO_PAD12 261 1 Z
+bit 261 C 1 *
+bit 260 I 1 IO_PAD10
+bit 259 O 1 IO_PAD10 258 1 Z
+bit 258 C 1 *
+bit 257 I 1 IO_PAD9
+bit 256 O 1 IO_PAD9 255 1 Z
+bit 255 C 1 *
+bit 254 I 1 IO_PAD8
+bit 253 O 1 IO_PAD8 252 1 Z
+bit 252 C 1 *
+bit 251 I 1 IO_PAD6
+bit 250 O 1 IO_PAD6 249 1 Z
+bit 249 C 1 *
+bit 248 I 1 IO_PAD4
+bit 247 O 1 IO_PAD4 246 1 Z
+bit 246 C 1 *
+bit 245 I 1 IO_PAD3
+bit 244 O 1 IO_PAD3 243 1 Z
+bit 243 C 1 *
+bit 242 I 1 IO_PAD2
+bit 241 O 1 IO_PAD2 240 1 Z
+bit 240 C 1 *
+bit 239 I 1 IO_PAD861
+bit 238 O 1 IO_PAD861 237 1 Z
+bit 237 C 1 *
+bit 236 I 1 IO_PAD860
+bit 235 O 1 IO_PAD860 234 1 Z
+bit 234 C 1 *
+bit 233 I 1 IO_PAD859
+bit 232 O 1 IO_PAD859 231 1 Z
+bit 231 C 1 *
+bit 230 I 1 IO_PAD857
+bit 229 O 1 IO_PAD857 228 1 Z
+bit 228 C 1 *
+bit 227 I 1 IO_PAD855
+bit 226 O 1 IO_PAD855 225 1 Z
+bit 225 C 1 *
+bit 224 I 1 IO_PAD854
+bit 223 O 1 IO_PAD854 222 1 Z
+bit 222 C 1 *
+bit 221 I 1 IO_PAD853
+bit 220 O 1 IO_PAD853 219 1 Z
+bit 219 C 1 *
+bit 218 I 1 IO_PAD851
+bit 217 O 1 IO_PAD851 216 1 Z
+bit 216 C 1 *
+bit 215 I 1 IO_PAD850
+bit 214 O 1 IO_PAD850 213 1 Z
+bit 213 C 1 *
+bit 212 I 1 IO_PAD849
+bit 211 O 1 IO_PAD849 210 1 Z
+bit 210 C 1 *
+bit 209 I 1 IO_PAD847
+bit 208 O 1 IO_PAD847 207 1 Z
+bit 207 C 1 *
+bit 206 I 1 IO_PAD845
+bit 205 O 1 IO_PAD845 204 1 Z
+bit 204 C 1 *
+bit 203 I 1 IO_PAD843
+bit 202 O 1 IO_PAD843 201 1 Z
+bit 201 C 1 *
+bit 200 I 1 IO_PAD841
+bit 199 O 1 IO_PAD841 198 1 Z
+bit 198 C 1 *
+bit 197 I 1 IO_PAD840
+bit 196 O 1 IO_PAD840 195 1 Z
+bit 195 C 1 *
+bit 194 I 1 IO_PAD839
+bit 193 O 1 IO_PAD839 192 1 Z
+bit 192 C 1 *
+bit 191 I 1 IO_PAD838
+bit 190 O 1 IO_PAD838 189 1 Z
+bit 189 C 1 *
+bit 188 I 1 IO_PAD837
+bit 187 O 1 IO_PAD837 186 1 Z
+bit 186 C 1 *
+bit 185 I 1 IO_PAD835
+bit 184 O 1 IO_PAD835 183 1 Z
+bit 183 C 1 *
+bit 182 I 1 IO_PAD833
+bit 181 O 1 IO_PAD833 180 1 Z
+bit 180 C 1 *
+bit 179 I 1 IO_PAD832
+bit 178 O 1 IO_PAD832 177 1 Z
+bit 177 C 1 *
+bit 176 I 1 IO_PAD831
+bit 175 O 1 IO_PAD831 174 1 Z
+bit 174 C 1 *
+bit 173 I 1 IO_PAD830
+bit 172 O 1 IO_PAD830 171 1 Z
+bit 171 C 1 *
+bit 170 I 1 IO_PAD829
+bit 169 O 1 IO_PAD829 168 1 Z
+bit 168 C 1 *
+bit 167 I 1 IO_PAD828
+bit 166 O 1 IO_PAD828 165 1 Z
+bit 165 C 1 *
+bit 164 I 1 IO_PAD827
+bit 163 O 1 IO_PAD827 162 1 Z
+bit 162 C 1 *
+bit 161 I 1 IO_PAD825
+bit 160 O 1 IO_PAD825 159 1 Z
+bit 159 C 1 *
+bit 158 I 1 IO_PAD823
+bit 157 O 1 IO_PAD823 156 1 Z
+bit 156 C 1 *
+bit 155 I 1 IO_PAD822
+bit 154 O 1 IO_PAD822 153 1 Z
+bit 153 C 1 *
+bit 152 I 1 IO_PAD821
+bit 151 O 1 IO_PAD821 150 1 Z
+bit 150 C 1 *
+bit 149 I 1 IO_PAD819
+bit 148 O 1 IO_PAD819 147 1 Z
+bit 147 C 1 *
+bit 146 I 1 IO_PAD818
+bit 145 O 1 IO_PAD818 144 1 Z
+bit 144 C 1 *
+bit 143 I 1 IO_PAD817
+bit 142 O 1 IO_PAD817 141 1 Z
+bit 141 C 1 *
+bit 140 I 1 IO_PAD815
+bit 139 O 1 IO_PAD815 138 1 Z
+bit 138 C 1 *
+bit 137 I 1 IO_PAD813
+bit 136 O 1 IO_PAD813 135 1 Z
+bit 135 C 1 *
+bit 134 I 1 IO_PAD811
+bit 133 O 1 IO_PAD811 132 1 Z
+bit 132 C 1 *
+bit 131 I 1 IO_PAD809
+bit 130 O 1 IO_PAD809 129 1 Z
+bit 129 C 1 *
+bit 128 I 1 IO_PAD808
+bit 127 O 1 IO_PAD808 126 1 Z
+bit 126 C 1 *
+bit 125 I 1 IO_PAD807
+bit 124 O 1 IO_PAD807 123 1 Z
+bit 123 C 1 *
+bit 122 I 1 IO_PAD806
+bit 121 O 1 IO_PAD806 120 1 Z
+bit 120 C 1 *
+bit 119 I 1 IO_PAD805
+bit 118 O 1 IO_PAD805 117 1 Z
+bit 117 C 1 *
+bit 116 I 1 IO_PAD803
+bit 115 O 1 IO_PAD803 114 1 Z
+bit 114 C 1 *
+bit 113 I 1 IO_PAD801
+bit 112 O 1 IO_PAD801 111 1 Z
+bit 111 C 1 *
+bit 110 I 1 IO_PAD800
+bit 109 O 1 IO_PAD800 108 1 Z
+bit 108 C 1 *
+bit 107 I 1 IO_PAD799
+bit 106 O 1 IO_PAD799 105 1 Z
+bit 105 C 1 *
+bit 104 I 1 IO_PAD797
+bit 103 O 1 IO_PAD797 102 1 Z
+bit 102 C 1 *
+bit 101 I 1 IO_PAD796
+bit 100 O 1 IO_PAD796 99 1 Z
+bit 99 C 1 *
+bit 98 I 1 IO_PAD795
+bit 97 O 1 IO_PAD795 96 1 Z
+bit 96 C 1 *
+bit 95 I 1 IO_PAD794
+bit 94 O 1 IO_PAD794 93 1 Z
+bit 93 C 1 *
+bit 92 I 1 IO_PAD793
+bit 91 O 1 IO_PAD793 90 1 Z
+bit 90 C 1 *
+bit 89 I 1 IO_PAD791
+bit 88 O 1 IO_PAD791 87 1 Z
+bit 87 C 1 *
+bit 86 I 1 IO_PAD790
+bit 85 O 1 IO_PAD790 84 1 Z
+bit 84 C 1 *
+bit 83 I 1 IO_PAD789
+bit 82 O 1 IO_PAD789 81 1 Z
+bit 81 C 1 *
+bit 80 I 1 IO_PAD787
+bit 79 O 1 IO_PAD787 78 1 Z
+bit 78 C 1 *
+bit 77 I 1 IO_PAD786
+bit 76 O 1 IO_PAD786 75 1 Z
+bit 75 C 1 *
+bit 74 I 1 IO_PAD785
+bit 73 O 1 IO_PAD785 72 1 Z
+bit 72 C 1 *
+bit 71 I 1 IO_PAD783
+bit 70 O 1 IO_PAD783 69 1 Z
+bit 69 C 1 *
+bit 68 I 1 IO_PAD781
+bit 67 O 1 IO_PAD781 66 1 Z
+bit 66 C 1 *
+bit 65 I 1 IO_PAD779
+bit 64 O 1 IO_PAD779 63 1 Z
+bit 63 C 1 *
+bit 62 I 1 IO_PAD777
+bit 61 O 1 IO_PAD777 60 1 Z
+bit 60 C 1 *
+bit 59 I 1 IO_PAD776
+bit 58 O 1 IO_PAD776 57 1 Z
+bit 57 C 1 *
+bit 56 I 1 IO_PAD775
+bit 55 O 1 IO_PAD775 54 1 Z
+bit 54 C 1 *
+bit 53 I 1 IO_PAD774
+bit 52 O 1 IO_PAD774 51 1 Z
+bit 51 C 1 *
+bit 50 I 1 IO_PAD773
+bit 49 O 1 IO_PAD773 48 1 Z
+bit 48 C 1 *
+bit 47 I 1 IO_PAD771
+bit 46 O 1 IO_PAD771 45 1 Z
+bit 45 C 1 *
+bit 44 I 1 IO_PAD769
+bit 43 O 1 IO_PAD769 42 1 Z
+bit 42 C 1 *
+bit 41 I 1 IO_PAD768
+bit 40 O 1 IO_PAD768 39 1 Z
+bit 39 C 1 *
+bit 38 I 1 IO_PAD767
+bit 37 O 1 IO_PAD767 36 1 Z
+bit 36 C 1 *
+bit 35 I 1 IO_PAD766
+bit 34 O 1 IO_PAD766 33 1 Z
+bit 33 C 1 *
+bit 32 I 1 IO_PAD765
+bit 31 O 1 IO_PAD765 30 1 Z
+bit 30 C 1 *
+bit 29 I 1 IO_PAD763
+bit 28 O 1 IO_PAD763 27 1 Z
+bit 27 C 1 *
+bit 26 I 1 IO_PAD762
+bit 25 O 1 IO_PAD762 24 1 Z
+bit 24 C 1 *
+bit 23 I 1 IO_PAD761
+bit 22 O 1 IO_PAD761 21 1 Z
+bit 21 C 1 *
+bit 20 I 1 IO_PAD759
+bit 19 O 1 IO_PAD759 18 1 Z
+bit 18 C 1 *
+bit 17 I 1 IO_PAD758
+bit 16 O 1 IO_PAD758 15 1 Z
+bit 15 C 1 *
+bit 14 I 1 IO_PAD757
+bit 13 O 1 IO_PAD757 12 1 Z
+bit 12 C 1 *
+bit 11 I 1 IO_PAD755
+bit 10 O 1 IO_PAD755 9 1 Z
+bit 9 C 1 *
+bit 8 I 1 IO_PAD754
+bit 7 O 1 IO_PAD754 6 1 Z
+bit 6 C 1 *
+bit 5 I 1 IO_PAD753
+bit 4 O 1 IO_PAD753 3 1 Z
+bit 3 C 1 *
+bit 2 I 1 IO_PAD752
+bit 1 O 1 IO_PAD752 0 1 Z
+bit 0 C 1 *
--- /dev/null
+signal CCLK_AA22
+signal DONE_AB21
+signal GND1
+signal GND2
+signal GND3
+signal GND4
+signal GND5
+signal GND6
+signal GND7
+signal GND8
+signal GND9
+signal GND10
+signal GND11
+signal GND12
+signal GND13
+signal GND14
+signal GND15
+signal GND16
+signal GND17
+signal GND18
+signal GND19
+signal GND20
+signal GND21
+signal GND22
+signal GND23
+signal GND24
+signal GND25
+signal GND26
+signal GND27
+signal GND28
+signal GND29
+signal GND30
+signal GND31
+signal GND32
+signal GND33
+signal GND34
+signal GND35
+signal GND36
+signal GND37
+signal GND38
+signal GND39
+signal GND40
+signal GND41
+signal GND42
+signal GND43
+signal GND44
+signal GND45
+signal GND46
+signal GND47
+signal GND48
+signal GND49
+signal GND50
+signal GND51
+signal GND52
+signal HSWAP_EN_B3
+signal M0_AB2
+signal M1_AA1
+signal M2_AB3
+signal PROG_B
+signal TCK
+signal TDI
+signal TDO
+signal TMS
+signal VCCAUX1
+signal VCCAUX2
+signal VCCAUX3
+signal VCCAUX4
+signal VCCAUX5
+signal VCCAUX6
+signal VCCAUX7
+signal VCCAUX8
+signal VCCINT1
+signal VCCINT2
+signal VCCINT3
+signal VCCINT4
+signal VCCINT5
+signal VCCINT6
+signal VCCINT7
+signal VCCINT8
+signal VCCINT9
+signal VCCINT10
+signal VCCINT11
+signal VCCINT12
+signal VCCO01
+signal VCCO02
+signal VCCO03
+signal VCCO04
+signal VCCO05
+signal VCCO11
+signal VCCO12
+signal VCCO13
+signal VCCO14
+signal VCCO15
+signal VCCO21
+signal VCCO22
+signal VCCO23
+signal VCCO24
+signal VCCO25
+signal VCCO31
+signal VCCO32
+signal VCCO33
+signal VCCO34
+signal VCCO35
+signal VCCO41
+signal VCCO42
+signal VCCO43
+signal VCCO44
+signal VCCO45
+signal VCCO51
+signal VCCO52
+signal VCCO53
+signal VCCO54
+signal VCCO55
+signal VCCO61
+signal VCCO62
+signal VCCO63
+signal VCCO64
+signal VCCO65
+signal VCCO71
+signal VCCO72
+signal VCCO73
+signal VCCO74
+signal VCCO75
+signal IO_A3
+signal IO_A4
+signal IO_A5
+signal IO_A7
+signal IO_A8
+signal IO_A9
+signal IO_A10
+signal IO_A11
+signal IO_A12
+signal IO_A13
+signal IO_A14
+signal IO_A15
+signal IO_A16
+signal IO_A18
+signal IO_A19
+signal IO_B4
+signal IO_B5
+signal IO_B6
+signal IO_B7
+signal IO_B8
+signal IO_B9
+signal IO_B10
+signal IO_B11
+signal IO_B12
+signal IO_B13
+signal IO_B14
+signal IO_B15
+signal IO_B16
+signal IO_B17
+signal IO_B18
+signal IO_B19
+signal IO_B20
+signal IO_C1
+signal IO_C2
+signal IO_C3
+signal IO_C4
+signal IO_C5
+signal IO_C6
+signal IO_C7
+signal IO_C10
+signal IO_C11
+signal IO_C12
+signal IO_C13
+signal IO_C16
+signal IO_C17
+signal IO_C18
+signal IO_C19
+signal IO_C20
+signal IO_C21
+signal IO_C22
+signal IO_D1
+signal IO_D2
+signal IO_D3
+signal IO_D4
+signal IO_D5
+signal IO_D6
+signal IO_D7
+signal IO_D8
+signal IO_D9
+signal IO_D10
+signal IO_D11
+signal IO_D12
+signal IO_D13
+signal IO_D14
+signal IO_D15
+signal IO_D16
+signal IO_D17
+signal IO_D18
+signal IO_D19
+signal IO_D20
+signal IO_D21
+signal IO_D22
+signal IO_E1
+signal IO_E2
+signal IO_E3
+signal IO_E4
+signal IO_E5
+signal IO_E6
+signal IO_E7
+signal IO_E8
+signal IO_E9
+signal IO_E10
+signal IO_E11
+signal IO_E12
+signal IO_E13
+signal IO_E14
+signal IO_E15
+signal IO_E16
+signal IO_E17
+signal IO_E18
+signal IO_E19
+signal IO_E20
+signal IO_E21
+signal IO_E22
+signal IO_F2
+signal IO_F3
+signal IO_F4
+signal IO_F5
+signal IO_F6
+signal IO_F7
+signal IO_F9
+signal IO_F10
+signal IO_F11
+signal IO_F12
+signal IO_F13
+signal IO_F14
+signal IO_F16
+signal IO_F17
+signal IO_F18
+signal IO_F19
+signal IO_F20
+signal IO_F21
+signal IO_G1
+signal IO_G2
+signal IO_G3
+signal IO_G4
+signal IO_G5
+signal IO_G6
+signal IO_G17
+signal IO_G18
+signal IO_G19
+signal IO_G20
+signal IO_G21
+signal IO_G22
+signal IO_H1
+signal IO_H2
+signal IO_H4
+signal IO_H5
+signal IO_H18
+signal IO_H19
+signal IO_H21
+signal IO_H22
+signal IO_J1
+signal IO_J2
+signal IO_J4
+signal IO_J5
+signal IO_J6
+signal IO_J17
+signal IO_J18
+signal IO_J19
+signal IO_J21
+signal IO_J22
+signal IO_K1
+signal IO_K2
+signal IO_K3
+signal IO_K4
+signal IO_K5
+signal IO_K6
+signal IO_K17
+signal IO_K18
+signal IO_K19
+signal IO_K20
+signal IO_K21
+signal IO_K22
+signal IO_L1
+signal IO_L2
+signal IO_L3
+signal IO_L4
+signal IO_L5
+signal IO_L6
+signal IO_L17
+signal IO_L18
+signal IO_L19
+signal IO_L20
+signal IO_L21
+signal IO_L22
+signal IO_M1
+signal IO_M2
+signal IO_M3
+signal IO_M4
+signal IO_M5
+signal IO_M6
+signal IO_M17
+signal IO_M18
+signal IO_M19
+signal IO_M20
+signal IO_M21
+signal IO_M22
+signal IO_N1
+signal IO_N2
+signal IO_N3
+signal IO_N4
+signal IO_N5
+signal IO_N6
+signal IO_N17
+signal IO_N18
+signal IO_N19
+signal IO_N20
+signal IO_N21
+signal IO_N22
+signal IO_P1
+signal IO_P2
+signal IO_P4
+signal IO_P5
+signal IO_P6
+signal IO_P17
+signal IO_P18
+signal IO_P19
+signal IO_P21
+signal IO_P22
+signal IO_R1
+signal IO_R2
+signal IO_R4
+signal IO_R5
+signal IO_R18
+signal IO_R19
+signal IO_R21
+signal IO_R22
+signal IO_T1
+signal IO_T2
+signal IO_T3
+signal IO_T4
+signal IO_T5
+signal IO_T6
+signal IO_T17
+signal IO_T18
+signal IO_T19
+signal IO_T20
+signal IO_T21
+signal IO_T22
+signal IO_U2
+signal IO_U3
+signal IO_U4
+signal IO_U5
+signal IO_U6
+signal IO_U7
+signal IO_U9
+signal IO_U10
+signal IO_U11
+signal IO_U12
+signal IO_U13
+signal IO_U14
+signal IO_U16
+signal IO_U17
+signal IO_U18
+signal IO_U19
+signal IO_U20
+signal IO_U21
+signal IO_V1
+signal IO_V2
+signal IO_V3
+signal IO_V4
+signal IO_V5
+signal IO_V6
+signal IO_V7
+signal IO_V8
+signal IO_V9
+signal IO_V10
+signal IO_V11
+signal IO_V12
+signal IO_V13
+signal IO_V14
+signal IO_V15
+signal IO_V16
+signal IO_V17
+signal IO_V18
+signal IO_V19
+signal IO_V20
+signal IO_V21
+signal IO_V22
+signal IO_W1
+signal IO_W2
+signal IO_W3
+signal IO_W4
+signal IO_W5
+signal IO_W6
+signal IO_W7
+signal IO_W8
+signal IO_W9
+signal IO_W10
+signal IO_W11
+signal IO_W12
+signal IO_W13
+signal IO_W14
+signal IO_W15
+signal IO_W16
+signal IO_W17
+signal IO_W18
+signal IO_W19
+signal IO_W20
+signal IO_W21
+signal IO_W22
+signal IO_Y1
+signal IO_Y2
+signal IO_Y3
+signal IO_Y4
+signal IO_Y5
+signal IO_Y6
+signal IO_Y7
+signal IO_Y10
+signal IO_Y11
+signal IO_Y12
+signal IO_Y13
+signal IO_Y16
+signal IO_Y17
+signal IO_Y18
+signal IO_Y19
+signal IO_Y20
+signal IO_Y21
+signal IO_Y22
+signal IO_AA3
+signal IO_AA4
+signal IO_AA5
+signal IO_AA6
+signal IO_AA7
+signal IO_AA8
+signal IO_AA9
+signal IO_AA10
+signal IO_AA11
+signal IO_AA12
+signal IO_AA13
+signal IO_AA14
+signal IO_AA15
+signal IO_AA16
+signal IO_AA17
+signal IO_AA18
+signal IO_AA19
+signal IO_AA20
+signal IO_AB4
+signal IO_AB5
+signal IO_AB7
+signal IO_AB8
+signal IO_AB9
+signal IO_AB10
+signal IO_AB11
+signal IO_AB12
+signal IO_AB13
+signal IO_AB14
+signal IO_AB15
+signal IO_AB16
+signal IO_AB18
+signal IO_AB19
+
+register BSR 1931
+register BR 1
+register DIR 32
+
+instruction length 6
+
+instruction EXTEST 000000 BSR
+instruction SAMPLE/PRELOAD 000001 BSR
+instruction IDCODE 001001 DIR
+instruction BYPASS 111111 BR
+
+bit 1930 I 1 IO_C20
+bit 1929 O 1 IO_C20 1928 1 Z
+bit 1928 C 1 *
+bit 1927 I 1 IO_C21
+bit 1926 O 1 IO_C21 1925 1 Z
+bit 1925 C 1 *
+bit 1924 O 1 *
+bit 1923 O 1 *
+bit 1922 O 1 *
+bit 1921 O 1 *
+bit 1920 O 1 *
+bit 1919 O 1 *
+bit 1918 O 1 *
+bit 1917 O 1 *
+bit 1916 O 1 *
+bit 1915 O 1 *
+bit 1914 O 1 *
+bit 1913 O 1 *
+bit 1912 O 1 *
+bit 1911 O 1 *
+bit 1910 O 1 *
+bit 1909 O 1 *
+bit 1908 O 1 *
+bit 1907 O 1 *
+bit 1906 O 1 *
+bit 1905 O 1 *
+bit 1904 O 1 *
+bit 1903 O 1 *
+bit 1902 O 1 *
+bit 1901 O 1 *
+bit 1900 O 1 *
+bit 1899 O 1 *
+bit 1898 O 1 *
+bit 1897 O 1 *
+bit 1896 O 1 *
+bit 1895 O 1 *
+bit 1894 O 1 *
+bit 1893 O 1 *
+bit 1892 O 1 *
+bit 1891 O 1 *
+bit 1890 O 1 *
+bit 1889 O 1 *
+bit 1888 O 1 *
+bit 1887 O 1 *
+bit 1886 O 1 *
+bit 1885 O 1 *
+bit 1884 O 1 *
+bit 1883 O 1 *
+bit 1882 O 1 *
+bit 1881 O 1 *
+bit 1880 O 1 *
+bit 1879 O 1 *
+bit 1878 O 1 *
+bit 1877 O 1 *
+bit 1876 O 1 *
+bit 1875 O 1 *
+bit 1874 O 1 *
+bit 1873 O 1 *
+bit 1872 O 1 *
+bit 1871 O 1 *
+bit 1870 O 1 *
+bit 1869 O 1 *
+bit 1868 O 1 *
+bit 1867 O 1 *
+bit 1866 O 1 *
+bit 1865 O 1 *
+bit 1864 O 1 *
+bit 1863 O 1 *
+bit 1862 O 1 *
+bit 1861 O 1 *
+bit 1860 O 1 *
+bit 1859 O 1 *
+bit 1858 O 1 *
+bit 1857 O 1 *
+bit 1856 O 1 *
+bit 1855 O 1 *
+bit 1854 O 1 *
+bit 1853 O 1 *
+bit 1852 O 1 *
+bit 1851 O 1 *
+bit 1850 O 1 *
+bit 1849 I 1 IO_C22
+bit 1848 O 1 IO_C22 1847 1 Z
+bit 1847 C 1 *
+bit 1846 O 1 *
+bit 1845 O 1 *
+bit 1844 O 1 *
+bit 1843 O 1 *
+bit 1842 O 1 *
+bit 1841 O 1 *
+bit 1840 I 1 IO_D20
+bit 1839 O 1 IO_D20 1838 1 Z
+bit 1838 C 1 *
+bit 1837 I 1 IO_D19
+bit 1836 O 1 IO_D19 1835 1 Z
+bit 1835 C 1 *
+bit 1834 I 1 IO_D21
+bit 1833 O 1 IO_D21 1832 1 Z
+bit 1832 C 1 *
+bit 1831 I 1 IO_D22
+bit 1830 O 1 IO_D22 1829 1 Z
+bit 1829 C 1 *
+bit 1828 O 1 *
+bit 1827 O 1 *
+bit 1826 O 1 *
+bit 1825 O 1 *
+bit 1824 O 1 *
+bit 1823 O 1 *
+bit 1822 I 1 IO_E18
+bit 1821 O 1 IO_E18 1820 1 Z
+bit 1820 C 1 *
+bit 1819 I 1 IO_F18
+bit 1818 O 1 IO_F18 1817 1 Z
+bit 1817 C 1 *
+bit 1816 I 1 IO_E19
+bit 1815 O 1 IO_E19 1814 1 Z
+bit 1814 C 1 *
+bit 1813 I 1 IO_E20
+bit 1812 O 1 IO_E20 1811 1 Z
+bit 1811 C 1 *
+bit 1810 I 1 IO_E21
+bit 1809 O 1 IO_E21 1808 1 Z
+bit 1808 C 1 *
+bit 1807 I 1 IO_E22
+bit 1806 O 1 IO_E22 1805 1 Z
+bit 1805 C 1 *
+bit 1804 I 1 IO_G17
+bit 1803 O 1 IO_G17 1802 1 Z
+bit 1802 C 1 *
+bit 1801 I 1 IO_G18
+bit 1800 O 1 IO_G18 1799 1 Z
+bit 1799 C 1 *
+bit 1798 I 1 IO_F19
+bit 1797 O 1 IO_F19 1796 1 Z
+bit 1796 C 1 *
+bit 1795 I 1 IO_G19
+bit 1794 O 1 IO_G19 1793 1 Z
+bit 1793 C 1 *
+bit 1792 I 1 IO_F20
+bit 1791 O 1 IO_F20 1790 1 Z
+bit 1790 C 1 *
+bit 1789 I 1 IO_F21
+bit 1788 O 1 IO_F21 1787 1 Z
+bit 1787 C 1 *
+bit 1786 O 1 *
+bit 1785 O 1 *
+bit 1784 O 1 *
+bit 1783 O 1 *
+bit 1782 O 1 *
+bit 1781 O 1 *
+bit 1780 I 1 IO_G20
+bit 1779 O 1 IO_G20 1778 1 Z
+bit 1778 C 1 *
+bit 1777 I 1 IO_H19
+bit 1776 O 1 IO_H19 1775 1 Z
+bit 1775 C 1 *
+bit 1774 I 1 IO_G21
+bit 1773 O 1 IO_G21 1772 1 Z
+bit 1772 C 1 *
+bit 1771 I 1 IO_G22
+bit 1770 O 1 IO_G22 1769 1 Z
+bit 1769 C 1 *
+bit 1768 I 1 IO_H18
+bit 1767 O 1 IO_H18 1766 1 Z
+bit 1766 C 1 *
+bit 1765 I 1 IO_J17
+bit 1764 O 1 IO_J17 1763 1 Z
+bit 1763 C 1 *
+bit 1762 I 1 IO_H21
+bit 1761 O 1 IO_H21 1760 1 Z
+bit 1760 C 1 *
+bit 1759 I 1 IO_H22
+bit 1758 O 1 IO_H22 1757 1 Z
+bit 1757 C 1 *
+bit 1756 O 1 *
+bit 1755 O 1 *
+bit 1754 O 1 *
+bit 1753 O 1 *
+bit 1752 O 1 *
+bit 1751 O 1 *
+bit 1750 I 1 IO_J18
+bit 1749 O 1 IO_J18 1748 1 Z
+bit 1748 C 1 *
+bit 1747 I 1 IO_J19
+bit 1746 O 1 IO_J19 1745 1 Z
+bit 1745 C 1 *
+bit 1744 I 1 IO_J21
+bit 1743 O 1 IO_J21 1742 1 Z
+bit 1742 C 1 *
+bit 1741 I 1 IO_J22
+bit 1740 O 1 IO_J22 1739 1 Z
+bit 1739 C 1 *
+bit 1738 I 1 IO_K17
+bit 1737 O 1 IO_K17 1736 1 Z
+bit 1736 C 1 *
+bit 1735 I 1 IO_K18
+bit 1734 O 1 IO_K18 1733 1 Z
+bit 1733 C 1 *
+bit 1732 I 1 IO_K19
+bit 1731 O 1 IO_K19 1730 1 Z
+bit 1730 C 1 *
+bit 1729 I 1 IO_K20
+bit 1728 O 1 IO_K20 1727 1 Z
+bit 1727 C 1 *
+bit 1726 I 1 IO_K21
+bit 1725 O 1 IO_K21 1724 1 Z
+bit 1724 C 1 *
+bit 1723 I 1 IO_K22
+bit 1722 O 1 IO_K22 1721 1 Z
+bit 1721 C 1 *
+bit 1720 O 1 *
+bit 1719 O 1 *
+bit 1718 O 1 *
+bit 1717 O 1 *
+bit 1716 O 1 *
+bit 1715 O 1 *
+bit 1714 O 1 *
+bit 1713 O 1 *
+bit 1712 O 1 *
+bit 1711 O 1 *
+bit 1710 O 1 *
+bit 1709 O 1 *
+bit 1708 I 1 IO_L17
+bit 1707 O 1 IO_L17 1706 1 Z
+bit 1706 C 1 *
+bit 1705 I 1 IO_L18
+bit 1704 O 1 IO_L18 1703 1 Z
+bit 1703 C 1 *
+bit 1702 I 1 IO_L19
+bit 1701 O 1 IO_L19 1700 1 Z
+bit 1700 C 1 *
+bit 1699 I 1 IO_L20
+bit 1698 O 1 IO_L20 1697 1 Z
+bit 1697 C 1 *
+bit 1696 I 1 IO_L21
+bit 1695 O 1 IO_L21 1694 1 Z
+bit 1694 C 1 *
+bit 1693 I 1 IO_L22
+bit 1692 O 1 IO_L22 1691 1 Z
+bit 1691 C 1 *
+bit 1690 I 1 IO_M22
+bit 1689 O 1 IO_M22 1688 1 Z
+bit 1688 C 1 *
+bit 1687 I 1 IO_M21
+bit 1686 O 1 IO_M21 1685 1 Z
+bit 1685 C 1 *
+bit 1684 I 1 IO_M20
+bit 1683 O 1 IO_M20 1682 1 Z
+bit 1682 C 1 *
+bit 1681 I 1 IO_M19
+bit 1680 O 1 IO_M19 1679 1 Z
+bit 1679 C 1 *
+bit 1678 I 1 IO_M18
+bit 1677 O 1 IO_M18 1676 1 Z
+bit 1676 C 1 *
+bit 1675 I 1 IO_M17
+bit 1674 O 1 IO_M17 1673 1 Z
+bit 1673 C 1 *
+bit 1672 O 1 *
+bit 1671 O 1 *
+bit 1670 O 1 *
+bit 1669 O 1 *
+bit 1668 O 1 *
+bit 1667 O 1 *
+bit 1666 O 1 *
+bit 1665 O 1 *
+bit 1664 O 1 *
+bit 1663 O 1 *
+bit 1662 O 1 *
+bit 1661 O 1 *
+bit 1660 I 1 IO_N22
+bit 1659 O 1 IO_N22 1658 1 Z
+bit 1658 C 1 *
+bit 1657 I 1 IO_N21
+bit 1656 O 1 IO_N21 1655 1 Z
+bit 1655 C 1 *
+bit 1654 I 1 IO_N20
+bit 1653 O 1 IO_N20 1652 1 Z
+bit 1652 C 1 *
+bit 1651 I 1 IO_N19
+bit 1650 O 1 IO_N19 1649 1 Z
+bit 1649 C 1 *
+bit 1648 I 1 IO_N18
+bit 1647 O 1 IO_N18 1646 1 Z
+bit 1646 C 1 *
+bit 1645 I 1 IO_N17
+bit 1644 O 1 IO_N17 1643 1 Z
+bit 1643 C 1 *
+bit 1642 I 1 IO_P22
+bit 1641 O 1 IO_P22 1640 1 Z
+bit 1640 C 1 *
+bit 1639 I 1 IO_P21
+bit 1638 O 1 IO_P21 1637 1 Z
+bit 1637 C 1 *
+bit 1636 I 1 IO_P18
+bit 1635 O 1 IO_P18 1634 1 Z
+bit 1634 C 1 *
+bit 1633 I 1 IO_P17
+bit 1632 O 1 IO_P17 1631 1 Z
+bit 1631 C 1 *
+bit 1630 O 1 *
+bit 1629 O 1 *
+bit 1628 O 1 *
+bit 1627 O 1 *
+bit 1626 O 1 *
+bit 1625 O 1 *
+bit 1624 I 1 IO_P19
+bit 1623 O 1 IO_P19 1622 1 Z
+bit 1622 C 1 *
+bit 1621 I 1 IO_R19
+bit 1620 O 1 IO_R19 1619 1 Z
+bit 1619 C 1 *
+bit 1618 I 1 IO_R22
+bit 1617 O 1 IO_R22 1616 1 Z
+bit 1616 C 1 *
+bit 1615 I 1 IO_R21
+bit 1614 O 1 IO_R21 1613 1 Z
+bit 1613 C 1 *
+bit 1612 I 1 IO_T22
+bit 1611 O 1 IO_T22 1610 1 Z
+bit 1610 C 1 *
+bit 1609 I 1 IO_T21
+bit 1608 O 1 IO_T21 1607 1 Z
+bit 1607 C 1 *
+bit 1606 I 1 IO_T20
+bit 1605 O 1 IO_T20 1604 1 Z
+bit 1604 C 1 *
+bit 1603 I 1 IO_T19
+bit 1602 O 1 IO_T19 1601 1 Z
+bit 1601 C 1 *
+bit 1600 O 1 *
+bit 1599 O 1 *
+bit 1598 O 1 *
+bit 1597 O 1 *
+bit 1596 O 1 *
+bit 1595 O 1 *
+bit 1594 I 1 IO_R18
+bit 1593 O 1 IO_R18 1592 1 Z
+bit 1592 C 1 *
+bit 1591 I 1 IO_T18
+bit 1590 O 1 IO_T18 1589 1 Z
+bit 1589 C 1 *
+bit 1588 I 1 IO_U21
+bit 1587 O 1 IO_U21 1586 1 Z
+bit 1586 C 1 *
+bit 1585 I 1 IO_U20
+bit 1584 O 1 IO_U20 1583 1 Z
+bit 1583 C 1 *
+bit 1582 I 1 IO_T17
+bit 1581 O 1 IO_T17 1580 1 Z
+bit 1580 C 1 *
+bit 1579 I 1 IO_U18
+bit 1578 O 1 IO_U18 1577 1 Z
+bit 1577 C 1 *
+bit 1576 I 1 IO_V22
+bit 1575 O 1 IO_V22 1574 1 Z
+bit 1574 C 1 *
+bit 1573 I 1 IO_V21
+bit 1572 O 1 IO_V21 1571 1 Z
+bit 1571 C 1 *
+bit 1570 I 1 IO_U19
+bit 1569 O 1 IO_U19 1568 1 Z
+bit 1568 C 1 *
+bit 1567 I 1 IO_V20
+bit 1566 O 1 IO_V20 1565 1 Z
+bit 1565 C 1 *
+bit 1564 I 1 IO_W21
+bit 1563 O 1 IO_W21 1562 1 Z
+bit 1562 C 1 *
+bit 1561 I 1 IO_W20
+bit 1560 O 1 IO_W20 1559 1 Z
+bit 1559 C 1 *
+bit 1558 O 1 *
+bit 1557 O 1 *
+bit 1556 O 1 *
+bit 1555 O 1 *
+bit 1554 O 1 *
+bit 1553 O 1 *
+bit 1552 I 1 IO_V19
+bit 1551 O 1 IO_V19 1550 1 Z
+bit 1550 C 1 *
+bit 1549 I 1 IO_W19
+bit 1548 O 1 IO_W19 1547 1 Z
+bit 1547 C 1 *
+bit 1546 I 1 IO_W22
+bit 1545 O 1 IO_W22 1544 1 Z
+bit 1544 C 1 *
+bit 1543 I 1 IO_Y22
+bit 1542 O 1 IO_Y22 1541 1 Z
+bit 1541 C 1 *
+bit 1540 O 1 *
+bit 1539 O 1 *
+bit 1538 O 1 *
+bit 1537 O 1 *
+bit 1536 O 1 *
+bit 1535 O 1 *
+bit 1534 I 1 IO_Y21
+bit 1533 O 1 IO_Y21 1532 1 Z
+bit 1532 C 1 *
+bit 1531 O 1 *
+bit 1530 O 1 *
+bit 1529 O 1 *
+bit 1528 O 1 *
+bit 1527 O 1 *
+bit 1526 O 1 *
+bit 1525 O 1 *
+bit 1524 O 1 *
+bit 1523 O 1 *
+bit 1522 O 1 *
+bit 1521 O 1 *
+bit 1520 O 1 *
+bit 1519 O 1 *
+bit 1518 O 1 *
+bit 1517 O 1 *
+bit 1516 O 1 *
+bit 1515 O 1 *
+bit 1514 O 1 *
+bit 1513 O 1 *
+bit 1512 O 1 *
+bit 1511 O 1 *
+bit 1510 O 1 *
+bit 1509 O 1 *
+bit 1508 O 1 *
+bit 1507 O 1 *
+bit 1506 O 1 *
+bit 1505 O 1 *
+bit 1504 O 1 *
+bit 1503 O 1 *
+bit 1502 O 1 *
+bit 1501 O 1 *
+bit 1500 O 1 *
+bit 1499 O 1 *
+bit 1498 O 1 *
+bit 1497 O 1 *
+bit 1496 O 1 *
+bit 1495 O 1 *
+bit 1494 O 1 *
+bit 1493 O 1 *
+bit 1492 O 1 *
+bit 1491 O 1 *
+bit 1490 O 1 *
+bit 1489 O 1 *
+bit 1488 O 1 *
+bit 1487 O 1 *
+bit 1486 O 1 *
+bit 1485 O 1 *
+bit 1484 O 1 *
+bit 1483 O 1 *
+bit 1482 O 1 *
+bit 1481 O 1 *
+bit 1480 O 1 *
+bit 1479 O 1 *
+bit 1478 O 1 *
+bit 1477 O 1 *
+bit 1476 O 1 *
+bit 1475 O 1 *
+bit 1474 O 1 *
+bit 1473 O 1 *
+bit 1472 O 1 *
+bit 1471 O 1 *
+bit 1470 O 1 *
+bit 1469 O 1 *
+bit 1468 O 1 *
+bit 1467 O 1 *
+bit 1466 O 1 *
+bit 1465 O 1 *
+bit 1464 O 1 *
+bit 1463 O 1 *
+bit 1462 O 1 *
+bit 1461 O 1 *
+bit 1460 O 1 *
+bit 1459 O 1 *
+bit 1458 O 1 *
+bit 1457 O 1 *
+bit 1456 I 1 IO_Y20
+bit 1455 O 1 IO_Y20 1454 1 Z
+bit 1454 C 1 *
+bit 1453 I 1 IO_Y19
+bit 1452 O 1 IO_Y19 1451 1 Z
+bit 1451 C 1 *
+bit 1450 I 1 CCLK_AA22
+bit 1449 O 1 CCLK_AA22 1448 1 Z
+bit 1448 C 1 *
+bit 1447 I 1 DONE_AB21
+bit 1446 O 1 DONE_AB21 1445 1 Z
+bit 1445 C 1 *
+bit 1444 I 1 IO_V18
+bit 1443 O 1 IO_V18 1442 1 Z
+bit 1442 C 1 *
+bit 1441 I 1 IO_AA20
+bit 1440 O 1 IO_AA20 1439 1 Z
+bit 1439 C 1 *
+bit 1438 I 1 IO_AB20
+bit 1437 O 1 IO_AB20 1436 1 Z
+bit 1436 C 1 *
+bit 1435 O 1 *
+bit 1434 O 1 *
+bit 1433 O 1 *
+bit 1432 O 1 *
+bit 1431 O 1 *
+bit 1430 O 1 *
+bit 1429 O 1 *
+bit 1428 O 1 *
+bit 1427 O 1 *
+bit 1426 O 1 *
+bit 1425 O 1 *
+bit 1424 O 1 *
+bit 1423 O 1 *
+bit 1422 O 1 *
+bit 1421 O 1 *
+bit 1420 O 1 *
+bit 1419 O 1 *
+bit 1418 O 1 *
+bit 1417 O 1 *
+bit 1416 O 1 *
+bit 1415 O 1 *
+bit 1414 O 1 *
+bit 1413 O 1 *
+bit 1412 O 1 *
+bit 1411 I 1 IO_AA19
+bit 1410 O 1 IO_AA19 1409 1 Z
+bit 1409 C 1 *
+bit 1408 I 1 IO_AB19
+bit 1407 O 1 IO_AB19 1406 1 Z
+bit 1406 C 1 *
+bit 1405 I 1 IO_W18
+bit 1404 O 1 IO_W18 1403 1 Z
+bit 1403 C 1 *
+bit 1402 I 1 IO_Y18
+bit 1401 O 1 IO_Y18 1400 1 Z
+bit 1400 C 1 *
+bit 1399 O 1 *
+bit 1398 O 1 *
+bit 1397 O 1 *
+bit 1396 O 1 *
+bit 1395 O 1 *
+bit 1394 O 1 *
+bit 1393 O 1 *
+bit 1392 O 1 *
+bit 1391 O 1 *
+bit 1390 O 1 *
+bit 1389 O 1 *
+bit 1388 O 1 *
+bit 1387 O 1 *
+bit 1386 O 1 *
+bit 1385 O 1 *
+bit 1384 I 1 IO_U17
+bit 1383 O 1 IO_U17 1382 1 Z
+bit 1382 C 1 *
+bit 1381 I 1 IO_AA18
+bit 1380 O 1 IO_AA18 1379 1 Z
+bit 1379 C 1 *
+bit 1378 I 1 IO_AB18
+bit 1377 O 1 IO_AB18 1376 1 Z
+bit 1376 C 1 *
+bit 1375 I 1 IO_V17
+bit 1374 O 1 IO_V17 1373 1 Z
+bit 1373 C 1 *
+bit 1372 I 1 IO_W17
+bit 1371 O 1 IO_W17 1370 1 Z
+bit 1370 C 1 *
+bit 1369 I 1 IO_U16
+bit 1368 O 1 IO_U16 1367 1 Z
+bit 1367 C 1 *
+bit 1366 O 1 *
+bit 1365 O 1 *
+bit 1364 O 1 *
+bit 1363 O 1 *
+bit 1362 O 1 *
+bit 1361 O 1 *
+bit 1360 O 1 *
+bit 1359 O 1 *
+bit 1358 O 1 *
+bit 1357 O 1 *
+bit 1356 O 1 *
+bit 1355 O 1 *
+bit 1354 O 1 *
+bit 1353 O 1 *
+bit 1352 O 1 *
+bit 1351 O 1 *
+bit 1350 O 1 *
+bit 1349 O 1 *
+bit 1348 O 1 *
+bit 1347 O 1 *
+bit 1346 O 1 *
+bit 1345 O 1 *
+bit 1344 O 1 *
+bit 1343 O 1 *
+bit 1342 O 1 *
+bit 1341 O 1 *
+bit 1340 O 1 *
+bit 1339 O 1 *
+bit 1338 O 1 *
+bit 1337 O 1 *
+bit 1336 I 1 IO_Y17
+bit 1335 O 1 IO_Y17 1334 1 Z
+bit 1334 C 1 *
+bit 1333 I 1 IO_AA17
+bit 1332 O 1 IO_AA17 1331 1 Z
+bit 1331 C 1 *
+bit 1330 I 1 IO_V16
+bit 1329 O 1 IO_V16 1328 1 Z
+bit 1328 C 1 *
+bit 1327 I 1 IO_W16
+bit 1326 O 1 IO_W16 1325 1 Z
+bit 1325 C 1 *
+bit 1324 O 1 *
+bit 1323 O 1 *
+bit 1322 O 1 *
+bit 1321 O 1 *
+bit 1320 O 1 *
+bit 1319 O 1 *
+bit 1318 O 1 *
+bit 1317 O 1 *
+bit 1316 O 1 *
+bit 1315 O 1 *
+bit 1314 O 1 *
+bit 1313 O 1 *
+bit 1312 O 1 *
+bit 1311 O 1 *
+bit 1310 O 1 *
+bit 1309 I 1 IO_Y16
+bit 1308 O 1 IO_Y16 1307 1 Z
+bit 1307 C 1 *
+bit 1306 I 1 IO_AA16
+bit 1305 O 1 IO_AA16 1304 1 Z
+bit 1304 C 1 *
+bit 1303 I 1 IO_AB16
+bit 1302 O 1 IO_AB16 1301 1 Z
+bit 1301 C 1 *
+bit 1300 O 1 *
+bit 1299 O 1 *
+bit 1298 O 1 *
+bit 1297 O 1 *
+bit 1296 O 1 *
+bit 1295 O 1 *
+bit 1294 O 1 *
+bit 1293 O 1 *
+bit 1292 O 1 *
+bit 1291 O 1 *
+bit 1290 O 1 *
+bit 1289 O 1 *
+bit 1288 O 1 *
+bit 1287 O 1 *
+bit 1286 O 1 *
+bit 1285 I 1 IO_V15
+bit 1284 O 1 IO_V15 1283 1 Z
+bit 1283 C 1 *
+bit 1282 I 1 IO_W15
+bit 1281 O 1 IO_W15 1280 1 Z
+bit 1280 C 1 *
+bit 1279 O 1 *
+bit 1278 O 1 *
+bit 1277 O 1 *
+bit 1276 O 1 *
+bit 1275 O 1 *
+bit 1274 O 1 *
+bit 1273 O 1 *
+bit 1272 O 1 *
+bit 1271 O 1 *
+bit 1270 I 1 IO_AA15
+bit 1269 O 1 IO_AA15 1268 1 Z
+bit 1268 C 1 *
+bit 1267 I 1 IO_AB15
+bit 1266 O 1 IO_AB15 1265 1 Z
+bit 1265 C 1 *
+bit 1264 O 1 *
+bit 1263 O 1 *
+bit 1262 O 1 *
+bit 1261 I 1 IO_U14
+bit 1260 O 1 IO_U14 1259 1 Z
+bit 1259 C 1 *
+bit 1258 I 1 IO_V14
+bit 1257 O 1 IO_V14 1256 1 Z
+bit 1256 C 1 *
+bit 1255 O 1 *
+bit 1254 O 1 *
+bit 1253 O 1 *
+bit 1252 O 1 *
+bit 1251 O 1 *
+bit 1250 O 1 *
+bit 1249 I 1 IO_W14
+bit 1248 O 1 IO_W14 1247 1 Z
+bit 1247 C 1 *
+bit 1246 I 1 IO_AA14
+bit 1245 O 1 IO_AA14 1244 1 Z
+bit 1244 C 1 *
+bit 1243 I 1 IO_AB14
+bit 1242 O 1 IO_AB14 1241 1 Z
+bit 1241 C 1 *
+bit 1240 I 1 IO_U13
+bit 1239 O 1 IO_U13 1238 1 Z
+bit 1238 C 1 *
+bit 1237 I 1 IO_V13
+bit 1236 O 1 IO_V13 1235 1 Z
+bit 1235 C 1 *
+bit 1234 I 1 IO_W13
+bit 1233 O 1 IO_W13 1232 1 Z
+bit 1232 C 1 *
+bit 1231 I 1 IO_Y13
+bit 1230 O 1 IO_Y13 1229 1 Z
+bit 1229 C 1 *
+bit 1228 I 1 IO_AA13
+bit 1227 O 1 IO_AA13 1226 1 Z
+bit 1226 C 1 *
+bit 1225 I 1 IO_U12
+bit 1224 O 1 IO_U12 1223 1 Z
+bit 1223 C 1 *
+bit 1222 I 1 IO_V12
+bit 1221 O 1 IO_V12 1220 1 Z
+bit 1220 C 1 *
+bit 1219 I 1 IO_AB13
+bit 1218 O 1 IO_AB13 1217 1 Z
+bit 1217 C 1 *
+bit 1216 I 1 IO_W12
+bit 1215 O 1 IO_W12 1214 1 Z
+bit 1214 C 1 *
+bit 1213 I 1 IO_Y12
+bit 1212 O 1 IO_Y12 1211 1 Z
+bit 1211 C 1 *
+bit 1210 I 1 IO_AA12
+bit 1209 O 1 IO_AA12 1208 1 Z
+bit 1208 C 1 *
+bit 1207 I 1 IO_AB12
+bit 1206 O 1 IO_AB12 1205 1 Z
+bit 1205 C 1 *
+bit 1204 I 1 IO_AB11
+bit 1203 O 1 IO_AB11 1202 1 Z
+bit 1202 C 1 *
+bit 1201 I 1 IO_AA11
+bit 1200 O 1 IO_AA11 1199 1 Z
+bit 1199 C 1 *
+bit 1198 I 1 IO_Y11
+bit 1197 O 1 IO_Y11 1196 1 Z
+bit 1196 C 1 *
+bit 1195 I 1 IO_W11
+bit 1194 O 1 IO_W11 1193 1 Z
+bit 1193 C 1 *
+bit 1192 I 1 IO_V11
+bit 1191 O 1 IO_V11 1190 1 Z
+bit 1190 C 1 *
+bit 1189 I 1 IO_U11
+bit 1188 O 1 IO_U11 1187 1 Z
+bit 1187 C 1 *
+bit 1186 I 1 IO_AB10
+bit 1185 O 1 IO_AB10 1184 1 Z
+bit 1184 C 1 *
+bit 1183 I 1 IO_AA10
+bit 1182 O 1 IO_AA10 1181 1 Z
+bit 1181 C 1 *
+bit 1180 I 1 IO_Y10
+bit 1179 O 1 IO_Y10 1178 1 Z
+bit 1178 C 1 *
+bit 1177 I 1 IO_W10
+bit 1176 O 1 IO_W10 1175 1 Z
+bit 1175 C 1 *
+bit 1174 I 1 IO_V10
+bit 1173 O 1 IO_V10 1172 1 Z
+bit 1172 C 1 *
+bit 1171 I 1 IO_AB9
+bit 1170 O 1 IO_AB9 1169 1 Z
+bit 1169 C 1 *
+bit 1168 I 1 IO_AA9
+bit 1167 O 1 IO_AA9 1166 1 Z
+bit 1166 C 1 *
+bit 1165 I 1 IO_W9
+bit 1164 O 1 IO_W9 1163 1 Z
+bit 1163 C 1 *
+bit 1162 I 1 IO_V9
+bit 1161 O 1 IO_V9 1160 1 Z
+bit 1160 C 1 *
+bit 1159 I 1 IO_U10
+bit 1158 O 1 IO_U10 1157 1 Z
+bit 1157 C 1 *
+bit 1156 O 1 *
+bit 1155 O 1 *
+bit 1154 O 1 *
+bit 1153 O 1 *
+bit 1152 O 1 *
+bit 1151 O 1 *
+bit 1150 I 1 IO_AB8
+bit 1149 O 1 IO_AB8 1148 1 Z
+bit 1148 C 1 *
+bit 1147 I 1 IO_AA8
+bit 1146 O 1 IO_AA8 1145 1 Z
+bit 1145 C 1 *
+bit 1144 O 1 *
+bit 1143 O 1 *
+bit 1142 O 1 *
+bit 1141 I 1 IO_W8
+bit 1140 O 1 IO_W8 1139 1 Z
+bit 1139 C 1 *
+bit 1138 I 1 IO_V8
+bit 1137 O 1 IO_V8 1136 1 Z
+bit 1136 C 1 *
+bit 1135 O 1 *
+bit 1134 O 1 *
+bit 1133 O 1 *
+bit 1132 O 1 *
+bit 1131 O 1 *
+bit 1130 O 1 *
+bit 1129 I 1 IO_U9
+bit 1128 O 1 IO_U9 1127 1 Z
+bit 1127 C 1 *
+bit 1126 I 1 IO_AB7
+bit 1125 O 1 IO_AB7 1124 1 Z
+bit 1124 C 1 *
+bit 1123 I 1 IO_AA7
+bit 1122 O 1 IO_AA7 1121 1 Z
+bit 1121 C 1 *
+bit 1120 O 1 *
+bit 1119 O 1 *
+bit 1118 O 1 *
+bit 1117 O 1 *
+bit 1116 O 1 *
+bit 1115 O 1 *
+bit 1114 O 1 *
+bit 1113 O 1 *
+bit 1112 O 1 *
+bit 1111 O 1 *
+bit 1110 O 1 *
+bit 1109 O 1 *
+bit 1108 O 1 *
+bit 1107 O 1 *
+bit 1106 O 1 *
+bit 1105 I 1 IO_Y7
+bit 1104 O 1 IO_Y7 1103 1 Z
+bit 1103 C 1 *
+bit 1102 I 1 IO_W7
+bit 1101 O 1 IO_W7 1100 1 Z
+bit 1100 C 1 *
+bit 1099 O 1 *
+bit 1098 O 1 *
+bit 1097 O 1 *
+bit 1096 O 1 *
+bit 1095 O 1 *
+bit 1094 O 1 *
+bit 1093 O 1 *
+bit 1092 O 1 *
+bit 1091 O 1 *
+bit 1090 O 1 *
+bit 1089 O 1 *
+bit 1088 O 1 *
+bit 1087 O 1 *
+bit 1086 O 1 *
+bit 1085 O 1 *
+bit 1084 I 1 IO_V7
+bit 1083 O 1 IO_V7 1082 1 Z
+bit 1082 C 1 *
+bit 1081 I 1 IO_AA6
+bit 1080 O 1 IO_AA6 1079 1 Z
+bit 1079 C 1 *
+bit 1078 I 1 IO_Y6
+bit 1077 O 1 IO_Y6 1076 1 Z
+bit 1076 C 1 *
+bit 1075 I 1 IO_W6
+bit 1074 O 1 IO_W6 1073 1 Z
+bit 1073 C 1 *
+bit 1072 I 1 IO_V6
+bit 1071 O 1 IO_V6 1070 1 Z
+bit 1070 C 1 *
+bit 1069 O 1 *
+bit 1068 O 1 *
+bit 1067 O 1 *
+bit 1066 O 1 *
+bit 1065 O 1 *
+bit 1064 O 1 *
+bit 1063 O 1 *
+bit 1062 O 1 *
+bit 1061 O 1 *
+bit 1060 O 1 *
+bit 1059 O 1 *
+bit 1058 O 1 *
+bit 1057 O 1 *
+bit 1056 O 1 *
+bit 1055 O 1 *
+bit 1054 O 1 *
+bit 1053 O 1 *
+bit 1052 O 1 *
+bit 1051 O 1 *
+bit 1050 O 1 *
+bit 1049 O 1 *
+bit 1048 O 1 *
+bit 1047 O 1 *
+bit 1046 O 1 *
+bit 1045 O 1 *
+bit 1044 O 1 *
+bit 1043 O 1 *
+bit 1042 O 1 *
+bit 1041 O 1 *
+bit 1040 O 1 *
+bit 1039 I 1 IO_U7
+bit 1038 O 1 IO_U7 1037 1 Z
+bit 1037 C 1 *
+bit 1036 I 1 IO_AB5
+bit 1035 O 1 IO_AB5 1034 1 Z
+bit 1034 C 1 *
+bit 1033 I 1 IO_AA5
+bit 1032 O 1 IO_AA5 1031 1 Z
+bit 1031 C 1 *
+bit 1030 I 1 IO_Y5
+bit 1029 O 1 IO_Y5 1028 1 Z
+bit 1028 C 1 *
+bit 1027 I 1 IO_W5
+bit 1026 O 1 IO_W5 1025 1 Z
+bit 1025 C 1 *
+bit 1024 O 1 *
+bit 1023 O 1 *
+bit 1022 O 1 *
+bit 1021 O 1 *
+bit 1020 O 1 *
+bit 1019 O 1 *
+bit 1018 O 1 *
+bit 1017 O 1 *
+bit 1016 O 1 *
+bit 1015 O 1 *
+bit 1014 O 1 *
+bit 1013 O 1 *
+bit 1012 O 1 *
+bit 1011 O 1 *
+bit 1010 O 1 *
+bit 1009 I 1 IO_U6
+bit 1008 O 1 IO_U6 1007 1 Z
+bit 1007 C 1 *
+bit 1006 I 1 IO_AB4
+bit 1005 O 1 IO_AB4 1004 1 Z
+bit 1004 C 1 *
+bit 1003 I 1 IO_AA4
+bit 1002 O 1 IO_AA4 1001 1 Z
+bit 1001 C 1 *
+bit 1000 O 1 *
+bit 999 O 1 *
+bit 998 O 1 *
+bit 997 O 1 *
+bit 996 O 1 *
+bit 995 O 1 *
+bit 994 O 1 *
+bit 993 O 1 *
+bit 992 O 1 *
+bit 991 O 1 *
+bit 990 O 1 *
+bit 989 O 1 *
+bit 988 O 1 *
+bit 987 O 1 *
+bit 986 O 1 *
+bit 985 O 1 *
+bit 984 O 1 *
+bit 983 O 1 *
+bit 982 O 1 *
+bit 981 O 1 *
+bit 980 O 1 *
+bit 979 O 1 *
+bit 978 O 1 *
+bit 977 O 1 *
+bit 976 O 1 *
+bit 975 O 1 *
+bit 974 O 1 *
+bit 973 O 1 *
+bit 972 O 1 *
+bit 971 O 1 *
+bit 970 I 1 IO_Y4
+bit 969 O 1 IO_Y4 968 1 Z
+bit 968 C 1 *
+bit 967 I 1 IO_AA3
+bit 966 O 1 IO_AA3 965 1 Z
+bit 965 C 1 *
+bit 964 I 1 M2_AB3
+bit 963 I 1 M0_AB2
+bit 962 I 1 M1_AA1
+bit 961 I 1 IO_Y3
+bit 960 O 1 IO_Y3 959 1 Z
+bit 959 C 1 *
+bit 958 I 1 IO_Y2
+bit 957 O 1 IO_Y2 956 1 Z
+bit 956 C 1 *
+bit 955 O 1 *
+bit 954 O 1 *
+bit 953 O 1 *
+bit 952 O 1 *
+bit 951 O 1 *
+bit 950 O 1 *
+bit 949 O 1 *
+bit 948 O 1 *
+bit 947 O 1 *
+bit 946 O 1 *
+bit 945 O 1 *
+bit 944 O 1 *
+bit 943 O 1 *
+bit 942 O 1 *
+bit 941 O 1 *
+bit 940 O 1 *
+bit 939 O 1 *
+bit 938 O 1 *
+bit 937 O 1 *
+bit 936 O 1 *
+bit 935 O 1 *
+bit 934 O 1 *
+bit 933 O 1 *
+bit 932 O 1 *
+bit 931 O 1 *
+bit 930 O 1 *
+bit 929 O 1 *
+bit 928 O 1 *
+bit 927 O 1 *
+bit 926 O 1 *
+bit 925 O 1 *
+bit 924 O 1 *
+bit 923 O 1 *
+bit 922 O 1 *
+bit 921 O 1 *
+bit 920 O 1 *
+bit 919 O 1 *
+bit 918 O 1 *
+bit 917 O 1 *
+bit 916 O 1 *
+bit 915 O 1 *
+bit 914 O 1 *
+bit 913 O 1 *
+bit 912 O 1 *
+bit 911 O 1 *
+bit 910 O 1 *
+bit 909 O 1 *
+bit 908 O 1 *
+bit 907 O 1 *
+bit 906 O 1 *
+bit 905 O 1 *
+bit 904 O 1 *
+bit 903 O 1 *
+bit 902 O 1 *
+bit 901 O 1 *
+bit 900 O 1 *
+bit 899 O 1 *
+bit 898 O 1 *
+bit 897 O 1 *
+bit 896 O 1 *
+bit 895 O 1 *
+bit 894 O 1 *
+bit 893 O 1 *
+bit 892 O 1 *
+bit 891 O 1 *
+bit 890 O 1 *
+bit 889 O 1 *
+bit 888 O 1 *
+bit 887 O 1 *
+bit 886 O 1 *
+bit 885 O 1 *
+bit 884 O 1 *
+bit 883 O 1 *
+bit 882 O 1 *
+bit 881 O 1 *
+bit 880 I 1 IO_Y1
+bit 879 O 1 IO_Y1 878 1 Z
+bit 878 C 1 *
+bit 877 O 1 *
+bit 876 O 1 *
+bit 875 O 1 *
+bit 874 O 1 *
+bit 873 O 1 *
+bit 872 O 1 *
+bit 871 I 1 IO_W4
+bit 870 O 1 IO_W4 869 1 Z
+bit 869 C 1 *
+bit 868 I 1 IO_W3
+bit 867 O 1 IO_W3 866 1 Z
+bit 866 C 1 *
+bit 865 I 1 IO_W2
+bit 864 O 1 IO_W2 863 1 Z
+bit 863 C 1 *
+bit 862 I 1 IO_W1
+bit 861 O 1 IO_W1 860 1 Z
+bit 860 C 1 *
+bit 859 O 1 *
+bit 858 O 1 *
+bit 857 O 1 *
+bit 856 O 1 *
+bit 855 O 1 *
+bit 854 O 1 *
+bit 853 I 1 IO_V5
+bit 852 O 1 IO_V5 851 1 Z
+bit 851 C 1 *
+bit 850 I 1 IO_U5
+bit 849 O 1 IO_U5 848 1 Z
+bit 848 C 1 *
+bit 847 I 1 IO_V4
+bit 846 O 1 IO_V4 845 1 Z
+bit 845 C 1 *
+bit 844 I 1 IO_V3
+bit 843 O 1 IO_V3 842 1 Z
+bit 842 C 1 *
+bit 841 I 1 IO_V2
+bit 840 O 1 IO_V2 839 1 Z
+bit 839 C 1 *
+bit 838 I 1 IO_V1
+bit 837 O 1 IO_V1 836 1 Z
+bit 836 C 1 *
+bit 835 I 1 IO_T6
+bit 834 O 1 IO_T6 833 1 Z
+bit 833 C 1 *
+bit 832 I 1 IO_T5
+bit 831 O 1 IO_T5 830 1 Z
+bit 830 C 1 *
+bit 829 I 1 IO_U4
+bit 828 O 1 IO_U4 827 1 Z
+bit 827 C 1 *
+bit 826 I 1 IO_T4
+bit 825 O 1 IO_T4 824 1 Z
+bit 824 C 1 *
+bit 823 I 1 IO_U3
+bit 822 O 1 IO_U3 821 1 Z
+bit 821 C 1 *
+bit 820 I 1 IO_U2
+bit 819 O 1 IO_U2 818 1 Z
+bit 818 C 1 *
+bit 817 O 1 *
+bit 816 O 1 *
+bit 815 O 1 *
+bit 814 O 1 *
+bit 813 O 1 *
+bit 812 O 1 *
+bit 811 I 1 IO_T3
+bit 810 O 1 IO_T3 809 1 Z
+bit 809 C 1 *
+bit 808 I 1 IO_R4
+bit 807 O 1 IO_R4 806 1 Z
+bit 806 C 1 *
+bit 805 I 1 IO_T2
+bit 804 O 1 IO_T2 803 1 Z
+bit 803 C 1 *
+bit 802 I 1 IO_T1
+bit 801 O 1 IO_T1 800 1 Z
+bit 800 C 1 *
+bit 799 I 1 IO_R5
+bit 798 O 1 IO_R5 797 1 Z
+bit 797 C 1 *
+bit 796 I 1 IO_P6
+bit 795 O 1 IO_P6 794 1 Z
+bit 794 C 1 *
+bit 793 I 1 IO_R2
+bit 792 O 1 IO_R2 791 1 Z
+bit 791 C 1 *
+bit 790 I 1 IO_R1
+bit 789 O 1 IO_R1 788 1 Z
+bit 788 C 1 *
+bit 787 O 1 *
+bit 786 O 1 *
+bit 785 O 1 *
+bit 784 O 1 *
+bit 783 O 1 *
+bit 782 O 1 *
+bit 781 I 1 IO_P5
+bit 780 O 1 IO_P5 779 1 Z
+bit 779 C 1 *
+bit 778 I 1 IO_P4
+bit 777 O 1 IO_P4 776 1 Z
+bit 776 C 1 *
+bit 775 I 1 IO_P2
+bit 774 O 1 IO_P2 773 1 Z
+bit 773 C 1 *
+bit 772 I 1 IO_P1
+bit 771 O 1 IO_P1 770 1 Z
+bit 770 C 1 *
+bit 769 I 1 IO_N6
+bit 768 O 1 IO_N6 767 1 Z
+bit 767 C 1 *
+bit 766 I 1 IO_N5
+bit 765 O 1 IO_N5 764 1 Z
+bit 764 C 1 *
+bit 763 I 1 IO_N4
+bit 762 O 1 IO_N4 761 1 Z
+bit 761 C 1 *
+bit 760 I 1 IO_N3
+bit 759 O 1 IO_N3 758 1 Z
+bit 758 C 1 *
+bit 757 I 1 IO_N2
+bit 756 O 1 IO_N2 755 1 Z
+bit 755 C 1 *
+bit 754 I 1 IO_N1
+bit 753 O 1 IO_N1 752 1 Z
+bit 752 C 1 *
+bit 751 O 1 *
+bit 750 O 1 *
+bit 749 O 1 *
+bit 748 O 1 *
+bit 747 O 1 *
+bit 746 O 1 *
+bit 745 O 1 *
+bit 744 O 1 *
+bit 743 O 1 *
+bit 742 O 1 *
+bit 741 O 1 *
+bit 740 O 1 *
+bit 739 I 1 IO_M6
+bit 738 O 1 IO_M6 737 1 Z
+bit 737 C 1 *
+bit 736 I 1 IO_M5
+bit 735 O 1 IO_M5 734 1 Z
+bit 734 C 1 *
+bit 733 I 1 IO_M4
+bit 732 O 1 IO_M4 731 1 Z
+bit 731 C 1 *
+bit 730 I 1 IO_M3
+bit 729 O 1 IO_M3 728 1 Z
+bit 728 C 1 *
+bit 727 I 1 IO_M2
+bit 726 O 1 IO_M2 725 1 Z
+bit 725 C 1 *
+bit 724 I 1 IO_M1
+bit 723 O 1 IO_M1 722 1 Z
+bit 722 C 1 *
+bit 721 I 1 IO_L1
+bit 720 O 1 IO_L1 719 1 Z
+bit 719 C 1 *
+bit 718 I 1 IO_L2
+bit 717 O 1 IO_L2 716 1 Z
+bit 716 C 1 *
+bit 715 I 1 IO_L3
+bit 714 O 1 IO_L3 713 1 Z
+bit 713 C 1 *
+bit 712 I 1 IO_L4
+bit 711 O 1 IO_L4 710 1 Z
+bit 710 C 1 *
+bit 709 I 1 IO_L5
+bit 708 O 1 IO_L5 707 1 Z
+bit 707 C 1 *
+bit 706 I 1 IO_L6
+bit 705 O 1 IO_L6 704 1 Z
+bit 704 C 1 *
+bit 703 O 1 *
+bit 702 O 1 *
+bit 701 O 1 *
+bit 700 O 1 *
+bit 699 O 1 *
+bit 698 O 1 *
+bit 697 O 1 *
+bit 696 O 1 *
+bit 695 O 1 *
+bit 694 O 1 *
+bit 693 O 1 *
+bit 692 O 1 *
+bit 691 I 1 IO_K1
+bit 690 O 1 IO_K1 689 1 Z
+bit 689 C 1 *
+bit 688 I 1 IO_K2
+bit 687 O 1 IO_K2 686 1 Z
+bit 686 C 1 *
+bit 685 I 1 IO_K3
+bit 684 O 1 IO_K3 683 1 Z
+bit 683 C 1 *
+bit 682 I 1 IO_K4
+bit 681 O 1 IO_K4 680 1 Z
+bit 680 C 1 *
+bit 679 I 1 IO_K5
+bit 678 O 1 IO_K5 677 1 Z
+bit 677 C 1 *
+bit 676 I 1 IO_K6
+bit 675 O 1 IO_K6 674 1 Z
+bit 674 C 1 *
+bit 673 I 1 IO_J1
+bit 672 O 1 IO_J1 671 1 Z
+bit 671 C 1 *
+bit 670 I 1 IO_J2
+bit 669 O 1 IO_J2 668 1 Z
+bit 668 C 1 *
+bit 667 I 1 IO_J5
+bit 666 O 1 IO_J5 665 1 Z
+bit 665 C 1 *
+bit 664 I 1 IO_J6
+bit 663 O 1 IO_J6 662 1 Z
+bit 662 C 1 *
+bit 661 O 1 *
+bit 660 O 1 *
+bit 659 O 1 *
+bit 658 O 1 *
+bit 657 O 1 *
+bit 656 O 1 *
+bit 655 I 1 IO_J4
+bit 654 O 1 IO_J4 653 1 Z
+bit 653 C 1 *
+bit 652 I 1 IO_H4
+bit 651 O 1 IO_H4 650 1 Z
+bit 650 C 1 *
+bit 649 I 1 IO_H1
+bit 648 O 1 IO_H1 647 1 Z
+bit 647 C 1 *
+bit 646 I 1 IO_H2
+bit 645 O 1 IO_H2 644 1 Z
+bit 644 C 1 *
+bit 643 I 1 IO_G1
+bit 642 O 1 IO_G1 641 1 Z
+bit 641 C 1 *
+bit 640 I 1 IO_G2
+bit 639 O 1 IO_G2 638 1 Z
+bit 638 C 1 *
+bit 637 I 1 IO_G3
+bit 636 O 1 IO_G3 635 1 Z
+bit 635 C 1 *
+bit 634 I 1 IO_G4
+bit 633 O 1 IO_G4 632 1 Z
+bit 632 C 1 *
+bit 631 O 1 *
+bit 630 O 1 *
+bit 629 O 1 *
+bit 628 O 1 *
+bit 627 O 1 *
+bit 626 O 1 *
+bit 625 I 1 IO_H5
+bit 624 O 1 IO_H5 623 1 Z
+bit 623 C 1 *
+bit 622 I 1 IO_G5
+bit 621 O 1 IO_G5 620 1 Z
+bit 620 C 1 *
+bit 619 I 1 IO_F2
+bit 618 O 1 IO_F2 617 1 Z
+bit 617 C 1 *
+bit 616 I 1 IO_F3
+bit 615 O 1 IO_F3 614 1 Z
+bit 614 C 1 *
+bit 613 I 1 IO_G6
+bit 612 O 1 IO_G6 611 1 Z
+bit 611 C 1 *
+bit 610 I 1 IO_F5
+bit 609 O 1 IO_F5 608 1 Z
+bit 608 C 1 *
+bit 607 I 1 IO_E1
+bit 606 O 1 IO_E1 605 1 Z
+bit 605 C 1 *
+bit 604 I 1 IO_E2
+bit 603 O 1 IO_E2 602 1 Z
+bit 602 C 1 *
+bit 601 I 1 IO_F4
+bit 600 O 1 IO_F4 599 1 Z
+bit 599 C 1 *
+bit 598 I 1 IO_E3
+bit 597 O 1 IO_E3 596 1 Z
+bit 596 C 1 *
+bit 595 I 1 IO_D3
+bit 594 O 1 IO_D3 593 1 Z
+bit 593 C 1 *
+bit 592 I 1 IO_D2
+bit 591 O 1 IO_D2 590 1 Z
+bit 590 C 1 *
+bit 589 O 1 *
+bit 588 O 1 *
+bit 587 O 1 *
+bit 586 O 1 *
+bit 585 O 1 *
+bit 584 O 1 *
+bit 583 I 1 IO_E4
+bit 582 O 1 IO_E4 581 1 Z
+bit 581 C 1 *
+bit 580 I 1 IO_D4
+bit 579 O 1 IO_D4 578 1 Z
+bit 578 C 1 *
+bit 577 I 1 IO_D1
+bit 576 O 1 IO_D1 575 1 Z
+bit 575 C 1 *
+bit 574 I 1 IO_C1
+bit 573 O 1 IO_C1 572 1 Z
+bit 572 C 1 *
+bit 571 O 1 *
+bit 570 O 1 *
+bit 569 O 1 *
+bit 568 O 1 *
+bit 567 O 1 *
+bit 566 O 1 *
+bit 565 I 1 IO_C2
+bit 564 O 1 IO_C2 563 1 Z
+bit 563 C 1 *
+bit 562 O 1 *
+bit 561 O 1 *
+bit 560 O 1 *
+bit 559 O 1 *
+bit 558 O 1 *
+bit 557 O 1 *
+bit 556 O 1 *
+bit 555 O 1 *
+bit 554 O 1 *
+bit 553 O 1 *
+bit 552 O 1 *
+bit 551 O 1 *
+bit 550 O 1 *
+bit 549 O 1 *
+bit 548 O 1 *
+bit 547 O 1 *
+bit 546 O 1 *
+bit 545 O 1 *
+bit 544 O 1 *
+bit 543 O 1 *
+bit 542 O 1 *
+bit 541 O 1 *
+bit 540 O 1 *
+bit 539 O 1 *
+bit 538 O 1 *
+bit 537 O 1 *
+bit 536 O 1 *
+bit 535 O 1 *
+bit 534 O 1 *
+bit 533 O 1 *
+bit 532 O 1 *
+bit 531 O 1 *
+bit 530 O 1 *
+bit 529 O 1 *
+bit 528 O 1 *
+bit 527 O 1 *
+bit 526 O 1 *
+bit 525 O 1 *
+bit 524 O 1 *
+bit 523 O 1 *
+bit 522 O 1 *
+bit 521 O 1 *
+bit 520 O 1 *
+bit 519 O 1 *
+bit 518 O 1 *
+bit 517 O 1 *
+bit 516 O 1 *
+bit 515 O 1 *
+bit 514 O 1 *
+bit 513 O 1 *
+bit 512 O 1 *
+bit 511 O 1 *
+bit 510 O 1 *
+bit 509 O 1 *
+bit 508 O 1 *
+bit 507 O 1 *
+bit 506 O 1 *
+bit 505 O 1 *
+bit 504 O 1 *
+bit 503 O 1 *
+bit 502 O 1 *
+bit 501 O 1 *
+bit 500 O 1 *
+bit 499 O 1 *
+bit 498 O 1 *
+bit 497 O 1 *
+bit 496 O 1 *
+bit 495 O 1 *
+bit 494 O 1 *
+bit 493 O 1 *
+bit 492 O 1 *
+bit 491 O 1 *
+bit 490 O 1 *
+bit 489 O 1 *
+bit 488 O 1 *
+bit 487 I 1 IO_C3
+bit 486 O 1 IO_C3 485 1 Z
+bit 485 C 1 *
+bit 484 I 1 IO_C4
+bit 483 O 1 IO_C4 482 1 Z
+bit 482 C 1 *
+bit 481 O 1 *
+bit 480 I 1 HSWAP_EN_B3
+bit 479 I 1 IO_A3
+bit 478 O 1 IO_A3 477 1 Z
+bit 477 C 1 *
+bit 476 I 1 IO_B4
+bit 475 O 1 IO_B4 474 1 Z
+bit 474 C 1 *
+bit 473 I 1 IO_A4
+bit 472 O 1 IO_A4 471 1 Z
+bit 471 C 1 *
+bit 470 O 1 *
+bit 469 O 1 *
+bit 468 O 1 *
+bit 467 O 1 *
+bit 466 O 1 *
+bit 465 O 1 *
+bit 464 O 1 *
+bit 463 O 1 *
+bit 462 O 1 *
+bit 461 O 1 *
+bit 460 O 1 *
+bit 459 O 1 *
+bit 458 O 1 *
+bit 457 O 1 *
+bit 456 O 1 *
+bit 455 O 1 *
+bit 454 O 1 *
+bit 453 O 1 *
+bit 452 O 1 *
+bit 451 O 1 *
+bit 450 O 1 *
+bit 449 O 1 *
+bit 448 O 1 *
+bit 447 O 1 *
+bit 446 O 1 *
+bit 445 O 1 *
+bit 444 O 1 *
+bit 443 I 1 IO_E5
+bit 442 O 1 IO_E5 441 1 Z
+bit 441 C 1 *
+bit 440 I 1 IO_D5
+bit 439 O 1 IO_D5 438 1 Z
+bit 438 C 1 *
+bit 437 I 1 IO_C5
+bit 436 O 1 IO_C5 435 1 Z
+bit 435 C 1 *
+bit 434 O 1 *
+bit 433 O 1 *
+bit 432 O 1 *
+bit 431 O 1 *
+bit 430 O 1 *
+bit 429 O 1 *
+bit 428 O 1 *
+bit 427 O 1 *
+bit 426 O 1 *
+bit 425 O 1 *
+bit 424 O 1 *
+bit 423 O 1 *
+bit 422 O 1 *
+bit 421 O 1 *
+bit 420 O 1 *
+bit 419 I 1 IO_F6
+bit 418 O 1 IO_F6 417 1 Z
+bit 417 C 1 *
+bit 416 I 1 IO_B5
+bit 415 O 1 IO_B5 414 1 Z
+bit 414 C 1 *
+bit 413 I 1 IO_A5
+bit 412 O 1 IO_A5 411 1 Z
+bit 411 C 1 *
+bit 410 I 1 IO_E6
+bit 409 O 1 IO_E6 408 1 Z
+bit 408 C 1 *
+bit 407 I 1 IO_D6
+bit 406 O 1 IO_D6 405 1 Z
+bit 405 C 1 *
+bit 404 I 1 IO_F7
+bit 403 O 1 IO_F7 402 1 Z
+bit 402 C 1 *
+bit 401 O 1 *
+bit 400 O 1 *
+bit 399 O 1 *
+bit 398 O 1 *
+bit 397 O 1 *
+bit 396 O 1 *
+bit 395 O 1 *
+bit 394 O 1 *
+bit 393 O 1 *
+bit 392 O 1 *
+bit 391 O 1 *
+bit 390 O 1 *
+bit 389 O 1 *
+bit 388 O 1 *
+bit 387 O 1 *
+bit 386 O 1 *
+bit 385 O 1 *
+bit 384 O 1 *
+bit 383 O 1 *
+bit 382 O 1 *
+bit 381 O 1 *
+bit 380 O 1 *
+bit 379 O 1 *
+bit 378 O 1 *
+bit 377 O 1 *
+bit 376 O 1 *
+bit 375 O 1 *
+bit 374 O 1 *
+bit 373 O 1 *
+bit 372 O 1 *
+bit 371 I 1 IO_C6
+bit 370 O 1 IO_C6 369 1 Z
+bit 369 C 1 *
+bit 368 I 1 IO_B6
+bit 367 O 1 IO_B6 366 1 Z
+bit 366 C 1 *
+bit 365 I 1 IO_E7
+bit 364 O 1 IO_E7 363 1 Z
+bit 363 C 1 *
+bit 362 I 1 IO_D7
+bit 361 O 1 IO_D7 360 1 Z
+bit 360 C 1 *
+bit 359 O 1 *
+bit 358 O 1 *
+bit 357 O 1 *
+bit 356 O 1 *
+bit 355 O 1 *
+bit 354 O 1 *
+bit 353 O 1 *
+bit 352 O 1 *
+bit 351 O 1 *
+bit 350 O 1 *
+bit 349 O 1 *
+bit 348 O 1 *
+bit 347 O 1 *
+bit 346 O 1 *
+bit 345 O 1 *
+bit 344 I 1 IO_C7
+bit 343 O 1 IO_C7 342 1 Z
+bit 342 C 1 *
+bit 341 I 1 IO_B7
+bit 340 O 1 IO_B7 339 1 Z
+bit 339 C 1 *
+bit 338 I 1 IO_A7
+bit 337 O 1 IO_A7 336 1 Z
+bit 336 C 1 *
+bit 335 O 1 *
+bit 334 O 1 *
+bit 333 O 1 *
+bit 332 O 1 *
+bit 331 O 1 *
+bit 330 O 1 *
+bit 329 O 1 *
+bit 328 O 1 *
+bit 327 O 1 *
+bit 326 O 1 *
+bit 325 O 1 *
+bit 324 O 1 *
+bit 323 O 1 *
+bit 322 O 1 *
+bit 321 O 1 *
+bit 320 I 1 IO_E8
+bit 319 O 1 IO_E8 318 1 Z
+bit 318 C 1 *
+bit 317 I 1 IO_D8
+bit 316 O 1 IO_D8 315 1 Z
+bit 315 C 1 *
+bit 314 O 1 *
+bit 313 O 1 *
+bit 312 O 1 *
+bit 311 O 1 *
+bit 310 O 1 *
+bit 309 O 1 *
+bit 308 O 1 *
+bit 307 O 1 *
+bit 306 O 1 *
+bit 305 I 1 IO_B8
+bit 304 O 1 IO_B8 303 1 Z
+bit 303 C 1 *
+bit 302 I 1 IO_A8
+bit 301 O 1 IO_A8 300 1 Z
+bit 300 C 1 *
+bit 299 O 1 *
+bit 298 O 1 *
+bit 297 O 1 *
+bit 296 I 1 IO_F9
+bit 295 O 1 IO_F9 294 1 Z
+bit 294 C 1 *
+bit 293 I 1 IO_E9
+bit 292 O 1 IO_E9 291 1 Z
+bit 291 C 1 *
+bit 290 O 1 *
+bit 289 O 1 *
+bit 288 O 1 *
+bit 287 O 1 *
+bit 286 O 1 *
+bit 285 O 1 *
+bit 284 I 1 IO_D9
+bit 283 O 1 IO_D9 282 1 Z
+bit 282 C 1 *
+bit 281 I 1 IO_B9
+bit 280 O 1 IO_B9 279 1 Z
+bit 279 C 1 *
+bit 278 I 1 IO_A9
+bit 277 O 1 IO_A9 276 1 Z
+bit 276 C 1 *
+bit 275 I 1 IO_F10
+bit 274 O 1 IO_F10 273 1 Z
+bit 273 C 1 *
+bit 272 I 1 IO_E10
+bit 271 O 1 IO_E10 270 1 Z
+bit 270 C 1 *
+bit 269 I 1 IO_D10
+bit 268 O 1 IO_D10 267 1 Z
+bit 267 C 1 *
+bit 266 I 1 IO_C10
+bit 265 O 1 IO_C10 264 1 Z
+bit 264 C 1 *
+bit 263 I 1 IO_B10
+bit 262 O 1 IO_B10 261 1 Z
+bit 261 C 1 *
+bit 260 I 1 IO_F11
+bit 259 O 1 IO_F11 258 1 Z
+bit 258 C 1 *
+bit 257 I 1 IO_E11
+bit 256 O 1 IO_E11 255 1 Z
+bit 255 C 1 *
+bit 254 I 1 IO_A10
+bit 253 O 1 IO_A10 252 1 Z
+bit 252 C 1 *
+bit 251 I 1 IO_D11
+bit 250 O 1 IO_D11 249 1 Z
+bit 249 C 1 *
+bit 248 I 1 IO_C11
+bit 247 O 1 IO_C11 246 1 Z
+bit 246 C 1 *
+bit 245 I 1 IO_B11
+bit 244 O 1 IO_B11 243 1 Z
+bit 243 C 1 *
+bit 242 I 1 IO_A11
+bit 241 O 1 IO_A11 240 1 Z
+bit 240 C 1 *
+bit 239 I 1 IO_A12
+bit 238 O 1 IO_A12 237 1 Z
+bit 237 C 1 *
+bit 236 I 1 IO_B12
+bit 235 O 1 IO_B12 234 1 Z
+bit 234 C 1 *
+bit 233 I 1 IO_C12
+bit 232 O 1 IO_C12 231 1 Z
+bit 231 C 1 *
+bit 230 I 1 IO_D12
+bit 229 O 1 IO_D12 228 1 Z
+bit 228 C 1 *
+bit 227 I 1 IO_E12
+bit 226 O 1 IO_E12 225 1 Z
+bit 225 C 1 *
+bit 224 I 1 IO_F12
+bit 223 O 1 IO_F12 222 1 Z
+bit 222 C 1 *
+bit 221 I 1 IO_A13
+bit 220 O 1 IO_A13 219 1 Z
+bit 219 C 1 *
+bit 218 I 1 IO_B13
+bit 217 O 1 IO_B13 216 1 Z
+bit 216 C 1 *
+bit 215 I 1 IO_C13
+bit 214 O 1 IO_C13 213 1 Z
+bit 213 C 1 *
+bit 212 I 1 IO_D13
+bit 211 O 1 IO_D13 210 1 Z
+bit 210 C 1 *
+bit 209 I 1 IO_E13
+bit 208 O 1 IO_E13 207 1 Z
+bit 207 C 1 *
+bit 206 I 1 IO_A14
+bit 205 O 1 IO_A14 204 1 Z
+bit 204 C 1 *
+bit 203 I 1 IO_B14
+bit 202 O 1 IO_B14 201 1 Z
+bit 201 C 1 *
+bit 200 I 1 IO_D14
+bit 199 O 1 IO_D14 198 1 Z
+bit 198 C 1 *
+bit 197 I 1 IO_E14
+bit 196 O 1 IO_E14 195 1 Z
+bit 195 C 1 *
+bit 194 I 1 IO_F13
+bit 193 O 1 IO_F13 192 1 Z
+bit 192 C 1 *
+bit 191 O 1 *
+bit 190 O 1 *
+bit 189 O 1 *
+bit 188 O 1 *
+bit 187 O 1 *
+bit 186 O 1 *
+bit 185 I 1 IO_B15
+bit 184 O 1 IO_B15 183 1 Z
+bit 183 C 1 *
+bit 182 I 1 IO_A15
+bit 181 O 1 IO_A15 180 1 Z
+bit 180 C 1 *
+bit 179 O 1 *
+bit 178 O 1 *
+bit 177 O 1 *
+bit 176 I 1 IO_D15
+bit 175 O 1 IO_D15 174 1 Z
+bit 174 C 1 *
+bit 173 I 1 IO_E15
+bit 172 O 1 IO_E15 171 1 Z
+bit 171 C 1 *
+bit 170 O 1 *
+bit 169 O 1 *
+bit 168 O 1 *
+bit 167 O 1 *
+bit 166 O 1 *
+bit 165 O 1 *
+bit 164 I 1 IO_F14
+bit 163 O 1 IO_F14 162 1 Z
+bit 162 C 1 *
+bit 161 I 1 IO_A16
+bit 160 O 1 IO_A16 159 1 Z
+bit 159 C 1 *
+bit 158 I 1 IO_B16
+bit 157 O 1 IO_B16 156 1 Z
+bit 156 C 1 *
+bit 155 O 1 *
+bit 154 O 1 *
+bit 153 O 1 *
+bit 152 O 1 *
+bit 151 O 1 *
+bit 150 O 1 *
+bit 149 O 1 *
+bit 148 O 1 *
+bit 147 O 1 *
+bit 146 O 1 *
+bit 145 O 1 *
+bit 144 O 1 *
+bit 143 O 1 *
+bit 142 O 1 *
+bit 141 O 1 *
+bit 140 I 1 IO_C16
+bit 139 O 1 IO_C16 138 1 Z
+bit 138 C 1 *
+bit 137 I 1 IO_D16
+bit 136 O 1 IO_D16 135 1 Z
+bit 135 C 1 *
+bit 134 O 1 *
+bit 133 O 1 *
+bit 132 O 1 *
+bit 131 O 1 *
+bit 130 O 1 *
+bit 129 O 1 *
+bit 128 O 1 *
+bit 127 O 1 *
+bit 126 O 1 *
+bit 125 O 1 *
+bit 124 O 1 *
+bit 123 O 1 *
+bit 122 O 1 *
+bit 121 O 1 *
+bit 120 O 1 *
+bit 119 I 1 IO_E16
+bit 118 O 1 IO_E16 117 1 Z
+bit 117 C 1 *
+bit 116 I 1 IO_B17
+bit 115 O 1 IO_B17 114 1 Z
+bit 114 C 1 *
+bit 113 I 1 IO_C17
+bit 112 O 1 IO_C17 111 1 Z
+bit 111 C 1 *
+bit 110 I 1 IO_D17
+bit 109 O 1 IO_D17 108 1 Z
+bit 108 C 1 *
+bit 107 I 1 IO_E17
+bit 106 O 1 IO_E17 105 1 Z
+bit 105 C 1 *
+bit 104 O 1 *
+bit 103 O 1 *
+bit 102 O 1 *
+bit 101 O 1 *
+bit 100 O 1 *
+bit 99 O 1 *
+bit 98 O 1 *
+bit 97 O 1 *
+bit 96 O 1 *
+bit 95 O 1 *
+bit 94 O 1 *
+bit 93 O 1 *
+bit 92 O 1 *
+bit 91 O 1 *
+bit 90 O 1 *
+bit 89 O 1 *
+bit 88 O 1 *
+bit 87 O 1 *
+bit 86 O 1 *
+bit 85 O 1 *
+bit 84 O 1 *
+bit 83 O 1 *
+bit 82 O 1 *
+bit 81 O 1 *
+bit 80 O 1 *
+bit 79 O 1 *
+bit 78 O 1 *
+bit 77 O 1 *
+bit 76 O 1 *
+bit 75 O 1 *
+bit 74 I 1 IO_F16
+bit 73 O 1 IO_F16 72 1 Z
+bit 72 C 1 *
+bit 71 I 1 IO_A18
+bit 70 O 1 IO_A18 69 1 Z
+bit 69 C 1 *
+bit 68 I 1 IO_B18
+bit 67 O 1 IO_B18 66 1 Z
+bit 66 C 1 *
+bit 65 I 1 IO_C18
+bit 64 O 1 IO_C18 63 1 Z
+bit 63 C 1 *
+bit 62 I 1 IO_D18
+bit 61 O 1 IO_D18 60 1 Z
+bit 60 C 1 *
+bit 59 O 1 *
+bit 58 O 1 *
+bit 57 O 1 *
+bit 56 O 1 *
+bit 55 O 1 *
+bit 54 O 1 *
+bit 53 O 1 *
+bit 52 O 1 *
+bit 51 O 1 *
+bit 50 O 1 *
+bit 49 O 1 *
+bit 48 O 1 *
+bit 47 O 1 *
+bit 46 O 1 *
+bit 45 O 1 *
+bit 44 I 1 IO_F17
+bit 43 O 1 IO_F17 42 1 Z
+bit 42 C 1 *
+bit 41 I 1 IO_A19
+bit 40 O 1 IO_A19 39 1 Z
+bit 39 C 1 *
+bit 38 I 1 IO_B19
+bit 37 O 1 IO_B19 36 1 Z
+bit 36 C 1 *
+bit 35 O 1 *
+bit 34 O 1 *
+bit 33 O 1 *
+bit 32 O 1 *
+bit 31 O 1 *
+bit 30 O 1 *
+bit 29 O 1 *
+bit 28 O 1 *
+bit 27 O 1 *
+bit 26 O 1 *
+bit 25 O 1 *
+bit 24 O 1 *
+bit 23 O 1 *
+bit 22 O 1 *
+bit 21 O 1 *
+bit 20 O 1 *
+bit 19 O 1 *
+bit 18 O 1 *
+bit 17 O 1 *
+bit 16 O 1 *
+bit 15 O 1 *
+bit 14 O 1 *
+bit 13 O 1 *
+bit 12 O 1 *
+bit 11 O 1 *
+bit 10 O 1 *
+bit 9 O 1 *
+bit 8 O 1 *
+bit 7 O 1 *
+bit 6 O 1 *
+bit 5 I 1 IO_C19
+bit 4 O 1 IO_C19 3 1 Z
+bit 3 C 1 *
+bit 2 I 1 IO_B20
+bit 1 O 1 IO_B20 0 1 Z
+bit 0 C 1 *
--- /dev/null
+signal GND1
+signal GND2
+signal GND3
+signal GND4
+signal GND5
+signal GND6
+signal GND7
+signal GND8
+signal GND9
+signal GND10
+signal GND11
+signal GND12
+signal GND13
+signal GND14
+signal GND15
+signal GND16
+signal GND17
+signal GND18
+signal GND19
+signal GND20
+signal GND21
+signal GND22
+signal GND23
+signal GND24
+signal GND25
+signal GND26
+signal GND27
+signal GND28
+signal GND29
+signal GND30
+signal GND31
+signal GND32
+signal GND33
+signal GND34
+signal GND35
+signal GND36
+signal GND37
+signal GND38
+signal GND39
+signal GND40
+signal GND41
+signal GND42
+signal GND43
+signal GND44
+signal GND45
+signal GND46
+signal GND47
+signal GND48
+signal GND49
+signal GND50
+signal GND51
+signal GND52
+signal GND53
+signal GND54
+signal GND55
+signal GND56
+signal GND57
+signal GND58
+signal GND59
+signal GND60
+signal GND61
+signal GND62
+signal GND63
+signal GND64
+signal GND65
+signal GND66
+signal GND67
+signal GND68
+signal GND69
+signal GND70
+signal GND71
+signal GND72
+signal GND73
+signal GND74
+signal GND75
+signal GND76
+signal CCLK_AD26
+signal DONE_AC24
+signal HSWAP_EN_C2
+signal M0_AE3
+signal M1_AC3
+signal M2_AF3
+signal PROG_B
+signal TCK
+signal TDI
+signal TDO
+signal TMS
+signal VCCAUX1
+signal VCCAUX2
+signal VCCAUX3
+signal VCCAUX4
+signal VCCAUX5
+signal VCCAUX6
+signal VCCAUX7
+signal VCCAUX8
+signal VCCAUX9
+signal VCCAUX10
+signal VCCAUX11
+signal VCCAUX12
+signal VCCAUX13
+signal VCCAUX14
+signal VCCAUX15
+signal VCCAUX16
+signal VCCINT1
+signal VCCINT2
+signal VCCINT3
+signal VCCINT4
+signal VCCINT5
+signal VCCINT6
+signal VCCINT7
+signal VCCINT8
+signal VCCINT9
+signal VCCINT10
+signal VCCINT11
+signal VCCINT12
+signal VCCINT13
+signal VCCINT14
+signal VCCINT15
+signal VCCINT16
+signal VCCINT17
+signal VCCINT18
+signal VCCINT19
+signal VCCINT20
+signal VCCO01
+signal VCCO02
+signal VCCO03
+signal VCCO04
+signal VCCO05
+signal VCCO06
+signal VCCO07
+signal VCCO08
+signal VCCO11
+signal VCCO12
+signal VCCO13
+signal VCCO14
+signal VCCO15
+signal VCCO16
+signal VCCO17
+signal VCCO18
+signal VCCO21
+signal VCCO22
+signal VCCO23
+signal VCCO24
+signal VCCO25
+signal VCCO26
+signal VCCO27
+signal VCCO28
+signal VCCO31
+signal VCCO32
+signal VCCO33
+signal VCCO34
+signal VCCO35
+signal VCCO36
+signal VCCO37
+signal VCCO38
+signal VCCO41
+signal VCCO42
+signal VCCO43
+signal VCCO44
+signal VCCO45
+signal VCCO46
+signal VCCO47
+signal VCCO48
+signal VCCO51
+signal VCCO52
+signal VCCO53
+signal VCCO54
+signal VCCO55
+signal VCCO56
+signal VCCO57
+signal VCCO58
+signal VCCO61
+signal VCCO62
+signal VCCO63
+signal VCCO64
+signal VCCO65
+signal VCCO66
+signal VCCO67
+signal VCCO68
+signal VCCO71
+signal VCCO72
+signal VCCO73
+signal VCCO74
+signal VCCO75
+signal VCCO76
+signal VCCO77
+signal VCCO78
+signal IO_A3
+signal IO_A4
+signal IO_A5
+signal IO_A6
+signal IO_A7
+signal IO_A8
+signal IO_A10
+signal IO_A11
+signal IO_A12
+signal IO_A13
+signal IO_A14
+signal IO_A15
+signal IO_A16
+signal IO_A17
+signal IO_A19
+signal IO_A20
+signal IO_A21
+signal IO_A22
+signal IO_A23
+signal IO_B3
+signal IO_B4
+signal IO_B5
+signal IO_B6
+signal IO_B7
+signal IO_B8
+signal IO_B9
+signal IO_B10
+signal IO_B11
+signal IO_B12
+signal IO_B13
+signal IO_B14
+signal IO_B15
+signal IO_B16
+signal IO_B17
+signal IO_B18
+signal IO_B19
+signal IO_B20
+signal IO_B21
+signal IO_B22
+signal IO_B23
+signal IO_C4
+signal IO_C5
+signal IO_C6
+signal IO_C8
+signal IO_C9
+signal IO_C10
+signal IO_C12
+signal IO_C13
+signal IO_C14
+signal IO_C15
+signal IO_C17
+signal IO_C18
+signal IO_C19
+signal IO_C21
+signal IO_C22
+signal IO_C23
+signal IO_C25
+signal IO_C26
+signal IO_D1
+signal IO_D2
+signal IO_D5
+signal IO_D6
+signal IO_D7
+signal IO_D8
+signal IO_D9
+signal IO_D10
+signal IO_D11
+signal IO_D13
+signal IO_D14
+signal IO_D16
+signal IO_D17
+signal IO_D18
+signal IO_D19
+signal IO_D20
+signal IO_D21
+signal IO_D22
+signal IO_D25
+signal IO_D26
+signal IO_E1
+signal IO_E2
+signal IO_E3
+signal IO_E4
+signal IO_E5
+signal IO_E6
+signal IO_E7
+signal IO_E8
+signal IO_E9
+signal IO_E10
+signal IO_E11
+signal IO_E12
+signal IO_E13
+signal IO_E14
+signal IO_E15
+signal IO_E16
+signal IO_E17
+signal IO_E18
+signal IO_E19
+signal IO_E20
+signal IO_E21
+signal IO_E22
+signal IO_E23
+signal IO_E24
+signal IO_E25
+signal IO_E26
+signal IO_F1
+signal IO_F2
+signal IO_F3
+signal IO_F4
+signal IO_F5
+signal IO_F6
+signal IO_F7
+signal IO_F8
+signal IO_F9
+signal IO_F10
+signal IO_F11
+signal IO_F12
+signal IO_F13
+signal IO_F14
+signal IO_F15
+signal IO_F16
+signal IO_F17
+signal IO_F18
+signal IO_F19
+signal IO_F20
+signal IO_F21
+signal IO_F22
+signal IO_F23
+signal IO_F24
+signal IO_F25
+signal IO_F26
+signal IO_G1
+signal IO_G2
+signal IO_G4
+signal IO_G5
+signal IO_G6
+signal IO_G7
+signal IO_G8
+signal IO_G9
+signal IO_G10
+signal IO_G11
+signal IO_G12
+signal IO_G13
+signal IO_G14
+signal IO_G15
+signal IO_G16
+signal IO_G17
+signal IO_G18
+signal IO_G19
+signal IO_G20
+signal IO_G21
+signal IO_G22
+signal IO_G23
+signal IO_G25
+signal IO_G26
+signal IO_H1
+signal IO_H2
+signal IO_H3
+signal IO_H4
+signal IO_H5
+signal IO_H6
+signal IO_H7
+signal IO_H11
+signal IO_H12
+signal IO_H13
+signal IO_H14
+signal IO_H15
+signal IO_H16
+signal IO_H20
+signal IO_H21
+signal IO_H22
+signal IO_H23
+signal IO_H24
+signal IO_H25
+signal IO_H26
+signal IO_J2
+signal IO_J3
+signal IO_J4
+signal IO_J5
+signal IO_J6
+signal IO_J7
+signal IO_J20
+signal IO_J21
+signal IO_J22
+signal IO_J23
+signal IO_J24
+signal IO_J25
+signal IO_K1
+signal IO_K2
+signal IO_K3
+signal IO_K4
+signal IO_K5
+signal IO_K6
+signal IO_K7
+signal IO_K20
+signal IO_K21
+signal IO_K22
+signal IO_K23
+signal IO_K24
+signal IO_K25
+signal IO_K26
+signal IO_L1
+signal IO_L2
+signal IO_L4
+signal IO_L5
+signal IO_L6
+signal IO_L7
+signal IO_L8
+signal IO_L19
+signal IO_L20
+signal IO_L21
+signal IO_L22
+signal IO_L23
+signal IO_L25
+signal IO_L26
+signal IO_M1
+signal IO_M2
+signal IO_M3
+signal IO_M5
+signal IO_M6
+signal IO_M7
+signal IO_M8
+signal IO_M19
+signal IO_M20
+signal IO_M21
+signal IO_M22
+signal IO_M24
+signal IO_M25
+signal IO_M26
+signal IO_N1
+signal IO_N2
+signal IO_N3
+signal IO_N4
+signal IO_N5
+signal IO_N6
+signal IO_N7
+signal IO_N8
+signal IO_N19
+signal IO_N20
+signal IO_N21
+signal IO_N22
+signal IO_N23
+signal IO_N24
+signal IO_N25
+signal IO_N26
+signal IO_P1
+signal IO_P2
+signal IO_P3
+signal IO_P4
+signal IO_P5
+signal IO_P6
+signal IO_P7
+signal IO_P8
+signal IO_P19
+signal IO_P20
+signal IO_P21
+signal IO_P22
+signal IO_P23
+signal IO_P24
+signal IO_P25
+signal IO_P26
+signal IO_R1
+signal IO_R2
+signal IO_R3
+signal IO_R5
+signal IO_R6
+signal IO_R7
+signal IO_R8
+signal IO_R19
+signal IO_R20
+signal IO_R21
+signal IO_R22
+signal IO_R24
+signal IO_R25
+signal IO_R26
+signal IO_T1
+signal IO_T2
+signal IO_T4
+signal IO_T5
+signal IO_T6
+signal IO_T7
+signal IO_T8
+signal IO_T19
+signal IO_T20
+signal IO_T21
+signal IO_T22
+signal IO_T23
+signal IO_T25
+signal IO_T26
+signal IO_U1
+signal IO_U2
+signal IO_U3
+signal IO_U4
+signal IO_U5
+signal IO_U6
+signal IO_U7
+signal IO_U20
+signal IO_U21
+signal IO_U22
+signal IO_U23
+signal IO_U24
+signal IO_U25
+signal IO_U26
+signal IO_V2
+signal IO_V3
+signal IO_V4
+signal IO_V5
+signal IO_V6
+signal IO_V7
+signal IO_V20
+signal IO_V21
+signal IO_V22
+signal IO_V23
+signal IO_V24
+signal IO_V25
+signal IO_W1
+signal IO_W2
+signal IO_W3
+signal IO_W4
+signal IO_W5
+signal IO_W6
+signal IO_W7
+signal IO_W11
+signal IO_W12
+signal IO_W13
+signal IO_W14
+signal IO_W15
+signal IO_W16
+signal IO_W20
+signal IO_W21
+signal IO_W22
+signal IO_W23
+signal IO_W24
+signal IO_W25
+signal IO_W26
+signal IO_Y1
+signal IO_Y2
+signal IO_Y4
+signal IO_Y5
+signal IO_Y6
+signal IO_Y7
+signal IO_Y8
+signal IO_Y9
+signal IO_Y10
+signal IO_Y11
+signal IO_Y12
+signal IO_Y13
+signal IO_Y14
+signal IO_Y15
+signal IO_Y16
+signal IO_Y17
+signal IO_Y18
+signal IO_Y19
+signal IO_Y20
+signal IO_Y21
+signal IO_Y22
+signal IO_Y23
+signal IO_Y25
+signal IO_Y26
+signal IO_AA1
+signal IO_AA2
+signal IO_AA3
+signal IO_AA4
+signal IO_AA5
+signal IO_AA6
+signal IO_AA7
+signal IO_AA8
+signal IO_AA9
+signal IO_AA10
+signal IO_AA11
+signal IO_AA12
+signal IO_AA13
+signal IO_AA14
+signal IO_AA15
+signal IO_AA16
+signal IO_AA17
+signal IO_AA18
+signal IO_AA19
+signal IO_AA20
+signal IO_AA21
+signal IO_AA22
+signal IO_AA23
+signal IO_AA24
+signal IO_AA25
+signal IO_AA26
+signal IO_AB1
+signal IO_AB2
+signal IO_AB3
+signal IO_AB4
+signal IO_AB5
+signal IO_AB6
+signal IO_AB7
+signal IO_AB8
+signal IO_AB9
+signal IO_AB10
+signal IO_AB11
+signal IO_AB12
+signal IO_AB13
+signal IO_AB14
+signal IO_AB15
+signal IO_AB16
+signal IO_AB17
+signal IO_AB18
+signal IO_AB19
+signal IO_AB20
+signal IO_AB21
+signal IO_AB22
+signal IO_AB23
+signal IO_AB24
+signal IO_AB25
+signal IO_AB26
+signal IO_AC1
+signal IO_AC2
+signal IO_AC5
+signal IO_AC6
+signal IO_AC7
+signal IO_AC8
+signal IO_AC9
+signal IO_AC10
+signal IO_AC11
+signal IO_AC13
+signal IO_AC14
+signal IO_AC16
+signal IO_AC17
+signal IO_AC18
+signal IO_AC19
+signal IO_AC20
+signal IO_AC21
+signal IO_AC22
+signal IO_AC25
+signal IO_AC26
+signal IO_AD1
+signal IO_AD2
+signal IO_AD4
+signal IO_AD5
+signal IO_AD6
+signal IO_AD8
+signal IO_AD9
+signal IO_AD10
+signal IO_AD12
+signal IO_AD13
+signal IO_AD14
+signal IO_AD15
+signal IO_AD17
+signal IO_AD18
+signal IO_AD19
+signal IO_AD21
+signal IO_AD22
+signal IO_AD23
+signal IO_AD25
+signal IO_AE4
+signal IO_AE5
+signal IO_AE6
+signal IO_AE7
+signal IO_AE8
+signal IO_AE9
+signal IO_AE10
+signal IO_AE11
+signal IO_AE12
+signal IO_AE13
+signal IO_AE14
+signal IO_AE15
+signal IO_AE16
+signal IO_AE17
+signal IO_AE18
+signal IO_AE19
+signal IO_AE20
+signal IO_AE21
+signal IO_AE22
+signal IO_AE23
+signal IO_AE24
+signal IO_AF4
+signal IO_AF5
+signal IO_AF6
+signal IO_AF7
+signal IO_AF8
+signal IO_AF10
+signal IO_AF11
+signal IO_AF12
+signal IO_AF13
+signal IO_AF14
+signal IO_AF15
+signal IO_AF16
+signal IO_AF17
+signal IO_AF19
+signal IO_AF20
+signal IO_AF21
+signal IO_AF22
+signal IO_AF23
+
+register BSR 1931
+register BR 1
+register DIR 32
+
+instruction length 6
+
+instruction EXTEST 000000 BSR
+instruction SAMPLE/PRELOAD 000001 BSR
+instruction IDCODE 001001 DIR
+instruction BYPASS 111111 BR
+
+bit 1930 I 1 IO_C25
+bit 1929 O 1 IO_C25 1928 1 Z
+bit 1928 C 1 *
+bit 1927 I 1 IO_C26
+bit 1926 O 1 IO_C26 1925 1 Z
+bit 1925 C 1 *
+bit 1924 I 1 IO_E23
+bit 1923 O 1 IO_E23 1922 1 Z
+bit 1922 C 1 *
+bit 1921 I 1 IO_E24
+bit 1920 O 1 IO_E24 1919 1 Z
+bit 1919 C 1 *
+bit 1918 I 1 IO_D25
+bit 1917 O 1 IO_D25 1916 1 Z
+bit 1916 C 1 *
+bit 1915 I 1 IO_D26
+bit 1914 O 1 IO_D26 1913 1 Z
+bit 1913 C 1 *
+bit 1912 I 1 IO_F22
+bit 1911 O 1 IO_F22 1910 1 Z
+bit 1910 C 1 *
+bit 1909 O 1 *
+bit 1908 O 1 *
+bit 1907 O 1 *
+bit 1906 I 1 IO_E25
+bit 1905 O 1 IO_E25 1904 1 Z
+bit 1904 C 1 *
+bit 1903 I 1 IO_E26
+bit 1902 O 1 IO_E26 1901 1 Z
+bit 1901 C 1 *
+bit 1900 I 1 IO_G20
+bit 1899 O 1 IO_G20 1898 1 Z
+bit 1898 C 1 *
+bit 1897 I 1 IO_G21
+bit 1896 O 1 IO_G21 1895 1 Z
+bit 1895 C 1 *
+bit 1894 I 1 IO_F23
+bit 1893 O 1 IO_F23 1892 1 Z
+bit 1892 C 1 *
+bit 1891 I 1 IO_F24
+bit 1890 O 1 IO_F24 1889 1 Z
+bit 1889 C 1 *
+bit 1888 I 1 IO_G22
+bit 1887 O 1 IO_G22 1886 1 Z
+bit 1886 C 1 *
+bit 1885 I 1 IO_G23
+bit 1884 O 1 IO_G23 1883 1 Z
+bit 1883 C 1 *
+bit 1882 I 1 IO_F25
+bit 1881 O 1 IO_F25 1880 1 Z
+bit 1880 C 1 *
+bit 1879 I 1 IO_F26
+bit 1878 O 1 IO_F26 1877 1 Z
+bit 1877 C 1 *
+bit 1876 I 1 IO_G25
+bit 1875 O 1 IO_G25 1874 1 Z
+bit 1874 C 1 *
+bit 1873 I 1 IO_G26
+bit 1872 O 1 IO_G26 1871 1 Z
+bit 1871 C 1 *
+bit 1870 O 1 *
+bit 1869 O 1 *
+bit 1868 O 1 *
+bit 1867 O 1 *
+bit 1866 O 1 *
+bit 1865 O 1 *
+bit 1864 O 1 *
+bit 1863 O 1 *
+bit 1862 O 1 *
+bit 1861 O 1 *
+bit 1860 O 1 *
+bit 1859 O 1 *
+bit 1858 O 1 *
+bit 1857 O 1 *
+bit 1856 O 1 *
+bit 1855 O 1 *
+bit 1854 O 1 *
+bit 1853 O 1 *
+bit 1852 I 1 IO_H20
+bit 1851 O 1 IO_H20 1850 1 Z
+bit 1850 C 1 *
+bit 1849 I 1 IO_H21
+bit 1848 O 1 IO_H21 1847 1 Z
+bit 1847 C 1 *
+bit 1846 O 1 *
+bit 1845 O 1 *
+bit 1844 O 1 *
+bit 1843 O 1 *
+bit 1842 O 1 *
+bit 1841 O 1 *
+bit 1840 I 1 IO_H22
+bit 1839 O 1 IO_H22 1838 1 Z
+bit 1838 C 1 *
+bit 1837 I 1 IO_J21
+bit 1836 O 1 IO_J21 1835 1 Z
+bit 1835 C 1 *
+bit 1834 I 1 IO_H23
+bit 1833 O 1 IO_H23 1832 1 Z
+bit 1832 C 1 *
+bit 1831 I 1 IO_H24
+bit 1830 O 1 IO_H24 1829 1 Z
+bit 1829 C 1 *
+bit 1828 O 1 *
+bit 1827 O 1 *
+bit 1826 O 1 *
+bit 1825 O 1 *
+bit 1824 O 1 *
+bit 1823 O 1 *
+bit 1822 I 1 IO_H25
+bit 1821 O 1 IO_H25 1820 1 Z
+bit 1820 C 1 *
+bit 1819 I 1 IO_H26
+bit 1818 O 1 IO_H26 1817 1 Z
+bit 1817 C 1 *
+bit 1816 I 1 IO_J20
+bit 1815 O 1 IO_J20 1814 1 Z
+bit 1814 C 1 *
+bit 1813 I 1 IO_K20
+bit 1812 O 1 IO_K20 1811 1 Z
+bit 1811 C 1 *
+bit 1810 I 1 IO_J22
+bit 1809 O 1 IO_J22 1808 1 Z
+bit 1808 C 1 *
+bit 1807 I 1 IO_J23
+bit 1806 O 1 IO_J23 1805 1 Z
+bit 1805 C 1 *
+bit 1804 I 1 IO_J24
+bit 1803 O 1 IO_J24 1802 1 Z
+bit 1802 C 1 *
+bit 1801 I 1 IO_J25
+bit 1800 O 1 IO_J25 1799 1 Z
+bit 1799 C 1 *
+bit 1798 I 1 IO_K21
+bit 1797 O 1 IO_K21 1796 1 Z
+bit 1796 C 1 *
+bit 1795 I 1 IO_K22
+bit 1794 O 1 IO_K22 1793 1 Z
+bit 1793 C 1 *
+bit 1792 I 1 IO_K23
+bit 1791 O 1 IO_K23 1790 1 Z
+bit 1790 C 1 *
+bit 1789 I 1 IO_K24
+bit 1788 O 1 IO_K24 1787 1 Z
+bit 1787 C 1 *
+bit 1786 O 1 *
+bit 1785 O 1 *
+bit 1784 O 1 *
+bit 1783 O 1 *
+bit 1782 O 1 *
+bit 1781 O 1 *
+bit 1780 I 1 IO_K25
+bit 1779 O 1 IO_K25 1778 1 Z
+bit 1778 C 1 *
+bit 1777 I 1 IO_K26
+bit 1776 O 1 IO_K26 1775 1 Z
+bit 1775 C 1 *
+bit 1774 I 1 IO_L19
+bit 1773 O 1 IO_L19 1772 1 Z
+bit 1772 C 1 *
+bit 1771 I 1 IO_L20
+bit 1770 O 1 IO_L20 1769 1 Z
+bit 1769 C 1 *
+bit 1768 I 1 IO_L21
+bit 1767 O 1 IO_L21 1766 1 Z
+bit 1766 C 1 *
+bit 1765 I 1 IO_L22
+bit 1764 O 1 IO_L22 1763 1 Z
+bit 1763 C 1 *
+bit 1762 I 1 IO_L25
+bit 1761 O 1 IO_L25 1760 1 Z
+bit 1760 C 1 *
+bit 1759 I 1 IO_L26
+bit 1758 O 1 IO_L26 1757 1 Z
+bit 1757 C 1 *
+bit 1756 O 1 *
+bit 1755 O 1 *
+bit 1754 O 1 *
+bit 1753 O 1 *
+bit 1752 O 1 *
+bit 1751 O 1 *
+bit 1750 I 1 IO_M19
+bit 1749 O 1 IO_M19 1748 1 Z
+bit 1748 C 1 *
+bit 1747 I 1 IO_M20
+bit 1746 O 1 IO_M20 1745 1 Z
+bit 1745 C 1 *
+bit 1744 I 1 IO_M21
+bit 1743 O 1 IO_M21 1742 1 Z
+bit 1742 C 1 *
+bit 1741 I 1 IO_M22
+bit 1740 O 1 IO_M22 1739 1 Z
+bit 1739 C 1 *
+bit 1738 I 1 IO_L23
+bit 1737 O 1 IO_L23 1736 1 Z
+bit 1736 C 1 *
+bit 1735 I 1 IO_M24
+bit 1734 O 1 IO_M24 1733 1 Z
+bit 1733 C 1 *
+bit 1732 I 1 IO_M25
+bit 1731 O 1 IO_M25 1730 1 Z
+bit 1730 C 1 *
+bit 1729 I 1 IO_M26
+bit 1728 O 1 IO_M26 1727 1 Z
+bit 1727 C 1 *
+bit 1726 I 1 IO_N19
+bit 1725 O 1 IO_N19 1724 1 Z
+bit 1724 C 1 *
+bit 1723 I 1 IO_N20
+bit 1722 O 1 IO_N20 1721 1 Z
+bit 1721 C 1 *
+bit 1720 O 1 *
+bit 1719 O 1 *
+bit 1718 O 1 *
+bit 1717 O 1 *
+bit 1716 O 1 *
+bit 1715 O 1 *
+bit 1714 O 1 *
+bit 1713 O 1 *
+bit 1712 O 1 *
+bit 1711 O 1 *
+bit 1710 O 1 *
+bit 1709 O 1 *
+bit 1708 I 1 IO_N21
+bit 1707 O 1 IO_N21 1706 1 Z
+bit 1706 C 1 *
+bit 1705 I 1 IO_N22
+bit 1704 O 1 IO_N22 1703 1 Z
+bit 1703 C 1 *
+bit 1702 I 1 IO_N23
+bit 1701 O 1 IO_N23 1700 1 Z
+bit 1700 C 1 *
+bit 1699 I 1 IO_N24
+bit 1698 O 1 IO_N24 1697 1 Z
+bit 1697 C 1 *
+bit 1696 I 1 IO_N25
+bit 1695 O 1 IO_N25 1694 1 Z
+bit 1694 C 1 *
+bit 1693 I 1 IO_N26
+bit 1692 O 1 IO_N26 1691 1 Z
+bit 1691 C 1 *
+bit 1690 I 1 IO_P26
+bit 1689 O 1 IO_P26 1688 1 Z
+bit 1688 C 1 *
+bit 1687 I 1 IO_P25
+bit 1686 O 1 IO_P25 1685 1 Z
+bit 1685 C 1 *
+bit 1684 I 1 IO_P24
+bit 1683 O 1 IO_P24 1682 1 Z
+bit 1682 C 1 *
+bit 1681 I 1 IO_P23
+bit 1680 O 1 IO_P23 1679 1 Z
+bit 1679 C 1 *
+bit 1678 I 1 IO_P22
+bit 1677 O 1 IO_P22 1676 1 Z
+bit 1676 C 1 *
+bit 1675 I 1 IO_P21
+bit 1674 O 1 IO_P21 1673 1 Z
+bit 1673 C 1 *
+bit 1672 O 1 *
+bit 1671 O 1 *
+bit 1670 O 1 *
+bit 1669 O 1 *
+bit 1668 O 1 *
+bit 1667 O 1 *
+bit 1666 O 1 *
+bit 1665 O 1 *
+bit 1664 O 1 *
+bit 1663 O 1 *
+bit 1662 O 1 *
+bit 1661 O 1 *
+bit 1660 I 1 IO_P20
+bit 1659 O 1 IO_P20 1658 1 Z
+bit 1658 C 1 *
+bit 1657 I 1 IO_P19
+bit 1656 O 1 IO_P19 1655 1 Z
+bit 1655 C 1 *
+bit 1654 I 1 IO_R26
+bit 1653 O 1 IO_R26 1652 1 Z
+bit 1652 C 1 *
+bit 1651 I 1 IO_R25
+bit 1650 O 1 IO_R25 1649 1 Z
+bit 1649 C 1 *
+bit 1648 I 1 IO_R24
+bit 1647 O 1 IO_R24 1646 1 Z
+bit 1646 C 1 *
+bit 1645 I 1 IO_T23
+bit 1644 O 1 IO_T23 1643 1 Z
+bit 1643 C 1 *
+bit 1642 I 1 IO_R22
+bit 1641 O 1 IO_R22 1640 1 Z
+bit 1640 C 1 *
+bit 1639 I 1 IO_R21
+bit 1638 O 1 IO_R21 1637 1 Z
+bit 1637 C 1 *
+bit 1636 I 1 IO_R20
+bit 1635 O 1 IO_R20 1634 1 Z
+bit 1634 C 1 *
+bit 1633 I 1 IO_R19
+bit 1632 O 1 IO_R19 1631 1 Z
+bit 1631 C 1 *
+bit 1630 O 1 *
+bit 1629 O 1 *
+bit 1628 O 1 *
+bit 1627 O 1 *
+bit 1626 O 1 *
+bit 1625 O 1 *
+bit 1624 I 1 IO_T26
+bit 1623 O 1 IO_T26 1622 1 Z
+bit 1622 C 1 *
+bit 1621 I 1 IO_T25
+bit 1620 O 1 IO_T25 1619 1 Z
+bit 1619 C 1 *
+bit 1618 I 1 IO_T22
+bit 1617 O 1 IO_T22 1616 1 Z
+bit 1616 C 1 *
+bit 1615 I 1 IO_T21
+bit 1614 O 1 IO_T21 1613 1 Z
+bit 1613 C 1 *
+bit 1612 I 1 IO_T20
+bit 1611 O 1 IO_T20 1610 1 Z
+bit 1610 C 1 *
+bit 1609 I 1 IO_T19
+bit 1608 O 1 IO_T19 1607 1 Z
+bit 1607 C 1 *
+bit 1606 I 1 IO_U26
+bit 1605 O 1 IO_U26 1604 1 Z
+bit 1604 C 1 *
+bit 1603 I 1 IO_U25
+bit 1602 O 1 IO_U25 1601 1 Z
+bit 1601 C 1 *
+bit 1600 O 1 *
+bit 1599 O 1 *
+bit 1598 O 1 *
+bit 1597 O 1 *
+bit 1596 O 1 *
+bit 1595 O 1 *
+bit 1594 I 1 IO_U24
+bit 1593 O 1 IO_U24 1592 1 Z
+bit 1592 C 1 *
+bit 1591 I 1 IO_U23
+bit 1590 O 1 IO_U23 1589 1 Z
+bit 1589 C 1 *
+bit 1588 I 1 IO_U22
+bit 1587 O 1 IO_U22 1586 1 Z
+bit 1586 C 1 *
+bit 1585 I 1 IO_U21
+bit 1584 O 1 IO_U21 1583 1 Z
+bit 1583 C 1 *
+bit 1582 I 1 IO_V25
+bit 1581 O 1 IO_V25 1580 1 Z
+bit 1580 C 1 *
+bit 1579 I 1 IO_V24
+bit 1578 O 1 IO_V24 1577 1 Z
+bit 1577 C 1 *
+bit 1576 I 1 IO_V23
+bit 1575 O 1 IO_V23 1574 1 Z
+bit 1574 C 1 *
+bit 1573 I 1 IO_V22
+bit 1572 O 1 IO_V22 1571 1 Z
+bit 1571 C 1 *
+bit 1570 I 1 IO_U20
+bit 1569 O 1 IO_U20 1568 1 Z
+bit 1568 C 1 *
+bit 1567 I 1 IO_V20
+bit 1566 O 1 IO_V20 1565 1 Z
+bit 1565 C 1 *
+bit 1564 I 1 IO_W26
+bit 1563 O 1 IO_W26 1562 1 Z
+bit 1562 C 1 *
+bit 1561 I 1 IO_W25
+bit 1560 O 1 IO_W25 1559 1 Z
+bit 1559 C 1 *
+bit 1558 O 1 *
+bit 1557 O 1 *
+bit 1556 O 1 *
+bit 1555 O 1 *
+bit 1554 O 1 *
+bit 1553 O 1 *
+bit 1552 I 1 IO_W24
+bit 1551 O 1 IO_W24 1550 1 Z
+bit 1550 C 1 *
+bit 1549 I 1 IO_W23
+bit 1548 O 1 IO_W23 1547 1 Z
+bit 1547 C 1 *
+bit 1546 I 1 IO_V21
+bit 1545 O 1 IO_V21 1544 1 Z
+bit 1544 C 1 *
+bit 1543 I 1 IO_W22
+bit 1542 O 1 IO_W22 1541 1 Z
+bit 1541 C 1 *
+bit 1540 O 1 *
+bit 1539 O 1 *
+bit 1538 O 1 *
+bit 1537 O 1 *
+bit 1536 O 1 *
+bit 1535 O 1 *
+bit 1534 I 1 IO_Y26
+bit 1533 O 1 IO_Y26 1532 1 Z
+bit 1532 C 1 *
+bit 1531 I 1 IO_Y25
+bit 1530 O 1 IO_Y25 1529 1 Z
+bit 1529 C 1 *
+bit 1528 O 1 *
+bit 1527 O 1 *
+bit 1526 O 1 *
+bit 1525 O 1 *
+bit 1524 O 1 *
+bit 1523 O 1 *
+bit 1522 O 1 *
+bit 1521 O 1 *
+bit 1520 O 1 *
+bit 1519 O 1 *
+bit 1518 O 1 *
+bit 1517 O 1 *
+bit 1516 O 1 *
+bit 1515 O 1 *
+bit 1514 O 1 *
+bit 1513 O 1 *
+bit 1512 O 1 *
+bit 1511 O 1 *
+bit 1510 I 1 IO_W21
+bit 1509 O 1 IO_W21 1508 1 Z
+bit 1508 C 1 *
+bit 1507 I 1 IO_W20
+bit 1506 O 1 IO_W20 1505 1 Z
+bit 1505 C 1 *
+bit 1504 I 1 IO_AA26
+bit 1503 O 1 IO_AA26 1502 1 Z
+bit 1502 C 1 *
+bit 1501 I 1 IO_AA25
+bit 1500 O 1 IO_AA25 1499 1 Z
+bit 1499 C 1 *
+bit 1498 I 1 IO_Y23
+bit 1497 O 1 IO_Y23 1496 1 Z
+bit 1496 C 1 *
+bit 1495 I 1 IO_Y22
+bit 1494 O 1 IO_Y22 1493 1 Z
+bit 1493 C 1 *
+bit 1492 I 1 IO_AA24
+bit 1491 O 1 IO_AA24 1490 1 Z
+bit 1490 C 1 *
+bit 1489 I 1 IO_AA23
+bit 1488 O 1 IO_AA23 1487 1 Z
+bit 1487 C 1 *
+bit 1486 I 1 IO_AB26
+bit 1485 O 1 IO_AB26 1484 1 Z
+bit 1484 C 1 *
+bit 1483 I 1 IO_AB25
+bit 1482 O 1 IO_AB25 1481 1 Z
+bit 1481 C 1 *
+bit 1480 I 1 IO_Y21
+bit 1479 O 1 IO_Y21 1478 1 Z
+bit 1478 C 1 *
+bit 1477 I 1 IO_Y20
+bit 1476 O 1 IO_Y20 1475 1 Z
+bit 1475 C 1 *
+bit 1474 O 1 *
+bit 1473 O 1 *
+bit 1472 O 1 *
+bit 1471 O 1 *
+bit 1470 O 1 *
+bit 1469 O 1 *
+bit 1468 I 1 IO_AC26
+bit 1467 O 1 IO_AC26 1466 1 Z
+bit 1466 C 1 *
+bit 1465 I 1 IO_AC25
+bit 1464 O 1 IO_AC25 1463 1 Z
+bit 1463 C 1 *
+bit 1462 I 1 IO_AB24
+bit 1461 O 1 IO_AB24 1460 1 Z
+bit 1460 C 1 *
+bit 1459 I 1 IO_AB23
+bit 1458 O 1 IO_AB23 1457 1 Z
+bit 1457 C 1 *
+bit 1456 I 1 IO_AA22
+bit 1455 O 1 IO_AA22 1454 1 Z
+bit 1454 C 1 *
+bit 1453 I 1 IO_AA21
+bit 1452 O 1 IO_AA21 1451 1 Z
+bit 1451 C 1 *
+bit 1450 I 1 CCLK_AD26
+bit 1449 O 1 CCLK_AD26 1448 1 Z
+bit 1448 C 1 *
+bit 1447 I 1 DONE_AC24
+bit 1446 O 1 DONE_AC24 1445 1 Z
+bit 1445 C 1 *
+bit 1444 I 1 IO_AD25
+bit 1443 O 1 IO_AD25 1442 1 Z
+bit 1442 C 1 *
+bit 1441 I 1 IO_AB22
+bit 1440 O 1 IO_AB22 1439 1 Z
+bit 1439 C 1 *
+bit 1438 I 1 IO_AC22
+bit 1437 O 1 IO_AC22 1436 1 Z
+bit 1436 C 1 *
+bit 1435 O 1 *
+bit 1434 O 1 *
+bit 1433 O 1 *
+bit 1432 O 1 *
+bit 1431 O 1 *
+bit 1430 O 1 *
+bit 1429 O 1 *
+bit 1428 O 1 *
+bit 1427 O 1 *
+bit 1426 O 1 *
+bit 1425 O 1 *
+bit 1424 O 1 *
+bit 1423 O 1 *
+bit 1422 O 1 *
+bit 1421 O 1 *
+bit 1420 I 1 IO_AE24
+bit 1419 O 1 IO_AE24 1418 1 Z
+bit 1418 C 1 *
+bit 1417 I 1 IO_AF24
+bit 1416 O 1 IO_AF24 1415 1 Z
+bit 1415 C 1 *
+bit 1414 I 1 IO_AD23
+bit 1413 O 1 IO_AD23 1412 1 Z
+bit 1412 C 1 *
+bit 1411 I 1 IO_AE23
+bit 1410 O 1 IO_AE23 1409 1 Z
+bit 1409 C 1 *
+bit 1408 I 1 IO_AF23
+bit 1407 O 1 IO_AF23 1406 1 Z
+bit 1406 C 1 *
+bit 1405 I 1 IO_AD22
+bit 1404 O 1 IO_AD22 1403 1 Z
+bit 1403 C 1 *
+bit 1402 I 1 IO_AE22
+bit 1401 O 1 IO_AE22 1400 1 Z
+bit 1400 C 1 *
+bit 1399 I 1 IO_AF22
+bit 1398 O 1 IO_AF22 1397 1 Z
+bit 1397 C 1 *
+bit 1396 I 1 IO_AB21
+bit 1395 O 1 IO_AB21 1394 1 Z
+bit 1394 C 1 *
+bit 1393 I 1 IO_AC21
+bit 1392 O 1 IO_AC21 1391 1 Z
+bit 1391 C 1 *
+bit 1390 I 1 IO_AD21
+bit 1389 O 1 IO_AD21 1388 1 Z
+bit 1388 C 1 *
+bit 1387 I 1 IO_AE21
+bit 1386 O 1 IO_AE21 1385 1 Z
+bit 1385 C 1 *
+bit 1384 I 1 IO_AF21
+bit 1383 O 1 IO_AF21 1382 1 Z
+bit 1382 C 1 *
+bit 1381 I 1 IO_AB20
+bit 1380 O 1 IO_AB20 1379 1 Z
+bit 1379 C 1 *
+bit 1378 I 1 IO_AC20
+bit 1377 O 1 IO_AC20 1376 1 Z
+bit 1376 C 1 *
+bit 1375 I 1 IO_AE20
+bit 1374 O 1 IO_AE20 1373 1 Z
+bit 1373 C 1 *
+bit 1372 I 1 IO_AF20
+bit 1371 O 1 IO_AF20 1370 1 Z
+bit 1370 C 1 *
+bit 1369 I 1 IO_AA20
+bit 1368 O 1 IO_AA20 1367 1 Z
+bit 1367 C 1 *
+bit 1366 I 1 IO_Y19
+bit 1365 O 1 IO_Y19 1364 1 Z
+bit 1364 C 1 *
+bit 1363 I 1 IO_AA19
+bit 1362 O 1 IO_AA19 1361 1 Z
+bit 1361 C 1 *
+bit 1360 I 1 IO_AB19
+bit 1359 O 1 IO_AB19 1358 1 Z
+bit 1358 C 1 *
+bit 1357 I 1 IO_AC19
+bit 1356 O 1 IO_AC19 1355 1 Z
+bit 1355 C 1 *
+bit 1354 O 1 *
+bit 1353 O 1 *
+bit 1352 O 1 *
+bit 1351 O 1 *
+bit 1350 O 1 *
+bit 1349 O 1 *
+bit 1348 O 1 *
+bit 1347 O 1 *
+bit 1346 O 1 *
+bit 1345 O 1 *
+bit 1344 O 1 *
+bit 1343 O 1 *
+bit 1342 O 1 *
+bit 1341 O 1 *
+bit 1340 O 1 *
+bit 1339 I 1 IO_AD19
+bit 1338 O 1 IO_AD19 1337 1 Z
+bit 1337 C 1 *
+bit 1336 I 1 IO_AE19
+bit 1335 O 1 IO_AE19 1334 1 Z
+bit 1334 C 1 *
+bit 1333 I 1 IO_AF19
+bit 1332 O 1 IO_AF19 1331 1 Z
+bit 1331 C 1 *
+bit 1330 I 1 IO_Y18
+bit 1329 O 1 IO_Y18 1328 1 Z
+bit 1328 C 1 *
+bit 1327 I 1 IO_AA18
+bit 1326 O 1 IO_AA18 1325 1 Z
+bit 1325 C 1 *
+bit 1324 O 1 *
+bit 1323 O 1 *
+bit 1322 O 1 *
+bit 1321 I 1 IO_AB18
+bit 1320 O 1 IO_AB18 1319 1 Z
+bit 1319 C 1 *
+bit 1318 I 1 IO_AC18
+bit 1317 O 1 IO_AC18 1316 1 Z
+bit 1316 C 1 *
+bit 1315 I 1 IO_AD18
+bit 1314 O 1 IO_AD18 1313 1 Z
+bit 1313 C 1 *
+bit 1312 I 1 IO_AE18
+bit 1311 O 1 IO_AE18 1310 1 Z
+bit 1310 C 1 *
+bit 1309 I 1 IO_Y17
+bit 1308 O 1 IO_Y17 1307 1 Z
+bit 1307 C 1 *
+bit 1306 I 1 IO_AC17
+bit 1305 O 1 IO_AC17 1304 1 Z
+bit 1304 C 1 *
+bit 1303 I 1 IO_AA17
+bit 1302 O 1 IO_AA17 1301 1 Z
+bit 1301 C 1 *
+bit 1300 O 1 *
+bit 1299 O 1 *
+bit 1298 O 1 *
+bit 1297 O 1 *
+bit 1296 O 1 *
+bit 1295 O 1 *
+bit 1294 O 1 *
+bit 1293 O 1 *
+bit 1292 O 1 *
+bit 1291 O 1 *
+bit 1290 O 1 *
+bit 1289 O 1 *
+bit 1288 O 1 *
+bit 1287 O 1 *
+bit 1286 O 1 *
+bit 1285 I 1 IO_AD17
+bit 1284 O 1 IO_AD17 1283 1 Z
+bit 1283 C 1 *
+bit 1282 I 1 IO_AB17
+bit 1281 O 1 IO_AB17 1280 1 Z
+bit 1280 C 1 *
+bit 1279 I 1 IO_W16
+bit 1278 O 1 IO_W16 1277 1 Z
+bit 1277 C 1 *
+bit 1276 I 1 IO_AE17
+bit 1275 O 1 IO_AE17 1274 1 Z
+bit 1274 C 1 *
+bit 1273 I 1 IO_AF17
+bit 1272 O 1 IO_AF17 1271 1 Z
+bit 1271 C 1 *
+bit 1270 I 1 IO_Y16
+bit 1269 O 1 IO_Y16 1268 1 Z
+bit 1268 C 1 *
+bit 1267 I 1 IO_AA16
+bit 1266 O 1 IO_AA16 1265 1 Z
+bit 1265 C 1 *
+bit 1264 O 1 *
+bit 1263 O 1 *
+bit 1262 O 1 *
+bit 1261 I 1 IO_AB16
+bit 1260 O 1 IO_AB16 1259 1 Z
+bit 1259 C 1 *
+bit 1258 I 1 IO_AC16
+bit 1257 O 1 IO_AC16 1256 1 Z
+bit 1256 C 1 *
+bit 1255 I 1 IO_AE16
+bit 1254 O 1 IO_AE16 1253 1 Z
+bit 1253 C 1 *
+bit 1252 I 1 IO_AF16
+bit 1251 O 1 IO_AF16 1250 1 Z
+bit 1250 C 1 *
+bit 1249 I 1 IO_W15
+bit 1248 O 1 IO_W15 1247 1 Z
+bit 1247 C 1 *
+bit 1246 I 1 IO_Y15
+bit 1245 O 1 IO_Y15 1244 1 Z
+bit 1244 C 1 *
+bit 1243 I 1 IO_W14
+bit 1242 O 1 IO_W14 1241 1 Z
+bit 1241 C 1 *
+bit 1240 I 1 IO_AA15
+bit 1239 O 1 IO_AA15 1238 1 Z
+bit 1238 C 1 *
+bit 1237 I 1 IO_AB15
+bit 1236 O 1 IO_AB15 1235 1 Z
+bit 1235 C 1 *
+bit 1234 I 1 IO_AD15
+bit 1233 O 1 IO_AD15 1232 1 Z
+bit 1232 C 1 *
+bit 1231 I 1 IO_AE15
+bit 1230 O 1 IO_AE15 1229 1 Z
+bit 1229 C 1 *
+bit 1228 I 1 IO_AF15
+bit 1227 O 1 IO_AF15 1226 1 Z
+bit 1226 C 1 *
+bit 1225 I 1 IO_Y14
+bit 1224 O 1 IO_Y14 1223 1 Z
+bit 1223 C 1 *
+bit 1222 I 1 IO_AA14
+bit 1221 O 1 IO_AA14 1220 1 Z
+bit 1220 C 1 *
+bit 1219 I 1 IO_AB14
+bit 1218 O 1 IO_AB14 1217 1 Z
+bit 1217 C 1 *
+bit 1216 I 1 IO_AC14
+bit 1215 O 1 IO_AC14 1214 1 Z
+bit 1214 C 1 *
+bit 1213 I 1 IO_AD14
+bit 1212 O 1 IO_AD14 1211 1 Z
+bit 1211 C 1 *
+bit 1210 I 1 IO_AE14
+bit 1209 O 1 IO_AE14 1208 1 Z
+bit 1208 C 1 *
+bit 1207 I 1 IO_AF14
+bit 1206 O 1 IO_AF14 1205 1 Z
+bit 1205 C 1 *
+bit 1204 I 1 IO_AF13
+bit 1203 O 1 IO_AF13 1202 1 Z
+bit 1202 C 1 *
+bit 1201 I 1 IO_AE13
+bit 1200 O 1 IO_AE13 1199 1 Z
+bit 1199 C 1 *
+bit 1198 I 1 IO_AD13
+bit 1197 O 1 IO_AD13 1196 1 Z
+bit 1196 C 1 *
+bit 1195 I 1 IO_AC13
+bit 1194 O 1 IO_AC13 1193 1 Z
+bit 1193 C 1 *
+bit 1192 I 1 IO_AB13
+bit 1191 O 1 IO_AB13 1190 1 Z
+bit 1190 C 1 *
+bit 1189 I 1 IO_AA13
+bit 1188 O 1 IO_AA13 1187 1 Z
+bit 1187 C 1 *
+bit 1186 I 1 IO_Y13
+bit 1185 O 1 IO_Y13 1184 1 Z
+bit 1184 C 1 *
+bit 1183 I 1 IO_W13
+bit 1182 O 1 IO_W13 1181 1 Z
+bit 1181 C 1 *
+bit 1180 I 1 IO_AF12
+bit 1179 O 1 IO_AF12 1178 1 Z
+bit 1178 C 1 *
+bit 1177 I 1 IO_AE12
+bit 1176 O 1 IO_AE12 1175 1 Z
+bit 1175 C 1 *
+bit 1174 I 1 IO_AD12
+bit 1173 O 1 IO_AD12 1172 1 Z
+bit 1172 C 1 *
+bit 1171 I 1 IO_AB12
+bit 1170 O 1 IO_AB12 1169 1 Z
+bit 1169 C 1 *
+bit 1168 I 1 IO_AA12
+bit 1167 O 1 IO_AA12 1166 1 Z
+bit 1166 C 1 *
+bit 1165 I 1 IO_Y12
+bit 1164 O 1 IO_Y12 1163 1 Z
+bit 1163 C 1 *
+bit 1162 I 1 IO_W12
+bit 1161 O 1 IO_W12 1160 1 Z
+bit 1160 C 1 *
+bit 1159 I 1 IO_AC11
+bit 1158 O 1 IO_AC11 1157 1 Z
+bit 1157 C 1 *
+bit 1156 I 1 IO_AF11
+bit 1155 O 1 IO_AF11 1154 1 Z
+bit 1154 C 1 *
+bit 1153 I 1 IO_AE11
+bit 1152 O 1 IO_AE11 1151 1 Z
+bit 1151 C 1 *
+bit 1150 I 1 IO_AB11
+bit 1149 O 1 IO_AB11 1148 1 Z
+bit 1148 C 1 *
+bit 1147 I 1 IO_AA11
+bit 1146 O 1 IO_AA11 1145 1 Z
+bit 1145 C 1 *
+bit 1144 O 1 *
+bit 1143 O 1 *
+bit 1142 O 1 *
+bit 1141 I 1 IO_Y11
+bit 1140 O 1 IO_Y11 1139 1 Z
+bit 1139 C 1 *
+bit 1138 I 1 IO_W11
+bit 1137 O 1 IO_W11 1136 1 Z
+bit 1136 C 1 *
+bit 1135 I 1 IO_AF10
+bit 1134 O 1 IO_AF10 1133 1 Z
+bit 1133 C 1 *
+bit 1132 I 1 IO_AE10
+bit 1131 O 1 IO_AE10 1130 1 Z
+bit 1130 C 1 *
+bit 1129 I 1 IO_AD10
+bit 1128 O 1 IO_AD10 1127 1 Z
+bit 1127 C 1 *
+bit 1126 I 1 IO_AC10
+bit 1125 O 1 IO_AC10 1124 1 Z
+bit 1124 C 1 *
+bit 1123 I 1 IO_AB10
+bit 1122 O 1 IO_AB10 1121 1 Z
+bit 1121 C 1 *
+bit 1120 O 1 *
+bit 1119 O 1 *
+bit 1118 O 1 *
+bit 1117 O 1 *
+bit 1116 O 1 *
+bit 1115 O 1 *
+bit 1114 O 1 *
+bit 1113 O 1 *
+bit 1112 O 1 *
+bit 1111 O 1 *
+bit 1110 O 1 *
+bit 1109 O 1 *
+bit 1108 O 1 *
+bit 1107 O 1 *
+bit 1106 O 1 *
+bit 1105 I 1 IO_AA10
+bit 1104 O 1 IO_AA10 1103 1 Z
+bit 1103 C 1 *
+bit 1102 I 1 IO_Y10
+bit 1101 O 1 IO_Y10 1100 1 Z
+bit 1100 C 1 *
+bit 1099 O 1 *
+bit 1098 O 1 *
+bit 1097 O 1 *
+bit 1096 I 1 IO_AE9
+bit 1095 O 1 IO_AE9 1094 1 Z
+bit 1094 C 1 *
+bit 1093 I 1 IO_AD9
+bit 1092 O 1 IO_AD9 1091 1 Z
+bit 1091 C 1 *
+bit 1090 I 1 IO_AC9
+bit 1089 O 1 IO_AC9 1088 1 Z
+bit 1088 C 1 *
+bit 1087 O 1 *
+bit 1086 O 1 *
+bit 1085 O 1 *
+bit 1084 I 1 IO_AB9
+bit 1083 O 1 IO_AB9 1082 1 Z
+bit 1082 C 1 *
+bit 1081 I 1 IO_AA9
+bit 1080 O 1 IO_AA9 1079 1 Z
+bit 1079 C 1 *
+bit 1078 I 1 IO_Y9
+bit 1077 O 1 IO_Y9 1076 1 Z
+bit 1076 C 1 *
+bit 1075 I 1 IO_AF8
+bit 1074 O 1 IO_AF8 1073 1 Z
+bit 1073 C 1 *
+bit 1072 I 1 IO_AE8
+bit 1071 O 1 IO_AE8 1070 1 Z
+bit 1070 C 1 *
+bit 1069 O 1 *
+bit 1068 O 1 *
+bit 1067 O 1 *
+bit 1066 O 1 *
+bit 1065 O 1 *
+bit 1064 O 1 *
+bit 1063 O 1 *
+bit 1062 O 1 *
+bit 1061 O 1 *
+bit 1060 O 1 *
+bit 1059 O 1 *
+bit 1058 O 1 *
+bit 1057 O 1 *
+bit 1056 O 1 *
+bit 1055 O 1 *
+bit 1054 O 1 *
+bit 1053 O 1 *
+bit 1052 O 1 *
+bit 1051 I 1 IO_AD8
+bit 1050 O 1 IO_AD8 1049 1 Z
+bit 1049 C 1 *
+bit 1048 I 1 IO_AC8
+bit 1047 O 1 IO_AC8 1046 1 Z
+bit 1046 C 1 *
+bit 1045 I 1 IO_AB8
+bit 1044 O 1 IO_AB8 1043 1 Z
+bit 1043 C 1 *
+bit 1042 I 1 IO_AA8
+bit 1041 O 1 IO_AA8 1040 1 Z
+bit 1040 C 1 *
+bit 1039 I 1 IO_Y8
+bit 1038 O 1 IO_Y8 1037 1 Z
+bit 1037 C 1 *
+bit 1036 I 1 IO_AF7
+bit 1035 O 1 IO_AF7 1034 1 Z
+bit 1034 C 1 *
+bit 1033 I 1 IO_AE7
+bit 1032 O 1 IO_AE7 1031 1 Z
+bit 1031 C 1 *
+bit 1030 I 1 IO_AC7
+bit 1029 O 1 IO_AC7 1028 1 Z
+bit 1028 C 1 *
+bit 1027 I 1 IO_AB7
+bit 1026 O 1 IO_AB7 1025 1 Z
+bit 1025 C 1 *
+bit 1024 I 1 IO_AA7
+bit 1023 O 1 IO_AA7 1022 1 Z
+bit 1022 C 1 *
+bit 1021 I 1 IO_AF6
+bit 1020 O 1 IO_AF6 1019 1 Z
+bit 1019 C 1 *
+bit 1018 I 1 IO_AE6
+bit 1017 O 1 IO_AE6 1016 1 Z
+bit 1016 C 1 *
+bit 1015 I 1 IO_AD6
+bit 1014 O 1 IO_AD6 1013 1 Z
+bit 1013 C 1 *
+bit 1012 I 1 IO_AC6
+bit 1011 O 1 IO_AC6 1010 1 Z
+bit 1010 C 1 *
+bit 1009 I 1 IO_AF5
+bit 1008 O 1 IO_AF5 1007 1 Z
+bit 1007 C 1 *
+bit 1006 I 1 IO_AE5
+bit 1005 O 1 IO_AE5 1004 1 Z
+bit 1004 C 1 *
+bit 1003 I 1 IO_AD5
+bit 1002 O 1 IO_AD5 1001 1 Z
+bit 1001 C 1 *
+bit 1000 I 1 IO_AB6
+bit 999 O 1 IO_AB6 998 1 Z
+bit 998 C 1 *
+bit 997 I 1 IO_AA6
+bit 996 O 1 IO_AA6 995 1 Z
+bit 995 C 1 *
+bit 994 I 1 IO_AF4
+bit 993 O 1 IO_AF4 992 1 Z
+bit 992 C 1 *
+bit 991 I 1 IO_AE4
+bit 990 O 1 IO_AE4 989 1 Z
+bit 989 C 1 *
+bit 988 I 1 IO_AD4
+bit 987 O 1 IO_AD4 986 1 Z
+bit 986 C 1 *
+bit 985 O 1 *
+bit 984 O 1 *
+bit 983 O 1 *
+bit 982 O 1 *
+bit 981 O 1 *
+bit 980 O 1 *
+bit 979 O 1 *
+bit 978 O 1 *
+bit 977 O 1 *
+bit 976 O 1 *
+bit 975 O 1 *
+bit 974 O 1 *
+bit 973 O 1 *
+bit 972 O 1 *
+bit 971 O 1 *
+bit 970 I 1 IO_AC5
+bit 969 O 1 IO_AC5 968 1 Z
+bit 968 C 1 *
+bit 967 I 1 IO_AB5
+bit 966 O 1 IO_AB5 965 1 Z
+bit 965 C 1 *
+bit 964 I 1 M2_AF3
+bit 963 I 1 M0_AE3
+bit 962 I 1 M1_AC3
+bit 961 I 1 IO_AD2
+bit 960 O 1 IO_AD2 959 1 Z
+bit 959 C 1 *
+bit 958 I 1 IO_AD1
+bit 957 O 1 IO_AD1 956 1 Z
+bit 956 C 1 *
+bit 955 I 1 IO_AB4
+bit 954 O 1 IO_AB4 953 1 Z
+bit 953 C 1 *
+bit 952 I 1 IO_AB3
+bit 951 O 1 IO_AB3 950 1 Z
+bit 950 C 1 *
+bit 949 I 1 IO_AC2
+bit 948 O 1 IO_AC2 947 1 Z
+bit 947 C 1 *
+bit 946 I 1 IO_AC1
+bit 945 O 1 IO_AC1 944 1 Z
+bit 944 C 1 *
+bit 943 I 1 IO_AA5
+bit 942 O 1 IO_AA5 941 1 Z
+bit 941 C 1 *
+bit 940 O 1 *
+bit 939 O 1 *
+bit 938 O 1 *
+bit 937 I 1 IO_AB2
+bit 936 O 1 IO_AB2 935 1 Z
+bit 935 C 1 *
+bit 934 I 1 IO_AB1
+bit 933 O 1 IO_AB1 932 1 Z
+bit 932 C 1 *
+bit 931 I 1 IO_Y7
+bit 930 O 1 IO_Y7 929 1 Z
+bit 929 C 1 *
+bit 928 I 1 IO_Y6
+bit 927 O 1 IO_Y6 926 1 Z
+bit 926 C 1 *
+bit 925 I 1 IO_AA4
+bit 924 O 1 IO_AA4 923 1 Z
+bit 923 C 1 *
+bit 922 I 1 IO_AA3
+bit 921 O 1 IO_AA3 920 1 Z
+bit 920 C 1 *
+bit 919 I 1 IO_Y5
+bit 918 O 1 IO_Y5 917 1 Z
+bit 917 C 1 *
+bit 916 I 1 IO_Y4
+bit 915 O 1 IO_Y4 914 1 Z
+bit 914 C 1 *
+bit 913 I 1 IO_AA2
+bit 912 O 1 IO_AA2 911 1 Z
+bit 911 C 1 *
+bit 910 I 1 IO_AA1
+bit 909 O 1 IO_AA1 908 1 Z
+bit 908 C 1 *
+bit 907 I 1 IO_Y2
+bit 906 O 1 IO_Y2 905 1 Z
+bit 905 C 1 *
+bit 904 I 1 IO_Y1
+bit 903 O 1 IO_Y1 902 1 Z
+bit 902 C 1 *
+bit 901 O 1 *
+bit 900 O 1 *
+bit 899 O 1 *
+bit 898 O 1 *
+bit 897 O 1 *
+bit 896 O 1 *
+bit 895 O 1 *
+bit 894 O 1 *
+bit 893 O 1 *
+bit 892 O 1 *
+bit 891 O 1 *
+bit 890 O 1 *
+bit 889 O 1 *
+bit 888 O 1 *
+bit 887 O 1 *
+bit 886 O 1 *
+bit 885 O 1 *
+bit 884 O 1 *
+bit 883 I 1 IO_W7
+bit 882 O 1 IO_W7 881 1 Z
+bit 881 C 1 *
+bit 880 I 1 IO_W6
+bit 879 O 1 IO_W6 878 1 Z
+bit 878 C 1 *
+bit 877 O 1 *
+bit 876 O 1 *
+bit 875 O 1 *
+bit 874 O 1 *
+bit 873 O 1 *
+bit 872 O 1 *
+bit 871 I 1 IO_V6
+bit 870 O 1 IO_V6 869 1 Z
+bit 869 C 1 *
+bit 868 I 1 IO_W5
+bit 867 O 1 IO_W5 866 1 Z
+bit 866 C 1 *
+bit 865 I 1 IO_W4
+bit 864 O 1 IO_W4 863 1 Z
+bit 863 C 1 *
+bit 862 I 1 IO_W3
+bit 861 O 1 IO_W3 860 1 Z
+bit 860 C 1 *
+bit 859 O 1 *
+bit 858 O 1 *
+bit 857 O 1 *
+bit 856 O 1 *
+bit 855 O 1 *
+bit 854 O 1 *
+bit 853 I 1 IO_W2
+bit 852 O 1 IO_W2 851 1 Z
+bit 851 C 1 *
+bit 850 I 1 IO_W1
+bit 849 O 1 IO_W1 848 1 Z
+bit 848 C 1 *
+bit 847 I 1 IO_V7
+bit 846 O 1 IO_V7 845 1 Z
+bit 845 C 1 *
+bit 844 I 1 IO_U7
+bit 843 O 1 IO_U7 842 1 Z
+bit 842 C 1 *
+bit 841 I 1 IO_V5
+bit 840 O 1 IO_V5 839 1 Z
+bit 839 C 1 *
+bit 838 I 1 IO_V4
+bit 837 O 1 IO_V4 836 1 Z
+bit 836 C 1 *
+bit 835 I 1 IO_V3
+bit 834 O 1 IO_V3 833 1 Z
+bit 833 C 1 *
+bit 832 I 1 IO_V2
+bit 831 O 1 IO_V2 830 1 Z
+bit 830 C 1 *
+bit 829 I 1 IO_U6
+bit 828 O 1 IO_U6 827 1 Z
+bit 827 C 1 *
+bit 826 I 1 IO_U5
+bit 825 O 1 IO_U5 824 1 Z
+bit 824 C 1 *
+bit 823 I 1 IO_U4
+bit 822 O 1 IO_U4 821 1 Z
+bit 821 C 1 *
+bit 820 I 1 IO_U3
+bit 819 O 1 IO_U3 818 1 Z
+bit 818 C 1 *
+bit 817 O 1 *
+bit 816 O 1 *
+bit 815 O 1 *
+bit 814 O 1 *
+bit 813 O 1 *
+bit 812 O 1 *
+bit 811 I 1 IO_U2
+bit 810 O 1 IO_U2 809 1 Z
+bit 809 C 1 *
+bit 808 I 1 IO_U1
+bit 807 O 1 IO_U1 806 1 Z
+bit 806 C 1 *
+bit 805 I 1 IO_T8
+bit 804 O 1 IO_T8 803 1 Z
+bit 803 C 1 *
+bit 802 I 1 IO_T7
+bit 801 O 1 IO_T7 800 1 Z
+bit 800 C 1 *
+bit 799 I 1 IO_T6
+bit 798 O 1 IO_T6 797 1 Z
+bit 797 C 1 *
+bit 796 I 1 IO_T5
+bit 795 O 1 IO_T5 794 1 Z
+bit 794 C 1 *
+bit 793 I 1 IO_T2
+bit 792 O 1 IO_T2 791 1 Z
+bit 791 C 1 *
+bit 790 I 1 IO_T1
+bit 789 O 1 IO_T1 788 1 Z
+bit 788 C 1 *
+bit 787 O 1 *
+bit 786 O 1 *
+bit 785 O 1 *
+bit 784 O 1 *
+bit 783 O 1 *
+bit 782 O 1 *
+bit 781 I 1 IO_R8
+bit 780 O 1 IO_R8 779 1 Z
+bit 779 C 1 *
+bit 778 I 1 IO_R7
+bit 777 O 1 IO_R7 776 1 Z
+bit 776 C 1 *
+bit 775 I 1 IO_R6
+bit 774 O 1 IO_R6 773 1 Z
+bit 773 C 1 *
+bit 772 I 1 IO_R5
+bit 771 O 1 IO_R5 770 1 Z
+bit 770 C 1 *
+bit 769 I 1 IO_T4
+bit 768 O 1 IO_T4 767 1 Z
+bit 767 C 1 *
+bit 766 I 1 IO_R3
+bit 765 O 1 IO_R3 764 1 Z
+bit 764 C 1 *
+bit 763 I 1 IO_R2
+bit 762 O 1 IO_R2 761 1 Z
+bit 761 C 1 *
+bit 760 I 1 IO_R1
+bit 759 O 1 IO_R1 758 1 Z
+bit 758 C 1 *
+bit 757 I 1 IO_P8
+bit 756 O 1 IO_P8 755 1 Z
+bit 755 C 1 *
+bit 754 I 1 IO_P7
+bit 753 O 1 IO_P7 752 1 Z
+bit 752 C 1 *
+bit 751 O 1 *
+bit 750 O 1 *
+bit 749 O 1 *
+bit 748 O 1 *
+bit 747 O 1 *
+bit 746 O 1 *
+bit 745 O 1 *
+bit 744 O 1 *
+bit 743 O 1 *
+bit 742 O 1 *
+bit 741 O 1 *
+bit 740 O 1 *
+bit 739 I 1 IO_P6
+bit 738 O 1 IO_P6 737 1 Z
+bit 737 C 1 *
+bit 736 I 1 IO_P5
+bit 735 O 1 IO_P5 734 1 Z
+bit 734 C 1 *
+bit 733 I 1 IO_P4
+bit 732 O 1 IO_P4 731 1 Z
+bit 731 C 1 *
+bit 730 I 1 IO_P3
+bit 729 O 1 IO_P3 728 1 Z
+bit 728 C 1 *
+bit 727 I 1 IO_P2
+bit 726 O 1 IO_P2 725 1 Z
+bit 725 C 1 *
+bit 724 I 1 IO_P1
+bit 723 O 1 IO_P1 722 1 Z
+bit 722 C 1 *
+bit 721 I 1 IO_N1
+bit 720 O 1 IO_N1 719 1 Z
+bit 719 C 1 *
+bit 718 I 1 IO_N2
+bit 717 O 1 IO_N2 716 1 Z
+bit 716 C 1 *
+bit 715 I 1 IO_N3
+bit 714 O 1 IO_N3 713 1 Z
+bit 713 C 1 *
+bit 712 I 1 IO_N4
+bit 711 O 1 IO_N4 710 1 Z
+bit 710 C 1 *
+bit 709 I 1 IO_N5
+bit 708 O 1 IO_N5 707 1 Z
+bit 707 C 1 *
+bit 706 I 1 IO_N6
+bit 705 O 1 IO_N6 704 1 Z
+bit 704 C 1 *
+bit 703 O 1 *
+bit 702 O 1 *
+bit 701 O 1 *
+bit 700 O 1 *
+bit 699 O 1 *
+bit 698 O 1 *
+bit 697 O 1 *
+bit 696 O 1 *
+bit 695 O 1 *
+bit 694 O 1 *
+bit 693 O 1 *
+bit 692 O 1 *
+bit 691 I 1 IO_N7
+bit 690 O 1 IO_N7 689 1 Z
+bit 689 C 1 *
+bit 688 I 1 IO_N8
+bit 687 O 1 IO_N8 686 1 Z
+bit 686 C 1 *
+bit 685 I 1 IO_M1
+bit 684 O 1 IO_M1 683 1 Z
+bit 683 C 1 *
+bit 682 I 1 IO_M2
+bit 681 O 1 IO_M2 680 1 Z
+bit 680 C 1 *
+bit 679 I 1 IO_M3
+bit 678 O 1 IO_M3 677 1 Z
+bit 677 C 1 *
+bit 676 I 1 IO_L4
+bit 675 O 1 IO_L4 674 1 Z
+bit 674 C 1 *
+bit 673 I 1 IO_M6
+bit 672 O 1 IO_M6 671 1 Z
+bit 671 C 1 *
+bit 670 I 1 IO_M5
+bit 669 O 1 IO_M5 668 1 Z
+bit 668 C 1 *
+bit 667 I 1 IO_M7
+bit 666 O 1 IO_M7 665 1 Z
+bit 665 C 1 *
+bit 664 I 1 IO_M8
+bit 663 O 1 IO_M8 662 1 Z
+bit 662 C 1 *
+bit 661 O 1 *
+bit 660 O 1 *
+bit 659 O 1 *
+bit 658 O 1 *
+bit 657 O 1 *
+bit 656 O 1 *
+bit 655 I 1 IO_L1
+bit 654 O 1 IO_L1 653 1 Z
+bit 653 C 1 *
+bit 652 I 1 IO_L2
+bit 651 O 1 IO_L2 650 1 Z
+bit 650 C 1 *
+bit 649 I 1 IO_L5
+bit 648 O 1 IO_L5 647 1 Z
+bit 647 C 1 *
+bit 646 I 1 IO_L6
+bit 645 O 1 IO_L6 644 1 Z
+bit 644 C 1 *
+bit 643 I 1 IO_L7
+bit 642 O 1 IO_L7 641 1 Z
+bit 641 C 1 *
+bit 640 I 1 IO_L8
+bit 639 O 1 IO_L8 638 1 Z
+bit 638 C 1 *
+bit 637 I 1 IO_K1
+bit 636 O 1 IO_K1 635 1 Z
+bit 635 C 1 *
+bit 634 I 1 IO_K2
+bit 633 O 1 IO_K2 632 1 Z
+bit 632 C 1 *
+bit 631 O 1 *
+bit 630 O 1 *
+bit 629 O 1 *
+bit 628 O 1 *
+bit 627 O 1 *
+bit 626 O 1 *
+bit 625 I 1 IO_K3
+bit 624 O 1 IO_K3 623 1 Z
+bit 623 C 1 *
+bit 622 I 1 IO_K4
+bit 621 O 1 IO_K4 620 1 Z
+bit 620 C 1 *
+bit 619 I 1 IO_K5
+bit 618 O 1 IO_K5 617 1 Z
+bit 617 C 1 *
+bit 616 I 1 IO_K6
+bit 615 O 1 IO_K6 614 1 Z
+bit 614 C 1 *
+bit 613 I 1 IO_J2
+bit 612 O 1 IO_J2 611 1 Z
+bit 611 C 1 *
+bit 610 I 1 IO_J3
+bit 609 O 1 IO_J3 608 1 Z
+bit 608 C 1 *
+bit 607 I 1 IO_J4
+bit 606 O 1 IO_J4 605 1 Z
+bit 605 C 1 *
+bit 604 I 1 IO_J5
+bit 603 O 1 IO_J5 602 1 Z
+bit 602 C 1 *
+bit 601 I 1 IO_K7
+bit 600 O 1 IO_K7 599 1 Z
+bit 599 C 1 *
+bit 598 I 1 IO_J7
+bit 597 O 1 IO_J7 596 1 Z
+bit 596 C 1 *
+bit 595 I 1 IO_H1
+bit 594 O 1 IO_H1 593 1 Z
+bit 593 C 1 *
+bit 592 I 1 IO_H2
+bit 591 O 1 IO_H2 590 1 Z
+bit 590 C 1 *
+bit 589 O 1 *
+bit 588 O 1 *
+bit 587 O 1 *
+bit 586 O 1 *
+bit 585 O 1 *
+bit 584 O 1 *
+bit 583 I 1 IO_H3
+bit 582 O 1 IO_H3 581 1 Z
+bit 581 C 1 *
+bit 580 I 1 IO_H4
+bit 579 O 1 IO_H4 578 1 Z
+bit 578 C 1 *
+bit 577 I 1 IO_J6
+bit 576 O 1 IO_J6 575 1 Z
+bit 575 C 1 *
+bit 574 I 1 IO_H5
+bit 573 O 1 IO_H5 572 1 Z
+bit 572 C 1 *
+bit 571 O 1 *
+bit 570 O 1 *
+bit 569 O 1 *
+bit 568 O 1 *
+bit 567 O 1 *
+bit 566 O 1 *
+bit 565 I 1 IO_G1
+bit 564 O 1 IO_G1 563 1 Z
+bit 563 C 1 *
+bit 562 I 1 IO_G2
+bit 561 O 1 IO_G2 560 1 Z
+bit 560 C 1 *
+bit 559 O 1 *
+bit 558 O 1 *
+bit 557 O 1 *
+bit 556 O 1 *
+bit 555 O 1 *
+bit 554 O 1 *
+bit 553 O 1 *
+bit 552 O 1 *
+bit 551 O 1 *
+bit 550 O 1 *
+bit 549 O 1 *
+bit 548 O 1 *
+bit 547 O 1 *
+bit 546 O 1 *
+bit 545 O 1 *
+bit 544 O 1 *
+bit 543 O 1 *
+bit 542 O 1 *
+bit 541 I 1 IO_H6
+bit 540 O 1 IO_H6 539 1 Z
+bit 539 C 1 *
+bit 538 I 1 IO_H7
+bit 537 O 1 IO_H7 536 1 Z
+bit 536 C 1 *
+bit 535 I 1 IO_F1
+bit 534 O 1 IO_F1 533 1 Z
+bit 533 C 1 *
+bit 532 I 1 IO_F2
+bit 531 O 1 IO_F2 530 1 Z
+bit 530 C 1 *
+bit 529 I 1 IO_G4
+bit 528 O 1 IO_G4 527 1 Z
+bit 527 C 1 *
+bit 526 I 1 IO_G5
+bit 525 O 1 IO_G5 524 1 Z
+bit 524 C 1 *
+bit 523 I 1 IO_F3
+bit 522 O 1 IO_F3 521 1 Z
+bit 521 C 1 *
+bit 520 I 1 IO_F4
+bit 519 O 1 IO_F4 518 1 Z
+bit 518 C 1 *
+bit 517 I 1 IO_E1
+bit 516 O 1 IO_E1 515 1 Z
+bit 515 C 1 *
+bit 514 I 1 IO_E2
+bit 513 O 1 IO_E2 512 1 Z
+bit 512 C 1 *
+bit 511 I 1 IO_G6
+bit 510 O 1 IO_G6 509 1 Z
+bit 509 C 1 *
+bit 508 I 1 IO_G7
+bit 507 O 1 IO_G7 506 1 Z
+bit 506 C 1 *
+bit 505 O 1 *
+bit 504 O 1 *
+bit 503 O 1 *
+bit 502 O 1 *
+bit 501 O 1 *
+bit 500 O 1 *
+bit 499 I 1 IO_D1
+bit 498 O 1 IO_D1 497 1 Z
+bit 497 C 1 *
+bit 496 I 1 IO_D2
+bit 495 O 1 IO_D2 494 1 Z
+bit 494 C 1 *
+bit 493 I 1 IO_E3
+bit 492 O 1 IO_E3 491 1 Z
+bit 491 C 1 *
+bit 490 I 1 IO_E4
+bit 489 O 1 IO_E4 488 1 Z
+bit 488 C 1 *
+bit 487 I 1 IO_F5
+bit 486 O 1 IO_F5 485 1 Z
+bit 485 C 1 *
+bit 484 I 1 IO_F6
+bit 483 O 1 IO_F6 482 1 Z
+bit 482 C 1 *
+bit 481 O 1 *
+bit 480 I 1 HSWAP_EN_C2
+bit 479 I 1 IO_B3
+bit 478 O 1 IO_B3 477 1 Z
+bit 477 C 1 *
+bit 476 I 1 IO_E5
+bit 475 O 1 IO_E5 474 1 Z
+bit 474 C 1 *
+bit 473 I 1 IO_D5
+bit 472 O 1 IO_D5 471 1 Z
+bit 471 C 1 *
+bit 470 O 1 *
+bit 469 O 1 *
+bit 468 O 1 *
+bit 467 O 1 *
+bit 466 O 1 *
+bit 465 O 1 *
+bit 464 O 1 *
+bit 463 O 1 *
+bit 462 O 1 *
+bit 461 O 1 *
+bit 460 O 1 *
+bit 459 O 1 *
+bit 458 O 1 *
+bit 457 O 1 *
+bit 456 O 1 *
+bit 455 O 1 *
+bit 454 O 1 *
+bit 453 O 1 *
+bit 452 I 1 IO_A3
+bit 451 O 1 IO_A3 450 1 Z
+bit 450 C 1 *
+bit 449 I 1 IO_C4
+bit 448 O 1 IO_C4 447 1 Z
+bit 447 C 1 *
+bit 446 I 1 IO_B4
+bit 445 O 1 IO_B4 444 1 Z
+bit 444 C 1 *
+bit 443 I 1 IO_A4
+bit 442 O 1 IO_A4 441 1 Z
+bit 441 C 1 *
+bit 440 I 1 IO_C5
+bit 439 O 1 IO_C5 438 1 Z
+bit 438 C 1 *
+bit 437 I 1 IO_B5
+bit 436 O 1 IO_B5 435 1 Z
+bit 435 C 1 *
+bit 434 I 1 IO_A5
+bit 433 O 1 IO_A5 432 1 Z
+bit 432 C 1 *
+bit 431 I 1 IO_E6
+bit 430 O 1 IO_E6 429 1 Z
+bit 429 C 1 *
+bit 428 I 1 IO_D6
+bit 427 O 1 IO_D6 426 1 Z
+bit 426 C 1 *
+bit 425 I 1 IO_C6
+bit 424 O 1 IO_C6 423 1 Z
+bit 423 C 1 *
+bit 422 I 1 IO_B6
+bit 421 O 1 IO_B6 420 1 Z
+bit 420 C 1 *
+bit 419 I 1 IO_A6
+bit 418 O 1 IO_A6 417 1 Z
+bit 417 C 1 *
+bit 416 I 1 IO_E7
+bit 415 O 1 IO_E7 414 1 Z
+bit 414 C 1 *
+bit 413 I 1 IO_D7
+bit 412 O 1 IO_D7 411 1 Z
+bit 411 C 1 *
+bit 410 I 1 IO_B7
+bit 409 O 1 IO_B7 408 1 Z
+bit 408 C 1 *
+bit 407 I 1 IO_A7
+bit 406 O 1 IO_A7 405 1 Z
+bit 405 C 1 *
+bit 404 I 1 IO_F7
+bit 403 O 1 IO_F7 402 1 Z
+bit 402 C 1 *
+bit 401 I 1 IO_G8
+bit 400 O 1 IO_G8 399 1 Z
+bit 399 C 1 *
+bit 398 I 1 IO_F8
+bit 397 O 1 IO_F8 396 1 Z
+bit 396 C 1 *
+bit 395 I 1 IO_E8
+bit 394 O 1 IO_E8 393 1 Z
+bit 393 C 1 *
+bit 392 I 1 IO_D8
+bit 391 O 1 IO_D8 390 1 Z
+bit 390 C 1 *
+bit 389 O 1 *
+bit 388 O 1 *
+bit 387 O 1 *
+bit 386 O 1 *
+bit 385 O 1 *
+bit 384 O 1 *
+bit 383 O 1 *
+bit 382 O 1 *
+bit 381 O 1 *
+bit 380 O 1 *
+bit 379 O 1 *
+bit 378 O 1 *
+bit 377 O 1 *
+bit 376 O 1 *
+bit 375 O 1 *
+bit 374 I 1 IO_C8
+bit 373 O 1 IO_C8 372 1 Z
+bit 372 C 1 *
+bit 371 I 1 IO_B8
+bit 370 O 1 IO_B8 369 1 Z
+bit 369 C 1 *
+bit 368 I 1 IO_A8
+bit 367 O 1 IO_A8 366 1 Z
+bit 366 C 1 *
+bit 365 I 1 IO_G9
+bit 364 O 1 IO_G9 363 1 Z
+bit 363 C 1 *
+bit 362 I 1 IO_F9
+bit 361 O 1 IO_F9 360 1 Z
+bit 360 C 1 *
+bit 359 O 1 *
+bit 358 O 1 *
+bit 357 O 1 *
+bit 356 I 1 IO_E9
+bit 355 O 1 IO_E9 354 1 Z
+bit 354 C 1 *
+bit 353 I 1 IO_D9
+bit 352 O 1 IO_D9 351 1 Z
+bit 351 C 1 *
+bit 350 I 1 IO_C9
+bit 349 O 1 IO_C9 348 1 Z
+bit 348 C 1 *
+bit 347 I 1 IO_B9
+bit 346 O 1 IO_B9 345 1 Z
+bit 345 C 1 *
+bit 344 I 1 IO_G10
+bit 343 O 1 IO_G10 342 1 Z
+bit 342 C 1 *
+bit 341 I 1 IO_F10
+bit 340 O 1 IO_F10 339 1 Z
+bit 339 C 1 *
+bit 338 I 1 IO_E10
+bit 337 O 1 IO_E10 336 1 Z
+bit 336 C 1 *
+bit 335 O 1 *
+bit 334 O 1 *
+bit 333 O 1 *
+bit 332 O 1 *
+bit 331 O 1 *
+bit 330 O 1 *
+bit 329 O 1 *
+bit 328 O 1 *
+bit 327 O 1 *
+bit 326 O 1 *
+bit 325 O 1 *
+bit 324 O 1 *
+bit 323 O 1 *
+bit 322 O 1 *
+bit 321 O 1 *
+bit 320 I 1 IO_D10
+bit 319 O 1 IO_D10 318 1 Z
+bit 318 C 1 *
+bit 317 I 1 IO_C10
+bit 316 O 1 IO_C10 315 1 Z
+bit 315 C 1 *
+bit 314 I 1 IO_H11
+bit 313 O 1 IO_H11 312 1 Z
+bit 312 C 1 *
+bit 311 I 1 IO_B10
+bit 310 O 1 IO_B10 309 1 Z
+bit 309 C 1 *
+bit 308 I 1 IO_A10
+bit 307 O 1 IO_A10 306 1 Z
+bit 306 C 1 *
+bit 305 I 1 IO_G11
+bit 304 O 1 IO_G11 303 1 Z
+bit 303 C 1 *
+bit 302 I 1 IO_F11
+bit 301 O 1 IO_F11 300 1 Z
+bit 300 C 1 *
+bit 299 O 1 *
+bit 298 O 1 *
+bit 297 O 1 *
+bit 296 I 1 IO_E11
+bit 295 O 1 IO_E11 294 1 Z
+bit 294 C 1 *
+bit 293 I 1 IO_D11
+bit 292 O 1 IO_D11 291 1 Z
+bit 291 C 1 *
+bit 290 I 1 IO_B11
+bit 289 O 1 IO_B11 288 1 Z
+bit 288 C 1 *
+bit 287 I 1 IO_A11
+bit 286 O 1 IO_A11 285 1 Z
+bit 285 C 1 *
+bit 284 I 1 IO_H12
+bit 283 O 1 IO_H12 282 1 Z
+bit 282 C 1 *
+bit 281 I 1 IO_G12
+bit 280 O 1 IO_G12 279 1 Z
+bit 279 C 1 *
+bit 278 I 1 IO_H13
+bit 277 O 1 IO_H13 276 1 Z
+bit 276 C 1 *
+bit 275 I 1 IO_F12
+bit 274 O 1 IO_F12 273 1 Z
+bit 273 C 1 *
+bit 272 I 1 IO_E12
+bit 271 O 1 IO_E12 270 1 Z
+bit 270 C 1 *
+bit 269 I 1 IO_C12
+bit 268 O 1 IO_C12 267 1 Z
+bit 267 C 1 *
+bit 266 I 1 IO_B12
+bit 265 O 1 IO_B12 264 1 Z
+bit 264 C 1 *
+bit 263 I 1 IO_A12
+bit 262 O 1 IO_A12 261 1 Z
+bit 261 C 1 *
+bit 260 I 1 IO_G13
+bit 259 O 1 IO_G13 258 1 Z
+bit 258 C 1 *
+bit 257 I 1 IO_F13
+bit 256 O 1 IO_F13 255 1 Z
+bit 255 C 1 *
+bit 254 I 1 IO_E13
+bit 253 O 1 IO_E13 252 1 Z
+bit 252 C 1 *
+bit 251 I 1 IO_D13
+bit 250 O 1 IO_D13 249 1 Z
+bit 249 C 1 *
+bit 248 I 1 IO_C13
+bit 247 O 1 IO_C13 246 1 Z
+bit 246 C 1 *
+bit 245 I 1 IO_B13
+bit 244 O 1 IO_B13 243 1 Z
+bit 243 C 1 *
+bit 242 I 1 IO_A13
+bit 241 O 1 IO_A13 240 1 Z
+bit 240 C 1 *
+bit 239 I 1 IO_A14
+bit 238 O 1 IO_A14 237 1 Z
+bit 237 C 1 *
+bit 236 I 1 IO_B14
+bit 235 O 1 IO_B14 234 1 Z
+bit 234 C 1 *
+bit 233 I 1 IO_C14
+bit 232 O 1 IO_C14 231 1 Z
+bit 231 C 1 *
+bit 230 I 1 IO_D14
+bit 229 O 1 IO_D14 228 1 Z
+bit 228 C 1 *
+bit 227 I 1 IO_E14
+bit 226 O 1 IO_E14 225 1 Z
+bit 225 C 1 *
+bit 224 I 1 IO_F14
+bit 223 O 1 IO_F14 222 1 Z
+bit 222 C 1 *
+bit 221 I 1 IO_G14
+bit 220 O 1 IO_G14 219 1 Z
+bit 219 C 1 *
+bit 218 I 1 IO_H14
+bit 217 O 1 IO_H14 216 1 Z
+bit 216 C 1 *
+bit 215 I 1 IO_A15
+bit 214 O 1 IO_A15 213 1 Z
+bit 213 C 1 *
+bit 212 I 1 IO_B15
+bit 211 O 1 IO_B15 210 1 Z
+bit 210 C 1 *
+bit 209 I 1 IO_C15
+bit 208 O 1 IO_C15 207 1 Z
+bit 207 C 1 *
+bit 206 I 1 IO_E15
+bit 205 O 1 IO_E15 204 1 Z
+bit 204 C 1 *
+bit 203 I 1 IO_F15
+bit 202 O 1 IO_F15 201 1 Z
+bit 201 C 1 *
+bit 200 I 1 IO_G15
+bit 199 O 1 IO_G15 198 1 Z
+bit 198 C 1 *
+bit 197 I 1 IO_H15
+bit 196 O 1 IO_H15 195 1 Z
+bit 195 C 1 *
+bit 194 I 1 IO_D16
+bit 193 O 1 IO_D16 192 1 Z
+bit 192 C 1 *
+bit 191 I 1 IO_A16
+bit 190 O 1 IO_A16 189 1 Z
+bit 189 C 1 *
+bit 188 I 1 IO_B16
+bit 187 O 1 IO_B16 186 1 Z
+bit 186 C 1 *
+bit 185 I 1 IO_E16
+bit 184 O 1 IO_E16 183 1 Z
+bit 183 C 1 *
+bit 182 I 1 IO_F16
+bit 181 O 1 IO_F16 180 1 Z
+bit 180 C 1 *
+bit 179 O 1 *
+bit 178 O 1 *
+bit 177 O 1 *
+bit 176 I 1 IO_G16
+bit 175 O 1 IO_G16 174 1 Z
+bit 174 C 1 *
+bit 173 I 1 IO_H16
+bit 172 O 1 IO_H16 171 1 Z
+bit 171 C 1 *
+bit 170 I 1 IO_A17
+bit 169 O 1 IO_A17 168 1 Z
+bit 168 C 1 *
+bit 167 I 1 IO_B17
+bit 166 O 1 IO_B17 165 1 Z
+bit 165 C 1 *
+bit 164 I 1 IO_C17
+bit 163 O 1 IO_C17 162 1 Z
+bit 162 C 1 *
+bit 161 I 1 IO_D17
+bit 160 O 1 IO_D17 159 1 Z
+bit 159 C 1 *
+bit 158 I 1 IO_E17
+bit 157 O 1 IO_E17 156 1 Z
+bit 156 C 1 *
+bit 155 O 1 *
+bit 154 O 1 *
+bit 153 O 1 *
+bit 152 O 1 *
+bit 151 O 1 *
+bit 150 O 1 *
+bit 149 O 1 *
+bit 148 O 1 *
+bit 147 O 1 *
+bit 146 O 1 *
+bit 145 O 1 *
+bit 144 O 1 *
+bit 143 O 1 *
+bit 142 O 1 *
+bit 141 O 1 *
+bit 140 I 1 IO_F17
+bit 139 O 1 IO_F17 138 1 Z
+bit 138 C 1 *
+bit 137 I 1 IO_G17
+bit 136 O 1 IO_G17 135 1 Z
+bit 135 C 1 *
+bit 134 O 1 *
+bit 133 O 1 *
+bit 132 O 1 *
+bit 131 I 1 IO_B18
+bit 130 O 1 IO_B18 129 1 Z
+bit 129 C 1 *
+bit 128 I 1 IO_C18
+bit 127 O 1 IO_C18 126 1 Z
+bit 126 C 1 *
+bit 125 I 1 IO_D18
+bit 124 O 1 IO_D18 123 1 Z
+bit 123 C 1 *
+bit 122 O 1 *
+bit 121 O 1 *
+bit 120 O 1 *
+bit 119 I 1 IO_E18
+bit 118 O 1 IO_E18 117 1 Z
+bit 117 C 1 *
+bit 116 I 1 IO_F18
+bit 115 O 1 IO_F18 114 1 Z
+bit 114 C 1 *
+bit 113 I 1 IO_G18
+bit 112 O 1 IO_G18 111 1 Z
+bit 111 C 1 *
+bit 110 I 1 IO_A19
+bit 109 O 1 IO_A19 108 1 Z
+bit 108 C 1 *
+bit 107 I 1 IO_B19
+bit 106 O 1 IO_B19 105 1 Z
+bit 105 C 1 *
+bit 104 O 1 *
+bit 103 O 1 *
+bit 102 O 1 *
+bit 101 O 1 *
+bit 100 O 1 *
+bit 99 O 1 *
+bit 98 O 1 *
+bit 97 O 1 *
+bit 96 O 1 *
+bit 95 O 1 *
+bit 94 O 1 *
+bit 93 O 1 *
+bit 92 O 1 *
+bit 91 O 1 *
+bit 90 O 1 *
+bit 89 O 1 *
+bit 88 O 1 *
+bit 87 O 1 *
+bit 86 I 1 IO_C19
+bit 85 O 1 IO_C19 84 1 Z
+bit 84 C 1 *
+bit 83 I 1 IO_D19
+bit 82 O 1 IO_D19 81 1 Z
+bit 81 C 1 *
+bit 80 I 1 IO_E19
+bit 79 O 1 IO_E19 78 1 Z
+bit 78 C 1 *
+bit 77 I 1 IO_F19
+bit 76 O 1 IO_F19 75 1 Z
+bit 75 C 1 *
+bit 74 I 1 IO_G19
+bit 73 O 1 IO_G19 72 1 Z
+bit 72 C 1 *
+bit 71 I 1 IO_A20
+bit 70 O 1 IO_A20 69 1 Z
+bit 69 C 1 *
+bit 68 I 1 IO_B20
+bit 67 O 1 IO_B20 66 1 Z
+bit 66 C 1 *
+bit 65 I 1 IO_D20
+bit 64 O 1 IO_D20 63 1 Z
+bit 63 C 1 *
+bit 62 I 1 IO_E20
+bit 61 O 1 IO_E20 60 1 Z
+bit 60 C 1 *
+bit 59 I 1 IO_F20
+bit 58 O 1 IO_F20 57 1 Z
+bit 57 C 1 *
+bit 56 I 1 IO_A21
+bit 55 O 1 IO_A21 54 1 Z
+bit 54 C 1 *
+bit 53 I 1 IO_B21
+bit 52 O 1 IO_B21 51 1 Z
+bit 51 C 1 *
+bit 50 I 1 IO_C21
+bit 49 O 1 IO_C21 48 1 Z
+bit 48 C 1 *
+bit 47 I 1 IO_D21
+bit 46 O 1 IO_D21 45 1 Z
+bit 45 C 1 *
+bit 44 I 1 IO_A22
+bit 43 O 1 IO_A22 42 1 Z
+bit 42 C 1 *
+bit 41 I 1 IO_B22
+bit 40 O 1 IO_B22 39 1 Z
+bit 39 C 1 *
+bit 38 I 1 IO_C22
+bit 37 O 1 IO_C22 36 1 Z
+bit 36 C 1 *
+bit 35 I 1 IO_E21
+bit 34 O 1 IO_E21 33 1 Z
+bit 33 C 1 *
+bit 32 I 1 IO_F21
+bit 31 O 1 IO_F21 30 1 Z
+bit 30 C 1 *
+bit 29 I 1 IO_A23
+bit 28 O 1 IO_A23 27 1 Z
+bit 27 C 1 *
+bit 26 I 1 IO_B23
+bit 25 O 1 IO_B23 24 1 Z
+bit 24 C 1 *
+bit 23 I 1 IO_C23
+bit 22 O 1 IO_C23 21 1 Z
+bit 21 C 1 *
+bit 20 O 1 *
+bit 19 O 1 *
+bit 18 O 1 *
+bit 17 O 1 *
+bit 16 O 1 *
+bit 15 O 1 *
+bit 14 O 1 *
+bit 13 O 1 *
+bit 12 O 1 *
+bit 11 O 1 *
+bit 10 O 1 *
+bit 9 O 1 *
+bit 8 O 1 *
+bit 7 O 1 *
+bit 6 O 1 *
+bit 5 I 1 IO_D22
+bit 4 O 1 IO_D22 3 1 Z
+bit 3 C 1 *
+bit 2 I 1 IO_E22
+bit 1 O 1 IO_E22 0 1 Z
+bit 0 C 1 *
--- /dev/null
+signal GND1
+signal GND2
+signal GND3
+signal GND4
+signal GND5
+signal GND6
+signal GND7
+signal GND8
+signal GND9
+signal GND10
+signal GND11
+signal GND12
+signal GND13
+signal GND14
+signal GND15
+signal GND16
+signal GND17
+signal GND18
+signal GND19
+signal GND20
+signal GND21
+signal GND22
+signal GND23
+signal GND24
+signal GND25
+signal GND26
+signal GND27
+signal GND28
+signal GND29
+signal GND30
+signal GND31
+signal GND32
+signal GND33
+signal GND34
+signal GND35
+signal GND36
+signal GND37
+signal GND38
+signal GND39
+signal GND40
+signal GND41
+signal GND42
+signal GND43
+signal GND44
+signal GND45
+signal GND46
+signal GND47
+signal GND48
+signal GND49
+signal GND50
+signal GND51
+signal GND52
+signal GND53
+signal GND54
+signal GND55
+signal GND56
+signal GND57
+signal GND58
+signal GND59
+signal GND60
+signal GND61
+signal GND62
+signal GND63
+signal GND64
+signal GND65
+signal GND66
+signal GND67
+signal GND68
+signal GND69
+signal GND70
+signal GND71
+signal GND72
+signal GND73
+signal GND74
+signal GND75
+signal GND76
+signal GND77
+signal GND78
+signal GND79
+signal GND80
+signal GND81
+signal GND82
+signal GND83
+signal GND84
+signal GND85
+signal GND86
+signal GND87
+signal GND88
+signal GND89
+signal GND90
+signal GND91
+signal GND92
+signal GND93
+signal GND94
+signal GND95
+signal GND96
+signal GND97
+signal GND98
+signal GND99
+signal GND100
+signal GND101
+signal GND102
+signal GND103
+signal GND104
+signal GND105
+signal GND106
+signal GND107
+signal GND108
+signal GND109
+signal GND110
+signal GND111
+signal GND112
+signal GND113
+signal GND114
+signal GND115
+signal GND116
+signal GND117
+signal GND118
+signal GND119
+signal GND120
+signal NOCONNECT1
+signal NOCONNECT2
+signal NOCONNECT3
+signal NOCONNECT4
+signal NOCONNECT5
+signal NOCONNECT6
+signal NOCONNECT7
+signal NOCONNECT8
+signal CCLK_AH28
+signal DONE_AJ28
+signal HSWAP_EN_A3
+signal M0_AJ3
+signal M1_AH3
+signal M2_AK3
+signal PROG_B
+signal TCK
+signal TDI
+signal TDO
+signal TMS
+signal VCCAUX1
+signal VCCAUX2
+signal VCCAUX3
+signal VCCAUX4
+signal VCCAUX5
+signal VCCAUX6
+signal VCCAUX7
+signal VCCAUX8
+signal VCCAUX9
+signal VCCAUX10
+signal VCCAUX11
+signal VCCAUX12
+signal VCCAUX13
+signal VCCAUX14
+signal VCCAUX15
+signal VCCAUX16
+signal VCCAUX17
+signal VCCAUX18
+signal VCCAUX19
+signal VCCAUX20
+signal VCCAUX21
+signal VCCAUX22
+signal VCCAUX23
+signal VCCAUX24
+signal VCCINT1
+signal VCCINT2
+signal VCCINT3
+signal VCCINT4
+signal VCCINT5
+signal VCCINT6
+signal VCCINT7
+signal VCCINT8
+signal VCCINT9
+signal VCCINT10
+signal VCCINT11
+signal VCCINT12
+signal VCCINT13
+signal VCCINT14
+signal VCCINT15
+signal VCCINT16
+signal VCCINT17
+signal VCCINT18
+signal VCCINT19
+signal VCCINT20
+signal VCCINT21
+signal VCCINT22
+signal VCCINT23
+signal VCCINT24
+signal VCCINT25
+signal VCCINT26
+signal VCCINT27
+signal VCCINT28
+signal VCCINT29
+signal VCCINT30
+signal VCCINT31
+signal VCCINT32
+signal VCCO01
+signal VCCO02
+signal VCCO03
+signal VCCO04
+signal VCCO05
+signal VCCO06
+signal VCCO07
+signal VCCO08
+signal VCCO09
+signal VCCO010
+signal VCCO11
+signal VCCO12
+signal VCCO13
+signal VCCO14
+signal VCCO15
+signal VCCO16
+signal VCCO17
+signal VCCO18
+signal VCCO19
+signal VCCO110
+signal VCCO21
+signal VCCO22
+signal VCCO23
+signal VCCO24
+signal VCCO25
+signal VCCO26
+signal VCCO27
+signal VCCO28
+signal VCCO29
+signal VCCO210
+signal VCCO31
+signal VCCO32
+signal VCCO33
+signal VCCO34
+signal VCCO35
+signal VCCO36
+signal VCCO37
+signal VCCO38
+signal VCCO39
+signal VCCO310
+signal VCCO41
+signal VCCO42
+signal VCCO43
+signal VCCO44
+signal VCCO45
+signal VCCO46
+signal VCCO47
+signal VCCO48
+signal VCCO49
+signal VCCO410
+signal VCCO51
+signal VCCO52
+signal VCCO53
+signal VCCO54
+signal VCCO55
+signal VCCO56
+signal VCCO57
+signal VCCO58
+signal VCCO59
+signal VCCO510
+signal VCCO61
+signal VCCO62
+signal VCCO63
+signal VCCO64
+signal VCCO65
+signal VCCO66
+signal VCCO67
+signal VCCO68
+signal VCCO69
+signal VCCO610
+signal VCCO71
+signal VCCO72
+signal VCCO73
+signal VCCO74
+signal VCCO75
+signal VCCO76
+signal VCCO77
+signal VCCO78
+signal VCCO79
+signal VCCO710
+signal IO_A4
+signal IO_A5
+signal IO_A8
+signal IO_A11
+signal IO_A12
+signal IO_A13
+signal IO_A15
+signal IO_A16
+signal IO_A19
+signal IO_A20
+signal IO_A22
+signal IO_A23
+signal IO_A24
+signal IO_A26
+signal IO_A27
+signal IO_B4
+signal IO_B5
+signal IO_B6
+signal IO_B8
+signal IO_B10
+signal IO_B11
+signal IO_B12
+signal IO_B13
+signal IO_B14
+signal IO_B15
+signal IO_B16
+signal IO_B17
+signal IO_B19
+signal IO_B20
+signal IO_B21
+signal IO_B22
+signal IO_B23
+signal IO_B24
+signal IO_B25
+signal IO_B26
+signal IO_B27
+signal IO_C1
+signal IO_C2
+signal IO_C4
+signal IO_C6
+signal IO_C7
+signal IO_C8
+signal IO_C10
+signal IO_C11
+signal IO_C12
+signal IO_C14
+signal IO_C15
+signal IO_C16
+signal IO_C17
+signal IO_C19
+signal IO_C20
+signal IO_C21
+signal IO_C23
+signal IO_C24
+signal IO_C25
+signal IO_C27
+signal IO_C29
+signal IO_C30
+signal IO_D1
+signal IO_D2
+signal IO_D3
+signal IO_D4
+signal IO_D5
+signal IO_D7
+signal IO_D8
+signal IO_D11
+signal IO_D12
+signal IO_D13
+signal IO_D15
+signal IO_D16
+signal IO_D19
+signal IO_D20
+signal IO_D22
+signal IO_D23
+signal IO_D24
+signal IO_D26
+signal IO_D27
+signal IO_D28
+signal IO_D29
+signal IO_D30
+signal IO_E1
+signal IO_E2
+signal IO_E4
+signal IO_E6
+signal IO_E8
+signal IO_E11
+signal IO_E12
+signal IO_E13
+signal IO_E15
+signal IO_E16
+signal IO_E19
+signal IO_E20
+signal IO_E22
+signal IO_E23
+signal IO_E25
+signal IO_E29
+signal IO_E30
+signal IO_F2
+signal IO_F3
+signal IO_F5
+signal IO_F6
+signal IO_F7
+signal IO_F8
+signal IO_F9
+signal IO_F10
+signal IO_F11
+signal IO_F12
+signal IO_F13
+signal IO_F14
+signal IO_F15
+signal IO_F16
+signal IO_F17
+signal IO_F18
+signal IO_F19
+signal IO_F20
+signal IO_F21
+signal IO_F22
+signal IO_F23
+signal IO_F24
+signal IO_F25
+signal IO_F28
+signal IO_F29
+signal IO_G1
+signal IO_G2
+signal IO_G3
+signal IO_G4
+signal IO_G6
+signal IO_G8
+signal IO_G10
+signal IO_G11
+signal IO_G12
+signal IO_G14
+signal IO_G15
+signal IO_G16
+signal IO_G17
+signal IO_G19
+signal IO_G20
+signal IO_G21
+signal IO_G23
+signal IO_G24
+signal IO_G25
+signal IO_G27
+signal IO_G28
+signal IO_G29
+signal IO_G30
+signal IO_H1
+signal IO_H2
+signal IO_H3
+signal IO_H4
+signal IO_H5
+signal IO_H6
+signal IO_H7
+signal IO_H9
+signal IO_H11
+signal IO_H12
+signal IO_H13
+signal IO_H15
+signal IO_H16
+signal IO_H19
+signal IO_H20
+signal IO_H22
+signal IO_H23
+signal IO_H24
+signal IO_H25
+signal IO_H26
+signal IO_H27
+signal IO_H28
+signal IO_H29
+signal IO_H30
+signal IO_J1
+signal IO_J2
+signal IO_J4
+signal IO_J5
+signal IO_J6
+signal IO_J8
+signal IO_J9
+signal IO_J10
+signal IO_J12
+signal IO_J13
+signal IO_J14
+signal IO_J15
+signal IO_J16
+signal IO_J17
+signal IO_J19
+signal IO_J21
+signal IO_J22
+signal IO_J23
+signal IO_J25
+signal IO_J26
+signal IO_J27
+signal IO_J29
+signal IO_J30
+signal IO_K2
+signal IO_K3
+signal IO_K6
+signal IO_K7
+signal IO_K9
+signal IO_K10
+signal IO_K11
+signal IO_K12
+signal IO_K13
+signal IO_K14
+signal IO_K15
+signal IO_K16
+signal IO_K19
+signal IO_K20
+signal IO_K22
+signal IO_K24
+signal IO_K25
+signal IO_L1
+signal IO_L2
+signal IO_L3
+signal IO_L4
+signal IO_L5
+signal IO_L6
+signal IO_L7
+signal IO_L8
+signal IO_L10
+signal IO_L25
+signal IO_L26
+signal IO_L27
+signal IO_L28
+signal IO_L29
+signal IO_L30
+signal IO_M1
+signal IO_M2
+signal IO_M3
+signal IO_M4
+signal IO_M10
+signal IO_M21
+signal IO_M22
+signal IO_M23
+signal IO_M24
+signal IO_M25
+signal IO_M26
+signal IO_M27
+signal IO_M28
+signal IO_N1
+signal IO_N2
+signal IO_N8
+signal IO_N9
+signal IO_N10
+signal IO_N21
+signal IO_N22
+signal IO_N23
+signal IO_N25
+signal IO_N26
+signal IO_N27
+signal IO_N29
+signal IO_N30
+signal IO_P2
+signal IO_P3
+signal IO_P6
+signal IO_P7
+signal IO_P9
+signal IO_P10
+signal IO_P21
+signal IO_P22
+signal IO_P24
+signal IO_P25
+signal IO_P28
+signal IO_P29
+signal IO_R1
+signal IO_R2
+signal IO_R3
+signal IO_R4
+signal IO_R5
+signal IO_R6
+signal IO_R7
+signal IO_R8
+signal IO_R9
+signal IO_R10
+signal IO_R21
+signal IO_R22
+signal IO_R23
+signal IO_R24
+signal IO_R25
+signal IO_R26
+signal IO_R27
+signal IO_R28
+signal IO_R29
+signal IO_R30
+signal IO_T1
+signal IO_T2
+signal IO_T3
+signal IO_T4
+signal IO_T5
+signal IO_T6
+signal IO_T9
+signal IO_T10
+signal IO_T21
+signal IO_T22
+signal IO_T23
+signal IO_T24
+signal IO_T25
+signal IO_T26
+signal IO_T27
+signal IO_T28
+signal IO_T29
+signal IO_T30
+signal IO_U6
+signal IO_U7
+signal IO_U9
+signal IO_U10
+signal IO_U21
+signal IO_U22
+signal IO_U24
+signal IO_U25
+signal IO_U28
+signal IO_U29
+signal IO_V1
+signal IO_V2
+signal IO_V4
+signal IO_V5
+signal IO_V6
+signal IO_V10
+signal IO_V21
+signal IO_V22
+signal IO_V23
+signal IO_V25
+signal IO_V29
+signal IO_V30
+signal IO_W1
+signal IO_W2
+signal IO_W3
+signal IO_W4
+signal IO_W5
+signal IO_W6
+signal IO_W7
+signal IO_W10
+signal IO_W21
+signal IO_W26
+signal IO_W29
+signal IO_W30
+signal IO_Y1
+signal IO_Y2
+signal IO_Y5
+signal IO_Y6
+signal IO_Y7
+signal IO_Y8
+signal IO_Y10
+signal IO_Y21
+signal IO_Y23
+signal IO_Y24
+signal IO_Y25
+signal IO_Y26
+signal IO_Y27
+signal IO_Y28
+signal IO_Y29
+signal IO_Y30
+signal IO_AA2
+signal IO_AA3
+signal IO_AA6
+signal IO_AA7
+signal IO_AA9
+signal IO_AA10
+signal IO_AA11
+signal IO_AA12
+signal IO_AA13
+signal IO_AA14
+signal IO_AA15
+signal IO_AA16
+signal IO_AA17
+signal IO_AA18
+signal IO_AA19
+signal IO_AA20
+signal IO_AA21
+signal IO_AA22
+signal IO_AA24
+signal IO_AA25
+signal IO_AA28
+signal IO_AA29
+signal IO_AB1
+signal IO_AB2
+signal IO_AB4
+signal IO_AB5
+signal IO_AB6
+signal IO_AB8
+signal IO_AB9
+signal IO_AB10
+signal IO_AB12
+signal IO_AB13
+signal IO_AB14
+signal IO_AB15
+signal IO_AB16
+signal IO_AB17
+signal IO_AB18
+signal IO_AB19
+signal IO_AB21
+signal IO_AB22
+signal IO_AB23
+signal IO_AB25
+signal IO_AB26
+signal IO_AB27
+signal IO_AB29
+signal IO_AB30
+signal IO_AC1
+signal IO_AC2
+signal IO_AC3
+signal IO_AC4
+signal IO_AC5
+signal IO_AC6
+signal IO_AC7
+signal IO_AC9
+signal IO_AC11
+signal IO_AC12
+signal IO_AC13
+signal IO_AC15
+signal IO_AC16
+signal IO_AC18
+signal IO_AC19
+signal IO_AC20
+signal IO_AC22
+signal IO_AC23
+signal IO_AC24
+signal IO_AC25
+signal IO_AC26
+signal IO_AC27
+signal IO_AC28
+signal IO_AC29
+signal IO_AC30
+signal IO_AD1
+signal IO_AD2
+signal IO_AD3
+signal IO_AD4
+signal IO_AD6
+signal IO_AD7
+signal IO_AD10
+signal IO_AD11
+signal IO_AD12
+signal IO_AD14
+signal IO_AD15
+signal IO_AD16
+signal IO_AD17
+signal IO_AD19
+signal IO_AD20
+signal IO_AD21
+signal IO_AD23
+signal IO_AD24
+signal IO_AD25
+signal IO_AD27
+signal IO_AD28
+signal IO_AD29
+signal IO_AD30
+signal IO_AE2
+signal IO_AE3
+signal IO_AE5
+signal IO_AE6
+signal IO_AE7
+signal IO_AE9
+signal IO_AE10
+signal IO_AE11
+signal IO_AE12
+signal IO_AE13
+signal IO_AE14
+signal IO_AE15
+signal IO_AE16
+signal IO_AE17
+signal IO_AE18
+signal IO_AE19
+signal IO_AE20
+signal IO_AE21
+signal IO_AE22
+signal IO_AE23
+signal IO_AE26
+signal IO_AE28
+signal IO_AE29
+signal IO_AF1
+signal IO_AF2
+signal IO_AF4
+signal IO_AF6
+signal IO_AF9
+signal IO_AF11
+signal IO_AF12
+signal IO_AF13
+signal IO_AF15
+signal IO_AF16
+signal IO_AF18
+signal IO_AF19
+signal IO_AF20
+signal IO_AF22
+signal IO_AF23
+signal IO_AF25
+signal IO_AF27
+signal IO_AF29
+signal IO_AF30
+signal IO_AG1
+signal IO_AG2
+signal IO_AG3
+signal IO_AG4
+signal IO_AG5
+signal IO_AG7
+signal IO_AG9
+signal IO_AG11
+signal IO_AG12
+signal IO_AG13
+signal IO_AG15
+signal IO_AG16
+signal IO_AG18
+signal IO_AG19
+signal IO_AG20
+signal IO_AG22
+signal IO_AG23
+signal IO_AG26
+signal IO_AG27
+signal IO_AG28
+signal IO_AG29
+signal IO_AG30
+signal IO_AH1
+signal IO_AH2
+signal IO_AH4
+signal IO_AH6
+signal IO_AH7
+signal IO_AH10
+signal IO_AH11
+signal IO_AH12
+signal IO_AH14
+signal IO_AH15
+signal IO_AH16
+signal IO_AH17
+signal IO_AH19
+signal IO_AH20
+signal IO_AH21
+signal IO_AH23
+signal IO_AH27
+signal IO_AH29
+signal IO_AH30
+signal IO_AJ4
+signal IO_AJ5
+signal IO_AJ6
+signal IO_AJ8
+signal IO_AJ9
+signal IO_AJ10
+signal IO_AJ11
+signal IO_AJ12
+signal IO_AJ13
+signal IO_AJ14
+signal IO_AJ15
+signal IO_AJ16
+signal IO_AJ17
+signal IO_AJ18
+signal IO_AJ19
+signal IO_AJ20
+signal IO_AJ21
+signal IO_AJ22
+signal IO_AJ23
+signal IO_AJ26
+signal IO_AJ27
+signal IO_AK4
+signal IO_AK5
+signal IO_AK8
+signal IO_AK9
+signal IO_AK11
+signal IO_AK12
+signal IO_AK13
+signal IO_AK15
+signal IO_AK16
+signal IO_AK18
+signal IO_AK19
+signal IO_AK20
+signal IO_AK22
+signal IO_AK23
+signal IO_AK26
+signal IO_AK27
+
+register BSR 1931
+register BR 1
+register DIR 32
+
+instruction length 6
+
+instruction EXTEST 000000 BSR
+instruction SAMPLE/PRELOAD 000001 BSR
+instruction IDCODE 001001 DIR
+instruction BYPASS 111111 BR
+
+bit 1930 I 1 IO_C29
+bit 1929 O 1 IO_C29 1928 1 Z
+bit 1928 C 1 *
+bit 1927 I 1 IO_C30
+bit 1926 O 1 IO_C30 1925 1 Z
+bit 1925 C 1 *
+bit 1924 I 1 IO_D27
+bit 1923 O 1 IO_D27 1922 1 Z
+bit 1922 C 1 *
+bit 1921 I 1 IO_D28
+bit 1920 O 1 IO_D28 1919 1 Z
+bit 1919 C 1 *
+bit 1918 I 1 IO_D29
+bit 1917 O 1 IO_D29 1916 1 Z
+bit 1916 C 1 *
+bit 1915 I 1 IO_D30
+bit 1914 O 1 IO_D30 1913 1 Z
+bit 1913 C 1 *
+bit 1912 I 1 IO_E29
+bit 1911 O 1 IO_E29 1910 1 Z
+bit 1910 C 1 *
+bit 1909 I 1 IO_E30
+bit 1908 O 1 IO_E30 1907 1 Z
+bit 1907 C 1 *
+bit 1906 I 1 IO_F28
+bit 1905 O 1 IO_F28 1904 1 Z
+bit 1904 C 1 *
+bit 1903 I 1 IO_F29
+bit 1902 O 1 IO_F29 1901 1 Z
+bit 1901 C 1 *
+bit 1900 I 1 IO_G27
+bit 1899 O 1 IO_G27 1898 1 Z
+bit 1898 C 1 *
+bit 1897 I 1 IO_G28
+bit 1896 O 1 IO_G28 1895 1 Z
+bit 1895 C 1 *
+bit 1894 I 1 IO_G29
+bit 1893 O 1 IO_G29 1892 1 Z
+bit 1892 C 1 *
+bit 1891 I 1 IO_G30
+bit 1890 O 1 IO_G30 1889 1 Z
+bit 1889 C 1 *
+bit 1888 I 1 IO_G25
+bit 1887 O 1 IO_G25 1886 1 Z
+bit 1886 C 1 *
+bit 1885 I 1 IO_H24
+bit 1884 O 1 IO_H24 1883 1 Z
+bit 1883 C 1 *
+bit 1882 I 1 IO_H25
+bit 1881 O 1 IO_H25 1880 1 Z
+bit 1880 C 1 *
+bit 1879 I 1 IO_H26
+bit 1878 O 1 IO_H26 1877 1 Z
+bit 1877 C 1 *
+bit 1876 I 1 IO_H27
+bit 1875 O 1 IO_H27 1874 1 Z
+bit 1874 C 1 *
+bit 1873 I 1 IO_H28
+bit 1872 O 1 IO_H28 1871 1 Z
+bit 1871 C 1 *
+bit 1870 O 1 *
+bit 1869 O 1 *
+bit 1868 O 1 *
+bit 1867 I 1 IO_J25
+bit 1866 O 1 IO_J25 1865 1 Z
+bit 1865 C 1 *
+bit 1864 I 1 IO_H29
+bit 1863 O 1 IO_H29 1862 1 Z
+bit 1862 C 1 *
+bit 1861 I 1 IO_H30
+bit 1860 O 1 IO_H30 1859 1 Z
+bit 1859 C 1 *
+bit 1858 I 1 IO_J26
+bit 1857 O 1 IO_J26 1856 1 Z
+bit 1856 C 1 *
+bit 1855 I 1 IO_J27
+bit 1854 O 1 IO_J27 1853 1 Z
+bit 1853 C 1 *
+bit 1852 I 1 IO_J29
+bit 1851 O 1 IO_J29 1850 1 Z
+bit 1850 C 1 *
+bit 1849 I 1 IO_J30
+bit 1848 O 1 IO_J30 1847 1 Z
+bit 1847 C 1 *
+bit 1846 I 1 IO_J23
+bit 1845 O 1 IO_J23 1844 1 Z
+bit 1844 C 1 *
+bit 1843 I 1 IO_K22
+bit 1842 O 1 IO_K22 1841 1 Z
+bit 1841 C 1 *
+bit 1840 I 1 IO_K24
+bit 1839 O 1 IO_K24 1838 1 Z
+bit 1838 C 1 *
+bit 1837 I 1 IO_K25
+bit 1836 O 1 IO_K25 1835 1 Z
+bit 1835 C 1 *
+bit 1834 O 1 *
+bit 1833 O 1 *
+bit 1832 O 1 *
+bit 1831 O 1 *
+bit 1830 O 1 *
+bit 1829 O 1 *
+bit 1828 O 1 *
+bit 1827 O 1 *
+bit 1826 O 1 *
+bit 1825 O 1 *
+bit 1824 O 1 *
+bit 1823 O 1 *
+bit 1822 I 1 IO_L25
+bit 1821 O 1 IO_L25 1820 1 Z
+bit 1820 C 1 *
+bit 1819 I 1 IO_L26
+bit 1818 O 1 IO_L26 1817 1 Z
+bit 1817 C 1 *
+bit 1816 I 1 IO_L27
+bit 1815 O 1 IO_L27 1814 1 Z
+bit 1814 C 1 *
+bit 1813 I 1 IO_L28
+bit 1812 O 1 IO_L28 1811 1 Z
+bit 1811 C 1 *
+bit 1810 I 1 IO_L29
+bit 1809 O 1 IO_L29 1808 1 Z
+bit 1808 C 1 *
+bit 1807 I 1 IO_L30
+bit 1806 O 1 IO_L30 1805 1 Z
+bit 1805 C 1 *
+bit 1804 I 1 IO_M22
+bit 1803 O 1 IO_M22 1802 1 Z
+bit 1802 C 1 *
+bit 1801 I 1 IO_M23
+bit 1800 O 1 IO_M23 1799 1 Z
+bit 1799 C 1 *
+bit 1798 I 1 IO_M24
+bit 1797 O 1 IO_M24 1796 1 Z
+bit 1796 C 1 *
+bit 1795 I 1 IO_M25
+bit 1794 O 1 IO_M25 1793 1 Z
+bit 1793 C 1 *
+bit 1792 I 1 IO_M27
+bit 1791 O 1 IO_M27 1790 1 Z
+bit 1790 C 1 *
+bit 1789 I 1 IO_M28
+bit 1788 O 1 IO_M28 1787 1 Z
+bit 1787 C 1 *
+bit 1786 O 1 *
+bit 1785 O 1 *
+bit 1784 O 1 *
+bit 1783 O 1 *
+bit 1782 O 1 *
+bit 1781 O 1 *
+bit 1780 I 1 IO_M21
+bit 1779 O 1 IO_M21 1778 1 Z
+bit 1778 C 1 *
+bit 1777 I 1 IO_N21
+bit 1776 O 1 IO_N21 1775 1 Z
+bit 1775 C 1 *
+bit 1774 I 1 IO_N22
+bit 1773 O 1 IO_N22 1772 1 Z
+bit 1772 C 1 *
+bit 1771 I 1 IO_N23
+bit 1770 O 1 IO_N23 1769 1 Z
+bit 1769 C 1 *
+bit 1768 I 1 IO_M26
+bit 1767 O 1 IO_M26 1766 1 Z
+bit 1766 C 1 *
+bit 1765 I 1 IO_N25
+bit 1764 O 1 IO_N25 1763 1 Z
+bit 1763 C 1 *
+bit 1762 I 1 IO_N26
+bit 1761 O 1 IO_N26 1760 1 Z
+bit 1760 C 1 *
+bit 1759 I 1 IO_N27
+bit 1758 O 1 IO_N27 1757 1 Z
+bit 1757 C 1 *
+bit 1756 O 1 *
+bit 1755 O 1 *
+bit 1754 O 1 *
+bit 1753 O 1 *
+bit 1752 O 1 *
+bit 1751 O 1 *
+bit 1750 I 1 IO_N29
+bit 1749 O 1 IO_N29 1748 1 Z
+bit 1748 C 1 *
+bit 1747 I 1 IO_N30
+bit 1746 O 1 IO_N30 1745 1 Z
+bit 1745 C 1 *
+bit 1744 I 1 IO_P21
+bit 1743 O 1 IO_P21 1742 1 Z
+bit 1742 C 1 *
+bit 1741 I 1 IO_P22
+bit 1740 O 1 IO_P22 1739 1 Z
+bit 1739 C 1 *
+bit 1738 I 1 IO_P24
+bit 1737 O 1 IO_P24 1736 1 Z
+bit 1736 C 1 *
+bit 1735 I 1 IO_P25
+bit 1734 O 1 IO_P25 1733 1 Z
+bit 1733 C 1 *
+bit 1732 I 1 IO_P28
+bit 1731 O 1 IO_P28 1730 1 Z
+bit 1730 C 1 *
+bit 1729 I 1 IO_P29
+bit 1728 O 1 IO_P29 1727 1 Z
+bit 1727 C 1 *
+bit 1726 I 1 IO_R21
+bit 1725 O 1 IO_R21 1724 1 Z
+bit 1724 C 1 *
+bit 1723 I 1 IO_R22
+bit 1722 O 1 IO_R22 1721 1 Z
+bit 1721 C 1 *
+bit 1720 O 1 *
+bit 1719 O 1 *
+bit 1718 O 1 *
+bit 1717 O 1 *
+bit 1716 O 1 *
+bit 1715 O 1 *
+bit 1714 I 1 IO_R23
+bit 1713 O 1 IO_R23 1712 1 Z
+bit 1712 C 1 *
+bit 1711 I 1 IO_R24
+bit 1710 O 1 IO_R24 1709 1 Z
+bit 1709 C 1 *
+bit 1708 I 1 IO_R25
+bit 1707 O 1 IO_R25 1706 1 Z
+bit 1706 C 1 *
+bit 1705 I 1 IO_R26
+bit 1704 O 1 IO_R26 1703 1 Z
+bit 1703 C 1 *
+bit 1702 I 1 IO_R27
+bit 1701 O 1 IO_R27 1700 1 Z
+bit 1700 C 1 *
+bit 1699 I 1 IO_R28
+bit 1698 O 1 IO_R28 1697 1 Z
+bit 1697 C 1 *
+bit 1696 I 1 IO_R29
+bit 1695 O 1 IO_R29 1694 1 Z
+bit 1694 C 1 *
+bit 1693 I 1 IO_R30
+bit 1692 O 1 IO_R30 1691 1 Z
+bit 1691 C 1 *
+bit 1690 I 1 IO_T30
+bit 1689 O 1 IO_T30 1688 1 Z
+bit 1688 C 1 *
+bit 1687 I 1 IO_T29
+bit 1686 O 1 IO_T29 1685 1 Z
+bit 1685 C 1 *
+bit 1684 I 1 IO_T28
+bit 1683 O 1 IO_T28 1682 1 Z
+bit 1682 C 1 *
+bit 1681 I 1 IO_T27
+bit 1680 O 1 IO_T27 1679 1 Z
+bit 1679 C 1 *
+bit 1678 I 1 IO_T26
+bit 1677 O 1 IO_T26 1676 1 Z
+bit 1676 C 1 *
+bit 1675 I 1 IO_T25
+bit 1674 O 1 IO_T25 1673 1 Z
+bit 1673 C 1 *
+bit 1672 I 1 IO_T24
+bit 1671 O 1 IO_T24 1670 1 Z
+bit 1670 C 1 *
+bit 1669 I 1 IO_T23
+bit 1668 O 1 IO_T23 1667 1 Z
+bit 1667 C 1 *
+bit 1666 O 1 *
+bit 1665 O 1 *
+bit 1664 O 1 *
+bit 1663 O 1 *
+bit 1662 O 1 *
+bit 1661 O 1 *
+bit 1660 I 1 IO_T22
+bit 1659 O 1 IO_T22 1658 1 Z
+bit 1658 C 1 *
+bit 1657 I 1 IO_T21
+bit 1656 O 1 IO_T21 1655 1 Z
+bit 1655 C 1 *
+bit 1654 I 1 IO_U29
+bit 1653 O 1 IO_U29 1652 1 Z
+bit 1652 C 1 *
+bit 1651 I 1 IO_U28
+bit 1650 O 1 IO_U28 1649 1 Z
+bit 1649 C 1 *
+bit 1648 I 1 IO_U25
+bit 1647 O 1 IO_U25 1646 1 Z
+bit 1646 C 1 *
+bit 1645 I 1 IO_U24
+bit 1644 O 1 IO_U24 1643 1 Z
+bit 1643 C 1 *
+bit 1642 I 1 IO_U22
+bit 1641 O 1 IO_U22 1640 1 Z
+bit 1640 C 1 *
+bit 1639 I 1 IO_U21
+bit 1638 O 1 IO_U21 1637 1 Z
+bit 1637 C 1 *
+bit 1636 I 1 IO_V30
+bit 1635 O 1 IO_V30 1634 1 Z
+bit 1634 C 1 *
+bit 1633 I 1 IO_V29
+bit 1632 O 1 IO_V29 1631 1 Z
+bit 1631 C 1 *
+bit 1630 O 1 *
+bit 1629 O 1 *
+bit 1628 O 1 *
+bit 1627 O 1 *
+bit 1626 O 1 *
+bit 1625 O 1 *
+bit 1624 I 1 IO_V25
+bit 1623 O 1 IO_V25 1622 1 Z
+bit 1622 C 1 *
+bit 1621 I 1 IO_W26
+bit 1620 O 1 IO_W26 1619 1 Z
+bit 1619 C 1 *
+bit 1618 I 1 IO_V23
+bit 1617 O 1 IO_V23 1616 1 Z
+bit 1616 C 1 *
+bit 1615 I 1 IO_V22
+bit 1614 O 1 IO_V22 1613 1 Z
+bit 1613 C 1 *
+bit 1612 I 1 IO_V21
+bit 1611 O 1 IO_V21 1610 1 Z
+bit 1610 C 1 *
+bit 1609 I 1 IO_W21
+bit 1608 O 1 IO_W21 1607 1 Z
+bit 1607 C 1 *
+bit 1606 I 1 IO_W30
+bit 1605 O 1 IO_W30 1604 1 Z
+bit 1604 C 1 *
+bit 1603 I 1 IO_W29
+bit 1602 O 1 IO_W29 1601 1 Z
+bit 1601 C 1 *
+bit 1600 O 1 *
+bit 1599 O 1 *
+bit 1598 O 1 *
+bit 1597 O 1 *
+bit 1596 O 1 *
+bit 1595 O 1 *
+bit 1594 I 1 IO_Y30
+bit 1593 O 1 IO_Y30 1592 1 Z
+bit 1592 C 1 *
+bit 1591 I 1 IO_Y29
+bit 1590 O 1 IO_Y29 1589 1 Z
+bit 1589 C 1 *
+bit 1588 I 1 IO_Y28
+bit 1587 O 1 IO_Y28 1586 1 Z
+bit 1586 C 1 *
+bit 1585 I 1 IO_Y27
+bit 1584 O 1 IO_Y27 1583 1 Z
+bit 1583 C 1 *
+bit 1582 I 1 IO_Y26
+bit 1581 O 1 IO_Y26 1580 1 Z
+bit 1580 C 1 *
+bit 1579 I 1 IO_Y25
+bit 1578 O 1 IO_Y25 1577 1 Z
+bit 1577 C 1 *
+bit 1576 I 1 IO_Y24
+bit 1575 O 1 IO_Y24 1574 1 Z
+bit 1574 C 1 *
+bit 1573 I 1 IO_Y23
+bit 1572 O 1 IO_Y23 1571 1 Z
+bit 1571 C 1 *
+bit 1570 I 1 IO_Y21
+bit 1569 O 1 IO_Y21 1568 1 Z
+bit 1568 C 1 *
+bit 1567 I 1 IO_AA21
+bit 1566 O 1 IO_AA21 1565 1 Z
+bit 1565 C 1 *
+bit 1564 I 1 IO_AA29
+bit 1563 O 1 IO_AA29 1562 1 Z
+bit 1562 C 1 *
+bit 1561 I 1 IO_AA28
+bit 1560 O 1 IO_AA28 1559 1 Z
+bit 1559 C 1 *
+bit 1558 O 1 *
+bit 1557 O 1 *
+bit 1556 O 1 *
+bit 1555 O 1 *
+bit 1554 O 1 *
+bit 1553 O 1 *
+bit 1552 I 1 IO_AA25
+bit 1551 O 1 IO_AA25 1550 1 Z
+bit 1550 C 1 *
+bit 1549 I 1 IO_AA24
+bit 1548 O 1 IO_AA24 1547 1 Z
+bit 1547 C 1 *
+bit 1546 I 1 IO_AA22
+bit 1545 O 1 IO_AA22 1544 1 Z
+bit 1544 C 1 *
+bit 1543 I 1 IO_AB23
+bit 1542 O 1 IO_AB23 1541 1 Z
+bit 1541 C 1 *
+bit 1540 I 1 IO_AB30
+bit 1539 O 1 IO_AB30 1538 1 Z
+bit 1538 C 1 *
+bit 1537 I 1 IO_AB29
+bit 1536 O 1 IO_AB29 1535 1 Z
+bit 1535 C 1 *
+bit 1534 I 1 IO_AB27
+bit 1533 O 1 IO_AB27 1532 1 Z
+bit 1532 C 1 *
+bit 1531 I 1 IO_AB26
+bit 1530 O 1 IO_AB26 1529 1 Z
+bit 1529 C 1 *
+bit 1528 I 1 IO_AC30
+bit 1527 O 1 IO_AC30 1526 1 Z
+bit 1526 C 1 *
+bit 1525 I 1 IO_AC29
+bit 1524 O 1 IO_AC29 1523 1 Z
+bit 1523 C 1 *
+bit 1522 I 1 IO_AB25
+bit 1521 O 1 IO_AB25 1520 1 Z
+bit 1520 C 1 *
+bit 1519 O 1 *
+bit 1518 O 1 *
+bit 1517 O 1 *
+bit 1516 I 1 IO_AC28
+bit 1515 O 1 IO_AC28 1514 1 Z
+bit 1514 C 1 *
+bit 1513 I 1 IO_AC27
+bit 1512 O 1 IO_AC27 1511 1 Z
+bit 1511 C 1 *
+bit 1510 I 1 IO_AC26
+bit 1509 O 1 IO_AC26 1508 1 Z
+bit 1508 C 1 *
+bit 1507 I 1 IO_AC25
+bit 1506 O 1 IO_AC25 1505 1 Z
+bit 1505 C 1 *
+bit 1504 I 1 IO_AC24
+bit 1503 O 1 IO_AC24 1502 1 Z
+bit 1502 C 1 *
+bit 1501 I 1 IO_AD25
+bit 1500 O 1 IO_AD25 1499 1 Z
+bit 1499 C 1 *
+bit 1498 I 1 IO_AD30
+bit 1497 O 1 IO_AD30 1496 1 Z
+bit 1496 C 1 *
+bit 1495 I 1 IO_AD29
+bit 1494 O 1 IO_AD29 1493 1 Z
+bit 1493 C 1 *
+bit 1492 I 1 IO_AD28
+bit 1491 O 1 IO_AD28 1490 1 Z
+bit 1490 C 1 *
+bit 1489 I 1 IO_AD27
+bit 1488 O 1 IO_AD27 1487 1 Z
+bit 1487 C 1 *
+bit 1486 I 1 IO_AE29
+bit 1485 O 1 IO_AE29 1484 1 Z
+bit 1484 C 1 *
+bit 1483 I 1 IO_AE28
+bit 1482 O 1 IO_AE28 1481 1 Z
+bit 1481 C 1 *
+bit 1480 I 1 IO_AE26
+bit 1479 O 1 IO_AE26 1478 1 Z
+bit 1478 C 1 *
+bit 1477 I 1 IO_AF27
+bit 1476 O 1 IO_AF27 1475 1 Z
+bit 1475 C 1 *
+bit 1474 I 1 IO_AF30
+bit 1473 O 1 IO_AF30 1472 1 Z
+bit 1472 C 1 *
+bit 1471 I 1 IO_AF29
+bit 1470 O 1 IO_AF29 1469 1 Z
+bit 1469 C 1 *
+bit 1468 I 1 IO_AG30
+bit 1467 O 1 IO_AG30 1466 1 Z
+bit 1466 C 1 *
+bit 1465 I 1 IO_AG29
+bit 1464 O 1 IO_AG29 1463 1 Z
+bit 1463 C 1 *
+bit 1462 I 1 IO_AG28
+bit 1461 O 1 IO_AG28 1460 1 Z
+bit 1460 C 1 *
+bit 1459 I 1 IO_AG27
+bit 1458 O 1 IO_AG27 1457 1 Z
+bit 1457 C 1 *
+bit 1456 I 1 IO_AH30
+bit 1455 O 1 IO_AH30 1454 1 Z
+bit 1454 C 1 *
+bit 1453 I 1 IO_AH29
+bit 1452 O 1 IO_AH29 1451 1 Z
+bit 1451 C 1 *
+bit 1450 I 1 CCLK_AH28
+bit 1449 O 1 CCLK_AH28 1448 1 Z
+bit 1448 C 1 *
+bit 1447 I 1 DONE_AJ28
+bit 1446 O 1 DONE_AJ28 1445 1 Z
+bit 1445 C 1 *
+bit 1444 I 1 IO_AK28
+bit 1443 O 1 IO_AK28 1442 1 Z
+bit 1442 C 1 *
+bit 1441 I 1 IO_AJ27
+bit 1440 O 1 IO_AJ27 1439 1 Z
+bit 1439 C 1 *
+bit 1438 I 1 IO_AK27
+bit 1437 O 1 IO_AK27 1436 1 Z
+bit 1436 C 1 *
+bit 1435 I 1 IO_AJ26
+bit 1434 O 1 IO_AJ26 1433 1 Z
+bit 1433 C 1 *
+bit 1432 I 1 IO_AK26
+bit 1431 O 1 IO_AK26 1430 1 Z
+bit 1430 C 1 *
+bit 1429 I 1 IO_AH27
+bit 1428 O 1 IO_AH27 1427 1 Z
+bit 1427 C 1 *
+bit 1426 I 1 IO_AG26
+bit 1425 O 1 IO_AG26 1424 1 Z
+bit 1424 C 1 *
+bit 1423 I 1 IO_AF25
+bit 1422 O 1 IO_AF25 1421 1 Z
+bit 1421 C 1 *
+bit 1420 I 1 IO_AD24
+bit 1419 O 1 IO_AD24 1418 1 Z
+bit 1418 C 1 *
+bit 1417 I 1 IO_AC23
+bit 1416 O 1 IO_AC23 1415 1 Z
+bit 1415 C 1 *
+bit 1414 I 1 IO_AD23
+bit 1413 O 1 IO_AD23 1412 1 Z
+bit 1412 C 1 *
+bit 1411 I 1 IO_AE23
+bit 1410 O 1 IO_AE23 1409 1 Z
+bit 1409 C 1 *
+bit 1408 I 1 IO_AF23
+bit 1407 O 1 IO_AF23 1406 1 Z
+bit 1406 C 1 *
+bit 1405 I 1 IO_AG23
+bit 1404 O 1 IO_AG23 1403 1 Z
+bit 1403 C 1 *
+bit 1402 I 1 IO_AH23
+bit 1401 O 1 IO_AH23 1400 1 Z
+bit 1400 C 1 *
+bit 1399 O 1 *
+bit 1398 O 1 *
+bit 1397 O 1 *
+bit 1396 I 1 IO_AJ23
+bit 1395 O 1 IO_AJ23 1394 1 Z
+bit 1394 C 1 *
+bit 1393 I 1 IO_AK23
+bit 1392 O 1 IO_AK23 1391 1 Z
+bit 1391 C 1 *
+bit 1390 I 1 IO_AB22
+bit 1389 O 1 IO_AB22 1388 1 Z
+bit 1388 C 1 *
+bit 1387 I 1 IO_AC22
+bit 1386 O 1 IO_AC22 1385 1 Z
+bit 1385 C 1 *
+bit 1384 I 1 IO_AE22
+bit 1383 O 1 IO_AE22 1382 1 Z
+bit 1382 C 1 *
+bit 1381 I 1 IO_AF22
+bit 1380 O 1 IO_AF22 1379 1 Z
+bit 1379 C 1 *
+bit 1378 I 1 IO_AG22
+bit 1377 O 1 IO_AG22 1376 1 Z
+bit 1376 C 1 *
+bit 1375 I 1 IO_AJ22
+bit 1374 O 1 IO_AJ22 1373 1 Z
+bit 1373 C 1 *
+bit 1372 I 1 IO_AK22
+bit 1371 O 1 IO_AK22 1370 1 Z
+bit 1370 C 1 *
+bit 1369 O 1 *
+bit 1368 O 1 *
+bit 1367 O 1 *
+bit 1366 I 1 IO_AD21
+bit 1365 O 1 IO_AD21 1364 1 Z
+bit 1364 C 1 *
+bit 1363 I 1 IO_AE21
+bit 1362 O 1 IO_AE21 1361 1 Z
+bit 1361 C 1 *
+bit 1360 I 1 IO_AH21
+bit 1359 O 1 IO_AH21 1358 1 Z
+bit 1358 C 1 *
+bit 1357 I 1 IO_AJ21
+bit 1356 O 1 IO_AJ21 1355 1 Z
+bit 1355 C 1 *
+bit 1354 O 1 *
+bit 1353 O 1 *
+bit 1352 O 1 *
+bit 1351 I 1 IO_AB21
+bit 1350 O 1 IO_AB21 1349 1 Z
+bit 1349 C 1 *
+bit 1348 I 1 IO_AA20
+bit 1347 O 1 IO_AA20 1346 1 Z
+bit 1346 C 1 *
+bit 1345 I 1 IO_AC20
+bit 1344 O 1 IO_AC20 1343 1 Z
+bit 1343 C 1 *
+bit 1342 I 1 IO_AD20
+bit 1341 O 1 IO_AD20 1340 1 Z
+bit 1340 C 1 *
+bit 1339 O 1 *
+bit 1338 O 1 *
+bit 1337 O 1 *
+bit 1336 I 1 IO_AE20
+bit 1335 O 1 IO_AE20 1334 1 Z
+bit 1334 C 1 *
+bit 1333 I 1 IO_AF20
+bit 1332 O 1 IO_AF20 1331 1 Z
+bit 1331 C 1 *
+bit 1330 I 1 IO_AG20
+bit 1329 O 1 IO_AG20 1328 1 Z
+bit 1328 C 1 *
+bit 1327 I 1 IO_AH20
+bit 1326 O 1 IO_AH20 1325 1 Z
+bit 1325 C 1 *
+bit 1324 O 1 *
+bit 1323 O 1 *
+bit 1322 O 1 *
+bit 1321 I 1 IO_AJ20
+bit 1320 O 1 IO_AJ20 1319 1 Z
+bit 1319 C 1 *
+bit 1318 I 1 IO_AK20
+bit 1317 O 1 IO_AK20 1316 1 Z
+bit 1316 C 1 *
+bit 1315 I 1 IO_AA19
+bit 1314 O 1 IO_AA19 1313 1 Z
+bit 1313 C 1 *
+bit 1312 I 1 IO_AB19
+bit 1311 O 1 IO_AB19 1310 1 Z
+bit 1310 C 1 *
+bit 1309 O 1 *
+bit 1308 O 1 *
+bit 1307 O 1 *
+bit 1306 I 1 IO_AC19
+bit 1305 O 1 IO_AC19 1304 1 Z
+bit 1304 C 1 *
+bit 1303 I 1 IO_AD19
+bit 1302 O 1 IO_AD19 1301 1 Z
+bit 1301 C 1 *
+bit 1300 I 1 IO_AE19
+bit 1299 O 1 IO_AE19 1298 1 Z
+bit 1298 C 1 *
+bit 1297 I 1 IO_AF19
+bit 1296 O 1 IO_AF19 1295 1 Z
+bit 1295 C 1 *
+bit 1294 O 1 *
+bit 1293 O 1 *
+bit 1292 O 1 *
+bit 1291 I 1 IO_AG19
+bit 1290 O 1 IO_AG19 1289 1 Z
+bit 1289 C 1 *
+bit 1288 I 1 IO_AH19
+bit 1287 O 1 IO_AH19 1286 1 Z
+bit 1286 C 1 *
+bit 1285 I 1 IO_AJ19
+bit 1284 O 1 IO_AJ19 1283 1 Z
+bit 1283 C 1 *
+bit 1282 I 1 IO_AK19
+bit 1281 O 1 IO_AK19 1280 1 Z
+bit 1280 C 1 *
+bit 1279 I 1 IO_AA18
+bit 1278 O 1 IO_AA18 1277 1 Z
+bit 1277 C 1 *
+bit 1276 I 1 IO_AB18
+bit 1275 O 1 IO_AB18 1274 1 Z
+bit 1274 C 1 *
+bit 1273 I 1 IO_AC18
+bit 1272 O 1 IO_AC18 1271 1 Z
+bit 1271 C 1 *
+bit 1270 I 1 IO_AE18
+bit 1269 O 1 IO_AE18 1268 1 Z
+bit 1268 C 1 *
+bit 1267 I 1 IO_AF18
+bit 1266 O 1 IO_AF18 1265 1 Z
+bit 1265 C 1 *
+bit 1264 I 1 IO_AG18
+bit 1263 O 1 IO_AG18 1262 1 Z
+bit 1262 C 1 *
+bit 1261 I 1 IO_AJ18
+bit 1260 O 1 IO_AJ18 1259 1 Z
+bit 1259 C 1 *
+bit 1258 I 1 IO_AK18
+bit 1257 O 1 IO_AK18 1256 1 Z
+bit 1256 C 1 *
+bit 1255 I 1 IO_AA17
+bit 1254 O 1 IO_AA17 1253 1 Z
+bit 1253 C 1 *
+bit 1252 I 1 IO_AB17
+bit 1251 O 1 IO_AB17 1250 1 Z
+bit 1250 C 1 *
+bit 1249 I 1 IO_AA16
+bit 1248 O 1 IO_AA16 1247 1 Z
+bit 1247 C 1 *
+bit 1246 I 1 IO_AD17
+bit 1245 O 1 IO_AD17 1244 1 Z
+bit 1244 C 1 *
+bit 1243 I 1 IO_AE17
+bit 1242 O 1 IO_AE17 1241 1 Z
+bit 1241 C 1 *
+bit 1240 I 1 IO_AH17
+bit 1239 O 1 IO_AH17 1238 1 Z
+bit 1238 C 1 *
+bit 1237 I 1 IO_AJ17
+bit 1236 O 1 IO_AJ17 1235 1 Z
+bit 1235 C 1 *
+bit 1234 O 1 *
+bit 1233 O 1 *
+bit 1232 O 1 *
+bit 1231 I 1 IO_AB16
+bit 1230 O 1 IO_AB16 1229 1 Z
+bit 1229 C 1 *
+bit 1228 I 1 IO_AC16
+bit 1227 O 1 IO_AC16 1226 1 Z
+bit 1226 C 1 *
+bit 1225 I 1 IO_AD16
+bit 1224 O 1 IO_AD16 1223 1 Z
+bit 1223 C 1 *
+bit 1222 I 1 IO_AE16
+bit 1221 O 1 IO_AE16 1220 1 Z
+bit 1220 C 1 *
+bit 1219 I 1 IO_AF16
+bit 1218 O 1 IO_AF16 1217 1 Z
+bit 1217 C 1 *
+bit 1216 I 1 IO_AG16
+bit 1215 O 1 IO_AG16 1214 1 Z
+bit 1214 C 1 *
+bit 1213 I 1 IO_AH16
+bit 1212 O 1 IO_AH16 1211 1 Z
+bit 1211 C 1 *
+bit 1210 I 1 IO_AJ16
+bit 1209 O 1 IO_AJ16 1208 1 Z
+bit 1208 C 1 *
+bit 1207 I 1 IO_AK16
+bit 1206 O 1 IO_AK16 1205 1 Z
+bit 1205 C 1 *
+bit 1204 I 1 IO_AK15
+bit 1203 O 1 IO_AK15 1202 1 Z
+bit 1202 C 1 *
+bit 1201 I 1 IO_AJ15
+bit 1200 O 1 IO_AJ15 1199 1 Z
+bit 1199 C 1 *
+bit 1198 I 1 IO_AH15
+bit 1197 O 1 IO_AH15 1196 1 Z
+bit 1196 C 1 *
+bit 1195 I 1 IO_AG15
+bit 1194 O 1 IO_AG15 1193 1 Z
+bit 1193 C 1 *
+bit 1192 I 1 IO_AF15
+bit 1191 O 1 IO_AF15 1190 1 Z
+bit 1190 C 1 *
+bit 1189 I 1 IO_AE15
+bit 1188 O 1 IO_AE15 1187 1 Z
+bit 1187 C 1 *
+bit 1186 I 1 IO_AD15
+bit 1185 O 1 IO_AD15 1184 1 Z
+bit 1184 C 1 *
+bit 1183 I 1 IO_AD14
+bit 1182 O 1 IO_AD14 1181 1 Z
+bit 1181 C 1 *
+bit 1180 I 1 IO_AC15
+bit 1179 O 1 IO_AC15 1178 1 Z
+bit 1178 C 1 *
+bit 1177 I 1 IO_AB15
+bit 1176 O 1 IO_AB15 1175 1 Z
+bit 1175 C 1 *
+bit 1174 I 1 IO_AA15
+bit 1173 O 1 IO_AA15 1172 1 Z
+bit 1172 C 1 *
+bit 1171 I 1 IO_AJ14
+bit 1170 O 1 IO_AJ14 1169 1 Z
+bit 1169 C 1 *
+bit 1168 I 1 IO_AH14
+bit 1167 O 1 IO_AH14 1166 1 Z
+bit 1166 C 1 *
+bit 1165 I 1 IO_AE14
+bit 1164 O 1 IO_AE14 1163 1 Z
+bit 1163 C 1 *
+bit 1162 I 1 IO_AE13
+bit 1161 O 1 IO_AE13 1160 1 Z
+bit 1160 C 1 *
+bit 1159 O 1 *
+bit 1158 O 1 *
+bit 1157 O 1 *
+bit 1156 I 1 IO_AB14
+bit 1155 O 1 IO_AB14 1154 1 Z
+bit 1154 C 1 *
+bit 1153 I 1 IO_AA14
+bit 1152 O 1 IO_AA14 1151 1 Z
+bit 1151 C 1 *
+bit 1150 I 1 IO_AK13
+bit 1149 O 1 IO_AK13 1148 1 Z
+bit 1148 C 1 *
+bit 1147 I 1 IO_AJ13
+bit 1146 O 1 IO_AJ13 1145 1 Z
+bit 1145 C 1 *
+bit 1144 O 1 *
+bit 1143 O 1 *
+bit 1142 O 1 *
+bit 1141 I 1 IO_AG13
+bit 1140 O 1 IO_AG13 1139 1 Z
+bit 1139 C 1 *
+bit 1138 I 1 IO_AF13
+bit 1137 O 1 IO_AF13 1136 1 Z
+bit 1136 C 1 *
+bit 1135 I 1 IO_AC13
+bit 1134 O 1 IO_AC13 1133 1 Z
+bit 1133 C 1 *
+bit 1132 I 1 IO_AB13
+bit 1131 O 1 IO_AB13 1130 1 Z
+bit 1130 C 1 *
+bit 1129 O 1 *
+bit 1128 O 1 *
+bit 1127 O 1 *
+bit 1126 I 1 IO_AA13
+bit 1125 O 1 IO_AA13 1124 1 Z
+bit 1124 C 1 *
+bit 1123 I 1 IO_AA12
+bit 1122 O 1 IO_AA12 1121 1 Z
+bit 1121 C 1 *
+bit 1120 I 1 IO_AK12
+bit 1119 O 1 IO_AK12 1118 1 Z
+bit 1118 C 1 *
+bit 1117 I 1 IO_AJ12
+bit 1116 O 1 IO_AJ12 1115 1 Z
+bit 1115 C 1 *
+bit 1114 O 1 *
+bit 1113 O 1 *
+bit 1112 O 1 *
+bit 1111 I 1 IO_AH12
+bit 1110 O 1 IO_AH12 1109 1 Z
+bit 1109 C 1 *
+bit 1108 I 1 IO_AG12
+bit 1107 O 1 IO_AG12 1106 1 Z
+bit 1106 C 1 *
+bit 1105 I 1 IO_AF12
+bit 1104 O 1 IO_AF12 1103 1 Z
+bit 1103 C 1 *
+bit 1102 I 1 IO_AE12
+bit 1101 O 1 IO_AE12 1100 1 Z
+bit 1100 C 1 *
+bit 1099 O 1 *
+bit 1098 O 1 *
+bit 1097 O 1 *
+bit 1096 I 1 IO_AD12
+bit 1095 O 1 IO_AD12 1094 1 Z
+bit 1094 C 1 *
+bit 1093 I 1 IO_AC12
+bit 1092 O 1 IO_AC12 1091 1 Z
+bit 1091 C 1 *
+bit 1090 I 1 IO_AB12
+bit 1089 O 1 IO_AB12 1088 1 Z
+bit 1088 C 1 *
+bit 1087 I 1 IO_AC11
+bit 1086 O 1 IO_AC11 1085 1 Z
+bit 1085 C 1 *
+bit 1084 O 1 *
+bit 1083 O 1 *
+bit 1082 O 1 *
+bit 1081 I 1 IO_AK11
+bit 1080 O 1 IO_AK11 1079 1 Z
+bit 1079 C 1 *
+bit 1078 I 1 IO_AJ11
+bit 1077 O 1 IO_AJ11 1076 1 Z
+bit 1076 C 1 *
+bit 1075 I 1 IO_AH11
+bit 1074 O 1 IO_AH11 1073 1 Z
+bit 1073 C 1 *
+bit 1072 I 1 IO_AG11
+bit 1071 O 1 IO_AG11 1070 1 Z
+bit 1070 C 1 *
+bit 1069 O 1 *
+bit 1068 O 1 *
+bit 1067 O 1 *
+bit 1066 I 1 IO_AF11
+bit 1065 O 1 IO_AF11 1064 1 Z
+bit 1064 C 1 *
+bit 1063 I 1 IO_AE11
+bit 1062 O 1 IO_AE11 1061 1 Z
+bit 1061 C 1 *
+bit 1060 I 1 IO_AD11
+bit 1059 O 1 IO_AD11 1058 1 Z
+bit 1058 C 1 *
+bit 1057 I 1 IO_AD10
+bit 1056 O 1 IO_AD10 1055 1 Z
+bit 1055 C 1 *
+bit 1054 I 1 IO_AA11
+bit 1053 O 1 IO_AA11 1052 1 Z
+bit 1052 C 1 *
+bit 1051 I 1 IO_AJ10
+bit 1050 O 1 IO_AJ10 1049 1 Z
+bit 1049 C 1 *
+bit 1048 I 1 IO_AH10
+bit 1047 O 1 IO_AH10 1046 1 Z
+bit 1046 C 1 *
+bit 1045 I 1 IO_AE10
+bit 1044 O 1 IO_AE10 1043 1 Z
+bit 1043 C 1 *
+bit 1042 I 1 IO_AE9
+bit 1041 O 1 IO_AE9 1040 1 Z
+bit 1040 C 1 *
+bit 1039 I 1 IO_AB10
+bit 1038 O 1 IO_AB10 1037 1 Z
+bit 1037 C 1 *
+bit 1036 I 1 IO_AK9
+bit 1035 O 1 IO_AK9 1034 1 Z
+bit 1034 C 1 *
+bit 1033 I 1 IO_AJ9
+bit 1032 O 1 IO_AJ9 1031 1 Z
+bit 1031 C 1 *
+bit 1030 I 1 IO_AG9
+bit 1029 O 1 IO_AG9 1028 1 Z
+bit 1028 C 1 *
+bit 1027 I 1 IO_AF9
+bit 1026 O 1 IO_AF9 1025 1 Z
+bit 1025 C 1 *
+bit 1024 O 1 *
+bit 1023 O 1 *
+bit 1022 O 1 *
+bit 1021 I 1 IO_AC9
+bit 1020 O 1 IO_AC9 1019 1 Z
+bit 1019 C 1 *
+bit 1018 I 1 IO_AB9
+bit 1017 O 1 IO_AB9 1016 1 Z
+bit 1016 C 1 *
+bit 1015 I 1 IO_AK8
+bit 1014 O 1 IO_AK8 1013 1 Z
+bit 1013 C 1 *
+bit 1012 I 1 IO_AJ8
+bit 1011 O 1 IO_AJ8 1010 1 Z
+bit 1010 C 1 *
+bit 1009 O 1 *
+bit 1008 O 1 *
+bit 1007 O 1 *
+bit 1006 I 1 IO_AH7
+bit 1005 O 1 IO_AH7 1004 1 Z
+bit 1004 C 1 *
+bit 1003 I 1 IO_AG7
+bit 1002 O 1 IO_AG7 1001 1 Z
+bit 1001 C 1 *
+bit 1000 I 1 IO_AE7
+bit 999 O 1 IO_AE7 998 1 Z
+bit 998 C 1 *
+bit 997 I 1 IO_AD7
+bit 996 O 1 IO_AD7 995 1 Z
+bit 995 C 1 *
+bit 994 I 1 IO_AE6
+bit 993 O 1 IO_AE6 992 1 Z
+bit 992 C 1 *
+bit 991 I 1 IO_AJ6
+bit 990 O 1 IO_AJ6 989 1 Z
+bit 989 C 1 *
+bit 988 I 1 IO_AH6
+bit 987 O 1 IO_AH6 986 1 Z
+bit 986 C 1 *
+bit 985 I 1 IO_AF6
+bit 984 O 1 IO_AF6 983 1 Z
+bit 983 C 1 *
+bit 982 I 1 IO_AG5
+bit 981 O 1 IO_AG5 980 1 Z
+bit 980 C 1 *
+bit 979 I 1 IO_AH4
+bit 978 O 1 IO_AH4 977 1 Z
+bit 977 C 1 *
+bit 976 I 1 IO_AK5
+bit 975 O 1 IO_AK5 974 1 Z
+bit 974 C 1 *
+bit 973 I 1 IO_AJ5
+bit 972 O 1 IO_AJ5 971 1 Z
+bit 971 C 1 *
+bit 970 I 1 IO_AK4
+bit 969 O 1 IO_AK4 968 1 Z
+bit 968 C 1 *
+bit 967 I 1 IO_AJ4
+bit 966 O 1 IO_AJ4 965 1 Z
+bit 965 C 1 *
+bit 964 I 1 M2_AK3
+bit 963 I 1 M0_AJ3
+bit 962 I 1 M1_AH3
+bit 961 I 1 IO_AH2
+bit 960 O 1 IO_AH2 959 1 Z
+bit 959 C 1 *
+bit 958 I 1 IO_AH1
+bit 957 O 1 IO_AH1 956 1 Z
+bit 956 C 1 *
+bit 955 I 1 IO_AG4
+bit 954 O 1 IO_AG4 953 1 Z
+bit 953 C 1 *
+bit 952 I 1 IO_AG3
+bit 951 O 1 IO_AG3 950 1 Z
+bit 950 C 1 *
+bit 949 I 1 IO_AG2
+bit 948 O 1 IO_AG2 947 1 Z
+bit 947 C 1 *
+bit 946 I 1 IO_AG1
+bit 945 O 1 IO_AG1 944 1 Z
+bit 944 C 1 *
+bit 943 I 1 IO_AF2
+bit 942 O 1 IO_AF2 941 1 Z
+bit 941 C 1 *
+bit 940 I 1 IO_AF1
+bit 939 O 1 IO_AF1 938 1 Z
+bit 938 C 1 *
+bit 937 I 1 IO_AF4
+bit 936 O 1 IO_AF4 935 1 Z
+bit 935 C 1 *
+bit 934 I 1 IO_AE5
+bit 933 O 1 IO_AE5 932 1 Z
+bit 932 C 1 *
+bit 931 I 1 IO_AE3
+bit 930 O 1 IO_AE3 929 1 Z
+bit 929 C 1 *
+bit 928 I 1 IO_AE2
+bit 927 O 1 IO_AE2 926 1 Z
+bit 926 C 1 *
+bit 925 I 1 IO_AD4
+bit 924 O 1 IO_AD4 923 1 Z
+bit 923 C 1 *
+bit 922 I 1 IO_AD3
+bit 921 O 1 IO_AD3 920 1 Z
+bit 920 C 1 *
+bit 919 I 1 IO_AD2
+bit 918 O 1 IO_AD2 917 1 Z
+bit 917 C 1 *
+bit 916 I 1 IO_AD1
+bit 915 O 1 IO_AD1 914 1 Z
+bit 914 C 1 *
+bit 913 I 1 IO_AD6
+bit 912 O 1 IO_AD6 911 1 Z
+bit 911 C 1 *
+bit 910 I 1 IO_AC7
+bit 909 O 1 IO_AC7 908 1 Z
+bit 908 C 1 *
+bit 907 I 1 IO_AC6
+bit 906 O 1 IO_AC6 905 1 Z
+bit 905 C 1 *
+bit 904 I 1 IO_AC5
+bit 903 O 1 IO_AC5 902 1 Z
+bit 902 C 1 *
+bit 901 I 1 IO_AC4
+bit 900 O 1 IO_AC4 899 1 Z
+bit 899 C 1 *
+bit 898 I 1 IO_AC3
+bit 897 O 1 IO_AC3 896 1 Z
+bit 896 C 1 *
+bit 895 O 1 *
+bit 894 O 1 *
+bit 893 O 1 *
+bit 892 I 1 IO_AB6
+bit 891 O 1 IO_AB6 890 1 Z
+bit 890 C 1 *
+bit 889 I 1 IO_AC2
+bit 888 O 1 IO_AC2 887 1 Z
+bit 887 C 1 *
+bit 886 I 1 IO_AC1
+bit 885 O 1 IO_AC1 884 1 Z
+bit 884 C 1 *
+bit 883 I 1 IO_AB5
+bit 882 O 1 IO_AB5 881 1 Z
+bit 881 C 1 *
+bit 880 I 1 IO_AB4
+bit 879 O 1 IO_AB4 878 1 Z
+bit 878 C 1 *
+bit 877 I 1 IO_AB2
+bit 876 O 1 IO_AB2 875 1 Z
+bit 875 C 1 *
+bit 874 I 1 IO_AB1
+bit 873 O 1 IO_AB1 872 1 Z
+bit 872 C 1 *
+bit 871 I 1 IO_AB8
+bit 870 O 1 IO_AB8 869 1 Z
+bit 869 C 1 *
+bit 868 I 1 IO_AA9
+bit 867 O 1 IO_AA9 866 1 Z
+bit 866 C 1 *
+bit 865 I 1 IO_AA7
+bit 864 O 1 IO_AA7 863 1 Z
+bit 863 C 1 *
+bit 862 I 1 IO_AA6
+bit 861 O 1 IO_AA6 860 1 Z
+bit 860 C 1 *
+bit 859 O 1 *
+bit 858 O 1 *
+bit 857 O 1 *
+bit 856 O 1 *
+bit 855 O 1 *
+bit 854 O 1 *
+bit 853 I 1 IO_AA3
+bit 852 O 1 IO_AA3 851 1 Z
+bit 851 C 1 *
+bit 850 I 1 IO_AA2
+bit 849 O 1 IO_AA2 848 1 Z
+bit 848 C 1 *
+bit 847 I 1 IO_AA10
+bit 846 O 1 IO_AA10 845 1 Z
+bit 845 C 1 *
+bit 844 I 1 IO_Y10
+bit 843 O 1 IO_Y10 842 1 Z
+bit 842 C 1 *
+bit 841 I 1 IO_Y8
+bit 840 O 1 IO_Y8 839 1 Z
+bit 839 C 1 *
+bit 838 I 1 IO_Y7
+bit 837 O 1 IO_Y7 836 1 Z
+bit 836 C 1 *
+bit 835 I 1 IO_Y6
+bit 834 O 1 IO_Y6 833 1 Z
+bit 833 C 1 *
+bit 832 I 1 IO_Y5
+bit 831 O 1 IO_Y5 830 1 Z
+bit 830 C 1 *
+bit 829 O 1 *
+bit 828 O 1 *
+bit 827 O 1 *
+bit 826 O 1 *
+bit 825 O 1 *
+bit 824 O 1 *
+bit 823 I 1 IO_Y2
+bit 822 O 1 IO_Y2 821 1 Z
+bit 821 C 1 *
+bit 820 I 1 IO_Y1
+bit 819 O 1 IO_Y1 818 1 Z
+bit 818 C 1 *
+bit 817 O 1 *
+bit 816 O 1 *
+bit 815 O 1 *
+bit 814 O 1 *
+bit 813 O 1 *
+bit 812 O 1 *
+bit 811 I 1 IO_W7
+bit 810 O 1 IO_W7 809 1 Z
+bit 809 C 1 *
+bit 808 I 1 IO_W6
+bit 807 O 1 IO_W6 806 1 Z
+bit 806 C 1 *
+bit 805 I 1 IO_W4
+bit 804 O 1 IO_W4 803 1 Z
+bit 803 C 1 *
+bit 802 I 1 IO_W3
+bit 801 O 1 IO_W3 800 1 Z
+bit 800 C 1 *
+bit 799 I 1 IO_W2
+bit 798 O 1 IO_W2 797 1 Z
+bit 797 C 1 *
+bit 796 I 1 IO_W1
+bit 795 O 1 IO_W1 794 1 Z
+bit 794 C 1 *
+bit 793 I 1 IO_W10
+bit 792 O 1 IO_W10 791 1 Z
+bit 791 C 1 *
+bit 790 I 1 IO_V10
+bit 789 O 1 IO_V10 788 1 Z
+bit 788 C 1 *
+bit 787 O 1 *
+bit 786 O 1 *
+bit 785 O 1 *
+bit 784 O 1 *
+bit 783 O 1 *
+bit 782 O 1 *
+bit 781 I 1 IO_W5
+bit 780 O 1 IO_W5 779 1 Z
+bit 779 C 1 *
+bit 778 I 1 IO_V6
+bit 777 O 1 IO_V6 776 1 Z
+bit 776 C 1 *
+bit 775 I 1 IO_V5
+bit 774 O 1 IO_V5 773 1 Z
+bit 773 C 1 *
+bit 772 I 1 IO_V4
+bit 771 O 1 IO_V4 770 1 Z
+bit 770 C 1 *
+bit 769 I 1 IO_V2
+bit 768 O 1 IO_V2 767 1 Z
+bit 767 C 1 *
+bit 766 I 1 IO_V1
+bit 765 O 1 IO_V1 764 1 Z
+bit 764 C 1 *
+bit 763 I 1 IO_U10
+bit 762 O 1 IO_U10 761 1 Z
+bit 761 C 1 *
+bit 760 I 1 IO_U9
+bit 759 O 1 IO_U9 758 1 Z
+bit 758 C 1 *
+bit 757 I 1 IO_U7
+bit 756 O 1 IO_U7 755 1 Z
+bit 755 C 1 *
+bit 754 I 1 IO_U6
+bit 753 O 1 IO_U6 752 1 Z
+bit 752 C 1 *
+bit 751 O 1 *
+bit 750 O 1 *
+bit 749 O 1 *
+bit 748 O 1 *
+bit 747 O 1 *
+bit 746 O 1 *
+bit 745 I 1 IO_T10
+bit 744 O 1 IO_T10 743 1 Z
+bit 743 C 1 *
+bit 742 I 1 IO_T9
+bit 741 O 1 IO_T9 740 1 Z
+bit 740 C 1 *
+bit 739 I 1 IO_T6
+bit 738 O 1 IO_T6 737 1 Z
+bit 737 C 1 *
+bit 736 I 1 IO_T5
+bit 735 O 1 IO_T5 734 1 Z
+bit 734 C 1 *
+bit 733 I 1 IO_T4
+bit 732 O 1 IO_T4 731 1 Z
+bit 731 C 1 *
+bit 730 I 1 IO_T3
+bit 729 O 1 IO_T3 728 1 Z
+bit 728 C 1 *
+bit 727 I 1 IO_T2
+bit 726 O 1 IO_T2 725 1 Z
+bit 725 C 1 *
+bit 724 I 1 IO_T1
+bit 723 O 1 IO_T1 722 1 Z
+bit 722 C 1 *
+bit 721 I 1 IO_R1
+bit 720 O 1 IO_R1 719 1 Z
+bit 719 C 1 *
+bit 718 I 1 IO_R2
+bit 717 O 1 IO_R2 716 1 Z
+bit 716 C 1 *
+bit 715 I 1 IO_R3
+bit 714 O 1 IO_R3 713 1 Z
+bit 713 C 1 *
+bit 712 I 1 IO_R4
+bit 711 O 1 IO_R4 710 1 Z
+bit 710 C 1 *
+bit 709 I 1 IO_R5
+bit 708 O 1 IO_R5 707 1 Z
+bit 707 C 1 *
+bit 706 I 1 IO_R6
+bit 705 O 1 IO_R6 704 1 Z
+bit 704 C 1 *
+bit 703 I 1 IO_R7
+bit 702 O 1 IO_R7 701 1 Z
+bit 701 C 1 *
+bit 700 I 1 IO_R8
+bit 699 O 1 IO_R8 698 1 Z
+bit 698 C 1 *
+bit 697 O 1 *
+bit 696 O 1 *
+bit 695 O 1 *
+bit 694 O 1 *
+bit 693 O 1 *
+bit 692 O 1 *
+bit 691 I 1 IO_R9
+bit 690 O 1 IO_R9 689 1 Z
+bit 689 C 1 *
+bit 688 I 1 IO_R10
+bit 687 O 1 IO_R10 686 1 Z
+bit 686 C 1 *
+bit 685 I 1 IO_P2
+bit 684 O 1 IO_P2 683 1 Z
+bit 683 C 1 *
+bit 682 I 1 IO_P3
+bit 681 O 1 IO_P3 680 1 Z
+bit 680 C 1 *
+bit 679 I 1 IO_P6
+bit 678 O 1 IO_P6 677 1 Z
+bit 677 C 1 *
+bit 676 I 1 IO_P7
+bit 675 O 1 IO_P7 674 1 Z
+bit 674 C 1 *
+bit 673 I 1 IO_P9
+bit 672 O 1 IO_P9 671 1 Z
+bit 671 C 1 *
+bit 670 I 1 IO_P10
+bit 669 O 1 IO_P10 668 1 Z
+bit 668 C 1 *
+bit 667 I 1 IO_N1
+bit 666 O 1 IO_N1 665 1 Z
+bit 665 C 1 *
+bit 664 I 1 IO_N2
+bit 663 O 1 IO_N2 662 1 Z
+bit 662 C 1 *
+bit 661 O 1 *
+bit 660 O 1 *
+bit 659 O 1 *
+bit 658 O 1 *
+bit 657 O 1 *
+bit 656 O 1 *
+bit 655 I 1 IO_N8
+bit 654 O 1 IO_N8 653 1 Z
+bit 653 C 1 *
+bit 652 I 1 IO_N9
+bit 651 O 1 IO_N9 650 1 Z
+bit 650 C 1 *
+bit 649 I 1 IO_N10
+bit 648 O 1 IO_N10 647 1 Z
+bit 647 C 1 *
+bit 646 I 1 IO_M10
+bit 645 O 1 IO_M10 644 1 Z
+bit 644 C 1 *
+bit 643 I 1 IO_M1
+bit 642 O 1 IO_M1 641 1 Z
+bit 641 C 1 *
+bit 640 I 1 IO_M2
+bit 639 O 1 IO_M2 638 1 Z
+bit 638 C 1 *
+bit 637 I 1 IO_M3
+bit 636 O 1 IO_M3 635 1 Z
+bit 635 C 1 *
+bit 634 I 1 IO_M4
+bit 633 O 1 IO_M4 632 1 Z
+bit 632 C 1 *
+bit 631 O 1 *
+bit 630 O 1 *
+bit 629 O 1 *
+bit 628 O 1 *
+bit 627 O 1 *
+bit 626 O 1 *
+bit 625 I 1 IO_L1
+bit 624 O 1 IO_L1 623 1 Z
+bit 623 C 1 *
+bit 622 I 1 IO_L2
+bit 621 O 1 IO_L2 620 1 Z
+bit 620 C 1 *
+bit 619 I 1 IO_L3
+bit 618 O 1 IO_L3 617 1 Z
+bit 617 C 1 *
+bit 616 I 1 IO_L4
+bit 615 O 1 IO_L4 614 1 Z
+bit 614 C 1 *
+bit 613 I 1 IO_L5
+bit 612 O 1 IO_L5 611 1 Z
+bit 611 C 1 *
+bit 610 I 1 IO_L6
+bit 609 O 1 IO_L6 608 1 Z
+bit 608 C 1 *
+bit 607 I 1 IO_L7
+bit 606 O 1 IO_L7 605 1 Z
+bit 605 C 1 *
+bit 604 I 1 IO_L8
+bit 603 O 1 IO_L8 602 1 Z
+bit 602 C 1 *
+bit 601 I 1 IO_L10
+bit 600 O 1 IO_L10 599 1 Z
+bit 599 C 1 *
+bit 598 I 1 IO_K10
+bit 597 O 1 IO_K10 596 1 Z
+bit 596 C 1 *
+bit 595 I 1 IO_K2
+bit 594 O 1 IO_K2 593 1 Z
+bit 593 C 1 *
+bit 592 I 1 IO_K3
+bit 591 O 1 IO_K3 590 1 Z
+bit 590 C 1 *
+bit 589 O 1 *
+bit 588 O 1 *
+bit 587 O 1 *
+bit 586 O 1 *
+bit 585 O 1 *
+bit 584 O 1 *
+bit 583 I 1 IO_K6
+bit 582 O 1 IO_K6 581 1 Z
+bit 581 C 1 *
+bit 580 I 1 IO_K7
+bit 579 O 1 IO_K7 578 1 Z
+bit 578 C 1 *
+bit 577 I 1 IO_K9
+bit 576 O 1 IO_K9 575 1 Z
+bit 575 C 1 *
+bit 574 I 1 IO_J8
+bit 573 O 1 IO_J8 572 1 Z
+bit 572 C 1 *
+bit 571 I 1 IO_J1
+bit 570 O 1 IO_J1 569 1 Z
+bit 569 C 1 *
+bit 568 I 1 IO_J2
+bit 567 O 1 IO_J2 566 1 Z
+bit 566 C 1 *
+bit 565 I 1 IO_J4
+bit 564 O 1 IO_J4 563 1 Z
+bit 563 C 1 *
+bit 562 I 1 IO_J5
+bit 561 O 1 IO_J5 560 1 Z
+bit 560 C 1 *
+bit 559 I 1 IO_H1
+bit 558 O 1 IO_H1 557 1 Z
+bit 557 C 1 *
+bit 556 I 1 IO_H2
+bit 555 O 1 IO_H2 554 1 Z
+bit 554 C 1 *
+bit 553 I 1 IO_J6
+bit 552 O 1 IO_J6 551 1 Z
+bit 551 C 1 *
+bit 550 O 1 *
+bit 549 O 1 *
+bit 548 O 1 *
+bit 547 I 1 IO_H3
+bit 546 O 1 IO_H3 545 1 Z
+bit 545 C 1 *
+bit 544 I 1 IO_H4
+bit 543 O 1 IO_H4 542 1 Z
+bit 542 C 1 *
+bit 541 I 1 IO_H5
+bit 540 O 1 IO_H5 539 1 Z
+bit 539 C 1 *
+bit 538 I 1 IO_H6
+bit 537 O 1 IO_H6 536 1 Z
+bit 536 C 1 *
+bit 535 I 1 IO_H7
+bit 534 O 1 IO_H7 533 1 Z
+bit 533 C 1 *
+bit 532 I 1 IO_G6
+bit 531 O 1 IO_G6 530 1 Z
+bit 530 C 1 *
+bit 529 I 1 IO_G1
+bit 528 O 1 IO_G1 527 1 Z
+bit 527 C 1 *
+bit 526 I 1 IO_G2
+bit 525 O 1 IO_G2 524 1 Z
+bit 524 C 1 *
+bit 523 I 1 IO_G3
+bit 522 O 1 IO_G3 521 1 Z
+bit 521 C 1 *
+bit 520 I 1 IO_G4
+bit 519 O 1 IO_G4 518 1 Z
+bit 518 C 1 *
+bit 517 I 1 IO_F2
+bit 516 O 1 IO_F2 515 1 Z
+bit 515 C 1 *
+bit 514 I 1 IO_F3
+bit 513 O 1 IO_F3 512 1 Z
+bit 512 C 1 *
+bit 511 I 1 IO_F5
+bit 510 O 1 IO_F5 509 1 Z
+bit 509 C 1 *
+bit 508 I 1 IO_E4
+bit 507 O 1 IO_E4 506 1 Z
+bit 506 C 1 *
+bit 505 I 1 IO_E1
+bit 504 O 1 IO_E1 503 1 Z
+bit 503 C 1 *
+bit 502 I 1 IO_E2
+bit 501 O 1 IO_E2 500 1 Z
+bit 500 C 1 *
+bit 499 I 1 IO_D1
+bit 498 O 1 IO_D1 497 1 Z
+bit 497 C 1 *
+bit 496 I 1 IO_D2
+bit 495 O 1 IO_D2 494 1 Z
+bit 494 C 1 *
+bit 493 I 1 IO_D3
+bit 492 O 1 IO_D3 491 1 Z
+bit 491 C 1 *
+bit 490 I 1 IO_D4
+bit 489 O 1 IO_D4 488 1 Z
+bit 488 C 1 *
+bit 487 I 1 IO_C1
+bit 486 O 1 IO_C1 485 1 Z
+bit 485 C 1 *
+bit 484 I 1 IO_C2
+bit 483 O 1 IO_C2 482 1 Z
+bit 482 C 1 *
+bit 481 O 1 *
+bit 480 I 1 HSWAP_EN_A3
+bit 479 I 1 IO_C4
+bit 478 O 1 IO_C4 477 1 Z
+bit 477 C 1 *
+bit 476 I 1 IO_B4
+bit 475 O 1 IO_B4 474 1 Z
+bit 474 C 1 *
+bit 473 I 1 IO_A4
+bit 472 O 1 IO_A4 471 1 Z
+bit 471 C 1 *
+bit 470 I 1 IO_B5
+bit 469 O 1 IO_B5 468 1 Z
+bit 468 C 1 *
+bit 467 I 1 IO_A5
+bit 466 O 1 IO_A5 465 1 Z
+bit 465 C 1 *
+bit 464 O 1 *
+bit 463 O 1 *
+bit 462 O 1 *
+bit 461 I 1 IO_D5
+bit 460 O 1 IO_D5 459 1 Z
+bit 459 C 1 *
+bit 458 I 1 IO_E6
+bit 457 O 1 IO_E6 456 1 Z
+bit 456 C 1 *
+bit 455 I 1 IO_C6
+bit 454 O 1 IO_C6 453 1 Z
+bit 453 C 1 *
+bit 452 I 1 IO_B6
+bit 451 O 1 IO_B6 450 1 Z
+bit 450 C 1 *
+bit 449 O 1 *
+bit 448 O 1 *
+bit 447 O 1 *
+bit 446 I 1 IO_F6
+bit 445 O 1 IO_F6 444 1 Z
+bit 444 C 1 *
+bit 443 I 1 IO_F7
+bit 442 O 1 IO_F7 441 1 Z
+bit 441 C 1 *
+bit 440 I 1 IO_D7
+bit 439 O 1 IO_D7 438 1 Z
+bit 438 C 1 *
+bit 437 I 1 IO_C7
+bit 436 O 1 IO_C7 435 1 Z
+bit 435 C 1 *
+bit 434 I 1 IO_G8
+bit 433 O 1 IO_G8 432 1 Z
+bit 432 C 1 *
+bit 431 I 1 IO_F8
+bit 430 O 1 IO_F8 429 1 Z
+bit 429 C 1 *
+bit 428 I 1 IO_E8
+bit 427 O 1 IO_E8 426 1 Z
+bit 426 C 1 *
+bit 425 I 1 IO_D8
+bit 424 O 1 IO_D8 423 1 Z
+bit 423 C 1 *
+bit 422 I 1 IO_C8
+bit 421 O 1 IO_C8 420 1 Z
+bit 420 C 1 *
+bit 419 O 1 *
+bit 418 O 1 *
+bit 417 O 1 *
+bit 416 I 1 IO_B8
+bit 415 O 1 IO_B8 414 1 Z
+bit 414 C 1 *
+bit 413 I 1 IO_A8
+bit 412 O 1 IO_A8 411 1 Z
+bit 411 C 1 *
+bit 410 I 1 IO_J9
+bit 409 O 1 IO_J9 408 1 Z
+bit 408 C 1 *
+bit 407 I 1 IO_H9
+bit 406 O 1 IO_H9 405 1 Z
+bit 405 C 1 *
+bit 404 I 1 IO_F9
+bit 403 O 1 IO_F9 402 1 Z
+bit 402 C 1 *
+bit 401 I 1 IO_G10
+bit 400 O 1 IO_G10 399 1 Z
+bit 399 C 1 *
+bit 398 I 1 IO_F10
+bit 397 O 1 IO_F10 396 1 Z
+bit 396 C 1 *
+bit 395 I 1 IO_C10
+bit 394 O 1 IO_C10 393 1 Z
+bit 393 C 1 *
+bit 392 I 1 IO_B10
+bit 391 O 1 IO_B10 390 1 Z
+bit 390 C 1 *
+bit 389 O 1 *
+bit 388 O 1 *
+bit 387 O 1 *
+bit 386 I 1 IO_J10
+bit 385 O 1 IO_J10 384 1 Z
+bit 384 C 1 *
+bit 383 I 1 IO_K11
+bit 382 O 1 IO_K11 381 1 Z
+bit 381 C 1 *
+bit 380 I 1 IO_H11
+bit 379 O 1 IO_H11 378 1 Z
+bit 378 C 1 *
+bit 377 I 1 IO_G11
+bit 376 O 1 IO_G11 375 1 Z
+bit 375 C 1 *
+bit 374 O 1 *
+bit 373 O 1 *
+bit 372 O 1 *
+bit 371 I 1 IO_F11
+bit 370 O 1 IO_F11 369 1 Z
+bit 369 C 1 *
+bit 368 I 1 IO_E11
+bit 367 O 1 IO_E11 366 1 Z
+bit 366 C 1 *
+bit 365 I 1 IO_D11
+bit 364 O 1 IO_D11 363 1 Z
+bit 363 C 1 *
+bit 362 I 1 IO_C11
+bit 361 O 1 IO_C11 360 1 Z
+bit 360 C 1 *
+bit 359 O 1 *
+bit 358 O 1 *
+bit 357 O 1 *
+bit 356 I 1 IO_B11
+bit 355 O 1 IO_B11 354 1 Z
+bit 354 C 1 *
+bit 353 I 1 IO_A11
+bit 352 O 1 IO_A11 351 1 Z
+bit 351 C 1 *
+bit 350 I 1 IO_K12
+bit 349 O 1 IO_K12 348 1 Z
+bit 348 C 1 *
+bit 347 I 1 IO_J12
+bit 346 O 1 IO_J12 345 1 Z
+bit 345 C 1 *
+bit 344 O 1 *
+bit 343 O 1 *
+bit 342 O 1 *
+bit 341 I 1 IO_H12
+bit 340 O 1 IO_H12 339 1 Z
+bit 339 C 1 *
+bit 338 I 1 IO_G12
+bit 337 O 1 IO_G12 336 1 Z
+bit 336 C 1 *
+bit 335 I 1 IO_F12
+bit 334 O 1 IO_F12 333 1 Z
+bit 333 C 1 *
+bit 332 I 1 IO_E12
+bit 331 O 1 IO_E12 330 1 Z
+bit 330 C 1 *
+bit 329 O 1 *
+bit 328 O 1 *
+bit 327 O 1 *
+bit 326 I 1 IO_D12
+bit 325 O 1 IO_D12 324 1 Z
+bit 324 C 1 *
+bit 323 I 1 IO_C12
+bit 322 O 1 IO_C12 321 1 Z
+bit 321 C 1 *
+bit 320 I 1 IO_B12
+bit 319 O 1 IO_B12 318 1 Z
+bit 318 C 1 *
+bit 317 I 1 IO_A12
+bit 316 O 1 IO_A12 315 1 Z
+bit 315 C 1 *
+bit 314 I 1 IO_K13
+bit 313 O 1 IO_K13 312 1 Z
+bit 312 C 1 *
+bit 311 I 1 IO_J13
+bit 310 O 1 IO_J13 309 1 Z
+bit 309 C 1 *
+bit 308 I 1 IO_H13
+bit 307 O 1 IO_H13 306 1 Z
+bit 306 C 1 *
+bit 305 I 1 IO_F13
+bit 304 O 1 IO_F13 303 1 Z
+bit 303 C 1 *
+bit 302 I 1 IO_E13
+bit 301 O 1 IO_E13 300 1 Z
+bit 300 C 1 *
+bit 299 I 1 IO_D13
+bit 298 O 1 IO_D13 297 1 Z
+bit 297 C 1 *
+bit 296 I 1 IO_B13
+bit 295 O 1 IO_B13 294 1 Z
+bit 294 C 1 *
+bit 293 I 1 IO_A13
+bit 292 O 1 IO_A13 291 1 Z
+bit 291 C 1 *
+bit 290 I 1 IO_K14
+bit 289 O 1 IO_K14 288 1 Z
+bit 288 C 1 *
+bit 287 I 1 IO_J14
+bit 286 O 1 IO_J14 285 1 Z
+bit 285 C 1 *
+bit 284 I 1 IO_K15
+bit 283 O 1 IO_K15 282 1 Z
+bit 282 C 1 *
+bit 281 I 1 IO_G14
+bit 280 O 1 IO_G14 279 1 Z
+bit 279 C 1 *
+bit 278 I 1 IO_F14
+bit 277 O 1 IO_F14 276 1 Z
+bit 276 C 1 *
+bit 275 I 1 IO_C14
+bit 274 O 1 IO_C14 273 1 Z
+bit 273 C 1 *
+bit 272 I 1 IO_B14
+bit 271 O 1 IO_B14 270 1 Z
+bit 270 C 1 *
+bit 269 O 1 *
+bit 268 O 1 *
+bit 267 O 1 *
+bit 266 I 1 IO_J15
+bit 265 O 1 IO_J15 264 1 Z
+bit 264 C 1 *
+bit 263 I 1 IO_H15
+bit 262 O 1 IO_H15 261 1 Z
+bit 261 C 1 *
+bit 260 I 1 IO_G15
+bit 259 O 1 IO_G15 258 1 Z
+bit 258 C 1 *
+bit 257 I 1 IO_F15
+bit 256 O 1 IO_F15 255 1 Z
+bit 255 C 1 *
+bit 254 I 1 IO_E15
+bit 253 O 1 IO_E15 252 1 Z
+bit 252 C 1 *
+bit 251 I 1 IO_D15
+bit 250 O 1 IO_D15 249 1 Z
+bit 249 C 1 *
+bit 248 I 1 IO_C15
+bit 247 O 1 IO_C15 246 1 Z
+bit 246 C 1 *
+bit 245 I 1 IO_B15
+bit 244 O 1 IO_B15 243 1 Z
+bit 243 C 1 *
+bit 242 I 1 IO_A15
+bit 241 O 1 IO_A15 240 1 Z
+bit 240 C 1 *
+bit 239 I 1 IO_A16
+bit 238 O 1 IO_A16 237 1 Z
+bit 237 C 1 *
+bit 236 I 1 IO_B16
+bit 235 O 1 IO_B16 234 1 Z
+bit 234 C 1 *
+bit 233 I 1 IO_C16
+bit 232 O 1 IO_C16 231 1 Z
+bit 231 C 1 *
+bit 230 I 1 IO_D16
+bit 229 O 1 IO_D16 228 1 Z
+bit 228 C 1 *
+bit 227 I 1 IO_E16
+bit 226 O 1 IO_E16 225 1 Z
+bit 225 C 1 *
+bit 224 I 1 IO_F16
+bit 223 O 1 IO_F16 222 1 Z
+bit 222 C 1 *
+bit 221 I 1 IO_G16
+bit 220 O 1 IO_G16 219 1 Z
+bit 219 C 1 *
+bit 218 I 1 IO_H16
+bit 217 O 1 IO_H16 216 1 Z
+bit 216 C 1 *
+bit 215 I 1 IO_J16
+bit 214 O 1 IO_J16 213 1 Z
+bit 213 C 1 *
+bit 212 I 1 IO_K16
+bit 211 O 1 IO_K16 210 1 Z
+bit 210 C 1 *
+bit 209 I 1 IO_J17
+bit 208 O 1 IO_J17 207 1 Z
+bit 207 C 1 *
+bit 206 I 1 IO_B17
+bit 205 O 1 IO_B17 204 1 Z
+bit 204 C 1 *
+bit 203 I 1 IO_C17
+bit 202 O 1 IO_C17 201 1 Z
+bit 201 C 1 *
+bit 200 I 1 IO_F17
+bit 199 O 1 IO_F17 198 1 Z
+bit 198 C 1 *
+bit 197 I 1 IO_G17
+bit 196 O 1 IO_G17 195 1 Z
+bit 195 C 1 *
+bit 194 I 1 IO_F18
+bit 193 O 1 IO_F18 192 1 Z
+bit 192 C 1 *
+bit 191 I 1 IO_A19
+bit 190 O 1 IO_A19 189 1 Z
+bit 189 C 1 *
+bit 188 I 1 IO_B19
+bit 187 O 1 IO_B19 186 1 Z
+bit 186 C 1 *
+bit 185 I 1 IO_C19
+bit 184 O 1 IO_C19 183 1 Z
+bit 183 C 1 *
+bit 182 I 1 IO_D19
+bit 181 O 1 IO_D19 180 1 Z
+bit 180 C 1 *
+bit 179 O 1 *
+bit 178 O 1 *
+bit 177 O 1 *
+bit 176 I 1 IO_E19
+bit 175 O 1 IO_E19 174 1 Z
+bit 174 C 1 *
+bit 173 I 1 IO_F19
+bit 172 O 1 IO_F19 171 1 Z
+bit 171 C 1 *
+bit 170 I 1 IO_G19
+bit 169 O 1 IO_G19 168 1 Z
+bit 168 C 1 *
+bit 167 I 1 IO_H19
+bit 166 O 1 IO_H19 165 1 Z
+bit 165 C 1 *
+bit 164 O 1 *
+bit 163 O 1 *
+bit 162 O 1 *
+bit 161 I 1 IO_J19
+bit 160 O 1 IO_J19 159 1 Z
+bit 159 C 1 *
+bit 158 I 1 IO_K19
+bit 157 O 1 IO_K19 156 1 Z
+bit 156 C 1 *
+bit 155 I 1 IO_A20
+bit 154 O 1 IO_A20 153 1 Z
+bit 153 C 1 *
+bit 152 I 1 IO_B20
+bit 151 O 1 IO_B20 150 1 Z
+bit 150 C 1 *
+bit 149 O 1 *
+bit 148 O 1 *
+bit 147 O 1 *
+bit 146 I 1 IO_C20
+bit 145 O 1 IO_C20 144 1 Z
+bit 144 C 1 *
+bit 143 I 1 IO_D20
+bit 142 O 1 IO_D20 141 1 Z
+bit 141 C 1 *
+bit 140 I 1 IO_E20
+bit 139 O 1 IO_E20 138 1 Z
+bit 138 C 1 *
+bit 137 I 1 IO_F20
+bit 136 O 1 IO_F20 135 1 Z
+bit 135 C 1 *
+bit 134 O 1 *
+bit 133 O 1 *
+bit 132 O 1 *
+bit 131 I 1 IO_G20
+bit 130 O 1 IO_G20 129 1 Z
+bit 129 C 1 *
+bit 128 I 1 IO_H20
+bit 127 O 1 IO_H20 126 1 Z
+bit 126 C 1 *
+bit 125 I 1 IO_B21
+bit 124 O 1 IO_B21 123 1 Z
+bit 123 C 1 *
+bit 122 I 1 IO_C21
+bit 121 O 1 IO_C21 120 1 Z
+bit 120 C 1 *
+bit 119 I 1 IO_K20
+bit 118 O 1 IO_K20 117 1 Z
+bit 117 C 1 *
+bit 116 I 1 IO_F21
+bit 115 O 1 IO_F21 114 1 Z
+bit 114 C 1 *
+bit 113 I 1 IO_G21
+bit 112 O 1 IO_G21 111 1 Z
+bit 111 C 1 *
+bit 110 I 1 IO_A22
+bit 109 O 1 IO_A22 108 1 Z
+bit 108 C 1 *
+bit 107 I 1 IO_B22
+bit 106 O 1 IO_B22 105 1 Z
+bit 105 C 1 *
+bit 104 I 1 IO_J21
+bit 103 O 1 IO_J21 102 1 Z
+bit 102 C 1 *
+bit 101 I 1 IO_D22
+bit 100 O 1 IO_D22 99 1 Z
+bit 99 C 1 *
+bit 98 I 1 IO_E22
+bit 97 O 1 IO_E22 96 1 Z
+bit 96 C 1 *
+bit 95 I 1 IO_F22
+bit 94 O 1 IO_F22 93 1 Z
+bit 93 C 1 *
+bit 92 I 1 IO_E23
+bit 91 O 1 IO_E23 90 1 Z
+bit 90 C 1 *
+bit 89 O 1 *
+bit 88 O 1 *
+bit 87 O 1 *
+bit 86 I 1 IO_H22
+bit 85 O 1 IO_H22 84 1 Z
+bit 84 C 1 *
+bit 83 I 1 IO_J22
+bit 82 O 1 IO_J22 81 1 Z
+bit 81 C 1 *
+bit 80 I 1 IO_A23
+bit 79 O 1 IO_A23 78 1 Z
+bit 78 C 1 *
+bit 77 I 1 IO_B23
+bit 76 O 1 IO_B23 75 1 Z
+bit 75 C 1 *
+bit 74 O 1 *
+bit 73 O 1 *
+bit 72 O 1 *
+bit 71 I 1 IO_C23
+bit 70 O 1 IO_C23 69 1 Z
+bit 69 C 1 *
+bit 68 I 1 IO_D23
+bit 67 O 1 IO_D23 66 1 Z
+bit 66 C 1 *
+bit 65 I 1 IO_F23
+bit 64 O 1 IO_F23 63 1 Z
+bit 63 C 1 *
+bit 62 I 1 IO_G23
+bit 61 O 1 IO_G23 60 1 Z
+bit 60 C 1 *
+bit 59 O 1 *
+bit 58 O 1 *
+bit 57 O 1 *
+bit 56 I 1 IO_H23
+bit 55 O 1 IO_H23 54 1 Z
+bit 54 C 1 *
+bit 53 I 1 IO_G24
+bit 52 O 1 IO_G24 51 1 Z
+bit 51 C 1 *
+bit 50 I 1 IO_A24
+bit 49 O 1 IO_A24 48 1 Z
+bit 48 C 1 *
+bit 47 I 1 IO_B24
+bit 46 O 1 IO_B24 45 1 Z
+bit 45 C 1 *
+bit 44 O 1 *
+bit 43 O 1 *
+bit 42 O 1 *
+bit 41 I 1 IO_C24
+bit 40 O 1 IO_C24 39 1 Z
+bit 39 C 1 *
+bit 38 I 1 IO_D24
+bit 37 O 1 IO_D24 36 1 Z
+bit 36 C 1 *
+bit 35 I 1 IO_F24
+bit 34 O 1 IO_F24 33 1 Z
+bit 33 C 1 *
+bit 32 I 1 IO_F25
+bit 31 O 1 IO_F25 30 1 Z
+bit 30 C 1 *
+bit 29 I 1 IO_E25
+bit 28 O 1 IO_E25 27 1 Z
+bit 27 C 1 *
+bit 26 I 1 IO_B25
+bit 25 O 1 IO_B25 24 1 Z
+bit 24 C 1 *
+bit 23 I 1 IO_C25
+bit 22 O 1 IO_C25 21 1 Z
+bit 21 C 1 *
+bit 20 I 1 IO_A26
+bit 19 O 1 IO_A26 18 1 Z
+bit 18 C 1 *
+bit 17 I 1 IO_B26
+bit 16 O 1 IO_B26 15 1 Z
+bit 15 C 1 *
+bit 14 O 1 *
+bit 13 O 1 *
+bit 12 O 1 *
+bit 11 I 1 IO_D26
+bit 10 O 1 IO_D26 9 1 Z
+bit 9 C 1 *
+bit 8 I 1 IO_C27
+bit 7 O 1 IO_C27 6 1 Z
+bit 6 C 1 *
+bit 5 I 1 IO_A27
+bit 4 O 1 IO_A27 3 1 Z
+bit 3 C 1 *
+bit 2 I 1 IO_B27
+bit 1 O 1 IO_B27 0 1 Z
+bit 0 C 1 *
--- /dev/null
+signal GND1
+signal GND2
+signal GND3
+signal GND4
+signal GND5
+signal GND6
+signal GND7
+signal GND8
+signal GND9
+signal GND10
+signal GND11
+signal GND12
+signal GND13
+signal GND14
+signal GND15
+signal GND16
+signal GND17
+signal GND18
+signal GND19
+signal GND20
+signal GND21
+signal GND22
+signal GND23
+signal GND24
+signal GND25
+signal GND26
+signal GND27
+signal GND28
+signal GND29
+signal GND30
+signal GND31
+signal GND32
+signal GND33
+signal GND34
+signal GND35
+signal GND36
+signal GND37
+signal GND38
+signal GND39
+signal GND40
+signal GND41
+signal GND42
+signal GND43
+signal GND44
+signal GND45
+signal GND46
+signal GND47
+signal GND48
+signal GND49
+signal GND50
+signal GND51
+signal GND52
+signal GND53
+signal GND54
+signal GND55
+signal GND56
+signal GND57
+signal GND58
+signal GND59
+signal GND60
+signal GND61
+signal GND62
+signal GND63
+signal GND64
+signal GND65
+signal GND66
+signal GND67
+signal GND68
+signal GND69
+signal GND70
+signal GND71
+signal GND72
+signal GND73
+signal GND74
+signal GND75
+signal GND76
+signal GND77
+signal GND78
+signal GND79
+signal GND80
+signal GND81
+signal GND82
+signal GND83
+signal GND84
+signal GND85
+signal GND86
+signal GND87
+signal GND88
+signal GND89
+signal GND90
+signal GND91
+signal GND92
+signal GND93
+signal GND94
+signal GND95
+signal GND96
+signal GND97
+signal GND98
+signal GND99
+signal GND100
+signal GND101
+signal GND102
+signal GND103
+signal GND104
+signal GND105
+signal GND106
+signal GND107
+signal GND108
+signal GND109
+signal GND110
+signal GND111
+signal GND112
+signal CCLK_PAD544
+signal DONE_PAD543
+signal HSWAP_EN_PAD112
+signal M0_PAD319
+signal M1_PAD318
+signal M2_PAD320
+signal PROG_B
+signal TCK
+signal TDI
+signal TDO
+signal TMS
+signal VCCAUX1
+signal VCCAUX2
+signal VCCAUX3
+signal VCCAUX4
+signal VCCAUX5
+signal VCCAUX6
+signal VCCAUX7
+signal VCCAUX8
+signal VCCAUX9
+signal VCCAUX10
+signal VCCAUX11
+signal VCCAUX12
+signal VCCAUX13
+signal VCCAUX14
+signal VCCAUX15
+signal VCCAUX16
+signal VCCAUX17
+signal VCCAUX18
+signal VCCAUX19
+signal VCCAUX20
+signal VCCAUX21
+signal VCCAUX22
+signal VCCAUX23
+signal VCCAUX24
+signal VCCINT1
+signal VCCINT2
+signal VCCINT3
+signal VCCINT4
+signal VCCINT5
+signal VCCINT6
+signal VCCINT7
+signal VCCINT8
+signal VCCINT9
+signal VCCINT10
+signal VCCINT11
+signal VCCINT12
+signal VCCINT13
+signal VCCINT14
+signal VCCINT15
+signal VCCINT16
+signal VCCINT17
+signal VCCINT18
+signal VCCINT19
+signal VCCINT20
+signal VCCINT21
+signal VCCINT22
+signal VCCINT23
+signal VCCINT24
+signal VCCO01
+signal VCCO02
+signal VCCO03
+signal VCCO04
+signal VCCO05
+signal VCCO06
+signal VCCO07
+signal VCCO08
+signal VCCO09
+signal VCCO010
+signal VCCO11
+signal VCCO12
+signal VCCO13
+signal VCCO14
+signal VCCO15
+signal VCCO16
+signal VCCO17
+signal VCCO18
+signal VCCO19
+signal VCCO110
+signal VCCO21
+signal VCCO22
+signal VCCO23
+signal VCCO24
+signal VCCO25
+signal VCCO26
+signal VCCO27
+signal VCCO28
+signal VCCO29
+signal VCCO31
+signal VCCO32
+signal VCCO33
+signal VCCO34
+signal VCCO35
+signal VCCO36
+signal VCCO37
+signal VCCO38
+signal VCCO39
+signal VCCO41
+signal VCCO42
+signal VCCO43
+signal VCCO44
+signal VCCO45
+signal VCCO46
+signal VCCO47
+signal VCCO48
+signal VCCO49
+signal VCCO410
+signal VCCO51
+signal VCCO52
+signal VCCO53
+signal VCCO54
+signal VCCO55
+signal VCCO56
+signal VCCO57
+signal VCCO58
+signal VCCO59
+signal VCCO510
+signal VCCO61
+signal VCCO62
+signal VCCO63
+signal VCCO64
+signal VCCO65
+signal VCCO66
+signal VCCO67
+signal VCCO68
+signal VCCO69
+signal VCCO71
+signal VCCO72
+signal VCCO73
+signal VCCO74
+signal VCCO75
+signal VCCO76
+signal VCCO77
+signal VCCO78
+signal VCCO79
+signal IO_PAD2
+signal IO_PAD3
+signal IO_PAD4
+signal IO_PAD6
+signal IO_PAD8
+signal IO_PAD9
+signal IO_PAD10
+signal IO_PAD12
+signal IO_PAD13
+signal IO_PAD14
+signal IO_PAD16
+signal IO_PAD18
+signal IO_PAD20
+signal IO_PAD22
+signal IO_PAD23
+signal IO_PAD24
+signal IO_PAD25
+signal IO_PAD26
+signal IO_PAD28
+signal IO_PAD30
+signal IO_PAD31
+signal IO_PAD32
+signal IO_PAD33
+signal IO_PAD34
+signal IO_PAD35
+signal IO_PAD36
+signal IO_PAD38
+signal IO_PAD40
+signal IO_PAD41
+signal IO_PAD42
+signal IO_PAD44
+signal IO_PAD45
+signal IO_PAD46
+signal IO_PAD48
+signal IO_PAD50
+signal IO_PAD52
+signal IO_PAD54
+signal IO_PAD55
+signal IO_PAD56
+signal IO_PAD57
+signal IO_PAD58
+signal IO_PAD60
+signal IO_PAD62
+signal IO_PAD63
+signal IO_PAD64
+signal IO_PAD66
+signal IO_PAD67
+signal IO_PAD68
+signal IO_PAD69
+signal IO_PAD70
+signal IO_PAD72
+signal IO_PAD73
+signal IO_PAD74
+signal IO_PAD76
+signal IO_PAD77
+signal IO_PAD78
+signal IO_PAD80
+signal IO_PAD82
+signal IO_PAD84
+signal IO_PAD86
+signal IO_PAD87
+signal IO_PAD88
+signal IO_PAD89
+signal IO_PAD90
+signal IO_PAD92
+signal IO_PAD94
+signal IO_PAD95
+signal IO_PAD96
+signal IO_PAD97
+signal IO_PAD98
+signal IO_PAD100
+signal IO_PAD101
+signal IO_PAD102
+signal IO_PAD104
+signal IO_PAD105
+signal IO_PAD106
+signal IO_PAD108
+signal IO_PAD109
+signal IO_PAD110
+signal IO_PAD111
+signal IO_PAD116
+signal IO_PAD117
+signal IO_PAD118
+signal IO_PAD120
+signal IO_PAD121
+signal IO_PAD122
+signal IO_PAD123
+signal IO_PAD124
+signal IO_PAD126
+signal IO_PAD128
+signal IO_PAD129
+signal IO_PAD130
+signal IO_PAD131
+signal IO_PAD132
+signal IO_PAD134
+signal IO_PAD136
+signal IO_PAD138
+signal IO_PAD140
+signal IO_PAD141
+signal IO_PAD142
+signal IO_PAD144
+signal IO_PAD146
+signal IO_PAD147
+signal IO_PAD148
+signal IO_PAD149
+signal IO_PAD150
+signal IO_PAD152
+signal IO_PAD153
+signal IO_PAD154
+signal IO_PAD155
+signal IO_PAD156
+signal IO_PAD158
+signal IO_PAD159
+signal IO_PAD160
+signal IO_PAD162
+signal IO_PAD164
+signal IO_PAD165
+signal IO_PAD166
+signal IO_PAD167
+signal IO_PAD168
+signal IO_PAD170
+signal IO_PAD172
+signal IO_PAD174
+signal IO_PAD176
+signal IO_PAD177
+signal IO_PAD178
+signal IO_PAD180
+signal IO_PAD182
+signal IO_PAD183
+signal IO_PAD184
+signal IO_PAD185
+signal IO_PAD186
+signal IO_PAD187
+signal IO_PAD188
+signal IO_PAD190
+signal IO_PAD192
+signal IO_PAD193
+signal IO_PAD194
+signal IO_PAD195
+signal IO_PAD196
+signal IO_PAD198
+signal IO_PAD200
+signal IO_PAD202
+signal IO_PAD204
+signal IO_PAD205
+signal IO_PAD206
+signal IO_PAD208
+signal IO_PAD209
+signal IO_PAD210
+signal IO_PAD212
+signal IO_PAD214
+signal IO_PAD215
+signal IO_PAD217
+signal IO_PAD218
+signal IO_PAD220
+signal IO_PAD222
+signal IO_PAD223
+signal IO_PAD224
+signal IO_PAD226
+signal IO_PAD227
+signal IO_PAD228
+signal IO_PAD230
+signal IO_PAD232
+signal IO_PAD234
+signal IO_PAD236
+signal IO_PAD237
+signal IO_PAD238
+signal IO_PAD239
+signal IO_PAD240
+signal IO_PAD242
+signal IO_PAD244
+signal IO_PAD245
+signal IO_PAD246
+signal IO_PAD247
+signal IO_PAD248
+signal IO_PAD249
+signal IO_PAD250
+signal IO_PAD252
+signal IO_PAD254
+signal IO_PAD255
+signal IO_PAD256
+signal IO_PAD258
+signal IO_PAD260
+signal IO_PAD262
+signal IO_PAD264
+signal IO_PAD265
+signal IO_PAD266
+signal IO_PAD267
+signal IO_PAD268
+signal IO_PAD270
+signal IO_PAD272
+signal IO_PAD273
+signal IO_PAD274
+signal IO_PAD276
+signal IO_PAD277
+signal IO_PAD278
+signal IO_PAD279
+signal IO_PAD280
+signal IO_PAD282
+signal IO_PAD283
+signal IO_PAD284
+signal IO_PAD285
+signal IO_PAD286
+signal IO_PAD288
+signal IO_PAD290
+signal IO_PAD291
+signal IO_PAD292
+signal IO_PAD294
+signal IO_PAD296
+signal IO_PAD298
+signal IO_PAD300
+signal IO_PAD301
+signal IO_PAD302
+signal IO_PAD303
+signal IO_PAD304
+signal IO_PAD306
+signal IO_PAD308
+signal IO_PAD309
+signal IO_PAD310
+signal IO_PAD311
+signal IO_PAD312
+signal IO_PAD314
+signal IO_PAD315
+signal IO_PAD316
+signal IO_PAD321
+signal IO_PAD322
+signal IO_PAD323
+signal IO_PAD324
+signal IO_PAD326
+signal IO_PAD327
+signal IO_PAD328
+signal IO_PAD330
+signal IO_PAD331
+signal IO_PAD332
+signal IO_PAD334
+signal IO_PAD335
+signal IO_PAD336
+signal IO_PAD337
+signal IO_PAD338
+signal IO_PAD340
+signal IO_PAD342
+signal IO_PAD343
+signal IO_PAD344
+signal IO_PAD345
+signal IO_PAD346
+signal IO_PAD348
+signal IO_PAD350
+signal IO_PAD352
+signal IO_PAD354
+signal IO_PAD355
+signal IO_PAD356
+signal IO_PAD358
+signal IO_PAD359
+signal IO_PAD360
+signal IO_PAD362
+signal IO_PAD363
+signal IO_PAD364
+signal IO_PAD365
+signal IO_PAD366
+signal IO_PAD368
+signal IO_PAD369
+signal IO_PAD370
+signal IO_PAD372
+signal IO_PAD374
+signal IO_PAD375
+signal IO_PAD376
+signal IO_PAD377
+signal IO_PAD378
+signal IO_PAD380
+signal IO_PAD382
+signal IO_PAD384
+signal IO_PAD386
+signal IO_PAD387
+signal IO_PAD388
+signal IO_PAD390
+signal IO_PAD391
+signal IO_PAD392
+signal IO_PAD394
+signal IO_PAD396
+signal IO_PAD397
+signal IO_PAD398
+signal IO_PAD399
+signal IO_PAD400
+signal IO_PAD401
+signal IO_PAD402
+signal IO_PAD404
+signal IO_PAD406
+signal IO_PAD407
+signal IO_PAD408
+signal IO_PAD409
+signal IO_PAD410
+signal IO_PAD412
+signal IO_PAD414
+signal IO_PAD416
+signal IO_PAD418
+signal IO_PAD419
+signal IO_PAD420
+signal IO_PAD422
+signal IO_PAD423
+signal IO_PAD424
+signal IO_PAD426
+signal IO_PAD428
+signal IO_PAD429
+signal IO_PAD430
+signal IO_PAD432
+signal IO_PAD433
+signal IO_PAD434
+signal IO_PAD436
+signal IO_PAD438
+signal IO_PAD439
+signal IO_PAD440
+signal IO_PAD442
+signal IO_PAD443
+signal IO_PAD444
+signal IO_PAD446
+signal IO_PAD448
+signal IO_PAD450
+signal IO_PAD452
+signal IO_PAD453
+signal IO_PAD454
+signal IO_PAD455
+signal IO_PAD456
+signal IO_PAD458
+signal IO_PAD460
+signal IO_PAD461
+signal IO_PAD462
+signal IO_PAD463
+signal IO_PAD464
+signal IO_PAD465
+signal IO_PAD466
+signal IO_PAD468
+signal IO_PAD470
+signal IO_PAD471
+signal IO_PAD472
+signal IO_PAD474
+signal IO_PAD475
+signal IO_PAD476
+signal IO_PAD478
+signal IO_PAD480
+signal IO_PAD482
+signal IO_PAD484
+signal IO_PAD485
+signal IO_PAD486
+signal IO_PAD487
+signal IO_PAD488
+signal IO_PAD490
+signal IO_PAD492
+signal IO_PAD493
+signal IO_PAD494
+signal IO_PAD496
+signal IO_PAD497
+signal IO_PAD498
+signal IO_PAD499
+signal IO_PAD500
+signal IO_PAD502
+signal IO_PAD503
+signal IO_PAD504
+signal IO_PAD506
+signal IO_PAD507
+signal IO_PAD508
+signal IO_PAD510
+signal IO_PAD512
+signal IO_PAD514
+signal IO_PAD516
+signal IO_PAD517
+signal IO_PAD518
+signal IO_PAD519
+signal IO_PAD520
+signal IO_PAD522
+signal IO_PAD524
+signal IO_PAD525
+signal IO_PAD526
+signal IO_PAD527
+signal IO_PAD528
+signal IO_PAD530
+signal IO_PAD531
+signal IO_PAD532
+signal IO_PAD534
+signal IO_PAD535
+signal IO_PAD536
+signal IO_PAD538
+signal IO_PAD539
+signal IO_PAD540
+signal IO_PAD541
+signal IO_PAD547
+signal IO_PAD548
+signal IO_PAD549
+signal IO_PAD551
+signal IO_PAD552
+signal IO_PAD553
+signal IO_PAD554
+signal IO_PAD555
+signal IO_PAD557
+signal IO_PAD559
+signal IO_PAD560
+signal IO_PAD561
+signal IO_PAD562
+signal IO_PAD563
+signal IO_PAD565
+signal IO_PAD567
+signal IO_PAD569
+signal IO_PAD571
+signal IO_PAD572
+signal IO_PAD573
+signal IO_PAD575
+signal IO_PAD577
+signal IO_PAD578
+signal IO_PAD579
+signal IO_PAD580
+signal IO_PAD581
+signal IO_PAD583
+signal IO_PAD584
+signal IO_PAD585
+signal IO_PAD586
+signal IO_PAD587
+signal IO_PAD589
+signal IO_PAD590
+signal IO_PAD591
+signal IO_PAD593
+signal IO_PAD595
+signal IO_PAD596
+signal IO_PAD597
+signal IO_PAD598
+signal IO_PAD599
+signal IO_PAD601
+signal IO_PAD603
+signal IO_PAD605
+signal IO_PAD607
+signal IO_PAD608
+signal IO_PAD609
+signal IO_PAD611
+signal IO_PAD613
+signal IO_PAD614
+signal IO_PAD615
+signal IO_PAD616
+signal IO_PAD617
+signal IO_PAD618
+signal IO_PAD619
+signal IO_PAD621
+signal IO_PAD623
+signal IO_PAD624
+signal IO_PAD625
+signal IO_PAD626
+signal IO_PAD627
+signal IO_PAD629
+signal IO_PAD631
+signal IO_PAD633
+signal IO_PAD635
+signal IO_PAD636
+signal IO_PAD637
+signal IO_PAD639
+signal IO_PAD640
+signal IO_PAD641
+signal IO_PAD643
+signal IO_PAD645
+signal IO_PAD646
+signal IO_PAD648
+signal IO_PAD649
+signal IO_PAD651
+signal IO_PAD653
+signal IO_PAD654
+signal IO_PAD655
+signal IO_PAD657
+signal IO_PAD658
+signal IO_PAD659
+signal IO_PAD661
+signal IO_PAD663
+signal IO_PAD665
+signal IO_PAD667
+signal IO_PAD668
+signal IO_PAD669
+signal IO_PAD670
+signal IO_PAD671
+signal IO_PAD673
+signal IO_PAD675
+signal IO_PAD676
+signal IO_PAD677
+signal IO_PAD678
+signal IO_PAD679
+signal IO_PAD680
+signal IO_PAD681
+signal IO_PAD683
+signal IO_PAD685
+signal IO_PAD686
+signal IO_PAD687
+signal IO_PAD689
+signal IO_PAD691
+signal IO_PAD693
+signal IO_PAD695
+signal IO_PAD696
+signal IO_PAD697
+signal IO_PAD698
+signal IO_PAD699
+signal IO_PAD701
+signal IO_PAD703
+signal IO_PAD704
+signal IO_PAD705
+signal IO_PAD707
+signal IO_PAD708
+signal IO_PAD709
+signal IO_PAD710
+signal IO_PAD711
+signal IO_PAD713
+signal IO_PAD714
+signal IO_PAD715
+signal IO_PAD716
+signal IO_PAD717
+signal IO_PAD719
+signal IO_PAD721
+signal IO_PAD722
+signal IO_PAD723
+signal IO_PAD725
+signal IO_PAD727
+signal IO_PAD729
+signal IO_PAD731
+signal IO_PAD732
+signal IO_PAD733
+signal IO_PAD734
+signal IO_PAD735
+signal IO_PAD737
+signal IO_PAD739
+signal IO_PAD740
+signal IO_PAD741
+signal IO_PAD742
+signal IO_PAD743
+signal IO_PAD745
+signal IO_PAD746
+signal IO_PAD747
+signal IO_PAD752
+signal IO_PAD753
+signal IO_PAD754
+signal IO_PAD755
+signal IO_PAD757
+signal IO_PAD758
+signal IO_PAD759
+signal IO_PAD761
+signal IO_PAD762
+signal IO_PAD763
+signal IO_PAD765
+signal IO_PAD766
+signal IO_PAD767
+signal IO_PAD768
+signal IO_PAD769
+signal IO_PAD771
+signal IO_PAD773
+signal IO_PAD774
+signal IO_PAD775
+signal IO_PAD776
+signal IO_PAD777
+signal IO_PAD779
+signal IO_PAD781
+signal IO_PAD783
+signal IO_PAD785
+signal IO_PAD786
+signal IO_PAD787
+signal IO_PAD789
+signal IO_PAD790
+signal IO_PAD791
+signal IO_PAD793
+signal IO_PAD794
+signal IO_PAD795
+signal IO_PAD796
+signal IO_PAD797
+signal IO_PAD799
+signal IO_PAD800
+signal IO_PAD801
+signal IO_PAD803
+signal IO_PAD805
+signal IO_PAD806
+signal IO_PAD807
+signal IO_PAD808
+signal IO_PAD809
+signal IO_PAD811
+signal IO_PAD813
+signal IO_PAD815
+signal IO_PAD817
+signal IO_PAD818
+signal IO_PAD819
+signal IO_PAD821
+signal IO_PAD822
+signal IO_PAD823
+signal IO_PAD825
+signal IO_PAD827
+signal IO_PAD828
+signal IO_PAD829
+signal IO_PAD830
+signal IO_PAD831
+signal IO_PAD832
+signal IO_PAD833
+signal IO_PAD835
+signal IO_PAD837
+signal IO_PAD838
+signal IO_PAD839
+signal IO_PAD840
+signal IO_PAD841
+signal IO_PAD843
+signal IO_PAD845
+signal IO_PAD847
+signal IO_PAD849
+signal IO_PAD850
+signal IO_PAD851
+signal IO_PAD853
+signal IO_PAD854
+signal IO_PAD855
+signal IO_PAD857
+signal IO_PAD859
+signal IO_PAD860
+
+register BSR 1931
+register BR 1
+register DIR 32
+
+instruction length 6
+
+instruction EXTEST 000000 BSR
+instruction SAMPLE/PRELOAD 000001 BSR
+instruction IDCODE 001001 DIR
+instruction BYPASS 111111 BR
+
+bit 1930 I 1 IO_PAD747
+bit 1929 O 1 IO_PAD747 1928 1 Z
+bit 1928 C 1 *
+bit 1927 I 1 IO_PAD746
+bit 1926 O 1 IO_PAD746 1925 1 Z
+bit 1925 C 1 *
+bit 1924 I 1 IO_PAD745
+bit 1923 O 1 IO_PAD745 1922 1 Z
+bit 1922 C 1 *
+bit 1921 I 1 IO_PAD743
+bit 1920 O 1 IO_PAD743 1919 1 Z
+bit 1919 C 1 *
+bit 1918 I 1 IO_PAD742
+bit 1917 O 1 IO_PAD742 1916 1 Z
+bit 1916 C 1 *
+bit 1915 I 1 IO_PAD741
+bit 1914 O 1 IO_PAD741 1913 1 Z
+bit 1913 C 1 *
+bit 1912 I 1 IO_PAD740
+bit 1911 O 1 IO_PAD740 1910 1 Z
+bit 1910 C 1 *
+bit 1909 I 1 IO_PAD739
+bit 1908 O 1 IO_PAD739 1907 1 Z
+bit 1907 C 1 *
+bit 1906 I 1 IO_PAD737
+bit 1905 O 1 IO_PAD737 1904 1 Z
+bit 1904 C 1 *
+bit 1903 I 1 IO_PAD735
+bit 1902 O 1 IO_PAD735 1901 1 Z
+bit 1901 C 1 *
+bit 1900 I 1 IO_PAD734
+bit 1899 O 1 IO_PAD734 1898 1 Z
+bit 1898 C 1 *
+bit 1897 I 1 IO_PAD733
+bit 1896 O 1 IO_PAD733 1895 1 Z
+bit 1895 C 1 *
+bit 1894 I 1 IO_PAD732
+bit 1893 O 1 IO_PAD732 1892 1 Z
+bit 1892 C 1 *
+bit 1891 I 1 IO_PAD731
+bit 1890 O 1 IO_PAD731 1889 1 Z
+bit 1889 C 1 *
+bit 1888 I 1 IO_PAD729
+bit 1887 O 1 IO_PAD729 1886 1 Z
+bit 1886 C 1 *
+bit 1885 I 1 IO_PAD727
+bit 1884 O 1 IO_PAD727 1883 1 Z
+bit 1883 C 1 *
+bit 1882 I 1 IO_PAD725
+bit 1881 O 1 IO_PAD725 1880 1 Z
+bit 1880 C 1 *
+bit 1879 I 1 IO_PAD723
+bit 1878 O 1 IO_PAD723 1877 1 Z
+bit 1877 C 1 *
+bit 1876 I 1 IO_PAD722
+bit 1875 O 1 IO_PAD722 1874 1 Z
+bit 1874 C 1 *
+bit 1873 I 1 IO_PAD721
+bit 1872 O 1 IO_PAD721 1871 1 Z
+bit 1871 C 1 *
+bit 1870 I 1 IO_PAD719
+bit 1869 O 1 IO_PAD719 1868 1 Z
+bit 1868 C 1 *
+bit 1867 I 1 IO_PAD717
+bit 1866 O 1 IO_PAD717 1865 1 Z
+bit 1865 C 1 *
+bit 1864 I 1 IO_PAD716
+bit 1863 O 1 IO_PAD716 1862 1 Z
+bit 1862 C 1 *
+bit 1861 I 1 IO_PAD715
+bit 1860 O 1 IO_PAD715 1859 1 Z
+bit 1859 C 1 *
+bit 1858 I 1 IO_PAD714
+bit 1857 O 1 IO_PAD714 1856 1 Z
+bit 1856 C 1 *
+bit 1855 I 1 IO_PAD713
+bit 1854 O 1 IO_PAD713 1853 1 Z
+bit 1853 C 1 *
+bit 1852 I 1 IO_PAD711
+bit 1851 O 1 IO_PAD711 1850 1 Z
+bit 1850 C 1 *
+bit 1849 I 1 IO_PAD710
+bit 1848 O 1 IO_PAD710 1847 1 Z
+bit 1847 C 1 *
+bit 1846 I 1 IO_PAD709
+bit 1845 O 1 IO_PAD709 1844 1 Z
+bit 1844 C 1 *
+bit 1843 I 1 IO_PAD708
+bit 1842 O 1 IO_PAD708 1841 1 Z
+bit 1841 C 1 *
+bit 1840 I 1 IO_PAD707
+bit 1839 O 1 IO_PAD707 1838 1 Z
+bit 1838 C 1 *
+bit 1837 I 1 IO_PAD705
+bit 1836 O 1 IO_PAD705 1835 1 Z
+bit 1835 C 1 *
+bit 1834 I 1 IO_PAD704
+bit 1833 O 1 IO_PAD704 1832 1 Z
+bit 1832 C 1 *
+bit 1831 I 1 IO_PAD703
+bit 1830 O 1 IO_PAD703 1829 1 Z
+bit 1829 C 1 *
+bit 1828 O 1 *
+bit 1827 O 1 *
+bit 1826 O 1 *
+bit 1825 O 1 *
+bit 1824 O 1 *
+bit 1823 O 1 *
+bit 1822 I 1 IO_PAD701
+bit 1821 O 1 IO_PAD701 1820 1 Z
+bit 1820 C 1 *
+bit 1819 I 1 IO_PAD699
+bit 1818 O 1 IO_PAD699 1817 1 Z
+bit 1817 C 1 *
+bit 1816 I 1 IO_PAD698
+bit 1815 O 1 IO_PAD698 1814 1 Z
+bit 1814 C 1 *
+bit 1813 I 1 IO_PAD697
+bit 1812 O 1 IO_PAD697 1811 1 Z
+bit 1811 C 1 *
+bit 1810 I 1 IO_PAD696
+bit 1809 O 1 IO_PAD696 1808 1 Z
+bit 1808 C 1 *
+bit 1807 I 1 IO_PAD695
+bit 1806 O 1 IO_PAD695 1805 1 Z
+bit 1805 C 1 *
+bit 1804 I 1 IO_PAD693
+bit 1803 O 1 IO_PAD693 1802 1 Z
+bit 1802 C 1 *
+bit 1801 I 1 IO_PAD691
+bit 1800 O 1 IO_PAD691 1799 1 Z
+bit 1799 C 1 *
+bit 1798 I 1 IO_PAD689
+bit 1797 O 1 IO_PAD689 1796 1 Z
+bit 1796 C 1 *
+bit 1795 I 1 IO_PAD687
+bit 1794 O 1 IO_PAD687 1793 1 Z
+bit 1793 C 1 *
+bit 1792 I 1 IO_PAD686
+bit 1791 O 1 IO_PAD686 1790 1 Z
+bit 1790 C 1 *
+bit 1789 I 1 IO_PAD685
+bit 1788 O 1 IO_PAD685 1787 1 Z
+bit 1787 C 1 *
+bit 1786 O 1 *
+bit 1785 O 1 *
+bit 1784 O 1 *
+bit 1783 O 1 *
+bit 1782 O 1 *
+bit 1781 O 1 *
+bit 1780 I 1 IO_PAD683
+bit 1779 O 1 IO_PAD683 1778 1 Z
+bit 1778 C 1 *
+bit 1777 I 1 IO_PAD681
+bit 1776 O 1 IO_PAD681 1775 1 Z
+bit 1775 C 1 *
+bit 1774 I 1 IO_PAD680
+bit 1773 O 1 IO_PAD680 1772 1 Z
+bit 1772 C 1 *
+bit 1771 I 1 IO_PAD679
+bit 1770 O 1 IO_PAD679 1769 1 Z
+bit 1769 C 1 *
+bit 1768 I 1 IO_PAD678
+bit 1767 O 1 IO_PAD678 1766 1 Z
+bit 1766 C 1 *
+bit 1765 I 1 IO_PAD677
+bit 1764 O 1 IO_PAD677 1763 1 Z
+bit 1763 C 1 *
+bit 1762 I 1 IO_PAD676
+bit 1761 O 1 IO_PAD676 1760 1 Z
+bit 1760 C 1 *
+bit 1759 I 1 IO_PAD675
+bit 1758 O 1 IO_PAD675 1757 1 Z
+bit 1757 C 1 *
+bit 1756 O 1 *
+bit 1755 O 1 *
+bit 1754 O 1 *
+bit 1753 O 1 *
+bit 1752 O 1 *
+bit 1751 O 1 *
+bit 1750 I 1 IO_PAD673
+bit 1749 O 1 IO_PAD673 1748 1 Z
+bit 1748 C 1 *
+bit 1747 I 1 IO_PAD671
+bit 1746 O 1 IO_PAD671 1745 1 Z
+bit 1745 C 1 *
+bit 1744 I 1 IO_PAD670
+bit 1743 O 1 IO_PAD670 1742 1 Z
+bit 1742 C 1 *
+bit 1741 I 1 IO_PAD669
+bit 1740 O 1 IO_PAD669 1739 1 Z
+bit 1739 C 1 *
+bit 1738 I 1 IO_PAD668
+bit 1737 O 1 IO_PAD668 1736 1 Z
+bit 1736 C 1 *
+bit 1735 I 1 IO_PAD667
+bit 1734 O 1 IO_PAD667 1733 1 Z
+bit 1733 C 1 *
+bit 1732 I 1 IO_PAD665
+bit 1731 O 1 IO_PAD665 1730 1 Z
+bit 1730 C 1 *
+bit 1729 I 1 IO_PAD663
+bit 1728 O 1 IO_PAD663 1727 1 Z
+bit 1727 C 1 *
+bit 1726 I 1 IO_PAD661
+bit 1725 O 1 IO_PAD661 1724 1 Z
+bit 1724 C 1 *
+bit 1723 I 1 IO_PAD659
+bit 1722 O 1 IO_PAD659 1721 1 Z
+bit 1721 C 1 *
+bit 1720 O 1 *
+bit 1719 O 1 *
+bit 1718 O 1 *
+bit 1717 O 1 *
+bit 1716 O 1 *
+bit 1715 O 1 *
+bit 1714 I 1 IO_PAD658
+bit 1713 O 1 IO_PAD658 1712 1 Z
+bit 1712 C 1 *
+bit 1711 I 1 IO_PAD657
+bit 1710 O 1 IO_PAD657 1709 1 Z
+bit 1709 C 1 *
+bit 1708 I 1 IO_PAD655
+bit 1707 O 1 IO_PAD655 1706 1 Z
+bit 1706 C 1 *
+bit 1705 I 1 IO_PAD654
+bit 1704 O 1 IO_PAD654 1703 1 Z
+bit 1703 C 1 *
+bit 1702 I 1 IO_PAD653
+bit 1701 O 1 IO_PAD653 1700 1 Z
+bit 1700 C 1 *
+bit 1699 I 1 IO_PAD651
+bit 1698 O 1 IO_PAD651 1697 1 Z
+bit 1697 C 1 *
+bit 1696 I 1 IO_PAD649
+bit 1695 O 1 IO_PAD649 1694 1 Z
+bit 1694 C 1 *
+bit 1693 I 1 IO_PAD648
+bit 1692 O 1 IO_PAD648 1691 1 Z
+bit 1691 C 1 *
+bit 1690 I 1 IO_PAD646
+bit 1689 O 1 IO_PAD646 1688 1 Z
+bit 1688 C 1 *
+bit 1687 I 1 IO_PAD645
+bit 1686 O 1 IO_PAD645 1685 1 Z
+bit 1685 C 1 *
+bit 1684 I 1 IO_PAD643
+bit 1683 O 1 IO_PAD643 1682 1 Z
+bit 1682 C 1 *
+bit 1681 I 1 IO_PAD641
+bit 1680 O 1 IO_PAD641 1679 1 Z
+bit 1679 C 1 *
+bit 1678 I 1 IO_PAD640
+bit 1677 O 1 IO_PAD640 1676 1 Z
+bit 1676 C 1 *
+bit 1675 I 1 IO_PAD639
+bit 1674 O 1 IO_PAD639 1673 1 Z
+bit 1673 C 1 *
+bit 1672 I 1 IO_PAD637
+bit 1671 O 1 IO_PAD637 1670 1 Z
+bit 1670 C 1 *
+bit 1669 I 1 IO_PAD636
+bit 1668 O 1 IO_PAD636 1667 1 Z
+bit 1667 C 1 *
+bit 1666 O 1 *
+bit 1665 O 1 *
+bit 1664 O 1 *
+bit 1663 O 1 *
+bit 1662 O 1 *
+bit 1661 O 1 *
+bit 1660 I 1 IO_PAD635
+bit 1659 O 1 IO_PAD635 1658 1 Z
+bit 1658 C 1 *
+bit 1657 I 1 IO_PAD633
+bit 1656 O 1 IO_PAD633 1655 1 Z
+bit 1655 C 1 *
+bit 1654 I 1 IO_PAD631
+bit 1653 O 1 IO_PAD631 1652 1 Z
+bit 1652 C 1 *
+bit 1651 I 1 IO_PAD629
+bit 1650 O 1 IO_PAD629 1649 1 Z
+bit 1649 C 1 *
+bit 1648 I 1 IO_PAD627
+bit 1647 O 1 IO_PAD627 1646 1 Z
+bit 1646 C 1 *
+bit 1645 I 1 IO_PAD626
+bit 1644 O 1 IO_PAD626 1643 1 Z
+bit 1643 C 1 *
+bit 1642 I 1 IO_PAD625
+bit 1641 O 1 IO_PAD625 1640 1 Z
+bit 1640 C 1 *
+bit 1639 I 1 IO_PAD624
+bit 1638 O 1 IO_PAD624 1637 1 Z
+bit 1637 C 1 *
+bit 1636 I 1 IO_PAD623
+bit 1635 O 1 IO_PAD623 1634 1 Z
+bit 1634 C 1 *
+bit 1633 I 1 IO_PAD621
+bit 1632 O 1 IO_PAD621 1631 1 Z
+bit 1631 C 1 *
+bit 1630 O 1 *
+bit 1629 O 1 *
+bit 1628 O 1 *
+bit 1627 O 1 *
+bit 1626 O 1 *
+bit 1625 O 1 *
+bit 1624 I 1 IO_PAD619
+bit 1623 O 1 IO_PAD619 1622 1 Z
+bit 1622 C 1 *
+bit 1621 I 1 IO_PAD618
+bit 1620 O 1 IO_PAD618 1619 1 Z
+bit 1619 C 1 *
+bit 1618 I 1 IO_PAD617
+bit 1617 O 1 IO_PAD617 1616 1 Z
+bit 1616 C 1 *
+bit 1615 I 1 IO_PAD616
+bit 1614 O 1 IO_PAD616 1613 1 Z
+bit 1613 C 1 *
+bit 1612 I 1 IO_PAD615
+bit 1611 O 1 IO_PAD615 1610 1 Z
+bit 1610 C 1 *
+bit 1609 I 1 IO_PAD614
+bit 1608 O 1 IO_PAD614 1607 1 Z
+bit 1607 C 1 *
+bit 1606 I 1 IO_PAD613
+bit 1605 O 1 IO_PAD613 1604 1 Z
+bit 1604 C 1 *
+bit 1603 I 1 IO_PAD611
+bit 1602 O 1 IO_PAD611 1601 1 Z
+bit 1601 C 1 *
+bit 1600 O 1 *
+bit 1599 O 1 *
+bit 1598 O 1 *
+bit 1597 O 1 *
+bit 1596 O 1 *
+bit 1595 O 1 *
+bit 1594 I 1 IO_PAD609
+bit 1593 O 1 IO_PAD609 1592 1 Z
+bit 1592 C 1 *
+bit 1591 I 1 IO_PAD608
+bit 1590 O 1 IO_PAD608 1589 1 Z
+bit 1589 C 1 *
+bit 1588 I 1 IO_PAD607
+bit 1587 O 1 IO_PAD607 1586 1 Z
+bit 1586 C 1 *
+bit 1585 I 1 IO_PAD605
+bit 1584 O 1 IO_PAD605 1583 1 Z
+bit 1583 C 1 *
+bit 1582 I 1 IO_PAD603
+bit 1581 O 1 IO_PAD603 1580 1 Z
+bit 1580 C 1 *
+bit 1579 I 1 IO_PAD601
+bit 1578 O 1 IO_PAD601 1577 1 Z
+bit 1577 C 1 *
+bit 1576 I 1 IO_PAD599
+bit 1575 O 1 IO_PAD599 1574 1 Z
+bit 1574 C 1 *
+bit 1573 I 1 IO_PAD598
+bit 1572 O 1 IO_PAD598 1571 1 Z
+bit 1571 C 1 *
+bit 1570 I 1 IO_PAD597
+bit 1569 O 1 IO_PAD597 1568 1 Z
+bit 1568 C 1 *
+bit 1567 I 1 IO_PAD596
+bit 1566 O 1 IO_PAD596 1565 1 Z
+bit 1565 C 1 *
+bit 1564 I 1 IO_PAD595
+bit 1563 O 1 IO_PAD595 1562 1 Z
+bit 1562 C 1 *
+bit 1561 I 1 IO_PAD593
+bit 1560 O 1 IO_PAD593 1559 1 Z
+bit 1559 C 1 *
+bit 1558 O 1 *
+bit 1557 O 1 *
+bit 1556 O 1 *
+bit 1555 O 1 *
+bit 1554 O 1 *
+bit 1553 O 1 *
+bit 1552 I 1 IO_PAD591
+bit 1551 O 1 IO_PAD591 1550 1 Z
+bit 1550 C 1 *
+bit 1549 I 1 IO_PAD590
+bit 1548 O 1 IO_PAD590 1547 1 Z
+bit 1547 C 1 *
+bit 1546 I 1 IO_PAD589
+bit 1545 O 1 IO_PAD589 1544 1 Z
+bit 1544 C 1 *
+bit 1543 I 1 IO_PAD587
+bit 1542 O 1 IO_PAD587 1541 1 Z
+bit 1541 C 1 *
+bit 1540 I 1 IO_PAD586
+bit 1539 O 1 IO_PAD586 1538 1 Z
+bit 1538 C 1 *
+bit 1537 I 1 IO_PAD585
+bit 1536 O 1 IO_PAD585 1535 1 Z
+bit 1535 C 1 *
+bit 1534 I 1 IO_PAD584
+bit 1533 O 1 IO_PAD584 1532 1 Z
+bit 1532 C 1 *
+bit 1531 I 1 IO_PAD583
+bit 1530 O 1 IO_PAD583 1529 1 Z
+bit 1529 C 1 *
+bit 1528 I 1 IO_PAD581
+bit 1527 O 1 IO_PAD581 1526 1 Z
+bit 1526 C 1 *
+bit 1525 I 1 IO_PAD580
+bit 1524 O 1 IO_PAD580 1523 1 Z
+bit 1523 C 1 *
+bit 1522 I 1 IO_PAD579
+bit 1521 O 1 IO_PAD579 1520 1 Z
+bit 1520 C 1 *
+bit 1519 I 1 IO_PAD578
+bit 1518 O 1 IO_PAD578 1517 1 Z
+bit 1517 C 1 *
+bit 1516 I 1 IO_PAD577
+bit 1515 O 1 IO_PAD577 1514 1 Z
+bit 1514 C 1 *
+bit 1513 I 1 IO_PAD575
+bit 1512 O 1 IO_PAD575 1511 1 Z
+bit 1511 C 1 *
+bit 1510 I 1 IO_PAD573
+bit 1509 O 1 IO_PAD573 1508 1 Z
+bit 1508 C 1 *
+bit 1507 I 1 IO_PAD572
+bit 1506 O 1 IO_PAD572 1505 1 Z
+bit 1505 C 1 *
+bit 1504 I 1 IO_PAD571
+bit 1503 O 1 IO_PAD571 1502 1 Z
+bit 1502 C 1 *
+bit 1501 I 1 IO_PAD569
+bit 1500 O 1 IO_PAD569 1499 1 Z
+bit 1499 C 1 *
+bit 1498 I 1 IO_PAD567
+bit 1497 O 1 IO_PAD567 1496 1 Z
+bit 1496 C 1 *
+bit 1495 I 1 IO_PAD565
+bit 1494 O 1 IO_PAD565 1493 1 Z
+bit 1493 C 1 *
+bit 1492 I 1 IO_PAD563
+bit 1491 O 1 IO_PAD563 1490 1 Z
+bit 1490 C 1 *
+bit 1489 I 1 IO_PAD562
+bit 1488 O 1 IO_PAD562 1487 1 Z
+bit 1487 C 1 *
+bit 1486 I 1 IO_PAD561
+bit 1485 O 1 IO_PAD561 1484 1 Z
+bit 1484 C 1 *
+bit 1483 I 1 IO_PAD560
+bit 1482 O 1 IO_PAD560 1481 1 Z
+bit 1481 C 1 *
+bit 1480 I 1 IO_PAD559
+bit 1479 O 1 IO_PAD559 1478 1 Z
+bit 1478 C 1 *
+bit 1477 I 1 IO_PAD557
+bit 1476 O 1 IO_PAD557 1475 1 Z
+bit 1475 C 1 *
+bit 1474 I 1 IO_PAD555
+bit 1473 O 1 IO_PAD555 1472 1 Z
+bit 1472 C 1 *
+bit 1471 I 1 IO_PAD554
+bit 1470 O 1 IO_PAD554 1469 1 Z
+bit 1469 C 1 *
+bit 1468 I 1 IO_PAD553
+bit 1467 O 1 IO_PAD553 1466 1 Z
+bit 1466 C 1 *
+bit 1465 I 1 IO_PAD552
+bit 1464 O 1 IO_PAD552 1463 1 Z
+bit 1463 C 1 *
+bit 1462 I 1 IO_PAD551
+bit 1461 O 1 IO_PAD551 1460 1 Z
+bit 1460 C 1 *
+bit 1459 I 1 IO_PAD549
+bit 1458 O 1 IO_PAD549 1457 1 Z
+bit 1457 C 1 *
+bit 1456 I 1 IO_PAD548
+bit 1455 O 1 IO_PAD548 1454 1 Z
+bit 1454 C 1 *
+bit 1453 I 1 IO_PAD547
+bit 1452 O 1 IO_PAD547 1451 1 Z
+bit 1451 C 1 *
+bit 1450 I 1 CCLK_PAD544
+bit 1449 O 1 CCLK_PAD544 1448 1 Z
+bit 1448 C 1 *
+bit 1447 I 1 DONE_PAD543
+bit 1446 O 1 DONE_PAD543 1445 1 Z
+bit 1445 C 1 *
+bit 1444 I 1 IO_PAD541
+bit 1443 O 1 IO_PAD541 1442 1 Z
+bit 1442 C 1 *
+bit 1441 I 1 IO_PAD540
+bit 1440 O 1 IO_PAD540 1439 1 Z
+bit 1439 C 1 *
+bit 1438 I 1 IO_PAD539
+bit 1437 O 1 IO_PAD539 1436 1 Z
+bit 1436 C 1 *
+bit 1435 I 1 IO_PAD538
+bit 1434 O 1 IO_PAD538 1433 1 Z
+bit 1433 C 1 *
+bit 1432 I 1 IO_PAD536
+bit 1431 O 1 IO_PAD536 1430 1 Z
+bit 1430 C 1 *
+bit 1429 I 1 IO_PAD535
+bit 1428 O 1 IO_PAD535 1427 1 Z
+bit 1427 C 1 *
+bit 1426 I 1 IO_PAD534
+bit 1425 O 1 IO_PAD534 1424 1 Z
+bit 1424 C 1 *
+bit 1423 I 1 IO_PAD532
+bit 1422 O 1 IO_PAD532 1421 1 Z
+bit 1421 C 1 *
+bit 1420 I 1 IO_PAD531
+bit 1419 O 1 IO_PAD531 1418 1 Z
+bit 1418 C 1 *
+bit 1417 I 1 IO_PAD530
+bit 1416 O 1 IO_PAD530 1415 1 Z
+bit 1415 C 1 *
+bit 1414 I 1 IO_PAD528
+bit 1413 O 1 IO_PAD528 1412 1 Z
+bit 1412 C 1 *
+bit 1411 I 1 IO_PAD527
+bit 1410 O 1 IO_PAD527 1409 1 Z
+bit 1409 C 1 *
+bit 1408 I 1 IO_PAD526
+bit 1407 O 1 IO_PAD526 1406 1 Z
+bit 1406 C 1 *
+bit 1405 I 1 IO_PAD525
+bit 1404 O 1 IO_PAD525 1403 1 Z
+bit 1403 C 1 *
+bit 1402 I 1 IO_PAD524
+bit 1401 O 1 IO_PAD524 1400 1 Z
+bit 1400 C 1 *
+bit 1399 I 1 IO_PAD522
+bit 1398 O 1 IO_PAD522 1397 1 Z
+bit 1397 C 1 *
+bit 1396 I 1 IO_PAD520
+bit 1395 O 1 IO_PAD520 1394 1 Z
+bit 1394 C 1 *
+bit 1393 I 1 IO_PAD519
+bit 1392 O 1 IO_PAD519 1391 1 Z
+bit 1391 C 1 *
+bit 1390 I 1 IO_PAD518
+bit 1389 O 1 IO_PAD518 1388 1 Z
+bit 1388 C 1 *
+bit 1387 I 1 IO_PAD517
+bit 1386 O 1 IO_PAD517 1385 1 Z
+bit 1385 C 1 *
+bit 1384 I 1 IO_PAD516
+bit 1383 O 1 IO_PAD516 1382 1 Z
+bit 1382 C 1 *
+bit 1381 I 1 IO_PAD514
+bit 1380 O 1 IO_PAD514 1379 1 Z
+bit 1379 C 1 *
+bit 1378 I 1 IO_PAD512
+bit 1377 O 1 IO_PAD512 1376 1 Z
+bit 1376 C 1 *
+bit 1375 I 1 IO_PAD510
+bit 1374 O 1 IO_PAD510 1373 1 Z
+bit 1373 C 1 *
+bit 1372 I 1 IO_PAD508
+bit 1371 O 1 IO_PAD508 1370 1 Z
+bit 1370 C 1 *
+bit 1369 I 1 IO_PAD507
+bit 1368 O 1 IO_PAD507 1367 1 Z
+bit 1367 C 1 *
+bit 1366 I 1 IO_PAD506
+bit 1365 O 1 IO_PAD506 1364 1 Z
+bit 1364 C 1 *
+bit 1363 I 1 IO_PAD504
+bit 1362 O 1 IO_PAD504 1361 1 Z
+bit 1361 C 1 *
+bit 1360 I 1 IO_PAD503
+bit 1359 O 1 IO_PAD503 1358 1 Z
+bit 1358 C 1 *
+bit 1357 I 1 IO_PAD502
+bit 1356 O 1 IO_PAD502 1355 1 Z
+bit 1355 C 1 *
+bit 1354 I 1 IO_PAD500
+bit 1353 O 1 IO_PAD500 1352 1 Z
+bit 1352 C 1 *
+bit 1351 I 1 IO_PAD499
+bit 1350 O 1 IO_PAD499 1349 1 Z
+bit 1349 C 1 *
+bit 1348 I 1 IO_PAD498
+bit 1347 O 1 IO_PAD498 1346 1 Z
+bit 1346 C 1 *
+bit 1345 I 1 IO_PAD497
+bit 1344 O 1 IO_PAD497 1343 1 Z
+bit 1343 C 1 *
+bit 1342 I 1 IO_PAD496
+bit 1341 O 1 IO_PAD496 1340 1 Z
+bit 1340 C 1 *
+bit 1339 I 1 IO_PAD494
+bit 1338 O 1 IO_PAD494 1337 1 Z
+bit 1337 C 1 *
+bit 1336 I 1 IO_PAD493
+bit 1335 O 1 IO_PAD493 1334 1 Z
+bit 1334 C 1 *
+bit 1333 I 1 IO_PAD492
+bit 1332 O 1 IO_PAD492 1331 1 Z
+bit 1331 C 1 *
+bit 1330 I 1 IO_PAD490
+bit 1329 O 1 IO_PAD490 1328 1 Z
+bit 1328 C 1 *
+bit 1327 I 1 IO_PAD488
+bit 1326 O 1 IO_PAD488 1325 1 Z
+bit 1325 C 1 *
+bit 1324 I 1 IO_PAD487
+bit 1323 O 1 IO_PAD487 1322 1 Z
+bit 1322 C 1 *
+bit 1321 I 1 IO_PAD486
+bit 1320 O 1 IO_PAD486 1319 1 Z
+bit 1319 C 1 *
+bit 1318 I 1 IO_PAD485
+bit 1317 O 1 IO_PAD485 1316 1 Z
+bit 1316 C 1 *
+bit 1315 I 1 IO_PAD484
+bit 1314 O 1 IO_PAD484 1313 1 Z
+bit 1313 C 1 *
+bit 1312 I 1 IO_PAD482
+bit 1311 O 1 IO_PAD482 1310 1 Z
+bit 1310 C 1 *
+bit 1309 I 1 IO_PAD480
+bit 1308 O 1 IO_PAD480 1307 1 Z
+bit 1307 C 1 *
+bit 1306 I 1 IO_PAD478
+bit 1305 O 1 IO_PAD478 1304 1 Z
+bit 1304 C 1 *
+bit 1303 I 1 IO_PAD476
+bit 1302 O 1 IO_PAD476 1301 1 Z
+bit 1301 C 1 *
+bit 1300 I 1 IO_PAD475
+bit 1299 O 1 IO_PAD475 1298 1 Z
+bit 1298 C 1 *
+bit 1297 I 1 IO_PAD474
+bit 1296 O 1 IO_PAD474 1295 1 Z
+bit 1295 C 1 *
+bit 1294 I 1 IO_PAD472
+bit 1293 O 1 IO_PAD472 1292 1 Z
+bit 1292 C 1 *
+bit 1291 I 1 IO_PAD471
+bit 1290 O 1 IO_PAD471 1289 1 Z
+bit 1289 C 1 *
+bit 1288 I 1 IO_PAD470
+bit 1287 O 1 IO_PAD470 1286 1 Z
+bit 1286 C 1 *
+bit 1285 I 1 IO_PAD468
+bit 1284 O 1 IO_PAD468 1283 1 Z
+bit 1283 C 1 *
+bit 1282 I 1 IO_PAD466
+bit 1281 O 1 IO_PAD466 1280 1 Z
+bit 1280 C 1 *
+bit 1279 I 1 IO_PAD465
+bit 1278 O 1 IO_PAD465 1277 1 Z
+bit 1277 C 1 *
+bit 1276 I 1 IO_PAD464
+bit 1275 O 1 IO_PAD464 1274 1 Z
+bit 1274 C 1 *
+bit 1273 I 1 IO_PAD463
+bit 1272 O 1 IO_PAD463 1271 1 Z
+bit 1271 C 1 *
+bit 1270 I 1 IO_PAD462
+bit 1269 O 1 IO_PAD462 1268 1 Z
+bit 1268 C 1 *
+bit 1267 I 1 IO_PAD461
+bit 1266 O 1 IO_PAD461 1265 1 Z
+bit 1265 C 1 *
+bit 1264 I 1 IO_PAD460
+bit 1263 O 1 IO_PAD460 1262 1 Z
+bit 1262 C 1 *
+bit 1261 I 1 IO_PAD458
+bit 1260 O 1 IO_PAD458 1259 1 Z
+bit 1259 C 1 *
+bit 1258 I 1 IO_PAD456
+bit 1257 O 1 IO_PAD456 1256 1 Z
+bit 1256 C 1 *
+bit 1255 I 1 IO_PAD455
+bit 1254 O 1 IO_PAD455 1253 1 Z
+bit 1253 C 1 *
+bit 1252 I 1 IO_PAD454
+bit 1251 O 1 IO_PAD454 1250 1 Z
+bit 1250 C 1 *
+bit 1249 I 1 IO_PAD453
+bit 1248 O 1 IO_PAD453 1247 1 Z
+bit 1247 C 1 *
+bit 1246 I 1 IO_PAD452
+bit 1245 O 1 IO_PAD452 1244 1 Z
+bit 1244 C 1 *
+bit 1243 I 1 IO_PAD450
+bit 1242 O 1 IO_PAD450 1241 1 Z
+bit 1241 C 1 *
+bit 1240 I 1 IO_PAD448
+bit 1239 O 1 IO_PAD448 1238 1 Z
+bit 1238 C 1 *
+bit 1237 I 1 IO_PAD446
+bit 1236 O 1 IO_PAD446 1235 1 Z
+bit 1235 C 1 *
+bit 1234 I 1 IO_PAD444
+bit 1233 O 1 IO_PAD444 1232 1 Z
+bit 1232 C 1 *
+bit 1231 I 1 IO_PAD443
+bit 1230 O 1 IO_PAD443 1229 1 Z
+bit 1229 C 1 *
+bit 1228 I 1 IO_PAD442
+bit 1227 O 1 IO_PAD442 1226 1 Z
+bit 1226 C 1 *
+bit 1225 I 1 IO_PAD440
+bit 1224 O 1 IO_PAD440 1223 1 Z
+bit 1223 C 1 *
+bit 1222 I 1 IO_PAD439
+bit 1221 O 1 IO_PAD439 1220 1 Z
+bit 1220 C 1 *
+bit 1219 I 1 IO_PAD438
+bit 1218 O 1 IO_PAD438 1217 1 Z
+bit 1217 C 1 *
+bit 1216 I 1 IO_PAD436
+bit 1215 O 1 IO_PAD436 1214 1 Z
+bit 1214 C 1 *
+bit 1213 I 1 IO_PAD434
+bit 1212 O 1 IO_PAD434 1211 1 Z
+bit 1211 C 1 *
+bit 1210 I 1 IO_PAD433
+bit 1209 O 1 IO_PAD433 1208 1 Z
+bit 1208 C 1 *
+bit 1207 I 1 IO_PAD432
+bit 1206 O 1 IO_PAD432 1205 1 Z
+bit 1205 C 1 *
+bit 1204 I 1 IO_PAD430
+bit 1203 O 1 IO_PAD430 1202 1 Z
+bit 1202 C 1 *
+bit 1201 I 1 IO_PAD429
+bit 1200 O 1 IO_PAD429 1199 1 Z
+bit 1199 C 1 *
+bit 1198 I 1 IO_PAD428
+bit 1197 O 1 IO_PAD428 1196 1 Z
+bit 1196 C 1 *
+bit 1195 I 1 IO_PAD426
+bit 1194 O 1 IO_PAD426 1193 1 Z
+bit 1193 C 1 *
+bit 1192 I 1 IO_PAD424
+bit 1191 O 1 IO_PAD424 1190 1 Z
+bit 1190 C 1 *
+bit 1189 I 1 IO_PAD423
+bit 1188 O 1 IO_PAD423 1187 1 Z
+bit 1187 C 1 *
+bit 1186 I 1 IO_PAD422
+bit 1185 O 1 IO_PAD422 1184 1 Z
+bit 1184 C 1 *
+bit 1183 I 1 IO_PAD420
+bit 1182 O 1 IO_PAD420 1181 1 Z
+bit 1181 C 1 *
+bit 1180 I 1 IO_PAD419
+bit 1179 O 1 IO_PAD419 1178 1 Z
+bit 1178 C 1 *
+bit 1177 I 1 IO_PAD418
+bit 1176 O 1 IO_PAD418 1175 1 Z
+bit 1175 C 1 *
+bit 1174 I 1 IO_PAD416
+bit 1173 O 1 IO_PAD416 1172 1 Z
+bit 1172 C 1 *
+bit 1171 I 1 IO_PAD414
+bit 1170 O 1 IO_PAD414 1169 1 Z
+bit 1169 C 1 *
+bit 1168 I 1 IO_PAD412
+bit 1167 O 1 IO_PAD412 1166 1 Z
+bit 1166 C 1 *
+bit 1165 I 1 IO_PAD410
+bit 1164 O 1 IO_PAD410 1163 1 Z
+bit 1163 C 1 *
+bit 1162 I 1 IO_PAD409
+bit 1161 O 1 IO_PAD409 1160 1 Z
+bit 1160 C 1 *
+bit 1159 I 1 IO_PAD408
+bit 1158 O 1 IO_PAD408 1157 1 Z
+bit 1157 C 1 *
+bit 1156 I 1 IO_PAD407
+bit 1155 O 1 IO_PAD407 1154 1 Z
+bit 1154 C 1 *
+bit 1153 I 1 IO_PAD406
+bit 1152 O 1 IO_PAD406 1151 1 Z
+bit 1151 C 1 *
+bit 1150 I 1 IO_PAD404
+bit 1149 O 1 IO_PAD404 1148 1 Z
+bit 1148 C 1 *
+bit 1147 I 1 IO_PAD402
+bit 1146 O 1 IO_PAD402 1145 1 Z
+bit 1145 C 1 *
+bit 1144 I 1 IO_PAD401
+bit 1143 O 1 IO_PAD401 1142 1 Z
+bit 1142 C 1 *
+bit 1141 I 1 IO_PAD400
+bit 1140 O 1 IO_PAD400 1139 1 Z
+bit 1139 C 1 *
+bit 1138 I 1 IO_PAD399
+bit 1137 O 1 IO_PAD399 1136 1 Z
+bit 1136 C 1 *
+bit 1135 I 1 IO_PAD398
+bit 1134 O 1 IO_PAD398 1133 1 Z
+bit 1133 C 1 *
+bit 1132 I 1 IO_PAD397
+bit 1131 O 1 IO_PAD397 1130 1 Z
+bit 1130 C 1 *
+bit 1129 I 1 IO_PAD396
+bit 1128 O 1 IO_PAD396 1127 1 Z
+bit 1127 C 1 *
+bit 1126 I 1 IO_PAD394
+bit 1125 O 1 IO_PAD394 1124 1 Z
+bit 1124 C 1 *
+bit 1123 I 1 IO_PAD392
+bit 1122 O 1 IO_PAD392 1121 1 Z
+bit 1121 C 1 *
+bit 1120 I 1 IO_PAD391
+bit 1119 O 1 IO_PAD391 1118 1 Z
+bit 1118 C 1 *
+bit 1117 I 1 IO_PAD390
+bit 1116 O 1 IO_PAD390 1115 1 Z
+bit 1115 C 1 *
+bit 1114 I 1 IO_PAD388
+bit 1113 O 1 IO_PAD388 1112 1 Z
+bit 1112 C 1 *
+bit 1111 I 1 IO_PAD387
+bit 1110 O 1 IO_PAD387 1109 1 Z
+bit 1109 C 1 *
+bit 1108 I 1 IO_PAD386
+bit 1107 O 1 IO_PAD386 1106 1 Z
+bit 1106 C 1 *
+bit 1105 I 1 IO_PAD384
+bit 1104 O 1 IO_PAD384 1103 1 Z
+bit 1103 C 1 *
+bit 1102 I 1 IO_PAD382
+bit 1101 O 1 IO_PAD382 1100 1 Z
+bit 1100 C 1 *
+bit 1099 I 1 IO_PAD380
+bit 1098 O 1 IO_PAD380 1097 1 Z
+bit 1097 C 1 *
+bit 1096 I 1 IO_PAD378
+bit 1095 O 1 IO_PAD378 1094 1 Z
+bit 1094 C 1 *
+bit 1093 I 1 IO_PAD377
+bit 1092 O 1 IO_PAD377 1091 1 Z
+bit 1091 C 1 *
+bit 1090 I 1 IO_PAD376
+bit 1089 O 1 IO_PAD376 1088 1 Z
+bit 1088 C 1 *
+bit 1087 I 1 IO_PAD375
+bit 1086 O 1 IO_PAD375 1085 1 Z
+bit 1085 C 1 *
+bit 1084 I 1 IO_PAD374
+bit 1083 O 1 IO_PAD374 1082 1 Z
+bit 1082 C 1 *
+bit 1081 I 1 IO_PAD372
+bit 1080 O 1 IO_PAD372 1079 1 Z
+bit 1079 C 1 *
+bit 1078 I 1 IO_PAD370
+bit 1077 O 1 IO_PAD370 1076 1 Z
+bit 1076 C 1 *
+bit 1075 I 1 IO_PAD369
+bit 1074 O 1 IO_PAD369 1073 1 Z
+bit 1073 C 1 *
+bit 1072 I 1 IO_PAD368
+bit 1071 O 1 IO_PAD368 1070 1 Z
+bit 1070 C 1 *
+bit 1069 I 1 IO_PAD366
+bit 1068 O 1 IO_PAD366 1067 1 Z
+bit 1067 C 1 *
+bit 1066 I 1 IO_PAD365
+bit 1065 O 1 IO_PAD365 1064 1 Z
+bit 1064 C 1 *
+bit 1063 I 1 IO_PAD364
+bit 1062 O 1 IO_PAD364 1061 1 Z
+bit 1061 C 1 *
+bit 1060 I 1 IO_PAD363
+bit 1059 O 1 IO_PAD363 1058 1 Z
+bit 1058 C 1 *
+bit 1057 I 1 IO_PAD362
+bit 1056 O 1 IO_PAD362 1055 1 Z
+bit 1055 C 1 *
+bit 1054 I 1 IO_PAD360
+bit 1053 O 1 IO_PAD360 1052 1 Z
+bit 1052 C 1 *
+bit 1051 I 1 IO_PAD359
+bit 1050 O 1 IO_PAD359 1049 1 Z
+bit 1049 C 1 *
+bit 1048 I 1 IO_PAD358
+bit 1047 O 1 IO_PAD358 1046 1 Z
+bit 1046 C 1 *
+bit 1045 I 1 IO_PAD356
+bit 1044 O 1 IO_PAD356 1043 1 Z
+bit 1043 C 1 *
+bit 1042 I 1 IO_PAD355
+bit 1041 O 1 IO_PAD355 1040 1 Z
+bit 1040 C 1 *
+bit 1039 I 1 IO_PAD354
+bit 1038 O 1 IO_PAD354 1037 1 Z
+bit 1037 C 1 *
+bit 1036 I 1 IO_PAD352
+bit 1035 O 1 IO_PAD352 1034 1 Z
+bit 1034 C 1 *
+bit 1033 I 1 IO_PAD350
+bit 1032 O 1 IO_PAD350 1031 1 Z
+bit 1031 C 1 *
+bit 1030 I 1 IO_PAD348
+bit 1029 O 1 IO_PAD348 1028 1 Z
+bit 1028 C 1 *
+bit 1027 I 1 IO_PAD346
+bit 1026 O 1 IO_PAD346 1025 1 Z
+bit 1025 C 1 *
+bit 1024 I 1 IO_PAD345
+bit 1023 O 1 IO_PAD345 1022 1 Z
+bit 1022 C 1 *
+bit 1021 I 1 IO_PAD344
+bit 1020 O 1 IO_PAD344 1019 1 Z
+bit 1019 C 1 *
+bit 1018 I 1 IO_PAD343
+bit 1017 O 1 IO_PAD343 1016 1 Z
+bit 1016 C 1 *
+bit 1015 I 1 IO_PAD342
+bit 1014 O 1 IO_PAD342 1013 1 Z
+bit 1013 C 1 *
+bit 1012 I 1 IO_PAD340
+bit 1011 O 1 IO_PAD340 1010 1 Z
+bit 1010 C 1 *
+bit 1009 I 1 IO_PAD338
+bit 1008 O 1 IO_PAD338 1007 1 Z
+bit 1007 C 1 *
+bit 1006 I 1 IO_PAD337
+bit 1005 O 1 IO_PAD337 1004 1 Z
+bit 1004 C 1 *
+bit 1003 I 1 IO_PAD336
+bit 1002 O 1 IO_PAD336 1001 1 Z
+bit 1001 C 1 *
+bit 1000 I 1 IO_PAD335
+bit 999 O 1 IO_PAD335 998 1 Z
+bit 998 C 1 *
+bit 997 I 1 IO_PAD334
+bit 996 O 1 IO_PAD334 995 1 Z
+bit 995 C 1 *
+bit 994 I 1 IO_PAD332
+bit 993 O 1 IO_PAD332 992 1 Z
+bit 992 C 1 *
+bit 991 I 1 IO_PAD331
+bit 990 O 1 IO_PAD331 989 1 Z
+bit 989 C 1 *
+bit 988 I 1 IO_PAD330
+bit 987 O 1 IO_PAD330 986 1 Z
+bit 986 C 1 *
+bit 985 I 1 IO_PAD328
+bit 984 O 1 IO_PAD328 983 1 Z
+bit 983 C 1 *
+bit 982 I 1 IO_PAD327
+bit 981 O 1 IO_PAD327 980 1 Z
+bit 980 C 1 *
+bit 979 I 1 IO_PAD326
+bit 978 O 1 IO_PAD326 977 1 Z
+bit 977 C 1 *
+bit 976 I 1 IO_PAD324
+bit 975 O 1 IO_PAD324 974 1 Z
+bit 974 C 1 *
+bit 973 I 1 IO_PAD323
+bit 972 O 1 IO_PAD323 971 1 Z
+bit 971 C 1 *
+bit 970 I 1 IO_PAD322
+bit 969 O 1 IO_PAD322 968 1 Z
+bit 968 C 1 *
+bit 967 I 1 IO_PAD321
+bit 966 O 1 IO_PAD321 965 1 Z
+bit 965 C 1 *
+bit 964 I 1 M2_PAD320
+bit 963 I 1 M0_PAD319
+bit 962 I 1 M1_PAD318
+bit 961 I 1 IO_PAD316
+bit 960 O 1 IO_PAD316 959 1 Z
+bit 959 C 1 *
+bit 958 I 1 IO_PAD315
+bit 957 O 1 IO_PAD315 956 1 Z
+bit 956 C 1 *
+bit 955 I 1 IO_PAD314
+bit 954 O 1 IO_PAD314 953 1 Z
+bit 953 C 1 *
+bit 952 I 1 IO_PAD312
+bit 951 O 1 IO_PAD312 950 1 Z
+bit 950 C 1 *
+bit 949 I 1 IO_PAD311
+bit 948 O 1 IO_PAD311 947 1 Z
+bit 947 C 1 *
+bit 946 I 1 IO_PAD310
+bit 945 O 1 IO_PAD310 944 1 Z
+bit 944 C 1 *
+bit 943 I 1 IO_PAD309
+bit 942 O 1 IO_PAD309 941 1 Z
+bit 941 C 1 *
+bit 940 I 1 IO_PAD308
+bit 939 O 1 IO_PAD308 938 1 Z
+bit 938 C 1 *
+bit 937 I 1 IO_PAD306
+bit 936 O 1 IO_PAD306 935 1 Z
+bit 935 C 1 *
+bit 934 I 1 IO_PAD304
+bit 933 O 1 IO_PAD304 932 1 Z
+bit 932 C 1 *
+bit 931 I 1 IO_PAD303
+bit 930 O 1 IO_PAD303 929 1 Z
+bit 929 C 1 *
+bit 928 I 1 IO_PAD302
+bit 927 O 1 IO_PAD302 926 1 Z
+bit 926 C 1 *
+bit 925 I 1 IO_PAD301
+bit 924 O 1 IO_PAD301 923 1 Z
+bit 923 C 1 *
+bit 922 I 1 IO_PAD300
+bit 921 O 1 IO_PAD300 920 1 Z
+bit 920 C 1 *
+bit 919 I 1 IO_PAD298
+bit 918 O 1 IO_PAD298 917 1 Z
+bit 917 C 1 *
+bit 916 I 1 IO_PAD296
+bit 915 O 1 IO_PAD296 914 1 Z
+bit 914 C 1 *
+bit 913 I 1 IO_PAD294
+bit 912 O 1 IO_PAD294 911 1 Z
+bit 911 C 1 *
+bit 910 I 1 IO_PAD292
+bit 909 O 1 IO_PAD292 908 1 Z
+bit 908 C 1 *
+bit 907 I 1 IO_PAD291
+bit 906 O 1 IO_PAD291 905 1 Z
+bit 905 C 1 *
+bit 904 I 1 IO_PAD290
+bit 903 O 1 IO_PAD290 902 1 Z
+bit 902 C 1 *
+bit 901 I 1 IO_PAD288
+bit 900 O 1 IO_PAD288 899 1 Z
+bit 899 C 1 *
+bit 898 I 1 IO_PAD286
+bit 897 O 1 IO_PAD286 896 1 Z
+bit 896 C 1 *
+bit 895 I 1 IO_PAD285
+bit 894 O 1 IO_PAD285 893 1 Z
+bit 893 C 1 *
+bit 892 I 1 IO_PAD284
+bit 891 O 1 IO_PAD284 890 1 Z
+bit 890 C 1 *
+bit 889 I 1 IO_PAD283
+bit 888 O 1 IO_PAD283 887 1 Z
+bit 887 C 1 *
+bit 886 I 1 IO_PAD282
+bit 885 O 1 IO_PAD282 884 1 Z
+bit 884 C 1 *
+bit 883 I 1 IO_PAD280
+bit 882 O 1 IO_PAD280 881 1 Z
+bit 881 C 1 *
+bit 880 I 1 IO_PAD279
+bit 879 O 1 IO_PAD279 878 1 Z
+bit 878 C 1 *
+bit 877 I 1 IO_PAD278
+bit 876 O 1 IO_PAD278 875 1 Z
+bit 875 C 1 *
+bit 874 I 1 IO_PAD277
+bit 873 O 1 IO_PAD277 872 1 Z
+bit 872 C 1 *
+bit 871 I 1 IO_PAD276
+bit 870 O 1 IO_PAD276 869 1 Z
+bit 869 C 1 *
+bit 868 I 1 IO_PAD274
+bit 867 O 1 IO_PAD274 866 1 Z
+bit 866 C 1 *
+bit 865 I 1 IO_PAD273
+bit 864 O 1 IO_PAD273 863 1 Z
+bit 863 C 1 *
+bit 862 I 1 IO_PAD272
+bit 861 O 1 IO_PAD272 860 1 Z
+bit 860 C 1 *
+bit 859 O 1 *
+bit 858 O 1 *
+bit 857 O 1 *
+bit 856 O 1 *
+bit 855 O 1 *
+bit 854 O 1 *
+bit 853 I 1 IO_PAD270
+bit 852 O 1 IO_PAD270 851 1 Z
+bit 851 C 1 *
+bit 850 I 1 IO_PAD268
+bit 849 O 1 IO_PAD268 848 1 Z
+bit 848 C 1 *
+bit 847 I 1 IO_PAD267
+bit 846 O 1 IO_PAD267 845 1 Z
+bit 845 C 1 *
+bit 844 I 1 IO_PAD266
+bit 843 O 1 IO_PAD266 842 1 Z
+bit 842 C 1 *
+bit 841 I 1 IO_PAD265
+bit 840 O 1 IO_PAD265 839 1 Z
+bit 839 C 1 *
+bit 838 I 1 IO_PAD264
+bit 837 O 1 IO_PAD264 836 1 Z
+bit 836 C 1 *
+bit 835 I 1 IO_PAD262
+bit 834 O 1 IO_PAD262 833 1 Z
+bit 833 C 1 *
+bit 832 I 1 IO_PAD260
+bit 831 O 1 IO_PAD260 830 1 Z
+bit 830 C 1 *
+bit 829 I 1 IO_PAD258
+bit 828 O 1 IO_PAD258 827 1 Z
+bit 827 C 1 *
+bit 826 I 1 IO_PAD256
+bit 825 O 1 IO_PAD256 824 1 Z
+bit 824 C 1 *
+bit 823 I 1 IO_PAD255
+bit 822 O 1 IO_PAD255 821 1 Z
+bit 821 C 1 *
+bit 820 I 1 IO_PAD254
+bit 819 O 1 IO_PAD254 818 1 Z
+bit 818 C 1 *
+bit 817 O 1 *
+bit 816 O 1 *
+bit 815 O 1 *
+bit 814 O 1 *
+bit 813 O 1 *
+bit 812 O 1 *
+bit 811 I 1 IO_PAD252
+bit 810 O 1 IO_PAD252 809 1 Z
+bit 809 C 1 *
+bit 808 I 1 IO_PAD250
+bit 807 O 1 IO_PAD250 806 1 Z
+bit 806 C 1 *
+bit 805 I 1 IO_PAD249
+bit 804 O 1 IO_PAD249 803 1 Z
+bit 803 C 1 *
+bit 802 I 1 IO_PAD248
+bit 801 O 1 IO_PAD248 800 1 Z
+bit 800 C 1 *
+bit 799 I 1 IO_PAD247
+bit 798 O 1 IO_PAD247 797 1 Z
+bit 797 C 1 *
+bit 796 I 1 IO_PAD246
+bit 795 O 1 IO_PAD246 794 1 Z
+bit 794 C 1 *
+bit 793 I 1 IO_PAD245
+bit 792 O 1 IO_PAD245 791 1 Z
+bit 791 C 1 *
+bit 790 I 1 IO_PAD244
+bit 789 O 1 IO_PAD244 788 1 Z
+bit 788 C 1 *
+bit 787 O 1 *
+bit 786 O 1 *
+bit 785 O 1 *
+bit 784 O 1 *
+bit 783 O 1 *
+bit 782 O 1 *
+bit 781 I 1 IO_PAD242
+bit 780 O 1 IO_PAD242 779 1 Z
+bit 779 C 1 *
+bit 778 I 1 IO_PAD240
+bit 777 O 1 IO_PAD240 776 1 Z
+bit 776 C 1 *
+bit 775 I 1 IO_PAD239
+bit 774 O 1 IO_PAD239 773 1 Z
+bit 773 C 1 *
+bit 772 I 1 IO_PAD238
+bit 771 O 1 IO_PAD238 770 1 Z
+bit 770 C 1 *
+bit 769 I 1 IO_PAD237
+bit 768 O 1 IO_PAD237 767 1 Z
+bit 767 C 1 *
+bit 766 I 1 IO_PAD236
+bit 765 O 1 IO_PAD236 764 1 Z
+bit 764 C 1 *
+bit 763 I 1 IO_PAD234
+bit 762 O 1 IO_PAD234 761 1 Z
+bit 761 C 1 *
+bit 760 I 1 IO_PAD232
+bit 759 O 1 IO_PAD232 758 1 Z
+bit 758 C 1 *
+bit 757 I 1 IO_PAD230
+bit 756 O 1 IO_PAD230 755 1 Z
+bit 755 C 1 *
+bit 754 I 1 IO_PAD228
+bit 753 O 1 IO_PAD228 752 1 Z
+bit 752 C 1 *
+bit 751 O 1 *
+bit 750 O 1 *
+bit 749 O 1 *
+bit 748 O 1 *
+bit 747 O 1 *
+bit 746 O 1 *
+bit 745 I 1 IO_PAD227
+bit 744 O 1 IO_PAD227 743 1 Z
+bit 743 C 1 *
+bit 742 I 1 IO_PAD226
+bit 741 O 1 IO_PAD226 740 1 Z
+bit 740 C 1 *
+bit 739 I 1 IO_PAD224
+bit 738 O 1 IO_PAD224 737 1 Z
+bit 737 C 1 *
+bit 736 I 1 IO_PAD223
+bit 735 O 1 IO_PAD223 734 1 Z
+bit 734 C 1 *
+bit 733 I 1 IO_PAD222
+bit 732 O 1 IO_PAD222 731 1 Z
+bit 731 C 1 *
+bit 730 I 1 IO_PAD220
+bit 729 O 1 IO_PAD220 728 1 Z
+bit 728 C 1 *
+bit 727 I 1 IO_PAD218
+bit 726 O 1 IO_PAD218 725 1 Z
+bit 725 C 1 *
+bit 724 I 1 IO_PAD217
+bit 723 O 1 IO_PAD217 722 1 Z
+bit 722 C 1 *
+bit 721 I 1 IO_PAD215
+bit 720 O 1 IO_PAD215 719 1 Z
+bit 719 C 1 *
+bit 718 I 1 IO_PAD214
+bit 717 O 1 IO_PAD214 716 1 Z
+bit 716 C 1 *
+bit 715 I 1 IO_PAD212
+bit 714 O 1 IO_PAD212 713 1 Z
+bit 713 C 1 *
+bit 712 I 1 IO_PAD210
+bit 711 O 1 IO_PAD210 710 1 Z
+bit 710 C 1 *
+bit 709 I 1 IO_PAD209
+bit 708 O 1 IO_PAD209 707 1 Z
+bit 707 C 1 *
+bit 706 I 1 IO_PAD208
+bit 705 O 1 IO_PAD208 704 1 Z
+bit 704 C 1 *
+bit 703 I 1 IO_PAD206
+bit 702 O 1 IO_PAD206 701 1 Z
+bit 701 C 1 *
+bit 700 I 1 IO_PAD205
+bit 699 O 1 IO_PAD205 698 1 Z
+bit 698 C 1 *
+bit 697 O 1 *
+bit 696 O 1 *
+bit 695 O 1 *
+bit 694 O 1 *
+bit 693 O 1 *
+bit 692 O 1 *
+bit 691 I 1 IO_PAD204
+bit 690 O 1 IO_PAD204 689 1 Z
+bit 689 C 1 *
+bit 688 I 1 IO_PAD202
+bit 687 O 1 IO_PAD202 686 1 Z
+bit 686 C 1 *
+bit 685 I 1 IO_PAD200
+bit 684 O 1 IO_PAD200 683 1 Z
+bit 683 C 1 *
+bit 682 I 1 IO_PAD198
+bit 681 O 1 IO_PAD198 680 1 Z
+bit 680 C 1 *
+bit 679 I 1 IO_PAD196
+bit 678 O 1 IO_PAD196 677 1 Z
+bit 677 C 1 *
+bit 676 I 1 IO_PAD195
+bit 675 O 1 IO_PAD195 674 1 Z
+bit 674 C 1 *
+bit 673 I 1 IO_PAD194
+bit 672 O 1 IO_PAD194 671 1 Z
+bit 671 C 1 *
+bit 670 I 1 IO_PAD193
+bit 669 O 1 IO_PAD193 668 1 Z
+bit 668 C 1 *
+bit 667 I 1 IO_PAD192
+bit 666 O 1 IO_PAD192 665 1 Z
+bit 665 C 1 *
+bit 664 I 1 IO_PAD190
+bit 663 O 1 IO_PAD190 662 1 Z
+bit 662 C 1 *
+bit 661 O 1 *
+bit 660 O 1 *
+bit 659 O 1 *
+bit 658 O 1 *
+bit 657 O 1 *
+bit 656 O 1 *
+bit 655 I 1 IO_PAD188
+bit 654 O 1 IO_PAD188 653 1 Z
+bit 653 C 1 *
+bit 652 I 1 IO_PAD187
+bit 651 O 1 IO_PAD187 650 1 Z
+bit 650 C 1 *
+bit 649 I 1 IO_PAD186
+bit 648 O 1 IO_PAD186 647 1 Z
+bit 647 C 1 *
+bit 646 I 1 IO_PAD185
+bit 645 O 1 IO_PAD185 644 1 Z
+bit 644 C 1 *
+bit 643 I 1 IO_PAD184
+bit 642 O 1 IO_PAD184 641 1 Z
+bit 641 C 1 *
+bit 640 I 1 IO_PAD183
+bit 639 O 1 IO_PAD183 638 1 Z
+bit 638 C 1 *
+bit 637 I 1 IO_PAD182
+bit 636 O 1 IO_PAD182 635 1 Z
+bit 635 C 1 *
+bit 634 I 1 IO_PAD180
+bit 633 O 1 IO_PAD180 632 1 Z
+bit 632 C 1 *
+bit 631 O 1 *
+bit 630 O 1 *
+bit 629 O 1 *
+bit 628 O 1 *
+bit 627 O 1 *
+bit 626 O 1 *
+bit 625 I 1 IO_PAD178
+bit 624 O 1 IO_PAD178 623 1 Z
+bit 623 C 1 *
+bit 622 I 1 IO_PAD177
+bit 621 O 1 IO_PAD177 620 1 Z
+bit 620 C 1 *
+bit 619 I 1 IO_PAD176
+bit 618 O 1 IO_PAD176 617 1 Z
+bit 617 C 1 *
+bit 616 I 1 IO_PAD174
+bit 615 O 1 IO_PAD174 614 1 Z
+bit 614 C 1 *
+bit 613 I 1 IO_PAD172
+bit 612 O 1 IO_PAD172 611 1 Z
+bit 611 C 1 *
+bit 610 I 1 IO_PAD170
+bit 609 O 1 IO_PAD170 608 1 Z
+bit 608 C 1 *
+bit 607 I 1 IO_PAD168
+bit 606 O 1 IO_PAD168 605 1 Z
+bit 605 C 1 *
+bit 604 I 1 IO_PAD167
+bit 603 O 1 IO_PAD167 602 1 Z
+bit 602 C 1 *
+bit 601 I 1 IO_PAD166
+bit 600 O 1 IO_PAD166 599 1 Z
+bit 599 C 1 *
+bit 598 I 1 IO_PAD165
+bit 597 O 1 IO_PAD165 596 1 Z
+bit 596 C 1 *
+bit 595 I 1 IO_PAD164
+bit 594 O 1 IO_PAD164 593 1 Z
+bit 593 C 1 *
+bit 592 I 1 IO_PAD162
+bit 591 O 1 IO_PAD162 590 1 Z
+bit 590 C 1 *
+bit 589 O 1 *
+bit 588 O 1 *
+bit 587 O 1 *
+bit 586 O 1 *
+bit 585 O 1 *
+bit 584 O 1 *
+bit 583 I 1 IO_PAD160
+bit 582 O 1 IO_PAD160 581 1 Z
+bit 581 C 1 *
+bit 580 I 1 IO_PAD159
+bit 579 O 1 IO_PAD159 578 1 Z
+bit 578 C 1 *
+bit 577 I 1 IO_PAD158
+bit 576 O 1 IO_PAD158 575 1 Z
+bit 575 C 1 *
+bit 574 I 1 IO_PAD156
+bit 573 O 1 IO_PAD156 572 1 Z
+bit 572 C 1 *
+bit 571 I 1 IO_PAD155
+bit 570 O 1 IO_PAD155 569 1 Z
+bit 569 C 1 *
+bit 568 I 1 IO_PAD154
+bit 567 O 1 IO_PAD154 566 1 Z
+bit 566 C 1 *
+bit 565 I 1 IO_PAD153
+bit 564 O 1 IO_PAD153 563 1 Z
+bit 563 C 1 *
+bit 562 I 1 IO_PAD152
+bit 561 O 1 IO_PAD152 560 1 Z
+bit 560 C 1 *
+bit 559 I 1 IO_PAD150
+bit 558 O 1 IO_PAD150 557 1 Z
+bit 557 C 1 *
+bit 556 I 1 IO_PAD149
+bit 555 O 1 IO_PAD149 554 1 Z
+bit 554 C 1 *
+bit 553 I 1 IO_PAD148
+bit 552 O 1 IO_PAD148 551 1 Z
+bit 551 C 1 *
+bit 550 I 1 IO_PAD147
+bit 549 O 1 IO_PAD147 548 1 Z
+bit 548 C 1 *
+bit 547 I 1 IO_PAD146
+bit 546 O 1 IO_PAD146 545 1 Z
+bit 545 C 1 *
+bit 544 I 1 IO_PAD144
+bit 543 O 1 IO_PAD144 542 1 Z
+bit 542 C 1 *
+bit 541 I 1 IO_PAD142
+bit 540 O 1 IO_PAD142 539 1 Z
+bit 539 C 1 *
+bit 538 I 1 IO_PAD141
+bit 537 O 1 IO_PAD141 536 1 Z
+bit 536 C 1 *
+bit 535 I 1 IO_PAD140
+bit 534 O 1 IO_PAD140 533 1 Z
+bit 533 C 1 *
+bit 532 I 1 IO_PAD138
+bit 531 O 1 IO_PAD138 530 1 Z
+bit 530 C 1 *
+bit 529 I 1 IO_PAD136
+bit 528 O 1 IO_PAD136 527 1 Z
+bit 527 C 1 *
+bit 526 I 1 IO_PAD134
+bit 525 O 1 IO_PAD134 524 1 Z
+bit 524 C 1 *
+bit 523 I 1 IO_PAD132
+bit 522 O 1 IO_PAD132 521 1 Z
+bit 521 C 1 *
+bit 520 I 1 IO_PAD131
+bit 519 O 1 IO_PAD131 518 1 Z
+bit 518 C 1 *
+bit 517 I 1 IO_PAD130
+bit 516 O 1 IO_PAD130 515 1 Z
+bit 515 C 1 *
+bit 514 I 1 IO_PAD129
+bit 513 O 1 IO_PAD129 512 1 Z
+bit 512 C 1 *
+bit 511 I 1 IO_PAD128
+bit 510 O 1 IO_PAD128 509 1 Z
+bit 509 C 1 *
+bit 508 I 1 IO_PAD126
+bit 507 O 1 IO_PAD126 506 1 Z
+bit 506 C 1 *
+bit 505 I 1 IO_PAD124
+bit 504 O 1 IO_PAD124 503 1 Z
+bit 503 C 1 *
+bit 502 I 1 IO_PAD123
+bit 501 O 1 IO_PAD123 500 1 Z
+bit 500 C 1 *
+bit 499 I 1 IO_PAD122
+bit 498 O 1 IO_PAD122 497 1 Z
+bit 497 C 1 *
+bit 496 I 1 IO_PAD121
+bit 495 O 1 IO_PAD121 494 1 Z
+bit 494 C 1 *
+bit 493 I 1 IO_PAD120
+bit 492 O 1 IO_PAD120 491 1 Z
+bit 491 C 1 *
+bit 490 I 1 IO_PAD118
+bit 489 O 1 IO_PAD118 488 1 Z
+bit 488 C 1 *
+bit 487 I 1 IO_PAD117
+bit 486 O 1 IO_PAD117 485 1 Z
+bit 485 C 1 *
+bit 484 I 1 IO_PAD116
+bit 483 O 1 IO_PAD116 482 1 Z
+bit 482 C 1 *
+bit 481 O 1 *
+bit 480 I 1 HSWAP_EN_PAD112
+bit 479 I 1 IO_PAD111
+bit 478 O 1 IO_PAD111 477 1 Z
+bit 477 C 1 *
+bit 476 I 1 IO_PAD110
+bit 475 O 1 IO_PAD110 474 1 Z
+bit 474 C 1 *
+bit 473 I 1 IO_PAD109
+bit 472 O 1 IO_PAD109 471 1 Z
+bit 471 C 1 *
+bit 470 I 1 IO_PAD108
+bit 469 O 1 IO_PAD108 468 1 Z
+bit 468 C 1 *
+bit 467 I 1 IO_PAD106
+bit 466 O 1 IO_PAD106 465 1 Z
+bit 465 C 1 *
+bit 464 I 1 IO_PAD105
+bit 463 O 1 IO_PAD105 462 1 Z
+bit 462 C 1 *
+bit 461 I 1 IO_PAD104
+bit 460 O 1 IO_PAD104 459 1 Z
+bit 459 C 1 *
+bit 458 I 1 IO_PAD102
+bit 457 O 1 IO_PAD102 456 1 Z
+bit 456 C 1 *
+bit 455 I 1 IO_PAD101
+bit 454 O 1 IO_PAD101 453 1 Z
+bit 453 C 1 *
+bit 452 I 1 IO_PAD100
+bit 451 O 1 IO_PAD100 450 1 Z
+bit 450 C 1 *
+bit 449 I 1 IO_PAD98
+bit 448 O 1 IO_PAD98 447 1 Z
+bit 447 C 1 *
+bit 446 I 1 IO_PAD97
+bit 445 O 1 IO_PAD97 444 1 Z
+bit 444 C 1 *
+bit 443 I 1 IO_PAD96
+bit 442 O 1 IO_PAD96 441 1 Z
+bit 441 C 1 *
+bit 440 I 1 IO_PAD95
+bit 439 O 1 IO_PAD95 438 1 Z
+bit 438 C 1 *
+bit 437 I 1 IO_PAD94
+bit 436 O 1 IO_PAD94 435 1 Z
+bit 435 C 1 *
+bit 434 I 1 IO_PAD92
+bit 433 O 1 IO_PAD92 432 1 Z
+bit 432 C 1 *
+bit 431 I 1 IO_PAD90
+bit 430 O 1 IO_PAD90 429 1 Z
+bit 429 C 1 *
+bit 428 I 1 IO_PAD89
+bit 427 O 1 IO_PAD89 426 1 Z
+bit 426 C 1 *
+bit 425 I 1 IO_PAD88
+bit 424 O 1 IO_PAD88 423 1 Z
+bit 423 C 1 *
+bit 422 I 1 IO_PAD87
+bit 421 O 1 IO_PAD87 420 1 Z
+bit 420 C 1 *
+bit 419 I 1 IO_PAD86
+bit 418 O 1 IO_PAD86 417 1 Z
+bit 417 C 1 *
+bit 416 I 1 IO_PAD84
+bit 415 O 1 IO_PAD84 414 1 Z
+bit 414 C 1 *
+bit 413 I 1 IO_PAD82
+bit 412 O 1 IO_PAD82 411 1 Z
+bit 411 C 1 *
+bit 410 I 1 IO_PAD80
+bit 409 O 1 IO_PAD80 408 1 Z
+bit 408 C 1 *
+bit 407 I 1 IO_PAD78
+bit 406 O 1 IO_PAD78 405 1 Z
+bit 405 C 1 *
+bit 404 I 1 IO_PAD77
+bit 403 O 1 IO_PAD77 402 1 Z
+bit 402 C 1 *
+bit 401 I 1 IO_PAD76
+bit 400 O 1 IO_PAD76 399 1 Z
+bit 399 C 1 *
+bit 398 I 1 IO_PAD74
+bit 397 O 1 IO_PAD74 396 1 Z
+bit 396 C 1 *
+bit 395 I 1 IO_PAD73
+bit 394 O 1 IO_PAD73 393 1 Z
+bit 393 C 1 *
+bit 392 I 1 IO_PAD72
+bit 391 O 1 IO_PAD72 390 1 Z
+bit 390 C 1 *
+bit 389 I 1 IO_PAD70
+bit 388 O 1 IO_PAD70 387 1 Z
+bit 387 C 1 *
+bit 386 I 1 IO_PAD69
+bit 385 O 1 IO_PAD69 384 1 Z
+bit 384 C 1 *
+bit 383 I 1 IO_PAD68
+bit 382 O 1 IO_PAD68 381 1 Z
+bit 381 C 1 *
+bit 380 I 1 IO_PAD67
+bit 379 O 1 IO_PAD67 378 1 Z
+bit 378 C 1 *
+bit 377 I 1 IO_PAD66
+bit 376 O 1 IO_PAD66 375 1 Z
+bit 375 C 1 *
+bit 374 I 1 IO_PAD64
+bit 373 O 1 IO_PAD64 372 1 Z
+bit 372 C 1 *
+bit 371 I 1 IO_PAD63
+bit 370 O 1 IO_PAD63 369 1 Z
+bit 369 C 1 *
+bit 368 I 1 IO_PAD62
+bit 367 O 1 IO_PAD62 366 1 Z
+bit 366 C 1 *
+bit 365 I 1 IO_PAD60
+bit 364 O 1 IO_PAD60 363 1 Z
+bit 363 C 1 *
+bit 362 I 1 IO_PAD58
+bit 361 O 1 IO_PAD58 360 1 Z
+bit 360 C 1 *
+bit 359 I 1 IO_PAD57
+bit 358 O 1 IO_PAD57 357 1 Z
+bit 357 C 1 *
+bit 356 I 1 IO_PAD56
+bit 355 O 1 IO_PAD56 354 1 Z
+bit 354 C 1 *
+bit 353 I 1 IO_PAD55
+bit 352 O 1 IO_PAD55 351 1 Z
+bit 351 C 1 *
+bit 350 I 1 IO_PAD54
+bit 349 O 1 IO_PAD54 348 1 Z
+bit 348 C 1 *
+bit 347 I 1 IO_PAD52
+bit 346 O 1 IO_PAD52 345 1 Z
+bit 345 C 1 *
+bit 344 I 1 IO_PAD50
+bit 343 O 1 IO_PAD50 342 1 Z
+bit 342 C 1 *
+bit 341 I 1 IO_PAD48
+bit 340 O 1 IO_PAD48 339 1 Z
+bit 339 C 1 *
+bit 338 I 1 IO_PAD46
+bit 337 O 1 IO_PAD46 336 1 Z
+bit 336 C 1 *
+bit 335 I 1 IO_PAD45
+bit 334 O 1 IO_PAD45 333 1 Z
+bit 333 C 1 *
+bit 332 I 1 IO_PAD44
+bit 331 O 1 IO_PAD44 330 1 Z
+bit 330 C 1 *
+bit 329 I 1 IO_PAD42
+bit 328 O 1 IO_PAD42 327 1 Z
+bit 327 C 1 *
+bit 326 I 1 IO_PAD41
+bit 325 O 1 IO_PAD41 324 1 Z
+bit 324 C 1 *
+bit 323 I 1 IO_PAD40
+bit 322 O 1 IO_PAD40 321 1 Z
+bit 321 C 1 *
+bit 320 I 1 IO_PAD38
+bit 319 O 1 IO_PAD38 318 1 Z
+bit 318 C 1 *
+bit 317 I 1 IO_PAD36
+bit 316 O 1 IO_PAD36 315 1 Z
+bit 315 C 1 *
+bit 314 I 1 IO_PAD35
+bit 313 O 1 IO_PAD35 312 1 Z
+bit 312 C 1 *
+bit 311 I 1 IO_PAD34
+bit 310 O 1 IO_PAD34 309 1 Z
+bit 309 C 1 *
+bit 308 I 1 IO_PAD33
+bit 307 O 1 IO_PAD33 306 1 Z
+bit 306 C 1 *
+bit 305 I 1 IO_PAD32
+bit 304 O 1 IO_PAD32 303 1 Z
+bit 303 C 1 *
+bit 302 I 1 IO_PAD31
+bit 301 O 1 IO_PAD31 300 1 Z
+bit 300 C 1 *
+bit 299 I 1 IO_PAD30
+bit 298 O 1 IO_PAD30 297 1 Z
+bit 297 C 1 *
+bit 296 I 1 IO_PAD28
+bit 295 O 1 IO_PAD28 294 1 Z
+bit 294 C 1 *
+bit 293 I 1 IO_PAD26
+bit 292 O 1 IO_PAD26 291 1 Z
+bit 291 C 1 *
+bit 290 I 1 IO_PAD25
+bit 289 O 1 IO_PAD25 288 1 Z
+bit 288 C 1 *
+bit 287 I 1 IO_PAD24
+bit 286 O 1 IO_PAD24 285 1 Z
+bit 285 C 1 *
+bit 284 I 1 IO_PAD23
+bit 283 O 1 IO_PAD23 282 1 Z
+bit 282 C 1 *
+bit 281 I 1 IO_PAD22
+bit 280 O 1 IO_PAD22 279 1 Z
+bit 279 C 1 *
+bit 278 I 1 IO_PAD20
+bit 277 O 1 IO_PAD20 276 1 Z
+bit 276 C 1 *
+bit 275 I 1 IO_PAD18
+bit 274 O 1 IO_PAD18 273 1 Z
+bit 273 C 1 *
+bit 272 I 1 IO_PAD16
+bit 271 O 1 IO_PAD16 270 1 Z
+bit 270 C 1 *
+bit 269 I 1 IO_PAD14
+bit 268 O 1 IO_PAD14 267 1 Z
+bit 267 C 1 *
+bit 266 I 1 IO_PAD13
+bit 265 O 1 IO_PAD13 264 1 Z
+bit 264 C 1 *
+bit 263 I 1 IO_PAD12
+bit 262 O 1 IO_PAD12 261 1 Z
+bit 261 C 1 *
+bit 260 I 1 IO_PAD10
+bit 259 O 1 IO_PAD10 258 1 Z
+bit 258 C 1 *
+bit 257 I 1 IO_PAD9
+bit 256 O 1 IO_PAD9 255 1 Z
+bit 255 C 1 *
+bit 254 I 1 IO_PAD8
+bit 253 O 1 IO_PAD8 252 1 Z
+bit 252 C 1 *
+bit 251 I 1 IO_PAD6
+bit 250 O 1 IO_PAD6 249 1 Z
+bit 249 C 1 *
+bit 248 I 1 IO_PAD4
+bit 247 O 1 IO_PAD4 246 1 Z
+bit 246 C 1 *
+bit 245 I 1 IO_PAD3
+bit 244 O 1 IO_PAD3 243 1 Z
+bit 243 C 1 *
+bit 242 I 1 IO_PAD2
+bit 241 O 1 IO_PAD2 240 1 Z
+bit 240 C 1 *
+bit 239 I 1 IO_PAD861
+bit 238 O 1 IO_PAD861 237 1 Z
+bit 237 C 1 *
+bit 236 I 1 IO_PAD860
+bit 235 O 1 IO_PAD860 234 1 Z
+bit 234 C 1 *
+bit 233 I 1 IO_PAD859
+bit 232 O 1 IO_PAD859 231 1 Z
+bit 231 C 1 *
+bit 230 I 1 IO_PAD857
+bit 229 O 1 IO_PAD857 228 1 Z
+bit 228 C 1 *
+bit 227 I 1 IO_PAD855
+bit 226 O 1 IO_PAD855 225 1 Z
+bit 225 C 1 *
+bit 224 I 1 IO_PAD854
+bit 223 O 1 IO_PAD854 222 1 Z
+bit 222 C 1 *
+bit 221 I 1 IO_PAD853
+bit 220 O 1 IO_PAD853 219 1 Z
+bit 219 C 1 *
+bit 218 I 1 IO_PAD851
+bit 217 O 1 IO_PAD851 216 1 Z
+bit 216 C 1 *
+bit 215 I 1 IO_PAD850
+bit 214 O 1 IO_PAD850 213 1 Z
+bit 213 C 1 *
+bit 212 I 1 IO_PAD849
+bit 211 O 1 IO_PAD849 210 1 Z
+bit 210 C 1 *
+bit 209 I 1 IO_PAD847
+bit 208 O 1 IO_PAD847 207 1 Z
+bit 207 C 1 *
+bit 206 I 1 IO_PAD845
+bit 205 O 1 IO_PAD845 204 1 Z
+bit 204 C 1 *
+bit 203 I 1 IO_PAD843
+bit 202 O 1 IO_PAD843 201 1 Z
+bit 201 C 1 *
+bit 200 I 1 IO_PAD841
+bit 199 O 1 IO_PAD841 198 1 Z
+bit 198 C 1 *
+bit 197 I 1 IO_PAD840
+bit 196 O 1 IO_PAD840 195 1 Z
+bit 195 C 1 *
+bit 194 I 1 IO_PAD839
+bit 193 O 1 IO_PAD839 192 1 Z
+bit 192 C 1 *
+bit 191 I 1 IO_PAD838
+bit 190 O 1 IO_PAD838 189 1 Z
+bit 189 C 1 *
+bit 188 I 1 IO_PAD837
+bit 187 O 1 IO_PAD837 186 1 Z
+bit 186 C 1 *
+bit 185 I 1 IO_PAD835
+bit 184 O 1 IO_PAD835 183 1 Z
+bit 183 C 1 *
+bit 182 I 1 IO_PAD833
+bit 181 O 1 IO_PAD833 180 1 Z
+bit 180 C 1 *
+bit 179 I 1 IO_PAD832
+bit 178 O 1 IO_PAD832 177 1 Z
+bit 177 C 1 *
+bit 176 I 1 IO_PAD831
+bit 175 O 1 IO_PAD831 174 1 Z
+bit 174 C 1 *
+bit 173 I 1 IO_PAD830
+bit 172 O 1 IO_PAD830 171 1 Z
+bit 171 C 1 *
+bit 170 I 1 IO_PAD829
+bit 169 O 1 IO_PAD829 168 1 Z
+bit 168 C 1 *
+bit 167 I 1 IO_PAD828
+bit 166 O 1 IO_PAD828 165 1 Z
+bit 165 C 1 *
+bit 164 I 1 IO_PAD827
+bit 163 O 1 IO_PAD827 162 1 Z
+bit 162 C 1 *
+bit 161 I 1 IO_PAD825
+bit 160 O 1 IO_PAD825 159 1 Z
+bit 159 C 1 *
+bit 158 I 1 IO_PAD823
+bit 157 O 1 IO_PAD823 156 1 Z
+bit 156 C 1 *
+bit 155 I 1 IO_PAD822
+bit 154 O 1 IO_PAD822 153 1 Z
+bit 153 C 1 *
+bit 152 I 1 IO_PAD821
+bit 151 O 1 IO_PAD821 150 1 Z
+bit 150 C 1 *
+bit 149 I 1 IO_PAD819
+bit 148 O 1 IO_PAD819 147 1 Z
+bit 147 C 1 *
+bit 146 I 1 IO_PAD818
+bit 145 O 1 IO_PAD818 144 1 Z
+bit 144 C 1 *
+bit 143 I 1 IO_PAD817
+bit 142 O 1 IO_PAD817 141 1 Z
+bit 141 C 1 *
+bit 140 I 1 IO_PAD815
+bit 139 O 1 IO_PAD815 138 1 Z
+bit 138 C 1 *
+bit 137 I 1 IO_PAD813
+bit 136 O 1 IO_PAD813 135 1 Z
+bit 135 C 1 *
+bit 134 I 1 IO_PAD811
+bit 133 O 1 IO_PAD811 132 1 Z
+bit 132 C 1 *
+bit 131 I 1 IO_PAD809
+bit 130 O 1 IO_PAD809 129 1 Z
+bit 129 C 1 *
+bit 128 I 1 IO_PAD808
+bit 127 O 1 IO_PAD808 126 1 Z
+bit 126 C 1 *
+bit 125 I 1 IO_PAD807
+bit 124 O 1 IO_PAD807 123 1 Z
+bit 123 C 1 *
+bit 122 I 1 IO_PAD806
+bit 121 O 1 IO_PAD806 120 1 Z
+bit 120 C 1 *
+bit 119 I 1 IO_PAD805
+bit 118 O 1 IO_PAD805 117 1 Z
+bit 117 C 1 *
+bit 116 I 1 IO_PAD803
+bit 115 O 1 IO_PAD803 114 1 Z
+bit 114 C 1 *
+bit 113 I 1 IO_PAD801
+bit 112 O 1 IO_PAD801 111 1 Z
+bit 111 C 1 *
+bit 110 I 1 IO_PAD800
+bit 109 O 1 IO_PAD800 108 1 Z
+bit 108 C 1 *
+bit 107 I 1 IO_PAD799
+bit 106 O 1 IO_PAD799 105 1 Z
+bit 105 C 1 *
+bit 104 I 1 IO_PAD797
+bit 103 O 1 IO_PAD797 102 1 Z
+bit 102 C 1 *
+bit 101 I 1 IO_PAD796
+bit 100 O 1 IO_PAD796 99 1 Z
+bit 99 C 1 *
+bit 98 I 1 IO_PAD795
+bit 97 O 1 IO_PAD795 96 1 Z
+bit 96 C 1 *
+bit 95 I 1 IO_PAD794
+bit 94 O 1 IO_PAD794 93 1 Z
+bit 93 C 1 *
+bit 92 I 1 IO_PAD793
+bit 91 O 1 IO_PAD793 90 1 Z
+bit 90 C 1 *
+bit 89 I 1 IO_PAD791
+bit 88 O 1 IO_PAD791 87 1 Z
+bit 87 C 1 *
+bit 86 I 1 IO_PAD790
+bit 85 O 1 IO_PAD790 84 1 Z
+bit 84 C 1 *
+bit 83 I 1 IO_PAD789
+bit 82 O 1 IO_PAD789 81 1 Z
+bit 81 C 1 *
+bit 80 I 1 IO_PAD787
+bit 79 O 1 IO_PAD787 78 1 Z
+bit 78 C 1 *
+bit 77 I 1 IO_PAD786
+bit 76 O 1 IO_PAD786 75 1 Z
+bit 75 C 1 *
+bit 74 I 1 IO_PAD785
+bit 73 O 1 IO_PAD785 72 1 Z
+bit 72 C 1 *
+bit 71 I 1 IO_PAD783
+bit 70 O 1 IO_PAD783 69 1 Z
+bit 69 C 1 *
+bit 68 I 1 IO_PAD781
+bit 67 O 1 IO_PAD781 66 1 Z
+bit 66 C 1 *
+bit 65 I 1 IO_PAD779
+bit 64 O 1 IO_PAD779 63 1 Z
+bit 63 C 1 *
+bit 62 I 1 IO_PAD777
+bit 61 O 1 IO_PAD777 60 1 Z
+bit 60 C 1 *
+bit 59 I 1 IO_PAD776
+bit 58 O 1 IO_PAD776 57 1 Z
+bit 57 C 1 *
+bit 56 I 1 IO_PAD775
+bit 55 O 1 IO_PAD775 54 1 Z
+bit 54 C 1 *
+bit 53 I 1 IO_PAD774
+bit 52 O 1 IO_PAD774 51 1 Z
+bit 51 C 1 *
+bit 50 I 1 IO_PAD773
+bit 49 O 1 IO_PAD773 48 1 Z
+bit 48 C 1 *
+bit 47 I 1 IO_PAD771
+bit 46 O 1 IO_PAD771 45 1 Z
+bit 45 C 1 *
+bit 44 I 1 IO_PAD769
+bit 43 O 1 IO_PAD769 42 1 Z
+bit 42 C 1 *
+bit 41 I 1 IO_PAD768
+bit 40 O 1 IO_PAD768 39 1 Z
+bit 39 C 1 *
+bit 38 I 1 IO_PAD767
+bit 37 O 1 IO_PAD767 36 1 Z
+bit 36 C 1 *
+bit 35 I 1 IO_PAD766
+bit 34 O 1 IO_PAD766 33 1 Z
+bit 33 C 1 *
+bit 32 I 1 IO_PAD765
+bit 31 O 1 IO_PAD765 30 1 Z
+bit 30 C 1 *
+bit 29 I 1 IO_PAD763
+bit 28 O 1 IO_PAD763 27 1 Z
+bit 27 C 1 *
+bit 26 I 1 IO_PAD762
+bit 25 O 1 IO_PAD762 24 1 Z
+bit 24 C 1 *
+bit 23 I 1 IO_PAD761
+bit 22 O 1 IO_PAD761 21 1 Z
+bit 21 C 1 *
+bit 20 I 1 IO_PAD759
+bit 19 O 1 IO_PAD759 18 1 Z
+bit 18 C 1 *
+bit 17 I 1 IO_PAD758
+bit 16 O 1 IO_PAD758 15 1 Z
+bit 15 C 1 *
+bit 14 I 1 IO_PAD757
+bit 13 O 1 IO_PAD757 12 1 Z
+bit 12 C 1 *
+bit 11 I 1 IO_PAD755
+bit 10 O 1 IO_PAD755 9 1 Z
+bit 9 C 1 *
+bit 8 I 1 IO_PAD754
+bit 7 O 1 IO_PAD754 6 1 Z
+bit 6 C 1 *
+bit 5 I 1 IO_PAD753
+bit 4 O 1 IO_PAD753 3 1 Z
+bit 3 C 1 *
+bit 2 I 1 IO_PAD752
+bit 1 O 1 IO_PAD752 0 1 Z
+bit 0 C 1 *
--- /dev/null
+signal GND1
+signal GND2
+signal GND3
+signal GND4
+signal GND5
+signal GND6
+signal GND7
+signal GND8
+signal GND9
+signal GND10
+signal GND11
+signal GND12
+signal GND13
+signal GND14
+signal GND15
+signal GND16
+signal GND17
+signal GND18
+signal GND19
+signal GND20
+signal GND21
+signal GND22
+signal GND23
+signal GND24
+signal GND25
+signal GND26
+signal GND27
+signal GND28
+signal GND29
+signal GND30
+signal GND31
+signal GND32
+signal GND33
+signal GND34
+signal GND35
+signal GND36
+signal GND37
+signal GND38
+signal GND39
+signal GND40
+signal GND41
+signal GND42
+signal GND43
+signal GND44
+signal GND45
+signal GND46
+signal GND47
+signal GND48
+signal GND49
+signal GND50
+signal GND51
+signal GND52
+signal GND53
+signal GND54
+signal GND55
+signal GND56
+signal GND57
+signal GND58
+signal GND59
+signal GND60
+signal GND61
+signal GND62
+signal GND63
+signal GND64
+signal GND65
+signal GND66
+signal GND67
+signal GND68
+signal GND69
+signal GND70
+signal GND71
+signal GND72
+signal GND73
+signal GND74
+signal GND75
+signal GND76
+signal CCLK_AD26
+signal DONE_AC24
+signal HSWAP_EN_C2
+signal M0_AE3
+signal M1_AC3
+signal M2_AF3
+signal PROG_B
+signal TCK
+signal TDI
+signal TDO
+signal TMS
+signal VCCAUX1
+signal VCCAUX2
+signal VCCAUX3
+signal VCCAUX4
+signal VCCAUX5
+signal VCCAUX6
+signal VCCAUX7
+signal VCCAUX8
+signal VCCAUX9
+signal VCCAUX10
+signal VCCAUX11
+signal VCCAUX12
+signal VCCAUX13
+signal VCCAUX14
+signal VCCAUX15
+signal VCCAUX16
+signal VCCINT1
+signal VCCINT2
+signal VCCINT3
+signal VCCINT4
+signal VCCINT5
+signal VCCINT6
+signal VCCINT7
+signal VCCINT8
+signal VCCINT9
+signal VCCINT10
+signal VCCINT11
+signal VCCINT12
+signal VCCINT13
+signal VCCINT14
+signal VCCINT15
+signal VCCINT16
+signal VCCINT17
+signal VCCINT18
+signal VCCINT19
+signal VCCINT20
+signal VCCO01
+signal VCCO02
+signal VCCO03
+signal VCCO04
+signal VCCO05
+signal VCCO06
+signal VCCO07
+signal VCCO08
+signal VCCO11
+signal VCCO12
+signal VCCO13
+signal VCCO14
+signal VCCO15
+signal VCCO16
+signal VCCO17
+signal VCCO18
+signal VCCO21
+signal VCCO22
+signal VCCO23
+signal VCCO24
+signal VCCO25
+signal VCCO26
+signal VCCO27
+signal VCCO28
+signal VCCO31
+signal VCCO32
+signal VCCO33
+signal VCCO34
+signal VCCO35
+signal VCCO36
+signal VCCO37
+signal VCCO38
+signal VCCO41
+signal VCCO42
+signal VCCO43
+signal VCCO44
+signal VCCO45
+signal VCCO46
+signal VCCO47
+signal VCCO48
+signal VCCO51
+signal VCCO52
+signal VCCO53
+signal VCCO54
+signal VCCO55
+signal VCCO56
+signal VCCO57
+signal VCCO58
+signal VCCO61
+signal VCCO62
+signal VCCO63
+signal VCCO64
+signal VCCO65
+signal VCCO66
+signal VCCO67
+signal VCCO68
+signal VCCO71
+signal VCCO72
+signal VCCO73
+signal VCCO74
+signal VCCO75
+signal VCCO76
+signal VCCO77
+signal VCCO78
+signal IO_A3
+signal IO_A4
+signal IO_A5
+signal IO_A6
+signal IO_A7
+signal IO_A8
+signal IO_A10
+signal IO_A11
+signal IO_A12
+signal IO_A13
+signal IO_A14
+signal IO_A15
+signal IO_A16
+signal IO_A17
+signal IO_A19
+signal IO_A20
+signal IO_A21
+signal IO_A22
+signal IO_A23
+signal IO_B3
+signal IO_B4
+signal IO_B5
+signal IO_B6
+signal IO_B7
+signal IO_B8
+signal IO_B9
+signal IO_B10
+signal IO_B11
+signal IO_B12
+signal IO_B13
+signal IO_B14
+signal IO_B15
+signal IO_B16
+signal IO_B17
+signal IO_B18
+signal IO_B19
+signal IO_B20
+signal IO_B21
+signal IO_B22
+signal IO_B23
+signal IO_C4
+signal IO_C5
+signal IO_C6
+signal IO_C8
+signal IO_C9
+signal IO_C10
+signal IO_C12
+signal IO_C13
+signal IO_C14
+signal IO_C15
+signal IO_C17
+signal IO_C18
+signal IO_C19
+signal IO_C21
+signal IO_C22
+signal IO_C23
+signal IO_C25
+signal IO_C26
+signal IO_D1
+signal IO_D2
+signal IO_D5
+signal IO_D6
+signal IO_D7
+signal IO_D8
+signal IO_D9
+signal IO_D10
+signal IO_D11
+signal IO_D13
+signal IO_D14
+signal IO_D16
+signal IO_D17
+signal IO_D18
+signal IO_D19
+signal IO_D20
+signal IO_D21
+signal IO_D22
+signal IO_D25
+signal IO_D26
+signal IO_E1
+signal IO_E2
+signal IO_E3
+signal IO_E4
+signal IO_E5
+signal IO_E6
+signal IO_E7
+signal IO_E8
+signal IO_E9
+signal IO_E10
+signal IO_E11
+signal IO_E12
+signal IO_E13
+signal IO_E14
+signal IO_E15
+signal IO_E16
+signal IO_E17
+signal IO_E18
+signal IO_E19
+signal IO_E20
+signal IO_E21
+signal IO_E22
+signal IO_E23
+signal IO_E24
+signal IO_E25
+signal IO_E26
+signal IO_F1
+signal IO_F2
+signal IO_F3
+signal IO_F4
+signal IO_F5
+signal IO_F6
+signal IO_F7
+signal IO_F8
+signal IO_F9
+signal IO_F10
+signal IO_F11
+signal IO_F12
+signal IO_F13
+signal IO_F14
+signal IO_F15
+signal IO_F16
+signal IO_F17
+signal IO_F18
+signal IO_F19
+signal IO_F20
+signal IO_F21
+signal IO_F22
+signal IO_F23
+signal IO_F24
+signal IO_F25
+signal IO_F26
+signal IO_G1
+signal IO_G2
+signal IO_G4
+signal IO_G5
+signal IO_G6
+signal IO_G7
+signal IO_G8
+signal IO_G9
+signal IO_G10
+signal IO_G11
+signal IO_G12
+signal IO_G13
+signal IO_G14
+signal IO_G15
+signal IO_G16
+signal IO_G17
+signal IO_G18
+signal IO_G19
+signal IO_G20
+signal IO_G21
+signal IO_G22
+signal IO_G23
+signal IO_G25
+signal IO_G26
+signal IO_H1
+signal IO_H2
+signal IO_H3
+signal IO_H4
+signal IO_H5
+signal IO_H6
+signal IO_H7
+signal IO_H11
+signal IO_H12
+signal IO_H13
+signal IO_H14
+signal IO_H15
+signal IO_H16
+signal IO_H20
+signal IO_H21
+signal IO_H22
+signal IO_H23
+signal IO_H24
+signal IO_H25
+signal IO_H26
+signal IO_J2
+signal IO_J3
+signal IO_J4
+signal IO_J5
+signal IO_J6
+signal IO_J7
+signal IO_J20
+signal IO_J21
+signal IO_J22
+signal IO_J23
+signal IO_J24
+signal IO_J25
+signal IO_K1
+signal IO_K2
+signal IO_K3
+signal IO_K4
+signal IO_K5
+signal IO_K6
+signal IO_K7
+signal IO_K20
+signal IO_K21
+signal IO_K22
+signal IO_K23
+signal IO_K24
+signal IO_K25
+signal IO_K26
+signal IO_L1
+signal IO_L2
+signal IO_L4
+signal IO_L5
+signal IO_L6
+signal IO_L7
+signal IO_L8
+signal IO_L19
+signal IO_L20
+signal IO_L21
+signal IO_L22
+signal IO_L23
+signal IO_L25
+signal IO_L26
+signal IO_M1
+signal IO_M2
+signal IO_M3
+signal IO_M5
+signal IO_M6
+signal IO_M7
+signal IO_M8
+signal IO_M19
+signal IO_M20
+signal IO_M21
+signal IO_M22
+signal IO_M24
+signal IO_M25
+signal IO_M26
+signal IO_N1
+signal IO_N2
+signal IO_N3
+signal IO_N4
+signal IO_N5
+signal IO_N6
+signal IO_N7
+signal IO_N8
+signal IO_N19
+signal IO_N20
+signal IO_N21
+signal IO_N22
+signal IO_N23
+signal IO_N24
+signal IO_N25
+signal IO_N26
+signal IO_P1
+signal IO_P2
+signal IO_P3
+signal IO_P4
+signal IO_P5
+signal IO_P6
+signal IO_P7
+signal IO_P8
+signal IO_P19
+signal IO_P20
+signal IO_P21
+signal IO_P22
+signal IO_P23
+signal IO_P24
+signal IO_P25
+signal IO_P26
+signal IO_R1
+signal IO_R2
+signal IO_R3
+signal IO_R5
+signal IO_R6
+signal IO_R7
+signal IO_R8
+signal IO_R19
+signal IO_R20
+signal IO_R21
+signal IO_R22
+signal IO_R24
+signal IO_R25
+signal IO_R26
+signal IO_T1
+signal IO_T2
+signal IO_T4
+signal IO_T5
+signal IO_T6
+signal IO_T7
+signal IO_T8
+signal IO_T19
+signal IO_T20
+signal IO_T21
+signal IO_T22
+signal IO_T23
+signal IO_T25
+signal IO_T26
+signal IO_U1
+signal IO_U2
+signal IO_U3
+signal IO_U4
+signal IO_U5
+signal IO_U6
+signal IO_U7
+signal IO_U20
+signal IO_U21
+signal IO_U22
+signal IO_U23
+signal IO_U24
+signal IO_U25
+signal IO_U26
+signal IO_V2
+signal IO_V3
+signal IO_V4
+signal IO_V5
+signal IO_V6
+signal IO_V7
+signal IO_V20
+signal IO_V21
+signal IO_V22
+signal IO_V23
+signal IO_V24
+signal IO_V25
+signal IO_W1
+signal IO_W2
+signal IO_W3
+signal IO_W4
+signal IO_W5
+signal IO_W6
+signal IO_W7
+signal IO_W11
+signal IO_W12
+signal IO_W13
+signal IO_W14
+signal IO_W15
+signal IO_W16
+signal IO_W20
+signal IO_W21
+signal IO_W22
+signal IO_W23
+signal IO_W24
+signal IO_W25
+signal IO_W26
+signal IO_Y1
+signal IO_Y2
+signal IO_Y4
+signal IO_Y5
+signal IO_Y6
+signal IO_Y7
+signal IO_Y8
+signal IO_Y9
+signal IO_Y10
+signal IO_Y11
+signal IO_Y12
+signal IO_Y13
+signal IO_Y14
+signal IO_Y15
+signal IO_Y16
+signal IO_Y17
+signal IO_Y18
+signal IO_Y19
+signal IO_Y20
+signal IO_Y21
+signal IO_Y22
+signal IO_Y23
+signal IO_Y25
+signal IO_Y26
+signal IO_AA1
+signal IO_AA2
+signal IO_AA3
+signal IO_AA4
+signal IO_AA5
+signal IO_AA6
+signal IO_AA7
+signal IO_AA8
+signal IO_AA9
+signal IO_AA10
+signal IO_AA11
+signal IO_AA12
+signal IO_AA13
+signal IO_AA14
+signal IO_AA15
+signal IO_AA16
+signal IO_AA17
+signal IO_AA18
+signal IO_AA19
+signal IO_AA20
+signal IO_AA21
+signal IO_AA22
+signal IO_AA23
+signal IO_AA24
+signal IO_AA25
+signal IO_AA26
+signal IO_AB1
+signal IO_AB2
+signal IO_AB3
+signal IO_AB4
+signal IO_AB5
+signal IO_AB6
+signal IO_AB7
+signal IO_AB8
+signal IO_AB9
+signal IO_AB10
+signal IO_AB11
+signal IO_AB12
+signal IO_AB13
+signal IO_AB14
+signal IO_AB15
+signal IO_AB16
+signal IO_AB17
+signal IO_AB18
+signal IO_AB19
+signal IO_AB20
+signal IO_AB21
+signal IO_AB22
+signal IO_AB23
+signal IO_AB24
+signal IO_AB25
+signal IO_AB26
+signal IO_AC1
+signal IO_AC2
+signal IO_AC5
+signal IO_AC6
+signal IO_AC7
+signal IO_AC8
+signal IO_AC9
+signal IO_AC10
+signal IO_AC11
+signal IO_AC13
+signal IO_AC14
+signal IO_AC16
+signal IO_AC17
+signal IO_AC18
+signal IO_AC19
+signal IO_AC20
+signal IO_AC21
+signal IO_AC22
+signal IO_AC25
+signal IO_AC26
+signal IO_AD1
+signal IO_AD2
+signal IO_AD4
+signal IO_AD5
+signal IO_AD6
+signal IO_AD8
+signal IO_AD9
+signal IO_AD10
+signal IO_AD12
+signal IO_AD13
+signal IO_AD14
+signal IO_AD15
+signal IO_AD17
+signal IO_AD18
+signal IO_AD19
+signal IO_AD21
+signal IO_AD22
+signal IO_AD23
+signal IO_AD25
+signal IO_AE4
+signal IO_AE5
+signal IO_AE6
+signal IO_AE7
+signal IO_AE8
+signal IO_AE9
+signal IO_AE10
+signal IO_AE11
+signal IO_AE12
+signal IO_AE13
+signal IO_AE14
+signal IO_AE15
+signal IO_AE16
+signal IO_AE17
+signal IO_AE18
+signal IO_AE19
+signal IO_AE20
+signal IO_AE21
+signal IO_AE22
+signal IO_AE23
+signal IO_AE24
+signal IO_AF4
+signal IO_AF5
+signal IO_AF6
+signal IO_AF7
+signal IO_AF8
+signal IO_AF10
+signal IO_AF11
+signal IO_AF12
+signal IO_AF13
+signal IO_AF14
+signal IO_AF15
+signal IO_AF16
+signal IO_AF17
+signal IO_AF19
+signal IO_AF20
+signal IO_AF21
+signal IO_AF22
+signal IO_AF23
+
+register BSR 1931
+register BR 1
+register DIR 32
+
+instruction length 6
+
+instruction EXTEST 000000 BSR
+instruction SAMPLE/PRELOAD 000001 BSR
+instruction IDCODE 001001 DIR
+instruction BYPASS 111111 BR
+
+bit 1930 I 1 IO_C25
+bit 1929 O 1 IO_C25 1928 1 Z
+bit 1928 C 1 *
+bit 1927 I 1 IO_C26
+bit 1926 O 1 IO_C26 1925 1 Z
+bit 1925 C 1 *
+bit 1924 I 1 IO_E23
+bit 1923 O 1 IO_E23 1922 1 Z
+bit 1922 C 1 *
+bit 1921 I 1 IO_E24
+bit 1920 O 1 IO_E24 1919 1 Z
+bit 1919 C 1 *
+bit 1918 I 1 IO_D25
+bit 1917 O 1 IO_D25 1916 1 Z
+bit 1916 C 1 *
+bit 1915 I 1 IO_D26
+bit 1914 O 1 IO_D26 1913 1 Z
+bit 1913 C 1 *
+bit 1912 I 1 IO_F22
+bit 1911 O 1 IO_F22 1910 1 Z
+bit 1910 C 1 *
+bit 1909 O 1 *
+bit 1908 O 1 *
+bit 1907 O 1 *
+bit 1906 I 1 IO_E25
+bit 1905 O 1 IO_E25 1904 1 Z
+bit 1904 C 1 *
+bit 1903 I 1 IO_E26
+bit 1902 O 1 IO_E26 1901 1 Z
+bit 1901 C 1 *
+bit 1900 I 1 IO_G20
+bit 1899 O 1 IO_G20 1898 1 Z
+bit 1898 C 1 *
+bit 1897 I 1 IO_G21
+bit 1896 O 1 IO_G21 1895 1 Z
+bit 1895 C 1 *
+bit 1894 I 1 IO_F23
+bit 1893 O 1 IO_F23 1892 1 Z
+bit 1892 C 1 *
+bit 1891 I 1 IO_F24
+bit 1890 O 1 IO_F24 1889 1 Z
+bit 1889 C 1 *
+bit 1888 I 1 IO_G22
+bit 1887 O 1 IO_G22 1886 1 Z
+bit 1886 C 1 *
+bit 1885 I 1 IO_G23
+bit 1884 O 1 IO_G23 1883 1 Z
+bit 1883 C 1 *
+bit 1882 I 1 IO_F25
+bit 1881 O 1 IO_F25 1880 1 Z
+bit 1880 C 1 *
+bit 1879 I 1 IO_F26
+bit 1878 O 1 IO_F26 1877 1 Z
+bit 1877 C 1 *
+bit 1876 I 1 IO_G25
+bit 1875 O 1 IO_G25 1874 1 Z
+bit 1874 C 1 *
+bit 1873 I 1 IO_G26
+bit 1872 O 1 IO_G26 1871 1 Z
+bit 1871 C 1 *
+bit 1870 O 1 *
+bit 1869 O 1 *
+bit 1868 O 1 *
+bit 1867 O 1 *
+bit 1866 O 1 *
+bit 1865 O 1 *
+bit 1864 O 1 *
+bit 1863 O 1 *
+bit 1862 O 1 *
+bit 1861 O 1 *
+bit 1860 O 1 *
+bit 1859 O 1 *
+bit 1858 O 1 *
+bit 1857 O 1 *
+bit 1856 O 1 *
+bit 1855 O 1 *
+bit 1854 O 1 *
+bit 1853 O 1 *
+bit 1852 I 1 IO_H20
+bit 1851 O 1 IO_H20 1850 1 Z
+bit 1850 C 1 *
+bit 1849 I 1 IO_H21
+bit 1848 O 1 IO_H21 1847 1 Z
+bit 1847 C 1 *
+bit 1846 O 1 *
+bit 1845 O 1 *
+bit 1844 O 1 *
+bit 1843 O 1 *
+bit 1842 O 1 *
+bit 1841 O 1 *
+bit 1840 I 1 IO_H22
+bit 1839 O 1 IO_H22 1838 1 Z
+bit 1838 C 1 *
+bit 1837 I 1 IO_J21
+bit 1836 O 1 IO_J21 1835 1 Z
+bit 1835 C 1 *
+bit 1834 I 1 IO_H23
+bit 1833 O 1 IO_H23 1832 1 Z
+bit 1832 C 1 *
+bit 1831 I 1 IO_H24
+bit 1830 O 1 IO_H24 1829 1 Z
+bit 1829 C 1 *
+bit 1828 O 1 *
+bit 1827 O 1 *
+bit 1826 O 1 *
+bit 1825 O 1 *
+bit 1824 O 1 *
+bit 1823 O 1 *
+bit 1822 I 1 IO_H25
+bit 1821 O 1 IO_H25 1820 1 Z
+bit 1820 C 1 *
+bit 1819 I 1 IO_H26
+bit 1818 O 1 IO_H26 1817 1 Z
+bit 1817 C 1 *
+bit 1816 I 1 IO_J20
+bit 1815 O 1 IO_J20 1814 1 Z
+bit 1814 C 1 *
+bit 1813 I 1 IO_K20
+bit 1812 O 1 IO_K20 1811 1 Z
+bit 1811 C 1 *
+bit 1810 I 1 IO_J22
+bit 1809 O 1 IO_J22 1808 1 Z
+bit 1808 C 1 *
+bit 1807 I 1 IO_J23
+bit 1806 O 1 IO_J23 1805 1 Z
+bit 1805 C 1 *
+bit 1804 I 1 IO_J24
+bit 1803 O 1 IO_J24 1802 1 Z
+bit 1802 C 1 *
+bit 1801 I 1 IO_J25
+bit 1800 O 1 IO_J25 1799 1 Z
+bit 1799 C 1 *
+bit 1798 I 1 IO_K21
+bit 1797 O 1 IO_K21 1796 1 Z
+bit 1796 C 1 *
+bit 1795 I 1 IO_K22
+bit 1794 O 1 IO_K22 1793 1 Z
+bit 1793 C 1 *
+bit 1792 I 1 IO_K23
+bit 1791 O 1 IO_K23 1790 1 Z
+bit 1790 C 1 *
+bit 1789 I 1 IO_K24
+bit 1788 O 1 IO_K24 1787 1 Z
+bit 1787 C 1 *
+bit 1786 O 1 *
+bit 1785 O 1 *
+bit 1784 O 1 *
+bit 1783 O 1 *
+bit 1782 O 1 *
+bit 1781 O 1 *
+bit 1780 I 1 IO_K25
+bit 1779 O 1 IO_K25 1778 1 Z
+bit 1778 C 1 *
+bit 1777 I 1 IO_K26
+bit 1776 O 1 IO_K26 1775 1 Z
+bit 1775 C 1 *
+bit 1774 I 1 IO_L19
+bit 1773 O 1 IO_L19 1772 1 Z
+bit 1772 C 1 *
+bit 1771 I 1 IO_L20
+bit 1770 O 1 IO_L20 1769 1 Z
+bit 1769 C 1 *
+bit 1768 I 1 IO_L21
+bit 1767 O 1 IO_L21 1766 1 Z
+bit 1766 C 1 *
+bit 1765 I 1 IO_L22
+bit 1764 O 1 IO_L22 1763 1 Z
+bit 1763 C 1 *
+bit 1762 I 1 IO_L25
+bit 1761 O 1 IO_L25 1760 1 Z
+bit 1760 C 1 *
+bit 1759 I 1 IO_L26
+bit 1758 O 1 IO_L26 1757 1 Z
+bit 1757 C 1 *
+bit 1756 O 1 *
+bit 1755 O 1 *
+bit 1754 O 1 *
+bit 1753 O 1 *
+bit 1752 O 1 *
+bit 1751 O 1 *
+bit 1750 I 1 IO_M19
+bit 1749 O 1 IO_M19 1748 1 Z
+bit 1748 C 1 *
+bit 1747 I 1 IO_M20
+bit 1746 O 1 IO_M20 1745 1 Z
+bit 1745 C 1 *
+bit 1744 I 1 IO_M21
+bit 1743 O 1 IO_M21 1742 1 Z
+bit 1742 C 1 *
+bit 1741 I 1 IO_M22
+bit 1740 O 1 IO_M22 1739 1 Z
+bit 1739 C 1 *
+bit 1738 I 1 IO_L23
+bit 1737 O 1 IO_L23 1736 1 Z
+bit 1736 C 1 *
+bit 1735 I 1 IO_M24
+bit 1734 O 1 IO_M24 1733 1 Z
+bit 1733 C 1 *
+bit 1732 I 1 IO_M25
+bit 1731 O 1 IO_M25 1730 1 Z
+bit 1730 C 1 *
+bit 1729 I 1 IO_M26
+bit 1728 O 1 IO_M26 1727 1 Z
+bit 1727 C 1 *
+bit 1726 I 1 IO_N19
+bit 1725 O 1 IO_N19 1724 1 Z
+bit 1724 C 1 *
+bit 1723 I 1 IO_N20
+bit 1722 O 1 IO_N20 1721 1 Z
+bit 1721 C 1 *
+bit 1720 O 1 *
+bit 1719 O 1 *
+bit 1718 O 1 *
+bit 1717 O 1 *
+bit 1716 O 1 *
+bit 1715 O 1 *
+bit 1714 O 1 *
+bit 1713 O 1 *
+bit 1712 O 1 *
+bit 1711 O 1 *
+bit 1710 O 1 *
+bit 1709 O 1 *
+bit 1708 I 1 IO_N21
+bit 1707 O 1 IO_N21 1706 1 Z
+bit 1706 C 1 *
+bit 1705 I 1 IO_N22
+bit 1704 O 1 IO_N22 1703 1 Z
+bit 1703 C 1 *
+bit 1702 I 1 IO_N23
+bit 1701 O 1 IO_N23 1700 1 Z
+bit 1700 C 1 *
+bit 1699 I 1 IO_N24
+bit 1698 O 1 IO_N24 1697 1 Z
+bit 1697 C 1 *
+bit 1696 I 1 IO_N25
+bit 1695 O 1 IO_N25 1694 1 Z
+bit 1694 C 1 *
+bit 1693 I 1 IO_N26
+bit 1692 O 1 IO_N26 1691 1 Z
+bit 1691 C 1 *
+bit 1690 I 1 IO_P26
+bit 1689 O 1 IO_P26 1688 1 Z
+bit 1688 C 1 *
+bit 1687 I 1 IO_P25
+bit 1686 O 1 IO_P25 1685 1 Z
+bit 1685 C 1 *
+bit 1684 I 1 IO_P24
+bit 1683 O 1 IO_P24 1682 1 Z
+bit 1682 C 1 *
+bit 1681 I 1 IO_P23
+bit 1680 O 1 IO_P23 1679 1 Z
+bit 1679 C 1 *
+bit 1678 I 1 IO_P22
+bit 1677 O 1 IO_P22 1676 1 Z
+bit 1676 C 1 *
+bit 1675 I 1 IO_P21
+bit 1674 O 1 IO_P21 1673 1 Z
+bit 1673 C 1 *
+bit 1672 O 1 *
+bit 1671 O 1 *
+bit 1670 O 1 *
+bit 1669 O 1 *
+bit 1668 O 1 *
+bit 1667 O 1 *
+bit 1666 O 1 *
+bit 1665 O 1 *
+bit 1664 O 1 *
+bit 1663 O 1 *
+bit 1662 O 1 *
+bit 1661 O 1 *
+bit 1660 I 1 IO_P20
+bit 1659 O 1 IO_P20 1658 1 Z
+bit 1658 C 1 *
+bit 1657 I 1 IO_P19
+bit 1656 O 1 IO_P19 1655 1 Z
+bit 1655 C 1 *
+bit 1654 I 1 IO_R26
+bit 1653 O 1 IO_R26 1652 1 Z
+bit 1652 C 1 *
+bit 1651 I 1 IO_R25
+bit 1650 O 1 IO_R25 1649 1 Z
+bit 1649 C 1 *
+bit 1648 I 1 IO_R24
+bit 1647 O 1 IO_R24 1646 1 Z
+bit 1646 C 1 *
+bit 1645 I 1 IO_T23
+bit 1644 O 1 IO_T23 1643 1 Z
+bit 1643 C 1 *
+bit 1642 I 1 IO_R22
+bit 1641 O 1 IO_R22 1640 1 Z
+bit 1640 C 1 *
+bit 1639 I 1 IO_R21
+bit 1638 O 1 IO_R21 1637 1 Z
+bit 1637 C 1 *
+bit 1636 I 1 IO_R20
+bit 1635 O 1 IO_R20 1634 1 Z
+bit 1634 C 1 *
+bit 1633 I 1 IO_R19
+bit 1632 O 1 IO_R19 1631 1 Z
+bit 1631 C 1 *
+bit 1630 O 1 *
+bit 1629 O 1 *
+bit 1628 O 1 *
+bit 1627 O 1 *
+bit 1626 O 1 *
+bit 1625 O 1 *
+bit 1624 I 1 IO_T26
+bit 1623 O 1 IO_T26 1622 1 Z
+bit 1622 C 1 *
+bit 1621 I 1 IO_T25
+bit 1620 O 1 IO_T25 1619 1 Z
+bit 1619 C 1 *
+bit 1618 I 1 IO_T22
+bit 1617 O 1 IO_T22 1616 1 Z
+bit 1616 C 1 *
+bit 1615 I 1 IO_T21
+bit 1614 O 1 IO_T21 1613 1 Z
+bit 1613 C 1 *
+bit 1612 I 1 IO_T20
+bit 1611 O 1 IO_T20 1610 1 Z
+bit 1610 C 1 *
+bit 1609 I 1 IO_T19
+bit 1608 O 1 IO_T19 1607 1 Z
+bit 1607 C 1 *
+bit 1606 I 1 IO_U26
+bit 1605 O 1 IO_U26 1604 1 Z
+bit 1604 C 1 *
+bit 1603 I 1 IO_U25
+bit 1602 O 1 IO_U25 1601 1 Z
+bit 1601 C 1 *
+bit 1600 O 1 *
+bit 1599 O 1 *
+bit 1598 O 1 *
+bit 1597 O 1 *
+bit 1596 O 1 *
+bit 1595 O 1 *
+bit 1594 I 1 IO_U24
+bit 1593 O 1 IO_U24 1592 1 Z
+bit 1592 C 1 *
+bit 1591 I 1 IO_U23
+bit 1590 O 1 IO_U23 1589 1 Z
+bit 1589 C 1 *
+bit 1588 I 1 IO_U22
+bit 1587 O 1 IO_U22 1586 1 Z
+bit 1586 C 1 *
+bit 1585 I 1 IO_U21
+bit 1584 O 1 IO_U21 1583 1 Z
+bit 1583 C 1 *
+bit 1582 I 1 IO_V25
+bit 1581 O 1 IO_V25 1580 1 Z
+bit 1580 C 1 *
+bit 1579 I 1 IO_V24
+bit 1578 O 1 IO_V24 1577 1 Z
+bit 1577 C 1 *
+bit 1576 I 1 IO_V23
+bit 1575 O 1 IO_V23 1574 1 Z
+bit 1574 C 1 *
+bit 1573 I 1 IO_V22
+bit 1572 O 1 IO_V22 1571 1 Z
+bit 1571 C 1 *
+bit 1570 I 1 IO_U20
+bit 1569 O 1 IO_U20 1568 1 Z
+bit 1568 C 1 *
+bit 1567 I 1 IO_V20
+bit 1566 O 1 IO_V20 1565 1 Z
+bit 1565 C 1 *
+bit 1564 I 1 IO_W26
+bit 1563 O 1 IO_W26 1562 1 Z
+bit 1562 C 1 *
+bit 1561 I 1 IO_W25
+bit 1560 O 1 IO_W25 1559 1 Z
+bit 1559 C 1 *
+bit 1558 O 1 *
+bit 1557 O 1 *
+bit 1556 O 1 *
+bit 1555 O 1 *
+bit 1554 O 1 *
+bit 1553 O 1 *
+bit 1552 I 1 IO_W24
+bit 1551 O 1 IO_W24 1550 1 Z
+bit 1550 C 1 *
+bit 1549 I 1 IO_W23
+bit 1548 O 1 IO_W23 1547 1 Z
+bit 1547 C 1 *
+bit 1546 I 1 IO_V21
+bit 1545 O 1 IO_V21 1544 1 Z
+bit 1544 C 1 *
+bit 1543 I 1 IO_W22
+bit 1542 O 1 IO_W22 1541 1 Z
+bit 1541 C 1 *
+bit 1540 O 1 *
+bit 1539 O 1 *
+bit 1538 O 1 *
+bit 1537 O 1 *
+bit 1536 O 1 *
+bit 1535 O 1 *
+bit 1534 I 1 IO_Y26
+bit 1533 O 1 IO_Y26 1532 1 Z
+bit 1532 C 1 *
+bit 1531 I 1 IO_Y25
+bit 1530 O 1 IO_Y25 1529 1 Z
+bit 1529 C 1 *
+bit 1528 O 1 *
+bit 1527 O 1 *
+bit 1526 O 1 *
+bit 1525 O 1 *
+bit 1524 O 1 *
+bit 1523 O 1 *
+bit 1522 O 1 *
+bit 1521 O 1 *
+bit 1520 O 1 *
+bit 1519 O 1 *
+bit 1518 O 1 *
+bit 1517 O 1 *
+bit 1516 O 1 *
+bit 1515 O 1 *
+bit 1514 O 1 *
+bit 1513 O 1 *
+bit 1512 O 1 *
+bit 1511 O 1 *
+bit 1510 I 1 IO_W21
+bit 1509 O 1 IO_W21 1508 1 Z
+bit 1508 C 1 *
+bit 1507 I 1 IO_W20
+bit 1506 O 1 IO_W20 1505 1 Z
+bit 1505 C 1 *
+bit 1504 I 1 IO_AA26
+bit 1503 O 1 IO_AA26 1502 1 Z
+bit 1502 C 1 *
+bit 1501 I 1 IO_AA25
+bit 1500 O 1 IO_AA25 1499 1 Z
+bit 1499 C 1 *
+bit 1498 I 1 IO_Y23
+bit 1497 O 1 IO_Y23 1496 1 Z
+bit 1496 C 1 *
+bit 1495 I 1 IO_Y22
+bit 1494 O 1 IO_Y22 1493 1 Z
+bit 1493 C 1 *
+bit 1492 I 1 IO_AA24
+bit 1491 O 1 IO_AA24 1490 1 Z
+bit 1490 C 1 *
+bit 1489 I 1 IO_AA23
+bit 1488 O 1 IO_AA23 1487 1 Z
+bit 1487 C 1 *
+bit 1486 I 1 IO_AB26
+bit 1485 O 1 IO_AB26 1484 1 Z
+bit 1484 C 1 *
+bit 1483 I 1 IO_AB25
+bit 1482 O 1 IO_AB25 1481 1 Z
+bit 1481 C 1 *
+bit 1480 I 1 IO_Y21
+bit 1479 O 1 IO_Y21 1478 1 Z
+bit 1478 C 1 *
+bit 1477 I 1 IO_Y20
+bit 1476 O 1 IO_Y20 1475 1 Z
+bit 1475 C 1 *
+bit 1474 O 1 *
+bit 1473 O 1 *
+bit 1472 O 1 *
+bit 1471 O 1 *
+bit 1470 O 1 *
+bit 1469 O 1 *
+bit 1468 I 1 IO_AC26
+bit 1467 O 1 IO_AC26 1466 1 Z
+bit 1466 C 1 *
+bit 1465 I 1 IO_AC25
+bit 1464 O 1 IO_AC25 1463 1 Z
+bit 1463 C 1 *
+bit 1462 I 1 IO_AB24
+bit 1461 O 1 IO_AB24 1460 1 Z
+bit 1460 C 1 *
+bit 1459 I 1 IO_AB23
+bit 1458 O 1 IO_AB23 1457 1 Z
+bit 1457 C 1 *
+bit 1456 I 1 IO_AA22
+bit 1455 O 1 IO_AA22 1454 1 Z
+bit 1454 C 1 *
+bit 1453 I 1 IO_AA21
+bit 1452 O 1 IO_AA21 1451 1 Z
+bit 1451 C 1 *
+bit 1450 I 1 CCLK_AD26
+bit 1449 O 1 CCLK_AD26 1448 1 Z
+bit 1448 C 1 *
+bit 1447 I 1 DONE_AC24
+bit 1446 O 1 DONE_AC24 1445 1 Z
+bit 1445 C 1 *
+bit 1444 I 1 IO_AD25
+bit 1443 O 1 IO_AD25 1442 1 Z
+bit 1442 C 1 *
+bit 1441 I 1 IO_AB22
+bit 1440 O 1 IO_AB22 1439 1 Z
+bit 1439 C 1 *
+bit 1438 I 1 IO_AC22
+bit 1437 O 1 IO_AC22 1436 1 Z
+bit 1436 C 1 *
+bit 1435 O 1 *
+bit 1434 O 1 *
+bit 1433 O 1 *
+bit 1432 O 1 *
+bit 1431 O 1 *
+bit 1430 O 1 *
+bit 1429 O 1 *
+bit 1428 O 1 *
+bit 1427 O 1 *
+bit 1426 O 1 *
+bit 1425 O 1 *
+bit 1424 O 1 *
+bit 1423 O 1 *
+bit 1422 O 1 *
+bit 1421 O 1 *
+bit 1420 I 1 IO_AE24
+bit 1419 O 1 IO_AE24 1418 1 Z
+bit 1418 C 1 *
+bit 1417 I 1 IO_AF24
+bit 1416 O 1 IO_AF24 1415 1 Z
+bit 1415 C 1 *
+bit 1414 I 1 IO_AD23
+bit 1413 O 1 IO_AD23 1412 1 Z
+bit 1412 C 1 *
+bit 1411 I 1 IO_AE23
+bit 1410 O 1 IO_AE23 1409 1 Z
+bit 1409 C 1 *
+bit 1408 I 1 IO_AF23
+bit 1407 O 1 IO_AF23 1406 1 Z
+bit 1406 C 1 *
+bit 1405 I 1 IO_AD22
+bit 1404 O 1 IO_AD22 1403 1 Z
+bit 1403 C 1 *
+bit 1402 I 1 IO_AE22
+bit 1401 O 1 IO_AE22 1400 1 Z
+bit 1400 C 1 *
+bit 1399 I 1 IO_AF22
+bit 1398 O 1 IO_AF22 1397 1 Z
+bit 1397 C 1 *
+bit 1396 I 1 IO_AB21
+bit 1395 O 1 IO_AB21 1394 1 Z
+bit 1394 C 1 *
+bit 1393 I 1 IO_AC21
+bit 1392 O 1 IO_AC21 1391 1 Z
+bit 1391 C 1 *
+bit 1390 I 1 IO_AD21
+bit 1389 O 1 IO_AD21 1388 1 Z
+bit 1388 C 1 *
+bit 1387 I 1 IO_AE21
+bit 1386 O 1 IO_AE21 1385 1 Z
+bit 1385 C 1 *
+bit 1384 I 1 IO_AF21
+bit 1383 O 1 IO_AF21 1382 1 Z
+bit 1382 C 1 *
+bit 1381 I 1 IO_AB20
+bit 1380 O 1 IO_AB20 1379 1 Z
+bit 1379 C 1 *
+bit 1378 I 1 IO_AC20
+bit 1377 O 1 IO_AC20 1376 1 Z
+bit 1376 C 1 *
+bit 1375 I 1 IO_AE20
+bit 1374 O 1 IO_AE20 1373 1 Z
+bit 1373 C 1 *
+bit 1372 I 1 IO_AF20
+bit 1371 O 1 IO_AF20 1370 1 Z
+bit 1370 C 1 *
+bit 1369 I 1 IO_AA20
+bit 1368 O 1 IO_AA20 1367 1 Z
+bit 1367 C 1 *
+bit 1366 I 1 IO_Y19
+bit 1365 O 1 IO_Y19 1364 1 Z
+bit 1364 C 1 *
+bit 1363 I 1 IO_AA19
+bit 1362 O 1 IO_AA19 1361 1 Z
+bit 1361 C 1 *
+bit 1360 I 1 IO_AB19
+bit 1359 O 1 IO_AB19 1358 1 Z
+bit 1358 C 1 *
+bit 1357 I 1 IO_AC19
+bit 1356 O 1 IO_AC19 1355 1 Z
+bit 1355 C 1 *
+bit 1354 O 1 *
+bit 1353 O 1 *
+bit 1352 O 1 *
+bit 1351 O 1 *
+bit 1350 O 1 *
+bit 1349 O 1 *
+bit 1348 O 1 *
+bit 1347 O 1 *
+bit 1346 O 1 *
+bit 1345 O 1 *
+bit 1344 O 1 *
+bit 1343 O 1 *
+bit 1342 O 1 *
+bit 1341 O 1 *
+bit 1340 O 1 *
+bit 1339 I 1 IO_AD19
+bit 1338 O 1 IO_AD19 1337 1 Z
+bit 1337 C 1 *
+bit 1336 I 1 IO_AE19
+bit 1335 O 1 IO_AE19 1334 1 Z
+bit 1334 C 1 *
+bit 1333 I 1 IO_AF19
+bit 1332 O 1 IO_AF19 1331 1 Z
+bit 1331 C 1 *
+bit 1330 I 1 IO_Y18
+bit 1329 O 1 IO_Y18 1328 1 Z
+bit 1328 C 1 *
+bit 1327 I 1 IO_AA18
+bit 1326 O 1 IO_AA18 1325 1 Z
+bit 1325 C 1 *
+bit 1324 O 1 *
+bit 1323 O 1 *
+bit 1322 O 1 *
+bit 1321 I 1 IO_AB18
+bit 1320 O 1 IO_AB18 1319 1 Z
+bit 1319 C 1 *
+bit 1318 I 1 IO_AC18
+bit 1317 O 1 IO_AC18 1316 1 Z
+bit 1316 C 1 *
+bit 1315 I 1 IO_AD18
+bit 1314 O 1 IO_AD18 1313 1 Z
+bit 1313 C 1 *
+bit 1312 I 1 IO_AE18
+bit 1311 O 1 IO_AE18 1310 1 Z
+bit 1310 C 1 *
+bit 1309 I 1 IO_Y17
+bit 1308 O 1 IO_Y17 1307 1 Z
+bit 1307 C 1 *
+bit 1306 I 1 IO_AC17
+bit 1305 O 1 IO_AC17 1304 1 Z
+bit 1304 C 1 *
+bit 1303 I 1 IO_AA17
+bit 1302 O 1 IO_AA17 1301 1 Z
+bit 1301 C 1 *
+bit 1300 O 1 *
+bit 1299 O 1 *
+bit 1298 O 1 *
+bit 1297 O 1 *
+bit 1296 O 1 *
+bit 1295 O 1 *
+bit 1294 O 1 *
+bit 1293 O 1 *
+bit 1292 O 1 *
+bit 1291 O 1 *
+bit 1290 O 1 *
+bit 1289 O 1 *
+bit 1288 O 1 *
+bit 1287 O 1 *
+bit 1286 O 1 *
+bit 1285 I 1 IO_AD17
+bit 1284 O 1 IO_AD17 1283 1 Z
+bit 1283 C 1 *
+bit 1282 I 1 IO_AB17
+bit 1281 O 1 IO_AB17 1280 1 Z
+bit 1280 C 1 *
+bit 1279 I 1 IO_W16
+bit 1278 O 1 IO_W16 1277 1 Z
+bit 1277 C 1 *
+bit 1276 I 1 IO_AE17
+bit 1275 O 1 IO_AE17 1274 1 Z
+bit 1274 C 1 *
+bit 1273 I 1 IO_AF17
+bit 1272 O 1 IO_AF17 1271 1 Z
+bit 1271 C 1 *
+bit 1270 I 1 IO_Y16
+bit 1269 O 1 IO_Y16 1268 1 Z
+bit 1268 C 1 *
+bit 1267 I 1 IO_AA16
+bit 1266 O 1 IO_AA16 1265 1 Z
+bit 1265 C 1 *
+bit 1264 O 1 *
+bit 1263 O 1 *
+bit 1262 O 1 *
+bit 1261 I 1 IO_AB16
+bit 1260 O 1 IO_AB16 1259 1 Z
+bit 1259 C 1 *
+bit 1258 I 1 IO_AC16
+bit 1257 O 1 IO_AC16 1256 1 Z
+bit 1256 C 1 *
+bit 1255 I 1 IO_AE16
+bit 1254 O 1 IO_AE16 1253 1 Z
+bit 1253 C 1 *
+bit 1252 I 1 IO_AF16
+bit 1251 O 1 IO_AF16 1250 1 Z
+bit 1250 C 1 *
+bit 1249 I 1 IO_W15
+bit 1248 O 1 IO_W15 1247 1 Z
+bit 1247 C 1 *
+bit 1246 I 1 IO_Y15
+bit 1245 O 1 IO_Y15 1244 1 Z
+bit 1244 C 1 *
+bit 1243 I 1 IO_W14
+bit 1242 O 1 IO_W14 1241 1 Z
+bit 1241 C 1 *
+bit 1240 I 1 IO_AA15
+bit 1239 O 1 IO_AA15 1238 1 Z
+bit 1238 C 1 *
+bit 1237 I 1 IO_AB15
+bit 1236 O 1 IO_AB15 1235 1 Z
+bit 1235 C 1 *
+bit 1234 I 1 IO_AD15
+bit 1233 O 1 IO_AD15 1232 1 Z
+bit 1232 C 1 *
+bit 1231 I 1 IO_AE15
+bit 1230 O 1 IO_AE15 1229 1 Z
+bit 1229 C 1 *
+bit 1228 I 1 IO_AF15
+bit 1227 O 1 IO_AF15 1226 1 Z
+bit 1226 C 1 *
+bit 1225 I 1 IO_Y14
+bit 1224 O 1 IO_Y14 1223 1 Z
+bit 1223 C 1 *
+bit 1222 I 1 IO_AA14
+bit 1221 O 1 IO_AA14 1220 1 Z
+bit 1220 C 1 *
+bit 1219 I 1 IO_AB14
+bit 1218 O 1 IO_AB14 1217 1 Z
+bit 1217 C 1 *
+bit 1216 I 1 IO_AC14
+bit 1215 O 1 IO_AC14 1214 1 Z
+bit 1214 C 1 *
+bit 1213 I 1 IO_AD14
+bit 1212 O 1 IO_AD14 1211 1 Z
+bit 1211 C 1 *
+bit 1210 I 1 IO_AE14
+bit 1209 O 1 IO_AE14 1208 1 Z
+bit 1208 C 1 *
+bit 1207 I 1 IO_AF14
+bit 1206 O 1 IO_AF14 1205 1 Z
+bit 1205 C 1 *
+bit 1204 I 1 IO_AF13
+bit 1203 O 1 IO_AF13 1202 1 Z
+bit 1202 C 1 *
+bit 1201 I 1 IO_AE13
+bit 1200 O 1 IO_AE13 1199 1 Z
+bit 1199 C 1 *
+bit 1198 I 1 IO_AD13
+bit 1197 O 1 IO_AD13 1196 1 Z
+bit 1196 C 1 *
+bit 1195 I 1 IO_AC13
+bit 1194 O 1 IO_AC13 1193 1 Z
+bit 1193 C 1 *
+bit 1192 I 1 IO_AB13
+bit 1191 O 1 IO_AB13 1190 1 Z
+bit 1190 C 1 *
+bit 1189 I 1 IO_AA13
+bit 1188 O 1 IO_AA13 1187 1 Z
+bit 1187 C 1 *
+bit 1186 I 1 IO_Y13
+bit 1185 O 1 IO_Y13 1184 1 Z
+bit 1184 C 1 *
+bit 1183 I 1 IO_W13
+bit 1182 O 1 IO_W13 1181 1 Z
+bit 1181 C 1 *
+bit 1180 I 1 IO_AF12
+bit 1179 O 1 IO_AF12 1178 1 Z
+bit 1178 C 1 *
+bit 1177 I 1 IO_AE12
+bit 1176 O 1 IO_AE12 1175 1 Z
+bit 1175 C 1 *
+bit 1174 I 1 IO_AD12
+bit 1173 O 1 IO_AD12 1172 1 Z
+bit 1172 C 1 *
+bit 1171 I 1 IO_AB12
+bit 1170 O 1 IO_AB12 1169 1 Z
+bit 1169 C 1 *
+bit 1168 I 1 IO_AA12
+bit 1167 O 1 IO_AA12 1166 1 Z
+bit 1166 C 1 *
+bit 1165 I 1 IO_Y12
+bit 1164 O 1 IO_Y12 1163 1 Z
+bit 1163 C 1 *
+bit 1162 I 1 IO_W12
+bit 1161 O 1 IO_W12 1160 1 Z
+bit 1160 C 1 *
+bit 1159 I 1 IO_AC11
+bit 1158 O 1 IO_AC11 1157 1 Z
+bit 1157 C 1 *
+bit 1156 I 1 IO_AF11
+bit 1155 O 1 IO_AF11 1154 1 Z
+bit 1154 C 1 *
+bit 1153 I 1 IO_AE11
+bit 1152 O 1 IO_AE11 1151 1 Z
+bit 1151 C 1 *
+bit 1150 I 1 IO_AB11
+bit 1149 O 1 IO_AB11 1148 1 Z
+bit 1148 C 1 *
+bit 1147 I 1 IO_AA11
+bit 1146 O 1 IO_AA11 1145 1 Z
+bit 1145 C 1 *
+bit 1144 O 1 *
+bit 1143 O 1 *
+bit 1142 O 1 *
+bit 1141 I 1 IO_Y11
+bit 1140 O 1 IO_Y11 1139 1 Z
+bit 1139 C 1 *
+bit 1138 I 1 IO_W11
+bit 1137 O 1 IO_W11 1136 1 Z
+bit 1136 C 1 *
+bit 1135 I 1 IO_AF10
+bit 1134 O 1 IO_AF10 1133 1 Z
+bit 1133 C 1 *
+bit 1132 I 1 IO_AE10
+bit 1131 O 1 IO_AE10 1130 1 Z
+bit 1130 C 1 *
+bit 1129 I 1 IO_AD10
+bit 1128 O 1 IO_AD10 1127 1 Z
+bit 1127 C 1 *
+bit 1126 I 1 IO_AC10
+bit 1125 O 1 IO_AC10 1124 1 Z
+bit 1124 C 1 *
+bit 1123 I 1 IO_AB10
+bit 1122 O 1 IO_AB10 1121 1 Z
+bit 1121 C 1 *
+bit 1120 O 1 *
+bit 1119 O 1 *
+bit 1118 O 1 *
+bit 1117 O 1 *
+bit 1116 O 1 *
+bit 1115 O 1 *
+bit 1114 O 1 *
+bit 1113 O 1 *
+bit 1112 O 1 *
+bit 1111 O 1 *
+bit 1110 O 1 *
+bit 1109 O 1 *
+bit 1108 O 1 *
+bit 1107 O 1 *
+bit 1106 O 1 *
+bit 1105 I 1 IO_AA10
+bit 1104 O 1 IO_AA10 1103 1 Z
+bit 1103 C 1 *
+bit 1102 I 1 IO_Y10
+bit 1101 O 1 IO_Y10 1100 1 Z
+bit 1100 C 1 *
+bit 1099 O 1 *
+bit 1098 O 1 *
+bit 1097 O 1 *
+bit 1096 I 1 IO_AE9
+bit 1095 O 1 IO_AE9 1094 1 Z
+bit 1094 C 1 *
+bit 1093 I 1 IO_AD9
+bit 1092 O 1 IO_AD9 1091 1 Z
+bit 1091 C 1 *
+bit 1090 I 1 IO_AC9
+bit 1089 O 1 IO_AC9 1088 1 Z
+bit 1088 C 1 *
+bit 1087 O 1 *
+bit 1086 O 1 *
+bit 1085 O 1 *
+bit 1084 I 1 IO_AB9
+bit 1083 O 1 IO_AB9 1082 1 Z
+bit 1082 C 1 *
+bit 1081 I 1 IO_AA9
+bit 1080 O 1 IO_AA9 1079 1 Z
+bit 1079 C 1 *
+bit 1078 I 1 IO_Y9
+bit 1077 O 1 IO_Y9 1076 1 Z
+bit 1076 C 1 *
+bit 1075 I 1 IO_AF8
+bit 1074 O 1 IO_AF8 1073 1 Z
+bit 1073 C 1 *
+bit 1072 I 1 IO_AE8
+bit 1071 O 1 IO_AE8 1070 1 Z
+bit 1070 C 1 *
+bit 1069 O 1 *
+bit 1068 O 1 *
+bit 1067 O 1 *
+bit 1066 O 1 *
+bit 1065 O 1 *
+bit 1064 O 1 *
+bit 1063 O 1 *
+bit 1062 O 1 *
+bit 1061 O 1 *
+bit 1060 O 1 *
+bit 1059 O 1 *
+bit 1058 O 1 *
+bit 1057 O 1 *
+bit 1056 O 1 *
+bit 1055 O 1 *
+bit 1054 O 1 *
+bit 1053 O 1 *
+bit 1052 O 1 *
+bit 1051 I 1 IO_AD8
+bit 1050 O 1 IO_AD8 1049 1 Z
+bit 1049 C 1 *
+bit 1048 I 1 IO_AC8
+bit 1047 O 1 IO_AC8 1046 1 Z
+bit 1046 C 1 *
+bit 1045 I 1 IO_AB8
+bit 1044 O 1 IO_AB8 1043 1 Z
+bit 1043 C 1 *
+bit 1042 I 1 IO_AA8
+bit 1041 O 1 IO_AA8 1040 1 Z
+bit 1040 C 1 *
+bit 1039 I 1 IO_Y8
+bit 1038 O 1 IO_Y8 1037 1 Z
+bit 1037 C 1 *
+bit 1036 I 1 IO_AF7
+bit 1035 O 1 IO_AF7 1034 1 Z
+bit 1034 C 1 *
+bit 1033 I 1 IO_AE7
+bit 1032 O 1 IO_AE7 1031 1 Z
+bit 1031 C 1 *
+bit 1030 I 1 IO_AC7
+bit 1029 O 1 IO_AC7 1028 1 Z
+bit 1028 C 1 *
+bit 1027 I 1 IO_AB7
+bit 1026 O 1 IO_AB7 1025 1 Z
+bit 1025 C 1 *
+bit 1024 I 1 IO_AA7
+bit 1023 O 1 IO_AA7 1022 1 Z
+bit 1022 C 1 *
+bit 1021 I 1 IO_AF6
+bit 1020 O 1 IO_AF6 1019 1 Z
+bit 1019 C 1 *
+bit 1018 I 1 IO_AE6
+bit 1017 O 1 IO_AE6 1016 1 Z
+bit 1016 C 1 *
+bit 1015 I 1 IO_AD6
+bit 1014 O 1 IO_AD6 1013 1 Z
+bit 1013 C 1 *
+bit 1012 I 1 IO_AC6
+bit 1011 O 1 IO_AC6 1010 1 Z
+bit 1010 C 1 *
+bit 1009 I 1 IO_AF5
+bit 1008 O 1 IO_AF5 1007 1 Z
+bit 1007 C 1 *
+bit 1006 I 1 IO_AE5
+bit 1005 O 1 IO_AE5 1004 1 Z
+bit 1004 C 1 *
+bit 1003 I 1 IO_AD5
+bit 1002 O 1 IO_AD5 1001 1 Z
+bit 1001 C 1 *
+bit 1000 I 1 IO_AB6
+bit 999 O 1 IO_AB6 998 1 Z
+bit 998 C 1 *
+bit 997 I 1 IO_AA6
+bit 996 O 1 IO_AA6 995 1 Z
+bit 995 C 1 *
+bit 994 I 1 IO_AF4
+bit 993 O 1 IO_AF4 992 1 Z
+bit 992 C 1 *
+bit 991 I 1 IO_AE4
+bit 990 O 1 IO_AE4 989 1 Z
+bit 989 C 1 *
+bit 988 I 1 IO_AD4
+bit 987 O 1 IO_AD4 986 1 Z
+bit 986 C 1 *
+bit 985 O 1 *
+bit 984 O 1 *
+bit 983 O 1 *
+bit 982 O 1 *
+bit 981 O 1 *
+bit 980 O 1 *
+bit 979 O 1 *
+bit 978 O 1 *
+bit 977 O 1 *
+bit 976 O 1 *
+bit 975 O 1 *
+bit 974 O 1 *
+bit 973 O 1 *
+bit 972 O 1 *
+bit 971 O 1 *
+bit 970 I 1 IO_AC5
+bit 969 O 1 IO_AC5 968 1 Z
+bit 968 C 1 *
+bit 967 I 1 IO_AB5
+bit 966 O 1 IO_AB5 965 1 Z
+bit 965 C 1 *
+bit 964 I 1 M2_AF3
+bit 963 I 1 M0_AE3
+bit 962 I 1 M1_AC3
+bit 961 I 1 IO_AD2
+bit 960 O 1 IO_AD2 959 1 Z
+bit 959 C 1 *
+bit 958 I 1 IO_AD1
+bit 957 O 1 IO_AD1 956 1 Z
+bit 956 C 1 *
+bit 955 I 1 IO_AB4
+bit 954 O 1 IO_AB4 953 1 Z
+bit 953 C 1 *
+bit 952 I 1 IO_AB3
+bit 951 O 1 IO_AB3 950 1 Z
+bit 950 C 1 *
+bit 949 I 1 IO_AC2
+bit 948 O 1 IO_AC2 947 1 Z
+bit 947 C 1 *
+bit 946 I 1 IO_AC1
+bit 945 O 1 IO_AC1 944 1 Z
+bit 944 C 1 *
+bit 943 I 1 IO_AA5
+bit 942 O 1 IO_AA5 941 1 Z
+bit 941 C 1 *
+bit 940 O 1 *
+bit 939 O 1 *
+bit 938 O 1 *
+bit 937 I 1 IO_AB2
+bit 936 O 1 IO_AB2 935 1 Z
+bit 935 C 1 *
+bit 934 I 1 IO_AB1
+bit 933 O 1 IO_AB1 932 1 Z
+bit 932 C 1 *
+bit 931 I 1 IO_Y7
+bit 930 O 1 IO_Y7 929 1 Z
+bit 929 C 1 *
+bit 928 I 1 IO_Y6
+bit 927 O 1 IO_Y6 926 1 Z
+bit 926 C 1 *
+bit 925 I 1 IO_AA4
+bit 924 O 1 IO_AA4 923 1 Z
+bit 923 C 1 *
+bit 922 I 1 IO_AA3
+bit 921 O 1 IO_AA3 920 1 Z
+bit 920 C 1 *
+bit 919 I 1 IO_Y5
+bit 918 O 1 IO_Y5 917 1 Z
+bit 917 C 1 *
+bit 916 I 1 IO_Y4
+bit 915 O 1 IO_Y4 914 1 Z
+bit 914 C 1 *
+bit 913 I 1 IO_AA2
+bit 912 O 1 IO_AA2 911 1 Z
+bit 911 C 1 *
+bit 910 I 1 IO_AA1
+bit 909 O 1 IO_AA1 908 1 Z
+bit 908 C 1 *
+bit 907 I 1 IO_Y2
+bit 906 O 1 IO_Y2 905 1 Z
+bit 905 C 1 *
+bit 904 I 1 IO_Y1
+bit 903 O 1 IO_Y1 902 1 Z
+bit 902 C 1 *
+bit 901 O 1 *
+bit 900 O 1 *
+bit 899 O 1 *
+bit 898 O 1 *
+bit 897 O 1 *
+bit 896 O 1 *
+bit 895 O 1 *
+bit 894 O 1 *
+bit 893 O 1 *
+bit 892 O 1 *
+bit 891 O 1 *
+bit 890 O 1 *
+bit 889 O 1 *
+bit 888 O 1 *
+bit 887 O 1 *
+bit 886 O 1 *
+bit 885 O 1 *
+bit 884 O 1 *
+bit 883 I 1 IO_W7
+bit 882 O 1 IO_W7 881 1 Z
+bit 881 C 1 *
+bit 880 I 1 IO_W6
+bit 879 O 1 IO_W6 878 1 Z
+bit 878 C 1 *
+bit 877 O 1 *
+bit 876 O 1 *
+bit 875 O 1 *
+bit 874 O 1 *
+bit 873 O 1 *
+bit 872 O 1 *
+bit 871 I 1 IO_V6
+bit 870 O 1 IO_V6 869 1 Z
+bit 869 C 1 *
+bit 868 I 1 IO_W5
+bit 867 O 1 IO_W5 866 1 Z
+bit 866 C 1 *
+bit 865 I 1 IO_W4
+bit 864 O 1 IO_W4 863 1 Z
+bit 863 C 1 *
+bit 862 I 1 IO_W3
+bit 861 O 1 IO_W3 860 1 Z
+bit 860 C 1 *
+bit 859 O 1 *
+bit 858 O 1 *
+bit 857 O 1 *
+bit 856 O 1 *
+bit 855 O 1 *
+bit 854 O 1 *
+bit 853 I 1 IO_W2
+bit 852 O 1 IO_W2 851 1 Z
+bit 851 C 1 *
+bit 850 I 1 IO_W1
+bit 849 O 1 IO_W1 848 1 Z
+bit 848 C 1 *
+bit 847 I 1 IO_V7
+bit 846 O 1 IO_V7 845 1 Z
+bit 845 C 1 *
+bit 844 I 1 IO_U7
+bit 843 O 1 IO_U7 842 1 Z
+bit 842 C 1 *
+bit 841 I 1 IO_V5
+bit 840 O 1 IO_V5 839 1 Z
+bit 839 C 1 *
+bit 838 I 1 IO_V4
+bit 837 O 1 IO_V4 836 1 Z
+bit 836 C 1 *
+bit 835 I 1 IO_V3
+bit 834 O 1 IO_V3 833 1 Z
+bit 833 C 1 *
+bit 832 I 1 IO_V2
+bit 831 O 1 IO_V2 830 1 Z
+bit 830 C 1 *
+bit 829 I 1 IO_U6
+bit 828 O 1 IO_U6 827 1 Z
+bit 827 C 1 *
+bit 826 I 1 IO_U5
+bit 825 O 1 IO_U5 824 1 Z
+bit 824 C 1 *
+bit 823 I 1 IO_U4
+bit 822 O 1 IO_U4 821 1 Z
+bit 821 C 1 *
+bit 820 I 1 IO_U3
+bit 819 O 1 IO_U3 818 1 Z
+bit 818 C 1 *
+bit 817 O 1 *
+bit 816 O 1 *
+bit 815 O 1 *
+bit 814 O 1 *
+bit 813 O 1 *
+bit 812 O 1 *
+bit 811 I 1 IO_U2
+bit 810 O 1 IO_U2 809 1 Z
+bit 809 C 1 *
+bit 808 I 1 IO_U1
+bit 807 O 1 IO_U1 806 1 Z
+bit 806 C 1 *
+bit 805 I 1 IO_T8
+bit 804 O 1 IO_T8 803 1 Z
+bit 803 C 1 *
+bit 802 I 1 IO_T7
+bit 801 O 1 IO_T7 800 1 Z
+bit 800 C 1 *
+bit 799 I 1 IO_T6
+bit 798 O 1 IO_T6 797 1 Z
+bit 797 C 1 *
+bit 796 I 1 IO_T5
+bit 795 O 1 IO_T5 794 1 Z
+bit 794 C 1 *
+bit 793 I 1 IO_T2
+bit 792 O 1 IO_T2 791 1 Z
+bit 791 C 1 *
+bit 790 I 1 IO_T1
+bit 789 O 1 IO_T1 788 1 Z
+bit 788 C 1 *
+bit 787 O 1 *
+bit 786 O 1 *
+bit 785 O 1 *
+bit 784 O 1 *
+bit 783 O 1 *
+bit 782 O 1 *
+bit 781 I 1 IO_R8
+bit 780 O 1 IO_R8 779 1 Z
+bit 779 C 1 *
+bit 778 I 1 IO_R7
+bit 777 O 1 IO_R7 776 1 Z
+bit 776 C 1 *
+bit 775 I 1 IO_R6
+bit 774 O 1 IO_R6 773 1 Z
+bit 773 C 1 *
+bit 772 I 1 IO_R5
+bit 771 O 1 IO_R5 770 1 Z
+bit 770 C 1 *
+bit 769 I 1 IO_T4
+bit 768 O 1 IO_T4 767 1 Z
+bit 767 C 1 *
+bit 766 I 1 IO_R3
+bit 765 O 1 IO_R3 764 1 Z
+bit 764 C 1 *
+bit 763 I 1 IO_R2
+bit 762 O 1 IO_R2 761 1 Z
+bit 761 C 1 *
+bit 760 I 1 IO_R1
+bit 759 O 1 IO_R1 758 1 Z
+bit 758 C 1 *
+bit 757 I 1 IO_P8
+bit 756 O 1 IO_P8 755 1 Z
+bit 755 C 1 *
+bit 754 I 1 IO_P7
+bit 753 O 1 IO_P7 752 1 Z
+bit 752 C 1 *
+bit 751 O 1 *
+bit 750 O 1 *
+bit 749 O 1 *
+bit 748 O 1 *
+bit 747 O 1 *
+bit 746 O 1 *
+bit 745 O 1 *
+bit 744 O 1 *
+bit 743 O 1 *
+bit 742 O 1 *
+bit 741 O 1 *
+bit 740 O 1 *
+bit 739 I 1 IO_P6
+bit 738 O 1 IO_P6 737 1 Z
+bit 737 C 1 *
+bit 736 I 1 IO_P5
+bit 735 O 1 IO_P5 734 1 Z
+bit 734 C 1 *
+bit 733 I 1 IO_P4
+bit 732 O 1 IO_P4 731 1 Z
+bit 731 C 1 *
+bit 730 I 1 IO_P3
+bit 729 O 1 IO_P3 728 1 Z
+bit 728 C 1 *
+bit 727 I 1 IO_P2
+bit 726 O 1 IO_P2 725 1 Z
+bit 725 C 1 *
+bit 724 I 1 IO_P1
+bit 723 O 1 IO_P1 722 1 Z
+bit 722 C 1 *
+bit 721 I 1 IO_N1
+bit 720 O 1 IO_N1 719 1 Z
+bit 719 C 1 *
+bit 718 I 1 IO_N2
+bit 717 O 1 IO_N2 716 1 Z
+bit 716 C 1 *
+bit 715 I 1 IO_N3
+bit 714 O 1 IO_N3 713 1 Z
+bit 713 C 1 *
+bit 712 I 1 IO_N4
+bit 711 O 1 IO_N4 710 1 Z
+bit 710 C 1 *
+bit 709 I 1 IO_N5
+bit 708 O 1 IO_N5 707 1 Z
+bit 707 C 1 *
+bit 706 I 1 IO_N6
+bit 705 O 1 IO_N6 704 1 Z
+bit 704 C 1 *
+bit 703 O 1 *
+bit 702 O 1 *
+bit 701 O 1 *
+bit 700 O 1 *
+bit 699 O 1 *
+bit 698 O 1 *
+bit 697 O 1 *
+bit 696 O 1 *
+bit 695 O 1 *
+bit 694 O 1 *
+bit 693 O 1 *
+bit 692 O 1 *
+bit 691 I 1 IO_N7
+bit 690 O 1 IO_N7 689 1 Z
+bit 689 C 1 *
+bit 688 I 1 IO_N8
+bit 687 O 1 IO_N8 686 1 Z
+bit 686 C 1 *
+bit 685 I 1 IO_M1
+bit 684 O 1 IO_M1 683 1 Z
+bit 683 C 1 *
+bit 682 I 1 IO_M2
+bit 681 O 1 IO_M2 680 1 Z
+bit 680 C 1 *
+bit 679 I 1 IO_M3
+bit 678 O 1 IO_M3 677 1 Z
+bit 677 C 1 *
+bit 676 I 1 IO_L4
+bit 675 O 1 IO_L4 674 1 Z
+bit 674 C 1 *
+bit 673 I 1 IO_M6
+bit 672 O 1 IO_M6 671 1 Z
+bit 671 C 1 *
+bit 670 I 1 IO_M5
+bit 669 O 1 IO_M5 668 1 Z
+bit 668 C 1 *
+bit 667 I 1 IO_M7
+bit 666 O 1 IO_M7 665 1 Z
+bit 665 C 1 *
+bit 664 I 1 IO_M8
+bit 663 O 1 IO_M8 662 1 Z
+bit 662 C 1 *
+bit 661 O 1 *
+bit 660 O 1 *
+bit 659 O 1 *
+bit 658 O 1 *
+bit 657 O 1 *
+bit 656 O 1 *
+bit 655 I 1 IO_L1
+bit 654 O 1 IO_L1 653 1 Z
+bit 653 C 1 *
+bit 652 I 1 IO_L2
+bit 651 O 1 IO_L2 650 1 Z
+bit 650 C 1 *
+bit 649 I 1 IO_L5
+bit 648 O 1 IO_L5 647 1 Z
+bit 647 C 1 *
+bit 646 I 1 IO_L6
+bit 645 O 1 IO_L6 644 1 Z
+bit 644 C 1 *
+bit 643 I 1 IO_L7
+bit 642 O 1 IO_L7 641 1 Z
+bit 641 C 1 *
+bit 640 I 1 IO_L8
+bit 639 O 1 IO_L8 638 1 Z
+bit 638 C 1 *
+bit 637 I 1 IO_K1
+bit 636 O 1 IO_K1 635 1 Z
+bit 635 C 1 *
+bit 634 I 1 IO_K2
+bit 633 O 1 IO_K2 632 1 Z
+bit 632 C 1 *
+bit 631 O 1 *
+bit 630 O 1 *
+bit 629 O 1 *
+bit 628 O 1 *
+bit 627 O 1 *
+bit 626 O 1 *
+bit 625 I 1 IO_K3
+bit 624 O 1 IO_K3 623 1 Z
+bit 623 C 1 *
+bit 622 I 1 IO_K4
+bit 621 O 1 IO_K4 620 1 Z
+bit 620 C 1 *
+bit 619 I 1 IO_K5
+bit 618 O 1 IO_K5 617 1 Z
+bit 617 C 1 *
+bit 616 I 1 IO_K6
+bit 615 O 1 IO_K6 614 1 Z
+bit 614 C 1 *
+bit 613 I 1 IO_J2
+bit 612 O 1 IO_J2 611 1 Z
+bit 611 C 1 *
+bit 610 I 1 IO_J3
+bit 609 O 1 IO_J3 608 1 Z
+bit 608 C 1 *
+bit 607 I 1 IO_J4
+bit 606 O 1 IO_J4 605 1 Z
+bit 605 C 1 *
+bit 604 I 1 IO_J5
+bit 603 O 1 IO_J5 602 1 Z
+bit 602 C 1 *
+bit 601 I 1 IO_K7
+bit 600 O 1 IO_K7 599 1 Z
+bit 599 C 1 *
+bit 598 I 1 IO_J7
+bit 597 O 1 IO_J7 596 1 Z
+bit 596 C 1 *
+bit 595 I 1 IO_H1
+bit 594 O 1 IO_H1 593 1 Z
+bit 593 C 1 *
+bit 592 I 1 IO_H2
+bit 591 O 1 IO_H2 590 1 Z
+bit 590 C 1 *
+bit 589 O 1 *
+bit 588 O 1 *
+bit 587 O 1 *
+bit 586 O 1 *
+bit 585 O 1 *
+bit 584 O 1 *
+bit 583 I 1 IO_H3
+bit 582 O 1 IO_H3 581 1 Z
+bit 581 C 1 *
+bit 580 I 1 IO_H4
+bit 579 O 1 IO_H4 578 1 Z
+bit 578 C 1 *
+bit 577 I 1 IO_J6
+bit 576 O 1 IO_J6 575 1 Z
+bit 575 C 1 *
+bit 574 I 1 IO_H5
+bit 573 O 1 IO_H5 572 1 Z
+bit 572 C 1 *
+bit 571 O 1 *
+bit 570 O 1 *
+bit 569 O 1 *
+bit 568 O 1 *
+bit 567 O 1 *
+bit 566 O 1 *
+bit 565 I 1 IO_G1
+bit 564 O 1 IO_G1 563 1 Z
+bit 563 C 1 *
+bit 562 I 1 IO_G2
+bit 561 O 1 IO_G2 560 1 Z
+bit 560 C 1 *
+bit 559 O 1 *
+bit 558 O 1 *
+bit 557 O 1 *
+bit 556 O 1 *
+bit 555 O 1 *
+bit 554 O 1 *
+bit 553 O 1 *
+bit 552 O 1 *
+bit 551 O 1 *
+bit 550 O 1 *
+bit 549 O 1 *
+bit 548 O 1 *
+bit 547 O 1 *
+bit 546 O 1 *
+bit 545 O 1 *
+bit 544 O 1 *
+bit 543 O 1 *
+bit 542 O 1 *
+bit 541 I 1 IO_H6
+bit 540 O 1 IO_H6 539 1 Z
+bit 539 C 1 *
+bit 538 I 1 IO_H7
+bit 537 O 1 IO_H7 536 1 Z
+bit 536 C 1 *
+bit 535 I 1 IO_F1
+bit 534 O 1 IO_F1 533 1 Z
+bit 533 C 1 *
+bit 532 I 1 IO_F2
+bit 531 O 1 IO_F2 530 1 Z
+bit 530 C 1 *
+bit 529 I 1 IO_G4
+bit 528 O 1 IO_G4 527 1 Z
+bit 527 C 1 *
+bit 526 I 1 IO_G5
+bit 525 O 1 IO_G5 524 1 Z
+bit 524 C 1 *
+bit 523 I 1 IO_F3
+bit 522 O 1 IO_F3 521 1 Z
+bit 521 C 1 *
+bit 520 I 1 IO_F4
+bit 519 O 1 IO_F4 518 1 Z
+bit 518 C 1 *
+bit 517 I 1 IO_E1
+bit 516 O 1 IO_E1 515 1 Z
+bit 515 C 1 *
+bit 514 I 1 IO_E2
+bit 513 O 1 IO_E2 512 1 Z
+bit 512 C 1 *
+bit 511 I 1 IO_G6
+bit 510 O 1 IO_G6 509 1 Z
+bit 509 C 1 *
+bit 508 I 1 IO_G7
+bit 507 O 1 IO_G7 506 1 Z
+bit 506 C 1 *
+bit 505 O 1 *
+bit 504 O 1 *
+bit 503 O 1 *
+bit 502 O 1 *
+bit 501 O 1 *
+bit 500 O 1 *
+bit 499 I 1 IO_D1
+bit 498 O 1 IO_D1 497 1 Z
+bit 497 C 1 *
+bit 496 I 1 IO_D2
+bit 495 O 1 IO_D2 494 1 Z
+bit 494 C 1 *
+bit 493 I 1 IO_E3
+bit 492 O 1 IO_E3 491 1 Z
+bit 491 C 1 *
+bit 490 I 1 IO_E4
+bit 489 O 1 IO_E4 488 1 Z
+bit 488 C 1 *
+bit 487 I 1 IO_F5
+bit 486 O 1 IO_F5 485 1 Z
+bit 485 C 1 *
+bit 484 I 1 IO_F6
+bit 483 O 1 IO_F6 482 1 Z
+bit 482 C 1 *
+bit 481 O 1 *
+bit 480 I 1 HSWAP_EN_C2
+bit 479 I 1 IO_B3
+bit 478 O 1 IO_B3 477 1 Z
+bit 477 C 1 *
+bit 476 I 1 IO_E5
+bit 475 O 1 IO_E5 474 1 Z
+bit 474 C 1 *
+bit 473 I 1 IO_D5
+bit 472 O 1 IO_D5 471 1 Z
+bit 471 C 1 *
+bit 470 O 1 *
+bit 469 O 1 *
+bit 468 O 1 *
+bit 467 O 1 *
+bit 466 O 1 *
+bit 465 O 1 *
+bit 464 O 1 *
+bit 463 O 1 *
+bit 462 O 1 *
+bit 461 O 1 *
+bit 460 O 1 *
+bit 459 O 1 *
+bit 458 O 1 *
+bit 457 O 1 *
+bit 456 O 1 *
+bit 455 O 1 *
+bit 454 O 1 *
+bit 453 O 1 *
+bit 452 I 1 IO_A3
+bit 451 O 1 IO_A3 450 1 Z
+bit 450 C 1 *
+bit 449 I 1 IO_C4
+bit 448 O 1 IO_C4 447 1 Z
+bit 447 C 1 *
+bit 446 I 1 IO_B4
+bit 445 O 1 IO_B4 444 1 Z
+bit 444 C 1 *
+bit 443 I 1 IO_A4
+bit 442 O 1 IO_A4 441 1 Z
+bit 441 C 1 *
+bit 440 I 1 IO_C5
+bit 439 O 1 IO_C5 438 1 Z
+bit 438 C 1 *
+bit 437 I 1 IO_B5
+bit 436 O 1 IO_B5 435 1 Z
+bit 435 C 1 *
+bit 434 I 1 IO_A5
+bit 433 O 1 IO_A5 432 1 Z
+bit 432 C 1 *
+bit 431 I 1 IO_E6
+bit 430 O 1 IO_E6 429 1 Z
+bit 429 C 1 *
+bit 428 I 1 IO_D6
+bit 427 O 1 IO_D6 426 1 Z
+bit 426 C 1 *
+bit 425 I 1 IO_C6
+bit 424 O 1 IO_C6 423 1 Z
+bit 423 C 1 *
+bit 422 I 1 IO_B6
+bit 421 O 1 IO_B6 420 1 Z
+bit 420 C 1 *
+bit 419 I 1 IO_A6
+bit 418 O 1 IO_A6 417 1 Z
+bit 417 C 1 *
+bit 416 I 1 IO_E7
+bit 415 O 1 IO_E7 414 1 Z
+bit 414 C 1 *
+bit 413 I 1 IO_D7
+bit 412 O 1 IO_D7 411 1 Z
+bit 411 C 1 *
+bit 410 I 1 IO_B7
+bit 409 O 1 IO_B7 408 1 Z
+bit 408 C 1 *
+bit 407 I 1 IO_A7
+bit 406 O 1 IO_A7 405 1 Z
+bit 405 C 1 *
+bit 404 I 1 IO_F7
+bit 403 O 1 IO_F7 402 1 Z
+bit 402 C 1 *
+bit 401 I 1 IO_G8
+bit 400 O 1 IO_G8 399 1 Z
+bit 399 C 1 *
+bit 398 I 1 IO_F8
+bit 397 O 1 IO_F8 396 1 Z
+bit 396 C 1 *
+bit 395 I 1 IO_E8
+bit 394 O 1 IO_E8 393 1 Z
+bit 393 C 1 *
+bit 392 I 1 IO_D8
+bit 391 O 1 IO_D8 390 1 Z
+bit 390 C 1 *
+bit 389 O 1 *
+bit 388 O 1 *
+bit 387 O 1 *
+bit 386 O 1 *
+bit 385 O 1 *
+bit 384 O 1 *
+bit 383 O 1 *
+bit 382 O 1 *
+bit 381 O 1 *
+bit 380 O 1 *
+bit 379 O 1 *
+bit 378 O 1 *
+bit 377 O 1 *
+bit 376 O 1 *
+bit 375 O 1 *
+bit 374 I 1 IO_C8
+bit 373 O 1 IO_C8 372 1 Z
+bit 372 C 1 *
+bit 371 I 1 IO_B8
+bit 370 O 1 IO_B8 369 1 Z
+bit 369 C 1 *
+bit 368 I 1 IO_A8
+bit 367 O 1 IO_A8 366 1 Z
+bit 366 C 1 *
+bit 365 I 1 IO_G9
+bit 364 O 1 IO_G9 363 1 Z
+bit 363 C 1 *
+bit 362 I 1 IO_F9
+bit 361 O 1 IO_F9 360 1 Z
+bit 360 C 1 *
+bit 359 O 1 *
+bit 358 O 1 *
+bit 357 O 1 *
+bit 356 I 1 IO_E9
+bit 355 O 1 IO_E9 354 1 Z
+bit 354 C 1 *
+bit 353 I 1 IO_D9
+bit 352 O 1 IO_D9 351 1 Z
+bit 351 C 1 *
+bit 350 I 1 IO_C9
+bit 349 O 1 IO_C9 348 1 Z
+bit 348 C 1 *
+bit 347 I 1 IO_B9
+bit 346 O 1 IO_B9 345 1 Z
+bit 345 C 1 *
+bit 344 I 1 IO_G10
+bit 343 O 1 IO_G10 342 1 Z
+bit 342 C 1 *
+bit 341 I 1 IO_F10
+bit 340 O 1 IO_F10 339 1 Z
+bit 339 C 1 *
+bit 338 I 1 IO_E10
+bit 337 O 1 IO_E10 336 1 Z
+bit 336 C 1 *
+bit 335 O 1 *
+bit 334 O 1 *
+bit 333 O 1 *
+bit 332 O 1 *
+bit 331 O 1 *
+bit 330 O 1 *
+bit 329 O 1 *
+bit 328 O 1 *
+bit 327 O 1 *
+bit 326 O 1 *
+bit 325 O 1 *
+bit 324 O 1 *
+bit 323 O 1 *
+bit 322 O 1 *
+bit 321 O 1 *
+bit 320 I 1 IO_D10
+bit 319 O 1 IO_D10 318 1 Z
+bit 318 C 1 *
+bit 317 I 1 IO_C10
+bit 316 O 1 IO_C10 315 1 Z
+bit 315 C 1 *
+bit 314 I 1 IO_H11
+bit 313 O 1 IO_H11 312 1 Z
+bit 312 C 1 *
+bit 311 I 1 IO_B10
+bit 310 O 1 IO_B10 309 1 Z
+bit 309 C 1 *
+bit 308 I 1 IO_A10
+bit 307 O 1 IO_A10 306 1 Z
+bit 306 C 1 *
+bit 305 I 1 IO_G11
+bit 304 O 1 IO_G11 303 1 Z
+bit 303 C 1 *
+bit 302 I 1 IO_F11
+bit 301 O 1 IO_F11 300 1 Z
+bit 300 C 1 *
+bit 299 O 1 *
+bit 298 O 1 *
+bit 297 O 1 *
+bit 296 I 1 IO_E11
+bit 295 O 1 IO_E11 294 1 Z
+bit 294 C 1 *
+bit 293 I 1 IO_D11
+bit 292 O 1 IO_D11 291 1 Z
+bit 291 C 1 *
+bit 290 I 1 IO_B11
+bit 289 O 1 IO_B11 288 1 Z
+bit 288 C 1 *
+bit 287 I 1 IO_A11
+bit 286 O 1 IO_A11 285 1 Z
+bit 285 C 1 *
+bit 284 I 1 IO_H12
+bit 283 O 1 IO_H12 282 1 Z
+bit 282 C 1 *
+bit 281 I 1 IO_G12
+bit 280 O 1 IO_G12 279 1 Z
+bit 279 C 1 *
+bit 278 I 1 IO_H13
+bit 277 O 1 IO_H13 276 1 Z
+bit 276 C 1 *
+bit 275 I 1 IO_F12
+bit 274 O 1 IO_F12 273 1 Z
+bit 273 C 1 *
+bit 272 I 1 IO_E12
+bit 271 O 1 IO_E12 270 1 Z
+bit 270 C 1 *
+bit 269 I 1 IO_C12
+bit 268 O 1 IO_C12 267 1 Z
+bit 267 C 1 *
+bit 266 I 1 IO_B12
+bit 265 O 1 IO_B12 264 1 Z
+bit 264 C 1 *
+bit 263 I 1 IO_A12
+bit 262 O 1 IO_A12 261 1 Z
+bit 261 C 1 *
+bit 260 I 1 IO_G13
+bit 259 O 1 IO_G13 258 1 Z
+bit 258 C 1 *
+bit 257 I 1 IO_F13
+bit 256 O 1 IO_F13 255 1 Z
+bit 255 C 1 *
+bit 254 I 1 IO_E13
+bit 253 O 1 IO_E13 252 1 Z
+bit 252 C 1 *
+bit 251 I 1 IO_D13
+bit 250 O 1 IO_D13 249 1 Z
+bit 249 C 1 *
+bit 248 I 1 IO_C13
+bit 247 O 1 IO_C13 246 1 Z
+bit 246 C 1 *
+bit 245 I 1 IO_B13
+bit 244 O 1 IO_B13 243 1 Z
+bit 243 C 1 *
+bit 242 I 1 IO_A13
+bit 241 O 1 IO_A13 240 1 Z
+bit 240 C 1 *
+bit 239 I 1 IO_A14
+bit 238 O 1 IO_A14 237 1 Z
+bit 237 C 1 *
+bit 236 I 1 IO_B14
+bit 235 O 1 IO_B14 234 1 Z
+bit 234 C 1 *
+bit 233 I 1 IO_C14
+bit 232 O 1 IO_C14 231 1 Z
+bit 231 C 1 *
+bit 230 I 1 IO_D14
+bit 229 O 1 IO_D14 228 1 Z
+bit 228 C 1 *
+bit 227 I 1 IO_E14
+bit 226 O 1 IO_E14 225 1 Z
+bit 225 C 1 *
+bit 224 I 1 IO_F14
+bit 223 O 1 IO_F14 222 1 Z
+bit 222 C 1 *
+bit 221 I 1 IO_G14
+bit 220 O 1 IO_G14 219 1 Z
+bit 219 C 1 *
+bit 218 I 1 IO_H14
+bit 217 O 1 IO_H14 216 1 Z
+bit 216 C 1 *
+bit 215 I 1 IO_A15
+bit 214 O 1 IO_A15 213 1 Z
+bit 213 C 1 *
+bit 212 I 1 IO_B15
+bit 211 O 1 IO_B15 210 1 Z
+bit 210 C 1 *
+bit 209 I 1 IO_C15
+bit 208 O 1 IO_C15 207 1 Z
+bit 207 C 1 *
+bit 206 I 1 IO_E15
+bit 205 O 1 IO_E15 204 1 Z
+bit 204 C 1 *
+bit 203 I 1 IO_F15
+bit 202 O 1 IO_F15 201 1 Z
+bit 201 C 1 *
+bit 200 I 1 IO_G15
+bit 199 O 1 IO_G15 198 1 Z
+bit 198 C 1 *
+bit 197 I 1 IO_H15
+bit 196 O 1 IO_H15 195 1 Z
+bit 195 C 1 *
+bit 194 I 1 IO_D16
+bit 193 O 1 IO_D16 192 1 Z
+bit 192 C 1 *
+bit 191 I 1 IO_A16
+bit 190 O 1 IO_A16 189 1 Z
+bit 189 C 1 *
+bit 188 I 1 IO_B16
+bit 187 O 1 IO_B16 186 1 Z
+bit 186 C 1 *
+bit 185 I 1 IO_E16
+bit 184 O 1 IO_E16 183 1 Z
+bit 183 C 1 *
+bit 182 I 1 IO_F16
+bit 181 O 1 IO_F16 180 1 Z
+bit 180 C 1 *
+bit 179 O 1 *
+bit 178 O 1 *
+bit 177 O 1 *
+bit 176 I 1 IO_G16
+bit 175 O 1 IO_G16 174 1 Z
+bit 174 C 1 *
+bit 173 I 1 IO_H16
+bit 172 O 1 IO_H16 171 1 Z
+bit 171 C 1 *
+bit 170 I 1 IO_A17
+bit 169 O 1 IO_A17 168 1 Z
+bit 168 C 1 *
+bit 167 I 1 IO_B17
+bit 166 O 1 IO_B17 165 1 Z
+bit 165 C 1 *
+bit 164 I 1 IO_C17
+bit 163 O 1 IO_C17 162 1 Z
+bit 162 C 1 *
+bit 161 I 1 IO_D17
+bit 160 O 1 IO_D17 159 1 Z
+bit 159 C 1 *
+bit 158 I 1 IO_E17
+bit 157 O 1 IO_E17 156 1 Z
+bit 156 C 1 *
+bit 155 O 1 *
+bit 154 O 1 *
+bit 153 O 1 *
+bit 152 O 1 *
+bit 151 O 1 *
+bit 150 O 1 *
+bit 149 O 1 *
+bit 148 O 1 *
+bit 147 O 1 *
+bit 146 O 1 *
+bit 145 O 1 *
+bit 144 O 1 *
+bit 143 O 1 *
+bit 142 O 1 *
+bit 141 O 1 *
+bit 140 I 1 IO_F17
+bit 139 O 1 IO_F17 138 1 Z
+bit 138 C 1 *
+bit 137 I 1 IO_G17
+bit 136 O 1 IO_G17 135 1 Z
+bit 135 C 1 *
+bit 134 O 1 *
+bit 133 O 1 *
+bit 132 O 1 *
+bit 131 I 1 IO_B18
+bit 130 O 1 IO_B18 129 1 Z
+bit 129 C 1 *
+bit 128 I 1 IO_C18
+bit 127 O 1 IO_C18 126 1 Z
+bit 126 C 1 *
+bit 125 I 1 IO_D18
+bit 124 O 1 IO_D18 123 1 Z
+bit 123 C 1 *
+bit 122 O 1 *
+bit 121 O 1 *
+bit 120 O 1 *
+bit 119 I 1 IO_E18
+bit 118 O 1 IO_E18 117 1 Z
+bit 117 C 1 *
+bit 116 I 1 IO_F18
+bit 115 O 1 IO_F18 114 1 Z
+bit 114 C 1 *
+bit 113 I 1 IO_G18
+bit 112 O 1 IO_G18 111 1 Z
+bit 111 C 1 *
+bit 110 I 1 IO_A19
+bit 109 O 1 IO_A19 108 1 Z
+bit 108 C 1 *
+bit 107 I 1 IO_B19
+bit 106 O 1 IO_B19 105 1 Z
+bit 105 C 1 *
+bit 104 O 1 *
+bit 103 O 1 *
+bit 102 O 1 *
+bit 101 O 1 *
+bit 100 O 1 *
+bit 99 O 1 *
+bit 98 O 1 *
+bit 97 O 1 *
+bit 96 O 1 *
+bit 95 O 1 *
+bit 94 O 1 *
+bit 93 O 1 *
+bit 92 O 1 *
+bit 91 O 1 *
+bit 90 O 1 *
+bit 89 O 1 *
+bit 88 O 1 *
+bit 87 O 1 *
+bit 86 I 1 IO_C19
+bit 85 O 1 IO_C19 84 1 Z
+bit 84 C 1 *
+bit 83 I 1 IO_D19
+bit 82 O 1 IO_D19 81 1 Z
+bit 81 C 1 *
+bit 80 I 1 IO_E19
+bit 79 O 1 IO_E19 78 1 Z
+bit 78 C 1 *
+bit 77 I 1 IO_F19
+bit 76 O 1 IO_F19 75 1 Z
+bit 75 C 1 *
+bit 74 I 1 IO_G19
+bit 73 O 1 IO_G19 72 1 Z
+bit 72 C 1 *
+bit 71 I 1 IO_A20
+bit 70 O 1 IO_A20 69 1 Z
+bit 69 C 1 *
+bit 68 I 1 IO_B20
+bit 67 O 1 IO_B20 66 1 Z
+bit 66 C 1 *
+bit 65 I 1 IO_D20
+bit 64 O 1 IO_D20 63 1 Z
+bit 63 C 1 *
+bit 62 I 1 IO_E20
+bit 61 O 1 IO_E20 60 1 Z
+bit 60 C 1 *
+bit 59 I 1 IO_F20
+bit 58 O 1 IO_F20 57 1 Z
+bit 57 C 1 *
+bit 56 I 1 IO_A21
+bit 55 O 1 IO_A21 54 1 Z
+bit 54 C 1 *
+bit 53 I 1 IO_B21
+bit 52 O 1 IO_B21 51 1 Z
+bit 51 C 1 *
+bit 50 I 1 IO_C21
+bit 49 O 1 IO_C21 48 1 Z
+bit 48 C 1 *
+bit 47 I 1 IO_D21
+bit 46 O 1 IO_D21 45 1 Z
+bit 45 C 1 *
+bit 44 I 1 IO_A22
+bit 43 O 1 IO_A22 42 1 Z
+bit 42 C 1 *
+bit 41 I 1 IO_B22
+bit 40 O 1 IO_B22 39 1 Z
+bit 39 C 1 *
+bit 38 I 1 IO_C22
+bit 37 O 1 IO_C22 36 1 Z
+bit 36 C 1 *
+bit 35 I 1 IO_E21
+bit 34 O 1 IO_E21 33 1 Z
+bit 33 C 1 *
+bit 32 I 1 IO_F21
+bit 31 O 1 IO_F21 30 1 Z
+bit 30 C 1 *
+bit 29 I 1 IO_A23
+bit 28 O 1 IO_A23 27 1 Z
+bit 27 C 1 *
+bit 26 I 1 IO_B23
+bit 25 O 1 IO_B23 24 1 Z
+bit 24 C 1 *
+bit 23 I 1 IO_C23
+bit 22 O 1 IO_C23 21 1 Z
+bit 21 C 1 *
+bit 20 O 1 *
+bit 19 O 1 *
+bit 18 O 1 *
+bit 17 O 1 *
+bit 16 O 1 *
+bit 15 O 1 *
+bit 14 O 1 *
+bit 13 O 1 *
+bit 12 O 1 *
+bit 11 O 1 *
+bit 10 O 1 *
+bit 9 O 1 *
+bit 8 O 1 *
+bit 7 O 1 *
+bit 6 O 1 *
+bit 5 I 1 IO_D22
+bit 4 O 1 IO_D22 3 1 Z
+bit 3 C 1 *
+bit 2 I 1 IO_E22
+bit 1 O 1 IO_E22 0 1 Z
+bit 0 C 1 *
--- /dev/null
+signal GND1
+signal GND2
+signal GND3
+signal GND4
+signal GND5
+signal GND6
+signal GND7
+signal GND8
+signal GND9
+signal GND10
+signal GND11
+signal GND12
+signal GND13
+signal GND14
+signal GND15
+signal GND16
+signal GND17
+signal GND18
+signal GND19
+signal GND20
+signal GND21
+signal GND22
+signal GND23
+signal GND24
+signal GND25
+signal GND26
+signal GND27
+signal GND28
+signal GND29
+signal GND30
+signal GND31
+signal GND32
+signal GND33
+signal GND34
+signal GND35
+signal GND36
+signal GND37
+signal GND38
+signal GND39
+signal GND40
+signal GND41
+signal GND42
+signal GND43
+signal GND44
+signal GND45
+signal GND46
+signal GND47
+signal GND48
+signal GND49
+signal GND50
+signal GND51
+signal GND52
+signal GND53
+signal GND54
+signal GND55
+signal GND56
+signal GND57
+signal GND58
+signal GND59
+signal GND60
+signal GND61
+signal GND62
+signal GND63
+signal GND64
+signal GND65
+signal GND66
+signal GND67
+signal GND68
+signal GND69
+signal GND70
+signal GND71
+signal GND72
+signal GND73
+signal GND74
+signal GND75
+signal GND76
+signal GND77
+signal GND78
+signal GND79
+signal GND80
+signal GND81
+signal GND82
+signal GND83
+signal GND84
+signal GND85
+signal GND86
+signal GND87
+signal GND88
+signal GND89
+signal GND90
+signal GND91
+signal GND92
+signal GND93
+signal GND94
+signal GND95
+signal GND96
+signal GND97
+signal GND98
+signal GND99
+signal GND100
+signal GND101
+signal GND102
+signal GND103
+signal GND104
+signal GND105
+signal GND106
+signal GND107
+signal GND108
+signal GND109
+signal GND110
+signal GND111
+signal GND112
+signal GND113
+signal GND114
+signal GND115
+signal GND116
+signal GND117
+signal GND118
+signal GND119
+signal GND120
+signal NOCONNECT1
+signal NOCONNECT2
+signal NOCONNECT3
+signal NOCONNECT4
+signal NOCONNECT5
+signal NOCONNECT6
+signal NOCONNECT7
+signal NOCONNECT8
+signal CCLK_AH28
+signal DONE_AJ28
+signal HSWAP_EN_A3
+signal M0_AJ3
+signal M1_AH3
+signal M2_AK3
+signal PROG_B
+signal TCK
+signal TDI
+signal TDO
+signal TMS
+signal VCCAUX1
+signal VCCAUX2
+signal VCCAUX3
+signal VCCAUX4
+signal VCCAUX5
+signal VCCAUX6
+signal VCCAUX7
+signal VCCAUX8
+signal VCCAUX9
+signal VCCAUX10
+signal VCCAUX11
+signal VCCAUX12
+signal VCCAUX13
+signal VCCAUX14
+signal VCCAUX15
+signal VCCAUX16
+signal VCCAUX17
+signal VCCAUX18
+signal VCCAUX19
+signal VCCAUX20
+signal VCCAUX21
+signal VCCAUX22
+signal VCCAUX23
+signal VCCAUX24
+signal VCCINT1
+signal VCCINT2
+signal VCCINT3
+signal VCCINT4
+signal VCCINT5
+signal VCCINT6
+signal VCCINT7
+signal VCCINT8
+signal VCCINT9
+signal VCCINT10
+signal VCCINT11
+signal VCCINT12
+signal VCCINT13
+signal VCCINT14
+signal VCCINT15
+signal VCCINT16
+signal VCCINT17
+signal VCCINT18
+signal VCCINT19
+signal VCCINT20
+signal VCCINT21
+signal VCCINT22
+signal VCCINT23
+signal VCCINT24
+signal VCCINT25
+signal VCCINT26
+signal VCCINT27
+signal VCCINT28
+signal VCCINT29
+signal VCCINT30
+signal VCCINT31
+signal VCCINT32
+signal VCCO01
+signal VCCO02
+signal VCCO03
+signal VCCO04
+signal VCCO05
+signal VCCO06
+signal VCCO07
+signal VCCO08
+signal VCCO09
+signal VCCO010
+signal VCCO11
+signal VCCO12
+signal VCCO13
+signal VCCO14
+signal VCCO15
+signal VCCO16
+signal VCCO17
+signal VCCO18
+signal VCCO19
+signal VCCO110
+signal VCCO21
+signal VCCO22
+signal VCCO23
+signal VCCO24
+signal VCCO25
+signal VCCO26
+signal VCCO27
+signal VCCO28
+signal VCCO29
+signal VCCO210
+signal VCCO31
+signal VCCO32
+signal VCCO33
+signal VCCO34
+signal VCCO35
+signal VCCO36
+signal VCCO37
+signal VCCO38
+signal VCCO39
+signal VCCO310
+signal VCCO41
+signal VCCO42
+signal VCCO43
+signal VCCO44
+signal VCCO45
+signal VCCO46
+signal VCCO47
+signal VCCO48
+signal VCCO49
+signal VCCO410
+signal VCCO51
+signal VCCO52
+signal VCCO53
+signal VCCO54
+signal VCCO55
+signal VCCO56
+signal VCCO57
+signal VCCO58
+signal VCCO59
+signal VCCO510
+signal VCCO61
+signal VCCO62
+signal VCCO63
+signal VCCO64
+signal VCCO65
+signal VCCO66
+signal VCCO67
+signal VCCO68
+signal VCCO69
+signal VCCO610
+signal VCCO71
+signal VCCO72
+signal VCCO73
+signal VCCO74
+signal VCCO75
+signal VCCO76
+signal VCCO77
+signal VCCO78
+signal VCCO79
+signal VCCO710
+signal IO_A4
+signal IO_A5
+signal IO_A8
+signal IO_A11
+signal IO_A12
+signal IO_A13
+signal IO_A15
+signal IO_A16
+signal IO_A19
+signal IO_A20
+signal IO_A22
+signal IO_A23
+signal IO_A24
+signal IO_A26
+signal IO_A27
+signal IO_B4
+signal IO_B5
+signal IO_B6
+signal IO_B8
+signal IO_B10
+signal IO_B11
+signal IO_B12
+signal IO_B13
+signal IO_B14
+signal IO_B15
+signal IO_B16
+signal IO_B17
+signal IO_B19
+signal IO_B20
+signal IO_B21
+signal IO_B22
+signal IO_B23
+signal IO_B24
+signal IO_B25
+signal IO_B26
+signal IO_B27
+signal IO_C1
+signal IO_C2
+signal IO_C4
+signal IO_C6
+signal IO_C7
+signal IO_C8
+signal IO_C10
+signal IO_C11
+signal IO_C12
+signal IO_C14
+signal IO_C15
+signal IO_C16
+signal IO_C17
+signal IO_C19
+signal IO_C20
+signal IO_C21
+signal IO_C23
+signal IO_C24
+signal IO_C25
+signal IO_C27
+signal IO_C29
+signal IO_C30
+signal IO_D1
+signal IO_D2
+signal IO_D3
+signal IO_D4
+signal IO_D5
+signal IO_D7
+signal IO_D8
+signal IO_D11
+signal IO_D12
+signal IO_D13
+signal IO_D15
+signal IO_D16
+signal IO_D19
+signal IO_D20
+signal IO_D22
+signal IO_D23
+signal IO_D24
+signal IO_D26
+signal IO_D27
+signal IO_D28
+signal IO_D29
+signal IO_D30
+signal IO_E1
+signal IO_E2
+signal IO_E4
+signal IO_E6
+signal IO_E8
+signal IO_E11
+signal IO_E12
+signal IO_E13
+signal IO_E15
+signal IO_E16
+signal IO_E19
+signal IO_E20
+signal IO_E22
+signal IO_E23
+signal IO_E25
+signal IO_E29
+signal IO_E30
+signal IO_F2
+signal IO_F3
+signal IO_F5
+signal IO_F6
+signal IO_F7
+signal IO_F8
+signal IO_F9
+signal IO_F10
+signal IO_F11
+signal IO_F12
+signal IO_F13
+signal IO_F14
+signal IO_F15
+signal IO_F16
+signal IO_F17
+signal IO_F18
+signal IO_F19
+signal IO_F20
+signal IO_F21
+signal IO_F22
+signal IO_F23
+signal IO_F24
+signal IO_F25
+signal IO_F28
+signal IO_F29
+signal IO_G1
+signal IO_G2
+signal IO_G3
+signal IO_G4
+signal IO_G6
+signal IO_G8
+signal IO_G10
+signal IO_G11
+signal IO_G12
+signal IO_G14
+signal IO_G15
+signal IO_G16
+signal IO_G17
+signal IO_G19
+signal IO_G20
+signal IO_G21
+signal IO_G23
+signal IO_G24
+signal IO_G25
+signal IO_G27
+signal IO_G28
+signal IO_G29
+signal IO_G30
+signal IO_H1
+signal IO_H2
+signal IO_H3
+signal IO_H4
+signal IO_H5
+signal IO_H6
+signal IO_H7
+signal IO_H9
+signal IO_H11
+signal IO_H12
+signal IO_H13
+signal IO_H15
+signal IO_H16
+signal IO_H19
+signal IO_H20
+signal IO_H22
+signal IO_H23
+signal IO_H24
+signal IO_H25
+signal IO_H26
+signal IO_H27
+signal IO_H28
+signal IO_H29
+signal IO_H30
+signal IO_J1
+signal IO_J2
+signal IO_J4
+signal IO_J5
+signal IO_J6
+signal IO_J8
+signal IO_J9
+signal IO_J10
+signal IO_J12
+signal IO_J13
+signal IO_J14
+signal IO_J15
+signal IO_J16
+signal IO_J17
+signal IO_J19
+signal IO_J21
+signal IO_J22
+signal IO_J23
+signal IO_J25
+signal IO_J26
+signal IO_J27
+signal IO_J29
+signal IO_J30
+signal IO_K2
+signal IO_K3
+signal IO_K6
+signal IO_K7
+signal IO_K9
+signal IO_K10
+signal IO_K11
+signal IO_K12
+signal IO_K13
+signal IO_K14
+signal IO_K15
+signal IO_K16
+signal IO_K19
+signal IO_K20
+signal IO_K22
+signal IO_K24
+signal IO_K25
+signal IO_L1
+signal IO_L2
+signal IO_L3
+signal IO_L4
+signal IO_L5
+signal IO_L6
+signal IO_L7
+signal IO_L8
+signal IO_L10
+signal IO_L25
+signal IO_L26
+signal IO_L27
+signal IO_L28
+signal IO_L29
+signal IO_L30
+signal IO_M1
+signal IO_M2
+signal IO_M3
+signal IO_M4
+signal IO_M10
+signal IO_M21
+signal IO_M22
+signal IO_M23
+signal IO_M24
+signal IO_M25
+signal IO_M26
+signal IO_M27
+signal IO_M28
+signal IO_N1
+signal IO_N2
+signal IO_N8
+signal IO_N9
+signal IO_N10
+signal IO_N21
+signal IO_N22
+signal IO_N23
+signal IO_N25
+signal IO_N26
+signal IO_N27
+signal IO_N29
+signal IO_N30
+signal IO_P2
+signal IO_P3
+signal IO_P6
+signal IO_P7
+signal IO_P9
+signal IO_P10
+signal IO_P21
+signal IO_P22
+signal IO_P24
+signal IO_P25
+signal IO_P28
+signal IO_P29
+signal IO_R1
+signal IO_R2
+signal IO_R3
+signal IO_R4
+signal IO_R5
+signal IO_R6
+signal IO_R7
+signal IO_R8
+signal IO_R9
+signal IO_R10
+signal IO_R21
+signal IO_R22
+signal IO_R23
+signal IO_R24
+signal IO_R25
+signal IO_R26
+signal IO_R27
+signal IO_R28
+signal IO_R29
+signal IO_R30
+signal IO_T1
+signal IO_T2
+signal IO_T3
+signal IO_T4
+signal IO_T5
+signal IO_T6
+signal IO_T9
+signal IO_T10
+signal IO_T21
+signal IO_T22
+signal IO_T23
+signal IO_T24
+signal IO_T25
+signal IO_T26
+signal IO_T27
+signal IO_T28
+signal IO_T29
+signal IO_T30
+signal IO_U6
+signal IO_U7
+signal IO_U9
+signal IO_U10
+signal IO_U21
+signal IO_U22
+signal IO_U24
+signal IO_U25
+signal IO_U28
+signal IO_U29
+signal IO_V1
+signal IO_V2
+signal IO_V4
+signal IO_V5
+signal IO_V6
+signal IO_V10
+signal IO_V21
+signal IO_V22
+signal IO_V23
+signal IO_V25
+signal IO_V29
+signal IO_V30
+signal IO_W1
+signal IO_W2
+signal IO_W3
+signal IO_W4
+signal IO_W5
+signal IO_W6
+signal IO_W7
+signal IO_W10
+signal IO_W21
+signal IO_W26
+signal IO_W29
+signal IO_W30
+signal IO_Y1
+signal IO_Y2
+signal IO_Y5
+signal IO_Y6
+signal IO_Y7
+signal IO_Y8
+signal IO_Y10
+signal IO_Y21
+signal IO_Y23
+signal IO_Y24
+signal IO_Y25
+signal IO_Y26
+signal IO_Y27
+signal IO_Y28
+signal IO_Y29
+signal IO_Y30
+signal IO_AA2
+signal IO_AA3
+signal IO_AA6
+signal IO_AA7
+signal IO_AA9
+signal IO_AA10
+signal IO_AA11
+signal IO_AA12
+signal IO_AA13
+signal IO_AA14
+signal IO_AA15
+signal IO_AA16
+signal IO_AA17
+signal IO_AA18
+signal IO_AA19
+signal IO_AA20
+signal IO_AA21
+signal IO_AA22
+signal IO_AA24
+signal IO_AA25
+signal IO_AA28
+signal IO_AA29
+signal IO_AB1
+signal IO_AB2
+signal IO_AB4
+signal IO_AB5
+signal IO_AB6
+signal IO_AB8
+signal IO_AB9
+signal IO_AB10
+signal IO_AB12
+signal IO_AB13
+signal IO_AB14
+signal IO_AB15
+signal IO_AB16
+signal IO_AB17
+signal IO_AB18
+signal IO_AB19
+signal IO_AB21
+signal IO_AB22
+signal IO_AB23
+signal IO_AB25
+signal IO_AB26
+signal IO_AB27
+signal IO_AB29
+signal IO_AB30
+signal IO_AC1
+signal IO_AC2
+signal IO_AC3
+signal IO_AC4
+signal IO_AC5
+signal IO_AC6
+signal IO_AC7
+signal IO_AC9
+signal IO_AC11
+signal IO_AC12
+signal IO_AC13
+signal IO_AC15
+signal IO_AC16
+signal IO_AC18
+signal IO_AC19
+signal IO_AC20
+signal IO_AC22
+signal IO_AC23
+signal IO_AC24
+signal IO_AC25
+signal IO_AC26
+signal IO_AC27
+signal IO_AC28
+signal IO_AC29
+signal IO_AC30
+signal IO_AD1
+signal IO_AD2
+signal IO_AD3
+signal IO_AD4
+signal IO_AD6
+signal IO_AD7
+signal IO_AD10
+signal IO_AD11
+signal IO_AD12
+signal IO_AD14
+signal IO_AD15
+signal IO_AD16
+signal IO_AD17
+signal IO_AD19
+signal IO_AD20
+signal IO_AD21
+signal IO_AD23
+signal IO_AD24
+signal IO_AD25
+signal IO_AD27
+signal IO_AD28
+signal IO_AD29
+signal IO_AD30
+signal IO_AE2
+signal IO_AE3
+signal IO_AE5
+signal IO_AE6
+signal IO_AE7
+signal IO_AE9
+signal IO_AE10
+signal IO_AE11
+signal IO_AE12
+signal IO_AE13
+signal IO_AE14
+signal IO_AE15
+signal IO_AE16
+signal IO_AE17
+signal IO_AE18
+signal IO_AE19
+signal IO_AE20
+signal IO_AE21
+signal IO_AE22
+signal IO_AE23
+signal IO_AE26
+signal IO_AE28
+signal IO_AE29
+signal IO_AF1
+signal IO_AF2
+signal IO_AF4
+signal IO_AF6
+signal IO_AF9
+signal IO_AF11
+signal IO_AF12
+signal IO_AF13
+signal IO_AF15
+signal IO_AF16
+signal IO_AF18
+signal IO_AF19
+signal IO_AF20
+signal IO_AF22
+signal IO_AF23
+signal IO_AF25
+signal IO_AF27
+signal IO_AF29
+signal IO_AF30
+signal IO_AG1
+signal IO_AG2
+signal IO_AG3
+signal IO_AG4
+signal IO_AG5
+signal IO_AG7
+signal IO_AG9
+signal IO_AG11
+signal IO_AG12
+signal IO_AG13
+signal IO_AG15
+signal IO_AG16
+signal IO_AG18
+signal IO_AG19
+signal IO_AG20
+signal IO_AG22
+signal IO_AG23
+signal IO_AG26
+signal IO_AG27
+signal IO_AG28
+signal IO_AG29
+signal IO_AG30
+signal IO_AH1
+signal IO_AH2
+signal IO_AH4
+signal IO_AH6
+signal IO_AH7
+signal IO_AH10
+signal IO_AH11
+signal IO_AH12
+signal IO_AH14
+signal IO_AH15
+signal IO_AH16
+signal IO_AH17
+signal IO_AH19
+signal IO_AH20
+signal IO_AH21
+signal IO_AH23
+signal IO_AH27
+signal IO_AH29
+signal IO_AH30
+signal IO_AJ4
+signal IO_AJ5
+signal IO_AJ6
+signal IO_AJ8
+signal IO_AJ9
+signal IO_AJ10
+signal IO_AJ11
+signal IO_AJ12
+signal IO_AJ13
+signal IO_AJ14
+signal IO_AJ15
+signal IO_AJ16
+signal IO_AJ17
+signal IO_AJ18
+signal IO_AJ19
+signal IO_AJ20
+signal IO_AJ21
+signal IO_AJ22
+signal IO_AJ23
+signal IO_AJ26
+signal IO_AJ27
+signal IO_AK4
+signal IO_AK5
+signal IO_AK8
+signal IO_AK9
+signal IO_AK11
+signal IO_AK12
+signal IO_AK13
+signal IO_AK15
+signal IO_AK16
+signal IO_AK18
+signal IO_AK19
+signal IO_AK20
+signal IO_AK22
+signal IO_AK23
+signal IO_AK26
+signal IO_AK27
+
+register BSR 1931
+register BR 1
+register DIR 32
+
+instruction length 6
+
+instruction EXTEST 000000 BSR
+instruction SAMPLE/PRELOAD 000001 BSR
+instruction IDCODE 001001 DIR
+instruction BYPASS 111111 BR
+
+bit 1930 I 1 IO_C29
+bit 1929 O 1 IO_C29 1928 1 Z
+bit 1928 C 1 *
+bit 1927 I 1 IO_C30
+bit 1926 O 1 IO_C30 1925 1 Z
+bit 1925 C 1 *
+bit 1924 I 1 IO_D27
+bit 1923 O 1 IO_D27 1922 1 Z
+bit 1922 C 1 *
+bit 1921 I 1 IO_D28
+bit 1920 O 1 IO_D28 1919 1 Z
+bit 1919 C 1 *
+bit 1918 I 1 IO_D29
+bit 1917 O 1 IO_D29 1916 1 Z
+bit 1916 C 1 *
+bit 1915 I 1 IO_D30
+bit 1914 O 1 IO_D30 1913 1 Z
+bit 1913 C 1 *
+bit 1912 I 1 IO_E29
+bit 1911 O 1 IO_E29 1910 1 Z
+bit 1910 C 1 *
+bit 1909 I 1 IO_E30
+bit 1908 O 1 IO_E30 1907 1 Z
+bit 1907 C 1 *
+bit 1906 I 1 IO_F28
+bit 1905 O 1 IO_F28 1904 1 Z
+bit 1904 C 1 *
+bit 1903 I 1 IO_F29
+bit 1902 O 1 IO_F29 1901 1 Z
+bit 1901 C 1 *
+bit 1900 I 1 IO_G27
+bit 1899 O 1 IO_G27 1898 1 Z
+bit 1898 C 1 *
+bit 1897 I 1 IO_G28
+bit 1896 O 1 IO_G28 1895 1 Z
+bit 1895 C 1 *
+bit 1894 I 1 IO_G29
+bit 1893 O 1 IO_G29 1892 1 Z
+bit 1892 C 1 *
+bit 1891 I 1 IO_G30
+bit 1890 O 1 IO_G30 1889 1 Z
+bit 1889 C 1 *
+bit 1888 I 1 IO_G25
+bit 1887 O 1 IO_G25 1886 1 Z
+bit 1886 C 1 *
+bit 1885 I 1 IO_H24
+bit 1884 O 1 IO_H24 1883 1 Z
+bit 1883 C 1 *
+bit 1882 I 1 IO_H25
+bit 1881 O 1 IO_H25 1880 1 Z
+bit 1880 C 1 *
+bit 1879 I 1 IO_H26
+bit 1878 O 1 IO_H26 1877 1 Z
+bit 1877 C 1 *
+bit 1876 I 1 IO_H27
+bit 1875 O 1 IO_H27 1874 1 Z
+bit 1874 C 1 *
+bit 1873 I 1 IO_H28
+bit 1872 O 1 IO_H28 1871 1 Z
+bit 1871 C 1 *
+bit 1870 O 1 *
+bit 1869 O 1 *
+bit 1868 O 1 *
+bit 1867 I 1 IO_J25
+bit 1866 O 1 IO_J25 1865 1 Z
+bit 1865 C 1 *
+bit 1864 I 1 IO_H29
+bit 1863 O 1 IO_H29 1862 1 Z
+bit 1862 C 1 *
+bit 1861 I 1 IO_H30
+bit 1860 O 1 IO_H30 1859 1 Z
+bit 1859 C 1 *
+bit 1858 I 1 IO_J26
+bit 1857 O 1 IO_J26 1856 1 Z
+bit 1856 C 1 *
+bit 1855 I 1 IO_J27
+bit 1854 O 1 IO_J27 1853 1 Z
+bit 1853 C 1 *
+bit 1852 I 1 IO_J29
+bit 1851 O 1 IO_J29 1850 1 Z
+bit 1850 C 1 *
+bit 1849 I 1 IO_J30
+bit 1848 O 1 IO_J30 1847 1 Z
+bit 1847 C 1 *
+bit 1846 I 1 IO_J23
+bit 1845 O 1 IO_J23 1844 1 Z
+bit 1844 C 1 *
+bit 1843 I 1 IO_K22
+bit 1842 O 1 IO_K22 1841 1 Z
+bit 1841 C 1 *
+bit 1840 I 1 IO_K24
+bit 1839 O 1 IO_K24 1838 1 Z
+bit 1838 C 1 *
+bit 1837 I 1 IO_K25
+bit 1836 O 1 IO_K25 1835 1 Z
+bit 1835 C 1 *
+bit 1834 O 1 *
+bit 1833 O 1 *
+bit 1832 O 1 *
+bit 1831 O 1 *
+bit 1830 O 1 *
+bit 1829 O 1 *
+bit 1828 O 1 *
+bit 1827 O 1 *
+bit 1826 O 1 *
+bit 1825 O 1 *
+bit 1824 O 1 *
+bit 1823 O 1 *
+bit 1822 I 1 IO_L25
+bit 1821 O 1 IO_L25 1820 1 Z
+bit 1820 C 1 *
+bit 1819 I 1 IO_L26
+bit 1818 O 1 IO_L26 1817 1 Z
+bit 1817 C 1 *
+bit 1816 I 1 IO_L27
+bit 1815 O 1 IO_L27 1814 1 Z
+bit 1814 C 1 *
+bit 1813 I 1 IO_L28
+bit 1812 O 1 IO_L28 1811 1 Z
+bit 1811 C 1 *
+bit 1810 I 1 IO_L29
+bit 1809 O 1 IO_L29 1808 1 Z
+bit 1808 C 1 *
+bit 1807 I 1 IO_L30
+bit 1806 O 1 IO_L30 1805 1 Z
+bit 1805 C 1 *
+bit 1804 I 1 IO_M22
+bit 1803 O 1 IO_M22 1802 1 Z
+bit 1802 C 1 *
+bit 1801 I 1 IO_M23
+bit 1800 O 1 IO_M23 1799 1 Z
+bit 1799 C 1 *
+bit 1798 I 1 IO_M24
+bit 1797 O 1 IO_M24 1796 1 Z
+bit 1796 C 1 *
+bit 1795 I 1 IO_M25
+bit 1794 O 1 IO_M25 1793 1 Z
+bit 1793 C 1 *
+bit 1792 I 1 IO_M27
+bit 1791 O 1 IO_M27 1790 1 Z
+bit 1790 C 1 *
+bit 1789 I 1 IO_M28
+bit 1788 O 1 IO_M28 1787 1 Z
+bit 1787 C 1 *
+bit 1786 O 1 *
+bit 1785 O 1 *
+bit 1784 O 1 *
+bit 1783 O 1 *
+bit 1782 O 1 *
+bit 1781 O 1 *
+bit 1780 I 1 IO_M21
+bit 1779 O 1 IO_M21 1778 1 Z
+bit 1778 C 1 *
+bit 1777 I 1 IO_N21
+bit 1776 O 1 IO_N21 1775 1 Z
+bit 1775 C 1 *
+bit 1774 I 1 IO_N22
+bit 1773 O 1 IO_N22 1772 1 Z
+bit 1772 C 1 *
+bit 1771 I 1 IO_N23
+bit 1770 O 1 IO_N23 1769 1 Z
+bit 1769 C 1 *
+bit 1768 I 1 IO_M26
+bit 1767 O 1 IO_M26 1766 1 Z
+bit 1766 C 1 *
+bit 1765 I 1 IO_N25
+bit 1764 O 1 IO_N25 1763 1 Z
+bit 1763 C 1 *
+bit 1762 I 1 IO_N26
+bit 1761 O 1 IO_N26 1760 1 Z
+bit 1760 C 1 *
+bit 1759 I 1 IO_N27
+bit 1758 O 1 IO_N27 1757 1 Z
+bit 1757 C 1 *
+bit 1756 O 1 *
+bit 1755 O 1 *
+bit 1754 O 1 *
+bit 1753 O 1 *
+bit 1752 O 1 *
+bit 1751 O 1 *
+bit 1750 I 1 IO_N29
+bit 1749 O 1 IO_N29 1748 1 Z
+bit 1748 C 1 *
+bit 1747 I 1 IO_N30
+bit 1746 O 1 IO_N30 1745 1 Z
+bit 1745 C 1 *
+bit 1744 I 1 IO_P21
+bit 1743 O 1 IO_P21 1742 1 Z
+bit 1742 C 1 *
+bit 1741 I 1 IO_P22
+bit 1740 O 1 IO_P22 1739 1 Z
+bit 1739 C 1 *
+bit 1738 I 1 IO_P24
+bit 1737 O 1 IO_P24 1736 1 Z
+bit 1736 C 1 *
+bit 1735 I 1 IO_P25
+bit 1734 O 1 IO_P25 1733 1 Z
+bit 1733 C 1 *
+bit 1732 I 1 IO_P28
+bit 1731 O 1 IO_P28 1730 1 Z
+bit 1730 C 1 *
+bit 1729 I 1 IO_P29
+bit 1728 O 1 IO_P29 1727 1 Z
+bit 1727 C 1 *
+bit 1726 I 1 IO_R21
+bit 1725 O 1 IO_R21 1724 1 Z
+bit 1724 C 1 *
+bit 1723 I 1 IO_R22
+bit 1722 O 1 IO_R22 1721 1 Z
+bit 1721 C 1 *
+bit 1720 O 1 *
+bit 1719 O 1 *
+bit 1718 O 1 *
+bit 1717 O 1 *
+bit 1716 O 1 *
+bit 1715 O 1 *
+bit 1714 I 1 IO_R23
+bit 1713 O 1 IO_R23 1712 1 Z
+bit 1712 C 1 *
+bit 1711 I 1 IO_R24
+bit 1710 O 1 IO_R24 1709 1 Z
+bit 1709 C 1 *
+bit 1708 I 1 IO_R25
+bit 1707 O 1 IO_R25 1706 1 Z
+bit 1706 C 1 *
+bit 1705 I 1 IO_R26
+bit 1704 O 1 IO_R26 1703 1 Z
+bit 1703 C 1 *
+bit 1702 I 1 IO_R27
+bit 1701 O 1 IO_R27 1700 1 Z
+bit 1700 C 1 *
+bit 1699 I 1 IO_R28
+bit 1698 O 1 IO_R28 1697 1 Z
+bit 1697 C 1 *
+bit 1696 I 1 IO_R29
+bit 1695 O 1 IO_R29 1694 1 Z
+bit 1694 C 1 *
+bit 1693 I 1 IO_R30
+bit 1692 O 1 IO_R30 1691 1 Z
+bit 1691 C 1 *
+bit 1690 I 1 IO_T30
+bit 1689 O 1 IO_T30 1688 1 Z
+bit 1688 C 1 *
+bit 1687 I 1 IO_T29
+bit 1686 O 1 IO_T29 1685 1 Z
+bit 1685 C 1 *
+bit 1684 I 1 IO_T28
+bit 1683 O 1 IO_T28 1682 1 Z
+bit 1682 C 1 *
+bit 1681 I 1 IO_T27
+bit 1680 O 1 IO_T27 1679 1 Z
+bit 1679 C 1 *
+bit 1678 I 1 IO_T26
+bit 1677 O 1 IO_T26 1676 1 Z
+bit 1676 C 1 *
+bit 1675 I 1 IO_T25
+bit 1674 O 1 IO_T25 1673 1 Z
+bit 1673 C 1 *
+bit 1672 I 1 IO_T24
+bit 1671 O 1 IO_T24 1670 1 Z
+bit 1670 C 1 *
+bit 1669 I 1 IO_T23
+bit 1668 O 1 IO_T23 1667 1 Z
+bit 1667 C 1 *
+bit 1666 O 1 *
+bit 1665 O 1 *
+bit 1664 O 1 *
+bit 1663 O 1 *
+bit 1662 O 1 *
+bit 1661 O 1 *
+bit 1660 I 1 IO_T22
+bit 1659 O 1 IO_T22 1658 1 Z
+bit 1658 C 1 *
+bit 1657 I 1 IO_T21
+bit 1656 O 1 IO_T21 1655 1 Z
+bit 1655 C 1 *
+bit 1654 I 1 IO_U29
+bit 1653 O 1 IO_U29 1652 1 Z
+bit 1652 C 1 *
+bit 1651 I 1 IO_U28
+bit 1650 O 1 IO_U28 1649 1 Z
+bit 1649 C 1 *
+bit 1648 I 1 IO_U25
+bit 1647 O 1 IO_U25 1646 1 Z
+bit 1646 C 1 *
+bit 1645 I 1 IO_U24
+bit 1644 O 1 IO_U24 1643 1 Z
+bit 1643 C 1 *
+bit 1642 I 1 IO_U22
+bit 1641 O 1 IO_U22 1640 1 Z
+bit 1640 C 1 *
+bit 1639 I 1 IO_U21
+bit 1638 O 1 IO_U21 1637 1 Z
+bit 1637 C 1 *
+bit 1636 I 1 IO_V30
+bit 1635 O 1 IO_V30 1634 1 Z
+bit 1634 C 1 *
+bit 1633 I 1 IO_V29
+bit 1632 O 1 IO_V29 1631 1 Z
+bit 1631 C 1 *
+bit 1630 O 1 *
+bit 1629 O 1 *
+bit 1628 O 1 *
+bit 1627 O 1 *
+bit 1626 O 1 *
+bit 1625 O 1 *
+bit 1624 I 1 IO_V25
+bit 1623 O 1 IO_V25 1622 1 Z
+bit 1622 C 1 *
+bit 1621 I 1 IO_W26
+bit 1620 O 1 IO_W26 1619 1 Z
+bit 1619 C 1 *
+bit 1618 I 1 IO_V23
+bit 1617 O 1 IO_V23 1616 1 Z
+bit 1616 C 1 *
+bit 1615 I 1 IO_V22
+bit 1614 O 1 IO_V22 1613 1 Z
+bit 1613 C 1 *
+bit 1612 I 1 IO_V21
+bit 1611 O 1 IO_V21 1610 1 Z
+bit 1610 C 1 *
+bit 1609 I 1 IO_W21
+bit 1608 O 1 IO_W21 1607 1 Z
+bit 1607 C 1 *
+bit 1606 I 1 IO_W30
+bit 1605 O 1 IO_W30 1604 1 Z
+bit 1604 C 1 *
+bit 1603 I 1 IO_W29
+bit 1602 O 1 IO_W29 1601 1 Z
+bit 1601 C 1 *
+bit 1600 O 1 *
+bit 1599 O 1 *
+bit 1598 O 1 *
+bit 1597 O 1 *
+bit 1596 O 1 *
+bit 1595 O 1 *
+bit 1594 I 1 IO_Y30
+bit 1593 O 1 IO_Y30 1592 1 Z
+bit 1592 C 1 *
+bit 1591 I 1 IO_Y29
+bit 1590 O 1 IO_Y29 1589 1 Z
+bit 1589 C 1 *
+bit 1588 I 1 IO_Y28
+bit 1587 O 1 IO_Y28 1586 1 Z
+bit 1586 C 1 *
+bit 1585 I 1 IO_Y27
+bit 1584 O 1 IO_Y27 1583 1 Z
+bit 1583 C 1 *
+bit 1582 I 1 IO_Y26
+bit 1581 O 1 IO_Y26 1580 1 Z
+bit 1580 C 1 *
+bit 1579 I 1 IO_Y25
+bit 1578 O 1 IO_Y25 1577 1 Z
+bit 1577 C 1 *
+bit 1576 I 1 IO_Y24
+bit 1575 O 1 IO_Y24 1574 1 Z
+bit 1574 C 1 *
+bit 1573 I 1 IO_Y23
+bit 1572 O 1 IO_Y23 1571 1 Z
+bit 1571 C 1 *
+bit 1570 I 1 IO_Y21
+bit 1569 O 1 IO_Y21 1568 1 Z
+bit 1568 C 1 *
+bit 1567 I 1 IO_AA21
+bit 1566 O 1 IO_AA21 1565 1 Z
+bit 1565 C 1 *
+bit 1564 I 1 IO_AA29
+bit 1563 O 1 IO_AA29 1562 1 Z
+bit 1562 C 1 *
+bit 1561 I 1 IO_AA28
+bit 1560 O 1 IO_AA28 1559 1 Z
+bit 1559 C 1 *
+bit 1558 O 1 *
+bit 1557 O 1 *
+bit 1556 O 1 *
+bit 1555 O 1 *
+bit 1554 O 1 *
+bit 1553 O 1 *
+bit 1552 I 1 IO_AA25
+bit 1551 O 1 IO_AA25 1550 1 Z
+bit 1550 C 1 *
+bit 1549 I 1 IO_AA24
+bit 1548 O 1 IO_AA24 1547 1 Z
+bit 1547 C 1 *
+bit 1546 I 1 IO_AA22
+bit 1545 O 1 IO_AA22 1544 1 Z
+bit 1544 C 1 *
+bit 1543 I 1 IO_AB23
+bit 1542 O 1 IO_AB23 1541 1 Z
+bit 1541 C 1 *
+bit 1540 I 1 IO_AB30
+bit 1539 O 1 IO_AB30 1538 1 Z
+bit 1538 C 1 *
+bit 1537 I 1 IO_AB29
+bit 1536 O 1 IO_AB29 1535 1 Z
+bit 1535 C 1 *
+bit 1534 I 1 IO_AB27
+bit 1533 O 1 IO_AB27 1532 1 Z
+bit 1532 C 1 *
+bit 1531 I 1 IO_AB26
+bit 1530 O 1 IO_AB26 1529 1 Z
+bit 1529 C 1 *
+bit 1528 I 1 IO_AC30
+bit 1527 O 1 IO_AC30 1526 1 Z
+bit 1526 C 1 *
+bit 1525 I 1 IO_AC29
+bit 1524 O 1 IO_AC29 1523 1 Z
+bit 1523 C 1 *
+bit 1522 I 1 IO_AB25
+bit 1521 O 1 IO_AB25 1520 1 Z
+bit 1520 C 1 *
+bit 1519 O 1 *
+bit 1518 O 1 *
+bit 1517 O 1 *
+bit 1516 I 1 IO_AC28
+bit 1515 O 1 IO_AC28 1514 1 Z
+bit 1514 C 1 *
+bit 1513 I 1 IO_AC27
+bit 1512 O 1 IO_AC27 1511 1 Z
+bit 1511 C 1 *
+bit 1510 I 1 IO_AC26
+bit 1509 O 1 IO_AC26 1508 1 Z
+bit 1508 C 1 *
+bit 1507 I 1 IO_AC25
+bit 1506 O 1 IO_AC25 1505 1 Z
+bit 1505 C 1 *
+bit 1504 I 1 IO_AC24
+bit 1503 O 1 IO_AC24 1502 1 Z
+bit 1502 C 1 *
+bit 1501 I 1 IO_AD25
+bit 1500 O 1 IO_AD25 1499 1 Z
+bit 1499 C 1 *
+bit 1498 I 1 IO_AD30
+bit 1497 O 1 IO_AD30 1496 1 Z
+bit 1496 C 1 *
+bit 1495 I 1 IO_AD29
+bit 1494 O 1 IO_AD29 1493 1 Z
+bit 1493 C 1 *
+bit 1492 I 1 IO_AD28
+bit 1491 O 1 IO_AD28 1490 1 Z
+bit 1490 C 1 *
+bit 1489 I 1 IO_AD27
+bit 1488 O 1 IO_AD27 1487 1 Z
+bit 1487 C 1 *
+bit 1486 I 1 IO_AE29
+bit 1485 O 1 IO_AE29 1484 1 Z
+bit 1484 C 1 *
+bit 1483 I 1 IO_AE28
+bit 1482 O 1 IO_AE28 1481 1 Z
+bit 1481 C 1 *
+bit 1480 I 1 IO_AE26
+bit 1479 O 1 IO_AE26 1478 1 Z
+bit 1478 C 1 *
+bit 1477 I 1 IO_AF27
+bit 1476 O 1 IO_AF27 1475 1 Z
+bit 1475 C 1 *
+bit 1474 I 1 IO_AF30
+bit 1473 O 1 IO_AF30 1472 1 Z
+bit 1472 C 1 *
+bit 1471 I 1 IO_AF29
+bit 1470 O 1 IO_AF29 1469 1 Z
+bit 1469 C 1 *
+bit 1468 I 1 IO_AG30
+bit 1467 O 1 IO_AG30 1466 1 Z
+bit 1466 C 1 *
+bit 1465 I 1 IO_AG29
+bit 1464 O 1 IO_AG29 1463 1 Z
+bit 1463 C 1 *
+bit 1462 I 1 IO_AG28
+bit 1461 O 1 IO_AG28 1460 1 Z
+bit 1460 C 1 *
+bit 1459 I 1 IO_AG27
+bit 1458 O 1 IO_AG27 1457 1 Z
+bit 1457 C 1 *
+bit 1456 I 1 IO_AH30
+bit 1455 O 1 IO_AH30 1454 1 Z
+bit 1454 C 1 *
+bit 1453 I 1 IO_AH29
+bit 1452 O 1 IO_AH29 1451 1 Z
+bit 1451 C 1 *
+bit 1450 I 1 CCLK_AH28
+bit 1449 O 1 CCLK_AH28 1448 1 Z
+bit 1448 C 1 *
+bit 1447 I 1 DONE_AJ28
+bit 1446 O 1 DONE_AJ28 1445 1 Z
+bit 1445 C 1 *
+bit 1444 I 1 IO_AK28
+bit 1443 O 1 IO_AK28 1442 1 Z
+bit 1442 C 1 *
+bit 1441 I 1 IO_AJ27
+bit 1440 O 1 IO_AJ27 1439 1 Z
+bit 1439 C 1 *
+bit 1438 I 1 IO_AK27
+bit 1437 O 1 IO_AK27 1436 1 Z
+bit 1436 C 1 *
+bit 1435 I 1 IO_AJ26
+bit 1434 O 1 IO_AJ26 1433 1 Z
+bit 1433 C 1 *
+bit 1432 I 1 IO_AK26
+bit 1431 O 1 IO_AK26 1430 1 Z
+bit 1430 C 1 *
+bit 1429 I 1 IO_AH27
+bit 1428 O 1 IO_AH27 1427 1 Z
+bit 1427 C 1 *
+bit 1426 I 1 IO_AG26
+bit 1425 O 1 IO_AG26 1424 1 Z
+bit 1424 C 1 *
+bit 1423 I 1 IO_AF25
+bit 1422 O 1 IO_AF25 1421 1 Z
+bit 1421 C 1 *
+bit 1420 I 1 IO_AD24
+bit 1419 O 1 IO_AD24 1418 1 Z
+bit 1418 C 1 *
+bit 1417 I 1 IO_AC23
+bit 1416 O 1 IO_AC23 1415 1 Z
+bit 1415 C 1 *
+bit 1414 I 1 IO_AD23
+bit 1413 O 1 IO_AD23 1412 1 Z
+bit 1412 C 1 *
+bit 1411 I 1 IO_AE23
+bit 1410 O 1 IO_AE23 1409 1 Z
+bit 1409 C 1 *
+bit 1408 I 1 IO_AF23
+bit 1407 O 1 IO_AF23 1406 1 Z
+bit 1406 C 1 *
+bit 1405 I 1 IO_AG23
+bit 1404 O 1 IO_AG23 1403 1 Z
+bit 1403 C 1 *
+bit 1402 I 1 IO_AH23
+bit 1401 O 1 IO_AH23 1400 1 Z
+bit 1400 C 1 *
+bit 1399 O 1 *
+bit 1398 O 1 *
+bit 1397 O 1 *
+bit 1396 I 1 IO_AJ23
+bit 1395 O 1 IO_AJ23 1394 1 Z
+bit 1394 C 1 *
+bit 1393 I 1 IO_AK23
+bit 1392 O 1 IO_AK23 1391 1 Z
+bit 1391 C 1 *
+bit 1390 I 1 IO_AB22
+bit 1389 O 1 IO_AB22 1388 1 Z
+bit 1388 C 1 *
+bit 1387 I 1 IO_AC22
+bit 1386 O 1 IO_AC22 1385 1 Z
+bit 1385 C 1 *
+bit 1384 I 1 IO_AE22
+bit 1383 O 1 IO_AE22 1382 1 Z
+bit 1382 C 1 *
+bit 1381 I 1 IO_AF22
+bit 1380 O 1 IO_AF22 1379 1 Z
+bit 1379 C 1 *
+bit 1378 I 1 IO_AG22
+bit 1377 O 1 IO_AG22 1376 1 Z
+bit 1376 C 1 *
+bit 1375 I 1 IO_AJ22
+bit 1374 O 1 IO_AJ22 1373 1 Z
+bit 1373 C 1 *
+bit 1372 I 1 IO_AK22
+bit 1371 O 1 IO_AK22 1370 1 Z
+bit 1370 C 1 *
+bit 1369 O 1 *
+bit 1368 O 1 *
+bit 1367 O 1 *
+bit 1366 I 1 IO_AD21
+bit 1365 O 1 IO_AD21 1364 1 Z
+bit 1364 C 1 *
+bit 1363 I 1 IO_AE21
+bit 1362 O 1 IO_AE21 1361 1 Z
+bit 1361 C 1 *
+bit 1360 I 1 IO_AH21
+bit 1359 O 1 IO_AH21 1358 1 Z
+bit 1358 C 1 *
+bit 1357 I 1 IO_AJ21
+bit 1356 O 1 IO_AJ21 1355 1 Z
+bit 1355 C 1 *
+bit 1354 O 1 *
+bit 1353 O 1 *
+bit 1352 O 1 *
+bit 1351 I 1 IO_AB21
+bit 1350 O 1 IO_AB21 1349 1 Z
+bit 1349 C 1 *
+bit 1348 I 1 IO_AA20
+bit 1347 O 1 IO_AA20 1346 1 Z
+bit 1346 C 1 *
+bit 1345 I 1 IO_AC20
+bit 1344 O 1 IO_AC20 1343 1 Z
+bit 1343 C 1 *
+bit 1342 I 1 IO_AD20
+bit 1341 O 1 IO_AD20 1340 1 Z
+bit 1340 C 1 *
+bit 1339 O 1 *
+bit 1338 O 1 *
+bit 1337 O 1 *
+bit 1336 I 1 IO_AE20
+bit 1335 O 1 IO_AE20 1334 1 Z
+bit 1334 C 1 *
+bit 1333 I 1 IO_AF20
+bit 1332 O 1 IO_AF20 1331 1 Z
+bit 1331 C 1 *
+bit 1330 I 1 IO_AG20
+bit 1329 O 1 IO_AG20 1328 1 Z
+bit 1328 C 1 *
+bit 1327 I 1 IO_AH20
+bit 1326 O 1 IO_AH20 1325 1 Z
+bit 1325 C 1 *
+bit 1324 O 1 *
+bit 1323 O 1 *
+bit 1322 O 1 *
+bit 1321 I 1 IO_AJ20
+bit 1320 O 1 IO_AJ20 1319 1 Z
+bit 1319 C 1 *
+bit 1318 I 1 IO_AK20
+bit 1317 O 1 IO_AK20 1316 1 Z
+bit 1316 C 1 *
+bit 1315 I 1 IO_AA19
+bit 1314 O 1 IO_AA19 1313 1 Z
+bit 1313 C 1 *
+bit 1312 I 1 IO_AB19
+bit 1311 O 1 IO_AB19 1310 1 Z
+bit 1310 C 1 *
+bit 1309 O 1 *
+bit 1308 O 1 *
+bit 1307 O 1 *
+bit 1306 I 1 IO_AC19
+bit 1305 O 1 IO_AC19 1304 1 Z
+bit 1304 C 1 *
+bit 1303 I 1 IO_AD19
+bit 1302 O 1 IO_AD19 1301 1 Z
+bit 1301 C 1 *
+bit 1300 I 1 IO_AE19
+bit 1299 O 1 IO_AE19 1298 1 Z
+bit 1298 C 1 *
+bit 1297 I 1 IO_AF19
+bit 1296 O 1 IO_AF19 1295 1 Z
+bit 1295 C 1 *
+bit 1294 O 1 *
+bit 1293 O 1 *
+bit 1292 O 1 *
+bit 1291 I 1 IO_AG19
+bit 1290 O 1 IO_AG19 1289 1 Z
+bit 1289 C 1 *
+bit 1288 I 1 IO_AH19
+bit 1287 O 1 IO_AH19 1286 1 Z
+bit 1286 C 1 *
+bit 1285 I 1 IO_AJ19
+bit 1284 O 1 IO_AJ19 1283 1 Z
+bit 1283 C 1 *
+bit 1282 I 1 IO_AK19
+bit 1281 O 1 IO_AK19 1280 1 Z
+bit 1280 C 1 *
+bit 1279 I 1 IO_AA18
+bit 1278 O 1 IO_AA18 1277 1 Z
+bit 1277 C 1 *
+bit 1276 I 1 IO_AB18
+bit 1275 O 1 IO_AB18 1274 1 Z
+bit 1274 C 1 *
+bit 1273 I 1 IO_AC18
+bit 1272 O 1 IO_AC18 1271 1 Z
+bit 1271 C 1 *
+bit 1270 I 1 IO_AE18
+bit 1269 O 1 IO_AE18 1268 1 Z
+bit 1268 C 1 *
+bit 1267 I 1 IO_AF18
+bit 1266 O 1 IO_AF18 1265 1 Z
+bit 1265 C 1 *
+bit 1264 I 1 IO_AG18
+bit 1263 O 1 IO_AG18 1262 1 Z
+bit 1262 C 1 *
+bit 1261 I 1 IO_AJ18
+bit 1260 O 1 IO_AJ18 1259 1 Z
+bit 1259 C 1 *
+bit 1258 I 1 IO_AK18
+bit 1257 O 1 IO_AK18 1256 1 Z
+bit 1256 C 1 *
+bit 1255 I 1 IO_AA17
+bit 1254 O 1 IO_AA17 1253 1 Z
+bit 1253 C 1 *
+bit 1252 I 1 IO_AB17
+bit 1251 O 1 IO_AB17 1250 1 Z
+bit 1250 C 1 *
+bit 1249 I 1 IO_AA16
+bit 1248 O 1 IO_AA16 1247 1 Z
+bit 1247 C 1 *
+bit 1246 I 1 IO_AD17
+bit 1245 O 1 IO_AD17 1244 1 Z
+bit 1244 C 1 *
+bit 1243 I 1 IO_AE17
+bit 1242 O 1 IO_AE17 1241 1 Z
+bit 1241 C 1 *
+bit 1240 I 1 IO_AH17
+bit 1239 O 1 IO_AH17 1238 1 Z
+bit 1238 C 1 *
+bit 1237 I 1 IO_AJ17
+bit 1236 O 1 IO_AJ17 1235 1 Z
+bit 1235 C 1 *
+bit 1234 O 1 *
+bit 1233 O 1 *
+bit 1232 O 1 *
+bit 1231 I 1 IO_AB16
+bit 1230 O 1 IO_AB16 1229 1 Z
+bit 1229 C 1 *
+bit 1228 I 1 IO_AC16
+bit 1227 O 1 IO_AC16 1226 1 Z
+bit 1226 C 1 *
+bit 1225 I 1 IO_AD16
+bit 1224 O 1 IO_AD16 1223 1 Z
+bit 1223 C 1 *
+bit 1222 I 1 IO_AE16
+bit 1221 O 1 IO_AE16 1220 1 Z
+bit 1220 C 1 *
+bit 1219 I 1 IO_AF16
+bit 1218 O 1 IO_AF16 1217 1 Z
+bit 1217 C 1 *
+bit 1216 I 1 IO_AG16
+bit 1215 O 1 IO_AG16 1214 1 Z
+bit 1214 C 1 *
+bit 1213 I 1 IO_AH16
+bit 1212 O 1 IO_AH16 1211 1 Z
+bit 1211 C 1 *
+bit 1210 I 1 IO_AJ16
+bit 1209 O 1 IO_AJ16 1208 1 Z
+bit 1208 C 1 *
+bit 1207 I 1 IO_AK16
+bit 1206 O 1 IO_AK16 1205 1 Z
+bit 1205 C 1 *
+bit 1204 I 1 IO_AK15
+bit 1203 O 1 IO_AK15 1202 1 Z
+bit 1202 C 1 *
+bit 1201 I 1 IO_AJ15
+bit 1200 O 1 IO_AJ15 1199 1 Z
+bit 1199 C 1 *
+bit 1198 I 1 IO_AH15
+bit 1197 O 1 IO_AH15 1196 1 Z
+bit 1196 C 1 *
+bit 1195 I 1 IO_AG15
+bit 1194 O 1 IO_AG15 1193 1 Z
+bit 1193 C 1 *
+bit 1192 I 1 IO_AF15
+bit 1191 O 1 IO_AF15 1190 1 Z
+bit 1190 C 1 *
+bit 1189 I 1 IO_AE15
+bit 1188 O 1 IO_AE15 1187 1 Z
+bit 1187 C 1 *
+bit 1186 I 1 IO_AD15
+bit 1185 O 1 IO_AD15 1184 1 Z
+bit 1184 C 1 *
+bit 1183 I 1 IO_AD14
+bit 1182 O 1 IO_AD14 1181 1 Z
+bit 1181 C 1 *
+bit 1180 I 1 IO_AC15
+bit 1179 O 1 IO_AC15 1178 1 Z
+bit 1178 C 1 *
+bit 1177 I 1 IO_AB15
+bit 1176 O 1 IO_AB15 1175 1 Z
+bit 1175 C 1 *
+bit 1174 I 1 IO_AA15
+bit 1173 O 1 IO_AA15 1172 1 Z
+bit 1172 C 1 *
+bit 1171 I 1 IO_AJ14
+bit 1170 O 1 IO_AJ14 1169 1 Z
+bit 1169 C 1 *
+bit 1168 I 1 IO_AH14
+bit 1167 O 1 IO_AH14 1166 1 Z
+bit 1166 C 1 *
+bit 1165 I 1 IO_AE14
+bit 1164 O 1 IO_AE14 1163 1 Z
+bit 1163 C 1 *
+bit 1162 I 1 IO_AE13
+bit 1161 O 1 IO_AE13 1160 1 Z
+bit 1160 C 1 *
+bit 1159 O 1 *
+bit 1158 O 1 *
+bit 1157 O 1 *
+bit 1156 I 1 IO_AB14
+bit 1155 O 1 IO_AB14 1154 1 Z
+bit 1154 C 1 *
+bit 1153 I 1 IO_AA14
+bit 1152 O 1 IO_AA14 1151 1 Z
+bit 1151 C 1 *
+bit 1150 I 1 IO_AK13
+bit 1149 O 1 IO_AK13 1148 1 Z
+bit 1148 C 1 *
+bit 1147 I 1 IO_AJ13
+bit 1146 O 1 IO_AJ13 1145 1 Z
+bit 1145 C 1 *
+bit 1144 O 1 *
+bit 1143 O 1 *
+bit 1142 O 1 *
+bit 1141 I 1 IO_AG13
+bit 1140 O 1 IO_AG13 1139 1 Z
+bit 1139 C 1 *
+bit 1138 I 1 IO_AF13
+bit 1137 O 1 IO_AF13 1136 1 Z
+bit 1136 C 1 *
+bit 1135 I 1 IO_AC13
+bit 1134 O 1 IO_AC13 1133 1 Z
+bit 1133 C 1 *
+bit 1132 I 1 IO_AB13
+bit 1131 O 1 IO_AB13 1130 1 Z
+bit 1130 C 1 *
+bit 1129 O 1 *
+bit 1128 O 1 *
+bit 1127 O 1 *
+bit 1126 I 1 IO_AA13
+bit 1125 O 1 IO_AA13 1124 1 Z
+bit 1124 C 1 *
+bit 1123 I 1 IO_AA12
+bit 1122 O 1 IO_AA12 1121 1 Z
+bit 1121 C 1 *
+bit 1120 I 1 IO_AK12
+bit 1119 O 1 IO_AK12 1118 1 Z
+bit 1118 C 1 *
+bit 1117 I 1 IO_AJ12
+bit 1116 O 1 IO_AJ12 1115 1 Z
+bit 1115 C 1 *
+bit 1114 O 1 *
+bit 1113 O 1 *
+bit 1112 O 1 *
+bit 1111 I 1 IO_AH12
+bit 1110 O 1 IO_AH12 1109 1 Z
+bit 1109 C 1 *
+bit 1108 I 1 IO_AG12
+bit 1107 O 1 IO_AG12 1106 1 Z
+bit 1106 C 1 *
+bit 1105 I 1 IO_AF12
+bit 1104 O 1 IO_AF12 1103 1 Z
+bit 1103 C 1 *
+bit 1102 I 1 IO_AE12
+bit 1101 O 1 IO_AE12 1100 1 Z
+bit 1100 C 1 *
+bit 1099 O 1 *
+bit 1098 O 1 *
+bit 1097 O 1 *
+bit 1096 I 1 IO_AD12
+bit 1095 O 1 IO_AD12 1094 1 Z
+bit 1094 C 1 *
+bit 1093 I 1 IO_AC12
+bit 1092 O 1 IO_AC12 1091 1 Z
+bit 1091 C 1 *
+bit 1090 I 1 IO_AB12
+bit 1089 O 1 IO_AB12 1088 1 Z
+bit 1088 C 1 *
+bit 1087 I 1 IO_AC11
+bit 1086 O 1 IO_AC11 1085 1 Z
+bit 1085 C 1 *
+bit 1084 O 1 *
+bit 1083 O 1 *
+bit 1082 O 1 *
+bit 1081 I 1 IO_AK11
+bit 1080 O 1 IO_AK11 1079 1 Z
+bit 1079 C 1 *
+bit 1078 I 1 IO_AJ11
+bit 1077 O 1 IO_AJ11 1076 1 Z
+bit 1076 C 1 *
+bit 1075 I 1 IO_AH11
+bit 1074 O 1 IO_AH11 1073 1 Z
+bit 1073 C 1 *
+bit 1072 I 1 IO_AG11
+bit 1071 O 1 IO_AG11 1070 1 Z
+bit 1070 C 1 *
+bit 1069 O 1 *
+bit 1068 O 1 *
+bit 1067 O 1 *
+bit 1066 I 1 IO_AF11
+bit 1065 O 1 IO_AF11 1064 1 Z
+bit 1064 C 1 *
+bit 1063 I 1 IO_AE11
+bit 1062 O 1 IO_AE11 1061 1 Z
+bit 1061 C 1 *
+bit 1060 I 1 IO_AD11
+bit 1059 O 1 IO_AD11 1058 1 Z
+bit 1058 C 1 *
+bit 1057 I 1 IO_AD10
+bit 1056 O 1 IO_AD10 1055 1 Z
+bit 1055 C 1 *
+bit 1054 I 1 IO_AA11
+bit 1053 O 1 IO_AA11 1052 1 Z
+bit 1052 C 1 *
+bit 1051 I 1 IO_AJ10
+bit 1050 O 1 IO_AJ10 1049 1 Z
+bit 1049 C 1 *
+bit 1048 I 1 IO_AH10
+bit 1047 O 1 IO_AH10 1046 1 Z
+bit 1046 C 1 *
+bit 1045 I 1 IO_AE10
+bit 1044 O 1 IO_AE10 1043 1 Z
+bit 1043 C 1 *
+bit 1042 I 1 IO_AE9
+bit 1041 O 1 IO_AE9 1040 1 Z
+bit 1040 C 1 *
+bit 1039 I 1 IO_AB10
+bit 1038 O 1 IO_AB10 1037 1 Z
+bit 1037 C 1 *
+bit 1036 I 1 IO_AK9
+bit 1035 O 1 IO_AK9 1034 1 Z
+bit 1034 C 1 *
+bit 1033 I 1 IO_AJ9
+bit 1032 O 1 IO_AJ9 1031 1 Z
+bit 1031 C 1 *
+bit 1030 I 1 IO_AG9
+bit 1029 O 1 IO_AG9 1028 1 Z
+bit 1028 C 1 *
+bit 1027 I 1 IO_AF9
+bit 1026 O 1 IO_AF9 1025 1 Z
+bit 1025 C 1 *
+bit 1024 O 1 *
+bit 1023 O 1 *
+bit 1022 O 1 *
+bit 1021 I 1 IO_AC9
+bit 1020 O 1 IO_AC9 1019 1 Z
+bit 1019 C 1 *
+bit 1018 I 1 IO_AB9
+bit 1017 O 1 IO_AB9 1016 1 Z
+bit 1016 C 1 *
+bit 1015 I 1 IO_AK8
+bit 1014 O 1 IO_AK8 1013 1 Z
+bit 1013 C 1 *
+bit 1012 I 1 IO_AJ8
+bit 1011 O 1 IO_AJ8 1010 1 Z
+bit 1010 C 1 *
+bit 1009 O 1 *
+bit 1008 O 1 *
+bit 1007 O 1 *
+bit 1006 I 1 IO_AH7
+bit 1005 O 1 IO_AH7 1004 1 Z
+bit 1004 C 1 *
+bit 1003 I 1 IO_AG7
+bit 1002 O 1 IO_AG7 1001 1 Z
+bit 1001 C 1 *
+bit 1000 I 1 IO_AE7
+bit 999 O 1 IO_AE7 998 1 Z
+bit 998 C 1 *
+bit 997 I 1 IO_AD7
+bit 996 O 1 IO_AD7 995 1 Z
+bit 995 C 1 *
+bit 994 I 1 IO_AE6
+bit 993 O 1 IO_AE6 992 1 Z
+bit 992 C 1 *
+bit 991 I 1 IO_AJ6
+bit 990 O 1 IO_AJ6 989 1 Z
+bit 989 C 1 *
+bit 988 I 1 IO_AH6
+bit 987 O 1 IO_AH6 986 1 Z
+bit 986 C 1 *
+bit 985 I 1 IO_AF6
+bit 984 O 1 IO_AF6 983 1 Z
+bit 983 C 1 *
+bit 982 I 1 IO_AG5
+bit 981 O 1 IO_AG5 980 1 Z
+bit 980 C 1 *
+bit 979 I 1 IO_AH4
+bit 978 O 1 IO_AH4 977 1 Z
+bit 977 C 1 *
+bit 976 I 1 IO_AK5
+bit 975 O 1 IO_AK5 974 1 Z
+bit 974 C 1 *
+bit 973 I 1 IO_AJ5
+bit 972 O 1 IO_AJ5 971 1 Z
+bit 971 C 1 *
+bit 970 I 1 IO_AK4
+bit 969 O 1 IO_AK4 968 1 Z
+bit 968 C 1 *
+bit 967 I 1 IO_AJ4
+bit 966 O 1 IO_AJ4 965 1 Z
+bit 965 C 1 *
+bit 964 I 1 M2_AK3
+bit 963 I 1 M0_AJ3
+bit 962 I 1 M1_AH3
+bit 961 I 1 IO_AH2
+bit 960 O 1 IO_AH2 959 1 Z
+bit 959 C 1 *
+bit 958 I 1 IO_AH1
+bit 957 O 1 IO_AH1 956 1 Z
+bit 956 C 1 *
+bit 955 I 1 IO_AG4
+bit 954 O 1 IO_AG4 953 1 Z
+bit 953 C 1 *
+bit 952 I 1 IO_AG3
+bit 951 O 1 IO_AG3 950 1 Z
+bit 950 C 1 *
+bit 949 I 1 IO_AG2
+bit 948 O 1 IO_AG2 947 1 Z
+bit 947 C 1 *
+bit 946 I 1 IO_AG1
+bit 945 O 1 IO_AG1 944 1 Z
+bit 944 C 1 *
+bit 943 I 1 IO_AF2
+bit 942 O 1 IO_AF2 941 1 Z
+bit 941 C 1 *
+bit 940 I 1 IO_AF1
+bit 939 O 1 IO_AF1 938 1 Z
+bit 938 C 1 *
+bit 937 I 1 IO_AF4
+bit 936 O 1 IO_AF4 935 1 Z
+bit 935 C 1 *
+bit 934 I 1 IO_AE5
+bit 933 O 1 IO_AE5 932 1 Z
+bit 932 C 1 *
+bit 931 I 1 IO_AE3
+bit 930 O 1 IO_AE3 929 1 Z
+bit 929 C 1 *
+bit 928 I 1 IO_AE2
+bit 927 O 1 IO_AE2 926 1 Z
+bit 926 C 1 *
+bit 925 I 1 IO_AD4
+bit 924 O 1 IO_AD4 923 1 Z
+bit 923 C 1 *
+bit 922 I 1 IO_AD3
+bit 921 O 1 IO_AD3 920 1 Z
+bit 920 C 1 *
+bit 919 I 1 IO_AD2
+bit 918 O 1 IO_AD2 917 1 Z
+bit 917 C 1 *
+bit 916 I 1 IO_AD1
+bit 915 O 1 IO_AD1 914 1 Z
+bit 914 C 1 *
+bit 913 I 1 IO_AD6
+bit 912 O 1 IO_AD6 911 1 Z
+bit 911 C 1 *
+bit 910 I 1 IO_AC7
+bit 909 O 1 IO_AC7 908 1 Z
+bit 908 C 1 *
+bit 907 I 1 IO_AC6
+bit 906 O 1 IO_AC6 905 1 Z
+bit 905 C 1 *
+bit 904 I 1 IO_AC5
+bit 903 O 1 IO_AC5 902 1 Z
+bit 902 C 1 *
+bit 901 I 1 IO_AC4
+bit 900 O 1 IO_AC4 899 1 Z
+bit 899 C 1 *
+bit 898 I 1 IO_AC3
+bit 897 O 1 IO_AC3 896 1 Z
+bit 896 C 1 *
+bit 895 O 1 *
+bit 894 O 1 *
+bit 893 O 1 *
+bit 892 I 1 IO_AB6
+bit 891 O 1 IO_AB6 890 1 Z
+bit 890 C 1 *
+bit 889 I 1 IO_AC2
+bit 888 O 1 IO_AC2 887 1 Z
+bit 887 C 1 *
+bit 886 I 1 IO_AC1
+bit 885 O 1 IO_AC1 884 1 Z
+bit 884 C 1 *
+bit 883 I 1 IO_AB5
+bit 882 O 1 IO_AB5 881 1 Z
+bit 881 C 1 *
+bit 880 I 1 IO_AB4
+bit 879 O 1 IO_AB4 878 1 Z
+bit 878 C 1 *
+bit 877 I 1 IO_AB2
+bit 876 O 1 IO_AB2 875 1 Z
+bit 875 C 1 *
+bit 874 I 1 IO_AB1
+bit 873 O 1 IO_AB1 872 1 Z
+bit 872 C 1 *
+bit 871 I 1 IO_AB8
+bit 870 O 1 IO_AB8 869 1 Z
+bit 869 C 1 *
+bit 868 I 1 IO_AA9
+bit 867 O 1 IO_AA9 866 1 Z
+bit 866 C 1 *
+bit 865 I 1 IO_AA7
+bit 864 O 1 IO_AA7 863 1 Z
+bit 863 C 1 *
+bit 862 I 1 IO_AA6
+bit 861 O 1 IO_AA6 860 1 Z
+bit 860 C 1 *
+bit 859 O 1 *
+bit 858 O 1 *
+bit 857 O 1 *
+bit 856 O 1 *
+bit 855 O 1 *
+bit 854 O 1 *
+bit 853 I 1 IO_AA3
+bit 852 O 1 IO_AA3 851 1 Z
+bit 851 C 1 *
+bit 850 I 1 IO_AA2
+bit 849 O 1 IO_AA2 848 1 Z
+bit 848 C 1 *
+bit 847 I 1 IO_AA10
+bit 846 O 1 IO_AA10 845 1 Z
+bit 845 C 1 *
+bit 844 I 1 IO_Y10
+bit 843 O 1 IO_Y10 842 1 Z
+bit 842 C 1 *
+bit 841 I 1 IO_Y8
+bit 840 O 1 IO_Y8 839 1 Z
+bit 839 C 1 *
+bit 838 I 1 IO_Y7
+bit 837 O 1 IO_Y7 836 1 Z
+bit 836 C 1 *
+bit 835 I 1 IO_Y6
+bit 834 O 1 IO_Y6 833 1 Z
+bit 833 C 1 *
+bit 832 I 1 IO_Y5
+bit 831 O 1 IO_Y5 830 1 Z
+bit 830 C 1 *
+bit 829 O 1 *
+bit 828 O 1 *
+bit 827 O 1 *
+bit 826 O 1 *
+bit 825 O 1 *
+bit 824 O 1 *
+bit 823 I 1 IO_Y2
+bit 822 O 1 IO_Y2 821 1 Z
+bit 821 C 1 *
+bit 820 I 1 IO_Y1
+bit 819 O 1 IO_Y1 818 1 Z
+bit 818 C 1 *
+bit 817 O 1 *
+bit 816 O 1 *
+bit 815 O 1 *
+bit 814 O 1 *
+bit 813 O 1 *
+bit 812 O 1 *
+bit 811 I 1 IO_W7
+bit 810 O 1 IO_W7 809 1 Z
+bit 809 C 1 *
+bit 808 I 1 IO_W6
+bit 807 O 1 IO_W6 806 1 Z
+bit 806 C 1 *
+bit 805 I 1 IO_W4
+bit 804 O 1 IO_W4 803 1 Z
+bit 803 C 1 *
+bit 802 I 1 IO_W3
+bit 801 O 1 IO_W3 800 1 Z
+bit 800 C 1 *
+bit 799 I 1 IO_W2
+bit 798 O 1 IO_W2 797 1 Z
+bit 797 C 1 *
+bit 796 I 1 IO_W1
+bit 795 O 1 IO_W1 794 1 Z
+bit 794 C 1 *
+bit 793 I 1 IO_W10
+bit 792 O 1 IO_W10 791 1 Z
+bit 791 C 1 *
+bit 790 I 1 IO_V10
+bit 789 O 1 IO_V10 788 1 Z
+bit 788 C 1 *
+bit 787 O 1 *
+bit 786 O 1 *
+bit 785 O 1 *
+bit 784 O 1 *
+bit 783 O 1 *
+bit 782 O 1 *
+bit 781 I 1 IO_W5
+bit 780 O 1 IO_W5 779 1 Z
+bit 779 C 1 *
+bit 778 I 1 IO_V6
+bit 777 O 1 IO_V6 776 1 Z
+bit 776 C 1 *
+bit 775 I 1 IO_V5
+bit 774 O 1 IO_V5 773 1 Z
+bit 773 C 1 *
+bit 772 I 1 IO_V4
+bit 771 O 1 IO_V4 770 1 Z
+bit 770 C 1 *
+bit 769 I 1 IO_V2
+bit 768 O 1 IO_V2 767 1 Z
+bit 767 C 1 *
+bit 766 I 1 IO_V1
+bit 765 O 1 IO_V1 764 1 Z
+bit 764 C 1 *
+bit 763 I 1 IO_U10
+bit 762 O 1 IO_U10 761 1 Z
+bit 761 C 1 *
+bit 760 I 1 IO_U9
+bit 759 O 1 IO_U9 758 1 Z
+bit 758 C 1 *
+bit 757 I 1 IO_U7
+bit 756 O 1 IO_U7 755 1 Z
+bit 755 C 1 *
+bit 754 I 1 IO_U6
+bit 753 O 1 IO_U6 752 1 Z
+bit 752 C 1 *
+bit 751 O 1 *
+bit 750 O 1 *
+bit 749 O 1 *
+bit 748 O 1 *
+bit 747 O 1 *
+bit 746 O 1 *
+bit 745 I 1 IO_T10
+bit 744 O 1 IO_T10 743 1 Z
+bit 743 C 1 *
+bit 742 I 1 IO_T9
+bit 741 O 1 IO_T9 740 1 Z
+bit 740 C 1 *
+bit 739 I 1 IO_T6
+bit 738 O 1 IO_T6 737 1 Z
+bit 737 C 1 *
+bit 736 I 1 IO_T5
+bit 735 O 1 IO_T5 734 1 Z
+bit 734 C 1 *
+bit 733 I 1 IO_T4
+bit 732 O 1 IO_T4 731 1 Z
+bit 731 C 1 *
+bit 730 I 1 IO_T3
+bit 729 O 1 IO_T3 728 1 Z
+bit 728 C 1 *
+bit 727 I 1 IO_T2
+bit 726 O 1 IO_T2 725 1 Z
+bit 725 C 1 *
+bit 724 I 1 IO_T1
+bit 723 O 1 IO_T1 722 1 Z
+bit 722 C 1 *
+bit 721 I 1 IO_R1
+bit 720 O 1 IO_R1 719 1 Z
+bit 719 C 1 *
+bit 718 I 1 IO_R2
+bit 717 O 1 IO_R2 716 1 Z
+bit 716 C 1 *
+bit 715 I 1 IO_R3
+bit 714 O 1 IO_R3 713 1 Z
+bit 713 C 1 *
+bit 712 I 1 IO_R4
+bit 711 O 1 IO_R4 710 1 Z
+bit 710 C 1 *
+bit 709 I 1 IO_R5
+bit 708 O 1 IO_R5 707 1 Z
+bit 707 C 1 *
+bit 706 I 1 IO_R6
+bit 705 O 1 IO_R6 704 1 Z
+bit 704 C 1 *
+bit 703 I 1 IO_R7
+bit 702 O 1 IO_R7 701 1 Z
+bit 701 C 1 *
+bit 700 I 1 IO_R8
+bit 699 O 1 IO_R8 698 1 Z
+bit 698 C 1 *
+bit 697 O 1 *
+bit 696 O 1 *
+bit 695 O 1 *
+bit 694 O 1 *
+bit 693 O 1 *
+bit 692 O 1 *
+bit 691 I 1 IO_R9
+bit 690 O 1 IO_R9 689 1 Z
+bit 689 C 1 *
+bit 688 I 1 IO_R10
+bit 687 O 1 IO_R10 686 1 Z
+bit 686 C 1 *
+bit 685 I 1 IO_P2
+bit 684 O 1 IO_P2 683 1 Z
+bit 683 C 1 *
+bit 682 I 1 IO_P3
+bit 681 O 1 IO_P3 680 1 Z
+bit 680 C 1 *
+bit 679 I 1 IO_P6
+bit 678 O 1 IO_P6 677 1 Z
+bit 677 C 1 *
+bit 676 I 1 IO_P7
+bit 675 O 1 IO_P7 674 1 Z
+bit 674 C 1 *
+bit 673 I 1 IO_P9
+bit 672 O 1 IO_P9 671 1 Z
+bit 671 C 1 *
+bit 670 I 1 IO_P10
+bit 669 O 1 IO_P10 668 1 Z
+bit 668 C 1 *
+bit 667 I 1 IO_N1
+bit 666 O 1 IO_N1 665 1 Z
+bit 665 C 1 *
+bit 664 I 1 IO_N2
+bit 663 O 1 IO_N2 662 1 Z
+bit 662 C 1 *
+bit 661 O 1 *
+bit 660 O 1 *
+bit 659 O 1 *
+bit 658 O 1 *
+bit 657 O 1 *
+bit 656 O 1 *
+bit 655 I 1 IO_N8
+bit 654 O 1 IO_N8 653 1 Z
+bit 653 C 1 *
+bit 652 I 1 IO_N9
+bit 651 O 1 IO_N9 650 1 Z
+bit 650 C 1 *
+bit 649 I 1 IO_N10
+bit 648 O 1 IO_N10 647 1 Z
+bit 647 C 1 *
+bit 646 I 1 IO_M10
+bit 645 O 1 IO_M10 644 1 Z
+bit 644 C 1 *
+bit 643 I 1 IO_M1
+bit 642 O 1 IO_M1 641 1 Z
+bit 641 C 1 *
+bit 640 I 1 IO_M2
+bit 639 O 1 IO_M2 638 1 Z
+bit 638 C 1 *
+bit 637 I 1 IO_M3
+bit 636 O 1 IO_M3 635 1 Z
+bit 635 C 1 *
+bit 634 I 1 IO_M4
+bit 633 O 1 IO_M4 632 1 Z
+bit 632 C 1 *
+bit 631 O 1 *
+bit 630 O 1 *
+bit 629 O 1 *
+bit 628 O 1 *
+bit 627 O 1 *
+bit 626 O 1 *
+bit 625 I 1 IO_L1
+bit 624 O 1 IO_L1 623 1 Z
+bit 623 C 1 *
+bit 622 I 1 IO_L2
+bit 621 O 1 IO_L2 620 1 Z
+bit 620 C 1 *
+bit 619 I 1 IO_L3
+bit 618 O 1 IO_L3 617 1 Z
+bit 617 C 1 *
+bit 616 I 1 IO_L4
+bit 615 O 1 IO_L4 614 1 Z
+bit 614 C 1 *
+bit 613 I 1 IO_L5
+bit 612 O 1 IO_L5 611 1 Z
+bit 611 C 1 *
+bit 610 I 1 IO_L6
+bit 609 O 1 IO_L6 608 1 Z
+bit 608 C 1 *
+bit 607 I 1 IO_L7
+bit 606 O 1 IO_L7 605 1 Z
+bit 605 C 1 *
+bit 604 I 1 IO_L8
+bit 603 O 1 IO_L8 602 1 Z
+bit 602 C 1 *
+bit 601 I 1 IO_L10
+bit 600 O 1 IO_L10 599 1 Z
+bit 599 C 1 *
+bit 598 I 1 IO_K10
+bit 597 O 1 IO_K10 596 1 Z
+bit 596 C 1 *
+bit 595 I 1 IO_K2
+bit 594 O 1 IO_K2 593 1 Z
+bit 593 C 1 *
+bit 592 I 1 IO_K3
+bit 591 O 1 IO_K3 590 1 Z
+bit 590 C 1 *
+bit 589 O 1 *
+bit 588 O 1 *
+bit 587 O 1 *
+bit 586 O 1 *
+bit 585 O 1 *
+bit 584 O 1 *
+bit 583 I 1 IO_K6
+bit 582 O 1 IO_K6 581 1 Z
+bit 581 C 1 *
+bit 580 I 1 IO_K7
+bit 579 O 1 IO_K7 578 1 Z
+bit 578 C 1 *
+bit 577 I 1 IO_K9
+bit 576 O 1 IO_K9 575 1 Z
+bit 575 C 1 *
+bit 574 I 1 IO_J8
+bit 573 O 1 IO_J8 572 1 Z
+bit 572 C 1 *
+bit 571 I 1 IO_J1
+bit 570 O 1 IO_J1 569 1 Z
+bit 569 C 1 *
+bit 568 I 1 IO_J2
+bit 567 O 1 IO_J2 566 1 Z
+bit 566 C 1 *
+bit 565 I 1 IO_J4
+bit 564 O 1 IO_J4 563 1 Z
+bit 563 C 1 *
+bit 562 I 1 IO_J5
+bit 561 O 1 IO_J5 560 1 Z
+bit 560 C 1 *
+bit 559 I 1 IO_H1
+bit 558 O 1 IO_H1 557 1 Z
+bit 557 C 1 *
+bit 556 I 1 IO_H2
+bit 555 O 1 IO_H2 554 1 Z
+bit 554 C 1 *
+bit 553 I 1 IO_J6
+bit 552 O 1 IO_J6 551 1 Z
+bit 551 C 1 *
+bit 550 O 1 *
+bit 549 O 1 *
+bit 548 O 1 *
+bit 547 I 1 IO_H3
+bit 546 O 1 IO_H3 545 1 Z
+bit 545 C 1 *
+bit 544 I 1 IO_H4
+bit 543 O 1 IO_H4 542 1 Z
+bit 542 C 1 *
+bit 541 I 1 IO_H5
+bit 540 O 1 IO_H5 539 1 Z
+bit 539 C 1 *
+bit 538 I 1 IO_H6
+bit 537 O 1 IO_H6 536 1 Z
+bit 536 C 1 *
+bit 535 I 1 IO_H7
+bit 534 O 1 IO_H7 533 1 Z
+bit 533 C 1 *
+bit 532 I 1 IO_G6
+bit 531 O 1 IO_G6 530 1 Z
+bit 530 C 1 *
+bit 529 I 1 IO_G1
+bit 528 O 1 IO_G1 527 1 Z
+bit 527 C 1 *
+bit 526 I 1 IO_G2
+bit 525 O 1 IO_G2 524 1 Z
+bit 524 C 1 *
+bit 523 I 1 IO_G3
+bit 522 O 1 IO_G3 521 1 Z
+bit 521 C 1 *
+bit 520 I 1 IO_G4
+bit 519 O 1 IO_G4 518 1 Z
+bit 518 C 1 *
+bit 517 I 1 IO_F2
+bit 516 O 1 IO_F2 515 1 Z
+bit 515 C 1 *
+bit 514 I 1 IO_F3
+bit 513 O 1 IO_F3 512 1 Z
+bit 512 C 1 *
+bit 511 I 1 IO_F5
+bit 510 O 1 IO_F5 509 1 Z
+bit 509 C 1 *
+bit 508 I 1 IO_E4
+bit 507 O 1 IO_E4 506 1 Z
+bit 506 C 1 *
+bit 505 I 1 IO_E1
+bit 504 O 1 IO_E1 503 1 Z
+bit 503 C 1 *
+bit 502 I 1 IO_E2
+bit 501 O 1 IO_E2 500 1 Z
+bit 500 C 1 *
+bit 499 I 1 IO_D1
+bit 498 O 1 IO_D1 497 1 Z
+bit 497 C 1 *
+bit 496 I 1 IO_D2
+bit 495 O 1 IO_D2 494 1 Z
+bit 494 C 1 *
+bit 493 I 1 IO_D3
+bit 492 O 1 IO_D3 491 1 Z
+bit 491 C 1 *
+bit 490 I 1 IO_D4
+bit 489 O 1 IO_D4 488 1 Z
+bit 488 C 1 *
+bit 487 I 1 IO_C1
+bit 486 O 1 IO_C1 485 1 Z
+bit 485 C 1 *
+bit 484 I 1 IO_C2
+bit 483 O 1 IO_C2 482 1 Z
+bit 482 C 1 *
+bit 481 O 1 *
+bit 480 I 1 HSWAP_EN_A3
+bit 479 I 1 IO_C4
+bit 478 O 1 IO_C4 477 1 Z
+bit 477 C 1 *
+bit 476 I 1 IO_B4
+bit 475 O 1 IO_B4 474 1 Z
+bit 474 C 1 *
+bit 473 I 1 IO_A4
+bit 472 O 1 IO_A4 471 1 Z
+bit 471 C 1 *
+bit 470 I 1 IO_B5
+bit 469 O 1 IO_B5 468 1 Z
+bit 468 C 1 *
+bit 467 I 1 IO_A5
+bit 466 O 1 IO_A5 465 1 Z
+bit 465 C 1 *
+bit 464 O 1 *
+bit 463 O 1 *
+bit 462 O 1 *
+bit 461 I 1 IO_D5
+bit 460 O 1 IO_D5 459 1 Z
+bit 459 C 1 *
+bit 458 I 1 IO_E6
+bit 457 O 1 IO_E6 456 1 Z
+bit 456 C 1 *
+bit 455 I 1 IO_C6
+bit 454 O 1 IO_C6 453 1 Z
+bit 453 C 1 *
+bit 452 I 1 IO_B6
+bit 451 O 1 IO_B6 450 1 Z
+bit 450 C 1 *
+bit 449 O 1 *
+bit 448 O 1 *
+bit 447 O 1 *
+bit 446 I 1 IO_F6
+bit 445 O 1 IO_F6 444 1 Z
+bit 444 C 1 *
+bit 443 I 1 IO_F7
+bit 442 O 1 IO_F7 441 1 Z
+bit 441 C 1 *
+bit 440 I 1 IO_D7
+bit 439 O 1 IO_D7 438 1 Z
+bit 438 C 1 *
+bit 437 I 1 IO_C7
+bit 436 O 1 IO_C7 435 1 Z
+bit 435 C 1 *
+bit 434 I 1 IO_G8
+bit 433 O 1 IO_G8 432 1 Z
+bit 432 C 1 *
+bit 431 I 1 IO_F8
+bit 430 O 1 IO_F8 429 1 Z
+bit 429 C 1 *
+bit 428 I 1 IO_E8
+bit 427 O 1 IO_E8 426 1 Z
+bit 426 C 1 *
+bit 425 I 1 IO_D8
+bit 424 O 1 IO_D8 423 1 Z
+bit 423 C 1 *
+bit 422 I 1 IO_C8
+bit 421 O 1 IO_C8 420 1 Z
+bit 420 C 1 *
+bit 419 O 1 *
+bit 418 O 1 *
+bit 417 O 1 *
+bit 416 I 1 IO_B8
+bit 415 O 1 IO_B8 414 1 Z
+bit 414 C 1 *
+bit 413 I 1 IO_A8
+bit 412 O 1 IO_A8 411 1 Z
+bit 411 C 1 *
+bit 410 I 1 IO_J9
+bit 409 O 1 IO_J9 408 1 Z
+bit 408 C 1 *
+bit 407 I 1 IO_H9
+bit 406 O 1 IO_H9 405 1 Z
+bit 405 C 1 *
+bit 404 I 1 IO_F9
+bit 403 O 1 IO_F9 402 1 Z
+bit 402 C 1 *
+bit 401 I 1 IO_G10
+bit 400 O 1 IO_G10 399 1 Z
+bit 399 C 1 *
+bit 398 I 1 IO_F10
+bit 397 O 1 IO_F10 396 1 Z
+bit 396 C 1 *
+bit 395 I 1 IO_C10
+bit 394 O 1 IO_C10 393 1 Z
+bit 393 C 1 *
+bit 392 I 1 IO_B10
+bit 391 O 1 IO_B10 390 1 Z
+bit 390 C 1 *
+bit 389 O 1 *
+bit 388 O 1 *
+bit 387 O 1 *
+bit 386 I 1 IO_J10
+bit 385 O 1 IO_J10 384 1 Z
+bit 384 C 1 *
+bit 383 I 1 IO_K11
+bit 382 O 1 IO_K11 381 1 Z
+bit 381 C 1 *
+bit 380 I 1 IO_H11
+bit 379 O 1 IO_H11 378 1 Z
+bit 378 C 1 *
+bit 377 I 1 IO_G11
+bit 376 O 1 IO_G11 375 1 Z
+bit 375 C 1 *
+bit 374 O 1 *
+bit 373 O 1 *
+bit 372 O 1 *
+bit 371 I 1 IO_F11
+bit 370 O 1 IO_F11 369 1 Z
+bit 369 C 1 *
+bit 368 I 1 IO_E11
+bit 367 O 1 IO_E11 366 1 Z
+bit 366 C 1 *
+bit 365 I 1 IO_D11
+bit 364 O 1 IO_D11 363 1 Z
+bit 363 C 1 *
+bit 362 I 1 IO_C11
+bit 361 O 1 IO_C11 360 1 Z
+bit 360 C 1 *
+bit 359 O 1 *
+bit 358 O 1 *
+bit 357 O 1 *
+bit 356 I 1 IO_B11
+bit 355 O 1 IO_B11 354 1 Z
+bit 354 C 1 *
+bit 353 I 1 IO_A11
+bit 352 O 1 IO_A11 351 1 Z
+bit 351 C 1 *
+bit 350 I 1 IO_K12
+bit 349 O 1 IO_K12 348 1 Z
+bit 348 C 1 *
+bit 347 I 1 IO_J12
+bit 346 O 1 IO_J12 345 1 Z
+bit 345 C 1 *
+bit 344 O 1 *
+bit 343 O 1 *
+bit 342 O 1 *
+bit 341 I 1 IO_H12
+bit 340 O 1 IO_H12 339 1 Z
+bit 339 C 1 *
+bit 338 I 1 IO_G12
+bit 337 O 1 IO_G12 336 1 Z
+bit 336 C 1 *
+bit 335 I 1 IO_F12
+bit 334 O 1 IO_F12 333 1 Z
+bit 333 C 1 *
+bit 332 I 1 IO_E12
+bit 331 O 1 IO_E12 330 1 Z
+bit 330 C 1 *
+bit 329 O 1 *
+bit 328 O 1 *
+bit 327 O 1 *
+bit 326 I 1 IO_D12
+bit 325 O 1 IO_D12 324 1 Z
+bit 324 C 1 *
+bit 323 I 1 IO_C12
+bit 322 O 1 IO_C12 321 1 Z
+bit 321 C 1 *
+bit 320 I 1 IO_B12
+bit 319 O 1 IO_B12 318 1 Z
+bit 318 C 1 *
+bit 317 I 1 IO_A12
+bit 316 O 1 IO_A12 315 1 Z
+bit 315 C 1 *
+bit 314 I 1 IO_K13
+bit 313 O 1 IO_K13 312 1 Z
+bit 312 C 1 *
+bit 311 I 1 IO_J13
+bit 310 O 1 IO_J13 309 1 Z
+bit 309 C 1 *
+bit 308 I 1 IO_H13
+bit 307 O 1 IO_H13 306 1 Z
+bit 306 C 1 *
+bit 305 I 1 IO_F13
+bit 304 O 1 IO_F13 303 1 Z
+bit 303 C 1 *
+bit 302 I 1 IO_E13
+bit 301 O 1 IO_E13 300 1 Z
+bit 300 C 1 *
+bit 299 I 1 IO_D13
+bit 298 O 1 IO_D13 297 1 Z
+bit 297 C 1 *
+bit 296 I 1 IO_B13
+bit 295 O 1 IO_B13 294 1 Z
+bit 294 C 1 *
+bit 293 I 1 IO_A13
+bit 292 O 1 IO_A13 291 1 Z
+bit 291 C 1 *
+bit 290 I 1 IO_K14
+bit 289 O 1 IO_K14 288 1 Z
+bit 288 C 1 *
+bit 287 I 1 IO_J14
+bit 286 O 1 IO_J14 285 1 Z
+bit 285 C 1 *
+bit 284 I 1 IO_K15
+bit 283 O 1 IO_K15 282 1 Z
+bit 282 C 1 *
+bit 281 I 1 IO_G14
+bit 280 O 1 IO_G14 279 1 Z
+bit 279 C 1 *
+bit 278 I 1 IO_F14
+bit 277 O 1 IO_F14 276 1 Z
+bit 276 C 1 *
+bit 275 I 1 IO_C14
+bit 274 O 1 IO_C14 273 1 Z
+bit 273 C 1 *
+bit 272 I 1 IO_B14
+bit 271 O 1 IO_B14 270 1 Z
+bit 270 C 1 *
+bit 269 O 1 *
+bit 268 O 1 *
+bit 267 O 1 *
+bit 266 I 1 IO_J15
+bit 265 O 1 IO_J15 264 1 Z
+bit 264 C 1 *
+bit 263 I 1 IO_H15
+bit 262 O 1 IO_H15 261 1 Z
+bit 261 C 1 *
+bit 260 I 1 IO_G15
+bit 259 O 1 IO_G15 258 1 Z
+bit 258 C 1 *
+bit 257 I 1 IO_F15
+bit 256 O 1 IO_F15 255 1 Z
+bit 255 C 1 *
+bit 254 I 1 IO_E15
+bit 253 O 1 IO_E15 252 1 Z
+bit 252 C 1 *
+bit 251 I 1 IO_D15
+bit 250 O 1 IO_D15 249 1 Z
+bit 249 C 1 *
+bit 248 I 1 IO_C15
+bit 247 O 1 IO_C15 246 1 Z
+bit 246 C 1 *
+bit 245 I 1 IO_B15
+bit 244 O 1 IO_B15 243 1 Z
+bit 243 C 1 *
+bit 242 I 1 IO_A15
+bit 241 O 1 IO_A15 240 1 Z
+bit 240 C 1 *
+bit 239 I 1 IO_A16
+bit 238 O 1 IO_A16 237 1 Z
+bit 237 C 1 *
+bit 236 I 1 IO_B16
+bit 235 O 1 IO_B16 234 1 Z
+bit 234 C 1 *
+bit 233 I 1 IO_C16
+bit 232 O 1 IO_C16 231 1 Z
+bit 231 C 1 *
+bit 230 I 1 IO_D16
+bit 229 O 1 IO_D16 228 1 Z
+bit 228 C 1 *
+bit 227 I 1 IO_E16
+bit 226 O 1 IO_E16 225 1 Z
+bit 225 C 1 *
+bit 224 I 1 IO_F16
+bit 223 O 1 IO_F16 222 1 Z
+bit 222 C 1 *
+bit 221 I 1 IO_G16
+bit 220 O 1 IO_G16 219 1 Z
+bit 219 C 1 *
+bit 218 I 1 IO_H16
+bit 217 O 1 IO_H16 216 1 Z
+bit 216 C 1 *
+bit 215 I 1 IO_J16
+bit 214 O 1 IO_J16 213 1 Z
+bit 213 C 1 *
+bit 212 I 1 IO_K16
+bit 211 O 1 IO_K16 210 1 Z
+bit 210 C 1 *
+bit 209 I 1 IO_J17
+bit 208 O 1 IO_J17 207 1 Z
+bit 207 C 1 *
+bit 206 I 1 IO_B17
+bit 205 O 1 IO_B17 204 1 Z
+bit 204 C 1 *
+bit 203 I 1 IO_C17
+bit 202 O 1 IO_C17 201 1 Z
+bit 201 C 1 *
+bit 200 I 1 IO_F17
+bit 199 O 1 IO_F17 198 1 Z
+bit 198 C 1 *
+bit 197 I 1 IO_G17
+bit 196 O 1 IO_G17 195 1 Z
+bit 195 C 1 *
+bit 194 I 1 IO_F18
+bit 193 O 1 IO_F18 192 1 Z
+bit 192 C 1 *
+bit 191 I 1 IO_A19
+bit 190 O 1 IO_A19 189 1 Z
+bit 189 C 1 *
+bit 188 I 1 IO_B19
+bit 187 O 1 IO_B19 186 1 Z
+bit 186 C 1 *
+bit 185 I 1 IO_C19
+bit 184 O 1 IO_C19 183 1 Z
+bit 183 C 1 *
+bit 182 I 1 IO_D19
+bit 181 O 1 IO_D19 180 1 Z
+bit 180 C 1 *
+bit 179 O 1 *
+bit 178 O 1 *
+bit 177 O 1 *
+bit 176 I 1 IO_E19
+bit 175 O 1 IO_E19 174 1 Z
+bit 174 C 1 *
+bit 173 I 1 IO_F19
+bit 172 O 1 IO_F19 171 1 Z
+bit 171 C 1 *
+bit 170 I 1 IO_G19
+bit 169 O 1 IO_G19 168 1 Z
+bit 168 C 1 *
+bit 167 I 1 IO_H19
+bit 166 O 1 IO_H19 165 1 Z
+bit 165 C 1 *
+bit 164 O 1 *
+bit 163 O 1 *
+bit 162 O 1 *
+bit 161 I 1 IO_J19
+bit 160 O 1 IO_J19 159 1 Z
+bit 159 C 1 *
+bit 158 I 1 IO_K19
+bit 157 O 1 IO_K19 156 1 Z
+bit 156 C 1 *
+bit 155 I 1 IO_A20
+bit 154 O 1 IO_A20 153 1 Z
+bit 153 C 1 *
+bit 152 I 1 IO_B20
+bit 151 O 1 IO_B20 150 1 Z
+bit 150 C 1 *
+bit 149 O 1 *
+bit 148 O 1 *
+bit 147 O 1 *
+bit 146 I 1 IO_C20
+bit 145 O 1 IO_C20 144 1 Z
+bit 144 C 1 *
+bit 143 I 1 IO_D20
+bit 142 O 1 IO_D20 141 1 Z
+bit 141 C 1 *
+bit 140 I 1 IO_E20
+bit 139 O 1 IO_E20 138 1 Z
+bit 138 C 1 *
+bit 137 I 1 IO_F20
+bit 136 O 1 IO_F20 135 1 Z
+bit 135 C 1 *
+bit 134 O 1 *
+bit 133 O 1 *
+bit 132 O 1 *
+bit 131 I 1 IO_G20
+bit 130 O 1 IO_G20 129 1 Z
+bit 129 C 1 *
+bit 128 I 1 IO_H20
+bit 127 O 1 IO_H20 126 1 Z
+bit 126 C 1 *
+bit 125 I 1 IO_B21
+bit 124 O 1 IO_B21 123 1 Z
+bit 123 C 1 *
+bit 122 I 1 IO_C21
+bit 121 O 1 IO_C21 120 1 Z
+bit 120 C 1 *
+bit 119 I 1 IO_K20
+bit 118 O 1 IO_K20 117 1 Z
+bit 117 C 1 *
+bit 116 I 1 IO_F21
+bit 115 O 1 IO_F21 114 1 Z
+bit 114 C 1 *
+bit 113 I 1 IO_G21
+bit 112 O 1 IO_G21 111 1 Z
+bit 111 C 1 *
+bit 110 I 1 IO_A22
+bit 109 O 1 IO_A22 108 1 Z
+bit 108 C 1 *
+bit 107 I 1 IO_B22
+bit 106 O 1 IO_B22 105 1 Z
+bit 105 C 1 *
+bit 104 I 1 IO_J21
+bit 103 O 1 IO_J21 102 1 Z
+bit 102 C 1 *
+bit 101 I 1 IO_D22
+bit 100 O 1 IO_D22 99 1 Z
+bit 99 C 1 *
+bit 98 I 1 IO_E22
+bit 97 O 1 IO_E22 96 1 Z
+bit 96 C 1 *
+bit 95 I 1 IO_F22
+bit 94 O 1 IO_F22 93 1 Z
+bit 93 C 1 *
+bit 92 I 1 IO_E23
+bit 91 O 1 IO_E23 90 1 Z
+bit 90 C 1 *
+bit 89 O 1 *
+bit 88 O 1 *
+bit 87 O 1 *
+bit 86 I 1 IO_H22
+bit 85 O 1 IO_H22 84 1 Z
+bit 84 C 1 *
+bit 83 I 1 IO_J22
+bit 82 O 1 IO_J22 81 1 Z
+bit 81 C 1 *
+bit 80 I 1 IO_A23
+bit 79 O 1 IO_A23 78 1 Z
+bit 78 C 1 *
+bit 77 I 1 IO_B23
+bit 76 O 1 IO_B23 75 1 Z
+bit 75 C 1 *
+bit 74 O 1 *
+bit 73 O 1 *
+bit 72 O 1 *
+bit 71 I 1 IO_C23
+bit 70 O 1 IO_C23 69 1 Z
+bit 69 C 1 *
+bit 68 I 1 IO_D23
+bit 67 O 1 IO_D23 66 1 Z
+bit 66 C 1 *
+bit 65 I 1 IO_F23
+bit 64 O 1 IO_F23 63 1 Z
+bit 63 C 1 *
+bit 62 I 1 IO_G23
+bit 61 O 1 IO_G23 60 1 Z
+bit 60 C 1 *
+bit 59 O 1 *
+bit 58 O 1 *
+bit 57 O 1 *
+bit 56 I 1 IO_H23
+bit 55 O 1 IO_H23 54 1 Z
+bit 54 C 1 *
+bit 53 I 1 IO_G24
+bit 52 O 1 IO_G24 51 1 Z
+bit 51 C 1 *
+bit 50 I 1 IO_A24
+bit 49 O 1 IO_A24 48 1 Z
+bit 48 C 1 *
+bit 47 I 1 IO_B24
+bit 46 O 1 IO_B24 45 1 Z
+bit 45 C 1 *
+bit 44 O 1 *
+bit 43 O 1 *
+bit 42 O 1 *
+bit 41 I 1 IO_C24
+bit 40 O 1 IO_C24 39 1 Z
+bit 39 C 1 *
+bit 38 I 1 IO_D24
+bit 37 O 1 IO_D24 36 1 Z
+bit 36 C 1 *
+bit 35 I 1 IO_F24
+bit 34 O 1 IO_F24 33 1 Z
+bit 33 C 1 *
+bit 32 I 1 IO_F25
+bit 31 O 1 IO_F25 30 1 Z
+bit 30 C 1 *
+bit 29 I 1 IO_E25
+bit 28 O 1 IO_E25 27 1 Z
+bit 27 C 1 *
+bit 26 I 1 IO_B25
+bit 25 O 1 IO_B25 24 1 Z
+bit 24 C 1 *
+bit 23 I 1 IO_C25
+bit 22 O 1 IO_C25 21 1 Z
+bit 21 C 1 *
+bit 20 I 1 IO_A26
+bit 19 O 1 IO_A26 18 1 Z
+bit 18 C 1 *
+bit 17 I 1 IO_B26
+bit 16 O 1 IO_B26 15 1 Z
+bit 15 C 1 *
+bit 14 O 1 *
+bit 13 O 1 *
+bit 12 O 1 *
+bit 11 I 1 IO_D26
+bit 10 O 1 IO_D26 9 1 Z
+bit 9 C 1 *
+bit 8 I 1 IO_C27
+bit 7 O 1 IO_C27 6 1 Z
+bit 6 C 1 *
+bit 5 I 1 IO_A27
+bit 4 O 1 IO_A27 3 1 Z
+bit 3 C 1 *
+bit 2 I 1 IO_B27
+bit 1 O 1 IO_B27 0 1 Z
+bit 0 C 1 *
--- /dev/null
+0000 xc3s400 0
--- /dev/null
+signal GND1
+signal GND2
+signal GND3
+signal GND4
+signal GND5
+signal GND6
+signal GND7
+signal GND8
+signal GND9
+signal GND10
+signal GND11
+signal GND12
+signal GND13
+signal GND14
+signal GND15
+signal GND16
+signal GND17
+signal GND18
+signal GND19
+signal GND20
+signal GND21
+signal GND22
+signal GND23
+signal GND24
+signal GND25
+signal GND26
+signal GND27
+signal GND28
+signal GND29
+signal GND30
+signal GND31
+signal GND32
+signal GND33
+signal GND34
+signal GND35
+signal GND36
+signal GND37
+signal GND38
+signal GND39
+signal GND40
+signal GND41
+signal GND42
+signal GND43
+signal GND44
+signal GND45
+signal GND46
+signal GND47
+signal GND48
+signal GND49
+signal GND50
+signal GND51
+signal GND52
+signal GND53
+signal GND54
+signal GND55
+signal GND56
+signal CCLK_PAD275
+signal DONE_PAD274
+signal HSWAP_EN_PAD56
+signal M0_PAD165
+signal M1_PAD164
+signal M2_PAD166
+signal PROG_B
+signal TCK
+signal TDI
+signal TDO
+signal TMS
+signal VCCAUX1
+signal VCCAUX2
+signal VCCAUX3
+signal VCCAUX4
+signal VCCAUX5
+signal VCCAUX6
+signal VCCAUX7
+signal VCCAUX8
+signal VCCAUX9
+signal VCCAUX10
+signal VCCAUX11
+signal VCCAUX12
+signal VCCAUX13
+signal VCCAUX14
+signal VCCAUX15
+signal VCCAUX16
+signal VCCINT1
+signal VCCINT2
+signal VCCINT3
+signal VCCINT4
+signal VCCINT5
+signal VCCINT6
+signal VCCINT7
+signal VCCINT8
+signal VCCINT9
+signal VCCINT10
+signal VCCINT11
+signal VCCINT12
+signal VCCINT13
+signal VCCINT14
+signal VCCINT15
+signal VCCINT16
+signal VCCO01
+signal VCCO02
+signal VCCO03
+signal VCCO04
+signal VCCO05
+signal VCCO06
+signal VCCO11
+signal VCCO12
+signal VCCO13
+signal VCCO14
+signal VCCO15
+signal VCCO16
+signal VCCO21
+signal VCCO22
+signal VCCO23
+signal VCCO24
+signal VCCO25
+signal VCCO26
+signal VCCO31
+signal VCCO32
+signal VCCO33
+signal VCCO34
+signal VCCO35
+signal VCCO36
+signal VCCO41
+signal VCCO42
+signal VCCO43
+signal VCCO44
+signal VCCO45
+signal VCCO46
+signal VCCO51
+signal VCCO52
+signal VCCO53
+signal VCCO54
+signal VCCO55
+signal VCCO56
+signal VCCO61
+signal VCCO62
+signal VCCO63
+signal VCCO64
+signal VCCO65
+signal VCCO66
+signal VCCO71
+signal VCCO72
+signal VCCO73
+signal VCCO74
+signal VCCO75
+signal VCCO76
+signal IO_PAD2
+signal IO_PAD3
+signal IO_PAD4
+signal IO_PAD6
+signal IO_PAD8
+signal IO_PAD9
+signal IO_PAD10
+signal IO_PAD12
+signal IO_PAD13
+signal IO_PAD14
+signal IO_PAD16
+signal IO_PAD18
+signal IO_PAD20
+signal IO_PAD22
+signal IO_PAD23
+signal IO_PAD24
+signal IO_PAD26
+signal IO_PAD28
+signal IO_PAD29
+signal IO_PAD30
+signal IO_PAD31
+signal IO_PAD32
+signal IO_PAD33
+signal IO_PAD34
+signal IO_PAD35
+signal IO_PAD36
+signal IO_PAD38
+signal IO_PAD40
+signal IO_PAD42
+signal IO_PAD44
+signal IO_PAD48
+signal IO_PAD49
+signal IO_PAD53
+signal IO_PAD54
+signal IO_PAD55
+signal IO_PAD62
+signal IO_PAD63
+signal IO_PAD65
+signal IO_PAD66
+signal IO_PAD67
+signal IO_PAD69
+signal IO_PAD70
+signal IO_PAD71
+signal IO_PAD73
+signal IO_PAD75
+signal IO_PAD76
+signal IO_PAD77
+signal IO_PAD78
+signal IO_PAD79
+signal IO_PAD81
+signal IO_PAD83
+signal IO_PAD85
+signal IO_PAD87
+signal IO_PAD88
+signal IO_PAD89
+signal IO_PAD91
+signal IO_PAD92
+signal IO_PAD93
+signal IO_PAD95
+signal IO_PAD97
+signal IO_PAD99
+signal IO_PAD101
+signal IO_PAD102
+signal IO_PAD103
+signal IO_PAD105
+signal IO_PAD107
+signal IO_PAD108
+signal IO_PAD114
+signal IO_PAD115
+signal IO_PAD117
+signal IO_PAD119
+signal IO_PAD120
+signal IO_PAD121
+signal IO_PAD123
+signal IO_PAD125
+signal IO_PAD127
+signal IO_PAD129
+signal IO_PAD130
+signal IO_PAD131
+signal IO_PAD133
+signal IO_PAD134
+signal IO_PAD135
+signal IO_PAD137
+signal IO_PAD139
+signal IO_PAD141
+signal IO_PAD143
+signal IO_PAD144
+signal IO_PAD145
+signal IO_PAD146
+signal IO_PAD147
+signal IO_PAD149
+signal IO_PAD151
+signal IO_PAD152
+signal IO_PAD153
+signal IO_PAD155
+signal IO_PAD156
+signal IO_PAD157
+signal IO_PAD159
+signal IO_PAD160
+signal IO_PAD167
+signal IO_PAD168
+signal IO_PAD171
+signal IO_PAD172
+signal IO_PAD173
+signal IO_PAD176
+signal IO_PAD178
+signal IO_PAD180
+signal IO_PAD182
+signal IO_PAD184
+signal IO_PAD185
+signal IO_PAD186
+signal IO_PAD187
+signal IO_PAD188
+signal IO_PAD189
+signal IO_PAD190
+signal IO_PAD191
+signal IO_PAD192
+signal IO_PAD194
+signal IO_PAD196
+signal IO_PAD197
+signal IO_PAD198
+signal IO_PAD200
+signal IO_PAD202
+signal IO_PAD204
+signal IO_PAD206
+signal IO_PAD207
+signal IO_PAD208
+signal IO_PAD210
+signal IO_PAD211
+signal IO_PAD212
+signal IO_PAD214
+signal IO_PAD216
+signal IO_PAD217
+signal IO_PAD218
+signal IO_PAD222
+signal IO_PAD223
+signal IO_PAD224
+signal IO_PAD226
+signal IO_PAD228
+signal IO_PAD229
+signal IO_PAD230
+signal IO_PAD232
+signal IO_PAD233
+signal IO_PAD234
+signal IO_PAD236
+signal IO_PAD238
+signal IO_PAD240
+signal IO_PAD242
+signal IO_PAD243
+signal IO_PAD244
+signal IO_PAD246
+signal IO_PAD248
+signal IO_PAD249
+signal IO_PAD250
+signal IO_PAD251
+signal IO_PAD252
+signal IO_PAD253
+signal IO_PAD254
+signal IO_PAD255
+signal IO_PAD256
+signal IO_PAD258
+signal IO_PAD260
+signal IO_PAD262
+signal IO_PAD264
+signal IO_PAD267
+signal IO_PAD268
+signal IO_PAD271
+signal IO_PAD272
+signal IO_PAD273
+signal IO_PAD279
+signal IO_PAD280
+signal IO_PAD282
+signal IO_PAD283
+signal IO_PAD284
+signal IO_PAD286
+signal IO_PAD287
+signal IO_PAD288
+signal IO_PAD290
+signal IO_PAD292
+signal IO_PAD293
+signal IO_PAD294
+signal IO_PAD295
+signal IO_PAD296
+signal IO_PAD298
+signal IO_PAD300
+signal IO_PAD302
+signal IO_PAD304
+signal IO_PAD305
+signal IO_PAD306
+signal IO_PAD308
+signal IO_PAD309
+signal IO_PAD310
+signal IO_PAD312
+signal IO_PAD314
+signal IO_PAD316
+signal IO_PAD318
+signal IO_PAD319
+signal IO_PAD320
+signal IO_PAD322
+signal IO_PAD324
+signal IO_PAD325
+signal IO_PAD331
+signal IO_PAD332
+signal IO_PAD334
+signal IO_PAD336
+signal IO_PAD337
+signal IO_PAD338
+signal IO_PAD340
+signal IO_PAD342
+signal IO_PAD344
+signal IO_PAD346
+signal IO_PAD347
+signal IO_PAD348
+signal IO_PAD350
+signal IO_PAD351
+signal IO_PAD352
+signal IO_PAD354
+signal IO_PAD356
+signal IO_PAD358
+signal IO_PAD360
+signal IO_PAD361
+signal IO_PAD362
+signal IO_PAD363
+signal IO_PAD364
+signal IO_PAD366
+signal IO_PAD368
+signal IO_PAD369
+signal IO_PAD370
+signal IO_PAD372
+signal IO_PAD373
+signal IO_PAD374
+signal IO_PAD376
+signal IO_PAD377
+signal IO_PAD384
+signal IO_PAD385
+signal IO_PAD388
+signal IO_PAD389
+signal IO_PAD390
+signal IO_PAD394
+signal IO_PAD396
+signal IO_PAD398
+signal IO_PAD400
+signal IO_PAD402
+signal IO_PAD403
+signal IO_PAD404
+signal IO_PAD405
+signal IO_PAD406
+signal IO_PAD407
+signal IO_PAD408
+signal IO_PAD409
+signal IO_PAD410
+signal IO_PAD412
+signal IO_PAD414
+signal IO_PAD415
+signal IO_PAD416
+signal IO_PAD418
+signal IO_PAD420
+signal IO_PAD422
+signal IO_PAD424
+signal IO_PAD425
+signal IO_PAD426
+signal IO_PAD428
+signal IO_PAD429
+signal IO_PAD430
+signal IO_PAD432
+signal IO_PAD434
+signal IO_PAD435
+
+register BSR 815
+register BR 1
+register DIR 32
+
+instruction length 6
+
+instruction EXTEST 000000 BSR
+instruction SAMPLE/PRELOAD 000001 BSR
+instruction IDCODE 001001 DIR
+instruction BYPASS 111111 BR
+
+bit 814 I 1 IO_PAD377
+bit 813 O 1 IO_PAD377 812 1 Z
+bit 812 C 1 *
+bit 811 I 1 IO_PAD376
+bit 810 O 1 IO_PAD376 809 1 Z
+bit 809 C 1 *
+bit 808 I 1 IO_PAD374
+bit 807 O 1 IO_PAD374 806 1 Z
+bit 806 C 1 *
+bit 805 I 1 IO_PAD373
+bit 804 O 1 IO_PAD373 803 1 Z
+bit 803 C 1 *
+bit 802 I 1 IO_PAD372
+bit 801 O 1 IO_PAD372 800 1 Z
+bit 800 C 1 *
+bit 799 I 1 IO_PAD370
+bit 798 O 1 IO_PAD370 797 1 Z
+bit 797 C 1 *
+bit 796 I 1 IO_PAD369
+bit 795 O 1 IO_PAD369 794 1 Z
+bit 794 C 1 *
+bit 793 I 1 IO_PAD368
+bit 792 O 1 IO_PAD368 791 1 Z
+bit 791 C 1 *
+bit 790 I 1 IO_PAD366
+bit 789 O 1 IO_PAD366 788 1 Z
+bit 788 C 1 *
+bit 787 I 1 IO_PAD364
+bit 786 O 1 IO_PAD364 785 1 Z
+bit 785 C 1 *
+bit 784 I 1 IO_PAD363
+bit 783 O 1 IO_PAD363 782 1 Z
+bit 782 C 1 *
+bit 781 I 1 IO_PAD362
+bit 780 O 1 IO_PAD362 779 1 Z
+bit 779 C 1 *
+bit 778 I 1 IO_PAD361
+bit 777 O 1 IO_PAD361 776 1 Z
+bit 776 C 1 *
+bit 775 I 1 IO_PAD360
+bit 774 O 1 IO_PAD360 773 1 Z
+bit 773 C 1 *
+bit 772 I 1 IO_PAD358
+bit 771 O 1 IO_PAD358 770 1 Z
+bit 770 C 1 *
+bit 769 I 1 IO_PAD356
+bit 768 O 1 IO_PAD356 767 1 Z
+bit 767 C 1 *
+bit 766 I 1 IO_PAD354
+bit 765 O 1 IO_PAD354 764 1 Z
+bit 764 C 1 *
+bit 763 I 1 IO_PAD352
+bit 762 O 1 IO_PAD352 761 1 Z
+bit 761 C 1 *
+bit 760 I 1 IO_PAD351
+bit 759 O 1 IO_PAD351 758 1 Z
+bit 758 C 1 *
+bit 757 I 1 IO_PAD350
+bit 756 O 1 IO_PAD350 755 1 Z
+bit 755 C 1 *
+bit 754 I 1 IO_PAD348
+bit 753 O 1 IO_PAD348 752 1 Z
+bit 752 C 1 *
+bit 751 I 1 IO_PAD347
+bit 750 O 1 IO_PAD347 749 1 Z
+bit 749 C 1 *
+bit 748 I 1 IO_PAD346
+bit 747 O 1 IO_PAD346 746 1 Z
+bit 746 C 1 *
+bit 745 I 1 IO_PAD344
+bit 744 O 1 IO_PAD344 743 1 Z
+bit 743 C 1 *
+bit 742 I 1 IO_PAD342
+bit 741 O 1 IO_PAD342 740 1 Z
+bit 740 C 1 *
+bit 739 I 1 IO_PAD340
+bit 738 O 1 IO_PAD340 737 1 Z
+bit 737 C 1 *
+bit 736 I 1 IO_PAD338
+bit 735 O 1 IO_PAD338 734 1 Z
+bit 734 C 1 *
+bit 733 I 1 IO_PAD337
+bit 732 O 1 IO_PAD337 731 1 Z
+bit 731 C 1 *
+bit 730 I 1 IO_PAD336
+bit 729 O 1 IO_PAD336 728 1 Z
+bit 728 C 1 *
+bit 727 I 1 IO_PAD334
+bit 726 O 1 IO_PAD334 725 1 Z
+bit 725 C 1 *
+bit 724 I 1 IO_PAD332
+bit 723 O 1 IO_PAD332 722 1 Z
+bit 722 C 1 *
+bit 721 I 1 IO_PAD331
+bit 720 O 1 IO_PAD331 719 1 Z
+bit 719 C 1 *
+bit 718 I 1 IO_PAD325
+bit 717 O 1 IO_PAD325 716 1 Z
+bit 716 C 1 *
+bit 715 I 1 IO_PAD324
+bit 714 O 1 IO_PAD324 713 1 Z
+bit 713 C 1 *
+bit 712 I 1 IO_PAD322
+bit 711 O 1 IO_PAD322 710 1 Z
+bit 710 C 1 *
+bit 709 I 1 IO_PAD320
+bit 708 O 1 IO_PAD320 707 1 Z
+bit 707 C 1 *
+bit 706 I 1 IO_PAD319
+bit 705 O 1 IO_PAD319 704 1 Z
+bit 704 C 1 *
+bit 703 I 1 IO_PAD318
+bit 702 O 1 IO_PAD318 701 1 Z
+bit 701 C 1 *
+bit 700 I 1 IO_PAD316
+bit 699 O 1 IO_PAD316 698 1 Z
+bit 698 C 1 *
+bit 697 I 1 IO_PAD314
+bit 696 O 1 IO_PAD314 695 1 Z
+bit 695 C 1 *
+bit 694 I 1 IO_PAD312
+bit 693 O 1 IO_PAD312 692 1 Z
+bit 692 C 1 *
+bit 691 I 1 IO_PAD310
+bit 690 O 1 IO_PAD310 689 1 Z
+bit 689 C 1 *
+bit 688 I 1 IO_PAD309
+bit 687 O 1 IO_PAD309 686 1 Z
+bit 686 C 1 *
+bit 685 I 1 IO_PAD308
+bit 684 O 1 IO_PAD308 683 1 Z
+bit 683 C 1 *
+bit 682 I 1 IO_PAD306
+bit 681 O 1 IO_PAD306 680 1 Z
+bit 680 C 1 *
+bit 679 I 1 IO_PAD305
+bit 678 O 1 IO_PAD305 677 1 Z
+bit 677 C 1 *
+bit 676 I 1 IO_PAD304
+bit 675 O 1 IO_PAD304 674 1 Z
+bit 674 C 1 *
+bit 673 I 1 IO_PAD302
+bit 672 O 1 IO_PAD302 671 1 Z
+bit 671 C 1 *
+bit 670 I 1 IO_PAD300
+bit 669 O 1 IO_PAD300 668 1 Z
+bit 668 C 1 *
+bit 667 I 1 IO_PAD298
+bit 666 O 1 IO_PAD298 665 1 Z
+bit 665 C 1 *
+bit 664 I 1 IO_PAD296
+bit 663 O 1 IO_PAD296 662 1 Z
+bit 662 C 1 *
+bit 661 I 1 IO_PAD295
+bit 660 O 1 IO_PAD295 659 1 Z
+bit 659 C 1 *
+bit 658 I 1 IO_PAD294
+bit 657 O 1 IO_PAD294 656 1 Z
+bit 656 C 1 *
+bit 655 I 1 IO_PAD293
+bit 654 O 1 IO_PAD293 653 1 Z
+bit 653 C 1 *
+bit 652 I 1 IO_PAD292
+bit 651 O 1 IO_PAD292 650 1 Z
+bit 650 C 1 *
+bit 649 I 1 IO_PAD290
+bit 648 O 1 IO_PAD290 647 1 Z
+bit 647 C 1 *
+bit 646 I 1 IO_PAD288
+bit 645 O 1 IO_PAD288 644 1 Z
+bit 644 C 1 *
+bit 643 I 1 IO_PAD287
+bit 642 O 1 IO_PAD287 641 1 Z
+bit 641 C 1 *
+bit 640 I 1 IO_PAD286
+bit 639 O 1 IO_PAD286 638 1 Z
+bit 638 C 1 *
+bit 637 I 1 IO_PAD284
+bit 636 O 1 IO_PAD284 635 1 Z
+bit 635 C 1 *
+bit 634 I 1 IO_PAD283
+bit 633 O 1 IO_PAD283 632 1 Z
+bit 632 C 1 *
+bit 631 I 1 IO_PAD282
+bit 630 O 1 IO_PAD282 629 1 Z
+bit 629 C 1 *
+bit 628 I 1 IO_PAD280
+bit 627 O 1 IO_PAD280 626 1 Z
+bit 626 C 1 *
+bit 625 I 1 IO_PAD279
+bit 624 O 1 IO_PAD279 623 1 Z
+bit 623 C 1 *
+bit 622 I 1 CCLK_PAD275
+bit 621 O 1 CCLK_PAD275 620 1 Z
+bit 620 C 1 *
+bit 619 I 1 DONE_PAD274
+bit 618 O 1 DONE_PAD274 617 1 Z
+bit 617 C 1 *
+bit 616 I 1 IO_PAD273
+bit 615 O 1 IO_PAD273 614 1 Z
+bit 614 C 1 *
+bit 613 I 1 IO_PAD272
+bit 612 O 1 IO_PAD272 611 1 Z
+bit 611 C 1 *
+bit 610 I 1 IO_PAD271
+bit 609 O 1 IO_PAD271 608 1 Z
+bit 608 C 1 *
+bit 607 I 1 IO_PAD268
+bit 606 O 1 IO_PAD268 605 1 Z
+bit 605 C 1 *
+bit 604 I 1 IO_PAD267
+bit 603 O 1 IO_PAD267 602 1 Z
+bit 602 C 1 *
+bit 601 I 1 IO_PAD264
+bit 600 O 1 IO_PAD264 599 1 Z
+bit 599 C 1 *
+bit 598 I 1 IO_PAD262
+bit 597 O 1 IO_PAD262 596 1 Z
+bit 596 C 1 *
+bit 595 I 1 IO_PAD260
+bit 594 O 1 IO_PAD260 593 1 Z
+bit 593 C 1 *
+bit 592 I 1 IO_PAD258
+bit 591 O 1 IO_PAD258 590 1 Z
+bit 590 C 1 *
+bit 589 I 1 IO_PAD256
+bit 588 O 1 IO_PAD256 587 1 Z
+bit 587 C 1 *
+bit 586 I 1 IO_PAD255
+bit 585 O 1 IO_PAD255 584 1 Z
+bit 584 C 1 *
+bit 583 I 1 IO_PAD254
+bit 582 O 1 IO_PAD254 581 1 Z
+bit 581 C 1 *
+bit 580 I 1 IO_PAD253
+bit 579 O 1 IO_PAD253 578 1 Z
+bit 578 C 1 *
+bit 577 I 1 IO_PAD252
+bit 576 O 1 IO_PAD252 575 1 Z
+bit 575 C 1 *
+bit 574 I 1 IO_PAD251
+bit 573 O 1 IO_PAD251 572 1 Z
+bit 572 C 1 *
+bit 571 I 1 IO_PAD250
+bit 570 O 1 IO_PAD250 569 1 Z
+bit 569 C 1 *
+bit 568 I 1 IO_PAD249
+bit 567 O 1 IO_PAD249 566 1 Z
+bit 566 C 1 *
+bit 565 I 1 IO_PAD248
+bit 564 O 1 IO_PAD248 563 1 Z
+bit 563 C 1 *
+bit 562 I 1 IO_PAD246
+bit 561 O 1 IO_PAD246 560 1 Z
+bit 560 C 1 *
+bit 559 I 1 IO_PAD244
+bit 558 O 1 IO_PAD244 557 1 Z
+bit 557 C 1 *
+bit 556 I 1 IO_PAD243
+bit 555 O 1 IO_PAD243 554 1 Z
+bit 554 C 1 *
+bit 553 I 1 IO_PAD242
+bit 552 O 1 IO_PAD242 551 1 Z
+bit 551 C 1 *
+bit 550 I 1 IO_PAD240
+bit 549 O 1 IO_PAD240 548 1 Z
+bit 548 C 1 *
+bit 547 I 1 IO_PAD238
+bit 546 O 1 IO_PAD238 545 1 Z
+bit 545 C 1 *
+bit 544 I 1 IO_PAD236
+bit 543 O 1 IO_PAD236 542 1 Z
+bit 542 C 1 *
+bit 541 I 1 IO_PAD234
+bit 540 O 1 IO_PAD234 539 1 Z
+bit 539 C 1 *
+bit 538 I 1 IO_PAD233
+bit 537 O 1 IO_PAD233 536 1 Z
+bit 536 C 1 *
+bit 535 I 1 IO_PAD232
+bit 534 O 1 IO_PAD232 533 1 Z
+bit 533 C 1 *
+bit 532 I 1 IO_PAD230
+bit 531 O 1 IO_PAD230 530 1 Z
+bit 530 C 1 *
+bit 529 I 1 IO_PAD229
+bit 528 O 1 IO_PAD229 527 1 Z
+bit 527 C 1 *
+bit 526 I 1 IO_PAD228
+bit 525 O 1 IO_PAD228 524 1 Z
+bit 524 C 1 *
+bit 523 I 1 IO_PAD226
+bit 522 O 1 IO_PAD226 521 1 Z
+bit 521 C 1 *
+bit 520 I 1 IO_PAD224
+bit 519 O 1 IO_PAD224 518 1 Z
+bit 518 C 1 *
+bit 517 I 1 IO_PAD223
+bit 516 O 1 IO_PAD223 515 1 Z
+bit 515 C 1 *
+bit 514 I 1 IO_PAD222
+bit 513 O 1 IO_PAD222 512 1 Z
+bit 512 C 1 *
+bit 511 I 1 IO_PAD218
+bit 510 O 1 IO_PAD218 509 1 Z
+bit 509 C 1 *
+bit 508 I 1 IO_PAD217
+bit 507 O 1 IO_PAD217 506 1 Z
+bit 506 C 1 *
+bit 505 I 1 IO_PAD216
+bit 504 O 1 IO_PAD216 503 1 Z
+bit 503 C 1 *
+bit 502 I 1 IO_PAD214
+bit 501 O 1 IO_PAD214 500 1 Z
+bit 500 C 1 *
+bit 499 I 1 IO_PAD212
+bit 498 O 1 IO_PAD212 497 1 Z
+bit 497 C 1 *
+bit 496 I 1 IO_PAD211
+bit 495 O 1 IO_PAD211 494 1 Z
+bit 494 C 1 *
+bit 493 I 1 IO_PAD210
+bit 492 O 1 IO_PAD210 491 1 Z
+bit 491 C 1 *
+bit 490 I 1 IO_PAD208
+bit 489 O 1 IO_PAD208 488 1 Z
+bit 488 C 1 *
+bit 487 I 1 IO_PAD207
+bit 486 O 1 IO_PAD207 485 1 Z
+bit 485 C 1 *
+bit 484 I 1 IO_PAD206
+bit 483 O 1 IO_PAD206 482 1 Z
+bit 482 C 1 *
+bit 481 I 1 IO_PAD204
+bit 480 O 1 IO_PAD204 479 1 Z
+bit 479 C 1 *
+bit 478 I 1 IO_PAD202
+bit 477 O 1 IO_PAD202 476 1 Z
+bit 476 C 1 *
+bit 475 I 1 IO_PAD200
+bit 474 O 1 IO_PAD200 473 1 Z
+bit 473 C 1 *
+bit 472 I 1 IO_PAD198
+bit 471 O 1 IO_PAD198 470 1 Z
+bit 470 C 1 *
+bit 469 I 1 IO_PAD197
+bit 468 O 1 IO_PAD197 467 1 Z
+bit 467 C 1 *
+bit 466 I 1 IO_PAD196
+bit 465 O 1 IO_PAD196 464 1 Z
+bit 464 C 1 *
+bit 463 I 1 IO_PAD194
+bit 462 O 1 IO_PAD194 461 1 Z
+bit 461 C 1 *
+bit 460 I 1 IO_PAD192
+bit 459 O 1 IO_PAD192 458 1 Z
+bit 458 C 1 *
+bit 457 I 1 IO_PAD191
+bit 456 O 1 IO_PAD191 455 1 Z
+bit 455 C 1 *
+bit 454 I 1 IO_PAD190
+bit 453 O 1 IO_PAD190 452 1 Z
+bit 452 C 1 *
+bit 451 I 1 IO_PAD189
+bit 450 O 1 IO_PAD189 449 1 Z
+bit 449 C 1 *
+bit 448 I 1 IO_PAD188
+bit 447 O 1 IO_PAD188 446 1 Z
+bit 446 C 1 *
+bit 445 I 1 IO_PAD187
+bit 444 O 1 IO_PAD187 443 1 Z
+bit 443 C 1 *
+bit 442 I 1 IO_PAD186
+bit 441 O 1 IO_PAD186 440 1 Z
+bit 440 C 1 *
+bit 439 I 1 IO_PAD185
+bit 438 O 1 IO_PAD185 437 1 Z
+bit 437 C 1 *
+bit 436 I 1 IO_PAD184
+bit 435 O 1 IO_PAD184 434 1 Z
+bit 434 C 1 *
+bit 433 I 1 IO_PAD182
+bit 432 O 1 IO_PAD182 431 1 Z
+bit 431 C 1 *
+bit 430 I 1 IO_PAD180
+bit 429 O 1 IO_PAD180 428 1 Z
+bit 428 C 1 *
+bit 427 I 1 IO_PAD178
+bit 426 O 1 IO_PAD178 425 1 Z
+bit 425 C 1 *
+bit 424 I 1 IO_PAD176
+bit 423 O 1 IO_PAD176 422 1 Z
+bit 422 C 1 *
+bit 421 I 1 IO_PAD173
+bit 420 O 1 IO_PAD173 419 1 Z
+bit 419 C 1 *
+bit 418 I 1 IO_PAD172
+bit 417 O 1 IO_PAD172 416 1 Z
+bit 416 C 1 *
+bit 415 I 1 IO_PAD171
+bit 414 O 1 IO_PAD171 413 1 Z
+bit 413 C 1 *
+bit 412 I 1 IO_PAD168
+bit 411 O 1 IO_PAD168 410 1 Z
+bit 410 C 1 *
+bit 409 I 1 IO_PAD167
+bit 408 O 1 IO_PAD167 407 1 Z
+bit 407 C 1 *
+bit 406 I 1 M2_PAD166
+bit 405 I 1 M0_PAD165
+bit 404 I 1 M1_PAD164
+bit 403 I 1 IO_PAD160
+bit 402 O 1 IO_PAD160 401 1 Z
+bit 401 C 1 *
+bit 400 I 1 IO_PAD159
+bit 399 O 1 IO_PAD159 398 1 Z
+bit 398 C 1 *
+bit 397 I 1 IO_PAD157
+bit 396 O 1 IO_PAD157 395 1 Z
+bit 395 C 1 *
+bit 394 I 1 IO_PAD156
+bit 393 O 1 IO_PAD156 392 1 Z
+bit 392 C 1 *
+bit 391 I 1 IO_PAD155
+bit 390 O 1 IO_PAD155 389 1 Z
+bit 389 C 1 *
+bit 388 I 1 IO_PAD153
+bit 387 O 1 IO_PAD153 386 1 Z
+bit 386 C 1 *
+bit 385 I 1 IO_PAD152
+bit 384 O 1 IO_PAD152 383 1 Z
+bit 383 C 1 *
+bit 382 I 1 IO_PAD151
+bit 381 O 1 IO_PAD151 380 1 Z
+bit 380 C 1 *
+bit 379 I 1 IO_PAD149
+bit 378 O 1 IO_PAD149 377 1 Z
+bit 377 C 1 *
+bit 376 I 1 IO_PAD147
+bit 375 O 1 IO_PAD147 374 1 Z
+bit 374 C 1 *
+bit 373 I 1 IO_PAD146
+bit 372 O 1 IO_PAD146 371 1 Z
+bit 371 C 1 *
+bit 370 I 1 IO_PAD145
+bit 369 O 1 IO_PAD145 368 1 Z
+bit 368 C 1 *
+bit 367 I 1 IO_PAD144
+bit 366 O 1 IO_PAD144 365 1 Z
+bit 365 C 1 *
+bit 364 I 1 IO_PAD143
+bit 363 O 1 IO_PAD143 362 1 Z
+bit 362 C 1 *
+bit 361 I 1 IO_PAD141
+bit 360 O 1 IO_PAD141 359 1 Z
+bit 359 C 1 *
+bit 358 I 1 IO_PAD139
+bit 357 O 1 IO_PAD139 356 1 Z
+bit 356 C 1 *
+bit 355 I 1 IO_PAD137
+bit 354 O 1 IO_PAD137 353 1 Z
+bit 353 C 1 *
+bit 352 I 1 IO_PAD135
+bit 351 O 1 IO_PAD135 350 1 Z
+bit 350 C 1 *
+bit 349 I 1 IO_PAD134
+bit 348 O 1 IO_PAD134 347 1 Z
+bit 347 C 1 *
+bit 346 I 1 IO_PAD133
+bit 345 O 1 IO_PAD133 344 1 Z
+bit 344 C 1 *
+bit 343 I 1 IO_PAD131
+bit 342 O 1 IO_PAD131 341 1 Z
+bit 341 C 1 *
+bit 340 I 1 IO_PAD130
+bit 339 O 1 IO_PAD130 338 1 Z
+bit 338 C 1 *
+bit 337 I 1 IO_PAD129
+bit 336 O 1 IO_PAD129 335 1 Z
+bit 335 C 1 *
+bit 334 I 1 IO_PAD127
+bit 333 O 1 IO_PAD127 332 1 Z
+bit 332 C 1 *
+bit 331 I 1 IO_PAD125
+bit 330 O 1 IO_PAD125 329 1 Z
+bit 329 C 1 *
+bit 328 I 1 IO_PAD123
+bit 327 O 1 IO_PAD123 326 1 Z
+bit 326 C 1 *
+bit 325 I 1 IO_PAD121
+bit 324 O 1 IO_PAD121 323 1 Z
+bit 323 C 1 *
+bit 322 I 1 IO_PAD120
+bit 321 O 1 IO_PAD120 320 1 Z
+bit 320 C 1 *
+bit 319 I 1 IO_PAD119
+bit 318 O 1 IO_PAD119 317 1 Z
+bit 317 C 1 *
+bit 316 I 1 IO_PAD117
+bit 315 O 1 IO_PAD117 314 1 Z
+bit 314 C 1 *
+bit 313 I 1 IO_PAD115
+bit 312 O 1 IO_PAD115 311 1 Z
+bit 311 C 1 *
+bit 310 I 1 IO_PAD114
+bit 309 O 1 IO_PAD114 308 1 Z
+bit 308 C 1 *
+bit 307 I 1 IO_PAD108
+bit 306 O 1 IO_PAD108 305 1 Z
+bit 305 C 1 *
+bit 304 I 1 IO_PAD107
+bit 303 O 1 IO_PAD107 302 1 Z
+bit 302 C 1 *
+bit 301 I 1 IO_PAD105
+bit 300 O 1 IO_PAD105 299 1 Z
+bit 299 C 1 *
+bit 298 I 1 IO_PAD103
+bit 297 O 1 IO_PAD103 296 1 Z
+bit 296 C 1 *
+bit 295 I 1 IO_PAD102
+bit 294 O 1 IO_PAD102 293 1 Z
+bit 293 C 1 *
+bit 292 I 1 IO_PAD101
+bit 291 O 1 IO_PAD101 290 1 Z
+bit 290 C 1 *
+bit 289 I 1 IO_PAD99
+bit 288 O 1 IO_PAD99 287 1 Z
+bit 287 C 1 *
+bit 286 I 1 IO_PAD97
+bit 285 O 1 IO_PAD97 284 1 Z
+bit 284 C 1 *
+bit 283 I 1 IO_PAD95
+bit 282 O 1 IO_PAD95 281 1 Z
+bit 281 C 1 *
+bit 280 I 1 IO_PAD93
+bit 279 O 1 IO_PAD93 278 1 Z
+bit 278 C 1 *
+bit 277 I 1 IO_PAD92
+bit 276 O 1 IO_PAD92 275 1 Z
+bit 275 C 1 *
+bit 274 I 1 IO_PAD91
+bit 273 O 1 IO_PAD91 272 1 Z
+bit 272 C 1 *
+bit 271 I 1 IO_PAD89
+bit 270 O 1 IO_PAD89 269 1 Z
+bit 269 C 1 *
+bit 268 I 1 IO_PAD88
+bit 267 O 1 IO_PAD88 266 1 Z
+bit 266 C 1 *
+bit 265 I 1 IO_PAD87
+bit 264 O 1 IO_PAD87 263 1 Z
+bit 263 C 1 *
+bit 262 I 1 IO_PAD85
+bit 261 O 1 IO_PAD85 260 1 Z
+bit 260 C 1 *
+bit 259 I 1 IO_PAD83
+bit 258 O 1 IO_PAD83 257 1 Z
+bit 257 C 1 *
+bit 256 I 1 IO_PAD81
+bit 255 O 1 IO_PAD81 254 1 Z
+bit 254 C 1 *
+bit 253 I 1 IO_PAD79
+bit 252 O 1 IO_PAD79 251 1 Z
+bit 251 C 1 *
+bit 250 I 1 IO_PAD78
+bit 249 O 1 IO_PAD78 248 1 Z
+bit 248 C 1 *
+bit 247 I 1 IO_PAD77
+bit 246 O 1 IO_PAD77 245 1 Z
+bit 245 C 1 *
+bit 244 I 1 IO_PAD76
+bit 243 O 1 IO_PAD76 242 1 Z
+bit 242 C 1 *
+bit 241 I 1 IO_PAD75
+bit 240 O 1 IO_PAD75 239 1 Z
+bit 239 C 1 *
+bit 238 I 1 IO_PAD73
+bit 237 O 1 IO_PAD73 236 1 Z
+bit 236 C 1 *
+bit 235 I 1 IO_PAD71
+bit 234 O 1 IO_PAD71 233 1 Z
+bit 233 C 1 *
+bit 232 I 1 IO_PAD70
+bit 231 O 1 IO_PAD70 230 1 Z
+bit 230 C 1 *
+bit 229 I 1 IO_PAD69
+bit 228 O 1 IO_PAD69 227 1 Z
+bit 227 C 1 *
+bit 226 I 1 IO_PAD67
+bit 225 O 1 IO_PAD67 224 1 Z
+bit 224 C 1 *
+bit 223 I 1 IO_PAD66
+bit 222 O 1 IO_PAD66 221 1 Z
+bit 221 C 1 *
+bit 220 I 1 IO_PAD65
+bit 219 O 1 IO_PAD65 218 1 Z
+bit 218 C 1 *
+bit 217 I 1 IO_PAD63
+bit 216 O 1 IO_PAD63 215 1 Z
+bit 215 C 1 *
+bit 214 I 1 IO_PAD62
+bit 213 O 1 IO_PAD62 212 1 Z
+bit 212 C 1 *
+bit 211 O 1 *
+bit 210 I 1 HSWAP_EN_PAD56
+bit 209 I 1 IO_PAD55
+bit 208 O 1 IO_PAD55 207 1 Z
+bit 207 C 1 *
+bit 206 I 1 IO_PAD54
+bit 205 O 1 IO_PAD54 204 1 Z
+bit 204 C 1 *
+bit 203 I 1 IO_PAD53
+bit 202 O 1 IO_PAD53 201 1 Z
+bit 201 C 1 *
+bit 200 I 1 IO_PAD49
+bit 199 O 1 IO_PAD49 198 1 Z
+bit 198 C 1 *
+bit 197 I 1 IO_PAD48
+bit 196 O 1 IO_PAD48 195 1 Z
+bit 195 C 1 *
+bit 194 I 1 IO_PAD44
+bit 193 O 1 IO_PAD44 192 1 Z
+bit 192 C 1 *
+bit 191 I 1 IO_PAD42
+bit 190 O 1 IO_PAD42 189 1 Z
+bit 189 C 1 *
+bit 188 I 1 IO_PAD40
+bit 187 O 1 IO_PAD40 186 1 Z
+bit 186 C 1 *
+bit 185 I 1 IO_PAD38
+bit 184 O 1 IO_PAD38 183 1 Z
+bit 183 C 1 *
+bit 182 I 1 IO_PAD36
+bit 181 O 1 IO_PAD36 180 1 Z
+bit 180 C 1 *
+bit 179 I 1 IO_PAD35
+bit 178 O 1 IO_PAD35 177 1 Z
+bit 177 C 1 *
+bit 176 I 1 IO_PAD34
+bit 175 O 1 IO_PAD34 174 1 Z
+bit 174 C 1 *
+bit 173 I 1 IO_PAD33
+bit 172 O 1 IO_PAD33 171 1 Z
+bit 171 C 1 *
+bit 170 I 1 IO_PAD32
+bit 169 O 1 IO_PAD32 168 1 Z
+bit 168 C 1 *
+bit 167 I 1 IO_PAD31
+bit 166 O 1 IO_PAD31 165 1 Z
+bit 165 C 1 *
+bit 164 I 1 IO_PAD30
+bit 163 O 1 IO_PAD30 162 1 Z
+bit 162 C 1 *
+bit 161 I 1 IO_PAD29
+bit 160 O 1 IO_PAD29 159 1 Z
+bit 159 C 1 *
+bit 158 I 1 IO_PAD28
+bit 157 O 1 IO_PAD28 156 1 Z
+bit 156 C 1 *
+bit 155 I 1 IO_PAD26
+bit 154 O 1 IO_PAD26 153 1 Z
+bit 153 C 1 *
+bit 152 I 1 IO_PAD24
+bit 151 O 1 IO_PAD24 150 1 Z
+bit 150 C 1 *
+bit 149 I 1 IO_PAD23
+bit 148 O 1 IO_PAD23 147 1 Z
+bit 147 C 1 *
+bit 146 I 1 IO_PAD22
+bit 145 O 1 IO_PAD22 144 1 Z
+bit 144 C 1 *
+bit 143 I 1 IO_PAD20
+bit 142 O 1 IO_PAD20 141 1 Z
+bit 141 C 1 *
+bit 140 I 1 IO_PAD18
+bit 139 O 1 IO_PAD18 138 1 Z
+bit 138 C 1 *
+bit 137 I 1 IO_PAD16
+bit 136 O 1 IO_PAD16 135 1 Z
+bit 135 C 1 *
+bit 134 I 1 IO_PAD14
+bit 133 O 1 IO_PAD14 132 1 Z
+bit 132 C 1 *
+bit 131 I 1 IO_PAD13
+bit 130 O 1 IO_PAD13 129 1 Z
+bit 129 C 1 *
+bit 128 I 1 IO_PAD12
+bit 127 O 1 IO_PAD12 126 1 Z
+bit 126 C 1 *
+bit 125 I 1 IO_PAD10
+bit 124 O 1 IO_PAD10 123 1 Z
+bit 123 C 1 *
+bit 122 I 1 IO_PAD9
+bit 121 O 1 IO_PAD9 120 1 Z
+bit 120 C 1 *
+bit 119 I 1 IO_PAD8
+bit 118 O 1 IO_PAD8 117 1 Z
+bit 117 C 1 *
+bit 116 I 1 IO_PAD6
+bit 115 O 1 IO_PAD6 114 1 Z
+bit 114 C 1 *
+bit 113 I 1 IO_PAD4
+bit 112 O 1 IO_PAD4 111 1 Z
+bit 111 C 1 *
+bit 110 I 1 IO_PAD3
+bit 109 O 1 IO_PAD3 108 1 Z
+bit 108 C 1 *
+bit 107 I 1 IO_PAD2
+bit 106 O 1 IO_PAD2 105 1 Z
+bit 105 C 1 *
+bit 104 I 1 IO_PAD436
+bit 103 O 1 IO_PAD436 102 1 Z
+bit 102 C 1 *
+bit 101 I 1 IO_PAD435
+bit 100 O 1 IO_PAD435 99 1 Z
+bit 99 C 1 *
+bit 98 I 1 IO_PAD434
+bit 97 O 1 IO_PAD434 96 1 Z
+bit 96 C 1 *
+bit 95 I 1 IO_PAD432
+bit 94 O 1 IO_PAD432 93 1 Z
+bit 93 C 1 *
+bit 92 I 1 IO_PAD430
+bit 91 O 1 IO_PAD430 90 1 Z
+bit 90 C 1 *
+bit 89 I 1 IO_PAD429
+bit 88 O 1 IO_PAD429 87 1 Z
+bit 87 C 1 *
+bit 86 I 1 IO_PAD428
+bit 85 O 1 IO_PAD428 84 1 Z
+bit 84 C 1 *
+bit 83 I 1 IO_PAD426
+bit 82 O 1 IO_PAD426 81 1 Z
+bit 81 C 1 *
+bit 80 I 1 IO_PAD425
+bit 79 O 1 IO_PAD425 78 1 Z
+bit 78 C 1 *
+bit 77 I 1 IO_PAD424
+bit 76 O 1 IO_PAD424 75 1 Z
+bit 75 C 1 *
+bit 74 I 1 IO_PAD422
+bit 73 O 1 IO_PAD422 72 1 Z
+bit 72 C 1 *
+bit 71 I 1 IO_PAD420
+bit 70 O 1 IO_PAD420 69 1 Z
+bit 69 C 1 *
+bit 68 I 1 IO_PAD418
+bit 67 O 1 IO_PAD418 66 1 Z
+bit 66 C 1 *
+bit 65 I 1 IO_PAD416
+bit 64 O 1 IO_PAD416 63 1 Z
+bit 63 C 1 *
+bit 62 I 1 IO_PAD415
+bit 61 O 1 IO_PAD415 60 1 Z
+bit 60 C 1 *
+bit 59 I 1 IO_PAD414
+bit 58 O 1 IO_PAD414 57 1 Z
+bit 57 C 1 *
+bit 56 I 1 IO_PAD412
+bit 55 O 1 IO_PAD412 54 1 Z
+bit 54 C 1 *
+bit 53 I 1 IO_PAD410
+bit 52 O 1 IO_PAD410 51 1 Z
+bit 51 C 1 *
+bit 50 I 1 IO_PAD409
+bit 49 O 1 IO_PAD409 48 1 Z
+bit 48 C 1 *
+bit 47 I 1 IO_PAD408
+bit 46 O 1 IO_PAD408 45 1 Z
+bit 45 C 1 *
+bit 44 I 1 IO_PAD407
+bit 43 O 1 IO_PAD407 42 1 Z
+bit 42 C 1 *
+bit 41 I 1 IO_PAD406
+bit 40 O 1 IO_PAD406 39 1 Z
+bit 39 C 1 *
+bit 38 I 1 IO_PAD405
+bit 37 O 1 IO_PAD405 36 1 Z
+bit 36 C 1 *
+bit 35 I 1 IO_PAD404
+bit 34 O 1 IO_PAD404 33 1 Z
+bit 33 C 1 *
+bit 32 I 1 IO_PAD403
+bit 31 O 1 IO_PAD403 30 1 Z
+bit 30 C 1 *
+bit 29 I 1 IO_PAD402
+bit 28 O 1 IO_PAD402 27 1 Z
+bit 27 C 1 *
+bit 26 I 1 IO_PAD400
+bit 25 O 1 IO_PAD400 24 1 Z
+bit 24 C 1 *
+bit 23 I 1 IO_PAD398
+bit 22 O 1 IO_PAD398 21 1 Z
+bit 21 C 1 *
+bit 20 I 1 IO_PAD396
+bit 19 O 1 IO_PAD396 18 1 Z
+bit 18 C 1 *
+bit 17 I 1 IO_PAD394
+bit 16 O 1 IO_PAD394 15 1 Z
+bit 15 C 1 *
+bit 14 I 1 IO_PAD390
+bit 13 O 1 IO_PAD390 12 1 Z
+bit 12 C 1 *
+bit 11 I 1 IO_PAD389
+bit 10 O 1 IO_PAD389 9 1 Z
+bit 9 C 1 *
+bit 8 I 1 IO_PAD388
+bit 7 O 1 IO_PAD388 6 1 Z
+bit 6 C 1 *
+bit 5 I 1 IO_PAD385
+bit 4 O 1 IO_PAD385 3 1 Z
+bit 3 C 1 *
+bit 2 I 1 IO_PAD384
+bit 1 O 1 IO_PAD384 0 1 Z
+bit 0 C 1 *
--- /dev/null
+signal GND1
+signal GND2
+signal GND3
+signal GND4
+signal GND5
+signal GND6
+signal GND7
+signal GND8
+signal GND9
+signal GND10
+signal GND11
+signal GND12
+signal GND13
+signal GND14
+signal GND15
+signal GND16
+signal GND17
+signal GND18
+signal GND19
+signal GND20
+signal GND21
+signal GND22
+signal GND23
+signal GND24
+signal GND25
+signal GND26
+signal GND27
+signal GND28
+signal GND29
+signal GND30
+signal GND31
+signal GND32
+signal GND33
+signal GND34
+signal GND35
+signal GND36
+signal GND37
+signal GND38
+signal GND39
+signal GND40
+signal CCLK_T15
+signal DONE_R15
+signal HSWAP_EN_E6
+signal M0_P5
+signal M1_U3
+signal M2_R4
+signal PROG_B
+signal TCK
+signal TDI
+signal TDO
+signal TMS
+signal VCCAUX1
+signal VCCAUX2
+signal VCCAUX3
+signal VCCAUX4
+signal VCCAUX5
+signal VCCAUX6
+signal VCCAUX7
+signal VCCAUX8
+signal VCCINT1
+signal VCCINT2
+signal VCCINT3
+signal VCCINT4
+signal VCCINT5
+signal VCCINT6
+signal VCCINT7
+signal VCCINT8
+signal VCCINT9
+signal VCCINT10
+signal VCCINT11
+signal VCCINT12
+signal VCCO01
+signal VCCO02
+signal VCCO03
+signal VCCO04
+signal VCCO11
+signal VCCO12
+signal VCCO13
+signal VCCO14
+signal VCCO21
+signal VCCO22
+signal VCCO23
+signal VCCO31
+signal VCCO32
+signal VCCO33
+signal VCCO41
+signal VCCO42
+signal VCCO43
+signal VCCO44
+signal VCCO51
+signal VCCO52
+signal VCCO53
+signal VCCO54
+signal VCCO61
+signal VCCO62
+signal VCCO63
+signal VCCO71
+signal VCCO72
+signal VCCO73
+signal IO_A2
+signal IO_A3
+signal IO_A4
+signal IO_A5
+signal IO_A7
+signal IO_A8
+signal IO_A9
+signal IO_A10
+signal IO_A11
+signal IO_A12
+signal IO_A14
+signal IO_A15
+signal IO_A16
+signal IO_A17
+signal IO_B1
+signal IO_B3
+signal IO_B4
+signal IO_B5
+signal IO_B6
+signal IO_B9
+signal IO_B10
+signal IO_B13
+signal IO_B14
+signal IO_B15
+signal IO_B18
+signal IO_C1
+signal IO_C2
+signal IO_C3
+signal IO_C4
+signal IO_C5
+signal IO_C7
+signal IO_C8
+signal IO_C11
+signal IO_C12
+signal IO_C14
+signal IO_C15
+signal IO_C16
+signal IO_C17
+signal IO_C18
+signal IO_D1
+signal IO_D2
+signal IO_D3
+signal IO_D5
+signal IO_D6
+signal IO_D7
+signal IO_D8
+signal IO_D9
+signal IO_D10
+signal IO_D11
+signal IO_D12
+signal IO_D13
+signal IO_D14
+signal IO_D16
+signal IO_D17
+signal IO_D18
+signal IO_E1
+signal IO_E2
+signal IO_E3
+signal IO_E4
+signal IO_E7
+signal IO_E8
+signal IO_E9
+signal IO_E10
+signal IO_E11
+signal IO_E12
+signal IO_E13
+signal IO_E15
+signal IO_E16
+signal IO_E17
+signal IO_E18
+signal IO_F2
+signal IO_F4
+signal IO_F5
+signal IO_F8
+signal IO_F9
+signal IO_F10
+signal IO_F11
+signal IO_F14
+signal IO_F15
+signal IO_F17
+signal IO_G1
+signal IO_G3
+signal IO_G4
+signal IO_G5
+signal IO_G14
+signal IO_G15
+signal IO_G16
+signal IO_G18
+signal IO_H1
+signal IO_H2
+signal IO_H3
+signal IO_H4
+signal IO_H5
+signal IO_H6
+signal IO_H13
+signal IO_H14
+signal IO_H15
+signal IO_H16
+signal IO_H17
+signal IO_H18
+signal IO_J1
+signal IO_J2
+signal IO_J4
+signal IO_J5
+signal IO_J6
+signal IO_J13
+signal IO_J14
+signal IO_J15
+signal IO_J17
+signal IO_J18
+signal IO_K1
+signal IO_K2
+signal IO_K4
+signal IO_K5
+signal IO_K6
+signal IO_K13
+signal IO_K14
+signal IO_K15
+signal IO_K17
+signal IO_K18
+signal IO_L1
+signal IO_L2
+signal IO_L3
+signal IO_L4
+signal IO_L5
+signal IO_L6
+signal IO_L13
+signal IO_L14
+signal IO_L15
+signal IO_L16
+signal IO_L17
+signal IO_L18
+signal IO_M1
+signal IO_M3
+signal IO_M4
+signal IO_M5
+signal IO_M14
+signal IO_M15
+signal IO_M16
+signal IO_M18
+signal IO_N2
+signal IO_N4
+signal IO_N5
+signal IO_N8
+signal IO_N9
+signal IO_N10
+signal IO_N11
+signal IO_N14
+signal IO_N15
+signal IO_N17
+signal IO_P1
+signal IO_P2
+signal IO_P3
+signal IO_P4
+signal IO_P6
+signal IO_P7
+signal IO_P8
+signal IO_P9
+signal IO_P10
+signal IO_P11
+signal IO_P12
+signal IO_P13
+signal IO_P14
+signal IO_P15
+signal IO_P16
+signal IO_P17
+signal IO_P18
+signal IO_R1
+signal IO_R2
+signal IO_R3
+signal IO_R5
+signal IO_R6
+signal IO_R7
+signal IO_R8
+signal IO_R9
+signal IO_R10
+signal IO_R11
+signal IO_R12
+signal IO_R13
+signal IO_R14
+signal IO_R16
+signal IO_R17
+signal IO_R18
+signal IO_T1
+signal IO_T2
+signal IO_T3
+signal IO_T4
+signal IO_T5
+signal IO_T7
+signal IO_T8
+signal IO_T11
+signal IO_T12
+signal IO_T14
+signal IO_T16
+signal IO_T17
+signal IO_T18
+signal IO_U1
+signal IO_U4
+signal IO_U5
+signal IO_U6
+signal IO_U9
+signal IO_U10
+signal IO_U13
+signal IO_U14
+signal IO_U15
+signal IO_U16
+signal IO_U18
+signal IO_V2
+signal IO_V3
+signal IO_V4
+signal IO_V5
+signal IO_V7
+signal IO_V8
+signal IO_V9
+signal IO_V10
+signal IO_V11
+signal IO_V12
+signal IO_V14
+signal IO_V15
+signal IO_V16
+
+register BSR 815
+register BR 1
+register DIR 32
+
+instruction length 6
+
+instruction EXTEST 000000 BSR
+instruction SAMPLE/PRELOAD 000001 BSR
+instruction IDCODE 001001 DIR
+instruction BYPASS 111111 BR
+
+bit 814 I 1 IO_C16
+bit 813 O 1 IO_C16 812 1 Z
+bit 812 C 1 *
+bit 811 I 1 IO_C17
+bit 810 O 1 IO_C17 809 1 Z
+bit 809 C 1 *
+bit 808 O 1 *
+bit 807 O 1 *
+bit 806 O 1 *
+bit 805 O 1 *
+bit 804 O 1 *
+bit 803 O 1 *
+bit 802 I 1 IO_B18
+bit 801 O 1 IO_B18 800 1 Z
+bit 800 C 1 *
+bit 799 I 1 IO_C18
+bit 798 O 1 IO_C18 797 1 Z
+bit 797 C 1 *
+bit 796 I 1 IO_D17
+bit 795 O 1 IO_D17 794 1 Z
+bit 794 C 1 *
+bit 793 I 1 IO_D18
+bit 792 O 1 IO_D18 791 1 Z
+bit 791 C 1 *
+bit 790 I 1 IO_D16
+bit 789 O 1 IO_D16 788 1 Z
+bit 788 C 1 *
+bit 787 I 1 IO_E16
+bit 786 O 1 IO_E16 785 1 Z
+bit 785 C 1 *
+bit 784 I 1 IO_E17
+bit 783 O 1 IO_E17 782 1 Z
+bit 782 C 1 *
+bit 781 I 1 IO_E18
+bit 780 O 1 IO_E18 779 1 Z
+bit 779 C 1 *
+bit 778 I 1 IO_F15
+bit 777 O 1 IO_F15 776 1 Z
+bit 776 C 1 *
+bit 775 I 1 IO_E15
+bit 774 O 1 IO_E15 773 1 Z
+bit 773 C 1 *
+bit 772 I 1 IO_F14
+bit 771 O 1 IO_F14 770 1 Z
+bit 770 C 1 *
+bit 769 I 1 IO_G14
+bit 768 O 1 IO_G14 767 1 Z
+bit 767 C 1 *
+bit 766 I 1 IO_G18
+bit 765 O 1 IO_G18 764 1 Z
+bit 764 C 1 *
+bit 763 I 1 IO_F17
+bit 762 O 1 IO_F17 761 1 Z
+bit 761 C 1 *
+bit 760 I 1 IO_G15
+bit 759 O 1 IO_G15 758 1 Z
+bit 758 C 1 *
+bit 757 I 1 IO_G16
+bit 756 O 1 IO_G16 755 1 Z
+bit 755 C 1 *
+bit 754 I 1 IO_H13
+bit 753 O 1 IO_H13 752 1 Z
+bit 752 C 1 *
+bit 751 I 1 IO_H14
+bit 750 O 1 IO_H14 749 1 Z
+bit 749 C 1 *
+bit 748 I 1 IO_H16
+bit 747 O 1 IO_H16 746 1 Z
+bit 746 C 1 *
+bit 745 I 1 IO_H15
+bit 744 O 1 IO_H15 743 1 Z
+bit 743 C 1 *
+bit 742 I 1 IO_H17
+bit 741 O 1 IO_H17 740 1 Z
+bit 740 C 1 *
+bit 739 I 1 IO_H18
+bit 738 O 1 IO_H18 737 1 Z
+bit 737 C 1 *
+bit 736 O 1 *
+bit 735 O 1 *
+bit 734 O 1 *
+bit 733 I 1 IO_J13
+bit 732 O 1 IO_J13 731 1 Z
+bit 731 C 1 *
+bit 730 I 1 IO_J18
+bit 729 O 1 IO_J18 728 1 Z
+bit 728 C 1 *
+bit 727 I 1 IO_J17
+bit 726 O 1 IO_J17 725 1 Z
+bit 725 C 1 *
+bit 724 I 1 IO_J15
+bit 723 O 1 IO_J15 722 1 Z
+bit 722 C 1 *
+bit 721 I 1 IO_J14
+bit 720 O 1 IO_J14 719 1 Z
+bit 719 C 1 *
+bit 718 I 1 IO_K17
+bit 717 O 1 IO_K17 716 1 Z
+bit 716 C 1 *
+bit 715 I 1 IO_K18
+bit 714 O 1 IO_K18 713 1 Z
+bit 713 C 1 *
+bit 712 I 1 IO_K13
+bit 711 O 1 IO_K13 710 1 Z
+bit 710 C 1 *
+bit 709 I 1 IO_K14
+bit 708 O 1 IO_K14 707 1 Z
+bit 707 C 1 *
+bit 706 I 1 IO_K15
+bit 705 O 1 IO_K15 704 1 Z
+bit 704 C 1 *
+bit 703 O 1 *
+bit 702 O 1 *
+bit 701 O 1 *
+bit 700 I 1 IO_L18
+bit 699 O 1 IO_L18 698 1 Z
+bit 698 C 1 *
+bit 697 I 1 IO_L17
+bit 696 O 1 IO_L17 695 1 Z
+bit 695 C 1 *
+bit 694 I 1 IO_L15
+bit 693 O 1 IO_L15 692 1 Z
+bit 692 C 1 *
+bit 691 I 1 IO_L16
+bit 690 O 1 IO_L16 689 1 Z
+bit 689 C 1 *
+bit 688 I 1 IO_L14
+bit 687 O 1 IO_L14 686 1 Z
+bit 686 C 1 *
+bit 685 I 1 IO_L13
+bit 684 O 1 IO_L13 683 1 Z
+bit 683 C 1 *
+bit 682 I 1 IO_M18
+bit 681 O 1 IO_M18 680 1 Z
+bit 680 C 1 *
+bit 679 I 1 IO_N17
+bit 678 O 1 IO_N17 677 1 Z
+bit 677 C 1 *
+bit 676 I 1 IO_M15
+bit 675 O 1 IO_M15 674 1 Z
+bit 674 C 1 *
+bit 673 I 1 IO_M16
+bit 672 O 1 IO_M16 671 1 Z
+bit 671 C 1 *
+bit 670 I 1 IO_M14
+bit 669 O 1 IO_M14 668 1 Z
+bit 668 C 1 *
+bit 667 I 1 IO_N14
+bit 666 O 1 IO_N14 665 1 Z
+bit 665 C 1 *
+bit 664 I 1 IO_P15
+bit 663 O 1 IO_P15 662 1 Z
+bit 662 C 1 *
+bit 661 I 1 IO_N15
+bit 660 O 1 IO_N15 659 1 Z
+bit 659 C 1 *
+bit 658 I 1 IO_P18
+bit 657 O 1 IO_P18 656 1 Z
+bit 656 C 1 *
+bit 655 I 1 IO_P17
+bit 654 O 1 IO_P17 653 1 Z
+bit 653 C 1 *
+bit 652 I 1 IO_R17
+bit 651 O 1 IO_R17 650 1 Z
+bit 650 C 1 *
+bit 649 I 1 IO_R18
+bit 648 O 1 IO_R18 647 1 Z
+bit 647 C 1 *
+bit 646 I 1 IO_P16
+bit 645 O 1 IO_P16 644 1 Z
+bit 644 C 1 *
+bit 643 I 1 IO_R16
+bit 642 O 1 IO_R16 641 1 Z
+bit 641 C 1 *
+bit 640 I 1 IO_T18
+bit 639 O 1 IO_T18 638 1 Z
+bit 638 C 1 *
+bit 637 I 1 IO_U18
+bit 636 O 1 IO_U18 635 1 Z
+bit 635 C 1 *
+bit 634 O 1 *
+bit 633 O 1 *
+bit 632 O 1 *
+bit 631 O 1 *
+bit 630 O 1 *
+bit 629 O 1 *
+bit 628 I 1 IO_T17
+bit 627 O 1 IO_T17 626 1 Z
+bit 626 C 1 *
+bit 625 I 1 IO_T16
+bit 624 O 1 IO_T16 623 1 Z
+bit 623 C 1 *
+bit 622 I 1 CCLK_T15
+bit 621 O 1 CCLK_T15 620 1 Z
+bit 620 C 1 *
+bit 619 I 1 DONE_R15
+bit 618 O 1 DONE_R15 617 1 Z
+bit 617 C 1 *
+bit 616 I 1 IO_V17
+bit 615 O 1 IO_V17 614 1 Z
+bit 614 C 1 *
+bit 613 I 1 IO_U16
+bit 612 O 1 IO_U16 611 1 Z
+bit 611 C 1 *
+bit 610 I 1 IO_V16
+bit 609 O 1 IO_V16 608 1 Z
+bit 608 C 1 *
+bit 607 I 1 IO_P14
+bit 606 O 1 IO_P14 605 1 Z
+bit 605 C 1 *
+bit 604 I 1 IO_R14
+bit 603 O 1 IO_R14 602 1 Z
+bit 602 C 1 *
+bit 601 O 1 *
+bit 600 O 1 *
+bit 599 O 1 *
+bit 598 I 1 IO_U15
+bit 597 O 1 IO_U15 596 1 Z
+bit 596 C 1 *
+bit 595 I 1 IO_V15
+bit 594 O 1 IO_V15 593 1 Z
+bit 593 C 1 *
+bit 592 I 1 IO_T14
+bit 591 O 1 IO_T14 590 1 Z
+bit 590 C 1 *
+bit 589 I 1 IO_U14
+bit 588 O 1 IO_U14 587 1 Z
+bit 587 C 1 *
+bit 586 O 1 *
+bit 585 O 1 *
+bit 584 O 1 *
+bit 583 O 1 *
+bit 582 O 1 *
+bit 581 O 1 *
+bit 580 O 1 *
+bit 579 O 1 *
+bit 578 O 1 *
+bit 577 I 1 IO_V14
+bit 576 O 1 IO_V14 575 1 Z
+bit 575 C 1 *
+bit 574 O 1 *
+bit 573 O 1 *
+bit 572 O 1 *
+bit 571 I 1 IO_U13
+bit 570 O 1 IO_U13 569 1 Z
+bit 569 C 1 *
+bit 568 O 1 *
+bit 567 O 1 *
+bit 566 O 1 *
+bit 565 O 1 *
+bit 564 O 1 *
+bit 563 O 1 *
+bit 562 I 1 IO_R13
+bit 561 O 1 IO_R13 560 1 Z
+bit 560 C 1 *
+bit 559 I 1 IO_P13
+bit 558 O 1 IO_P13 557 1 Z
+bit 557 C 1 *
+bit 556 I 1 IO_P12
+bit 555 O 1 IO_P12 554 1 Z
+bit 554 C 1 *
+bit 553 I 1 IO_T12
+bit 552 O 1 IO_T12 551 1 Z
+bit 551 C 1 *
+bit 550 I 1 IO_R12
+bit 549 O 1 IO_R12 548 1 Z
+bit 548 C 1 *
+bit 547 I 1 IO_V12
+bit 546 O 1 IO_V12 545 1 Z
+bit 545 C 1 *
+bit 544 I 1 IO_V11
+bit 543 O 1 IO_V11 542 1 Z
+bit 542 C 1 *
+bit 541 O 1 *
+bit 540 O 1 *
+bit 539 O 1 *
+bit 538 I 1 IO_R11
+bit 537 O 1 IO_R11 536 1 Z
+bit 536 C 1 *
+bit 535 I 1 IO_T11
+bit 534 O 1 IO_T11 533 1 Z
+bit 533 C 1 *
+bit 532 I 1 IO_N11
+bit 531 O 1 IO_N11 530 1 Z
+bit 530 C 1 *
+bit 529 I 1 IO_P11
+bit 528 O 1 IO_P11 527 1 Z
+bit 527 C 1 *
+bit 526 I 1 IO_R10
+bit 525 O 1 IO_R10 524 1 Z
+bit 524 C 1 *
+bit 523 I 1 IO_U10
+bit 522 O 1 IO_U10 521 1 Z
+bit 521 C 1 *
+bit 520 I 1 IO_V10
+bit 519 O 1 IO_V10 518 1 Z
+bit 518 C 1 *
+bit 517 I 1 IO_N10
+bit 516 O 1 IO_N10 515 1 Z
+bit 515 C 1 *
+bit 514 I 1 IO_P10
+bit 513 O 1 IO_P10 512 1 Z
+bit 512 C 1 *
+bit 511 I 1 IO_R9
+bit 510 O 1 IO_R9 509 1 Z
+bit 509 C 1 *
+bit 508 I 1 IO_N9
+bit 507 O 1 IO_N9 506 1 Z
+bit 506 C 1 *
+bit 505 I 1 IO_P9
+bit 504 O 1 IO_P9 503 1 Z
+bit 503 C 1 *
+bit 502 I 1 IO_U9
+bit 501 O 1 IO_U9 500 1 Z
+bit 500 C 1 *
+bit 499 I 1 IO_V9
+bit 498 O 1 IO_V9 497 1 Z
+bit 497 C 1 *
+bit 496 I 1 IO_N8
+bit 495 O 1 IO_N8 494 1 Z
+bit 494 C 1 *
+bit 493 I 1 IO_R8
+bit 492 O 1 IO_R8 491 1 Z
+bit 491 C 1 *
+bit 490 I 1 IO_T8
+bit 489 O 1 IO_T8 488 1 Z
+bit 488 C 1 *
+bit 487 I 1 IO_V8
+bit 486 O 1 IO_V8 485 1 Z
+bit 485 C 1 *
+bit 484 I 1 IO_V7
+bit 483 O 1 IO_V7 482 1 Z
+bit 482 C 1 *
+bit 481 I 1 IO_P8
+bit 480 O 1 IO_P8 479 1 Z
+bit 479 C 1 *
+bit 478 I 1 IO_R7
+bit 477 O 1 IO_R7 476 1 Z
+bit 476 C 1 *
+bit 475 I 1 IO_T7
+bit 474 O 1 IO_T7 473 1 Z
+bit 473 C 1 *
+bit 472 I 1 IO_P6
+bit 471 O 1 IO_P6 470 1 Z
+bit 470 C 1 *
+bit 469 I 1 IO_P7
+bit 468 O 1 IO_P7 467 1 Z
+bit 467 C 1 *
+bit 466 I 1 IO_U6
+bit 465 O 1 IO_U6 464 1 Z
+bit 464 C 1 *
+bit 463 O 1 *
+bit 462 O 1 *
+bit 461 O 1 *
+bit 460 O 1 *
+bit 459 O 1 *
+bit 458 O 1 *
+bit 457 O 1 *
+bit 456 O 1 *
+bit 455 O 1 *
+bit 454 O 1 *
+bit 453 O 1 *
+bit 452 O 1 *
+bit 451 O 1 *
+bit 450 O 1 *
+bit 449 O 1 *
+bit 448 I 1 IO_V5
+bit 447 O 1 IO_V5 446 1 Z
+bit 446 C 1 *
+bit 445 I 1 IO_U5
+bit 444 O 1 IO_U5 443 1 Z
+bit 443 C 1 *
+bit 442 I 1 IO_R6
+bit 441 O 1 IO_R6 440 1 Z
+bit 440 C 1 *
+bit 439 I 1 IO_R5
+bit 438 O 1 IO_R5 437 1 Z
+bit 437 C 1 *
+bit 436 O 1 *
+bit 435 O 1 *
+bit 434 O 1 *
+bit 433 I 1 IO_V4
+bit 432 O 1 IO_V4 431 1 Z
+bit 431 C 1 *
+bit 430 I 1 IO_U4
+bit 429 O 1 IO_U4 428 1 Z
+bit 428 C 1 *
+bit 427 O 1 *
+bit 426 O 1 *
+bit 425 O 1 *
+bit 424 O 1 *
+bit 423 O 1 *
+bit 422 O 1 *
+bit 421 O 1 *
+bit 420 O 1 *
+bit 419 O 1 *
+bit 418 I 1 IO_T5
+bit 417 O 1 IO_T5 416 1 Z
+bit 416 C 1 *
+bit 415 I 1 IO_T4
+bit 414 O 1 IO_T4 413 1 Z
+bit 413 C 1 *
+bit 412 I 1 IO_V3
+bit 411 O 1 IO_V3 410 1 Z
+bit 410 C 1 *
+bit 409 I 1 IO_V2
+bit 408 O 1 IO_V2 407 1 Z
+bit 407 C 1 *
+bit 406 I 1 M2_R4
+bit 405 I 1 M0_P5
+bit 404 I 1 M1_U3
+bit 403 I 1 IO_T3
+bit 402 O 1 IO_T3 401 1 Z
+bit 401 C 1 *
+bit 400 I 1 IO_T2
+bit 399 O 1 IO_T2 398 1 Z
+bit 398 C 1 *
+bit 397 O 1 *
+bit 396 O 1 *
+bit 395 O 1 *
+bit 394 O 1 *
+bit 393 O 1 *
+bit 392 O 1 *
+bit 391 I 1 IO_U1
+bit 390 O 1 IO_U1 389 1 Z
+bit 389 C 1 *
+bit 388 I 1 IO_T1
+bit 387 O 1 IO_T1 386 1 Z
+bit 386 C 1 *
+bit 385 I 1 IO_R2
+bit 384 O 1 IO_R2 383 1 Z
+bit 383 C 1 *
+bit 382 I 1 IO_R1
+bit 381 O 1 IO_R1 380 1 Z
+bit 380 C 1 *
+bit 379 I 1 IO_R3
+bit 378 O 1 IO_R3 377 1 Z
+bit 377 C 1 *
+bit 376 I 1 IO_P3
+bit 375 O 1 IO_P3 374 1 Z
+bit 374 C 1 *
+bit 373 I 1 IO_P2
+bit 372 O 1 IO_P2 371 1 Z
+bit 371 C 1 *
+bit 370 I 1 IO_P1
+bit 369 O 1 IO_P1 368 1 Z
+bit 368 C 1 *
+bit 367 I 1 IO_N4
+bit 366 O 1 IO_N4 365 1 Z
+bit 365 C 1 *
+bit 364 I 1 IO_P4
+bit 363 O 1 IO_P4 362 1 Z
+bit 362 C 1 *
+bit 361 I 1 IO_N5
+bit 360 O 1 IO_N5 359 1 Z
+bit 359 C 1 *
+bit 358 I 1 IO_M5
+bit 357 O 1 IO_M5 356 1 Z
+bit 356 C 1 *
+bit 355 I 1 IO_M3
+bit 354 O 1 IO_M3 353 1 Z
+bit 353 C 1 *
+bit 352 I 1 IO_M4
+bit 351 O 1 IO_M4 350 1 Z
+bit 350 C 1 *
+bit 349 I 1 IO_N2
+bit 348 O 1 IO_N2 347 1 Z
+bit 347 C 1 *
+bit 346 I 1 IO_M1
+bit 345 O 1 IO_M1 344 1 Z
+bit 344 C 1 *
+bit 343 I 1 IO_L6
+bit 342 O 1 IO_L6 341 1 Z
+bit 341 C 1 *
+bit 340 I 1 IO_L5
+bit 339 O 1 IO_L5 338 1 Z
+bit 338 C 1 *
+bit 337 I 1 IO_L3
+bit 336 O 1 IO_L3 335 1 Z
+bit 335 C 1 *
+bit 334 I 1 IO_L4
+bit 333 O 1 IO_L4 332 1 Z
+bit 332 C 1 *
+bit 331 I 1 IO_L2
+bit 330 O 1 IO_L2 329 1 Z
+bit 329 C 1 *
+bit 328 I 1 IO_L1
+bit 327 O 1 IO_L1 326 1 Z
+bit 326 C 1 *
+bit 325 O 1 *
+bit 324 O 1 *
+bit 323 O 1 *
+bit 322 I 1 IO_K6
+bit 321 O 1 IO_K6 320 1 Z
+bit 320 C 1 *
+bit 319 I 1 IO_K5
+bit 318 O 1 IO_K5 317 1 Z
+bit 317 C 1 *
+bit 316 I 1 IO_K4
+bit 315 O 1 IO_K4 314 1 Z
+bit 314 C 1 *
+bit 313 I 1 IO_K1
+bit 312 O 1 IO_K1 311 1 Z
+bit 311 C 1 *
+bit 310 I 1 IO_K2
+bit 309 O 1 IO_K2 308 1 Z
+bit 308 C 1 *
+bit 307 I 1 IO_J5
+bit 306 O 1 IO_J5 305 1 Z
+bit 305 C 1 *
+bit 304 I 1 IO_J4
+bit 303 O 1 IO_J4 302 1 Z
+bit 302 C 1 *
+bit 301 I 1 IO_J1
+bit 300 O 1 IO_J1 299 1 Z
+bit 299 C 1 *
+bit 298 I 1 IO_J2
+bit 297 O 1 IO_J2 296 1 Z
+bit 296 C 1 *
+bit 295 I 1 IO_J6
+bit 294 O 1 IO_J6 293 1 Z
+bit 293 C 1 *
+bit 292 O 1 *
+bit 291 O 1 *
+bit 290 O 1 *
+bit 289 I 1 IO_H1
+bit 288 O 1 IO_H1 287 1 Z
+bit 287 C 1 *
+bit 286 I 1 IO_H2
+bit 285 O 1 IO_H2 284 1 Z
+bit 284 C 1 *
+bit 283 I 1 IO_H4
+bit 282 O 1 IO_H4 281 1 Z
+bit 281 C 1 *
+bit 280 I 1 IO_H3
+bit 279 O 1 IO_H3 278 1 Z
+bit 278 C 1 *
+bit 277 I 1 IO_H5
+bit 276 O 1 IO_H5 275 1 Z
+bit 275 C 1 *
+bit 274 I 1 IO_H6
+bit 273 O 1 IO_H6 272 1 Z
+bit 272 C 1 *
+bit 271 I 1 IO_G4
+bit 270 O 1 IO_G4 269 1 Z
+bit 269 C 1 *
+bit 268 I 1 IO_G3
+bit 267 O 1 IO_G3 266 1 Z
+bit 266 C 1 *
+bit 265 I 1 IO_G1
+bit 264 O 1 IO_G1 263 1 Z
+bit 263 C 1 *
+bit 262 I 1 IO_F2
+bit 261 O 1 IO_F2 260 1 Z
+bit 260 C 1 *
+bit 259 I 1 IO_G5
+bit 258 O 1 IO_G5 257 1 Z
+bit 257 C 1 *
+bit 256 I 1 IO_F5
+bit 255 O 1 IO_F5 254 1 Z
+bit 254 C 1 *
+bit 253 I 1 IO_E4
+bit 252 O 1 IO_E4 251 1 Z
+bit 251 C 1 *
+bit 250 I 1 IO_F4
+bit 249 O 1 IO_F4 248 1 Z
+bit 248 C 1 *
+bit 247 I 1 IO_E2
+bit 246 O 1 IO_E2 245 1 Z
+bit 245 C 1 *
+bit 244 I 1 IO_E1
+bit 243 O 1 IO_E1 242 1 Z
+bit 242 C 1 *
+bit 241 I 1 IO_E3
+bit 240 O 1 IO_E3 239 1 Z
+bit 239 C 1 *
+bit 238 I 1 IO_D3
+bit 237 O 1 IO_D3 236 1 Z
+bit 236 C 1 *
+bit 235 I 1 IO_D1
+bit 234 O 1 IO_D1 233 1 Z
+bit 233 C 1 *
+bit 232 I 1 IO_D2
+bit 231 O 1 IO_D2 230 1 Z
+bit 230 C 1 *
+bit 229 I 1 IO_C1
+bit 228 O 1 IO_C1 227 1 Z
+bit 227 C 1 *
+bit 226 I 1 IO_B1
+bit 225 O 1 IO_B1 224 1 Z
+bit 224 C 1 *
+bit 223 O 1 *
+bit 222 O 1 *
+bit 221 O 1 *
+bit 220 O 1 *
+bit 219 O 1 *
+bit 218 O 1 *
+bit 217 I 1 IO_C3
+bit 216 O 1 IO_C3 215 1 Z
+bit 215 C 1 *
+bit 214 I 1 IO_C2
+bit 213 O 1 IO_C2 212 1 Z
+bit 212 C 1 *
+bit 211 O 1 *
+bit 210 I 1 HSWAP_EN_E6
+bit 209 I 1 IO_B3
+bit 208 O 1 IO_B3 207 1 Z
+bit 207 C 1 *
+bit 206 I 1 IO_A2
+bit 205 O 1 IO_A2 204 1 Z
+bit 204 C 1 *
+bit 203 I 1 IO_A3
+bit 202 O 1 IO_A3 201 1 Z
+bit 201 C 1 *
+bit 200 O 1 *
+bit 199 O 1 *
+bit 198 O 1 *
+bit 197 O 1 *
+bit 196 O 1 *
+bit 195 O 1 *
+bit 194 O 1 *
+bit 193 O 1 *
+bit 192 O 1 *
+bit 191 I 1 IO_B4
+bit 190 O 1 IO_B4 189 1 Z
+bit 189 C 1 *
+bit 188 I 1 IO_C4
+bit 187 O 1 IO_C4 186 1 Z
+bit 186 C 1 *
+bit 185 I 1 IO_C5
+bit 184 O 1 IO_C5 183 1 Z
+bit 183 C 1 *
+bit 182 I 1 IO_D5
+bit 181 O 1 IO_D5 180 1 Z
+bit 180 C 1 *
+bit 179 O 1 *
+bit 178 O 1 *
+bit 177 O 1 *
+bit 176 I 1 IO_A4
+bit 175 O 1 IO_A4 174 1 Z
+bit 174 C 1 *
+bit 173 I 1 IO_A5
+bit 172 O 1 IO_A5 171 1 Z
+bit 171 C 1 *
+bit 170 O 1 *
+bit 169 O 1 *
+bit 168 O 1 *
+bit 167 O 1 *
+bit 166 O 1 *
+bit 165 O 1 *
+bit 164 I 1 IO_D6
+bit 163 O 1 IO_D6 162 1 Z
+bit 162 C 1 *
+bit 161 O 1 *
+bit 160 O 1 *
+bit 159 O 1 *
+bit 158 O 1 *
+bit 157 O 1 *
+bit 156 O 1 *
+bit 155 I 1 IO_B5
+bit 154 O 1 IO_B5 153 1 Z
+bit 153 C 1 *
+bit 152 I 1 IO_B6
+bit 151 O 1 IO_B6 150 1 Z
+bit 150 C 1 *
+bit 149 I 1 IO_E7
+bit 148 O 1 IO_E7 147 1 Z
+bit 147 C 1 *
+bit 146 I 1 IO_C7
+bit 145 O 1 IO_C7 144 1 Z
+bit 144 C 1 *
+bit 143 I 1 IO_D7
+bit 142 O 1 IO_D7 141 1 Z
+bit 141 C 1 *
+bit 140 I 1 IO_C8
+bit 139 O 1 IO_C8 138 1 Z
+bit 138 C 1 *
+bit 137 I 1 IO_D8
+bit 136 O 1 IO_D8 135 1 Z
+bit 135 C 1 *
+bit 134 O 1 *
+bit 133 O 1 *
+bit 132 O 1 *
+bit 131 I 1 IO_E8
+bit 130 O 1 IO_E8 129 1 Z
+bit 129 C 1 *
+bit 128 I 1 IO_F8
+bit 127 O 1 IO_F8 126 1 Z
+bit 126 C 1 *
+bit 125 I 1 IO_A7
+bit 124 O 1 IO_A7 123 1 Z
+bit 123 C 1 *
+bit 122 I 1 IO_A8
+bit 121 O 1 IO_A8 120 1 Z
+bit 120 C 1 *
+bit 119 I 1 IO_D9
+bit 118 O 1 IO_D9 117 1 Z
+bit 117 C 1 *
+bit 116 I 1 IO_B9
+bit 115 O 1 IO_B9 114 1 Z
+bit 114 C 1 *
+bit 113 I 1 IO_A9
+bit 112 O 1 IO_A9 111 1 Z
+bit 111 C 1 *
+bit 110 I 1 IO_E9
+bit 109 O 1 IO_E9 108 1 Z
+bit 108 C 1 *
+bit 107 I 1 IO_F9
+bit 106 O 1 IO_F9 105 1 Z
+bit 105 C 1 *
+bit 104 I 1 IO_D10
+bit 103 O 1 IO_D10 102 1 Z
+bit 102 C 1 *
+bit 101 I 1 IO_E10
+bit 100 O 1 IO_E10 99 1 Z
+bit 99 C 1 *
+bit 98 I 1 IO_F10
+bit 97 O 1 IO_F10 96 1 Z
+bit 96 C 1 *
+bit 95 I 1 IO_A10
+bit 94 O 1 IO_A10 93 1 Z
+bit 93 C 1 *
+bit 92 I 1 IO_B10
+bit 91 O 1 IO_B10 90 1 Z
+bit 90 C 1 *
+bit 89 I 1 IO_A11
+bit 88 O 1 IO_A11 87 1 Z
+bit 87 C 1 *
+bit 86 I 1 IO_C11
+bit 85 O 1 IO_C11 84 1 Z
+bit 84 C 1 *
+bit 83 I 1 IO_D11
+bit 82 O 1 IO_D11 81 1 Z
+bit 81 C 1 *
+bit 80 I 1 IO_F11
+bit 79 O 1 IO_F11 78 1 Z
+bit 78 C 1 *
+bit 77 I 1 IO_E11
+bit 76 O 1 IO_E11 75 1 Z
+bit 75 C 1 *
+bit 74 I 1 IO_A12
+bit 73 O 1 IO_A12 72 1 Z
+bit 72 C 1 *
+bit 71 I 1 IO_C12
+bit 70 O 1 IO_C12 69 1 Z
+bit 69 C 1 *
+bit 68 I 1 IO_D12
+bit 67 O 1 IO_D12 66 1 Z
+bit 66 C 1 *
+bit 65 I 1 IO_E13
+bit 64 O 1 IO_E13 63 1 Z
+bit 63 C 1 *
+bit 62 I 1 IO_E12
+bit 61 O 1 IO_E12 60 1 Z
+bit 60 C 1 *
+bit 59 I 1 IO_B13
+bit 58 O 1 IO_B13 57 1 Z
+bit 57 C 1 *
+bit 56 O 1 *
+bit 55 O 1 *
+bit 54 O 1 *
+bit 53 O 1 *
+bit 52 O 1 *
+bit 51 O 1 *
+bit 50 I 1 IO_D14
+bit 49 O 1 IO_D14 48 1 Z
+bit 48 C 1 *
+bit 47 I 1 IO_D13
+bit 46 O 1 IO_D13 45 1 Z
+bit 45 C 1 *
+bit 44 O 1 *
+bit 43 O 1 *
+bit 42 O 1 *
+bit 41 I 1 IO_A14
+bit 40 O 1 IO_A14 39 1 Z
+bit 39 C 1 *
+bit 38 I 1 IO_B14
+bit 37 O 1 IO_B14 36 1 Z
+bit 36 C 1 *
+bit 35 I 1 IO_C14
+bit 34 O 1 IO_C14 33 1 Z
+bit 33 C 1 *
+bit 32 I 1 IO_C15
+bit 31 O 1 IO_C15 30 1 Z
+bit 30 C 1 *
+bit 29 O 1 *
+bit 28 O 1 *
+bit 27 O 1 *
+bit 26 I 1 IO_A15
+bit 25 O 1 IO_A15 24 1 Z
+bit 24 C 1 *
+bit 23 I 1 IO_B15
+bit 22 O 1 IO_B15 21 1 Z
+bit 21 C 1 *
+bit 20 O 1 *
+bit 19 O 1 *
+bit 18 O 1 *
+bit 17 O 1 *
+bit 16 O 1 *
+bit 15 O 1 *
+bit 14 O 1 *
+bit 13 O 1 *
+bit 12 O 1 *
+bit 11 O 1 *
+bit 10 O 1 *
+bit 9 O 1 *
+bit 8 O 1 *
+bit 7 O 1 *
+bit 6 O 1 *
+bit 5 I 1 IO_A16
+bit 4 O 1 IO_A16 3 1 Z
+bit 3 C 1 *
+bit 2 I 1 IO_A17
+bit 1 O 1 IO_A17 0 1 Z
+bit 0 C 1 *
--- /dev/null
+signal GND1
+signal GND2
+signal GND3
+signal GND4
+signal GND5
+signal GND6
+signal GND7
+signal GND8
+signal GND9
+signal GND10
+signal GND11
+signal GND12
+signal GND13
+signal GND14
+signal GND15
+signal GND16
+signal GND17
+signal GND18
+signal GND19
+signal GND20
+signal GND21
+signal GND22
+signal GND23
+signal GND24
+signal GND25
+signal GND26
+signal GND27
+signal GND28
+signal GND29
+signal GND30
+signal GND31
+signal GND32
+signal GND33
+signal GND34
+signal GND35
+signal GND36
+signal GND37
+signal GND38
+signal GND39
+signal GND40
+signal GND41
+signal GND42
+signal GND43
+signal GND44
+signal GND45
+signal GND46
+signal GND47
+signal GND48
+signal GND49
+signal GND50
+signal GND51
+signal GND52
+signal CCLK_AA22
+signal DONE_AB21
+signal HSWAP_EN_B3
+signal M0_AB2
+signal M1_AA1
+signal M2_AB3
+signal PROG_B
+signal TCK
+signal TDI
+signal TDO
+signal TMS
+signal VCCAUX1
+signal VCCAUX2
+signal VCCAUX3
+signal VCCAUX4
+signal VCCAUX5
+signal VCCAUX6
+signal VCCAUX7
+signal VCCAUX8
+signal VCCINT1
+signal VCCINT2
+signal VCCINT3
+signal VCCINT4
+signal VCCINT5
+signal VCCINT6
+signal VCCINT7
+signal VCCINT8
+signal VCCINT9
+signal VCCINT10
+signal VCCINT11
+signal VCCINT12
+signal VCCO01
+signal VCCO02
+signal VCCO03
+signal VCCO04
+signal VCCO05
+signal VCCO11
+signal VCCO12
+signal VCCO13
+signal VCCO14
+signal VCCO15
+signal VCCO21
+signal VCCO22
+signal VCCO23
+signal VCCO24
+signal VCCO25
+signal VCCO31
+signal VCCO32
+signal VCCO33
+signal VCCO34
+signal VCCO35
+signal VCCO41
+signal VCCO42
+signal VCCO43
+signal VCCO44
+signal VCCO45
+signal VCCO51
+signal VCCO52
+signal VCCO53
+signal VCCO54
+signal VCCO55
+signal VCCO61
+signal VCCO62
+signal VCCO63
+signal VCCO64
+signal VCCO65
+signal VCCO71
+signal VCCO72
+signal VCCO73
+signal VCCO74
+signal VCCO75
+signal IO_A3
+signal IO_A4
+signal IO_A5
+signal IO_A8
+signal IO_A9
+signal IO_A10
+signal IO_A11
+signal IO_A12
+signal IO_A13
+signal IO_A14
+signal IO_A15
+signal IO_A18
+signal IO_A19
+signal IO_B4
+signal IO_B5
+signal IO_B6
+signal IO_B8
+signal IO_B9
+signal IO_B10
+signal IO_B11
+signal IO_B12
+signal IO_B13
+signal IO_B14
+signal IO_B15
+signal IO_B17
+signal IO_B18
+signal IO_B19
+signal IO_B20
+signal IO_C1
+signal IO_C2
+signal IO_C3
+signal IO_C4
+signal IO_C5
+signal IO_C6
+signal IO_C7
+signal IO_C10
+signal IO_C11
+signal IO_C12
+signal IO_C13
+signal IO_C17
+signal IO_C18
+signal IO_C19
+signal IO_C20
+signal IO_C21
+signal IO_C22
+signal IO_D1
+signal IO_D2
+signal IO_D3
+signal IO_D4
+signal IO_D5
+signal IO_D6
+signal IO_D7
+signal IO_D9
+signal IO_D10
+signal IO_D11
+signal IO_D12
+signal IO_D13
+signal IO_D14
+signal IO_D15
+signal IO_D17
+signal IO_D18
+signal IO_D19
+signal IO_D20
+signal IO_D21
+signal IO_D22
+signal IO_E1
+signal IO_E2
+signal IO_E3
+signal IO_E4
+signal IO_E6
+signal IO_E7
+signal IO_E9
+signal IO_E10
+signal IO_E11
+signal IO_E12
+signal IO_E13
+signal IO_E14
+signal IO_E15
+signal IO_E16
+signal IO_E17
+signal IO_E18
+signal IO_E19
+signal IO_E20
+signal IO_E21
+signal IO_E22
+signal IO_F2
+signal IO_F3
+signal IO_F4
+signal IO_F5
+signal IO_F6
+signal IO_F7
+signal IO_F9
+signal IO_F10
+signal IO_F11
+signal IO_F12
+signal IO_F13
+signal IO_F16
+signal IO_F17
+signal IO_F18
+signal IO_F19
+signal IO_F20
+signal IO_F21
+signal IO_G1
+signal IO_G2
+signal IO_G5
+signal IO_G6
+signal IO_G17
+signal IO_G18
+signal IO_G19
+signal IO_G21
+signal IO_G22
+signal IO_H5
+signal IO_K1
+signal IO_K2
+signal IO_K3
+signal IO_K4
+signal IO_K19
+signal IO_K20
+signal IO_K21
+signal IO_K22
+signal IO_L1
+signal IO_L2
+signal IO_L3
+signal IO_L4
+signal IO_L5
+signal IO_L6
+signal IO_L17
+signal IO_L18
+signal IO_L19
+signal IO_L20
+signal IO_L21
+signal IO_L22
+signal IO_M1
+signal IO_M2
+signal IO_M3
+signal IO_M4
+signal IO_M5
+signal IO_M6
+signal IO_M17
+signal IO_M18
+signal IO_M19
+signal IO_M20
+signal IO_M21
+signal IO_M22
+signal IO_N1
+signal IO_N2
+signal IO_N3
+signal IO_N4
+signal IO_N19
+signal IO_N20
+signal IO_N21
+signal IO_N22
+signal IO_R18
+signal IO_T1
+signal IO_T2
+signal IO_T4
+signal IO_T5
+signal IO_T6
+signal IO_T17
+signal IO_T18
+signal IO_T21
+signal IO_T22
+signal IO_U2
+signal IO_U3
+signal IO_U4
+signal IO_U5
+signal IO_U6
+signal IO_U7
+signal IO_U10
+signal IO_U11
+signal IO_U12
+signal IO_U13
+signal IO_U14
+signal IO_U16
+signal IO_U17
+signal IO_U18
+signal IO_U19
+signal IO_U20
+signal IO_U21
+signal IO_V1
+signal IO_V2
+signal IO_V3
+signal IO_V4
+signal IO_V5
+signal IO_V6
+signal IO_V7
+signal IO_V8
+signal IO_V9
+signal IO_V10
+signal IO_V11
+signal IO_V12
+signal IO_V13
+signal IO_V14
+signal IO_V16
+signal IO_V17
+signal IO_V18
+signal IO_V19
+signal IO_V20
+signal IO_V21
+signal IO_V22
+signal IO_W1
+signal IO_W2
+signal IO_W3
+signal IO_W4
+signal IO_W5
+signal IO_W6
+signal IO_W8
+signal IO_W9
+signal IO_W10
+signal IO_W11
+signal IO_W12
+signal IO_W13
+signal IO_W14
+signal IO_W16
+signal IO_W17
+signal IO_W18
+signal IO_W19
+signal IO_W20
+signal IO_W21
+signal IO_W22
+signal IO_Y1
+signal IO_Y2
+signal IO_Y3
+signal IO_Y4
+signal IO_Y5
+signal IO_Y6
+signal IO_Y10
+signal IO_Y11
+signal IO_Y12
+signal IO_Y13
+signal IO_Y16
+signal IO_Y17
+signal IO_Y18
+signal IO_Y19
+signal IO_Y20
+signal IO_Y21
+signal IO_Y22
+signal IO_AA3
+signal IO_AA4
+signal IO_AA5
+signal IO_AA6
+signal IO_AA8
+signal IO_AA9
+signal IO_AA10
+signal IO_AA11
+signal IO_AA12
+signal IO_AA13
+signal IO_AA14
+signal IO_AA15
+signal IO_AA17
+signal IO_AA18
+signal IO_AA20
+signal IO_AB4
+signal IO_AB5
+signal IO_AB8
+signal IO_AB9
+signal IO_AB10
+signal IO_AB11
+signal IO_AB12
+signal IO_AB13
+signal IO_AB14
+signal IO_AB15
+signal IO_AB18
+
+register BSR 815
+register BR 1
+register DIR 32
+
+instruction length 6
+
+instruction EXTEST 000000 BSR
+instruction SAMPLE/PRELOAD 000001 BSR
+instruction IDCODE 001001 DIR
+instruction BYPASS 111111 BR
+
+bit 814 I 1 IO_C20
+bit 813 O 1 IO_C20 812 1 Z
+bit 812 C 1 *
+bit 811 I 1 IO_C21
+bit 810 O 1 IO_C21 809 1 Z
+bit 809 C 1 *
+bit 808 O 1 *
+bit 807 O 1 *
+bit 806 O 1 *
+bit 805 I 1 IO_C22
+bit 804 O 1 IO_C22 803 1 Z
+bit 803 C 1 *
+bit 802 I 1 IO_D20
+bit 801 O 1 IO_D20 800 1 Z
+bit 800 C 1 *
+bit 799 I 1 IO_D19
+bit 798 O 1 IO_D19 797 1 Z
+bit 797 C 1 *
+bit 796 I 1 IO_D21
+bit 795 O 1 IO_D21 794 1 Z
+bit 794 C 1 *
+bit 793 I 1 IO_D22
+bit 792 O 1 IO_D22 791 1 Z
+bit 791 C 1 *
+bit 790 I 1 IO_E18
+bit 789 O 1 IO_E18 788 1 Z
+bit 788 C 1 *
+bit 787 I 1 IO_F18
+bit 786 O 1 IO_F18 785 1 Z
+bit 785 C 1 *
+bit 784 I 1 IO_E19
+bit 783 O 1 IO_E19 782 1 Z
+bit 782 C 1 *
+bit 781 I 1 IO_E20
+bit 780 O 1 IO_E20 779 1 Z
+bit 779 C 1 *
+bit 778 I 1 IO_E21
+bit 777 O 1 IO_E21 776 1 Z
+bit 776 C 1 *
+bit 775 I 1 IO_E22
+bit 774 O 1 IO_E22 773 1 Z
+bit 773 C 1 *
+bit 772 I 1 IO_G17
+bit 771 O 1 IO_G17 770 1 Z
+bit 770 C 1 *
+bit 769 I 1 IO_G18
+bit 768 O 1 IO_G18 767 1 Z
+bit 767 C 1 *
+bit 766 I 1 IO_F19
+bit 765 O 1 IO_F19 764 1 Z
+bit 764 C 1 *
+bit 763 I 1 IO_G19
+bit 762 O 1 IO_G19 761 1 Z
+bit 761 C 1 *
+bit 760 I 1 IO_F20
+bit 759 O 1 IO_F20 758 1 Z
+bit 758 C 1 *
+bit 757 I 1 IO_F21
+bit 756 O 1 IO_F21 755 1 Z
+bit 755 C 1 *
+bit 754 I 1 IO_G21
+bit 753 O 1 IO_G21 752 1 Z
+bit 752 C 1 *
+bit 751 I 1 IO_G22
+bit 750 O 1 IO_G22 749 1 Z
+bit 749 C 1 *
+bit 748 I 1 IO_K19
+bit 747 O 1 IO_K19 746 1 Z
+bit 746 C 1 *
+bit 745 I 1 IO_K20
+bit 744 O 1 IO_K20 743 1 Z
+bit 743 C 1 *
+bit 742 I 1 IO_K21
+bit 741 O 1 IO_K21 740 1 Z
+bit 740 C 1 *
+bit 739 I 1 IO_K22
+bit 738 O 1 IO_K22 737 1 Z
+bit 737 C 1 *
+bit 736 I 1 IO_L17
+bit 735 O 1 IO_L17 734 1 Z
+bit 734 C 1 *
+bit 733 I 1 IO_L18
+bit 732 O 1 IO_L18 731 1 Z
+bit 731 C 1 *
+bit 730 I 1 IO_L19
+bit 729 O 1 IO_L19 728 1 Z
+bit 728 C 1 *
+bit 727 I 1 IO_L20
+bit 726 O 1 IO_L20 725 1 Z
+bit 725 C 1 *
+bit 724 I 1 IO_L21
+bit 723 O 1 IO_L21 722 1 Z
+bit 722 C 1 *
+bit 721 I 1 IO_L22
+bit 720 O 1 IO_L22 719 1 Z
+bit 719 C 1 *
+bit 718 I 1 IO_M22
+bit 717 O 1 IO_M22 716 1 Z
+bit 716 C 1 *
+bit 715 I 1 IO_M21
+bit 714 O 1 IO_M21 713 1 Z
+bit 713 C 1 *
+bit 712 I 1 IO_M20
+bit 711 O 1 IO_M20 710 1 Z
+bit 710 C 1 *
+bit 709 I 1 IO_M19
+bit 708 O 1 IO_M19 707 1 Z
+bit 707 C 1 *
+bit 706 I 1 IO_M18
+bit 705 O 1 IO_M18 704 1 Z
+bit 704 C 1 *
+bit 703 I 1 IO_M17
+bit 702 O 1 IO_M17 701 1 Z
+bit 701 C 1 *
+bit 700 I 1 IO_N22
+bit 699 O 1 IO_N22 698 1 Z
+bit 698 C 1 *
+bit 697 I 1 IO_N21
+bit 696 O 1 IO_N21 695 1 Z
+bit 695 C 1 *
+bit 694 I 1 IO_N20
+bit 693 O 1 IO_N20 692 1 Z
+bit 692 C 1 *
+bit 691 I 1 IO_N19
+bit 690 O 1 IO_N19 689 1 Z
+bit 689 C 1 *
+bit 688 I 1 IO_T22
+bit 687 O 1 IO_T22 686 1 Z
+bit 686 C 1 *
+bit 685 I 1 IO_T21
+bit 684 O 1 IO_T21 683 1 Z
+bit 683 C 1 *
+bit 682 I 1 IO_R18
+bit 681 O 1 IO_R18 680 1 Z
+bit 680 C 1 *
+bit 679 I 1 IO_T18
+bit 678 O 1 IO_T18 677 1 Z
+bit 677 C 1 *
+bit 676 I 1 IO_U21
+bit 675 O 1 IO_U21 674 1 Z
+bit 674 C 1 *
+bit 673 I 1 IO_U20
+bit 672 O 1 IO_U20 671 1 Z
+bit 671 C 1 *
+bit 670 I 1 IO_T17
+bit 669 O 1 IO_T17 668 1 Z
+bit 668 C 1 *
+bit 667 I 1 IO_U18
+bit 666 O 1 IO_U18 665 1 Z
+bit 665 C 1 *
+bit 664 I 1 IO_V22
+bit 663 O 1 IO_V22 662 1 Z
+bit 662 C 1 *
+bit 661 I 1 IO_V21
+bit 660 O 1 IO_V21 659 1 Z
+bit 659 C 1 *
+bit 658 I 1 IO_U19
+bit 657 O 1 IO_U19 656 1 Z
+bit 656 C 1 *
+bit 655 I 1 IO_V20
+bit 654 O 1 IO_V20 653 1 Z
+bit 653 C 1 *
+bit 652 I 1 IO_W21
+bit 651 O 1 IO_W21 650 1 Z
+bit 650 C 1 *
+bit 649 I 1 IO_W20
+bit 648 O 1 IO_W20 647 1 Z
+bit 647 C 1 *
+bit 646 I 1 IO_V19
+bit 645 O 1 IO_V19 644 1 Z
+bit 644 C 1 *
+bit 643 I 1 IO_W19
+bit 642 O 1 IO_W19 641 1 Z
+bit 641 C 1 *
+bit 640 I 1 IO_W22
+bit 639 O 1 IO_W22 638 1 Z
+bit 638 C 1 *
+bit 637 I 1 IO_Y22
+bit 636 O 1 IO_Y22 635 1 Z
+bit 635 C 1 *
+bit 634 I 1 IO_Y21
+bit 633 O 1 IO_Y21 632 1 Z
+bit 632 C 1 *
+bit 631 O 1 *
+bit 630 O 1 *
+bit 629 O 1 *
+bit 628 I 1 IO_Y20
+bit 627 O 1 IO_Y20 626 1 Z
+bit 626 C 1 *
+bit 625 I 1 IO_Y19
+bit 624 O 1 IO_Y19 623 1 Z
+bit 623 C 1 *
+bit 622 I 1 CCLK_AA22
+bit 621 O 1 CCLK_AA22 620 1 Z
+bit 620 C 1 *
+bit 619 I 1 DONE_AB21
+bit 618 O 1 DONE_AB21 617 1 Z
+bit 617 C 1 *
+bit 616 I 1 IO_V18
+bit 615 O 1 IO_V18 614 1 Z
+bit 614 C 1 *
+bit 613 I 1 IO_AA20
+bit 612 O 1 IO_AA20 611 1 Z
+bit 611 C 1 *
+bit 610 I 1 IO_AB20
+bit 609 O 1 IO_AB20 608 1 Z
+bit 608 C 1 *
+bit 607 I 1 IO_W18
+bit 606 O 1 IO_W18 605 1 Z
+bit 605 C 1 *
+bit 604 I 1 IO_Y18
+bit 603 O 1 IO_Y18 602 1 Z
+bit 602 C 1 *
+bit 601 I 1 IO_U17
+bit 600 O 1 IO_U17 599 1 Z
+bit 599 C 1 *
+bit 598 I 1 IO_AA18
+bit 597 O 1 IO_AA18 596 1 Z
+bit 596 C 1 *
+bit 595 I 1 IO_AB18
+bit 594 O 1 IO_AB18 593 1 Z
+bit 593 C 1 *
+bit 592 I 1 IO_V17
+bit 591 O 1 IO_V17 590 1 Z
+bit 590 C 1 *
+bit 589 I 1 IO_W17
+bit 588 O 1 IO_W17 587 1 Z
+bit 587 C 1 *
+bit 586 I 1 IO_U16
+bit 585 O 1 IO_U16 584 1 Z
+bit 584 C 1 *
+bit 583 I 1 IO_Y17
+bit 582 O 1 IO_Y17 581 1 Z
+bit 581 C 1 *
+bit 580 I 1 IO_AA17
+bit 579 O 1 IO_AA17 578 1 Z
+bit 578 C 1 *
+bit 577 I 1 IO_V16
+bit 576 O 1 IO_V16 575 1 Z
+bit 575 C 1 *
+bit 574 I 1 IO_W16
+bit 573 O 1 IO_W16 572 1 Z
+bit 572 C 1 *
+bit 571 I 1 IO_Y16
+bit 570 O 1 IO_Y16 569 1 Z
+bit 569 C 1 *
+bit 568 I 1 IO_AA15
+bit 567 O 1 IO_AA15 566 1 Z
+bit 566 C 1 *
+bit 565 I 1 IO_AB15
+bit 564 O 1 IO_AB15 563 1 Z
+bit 563 C 1 *
+bit 562 I 1 IO_U14
+bit 561 O 1 IO_U14 560 1 Z
+bit 560 C 1 *
+bit 559 I 1 IO_V14
+bit 558 O 1 IO_V14 557 1 Z
+bit 557 C 1 *
+bit 556 I 1 IO_W14
+bit 555 O 1 IO_W14 554 1 Z
+bit 554 C 1 *
+bit 553 I 1 IO_AA14
+bit 552 O 1 IO_AA14 551 1 Z
+bit 551 C 1 *
+bit 550 I 1 IO_AB14
+bit 549 O 1 IO_AB14 548 1 Z
+bit 548 C 1 *
+bit 547 I 1 IO_U13
+bit 546 O 1 IO_U13 545 1 Z
+bit 545 C 1 *
+bit 544 I 1 IO_V13
+bit 543 O 1 IO_V13 542 1 Z
+bit 542 C 1 *
+bit 541 I 1 IO_W13
+bit 540 O 1 IO_W13 539 1 Z
+bit 539 C 1 *
+bit 538 I 1 IO_Y13
+bit 537 O 1 IO_Y13 536 1 Z
+bit 536 C 1 *
+bit 535 I 1 IO_AA13
+bit 534 O 1 IO_AA13 533 1 Z
+bit 533 C 1 *
+bit 532 I 1 IO_U12
+bit 531 O 1 IO_U12 530 1 Z
+bit 530 C 1 *
+bit 529 I 1 IO_V12
+bit 528 O 1 IO_V12 527 1 Z
+bit 527 C 1 *
+bit 526 I 1 IO_AB13
+bit 525 O 1 IO_AB13 524 1 Z
+bit 524 C 1 *
+bit 523 I 1 IO_W12
+bit 522 O 1 IO_W12 521 1 Z
+bit 521 C 1 *
+bit 520 I 1 IO_Y12
+bit 519 O 1 IO_Y12 518 1 Z
+bit 518 C 1 *
+bit 517 I 1 IO_AA12
+bit 516 O 1 IO_AA12 515 1 Z
+bit 515 C 1 *
+bit 514 I 1 IO_AB12
+bit 513 O 1 IO_AB12 512 1 Z
+bit 512 C 1 *
+bit 511 I 1 IO_AB11
+bit 510 O 1 IO_AB11 509 1 Z
+bit 509 C 1 *
+bit 508 I 1 IO_AA11
+bit 507 O 1 IO_AA11 506 1 Z
+bit 506 C 1 *
+bit 505 I 1 IO_Y11
+bit 504 O 1 IO_Y11 503 1 Z
+bit 503 C 1 *
+bit 502 I 1 IO_W11
+bit 501 O 1 IO_W11 500 1 Z
+bit 500 C 1 *
+bit 499 I 1 IO_V11
+bit 498 O 1 IO_V11 497 1 Z
+bit 497 C 1 *
+bit 496 I 1 IO_U11
+bit 495 O 1 IO_U11 494 1 Z
+bit 494 C 1 *
+bit 493 I 1 IO_AB10
+bit 492 O 1 IO_AB10 491 1 Z
+bit 491 C 1 *
+bit 490 I 1 IO_AA10
+bit 489 O 1 IO_AA10 488 1 Z
+bit 488 C 1 *
+bit 487 I 1 IO_Y10
+bit 486 O 1 IO_Y10 485 1 Z
+bit 485 C 1 *
+bit 484 I 1 IO_W10
+bit 483 O 1 IO_W10 482 1 Z
+bit 482 C 1 *
+bit 481 I 1 IO_V10
+bit 480 O 1 IO_V10 479 1 Z
+bit 479 C 1 *
+bit 478 I 1 IO_AB9
+bit 477 O 1 IO_AB9 476 1 Z
+bit 476 C 1 *
+bit 475 I 1 IO_AA9
+bit 474 O 1 IO_AA9 473 1 Z
+bit 473 C 1 *
+bit 472 I 1 IO_W9
+bit 471 O 1 IO_W9 470 1 Z
+bit 470 C 1 *
+bit 469 I 1 IO_V9
+bit 468 O 1 IO_V9 467 1 Z
+bit 467 C 1 *
+bit 466 I 1 IO_U10
+bit 465 O 1 IO_U10 464 1 Z
+bit 464 C 1 *
+bit 463 I 1 IO_AB8
+bit 462 O 1 IO_AB8 461 1 Z
+bit 461 C 1 *
+bit 460 I 1 IO_AA8
+bit 459 O 1 IO_AA8 458 1 Z
+bit 458 C 1 *
+bit 457 I 1 IO_W8
+bit 456 O 1 IO_W8 455 1 Z
+bit 455 C 1 *
+bit 454 I 1 IO_V8
+bit 453 O 1 IO_V8 452 1 Z
+bit 452 C 1 *
+bit 451 I 1 IO_V7
+bit 450 O 1 IO_V7 449 1 Z
+bit 449 C 1 *
+bit 448 I 1 IO_AA6
+bit 447 O 1 IO_AA6 446 1 Z
+bit 446 C 1 *
+bit 445 I 1 IO_Y6
+bit 444 O 1 IO_Y6 443 1 Z
+bit 443 C 1 *
+bit 442 I 1 IO_W6
+bit 441 O 1 IO_W6 440 1 Z
+bit 440 C 1 *
+bit 439 I 1 IO_V6
+bit 438 O 1 IO_V6 437 1 Z
+bit 437 C 1 *
+bit 436 I 1 IO_U7
+bit 435 O 1 IO_U7 434 1 Z
+bit 434 C 1 *
+bit 433 I 1 IO_AB5
+bit 432 O 1 IO_AB5 431 1 Z
+bit 431 C 1 *
+bit 430 I 1 IO_AA5
+bit 429 O 1 IO_AA5 428 1 Z
+bit 428 C 1 *
+bit 427 I 1 IO_Y5
+bit 426 O 1 IO_Y5 425 1 Z
+bit 425 C 1 *
+bit 424 I 1 IO_W5
+bit 423 O 1 IO_W5 422 1 Z
+bit 422 C 1 *
+bit 421 I 1 IO_U6
+bit 420 O 1 IO_U6 419 1 Z
+bit 419 C 1 *
+bit 418 I 1 IO_AB4
+bit 417 O 1 IO_AB4 416 1 Z
+bit 416 C 1 *
+bit 415 I 1 IO_AA4
+bit 414 O 1 IO_AA4 413 1 Z
+bit 413 C 1 *
+bit 412 I 1 IO_Y4
+bit 411 O 1 IO_Y4 410 1 Z
+bit 410 C 1 *
+bit 409 I 1 IO_AA3
+bit 408 O 1 IO_AA3 407 1 Z
+bit 407 C 1 *
+bit 406 I 1 M2_AB3
+bit 405 I 1 M0_AB2
+bit 404 I 1 M1_AA1
+bit 403 I 1 IO_Y3
+bit 402 O 1 IO_Y3 401 1 Z
+bit 401 C 1 *
+bit 400 I 1 IO_Y2
+bit 399 O 1 IO_Y2 398 1 Z
+bit 398 C 1 *
+bit 397 O 1 *
+bit 396 O 1 *
+bit 395 O 1 *
+bit 394 I 1 IO_Y1
+bit 393 O 1 IO_Y1 392 1 Z
+bit 392 C 1 *
+bit 391 I 1 IO_W4
+bit 390 O 1 IO_W4 389 1 Z
+bit 389 C 1 *
+bit 388 I 1 IO_W3
+bit 387 O 1 IO_W3 386 1 Z
+bit 386 C 1 *
+bit 385 I 1 IO_W2
+bit 384 O 1 IO_W2 383 1 Z
+bit 383 C 1 *
+bit 382 I 1 IO_W1
+bit 381 O 1 IO_W1 380 1 Z
+bit 380 C 1 *
+bit 379 I 1 IO_V5
+bit 378 O 1 IO_V5 377 1 Z
+bit 377 C 1 *
+bit 376 I 1 IO_U5
+bit 375 O 1 IO_U5 374 1 Z
+bit 374 C 1 *
+bit 373 I 1 IO_V4
+bit 372 O 1 IO_V4 371 1 Z
+bit 371 C 1 *
+bit 370 I 1 IO_V3
+bit 369 O 1 IO_V3 368 1 Z
+bit 368 C 1 *
+bit 367 I 1 IO_V2
+bit 366 O 1 IO_V2 365 1 Z
+bit 365 C 1 *
+bit 364 I 1 IO_V1
+bit 363 O 1 IO_V1 362 1 Z
+bit 362 C 1 *
+bit 361 I 1 IO_T6
+bit 360 O 1 IO_T6 359 1 Z
+bit 359 C 1 *
+bit 358 I 1 IO_T5
+bit 357 O 1 IO_T5 356 1 Z
+bit 356 C 1 *
+bit 355 I 1 IO_U4
+bit 354 O 1 IO_U4 353 1 Z
+bit 353 C 1 *
+bit 352 I 1 IO_T4
+bit 351 O 1 IO_T4 350 1 Z
+bit 350 C 1 *
+bit 349 I 1 IO_U3
+bit 348 O 1 IO_U3 347 1 Z
+bit 347 C 1 *
+bit 346 I 1 IO_U2
+bit 345 O 1 IO_U2 344 1 Z
+bit 344 C 1 *
+bit 343 I 1 IO_T2
+bit 342 O 1 IO_T2 341 1 Z
+bit 341 C 1 *
+bit 340 I 1 IO_T1
+bit 339 O 1 IO_T1 338 1 Z
+bit 338 C 1 *
+bit 337 I 1 IO_N4
+bit 336 O 1 IO_N4 335 1 Z
+bit 335 C 1 *
+bit 334 I 1 IO_N3
+bit 333 O 1 IO_N3 332 1 Z
+bit 332 C 1 *
+bit 331 I 1 IO_N2
+bit 330 O 1 IO_N2 329 1 Z
+bit 329 C 1 *
+bit 328 I 1 IO_N1
+bit 327 O 1 IO_N1 326 1 Z
+bit 326 C 1 *
+bit 325 I 1 IO_M6
+bit 324 O 1 IO_M6 323 1 Z
+bit 323 C 1 *
+bit 322 I 1 IO_M5
+bit 321 O 1 IO_M5 320 1 Z
+bit 320 C 1 *
+bit 319 I 1 IO_M4
+bit 318 O 1 IO_M4 317 1 Z
+bit 317 C 1 *
+bit 316 I 1 IO_M3
+bit 315 O 1 IO_M3 314 1 Z
+bit 314 C 1 *
+bit 313 I 1 IO_M2
+bit 312 O 1 IO_M2 311 1 Z
+bit 311 C 1 *
+bit 310 I 1 IO_M1
+bit 309 O 1 IO_M1 308 1 Z
+bit 308 C 1 *
+bit 307 I 1 IO_L1
+bit 306 O 1 IO_L1 305 1 Z
+bit 305 C 1 *
+bit 304 I 1 IO_L2
+bit 303 O 1 IO_L2 302 1 Z
+bit 302 C 1 *
+bit 301 I 1 IO_L3
+bit 300 O 1 IO_L3 299 1 Z
+bit 299 C 1 *
+bit 298 I 1 IO_L4
+bit 297 O 1 IO_L4 296 1 Z
+bit 296 C 1 *
+bit 295 I 1 IO_L5
+bit 294 O 1 IO_L5 293 1 Z
+bit 293 C 1 *
+bit 292 I 1 IO_L6
+bit 291 O 1 IO_L6 290 1 Z
+bit 290 C 1 *
+bit 289 I 1 IO_K1
+bit 288 O 1 IO_K1 287 1 Z
+bit 287 C 1 *
+bit 286 I 1 IO_K2
+bit 285 O 1 IO_K2 284 1 Z
+bit 284 C 1 *
+bit 283 I 1 IO_K3
+bit 282 O 1 IO_K3 281 1 Z
+bit 281 C 1 *
+bit 280 I 1 IO_K4
+bit 279 O 1 IO_K4 278 1 Z
+bit 278 C 1 *
+bit 277 I 1 IO_G1
+bit 276 O 1 IO_G1 275 1 Z
+bit 275 C 1 *
+bit 274 I 1 IO_G2
+bit 273 O 1 IO_G2 272 1 Z
+bit 272 C 1 *
+bit 271 I 1 IO_H5
+bit 270 O 1 IO_H5 269 1 Z
+bit 269 C 1 *
+bit 268 I 1 IO_G5
+bit 267 O 1 IO_G5 266 1 Z
+bit 266 C 1 *
+bit 265 I 1 IO_F2
+bit 264 O 1 IO_F2 263 1 Z
+bit 263 C 1 *
+bit 262 I 1 IO_F3
+bit 261 O 1 IO_F3 260 1 Z
+bit 260 C 1 *
+bit 259 I 1 IO_G6
+bit 258 O 1 IO_G6 257 1 Z
+bit 257 C 1 *
+bit 256 I 1 IO_F5
+bit 255 O 1 IO_F5 254 1 Z
+bit 254 C 1 *
+bit 253 I 1 IO_E1
+bit 252 O 1 IO_E1 251 1 Z
+bit 251 C 1 *
+bit 250 I 1 IO_E2
+bit 249 O 1 IO_E2 248 1 Z
+bit 248 C 1 *
+bit 247 I 1 IO_F4
+bit 246 O 1 IO_F4 245 1 Z
+bit 245 C 1 *
+bit 244 I 1 IO_E3
+bit 243 O 1 IO_E3 242 1 Z
+bit 242 C 1 *
+bit 241 I 1 IO_D3
+bit 240 O 1 IO_D3 239 1 Z
+bit 239 C 1 *
+bit 238 I 1 IO_D2
+bit 237 O 1 IO_D2 236 1 Z
+bit 236 C 1 *
+bit 235 I 1 IO_E4
+bit 234 O 1 IO_E4 233 1 Z
+bit 233 C 1 *
+bit 232 I 1 IO_D4
+bit 231 O 1 IO_D4 230 1 Z
+bit 230 C 1 *
+bit 229 I 1 IO_D1
+bit 228 O 1 IO_D1 227 1 Z
+bit 227 C 1 *
+bit 226 I 1 IO_C1
+bit 225 O 1 IO_C1 224 1 Z
+bit 224 C 1 *
+bit 223 I 1 IO_C2
+bit 222 O 1 IO_C2 221 1 Z
+bit 221 C 1 *
+bit 220 O 1 *
+bit 219 O 1 *
+bit 218 O 1 *
+bit 217 I 1 IO_C3
+bit 216 O 1 IO_C3 215 1 Z
+bit 215 C 1 *
+bit 214 I 1 IO_C4
+bit 213 O 1 IO_C4 212 1 Z
+bit 212 C 1 *
+bit 211 O 1 *
+bit 210 I 1 HSWAP_EN_B3
+bit 209 I 1 IO_A3
+bit 208 O 1 IO_A3 207 1 Z
+bit 207 C 1 *
+bit 206 I 1 IO_B4
+bit 205 O 1 IO_B4 204 1 Z
+bit 204 C 1 *
+bit 203 I 1 IO_A4
+bit 202 O 1 IO_A4 201 1 Z
+bit 201 C 1 *
+bit 200 I 1 IO_D5
+bit 199 O 1 IO_D5 198 1 Z
+bit 198 C 1 *
+bit 197 I 1 IO_C5
+bit 196 O 1 IO_C5 195 1 Z
+bit 195 C 1 *
+bit 194 I 1 IO_F6
+bit 193 O 1 IO_F6 192 1 Z
+bit 192 C 1 *
+bit 191 I 1 IO_B5
+bit 190 O 1 IO_B5 189 1 Z
+bit 189 C 1 *
+bit 188 I 1 IO_A5
+bit 187 O 1 IO_A5 186 1 Z
+bit 186 C 1 *
+bit 185 I 1 IO_E6
+bit 184 O 1 IO_E6 183 1 Z
+bit 183 C 1 *
+bit 182 I 1 IO_D6
+bit 181 O 1 IO_D6 180 1 Z
+bit 180 C 1 *
+bit 179 I 1 IO_F7
+bit 178 O 1 IO_F7 177 1 Z
+bit 177 C 1 *
+bit 176 I 1 IO_C6
+bit 175 O 1 IO_C6 174 1 Z
+bit 174 C 1 *
+bit 173 I 1 IO_B6
+bit 172 O 1 IO_B6 171 1 Z
+bit 171 C 1 *
+bit 170 I 1 IO_E7
+bit 169 O 1 IO_E7 168 1 Z
+bit 168 C 1 *
+bit 167 I 1 IO_D7
+bit 166 O 1 IO_D7 165 1 Z
+bit 165 C 1 *
+bit 164 I 1 IO_C7
+bit 163 O 1 IO_C7 162 1 Z
+bit 162 C 1 *
+bit 161 I 1 IO_B8
+bit 160 O 1 IO_B8 159 1 Z
+bit 159 C 1 *
+bit 158 I 1 IO_A8
+bit 157 O 1 IO_A8 156 1 Z
+bit 156 C 1 *
+bit 155 I 1 IO_F9
+bit 154 O 1 IO_F9 153 1 Z
+bit 153 C 1 *
+bit 152 I 1 IO_E9
+bit 151 O 1 IO_E9 150 1 Z
+bit 150 C 1 *
+bit 149 I 1 IO_D9
+bit 148 O 1 IO_D9 147 1 Z
+bit 147 C 1 *
+bit 146 I 1 IO_B9
+bit 145 O 1 IO_B9 144 1 Z
+bit 144 C 1 *
+bit 143 I 1 IO_A9
+bit 142 O 1 IO_A9 141 1 Z
+bit 141 C 1 *
+bit 140 I 1 IO_F10
+bit 139 O 1 IO_F10 138 1 Z
+bit 138 C 1 *
+bit 137 I 1 IO_E10
+bit 136 O 1 IO_E10 135 1 Z
+bit 135 C 1 *
+bit 134 I 1 IO_D10
+bit 133 O 1 IO_D10 132 1 Z
+bit 132 C 1 *
+bit 131 I 1 IO_C10
+bit 130 O 1 IO_C10 129 1 Z
+bit 129 C 1 *
+bit 128 I 1 IO_B10
+bit 127 O 1 IO_B10 126 1 Z
+bit 126 C 1 *
+bit 125 I 1 IO_F11
+bit 124 O 1 IO_F11 123 1 Z
+bit 123 C 1 *
+bit 122 I 1 IO_E11
+bit 121 O 1 IO_E11 120 1 Z
+bit 120 C 1 *
+bit 119 I 1 IO_A10
+bit 118 O 1 IO_A10 117 1 Z
+bit 117 C 1 *
+bit 116 I 1 IO_D11
+bit 115 O 1 IO_D11 114 1 Z
+bit 114 C 1 *
+bit 113 I 1 IO_C11
+bit 112 O 1 IO_C11 111 1 Z
+bit 111 C 1 *
+bit 110 I 1 IO_B11
+bit 109 O 1 IO_B11 108 1 Z
+bit 108 C 1 *
+bit 107 I 1 IO_A11
+bit 106 O 1 IO_A11 105 1 Z
+bit 105 C 1 *
+bit 104 I 1 IO_A12
+bit 103 O 1 IO_A12 102 1 Z
+bit 102 C 1 *
+bit 101 I 1 IO_B12
+bit 100 O 1 IO_B12 99 1 Z
+bit 99 C 1 *
+bit 98 I 1 IO_C12
+bit 97 O 1 IO_C12 96 1 Z
+bit 96 C 1 *
+bit 95 I 1 IO_D12
+bit 94 O 1 IO_D12 93 1 Z
+bit 93 C 1 *
+bit 92 I 1 IO_E12
+bit 91 O 1 IO_E12 90 1 Z
+bit 90 C 1 *
+bit 89 I 1 IO_F12
+bit 88 O 1 IO_F12 87 1 Z
+bit 87 C 1 *
+bit 86 I 1 IO_A13
+bit 85 O 1 IO_A13 84 1 Z
+bit 84 C 1 *
+bit 83 I 1 IO_B13
+bit 82 O 1 IO_B13 81 1 Z
+bit 81 C 1 *
+bit 80 I 1 IO_C13
+bit 79 O 1 IO_C13 78 1 Z
+bit 78 C 1 *
+bit 77 I 1 IO_D13
+bit 76 O 1 IO_D13 75 1 Z
+bit 75 C 1 *
+bit 74 I 1 IO_E13
+bit 73 O 1 IO_E13 72 1 Z
+bit 72 C 1 *
+bit 71 I 1 IO_A14
+bit 70 O 1 IO_A14 69 1 Z
+bit 69 C 1 *
+bit 68 I 1 IO_B14
+bit 67 O 1 IO_B14 66 1 Z
+bit 66 C 1 *
+bit 65 I 1 IO_D14
+bit 64 O 1 IO_D14 63 1 Z
+bit 63 C 1 *
+bit 62 I 1 IO_E14
+bit 61 O 1 IO_E14 60 1 Z
+bit 60 C 1 *
+bit 59 I 1 IO_F13
+bit 58 O 1 IO_F13 57 1 Z
+bit 57 C 1 *
+bit 56 I 1 IO_B15
+bit 55 O 1 IO_B15 54 1 Z
+bit 54 C 1 *
+bit 53 I 1 IO_A15
+bit 52 O 1 IO_A15 51 1 Z
+bit 51 C 1 *
+bit 50 I 1 IO_D15
+bit 49 O 1 IO_D15 48 1 Z
+bit 48 C 1 *
+bit 47 I 1 IO_E15
+bit 46 O 1 IO_E15 45 1 Z
+bit 45 C 1 *
+bit 44 I 1 IO_E16
+bit 43 O 1 IO_E16 42 1 Z
+bit 42 C 1 *
+bit 41 I 1 IO_B17
+bit 40 O 1 IO_B17 39 1 Z
+bit 39 C 1 *
+bit 38 I 1 IO_C17
+bit 37 O 1 IO_C17 36 1 Z
+bit 36 C 1 *
+bit 35 I 1 IO_D17
+bit 34 O 1 IO_D17 33 1 Z
+bit 33 C 1 *
+bit 32 I 1 IO_E17
+bit 31 O 1 IO_E17 30 1 Z
+bit 30 C 1 *
+bit 29 I 1 IO_F16
+bit 28 O 1 IO_F16 27 1 Z
+bit 27 C 1 *
+bit 26 I 1 IO_A18
+bit 25 O 1 IO_A18 24 1 Z
+bit 24 C 1 *
+bit 23 I 1 IO_B18
+bit 22 O 1 IO_B18 21 1 Z
+bit 21 C 1 *
+bit 20 I 1 IO_C18
+bit 19 O 1 IO_C18 18 1 Z
+bit 18 C 1 *
+bit 17 I 1 IO_D18
+bit 16 O 1 IO_D18 15 1 Z
+bit 15 C 1 *
+bit 14 I 1 IO_F17
+bit 13 O 1 IO_F17 12 1 Z
+bit 12 C 1 *
+bit 11 I 1 IO_A19
+bit 10 O 1 IO_A19 9 1 Z
+bit 9 C 1 *
+bit 8 I 1 IO_B19
+bit 7 O 1 IO_B19 6 1 Z
+bit 6 C 1 *
+bit 5 I 1 IO_C19
+bit 4 O 1 IO_C19 3 1 Z
+bit 3 C 1 *
+bit 2 I 1 IO_B20
+bit 1 O 1 IO_B20 0 1 Z
+bit 0 C 1 *
--- /dev/null
+signal GND1
+signal GND2
+signal GND3
+signal GND4
+signal GND5
+signal GND6
+signal GND7
+signal GND8
+signal GND9
+signal GND10
+signal GND11
+signal GND12
+signal GND13
+signal GND14
+signal GND15
+signal GND16
+signal GND17
+signal GND18
+signal GND19
+signal GND20
+signal GND21
+signal GND22
+signal GND23
+signal GND24
+signal GND25
+signal GND26
+signal GND27
+signal GND28
+signal GND29
+signal GND30
+signal GND31
+signal GND32
+signal CCLK_T15
+signal DONE_R14
+signal HSWAP_EN_C4
+signal M0_P3
+signal M1_T2
+signal M2_P4
+signal PROG_B
+signal TCK
+signal TDI
+signal TDO
+signal TMS
+signal VCCAUX1
+signal VCCAUX2
+signal VCCAUX3
+signal VCCAUX4
+signal VCCAUX5
+signal VCCAUX6
+signal VCCAUX7
+signal VCCAUX8
+signal VCCINT1
+signal VCCINT2
+signal VCCINT3
+signal VCCINT4
+signal VCCINT5
+signal VCCINT6
+signal VCCINT7
+signal VCCINT8
+signal VCCO01
+signal VCCO02
+signal VCCO03
+signal VCCO11
+signal VCCO12
+signal VCCO13
+signal VCCO21
+signal VCCO22
+signal VCCO23
+signal VCCO31
+signal VCCO32
+signal VCCO33
+signal VCCO41
+signal VCCO42
+signal VCCO43
+signal VCCO51
+signal VCCO52
+signal VCCO53
+signal VCCO61
+signal VCCO62
+signal VCCO63
+signal VCCO71
+signal VCCO72
+signal VCCO73
+signal IO_A3
+signal IO_A4
+signal IO_A5
+signal IO_A7
+signal IO_A8
+signal IO_A9
+signal IO_A10
+signal IO_A12
+signal IO_A13
+signal IO_A14
+signal IO_B1
+signal IO_B4
+signal IO_B5
+signal IO_B6
+signal IO_B7
+signal IO_B8
+signal IO_B10
+signal IO_B11
+signal IO_B12
+signal IO_B13
+signal IO_B14
+signal IO_B16
+signal IO_C1
+signal IO_C2
+signal IO_C3
+signal IO_C5
+signal IO_C6
+signal IO_C7
+signal IO_C8
+signal IO_C9
+signal IO_C10
+signal IO_C11
+signal IO_C12
+signal IO_C15
+signal IO_C16
+signal IO_D1
+signal IO_D2
+signal IO_D3
+signal IO_D5
+signal IO_D6
+signal IO_D7
+signal IO_D8
+signal IO_D9
+signal IO_D10
+signal IO_D11
+signal IO_D12
+signal IO_D14
+signal IO_D15
+signal IO_D16
+signal IO_E1
+signal IO_E2
+signal IO_E3
+signal IO_E4
+signal IO_E6
+signal IO_E7
+signal IO_E10
+signal IO_E11
+signal IO_E13
+signal IO_E14
+signal IO_E15
+signal IO_E16
+signal IO_F2
+signal IO_F3
+signal IO_F4
+signal IO_F5
+signal IO_F12
+signal IO_F13
+signal IO_F14
+signal IO_F15
+signal IO_G1
+signal IO_G2
+signal IO_G3
+signal IO_G4
+signal IO_G5
+signal IO_G12
+signal IO_G13
+signal IO_G14
+signal IO_G15
+signal IO_G16
+signal IO_H1
+signal IO_H3
+signal IO_H4
+signal IO_H13
+signal IO_H14
+signal IO_H15
+signal IO_H16
+signal IO_J1
+signal IO_J2
+signal IO_J3
+signal IO_J4
+signal IO_J13
+signal IO_J14
+signal IO_J16
+signal IO_K1
+signal IO_K2
+signal IO_K3
+signal IO_K4
+signal IO_K5
+signal IO_K12
+signal IO_K13
+signal IO_K14
+signal IO_K15
+signal IO_K16
+signal IO_L2
+signal IO_L3
+signal IO_L4
+signal IO_L5
+signal IO_L12
+signal IO_L13
+signal IO_L14
+signal IO_L15
+signal IO_M1
+signal IO_M2
+signal IO_M3
+signal IO_M4
+signal IO_M6
+signal IO_M7
+signal IO_M10
+signal IO_M11
+signal IO_M13
+signal IO_M14
+signal IO_M15
+signal IO_M16
+signal IO_N1
+signal IO_N2
+signal IO_N3
+signal IO_N5
+signal IO_N6
+signal IO_N7
+signal IO_N8
+signal IO_N9
+signal IO_N10
+signal IO_N11
+signal IO_N12
+signal IO_N14
+signal IO_N15
+signal IO_N16
+signal IO_P1
+signal IO_P2
+signal IO_P5
+signal IO_P6
+signal IO_P7
+signal IO_P8
+signal IO_P9
+signal IO_P10
+signal IO_P11
+signal IO_P12
+signal IO_P13
+signal IO_P14
+signal IO_P15
+signal IO_P16
+signal IO_R1
+signal IO_R3
+signal IO_R4
+signal IO_R5
+signal IO_R6
+signal IO_R7
+signal IO_R9
+signal IO_R10
+signal IO_R11
+signal IO_R12
+signal IO_R13
+signal IO_R16
+signal IO_T3
+signal IO_T4
+signal IO_T5
+signal IO_T7
+signal IO_T8
+signal IO_T9
+signal IO_T10
+signal IO_T12
+signal IO_T13
+
+register BSR 815
+register BR 1
+register DIR 32
+
+instruction length 6
+
+instruction EXTEST 000000 BSR
+instruction SAMPLE/PRELOAD 000001 BSR
+instruction IDCODE 001001 DIR
+instruction BYPASS 111111 BR
+
+bit 814 I 1 IO_B16
+bit 813 O 1 IO_B16 812 1 Z
+bit 812 C 1 *
+bit 811 I 1 IO_C16
+bit 810 O 1 IO_C16 809 1 Z
+bit 809 C 1 *
+bit 808 O 1 *
+bit 807 O 1 *
+bit 806 O 1 *
+bit 805 O 1 *
+bit 804 O 1 *
+bit 803 O 1 *
+bit 802 I 1 IO_C15
+bit 801 O 1 IO_C15 800 1 Z
+bit 800 C 1 *
+bit 799 I 1 IO_D14
+bit 798 O 1 IO_D14 797 1 Z
+bit 797 C 1 *
+bit 796 I 1 IO_D15
+bit 795 O 1 IO_D15 794 1 Z
+bit 794 C 1 *
+bit 793 I 1 IO_D16
+bit 792 O 1 IO_D16 791 1 Z
+bit 791 C 1 *
+bit 790 I 1 IO_E13
+bit 789 O 1 IO_E13 788 1 Z
+bit 788 C 1 *
+bit 787 I 1 IO_E14
+bit 786 O 1 IO_E14 785 1 Z
+bit 785 C 1 *
+bit 784 I 1 IO_E15
+bit 783 O 1 IO_E15 782 1 Z
+bit 782 C 1 *
+bit 781 I 1 IO_E16
+bit 780 O 1 IO_E16 779 1 Z
+bit 779 C 1 *
+bit 778 I 1 IO_F12
+bit 777 O 1 IO_F12 776 1 Z
+bit 776 C 1 *
+bit 775 I 1 IO_F13
+bit 774 O 1 IO_F13 773 1 Z
+bit 773 C 1 *
+bit 772 I 1 IO_F14
+bit 771 O 1 IO_F14 770 1 Z
+bit 770 C 1 *
+bit 769 I 1 IO_F15
+bit 768 O 1 IO_F15 767 1 Z
+bit 767 C 1 *
+bit 766 I 1 IO_G12
+bit 765 O 1 IO_G12 764 1 Z
+bit 764 C 1 *
+bit 763 I 1 IO_G13
+bit 762 O 1 IO_G13 761 1 Z
+bit 761 C 1 *
+bit 760 I 1 IO_G14
+bit 759 O 1 IO_G14 758 1 Z
+bit 758 C 1 *
+bit 757 I 1 IO_G15
+bit 756 O 1 IO_G15 755 1 Z
+bit 755 C 1 *
+bit 754 O 1 *
+bit 753 O 1 *
+bit 752 O 1 *
+bit 751 O 1 *
+bit 750 O 1 *
+bit 749 O 1 *
+bit 748 O 1 *
+bit 747 O 1 *
+bit 746 O 1 *
+bit 745 O 1 *
+bit 744 O 1 *
+bit 743 O 1 *
+bit 742 O 1 *
+bit 741 O 1 *
+bit 740 O 1 *
+bit 739 O 1 *
+bit 738 O 1 *
+bit 737 O 1 *
+bit 736 O 1 *
+bit 735 O 1 *
+bit 734 O 1 *
+bit 733 I 1 IO_G16
+bit 732 O 1 IO_G16 731 1 Z
+bit 731 C 1 *
+bit 730 I 1 IO_H13
+bit 729 O 1 IO_H13 728 1 Z
+bit 728 C 1 *
+bit 727 I 1 IO_H14
+bit 726 O 1 IO_H14 725 1 Z
+bit 725 C 1 *
+bit 724 I 1 IO_H15
+bit 723 O 1 IO_H15 722 1 Z
+bit 722 C 1 *
+bit 721 I 1 IO_H16
+bit 720 O 1 IO_H16 719 1 Z
+bit 719 C 1 *
+bit 718 I 1 IO_J16
+bit 717 O 1 IO_J16 716 1 Z
+bit 716 C 1 *
+bit 715 I 1 IO_K16
+bit 714 O 1 IO_K16 713 1 Z
+bit 713 C 1 *
+bit 712 I 1 IO_J14
+bit 711 O 1 IO_J14 710 1 Z
+bit 710 C 1 *
+bit 709 I 1 IO_J13
+bit 708 O 1 IO_J13 707 1 Z
+bit 707 C 1 *
+bit 706 I 1 IO_K15
+bit 705 O 1 IO_K15 704 1 Z
+bit 704 C 1 *
+bit 703 O 1 *
+bit 702 O 1 *
+bit 701 O 1 *
+bit 700 O 1 *
+bit 699 O 1 *
+bit 698 O 1 *
+bit 697 O 1 *
+bit 696 O 1 *
+bit 695 O 1 *
+bit 694 O 1 *
+bit 693 O 1 *
+bit 692 O 1 *
+bit 691 O 1 *
+bit 690 O 1 *
+bit 689 O 1 *
+bit 688 O 1 *
+bit 687 O 1 *
+bit 686 O 1 *
+bit 685 O 1 *
+bit 684 O 1 *
+bit 683 O 1 *
+bit 682 I 1 IO_K14
+bit 681 O 1 IO_K14 680 1 Z
+bit 680 C 1 *
+bit 679 I 1 IO_K13
+bit 678 O 1 IO_K13 677 1 Z
+bit 677 C 1 *
+bit 676 I 1 IO_K12
+bit 675 O 1 IO_K12 674 1 Z
+bit 674 C 1 *
+bit 673 I 1 IO_L12
+bit 672 O 1 IO_L12 671 1 Z
+bit 671 C 1 *
+bit 670 I 1 IO_L15
+bit 669 O 1 IO_L15 668 1 Z
+bit 668 C 1 *
+bit 667 I 1 IO_L14
+bit 666 O 1 IO_L14 665 1 Z
+bit 665 C 1 *
+bit 664 I 1 IO_L13
+bit 663 O 1 IO_L13 662 1 Z
+bit 662 C 1 *
+bit 661 I 1 IO_M13
+bit 660 O 1 IO_M13 659 1 Z
+bit 659 C 1 *
+bit 658 I 1 IO_M16
+bit 657 O 1 IO_M16 656 1 Z
+bit 656 C 1 *
+bit 655 I 1 IO_M15
+bit 654 O 1 IO_M15 653 1 Z
+bit 653 C 1 *
+bit 652 I 1 IO_M14
+bit 651 O 1 IO_M14 650 1 Z
+bit 650 C 1 *
+bit 649 I 1 IO_N14
+bit 648 O 1 IO_N14 647 1 Z
+bit 647 C 1 *
+bit 646 I 1 IO_N16
+bit 645 O 1 IO_N16 644 1 Z
+bit 644 C 1 *
+bit 643 I 1 IO_N15
+bit 642 O 1 IO_N15 641 1 Z
+bit 641 C 1 *
+bit 640 I 1 IO_P15
+bit 639 O 1 IO_P15 638 1 Z
+bit 638 C 1 *
+bit 637 I 1 IO_P14
+bit 636 O 1 IO_P14 635 1 Z
+bit 635 C 1 *
+bit 634 O 1 *
+bit 633 O 1 *
+bit 632 O 1 *
+bit 631 O 1 *
+bit 630 O 1 *
+bit 629 O 1 *
+bit 628 I 1 IO_P16
+bit 627 O 1 IO_P16 626 1 Z
+bit 626 C 1 *
+bit 625 I 1 IO_R16
+bit 624 O 1 IO_R16 623 1 Z
+bit 623 C 1 *
+bit 622 I 1 CCLK_T15
+bit 621 O 1 CCLK_T15 620 1 Z
+bit 620 C 1 *
+bit 619 I 1 DONE_R14
+bit 618 O 1 DONE_R14 617 1 Z
+bit 617 C 1 *
+bit 616 I 1 IO_P13
+bit 615 O 1 IO_P13 614 1 Z
+bit 614 C 1 *
+bit 613 I 1 IO_R13
+bit 612 O 1 IO_R13 611 1 Z
+bit 611 C 1 *
+bit 610 I 1 IO_T13
+bit 609 O 1 IO_T13 608 1 Z
+bit 608 C 1 *
+bit 607 O 1 *
+bit 606 O 1 *
+bit 605 O 1 *
+bit 604 O 1 *
+bit 603 O 1 *
+bit 602 O 1 *
+bit 601 O 1 *
+bit 600 O 1 *
+bit 599 O 1 *
+bit 598 O 1 *
+bit 597 O 1 *
+bit 596 O 1 *
+bit 595 O 1 *
+bit 594 O 1 *
+bit 593 O 1 *
+bit 592 O 1 *
+bit 591 O 1 *
+bit 590 O 1 *
+bit 589 O 1 *
+bit 588 O 1 *
+bit 587 O 1 *
+bit 586 O 1 *
+bit 585 O 1 *
+bit 584 O 1 *
+bit 583 O 1 *
+bit 582 O 1 *
+bit 581 O 1 *
+bit 580 O 1 *
+bit 579 O 1 *
+bit 578 O 1 *
+bit 577 I 1 IO_T14
+bit 576 O 1 IO_T14 575 1 Z
+bit 575 C 1 *
+bit 574 O 1 *
+bit 573 O 1 *
+bit 572 O 1 *
+bit 571 I 1 IO_N12
+bit 570 O 1 IO_N12 569 1 Z
+bit 569 C 1 *
+bit 568 O 1 *
+bit 567 O 1 *
+bit 566 O 1 *
+bit 565 O 1 *
+bit 564 O 1 *
+bit 563 O 1 *
+bit 562 I 1 IO_P12
+bit 561 O 1 IO_P12 560 1 Z
+bit 560 C 1 *
+bit 559 I 1 IO_R12
+bit 558 O 1 IO_R12 557 1 Z
+bit 557 C 1 *
+bit 556 I 1 IO_T12
+bit 555 O 1 IO_T12 554 1 Z
+bit 554 C 1 *
+bit 553 I 1 IO_M11
+bit 552 O 1 IO_M11 551 1 Z
+bit 551 C 1 *
+bit 550 I 1 IO_N11
+bit 549 O 1 IO_N11 548 1 Z
+bit 548 C 1 *
+bit 547 I 1 IO_P11
+bit 546 O 1 IO_P11 545 1 Z
+bit 545 C 1 *
+bit 544 I 1 IO_R11
+bit 543 O 1 IO_R11 542 1 Z
+bit 542 C 1 *
+bit 541 O 1 *
+bit 540 O 1 *
+bit 539 O 1 *
+bit 538 I 1 IO_M10
+bit 537 O 1 IO_M10 536 1 Z
+bit 536 C 1 *
+bit 535 I 1 IO_N10
+bit 534 O 1 IO_N10 533 1 Z
+bit 533 C 1 *
+bit 532 I 1 IO_P10
+bit 531 O 1 IO_P10 530 1 Z
+bit 530 C 1 *
+bit 529 I 1 IO_R10
+bit 528 O 1 IO_R10 527 1 Z
+bit 527 C 1 *
+bit 526 I 1 IO_T10
+bit 525 O 1 IO_T10 524 1 Z
+bit 524 C 1 *
+bit 523 I 1 IO_N9
+bit 522 O 1 IO_N9 521 1 Z
+bit 521 C 1 *
+bit 520 I 1 IO_P9
+bit 519 O 1 IO_P9 518 1 Z
+bit 518 C 1 *
+bit 517 I 1 IO_R9
+bit 516 O 1 IO_R9 515 1 Z
+bit 515 C 1 *
+bit 514 I 1 IO_T9
+bit 513 O 1 IO_T9 512 1 Z
+bit 512 C 1 *
+bit 511 I 1 IO_T8
+bit 510 O 1 IO_T8 509 1 Z
+bit 509 C 1 *
+bit 508 I 1 IO_P8
+bit 507 O 1 IO_P8 506 1 Z
+bit 506 C 1 *
+bit 505 I 1 IO_N8
+bit 504 O 1 IO_N8 503 1 Z
+bit 503 C 1 *
+bit 502 I 1 IO_T7
+bit 501 O 1 IO_T7 500 1 Z
+bit 500 C 1 *
+bit 499 I 1 IO_R7
+bit 498 O 1 IO_R7 497 1 Z
+bit 497 C 1 *
+bit 496 I 1 IO_P7
+bit 495 O 1 IO_P7 494 1 Z
+bit 494 C 1 *
+bit 493 I 1 IO_N7
+bit 492 O 1 IO_N7 491 1 Z
+bit 491 C 1 *
+bit 490 I 1 IO_M7
+bit 489 O 1 IO_M7 488 1 Z
+bit 488 C 1 *
+bit 487 I 1 IO_R6
+bit 486 O 1 IO_R6 485 1 Z
+bit 485 C 1 *
+bit 484 I 1 IO_P6
+bit 483 O 1 IO_P6 482 1 Z
+bit 482 C 1 *
+bit 481 I 1 IO_N5
+bit 480 O 1 IO_N5 479 1 Z
+bit 479 C 1 *
+bit 478 I 1 IO_N6
+bit 477 O 1 IO_N6 476 1 Z
+bit 476 C 1 *
+bit 475 I 1 IO_M6
+bit 474 O 1 IO_M6 473 1 Z
+bit 473 C 1 *
+bit 472 I 1 IO_R5
+bit 471 O 1 IO_R5 470 1 Z
+bit 470 C 1 *
+bit 469 I 1 IO_P5
+bit 468 O 1 IO_P5 467 1 Z
+bit 467 C 1 *
+bit 466 I 1 IO_T5
+bit 465 O 1 IO_T5 464 1 Z
+bit 464 C 1 *
+bit 463 O 1 *
+bit 462 O 1 *
+bit 461 O 1 *
+bit 460 O 1 *
+bit 459 O 1 *
+bit 458 O 1 *
+bit 457 O 1 *
+bit 456 O 1 *
+bit 455 O 1 *
+bit 454 O 1 *
+bit 453 O 1 *
+bit 452 O 1 *
+bit 451 O 1 *
+bit 450 O 1 *
+bit 449 O 1 *
+bit 448 O 1 *
+bit 447 O 1 *
+bit 446 O 1 *
+bit 445 O 1 *
+bit 444 O 1 *
+bit 443 O 1 *
+bit 442 O 1 *
+bit 441 O 1 *
+bit 440 O 1 *
+bit 439 O 1 *
+bit 438 O 1 *
+bit 437 O 1 *
+bit 436 O 1 *
+bit 435 O 1 *
+bit 434 O 1 *
+bit 433 I 1 IO_T4
+bit 432 O 1 IO_T4 431 1 Z
+bit 431 C 1 *
+bit 430 I 1 IO_R4
+bit 429 O 1 IO_R4 428 1 Z
+bit 428 C 1 *
+bit 427 O 1 *
+bit 426 O 1 *
+bit 425 O 1 *
+bit 424 O 1 *
+bit 423 O 1 *
+bit 422 O 1 *
+bit 421 O 1 *
+bit 420 O 1 *
+bit 419 O 1 *
+bit 418 O 1 *
+bit 417 O 1 *
+bit 416 O 1 *
+bit 415 O 1 *
+bit 414 O 1 *
+bit 413 O 1 *
+bit 412 I 1 IO_T3
+bit 411 O 1 IO_T3 410 1 Z
+bit 410 C 1 *
+bit 409 I 1 IO_R3
+bit 408 O 1 IO_R3 407 1 Z
+bit 407 C 1 *
+bit 406 I 1 M2_P4
+bit 405 I 1 M0_P3
+bit 404 I 1 M1_T2
+bit 403 I 1 IO_R1
+bit 402 O 1 IO_R1 401 1 Z
+bit 401 C 1 *
+bit 400 I 1 IO_P1
+bit 399 O 1 IO_P1 398 1 Z
+bit 398 C 1 *
+bit 397 O 1 *
+bit 396 O 1 *
+bit 395 O 1 *
+bit 394 O 1 *
+bit 393 O 1 *
+bit 392 O 1 *
+bit 391 I 1 IO_P2
+bit 390 O 1 IO_P2 389 1 Z
+bit 389 C 1 *
+bit 388 I 1 IO_N3
+bit 387 O 1 IO_N3 386 1 Z
+bit 386 C 1 *
+bit 385 I 1 IO_N2
+bit 384 O 1 IO_N2 383 1 Z
+bit 383 C 1 *
+bit 382 I 1 IO_N1
+bit 381 O 1 IO_N1 380 1 Z
+bit 380 C 1 *
+bit 379 I 1 IO_M4
+bit 378 O 1 IO_M4 377 1 Z
+bit 377 C 1 *
+bit 376 I 1 IO_M3
+bit 375 O 1 IO_M3 374 1 Z
+bit 374 C 1 *
+bit 373 I 1 IO_M2
+bit 372 O 1 IO_M2 371 1 Z
+bit 371 C 1 *
+bit 370 I 1 IO_M1
+bit 369 O 1 IO_M1 368 1 Z
+bit 368 C 1 *
+bit 367 I 1 IO_L5
+bit 366 O 1 IO_L5 365 1 Z
+bit 365 C 1 *
+bit 364 I 1 IO_L4
+bit 363 O 1 IO_L4 362 1 Z
+bit 362 C 1 *
+bit 361 I 1 IO_L3
+bit 360 O 1 IO_L3 359 1 Z
+bit 359 C 1 *
+bit 358 I 1 IO_L2
+bit 357 O 1 IO_L2 356 1 Z
+bit 356 C 1 *
+bit 355 I 1 IO_K5
+bit 354 O 1 IO_K5 353 1 Z
+bit 353 C 1 *
+bit 352 I 1 IO_K4
+bit 351 O 1 IO_K4 350 1 Z
+bit 350 C 1 *
+bit 349 I 1 IO_K3
+bit 348 O 1 IO_K3 347 1 Z
+bit 347 C 1 *
+bit 346 I 1 IO_K2
+bit 345 O 1 IO_K2 344 1 Z
+bit 344 C 1 *
+bit 343 O 1 *
+bit 342 O 1 *
+bit 341 O 1 *
+bit 340 O 1 *
+bit 339 O 1 *
+bit 338 O 1 *
+bit 337 O 1 *
+bit 336 O 1 *
+bit 335 O 1 *
+bit 334 O 1 *
+bit 333 O 1 *
+bit 332 O 1 *
+bit 331 O 1 *
+bit 330 O 1 *
+bit 329 O 1 *
+bit 328 O 1 *
+bit 327 O 1 *
+bit 326 O 1 *
+bit 325 O 1 *
+bit 324 O 1 *
+bit 323 O 1 *
+bit 322 I 1 IO_K1
+bit 321 O 1 IO_K1 320 1 Z
+bit 320 C 1 *
+bit 319 I 1 IO_J4
+bit 318 O 1 IO_J4 317 1 Z
+bit 317 C 1 *
+bit 316 I 1 IO_J3
+bit 315 O 1 IO_J3 314 1 Z
+bit 314 C 1 *
+bit 313 I 1 IO_J2
+bit 312 O 1 IO_J2 311 1 Z
+bit 311 C 1 *
+bit 310 I 1 IO_J1
+bit 309 O 1 IO_J1 308 1 Z
+bit 308 C 1 *
+bit 307 I 1 IO_H1
+bit 306 O 1 IO_H1 305 1 Z
+bit 305 C 1 *
+bit 304 I 1 IO_G1
+bit 303 O 1 IO_G1 302 1 Z
+bit 302 C 1 *
+bit 301 I 1 IO_H3
+bit 300 O 1 IO_H3 299 1 Z
+bit 299 C 1 *
+bit 298 I 1 IO_H4
+bit 297 O 1 IO_H4 296 1 Z
+bit 296 C 1 *
+bit 295 I 1 IO_G2
+bit 294 O 1 IO_G2 293 1 Z
+bit 293 C 1 *
+bit 292 O 1 *
+bit 291 O 1 *
+bit 290 O 1 *
+bit 289 O 1 *
+bit 288 O 1 *
+bit 287 O 1 *
+bit 286 O 1 *
+bit 285 O 1 *
+bit 284 O 1 *
+bit 283 O 1 *
+bit 282 O 1 *
+bit 281 O 1 *
+bit 280 O 1 *
+bit 279 O 1 *
+bit 278 O 1 *
+bit 277 O 1 *
+bit 276 O 1 *
+bit 275 O 1 *
+bit 274 O 1 *
+bit 273 O 1 *
+bit 272 O 1 *
+bit 271 I 1 IO_G3
+bit 270 O 1 IO_G3 269 1 Z
+bit 269 C 1 *
+bit 268 I 1 IO_G4
+bit 267 O 1 IO_G4 266 1 Z
+bit 266 C 1 *
+bit 265 I 1 IO_G5
+bit 264 O 1 IO_G5 263 1 Z
+bit 263 C 1 *
+bit 262 I 1 IO_F5
+bit 261 O 1 IO_F5 260 1 Z
+bit 260 C 1 *
+bit 259 I 1 IO_F2
+bit 258 O 1 IO_F2 257 1 Z
+bit 257 C 1 *
+bit 256 I 1 IO_F3
+bit 255 O 1 IO_F3 254 1 Z
+bit 254 C 1 *
+bit 253 I 1 IO_F4
+bit 252 O 1 IO_F4 251 1 Z
+bit 251 C 1 *
+bit 250 I 1 IO_E4
+bit 249 O 1 IO_E4 248 1 Z
+bit 248 C 1 *
+bit 247 I 1 IO_E1
+bit 246 O 1 IO_E1 245 1 Z
+bit 245 C 1 *
+bit 244 I 1 IO_E2
+bit 243 O 1 IO_E2 242 1 Z
+bit 242 C 1 *
+bit 241 I 1 IO_E3
+bit 240 O 1 IO_E3 239 1 Z
+bit 239 C 1 *
+bit 238 I 1 IO_D3
+bit 237 O 1 IO_D3 236 1 Z
+bit 236 C 1 *
+bit 235 I 1 IO_D1
+bit 234 O 1 IO_D1 233 1 Z
+bit 233 C 1 *
+bit 232 I 1 IO_D2
+bit 231 O 1 IO_D2 230 1 Z
+bit 230 C 1 *
+bit 229 I 1 IO_C2
+bit 228 O 1 IO_C2 227 1 Z
+bit 227 C 1 *
+bit 226 I 1 IO_C3
+bit 225 O 1 IO_C3 224 1 Z
+bit 224 C 1 *
+bit 223 O 1 *
+bit 222 O 1 *
+bit 221 O 1 *
+bit 220 O 1 *
+bit 219 O 1 *
+bit 218 O 1 *
+bit 217 I 1 IO_C1
+bit 216 O 1 IO_C1 215 1 Z
+bit 215 C 1 *
+bit 214 I 1 IO_B1
+bit 213 O 1 IO_B1 212 1 Z
+bit 212 C 1 *
+bit 211 O 1 *
+bit 210 I 1 HSWAP_EN_C4
+bit 209 I 1 IO_A3
+bit 208 O 1 IO_A3 207 1 Z
+bit 207 C 1 *
+bit 206 I 1 IO_B4
+bit 205 O 1 IO_B4 204 1 Z
+bit 204 C 1 *
+bit 203 I 1 IO_A4
+bit 202 O 1 IO_A4 201 1 Z
+bit 201 C 1 *
+bit 200 O 1 *
+bit 199 O 1 *
+bit 198 O 1 *
+bit 197 O 1 *
+bit 196 O 1 *
+bit 195 O 1 *
+bit 194 O 1 *
+bit 193 O 1 *
+bit 192 O 1 *
+bit 191 O 1 *
+bit 190 O 1 *
+bit 189 O 1 *
+bit 188 O 1 *
+bit 187 O 1 *
+bit 186 O 1 *
+bit 185 O 1 *
+bit 184 O 1 *
+bit 183 O 1 *
+bit 182 O 1 *
+bit 181 O 1 *
+bit 180 O 1 *
+bit 179 O 1 *
+bit 178 O 1 *
+bit 177 O 1 *
+bit 176 O 1 *
+bit 175 O 1 *
+bit 174 O 1 *
+bit 173 O 1 *
+bit 172 O 1 *
+bit 171 O 1 *
+bit 170 O 1 *
+bit 169 O 1 *
+bit 168 O 1 *
+bit 167 O 1 *
+bit 166 O 1 *
+bit 165 O 1 *
+bit 164 I 1 IO_D5
+bit 163 O 1 IO_D5 162 1 Z
+bit 162 C 1 *
+bit 161 O 1 *
+bit 160 O 1 *
+bit 159 O 1 *
+bit 158 O 1 *
+bit 157 O 1 *
+bit 156 O 1 *
+bit 155 I 1 IO_C5
+bit 154 O 1 IO_C5 153 1 Z
+bit 153 C 1 *
+bit 152 I 1 IO_B5
+bit 151 O 1 IO_B5 150 1 Z
+bit 150 C 1 *
+bit 149 I 1 IO_A5
+bit 148 O 1 IO_A5 147 1 Z
+bit 147 C 1 *
+bit 146 I 1 IO_E6
+bit 145 O 1 IO_E6 144 1 Z
+bit 144 C 1 *
+bit 143 I 1 IO_D6
+bit 142 O 1 IO_D6 141 1 Z
+bit 141 C 1 *
+bit 140 I 1 IO_C6
+bit 139 O 1 IO_C6 138 1 Z
+bit 138 C 1 *
+bit 137 I 1 IO_B6
+bit 136 O 1 IO_B6 135 1 Z
+bit 135 C 1 *
+bit 134 O 1 *
+bit 133 O 1 *
+bit 132 O 1 *
+bit 131 I 1 IO_E7
+bit 130 O 1 IO_E7 129 1 Z
+bit 129 C 1 *
+bit 128 I 1 IO_D7
+bit 127 O 1 IO_D7 126 1 Z
+bit 126 C 1 *
+bit 125 I 1 IO_C7
+bit 124 O 1 IO_C7 123 1 Z
+bit 123 C 1 *
+bit 122 I 1 IO_B7
+bit 121 O 1 IO_B7 120 1 Z
+bit 120 C 1 *
+bit 119 I 1 IO_A7
+bit 118 O 1 IO_A7 117 1 Z
+bit 117 C 1 *
+bit 116 I 1 IO_D8
+bit 115 O 1 IO_D8 114 1 Z
+bit 114 C 1 *
+bit 113 I 1 IO_C8
+bit 112 O 1 IO_C8 111 1 Z
+bit 111 C 1 *
+bit 110 I 1 IO_B8
+bit 109 O 1 IO_B8 108 1 Z
+bit 108 C 1 *
+bit 107 I 1 IO_A8
+bit 106 O 1 IO_A8 105 1 Z
+bit 105 C 1 *
+bit 104 I 1 IO_A9
+bit 103 O 1 IO_A9 102 1 Z
+bit 102 C 1 *
+bit 101 I 1 IO_C9
+bit 100 O 1 IO_C9 99 1 Z
+bit 99 C 1 *
+bit 98 I 1 IO_D9
+bit 97 O 1 IO_D9 96 1 Z
+bit 96 C 1 *
+bit 95 I 1 IO_A10
+bit 94 O 1 IO_A10 93 1 Z
+bit 93 C 1 *
+bit 92 I 1 IO_B10
+bit 91 O 1 IO_B10 90 1 Z
+bit 90 C 1 *
+bit 89 I 1 IO_C10
+bit 88 O 1 IO_C10 87 1 Z
+bit 87 C 1 *
+bit 86 I 1 IO_D10
+bit 85 O 1 IO_D10 84 1 Z
+bit 84 C 1 *
+bit 83 I 1 IO_E10
+bit 82 O 1 IO_E10 81 1 Z
+bit 81 C 1 *
+bit 80 I 1 IO_B11
+bit 79 O 1 IO_B11 78 1 Z
+bit 78 C 1 *
+bit 77 I 1 IO_C11
+bit 76 O 1 IO_C11 75 1 Z
+bit 75 C 1 *
+bit 74 I 1 IO_D12
+bit 73 O 1 IO_D12 72 1 Z
+bit 72 C 1 *
+bit 71 I 1 IO_D11
+bit 70 O 1 IO_D11 69 1 Z
+bit 69 C 1 *
+bit 68 I 1 IO_E11
+bit 67 O 1 IO_E11 66 1 Z
+bit 66 C 1 *
+bit 65 I 1 IO_B12
+bit 64 O 1 IO_B12 63 1 Z
+bit 63 C 1 *
+bit 62 I 1 IO_C12
+bit 61 O 1 IO_C12 60 1 Z
+bit 60 C 1 *
+bit 59 I 1 IO_A12
+bit 58 O 1 IO_A12 57 1 Z
+bit 57 C 1 *
+bit 56 O 1 *
+bit 55 O 1 *
+bit 54 O 1 *
+bit 53 O 1 *
+bit 52 O 1 *
+bit 51 O 1 *
+bit 50 O 1 *
+bit 49 O 1 *
+bit 48 O 1 *
+bit 47 O 1 *
+bit 46 O 1 *
+bit 45 O 1 *
+bit 44 O 1 *
+bit 43 O 1 *
+bit 42 O 1 *
+bit 41 O 1 *
+bit 40 O 1 *
+bit 39 O 1 *
+bit 38 O 1 *
+bit 37 O 1 *
+bit 36 O 1 *
+bit 35 O 1 *
+bit 34 O 1 *
+bit 33 O 1 *
+bit 32 O 1 *
+bit 31 O 1 *
+bit 30 O 1 *
+bit 29 O 1 *
+bit 28 O 1 *
+bit 27 O 1 *
+bit 26 I 1 IO_A13
+bit 25 O 1 IO_A13 24 1 Z
+bit 24 C 1 *
+bit 23 I 1 IO_B13
+bit 22 O 1 IO_B13 21 1 Z
+bit 21 C 1 *
+bit 20 O 1 *
+bit 19 O 1 *
+bit 18 O 1 *
+bit 17 O 1 *
+bit 16 O 1 *
+bit 15 O 1 *
+bit 14 O 1 *
+bit 13 O 1 *
+bit 12 O 1 *
+bit 11 O 1 *
+bit 10 O 1 *
+bit 9 O 1 *
+bit 8 O 1 *
+bit 7 O 1 *
+bit 6 O 1 *
+bit 5 I 1 IO_A14
+bit 4 O 1 IO_A14 3 1 Z
+bit 3 C 1 *
+bit 2 I 1 IO_B14
+bit 1 O 1 IO_B14 0 1 Z
+bit 0 C 1 *
--- /dev/null
+signal GND1
+signal GND2
+signal GND3
+signal GND4
+signal GND5
+signal GND6
+signal GND7
+signal GND8
+signal GND9
+signal GND10
+signal GND11
+signal GND12
+signal GND13
+signal GND14
+signal GND15
+signal GND16
+signal GND17
+signal GND18
+signal GND19
+signal GND20
+signal GND21
+signal GND22
+signal GND23
+signal GND24
+signal GND25
+signal GND26
+signal GND27
+signal GND28
+signal CCLK_P104
+signal DONE_P103
+signal HSWAP_EN_P206
+signal M0_P55
+signal M1_P54
+signal M2_P56
+signal PROG_B
+signal TCK
+signal TDI
+signal TDO
+signal TMS
+signal VCCAUX1
+signal VCCAUX2
+signal VCCAUX3
+signal VCCAUX4
+signal VCCAUX5
+signal VCCAUX6
+signal VCCAUX7
+signal VCCAUX8
+signal VCCINT1
+signal VCCINT2
+signal VCCINT3
+signal VCCINT4
+signal VCCO01
+signal VCCO02
+signal VCCO11
+signal VCCO12
+signal VCCO21
+signal VCCO22
+signal VCCO31
+signal VCCO32
+signal VCCO41
+signal VCCO42
+signal VCCO51
+signal VCCO52
+signal VCCO61
+signal VCCO62
+signal VCCO71
+signal VCCO72
+signal IO_P2
+signal IO_P3
+signal IO_P4
+signal IO_P5
+signal IO_P7
+signal IO_P9
+signal IO_P10
+signal IO_P11
+signal IO_P12
+signal IO_P13
+signal IO_P15
+signal IO_P16
+signal IO_P18
+signal IO_P19
+signal IO_P20
+signal IO_P21
+signal IO_P22
+signal IO_P24
+signal IO_P26
+signal IO_P27
+signal IO_P28
+signal IO_P29
+signal IO_P31
+signal IO_P33
+signal IO_P34
+signal IO_P35
+signal IO_P36
+signal IO_P37
+signal IO_P39
+signal IO_P40
+signal IO_P42
+signal IO_P43
+signal IO_P44
+signal IO_P45
+signal IO_P46
+signal IO_P48
+signal IO_P50
+signal IO_P51
+signal IO_P52
+signal IO_P57
+signal IO_P58
+signal IO_P61
+signal IO_P62
+signal IO_P63
+signal IO_P64
+signal IO_P65
+signal IO_P67
+signal IO_P68
+signal IO_P71
+signal IO_P72
+signal IO_P74
+signal IO_P76
+signal IO_P77
+signal IO_P78
+signal IO_P79
+signal IO_P80
+signal IO_P81
+signal IO_P83
+signal IO_P85
+signal IO_P86
+signal IO_P87
+signal IO_P90
+signal IO_P92
+signal IO_P93
+signal IO_P94
+signal IO_P95
+signal IO_P96
+signal IO_P97
+signal IO_P100
+signal IO_P101
+signal IO_P102
+signal IO_P106
+signal IO_P107
+signal IO_P108
+signal IO_P109
+signal IO_P111
+signal IO_P113
+signal IO_P114
+signal IO_P115
+signal IO_P116
+signal IO_P117
+signal IO_P119
+signal IO_P120
+signal IO_P122
+signal IO_P123
+signal IO_P124
+signal IO_P125
+signal IO_P126
+signal IO_P128
+signal IO_P130
+signal IO_P131
+signal IO_P132
+signal IO_P133
+signal IO_P135
+signal IO_P137
+signal IO_P138
+signal IO_P139
+signal IO_P140
+signal IO_P141
+signal IO_P143
+signal IO_P144
+signal IO_P146
+signal IO_P147
+signal IO_P148
+signal IO_P149
+signal IO_P150
+signal IO_P152
+signal IO_P154
+signal IO_P155
+signal IO_P156
+signal IO_P161
+signal IO_P162
+signal IO_P165
+signal IO_P166
+signal IO_P167
+signal IO_P168
+signal IO_P169
+signal IO_P171
+signal IO_P172
+signal IO_P175
+signal IO_P176
+signal IO_P178
+signal IO_P180
+signal IO_P181
+signal IO_P182
+signal IO_P183
+signal IO_P184
+signal IO_P185
+signal IO_P187
+signal IO_P189
+signal IO_P190
+signal IO_P191
+signal IO_P194
+signal IO_P196
+signal IO_P197
+signal IO_P198
+signal IO_P199
+signal IO_P200
+signal IO_P203
+signal IO_P204
+
+register BSR 815
+register BR 1
+register DIR 32
+
+instruction length 6
+
+instruction EXTEST 000000 BSR
+instruction SAMPLE/PRELOAD 000001 BSR
+instruction IDCODE 001001 DIR
+instruction BYPASS 111111 BR
+
+bit 814 I 1 IO_P156
+bit 813 O 1 IO_P156 812 1 Z
+bit 812 C 1 *
+bit 811 I 1 IO_P155
+bit 810 O 1 IO_P155 809 1 Z
+bit 809 C 1 *
+bit 808 O 1 *
+bit 807 O 1 *
+bit 806 O 1 *
+bit 805 O 1 *
+bit 804 O 1 *
+bit 803 O 1 *
+bit 802 O 1 *
+bit 801 O 1 *
+bit 800 O 1 *
+bit 799 O 1 *
+bit 798 O 1 *
+bit 797 O 1 *
+bit 796 O 1 *
+bit 795 O 1 *
+bit 794 O 1 *
+bit 793 I 1 IO_P154
+bit 792 O 1 IO_P154 791 1 Z
+bit 791 C 1 *
+bit 790 I 1 IO_P152
+bit 789 O 1 IO_P152 788 1 Z
+bit 788 C 1 *
+bit 787 I 1 IO_P150
+bit 786 O 1 IO_P150 785 1 Z
+bit 785 C 1 *
+bit 784 I 1 IO_P149
+bit 783 O 1 IO_P149 782 1 Z
+bit 782 C 1 *
+bit 781 I 1 IO_P148
+bit 780 O 1 IO_P148 779 1 Z
+bit 779 C 1 *
+bit 778 I 1 IO_P147
+bit 777 O 1 IO_P147 776 1 Z
+bit 776 C 1 *
+bit 775 I 1 IO_P146
+bit 774 O 1 IO_P146 773 1 Z
+bit 773 C 1 *
+bit 772 I 1 IO_P144
+bit 771 O 1 IO_P144 770 1 Z
+bit 770 C 1 *
+bit 769 I 1 IO_P143
+bit 768 O 1 IO_P143 767 1 Z
+bit 767 C 1 *
+bit 766 I 1 IO_P141
+bit 765 O 1 IO_P141 764 1 Z
+bit 764 C 1 *
+bit 763 I 1 IO_P140
+bit 762 O 1 IO_P140 761 1 Z
+bit 761 C 1 *
+bit 760 I 1 IO_P139
+bit 759 O 1 IO_P139 758 1 Z
+bit 758 C 1 *
+bit 757 I 1 IO_P138
+bit 756 O 1 IO_P138 755 1 Z
+bit 755 C 1 *
+bit 754 O 1 *
+bit 753 O 1 *
+bit 752 O 1 *
+bit 751 O 1 *
+bit 750 O 1 *
+bit 749 O 1 *
+bit 748 O 1 *
+bit 747 O 1 *
+bit 746 O 1 *
+bit 745 O 1 *
+bit 744 O 1 *
+bit 743 O 1 *
+bit 742 O 1 *
+bit 741 O 1 *
+bit 740 O 1 *
+bit 739 O 1 *
+bit 738 O 1 *
+bit 737 O 1 *
+bit 736 O 1 *
+bit 735 O 1 *
+bit 734 O 1 *
+bit 733 O 1 *
+bit 732 O 1 *
+bit 731 O 1 *
+bit 730 I 1 IO_P137
+bit 729 O 1 IO_P137 728 1 Z
+bit 728 C 1 *
+bit 727 I 1 IO_P135
+bit 726 O 1 IO_P135 725 1 Z
+bit 725 C 1 *
+bit 724 I 1 IO_P133
+bit 723 O 1 IO_P133 722 1 Z
+bit 722 C 1 *
+bit 721 I 1 IO_P132
+bit 720 O 1 IO_P132 719 1 Z
+bit 719 C 1 *
+bit 718 I 1 IO_P131
+bit 717 O 1 IO_P131 716 1 Z
+bit 716 C 1 *
+bit 715 I 1 IO_P130
+bit 714 O 1 IO_P130 713 1 Z
+bit 713 C 1 *
+bit 712 I 1 IO_P128
+bit 711 O 1 IO_P128 710 1 Z
+bit 710 C 1 *
+bit 709 I 1 IO_P126
+bit 708 O 1 IO_P126 707 1 Z
+bit 707 C 1 *
+bit 706 O 1 *
+bit 705 O 1 *
+bit 704 O 1 *
+bit 703 O 1 *
+bit 702 O 1 *
+bit 701 O 1 *
+bit 700 O 1 *
+bit 699 O 1 *
+bit 698 O 1 *
+bit 697 O 1 *
+bit 696 O 1 *
+bit 695 O 1 *
+bit 694 O 1 *
+bit 693 O 1 *
+bit 692 O 1 *
+bit 691 O 1 *
+bit 690 O 1 *
+bit 689 O 1 *
+bit 688 O 1 *
+bit 687 O 1 *
+bit 686 O 1 *
+bit 685 O 1 *
+bit 684 O 1 *
+bit 683 O 1 *
+bit 682 I 1 IO_P125
+bit 681 O 1 IO_P125 680 1 Z
+bit 680 C 1 *
+bit 679 I 1 IO_P124
+bit 678 O 1 IO_P124 677 1 Z
+bit 677 C 1 *
+bit 676 I 1 IO_P123
+bit 675 O 1 IO_P123 674 1 Z
+bit 674 C 1 *
+bit 673 I 1 IO_P122
+bit 672 O 1 IO_P122 671 1 Z
+bit 671 C 1 *
+bit 670 I 1 IO_P120
+bit 669 O 1 IO_P120 668 1 Z
+bit 668 C 1 *
+bit 667 I 1 IO_P119
+bit 666 O 1 IO_P119 665 1 Z
+bit 665 C 1 *
+bit 664 I 1 IO_P117
+bit 663 O 1 IO_P117 662 1 Z
+bit 662 C 1 *
+bit 661 I 1 IO_P116
+bit 660 O 1 IO_P116 659 1 Z
+bit 659 C 1 *
+bit 658 I 1 IO_P115
+bit 657 O 1 IO_P115 656 1 Z
+bit 656 C 1 *
+bit 655 I 1 IO_P114
+bit 654 O 1 IO_P114 653 1 Z
+bit 653 C 1 *
+bit 652 I 1 IO_P113
+bit 651 O 1 IO_P113 650 1 Z
+bit 650 C 1 *
+bit 649 I 1 IO_P111
+bit 648 O 1 IO_P111 647 1 Z
+bit 647 C 1 *
+bit 646 I 1 IO_P109
+bit 645 O 1 IO_P109 644 1 Z
+bit 644 C 1 *
+bit 643 I 1 IO_P108
+bit 642 O 1 IO_P108 641 1 Z
+bit 641 C 1 *
+bit 640 O 1 *
+bit 639 O 1 *
+bit 638 O 1 *
+bit 637 O 1 *
+bit 636 O 1 *
+bit 635 O 1 *
+bit 634 O 1 *
+bit 633 O 1 *
+bit 632 O 1 *
+bit 631 O 1 *
+bit 630 O 1 *
+bit 629 O 1 *
+bit 628 I 1 IO_P107
+bit 627 O 1 IO_P107 626 1 Z
+bit 626 C 1 *
+bit 625 I 1 IO_P106
+bit 624 O 1 IO_P106 623 1 Z
+bit 623 C 1 *
+bit 622 I 1 CCLK_P104
+bit 621 O 1 CCLK_P104 620 1 Z
+bit 620 C 1 *
+bit 619 I 1 DONE_P103
+bit 618 O 1 DONE_P103 617 1 Z
+bit 617 C 1 *
+bit 616 I 1 IO_P102
+bit 615 O 1 IO_P102 614 1 Z
+bit 614 C 1 *
+bit 613 I 1 IO_P101
+bit 612 O 1 IO_P101 611 1 Z
+bit 611 C 1 *
+bit 610 I 1 IO_P100
+bit 609 O 1 IO_P100 608 1 Z
+bit 608 C 1 *
+bit 607 O 1 *
+bit 606 O 1 *
+bit 605 O 1 *
+bit 604 O 1 *
+bit 603 O 1 *
+bit 602 O 1 *
+bit 601 O 1 *
+bit 600 O 1 *
+bit 599 O 1 *
+bit 598 O 1 *
+bit 597 O 1 *
+bit 596 O 1 *
+bit 595 O 1 *
+bit 594 O 1 *
+bit 593 O 1 *
+bit 592 O 1 *
+bit 591 O 1 *
+bit 590 O 1 *
+bit 589 O 1 *
+bit 588 O 1 *
+bit 587 O 1 *
+bit 586 O 1 *
+bit 585 O 1 *
+bit 584 O 1 *
+bit 583 O 1 *
+bit 582 O 1 *
+bit 581 O 1 *
+bit 580 O 1 *
+bit 579 O 1 *
+bit 578 O 1 *
+bit 577 I 1 IO_P97
+bit 576 O 1 IO_P97 575 1 Z
+bit 575 C 1 *
+bit 574 O 1 *
+bit 573 O 1 *
+bit 572 O 1 *
+bit 571 I 1 IO_P96
+bit 570 O 1 IO_P96 569 1 Z
+bit 569 C 1 *
+bit 568 O 1 *
+bit 567 O 1 *
+bit 566 O 1 *
+bit 565 O 1 *
+bit 564 O 1 *
+bit 563 O 1 *
+bit 562 I 1 IO_P95
+bit 561 O 1 IO_P95 560 1 Z
+bit 560 C 1 *
+bit 559 I 1 IO_P94
+bit 558 O 1 IO_P94 557 1 Z
+bit 557 C 1 *
+bit 556 I 1 IO_P93
+bit 555 O 1 IO_P93 554 1 Z
+bit 554 C 1 *
+bit 553 I 1 IO_P92
+bit 552 O 1 IO_P92 551 1 Z
+bit 551 C 1 *
+bit 550 I 1 IO_P90
+bit 549 O 1 IO_P90 548 1 Z
+bit 548 C 1 *
+bit 547 O 1 *
+bit 546 O 1 *
+bit 545 O 1 *
+bit 544 O 1 *
+bit 543 O 1 *
+bit 542 O 1 *
+bit 541 O 1 *
+bit 540 O 1 *
+bit 539 O 1 *
+bit 538 O 1 *
+bit 537 O 1 *
+bit 536 O 1 *
+bit 535 O 1 *
+bit 534 O 1 *
+bit 533 O 1 *
+bit 532 I 1 IO_P87
+bit 531 O 1 IO_P87 530 1 Z
+bit 530 C 1 *
+bit 529 I 1 IO_P86
+bit 528 O 1 IO_P86 527 1 Z
+bit 527 C 1 *
+bit 526 I 1 IO_P85
+bit 525 O 1 IO_P85 524 1 Z
+bit 524 C 1 *
+bit 523 I 1 IO_P83
+bit 522 O 1 IO_P83 521 1 Z
+bit 521 C 1 *
+bit 520 I 1 IO_P81
+bit 519 O 1 IO_P81 518 1 Z
+bit 518 C 1 *
+bit 517 I 1 IO_P80
+bit 516 O 1 IO_P80 515 1 Z
+bit 515 C 1 *
+bit 514 I 1 IO_P79
+bit 513 O 1 IO_P79 512 1 Z
+bit 512 C 1 *
+bit 511 I 1 IO_P78
+bit 510 O 1 IO_P78 509 1 Z
+bit 509 C 1 *
+bit 508 I 1 IO_P77
+bit 507 O 1 IO_P77 506 1 Z
+bit 506 C 1 *
+bit 505 I 1 IO_P76
+bit 504 O 1 IO_P76 503 1 Z
+bit 503 C 1 *
+bit 502 I 1 IO_P74
+bit 501 O 1 IO_P74 500 1 Z
+bit 500 C 1 *
+bit 499 I 1 IO_P72
+bit 498 O 1 IO_P72 497 1 Z
+bit 497 C 1 *
+bit 496 I 1 IO_P71
+bit 495 O 1 IO_P71 494 1 Z
+bit 494 C 1 *
+bit 493 O 1 *
+bit 492 O 1 *
+bit 491 O 1 *
+bit 490 O 1 *
+bit 489 O 1 *
+bit 488 O 1 *
+bit 487 O 1 *
+bit 486 O 1 *
+bit 485 O 1 *
+bit 484 O 1 *
+bit 483 O 1 *
+bit 482 O 1 *
+bit 481 O 1 *
+bit 480 O 1 *
+bit 479 O 1 *
+bit 478 I 1 IO_P68
+bit 477 O 1 IO_P68 476 1 Z
+bit 476 C 1 *
+bit 475 I 1 IO_P67
+bit 474 O 1 IO_P67 473 1 Z
+bit 473 C 1 *
+bit 472 I 1 IO_P65
+bit 471 O 1 IO_P65 470 1 Z
+bit 470 C 1 *
+bit 469 I 1 IO_P64
+bit 468 O 1 IO_P64 467 1 Z
+bit 467 C 1 *
+bit 466 I 1 IO_P63
+bit 465 O 1 IO_P63 464 1 Z
+bit 464 C 1 *
+bit 463 O 1 *
+bit 462 O 1 *
+bit 461 O 1 *
+bit 460 O 1 *
+bit 459 O 1 *
+bit 458 O 1 *
+bit 457 O 1 *
+bit 456 O 1 *
+bit 455 O 1 *
+bit 454 O 1 *
+bit 453 O 1 *
+bit 452 O 1 *
+bit 451 O 1 *
+bit 450 O 1 *
+bit 449 O 1 *
+bit 448 O 1 *
+bit 447 O 1 *
+bit 446 O 1 *
+bit 445 O 1 *
+bit 444 O 1 *
+bit 443 O 1 *
+bit 442 O 1 *
+bit 441 O 1 *
+bit 440 O 1 *
+bit 439 O 1 *
+bit 438 O 1 *
+bit 437 O 1 *
+bit 436 O 1 *
+bit 435 O 1 *
+bit 434 O 1 *
+bit 433 I 1 IO_P62
+bit 432 O 1 IO_P62 431 1 Z
+bit 431 C 1 *
+bit 430 I 1 IO_P61
+bit 429 O 1 IO_P61 428 1 Z
+bit 428 C 1 *
+bit 427 O 1 *
+bit 426 O 1 *
+bit 425 O 1 *
+bit 424 O 1 *
+bit 423 O 1 *
+bit 422 O 1 *
+bit 421 O 1 *
+bit 420 O 1 *
+bit 419 O 1 *
+bit 418 O 1 *
+bit 417 O 1 *
+bit 416 O 1 *
+bit 415 O 1 *
+bit 414 O 1 *
+bit 413 O 1 *
+bit 412 I 1 IO_P58
+bit 411 O 1 IO_P58 410 1 Z
+bit 410 C 1 *
+bit 409 I 1 IO_P57
+bit 408 O 1 IO_P57 407 1 Z
+bit 407 C 1 *
+bit 406 I 1 M2_P56
+bit 405 I 1 M0_P55
+bit 404 I 1 M1_P54
+bit 403 I 1 IO_P52
+bit 402 O 1 IO_P52 401 1 Z
+bit 401 C 1 *
+bit 400 I 1 IO_P51
+bit 399 O 1 IO_P51 398 1 Z
+bit 398 C 1 *
+bit 397 O 1 *
+bit 396 O 1 *
+bit 395 O 1 *
+bit 394 O 1 *
+bit 393 O 1 *
+bit 392 O 1 *
+bit 391 O 1 *
+bit 390 O 1 *
+bit 389 O 1 *
+bit 388 O 1 *
+bit 387 O 1 *
+bit 386 O 1 *
+bit 385 O 1 *
+bit 384 O 1 *
+bit 383 O 1 *
+bit 382 I 1 IO_P50
+bit 381 O 1 IO_P50 380 1 Z
+bit 380 C 1 *
+bit 379 I 1 IO_P48
+bit 378 O 1 IO_P48 377 1 Z
+bit 377 C 1 *
+bit 376 I 1 IO_P46
+bit 375 O 1 IO_P46 374 1 Z
+bit 374 C 1 *
+bit 373 I 1 IO_P45
+bit 372 O 1 IO_P45 371 1 Z
+bit 371 C 1 *
+bit 370 I 1 IO_P44
+bit 369 O 1 IO_P44 368 1 Z
+bit 368 C 1 *
+bit 367 I 1 IO_P43
+bit 366 O 1 IO_P43 365 1 Z
+bit 365 C 1 *
+bit 364 I 1 IO_P42
+bit 363 O 1 IO_P42 362 1 Z
+bit 362 C 1 *
+bit 361 I 1 IO_P40
+bit 360 O 1 IO_P40 359 1 Z
+bit 359 C 1 *
+bit 358 I 1 IO_P39
+bit 357 O 1 IO_P39 356 1 Z
+bit 356 C 1 *
+bit 355 I 1 IO_P37
+bit 354 O 1 IO_P37 353 1 Z
+bit 353 C 1 *
+bit 352 I 1 IO_P36
+bit 351 O 1 IO_P36 350 1 Z
+bit 350 C 1 *
+bit 349 I 1 IO_P35
+bit 348 O 1 IO_P35 347 1 Z
+bit 347 C 1 *
+bit 346 I 1 IO_P34
+bit 345 O 1 IO_P34 344 1 Z
+bit 344 C 1 *
+bit 343 O 1 *
+bit 342 O 1 *
+bit 341 O 1 *
+bit 340 O 1 *
+bit 339 O 1 *
+bit 338 O 1 *
+bit 337 O 1 *
+bit 336 O 1 *
+bit 335 O 1 *
+bit 334 O 1 *
+bit 333 O 1 *
+bit 332 O 1 *
+bit 331 O 1 *
+bit 330 O 1 *
+bit 329 O 1 *
+bit 328 O 1 *
+bit 327 O 1 *
+bit 326 O 1 *
+bit 325 O 1 *
+bit 324 O 1 *
+bit 323 O 1 *
+bit 322 O 1 *
+bit 321 O 1 *
+bit 320 O 1 *
+bit 319 I 1 IO_P33
+bit 318 O 1 IO_P33 317 1 Z
+bit 317 C 1 *
+bit 316 I 1 IO_P31
+bit 315 O 1 IO_P31 314 1 Z
+bit 314 C 1 *
+bit 313 I 1 IO_P29
+bit 312 O 1 IO_P29 311 1 Z
+bit 311 C 1 *
+bit 310 I 1 IO_P28
+bit 309 O 1 IO_P28 308 1 Z
+bit 308 C 1 *
+bit 307 I 1 IO_P27
+bit 306 O 1 IO_P27 305 1 Z
+bit 305 C 1 *
+bit 304 I 1 IO_P26
+bit 303 O 1 IO_P26 302 1 Z
+bit 302 C 1 *
+bit 301 I 1 IO_P24
+bit 300 O 1 IO_P24 299 1 Z
+bit 299 C 1 *
+bit 298 I 1 IO_P22
+bit 297 O 1 IO_P22 296 1 Z
+bit 296 C 1 *
+bit 295 O 1 *
+bit 294 O 1 *
+bit 293 O 1 *
+bit 292 O 1 *
+bit 291 O 1 *
+bit 290 O 1 *
+bit 289 O 1 *
+bit 288 O 1 *
+bit 287 O 1 *
+bit 286 O 1 *
+bit 285 O 1 *
+bit 284 O 1 *
+bit 283 O 1 *
+bit 282 O 1 *
+bit 281 O 1 *
+bit 280 O 1 *
+bit 279 O 1 *
+bit 278 O 1 *
+bit 277 O 1 *
+bit 276 O 1 *
+bit 275 O 1 *
+bit 274 O 1 *
+bit 273 O 1 *
+bit 272 O 1 *
+bit 271 I 1 IO_P21
+bit 270 O 1 IO_P21 269 1 Z
+bit 269 C 1 *
+bit 268 I 1 IO_P20
+bit 267 O 1 IO_P20 266 1 Z
+bit 266 C 1 *
+bit 265 I 1 IO_P19
+bit 264 O 1 IO_P19 263 1 Z
+bit 263 C 1 *
+bit 262 I 1 IO_P18
+bit 261 O 1 IO_P18 260 1 Z
+bit 260 C 1 *
+bit 259 I 1 IO_P16
+bit 258 O 1 IO_P16 257 1 Z
+bit 257 C 1 *
+bit 256 I 1 IO_P15
+bit 255 O 1 IO_P15 254 1 Z
+bit 254 C 1 *
+bit 253 I 1 IO_P13
+bit 252 O 1 IO_P13 251 1 Z
+bit 251 C 1 *
+bit 250 I 1 IO_P12
+bit 249 O 1 IO_P12 248 1 Z
+bit 248 C 1 *
+bit 247 I 1 IO_P11
+bit 246 O 1 IO_P11 245 1 Z
+bit 245 C 1 *
+bit 244 I 1 IO_P10
+bit 243 O 1 IO_P10 242 1 Z
+bit 242 C 1 *
+bit 241 I 1 IO_P9
+bit 240 O 1 IO_P9 239 1 Z
+bit 239 C 1 *
+bit 238 I 1 IO_P7
+bit 237 O 1 IO_P7 236 1 Z
+bit 236 C 1 *
+bit 235 O 1 *
+bit 234 O 1 *
+bit 233 O 1 *
+bit 232 O 1 *
+bit 231 O 1 *
+bit 230 O 1 *
+bit 229 I 1 IO_P5
+bit 228 O 1 IO_P5 227 1 Z
+bit 227 C 1 *
+bit 226 I 1 IO_P4
+bit 225 O 1 IO_P4 224 1 Z
+bit 224 C 1 *
+bit 223 O 1 *
+bit 222 O 1 *
+bit 221 O 1 *
+bit 220 O 1 *
+bit 219 O 1 *
+bit 218 O 1 *
+bit 217 I 1 IO_P3
+bit 216 O 1 IO_P3 215 1 Z
+bit 215 C 1 *
+bit 214 I 1 IO_P2
+bit 213 O 1 IO_P2 212 1 Z
+bit 212 C 1 *
+bit 211 O 1 *
+bit 210 I 1 HSWAP_EN_P206
+bit 209 I 1 IO_P205
+bit 208 O 1 IO_P205 207 1 Z
+bit 207 C 1 *
+bit 206 I 1 IO_P204
+bit 205 O 1 IO_P204 204 1 Z
+bit 204 C 1 *
+bit 203 I 1 IO_P203
+bit 202 O 1 IO_P203 201 1 Z
+bit 201 C 1 *
+bit 200 O 1 *
+bit 199 O 1 *
+bit 198 O 1 *
+bit 197 O 1 *
+bit 196 O 1 *
+bit 195 O 1 *
+bit 194 O 1 *
+bit 193 O 1 *
+bit 192 O 1 *
+bit 191 O 1 *
+bit 190 O 1 *
+bit 189 O 1 *
+bit 188 O 1 *
+bit 187 O 1 *
+bit 186 O 1 *
+bit 185 O 1 *
+bit 184 O 1 *
+bit 183 O 1 *
+bit 182 O 1 *
+bit 181 O 1 *
+bit 180 O 1 *
+bit 179 O 1 *
+bit 178 O 1 *
+bit 177 O 1 *
+bit 176 O 1 *
+bit 175 O 1 *
+bit 174 O 1 *
+bit 173 O 1 *
+bit 172 O 1 *
+bit 171 O 1 *
+bit 170 O 1 *
+bit 169 O 1 *
+bit 168 O 1 *
+bit 167 O 1 *
+bit 166 O 1 *
+bit 165 O 1 *
+bit 164 I 1 IO_P200
+bit 163 O 1 IO_P200 162 1 Z
+bit 162 C 1 *
+bit 161 O 1 *
+bit 160 O 1 *
+bit 159 O 1 *
+bit 158 O 1 *
+bit 157 O 1 *
+bit 156 O 1 *
+bit 155 I 1 IO_P199
+bit 154 O 1 IO_P199 153 1 Z
+bit 153 C 1 *
+bit 152 I 1 IO_P198
+bit 151 O 1 IO_P198 150 1 Z
+bit 150 C 1 *
+bit 149 I 1 IO_P197
+bit 148 O 1 IO_P197 147 1 Z
+bit 147 C 1 *
+bit 146 I 1 IO_P196
+bit 145 O 1 IO_P196 144 1 Z
+bit 144 C 1 *
+bit 143 I 1 IO_P194
+bit 142 O 1 IO_P194 141 1 Z
+bit 141 C 1 *
+bit 140 O 1 *
+bit 139 O 1 *
+bit 138 O 1 *
+bit 137 O 1 *
+bit 136 O 1 *
+bit 135 O 1 *
+bit 134 O 1 *
+bit 133 O 1 *
+bit 132 O 1 *
+bit 131 O 1 *
+bit 130 O 1 *
+bit 129 O 1 *
+bit 128 O 1 *
+bit 127 O 1 *
+bit 126 O 1 *
+bit 125 I 1 IO_P191
+bit 124 O 1 IO_P191 123 1 Z
+bit 123 C 1 *
+bit 122 I 1 IO_P190
+bit 121 O 1 IO_P190 120 1 Z
+bit 120 C 1 *
+bit 119 I 1 IO_P189
+bit 118 O 1 IO_P189 117 1 Z
+bit 117 C 1 *
+bit 116 I 1 IO_P187
+bit 115 O 1 IO_P187 114 1 Z
+bit 114 C 1 *
+bit 113 I 1 IO_P185
+bit 112 O 1 IO_P185 111 1 Z
+bit 111 C 1 *
+bit 110 I 1 IO_P184
+bit 109 O 1 IO_P184 108 1 Z
+bit 108 C 1 *
+bit 107 I 1 IO_P183
+bit 106 O 1 IO_P183 105 1 Z
+bit 105 C 1 *
+bit 104 I 1 IO_P182
+bit 103 O 1 IO_P182 102 1 Z
+bit 102 C 1 *
+bit 101 I 1 IO_P181
+bit 100 O 1 IO_P181 99 1 Z
+bit 99 C 1 *
+bit 98 I 1 IO_P180
+bit 97 O 1 IO_P180 96 1 Z
+bit 96 C 1 *
+bit 95 I 1 IO_P178
+bit 94 O 1 IO_P178 93 1 Z
+bit 93 C 1 *
+bit 92 I 1 IO_P176
+bit 91 O 1 IO_P176 90 1 Z
+bit 90 C 1 *
+bit 89 I 1 IO_P175
+bit 88 O 1 IO_P175 87 1 Z
+bit 87 C 1 *
+bit 86 O 1 *
+bit 85 O 1 *
+bit 84 O 1 *
+bit 83 O 1 *
+bit 82 O 1 *
+bit 81 O 1 *
+bit 80 O 1 *
+bit 79 O 1 *
+bit 78 O 1 *
+bit 77 O 1 *
+bit 76 O 1 *
+bit 75 O 1 *
+bit 74 O 1 *
+bit 73 O 1 *
+bit 72 O 1 *
+bit 71 I 1 IO_P172
+bit 70 O 1 IO_P172 69 1 Z
+bit 69 C 1 *
+bit 68 I 1 IO_P171
+bit 67 O 1 IO_P171 66 1 Z
+bit 66 C 1 *
+bit 65 I 1 IO_P169
+bit 64 O 1 IO_P169 63 1 Z
+bit 63 C 1 *
+bit 62 I 1 IO_P168
+bit 61 O 1 IO_P168 60 1 Z
+bit 60 C 1 *
+bit 59 I 1 IO_P167
+bit 58 O 1 IO_P167 57 1 Z
+bit 57 C 1 *
+bit 56 O 1 *
+bit 55 O 1 *
+bit 54 O 1 *
+bit 53 O 1 *
+bit 52 O 1 *
+bit 51 O 1 *
+bit 50 O 1 *
+bit 49 O 1 *
+bit 48 O 1 *
+bit 47 O 1 *
+bit 46 O 1 *
+bit 45 O 1 *
+bit 44 O 1 *
+bit 43 O 1 *
+bit 42 O 1 *
+bit 41 O 1 *
+bit 40 O 1 *
+bit 39 O 1 *
+bit 38 O 1 *
+bit 37 O 1 *
+bit 36 O 1 *
+bit 35 O 1 *
+bit 34 O 1 *
+bit 33 O 1 *
+bit 32 O 1 *
+bit 31 O 1 *
+bit 30 O 1 *
+bit 29 O 1 *
+bit 28 O 1 *
+bit 27 O 1 *
+bit 26 I 1 IO_P166
+bit 25 O 1 IO_P166 24 1 Z
+bit 24 C 1 *
+bit 23 I 1 IO_P165
+bit 22 O 1 IO_P165 21 1 Z
+bit 21 C 1 *
+bit 20 O 1 *
+bit 19 O 1 *
+bit 18 O 1 *
+bit 17 O 1 *
+bit 16 O 1 *
+bit 15 O 1 *
+bit 14 O 1 *
+bit 13 O 1 *
+bit 12 O 1 *
+bit 11 O 1 *
+bit 10 O 1 *
+bit 9 O 1 *
+bit 8 O 1 *
+bit 7 O 1 *
+bit 6 O 1 *
+bit 5 I 1 IO_P162
+bit 4 O 1 IO_P162 3 1 Z
+bit 3 C 1 *
+bit 2 I 1 IO_P161
+bit 1 O 1 IO_P161 0 1 Z
+bit 0 C 1 *
--- /dev/null
+signal GND1
+signal GND2
+signal GND3
+signal GND4
+signal GND5
+signal GND6
+signal GND7
+signal GND8
+signal GND9
+signal GND10
+signal GND11
+signal GND12
+signal GND13
+signal GND14
+signal GND15
+signal GND16
+signal CCLK_P72
+signal DONE_P71
+signal HSWAP_EN_P142
+signal M0_P38
+signal M1_P37
+signal M2_P39
+signal PROG_B
+signal TCK
+signal TDI
+signal TDO
+signal TMS
+signal VCCAUX1
+signal VCCAUX2
+signal VCCAUX3
+signal VCCAUX4
+signal VCCINT1
+signal VCCINT2
+signal VCCINT3
+signal VCCINT4
+signal VCCO011
+signal VCCO012
+signal VCCO013
+signal VCCO231
+signal VCCO232
+signal VCCO233
+signal VCCO451
+signal VCCO452
+signal VCCO453
+signal VCCO671
+signal VCCO672
+signal VCCO673
+signal IO_P1
+signal IO_P2
+signal IO_P4
+signal IO_P5
+signal IO_P6
+signal IO_P7
+signal IO_P8
+signal IO_P10
+signal IO_P11
+signal IO_P12
+signal IO_P13
+signal IO_P14
+signal IO_P15
+signal IO_P17
+signal IO_P18
+signal IO_P20
+signal IO_P21
+signal IO_P23
+signal IO_P24
+signal IO_P25
+signal IO_P26
+signal IO_P27
+signal IO_P28
+signal IO_P30
+signal IO_P31
+signal IO_P32
+signal IO_P33
+signal IO_P35
+signal IO_P36
+signal IO_P40
+signal IO_P41
+signal IO_P44
+signal IO_P46
+signal IO_P47
+signal IO_P50
+signal IO_P51
+signal IO_P52
+signal IO_P53
+signal IO_P55
+signal IO_P56
+signal IO_P57
+signal IO_P58
+signal IO_P59
+signal IO_P60
+signal IO_P63
+signal IO_P65
+signal IO_P68
+signal IO_P69
+signal IO_P70
+signal IO_P73
+signal IO_P74
+signal IO_P76
+signal IO_P77
+signal IO_P78
+signal IO_P79
+signal IO_P80
+signal IO_P82
+signal IO_P83
+signal IO_P84
+signal IO_P85
+signal IO_P86
+signal IO_P87
+signal IO_P89
+signal IO_P90
+signal IO_P92
+signal IO_P93
+signal IO_P95
+signal IO_P96
+signal IO_P97
+signal IO_P98
+signal IO_P99
+signal IO_P100
+signal IO_P102
+signal IO_P103
+signal IO_P104
+signal IO_P105
+signal IO_P107
+signal IO_P108
+signal IO_P112
+signal IO_P113
+signal IO_P116
+signal IO_P118
+signal IO_P119
+signal IO_P122
+signal IO_P123
+signal IO_P124
+signal IO_P125
+signal IO_P127
+signal IO_P128
+signal IO_P129
+signal IO_P130
+signal IO_P131
+signal IO_P132
+signal IO_P135
+signal IO_P137
+signal IO_P140
+
+register BSR 815
+register BR 1
+register DIR 32
+
+instruction length 6
+
+instruction EXTEST 000000 BSR
+instruction SAMPLE/PRELOAD 000001 BSR
+instruction IDCODE 001001 DIR
+instruction BYPASS 111111 BR
+
+bit 814 I 1 IO_P108
+bit 813 O 1 IO_P108 812 1 Z
+bit 812 C 1 *
+bit 811 I 1 IO_P107
+bit 810 O 1 IO_P107 809 1 Z
+bit 809 C 1 *
+bit 808 O 1 *
+bit 807 O 1 *
+bit 806 O 1 *
+bit 805 O 1 *
+bit 804 O 1 *
+bit 803 O 1 *
+bit 802 O 1 *
+bit 801 O 1 *
+bit 800 O 1 *
+bit 799 O 1 *
+bit 798 O 1 *
+bit 797 O 1 *
+bit 796 O 1 *
+bit 795 O 1 *
+bit 794 O 1 *
+bit 793 O 1 *
+bit 792 O 1 *
+bit 791 O 1 *
+bit 790 O 1 *
+bit 789 O 1 *
+bit 788 O 1 *
+bit 787 O 1 *
+bit 786 O 1 *
+bit 785 O 1 *
+bit 784 I 1 IO_P105
+bit 783 O 1 IO_P105 782 1 Z
+bit 782 C 1 *
+bit 781 I 1 IO_P104
+bit 780 O 1 IO_P104 779 1 Z
+bit 779 C 1 *
+bit 778 I 1 IO_P103
+bit 777 O 1 IO_P103 776 1 Z
+bit 776 C 1 *
+bit 775 I 1 IO_P102
+bit 774 O 1 IO_P102 773 1 Z
+bit 773 C 1 *
+bit 772 I 1 IO_P100
+bit 771 O 1 IO_P100 770 1 Z
+bit 770 C 1 *
+bit 769 I 1 IO_P99
+bit 768 O 1 IO_P99 767 1 Z
+bit 767 C 1 *
+bit 766 I 1 IO_P98
+bit 765 O 1 IO_P98 764 1 Z
+bit 764 C 1 *
+bit 763 I 1 IO_P97
+bit 762 O 1 IO_P97 761 1 Z
+bit 761 C 1 *
+bit 760 I 1 IO_P96
+bit 759 O 1 IO_P96 758 1 Z
+bit 758 C 1 *
+bit 757 I 1 IO_P95
+bit 756 O 1 IO_P95 755 1 Z
+bit 755 C 1 *
+bit 754 O 1 *
+bit 753 O 1 *
+bit 752 O 1 *
+bit 751 O 1 *
+bit 750 O 1 *
+bit 749 O 1 *
+bit 748 O 1 *
+bit 747 O 1 *
+bit 746 O 1 *
+bit 745 O 1 *
+bit 744 O 1 *
+bit 743 O 1 *
+bit 742 O 1 *
+bit 741 O 1 *
+bit 740 O 1 *
+bit 739 O 1 *
+bit 738 O 1 *
+bit 737 O 1 *
+bit 736 O 1 *
+bit 735 O 1 *
+bit 734 O 1 *
+bit 733 O 1 *
+bit 732 O 1 *
+bit 731 O 1 *
+bit 730 O 1 *
+bit 729 O 1 *
+bit 728 O 1 *
+bit 727 O 1 *
+bit 726 O 1 *
+bit 725 O 1 *
+bit 724 I 1 IO_P93
+bit 723 O 1 IO_P93 722 1 Z
+bit 722 C 1 *
+bit 721 I 1 IO_P92
+bit 720 O 1 IO_P92 719 1 Z
+bit 719 C 1 *
+bit 718 I 1 IO_P90
+bit 717 O 1 IO_P90 716 1 Z
+bit 716 C 1 *
+bit 715 I 1 IO_P89
+bit 714 O 1 IO_P89 713 1 Z
+bit 713 C 1 *
+bit 712 O 1 *
+bit 711 O 1 *
+bit 710 O 1 *
+bit 709 O 1 *
+bit 708 O 1 *
+bit 707 O 1 *
+bit 706 O 1 *
+bit 705 O 1 *
+bit 704 O 1 *
+bit 703 O 1 *
+bit 702 O 1 *
+bit 701 O 1 *
+bit 700 O 1 *
+bit 699 O 1 *
+bit 698 O 1 *
+bit 697 O 1 *
+bit 696 O 1 *
+bit 695 O 1 *
+bit 694 O 1 *
+bit 693 O 1 *
+bit 692 O 1 *
+bit 691 O 1 *
+bit 690 O 1 *
+bit 689 O 1 *
+bit 688 O 1 *
+bit 687 O 1 *
+bit 686 O 1 *
+bit 685 O 1 *
+bit 684 O 1 *
+bit 683 O 1 *
+bit 682 I 1 IO_P87
+bit 681 O 1 IO_P87 680 1 Z
+bit 680 C 1 *
+bit 679 I 1 IO_P86
+bit 678 O 1 IO_P86 677 1 Z
+bit 677 C 1 *
+bit 676 I 1 IO_P85
+bit 675 O 1 IO_P85 674 1 Z
+bit 674 C 1 *
+bit 673 I 1 IO_P84
+bit 672 O 1 IO_P84 671 1 Z
+bit 671 C 1 *
+bit 670 I 1 IO_P83
+bit 669 O 1 IO_P83 668 1 Z
+bit 668 C 1 *
+bit 667 I 1 IO_P82
+bit 666 O 1 IO_P82 665 1 Z
+bit 665 C 1 *
+bit 664 I 1 IO_P80
+bit 663 O 1 IO_P80 662 1 Z
+bit 662 C 1 *
+bit 661 I 1 IO_P79
+bit 660 O 1 IO_P79 659 1 Z
+bit 659 C 1 *
+bit 658 I 1 IO_P78
+bit 657 O 1 IO_P78 656 1 Z
+bit 656 C 1 *
+bit 655 I 1 IO_P77
+bit 654 O 1 IO_P77 653 1 Z
+bit 653 C 1 *
+bit 652 I 1 IO_P76
+bit 651 O 1 IO_P76 650 1 Z
+bit 650 C 1 *
+bit 649 O 1 *
+bit 648 O 1 *
+bit 647 O 1 *
+bit 646 O 1 *
+bit 645 O 1 *
+bit 644 O 1 *
+bit 643 O 1 *
+bit 642 O 1 *
+bit 641 O 1 *
+bit 640 O 1 *
+bit 639 O 1 *
+bit 638 O 1 *
+bit 637 O 1 *
+bit 636 O 1 *
+bit 635 O 1 *
+bit 634 O 1 *
+bit 633 O 1 *
+bit 632 O 1 *
+bit 631 O 1 *
+bit 630 O 1 *
+bit 629 O 1 *
+bit 628 I 1 IO_P74
+bit 627 O 1 IO_P74 626 1 Z
+bit 626 C 1 *
+bit 625 I 1 IO_P73
+bit 624 O 1 IO_P73 623 1 Z
+bit 623 C 1 *
+bit 622 I 1 CCLK_P72
+bit 621 O 1 CCLK_P72 620 1 Z
+bit 620 C 1 *
+bit 619 I 1 DONE_P71
+bit 618 O 1 DONE_P71 617 1 Z
+bit 617 C 1 *
+bit 616 I 1 IO_P70
+bit 615 O 1 IO_P70 614 1 Z
+bit 614 C 1 *
+bit 613 I 1 IO_P69
+bit 612 O 1 IO_P69 611 1 Z
+bit 611 C 1 *
+bit 610 I 1 IO_P68
+bit 609 O 1 IO_P68 608 1 Z
+bit 608 C 1 *
+bit 607 O 1 *
+bit 606 O 1 *
+bit 605 O 1 *
+bit 604 O 1 *
+bit 603 O 1 *
+bit 602 O 1 *
+bit 601 O 1 *
+bit 600 O 1 *
+bit 599 O 1 *
+bit 598 O 1 *
+bit 597 O 1 *
+bit 596 O 1 *
+bit 595 O 1 *
+bit 594 O 1 *
+bit 593 O 1 *
+bit 592 O 1 *
+bit 591 O 1 *
+bit 590 O 1 *
+bit 589 O 1 *
+bit 588 O 1 *
+bit 587 O 1 *
+bit 586 O 1 *
+bit 585 O 1 *
+bit 584 O 1 *
+bit 583 O 1 *
+bit 582 O 1 *
+bit 581 O 1 *
+bit 580 O 1 *
+bit 579 O 1 *
+bit 578 O 1 *
+bit 577 O 1 *
+bit 576 O 1 *
+bit 575 O 1 *
+bit 574 O 1 *
+bit 573 O 1 *
+bit 572 O 1 *
+bit 571 O 1 *
+bit 570 O 1 *
+bit 569 O 1 *
+bit 568 O 1 *
+bit 567 O 1 *
+bit 566 O 1 *
+bit 565 O 1 *
+bit 564 O 1 *
+bit 563 O 1 *
+bit 562 O 1 *
+bit 561 O 1 *
+bit 560 O 1 *
+bit 559 O 1 *
+bit 558 O 1 *
+bit 557 O 1 *
+bit 556 O 1 *
+bit 555 O 1 *
+bit 554 O 1 *
+bit 553 I 1 IO_P65
+bit 552 O 1 IO_P65 551 1 Z
+bit 551 C 1 *
+bit 550 I 1 IO_P63
+bit 549 O 1 IO_P63 548 1 Z
+bit 548 C 1 *
+bit 547 O 1 *
+bit 546 O 1 *
+bit 545 O 1 *
+bit 544 O 1 *
+bit 543 O 1 *
+bit 542 O 1 *
+bit 541 O 1 *
+bit 540 O 1 *
+bit 539 O 1 *
+bit 538 O 1 *
+bit 537 O 1 *
+bit 536 O 1 *
+bit 535 O 1 *
+bit 534 O 1 *
+bit 533 O 1 *
+bit 532 I 1 IO_P60
+bit 531 O 1 IO_P60 530 1 Z
+bit 530 C 1 *
+bit 529 I 1 IO_P59
+bit 528 O 1 IO_P59 527 1 Z
+bit 527 C 1 *
+bit 526 O 1 *
+bit 525 O 1 *
+bit 524 O 1 *
+bit 523 I 1 IO_P58
+bit 522 O 1 IO_P58 521 1 Z
+bit 521 C 1 *
+bit 520 I 1 IO_P57
+bit 519 O 1 IO_P57 518 1 Z
+bit 518 C 1 *
+bit 517 I 1 IO_P56
+bit 516 O 1 IO_P56 515 1 Z
+bit 515 C 1 *
+bit 514 I 1 IO_P55
+bit 513 O 1 IO_P55 512 1 Z
+bit 512 C 1 *
+bit 511 O 1 *
+bit 510 O 1 *
+bit 509 O 1 *
+bit 508 I 1 IO_P53
+bit 507 O 1 IO_P53 506 1 Z
+bit 506 C 1 *
+bit 505 I 1 IO_P52
+bit 504 O 1 IO_P52 503 1 Z
+bit 503 C 1 *
+bit 502 I 1 IO_P51
+bit 501 O 1 IO_P51 500 1 Z
+bit 500 C 1 *
+bit 499 I 1 IO_P50
+bit 498 O 1 IO_P50 497 1 Z
+bit 497 C 1 *
+bit 496 O 1 *
+bit 495 O 1 *
+bit 494 O 1 *
+bit 493 O 1 *
+bit 492 O 1 *
+bit 491 O 1 *
+bit 490 O 1 *
+bit 489 O 1 *
+bit 488 O 1 *
+bit 487 O 1 *
+bit 486 O 1 *
+bit 485 O 1 *
+bit 484 O 1 *
+bit 483 O 1 *
+bit 482 O 1 *
+bit 481 O 1 *
+bit 480 O 1 *
+bit 479 O 1 *
+bit 478 I 1 IO_P47
+bit 477 O 1 IO_P47 476 1 Z
+bit 476 C 1 *
+bit 475 I 1 IO_P46
+bit 474 O 1 IO_P46 473 1 Z
+bit 473 C 1 *
+bit 472 I 1 IO_P44
+bit 471 O 1 IO_P44 470 1 Z
+bit 470 C 1 *
+bit 469 O 1 *
+bit 468 O 1 *
+bit 467 O 1 *
+bit 466 O 1 *
+bit 465 O 1 *
+bit 464 O 1 *
+bit 463 O 1 *
+bit 462 O 1 *
+bit 461 O 1 *
+bit 460 O 1 *
+bit 459 O 1 *
+bit 458 O 1 *
+bit 457 O 1 *
+bit 456 O 1 *
+bit 455 O 1 *
+bit 454 O 1 *
+bit 453 O 1 *
+bit 452 O 1 *
+bit 451 O 1 *
+bit 450 O 1 *
+bit 449 O 1 *
+bit 448 O 1 *
+bit 447 O 1 *
+bit 446 O 1 *
+bit 445 O 1 *
+bit 444 O 1 *
+bit 443 O 1 *
+bit 442 O 1 *
+bit 441 O 1 *
+bit 440 O 1 *
+bit 439 O 1 *
+bit 438 O 1 *
+bit 437 O 1 *
+bit 436 O 1 *
+bit 435 O 1 *
+bit 434 O 1 *
+bit 433 O 1 *
+bit 432 O 1 *
+bit 431 O 1 *
+bit 430 O 1 *
+bit 429 O 1 *
+bit 428 O 1 *
+bit 427 O 1 *
+bit 426 O 1 *
+bit 425 O 1 *
+bit 424 O 1 *
+bit 423 O 1 *
+bit 422 O 1 *
+bit 421 O 1 *
+bit 420 O 1 *
+bit 419 O 1 *
+bit 418 O 1 *
+bit 417 O 1 *
+bit 416 O 1 *
+bit 415 O 1 *
+bit 414 O 1 *
+bit 413 O 1 *
+bit 412 I 1 IO_P41
+bit 411 O 1 IO_P41 410 1 Z
+bit 410 C 1 *
+bit 409 I 1 IO_P40
+bit 408 O 1 IO_P40 407 1 Z
+bit 407 C 1 *
+bit 406 I 1 M2_P39
+bit 405 I 1 M0_P38
+bit 404 I 1 M1_P37
+bit 403 I 1 IO_P36
+bit 402 O 1 IO_P36 401 1 Z
+bit 401 C 1 *
+bit 400 I 1 IO_P35
+bit 399 O 1 IO_P35 398 1 Z
+bit 398 C 1 *
+bit 397 O 1 *
+bit 396 O 1 *
+bit 395 O 1 *
+bit 394 O 1 *
+bit 393 O 1 *
+bit 392 O 1 *
+bit 391 O 1 *
+bit 390 O 1 *
+bit 389 O 1 *
+bit 388 O 1 *
+bit 387 O 1 *
+bit 386 O 1 *
+bit 385 O 1 *
+bit 384 O 1 *
+bit 383 O 1 *
+bit 382 O 1 *
+bit 381 O 1 *
+bit 380 O 1 *
+bit 379 O 1 *
+bit 378 O 1 *
+bit 377 O 1 *
+bit 376 O 1 *
+bit 375 O 1 *
+bit 374 O 1 *
+bit 373 I 1 IO_P33
+bit 372 O 1 IO_P33 371 1 Z
+bit 371 C 1 *
+bit 370 I 1 IO_P32
+bit 369 O 1 IO_P32 368 1 Z
+bit 368 C 1 *
+bit 367 I 1 IO_P31
+bit 366 O 1 IO_P31 365 1 Z
+bit 365 C 1 *
+bit 364 I 1 IO_P30
+bit 363 O 1 IO_P30 362 1 Z
+bit 362 C 1 *
+bit 361 I 1 IO_P28
+bit 360 O 1 IO_P28 359 1 Z
+bit 359 C 1 *
+bit 358 I 1 IO_P27
+bit 357 O 1 IO_P27 356 1 Z
+bit 356 C 1 *
+bit 355 I 1 IO_P26
+bit 354 O 1 IO_P26 353 1 Z
+bit 353 C 1 *
+bit 352 I 1 IO_P25
+bit 351 O 1 IO_P25 350 1 Z
+bit 350 C 1 *
+bit 349 I 1 IO_P24
+bit 348 O 1 IO_P24 347 1 Z
+bit 347 C 1 *
+bit 346 I 1 IO_P23
+bit 345 O 1 IO_P23 344 1 Z
+bit 344 C 1 *
+bit 343 O 1 *
+bit 342 O 1 *
+bit 341 O 1 *
+bit 340 O 1 *
+bit 339 O 1 *
+bit 338 O 1 *
+bit 337 O 1 *
+bit 336 O 1 *
+bit 335 O 1 *
+bit 334 O 1 *
+bit 333 O 1 *
+bit 332 O 1 *
+bit 331 O 1 *
+bit 330 O 1 *
+bit 329 O 1 *
+bit 328 O 1 *
+bit 327 O 1 *
+bit 326 O 1 *
+bit 325 O 1 *
+bit 324 O 1 *
+bit 323 O 1 *
+bit 322 O 1 *
+bit 321 O 1 *
+bit 320 O 1 *
+bit 319 O 1 *
+bit 318 O 1 *
+bit 317 O 1 *
+bit 316 O 1 *
+bit 315 O 1 *
+bit 314 O 1 *
+bit 313 I 1 IO_P21
+bit 312 O 1 IO_P21 311 1 Z
+bit 311 C 1 *
+bit 310 I 1 IO_P20
+bit 309 O 1 IO_P20 308 1 Z
+bit 308 C 1 *
+bit 307 I 1 IO_P18
+bit 306 O 1 IO_P18 305 1 Z
+bit 305 C 1 *
+bit 304 I 1 IO_P17
+bit 303 O 1 IO_P17 302 1 Z
+bit 302 C 1 *
+bit 301 O 1 *
+bit 300 O 1 *
+bit 299 O 1 *
+bit 298 O 1 *
+bit 297 O 1 *
+bit 296 O 1 *
+bit 295 O 1 *
+bit 294 O 1 *
+bit 293 O 1 *
+bit 292 O 1 *
+bit 291 O 1 *
+bit 290 O 1 *
+bit 289 O 1 *
+bit 288 O 1 *
+bit 287 O 1 *
+bit 286 O 1 *
+bit 285 O 1 *
+bit 284 O 1 *
+bit 283 O 1 *
+bit 282 O 1 *
+bit 281 O 1 *
+bit 280 O 1 *
+bit 279 O 1 *
+bit 278 O 1 *
+bit 277 O 1 *
+bit 276 O 1 *
+bit 275 O 1 *
+bit 274 O 1 *
+bit 273 O 1 *
+bit 272 O 1 *
+bit 271 I 1 IO_P15
+bit 270 O 1 IO_P15 269 1 Z
+bit 269 C 1 *
+bit 268 I 1 IO_P14
+bit 267 O 1 IO_P14 266 1 Z
+bit 266 C 1 *
+bit 265 I 1 IO_P13
+bit 264 O 1 IO_P13 263 1 Z
+bit 263 C 1 *
+bit 262 I 1 IO_P12
+bit 261 O 1 IO_P12 260 1 Z
+bit 260 C 1 *
+bit 259 I 1 IO_P11
+bit 258 O 1 IO_P11 257 1 Z
+bit 257 C 1 *
+bit 256 I 1 IO_P10
+bit 255 O 1 IO_P10 254 1 Z
+bit 254 C 1 *
+bit 253 I 1 IO_P8
+bit 252 O 1 IO_P8 251 1 Z
+bit 251 C 1 *
+bit 250 I 1 IO_P7
+bit 249 O 1 IO_P7 248 1 Z
+bit 248 C 1 *
+bit 247 I 1 IO_P6
+bit 246 O 1 IO_P6 245 1 Z
+bit 245 C 1 *
+bit 244 I 1 IO_P5
+bit 243 O 1 IO_P5 242 1 Z
+bit 242 C 1 *
+bit 241 I 1 IO_P4
+bit 240 O 1 IO_P4 239 1 Z
+bit 239 C 1 *
+bit 238 O 1 *
+bit 237 O 1 *
+bit 236 O 1 *
+bit 235 O 1 *
+bit 234 O 1 *
+bit 233 O 1 *
+bit 232 O 1 *
+bit 231 O 1 *
+bit 230 O 1 *
+bit 229 O 1 *
+bit 228 O 1 *
+bit 227 O 1 *
+bit 226 O 1 *
+bit 225 O 1 *
+bit 224 O 1 *
+bit 223 O 1 *
+bit 222 O 1 *
+bit 221 O 1 *
+bit 220 O 1 *
+bit 219 O 1 *
+bit 218 O 1 *
+bit 217 I 1 IO_P2
+bit 216 O 1 IO_P2 215 1 Z
+bit 215 C 1 *
+bit 214 I 1 IO_P1
+bit 213 O 1 IO_P1 212 1 Z
+bit 212 C 1 *
+bit 211 O 1 *
+bit 210 I 1 HSWAP_EN_P142
+bit 209 O 1 *
+bit 208 O 1 *
+bit 207 O 1 *
+bit 206 I 1 IO_P141
+bit 205 O 1 IO_P141 204 1 Z
+bit 204 C 1 *
+bit 203 I 1 IO_P140
+bit 202 O 1 IO_P140 201 1 Z
+bit 201 C 1 *
+bit 200 O 1 *
+bit 199 O 1 *
+bit 198 O 1 *
+bit 197 O 1 *
+bit 196 O 1 *
+bit 195 O 1 *
+bit 194 O 1 *
+bit 193 O 1 *
+bit 192 O 1 *
+bit 191 O 1 *
+bit 190 O 1 *
+bit 189 O 1 *
+bit 188 O 1 *
+bit 187 O 1 *
+bit 186 O 1 *
+bit 185 O 1 *
+bit 184 O 1 *
+bit 183 O 1 *
+bit 182 O 1 *
+bit 181 O 1 *
+bit 180 O 1 *
+bit 179 O 1 *
+bit 178 O 1 *
+bit 177 O 1 *
+bit 176 O 1 *
+bit 175 O 1 *
+bit 174 O 1 *
+bit 173 O 1 *
+bit 172 O 1 *
+bit 171 O 1 *
+bit 170 O 1 *
+bit 169 O 1 *
+bit 168 O 1 *
+bit 167 O 1 *
+bit 166 O 1 *
+bit 165 O 1 *
+bit 164 O 1 *
+bit 163 O 1 *
+bit 162 O 1 *
+bit 161 O 1 *
+bit 160 O 1 *
+bit 159 O 1 *
+bit 158 O 1 *
+bit 157 O 1 *
+bit 156 O 1 *
+bit 155 O 1 *
+bit 154 O 1 *
+bit 153 O 1 *
+bit 152 O 1 *
+bit 151 O 1 *
+bit 150 O 1 *
+bit 149 O 1 *
+bit 148 O 1 *
+bit 147 O 1 *
+bit 146 I 1 IO_P137
+bit 145 O 1 IO_P137 144 1 Z
+bit 144 C 1 *
+bit 143 I 1 IO_P135
+bit 142 O 1 IO_P135 141 1 Z
+bit 141 C 1 *
+bit 140 O 1 *
+bit 139 O 1 *
+bit 138 O 1 *
+bit 137 O 1 *
+bit 136 O 1 *
+bit 135 O 1 *
+bit 134 O 1 *
+bit 133 O 1 *
+bit 132 O 1 *
+bit 131 O 1 *
+bit 130 O 1 *
+bit 129 O 1 *
+bit 128 O 1 *
+bit 127 O 1 *
+bit 126 O 1 *
+bit 125 I 1 IO_P132
+bit 124 O 1 IO_P132 123 1 Z
+bit 123 C 1 *
+bit 122 I 1 IO_P131
+bit 121 O 1 IO_P131 120 1 Z
+bit 120 C 1 *
+bit 119 O 1 *
+bit 118 O 1 *
+bit 117 O 1 *
+bit 116 I 1 IO_P130
+bit 115 O 1 IO_P130 114 1 Z
+bit 114 C 1 *
+bit 113 I 1 IO_P129
+bit 112 O 1 IO_P129 111 1 Z
+bit 111 C 1 *
+bit 110 I 1 IO_P128
+bit 109 O 1 IO_P128 108 1 Z
+bit 108 C 1 *
+bit 107 I 1 IO_P127
+bit 106 O 1 IO_P127 105 1 Z
+bit 105 C 1 *
+bit 104 O 1 *
+bit 103 O 1 *
+bit 102 O 1 *
+bit 101 I 1 IO_P125
+bit 100 O 1 IO_P125 99 1 Z
+bit 99 C 1 *
+bit 98 I 1 IO_P124
+bit 97 O 1 IO_P124 96 1 Z
+bit 96 C 1 *
+bit 95 I 1 IO_P123
+bit 94 O 1 IO_P123 93 1 Z
+bit 93 C 1 *
+bit 92 I 1 IO_P122
+bit 91 O 1 IO_P122 90 1 Z
+bit 90 C 1 *
+bit 89 O 1 *
+bit 88 O 1 *
+bit 87 O 1 *
+bit 86 O 1 *
+bit 85 O 1 *
+bit 84 O 1 *
+bit 83 O 1 *
+bit 82 O 1 *
+bit 81 O 1 *
+bit 80 O 1 *
+bit 79 O 1 *
+bit 78 O 1 *
+bit 77 O 1 *
+bit 76 O 1 *
+bit 75 O 1 *
+bit 74 O 1 *
+bit 73 O 1 *
+bit 72 O 1 *
+bit 71 I 1 IO_P119
+bit 70 O 1 IO_P119 69 1 Z
+bit 69 C 1 *
+bit 68 I 1 IO_P118
+bit 67 O 1 IO_P118 66 1 Z
+bit 66 C 1 *
+bit 65 I 1 IO_P116
+bit 64 O 1 IO_P116 63 1 Z
+bit 63 C 1 *
+bit 62 O 1 *
+bit 61 O 1 *
+bit 60 O 1 *
+bit 59 O 1 *
+bit 58 O 1 *
+bit 57 O 1 *
+bit 56 O 1 *
+bit 55 O 1 *
+bit 54 O 1 *
+bit 53 O 1 *
+bit 52 O 1 *
+bit 51 O 1 *
+bit 50 O 1 *
+bit 49 O 1 *
+bit 48 O 1 *
+bit 47 O 1 *
+bit 46 O 1 *
+bit 45 O 1 *
+bit 44 O 1 *
+bit 43 O 1 *
+bit 42 O 1 *
+bit 41 O 1 *
+bit 40 O 1 *
+bit 39 O 1 *
+bit 38 O 1 *
+bit 37 O 1 *
+bit 36 O 1 *
+bit 35 O 1 *
+bit 34 O 1 *
+bit 33 O 1 *
+bit 32 O 1 *
+bit 31 O 1 *
+bit 30 O 1 *
+bit 29 O 1 *
+bit 28 O 1 *
+bit 27 O 1 *
+bit 26 O 1 *
+bit 25 O 1 *
+bit 24 O 1 *
+bit 23 O 1 *
+bit 22 O 1 *
+bit 21 O 1 *
+bit 20 O 1 *
+bit 19 O 1 *
+bit 18 O 1 *
+bit 17 O 1 *
+bit 16 O 1 *
+bit 15 O 1 *
+bit 14 O 1 *
+bit 13 O 1 *
+bit 12 O 1 *
+bit 11 O 1 *
+bit 10 O 1 *
+bit 9 O 1 *
+bit 8 O 1 *
+bit 7 O 1 *
+bit 6 O 1 *
+bit 5 I 1 IO_P113
+bit 4 O 1 IO_P113 3 1 Z
+bit 3 C 1 *
+bit 2 I 1 IO_P112
+bit 1 O 1 IO_P112 0 1 Z
+bit 0 C 1 *
--- /dev/null
+0000 xc3s4000 0
--- /dev/null
+signal GND1
+signal GND2
+signal GND3
+signal GND4
+signal GND5
+signal GND6
+signal GND7
+signal GND8
+signal GND9
+signal GND10
+signal GND11
+signal GND12
+signal GND13
+signal GND14
+signal GND15
+signal GND16
+signal GND17
+signal GND18
+signal GND19
+signal GND20
+signal GND21
+signal GND22
+signal GND23
+signal GND24
+signal GND25
+signal GND26
+signal GND27
+signal GND28
+signal GND29
+signal GND30
+signal GND31
+signal GND32
+signal GND33
+signal GND34
+signal GND35
+signal GND36
+signal GND37
+signal GND38
+signal GND39
+signal GND40
+signal GND41
+signal GND42
+signal GND43
+signal GND44
+signal GND45
+signal GND46
+signal GND47
+signal GND48
+signal GND49
+signal GND50
+signal GND51
+signal GND52
+signal GND53
+signal GND54
+signal GND55
+signal GND56
+signal GND57
+signal GND58
+signal GND59
+signal GND60
+signal GND61
+signal GND62
+signal GND63
+signal GND64
+signal GND65
+signal GND66
+signal GND67
+signal GND68
+signal GND69
+signal GND70
+signal GND71
+signal GND72
+signal GND73
+signal GND74
+signal GND75
+signal GND76
+signal GND77
+signal GND78
+signal GND79
+signal GND80
+signal GND81
+signal GND82
+signal GND83
+signal GND84
+signal GND85
+signal GND86
+signal GND87
+signal GND88
+signal GND89
+signal GND90
+signal GND91
+signal GND92
+signal GND93
+signal GND94
+signal GND95
+signal GND96
+signal GND97
+signal GND98
+signal GND99
+signal GND100
+signal GND101
+signal GND102
+signal GND103
+signal GND104
+signal GND105
+signal GND106
+signal GND107
+signal GND108
+signal GND109
+signal GND110
+signal GND111
+signal GND112
+signal GND113
+signal GND114
+signal GND115
+signal GND116
+signal GND117
+signal GND118
+signal GND119
+signal GND120
+signal GND121
+signal GND122
+signal GND123
+signal GND124
+signal GND125
+signal GND126
+signal GND127
+signal GND128
+signal GND129
+signal GND130
+signal GND131
+signal GND132
+signal GND133
+signal GND134
+signal GND135
+signal GND136
+signal GND137
+signal GND138
+signal GND139
+signal GND140
+signal GND141
+signal GND142
+signal GND143
+signal GND144
+signal GND145
+signal GND146
+signal GND147
+signal GND148
+signal GND149
+signal NC1
+signal NC2
+signal NC3
+signal NC4
+signal NC5
+signal CCLK_PAD654
+signal DONE_PAD653
+signal HSWAP_EN_PAD137
+signal M0_PAD382
+signal M1_PAD381
+signal M2_PAD383
+signal PROG_B
+signal TCK
+signal TDI
+signal TDO
+signal TMS
+signal VCCAUX1
+signal VCCAUX2
+signal VCCAUX3
+signal VCCAUX4
+signal VCCAUX5
+signal VCCAUX6
+signal VCCAUX7
+signal VCCAUX8
+signal VCCAUX9
+signal VCCAUX10
+signal VCCAUX11
+signal VCCAUX12
+signal VCCAUX13
+signal VCCAUX14
+signal VCCAUX15
+signal VCCAUX16
+signal VCCAUX17
+signal VCCAUX18
+signal VCCAUX19
+signal VCCAUX20
+signal VCCAUX21
+signal VCCAUX22
+signal VCCAUX23
+signal VCCAUX24
+signal VCCAUX25
+signal VCCAUX26
+signal VCCAUX27
+signal VCCAUX28
+signal VCCINT1
+signal VCCINT2
+signal VCCINT3
+signal VCCINT4
+signal VCCINT5
+signal VCCINT6
+signal VCCINT7
+signal VCCINT8
+signal VCCINT9
+signal VCCINT10
+signal VCCINT11
+signal VCCINT12
+signal VCCINT13
+signal VCCINT14
+signal VCCINT15
+signal VCCINT16
+signal VCCINT17
+signal VCCINT18
+signal VCCINT19
+signal VCCINT20
+signal VCCINT21
+signal VCCINT22
+signal VCCINT23
+signal VCCINT24
+signal VCCINT25
+signal VCCINT26
+signal VCCINT27
+signal VCCINT28
+signal VCCINT29
+signal VCCINT30
+signal VCCINT31
+signal VCCINT32
+signal VCCINT33
+signal VCCINT34
+signal VCCINT35
+signal VCCINT36
+signal VCCO01
+signal VCCO02
+signal VCCO03
+signal VCCO04
+signal VCCO05
+signal VCCO06
+signal VCCO07
+signal VCCO08
+signal VCCO09
+signal VCCO010
+signal VCCO011
+signal VCCO012
+signal VCCO11
+signal VCCO12
+signal VCCO13
+signal VCCO14
+signal VCCO15
+signal VCCO16
+signal VCCO17
+signal VCCO18
+signal VCCO19
+signal VCCO110
+signal VCCO111
+signal VCCO112
+signal VCCO21
+signal VCCO22
+signal VCCO23
+signal VCCO24
+signal VCCO25
+signal VCCO26
+signal VCCO27
+signal VCCO28
+signal VCCO29
+signal VCCO210
+signal VCCO31
+signal VCCO32
+signal VCCO33
+signal VCCO34
+signal VCCO35
+signal VCCO36
+signal VCCO37
+signal VCCO38
+signal VCCO39
+signal VCCO310
+signal VCCO41
+signal VCCO42
+signal VCCO43
+signal VCCO44
+signal VCCO45
+signal VCCO46
+signal VCCO47
+signal VCCO48
+signal VCCO49
+signal VCCO410
+signal VCCO411
+signal VCCO412
+signal VCCO51
+signal VCCO52
+signal VCCO53
+signal VCCO54
+signal VCCO55
+signal VCCO56
+signal VCCO57
+signal VCCO58
+signal VCCO59
+signal VCCO510
+signal VCCO511
+signal VCCO512
+signal VCCO61
+signal VCCO62
+signal VCCO63
+signal VCCO64
+signal VCCO65
+signal VCCO66
+signal VCCO67
+signal VCCO68
+signal VCCO69
+signal VCCO610
+signal VCCO71
+signal VCCO72
+signal VCCO73
+signal VCCO74
+signal VCCO75
+signal VCCO76
+signal VCCO77
+signal VCCO78
+signal VCCO79
+signal VCCO710
+signal IO_PAD2
+signal IO_PAD3
+signal IO_PAD4
+signal IO_PAD5
+signal IO_PAD7
+signal IO_PAD9
+signal IO_PAD10
+signal IO_PAD11
+signal IO_PAD13
+signal IO_PAD14
+signal IO_PAD15
+signal IO_PAD17
+signal IO_PAD19
+signal IO_PAD21
+signal IO_PAD23
+signal IO_PAD25
+signal IO_PAD26
+signal IO_PAD27
+signal IO_PAD28
+signal IO_PAD29
+signal IO_PAD31
+signal IO_PAD33
+signal IO_PAD34
+signal IO_PAD35
+signal IO_PAD37
+signal IO_PAD38
+signal IO_PAD39
+signal IO_PAD41
+signal IO_PAD43
+signal IO_PAD45
+signal IO_PAD46
+signal IO_PAD47
+signal IO_PAD49
+signal IO_PAD50
+signal IO_PAD51
+signal IO_PAD53
+signal IO_PAD55
+signal IO_PAD57
+signal IO_PAD58
+signal IO_PAD59
+signal IO_PAD61
+signal IO_PAD62
+signal IO_PAD63
+signal IO_PAD65
+signal IO_PAD67
+signal IO_PAD69
+signal IO_PAD70
+signal IO_PAD71
+signal IO_PAD73
+signal IO_PAD74
+signal IO_PAD75
+signal IO_PAD77
+signal IO_PAD79
+signal IO_PAD80
+signal IO_PAD81
+signal IO_PAD83
+signal IO_PAD85
+signal IO_PAD87
+signal IO_PAD89
+signal IO_PAD91
+signal IO_PAD92
+signal IO_PAD93
+signal IO_PAD95
+signal IO_PAD97
+signal IO_PAD98
+signal IO_PAD99
+signal IO_PAD101
+signal IO_PAD102
+signal IO_PAD103
+signal IO_PAD104
+signal IO_PAD105
+signal IO_PAD107
+signal IO_PAD109
+signal IO_PAD111
+signal IO_PAD113
+signal IO_PAD115
+signal IO_PAD117
+signal IO_PAD119
+signal IO_PAD120
+signal IO_PAD121
+signal IO_PAD122
+signal IO_PAD123
+signal IO_PAD125
+signal IO_PAD127
+signal IO_PAD129
+signal IO_PAD130
+signal IO_PAD131
+signal IO_PAD133
+signal IO_PAD135
+signal IO_PAD136
+signal IO_PAD141
+signal IO_PAD142
+signal IO_PAD143
+signal IO_PAD145
+signal IO_PAD146
+signal IO_PAD147
+signal IO_PAD149
+signal IO_PAD150
+signal IO_PAD151
+signal IO_PAD153
+signal IO_PAD154
+signal IO_PAD155
+signal IO_PAD157
+signal IO_PAD159
+signal IO_PAD161
+signal IO_PAD163
+signal IO_PAD164
+signal IO_PAD165
+signal IO_PAD166
+signal IO_PAD167
+signal IO_PAD169
+signal IO_PAD171
+signal IO_PAD172
+signal IO_PAD173
+signal IO_PAD174
+signal IO_PAD175
+signal IO_PAD176
+signal IO_PAD177
+signal IO_PAD179
+signal IO_PAD181
+signal IO_PAD182
+signal IO_PAD183
+signal IO_PAD184
+signal IO_PAD185
+signal IO_PAD187
+signal IO_PAD188
+signal IO_PAD189
+signal IO_PAD191
+signal IO_PAD192
+signal IO_PAD193
+signal IO_PAD195
+signal IO_PAD196
+signal IO_PAD197
+signal IO_PAD198
+signal IO_PAD199
+signal IO_PAD201
+signal IO_PAD203
+signal IO_PAD204
+signal IO_PAD205
+signal IO_PAD206
+signal IO_PAD207
+signal IO_PAD208
+signal IO_PAD209
+signal IO_PAD210
+signal IO_PAD211
+signal IO_PAD213
+signal IO_PAD215
+signal IO_PAD217
+signal IO_PAD218
+signal IO_PAD219
+signal IO_PAD220
+signal IO_PAD221
+signal IO_PAD223
+signal IO_PAD225
+signal IO_PAD226
+signal IO_PAD227
+signal IO_PAD228
+signal IO_PAD229
+signal IO_PAD231
+signal IO_PAD233
+signal IO_PAD234
+signal IO_PAD235
+signal IO_PAD236
+signal IO_PAD237
+signal IO_PAD239
+signal IO_PAD240
+signal IO_PAD241
+signal IO_PAD243
+signal IO_PAD245
+signal IO_PAD247
+signal IO_PAD249
+signal IO_PAD250
+signal IO_PAD251
+signal IO_PAD252
+signal IO_PAD253
+signal IO_PAD255
+signal IO_PAD257
+signal IO_PAD258
+signal IO_PAD260
+signal IO_PAD261
+signal IO_PAD263
+signal IO_PAD265
+signal IO_PAD266
+signal IO_PAD267
+signal IO_PAD268
+signal IO_PAD269
+signal IO_PAD271
+signal IO_PAD273
+signal IO_PAD275
+signal IO_PAD277
+signal IO_PAD278
+signal IO_PAD279
+signal IO_PAD281
+signal IO_PAD282
+signal IO_PAD283
+signal IO_PAD284
+signal IO_PAD285
+signal IO_PAD287
+signal IO_PAD289
+signal IO_PAD290
+signal IO_PAD291
+signal IO_PAD292
+signal IO_PAD293
+signal IO_PAD295
+signal IO_PAD297
+signal IO_PAD298
+signal IO_PAD299
+signal IO_PAD300
+signal IO_PAD301
+signal IO_PAD303
+signal IO_PAD305
+signal IO_PAD307
+signal IO_PAD308
+signal IO_PAD309
+signal IO_PAD310
+signal IO_PAD311
+signal IO_PAD312
+signal IO_PAD313
+signal IO_PAD314
+signal IO_PAD315
+signal IO_PAD317
+signal IO_PAD319
+signal IO_PAD320
+signal IO_PAD321
+signal IO_PAD322
+signal IO_PAD323
+signal IO_PAD325
+signal IO_PAD326
+signal IO_PAD327
+signal IO_PAD329
+signal IO_PAD330
+signal IO_PAD331
+signal IO_PAD333
+signal IO_PAD334
+signal IO_PAD335
+signal IO_PAD336
+signal IO_PAD337
+signal IO_PAD339
+signal IO_PAD341
+signal IO_PAD342
+signal IO_PAD343
+signal IO_PAD344
+signal IO_PAD345
+signal IO_PAD346
+signal IO_PAD347
+signal IO_PAD349
+signal IO_PAD351
+signal IO_PAD352
+signal IO_PAD353
+signal IO_PAD354
+signal IO_PAD355
+signal IO_PAD357
+signal IO_PAD359
+signal IO_PAD361
+signal IO_PAD363
+signal IO_PAD364
+signal IO_PAD365
+signal IO_PAD367
+signal IO_PAD368
+signal IO_PAD369
+signal IO_PAD371
+signal IO_PAD372
+signal IO_PAD373
+signal IO_PAD375
+signal IO_PAD376
+signal IO_PAD377
+signal IO_PAD384
+signal IO_PAD385
+signal IO_PAD387
+signal IO_PAD389
+signal IO_PAD390
+signal IO_PAD391
+signal IO_PAD393
+signal IO_PAD395
+signal IO_PAD397
+signal IO_PAD398
+signal IO_PAD399
+signal IO_PAD400
+signal IO_PAD401
+signal IO_PAD403
+signal IO_PAD405
+signal IO_PAD406
+signal IO_PAD407
+signal IO_PAD409
+signal IO_PAD411
+signal IO_PAD413
+signal IO_PAD414
+signal IO_PAD415
+signal IO_PAD416
+signal IO_PAD417
+signal IO_PAD419
+signal IO_PAD420
+signal IO_PAD421
+signal IO_PAD423
+signal IO_PAD425
+signal IO_PAD426
+signal IO_PAD427
+signal IO_PAD429
+signal IO_PAD431
+signal IO_PAD433
+signal IO_PAD435
+signal IO_PAD437
+signal IO_PAD438
+signal IO_PAD439
+signal IO_PAD441
+signal IO_PAD443
+signal IO_PAD444
+signal IO_PAD445
+signal IO_PAD447
+signal IO_PAD448
+signal IO_PAD449
+signal IO_PAD451
+signal IO_PAD453
+signal IO_PAD455
+signal IO_PAD456
+signal IO_PAD457
+signal IO_PAD459
+signal IO_PAD460
+signal IO_PAD461
+signal IO_PAD463
+signal IO_PAD465
+signal IO_PAD467
+signal IO_PAD468
+signal IO_PAD469
+signal IO_PAD471
+signal IO_PAD472
+signal IO_PAD473
+signal IO_PAD475
+signal IO_PAD477
+signal IO_PAD479
+signal IO_PAD480
+signal IO_PAD481
+signal IO_PAD483
+signal IO_PAD484
+signal IO_PAD485
+signal IO_PAD487
+signal IO_PAD489
+signal IO_PAD490
+signal IO_PAD491
+signal IO_PAD492
+signal IO_PAD493
+signal IO_PAD495
+signal IO_PAD497
+signal IO_PAD499
+signal IO_PAD501
+signal IO_PAD503
+signal IO_PAD504
+signal IO_PAD505
+signal IO_PAD507
+signal IO_PAD508
+signal IO_PAD509
+signal IO_PAD511
+signal IO_PAD513
+signal IO_PAD514
+signal IO_PAD515
+signal IO_PAD516
+signal IO_PAD518
+signal IO_PAD519
+signal IO_PAD520
+signal IO_PAD521
+signal IO_PAD523
+signal IO_PAD525
+signal IO_PAD526
+signal IO_PAD527
+signal IO_PAD529
+signal IO_PAD530
+signal IO_PAD531
+signal IO_PAD533
+signal IO_PAD535
+signal IO_PAD537
+signal IO_PAD539
+signal IO_PAD541
+signal IO_PAD542
+signal IO_PAD543
+signal IO_PAD544
+signal IO_PAD545
+signal IO_PAD547
+signal IO_PAD549
+signal IO_PAD550
+signal IO_PAD551
+signal IO_PAD553
+signal IO_PAD554
+signal IO_PAD555
+signal IO_PAD557
+signal IO_PAD559
+signal IO_PAD561
+signal IO_PAD562
+signal IO_PAD563
+signal IO_PAD565
+signal IO_PAD566
+signal IO_PAD567
+signal IO_PAD569
+signal IO_PAD571
+signal IO_PAD573
+signal IO_PAD574
+signal IO_PAD575
+signal IO_PAD577
+signal IO_PAD578
+signal IO_PAD579
+signal IO_PAD581
+signal IO_PAD583
+signal IO_PAD585
+signal IO_PAD586
+signal IO_PAD587
+signal IO_PAD589
+signal IO_PAD590
+signal IO_PAD591
+signal IO_PAD593
+signal IO_PAD595
+signal IO_PAD596
+signal IO_PAD597
+signal IO_PAD599
+signal IO_PAD601
+signal IO_PAD603
+signal IO_PAD605
+signal IO_PAD607
+signal IO_PAD608
+signal IO_PAD609
+signal IO_PAD611
+signal IO_PAD613
+signal IO_PAD614
+signal IO_PAD615
+signal IO_PAD617
+signal IO_PAD618
+signal IO_PAD619
+signal IO_PAD620
+signal IO_PAD621
+signal IO_PAD623
+signal IO_PAD625
+signal IO_PAD627
+signal IO_PAD629
+signal IO_PAD631
+signal IO_PAD633
+signal IO_PAD635
+signal IO_PAD636
+signal IO_PAD637
+signal IO_PAD638
+signal IO_PAD639
+signal IO_PAD641
+signal IO_PAD643
+signal IO_PAD645
+signal IO_PAD646
+signal IO_PAD647
+signal IO_PAD649
+signal IO_PAD651
+signal IO_PAD652
+signal IO_PAD657
+signal IO_PAD658
+signal IO_PAD659
+signal IO_PAD661
+signal IO_PAD662
+signal IO_PAD663
+signal IO_PAD665
+signal IO_PAD666
+signal IO_PAD667
+signal IO_PAD669
+signal IO_PAD670
+signal IO_PAD671
+signal IO_PAD673
+signal IO_PAD675
+signal IO_PAD677
+signal IO_PAD679
+signal IO_PAD680
+signal IO_PAD681
+signal IO_PAD682
+signal IO_PAD683
+signal IO_PAD685
+signal IO_PAD687
+signal IO_PAD688
+signal IO_PAD689
+signal IO_PAD690
+signal IO_PAD691
+signal IO_PAD692
+signal IO_PAD693
+signal IO_PAD695
+signal IO_PAD697
+signal IO_PAD698
+signal IO_PAD699
+signal IO_PAD700
+signal IO_PAD701
+signal IO_PAD703
+signal IO_PAD704
+signal IO_PAD705
+signal IO_PAD707
+signal IO_PAD708
+signal IO_PAD709
+signal IO_PAD711
+signal IO_PAD712
+signal IO_PAD713
+signal IO_PAD714
+signal IO_PAD715
+signal IO_PAD717
+signal IO_PAD719
+signal IO_PAD720
+signal IO_PAD721
+signal IO_PAD722
+signal IO_PAD723
+signal IO_PAD724
+signal IO_PAD725
+signal IO_PAD726
+signal IO_PAD727
+signal IO_PAD729
+signal IO_PAD731
+signal IO_PAD733
+signal IO_PAD734
+signal IO_PAD735
+signal IO_PAD736
+signal IO_PAD737
+signal IO_PAD739
+signal IO_PAD741
+signal IO_PAD742
+signal IO_PAD743
+signal IO_PAD744
+signal IO_PAD745
+signal IO_PAD747
+signal IO_PAD749
+signal IO_PAD750
+signal IO_PAD751
+signal IO_PAD752
+signal IO_PAD753
+signal IO_PAD755
+signal IO_PAD756
+signal IO_PAD757
+signal IO_PAD759
+signal IO_PAD761
+signal IO_PAD763
+signal IO_PAD765
+signal IO_PAD766
+signal IO_PAD767
+signal IO_PAD768
+signal IO_PAD769
+signal IO_PAD771
+signal IO_PAD773
+signal IO_PAD774
+signal IO_PAD776
+signal IO_PAD777
+signal IO_PAD779
+signal IO_PAD781
+signal IO_PAD782
+signal IO_PAD783
+signal IO_PAD784
+signal IO_PAD785
+signal IO_PAD787
+signal IO_PAD789
+signal IO_PAD791
+signal IO_PAD793
+signal IO_PAD794
+signal IO_PAD795
+signal IO_PAD797
+signal IO_PAD798
+signal IO_PAD799
+signal IO_PAD800
+signal IO_PAD801
+signal IO_PAD803
+signal IO_PAD805
+signal IO_PAD806
+signal IO_PAD807
+signal IO_PAD808
+signal IO_PAD809
+signal IO_PAD811
+signal IO_PAD813
+signal IO_PAD814
+signal IO_PAD815
+signal IO_PAD816
+signal IO_PAD817
+signal IO_PAD819
+signal IO_PAD821
+signal IO_PAD823
+signal IO_PAD824
+signal IO_PAD825
+signal IO_PAD826
+signal IO_PAD827
+signal IO_PAD828
+signal IO_PAD829
+signal IO_PAD830
+signal IO_PAD831
+signal IO_PAD833
+signal IO_PAD835
+signal IO_PAD836
+signal IO_PAD837
+signal IO_PAD838
+signal IO_PAD839
+signal IO_PAD841
+signal IO_PAD842
+signal IO_PAD843
+signal IO_PAD845
+signal IO_PAD846
+signal IO_PAD847
+signal IO_PAD849
+signal IO_PAD850
+signal IO_PAD851
+signal IO_PAD852
+signal IO_PAD853
+signal IO_PAD855
+signal IO_PAD857
+signal IO_PAD858
+signal IO_PAD859
+signal IO_PAD860
+signal IO_PAD861
+signal IO_PAD862
+signal IO_PAD863
+signal IO_PAD865
+signal IO_PAD867
+signal IO_PAD868
+signal IO_PAD869
+signal IO_PAD870
+signal IO_PAD871
+signal IO_PAD873
+signal IO_PAD875
+signal IO_PAD877
+signal IO_PAD879
+signal IO_PAD880
+signal IO_PAD881
+signal IO_PAD883
+signal IO_PAD884
+signal IO_PAD885
+signal IO_PAD887
+signal IO_PAD888
+signal IO_PAD889
+signal IO_PAD891
+signal IO_PAD892
+signal IO_PAD893
+signal IO_PAD898
+signal IO_PAD899
+signal IO_PAD901
+signal IO_PAD903
+signal IO_PAD904
+signal IO_PAD905
+signal IO_PAD907
+signal IO_PAD909
+signal IO_PAD911
+signal IO_PAD912
+signal IO_PAD913
+signal IO_PAD914
+signal IO_PAD915
+signal IO_PAD917
+signal IO_PAD919
+signal IO_PAD920
+signal IO_PAD921
+signal IO_PAD923
+signal IO_PAD925
+signal IO_PAD927
+signal IO_PAD928
+signal IO_PAD929
+signal IO_PAD930
+signal IO_PAD931
+signal IO_PAD933
+signal IO_PAD934
+signal IO_PAD935
+signal IO_PAD937
+signal IO_PAD939
+signal IO_PAD940
+signal IO_PAD941
+signal IO_PAD943
+signal IO_PAD945
+signal IO_PAD947
+signal IO_PAD949
+signal IO_PAD951
+signal IO_PAD952
+signal IO_PAD953
+signal IO_PAD955
+signal IO_PAD957
+signal IO_PAD958
+signal IO_PAD959
+signal IO_PAD961
+signal IO_PAD962
+signal IO_PAD963
+signal IO_PAD965
+signal IO_PAD967
+signal IO_PAD969
+signal IO_PAD970
+signal IO_PAD971
+signal IO_PAD973
+signal IO_PAD974
+signal IO_PAD975
+signal IO_PAD977
+signal IO_PAD979
+signal IO_PAD981
+signal IO_PAD982
+signal IO_PAD983
+signal IO_PAD985
+signal IO_PAD986
+signal IO_PAD987
+signal IO_PAD989
+signal IO_PAD991
+signal IO_PAD993
+signal IO_PAD994
+signal IO_PAD995
+signal IO_PAD997
+signal IO_PAD998
+signal IO_PAD999
+signal IO_PAD1001
+signal IO_PAD1003
+signal IO_PAD1004
+signal IO_PAD1005
+signal IO_PAD1006
+signal IO_PAD1007
+signal IO_PAD1009
+signal IO_PAD1011
+signal IO_PAD1013
+signal IO_PAD1015
+signal IO_PAD1017
+signal IO_PAD1018
+signal IO_PAD1019
+signal IO_PAD1021
+signal IO_PAD1022
+signal IO_PAD1023
+signal IO_PAD1025
+signal IO_PAD1027
+signal IO_PAD1028
+signal IO_PAD1029
+
+register BSR 2243
+register BR 1
+register DIR 32
+
+instruction length 6
+
+instruction EXTEST 000000 BSR
+instruction SAMPLE/PRELOAD 000001 BSR
+instruction IDCODE 001001 DIR
+instruction BYPASS 111111 BR
+
+bit 2242 I 1 IO_PAD893
+bit 2241 O 1 IO_PAD893 2240 1 Z
+bit 2240 C 1 *
+bit 2239 I 1 IO_PAD892
+bit 2238 O 1 IO_PAD892 2237 1 Z
+bit 2237 C 1 *
+bit 2236 I 1 IO_PAD891
+bit 2235 O 1 IO_PAD891 2234 1 Z
+bit 2234 C 1 *
+bit 2233 I 1 IO_PAD889
+bit 2232 O 1 IO_PAD889 2231 1 Z
+bit 2231 C 1 *
+bit 2230 I 1 IO_PAD888
+bit 2229 O 1 IO_PAD888 2228 1 Z
+bit 2228 C 1 *
+bit 2227 I 1 IO_PAD887
+bit 2226 O 1 IO_PAD887 2225 1 Z
+bit 2225 C 1 *
+bit 2224 I 1 IO_PAD885
+bit 2223 O 1 IO_PAD885 2222 1 Z
+bit 2222 C 1 *
+bit 2221 I 1 IO_PAD884
+bit 2220 O 1 IO_PAD884 2219 1 Z
+bit 2219 C 1 *
+bit 2218 I 1 IO_PAD883
+bit 2217 O 1 IO_PAD883 2216 1 Z
+bit 2216 C 1 *
+bit 2215 I 1 IO_PAD881
+bit 2214 O 1 IO_PAD881 2213 1 Z
+bit 2213 C 1 *
+bit 2212 I 1 IO_PAD880
+bit 2211 O 1 IO_PAD880 2210 1 Z
+bit 2210 C 1 *
+bit 2209 I 1 IO_PAD879
+bit 2208 O 1 IO_PAD879 2207 1 Z
+bit 2207 C 1 *
+bit 2206 I 1 IO_PAD877
+bit 2205 O 1 IO_PAD877 2204 1 Z
+bit 2204 C 1 *
+bit 2203 O 1 *
+bit 2202 O 1 *
+bit 2201 O 1 *
+bit 2200 O 1 *
+bit 2199 O 1 *
+bit 2198 O 1 *
+bit 2197 I 1 IO_PAD875
+bit 2196 O 1 IO_PAD875 2195 1 Z
+bit 2195 C 1 *
+bit 2194 I 1 IO_PAD873
+bit 2193 O 1 IO_PAD873 2192 1 Z
+bit 2192 C 1 *
+bit 2191 I 1 IO_PAD871
+bit 2190 O 1 IO_PAD871 2189 1 Z
+bit 2189 C 1 *
+bit 2188 I 1 IO_PAD870
+bit 2187 O 1 IO_PAD870 2186 1 Z
+bit 2186 C 1 *
+bit 2185 I 1 IO_PAD869
+bit 2184 O 1 IO_PAD869 2183 1 Z
+bit 2183 C 1 *
+bit 2182 I 1 IO_PAD868
+bit 2181 O 1 IO_PAD868 2180 1 Z
+bit 2180 C 1 *
+bit 2179 I 1 IO_PAD867
+bit 2178 O 1 IO_PAD867 2177 1 Z
+bit 2177 C 1 *
+bit 2176 I 1 IO_PAD865
+bit 2175 O 1 IO_PAD865 2174 1 Z
+bit 2174 C 1 *
+bit 2173 I 1 IO_PAD863
+bit 2172 O 1 IO_PAD863 2171 1 Z
+bit 2171 C 1 *
+bit 2170 I 1 IO_PAD862
+bit 2169 O 1 IO_PAD862 2168 1 Z
+bit 2168 C 1 *
+bit 2167 I 1 IO_PAD861
+bit 2166 O 1 IO_PAD861 2165 1 Z
+bit 2165 C 1 *
+bit 2164 I 1 IO_PAD860
+bit 2163 O 1 IO_PAD860 2162 1 Z
+bit 2162 C 1 *
+bit 2161 I 1 IO_PAD859
+bit 2160 O 1 IO_PAD859 2159 1 Z
+bit 2159 C 1 *
+bit 2158 I 1 IO_PAD858
+bit 2157 O 1 IO_PAD858 2156 1 Z
+bit 2156 C 1 *
+bit 2155 I 1 IO_PAD857
+bit 2154 O 1 IO_PAD857 2153 1 Z
+bit 2153 C 1 *
+bit 2152 I 1 IO_PAD855
+bit 2151 O 1 IO_PAD855 2150 1 Z
+bit 2150 C 1 *
+bit 2149 I 1 IO_PAD853
+bit 2148 O 1 IO_PAD853 2147 1 Z
+bit 2147 C 1 *
+bit 2146 I 1 IO_PAD852
+bit 2145 O 1 IO_PAD852 2144 1 Z
+bit 2144 C 1 *
+bit 2143 I 1 IO_PAD851
+bit 2142 O 1 IO_PAD851 2141 1 Z
+bit 2141 C 1 *
+bit 2140 I 1 IO_PAD850
+bit 2139 O 1 IO_PAD850 2138 1 Z
+bit 2138 C 1 *
+bit 2137 I 1 IO_PAD849
+bit 2136 O 1 IO_PAD849 2135 1 Z
+bit 2135 C 1 *
+bit 2134 I 1 IO_PAD847
+bit 2133 O 1 IO_PAD847 2132 1 Z
+bit 2132 C 1 *
+bit 2131 I 1 IO_PAD846
+bit 2130 O 1 IO_PAD846 2129 1 Z
+bit 2129 C 1 *
+bit 2128 O 1 *
+bit 2127 O 1 *
+bit 2126 O 1 *
+bit 2125 O 1 *
+bit 2124 O 1 *
+bit 2123 O 1 *
+bit 2122 I 1 IO_PAD845
+bit 2121 O 1 IO_PAD845 2120 1 Z
+bit 2120 C 1 *
+bit 2119 I 1 IO_PAD843
+bit 2118 O 1 IO_PAD843 2117 1 Z
+bit 2117 C 1 *
+bit 2116 I 1 IO_PAD842
+bit 2115 O 1 IO_PAD842 2114 1 Z
+bit 2114 C 1 *
+bit 2113 I 1 IO_PAD841
+bit 2112 O 1 IO_PAD841 2111 1 Z
+bit 2111 C 1 *
+bit 2110 I 1 IO_PAD839
+bit 2109 O 1 IO_PAD839 2108 1 Z
+bit 2108 C 1 *
+bit 2107 I 1 IO_PAD838
+bit 2106 O 1 IO_PAD838 2105 1 Z
+bit 2105 C 1 *
+bit 2104 I 1 IO_PAD837
+bit 2103 O 1 IO_PAD837 2102 1 Z
+bit 2102 C 1 *
+bit 2101 I 1 IO_PAD836
+bit 2100 O 1 IO_PAD836 2099 1 Z
+bit 2099 C 1 *
+bit 2098 I 1 IO_PAD835
+bit 2097 O 1 IO_PAD835 2096 1 Z
+bit 2096 C 1 *
+bit 2095 I 1 IO_PAD833
+bit 2094 O 1 IO_PAD833 2093 1 Z
+bit 2093 C 1 *
+bit 2092 I 1 IO_PAD831
+bit 2091 O 1 IO_PAD831 2090 1 Z
+bit 2090 C 1 *
+bit 2089 I 1 IO_PAD830
+bit 2088 O 1 IO_PAD830 2087 1 Z
+bit 2087 C 1 *
+bit 2086 I 1 IO_PAD829
+bit 2085 O 1 IO_PAD829 2084 1 Z
+bit 2084 C 1 *
+bit 2083 I 1 IO_PAD828
+bit 2082 O 1 IO_PAD828 2081 1 Z
+bit 2081 C 1 *
+bit 2080 I 1 IO_PAD827
+bit 2079 O 1 IO_PAD827 2078 1 Z
+bit 2078 C 1 *
+bit 2077 I 1 IO_PAD826
+bit 2076 O 1 IO_PAD826 2075 1 Z
+bit 2075 C 1 *
+bit 2074 I 1 IO_PAD825
+bit 2073 O 1 IO_PAD825 2072 1 Z
+bit 2072 C 1 *
+bit 2071 I 1 IO_PAD824
+bit 2070 O 1 IO_PAD824 2069 1 Z
+bit 2069 C 1 *
+bit 2068 I 1 IO_PAD823
+bit 2067 O 1 IO_PAD823 2066 1 Z
+bit 2066 C 1 *
+bit 2065 I 1 IO_PAD821
+bit 2064 O 1 IO_PAD821 2063 1 Z
+bit 2063 C 1 *
+bit 2062 O 1 *
+bit 2061 O 1 *
+bit 2060 O 1 *
+bit 2059 O 1 *
+bit 2058 O 1 *
+bit 2057 O 1 *
+bit 2056 I 1 IO_PAD819
+bit 2055 O 1 IO_PAD819 2054 1 Z
+bit 2054 C 1 *
+bit 2053 I 1 IO_PAD817
+bit 2052 O 1 IO_PAD817 2051 1 Z
+bit 2051 C 1 *
+bit 2050 I 1 IO_PAD816
+bit 2049 O 1 IO_PAD816 2048 1 Z
+bit 2048 C 1 *
+bit 2047 I 1 IO_PAD815
+bit 2046 O 1 IO_PAD815 2045 1 Z
+bit 2045 C 1 *
+bit 2044 I 1 IO_PAD814
+bit 2043 O 1 IO_PAD814 2042 1 Z
+bit 2042 C 1 *
+bit 2041 I 1 IO_PAD813
+bit 2040 O 1 IO_PAD813 2039 1 Z
+bit 2039 C 1 *
+bit 2038 I 1 IO_PAD811
+bit 2037 O 1 IO_PAD811 2036 1 Z
+bit 2036 C 1 *
+bit 2035 I 1 IO_PAD809
+bit 2034 O 1 IO_PAD809 2033 1 Z
+bit 2033 C 1 *
+bit 2032 I 1 IO_PAD808
+bit 2031 O 1 IO_PAD808 2030 1 Z
+bit 2030 C 1 *
+bit 2029 I 1 IO_PAD807
+bit 2028 O 1 IO_PAD807 2027 1 Z
+bit 2027 C 1 *
+bit 2026 I 1 IO_PAD806
+bit 2025 O 1 IO_PAD806 2024 1 Z
+bit 2024 C 1 *
+bit 2023 I 1 IO_PAD805
+bit 2022 O 1 IO_PAD805 2021 1 Z
+bit 2021 C 1 *
+bit 2020 I 1 IO_PAD803
+bit 2019 O 1 IO_PAD803 2018 1 Z
+bit 2018 C 1 *
+bit 2017 I 1 IO_PAD801
+bit 2016 O 1 IO_PAD801 2015 1 Z
+bit 2015 C 1 *
+bit 2014 I 1 IO_PAD800
+bit 2013 O 1 IO_PAD800 2012 1 Z
+bit 2012 C 1 *
+bit 2011 I 1 IO_PAD799
+bit 2010 O 1 IO_PAD799 2009 1 Z
+bit 2009 C 1 *
+bit 2008 I 1 IO_PAD798
+bit 2007 O 1 IO_PAD798 2006 1 Z
+bit 2006 C 1 *
+bit 2005 I 1 IO_PAD797
+bit 2004 O 1 IO_PAD797 2003 1 Z
+bit 2003 C 1 *
+bit 2002 I 1 IO_PAD795
+bit 2001 O 1 IO_PAD795 2000 1 Z
+bit 2000 C 1 *
+bit 1999 I 1 IO_PAD794
+bit 1998 O 1 IO_PAD794 1997 1 Z
+bit 1997 C 1 *
+bit 1996 I 1 IO_PAD793
+bit 1995 O 1 IO_PAD793 1994 1 Z
+bit 1994 C 1 *
+bit 1993 I 1 IO_PAD791
+bit 1992 O 1 IO_PAD791 1991 1 Z
+bit 1991 C 1 *
+bit 1990 I 1 IO_PAD789
+bit 1989 O 1 IO_PAD789 1988 1 Z
+bit 1988 C 1 *
+bit 1987 O 1 *
+bit 1986 O 1 *
+bit 1985 O 1 *
+bit 1984 O 1 *
+bit 1983 O 1 *
+bit 1982 O 1 *
+bit 1981 I 1 IO_PAD787
+bit 1980 O 1 IO_PAD787 1979 1 Z
+bit 1979 C 1 *
+bit 1978 I 1 IO_PAD785
+bit 1977 O 1 IO_PAD785 1976 1 Z
+bit 1976 C 1 *
+bit 1975 I 1 IO_PAD784
+bit 1974 O 1 IO_PAD784 1973 1 Z
+bit 1973 C 1 *
+bit 1972 I 1 IO_PAD783
+bit 1971 O 1 IO_PAD783 1970 1 Z
+bit 1970 C 1 *
+bit 1969 I 1 IO_PAD782
+bit 1968 O 1 IO_PAD782 1967 1 Z
+bit 1967 C 1 *
+bit 1966 I 1 IO_PAD781
+bit 1965 O 1 IO_PAD781 1964 1 Z
+bit 1964 C 1 *
+bit 1963 I 1 IO_PAD779
+bit 1962 O 1 IO_PAD779 1961 1 Z
+bit 1961 C 1 *
+bit 1960 I 1 IO_PAD777
+bit 1959 O 1 IO_PAD777 1958 1 Z
+bit 1958 C 1 *
+bit 1957 I 1 IO_PAD776
+bit 1956 O 1 IO_PAD776 1955 1 Z
+bit 1955 C 1 *
+bit 1954 I 1 IO_PAD774
+bit 1953 O 1 IO_PAD774 1952 1 Z
+bit 1952 C 1 *
+bit 1951 I 1 IO_PAD773
+bit 1950 O 1 IO_PAD773 1949 1 Z
+bit 1949 C 1 *
+bit 1948 I 1 IO_PAD771
+bit 1947 O 1 IO_PAD771 1946 1 Z
+bit 1946 C 1 *
+bit 1945 I 1 IO_PAD769
+bit 1944 O 1 IO_PAD769 1943 1 Z
+bit 1943 C 1 *
+bit 1942 I 1 IO_PAD768
+bit 1941 O 1 IO_PAD768 1940 1 Z
+bit 1940 C 1 *
+bit 1939 I 1 IO_PAD767
+bit 1938 O 1 IO_PAD767 1937 1 Z
+bit 1937 C 1 *
+bit 1936 I 1 IO_PAD766
+bit 1935 O 1 IO_PAD766 1934 1 Z
+bit 1934 C 1 *
+bit 1933 I 1 IO_PAD765
+bit 1932 O 1 IO_PAD765 1931 1 Z
+bit 1931 C 1 *
+bit 1930 I 1 IO_PAD763
+bit 1929 O 1 IO_PAD763 1928 1 Z
+bit 1928 C 1 *
+bit 1927 O 1 *
+bit 1926 O 1 *
+bit 1925 O 1 *
+bit 1924 O 1 *
+bit 1923 O 1 *
+bit 1922 O 1 *
+bit 1921 I 1 IO_PAD761
+bit 1920 O 1 IO_PAD761 1919 1 Z
+bit 1919 C 1 *
+bit 1918 I 1 IO_PAD759
+bit 1917 O 1 IO_PAD759 1916 1 Z
+bit 1916 C 1 *
+bit 1915 I 1 IO_PAD757
+bit 1914 O 1 IO_PAD757 1913 1 Z
+bit 1913 C 1 *
+bit 1912 I 1 IO_PAD756
+bit 1911 O 1 IO_PAD756 1910 1 Z
+bit 1910 C 1 *
+bit 1909 I 1 IO_PAD755
+bit 1908 O 1 IO_PAD755 1907 1 Z
+bit 1907 C 1 *
+bit 1906 I 1 IO_PAD753
+bit 1905 O 1 IO_PAD753 1904 1 Z
+bit 1904 C 1 *
+bit 1903 I 1 IO_PAD752
+bit 1902 O 1 IO_PAD752 1901 1 Z
+bit 1901 C 1 *
+bit 1900 I 1 IO_PAD751
+bit 1899 O 1 IO_PAD751 1898 1 Z
+bit 1898 C 1 *
+bit 1897 I 1 IO_PAD750
+bit 1896 O 1 IO_PAD750 1895 1 Z
+bit 1895 C 1 *
+bit 1894 I 1 IO_PAD749
+bit 1893 O 1 IO_PAD749 1892 1 Z
+bit 1892 C 1 *
+bit 1891 I 1 IO_PAD747
+bit 1890 O 1 IO_PAD747 1889 1 Z
+bit 1889 C 1 *
+bit 1888 I 1 IO_PAD745
+bit 1887 O 1 IO_PAD745 1886 1 Z
+bit 1886 C 1 *
+bit 1885 I 1 IO_PAD744
+bit 1884 O 1 IO_PAD744 1883 1 Z
+bit 1883 C 1 *
+bit 1882 I 1 IO_PAD743
+bit 1881 O 1 IO_PAD743 1880 1 Z
+bit 1880 C 1 *
+bit 1879 I 1 IO_PAD742
+bit 1878 O 1 IO_PAD742 1877 1 Z
+bit 1877 C 1 *
+bit 1876 I 1 IO_PAD741
+bit 1875 O 1 IO_PAD741 1874 1 Z
+bit 1874 C 1 *
+bit 1873 I 1 IO_PAD739
+bit 1872 O 1 IO_PAD739 1871 1 Z
+bit 1871 C 1 *
+bit 1870 I 1 IO_PAD737
+bit 1869 O 1 IO_PAD737 1868 1 Z
+bit 1868 C 1 *
+bit 1867 I 1 IO_PAD736
+bit 1866 O 1 IO_PAD736 1865 1 Z
+bit 1865 C 1 *
+bit 1864 I 1 IO_PAD735
+bit 1863 O 1 IO_PAD735 1862 1 Z
+bit 1862 C 1 *
+bit 1861 I 1 IO_PAD734
+bit 1860 O 1 IO_PAD734 1859 1 Z
+bit 1859 C 1 *
+bit 1858 I 1 IO_PAD733
+bit 1857 O 1 IO_PAD733 1856 1 Z
+bit 1856 C 1 *
+bit 1855 I 1 IO_PAD731
+bit 1854 O 1 IO_PAD731 1853 1 Z
+bit 1853 C 1 *
+bit 1852 O 1 *
+bit 1851 O 1 *
+bit 1850 O 1 *
+bit 1849 O 1 *
+bit 1848 O 1 *
+bit 1847 O 1 *
+bit 1846 I 1 IO_PAD729
+bit 1845 O 1 IO_PAD729 1844 1 Z
+bit 1844 C 1 *
+bit 1843 I 1 IO_PAD727
+bit 1842 O 1 IO_PAD727 1841 1 Z
+bit 1841 C 1 *
+bit 1840 I 1 IO_PAD726
+bit 1839 O 1 IO_PAD726 1838 1 Z
+bit 1838 C 1 *
+bit 1837 I 1 IO_PAD725
+bit 1836 O 1 IO_PAD725 1835 1 Z
+bit 1835 C 1 *
+bit 1834 I 1 IO_PAD724
+bit 1833 O 1 IO_PAD724 1832 1 Z
+bit 1832 C 1 *
+bit 1831 I 1 IO_PAD723
+bit 1830 O 1 IO_PAD723 1829 1 Z
+bit 1829 C 1 *
+bit 1828 I 1 IO_PAD722
+bit 1827 O 1 IO_PAD722 1826 1 Z
+bit 1826 C 1 *
+bit 1825 I 1 IO_PAD721
+bit 1824 O 1 IO_PAD721 1823 1 Z
+bit 1823 C 1 *
+bit 1822 I 1 IO_PAD720
+bit 1821 O 1 IO_PAD720 1820 1 Z
+bit 1820 C 1 *
+bit 1819 I 1 IO_PAD719
+bit 1818 O 1 IO_PAD719 1817 1 Z
+bit 1817 C 1 *
+bit 1816 I 1 IO_PAD717
+bit 1815 O 1 IO_PAD717 1814 1 Z
+bit 1814 C 1 *
+bit 1813 I 1 IO_PAD715
+bit 1812 O 1 IO_PAD715 1811 1 Z
+bit 1811 C 1 *
+bit 1810 I 1 IO_PAD714
+bit 1809 O 1 IO_PAD714 1808 1 Z
+bit 1808 C 1 *
+bit 1807 I 1 IO_PAD713
+bit 1806 O 1 IO_PAD713 1805 1 Z
+bit 1805 C 1 *
+bit 1804 I 1 IO_PAD712
+bit 1803 O 1 IO_PAD712 1802 1 Z
+bit 1802 C 1 *
+bit 1801 I 1 IO_PAD711
+bit 1800 O 1 IO_PAD711 1799 1 Z
+bit 1799 C 1 *
+bit 1798 I 1 IO_PAD709
+bit 1797 O 1 IO_PAD709 1796 1 Z
+bit 1796 C 1 *
+bit 1795 I 1 IO_PAD708
+bit 1794 O 1 IO_PAD708 1793 1 Z
+bit 1793 C 1 *
+bit 1792 I 1 IO_PAD707
+bit 1791 O 1 IO_PAD707 1790 1 Z
+bit 1790 C 1 *
+bit 1789 I 1 IO_PAD705
+bit 1788 O 1 IO_PAD705 1787 1 Z
+bit 1787 C 1 *
+bit 1786 O 1 *
+bit 1785 O 1 *
+bit 1784 O 1 *
+bit 1783 O 1 *
+bit 1782 O 1 *
+bit 1781 O 1 *
+bit 1780 I 1 IO_PAD704
+bit 1779 O 1 IO_PAD704 1778 1 Z
+bit 1778 C 1 *
+bit 1777 I 1 IO_PAD703
+bit 1776 O 1 IO_PAD703 1775 1 Z
+bit 1775 C 1 *
+bit 1774 I 1 IO_PAD701
+bit 1773 O 1 IO_PAD701 1772 1 Z
+bit 1772 C 1 *
+bit 1771 I 1 IO_PAD700
+bit 1770 O 1 IO_PAD700 1769 1 Z
+bit 1769 C 1 *
+bit 1768 I 1 IO_PAD699
+bit 1767 O 1 IO_PAD699 1766 1 Z
+bit 1766 C 1 *
+bit 1765 I 1 IO_PAD698
+bit 1764 O 1 IO_PAD698 1763 1 Z
+bit 1763 C 1 *
+bit 1762 I 1 IO_PAD697
+bit 1761 O 1 IO_PAD697 1760 1 Z
+bit 1760 C 1 *
+bit 1759 I 1 IO_PAD695
+bit 1758 O 1 IO_PAD695 1757 1 Z
+bit 1757 C 1 *
+bit 1756 I 1 IO_PAD693
+bit 1755 O 1 IO_PAD693 1754 1 Z
+bit 1754 C 1 *
+bit 1753 I 1 IO_PAD692
+bit 1752 O 1 IO_PAD692 1751 1 Z
+bit 1751 C 1 *
+bit 1750 I 1 IO_PAD691
+bit 1749 O 1 IO_PAD691 1748 1 Z
+bit 1748 C 1 *
+bit 1747 I 1 IO_PAD690
+bit 1746 O 1 IO_PAD690 1745 1 Z
+bit 1745 C 1 *
+bit 1744 I 1 IO_PAD689
+bit 1743 O 1 IO_PAD689 1742 1 Z
+bit 1742 C 1 *
+bit 1741 I 1 IO_PAD688
+bit 1740 O 1 IO_PAD688 1739 1 Z
+bit 1739 C 1 *
+bit 1738 I 1 IO_PAD687
+bit 1737 O 1 IO_PAD687 1736 1 Z
+bit 1736 C 1 *
+bit 1735 I 1 IO_PAD685
+bit 1734 O 1 IO_PAD685 1733 1 Z
+bit 1733 C 1 *
+bit 1732 I 1 IO_PAD683
+bit 1731 O 1 IO_PAD683 1730 1 Z
+bit 1730 C 1 *
+bit 1729 I 1 IO_PAD682
+bit 1728 O 1 IO_PAD682 1727 1 Z
+bit 1727 C 1 *
+bit 1726 I 1 IO_PAD681
+bit 1725 O 1 IO_PAD681 1724 1 Z
+bit 1724 C 1 *
+bit 1723 I 1 IO_PAD680
+bit 1722 O 1 IO_PAD680 1721 1 Z
+bit 1721 C 1 *
+bit 1720 I 1 IO_PAD679
+bit 1719 O 1 IO_PAD679 1718 1 Z
+bit 1718 C 1 *
+bit 1717 I 1 IO_PAD677
+bit 1716 O 1 IO_PAD677 1715 1 Z
+bit 1715 C 1 *
+bit 1714 I 1 IO_PAD675
+bit 1713 O 1 IO_PAD675 1712 1 Z
+bit 1712 C 1 *
+bit 1711 O 1 *
+bit 1710 O 1 *
+bit 1709 O 1 *
+bit 1708 O 1 *
+bit 1707 O 1 *
+bit 1706 O 1 *
+bit 1705 I 1 IO_PAD673
+bit 1704 O 1 IO_PAD673 1703 1 Z
+bit 1703 C 1 *
+bit 1702 I 1 IO_PAD671
+bit 1701 O 1 IO_PAD671 1700 1 Z
+bit 1700 C 1 *
+bit 1699 I 1 IO_PAD670
+bit 1698 O 1 IO_PAD670 1697 1 Z
+bit 1697 C 1 *
+bit 1696 I 1 IO_PAD669
+bit 1695 O 1 IO_PAD669 1694 1 Z
+bit 1694 C 1 *
+bit 1693 I 1 IO_PAD667
+bit 1692 O 1 IO_PAD667 1691 1 Z
+bit 1691 C 1 *
+bit 1690 I 1 IO_PAD666
+bit 1689 O 1 IO_PAD666 1688 1 Z
+bit 1688 C 1 *
+bit 1687 I 1 IO_PAD665
+bit 1686 O 1 IO_PAD665 1685 1 Z
+bit 1685 C 1 *
+bit 1684 I 1 IO_PAD663
+bit 1683 O 1 IO_PAD663 1682 1 Z
+bit 1682 C 1 *
+bit 1681 I 1 IO_PAD662
+bit 1680 O 1 IO_PAD662 1679 1 Z
+bit 1679 C 1 *
+bit 1678 I 1 IO_PAD661
+bit 1677 O 1 IO_PAD661 1676 1 Z
+bit 1676 C 1 *
+bit 1675 I 1 IO_PAD659
+bit 1674 O 1 IO_PAD659 1673 1 Z
+bit 1673 C 1 *
+bit 1672 I 1 IO_PAD658
+bit 1671 O 1 IO_PAD658 1670 1 Z
+bit 1670 C 1 *
+bit 1669 I 1 IO_PAD657
+bit 1668 O 1 IO_PAD657 1667 1 Z
+bit 1667 C 1 *
+bit 1666 I 1 CCLK_PAD654
+bit 1665 O 1 CCLK_PAD654 1664 1 Z
+bit 1664 C 1 *
+bit 1663 I 1 DONE_PAD653
+bit 1662 O 1 DONE_PAD653 1661 1 Z
+bit 1661 C 1 *
+bit 1660 I 1 IO_PAD652
+bit 1659 O 1 IO_PAD652 1658 1 Z
+bit 1658 C 1 *
+bit 1657 I 1 IO_PAD651
+bit 1656 O 1 IO_PAD651 1655 1 Z
+bit 1655 C 1 *
+bit 1654 I 1 IO_PAD649
+bit 1653 O 1 IO_PAD649 1652 1 Z
+bit 1652 C 1 *
+bit 1651 I 1 IO_PAD647
+bit 1650 O 1 IO_PAD647 1649 1 Z
+bit 1649 C 1 *
+bit 1648 I 1 IO_PAD646
+bit 1647 O 1 IO_PAD646 1646 1 Z
+bit 1646 C 1 *
+bit 1645 I 1 IO_PAD645
+bit 1644 O 1 IO_PAD645 1643 1 Z
+bit 1643 C 1 *
+bit 1642 I 1 IO_PAD643
+bit 1641 O 1 IO_PAD643 1640 1 Z
+bit 1640 C 1 *
+bit 1639 I 1 IO_PAD641
+bit 1638 O 1 IO_PAD641 1637 1 Z
+bit 1637 C 1 *
+bit 1636 I 1 IO_PAD639
+bit 1635 O 1 IO_PAD639 1634 1 Z
+bit 1634 C 1 *
+bit 1633 I 1 IO_PAD638
+bit 1632 O 1 IO_PAD638 1631 1 Z
+bit 1631 C 1 *
+bit 1630 I 1 IO_PAD637
+bit 1629 O 1 IO_PAD637 1628 1 Z
+bit 1628 C 1 *
+bit 1627 I 1 IO_PAD636
+bit 1626 O 1 IO_PAD636 1625 1 Z
+bit 1625 C 1 *
+bit 1624 I 1 IO_PAD635
+bit 1623 O 1 IO_PAD635 1622 1 Z
+bit 1622 C 1 *
+bit 1621 I 1 IO_PAD633
+bit 1620 O 1 IO_PAD633 1619 1 Z
+bit 1619 C 1 *
+bit 1618 I 1 IO_PAD631
+bit 1617 O 1 IO_PAD631 1616 1 Z
+bit 1616 C 1 *
+bit 1615 I 1 IO_PAD629
+bit 1614 O 1 IO_PAD629 1613 1 Z
+bit 1613 C 1 *
+bit 1612 I 1 IO_PAD627
+bit 1611 O 1 IO_PAD627 1610 1 Z
+bit 1610 C 1 *
+bit 1609 I 1 IO_PAD625
+bit 1608 O 1 IO_PAD625 1607 1 Z
+bit 1607 C 1 *
+bit 1606 I 1 IO_PAD623
+bit 1605 O 1 IO_PAD623 1604 1 Z
+bit 1604 C 1 *
+bit 1603 I 1 IO_PAD621
+bit 1602 O 1 IO_PAD621 1601 1 Z
+bit 1601 C 1 *
+bit 1600 I 1 IO_PAD620
+bit 1599 O 1 IO_PAD620 1598 1 Z
+bit 1598 C 1 *
+bit 1597 I 1 IO_PAD619
+bit 1596 O 1 IO_PAD619 1595 1 Z
+bit 1595 C 1 *
+bit 1594 I 1 IO_PAD618
+bit 1593 O 1 IO_PAD618 1592 1 Z
+bit 1592 C 1 *
+bit 1591 I 1 IO_PAD617
+bit 1590 O 1 IO_PAD617 1589 1 Z
+bit 1589 C 1 *
+bit 1588 I 1 IO_PAD615
+bit 1587 O 1 IO_PAD615 1586 1 Z
+bit 1586 C 1 *
+bit 1585 I 1 IO_PAD614
+bit 1584 O 1 IO_PAD614 1583 1 Z
+bit 1583 C 1 *
+bit 1582 I 1 IO_PAD613
+bit 1581 O 1 IO_PAD613 1580 1 Z
+bit 1580 C 1 *
+bit 1579 I 1 IO_PAD611
+bit 1578 O 1 IO_PAD611 1577 1 Z
+bit 1577 C 1 *
+bit 1576 I 1 IO_PAD609
+bit 1575 O 1 IO_PAD609 1574 1 Z
+bit 1574 C 1 *
+bit 1573 I 1 IO_PAD608
+bit 1572 O 1 IO_PAD608 1571 1 Z
+bit 1571 C 1 *
+bit 1570 I 1 IO_PAD607
+bit 1569 O 1 IO_PAD607 1568 1 Z
+bit 1568 C 1 *
+bit 1567 I 1 IO_PAD605
+bit 1566 O 1 IO_PAD605 1565 1 Z
+bit 1565 C 1 *
+bit 1564 I 1 IO_PAD603
+bit 1563 O 1 IO_PAD603 1562 1 Z
+bit 1562 C 1 *
+bit 1561 I 1 IO_PAD601
+bit 1560 O 1 IO_PAD601 1559 1 Z
+bit 1559 C 1 *
+bit 1558 I 1 IO_PAD599
+bit 1557 O 1 IO_PAD599 1556 1 Z
+bit 1556 C 1 *
+bit 1555 I 1 IO_PAD597
+bit 1554 O 1 IO_PAD597 1553 1 Z
+bit 1553 C 1 *
+bit 1552 I 1 IO_PAD596
+bit 1551 O 1 IO_PAD596 1550 1 Z
+bit 1550 C 1 *
+bit 1549 I 1 IO_PAD595
+bit 1548 O 1 IO_PAD595 1547 1 Z
+bit 1547 C 1 *
+bit 1546 I 1 IO_PAD593
+bit 1545 O 1 IO_PAD593 1544 1 Z
+bit 1544 C 1 *
+bit 1543 I 1 IO_PAD591
+bit 1542 O 1 IO_PAD591 1541 1 Z
+bit 1541 C 1 *
+bit 1540 I 1 IO_PAD590
+bit 1539 O 1 IO_PAD590 1538 1 Z
+bit 1538 C 1 *
+bit 1537 I 1 IO_PAD589
+bit 1536 O 1 IO_PAD589 1535 1 Z
+bit 1535 C 1 *
+bit 1534 I 1 IO_PAD587
+bit 1533 O 1 IO_PAD587 1532 1 Z
+bit 1532 C 1 *
+bit 1531 I 1 IO_PAD586
+bit 1530 O 1 IO_PAD586 1529 1 Z
+bit 1529 C 1 *
+bit 1528 I 1 IO_PAD585
+bit 1527 O 1 IO_PAD585 1526 1 Z
+bit 1526 C 1 *
+bit 1525 I 1 IO_PAD583
+bit 1524 O 1 IO_PAD583 1523 1 Z
+bit 1523 C 1 *
+bit 1522 I 1 IO_PAD581
+bit 1521 O 1 IO_PAD581 1520 1 Z
+bit 1520 C 1 *
+bit 1519 I 1 IO_PAD579
+bit 1518 O 1 IO_PAD579 1517 1 Z
+bit 1517 C 1 *
+bit 1516 I 1 IO_PAD578
+bit 1515 O 1 IO_PAD578 1514 1 Z
+bit 1514 C 1 *
+bit 1513 I 1 IO_PAD577
+bit 1512 O 1 IO_PAD577 1511 1 Z
+bit 1511 C 1 *
+bit 1510 I 1 IO_PAD575
+bit 1509 O 1 IO_PAD575 1508 1 Z
+bit 1508 C 1 *
+bit 1507 I 1 IO_PAD574
+bit 1506 O 1 IO_PAD574 1505 1 Z
+bit 1505 C 1 *
+bit 1504 I 1 IO_PAD573
+bit 1503 O 1 IO_PAD573 1502 1 Z
+bit 1502 C 1 *
+bit 1501 I 1 IO_PAD571
+bit 1500 O 1 IO_PAD571 1499 1 Z
+bit 1499 C 1 *
+bit 1498 I 1 IO_PAD569
+bit 1497 O 1 IO_PAD569 1496 1 Z
+bit 1496 C 1 *
+bit 1495 I 1 IO_PAD567
+bit 1494 O 1 IO_PAD567 1493 1 Z
+bit 1493 C 1 *
+bit 1492 I 1 IO_PAD566
+bit 1491 O 1 IO_PAD566 1490 1 Z
+bit 1490 C 1 *
+bit 1489 I 1 IO_PAD565
+bit 1488 O 1 IO_PAD565 1487 1 Z
+bit 1487 C 1 *
+bit 1486 I 1 IO_PAD563
+bit 1485 O 1 IO_PAD563 1484 1 Z
+bit 1484 C 1 *
+bit 1483 I 1 IO_PAD562
+bit 1482 O 1 IO_PAD562 1481 1 Z
+bit 1481 C 1 *
+bit 1480 I 1 IO_PAD561
+bit 1479 O 1 IO_PAD561 1478 1 Z
+bit 1478 C 1 *
+bit 1477 I 1 IO_PAD559
+bit 1476 O 1 IO_PAD559 1475 1 Z
+bit 1475 C 1 *
+bit 1474 I 1 IO_PAD557
+bit 1473 O 1 IO_PAD557 1472 1 Z
+bit 1472 C 1 *
+bit 1471 I 1 IO_PAD555
+bit 1470 O 1 IO_PAD555 1469 1 Z
+bit 1469 C 1 *
+bit 1468 I 1 IO_PAD554
+bit 1467 O 1 IO_PAD554 1466 1 Z
+bit 1466 C 1 *
+bit 1465 I 1 IO_PAD553
+bit 1464 O 1 IO_PAD553 1463 1 Z
+bit 1463 C 1 *
+bit 1462 I 1 IO_PAD551
+bit 1461 O 1 IO_PAD551 1460 1 Z
+bit 1460 C 1 *
+bit 1459 I 1 IO_PAD550
+bit 1458 O 1 IO_PAD550 1457 1 Z
+bit 1457 C 1 *
+bit 1456 I 1 IO_PAD549
+bit 1455 O 1 IO_PAD549 1454 1 Z
+bit 1454 C 1 *
+bit 1453 I 1 IO_PAD547
+bit 1452 O 1 IO_PAD547 1451 1 Z
+bit 1451 C 1 *
+bit 1450 I 1 IO_PAD545
+bit 1449 O 1 IO_PAD545 1448 1 Z
+bit 1448 C 1 *
+bit 1447 I 1 IO_PAD544
+bit 1446 O 1 IO_PAD544 1445 1 Z
+bit 1445 C 1 *
+bit 1444 I 1 IO_PAD543
+bit 1443 O 1 IO_PAD543 1442 1 Z
+bit 1442 C 1 *
+bit 1441 I 1 IO_PAD542
+bit 1440 O 1 IO_PAD542 1439 1 Z
+bit 1439 C 1 *
+bit 1438 I 1 IO_PAD541
+bit 1437 O 1 IO_PAD541 1436 1 Z
+bit 1436 C 1 *
+bit 1435 I 1 IO_PAD539
+bit 1434 O 1 IO_PAD539 1433 1 Z
+bit 1433 C 1 *
+bit 1432 I 1 IO_PAD537
+bit 1431 O 1 IO_PAD537 1430 1 Z
+bit 1430 C 1 *
+bit 1429 I 1 IO_PAD535
+bit 1428 O 1 IO_PAD535 1427 1 Z
+bit 1427 C 1 *
+bit 1426 I 1 IO_PAD533
+bit 1425 O 1 IO_PAD533 1424 1 Z
+bit 1424 C 1 *
+bit 1423 I 1 IO_PAD531
+bit 1422 O 1 IO_PAD531 1421 1 Z
+bit 1421 C 1 *
+bit 1420 I 1 IO_PAD530
+bit 1419 O 1 IO_PAD530 1418 1 Z
+bit 1418 C 1 *
+bit 1417 I 1 IO_PAD529
+bit 1416 O 1 IO_PAD529 1415 1 Z
+bit 1415 C 1 *
+bit 1414 I 1 IO_PAD527
+bit 1413 O 1 IO_PAD527 1412 1 Z
+bit 1412 C 1 *
+bit 1411 I 1 IO_PAD526
+bit 1410 O 1 IO_PAD526 1409 1 Z
+bit 1409 C 1 *
+bit 1408 I 1 IO_PAD525
+bit 1407 O 1 IO_PAD525 1406 1 Z
+bit 1406 C 1 *
+bit 1405 I 1 IO_PAD523
+bit 1404 O 1 IO_PAD523 1403 1 Z
+bit 1403 C 1 *
+bit 1402 I 1 IO_PAD521
+bit 1401 O 1 IO_PAD521 1400 1 Z
+bit 1400 C 1 *
+bit 1399 I 1 IO_PAD520
+bit 1398 O 1 IO_PAD520 1397 1 Z
+bit 1397 C 1 *
+bit 1396 I 1 IO_PAD519
+bit 1395 O 1 IO_PAD519 1394 1 Z
+bit 1394 C 1 *
+bit 1393 I 1 IO_PAD518
+bit 1392 O 1 IO_PAD518 1391 1 Z
+bit 1391 C 1 *
+bit 1390 I 1 IO_PAD516
+bit 1389 O 1 IO_PAD516 1388 1 Z
+bit 1388 C 1 *
+bit 1387 I 1 IO_PAD515
+bit 1386 O 1 IO_PAD515 1385 1 Z
+bit 1385 C 1 *
+bit 1384 I 1 IO_PAD514
+bit 1383 O 1 IO_PAD514 1382 1 Z
+bit 1382 C 1 *
+bit 1381 I 1 IO_PAD513
+bit 1380 O 1 IO_PAD513 1379 1 Z
+bit 1379 C 1 *
+bit 1378 I 1 IO_PAD511
+bit 1377 O 1 IO_PAD511 1376 1 Z
+bit 1376 C 1 *
+bit 1375 I 1 IO_PAD509
+bit 1374 O 1 IO_PAD509 1373 1 Z
+bit 1373 C 1 *
+bit 1372 I 1 IO_PAD508
+bit 1371 O 1 IO_PAD508 1370 1 Z
+bit 1370 C 1 *
+bit 1369 I 1 IO_PAD507
+bit 1368 O 1 IO_PAD507 1367 1 Z
+bit 1367 C 1 *
+bit 1366 I 1 IO_PAD505
+bit 1365 O 1 IO_PAD505 1364 1 Z
+bit 1364 C 1 *
+bit 1363 I 1 IO_PAD504
+bit 1362 O 1 IO_PAD504 1361 1 Z
+bit 1361 C 1 *
+bit 1360 I 1 IO_PAD503
+bit 1359 O 1 IO_PAD503 1358 1 Z
+bit 1358 C 1 *
+bit 1357 I 1 IO_PAD501
+bit 1356 O 1 IO_PAD501 1355 1 Z
+bit 1355 C 1 *
+bit 1354 I 1 IO_PAD499
+bit 1353 O 1 IO_PAD499 1352 1 Z
+bit 1352 C 1 *
+bit 1351 I 1 IO_PAD497
+bit 1350 O 1 IO_PAD497 1349 1 Z
+bit 1349 C 1 *
+bit 1348 I 1 IO_PAD495
+bit 1347 O 1 IO_PAD495 1346 1 Z
+bit 1346 C 1 *
+bit 1345 I 1 IO_PAD493
+bit 1344 O 1 IO_PAD493 1343 1 Z
+bit 1343 C 1 *
+bit 1342 I 1 IO_PAD492
+bit 1341 O 1 IO_PAD492 1340 1 Z
+bit 1340 C 1 *
+bit 1339 I 1 IO_PAD491
+bit 1338 O 1 IO_PAD491 1337 1 Z
+bit 1337 C 1 *
+bit 1336 I 1 IO_PAD490
+bit 1335 O 1 IO_PAD490 1334 1 Z
+bit 1334 C 1 *
+bit 1333 I 1 IO_PAD489
+bit 1332 O 1 IO_PAD489 1331 1 Z
+bit 1331 C 1 *
+bit 1330 I 1 IO_PAD487
+bit 1329 O 1 IO_PAD487 1328 1 Z
+bit 1328 C 1 *
+bit 1327 I 1 IO_PAD485
+bit 1326 O 1 IO_PAD485 1325 1 Z
+bit 1325 C 1 *
+bit 1324 I 1 IO_PAD484
+bit 1323 O 1 IO_PAD484 1322 1 Z
+bit 1322 C 1 *
+bit 1321 I 1 IO_PAD483
+bit 1320 O 1 IO_PAD483 1319 1 Z
+bit 1319 C 1 *
+bit 1318 I 1 IO_PAD481
+bit 1317 O 1 IO_PAD481 1316 1 Z
+bit 1316 C 1 *
+bit 1315 I 1 IO_PAD480
+bit 1314 O 1 IO_PAD480 1313 1 Z
+bit 1313 C 1 *
+bit 1312 I 1 IO_PAD479
+bit 1311 O 1 IO_PAD479 1310 1 Z
+bit 1310 C 1 *
+bit 1309 I 1 IO_PAD477
+bit 1308 O 1 IO_PAD477 1307 1 Z
+bit 1307 C 1 *
+bit 1306 I 1 IO_PAD475
+bit 1305 O 1 IO_PAD475 1304 1 Z
+bit 1304 C 1 *
+bit 1303 I 1 IO_PAD473
+bit 1302 O 1 IO_PAD473 1301 1 Z
+bit 1301 C 1 *
+bit 1300 I 1 IO_PAD472
+bit 1299 O 1 IO_PAD472 1298 1 Z
+bit 1298 C 1 *
+bit 1297 I 1 IO_PAD471
+bit 1296 O 1 IO_PAD471 1295 1 Z
+bit 1295 C 1 *
+bit 1294 I 1 IO_PAD469
+bit 1293 O 1 IO_PAD469 1292 1 Z
+bit 1292 C 1 *
+bit 1291 I 1 IO_PAD468
+bit 1290 O 1 IO_PAD468 1289 1 Z
+bit 1289 C 1 *
+bit 1288 I 1 IO_PAD467
+bit 1287 O 1 IO_PAD467 1286 1 Z
+bit 1286 C 1 *
+bit 1285 I 1 IO_PAD465
+bit 1284 O 1 IO_PAD465 1283 1 Z
+bit 1283 C 1 *
+bit 1282 I 1 IO_PAD463
+bit 1281 O 1 IO_PAD463 1280 1 Z
+bit 1280 C 1 *
+bit 1279 I 1 IO_PAD461
+bit 1278 O 1 IO_PAD461 1277 1 Z
+bit 1277 C 1 *
+bit 1276 I 1 IO_PAD460
+bit 1275 O 1 IO_PAD460 1274 1 Z
+bit 1274 C 1 *
+bit 1273 I 1 IO_PAD459
+bit 1272 O 1 IO_PAD459 1271 1 Z
+bit 1271 C 1 *
+bit 1270 I 1 IO_PAD457
+bit 1269 O 1 IO_PAD457 1268 1 Z
+bit 1268 C 1 *
+bit 1267 I 1 IO_PAD456
+bit 1266 O 1 IO_PAD456 1265 1 Z
+bit 1265 C 1 *
+bit 1264 I 1 IO_PAD455
+bit 1263 O 1 IO_PAD455 1262 1 Z
+bit 1262 C 1 *
+bit 1261 I 1 IO_PAD453
+bit 1260 O 1 IO_PAD453 1259 1 Z
+bit 1259 C 1 *
+bit 1258 I 1 IO_PAD451
+bit 1257 O 1 IO_PAD451 1256 1 Z
+bit 1256 C 1 *
+bit 1255 I 1 IO_PAD449
+bit 1254 O 1 IO_PAD449 1253 1 Z
+bit 1253 C 1 *
+bit 1252 I 1 IO_PAD448
+bit 1251 O 1 IO_PAD448 1250 1 Z
+bit 1250 C 1 *
+bit 1249 I 1 IO_PAD447
+bit 1248 O 1 IO_PAD447 1247 1 Z
+bit 1247 C 1 *
+bit 1246 I 1 IO_PAD445
+bit 1245 O 1 IO_PAD445 1244 1 Z
+bit 1244 C 1 *
+bit 1243 I 1 IO_PAD444
+bit 1242 O 1 IO_PAD444 1241 1 Z
+bit 1241 C 1 *
+bit 1240 I 1 IO_PAD443
+bit 1239 O 1 IO_PAD443 1238 1 Z
+bit 1238 C 1 *
+bit 1237 I 1 IO_PAD441
+bit 1236 O 1 IO_PAD441 1235 1 Z
+bit 1235 C 1 *
+bit 1234 I 1 IO_PAD439
+bit 1233 O 1 IO_PAD439 1232 1 Z
+bit 1232 C 1 *
+bit 1231 I 1 IO_PAD438
+bit 1230 O 1 IO_PAD438 1229 1 Z
+bit 1229 C 1 *
+bit 1228 I 1 IO_PAD437
+bit 1227 O 1 IO_PAD437 1226 1 Z
+bit 1226 C 1 *
+bit 1225 I 1 IO_PAD435
+bit 1224 O 1 IO_PAD435 1223 1 Z
+bit 1223 C 1 *
+bit 1222 I 1 IO_PAD433
+bit 1221 O 1 IO_PAD433 1220 1 Z
+bit 1220 C 1 *
+bit 1219 I 1 IO_PAD431
+bit 1218 O 1 IO_PAD431 1217 1 Z
+bit 1217 C 1 *
+bit 1216 I 1 IO_PAD429
+bit 1215 O 1 IO_PAD429 1214 1 Z
+bit 1214 C 1 *
+bit 1213 I 1 IO_PAD427
+bit 1212 O 1 IO_PAD427 1211 1 Z
+bit 1211 C 1 *
+bit 1210 I 1 IO_PAD426
+bit 1209 O 1 IO_PAD426 1208 1 Z
+bit 1208 C 1 *
+bit 1207 I 1 IO_PAD425
+bit 1206 O 1 IO_PAD425 1205 1 Z
+bit 1205 C 1 *
+bit 1204 I 1 IO_PAD423
+bit 1203 O 1 IO_PAD423 1202 1 Z
+bit 1202 C 1 *
+bit 1201 I 1 IO_PAD421
+bit 1200 O 1 IO_PAD421 1199 1 Z
+bit 1199 C 1 *
+bit 1198 I 1 IO_PAD420
+bit 1197 O 1 IO_PAD420 1196 1 Z
+bit 1196 C 1 *
+bit 1195 I 1 IO_PAD419
+bit 1194 O 1 IO_PAD419 1193 1 Z
+bit 1193 C 1 *
+bit 1192 I 1 IO_PAD417
+bit 1191 O 1 IO_PAD417 1190 1 Z
+bit 1190 C 1 *
+bit 1189 I 1 IO_PAD416
+bit 1188 O 1 IO_PAD416 1187 1 Z
+bit 1187 C 1 *
+bit 1186 I 1 IO_PAD415
+bit 1185 O 1 IO_PAD415 1184 1 Z
+bit 1184 C 1 *
+bit 1183 I 1 IO_PAD414
+bit 1182 O 1 IO_PAD414 1181 1 Z
+bit 1181 C 1 *
+bit 1180 I 1 IO_PAD413
+bit 1179 O 1 IO_PAD413 1178 1 Z
+bit 1178 C 1 *
+bit 1177 I 1 IO_PAD411
+bit 1176 O 1 IO_PAD411 1175 1 Z
+bit 1175 C 1 *
+bit 1174 I 1 IO_PAD409
+bit 1173 O 1 IO_PAD409 1172 1 Z
+bit 1172 C 1 *
+bit 1171 I 1 IO_PAD407
+bit 1170 O 1 IO_PAD407 1169 1 Z
+bit 1169 C 1 *
+bit 1168 I 1 IO_PAD406
+bit 1167 O 1 IO_PAD406 1166 1 Z
+bit 1166 C 1 *
+bit 1165 I 1 IO_PAD405
+bit 1164 O 1 IO_PAD405 1163 1 Z
+bit 1163 C 1 *
+bit 1162 I 1 IO_PAD403
+bit 1161 O 1 IO_PAD403 1160 1 Z
+bit 1160 C 1 *
+bit 1159 I 1 IO_PAD401
+bit 1158 O 1 IO_PAD401 1157 1 Z
+bit 1157 C 1 *
+bit 1156 I 1 IO_PAD400
+bit 1155 O 1 IO_PAD400 1154 1 Z
+bit 1154 C 1 *
+bit 1153 I 1 IO_PAD399
+bit 1152 O 1 IO_PAD399 1151 1 Z
+bit 1151 C 1 *
+bit 1150 I 1 IO_PAD398
+bit 1149 O 1 IO_PAD398 1148 1 Z
+bit 1148 C 1 *
+bit 1147 I 1 IO_PAD397
+bit 1146 O 1 IO_PAD397 1145 1 Z
+bit 1145 C 1 *
+bit 1144 I 1 IO_PAD395
+bit 1143 O 1 IO_PAD395 1142 1 Z
+bit 1142 C 1 *
+bit 1141 I 1 IO_PAD393
+bit 1140 O 1 IO_PAD393 1139 1 Z
+bit 1139 C 1 *
+bit 1138 I 1 IO_PAD391
+bit 1137 O 1 IO_PAD391 1136 1 Z
+bit 1136 C 1 *
+bit 1135 I 1 IO_PAD390
+bit 1134 O 1 IO_PAD390 1133 1 Z
+bit 1133 C 1 *
+bit 1132 I 1 IO_PAD389
+bit 1131 O 1 IO_PAD389 1130 1 Z
+bit 1130 C 1 *
+bit 1129 I 1 IO_PAD387
+bit 1128 O 1 IO_PAD387 1127 1 Z
+bit 1127 C 1 *
+bit 1126 I 1 IO_PAD385
+bit 1125 O 1 IO_PAD385 1124 1 Z
+bit 1124 C 1 *
+bit 1123 I 1 IO_PAD384
+bit 1122 O 1 IO_PAD384 1121 1 Z
+bit 1121 C 1 *
+bit 1120 I 1 M2_PAD383
+bit 1119 I 1 M0_PAD382
+bit 1118 I 1 M1_PAD381
+bit 1117 I 1 IO_PAD377
+bit 1116 O 1 IO_PAD377 1115 1 Z
+bit 1115 C 1 *
+bit 1114 I 1 IO_PAD376
+bit 1113 O 1 IO_PAD376 1112 1 Z
+bit 1112 C 1 *
+bit 1111 I 1 IO_PAD375
+bit 1110 O 1 IO_PAD375 1109 1 Z
+bit 1109 C 1 *
+bit 1108 I 1 IO_PAD373
+bit 1107 O 1 IO_PAD373 1106 1 Z
+bit 1106 C 1 *
+bit 1105 I 1 IO_PAD372
+bit 1104 O 1 IO_PAD372 1103 1 Z
+bit 1103 C 1 *
+bit 1102 I 1 IO_PAD371
+bit 1101 O 1 IO_PAD371 1100 1 Z
+bit 1100 C 1 *
+bit 1099 I 1 IO_PAD369
+bit 1098 O 1 IO_PAD369 1097 1 Z
+bit 1097 C 1 *
+bit 1096 I 1 IO_PAD368
+bit 1095 O 1 IO_PAD368 1094 1 Z
+bit 1094 C 1 *
+bit 1093 I 1 IO_PAD367
+bit 1092 O 1 IO_PAD367 1091 1 Z
+bit 1091 C 1 *
+bit 1090 I 1 IO_PAD365
+bit 1089 O 1 IO_PAD365 1088 1 Z
+bit 1088 C 1 *
+bit 1087 I 1 IO_PAD364
+bit 1086 O 1 IO_PAD364 1085 1 Z
+bit 1085 C 1 *
+bit 1084 I 1 IO_PAD363
+bit 1083 O 1 IO_PAD363 1082 1 Z
+bit 1082 C 1 *
+bit 1081 I 1 IO_PAD361
+bit 1080 O 1 IO_PAD361 1079 1 Z
+bit 1079 C 1 *
+bit 1078 O 1 *
+bit 1077 O 1 *
+bit 1076 O 1 *
+bit 1075 O 1 *
+bit 1074 O 1 *
+bit 1073 O 1 *
+bit 1072 I 1 IO_PAD359
+bit 1071 O 1 IO_PAD359 1070 1 Z
+bit 1070 C 1 *
+bit 1069 I 1 IO_PAD357
+bit 1068 O 1 IO_PAD357 1067 1 Z
+bit 1067 C 1 *
+bit 1066 I 1 IO_PAD355
+bit 1065 O 1 IO_PAD355 1064 1 Z
+bit 1064 C 1 *
+bit 1063 I 1 IO_PAD354
+bit 1062 O 1 IO_PAD354 1061 1 Z
+bit 1061 C 1 *
+bit 1060 I 1 IO_PAD353
+bit 1059 O 1 IO_PAD353 1058 1 Z
+bit 1058 C 1 *
+bit 1057 I 1 IO_PAD352
+bit 1056 O 1 IO_PAD352 1055 1 Z
+bit 1055 C 1 *
+bit 1054 I 1 IO_PAD351
+bit 1053 O 1 IO_PAD351 1052 1 Z
+bit 1052 C 1 *
+bit 1051 I 1 IO_PAD349
+bit 1050 O 1 IO_PAD349 1049 1 Z
+bit 1049 C 1 *
+bit 1048 I 1 IO_PAD347
+bit 1047 O 1 IO_PAD347 1046 1 Z
+bit 1046 C 1 *
+bit 1045 I 1 IO_PAD346
+bit 1044 O 1 IO_PAD346 1043 1 Z
+bit 1043 C 1 *
+bit 1042 I 1 IO_PAD345
+bit 1041 O 1 IO_PAD345 1040 1 Z
+bit 1040 C 1 *
+bit 1039 I 1 IO_PAD344
+bit 1038 O 1 IO_PAD344 1037 1 Z
+bit 1037 C 1 *
+bit 1036 I 1 IO_PAD343
+bit 1035 O 1 IO_PAD343 1034 1 Z
+bit 1034 C 1 *
+bit 1033 I 1 IO_PAD342
+bit 1032 O 1 IO_PAD342 1031 1 Z
+bit 1031 C 1 *
+bit 1030 I 1 IO_PAD341
+bit 1029 O 1 IO_PAD341 1028 1 Z
+bit 1028 C 1 *
+bit 1027 I 1 IO_PAD339
+bit 1026 O 1 IO_PAD339 1025 1 Z
+bit 1025 C 1 *
+bit 1024 I 1 IO_PAD337
+bit 1023 O 1 IO_PAD337 1022 1 Z
+bit 1022 C 1 *
+bit 1021 I 1 IO_PAD336
+bit 1020 O 1 IO_PAD336 1019 1 Z
+bit 1019 C 1 *
+bit 1018 I 1 IO_PAD335
+bit 1017 O 1 IO_PAD335 1016 1 Z
+bit 1016 C 1 *
+bit 1015 I 1 IO_PAD334
+bit 1014 O 1 IO_PAD334 1013 1 Z
+bit 1013 C 1 *
+bit 1012 I 1 IO_PAD333
+bit 1011 O 1 IO_PAD333 1010 1 Z
+bit 1010 C 1 *
+bit 1009 I 1 IO_PAD331
+bit 1008 O 1 IO_PAD331 1007 1 Z
+bit 1007 C 1 *
+bit 1006 I 1 IO_PAD330
+bit 1005 O 1 IO_PAD330 1004 1 Z
+bit 1004 C 1 *
+bit 1003 O 1 *
+bit 1002 O 1 *
+bit 1001 O 1 *
+bit 1000 O 1 *
+bit 999 O 1 *
+bit 998 O 1 *
+bit 997 I 1 IO_PAD329
+bit 996 O 1 IO_PAD329 995 1 Z
+bit 995 C 1 *
+bit 994 I 1 IO_PAD327
+bit 993 O 1 IO_PAD327 992 1 Z
+bit 992 C 1 *
+bit 991 I 1 IO_PAD326
+bit 990 O 1 IO_PAD326 989 1 Z
+bit 989 C 1 *
+bit 988 I 1 IO_PAD325
+bit 987 O 1 IO_PAD325 986 1 Z
+bit 986 C 1 *
+bit 985 I 1 IO_PAD323
+bit 984 O 1 IO_PAD323 983 1 Z
+bit 983 C 1 *
+bit 982 I 1 IO_PAD322
+bit 981 O 1 IO_PAD322 980 1 Z
+bit 980 C 1 *
+bit 979 I 1 IO_PAD321
+bit 978 O 1 IO_PAD321 977 1 Z
+bit 977 C 1 *
+bit 976 I 1 IO_PAD320
+bit 975 O 1 IO_PAD320 974 1 Z
+bit 974 C 1 *
+bit 973 I 1 IO_PAD319
+bit 972 O 1 IO_PAD319 971 1 Z
+bit 971 C 1 *
+bit 970 I 1 IO_PAD317
+bit 969 O 1 IO_PAD317 968 1 Z
+bit 968 C 1 *
+bit 967 I 1 IO_PAD315
+bit 966 O 1 IO_PAD315 965 1 Z
+bit 965 C 1 *
+bit 964 I 1 IO_PAD314
+bit 963 O 1 IO_PAD314 962 1 Z
+bit 962 C 1 *
+bit 961 I 1 IO_PAD313
+bit 960 O 1 IO_PAD313 959 1 Z
+bit 959 C 1 *
+bit 958 I 1 IO_PAD312
+bit 957 O 1 IO_PAD312 956 1 Z
+bit 956 C 1 *
+bit 955 I 1 IO_PAD311
+bit 954 O 1 IO_PAD311 953 1 Z
+bit 953 C 1 *
+bit 952 I 1 IO_PAD310
+bit 951 O 1 IO_PAD310 950 1 Z
+bit 950 C 1 *
+bit 949 I 1 IO_PAD309
+bit 948 O 1 IO_PAD309 947 1 Z
+bit 947 C 1 *
+bit 946 I 1 IO_PAD308
+bit 945 O 1 IO_PAD308 944 1 Z
+bit 944 C 1 *
+bit 943 I 1 IO_PAD307
+bit 942 O 1 IO_PAD307 941 1 Z
+bit 941 C 1 *
+bit 940 I 1 IO_PAD305
+bit 939 O 1 IO_PAD305 938 1 Z
+bit 938 C 1 *
+bit 937 O 1 *
+bit 936 O 1 *
+bit 935 O 1 *
+bit 934 O 1 *
+bit 933 O 1 *
+bit 932 O 1 *
+bit 931 I 1 IO_PAD303
+bit 930 O 1 IO_PAD303 929 1 Z
+bit 929 C 1 *
+bit 928 I 1 IO_PAD301
+bit 927 O 1 IO_PAD301 926 1 Z
+bit 926 C 1 *
+bit 925 I 1 IO_PAD300
+bit 924 O 1 IO_PAD300 923 1 Z
+bit 923 C 1 *
+bit 922 I 1 IO_PAD299
+bit 921 O 1 IO_PAD299 920 1 Z
+bit 920 C 1 *
+bit 919 I 1 IO_PAD298
+bit 918 O 1 IO_PAD298 917 1 Z
+bit 917 C 1 *
+bit 916 I 1 IO_PAD297
+bit 915 O 1 IO_PAD297 914 1 Z
+bit 914 C 1 *
+bit 913 I 1 IO_PAD295
+bit 912 O 1 IO_PAD295 911 1 Z
+bit 911 C 1 *
+bit 910 I 1 IO_PAD293
+bit 909 O 1 IO_PAD293 908 1 Z
+bit 908 C 1 *
+bit 907 I 1 IO_PAD292
+bit 906 O 1 IO_PAD292 905 1 Z
+bit 905 C 1 *
+bit 904 I 1 IO_PAD291
+bit 903 O 1 IO_PAD291 902 1 Z
+bit 902 C 1 *
+bit 901 I 1 IO_PAD290
+bit 900 O 1 IO_PAD290 899 1 Z
+bit 899 C 1 *
+bit 898 I 1 IO_PAD289
+bit 897 O 1 IO_PAD289 896 1 Z
+bit 896 C 1 *
+bit 895 I 1 IO_PAD287
+bit 894 O 1 IO_PAD287 893 1 Z
+bit 893 C 1 *
+bit 892 I 1 IO_PAD285
+bit 891 O 1 IO_PAD285 890 1 Z
+bit 890 C 1 *
+bit 889 I 1 IO_PAD284
+bit 888 O 1 IO_PAD284 887 1 Z
+bit 887 C 1 *
+bit 886 I 1 IO_PAD283
+bit 885 O 1 IO_PAD283 884 1 Z
+bit 884 C 1 *
+bit 883 I 1 IO_PAD282
+bit 882 O 1 IO_PAD282 881 1 Z
+bit 881 C 1 *
+bit 880 I 1 IO_PAD281
+bit 879 O 1 IO_PAD281 878 1 Z
+bit 878 C 1 *
+bit 877 I 1 IO_PAD279
+bit 876 O 1 IO_PAD279 875 1 Z
+bit 875 C 1 *
+bit 874 I 1 IO_PAD278
+bit 873 O 1 IO_PAD278 872 1 Z
+bit 872 C 1 *
+bit 871 I 1 IO_PAD277
+bit 870 O 1 IO_PAD277 869 1 Z
+bit 869 C 1 *
+bit 868 I 1 IO_PAD275
+bit 867 O 1 IO_PAD275 866 1 Z
+bit 866 C 1 *
+bit 865 I 1 IO_PAD273
+bit 864 O 1 IO_PAD273 863 1 Z
+bit 863 C 1 *
+bit 862 O 1 *
+bit 861 O 1 *
+bit 860 O 1 *
+bit 859 O 1 *
+bit 858 O 1 *
+bit 857 O 1 *
+bit 856 I 1 IO_PAD271
+bit 855 O 1 IO_PAD271 854 1 Z
+bit 854 C 1 *
+bit 853 I 1 IO_PAD269
+bit 852 O 1 IO_PAD269 851 1 Z
+bit 851 C 1 *
+bit 850 I 1 IO_PAD268
+bit 849 O 1 IO_PAD268 848 1 Z
+bit 848 C 1 *
+bit 847 I 1 IO_PAD267
+bit 846 O 1 IO_PAD267 845 1 Z
+bit 845 C 1 *
+bit 844 I 1 IO_PAD266
+bit 843 O 1 IO_PAD266 842 1 Z
+bit 842 C 1 *
+bit 841 I 1 IO_PAD265
+bit 840 O 1 IO_PAD265 839 1 Z
+bit 839 C 1 *
+bit 838 I 1 IO_PAD263
+bit 837 O 1 IO_PAD263 836 1 Z
+bit 836 C 1 *
+bit 835 I 1 IO_PAD261
+bit 834 O 1 IO_PAD261 833 1 Z
+bit 833 C 1 *
+bit 832 I 1 IO_PAD260
+bit 831 O 1 IO_PAD260 830 1 Z
+bit 830 C 1 *
+bit 829 I 1 IO_PAD258
+bit 828 O 1 IO_PAD258 827 1 Z
+bit 827 C 1 *
+bit 826 I 1 IO_PAD257
+bit 825 O 1 IO_PAD257 824 1 Z
+bit 824 C 1 *
+bit 823 I 1 IO_PAD255
+bit 822 O 1 IO_PAD255 821 1 Z
+bit 821 C 1 *
+bit 820 I 1 IO_PAD253
+bit 819 O 1 IO_PAD253 818 1 Z
+bit 818 C 1 *
+bit 817 I 1 IO_PAD252
+bit 816 O 1 IO_PAD252 815 1 Z
+bit 815 C 1 *
+bit 814 I 1 IO_PAD251
+bit 813 O 1 IO_PAD251 812 1 Z
+bit 812 C 1 *
+bit 811 I 1 IO_PAD250
+bit 810 O 1 IO_PAD250 809 1 Z
+bit 809 C 1 *
+bit 808 I 1 IO_PAD249
+bit 807 O 1 IO_PAD249 806 1 Z
+bit 806 C 1 *
+bit 805 I 1 IO_PAD247
+bit 804 O 1 IO_PAD247 803 1 Z
+bit 803 C 1 *
+bit 802 O 1 *
+bit 801 O 1 *
+bit 800 O 1 *
+bit 799 O 1 *
+bit 798 O 1 *
+bit 797 O 1 *
+bit 796 I 1 IO_PAD245
+bit 795 O 1 IO_PAD245 794 1 Z
+bit 794 C 1 *
+bit 793 I 1 IO_PAD243
+bit 792 O 1 IO_PAD243 791 1 Z
+bit 791 C 1 *
+bit 790 I 1 IO_PAD241
+bit 789 O 1 IO_PAD241 788 1 Z
+bit 788 C 1 *
+bit 787 I 1 IO_PAD240
+bit 786 O 1 IO_PAD240 785 1 Z
+bit 785 C 1 *
+bit 784 I 1 IO_PAD239
+bit 783 O 1 IO_PAD239 782 1 Z
+bit 782 C 1 *
+bit 781 I 1 IO_PAD237
+bit 780 O 1 IO_PAD237 779 1 Z
+bit 779 C 1 *
+bit 778 I 1 IO_PAD236
+bit 777 O 1 IO_PAD236 776 1 Z
+bit 776 C 1 *
+bit 775 I 1 IO_PAD235
+bit 774 O 1 IO_PAD235 773 1 Z
+bit 773 C 1 *
+bit 772 I 1 IO_PAD234
+bit 771 O 1 IO_PAD234 770 1 Z
+bit 770 C 1 *
+bit 769 I 1 IO_PAD233
+bit 768 O 1 IO_PAD233 767 1 Z
+bit 767 C 1 *
+bit 766 I 1 IO_PAD231
+bit 765 O 1 IO_PAD231 764 1 Z
+bit 764 C 1 *
+bit 763 I 1 IO_PAD229
+bit 762 O 1 IO_PAD229 761 1 Z
+bit 761 C 1 *
+bit 760 I 1 IO_PAD228
+bit 759 O 1 IO_PAD228 758 1 Z
+bit 758 C 1 *
+bit 757 I 1 IO_PAD227
+bit 756 O 1 IO_PAD227 755 1 Z
+bit 755 C 1 *
+bit 754 I 1 IO_PAD226
+bit 753 O 1 IO_PAD226 752 1 Z
+bit 752 C 1 *
+bit 751 I 1 IO_PAD225
+bit 750 O 1 IO_PAD225 749 1 Z
+bit 749 C 1 *
+bit 748 I 1 IO_PAD223
+bit 747 O 1 IO_PAD223 746 1 Z
+bit 746 C 1 *
+bit 745 I 1 IO_PAD221
+bit 744 O 1 IO_PAD221 743 1 Z
+bit 743 C 1 *
+bit 742 I 1 IO_PAD220
+bit 741 O 1 IO_PAD220 740 1 Z
+bit 740 C 1 *
+bit 739 I 1 IO_PAD219
+bit 738 O 1 IO_PAD219 737 1 Z
+bit 737 C 1 *
+bit 736 I 1 IO_PAD218
+bit 735 O 1 IO_PAD218 734 1 Z
+bit 734 C 1 *
+bit 733 I 1 IO_PAD217
+bit 732 O 1 IO_PAD217 731 1 Z
+bit 731 C 1 *
+bit 730 I 1 IO_PAD215
+bit 729 O 1 IO_PAD215 728 1 Z
+bit 728 C 1 *
+bit 727 O 1 *
+bit 726 O 1 *
+bit 725 O 1 *
+bit 724 O 1 *
+bit 723 O 1 *
+bit 722 O 1 *
+bit 721 I 1 IO_PAD213
+bit 720 O 1 IO_PAD213 719 1 Z
+bit 719 C 1 *
+bit 718 I 1 IO_PAD211
+bit 717 O 1 IO_PAD211 716 1 Z
+bit 716 C 1 *
+bit 715 I 1 IO_PAD210
+bit 714 O 1 IO_PAD210 713 1 Z
+bit 713 C 1 *
+bit 712 I 1 IO_PAD209
+bit 711 O 1 IO_PAD209 710 1 Z
+bit 710 C 1 *
+bit 709 I 1 IO_PAD208
+bit 708 O 1 IO_PAD208 707 1 Z
+bit 707 C 1 *
+bit 706 I 1 IO_PAD207
+bit 705 O 1 IO_PAD207 704 1 Z
+bit 704 C 1 *
+bit 703 I 1 IO_PAD206
+bit 702 O 1 IO_PAD206 701 1 Z
+bit 701 C 1 *
+bit 700 I 1 IO_PAD205
+bit 699 O 1 IO_PAD205 698 1 Z
+bit 698 C 1 *
+bit 697 I 1 IO_PAD204
+bit 696 O 1 IO_PAD204 695 1 Z
+bit 695 C 1 *
+bit 694 I 1 IO_PAD203
+bit 693 O 1 IO_PAD203 692 1 Z
+bit 692 C 1 *
+bit 691 I 1 IO_PAD201
+bit 690 O 1 IO_PAD201 689 1 Z
+bit 689 C 1 *
+bit 688 I 1 IO_PAD199
+bit 687 O 1 IO_PAD199 686 1 Z
+bit 686 C 1 *
+bit 685 I 1 IO_PAD198
+bit 684 O 1 IO_PAD198 683 1 Z
+bit 683 C 1 *
+bit 682 I 1 IO_PAD197
+bit 681 O 1 IO_PAD197 680 1 Z
+bit 680 C 1 *
+bit 679 I 1 IO_PAD196
+bit 678 O 1 IO_PAD196 677 1 Z
+bit 677 C 1 *
+bit 676 I 1 IO_PAD195
+bit 675 O 1 IO_PAD195 674 1 Z
+bit 674 C 1 *
+bit 673 I 1 IO_PAD193
+bit 672 O 1 IO_PAD193 671 1 Z
+bit 671 C 1 *
+bit 670 I 1 IO_PAD192
+bit 669 O 1 IO_PAD192 668 1 Z
+bit 668 C 1 *
+bit 667 I 1 IO_PAD191
+bit 666 O 1 IO_PAD191 665 1 Z
+bit 665 C 1 *
+bit 664 I 1 IO_PAD189
+bit 663 O 1 IO_PAD189 662 1 Z
+bit 662 C 1 *
+bit 661 O 1 *
+bit 660 O 1 *
+bit 659 O 1 *
+bit 658 O 1 *
+bit 657 O 1 *
+bit 656 O 1 *
+bit 655 I 1 IO_PAD188
+bit 654 O 1 IO_PAD188 653 1 Z
+bit 653 C 1 *
+bit 652 I 1 IO_PAD187
+bit 651 O 1 IO_PAD187 650 1 Z
+bit 650 C 1 *
+bit 649 I 1 IO_PAD185
+bit 648 O 1 IO_PAD185 647 1 Z
+bit 647 C 1 *
+bit 646 I 1 IO_PAD184
+bit 645 O 1 IO_PAD184 644 1 Z
+bit 644 C 1 *
+bit 643 I 1 IO_PAD183
+bit 642 O 1 IO_PAD183 641 1 Z
+bit 641 C 1 *
+bit 640 I 1 IO_PAD182
+bit 639 O 1 IO_PAD182 638 1 Z
+bit 638 C 1 *
+bit 637 I 1 IO_PAD181
+bit 636 O 1 IO_PAD181 635 1 Z
+bit 635 C 1 *
+bit 634 I 1 IO_PAD179
+bit 633 O 1 IO_PAD179 632 1 Z
+bit 632 C 1 *
+bit 631 I 1 IO_PAD177
+bit 630 O 1 IO_PAD177 629 1 Z
+bit 629 C 1 *
+bit 628 I 1 IO_PAD176
+bit 627 O 1 IO_PAD176 626 1 Z
+bit 626 C 1 *
+bit 625 I 1 IO_PAD175
+bit 624 O 1 IO_PAD175 623 1 Z
+bit 623 C 1 *
+bit 622 I 1 IO_PAD174
+bit 621 O 1 IO_PAD174 620 1 Z
+bit 620 C 1 *
+bit 619 I 1 IO_PAD173
+bit 618 O 1 IO_PAD173 617 1 Z
+bit 617 C 1 *
+bit 616 I 1 IO_PAD172
+bit 615 O 1 IO_PAD172 614 1 Z
+bit 614 C 1 *
+bit 613 I 1 IO_PAD171
+bit 612 O 1 IO_PAD171 611 1 Z
+bit 611 C 1 *
+bit 610 I 1 IO_PAD169
+bit 609 O 1 IO_PAD169 608 1 Z
+bit 608 C 1 *
+bit 607 I 1 IO_PAD167
+bit 606 O 1 IO_PAD167 605 1 Z
+bit 605 C 1 *
+bit 604 I 1 IO_PAD166
+bit 603 O 1 IO_PAD166 602 1 Z
+bit 602 C 1 *
+bit 601 I 1 IO_PAD165
+bit 600 O 1 IO_PAD165 599 1 Z
+bit 599 C 1 *
+bit 598 I 1 IO_PAD164
+bit 597 O 1 IO_PAD164 596 1 Z
+bit 596 C 1 *
+bit 595 I 1 IO_PAD163
+bit 594 O 1 IO_PAD163 593 1 Z
+bit 593 C 1 *
+bit 592 I 1 IO_PAD161
+bit 591 O 1 IO_PAD161 590 1 Z
+bit 590 C 1 *
+bit 589 I 1 IO_PAD159
+bit 588 O 1 IO_PAD159 587 1 Z
+bit 587 C 1 *
+bit 586 O 1 *
+bit 585 O 1 *
+bit 584 O 1 *
+bit 583 O 1 *
+bit 582 O 1 *
+bit 581 O 1 *
+bit 580 I 1 IO_PAD157
+bit 579 O 1 IO_PAD157 578 1 Z
+bit 578 C 1 *
+bit 577 I 1 IO_PAD155
+bit 576 O 1 IO_PAD155 575 1 Z
+bit 575 C 1 *
+bit 574 I 1 IO_PAD154
+bit 573 O 1 IO_PAD154 572 1 Z
+bit 572 C 1 *
+bit 571 I 1 IO_PAD153
+bit 570 O 1 IO_PAD153 569 1 Z
+bit 569 C 1 *
+bit 568 I 1 IO_PAD151
+bit 567 O 1 IO_PAD151 566 1 Z
+bit 566 C 1 *
+bit 565 I 1 IO_PAD150
+bit 564 O 1 IO_PAD150 563 1 Z
+bit 563 C 1 *
+bit 562 I 1 IO_PAD149
+bit 561 O 1 IO_PAD149 560 1 Z
+bit 560 C 1 *
+bit 559 I 1 IO_PAD147
+bit 558 O 1 IO_PAD147 557 1 Z
+bit 557 C 1 *
+bit 556 I 1 IO_PAD146
+bit 555 O 1 IO_PAD146 554 1 Z
+bit 554 C 1 *
+bit 553 I 1 IO_PAD145
+bit 552 O 1 IO_PAD145 551 1 Z
+bit 551 C 1 *
+bit 550 I 1 IO_PAD143
+bit 549 O 1 IO_PAD143 548 1 Z
+bit 548 C 1 *
+bit 547 I 1 IO_PAD142
+bit 546 O 1 IO_PAD142 545 1 Z
+bit 545 C 1 *
+bit 544 I 1 IO_PAD141
+bit 543 O 1 IO_PAD141 542 1 Z
+bit 542 C 1 *
+bit 541 O 1 *
+bit 540 I 1 HSWAP_EN_PAD137
+bit 539 I 1 IO_PAD136
+bit 538 O 1 IO_PAD136 537 1 Z
+bit 537 C 1 *
+bit 536 I 1 IO_PAD135
+bit 535 O 1 IO_PAD135 534 1 Z
+bit 534 C 1 *
+bit 533 I 1 IO_PAD133
+bit 532 O 1 IO_PAD133 531 1 Z
+bit 531 C 1 *
+bit 530 I 1 IO_PAD131
+bit 529 O 1 IO_PAD131 528 1 Z
+bit 528 C 1 *
+bit 527 I 1 IO_PAD130
+bit 526 O 1 IO_PAD130 525 1 Z
+bit 525 C 1 *
+bit 524 I 1 IO_PAD129
+bit 523 O 1 IO_PAD129 522 1 Z
+bit 522 C 1 *
+bit 521 I 1 IO_PAD127
+bit 520 O 1 IO_PAD127 519 1 Z
+bit 519 C 1 *
+bit 518 I 1 IO_PAD125
+bit 517 O 1 IO_PAD125 516 1 Z
+bit 516 C 1 *
+bit 515 I 1 IO_PAD123
+bit 514 O 1 IO_PAD123 513 1 Z
+bit 513 C 1 *
+bit 512 I 1 IO_PAD122
+bit 511 O 1 IO_PAD122 510 1 Z
+bit 510 C 1 *
+bit 509 I 1 IO_PAD121
+bit 508 O 1 IO_PAD121 507 1 Z
+bit 507 C 1 *
+bit 506 I 1 IO_PAD120
+bit 505 O 1 IO_PAD120 504 1 Z
+bit 504 C 1 *
+bit 503 I 1 IO_PAD119
+bit 502 O 1 IO_PAD119 501 1 Z
+bit 501 C 1 *
+bit 500 I 1 IO_PAD117
+bit 499 O 1 IO_PAD117 498 1 Z
+bit 498 C 1 *
+bit 497 I 1 IO_PAD115
+bit 496 O 1 IO_PAD115 495 1 Z
+bit 495 C 1 *
+bit 494 I 1 IO_PAD113
+bit 493 O 1 IO_PAD113 492 1 Z
+bit 492 C 1 *
+bit 491 I 1 IO_PAD111
+bit 490 O 1 IO_PAD111 489 1 Z
+bit 489 C 1 *
+bit 488 I 1 IO_PAD109
+bit 487 O 1 IO_PAD109 486 1 Z
+bit 486 C 1 *
+bit 485 I 1 IO_PAD107
+bit 484 O 1 IO_PAD107 483 1 Z
+bit 483 C 1 *
+bit 482 I 1 IO_PAD105
+bit 481 O 1 IO_PAD105 480 1 Z
+bit 480 C 1 *
+bit 479 I 1 IO_PAD104
+bit 478 O 1 IO_PAD104 477 1 Z
+bit 477 C 1 *
+bit 476 I 1 IO_PAD103
+bit 475 O 1 IO_PAD103 474 1 Z
+bit 474 C 1 *
+bit 473 I 1 IO_PAD102
+bit 472 O 1 IO_PAD102 471 1 Z
+bit 471 C 1 *
+bit 470 I 1 IO_PAD101
+bit 469 O 1 IO_PAD101 468 1 Z
+bit 468 C 1 *
+bit 467 I 1 IO_PAD99
+bit 466 O 1 IO_PAD99 465 1 Z
+bit 465 C 1 *
+bit 464 I 1 IO_PAD98
+bit 463 O 1 IO_PAD98 462 1 Z
+bit 462 C 1 *
+bit 461 I 1 IO_PAD97
+bit 460 O 1 IO_PAD97 459 1 Z
+bit 459 C 1 *
+bit 458 I 1 IO_PAD95
+bit 457 O 1 IO_PAD95 456 1 Z
+bit 456 C 1 *
+bit 455 I 1 IO_PAD93
+bit 454 O 1 IO_PAD93 453 1 Z
+bit 453 C 1 *
+bit 452 I 1 IO_PAD92
+bit 451 O 1 IO_PAD92 450 1 Z
+bit 450 C 1 *
+bit 449 I 1 IO_PAD91
+bit 448 O 1 IO_PAD91 447 1 Z
+bit 447 C 1 *
+bit 446 I 1 IO_PAD89
+bit 445 O 1 IO_PAD89 444 1 Z
+bit 444 C 1 *
+bit 443 I 1 IO_PAD87
+bit 442 O 1 IO_PAD87 441 1 Z
+bit 441 C 1 *
+bit 440 I 1 IO_PAD85
+bit 439 O 1 IO_PAD85 438 1 Z
+bit 438 C 1 *
+bit 437 I 1 IO_PAD83
+bit 436 O 1 IO_PAD83 435 1 Z
+bit 435 C 1 *
+bit 434 I 1 IO_PAD81
+bit 433 O 1 IO_PAD81 432 1 Z
+bit 432 C 1 *
+bit 431 I 1 IO_PAD80
+bit 430 O 1 IO_PAD80 429 1 Z
+bit 429 C 1 *
+bit 428 I 1 IO_PAD79
+bit 427 O 1 IO_PAD79 426 1 Z
+bit 426 C 1 *
+bit 425 I 1 IO_PAD77
+bit 424 O 1 IO_PAD77 423 1 Z
+bit 423 C 1 *
+bit 422 I 1 IO_PAD75
+bit 421 O 1 IO_PAD75 420 1 Z
+bit 420 C 1 *
+bit 419 I 1 IO_PAD74
+bit 418 O 1 IO_PAD74 417 1 Z
+bit 417 C 1 *
+bit 416 I 1 IO_PAD73
+bit 415 O 1 IO_PAD73 414 1 Z
+bit 414 C 1 *
+bit 413 I 1 IO_PAD71
+bit 412 O 1 IO_PAD71 411 1 Z
+bit 411 C 1 *
+bit 410 I 1 IO_PAD70
+bit 409 O 1 IO_PAD70 408 1 Z
+bit 408 C 1 *
+bit 407 I 1 IO_PAD69
+bit 406 O 1 IO_PAD69 405 1 Z
+bit 405 C 1 *
+bit 404 I 1 IO_PAD67
+bit 403 O 1 IO_PAD67 402 1 Z
+bit 402 C 1 *
+bit 401 I 1 IO_PAD65
+bit 400 O 1 IO_PAD65 399 1 Z
+bit 399 C 1 *
+bit 398 I 1 IO_PAD63
+bit 397 O 1 IO_PAD63 396 1 Z
+bit 396 C 1 *
+bit 395 I 1 IO_PAD62
+bit 394 O 1 IO_PAD62 393 1 Z
+bit 393 C 1 *
+bit 392 I 1 IO_PAD61
+bit 391 O 1 IO_PAD61 390 1 Z
+bit 390 C 1 *
+bit 389 I 1 IO_PAD59
+bit 388 O 1 IO_PAD59 387 1 Z
+bit 387 C 1 *
+bit 386 I 1 IO_PAD58
+bit 385 O 1 IO_PAD58 384 1 Z
+bit 384 C 1 *
+bit 383 I 1 IO_PAD57
+bit 382 O 1 IO_PAD57 381 1 Z
+bit 381 C 1 *
+bit 380 I 1 IO_PAD55
+bit 379 O 1 IO_PAD55 378 1 Z
+bit 378 C 1 *
+bit 377 I 1 IO_PAD53
+bit 376 O 1 IO_PAD53 375 1 Z
+bit 375 C 1 *
+bit 374 I 1 IO_PAD51
+bit 373 O 1 IO_PAD51 372 1 Z
+bit 372 C 1 *
+bit 371 I 1 IO_PAD50
+bit 370 O 1 IO_PAD50 369 1 Z
+bit 369 C 1 *
+bit 368 I 1 IO_PAD49
+bit 367 O 1 IO_PAD49 366 1 Z
+bit 366 C 1 *
+bit 365 I 1 IO_PAD47
+bit 364 O 1 IO_PAD47 363 1 Z
+bit 363 C 1 *
+bit 362 I 1 IO_PAD46
+bit 361 O 1 IO_PAD46 360 1 Z
+bit 360 C 1 *
+bit 359 I 1 IO_PAD45
+bit 358 O 1 IO_PAD45 357 1 Z
+bit 357 C 1 *
+bit 356 I 1 IO_PAD43
+bit 355 O 1 IO_PAD43 354 1 Z
+bit 354 C 1 *
+bit 353 I 1 IO_PAD41
+bit 352 O 1 IO_PAD41 351 1 Z
+bit 351 C 1 *
+bit 350 I 1 IO_PAD39
+bit 349 O 1 IO_PAD39 348 1 Z
+bit 348 C 1 *
+bit 347 I 1 IO_PAD38
+bit 346 O 1 IO_PAD38 345 1 Z
+bit 345 C 1 *
+bit 344 I 1 IO_PAD37
+bit 343 O 1 IO_PAD37 342 1 Z
+bit 342 C 1 *
+bit 341 I 1 IO_PAD35
+bit 340 O 1 IO_PAD35 339 1 Z
+bit 339 C 1 *
+bit 338 I 1 IO_PAD34
+bit 337 O 1 IO_PAD34 336 1 Z
+bit 336 C 1 *
+bit 335 I 1 IO_PAD33
+bit 334 O 1 IO_PAD33 333 1 Z
+bit 333 C 1 *
+bit 332 I 1 IO_PAD31
+bit 331 O 1 IO_PAD31 330 1 Z
+bit 330 C 1 *
+bit 329 I 1 IO_PAD29
+bit 328 O 1 IO_PAD29 327 1 Z
+bit 327 C 1 *
+bit 326 I 1 IO_PAD28
+bit 325 O 1 IO_PAD28 324 1 Z
+bit 324 C 1 *
+bit 323 I 1 IO_PAD27
+bit 322 O 1 IO_PAD27 321 1 Z
+bit 321 C 1 *
+bit 320 I 1 IO_PAD26
+bit 319 O 1 IO_PAD26 318 1 Z
+bit 318 C 1 *
+bit 317 I 1 IO_PAD25
+bit 316 O 1 IO_PAD25 315 1 Z
+bit 315 C 1 *
+bit 314 I 1 IO_PAD23
+bit 313 O 1 IO_PAD23 312 1 Z
+bit 312 C 1 *
+bit 311 I 1 IO_PAD21
+bit 310 O 1 IO_PAD21 309 1 Z
+bit 309 C 1 *
+bit 308 I 1 IO_PAD19
+bit 307 O 1 IO_PAD19 306 1 Z
+bit 306 C 1 *
+bit 305 I 1 IO_PAD17
+bit 304 O 1 IO_PAD17 303 1 Z
+bit 303 C 1 *
+bit 302 I 1 IO_PAD15
+bit 301 O 1 IO_PAD15 300 1 Z
+bit 300 C 1 *
+bit 299 I 1 IO_PAD14
+bit 298 O 1 IO_PAD14 297 1 Z
+bit 297 C 1 *
+bit 296 I 1 IO_PAD13
+bit 295 O 1 IO_PAD13 294 1 Z
+bit 294 C 1 *
+bit 293 I 1 IO_PAD11
+bit 292 O 1 IO_PAD11 291 1 Z
+bit 291 C 1 *
+bit 290 I 1 IO_PAD10
+bit 289 O 1 IO_PAD10 288 1 Z
+bit 288 C 1 *
+bit 287 I 1 IO_PAD9
+bit 286 O 1 IO_PAD9 285 1 Z
+bit 285 C 1 *
+bit 284 I 1 IO_PAD7
+bit 283 O 1 IO_PAD7 282 1 Z
+bit 282 C 1 *
+bit 281 I 1 IO_PAD5
+bit 280 O 1 IO_PAD5 279 1 Z
+bit 279 C 1 *
+bit 278 I 1 IO_PAD4
+bit 277 O 1 IO_PAD4 276 1 Z
+bit 276 C 1 *
+bit 275 I 1 IO_PAD3
+bit 274 O 1 IO_PAD3 273 1 Z
+bit 273 C 1 *
+bit 272 I 1 IO_PAD2
+bit 271 O 1 IO_PAD2 270 1 Z
+bit 270 C 1 *
+bit 269 I 1 IO_PAD1030
+bit 268 O 1 IO_PAD1030 267 1 Z
+bit 267 C 1 *
+bit 266 I 1 IO_PAD1029
+bit 265 O 1 IO_PAD1029 264 1 Z
+bit 264 C 1 *
+bit 263 I 1 IO_PAD1028
+bit 262 O 1 IO_PAD1028 261 1 Z
+bit 261 C 1 *
+bit 260 I 1 IO_PAD1027
+bit 259 O 1 IO_PAD1027 258 1 Z
+bit 258 C 1 *
+bit 257 I 1 IO_PAD1025
+bit 256 O 1 IO_PAD1025 255 1 Z
+bit 255 C 1 *
+bit 254 I 1 IO_PAD1023
+bit 253 O 1 IO_PAD1023 252 1 Z
+bit 252 C 1 *
+bit 251 I 1 IO_PAD1022
+bit 250 O 1 IO_PAD1022 249 1 Z
+bit 249 C 1 *
+bit 248 I 1 IO_PAD1021
+bit 247 O 1 IO_PAD1021 246 1 Z
+bit 246 C 1 *
+bit 245 I 1 IO_PAD1019
+bit 244 O 1 IO_PAD1019 243 1 Z
+bit 243 C 1 *
+bit 242 I 1 IO_PAD1018
+bit 241 O 1 IO_PAD1018 240 1 Z
+bit 240 C 1 *
+bit 239 I 1 IO_PAD1017
+bit 238 O 1 IO_PAD1017 237 1 Z
+bit 237 C 1 *
+bit 236 I 1 IO_PAD1015
+bit 235 O 1 IO_PAD1015 234 1 Z
+bit 234 C 1 *
+bit 233 I 1 IO_PAD1013
+bit 232 O 1 IO_PAD1013 231 1 Z
+bit 231 C 1 *
+bit 230 I 1 IO_PAD1011
+bit 229 O 1 IO_PAD1011 228 1 Z
+bit 228 C 1 *
+bit 227 I 1 IO_PAD1009
+bit 226 O 1 IO_PAD1009 225 1 Z
+bit 225 C 1 *
+bit 224 I 1 IO_PAD1007
+bit 223 O 1 IO_PAD1007 222 1 Z
+bit 222 C 1 *
+bit 221 I 1 IO_PAD1006
+bit 220 O 1 IO_PAD1006 219 1 Z
+bit 219 C 1 *
+bit 218 I 1 IO_PAD1005
+bit 217 O 1 IO_PAD1005 216 1 Z
+bit 216 C 1 *
+bit 215 I 1 IO_PAD1004
+bit 214 O 1 IO_PAD1004 213 1 Z
+bit 213 C 1 *
+bit 212 I 1 IO_PAD1003
+bit 211 O 1 IO_PAD1003 210 1 Z
+bit 210 C 1 *
+bit 209 I 1 IO_PAD1001
+bit 208 O 1 IO_PAD1001 207 1 Z
+bit 207 C 1 *
+bit 206 I 1 IO_PAD999
+bit 205 O 1 IO_PAD999 204 1 Z
+bit 204 C 1 *
+bit 203 I 1 IO_PAD998
+bit 202 O 1 IO_PAD998 201 1 Z
+bit 201 C 1 *
+bit 200 I 1 IO_PAD997
+bit 199 O 1 IO_PAD997 198 1 Z
+bit 198 C 1 *
+bit 197 I 1 IO_PAD995
+bit 196 O 1 IO_PAD995 195 1 Z
+bit 195 C 1 *
+bit 194 I 1 IO_PAD994
+bit 193 O 1 IO_PAD994 192 1 Z
+bit 192 C 1 *
+bit 191 I 1 IO_PAD993
+bit 190 O 1 IO_PAD993 189 1 Z
+bit 189 C 1 *
+bit 188 I 1 IO_PAD991
+bit 187 O 1 IO_PAD991 186 1 Z
+bit 186 C 1 *
+bit 185 I 1 IO_PAD989
+bit 184 O 1 IO_PAD989 183 1 Z
+bit 183 C 1 *
+bit 182 I 1 IO_PAD987
+bit 181 O 1 IO_PAD987 180 1 Z
+bit 180 C 1 *
+bit 179 I 1 IO_PAD986
+bit 178 O 1 IO_PAD986 177 1 Z
+bit 177 C 1 *
+bit 176 I 1 IO_PAD985
+bit 175 O 1 IO_PAD985 174 1 Z
+bit 174 C 1 *
+bit 173 I 1 IO_PAD983
+bit 172 O 1 IO_PAD983 171 1 Z
+bit 171 C 1 *
+bit 170 I 1 IO_PAD982
+bit 169 O 1 IO_PAD982 168 1 Z
+bit 168 C 1 *
+bit 167 I 1 IO_PAD981
+bit 166 O 1 IO_PAD981 165 1 Z
+bit 165 C 1 *
+bit 164 I 1 IO_PAD979
+bit 163 O 1 IO_PAD979 162 1 Z
+bit 162 C 1 *
+bit 161 I 1 IO_PAD977
+bit 160 O 1 IO_PAD977 159 1 Z
+bit 159 C 1 *
+bit 158 I 1 IO_PAD975
+bit 157 O 1 IO_PAD975 156 1 Z
+bit 156 C 1 *
+bit 155 I 1 IO_PAD974
+bit 154 O 1 IO_PAD974 153 1 Z
+bit 153 C 1 *
+bit 152 I 1 IO_PAD973
+bit 151 O 1 IO_PAD973 150 1 Z
+bit 150 C 1 *
+bit 149 I 1 IO_PAD971
+bit 148 O 1 IO_PAD971 147 1 Z
+bit 147 C 1 *
+bit 146 I 1 IO_PAD970
+bit 145 O 1 IO_PAD970 144 1 Z
+bit 144 C 1 *
+bit 143 I 1 IO_PAD969
+bit 142 O 1 IO_PAD969 141 1 Z
+bit 141 C 1 *
+bit 140 I 1 IO_PAD967
+bit 139 O 1 IO_PAD967 138 1 Z
+bit 138 C 1 *
+bit 137 I 1 IO_PAD965
+bit 136 O 1 IO_PAD965 135 1 Z
+bit 135 C 1 *
+bit 134 I 1 IO_PAD963
+bit 133 O 1 IO_PAD963 132 1 Z
+bit 132 C 1 *
+bit 131 I 1 IO_PAD962
+bit 130 O 1 IO_PAD962 129 1 Z
+bit 129 C 1 *
+bit 128 I 1 IO_PAD961
+bit 127 O 1 IO_PAD961 126 1 Z
+bit 126 C 1 *
+bit 125 I 1 IO_PAD959
+bit 124 O 1 IO_PAD959 123 1 Z
+bit 123 C 1 *
+bit 122 I 1 IO_PAD958
+bit 121 O 1 IO_PAD958 120 1 Z
+bit 120 C 1 *
+bit 119 I 1 IO_PAD957
+bit 118 O 1 IO_PAD957 117 1 Z
+bit 117 C 1 *
+bit 116 I 1 IO_PAD955
+bit 115 O 1 IO_PAD955 114 1 Z
+bit 114 C 1 *
+bit 113 I 1 IO_PAD953
+bit 112 O 1 IO_PAD953 111 1 Z
+bit 111 C 1 *
+bit 110 I 1 IO_PAD952
+bit 109 O 1 IO_PAD952 108 1 Z
+bit 108 C 1 *
+bit 107 I 1 IO_PAD951
+bit 106 O 1 IO_PAD951 105 1 Z
+bit 105 C 1 *
+bit 104 I 1 IO_PAD949
+bit 103 O 1 IO_PAD949 102 1 Z
+bit 102 C 1 *
+bit 101 I 1 IO_PAD947
+bit 100 O 1 IO_PAD947 99 1 Z
+bit 99 C 1 *
+bit 98 I 1 IO_PAD945
+bit 97 O 1 IO_PAD945 96 1 Z
+bit 96 C 1 *
+bit 95 I 1 IO_PAD943
+bit 94 O 1 IO_PAD943 93 1 Z
+bit 93 C 1 *
+bit 92 I 1 IO_PAD941
+bit 91 O 1 IO_PAD941 90 1 Z
+bit 90 C 1 *
+bit 89 I 1 IO_PAD940
+bit 88 O 1 IO_PAD940 87 1 Z
+bit 87 C 1 *
+bit 86 I 1 IO_PAD939
+bit 85 O 1 IO_PAD939 84 1 Z
+bit 84 C 1 *
+bit 83 I 1 IO_PAD937
+bit 82 O 1 IO_PAD937 81 1 Z
+bit 81 C 1 *
+bit 80 I 1 IO_PAD935
+bit 79 O 1 IO_PAD935 78 1 Z
+bit 78 C 1 *
+bit 77 I 1 IO_PAD934
+bit 76 O 1 IO_PAD934 75 1 Z
+bit 75 C 1 *
+bit 74 I 1 IO_PAD933
+bit 73 O 1 IO_PAD933 72 1 Z
+bit 72 C 1 *
+bit 71 I 1 IO_PAD931
+bit 70 O 1 IO_PAD931 69 1 Z
+bit 69 C 1 *
+bit 68 I 1 IO_PAD930
+bit 67 O 1 IO_PAD930 66 1 Z
+bit 66 C 1 *
+bit 65 I 1 IO_PAD929
+bit 64 O 1 IO_PAD929 63 1 Z
+bit 63 C 1 *
+bit 62 I 1 IO_PAD928
+bit 61 O 1 IO_PAD928 60 1 Z
+bit 60 C 1 *
+bit 59 I 1 IO_PAD927
+bit 58 O 1 IO_PAD927 57 1 Z
+bit 57 C 1 *
+bit 56 I 1 IO_PAD925
+bit 55 O 1 IO_PAD925 54 1 Z
+bit 54 C 1 *
+bit 53 I 1 IO_PAD923
+bit 52 O 1 IO_PAD923 51 1 Z
+bit 51 C 1 *
+bit 50 I 1 IO_PAD921
+bit 49 O 1 IO_PAD921 48 1 Z
+bit 48 C 1 *
+bit 47 I 1 IO_PAD920
+bit 46 O 1 IO_PAD920 45 1 Z
+bit 45 C 1 *
+bit 44 I 1 IO_PAD919
+bit 43 O 1 IO_PAD919 42 1 Z
+bit 42 C 1 *
+bit 41 I 1 IO_PAD917
+bit 40 O 1 IO_PAD917 39 1 Z
+bit 39 C 1 *
+bit 38 I 1 IO_PAD915
+bit 37 O 1 IO_PAD915 36 1 Z
+bit 36 C 1 *
+bit 35 I 1 IO_PAD914
+bit 34 O 1 IO_PAD914 33 1 Z
+bit 33 C 1 *
+bit 32 I 1 IO_PAD913
+bit 31 O 1 IO_PAD913 30 1 Z
+bit 30 C 1 *
+bit 29 I 1 IO_PAD912
+bit 28 O 1 IO_PAD912 27 1 Z
+bit 27 C 1 *
+bit 26 I 1 IO_PAD911
+bit 25 O 1 IO_PAD911 24 1 Z
+bit 24 C 1 *
+bit 23 I 1 IO_PAD909
+bit 22 O 1 IO_PAD909 21 1 Z
+bit 21 C 1 *
+bit 20 I 1 IO_PAD907
+bit 19 O 1 IO_PAD907 18 1 Z
+bit 18 C 1 *
+bit 17 I 1 IO_PAD905
+bit 16 O 1 IO_PAD905 15 1 Z
+bit 15 C 1 *
+bit 14 I 1 IO_PAD904
+bit 13 O 1 IO_PAD904 12 1 Z
+bit 12 C 1 *
+bit 11 I 1 IO_PAD903
+bit 10 O 1 IO_PAD903 9 1 Z
+bit 9 C 1 *
+bit 8 I 1 IO_PAD901
+bit 7 O 1 IO_PAD901 6 1 Z
+bit 6 C 1 *
+bit 5 I 1 IO_PAD899
+bit 4 O 1 IO_PAD899 3 1 Z
+bit 3 C 1 *
+bit 2 I 1 IO_PAD898
+bit 1 O 1 IO_PAD898 0 1 Z
+bit 0 C 1 *
--- /dev/null
+signal GND1
+signal GND2
+signal GND3
+signal GND4
+signal GND5
+signal GND6
+signal GND7
+signal GND8
+signal GND9
+signal GND10
+signal GND11
+signal GND12
+signal GND13
+signal GND14
+signal GND15
+signal GND16
+signal GND17
+signal GND18
+signal GND19
+signal GND20
+signal GND21
+signal GND22
+signal GND23
+signal GND24
+signal GND25
+signal GND26
+signal GND27
+signal GND28
+signal GND29
+signal GND30
+signal GND31
+signal GND32
+signal GND33
+signal GND34
+signal GND35
+signal GND36
+signal GND37
+signal GND38
+signal GND39
+signal GND40
+signal GND41
+signal GND42
+signal GND43
+signal GND44
+signal GND45
+signal GND46
+signal GND47
+signal GND48
+signal GND49
+signal GND50
+signal GND51
+signal GND52
+signal GND53
+signal GND54
+signal GND55
+signal GND56
+signal GND57
+signal GND58
+signal GND59
+signal GND60
+signal GND61
+signal GND62
+signal GND63
+signal GND64
+signal GND65
+signal GND66
+signal GND67
+signal GND68
+signal GND69
+signal GND70
+signal GND71
+signal GND72
+signal GND73
+signal GND74
+signal GND75
+signal GND76
+signal GND77
+signal GND78
+signal GND79
+signal GND80
+signal GND81
+signal GND82
+signal GND83
+signal GND84
+signal GND85
+signal GND86
+signal GND87
+signal GND88
+signal GND89
+signal GND90
+signal GND91
+signal GND92
+signal GND93
+signal GND94
+signal GND95
+signal GND96
+signal GND97
+signal GND98
+signal GND99
+signal GND100
+signal GND101
+signal GND102
+signal GND103
+signal GND104
+signal GND105
+signal GND106
+signal GND107
+signal GND108
+signal GND109
+signal GND110
+signal GND111
+signal GND112
+signal GND113
+signal GND114
+signal GND115
+signal GND116
+signal GND117
+signal GND118
+signal GND119
+signal GND120
+signal GND121
+signal GND122
+signal GND123
+signal GND124
+signal GND125
+signal GND126
+signal GND127
+signal GND128
+signal GND129
+signal GND130
+signal GND131
+signal GND132
+signal GND133
+signal GND134
+signal GND135
+signal GND136
+signal GND137
+signal GND138
+signal GND139
+signal GND140
+signal GND141
+signal GND142
+signal GND143
+signal GND144
+signal GND145
+signal GND146
+signal GND147
+signal GND148
+signal GND149
+signal GND150
+signal GND151
+signal GND152
+signal GND153
+signal GND154
+signal GND155
+signal GND156
+signal GND157
+signal GND158
+signal GND159
+signal GND160
+signal GND161
+signal GND162
+signal GND163
+signal GND164
+signal GND165
+signal GND166
+signal GND167
+signal GND168
+signal GND169
+signal GND170
+signal GND171
+signal GND172
+signal GND173
+signal GND174
+signal GND175
+signal GND176
+signal GND177
+signal GND178
+signal GND179
+signal GND180
+signal GND181
+signal GND182
+signal GND183
+signal GND184
+signal CCLK_AL31
+signal DONE_AD24
+signal HSWAP_EN_L11
+signal M0_AL4
+signal M1_AK4
+signal M2_AG8
+signal PROG_B
+signal TCK
+signal TDI
+signal TDO
+signal TMS
+signal VCCAUX1
+signal VCCAUX2
+signal VCCAUX3
+signal VCCAUX4
+signal VCCAUX5
+signal VCCAUX6
+signal VCCAUX7
+signal VCCAUX8
+signal VCCAUX9
+signal VCCAUX10
+signal VCCAUX11
+signal VCCAUX12
+signal VCCAUX13
+signal VCCAUX14
+signal VCCAUX15
+signal VCCAUX16
+signal VCCAUX17
+signal VCCAUX18
+signal VCCAUX19
+signal VCCAUX20
+signal VCCAUX21
+signal VCCAUX22
+signal VCCAUX23
+signal VCCAUX24
+signal VCCAUX25
+signal VCCAUX26
+signal VCCAUX27
+signal VCCAUX28
+signal VCCAUX29
+signal VCCAUX30
+signal VCCAUX31
+signal VCCAUX32
+signal VCCINT1
+signal VCCINT2
+signal VCCINT3
+signal VCCINT4
+signal VCCINT5
+signal VCCINT6
+signal VCCINT7
+signal VCCINT8
+signal VCCINT9
+signal VCCINT10
+signal VCCINT11
+signal VCCINT12
+signal VCCINT13
+signal VCCINT14
+signal VCCINT15
+signal VCCINT16
+signal VCCINT17
+signal VCCINT18
+signal VCCINT19
+signal VCCINT20
+signal VCCINT21
+signal VCCINT22
+signal VCCINT23
+signal VCCINT24
+signal VCCINT25
+signal VCCINT26
+signal VCCINT27
+signal VCCINT28
+signal VCCINT29
+signal VCCINT30
+signal VCCINT31
+signal VCCINT32
+signal VCCINT33
+signal VCCINT34
+signal VCCINT35
+signal VCCINT36
+signal VCCINT37
+signal VCCINT38
+signal VCCINT39
+signal VCCINT40
+signal VCCO01
+signal VCCO02
+signal VCCO03
+signal VCCO04
+signal VCCO05
+signal VCCO06
+signal VCCO07
+signal VCCO08
+signal VCCO09
+signal VCCO010
+signal VCCO011
+signal VCCO012
+signal VCCO013
+signal VCCO11
+signal VCCO12
+signal VCCO13
+signal VCCO14
+signal VCCO15
+signal VCCO16
+signal VCCO17
+signal VCCO18
+signal VCCO19
+signal VCCO110
+signal VCCO111
+signal VCCO112
+signal VCCO113
+signal VCCO21
+signal VCCO22
+signal VCCO23
+signal VCCO24
+signal VCCO25
+signal VCCO26
+signal VCCO27
+signal VCCO28
+signal VCCO29
+signal VCCO210
+signal VCCO211
+signal VCCO212
+signal VCCO213
+signal VCCO31
+signal VCCO32
+signal VCCO33
+signal VCCO34
+signal VCCO35
+signal VCCO36
+signal VCCO37
+signal VCCO38
+signal VCCO39
+signal VCCO310
+signal VCCO311
+signal VCCO312
+signal VCCO313
+signal VCCO41
+signal VCCO42
+signal VCCO43
+signal VCCO44
+signal VCCO45
+signal VCCO46
+signal VCCO47
+signal VCCO48
+signal VCCO49
+signal VCCO410
+signal VCCO411
+signal VCCO412
+signal VCCO413
+signal VCCO51
+signal VCCO52
+signal VCCO53
+signal VCCO54
+signal VCCO55
+signal VCCO56
+signal VCCO57
+signal VCCO58
+signal VCCO59
+signal VCCO510
+signal VCCO511
+signal VCCO512
+signal VCCO513
+signal VCCO61
+signal VCCO62
+signal VCCO63
+signal VCCO64
+signal VCCO65
+signal VCCO66
+signal VCCO67
+signal VCCO68
+signal VCCO69
+signal VCCO610
+signal VCCO611
+signal VCCO612
+signal VCCO613
+signal VCCO71
+signal VCCO72
+signal VCCO73
+signal VCCO74
+signal VCCO75
+signal VCCO76
+signal VCCO77
+signal VCCO78
+signal VCCO79
+signal VCCO710
+signal VCCO711
+signal VCCO712
+signal VCCO713
+signal IO_A3
+signal IO_A4
+signal IO_A6
+signal IO_A8
+signal IO_A10
+signal IO_A12
+signal IO_A14
+signal IO_A15
+signal IO_A17
+signal IO_A18
+signal IO_A20
+signal IO_A21
+signal IO_A23
+signal IO_A24
+signal IO_A25
+signal IO_A27
+signal IO_A29
+signal IO_A31
+signal IO_A32
+signal IO_B3
+signal IO_B4
+signal IO_B5
+signal IO_B6
+signal IO_B8
+signal IO_B9
+signal IO_B10
+signal IO_B12
+signal IO_B14
+signal IO_B15
+signal IO_B16
+signal IO_B17
+signal IO_B18
+signal IO_B19
+signal IO_B20
+signal IO_B21
+signal IO_B23
+signal IO_B24
+signal IO_B25
+signal IO_B26
+signal IO_B27
+signal IO_B29
+signal IO_B30
+signal IO_B31
+signal IO_B32
+signal IO_C1
+signal IO_C2
+signal IO_C5
+signal IO_C6
+signal IO_C9
+signal IO_C10
+signal IO_C12
+signal IO_C13
+signal IO_C14
+signal IO_C15
+signal IO_C16
+signal IO_C17
+signal IO_C18
+signal IO_C19
+signal IO_C20
+signal IO_C21
+signal IO_C22
+signal IO_C23
+signal IO_C25
+signal IO_C26
+signal IO_C29
+signal IO_C30
+signal IO_C33
+signal IO_C34
+signal IO_D1
+signal IO_D2
+signal IO_D5
+signal IO_D6
+signal IO_D8
+signal IO_D9
+signal IO_D10
+signal IO_D12
+signal IO_D13
+signal IO_D14
+signal IO_D15
+signal IO_D17
+signal IO_D18
+signal IO_D20
+signal IO_D21
+signal IO_D22
+signal IO_D23
+signal IO_D25
+signal IO_D26
+signal IO_D27
+signal IO_D29
+signal IO_D30
+signal IO_D33
+signal IO_D34
+signal IO_E2
+signal IO_E3
+signal IO_E7
+signal IO_E8
+signal IO_E10
+signal IO_E12
+signal IO_E14
+signal IO_E17
+signal IO_E18
+signal IO_E21
+signal IO_E23
+signal IO_E25
+signal IO_E27
+signal IO_E28
+signal IO_E32
+signal IO_E33
+signal IO_F1
+signal IO_F2
+signal IO_F3
+signal IO_F4
+signal IO_F6
+signal IO_F7
+signal IO_F8
+signal IO_F9
+signal IO_F10
+signal IO_F12
+signal IO_F14
+signal IO_F15
+signal IO_F16
+signal IO_F17
+signal IO_F18
+signal IO_F19
+signal IO_F20
+signal IO_F21
+signal IO_F23
+signal IO_F25
+signal IO_F26
+signal IO_F27
+signal IO_F28
+signal IO_F29
+signal IO_F31
+signal IO_F32
+signal IO_F33
+signal IO_F34
+signal IO_G1
+signal IO_G2
+signal IO_G5
+signal IO_G6
+signal IO_G9
+signal IO_G10
+signal IO_G12
+signal IO_G13
+signal IO_G14
+signal IO_G15
+signal IO_G16
+signal IO_G17
+signal IO_G18
+signal IO_G19
+signal IO_G20
+signal IO_G21
+signal IO_G22
+signal IO_G23
+signal IO_G25
+signal IO_G26
+signal IO_G29
+signal IO_G30
+signal IO_G33
+signal IO_G34
+signal IO_H1
+signal IO_H2
+signal IO_H4
+signal IO_H5
+signal IO_H6
+signal IO_H8
+signal IO_H9
+signal IO_H10
+signal IO_H12
+signal IO_H13
+signal IO_H14
+signal IO_H17
+signal IO_H18
+signal IO_H21
+signal IO_H22
+signal IO_H23
+signal IO_H25
+signal IO_H26
+signal IO_H29
+signal IO_H30
+signal IO_H31
+signal IO_H33
+signal IO_H34
+signal IO_J2
+signal IO_J3
+signal IO_J4
+signal IO_J6
+signal IO_J7
+signal IO_J8
+signal IO_J10
+signal IO_J11
+signal IO_J12
+signal IO_J14
+signal IO_J15
+signal IO_J17
+signal IO_J18
+signal IO_J20
+signal IO_J21
+signal IO_J23
+signal IO_J25
+signal IO_J27
+signal IO_J28
+signal IO_J29
+signal IO_J31
+signal IO_J32
+signal IO_J33
+signal IO_K1
+signal IO_K2
+signal IO_K3
+signal IO_K4
+signal IO_K5
+signal IO_K6
+signal IO_K7
+signal IO_K8
+signal IO_K9
+signal IO_K12
+signal IO_K13
+signal IO_K14
+signal IO_K15
+signal IO_K16
+signal IO_K17
+signal IO_K18
+signal IO_K19
+signal IO_K20
+signal IO_K21
+signal IO_K22
+signal IO_K23
+signal IO_K26
+signal IO_K27
+signal IO_K28
+signal IO_K29
+signal IO_K30
+signal IO_K31
+signal IO_K32
+signal IO_K33
+signal IO_K34
+signal IO_L1
+signal IO_L2
+signal IO_L9
+signal IO_L10
+signal IO_L12
+signal IO_L13
+signal IO_L14
+signal IO_L15
+signal IO_L16
+signal IO_L17
+signal IO_L18
+signal IO_L19
+signal IO_L20
+signal IO_L21
+signal IO_L22
+signal IO_L24
+signal IO_L25
+signal IO_L26
+signal IO_L33
+signal IO_L34
+signal IO_M1
+signal IO_M2
+signal IO_M3
+signal IO_M4
+signal IO_M5
+signal IO_M6
+signal IO_M7
+signal IO_M8
+signal IO_M9
+signal IO_M10
+signal IO_M11
+signal IO_M24
+signal IO_M25
+signal IO_M26
+signal IO_M27
+signal IO_M28
+signal IO_M29
+signal IO_M30
+signal IO_M31
+signal IO_M32
+signal IO_M33
+signal IO_M34
+signal IO_N3
+signal IO_N4
+signal IO_N7
+signal IO_N8
+signal IO_N10
+signal IO_N11
+signal IO_N24
+signal IO_N25
+signal IO_N27
+signal IO_N28
+signal IO_N31
+signal IO_N32
+signal IO_P1
+signal IO_P2
+signal IO_P3
+signal IO_P4
+signal IO_P5
+signal IO_P6
+signal IO_P7
+signal IO_P8
+signal IO_P11
+signal IO_P24
+signal IO_P27
+signal IO_P28
+signal IO_P29
+signal IO_P30
+signal IO_P31
+signal IO_P32
+signal IO_P33
+signal IO_P34
+signal IO_R1
+signal IO_R2
+signal IO_R3
+signal IO_R4
+signal IO_R6
+signal IO_R7
+signal IO_R9
+signal IO_R10
+signal IO_R11
+signal IO_R24
+signal IO_R25
+signal IO_R26
+signal IO_R28
+signal IO_R29
+signal IO_R31
+signal IO_R32
+signal IO_R33
+signal IO_R34
+signal IO_T2
+signal IO_T3
+signal IO_T6
+signal IO_T7
+signal IO_T10
+signal IO_T25
+signal IO_T28
+signal IO_T29
+signal IO_T32
+signal IO_T33
+signal IO_U1
+signal IO_U2
+signal IO_U3
+signal IO_U4
+signal IO_U5
+signal IO_U6
+signal IO_U7
+signal IO_U8
+signal IO_U9
+signal IO_U10
+signal IO_U25
+signal IO_U26
+signal IO_U27
+signal IO_U28
+signal IO_U29
+signal IO_U30
+signal IO_U31
+signal IO_U32
+signal IO_U33
+signal IO_U34
+signal IO_V1
+signal IO_V2
+signal IO_V3
+signal IO_V4
+signal IO_V5
+signal IO_V6
+signal IO_V7
+signal IO_V8
+signal IO_V9
+signal IO_V10
+signal IO_V25
+signal IO_V26
+signal IO_V27
+signal IO_V28
+signal IO_V29
+signal IO_V30
+signal IO_V31
+signal IO_V32
+signal IO_V33
+signal IO_V34
+signal IO_W2
+signal IO_W3
+signal IO_W6
+signal IO_W7
+signal IO_W10
+signal IO_W25
+signal IO_W28
+signal IO_W29
+signal IO_W32
+signal IO_W33
+signal IO_Y1
+signal IO_Y2
+signal IO_Y3
+signal IO_Y4
+signal IO_Y6
+signal IO_Y7
+signal IO_Y9
+signal IO_Y10
+signal IO_Y11
+signal IO_Y24
+signal IO_Y25
+signal IO_Y26
+signal IO_Y28
+signal IO_Y29
+signal IO_Y31
+signal IO_Y32
+signal IO_Y33
+signal IO_Y34
+signal IO_AA1
+signal IO_AA2
+signal IO_AA3
+signal IO_AA4
+signal IO_AA5
+signal IO_AA6
+signal IO_AA7
+signal IO_AA8
+signal IO_AA11
+signal IO_AA24
+signal IO_AA27
+signal IO_AA28
+signal IO_AA29
+signal IO_AA30
+signal IO_AA31
+signal IO_AA32
+signal IO_AA33
+signal IO_AA34
+signal IO_AB3
+signal IO_AB4
+signal IO_AB7
+signal IO_AB8
+signal IO_AB10
+signal IO_AB11
+signal IO_AB24
+signal IO_AB25
+signal IO_AB27
+signal IO_AB28
+signal IO_AB31
+signal IO_AB32
+signal IO_AC1
+signal IO_AC2
+signal IO_AC3
+signal IO_AC4
+signal IO_AC5
+signal IO_AC6
+signal IO_AC7
+signal IO_AC8
+signal IO_AC9
+signal IO_AC10
+signal IO_AC11
+signal IO_AC24
+signal IO_AC25
+signal IO_AC26
+signal IO_AC27
+signal IO_AC28
+signal IO_AC29
+signal IO_AC30
+signal IO_AC31
+signal IO_AC32
+signal IO_AC33
+signal IO_AC34
+signal IO_AD1
+signal IO_AD2
+signal IO_AD9
+signal IO_AD10
+signal IO_AD11
+signal IO_AD13
+signal IO_AD14
+signal IO_AD15
+signal IO_AD16
+signal IO_AD17
+signal IO_AD18
+signal IO_AD19
+signal IO_AD20
+signal IO_AD21
+signal IO_AD22
+signal IO_AD23
+signal IO_AD25
+signal IO_AD26
+signal IO_AD33
+signal IO_AD34
+signal IO_AE1
+signal IO_AE2
+signal IO_AE3
+signal IO_AE4
+signal IO_AE5
+signal IO_AE6
+signal IO_AE7
+signal IO_AE8
+signal IO_AE9
+signal IO_AE12
+signal IO_AE13
+signal IO_AE14
+signal IO_AE15
+signal IO_AE16
+signal IO_AE17
+signal IO_AE18
+signal IO_AE19
+signal IO_AE20
+signal IO_AE21
+signal IO_AE22
+signal IO_AE23
+signal IO_AE26
+signal IO_AE27
+signal IO_AE28
+signal IO_AE29
+signal IO_AE30
+signal IO_AE31
+signal IO_AE32
+signal IO_AE33
+signal IO_AE34
+signal IO_AF2
+signal IO_AF3
+signal IO_AF4
+signal IO_AF6
+signal IO_AF7
+signal IO_AF8
+signal IO_AF10
+signal IO_AF12
+signal IO_AF14
+signal IO_AF15
+signal IO_AF17
+signal IO_AF18
+signal IO_AF20
+signal IO_AF21
+signal IO_AF23
+signal IO_AF24
+signal IO_AF25
+signal IO_AF27
+signal IO_AF28
+signal IO_AF29
+signal IO_AF31
+signal IO_AF32
+signal IO_AF33
+signal IO_AG1
+signal IO_AG2
+signal IO_AG4
+signal IO_AG5
+signal IO_AG6
+signal IO_AG9
+signal IO_AG10
+signal IO_AG12
+signal IO_AG13
+signal IO_AG14
+signal IO_AG17
+signal IO_AG18
+signal IO_AG21
+signal IO_AG22
+signal IO_AG23
+signal IO_AG25
+signal IO_AG26
+signal IO_AG27
+signal IO_AG29
+signal IO_AG30
+signal IO_AG31
+signal IO_AG33
+signal IO_AG34
+signal IO_AH1
+signal IO_AH2
+signal IO_AH5
+signal IO_AH6
+signal IO_AH9
+signal IO_AH10
+signal IO_AH12
+signal IO_AH13
+signal IO_AH14
+signal IO_AH15
+signal IO_AH16
+signal IO_AH17
+signal IO_AH18
+signal IO_AH19
+signal IO_AH20
+signal IO_AH21
+signal IO_AH22
+signal IO_AH23
+signal IO_AH25
+signal IO_AH26
+signal IO_AH29
+signal IO_AH30
+signal IO_AH33
+signal IO_AH34
+signal IO_AJ1
+signal IO_AJ2
+signal IO_AJ3
+signal IO_AJ4
+signal IO_AJ6
+signal IO_AJ7
+signal IO_AJ8
+signal IO_AJ9
+signal IO_AJ10
+signal IO_AJ12
+signal IO_AJ14
+signal IO_AJ15
+signal IO_AJ16
+signal IO_AJ17
+signal IO_AJ18
+signal IO_AJ19
+signal IO_AJ20
+signal IO_AJ21
+signal IO_AJ23
+signal IO_AJ25
+signal IO_AJ26
+signal IO_AJ27
+signal IO_AJ28
+signal IO_AJ29
+signal IO_AJ31
+signal IO_AJ32
+signal IO_AJ33
+signal IO_AJ34
+signal IO_AK2
+signal IO_AK3
+signal IO_AK7
+signal IO_AK8
+signal IO_AK10
+signal IO_AK12
+signal IO_AK14
+signal IO_AK17
+signal IO_AK18
+signal IO_AK21
+signal IO_AK23
+signal IO_AK25
+signal IO_AK27
+signal IO_AK28
+signal IO_AK32
+signal IO_AK33
+signal IO_AL1
+signal IO_AL2
+signal IO_AL5
+signal IO_AL6
+signal IO_AL8
+signal IO_AL9
+signal IO_AL10
+signal IO_AL12
+signal IO_AL13
+signal IO_AL14
+signal IO_AL15
+signal IO_AL17
+signal IO_AL18
+signal IO_AL20
+signal IO_AL21
+signal IO_AL22
+signal IO_AL23
+signal IO_AL25
+signal IO_AL26
+signal IO_AL27
+signal IO_AL29
+signal IO_AL30
+signal IO_AL33
+signal IO_AL34
+signal IO_AM1
+signal IO_AM2
+signal IO_AM5
+signal IO_AM6
+signal IO_AM9
+signal IO_AM10
+signal IO_AM12
+signal IO_AM13
+signal IO_AM14
+signal IO_AM15
+signal IO_AM16
+signal IO_AM17
+signal IO_AM18
+signal IO_AM19
+signal IO_AM20
+signal IO_AM21
+signal IO_AM22
+signal IO_AM23
+signal IO_AM25
+signal IO_AM26
+signal IO_AM29
+signal IO_AM30
+signal IO_AM33
+signal IO_AM34
+signal IO_AN3
+signal IO_AN4
+signal IO_AN5
+signal IO_AN6
+signal IO_AN8
+signal IO_AN9
+signal IO_AN10
+signal IO_AN11
+signal IO_AN12
+signal IO_AN14
+signal IO_AN15
+signal IO_AN16
+signal IO_AN17
+signal IO_AN18
+signal IO_AN19
+signal IO_AN20
+signal IO_AN21
+signal IO_AN23
+signal IO_AN25
+signal IO_AN26
+signal IO_AN27
+signal IO_AN29
+signal IO_AN30
+signal IO_AN31
+signal IO_AN32
+signal IO_AP3
+signal IO_AP4
+signal IO_AP6
+signal IO_AP8
+signal IO_AP10
+signal IO_AP11
+signal IO_AP12
+signal IO_AP14
+signal IO_AP15
+signal IO_AP17
+signal IO_AP18
+signal IO_AP20
+signal IO_AP21
+signal IO_AP23
+signal IO_AP25
+signal IO_AP27
+signal IO_AP29
+signal IO_AP31
+
+register BSR 2243
+register BR 1
+register DIR 32
+
+instruction length 6
+
+instruction EXTEST 000000 BSR
+instruction SAMPLE/PRELOAD 000001 BSR
+instruction IDCODE 001001 DIR
+instruction BYPASS 111111 BR
+
+bit 2242 I 1 IO_C33
+bit 2241 O 1 IO_C33 2240 1 Z
+bit 2240 C 1 *
+bit 2239 I 1 IO_C34
+bit 2238 O 1 IO_C34 2237 1 Z
+bit 2237 C 1 *
+bit 2236 I 1 IO_D33
+bit 2235 O 1 IO_D33 2234 1 Z
+bit 2234 C 1 *
+bit 2233 I 1 IO_D34
+bit 2232 O 1 IO_D34 2231 1 Z
+bit 2231 C 1 *
+bit 2230 I 1 IO_E32
+bit 2229 O 1 IO_E32 2228 1 Z
+bit 2228 C 1 *
+bit 2227 I 1 IO_E33
+bit 2226 O 1 IO_E33 2225 1 Z
+bit 2225 C 1 *
+bit 2224 I 1 IO_F31
+bit 2223 O 1 IO_F31 2222 1 Z
+bit 2222 C 1 *
+bit 2221 I 1 IO_F32
+bit 2220 O 1 IO_F32 2219 1 Z
+bit 2219 C 1 *
+bit 2218 I 1 IO_F33
+bit 2217 O 1 IO_F33 2216 1 Z
+bit 2216 C 1 *
+bit 2215 I 1 IO_F34
+bit 2214 O 1 IO_F34 2213 1 Z
+bit 2213 C 1 *
+bit 2212 I 1 IO_G29
+bit 2211 O 1 IO_G29 2210 1 Z
+bit 2210 C 1 *
+bit 2209 I 1 IO_G30
+bit 2208 O 1 IO_G30 2207 1 Z
+bit 2207 C 1 *
+bit 2206 I 1 IO_G33
+bit 2205 O 1 IO_G33 2204 1 Z
+bit 2204 C 1 *
+bit 2203 O 1 *
+bit 2202 O 1 *
+bit 2201 O 1 *
+bit 2200 O 1 *
+bit 2199 O 1 *
+bit 2198 O 1 *
+bit 2197 I 1 IO_G34
+bit 2196 O 1 IO_G34 2195 1 Z
+bit 2195 C 1 *
+bit 2194 I 1 IO_H29
+bit 2193 O 1 IO_H29 2192 1 Z
+bit 2192 C 1 *
+bit 2191 I 1 IO_H30
+bit 2190 O 1 IO_H30 2189 1 Z
+bit 2189 C 1 *
+bit 2188 I 1 IO_H33
+bit 2187 O 1 IO_H33 2186 1 Z
+bit 2186 C 1 *
+bit 2185 I 1 IO_H34
+bit 2184 O 1 IO_H34 2183 1 Z
+bit 2183 C 1 *
+bit 2182 I 1 IO_J28
+bit 2181 O 1 IO_J28 2180 1 Z
+bit 2180 C 1 *
+bit 2179 I 1 IO_J29
+bit 2178 O 1 IO_J29 2177 1 Z
+bit 2177 C 1 *
+bit 2176 I 1 IO_H31
+bit 2175 O 1 IO_H31 2174 1 Z
+bit 2174 C 1 *
+bit 2173 I 1 IO_J31
+bit 2172 O 1 IO_J31 2171 1 Z
+bit 2171 C 1 *
+bit 2170 I 1 IO_J32
+bit 2169 O 1 IO_J32 2168 1 Z
+bit 2168 C 1 *
+bit 2167 I 1 IO_J33
+bit 2166 O 1 IO_J33 2165 1 Z
+bit 2165 C 1 *
+bit 2164 I 1 IO_J27
+bit 2163 O 1 IO_J27 2162 1 Z
+bit 2162 C 1 *
+bit 2161 I 1 IO_K26
+bit 2160 O 1 IO_K26 2159 1 Z
+bit 2159 C 1 *
+bit 2158 I 1 IO_K27
+bit 2157 O 1 IO_K27 2156 1 Z
+bit 2156 C 1 *
+bit 2155 I 1 IO_K28
+bit 2154 O 1 IO_K28 2153 1 Z
+bit 2153 C 1 *
+bit 2152 I 1 IO_K29
+bit 2151 O 1 IO_K29 2150 1 Z
+bit 2150 C 1 *
+bit 2149 I 1 IO_K30
+bit 2148 O 1 IO_K30 2147 1 Z
+bit 2147 C 1 *
+bit 2146 I 1 IO_K31
+bit 2145 O 1 IO_K31 2144 1 Z
+bit 2144 C 1 *
+bit 2143 I 1 IO_K32
+bit 2142 O 1 IO_K32 2141 1 Z
+bit 2141 C 1 *
+bit 2140 I 1 IO_K33
+bit 2139 O 1 IO_K33 2138 1 Z
+bit 2138 C 1 *
+bit 2137 I 1 IO_K34
+bit 2136 O 1 IO_K34 2135 1 Z
+bit 2135 C 1 *
+bit 2134 I 1 IO_L25
+bit 2133 O 1 IO_L25 2132 1 Z
+bit 2132 C 1 *
+bit 2131 I 1 IO_L26
+bit 2130 O 1 IO_L26 2129 1 Z
+bit 2129 C 1 *
+bit 2128 O 1 *
+bit 2127 O 1 *
+bit 2126 O 1 *
+bit 2125 O 1 *
+bit 2124 O 1 *
+bit 2123 O 1 *
+bit 2122 I 1 IO_L33
+bit 2121 O 1 IO_L33 2120 1 Z
+bit 2120 C 1 *
+bit 2119 I 1 IO_L34
+bit 2118 O 1 IO_L34 2117 1 Z
+bit 2117 C 1 *
+bit 2116 I 1 IO_M24
+bit 2115 O 1 IO_M24 2114 1 Z
+bit 2114 C 1 *
+bit 2113 I 1 IO_M25
+bit 2112 O 1 IO_M25 2111 1 Z
+bit 2111 C 1 *
+bit 2110 I 1 IO_M27
+bit 2109 O 1 IO_M27 2108 1 Z
+bit 2108 C 1 *
+bit 2107 I 1 IO_M28
+bit 2106 O 1 IO_M28 2105 1 Z
+bit 2105 C 1 *
+bit 2104 I 1 IO_M29
+bit 2103 O 1 IO_M29 2102 1 Z
+bit 2102 C 1 *
+bit 2101 I 1 IO_M30
+bit 2100 O 1 IO_M30 2099 1 Z
+bit 2099 C 1 *
+bit 2098 I 1 IO_M31
+bit 2097 O 1 IO_M31 2096 1 Z
+bit 2096 C 1 *
+bit 2095 I 1 IO_M32
+bit 2094 O 1 IO_M32 2093 1 Z
+bit 2093 C 1 *
+bit 2092 I 1 IO_M33
+bit 2091 O 1 IO_M33 2090 1 Z
+bit 2090 C 1 *
+bit 2089 I 1 IO_M34
+bit 2088 O 1 IO_M34 2087 1 Z
+bit 2087 C 1 *
+bit 2086 I 1 IO_M26
+bit 2085 O 1 IO_M26 2084 1 Z
+bit 2084 C 1 *
+bit 2083 I 1 IO_N25
+bit 2082 O 1 IO_N25 2081 1 Z
+bit 2081 C 1 *
+bit 2080 I 1 IO_N27
+bit 2079 O 1 IO_N27 2078 1 Z
+bit 2078 C 1 *
+bit 2077 I 1 IO_N28
+bit 2076 O 1 IO_N28 2075 1 Z
+bit 2075 C 1 *
+bit 2074 I 1 IO_N31
+bit 2073 O 1 IO_N31 2072 1 Z
+bit 2072 C 1 *
+bit 2071 I 1 IO_N32
+bit 2070 O 1 IO_N32 2069 1 Z
+bit 2069 C 1 *
+bit 2068 I 1 IO_N24
+bit 2067 O 1 IO_N24 2066 1 Z
+bit 2066 C 1 *
+bit 2065 I 1 IO_P24
+bit 2064 O 1 IO_P24 2063 1 Z
+bit 2063 C 1 *
+bit 2062 O 1 *
+bit 2061 O 1 *
+bit 2060 O 1 *
+bit 2059 O 1 *
+bit 2058 O 1 *
+bit 2057 O 1 *
+bit 2056 I 1 IO_P27
+bit 2055 O 1 IO_P27 2054 1 Z
+bit 2054 C 1 *
+bit 2053 I 1 IO_P28
+bit 2052 O 1 IO_P28 2051 1 Z
+bit 2051 C 1 *
+bit 2050 I 1 IO_P29
+bit 2049 O 1 IO_P29 2048 1 Z
+bit 2048 C 1 *
+bit 2047 I 1 IO_P30
+bit 2046 O 1 IO_P30 2045 1 Z
+bit 2045 C 1 *
+bit 2044 I 1 IO_P31
+bit 2043 O 1 IO_P31 2042 1 Z
+bit 2042 C 1 *
+bit 2041 I 1 IO_P32
+bit 2040 O 1 IO_P32 2039 1 Z
+bit 2039 C 1 *
+bit 2038 I 1 IO_P33
+bit 2037 O 1 IO_P33 2036 1 Z
+bit 2036 C 1 *
+bit 2035 I 1 IO_P34
+bit 2034 O 1 IO_P34 2033 1 Z
+bit 2033 C 1 *
+bit 2032 I 1 IO_R24
+bit 2031 O 1 IO_R24 2030 1 Z
+bit 2030 C 1 *
+bit 2029 I 1 IO_R25
+bit 2028 O 1 IO_R25 2027 1 Z
+bit 2027 C 1 *
+bit 2026 I 1 IO_R28
+bit 2025 O 1 IO_R28 2024 1 Z
+bit 2024 C 1 *
+bit 2023 I 1 IO_R29
+bit 2022 O 1 IO_R29 2021 1 Z
+bit 2021 C 1 *
+bit 2020 I 1 IO_R31
+bit 2019 O 1 IO_R31 2018 1 Z
+bit 2018 C 1 *
+bit 2017 I 1 IO_R32
+bit 2016 O 1 IO_R32 2015 1 Z
+bit 2015 C 1 *
+bit 2014 I 1 IO_R33
+bit 2013 O 1 IO_R33 2012 1 Z
+bit 2012 C 1 *
+bit 2011 I 1 IO_R34
+bit 2010 O 1 IO_R34 2009 1 Z
+bit 2009 C 1 *
+bit 2008 I 1 IO_R26
+bit 2007 O 1 IO_R26 2006 1 Z
+bit 2006 C 1 *
+bit 2005 I 1 IO_T25
+bit 2004 O 1 IO_T25 2003 1 Z
+bit 2003 C 1 *
+bit 2002 I 1 IO_T28
+bit 2001 O 1 IO_T28 2000 1 Z
+bit 2000 C 1 *
+bit 1999 I 1 IO_T29
+bit 1998 O 1 IO_T29 1997 1 Z
+bit 1997 C 1 *
+bit 1996 I 1 IO_T32
+bit 1995 O 1 IO_T32 1994 1 Z
+bit 1994 C 1 *
+bit 1993 I 1 IO_T33
+bit 1992 O 1 IO_T33 1991 1 Z
+bit 1991 C 1 *
+bit 1990 I 1 IO_U25
+bit 1989 O 1 IO_U25 1988 1 Z
+bit 1988 C 1 *
+bit 1987 O 1 *
+bit 1986 O 1 *
+bit 1985 O 1 *
+bit 1984 O 1 *
+bit 1983 O 1 *
+bit 1982 O 1 *
+bit 1981 I 1 IO_U26
+bit 1980 O 1 IO_U26 1979 1 Z
+bit 1979 C 1 *
+bit 1978 I 1 IO_U27
+bit 1977 O 1 IO_U27 1976 1 Z
+bit 1976 C 1 *
+bit 1975 I 1 IO_U28
+bit 1974 O 1 IO_U28 1973 1 Z
+bit 1973 C 1 *
+bit 1972 I 1 IO_U29
+bit 1971 O 1 IO_U29 1970 1 Z
+bit 1970 C 1 *
+bit 1969 I 1 IO_U30
+bit 1968 O 1 IO_U30 1967 1 Z
+bit 1967 C 1 *
+bit 1966 I 1 IO_U31
+bit 1965 O 1 IO_U31 1964 1 Z
+bit 1964 C 1 *
+bit 1963 I 1 IO_U32
+bit 1962 O 1 IO_U32 1961 1 Z
+bit 1961 C 1 *
+bit 1960 I 1 IO_U33
+bit 1959 O 1 IO_U33 1958 1 Z
+bit 1958 C 1 *
+bit 1957 I 1 IO_U34
+bit 1956 O 1 IO_U34 1955 1 Z
+bit 1955 C 1 *
+bit 1954 I 1 IO_V34
+bit 1953 O 1 IO_V34 1952 1 Z
+bit 1952 C 1 *
+bit 1951 I 1 IO_V33
+bit 1950 O 1 IO_V33 1949 1 Z
+bit 1949 C 1 *
+bit 1948 I 1 IO_V32
+bit 1947 O 1 IO_V32 1946 1 Z
+bit 1946 C 1 *
+bit 1945 I 1 IO_V31
+bit 1944 O 1 IO_V31 1943 1 Z
+bit 1943 C 1 *
+bit 1942 I 1 IO_V30
+bit 1941 O 1 IO_V30 1940 1 Z
+bit 1940 C 1 *
+bit 1939 I 1 IO_V29
+bit 1938 O 1 IO_V29 1937 1 Z
+bit 1937 C 1 *
+bit 1936 I 1 IO_V28
+bit 1935 O 1 IO_V28 1934 1 Z
+bit 1934 C 1 *
+bit 1933 I 1 IO_V27
+bit 1932 O 1 IO_V27 1931 1 Z
+bit 1931 C 1 *
+bit 1930 I 1 IO_V26
+bit 1929 O 1 IO_V26 1928 1 Z
+bit 1928 C 1 *
+bit 1927 O 1 *
+bit 1926 O 1 *
+bit 1925 O 1 *
+bit 1924 O 1 *
+bit 1923 O 1 *
+bit 1922 O 1 *
+bit 1921 I 1 IO_V25
+bit 1920 O 1 IO_V25 1919 1 Z
+bit 1919 C 1 *
+bit 1918 I 1 IO_W33
+bit 1917 O 1 IO_W33 1916 1 Z
+bit 1916 C 1 *
+bit 1915 I 1 IO_W32
+bit 1914 O 1 IO_W32 1913 1 Z
+bit 1913 C 1 *
+bit 1912 I 1 IO_W29
+bit 1911 O 1 IO_W29 1910 1 Z
+bit 1910 C 1 *
+bit 1909 I 1 IO_W28
+bit 1908 O 1 IO_W28 1907 1 Z
+bit 1907 C 1 *
+bit 1906 I 1 IO_W25
+bit 1905 O 1 IO_W25 1904 1 Z
+bit 1904 C 1 *
+bit 1903 I 1 IO_Y26
+bit 1902 O 1 IO_Y26 1901 1 Z
+bit 1901 C 1 *
+bit 1900 I 1 IO_Y34
+bit 1899 O 1 IO_Y34 1898 1 Z
+bit 1898 C 1 *
+bit 1897 I 1 IO_Y33
+bit 1896 O 1 IO_Y33 1895 1 Z
+bit 1895 C 1 *
+bit 1894 I 1 IO_Y32
+bit 1893 O 1 IO_Y32 1892 1 Z
+bit 1892 C 1 *
+bit 1891 I 1 IO_Y31
+bit 1890 O 1 IO_Y31 1889 1 Z
+bit 1889 C 1 *
+bit 1888 I 1 IO_Y29
+bit 1887 O 1 IO_Y29 1886 1 Z
+bit 1886 C 1 *
+bit 1885 I 1 IO_Y28
+bit 1884 O 1 IO_Y28 1883 1 Z
+bit 1883 C 1 *
+bit 1882 I 1 IO_Y25
+bit 1881 O 1 IO_Y25 1880 1 Z
+bit 1880 C 1 *
+bit 1879 I 1 IO_Y24
+bit 1878 O 1 IO_Y24 1877 1 Z
+bit 1877 C 1 *
+bit 1876 I 1 IO_AA34
+bit 1875 O 1 IO_AA34 1874 1 Z
+bit 1874 C 1 *
+bit 1873 I 1 IO_AA33
+bit 1872 O 1 IO_AA33 1871 1 Z
+bit 1871 C 1 *
+bit 1870 I 1 IO_AA32
+bit 1869 O 1 IO_AA32 1868 1 Z
+bit 1868 C 1 *
+bit 1867 I 1 IO_AA31
+bit 1866 O 1 IO_AA31 1865 1 Z
+bit 1865 C 1 *
+bit 1864 I 1 IO_AA30
+bit 1863 O 1 IO_AA30 1862 1 Z
+bit 1862 C 1 *
+bit 1861 I 1 IO_AA29
+bit 1860 O 1 IO_AA29 1859 1 Z
+bit 1859 C 1 *
+bit 1858 I 1 IO_AA28
+bit 1857 O 1 IO_AA28 1856 1 Z
+bit 1856 C 1 *
+bit 1855 I 1 IO_AA27
+bit 1854 O 1 IO_AA27 1853 1 Z
+bit 1853 C 1 *
+bit 1852 O 1 *
+bit 1851 O 1 *
+bit 1850 O 1 *
+bit 1849 O 1 *
+bit 1848 O 1 *
+bit 1847 O 1 *
+bit 1846 I 1 IO_AA24
+bit 1845 O 1 IO_AA24 1844 1 Z
+bit 1844 C 1 *
+bit 1843 I 1 IO_AB24
+bit 1842 O 1 IO_AB24 1841 1 Z
+bit 1841 C 1 *
+bit 1840 I 1 IO_AB32
+bit 1839 O 1 IO_AB32 1838 1 Z
+bit 1838 C 1 *
+bit 1837 I 1 IO_AB31
+bit 1836 O 1 IO_AB31 1835 1 Z
+bit 1835 C 1 *
+bit 1834 I 1 IO_AB28
+bit 1833 O 1 IO_AB28 1832 1 Z
+bit 1832 C 1 *
+bit 1831 I 1 IO_AB27
+bit 1830 O 1 IO_AB27 1829 1 Z
+bit 1829 C 1 *
+bit 1828 I 1 IO_AB25
+bit 1827 O 1 IO_AB25 1826 1 Z
+bit 1826 C 1 *
+bit 1825 I 1 IO_AC26
+bit 1824 O 1 IO_AC26 1823 1 Z
+bit 1823 C 1 *
+bit 1822 I 1 IO_AC34
+bit 1821 O 1 IO_AC34 1820 1 Z
+bit 1820 C 1 *
+bit 1819 I 1 IO_AC33
+bit 1818 O 1 IO_AC33 1817 1 Z
+bit 1817 C 1 *
+bit 1816 I 1 IO_AC32
+bit 1815 O 1 IO_AC32 1814 1 Z
+bit 1814 C 1 *
+bit 1813 I 1 IO_AC31
+bit 1812 O 1 IO_AC31 1811 1 Z
+bit 1811 C 1 *
+bit 1810 I 1 IO_AC30
+bit 1809 O 1 IO_AC30 1808 1 Z
+bit 1808 C 1 *
+bit 1807 I 1 IO_AC29
+bit 1806 O 1 IO_AC29 1805 1 Z
+bit 1805 C 1 *
+bit 1804 I 1 IO_AC28
+bit 1803 O 1 IO_AC28 1802 1 Z
+bit 1802 C 1 *
+bit 1801 I 1 IO_AC27
+bit 1800 O 1 IO_AC27 1799 1 Z
+bit 1799 C 1 *
+bit 1798 I 1 IO_AC25
+bit 1797 O 1 IO_AC25 1796 1 Z
+bit 1796 C 1 *
+bit 1795 I 1 IO_AC24
+bit 1794 O 1 IO_AC24 1793 1 Z
+bit 1793 C 1 *
+bit 1792 I 1 IO_AD34
+bit 1791 O 1 IO_AD34 1790 1 Z
+bit 1790 C 1 *
+bit 1789 I 1 IO_AD33
+bit 1788 O 1 IO_AD33 1787 1 Z
+bit 1787 C 1 *
+bit 1786 O 1 *
+bit 1785 O 1 *
+bit 1784 O 1 *
+bit 1783 O 1 *
+bit 1782 O 1 *
+bit 1781 O 1 *
+bit 1780 I 1 IO_AD26
+bit 1779 O 1 IO_AD26 1778 1 Z
+bit 1778 C 1 *
+bit 1777 I 1 IO_AD25
+bit 1776 O 1 IO_AD25 1775 1 Z
+bit 1775 C 1 *
+bit 1774 I 1 IO_AE34
+bit 1773 O 1 IO_AE34 1772 1 Z
+bit 1772 C 1 *
+bit 1771 I 1 IO_AE33
+bit 1770 O 1 IO_AE33 1769 1 Z
+bit 1769 C 1 *
+bit 1768 I 1 IO_AE32
+bit 1767 O 1 IO_AE32 1766 1 Z
+bit 1766 C 1 *
+bit 1765 I 1 IO_AE31
+bit 1764 O 1 IO_AE31 1763 1 Z
+bit 1763 C 1 *
+bit 1762 I 1 IO_AE30
+bit 1761 O 1 IO_AE30 1760 1 Z
+bit 1760 C 1 *
+bit 1759 I 1 IO_AE29
+bit 1758 O 1 IO_AE29 1757 1 Z
+bit 1757 C 1 *
+bit 1756 I 1 IO_AE28
+bit 1755 O 1 IO_AE28 1754 1 Z
+bit 1754 C 1 *
+bit 1753 I 1 IO_AE27
+bit 1752 O 1 IO_AE27 1751 1 Z
+bit 1751 C 1 *
+bit 1750 I 1 IO_AE26
+bit 1749 O 1 IO_AE26 1748 1 Z
+bit 1748 C 1 *
+bit 1747 I 1 IO_AF27
+bit 1746 O 1 IO_AF27 1745 1 Z
+bit 1745 C 1 *
+bit 1744 I 1 IO_AF33
+bit 1743 O 1 IO_AF33 1742 1 Z
+bit 1742 C 1 *
+bit 1741 I 1 IO_AF32
+bit 1740 O 1 IO_AF32 1739 1 Z
+bit 1739 C 1 *
+bit 1738 I 1 IO_AF31
+bit 1737 O 1 IO_AF31 1736 1 Z
+bit 1736 C 1 *
+bit 1735 I 1 IO_AG31
+bit 1734 O 1 IO_AG31 1733 1 Z
+bit 1733 C 1 *
+bit 1732 I 1 IO_AF29
+bit 1731 O 1 IO_AF29 1730 1 Z
+bit 1730 C 1 *
+bit 1729 I 1 IO_AF28
+bit 1728 O 1 IO_AF28 1727 1 Z
+bit 1727 C 1 *
+bit 1726 I 1 IO_AG34
+bit 1725 O 1 IO_AG34 1724 1 Z
+bit 1724 C 1 *
+bit 1723 I 1 IO_AG33
+bit 1722 O 1 IO_AG33 1721 1 Z
+bit 1721 C 1 *
+bit 1720 I 1 IO_AG30
+bit 1719 O 1 IO_AG30 1718 1 Z
+bit 1718 C 1 *
+bit 1717 I 1 IO_AG29
+bit 1716 O 1 IO_AG29 1715 1 Z
+bit 1715 C 1 *
+bit 1714 I 1 IO_AH34
+bit 1713 O 1 IO_AH34 1712 1 Z
+bit 1712 C 1 *
+bit 1711 O 1 *
+bit 1710 O 1 *
+bit 1709 O 1 *
+bit 1708 O 1 *
+bit 1707 O 1 *
+bit 1706 O 1 *
+bit 1705 I 1 IO_AH33
+bit 1704 O 1 IO_AH33 1703 1 Z
+bit 1703 C 1 *
+bit 1702 I 1 IO_AH30
+bit 1701 O 1 IO_AH30 1700 1 Z
+bit 1700 C 1 *
+bit 1699 I 1 IO_AH29
+bit 1698 O 1 IO_AH29 1697 1 Z
+bit 1697 C 1 *
+bit 1696 I 1 IO_AJ34
+bit 1695 O 1 IO_AJ34 1694 1 Z
+bit 1694 C 1 *
+bit 1693 I 1 IO_AJ33
+bit 1692 O 1 IO_AJ33 1691 1 Z
+bit 1691 C 1 *
+bit 1690 I 1 IO_AJ32
+bit 1689 O 1 IO_AJ32 1688 1 Z
+bit 1688 C 1 *
+bit 1687 I 1 IO_AJ31
+bit 1686 O 1 IO_AJ31 1685 1 Z
+bit 1685 C 1 *
+bit 1684 I 1 IO_AK33
+bit 1683 O 1 IO_AK33 1682 1 Z
+bit 1682 C 1 *
+bit 1681 I 1 IO_AK32
+bit 1680 O 1 IO_AK32 1679 1 Z
+bit 1679 C 1 *
+bit 1678 I 1 IO_AL34
+bit 1677 O 1 IO_AL34 1676 1 Z
+bit 1676 C 1 *
+bit 1675 I 1 IO_AL33
+bit 1674 O 1 IO_AL33 1673 1 Z
+bit 1673 C 1 *
+bit 1672 I 1 IO_AM34
+bit 1671 O 1 IO_AM34 1670 1 Z
+bit 1670 C 1 *
+bit 1669 I 1 IO_AM33
+bit 1668 O 1 IO_AM33 1667 1 Z
+bit 1667 C 1 *
+bit 1666 I 1 CCLK_AL31
+bit 1665 O 1 CCLK_AL31 1664 1 Z
+bit 1664 C 1 *
+bit 1663 I 1 DONE_AD24
+bit 1662 O 1 DONE_AD24 1661 1 Z
+bit 1661 C 1 *
+bit 1660 I 1 IO_AL30
+bit 1659 O 1 IO_AL30 1658 1 Z
+bit 1658 C 1 *
+bit 1657 I 1 IO_AN32
+bit 1656 O 1 IO_AN32 1655 1 Z
+bit 1655 C 1 *
+bit 1654 I 1 IO_AP32
+bit 1653 O 1 IO_AP32 1652 1 Z
+bit 1652 C 1 *
+bit 1651 I 1 IO_AN31
+bit 1650 O 1 IO_AN31 1649 1 Z
+bit 1649 C 1 *
+bit 1648 I 1 IO_AP31
+bit 1647 O 1 IO_AP31 1646 1 Z
+bit 1646 C 1 *
+bit 1645 I 1 IO_AJ29
+bit 1644 O 1 IO_AJ29 1643 1 Z
+bit 1643 C 1 *
+bit 1642 I 1 IO_AM30
+bit 1641 O 1 IO_AM30 1640 1 Z
+bit 1640 C 1 *
+bit 1639 I 1 IO_AN30
+bit 1638 O 1 IO_AN30 1637 1 Z
+bit 1637 C 1 *
+bit 1636 I 1 IO_AL29
+bit 1635 O 1 IO_AL29 1634 1 Z
+bit 1634 C 1 *
+bit 1633 I 1 IO_AM29
+bit 1632 O 1 IO_AM29 1631 1 Z
+bit 1631 C 1 *
+bit 1630 I 1 IO_AG27
+bit 1629 O 1 IO_AG27 1628 1 Z
+bit 1628 C 1 *
+bit 1627 I 1 IO_AN29
+bit 1626 O 1 IO_AN29 1625 1 Z
+bit 1625 C 1 *
+bit 1624 I 1 IO_AP29
+bit 1623 O 1 IO_AP29 1622 1 Z
+bit 1622 C 1 *
+bit 1621 I 1 IO_AJ28
+bit 1620 O 1 IO_AJ28 1619 1 Z
+bit 1619 C 1 *
+bit 1618 I 1 IO_AK28
+bit 1617 O 1 IO_AK28 1616 1 Z
+bit 1616 C 1 *
+bit 1615 I 1 IO_AJ27
+bit 1614 O 1 IO_AJ27 1613 1 Z
+bit 1613 C 1 *
+bit 1612 I 1 IO_AK27
+bit 1611 O 1 IO_AK27 1610 1 Z
+bit 1610 C 1 *
+bit 1609 I 1 IO_AL27
+bit 1608 O 1 IO_AL27 1607 1 Z
+bit 1607 C 1 *
+bit 1606 I 1 IO_AN27
+bit 1605 O 1 IO_AN27 1604 1 Z
+bit 1604 C 1 *
+bit 1603 I 1 IO_AP27
+bit 1602 O 1 IO_AP27 1601 1 Z
+bit 1601 C 1 *
+bit 1600 I 1 IO_AG26
+bit 1599 O 1 IO_AG26 1598 1 Z
+bit 1598 C 1 *
+bit 1597 I 1 IO_AH26
+bit 1596 O 1 IO_AH26 1595 1 Z
+bit 1595 C 1 *
+bit 1594 I 1 IO_AJ26
+bit 1593 O 1 IO_AJ26 1592 1 Z
+bit 1592 C 1 *
+bit 1591 I 1 IO_AL26
+bit 1590 O 1 IO_AL26 1589 1 Z
+bit 1589 C 1 *
+bit 1588 I 1 IO_AM26
+bit 1587 O 1 IO_AM26 1586 1 Z
+bit 1586 C 1 *
+bit 1585 I 1 IO_AN26
+bit 1584 O 1 IO_AN26 1583 1 Z
+bit 1583 C 1 *
+bit 1582 I 1 IO_AF25
+bit 1581 O 1 IO_AF25 1580 1 Z
+bit 1580 C 1 *
+bit 1579 I 1 IO_AG25
+bit 1578 O 1 IO_AG25 1577 1 Z
+bit 1577 C 1 *
+bit 1576 I 1 IO_AH25
+bit 1575 O 1 IO_AH25 1574 1 Z
+bit 1574 C 1 *
+bit 1573 I 1 IO_AJ25
+bit 1572 O 1 IO_AJ25 1571 1 Z
+bit 1571 C 1 *
+bit 1570 I 1 IO_AK25
+bit 1569 O 1 IO_AK25 1568 1 Z
+bit 1568 C 1 *
+bit 1567 I 1 IO_AL25
+bit 1566 O 1 IO_AL25 1565 1 Z
+bit 1565 C 1 *
+bit 1564 I 1 IO_AM25
+bit 1563 O 1 IO_AM25 1562 1 Z
+bit 1562 C 1 *
+bit 1561 I 1 IO_AN25
+bit 1560 O 1 IO_AN25 1559 1 Z
+bit 1559 C 1 *
+bit 1558 I 1 IO_AP25
+bit 1557 O 1 IO_AP25 1556 1 Z
+bit 1556 C 1 *
+bit 1555 I 1 IO_AF24
+bit 1554 O 1 IO_AF24 1553 1 Z
+bit 1553 C 1 *
+bit 1552 I 1 IO_AD23
+bit 1551 O 1 IO_AD23 1550 1 Z
+bit 1550 C 1 *
+bit 1549 I 1 IO_AE23
+bit 1548 O 1 IO_AE23 1547 1 Z
+bit 1547 C 1 *
+bit 1546 I 1 IO_AF23
+bit 1545 O 1 IO_AF23 1544 1 Z
+bit 1544 C 1 *
+bit 1543 I 1 IO_AG23
+bit 1542 O 1 IO_AG23 1541 1 Z
+bit 1541 C 1 *
+bit 1540 I 1 IO_AH23
+bit 1539 O 1 IO_AH23 1538 1 Z
+bit 1538 C 1 *
+bit 1537 I 1 IO_AJ23
+bit 1536 O 1 IO_AJ23 1535 1 Z
+bit 1535 C 1 *
+bit 1534 I 1 IO_AK23
+bit 1533 O 1 IO_AK23 1532 1 Z
+bit 1532 C 1 *
+bit 1531 I 1 IO_AL23
+bit 1530 O 1 IO_AL23 1529 1 Z
+bit 1529 C 1 *
+bit 1528 I 1 IO_AM23
+bit 1527 O 1 IO_AM23 1526 1 Z
+bit 1526 C 1 *
+bit 1525 I 1 IO_AD22
+bit 1524 O 1 IO_AD22 1523 1 Z
+bit 1523 C 1 *
+bit 1522 I 1 IO_AN23
+bit 1521 O 1 IO_AN23 1520 1 Z
+bit 1520 C 1 *
+bit 1519 I 1 IO_AP23
+bit 1518 O 1 IO_AP23 1517 1 Z
+bit 1517 C 1 *
+bit 1516 I 1 IO_AG22
+bit 1515 O 1 IO_AG22 1514 1 Z
+bit 1514 C 1 *
+bit 1513 I 1 IO_AH22
+bit 1512 O 1 IO_AH22 1511 1 Z
+bit 1511 C 1 *
+bit 1510 I 1 IO_AE22
+bit 1509 O 1 IO_AE22 1508 1 Z
+bit 1508 C 1 *
+bit 1507 I 1 IO_AL22
+bit 1506 O 1 IO_AL22 1505 1 Z
+bit 1505 C 1 *
+bit 1504 I 1 IO_AM22
+bit 1503 O 1 IO_AM22 1502 1 Z
+bit 1502 C 1 *
+bit 1501 I 1 IO_AD21
+bit 1500 O 1 IO_AD21 1499 1 Z
+bit 1499 C 1 *
+bit 1498 I 1 IO_AE21
+bit 1497 O 1 IO_AE21 1496 1 Z
+bit 1496 C 1 *
+bit 1495 I 1 IO_AF21
+bit 1494 O 1 IO_AF21 1493 1 Z
+bit 1493 C 1 *
+bit 1492 I 1 IO_AG21
+bit 1491 O 1 IO_AG21 1490 1 Z
+bit 1490 C 1 *
+bit 1489 I 1 IO_AH21
+bit 1488 O 1 IO_AH21 1487 1 Z
+bit 1487 C 1 *
+bit 1486 I 1 IO_AJ21
+bit 1485 O 1 IO_AJ21 1484 1 Z
+bit 1484 C 1 *
+bit 1483 I 1 IO_AK21
+bit 1482 O 1 IO_AK21 1481 1 Z
+bit 1481 C 1 *
+bit 1480 I 1 IO_AD20
+bit 1479 O 1 IO_AD20 1478 1 Z
+bit 1478 C 1 *
+bit 1477 I 1 IO_AL21
+bit 1476 O 1 IO_AL21 1475 1 Z
+bit 1475 C 1 *
+bit 1474 I 1 IO_AM21
+bit 1473 O 1 IO_AM21 1472 1 Z
+bit 1472 C 1 *
+bit 1471 I 1 IO_AN21
+bit 1470 O 1 IO_AN21 1469 1 Z
+bit 1469 C 1 *
+bit 1468 I 1 IO_AP21
+bit 1467 O 1 IO_AP21 1466 1 Z
+bit 1466 C 1 *
+bit 1465 I 1 IO_AD19
+bit 1464 O 1 IO_AD19 1463 1 Z
+bit 1463 C 1 *
+bit 1462 I 1 IO_AE20
+bit 1461 O 1 IO_AE20 1460 1 Z
+bit 1460 C 1 *
+bit 1459 I 1 IO_AF20
+bit 1458 O 1 IO_AF20 1457 1 Z
+bit 1457 C 1 *
+bit 1456 I 1 IO_AH20
+bit 1455 O 1 IO_AH20 1454 1 Z
+bit 1454 C 1 *
+bit 1453 I 1 IO_AJ20
+bit 1452 O 1 IO_AJ20 1451 1 Z
+bit 1451 C 1 *
+bit 1450 I 1 IO_AE19
+bit 1449 O 1 IO_AE19 1448 1 Z
+bit 1448 C 1 *
+bit 1447 I 1 IO_AL20
+bit 1446 O 1 IO_AL20 1445 1 Z
+bit 1445 C 1 *
+bit 1444 I 1 IO_AM20
+bit 1443 O 1 IO_AM20 1442 1 Z
+bit 1442 C 1 *
+bit 1441 I 1 IO_AN20
+bit 1440 O 1 IO_AN20 1439 1 Z
+bit 1439 C 1 *
+bit 1438 I 1 IO_AP20
+bit 1437 O 1 IO_AP20 1436 1 Z
+bit 1436 C 1 *
+bit 1435 I 1 IO_AD18
+bit 1434 O 1 IO_AD18 1433 1 Z
+bit 1433 C 1 *
+bit 1432 I 1 IO_AH19
+bit 1431 O 1 IO_AH19 1430 1 Z
+bit 1430 C 1 *
+bit 1429 I 1 IO_AJ19
+bit 1428 O 1 IO_AJ19 1427 1 Z
+bit 1427 C 1 *
+bit 1426 I 1 IO_AM19
+bit 1425 O 1 IO_AM19 1424 1 Z
+bit 1424 C 1 *
+bit 1423 I 1 IO_AN19
+bit 1422 O 1 IO_AN19 1421 1 Z
+bit 1421 C 1 *
+bit 1420 I 1 IO_AE18
+bit 1419 O 1 IO_AE18 1418 1 Z
+bit 1418 C 1 *
+bit 1417 I 1 IO_AF18
+bit 1416 O 1 IO_AF18 1415 1 Z
+bit 1415 C 1 *
+bit 1414 I 1 IO_AG18
+bit 1413 O 1 IO_AG18 1412 1 Z
+bit 1412 C 1 *
+bit 1411 I 1 IO_AH18
+bit 1410 O 1 IO_AH18 1409 1 Z
+bit 1409 C 1 *
+bit 1408 I 1 IO_AJ18
+bit 1407 O 1 IO_AJ18 1406 1 Z
+bit 1406 C 1 *
+bit 1405 I 1 IO_AK18
+bit 1404 O 1 IO_AK18 1403 1 Z
+bit 1403 C 1 *
+bit 1402 I 1 IO_AL18
+bit 1401 O 1 IO_AL18 1400 1 Z
+bit 1400 C 1 *
+bit 1399 I 1 IO_AM18
+bit 1398 O 1 IO_AM18 1397 1 Z
+bit 1397 C 1 *
+bit 1396 I 1 IO_AN18
+bit 1395 O 1 IO_AN18 1394 1 Z
+bit 1394 C 1 *
+bit 1393 I 1 IO_AP18
+bit 1392 O 1 IO_AP18 1391 1 Z
+bit 1391 C 1 *
+bit 1390 I 1 IO_AP17
+bit 1389 O 1 IO_AP17 1388 1 Z
+bit 1388 C 1 *
+bit 1387 I 1 IO_AN17
+bit 1386 O 1 IO_AN17 1385 1 Z
+bit 1385 C 1 *
+bit 1384 I 1 IO_AM17
+bit 1383 O 1 IO_AM17 1382 1 Z
+bit 1382 C 1 *
+bit 1381 I 1 IO_AL17
+bit 1380 O 1 IO_AL17 1379 1 Z
+bit 1379 C 1 *
+bit 1378 I 1 IO_AK17
+bit 1377 O 1 IO_AK17 1376 1 Z
+bit 1376 C 1 *
+bit 1375 I 1 IO_AJ17
+bit 1374 O 1 IO_AJ17 1373 1 Z
+bit 1373 C 1 *
+bit 1372 I 1 IO_AH17
+bit 1371 O 1 IO_AH17 1370 1 Z
+bit 1370 C 1 *
+bit 1369 I 1 IO_AG17
+bit 1368 O 1 IO_AG17 1367 1 Z
+bit 1367 C 1 *
+bit 1366 I 1 IO_AF17
+bit 1365 O 1 IO_AF17 1364 1 Z
+bit 1364 C 1 *
+bit 1363 I 1 IO_AE17
+bit 1362 O 1 IO_AE17 1361 1 Z
+bit 1361 C 1 *
+bit 1360 I 1 IO_AD17
+bit 1359 O 1 IO_AD17 1358 1 Z
+bit 1358 C 1 *
+bit 1357 I 1 IO_AN16
+bit 1356 O 1 IO_AN16 1355 1 Z
+bit 1355 C 1 *
+bit 1354 I 1 IO_AM16
+bit 1353 O 1 IO_AM16 1352 1 Z
+bit 1352 C 1 *
+bit 1351 I 1 IO_AJ16
+bit 1350 O 1 IO_AJ16 1349 1 Z
+bit 1349 C 1 *
+bit 1348 I 1 IO_AH16
+bit 1347 O 1 IO_AH16 1346 1 Z
+bit 1346 C 1 *
+bit 1345 I 1 IO_AE16
+bit 1344 O 1 IO_AE16 1343 1 Z
+bit 1343 C 1 *
+bit 1342 I 1 IO_AP15
+bit 1341 O 1 IO_AP15 1340 1 Z
+bit 1340 C 1 *
+bit 1339 I 1 IO_AN15
+bit 1338 O 1 IO_AN15 1337 1 Z
+bit 1337 C 1 *
+bit 1336 I 1 IO_AM15
+bit 1335 O 1 IO_AM15 1334 1 Z
+bit 1334 C 1 *
+bit 1333 I 1 IO_AL15
+bit 1332 O 1 IO_AL15 1331 1 Z
+bit 1331 C 1 *
+bit 1330 I 1 IO_AD16
+bit 1329 O 1 IO_AD16 1328 1 Z
+bit 1328 C 1 *
+bit 1327 I 1 IO_AJ15
+bit 1326 O 1 IO_AJ15 1325 1 Z
+bit 1325 C 1 *
+bit 1324 I 1 IO_AH15
+bit 1323 O 1 IO_AH15 1322 1 Z
+bit 1322 C 1 *
+bit 1321 I 1 IO_AF15
+bit 1320 O 1 IO_AF15 1319 1 Z
+bit 1319 C 1 *
+bit 1318 I 1 IO_AE15
+bit 1317 O 1 IO_AE15 1316 1 Z
+bit 1316 C 1 *
+bit 1315 I 1 IO_AD15
+bit 1314 O 1 IO_AD15 1313 1 Z
+bit 1313 C 1 *
+bit 1312 I 1 IO_AP14
+bit 1311 O 1 IO_AP14 1310 1 Z
+bit 1310 C 1 *
+bit 1309 I 1 IO_AN14
+bit 1308 O 1 IO_AN14 1307 1 Z
+bit 1307 C 1 *
+bit 1306 I 1 IO_AM14
+bit 1305 O 1 IO_AM14 1304 1 Z
+bit 1304 C 1 *
+bit 1303 I 1 IO_AL14
+bit 1302 O 1 IO_AL14 1301 1 Z
+bit 1301 C 1 *
+bit 1300 I 1 IO_AK14
+bit 1299 O 1 IO_AK14 1298 1 Z
+bit 1298 C 1 *
+bit 1297 I 1 IO_AJ14
+bit 1296 O 1 IO_AJ14 1295 1 Z
+bit 1295 C 1 *
+bit 1294 I 1 IO_AH14
+bit 1293 O 1 IO_AH14 1292 1 Z
+bit 1292 C 1 *
+bit 1291 I 1 IO_AG14
+bit 1290 O 1 IO_AG14 1289 1 Z
+bit 1289 C 1 *
+bit 1288 I 1 IO_AF14
+bit 1287 O 1 IO_AF14 1286 1 Z
+bit 1286 C 1 *
+bit 1285 I 1 IO_AE14
+bit 1284 O 1 IO_AE14 1283 1 Z
+bit 1283 C 1 *
+bit 1282 I 1 IO_AM13
+bit 1281 O 1 IO_AM13 1280 1 Z
+bit 1280 C 1 *
+bit 1279 I 1 IO_AL13
+bit 1278 O 1 IO_AL13 1277 1 Z
+bit 1277 C 1 *
+bit 1276 I 1 IO_AH13
+bit 1275 O 1 IO_AH13 1274 1 Z
+bit 1274 C 1 *
+bit 1273 I 1 IO_AG13
+bit 1272 O 1 IO_AG13 1271 1 Z
+bit 1271 C 1 *
+bit 1270 I 1 IO_AD14
+bit 1269 O 1 IO_AD14 1268 1 Z
+bit 1268 C 1 *
+bit 1267 I 1 IO_AE13
+bit 1266 O 1 IO_AE13 1265 1 Z
+bit 1265 C 1 *
+bit 1264 I 1 IO_AD13
+bit 1263 O 1 IO_AD13 1262 1 Z
+bit 1262 C 1 *
+bit 1261 I 1 IO_AP12
+bit 1260 O 1 IO_AP12 1259 1 Z
+bit 1259 C 1 *
+bit 1258 I 1 IO_AN12
+bit 1257 O 1 IO_AN12 1256 1 Z
+bit 1256 C 1 *
+bit 1255 I 1 IO_AM12
+bit 1254 O 1 IO_AM12 1253 1 Z
+bit 1253 C 1 *
+bit 1252 I 1 IO_AL12
+bit 1251 O 1 IO_AL12 1250 1 Z
+bit 1250 C 1 *
+bit 1249 I 1 IO_AK12
+bit 1248 O 1 IO_AK12 1247 1 Z
+bit 1247 C 1 *
+bit 1246 I 1 IO_AJ12
+bit 1245 O 1 IO_AJ12 1244 1 Z
+bit 1244 C 1 *
+bit 1243 I 1 IO_AH12
+bit 1242 O 1 IO_AH12 1241 1 Z
+bit 1241 C 1 *
+bit 1240 I 1 IO_AG12
+bit 1239 O 1 IO_AG12 1238 1 Z
+bit 1238 C 1 *
+bit 1237 I 1 IO_AF12
+bit 1236 O 1 IO_AF12 1235 1 Z
+bit 1235 C 1 *
+bit 1234 I 1 IO_AE12
+bit 1233 O 1 IO_AE12 1232 1 Z
+bit 1232 C 1 *
+bit 1231 I 1 IO_AP11
+bit 1230 O 1 IO_AP11 1229 1 Z
+bit 1229 C 1 *
+bit 1228 I 1 IO_AN11
+bit 1227 O 1 IO_AN11 1226 1 Z
+bit 1226 C 1 *
+bit 1225 I 1 IO_AD11
+bit 1224 O 1 IO_AD11 1223 1 Z
+bit 1223 C 1 *
+bit 1222 I 1 IO_AP10
+bit 1221 O 1 IO_AP10 1220 1 Z
+bit 1220 C 1 *
+bit 1219 I 1 IO_AN10
+bit 1218 O 1 IO_AN10 1217 1 Z
+bit 1217 C 1 *
+bit 1216 I 1 IO_AM10
+bit 1215 O 1 IO_AM10 1214 1 Z
+bit 1214 C 1 *
+bit 1213 I 1 IO_AL10
+bit 1212 O 1 IO_AL10 1211 1 Z
+bit 1211 C 1 *
+bit 1210 I 1 IO_AK10
+bit 1209 O 1 IO_AK10 1208 1 Z
+bit 1208 C 1 *
+bit 1207 I 1 IO_AJ10
+bit 1206 O 1 IO_AJ10 1205 1 Z
+bit 1205 C 1 *
+bit 1204 I 1 IO_AH10
+bit 1203 O 1 IO_AH10 1202 1 Z
+bit 1202 C 1 *
+bit 1201 I 1 IO_AG10
+bit 1200 O 1 IO_AG10 1199 1 Z
+bit 1199 C 1 *
+bit 1198 I 1 IO_AF10
+bit 1197 O 1 IO_AF10 1196 1 Z
+bit 1196 C 1 *
+bit 1195 I 1 IO_AN9
+bit 1194 O 1 IO_AN9 1193 1 Z
+bit 1193 C 1 *
+bit 1192 I 1 IO_AM9
+bit 1191 O 1 IO_AM9 1190 1 Z
+bit 1190 C 1 *
+bit 1189 I 1 IO_AL9
+bit 1188 O 1 IO_AL9 1187 1 Z
+bit 1187 C 1 *
+bit 1186 I 1 IO_AJ9
+bit 1185 O 1 IO_AJ9 1184 1 Z
+bit 1184 C 1 *
+bit 1183 I 1 IO_AH9
+bit 1182 O 1 IO_AH9 1181 1 Z
+bit 1181 C 1 *
+bit 1180 I 1 IO_AG9
+bit 1179 O 1 IO_AG9 1178 1 Z
+bit 1178 C 1 *
+bit 1177 I 1 IO_AP8
+bit 1176 O 1 IO_AP8 1175 1 Z
+bit 1175 C 1 *
+bit 1174 I 1 IO_AN8
+bit 1173 O 1 IO_AN8 1172 1 Z
+bit 1172 C 1 *
+bit 1171 I 1 IO_AL8
+bit 1170 O 1 IO_AL8 1169 1 Z
+bit 1169 C 1 *
+bit 1168 I 1 IO_AK8
+bit 1167 O 1 IO_AK8 1166 1 Z
+bit 1166 C 1 *
+bit 1165 I 1 IO_AJ8
+bit 1164 O 1 IO_AJ8 1163 1 Z
+bit 1163 C 1 *
+bit 1162 I 1 IO_AK7
+bit 1161 O 1 IO_AK7 1160 1 Z
+bit 1160 C 1 *
+bit 1159 I 1 IO_AJ7
+bit 1158 O 1 IO_AJ7 1157 1 Z
+bit 1157 C 1 *
+bit 1156 I 1 IO_AP6
+bit 1155 O 1 IO_AP6 1154 1 Z
+bit 1154 C 1 *
+bit 1153 I 1 IO_AN6
+bit 1152 O 1 IO_AN6 1151 1 Z
+bit 1151 C 1 *
+bit 1150 I 1 IO_AJ6
+bit 1149 O 1 IO_AJ6 1148 1 Z
+bit 1148 C 1 *
+bit 1147 I 1 IO_AM6
+bit 1146 O 1 IO_AM6 1145 1 Z
+bit 1145 C 1 *
+bit 1144 I 1 IO_AL6
+bit 1143 O 1 IO_AL6 1142 1 Z
+bit 1142 C 1 *
+bit 1141 I 1 IO_AN5
+bit 1140 O 1 IO_AN5 1139 1 Z
+bit 1139 C 1 *
+bit 1138 I 1 IO_AM5
+bit 1137 O 1 IO_AM5 1136 1 Z
+bit 1136 C 1 *
+bit 1135 I 1 IO_AL5
+bit 1134 O 1 IO_AL5 1133 1 Z
+bit 1133 C 1 *
+bit 1132 I 1 IO_AP4
+bit 1131 O 1 IO_AP4 1130 1 Z
+bit 1130 C 1 *
+bit 1129 I 1 IO_AN4
+bit 1128 O 1 IO_AN4 1127 1 Z
+bit 1127 C 1 *
+bit 1126 I 1 IO_AP3
+bit 1125 O 1 IO_AP3 1124 1 Z
+bit 1124 C 1 *
+bit 1123 I 1 IO_AN3
+bit 1122 O 1 IO_AN3 1121 1 Z
+bit 1121 C 1 *
+bit 1120 I 1 M2_AG8
+bit 1119 I 1 M0_AL4
+bit 1118 I 1 M1_AK4
+bit 1117 I 1 IO_AM2
+bit 1116 O 1 IO_AM2 1115 1 Z
+bit 1115 C 1 *
+bit 1114 I 1 IO_AM1
+bit 1113 O 1 IO_AM1 1112 1 Z
+bit 1112 C 1 *
+bit 1111 I 1 IO_AL2
+bit 1110 O 1 IO_AL2 1109 1 Z
+bit 1109 C 1 *
+bit 1108 I 1 IO_AL1
+bit 1107 O 1 IO_AL1 1106 1 Z
+bit 1106 C 1 *
+bit 1105 I 1 IO_AK3
+bit 1104 O 1 IO_AK3 1103 1 Z
+bit 1103 C 1 *
+bit 1102 I 1 IO_AK2
+bit 1101 O 1 IO_AK2 1100 1 Z
+bit 1100 C 1 *
+bit 1099 I 1 IO_AJ4
+bit 1098 O 1 IO_AJ4 1097 1 Z
+bit 1097 C 1 *
+bit 1096 I 1 IO_AJ3
+bit 1095 O 1 IO_AJ3 1094 1 Z
+bit 1094 C 1 *
+bit 1093 I 1 IO_AJ2
+bit 1092 O 1 IO_AJ2 1091 1 Z
+bit 1091 C 1 *
+bit 1090 I 1 IO_AJ1
+bit 1089 O 1 IO_AJ1 1088 1 Z
+bit 1088 C 1 *
+bit 1087 I 1 IO_AH6
+bit 1086 O 1 IO_AH6 1085 1 Z
+bit 1085 C 1 *
+bit 1084 I 1 IO_AH5
+bit 1083 O 1 IO_AH5 1082 1 Z
+bit 1082 C 1 *
+bit 1081 I 1 IO_AH2
+bit 1080 O 1 IO_AH2 1079 1 Z
+bit 1079 C 1 *
+bit 1078 O 1 *
+bit 1077 O 1 *
+bit 1076 O 1 *
+bit 1075 O 1 *
+bit 1074 O 1 *
+bit 1073 O 1 *
+bit 1072 I 1 IO_AH1
+bit 1071 O 1 IO_AH1 1070 1 Z
+bit 1070 C 1 *
+bit 1069 I 1 IO_AG6
+bit 1068 O 1 IO_AG6 1067 1 Z
+bit 1067 C 1 *
+bit 1066 I 1 IO_AG5
+bit 1065 O 1 IO_AG5 1064 1 Z
+bit 1064 C 1 *
+bit 1063 I 1 IO_AG2
+bit 1062 O 1 IO_AG2 1061 1 Z
+bit 1061 C 1 *
+bit 1060 I 1 IO_AG1
+bit 1059 O 1 IO_AG1 1058 1 Z
+bit 1058 C 1 *
+bit 1057 I 1 IO_AF7
+bit 1056 O 1 IO_AF7 1055 1 Z
+bit 1055 C 1 *
+bit 1054 I 1 IO_AF6
+bit 1053 O 1 IO_AF6 1052 1 Z
+bit 1052 C 1 *
+bit 1051 I 1 IO_AG4
+bit 1050 O 1 IO_AG4 1049 1 Z
+bit 1049 C 1 *
+bit 1048 I 1 IO_AF4
+bit 1047 O 1 IO_AF4 1046 1 Z
+bit 1046 C 1 *
+bit 1045 I 1 IO_AF3
+bit 1044 O 1 IO_AF3 1043 1 Z
+bit 1043 C 1 *
+bit 1042 I 1 IO_AF2
+bit 1041 O 1 IO_AF2 1040 1 Z
+bit 1040 C 1 *
+bit 1039 I 1 IO_AF8
+bit 1038 O 1 IO_AF8 1037 1 Z
+bit 1037 C 1 *
+bit 1036 I 1 IO_AE9
+bit 1035 O 1 IO_AE9 1034 1 Z
+bit 1034 C 1 *
+bit 1033 I 1 IO_AE8
+bit 1032 O 1 IO_AE8 1031 1 Z
+bit 1031 C 1 *
+bit 1030 I 1 IO_AE7
+bit 1029 O 1 IO_AE7 1028 1 Z
+bit 1028 C 1 *
+bit 1027 I 1 IO_AE6
+bit 1026 O 1 IO_AE6 1025 1 Z
+bit 1025 C 1 *
+bit 1024 I 1 IO_AE5
+bit 1023 O 1 IO_AE5 1022 1 Z
+bit 1022 C 1 *
+bit 1021 I 1 IO_AE4
+bit 1020 O 1 IO_AE4 1019 1 Z
+bit 1019 C 1 *
+bit 1018 I 1 IO_AE3
+bit 1017 O 1 IO_AE3 1016 1 Z
+bit 1016 C 1 *
+bit 1015 I 1 IO_AE2
+bit 1014 O 1 IO_AE2 1013 1 Z
+bit 1013 C 1 *
+bit 1012 I 1 IO_AE1
+bit 1011 O 1 IO_AE1 1010 1 Z
+bit 1010 C 1 *
+bit 1009 I 1 IO_AD10
+bit 1008 O 1 IO_AD10 1007 1 Z
+bit 1007 C 1 *
+bit 1006 I 1 IO_AD9
+bit 1005 O 1 IO_AD9 1004 1 Z
+bit 1004 C 1 *
+bit 1003 O 1 *
+bit 1002 O 1 *
+bit 1001 O 1 *
+bit 1000 O 1 *
+bit 999 O 1 *
+bit 998 O 1 *
+bit 997 I 1 IO_AD2
+bit 996 O 1 IO_AD2 995 1 Z
+bit 995 C 1 *
+bit 994 I 1 IO_AD1
+bit 993 O 1 IO_AD1 992 1 Z
+bit 992 C 1 *
+bit 991 I 1 IO_AC11
+bit 990 O 1 IO_AC11 989 1 Z
+bit 989 C 1 *
+bit 988 I 1 IO_AC10
+bit 987 O 1 IO_AC10 986 1 Z
+bit 986 C 1 *
+bit 985 I 1 IO_AC8
+bit 984 O 1 IO_AC8 983 1 Z
+bit 983 C 1 *
+bit 982 I 1 IO_AC7
+bit 981 O 1 IO_AC7 980 1 Z
+bit 980 C 1 *
+bit 979 I 1 IO_AC6
+bit 978 O 1 IO_AC6 977 1 Z
+bit 977 C 1 *
+bit 976 I 1 IO_AC5
+bit 975 O 1 IO_AC5 974 1 Z
+bit 974 C 1 *
+bit 973 I 1 IO_AC4
+bit 972 O 1 IO_AC4 971 1 Z
+bit 971 C 1 *
+bit 970 I 1 IO_AC3
+bit 969 O 1 IO_AC3 968 1 Z
+bit 968 C 1 *
+bit 967 I 1 IO_AC2
+bit 966 O 1 IO_AC2 965 1 Z
+bit 965 C 1 *
+bit 964 I 1 IO_AC1
+bit 963 O 1 IO_AC1 962 1 Z
+bit 962 C 1 *
+bit 961 I 1 IO_AC9
+bit 960 O 1 IO_AC9 959 1 Z
+bit 959 C 1 *
+bit 958 I 1 IO_AB10
+bit 957 O 1 IO_AB10 956 1 Z
+bit 956 C 1 *
+bit 955 I 1 IO_AB8
+bit 954 O 1 IO_AB8 953 1 Z
+bit 953 C 1 *
+bit 952 I 1 IO_AB7
+bit 951 O 1 IO_AB7 950 1 Z
+bit 950 C 1 *
+bit 949 I 1 IO_AB4
+bit 948 O 1 IO_AB4 947 1 Z
+bit 947 C 1 *
+bit 946 I 1 IO_AB3
+bit 945 O 1 IO_AB3 944 1 Z
+bit 944 C 1 *
+bit 943 I 1 IO_AB11
+bit 942 O 1 IO_AB11 941 1 Z
+bit 941 C 1 *
+bit 940 I 1 IO_AA11
+bit 939 O 1 IO_AA11 938 1 Z
+bit 938 C 1 *
+bit 937 O 1 *
+bit 936 O 1 *
+bit 935 O 1 *
+bit 934 O 1 *
+bit 933 O 1 *
+bit 932 O 1 *
+bit 931 I 1 IO_AA8
+bit 930 O 1 IO_AA8 929 1 Z
+bit 929 C 1 *
+bit 928 I 1 IO_AA7
+bit 927 O 1 IO_AA7 926 1 Z
+bit 926 C 1 *
+bit 925 I 1 IO_AA6
+bit 924 O 1 IO_AA6 923 1 Z
+bit 923 C 1 *
+bit 922 I 1 IO_AA5
+bit 921 O 1 IO_AA5 920 1 Z
+bit 920 C 1 *
+bit 919 I 1 IO_AA4
+bit 918 O 1 IO_AA4 917 1 Z
+bit 917 C 1 *
+bit 916 I 1 IO_AA3
+bit 915 O 1 IO_AA3 914 1 Z
+bit 914 C 1 *
+bit 913 I 1 IO_AA2
+bit 912 O 1 IO_AA2 911 1 Z
+bit 911 C 1 *
+bit 910 I 1 IO_AA1
+bit 909 O 1 IO_AA1 908 1 Z
+bit 908 C 1 *
+bit 907 I 1 IO_Y11
+bit 906 O 1 IO_Y11 905 1 Z
+bit 905 C 1 *
+bit 904 I 1 IO_Y10
+bit 903 O 1 IO_Y10 902 1 Z
+bit 902 C 1 *
+bit 901 I 1 IO_Y7
+bit 900 O 1 IO_Y7 899 1 Z
+bit 899 C 1 *
+bit 898 I 1 IO_Y6
+bit 897 O 1 IO_Y6 896 1 Z
+bit 896 C 1 *
+bit 895 I 1 IO_Y4
+bit 894 O 1 IO_Y4 893 1 Z
+bit 893 C 1 *
+bit 892 I 1 IO_Y3
+bit 891 O 1 IO_Y3 890 1 Z
+bit 890 C 1 *
+bit 889 I 1 IO_Y2
+bit 888 O 1 IO_Y2 887 1 Z
+bit 887 C 1 *
+bit 886 I 1 IO_Y1
+bit 885 O 1 IO_Y1 884 1 Z
+bit 884 C 1 *
+bit 883 I 1 IO_Y9
+bit 882 O 1 IO_Y9 881 1 Z
+bit 881 C 1 *
+bit 880 I 1 IO_W10
+bit 879 O 1 IO_W10 878 1 Z
+bit 878 C 1 *
+bit 877 I 1 IO_W7
+bit 876 O 1 IO_W7 875 1 Z
+bit 875 C 1 *
+bit 874 I 1 IO_W6
+bit 873 O 1 IO_W6 872 1 Z
+bit 872 C 1 *
+bit 871 I 1 IO_W3
+bit 870 O 1 IO_W3 869 1 Z
+bit 869 C 1 *
+bit 868 I 1 IO_W2
+bit 867 O 1 IO_W2 866 1 Z
+bit 866 C 1 *
+bit 865 I 1 IO_V10
+bit 864 O 1 IO_V10 863 1 Z
+bit 863 C 1 *
+bit 862 O 1 *
+bit 861 O 1 *
+bit 860 O 1 *
+bit 859 O 1 *
+bit 858 O 1 *
+bit 857 O 1 *
+bit 856 I 1 IO_V9
+bit 855 O 1 IO_V9 854 1 Z
+bit 854 C 1 *
+bit 853 I 1 IO_V8
+bit 852 O 1 IO_V8 851 1 Z
+bit 851 C 1 *
+bit 850 I 1 IO_V7
+bit 849 O 1 IO_V7 848 1 Z
+bit 848 C 1 *
+bit 847 I 1 IO_V6
+bit 846 O 1 IO_V6 845 1 Z
+bit 845 C 1 *
+bit 844 I 1 IO_V5
+bit 843 O 1 IO_V5 842 1 Z
+bit 842 C 1 *
+bit 841 I 1 IO_V4
+bit 840 O 1 IO_V4 839 1 Z
+bit 839 C 1 *
+bit 838 I 1 IO_V3
+bit 837 O 1 IO_V3 836 1 Z
+bit 836 C 1 *
+bit 835 I 1 IO_V2
+bit 834 O 1 IO_V2 833 1 Z
+bit 833 C 1 *
+bit 832 I 1 IO_V1
+bit 831 O 1 IO_V1 830 1 Z
+bit 830 C 1 *
+bit 829 I 1 IO_U1
+bit 828 O 1 IO_U1 827 1 Z
+bit 827 C 1 *
+bit 826 I 1 IO_U2
+bit 825 O 1 IO_U2 824 1 Z
+bit 824 C 1 *
+bit 823 I 1 IO_U3
+bit 822 O 1 IO_U3 821 1 Z
+bit 821 C 1 *
+bit 820 I 1 IO_U4
+bit 819 O 1 IO_U4 818 1 Z
+bit 818 C 1 *
+bit 817 I 1 IO_U5
+bit 816 O 1 IO_U5 815 1 Z
+bit 815 C 1 *
+bit 814 I 1 IO_U6
+bit 813 O 1 IO_U6 812 1 Z
+bit 812 C 1 *
+bit 811 I 1 IO_U7
+bit 810 O 1 IO_U7 809 1 Z
+bit 809 C 1 *
+bit 808 I 1 IO_U8
+bit 807 O 1 IO_U8 806 1 Z
+bit 806 C 1 *
+bit 805 I 1 IO_U9
+bit 804 O 1 IO_U9 803 1 Z
+bit 803 C 1 *
+bit 802 O 1 *
+bit 801 O 1 *
+bit 800 O 1 *
+bit 799 O 1 *
+bit 798 O 1 *
+bit 797 O 1 *
+bit 796 I 1 IO_U10
+bit 795 O 1 IO_U10 794 1 Z
+bit 794 C 1 *
+bit 793 I 1 IO_T2
+bit 792 O 1 IO_T2 791 1 Z
+bit 791 C 1 *
+bit 790 I 1 IO_T3
+bit 789 O 1 IO_T3 788 1 Z
+bit 788 C 1 *
+bit 787 I 1 IO_T6
+bit 786 O 1 IO_T6 785 1 Z
+bit 785 C 1 *
+bit 784 I 1 IO_T7
+bit 783 O 1 IO_T7 782 1 Z
+bit 782 C 1 *
+bit 781 I 1 IO_T10
+bit 780 O 1 IO_T10 779 1 Z
+bit 779 C 1 *
+bit 778 I 1 IO_R9
+bit 777 O 1 IO_R9 776 1 Z
+bit 776 C 1 *
+bit 775 I 1 IO_R1
+bit 774 O 1 IO_R1 773 1 Z
+bit 773 C 1 *
+bit 772 I 1 IO_R2
+bit 771 O 1 IO_R2 770 1 Z
+bit 770 C 1 *
+bit 769 I 1 IO_R3
+bit 768 O 1 IO_R3 767 1 Z
+bit 767 C 1 *
+bit 766 I 1 IO_R4
+bit 765 O 1 IO_R4 764 1 Z
+bit 764 C 1 *
+bit 763 I 1 IO_R6
+bit 762 O 1 IO_R6 761 1 Z
+bit 761 C 1 *
+bit 760 I 1 IO_R7
+bit 759 O 1 IO_R7 758 1 Z
+bit 758 C 1 *
+bit 757 I 1 IO_R10
+bit 756 O 1 IO_R10 755 1 Z
+bit 755 C 1 *
+bit 754 I 1 IO_R11
+bit 753 O 1 IO_R11 752 1 Z
+bit 752 C 1 *
+bit 751 I 1 IO_P1
+bit 750 O 1 IO_P1 749 1 Z
+bit 749 C 1 *
+bit 748 I 1 IO_P2
+bit 747 O 1 IO_P2 746 1 Z
+bit 746 C 1 *
+bit 745 I 1 IO_P3
+bit 744 O 1 IO_P3 743 1 Z
+bit 743 C 1 *
+bit 742 I 1 IO_P4
+bit 741 O 1 IO_P4 740 1 Z
+bit 740 C 1 *
+bit 739 I 1 IO_P5
+bit 738 O 1 IO_P5 737 1 Z
+bit 737 C 1 *
+bit 736 I 1 IO_P6
+bit 735 O 1 IO_P6 734 1 Z
+bit 734 C 1 *
+bit 733 I 1 IO_P7
+bit 732 O 1 IO_P7 731 1 Z
+bit 731 C 1 *
+bit 730 I 1 IO_P8
+bit 729 O 1 IO_P8 728 1 Z
+bit 728 C 1 *
+bit 727 O 1 *
+bit 726 O 1 *
+bit 725 O 1 *
+bit 724 O 1 *
+bit 723 O 1 *
+bit 722 O 1 *
+bit 721 I 1 IO_P11
+bit 720 O 1 IO_P11 719 1 Z
+bit 719 C 1 *
+bit 718 I 1 IO_N11
+bit 717 O 1 IO_N11 716 1 Z
+bit 716 C 1 *
+bit 715 I 1 IO_N3
+bit 714 O 1 IO_N3 713 1 Z
+bit 713 C 1 *
+bit 712 I 1 IO_N4
+bit 711 O 1 IO_N4 710 1 Z
+bit 710 C 1 *
+bit 709 I 1 IO_N7
+bit 708 O 1 IO_N7 707 1 Z
+bit 707 C 1 *
+bit 706 I 1 IO_N8
+bit 705 O 1 IO_N8 704 1 Z
+bit 704 C 1 *
+bit 703 I 1 IO_N10
+bit 702 O 1 IO_N10 701 1 Z
+bit 701 C 1 *
+bit 700 I 1 IO_M9
+bit 699 O 1 IO_M9 698 1 Z
+bit 698 C 1 *
+bit 697 I 1 IO_M1
+bit 696 O 1 IO_M1 695 1 Z
+bit 695 C 1 *
+bit 694 I 1 IO_M2
+bit 693 O 1 IO_M2 692 1 Z
+bit 692 C 1 *
+bit 691 I 1 IO_M3
+bit 690 O 1 IO_M3 689 1 Z
+bit 689 C 1 *
+bit 688 I 1 IO_M4
+bit 687 O 1 IO_M4 686 1 Z
+bit 686 C 1 *
+bit 685 I 1 IO_M5
+bit 684 O 1 IO_M5 683 1 Z
+bit 683 C 1 *
+bit 682 I 1 IO_M6
+bit 681 O 1 IO_M6 680 1 Z
+bit 680 C 1 *
+bit 679 I 1 IO_M7
+bit 678 O 1 IO_M7 677 1 Z
+bit 677 C 1 *
+bit 676 I 1 IO_M8
+bit 675 O 1 IO_M8 674 1 Z
+bit 674 C 1 *
+bit 673 I 1 IO_M10
+bit 672 O 1 IO_M10 671 1 Z
+bit 671 C 1 *
+bit 670 I 1 IO_M11
+bit 669 O 1 IO_M11 668 1 Z
+bit 668 C 1 *
+bit 667 I 1 IO_L1
+bit 666 O 1 IO_L1 665 1 Z
+bit 665 C 1 *
+bit 664 I 1 IO_L2
+bit 663 O 1 IO_L2 662 1 Z
+bit 662 C 1 *
+bit 661 O 1 *
+bit 660 O 1 *
+bit 659 O 1 *
+bit 658 O 1 *
+bit 657 O 1 *
+bit 656 O 1 *
+bit 655 I 1 IO_L9
+bit 654 O 1 IO_L9 653 1 Z
+bit 653 C 1 *
+bit 652 I 1 IO_L10
+bit 651 O 1 IO_L10 650 1 Z
+bit 650 C 1 *
+bit 649 I 1 IO_K1
+bit 648 O 1 IO_K1 647 1 Z
+bit 647 C 1 *
+bit 646 I 1 IO_K2
+bit 645 O 1 IO_K2 644 1 Z
+bit 644 C 1 *
+bit 643 I 1 IO_K3
+bit 642 O 1 IO_K3 641 1 Z
+bit 641 C 1 *
+bit 640 I 1 IO_K4
+bit 639 O 1 IO_K4 638 1 Z
+bit 638 C 1 *
+bit 637 I 1 IO_K5
+bit 636 O 1 IO_K5 635 1 Z
+bit 635 C 1 *
+bit 634 I 1 IO_K6
+bit 633 O 1 IO_K6 632 1 Z
+bit 632 C 1 *
+bit 631 I 1 IO_K7
+bit 630 O 1 IO_K7 629 1 Z
+bit 629 C 1 *
+bit 628 I 1 IO_K8
+bit 627 O 1 IO_K8 626 1 Z
+bit 626 C 1 *
+bit 625 I 1 IO_K9
+bit 624 O 1 IO_K9 623 1 Z
+bit 623 C 1 *
+bit 622 I 1 IO_J8
+bit 621 O 1 IO_J8 620 1 Z
+bit 620 C 1 *
+bit 619 I 1 IO_J2
+bit 618 O 1 IO_J2 617 1 Z
+bit 617 C 1 *
+bit 616 I 1 IO_J3
+bit 615 O 1 IO_J3 614 1 Z
+bit 614 C 1 *
+bit 613 I 1 IO_J4
+bit 612 O 1 IO_J4 611 1 Z
+bit 611 C 1 *
+bit 610 I 1 IO_H4
+bit 609 O 1 IO_H4 608 1 Z
+bit 608 C 1 *
+bit 607 I 1 IO_J6
+bit 606 O 1 IO_J6 605 1 Z
+bit 605 C 1 *
+bit 604 I 1 IO_J7
+bit 603 O 1 IO_J7 602 1 Z
+bit 602 C 1 *
+bit 601 I 1 IO_H1
+bit 600 O 1 IO_H1 599 1 Z
+bit 599 C 1 *
+bit 598 I 1 IO_H2
+bit 597 O 1 IO_H2 596 1 Z
+bit 596 C 1 *
+bit 595 I 1 IO_H5
+bit 594 O 1 IO_H5 593 1 Z
+bit 593 C 1 *
+bit 592 I 1 IO_H6
+bit 591 O 1 IO_H6 590 1 Z
+bit 590 C 1 *
+bit 589 I 1 IO_G1
+bit 588 O 1 IO_G1 587 1 Z
+bit 587 C 1 *
+bit 586 O 1 *
+bit 585 O 1 *
+bit 584 O 1 *
+bit 583 O 1 *
+bit 582 O 1 *
+bit 581 O 1 *
+bit 580 I 1 IO_G2
+bit 579 O 1 IO_G2 578 1 Z
+bit 578 C 1 *
+bit 577 I 1 IO_G5
+bit 576 O 1 IO_G5 575 1 Z
+bit 575 C 1 *
+bit 574 I 1 IO_G6
+bit 573 O 1 IO_G6 572 1 Z
+bit 572 C 1 *
+bit 571 I 1 IO_F1
+bit 570 O 1 IO_F1 569 1 Z
+bit 569 C 1 *
+bit 568 I 1 IO_F2
+bit 567 O 1 IO_F2 566 1 Z
+bit 566 C 1 *
+bit 565 I 1 IO_F3
+bit 564 O 1 IO_F3 563 1 Z
+bit 563 C 1 *
+bit 562 I 1 IO_F4
+bit 561 O 1 IO_F4 560 1 Z
+bit 560 C 1 *
+bit 559 I 1 IO_E2
+bit 558 O 1 IO_E2 557 1 Z
+bit 557 C 1 *
+bit 556 I 1 IO_E3
+bit 555 O 1 IO_E3 554 1 Z
+bit 554 C 1 *
+bit 553 I 1 IO_D1
+bit 552 O 1 IO_D1 551 1 Z
+bit 551 C 1 *
+bit 550 I 1 IO_D2
+bit 549 O 1 IO_D2 548 1 Z
+bit 548 C 1 *
+bit 547 I 1 IO_C1
+bit 546 O 1 IO_C1 545 1 Z
+bit 545 C 1 *
+bit 544 I 1 IO_C2
+bit 543 O 1 IO_C2 542 1 Z
+bit 542 C 1 *
+bit 541 O 1 *
+bit 540 I 1 HSWAP_EN_L11
+bit 539 I 1 IO_D5
+bit 538 O 1 IO_D5 537 1 Z
+bit 537 C 1 *
+bit 536 I 1 IO_B3
+bit 535 O 1 IO_B3 534 1 Z
+bit 534 C 1 *
+bit 533 I 1 IO_A3
+bit 532 O 1 IO_A3 531 1 Z
+bit 531 C 1 *
+bit 530 I 1 IO_B4
+bit 529 O 1 IO_B4 528 1 Z
+bit 528 C 1 *
+bit 527 I 1 IO_A4
+bit 526 O 1 IO_A4 525 1 Z
+bit 525 C 1 *
+bit 524 I 1 IO_F6
+bit 523 O 1 IO_F6 522 1 Z
+bit 522 C 1 *
+bit 521 I 1 IO_C5
+bit 520 O 1 IO_C5 519 1 Z
+bit 519 C 1 *
+bit 518 I 1 IO_B5
+bit 517 O 1 IO_B5 516 1 Z
+bit 516 C 1 *
+bit 515 I 1 IO_D6
+bit 514 O 1 IO_D6 513 1 Z
+bit 513 C 1 *
+bit 512 I 1 IO_C6
+bit 511 O 1 IO_C6 510 1 Z
+bit 510 C 1 *
+bit 509 I 1 IO_H8
+bit 508 O 1 IO_H8 507 1 Z
+bit 507 C 1 *
+bit 506 I 1 IO_B6
+bit 505 O 1 IO_B6 504 1 Z
+bit 504 C 1 *
+bit 503 I 1 IO_A6
+bit 502 O 1 IO_A6 501 1 Z
+bit 501 C 1 *
+bit 500 I 1 IO_F7
+bit 499 O 1 IO_F7 498 1 Z
+bit 498 C 1 *
+bit 497 I 1 IO_E7
+bit 496 O 1 IO_E7 495 1 Z
+bit 495 C 1 *
+bit 494 I 1 IO_F8
+bit 493 O 1 IO_F8 492 1 Z
+bit 492 C 1 *
+bit 491 I 1 IO_E8
+bit 490 O 1 IO_E8 489 1 Z
+bit 489 C 1 *
+bit 488 I 1 IO_D8
+bit 487 O 1 IO_D8 486 1 Z
+bit 486 C 1 *
+bit 485 I 1 IO_B8
+bit 484 O 1 IO_B8 483 1 Z
+bit 483 C 1 *
+bit 482 I 1 IO_A8
+bit 481 O 1 IO_A8 480 1 Z
+bit 480 C 1 *
+bit 479 I 1 IO_H9
+bit 478 O 1 IO_H9 477 1 Z
+bit 477 C 1 *
+bit 476 I 1 IO_G9
+bit 475 O 1 IO_G9 474 1 Z
+bit 474 C 1 *
+bit 473 I 1 IO_F9
+bit 472 O 1 IO_F9 471 1 Z
+bit 471 C 1 *
+bit 470 I 1 IO_D9
+bit 469 O 1 IO_D9 468 1 Z
+bit 468 C 1 *
+bit 467 I 1 IO_C9
+bit 466 O 1 IO_C9 465 1 Z
+bit 465 C 1 *
+bit 464 I 1 IO_B9
+bit 463 O 1 IO_B9 462 1 Z
+bit 462 C 1 *
+bit 461 I 1 IO_J10
+bit 460 O 1 IO_J10 459 1 Z
+bit 459 C 1 *
+bit 458 I 1 IO_H10
+bit 457 O 1 IO_H10 456 1 Z
+bit 456 C 1 *
+bit 455 I 1 IO_G10
+bit 454 O 1 IO_G10 453 1 Z
+bit 453 C 1 *
+bit 452 I 1 IO_F10
+bit 451 O 1 IO_F10 450 1 Z
+bit 450 C 1 *
+bit 449 I 1 IO_E10
+bit 448 O 1 IO_E10 447 1 Z
+bit 447 C 1 *
+bit 446 I 1 IO_D10
+bit 445 O 1 IO_D10 444 1 Z
+bit 444 C 1 *
+bit 443 I 1 IO_C10
+bit 442 O 1 IO_C10 441 1 Z
+bit 441 C 1 *
+bit 440 I 1 IO_B10
+bit 439 O 1 IO_B10 438 1 Z
+bit 438 C 1 *
+bit 437 I 1 IO_A10
+bit 436 O 1 IO_A10 435 1 Z
+bit 435 C 1 *
+bit 434 I 1 IO_J11
+bit 433 O 1 IO_J11 432 1 Z
+bit 432 C 1 *
+bit 431 I 1 IO_L12
+bit 430 O 1 IO_L12 429 1 Z
+bit 429 C 1 *
+bit 428 I 1 IO_K12
+bit 427 O 1 IO_K12 426 1 Z
+bit 426 C 1 *
+bit 425 I 1 IO_J12
+bit 424 O 1 IO_J12 423 1 Z
+bit 423 C 1 *
+bit 422 I 1 IO_H12
+bit 421 O 1 IO_H12 420 1 Z
+bit 420 C 1 *
+bit 419 I 1 IO_G12
+bit 418 O 1 IO_G12 417 1 Z
+bit 417 C 1 *
+bit 416 I 1 IO_F12
+bit 415 O 1 IO_F12 414 1 Z
+bit 414 C 1 *
+bit 413 I 1 IO_E12
+bit 412 O 1 IO_E12 411 1 Z
+bit 411 C 1 *
+bit 410 I 1 IO_D12
+bit 409 O 1 IO_D12 408 1 Z
+bit 408 C 1 *
+bit 407 I 1 IO_C12
+bit 406 O 1 IO_C12 405 1 Z
+bit 405 C 1 *
+bit 404 I 1 IO_L13
+bit 403 O 1 IO_L13 402 1 Z
+bit 402 C 1 *
+bit 401 I 1 IO_B12
+bit 400 O 1 IO_B12 399 1 Z
+bit 399 C 1 *
+bit 398 I 1 IO_A12
+bit 397 O 1 IO_A12 396 1 Z
+bit 396 C 1 *
+bit 395 I 1 IO_H13
+bit 394 O 1 IO_H13 393 1 Z
+bit 393 C 1 *
+bit 392 I 1 IO_G13
+bit 391 O 1 IO_G13 390 1 Z
+bit 390 C 1 *
+bit 389 I 1 IO_K13
+bit 388 O 1 IO_K13 387 1 Z
+bit 387 C 1 *
+bit 386 I 1 IO_D13
+bit 385 O 1 IO_D13 384 1 Z
+bit 384 C 1 *
+bit 383 I 1 IO_C13
+bit 382 O 1 IO_C13 381 1 Z
+bit 381 C 1 *
+bit 380 I 1 IO_L14
+bit 379 O 1 IO_L14 378 1 Z
+bit 378 C 1 *
+bit 377 I 1 IO_K14
+bit 376 O 1 IO_K14 375 1 Z
+bit 375 C 1 *
+bit 374 I 1 IO_J14
+bit 373 O 1 IO_J14 372 1 Z
+bit 372 C 1 *
+bit 371 I 1 IO_H14
+bit 370 O 1 IO_H14 369 1 Z
+bit 369 C 1 *
+bit 368 I 1 IO_G14
+bit 367 O 1 IO_G14 366 1 Z
+bit 366 C 1 *
+bit 365 I 1 IO_F14
+bit 364 O 1 IO_F14 363 1 Z
+bit 363 C 1 *
+bit 362 I 1 IO_E14
+bit 361 O 1 IO_E14 360 1 Z
+bit 360 C 1 *
+bit 359 I 1 IO_L15
+bit 358 O 1 IO_L15 357 1 Z
+bit 357 C 1 *
+bit 356 I 1 IO_D14
+bit 355 O 1 IO_D14 354 1 Z
+bit 354 C 1 *
+bit 353 I 1 IO_C14
+bit 352 O 1 IO_C14 351 1 Z
+bit 351 C 1 *
+bit 350 I 1 IO_B14
+bit 349 O 1 IO_B14 348 1 Z
+bit 348 C 1 *
+bit 347 I 1 IO_A14
+bit 346 O 1 IO_A14 345 1 Z
+bit 345 C 1 *
+bit 344 I 1 IO_L16
+bit 343 O 1 IO_L16 342 1 Z
+bit 342 C 1 *
+bit 341 I 1 IO_K15
+bit 340 O 1 IO_K15 339 1 Z
+bit 339 C 1 *
+bit 338 I 1 IO_J15
+bit 337 O 1 IO_J15 336 1 Z
+bit 336 C 1 *
+bit 335 I 1 IO_G15
+bit 334 O 1 IO_G15 333 1 Z
+bit 333 C 1 *
+bit 332 I 1 IO_F15
+bit 331 O 1 IO_F15 330 1 Z
+bit 330 C 1 *
+bit 329 I 1 IO_K16
+bit 328 O 1 IO_K16 327 1 Z
+bit 327 C 1 *
+bit 326 I 1 IO_D15
+bit 325 O 1 IO_D15 324 1 Z
+bit 324 C 1 *
+bit 323 I 1 IO_C15
+bit 322 O 1 IO_C15 321 1 Z
+bit 321 C 1 *
+bit 320 I 1 IO_B15
+bit 319 O 1 IO_B15 318 1 Z
+bit 318 C 1 *
+bit 317 I 1 IO_A15
+bit 316 O 1 IO_A15 315 1 Z
+bit 315 C 1 *
+bit 314 I 1 IO_L17
+bit 313 O 1 IO_L17 312 1 Z
+bit 312 C 1 *
+bit 311 I 1 IO_G16
+bit 310 O 1 IO_G16 309 1 Z
+bit 309 C 1 *
+bit 308 I 1 IO_F16
+bit 307 O 1 IO_F16 306 1 Z
+bit 306 C 1 *
+bit 305 I 1 IO_C16
+bit 304 O 1 IO_C16 303 1 Z
+bit 303 C 1 *
+bit 302 I 1 IO_B16
+bit 301 O 1 IO_B16 300 1 Z
+bit 300 C 1 *
+bit 299 I 1 IO_K17
+bit 298 O 1 IO_K17 297 1 Z
+bit 297 C 1 *
+bit 296 I 1 IO_J17
+bit 295 O 1 IO_J17 294 1 Z
+bit 294 C 1 *
+bit 293 I 1 IO_H17
+bit 292 O 1 IO_H17 291 1 Z
+bit 291 C 1 *
+bit 290 I 1 IO_G17
+bit 289 O 1 IO_G17 288 1 Z
+bit 288 C 1 *
+bit 287 I 1 IO_F17
+bit 286 O 1 IO_F17 285 1 Z
+bit 285 C 1 *
+bit 284 I 1 IO_E17
+bit 283 O 1 IO_E17 282 1 Z
+bit 282 C 1 *
+bit 281 I 1 IO_D17
+bit 280 O 1 IO_D17 279 1 Z
+bit 279 C 1 *
+bit 278 I 1 IO_C17
+bit 277 O 1 IO_C17 276 1 Z
+bit 276 C 1 *
+bit 275 I 1 IO_B17
+bit 274 O 1 IO_B17 273 1 Z
+bit 273 C 1 *
+bit 272 I 1 IO_A17
+bit 271 O 1 IO_A17 270 1 Z
+bit 270 C 1 *
+bit 269 I 1 IO_A18
+bit 268 O 1 IO_A18 267 1 Z
+bit 267 C 1 *
+bit 266 I 1 IO_B18
+bit 265 O 1 IO_B18 264 1 Z
+bit 264 C 1 *
+bit 263 I 1 IO_C18
+bit 262 O 1 IO_C18 261 1 Z
+bit 261 C 1 *
+bit 260 I 1 IO_D18
+bit 259 O 1 IO_D18 258 1 Z
+bit 258 C 1 *
+bit 257 I 1 IO_E18
+bit 256 O 1 IO_E18 255 1 Z
+bit 255 C 1 *
+bit 254 I 1 IO_F18
+bit 253 O 1 IO_F18 252 1 Z
+bit 252 C 1 *
+bit 251 I 1 IO_G18
+bit 250 O 1 IO_G18 249 1 Z
+bit 249 C 1 *
+bit 248 I 1 IO_H18
+bit 247 O 1 IO_H18 246 1 Z
+bit 246 C 1 *
+bit 245 I 1 IO_J18
+bit 244 O 1 IO_J18 243 1 Z
+bit 243 C 1 *
+bit 242 I 1 IO_K18
+bit 241 O 1 IO_K18 240 1 Z
+bit 240 C 1 *
+bit 239 I 1 IO_L18
+bit 238 O 1 IO_L18 237 1 Z
+bit 237 C 1 *
+bit 236 I 1 IO_B19
+bit 235 O 1 IO_B19 234 1 Z
+bit 234 C 1 *
+bit 233 I 1 IO_C19
+bit 232 O 1 IO_C19 231 1 Z
+bit 231 C 1 *
+bit 230 I 1 IO_F19
+bit 229 O 1 IO_F19 228 1 Z
+bit 228 C 1 *
+bit 227 I 1 IO_G19
+bit 226 O 1 IO_G19 225 1 Z
+bit 225 C 1 *
+bit 224 I 1 IO_K19
+bit 223 O 1 IO_K19 222 1 Z
+bit 222 C 1 *
+bit 221 I 1 IO_A20
+bit 220 O 1 IO_A20 219 1 Z
+bit 219 C 1 *
+bit 218 I 1 IO_B20
+bit 217 O 1 IO_B20 216 1 Z
+bit 216 C 1 *
+bit 215 I 1 IO_C20
+bit 214 O 1 IO_C20 213 1 Z
+bit 213 C 1 *
+bit 212 I 1 IO_D20
+bit 211 O 1 IO_D20 210 1 Z
+bit 210 C 1 *
+bit 209 I 1 IO_L19
+bit 208 O 1 IO_L19 207 1 Z
+bit 207 C 1 *
+bit 206 I 1 IO_F20
+bit 205 O 1 IO_F20 204 1 Z
+bit 204 C 1 *
+bit 203 I 1 IO_G20
+bit 202 O 1 IO_G20 201 1 Z
+bit 201 C 1 *
+bit 200 I 1 IO_J20
+bit 199 O 1 IO_J20 198 1 Z
+bit 198 C 1 *
+bit 197 I 1 IO_K20
+bit 196 O 1 IO_K20 195 1 Z
+bit 195 C 1 *
+bit 194 I 1 IO_L20
+bit 193 O 1 IO_L20 192 1 Z
+bit 192 C 1 *
+bit 191 I 1 IO_A21
+bit 190 O 1 IO_A21 189 1 Z
+bit 189 C 1 *
+bit 188 I 1 IO_B21
+bit 187 O 1 IO_B21 186 1 Z
+bit 186 C 1 *
+bit 185 I 1 IO_C21
+bit 184 O 1 IO_C21 183 1 Z
+bit 183 C 1 *
+bit 182 I 1 IO_D21
+bit 181 O 1 IO_D21 180 1 Z
+bit 180 C 1 *
+bit 179 I 1 IO_E21
+bit 178 O 1 IO_E21 177 1 Z
+bit 177 C 1 *
+bit 176 I 1 IO_F21
+bit 175 O 1 IO_F21 174 1 Z
+bit 174 C 1 *
+bit 173 I 1 IO_G21
+bit 172 O 1 IO_G21 171 1 Z
+bit 171 C 1 *
+bit 170 I 1 IO_H21
+bit 169 O 1 IO_H21 168 1 Z
+bit 168 C 1 *
+bit 167 I 1 IO_J21
+bit 166 O 1 IO_J21 165 1 Z
+bit 165 C 1 *
+bit 164 I 1 IO_K21
+bit 163 O 1 IO_K21 162 1 Z
+bit 162 C 1 *
+bit 161 I 1 IO_C22
+bit 160 O 1 IO_C22 159 1 Z
+bit 159 C 1 *
+bit 158 I 1 IO_D22
+bit 157 O 1 IO_D22 156 1 Z
+bit 156 C 1 *
+bit 155 I 1 IO_G22
+bit 154 O 1 IO_G22 153 1 Z
+bit 153 C 1 *
+bit 152 I 1 IO_H22
+bit 151 O 1 IO_H22 150 1 Z
+bit 150 C 1 *
+bit 149 I 1 IO_L21
+bit 148 O 1 IO_L21 147 1 Z
+bit 147 C 1 *
+bit 146 I 1 IO_K22
+bit 145 O 1 IO_K22 144 1 Z
+bit 144 C 1 *
+bit 143 I 1 IO_L22
+bit 142 O 1 IO_L22 141 1 Z
+bit 141 C 1 *
+bit 140 I 1 IO_A23
+bit 139 O 1 IO_A23 138 1 Z
+bit 138 C 1 *
+bit 137 I 1 IO_B23
+bit 136 O 1 IO_B23 135 1 Z
+bit 135 C 1 *
+bit 134 I 1 IO_C23
+bit 133 O 1 IO_C23 132 1 Z
+bit 132 C 1 *
+bit 131 I 1 IO_D23
+bit 130 O 1 IO_D23 129 1 Z
+bit 129 C 1 *
+bit 128 I 1 IO_E23
+bit 127 O 1 IO_E23 126 1 Z
+bit 126 C 1 *
+bit 125 I 1 IO_F23
+bit 124 O 1 IO_F23 123 1 Z
+bit 123 C 1 *
+bit 122 I 1 IO_G23
+bit 121 O 1 IO_G23 120 1 Z
+bit 120 C 1 *
+bit 119 I 1 IO_H23
+bit 118 O 1 IO_H23 117 1 Z
+bit 117 C 1 *
+bit 116 I 1 IO_J23
+bit 115 O 1 IO_J23 114 1 Z
+bit 114 C 1 *
+bit 113 I 1 IO_K23
+bit 112 O 1 IO_K23 111 1 Z
+bit 111 C 1 *
+bit 110 I 1 IO_A24
+bit 109 O 1 IO_A24 108 1 Z
+bit 108 C 1 *
+bit 107 I 1 IO_B24
+bit 106 O 1 IO_B24 105 1 Z
+bit 105 C 1 *
+bit 104 I 1 IO_L24
+bit 103 O 1 IO_L24 102 1 Z
+bit 102 C 1 *
+bit 101 I 1 IO_A25
+bit 100 O 1 IO_A25 99 1 Z
+bit 99 C 1 *
+bit 98 I 1 IO_B25
+bit 97 O 1 IO_B25 96 1 Z
+bit 96 C 1 *
+bit 95 I 1 IO_C25
+bit 94 O 1 IO_C25 93 1 Z
+bit 93 C 1 *
+bit 92 I 1 IO_D25
+bit 91 O 1 IO_D25 90 1 Z
+bit 90 C 1 *
+bit 89 I 1 IO_E25
+bit 88 O 1 IO_E25 87 1 Z
+bit 87 C 1 *
+bit 86 I 1 IO_F25
+bit 85 O 1 IO_F25 84 1 Z
+bit 84 C 1 *
+bit 83 I 1 IO_G25
+bit 82 O 1 IO_G25 81 1 Z
+bit 81 C 1 *
+bit 80 I 1 IO_H25
+bit 79 O 1 IO_H25 78 1 Z
+bit 78 C 1 *
+bit 77 I 1 IO_J25
+bit 76 O 1 IO_J25 75 1 Z
+bit 75 C 1 *
+bit 74 I 1 IO_B26
+bit 73 O 1 IO_B26 72 1 Z
+bit 72 C 1 *
+bit 71 I 1 IO_C26
+bit 70 O 1 IO_C26 69 1 Z
+bit 69 C 1 *
+bit 68 I 1 IO_D26
+bit 67 O 1 IO_D26 66 1 Z
+bit 66 C 1 *
+bit 65 I 1 IO_F26
+bit 64 O 1 IO_F26 63 1 Z
+bit 63 C 1 *
+bit 62 I 1 IO_G26
+bit 61 O 1 IO_G26 60 1 Z
+bit 60 C 1 *
+bit 59 I 1 IO_H26
+bit 58 O 1 IO_H26 57 1 Z
+bit 57 C 1 *
+bit 56 I 1 IO_A27
+bit 55 O 1 IO_A27 54 1 Z
+bit 54 C 1 *
+bit 53 I 1 IO_B27
+bit 52 O 1 IO_B27 51 1 Z
+bit 51 C 1 *
+bit 50 I 1 IO_D27
+bit 49 O 1 IO_D27 48 1 Z
+bit 48 C 1 *
+bit 47 I 1 IO_E27
+bit 46 O 1 IO_E27 45 1 Z
+bit 45 C 1 *
+bit 44 I 1 IO_F27
+bit 43 O 1 IO_F27 42 1 Z
+bit 42 C 1 *
+bit 41 I 1 IO_E28
+bit 40 O 1 IO_E28 39 1 Z
+bit 39 C 1 *
+bit 38 I 1 IO_F28
+bit 37 O 1 IO_F28 36 1 Z
+bit 36 C 1 *
+bit 35 I 1 IO_A29
+bit 34 O 1 IO_A29 33 1 Z
+bit 33 C 1 *
+bit 32 I 1 IO_B29
+bit 31 O 1 IO_B29 30 1 Z
+bit 30 C 1 *
+bit 29 I 1 IO_F29
+bit 28 O 1 IO_F29 27 1 Z
+bit 27 C 1 *
+bit 26 I 1 IO_C29
+bit 25 O 1 IO_C29 24 1 Z
+bit 24 C 1 *
+bit 23 I 1 IO_D29
+bit 22 O 1 IO_D29 21 1 Z
+bit 21 C 1 *
+bit 20 I 1 IO_B30
+bit 19 O 1 IO_B30 18 1 Z
+bit 18 C 1 *
+bit 17 I 1 IO_C30
+bit 16 O 1 IO_C30 15 1 Z
+bit 15 C 1 *
+bit 14 I 1 IO_D30
+bit 13 O 1 IO_D30 12 1 Z
+bit 12 C 1 *
+bit 11 I 1 IO_A31
+bit 10 O 1 IO_A31 9 1 Z
+bit 9 C 1 *
+bit 8 I 1 IO_B31
+bit 7 O 1 IO_B31 6 1 Z
+bit 6 C 1 *
+bit 5 I 1 IO_A32
+bit 4 O 1 IO_A32 3 1 Z
+bit 3 C 1 *
+bit 2 I 1 IO_B32
+bit 1 O 1 IO_B32 0 1 Z
+bit 0 C 1 *
--- /dev/null
+signal CCLK_AD26
+signal DONE_AC24
+signal GND1
+signal GND2
+signal GND3
+signal GND4
+signal GND5
+signal GND6
+signal GND7
+signal GND8
+signal GND9
+signal GND10
+signal GND11
+signal GND12
+signal GND13
+signal GND14
+signal GND15
+signal GND16
+signal GND17
+signal GND18
+signal GND19
+signal GND20
+signal GND21
+signal GND22
+signal GND23
+signal GND24
+signal GND25
+signal GND26
+signal GND27
+signal GND28
+signal GND29
+signal GND30
+signal GND31
+signal GND32
+signal GND33
+signal GND34
+signal GND35
+signal GND36
+signal GND37
+signal GND38
+signal GND39
+signal GND40
+signal GND41
+signal GND42
+signal GND43
+signal GND44
+signal GND45
+signal GND46
+signal GND47
+signal GND48
+signal GND49
+signal GND50
+signal GND51
+signal GND52
+signal GND53
+signal GND54
+signal GND55
+signal GND56
+signal GND57
+signal GND58
+signal GND59
+signal GND60
+signal GND61
+signal GND62
+signal GND63
+signal GND64
+signal GND65
+signal GND66
+signal GND67
+signal GND68
+signal GND69
+signal GND70
+signal GND71
+signal GND72
+signal GND73
+signal GND74
+signal GND75
+signal GND76
+signal HSWAP_EN_C2
+signal M0_AE3
+signal M1_AC3
+signal M2_AF3
+signal PROG_B
+signal TCK
+signal TDI
+signal TDO
+signal TMS
+signal VCCAUX1
+signal VCCAUX2
+signal VCCAUX3
+signal VCCAUX4
+signal VCCAUX5
+signal VCCAUX6
+signal VCCAUX7
+signal VCCAUX8
+signal VCCAUX9
+signal VCCAUX10
+signal VCCAUX11
+signal VCCAUX12
+signal VCCAUX13
+signal VCCAUX14
+signal VCCAUX15
+signal VCCAUX16
+signal VCCINT1
+signal VCCINT2
+signal VCCINT3
+signal VCCINT4
+signal VCCINT5
+signal VCCINT6
+signal VCCINT7
+signal VCCINT8
+signal VCCINT9
+signal VCCINT10
+signal VCCINT11
+signal VCCINT12
+signal VCCINT13
+signal VCCINT14
+signal VCCINT15
+signal VCCINT16
+signal VCCINT17
+signal VCCINT18
+signal VCCINT19
+signal VCCINT20
+signal VCCO01
+signal VCCO02
+signal VCCO03
+signal VCCO04
+signal VCCO05
+signal VCCO06
+signal VCCO07
+signal VCCO08
+signal VCCO11
+signal VCCO12
+signal VCCO13
+signal VCCO14
+signal VCCO15
+signal VCCO16
+signal VCCO17
+signal VCCO18
+signal VCCO21
+signal VCCO22
+signal VCCO23
+signal VCCO24
+signal VCCO25
+signal VCCO26
+signal VCCO27
+signal VCCO28
+signal VCCO31
+signal VCCO32
+signal VCCO33
+signal VCCO34
+signal VCCO35
+signal VCCO36
+signal VCCO37
+signal VCCO38
+signal VCCO41
+signal VCCO42
+signal VCCO43
+signal VCCO44
+signal VCCO45
+signal VCCO46
+signal VCCO47
+signal VCCO48
+signal VCCO51
+signal VCCO52
+signal VCCO53
+signal VCCO54
+signal VCCO55
+signal VCCO56
+signal VCCO57
+signal VCCO58
+signal VCCO61
+signal VCCO62
+signal VCCO63
+signal VCCO64
+signal VCCO65
+signal VCCO66
+signal VCCO67
+signal VCCO68
+signal VCCO71
+signal VCCO72
+signal VCCO73
+signal VCCO74
+signal VCCO75
+signal VCCO76
+signal VCCO77
+signal VCCO78
+signal IO_A3
+signal IO_A4
+signal IO_A5
+signal IO_A6
+signal IO_A7
+signal IO_A8
+signal IO_A10
+signal IO_A11
+signal IO_A12
+signal IO_A13
+signal IO_A14
+signal IO_A15
+signal IO_A16
+signal IO_A17
+signal IO_A19
+signal IO_A20
+signal IO_A21
+signal IO_A22
+signal IO_A23
+signal IO_B3
+signal IO_B4
+signal IO_B5
+signal IO_B6
+signal IO_B7
+signal IO_B8
+signal IO_B9
+signal IO_B10
+signal IO_B11
+signal IO_B12
+signal IO_B13
+signal IO_B14
+signal IO_B15
+signal IO_B16
+signal IO_B17
+signal IO_B18
+signal IO_B19
+signal IO_B20
+signal IO_B21
+signal IO_B22
+signal IO_B23
+signal IO_C4
+signal IO_C5
+signal IO_C6
+signal IO_C8
+signal IO_C9
+signal IO_C10
+signal IO_C12
+signal IO_C13
+signal IO_C14
+signal IO_C15
+signal IO_C17
+signal IO_C18
+signal IO_C19
+signal IO_C21
+signal IO_C22
+signal IO_C23
+signal IO_C25
+signal IO_C26
+signal IO_D1
+signal IO_D2
+signal IO_D5
+signal IO_D6
+signal IO_D7
+signal IO_D8
+signal IO_D9
+signal IO_D10
+signal IO_D11
+signal IO_D13
+signal IO_D14
+signal IO_D16
+signal IO_D17
+signal IO_D18
+signal IO_D19
+signal IO_D20
+signal IO_D21
+signal IO_D22
+signal IO_D25
+signal IO_D26
+signal IO_E1
+signal IO_E2
+signal IO_E3
+signal IO_E4
+signal IO_E5
+signal IO_E6
+signal IO_E7
+signal IO_E8
+signal IO_E9
+signal IO_E10
+signal IO_E11
+signal IO_E12
+signal IO_E13
+signal IO_E14
+signal IO_E15
+signal IO_E16
+signal IO_E17
+signal IO_E18
+signal IO_E19
+signal IO_E20
+signal IO_E21
+signal IO_E22
+signal IO_E23
+signal IO_E24
+signal IO_E25
+signal IO_E26
+signal IO_F1
+signal IO_F2
+signal IO_F3
+signal IO_F4
+signal IO_F5
+signal IO_F6
+signal IO_F7
+signal IO_F8
+signal IO_F9
+signal IO_F10
+signal IO_F11
+signal IO_F12
+signal IO_F13
+signal IO_F14
+signal IO_F15
+signal IO_F16
+signal IO_F17
+signal IO_F18
+signal IO_F19
+signal IO_F20
+signal IO_F21
+signal IO_F22
+signal IO_F23
+signal IO_F24
+signal IO_F25
+signal IO_F26
+signal IO_G1
+signal IO_G2
+signal IO_G4
+signal IO_G5
+signal IO_G6
+signal IO_G7
+signal IO_G8
+signal IO_G9
+signal IO_G10
+signal IO_G11
+signal IO_G12
+signal IO_G13
+signal IO_G14
+signal IO_G15
+signal IO_G16
+signal IO_G17
+signal IO_G18
+signal IO_G19
+signal IO_G20
+signal IO_G21
+signal IO_G22
+signal IO_G23
+signal IO_G25
+signal IO_G26
+signal IO_H1
+signal IO_H2
+signal IO_H3
+signal IO_H4
+signal IO_H5
+signal IO_H6
+signal IO_H7
+signal IO_H11
+signal IO_H12
+signal IO_H13
+signal IO_H14
+signal IO_H15
+signal IO_H16
+signal IO_H20
+signal IO_H21
+signal IO_H22
+signal IO_H23
+signal IO_H24
+signal IO_H25
+signal IO_H26
+signal IO_J2
+signal IO_J3
+signal IO_J4
+signal IO_J5
+signal IO_J6
+signal IO_J7
+signal IO_J20
+signal IO_J21
+signal IO_J22
+signal IO_J23
+signal IO_J24
+signal IO_J25
+signal IO_K1
+signal IO_K2
+signal IO_K3
+signal IO_K4
+signal IO_K5
+signal IO_K6
+signal IO_K7
+signal IO_K20
+signal IO_K21
+signal IO_K22
+signal IO_K23
+signal IO_K24
+signal IO_K25
+signal IO_K26
+signal IO_L1
+signal IO_L2
+signal IO_L4
+signal IO_L5
+signal IO_L6
+signal IO_L7
+signal IO_L8
+signal IO_L19
+signal IO_L20
+signal IO_L21
+signal IO_L22
+signal IO_L23
+signal IO_L25
+signal IO_L26
+signal IO_M1
+signal IO_M2
+signal IO_M3
+signal IO_M5
+signal IO_M6
+signal IO_M7
+signal IO_M8
+signal IO_M19
+signal IO_M20
+signal IO_M21
+signal IO_M22
+signal IO_M24
+signal IO_M25
+signal IO_M26
+signal IO_N1
+signal IO_N2
+signal IO_N3
+signal IO_N4
+signal IO_N5
+signal IO_N6
+signal IO_N7
+signal IO_N8
+signal IO_N19
+signal IO_N20
+signal IO_N21
+signal IO_N22
+signal IO_N23
+signal IO_N24
+signal IO_N25
+signal IO_N26
+signal IO_P1
+signal IO_P2
+signal IO_P3
+signal IO_P4
+signal IO_P5
+signal IO_P6
+signal IO_P7
+signal IO_P8
+signal IO_P19
+signal IO_P20
+signal IO_P21
+signal IO_P22
+signal IO_P23
+signal IO_P24
+signal IO_P25
+signal IO_P26
+signal IO_R1
+signal IO_R2
+signal IO_R3
+signal IO_R5
+signal IO_R6
+signal IO_R7
+signal IO_R8
+signal IO_R19
+signal IO_R20
+signal IO_R21
+signal IO_R22
+signal IO_R24
+signal IO_R25
+signal IO_R26
+signal IO_T1
+signal IO_T2
+signal IO_T4
+signal IO_T5
+signal IO_T6
+signal IO_T7
+signal IO_T8
+signal IO_T19
+signal IO_T20
+signal IO_T21
+signal IO_T22
+signal IO_T23
+signal IO_T25
+signal IO_T26
+signal IO_U1
+signal IO_U2
+signal IO_U3
+signal IO_U4
+signal IO_U5
+signal IO_U6
+signal IO_U7
+signal IO_U20
+signal IO_U21
+signal IO_U22
+signal IO_U23
+signal IO_U24
+signal IO_U25
+signal IO_U26
+signal IO_V2
+signal IO_V3
+signal IO_V4
+signal IO_V5
+signal IO_V6
+signal IO_V7
+signal IO_V20
+signal IO_V21
+signal IO_V22
+signal IO_V23
+signal IO_V24
+signal IO_V25
+signal IO_W1
+signal IO_W2
+signal IO_W3
+signal IO_W4
+signal IO_W5
+signal IO_W6
+signal IO_W7
+signal IO_W11
+signal IO_W12
+signal IO_W13
+signal IO_W14
+signal IO_W15
+signal IO_W16
+signal IO_W20
+signal IO_W21
+signal IO_W22
+signal IO_W23
+signal IO_W24
+signal IO_W25
+signal IO_W26
+signal IO_Y1
+signal IO_Y2
+signal IO_Y4
+signal IO_Y5
+signal IO_Y6
+signal IO_Y7
+signal IO_Y8
+signal IO_Y9
+signal IO_Y10
+signal IO_Y11
+signal IO_Y12
+signal IO_Y13
+signal IO_Y14
+signal IO_Y15
+signal IO_Y16
+signal IO_Y17
+signal IO_Y18
+signal IO_Y19
+signal IO_Y20
+signal IO_Y21
+signal IO_Y22
+signal IO_Y23
+signal IO_Y25
+signal IO_Y26
+signal IO_AA1
+signal IO_AA2
+signal IO_AA3
+signal IO_AA4
+signal IO_AA5
+signal IO_AA6
+signal IO_AA7
+signal IO_AA8
+signal IO_AA9
+signal IO_AA10
+signal IO_AA11
+signal IO_AA12
+signal IO_AA13
+signal IO_AA14
+signal IO_AA15
+signal IO_AA16
+signal IO_AA17
+signal IO_AA18
+signal IO_AA19
+signal IO_AA20
+signal IO_AA21
+signal IO_AA22
+signal IO_AA23
+signal IO_AA24
+signal IO_AA25
+signal IO_AA26
+signal IO_AB1
+signal IO_AB2
+signal IO_AB3
+signal IO_AB4
+signal IO_AB5
+signal IO_AB6
+signal IO_AB7
+signal IO_AB8
+signal IO_AB9
+signal IO_AB10
+signal IO_AB11
+signal IO_AB12
+signal IO_AB13
+signal IO_AB14
+signal IO_AB15
+signal IO_AB16
+signal IO_AB17
+signal IO_AB18
+signal IO_AB19
+signal IO_AB20
+signal IO_AB21
+signal IO_AB22
+signal IO_AB23
+signal IO_AB24
+signal IO_AB25
+signal IO_AB26
+signal IO_AC1
+signal IO_AC2
+signal IO_AC5
+signal IO_AC6
+signal IO_AC7
+signal IO_AC8
+signal IO_AC9
+signal IO_AC10
+signal IO_AC11
+signal IO_AC13
+signal IO_AC14
+signal IO_AC16
+signal IO_AC17
+signal IO_AC18
+signal IO_AC19
+signal IO_AC20
+signal IO_AC21
+signal IO_AC22
+signal IO_AC25
+signal IO_AC26
+signal IO_AD1
+signal IO_AD2
+signal IO_AD4
+signal IO_AD5
+signal IO_AD6
+signal IO_AD8
+signal IO_AD9
+signal IO_AD10
+signal IO_AD12
+signal IO_AD13
+signal IO_AD14
+signal IO_AD15
+signal IO_AD17
+signal IO_AD18
+signal IO_AD19
+signal IO_AD21
+signal IO_AD22
+signal IO_AD23
+signal IO_AD25
+signal IO_AE4
+signal IO_AE5
+signal IO_AE6
+signal IO_AE7
+signal IO_AE8
+signal IO_AE9
+signal IO_AE10
+signal IO_AE11
+signal IO_AE12
+signal IO_AE13
+signal IO_AE14
+signal IO_AE15
+signal IO_AE16
+signal IO_AE17
+signal IO_AE18
+signal IO_AE19
+signal IO_AE20
+signal IO_AE21
+signal IO_AE22
+signal IO_AE23
+signal IO_AE24
+signal IO_AF4
+signal IO_AF5
+signal IO_AF6
+signal IO_AF7
+signal IO_AF8
+signal IO_AF10
+signal IO_AF11
+signal IO_AF12
+signal IO_AF13
+signal IO_AF14
+signal IO_AF15
+signal IO_AF16
+signal IO_AF17
+signal IO_AF19
+signal IO_AF20
+signal IO_AF21
+signal IO_AF22
+signal IO_AF23
+
+register BSR 2243
+register BR 1
+register DIR 32
+
+instruction length 6
+
+instruction EXTEST 000000 BSR
+instruction SAMPLE/PRELOAD 000001 BSR
+instruction IDCODE 001001 DIR
+instruction BYPASS 111111 BR
+
+bit 2242 I 1 IO_C25
+bit 2241 O 1 IO_C25 2240 1 Z
+bit 2240 C 1 *
+bit 2239 I 1 IO_C26
+bit 2238 O 1 IO_C26 2237 1 Z
+bit 2237 C 1 *
+bit 2236 I 1 IO_E23
+bit 2235 O 1 IO_E23 2234 1 Z
+bit 2234 C 1 *
+bit 2233 I 1 IO_E24
+bit 2232 O 1 IO_E24 2231 1 Z
+bit 2231 C 1 *
+bit 2230 I 1 IO_D25
+bit 2229 O 1 IO_D25 2228 1 Z
+bit 2228 C 1 *
+bit 2227 I 1 IO_D26
+bit 2226 O 1 IO_D26 2225 1 Z
+bit 2225 C 1 *
+bit 2224 I 1 IO_F22
+bit 2223 O 1 IO_F22 2222 1 Z
+bit 2222 C 1 *
+bit 2221 O 1 *
+bit 2220 O 1 *
+bit 2219 O 1 *
+bit 2218 O 1 *
+bit 2217 O 1 *
+bit 2216 O 1 *
+bit 2215 O 1 *
+bit 2214 O 1 *
+bit 2213 O 1 *
+bit 2212 I 1 IO_E25
+bit 2211 O 1 IO_E25 2210 1 Z
+bit 2210 C 1 *
+bit 2209 I 1 IO_E26
+bit 2208 O 1 IO_E26 2207 1 Z
+bit 2207 C 1 *
+bit 2206 O 1 *
+bit 2205 O 1 *
+bit 2204 O 1 *
+bit 2203 O 1 *
+bit 2202 O 1 *
+bit 2201 O 1 *
+bit 2200 O 1 *
+bit 2199 O 1 *
+bit 2198 O 1 *
+bit 2197 O 1 *
+bit 2196 O 1 *
+bit 2195 O 1 *
+bit 2194 I 1 IO_G20
+bit 2193 O 1 IO_G20 2192 1 Z
+bit 2192 C 1 *
+bit 2191 I 1 IO_G21
+bit 2190 O 1 IO_G21 2189 1 Z
+bit 2189 C 1 *
+bit 2188 I 1 IO_F23
+bit 2187 O 1 IO_F23 2186 1 Z
+bit 2186 C 1 *
+bit 2185 I 1 IO_F24
+bit 2184 O 1 IO_F24 2183 1 Z
+bit 2183 C 1 *
+bit 2182 I 1 IO_G22
+bit 2181 O 1 IO_G22 2180 1 Z
+bit 2180 C 1 *
+bit 2179 I 1 IO_G23
+bit 2178 O 1 IO_G23 2177 1 Z
+bit 2177 C 1 *
+bit 2176 I 1 IO_F25
+bit 2175 O 1 IO_F25 2174 1 Z
+bit 2174 C 1 *
+bit 2173 I 1 IO_F26
+bit 2172 O 1 IO_F26 2171 1 Z
+bit 2171 C 1 *
+bit 2170 I 1 IO_G25
+bit 2169 O 1 IO_G25 2168 1 Z
+bit 2168 C 1 *
+bit 2167 I 1 IO_G26
+bit 2166 O 1 IO_G26 2165 1 Z
+bit 2165 C 1 *
+bit 2164 I 1 IO_H20
+bit 2163 O 1 IO_H20 2162 1 Z
+bit 2162 C 1 *
+bit 2161 I 1 IO_H21
+bit 2160 O 1 IO_H21 2159 1 Z
+bit 2159 C 1 *
+bit 2158 I 1 IO_H22
+bit 2157 O 1 IO_H22 2156 1 Z
+bit 2156 C 1 *
+bit 2155 I 1 IO_J21
+bit 2154 O 1 IO_J21 2153 1 Z
+bit 2153 C 1 *
+bit 2152 I 1 IO_H23
+bit 2151 O 1 IO_H23 2150 1 Z
+bit 2150 C 1 *
+bit 2149 I 1 IO_H24
+bit 2148 O 1 IO_H24 2147 1 Z
+bit 2147 C 1 *
+bit 2146 O 1 *
+bit 2145 O 1 *
+bit 2144 O 1 *
+bit 2143 O 1 *
+bit 2142 O 1 *
+bit 2141 O 1 *
+bit 2140 O 1 *
+bit 2139 O 1 *
+bit 2138 O 1 *
+bit 2137 O 1 *
+bit 2136 O 1 *
+bit 2135 O 1 *
+bit 2134 O 1 *
+bit 2133 O 1 *
+bit 2132 O 1 *
+bit 2131 O 1 *
+bit 2130 O 1 *
+bit 2129 O 1 *
+bit 2128 O 1 *
+bit 2127 O 1 *
+bit 2126 O 1 *
+bit 2125 O 1 *
+bit 2124 O 1 *
+bit 2123 O 1 *
+bit 2122 O 1 *
+bit 2121 O 1 *
+bit 2120 O 1 *
+bit 2119 O 1 *
+bit 2118 O 1 *
+bit 2117 O 1 *
+bit 2116 O 1 *
+bit 2115 O 1 *
+bit 2114 O 1 *
+bit 2113 O 1 *
+bit 2112 O 1 *
+bit 2111 O 1 *
+bit 2110 O 1 *
+bit 2109 O 1 *
+bit 2108 O 1 *
+bit 2107 O 1 *
+bit 2106 O 1 *
+bit 2105 O 1 *
+bit 2104 I 1 IO_H25
+bit 2103 O 1 IO_H25 2102 1 Z
+bit 2102 C 1 *
+bit 2101 I 1 IO_H26
+bit 2100 O 1 IO_H26 2099 1 Z
+bit 2099 C 1 *
+bit 2098 I 1 IO_J20
+bit 2097 O 1 IO_J20 2096 1 Z
+bit 2096 C 1 *
+bit 2095 I 1 IO_K20
+bit 2094 O 1 IO_K20 2093 1 Z
+bit 2093 C 1 *
+bit 2092 O 1 *
+bit 2091 O 1 *
+bit 2090 O 1 *
+bit 2089 O 1 *
+bit 2088 O 1 *
+bit 2087 O 1 *
+bit 2086 I 1 IO_J22
+bit 2085 O 1 IO_J22 2084 1 Z
+bit 2084 C 1 *
+bit 2083 I 1 IO_J23
+bit 2082 O 1 IO_J23 2081 1 Z
+bit 2081 C 1 *
+bit 2080 I 1 IO_J24
+bit 2079 O 1 IO_J24 2078 1 Z
+bit 2078 C 1 *
+bit 2077 I 1 IO_J25
+bit 2076 O 1 IO_J25 2075 1 Z
+bit 2075 C 1 *
+bit 2074 I 1 IO_K21
+bit 2073 O 1 IO_K21 2072 1 Z
+bit 2072 C 1 *
+bit 2071 I 1 IO_K22
+bit 2070 O 1 IO_K22 2069 1 Z
+bit 2069 C 1 *
+bit 2068 I 1 IO_K23
+bit 2067 O 1 IO_K23 2066 1 Z
+bit 2066 C 1 *
+bit 2065 I 1 IO_K24
+bit 2064 O 1 IO_K24 2063 1 Z
+bit 2063 C 1 *
+bit 2062 O 1 *
+bit 2061 O 1 *
+bit 2060 O 1 *
+bit 2059 O 1 *
+bit 2058 O 1 *
+bit 2057 O 1 *
+bit 2056 O 1 *
+bit 2055 O 1 *
+bit 2054 O 1 *
+bit 2053 O 1 *
+bit 2052 O 1 *
+bit 2051 O 1 *
+bit 2050 I 1 IO_K25
+bit 2049 O 1 IO_K25 2048 1 Z
+bit 2048 C 1 *
+bit 2047 I 1 IO_K26
+bit 2046 O 1 IO_K26 2045 1 Z
+bit 2045 C 1 *
+bit 2044 I 1 IO_L19
+bit 2043 O 1 IO_L19 2042 1 Z
+bit 2042 C 1 *
+bit 2041 I 1 IO_L20
+bit 2040 O 1 IO_L20 2039 1 Z
+bit 2039 C 1 *
+bit 2038 I 1 IO_L21
+bit 2037 O 1 IO_L21 2036 1 Z
+bit 2036 C 1 *
+bit 2035 I 1 IO_L22
+bit 2034 O 1 IO_L22 2033 1 Z
+bit 2033 C 1 *
+bit 2032 I 1 IO_L25
+bit 2031 O 1 IO_L25 2030 1 Z
+bit 2030 C 1 *
+bit 2029 I 1 IO_L26
+bit 2028 O 1 IO_L26 2027 1 Z
+bit 2027 C 1 *
+bit 2026 O 1 *
+bit 2025 O 1 *
+bit 2024 O 1 *
+bit 2023 O 1 *
+bit 2022 O 1 *
+bit 2021 O 1 *
+bit 2020 I 1 IO_M19
+bit 2019 O 1 IO_M19 2018 1 Z
+bit 2018 C 1 *
+bit 2017 I 1 IO_M20
+bit 2016 O 1 IO_M20 2015 1 Z
+bit 2015 C 1 *
+bit 2014 I 1 IO_M21
+bit 2013 O 1 IO_M21 2012 1 Z
+bit 2012 C 1 *
+bit 2011 I 1 IO_M22
+bit 2010 O 1 IO_M22 2009 1 Z
+bit 2009 C 1 *
+bit 2008 I 1 IO_L23
+bit 2007 O 1 IO_L23 2006 1 Z
+bit 2006 C 1 *
+bit 2005 I 1 IO_M24
+bit 2004 O 1 IO_M24 2003 1 Z
+bit 2003 C 1 *
+bit 2002 I 1 IO_M25
+bit 2001 O 1 IO_M25 2000 1 Z
+bit 2000 C 1 *
+bit 1999 I 1 IO_M26
+bit 1998 O 1 IO_M26 1997 1 Z
+bit 1997 C 1 *
+bit 1996 I 1 IO_N19
+bit 1995 O 1 IO_N19 1994 1 Z
+bit 1994 C 1 *
+bit 1993 I 1 IO_N20
+bit 1992 O 1 IO_N20 1991 1 Z
+bit 1991 C 1 *
+bit 1990 O 1 *
+bit 1989 O 1 *
+bit 1988 O 1 *
+bit 1987 O 1 *
+bit 1986 O 1 *
+bit 1985 O 1 *
+bit 1984 O 1 *
+bit 1983 O 1 *
+bit 1982 O 1 *
+bit 1981 O 1 *
+bit 1980 O 1 *
+bit 1979 O 1 *
+bit 1978 O 1 *
+bit 1977 O 1 *
+bit 1976 O 1 *
+bit 1975 O 1 *
+bit 1974 O 1 *
+bit 1973 O 1 *
+bit 1972 I 1 IO_N21
+bit 1971 O 1 IO_N21 1970 1 Z
+bit 1970 C 1 *
+bit 1969 I 1 IO_N22
+bit 1968 O 1 IO_N22 1967 1 Z
+bit 1967 C 1 *
+bit 1966 I 1 IO_N23
+bit 1965 O 1 IO_N23 1964 1 Z
+bit 1964 C 1 *
+bit 1963 I 1 IO_N24
+bit 1962 O 1 IO_N24 1961 1 Z
+bit 1961 C 1 *
+bit 1960 I 1 IO_N25
+bit 1959 O 1 IO_N25 1958 1 Z
+bit 1958 C 1 *
+bit 1957 I 1 IO_N26
+bit 1956 O 1 IO_N26 1955 1 Z
+bit 1955 C 1 *
+bit 1954 I 1 IO_P26
+bit 1953 O 1 IO_P26 1952 1 Z
+bit 1952 C 1 *
+bit 1951 I 1 IO_P25
+bit 1950 O 1 IO_P25 1949 1 Z
+bit 1949 C 1 *
+bit 1948 I 1 IO_P24
+bit 1947 O 1 IO_P24 1946 1 Z
+bit 1946 C 1 *
+bit 1945 I 1 IO_P23
+bit 1944 O 1 IO_P23 1943 1 Z
+bit 1943 C 1 *
+bit 1942 I 1 IO_P22
+bit 1941 O 1 IO_P22 1940 1 Z
+bit 1940 C 1 *
+bit 1939 I 1 IO_P21
+bit 1938 O 1 IO_P21 1937 1 Z
+bit 1937 C 1 *
+bit 1936 O 1 *
+bit 1935 O 1 *
+bit 1934 O 1 *
+bit 1933 O 1 *
+bit 1932 O 1 *
+bit 1931 O 1 *
+bit 1930 O 1 *
+bit 1929 O 1 *
+bit 1928 O 1 *
+bit 1927 O 1 *
+bit 1926 O 1 *
+bit 1925 O 1 *
+bit 1924 O 1 *
+bit 1923 O 1 *
+bit 1922 O 1 *
+bit 1921 O 1 *
+bit 1920 O 1 *
+bit 1919 O 1 *
+bit 1918 I 1 IO_P20
+bit 1917 O 1 IO_P20 1916 1 Z
+bit 1916 C 1 *
+bit 1915 I 1 IO_P19
+bit 1914 O 1 IO_P19 1913 1 Z
+bit 1913 C 1 *
+bit 1912 I 1 IO_R26
+bit 1911 O 1 IO_R26 1910 1 Z
+bit 1910 C 1 *
+bit 1909 I 1 IO_R25
+bit 1908 O 1 IO_R25 1907 1 Z
+bit 1907 C 1 *
+bit 1906 I 1 IO_R24
+bit 1905 O 1 IO_R24 1904 1 Z
+bit 1904 C 1 *
+bit 1903 I 1 IO_T23
+bit 1902 O 1 IO_T23 1901 1 Z
+bit 1901 C 1 *
+bit 1900 I 1 IO_R22
+bit 1899 O 1 IO_R22 1898 1 Z
+bit 1898 C 1 *
+bit 1897 I 1 IO_R21
+bit 1896 O 1 IO_R21 1895 1 Z
+bit 1895 C 1 *
+bit 1894 I 1 IO_R20
+bit 1893 O 1 IO_R20 1892 1 Z
+bit 1892 C 1 *
+bit 1891 I 1 IO_R19
+bit 1890 O 1 IO_R19 1889 1 Z
+bit 1889 C 1 *
+bit 1888 O 1 *
+bit 1887 O 1 *
+bit 1886 O 1 *
+bit 1885 O 1 *
+bit 1884 O 1 *
+bit 1883 O 1 *
+bit 1882 O 1 *
+bit 1881 O 1 *
+bit 1880 O 1 *
+bit 1879 O 1 *
+bit 1878 O 1 *
+bit 1877 O 1 *
+bit 1876 I 1 IO_T26
+bit 1875 O 1 IO_T26 1874 1 Z
+bit 1874 C 1 *
+bit 1873 I 1 IO_T25
+bit 1872 O 1 IO_T25 1871 1 Z
+bit 1871 C 1 *
+bit 1870 I 1 IO_T22
+bit 1869 O 1 IO_T22 1868 1 Z
+bit 1868 C 1 *
+bit 1867 I 1 IO_T21
+bit 1866 O 1 IO_T21 1865 1 Z
+bit 1865 C 1 *
+bit 1864 I 1 IO_T20
+bit 1863 O 1 IO_T20 1862 1 Z
+bit 1862 C 1 *
+bit 1861 I 1 IO_T19
+bit 1860 O 1 IO_T19 1859 1 Z
+bit 1859 C 1 *
+bit 1858 I 1 IO_U26
+bit 1857 O 1 IO_U26 1856 1 Z
+bit 1856 C 1 *
+bit 1855 I 1 IO_U25
+bit 1854 O 1 IO_U25 1853 1 Z
+bit 1853 C 1 *
+bit 1852 O 1 *
+bit 1851 O 1 *
+bit 1850 O 1 *
+bit 1849 O 1 *
+bit 1848 O 1 *
+bit 1847 O 1 *
+bit 1846 O 1 *
+bit 1845 O 1 *
+bit 1844 O 1 *
+bit 1843 O 1 *
+bit 1842 O 1 *
+bit 1841 O 1 *
+bit 1840 O 1 *
+bit 1839 O 1 *
+bit 1838 O 1 *
+bit 1837 O 1 *
+bit 1836 O 1 *
+bit 1835 O 1 *
+bit 1834 O 1 *
+bit 1833 O 1 *
+bit 1832 O 1 *
+bit 1831 O 1 *
+bit 1830 O 1 *
+bit 1829 O 1 *
+bit 1828 I 1 IO_U24
+bit 1827 O 1 IO_U24 1826 1 Z
+bit 1826 C 1 *
+bit 1825 I 1 IO_U23
+bit 1824 O 1 IO_U23 1823 1 Z
+bit 1823 C 1 *
+bit 1822 O 1 *
+bit 1821 O 1 *
+bit 1820 O 1 *
+bit 1819 O 1 *
+bit 1818 O 1 *
+bit 1817 O 1 *
+bit 1816 I 1 IO_U22
+bit 1815 O 1 IO_U22 1814 1 Z
+bit 1814 C 1 *
+bit 1813 I 1 IO_U21
+bit 1812 O 1 IO_U21 1811 1 Z
+bit 1811 C 1 *
+bit 1810 I 1 IO_V25
+bit 1809 O 1 IO_V25 1808 1 Z
+bit 1808 C 1 *
+bit 1807 I 1 IO_V24
+bit 1806 O 1 IO_V24 1805 1 Z
+bit 1805 C 1 *
+bit 1804 I 1 IO_V23
+bit 1803 O 1 IO_V23 1802 1 Z
+bit 1802 C 1 *
+bit 1801 I 1 IO_V22
+bit 1800 O 1 IO_V22 1799 1 Z
+bit 1799 C 1 *
+bit 1798 I 1 IO_U20
+bit 1797 O 1 IO_U20 1796 1 Z
+bit 1796 C 1 *
+bit 1795 I 1 IO_V20
+bit 1794 O 1 IO_V20 1793 1 Z
+bit 1793 C 1 *
+bit 1792 I 1 IO_W26
+bit 1791 O 1 IO_W26 1790 1 Z
+bit 1790 C 1 *
+bit 1789 I 1 IO_W25
+bit 1788 O 1 IO_W25 1787 1 Z
+bit 1787 C 1 *
+bit 1786 O 1 *
+bit 1785 O 1 *
+bit 1784 O 1 *
+bit 1783 O 1 *
+bit 1782 O 1 *
+bit 1781 O 1 *
+bit 1780 I 1 IO_W24
+bit 1779 O 1 IO_W24 1778 1 Z
+bit 1778 C 1 *
+bit 1777 I 1 IO_W23
+bit 1776 O 1 IO_W23 1775 1 Z
+bit 1775 C 1 *
+bit 1774 I 1 IO_V21
+bit 1773 O 1 IO_V21 1772 1 Z
+bit 1772 C 1 *
+bit 1771 I 1 IO_W22
+bit 1770 O 1 IO_W22 1769 1 Z
+bit 1769 C 1 *
+bit 1768 O 1 *
+bit 1767 O 1 *
+bit 1766 O 1 *
+bit 1765 O 1 *
+bit 1764 O 1 *
+bit 1763 O 1 *
+bit 1762 I 1 IO_Y26
+bit 1761 O 1 IO_Y26 1760 1 Z
+bit 1760 C 1 *
+bit 1759 I 1 IO_Y25
+bit 1758 O 1 IO_Y25 1757 1 Z
+bit 1757 C 1 *
+bit 1756 O 1 *
+bit 1755 O 1 *
+bit 1754 O 1 *
+bit 1753 O 1 *
+bit 1752 O 1 *
+bit 1751 O 1 *
+bit 1750 O 1 *
+bit 1749 O 1 *
+bit 1748 O 1 *
+bit 1747 O 1 *
+bit 1746 O 1 *
+bit 1745 O 1 *
+bit 1744 O 1 *
+bit 1743 O 1 *
+bit 1742 O 1 *
+bit 1741 O 1 *
+bit 1740 O 1 *
+bit 1739 O 1 *
+bit 1738 I 1 IO_W21
+bit 1737 O 1 IO_W21 1736 1 Z
+bit 1736 C 1 *
+bit 1735 I 1 IO_W20
+bit 1734 O 1 IO_W20 1733 1 Z
+bit 1733 C 1 *
+bit 1732 I 1 IO_AA26
+bit 1731 O 1 IO_AA26 1730 1 Z
+bit 1730 C 1 *
+bit 1729 I 1 IO_AA25
+bit 1728 O 1 IO_AA25 1727 1 Z
+bit 1727 C 1 *
+bit 1726 I 1 IO_Y23
+bit 1725 O 1 IO_Y23 1724 1 Z
+bit 1724 C 1 *
+bit 1723 I 1 IO_Y22
+bit 1722 O 1 IO_Y22 1721 1 Z
+bit 1721 C 1 *
+bit 1720 I 1 IO_AA24
+bit 1719 O 1 IO_AA24 1718 1 Z
+bit 1718 C 1 *
+bit 1717 I 1 IO_AA23
+bit 1716 O 1 IO_AA23 1715 1 Z
+bit 1715 C 1 *
+bit 1714 O 1 *
+bit 1713 O 1 *
+bit 1712 O 1 *
+bit 1711 O 1 *
+bit 1710 O 1 *
+bit 1709 O 1 *
+bit 1708 O 1 *
+bit 1707 O 1 *
+bit 1706 O 1 *
+bit 1705 O 1 *
+bit 1704 O 1 *
+bit 1703 O 1 *
+bit 1702 I 1 IO_AB26
+bit 1701 O 1 IO_AB26 1700 1 Z
+bit 1700 C 1 *
+bit 1699 I 1 IO_AB25
+bit 1698 O 1 IO_AB25 1697 1 Z
+bit 1697 C 1 *
+bit 1696 I 1 IO_Y21
+bit 1695 O 1 IO_Y21 1694 1 Z
+bit 1694 C 1 *
+bit 1693 I 1 IO_Y20
+bit 1692 O 1 IO_Y20 1691 1 Z
+bit 1691 C 1 *
+bit 1690 O 1 *
+bit 1689 O 1 *
+bit 1688 O 1 *
+bit 1687 O 1 *
+bit 1686 O 1 *
+bit 1685 O 1 *
+bit 1684 I 1 IO_AC26
+bit 1683 O 1 IO_AC26 1682 1 Z
+bit 1682 C 1 *
+bit 1681 I 1 IO_AC25
+bit 1680 O 1 IO_AC25 1679 1 Z
+bit 1679 C 1 *
+bit 1678 I 1 IO_AB24
+bit 1677 O 1 IO_AB24 1676 1 Z
+bit 1676 C 1 *
+bit 1675 I 1 IO_AB23
+bit 1674 O 1 IO_AB23 1673 1 Z
+bit 1673 C 1 *
+bit 1672 I 1 IO_AA22
+bit 1671 O 1 IO_AA22 1670 1 Z
+bit 1670 C 1 *
+bit 1669 I 1 IO_AA21
+bit 1668 O 1 IO_AA21 1667 1 Z
+bit 1667 C 1 *
+bit 1666 I 1 CCLK_AD26
+bit 1665 O 1 CCLK_AD26 1664 1 Z
+bit 1664 C 1 *
+bit 1663 I 1 DONE_AC24
+bit 1662 O 1 DONE_AC24 1661 1 Z
+bit 1661 C 1 *
+bit 1660 I 1 IO_AD25
+bit 1659 O 1 IO_AD25 1658 1 Z
+bit 1658 C 1 *
+bit 1657 I 1 IO_AB22
+bit 1656 O 1 IO_AB22 1655 1 Z
+bit 1655 C 1 *
+bit 1654 I 1 IO_AC22
+bit 1653 O 1 IO_AC22 1652 1 Z
+bit 1652 C 1 *
+bit 1651 O 1 *
+bit 1650 O 1 *
+bit 1649 O 1 *
+bit 1648 O 1 *
+bit 1647 O 1 *
+bit 1646 O 1 *
+bit 1645 O 1 *
+bit 1644 O 1 *
+bit 1643 O 1 *
+bit 1642 O 1 *
+bit 1641 O 1 *
+bit 1640 O 1 *
+bit 1639 O 1 *
+bit 1638 O 1 *
+bit 1637 O 1 *
+bit 1636 O 1 *
+bit 1635 O 1 *
+bit 1634 O 1 *
+bit 1633 O 1 *
+bit 1632 O 1 *
+bit 1631 O 1 *
+bit 1630 O 1 *
+bit 1629 O 1 *
+bit 1628 O 1 *
+bit 1627 O 1 *
+bit 1626 O 1 *
+bit 1625 O 1 *
+bit 1624 O 1 *
+bit 1623 O 1 *
+bit 1622 O 1 *
+bit 1621 O 1 *
+bit 1620 O 1 *
+bit 1619 O 1 *
+bit 1618 O 1 *
+bit 1617 O 1 *
+bit 1616 O 1 *
+bit 1615 O 1 *
+bit 1614 O 1 *
+bit 1613 O 1 *
+bit 1612 O 1 *
+bit 1611 O 1 *
+bit 1610 O 1 *
+bit 1609 O 1 *
+bit 1608 O 1 *
+bit 1607 O 1 *
+bit 1606 I 1 IO_AE24
+bit 1605 O 1 IO_AE24 1604 1 Z
+bit 1604 C 1 *
+bit 1603 I 1 IO_AF24
+bit 1602 O 1 IO_AF24 1601 1 Z
+bit 1601 C 1 *
+bit 1600 I 1 IO_AD23
+bit 1599 O 1 IO_AD23 1598 1 Z
+bit 1598 C 1 *
+bit 1597 I 1 IO_AE23
+bit 1596 O 1 IO_AE23 1595 1 Z
+bit 1595 C 1 *
+bit 1594 I 1 IO_AF23
+bit 1593 O 1 IO_AF23 1592 1 Z
+bit 1592 C 1 *
+bit 1591 I 1 IO_AD22
+bit 1590 O 1 IO_AD22 1589 1 Z
+bit 1589 C 1 *
+bit 1588 I 1 IO_AE22
+bit 1587 O 1 IO_AE22 1586 1 Z
+bit 1586 C 1 *
+bit 1585 I 1 IO_AF22
+bit 1584 O 1 IO_AF22 1583 1 Z
+bit 1583 C 1 *
+bit 1582 I 1 IO_AB21
+bit 1581 O 1 IO_AB21 1580 1 Z
+bit 1580 C 1 *
+bit 1579 I 1 IO_AC21
+bit 1578 O 1 IO_AC21 1577 1 Z
+bit 1577 C 1 *
+bit 1576 I 1 IO_AD21
+bit 1575 O 1 IO_AD21 1574 1 Z
+bit 1574 C 1 *
+bit 1573 I 1 IO_AE21
+bit 1572 O 1 IO_AE21 1571 1 Z
+bit 1571 C 1 *
+bit 1570 I 1 IO_AF21
+bit 1569 O 1 IO_AF21 1568 1 Z
+bit 1568 C 1 *
+bit 1567 I 1 IO_AB20
+bit 1566 O 1 IO_AB20 1565 1 Z
+bit 1565 C 1 *
+bit 1564 I 1 IO_AC20
+bit 1563 O 1 IO_AC20 1562 1 Z
+bit 1562 C 1 *
+bit 1561 I 1 IO_AE20
+bit 1560 O 1 IO_AE20 1559 1 Z
+bit 1559 C 1 *
+bit 1558 I 1 IO_AF20
+bit 1557 O 1 IO_AF20 1556 1 Z
+bit 1556 C 1 *
+bit 1555 I 1 IO_AA20
+bit 1554 O 1 IO_AA20 1553 1 Z
+bit 1553 C 1 *
+bit 1552 I 1 IO_Y19
+bit 1551 O 1 IO_Y19 1550 1 Z
+bit 1550 C 1 *
+bit 1549 I 1 IO_AA19
+bit 1548 O 1 IO_AA19 1547 1 Z
+bit 1547 C 1 *
+bit 1546 I 1 IO_AB19
+bit 1545 O 1 IO_AB19 1544 1 Z
+bit 1544 C 1 *
+bit 1543 I 1 IO_AC19
+bit 1542 O 1 IO_AC19 1541 1 Z
+bit 1541 C 1 *
+bit 1540 O 1 *
+bit 1539 O 1 *
+bit 1538 O 1 *
+bit 1537 O 1 *
+bit 1536 O 1 *
+bit 1535 O 1 *
+bit 1534 O 1 *
+bit 1533 O 1 *
+bit 1532 O 1 *
+bit 1531 O 1 *
+bit 1530 O 1 *
+bit 1529 O 1 *
+bit 1528 O 1 *
+bit 1527 O 1 *
+bit 1526 O 1 *
+bit 1525 I 1 IO_AD19
+bit 1524 O 1 IO_AD19 1523 1 Z
+bit 1523 C 1 *
+bit 1522 I 1 IO_AE19
+bit 1521 O 1 IO_AE19 1520 1 Z
+bit 1520 C 1 *
+bit 1519 I 1 IO_AF19
+bit 1518 O 1 IO_AF19 1517 1 Z
+bit 1517 C 1 *
+bit 1516 I 1 IO_Y18
+bit 1515 O 1 IO_Y18 1514 1 Z
+bit 1514 C 1 *
+bit 1513 I 1 IO_AA18
+bit 1512 O 1 IO_AA18 1511 1 Z
+bit 1511 C 1 *
+bit 1510 O 1 *
+bit 1509 O 1 *
+bit 1508 O 1 *
+bit 1507 I 1 IO_AB18
+bit 1506 O 1 IO_AB18 1505 1 Z
+bit 1505 C 1 *
+bit 1504 I 1 IO_AC18
+bit 1503 O 1 IO_AC18 1502 1 Z
+bit 1502 C 1 *
+bit 1501 I 1 IO_AD18
+bit 1500 O 1 IO_AD18 1499 1 Z
+bit 1499 C 1 *
+bit 1498 I 1 IO_AE18
+bit 1497 O 1 IO_AE18 1496 1 Z
+bit 1496 C 1 *
+bit 1495 I 1 IO_Y17
+bit 1494 O 1 IO_Y17 1493 1 Z
+bit 1493 C 1 *
+bit 1492 I 1 IO_AC17
+bit 1491 O 1 IO_AC17 1490 1 Z
+bit 1490 C 1 *
+bit 1489 I 1 IO_AA17
+bit 1488 O 1 IO_AA17 1487 1 Z
+bit 1487 C 1 *
+bit 1486 O 1 *
+bit 1485 O 1 *
+bit 1484 O 1 *
+bit 1483 O 1 *
+bit 1482 O 1 *
+bit 1481 O 1 *
+bit 1480 O 1 *
+bit 1479 O 1 *
+bit 1478 O 1 *
+bit 1477 O 1 *
+bit 1476 O 1 *
+bit 1475 O 1 *
+bit 1474 O 1 *
+bit 1473 O 1 *
+bit 1472 O 1 *
+bit 1471 I 1 IO_AD17
+bit 1470 O 1 IO_AD17 1469 1 Z
+bit 1469 C 1 *
+bit 1468 I 1 IO_AB17
+bit 1467 O 1 IO_AB17 1466 1 Z
+bit 1466 C 1 *
+bit 1465 I 1 IO_W16
+bit 1464 O 1 IO_W16 1463 1 Z
+bit 1463 C 1 *
+bit 1462 I 1 IO_AE17
+bit 1461 O 1 IO_AE17 1460 1 Z
+bit 1460 C 1 *
+bit 1459 I 1 IO_AF17
+bit 1458 O 1 IO_AF17 1457 1 Z
+bit 1457 C 1 *
+bit 1456 I 1 IO_Y16
+bit 1455 O 1 IO_Y16 1454 1 Z
+bit 1454 C 1 *
+bit 1453 I 1 IO_AA16
+bit 1452 O 1 IO_AA16 1451 1 Z
+bit 1451 C 1 *
+bit 1450 O 1 *
+bit 1449 O 1 *
+bit 1448 O 1 *
+bit 1447 I 1 IO_AB16
+bit 1446 O 1 IO_AB16 1445 1 Z
+bit 1445 C 1 *
+bit 1444 I 1 IO_AC16
+bit 1443 O 1 IO_AC16 1442 1 Z
+bit 1442 C 1 *
+bit 1441 I 1 IO_AE16
+bit 1440 O 1 IO_AE16 1439 1 Z
+bit 1439 C 1 *
+bit 1438 I 1 IO_AF16
+bit 1437 O 1 IO_AF16 1436 1 Z
+bit 1436 C 1 *
+bit 1435 I 1 IO_W15
+bit 1434 O 1 IO_W15 1433 1 Z
+bit 1433 C 1 *
+bit 1432 I 1 IO_Y15
+bit 1431 O 1 IO_Y15 1430 1 Z
+bit 1430 C 1 *
+bit 1429 I 1 IO_W14
+bit 1428 O 1 IO_W14 1427 1 Z
+bit 1427 C 1 *
+bit 1426 I 1 IO_AA15
+bit 1425 O 1 IO_AA15 1424 1 Z
+bit 1424 C 1 *
+bit 1423 I 1 IO_AB15
+bit 1422 O 1 IO_AB15 1421 1 Z
+bit 1421 C 1 *
+bit 1420 I 1 IO_AD15
+bit 1419 O 1 IO_AD15 1418 1 Z
+bit 1418 C 1 *
+bit 1417 I 1 IO_AE15
+bit 1416 O 1 IO_AE15 1415 1 Z
+bit 1415 C 1 *
+bit 1414 I 1 IO_AF15
+bit 1413 O 1 IO_AF15 1412 1 Z
+bit 1412 C 1 *
+bit 1411 I 1 IO_Y14
+bit 1410 O 1 IO_Y14 1409 1 Z
+bit 1409 C 1 *
+bit 1408 I 1 IO_AA14
+bit 1407 O 1 IO_AA14 1406 1 Z
+bit 1406 C 1 *
+bit 1405 I 1 IO_AB14
+bit 1404 O 1 IO_AB14 1403 1 Z
+bit 1403 C 1 *
+bit 1402 I 1 IO_AC14
+bit 1401 O 1 IO_AC14 1400 1 Z
+bit 1400 C 1 *
+bit 1399 I 1 IO_AD14
+bit 1398 O 1 IO_AD14 1397 1 Z
+bit 1397 C 1 *
+bit 1396 I 1 IO_AE14
+bit 1395 O 1 IO_AE14 1394 1 Z
+bit 1394 C 1 *
+bit 1393 I 1 IO_AF14
+bit 1392 O 1 IO_AF14 1391 1 Z
+bit 1391 C 1 *
+bit 1390 I 1 IO_AF13
+bit 1389 O 1 IO_AF13 1388 1 Z
+bit 1388 C 1 *
+bit 1387 I 1 IO_AE13
+bit 1386 O 1 IO_AE13 1385 1 Z
+bit 1385 C 1 *
+bit 1384 I 1 IO_AD13
+bit 1383 O 1 IO_AD13 1382 1 Z
+bit 1382 C 1 *
+bit 1381 I 1 IO_AC13
+bit 1380 O 1 IO_AC13 1379 1 Z
+bit 1379 C 1 *
+bit 1378 I 1 IO_AB13
+bit 1377 O 1 IO_AB13 1376 1 Z
+bit 1376 C 1 *
+bit 1375 I 1 IO_AA13
+bit 1374 O 1 IO_AA13 1373 1 Z
+bit 1373 C 1 *
+bit 1372 I 1 IO_Y13
+bit 1371 O 1 IO_Y13 1370 1 Z
+bit 1370 C 1 *
+bit 1369 I 1 IO_W13
+bit 1368 O 1 IO_W13 1367 1 Z
+bit 1367 C 1 *
+bit 1366 I 1 IO_AF12
+bit 1365 O 1 IO_AF12 1364 1 Z
+bit 1364 C 1 *
+bit 1363 I 1 IO_AE12
+bit 1362 O 1 IO_AE12 1361 1 Z
+bit 1361 C 1 *
+bit 1360 I 1 IO_AD12
+bit 1359 O 1 IO_AD12 1358 1 Z
+bit 1358 C 1 *
+bit 1357 I 1 IO_AB12
+bit 1356 O 1 IO_AB12 1355 1 Z
+bit 1355 C 1 *
+bit 1354 I 1 IO_AA12
+bit 1353 O 1 IO_AA12 1352 1 Z
+bit 1352 C 1 *
+bit 1351 I 1 IO_Y12
+bit 1350 O 1 IO_Y12 1349 1 Z
+bit 1349 C 1 *
+bit 1348 I 1 IO_W12
+bit 1347 O 1 IO_W12 1346 1 Z
+bit 1346 C 1 *
+bit 1345 I 1 IO_AC11
+bit 1344 O 1 IO_AC11 1343 1 Z
+bit 1343 C 1 *
+bit 1342 I 1 IO_AF11
+bit 1341 O 1 IO_AF11 1340 1 Z
+bit 1340 C 1 *
+bit 1339 I 1 IO_AE11
+bit 1338 O 1 IO_AE11 1337 1 Z
+bit 1337 C 1 *
+bit 1336 I 1 IO_AB11
+bit 1335 O 1 IO_AB11 1334 1 Z
+bit 1334 C 1 *
+bit 1333 I 1 IO_AA11
+bit 1332 O 1 IO_AA11 1331 1 Z
+bit 1331 C 1 *
+bit 1330 O 1 *
+bit 1329 O 1 *
+bit 1328 O 1 *
+bit 1327 I 1 IO_Y11
+bit 1326 O 1 IO_Y11 1325 1 Z
+bit 1325 C 1 *
+bit 1324 I 1 IO_W11
+bit 1323 O 1 IO_W11 1322 1 Z
+bit 1322 C 1 *
+bit 1321 I 1 IO_AF10
+bit 1320 O 1 IO_AF10 1319 1 Z
+bit 1319 C 1 *
+bit 1318 I 1 IO_AE10
+bit 1317 O 1 IO_AE10 1316 1 Z
+bit 1316 C 1 *
+bit 1315 I 1 IO_AD10
+bit 1314 O 1 IO_AD10 1313 1 Z
+bit 1313 C 1 *
+bit 1312 I 1 IO_AC10
+bit 1311 O 1 IO_AC10 1310 1 Z
+bit 1310 C 1 *
+bit 1309 I 1 IO_AB10
+bit 1308 O 1 IO_AB10 1307 1 Z
+bit 1307 C 1 *
+bit 1306 O 1 *
+bit 1305 O 1 *
+bit 1304 O 1 *
+bit 1303 O 1 *
+bit 1302 O 1 *
+bit 1301 O 1 *
+bit 1300 O 1 *
+bit 1299 O 1 *
+bit 1298 O 1 *
+bit 1297 O 1 *
+bit 1296 O 1 *
+bit 1295 O 1 *
+bit 1294 O 1 *
+bit 1293 O 1 *
+bit 1292 O 1 *
+bit 1291 I 1 IO_AA10
+bit 1290 O 1 IO_AA10 1289 1 Z
+bit 1289 C 1 *
+bit 1288 I 1 IO_Y10
+bit 1287 O 1 IO_Y10 1286 1 Z
+bit 1286 C 1 *
+bit 1285 O 1 *
+bit 1284 O 1 *
+bit 1283 O 1 *
+bit 1282 I 1 IO_AE9
+bit 1281 O 1 IO_AE9 1280 1 Z
+bit 1280 C 1 *
+bit 1279 I 1 IO_AD9
+bit 1278 O 1 IO_AD9 1277 1 Z
+bit 1277 C 1 *
+bit 1276 I 1 IO_AC9
+bit 1275 O 1 IO_AC9 1274 1 Z
+bit 1274 C 1 *
+bit 1273 O 1 *
+bit 1272 O 1 *
+bit 1271 O 1 *
+bit 1270 I 1 IO_AB9
+bit 1269 O 1 IO_AB9 1268 1 Z
+bit 1268 C 1 *
+bit 1267 I 1 IO_AA9
+bit 1266 O 1 IO_AA9 1265 1 Z
+bit 1265 C 1 *
+bit 1264 I 1 IO_Y9
+bit 1263 O 1 IO_Y9 1262 1 Z
+bit 1262 C 1 *
+bit 1261 I 1 IO_AF8
+bit 1260 O 1 IO_AF8 1259 1 Z
+bit 1259 C 1 *
+bit 1258 I 1 IO_AE8
+bit 1257 O 1 IO_AE8 1256 1 Z
+bit 1256 C 1 *
+bit 1255 O 1 *
+bit 1254 O 1 *
+bit 1253 O 1 *
+bit 1252 O 1 *
+bit 1251 O 1 *
+bit 1250 O 1 *
+bit 1249 O 1 *
+bit 1248 O 1 *
+bit 1247 O 1 *
+bit 1246 O 1 *
+bit 1245 O 1 *
+bit 1244 O 1 *
+bit 1243 O 1 *
+bit 1242 O 1 *
+bit 1241 O 1 *
+bit 1240 O 1 *
+bit 1239 O 1 *
+bit 1238 O 1 *
+bit 1237 I 1 IO_AD8
+bit 1236 O 1 IO_AD8 1235 1 Z
+bit 1235 C 1 *
+bit 1234 I 1 IO_AC8
+bit 1233 O 1 IO_AC8 1232 1 Z
+bit 1232 C 1 *
+bit 1231 I 1 IO_AB8
+bit 1230 O 1 IO_AB8 1229 1 Z
+bit 1229 C 1 *
+bit 1228 I 1 IO_AA8
+bit 1227 O 1 IO_AA8 1226 1 Z
+bit 1226 C 1 *
+bit 1225 I 1 IO_Y8
+bit 1224 O 1 IO_Y8 1223 1 Z
+bit 1223 C 1 *
+bit 1222 I 1 IO_AF7
+bit 1221 O 1 IO_AF7 1220 1 Z
+bit 1220 C 1 *
+bit 1219 I 1 IO_AE7
+bit 1218 O 1 IO_AE7 1217 1 Z
+bit 1217 C 1 *
+bit 1216 I 1 IO_AC7
+bit 1215 O 1 IO_AC7 1214 1 Z
+bit 1214 C 1 *
+bit 1213 I 1 IO_AB7
+bit 1212 O 1 IO_AB7 1211 1 Z
+bit 1211 C 1 *
+bit 1210 I 1 IO_AA7
+bit 1209 O 1 IO_AA7 1208 1 Z
+bit 1208 C 1 *
+bit 1207 I 1 IO_AF6
+bit 1206 O 1 IO_AF6 1205 1 Z
+bit 1205 C 1 *
+bit 1204 I 1 IO_AE6
+bit 1203 O 1 IO_AE6 1202 1 Z
+bit 1202 C 1 *
+bit 1201 I 1 IO_AD6
+bit 1200 O 1 IO_AD6 1199 1 Z
+bit 1199 C 1 *
+bit 1198 I 1 IO_AC6
+bit 1197 O 1 IO_AC6 1196 1 Z
+bit 1196 C 1 *
+bit 1195 O 1 *
+bit 1194 O 1 *
+bit 1193 O 1 *
+bit 1192 O 1 *
+bit 1191 O 1 *
+bit 1190 O 1 *
+bit 1189 O 1 *
+bit 1188 O 1 *
+bit 1187 O 1 *
+bit 1186 O 1 *
+bit 1185 O 1 *
+bit 1184 O 1 *
+bit 1183 O 1 *
+bit 1182 O 1 *
+bit 1181 O 1 *
+bit 1180 O 1 *
+bit 1179 O 1 *
+bit 1178 O 1 *
+bit 1177 O 1 *
+bit 1176 O 1 *
+bit 1175 O 1 *
+bit 1174 O 1 *
+bit 1173 O 1 *
+bit 1172 O 1 *
+bit 1171 O 1 *
+bit 1170 O 1 *
+bit 1169 O 1 *
+bit 1168 O 1 *
+bit 1167 O 1 *
+bit 1166 O 1 *
+bit 1165 I 1 IO_AF5
+bit 1164 O 1 IO_AF5 1163 1 Z
+bit 1163 C 1 *
+bit 1162 I 1 IO_AE5
+bit 1161 O 1 IO_AE5 1160 1 Z
+bit 1160 C 1 *
+bit 1159 I 1 IO_AD5
+bit 1158 O 1 IO_AD5 1157 1 Z
+bit 1157 C 1 *
+bit 1156 I 1 IO_AB6
+bit 1155 O 1 IO_AB6 1154 1 Z
+bit 1154 C 1 *
+bit 1153 I 1 IO_AA6
+bit 1152 O 1 IO_AA6 1151 1 Z
+bit 1151 C 1 *
+bit 1150 I 1 IO_AF4
+bit 1149 O 1 IO_AF4 1148 1 Z
+bit 1148 C 1 *
+bit 1147 I 1 IO_AE4
+bit 1146 O 1 IO_AE4 1145 1 Z
+bit 1145 C 1 *
+bit 1144 I 1 IO_AD4
+bit 1143 O 1 IO_AD4 1142 1 Z
+bit 1142 C 1 *
+bit 1141 O 1 *
+bit 1140 O 1 *
+bit 1139 O 1 *
+bit 1138 O 1 *
+bit 1137 O 1 *
+bit 1136 O 1 *
+bit 1135 O 1 *
+bit 1134 O 1 *
+bit 1133 O 1 *
+bit 1132 O 1 *
+bit 1131 O 1 *
+bit 1130 O 1 *
+bit 1129 O 1 *
+bit 1128 O 1 *
+bit 1127 O 1 *
+bit 1126 I 1 IO_AC5
+bit 1125 O 1 IO_AC5 1124 1 Z
+bit 1124 C 1 *
+bit 1123 I 1 IO_AB5
+bit 1122 O 1 IO_AB5 1121 1 Z
+bit 1121 C 1 *
+bit 1120 I 1 M2_AF3
+bit 1119 I 1 M0_AE3
+bit 1118 I 1 M1_AC3
+bit 1117 I 1 IO_AD2
+bit 1116 O 1 IO_AD2 1115 1 Z
+bit 1115 C 1 *
+bit 1114 I 1 IO_AD1
+bit 1113 O 1 IO_AD1 1112 1 Z
+bit 1112 C 1 *
+bit 1111 I 1 IO_AB4
+bit 1110 O 1 IO_AB4 1109 1 Z
+bit 1109 C 1 *
+bit 1108 I 1 IO_AB3
+bit 1107 O 1 IO_AB3 1106 1 Z
+bit 1106 C 1 *
+bit 1105 I 1 IO_AC2
+bit 1104 O 1 IO_AC2 1103 1 Z
+bit 1103 C 1 *
+bit 1102 I 1 IO_AC1
+bit 1101 O 1 IO_AC1 1100 1 Z
+bit 1100 C 1 *
+bit 1099 I 1 IO_AA5
+bit 1098 O 1 IO_AA5 1097 1 Z
+bit 1097 C 1 *
+bit 1096 O 1 *
+bit 1095 O 1 *
+bit 1094 O 1 *
+bit 1093 I 1 IO_AB2
+bit 1092 O 1 IO_AB2 1091 1 Z
+bit 1091 C 1 *
+bit 1090 I 1 IO_AB1
+bit 1089 O 1 IO_AB1 1088 1 Z
+bit 1088 C 1 *
+bit 1087 I 1 IO_Y7
+bit 1086 O 1 IO_Y7 1085 1 Z
+bit 1085 C 1 *
+bit 1084 I 1 IO_Y6
+bit 1083 O 1 IO_Y6 1082 1 Z
+bit 1082 C 1 *
+bit 1081 O 1 *
+bit 1080 O 1 *
+bit 1079 O 1 *
+bit 1078 O 1 *
+bit 1077 O 1 *
+bit 1076 O 1 *
+bit 1075 O 1 *
+bit 1074 O 1 *
+bit 1073 O 1 *
+bit 1072 O 1 *
+bit 1071 O 1 *
+bit 1070 O 1 *
+bit 1069 I 1 IO_AA4
+bit 1068 O 1 IO_AA4 1067 1 Z
+bit 1067 C 1 *
+bit 1066 I 1 IO_AA3
+bit 1065 O 1 IO_AA3 1064 1 Z
+bit 1064 C 1 *
+bit 1063 I 1 IO_Y5
+bit 1062 O 1 IO_Y5 1061 1 Z
+bit 1061 C 1 *
+bit 1060 I 1 IO_Y4
+bit 1059 O 1 IO_Y4 1058 1 Z
+bit 1058 C 1 *
+bit 1057 I 1 IO_AA2
+bit 1056 O 1 IO_AA2 1055 1 Z
+bit 1055 C 1 *
+bit 1054 I 1 IO_AA1
+bit 1053 O 1 IO_AA1 1052 1 Z
+bit 1052 C 1 *
+bit 1051 I 1 IO_Y2
+bit 1050 O 1 IO_Y2 1049 1 Z
+bit 1049 C 1 *
+bit 1048 I 1 IO_Y1
+bit 1047 O 1 IO_Y1 1046 1 Z
+bit 1046 C 1 *
+bit 1045 O 1 *
+bit 1044 O 1 *
+bit 1043 O 1 *
+bit 1042 O 1 *
+bit 1041 O 1 *
+bit 1040 O 1 *
+bit 1039 O 1 *
+bit 1038 O 1 *
+bit 1037 O 1 *
+bit 1036 O 1 *
+bit 1035 O 1 *
+bit 1034 O 1 *
+bit 1033 O 1 *
+bit 1032 O 1 *
+bit 1031 O 1 *
+bit 1030 O 1 *
+bit 1029 O 1 *
+bit 1028 O 1 *
+bit 1027 I 1 IO_W7
+bit 1026 O 1 IO_W7 1025 1 Z
+bit 1025 C 1 *
+bit 1024 I 1 IO_W6
+bit 1023 O 1 IO_W6 1022 1 Z
+bit 1022 C 1 *
+bit 1021 O 1 *
+bit 1020 O 1 *
+bit 1019 O 1 *
+bit 1018 O 1 *
+bit 1017 O 1 *
+bit 1016 O 1 *
+bit 1015 I 1 IO_V6
+bit 1014 O 1 IO_V6 1013 1 Z
+bit 1013 C 1 *
+bit 1012 I 1 IO_W5
+bit 1011 O 1 IO_W5 1010 1 Z
+bit 1010 C 1 *
+bit 1009 I 1 IO_W4
+bit 1008 O 1 IO_W4 1007 1 Z
+bit 1007 C 1 *
+bit 1006 I 1 IO_W3
+bit 1005 O 1 IO_W3 1004 1 Z
+bit 1004 C 1 *
+bit 1003 O 1 *
+bit 1002 O 1 *
+bit 1001 O 1 *
+bit 1000 O 1 *
+bit 999 O 1 *
+bit 998 O 1 *
+bit 997 I 1 IO_W2
+bit 996 O 1 IO_W2 995 1 Z
+bit 995 C 1 *
+bit 994 I 1 IO_W1
+bit 993 O 1 IO_W1 992 1 Z
+bit 992 C 1 *
+bit 991 I 1 IO_V7
+bit 990 O 1 IO_V7 989 1 Z
+bit 989 C 1 *
+bit 988 I 1 IO_U7
+bit 987 O 1 IO_U7 986 1 Z
+bit 986 C 1 *
+bit 985 I 1 IO_V5
+bit 984 O 1 IO_V5 983 1 Z
+bit 983 C 1 *
+bit 982 I 1 IO_V4
+bit 981 O 1 IO_V4 980 1 Z
+bit 980 C 1 *
+bit 979 I 1 IO_V3
+bit 978 O 1 IO_V3 977 1 Z
+bit 977 C 1 *
+bit 976 I 1 IO_V2
+bit 975 O 1 IO_V2 974 1 Z
+bit 974 C 1 *
+bit 973 O 1 *
+bit 972 O 1 *
+bit 971 O 1 *
+bit 970 O 1 *
+bit 969 O 1 *
+bit 968 O 1 *
+bit 967 I 1 IO_U6
+bit 966 O 1 IO_U6 965 1 Z
+bit 965 C 1 *
+bit 964 I 1 IO_U5
+bit 963 O 1 IO_U5 962 1 Z
+bit 962 C 1 *
+bit 961 I 1 IO_U4
+bit 960 O 1 IO_U4 959 1 Z
+bit 959 C 1 *
+bit 958 I 1 IO_U3
+bit 957 O 1 IO_U3 956 1 Z
+bit 956 C 1 *
+bit 955 O 1 *
+bit 954 O 1 *
+bit 953 O 1 *
+bit 952 O 1 *
+bit 951 O 1 *
+bit 950 O 1 *
+bit 949 I 1 IO_U2
+bit 948 O 1 IO_U2 947 1 Z
+bit 947 C 1 *
+bit 946 I 1 IO_U1
+bit 945 O 1 IO_U1 944 1 Z
+bit 944 C 1 *
+bit 943 I 1 IO_T8
+bit 942 O 1 IO_T8 941 1 Z
+bit 941 C 1 *
+bit 940 I 1 IO_T7
+bit 939 O 1 IO_T7 938 1 Z
+bit 938 C 1 *
+bit 937 O 1 *
+bit 936 O 1 *
+bit 935 O 1 *
+bit 934 O 1 *
+bit 933 O 1 *
+bit 932 O 1 *
+bit 931 I 1 IO_T6
+bit 930 O 1 IO_T6 929 1 Z
+bit 929 C 1 *
+bit 928 I 1 IO_T5
+bit 927 O 1 IO_T5 926 1 Z
+bit 926 C 1 *
+bit 925 I 1 IO_T2
+bit 924 O 1 IO_T2 923 1 Z
+bit 923 C 1 *
+bit 922 I 1 IO_T1
+bit 921 O 1 IO_T1 920 1 Z
+bit 920 C 1 *
+bit 919 O 1 *
+bit 918 O 1 *
+bit 917 O 1 *
+bit 916 O 1 *
+bit 915 O 1 *
+bit 914 O 1 *
+bit 913 I 1 IO_R8
+bit 912 O 1 IO_R8 911 1 Z
+bit 911 C 1 *
+bit 910 I 1 IO_R7
+bit 909 O 1 IO_R7 908 1 Z
+bit 908 C 1 *
+bit 907 I 1 IO_R6
+bit 906 O 1 IO_R6 905 1 Z
+bit 905 C 1 *
+bit 904 I 1 IO_R5
+bit 903 O 1 IO_R5 902 1 Z
+bit 902 C 1 *
+bit 901 O 1 *
+bit 900 O 1 *
+bit 899 O 1 *
+bit 898 O 1 *
+bit 897 O 1 *
+bit 896 O 1 *
+bit 895 I 1 IO_T4
+bit 894 O 1 IO_T4 893 1 Z
+bit 893 C 1 *
+bit 892 I 1 IO_R3
+bit 891 O 1 IO_R3 890 1 Z
+bit 890 C 1 *
+bit 889 I 1 IO_R2
+bit 888 O 1 IO_R2 887 1 Z
+bit 887 C 1 *
+bit 886 I 1 IO_R1
+bit 885 O 1 IO_R1 884 1 Z
+bit 884 C 1 *
+bit 883 I 1 IO_P8
+bit 882 O 1 IO_P8 881 1 Z
+bit 881 C 1 *
+bit 880 I 1 IO_P7
+bit 879 O 1 IO_P7 878 1 Z
+bit 878 C 1 *
+bit 877 O 1 *
+bit 876 O 1 *
+bit 875 O 1 *
+bit 874 O 1 *
+bit 873 O 1 *
+bit 872 O 1 *
+bit 871 O 1 *
+bit 870 O 1 *
+bit 869 O 1 *
+bit 868 O 1 *
+bit 867 O 1 *
+bit 866 O 1 *
+bit 865 O 1 *
+bit 864 O 1 *
+bit 863 O 1 *
+bit 862 O 1 *
+bit 861 O 1 *
+bit 860 O 1 *
+bit 859 O 1 *
+bit 858 O 1 *
+bit 857 O 1 *
+bit 856 O 1 *
+bit 855 O 1 *
+bit 854 O 1 *
+bit 853 O 1 *
+bit 852 O 1 *
+bit 851 O 1 *
+bit 850 O 1 *
+bit 849 O 1 *
+bit 848 O 1 *
+bit 847 I 1 IO_P6
+bit 846 O 1 IO_P6 845 1 Z
+bit 845 C 1 *
+bit 844 I 1 IO_P5
+bit 843 O 1 IO_P5 842 1 Z
+bit 842 C 1 *
+bit 841 I 1 IO_P4
+bit 840 O 1 IO_P4 839 1 Z
+bit 839 C 1 *
+bit 838 I 1 IO_P3
+bit 837 O 1 IO_P3 836 1 Z
+bit 836 C 1 *
+bit 835 I 1 IO_P2
+bit 834 O 1 IO_P2 833 1 Z
+bit 833 C 1 *
+bit 832 I 1 IO_P1
+bit 831 O 1 IO_P1 830 1 Z
+bit 830 C 1 *
+bit 829 I 1 IO_N1
+bit 828 O 1 IO_N1 827 1 Z
+bit 827 C 1 *
+bit 826 I 1 IO_N2
+bit 825 O 1 IO_N2 824 1 Z
+bit 824 C 1 *
+bit 823 I 1 IO_N3
+bit 822 O 1 IO_N3 821 1 Z
+bit 821 C 1 *
+bit 820 I 1 IO_N4
+bit 819 O 1 IO_N4 818 1 Z
+bit 818 C 1 *
+bit 817 I 1 IO_N5
+bit 816 O 1 IO_N5 815 1 Z
+bit 815 C 1 *
+bit 814 I 1 IO_N6
+bit 813 O 1 IO_N6 812 1 Z
+bit 812 C 1 *
+bit 811 O 1 *
+bit 810 O 1 *
+bit 809 O 1 *
+bit 808 O 1 *
+bit 807 O 1 *
+bit 806 O 1 *
+bit 805 O 1 *
+bit 804 O 1 *
+bit 803 O 1 *
+bit 802 O 1 *
+bit 801 O 1 *
+bit 800 O 1 *
+bit 799 O 1 *
+bit 798 O 1 *
+bit 797 O 1 *
+bit 796 O 1 *
+bit 795 O 1 *
+bit 794 O 1 *
+bit 793 I 1 IO_N7
+bit 792 O 1 IO_N7 791 1 Z
+bit 791 C 1 *
+bit 790 I 1 IO_N8
+bit 789 O 1 IO_N8 788 1 Z
+bit 788 C 1 *
+bit 787 I 1 IO_M1
+bit 786 O 1 IO_M1 785 1 Z
+bit 785 C 1 *
+bit 784 I 1 IO_M2
+bit 783 O 1 IO_M2 782 1 Z
+bit 782 C 1 *
+bit 781 I 1 IO_M3
+bit 780 O 1 IO_M3 779 1 Z
+bit 779 C 1 *
+bit 778 I 1 IO_L4
+bit 777 O 1 IO_L4 776 1 Z
+bit 776 C 1 *
+bit 775 I 1 IO_M6
+bit 774 O 1 IO_M6 773 1 Z
+bit 773 C 1 *
+bit 772 I 1 IO_M5
+bit 771 O 1 IO_M5 770 1 Z
+bit 770 C 1 *
+bit 769 I 1 IO_M7
+bit 768 O 1 IO_M7 767 1 Z
+bit 767 C 1 *
+bit 766 I 1 IO_M8
+bit 765 O 1 IO_M8 764 1 Z
+bit 764 C 1 *
+bit 763 O 1 *
+bit 762 O 1 *
+bit 761 O 1 *
+bit 760 O 1 *
+bit 759 O 1 *
+bit 758 O 1 *
+bit 757 O 1 *
+bit 756 O 1 *
+bit 755 O 1 *
+bit 754 O 1 *
+bit 753 O 1 *
+bit 752 O 1 *
+bit 751 O 1 *
+bit 750 O 1 *
+bit 749 O 1 *
+bit 748 O 1 *
+bit 747 O 1 *
+bit 746 O 1 *
+bit 745 I 1 IO_L1
+bit 744 O 1 IO_L1 743 1 Z
+bit 743 C 1 *
+bit 742 I 1 IO_L2
+bit 741 O 1 IO_L2 740 1 Z
+bit 740 C 1 *
+bit 739 I 1 IO_L5
+bit 738 O 1 IO_L5 737 1 Z
+bit 737 C 1 *
+bit 736 I 1 IO_L6
+bit 735 O 1 IO_L6 734 1 Z
+bit 734 C 1 *
+bit 733 I 1 IO_L7
+bit 732 O 1 IO_L7 731 1 Z
+bit 731 C 1 *
+bit 730 I 1 IO_L8
+bit 729 O 1 IO_L8 728 1 Z
+bit 728 C 1 *
+bit 727 O 1 *
+bit 726 O 1 *
+bit 725 O 1 *
+bit 724 O 1 *
+bit 723 O 1 *
+bit 722 O 1 *
+bit 721 I 1 IO_K1
+bit 720 O 1 IO_K1 719 1 Z
+bit 719 C 1 *
+bit 718 I 1 IO_K2
+bit 717 O 1 IO_K2 716 1 Z
+bit 716 C 1 *
+bit 715 O 1 *
+bit 714 O 1 *
+bit 713 O 1 *
+bit 712 O 1 *
+bit 711 O 1 *
+bit 710 O 1 *
+bit 709 O 1 *
+bit 708 O 1 *
+bit 707 O 1 *
+bit 706 O 1 *
+bit 705 O 1 *
+bit 704 O 1 *
+bit 703 I 1 IO_K3
+bit 702 O 1 IO_K3 701 1 Z
+bit 701 C 1 *
+bit 700 I 1 IO_K4
+bit 699 O 1 IO_K4 698 1 Z
+bit 698 C 1 *
+bit 697 O 1 *
+bit 696 O 1 *
+bit 695 O 1 *
+bit 694 O 1 *
+bit 693 O 1 *
+bit 692 O 1 *
+bit 691 I 1 IO_K5
+bit 690 O 1 IO_K5 689 1 Z
+bit 689 C 1 *
+bit 688 I 1 IO_K6
+bit 687 O 1 IO_K6 686 1 Z
+bit 686 C 1 *
+bit 685 I 1 IO_J2
+bit 684 O 1 IO_J2 683 1 Z
+bit 683 C 1 *
+bit 682 I 1 IO_J3
+bit 681 O 1 IO_J3 680 1 Z
+bit 680 C 1 *
+bit 679 I 1 IO_J4
+bit 678 O 1 IO_J4 677 1 Z
+bit 677 C 1 *
+bit 676 I 1 IO_J5
+bit 675 O 1 IO_J5 674 1 Z
+bit 674 C 1 *
+bit 673 I 1 IO_K7
+bit 672 O 1 IO_K7 671 1 Z
+bit 671 C 1 *
+bit 670 I 1 IO_J7
+bit 669 O 1 IO_J7 668 1 Z
+bit 668 C 1 *
+bit 667 I 1 IO_H1
+bit 666 O 1 IO_H1 665 1 Z
+bit 665 C 1 *
+bit 664 I 1 IO_H2
+bit 663 O 1 IO_H2 662 1 Z
+bit 662 C 1 *
+bit 661 O 1 *
+bit 660 O 1 *
+bit 659 O 1 *
+bit 658 O 1 *
+bit 657 O 1 *
+bit 656 O 1 *
+bit 655 I 1 IO_H3
+bit 654 O 1 IO_H3 653 1 Z
+bit 653 C 1 *
+bit 652 I 1 IO_H4
+bit 651 O 1 IO_H4 650 1 Z
+bit 650 C 1 *
+bit 649 I 1 IO_J6
+bit 648 O 1 IO_J6 647 1 Z
+bit 647 C 1 *
+bit 646 I 1 IO_H5
+bit 645 O 1 IO_H5 644 1 Z
+bit 644 C 1 *
+bit 643 O 1 *
+bit 642 O 1 *
+bit 641 O 1 *
+bit 640 O 1 *
+bit 639 O 1 *
+bit 638 O 1 *
+bit 637 I 1 IO_G1
+bit 636 O 1 IO_G1 635 1 Z
+bit 635 C 1 *
+bit 634 I 1 IO_G2
+bit 633 O 1 IO_G2 632 1 Z
+bit 632 C 1 *
+bit 631 O 1 *
+bit 630 O 1 *
+bit 629 O 1 *
+bit 628 O 1 *
+bit 627 O 1 *
+bit 626 O 1 *
+bit 625 O 1 *
+bit 624 O 1 *
+bit 623 O 1 *
+bit 622 O 1 *
+bit 621 O 1 *
+bit 620 O 1 *
+bit 619 O 1 *
+bit 618 O 1 *
+bit 617 O 1 *
+bit 616 O 1 *
+bit 615 O 1 *
+bit 614 O 1 *
+bit 613 I 1 IO_H6
+bit 612 O 1 IO_H6 611 1 Z
+bit 611 C 1 *
+bit 610 I 1 IO_H7
+bit 609 O 1 IO_H7 608 1 Z
+bit 608 C 1 *
+bit 607 I 1 IO_F1
+bit 606 O 1 IO_F1 605 1 Z
+bit 605 C 1 *
+bit 604 I 1 IO_F2
+bit 603 O 1 IO_F2 602 1 Z
+bit 602 C 1 *
+bit 601 I 1 IO_G4
+bit 600 O 1 IO_G4 599 1 Z
+bit 599 C 1 *
+bit 598 I 1 IO_G5
+bit 597 O 1 IO_G5 596 1 Z
+bit 596 C 1 *
+bit 595 I 1 IO_F3
+bit 594 O 1 IO_F3 593 1 Z
+bit 593 C 1 *
+bit 592 I 1 IO_F4
+bit 591 O 1 IO_F4 590 1 Z
+bit 590 C 1 *
+bit 589 O 1 *
+bit 588 O 1 *
+bit 587 O 1 *
+bit 586 O 1 *
+bit 585 O 1 *
+bit 584 O 1 *
+bit 583 O 1 *
+bit 582 O 1 *
+bit 581 O 1 *
+bit 580 O 1 *
+bit 579 O 1 *
+bit 578 O 1 *
+bit 577 I 1 IO_E1
+bit 576 O 1 IO_E1 575 1 Z
+bit 575 C 1 *
+bit 574 I 1 IO_E2
+bit 573 O 1 IO_E2 572 1 Z
+bit 572 C 1 *
+bit 571 I 1 IO_G6
+bit 570 O 1 IO_G6 569 1 Z
+bit 569 C 1 *
+bit 568 I 1 IO_G7
+bit 567 O 1 IO_G7 566 1 Z
+bit 566 C 1 *
+bit 565 O 1 *
+bit 564 O 1 *
+bit 563 O 1 *
+bit 562 O 1 *
+bit 561 O 1 *
+bit 560 O 1 *
+bit 559 I 1 IO_D1
+bit 558 O 1 IO_D1 557 1 Z
+bit 557 C 1 *
+bit 556 I 1 IO_D2
+bit 555 O 1 IO_D2 554 1 Z
+bit 554 C 1 *
+bit 553 I 1 IO_E3
+bit 552 O 1 IO_E3 551 1 Z
+bit 551 C 1 *
+bit 550 I 1 IO_E4
+bit 549 O 1 IO_E4 548 1 Z
+bit 548 C 1 *
+bit 547 I 1 IO_F5
+bit 546 O 1 IO_F5 545 1 Z
+bit 545 C 1 *
+bit 544 I 1 IO_F6
+bit 543 O 1 IO_F6 542 1 Z
+bit 542 C 1 *
+bit 541 O 1 *
+bit 540 I 1 HSWAP_EN_C2
+bit 539 I 1 IO_B3
+bit 538 O 1 IO_B3 537 1 Z
+bit 537 C 1 *
+bit 536 I 1 IO_E5
+bit 535 O 1 IO_E5 534 1 Z
+bit 534 C 1 *
+bit 533 I 1 IO_D5
+bit 532 O 1 IO_D5 531 1 Z
+bit 531 C 1 *
+bit 530 O 1 *
+bit 529 O 1 *
+bit 528 O 1 *
+bit 527 O 1 *
+bit 526 O 1 *
+bit 525 O 1 *
+bit 524 O 1 *
+bit 523 O 1 *
+bit 522 O 1 *
+bit 521 O 1 *
+bit 520 O 1 *
+bit 519 O 1 *
+bit 518 O 1 *
+bit 517 O 1 *
+bit 516 O 1 *
+bit 515 O 1 *
+bit 514 O 1 *
+bit 513 O 1 *
+bit 512 I 1 IO_A3
+bit 511 O 1 IO_A3 510 1 Z
+bit 510 C 1 *
+bit 509 I 1 IO_C4
+bit 508 O 1 IO_C4 507 1 Z
+bit 507 C 1 *
+bit 506 I 1 IO_B4
+bit 505 O 1 IO_B4 504 1 Z
+bit 504 C 1 *
+bit 503 I 1 IO_A4
+bit 502 O 1 IO_A4 501 1 Z
+bit 501 C 1 *
+bit 500 I 1 IO_C5
+bit 499 O 1 IO_C5 498 1 Z
+bit 498 C 1 *
+bit 497 I 1 IO_B5
+bit 496 O 1 IO_B5 495 1 Z
+bit 495 C 1 *
+bit 494 O 1 *
+bit 493 O 1 *
+bit 492 O 1 *
+bit 491 O 1 *
+bit 490 O 1 *
+bit 489 O 1 *
+bit 488 O 1 *
+bit 487 O 1 *
+bit 486 O 1 *
+bit 485 O 1 *
+bit 484 O 1 *
+bit 483 O 1 *
+bit 482 I 1 IO_A5
+bit 481 O 1 IO_A5 480 1 Z
+bit 480 C 1 *
+bit 479 O 1 *
+bit 478 O 1 *
+bit 477 O 1 *
+bit 476 I 1 IO_E6
+bit 475 O 1 IO_E6 474 1 Z
+bit 474 C 1 *
+bit 473 I 1 IO_D6
+bit 472 O 1 IO_D6 471 1 Z
+bit 471 C 1 *
+bit 470 I 1 IO_C6
+bit 469 O 1 IO_C6 468 1 Z
+bit 468 C 1 *
+bit 467 I 1 IO_B6
+bit 466 O 1 IO_B6 465 1 Z
+bit 465 C 1 *
+bit 464 I 1 IO_A6
+bit 463 O 1 IO_A6 462 1 Z
+bit 462 C 1 *
+bit 461 I 1 IO_E7
+bit 460 O 1 IO_E7 459 1 Z
+bit 459 C 1 *
+bit 458 I 1 IO_D7
+bit 457 O 1 IO_D7 456 1 Z
+bit 456 C 1 *
+bit 455 I 1 IO_B7
+bit 454 O 1 IO_B7 453 1 Z
+bit 453 C 1 *
+bit 452 I 1 IO_A7
+bit 451 O 1 IO_A7 450 1 Z
+bit 450 C 1 *
+bit 449 I 1 IO_F7
+bit 448 O 1 IO_F7 447 1 Z
+bit 447 C 1 *
+bit 446 O 1 *
+bit 445 O 1 *
+bit 444 O 1 *
+bit 443 O 1 *
+bit 442 O 1 *
+bit 441 O 1 *
+bit 440 O 1 *
+bit 439 O 1 *
+bit 438 O 1 *
+bit 437 O 1 *
+bit 436 O 1 *
+bit 435 O 1 *
+bit 434 O 1 *
+bit 433 O 1 *
+bit 432 O 1 *
+bit 431 I 1 IO_G8
+bit 430 O 1 IO_G8 429 1 Z
+bit 429 C 1 *
+bit 428 I 1 IO_F8
+bit 427 O 1 IO_F8 426 1 Z
+bit 426 C 1 *
+bit 425 I 1 IO_E8
+bit 424 O 1 IO_E8 423 1 Z
+bit 423 C 1 *
+bit 422 I 1 IO_D8
+bit 421 O 1 IO_D8 420 1 Z
+bit 420 C 1 *
+bit 419 O 1 *
+bit 418 O 1 *
+bit 417 O 1 *
+bit 416 O 1 *
+bit 415 O 1 *
+bit 414 O 1 *
+bit 413 O 1 *
+bit 412 O 1 *
+bit 411 O 1 *
+bit 410 O 1 *
+bit 409 O 1 *
+bit 408 O 1 *
+bit 407 O 1 *
+bit 406 O 1 *
+bit 405 O 1 *
+bit 404 I 1 IO_C8
+bit 403 O 1 IO_C8 402 1 Z
+bit 402 C 1 *
+bit 401 I 1 IO_B8
+bit 400 O 1 IO_B8 399 1 Z
+bit 399 C 1 *
+bit 398 I 1 IO_A8
+bit 397 O 1 IO_A8 396 1 Z
+bit 396 C 1 *
+bit 395 I 1 IO_G9
+bit 394 O 1 IO_G9 393 1 Z
+bit 393 C 1 *
+bit 392 I 1 IO_F9
+bit 391 O 1 IO_F9 390 1 Z
+bit 390 C 1 *
+bit 389 O 1 *
+bit 388 O 1 *
+bit 387 O 1 *
+bit 386 I 1 IO_E9
+bit 385 O 1 IO_E9 384 1 Z
+bit 384 C 1 *
+bit 383 I 1 IO_D9
+bit 382 O 1 IO_D9 381 1 Z
+bit 381 C 1 *
+bit 380 I 1 IO_C9
+bit 379 O 1 IO_C9 378 1 Z
+bit 378 C 1 *
+bit 377 I 1 IO_B9
+bit 376 O 1 IO_B9 375 1 Z
+bit 375 C 1 *
+bit 374 I 1 IO_G10
+bit 373 O 1 IO_G10 372 1 Z
+bit 372 C 1 *
+bit 371 I 1 IO_F10
+bit 370 O 1 IO_F10 369 1 Z
+bit 369 C 1 *
+bit 368 I 1 IO_E10
+bit 367 O 1 IO_E10 366 1 Z
+bit 366 C 1 *
+bit 365 O 1 *
+bit 364 O 1 *
+bit 363 O 1 *
+bit 362 O 1 *
+bit 361 O 1 *
+bit 360 O 1 *
+bit 359 O 1 *
+bit 358 O 1 *
+bit 357 O 1 *
+bit 356 O 1 *
+bit 355 O 1 *
+bit 354 O 1 *
+bit 353 O 1 *
+bit 352 O 1 *
+bit 351 O 1 *
+bit 350 I 1 IO_D10
+bit 349 O 1 IO_D10 348 1 Z
+bit 348 C 1 *
+bit 347 I 1 IO_C10
+bit 346 O 1 IO_C10 345 1 Z
+bit 345 C 1 *
+bit 344 I 1 IO_H11
+bit 343 O 1 IO_H11 342 1 Z
+bit 342 C 1 *
+bit 341 I 1 IO_B10
+bit 340 O 1 IO_B10 339 1 Z
+bit 339 C 1 *
+bit 338 I 1 IO_A10
+bit 337 O 1 IO_A10 336 1 Z
+bit 336 C 1 *
+bit 335 I 1 IO_G11
+bit 334 O 1 IO_G11 333 1 Z
+bit 333 C 1 *
+bit 332 I 1 IO_F11
+bit 331 O 1 IO_F11 330 1 Z
+bit 330 C 1 *
+bit 329 O 1 *
+bit 328 O 1 *
+bit 327 O 1 *
+bit 326 I 1 IO_E11
+bit 325 O 1 IO_E11 324 1 Z
+bit 324 C 1 *
+bit 323 I 1 IO_D11
+bit 322 O 1 IO_D11 321 1 Z
+bit 321 C 1 *
+bit 320 I 1 IO_B11
+bit 319 O 1 IO_B11 318 1 Z
+bit 318 C 1 *
+bit 317 I 1 IO_A11
+bit 316 O 1 IO_A11 315 1 Z
+bit 315 C 1 *
+bit 314 I 1 IO_H12
+bit 313 O 1 IO_H12 312 1 Z
+bit 312 C 1 *
+bit 311 I 1 IO_G12
+bit 310 O 1 IO_G12 309 1 Z
+bit 309 C 1 *
+bit 308 I 1 IO_H13
+bit 307 O 1 IO_H13 306 1 Z
+bit 306 C 1 *
+bit 305 I 1 IO_F12
+bit 304 O 1 IO_F12 303 1 Z
+bit 303 C 1 *
+bit 302 I 1 IO_E12
+bit 301 O 1 IO_E12 300 1 Z
+bit 300 C 1 *
+bit 299 I 1 IO_C12
+bit 298 O 1 IO_C12 297 1 Z
+bit 297 C 1 *
+bit 296 I 1 IO_B12
+bit 295 O 1 IO_B12 294 1 Z
+bit 294 C 1 *
+bit 293 I 1 IO_A12
+bit 292 O 1 IO_A12 291 1 Z
+bit 291 C 1 *
+bit 290 I 1 IO_G13
+bit 289 O 1 IO_G13 288 1 Z
+bit 288 C 1 *
+bit 287 I 1 IO_F13
+bit 286 O 1 IO_F13 285 1 Z
+bit 285 C 1 *
+bit 284 I 1 IO_E13
+bit 283 O 1 IO_E13 282 1 Z
+bit 282 C 1 *
+bit 281 I 1 IO_D13
+bit 280 O 1 IO_D13 279 1 Z
+bit 279 C 1 *
+bit 278 I 1 IO_C13
+bit 277 O 1 IO_C13 276 1 Z
+bit 276 C 1 *
+bit 275 I 1 IO_B13
+bit 274 O 1 IO_B13 273 1 Z
+bit 273 C 1 *
+bit 272 I 1 IO_A13
+bit 271 O 1 IO_A13 270 1 Z
+bit 270 C 1 *
+bit 269 I 1 IO_A14
+bit 268 O 1 IO_A14 267 1 Z
+bit 267 C 1 *
+bit 266 I 1 IO_B14
+bit 265 O 1 IO_B14 264 1 Z
+bit 264 C 1 *
+bit 263 I 1 IO_C14
+bit 262 O 1 IO_C14 261 1 Z
+bit 261 C 1 *
+bit 260 I 1 IO_D14
+bit 259 O 1 IO_D14 258 1 Z
+bit 258 C 1 *
+bit 257 I 1 IO_E14
+bit 256 O 1 IO_E14 255 1 Z
+bit 255 C 1 *
+bit 254 I 1 IO_F14
+bit 253 O 1 IO_F14 252 1 Z
+bit 252 C 1 *
+bit 251 I 1 IO_G14
+bit 250 O 1 IO_G14 249 1 Z
+bit 249 C 1 *
+bit 248 I 1 IO_H14
+bit 247 O 1 IO_H14 246 1 Z
+bit 246 C 1 *
+bit 245 I 1 IO_A15
+bit 244 O 1 IO_A15 243 1 Z
+bit 243 C 1 *
+bit 242 I 1 IO_B15
+bit 241 O 1 IO_B15 240 1 Z
+bit 240 C 1 *
+bit 239 I 1 IO_C15
+bit 238 O 1 IO_C15 237 1 Z
+bit 237 C 1 *
+bit 236 I 1 IO_E15
+bit 235 O 1 IO_E15 234 1 Z
+bit 234 C 1 *
+bit 233 I 1 IO_F15
+bit 232 O 1 IO_F15 231 1 Z
+bit 231 C 1 *
+bit 230 I 1 IO_G15
+bit 229 O 1 IO_G15 228 1 Z
+bit 228 C 1 *
+bit 227 I 1 IO_H15
+bit 226 O 1 IO_H15 225 1 Z
+bit 225 C 1 *
+bit 224 O 1 *
+bit 223 O 1 *
+bit 222 O 1 *
+bit 221 O 1 *
+bit 220 O 1 *
+bit 219 O 1 *
+bit 218 O 1 *
+bit 217 O 1 *
+bit 216 O 1 *
+bit 215 O 1 *
+bit 214 O 1 *
+bit 213 O 1 *
+bit 212 O 1 *
+bit 211 O 1 *
+bit 210 O 1 *
+bit 209 O 1 *
+bit 208 O 1 *
+bit 207 O 1 *
+bit 206 O 1 *
+bit 205 O 1 *
+bit 204 O 1 *
+bit 203 O 1 *
+bit 202 O 1 *
+bit 201 O 1 *
+bit 200 O 1 *
+bit 199 O 1 *
+bit 198 O 1 *
+bit 197 O 1 *
+bit 196 O 1 *
+bit 195 O 1 *
+bit 194 I 1 IO_D16
+bit 193 O 1 IO_D16 192 1 Z
+bit 192 C 1 *
+bit 191 I 1 IO_A16
+bit 190 O 1 IO_A16 189 1 Z
+bit 189 C 1 *
+bit 188 I 1 IO_B16
+bit 187 O 1 IO_B16 186 1 Z
+bit 186 C 1 *
+bit 185 I 1 IO_E16
+bit 184 O 1 IO_E16 183 1 Z
+bit 183 C 1 *
+bit 182 I 1 IO_F16
+bit 181 O 1 IO_F16 180 1 Z
+bit 180 C 1 *
+bit 179 O 1 *
+bit 178 O 1 *
+bit 177 O 1 *
+bit 176 I 1 IO_G16
+bit 175 O 1 IO_G16 174 1 Z
+bit 174 C 1 *
+bit 173 I 1 IO_H16
+bit 172 O 1 IO_H16 171 1 Z
+bit 171 C 1 *
+bit 170 I 1 IO_A17
+bit 169 O 1 IO_A17 168 1 Z
+bit 168 C 1 *
+bit 167 I 1 IO_B17
+bit 166 O 1 IO_B17 165 1 Z
+bit 165 C 1 *
+bit 164 I 1 IO_C17
+bit 163 O 1 IO_C17 162 1 Z
+bit 162 C 1 *
+bit 161 I 1 IO_D17
+bit 160 O 1 IO_D17 159 1 Z
+bit 159 C 1 *
+bit 158 I 1 IO_E17
+bit 157 O 1 IO_E17 156 1 Z
+bit 156 C 1 *
+bit 155 O 1 *
+bit 154 O 1 *
+bit 153 O 1 *
+bit 152 O 1 *
+bit 151 O 1 *
+bit 150 O 1 *
+bit 149 O 1 *
+bit 148 O 1 *
+bit 147 O 1 *
+bit 146 O 1 *
+bit 145 O 1 *
+bit 144 O 1 *
+bit 143 O 1 *
+bit 142 O 1 *
+bit 141 O 1 *
+bit 140 I 1 IO_F17
+bit 139 O 1 IO_F17 138 1 Z
+bit 138 C 1 *
+bit 137 I 1 IO_G17
+bit 136 O 1 IO_G17 135 1 Z
+bit 135 C 1 *
+bit 134 O 1 *
+bit 133 O 1 *
+bit 132 O 1 *
+bit 131 I 1 IO_B18
+bit 130 O 1 IO_B18 129 1 Z
+bit 129 C 1 *
+bit 128 I 1 IO_C18
+bit 127 O 1 IO_C18 126 1 Z
+bit 126 C 1 *
+bit 125 I 1 IO_D18
+bit 124 O 1 IO_D18 123 1 Z
+bit 123 C 1 *
+bit 122 O 1 *
+bit 121 O 1 *
+bit 120 O 1 *
+bit 119 I 1 IO_E18
+bit 118 O 1 IO_E18 117 1 Z
+bit 117 C 1 *
+bit 116 I 1 IO_F18
+bit 115 O 1 IO_F18 114 1 Z
+bit 114 C 1 *
+bit 113 I 1 IO_G18
+bit 112 O 1 IO_G18 111 1 Z
+bit 111 C 1 *
+bit 110 I 1 IO_A19
+bit 109 O 1 IO_A19 108 1 Z
+bit 108 C 1 *
+bit 107 I 1 IO_B19
+bit 106 O 1 IO_B19 105 1 Z
+bit 105 C 1 *
+bit 104 O 1 *
+bit 103 O 1 *
+bit 102 O 1 *
+bit 101 O 1 *
+bit 100 O 1 *
+bit 99 O 1 *
+bit 98 O 1 *
+bit 97 O 1 *
+bit 96 O 1 *
+bit 95 O 1 *
+bit 94 O 1 *
+bit 93 O 1 *
+bit 92 O 1 *
+bit 91 O 1 *
+bit 90 O 1 *
+bit 89 O 1 *
+bit 88 O 1 *
+bit 87 O 1 *
+bit 86 I 1 IO_C19
+bit 85 O 1 IO_C19 84 1 Z
+bit 84 C 1 *
+bit 83 I 1 IO_D19
+bit 82 O 1 IO_D19 81 1 Z
+bit 81 C 1 *
+bit 80 I 1 IO_E19
+bit 79 O 1 IO_E19 78 1 Z
+bit 78 C 1 *
+bit 77 I 1 IO_F19
+bit 76 O 1 IO_F19 75 1 Z
+bit 75 C 1 *
+bit 74 I 1 IO_G19
+bit 73 O 1 IO_G19 72 1 Z
+bit 72 C 1 *
+bit 71 I 1 IO_A20
+bit 70 O 1 IO_A20 69 1 Z
+bit 69 C 1 *
+bit 68 I 1 IO_B20
+bit 67 O 1 IO_B20 66 1 Z
+bit 66 C 1 *
+bit 65 I 1 IO_D20
+bit 64 O 1 IO_D20 63 1 Z
+bit 63 C 1 *
+bit 62 I 1 IO_E20
+bit 61 O 1 IO_E20 60 1 Z
+bit 60 C 1 *
+bit 59 I 1 IO_F20
+bit 58 O 1 IO_F20 57 1 Z
+bit 57 C 1 *
+bit 56 I 1 IO_A21
+bit 55 O 1 IO_A21 54 1 Z
+bit 54 C 1 *
+bit 53 I 1 IO_B21
+bit 52 O 1 IO_B21 51 1 Z
+bit 51 C 1 *
+bit 50 I 1 IO_C21
+bit 49 O 1 IO_C21 48 1 Z
+bit 48 C 1 *
+bit 47 I 1 IO_D21
+bit 46 O 1 IO_D21 45 1 Z
+bit 45 C 1 *
+bit 44 I 1 IO_A22
+bit 43 O 1 IO_A22 42 1 Z
+bit 42 C 1 *
+bit 41 I 1 IO_B22
+bit 40 O 1 IO_B22 39 1 Z
+bit 39 C 1 *
+bit 38 I 1 IO_C22
+bit 37 O 1 IO_C22 36 1 Z
+bit 36 C 1 *
+bit 35 I 1 IO_E21
+bit 34 O 1 IO_E21 33 1 Z
+bit 33 C 1 *
+bit 32 I 1 IO_F21
+bit 31 O 1 IO_F21 30 1 Z
+bit 30 C 1 *
+bit 29 I 1 IO_A23
+bit 28 O 1 IO_A23 27 1 Z
+bit 27 C 1 *
+bit 26 I 1 IO_B23
+bit 25 O 1 IO_B23 24 1 Z
+bit 24 C 1 *
+bit 23 I 1 IO_C23
+bit 22 O 1 IO_C23 21 1 Z
+bit 21 C 1 *
+bit 20 O 1 *
+bit 19 O 1 *
+bit 18 O 1 *
+bit 17 O 1 *
+bit 16 O 1 *
+bit 15 O 1 *
+bit 14 O 1 *
+bit 13 O 1 *
+bit 12 O 1 *
+bit 11 O 1 *
+bit 10 O 1 *
+bit 9 O 1 *
+bit 8 O 1 *
+bit 7 O 1 *
+bit 6 O 1 *
+bit 5 I 1 IO_D22
+bit 4 O 1 IO_D22 3 1 Z
+bit 3 C 1 *
+bit 2 I 1 IO_E22
+bit 1 O 1 IO_E22 0 1 Z
+bit 0 C 1 *
--- /dev/null
+signal GND1
+signal GND2
+signal GND3
+signal GND4
+signal GND5
+signal GND6
+signal GND7
+signal GND8
+signal GND9
+signal GND10
+signal GND11
+signal GND12
+signal GND13
+signal GND14
+signal GND15
+signal GND16
+signal GND17
+signal GND18
+signal GND19
+signal GND20
+signal GND21
+signal GND22
+signal GND23
+signal GND24
+signal GND25
+signal GND26
+signal GND27
+signal GND28
+signal GND29
+signal GND30
+signal GND31
+signal GND32
+signal GND33
+signal GND34
+signal GND35
+signal GND36
+signal GND37
+signal GND38
+signal GND39
+signal GND40
+signal GND41
+signal GND42
+signal GND43
+signal GND44
+signal GND45
+signal GND46
+signal GND47
+signal GND48
+signal GND49
+signal GND50
+signal GND51
+signal GND52
+signal GND53
+signal GND54
+signal GND55
+signal GND56
+signal GND57
+signal GND58
+signal GND59
+signal GND60
+signal GND61
+signal GND62
+signal GND63
+signal GND64
+signal GND65
+signal GND66
+signal GND67
+signal GND68
+signal GND69
+signal GND70
+signal GND71
+signal GND72
+signal GND73
+signal GND74
+signal GND75
+signal GND76
+signal GND77
+signal GND78
+signal GND79
+signal GND80
+signal GND81
+signal GND82
+signal GND83
+signal GND84
+signal GND85
+signal GND86
+signal GND87
+signal GND88
+signal GND89
+signal GND90
+signal GND91
+signal GND92
+signal GND93
+signal GND94
+signal GND95
+signal GND96
+signal GND97
+signal GND98
+signal GND99
+signal GND100
+signal GND101
+signal GND102
+signal GND103
+signal GND104
+signal GND105
+signal GND106
+signal GND107
+signal GND108
+signal GND109
+signal GND110
+signal GND111
+signal GND112
+signal GND113
+signal GND114
+signal GND115
+signal GND116
+signal GND117
+signal GND118
+signal GND119
+signal GND120
+signal CCLK_AH28
+signal DONE_AJ28
+signal HSWAP_EN_A3
+signal M0_AJ3
+signal M1_AH3
+signal M2_AK3
+signal PROG_B
+signal TCK
+signal TDI
+signal TDO
+signal TMS
+signal VCCAUX1
+signal VCCAUX2
+signal VCCAUX3
+signal VCCAUX4
+signal VCCAUX5
+signal VCCAUX6
+signal VCCAUX7
+signal VCCAUX8
+signal VCCAUX9
+signal VCCAUX10
+signal VCCAUX11
+signal VCCAUX12
+signal VCCAUX13
+signal VCCAUX14
+signal VCCAUX15
+signal VCCAUX16
+signal VCCAUX17
+signal VCCAUX18
+signal VCCAUX19
+signal VCCAUX20
+signal VCCAUX21
+signal VCCAUX22
+signal VCCAUX23
+signal VCCAUX24
+signal VCCINT1
+signal VCCINT2
+signal VCCINT3
+signal VCCINT4
+signal VCCINT5
+signal VCCINT6
+signal VCCINT7
+signal VCCINT8
+signal VCCINT9
+signal VCCINT10
+signal VCCINT11
+signal VCCINT12
+signal VCCINT13
+signal VCCINT14
+signal VCCINT15
+signal VCCINT16
+signal VCCINT17
+signal VCCINT18
+signal VCCINT19
+signal VCCINT20
+signal VCCINT21
+signal VCCINT22
+signal VCCINT23
+signal VCCINT24
+signal VCCINT25
+signal VCCINT26
+signal VCCINT27
+signal VCCINT28
+signal VCCINT29
+signal VCCINT30
+signal VCCINT31
+signal VCCINT32
+signal VCCO01
+signal VCCO02
+signal VCCO03
+signal VCCO04
+signal VCCO05
+signal VCCO06
+signal VCCO07
+signal VCCO08
+signal VCCO09
+signal VCCO010
+signal VCCO11
+signal VCCO12
+signal VCCO13
+signal VCCO14
+signal VCCO15
+signal VCCO16
+signal VCCO17
+signal VCCO18
+signal VCCO19
+signal VCCO110
+signal VCCO21
+signal VCCO22
+signal VCCO23
+signal VCCO24
+signal VCCO25
+signal VCCO26
+signal VCCO27
+signal VCCO28
+signal VCCO29
+signal VCCO210
+signal VCCO31
+signal VCCO32
+signal VCCO33
+signal VCCO34
+signal VCCO35
+signal VCCO36
+signal VCCO37
+signal VCCO38
+signal VCCO39
+signal VCCO310
+signal VCCO41
+signal VCCO42
+signal VCCO43
+signal VCCO44
+signal VCCO45
+signal VCCO46
+signal VCCO47
+signal VCCO48
+signal VCCO49
+signal VCCO410
+signal VCCO51
+signal VCCO52
+signal VCCO53
+signal VCCO54
+signal VCCO55
+signal VCCO56
+signal VCCO57
+signal VCCO58
+signal VCCO59
+signal VCCO510
+signal VCCO61
+signal VCCO62
+signal VCCO63
+signal VCCO64
+signal VCCO65
+signal VCCO66
+signal VCCO67
+signal VCCO68
+signal VCCO69
+signal VCCO610
+signal VCCO71
+signal VCCO72
+signal VCCO73
+signal VCCO74
+signal VCCO75
+signal VCCO76
+signal VCCO77
+signal VCCO78
+signal VCCO79
+signal VCCO710
+signal IO_A4
+signal IO_A5
+signal IO_A7
+signal IO_A8
+signal IO_A9
+signal IO_A11
+signal IO_A12
+signal IO_A13
+signal IO_A15
+signal IO_A16
+signal IO_A18
+signal IO_A19
+signal IO_A20
+signal IO_A22
+signal IO_A23
+signal IO_A24
+signal IO_A26
+signal IO_A27
+signal IO_B4
+signal IO_B5
+signal IO_B6
+signal IO_B7
+signal IO_B8
+signal IO_B9
+signal IO_B10
+signal IO_B11
+signal IO_B12
+signal IO_B13
+signal IO_B14
+signal IO_B15
+signal IO_B16
+signal IO_B17
+signal IO_B18
+signal IO_B19
+signal IO_B20
+signal IO_B21
+signal IO_B22
+signal IO_B23
+signal IO_B24
+signal IO_B25
+signal IO_B26
+signal IO_B27
+signal IO_C1
+signal IO_C2
+signal IO_C4
+signal IO_C6
+signal IO_C7
+signal IO_C8
+signal IO_C10
+signal IO_C11
+signal IO_C12
+signal IO_C14
+signal IO_C15
+signal IO_C16
+signal IO_C17
+signal IO_C19
+signal IO_C20
+signal IO_C21
+signal IO_C23
+signal IO_C24
+signal IO_C25
+signal IO_C27
+signal IO_C29
+signal IO_C30
+signal IO_D1
+signal IO_D2
+signal IO_D3
+signal IO_D4
+signal IO_D5
+signal IO_D7
+signal IO_D8
+signal IO_D9
+signal IO_D11
+signal IO_D12
+signal IO_D13
+signal IO_D15
+signal IO_D16
+signal IO_D18
+signal IO_D19
+signal IO_D20
+signal IO_D22
+signal IO_D23
+signal IO_D24
+signal IO_D26
+signal IO_D27
+signal IO_D28
+signal IO_D29
+signal IO_D30
+signal IO_E1
+signal IO_E2
+signal IO_E4
+signal IO_E6
+signal IO_E8
+signal IO_E9
+signal IO_E11
+signal IO_E12
+signal IO_E13
+signal IO_E15
+signal IO_E16
+signal IO_E18
+signal IO_E19
+signal IO_E20
+signal IO_E22
+signal IO_E23
+signal IO_E25
+signal IO_E27
+signal IO_E29
+signal IO_E30
+signal IO_F2
+signal IO_F3
+signal IO_F5
+signal IO_F6
+signal IO_F7
+signal IO_F8
+signal IO_F9
+signal IO_F10
+signal IO_F11
+signal IO_F12
+signal IO_F13
+signal IO_F14
+signal IO_F15
+signal IO_F16
+signal IO_F17
+signal IO_F18
+signal IO_F19
+signal IO_F20
+signal IO_F21
+signal IO_F22
+signal IO_F23
+signal IO_F24
+signal IO_F25
+signal IO_F26
+signal IO_F28
+signal IO_F29
+signal IO_G1
+signal IO_G2
+signal IO_G3
+signal IO_G4
+signal IO_G6
+signal IO_G7
+signal IO_G8
+signal IO_G10
+signal IO_G11
+signal IO_G12
+signal IO_G14
+signal IO_G15
+signal IO_G16
+signal IO_G17
+signal IO_G19
+signal IO_G20
+signal IO_G21
+signal IO_G23
+signal IO_G24
+signal IO_G25
+signal IO_G27
+signal IO_G28
+signal IO_G29
+signal IO_G30
+signal IO_H1
+signal IO_H2
+signal IO_H3
+signal IO_H4
+signal IO_H5
+signal IO_H6
+signal IO_H7
+signal IO_H8
+signal IO_H9
+signal IO_H11
+signal IO_H12
+signal IO_H13
+signal IO_H15
+signal IO_H16
+signal IO_H18
+signal IO_H19
+signal IO_H20
+signal IO_H22
+signal IO_H23
+signal IO_H24
+signal IO_H25
+signal IO_H26
+signal IO_H27
+signal IO_H28
+signal IO_H29
+signal IO_H30
+signal IO_J1
+signal IO_J2
+signal IO_J4
+signal IO_J5
+signal IO_J6
+signal IO_J8
+signal IO_J9
+signal IO_J10
+signal IO_J12
+signal IO_J13
+signal IO_J14
+signal IO_J15
+signal IO_J16
+signal IO_J17
+signal IO_J18
+signal IO_J19
+signal IO_J21
+signal IO_J22
+signal IO_J23
+signal IO_J25
+signal IO_J26
+signal IO_J27
+signal IO_J29
+signal IO_J30
+signal IO_K2
+signal IO_K3
+signal IO_K6
+signal IO_K7
+signal IO_K9
+signal IO_K10
+signal IO_K11
+signal IO_K12
+signal IO_K13
+signal IO_K14
+signal IO_K15
+signal IO_K16
+signal IO_K17
+signal IO_K18
+signal IO_K19
+signal IO_K20
+signal IO_K21
+signal IO_K22
+signal IO_K24
+signal IO_K25
+signal IO_K28
+signal IO_K29
+signal IO_L1
+signal IO_L2
+signal IO_L3
+signal IO_L4
+signal IO_L5
+signal IO_L6
+signal IO_L7
+signal IO_L8
+signal IO_L10
+signal IO_L21
+signal IO_L23
+signal IO_L24
+signal IO_L25
+signal IO_L26
+signal IO_L27
+signal IO_L28
+signal IO_L29
+signal IO_L30
+signal IO_M1
+signal IO_M2
+signal IO_M3
+signal IO_M4
+signal IO_M5
+signal IO_M6
+signal IO_M7
+signal IO_M8
+signal IO_M9
+signal IO_M10
+signal IO_M21
+signal IO_M22
+signal IO_M23
+signal IO_M24
+signal IO_M25
+signal IO_M26
+signal IO_M27
+signal IO_M28
+signal IO_M29
+signal IO_M30
+signal IO_N1
+signal IO_N2
+signal IO_N4
+signal IO_N5
+signal IO_N6
+signal IO_N8
+signal IO_N9
+signal IO_N10
+signal IO_N21
+signal IO_N22
+signal IO_N23
+signal IO_N25
+signal IO_N26
+signal IO_N27
+signal IO_N29
+signal IO_N30
+signal IO_P2
+signal IO_P3
+signal IO_P6
+signal IO_P7
+signal IO_P9
+signal IO_P10
+signal IO_P21
+signal IO_P22
+signal IO_P24
+signal IO_P25
+signal IO_P28
+signal IO_P29
+signal IO_R1
+signal IO_R2
+signal IO_R3
+signal IO_R4
+signal IO_R5
+signal IO_R6
+signal IO_R7
+signal IO_R8
+signal IO_R9
+signal IO_R10
+signal IO_R21
+signal IO_R22
+signal IO_R23
+signal IO_R24
+signal IO_R25
+signal IO_R26
+signal IO_R27
+signal IO_R28
+signal IO_R29
+signal IO_R30
+signal IO_T1
+signal IO_T2
+signal IO_T3
+signal IO_T4
+signal IO_T5
+signal IO_T6
+signal IO_T7
+signal IO_T8
+signal IO_T9
+signal IO_T10
+signal IO_T21
+signal IO_T22
+signal IO_T23
+signal IO_T24
+signal IO_T25
+signal IO_T26
+signal IO_T27
+signal IO_T28
+signal IO_T29
+signal IO_T30
+signal IO_U2
+signal IO_U3
+signal IO_U6
+signal IO_U7
+signal IO_U9
+signal IO_U10
+signal IO_U21
+signal IO_U22
+signal IO_U24
+signal IO_U25
+signal IO_U28
+signal IO_U29
+signal IO_V1
+signal IO_V2
+signal IO_V4
+signal IO_V5
+signal IO_V6
+signal IO_V8
+signal IO_V9
+signal IO_V10
+signal IO_V21
+signal IO_V22
+signal IO_V23
+signal IO_V25
+signal IO_V26
+signal IO_V27
+signal IO_V29
+signal IO_V30
+signal IO_W1
+signal IO_W2
+signal IO_W3
+signal IO_W4
+signal IO_W5
+signal IO_W6
+signal IO_W7
+signal IO_W8
+signal IO_W9
+signal IO_W10
+signal IO_W21
+signal IO_W22
+signal IO_W23
+signal IO_W24
+signal IO_W25
+signal IO_W26
+signal IO_W27
+signal IO_W28
+signal IO_W29
+signal IO_W30
+signal IO_Y1
+signal IO_Y2
+signal IO_Y3
+signal IO_Y4
+signal IO_Y5
+signal IO_Y6
+signal IO_Y7
+signal IO_Y8
+signal IO_Y10
+signal IO_Y21
+signal IO_Y23
+signal IO_Y24
+signal IO_Y25
+signal IO_Y26
+signal IO_Y27
+signal IO_Y28
+signal IO_Y29
+signal IO_Y30
+signal IO_AA2
+signal IO_AA3
+signal IO_AA6
+signal IO_AA7
+signal IO_AA9
+signal IO_AA10
+signal IO_AA11
+signal IO_AA12
+signal IO_AA13
+signal IO_AA14
+signal IO_AA15
+signal IO_AA16
+signal IO_AA17
+signal IO_AA18
+signal IO_AA19
+signal IO_AA20
+signal IO_AA21
+signal IO_AA22
+signal IO_AA24
+signal IO_AA25
+signal IO_AA28
+signal IO_AA29
+signal IO_AB1
+signal IO_AB2
+signal IO_AB4
+signal IO_AB5
+signal IO_AB6
+signal IO_AB8
+signal IO_AB9
+signal IO_AB10
+signal IO_AB12
+signal IO_AB13
+signal IO_AB14
+signal IO_AB15
+signal IO_AB16
+signal IO_AB17
+signal IO_AB18
+signal IO_AB19
+signal IO_AB21
+signal IO_AB22
+signal IO_AB23
+signal IO_AB25
+signal IO_AB26
+signal IO_AB27
+signal IO_AB29
+signal IO_AB30
+signal IO_AC1
+signal IO_AC2
+signal IO_AC3
+signal IO_AC4
+signal IO_AC5
+signal IO_AC6
+signal IO_AC7
+signal IO_AC8
+signal IO_AC9
+signal IO_AC11
+signal IO_AC12
+signal IO_AC13
+signal IO_AC15
+signal IO_AC16
+signal IO_AC18
+signal IO_AC19
+signal IO_AC20
+signal IO_AC22
+signal IO_AC23
+signal IO_AC24
+signal IO_AC25
+signal IO_AC26
+signal IO_AC27
+signal IO_AC28
+signal IO_AC29
+signal IO_AC30
+signal IO_AD1
+signal IO_AD2
+signal IO_AD3
+signal IO_AD4
+signal IO_AD6
+signal IO_AD7
+signal IO_AD8
+signal IO_AD10
+signal IO_AD11
+signal IO_AD12
+signal IO_AD14
+signal IO_AD15
+signal IO_AD16
+signal IO_AD17
+signal IO_AD19
+signal IO_AD20
+signal IO_AD21
+signal IO_AD23
+signal IO_AD24
+signal IO_AD25
+signal IO_AD27
+signal IO_AD28
+signal IO_AD29
+signal IO_AD30
+signal IO_AE2
+signal IO_AE3
+signal IO_AE5
+signal IO_AE6
+signal IO_AE7
+signal IO_AE8
+signal IO_AE9
+signal IO_AE10
+signal IO_AE11
+signal IO_AE12
+signal IO_AE13
+signal IO_AE14
+signal IO_AE15
+signal IO_AE16
+signal IO_AE17
+signal IO_AE18
+signal IO_AE19
+signal IO_AE20
+signal IO_AE21
+signal IO_AE22
+signal IO_AE23
+signal IO_AE24
+signal IO_AE25
+signal IO_AE26
+signal IO_AE28
+signal IO_AE29
+signal IO_AF1
+signal IO_AF2
+signal IO_AF4
+signal IO_AF6
+signal IO_AF8
+signal IO_AF9
+signal IO_AF11
+signal IO_AF12
+signal IO_AF13
+signal IO_AF15
+signal IO_AF16
+signal IO_AF18
+signal IO_AF19
+signal IO_AF20
+signal IO_AF22
+signal IO_AF23
+signal IO_AF25
+signal IO_AF27
+signal IO_AF29
+signal IO_AF30
+signal IO_AG1
+signal IO_AG2
+signal IO_AG3
+signal IO_AG4
+signal IO_AG5
+signal IO_AG7
+signal IO_AG8
+signal IO_AG9
+signal IO_AG11
+signal IO_AG12
+signal IO_AG13
+signal IO_AG15
+signal IO_AG16
+signal IO_AG18
+signal IO_AG19
+signal IO_AG20
+signal IO_AG22
+signal IO_AG23
+signal IO_AG24
+signal IO_AG26
+signal IO_AG27
+signal IO_AG28
+signal IO_AG29
+signal IO_AG30
+signal IO_AH1
+signal IO_AH2
+signal IO_AH4
+signal IO_AH6
+signal IO_AH7
+signal IO_AH8
+signal IO_AH10
+signal IO_AH11
+signal IO_AH12
+signal IO_AH14
+signal IO_AH15
+signal IO_AH16
+signal IO_AH17
+signal IO_AH19
+signal IO_AH20
+signal IO_AH21
+signal IO_AH23
+signal IO_AH24
+signal IO_AH25
+signal IO_AH27
+signal IO_AH29
+signal IO_AH30
+signal IO_AJ4
+signal IO_AJ5
+signal IO_AJ6
+signal IO_AJ7
+signal IO_AJ8
+signal IO_AJ9
+signal IO_AJ10
+signal IO_AJ11
+signal IO_AJ12
+signal IO_AJ13
+signal IO_AJ14
+signal IO_AJ15
+signal IO_AJ16
+signal IO_AJ17
+signal IO_AJ18
+signal IO_AJ19
+signal IO_AJ20
+signal IO_AJ21
+signal IO_AJ22
+signal IO_AJ23
+signal IO_AJ24
+signal IO_AJ25
+signal IO_AJ26
+signal IO_AJ27
+signal IO_AK4
+signal IO_AK5
+signal IO_AK7
+signal IO_AK8
+signal IO_AK9
+signal IO_AK11
+signal IO_AK12
+signal IO_AK13
+signal IO_AK15
+signal IO_AK16
+signal IO_AK18
+signal IO_AK19
+signal IO_AK20
+signal IO_AK22
+signal IO_AK23
+signal IO_AK24
+signal IO_AK26
+signal IO_AK27
+
+register BSR 2243
+register BR 1
+register DIR 32
+
+instruction length 6
+
+instruction EXTEST 000000 BSR
+instruction SAMPLE/PRELOAD 000001 BSR
+instruction IDCODE 001001 DIR
+instruction BYPASS 111111 BR
+
+bit 2242 I 1 IO_C29
+bit 2241 O 1 IO_C29 2240 1 Z
+bit 2240 C 1 *
+bit 2239 I 1 IO_C30
+bit 2238 O 1 IO_C30 2237 1 Z
+bit 2237 C 1 *
+bit 2236 I 1 IO_D27
+bit 2235 O 1 IO_D27 2234 1 Z
+bit 2234 C 1 *
+bit 2233 I 1 IO_D28
+bit 2232 O 1 IO_D28 2231 1 Z
+bit 2231 C 1 *
+bit 2230 I 1 IO_D29
+bit 2229 O 1 IO_D29 2228 1 Z
+bit 2228 C 1 *
+bit 2227 I 1 IO_D30
+bit 2226 O 1 IO_D30 2225 1 Z
+bit 2225 C 1 *
+bit 2224 I 1 IO_E29
+bit 2223 O 1 IO_E29 2222 1 Z
+bit 2222 C 1 *
+bit 2221 I 1 IO_E30
+bit 2220 O 1 IO_E30 2219 1 Z
+bit 2219 C 1 *
+bit 2218 I 1 IO_E27
+bit 2217 O 1 IO_E27 2216 1 Z
+bit 2216 C 1 *
+bit 2215 I 1 IO_F26
+bit 2214 O 1 IO_F26 2213 1 Z
+bit 2213 C 1 *
+bit 2212 I 1 IO_F28
+bit 2211 O 1 IO_F28 2210 1 Z
+bit 2210 C 1 *
+bit 2209 I 1 IO_F29
+bit 2208 O 1 IO_F29 2207 1 Z
+bit 2207 C 1 *
+bit 2206 O 1 *
+bit 2205 O 1 *
+bit 2204 O 1 *
+bit 2203 O 1 *
+bit 2202 O 1 *
+bit 2201 O 1 *
+bit 2200 O 1 *
+bit 2199 O 1 *
+bit 2198 O 1 *
+bit 2197 O 1 *
+bit 2196 O 1 *
+bit 2195 O 1 *
+bit 2194 I 1 IO_G27
+bit 2193 O 1 IO_G27 2192 1 Z
+bit 2192 C 1 *
+bit 2191 I 1 IO_G28
+bit 2190 O 1 IO_G28 2189 1 Z
+bit 2189 C 1 *
+bit 2188 I 1 IO_G29
+bit 2187 O 1 IO_G29 2186 1 Z
+bit 2186 C 1 *
+bit 2185 I 1 IO_G30
+bit 2184 O 1 IO_G30 2183 1 Z
+bit 2183 C 1 *
+bit 2182 I 1 IO_G25
+bit 2181 O 1 IO_G25 2180 1 Z
+bit 2180 C 1 *
+bit 2179 I 1 IO_H24
+bit 2178 O 1 IO_H24 2177 1 Z
+bit 2177 C 1 *
+bit 2176 I 1 IO_H25
+bit 2175 O 1 IO_H25 2174 1 Z
+bit 2174 C 1 *
+bit 2173 I 1 IO_H26
+bit 2172 O 1 IO_H26 2171 1 Z
+bit 2171 C 1 *
+bit 2170 I 1 IO_H27
+bit 2169 O 1 IO_H27 2168 1 Z
+bit 2168 C 1 *
+bit 2167 I 1 IO_H28
+bit 2166 O 1 IO_H28 2165 1 Z
+bit 2165 C 1 *
+bit 2164 O 1 *
+bit 2163 O 1 *
+bit 2162 O 1 *
+bit 2161 I 1 IO_J25
+bit 2160 O 1 IO_J25 2159 1 Z
+bit 2159 C 1 *
+bit 2158 I 1 IO_H29
+bit 2157 O 1 IO_H29 2156 1 Z
+bit 2156 C 1 *
+bit 2155 I 1 IO_H30
+bit 2154 O 1 IO_H30 2153 1 Z
+bit 2153 C 1 *
+bit 2152 I 1 IO_J26
+bit 2151 O 1 IO_J26 2150 1 Z
+bit 2150 C 1 *
+bit 2149 I 1 IO_J27
+bit 2148 O 1 IO_J27 2147 1 Z
+bit 2147 C 1 *
+bit 2146 I 1 IO_J29
+bit 2145 O 1 IO_J29 2144 1 Z
+bit 2144 C 1 *
+bit 2143 I 1 IO_J30
+bit 2142 O 1 IO_J30 2141 1 Z
+bit 2141 C 1 *
+bit 2140 I 1 IO_J23
+bit 2139 O 1 IO_J23 2138 1 Z
+bit 2138 C 1 *
+bit 2137 I 1 IO_K22
+bit 2136 O 1 IO_K22 2135 1 Z
+bit 2135 C 1 *
+bit 2134 I 1 IO_K24
+bit 2133 O 1 IO_K24 2132 1 Z
+bit 2132 C 1 *
+bit 2131 I 1 IO_K25
+bit 2130 O 1 IO_K25 2129 1 Z
+bit 2129 C 1 *
+bit 2128 O 1 *
+bit 2127 O 1 *
+bit 2126 O 1 *
+bit 2125 O 1 *
+bit 2124 O 1 *
+bit 2123 O 1 *
+bit 2122 I 1 IO_K28
+bit 2121 O 1 IO_K28 2120 1 Z
+bit 2120 C 1 *
+bit 2119 I 1 IO_K29
+bit 2118 O 1 IO_K29 2117 1 Z
+bit 2117 C 1 *
+bit 2116 I 1 IO_K21
+bit 2115 O 1 IO_K21 2114 1 Z
+bit 2114 C 1 *
+bit 2113 I 1 IO_L21
+bit 2112 O 1 IO_L21 2111 1 Z
+bit 2111 C 1 *
+bit 2110 I 1 IO_L23
+bit 2109 O 1 IO_L23 2108 1 Z
+bit 2108 C 1 *
+bit 2107 I 1 IO_L24
+bit 2106 O 1 IO_L24 2105 1 Z
+bit 2105 C 1 *
+bit 2104 I 1 IO_L25
+bit 2103 O 1 IO_L25 2102 1 Z
+bit 2102 C 1 *
+bit 2101 I 1 IO_L26
+bit 2100 O 1 IO_L26 2099 1 Z
+bit 2099 C 1 *
+bit 2098 I 1 IO_L27
+bit 2097 O 1 IO_L27 2096 1 Z
+bit 2096 C 1 *
+bit 2095 I 1 IO_L28
+bit 2094 O 1 IO_L28 2093 1 Z
+bit 2093 C 1 *
+bit 2092 O 1 *
+bit 2091 O 1 *
+bit 2090 O 1 *
+bit 2089 O 1 *
+bit 2088 O 1 *
+bit 2087 O 1 *
+bit 2086 I 1 IO_L29
+bit 2085 O 1 IO_L29 2084 1 Z
+bit 2084 C 1 *
+bit 2083 I 1 IO_L30
+bit 2082 O 1 IO_L30 2081 1 Z
+bit 2081 C 1 *
+bit 2080 I 1 IO_M22
+bit 2079 O 1 IO_M22 2078 1 Z
+bit 2078 C 1 *
+bit 2077 I 1 IO_M23
+bit 2076 O 1 IO_M23 2075 1 Z
+bit 2075 C 1 *
+bit 2074 I 1 IO_M24
+bit 2073 O 1 IO_M24 2072 1 Z
+bit 2072 C 1 *
+bit 2071 I 1 IO_M25
+bit 2070 O 1 IO_M25 2069 1 Z
+bit 2069 C 1 *
+bit 2068 I 1 IO_M27
+bit 2067 O 1 IO_M27 2066 1 Z
+bit 2066 C 1 *
+bit 2065 I 1 IO_M28
+bit 2064 O 1 IO_M28 2063 1 Z
+bit 2063 C 1 *
+bit 2062 O 1 *
+bit 2061 O 1 *
+bit 2060 O 1 *
+bit 2059 O 1 *
+bit 2058 O 1 *
+bit 2057 O 1 *
+bit 2056 I 1 IO_M29
+bit 2055 O 1 IO_M29 2054 1 Z
+bit 2054 C 1 *
+bit 2053 I 1 IO_M30
+bit 2052 O 1 IO_M30 2051 1 Z
+bit 2051 C 1 *
+bit 2050 I 1 IO_M21
+bit 2049 O 1 IO_M21 2048 1 Z
+bit 2048 C 1 *
+bit 2047 I 1 IO_N21
+bit 2046 O 1 IO_N21 2045 1 Z
+bit 2045 C 1 *
+bit 2044 I 1 IO_N22
+bit 2043 O 1 IO_N22 2042 1 Z
+bit 2042 C 1 *
+bit 2041 I 1 IO_N23
+bit 2040 O 1 IO_N23 2039 1 Z
+bit 2039 C 1 *
+bit 2038 I 1 IO_M26
+bit 2037 O 1 IO_M26 2036 1 Z
+bit 2036 C 1 *
+bit 2035 I 1 IO_N25
+bit 2034 O 1 IO_N25 2033 1 Z
+bit 2033 C 1 *
+bit 2032 I 1 IO_N26
+bit 2031 O 1 IO_N26 2030 1 Z
+bit 2030 C 1 *
+bit 2029 I 1 IO_N27
+bit 2028 O 1 IO_N27 2027 1 Z
+bit 2027 C 1 *
+bit 2026 O 1 *
+bit 2025 O 1 *
+bit 2024 O 1 *
+bit 2023 O 1 *
+bit 2022 O 1 *
+bit 2021 O 1 *
+bit 2020 I 1 IO_N29
+bit 2019 O 1 IO_N29 2018 1 Z
+bit 2018 C 1 *
+bit 2017 I 1 IO_N30
+bit 2016 O 1 IO_N30 2015 1 Z
+bit 2015 C 1 *
+bit 2014 I 1 IO_P21
+bit 2013 O 1 IO_P21 2012 1 Z
+bit 2012 C 1 *
+bit 2011 I 1 IO_P22
+bit 2010 O 1 IO_P22 2009 1 Z
+bit 2009 C 1 *
+bit 2008 I 1 IO_P24
+bit 2007 O 1 IO_P24 2006 1 Z
+bit 2006 C 1 *
+bit 2005 I 1 IO_P25
+bit 2004 O 1 IO_P25 2003 1 Z
+bit 2003 C 1 *
+bit 2002 I 1 IO_P28
+bit 2001 O 1 IO_P28 2000 1 Z
+bit 2000 C 1 *
+bit 1999 I 1 IO_P29
+bit 1998 O 1 IO_P29 1997 1 Z
+bit 1997 C 1 *
+bit 1996 I 1 IO_R21
+bit 1995 O 1 IO_R21 1994 1 Z
+bit 1994 C 1 *
+bit 1993 I 1 IO_R22
+bit 1992 O 1 IO_R22 1991 1 Z
+bit 1991 C 1 *
+bit 1990 O 1 *
+bit 1989 O 1 *
+bit 1988 O 1 *
+bit 1987 O 1 *
+bit 1986 O 1 *
+bit 1985 O 1 *
+bit 1984 O 1 *
+bit 1983 O 1 *
+bit 1982 O 1 *
+bit 1981 O 1 *
+bit 1980 O 1 *
+bit 1979 O 1 *
+bit 1978 I 1 IO_R23
+bit 1977 O 1 IO_R23 1976 1 Z
+bit 1976 C 1 *
+bit 1975 I 1 IO_R24
+bit 1974 O 1 IO_R24 1973 1 Z
+bit 1973 C 1 *
+bit 1972 I 1 IO_R25
+bit 1971 O 1 IO_R25 1970 1 Z
+bit 1970 C 1 *
+bit 1969 I 1 IO_R26
+bit 1968 O 1 IO_R26 1967 1 Z
+bit 1967 C 1 *
+bit 1966 I 1 IO_R27
+bit 1965 O 1 IO_R27 1964 1 Z
+bit 1964 C 1 *
+bit 1963 I 1 IO_R28
+bit 1962 O 1 IO_R28 1961 1 Z
+bit 1961 C 1 *
+bit 1960 I 1 IO_R29
+bit 1959 O 1 IO_R29 1958 1 Z
+bit 1958 C 1 *
+bit 1957 I 1 IO_R30
+bit 1956 O 1 IO_R30 1955 1 Z
+bit 1955 C 1 *
+bit 1954 I 1 IO_T30
+bit 1953 O 1 IO_T30 1952 1 Z
+bit 1952 C 1 *
+bit 1951 I 1 IO_T29
+bit 1950 O 1 IO_T29 1949 1 Z
+bit 1949 C 1 *
+bit 1948 I 1 IO_T28
+bit 1947 O 1 IO_T28 1946 1 Z
+bit 1946 C 1 *
+bit 1945 I 1 IO_T27
+bit 1944 O 1 IO_T27 1943 1 Z
+bit 1943 C 1 *
+bit 1942 I 1 IO_T26
+bit 1941 O 1 IO_T26 1940 1 Z
+bit 1940 C 1 *
+bit 1939 I 1 IO_T25
+bit 1938 O 1 IO_T25 1937 1 Z
+bit 1937 C 1 *
+bit 1936 I 1 IO_T24
+bit 1935 O 1 IO_T24 1934 1 Z
+bit 1934 C 1 *
+bit 1933 I 1 IO_T23
+bit 1932 O 1 IO_T23 1931 1 Z
+bit 1931 C 1 *
+bit 1930 O 1 *
+bit 1929 O 1 *
+bit 1928 O 1 *
+bit 1927 O 1 *
+bit 1926 O 1 *
+bit 1925 O 1 *
+bit 1924 O 1 *
+bit 1923 O 1 *
+bit 1922 O 1 *
+bit 1921 O 1 *
+bit 1920 O 1 *
+bit 1919 O 1 *
+bit 1918 I 1 IO_T22
+bit 1917 O 1 IO_T22 1916 1 Z
+bit 1916 C 1 *
+bit 1915 I 1 IO_T21
+bit 1914 O 1 IO_T21 1913 1 Z
+bit 1913 C 1 *
+bit 1912 I 1 IO_U29
+bit 1911 O 1 IO_U29 1910 1 Z
+bit 1910 C 1 *
+bit 1909 I 1 IO_U28
+bit 1908 O 1 IO_U28 1907 1 Z
+bit 1907 C 1 *
+bit 1906 I 1 IO_U25
+bit 1905 O 1 IO_U25 1904 1 Z
+bit 1904 C 1 *
+bit 1903 I 1 IO_U24
+bit 1902 O 1 IO_U24 1901 1 Z
+bit 1901 C 1 *
+bit 1900 I 1 IO_U22
+bit 1899 O 1 IO_U22 1898 1 Z
+bit 1898 C 1 *
+bit 1897 I 1 IO_U21
+bit 1896 O 1 IO_U21 1895 1 Z
+bit 1895 C 1 *
+bit 1894 I 1 IO_V30
+bit 1893 O 1 IO_V30 1892 1 Z
+bit 1892 C 1 *
+bit 1891 I 1 IO_V29
+bit 1890 O 1 IO_V29 1889 1 Z
+bit 1889 C 1 *
+bit 1888 O 1 *
+bit 1887 O 1 *
+bit 1886 O 1 *
+bit 1885 O 1 *
+bit 1884 O 1 *
+bit 1883 O 1 *
+bit 1882 I 1 IO_V27
+bit 1881 O 1 IO_V27 1880 1 Z
+bit 1880 C 1 *
+bit 1879 I 1 IO_V26
+bit 1878 O 1 IO_V26 1877 1 Z
+bit 1877 C 1 *
+bit 1876 I 1 IO_V25
+bit 1875 O 1 IO_V25 1874 1 Z
+bit 1874 C 1 *
+bit 1873 I 1 IO_W26
+bit 1872 O 1 IO_W26 1871 1 Z
+bit 1871 C 1 *
+bit 1870 I 1 IO_V23
+bit 1869 O 1 IO_V23 1868 1 Z
+bit 1868 C 1 *
+bit 1867 I 1 IO_V22
+bit 1866 O 1 IO_V22 1865 1 Z
+bit 1865 C 1 *
+bit 1864 I 1 IO_V21
+bit 1863 O 1 IO_V21 1862 1 Z
+bit 1862 C 1 *
+bit 1861 I 1 IO_W21
+bit 1860 O 1 IO_W21 1859 1 Z
+bit 1859 C 1 *
+bit 1858 I 1 IO_W30
+bit 1857 O 1 IO_W30 1856 1 Z
+bit 1856 C 1 *
+bit 1855 I 1 IO_W29
+bit 1854 O 1 IO_W29 1853 1 Z
+bit 1853 C 1 *
+bit 1852 O 1 *
+bit 1851 O 1 *
+bit 1850 O 1 *
+bit 1849 O 1 *
+bit 1848 O 1 *
+bit 1847 O 1 *
+bit 1846 I 1 IO_W28
+bit 1845 O 1 IO_W28 1844 1 Z
+bit 1844 C 1 *
+bit 1843 I 1 IO_W27
+bit 1842 O 1 IO_W27 1841 1 Z
+bit 1841 C 1 *
+bit 1840 I 1 IO_W25
+bit 1839 O 1 IO_W25 1838 1 Z
+bit 1838 C 1 *
+bit 1837 I 1 IO_W24
+bit 1836 O 1 IO_W24 1835 1 Z
+bit 1835 C 1 *
+bit 1834 I 1 IO_W23
+bit 1833 O 1 IO_W23 1832 1 Z
+bit 1832 C 1 *
+bit 1831 I 1 IO_W22
+bit 1830 O 1 IO_W22 1829 1 Z
+bit 1829 C 1 *
+bit 1828 I 1 IO_Y30
+bit 1827 O 1 IO_Y30 1826 1 Z
+bit 1826 C 1 *
+bit 1825 I 1 IO_Y29
+bit 1824 O 1 IO_Y29 1823 1 Z
+bit 1823 C 1 *
+bit 1822 O 1 *
+bit 1821 O 1 *
+bit 1820 O 1 *
+bit 1819 O 1 *
+bit 1818 O 1 *
+bit 1817 O 1 *
+bit 1816 I 1 IO_Y28
+bit 1815 O 1 IO_Y28 1814 1 Z
+bit 1814 C 1 *
+bit 1813 I 1 IO_Y27
+bit 1812 O 1 IO_Y27 1811 1 Z
+bit 1811 C 1 *
+bit 1810 I 1 IO_Y26
+bit 1809 O 1 IO_Y26 1808 1 Z
+bit 1808 C 1 *
+bit 1807 I 1 IO_Y25
+bit 1806 O 1 IO_Y25 1805 1 Z
+bit 1805 C 1 *
+bit 1804 I 1 IO_Y24
+bit 1803 O 1 IO_Y24 1802 1 Z
+bit 1802 C 1 *
+bit 1801 I 1 IO_Y23
+bit 1800 O 1 IO_Y23 1799 1 Z
+bit 1799 C 1 *
+bit 1798 I 1 IO_Y21
+bit 1797 O 1 IO_Y21 1796 1 Z
+bit 1796 C 1 *
+bit 1795 I 1 IO_AA21
+bit 1794 O 1 IO_AA21 1793 1 Z
+bit 1793 C 1 *
+bit 1792 I 1 IO_AA29
+bit 1791 O 1 IO_AA29 1790 1 Z
+bit 1790 C 1 *
+bit 1789 I 1 IO_AA28
+bit 1788 O 1 IO_AA28 1787 1 Z
+bit 1787 C 1 *
+bit 1786 O 1 *
+bit 1785 O 1 *
+bit 1784 O 1 *
+bit 1783 O 1 *
+bit 1782 O 1 *
+bit 1781 O 1 *
+bit 1780 I 1 IO_AA25
+bit 1779 O 1 IO_AA25 1778 1 Z
+bit 1778 C 1 *
+bit 1777 I 1 IO_AA24
+bit 1776 O 1 IO_AA24 1775 1 Z
+bit 1775 C 1 *
+bit 1774 I 1 IO_AA22
+bit 1773 O 1 IO_AA22 1772 1 Z
+bit 1772 C 1 *
+bit 1771 I 1 IO_AB23
+bit 1770 O 1 IO_AB23 1769 1 Z
+bit 1769 C 1 *
+bit 1768 I 1 IO_AB30
+bit 1767 O 1 IO_AB30 1766 1 Z
+bit 1766 C 1 *
+bit 1765 I 1 IO_AB29
+bit 1764 O 1 IO_AB29 1763 1 Z
+bit 1763 C 1 *
+bit 1762 I 1 IO_AB27
+bit 1761 O 1 IO_AB27 1760 1 Z
+bit 1760 C 1 *
+bit 1759 I 1 IO_AB26
+bit 1758 O 1 IO_AB26 1757 1 Z
+bit 1757 C 1 *
+bit 1756 I 1 IO_AC30
+bit 1755 O 1 IO_AC30 1754 1 Z
+bit 1754 C 1 *
+bit 1753 I 1 IO_AC29
+bit 1752 O 1 IO_AC29 1751 1 Z
+bit 1751 C 1 *
+bit 1750 I 1 IO_AB25
+bit 1749 O 1 IO_AB25 1748 1 Z
+bit 1748 C 1 *
+bit 1747 O 1 *
+bit 1746 O 1 *
+bit 1745 O 1 *
+bit 1744 I 1 IO_AC28
+bit 1743 O 1 IO_AC28 1742 1 Z
+bit 1742 C 1 *
+bit 1741 I 1 IO_AC27
+bit 1740 O 1 IO_AC27 1739 1 Z
+bit 1739 C 1 *
+bit 1738 I 1 IO_AC26
+bit 1737 O 1 IO_AC26 1736 1 Z
+bit 1736 C 1 *
+bit 1735 I 1 IO_AC25
+bit 1734 O 1 IO_AC25 1733 1 Z
+bit 1733 C 1 *
+bit 1732 I 1 IO_AC24
+bit 1731 O 1 IO_AC24 1730 1 Z
+bit 1730 C 1 *
+bit 1729 I 1 IO_AD25
+bit 1728 O 1 IO_AD25 1727 1 Z
+bit 1727 C 1 *
+bit 1726 I 1 IO_AD30
+bit 1725 O 1 IO_AD30 1724 1 Z
+bit 1724 C 1 *
+bit 1723 I 1 IO_AD29
+bit 1722 O 1 IO_AD29 1721 1 Z
+bit 1721 C 1 *
+bit 1720 I 1 IO_AD28
+bit 1719 O 1 IO_AD28 1718 1 Z
+bit 1718 C 1 *
+bit 1717 I 1 IO_AD27
+bit 1716 O 1 IO_AD27 1715 1 Z
+bit 1715 C 1 *
+bit 1714 O 1 *
+bit 1713 O 1 *
+bit 1712 O 1 *
+bit 1711 O 1 *
+bit 1710 O 1 *
+bit 1709 O 1 *
+bit 1708 O 1 *
+bit 1707 O 1 *
+bit 1706 O 1 *
+bit 1705 O 1 *
+bit 1704 O 1 *
+bit 1703 O 1 *
+bit 1702 I 1 IO_AE29
+bit 1701 O 1 IO_AE29 1700 1 Z
+bit 1700 C 1 *
+bit 1699 I 1 IO_AE28
+bit 1698 O 1 IO_AE28 1697 1 Z
+bit 1697 C 1 *
+bit 1696 I 1 IO_AE26
+bit 1695 O 1 IO_AE26 1694 1 Z
+bit 1694 C 1 *
+bit 1693 I 1 IO_AF27
+bit 1692 O 1 IO_AF27 1691 1 Z
+bit 1691 C 1 *
+bit 1690 I 1 IO_AF30
+bit 1689 O 1 IO_AF30 1688 1 Z
+bit 1688 C 1 *
+bit 1687 I 1 IO_AF29
+bit 1686 O 1 IO_AF29 1685 1 Z
+bit 1685 C 1 *
+bit 1684 I 1 IO_AG30
+bit 1683 O 1 IO_AG30 1682 1 Z
+bit 1682 C 1 *
+bit 1681 I 1 IO_AG29
+bit 1680 O 1 IO_AG29 1679 1 Z
+bit 1679 C 1 *
+bit 1678 I 1 IO_AG28
+bit 1677 O 1 IO_AG28 1676 1 Z
+bit 1676 C 1 *
+bit 1675 I 1 IO_AG27
+bit 1674 O 1 IO_AG27 1673 1 Z
+bit 1673 C 1 *
+bit 1672 I 1 IO_AH30
+bit 1671 O 1 IO_AH30 1670 1 Z
+bit 1670 C 1 *
+bit 1669 I 1 IO_AH29
+bit 1668 O 1 IO_AH29 1667 1 Z
+bit 1667 C 1 *
+bit 1666 I 1 CCLK_AH28
+bit 1665 O 1 CCLK_AH28 1664 1 Z
+bit 1664 C 1 *
+bit 1663 I 1 DONE_AJ28
+bit 1662 O 1 DONE_AJ28 1661 1 Z
+bit 1661 C 1 *
+bit 1660 I 1 IO_AK28
+bit 1659 O 1 IO_AK28 1658 1 Z
+bit 1658 C 1 *
+bit 1657 I 1 IO_AJ27
+bit 1656 O 1 IO_AJ27 1655 1 Z
+bit 1655 C 1 *
+bit 1654 I 1 IO_AK27
+bit 1653 O 1 IO_AK27 1652 1 Z
+bit 1652 C 1 *
+bit 1651 I 1 IO_AJ26
+bit 1650 O 1 IO_AJ26 1649 1 Z
+bit 1649 C 1 *
+bit 1648 I 1 IO_AK26
+bit 1647 O 1 IO_AK26 1646 1 Z
+bit 1646 C 1 *
+bit 1645 I 1 IO_AH27
+bit 1644 O 1 IO_AH27 1643 1 Z
+bit 1643 C 1 *
+bit 1642 I 1 IO_AG26
+bit 1641 O 1 IO_AG26 1640 1 Z
+bit 1640 C 1 *
+bit 1639 I 1 IO_AF25
+bit 1638 O 1 IO_AF25 1637 1 Z
+bit 1637 C 1 *
+bit 1636 I 1 IO_AH25
+bit 1635 O 1 IO_AH25 1634 1 Z
+bit 1634 C 1 *
+bit 1633 I 1 IO_AJ25
+bit 1632 O 1 IO_AJ25 1631 1 Z
+bit 1631 C 1 *
+bit 1630 O 1 *
+bit 1629 O 1 *
+bit 1628 O 1 *
+bit 1627 I 1 IO_AE25
+bit 1626 O 1 IO_AE25 1625 1 Z
+bit 1625 C 1 *
+bit 1624 I 1 IO_AE24
+bit 1623 O 1 IO_AE24 1622 1 Z
+bit 1622 C 1 *
+bit 1621 I 1 IO_AG24
+bit 1620 O 1 IO_AG24 1619 1 Z
+bit 1619 C 1 *
+bit 1618 I 1 IO_AH24
+bit 1617 O 1 IO_AH24 1616 1 Z
+bit 1616 C 1 *
+bit 1615 O 1 *
+bit 1614 O 1 *
+bit 1613 O 1 *
+bit 1612 I 1 IO_AJ24
+bit 1611 O 1 IO_AJ24 1610 1 Z
+bit 1610 C 1 *
+bit 1609 I 1 IO_AK24
+bit 1608 O 1 IO_AK24 1607 1 Z
+bit 1607 C 1 *
+bit 1606 I 1 IO_AD24
+bit 1605 O 1 IO_AD24 1604 1 Z
+bit 1604 C 1 *
+bit 1603 I 1 IO_AC23
+bit 1602 O 1 IO_AC23 1601 1 Z
+bit 1601 C 1 *
+bit 1600 I 1 IO_AD23
+bit 1599 O 1 IO_AD23 1598 1 Z
+bit 1598 C 1 *
+bit 1597 I 1 IO_AE23
+bit 1596 O 1 IO_AE23 1595 1 Z
+bit 1595 C 1 *
+bit 1594 I 1 IO_AF23
+bit 1593 O 1 IO_AF23 1592 1 Z
+bit 1592 C 1 *
+bit 1591 I 1 IO_AG23
+bit 1590 O 1 IO_AG23 1589 1 Z
+bit 1589 C 1 *
+bit 1588 I 1 IO_AH23
+bit 1587 O 1 IO_AH23 1586 1 Z
+bit 1586 C 1 *
+bit 1585 O 1 *
+bit 1584 O 1 *
+bit 1583 O 1 *
+bit 1582 I 1 IO_AJ23
+bit 1581 O 1 IO_AJ23 1580 1 Z
+bit 1580 C 1 *
+bit 1579 I 1 IO_AK23
+bit 1578 O 1 IO_AK23 1577 1 Z
+bit 1577 C 1 *
+bit 1576 I 1 IO_AB22
+bit 1575 O 1 IO_AB22 1574 1 Z
+bit 1574 C 1 *
+bit 1573 I 1 IO_AC22
+bit 1572 O 1 IO_AC22 1571 1 Z
+bit 1571 C 1 *
+bit 1570 I 1 IO_AE22
+bit 1569 O 1 IO_AE22 1568 1 Z
+bit 1568 C 1 *
+bit 1567 I 1 IO_AF22
+bit 1566 O 1 IO_AF22 1565 1 Z
+bit 1565 C 1 *
+bit 1564 I 1 IO_AG22
+bit 1563 O 1 IO_AG22 1562 1 Z
+bit 1562 C 1 *
+bit 1561 I 1 IO_AJ22
+bit 1560 O 1 IO_AJ22 1559 1 Z
+bit 1559 C 1 *
+bit 1558 I 1 IO_AK22
+bit 1557 O 1 IO_AK22 1556 1 Z
+bit 1556 C 1 *
+bit 1555 O 1 *
+bit 1554 O 1 *
+bit 1553 O 1 *
+bit 1552 I 1 IO_AD21
+bit 1551 O 1 IO_AD21 1550 1 Z
+bit 1550 C 1 *
+bit 1549 I 1 IO_AE21
+bit 1548 O 1 IO_AE21 1547 1 Z
+bit 1547 C 1 *
+bit 1546 I 1 IO_AH21
+bit 1545 O 1 IO_AH21 1544 1 Z
+bit 1544 C 1 *
+bit 1543 I 1 IO_AJ21
+bit 1542 O 1 IO_AJ21 1541 1 Z
+bit 1541 C 1 *
+bit 1540 O 1 *
+bit 1539 O 1 *
+bit 1538 O 1 *
+bit 1537 I 1 IO_AB21
+bit 1536 O 1 IO_AB21 1535 1 Z
+bit 1535 C 1 *
+bit 1534 I 1 IO_AA20
+bit 1533 O 1 IO_AA20 1532 1 Z
+bit 1532 C 1 *
+bit 1531 I 1 IO_AC20
+bit 1530 O 1 IO_AC20 1529 1 Z
+bit 1529 C 1 *
+bit 1528 I 1 IO_AD20
+bit 1527 O 1 IO_AD20 1526 1 Z
+bit 1526 C 1 *
+bit 1525 O 1 *
+bit 1524 O 1 *
+bit 1523 O 1 *
+bit 1522 I 1 IO_AE20
+bit 1521 O 1 IO_AE20 1520 1 Z
+bit 1520 C 1 *
+bit 1519 I 1 IO_AF20
+bit 1518 O 1 IO_AF20 1517 1 Z
+bit 1517 C 1 *
+bit 1516 I 1 IO_AG20
+bit 1515 O 1 IO_AG20 1514 1 Z
+bit 1514 C 1 *
+bit 1513 I 1 IO_AH20
+bit 1512 O 1 IO_AH20 1511 1 Z
+bit 1511 C 1 *
+bit 1510 O 1 *
+bit 1509 O 1 *
+bit 1508 O 1 *
+bit 1507 I 1 IO_AJ20
+bit 1506 O 1 IO_AJ20 1505 1 Z
+bit 1505 C 1 *
+bit 1504 I 1 IO_AK20
+bit 1503 O 1 IO_AK20 1502 1 Z
+bit 1502 C 1 *
+bit 1501 I 1 IO_AA19
+bit 1500 O 1 IO_AA19 1499 1 Z
+bit 1499 C 1 *
+bit 1498 I 1 IO_AB19
+bit 1497 O 1 IO_AB19 1496 1 Z
+bit 1496 C 1 *
+bit 1495 O 1 *
+bit 1494 O 1 *
+bit 1493 O 1 *
+bit 1492 I 1 IO_AC19
+bit 1491 O 1 IO_AC19 1490 1 Z
+bit 1490 C 1 *
+bit 1489 I 1 IO_AD19
+bit 1488 O 1 IO_AD19 1487 1 Z
+bit 1487 C 1 *
+bit 1486 I 1 IO_AE19
+bit 1485 O 1 IO_AE19 1484 1 Z
+bit 1484 C 1 *
+bit 1483 I 1 IO_AF19
+bit 1482 O 1 IO_AF19 1481 1 Z
+bit 1481 C 1 *
+bit 1480 O 1 *
+bit 1479 O 1 *
+bit 1478 O 1 *
+bit 1477 I 1 IO_AG19
+bit 1476 O 1 IO_AG19 1475 1 Z
+bit 1475 C 1 *
+bit 1474 I 1 IO_AH19
+bit 1473 O 1 IO_AH19 1472 1 Z
+bit 1472 C 1 *
+bit 1471 I 1 IO_AJ19
+bit 1470 O 1 IO_AJ19 1469 1 Z
+bit 1469 C 1 *
+bit 1468 I 1 IO_AK19
+bit 1467 O 1 IO_AK19 1466 1 Z
+bit 1466 C 1 *
+bit 1465 I 1 IO_AA18
+bit 1464 O 1 IO_AA18 1463 1 Z
+bit 1463 C 1 *
+bit 1462 I 1 IO_AB18
+bit 1461 O 1 IO_AB18 1460 1 Z
+bit 1460 C 1 *
+bit 1459 I 1 IO_AC18
+bit 1458 O 1 IO_AC18 1457 1 Z
+bit 1457 C 1 *
+bit 1456 I 1 IO_AE18
+bit 1455 O 1 IO_AE18 1454 1 Z
+bit 1454 C 1 *
+bit 1453 I 1 IO_AF18
+bit 1452 O 1 IO_AF18 1451 1 Z
+bit 1451 C 1 *
+bit 1450 I 1 IO_AG18
+bit 1449 O 1 IO_AG18 1448 1 Z
+bit 1448 C 1 *
+bit 1447 I 1 IO_AJ18
+bit 1446 O 1 IO_AJ18 1445 1 Z
+bit 1445 C 1 *
+bit 1444 I 1 IO_AK18
+bit 1443 O 1 IO_AK18 1442 1 Z
+bit 1442 C 1 *
+bit 1441 I 1 IO_AA17
+bit 1440 O 1 IO_AA17 1439 1 Z
+bit 1439 C 1 *
+bit 1438 I 1 IO_AB17
+bit 1437 O 1 IO_AB17 1436 1 Z
+bit 1436 C 1 *
+bit 1435 I 1 IO_AA16
+bit 1434 O 1 IO_AA16 1433 1 Z
+bit 1433 C 1 *
+bit 1432 I 1 IO_AD17
+bit 1431 O 1 IO_AD17 1430 1 Z
+bit 1430 C 1 *
+bit 1429 I 1 IO_AE17
+bit 1428 O 1 IO_AE17 1427 1 Z
+bit 1427 C 1 *
+bit 1426 I 1 IO_AH17
+bit 1425 O 1 IO_AH17 1424 1 Z
+bit 1424 C 1 *
+bit 1423 I 1 IO_AJ17
+bit 1422 O 1 IO_AJ17 1421 1 Z
+bit 1421 C 1 *
+bit 1420 O 1 *
+bit 1419 O 1 *
+bit 1418 O 1 *
+bit 1417 I 1 IO_AB16
+bit 1416 O 1 IO_AB16 1415 1 Z
+bit 1415 C 1 *
+bit 1414 I 1 IO_AC16
+bit 1413 O 1 IO_AC16 1412 1 Z
+bit 1412 C 1 *
+bit 1411 I 1 IO_AD16
+bit 1410 O 1 IO_AD16 1409 1 Z
+bit 1409 C 1 *
+bit 1408 I 1 IO_AE16
+bit 1407 O 1 IO_AE16 1406 1 Z
+bit 1406 C 1 *
+bit 1405 I 1 IO_AF16
+bit 1404 O 1 IO_AF16 1403 1 Z
+bit 1403 C 1 *
+bit 1402 I 1 IO_AG16
+bit 1401 O 1 IO_AG16 1400 1 Z
+bit 1400 C 1 *
+bit 1399 I 1 IO_AH16
+bit 1398 O 1 IO_AH16 1397 1 Z
+bit 1397 C 1 *
+bit 1396 I 1 IO_AJ16
+bit 1395 O 1 IO_AJ16 1394 1 Z
+bit 1394 C 1 *
+bit 1393 I 1 IO_AK16
+bit 1392 O 1 IO_AK16 1391 1 Z
+bit 1391 C 1 *
+bit 1390 I 1 IO_AK15
+bit 1389 O 1 IO_AK15 1388 1 Z
+bit 1388 C 1 *
+bit 1387 I 1 IO_AJ15
+bit 1386 O 1 IO_AJ15 1385 1 Z
+bit 1385 C 1 *
+bit 1384 I 1 IO_AH15
+bit 1383 O 1 IO_AH15 1382 1 Z
+bit 1382 C 1 *
+bit 1381 I 1 IO_AG15
+bit 1380 O 1 IO_AG15 1379 1 Z
+bit 1379 C 1 *
+bit 1378 I 1 IO_AF15
+bit 1377 O 1 IO_AF15 1376 1 Z
+bit 1376 C 1 *
+bit 1375 I 1 IO_AE15
+bit 1374 O 1 IO_AE15 1373 1 Z
+bit 1373 C 1 *
+bit 1372 I 1 IO_AD15
+bit 1371 O 1 IO_AD15 1370 1 Z
+bit 1370 C 1 *
+bit 1369 I 1 IO_AD14
+bit 1368 O 1 IO_AD14 1367 1 Z
+bit 1367 C 1 *
+bit 1366 I 1 IO_AC15
+bit 1365 O 1 IO_AC15 1364 1 Z
+bit 1364 C 1 *
+bit 1363 I 1 IO_AB15
+bit 1362 O 1 IO_AB15 1361 1 Z
+bit 1361 C 1 *
+bit 1360 I 1 IO_AA15
+bit 1359 O 1 IO_AA15 1358 1 Z
+bit 1358 C 1 *
+bit 1357 I 1 IO_AJ14
+bit 1356 O 1 IO_AJ14 1355 1 Z
+bit 1355 C 1 *
+bit 1354 I 1 IO_AH14
+bit 1353 O 1 IO_AH14 1352 1 Z
+bit 1352 C 1 *
+bit 1351 I 1 IO_AE14
+bit 1350 O 1 IO_AE14 1349 1 Z
+bit 1349 C 1 *
+bit 1348 I 1 IO_AE13
+bit 1347 O 1 IO_AE13 1346 1 Z
+bit 1346 C 1 *
+bit 1345 O 1 *
+bit 1344 O 1 *
+bit 1343 O 1 *
+bit 1342 I 1 IO_AB14
+bit 1341 O 1 IO_AB14 1340 1 Z
+bit 1340 C 1 *
+bit 1339 I 1 IO_AA14
+bit 1338 O 1 IO_AA14 1337 1 Z
+bit 1337 C 1 *
+bit 1336 I 1 IO_AK13
+bit 1335 O 1 IO_AK13 1334 1 Z
+bit 1334 C 1 *
+bit 1333 I 1 IO_AJ13
+bit 1332 O 1 IO_AJ13 1331 1 Z
+bit 1331 C 1 *
+bit 1330 O 1 *
+bit 1329 O 1 *
+bit 1328 O 1 *
+bit 1327 I 1 IO_AG13
+bit 1326 O 1 IO_AG13 1325 1 Z
+bit 1325 C 1 *
+bit 1324 I 1 IO_AF13
+bit 1323 O 1 IO_AF13 1322 1 Z
+bit 1322 C 1 *
+bit 1321 I 1 IO_AC13
+bit 1320 O 1 IO_AC13 1319 1 Z
+bit 1319 C 1 *
+bit 1318 I 1 IO_AB13
+bit 1317 O 1 IO_AB13 1316 1 Z
+bit 1316 C 1 *
+bit 1315 O 1 *
+bit 1314 O 1 *
+bit 1313 O 1 *
+bit 1312 I 1 IO_AA13
+bit 1311 O 1 IO_AA13 1310 1 Z
+bit 1310 C 1 *
+bit 1309 I 1 IO_AA12
+bit 1308 O 1 IO_AA12 1307 1 Z
+bit 1307 C 1 *
+bit 1306 I 1 IO_AK12
+bit 1305 O 1 IO_AK12 1304 1 Z
+bit 1304 C 1 *
+bit 1303 I 1 IO_AJ12
+bit 1302 O 1 IO_AJ12 1301 1 Z
+bit 1301 C 1 *
+bit 1300 O 1 *
+bit 1299 O 1 *
+bit 1298 O 1 *
+bit 1297 I 1 IO_AH12
+bit 1296 O 1 IO_AH12 1295 1 Z
+bit 1295 C 1 *
+bit 1294 I 1 IO_AG12
+bit 1293 O 1 IO_AG12 1292 1 Z
+bit 1292 C 1 *
+bit 1291 I 1 IO_AF12
+bit 1290 O 1 IO_AF12 1289 1 Z
+bit 1289 C 1 *
+bit 1288 I 1 IO_AE12
+bit 1287 O 1 IO_AE12 1286 1 Z
+bit 1286 C 1 *
+bit 1285 O 1 *
+bit 1284 O 1 *
+bit 1283 O 1 *
+bit 1282 I 1 IO_AD12
+bit 1281 O 1 IO_AD12 1280 1 Z
+bit 1280 C 1 *
+bit 1279 I 1 IO_AC12
+bit 1278 O 1 IO_AC12 1277 1 Z
+bit 1277 C 1 *
+bit 1276 I 1 IO_AB12
+bit 1275 O 1 IO_AB12 1274 1 Z
+bit 1274 C 1 *
+bit 1273 I 1 IO_AC11
+bit 1272 O 1 IO_AC11 1271 1 Z
+bit 1271 C 1 *
+bit 1270 O 1 *
+bit 1269 O 1 *
+bit 1268 O 1 *
+bit 1267 I 1 IO_AK11
+bit 1266 O 1 IO_AK11 1265 1 Z
+bit 1265 C 1 *
+bit 1264 I 1 IO_AJ11
+bit 1263 O 1 IO_AJ11 1262 1 Z
+bit 1262 C 1 *
+bit 1261 I 1 IO_AH11
+bit 1260 O 1 IO_AH11 1259 1 Z
+bit 1259 C 1 *
+bit 1258 I 1 IO_AG11
+bit 1257 O 1 IO_AG11 1256 1 Z
+bit 1256 C 1 *
+bit 1255 O 1 *
+bit 1254 O 1 *
+bit 1253 O 1 *
+bit 1252 I 1 IO_AF11
+bit 1251 O 1 IO_AF11 1250 1 Z
+bit 1250 C 1 *
+bit 1249 I 1 IO_AE11
+bit 1248 O 1 IO_AE11 1247 1 Z
+bit 1247 C 1 *
+bit 1246 I 1 IO_AD11
+bit 1245 O 1 IO_AD11 1244 1 Z
+bit 1244 C 1 *
+bit 1243 I 1 IO_AD10
+bit 1242 O 1 IO_AD10 1241 1 Z
+bit 1241 C 1 *
+bit 1240 I 1 IO_AA11
+bit 1239 O 1 IO_AA11 1238 1 Z
+bit 1238 C 1 *
+bit 1237 I 1 IO_AJ10
+bit 1236 O 1 IO_AJ10 1235 1 Z
+bit 1235 C 1 *
+bit 1234 I 1 IO_AH10
+bit 1233 O 1 IO_AH10 1232 1 Z
+bit 1232 C 1 *
+bit 1231 I 1 IO_AE10
+bit 1230 O 1 IO_AE10 1229 1 Z
+bit 1229 C 1 *
+bit 1228 I 1 IO_AE9
+bit 1227 O 1 IO_AE9 1226 1 Z
+bit 1226 C 1 *
+bit 1225 I 1 IO_AB10
+bit 1224 O 1 IO_AB10 1223 1 Z
+bit 1223 C 1 *
+bit 1222 I 1 IO_AK9
+bit 1221 O 1 IO_AK9 1220 1 Z
+bit 1220 C 1 *
+bit 1219 I 1 IO_AJ9
+bit 1218 O 1 IO_AJ9 1217 1 Z
+bit 1217 C 1 *
+bit 1216 I 1 IO_AG9
+bit 1215 O 1 IO_AG9 1214 1 Z
+bit 1214 C 1 *
+bit 1213 I 1 IO_AF9
+bit 1212 O 1 IO_AF9 1211 1 Z
+bit 1211 C 1 *
+bit 1210 O 1 *
+bit 1209 O 1 *
+bit 1208 O 1 *
+bit 1207 I 1 IO_AC9
+bit 1206 O 1 IO_AC9 1205 1 Z
+bit 1205 C 1 *
+bit 1204 I 1 IO_AB9
+bit 1203 O 1 IO_AB9 1202 1 Z
+bit 1202 C 1 *
+bit 1201 I 1 IO_AK8
+bit 1200 O 1 IO_AK8 1199 1 Z
+bit 1199 C 1 *
+bit 1198 I 1 IO_AJ8
+bit 1197 O 1 IO_AJ8 1196 1 Z
+bit 1196 C 1 *
+bit 1195 O 1 *
+bit 1194 O 1 *
+bit 1193 O 1 *
+bit 1192 I 1 IO_AH8
+bit 1191 O 1 IO_AH8 1190 1 Z
+bit 1190 C 1 *
+bit 1189 I 1 IO_AG8
+bit 1188 O 1 IO_AG8 1187 1 Z
+bit 1187 C 1 *
+bit 1186 I 1 IO_AF8
+bit 1185 O 1 IO_AF8 1184 1 Z
+bit 1184 C 1 *
+bit 1183 I 1 IO_AE8
+bit 1182 O 1 IO_AE8 1181 1 Z
+bit 1181 C 1 *
+bit 1180 O 1 *
+bit 1179 O 1 *
+bit 1178 O 1 *
+bit 1177 I 1 IO_AD8
+bit 1176 O 1 IO_AD8 1175 1 Z
+bit 1175 C 1 *
+bit 1174 I 1 IO_AC8
+bit 1173 O 1 IO_AC8 1172 1 Z
+bit 1172 C 1 *
+bit 1171 I 1 IO_AK7
+bit 1170 O 1 IO_AK7 1169 1 Z
+bit 1169 C 1 *
+bit 1168 I 1 IO_AJ7
+bit 1167 O 1 IO_AJ7 1166 1 Z
+bit 1166 C 1 *
+bit 1165 O 1 *
+bit 1164 O 1 *
+bit 1163 O 1 *
+bit 1162 I 1 IO_AH7
+bit 1161 O 1 IO_AH7 1160 1 Z
+bit 1160 C 1 *
+bit 1159 I 1 IO_AG7
+bit 1158 O 1 IO_AG7 1157 1 Z
+bit 1157 C 1 *
+bit 1156 I 1 IO_AE7
+bit 1155 O 1 IO_AE7 1154 1 Z
+bit 1154 C 1 *
+bit 1153 I 1 IO_AD7
+bit 1152 O 1 IO_AD7 1151 1 Z
+bit 1151 C 1 *
+bit 1150 I 1 IO_AE6
+bit 1149 O 1 IO_AE6 1148 1 Z
+bit 1148 C 1 *
+bit 1147 I 1 IO_AJ6
+bit 1146 O 1 IO_AJ6 1145 1 Z
+bit 1145 C 1 *
+bit 1144 I 1 IO_AH6
+bit 1143 O 1 IO_AH6 1142 1 Z
+bit 1142 C 1 *
+bit 1141 I 1 IO_AF6
+bit 1140 O 1 IO_AF6 1139 1 Z
+bit 1139 C 1 *
+bit 1138 I 1 IO_AG5
+bit 1137 O 1 IO_AG5 1136 1 Z
+bit 1136 C 1 *
+bit 1135 I 1 IO_AH4
+bit 1134 O 1 IO_AH4 1133 1 Z
+bit 1133 C 1 *
+bit 1132 I 1 IO_AK5
+bit 1131 O 1 IO_AK5 1130 1 Z
+bit 1130 C 1 *
+bit 1129 I 1 IO_AJ5
+bit 1128 O 1 IO_AJ5 1127 1 Z
+bit 1127 C 1 *
+bit 1126 I 1 IO_AK4
+bit 1125 O 1 IO_AK4 1124 1 Z
+bit 1124 C 1 *
+bit 1123 I 1 IO_AJ4
+bit 1122 O 1 IO_AJ4 1121 1 Z
+bit 1121 C 1 *
+bit 1120 I 1 M2_AK3
+bit 1119 I 1 M0_AJ3
+bit 1118 I 1 M1_AH3
+bit 1117 I 1 IO_AH2
+bit 1116 O 1 IO_AH2 1115 1 Z
+bit 1115 C 1 *
+bit 1114 I 1 IO_AH1
+bit 1113 O 1 IO_AH1 1112 1 Z
+bit 1112 C 1 *
+bit 1111 I 1 IO_AG4
+bit 1110 O 1 IO_AG4 1109 1 Z
+bit 1109 C 1 *
+bit 1108 I 1 IO_AG3
+bit 1107 O 1 IO_AG3 1106 1 Z
+bit 1106 C 1 *
+bit 1105 I 1 IO_AG2
+bit 1104 O 1 IO_AG2 1103 1 Z
+bit 1103 C 1 *
+bit 1102 I 1 IO_AG1
+bit 1101 O 1 IO_AG1 1100 1 Z
+bit 1100 C 1 *
+bit 1099 I 1 IO_AF2
+bit 1098 O 1 IO_AF2 1097 1 Z
+bit 1097 C 1 *
+bit 1096 I 1 IO_AF1
+bit 1095 O 1 IO_AF1 1094 1 Z
+bit 1094 C 1 *
+bit 1093 I 1 IO_AF4
+bit 1092 O 1 IO_AF4 1091 1 Z
+bit 1091 C 1 *
+bit 1090 I 1 IO_AE5
+bit 1089 O 1 IO_AE5 1088 1 Z
+bit 1088 C 1 *
+bit 1087 I 1 IO_AE3
+bit 1086 O 1 IO_AE3 1085 1 Z
+bit 1085 C 1 *
+bit 1084 I 1 IO_AE2
+bit 1083 O 1 IO_AE2 1082 1 Z
+bit 1082 C 1 *
+bit 1081 O 1 *
+bit 1080 O 1 *
+bit 1079 O 1 *
+bit 1078 O 1 *
+bit 1077 O 1 *
+bit 1076 O 1 *
+bit 1075 O 1 *
+bit 1074 O 1 *
+bit 1073 O 1 *
+bit 1072 O 1 *
+bit 1071 O 1 *
+bit 1070 O 1 *
+bit 1069 I 1 IO_AD4
+bit 1068 O 1 IO_AD4 1067 1 Z
+bit 1067 C 1 *
+bit 1066 I 1 IO_AD3
+bit 1065 O 1 IO_AD3 1064 1 Z
+bit 1064 C 1 *
+bit 1063 I 1 IO_AD2
+bit 1062 O 1 IO_AD2 1061 1 Z
+bit 1061 C 1 *
+bit 1060 I 1 IO_AD1
+bit 1059 O 1 IO_AD1 1058 1 Z
+bit 1058 C 1 *
+bit 1057 I 1 IO_AD6
+bit 1056 O 1 IO_AD6 1055 1 Z
+bit 1055 C 1 *
+bit 1054 I 1 IO_AC7
+bit 1053 O 1 IO_AC7 1052 1 Z
+bit 1052 C 1 *
+bit 1051 I 1 IO_AC6
+bit 1050 O 1 IO_AC6 1049 1 Z
+bit 1049 C 1 *
+bit 1048 I 1 IO_AC5
+bit 1047 O 1 IO_AC5 1046 1 Z
+bit 1046 C 1 *
+bit 1045 I 1 IO_AC4
+bit 1044 O 1 IO_AC4 1043 1 Z
+bit 1043 C 1 *
+bit 1042 I 1 IO_AC3
+bit 1041 O 1 IO_AC3 1040 1 Z
+bit 1040 C 1 *
+bit 1039 O 1 *
+bit 1038 O 1 *
+bit 1037 O 1 *
+bit 1036 I 1 IO_AB6
+bit 1035 O 1 IO_AB6 1034 1 Z
+bit 1034 C 1 *
+bit 1033 I 1 IO_AC2
+bit 1032 O 1 IO_AC2 1031 1 Z
+bit 1031 C 1 *
+bit 1030 I 1 IO_AC1
+bit 1029 O 1 IO_AC1 1028 1 Z
+bit 1028 C 1 *
+bit 1027 I 1 IO_AB5
+bit 1026 O 1 IO_AB5 1025 1 Z
+bit 1025 C 1 *
+bit 1024 I 1 IO_AB4
+bit 1023 O 1 IO_AB4 1022 1 Z
+bit 1022 C 1 *
+bit 1021 I 1 IO_AB2
+bit 1020 O 1 IO_AB2 1019 1 Z
+bit 1019 C 1 *
+bit 1018 I 1 IO_AB1
+bit 1017 O 1 IO_AB1 1016 1 Z
+bit 1016 C 1 *
+bit 1015 I 1 IO_AB8
+bit 1014 O 1 IO_AB8 1013 1 Z
+bit 1013 C 1 *
+bit 1012 I 1 IO_AA9
+bit 1011 O 1 IO_AA9 1010 1 Z
+bit 1010 C 1 *
+bit 1009 I 1 IO_AA7
+bit 1008 O 1 IO_AA7 1007 1 Z
+bit 1007 C 1 *
+bit 1006 I 1 IO_AA6
+bit 1005 O 1 IO_AA6 1004 1 Z
+bit 1004 C 1 *
+bit 1003 O 1 *
+bit 1002 O 1 *
+bit 1001 O 1 *
+bit 1000 O 1 *
+bit 999 O 1 *
+bit 998 O 1 *
+bit 997 I 1 IO_AA3
+bit 996 O 1 IO_AA3 995 1 Z
+bit 995 C 1 *
+bit 994 I 1 IO_AA2
+bit 993 O 1 IO_AA2 992 1 Z
+bit 992 C 1 *
+bit 991 I 1 IO_AA10
+bit 990 O 1 IO_AA10 989 1 Z
+bit 989 C 1 *
+bit 988 I 1 IO_Y10
+bit 987 O 1 IO_Y10 986 1 Z
+bit 986 C 1 *
+bit 985 I 1 IO_Y8
+bit 984 O 1 IO_Y8 983 1 Z
+bit 983 C 1 *
+bit 982 I 1 IO_Y7
+bit 981 O 1 IO_Y7 980 1 Z
+bit 980 C 1 *
+bit 979 I 1 IO_Y6
+bit 978 O 1 IO_Y6 977 1 Z
+bit 977 C 1 *
+bit 976 I 1 IO_Y5
+bit 975 O 1 IO_Y5 974 1 Z
+bit 974 C 1 *
+bit 973 I 1 IO_Y4
+bit 972 O 1 IO_Y4 971 1 Z
+bit 971 C 1 *
+bit 970 I 1 IO_Y3
+bit 969 O 1 IO_Y3 968 1 Z
+bit 968 C 1 *
+bit 967 O 1 *
+bit 966 O 1 *
+bit 965 O 1 *
+bit 964 O 1 *
+bit 963 O 1 *
+bit 962 O 1 *
+bit 961 I 1 IO_Y2
+bit 960 O 1 IO_Y2 959 1 Z
+bit 959 C 1 *
+bit 958 I 1 IO_Y1
+bit 957 O 1 IO_Y1 956 1 Z
+bit 956 C 1 *
+bit 955 I 1 IO_W9
+bit 954 O 1 IO_W9 953 1 Z
+bit 953 C 1 *
+bit 952 I 1 IO_W8
+bit 951 O 1 IO_W8 950 1 Z
+bit 950 C 1 *
+bit 949 I 1 IO_W7
+bit 948 O 1 IO_W7 947 1 Z
+bit 947 C 1 *
+bit 946 I 1 IO_W6
+bit 945 O 1 IO_W6 944 1 Z
+bit 944 C 1 *
+bit 943 I 1 IO_W4
+bit 942 O 1 IO_W4 941 1 Z
+bit 941 C 1 *
+bit 940 I 1 IO_W3
+bit 939 O 1 IO_W3 938 1 Z
+bit 938 C 1 *
+bit 937 O 1 *
+bit 936 O 1 *
+bit 935 O 1 *
+bit 934 O 1 *
+bit 933 O 1 *
+bit 932 O 1 *
+bit 931 I 1 IO_W2
+bit 930 O 1 IO_W2 929 1 Z
+bit 929 C 1 *
+bit 928 I 1 IO_W1
+bit 927 O 1 IO_W1 926 1 Z
+bit 926 C 1 *
+bit 925 I 1 IO_W10
+bit 924 O 1 IO_W10 923 1 Z
+bit 923 C 1 *
+bit 922 I 1 IO_V10
+bit 921 O 1 IO_V10 920 1 Z
+bit 920 C 1 *
+bit 919 I 1 IO_V9
+bit 918 O 1 IO_V9 917 1 Z
+bit 917 C 1 *
+bit 916 I 1 IO_V8
+bit 915 O 1 IO_V8 914 1 Z
+bit 914 C 1 *
+bit 913 I 1 IO_W5
+bit 912 O 1 IO_W5 911 1 Z
+bit 911 C 1 *
+bit 910 I 1 IO_V6
+bit 909 O 1 IO_V6 908 1 Z
+bit 908 C 1 *
+bit 907 I 1 IO_V5
+bit 906 O 1 IO_V5 905 1 Z
+bit 905 C 1 *
+bit 904 I 1 IO_V4
+bit 903 O 1 IO_V4 902 1 Z
+bit 902 C 1 *
+bit 901 O 1 *
+bit 900 O 1 *
+bit 899 O 1 *
+bit 898 O 1 *
+bit 897 O 1 *
+bit 896 O 1 *
+bit 895 I 1 IO_V2
+bit 894 O 1 IO_V2 893 1 Z
+bit 893 C 1 *
+bit 892 I 1 IO_V1
+bit 891 O 1 IO_V1 890 1 Z
+bit 890 C 1 *
+bit 889 I 1 IO_U10
+bit 888 O 1 IO_U10 887 1 Z
+bit 887 C 1 *
+bit 886 I 1 IO_U9
+bit 885 O 1 IO_U9 884 1 Z
+bit 884 C 1 *
+bit 883 I 1 IO_U7
+bit 882 O 1 IO_U7 881 1 Z
+bit 881 C 1 *
+bit 880 I 1 IO_U6
+bit 879 O 1 IO_U6 878 1 Z
+bit 878 C 1 *
+bit 877 I 1 IO_U3
+bit 876 O 1 IO_U3 875 1 Z
+bit 875 C 1 *
+bit 874 I 1 IO_U2
+bit 873 O 1 IO_U2 872 1 Z
+bit 872 C 1 *
+bit 871 I 1 IO_T10
+bit 870 O 1 IO_T10 869 1 Z
+bit 869 C 1 *
+bit 868 I 1 IO_T9
+bit 867 O 1 IO_T9 866 1 Z
+bit 866 C 1 *
+bit 865 O 1 *
+bit 864 O 1 *
+bit 863 O 1 *
+bit 862 O 1 *
+bit 861 O 1 *
+bit 860 O 1 *
+bit 859 O 1 *
+bit 858 O 1 *
+bit 857 O 1 *
+bit 856 O 1 *
+bit 855 O 1 *
+bit 854 O 1 *
+bit 853 I 1 IO_T8
+bit 852 O 1 IO_T8 851 1 Z
+bit 851 C 1 *
+bit 850 I 1 IO_T7
+bit 849 O 1 IO_T7 848 1 Z
+bit 848 C 1 *
+bit 847 I 1 IO_T6
+bit 846 O 1 IO_T6 845 1 Z
+bit 845 C 1 *
+bit 844 I 1 IO_T5
+bit 843 O 1 IO_T5 842 1 Z
+bit 842 C 1 *
+bit 841 I 1 IO_T4
+bit 840 O 1 IO_T4 839 1 Z
+bit 839 C 1 *
+bit 838 I 1 IO_T3
+bit 837 O 1 IO_T3 836 1 Z
+bit 836 C 1 *
+bit 835 I 1 IO_T2
+bit 834 O 1 IO_T2 833 1 Z
+bit 833 C 1 *
+bit 832 I 1 IO_T1
+bit 831 O 1 IO_T1 830 1 Z
+bit 830 C 1 *
+bit 829 I 1 IO_R1
+bit 828 O 1 IO_R1 827 1 Z
+bit 827 C 1 *
+bit 826 I 1 IO_R2
+bit 825 O 1 IO_R2 824 1 Z
+bit 824 C 1 *
+bit 823 I 1 IO_R3
+bit 822 O 1 IO_R3 821 1 Z
+bit 821 C 1 *
+bit 820 I 1 IO_R4
+bit 819 O 1 IO_R4 818 1 Z
+bit 818 C 1 *
+bit 817 I 1 IO_R5
+bit 816 O 1 IO_R5 815 1 Z
+bit 815 C 1 *
+bit 814 I 1 IO_R6
+bit 813 O 1 IO_R6 812 1 Z
+bit 812 C 1 *
+bit 811 I 1 IO_R7
+bit 810 O 1 IO_R7 809 1 Z
+bit 809 C 1 *
+bit 808 I 1 IO_R8
+bit 807 O 1 IO_R8 806 1 Z
+bit 806 C 1 *
+bit 805 O 1 *
+bit 804 O 1 *
+bit 803 O 1 *
+bit 802 O 1 *
+bit 801 O 1 *
+bit 800 O 1 *
+bit 799 O 1 *
+bit 798 O 1 *
+bit 797 O 1 *
+bit 796 O 1 *
+bit 795 O 1 *
+bit 794 O 1 *
+bit 793 I 1 IO_R9
+bit 792 O 1 IO_R9 791 1 Z
+bit 791 C 1 *
+bit 790 I 1 IO_R10
+bit 789 O 1 IO_R10 788 1 Z
+bit 788 C 1 *
+bit 787 I 1 IO_P2
+bit 786 O 1 IO_P2 785 1 Z
+bit 785 C 1 *
+bit 784 I 1 IO_P3
+bit 783 O 1 IO_P3 782 1 Z
+bit 782 C 1 *
+bit 781 I 1 IO_P6
+bit 780 O 1 IO_P6 779 1 Z
+bit 779 C 1 *
+bit 778 I 1 IO_P7
+bit 777 O 1 IO_P7 776 1 Z
+bit 776 C 1 *
+bit 775 I 1 IO_P9
+bit 774 O 1 IO_P9 773 1 Z
+bit 773 C 1 *
+bit 772 I 1 IO_P10
+bit 771 O 1 IO_P10 770 1 Z
+bit 770 C 1 *
+bit 769 I 1 IO_N1
+bit 768 O 1 IO_N1 767 1 Z
+bit 767 C 1 *
+bit 766 I 1 IO_N2
+bit 765 O 1 IO_N2 764 1 Z
+bit 764 C 1 *
+bit 763 O 1 *
+bit 762 O 1 *
+bit 761 O 1 *
+bit 760 O 1 *
+bit 759 O 1 *
+bit 758 O 1 *
+bit 757 I 1 IO_N4
+bit 756 O 1 IO_N4 755 1 Z
+bit 755 C 1 *
+bit 754 I 1 IO_N5
+bit 753 O 1 IO_N5 752 1 Z
+bit 752 C 1 *
+bit 751 I 1 IO_N6
+bit 750 O 1 IO_N6 749 1 Z
+bit 749 C 1 *
+bit 748 I 1 IO_M5
+bit 747 O 1 IO_M5 746 1 Z
+bit 746 C 1 *
+bit 745 I 1 IO_N8
+bit 744 O 1 IO_N8 743 1 Z
+bit 743 C 1 *
+bit 742 I 1 IO_N9
+bit 741 O 1 IO_N9 740 1 Z
+bit 740 C 1 *
+bit 739 I 1 IO_N10
+bit 738 O 1 IO_N10 737 1 Z
+bit 737 C 1 *
+bit 736 I 1 IO_M10
+bit 735 O 1 IO_M10 734 1 Z
+bit 734 C 1 *
+bit 733 I 1 IO_M1
+bit 732 O 1 IO_M1 731 1 Z
+bit 731 C 1 *
+bit 730 I 1 IO_M2
+bit 729 O 1 IO_M2 728 1 Z
+bit 728 C 1 *
+bit 727 O 1 *
+bit 726 O 1 *
+bit 725 O 1 *
+bit 724 O 1 *
+bit 723 O 1 *
+bit 722 O 1 *
+bit 721 I 1 IO_M3
+bit 720 O 1 IO_M3 719 1 Z
+bit 719 C 1 *
+bit 718 I 1 IO_M4
+bit 717 O 1 IO_M4 716 1 Z
+bit 716 C 1 *
+bit 715 I 1 IO_M6
+bit 714 O 1 IO_M6 713 1 Z
+bit 713 C 1 *
+bit 712 I 1 IO_M7
+bit 711 O 1 IO_M7 710 1 Z
+bit 710 C 1 *
+bit 709 I 1 IO_M8
+bit 708 O 1 IO_M8 707 1 Z
+bit 707 C 1 *
+bit 706 I 1 IO_M9
+bit 705 O 1 IO_M9 704 1 Z
+bit 704 C 1 *
+bit 703 I 1 IO_L1
+bit 702 O 1 IO_L1 701 1 Z
+bit 701 C 1 *
+bit 700 I 1 IO_L2
+bit 699 O 1 IO_L2 698 1 Z
+bit 698 C 1 *
+bit 697 O 1 *
+bit 696 O 1 *
+bit 695 O 1 *
+bit 694 O 1 *
+bit 693 O 1 *
+bit 692 O 1 *
+bit 691 I 1 IO_L3
+bit 690 O 1 IO_L3 689 1 Z
+bit 689 C 1 *
+bit 688 I 1 IO_L4
+bit 687 O 1 IO_L4 686 1 Z
+bit 686 C 1 *
+bit 685 I 1 IO_L5
+bit 684 O 1 IO_L5 683 1 Z
+bit 683 C 1 *
+bit 682 I 1 IO_L6
+bit 681 O 1 IO_L6 680 1 Z
+bit 680 C 1 *
+bit 679 I 1 IO_L7
+bit 678 O 1 IO_L7 677 1 Z
+bit 677 C 1 *
+bit 676 I 1 IO_L8
+bit 675 O 1 IO_L8 674 1 Z
+bit 674 C 1 *
+bit 673 I 1 IO_L10
+bit 672 O 1 IO_L10 671 1 Z
+bit 671 C 1 *
+bit 670 I 1 IO_K10
+bit 669 O 1 IO_K10 668 1 Z
+bit 668 C 1 *
+bit 667 I 1 IO_K2
+bit 666 O 1 IO_K2 665 1 Z
+bit 665 C 1 *
+bit 664 I 1 IO_K3
+bit 663 O 1 IO_K3 662 1 Z
+bit 662 C 1 *
+bit 661 O 1 *
+bit 660 O 1 *
+bit 659 O 1 *
+bit 658 O 1 *
+bit 657 O 1 *
+bit 656 O 1 *
+bit 655 I 1 IO_K6
+bit 654 O 1 IO_K6 653 1 Z
+bit 653 C 1 *
+bit 652 I 1 IO_K7
+bit 651 O 1 IO_K7 650 1 Z
+bit 650 C 1 *
+bit 649 I 1 IO_K9
+bit 648 O 1 IO_K9 647 1 Z
+bit 647 C 1 *
+bit 646 I 1 IO_J8
+bit 645 O 1 IO_J8 644 1 Z
+bit 644 C 1 *
+bit 643 I 1 IO_J1
+bit 642 O 1 IO_J1 641 1 Z
+bit 641 C 1 *
+bit 640 I 1 IO_J2
+bit 639 O 1 IO_J2 638 1 Z
+bit 638 C 1 *
+bit 637 I 1 IO_J4
+bit 636 O 1 IO_J4 635 1 Z
+bit 635 C 1 *
+bit 634 I 1 IO_J5
+bit 633 O 1 IO_J5 632 1 Z
+bit 632 C 1 *
+bit 631 I 1 IO_H1
+bit 630 O 1 IO_H1 629 1 Z
+bit 629 C 1 *
+bit 628 I 1 IO_H2
+bit 627 O 1 IO_H2 626 1 Z
+bit 626 C 1 *
+bit 625 I 1 IO_J6
+bit 624 O 1 IO_J6 623 1 Z
+bit 623 C 1 *
+bit 622 O 1 *
+bit 621 O 1 *
+bit 620 O 1 *
+bit 619 I 1 IO_H3
+bit 618 O 1 IO_H3 617 1 Z
+bit 617 C 1 *
+bit 616 I 1 IO_H4
+bit 615 O 1 IO_H4 614 1 Z
+bit 614 C 1 *
+bit 613 I 1 IO_H5
+bit 612 O 1 IO_H5 611 1 Z
+bit 611 C 1 *
+bit 610 I 1 IO_H6
+bit 609 O 1 IO_H6 608 1 Z
+bit 608 C 1 *
+bit 607 I 1 IO_H7
+bit 606 O 1 IO_H7 605 1 Z
+bit 605 C 1 *
+bit 604 I 1 IO_G6
+bit 603 O 1 IO_G6 602 1 Z
+bit 602 C 1 *
+bit 601 I 1 IO_G1
+bit 600 O 1 IO_G1 599 1 Z
+bit 599 C 1 *
+bit 598 I 1 IO_G2
+bit 597 O 1 IO_G2 596 1 Z
+bit 596 C 1 *
+bit 595 I 1 IO_G3
+bit 594 O 1 IO_G3 593 1 Z
+bit 593 C 1 *
+bit 592 I 1 IO_G4
+bit 591 O 1 IO_G4 590 1 Z
+bit 590 C 1 *
+bit 589 O 1 *
+bit 588 O 1 *
+bit 587 O 1 *
+bit 586 O 1 *
+bit 585 O 1 *
+bit 584 O 1 *
+bit 583 O 1 *
+bit 582 O 1 *
+bit 581 O 1 *
+bit 580 O 1 *
+bit 579 O 1 *
+bit 578 O 1 *
+bit 577 I 1 IO_F2
+bit 576 O 1 IO_F2 575 1 Z
+bit 575 C 1 *
+bit 574 I 1 IO_F3
+bit 573 O 1 IO_F3 572 1 Z
+bit 572 C 1 *
+bit 571 I 1 IO_F5
+bit 570 O 1 IO_F5 569 1 Z
+bit 569 C 1 *
+bit 568 I 1 IO_E4
+bit 567 O 1 IO_E4 566 1 Z
+bit 566 C 1 *
+bit 565 I 1 IO_E1
+bit 564 O 1 IO_E1 563 1 Z
+bit 563 C 1 *
+bit 562 I 1 IO_E2
+bit 561 O 1 IO_E2 560 1 Z
+bit 560 C 1 *
+bit 559 I 1 IO_D1
+bit 558 O 1 IO_D1 557 1 Z
+bit 557 C 1 *
+bit 556 I 1 IO_D2
+bit 555 O 1 IO_D2 554 1 Z
+bit 554 C 1 *
+bit 553 I 1 IO_D3
+bit 552 O 1 IO_D3 551 1 Z
+bit 551 C 1 *
+bit 550 I 1 IO_D4
+bit 549 O 1 IO_D4 548 1 Z
+bit 548 C 1 *
+bit 547 I 1 IO_C1
+bit 546 O 1 IO_C1 545 1 Z
+bit 545 C 1 *
+bit 544 I 1 IO_C2
+bit 543 O 1 IO_C2 542 1 Z
+bit 542 C 1 *
+bit 541 O 1 *
+bit 540 I 1 HSWAP_EN_A3
+bit 539 I 1 IO_C4
+bit 538 O 1 IO_C4 537 1 Z
+bit 537 C 1 *
+bit 536 I 1 IO_B4
+bit 535 O 1 IO_B4 534 1 Z
+bit 534 C 1 *
+bit 533 I 1 IO_A4
+bit 532 O 1 IO_A4 531 1 Z
+bit 531 C 1 *
+bit 530 I 1 IO_B5
+bit 529 O 1 IO_B5 528 1 Z
+bit 528 C 1 *
+bit 527 I 1 IO_A5
+bit 526 O 1 IO_A5 525 1 Z
+bit 525 C 1 *
+bit 524 O 1 *
+bit 523 O 1 *
+bit 522 O 1 *
+bit 521 I 1 IO_D5
+bit 520 O 1 IO_D5 519 1 Z
+bit 519 C 1 *
+bit 518 I 1 IO_E6
+bit 517 O 1 IO_E6 516 1 Z
+bit 516 C 1 *
+bit 515 I 1 IO_C6
+bit 514 O 1 IO_C6 513 1 Z
+bit 513 C 1 *
+bit 512 I 1 IO_B6
+bit 511 O 1 IO_B6 510 1 Z
+bit 510 C 1 *
+bit 509 O 1 *
+bit 508 O 1 *
+bit 507 O 1 *
+bit 506 I 1 IO_F6
+bit 505 O 1 IO_F6 504 1 Z
+bit 504 C 1 *
+bit 503 I 1 IO_F7
+bit 502 O 1 IO_F7 501 1 Z
+bit 501 C 1 *
+bit 500 I 1 IO_D7
+bit 499 O 1 IO_D7 498 1 Z
+bit 498 C 1 *
+bit 497 I 1 IO_C7
+bit 496 O 1 IO_C7 495 1 Z
+bit 495 C 1 *
+bit 494 O 1 *
+bit 493 O 1 *
+bit 492 O 1 *
+bit 491 I 1 IO_B7
+bit 490 O 1 IO_B7 489 1 Z
+bit 489 C 1 *
+bit 488 I 1 IO_A7
+bit 487 O 1 IO_A7 486 1 Z
+bit 486 C 1 *
+bit 485 I 1 IO_G7
+bit 484 O 1 IO_G7 483 1 Z
+bit 483 C 1 *
+bit 482 I 1 IO_H8
+bit 481 O 1 IO_H8 480 1 Z
+bit 480 C 1 *
+bit 479 I 1 IO_G8
+bit 478 O 1 IO_G8 477 1 Z
+bit 477 C 1 *
+bit 476 I 1 IO_F8
+bit 475 O 1 IO_F8 474 1 Z
+bit 474 C 1 *
+bit 473 I 1 IO_E8
+bit 472 O 1 IO_E8 471 1 Z
+bit 471 C 1 *
+bit 470 I 1 IO_D8
+bit 469 O 1 IO_D8 468 1 Z
+bit 468 C 1 *
+bit 467 I 1 IO_C8
+bit 466 O 1 IO_C8 465 1 Z
+bit 465 C 1 *
+bit 464 O 1 *
+bit 463 O 1 *
+bit 462 O 1 *
+bit 461 I 1 IO_B8
+bit 460 O 1 IO_B8 459 1 Z
+bit 459 C 1 *
+bit 458 I 1 IO_A8
+bit 457 O 1 IO_A8 456 1 Z
+bit 456 C 1 *
+bit 455 I 1 IO_J9
+bit 454 O 1 IO_J9 453 1 Z
+bit 453 C 1 *
+bit 452 I 1 IO_H9
+bit 451 O 1 IO_H9 450 1 Z
+bit 450 C 1 *
+bit 449 I 1 IO_F9
+bit 448 O 1 IO_F9 447 1 Z
+bit 447 C 1 *
+bit 446 I 1 IO_E9
+bit 445 O 1 IO_E9 444 1 Z
+bit 444 C 1 *
+bit 443 I 1 IO_D9
+bit 442 O 1 IO_D9 441 1 Z
+bit 441 C 1 *
+bit 440 I 1 IO_B9
+bit 439 O 1 IO_B9 438 1 Z
+bit 438 C 1 *
+bit 437 I 1 IO_A9
+bit 436 O 1 IO_A9 435 1 Z
+bit 435 C 1 *
+bit 434 O 1 *
+bit 433 O 1 *
+bit 432 O 1 *
+bit 431 I 1 IO_G10
+bit 430 O 1 IO_G10 429 1 Z
+bit 429 C 1 *
+bit 428 I 1 IO_F10
+bit 427 O 1 IO_F10 426 1 Z
+bit 426 C 1 *
+bit 425 I 1 IO_C10
+bit 424 O 1 IO_C10 423 1 Z
+bit 423 C 1 *
+bit 422 I 1 IO_B10
+bit 421 O 1 IO_B10 420 1 Z
+bit 420 C 1 *
+bit 419 O 1 *
+bit 418 O 1 *
+bit 417 O 1 *
+bit 416 I 1 IO_J10
+bit 415 O 1 IO_J10 414 1 Z
+bit 414 C 1 *
+bit 413 I 1 IO_K11
+bit 412 O 1 IO_K11 411 1 Z
+bit 411 C 1 *
+bit 410 I 1 IO_H11
+bit 409 O 1 IO_H11 408 1 Z
+bit 408 C 1 *
+bit 407 I 1 IO_G11
+bit 406 O 1 IO_G11 405 1 Z
+bit 405 C 1 *
+bit 404 O 1 *
+bit 403 O 1 *
+bit 402 O 1 *
+bit 401 I 1 IO_F11
+bit 400 O 1 IO_F11 399 1 Z
+bit 399 C 1 *
+bit 398 I 1 IO_E11
+bit 397 O 1 IO_E11 396 1 Z
+bit 396 C 1 *
+bit 395 I 1 IO_D11
+bit 394 O 1 IO_D11 393 1 Z
+bit 393 C 1 *
+bit 392 I 1 IO_C11
+bit 391 O 1 IO_C11 390 1 Z
+bit 390 C 1 *
+bit 389 O 1 *
+bit 388 O 1 *
+bit 387 O 1 *
+bit 386 I 1 IO_B11
+bit 385 O 1 IO_B11 384 1 Z
+bit 384 C 1 *
+bit 383 I 1 IO_A11
+bit 382 O 1 IO_A11 381 1 Z
+bit 381 C 1 *
+bit 380 I 1 IO_K12
+bit 379 O 1 IO_K12 378 1 Z
+bit 378 C 1 *
+bit 377 I 1 IO_J12
+bit 376 O 1 IO_J12 375 1 Z
+bit 375 C 1 *
+bit 374 O 1 *
+bit 373 O 1 *
+bit 372 O 1 *
+bit 371 I 1 IO_H12
+bit 370 O 1 IO_H12 369 1 Z
+bit 369 C 1 *
+bit 368 I 1 IO_G12
+bit 367 O 1 IO_G12 366 1 Z
+bit 366 C 1 *
+bit 365 I 1 IO_F12
+bit 364 O 1 IO_F12 363 1 Z
+bit 363 C 1 *
+bit 362 I 1 IO_E12
+bit 361 O 1 IO_E12 360 1 Z
+bit 360 C 1 *
+bit 359 O 1 *
+bit 358 O 1 *
+bit 357 O 1 *
+bit 356 I 1 IO_D12
+bit 355 O 1 IO_D12 354 1 Z
+bit 354 C 1 *
+bit 353 I 1 IO_C12
+bit 352 O 1 IO_C12 351 1 Z
+bit 351 C 1 *
+bit 350 I 1 IO_B12
+bit 349 O 1 IO_B12 348 1 Z
+bit 348 C 1 *
+bit 347 I 1 IO_A12
+bit 346 O 1 IO_A12 345 1 Z
+bit 345 C 1 *
+bit 344 I 1 IO_K13
+bit 343 O 1 IO_K13 342 1 Z
+bit 342 C 1 *
+bit 341 I 1 IO_J13
+bit 340 O 1 IO_J13 339 1 Z
+bit 339 C 1 *
+bit 338 I 1 IO_H13
+bit 337 O 1 IO_H13 336 1 Z
+bit 336 C 1 *
+bit 335 I 1 IO_F13
+bit 334 O 1 IO_F13 333 1 Z
+bit 333 C 1 *
+bit 332 I 1 IO_E13
+bit 331 O 1 IO_E13 330 1 Z
+bit 330 C 1 *
+bit 329 I 1 IO_D13
+bit 328 O 1 IO_D13 327 1 Z
+bit 327 C 1 *
+bit 326 I 1 IO_B13
+bit 325 O 1 IO_B13 324 1 Z
+bit 324 C 1 *
+bit 323 I 1 IO_A13
+bit 322 O 1 IO_A13 321 1 Z
+bit 321 C 1 *
+bit 320 I 1 IO_K14
+bit 319 O 1 IO_K14 318 1 Z
+bit 318 C 1 *
+bit 317 I 1 IO_J14
+bit 316 O 1 IO_J14 315 1 Z
+bit 315 C 1 *
+bit 314 I 1 IO_K15
+bit 313 O 1 IO_K15 312 1 Z
+bit 312 C 1 *
+bit 311 I 1 IO_G14
+bit 310 O 1 IO_G14 309 1 Z
+bit 309 C 1 *
+bit 308 I 1 IO_F14
+bit 307 O 1 IO_F14 306 1 Z
+bit 306 C 1 *
+bit 305 I 1 IO_C14
+bit 304 O 1 IO_C14 303 1 Z
+bit 303 C 1 *
+bit 302 I 1 IO_B14
+bit 301 O 1 IO_B14 300 1 Z
+bit 300 C 1 *
+bit 299 O 1 *
+bit 298 O 1 *
+bit 297 O 1 *
+bit 296 I 1 IO_J15
+bit 295 O 1 IO_J15 294 1 Z
+bit 294 C 1 *
+bit 293 I 1 IO_H15
+bit 292 O 1 IO_H15 291 1 Z
+bit 291 C 1 *
+bit 290 I 1 IO_G15
+bit 289 O 1 IO_G15 288 1 Z
+bit 288 C 1 *
+bit 287 I 1 IO_F15
+bit 286 O 1 IO_F15 285 1 Z
+bit 285 C 1 *
+bit 284 I 1 IO_E15
+bit 283 O 1 IO_E15 282 1 Z
+bit 282 C 1 *
+bit 281 I 1 IO_D15
+bit 280 O 1 IO_D15 279 1 Z
+bit 279 C 1 *
+bit 278 I 1 IO_C15
+bit 277 O 1 IO_C15 276 1 Z
+bit 276 C 1 *
+bit 275 I 1 IO_B15
+bit 274 O 1 IO_B15 273 1 Z
+bit 273 C 1 *
+bit 272 I 1 IO_A15
+bit 271 O 1 IO_A15 270 1 Z
+bit 270 C 1 *
+bit 269 I 1 IO_A16
+bit 268 O 1 IO_A16 267 1 Z
+bit 267 C 1 *
+bit 266 I 1 IO_B16
+bit 265 O 1 IO_B16 264 1 Z
+bit 264 C 1 *
+bit 263 I 1 IO_C16
+bit 262 O 1 IO_C16 261 1 Z
+bit 261 C 1 *
+bit 260 I 1 IO_D16
+bit 259 O 1 IO_D16 258 1 Z
+bit 258 C 1 *
+bit 257 I 1 IO_E16
+bit 256 O 1 IO_E16 255 1 Z
+bit 255 C 1 *
+bit 254 I 1 IO_F16
+bit 253 O 1 IO_F16 252 1 Z
+bit 252 C 1 *
+bit 251 I 1 IO_G16
+bit 250 O 1 IO_G16 249 1 Z
+bit 249 C 1 *
+bit 248 I 1 IO_H16
+bit 247 O 1 IO_H16 246 1 Z
+bit 246 C 1 *
+bit 245 I 1 IO_J16
+bit 244 O 1 IO_J16 243 1 Z
+bit 243 C 1 *
+bit 242 I 1 IO_K16
+bit 241 O 1 IO_K16 240 1 Z
+bit 240 C 1 *
+bit 239 I 1 IO_J17
+bit 238 O 1 IO_J17 237 1 Z
+bit 237 C 1 *
+bit 236 I 1 IO_B17
+bit 235 O 1 IO_B17 234 1 Z
+bit 234 C 1 *
+bit 233 I 1 IO_C17
+bit 232 O 1 IO_C17 231 1 Z
+bit 231 C 1 *
+bit 230 I 1 IO_F17
+bit 229 O 1 IO_F17 228 1 Z
+bit 228 C 1 *
+bit 227 I 1 IO_G17
+bit 226 O 1 IO_G17 225 1 Z
+bit 225 C 1 *
+bit 224 O 1 *
+bit 223 O 1 *
+bit 222 O 1 *
+bit 221 I 1 IO_K17
+bit 220 O 1 IO_K17 219 1 Z
+bit 219 C 1 *
+bit 218 I 1 IO_K18
+bit 217 O 1 IO_K18 216 1 Z
+bit 216 C 1 *
+bit 215 I 1 IO_A18
+bit 214 O 1 IO_A18 213 1 Z
+bit 213 C 1 *
+bit 212 I 1 IO_B18
+bit 211 O 1 IO_B18 210 1 Z
+bit 210 C 1 *
+bit 209 O 1 *
+bit 208 O 1 *
+bit 207 O 1 *
+bit 206 I 1 IO_D18
+bit 205 O 1 IO_D18 204 1 Z
+bit 204 C 1 *
+bit 203 I 1 IO_E18
+bit 202 O 1 IO_E18 201 1 Z
+bit 201 C 1 *
+bit 200 I 1 IO_H18
+bit 199 O 1 IO_H18 198 1 Z
+bit 198 C 1 *
+bit 197 I 1 IO_J18
+bit 196 O 1 IO_J18 195 1 Z
+bit 195 C 1 *
+bit 194 I 1 IO_F18
+bit 193 O 1 IO_F18 192 1 Z
+bit 192 C 1 *
+bit 191 I 1 IO_A19
+bit 190 O 1 IO_A19 189 1 Z
+bit 189 C 1 *
+bit 188 I 1 IO_B19
+bit 187 O 1 IO_B19 186 1 Z
+bit 186 C 1 *
+bit 185 I 1 IO_C19
+bit 184 O 1 IO_C19 183 1 Z
+bit 183 C 1 *
+bit 182 I 1 IO_D19
+bit 181 O 1 IO_D19 180 1 Z
+bit 180 C 1 *
+bit 179 O 1 *
+bit 178 O 1 *
+bit 177 O 1 *
+bit 176 I 1 IO_E19
+bit 175 O 1 IO_E19 174 1 Z
+bit 174 C 1 *
+bit 173 I 1 IO_F19
+bit 172 O 1 IO_F19 171 1 Z
+bit 171 C 1 *
+bit 170 I 1 IO_G19
+bit 169 O 1 IO_G19 168 1 Z
+bit 168 C 1 *
+bit 167 I 1 IO_H19
+bit 166 O 1 IO_H19 165 1 Z
+bit 165 C 1 *
+bit 164 O 1 *
+bit 163 O 1 *
+bit 162 O 1 *
+bit 161 I 1 IO_J19
+bit 160 O 1 IO_J19 159 1 Z
+bit 159 C 1 *
+bit 158 I 1 IO_K19
+bit 157 O 1 IO_K19 156 1 Z
+bit 156 C 1 *
+bit 155 I 1 IO_A20
+bit 154 O 1 IO_A20 153 1 Z
+bit 153 C 1 *
+bit 152 I 1 IO_B20
+bit 151 O 1 IO_B20 150 1 Z
+bit 150 C 1 *
+bit 149 O 1 *
+bit 148 O 1 *
+bit 147 O 1 *
+bit 146 I 1 IO_C20
+bit 145 O 1 IO_C20 144 1 Z
+bit 144 C 1 *
+bit 143 I 1 IO_D20
+bit 142 O 1 IO_D20 141 1 Z
+bit 141 C 1 *
+bit 140 I 1 IO_E20
+bit 139 O 1 IO_E20 138 1 Z
+bit 138 C 1 *
+bit 137 I 1 IO_F20
+bit 136 O 1 IO_F20 135 1 Z
+bit 135 C 1 *
+bit 134 O 1 *
+bit 133 O 1 *
+bit 132 O 1 *
+bit 131 I 1 IO_G20
+bit 130 O 1 IO_G20 129 1 Z
+bit 129 C 1 *
+bit 128 I 1 IO_H20
+bit 127 O 1 IO_H20 126 1 Z
+bit 126 C 1 *
+bit 125 I 1 IO_B21
+bit 124 O 1 IO_B21 123 1 Z
+bit 123 C 1 *
+bit 122 I 1 IO_C21
+bit 121 O 1 IO_C21 120 1 Z
+bit 120 C 1 *
+bit 119 I 1 IO_K20
+bit 118 O 1 IO_K20 117 1 Z
+bit 117 C 1 *
+bit 116 I 1 IO_F21
+bit 115 O 1 IO_F21 114 1 Z
+bit 114 C 1 *
+bit 113 I 1 IO_G21
+bit 112 O 1 IO_G21 111 1 Z
+bit 111 C 1 *
+bit 110 I 1 IO_A22
+bit 109 O 1 IO_A22 108 1 Z
+bit 108 C 1 *
+bit 107 I 1 IO_B22
+bit 106 O 1 IO_B22 105 1 Z
+bit 105 C 1 *
+bit 104 I 1 IO_J21
+bit 103 O 1 IO_J21 102 1 Z
+bit 102 C 1 *
+bit 101 I 1 IO_D22
+bit 100 O 1 IO_D22 99 1 Z
+bit 99 C 1 *
+bit 98 I 1 IO_E22
+bit 97 O 1 IO_E22 96 1 Z
+bit 96 C 1 *
+bit 95 I 1 IO_F22
+bit 94 O 1 IO_F22 93 1 Z
+bit 93 C 1 *
+bit 92 I 1 IO_E23
+bit 91 O 1 IO_E23 90 1 Z
+bit 90 C 1 *
+bit 89 O 1 *
+bit 88 O 1 *
+bit 87 O 1 *
+bit 86 I 1 IO_H22
+bit 85 O 1 IO_H22 84 1 Z
+bit 84 C 1 *
+bit 83 I 1 IO_J22
+bit 82 O 1 IO_J22 81 1 Z
+bit 81 C 1 *
+bit 80 I 1 IO_A23
+bit 79 O 1 IO_A23 78 1 Z
+bit 78 C 1 *
+bit 77 I 1 IO_B23
+bit 76 O 1 IO_B23 75 1 Z
+bit 75 C 1 *
+bit 74 O 1 *
+bit 73 O 1 *
+bit 72 O 1 *
+bit 71 I 1 IO_C23
+bit 70 O 1 IO_C23 69 1 Z
+bit 69 C 1 *
+bit 68 I 1 IO_D23
+bit 67 O 1 IO_D23 66 1 Z
+bit 66 C 1 *
+bit 65 I 1 IO_F23
+bit 64 O 1 IO_F23 63 1 Z
+bit 63 C 1 *
+bit 62 I 1 IO_G23
+bit 61 O 1 IO_G23 60 1 Z
+bit 60 C 1 *
+bit 59 O 1 *
+bit 58 O 1 *
+bit 57 O 1 *
+bit 56 I 1 IO_H23
+bit 55 O 1 IO_H23 54 1 Z
+bit 54 C 1 *
+bit 53 I 1 IO_G24
+bit 52 O 1 IO_G24 51 1 Z
+bit 51 C 1 *
+bit 50 I 1 IO_A24
+bit 49 O 1 IO_A24 48 1 Z
+bit 48 C 1 *
+bit 47 I 1 IO_B24
+bit 46 O 1 IO_B24 45 1 Z
+bit 45 C 1 *
+bit 44 O 1 *
+bit 43 O 1 *
+bit 42 O 1 *
+bit 41 I 1 IO_C24
+bit 40 O 1 IO_C24 39 1 Z
+bit 39 C 1 *
+bit 38 I 1 IO_D24
+bit 37 O 1 IO_D24 36 1 Z
+bit 36 C 1 *
+bit 35 I 1 IO_F24
+bit 34 O 1 IO_F24 33 1 Z
+bit 33 C 1 *
+bit 32 I 1 IO_F25
+bit 31 O 1 IO_F25 30 1 Z
+bit 30 C 1 *
+bit 29 I 1 IO_E25
+bit 28 O 1 IO_E25 27 1 Z
+bit 27 C 1 *
+bit 26 I 1 IO_B25
+bit 25 O 1 IO_B25 24 1 Z
+bit 24 C 1 *
+bit 23 I 1 IO_C25
+bit 22 O 1 IO_C25 21 1 Z
+bit 21 C 1 *
+bit 20 I 1 IO_A26
+bit 19 O 1 IO_A26 18 1 Z
+bit 18 C 1 *
+bit 17 I 1 IO_B26
+bit 16 O 1 IO_B26 15 1 Z
+bit 15 C 1 *
+bit 14 O 1 *
+bit 13 O 1 *
+bit 12 O 1 *
+bit 11 I 1 IO_D26
+bit 10 O 1 IO_D26 9 1 Z
+bit 9 C 1 *
+bit 8 I 1 IO_C27
+bit 7 O 1 IO_C27 6 1 Z
+bit 6 C 1 *
+bit 5 I 1 IO_A27
+bit 4 O 1 IO_A27 3 1 Z
+bit 3 C 1 *
+bit 2 I 1 IO_B27
+bit 1 O 1 IO_B27 0 1 Z
+bit 0 C 1 *
--- /dev/null
+signal GND1
+signal GND2
+signal GND3
+signal GND4
+signal GND5
+signal GND6
+signal GND7
+signal GND8
+signal GND9
+signal GND10
+signal GND11
+signal GND12
+signal GND13
+signal GND14
+signal GND15
+signal GND16
+signal GND17
+signal GND18
+signal GND19
+signal GND20
+signal GND21
+signal GND22
+signal GND23
+signal GND24
+signal GND25
+signal GND26
+signal GND27
+signal GND28
+signal GND29
+signal GND30
+signal GND31
+signal GND32
+signal GND33
+signal GND34
+signal GND35
+signal GND36
+signal GND37
+signal GND38
+signal GND39
+signal GND40
+signal GND41
+signal GND42
+signal GND43
+signal GND44
+signal GND45
+signal GND46
+signal GND47
+signal GND48
+signal GND49
+signal GND50
+signal GND51
+signal GND52
+signal GND53
+signal GND54
+signal GND55
+signal GND56
+signal GND57
+signal GND58
+signal GND59
+signal GND60
+signal GND61
+signal GND62
+signal GND63
+signal GND64
+signal GND65
+signal GND66
+signal GND67
+signal GND68
+signal GND69
+signal GND70
+signal GND71
+signal GND72
+signal GND73
+signal GND74
+signal GND75
+signal GND76
+signal GND77
+signal GND78
+signal GND79
+signal GND80
+signal GND81
+signal GND82
+signal GND83
+signal GND84
+signal GND85
+signal GND86
+signal GND87
+signal GND88
+signal GND89
+signal GND90
+signal GND91
+signal GND92
+signal GND93
+signal GND94
+signal GND95
+signal GND96
+signal GND97
+signal GND98
+signal GND99
+signal GND100
+signal GND101
+signal GND102
+signal GND103
+signal GND104
+signal GND105
+signal GND106
+signal GND107
+signal GND108
+signal GND109
+signal GND110
+signal GND111
+signal GND112
+signal GND113
+signal GND114
+signal GND115
+signal GND116
+signal GND117
+signal GND118
+signal GND119
+signal GND120
+signal GND121
+signal GND122
+signal GND123
+signal GND124
+signal GND125
+signal GND126
+signal GND127
+signal GND128
+signal GND129
+signal GND130
+signal GND131
+signal GND132
+signal GND133
+signal GND134
+signal GND135
+signal GND136
+signal GND137
+signal GND138
+signal GND139
+signal GND140
+signal GND141
+signal GND142
+signal GND143
+signal GND144
+signal GND145
+signal GND146
+signal GND147
+signal GND148
+signal GND149
+signal NC1
+signal NC2
+signal NC3
+signal NC4
+signal NC5
+signal CCLK_PAD654
+signal DONE_PAD653
+signal HSWAP_EN_PAD137
+signal M0_PAD382
+signal M1_PAD381
+signal M2_PAD383
+signal PROG_B
+signal TCK
+signal TDI
+signal TDO
+signal TMS
+signal VCCAUX1
+signal VCCAUX2
+signal VCCAUX3
+signal VCCAUX4
+signal VCCAUX5
+signal VCCAUX6
+signal VCCAUX7
+signal VCCAUX8
+signal VCCAUX9
+signal VCCAUX10
+signal VCCAUX11
+signal VCCAUX12
+signal VCCAUX13
+signal VCCAUX14
+signal VCCAUX15
+signal VCCAUX16
+signal VCCAUX17
+signal VCCAUX18
+signal VCCAUX19
+signal VCCAUX20
+signal VCCAUX21
+signal VCCAUX22
+signal VCCAUX23
+signal VCCAUX24
+signal VCCAUX25
+signal VCCAUX26
+signal VCCAUX27
+signal VCCAUX28
+signal VCCINT1
+signal VCCINT2
+signal VCCINT3
+signal VCCINT4
+signal VCCINT5
+signal VCCINT6
+signal VCCINT7
+signal VCCINT8
+signal VCCINT9
+signal VCCINT10
+signal VCCINT11
+signal VCCINT12
+signal VCCINT13
+signal VCCINT14
+signal VCCINT15
+signal VCCINT16
+signal VCCINT17
+signal VCCINT18
+signal VCCINT19
+signal VCCINT20
+signal VCCINT21
+signal VCCINT22
+signal VCCINT23
+signal VCCINT24
+signal VCCINT25
+signal VCCINT26
+signal VCCINT27
+signal VCCINT28
+signal VCCINT29
+signal VCCINT30
+signal VCCINT31
+signal VCCINT32
+signal VCCINT33
+signal VCCINT34
+signal VCCINT35
+signal VCCINT36
+signal VCCO01
+signal VCCO02
+signal VCCO03
+signal VCCO04
+signal VCCO05
+signal VCCO06
+signal VCCO07
+signal VCCO08
+signal VCCO09
+signal VCCO010
+signal VCCO011
+signal VCCO012
+signal VCCO11
+signal VCCO12
+signal VCCO13
+signal VCCO14
+signal VCCO15
+signal VCCO16
+signal VCCO17
+signal VCCO18
+signal VCCO19
+signal VCCO110
+signal VCCO111
+signal VCCO112
+signal VCCO21
+signal VCCO22
+signal VCCO23
+signal VCCO24
+signal VCCO25
+signal VCCO26
+signal VCCO27
+signal VCCO28
+signal VCCO29
+signal VCCO210
+signal VCCO31
+signal VCCO32
+signal VCCO33
+signal VCCO34
+signal VCCO35
+signal VCCO36
+signal VCCO37
+signal VCCO38
+signal VCCO39
+signal VCCO310
+signal VCCO41
+signal VCCO42
+signal VCCO43
+signal VCCO44
+signal VCCO45
+signal VCCO46
+signal VCCO47
+signal VCCO48
+signal VCCO49
+signal VCCO410
+signal VCCO411
+signal VCCO412
+signal VCCO51
+signal VCCO52
+signal VCCO53
+signal VCCO54
+signal VCCO55
+signal VCCO56
+signal VCCO57
+signal VCCO58
+signal VCCO59
+signal VCCO510
+signal VCCO511
+signal VCCO512
+signal VCCO61
+signal VCCO62
+signal VCCO63
+signal VCCO64
+signal VCCO65
+signal VCCO66
+signal VCCO67
+signal VCCO68
+signal VCCO69
+signal VCCO610
+signal VCCO71
+signal VCCO72
+signal VCCO73
+signal VCCO74
+signal VCCO75
+signal VCCO76
+signal VCCO77
+signal VCCO78
+signal VCCO79
+signal VCCO710
+signal IO_PAD2
+signal IO_PAD3
+signal IO_PAD4
+signal IO_PAD5
+signal IO_PAD7
+signal IO_PAD9
+signal IO_PAD10
+signal IO_PAD11
+signal IO_PAD13
+signal IO_PAD14
+signal IO_PAD15
+signal IO_PAD17
+signal IO_PAD19
+signal IO_PAD21
+signal IO_PAD23
+signal IO_PAD25
+signal IO_PAD26
+signal IO_PAD27
+signal IO_PAD28
+signal IO_PAD29
+signal IO_PAD31
+signal IO_PAD33
+signal IO_PAD34
+signal IO_PAD35
+signal IO_PAD37
+signal IO_PAD38
+signal IO_PAD39
+signal IO_PAD41
+signal IO_PAD43
+signal IO_PAD45
+signal IO_PAD46
+signal IO_PAD47
+signal IO_PAD49
+signal IO_PAD50
+signal IO_PAD51
+signal IO_PAD53
+signal IO_PAD55
+signal IO_PAD57
+signal IO_PAD58
+signal IO_PAD59
+signal IO_PAD61
+signal IO_PAD62
+signal IO_PAD63
+signal IO_PAD65
+signal IO_PAD67
+signal IO_PAD69
+signal IO_PAD70
+signal IO_PAD71
+signal IO_PAD73
+signal IO_PAD74
+signal IO_PAD75
+signal IO_PAD77
+signal IO_PAD79
+signal IO_PAD80
+signal IO_PAD81
+signal IO_PAD83
+signal IO_PAD85
+signal IO_PAD87
+signal IO_PAD89
+signal IO_PAD91
+signal IO_PAD92
+signal IO_PAD93
+signal IO_PAD95
+signal IO_PAD97
+signal IO_PAD98
+signal IO_PAD99
+signal IO_PAD101
+signal IO_PAD102
+signal IO_PAD103
+signal IO_PAD104
+signal IO_PAD105
+signal IO_PAD107
+signal IO_PAD109
+signal IO_PAD111
+signal IO_PAD113
+signal IO_PAD115
+signal IO_PAD117
+signal IO_PAD119
+signal IO_PAD120
+signal IO_PAD121
+signal IO_PAD122
+signal IO_PAD123
+signal IO_PAD125
+signal IO_PAD127
+signal IO_PAD129
+signal IO_PAD130
+signal IO_PAD131
+signal IO_PAD133
+signal IO_PAD135
+signal IO_PAD136
+signal IO_PAD141
+signal IO_PAD142
+signal IO_PAD143
+signal IO_PAD145
+signal IO_PAD146
+signal IO_PAD147
+signal IO_PAD149
+signal IO_PAD150
+signal IO_PAD151
+signal IO_PAD153
+signal IO_PAD154
+signal IO_PAD155
+signal IO_PAD157
+signal IO_PAD159
+signal IO_PAD161
+signal IO_PAD163
+signal IO_PAD164
+signal IO_PAD165
+signal IO_PAD166
+signal IO_PAD167
+signal IO_PAD169
+signal IO_PAD171
+signal IO_PAD172
+signal IO_PAD173
+signal IO_PAD174
+signal IO_PAD175
+signal IO_PAD176
+signal IO_PAD177
+signal IO_PAD179
+signal IO_PAD181
+signal IO_PAD182
+signal IO_PAD183
+signal IO_PAD184
+signal IO_PAD185
+signal IO_PAD187
+signal IO_PAD188
+signal IO_PAD189
+signal IO_PAD191
+signal IO_PAD192
+signal IO_PAD193
+signal IO_PAD195
+signal IO_PAD196
+signal IO_PAD197
+signal IO_PAD198
+signal IO_PAD199
+signal IO_PAD201
+signal IO_PAD203
+signal IO_PAD204
+signal IO_PAD205
+signal IO_PAD206
+signal IO_PAD207
+signal IO_PAD208
+signal IO_PAD209
+signal IO_PAD210
+signal IO_PAD211
+signal IO_PAD213
+signal IO_PAD215
+signal IO_PAD217
+signal IO_PAD218
+signal IO_PAD219
+signal IO_PAD220
+signal IO_PAD221
+signal IO_PAD223
+signal IO_PAD225
+signal IO_PAD226
+signal IO_PAD227
+signal IO_PAD228
+signal IO_PAD229
+signal IO_PAD231
+signal IO_PAD233
+signal IO_PAD234
+signal IO_PAD235
+signal IO_PAD236
+signal IO_PAD237
+signal IO_PAD239
+signal IO_PAD240
+signal IO_PAD241
+signal IO_PAD243
+signal IO_PAD245
+signal IO_PAD247
+signal IO_PAD249
+signal IO_PAD250
+signal IO_PAD251
+signal IO_PAD252
+signal IO_PAD253
+signal IO_PAD255
+signal IO_PAD257
+signal IO_PAD258
+signal IO_PAD260
+signal IO_PAD261
+signal IO_PAD263
+signal IO_PAD265
+signal IO_PAD266
+signal IO_PAD267
+signal IO_PAD268
+signal IO_PAD269
+signal IO_PAD271
+signal IO_PAD273
+signal IO_PAD275
+signal IO_PAD277
+signal IO_PAD278
+signal IO_PAD279
+signal IO_PAD281
+signal IO_PAD282
+signal IO_PAD283
+signal IO_PAD284
+signal IO_PAD285
+signal IO_PAD287
+signal IO_PAD289
+signal IO_PAD290
+signal IO_PAD291
+signal IO_PAD292
+signal IO_PAD293
+signal IO_PAD295
+signal IO_PAD297
+signal IO_PAD298
+signal IO_PAD299
+signal IO_PAD300
+signal IO_PAD301
+signal IO_PAD303
+signal IO_PAD305
+signal IO_PAD307
+signal IO_PAD308
+signal IO_PAD309
+signal IO_PAD310
+signal IO_PAD311
+signal IO_PAD312
+signal IO_PAD313
+signal IO_PAD314
+signal IO_PAD315
+signal IO_PAD317
+signal IO_PAD319
+signal IO_PAD320
+signal IO_PAD321
+signal IO_PAD322
+signal IO_PAD323
+signal IO_PAD325
+signal IO_PAD326
+signal IO_PAD327
+signal IO_PAD329
+signal IO_PAD330
+signal IO_PAD331
+signal IO_PAD333
+signal IO_PAD334
+signal IO_PAD335
+signal IO_PAD336
+signal IO_PAD337
+signal IO_PAD339
+signal IO_PAD341
+signal IO_PAD342
+signal IO_PAD343
+signal IO_PAD344
+signal IO_PAD345
+signal IO_PAD346
+signal IO_PAD347
+signal IO_PAD349
+signal IO_PAD351
+signal IO_PAD352
+signal IO_PAD353
+signal IO_PAD354
+signal IO_PAD355
+signal IO_PAD357
+signal IO_PAD359
+signal IO_PAD361
+signal IO_PAD363
+signal IO_PAD364
+signal IO_PAD365
+signal IO_PAD367
+signal IO_PAD368
+signal IO_PAD369
+signal IO_PAD371
+signal IO_PAD372
+signal IO_PAD373
+signal IO_PAD375
+signal IO_PAD376
+signal IO_PAD377
+signal IO_PAD384
+signal IO_PAD385
+signal IO_PAD387
+signal IO_PAD389
+signal IO_PAD390
+signal IO_PAD391
+signal IO_PAD393
+signal IO_PAD395
+signal IO_PAD397
+signal IO_PAD398
+signal IO_PAD399
+signal IO_PAD400
+signal IO_PAD401
+signal IO_PAD403
+signal IO_PAD405
+signal IO_PAD406
+signal IO_PAD407
+signal IO_PAD409
+signal IO_PAD411
+signal IO_PAD413
+signal IO_PAD414
+signal IO_PAD415
+signal IO_PAD416
+signal IO_PAD417
+signal IO_PAD419
+signal IO_PAD420
+signal IO_PAD421
+signal IO_PAD423
+signal IO_PAD425
+signal IO_PAD426
+signal IO_PAD427
+signal IO_PAD429
+signal IO_PAD431
+signal IO_PAD433
+signal IO_PAD435
+signal IO_PAD437
+signal IO_PAD438
+signal IO_PAD439
+signal IO_PAD441
+signal IO_PAD443
+signal IO_PAD444
+signal IO_PAD445
+signal IO_PAD447
+signal IO_PAD448
+signal IO_PAD449
+signal IO_PAD451
+signal IO_PAD453
+signal IO_PAD455
+signal IO_PAD456
+signal IO_PAD457
+signal IO_PAD459
+signal IO_PAD460
+signal IO_PAD461
+signal IO_PAD463
+signal IO_PAD465
+signal IO_PAD467
+signal IO_PAD468
+signal IO_PAD469
+signal IO_PAD471
+signal IO_PAD472
+signal IO_PAD473
+signal IO_PAD475
+signal IO_PAD477
+signal IO_PAD479
+signal IO_PAD480
+signal IO_PAD481
+signal IO_PAD483
+signal IO_PAD484
+signal IO_PAD485
+signal IO_PAD487
+signal IO_PAD489
+signal IO_PAD490
+signal IO_PAD491
+signal IO_PAD492
+signal IO_PAD493
+signal IO_PAD495
+signal IO_PAD497
+signal IO_PAD499
+signal IO_PAD501
+signal IO_PAD503
+signal IO_PAD504
+signal IO_PAD505
+signal IO_PAD507
+signal IO_PAD508
+signal IO_PAD509
+signal IO_PAD511
+signal IO_PAD513
+signal IO_PAD514
+signal IO_PAD515
+signal IO_PAD516
+signal IO_PAD518
+signal IO_PAD519
+signal IO_PAD520
+signal IO_PAD521
+signal IO_PAD523
+signal IO_PAD525
+signal IO_PAD526
+signal IO_PAD527
+signal IO_PAD529
+signal IO_PAD530
+signal IO_PAD531
+signal IO_PAD533
+signal IO_PAD535
+signal IO_PAD537
+signal IO_PAD539
+signal IO_PAD541
+signal IO_PAD542
+signal IO_PAD543
+signal IO_PAD544
+signal IO_PAD545
+signal IO_PAD547
+signal IO_PAD549
+signal IO_PAD550
+signal IO_PAD551
+signal IO_PAD553
+signal IO_PAD554
+signal IO_PAD555
+signal IO_PAD557
+signal IO_PAD559
+signal IO_PAD561
+signal IO_PAD562
+signal IO_PAD563
+signal IO_PAD565
+signal IO_PAD566
+signal IO_PAD567
+signal IO_PAD569
+signal IO_PAD571
+signal IO_PAD573
+signal IO_PAD574
+signal IO_PAD575
+signal IO_PAD577
+signal IO_PAD578
+signal IO_PAD579
+signal IO_PAD581
+signal IO_PAD583
+signal IO_PAD585
+signal IO_PAD586
+signal IO_PAD587
+signal IO_PAD589
+signal IO_PAD590
+signal IO_PAD591
+signal IO_PAD593
+signal IO_PAD595
+signal IO_PAD596
+signal IO_PAD597
+signal IO_PAD599
+signal IO_PAD601
+signal IO_PAD603
+signal IO_PAD605
+signal IO_PAD607
+signal IO_PAD608
+signal IO_PAD609
+signal IO_PAD611
+signal IO_PAD613
+signal IO_PAD614
+signal IO_PAD615
+signal IO_PAD617
+signal IO_PAD618
+signal IO_PAD619
+signal IO_PAD620
+signal IO_PAD621
+signal IO_PAD623
+signal IO_PAD625
+signal IO_PAD627
+signal IO_PAD629
+signal IO_PAD631
+signal IO_PAD633
+signal IO_PAD635
+signal IO_PAD636
+signal IO_PAD637
+signal IO_PAD638
+signal IO_PAD639
+signal IO_PAD641
+signal IO_PAD643
+signal IO_PAD645
+signal IO_PAD646
+signal IO_PAD647
+signal IO_PAD649
+signal IO_PAD651
+signal IO_PAD652
+signal IO_PAD657
+signal IO_PAD658
+signal IO_PAD659
+signal IO_PAD661
+signal IO_PAD662
+signal IO_PAD663
+signal IO_PAD665
+signal IO_PAD666
+signal IO_PAD667
+signal IO_PAD669
+signal IO_PAD670
+signal IO_PAD671
+signal IO_PAD673
+signal IO_PAD675
+signal IO_PAD677
+signal IO_PAD679
+signal IO_PAD680
+signal IO_PAD681
+signal IO_PAD682
+signal IO_PAD683
+signal IO_PAD685
+signal IO_PAD687
+signal IO_PAD688
+signal IO_PAD689
+signal IO_PAD690
+signal IO_PAD691
+signal IO_PAD692
+signal IO_PAD693
+signal IO_PAD695
+signal IO_PAD697
+signal IO_PAD698
+signal IO_PAD699
+signal IO_PAD700
+signal IO_PAD701
+signal IO_PAD703
+signal IO_PAD704
+signal IO_PAD705
+signal IO_PAD707
+signal IO_PAD708
+signal IO_PAD709
+signal IO_PAD711
+signal IO_PAD712
+signal IO_PAD713
+signal IO_PAD714
+signal IO_PAD715
+signal IO_PAD717
+signal IO_PAD719
+signal IO_PAD720
+signal IO_PAD721
+signal IO_PAD722
+signal IO_PAD723
+signal IO_PAD724
+signal IO_PAD725
+signal IO_PAD726
+signal IO_PAD727
+signal IO_PAD729
+signal IO_PAD731
+signal IO_PAD733
+signal IO_PAD734
+signal IO_PAD735
+signal IO_PAD736
+signal IO_PAD737
+signal IO_PAD739
+signal IO_PAD741
+signal IO_PAD742
+signal IO_PAD743
+signal IO_PAD744
+signal IO_PAD745
+signal IO_PAD747
+signal IO_PAD749
+signal IO_PAD750
+signal IO_PAD751
+signal IO_PAD752
+signal IO_PAD753
+signal IO_PAD755
+signal IO_PAD756
+signal IO_PAD757
+signal IO_PAD759
+signal IO_PAD761
+signal IO_PAD763
+signal IO_PAD765
+signal IO_PAD766
+signal IO_PAD767
+signal IO_PAD768
+signal IO_PAD769
+signal IO_PAD771
+signal IO_PAD773
+signal IO_PAD774
+signal IO_PAD776
+signal IO_PAD777
+signal IO_PAD779
+signal IO_PAD781
+signal IO_PAD782
+signal IO_PAD783
+signal IO_PAD784
+signal IO_PAD785
+signal IO_PAD787
+signal IO_PAD789
+signal IO_PAD791
+signal IO_PAD793
+signal IO_PAD794
+signal IO_PAD795
+signal IO_PAD797
+signal IO_PAD798
+signal IO_PAD799
+signal IO_PAD800
+signal IO_PAD801
+signal IO_PAD803
+signal IO_PAD805
+signal IO_PAD806
+signal IO_PAD807
+signal IO_PAD808
+signal IO_PAD809
+signal IO_PAD811
+signal IO_PAD813
+signal IO_PAD814
+signal IO_PAD815
+signal IO_PAD816
+signal IO_PAD817
+signal IO_PAD819
+signal IO_PAD821
+signal IO_PAD823
+signal IO_PAD824
+signal IO_PAD825
+signal IO_PAD826
+signal IO_PAD827
+signal IO_PAD828
+signal IO_PAD829
+signal IO_PAD830
+signal IO_PAD831
+signal IO_PAD833
+signal IO_PAD835
+signal IO_PAD836
+signal IO_PAD837
+signal IO_PAD838
+signal IO_PAD839
+signal IO_PAD841
+signal IO_PAD842
+signal IO_PAD843
+signal IO_PAD845
+signal IO_PAD846
+signal IO_PAD847
+signal IO_PAD849
+signal IO_PAD850
+signal IO_PAD851
+signal IO_PAD852
+signal IO_PAD853
+signal IO_PAD855
+signal IO_PAD857
+signal IO_PAD858
+signal IO_PAD859
+signal IO_PAD860
+signal IO_PAD861
+signal IO_PAD862
+signal IO_PAD863
+signal IO_PAD865
+signal IO_PAD867
+signal IO_PAD868
+signal IO_PAD869
+signal IO_PAD870
+signal IO_PAD871
+signal IO_PAD873
+signal IO_PAD875
+signal IO_PAD877
+signal IO_PAD879
+signal IO_PAD880
+signal IO_PAD881
+signal IO_PAD883
+signal IO_PAD884
+signal IO_PAD885
+signal IO_PAD887
+signal IO_PAD888
+signal IO_PAD889
+signal IO_PAD891
+signal IO_PAD892
+signal IO_PAD893
+signal IO_PAD898
+signal IO_PAD899
+signal IO_PAD901
+signal IO_PAD903
+signal IO_PAD904
+signal IO_PAD905
+signal IO_PAD907
+signal IO_PAD909
+signal IO_PAD911
+signal IO_PAD912
+signal IO_PAD913
+signal IO_PAD914
+signal IO_PAD915
+signal IO_PAD917
+signal IO_PAD919
+signal IO_PAD920
+signal IO_PAD921
+signal IO_PAD923
+signal IO_PAD925
+signal IO_PAD927
+signal IO_PAD928
+signal IO_PAD929
+signal IO_PAD930
+signal IO_PAD931
+signal IO_PAD933
+signal IO_PAD934
+signal IO_PAD935
+signal IO_PAD937
+signal IO_PAD939
+signal IO_PAD940
+signal IO_PAD941
+signal IO_PAD943
+signal IO_PAD945
+signal IO_PAD947
+signal IO_PAD949
+signal IO_PAD951
+signal IO_PAD952
+signal IO_PAD953
+signal IO_PAD955
+signal IO_PAD957
+signal IO_PAD958
+signal IO_PAD959
+signal IO_PAD961
+signal IO_PAD962
+signal IO_PAD963
+signal IO_PAD965
+signal IO_PAD967
+signal IO_PAD969
+signal IO_PAD970
+signal IO_PAD971
+signal IO_PAD973
+signal IO_PAD974
+signal IO_PAD975
+signal IO_PAD977
+signal IO_PAD979
+signal IO_PAD981
+signal IO_PAD982
+signal IO_PAD983
+signal IO_PAD985
+signal IO_PAD986
+signal IO_PAD987
+signal IO_PAD989
+signal IO_PAD991
+signal IO_PAD993
+signal IO_PAD994
+signal IO_PAD995
+signal IO_PAD997
+signal IO_PAD998
+signal IO_PAD999
+signal IO_PAD1001
+signal IO_PAD1003
+signal IO_PAD1004
+signal IO_PAD1005
+signal IO_PAD1006
+signal IO_PAD1007
+signal IO_PAD1009
+signal IO_PAD1011
+signal IO_PAD1013
+signal IO_PAD1015
+signal IO_PAD1017
+signal IO_PAD1018
+signal IO_PAD1019
+signal IO_PAD1021
+signal IO_PAD1022
+signal IO_PAD1023
+signal IO_PAD1025
+signal IO_PAD1027
+signal IO_PAD1028
+signal IO_PAD1029
+
+register BSR 2243
+register BR 1
+register DIR 32
+
+instruction length 6
+
+instruction EXTEST 000000 BSR
+instruction SAMPLE/PRELOAD 000001 BSR
+instruction IDCODE 001001 DIR
+instruction BYPASS 111111 BR
+
+bit 2242 I 1 IO_PAD893
+bit 2241 O 1 IO_PAD893 2240 1 Z
+bit 2240 C 1 *
+bit 2239 I 1 IO_PAD892
+bit 2238 O 1 IO_PAD892 2237 1 Z
+bit 2237 C 1 *
+bit 2236 I 1 IO_PAD891
+bit 2235 O 1 IO_PAD891 2234 1 Z
+bit 2234 C 1 *
+bit 2233 I 1 IO_PAD889
+bit 2232 O 1 IO_PAD889 2231 1 Z
+bit 2231 C 1 *
+bit 2230 I 1 IO_PAD888
+bit 2229 O 1 IO_PAD888 2228 1 Z
+bit 2228 C 1 *
+bit 2227 I 1 IO_PAD887
+bit 2226 O 1 IO_PAD887 2225 1 Z
+bit 2225 C 1 *
+bit 2224 I 1 IO_PAD885
+bit 2223 O 1 IO_PAD885 2222 1 Z
+bit 2222 C 1 *
+bit 2221 I 1 IO_PAD884
+bit 2220 O 1 IO_PAD884 2219 1 Z
+bit 2219 C 1 *
+bit 2218 I 1 IO_PAD883
+bit 2217 O 1 IO_PAD883 2216 1 Z
+bit 2216 C 1 *
+bit 2215 I 1 IO_PAD881
+bit 2214 O 1 IO_PAD881 2213 1 Z
+bit 2213 C 1 *
+bit 2212 I 1 IO_PAD880
+bit 2211 O 1 IO_PAD880 2210 1 Z
+bit 2210 C 1 *
+bit 2209 I 1 IO_PAD879
+bit 2208 O 1 IO_PAD879 2207 1 Z
+bit 2207 C 1 *
+bit 2206 I 1 IO_PAD877
+bit 2205 O 1 IO_PAD877 2204 1 Z
+bit 2204 C 1 *
+bit 2203 O 1 *
+bit 2202 O 1 *
+bit 2201 O 1 *
+bit 2200 O 1 *
+bit 2199 O 1 *
+bit 2198 O 1 *
+bit 2197 I 1 IO_PAD875
+bit 2196 O 1 IO_PAD875 2195 1 Z
+bit 2195 C 1 *
+bit 2194 I 1 IO_PAD873
+bit 2193 O 1 IO_PAD873 2192 1 Z
+bit 2192 C 1 *
+bit 2191 I 1 IO_PAD871
+bit 2190 O 1 IO_PAD871 2189 1 Z
+bit 2189 C 1 *
+bit 2188 I 1 IO_PAD870
+bit 2187 O 1 IO_PAD870 2186 1 Z
+bit 2186 C 1 *
+bit 2185 I 1 IO_PAD869
+bit 2184 O 1 IO_PAD869 2183 1 Z
+bit 2183 C 1 *
+bit 2182 I 1 IO_PAD868
+bit 2181 O 1 IO_PAD868 2180 1 Z
+bit 2180 C 1 *
+bit 2179 I 1 IO_PAD867
+bit 2178 O 1 IO_PAD867 2177 1 Z
+bit 2177 C 1 *
+bit 2176 I 1 IO_PAD865
+bit 2175 O 1 IO_PAD865 2174 1 Z
+bit 2174 C 1 *
+bit 2173 I 1 IO_PAD863
+bit 2172 O 1 IO_PAD863 2171 1 Z
+bit 2171 C 1 *
+bit 2170 I 1 IO_PAD862
+bit 2169 O 1 IO_PAD862 2168 1 Z
+bit 2168 C 1 *
+bit 2167 I 1 IO_PAD861
+bit 2166 O 1 IO_PAD861 2165 1 Z
+bit 2165 C 1 *
+bit 2164 I 1 IO_PAD860
+bit 2163 O 1 IO_PAD860 2162 1 Z
+bit 2162 C 1 *
+bit 2161 I 1 IO_PAD859
+bit 2160 O 1 IO_PAD859 2159 1 Z
+bit 2159 C 1 *
+bit 2158 I 1 IO_PAD858
+bit 2157 O 1 IO_PAD858 2156 1 Z
+bit 2156 C 1 *
+bit 2155 I 1 IO_PAD857
+bit 2154 O 1 IO_PAD857 2153 1 Z
+bit 2153 C 1 *
+bit 2152 I 1 IO_PAD855
+bit 2151 O 1 IO_PAD855 2150 1 Z
+bit 2150 C 1 *
+bit 2149 I 1 IO_PAD853
+bit 2148 O 1 IO_PAD853 2147 1 Z
+bit 2147 C 1 *
+bit 2146 I 1 IO_PAD852
+bit 2145 O 1 IO_PAD852 2144 1 Z
+bit 2144 C 1 *
+bit 2143 I 1 IO_PAD851
+bit 2142 O 1 IO_PAD851 2141 1 Z
+bit 2141 C 1 *
+bit 2140 I 1 IO_PAD850
+bit 2139 O 1 IO_PAD850 2138 1 Z
+bit 2138 C 1 *
+bit 2137 I 1 IO_PAD849
+bit 2136 O 1 IO_PAD849 2135 1 Z
+bit 2135 C 1 *
+bit 2134 I 1 IO_PAD847
+bit 2133 O 1 IO_PAD847 2132 1 Z
+bit 2132 C 1 *
+bit 2131 I 1 IO_PAD846
+bit 2130 O 1 IO_PAD846 2129 1 Z
+bit 2129 C 1 *
+bit 2128 O 1 *
+bit 2127 O 1 *
+bit 2126 O 1 *
+bit 2125 O 1 *
+bit 2124 O 1 *
+bit 2123 O 1 *
+bit 2122 I 1 IO_PAD845
+bit 2121 O 1 IO_PAD845 2120 1 Z
+bit 2120 C 1 *
+bit 2119 I 1 IO_PAD843
+bit 2118 O 1 IO_PAD843 2117 1 Z
+bit 2117 C 1 *
+bit 2116 I 1 IO_PAD842
+bit 2115 O 1 IO_PAD842 2114 1 Z
+bit 2114 C 1 *
+bit 2113 I 1 IO_PAD841
+bit 2112 O 1 IO_PAD841 2111 1 Z
+bit 2111 C 1 *
+bit 2110 I 1 IO_PAD839
+bit 2109 O 1 IO_PAD839 2108 1 Z
+bit 2108 C 1 *
+bit 2107 I 1 IO_PAD838
+bit 2106 O 1 IO_PAD838 2105 1 Z
+bit 2105 C 1 *
+bit 2104 I 1 IO_PAD837
+bit 2103 O 1 IO_PAD837 2102 1 Z
+bit 2102 C 1 *
+bit 2101 I 1 IO_PAD836
+bit 2100 O 1 IO_PAD836 2099 1 Z
+bit 2099 C 1 *
+bit 2098 I 1 IO_PAD835
+bit 2097 O 1 IO_PAD835 2096 1 Z
+bit 2096 C 1 *
+bit 2095 I 1 IO_PAD833
+bit 2094 O 1 IO_PAD833 2093 1 Z
+bit 2093 C 1 *
+bit 2092 I 1 IO_PAD831
+bit 2091 O 1 IO_PAD831 2090 1 Z
+bit 2090 C 1 *
+bit 2089 I 1 IO_PAD830
+bit 2088 O 1 IO_PAD830 2087 1 Z
+bit 2087 C 1 *
+bit 2086 I 1 IO_PAD829
+bit 2085 O 1 IO_PAD829 2084 1 Z
+bit 2084 C 1 *
+bit 2083 I 1 IO_PAD828
+bit 2082 O 1 IO_PAD828 2081 1 Z
+bit 2081 C 1 *
+bit 2080 I 1 IO_PAD827
+bit 2079 O 1 IO_PAD827 2078 1 Z
+bit 2078 C 1 *
+bit 2077 I 1 IO_PAD826
+bit 2076 O 1 IO_PAD826 2075 1 Z
+bit 2075 C 1 *
+bit 2074 I 1 IO_PAD825
+bit 2073 O 1 IO_PAD825 2072 1 Z
+bit 2072 C 1 *
+bit 2071 I 1 IO_PAD824
+bit 2070 O 1 IO_PAD824 2069 1 Z
+bit 2069 C 1 *
+bit 2068 I 1 IO_PAD823
+bit 2067 O 1 IO_PAD823 2066 1 Z
+bit 2066 C 1 *
+bit 2065 I 1 IO_PAD821
+bit 2064 O 1 IO_PAD821 2063 1 Z
+bit 2063 C 1 *
+bit 2062 O 1 *
+bit 2061 O 1 *
+bit 2060 O 1 *
+bit 2059 O 1 *
+bit 2058 O 1 *
+bit 2057 O 1 *
+bit 2056 I 1 IO_PAD819
+bit 2055 O 1 IO_PAD819 2054 1 Z
+bit 2054 C 1 *
+bit 2053 I 1 IO_PAD817
+bit 2052 O 1 IO_PAD817 2051 1 Z
+bit 2051 C 1 *
+bit 2050 I 1 IO_PAD816
+bit 2049 O 1 IO_PAD816 2048 1 Z
+bit 2048 C 1 *
+bit 2047 I 1 IO_PAD815
+bit 2046 O 1 IO_PAD815 2045 1 Z
+bit 2045 C 1 *
+bit 2044 I 1 IO_PAD814
+bit 2043 O 1 IO_PAD814 2042 1 Z
+bit 2042 C 1 *
+bit 2041 I 1 IO_PAD813
+bit 2040 O 1 IO_PAD813 2039 1 Z
+bit 2039 C 1 *
+bit 2038 I 1 IO_PAD811
+bit 2037 O 1 IO_PAD811 2036 1 Z
+bit 2036 C 1 *
+bit 2035 I 1 IO_PAD809
+bit 2034 O 1 IO_PAD809 2033 1 Z
+bit 2033 C 1 *
+bit 2032 I 1 IO_PAD808
+bit 2031 O 1 IO_PAD808 2030 1 Z
+bit 2030 C 1 *
+bit 2029 I 1 IO_PAD807
+bit 2028 O 1 IO_PAD807 2027 1 Z
+bit 2027 C 1 *
+bit 2026 I 1 IO_PAD806
+bit 2025 O 1 IO_PAD806 2024 1 Z
+bit 2024 C 1 *
+bit 2023 I 1 IO_PAD805
+bit 2022 O 1 IO_PAD805 2021 1 Z
+bit 2021 C 1 *
+bit 2020 I 1 IO_PAD803
+bit 2019 O 1 IO_PAD803 2018 1 Z
+bit 2018 C 1 *
+bit 2017 I 1 IO_PAD801
+bit 2016 O 1 IO_PAD801 2015 1 Z
+bit 2015 C 1 *
+bit 2014 I 1 IO_PAD800
+bit 2013 O 1 IO_PAD800 2012 1 Z
+bit 2012 C 1 *
+bit 2011 I 1 IO_PAD799
+bit 2010 O 1 IO_PAD799 2009 1 Z
+bit 2009 C 1 *
+bit 2008 I 1 IO_PAD798
+bit 2007 O 1 IO_PAD798 2006 1 Z
+bit 2006 C 1 *
+bit 2005 I 1 IO_PAD797
+bit 2004 O 1 IO_PAD797 2003 1 Z
+bit 2003 C 1 *
+bit 2002 I 1 IO_PAD795
+bit 2001 O 1 IO_PAD795 2000 1 Z
+bit 2000 C 1 *
+bit 1999 I 1 IO_PAD794
+bit 1998 O 1 IO_PAD794 1997 1 Z
+bit 1997 C 1 *
+bit 1996 I 1 IO_PAD793
+bit 1995 O 1 IO_PAD793 1994 1 Z
+bit 1994 C 1 *
+bit 1993 I 1 IO_PAD791
+bit 1992 O 1 IO_PAD791 1991 1 Z
+bit 1991 C 1 *
+bit 1990 I 1 IO_PAD789
+bit 1989 O 1 IO_PAD789 1988 1 Z
+bit 1988 C 1 *
+bit 1987 O 1 *
+bit 1986 O 1 *
+bit 1985 O 1 *
+bit 1984 O 1 *
+bit 1983 O 1 *
+bit 1982 O 1 *
+bit 1981 I 1 IO_PAD787
+bit 1980 O 1 IO_PAD787 1979 1 Z
+bit 1979 C 1 *
+bit 1978 I 1 IO_PAD785
+bit 1977 O 1 IO_PAD785 1976 1 Z
+bit 1976 C 1 *
+bit 1975 I 1 IO_PAD784
+bit 1974 O 1 IO_PAD784 1973 1 Z
+bit 1973 C 1 *
+bit 1972 I 1 IO_PAD783
+bit 1971 O 1 IO_PAD783 1970 1 Z
+bit 1970 C 1 *
+bit 1969 I 1 IO_PAD782
+bit 1968 O 1 IO_PAD782 1967 1 Z
+bit 1967 C 1 *
+bit 1966 I 1 IO_PAD781
+bit 1965 O 1 IO_PAD781 1964 1 Z
+bit 1964 C 1 *
+bit 1963 I 1 IO_PAD779
+bit 1962 O 1 IO_PAD779 1961 1 Z
+bit 1961 C 1 *
+bit 1960 I 1 IO_PAD777
+bit 1959 O 1 IO_PAD777 1958 1 Z
+bit 1958 C 1 *
+bit 1957 I 1 IO_PAD776
+bit 1956 O 1 IO_PAD776 1955 1 Z
+bit 1955 C 1 *
+bit 1954 I 1 IO_PAD774
+bit 1953 O 1 IO_PAD774 1952 1 Z
+bit 1952 C 1 *
+bit 1951 I 1 IO_PAD773
+bit 1950 O 1 IO_PAD773 1949 1 Z
+bit 1949 C 1 *
+bit 1948 I 1 IO_PAD771
+bit 1947 O 1 IO_PAD771 1946 1 Z
+bit 1946 C 1 *
+bit 1945 I 1 IO_PAD769
+bit 1944 O 1 IO_PAD769 1943 1 Z
+bit 1943 C 1 *
+bit 1942 I 1 IO_PAD768
+bit 1941 O 1 IO_PAD768 1940 1 Z
+bit 1940 C 1 *
+bit 1939 I 1 IO_PAD767
+bit 1938 O 1 IO_PAD767 1937 1 Z
+bit 1937 C 1 *
+bit 1936 I 1 IO_PAD766
+bit 1935 O 1 IO_PAD766 1934 1 Z
+bit 1934 C 1 *
+bit 1933 I 1 IO_PAD765
+bit 1932 O 1 IO_PAD765 1931 1 Z
+bit 1931 C 1 *
+bit 1930 I 1 IO_PAD763
+bit 1929 O 1 IO_PAD763 1928 1 Z
+bit 1928 C 1 *
+bit 1927 O 1 *
+bit 1926 O 1 *
+bit 1925 O 1 *
+bit 1924 O 1 *
+bit 1923 O 1 *
+bit 1922 O 1 *
+bit 1921 I 1 IO_PAD761
+bit 1920 O 1 IO_PAD761 1919 1 Z
+bit 1919 C 1 *
+bit 1918 I 1 IO_PAD759
+bit 1917 O 1 IO_PAD759 1916 1 Z
+bit 1916 C 1 *
+bit 1915 I 1 IO_PAD757
+bit 1914 O 1 IO_PAD757 1913 1 Z
+bit 1913 C 1 *
+bit 1912 I 1 IO_PAD756
+bit 1911 O 1 IO_PAD756 1910 1 Z
+bit 1910 C 1 *
+bit 1909 I 1 IO_PAD755
+bit 1908 O 1 IO_PAD755 1907 1 Z
+bit 1907 C 1 *
+bit 1906 I 1 IO_PAD753
+bit 1905 O 1 IO_PAD753 1904 1 Z
+bit 1904 C 1 *
+bit 1903 I 1 IO_PAD752
+bit 1902 O 1 IO_PAD752 1901 1 Z
+bit 1901 C 1 *
+bit 1900 I 1 IO_PAD751
+bit 1899 O 1 IO_PAD751 1898 1 Z
+bit 1898 C 1 *
+bit 1897 I 1 IO_PAD750
+bit 1896 O 1 IO_PAD750 1895 1 Z
+bit 1895 C 1 *
+bit 1894 I 1 IO_PAD749
+bit 1893 O 1 IO_PAD749 1892 1 Z
+bit 1892 C 1 *
+bit 1891 I 1 IO_PAD747
+bit 1890 O 1 IO_PAD747 1889 1 Z
+bit 1889 C 1 *
+bit 1888 I 1 IO_PAD745
+bit 1887 O 1 IO_PAD745 1886 1 Z
+bit 1886 C 1 *
+bit 1885 I 1 IO_PAD744
+bit 1884 O 1 IO_PAD744 1883 1 Z
+bit 1883 C 1 *
+bit 1882 I 1 IO_PAD743
+bit 1881 O 1 IO_PAD743 1880 1 Z
+bit 1880 C 1 *
+bit 1879 I 1 IO_PAD742
+bit 1878 O 1 IO_PAD742 1877 1 Z
+bit 1877 C 1 *
+bit 1876 I 1 IO_PAD741
+bit 1875 O 1 IO_PAD741 1874 1 Z
+bit 1874 C 1 *
+bit 1873 I 1 IO_PAD739
+bit 1872 O 1 IO_PAD739 1871 1 Z
+bit 1871 C 1 *
+bit 1870 I 1 IO_PAD737
+bit 1869 O 1 IO_PAD737 1868 1 Z
+bit 1868 C 1 *
+bit 1867 I 1 IO_PAD736
+bit 1866 O 1 IO_PAD736 1865 1 Z
+bit 1865 C 1 *
+bit 1864 I 1 IO_PAD735
+bit 1863 O 1 IO_PAD735 1862 1 Z
+bit 1862 C 1 *
+bit 1861 I 1 IO_PAD734
+bit 1860 O 1 IO_PAD734 1859 1 Z
+bit 1859 C 1 *
+bit 1858 I 1 IO_PAD733
+bit 1857 O 1 IO_PAD733 1856 1 Z
+bit 1856 C 1 *
+bit 1855 I 1 IO_PAD731
+bit 1854 O 1 IO_PAD731 1853 1 Z
+bit 1853 C 1 *
+bit 1852 O 1 *
+bit 1851 O 1 *
+bit 1850 O 1 *
+bit 1849 O 1 *
+bit 1848 O 1 *
+bit 1847 O 1 *
+bit 1846 I 1 IO_PAD729
+bit 1845 O 1 IO_PAD729 1844 1 Z
+bit 1844 C 1 *
+bit 1843 I 1 IO_PAD727
+bit 1842 O 1 IO_PAD727 1841 1 Z
+bit 1841 C 1 *
+bit 1840 I 1 IO_PAD726
+bit 1839 O 1 IO_PAD726 1838 1 Z
+bit 1838 C 1 *
+bit 1837 I 1 IO_PAD725
+bit 1836 O 1 IO_PAD725 1835 1 Z
+bit 1835 C 1 *
+bit 1834 I 1 IO_PAD724
+bit 1833 O 1 IO_PAD724 1832 1 Z
+bit 1832 C 1 *
+bit 1831 I 1 IO_PAD723
+bit 1830 O 1 IO_PAD723 1829 1 Z
+bit 1829 C 1 *
+bit 1828 I 1 IO_PAD722
+bit 1827 O 1 IO_PAD722 1826 1 Z
+bit 1826 C 1 *
+bit 1825 I 1 IO_PAD721
+bit 1824 O 1 IO_PAD721 1823 1 Z
+bit 1823 C 1 *
+bit 1822 I 1 IO_PAD720
+bit 1821 O 1 IO_PAD720 1820 1 Z
+bit 1820 C 1 *
+bit 1819 I 1 IO_PAD719
+bit 1818 O 1 IO_PAD719 1817 1 Z
+bit 1817 C 1 *
+bit 1816 I 1 IO_PAD717
+bit 1815 O 1 IO_PAD717 1814 1 Z
+bit 1814 C 1 *
+bit 1813 I 1 IO_PAD715
+bit 1812 O 1 IO_PAD715 1811 1 Z
+bit 1811 C 1 *
+bit 1810 I 1 IO_PAD714
+bit 1809 O 1 IO_PAD714 1808 1 Z
+bit 1808 C 1 *
+bit 1807 I 1 IO_PAD713
+bit 1806 O 1 IO_PAD713 1805 1 Z
+bit 1805 C 1 *
+bit 1804 I 1 IO_PAD712
+bit 1803 O 1 IO_PAD712 1802 1 Z
+bit 1802 C 1 *
+bit 1801 I 1 IO_PAD711
+bit 1800 O 1 IO_PAD711 1799 1 Z
+bit 1799 C 1 *
+bit 1798 I 1 IO_PAD709
+bit 1797 O 1 IO_PAD709 1796 1 Z
+bit 1796 C 1 *
+bit 1795 I 1 IO_PAD708
+bit 1794 O 1 IO_PAD708 1793 1 Z
+bit 1793 C 1 *
+bit 1792 I 1 IO_PAD707
+bit 1791 O 1 IO_PAD707 1790 1 Z
+bit 1790 C 1 *
+bit 1789 I 1 IO_PAD705
+bit 1788 O 1 IO_PAD705 1787 1 Z
+bit 1787 C 1 *
+bit 1786 O 1 *
+bit 1785 O 1 *
+bit 1784 O 1 *
+bit 1783 O 1 *
+bit 1782 O 1 *
+bit 1781 O 1 *
+bit 1780 I 1 IO_PAD704
+bit 1779 O 1 IO_PAD704 1778 1 Z
+bit 1778 C 1 *
+bit 1777 I 1 IO_PAD703
+bit 1776 O 1 IO_PAD703 1775 1 Z
+bit 1775 C 1 *
+bit 1774 I 1 IO_PAD701
+bit 1773 O 1 IO_PAD701 1772 1 Z
+bit 1772 C 1 *
+bit 1771 I 1 IO_PAD700
+bit 1770 O 1 IO_PAD700 1769 1 Z
+bit 1769 C 1 *
+bit 1768 I 1 IO_PAD699
+bit 1767 O 1 IO_PAD699 1766 1 Z
+bit 1766 C 1 *
+bit 1765 I 1 IO_PAD698
+bit 1764 O 1 IO_PAD698 1763 1 Z
+bit 1763 C 1 *
+bit 1762 I 1 IO_PAD697
+bit 1761 O 1 IO_PAD697 1760 1 Z
+bit 1760 C 1 *
+bit 1759 I 1 IO_PAD695
+bit 1758 O 1 IO_PAD695 1757 1 Z
+bit 1757 C 1 *
+bit 1756 I 1 IO_PAD693
+bit 1755 O 1 IO_PAD693 1754 1 Z
+bit 1754 C 1 *
+bit 1753 I 1 IO_PAD692
+bit 1752 O 1 IO_PAD692 1751 1 Z
+bit 1751 C 1 *
+bit 1750 I 1 IO_PAD691
+bit 1749 O 1 IO_PAD691 1748 1 Z
+bit 1748 C 1 *
+bit 1747 I 1 IO_PAD690
+bit 1746 O 1 IO_PAD690 1745 1 Z
+bit 1745 C 1 *
+bit 1744 I 1 IO_PAD689
+bit 1743 O 1 IO_PAD689 1742 1 Z
+bit 1742 C 1 *
+bit 1741 I 1 IO_PAD688
+bit 1740 O 1 IO_PAD688 1739 1 Z
+bit 1739 C 1 *
+bit 1738 I 1 IO_PAD687
+bit 1737 O 1 IO_PAD687 1736 1 Z
+bit 1736 C 1 *
+bit 1735 I 1 IO_PAD685
+bit 1734 O 1 IO_PAD685 1733 1 Z
+bit 1733 C 1 *
+bit 1732 I 1 IO_PAD683
+bit 1731 O 1 IO_PAD683 1730 1 Z
+bit 1730 C 1 *
+bit 1729 I 1 IO_PAD682
+bit 1728 O 1 IO_PAD682 1727 1 Z
+bit 1727 C 1 *
+bit 1726 I 1 IO_PAD681
+bit 1725 O 1 IO_PAD681 1724 1 Z
+bit 1724 C 1 *
+bit 1723 I 1 IO_PAD680
+bit 1722 O 1 IO_PAD680 1721 1 Z
+bit 1721 C 1 *
+bit 1720 I 1 IO_PAD679
+bit 1719 O 1 IO_PAD679 1718 1 Z
+bit 1718 C 1 *
+bit 1717 I 1 IO_PAD677
+bit 1716 O 1 IO_PAD677 1715 1 Z
+bit 1715 C 1 *
+bit 1714 I 1 IO_PAD675
+bit 1713 O 1 IO_PAD675 1712 1 Z
+bit 1712 C 1 *
+bit 1711 O 1 *
+bit 1710 O 1 *
+bit 1709 O 1 *
+bit 1708 O 1 *
+bit 1707 O 1 *
+bit 1706 O 1 *
+bit 1705 I 1 IO_PAD673
+bit 1704 O 1 IO_PAD673 1703 1 Z
+bit 1703 C 1 *
+bit 1702 I 1 IO_PAD671
+bit 1701 O 1 IO_PAD671 1700 1 Z
+bit 1700 C 1 *
+bit 1699 I 1 IO_PAD670
+bit 1698 O 1 IO_PAD670 1697 1 Z
+bit 1697 C 1 *
+bit 1696 I 1 IO_PAD669
+bit 1695 O 1 IO_PAD669 1694 1 Z
+bit 1694 C 1 *
+bit 1693 I 1 IO_PAD667
+bit 1692 O 1 IO_PAD667 1691 1 Z
+bit 1691 C 1 *
+bit 1690 I 1 IO_PAD666
+bit 1689 O 1 IO_PAD666 1688 1 Z
+bit 1688 C 1 *
+bit 1687 I 1 IO_PAD665
+bit 1686 O 1 IO_PAD665 1685 1 Z
+bit 1685 C 1 *
+bit 1684 I 1 IO_PAD663
+bit 1683 O 1 IO_PAD663 1682 1 Z
+bit 1682 C 1 *
+bit 1681 I 1 IO_PAD662
+bit 1680 O 1 IO_PAD662 1679 1 Z
+bit 1679 C 1 *
+bit 1678 I 1 IO_PAD661
+bit 1677 O 1 IO_PAD661 1676 1 Z
+bit 1676 C 1 *
+bit 1675 I 1 IO_PAD659
+bit 1674 O 1 IO_PAD659 1673 1 Z
+bit 1673 C 1 *
+bit 1672 I 1 IO_PAD658
+bit 1671 O 1 IO_PAD658 1670 1 Z
+bit 1670 C 1 *
+bit 1669 I 1 IO_PAD657
+bit 1668 O 1 IO_PAD657 1667 1 Z
+bit 1667 C 1 *
+bit 1666 I 1 CCLK_PAD654
+bit 1665 O 1 CCLK_PAD654 1664 1 Z
+bit 1664 C 1 *
+bit 1663 I 1 DONE_PAD653
+bit 1662 O 1 DONE_PAD653 1661 1 Z
+bit 1661 C 1 *
+bit 1660 I 1 IO_PAD652
+bit 1659 O 1 IO_PAD652 1658 1 Z
+bit 1658 C 1 *
+bit 1657 I 1 IO_PAD651
+bit 1656 O 1 IO_PAD651 1655 1 Z
+bit 1655 C 1 *
+bit 1654 I 1 IO_PAD649
+bit 1653 O 1 IO_PAD649 1652 1 Z
+bit 1652 C 1 *
+bit 1651 I 1 IO_PAD647
+bit 1650 O 1 IO_PAD647 1649 1 Z
+bit 1649 C 1 *
+bit 1648 I 1 IO_PAD646
+bit 1647 O 1 IO_PAD646 1646 1 Z
+bit 1646 C 1 *
+bit 1645 I 1 IO_PAD645
+bit 1644 O 1 IO_PAD645 1643 1 Z
+bit 1643 C 1 *
+bit 1642 I 1 IO_PAD643
+bit 1641 O 1 IO_PAD643 1640 1 Z
+bit 1640 C 1 *
+bit 1639 I 1 IO_PAD641
+bit 1638 O 1 IO_PAD641 1637 1 Z
+bit 1637 C 1 *
+bit 1636 I 1 IO_PAD639
+bit 1635 O 1 IO_PAD639 1634 1 Z
+bit 1634 C 1 *
+bit 1633 I 1 IO_PAD638
+bit 1632 O 1 IO_PAD638 1631 1 Z
+bit 1631 C 1 *
+bit 1630 I 1 IO_PAD637
+bit 1629 O 1 IO_PAD637 1628 1 Z
+bit 1628 C 1 *
+bit 1627 I 1 IO_PAD636
+bit 1626 O 1 IO_PAD636 1625 1 Z
+bit 1625 C 1 *
+bit 1624 I 1 IO_PAD635
+bit 1623 O 1 IO_PAD635 1622 1 Z
+bit 1622 C 1 *
+bit 1621 I 1 IO_PAD633
+bit 1620 O 1 IO_PAD633 1619 1 Z
+bit 1619 C 1 *
+bit 1618 I 1 IO_PAD631
+bit 1617 O 1 IO_PAD631 1616 1 Z
+bit 1616 C 1 *
+bit 1615 I 1 IO_PAD629
+bit 1614 O 1 IO_PAD629 1613 1 Z
+bit 1613 C 1 *
+bit 1612 I 1 IO_PAD627
+bit 1611 O 1 IO_PAD627 1610 1 Z
+bit 1610 C 1 *
+bit 1609 I 1 IO_PAD625
+bit 1608 O 1 IO_PAD625 1607 1 Z
+bit 1607 C 1 *
+bit 1606 I 1 IO_PAD623
+bit 1605 O 1 IO_PAD623 1604 1 Z
+bit 1604 C 1 *
+bit 1603 I 1 IO_PAD621
+bit 1602 O 1 IO_PAD621 1601 1 Z
+bit 1601 C 1 *
+bit 1600 I 1 IO_PAD620
+bit 1599 O 1 IO_PAD620 1598 1 Z
+bit 1598 C 1 *
+bit 1597 I 1 IO_PAD619
+bit 1596 O 1 IO_PAD619 1595 1 Z
+bit 1595 C 1 *
+bit 1594 I 1 IO_PAD618
+bit 1593 O 1 IO_PAD618 1592 1 Z
+bit 1592 C 1 *
+bit 1591 I 1 IO_PAD617
+bit 1590 O 1 IO_PAD617 1589 1 Z
+bit 1589 C 1 *
+bit 1588 I 1 IO_PAD615
+bit 1587 O 1 IO_PAD615 1586 1 Z
+bit 1586 C 1 *
+bit 1585 I 1 IO_PAD614
+bit 1584 O 1 IO_PAD614 1583 1 Z
+bit 1583 C 1 *
+bit 1582 I 1 IO_PAD613
+bit 1581 O 1 IO_PAD613 1580 1 Z
+bit 1580 C 1 *
+bit 1579 I 1 IO_PAD611
+bit 1578 O 1 IO_PAD611 1577 1 Z
+bit 1577 C 1 *
+bit 1576 I 1 IO_PAD609
+bit 1575 O 1 IO_PAD609 1574 1 Z
+bit 1574 C 1 *
+bit 1573 I 1 IO_PAD608
+bit 1572 O 1 IO_PAD608 1571 1 Z
+bit 1571 C 1 *
+bit 1570 I 1 IO_PAD607
+bit 1569 O 1 IO_PAD607 1568 1 Z
+bit 1568 C 1 *
+bit 1567 I 1 IO_PAD605
+bit 1566 O 1 IO_PAD605 1565 1 Z
+bit 1565 C 1 *
+bit 1564 I 1 IO_PAD603
+bit 1563 O 1 IO_PAD603 1562 1 Z
+bit 1562 C 1 *
+bit 1561 I 1 IO_PAD601
+bit 1560 O 1 IO_PAD601 1559 1 Z
+bit 1559 C 1 *
+bit 1558 I 1 IO_PAD599
+bit 1557 O 1 IO_PAD599 1556 1 Z
+bit 1556 C 1 *
+bit 1555 I 1 IO_PAD597
+bit 1554 O 1 IO_PAD597 1553 1 Z
+bit 1553 C 1 *
+bit 1552 I 1 IO_PAD596
+bit 1551 O 1 IO_PAD596 1550 1 Z
+bit 1550 C 1 *
+bit 1549 I 1 IO_PAD595
+bit 1548 O 1 IO_PAD595 1547 1 Z
+bit 1547 C 1 *
+bit 1546 I 1 IO_PAD593
+bit 1545 O 1 IO_PAD593 1544 1 Z
+bit 1544 C 1 *
+bit 1543 I 1 IO_PAD591
+bit 1542 O 1 IO_PAD591 1541 1 Z
+bit 1541 C 1 *
+bit 1540 I 1 IO_PAD590
+bit 1539 O 1 IO_PAD590 1538 1 Z
+bit 1538 C 1 *
+bit 1537 I 1 IO_PAD589
+bit 1536 O 1 IO_PAD589 1535 1 Z
+bit 1535 C 1 *
+bit 1534 I 1 IO_PAD587
+bit 1533 O 1 IO_PAD587 1532 1 Z
+bit 1532 C 1 *
+bit 1531 I 1 IO_PAD586
+bit 1530 O 1 IO_PAD586 1529 1 Z
+bit 1529 C 1 *
+bit 1528 I 1 IO_PAD585
+bit 1527 O 1 IO_PAD585 1526 1 Z
+bit 1526 C 1 *
+bit 1525 I 1 IO_PAD583
+bit 1524 O 1 IO_PAD583 1523 1 Z
+bit 1523 C 1 *
+bit 1522 I 1 IO_PAD581
+bit 1521 O 1 IO_PAD581 1520 1 Z
+bit 1520 C 1 *
+bit 1519 I 1 IO_PAD579
+bit 1518 O 1 IO_PAD579 1517 1 Z
+bit 1517 C 1 *
+bit 1516 I 1 IO_PAD578
+bit 1515 O 1 IO_PAD578 1514 1 Z
+bit 1514 C 1 *
+bit 1513 I 1 IO_PAD577
+bit 1512 O 1 IO_PAD577 1511 1 Z
+bit 1511 C 1 *
+bit 1510 I 1 IO_PAD575
+bit 1509 O 1 IO_PAD575 1508 1 Z
+bit 1508 C 1 *
+bit 1507 I 1 IO_PAD574
+bit 1506 O 1 IO_PAD574 1505 1 Z
+bit 1505 C 1 *
+bit 1504 I 1 IO_PAD573
+bit 1503 O 1 IO_PAD573 1502 1 Z
+bit 1502 C 1 *
+bit 1501 I 1 IO_PAD571
+bit 1500 O 1 IO_PAD571 1499 1 Z
+bit 1499 C 1 *
+bit 1498 I 1 IO_PAD569
+bit 1497 O 1 IO_PAD569 1496 1 Z
+bit 1496 C 1 *
+bit 1495 I 1 IO_PAD567
+bit 1494 O 1 IO_PAD567 1493 1 Z
+bit 1493 C 1 *
+bit 1492 I 1 IO_PAD566
+bit 1491 O 1 IO_PAD566 1490 1 Z
+bit 1490 C 1 *
+bit 1489 I 1 IO_PAD565
+bit 1488 O 1 IO_PAD565 1487 1 Z
+bit 1487 C 1 *
+bit 1486 I 1 IO_PAD563
+bit 1485 O 1 IO_PAD563 1484 1 Z
+bit 1484 C 1 *
+bit 1483 I 1 IO_PAD562
+bit 1482 O 1 IO_PAD562 1481 1 Z
+bit 1481 C 1 *
+bit 1480 I 1 IO_PAD561
+bit 1479 O 1 IO_PAD561 1478 1 Z
+bit 1478 C 1 *
+bit 1477 I 1 IO_PAD559
+bit 1476 O 1 IO_PAD559 1475 1 Z
+bit 1475 C 1 *
+bit 1474 I 1 IO_PAD557
+bit 1473 O 1 IO_PAD557 1472 1 Z
+bit 1472 C 1 *
+bit 1471 I 1 IO_PAD555
+bit 1470 O 1 IO_PAD555 1469 1 Z
+bit 1469 C 1 *
+bit 1468 I 1 IO_PAD554
+bit 1467 O 1 IO_PAD554 1466 1 Z
+bit 1466 C 1 *
+bit 1465 I 1 IO_PAD553
+bit 1464 O 1 IO_PAD553 1463 1 Z
+bit 1463 C 1 *
+bit 1462 I 1 IO_PAD551
+bit 1461 O 1 IO_PAD551 1460 1 Z
+bit 1460 C 1 *
+bit 1459 I 1 IO_PAD550
+bit 1458 O 1 IO_PAD550 1457 1 Z
+bit 1457 C 1 *
+bit 1456 I 1 IO_PAD549
+bit 1455 O 1 IO_PAD549 1454 1 Z
+bit 1454 C 1 *
+bit 1453 I 1 IO_PAD547
+bit 1452 O 1 IO_PAD547 1451 1 Z
+bit 1451 C 1 *
+bit 1450 I 1 IO_PAD545
+bit 1449 O 1 IO_PAD545 1448 1 Z
+bit 1448 C 1 *
+bit 1447 I 1 IO_PAD544
+bit 1446 O 1 IO_PAD544 1445 1 Z
+bit 1445 C 1 *
+bit 1444 I 1 IO_PAD543
+bit 1443 O 1 IO_PAD543 1442 1 Z
+bit 1442 C 1 *
+bit 1441 I 1 IO_PAD542
+bit 1440 O 1 IO_PAD542 1439 1 Z
+bit 1439 C 1 *
+bit 1438 I 1 IO_PAD541
+bit 1437 O 1 IO_PAD541 1436 1 Z
+bit 1436 C 1 *
+bit 1435 I 1 IO_PAD539
+bit 1434 O 1 IO_PAD539 1433 1 Z
+bit 1433 C 1 *
+bit 1432 I 1 IO_PAD537
+bit 1431 O 1 IO_PAD537 1430 1 Z
+bit 1430 C 1 *
+bit 1429 I 1 IO_PAD535
+bit 1428 O 1 IO_PAD535 1427 1 Z
+bit 1427 C 1 *
+bit 1426 I 1 IO_PAD533
+bit 1425 O 1 IO_PAD533 1424 1 Z
+bit 1424 C 1 *
+bit 1423 I 1 IO_PAD531
+bit 1422 O 1 IO_PAD531 1421 1 Z
+bit 1421 C 1 *
+bit 1420 I 1 IO_PAD530
+bit 1419 O 1 IO_PAD530 1418 1 Z
+bit 1418 C 1 *
+bit 1417 I 1 IO_PAD529
+bit 1416 O 1 IO_PAD529 1415 1 Z
+bit 1415 C 1 *
+bit 1414 I 1 IO_PAD527
+bit 1413 O 1 IO_PAD527 1412 1 Z
+bit 1412 C 1 *
+bit 1411 I 1 IO_PAD526
+bit 1410 O 1 IO_PAD526 1409 1 Z
+bit 1409 C 1 *
+bit 1408 I 1 IO_PAD525
+bit 1407 O 1 IO_PAD525 1406 1 Z
+bit 1406 C 1 *
+bit 1405 I 1 IO_PAD523
+bit 1404 O 1 IO_PAD523 1403 1 Z
+bit 1403 C 1 *
+bit 1402 I 1 IO_PAD521
+bit 1401 O 1 IO_PAD521 1400 1 Z
+bit 1400 C 1 *
+bit 1399 I 1 IO_PAD520
+bit 1398 O 1 IO_PAD520 1397 1 Z
+bit 1397 C 1 *
+bit 1396 I 1 IO_PAD519
+bit 1395 O 1 IO_PAD519 1394 1 Z
+bit 1394 C 1 *
+bit 1393 I 1 IO_PAD518
+bit 1392 O 1 IO_PAD518 1391 1 Z
+bit 1391 C 1 *
+bit 1390 I 1 IO_PAD516
+bit 1389 O 1 IO_PAD516 1388 1 Z
+bit 1388 C 1 *
+bit 1387 I 1 IO_PAD515
+bit 1386 O 1 IO_PAD515 1385 1 Z
+bit 1385 C 1 *
+bit 1384 I 1 IO_PAD514
+bit 1383 O 1 IO_PAD514 1382 1 Z
+bit 1382 C 1 *
+bit 1381 I 1 IO_PAD513
+bit 1380 O 1 IO_PAD513 1379 1 Z
+bit 1379 C 1 *
+bit 1378 I 1 IO_PAD511
+bit 1377 O 1 IO_PAD511 1376 1 Z
+bit 1376 C 1 *
+bit 1375 I 1 IO_PAD509
+bit 1374 O 1 IO_PAD509 1373 1 Z
+bit 1373 C 1 *
+bit 1372 I 1 IO_PAD508
+bit 1371 O 1 IO_PAD508 1370 1 Z
+bit 1370 C 1 *
+bit 1369 I 1 IO_PAD507
+bit 1368 O 1 IO_PAD507 1367 1 Z
+bit 1367 C 1 *
+bit 1366 I 1 IO_PAD505
+bit 1365 O 1 IO_PAD505 1364 1 Z
+bit 1364 C 1 *
+bit 1363 I 1 IO_PAD504
+bit 1362 O 1 IO_PAD504 1361 1 Z
+bit 1361 C 1 *
+bit 1360 I 1 IO_PAD503
+bit 1359 O 1 IO_PAD503 1358 1 Z
+bit 1358 C 1 *
+bit 1357 I 1 IO_PAD501
+bit 1356 O 1 IO_PAD501 1355 1 Z
+bit 1355 C 1 *
+bit 1354 I 1 IO_PAD499
+bit 1353 O 1 IO_PAD499 1352 1 Z
+bit 1352 C 1 *
+bit 1351 I 1 IO_PAD497
+bit 1350 O 1 IO_PAD497 1349 1 Z
+bit 1349 C 1 *
+bit 1348 I 1 IO_PAD495
+bit 1347 O 1 IO_PAD495 1346 1 Z
+bit 1346 C 1 *
+bit 1345 I 1 IO_PAD493
+bit 1344 O 1 IO_PAD493 1343 1 Z
+bit 1343 C 1 *
+bit 1342 I 1 IO_PAD492
+bit 1341 O 1 IO_PAD492 1340 1 Z
+bit 1340 C 1 *
+bit 1339 I 1 IO_PAD491
+bit 1338 O 1 IO_PAD491 1337 1 Z
+bit 1337 C 1 *
+bit 1336 I 1 IO_PAD490
+bit 1335 O 1 IO_PAD490 1334 1 Z
+bit 1334 C 1 *
+bit 1333 I 1 IO_PAD489
+bit 1332 O 1 IO_PAD489 1331 1 Z
+bit 1331 C 1 *
+bit 1330 I 1 IO_PAD487
+bit 1329 O 1 IO_PAD487 1328 1 Z
+bit 1328 C 1 *
+bit 1327 I 1 IO_PAD485
+bit 1326 O 1 IO_PAD485 1325 1 Z
+bit 1325 C 1 *
+bit 1324 I 1 IO_PAD484
+bit 1323 O 1 IO_PAD484 1322 1 Z
+bit 1322 C 1 *
+bit 1321 I 1 IO_PAD483
+bit 1320 O 1 IO_PAD483 1319 1 Z
+bit 1319 C 1 *
+bit 1318 I 1 IO_PAD481
+bit 1317 O 1 IO_PAD481 1316 1 Z
+bit 1316 C 1 *
+bit 1315 I 1 IO_PAD480
+bit 1314 O 1 IO_PAD480 1313 1 Z
+bit 1313 C 1 *
+bit 1312 I 1 IO_PAD479
+bit 1311 O 1 IO_PAD479 1310 1 Z
+bit 1310 C 1 *
+bit 1309 I 1 IO_PAD477
+bit 1308 O 1 IO_PAD477 1307 1 Z
+bit 1307 C 1 *
+bit 1306 I 1 IO_PAD475
+bit 1305 O 1 IO_PAD475 1304 1 Z
+bit 1304 C 1 *
+bit 1303 I 1 IO_PAD473
+bit 1302 O 1 IO_PAD473 1301 1 Z
+bit 1301 C 1 *
+bit 1300 I 1 IO_PAD472
+bit 1299 O 1 IO_PAD472 1298 1 Z
+bit 1298 C 1 *
+bit 1297 I 1 IO_PAD471
+bit 1296 O 1 IO_PAD471 1295 1 Z
+bit 1295 C 1 *
+bit 1294 I 1 IO_PAD469
+bit 1293 O 1 IO_PAD469 1292 1 Z
+bit 1292 C 1 *
+bit 1291 I 1 IO_PAD468
+bit 1290 O 1 IO_PAD468 1289 1 Z
+bit 1289 C 1 *
+bit 1288 I 1 IO_PAD467
+bit 1287 O 1 IO_PAD467 1286 1 Z
+bit 1286 C 1 *
+bit 1285 I 1 IO_PAD465
+bit 1284 O 1 IO_PAD465 1283 1 Z
+bit 1283 C 1 *
+bit 1282 I 1 IO_PAD463
+bit 1281 O 1 IO_PAD463 1280 1 Z
+bit 1280 C 1 *
+bit 1279 I 1 IO_PAD461
+bit 1278 O 1 IO_PAD461 1277 1 Z
+bit 1277 C 1 *
+bit 1276 I 1 IO_PAD460
+bit 1275 O 1 IO_PAD460 1274 1 Z
+bit 1274 C 1 *
+bit 1273 I 1 IO_PAD459
+bit 1272 O 1 IO_PAD459 1271 1 Z
+bit 1271 C 1 *
+bit 1270 I 1 IO_PAD457
+bit 1269 O 1 IO_PAD457 1268 1 Z
+bit 1268 C 1 *
+bit 1267 I 1 IO_PAD456
+bit 1266 O 1 IO_PAD456 1265 1 Z
+bit 1265 C 1 *
+bit 1264 I 1 IO_PAD455
+bit 1263 O 1 IO_PAD455 1262 1 Z
+bit 1262 C 1 *
+bit 1261 I 1 IO_PAD453
+bit 1260 O 1 IO_PAD453 1259 1 Z
+bit 1259 C 1 *
+bit 1258 I 1 IO_PAD451
+bit 1257 O 1 IO_PAD451 1256 1 Z
+bit 1256 C 1 *
+bit 1255 I 1 IO_PAD449
+bit 1254 O 1 IO_PAD449 1253 1 Z
+bit 1253 C 1 *
+bit 1252 I 1 IO_PAD448
+bit 1251 O 1 IO_PAD448 1250 1 Z
+bit 1250 C 1 *
+bit 1249 I 1 IO_PAD447
+bit 1248 O 1 IO_PAD447 1247 1 Z
+bit 1247 C 1 *
+bit 1246 I 1 IO_PAD445
+bit 1245 O 1 IO_PAD445 1244 1 Z
+bit 1244 C 1 *
+bit 1243 I 1 IO_PAD444
+bit 1242 O 1 IO_PAD444 1241 1 Z
+bit 1241 C 1 *
+bit 1240 I 1 IO_PAD443
+bit 1239 O 1 IO_PAD443 1238 1 Z
+bit 1238 C 1 *
+bit 1237 I 1 IO_PAD441
+bit 1236 O 1 IO_PAD441 1235 1 Z
+bit 1235 C 1 *
+bit 1234 I 1 IO_PAD439
+bit 1233 O 1 IO_PAD439 1232 1 Z
+bit 1232 C 1 *
+bit 1231 I 1 IO_PAD438
+bit 1230 O 1 IO_PAD438 1229 1 Z
+bit 1229 C 1 *
+bit 1228 I 1 IO_PAD437
+bit 1227 O 1 IO_PAD437 1226 1 Z
+bit 1226 C 1 *
+bit 1225 I 1 IO_PAD435
+bit 1224 O 1 IO_PAD435 1223 1 Z
+bit 1223 C 1 *
+bit 1222 I 1 IO_PAD433
+bit 1221 O 1 IO_PAD433 1220 1 Z
+bit 1220 C 1 *
+bit 1219 I 1 IO_PAD431
+bit 1218 O 1 IO_PAD431 1217 1 Z
+bit 1217 C 1 *
+bit 1216 I 1 IO_PAD429
+bit 1215 O 1 IO_PAD429 1214 1 Z
+bit 1214 C 1 *
+bit 1213 I 1 IO_PAD427
+bit 1212 O 1 IO_PAD427 1211 1 Z
+bit 1211 C 1 *
+bit 1210 I 1 IO_PAD426
+bit 1209 O 1 IO_PAD426 1208 1 Z
+bit 1208 C 1 *
+bit 1207 I 1 IO_PAD425
+bit 1206 O 1 IO_PAD425 1205 1 Z
+bit 1205 C 1 *
+bit 1204 I 1 IO_PAD423
+bit 1203 O 1 IO_PAD423 1202 1 Z
+bit 1202 C 1 *
+bit 1201 I 1 IO_PAD421
+bit 1200 O 1 IO_PAD421 1199 1 Z
+bit 1199 C 1 *
+bit 1198 I 1 IO_PAD420
+bit 1197 O 1 IO_PAD420 1196 1 Z
+bit 1196 C 1 *
+bit 1195 I 1 IO_PAD419
+bit 1194 O 1 IO_PAD419 1193 1 Z
+bit 1193 C 1 *
+bit 1192 I 1 IO_PAD417
+bit 1191 O 1 IO_PAD417 1190 1 Z
+bit 1190 C 1 *
+bit 1189 I 1 IO_PAD416
+bit 1188 O 1 IO_PAD416 1187 1 Z
+bit 1187 C 1 *
+bit 1186 I 1 IO_PAD415
+bit 1185 O 1 IO_PAD415 1184 1 Z
+bit 1184 C 1 *
+bit 1183 I 1 IO_PAD414
+bit 1182 O 1 IO_PAD414 1181 1 Z
+bit 1181 C 1 *
+bit 1180 I 1 IO_PAD413
+bit 1179 O 1 IO_PAD413 1178 1 Z
+bit 1178 C 1 *
+bit 1177 I 1 IO_PAD411
+bit 1176 O 1 IO_PAD411 1175 1 Z
+bit 1175 C 1 *
+bit 1174 I 1 IO_PAD409
+bit 1173 O 1 IO_PAD409 1172 1 Z
+bit 1172 C 1 *
+bit 1171 I 1 IO_PAD407
+bit 1170 O 1 IO_PAD407 1169 1 Z
+bit 1169 C 1 *
+bit 1168 I 1 IO_PAD406
+bit 1167 O 1 IO_PAD406 1166 1 Z
+bit 1166 C 1 *
+bit 1165 I 1 IO_PAD405
+bit 1164 O 1 IO_PAD405 1163 1 Z
+bit 1163 C 1 *
+bit 1162 I 1 IO_PAD403
+bit 1161 O 1 IO_PAD403 1160 1 Z
+bit 1160 C 1 *
+bit 1159 I 1 IO_PAD401
+bit 1158 O 1 IO_PAD401 1157 1 Z
+bit 1157 C 1 *
+bit 1156 I 1 IO_PAD400
+bit 1155 O 1 IO_PAD400 1154 1 Z
+bit 1154 C 1 *
+bit 1153 I 1 IO_PAD399
+bit 1152 O 1 IO_PAD399 1151 1 Z
+bit 1151 C 1 *
+bit 1150 I 1 IO_PAD398
+bit 1149 O 1 IO_PAD398 1148 1 Z
+bit 1148 C 1 *
+bit 1147 I 1 IO_PAD397
+bit 1146 O 1 IO_PAD397 1145 1 Z
+bit 1145 C 1 *
+bit 1144 I 1 IO_PAD395
+bit 1143 O 1 IO_PAD395 1142 1 Z
+bit 1142 C 1 *
+bit 1141 I 1 IO_PAD393
+bit 1140 O 1 IO_PAD393 1139 1 Z
+bit 1139 C 1 *
+bit 1138 I 1 IO_PAD391
+bit 1137 O 1 IO_PAD391 1136 1 Z
+bit 1136 C 1 *
+bit 1135 I 1 IO_PAD390
+bit 1134 O 1 IO_PAD390 1133 1 Z
+bit 1133 C 1 *
+bit 1132 I 1 IO_PAD389
+bit 1131 O 1 IO_PAD389 1130 1 Z
+bit 1130 C 1 *
+bit 1129 I 1 IO_PAD387
+bit 1128 O 1 IO_PAD387 1127 1 Z
+bit 1127 C 1 *
+bit 1126 I 1 IO_PAD385
+bit 1125 O 1 IO_PAD385 1124 1 Z
+bit 1124 C 1 *
+bit 1123 I 1 IO_PAD384
+bit 1122 O 1 IO_PAD384 1121 1 Z
+bit 1121 C 1 *
+bit 1120 I 1 M2_PAD383
+bit 1119 I 1 M0_PAD382
+bit 1118 I 1 M1_PAD381
+bit 1117 I 1 IO_PAD377
+bit 1116 O 1 IO_PAD377 1115 1 Z
+bit 1115 C 1 *
+bit 1114 I 1 IO_PAD376
+bit 1113 O 1 IO_PAD376 1112 1 Z
+bit 1112 C 1 *
+bit 1111 I 1 IO_PAD375
+bit 1110 O 1 IO_PAD375 1109 1 Z
+bit 1109 C 1 *
+bit 1108 I 1 IO_PAD373
+bit 1107 O 1 IO_PAD373 1106 1 Z
+bit 1106 C 1 *
+bit 1105 I 1 IO_PAD372
+bit 1104 O 1 IO_PAD372 1103 1 Z
+bit 1103 C 1 *
+bit 1102 I 1 IO_PAD371
+bit 1101 O 1 IO_PAD371 1100 1 Z
+bit 1100 C 1 *
+bit 1099 I 1 IO_PAD369
+bit 1098 O 1 IO_PAD369 1097 1 Z
+bit 1097 C 1 *
+bit 1096 I 1 IO_PAD368
+bit 1095 O 1 IO_PAD368 1094 1 Z
+bit 1094 C 1 *
+bit 1093 I 1 IO_PAD367
+bit 1092 O 1 IO_PAD367 1091 1 Z
+bit 1091 C 1 *
+bit 1090 I 1 IO_PAD365
+bit 1089 O 1 IO_PAD365 1088 1 Z
+bit 1088 C 1 *
+bit 1087 I 1 IO_PAD364
+bit 1086 O 1 IO_PAD364 1085 1 Z
+bit 1085 C 1 *
+bit 1084 I 1 IO_PAD363
+bit 1083 O 1 IO_PAD363 1082 1 Z
+bit 1082 C 1 *
+bit 1081 I 1 IO_PAD361
+bit 1080 O 1 IO_PAD361 1079 1 Z
+bit 1079 C 1 *
+bit 1078 O 1 *
+bit 1077 O 1 *
+bit 1076 O 1 *
+bit 1075 O 1 *
+bit 1074 O 1 *
+bit 1073 O 1 *
+bit 1072 I 1 IO_PAD359
+bit 1071 O 1 IO_PAD359 1070 1 Z
+bit 1070 C 1 *
+bit 1069 I 1 IO_PAD357
+bit 1068 O 1 IO_PAD357 1067 1 Z
+bit 1067 C 1 *
+bit 1066 I 1 IO_PAD355
+bit 1065 O 1 IO_PAD355 1064 1 Z
+bit 1064 C 1 *
+bit 1063 I 1 IO_PAD354
+bit 1062 O 1 IO_PAD354 1061 1 Z
+bit 1061 C 1 *
+bit 1060 I 1 IO_PAD353
+bit 1059 O 1 IO_PAD353 1058 1 Z
+bit 1058 C 1 *
+bit 1057 I 1 IO_PAD352
+bit 1056 O 1 IO_PAD352 1055 1 Z
+bit 1055 C 1 *
+bit 1054 I 1 IO_PAD351
+bit 1053 O 1 IO_PAD351 1052 1 Z
+bit 1052 C 1 *
+bit 1051 I 1 IO_PAD349
+bit 1050 O 1 IO_PAD349 1049 1 Z
+bit 1049 C 1 *
+bit 1048 I 1 IO_PAD347
+bit 1047 O 1 IO_PAD347 1046 1 Z
+bit 1046 C 1 *
+bit 1045 I 1 IO_PAD346
+bit 1044 O 1 IO_PAD346 1043 1 Z
+bit 1043 C 1 *
+bit 1042 I 1 IO_PAD345
+bit 1041 O 1 IO_PAD345 1040 1 Z
+bit 1040 C 1 *
+bit 1039 I 1 IO_PAD344
+bit 1038 O 1 IO_PAD344 1037 1 Z
+bit 1037 C 1 *
+bit 1036 I 1 IO_PAD343
+bit 1035 O 1 IO_PAD343 1034 1 Z
+bit 1034 C 1 *
+bit 1033 I 1 IO_PAD342
+bit 1032 O 1 IO_PAD342 1031 1 Z
+bit 1031 C 1 *
+bit 1030 I 1 IO_PAD341
+bit 1029 O 1 IO_PAD341 1028 1 Z
+bit 1028 C 1 *
+bit 1027 I 1 IO_PAD339
+bit 1026 O 1 IO_PAD339 1025 1 Z
+bit 1025 C 1 *
+bit 1024 I 1 IO_PAD337
+bit 1023 O 1 IO_PAD337 1022 1 Z
+bit 1022 C 1 *
+bit 1021 I 1 IO_PAD336
+bit 1020 O 1 IO_PAD336 1019 1 Z
+bit 1019 C 1 *
+bit 1018 I 1 IO_PAD335
+bit 1017 O 1 IO_PAD335 1016 1 Z
+bit 1016 C 1 *
+bit 1015 I 1 IO_PAD334
+bit 1014 O 1 IO_PAD334 1013 1 Z
+bit 1013 C 1 *
+bit 1012 I 1 IO_PAD333
+bit 1011 O 1 IO_PAD333 1010 1 Z
+bit 1010 C 1 *
+bit 1009 I 1 IO_PAD331
+bit 1008 O 1 IO_PAD331 1007 1 Z
+bit 1007 C 1 *
+bit 1006 I 1 IO_PAD330
+bit 1005 O 1 IO_PAD330 1004 1 Z
+bit 1004 C 1 *
+bit 1003 O 1 *
+bit 1002 O 1 *
+bit 1001 O 1 *
+bit 1000 O 1 *
+bit 999 O 1 *
+bit 998 O 1 *
+bit 997 I 1 IO_PAD329
+bit 996 O 1 IO_PAD329 995 1 Z
+bit 995 C 1 *
+bit 994 I 1 IO_PAD327
+bit 993 O 1 IO_PAD327 992 1 Z
+bit 992 C 1 *
+bit 991 I 1 IO_PAD326
+bit 990 O 1 IO_PAD326 989 1 Z
+bit 989 C 1 *
+bit 988 I 1 IO_PAD325
+bit 987 O 1 IO_PAD325 986 1 Z
+bit 986 C 1 *
+bit 985 I 1 IO_PAD323
+bit 984 O 1 IO_PAD323 983 1 Z
+bit 983 C 1 *
+bit 982 I 1 IO_PAD322
+bit 981 O 1 IO_PAD322 980 1 Z
+bit 980 C 1 *
+bit 979 I 1 IO_PAD321
+bit 978 O 1 IO_PAD321 977 1 Z
+bit 977 C 1 *
+bit 976 I 1 IO_PAD320
+bit 975 O 1 IO_PAD320 974 1 Z
+bit 974 C 1 *
+bit 973 I 1 IO_PAD319
+bit 972 O 1 IO_PAD319 971 1 Z
+bit 971 C 1 *
+bit 970 I 1 IO_PAD317
+bit 969 O 1 IO_PAD317 968 1 Z
+bit 968 C 1 *
+bit 967 I 1 IO_PAD315
+bit 966 O 1 IO_PAD315 965 1 Z
+bit 965 C 1 *
+bit 964 I 1 IO_PAD314
+bit 963 O 1 IO_PAD314 962 1 Z
+bit 962 C 1 *
+bit 961 I 1 IO_PAD313
+bit 960 O 1 IO_PAD313 959 1 Z
+bit 959 C 1 *
+bit 958 I 1 IO_PAD312
+bit 957 O 1 IO_PAD312 956 1 Z
+bit 956 C 1 *
+bit 955 I 1 IO_PAD311
+bit 954 O 1 IO_PAD311 953 1 Z
+bit 953 C 1 *
+bit 952 I 1 IO_PAD310
+bit 951 O 1 IO_PAD310 950 1 Z
+bit 950 C 1 *
+bit 949 I 1 IO_PAD309
+bit 948 O 1 IO_PAD309 947 1 Z
+bit 947 C 1 *
+bit 946 I 1 IO_PAD308
+bit 945 O 1 IO_PAD308 944 1 Z
+bit 944 C 1 *
+bit 943 I 1 IO_PAD307
+bit 942 O 1 IO_PAD307 941 1 Z
+bit 941 C 1 *
+bit 940 I 1 IO_PAD305
+bit 939 O 1 IO_PAD305 938 1 Z
+bit 938 C 1 *
+bit 937 O 1 *
+bit 936 O 1 *
+bit 935 O 1 *
+bit 934 O 1 *
+bit 933 O 1 *
+bit 932 O 1 *
+bit 931 I 1 IO_PAD303
+bit 930 O 1 IO_PAD303 929 1 Z
+bit 929 C 1 *
+bit 928 I 1 IO_PAD301
+bit 927 O 1 IO_PAD301 926 1 Z
+bit 926 C 1 *
+bit 925 I 1 IO_PAD300
+bit 924 O 1 IO_PAD300 923 1 Z
+bit 923 C 1 *
+bit 922 I 1 IO_PAD299
+bit 921 O 1 IO_PAD299 920 1 Z
+bit 920 C 1 *
+bit 919 I 1 IO_PAD298
+bit 918 O 1 IO_PAD298 917 1 Z
+bit 917 C 1 *
+bit 916 I 1 IO_PAD297
+bit 915 O 1 IO_PAD297 914 1 Z
+bit 914 C 1 *
+bit 913 I 1 IO_PAD295
+bit 912 O 1 IO_PAD295 911 1 Z
+bit 911 C 1 *
+bit 910 I 1 IO_PAD293
+bit 909 O 1 IO_PAD293 908 1 Z
+bit 908 C 1 *
+bit 907 I 1 IO_PAD292
+bit 906 O 1 IO_PAD292 905 1 Z
+bit 905 C 1 *
+bit 904 I 1 IO_PAD291
+bit 903 O 1 IO_PAD291 902 1 Z
+bit 902 C 1 *
+bit 901 I 1 IO_PAD290
+bit 900 O 1 IO_PAD290 899 1 Z
+bit 899 C 1 *
+bit 898 I 1 IO_PAD289
+bit 897 O 1 IO_PAD289 896 1 Z
+bit 896 C 1 *
+bit 895 I 1 IO_PAD287
+bit 894 O 1 IO_PAD287 893 1 Z
+bit 893 C 1 *
+bit 892 I 1 IO_PAD285
+bit 891 O 1 IO_PAD285 890 1 Z
+bit 890 C 1 *
+bit 889 I 1 IO_PAD284
+bit 888 O 1 IO_PAD284 887 1 Z
+bit 887 C 1 *
+bit 886 I 1 IO_PAD283
+bit 885 O 1 IO_PAD283 884 1 Z
+bit 884 C 1 *
+bit 883 I 1 IO_PAD282
+bit 882 O 1 IO_PAD282 881 1 Z
+bit 881 C 1 *
+bit 880 I 1 IO_PAD281
+bit 879 O 1 IO_PAD281 878 1 Z
+bit 878 C 1 *
+bit 877 I 1 IO_PAD279
+bit 876 O 1 IO_PAD279 875 1 Z
+bit 875 C 1 *
+bit 874 I 1 IO_PAD278
+bit 873 O 1 IO_PAD278 872 1 Z
+bit 872 C 1 *
+bit 871 I 1 IO_PAD277
+bit 870 O 1 IO_PAD277 869 1 Z
+bit 869 C 1 *
+bit 868 I 1 IO_PAD275
+bit 867 O 1 IO_PAD275 866 1 Z
+bit 866 C 1 *
+bit 865 I 1 IO_PAD273
+bit 864 O 1 IO_PAD273 863 1 Z
+bit 863 C 1 *
+bit 862 O 1 *
+bit 861 O 1 *
+bit 860 O 1 *
+bit 859 O 1 *
+bit 858 O 1 *
+bit 857 O 1 *
+bit 856 I 1 IO_PAD271
+bit 855 O 1 IO_PAD271 854 1 Z
+bit 854 C 1 *
+bit 853 I 1 IO_PAD269
+bit 852 O 1 IO_PAD269 851 1 Z
+bit 851 C 1 *
+bit 850 I 1 IO_PAD268
+bit 849 O 1 IO_PAD268 848 1 Z
+bit 848 C 1 *
+bit 847 I 1 IO_PAD267
+bit 846 O 1 IO_PAD267 845 1 Z
+bit 845 C 1 *
+bit 844 I 1 IO_PAD266
+bit 843 O 1 IO_PAD266 842 1 Z
+bit 842 C 1 *
+bit 841 I 1 IO_PAD265
+bit 840 O 1 IO_PAD265 839 1 Z
+bit 839 C 1 *
+bit 838 I 1 IO_PAD263
+bit 837 O 1 IO_PAD263 836 1 Z
+bit 836 C 1 *
+bit 835 I 1 IO_PAD261
+bit 834 O 1 IO_PAD261 833 1 Z
+bit 833 C 1 *
+bit 832 I 1 IO_PAD260
+bit 831 O 1 IO_PAD260 830 1 Z
+bit 830 C 1 *
+bit 829 I 1 IO_PAD258
+bit 828 O 1 IO_PAD258 827 1 Z
+bit 827 C 1 *
+bit 826 I 1 IO_PAD257
+bit 825 O 1 IO_PAD257 824 1 Z
+bit 824 C 1 *
+bit 823 I 1 IO_PAD255
+bit 822 O 1 IO_PAD255 821 1 Z
+bit 821 C 1 *
+bit 820 I 1 IO_PAD253
+bit 819 O 1 IO_PAD253 818 1 Z
+bit 818 C 1 *
+bit 817 I 1 IO_PAD252
+bit 816 O 1 IO_PAD252 815 1 Z
+bit 815 C 1 *
+bit 814 I 1 IO_PAD251
+bit 813 O 1 IO_PAD251 812 1 Z
+bit 812 C 1 *
+bit 811 I 1 IO_PAD250
+bit 810 O 1 IO_PAD250 809 1 Z
+bit 809 C 1 *
+bit 808 I 1 IO_PAD249
+bit 807 O 1 IO_PAD249 806 1 Z
+bit 806 C 1 *
+bit 805 I 1 IO_PAD247
+bit 804 O 1 IO_PAD247 803 1 Z
+bit 803 C 1 *
+bit 802 O 1 *
+bit 801 O 1 *
+bit 800 O 1 *
+bit 799 O 1 *
+bit 798 O 1 *
+bit 797 O 1 *
+bit 796 I 1 IO_PAD245
+bit 795 O 1 IO_PAD245 794 1 Z
+bit 794 C 1 *
+bit 793 I 1 IO_PAD243
+bit 792 O 1 IO_PAD243 791 1 Z
+bit 791 C 1 *
+bit 790 I 1 IO_PAD241
+bit 789 O 1 IO_PAD241 788 1 Z
+bit 788 C 1 *
+bit 787 I 1 IO_PAD240
+bit 786 O 1 IO_PAD240 785 1 Z
+bit 785 C 1 *
+bit 784 I 1 IO_PAD239
+bit 783 O 1 IO_PAD239 782 1 Z
+bit 782 C 1 *
+bit 781 I 1 IO_PAD237
+bit 780 O 1 IO_PAD237 779 1 Z
+bit 779 C 1 *
+bit 778 I 1 IO_PAD236
+bit 777 O 1 IO_PAD236 776 1 Z
+bit 776 C 1 *
+bit 775 I 1 IO_PAD235
+bit 774 O 1 IO_PAD235 773 1 Z
+bit 773 C 1 *
+bit 772 I 1 IO_PAD234
+bit 771 O 1 IO_PAD234 770 1 Z
+bit 770 C 1 *
+bit 769 I 1 IO_PAD233
+bit 768 O 1 IO_PAD233 767 1 Z
+bit 767 C 1 *
+bit 766 I 1 IO_PAD231
+bit 765 O 1 IO_PAD231 764 1 Z
+bit 764 C 1 *
+bit 763 I 1 IO_PAD229
+bit 762 O 1 IO_PAD229 761 1 Z
+bit 761 C 1 *
+bit 760 I 1 IO_PAD228
+bit 759 O 1 IO_PAD228 758 1 Z
+bit 758 C 1 *
+bit 757 I 1 IO_PAD227
+bit 756 O 1 IO_PAD227 755 1 Z
+bit 755 C 1 *
+bit 754 I 1 IO_PAD226
+bit 753 O 1 IO_PAD226 752 1 Z
+bit 752 C 1 *
+bit 751 I 1 IO_PAD225
+bit 750 O 1 IO_PAD225 749 1 Z
+bit 749 C 1 *
+bit 748 I 1 IO_PAD223
+bit 747 O 1 IO_PAD223 746 1 Z
+bit 746 C 1 *
+bit 745 I 1 IO_PAD221
+bit 744 O 1 IO_PAD221 743 1 Z
+bit 743 C 1 *
+bit 742 I 1 IO_PAD220
+bit 741 O 1 IO_PAD220 740 1 Z
+bit 740 C 1 *
+bit 739 I 1 IO_PAD219
+bit 738 O 1 IO_PAD219 737 1 Z
+bit 737 C 1 *
+bit 736 I 1 IO_PAD218
+bit 735 O 1 IO_PAD218 734 1 Z
+bit 734 C 1 *
+bit 733 I 1 IO_PAD217
+bit 732 O 1 IO_PAD217 731 1 Z
+bit 731 C 1 *
+bit 730 I 1 IO_PAD215
+bit 729 O 1 IO_PAD215 728 1 Z
+bit 728 C 1 *
+bit 727 O 1 *
+bit 726 O 1 *
+bit 725 O 1 *
+bit 724 O 1 *
+bit 723 O 1 *
+bit 722 O 1 *
+bit 721 I 1 IO_PAD213
+bit 720 O 1 IO_PAD213 719 1 Z
+bit 719 C 1 *
+bit 718 I 1 IO_PAD211
+bit 717 O 1 IO_PAD211 716 1 Z
+bit 716 C 1 *
+bit 715 I 1 IO_PAD210
+bit 714 O 1 IO_PAD210 713 1 Z
+bit 713 C 1 *
+bit 712 I 1 IO_PAD209
+bit 711 O 1 IO_PAD209 710 1 Z
+bit 710 C 1 *
+bit 709 I 1 IO_PAD208
+bit 708 O 1 IO_PAD208 707 1 Z
+bit 707 C 1 *
+bit 706 I 1 IO_PAD207
+bit 705 O 1 IO_PAD207 704 1 Z
+bit 704 C 1 *
+bit 703 I 1 IO_PAD206
+bit 702 O 1 IO_PAD206 701 1 Z
+bit 701 C 1 *
+bit 700 I 1 IO_PAD205
+bit 699 O 1 IO_PAD205 698 1 Z
+bit 698 C 1 *
+bit 697 I 1 IO_PAD204
+bit 696 O 1 IO_PAD204 695 1 Z
+bit 695 C 1 *
+bit 694 I 1 IO_PAD203
+bit 693 O 1 IO_PAD203 692 1 Z
+bit 692 C 1 *
+bit 691 I 1 IO_PAD201
+bit 690 O 1 IO_PAD201 689 1 Z
+bit 689 C 1 *
+bit 688 I 1 IO_PAD199
+bit 687 O 1 IO_PAD199 686 1 Z
+bit 686 C 1 *
+bit 685 I 1 IO_PAD198
+bit 684 O 1 IO_PAD198 683 1 Z
+bit 683 C 1 *
+bit 682 I 1 IO_PAD197
+bit 681 O 1 IO_PAD197 680 1 Z
+bit 680 C 1 *
+bit 679 I 1 IO_PAD196
+bit 678 O 1 IO_PAD196 677 1 Z
+bit 677 C 1 *
+bit 676 I 1 IO_PAD195
+bit 675 O 1 IO_PAD195 674 1 Z
+bit 674 C 1 *
+bit 673 I 1 IO_PAD193
+bit 672 O 1 IO_PAD193 671 1 Z
+bit 671 C 1 *
+bit 670 I 1 IO_PAD192
+bit 669 O 1 IO_PAD192 668 1 Z
+bit 668 C 1 *
+bit 667 I 1 IO_PAD191
+bit 666 O 1 IO_PAD191 665 1 Z
+bit 665 C 1 *
+bit 664 I 1 IO_PAD189
+bit 663 O 1 IO_PAD189 662 1 Z
+bit 662 C 1 *
+bit 661 O 1 *
+bit 660 O 1 *
+bit 659 O 1 *
+bit 658 O 1 *
+bit 657 O 1 *
+bit 656 O 1 *
+bit 655 I 1 IO_PAD188
+bit 654 O 1 IO_PAD188 653 1 Z
+bit 653 C 1 *
+bit 652 I 1 IO_PAD187
+bit 651 O 1 IO_PAD187 650 1 Z
+bit 650 C 1 *
+bit 649 I 1 IO_PAD185
+bit 648 O 1 IO_PAD185 647 1 Z
+bit 647 C 1 *
+bit 646 I 1 IO_PAD184
+bit 645 O 1 IO_PAD184 644 1 Z
+bit 644 C 1 *
+bit 643 I 1 IO_PAD183
+bit 642 O 1 IO_PAD183 641 1 Z
+bit 641 C 1 *
+bit 640 I 1 IO_PAD182
+bit 639 O 1 IO_PAD182 638 1 Z
+bit 638 C 1 *
+bit 637 I 1 IO_PAD181
+bit 636 O 1 IO_PAD181 635 1 Z
+bit 635 C 1 *
+bit 634 I 1 IO_PAD179
+bit 633 O 1 IO_PAD179 632 1 Z
+bit 632 C 1 *
+bit 631 I 1 IO_PAD177
+bit 630 O 1 IO_PAD177 629 1 Z
+bit 629 C 1 *
+bit 628 I 1 IO_PAD176
+bit 627 O 1 IO_PAD176 626 1 Z
+bit 626 C 1 *
+bit 625 I 1 IO_PAD175
+bit 624 O 1 IO_PAD175 623 1 Z
+bit 623 C 1 *
+bit 622 I 1 IO_PAD174
+bit 621 O 1 IO_PAD174 620 1 Z
+bit 620 C 1 *
+bit 619 I 1 IO_PAD173
+bit 618 O 1 IO_PAD173 617 1 Z
+bit 617 C 1 *
+bit 616 I 1 IO_PAD172
+bit 615 O 1 IO_PAD172 614 1 Z
+bit 614 C 1 *
+bit 613 I 1 IO_PAD171
+bit 612 O 1 IO_PAD171 611 1 Z
+bit 611 C 1 *
+bit 610 I 1 IO_PAD169
+bit 609 O 1 IO_PAD169 608 1 Z
+bit 608 C 1 *
+bit 607 I 1 IO_PAD167
+bit 606 O 1 IO_PAD167 605 1 Z
+bit 605 C 1 *
+bit 604 I 1 IO_PAD166
+bit 603 O 1 IO_PAD166 602 1 Z
+bit 602 C 1 *
+bit 601 I 1 IO_PAD165
+bit 600 O 1 IO_PAD165 599 1 Z
+bit 599 C 1 *
+bit 598 I 1 IO_PAD164
+bit 597 O 1 IO_PAD164 596 1 Z
+bit 596 C 1 *
+bit 595 I 1 IO_PAD163
+bit 594 O 1 IO_PAD163 593 1 Z
+bit 593 C 1 *
+bit 592 I 1 IO_PAD161
+bit 591 O 1 IO_PAD161 590 1 Z
+bit 590 C 1 *
+bit 589 I 1 IO_PAD159
+bit 588 O 1 IO_PAD159 587 1 Z
+bit 587 C 1 *
+bit 586 O 1 *
+bit 585 O 1 *
+bit 584 O 1 *
+bit 583 O 1 *
+bit 582 O 1 *
+bit 581 O 1 *
+bit 580 I 1 IO_PAD157
+bit 579 O 1 IO_PAD157 578 1 Z
+bit 578 C 1 *
+bit 577 I 1 IO_PAD155
+bit 576 O 1 IO_PAD155 575 1 Z
+bit 575 C 1 *
+bit 574 I 1 IO_PAD154
+bit 573 O 1 IO_PAD154 572 1 Z
+bit 572 C 1 *
+bit 571 I 1 IO_PAD153
+bit 570 O 1 IO_PAD153 569 1 Z
+bit 569 C 1 *
+bit 568 I 1 IO_PAD151
+bit 567 O 1 IO_PAD151 566 1 Z
+bit 566 C 1 *
+bit 565 I 1 IO_PAD150
+bit 564 O 1 IO_PAD150 563 1 Z
+bit 563 C 1 *
+bit 562 I 1 IO_PAD149
+bit 561 O 1 IO_PAD149 560 1 Z
+bit 560 C 1 *
+bit 559 I 1 IO_PAD147
+bit 558 O 1 IO_PAD147 557 1 Z
+bit 557 C 1 *
+bit 556 I 1 IO_PAD146
+bit 555 O 1 IO_PAD146 554 1 Z
+bit 554 C 1 *
+bit 553 I 1 IO_PAD145
+bit 552 O 1 IO_PAD145 551 1 Z
+bit 551 C 1 *
+bit 550 I 1 IO_PAD143
+bit 549 O 1 IO_PAD143 548 1 Z
+bit 548 C 1 *
+bit 547 I 1 IO_PAD142
+bit 546 O 1 IO_PAD142 545 1 Z
+bit 545 C 1 *
+bit 544 I 1 IO_PAD141
+bit 543 O 1 IO_PAD141 542 1 Z
+bit 542 C 1 *
+bit 541 O 1 *
+bit 540 I 1 HSWAP_EN_PAD137
+bit 539 I 1 IO_PAD136
+bit 538 O 1 IO_PAD136 537 1 Z
+bit 537 C 1 *
+bit 536 I 1 IO_PAD135
+bit 535 O 1 IO_PAD135 534 1 Z
+bit 534 C 1 *
+bit 533 I 1 IO_PAD133
+bit 532 O 1 IO_PAD133 531 1 Z
+bit 531 C 1 *
+bit 530 I 1 IO_PAD131
+bit 529 O 1 IO_PAD131 528 1 Z
+bit 528 C 1 *
+bit 527 I 1 IO_PAD130
+bit 526 O 1 IO_PAD130 525 1 Z
+bit 525 C 1 *
+bit 524 I 1 IO_PAD129
+bit 523 O 1 IO_PAD129 522 1 Z
+bit 522 C 1 *
+bit 521 I 1 IO_PAD127
+bit 520 O 1 IO_PAD127 519 1 Z
+bit 519 C 1 *
+bit 518 I 1 IO_PAD125
+bit 517 O 1 IO_PAD125 516 1 Z
+bit 516 C 1 *
+bit 515 I 1 IO_PAD123
+bit 514 O 1 IO_PAD123 513 1 Z
+bit 513 C 1 *
+bit 512 I 1 IO_PAD122
+bit 511 O 1 IO_PAD122 510 1 Z
+bit 510 C 1 *
+bit 509 I 1 IO_PAD121
+bit 508 O 1 IO_PAD121 507 1 Z
+bit 507 C 1 *
+bit 506 I 1 IO_PAD120
+bit 505 O 1 IO_PAD120 504 1 Z
+bit 504 C 1 *
+bit 503 I 1 IO_PAD119
+bit 502 O 1 IO_PAD119 501 1 Z
+bit 501 C 1 *
+bit 500 I 1 IO_PAD117
+bit 499 O 1 IO_PAD117 498 1 Z
+bit 498 C 1 *
+bit 497 I 1 IO_PAD115
+bit 496 O 1 IO_PAD115 495 1 Z
+bit 495 C 1 *
+bit 494 I 1 IO_PAD113
+bit 493 O 1 IO_PAD113 492 1 Z
+bit 492 C 1 *
+bit 491 I 1 IO_PAD111
+bit 490 O 1 IO_PAD111 489 1 Z
+bit 489 C 1 *
+bit 488 I 1 IO_PAD109
+bit 487 O 1 IO_PAD109 486 1 Z
+bit 486 C 1 *
+bit 485 I 1 IO_PAD107
+bit 484 O 1 IO_PAD107 483 1 Z
+bit 483 C 1 *
+bit 482 I 1 IO_PAD105
+bit 481 O 1 IO_PAD105 480 1 Z
+bit 480 C 1 *
+bit 479 I 1 IO_PAD104
+bit 478 O 1 IO_PAD104 477 1 Z
+bit 477 C 1 *
+bit 476 I 1 IO_PAD103
+bit 475 O 1 IO_PAD103 474 1 Z
+bit 474 C 1 *
+bit 473 I 1 IO_PAD102
+bit 472 O 1 IO_PAD102 471 1 Z
+bit 471 C 1 *
+bit 470 I 1 IO_PAD101
+bit 469 O 1 IO_PAD101 468 1 Z
+bit 468 C 1 *
+bit 467 I 1 IO_PAD99
+bit 466 O 1 IO_PAD99 465 1 Z
+bit 465 C 1 *
+bit 464 I 1 IO_PAD98
+bit 463 O 1 IO_PAD98 462 1 Z
+bit 462 C 1 *
+bit 461 I 1 IO_PAD97
+bit 460 O 1 IO_PAD97 459 1 Z
+bit 459 C 1 *
+bit 458 I 1 IO_PAD95
+bit 457 O 1 IO_PAD95 456 1 Z
+bit 456 C 1 *
+bit 455 I 1 IO_PAD93
+bit 454 O 1 IO_PAD93 453 1 Z
+bit 453 C 1 *
+bit 452 I 1 IO_PAD92
+bit 451 O 1 IO_PAD92 450 1 Z
+bit 450 C 1 *
+bit 449 I 1 IO_PAD91
+bit 448 O 1 IO_PAD91 447 1 Z
+bit 447 C 1 *
+bit 446 I 1 IO_PAD89
+bit 445 O 1 IO_PAD89 444 1 Z
+bit 444 C 1 *
+bit 443 I 1 IO_PAD87
+bit 442 O 1 IO_PAD87 441 1 Z
+bit 441 C 1 *
+bit 440 I 1 IO_PAD85
+bit 439 O 1 IO_PAD85 438 1 Z
+bit 438 C 1 *
+bit 437 I 1 IO_PAD83
+bit 436 O 1 IO_PAD83 435 1 Z
+bit 435 C 1 *
+bit 434 I 1 IO_PAD81
+bit 433 O 1 IO_PAD81 432 1 Z
+bit 432 C 1 *
+bit 431 I 1 IO_PAD80
+bit 430 O 1 IO_PAD80 429 1 Z
+bit 429 C 1 *
+bit 428 I 1 IO_PAD79
+bit 427 O 1 IO_PAD79 426 1 Z
+bit 426 C 1 *
+bit 425 I 1 IO_PAD77
+bit 424 O 1 IO_PAD77 423 1 Z
+bit 423 C 1 *
+bit 422 I 1 IO_PAD75
+bit 421 O 1 IO_PAD75 420 1 Z
+bit 420 C 1 *
+bit 419 I 1 IO_PAD74
+bit 418 O 1 IO_PAD74 417 1 Z
+bit 417 C 1 *
+bit 416 I 1 IO_PAD73
+bit 415 O 1 IO_PAD73 414 1 Z
+bit 414 C 1 *
+bit 413 I 1 IO_PAD71
+bit 412 O 1 IO_PAD71 411 1 Z
+bit 411 C 1 *
+bit 410 I 1 IO_PAD70
+bit 409 O 1 IO_PAD70 408 1 Z
+bit 408 C 1 *
+bit 407 I 1 IO_PAD69
+bit 406 O 1 IO_PAD69 405 1 Z
+bit 405 C 1 *
+bit 404 I 1 IO_PAD67
+bit 403 O 1 IO_PAD67 402 1 Z
+bit 402 C 1 *
+bit 401 I 1 IO_PAD65
+bit 400 O 1 IO_PAD65 399 1 Z
+bit 399 C 1 *
+bit 398 I 1 IO_PAD63
+bit 397 O 1 IO_PAD63 396 1 Z
+bit 396 C 1 *
+bit 395 I 1 IO_PAD62
+bit 394 O 1 IO_PAD62 393 1 Z
+bit 393 C 1 *
+bit 392 I 1 IO_PAD61
+bit 391 O 1 IO_PAD61 390 1 Z
+bit 390 C 1 *
+bit 389 I 1 IO_PAD59
+bit 388 O 1 IO_PAD59 387 1 Z
+bit 387 C 1 *
+bit 386 I 1 IO_PAD58
+bit 385 O 1 IO_PAD58 384 1 Z
+bit 384 C 1 *
+bit 383 I 1 IO_PAD57
+bit 382 O 1 IO_PAD57 381 1 Z
+bit 381 C 1 *
+bit 380 I 1 IO_PAD55
+bit 379 O 1 IO_PAD55 378 1 Z
+bit 378 C 1 *
+bit 377 I 1 IO_PAD53
+bit 376 O 1 IO_PAD53 375 1 Z
+bit 375 C 1 *
+bit 374 I 1 IO_PAD51
+bit 373 O 1 IO_PAD51 372 1 Z
+bit 372 C 1 *
+bit 371 I 1 IO_PAD50
+bit 370 O 1 IO_PAD50 369 1 Z
+bit 369 C 1 *
+bit 368 I 1 IO_PAD49
+bit 367 O 1 IO_PAD49 366 1 Z
+bit 366 C 1 *
+bit 365 I 1 IO_PAD47
+bit 364 O 1 IO_PAD47 363 1 Z
+bit 363 C 1 *
+bit 362 I 1 IO_PAD46
+bit 361 O 1 IO_PAD46 360 1 Z
+bit 360 C 1 *
+bit 359 I 1 IO_PAD45
+bit 358 O 1 IO_PAD45 357 1 Z
+bit 357 C 1 *
+bit 356 I 1 IO_PAD43
+bit 355 O 1 IO_PAD43 354 1 Z
+bit 354 C 1 *
+bit 353 I 1 IO_PAD41
+bit 352 O 1 IO_PAD41 351 1 Z
+bit 351 C 1 *
+bit 350 I 1 IO_PAD39
+bit 349 O 1 IO_PAD39 348 1 Z
+bit 348 C 1 *
+bit 347 I 1 IO_PAD38
+bit 346 O 1 IO_PAD38 345 1 Z
+bit 345 C 1 *
+bit 344 I 1 IO_PAD37
+bit 343 O 1 IO_PAD37 342 1 Z
+bit 342 C 1 *
+bit 341 I 1 IO_PAD35
+bit 340 O 1 IO_PAD35 339 1 Z
+bit 339 C 1 *
+bit 338 I 1 IO_PAD34
+bit 337 O 1 IO_PAD34 336 1 Z
+bit 336 C 1 *
+bit 335 I 1 IO_PAD33
+bit 334 O 1 IO_PAD33 333 1 Z
+bit 333 C 1 *
+bit 332 I 1 IO_PAD31
+bit 331 O 1 IO_PAD31 330 1 Z
+bit 330 C 1 *
+bit 329 I 1 IO_PAD29
+bit 328 O 1 IO_PAD29 327 1 Z
+bit 327 C 1 *
+bit 326 I 1 IO_PAD28
+bit 325 O 1 IO_PAD28 324 1 Z
+bit 324 C 1 *
+bit 323 I 1 IO_PAD27
+bit 322 O 1 IO_PAD27 321 1 Z
+bit 321 C 1 *
+bit 320 I 1 IO_PAD26
+bit 319 O 1 IO_PAD26 318 1 Z
+bit 318 C 1 *
+bit 317 I 1 IO_PAD25
+bit 316 O 1 IO_PAD25 315 1 Z
+bit 315 C 1 *
+bit 314 I 1 IO_PAD23
+bit 313 O 1 IO_PAD23 312 1 Z
+bit 312 C 1 *
+bit 311 I 1 IO_PAD21
+bit 310 O 1 IO_PAD21 309 1 Z
+bit 309 C 1 *
+bit 308 I 1 IO_PAD19
+bit 307 O 1 IO_PAD19 306 1 Z
+bit 306 C 1 *
+bit 305 I 1 IO_PAD17
+bit 304 O 1 IO_PAD17 303 1 Z
+bit 303 C 1 *
+bit 302 I 1 IO_PAD15
+bit 301 O 1 IO_PAD15 300 1 Z
+bit 300 C 1 *
+bit 299 I 1 IO_PAD14
+bit 298 O 1 IO_PAD14 297 1 Z
+bit 297 C 1 *
+bit 296 I 1 IO_PAD13
+bit 295 O 1 IO_PAD13 294 1 Z
+bit 294 C 1 *
+bit 293 I 1 IO_PAD11
+bit 292 O 1 IO_PAD11 291 1 Z
+bit 291 C 1 *
+bit 290 I 1 IO_PAD10
+bit 289 O 1 IO_PAD10 288 1 Z
+bit 288 C 1 *
+bit 287 I 1 IO_PAD9
+bit 286 O 1 IO_PAD9 285 1 Z
+bit 285 C 1 *
+bit 284 I 1 IO_PAD7
+bit 283 O 1 IO_PAD7 282 1 Z
+bit 282 C 1 *
+bit 281 I 1 IO_PAD5
+bit 280 O 1 IO_PAD5 279 1 Z
+bit 279 C 1 *
+bit 278 I 1 IO_PAD4
+bit 277 O 1 IO_PAD4 276 1 Z
+bit 276 C 1 *
+bit 275 I 1 IO_PAD3
+bit 274 O 1 IO_PAD3 273 1 Z
+bit 273 C 1 *
+bit 272 I 1 IO_PAD2
+bit 271 O 1 IO_PAD2 270 1 Z
+bit 270 C 1 *
+bit 269 I 1 IO_PAD1030
+bit 268 O 1 IO_PAD1030 267 1 Z
+bit 267 C 1 *
+bit 266 I 1 IO_PAD1029
+bit 265 O 1 IO_PAD1029 264 1 Z
+bit 264 C 1 *
+bit 263 I 1 IO_PAD1028
+bit 262 O 1 IO_PAD1028 261 1 Z
+bit 261 C 1 *
+bit 260 I 1 IO_PAD1027
+bit 259 O 1 IO_PAD1027 258 1 Z
+bit 258 C 1 *
+bit 257 I 1 IO_PAD1025
+bit 256 O 1 IO_PAD1025 255 1 Z
+bit 255 C 1 *
+bit 254 I 1 IO_PAD1023
+bit 253 O 1 IO_PAD1023 252 1 Z
+bit 252 C 1 *
+bit 251 I 1 IO_PAD1022
+bit 250 O 1 IO_PAD1022 249 1 Z
+bit 249 C 1 *
+bit 248 I 1 IO_PAD1021
+bit 247 O 1 IO_PAD1021 246 1 Z
+bit 246 C 1 *
+bit 245 I 1 IO_PAD1019
+bit 244 O 1 IO_PAD1019 243 1 Z
+bit 243 C 1 *
+bit 242 I 1 IO_PAD1018
+bit 241 O 1 IO_PAD1018 240 1 Z
+bit 240 C 1 *
+bit 239 I 1 IO_PAD1017
+bit 238 O 1 IO_PAD1017 237 1 Z
+bit 237 C 1 *
+bit 236 I 1 IO_PAD1015
+bit 235 O 1 IO_PAD1015 234 1 Z
+bit 234 C 1 *
+bit 233 I 1 IO_PAD1013
+bit 232 O 1 IO_PAD1013 231 1 Z
+bit 231 C 1 *
+bit 230 I 1 IO_PAD1011
+bit 229 O 1 IO_PAD1011 228 1 Z
+bit 228 C 1 *
+bit 227 I 1 IO_PAD1009
+bit 226 O 1 IO_PAD1009 225 1 Z
+bit 225 C 1 *
+bit 224 I 1 IO_PAD1007
+bit 223 O 1 IO_PAD1007 222 1 Z
+bit 222 C 1 *
+bit 221 I 1 IO_PAD1006
+bit 220 O 1 IO_PAD1006 219 1 Z
+bit 219 C 1 *
+bit 218 I 1 IO_PAD1005
+bit 217 O 1 IO_PAD1005 216 1 Z
+bit 216 C 1 *
+bit 215 I 1 IO_PAD1004
+bit 214 O 1 IO_PAD1004 213 1 Z
+bit 213 C 1 *
+bit 212 I 1 IO_PAD1003
+bit 211 O 1 IO_PAD1003 210 1 Z
+bit 210 C 1 *
+bit 209 I 1 IO_PAD1001
+bit 208 O 1 IO_PAD1001 207 1 Z
+bit 207 C 1 *
+bit 206 I 1 IO_PAD999
+bit 205 O 1 IO_PAD999 204 1 Z
+bit 204 C 1 *
+bit 203 I 1 IO_PAD998
+bit 202 O 1 IO_PAD998 201 1 Z
+bit 201 C 1 *
+bit 200 I 1 IO_PAD997
+bit 199 O 1 IO_PAD997 198 1 Z
+bit 198 C 1 *
+bit 197 I 1 IO_PAD995
+bit 196 O 1 IO_PAD995 195 1 Z
+bit 195 C 1 *
+bit 194 I 1 IO_PAD994
+bit 193 O 1 IO_PAD994 192 1 Z
+bit 192 C 1 *
+bit 191 I 1 IO_PAD993
+bit 190 O 1 IO_PAD993 189 1 Z
+bit 189 C 1 *
+bit 188 I 1 IO_PAD991
+bit 187 O 1 IO_PAD991 186 1 Z
+bit 186 C 1 *
+bit 185 I 1 IO_PAD989
+bit 184 O 1 IO_PAD989 183 1 Z
+bit 183 C 1 *
+bit 182 I 1 IO_PAD987
+bit 181 O 1 IO_PAD987 180 1 Z
+bit 180 C 1 *
+bit 179 I 1 IO_PAD986
+bit 178 O 1 IO_PAD986 177 1 Z
+bit 177 C 1 *
+bit 176 I 1 IO_PAD985
+bit 175 O 1 IO_PAD985 174 1 Z
+bit 174 C 1 *
+bit 173 I 1 IO_PAD983
+bit 172 O 1 IO_PAD983 171 1 Z
+bit 171 C 1 *
+bit 170 I 1 IO_PAD982
+bit 169 O 1 IO_PAD982 168 1 Z
+bit 168 C 1 *
+bit 167 I 1 IO_PAD981
+bit 166 O 1 IO_PAD981 165 1 Z
+bit 165 C 1 *
+bit 164 I 1 IO_PAD979
+bit 163 O 1 IO_PAD979 162 1 Z
+bit 162 C 1 *
+bit 161 I 1 IO_PAD977
+bit 160 O 1 IO_PAD977 159 1 Z
+bit 159 C 1 *
+bit 158 I 1 IO_PAD975
+bit 157 O 1 IO_PAD975 156 1 Z
+bit 156 C 1 *
+bit 155 I 1 IO_PAD974
+bit 154 O 1 IO_PAD974 153 1 Z
+bit 153 C 1 *
+bit 152 I 1 IO_PAD973
+bit 151 O 1 IO_PAD973 150 1 Z
+bit 150 C 1 *
+bit 149 I 1 IO_PAD971
+bit 148 O 1 IO_PAD971 147 1 Z
+bit 147 C 1 *
+bit 146 I 1 IO_PAD970
+bit 145 O 1 IO_PAD970 144 1 Z
+bit 144 C 1 *
+bit 143 I 1 IO_PAD969
+bit 142 O 1 IO_PAD969 141 1 Z
+bit 141 C 1 *
+bit 140 I 1 IO_PAD967
+bit 139 O 1 IO_PAD967 138 1 Z
+bit 138 C 1 *
+bit 137 I 1 IO_PAD965
+bit 136 O 1 IO_PAD965 135 1 Z
+bit 135 C 1 *
+bit 134 I 1 IO_PAD963
+bit 133 O 1 IO_PAD963 132 1 Z
+bit 132 C 1 *
+bit 131 I 1 IO_PAD962
+bit 130 O 1 IO_PAD962 129 1 Z
+bit 129 C 1 *
+bit 128 I 1 IO_PAD961
+bit 127 O 1 IO_PAD961 126 1 Z
+bit 126 C 1 *
+bit 125 I 1 IO_PAD959
+bit 124 O 1 IO_PAD959 123 1 Z
+bit 123 C 1 *
+bit 122 I 1 IO_PAD958
+bit 121 O 1 IO_PAD958 120 1 Z
+bit 120 C 1 *
+bit 119 I 1 IO_PAD957
+bit 118 O 1 IO_PAD957 117 1 Z
+bit 117 C 1 *
+bit 116 I 1 IO_PAD955
+bit 115 O 1 IO_PAD955 114 1 Z
+bit 114 C 1 *
+bit 113 I 1 IO_PAD953
+bit 112 O 1 IO_PAD953 111 1 Z
+bit 111 C 1 *
+bit 110 I 1 IO_PAD952
+bit 109 O 1 IO_PAD952 108 1 Z
+bit 108 C 1 *
+bit 107 I 1 IO_PAD951
+bit 106 O 1 IO_PAD951 105 1 Z
+bit 105 C 1 *
+bit 104 I 1 IO_PAD949
+bit 103 O 1 IO_PAD949 102 1 Z
+bit 102 C 1 *
+bit 101 I 1 IO_PAD947
+bit 100 O 1 IO_PAD947 99 1 Z
+bit 99 C 1 *
+bit 98 I 1 IO_PAD945
+bit 97 O 1 IO_PAD945 96 1 Z
+bit 96 C 1 *
+bit 95 I 1 IO_PAD943
+bit 94 O 1 IO_PAD943 93 1 Z
+bit 93 C 1 *
+bit 92 I 1 IO_PAD941
+bit 91 O 1 IO_PAD941 90 1 Z
+bit 90 C 1 *
+bit 89 I 1 IO_PAD940
+bit 88 O 1 IO_PAD940 87 1 Z
+bit 87 C 1 *
+bit 86 I 1 IO_PAD939
+bit 85 O 1 IO_PAD939 84 1 Z
+bit 84 C 1 *
+bit 83 I 1 IO_PAD937
+bit 82 O 1 IO_PAD937 81 1 Z
+bit 81 C 1 *
+bit 80 I 1 IO_PAD935
+bit 79 O 1 IO_PAD935 78 1 Z
+bit 78 C 1 *
+bit 77 I 1 IO_PAD934
+bit 76 O 1 IO_PAD934 75 1 Z
+bit 75 C 1 *
+bit 74 I 1 IO_PAD933
+bit 73 O 1 IO_PAD933 72 1 Z
+bit 72 C 1 *
+bit 71 I 1 IO_PAD931
+bit 70 O 1 IO_PAD931 69 1 Z
+bit 69 C 1 *
+bit 68 I 1 IO_PAD930
+bit 67 O 1 IO_PAD930 66 1 Z
+bit 66 C 1 *
+bit 65 I 1 IO_PAD929
+bit 64 O 1 IO_PAD929 63 1 Z
+bit 63 C 1 *
+bit 62 I 1 IO_PAD928
+bit 61 O 1 IO_PAD928 60 1 Z
+bit 60 C 1 *
+bit 59 I 1 IO_PAD927
+bit 58 O 1 IO_PAD927 57 1 Z
+bit 57 C 1 *
+bit 56 I 1 IO_PAD925
+bit 55 O 1 IO_PAD925 54 1 Z
+bit 54 C 1 *
+bit 53 I 1 IO_PAD923
+bit 52 O 1 IO_PAD923 51 1 Z
+bit 51 C 1 *
+bit 50 I 1 IO_PAD921
+bit 49 O 1 IO_PAD921 48 1 Z
+bit 48 C 1 *
+bit 47 I 1 IO_PAD920
+bit 46 O 1 IO_PAD920 45 1 Z
+bit 45 C 1 *
+bit 44 I 1 IO_PAD919
+bit 43 O 1 IO_PAD919 42 1 Z
+bit 42 C 1 *
+bit 41 I 1 IO_PAD917
+bit 40 O 1 IO_PAD917 39 1 Z
+bit 39 C 1 *
+bit 38 I 1 IO_PAD915
+bit 37 O 1 IO_PAD915 36 1 Z
+bit 36 C 1 *
+bit 35 I 1 IO_PAD914
+bit 34 O 1 IO_PAD914 33 1 Z
+bit 33 C 1 *
+bit 32 I 1 IO_PAD913
+bit 31 O 1 IO_PAD913 30 1 Z
+bit 30 C 1 *
+bit 29 I 1 IO_PAD912
+bit 28 O 1 IO_PAD912 27 1 Z
+bit 27 C 1 *
+bit 26 I 1 IO_PAD911
+bit 25 O 1 IO_PAD911 24 1 Z
+bit 24 C 1 *
+bit 23 I 1 IO_PAD909
+bit 22 O 1 IO_PAD909 21 1 Z
+bit 21 C 1 *
+bit 20 I 1 IO_PAD907
+bit 19 O 1 IO_PAD907 18 1 Z
+bit 18 C 1 *
+bit 17 I 1 IO_PAD905
+bit 16 O 1 IO_PAD905 15 1 Z
+bit 15 C 1 *
+bit 14 I 1 IO_PAD904
+bit 13 O 1 IO_PAD904 12 1 Z
+bit 12 C 1 *
+bit 11 I 1 IO_PAD903
+bit 10 O 1 IO_PAD903 9 1 Z
+bit 9 C 1 *
+bit 8 I 1 IO_PAD901
+bit 7 O 1 IO_PAD901 6 1 Z
+bit 6 C 1 *
+bit 5 I 1 IO_PAD899
+bit 4 O 1 IO_PAD899 3 1 Z
+bit 3 C 1 *
+bit 2 I 1 IO_PAD898
+bit 1 O 1 IO_PAD898 0 1 Z
+bit 0 C 1 *
--- /dev/null
+signal GND1
+signal GND2
+signal GND3
+signal GND4
+signal GND5
+signal GND6
+signal GND7
+signal GND8
+signal GND9
+signal GND10
+signal GND11
+signal GND12
+signal GND13
+signal GND14
+signal GND15
+signal GND16
+signal GND17
+signal GND18
+signal GND19
+signal GND20
+signal GND21
+signal GND22
+signal GND23
+signal GND24
+signal GND25
+signal GND26
+signal GND27
+signal GND28
+signal GND29
+signal GND30
+signal GND31
+signal GND32
+signal GND33
+signal GND34
+signal GND35
+signal GND36
+signal GND37
+signal GND38
+signal GND39
+signal GND40
+signal GND41
+signal GND42
+signal GND43
+signal GND44
+signal GND45
+signal GND46
+signal GND47
+signal GND48
+signal GND49
+signal GND50
+signal GND51
+signal GND52
+signal GND53
+signal GND54
+signal GND55
+signal GND56
+signal GND57
+signal GND58
+signal GND59
+signal GND60
+signal GND61
+signal GND62
+signal GND63
+signal GND64
+signal GND65
+signal GND66
+signal GND67
+signal GND68
+signal GND69
+signal GND70
+signal GND71
+signal GND72
+signal GND73
+signal GND74
+signal GND75
+signal GND76
+signal GND77
+signal GND78
+signal GND79
+signal GND80
+signal GND81
+signal GND82
+signal GND83
+signal GND84
+signal GND85
+signal GND86
+signal GND87
+signal GND88
+signal GND89
+signal GND90
+signal GND91
+signal GND92
+signal GND93
+signal GND94
+signal GND95
+signal GND96
+signal GND97
+signal GND98
+signal GND99
+signal GND100
+signal GND101
+signal GND102
+signal GND103
+signal GND104
+signal GND105
+signal GND106
+signal GND107
+signal GND108
+signal GND109
+signal GND110
+signal GND111
+signal GND112
+signal GND113
+signal GND114
+signal GND115
+signal GND116
+signal GND117
+signal GND118
+signal GND119
+signal GND120
+signal GND121
+signal GND122
+signal GND123
+signal GND124
+signal GND125
+signal GND126
+signal GND127
+signal GND128
+signal GND129
+signal GND130
+signal GND131
+signal GND132
+signal GND133
+signal GND134
+signal GND135
+signal GND136
+signal GND137
+signal GND138
+signal GND139
+signal GND140
+signal GND141
+signal GND142
+signal GND143
+signal GND144
+signal GND145
+signal GND146
+signal GND147
+signal GND148
+signal GND149
+signal GND150
+signal GND151
+signal GND152
+signal GND153
+signal GND154
+signal GND155
+signal GND156
+signal GND157
+signal GND158
+signal GND159
+signal GND160
+signal GND161
+signal GND162
+signal GND163
+signal GND164
+signal GND165
+signal GND166
+signal GND167
+signal GND168
+signal GND169
+signal GND170
+signal GND171
+signal GND172
+signal GND173
+signal GND174
+signal GND175
+signal GND176
+signal GND177
+signal GND178
+signal GND179
+signal GND180
+signal GND181
+signal GND182
+signal GND183
+signal GND184
+signal CCLK_AL31
+signal DONE_AD24
+signal HSWAP_EN_L11
+signal M0_AL4
+signal M1_AK4
+signal M2_AG8
+signal PROG_B
+signal TCK
+signal TDI
+signal TDO
+signal TMS
+signal VCCAUX1
+signal VCCAUX2
+signal VCCAUX3
+signal VCCAUX4
+signal VCCAUX5
+signal VCCAUX6
+signal VCCAUX7
+signal VCCAUX8
+signal VCCAUX9
+signal VCCAUX10
+signal VCCAUX11
+signal VCCAUX12
+signal VCCAUX13
+signal VCCAUX14
+signal VCCAUX15
+signal VCCAUX16
+signal VCCAUX17
+signal VCCAUX18
+signal VCCAUX19
+signal VCCAUX20
+signal VCCAUX21
+signal VCCAUX22
+signal VCCAUX23
+signal VCCAUX24
+signal VCCAUX25
+signal VCCAUX26
+signal VCCAUX27
+signal VCCAUX28
+signal VCCAUX29
+signal VCCAUX30
+signal VCCAUX31
+signal VCCAUX32
+signal VCCINT1
+signal VCCINT2
+signal VCCINT3
+signal VCCINT4
+signal VCCINT5
+signal VCCINT6
+signal VCCINT7
+signal VCCINT8
+signal VCCINT9
+signal VCCINT10
+signal VCCINT11
+signal VCCINT12
+signal VCCINT13
+signal VCCINT14
+signal VCCINT15
+signal VCCINT16
+signal VCCINT17
+signal VCCINT18
+signal VCCINT19
+signal VCCINT20
+signal VCCINT21
+signal VCCINT22
+signal VCCINT23
+signal VCCINT24
+signal VCCINT25
+signal VCCINT26
+signal VCCINT27
+signal VCCINT28
+signal VCCINT29
+signal VCCINT30
+signal VCCINT31
+signal VCCINT32
+signal VCCINT33
+signal VCCINT34
+signal VCCINT35
+signal VCCINT36
+signal VCCINT37
+signal VCCINT38
+signal VCCINT39
+signal VCCINT40
+signal VCCO01
+signal VCCO02
+signal VCCO03
+signal VCCO04
+signal VCCO05
+signal VCCO06
+signal VCCO07
+signal VCCO08
+signal VCCO09
+signal VCCO010
+signal VCCO011
+signal VCCO012
+signal VCCO013
+signal VCCO11
+signal VCCO12
+signal VCCO13
+signal VCCO14
+signal VCCO15
+signal VCCO16
+signal VCCO17
+signal VCCO18
+signal VCCO19
+signal VCCO110
+signal VCCO111
+signal VCCO112
+signal VCCO113
+signal VCCO21
+signal VCCO22
+signal VCCO23
+signal VCCO24
+signal VCCO25
+signal VCCO26
+signal VCCO27
+signal VCCO28
+signal VCCO29
+signal VCCO210
+signal VCCO211
+signal VCCO212
+signal VCCO213
+signal VCCO31
+signal VCCO32
+signal VCCO33
+signal VCCO34
+signal VCCO35
+signal VCCO36
+signal VCCO37
+signal VCCO38
+signal VCCO39
+signal VCCO310
+signal VCCO311
+signal VCCO312
+signal VCCO313
+signal VCCO41
+signal VCCO42
+signal VCCO43
+signal VCCO44
+signal VCCO45
+signal VCCO46
+signal VCCO47
+signal VCCO48
+signal VCCO49
+signal VCCO410
+signal VCCO411
+signal VCCO412
+signal VCCO413
+signal VCCO51
+signal VCCO52
+signal VCCO53
+signal VCCO54
+signal VCCO55
+signal VCCO56
+signal VCCO57
+signal VCCO58
+signal VCCO59
+signal VCCO510
+signal VCCO511
+signal VCCO512
+signal VCCO513
+signal VCCO61
+signal VCCO62
+signal VCCO63
+signal VCCO64
+signal VCCO65
+signal VCCO66
+signal VCCO67
+signal VCCO68
+signal VCCO69
+signal VCCO610
+signal VCCO611
+signal VCCO612
+signal VCCO613
+signal VCCO71
+signal VCCO72
+signal VCCO73
+signal VCCO74
+signal VCCO75
+signal VCCO76
+signal VCCO77
+signal VCCO78
+signal VCCO79
+signal VCCO710
+signal VCCO711
+signal VCCO712
+signal VCCO713
+signal IO_A3
+signal IO_A4
+signal IO_A6
+signal IO_A8
+signal IO_A10
+signal IO_A12
+signal IO_A14
+signal IO_A15
+signal IO_A17
+signal IO_A18
+signal IO_A20
+signal IO_A21
+signal IO_A23
+signal IO_A24
+signal IO_A25
+signal IO_A27
+signal IO_A29
+signal IO_A31
+signal IO_A32
+signal IO_B3
+signal IO_B4
+signal IO_B5
+signal IO_B6
+signal IO_B8
+signal IO_B9
+signal IO_B10
+signal IO_B12
+signal IO_B14
+signal IO_B15
+signal IO_B16
+signal IO_B17
+signal IO_B18
+signal IO_B19
+signal IO_B20
+signal IO_B21
+signal IO_B23
+signal IO_B24
+signal IO_B25
+signal IO_B26
+signal IO_B27
+signal IO_B29
+signal IO_B30
+signal IO_B31
+signal IO_B32
+signal IO_C1
+signal IO_C2
+signal IO_C5
+signal IO_C6
+signal IO_C9
+signal IO_C10
+signal IO_C12
+signal IO_C13
+signal IO_C14
+signal IO_C15
+signal IO_C16
+signal IO_C17
+signal IO_C18
+signal IO_C19
+signal IO_C20
+signal IO_C21
+signal IO_C22
+signal IO_C23
+signal IO_C25
+signal IO_C26
+signal IO_C29
+signal IO_C30
+signal IO_C33
+signal IO_C34
+signal IO_D1
+signal IO_D2
+signal IO_D5
+signal IO_D6
+signal IO_D8
+signal IO_D9
+signal IO_D10
+signal IO_D12
+signal IO_D13
+signal IO_D14
+signal IO_D15
+signal IO_D17
+signal IO_D18
+signal IO_D20
+signal IO_D21
+signal IO_D22
+signal IO_D23
+signal IO_D25
+signal IO_D26
+signal IO_D27
+signal IO_D29
+signal IO_D30
+signal IO_D33
+signal IO_D34
+signal IO_E2
+signal IO_E3
+signal IO_E7
+signal IO_E8
+signal IO_E10
+signal IO_E12
+signal IO_E14
+signal IO_E17
+signal IO_E18
+signal IO_E21
+signal IO_E23
+signal IO_E25
+signal IO_E27
+signal IO_E28
+signal IO_E32
+signal IO_E33
+signal IO_F1
+signal IO_F2
+signal IO_F3
+signal IO_F4
+signal IO_F6
+signal IO_F7
+signal IO_F8
+signal IO_F9
+signal IO_F10
+signal IO_F12
+signal IO_F14
+signal IO_F15
+signal IO_F16
+signal IO_F17
+signal IO_F18
+signal IO_F19
+signal IO_F20
+signal IO_F21
+signal IO_F23
+signal IO_F25
+signal IO_F26
+signal IO_F27
+signal IO_F28
+signal IO_F29
+signal IO_F31
+signal IO_F32
+signal IO_F33
+signal IO_F34
+signal IO_G1
+signal IO_G2
+signal IO_G5
+signal IO_G6
+signal IO_G9
+signal IO_G10
+signal IO_G12
+signal IO_G13
+signal IO_G14
+signal IO_G15
+signal IO_G16
+signal IO_G17
+signal IO_G18
+signal IO_G19
+signal IO_G20
+signal IO_G21
+signal IO_G22
+signal IO_G23
+signal IO_G25
+signal IO_G26
+signal IO_G29
+signal IO_G30
+signal IO_G33
+signal IO_G34
+signal IO_H1
+signal IO_H2
+signal IO_H4
+signal IO_H5
+signal IO_H6
+signal IO_H8
+signal IO_H9
+signal IO_H10
+signal IO_H12
+signal IO_H13
+signal IO_H14
+signal IO_H17
+signal IO_H18
+signal IO_H21
+signal IO_H22
+signal IO_H23
+signal IO_H25
+signal IO_H26
+signal IO_H29
+signal IO_H30
+signal IO_H31
+signal IO_H33
+signal IO_H34
+signal IO_J2
+signal IO_J3
+signal IO_J4
+signal IO_J6
+signal IO_J7
+signal IO_J8
+signal IO_J10
+signal IO_J11
+signal IO_J12
+signal IO_J14
+signal IO_J15
+signal IO_J17
+signal IO_J18
+signal IO_J20
+signal IO_J21
+signal IO_J23
+signal IO_J25
+signal IO_J27
+signal IO_J28
+signal IO_J29
+signal IO_J31
+signal IO_J32
+signal IO_J33
+signal IO_K1
+signal IO_K2
+signal IO_K3
+signal IO_K4
+signal IO_K5
+signal IO_K6
+signal IO_K7
+signal IO_K8
+signal IO_K9
+signal IO_K12
+signal IO_K13
+signal IO_K14
+signal IO_K15
+signal IO_K16
+signal IO_K17
+signal IO_K18
+signal IO_K19
+signal IO_K20
+signal IO_K21
+signal IO_K22
+signal IO_K23
+signal IO_K26
+signal IO_K27
+signal IO_K28
+signal IO_K29
+signal IO_K30
+signal IO_K31
+signal IO_K32
+signal IO_K33
+signal IO_K34
+signal IO_L1
+signal IO_L2
+signal IO_L9
+signal IO_L10
+signal IO_L12
+signal IO_L13
+signal IO_L14
+signal IO_L15
+signal IO_L16
+signal IO_L17
+signal IO_L18
+signal IO_L19
+signal IO_L20
+signal IO_L21
+signal IO_L22
+signal IO_L24
+signal IO_L25
+signal IO_L26
+signal IO_L33
+signal IO_L34
+signal IO_M1
+signal IO_M2
+signal IO_M3
+signal IO_M4
+signal IO_M5
+signal IO_M6
+signal IO_M7
+signal IO_M8
+signal IO_M9
+signal IO_M10
+signal IO_M11
+signal IO_M24
+signal IO_M25
+signal IO_M26
+signal IO_M27
+signal IO_M28
+signal IO_M29
+signal IO_M30
+signal IO_M31
+signal IO_M32
+signal IO_M33
+signal IO_M34
+signal IO_N3
+signal IO_N4
+signal IO_N7
+signal IO_N8
+signal IO_N10
+signal IO_N11
+signal IO_N24
+signal IO_N25
+signal IO_N27
+signal IO_N28
+signal IO_N31
+signal IO_N32
+signal IO_P1
+signal IO_P2
+signal IO_P3
+signal IO_P4
+signal IO_P5
+signal IO_P6
+signal IO_P7
+signal IO_P8
+signal IO_P11
+signal IO_P24
+signal IO_P27
+signal IO_P28
+signal IO_P29
+signal IO_P30
+signal IO_P31
+signal IO_P32
+signal IO_P33
+signal IO_P34
+signal IO_R1
+signal IO_R2
+signal IO_R3
+signal IO_R4
+signal IO_R6
+signal IO_R7
+signal IO_R9
+signal IO_R10
+signal IO_R11
+signal IO_R24
+signal IO_R25
+signal IO_R26
+signal IO_R28
+signal IO_R29
+signal IO_R31
+signal IO_R32
+signal IO_R33
+signal IO_R34
+signal IO_T2
+signal IO_T3
+signal IO_T6
+signal IO_T7
+signal IO_T10
+signal IO_T25
+signal IO_T28
+signal IO_T29
+signal IO_T32
+signal IO_T33
+signal IO_U1
+signal IO_U2
+signal IO_U3
+signal IO_U4
+signal IO_U5
+signal IO_U6
+signal IO_U7
+signal IO_U8
+signal IO_U9
+signal IO_U10
+signal IO_U25
+signal IO_U26
+signal IO_U27
+signal IO_U28
+signal IO_U29
+signal IO_U30
+signal IO_U31
+signal IO_U32
+signal IO_U33
+signal IO_U34
+signal IO_V1
+signal IO_V2
+signal IO_V3
+signal IO_V4
+signal IO_V5
+signal IO_V6
+signal IO_V7
+signal IO_V8
+signal IO_V9
+signal IO_V10
+signal IO_V25
+signal IO_V26
+signal IO_V27
+signal IO_V28
+signal IO_V29
+signal IO_V30
+signal IO_V31
+signal IO_V32
+signal IO_V33
+signal IO_V34
+signal IO_W2
+signal IO_W3
+signal IO_W6
+signal IO_W7
+signal IO_W10
+signal IO_W25
+signal IO_W28
+signal IO_W29
+signal IO_W32
+signal IO_W33
+signal IO_Y1
+signal IO_Y2
+signal IO_Y3
+signal IO_Y4
+signal IO_Y6
+signal IO_Y7
+signal IO_Y9
+signal IO_Y10
+signal IO_Y11
+signal IO_Y24
+signal IO_Y25
+signal IO_Y26
+signal IO_Y28
+signal IO_Y29
+signal IO_Y31
+signal IO_Y32
+signal IO_Y33
+signal IO_Y34
+signal IO_AA1
+signal IO_AA2
+signal IO_AA3
+signal IO_AA4
+signal IO_AA5
+signal IO_AA6
+signal IO_AA7
+signal IO_AA8
+signal IO_AA11
+signal IO_AA24
+signal IO_AA27
+signal IO_AA28
+signal IO_AA29
+signal IO_AA30
+signal IO_AA31
+signal IO_AA32
+signal IO_AA33
+signal IO_AA34
+signal IO_AB3
+signal IO_AB4
+signal IO_AB7
+signal IO_AB8
+signal IO_AB10
+signal IO_AB11
+signal IO_AB24
+signal IO_AB25
+signal IO_AB27
+signal IO_AB28
+signal IO_AB31
+signal IO_AB32
+signal IO_AC1
+signal IO_AC2
+signal IO_AC3
+signal IO_AC4
+signal IO_AC5
+signal IO_AC6
+signal IO_AC7
+signal IO_AC8
+signal IO_AC9
+signal IO_AC10
+signal IO_AC11
+signal IO_AC24
+signal IO_AC25
+signal IO_AC26
+signal IO_AC27
+signal IO_AC28
+signal IO_AC29
+signal IO_AC30
+signal IO_AC31
+signal IO_AC32
+signal IO_AC33
+signal IO_AC34
+signal IO_AD1
+signal IO_AD2
+signal IO_AD9
+signal IO_AD10
+signal IO_AD11
+signal IO_AD13
+signal IO_AD14
+signal IO_AD15
+signal IO_AD16
+signal IO_AD17
+signal IO_AD18
+signal IO_AD19
+signal IO_AD20
+signal IO_AD21
+signal IO_AD22
+signal IO_AD23
+signal IO_AD25
+signal IO_AD26
+signal IO_AD33
+signal IO_AD34
+signal IO_AE1
+signal IO_AE2
+signal IO_AE3
+signal IO_AE4
+signal IO_AE5
+signal IO_AE6
+signal IO_AE7
+signal IO_AE8
+signal IO_AE9
+signal IO_AE12
+signal IO_AE13
+signal IO_AE14
+signal IO_AE15
+signal IO_AE16
+signal IO_AE17
+signal IO_AE18
+signal IO_AE19
+signal IO_AE20
+signal IO_AE21
+signal IO_AE22
+signal IO_AE23
+signal IO_AE26
+signal IO_AE27
+signal IO_AE28
+signal IO_AE29
+signal IO_AE30
+signal IO_AE31
+signal IO_AE32
+signal IO_AE33
+signal IO_AE34
+signal IO_AF2
+signal IO_AF3
+signal IO_AF4
+signal IO_AF6
+signal IO_AF7
+signal IO_AF8
+signal IO_AF10
+signal IO_AF12
+signal IO_AF14
+signal IO_AF15
+signal IO_AF17
+signal IO_AF18
+signal IO_AF20
+signal IO_AF21
+signal IO_AF23
+signal IO_AF24
+signal IO_AF25
+signal IO_AF27
+signal IO_AF28
+signal IO_AF29
+signal IO_AF31
+signal IO_AF32
+signal IO_AF33
+signal IO_AG1
+signal IO_AG2
+signal IO_AG4
+signal IO_AG5
+signal IO_AG6
+signal IO_AG9
+signal IO_AG10
+signal IO_AG12
+signal IO_AG13
+signal IO_AG14
+signal IO_AG17
+signal IO_AG18
+signal IO_AG21
+signal IO_AG22
+signal IO_AG23
+signal IO_AG25
+signal IO_AG26
+signal IO_AG27
+signal IO_AG29
+signal IO_AG30
+signal IO_AG31
+signal IO_AG33
+signal IO_AG34
+signal IO_AH1
+signal IO_AH2
+signal IO_AH5
+signal IO_AH6
+signal IO_AH9
+signal IO_AH10
+signal IO_AH12
+signal IO_AH13
+signal IO_AH14
+signal IO_AH15
+signal IO_AH16
+signal IO_AH17
+signal IO_AH18
+signal IO_AH19
+signal IO_AH20
+signal IO_AH21
+signal IO_AH22
+signal IO_AH23
+signal IO_AH25
+signal IO_AH26
+signal IO_AH29
+signal IO_AH30
+signal IO_AH33
+signal IO_AH34
+signal IO_AJ1
+signal IO_AJ2
+signal IO_AJ3
+signal IO_AJ4
+signal IO_AJ6
+signal IO_AJ7
+signal IO_AJ8
+signal IO_AJ9
+signal IO_AJ10
+signal IO_AJ12
+signal IO_AJ14
+signal IO_AJ15
+signal IO_AJ16
+signal IO_AJ17
+signal IO_AJ18
+signal IO_AJ19
+signal IO_AJ20
+signal IO_AJ21
+signal IO_AJ23
+signal IO_AJ25
+signal IO_AJ26
+signal IO_AJ27
+signal IO_AJ28
+signal IO_AJ29
+signal IO_AJ31
+signal IO_AJ32
+signal IO_AJ33
+signal IO_AJ34
+signal IO_AK2
+signal IO_AK3
+signal IO_AK7
+signal IO_AK8
+signal IO_AK10
+signal IO_AK12
+signal IO_AK14
+signal IO_AK17
+signal IO_AK18
+signal IO_AK21
+signal IO_AK23
+signal IO_AK25
+signal IO_AK27
+signal IO_AK28
+signal IO_AK32
+signal IO_AK33
+signal IO_AL1
+signal IO_AL2
+signal IO_AL5
+signal IO_AL6
+signal IO_AL8
+signal IO_AL9
+signal IO_AL10
+signal IO_AL12
+signal IO_AL13
+signal IO_AL14
+signal IO_AL15
+signal IO_AL17
+signal IO_AL18
+signal IO_AL20
+signal IO_AL21
+signal IO_AL22
+signal IO_AL23
+signal IO_AL25
+signal IO_AL26
+signal IO_AL27
+signal IO_AL29
+signal IO_AL30
+signal IO_AL33
+signal IO_AL34
+signal IO_AM1
+signal IO_AM2
+signal IO_AM5
+signal IO_AM6
+signal IO_AM9
+signal IO_AM10
+signal IO_AM12
+signal IO_AM13
+signal IO_AM14
+signal IO_AM15
+signal IO_AM16
+signal IO_AM17
+signal IO_AM18
+signal IO_AM19
+signal IO_AM20
+signal IO_AM21
+signal IO_AM22
+signal IO_AM23
+signal IO_AM25
+signal IO_AM26
+signal IO_AM29
+signal IO_AM30
+signal IO_AM33
+signal IO_AM34
+signal IO_AN3
+signal IO_AN4
+signal IO_AN5
+signal IO_AN6
+signal IO_AN8
+signal IO_AN9
+signal IO_AN10
+signal IO_AN11
+signal IO_AN12
+signal IO_AN14
+signal IO_AN15
+signal IO_AN16
+signal IO_AN17
+signal IO_AN18
+signal IO_AN19
+signal IO_AN20
+signal IO_AN21
+signal IO_AN23
+signal IO_AN25
+signal IO_AN26
+signal IO_AN27
+signal IO_AN29
+signal IO_AN30
+signal IO_AN31
+signal IO_AN32
+signal IO_AP3
+signal IO_AP4
+signal IO_AP6
+signal IO_AP8
+signal IO_AP10
+signal IO_AP11
+signal IO_AP12
+signal IO_AP14
+signal IO_AP15
+signal IO_AP17
+signal IO_AP18
+signal IO_AP20
+signal IO_AP21
+signal IO_AP23
+signal IO_AP25
+signal IO_AP27
+signal IO_AP29
+signal IO_AP31
+
+register BSR 2243
+register BR 1
+register DIR 32
+
+instruction length 6
+
+instruction EXTEST 000000 BSR
+instruction SAMPLE/PRELOAD 000001 BSR
+instruction IDCODE 001001 DIR
+instruction BYPASS 111111 BR
+
+bit 2242 I 1 IO_C33
+bit 2241 O 1 IO_C33 2240 1 Z
+bit 2240 C 1 *
+bit 2239 I 1 IO_C34
+bit 2238 O 1 IO_C34 2237 1 Z
+bit 2237 C 1 *
+bit 2236 I 1 IO_D33
+bit 2235 O 1 IO_D33 2234 1 Z
+bit 2234 C 1 *
+bit 2233 I 1 IO_D34
+bit 2232 O 1 IO_D34 2231 1 Z
+bit 2231 C 1 *
+bit 2230 I 1 IO_E32
+bit 2229 O 1 IO_E32 2228 1 Z
+bit 2228 C 1 *
+bit 2227 I 1 IO_E33
+bit 2226 O 1 IO_E33 2225 1 Z
+bit 2225 C 1 *
+bit 2224 I 1 IO_F31
+bit 2223 O 1 IO_F31 2222 1 Z
+bit 2222 C 1 *
+bit 2221 I 1 IO_F32
+bit 2220 O 1 IO_F32 2219 1 Z
+bit 2219 C 1 *
+bit 2218 I 1 IO_F33
+bit 2217 O 1 IO_F33 2216 1 Z
+bit 2216 C 1 *
+bit 2215 I 1 IO_F34
+bit 2214 O 1 IO_F34 2213 1 Z
+bit 2213 C 1 *
+bit 2212 I 1 IO_G29
+bit 2211 O 1 IO_G29 2210 1 Z
+bit 2210 C 1 *
+bit 2209 I 1 IO_G30
+bit 2208 O 1 IO_G30 2207 1 Z
+bit 2207 C 1 *
+bit 2206 I 1 IO_G33
+bit 2205 O 1 IO_G33 2204 1 Z
+bit 2204 C 1 *
+bit 2203 O 1 *
+bit 2202 O 1 *
+bit 2201 O 1 *
+bit 2200 O 1 *
+bit 2199 O 1 *
+bit 2198 O 1 *
+bit 2197 I 1 IO_G34
+bit 2196 O 1 IO_G34 2195 1 Z
+bit 2195 C 1 *
+bit 2194 I 1 IO_H29
+bit 2193 O 1 IO_H29 2192 1 Z
+bit 2192 C 1 *
+bit 2191 I 1 IO_H30
+bit 2190 O 1 IO_H30 2189 1 Z
+bit 2189 C 1 *
+bit 2188 I 1 IO_H33
+bit 2187 O 1 IO_H33 2186 1 Z
+bit 2186 C 1 *
+bit 2185 I 1 IO_H34
+bit 2184 O 1 IO_H34 2183 1 Z
+bit 2183 C 1 *
+bit 2182 I 1 IO_J28
+bit 2181 O 1 IO_J28 2180 1 Z
+bit 2180 C 1 *
+bit 2179 I 1 IO_J29
+bit 2178 O 1 IO_J29 2177 1 Z
+bit 2177 C 1 *
+bit 2176 I 1 IO_H31
+bit 2175 O 1 IO_H31 2174 1 Z
+bit 2174 C 1 *
+bit 2173 I 1 IO_J31
+bit 2172 O 1 IO_J31 2171 1 Z
+bit 2171 C 1 *
+bit 2170 I 1 IO_J32
+bit 2169 O 1 IO_J32 2168 1 Z
+bit 2168 C 1 *
+bit 2167 I 1 IO_J33
+bit 2166 O 1 IO_J33 2165 1 Z
+bit 2165 C 1 *
+bit 2164 I 1 IO_J27
+bit 2163 O 1 IO_J27 2162 1 Z
+bit 2162 C 1 *
+bit 2161 I 1 IO_K26
+bit 2160 O 1 IO_K26 2159 1 Z
+bit 2159 C 1 *
+bit 2158 I 1 IO_K27
+bit 2157 O 1 IO_K27 2156 1 Z
+bit 2156 C 1 *
+bit 2155 I 1 IO_K28
+bit 2154 O 1 IO_K28 2153 1 Z
+bit 2153 C 1 *
+bit 2152 I 1 IO_K29
+bit 2151 O 1 IO_K29 2150 1 Z
+bit 2150 C 1 *
+bit 2149 I 1 IO_K30
+bit 2148 O 1 IO_K30 2147 1 Z
+bit 2147 C 1 *
+bit 2146 I 1 IO_K31
+bit 2145 O 1 IO_K31 2144 1 Z
+bit 2144 C 1 *
+bit 2143 I 1 IO_K32
+bit 2142 O 1 IO_K32 2141 1 Z
+bit 2141 C 1 *
+bit 2140 I 1 IO_K33
+bit 2139 O 1 IO_K33 2138 1 Z
+bit 2138 C 1 *
+bit 2137 I 1 IO_K34
+bit 2136 O 1 IO_K34 2135 1 Z
+bit 2135 C 1 *
+bit 2134 I 1 IO_L25
+bit 2133 O 1 IO_L25 2132 1 Z
+bit 2132 C 1 *
+bit 2131 I 1 IO_L26
+bit 2130 O 1 IO_L26 2129 1 Z
+bit 2129 C 1 *
+bit 2128 O 1 *
+bit 2127 O 1 *
+bit 2126 O 1 *
+bit 2125 O 1 *
+bit 2124 O 1 *
+bit 2123 O 1 *
+bit 2122 I 1 IO_L33
+bit 2121 O 1 IO_L33 2120 1 Z
+bit 2120 C 1 *
+bit 2119 I 1 IO_L34
+bit 2118 O 1 IO_L34 2117 1 Z
+bit 2117 C 1 *
+bit 2116 I 1 IO_M24
+bit 2115 O 1 IO_M24 2114 1 Z
+bit 2114 C 1 *
+bit 2113 I 1 IO_M25
+bit 2112 O 1 IO_M25 2111 1 Z
+bit 2111 C 1 *
+bit 2110 I 1 IO_M27
+bit 2109 O 1 IO_M27 2108 1 Z
+bit 2108 C 1 *
+bit 2107 I 1 IO_M28
+bit 2106 O 1 IO_M28 2105 1 Z
+bit 2105 C 1 *
+bit 2104 I 1 IO_M29
+bit 2103 O 1 IO_M29 2102 1 Z
+bit 2102 C 1 *
+bit 2101 I 1 IO_M30
+bit 2100 O 1 IO_M30 2099 1 Z
+bit 2099 C 1 *
+bit 2098 I 1 IO_M31
+bit 2097 O 1 IO_M31 2096 1 Z
+bit 2096 C 1 *
+bit 2095 I 1 IO_M32
+bit 2094 O 1 IO_M32 2093 1 Z
+bit 2093 C 1 *
+bit 2092 I 1 IO_M33
+bit 2091 O 1 IO_M33 2090 1 Z
+bit 2090 C 1 *
+bit 2089 I 1 IO_M34
+bit 2088 O 1 IO_M34 2087 1 Z
+bit 2087 C 1 *
+bit 2086 I 1 IO_M26
+bit 2085 O 1 IO_M26 2084 1 Z
+bit 2084 C 1 *
+bit 2083 I 1 IO_N25
+bit 2082 O 1 IO_N25 2081 1 Z
+bit 2081 C 1 *
+bit 2080 I 1 IO_N27
+bit 2079 O 1 IO_N27 2078 1 Z
+bit 2078 C 1 *
+bit 2077 I 1 IO_N28
+bit 2076 O 1 IO_N28 2075 1 Z
+bit 2075 C 1 *
+bit 2074 I 1 IO_N31
+bit 2073 O 1 IO_N31 2072 1 Z
+bit 2072 C 1 *
+bit 2071 I 1 IO_N32
+bit 2070 O 1 IO_N32 2069 1 Z
+bit 2069 C 1 *
+bit 2068 I 1 IO_N24
+bit 2067 O 1 IO_N24 2066 1 Z
+bit 2066 C 1 *
+bit 2065 I 1 IO_P24
+bit 2064 O 1 IO_P24 2063 1 Z
+bit 2063 C 1 *
+bit 2062 O 1 *
+bit 2061 O 1 *
+bit 2060 O 1 *
+bit 2059 O 1 *
+bit 2058 O 1 *
+bit 2057 O 1 *
+bit 2056 I 1 IO_P27
+bit 2055 O 1 IO_P27 2054 1 Z
+bit 2054 C 1 *
+bit 2053 I 1 IO_P28
+bit 2052 O 1 IO_P28 2051 1 Z
+bit 2051 C 1 *
+bit 2050 I 1 IO_P29
+bit 2049 O 1 IO_P29 2048 1 Z
+bit 2048 C 1 *
+bit 2047 I 1 IO_P30
+bit 2046 O 1 IO_P30 2045 1 Z
+bit 2045 C 1 *
+bit 2044 I 1 IO_P31
+bit 2043 O 1 IO_P31 2042 1 Z
+bit 2042 C 1 *
+bit 2041 I 1 IO_P32
+bit 2040 O 1 IO_P32 2039 1 Z
+bit 2039 C 1 *
+bit 2038 I 1 IO_P33
+bit 2037 O 1 IO_P33 2036 1 Z
+bit 2036 C 1 *
+bit 2035 I 1 IO_P34
+bit 2034 O 1 IO_P34 2033 1 Z
+bit 2033 C 1 *
+bit 2032 I 1 IO_R24
+bit 2031 O 1 IO_R24 2030 1 Z
+bit 2030 C 1 *
+bit 2029 I 1 IO_R25
+bit 2028 O 1 IO_R25 2027 1 Z
+bit 2027 C 1 *
+bit 2026 I 1 IO_R28
+bit 2025 O 1 IO_R28 2024 1 Z
+bit 2024 C 1 *
+bit 2023 I 1 IO_R29
+bit 2022 O 1 IO_R29 2021 1 Z
+bit 2021 C 1 *
+bit 2020 I 1 IO_R31
+bit 2019 O 1 IO_R31 2018 1 Z
+bit 2018 C 1 *
+bit 2017 I 1 IO_R32
+bit 2016 O 1 IO_R32 2015 1 Z
+bit 2015 C 1 *
+bit 2014 I 1 IO_R33
+bit 2013 O 1 IO_R33 2012 1 Z
+bit 2012 C 1 *
+bit 2011 I 1 IO_R34
+bit 2010 O 1 IO_R34 2009 1 Z
+bit 2009 C 1 *
+bit 2008 I 1 IO_R26
+bit 2007 O 1 IO_R26 2006 1 Z
+bit 2006 C 1 *
+bit 2005 I 1 IO_T25
+bit 2004 O 1 IO_T25 2003 1 Z
+bit 2003 C 1 *
+bit 2002 I 1 IO_T28
+bit 2001 O 1 IO_T28 2000 1 Z
+bit 2000 C 1 *
+bit 1999 I 1 IO_T29
+bit 1998 O 1 IO_T29 1997 1 Z
+bit 1997 C 1 *
+bit 1996 I 1 IO_T32
+bit 1995 O 1 IO_T32 1994 1 Z
+bit 1994 C 1 *
+bit 1993 I 1 IO_T33
+bit 1992 O 1 IO_T33 1991 1 Z
+bit 1991 C 1 *
+bit 1990 I 1 IO_U25
+bit 1989 O 1 IO_U25 1988 1 Z
+bit 1988 C 1 *
+bit 1987 O 1 *
+bit 1986 O 1 *
+bit 1985 O 1 *
+bit 1984 O 1 *
+bit 1983 O 1 *
+bit 1982 O 1 *
+bit 1981 I 1 IO_U26
+bit 1980 O 1 IO_U26 1979 1 Z
+bit 1979 C 1 *
+bit 1978 I 1 IO_U27
+bit 1977 O 1 IO_U27 1976 1 Z
+bit 1976 C 1 *
+bit 1975 I 1 IO_U28
+bit 1974 O 1 IO_U28 1973 1 Z
+bit 1973 C 1 *
+bit 1972 I 1 IO_U29
+bit 1971 O 1 IO_U29 1970 1 Z
+bit 1970 C 1 *
+bit 1969 I 1 IO_U30
+bit 1968 O 1 IO_U30 1967 1 Z
+bit 1967 C 1 *
+bit 1966 I 1 IO_U31
+bit 1965 O 1 IO_U31 1964 1 Z
+bit 1964 C 1 *
+bit 1963 I 1 IO_U32
+bit 1962 O 1 IO_U32 1961 1 Z
+bit 1961 C 1 *
+bit 1960 I 1 IO_U33
+bit 1959 O 1 IO_U33 1958 1 Z
+bit 1958 C 1 *
+bit 1957 I 1 IO_U34
+bit 1956 O 1 IO_U34 1955 1 Z
+bit 1955 C 1 *
+bit 1954 I 1 IO_V34
+bit 1953 O 1 IO_V34 1952 1 Z
+bit 1952 C 1 *
+bit 1951 I 1 IO_V33
+bit 1950 O 1 IO_V33 1949 1 Z
+bit 1949 C 1 *
+bit 1948 I 1 IO_V32
+bit 1947 O 1 IO_V32 1946 1 Z
+bit 1946 C 1 *
+bit 1945 I 1 IO_V31
+bit 1944 O 1 IO_V31 1943 1 Z
+bit 1943 C 1 *
+bit 1942 I 1 IO_V30
+bit 1941 O 1 IO_V30 1940 1 Z
+bit 1940 C 1 *
+bit 1939 I 1 IO_V29
+bit 1938 O 1 IO_V29 1937 1 Z
+bit 1937 C 1 *
+bit 1936 I 1 IO_V28
+bit 1935 O 1 IO_V28 1934 1 Z
+bit 1934 C 1 *
+bit 1933 I 1 IO_V27
+bit 1932 O 1 IO_V27 1931 1 Z
+bit 1931 C 1 *
+bit 1930 I 1 IO_V26
+bit 1929 O 1 IO_V26 1928 1 Z
+bit 1928 C 1 *
+bit 1927 O 1 *
+bit 1926 O 1 *
+bit 1925 O 1 *
+bit 1924 O 1 *
+bit 1923 O 1 *
+bit 1922 O 1 *
+bit 1921 I 1 IO_V25
+bit 1920 O 1 IO_V25 1919 1 Z
+bit 1919 C 1 *
+bit 1918 I 1 IO_W33
+bit 1917 O 1 IO_W33 1916 1 Z
+bit 1916 C 1 *
+bit 1915 I 1 IO_W32
+bit 1914 O 1 IO_W32 1913 1 Z
+bit 1913 C 1 *
+bit 1912 I 1 IO_W29
+bit 1911 O 1 IO_W29 1910 1 Z
+bit 1910 C 1 *
+bit 1909 I 1 IO_W28
+bit 1908 O 1 IO_W28 1907 1 Z
+bit 1907 C 1 *
+bit 1906 I 1 IO_W25
+bit 1905 O 1 IO_W25 1904 1 Z
+bit 1904 C 1 *
+bit 1903 I 1 IO_Y26
+bit 1902 O 1 IO_Y26 1901 1 Z
+bit 1901 C 1 *
+bit 1900 I 1 IO_Y34
+bit 1899 O 1 IO_Y34 1898 1 Z
+bit 1898 C 1 *
+bit 1897 I 1 IO_Y33
+bit 1896 O 1 IO_Y33 1895 1 Z
+bit 1895 C 1 *
+bit 1894 I 1 IO_Y32
+bit 1893 O 1 IO_Y32 1892 1 Z
+bit 1892 C 1 *
+bit 1891 I 1 IO_Y31
+bit 1890 O 1 IO_Y31 1889 1 Z
+bit 1889 C 1 *
+bit 1888 I 1 IO_Y29
+bit 1887 O 1 IO_Y29 1886 1 Z
+bit 1886 C 1 *
+bit 1885 I 1 IO_Y28
+bit 1884 O 1 IO_Y28 1883 1 Z
+bit 1883 C 1 *
+bit 1882 I 1 IO_Y25
+bit 1881 O 1 IO_Y25 1880 1 Z
+bit 1880 C 1 *
+bit 1879 I 1 IO_Y24
+bit 1878 O 1 IO_Y24 1877 1 Z
+bit 1877 C 1 *
+bit 1876 I 1 IO_AA34
+bit 1875 O 1 IO_AA34 1874 1 Z
+bit 1874 C 1 *
+bit 1873 I 1 IO_AA33
+bit 1872 O 1 IO_AA33 1871 1 Z
+bit 1871 C 1 *
+bit 1870 I 1 IO_AA32
+bit 1869 O 1 IO_AA32 1868 1 Z
+bit 1868 C 1 *
+bit 1867 I 1 IO_AA31
+bit 1866 O 1 IO_AA31 1865 1 Z
+bit 1865 C 1 *
+bit 1864 I 1 IO_AA30
+bit 1863 O 1 IO_AA30 1862 1 Z
+bit 1862 C 1 *
+bit 1861 I 1 IO_AA29
+bit 1860 O 1 IO_AA29 1859 1 Z
+bit 1859 C 1 *
+bit 1858 I 1 IO_AA28
+bit 1857 O 1 IO_AA28 1856 1 Z
+bit 1856 C 1 *
+bit 1855 I 1 IO_AA27
+bit 1854 O 1 IO_AA27 1853 1 Z
+bit 1853 C 1 *
+bit 1852 O 1 *
+bit 1851 O 1 *
+bit 1850 O 1 *
+bit 1849 O 1 *
+bit 1848 O 1 *
+bit 1847 O 1 *
+bit 1846 I 1 IO_AA24
+bit 1845 O 1 IO_AA24 1844 1 Z
+bit 1844 C 1 *
+bit 1843 I 1 IO_AB24
+bit 1842 O 1 IO_AB24 1841 1 Z
+bit 1841 C 1 *
+bit 1840 I 1 IO_AB32
+bit 1839 O 1 IO_AB32 1838 1 Z
+bit 1838 C 1 *
+bit 1837 I 1 IO_AB31
+bit 1836 O 1 IO_AB31 1835 1 Z
+bit 1835 C 1 *
+bit 1834 I 1 IO_AB28
+bit 1833 O 1 IO_AB28 1832 1 Z
+bit 1832 C 1 *
+bit 1831 I 1 IO_AB27
+bit 1830 O 1 IO_AB27 1829 1 Z
+bit 1829 C 1 *
+bit 1828 I 1 IO_AB25
+bit 1827 O 1 IO_AB25 1826 1 Z
+bit 1826 C 1 *
+bit 1825 I 1 IO_AC26
+bit 1824 O 1 IO_AC26 1823 1 Z
+bit 1823 C 1 *
+bit 1822 I 1 IO_AC34
+bit 1821 O 1 IO_AC34 1820 1 Z
+bit 1820 C 1 *
+bit 1819 I 1 IO_AC33
+bit 1818 O 1 IO_AC33 1817 1 Z
+bit 1817 C 1 *
+bit 1816 I 1 IO_AC32
+bit 1815 O 1 IO_AC32 1814 1 Z
+bit 1814 C 1 *
+bit 1813 I 1 IO_AC31
+bit 1812 O 1 IO_AC31 1811 1 Z
+bit 1811 C 1 *
+bit 1810 I 1 IO_AC30
+bit 1809 O 1 IO_AC30 1808 1 Z
+bit 1808 C 1 *
+bit 1807 I 1 IO_AC29
+bit 1806 O 1 IO_AC29 1805 1 Z
+bit 1805 C 1 *
+bit 1804 I 1 IO_AC28
+bit 1803 O 1 IO_AC28 1802 1 Z
+bit 1802 C 1 *
+bit 1801 I 1 IO_AC27
+bit 1800 O 1 IO_AC27 1799 1 Z
+bit 1799 C 1 *
+bit 1798 I 1 IO_AC25
+bit 1797 O 1 IO_AC25 1796 1 Z
+bit 1796 C 1 *
+bit 1795 I 1 IO_AC24
+bit 1794 O 1 IO_AC24 1793 1 Z
+bit 1793 C 1 *
+bit 1792 I 1 IO_AD34
+bit 1791 O 1 IO_AD34 1790 1 Z
+bit 1790 C 1 *
+bit 1789 I 1 IO_AD33
+bit 1788 O 1 IO_AD33 1787 1 Z
+bit 1787 C 1 *
+bit 1786 O 1 *
+bit 1785 O 1 *
+bit 1784 O 1 *
+bit 1783 O 1 *
+bit 1782 O 1 *
+bit 1781 O 1 *
+bit 1780 I 1 IO_AD26
+bit 1779 O 1 IO_AD26 1778 1 Z
+bit 1778 C 1 *
+bit 1777 I 1 IO_AD25
+bit 1776 O 1 IO_AD25 1775 1 Z
+bit 1775 C 1 *
+bit 1774 I 1 IO_AE34
+bit 1773 O 1 IO_AE34 1772 1 Z
+bit 1772 C 1 *
+bit 1771 I 1 IO_AE33
+bit 1770 O 1 IO_AE33 1769 1 Z
+bit 1769 C 1 *
+bit 1768 I 1 IO_AE32
+bit 1767 O 1 IO_AE32 1766 1 Z
+bit 1766 C 1 *
+bit 1765 I 1 IO_AE31
+bit 1764 O 1 IO_AE31 1763 1 Z
+bit 1763 C 1 *
+bit 1762 I 1 IO_AE30
+bit 1761 O 1 IO_AE30 1760 1 Z
+bit 1760 C 1 *
+bit 1759 I 1 IO_AE29
+bit 1758 O 1 IO_AE29 1757 1 Z
+bit 1757 C 1 *
+bit 1756 I 1 IO_AE28
+bit 1755 O 1 IO_AE28 1754 1 Z
+bit 1754 C 1 *
+bit 1753 I 1 IO_AE27
+bit 1752 O 1 IO_AE27 1751 1 Z
+bit 1751 C 1 *
+bit 1750 I 1 IO_AE26
+bit 1749 O 1 IO_AE26 1748 1 Z
+bit 1748 C 1 *
+bit 1747 I 1 IO_AF27
+bit 1746 O 1 IO_AF27 1745 1 Z
+bit 1745 C 1 *
+bit 1744 I 1 IO_AF33
+bit 1743 O 1 IO_AF33 1742 1 Z
+bit 1742 C 1 *
+bit 1741 I 1 IO_AF32
+bit 1740 O 1 IO_AF32 1739 1 Z
+bit 1739 C 1 *
+bit 1738 I 1 IO_AF31
+bit 1737 O 1 IO_AF31 1736 1 Z
+bit 1736 C 1 *
+bit 1735 I 1 IO_AG31
+bit 1734 O 1 IO_AG31 1733 1 Z
+bit 1733 C 1 *
+bit 1732 I 1 IO_AF29
+bit 1731 O 1 IO_AF29 1730 1 Z
+bit 1730 C 1 *
+bit 1729 I 1 IO_AF28
+bit 1728 O 1 IO_AF28 1727 1 Z
+bit 1727 C 1 *
+bit 1726 I 1 IO_AG34
+bit 1725 O 1 IO_AG34 1724 1 Z
+bit 1724 C 1 *
+bit 1723 I 1 IO_AG33
+bit 1722 O 1 IO_AG33 1721 1 Z
+bit 1721 C 1 *
+bit 1720 I 1 IO_AG30
+bit 1719 O 1 IO_AG30 1718 1 Z
+bit 1718 C 1 *
+bit 1717 I 1 IO_AG29
+bit 1716 O 1 IO_AG29 1715 1 Z
+bit 1715 C 1 *
+bit 1714 I 1 IO_AH34
+bit 1713 O 1 IO_AH34 1712 1 Z
+bit 1712 C 1 *
+bit 1711 O 1 *
+bit 1710 O 1 *
+bit 1709 O 1 *
+bit 1708 O 1 *
+bit 1707 O 1 *
+bit 1706 O 1 *
+bit 1705 I 1 IO_AH33
+bit 1704 O 1 IO_AH33 1703 1 Z
+bit 1703 C 1 *
+bit 1702 I 1 IO_AH30
+bit 1701 O 1 IO_AH30 1700 1 Z
+bit 1700 C 1 *
+bit 1699 I 1 IO_AH29
+bit 1698 O 1 IO_AH29 1697 1 Z
+bit 1697 C 1 *
+bit 1696 I 1 IO_AJ34
+bit 1695 O 1 IO_AJ34 1694 1 Z
+bit 1694 C 1 *
+bit 1693 I 1 IO_AJ33
+bit 1692 O 1 IO_AJ33 1691 1 Z
+bit 1691 C 1 *
+bit 1690 I 1 IO_AJ32
+bit 1689 O 1 IO_AJ32 1688 1 Z
+bit 1688 C 1 *
+bit 1687 I 1 IO_AJ31
+bit 1686 O 1 IO_AJ31 1685 1 Z
+bit 1685 C 1 *
+bit 1684 I 1 IO_AK33
+bit 1683 O 1 IO_AK33 1682 1 Z
+bit 1682 C 1 *
+bit 1681 I 1 IO_AK32
+bit 1680 O 1 IO_AK32 1679 1 Z
+bit 1679 C 1 *
+bit 1678 I 1 IO_AL34
+bit 1677 O 1 IO_AL34 1676 1 Z
+bit 1676 C 1 *
+bit 1675 I 1 IO_AL33
+bit 1674 O 1 IO_AL33 1673 1 Z
+bit 1673 C 1 *
+bit 1672 I 1 IO_AM34
+bit 1671 O 1 IO_AM34 1670 1 Z
+bit 1670 C 1 *
+bit 1669 I 1 IO_AM33
+bit 1668 O 1 IO_AM33 1667 1 Z
+bit 1667 C 1 *
+bit 1666 I 1 CCLK_AL31
+bit 1665 O 1 CCLK_AL31 1664 1 Z
+bit 1664 C 1 *
+bit 1663 I 1 DONE_AD24
+bit 1662 O 1 DONE_AD24 1661 1 Z
+bit 1661 C 1 *
+bit 1660 I 1 IO_AL30
+bit 1659 O 1 IO_AL30 1658 1 Z
+bit 1658 C 1 *
+bit 1657 I 1 IO_AN32
+bit 1656 O 1 IO_AN32 1655 1 Z
+bit 1655 C 1 *
+bit 1654 I 1 IO_AP32
+bit 1653 O 1 IO_AP32 1652 1 Z
+bit 1652 C 1 *
+bit 1651 I 1 IO_AN31
+bit 1650 O 1 IO_AN31 1649 1 Z
+bit 1649 C 1 *
+bit 1648 I 1 IO_AP31
+bit 1647 O 1 IO_AP31 1646 1 Z
+bit 1646 C 1 *
+bit 1645 I 1 IO_AJ29
+bit 1644 O 1 IO_AJ29 1643 1 Z
+bit 1643 C 1 *
+bit 1642 I 1 IO_AM30
+bit 1641 O 1 IO_AM30 1640 1 Z
+bit 1640 C 1 *
+bit 1639 I 1 IO_AN30
+bit 1638 O 1 IO_AN30 1637 1 Z
+bit 1637 C 1 *
+bit 1636 I 1 IO_AL29
+bit 1635 O 1 IO_AL29 1634 1 Z
+bit 1634 C 1 *
+bit 1633 I 1 IO_AM29
+bit 1632 O 1 IO_AM29 1631 1 Z
+bit 1631 C 1 *
+bit 1630 I 1 IO_AG27
+bit 1629 O 1 IO_AG27 1628 1 Z
+bit 1628 C 1 *
+bit 1627 I 1 IO_AN29
+bit 1626 O 1 IO_AN29 1625 1 Z
+bit 1625 C 1 *
+bit 1624 I 1 IO_AP29
+bit 1623 O 1 IO_AP29 1622 1 Z
+bit 1622 C 1 *
+bit 1621 I 1 IO_AJ28
+bit 1620 O 1 IO_AJ28 1619 1 Z
+bit 1619 C 1 *
+bit 1618 I 1 IO_AK28
+bit 1617 O 1 IO_AK28 1616 1 Z
+bit 1616 C 1 *
+bit 1615 I 1 IO_AJ27
+bit 1614 O 1 IO_AJ27 1613 1 Z
+bit 1613 C 1 *
+bit 1612 I 1 IO_AK27
+bit 1611 O 1 IO_AK27 1610 1 Z
+bit 1610 C 1 *
+bit 1609 I 1 IO_AL27
+bit 1608 O 1 IO_AL27 1607 1 Z
+bit 1607 C 1 *
+bit 1606 I 1 IO_AN27
+bit 1605 O 1 IO_AN27 1604 1 Z
+bit 1604 C 1 *
+bit 1603 I 1 IO_AP27
+bit 1602 O 1 IO_AP27 1601 1 Z
+bit 1601 C 1 *
+bit 1600 I 1 IO_AG26
+bit 1599 O 1 IO_AG26 1598 1 Z
+bit 1598 C 1 *
+bit 1597 I 1 IO_AH26
+bit 1596 O 1 IO_AH26 1595 1 Z
+bit 1595 C 1 *
+bit 1594 I 1 IO_AJ26
+bit 1593 O 1 IO_AJ26 1592 1 Z
+bit 1592 C 1 *
+bit 1591 I 1 IO_AL26
+bit 1590 O 1 IO_AL26 1589 1 Z
+bit 1589 C 1 *
+bit 1588 I 1 IO_AM26
+bit 1587 O 1 IO_AM26 1586 1 Z
+bit 1586 C 1 *
+bit 1585 I 1 IO_AN26
+bit 1584 O 1 IO_AN26 1583 1 Z
+bit 1583 C 1 *
+bit 1582 I 1 IO_AF25
+bit 1581 O 1 IO_AF25 1580 1 Z
+bit 1580 C 1 *
+bit 1579 I 1 IO_AG25
+bit 1578 O 1 IO_AG25 1577 1 Z
+bit 1577 C 1 *
+bit 1576 I 1 IO_AH25
+bit 1575 O 1 IO_AH25 1574 1 Z
+bit 1574 C 1 *
+bit 1573 I 1 IO_AJ25
+bit 1572 O 1 IO_AJ25 1571 1 Z
+bit 1571 C 1 *
+bit 1570 I 1 IO_AK25
+bit 1569 O 1 IO_AK25 1568 1 Z
+bit 1568 C 1 *
+bit 1567 I 1 IO_AL25
+bit 1566 O 1 IO_AL25 1565 1 Z
+bit 1565 C 1 *
+bit 1564 I 1 IO_AM25
+bit 1563 O 1 IO_AM25 1562 1 Z
+bit 1562 C 1 *
+bit 1561 I 1 IO_AN25
+bit 1560 O 1 IO_AN25 1559 1 Z
+bit 1559 C 1 *
+bit 1558 I 1 IO_AP25
+bit 1557 O 1 IO_AP25 1556 1 Z
+bit 1556 C 1 *
+bit 1555 I 1 IO_AF24
+bit 1554 O 1 IO_AF24 1553 1 Z
+bit 1553 C 1 *
+bit 1552 I 1 IO_AD23
+bit 1551 O 1 IO_AD23 1550 1 Z
+bit 1550 C 1 *
+bit 1549 I 1 IO_AE23
+bit 1548 O 1 IO_AE23 1547 1 Z
+bit 1547 C 1 *
+bit 1546 I 1 IO_AF23
+bit 1545 O 1 IO_AF23 1544 1 Z
+bit 1544 C 1 *
+bit 1543 I 1 IO_AG23
+bit 1542 O 1 IO_AG23 1541 1 Z
+bit 1541 C 1 *
+bit 1540 I 1 IO_AH23
+bit 1539 O 1 IO_AH23 1538 1 Z
+bit 1538 C 1 *
+bit 1537 I 1 IO_AJ23
+bit 1536 O 1 IO_AJ23 1535 1 Z
+bit 1535 C 1 *
+bit 1534 I 1 IO_AK23
+bit 1533 O 1 IO_AK23 1532 1 Z
+bit 1532 C 1 *
+bit 1531 I 1 IO_AL23
+bit 1530 O 1 IO_AL23 1529 1 Z
+bit 1529 C 1 *
+bit 1528 I 1 IO_AM23
+bit 1527 O 1 IO_AM23 1526 1 Z
+bit 1526 C 1 *
+bit 1525 I 1 IO_AD22
+bit 1524 O 1 IO_AD22 1523 1 Z
+bit 1523 C 1 *
+bit 1522 I 1 IO_AN23
+bit 1521 O 1 IO_AN23 1520 1 Z
+bit 1520 C 1 *
+bit 1519 I 1 IO_AP23
+bit 1518 O 1 IO_AP23 1517 1 Z
+bit 1517 C 1 *
+bit 1516 I 1 IO_AG22
+bit 1515 O 1 IO_AG22 1514 1 Z
+bit 1514 C 1 *
+bit 1513 I 1 IO_AH22
+bit 1512 O 1 IO_AH22 1511 1 Z
+bit 1511 C 1 *
+bit 1510 I 1 IO_AE22
+bit 1509 O 1 IO_AE22 1508 1 Z
+bit 1508 C 1 *
+bit 1507 I 1 IO_AL22
+bit 1506 O 1 IO_AL22 1505 1 Z
+bit 1505 C 1 *
+bit 1504 I 1 IO_AM22
+bit 1503 O 1 IO_AM22 1502 1 Z
+bit 1502 C 1 *
+bit 1501 I 1 IO_AD21
+bit 1500 O 1 IO_AD21 1499 1 Z
+bit 1499 C 1 *
+bit 1498 I 1 IO_AE21
+bit 1497 O 1 IO_AE21 1496 1 Z
+bit 1496 C 1 *
+bit 1495 I 1 IO_AF21
+bit 1494 O 1 IO_AF21 1493 1 Z
+bit 1493 C 1 *
+bit 1492 I 1 IO_AG21
+bit 1491 O 1 IO_AG21 1490 1 Z
+bit 1490 C 1 *
+bit 1489 I 1 IO_AH21
+bit 1488 O 1 IO_AH21 1487 1 Z
+bit 1487 C 1 *
+bit 1486 I 1 IO_AJ21
+bit 1485 O 1 IO_AJ21 1484 1 Z
+bit 1484 C 1 *
+bit 1483 I 1 IO_AK21
+bit 1482 O 1 IO_AK21 1481 1 Z
+bit 1481 C 1 *
+bit 1480 I 1 IO_AD20
+bit 1479 O 1 IO_AD20 1478 1 Z
+bit 1478 C 1 *
+bit 1477 I 1 IO_AL21
+bit 1476 O 1 IO_AL21 1475 1 Z
+bit 1475 C 1 *
+bit 1474 I 1 IO_AM21
+bit 1473 O 1 IO_AM21 1472 1 Z
+bit 1472 C 1 *
+bit 1471 I 1 IO_AN21
+bit 1470 O 1 IO_AN21 1469 1 Z
+bit 1469 C 1 *
+bit 1468 I 1 IO_AP21
+bit 1467 O 1 IO_AP21 1466 1 Z
+bit 1466 C 1 *
+bit 1465 I 1 IO_AD19
+bit 1464 O 1 IO_AD19 1463 1 Z
+bit 1463 C 1 *
+bit 1462 I 1 IO_AE20
+bit 1461 O 1 IO_AE20 1460 1 Z
+bit 1460 C 1 *
+bit 1459 I 1 IO_AF20
+bit 1458 O 1 IO_AF20 1457 1 Z
+bit 1457 C 1 *
+bit 1456 I 1 IO_AH20
+bit 1455 O 1 IO_AH20 1454 1 Z
+bit 1454 C 1 *
+bit 1453 I 1 IO_AJ20
+bit 1452 O 1 IO_AJ20 1451 1 Z
+bit 1451 C 1 *
+bit 1450 I 1 IO_AE19
+bit 1449 O 1 IO_AE19 1448 1 Z
+bit 1448 C 1 *
+bit 1447 I 1 IO_AL20
+bit 1446 O 1 IO_AL20 1445 1 Z
+bit 1445 C 1 *
+bit 1444 I 1 IO_AM20
+bit 1443 O 1 IO_AM20 1442 1 Z
+bit 1442 C 1 *
+bit 1441 I 1 IO_AN20
+bit 1440 O 1 IO_AN20 1439 1 Z
+bit 1439 C 1 *
+bit 1438 I 1 IO_AP20
+bit 1437 O 1 IO_AP20 1436 1 Z
+bit 1436 C 1 *
+bit 1435 I 1 IO_AD18
+bit 1434 O 1 IO_AD18 1433 1 Z
+bit 1433 C 1 *
+bit 1432 I 1 IO_AH19
+bit 1431 O 1 IO_AH19 1430 1 Z
+bit 1430 C 1 *
+bit 1429 I 1 IO_AJ19
+bit 1428 O 1 IO_AJ19 1427 1 Z
+bit 1427 C 1 *
+bit 1426 I 1 IO_AM19
+bit 1425 O 1 IO_AM19 1424 1 Z
+bit 1424 C 1 *
+bit 1423 I 1 IO_AN19
+bit 1422 O 1 IO_AN19 1421 1 Z
+bit 1421 C 1 *
+bit 1420 I 1 IO_AE18
+bit 1419 O 1 IO_AE18 1418 1 Z
+bit 1418 C 1 *
+bit 1417 I 1 IO_AF18
+bit 1416 O 1 IO_AF18 1415 1 Z
+bit 1415 C 1 *
+bit 1414 I 1 IO_AG18
+bit 1413 O 1 IO_AG18 1412 1 Z
+bit 1412 C 1 *
+bit 1411 I 1 IO_AH18
+bit 1410 O 1 IO_AH18 1409 1 Z
+bit 1409 C 1 *
+bit 1408 I 1 IO_AJ18
+bit 1407 O 1 IO_AJ18 1406 1 Z
+bit 1406 C 1 *
+bit 1405 I 1 IO_AK18
+bit 1404 O 1 IO_AK18 1403 1 Z
+bit 1403 C 1 *
+bit 1402 I 1 IO_AL18
+bit 1401 O 1 IO_AL18 1400 1 Z
+bit 1400 C 1 *
+bit 1399 I 1 IO_AM18
+bit 1398 O 1 IO_AM18 1397 1 Z
+bit 1397 C 1 *
+bit 1396 I 1 IO_AN18
+bit 1395 O 1 IO_AN18 1394 1 Z
+bit 1394 C 1 *
+bit 1393 I 1 IO_AP18
+bit 1392 O 1 IO_AP18 1391 1 Z
+bit 1391 C 1 *
+bit 1390 I 1 IO_AP17
+bit 1389 O 1 IO_AP17 1388 1 Z
+bit 1388 C 1 *
+bit 1387 I 1 IO_AN17
+bit 1386 O 1 IO_AN17 1385 1 Z
+bit 1385 C 1 *
+bit 1384 I 1 IO_AM17
+bit 1383 O 1 IO_AM17 1382 1 Z
+bit 1382 C 1 *
+bit 1381 I 1 IO_AL17
+bit 1380 O 1 IO_AL17 1379 1 Z
+bit 1379 C 1 *
+bit 1378 I 1 IO_AK17
+bit 1377 O 1 IO_AK17 1376 1 Z
+bit 1376 C 1 *
+bit 1375 I 1 IO_AJ17
+bit 1374 O 1 IO_AJ17 1373 1 Z
+bit 1373 C 1 *
+bit 1372 I 1 IO_AH17
+bit 1371 O 1 IO_AH17 1370 1 Z
+bit 1370 C 1 *
+bit 1369 I 1 IO_AG17
+bit 1368 O 1 IO_AG17 1367 1 Z
+bit 1367 C 1 *
+bit 1366 I 1 IO_AF17
+bit 1365 O 1 IO_AF17 1364 1 Z
+bit 1364 C 1 *
+bit 1363 I 1 IO_AE17
+bit 1362 O 1 IO_AE17 1361 1 Z
+bit 1361 C 1 *
+bit 1360 I 1 IO_AD17
+bit 1359 O 1 IO_AD17 1358 1 Z
+bit 1358 C 1 *
+bit 1357 I 1 IO_AN16
+bit 1356 O 1 IO_AN16 1355 1 Z
+bit 1355 C 1 *
+bit 1354 I 1 IO_AM16
+bit 1353 O 1 IO_AM16 1352 1 Z
+bit 1352 C 1 *
+bit 1351 I 1 IO_AJ16
+bit 1350 O 1 IO_AJ16 1349 1 Z
+bit 1349 C 1 *
+bit 1348 I 1 IO_AH16
+bit 1347 O 1 IO_AH16 1346 1 Z
+bit 1346 C 1 *
+bit 1345 I 1 IO_AE16
+bit 1344 O 1 IO_AE16 1343 1 Z
+bit 1343 C 1 *
+bit 1342 I 1 IO_AP15
+bit 1341 O 1 IO_AP15 1340 1 Z
+bit 1340 C 1 *
+bit 1339 I 1 IO_AN15
+bit 1338 O 1 IO_AN15 1337 1 Z
+bit 1337 C 1 *
+bit 1336 I 1 IO_AM15
+bit 1335 O 1 IO_AM15 1334 1 Z
+bit 1334 C 1 *
+bit 1333 I 1 IO_AL15
+bit 1332 O 1 IO_AL15 1331 1 Z
+bit 1331 C 1 *
+bit 1330 I 1 IO_AD16
+bit 1329 O 1 IO_AD16 1328 1 Z
+bit 1328 C 1 *
+bit 1327 I 1 IO_AJ15
+bit 1326 O 1 IO_AJ15 1325 1 Z
+bit 1325 C 1 *
+bit 1324 I 1 IO_AH15
+bit 1323 O 1 IO_AH15 1322 1 Z
+bit 1322 C 1 *
+bit 1321 I 1 IO_AF15
+bit 1320 O 1 IO_AF15 1319 1 Z
+bit 1319 C 1 *
+bit 1318 I 1 IO_AE15
+bit 1317 O 1 IO_AE15 1316 1 Z
+bit 1316 C 1 *
+bit 1315 I 1 IO_AD15
+bit 1314 O 1 IO_AD15 1313 1 Z
+bit 1313 C 1 *
+bit 1312 I 1 IO_AP14
+bit 1311 O 1 IO_AP14 1310 1 Z
+bit 1310 C 1 *
+bit 1309 I 1 IO_AN14
+bit 1308 O 1 IO_AN14 1307 1 Z
+bit 1307 C 1 *
+bit 1306 I 1 IO_AM14
+bit 1305 O 1 IO_AM14 1304 1 Z
+bit 1304 C 1 *
+bit 1303 I 1 IO_AL14
+bit 1302 O 1 IO_AL14 1301 1 Z
+bit 1301 C 1 *
+bit 1300 I 1 IO_AK14
+bit 1299 O 1 IO_AK14 1298 1 Z
+bit 1298 C 1 *
+bit 1297 I 1 IO_AJ14
+bit 1296 O 1 IO_AJ14 1295 1 Z
+bit 1295 C 1 *
+bit 1294 I 1 IO_AH14
+bit 1293 O 1 IO_AH14 1292 1 Z
+bit 1292 C 1 *
+bit 1291 I 1 IO_AG14
+bit 1290 O 1 IO_AG14 1289 1 Z
+bit 1289 C 1 *
+bit 1288 I 1 IO_AF14
+bit 1287 O 1 IO_AF14 1286 1 Z
+bit 1286 C 1 *
+bit 1285 I 1 IO_AE14
+bit 1284 O 1 IO_AE14 1283 1 Z
+bit 1283 C 1 *
+bit 1282 I 1 IO_AM13
+bit 1281 O 1 IO_AM13 1280 1 Z
+bit 1280 C 1 *
+bit 1279 I 1 IO_AL13
+bit 1278 O 1 IO_AL13 1277 1 Z
+bit 1277 C 1 *
+bit 1276 I 1 IO_AH13
+bit 1275 O 1 IO_AH13 1274 1 Z
+bit 1274 C 1 *
+bit 1273 I 1 IO_AG13
+bit 1272 O 1 IO_AG13 1271 1 Z
+bit 1271 C 1 *
+bit 1270 I 1 IO_AD14
+bit 1269 O 1 IO_AD14 1268 1 Z
+bit 1268 C 1 *
+bit 1267 I 1 IO_AE13
+bit 1266 O 1 IO_AE13 1265 1 Z
+bit 1265 C 1 *
+bit 1264 I 1 IO_AD13
+bit 1263 O 1 IO_AD13 1262 1 Z
+bit 1262 C 1 *
+bit 1261 I 1 IO_AP12
+bit 1260 O 1 IO_AP12 1259 1 Z
+bit 1259 C 1 *
+bit 1258 I 1 IO_AN12
+bit 1257 O 1 IO_AN12 1256 1 Z
+bit 1256 C 1 *
+bit 1255 I 1 IO_AM12
+bit 1254 O 1 IO_AM12 1253 1 Z
+bit 1253 C 1 *
+bit 1252 I 1 IO_AL12
+bit 1251 O 1 IO_AL12 1250 1 Z
+bit 1250 C 1 *
+bit 1249 I 1 IO_AK12
+bit 1248 O 1 IO_AK12 1247 1 Z
+bit 1247 C 1 *
+bit 1246 I 1 IO_AJ12
+bit 1245 O 1 IO_AJ12 1244 1 Z
+bit 1244 C 1 *
+bit 1243 I 1 IO_AH12
+bit 1242 O 1 IO_AH12 1241 1 Z
+bit 1241 C 1 *
+bit 1240 I 1 IO_AG12
+bit 1239 O 1 IO_AG12 1238 1 Z
+bit 1238 C 1 *
+bit 1237 I 1 IO_AF12
+bit 1236 O 1 IO_AF12 1235 1 Z
+bit 1235 C 1 *
+bit 1234 I 1 IO_AE12
+bit 1233 O 1 IO_AE12 1232 1 Z
+bit 1232 C 1 *
+bit 1231 I 1 IO_AP11
+bit 1230 O 1 IO_AP11 1229 1 Z
+bit 1229 C 1 *
+bit 1228 I 1 IO_AN11
+bit 1227 O 1 IO_AN11 1226 1 Z
+bit 1226 C 1 *
+bit 1225 I 1 IO_AD11
+bit 1224 O 1 IO_AD11 1223 1 Z
+bit 1223 C 1 *
+bit 1222 I 1 IO_AP10
+bit 1221 O 1 IO_AP10 1220 1 Z
+bit 1220 C 1 *
+bit 1219 I 1 IO_AN10
+bit 1218 O 1 IO_AN10 1217 1 Z
+bit 1217 C 1 *
+bit 1216 I 1 IO_AM10
+bit 1215 O 1 IO_AM10 1214 1 Z
+bit 1214 C 1 *
+bit 1213 I 1 IO_AL10
+bit 1212 O 1 IO_AL10 1211 1 Z
+bit 1211 C 1 *
+bit 1210 I 1 IO_AK10
+bit 1209 O 1 IO_AK10 1208 1 Z
+bit 1208 C 1 *
+bit 1207 I 1 IO_AJ10
+bit 1206 O 1 IO_AJ10 1205 1 Z
+bit 1205 C 1 *
+bit 1204 I 1 IO_AH10
+bit 1203 O 1 IO_AH10 1202 1 Z
+bit 1202 C 1 *
+bit 1201 I 1 IO_AG10
+bit 1200 O 1 IO_AG10 1199 1 Z
+bit 1199 C 1 *
+bit 1198 I 1 IO_AF10
+bit 1197 O 1 IO_AF10 1196 1 Z
+bit 1196 C 1 *
+bit 1195 I 1 IO_AN9
+bit 1194 O 1 IO_AN9 1193 1 Z
+bit 1193 C 1 *
+bit 1192 I 1 IO_AM9
+bit 1191 O 1 IO_AM9 1190 1 Z
+bit 1190 C 1 *
+bit 1189 I 1 IO_AL9
+bit 1188 O 1 IO_AL9 1187 1 Z
+bit 1187 C 1 *
+bit 1186 I 1 IO_AJ9
+bit 1185 O 1 IO_AJ9 1184 1 Z
+bit 1184 C 1 *
+bit 1183 I 1 IO_AH9
+bit 1182 O 1 IO_AH9 1181 1 Z
+bit 1181 C 1 *
+bit 1180 I 1 IO_AG9
+bit 1179 O 1 IO_AG9 1178 1 Z
+bit 1178 C 1 *
+bit 1177 I 1 IO_AP8
+bit 1176 O 1 IO_AP8 1175 1 Z
+bit 1175 C 1 *
+bit 1174 I 1 IO_AN8
+bit 1173 O 1 IO_AN8 1172 1 Z
+bit 1172 C 1 *
+bit 1171 I 1 IO_AL8
+bit 1170 O 1 IO_AL8 1169 1 Z
+bit 1169 C 1 *
+bit 1168 I 1 IO_AK8
+bit 1167 O 1 IO_AK8 1166 1 Z
+bit 1166 C 1 *
+bit 1165 I 1 IO_AJ8
+bit 1164 O 1 IO_AJ8 1163 1 Z
+bit 1163 C 1 *
+bit 1162 I 1 IO_AK7
+bit 1161 O 1 IO_AK7 1160 1 Z
+bit 1160 C 1 *
+bit 1159 I 1 IO_AJ7
+bit 1158 O 1 IO_AJ7 1157 1 Z
+bit 1157 C 1 *
+bit 1156 I 1 IO_AP6
+bit 1155 O 1 IO_AP6 1154 1 Z
+bit 1154 C 1 *
+bit 1153 I 1 IO_AN6
+bit 1152 O 1 IO_AN6 1151 1 Z
+bit 1151 C 1 *
+bit 1150 I 1 IO_AJ6
+bit 1149 O 1 IO_AJ6 1148 1 Z
+bit 1148 C 1 *
+bit 1147 I 1 IO_AM6
+bit 1146 O 1 IO_AM6 1145 1 Z
+bit 1145 C 1 *
+bit 1144 I 1 IO_AL6
+bit 1143 O 1 IO_AL6 1142 1 Z
+bit 1142 C 1 *
+bit 1141 I 1 IO_AN5
+bit 1140 O 1 IO_AN5 1139 1 Z
+bit 1139 C 1 *
+bit 1138 I 1 IO_AM5
+bit 1137 O 1 IO_AM5 1136 1 Z
+bit 1136 C 1 *
+bit 1135 I 1 IO_AL5
+bit 1134 O 1 IO_AL5 1133 1 Z
+bit 1133 C 1 *
+bit 1132 I 1 IO_AP4
+bit 1131 O 1 IO_AP4 1130 1 Z
+bit 1130 C 1 *
+bit 1129 I 1 IO_AN4
+bit 1128 O 1 IO_AN4 1127 1 Z
+bit 1127 C 1 *
+bit 1126 I 1 IO_AP3
+bit 1125 O 1 IO_AP3 1124 1 Z
+bit 1124 C 1 *
+bit 1123 I 1 IO_AN3
+bit 1122 O 1 IO_AN3 1121 1 Z
+bit 1121 C 1 *
+bit 1120 I 1 M2_AG8
+bit 1119 I 1 M0_AL4
+bit 1118 I 1 M1_AK4
+bit 1117 I 1 IO_AM2
+bit 1116 O 1 IO_AM2 1115 1 Z
+bit 1115 C 1 *
+bit 1114 I 1 IO_AM1
+bit 1113 O 1 IO_AM1 1112 1 Z
+bit 1112 C 1 *
+bit 1111 I 1 IO_AL2
+bit 1110 O 1 IO_AL2 1109 1 Z
+bit 1109 C 1 *
+bit 1108 I 1 IO_AL1
+bit 1107 O 1 IO_AL1 1106 1 Z
+bit 1106 C 1 *
+bit 1105 I 1 IO_AK3
+bit 1104 O 1 IO_AK3 1103 1 Z
+bit 1103 C 1 *
+bit 1102 I 1 IO_AK2
+bit 1101 O 1 IO_AK2 1100 1 Z
+bit 1100 C 1 *
+bit 1099 I 1 IO_AJ4
+bit 1098 O 1 IO_AJ4 1097 1 Z
+bit 1097 C 1 *
+bit 1096 I 1 IO_AJ3
+bit 1095 O 1 IO_AJ3 1094 1 Z
+bit 1094 C 1 *
+bit 1093 I 1 IO_AJ2
+bit 1092 O 1 IO_AJ2 1091 1 Z
+bit 1091 C 1 *
+bit 1090 I 1 IO_AJ1
+bit 1089 O 1 IO_AJ1 1088 1 Z
+bit 1088 C 1 *
+bit 1087 I 1 IO_AH6
+bit 1086 O 1 IO_AH6 1085 1 Z
+bit 1085 C 1 *
+bit 1084 I 1 IO_AH5
+bit 1083 O 1 IO_AH5 1082 1 Z
+bit 1082 C 1 *
+bit 1081 I 1 IO_AH2
+bit 1080 O 1 IO_AH2 1079 1 Z
+bit 1079 C 1 *
+bit 1078 O 1 *
+bit 1077 O 1 *
+bit 1076 O 1 *
+bit 1075 O 1 *
+bit 1074 O 1 *
+bit 1073 O 1 *
+bit 1072 I 1 IO_AH1
+bit 1071 O 1 IO_AH1 1070 1 Z
+bit 1070 C 1 *
+bit 1069 I 1 IO_AG6
+bit 1068 O 1 IO_AG6 1067 1 Z
+bit 1067 C 1 *
+bit 1066 I 1 IO_AG5
+bit 1065 O 1 IO_AG5 1064 1 Z
+bit 1064 C 1 *
+bit 1063 I 1 IO_AG2
+bit 1062 O 1 IO_AG2 1061 1 Z
+bit 1061 C 1 *
+bit 1060 I 1 IO_AG1
+bit 1059 O 1 IO_AG1 1058 1 Z
+bit 1058 C 1 *
+bit 1057 I 1 IO_AF7
+bit 1056 O 1 IO_AF7 1055 1 Z
+bit 1055 C 1 *
+bit 1054 I 1 IO_AF6
+bit 1053 O 1 IO_AF6 1052 1 Z
+bit 1052 C 1 *
+bit 1051 I 1 IO_AG4
+bit 1050 O 1 IO_AG4 1049 1 Z
+bit 1049 C 1 *
+bit 1048 I 1 IO_AF4
+bit 1047 O 1 IO_AF4 1046 1 Z
+bit 1046 C 1 *
+bit 1045 I 1 IO_AF3
+bit 1044 O 1 IO_AF3 1043 1 Z
+bit 1043 C 1 *
+bit 1042 I 1 IO_AF2
+bit 1041 O 1 IO_AF2 1040 1 Z
+bit 1040 C 1 *
+bit 1039 I 1 IO_AF8
+bit 1038 O 1 IO_AF8 1037 1 Z
+bit 1037 C 1 *
+bit 1036 I 1 IO_AE9
+bit 1035 O 1 IO_AE9 1034 1 Z
+bit 1034 C 1 *
+bit 1033 I 1 IO_AE8
+bit 1032 O 1 IO_AE8 1031 1 Z
+bit 1031 C 1 *
+bit 1030 I 1 IO_AE7
+bit 1029 O 1 IO_AE7 1028 1 Z
+bit 1028 C 1 *
+bit 1027 I 1 IO_AE6
+bit 1026 O 1 IO_AE6 1025 1 Z
+bit 1025 C 1 *
+bit 1024 I 1 IO_AE5
+bit 1023 O 1 IO_AE5 1022 1 Z
+bit 1022 C 1 *
+bit 1021 I 1 IO_AE4
+bit 1020 O 1 IO_AE4 1019 1 Z
+bit 1019 C 1 *
+bit 1018 I 1 IO_AE3
+bit 1017 O 1 IO_AE3 1016 1 Z
+bit 1016 C 1 *
+bit 1015 I 1 IO_AE2
+bit 1014 O 1 IO_AE2 1013 1 Z
+bit 1013 C 1 *
+bit 1012 I 1 IO_AE1
+bit 1011 O 1 IO_AE1 1010 1 Z
+bit 1010 C 1 *
+bit 1009 I 1 IO_AD10
+bit 1008 O 1 IO_AD10 1007 1 Z
+bit 1007 C 1 *
+bit 1006 I 1 IO_AD9
+bit 1005 O 1 IO_AD9 1004 1 Z
+bit 1004 C 1 *
+bit 1003 O 1 *
+bit 1002 O 1 *
+bit 1001 O 1 *
+bit 1000 O 1 *
+bit 999 O 1 *
+bit 998 O 1 *
+bit 997 I 1 IO_AD2
+bit 996 O 1 IO_AD2 995 1 Z
+bit 995 C 1 *
+bit 994 I 1 IO_AD1
+bit 993 O 1 IO_AD1 992 1 Z
+bit 992 C 1 *
+bit 991 I 1 IO_AC11
+bit 990 O 1 IO_AC11 989 1 Z
+bit 989 C 1 *
+bit 988 I 1 IO_AC10
+bit 987 O 1 IO_AC10 986 1 Z
+bit 986 C 1 *
+bit 985 I 1 IO_AC8
+bit 984 O 1 IO_AC8 983 1 Z
+bit 983 C 1 *
+bit 982 I 1 IO_AC7
+bit 981 O 1 IO_AC7 980 1 Z
+bit 980 C 1 *
+bit 979 I 1 IO_AC6
+bit 978 O 1 IO_AC6 977 1 Z
+bit 977 C 1 *
+bit 976 I 1 IO_AC5
+bit 975 O 1 IO_AC5 974 1 Z
+bit 974 C 1 *
+bit 973 I 1 IO_AC4
+bit 972 O 1 IO_AC4 971 1 Z
+bit 971 C 1 *
+bit 970 I 1 IO_AC3
+bit 969 O 1 IO_AC3 968 1 Z
+bit 968 C 1 *
+bit 967 I 1 IO_AC2
+bit 966 O 1 IO_AC2 965 1 Z
+bit 965 C 1 *
+bit 964 I 1 IO_AC1
+bit 963 O 1 IO_AC1 962 1 Z
+bit 962 C 1 *
+bit 961 I 1 IO_AC9
+bit 960 O 1 IO_AC9 959 1 Z
+bit 959 C 1 *
+bit 958 I 1 IO_AB10
+bit 957 O 1 IO_AB10 956 1 Z
+bit 956 C 1 *
+bit 955 I 1 IO_AB8
+bit 954 O 1 IO_AB8 953 1 Z
+bit 953 C 1 *
+bit 952 I 1 IO_AB7
+bit 951 O 1 IO_AB7 950 1 Z
+bit 950 C 1 *
+bit 949 I 1 IO_AB4
+bit 948 O 1 IO_AB4 947 1 Z
+bit 947 C 1 *
+bit 946 I 1 IO_AB3
+bit 945 O 1 IO_AB3 944 1 Z
+bit 944 C 1 *
+bit 943 I 1 IO_AB11
+bit 942 O 1 IO_AB11 941 1 Z
+bit 941 C 1 *
+bit 940 I 1 IO_AA11
+bit 939 O 1 IO_AA11 938 1 Z
+bit 938 C 1 *
+bit 937 O 1 *
+bit 936 O 1 *
+bit 935 O 1 *
+bit 934 O 1 *
+bit 933 O 1 *
+bit 932 O 1 *
+bit 931 I 1 IO_AA8
+bit 930 O 1 IO_AA8 929 1 Z
+bit 929 C 1 *
+bit 928 I 1 IO_AA7
+bit 927 O 1 IO_AA7 926 1 Z
+bit 926 C 1 *
+bit 925 I 1 IO_AA6
+bit 924 O 1 IO_AA6 923 1 Z
+bit 923 C 1 *
+bit 922 I 1 IO_AA5
+bit 921 O 1 IO_AA5 920 1 Z
+bit 920 C 1 *
+bit 919 I 1 IO_AA4
+bit 918 O 1 IO_AA4 917 1 Z
+bit 917 C 1 *
+bit 916 I 1 IO_AA3
+bit 915 O 1 IO_AA3 914 1 Z
+bit 914 C 1 *
+bit 913 I 1 IO_AA2
+bit 912 O 1 IO_AA2 911 1 Z
+bit 911 C 1 *
+bit 910 I 1 IO_AA1
+bit 909 O 1 IO_AA1 908 1 Z
+bit 908 C 1 *
+bit 907 I 1 IO_Y11
+bit 906 O 1 IO_Y11 905 1 Z
+bit 905 C 1 *
+bit 904 I 1 IO_Y10
+bit 903 O 1 IO_Y10 902 1 Z
+bit 902 C 1 *
+bit 901 I 1 IO_Y7
+bit 900 O 1 IO_Y7 899 1 Z
+bit 899 C 1 *
+bit 898 I 1 IO_Y6
+bit 897 O 1 IO_Y6 896 1 Z
+bit 896 C 1 *
+bit 895 I 1 IO_Y4
+bit 894 O 1 IO_Y4 893 1 Z
+bit 893 C 1 *
+bit 892 I 1 IO_Y3
+bit 891 O 1 IO_Y3 890 1 Z
+bit 890 C 1 *
+bit 889 I 1 IO_Y2
+bit 888 O 1 IO_Y2 887 1 Z
+bit 887 C 1 *
+bit 886 I 1 IO_Y1
+bit 885 O 1 IO_Y1 884 1 Z
+bit 884 C 1 *
+bit 883 I 1 IO_Y9
+bit 882 O 1 IO_Y9 881 1 Z
+bit 881 C 1 *
+bit 880 I 1 IO_W10
+bit 879 O 1 IO_W10 878 1 Z
+bit 878 C 1 *
+bit 877 I 1 IO_W7
+bit 876 O 1 IO_W7 875 1 Z
+bit 875 C 1 *
+bit 874 I 1 IO_W6
+bit 873 O 1 IO_W6 872 1 Z
+bit 872 C 1 *
+bit 871 I 1 IO_W3
+bit 870 O 1 IO_W3 869 1 Z
+bit 869 C 1 *
+bit 868 I 1 IO_W2
+bit 867 O 1 IO_W2 866 1 Z
+bit 866 C 1 *
+bit 865 I 1 IO_V10
+bit 864 O 1 IO_V10 863 1 Z
+bit 863 C 1 *
+bit 862 O 1 *
+bit 861 O 1 *
+bit 860 O 1 *
+bit 859 O 1 *
+bit 858 O 1 *
+bit 857 O 1 *
+bit 856 I 1 IO_V9
+bit 855 O 1 IO_V9 854 1 Z
+bit 854 C 1 *
+bit 853 I 1 IO_V8
+bit 852 O 1 IO_V8 851 1 Z
+bit 851 C 1 *
+bit 850 I 1 IO_V7
+bit 849 O 1 IO_V7 848 1 Z
+bit 848 C 1 *
+bit 847 I 1 IO_V6
+bit 846 O 1 IO_V6 845 1 Z
+bit 845 C 1 *
+bit 844 I 1 IO_V5
+bit 843 O 1 IO_V5 842 1 Z
+bit 842 C 1 *
+bit 841 I 1 IO_V4
+bit 840 O 1 IO_V4 839 1 Z
+bit 839 C 1 *
+bit 838 I 1 IO_V3
+bit 837 O 1 IO_V3 836 1 Z
+bit 836 C 1 *
+bit 835 I 1 IO_V2
+bit 834 O 1 IO_V2 833 1 Z
+bit 833 C 1 *
+bit 832 I 1 IO_V1
+bit 831 O 1 IO_V1 830 1 Z
+bit 830 C 1 *
+bit 829 I 1 IO_U1
+bit 828 O 1 IO_U1 827 1 Z
+bit 827 C 1 *
+bit 826 I 1 IO_U2
+bit 825 O 1 IO_U2 824 1 Z
+bit 824 C 1 *
+bit 823 I 1 IO_U3
+bit 822 O 1 IO_U3 821 1 Z
+bit 821 C 1 *
+bit 820 I 1 IO_U4
+bit 819 O 1 IO_U4 818 1 Z
+bit 818 C 1 *
+bit 817 I 1 IO_U5
+bit 816 O 1 IO_U5 815 1 Z
+bit 815 C 1 *
+bit 814 I 1 IO_U6
+bit 813 O 1 IO_U6 812 1 Z
+bit 812 C 1 *
+bit 811 I 1 IO_U7
+bit 810 O 1 IO_U7 809 1 Z
+bit 809 C 1 *
+bit 808 I 1 IO_U8
+bit 807 O 1 IO_U8 806 1 Z
+bit 806 C 1 *
+bit 805 I 1 IO_U9
+bit 804 O 1 IO_U9 803 1 Z
+bit 803 C 1 *
+bit 802 O 1 *
+bit 801 O 1 *
+bit 800 O 1 *
+bit 799 O 1 *
+bit 798 O 1 *
+bit 797 O 1 *
+bit 796 I 1 IO_U10
+bit 795 O 1 IO_U10 794 1 Z
+bit 794 C 1 *
+bit 793 I 1 IO_T2
+bit 792 O 1 IO_T2 791 1 Z
+bit 791 C 1 *
+bit 790 I 1 IO_T3
+bit 789 O 1 IO_T3 788 1 Z
+bit 788 C 1 *
+bit 787 I 1 IO_T6
+bit 786 O 1 IO_T6 785 1 Z
+bit 785 C 1 *
+bit 784 I 1 IO_T7
+bit 783 O 1 IO_T7 782 1 Z
+bit 782 C 1 *
+bit 781 I 1 IO_T10
+bit 780 O 1 IO_T10 779 1 Z
+bit 779 C 1 *
+bit 778 I 1 IO_R9
+bit 777 O 1 IO_R9 776 1 Z
+bit 776 C 1 *
+bit 775 I 1 IO_R1
+bit 774 O 1 IO_R1 773 1 Z
+bit 773 C 1 *
+bit 772 I 1 IO_R2
+bit 771 O 1 IO_R2 770 1 Z
+bit 770 C 1 *
+bit 769 I 1 IO_R3
+bit 768 O 1 IO_R3 767 1 Z
+bit 767 C 1 *
+bit 766 I 1 IO_R4
+bit 765 O 1 IO_R4 764 1 Z
+bit 764 C 1 *
+bit 763 I 1 IO_R6
+bit 762 O 1 IO_R6 761 1 Z
+bit 761 C 1 *
+bit 760 I 1 IO_R7
+bit 759 O 1 IO_R7 758 1 Z
+bit 758 C 1 *
+bit 757 I 1 IO_R10
+bit 756 O 1 IO_R10 755 1 Z
+bit 755 C 1 *
+bit 754 I 1 IO_R11
+bit 753 O 1 IO_R11 752 1 Z
+bit 752 C 1 *
+bit 751 I 1 IO_P1
+bit 750 O 1 IO_P1 749 1 Z
+bit 749 C 1 *
+bit 748 I 1 IO_P2
+bit 747 O 1 IO_P2 746 1 Z
+bit 746 C 1 *
+bit 745 I 1 IO_P3
+bit 744 O 1 IO_P3 743 1 Z
+bit 743 C 1 *
+bit 742 I 1 IO_P4
+bit 741 O 1 IO_P4 740 1 Z
+bit 740 C 1 *
+bit 739 I 1 IO_P5
+bit 738 O 1 IO_P5 737 1 Z
+bit 737 C 1 *
+bit 736 I 1 IO_P6
+bit 735 O 1 IO_P6 734 1 Z
+bit 734 C 1 *
+bit 733 I 1 IO_P7
+bit 732 O 1 IO_P7 731 1 Z
+bit 731 C 1 *
+bit 730 I 1 IO_P8
+bit 729 O 1 IO_P8 728 1 Z
+bit 728 C 1 *
+bit 727 O 1 *
+bit 726 O 1 *
+bit 725 O 1 *
+bit 724 O 1 *
+bit 723 O 1 *
+bit 722 O 1 *
+bit 721 I 1 IO_P11
+bit 720 O 1 IO_P11 719 1 Z
+bit 719 C 1 *
+bit 718 I 1 IO_N11
+bit 717 O 1 IO_N11 716 1 Z
+bit 716 C 1 *
+bit 715 I 1 IO_N3
+bit 714 O 1 IO_N3 713 1 Z
+bit 713 C 1 *
+bit 712 I 1 IO_N4
+bit 711 O 1 IO_N4 710 1 Z
+bit 710 C 1 *
+bit 709 I 1 IO_N7
+bit 708 O 1 IO_N7 707 1 Z
+bit 707 C 1 *
+bit 706 I 1 IO_N8
+bit 705 O 1 IO_N8 704 1 Z
+bit 704 C 1 *
+bit 703 I 1 IO_N10
+bit 702 O 1 IO_N10 701 1 Z
+bit 701 C 1 *
+bit 700 I 1 IO_M9
+bit 699 O 1 IO_M9 698 1 Z
+bit 698 C 1 *
+bit 697 I 1 IO_M1
+bit 696 O 1 IO_M1 695 1 Z
+bit 695 C 1 *
+bit 694 I 1 IO_M2
+bit 693 O 1 IO_M2 692 1 Z
+bit 692 C 1 *
+bit 691 I 1 IO_M3
+bit 690 O 1 IO_M3 689 1 Z
+bit 689 C 1 *
+bit 688 I 1 IO_M4
+bit 687 O 1 IO_M4 686 1 Z
+bit 686 C 1 *
+bit 685 I 1 IO_M5
+bit 684 O 1 IO_M5 683 1 Z
+bit 683 C 1 *
+bit 682 I 1 IO_M6
+bit 681 O 1 IO_M6 680 1 Z
+bit 680 C 1 *
+bit 679 I 1 IO_M7
+bit 678 O 1 IO_M7 677 1 Z
+bit 677 C 1 *
+bit 676 I 1 IO_M8
+bit 675 O 1 IO_M8 674 1 Z
+bit 674 C 1 *
+bit 673 I 1 IO_M10
+bit 672 O 1 IO_M10 671 1 Z
+bit 671 C 1 *
+bit 670 I 1 IO_M11
+bit 669 O 1 IO_M11 668 1 Z
+bit 668 C 1 *
+bit 667 I 1 IO_L1
+bit 666 O 1 IO_L1 665 1 Z
+bit 665 C 1 *
+bit 664 I 1 IO_L2
+bit 663 O 1 IO_L2 662 1 Z
+bit 662 C 1 *
+bit 661 O 1 *
+bit 660 O 1 *
+bit 659 O 1 *
+bit 658 O 1 *
+bit 657 O 1 *
+bit 656 O 1 *
+bit 655 I 1 IO_L9
+bit 654 O 1 IO_L9 653 1 Z
+bit 653 C 1 *
+bit 652 I 1 IO_L10
+bit 651 O 1 IO_L10 650 1 Z
+bit 650 C 1 *
+bit 649 I 1 IO_K1
+bit 648 O 1 IO_K1 647 1 Z
+bit 647 C 1 *
+bit 646 I 1 IO_K2
+bit 645 O 1 IO_K2 644 1 Z
+bit 644 C 1 *
+bit 643 I 1 IO_K3
+bit 642 O 1 IO_K3 641 1 Z
+bit 641 C 1 *
+bit 640 I 1 IO_K4
+bit 639 O 1 IO_K4 638 1 Z
+bit 638 C 1 *
+bit 637 I 1 IO_K5
+bit 636 O 1 IO_K5 635 1 Z
+bit 635 C 1 *
+bit 634 I 1 IO_K6
+bit 633 O 1 IO_K6 632 1 Z
+bit 632 C 1 *
+bit 631 I 1 IO_K7
+bit 630 O 1 IO_K7 629 1 Z
+bit 629 C 1 *
+bit 628 I 1 IO_K8
+bit 627 O 1 IO_K8 626 1 Z
+bit 626 C 1 *
+bit 625 I 1 IO_K9
+bit 624 O 1 IO_K9 623 1 Z
+bit 623 C 1 *
+bit 622 I 1 IO_J8
+bit 621 O 1 IO_J8 620 1 Z
+bit 620 C 1 *
+bit 619 I 1 IO_J2
+bit 618 O 1 IO_J2 617 1 Z
+bit 617 C 1 *
+bit 616 I 1 IO_J3
+bit 615 O 1 IO_J3 614 1 Z
+bit 614 C 1 *
+bit 613 I 1 IO_J4
+bit 612 O 1 IO_J4 611 1 Z
+bit 611 C 1 *
+bit 610 I 1 IO_H4
+bit 609 O 1 IO_H4 608 1 Z
+bit 608 C 1 *
+bit 607 I 1 IO_J6
+bit 606 O 1 IO_J6 605 1 Z
+bit 605 C 1 *
+bit 604 I 1 IO_J7
+bit 603 O 1 IO_J7 602 1 Z
+bit 602 C 1 *
+bit 601 I 1 IO_H1
+bit 600 O 1 IO_H1 599 1 Z
+bit 599 C 1 *
+bit 598 I 1 IO_H2
+bit 597 O 1 IO_H2 596 1 Z
+bit 596 C 1 *
+bit 595 I 1 IO_H5
+bit 594 O 1 IO_H5 593 1 Z
+bit 593 C 1 *
+bit 592 I 1 IO_H6
+bit 591 O 1 IO_H6 590 1 Z
+bit 590 C 1 *
+bit 589 I 1 IO_G1
+bit 588 O 1 IO_G1 587 1 Z
+bit 587 C 1 *
+bit 586 O 1 *
+bit 585 O 1 *
+bit 584 O 1 *
+bit 583 O 1 *
+bit 582 O 1 *
+bit 581 O 1 *
+bit 580 I 1 IO_G2
+bit 579 O 1 IO_G2 578 1 Z
+bit 578 C 1 *
+bit 577 I 1 IO_G5
+bit 576 O 1 IO_G5 575 1 Z
+bit 575 C 1 *
+bit 574 I 1 IO_G6
+bit 573 O 1 IO_G6 572 1 Z
+bit 572 C 1 *
+bit 571 I 1 IO_F1
+bit 570 O 1 IO_F1 569 1 Z
+bit 569 C 1 *
+bit 568 I 1 IO_F2
+bit 567 O 1 IO_F2 566 1 Z
+bit 566 C 1 *
+bit 565 I 1 IO_F3
+bit 564 O 1 IO_F3 563 1 Z
+bit 563 C 1 *
+bit 562 I 1 IO_F4
+bit 561 O 1 IO_F4 560 1 Z
+bit 560 C 1 *
+bit 559 I 1 IO_E2
+bit 558 O 1 IO_E2 557 1 Z
+bit 557 C 1 *
+bit 556 I 1 IO_E3
+bit 555 O 1 IO_E3 554 1 Z
+bit 554 C 1 *
+bit 553 I 1 IO_D1
+bit 552 O 1 IO_D1 551 1 Z
+bit 551 C 1 *
+bit 550 I 1 IO_D2
+bit 549 O 1 IO_D2 548 1 Z
+bit 548 C 1 *
+bit 547 I 1 IO_C1
+bit 546 O 1 IO_C1 545 1 Z
+bit 545 C 1 *
+bit 544 I 1 IO_C2
+bit 543 O 1 IO_C2 542 1 Z
+bit 542 C 1 *
+bit 541 O 1 *
+bit 540 I 1 HSWAP_EN_L11
+bit 539 I 1 IO_D5
+bit 538 O 1 IO_D5 537 1 Z
+bit 537 C 1 *
+bit 536 I 1 IO_B3
+bit 535 O 1 IO_B3 534 1 Z
+bit 534 C 1 *
+bit 533 I 1 IO_A3
+bit 532 O 1 IO_A3 531 1 Z
+bit 531 C 1 *
+bit 530 I 1 IO_B4
+bit 529 O 1 IO_B4 528 1 Z
+bit 528 C 1 *
+bit 527 I 1 IO_A4
+bit 526 O 1 IO_A4 525 1 Z
+bit 525 C 1 *
+bit 524 I 1 IO_F6
+bit 523 O 1 IO_F6 522 1 Z
+bit 522 C 1 *
+bit 521 I 1 IO_C5
+bit 520 O 1 IO_C5 519 1 Z
+bit 519 C 1 *
+bit 518 I 1 IO_B5
+bit 517 O 1 IO_B5 516 1 Z
+bit 516 C 1 *
+bit 515 I 1 IO_D6
+bit 514 O 1 IO_D6 513 1 Z
+bit 513 C 1 *
+bit 512 I 1 IO_C6
+bit 511 O 1 IO_C6 510 1 Z
+bit 510 C 1 *
+bit 509 I 1 IO_H8
+bit 508 O 1 IO_H8 507 1 Z
+bit 507 C 1 *
+bit 506 I 1 IO_B6
+bit 505 O 1 IO_B6 504 1 Z
+bit 504 C 1 *
+bit 503 I 1 IO_A6
+bit 502 O 1 IO_A6 501 1 Z
+bit 501 C 1 *
+bit 500 I 1 IO_F7
+bit 499 O 1 IO_F7 498 1 Z
+bit 498 C 1 *
+bit 497 I 1 IO_E7
+bit 496 O 1 IO_E7 495 1 Z
+bit 495 C 1 *
+bit 494 I 1 IO_F8
+bit 493 O 1 IO_F8 492 1 Z
+bit 492 C 1 *
+bit 491 I 1 IO_E8
+bit 490 O 1 IO_E8 489 1 Z
+bit 489 C 1 *
+bit 488 I 1 IO_D8
+bit 487 O 1 IO_D8 486 1 Z
+bit 486 C 1 *
+bit 485 I 1 IO_B8
+bit 484 O 1 IO_B8 483 1 Z
+bit 483 C 1 *
+bit 482 I 1 IO_A8
+bit 481 O 1 IO_A8 480 1 Z
+bit 480 C 1 *
+bit 479 I 1 IO_H9
+bit 478 O 1 IO_H9 477 1 Z
+bit 477 C 1 *
+bit 476 I 1 IO_G9
+bit 475 O 1 IO_G9 474 1 Z
+bit 474 C 1 *
+bit 473 I 1 IO_F9
+bit 472 O 1 IO_F9 471 1 Z
+bit 471 C 1 *
+bit 470 I 1 IO_D9
+bit 469 O 1 IO_D9 468 1 Z
+bit 468 C 1 *
+bit 467 I 1 IO_C9
+bit 466 O 1 IO_C9 465 1 Z
+bit 465 C 1 *
+bit 464 I 1 IO_B9
+bit 463 O 1 IO_B9 462 1 Z
+bit 462 C 1 *
+bit 461 I 1 IO_J10
+bit 460 O 1 IO_J10 459 1 Z
+bit 459 C 1 *
+bit 458 I 1 IO_H10
+bit 457 O 1 IO_H10 456 1 Z
+bit 456 C 1 *
+bit 455 I 1 IO_G10
+bit 454 O 1 IO_G10 453 1 Z
+bit 453 C 1 *
+bit 452 I 1 IO_F10
+bit 451 O 1 IO_F10 450 1 Z
+bit 450 C 1 *
+bit 449 I 1 IO_E10
+bit 448 O 1 IO_E10 447 1 Z
+bit 447 C 1 *
+bit 446 I 1 IO_D10
+bit 445 O 1 IO_D10 444 1 Z
+bit 444 C 1 *
+bit 443 I 1 IO_C10
+bit 442 O 1 IO_C10 441 1 Z
+bit 441 C 1 *
+bit 440 I 1 IO_B10
+bit 439 O 1 IO_B10 438 1 Z
+bit 438 C 1 *
+bit 437 I 1 IO_A10
+bit 436 O 1 IO_A10 435 1 Z
+bit 435 C 1 *
+bit 434 I 1 IO_J11
+bit 433 O 1 IO_J11 432 1 Z
+bit 432 C 1 *
+bit 431 I 1 IO_L12
+bit 430 O 1 IO_L12 429 1 Z
+bit 429 C 1 *
+bit 428 I 1 IO_K12
+bit 427 O 1 IO_K12 426 1 Z
+bit 426 C 1 *
+bit 425 I 1 IO_J12
+bit 424 O 1 IO_J12 423 1 Z
+bit 423 C 1 *
+bit 422 I 1 IO_H12
+bit 421 O 1 IO_H12 420 1 Z
+bit 420 C 1 *
+bit 419 I 1 IO_G12
+bit 418 O 1 IO_G12 417 1 Z
+bit 417 C 1 *
+bit 416 I 1 IO_F12
+bit 415 O 1 IO_F12 414 1 Z
+bit 414 C 1 *
+bit 413 I 1 IO_E12
+bit 412 O 1 IO_E12 411 1 Z
+bit 411 C 1 *
+bit 410 I 1 IO_D12
+bit 409 O 1 IO_D12 408 1 Z
+bit 408 C 1 *
+bit 407 I 1 IO_C12
+bit 406 O 1 IO_C12 405 1 Z
+bit 405 C 1 *
+bit 404 I 1 IO_L13
+bit 403 O 1 IO_L13 402 1 Z
+bit 402 C 1 *
+bit 401 I 1 IO_B12
+bit 400 O 1 IO_B12 399 1 Z
+bit 399 C 1 *
+bit 398 I 1 IO_A12
+bit 397 O 1 IO_A12 396 1 Z
+bit 396 C 1 *
+bit 395 I 1 IO_H13
+bit 394 O 1 IO_H13 393 1 Z
+bit 393 C 1 *
+bit 392 I 1 IO_G13
+bit 391 O 1 IO_G13 390 1 Z
+bit 390 C 1 *
+bit 389 I 1 IO_K13
+bit 388 O 1 IO_K13 387 1 Z
+bit 387 C 1 *
+bit 386 I 1 IO_D13
+bit 385 O 1 IO_D13 384 1 Z
+bit 384 C 1 *
+bit 383 I 1 IO_C13
+bit 382 O 1 IO_C13 381 1 Z
+bit 381 C 1 *
+bit 380 I 1 IO_L14
+bit 379 O 1 IO_L14 378 1 Z
+bit 378 C 1 *
+bit 377 I 1 IO_K14
+bit 376 O 1 IO_K14 375 1 Z
+bit 375 C 1 *
+bit 374 I 1 IO_J14
+bit 373 O 1 IO_J14 372 1 Z
+bit 372 C 1 *
+bit 371 I 1 IO_H14
+bit 370 O 1 IO_H14 369 1 Z
+bit 369 C 1 *
+bit 368 I 1 IO_G14
+bit 367 O 1 IO_G14 366 1 Z
+bit 366 C 1 *
+bit 365 I 1 IO_F14
+bit 364 O 1 IO_F14 363 1 Z
+bit 363 C 1 *
+bit 362 I 1 IO_E14
+bit 361 O 1 IO_E14 360 1 Z
+bit 360 C 1 *
+bit 359 I 1 IO_L15
+bit 358 O 1 IO_L15 357 1 Z
+bit 357 C 1 *
+bit 356 I 1 IO_D14
+bit 355 O 1 IO_D14 354 1 Z
+bit 354 C 1 *
+bit 353 I 1 IO_C14
+bit 352 O 1 IO_C14 351 1 Z
+bit 351 C 1 *
+bit 350 I 1 IO_B14
+bit 349 O 1 IO_B14 348 1 Z
+bit 348 C 1 *
+bit 347 I 1 IO_A14
+bit 346 O 1 IO_A14 345 1 Z
+bit 345 C 1 *
+bit 344 I 1 IO_L16
+bit 343 O 1 IO_L16 342 1 Z
+bit 342 C 1 *
+bit 341 I 1 IO_K15
+bit 340 O 1 IO_K15 339 1 Z
+bit 339 C 1 *
+bit 338 I 1 IO_J15
+bit 337 O 1 IO_J15 336 1 Z
+bit 336 C 1 *
+bit 335 I 1 IO_G15
+bit 334 O 1 IO_G15 333 1 Z
+bit 333 C 1 *
+bit 332 I 1 IO_F15
+bit 331 O 1 IO_F15 330 1 Z
+bit 330 C 1 *
+bit 329 I 1 IO_K16
+bit 328 O 1 IO_K16 327 1 Z
+bit 327 C 1 *
+bit 326 I 1 IO_D15
+bit 325 O 1 IO_D15 324 1 Z
+bit 324 C 1 *
+bit 323 I 1 IO_C15
+bit 322 O 1 IO_C15 321 1 Z
+bit 321 C 1 *
+bit 320 I 1 IO_B15
+bit 319 O 1 IO_B15 318 1 Z
+bit 318 C 1 *
+bit 317 I 1 IO_A15
+bit 316 O 1 IO_A15 315 1 Z
+bit 315 C 1 *
+bit 314 I 1 IO_L17
+bit 313 O 1 IO_L17 312 1 Z
+bit 312 C 1 *
+bit 311 I 1 IO_G16
+bit 310 O 1 IO_G16 309 1 Z
+bit 309 C 1 *
+bit 308 I 1 IO_F16
+bit 307 O 1 IO_F16 306 1 Z
+bit 306 C 1 *
+bit 305 I 1 IO_C16
+bit 304 O 1 IO_C16 303 1 Z
+bit 303 C 1 *
+bit 302 I 1 IO_B16
+bit 301 O 1 IO_B16 300 1 Z
+bit 300 C 1 *
+bit 299 I 1 IO_K17
+bit 298 O 1 IO_K17 297 1 Z
+bit 297 C 1 *
+bit 296 I 1 IO_J17
+bit 295 O 1 IO_J17 294 1 Z
+bit 294 C 1 *
+bit 293 I 1 IO_H17
+bit 292 O 1 IO_H17 291 1 Z
+bit 291 C 1 *
+bit 290 I 1 IO_G17
+bit 289 O 1 IO_G17 288 1 Z
+bit 288 C 1 *
+bit 287 I 1 IO_F17
+bit 286 O 1 IO_F17 285 1 Z
+bit 285 C 1 *
+bit 284 I 1 IO_E17
+bit 283 O 1 IO_E17 282 1 Z
+bit 282 C 1 *
+bit 281 I 1 IO_D17
+bit 280 O 1 IO_D17 279 1 Z
+bit 279 C 1 *
+bit 278 I 1 IO_C17
+bit 277 O 1 IO_C17 276 1 Z
+bit 276 C 1 *
+bit 275 I 1 IO_B17
+bit 274 O 1 IO_B17 273 1 Z
+bit 273 C 1 *
+bit 272 I 1 IO_A17
+bit 271 O 1 IO_A17 270 1 Z
+bit 270 C 1 *
+bit 269 I 1 IO_A18
+bit 268 O 1 IO_A18 267 1 Z
+bit 267 C 1 *
+bit 266 I 1 IO_B18
+bit 265 O 1 IO_B18 264 1 Z
+bit 264 C 1 *
+bit 263 I 1 IO_C18
+bit 262 O 1 IO_C18 261 1 Z
+bit 261 C 1 *
+bit 260 I 1 IO_D18
+bit 259 O 1 IO_D18 258 1 Z
+bit 258 C 1 *
+bit 257 I 1 IO_E18
+bit 256 O 1 IO_E18 255 1 Z
+bit 255 C 1 *
+bit 254 I 1 IO_F18
+bit 253 O 1 IO_F18 252 1 Z
+bit 252 C 1 *
+bit 251 I 1 IO_G18
+bit 250 O 1 IO_G18 249 1 Z
+bit 249 C 1 *
+bit 248 I 1 IO_H18
+bit 247 O 1 IO_H18 246 1 Z
+bit 246 C 1 *
+bit 245 I 1 IO_J18
+bit 244 O 1 IO_J18 243 1 Z
+bit 243 C 1 *
+bit 242 I 1 IO_K18
+bit 241 O 1 IO_K18 240 1 Z
+bit 240 C 1 *
+bit 239 I 1 IO_L18
+bit 238 O 1 IO_L18 237 1 Z
+bit 237 C 1 *
+bit 236 I 1 IO_B19
+bit 235 O 1 IO_B19 234 1 Z
+bit 234 C 1 *
+bit 233 I 1 IO_C19
+bit 232 O 1 IO_C19 231 1 Z
+bit 231 C 1 *
+bit 230 I 1 IO_F19
+bit 229 O 1 IO_F19 228 1 Z
+bit 228 C 1 *
+bit 227 I 1 IO_G19
+bit 226 O 1 IO_G19 225 1 Z
+bit 225 C 1 *
+bit 224 I 1 IO_K19
+bit 223 O 1 IO_K19 222 1 Z
+bit 222 C 1 *
+bit 221 I 1 IO_A20
+bit 220 O 1 IO_A20 219 1 Z
+bit 219 C 1 *
+bit 218 I 1 IO_B20
+bit 217 O 1 IO_B20 216 1 Z
+bit 216 C 1 *
+bit 215 I 1 IO_C20
+bit 214 O 1 IO_C20 213 1 Z
+bit 213 C 1 *
+bit 212 I 1 IO_D20
+bit 211 O 1 IO_D20 210 1 Z
+bit 210 C 1 *
+bit 209 I 1 IO_L19
+bit 208 O 1 IO_L19 207 1 Z
+bit 207 C 1 *
+bit 206 I 1 IO_F20
+bit 205 O 1 IO_F20 204 1 Z
+bit 204 C 1 *
+bit 203 I 1 IO_G20
+bit 202 O 1 IO_G20 201 1 Z
+bit 201 C 1 *
+bit 200 I 1 IO_J20
+bit 199 O 1 IO_J20 198 1 Z
+bit 198 C 1 *
+bit 197 I 1 IO_K20
+bit 196 O 1 IO_K20 195 1 Z
+bit 195 C 1 *
+bit 194 I 1 IO_L20
+bit 193 O 1 IO_L20 192 1 Z
+bit 192 C 1 *
+bit 191 I 1 IO_A21
+bit 190 O 1 IO_A21 189 1 Z
+bit 189 C 1 *
+bit 188 I 1 IO_B21
+bit 187 O 1 IO_B21 186 1 Z
+bit 186 C 1 *
+bit 185 I 1 IO_C21
+bit 184 O 1 IO_C21 183 1 Z
+bit 183 C 1 *
+bit 182 I 1 IO_D21
+bit 181 O 1 IO_D21 180 1 Z
+bit 180 C 1 *
+bit 179 I 1 IO_E21
+bit 178 O 1 IO_E21 177 1 Z
+bit 177 C 1 *
+bit 176 I 1 IO_F21
+bit 175 O 1 IO_F21 174 1 Z
+bit 174 C 1 *
+bit 173 I 1 IO_G21
+bit 172 O 1 IO_G21 171 1 Z
+bit 171 C 1 *
+bit 170 I 1 IO_H21
+bit 169 O 1 IO_H21 168 1 Z
+bit 168 C 1 *
+bit 167 I 1 IO_J21
+bit 166 O 1 IO_J21 165 1 Z
+bit 165 C 1 *
+bit 164 I 1 IO_K21
+bit 163 O 1 IO_K21 162 1 Z
+bit 162 C 1 *
+bit 161 I 1 IO_C22
+bit 160 O 1 IO_C22 159 1 Z
+bit 159 C 1 *
+bit 158 I 1 IO_D22
+bit 157 O 1 IO_D22 156 1 Z
+bit 156 C 1 *
+bit 155 I 1 IO_G22
+bit 154 O 1 IO_G22 153 1 Z
+bit 153 C 1 *
+bit 152 I 1 IO_H22
+bit 151 O 1 IO_H22 150 1 Z
+bit 150 C 1 *
+bit 149 I 1 IO_L21
+bit 148 O 1 IO_L21 147 1 Z
+bit 147 C 1 *
+bit 146 I 1 IO_K22
+bit 145 O 1 IO_K22 144 1 Z
+bit 144 C 1 *
+bit 143 I 1 IO_L22
+bit 142 O 1 IO_L22 141 1 Z
+bit 141 C 1 *
+bit 140 I 1 IO_A23
+bit 139 O 1 IO_A23 138 1 Z
+bit 138 C 1 *
+bit 137 I 1 IO_B23
+bit 136 O 1 IO_B23 135 1 Z
+bit 135 C 1 *
+bit 134 I 1 IO_C23
+bit 133 O 1 IO_C23 132 1 Z
+bit 132 C 1 *
+bit 131 I 1 IO_D23
+bit 130 O 1 IO_D23 129 1 Z
+bit 129 C 1 *
+bit 128 I 1 IO_E23
+bit 127 O 1 IO_E23 126 1 Z
+bit 126 C 1 *
+bit 125 I 1 IO_F23
+bit 124 O 1 IO_F23 123 1 Z
+bit 123 C 1 *
+bit 122 I 1 IO_G23
+bit 121 O 1 IO_G23 120 1 Z
+bit 120 C 1 *
+bit 119 I 1 IO_H23
+bit 118 O 1 IO_H23 117 1 Z
+bit 117 C 1 *
+bit 116 I 1 IO_J23
+bit 115 O 1 IO_J23 114 1 Z
+bit 114 C 1 *
+bit 113 I 1 IO_K23
+bit 112 O 1 IO_K23 111 1 Z
+bit 111 C 1 *
+bit 110 I 1 IO_A24
+bit 109 O 1 IO_A24 108 1 Z
+bit 108 C 1 *
+bit 107 I 1 IO_B24
+bit 106 O 1 IO_B24 105 1 Z
+bit 105 C 1 *
+bit 104 I 1 IO_L24
+bit 103 O 1 IO_L24 102 1 Z
+bit 102 C 1 *
+bit 101 I 1 IO_A25
+bit 100 O 1 IO_A25 99 1 Z
+bit 99 C 1 *
+bit 98 I 1 IO_B25
+bit 97 O 1 IO_B25 96 1 Z
+bit 96 C 1 *
+bit 95 I 1 IO_C25
+bit 94 O 1 IO_C25 93 1 Z
+bit 93 C 1 *
+bit 92 I 1 IO_D25
+bit 91 O 1 IO_D25 90 1 Z
+bit 90 C 1 *
+bit 89 I 1 IO_E25
+bit 88 O 1 IO_E25 87 1 Z
+bit 87 C 1 *
+bit 86 I 1 IO_F25
+bit 85 O 1 IO_F25 84 1 Z
+bit 84 C 1 *
+bit 83 I 1 IO_G25
+bit 82 O 1 IO_G25 81 1 Z
+bit 81 C 1 *
+bit 80 I 1 IO_H25
+bit 79 O 1 IO_H25 78 1 Z
+bit 78 C 1 *
+bit 77 I 1 IO_J25
+bit 76 O 1 IO_J25 75 1 Z
+bit 75 C 1 *
+bit 74 I 1 IO_B26
+bit 73 O 1 IO_B26 72 1 Z
+bit 72 C 1 *
+bit 71 I 1 IO_C26
+bit 70 O 1 IO_C26 69 1 Z
+bit 69 C 1 *
+bit 68 I 1 IO_D26
+bit 67 O 1 IO_D26 66 1 Z
+bit 66 C 1 *
+bit 65 I 1 IO_F26
+bit 64 O 1 IO_F26 63 1 Z
+bit 63 C 1 *
+bit 62 I 1 IO_G26
+bit 61 O 1 IO_G26 60 1 Z
+bit 60 C 1 *
+bit 59 I 1 IO_H26
+bit 58 O 1 IO_H26 57 1 Z
+bit 57 C 1 *
+bit 56 I 1 IO_A27
+bit 55 O 1 IO_A27 54 1 Z
+bit 54 C 1 *
+bit 53 I 1 IO_B27
+bit 52 O 1 IO_B27 51 1 Z
+bit 51 C 1 *
+bit 50 I 1 IO_D27
+bit 49 O 1 IO_D27 48 1 Z
+bit 48 C 1 *
+bit 47 I 1 IO_E27
+bit 46 O 1 IO_E27 45 1 Z
+bit 45 C 1 *
+bit 44 I 1 IO_F27
+bit 43 O 1 IO_F27 42 1 Z
+bit 42 C 1 *
+bit 41 I 1 IO_E28
+bit 40 O 1 IO_E28 39 1 Z
+bit 39 C 1 *
+bit 38 I 1 IO_F28
+bit 37 O 1 IO_F28 36 1 Z
+bit 36 C 1 *
+bit 35 I 1 IO_A29
+bit 34 O 1 IO_A29 33 1 Z
+bit 33 C 1 *
+bit 32 I 1 IO_B29
+bit 31 O 1 IO_B29 30 1 Z
+bit 30 C 1 *
+bit 29 I 1 IO_F29
+bit 28 O 1 IO_F29 27 1 Z
+bit 27 C 1 *
+bit 26 I 1 IO_C29
+bit 25 O 1 IO_C29 24 1 Z
+bit 24 C 1 *
+bit 23 I 1 IO_D29
+bit 22 O 1 IO_D29 21 1 Z
+bit 21 C 1 *
+bit 20 I 1 IO_B30
+bit 19 O 1 IO_B30 18 1 Z
+bit 18 C 1 *
+bit 17 I 1 IO_C30
+bit 16 O 1 IO_C30 15 1 Z
+bit 15 C 1 *
+bit 14 I 1 IO_D30
+bit 13 O 1 IO_D30 12 1 Z
+bit 12 C 1 *
+bit 11 I 1 IO_A31
+bit 10 O 1 IO_A31 9 1 Z
+bit 9 C 1 *
+bit 8 I 1 IO_B31
+bit 7 O 1 IO_B31 6 1 Z
+bit 6 C 1 *
+bit 5 I 1 IO_A32
+bit 4 O 1 IO_A32 3 1 Z
+bit 3 C 1 *
+bit 2 I 1 IO_B32
+bit 1 O 1 IO_B32 0 1 Z
+bit 0 C 1 *
--- /dev/null
+signal GND1
+signal GND2
+signal GND3
+signal GND4
+signal GND5
+signal GND6
+signal GND7
+signal GND8
+signal GND9
+signal GND10
+signal GND11
+signal GND12
+signal GND13
+signal GND14
+signal GND15
+signal GND16
+signal GND17
+signal GND18
+signal GND19
+signal GND20
+signal GND21
+signal GND22
+signal GND23
+signal GND24
+signal GND25
+signal GND26
+signal GND27
+signal GND28
+signal GND29
+signal GND30
+signal GND31
+signal GND32
+signal GND33
+signal GND34
+signal GND35
+signal GND36
+signal GND37
+signal GND38
+signal GND39
+signal GND40
+signal GND41
+signal GND42
+signal GND43
+signal GND44
+signal GND45
+signal GND46
+signal GND47
+signal GND48
+signal GND49
+signal GND50
+signal GND51
+signal GND52
+signal GND53
+signal GND54
+signal GND55
+signal GND56
+signal GND57
+signal GND58
+signal GND59
+signal GND60
+signal GND61
+signal GND62
+signal GND63
+signal GND64
+signal GND65
+signal GND66
+signal GND67
+signal GND68
+signal GND69
+signal GND70
+signal GND71
+signal GND72
+signal GND73
+signal GND74
+signal GND75
+signal GND76
+signal GND77
+signal GND78
+signal GND79
+signal GND80
+signal GND81
+signal GND82
+signal GND83
+signal GND84
+signal GND85
+signal GND86
+signal GND87
+signal GND88
+signal GND89
+signal GND90
+signal GND91
+signal GND92
+signal GND93
+signal GND94
+signal GND95
+signal GND96
+signal GND97
+signal GND98
+signal GND99
+signal GND100
+signal GND101
+signal GND102
+signal GND103
+signal GND104
+signal GND105
+signal GND106
+signal GND107
+signal GND108
+signal GND109
+signal GND110
+signal GND111
+signal GND112
+signal GND113
+signal GND114
+signal GND115
+signal GND116
+signal GND117
+signal GND118
+signal GND119
+signal GND120
+signal CCLK_AH28
+signal DONE_AJ28
+signal HSWAP_EN_A3
+signal M0_AJ3
+signal M1_AH3
+signal M2_AK3
+signal PROG_B
+signal TCK
+signal TDI
+signal TDO
+signal TMS
+signal VCCAUX1
+signal VCCAUX2
+signal VCCAUX3
+signal VCCAUX4
+signal VCCAUX5
+signal VCCAUX6
+signal VCCAUX7
+signal VCCAUX8
+signal VCCAUX9
+signal VCCAUX10
+signal VCCAUX11
+signal VCCAUX12
+signal VCCAUX13
+signal VCCAUX14
+signal VCCAUX15
+signal VCCAUX16
+signal VCCAUX17
+signal VCCAUX18
+signal VCCAUX19
+signal VCCAUX20
+signal VCCAUX21
+signal VCCAUX22
+signal VCCAUX23
+signal VCCAUX24
+signal VCCINT1
+signal VCCINT2
+signal VCCINT3
+signal VCCINT4
+signal VCCINT5
+signal VCCINT6
+signal VCCINT7
+signal VCCINT8
+signal VCCINT9
+signal VCCINT10
+signal VCCINT11
+signal VCCINT12
+signal VCCINT13
+signal VCCINT14
+signal VCCINT15
+signal VCCINT16
+signal VCCINT17
+signal VCCINT18
+signal VCCINT19
+signal VCCINT20
+signal VCCINT21
+signal VCCINT22
+signal VCCINT23
+signal VCCINT24
+signal VCCINT25
+signal VCCINT26
+signal VCCINT27
+signal VCCINT28
+signal VCCINT29
+signal VCCINT30
+signal VCCINT31
+signal VCCINT32
+signal VCCO01
+signal VCCO02
+signal VCCO03
+signal VCCO04
+signal VCCO05
+signal VCCO06
+signal VCCO07
+signal VCCO08
+signal VCCO09
+signal VCCO010
+signal VCCO11
+signal VCCO12
+signal VCCO13
+signal VCCO14
+signal VCCO15
+signal VCCO16
+signal VCCO17
+signal VCCO18
+signal VCCO19
+signal VCCO110
+signal VCCO21
+signal VCCO22
+signal VCCO23
+signal VCCO24
+signal VCCO25
+signal VCCO26
+signal VCCO27
+signal VCCO28
+signal VCCO29
+signal VCCO210
+signal VCCO31
+signal VCCO32
+signal VCCO33
+signal VCCO34
+signal VCCO35
+signal VCCO36
+signal VCCO37
+signal VCCO38
+signal VCCO39
+signal VCCO310
+signal VCCO41
+signal VCCO42
+signal VCCO43
+signal VCCO44
+signal VCCO45
+signal VCCO46
+signal VCCO47
+signal VCCO48
+signal VCCO49
+signal VCCO410
+signal VCCO51
+signal VCCO52
+signal VCCO53
+signal VCCO54
+signal VCCO55
+signal VCCO56
+signal VCCO57
+signal VCCO58
+signal VCCO59
+signal VCCO510
+signal VCCO61
+signal VCCO62
+signal VCCO63
+signal VCCO64
+signal VCCO65
+signal VCCO66
+signal VCCO67
+signal VCCO68
+signal VCCO69
+signal VCCO610
+signal VCCO71
+signal VCCO72
+signal VCCO73
+signal VCCO74
+signal VCCO75
+signal VCCO76
+signal VCCO77
+signal VCCO78
+signal VCCO79
+signal VCCO710
+signal IO_A4
+signal IO_A5
+signal IO_A7
+signal IO_A8
+signal IO_A9
+signal IO_A11
+signal IO_A12
+signal IO_A13
+signal IO_A15
+signal IO_A16
+signal IO_A18
+signal IO_A19
+signal IO_A20
+signal IO_A22
+signal IO_A23
+signal IO_A24
+signal IO_A26
+signal IO_A27
+signal IO_B4
+signal IO_B5
+signal IO_B6
+signal IO_B7
+signal IO_B8
+signal IO_B9
+signal IO_B10
+signal IO_B11
+signal IO_B12
+signal IO_B13
+signal IO_B14
+signal IO_B15
+signal IO_B16
+signal IO_B17
+signal IO_B18
+signal IO_B19
+signal IO_B20
+signal IO_B21
+signal IO_B22
+signal IO_B23
+signal IO_B24
+signal IO_B25
+signal IO_B26
+signal IO_B27
+signal IO_C1
+signal IO_C2
+signal IO_C4
+signal IO_C6
+signal IO_C7
+signal IO_C8
+signal IO_C10
+signal IO_C11
+signal IO_C12
+signal IO_C14
+signal IO_C15
+signal IO_C16
+signal IO_C17
+signal IO_C19
+signal IO_C20
+signal IO_C21
+signal IO_C23
+signal IO_C24
+signal IO_C25
+signal IO_C27
+signal IO_C29
+signal IO_C30
+signal IO_D1
+signal IO_D2
+signal IO_D3
+signal IO_D4
+signal IO_D5
+signal IO_D7
+signal IO_D8
+signal IO_D9
+signal IO_D11
+signal IO_D12
+signal IO_D13
+signal IO_D15
+signal IO_D16
+signal IO_D18
+signal IO_D19
+signal IO_D20
+signal IO_D22
+signal IO_D23
+signal IO_D24
+signal IO_D26
+signal IO_D27
+signal IO_D28
+signal IO_D29
+signal IO_D30
+signal IO_E1
+signal IO_E2
+signal IO_E4
+signal IO_E6
+signal IO_E8
+signal IO_E9
+signal IO_E11
+signal IO_E12
+signal IO_E13
+signal IO_E15
+signal IO_E16
+signal IO_E18
+signal IO_E19
+signal IO_E20
+signal IO_E22
+signal IO_E23
+signal IO_E25
+signal IO_E27
+signal IO_E29
+signal IO_E30
+signal IO_F2
+signal IO_F3
+signal IO_F5
+signal IO_F6
+signal IO_F7
+signal IO_F8
+signal IO_F9
+signal IO_F10
+signal IO_F11
+signal IO_F12
+signal IO_F13
+signal IO_F14
+signal IO_F15
+signal IO_F16
+signal IO_F17
+signal IO_F18
+signal IO_F19
+signal IO_F20
+signal IO_F21
+signal IO_F22
+signal IO_F23
+signal IO_F24
+signal IO_F25
+signal IO_F26
+signal IO_F28
+signal IO_F29
+signal IO_G1
+signal IO_G2
+signal IO_G3
+signal IO_G4
+signal IO_G6
+signal IO_G7
+signal IO_G8
+signal IO_G10
+signal IO_G11
+signal IO_G12
+signal IO_G14
+signal IO_G15
+signal IO_G16
+signal IO_G17
+signal IO_G19
+signal IO_G20
+signal IO_G21
+signal IO_G23
+signal IO_G24
+signal IO_G25
+signal IO_G27
+signal IO_G28
+signal IO_G29
+signal IO_G30
+signal IO_H1
+signal IO_H2
+signal IO_H3
+signal IO_H4
+signal IO_H5
+signal IO_H6
+signal IO_H7
+signal IO_H8
+signal IO_H9
+signal IO_H11
+signal IO_H12
+signal IO_H13
+signal IO_H15
+signal IO_H16
+signal IO_H18
+signal IO_H19
+signal IO_H20
+signal IO_H22
+signal IO_H23
+signal IO_H24
+signal IO_H25
+signal IO_H26
+signal IO_H27
+signal IO_H28
+signal IO_H29
+signal IO_H30
+signal IO_J1
+signal IO_J2
+signal IO_J4
+signal IO_J5
+signal IO_J6
+signal IO_J8
+signal IO_J9
+signal IO_J10
+signal IO_J12
+signal IO_J13
+signal IO_J14
+signal IO_J15
+signal IO_J16
+signal IO_J17
+signal IO_J18
+signal IO_J19
+signal IO_J21
+signal IO_J22
+signal IO_J23
+signal IO_J25
+signal IO_J26
+signal IO_J27
+signal IO_J29
+signal IO_J30
+signal IO_K2
+signal IO_K3
+signal IO_K6
+signal IO_K7
+signal IO_K9
+signal IO_K10
+signal IO_K11
+signal IO_K12
+signal IO_K13
+signal IO_K14
+signal IO_K15
+signal IO_K16
+signal IO_K17
+signal IO_K18
+signal IO_K19
+signal IO_K20
+signal IO_K21
+signal IO_K22
+signal IO_K24
+signal IO_K25
+signal IO_K28
+signal IO_K29
+signal IO_L1
+signal IO_L2
+signal IO_L3
+signal IO_L4
+signal IO_L5
+signal IO_L6
+signal IO_L7
+signal IO_L8
+signal IO_L10
+signal IO_L21
+signal IO_L23
+signal IO_L24
+signal IO_L25
+signal IO_L26
+signal IO_L27
+signal IO_L28
+signal IO_L29
+signal IO_L30
+signal IO_M1
+signal IO_M2
+signal IO_M3
+signal IO_M4
+signal IO_M5
+signal IO_M6
+signal IO_M7
+signal IO_M8
+signal IO_M9
+signal IO_M10
+signal IO_M21
+signal IO_M22
+signal IO_M23
+signal IO_M24
+signal IO_M25
+signal IO_M26
+signal IO_M27
+signal IO_M28
+signal IO_M29
+signal IO_M30
+signal IO_N1
+signal IO_N2
+signal IO_N4
+signal IO_N5
+signal IO_N6
+signal IO_N8
+signal IO_N9
+signal IO_N10
+signal IO_N21
+signal IO_N22
+signal IO_N23
+signal IO_N25
+signal IO_N26
+signal IO_N27
+signal IO_N29
+signal IO_N30
+signal IO_P2
+signal IO_P3
+signal IO_P6
+signal IO_P7
+signal IO_P9
+signal IO_P10
+signal IO_P21
+signal IO_P22
+signal IO_P24
+signal IO_P25
+signal IO_P28
+signal IO_P29
+signal IO_R1
+signal IO_R2
+signal IO_R3
+signal IO_R4
+signal IO_R5
+signal IO_R6
+signal IO_R7
+signal IO_R8
+signal IO_R9
+signal IO_R10
+signal IO_R21
+signal IO_R22
+signal IO_R23
+signal IO_R24
+signal IO_R25
+signal IO_R26
+signal IO_R27
+signal IO_R28
+signal IO_R29
+signal IO_R30
+signal IO_T1
+signal IO_T2
+signal IO_T3
+signal IO_T4
+signal IO_T5
+signal IO_T6
+signal IO_T7
+signal IO_T8
+signal IO_T9
+signal IO_T10
+signal IO_T21
+signal IO_T22
+signal IO_T23
+signal IO_T24
+signal IO_T25
+signal IO_T26
+signal IO_T27
+signal IO_T28
+signal IO_T29
+signal IO_T30
+signal IO_U2
+signal IO_U3
+signal IO_U6
+signal IO_U7
+signal IO_U9
+signal IO_U10
+signal IO_U21
+signal IO_U22
+signal IO_U24
+signal IO_U25
+signal IO_U28
+signal IO_U29
+signal IO_V1
+signal IO_V2
+signal IO_V4
+signal IO_V5
+signal IO_V6
+signal IO_V8
+signal IO_V9
+signal IO_V10
+signal IO_V21
+signal IO_V22
+signal IO_V23
+signal IO_V25
+signal IO_V26
+signal IO_V27
+signal IO_V29
+signal IO_V30
+signal IO_W1
+signal IO_W2
+signal IO_W3
+signal IO_W4
+signal IO_W5
+signal IO_W6
+signal IO_W7
+signal IO_W8
+signal IO_W9
+signal IO_W10
+signal IO_W21
+signal IO_W22
+signal IO_W23
+signal IO_W24
+signal IO_W25
+signal IO_W26
+signal IO_W27
+signal IO_W28
+signal IO_W29
+signal IO_W30
+signal IO_Y1
+signal IO_Y2
+signal IO_Y3
+signal IO_Y4
+signal IO_Y5
+signal IO_Y6
+signal IO_Y7
+signal IO_Y8
+signal IO_Y10
+signal IO_Y21
+signal IO_Y23
+signal IO_Y24
+signal IO_Y25
+signal IO_Y26
+signal IO_Y27
+signal IO_Y28
+signal IO_Y29
+signal IO_Y30
+signal IO_AA2
+signal IO_AA3
+signal IO_AA6
+signal IO_AA7
+signal IO_AA9
+signal IO_AA10
+signal IO_AA11
+signal IO_AA12
+signal IO_AA13
+signal IO_AA14
+signal IO_AA15
+signal IO_AA16
+signal IO_AA17
+signal IO_AA18
+signal IO_AA19
+signal IO_AA20
+signal IO_AA21
+signal IO_AA22
+signal IO_AA24
+signal IO_AA25
+signal IO_AA28
+signal IO_AA29
+signal IO_AB1
+signal IO_AB2
+signal IO_AB4
+signal IO_AB5
+signal IO_AB6
+signal IO_AB8
+signal IO_AB9
+signal IO_AB10
+signal IO_AB12
+signal IO_AB13
+signal IO_AB14
+signal IO_AB15
+signal IO_AB16
+signal IO_AB17
+signal IO_AB18
+signal IO_AB19
+signal IO_AB21
+signal IO_AB22
+signal IO_AB23
+signal IO_AB25
+signal IO_AB26
+signal IO_AB27
+signal IO_AB29
+signal IO_AB30
+signal IO_AC1
+signal IO_AC2
+signal IO_AC3
+signal IO_AC4
+signal IO_AC5
+signal IO_AC6
+signal IO_AC7
+signal IO_AC8
+signal IO_AC9
+signal IO_AC11
+signal IO_AC12
+signal IO_AC13
+signal IO_AC15
+signal IO_AC16
+signal IO_AC18
+signal IO_AC19
+signal IO_AC20
+signal IO_AC22
+signal IO_AC23
+signal IO_AC24
+signal IO_AC25
+signal IO_AC26
+signal IO_AC27
+signal IO_AC28
+signal IO_AC29
+signal IO_AC30
+signal IO_AD1
+signal IO_AD2
+signal IO_AD3
+signal IO_AD4
+signal IO_AD6
+signal IO_AD7
+signal IO_AD8
+signal IO_AD10
+signal IO_AD11
+signal IO_AD12
+signal IO_AD14
+signal IO_AD15
+signal IO_AD16
+signal IO_AD17
+signal IO_AD19
+signal IO_AD20
+signal IO_AD21
+signal IO_AD23
+signal IO_AD24
+signal IO_AD25
+signal IO_AD27
+signal IO_AD28
+signal IO_AD29
+signal IO_AD30
+signal IO_AE2
+signal IO_AE3
+signal IO_AE5
+signal IO_AE6
+signal IO_AE7
+signal IO_AE8
+signal IO_AE9
+signal IO_AE10
+signal IO_AE11
+signal IO_AE12
+signal IO_AE13
+signal IO_AE14
+signal IO_AE15
+signal IO_AE16
+signal IO_AE17
+signal IO_AE18
+signal IO_AE19
+signal IO_AE20
+signal IO_AE21
+signal IO_AE22
+signal IO_AE23
+signal IO_AE24
+signal IO_AE25
+signal IO_AE26
+signal IO_AE28
+signal IO_AE29
+signal IO_AF1
+signal IO_AF2
+signal IO_AF4
+signal IO_AF6
+signal IO_AF8
+signal IO_AF9
+signal IO_AF11
+signal IO_AF12
+signal IO_AF13
+signal IO_AF15
+signal IO_AF16
+signal IO_AF18
+signal IO_AF19
+signal IO_AF20
+signal IO_AF22
+signal IO_AF23
+signal IO_AF25
+signal IO_AF27
+signal IO_AF29
+signal IO_AF30
+signal IO_AG1
+signal IO_AG2
+signal IO_AG3
+signal IO_AG4
+signal IO_AG5
+signal IO_AG7
+signal IO_AG8
+signal IO_AG9
+signal IO_AG11
+signal IO_AG12
+signal IO_AG13
+signal IO_AG15
+signal IO_AG16
+signal IO_AG18
+signal IO_AG19
+signal IO_AG20
+signal IO_AG22
+signal IO_AG23
+signal IO_AG24
+signal IO_AG26
+signal IO_AG27
+signal IO_AG28
+signal IO_AG29
+signal IO_AG30
+signal IO_AH1
+signal IO_AH2
+signal IO_AH4
+signal IO_AH6
+signal IO_AH7
+signal IO_AH8
+signal IO_AH10
+signal IO_AH11
+signal IO_AH12
+signal IO_AH14
+signal IO_AH15
+signal IO_AH16
+signal IO_AH17
+signal IO_AH19
+signal IO_AH20
+signal IO_AH21
+signal IO_AH23
+signal IO_AH24
+signal IO_AH25
+signal IO_AH27
+signal IO_AH29
+signal IO_AH30
+signal IO_AJ4
+signal IO_AJ5
+signal IO_AJ6
+signal IO_AJ7
+signal IO_AJ8
+signal IO_AJ9
+signal IO_AJ10
+signal IO_AJ11
+signal IO_AJ12
+signal IO_AJ13
+signal IO_AJ14
+signal IO_AJ15
+signal IO_AJ16
+signal IO_AJ17
+signal IO_AJ18
+signal IO_AJ19
+signal IO_AJ20
+signal IO_AJ21
+signal IO_AJ22
+signal IO_AJ23
+signal IO_AJ24
+signal IO_AJ25
+signal IO_AJ26
+signal IO_AJ27
+signal IO_AK4
+signal IO_AK5
+signal IO_AK7
+signal IO_AK8
+signal IO_AK9
+signal IO_AK11
+signal IO_AK12
+signal IO_AK13
+signal IO_AK15
+signal IO_AK16
+signal IO_AK18
+signal IO_AK19
+signal IO_AK20
+signal IO_AK22
+signal IO_AK23
+signal IO_AK24
+signal IO_AK26
+signal IO_AK27
+
+register BSR 2243
+register BR 1
+register DIR 32
+
+instruction length 6
+
+instruction EXTEST 000000 BSR
+instruction SAMPLE/PRELOAD 000001 BSR
+instruction IDCODE 001001 DIR
+instruction BYPASS 111111 BR
+
+bit 2242 I 1 IO_C29
+bit 2241 O 1 IO_C29 2240 1 Z
+bit 2240 C 1 *
+bit 2239 I 1 IO_C30
+bit 2238 O 1 IO_C30 2237 1 Z
+bit 2237 C 1 *
+bit 2236 I 1 IO_D27
+bit 2235 O 1 IO_D27 2234 1 Z
+bit 2234 C 1 *
+bit 2233 I 1 IO_D28
+bit 2232 O 1 IO_D28 2231 1 Z
+bit 2231 C 1 *
+bit 2230 I 1 IO_D29
+bit 2229 O 1 IO_D29 2228 1 Z
+bit 2228 C 1 *
+bit 2227 I 1 IO_D30
+bit 2226 O 1 IO_D30 2225 1 Z
+bit 2225 C 1 *
+bit 2224 I 1 IO_E29
+bit 2223 O 1 IO_E29 2222 1 Z
+bit 2222 C 1 *
+bit 2221 I 1 IO_E30
+bit 2220 O 1 IO_E30 2219 1 Z
+bit 2219 C 1 *
+bit 2218 I 1 IO_E27
+bit 2217 O 1 IO_E27 2216 1 Z
+bit 2216 C 1 *
+bit 2215 I 1 IO_F26
+bit 2214 O 1 IO_F26 2213 1 Z
+bit 2213 C 1 *
+bit 2212 I 1 IO_F28
+bit 2211 O 1 IO_F28 2210 1 Z
+bit 2210 C 1 *
+bit 2209 I 1 IO_F29
+bit 2208 O 1 IO_F29 2207 1 Z
+bit 2207 C 1 *
+bit 2206 O 1 *
+bit 2205 O 1 *
+bit 2204 O 1 *
+bit 2203 O 1 *
+bit 2202 O 1 *
+bit 2201 O 1 *
+bit 2200 O 1 *
+bit 2199 O 1 *
+bit 2198 O 1 *
+bit 2197 O 1 *
+bit 2196 O 1 *
+bit 2195 O 1 *
+bit 2194 I 1 IO_G27
+bit 2193 O 1 IO_G27 2192 1 Z
+bit 2192 C 1 *
+bit 2191 I 1 IO_G28
+bit 2190 O 1 IO_G28 2189 1 Z
+bit 2189 C 1 *
+bit 2188 I 1 IO_G29
+bit 2187 O 1 IO_G29 2186 1 Z
+bit 2186 C 1 *
+bit 2185 I 1 IO_G30
+bit 2184 O 1 IO_G30 2183 1 Z
+bit 2183 C 1 *
+bit 2182 I 1 IO_G25
+bit 2181 O 1 IO_G25 2180 1 Z
+bit 2180 C 1 *
+bit 2179 I 1 IO_H24
+bit 2178 O 1 IO_H24 2177 1 Z
+bit 2177 C 1 *
+bit 2176 I 1 IO_H25
+bit 2175 O 1 IO_H25 2174 1 Z
+bit 2174 C 1 *
+bit 2173 I 1 IO_H26
+bit 2172 O 1 IO_H26 2171 1 Z
+bit 2171 C 1 *
+bit 2170 I 1 IO_H27
+bit 2169 O 1 IO_H27 2168 1 Z
+bit 2168 C 1 *
+bit 2167 I 1 IO_H28
+bit 2166 O 1 IO_H28 2165 1 Z
+bit 2165 C 1 *
+bit 2164 O 1 *
+bit 2163 O 1 *
+bit 2162 O 1 *
+bit 2161 I 1 IO_J25
+bit 2160 O 1 IO_J25 2159 1 Z
+bit 2159 C 1 *
+bit 2158 I 1 IO_H29
+bit 2157 O 1 IO_H29 2156 1 Z
+bit 2156 C 1 *
+bit 2155 I 1 IO_H30
+bit 2154 O 1 IO_H30 2153 1 Z
+bit 2153 C 1 *
+bit 2152 I 1 IO_J26
+bit 2151 O 1 IO_J26 2150 1 Z
+bit 2150 C 1 *
+bit 2149 I 1 IO_J27
+bit 2148 O 1 IO_J27 2147 1 Z
+bit 2147 C 1 *
+bit 2146 I 1 IO_J29
+bit 2145 O 1 IO_J29 2144 1 Z
+bit 2144 C 1 *
+bit 2143 I 1 IO_J30
+bit 2142 O 1 IO_J30 2141 1 Z
+bit 2141 C 1 *
+bit 2140 I 1 IO_J23
+bit 2139 O 1 IO_J23 2138 1 Z
+bit 2138 C 1 *
+bit 2137 I 1 IO_K22
+bit 2136 O 1 IO_K22 2135 1 Z
+bit 2135 C 1 *
+bit 2134 I 1 IO_K24
+bit 2133 O 1 IO_K24 2132 1 Z
+bit 2132 C 1 *
+bit 2131 I 1 IO_K25
+bit 2130 O 1 IO_K25 2129 1 Z
+bit 2129 C 1 *
+bit 2128 O 1 *
+bit 2127 O 1 *
+bit 2126 O 1 *
+bit 2125 O 1 *
+bit 2124 O 1 *
+bit 2123 O 1 *
+bit 2122 I 1 IO_K28
+bit 2121 O 1 IO_K28 2120 1 Z
+bit 2120 C 1 *
+bit 2119 I 1 IO_K29
+bit 2118 O 1 IO_K29 2117 1 Z
+bit 2117 C 1 *
+bit 2116 I 1 IO_K21
+bit 2115 O 1 IO_K21 2114 1 Z
+bit 2114 C 1 *
+bit 2113 I 1 IO_L21
+bit 2112 O 1 IO_L21 2111 1 Z
+bit 2111 C 1 *
+bit 2110 I 1 IO_L23
+bit 2109 O 1 IO_L23 2108 1 Z
+bit 2108 C 1 *
+bit 2107 I 1 IO_L24
+bit 2106 O 1 IO_L24 2105 1 Z
+bit 2105 C 1 *
+bit 2104 I 1 IO_L25
+bit 2103 O 1 IO_L25 2102 1 Z
+bit 2102 C 1 *
+bit 2101 I 1 IO_L26
+bit 2100 O 1 IO_L26 2099 1 Z
+bit 2099 C 1 *
+bit 2098 I 1 IO_L27
+bit 2097 O 1 IO_L27 2096 1 Z
+bit 2096 C 1 *
+bit 2095 I 1 IO_L28
+bit 2094 O 1 IO_L28 2093 1 Z
+bit 2093 C 1 *
+bit 2092 O 1 *
+bit 2091 O 1 *
+bit 2090 O 1 *
+bit 2089 O 1 *
+bit 2088 O 1 *
+bit 2087 O 1 *
+bit 2086 I 1 IO_L29
+bit 2085 O 1 IO_L29 2084 1 Z
+bit 2084 C 1 *
+bit 2083 I 1 IO_L30
+bit 2082 O 1 IO_L30 2081 1 Z
+bit 2081 C 1 *
+bit 2080 I 1 IO_M22
+bit 2079 O 1 IO_M22 2078 1 Z
+bit 2078 C 1 *
+bit 2077 I 1 IO_M23
+bit 2076 O 1 IO_M23 2075 1 Z
+bit 2075 C 1 *
+bit 2074 I 1 IO_M24
+bit 2073 O 1 IO_M24 2072 1 Z
+bit 2072 C 1 *
+bit 2071 I 1 IO_M25
+bit 2070 O 1 IO_M25 2069 1 Z
+bit 2069 C 1 *
+bit 2068 I 1 IO_M27
+bit 2067 O 1 IO_M27 2066 1 Z
+bit 2066 C 1 *
+bit 2065 I 1 IO_M28
+bit 2064 O 1 IO_M28 2063 1 Z
+bit 2063 C 1 *
+bit 2062 O 1 *
+bit 2061 O 1 *
+bit 2060 O 1 *
+bit 2059 O 1 *
+bit 2058 O 1 *
+bit 2057 O 1 *
+bit 2056 I 1 IO_M29
+bit 2055 O 1 IO_M29 2054 1 Z
+bit 2054 C 1 *
+bit 2053 I 1 IO_M30
+bit 2052 O 1 IO_M30 2051 1 Z
+bit 2051 C 1 *
+bit 2050 I 1 IO_M21
+bit 2049 O 1 IO_M21 2048 1 Z
+bit 2048 C 1 *
+bit 2047 I 1 IO_N21
+bit 2046 O 1 IO_N21 2045 1 Z
+bit 2045 C 1 *
+bit 2044 I 1 IO_N22
+bit 2043 O 1 IO_N22 2042 1 Z
+bit 2042 C 1 *
+bit 2041 I 1 IO_N23
+bit 2040 O 1 IO_N23 2039 1 Z
+bit 2039 C 1 *
+bit 2038 I 1 IO_M26
+bit 2037 O 1 IO_M26 2036 1 Z
+bit 2036 C 1 *
+bit 2035 I 1 IO_N25
+bit 2034 O 1 IO_N25 2033 1 Z
+bit 2033 C 1 *
+bit 2032 I 1 IO_N26
+bit 2031 O 1 IO_N26 2030 1 Z
+bit 2030 C 1 *
+bit 2029 I 1 IO_N27
+bit 2028 O 1 IO_N27 2027 1 Z
+bit 2027 C 1 *
+bit 2026 O 1 *
+bit 2025 O 1 *
+bit 2024 O 1 *
+bit 2023 O 1 *
+bit 2022 O 1 *
+bit 2021 O 1 *
+bit 2020 I 1 IO_N29
+bit 2019 O 1 IO_N29 2018 1 Z
+bit 2018 C 1 *
+bit 2017 I 1 IO_N30
+bit 2016 O 1 IO_N30 2015 1 Z
+bit 2015 C 1 *
+bit 2014 I 1 IO_P21
+bit 2013 O 1 IO_P21 2012 1 Z
+bit 2012 C 1 *
+bit 2011 I 1 IO_P22
+bit 2010 O 1 IO_P22 2009 1 Z
+bit 2009 C 1 *
+bit 2008 I 1 IO_P24
+bit 2007 O 1 IO_P24 2006 1 Z
+bit 2006 C 1 *
+bit 2005 I 1 IO_P25
+bit 2004 O 1 IO_P25 2003 1 Z
+bit 2003 C 1 *
+bit 2002 I 1 IO_P28
+bit 2001 O 1 IO_P28 2000 1 Z
+bit 2000 C 1 *
+bit 1999 I 1 IO_P29
+bit 1998 O 1 IO_P29 1997 1 Z
+bit 1997 C 1 *
+bit 1996 I 1 IO_R21
+bit 1995 O 1 IO_R21 1994 1 Z
+bit 1994 C 1 *
+bit 1993 I 1 IO_R22
+bit 1992 O 1 IO_R22 1991 1 Z
+bit 1991 C 1 *
+bit 1990 O 1 *
+bit 1989 O 1 *
+bit 1988 O 1 *
+bit 1987 O 1 *
+bit 1986 O 1 *
+bit 1985 O 1 *
+bit 1984 O 1 *
+bit 1983 O 1 *
+bit 1982 O 1 *
+bit 1981 O 1 *
+bit 1980 O 1 *
+bit 1979 O 1 *
+bit 1978 I 1 IO_R23
+bit 1977 O 1 IO_R23 1976 1 Z
+bit 1976 C 1 *
+bit 1975 I 1 IO_R24
+bit 1974 O 1 IO_R24 1973 1 Z
+bit 1973 C 1 *
+bit 1972 I 1 IO_R25
+bit 1971 O 1 IO_R25 1970 1 Z
+bit 1970 C 1 *
+bit 1969 I 1 IO_R26
+bit 1968 O 1 IO_R26 1967 1 Z
+bit 1967 C 1 *
+bit 1966 I 1 IO_R27
+bit 1965 O 1 IO_R27 1964 1 Z
+bit 1964 C 1 *
+bit 1963 I 1 IO_R28
+bit 1962 O 1 IO_R28 1961 1 Z
+bit 1961 C 1 *
+bit 1960 I 1 IO_R29
+bit 1959 O 1 IO_R29 1958 1 Z
+bit 1958 C 1 *
+bit 1957 I 1 IO_R30
+bit 1956 O 1 IO_R30 1955 1 Z
+bit 1955 C 1 *
+bit 1954 I 1 IO_T30
+bit 1953 O 1 IO_T30 1952 1 Z
+bit 1952 C 1 *
+bit 1951 I 1 IO_T29
+bit 1950 O 1 IO_T29 1949 1 Z
+bit 1949 C 1 *
+bit 1948 I 1 IO_T28
+bit 1947 O 1 IO_T28 1946 1 Z
+bit 1946 C 1 *
+bit 1945 I 1 IO_T27
+bit 1944 O 1 IO_T27 1943 1 Z
+bit 1943 C 1 *
+bit 1942 I 1 IO_T26
+bit 1941 O 1 IO_T26 1940 1 Z
+bit 1940 C 1 *
+bit 1939 I 1 IO_T25
+bit 1938 O 1 IO_T25 1937 1 Z
+bit 1937 C 1 *
+bit 1936 I 1 IO_T24
+bit 1935 O 1 IO_T24 1934 1 Z
+bit 1934 C 1 *
+bit 1933 I 1 IO_T23
+bit 1932 O 1 IO_T23 1931 1 Z
+bit 1931 C 1 *
+bit 1930 O 1 *
+bit 1929 O 1 *
+bit 1928 O 1 *
+bit 1927 O 1 *
+bit 1926 O 1 *
+bit 1925 O 1 *
+bit 1924 O 1 *
+bit 1923 O 1 *
+bit 1922 O 1 *
+bit 1921 O 1 *
+bit 1920 O 1 *
+bit 1919 O 1 *
+bit 1918 I 1 IO_T22
+bit 1917 O 1 IO_T22 1916 1 Z
+bit 1916 C 1 *
+bit 1915 I 1 IO_T21
+bit 1914 O 1 IO_T21 1913 1 Z
+bit 1913 C 1 *
+bit 1912 I 1 IO_U29
+bit 1911 O 1 IO_U29 1910 1 Z
+bit 1910 C 1 *
+bit 1909 I 1 IO_U28
+bit 1908 O 1 IO_U28 1907 1 Z
+bit 1907 C 1 *
+bit 1906 I 1 IO_U25
+bit 1905 O 1 IO_U25 1904 1 Z
+bit 1904 C 1 *
+bit 1903 I 1 IO_U24
+bit 1902 O 1 IO_U24 1901 1 Z
+bit 1901 C 1 *
+bit 1900 I 1 IO_U22
+bit 1899 O 1 IO_U22 1898 1 Z
+bit 1898 C 1 *
+bit 1897 I 1 IO_U21
+bit 1896 O 1 IO_U21 1895 1 Z
+bit 1895 C 1 *
+bit 1894 I 1 IO_V30
+bit 1893 O 1 IO_V30 1892 1 Z
+bit 1892 C 1 *
+bit 1891 I 1 IO_V29
+bit 1890 O 1 IO_V29 1889 1 Z
+bit 1889 C 1 *
+bit 1888 O 1 *
+bit 1887 O 1 *
+bit 1886 O 1 *
+bit 1885 O 1 *
+bit 1884 O 1 *
+bit 1883 O 1 *
+bit 1882 I 1 IO_V27
+bit 1881 O 1 IO_V27 1880 1 Z
+bit 1880 C 1 *
+bit 1879 I 1 IO_V26
+bit 1878 O 1 IO_V26 1877 1 Z
+bit 1877 C 1 *
+bit 1876 I 1 IO_V25
+bit 1875 O 1 IO_V25 1874 1 Z
+bit 1874 C 1 *
+bit 1873 I 1 IO_W26
+bit 1872 O 1 IO_W26 1871 1 Z
+bit 1871 C 1 *
+bit 1870 I 1 IO_V23
+bit 1869 O 1 IO_V23 1868 1 Z
+bit 1868 C 1 *
+bit 1867 I 1 IO_V22
+bit 1866 O 1 IO_V22 1865 1 Z
+bit 1865 C 1 *
+bit 1864 I 1 IO_V21
+bit 1863 O 1 IO_V21 1862 1 Z
+bit 1862 C 1 *
+bit 1861 I 1 IO_W21
+bit 1860 O 1 IO_W21 1859 1 Z
+bit 1859 C 1 *
+bit 1858 I 1 IO_W30
+bit 1857 O 1 IO_W30 1856 1 Z
+bit 1856 C 1 *
+bit 1855 I 1 IO_W29
+bit 1854 O 1 IO_W29 1853 1 Z
+bit 1853 C 1 *
+bit 1852 O 1 *
+bit 1851 O 1 *
+bit 1850 O 1 *
+bit 1849 O 1 *
+bit 1848 O 1 *
+bit 1847 O 1 *
+bit 1846 I 1 IO_W28
+bit 1845 O 1 IO_W28 1844 1 Z
+bit 1844 C 1 *
+bit 1843 I 1 IO_W27
+bit 1842 O 1 IO_W27 1841 1 Z
+bit 1841 C 1 *
+bit 1840 I 1 IO_W25
+bit 1839 O 1 IO_W25 1838 1 Z
+bit 1838 C 1 *
+bit 1837 I 1 IO_W24
+bit 1836 O 1 IO_W24 1835 1 Z
+bit 1835 C 1 *
+bit 1834 I 1 IO_W23
+bit 1833 O 1 IO_W23 1832 1 Z
+bit 1832 C 1 *
+bit 1831 I 1 IO_W22
+bit 1830 O 1 IO_W22 1829 1 Z
+bit 1829 C 1 *
+bit 1828 I 1 IO_Y30
+bit 1827 O 1 IO_Y30 1826 1 Z
+bit 1826 C 1 *
+bit 1825 I 1 IO_Y29
+bit 1824 O 1 IO_Y29 1823 1 Z
+bit 1823 C 1 *
+bit 1822 O 1 *
+bit 1821 O 1 *
+bit 1820 O 1 *
+bit 1819 O 1 *
+bit 1818 O 1 *
+bit 1817 O 1 *
+bit 1816 I 1 IO_Y28
+bit 1815 O 1 IO_Y28 1814 1 Z
+bit 1814 C 1 *
+bit 1813 I 1 IO_Y27
+bit 1812 O 1 IO_Y27 1811 1 Z
+bit 1811 C 1 *
+bit 1810 I 1 IO_Y26
+bit 1809 O 1 IO_Y26 1808 1 Z
+bit 1808 C 1 *
+bit 1807 I 1 IO_Y25
+bit 1806 O 1 IO_Y25 1805 1 Z
+bit 1805 C 1 *
+bit 1804 I 1 IO_Y24
+bit 1803 O 1 IO_Y24 1802 1 Z
+bit 1802 C 1 *
+bit 1801 I 1 IO_Y23
+bit 1800 O 1 IO_Y23 1799 1 Z
+bit 1799 C 1 *
+bit 1798 I 1 IO_Y21
+bit 1797 O 1 IO_Y21 1796 1 Z
+bit 1796 C 1 *
+bit 1795 I 1 IO_AA21
+bit 1794 O 1 IO_AA21 1793 1 Z
+bit 1793 C 1 *
+bit 1792 I 1 IO_AA29
+bit 1791 O 1 IO_AA29 1790 1 Z
+bit 1790 C 1 *
+bit 1789 I 1 IO_AA28
+bit 1788 O 1 IO_AA28 1787 1 Z
+bit 1787 C 1 *
+bit 1786 O 1 *
+bit 1785 O 1 *
+bit 1784 O 1 *
+bit 1783 O 1 *
+bit 1782 O 1 *
+bit 1781 O 1 *
+bit 1780 I 1 IO_AA25
+bit 1779 O 1 IO_AA25 1778 1 Z
+bit 1778 C 1 *
+bit 1777 I 1 IO_AA24
+bit 1776 O 1 IO_AA24 1775 1 Z
+bit 1775 C 1 *
+bit 1774 I 1 IO_AA22
+bit 1773 O 1 IO_AA22 1772 1 Z
+bit 1772 C 1 *
+bit 1771 I 1 IO_AB23
+bit 1770 O 1 IO_AB23 1769 1 Z
+bit 1769 C 1 *
+bit 1768 I 1 IO_AB30
+bit 1767 O 1 IO_AB30 1766 1 Z
+bit 1766 C 1 *
+bit 1765 I 1 IO_AB29
+bit 1764 O 1 IO_AB29 1763 1 Z
+bit 1763 C 1 *
+bit 1762 I 1 IO_AB27
+bit 1761 O 1 IO_AB27 1760 1 Z
+bit 1760 C 1 *
+bit 1759 I 1 IO_AB26
+bit 1758 O 1 IO_AB26 1757 1 Z
+bit 1757 C 1 *
+bit 1756 I 1 IO_AC30
+bit 1755 O 1 IO_AC30 1754 1 Z
+bit 1754 C 1 *
+bit 1753 I 1 IO_AC29
+bit 1752 O 1 IO_AC29 1751 1 Z
+bit 1751 C 1 *
+bit 1750 I 1 IO_AB25
+bit 1749 O 1 IO_AB25 1748 1 Z
+bit 1748 C 1 *
+bit 1747 O 1 *
+bit 1746 O 1 *
+bit 1745 O 1 *
+bit 1744 I 1 IO_AC28
+bit 1743 O 1 IO_AC28 1742 1 Z
+bit 1742 C 1 *
+bit 1741 I 1 IO_AC27
+bit 1740 O 1 IO_AC27 1739 1 Z
+bit 1739 C 1 *
+bit 1738 I 1 IO_AC26
+bit 1737 O 1 IO_AC26 1736 1 Z
+bit 1736 C 1 *
+bit 1735 I 1 IO_AC25
+bit 1734 O 1 IO_AC25 1733 1 Z
+bit 1733 C 1 *
+bit 1732 I 1 IO_AC24
+bit 1731 O 1 IO_AC24 1730 1 Z
+bit 1730 C 1 *
+bit 1729 I 1 IO_AD25
+bit 1728 O 1 IO_AD25 1727 1 Z
+bit 1727 C 1 *
+bit 1726 I 1 IO_AD30
+bit 1725 O 1 IO_AD30 1724 1 Z
+bit 1724 C 1 *
+bit 1723 I 1 IO_AD29
+bit 1722 O 1 IO_AD29 1721 1 Z
+bit 1721 C 1 *
+bit 1720 I 1 IO_AD28
+bit 1719 O 1 IO_AD28 1718 1 Z
+bit 1718 C 1 *
+bit 1717 I 1 IO_AD27
+bit 1716 O 1 IO_AD27 1715 1 Z
+bit 1715 C 1 *
+bit 1714 O 1 *
+bit 1713 O 1 *
+bit 1712 O 1 *
+bit 1711 O 1 *
+bit 1710 O 1 *
+bit 1709 O 1 *
+bit 1708 O 1 *
+bit 1707 O 1 *
+bit 1706 O 1 *
+bit 1705 O 1 *
+bit 1704 O 1 *
+bit 1703 O 1 *
+bit 1702 I 1 IO_AE29
+bit 1701 O 1 IO_AE29 1700 1 Z
+bit 1700 C 1 *
+bit 1699 I 1 IO_AE28
+bit 1698 O 1 IO_AE28 1697 1 Z
+bit 1697 C 1 *
+bit 1696 I 1 IO_AE26
+bit 1695 O 1 IO_AE26 1694 1 Z
+bit 1694 C 1 *
+bit 1693 I 1 IO_AF27
+bit 1692 O 1 IO_AF27 1691 1 Z
+bit 1691 C 1 *
+bit 1690 I 1 IO_AF30
+bit 1689 O 1 IO_AF30 1688 1 Z
+bit 1688 C 1 *
+bit 1687 I 1 IO_AF29
+bit 1686 O 1 IO_AF29 1685 1 Z
+bit 1685 C 1 *
+bit 1684 I 1 IO_AG30
+bit 1683 O 1 IO_AG30 1682 1 Z
+bit 1682 C 1 *
+bit 1681 I 1 IO_AG29
+bit 1680 O 1 IO_AG29 1679 1 Z
+bit 1679 C 1 *
+bit 1678 I 1 IO_AG28
+bit 1677 O 1 IO_AG28 1676 1 Z
+bit 1676 C 1 *
+bit 1675 I 1 IO_AG27
+bit 1674 O 1 IO_AG27 1673 1 Z
+bit 1673 C 1 *
+bit 1672 I 1 IO_AH30
+bit 1671 O 1 IO_AH30 1670 1 Z
+bit 1670 C 1 *
+bit 1669 I 1 IO_AH29
+bit 1668 O 1 IO_AH29 1667 1 Z
+bit 1667 C 1 *
+bit 1666 I 1 CCLK_AH28
+bit 1665 O 1 CCLK_AH28 1664 1 Z
+bit 1664 C 1 *
+bit 1663 I 1 DONE_AJ28
+bit 1662 O 1 DONE_AJ28 1661 1 Z
+bit 1661 C 1 *
+bit 1660 I 1 IO_AK28
+bit 1659 O 1 IO_AK28 1658 1 Z
+bit 1658 C 1 *
+bit 1657 I 1 IO_AJ27
+bit 1656 O 1 IO_AJ27 1655 1 Z
+bit 1655 C 1 *
+bit 1654 I 1 IO_AK27
+bit 1653 O 1 IO_AK27 1652 1 Z
+bit 1652 C 1 *
+bit 1651 I 1 IO_AJ26
+bit 1650 O 1 IO_AJ26 1649 1 Z
+bit 1649 C 1 *
+bit 1648 I 1 IO_AK26
+bit 1647 O 1 IO_AK26 1646 1 Z
+bit 1646 C 1 *
+bit 1645 I 1 IO_AH27
+bit 1644 O 1 IO_AH27 1643 1 Z
+bit 1643 C 1 *
+bit 1642 I 1 IO_AG26
+bit 1641 O 1 IO_AG26 1640 1 Z
+bit 1640 C 1 *
+bit 1639 I 1 IO_AF25
+bit 1638 O 1 IO_AF25 1637 1 Z
+bit 1637 C 1 *
+bit 1636 I 1 IO_AH25
+bit 1635 O 1 IO_AH25 1634 1 Z
+bit 1634 C 1 *
+bit 1633 I 1 IO_AJ25
+bit 1632 O 1 IO_AJ25 1631 1 Z
+bit 1631 C 1 *
+bit 1630 O 1 *
+bit 1629 O 1 *
+bit 1628 O 1 *
+bit 1627 I 1 IO_AE25
+bit 1626 O 1 IO_AE25 1625 1 Z
+bit 1625 C 1 *
+bit 1624 I 1 IO_AE24
+bit 1623 O 1 IO_AE24 1622 1 Z
+bit 1622 C 1 *
+bit 1621 I 1 IO_AG24
+bit 1620 O 1 IO_AG24 1619 1 Z
+bit 1619 C 1 *
+bit 1618 I 1 IO_AH24
+bit 1617 O 1 IO_AH24 1616 1 Z
+bit 1616 C 1 *
+bit 1615 O 1 *
+bit 1614 O 1 *
+bit 1613 O 1 *
+bit 1612 I 1 IO_AJ24
+bit 1611 O 1 IO_AJ24 1610 1 Z
+bit 1610 C 1 *
+bit 1609 I 1 IO_AK24
+bit 1608 O 1 IO_AK24 1607 1 Z
+bit 1607 C 1 *
+bit 1606 I 1 IO_AD24
+bit 1605 O 1 IO_AD24 1604 1 Z
+bit 1604 C 1 *
+bit 1603 I 1 IO_AC23
+bit 1602 O 1 IO_AC23 1601 1 Z
+bit 1601 C 1 *
+bit 1600 I 1 IO_AD23
+bit 1599 O 1 IO_AD23 1598 1 Z
+bit 1598 C 1 *
+bit 1597 I 1 IO_AE23
+bit 1596 O 1 IO_AE23 1595 1 Z
+bit 1595 C 1 *
+bit 1594 I 1 IO_AF23
+bit 1593 O 1 IO_AF23 1592 1 Z
+bit 1592 C 1 *
+bit 1591 I 1 IO_AG23
+bit 1590 O 1 IO_AG23 1589 1 Z
+bit 1589 C 1 *
+bit 1588 I 1 IO_AH23
+bit 1587 O 1 IO_AH23 1586 1 Z
+bit 1586 C 1 *
+bit 1585 O 1 *
+bit 1584 O 1 *
+bit 1583 O 1 *
+bit 1582 I 1 IO_AJ23
+bit 1581 O 1 IO_AJ23 1580 1 Z
+bit 1580 C 1 *
+bit 1579 I 1 IO_AK23
+bit 1578 O 1 IO_AK23 1577 1 Z
+bit 1577 C 1 *
+bit 1576 I 1 IO_AB22
+bit 1575 O 1 IO_AB22 1574 1 Z
+bit 1574 C 1 *
+bit 1573 I 1 IO_AC22
+bit 1572 O 1 IO_AC22 1571 1 Z
+bit 1571 C 1 *
+bit 1570 I 1 IO_AE22
+bit 1569 O 1 IO_AE22 1568 1 Z
+bit 1568 C 1 *
+bit 1567 I 1 IO_AF22
+bit 1566 O 1 IO_AF22 1565 1 Z
+bit 1565 C 1 *
+bit 1564 I 1 IO_AG22
+bit 1563 O 1 IO_AG22 1562 1 Z
+bit 1562 C 1 *
+bit 1561 I 1 IO_AJ22
+bit 1560 O 1 IO_AJ22 1559 1 Z
+bit 1559 C 1 *
+bit 1558 I 1 IO_AK22
+bit 1557 O 1 IO_AK22 1556 1 Z
+bit 1556 C 1 *
+bit 1555 O 1 *
+bit 1554 O 1 *
+bit 1553 O 1 *
+bit 1552 I 1 IO_AD21
+bit 1551 O 1 IO_AD21 1550 1 Z
+bit 1550 C 1 *
+bit 1549 I 1 IO_AE21
+bit 1548 O 1 IO_AE21 1547 1 Z
+bit 1547 C 1 *
+bit 1546 I 1 IO_AH21
+bit 1545 O 1 IO_AH21 1544 1 Z
+bit 1544 C 1 *
+bit 1543 I 1 IO_AJ21
+bit 1542 O 1 IO_AJ21 1541 1 Z
+bit 1541 C 1 *
+bit 1540 O 1 *
+bit 1539 O 1 *
+bit 1538 O 1 *
+bit 1537 I 1 IO_AB21
+bit 1536 O 1 IO_AB21 1535 1 Z
+bit 1535 C 1 *
+bit 1534 I 1 IO_AA20
+bit 1533 O 1 IO_AA20 1532 1 Z
+bit 1532 C 1 *
+bit 1531 I 1 IO_AC20
+bit 1530 O 1 IO_AC20 1529 1 Z
+bit 1529 C 1 *
+bit 1528 I 1 IO_AD20
+bit 1527 O 1 IO_AD20 1526 1 Z
+bit 1526 C 1 *
+bit 1525 O 1 *
+bit 1524 O 1 *
+bit 1523 O 1 *
+bit 1522 I 1 IO_AE20
+bit 1521 O 1 IO_AE20 1520 1 Z
+bit 1520 C 1 *
+bit 1519 I 1 IO_AF20
+bit 1518 O 1 IO_AF20 1517 1 Z
+bit 1517 C 1 *
+bit 1516 I 1 IO_AG20
+bit 1515 O 1 IO_AG20 1514 1 Z
+bit 1514 C 1 *
+bit 1513 I 1 IO_AH20
+bit 1512 O 1 IO_AH20 1511 1 Z
+bit 1511 C 1 *
+bit 1510 O 1 *
+bit 1509 O 1 *
+bit 1508 O 1 *
+bit 1507 I 1 IO_AJ20
+bit 1506 O 1 IO_AJ20 1505 1 Z
+bit 1505 C 1 *
+bit 1504 I 1 IO_AK20
+bit 1503 O 1 IO_AK20 1502 1 Z
+bit 1502 C 1 *
+bit 1501 I 1 IO_AA19
+bit 1500 O 1 IO_AA19 1499 1 Z
+bit 1499 C 1 *
+bit 1498 I 1 IO_AB19
+bit 1497 O 1 IO_AB19 1496 1 Z
+bit 1496 C 1 *
+bit 1495 O 1 *
+bit 1494 O 1 *
+bit 1493 O 1 *
+bit 1492 I 1 IO_AC19
+bit 1491 O 1 IO_AC19 1490 1 Z
+bit 1490 C 1 *
+bit 1489 I 1 IO_AD19
+bit 1488 O 1 IO_AD19 1487 1 Z
+bit 1487 C 1 *
+bit 1486 I 1 IO_AE19
+bit 1485 O 1 IO_AE19 1484 1 Z
+bit 1484 C 1 *
+bit 1483 I 1 IO_AF19
+bit 1482 O 1 IO_AF19 1481 1 Z
+bit 1481 C 1 *
+bit 1480 O 1 *
+bit 1479 O 1 *
+bit 1478 O 1 *
+bit 1477 I 1 IO_AG19
+bit 1476 O 1 IO_AG19 1475 1 Z
+bit 1475 C 1 *
+bit 1474 I 1 IO_AH19
+bit 1473 O 1 IO_AH19 1472 1 Z
+bit 1472 C 1 *
+bit 1471 I 1 IO_AJ19
+bit 1470 O 1 IO_AJ19 1469 1 Z
+bit 1469 C 1 *
+bit 1468 I 1 IO_AK19
+bit 1467 O 1 IO_AK19 1466 1 Z
+bit 1466 C 1 *
+bit 1465 I 1 IO_AA18
+bit 1464 O 1 IO_AA18 1463 1 Z
+bit 1463 C 1 *
+bit 1462 I 1 IO_AB18
+bit 1461 O 1 IO_AB18 1460 1 Z
+bit 1460 C 1 *
+bit 1459 I 1 IO_AC18
+bit 1458 O 1 IO_AC18 1457 1 Z
+bit 1457 C 1 *
+bit 1456 I 1 IO_AE18
+bit 1455 O 1 IO_AE18 1454 1 Z
+bit 1454 C 1 *
+bit 1453 I 1 IO_AF18
+bit 1452 O 1 IO_AF18 1451 1 Z
+bit 1451 C 1 *
+bit 1450 I 1 IO_AG18
+bit 1449 O 1 IO_AG18 1448 1 Z
+bit 1448 C 1 *
+bit 1447 I 1 IO_AJ18
+bit 1446 O 1 IO_AJ18 1445 1 Z
+bit 1445 C 1 *
+bit 1444 I 1 IO_AK18
+bit 1443 O 1 IO_AK18 1442 1 Z
+bit 1442 C 1 *
+bit 1441 I 1 IO_AA17
+bit 1440 O 1 IO_AA17 1439 1 Z
+bit 1439 C 1 *
+bit 1438 I 1 IO_AB17
+bit 1437 O 1 IO_AB17 1436 1 Z
+bit 1436 C 1 *
+bit 1435 I 1 IO_AA16
+bit 1434 O 1 IO_AA16 1433 1 Z
+bit 1433 C 1 *
+bit 1432 I 1 IO_AD17
+bit 1431 O 1 IO_AD17 1430 1 Z
+bit 1430 C 1 *
+bit 1429 I 1 IO_AE17
+bit 1428 O 1 IO_AE17 1427 1 Z
+bit 1427 C 1 *
+bit 1426 I 1 IO_AH17
+bit 1425 O 1 IO_AH17 1424 1 Z
+bit 1424 C 1 *
+bit 1423 I 1 IO_AJ17
+bit 1422 O 1 IO_AJ17 1421 1 Z
+bit 1421 C 1 *
+bit 1420 O 1 *
+bit 1419 O 1 *
+bit 1418 O 1 *
+bit 1417 I 1 IO_AB16
+bit 1416 O 1 IO_AB16 1415 1 Z
+bit 1415 C 1 *
+bit 1414 I 1 IO_AC16
+bit 1413 O 1 IO_AC16 1412 1 Z
+bit 1412 C 1 *
+bit 1411 I 1 IO_AD16
+bit 1410 O 1 IO_AD16 1409 1 Z
+bit 1409 C 1 *
+bit 1408 I 1 IO_AE16
+bit 1407 O 1 IO_AE16 1406 1 Z
+bit 1406 C 1 *
+bit 1405 I 1 IO_AF16
+bit 1404 O 1 IO_AF16 1403 1 Z
+bit 1403 C 1 *
+bit 1402 I 1 IO_AG16
+bit 1401 O 1 IO_AG16 1400 1 Z
+bit 1400 C 1 *
+bit 1399 I 1 IO_AH16
+bit 1398 O 1 IO_AH16 1397 1 Z
+bit 1397 C 1 *
+bit 1396 I 1 IO_AJ16
+bit 1395 O 1 IO_AJ16 1394 1 Z
+bit 1394 C 1 *
+bit 1393 I 1 IO_AK16
+bit 1392 O 1 IO_AK16 1391 1 Z
+bit 1391 C 1 *
+bit 1390 I 1 IO_AK15
+bit 1389 O 1 IO_AK15 1388 1 Z
+bit 1388 C 1 *
+bit 1387 I 1 IO_AJ15
+bit 1386 O 1 IO_AJ15 1385 1 Z
+bit 1385 C 1 *
+bit 1384 I 1 IO_AH15
+bit 1383 O 1 IO_AH15 1382 1 Z
+bit 1382 C 1 *
+bit 1381 I 1 IO_AG15
+bit 1380 O 1 IO_AG15 1379 1 Z
+bit 1379 C 1 *
+bit 1378 I 1 IO_AF15
+bit 1377 O 1 IO_AF15 1376 1 Z
+bit 1376 C 1 *
+bit 1375 I 1 IO_AE15
+bit 1374 O 1 IO_AE15 1373 1 Z
+bit 1373 C 1 *
+bit 1372 I 1 IO_AD15
+bit 1371 O 1 IO_AD15 1370 1 Z
+bit 1370 C 1 *
+bit 1369 I 1 IO_AD14
+bit 1368 O 1 IO_AD14 1367 1 Z
+bit 1367 C 1 *
+bit 1366 I 1 IO_AC15
+bit 1365 O 1 IO_AC15 1364 1 Z
+bit 1364 C 1 *
+bit 1363 I 1 IO_AB15
+bit 1362 O 1 IO_AB15 1361 1 Z
+bit 1361 C 1 *
+bit 1360 I 1 IO_AA15
+bit 1359 O 1 IO_AA15 1358 1 Z
+bit 1358 C 1 *
+bit 1357 I 1 IO_AJ14
+bit 1356 O 1 IO_AJ14 1355 1 Z
+bit 1355 C 1 *
+bit 1354 I 1 IO_AH14
+bit 1353 O 1 IO_AH14 1352 1 Z
+bit 1352 C 1 *
+bit 1351 I 1 IO_AE14
+bit 1350 O 1 IO_AE14 1349 1 Z
+bit 1349 C 1 *
+bit 1348 I 1 IO_AE13
+bit 1347 O 1 IO_AE13 1346 1 Z
+bit 1346 C 1 *
+bit 1345 O 1 *
+bit 1344 O 1 *
+bit 1343 O 1 *
+bit 1342 I 1 IO_AB14
+bit 1341 O 1 IO_AB14 1340 1 Z
+bit 1340 C 1 *
+bit 1339 I 1 IO_AA14
+bit 1338 O 1 IO_AA14 1337 1 Z
+bit 1337 C 1 *
+bit 1336 I 1 IO_AK13
+bit 1335 O 1 IO_AK13 1334 1 Z
+bit 1334 C 1 *
+bit 1333 I 1 IO_AJ13
+bit 1332 O 1 IO_AJ13 1331 1 Z
+bit 1331 C 1 *
+bit 1330 O 1 *
+bit 1329 O 1 *
+bit 1328 O 1 *
+bit 1327 I 1 IO_AG13
+bit 1326 O 1 IO_AG13 1325 1 Z
+bit 1325 C 1 *
+bit 1324 I 1 IO_AF13
+bit 1323 O 1 IO_AF13 1322 1 Z
+bit 1322 C 1 *
+bit 1321 I 1 IO_AC13
+bit 1320 O 1 IO_AC13 1319 1 Z
+bit 1319 C 1 *
+bit 1318 I 1 IO_AB13
+bit 1317 O 1 IO_AB13 1316 1 Z
+bit 1316 C 1 *
+bit 1315 O 1 *
+bit 1314 O 1 *
+bit 1313 O 1 *
+bit 1312 I 1 IO_AA13
+bit 1311 O 1 IO_AA13 1310 1 Z
+bit 1310 C 1 *
+bit 1309 I 1 IO_AA12
+bit 1308 O 1 IO_AA12 1307 1 Z
+bit 1307 C 1 *
+bit 1306 I 1 IO_AK12
+bit 1305 O 1 IO_AK12 1304 1 Z
+bit 1304 C 1 *
+bit 1303 I 1 IO_AJ12
+bit 1302 O 1 IO_AJ12 1301 1 Z
+bit 1301 C 1 *
+bit 1300 O 1 *
+bit 1299 O 1 *
+bit 1298 O 1 *
+bit 1297 I 1 IO_AH12
+bit 1296 O 1 IO_AH12 1295 1 Z
+bit 1295 C 1 *
+bit 1294 I 1 IO_AG12
+bit 1293 O 1 IO_AG12 1292 1 Z
+bit 1292 C 1 *
+bit 1291 I 1 IO_AF12
+bit 1290 O 1 IO_AF12 1289 1 Z
+bit 1289 C 1 *
+bit 1288 I 1 IO_AE12
+bit 1287 O 1 IO_AE12 1286 1 Z
+bit 1286 C 1 *
+bit 1285 O 1 *
+bit 1284 O 1 *
+bit 1283 O 1 *
+bit 1282 I 1 IO_AD12
+bit 1281 O 1 IO_AD12 1280 1 Z
+bit 1280 C 1 *
+bit 1279 I 1 IO_AC12
+bit 1278 O 1 IO_AC12 1277 1 Z
+bit 1277 C 1 *
+bit 1276 I 1 IO_AB12
+bit 1275 O 1 IO_AB12 1274 1 Z
+bit 1274 C 1 *
+bit 1273 I 1 IO_AC11
+bit 1272 O 1 IO_AC11 1271 1 Z
+bit 1271 C 1 *
+bit 1270 O 1 *
+bit 1269 O 1 *
+bit 1268 O 1 *
+bit 1267 I 1 IO_AK11
+bit 1266 O 1 IO_AK11 1265 1 Z
+bit 1265 C 1 *
+bit 1264 I 1 IO_AJ11
+bit 1263 O 1 IO_AJ11 1262 1 Z
+bit 1262 C 1 *
+bit 1261 I 1 IO_AH11
+bit 1260 O 1 IO_AH11 1259 1 Z
+bit 1259 C 1 *
+bit 1258 I 1 IO_AG11
+bit 1257 O 1 IO_AG11 1256 1 Z
+bit 1256 C 1 *
+bit 1255 O 1 *
+bit 1254 O 1 *
+bit 1253 O 1 *
+bit 1252 I 1 IO_AF11
+bit 1251 O 1 IO_AF11 1250 1 Z
+bit 1250 C 1 *
+bit 1249 I 1 IO_AE11
+bit 1248 O 1 IO_AE11 1247 1 Z
+bit 1247 C 1 *
+bit 1246 I 1 IO_AD11
+bit 1245 O 1 IO_AD11 1244 1 Z
+bit 1244 C 1 *
+bit 1243 I 1 IO_AD10
+bit 1242 O 1 IO_AD10 1241 1 Z
+bit 1241 C 1 *
+bit 1240 I 1 IO_AA11
+bit 1239 O 1 IO_AA11 1238 1 Z
+bit 1238 C 1 *
+bit 1237 I 1 IO_AJ10
+bit 1236 O 1 IO_AJ10 1235 1 Z
+bit 1235 C 1 *
+bit 1234 I 1 IO_AH10
+bit 1233 O 1 IO_AH10 1232 1 Z
+bit 1232 C 1 *
+bit 1231 I 1 IO_AE10
+bit 1230 O 1 IO_AE10 1229 1 Z
+bit 1229 C 1 *
+bit 1228 I 1 IO_AE9
+bit 1227 O 1 IO_AE9 1226 1 Z
+bit 1226 C 1 *
+bit 1225 I 1 IO_AB10
+bit 1224 O 1 IO_AB10 1223 1 Z
+bit 1223 C 1 *
+bit 1222 I 1 IO_AK9
+bit 1221 O 1 IO_AK9 1220 1 Z
+bit 1220 C 1 *
+bit 1219 I 1 IO_AJ9
+bit 1218 O 1 IO_AJ9 1217 1 Z
+bit 1217 C 1 *
+bit 1216 I 1 IO_AG9
+bit 1215 O 1 IO_AG9 1214 1 Z
+bit 1214 C 1 *
+bit 1213 I 1 IO_AF9
+bit 1212 O 1 IO_AF9 1211 1 Z
+bit 1211 C 1 *
+bit 1210 O 1 *
+bit 1209 O 1 *
+bit 1208 O 1 *
+bit 1207 I 1 IO_AC9
+bit 1206 O 1 IO_AC9 1205 1 Z
+bit 1205 C 1 *
+bit 1204 I 1 IO_AB9
+bit 1203 O 1 IO_AB9 1202 1 Z
+bit 1202 C 1 *
+bit 1201 I 1 IO_AK8
+bit 1200 O 1 IO_AK8 1199 1 Z
+bit 1199 C 1 *
+bit 1198 I 1 IO_AJ8
+bit 1197 O 1 IO_AJ8 1196 1 Z
+bit 1196 C 1 *
+bit 1195 O 1 *
+bit 1194 O 1 *
+bit 1193 O 1 *
+bit 1192 I 1 IO_AH8
+bit 1191 O 1 IO_AH8 1190 1 Z
+bit 1190 C 1 *
+bit 1189 I 1 IO_AG8
+bit 1188 O 1 IO_AG8 1187 1 Z
+bit 1187 C 1 *
+bit 1186 I 1 IO_AF8
+bit 1185 O 1 IO_AF8 1184 1 Z
+bit 1184 C 1 *
+bit 1183 I 1 IO_AE8
+bit 1182 O 1 IO_AE8 1181 1 Z
+bit 1181 C 1 *
+bit 1180 O 1 *
+bit 1179 O 1 *
+bit 1178 O 1 *
+bit 1177 I 1 IO_AD8
+bit 1176 O 1 IO_AD8 1175 1 Z
+bit 1175 C 1 *
+bit 1174 I 1 IO_AC8
+bit 1173 O 1 IO_AC8 1172 1 Z
+bit 1172 C 1 *
+bit 1171 I 1 IO_AK7
+bit 1170 O 1 IO_AK7 1169 1 Z
+bit 1169 C 1 *
+bit 1168 I 1 IO_AJ7
+bit 1167 O 1 IO_AJ7 1166 1 Z
+bit 1166 C 1 *
+bit 1165 O 1 *
+bit 1164 O 1 *
+bit 1163 O 1 *
+bit 1162 I 1 IO_AH7
+bit 1161 O 1 IO_AH7 1160 1 Z
+bit 1160 C 1 *
+bit 1159 I 1 IO_AG7
+bit 1158 O 1 IO_AG7 1157 1 Z
+bit 1157 C 1 *
+bit 1156 I 1 IO_AE7
+bit 1155 O 1 IO_AE7 1154 1 Z
+bit 1154 C 1 *
+bit 1153 I 1 IO_AD7
+bit 1152 O 1 IO_AD7 1151 1 Z
+bit 1151 C 1 *
+bit 1150 I 1 IO_AE6
+bit 1149 O 1 IO_AE6 1148 1 Z
+bit 1148 C 1 *
+bit 1147 I 1 IO_AJ6
+bit 1146 O 1 IO_AJ6 1145 1 Z
+bit 1145 C 1 *
+bit 1144 I 1 IO_AH6
+bit 1143 O 1 IO_AH6 1142 1 Z
+bit 1142 C 1 *
+bit 1141 I 1 IO_AF6
+bit 1140 O 1 IO_AF6 1139 1 Z
+bit 1139 C 1 *
+bit 1138 I 1 IO_AG5
+bit 1137 O 1 IO_AG5 1136 1 Z
+bit 1136 C 1 *
+bit 1135 I 1 IO_AH4
+bit 1134 O 1 IO_AH4 1133 1 Z
+bit 1133 C 1 *
+bit 1132 I 1 IO_AK5
+bit 1131 O 1 IO_AK5 1130 1 Z
+bit 1130 C 1 *
+bit 1129 I 1 IO_AJ5
+bit 1128 O 1 IO_AJ5 1127 1 Z
+bit 1127 C 1 *
+bit 1126 I 1 IO_AK4
+bit 1125 O 1 IO_AK4 1124 1 Z
+bit 1124 C 1 *
+bit 1123 I 1 IO_AJ4
+bit 1122 O 1 IO_AJ4 1121 1 Z
+bit 1121 C 1 *
+bit 1120 I 1 M2_AK3
+bit 1119 I 1 M0_AJ3
+bit 1118 I 1 M1_AH3
+bit 1117 I 1 IO_AH2
+bit 1116 O 1 IO_AH2 1115 1 Z
+bit 1115 C 1 *
+bit 1114 I 1 IO_AH1
+bit 1113 O 1 IO_AH1 1112 1 Z
+bit 1112 C 1 *
+bit 1111 I 1 IO_AG4
+bit 1110 O 1 IO_AG4 1109 1 Z
+bit 1109 C 1 *
+bit 1108 I 1 IO_AG3
+bit 1107 O 1 IO_AG3 1106 1 Z
+bit 1106 C 1 *
+bit 1105 I 1 IO_AG2
+bit 1104 O 1 IO_AG2 1103 1 Z
+bit 1103 C 1 *
+bit 1102 I 1 IO_AG1
+bit 1101 O 1 IO_AG1 1100 1 Z
+bit 1100 C 1 *
+bit 1099 I 1 IO_AF2
+bit 1098 O 1 IO_AF2 1097 1 Z
+bit 1097 C 1 *
+bit 1096 I 1 IO_AF1
+bit 1095 O 1 IO_AF1 1094 1 Z
+bit 1094 C 1 *
+bit 1093 I 1 IO_AF4
+bit 1092 O 1 IO_AF4 1091 1 Z
+bit 1091 C 1 *
+bit 1090 I 1 IO_AE5
+bit 1089 O 1 IO_AE5 1088 1 Z
+bit 1088 C 1 *
+bit 1087 I 1 IO_AE3
+bit 1086 O 1 IO_AE3 1085 1 Z
+bit 1085 C 1 *
+bit 1084 I 1 IO_AE2
+bit 1083 O 1 IO_AE2 1082 1 Z
+bit 1082 C 1 *
+bit 1081 O 1 *
+bit 1080 O 1 *
+bit 1079 O 1 *
+bit 1078 O 1 *
+bit 1077 O 1 *
+bit 1076 O 1 *
+bit 1075 O 1 *
+bit 1074 O 1 *
+bit 1073 O 1 *
+bit 1072 O 1 *
+bit 1071 O 1 *
+bit 1070 O 1 *
+bit 1069 I 1 IO_AD4
+bit 1068 O 1 IO_AD4 1067 1 Z
+bit 1067 C 1 *
+bit 1066 I 1 IO_AD3
+bit 1065 O 1 IO_AD3 1064 1 Z
+bit 1064 C 1 *
+bit 1063 I 1 IO_AD2
+bit 1062 O 1 IO_AD2 1061 1 Z
+bit 1061 C 1 *
+bit 1060 I 1 IO_AD1
+bit 1059 O 1 IO_AD1 1058 1 Z
+bit 1058 C 1 *
+bit 1057 I 1 IO_AD6
+bit 1056 O 1 IO_AD6 1055 1 Z
+bit 1055 C 1 *
+bit 1054 I 1 IO_AC7
+bit 1053 O 1 IO_AC7 1052 1 Z
+bit 1052 C 1 *
+bit 1051 I 1 IO_AC6
+bit 1050 O 1 IO_AC6 1049 1 Z
+bit 1049 C 1 *
+bit 1048 I 1 IO_AC5
+bit 1047 O 1 IO_AC5 1046 1 Z
+bit 1046 C 1 *
+bit 1045 I 1 IO_AC4
+bit 1044 O 1 IO_AC4 1043 1 Z
+bit 1043 C 1 *
+bit 1042 I 1 IO_AC3
+bit 1041 O 1 IO_AC3 1040 1 Z
+bit 1040 C 1 *
+bit 1039 O 1 *
+bit 1038 O 1 *
+bit 1037 O 1 *
+bit 1036 I 1 IO_AB6
+bit 1035 O 1 IO_AB6 1034 1 Z
+bit 1034 C 1 *
+bit 1033 I 1 IO_AC2
+bit 1032 O 1 IO_AC2 1031 1 Z
+bit 1031 C 1 *
+bit 1030 I 1 IO_AC1
+bit 1029 O 1 IO_AC1 1028 1 Z
+bit 1028 C 1 *
+bit 1027 I 1 IO_AB5
+bit 1026 O 1 IO_AB5 1025 1 Z
+bit 1025 C 1 *
+bit 1024 I 1 IO_AB4
+bit 1023 O 1 IO_AB4 1022 1 Z
+bit 1022 C 1 *
+bit 1021 I 1 IO_AB2
+bit 1020 O 1 IO_AB2 1019 1 Z
+bit 1019 C 1 *
+bit 1018 I 1 IO_AB1
+bit 1017 O 1 IO_AB1 1016 1 Z
+bit 1016 C 1 *
+bit 1015 I 1 IO_AB8
+bit 1014 O 1 IO_AB8 1013 1 Z
+bit 1013 C 1 *
+bit 1012 I 1 IO_AA9
+bit 1011 O 1 IO_AA9 1010 1 Z
+bit 1010 C 1 *
+bit 1009 I 1 IO_AA7
+bit 1008 O 1 IO_AA7 1007 1 Z
+bit 1007 C 1 *
+bit 1006 I 1 IO_AA6
+bit 1005 O 1 IO_AA6 1004 1 Z
+bit 1004 C 1 *
+bit 1003 O 1 *
+bit 1002 O 1 *
+bit 1001 O 1 *
+bit 1000 O 1 *
+bit 999 O 1 *
+bit 998 O 1 *
+bit 997 I 1 IO_AA3
+bit 996 O 1 IO_AA3 995 1 Z
+bit 995 C 1 *
+bit 994 I 1 IO_AA2
+bit 993 O 1 IO_AA2 992 1 Z
+bit 992 C 1 *
+bit 991 I 1 IO_AA10
+bit 990 O 1 IO_AA10 989 1 Z
+bit 989 C 1 *
+bit 988 I 1 IO_Y10
+bit 987 O 1 IO_Y10 986 1 Z
+bit 986 C 1 *
+bit 985 I 1 IO_Y8
+bit 984 O 1 IO_Y8 983 1 Z
+bit 983 C 1 *
+bit 982 I 1 IO_Y7
+bit 981 O 1 IO_Y7 980 1 Z
+bit 980 C 1 *
+bit 979 I 1 IO_Y6
+bit 978 O 1 IO_Y6 977 1 Z
+bit 977 C 1 *
+bit 976 I 1 IO_Y5
+bit 975 O 1 IO_Y5 974 1 Z
+bit 974 C 1 *
+bit 973 I 1 IO_Y4
+bit 972 O 1 IO_Y4 971 1 Z
+bit 971 C 1 *
+bit 970 I 1 IO_Y3
+bit 969 O 1 IO_Y3 968 1 Z
+bit 968 C 1 *
+bit 967 O 1 *
+bit 966 O 1 *
+bit 965 O 1 *
+bit 964 O 1 *
+bit 963 O 1 *
+bit 962 O 1 *
+bit 961 I 1 IO_Y2
+bit 960 O 1 IO_Y2 959 1 Z
+bit 959 C 1 *
+bit 958 I 1 IO_Y1
+bit 957 O 1 IO_Y1 956 1 Z
+bit 956 C 1 *
+bit 955 I 1 IO_W9
+bit 954 O 1 IO_W9 953 1 Z
+bit 953 C 1 *
+bit 952 I 1 IO_W8
+bit 951 O 1 IO_W8 950 1 Z
+bit 950 C 1 *
+bit 949 I 1 IO_W7
+bit 948 O 1 IO_W7 947 1 Z
+bit 947 C 1 *
+bit 946 I 1 IO_W6
+bit 945 O 1 IO_W6 944 1 Z
+bit 944 C 1 *
+bit 943 I 1 IO_W4
+bit 942 O 1 IO_W4 941 1 Z
+bit 941 C 1 *
+bit 940 I 1 IO_W3
+bit 939 O 1 IO_W3 938 1 Z
+bit 938 C 1 *
+bit 937 O 1 *
+bit 936 O 1 *
+bit 935 O 1 *
+bit 934 O 1 *
+bit 933 O 1 *
+bit 932 O 1 *
+bit 931 I 1 IO_W2
+bit 930 O 1 IO_W2 929 1 Z
+bit 929 C 1 *
+bit 928 I 1 IO_W1
+bit 927 O 1 IO_W1 926 1 Z
+bit 926 C 1 *
+bit 925 I 1 IO_W10
+bit 924 O 1 IO_W10 923 1 Z
+bit 923 C 1 *
+bit 922 I 1 IO_V10
+bit 921 O 1 IO_V10 920 1 Z
+bit 920 C 1 *
+bit 919 I 1 IO_V9
+bit 918 O 1 IO_V9 917 1 Z
+bit 917 C 1 *
+bit 916 I 1 IO_V8
+bit 915 O 1 IO_V8 914 1 Z
+bit 914 C 1 *
+bit 913 I 1 IO_W5
+bit 912 O 1 IO_W5 911 1 Z
+bit 911 C 1 *
+bit 910 I 1 IO_V6
+bit 909 O 1 IO_V6 908 1 Z
+bit 908 C 1 *
+bit 907 I 1 IO_V5
+bit 906 O 1 IO_V5 905 1 Z
+bit 905 C 1 *
+bit 904 I 1 IO_V4
+bit 903 O 1 IO_V4 902 1 Z
+bit 902 C 1 *
+bit 901 O 1 *
+bit 900 O 1 *
+bit 899 O 1 *
+bit 898 O 1 *
+bit 897 O 1 *
+bit 896 O 1 *
+bit 895 I 1 IO_V2
+bit 894 O 1 IO_V2 893 1 Z
+bit 893 C 1 *
+bit 892 I 1 IO_V1
+bit 891 O 1 IO_V1 890 1 Z
+bit 890 C 1 *
+bit 889 I 1 IO_U10
+bit 888 O 1 IO_U10 887 1 Z
+bit 887 C 1 *
+bit 886 I 1 IO_U9
+bit 885 O 1 IO_U9 884 1 Z
+bit 884 C 1 *
+bit 883 I 1 IO_U7
+bit 882 O 1 IO_U7 881 1 Z
+bit 881 C 1 *
+bit 880 I 1 IO_U6
+bit 879 O 1 IO_U6 878 1 Z
+bit 878 C 1 *
+bit 877 I 1 IO_U3
+bit 876 O 1 IO_U3 875 1 Z
+bit 875 C 1 *
+bit 874 I 1 IO_U2
+bit 873 O 1 IO_U2 872 1 Z
+bit 872 C 1 *
+bit 871 I 1 IO_T10
+bit 870 O 1 IO_T10 869 1 Z
+bit 869 C 1 *
+bit 868 I 1 IO_T9
+bit 867 O 1 IO_T9 866 1 Z
+bit 866 C 1 *
+bit 865 O 1 *
+bit 864 O 1 *
+bit 863 O 1 *
+bit 862 O 1 *
+bit 861 O 1 *
+bit 860 O 1 *
+bit 859 O 1 *
+bit 858 O 1 *
+bit 857 O 1 *
+bit 856 O 1 *
+bit 855 O 1 *
+bit 854 O 1 *
+bit 853 I 1 IO_T8
+bit 852 O 1 IO_T8 851 1 Z
+bit 851 C 1 *
+bit 850 I 1 IO_T7
+bit 849 O 1 IO_T7 848 1 Z
+bit 848 C 1 *
+bit 847 I 1 IO_T6
+bit 846 O 1 IO_T6 845 1 Z
+bit 845 C 1 *
+bit 844 I 1 IO_T5
+bit 843 O 1 IO_T5 842 1 Z
+bit 842 C 1 *
+bit 841 I 1 IO_T4
+bit 840 O 1 IO_T4 839 1 Z
+bit 839 C 1 *
+bit 838 I 1 IO_T3
+bit 837 O 1 IO_T3 836 1 Z
+bit 836 C 1 *
+bit 835 I 1 IO_T2
+bit 834 O 1 IO_T2 833 1 Z
+bit 833 C 1 *
+bit 832 I 1 IO_T1
+bit 831 O 1 IO_T1 830 1 Z
+bit 830 C 1 *
+bit 829 I 1 IO_R1
+bit 828 O 1 IO_R1 827 1 Z
+bit 827 C 1 *
+bit 826 I 1 IO_R2
+bit 825 O 1 IO_R2 824 1 Z
+bit 824 C 1 *
+bit 823 I 1 IO_R3
+bit 822 O 1 IO_R3 821 1 Z
+bit 821 C 1 *
+bit 820 I 1 IO_R4
+bit 819 O 1 IO_R4 818 1 Z
+bit 818 C 1 *
+bit 817 I 1 IO_R5
+bit 816 O 1 IO_R5 815 1 Z
+bit 815 C 1 *
+bit 814 I 1 IO_R6
+bit 813 O 1 IO_R6 812 1 Z
+bit 812 C 1 *
+bit 811 I 1 IO_R7
+bit 810 O 1 IO_R7 809 1 Z
+bit 809 C 1 *
+bit 808 I 1 IO_R8
+bit 807 O 1 IO_R8 806 1 Z
+bit 806 C 1 *
+bit 805 O 1 *
+bit 804 O 1 *
+bit 803 O 1 *
+bit 802 O 1 *
+bit 801 O 1 *
+bit 800 O 1 *
+bit 799 O 1 *
+bit 798 O 1 *
+bit 797 O 1 *
+bit 796 O 1 *
+bit 795 O 1 *
+bit 794 O 1 *
+bit 793 I 1 IO_R9
+bit 792 O 1 IO_R9 791 1 Z
+bit 791 C 1 *
+bit 790 I 1 IO_R10
+bit 789 O 1 IO_R10 788 1 Z
+bit 788 C 1 *
+bit 787 I 1 IO_P2
+bit 786 O 1 IO_P2 785 1 Z
+bit 785 C 1 *
+bit 784 I 1 IO_P3
+bit 783 O 1 IO_P3 782 1 Z
+bit 782 C 1 *
+bit 781 I 1 IO_P6
+bit 780 O 1 IO_P6 779 1 Z
+bit 779 C 1 *
+bit 778 I 1 IO_P7
+bit 777 O 1 IO_P7 776 1 Z
+bit 776 C 1 *
+bit 775 I 1 IO_P9
+bit 774 O 1 IO_P9 773 1 Z
+bit 773 C 1 *
+bit 772 I 1 IO_P10
+bit 771 O 1 IO_P10 770 1 Z
+bit 770 C 1 *
+bit 769 I 1 IO_N1
+bit 768 O 1 IO_N1 767 1 Z
+bit 767 C 1 *
+bit 766 I 1 IO_N2
+bit 765 O 1 IO_N2 764 1 Z
+bit 764 C 1 *
+bit 763 O 1 *
+bit 762 O 1 *
+bit 761 O 1 *
+bit 760 O 1 *
+bit 759 O 1 *
+bit 758 O 1 *
+bit 757 I 1 IO_N4
+bit 756 O 1 IO_N4 755 1 Z
+bit 755 C 1 *
+bit 754 I 1 IO_N5
+bit 753 O 1 IO_N5 752 1 Z
+bit 752 C 1 *
+bit 751 I 1 IO_N6
+bit 750 O 1 IO_N6 749 1 Z
+bit 749 C 1 *
+bit 748 I 1 IO_M5
+bit 747 O 1 IO_M5 746 1 Z
+bit 746 C 1 *
+bit 745 I 1 IO_N8
+bit 744 O 1 IO_N8 743 1 Z
+bit 743 C 1 *
+bit 742 I 1 IO_N9
+bit 741 O 1 IO_N9 740 1 Z
+bit 740 C 1 *
+bit 739 I 1 IO_N10
+bit 738 O 1 IO_N10 737 1 Z
+bit 737 C 1 *
+bit 736 I 1 IO_M10
+bit 735 O 1 IO_M10 734 1 Z
+bit 734 C 1 *
+bit 733 I 1 IO_M1
+bit 732 O 1 IO_M1 731 1 Z
+bit 731 C 1 *
+bit 730 I 1 IO_M2
+bit 729 O 1 IO_M2 728 1 Z
+bit 728 C 1 *
+bit 727 O 1 *
+bit 726 O 1 *
+bit 725 O 1 *
+bit 724 O 1 *
+bit 723 O 1 *
+bit 722 O 1 *
+bit 721 I 1 IO_M3
+bit 720 O 1 IO_M3 719 1 Z
+bit 719 C 1 *
+bit 718 I 1 IO_M4
+bit 717 O 1 IO_M4 716 1 Z
+bit 716 C 1 *
+bit 715 I 1 IO_M6
+bit 714 O 1 IO_M6 713 1 Z
+bit 713 C 1 *
+bit 712 I 1 IO_M7
+bit 711 O 1 IO_M7 710 1 Z
+bit 710 C 1 *
+bit 709 I 1 IO_M8
+bit 708 O 1 IO_M8 707 1 Z
+bit 707 C 1 *
+bit 706 I 1 IO_M9
+bit 705 O 1 IO_M9 704 1 Z
+bit 704 C 1 *
+bit 703 I 1 IO_L1
+bit 702 O 1 IO_L1 701 1 Z
+bit 701 C 1 *
+bit 700 I 1 IO_L2
+bit 699 O 1 IO_L2 698 1 Z
+bit 698 C 1 *
+bit 697 O 1 *
+bit 696 O 1 *
+bit 695 O 1 *
+bit 694 O 1 *
+bit 693 O 1 *
+bit 692 O 1 *
+bit 691 I 1 IO_L3
+bit 690 O 1 IO_L3 689 1 Z
+bit 689 C 1 *
+bit 688 I 1 IO_L4
+bit 687 O 1 IO_L4 686 1 Z
+bit 686 C 1 *
+bit 685 I 1 IO_L5
+bit 684 O 1 IO_L5 683 1 Z
+bit 683 C 1 *
+bit 682 I 1 IO_L6
+bit 681 O 1 IO_L6 680 1 Z
+bit 680 C 1 *
+bit 679 I 1 IO_L7
+bit 678 O 1 IO_L7 677 1 Z
+bit 677 C 1 *
+bit 676 I 1 IO_L8
+bit 675 O 1 IO_L8 674 1 Z
+bit 674 C 1 *
+bit 673 I 1 IO_L10
+bit 672 O 1 IO_L10 671 1 Z
+bit 671 C 1 *
+bit 670 I 1 IO_K10
+bit 669 O 1 IO_K10 668 1 Z
+bit 668 C 1 *
+bit 667 I 1 IO_K2
+bit 666 O 1 IO_K2 665 1 Z
+bit 665 C 1 *
+bit 664 I 1 IO_K3
+bit 663 O 1 IO_K3 662 1 Z
+bit 662 C 1 *
+bit 661 O 1 *
+bit 660 O 1 *
+bit 659 O 1 *
+bit 658 O 1 *
+bit 657 O 1 *
+bit 656 O 1 *
+bit 655 I 1 IO_K6
+bit 654 O 1 IO_K6 653 1 Z
+bit 653 C 1 *
+bit 652 I 1 IO_K7
+bit 651 O 1 IO_K7 650 1 Z
+bit 650 C 1 *
+bit 649 I 1 IO_K9
+bit 648 O 1 IO_K9 647 1 Z
+bit 647 C 1 *
+bit 646 I 1 IO_J8
+bit 645 O 1 IO_J8 644 1 Z
+bit 644 C 1 *
+bit 643 I 1 IO_J1
+bit 642 O 1 IO_J1 641 1 Z
+bit 641 C 1 *
+bit 640 I 1 IO_J2
+bit 639 O 1 IO_J2 638 1 Z
+bit 638 C 1 *
+bit 637 I 1 IO_J4
+bit 636 O 1 IO_J4 635 1 Z
+bit 635 C 1 *
+bit 634 I 1 IO_J5
+bit 633 O 1 IO_J5 632 1 Z
+bit 632 C 1 *
+bit 631 I 1 IO_H1
+bit 630 O 1 IO_H1 629 1 Z
+bit 629 C 1 *
+bit 628 I 1 IO_H2
+bit 627 O 1 IO_H2 626 1 Z
+bit 626 C 1 *
+bit 625 I 1 IO_J6
+bit 624 O 1 IO_J6 623 1 Z
+bit 623 C 1 *
+bit 622 O 1 *
+bit 621 O 1 *
+bit 620 O 1 *
+bit 619 I 1 IO_H3
+bit 618 O 1 IO_H3 617 1 Z
+bit 617 C 1 *
+bit 616 I 1 IO_H4
+bit 615 O 1 IO_H4 614 1 Z
+bit 614 C 1 *
+bit 613 I 1 IO_H5
+bit 612 O 1 IO_H5 611 1 Z
+bit 611 C 1 *
+bit 610 I 1 IO_H6
+bit 609 O 1 IO_H6 608 1 Z
+bit 608 C 1 *
+bit 607 I 1 IO_H7
+bit 606 O 1 IO_H7 605 1 Z
+bit 605 C 1 *
+bit 604 I 1 IO_G6
+bit 603 O 1 IO_G6 602 1 Z
+bit 602 C 1 *
+bit 601 I 1 IO_G1
+bit 600 O 1 IO_G1 599 1 Z
+bit 599 C 1 *
+bit 598 I 1 IO_G2
+bit 597 O 1 IO_G2 596 1 Z
+bit 596 C 1 *
+bit 595 I 1 IO_G3
+bit 594 O 1 IO_G3 593 1 Z
+bit 593 C 1 *
+bit 592 I 1 IO_G4
+bit 591 O 1 IO_G4 590 1 Z
+bit 590 C 1 *
+bit 589 O 1 *
+bit 588 O 1 *
+bit 587 O 1 *
+bit 586 O 1 *
+bit 585 O 1 *
+bit 584 O 1 *
+bit 583 O 1 *
+bit 582 O 1 *
+bit 581 O 1 *
+bit 580 O 1 *
+bit 579 O 1 *
+bit 578 O 1 *
+bit 577 I 1 IO_F2
+bit 576 O 1 IO_F2 575 1 Z
+bit 575 C 1 *
+bit 574 I 1 IO_F3
+bit 573 O 1 IO_F3 572 1 Z
+bit 572 C 1 *
+bit 571 I 1 IO_F5
+bit 570 O 1 IO_F5 569 1 Z
+bit 569 C 1 *
+bit 568 I 1 IO_E4
+bit 567 O 1 IO_E4 566 1 Z
+bit 566 C 1 *
+bit 565 I 1 IO_E1
+bit 564 O 1 IO_E1 563 1 Z
+bit 563 C 1 *
+bit 562 I 1 IO_E2
+bit 561 O 1 IO_E2 560 1 Z
+bit 560 C 1 *
+bit 559 I 1 IO_D1
+bit 558 O 1 IO_D1 557 1 Z
+bit 557 C 1 *
+bit 556 I 1 IO_D2
+bit 555 O 1 IO_D2 554 1 Z
+bit 554 C 1 *
+bit 553 I 1 IO_D3
+bit 552 O 1 IO_D3 551 1 Z
+bit 551 C 1 *
+bit 550 I 1 IO_D4
+bit 549 O 1 IO_D4 548 1 Z
+bit 548 C 1 *
+bit 547 I 1 IO_C1
+bit 546 O 1 IO_C1 545 1 Z
+bit 545 C 1 *
+bit 544 I 1 IO_C2
+bit 543 O 1 IO_C2 542 1 Z
+bit 542 C 1 *
+bit 541 O 1 *
+bit 540 I 1 HSWAP_EN_A3
+bit 539 I 1 IO_C4
+bit 538 O 1 IO_C4 537 1 Z
+bit 537 C 1 *
+bit 536 I 1 IO_B4
+bit 535 O 1 IO_B4 534 1 Z
+bit 534 C 1 *
+bit 533 I 1 IO_A4
+bit 532 O 1 IO_A4 531 1 Z
+bit 531 C 1 *
+bit 530 I 1 IO_B5
+bit 529 O 1 IO_B5 528 1 Z
+bit 528 C 1 *
+bit 527 I 1 IO_A5
+bit 526 O 1 IO_A5 525 1 Z
+bit 525 C 1 *
+bit 524 O 1 *
+bit 523 O 1 *
+bit 522 O 1 *
+bit 521 I 1 IO_D5
+bit 520 O 1 IO_D5 519 1 Z
+bit 519 C 1 *
+bit 518 I 1 IO_E6
+bit 517 O 1 IO_E6 516 1 Z
+bit 516 C 1 *
+bit 515 I 1 IO_C6
+bit 514 O 1 IO_C6 513 1 Z
+bit 513 C 1 *
+bit 512 I 1 IO_B6
+bit 511 O 1 IO_B6 510 1 Z
+bit 510 C 1 *
+bit 509 O 1 *
+bit 508 O 1 *
+bit 507 O 1 *
+bit 506 I 1 IO_F6
+bit 505 O 1 IO_F6 504 1 Z
+bit 504 C 1 *
+bit 503 I 1 IO_F7
+bit 502 O 1 IO_F7 501 1 Z
+bit 501 C 1 *
+bit 500 I 1 IO_D7
+bit 499 O 1 IO_D7 498 1 Z
+bit 498 C 1 *
+bit 497 I 1 IO_C7
+bit 496 O 1 IO_C7 495 1 Z
+bit 495 C 1 *
+bit 494 O 1 *
+bit 493 O 1 *
+bit 492 O 1 *
+bit 491 I 1 IO_B7
+bit 490 O 1 IO_B7 489 1 Z
+bit 489 C 1 *
+bit 488 I 1 IO_A7
+bit 487 O 1 IO_A7 486 1 Z
+bit 486 C 1 *
+bit 485 I 1 IO_G7
+bit 484 O 1 IO_G7 483 1 Z
+bit 483 C 1 *
+bit 482 I 1 IO_H8
+bit 481 O 1 IO_H8 480 1 Z
+bit 480 C 1 *
+bit 479 I 1 IO_G8
+bit 478 O 1 IO_G8 477 1 Z
+bit 477 C 1 *
+bit 476 I 1 IO_F8
+bit 475 O 1 IO_F8 474 1 Z
+bit 474 C 1 *
+bit 473 I 1 IO_E8
+bit 472 O 1 IO_E8 471 1 Z
+bit 471 C 1 *
+bit 470 I 1 IO_D8
+bit 469 O 1 IO_D8 468 1 Z
+bit 468 C 1 *
+bit 467 I 1 IO_C8
+bit 466 O 1 IO_C8 465 1 Z
+bit 465 C 1 *
+bit 464 O 1 *
+bit 463 O 1 *
+bit 462 O 1 *
+bit 461 I 1 IO_B8
+bit 460 O 1 IO_B8 459 1 Z
+bit 459 C 1 *
+bit 458 I 1 IO_A8
+bit 457 O 1 IO_A8 456 1 Z
+bit 456 C 1 *
+bit 455 I 1 IO_J9
+bit 454 O 1 IO_J9 453 1 Z
+bit 453 C 1 *
+bit 452 I 1 IO_H9
+bit 451 O 1 IO_H9 450 1 Z
+bit 450 C 1 *
+bit 449 I 1 IO_F9
+bit 448 O 1 IO_F9 447 1 Z
+bit 447 C 1 *
+bit 446 I 1 IO_E9
+bit 445 O 1 IO_E9 444 1 Z
+bit 444 C 1 *
+bit 443 I 1 IO_D9
+bit 442 O 1 IO_D9 441 1 Z
+bit 441 C 1 *
+bit 440 I 1 IO_B9
+bit 439 O 1 IO_B9 438 1 Z
+bit 438 C 1 *
+bit 437 I 1 IO_A9
+bit 436 O 1 IO_A9 435 1 Z
+bit 435 C 1 *
+bit 434 O 1 *
+bit 433 O 1 *
+bit 432 O 1 *
+bit 431 I 1 IO_G10
+bit 430 O 1 IO_G10 429 1 Z
+bit 429 C 1 *
+bit 428 I 1 IO_F10
+bit 427 O 1 IO_F10 426 1 Z
+bit 426 C 1 *
+bit 425 I 1 IO_C10
+bit 424 O 1 IO_C10 423 1 Z
+bit 423 C 1 *
+bit 422 I 1 IO_B10
+bit 421 O 1 IO_B10 420 1 Z
+bit 420 C 1 *
+bit 419 O 1 *
+bit 418 O 1 *
+bit 417 O 1 *
+bit 416 I 1 IO_J10
+bit 415 O 1 IO_J10 414 1 Z
+bit 414 C 1 *
+bit 413 I 1 IO_K11
+bit 412 O 1 IO_K11 411 1 Z
+bit 411 C 1 *
+bit 410 I 1 IO_H11
+bit 409 O 1 IO_H11 408 1 Z
+bit 408 C 1 *
+bit 407 I 1 IO_G11
+bit 406 O 1 IO_G11 405 1 Z
+bit 405 C 1 *
+bit 404 O 1 *
+bit 403 O 1 *
+bit 402 O 1 *
+bit 401 I 1 IO_F11
+bit 400 O 1 IO_F11 399 1 Z
+bit 399 C 1 *
+bit 398 I 1 IO_E11
+bit 397 O 1 IO_E11 396 1 Z
+bit 396 C 1 *
+bit 395 I 1 IO_D11
+bit 394 O 1 IO_D11 393 1 Z
+bit 393 C 1 *
+bit 392 I 1 IO_C11
+bit 391 O 1 IO_C11 390 1 Z
+bit 390 C 1 *
+bit 389 O 1 *
+bit 388 O 1 *
+bit 387 O 1 *
+bit 386 I 1 IO_B11
+bit 385 O 1 IO_B11 384 1 Z
+bit 384 C 1 *
+bit 383 I 1 IO_A11
+bit 382 O 1 IO_A11 381 1 Z
+bit 381 C 1 *
+bit 380 I 1 IO_K12
+bit 379 O 1 IO_K12 378 1 Z
+bit 378 C 1 *
+bit 377 I 1 IO_J12
+bit 376 O 1 IO_J12 375 1 Z
+bit 375 C 1 *
+bit 374 O 1 *
+bit 373 O 1 *
+bit 372 O 1 *
+bit 371 I 1 IO_H12
+bit 370 O 1 IO_H12 369 1 Z
+bit 369 C 1 *
+bit 368 I 1 IO_G12
+bit 367 O 1 IO_G12 366 1 Z
+bit 366 C 1 *
+bit 365 I 1 IO_F12
+bit 364 O 1 IO_F12 363 1 Z
+bit 363 C 1 *
+bit 362 I 1 IO_E12
+bit 361 O 1 IO_E12 360 1 Z
+bit 360 C 1 *
+bit 359 O 1 *
+bit 358 O 1 *
+bit 357 O 1 *
+bit 356 I 1 IO_D12
+bit 355 O 1 IO_D12 354 1 Z
+bit 354 C 1 *
+bit 353 I 1 IO_C12
+bit 352 O 1 IO_C12 351 1 Z
+bit 351 C 1 *
+bit 350 I 1 IO_B12
+bit 349 O 1 IO_B12 348 1 Z
+bit 348 C 1 *
+bit 347 I 1 IO_A12
+bit 346 O 1 IO_A12 345 1 Z
+bit 345 C 1 *
+bit 344 I 1 IO_K13
+bit 343 O 1 IO_K13 342 1 Z
+bit 342 C 1 *
+bit 341 I 1 IO_J13
+bit 340 O 1 IO_J13 339 1 Z
+bit 339 C 1 *
+bit 338 I 1 IO_H13
+bit 337 O 1 IO_H13 336 1 Z
+bit 336 C 1 *
+bit 335 I 1 IO_F13
+bit 334 O 1 IO_F13 333 1 Z
+bit 333 C 1 *
+bit 332 I 1 IO_E13
+bit 331 O 1 IO_E13 330 1 Z
+bit 330 C 1 *
+bit 329 I 1 IO_D13
+bit 328 O 1 IO_D13 327 1 Z
+bit 327 C 1 *
+bit 326 I 1 IO_B13
+bit 325 O 1 IO_B13 324 1 Z
+bit 324 C 1 *
+bit 323 I 1 IO_A13
+bit 322 O 1 IO_A13 321 1 Z
+bit 321 C 1 *
+bit 320 I 1 IO_K14
+bit 319 O 1 IO_K14 318 1 Z
+bit 318 C 1 *
+bit 317 I 1 IO_J14
+bit 316 O 1 IO_J14 315 1 Z
+bit 315 C 1 *
+bit 314 I 1 IO_K15
+bit 313 O 1 IO_K15 312 1 Z
+bit 312 C 1 *
+bit 311 I 1 IO_G14
+bit 310 O 1 IO_G14 309 1 Z
+bit 309 C 1 *
+bit 308 I 1 IO_F14
+bit 307 O 1 IO_F14 306 1 Z
+bit 306 C 1 *
+bit 305 I 1 IO_C14
+bit 304 O 1 IO_C14 303 1 Z
+bit 303 C 1 *
+bit 302 I 1 IO_B14
+bit 301 O 1 IO_B14 300 1 Z
+bit 300 C 1 *
+bit 299 O 1 *
+bit 298 O 1 *
+bit 297 O 1 *
+bit 296 I 1 IO_J15
+bit 295 O 1 IO_J15 294 1 Z
+bit 294 C 1 *
+bit 293 I 1 IO_H15
+bit 292 O 1 IO_H15 291 1 Z
+bit 291 C 1 *
+bit 290 I 1 IO_G15
+bit 289 O 1 IO_G15 288 1 Z
+bit 288 C 1 *
+bit 287 I 1 IO_F15
+bit 286 O 1 IO_F15 285 1 Z
+bit 285 C 1 *
+bit 284 I 1 IO_E15
+bit 283 O 1 IO_E15 282 1 Z
+bit 282 C 1 *
+bit 281 I 1 IO_D15
+bit 280 O 1 IO_D15 279 1 Z
+bit 279 C 1 *
+bit 278 I 1 IO_C15
+bit 277 O 1 IO_C15 276 1 Z
+bit 276 C 1 *
+bit 275 I 1 IO_B15
+bit 274 O 1 IO_B15 273 1 Z
+bit 273 C 1 *
+bit 272 I 1 IO_A15
+bit 271 O 1 IO_A15 270 1 Z
+bit 270 C 1 *
+bit 269 I 1 IO_A16
+bit 268 O 1 IO_A16 267 1 Z
+bit 267 C 1 *
+bit 266 I 1 IO_B16
+bit 265 O 1 IO_B16 264 1 Z
+bit 264 C 1 *
+bit 263 I 1 IO_C16
+bit 262 O 1 IO_C16 261 1 Z
+bit 261 C 1 *
+bit 260 I 1 IO_D16
+bit 259 O 1 IO_D16 258 1 Z
+bit 258 C 1 *
+bit 257 I 1 IO_E16
+bit 256 O 1 IO_E16 255 1 Z
+bit 255 C 1 *
+bit 254 I 1 IO_F16
+bit 253 O 1 IO_F16 252 1 Z
+bit 252 C 1 *
+bit 251 I 1 IO_G16
+bit 250 O 1 IO_G16 249 1 Z
+bit 249 C 1 *
+bit 248 I 1 IO_H16
+bit 247 O 1 IO_H16 246 1 Z
+bit 246 C 1 *
+bit 245 I 1 IO_J16
+bit 244 O 1 IO_J16 243 1 Z
+bit 243 C 1 *
+bit 242 I 1 IO_K16
+bit 241 O 1 IO_K16 240 1 Z
+bit 240 C 1 *
+bit 239 I 1 IO_J17
+bit 238 O 1 IO_J17 237 1 Z
+bit 237 C 1 *
+bit 236 I 1 IO_B17
+bit 235 O 1 IO_B17 234 1 Z
+bit 234 C 1 *
+bit 233 I 1 IO_C17
+bit 232 O 1 IO_C17 231 1 Z
+bit 231 C 1 *
+bit 230 I 1 IO_F17
+bit 229 O 1 IO_F17 228 1 Z
+bit 228 C 1 *
+bit 227 I 1 IO_G17
+bit 226 O 1 IO_G17 225 1 Z
+bit 225 C 1 *
+bit 224 O 1 *
+bit 223 O 1 *
+bit 222 O 1 *
+bit 221 I 1 IO_K17
+bit 220 O 1 IO_K17 219 1 Z
+bit 219 C 1 *
+bit 218 I 1 IO_K18
+bit 217 O 1 IO_K18 216 1 Z
+bit 216 C 1 *
+bit 215 I 1 IO_A18
+bit 214 O 1 IO_A18 213 1 Z
+bit 213 C 1 *
+bit 212 I 1 IO_B18
+bit 211 O 1 IO_B18 210 1 Z
+bit 210 C 1 *
+bit 209 O 1 *
+bit 208 O 1 *
+bit 207 O 1 *
+bit 206 I 1 IO_D18
+bit 205 O 1 IO_D18 204 1 Z
+bit 204 C 1 *
+bit 203 I 1 IO_E18
+bit 202 O 1 IO_E18 201 1 Z
+bit 201 C 1 *
+bit 200 I 1 IO_H18
+bit 199 O 1 IO_H18 198 1 Z
+bit 198 C 1 *
+bit 197 I 1 IO_J18
+bit 196 O 1 IO_J18 195 1 Z
+bit 195 C 1 *
+bit 194 I 1 IO_F18
+bit 193 O 1 IO_F18 192 1 Z
+bit 192 C 1 *
+bit 191 I 1 IO_A19
+bit 190 O 1 IO_A19 189 1 Z
+bit 189 C 1 *
+bit 188 I 1 IO_B19
+bit 187 O 1 IO_B19 186 1 Z
+bit 186 C 1 *
+bit 185 I 1 IO_C19
+bit 184 O 1 IO_C19 183 1 Z
+bit 183 C 1 *
+bit 182 I 1 IO_D19
+bit 181 O 1 IO_D19 180 1 Z
+bit 180 C 1 *
+bit 179 O 1 *
+bit 178 O 1 *
+bit 177 O 1 *
+bit 176 I 1 IO_E19
+bit 175 O 1 IO_E19 174 1 Z
+bit 174 C 1 *
+bit 173 I 1 IO_F19
+bit 172 O 1 IO_F19 171 1 Z
+bit 171 C 1 *
+bit 170 I 1 IO_G19
+bit 169 O 1 IO_G19 168 1 Z
+bit 168 C 1 *
+bit 167 I 1 IO_H19
+bit 166 O 1 IO_H19 165 1 Z
+bit 165 C 1 *
+bit 164 O 1 *
+bit 163 O 1 *
+bit 162 O 1 *
+bit 161 I 1 IO_J19
+bit 160 O 1 IO_J19 159 1 Z
+bit 159 C 1 *
+bit 158 I 1 IO_K19
+bit 157 O 1 IO_K19 156 1 Z
+bit 156 C 1 *
+bit 155 I 1 IO_A20
+bit 154 O 1 IO_A20 153 1 Z
+bit 153 C 1 *
+bit 152 I 1 IO_B20
+bit 151 O 1 IO_B20 150 1 Z
+bit 150 C 1 *
+bit 149 O 1 *
+bit 148 O 1 *
+bit 147 O 1 *
+bit 146 I 1 IO_C20
+bit 145 O 1 IO_C20 144 1 Z
+bit 144 C 1 *
+bit 143 I 1 IO_D20
+bit 142 O 1 IO_D20 141 1 Z
+bit 141 C 1 *
+bit 140 I 1 IO_E20
+bit 139 O 1 IO_E20 138 1 Z
+bit 138 C 1 *
+bit 137 I 1 IO_F20
+bit 136 O 1 IO_F20 135 1 Z
+bit 135 C 1 *
+bit 134 O 1 *
+bit 133 O 1 *
+bit 132 O 1 *
+bit 131 I 1 IO_G20
+bit 130 O 1 IO_G20 129 1 Z
+bit 129 C 1 *
+bit 128 I 1 IO_H20
+bit 127 O 1 IO_H20 126 1 Z
+bit 126 C 1 *
+bit 125 I 1 IO_B21
+bit 124 O 1 IO_B21 123 1 Z
+bit 123 C 1 *
+bit 122 I 1 IO_C21
+bit 121 O 1 IO_C21 120 1 Z
+bit 120 C 1 *
+bit 119 I 1 IO_K20
+bit 118 O 1 IO_K20 117 1 Z
+bit 117 C 1 *
+bit 116 I 1 IO_F21
+bit 115 O 1 IO_F21 114 1 Z
+bit 114 C 1 *
+bit 113 I 1 IO_G21
+bit 112 O 1 IO_G21 111 1 Z
+bit 111 C 1 *
+bit 110 I 1 IO_A22
+bit 109 O 1 IO_A22 108 1 Z
+bit 108 C 1 *
+bit 107 I 1 IO_B22
+bit 106 O 1 IO_B22 105 1 Z
+bit 105 C 1 *
+bit 104 I 1 IO_J21
+bit 103 O 1 IO_J21 102 1 Z
+bit 102 C 1 *
+bit 101 I 1 IO_D22
+bit 100 O 1 IO_D22 99 1 Z
+bit 99 C 1 *
+bit 98 I 1 IO_E22
+bit 97 O 1 IO_E22 96 1 Z
+bit 96 C 1 *
+bit 95 I 1 IO_F22
+bit 94 O 1 IO_F22 93 1 Z
+bit 93 C 1 *
+bit 92 I 1 IO_E23
+bit 91 O 1 IO_E23 90 1 Z
+bit 90 C 1 *
+bit 89 O 1 *
+bit 88 O 1 *
+bit 87 O 1 *
+bit 86 I 1 IO_H22
+bit 85 O 1 IO_H22 84 1 Z
+bit 84 C 1 *
+bit 83 I 1 IO_J22
+bit 82 O 1 IO_J22 81 1 Z
+bit 81 C 1 *
+bit 80 I 1 IO_A23
+bit 79 O 1 IO_A23 78 1 Z
+bit 78 C 1 *
+bit 77 I 1 IO_B23
+bit 76 O 1 IO_B23 75 1 Z
+bit 75 C 1 *
+bit 74 O 1 *
+bit 73 O 1 *
+bit 72 O 1 *
+bit 71 I 1 IO_C23
+bit 70 O 1 IO_C23 69 1 Z
+bit 69 C 1 *
+bit 68 I 1 IO_D23
+bit 67 O 1 IO_D23 66 1 Z
+bit 66 C 1 *
+bit 65 I 1 IO_F23
+bit 64 O 1 IO_F23 63 1 Z
+bit 63 C 1 *
+bit 62 I 1 IO_G23
+bit 61 O 1 IO_G23 60 1 Z
+bit 60 C 1 *
+bit 59 O 1 *
+bit 58 O 1 *
+bit 57 O 1 *
+bit 56 I 1 IO_H23
+bit 55 O 1 IO_H23 54 1 Z
+bit 54 C 1 *
+bit 53 I 1 IO_G24
+bit 52 O 1 IO_G24 51 1 Z
+bit 51 C 1 *
+bit 50 I 1 IO_A24
+bit 49 O 1 IO_A24 48 1 Z
+bit 48 C 1 *
+bit 47 I 1 IO_B24
+bit 46 O 1 IO_B24 45 1 Z
+bit 45 C 1 *
+bit 44 O 1 *
+bit 43 O 1 *
+bit 42 O 1 *
+bit 41 I 1 IO_C24
+bit 40 O 1 IO_C24 39 1 Z
+bit 39 C 1 *
+bit 38 I 1 IO_D24
+bit 37 O 1 IO_D24 36 1 Z
+bit 36 C 1 *
+bit 35 I 1 IO_F24
+bit 34 O 1 IO_F24 33 1 Z
+bit 33 C 1 *
+bit 32 I 1 IO_F25
+bit 31 O 1 IO_F25 30 1 Z
+bit 30 C 1 *
+bit 29 I 1 IO_E25
+bit 28 O 1 IO_E25 27 1 Z
+bit 27 C 1 *
+bit 26 I 1 IO_B25
+bit 25 O 1 IO_B25 24 1 Z
+bit 24 C 1 *
+bit 23 I 1 IO_C25
+bit 22 O 1 IO_C25 21 1 Z
+bit 21 C 1 *
+bit 20 I 1 IO_A26
+bit 19 O 1 IO_A26 18 1 Z
+bit 18 C 1 *
+bit 17 I 1 IO_B26
+bit 16 O 1 IO_B26 15 1 Z
+bit 15 C 1 *
+bit 14 O 1 *
+bit 13 O 1 *
+bit 12 O 1 *
+bit 11 I 1 IO_D26
+bit 10 O 1 IO_D26 9 1 Z
+bit 9 C 1 *
+bit 8 I 1 IO_C27
+bit 7 O 1 IO_C27 6 1 Z
+bit 6 C 1 *
+bit 5 I 1 IO_A27
+bit 4 O 1 IO_A27 3 1 Z
+bit 3 C 1 *
+bit 2 I 1 IO_B27
+bit 1 O 1 IO_B27 0 1 Z
+bit 0 C 1 *
--- /dev/null
+0000 xc3s50 0
--- /dev/null
+signal GND1
+signal GND2
+signal GND3
+signal GND4
+signal GND5
+signal GND6
+signal GND7
+signal GND8
+signal GND9
+signal GND10
+signal GND11
+signal GND12
+signal GND13
+signal GND14
+signal GND15
+signal GND16
+signal GND17
+signal GND18
+signal GND19
+signal GND20
+signal GND21
+signal GND22
+signal GND23
+signal GND24
+signal GND25
+signal GND26
+signal GND27
+signal GND28
+signal GND29
+signal GND30
+signal GND31
+signal GND32
+signal CCLK_PAD134
+signal DONE_PAD133
+signal HSWAP_EN_PAD25
+signal M0_PAD83
+signal M1_PAD82
+signal M2_PAD84
+signal PROG_B
+signal TCK
+signal TDI
+signal TDO
+signal TMS
+signal VCCAUX1
+signal VCCAUX2
+signal VCCAUX3
+signal VCCAUX4
+signal VCCAUX5
+signal VCCAUX6
+signal VCCAUX7
+signal VCCAUX8
+signal VCCINT1
+signal VCCINT2
+signal VCCINT3
+signal VCCINT4
+signal VCCINT5
+signal VCCINT6
+signal VCCINT7
+signal VCCINT8
+signal VCCO01
+signal VCCO02
+signal VCCO03
+signal VCCO04
+signal VCCO11
+signal VCCO12
+signal VCCO13
+signal VCCO14
+signal VCCO21
+signal VCCO22
+signal VCCO23
+signal VCCO24
+signal VCCO31
+signal VCCO32
+signal VCCO33
+signal VCCO34
+signal VCCO41
+signal VCCO42
+signal VCCO43
+signal VCCO44
+signal VCCO51
+signal VCCO52
+signal VCCO53
+signal VCCO54
+signal VCCO61
+signal VCCO62
+signal VCCO63
+signal VCCO64
+signal VCCO71
+signal VCCO72
+signal VCCO73
+signal VCCO74
+signal IO_PAD2
+signal IO_PAD3
+signal IO_PAD4
+signal IO_PAD6
+signal IO_PAD8
+signal IO_PAD9
+signal IO_PAD10
+signal IO_PAD14
+signal IO_PAD16
+signal IO_PAD17
+signal IO_PAD18
+signal IO_PAD19
+signal IO_PAD22
+signal IO_PAD23
+signal IO_PAD24
+signal IO_PAD29
+signal IO_PAD30
+signal IO_PAD32
+signal IO_PAD34
+signal IO_PAD35
+signal IO_PAD36
+signal IO_PAD37
+signal IO_PAD38
+signal IO_PAD40
+signal IO_PAD42
+signal IO_PAD44
+signal IO_PAD46
+signal IO_PAD47
+signal IO_PAD48
+signal IO_PAD51
+signal IO_PAD53
+signal IO_PAD56
+signal IO_PAD58
+signal IO_PAD61
+signal IO_PAD62
+signal IO_PAD63
+signal IO_PAD65
+signal IO_PAD67
+signal IO_PAD69
+signal IO_PAD71
+signal IO_PAD72
+signal IO_PAD73
+signal IO_PAD74
+signal IO_PAD75
+signal IO_PAD77
+signal IO_PAD79
+signal IO_PAD80
+signal IO_PAD85
+signal IO_PAD86
+signal IO_PAD89
+signal IO_PAD90
+signal IO_PAD91
+signal IO_PAD92
+signal IO_PAD93
+signal IO_PAD95
+signal IO_PAD97
+signal IO_PAD100
+signal IO_PAD101
+signal IO_PAD103
+signal IO_PAD105
+signal IO_PAD106
+signal IO_PAD107
+signal IO_PAD110
+signal IO_PAD111
+signal IO_PAD112
+signal IO_PAD114
+signal IO_PAD116
+signal IO_PAD117
+signal IO_PAD118
+signal IO_PAD122
+signal IO_PAD124
+signal IO_PAD125
+signal IO_PAD126
+signal IO_PAD127
+signal IO_PAD130
+signal IO_PAD131
+signal IO_PAD132
+signal IO_PAD137
+signal IO_PAD138
+signal IO_PAD140
+signal IO_PAD142
+signal IO_PAD143
+signal IO_PAD144
+signal IO_PAD145
+signal IO_PAD146
+signal IO_PAD148
+signal IO_PAD150
+signal IO_PAD152
+signal IO_PAD154
+signal IO_PAD155
+signal IO_PAD156
+signal IO_PAD159
+signal IO_PAD161
+signal IO_PAD164
+signal IO_PAD166
+signal IO_PAD169
+signal IO_PAD170
+signal IO_PAD171
+signal IO_PAD173
+signal IO_PAD175
+signal IO_PAD177
+signal IO_PAD179
+signal IO_PAD180
+signal IO_PAD181
+signal IO_PAD182
+signal IO_PAD183
+signal IO_PAD185
+signal IO_PAD187
+signal IO_PAD188
+signal IO_PAD193
+signal IO_PAD194
+signal IO_PAD197
+signal IO_PAD198
+signal IO_PAD199
+signal IO_PAD200
+signal IO_PAD201
+signal IO_PAD203
+signal IO_PAD205
+signal IO_PAD208
+signal IO_PAD209
+signal IO_PAD211
+signal IO_PAD213
+signal IO_PAD214
+
+register BSR 383
+register BR 1
+register DIR 32
+
+instruction length 6
+
+instruction EXTEST 000000 BSR
+instruction SAMPLE/PRELOAD 000001 BSR
+instruction IDCODE 001001 DIR
+instruction BYPASS 111111 BR
+
+bit 382 I 1 IO_PAD188
+bit 381 O 1 IO_PAD188 380 1 Z
+bit 380 C 1 *
+bit 379 I 1 IO_PAD187
+bit 378 O 1 IO_PAD187 377 1 Z
+bit 377 C 1 *
+bit 376 I 1 IO_PAD185
+bit 375 O 1 IO_PAD185 374 1 Z
+bit 374 C 1 *
+bit 373 I 1 IO_PAD183
+bit 372 O 1 IO_PAD183 371 1 Z
+bit 371 C 1 *
+bit 370 I 1 IO_PAD182
+bit 369 O 1 IO_PAD182 368 1 Z
+bit 368 C 1 *
+bit 367 I 1 IO_PAD181
+bit 366 O 1 IO_PAD181 365 1 Z
+bit 365 C 1 *
+bit 364 I 1 IO_PAD180
+bit 363 O 1 IO_PAD180 362 1 Z
+bit 362 C 1 *
+bit 361 I 1 IO_PAD179
+bit 360 O 1 IO_PAD179 359 1 Z
+bit 359 C 1 *
+bit 358 I 1 IO_PAD177
+bit 357 O 1 IO_PAD177 356 1 Z
+bit 356 C 1 *
+bit 355 I 1 IO_PAD175
+bit 354 O 1 IO_PAD175 353 1 Z
+bit 353 C 1 *
+bit 352 I 1 IO_PAD173
+bit 351 O 1 IO_PAD173 350 1 Z
+bit 350 C 1 *
+bit 349 I 1 IO_PAD171
+bit 348 O 1 IO_PAD171 347 1 Z
+bit 347 C 1 *
+bit 346 I 1 IO_PAD170
+bit 345 O 1 IO_PAD170 344 1 Z
+bit 344 C 1 *
+bit 343 I 1 IO_PAD169
+bit 342 O 1 IO_PAD169 341 1 Z
+bit 341 C 1 *
+bit 340 I 1 IO_PAD166
+bit 339 O 1 IO_PAD166 338 1 Z
+bit 338 C 1 *
+bit 337 I 1 IO_PAD164
+bit 336 O 1 IO_PAD164 335 1 Z
+bit 335 C 1 *
+bit 334 I 1 IO_PAD161
+bit 333 O 1 IO_PAD161 332 1 Z
+bit 332 C 1 *
+bit 331 I 1 IO_PAD159
+bit 330 O 1 IO_PAD159 329 1 Z
+bit 329 C 1 *
+bit 328 I 1 IO_PAD156
+bit 327 O 1 IO_PAD156 326 1 Z
+bit 326 C 1 *
+bit 325 I 1 IO_PAD155
+bit 324 O 1 IO_PAD155 323 1 Z
+bit 323 C 1 *
+bit 322 I 1 IO_PAD154
+bit 321 O 1 IO_PAD154 320 1 Z
+bit 320 C 1 *
+bit 319 I 1 IO_PAD152
+bit 318 O 1 IO_PAD152 317 1 Z
+bit 317 C 1 *
+bit 316 I 1 IO_PAD150
+bit 315 O 1 IO_PAD150 314 1 Z
+bit 314 C 1 *
+bit 313 I 1 IO_PAD148
+bit 312 O 1 IO_PAD148 311 1 Z
+bit 311 C 1 *
+bit 310 I 1 IO_PAD146
+bit 309 O 1 IO_PAD146 308 1 Z
+bit 308 C 1 *
+bit 307 I 1 IO_PAD145
+bit 306 O 1 IO_PAD145 305 1 Z
+bit 305 C 1 *
+bit 304 I 1 IO_PAD144
+bit 303 O 1 IO_PAD144 302 1 Z
+bit 302 C 1 *
+bit 301 I 1 IO_PAD143
+bit 300 O 1 IO_PAD143 299 1 Z
+bit 299 C 1 *
+bit 298 I 1 IO_PAD142
+bit 297 O 1 IO_PAD142 296 1 Z
+bit 296 C 1 *
+bit 295 I 1 IO_PAD140
+bit 294 O 1 IO_PAD140 293 1 Z
+bit 293 C 1 *
+bit 292 I 1 IO_PAD138
+bit 291 O 1 IO_PAD138 290 1 Z
+bit 290 C 1 *
+bit 289 I 1 IO_PAD137
+bit 288 O 1 IO_PAD137 287 1 Z
+bit 287 C 1 *
+bit 286 I 1 CCLK_PAD134
+bit 285 O 1 CCLK_PAD134 284 1 Z
+bit 284 C 1 *
+bit 283 I 1 DONE_PAD133
+bit 282 O 1 DONE_PAD133 281 1 Z
+bit 281 C 1 *
+bit 280 I 1 IO_PAD132
+bit 279 O 1 IO_PAD132 278 1 Z
+bit 278 C 1 *
+bit 277 I 1 IO_PAD131
+bit 276 O 1 IO_PAD131 275 1 Z
+bit 275 C 1 *
+bit 274 I 1 IO_PAD130
+bit 273 O 1 IO_PAD130 272 1 Z
+bit 272 C 1 *
+bit 271 I 1 IO_PAD127
+bit 270 O 1 IO_PAD127 269 1 Z
+bit 269 C 1 *
+bit 268 I 1 IO_PAD126
+bit 267 O 1 IO_PAD126 266 1 Z
+bit 266 C 1 *
+bit 265 I 1 IO_PAD125
+bit 264 O 1 IO_PAD125 263 1 Z
+bit 263 C 1 *
+bit 262 I 1 IO_PAD124
+bit 261 O 1 IO_PAD124 260 1 Z
+bit 260 C 1 *
+bit 259 I 1 IO_PAD122
+bit 258 O 1 IO_PAD122 257 1 Z
+bit 257 C 1 *
+bit 256 I 1 IO_PAD118
+bit 255 O 1 IO_PAD118 254 1 Z
+bit 254 C 1 *
+bit 253 I 1 IO_PAD117
+bit 252 O 1 IO_PAD117 251 1 Z
+bit 251 C 1 *
+bit 250 I 1 IO_PAD116
+bit 249 O 1 IO_PAD116 248 1 Z
+bit 248 C 1 *
+bit 247 I 1 IO_PAD114
+bit 246 O 1 IO_PAD114 245 1 Z
+bit 245 C 1 *
+bit 244 I 1 IO_PAD112
+bit 243 O 1 IO_PAD112 242 1 Z
+bit 242 C 1 *
+bit 241 I 1 IO_PAD111
+bit 240 O 1 IO_PAD111 239 1 Z
+bit 239 C 1 *
+bit 238 I 1 IO_PAD110
+bit 237 O 1 IO_PAD110 236 1 Z
+bit 236 C 1 *
+bit 235 I 1 IO_PAD107
+bit 234 O 1 IO_PAD107 233 1 Z
+bit 233 C 1 *
+bit 232 I 1 IO_PAD106
+bit 231 O 1 IO_PAD106 230 1 Z
+bit 230 C 1 *
+bit 229 I 1 IO_PAD105
+bit 228 O 1 IO_PAD105 227 1 Z
+bit 227 C 1 *
+bit 226 I 1 IO_PAD103
+bit 225 O 1 IO_PAD103 224 1 Z
+bit 224 C 1 *
+bit 223 I 1 IO_PAD101
+bit 222 O 1 IO_PAD101 221 1 Z
+bit 221 C 1 *
+bit 220 I 1 IO_PAD100
+bit 219 O 1 IO_PAD100 218 1 Z
+bit 218 C 1 *
+bit 217 I 1 IO_PAD97
+bit 216 O 1 IO_PAD97 215 1 Z
+bit 215 C 1 *
+bit 214 I 1 IO_PAD95
+bit 213 O 1 IO_PAD95 212 1 Z
+bit 212 C 1 *
+bit 211 I 1 IO_PAD93
+bit 210 O 1 IO_PAD93 209 1 Z
+bit 209 C 1 *
+bit 208 I 1 IO_PAD92
+bit 207 O 1 IO_PAD92 206 1 Z
+bit 206 C 1 *
+bit 205 I 1 IO_PAD91
+bit 204 O 1 IO_PAD91 203 1 Z
+bit 203 C 1 *
+bit 202 I 1 IO_PAD90
+bit 201 O 1 IO_PAD90 200 1 Z
+bit 200 C 1 *
+bit 199 I 1 IO_PAD89
+bit 198 O 1 IO_PAD89 197 1 Z
+bit 197 C 1 *
+bit 196 I 1 IO_PAD86
+bit 195 O 1 IO_PAD86 194 1 Z
+bit 194 C 1 *
+bit 193 I 1 IO_PAD85
+bit 192 O 1 IO_PAD85 191 1 Z
+bit 191 C 1 *
+bit 190 I 1 M2_PAD84
+bit 189 I 1 M0_PAD83
+bit 188 I 1 M1_PAD82
+bit 187 I 1 IO_PAD80
+bit 186 O 1 IO_PAD80 185 1 Z
+bit 185 C 1 *
+bit 184 I 1 IO_PAD79
+bit 183 O 1 IO_PAD79 182 1 Z
+bit 182 C 1 *
+bit 181 I 1 IO_PAD77
+bit 180 O 1 IO_PAD77 179 1 Z
+bit 179 C 1 *
+bit 178 I 1 IO_PAD75
+bit 177 O 1 IO_PAD75 176 1 Z
+bit 176 C 1 *
+bit 175 I 1 IO_PAD74
+bit 174 O 1 IO_PAD74 173 1 Z
+bit 173 C 1 *
+bit 172 I 1 IO_PAD73
+bit 171 O 1 IO_PAD73 170 1 Z
+bit 170 C 1 *
+bit 169 I 1 IO_PAD72
+bit 168 O 1 IO_PAD72 167 1 Z
+bit 167 C 1 *
+bit 166 I 1 IO_PAD71
+bit 165 O 1 IO_PAD71 164 1 Z
+bit 164 C 1 *
+bit 163 I 1 IO_PAD69
+bit 162 O 1 IO_PAD69 161 1 Z
+bit 161 C 1 *
+bit 160 I 1 IO_PAD67
+bit 159 O 1 IO_PAD67 158 1 Z
+bit 158 C 1 *
+bit 157 I 1 IO_PAD65
+bit 156 O 1 IO_PAD65 155 1 Z
+bit 155 C 1 *
+bit 154 I 1 IO_PAD63
+bit 153 O 1 IO_PAD63 152 1 Z
+bit 152 C 1 *
+bit 151 I 1 IO_PAD62
+bit 150 O 1 IO_PAD62 149 1 Z
+bit 149 C 1 *
+bit 148 I 1 IO_PAD61
+bit 147 O 1 IO_PAD61 146 1 Z
+bit 146 C 1 *
+bit 145 I 1 IO_PAD58
+bit 144 O 1 IO_PAD58 143 1 Z
+bit 143 C 1 *
+bit 142 I 1 IO_PAD56
+bit 141 O 1 IO_PAD56 140 1 Z
+bit 140 C 1 *
+bit 139 I 1 IO_PAD53
+bit 138 O 1 IO_PAD53 137 1 Z
+bit 137 C 1 *
+bit 136 I 1 IO_PAD51
+bit 135 O 1 IO_PAD51 134 1 Z
+bit 134 C 1 *
+bit 133 I 1 IO_PAD48
+bit 132 O 1 IO_PAD48 131 1 Z
+bit 131 C 1 *
+bit 130 I 1 IO_PAD47
+bit 129 O 1 IO_PAD47 128 1 Z
+bit 128 C 1 *
+bit 127 I 1 IO_PAD46
+bit 126 O 1 IO_PAD46 125 1 Z
+bit 125 C 1 *
+bit 124 I 1 IO_PAD44
+bit 123 O 1 IO_PAD44 122 1 Z
+bit 122 C 1 *
+bit 121 I 1 IO_PAD42
+bit 120 O 1 IO_PAD42 119 1 Z
+bit 119 C 1 *
+bit 118 I 1 IO_PAD40
+bit 117 O 1 IO_PAD40 116 1 Z
+bit 116 C 1 *
+bit 115 I 1 IO_PAD38
+bit 114 O 1 IO_PAD38 113 1 Z
+bit 113 C 1 *
+bit 112 I 1 IO_PAD37
+bit 111 O 1 IO_PAD37 110 1 Z
+bit 110 C 1 *
+bit 109 I 1 IO_PAD36
+bit 108 O 1 IO_PAD36 107 1 Z
+bit 107 C 1 *
+bit 106 I 1 IO_PAD35
+bit 105 O 1 IO_PAD35 104 1 Z
+bit 104 C 1 *
+bit 103 I 1 IO_PAD34
+bit 102 O 1 IO_PAD34 101 1 Z
+bit 101 C 1 *
+bit 100 I 1 IO_PAD32
+bit 99 O 1 IO_PAD32 98 1 Z
+bit 98 C 1 *
+bit 97 I 1 IO_PAD30
+bit 96 O 1 IO_PAD30 95 1 Z
+bit 95 C 1 *
+bit 94 I 1 IO_PAD29
+bit 93 O 1 IO_PAD29 92 1 Z
+bit 92 C 1 *
+bit 91 O 1 *
+bit 90 I 1 HSWAP_EN_PAD25
+bit 89 I 1 IO_PAD24
+bit 88 O 1 IO_PAD24 87 1 Z
+bit 87 C 1 *
+bit 86 I 1 IO_PAD23
+bit 85 O 1 IO_PAD23 84 1 Z
+bit 84 C 1 *
+bit 83 I 1 IO_PAD22
+bit 82 O 1 IO_PAD22 81 1 Z
+bit 81 C 1 *
+bit 80 I 1 IO_PAD19
+bit 79 O 1 IO_PAD19 78 1 Z
+bit 78 C 1 *
+bit 77 I 1 IO_PAD18
+bit 76 O 1 IO_PAD18 75 1 Z
+bit 75 C 1 *
+bit 74 I 1 IO_PAD17
+bit 73 O 1 IO_PAD17 72 1 Z
+bit 72 C 1 *
+bit 71 I 1 IO_PAD16
+bit 70 O 1 IO_PAD16 69 1 Z
+bit 69 C 1 *
+bit 68 I 1 IO_PAD14
+bit 67 O 1 IO_PAD14 66 1 Z
+bit 66 C 1 *
+bit 65 I 1 IO_PAD10
+bit 64 O 1 IO_PAD10 63 1 Z
+bit 63 C 1 *
+bit 62 I 1 IO_PAD9
+bit 61 O 1 IO_PAD9 60 1 Z
+bit 60 C 1 *
+bit 59 I 1 IO_PAD8
+bit 58 O 1 IO_PAD8 57 1 Z
+bit 57 C 1 *
+bit 56 I 1 IO_PAD6
+bit 55 O 1 IO_PAD6 54 1 Z
+bit 54 C 1 *
+bit 53 I 1 IO_PAD4
+bit 52 O 1 IO_PAD4 51 1 Z
+bit 51 C 1 *
+bit 50 I 1 IO_PAD3
+bit 49 O 1 IO_PAD3 48 1 Z
+bit 48 C 1 *
+bit 47 I 1 IO_PAD2
+bit 46 O 1 IO_PAD2 45 1 Z
+bit 45 C 1 *
+bit 44 I 1 IO_PAD215
+bit 43 O 1 IO_PAD215 42 1 Z
+bit 42 C 1 *
+bit 41 I 1 IO_PAD214
+bit 40 O 1 IO_PAD214 39 1 Z
+bit 39 C 1 *
+bit 38 I 1 IO_PAD213
+bit 37 O 1 IO_PAD213 36 1 Z
+bit 36 C 1 *
+bit 35 I 1 IO_PAD211
+bit 34 O 1 IO_PAD211 33 1 Z
+bit 33 C 1 *
+bit 32 I 1 IO_PAD209
+bit 31 O 1 IO_PAD209 30 1 Z
+bit 30 C 1 *
+bit 29 I 1 IO_PAD208
+bit 28 O 1 IO_PAD208 27 1 Z
+bit 27 C 1 *
+bit 26 I 1 IO_PAD205
+bit 25 O 1 IO_PAD205 24 1 Z
+bit 24 C 1 *
+bit 23 I 1 IO_PAD203
+bit 22 O 1 IO_PAD203 21 1 Z
+bit 21 C 1 *
+bit 20 I 1 IO_PAD201
+bit 19 O 1 IO_PAD201 18 1 Z
+bit 18 C 1 *
+bit 17 I 1 IO_PAD200
+bit 16 O 1 IO_PAD200 15 1 Z
+bit 15 C 1 *
+bit 14 I 1 IO_PAD199
+bit 13 O 1 IO_PAD199 12 1 Z
+bit 12 C 1 *
+bit 11 I 1 IO_PAD198
+bit 10 O 1 IO_PAD198 9 1 Z
+bit 9 C 1 *
+bit 8 I 1 IO_PAD197
+bit 7 O 1 IO_PAD197 6 1 Z
+bit 6 C 1 *
+bit 5 I 1 IO_PAD194
+bit 4 O 1 IO_PAD194 3 1 Z
+bit 3 C 1 *
+bit 2 I 1 IO_PAD193
+bit 1 O 1 IO_PAD193 0 1 Z
+bit 0 C 1 *
--- /dev/null
+signal CCLK_P14
+signal DONE_P13
+signal GND1
+signal GND2
+signal GND3
+signal GND4
+signal GND5
+signal GND6
+signal GND7
+signal GND8
+signal GND9
+signal GND10
+signal GND11
+signal GND12
+signal HSWAP_EN_B3
+signal M0_N1
+signal M1_M2
+signal M2_P1
+signal PROG_B
+signal TCK
+signal TDI
+signal TDO
+signal TMS
+signal VCCAUX1
+signal VCCAUX2
+signal VCCAUX3
+signal VCCAUX4
+signal VCCINT1
+signal VCCINT2
+signal VCCINT3
+signal VCCINT4
+signal VCCO011
+signal VCCO012
+signal VCCO013
+signal VCCO231
+signal VCCO232
+signal VCCO233
+signal VCCO451
+signal VCCO452
+signal VCCO453
+signal VCCO671
+signal VCCO672
+signal VCCO673
+signal IO_A3
+signal IO_A6
+signal IO_A7
+signal IO_A8
+signal IO_A9
+signal IO_A10
+signal IO_A11
+signal IO_A12
+signal IO_A13
+signal IO_B1
+signal IO_B2
+signal IO_B5
+signal IO_B6
+signal IO_B7
+signal IO_B11
+signal IO_B13
+signal IO_C1
+signal IO_C4
+signal IO_C5
+signal IO_C7
+signal IO_C8
+signal IO_C9
+signal IO_C11
+signal IO_C14
+signal IO_D1
+signal IO_D2
+signal IO_D3
+signal IO_D12
+signal IO_E1
+signal IO_E2
+signal IO_E3
+signal IO_E12
+signal IO_E13
+signal IO_E14
+signal IO_F2
+signal IO_F3
+signal IO_F12
+signal IO_F13
+signal IO_F14
+signal IO_G1
+signal IO_G3
+signal IO_G12
+signal IO_G13
+signal IO_G14
+signal IO_H1
+signal IO_H2
+signal IO_H3
+signal IO_H12
+signal IO_H14
+signal IO_J1
+signal IO_J2
+signal IO_J3
+signal IO_J12
+signal IO_J13
+signal IO_K1
+signal IO_K2
+signal IO_K3
+signal IO_K12
+signal IO_K13
+signal IO_K14
+signal IO_L3
+signal IO_L12
+signal IO_L13
+signal IO_L14
+signal IO_M1
+signal IO_M4
+signal IO_M6
+signal IO_M7
+signal IO_M8
+signal IO_M10
+signal IO_M11
+signal IO_M14
+signal IO_N2
+signal IO_N4
+signal IO_N8
+signal IO_N9
+signal IO_N10
+signal IO_N12
+signal IO_N13
+signal IO_N14
+signal IO_P2
+signal IO_P3
+signal IO_P4
+signal IO_P5
+signal IO_P6
+signal IO_P7
+signal IO_P8
+signal IO_P9
+
+register BSR 383
+register BR 1
+register DIR 32
+
+instruction length 6
+
+instruction EXTEST 000000 BSR
+instruction SAMPLE/PRELOAD 000001 BSR
+instruction IDCODE 001001 DIR
+instruction BYPASS 111111 BR
+
+bit 382 I 1 IO_D12
+bit 381 O 1 IO_D12 380 1 Z
+bit 380 C 1 *
+bit 379 I 1 IO_C14
+bit 378 O 1 IO_C14 377 1 Z
+bit 377 C 1 *
+bit 376 O 1 *
+bit 375 O 1 *
+bit 374 O 1 *
+bit 373 O 1 *
+bit 372 O 1 *
+bit 371 O 1 *
+bit 370 I 1 IO_E12
+bit 369 O 1 IO_E12 368 1 Z
+bit 368 C 1 *
+bit 367 I 1 IO_E13
+bit 366 O 1 IO_E13 365 1 Z
+bit 365 C 1 *
+bit 364 I 1 IO_E14
+bit 363 O 1 IO_E14 362 1 Z
+bit 362 C 1 *
+bit 361 I 1 IO_F12
+bit 360 O 1 IO_F12 359 1 Z
+bit 359 C 1 *
+bit 358 O 1 *
+bit 357 O 1 *
+bit 356 O 1 *
+bit 355 O 1 *
+bit 354 O 1 *
+bit 353 O 1 *
+bit 352 I 1 IO_F13
+bit 351 O 1 IO_F13 350 1 Z
+bit 350 C 1 *
+bit 349 I 1 IO_F14
+bit 348 O 1 IO_F14 347 1 Z
+bit 347 C 1 *
+bit 346 I 1 IO_G12
+bit 345 O 1 IO_G12 344 1 Z
+bit 344 C 1 *
+bit 343 I 1 IO_G13
+bit 342 O 1 IO_G13 341 1 Z
+bit 341 C 1 *
+bit 340 I 1 IO_G14
+bit 339 O 1 IO_G14 338 1 Z
+bit 338 C 1 *
+bit 337 I 1 IO_H12
+bit 336 O 1 IO_H12 335 1 Z
+bit 335 C 1 *
+bit 334 I 1 IO_H14
+bit 333 O 1 IO_H14 332 1 Z
+bit 332 C 1 *
+bit 331 I 1 IO_J13
+bit 330 O 1 IO_J13 329 1 Z
+bit 329 C 1 *
+bit 328 I 1 IO_J12
+bit 327 O 1 IO_J12 326 1 Z
+bit 326 C 1 *
+bit 325 I 1 IO_K14
+bit 324 O 1 IO_K14 323 1 Z
+bit 323 C 1 *
+bit 322 I 1 IO_K13
+bit 321 O 1 IO_K13 320 1 Z
+bit 320 C 1 *
+bit 319 I 1 IO_K12
+bit 318 O 1 IO_K12 317 1 Z
+bit 317 C 1 *
+bit 316 I 1 IO_L14
+bit 315 O 1 IO_L14 314 1 Z
+bit 314 C 1 *
+bit 313 I 1 IO_L13
+bit 312 O 1 IO_L13 311 1 Z
+bit 311 C 1 *
+bit 310 O 1 *
+bit 309 O 1 *
+bit 308 O 1 *
+bit 307 O 1 *
+bit 306 O 1 *
+bit 305 O 1 *
+bit 304 I 1 IO_L12
+bit 303 O 1 IO_L12 302 1 Z
+bit 302 C 1 *
+bit 301 I 1 IO_M14
+bit 300 O 1 IO_M14 299 1 Z
+bit 299 C 1 *
+bit 298 O 1 *
+bit 297 O 1 *
+bit 296 O 1 *
+bit 295 O 1 *
+bit 294 O 1 *
+bit 293 O 1 *
+bit 292 I 1 IO_N13
+bit 291 O 1 IO_N13 290 1 Z
+bit 290 C 1 *
+bit 289 I 1 IO_N14
+bit 288 O 1 IO_N14 287 1 Z
+bit 287 C 1 *
+bit 286 I 1 CCLK_P14
+bit 285 O 1 CCLK_P14 284 1 Z
+bit 284 C 1 *
+bit 283 I 1 DONE_P13
+bit 282 O 1 DONE_P13 281 1 Z
+bit 281 C 1 *
+bit 280 I 1 IO_N12
+bit 279 O 1 IO_N12 278 1 Z
+bit 278 C 1 *
+bit 277 I 1 IO_P12
+bit 276 O 1 IO_P12 275 1 Z
+bit 275 C 1 *
+bit 274 I 1 IO_M11
+bit 273 O 1 IO_M11 272 1 Z
+bit 272 C 1 *
+bit 271 O 1 *
+bit 270 O 1 *
+bit 269 O 1 *
+bit 268 O 1 *
+bit 267 O 1 *
+bit 266 O 1 *
+bit 265 O 1 *
+bit 264 O 1 *
+bit 263 O 1 *
+bit 262 I 1 IO_M10
+bit 261 O 1 IO_M10 260 1 Z
+bit 260 C 1 *
+bit 259 I 1 IO_N10
+bit 258 O 1 IO_N10 257 1 Z
+bit 257 C 1 *
+bit 256 I 1 IO_N9
+bit 255 O 1 IO_N9 254 1 Z
+bit 254 C 1 *
+bit 253 I 1 IO_P9
+bit 252 O 1 IO_P9 251 1 Z
+bit 251 C 1 *
+bit 250 O 1 *
+bit 249 O 1 *
+bit 248 O 1 *
+bit 247 I 1 IO_M8
+bit 246 O 1 IO_M8 245 1 Z
+bit 245 C 1 *
+bit 244 I 1 IO_N8
+bit 243 O 1 IO_N8 242 1 Z
+bit 242 C 1 *
+bit 241 I 1 IO_P8
+bit 240 O 1 IO_P8 239 1 Z
+bit 239 C 1 *
+bit 238 I 1 IO_M7
+bit 237 O 1 IO_M7 236 1 Z
+bit 236 C 1 *
+bit 235 O 1 *
+bit 234 O 1 *
+bit 233 O 1 *
+bit 232 I 1 IO_P7
+bit 231 O 1 IO_P7 230 1 Z
+bit 230 C 1 *
+bit 229 I 1 IO_P6
+bit 228 O 1 IO_P6 227 1 Z
+bit 227 C 1 *
+bit 226 I 1 IO_M6
+bit 225 O 1 IO_M6 224 1 Z
+bit 224 C 1 *
+bit 223 I 1 IO_P5
+bit 222 O 1 IO_P5 221 1 Z
+bit 221 C 1 *
+bit 220 O 1 *
+bit 219 O 1 *
+bit 218 O 1 *
+bit 217 I 1 IO_P4
+bit 216 O 1 IO_P4 215 1 Z
+bit 215 C 1 *
+bit 214 I 1 IO_N4
+bit 213 O 1 IO_N4 212 1 Z
+bit 212 C 1 *
+bit 211 I 1 IO_M4
+bit 210 O 1 IO_M4 209 1 Z
+bit 209 C 1 *
+bit 208 I 1 IO_P3
+bit 207 O 1 IO_P3 206 1 Z
+bit 206 C 1 *
+bit 205 O 1 *
+bit 204 O 1 *
+bit 203 O 1 *
+bit 202 O 1 *
+bit 201 O 1 *
+bit 200 O 1 *
+bit 199 O 1 *
+bit 198 O 1 *
+bit 197 O 1 *
+bit 196 I 1 IO_P2
+bit 195 O 1 IO_P2 194 1 Z
+bit 194 C 1 *
+bit 193 I 1 IO_N2
+bit 192 O 1 IO_N2 191 1 Z
+bit 191 C 1 *
+bit 190 I 1 M2_P1
+bit 189 I 1 M0_N1
+bit 188 I 1 M1_M2
+bit 187 I 1 IO_L3
+bit 186 O 1 IO_L3 185 1 Z
+bit 185 C 1 *
+bit 184 I 1 IO_M1
+bit 183 O 1 IO_M1 182 1 Z
+bit 182 C 1 *
+bit 181 O 1 *
+bit 180 O 1 *
+bit 179 O 1 *
+bit 178 O 1 *
+bit 177 O 1 *
+bit 176 O 1 *
+bit 175 I 1 IO_K3
+bit 174 O 1 IO_K3 173 1 Z
+bit 173 C 1 *
+bit 172 I 1 IO_K2
+bit 171 O 1 IO_K2 170 1 Z
+bit 170 C 1 *
+bit 169 O 1 *
+bit 168 O 1 *
+bit 167 O 1 *
+bit 166 O 1 *
+bit 165 O 1 *
+bit 164 O 1 *
+bit 163 I 1 IO_K1
+bit 162 O 1 IO_K1 161 1 Z
+bit 161 C 1 *
+bit 160 I 1 IO_J3
+bit 159 O 1 IO_J3 158 1 Z
+bit 158 C 1 *
+bit 157 I 1 IO_J2
+bit 156 O 1 IO_J2 155 1 Z
+bit 155 C 1 *
+bit 154 I 1 IO_J1
+bit 153 O 1 IO_J1 152 1 Z
+bit 152 C 1 *
+bit 151 I 1 IO_H3
+bit 150 O 1 IO_H3 149 1 Z
+bit 149 C 1 *
+bit 148 I 1 IO_H2
+bit 147 O 1 IO_H2 146 1 Z
+bit 146 C 1 *
+bit 145 I 1 IO_H1
+bit 144 O 1 IO_H1 143 1 Z
+bit 143 C 1 *
+bit 142 I 1 IO_G3
+bit 141 O 1 IO_G3 140 1 Z
+bit 140 C 1 *
+bit 139 I 1 IO_G1
+bit 138 O 1 IO_G1 137 1 Z
+bit 137 C 1 *
+bit 136 I 1 IO_F2
+bit 135 O 1 IO_F2 134 1 Z
+bit 134 C 1 *
+bit 133 I 1 IO_F3
+bit 132 O 1 IO_F3 131 1 Z
+bit 131 C 1 *
+bit 130 I 1 IO_E1
+bit 129 O 1 IO_E1 128 1 Z
+bit 128 C 1 *
+bit 127 I 1 IO_E2
+bit 126 O 1 IO_E2 125 1 Z
+bit 125 C 1 *
+bit 124 I 1 IO_E3
+bit 123 O 1 IO_E3 122 1 Z
+bit 122 C 1 *
+bit 121 I 1 IO_D1
+bit 120 O 1 IO_D1 119 1 Z
+bit 119 C 1 *
+bit 118 I 1 IO_D2
+bit 117 O 1 IO_D2 116 1 Z
+bit 116 C 1 *
+bit 115 I 1 IO_C1
+bit 114 O 1 IO_C1 113 1 Z
+bit 113 C 1 *
+bit 112 I 1 IO_D3
+bit 111 O 1 IO_D3 110 1 Z
+bit 110 C 1 *
+bit 109 O 1 *
+bit 108 O 1 *
+bit 107 O 1 *
+bit 106 O 1 *
+bit 105 O 1 *
+bit 104 O 1 *
+bit 103 O 1 *
+bit 102 O 1 *
+bit 101 O 1 *
+bit 100 O 1 *
+bit 99 O 1 *
+bit 98 O 1 *
+bit 97 I 1 IO_B2
+bit 96 O 1 IO_B2 95 1 Z
+bit 95 C 1 *
+bit 94 I 1 IO_B1
+bit 93 O 1 IO_B1 92 1 Z
+bit 92 C 1 *
+bit 91 O 1 *
+bit 90 I 1 HSWAP_EN_B3
+bit 89 O 1 *
+bit 88 O 1 *
+bit 87 O 1 *
+bit 86 I 1 IO_A3
+bit 85 O 1 IO_A3 84 1 Z
+bit 84 C 1 *
+bit 83 I 1 IO_C4
+bit 82 O 1 IO_C4 81 1 Z
+bit 81 C 1 *
+bit 80 O 1 *
+bit 79 O 1 *
+bit 78 O 1 *
+bit 77 O 1 *
+bit 76 O 1 *
+bit 75 O 1 *
+bit 74 O 1 *
+bit 73 O 1 *
+bit 72 O 1 *
+bit 71 I 1 IO_C5
+bit 70 O 1 IO_C5 69 1 Z
+bit 69 C 1 *
+bit 68 I 1 IO_B5
+bit 67 O 1 IO_B5 66 1 Z
+bit 66 C 1 *
+bit 65 I 1 IO_B6
+bit 64 O 1 IO_B6 63 1 Z
+bit 63 C 1 *
+bit 62 I 1 IO_A6
+bit 61 O 1 IO_A6 60 1 Z
+bit 60 C 1 *
+bit 59 O 1 *
+bit 58 O 1 *
+bit 57 O 1 *
+bit 56 I 1 IO_C7
+bit 55 O 1 IO_C7 54 1 Z
+bit 54 C 1 *
+bit 53 I 1 IO_B7
+bit 52 O 1 IO_B7 51 1 Z
+bit 51 C 1 *
+bit 50 I 1 IO_A7
+bit 49 O 1 IO_A7 48 1 Z
+bit 48 C 1 *
+bit 47 I 1 IO_C8
+bit 46 O 1 IO_C8 45 1 Z
+bit 45 C 1 *
+bit 44 O 1 *
+bit 43 O 1 *
+bit 42 O 1 *
+bit 41 I 1 IO_A8
+bit 40 O 1 IO_A8 39 1 Z
+bit 39 C 1 *
+bit 38 I 1 IO_A9
+bit 37 O 1 IO_A9 36 1 Z
+bit 36 C 1 *
+bit 35 I 1 IO_C9
+bit 34 O 1 IO_C9 33 1 Z
+bit 33 C 1 *
+bit 32 I 1 IO_A10
+bit 31 O 1 IO_A10 30 1 Z
+bit 30 C 1 *
+bit 29 O 1 *
+bit 28 O 1 *
+bit 27 O 1 *
+bit 26 I 1 IO_A11
+bit 25 O 1 IO_A11 24 1 Z
+bit 24 C 1 *
+bit 23 I 1 IO_B11
+bit 22 O 1 IO_B11 21 1 Z
+bit 21 C 1 *
+bit 20 I 1 IO_C11
+bit 19 O 1 IO_C11 18 1 Z
+bit 18 C 1 *
+bit 17 I 1 IO_A12
+bit 16 O 1 IO_A12 15 1 Z
+bit 15 C 1 *
+bit 14 O 1 *
+bit 13 O 1 *
+bit 12 O 1 *
+bit 11 O 1 *
+bit 10 O 1 *
+bit 9 O 1 *
+bit 8 O 1 *
+bit 7 O 1 *
+bit 6 O 1 *
+bit 5 I 1 IO_A13
+bit 4 O 1 IO_A13 3 1 Z
+bit 3 C 1 *
+bit 2 I 1 IO_B13
+bit 1 O 1 IO_B13 0 1 Z
+bit 0 C 1 *
--- /dev/null
+signal GND1
+signal GND2
+signal GND3
+signal GND4
+signal GND5
+signal GND6
+signal GND7
+signal GND8
+signal GND9
+signal GND10
+signal GND11
+signal GND12
+signal GND13
+signal GND14
+signal GND15
+signal GND16
+signal GND17
+signal GND18
+signal GND19
+signal GND20
+signal GND21
+signal GND22
+signal GND23
+signal GND24
+signal GND25
+signal GND26
+signal GND27
+signal GND28
+signal CCLK_P104
+signal DONE_P103
+signal HSWAP_EN_P206
+signal M0_P55
+signal M1_P54
+signal M2_P56
+signal PROG_B
+signal TCK
+signal TDI
+signal TDO
+signal TMS
+signal VCCAUX1
+signal VCCAUX2
+signal VCCAUX3
+signal VCCAUX4
+signal VCCAUX5
+signal VCCAUX6
+signal VCCAUX7
+signal VCCAUX8
+signal VCCINT1
+signal VCCINT2
+signal VCCINT3
+signal VCCINT4
+signal VCCO01
+signal VCCO02
+signal VCCO11
+signal VCCO12
+signal VCCO21
+signal VCCO22
+signal VCCO31
+signal VCCO32
+signal VCCO41
+signal VCCO42
+signal VCCO51
+signal VCCO52
+signal VCCO61
+signal VCCO62
+signal VCCO71
+signal VCCO72
+signal IO_P2
+signal IO_P3
+signal IO_P7
+signal IO_P9
+signal IO_P10
+signal IO_P11
+signal IO_P12
+signal IO_P13
+signal IO_P15
+signal IO_P16
+signal IO_P18
+signal IO_P19
+signal IO_P20
+signal IO_P21
+signal IO_P26
+signal IO_P27
+signal IO_P28
+signal IO_P29
+signal IO_P34
+signal IO_P35
+signal IO_P36
+signal IO_P37
+signal IO_P39
+signal IO_P40
+signal IO_P42
+signal IO_P43
+signal IO_P44
+signal IO_P45
+signal IO_P46
+signal IO_P48
+signal IO_P51
+signal IO_P52
+signal IO_P57
+signal IO_P58
+signal IO_P61
+signal IO_P62
+signal IO_P63
+signal IO_P64
+signal IO_P65
+signal IO_P67
+signal IO_P68
+signal IO_P71
+signal IO_P72
+signal IO_P74
+signal IO_P76
+signal IO_P77
+signal IO_P78
+signal IO_P79
+signal IO_P80
+signal IO_P81
+signal IO_P83
+signal IO_P85
+signal IO_P86
+signal IO_P87
+signal IO_P90
+signal IO_P92
+signal IO_P93
+signal IO_P94
+signal IO_P95
+signal IO_P100
+signal IO_P101
+signal IO_P102
+signal IO_P106
+signal IO_P107
+signal IO_P111
+signal IO_P113
+signal IO_P114
+signal IO_P115
+signal IO_P116
+signal IO_P117
+signal IO_P119
+signal IO_P120
+signal IO_P122
+signal IO_P123
+signal IO_P124
+signal IO_P125
+signal IO_P130
+signal IO_P131
+signal IO_P132
+signal IO_P133
+signal IO_P138
+signal IO_P139
+signal IO_P140
+signal IO_P141
+signal IO_P143
+signal IO_P144
+signal IO_P146
+signal IO_P147
+signal IO_P148
+signal IO_P149
+signal IO_P150
+signal IO_P152
+signal IO_P155
+signal IO_P156
+signal IO_P161
+signal IO_P162
+signal IO_P165
+signal IO_P166
+signal IO_P167
+signal IO_P168
+signal IO_P169
+signal IO_P171
+signal IO_P172
+signal IO_P175
+signal IO_P176
+signal IO_P178
+signal IO_P180
+signal IO_P181
+signal IO_P182
+signal IO_P183
+signal IO_P184
+signal IO_P185
+signal IO_P187
+signal IO_P189
+signal IO_P190
+signal IO_P191
+signal IO_P194
+signal IO_P196
+signal IO_P197
+signal IO_P198
+signal IO_P199
+signal IO_P203
+signal IO_P204
+
+register BSR 383
+register BR 1
+register DIR 32
+
+instruction length 6
+
+instruction EXTEST 000000 BSR
+instruction SAMPLE/PRELOAD 000001 BSR
+instruction IDCODE 001001 DIR
+instruction BYPASS 111111 BR
+
+bit 382 I 1 IO_P156
+bit 381 O 1 IO_P156 380 1 Z
+bit 380 C 1 *
+bit 379 I 1 IO_P155
+bit 378 O 1 IO_P155 377 1 Z
+bit 377 C 1 *
+bit 376 I 1 IO_P152
+bit 375 O 1 IO_P152 374 1 Z
+bit 374 C 1 *
+bit 373 I 1 IO_P150
+bit 372 O 1 IO_P150 371 1 Z
+bit 371 C 1 *
+bit 370 I 1 IO_P149
+bit 369 O 1 IO_P149 368 1 Z
+bit 368 C 1 *
+bit 367 I 1 IO_P148
+bit 366 O 1 IO_P148 365 1 Z
+bit 365 C 1 *
+bit 364 I 1 IO_P147
+bit 363 O 1 IO_P147 362 1 Z
+bit 362 C 1 *
+bit 361 I 1 IO_P146
+bit 360 O 1 IO_P146 359 1 Z
+bit 359 C 1 *
+bit 358 I 1 IO_P144
+bit 357 O 1 IO_P144 356 1 Z
+bit 356 C 1 *
+bit 355 I 1 IO_P143
+bit 354 O 1 IO_P143 353 1 Z
+bit 353 C 1 *
+bit 352 I 1 IO_P141
+bit 351 O 1 IO_P141 350 1 Z
+bit 350 C 1 *
+bit 349 I 1 IO_P140
+bit 348 O 1 IO_P140 347 1 Z
+bit 347 C 1 *
+bit 346 I 1 IO_P139
+bit 345 O 1 IO_P139 344 1 Z
+bit 344 C 1 *
+bit 343 I 1 IO_P138
+bit 342 O 1 IO_P138 341 1 Z
+bit 341 C 1 *
+bit 340 I 1 IO_P133
+bit 339 O 1 IO_P133 338 1 Z
+bit 338 C 1 *
+bit 337 I 1 IO_P132
+bit 336 O 1 IO_P132 335 1 Z
+bit 335 C 1 *
+bit 334 I 1 IO_P131
+bit 333 O 1 IO_P131 332 1 Z
+bit 332 C 1 *
+bit 331 I 1 IO_P130
+bit 330 O 1 IO_P130 329 1 Z
+bit 329 C 1 *
+bit 328 I 1 IO_P125
+bit 327 O 1 IO_P125 326 1 Z
+bit 326 C 1 *
+bit 325 I 1 IO_P124
+bit 324 O 1 IO_P124 323 1 Z
+bit 323 C 1 *
+bit 322 I 1 IO_P123
+bit 321 O 1 IO_P123 320 1 Z
+bit 320 C 1 *
+bit 319 I 1 IO_P122
+bit 318 O 1 IO_P122 317 1 Z
+bit 317 C 1 *
+bit 316 I 1 IO_P120
+bit 315 O 1 IO_P120 314 1 Z
+bit 314 C 1 *
+bit 313 I 1 IO_P119
+bit 312 O 1 IO_P119 311 1 Z
+bit 311 C 1 *
+bit 310 I 1 IO_P117
+bit 309 O 1 IO_P117 308 1 Z
+bit 308 C 1 *
+bit 307 I 1 IO_P116
+bit 306 O 1 IO_P116 305 1 Z
+bit 305 C 1 *
+bit 304 I 1 IO_P115
+bit 303 O 1 IO_P115 302 1 Z
+bit 302 C 1 *
+bit 301 I 1 IO_P114
+bit 300 O 1 IO_P114 299 1 Z
+bit 299 C 1 *
+bit 298 I 1 IO_P113
+bit 297 O 1 IO_P113 296 1 Z
+bit 296 C 1 *
+bit 295 I 1 IO_P111
+bit 294 O 1 IO_P111 293 1 Z
+bit 293 C 1 *
+bit 292 I 1 IO_P107
+bit 291 O 1 IO_P107 290 1 Z
+bit 290 C 1 *
+bit 289 I 1 IO_P106
+bit 288 O 1 IO_P106 287 1 Z
+bit 287 C 1 *
+bit 286 I 1 CCLK_P104
+bit 285 O 1 CCLK_P104 284 1 Z
+bit 284 C 1 *
+bit 283 I 1 DONE_P103
+bit 282 O 1 DONE_P103 281 1 Z
+bit 281 C 1 *
+bit 280 I 1 IO_P102
+bit 279 O 1 IO_P102 278 1 Z
+bit 278 C 1 *
+bit 277 I 1 IO_P101
+bit 276 O 1 IO_P101 275 1 Z
+bit 275 C 1 *
+bit 274 I 1 IO_P100
+bit 273 O 1 IO_P100 272 1 Z
+bit 272 C 1 *
+bit 271 I 1 IO_P95
+bit 270 O 1 IO_P95 269 1 Z
+bit 269 C 1 *
+bit 268 I 1 IO_P94
+bit 267 O 1 IO_P94 266 1 Z
+bit 266 C 1 *
+bit 265 I 1 IO_P93
+bit 264 O 1 IO_P93 263 1 Z
+bit 263 C 1 *
+bit 262 I 1 IO_P92
+bit 261 O 1 IO_P92 260 1 Z
+bit 260 C 1 *
+bit 259 I 1 IO_P90
+bit 258 O 1 IO_P90 257 1 Z
+bit 257 C 1 *
+bit 256 I 1 IO_P87
+bit 255 O 1 IO_P87 254 1 Z
+bit 254 C 1 *
+bit 253 I 1 IO_P86
+bit 252 O 1 IO_P86 251 1 Z
+bit 251 C 1 *
+bit 250 I 1 IO_P85
+bit 249 O 1 IO_P85 248 1 Z
+bit 248 C 1 *
+bit 247 I 1 IO_P83
+bit 246 O 1 IO_P83 245 1 Z
+bit 245 C 1 *
+bit 244 I 1 IO_P81
+bit 243 O 1 IO_P81 242 1 Z
+bit 242 C 1 *
+bit 241 I 1 IO_P80
+bit 240 O 1 IO_P80 239 1 Z
+bit 239 C 1 *
+bit 238 I 1 IO_P79
+bit 237 O 1 IO_P79 236 1 Z
+bit 236 C 1 *
+bit 235 I 1 IO_P78
+bit 234 O 1 IO_P78 233 1 Z
+bit 233 C 1 *
+bit 232 I 1 IO_P77
+bit 231 O 1 IO_P77 230 1 Z
+bit 230 C 1 *
+bit 229 I 1 IO_P76
+bit 228 O 1 IO_P76 227 1 Z
+bit 227 C 1 *
+bit 226 I 1 IO_P74
+bit 225 O 1 IO_P74 224 1 Z
+bit 224 C 1 *
+bit 223 I 1 IO_P72
+bit 222 O 1 IO_P72 221 1 Z
+bit 221 C 1 *
+bit 220 I 1 IO_P71
+bit 219 O 1 IO_P71 218 1 Z
+bit 218 C 1 *
+bit 217 I 1 IO_P68
+bit 216 O 1 IO_P68 215 1 Z
+bit 215 C 1 *
+bit 214 I 1 IO_P67
+bit 213 O 1 IO_P67 212 1 Z
+bit 212 C 1 *
+bit 211 I 1 IO_P65
+bit 210 O 1 IO_P65 209 1 Z
+bit 209 C 1 *
+bit 208 I 1 IO_P64
+bit 207 O 1 IO_P64 206 1 Z
+bit 206 C 1 *
+bit 205 I 1 IO_P63
+bit 204 O 1 IO_P63 203 1 Z
+bit 203 C 1 *
+bit 202 I 1 IO_P62
+bit 201 O 1 IO_P62 200 1 Z
+bit 200 C 1 *
+bit 199 I 1 IO_P61
+bit 198 O 1 IO_P61 197 1 Z
+bit 197 C 1 *
+bit 196 I 1 IO_P58
+bit 195 O 1 IO_P58 194 1 Z
+bit 194 C 1 *
+bit 193 I 1 IO_P57
+bit 192 O 1 IO_P57 191 1 Z
+bit 191 C 1 *
+bit 190 I 1 M2_P56
+bit 189 I 1 M0_P55
+bit 188 I 1 M1_P54
+bit 187 I 1 IO_P52
+bit 186 O 1 IO_P52 185 1 Z
+bit 185 C 1 *
+bit 184 I 1 IO_P51
+bit 183 O 1 IO_P51 182 1 Z
+bit 182 C 1 *
+bit 181 I 1 IO_P48
+bit 180 O 1 IO_P48 179 1 Z
+bit 179 C 1 *
+bit 178 I 1 IO_P46
+bit 177 O 1 IO_P46 176 1 Z
+bit 176 C 1 *
+bit 175 I 1 IO_P45
+bit 174 O 1 IO_P45 173 1 Z
+bit 173 C 1 *
+bit 172 I 1 IO_P44
+bit 171 O 1 IO_P44 170 1 Z
+bit 170 C 1 *
+bit 169 I 1 IO_P43
+bit 168 O 1 IO_P43 167 1 Z
+bit 167 C 1 *
+bit 166 I 1 IO_P42
+bit 165 O 1 IO_P42 164 1 Z
+bit 164 C 1 *
+bit 163 I 1 IO_P40
+bit 162 O 1 IO_P40 161 1 Z
+bit 161 C 1 *
+bit 160 I 1 IO_P39
+bit 159 O 1 IO_P39 158 1 Z
+bit 158 C 1 *
+bit 157 I 1 IO_P37
+bit 156 O 1 IO_P37 155 1 Z
+bit 155 C 1 *
+bit 154 I 1 IO_P36
+bit 153 O 1 IO_P36 152 1 Z
+bit 152 C 1 *
+bit 151 I 1 IO_P35
+bit 150 O 1 IO_P35 149 1 Z
+bit 149 C 1 *
+bit 148 I 1 IO_P34
+bit 147 O 1 IO_P34 146 1 Z
+bit 146 C 1 *
+bit 145 I 1 IO_P29
+bit 144 O 1 IO_P29 143 1 Z
+bit 143 C 1 *
+bit 142 I 1 IO_P28
+bit 141 O 1 IO_P28 140 1 Z
+bit 140 C 1 *
+bit 139 I 1 IO_P27
+bit 138 O 1 IO_P27 137 1 Z
+bit 137 C 1 *
+bit 136 I 1 IO_P26
+bit 135 O 1 IO_P26 134 1 Z
+bit 134 C 1 *
+bit 133 I 1 IO_P21
+bit 132 O 1 IO_P21 131 1 Z
+bit 131 C 1 *
+bit 130 I 1 IO_P20
+bit 129 O 1 IO_P20 128 1 Z
+bit 128 C 1 *
+bit 127 I 1 IO_P19
+bit 126 O 1 IO_P19 125 1 Z
+bit 125 C 1 *
+bit 124 I 1 IO_P18
+bit 123 O 1 IO_P18 122 1 Z
+bit 122 C 1 *
+bit 121 I 1 IO_P16
+bit 120 O 1 IO_P16 119 1 Z
+bit 119 C 1 *
+bit 118 I 1 IO_P15
+bit 117 O 1 IO_P15 116 1 Z
+bit 116 C 1 *
+bit 115 I 1 IO_P13
+bit 114 O 1 IO_P13 113 1 Z
+bit 113 C 1 *
+bit 112 I 1 IO_P12
+bit 111 O 1 IO_P12 110 1 Z
+bit 110 C 1 *
+bit 109 I 1 IO_P11
+bit 108 O 1 IO_P11 107 1 Z
+bit 107 C 1 *
+bit 106 I 1 IO_P10
+bit 105 O 1 IO_P10 104 1 Z
+bit 104 C 1 *
+bit 103 I 1 IO_P9
+bit 102 O 1 IO_P9 101 1 Z
+bit 101 C 1 *
+bit 100 I 1 IO_P7
+bit 99 O 1 IO_P7 98 1 Z
+bit 98 C 1 *
+bit 97 I 1 IO_P3
+bit 96 O 1 IO_P3 95 1 Z
+bit 95 C 1 *
+bit 94 I 1 IO_P2
+bit 93 O 1 IO_P2 92 1 Z
+bit 92 C 1 *
+bit 91 O 1 *
+bit 90 I 1 HSWAP_EN_P206
+bit 89 I 1 IO_P205
+bit 88 O 1 IO_P205 87 1 Z
+bit 87 C 1 *
+bit 86 I 1 IO_P204
+bit 85 O 1 IO_P204 84 1 Z
+bit 84 C 1 *
+bit 83 I 1 IO_P203
+bit 82 O 1 IO_P203 81 1 Z
+bit 81 C 1 *
+bit 80 I 1 IO_P199
+bit 79 O 1 IO_P199 78 1 Z
+bit 78 C 1 *
+bit 77 I 1 IO_P198
+bit 76 O 1 IO_P198 75 1 Z
+bit 75 C 1 *
+bit 74 I 1 IO_P197
+bit 73 O 1 IO_P197 72 1 Z
+bit 72 C 1 *
+bit 71 I 1 IO_P196
+bit 70 O 1 IO_P196 69 1 Z
+bit 69 C 1 *
+bit 68 I 1 IO_P194
+bit 67 O 1 IO_P194 66 1 Z
+bit 66 C 1 *
+bit 65 I 1 IO_P191
+bit 64 O 1 IO_P191 63 1 Z
+bit 63 C 1 *
+bit 62 I 1 IO_P190
+bit 61 O 1 IO_P190 60 1 Z
+bit 60 C 1 *
+bit 59 I 1 IO_P189
+bit 58 O 1 IO_P189 57 1 Z
+bit 57 C 1 *
+bit 56 I 1 IO_P187
+bit 55 O 1 IO_P187 54 1 Z
+bit 54 C 1 *
+bit 53 I 1 IO_P185
+bit 52 O 1 IO_P185 51 1 Z
+bit 51 C 1 *
+bit 50 I 1 IO_P184
+bit 49 O 1 IO_P184 48 1 Z
+bit 48 C 1 *
+bit 47 I 1 IO_P183
+bit 46 O 1 IO_P183 45 1 Z
+bit 45 C 1 *
+bit 44 I 1 IO_P182
+bit 43 O 1 IO_P182 42 1 Z
+bit 42 C 1 *
+bit 41 I 1 IO_P181
+bit 40 O 1 IO_P181 39 1 Z
+bit 39 C 1 *
+bit 38 I 1 IO_P180
+bit 37 O 1 IO_P180 36 1 Z
+bit 36 C 1 *
+bit 35 I 1 IO_P178
+bit 34 O 1 IO_P178 33 1 Z
+bit 33 C 1 *
+bit 32 I 1 IO_P176
+bit 31 O 1 IO_P176 30 1 Z
+bit 30 C 1 *
+bit 29 I 1 IO_P175
+bit 28 O 1 IO_P175 27 1 Z
+bit 27 C 1 *
+bit 26 I 1 IO_P172
+bit 25 O 1 IO_P172 24 1 Z
+bit 24 C 1 *
+bit 23 I 1 IO_P171
+bit 22 O 1 IO_P171 21 1 Z
+bit 21 C 1 *
+bit 20 I 1 IO_P169
+bit 19 O 1 IO_P169 18 1 Z
+bit 18 C 1 *
+bit 17 I 1 IO_P168
+bit 16 O 1 IO_P168 15 1 Z
+bit 15 C 1 *
+bit 14 I 1 IO_P167
+bit 13 O 1 IO_P167 12 1 Z
+bit 12 C 1 *
+bit 11 I 1 IO_P166
+bit 10 O 1 IO_P166 9 1 Z
+bit 9 C 1 *
+bit 8 I 1 IO_P165
+bit 7 O 1 IO_P165 6 1 Z
+bit 6 C 1 *
+bit 5 I 1 IO_P162
+bit 4 O 1 IO_P162 3 1 Z
+bit 3 C 1 *
+bit 2 I 1 IO_P161
+bit 1 O 1 IO_P161 0 1 Z
+bit 0 C 1 *
--- /dev/null
+signal GND1
+signal GND2
+signal GND3
+signal GND4
+signal GND5
+signal GND6
+signal GND7
+signal GND8
+signal GND9
+signal GND10
+signal GND11
+signal GND12
+signal GND13
+signal GND14
+signal GND15
+signal GND16
+signal CCLK_P72
+signal DONE_P71
+signal HSWAP_EN_P142
+signal M0_P38
+signal M1_P37
+signal M2_P39
+signal PROG_B
+signal TCK
+signal TDI
+signal TDO
+signal TMS
+signal VCCAUX1
+signal VCCAUX2
+signal VCCAUX3
+signal VCCAUX4
+signal VCCINT1
+signal VCCINT2
+signal VCCINT3
+signal VCCINT4
+signal VCCO011
+signal VCCO012
+signal VCCO013
+signal VCCO231
+signal VCCO232
+signal VCCO233
+signal VCCO451
+signal VCCO452
+signal VCCO453
+signal VCCO671
+signal VCCO672
+signal VCCO673
+signal IO_P1
+signal IO_P2
+signal IO_P4
+signal IO_P5
+signal IO_P6
+signal IO_P7
+signal IO_P8
+signal IO_P10
+signal IO_P11
+signal IO_P12
+signal IO_P13
+signal IO_P14
+signal IO_P15
+signal IO_P17
+signal IO_P18
+signal IO_P20
+signal IO_P21
+signal IO_P23
+signal IO_P24
+signal IO_P25
+signal IO_P26
+signal IO_P27
+signal IO_P28
+signal IO_P30
+signal IO_P31
+signal IO_P32
+signal IO_P33
+signal IO_P35
+signal IO_P36
+signal IO_P40
+signal IO_P41
+signal IO_P44
+signal IO_P46
+signal IO_P47
+signal IO_P50
+signal IO_P51
+signal IO_P52
+signal IO_P53
+signal IO_P55
+signal IO_P56
+signal IO_P57
+signal IO_P58
+signal IO_P59
+signal IO_P60
+signal IO_P63
+signal IO_P65
+signal IO_P68
+signal IO_P69
+signal IO_P70
+signal IO_P73
+signal IO_P74
+signal IO_P76
+signal IO_P77
+signal IO_P78
+signal IO_P79
+signal IO_P80
+signal IO_P82
+signal IO_P83
+signal IO_P84
+signal IO_P85
+signal IO_P86
+signal IO_P87
+signal IO_P89
+signal IO_P90
+signal IO_P92
+signal IO_P93
+signal IO_P95
+signal IO_P96
+signal IO_P97
+signal IO_P98
+signal IO_P99
+signal IO_P100
+signal IO_P102
+signal IO_P103
+signal IO_P104
+signal IO_P105
+signal IO_P107
+signal IO_P108
+signal IO_P112
+signal IO_P113
+signal IO_P116
+signal IO_P118
+signal IO_P119
+signal IO_P122
+signal IO_P123
+signal IO_P124
+signal IO_P125
+signal IO_P127
+signal IO_P128
+signal IO_P129
+signal IO_P130
+signal IO_P131
+signal IO_P132
+signal IO_P135
+signal IO_P137
+signal IO_P140
+
+register BSR 383
+register BR 1
+register DIR 32
+
+instruction length 6
+
+instruction EXTEST 000000 BSR
+instruction SAMPLE/PRELOAD 000001 BSR
+instruction IDCODE 001001 DIR
+instruction BYPASS 111111 BR
+
+bit 382 I 1 IO_P108
+bit 381 O 1 IO_P108 380 1 Z
+bit 380 C 1 *
+bit 379 I 1 IO_P107
+bit 378 O 1 IO_P107 377 1 Z
+bit 377 C 1 *
+bit 376 O 1 *
+bit 375 O 1 *
+bit 374 O 1 *
+bit 373 O 1 *
+bit 372 O 1 *
+bit 371 O 1 *
+bit 370 I 1 IO_P105
+bit 369 O 1 IO_P105 368 1 Z
+bit 368 C 1 *
+bit 367 I 1 IO_P104
+bit 366 O 1 IO_P104 365 1 Z
+bit 365 C 1 *
+bit 364 I 1 IO_P103
+bit 363 O 1 IO_P103 362 1 Z
+bit 362 C 1 *
+bit 361 I 1 IO_P102
+bit 360 O 1 IO_P102 359 1 Z
+bit 359 C 1 *
+bit 358 I 1 IO_P100
+bit 357 O 1 IO_P100 356 1 Z
+bit 356 C 1 *
+bit 355 I 1 IO_P99
+bit 354 O 1 IO_P99 353 1 Z
+bit 353 C 1 *
+bit 352 I 1 IO_P98
+bit 351 O 1 IO_P98 350 1 Z
+bit 350 C 1 *
+bit 349 I 1 IO_P97
+bit 348 O 1 IO_P97 347 1 Z
+bit 347 C 1 *
+bit 346 I 1 IO_P96
+bit 345 O 1 IO_P96 344 1 Z
+bit 344 C 1 *
+bit 343 I 1 IO_P95
+bit 342 O 1 IO_P95 341 1 Z
+bit 341 C 1 *
+bit 340 I 1 IO_P93
+bit 339 O 1 IO_P93 338 1 Z
+bit 338 C 1 *
+bit 337 I 1 IO_P92
+bit 336 O 1 IO_P92 335 1 Z
+bit 335 C 1 *
+bit 334 I 1 IO_P90
+bit 333 O 1 IO_P90 332 1 Z
+bit 332 C 1 *
+bit 331 I 1 IO_P89
+bit 330 O 1 IO_P89 329 1 Z
+bit 329 C 1 *
+bit 328 I 1 IO_P87
+bit 327 O 1 IO_P87 326 1 Z
+bit 326 C 1 *
+bit 325 I 1 IO_P86
+bit 324 O 1 IO_P86 323 1 Z
+bit 323 C 1 *
+bit 322 I 1 IO_P85
+bit 321 O 1 IO_P85 320 1 Z
+bit 320 C 1 *
+bit 319 I 1 IO_P84
+bit 318 O 1 IO_P84 317 1 Z
+bit 317 C 1 *
+bit 316 I 1 IO_P83
+bit 315 O 1 IO_P83 314 1 Z
+bit 314 C 1 *
+bit 313 I 1 IO_P82
+bit 312 O 1 IO_P82 311 1 Z
+bit 311 C 1 *
+bit 310 I 1 IO_P80
+bit 309 O 1 IO_P80 308 1 Z
+bit 308 C 1 *
+bit 307 I 1 IO_P79
+bit 306 O 1 IO_P79 305 1 Z
+bit 305 C 1 *
+bit 304 I 1 IO_P78
+bit 303 O 1 IO_P78 302 1 Z
+bit 302 C 1 *
+bit 301 I 1 IO_P77
+bit 300 O 1 IO_P77 299 1 Z
+bit 299 C 1 *
+bit 298 I 1 IO_P76
+bit 297 O 1 IO_P76 296 1 Z
+bit 296 C 1 *
+bit 295 O 1 *
+bit 294 O 1 *
+bit 293 O 1 *
+bit 292 I 1 IO_P74
+bit 291 O 1 IO_P74 290 1 Z
+bit 290 C 1 *
+bit 289 I 1 IO_P73
+bit 288 O 1 IO_P73 287 1 Z
+bit 287 C 1 *
+bit 286 I 1 CCLK_P72
+bit 285 O 1 CCLK_P72 284 1 Z
+bit 284 C 1 *
+bit 283 I 1 DONE_P71
+bit 282 O 1 DONE_P71 281 1 Z
+bit 281 C 1 *
+bit 280 I 1 IO_P70
+bit 279 O 1 IO_P70 278 1 Z
+bit 278 C 1 *
+bit 277 I 1 IO_P69
+bit 276 O 1 IO_P69 275 1 Z
+bit 275 C 1 *
+bit 274 I 1 IO_P68
+bit 273 O 1 IO_P68 272 1 Z
+bit 272 C 1 *
+bit 271 O 1 *
+bit 270 O 1 *
+bit 269 O 1 *
+bit 268 O 1 *
+bit 267 O 1 *
+bit 266 O 1 *
+bit 265 O 1 *
+bit 264 O 1 *
+bit 263 O 1 *
+bit 262 I 1 IO_P65
+bit 261 O 1 IO_P65 260 1 Z
+bit 260 C 1 *
+bit 259 I 1 IO_P63
+bit 258 O 1 IO_P63 257 1 Z
+bit 257 C 1 *
+bit 256 I 1 IO_P60
+bit 255 O 1 IO_P60 254 1 Z
+bit 254 C 1 *
+bit 253 I 1 IO_P59
+bit 252 O 1 IO_P59 251 1 Z
+bit 251 C 1 *
+bit 250 O 1 *
+bit 249 O 1 *
+bit 248 O 1 *
+bit 247 I 1 IO_P58
+bit 246 O 1 IO_P58 245 1 Z
+bit 245 C 1 *
+bit 244 I 1 IO_P57
+bit 243 O 1 IO_P57 242 1 Z
+bit 242 C 1 *
+bit 241 I 1 IO_P56
+bit 240 O 1 IO_P56 239 1 Z
+bit 239 C 1 *
+bit 238 I 1 IO_P55
+bit 237 O 1 IO_P55 236 1 Z
+bit 236 C 1 *
+bit 235 O 1 *
+bit 234 O 1 *
+bit 233 O 1 *
+bit 232 I 1 IO_P53
+bit 231 O 1 IO_P53 230 1 Z
+bit 230 C 1 *
+bit 229 I 1 IO_P52
+bit 228 O 1 IO_P52 227 1 Z
+bit 227 C 1 *
+bit 226 I 1 IO_P51
+bit 225 O 1 IO_P51 224 1 Z
+bit 224 C 1 *
+bit 223 I 1 IO_P50
+bit 222 O 1 IO_P50 221 1 Z
+bit 221 C 1 *
+bit 220 O 1 *
+bit 219 O 1 *
+bit 218 O 1 *
+bit 217 I 1 IO_P47
+bit 216 O 1 IO_P47 215 1 Z
+bit 215 C 1 *
+bit 214 I 1 IO_P46
+bit 213 O 1 IO_P46 212 1 Z
+bit 212 C 1 *
+bit 211 I 1 IO_P44
+bit 210 O 1 IO_P44 209 1 Z
+bit 209 C 1 *
+bit 208 O 1 *
+bit 207 O 1 *
+bit 206 O 1 *
+bit 205 O 1 *
+bit 204 O 1 *
+bit 203 O 1 *
+bit 202 O 1 *
+bit 201 O 1 *
+bit 200 O 1 *
+bit 199 O 1 *
+bit 198 O 1 *
+bit 197 O 1 *
+bit 196 I 1 IO_P41
+bit 195 O 1 IO_P41 194 1 Z
+bit 194 C 1 *
+bit 193 I 1 IO_P40
+bit 192 O 1 IO_P40 191 1 Z
+bit 191 C 1 *
+bit 190 I 1 M2_P39
+bit 189 I 1 M0_P38
+bit 188 I 1 M1_P37
+bit 187 I 1 IO_P36
+bit 186 O 1 IO_P36 185 1 Z
+bit 185 C 1 *
+bit 184 I 1 IO_P35
+bit 183 O 1 IO_P35 182 1 Z
+bit 182 C 1 *
+bit 181 O 1 *
+bit 180 O 1 *
+bit 179 O 1 *
+bit 178 O 1 *
+bit 177 O 1 *
+bit 176 O 1 *
+bit 175 I 1 IO_P33
+bit 174 O 1 IO_P33 173 1 Z
+bit 173 C 1 *
+bit 172 I 1 IO_P32
+bit 171 O 1 IO_P32 170 1 Z
+bit 170 C 1 *
+bit 169 I 1 IO_P31
+bit 168 O 1 IO_P31 167 1 Z
+bit 167 C 1 *
+bit 166 I 1 IO_P30
+bit 165 O 1 IO_P30 164 1 Z
+bit 164 C 1 *
+bit 163 I 1 IO_P28
+bit 162 O 1 IO_P28 161 1 Z
+bit 161 C 1 *
+bit 160 I 1 IO_P27
+bit 159 O 1 IO_P27 158 1 Z
+bit 158 C 1 *
+bit 157 I 1 IO_P26
+bit 156 O 1 IO_P26 155 1 Z
+bit 155 C 1 *
+bit 154 I 1 IO_P25
+bit 153 O 1 IO_P25 152 1 Z
+bit 152 C 1 *
+bit 151 I 1 IO_P24
+bit 150 O 1 IO_P24 149 1 Z
+bit 149 C 1 *
+bit 148 I 1 IO_P23
+bit 147 O 1 IO_P23 146 1 Z
+bit 146 C 1 *
+bit 145 I 1 IO_P21
+bit 144 O 1 IO_P21 143 1 Z
+bit 143 C 1 *
+bit 142 I 1 IO_P20
+bit 141 O 1 IO_P20 140 1 Z
+bit 140 C 1 *
+bit 139 I 1 IO_P18
+bit 138 O 1 IO_P18 137 1 Z
+bit 137 C 1 *
+bit 136 I 1 IO_P17
+bit 135 O 1 IO_P17 134 1 Z
+bit 134 C 1 *
+bit 133 I 1 IO_P15
+bit 132 O 1 IO_P15 131 1 Z
+bit 131 C 1 *
+bit 130 I 1 IO_P14
+bit 129 O 1 IO_P14 128 1 Z
+bit 128 C 1 *
+bit 127 I 1 IO_P13
+bit 126 O 1 IO_P13 125 1 Z
+bit 125 C 1 *
+bit 124 I 1 IO_P12
+bit 123 O 1 IO_P12 122 1 Z
+bit 122 C 1 *
+bit 121 I 1 IO_P11
+bit 120 O 1 IO_P11 119 1 Z
+bit 119 C 1 *
+bit 118 I 1 IO_P10
+bit 117 O 1 IO_P10 116 1 Z
+bit 116 C 1 *
+bit 115 I 1 IO_P8
+bit 114 O 1 IO_P8 113 1 Z
+bit 113 C 1 *
+bit 112 I 1 IO_P7
+bit 111 O 1 IO_P7 110 1 Z
+bit 110 C 1 *
+bit 109 I 1 IO_P6
+bit 108 O 1 IO_P6 107 1 Z
+bit 107 C 1 *
+bit 106 I 1 IO_P5
+bit 105 O 1 IO_P5 104 1 Z
+bit 104 C 1 *
+bit 103 I 1 IO_P4
+bit 102 O 1 IO_P4 101 1 Z
+bit 101 C 1 *
+bit 100 O 1 *
+bit 99 O 1 *
+bit 98 O 1 *
+bit 97 I 1 IO_P2
+bit 96 O 1 IO_P2 95 1 Z
+bit 95 C 1 *
+bit 94 I 1 IO_P1
+bit 93 O 1 IO_P1 92 1 Z
+bit 92 C 1 *
+bit 91 O 1 *
+bit 90 I 1 HSWAP_EN_P142
+bit 89 O 1 *
+bit 88 O 1 *
+bit 87 O 1 *
+bit 86 I 1 IO_P141
+bit 85 O 1 IO_P141 84 1 Z
+bit 84 C 1 *
+bit 83 I 1 IO_P140
+bit 82 O 1 IO_P140 81 1 Z
+bit 81 C 1 *
+bit 80 O 1 *
+bit 79 O 1 *
+bit 78 O 1 *
+bit 77 O 1 *
+bit 76 O 1 *
+bit 75 O 1 *
+bit 74 O 1 *
+bit 73 O 1 *
+bit 72 O 1 *
+bit 71 I 1 IO_P137
+bit 70 O 1 IO_P137 69 1 Z
+bit 69 C 1 *
+bit 68 I 1 IO_P135
+bit 67 O 1 IO_P135 66 1 Z
+bit 66 C 1 *
+bit 65 I 1 IO_P132
+bit 64 O 1 IO_P132 63 1 Z
+bit 63 C 1 *
+bit 62 I 1 IO_P131
+bit 61 O 1 IO_P131 60 1 Z
+bit 60 C 1 *
+bit 59 O 1 *
+bit 58 O 1 *
+bit 57 O 1 *
+bit 56 I 1 IO_P130
+bit 55 O 1 IO_P130 54 1 Z
+bit 54 C 1 *
+bit 53 I 1 IO_P129
+bit 52 O 1 IO_P129 51 1 Z
+bit 51 C 1 *
+bit 50 I 1 IO_P128
+bit 49 O 1 IO_P128 48 1 Z
+bit 48 C 1 *
+bit 47 I 1 IO_P127
+bit 46 O 1 IO_P127 45 1 Z
+bit 45 C 1 *
+bit 44 O 1 *
+bit 43 O 1 *
+bit 42 O 1 *
+bit 41 I 1 IO_P125
+bit 40 O 1 IO_P125 39 1 Z
+bit 39 C 1 *
+bit 38 I 1 IO_P124
+bit 37 O 1 IO_P124 36 1 Z
+bit 36 C 1 *
+bit 35 I 1 IO_P123
+bit 34 O 1 IO_P123 33 1 Z
+bit 33 C 1 *
+bit 32 I 1 IO_P122
+bit 31 O 1 IO_P122 30 1 Z
+bit 30 C 1 *
+bit 29 O 1 *
+bit 28 O 1 *
+bit 27 O 1 *
+bit 26 I 1 IO_P119
+bit 25 O 1 IO_P119 24 1 Z
+bit 24 C 1 *
+bit 23 I 1 IO_P118
+bit 22 O 1 IO_P118 21 1 Z
+bit 21 C 1 *
+bit 20 I 1 IO_P116
+bit 19 O 1 IO_P116 18 1 Z
+bit 18 C 1 *
+bit 17 O 1 *
+bit 16 O 1 *
+bit 15 O 1 *
+bit 14 O 1 *
+bit 13 O 1 *
+bit 12 O 1 *
+bit 11 O 1 *
+bit 10 O 1 *
+bit 9 O 1 *
+bit 8 O 1 *
+bit 7 O 1 *
+bit 6 O 1 *
+bit 5 I 1 IO_P113
+bit 4 O 1 IO_P113 3 1 Z
+bit 3 C 1 *
+bit 2 I 1 IO_P112
+bit 1 O 1 IO_P112 0 1 Z
+bit 0 C 1 *
--- /dev/null
+signal GND1
+signal GND2
+signal GND3
+signal GND4
+signal GND5
+signal GND6
+signal GND7
+signal GND8
+signal GND9
+signal GND10
+signal CCLK_P52
+signal DONE_P51
+signal HSWAP_EN_P98
+signal M0_P25
+signal M1_P24
+signal M2_P26
+signal PROG_B
+signal TCK
+signal TDI
+signal TDO
+signal TMS
+signal VCCAUX1
+signal VCCAUX2
+signal VCCAUX3
+signal VCCAUX4
+signal VCCINT1
+signal VCCINT2
+signal VCCINT3
+signal VCCINT4
+signal VCCO0
+signal VCCO1
+signal VCCO2
+signal VCCO3
+signal VCCO4
+signal VCCO5
+signal VCCO6
+signal VCCO7
+signal IO_P1
+signal IO_P2
+signal IO_P4
+signal IO_P5
+signal IO_P8
+signal IO_P9
+signal IO_P11
+signal IO_P12
+signal IO_P13
+signal IO_P14
+signal IO_P15
+signal IO_P16
+signal IO_P17
+signal IO_P21
+signal IO_P22
+signal IO_P23
+signal IO_P27
+signal IO_P28
+signal IO_P30
+signal IO_P32
+signal IO_P34
+signal IO_P35
+signal IO_P36
+signal IO_P37
+signal IO_P38
+signal IO_P39
+signal IO_P40
+signal IO_P42
+signal IO_P43
+signal IO_P44
+signal IO_P47
+signal IO_P48
+signal IO_P49
+signal IO_P50
+signal IO_P53
+signal IO_P54
+signal IO_P55
+signal IO_P59
+signal IO_P60
+signal IO_P61
+signal IO_P62
+signal IO_P63
+signal IO_P64
+signal IO_P65
+signal IO_P67
+signal IO_P68
+signal IO_P71
+signal IO_P72
+signal IO_P74
+signal IO_P75
+signal IO_P79
+signal IO_P80
+signal IO_P81
+signal IO_P85
+signal IO_P86
+signal IO_P87
+signal IO_P88
+signal IO_P89
+signal IO_P90
+signal IO_P91
+signal IO_P92
+signal IO_P96
+
+register BSR 383
+register BR 1
+register DIR 32
+
+instruction length 6
+
+instruction EXTEST 000000 BSR
+instruction SAMPLE/PRELOAD 000001 BSR
+instruction IDCODE 001001 DIR
+instruction BYPASS 111111 BR
+
+bit 382 I 1 IO_P75
+bit 381 O 1 IO_P75 380 1 Z
+bit 380 C 1 *
+bit 379 I 1 IO_P74
+bit 378 O 1 IO_P74 377 1 Z
+bit 377 C 1 *
+bit 376 O 1 *
+bit 375 O 1 *
+bit 374 O 1 *
+bit 373 O 1 *
+bit 372 O 1 *
+bit 371 O 1 *
+bit 370 O 1 *
+bit 369 O 1 *
+bit 368 O 1 *
+bit 367 O 1 *
+bit 366 O 1 *
+bit 365 O 1 *
+bit 364 I 1 IO_P72
+bit 363 O 1 IO_P72 362 1 Z
+bit 362 C 1 *
+bit 361 I 1 IO_P71
+bit 360 O 1 IO_P71 359 1 Z
+bit 359 C 1 *
+bit 358 O 1 *
+bit 357 O 1 *
+bit 356 O 1 *
+bit 355 O 1 *
+bit 354 O 1 *
+bit 353 O 1 *
+bit 352 O 1 *
+bit 351 O 1 *
+bit 350 O 1 *
+bit 349 O 1 *
+bit 348 O 1 *
+bit 347 O 1 *
+bit 346 I 1 IO_P68
+bit 345 O 1 IO_P68 344 1 Z
+bit 344 C 1 *
+bit 343 I 1 IO_P67
+bit 342 O 1 IO_P67 341 1 Z
+bit 341 C 1 *
+bit 340 I 1 IO_P65
+bit 339 O 1 IO_P65 338 1 Z
+bit 338 C 1 *
+bit 337 I 1 IO_P64
+bit 336 O 1 IO_P64 335 1 Z
+bit 335 C 1 *
+bit 334 I 1 IO_P63
+bit 333 O 1 IO_P63 332 1 Z
+bit 332 C 1 *
+bit 331 I 1 IO_P62
+bit 330 O 1 IO_P62 329 1 Z
+bit 329 C 1 *
+bit 328 I 1 IO_P61
+bit 327 O 1 IO_P61 326 1 Z
+bit 326 C 1 *
+bit 325 I 1 IO_P60
+bit 324 O 1 IO_P60 323 1 Z
+bit 323 C 1 *
+bit 322 I 1 IO_P59
+bit 321 O 1 IO_P59 320 1 Z
+bit 320 C 1 *
+bit 319 O 1 *
+bit 318 O 1 *
+bit 317 O 1 *
+bit 316 O 1 *
+bit 315 O 1 *
+bit 314 O 1 *
+bit 313 O 1 *
+bit 312 O 1 *
+bit 311 O 1 *
+bit 310 O 1 *
+bit 309 O 1 *
+bit 308 O 1 *
+bit 307 O 1 *
+bit 306 O 1 *
+bit 305 O 1 *
+bit 304 I 1 IO_P55
+bit 303 O 1 IO_P55 302 1 Z
+bit 302 C 1 *
+bit 301 O 1 *
+bit 300 O 1 *
+bit 299 O 1 *
+bit 298 O 1 *
+bit 297 O 1 *
+bit 296 O 1 *
+bit 295 O 1 *
+bit 294 O 1 *
+bit 293 O 1 *
+bit 292 I 1 IO_P54
+bit 291 O 1 IO_P54 290 1 Z
+bit 290 C 1 *
+bit 289 I 1 IO_P53
+bit 288 O 1 IO_P53 287 1 Z
+bit 287 C 1 *
+bit 286 I 1 CCLK_P52
+bit 285 O 1 CCLK_P52 284 1 Z
+bit 284 C 1 *
+bit 283 I 1 DONE_P51
+bit 282 O 1 DONE_P51 281 1 Z
+bit 281 C 1 *
+bit 280 O 1 *
+bit 279 O 1 *
+bit 278 O 1 *
+bit 277 I 1 IO_P50
+bit 276 O 1 IO_P50 275 1 Z
+bit 275 C 1 *
+bit 274 I 1 IO_P49
+bit 273 O 1 IO_P49 272 1 Z
+bit 272 C 1 *
+bit 271 O 1 *
+bit 270 O 1 *
+bit 269 O 1 *
+bit 268 O 1 *
+bit 267 O 1 *
+bit 266 O 1 *
+bit 265 O 1 *
+bit 264 O 1 *
+bit 263 O 1 *
+bit 262 I 1 IO_P48
+bit 261 O 1 IO_P48 260 1 Z
+bit 260 C 1 *
+bit 259 I 1 IO_P47
+bit 258 O 1 IO_P47 257 1 Z
+bit 257 C 1 *
+bit 256 I 1 IO_P44
+bit 255 O 1 IO_P44 254 1 Z
+bit 254 C 1 *
+bit 253 I 1 IO_P43
+bit 252 O 1 IO_P43 251 1 Z
+bit 251 C 1 *
+bit 250 O 1 *
+bit 249 O 1 *
+bit 248 O 1 *
+bit 247 I 1 IO_P42
+bit 246 O 1 IO_P42 245 1 Z
+bit 245 C 1 *
+bit 244 I 1 IO_P40
+bit 243 O 1 IO_P40 242 1 Z
+bit 242 C 1 *
+bit 241 I 1 IO_P39
+bit 240 O 1 IO_P39 239 1 Z
+bit 239 C 1 *
+bit 238 I 1 IO_P38
+bit 237 O 1 IO_P38 236 1 Z
+bit 236 C 1 *
+bit 235 O 1 *
+bit 234 O 1 *
+bit 233 O 1 *
+bit 232 I 1 IO_P37
+bit 231 O 1 IO_P37 230 1 Z
+bit 230 C 1 *
+bit 229 I 1 IO_P36
+bit 228 O 1 IO_P36 227 1 Z
+bit 227 C 1 *
+bit 226 I 1 IO_P35
+bit 225 O 1 IO_P35 224 1 Z
+bit 224 C 1 *
+bit 223 I 1 IO_P34
+bit 222 O 1 IO_P34 221 1 Z
+bit 221 C 1 *
+bit 220 O 1 *
+bit 219 O 1 *
+bit 218 O 1 *
+bit 217 I 1 IO_P32
+bit 216 O 1 IO_P32 215 1 Z
+bit 215 C 1 *
+bit 214 I 1 IO_P30
+bit 213 O 1 IO_P30 212 1 Z
+bit 212 C 1 *
+bit 211 O 1 *
+bit 210 O 1 *
+bit 209 O 1 *
+bit 208 O 1 *
+bit 207 O 1 *
+bit 206 O 1 *
+bit 205 O 1 *
+bit 204 O 1 *
+bit 203 O 1 *
+bit 202 O 1 *
+bit 201 O 1 *
+bit 200 O 1 *
+bit 199 O 1 *
+bit 198 O 1 *
+bit 197 O 1 *
+bit 196 I 1 IO_P28
+bit 195 O 1 IO_P28 194 1 Z
+bit 194 C 1 *
+bit 193 I 1 IO_P27
+bit 192 O 1 IO_P27 191 1 Z
+bit 191 C 1 *
+bit 190 I 1 M2_P26
+bit 189 I 1 M0_P25
+bit 188 I 1 M1_P24
+bit 187 I 1 IO_P23
+bit 186 O 1 IO_P23 185 1 Z
+bit 185 C 1 *
+bit 184 I 1 IO_P22
+bit 183 O 1 IO_P22 182 1 Z
+bit 182 C 1 *
+bit 181 O 1 *
+bit 180 O 1 *
+bit 179 O 1 *
+bit 178 O 1 *
+bit 177 O 1 *
+bit 176 O 1 *
+bit 175 O 1 *
+bit 174 O 1 *
+bit 173 O 1 *
+bit 172 I 1 IO_P21
+bit 171 O 1 IO_P21 170 1 Z
+bit 170 C 1 *
+bit 169 O 1 *
+bit 168 O 1 *
+bit 167 O 1 *
+bit 166 O 1 *
+bit 165 O 1 *
+bit 164 O 1 *
+bit 163 O 1 *
+bit 162 O 1 *
+bit 161 O 1 *
+bit 160 O 1 *
+bit 159 O 1 *
+bit 158 O 1 *
+bit 157 O 1 *
+bit 156 O 1 *
+bit 155 O 1 *
+bit 154 I 1 IO_P17
+bit 153 O 1 IO_P17 152 1 Z
+bit 152 C 1 *
+bit 151 I 1 IO_P16
+bit 150 O 1 IO_P16 149 1 Z
+bit 149 C 1 *
+bit 148 I 1 IO_P15
+bit 147 O 1 IO_P15 146 1 Z
+bit 146 C 1 *
+bit 145 I 1 IO_P14
+bit 144 O 1 IO_P14 143 1 Z
+bit 143 C 1 *
+bit 142 I 1 IO_P13
+bit 141 O 1 IO_P13 140 1 Z
+bit 140 C 1 *
+bit 139 I 1 IO_P12
+bit 138 O 1 IO_P12 137 1 Z
+bit 137 C 1 *
+bit 136 I 1 IO_P11
+bit 135 O 1 IO_P11 134 1 Z
+bit 134 C 1 *
+bit 133 O 1 *
+bit 132 O 1 *
+bit 131 O 1 *
+bit 130 O 1 *
+bit 129 O 1 *
+bit 128 O 1 *
+bit 127 I 1 IO_P9
+bit 126 O 1 IO_P9 125 1 Z
+bit 125 C 1 *
+bit 124 I 1 IO_P8
+bit 123 O 1 IO_P8 122 1 Z
+bit 122 C 1 *
+bit 121 O 1 *
+bit 120 O 1 *
+bit 119 O 1 *
+bit 118 O 1 *
+bit 117 O 1 *
+bit 116 O 1 *
+bit 115 I 1 IO_P5
+bit 114 O 1 IO_P5 113 1 Z
+bit 113 C 1 *
+bit 112 I 1 IO_P4
+bit 111 O 1 IO_P4 110 1 Z
+bit 110 C 1 *
+bit 109 O 1 *
+bit 108 O 1 *
+bit 107 O 1 *
+bit 106 O 1 *
+bit 105 O 1 *
+bit 104 O 1 *
+bit 103 O 1 *
+bit 102 O 1 *
+bit 101 O 1 *
+bit 100 O 1 *
+bit 99 O 1 *
+bit 98 O 1 *
+bit 97 I 1 IO_P2
+bit 96 O 1 IO_P2 95 1 Z
+bit 95 C 1 *
+bit 94 I 1 IO_P1
+bit 93 O 1 IO_P1 92 1 Z
+bit 92 C 1 *
+bit 91 O 1 *
+bit 90 I 1 HSWAP_EN_P98
+bit 89 O 1 *
+bit 88 O 1 *
+bit 87 O 1 *
+bit 86 I 1 IO_P97
+bit 85 O 1 IO_P97 84 1 Z
+bit 84 C 1 *
+bit 83 I 1 IO_P96
+bit 82 O 1 IO_P96 81 1 Z
+bit 81 C 1 *
+bit 80 O 1 *
+bit 79 O 1 *
+bit 78 O 1 *
+bit 77 O 1 *
+bit 76 O 1 *
+bit 75 O 1 *
+bit 74 O 1 *
+bit 73 O 1 *
+bit 72 O 1 *
+bit 71 O 1 *
+bit 70 O 1 *
+bit 69 O 1 *
+bit 68 O 1 *
+bit 67 O 1 *
+bit 66 O 1 *
+bit 65 O 1 *
+bit 64 O 1 *
+bit 63 O 1 *
+bit 62 O 1 *
+bit 61 O 1 *
+bit 60 O 1 *
+bit 59 O 1 *
+bit 58 O 1 *
+bit 57 O 1 *
+bit 56 I 1 IO_P92
+bit 55 O 1 IO_P92 54 1 Z
+bit 54 C 1 *
+bit 53 I 1 IO_P91
+bit 52 O 1 IO_P91 51 1 Z
+bit 51 C 1 *
+bit 50 I 1 IO_P90
+bit 49 O 1 IO_P90 48 1 Z
+bit 48 C 1 *
+bit 47 I 1 IO_P89
+bit 46 O 1 IO_P89 45 1 Z
+bit 45 C 1 *
+bit 44 O 1 *
+bit 43 O 1 *
+bit 42 O 1 *
+bit 41 I 1 IO_P88
+bit 40 O 1 IO_P88 39 1 Z
+bit 39 C 1 *
+bit 38 I 1 IO_P87
+bit 37 O 1 IO_P87 36 1 Z
+bit 36 C 1 *
+bit 35 I 1 IO_P86
+bit 34 O 1 IO_P86 33 1 Z
+bit 33 C 1 *
+bit 32 I 1 IO_P85
+bit 31 O 1 IO_P85 30 1 Z
+bit 30 C 1 *
+bit 29 O 1 *
+bit 28 O 1 *
+bit 27 O 1 *
+bit 26 O 1 *
+bit 25 O 1 *
+bit 24 O 1 *
+bit 23 O 1 *
+bit 22 O 1 *
+bit 21 O 1 *
+bit 20 O 1 *
+bit 19 O 1 *
+bit 18 O 1 *
+bit 17 O 1 *
+bit 16 O 1 *
+bit 15 O 1 *
+bit 14 I 1 IO_P81
+bit 13 O 1 IO_P81 12 1 Z
+bit 12 C 1 *
+bit 11 O 1 *
+bit 10 O 1 *
+bit 9 O 1 *
+bit 8 O 1 *
+bit 7 O 1 *
+bit 6 O 1 *
+bit 5 I 1 IO_P80
+bit 4 O 1 IO_P80 3 1 Z
+bit 3 C 1 *
+bit 2 I 1 IO_P79
+bit 1 O 1 IO_P79 0 1 Z
+bit 0 C 1 *
--- /dev/null
+0000 xc3s5000 0
--- /dev/null
+signal GND1
+signal GND2
+signal GND3
+signal GND4
+signal GND5
+signal GND6
+signal GND7
+signal GND8
+signal GND9
+signal GND10
+signal GND11
+signal GND12
+signal GND13
+signal GND14
+signal GND15
+signal GND16
+signal GND17
+signal GND18
+signal GND19
+signal GND20
+signal GND21
+signal GND22
+signal GND23
+signal GND24
+signal GND25
+signal GND26
+signal GND27
+signal GND28
+signal GND29
+signal GND30
+signal GND31
+signal GND32
+signal GND33
+signal GND34
+signal GND35
+signal GND36
+signal GND37
+signal GND38
+signal GND39
+signal GND40
+signal GND41
+signal GND42
+signal GND43
+signal GND44
+signal GND45
+signal GND46
+signal GND47
+signal GND48
+signal GND49
+signal GND50
+signal GND51
+signal GND52
+signal GND53
+signal GND54
+signal GND55
+signal GND56
+signal GND57
+signal GND58
+signal GND59
+signal GND60
+signal GND61
+signal GND62
+signal GND63
+signal GND64
+signal GND65
+signal GND66
+signal GND67
+signal GND68
+signal GND69
+signal GND70
+signal GND71
+signal GND72
+signal GND73
+signal GND74
+signal GND75
+signal GND76
+signal GND77
+signal GND78
+signal GND79
+signal GND80
+signal GND81
+signal GND82
+signal GND83
+signal GND84
+signal GND85
+signal GND86
+signal GND87
+signal GND88
+signal GND89
+signal GND90
+signal GND91
+signal GND92
+signal GND93
+signal GND94
+signal GND95
+signal GND96
+signal GND97
+signal GND98
+signal GND99
+signal GND100
+signal GND101
+signal GND102
+signal GND103
+signal GND104
+signal GND105
+signal GND106
+signal GND107
+signal GND108
+signal GND109
+signal GND110
+signal GND111
+signal GND112
+signal GND113
+signal GND114
+signal GND115
+signal GND116
+signal GND117
+signal GND118
+signal GND119
+signal GND120
+signal GND121
+signal GND122
+signal GND123
+signal GND124
+signal GND125
+signal GND126
+signal GND127
+signal GND128
+signal GND129
+signal GND130
+signal GND131
+signal GND132
+signal GND133
+signal GND134
+signal GND135
+signal GND136
+signal GND137
+signal GND138
+signal GND139
+signal GND140
+signal GND141
+signal GND142
+signal GND143
+signal GND144
+signal GND145
+signal GND146
+signal GND147
+signal GND148
+signal NC1
+signal NC2
+signal NC3
+signal NC4
+signal NC5
+signal CCLK_PAD706
+signal DONE_PAD705
+signal HSWAP_EN_PAD147
+signal M0_PAD412
+signal M1_PAD411
+signal M2_PAD413
+signal PROG_B
+signal TCK
+signal TDI
+signal TDO
+signal TMS
+signal VCCAUX1
+signal VCCAUX2
+signal VCCAUX3
+signal VCCAUX4
+signal VCCAUX5
+signal VCCAUX6
+signal VCCAUX7
+signal VCCAUX8
+signal VCCAUX9
+signal VCCAUX10
+signal VCCAUX11
+signal VCCAUX12
+signal VCCAUX13
+signal VCCAUX14
+signal VCCAUX15
+signal VCCAUX16
+signal VCCAUX17
+signal VCCAUX18
+signal VCCAUX19
+signal VCCAUX20
+signal VCCAUX21
+signal VCCAUX22
+signal VCCAUX23
+signal VCCAUX24
+signal VCCAUX25
+signal VCCAUX26
+signal VCCAUX27
+signal VCCAUX28
+signal VCCAUX29
+signal VCCAUX30
+signal VCCAUX31
+signal VCCAUX32
+signal VCCINT1
+signal VCCINT2
+signal VCCINT3
+signal VCCINT4
+signal VCCINT5
+signal VCCINT6
+signal VCCINT7
+signal VCCINT8
+signal VCCINT9
+signal VCCINT10
+signal VCCINT11
+signal VCCINT12
+signal VCCINT13
+signal VCCINT14
+signal VCCINT15
+signal VCCINT16
+signal VCCINT17
+signal VCCINT18
+signal VCCINT19
+signal VCCINT20
+signal VCCINT21
+signal VCCINT22
+signal VCCINT23
+signal VCCINT24
+signal VCCINT25
+signal VCCINT26
+signal VCCINT27
+signal VCCINT28
+signal VCCINT29
+signal VCCINT30
+signal VCCINT31
+signal VCCINT32
+signal VCCINT33
+signal VCCINT34
+signal VCCINT35
+signal VCCINT36
+signal VCCINT37
+signal VCCINT38
+signal VCCINT39
+signal VCCINT40
+signal VCCO01
+signal VCCO02
+signal VCCO03
+signal VCCO04
+signal VCCO05
+signal VCCO06
+signal VCCO07
+signal VCCO08
+signal VCCO09
+signal VCCO010
+signal VCCO011
+signal VCCO012
+signal VCCO013
+signal VCCO11
+signal VCCO12
+signal VCCO13
+signal VCCO14
+signal VCCO15
+signal VCCO16
+signal VCCO17
+signal VCCO18
+signal VCCO19
+signal VCCO110
+signal VCCO111
+signal VCCO112
+signal VCCO113
+signal VCCO21
+signal VCCO22
+signal VCCO23
+signal VCCO24
+signal VCCO25
+signal VCCO26
+signal VCCO27
+signal VCCO28
+signal VCCO29
+signal VCCO210
+signal VCCO211
+signal VCCO31
+signal VCCO32
+signal VCCO33
+signal VCCO34
+signal VCCO35
+signal VCCO36
+signal VCCO37
+signal VCCO38
+signal VCCO39
+signal VCCO310
+signal VCCO311
+signal VCCO41
+signal VCCO42
+signal VCCO43
+signal VCCO44
+signal VCCO45
+signal VCCO46
+signal VCCO47
+signal VCCO48
+signal VCCO49
+signal VCCO410
+signal VCCO411
+signal VCCO412
+signal VCCO413
+signal VCCO51
+signal VCCO52
+signal VCCO53
+signal VCCO54
+signal VCCO55
+signal VCCO56
+signal VCCO57
+signal VCCO58
+signal VCCO59
+signal VCCO510
+signal VCCO511
+signal VCCO512
+signal VCCO513
+signal VCCO61
+signal VCCO62
+signal VCCO63
+signal VCCO64
+signal VCCO65
+signal VCCO66
+signal VCCO67
+signal VCCO68
+signal VCCO69
+signal VCCO610
+signal VCCO611
+signal VCCO71
+signal VCCO72
+signal VCCO73
+signal VCCO74
+signal VCCO75
+signal VCCO76
+signal VCCO77
+signal VCCO78
+signal VCCO79
+signal VCCO710
+signal VCCO711
+signal IO_PAD2
+signal IO_PAD3
+signal IO_PAD4
+signal IO_PAD5
+signal IO_PAD7
+signal IO_PAD9
+signal IO_PAD10
+signal IO_PAD11
+signal IO_PAD13
+signal IO_PAD14
+signal IO_PAD15
+signal IO_PAD17
+signal IO_PAD19
+signal IO_PAD21
+signal IO_PAD23
+signal IO_PAD25
+signal IO_PAD26
+signal IO_PAD27
+signal IO_PAD28
+signal IO_PAD29
+signal IO_PAD31
+signal IO_PAD33
+signal IO_PAD34
+signal IO_PAD35
+signal IO_PAD37
+signal IO_PAD38
+signal IO_PAD39
+signal IO_PAD41
+signal IO_PAD43
+signal IO_PAD45
+signal IO_PAD46
+signal IO_PAD47
+signal IO_PAD49
+signal IO_PAD50
+signal IO_PAD51
+signal IO_PAD53
+signal IO_PAD55
+signal IO_PAD57
+signal IO_PAD58
+signal IO_PAD59
+signal IO_PAD61
+signal IO_PAD62
+signal IO_PAD63
+signal IO_PAD65
+signal IO_PAD67
+signal IO_PAD69
+signal IO_PAD70
+signal IO_PAD71
+signal IO_PAD73
+signal IO_PAD74
+signal IO_PAD75
+signal IO_PAD77
+signal IO_PAD79
+signal IO_PAD80
+signal IO_PAD81
+signal IO_PAD83
+signal IO_PAD84
+signal IO_PAD85
+signal IO_PAD86
+signal IO_PAD87
+signal IO_PAD89
+signal IO_PAD91
+signal IO_PAD93
+signal IO_PAD95
+signal IO_PAD97
+signal IO_PAD98
+signal IO_PAD99
+signal IO_PAD101
+signal IO_PAD103
+signal IO_PAD104
+signal IO_PAD105
+signal IO_PAD107
+signal IO_PAD108
+signal IO_PAD109
+signal IO_PAD110
+signal IO_PAD111
+signal IO_PAD113
+signal IO_PAD115
+signal IO_PAD117
+signal IO_PAD118
+signal IO_PAD119
+signal IO_PAD121
+signal IO_PAD122
+signal IO_PAD123
+signal IO_PAD125
+signal IO_PAD127
+signal IO_PAD129
+signal IO_PAD131
+signal IO_PAD132
+signal IO_PAD133
+signal IO_PAD134
+signal IO_PAD135
+signal IO_PAD137
+signal IO_PAD139
+signal IO_PAD140
+signal IO_PAD141
+signal IO_PAD142
+signal IO_PAD143
+signal IO_PAD145
+signal IO_PAD146
+signal IO_PAD151
+signal IO_PAD152
+signal IO_PAD153
+signal IO_PAD154
+signal IO_PAD155
+signal IO_PAD156
+signal IO_PAD158
+signal IO_PAD159
+signal IO_PAD160
+signal IO_PAD162
+signal IO_PAD163
+signal IO_PAD164
+signal IO_PAD166
+signal IO_PAD167
+signal IO_PAD168
+signal IO_PAD170
+signal IO_PAD172
+signal IO_PAD174
+signal IO_PAD175
+signal IO_PAD176
+signal IO_PAD177
+signal IO_PAD178
+signal IO_PAD180
+signal IO_PAD182
+signal IO_PAD183
+signal IO_PAD184
+signal IO_PAD185
+signal IO_PAD186
+signal IO_PAD187
+signal IO_PAD188
+signal IO_PAD190
+signal IO_PAD192
+signal IO_PAD193
+signal IO_PAD194
+signal IO_PAD195
+signal IO_PAD196
+signal IO_PAD198
+signal IO_PAD200
+signal IO_PAD201
+signal IO_PAD202
+signal IO_PAD204
+signal IO_PAD206
+signal IO_PAD207
+signal IO_PAD208
+signal IO_PAD210
+signal IO_PAD211
+signal IO_PAD212
+signal IO_PAD213
+signal IO_PAD214
+signal IO_PAD216
+signal IO_PAD218
+signal IO_PAD219
+signal IO_PAD220
+signal IO_PAD221
+signal IO_PAD222
+signal IO_PAD224
+signal IO_PAD225
+signal IO_PAD226
+signal IO_PAD228
+signal IO_PAD230
+signal IO_PAD231
+signal IO_PAD232
+signal IO_PAD234
+signal IO_PAD236
+signal IO_PAD237
+signal IO_PAD238
+signal IO_PAD239
+signal IO_PAD240
+signal IO_PAD242
+signal IO_PAD244
+signal IO_PAD245
+signal IO_PAD246
+signal IO_PAD247
+signal IO_PAD248
+signal IO_PAD250
+signal IO_PAD252
+signal IO_PAD253
+signal IO_PAD254
+signal IO_PAD255
+signal IO_PAD256
+signal IO_PAD258
+signal IO_PAD259
+signal IO_PAD260
+signal IO_PAD262
+signal IO_PAD264
+signal IO_PAD265
+signal IO_PAD266
+signal IO_PAD268
+signal IO_PAD270
+signal IO_PAD271
+signal IO_PAD272
+signal IO_PAD273
+signal IO_PAD274
+signal IO_PAD276
+signal IO_PAD278
+signal IO_PAD279
+signal IO_PAD281
+signal IO_PAD282
+signal IO_PAD284
+signal IO_PAD286
+signal IO_PAD287
+signal IO_PAD288
+signal IO_PAD289
+signal IO_PAD290
+signal IO_PAD292
+signal IO_PAD294
+signal IO_PAD295
+signal IO_PAD296
+signal IO_PAD298
+signal IO_PAD300
+signal IO_PAD301
+signal IO_PAD302
+signal IO_PAD304
+signal IO_PAD305
+signal IO_PAD306
+signal IO_PAD307
+signal IO_PAD308
+signal IO_PAD310
+signal IO_PAD312
+signal IO_PAD313
+signal IO_PAD314
+signal IO_PAD315
+signal IO_PAD316
+signal IO_PAD318
+signal IO_PAD320
+signal IO_PAD321
+signal IO_PAD322
+signal IO_PAD323
+signal IO_PAD324
+signal IO_PAD326
+signal IO_PAD328
+signal IO_PAD329
+signal IO_PAD330
+signal IO_PAD332
+signal IO_PAD334
+signal IO_PAD335
+signal IO_PAD336
+signal IO_PAD338
+signal IO_PAD339
+signal IO_PAD340
+signal IO_PAD341
+signal IO_PAD342
+signal IO_PAD344
+signal IO_PAD346
+signal IO_PAD347
+signal IO_PAD348
+signal IO_PAD349
+signal IO_PAD350
+signal IO_PAD352
+signal IO_PAD353
+signal IO_PAD354
+signal IO_PAD356
+signal IO_PAD358
+signal IO_PAD359
+signal IO_PAD360
+signal IO_PAD362
+signal IO_PAD364
+signal IO_PAD365
+signal IO_PAD366
+signal IO_PAD367
+signal IO_PAD368
+signal IO_PAD370
+signal IO_PAD372
+signal IO_PAD373
+signal IO_PAD374
+signal IO_PAD375
+signal IO_PAD376
+signal IO_PAD377
+signal IO_PAD378
+signal IO_PAD380
+signal IO_PAD382
+signal IO_PAD383
+signal IO_PAD384
+signal IO_PAD385
+signal IO_PAD386
+signal IO_PAD388
+signal IO_PAD390
+signal IO_PAD392
+signal IO_PAD393
+signal IO_PAD394
+signal IO_PAD396
+signal IO_PAD397
+signal IO_PAD398
+signal IO_PAD400
+signal IO_PAD401
+signal IO_PAD402
+signal IO_PAD404
+signal IO_PAD405
+signal IO_PAD406
+signal IO_PAD407
+signal IO_PAD408
+signal IO_PAD409
+signal IO_PAD414
+signal IO_PAD415
+signal IO_PAD417
+signal IO_PAD418
+signal IO_PAD419
+signal IO_PAD420
+signal IO_PAD421
+signal IO_PAD423
+signal IO_PAD425
+signal IO_PAD426
+signal IO_PAD427
+signal IO_PAD428
+signal IO_PAD429
+signal IO_PAD431
+signal IO_PAD433
+signal IO_PAD435
+signal IO_PAD437
+signal IO_PAD438
+signal IO_PAD439
+signal IO_PAD441
+signal IO_PAD442
+signal IO_PAD443
+signal IO_PAD445
+signal IO_PAD447
+signal IO_PAD449
+signal IO_PAD450
+signal IO_PAD451
+signal IO_PAD452
+signal IO_PAD453
+signal IO_PAD455
+signal IO_PAD456
+signal IO_PAD457
+signal IO_PAD459
+signal IO_PAD461
+signal IO_PAD462
+signal IO_PAD463
+signal IO_PAD465
+signal IO_PAD467
+signal IO_PAD469
+signal IO_PAD471
+signal IO_PAD473
+signal IO_PAD474
+signal IO_PAD475
+signal IO_PAD476
+signal IO_PAD477
+signal IO_PAD479
+signal IO_PAD480
+signal IO_PAD481
+signal IO_PAD483
+signal IO_PAD485
+signal IO_PAD486
+signal IO_PAD487
+signal IO_PAD489
+signal IO_PAD490
+signal IO_PAD491
+signal IO_PAD493
+signal IO_PAD495
+signal IO_PAD497
+signal IO_PAD498
+signal IO_PAD499
+signal IO_PAD501
+signal IO_PAD502
+signal IO_PAD503
+signal IO_PAD505
+signal IO_PAD507
+signal IO_PAD509
+signal IO_PAD510
+signal IO_PAD511
+signal IO_PAD513
+signal IO_PAD514
+signal IO_PAD515
+signal IO_PAD517
+signal IO_PAD519
+signal IO_PAD521
+signal IO_PAD522
+signal IO_PAD523
+signal IO_PAD525
+signal IO_PAD526
+signal IO_PAD527
+signal IO_PAD529
+signal IO_PAD531
+signal IO_PAD532
+signal IO_PAD533
+signal IO_PAD534
+signal IO_PAD535
+signal IO_PAD537
+signal IO_PAD539
+signal IO_PAD541
+signal IO_PAD543
+signal IO_PAD545
+signal IO_PAD546
+signal IO_PAD547
+signal IO_PAD549
+signal IO_PAD550
+signal IO_PAD551
+signal IO_PAD553
+signal IO_PAD555
+signal IO_PAD556
+signal IO_PAD557
+signal IO_PAD558
+signal IO_PAD560
+signal IO_PAD561
+signal IO_PAD562
+signal IO_PAD563
+signal IO_PAD565
+signal IO_PAD567
+signal IO_PAD568
+signal IO_PAD569
+signal IO_PAD571
+signal IO_PAD572
+signal IO_PAD573
+signal IO_PAD575
+signal IO_PAD577
+signal IO_PAD579
+signal IO_PAD581
+signal IO_PAD583
+signal IO_PAD584
+signal IO_PAD585
+signal IO_PAD586
+signal IO_PAD587
+signal IO_PAD589
+signal IO_PAD591
+signal IO_PAD592
+signal IO_PAD593
+signal IO_PAD595
+signal IO_PAD596
+signal IO_PAD597
+signal IO_PAD599
+signal IO_PAD601
+signal IO_PAD603
+signal IO_PAD604
+signal IO_PAD605
+signal IO_PAD607
+signal IO_PAD608
+signal IO_PAD609
+signal IO_PAD611
+signal IO_PAD613
+signal IO_PAD615
+signal IO_PAD616
+signal IO_PAD617
+signal IO_PAD619
+signal IO_PAD620
+signal IO_PAD621
+signal IO_PAD623
+signal IO_PAD625
+signal IO_PAD627
+signal IO_PAD628
+signal IO_PAD629
+signal IO_PAD631
+signal IO_PAD632
+signal IO_PAD633
+signal IO_PAD635
+signal IO_PAD637
+signal IO_PAD638
+signal IO_PAD639
+signal IO_PAD641
+signal IO_PAD642
+signal IO_PAD643
+signal IO_PAD644
+signal IO_PAD645
+signal IO_PAD647
+signal IO_PAD649
+signal IO_PAD651
+signal IO_PAD653
+signal IO_PAD655
+signal IO_PAD656
+signal IO_PAD657
+signal IO_PAD659
+signal IO_PAD661
+signal IO_PAD662
+signal IO_PAD663
+signal IO_PAD665
+signal IO_PAD666
+signal IO_PAD667
+signal IO_PAD668
+signal IO_PAD669
+signal IO_PAD671
+signal IO_PAD673
+signal IO_PAD675
+signal IO_PAD676
+signal IO_PAD677
+signal IO_PAD679
+signal IO_PAD680
+signal IO_PAD681
+signal IO_PAD683
+signal IO_PAD685
+signal IO_PAD687
+signal IO_PAD689
+signal IO_PAD690
+signal IO_PAD691
+signal IO_PAD692
+signal IO_PAD693
+signal IO_PAD695
+signal IO_PAD697
+signal IO_PAD698
+signal IO_PAD699
+signal IO_PAD700
+signal IO_PAD701
+signal IO_PAD703
+signal IO_PAD704
+signal IO_PAD710
+signal IO_PAD711
+signal IO_PAD712
+signal IO_PAD713
+signal IO_PAD714
+signal IO_PAD715
+signal IO_PAD717
+signal IO_PAD718
+signal IO_PAD719
+signal IO_PAD721
+signal IO_PAD722
+signal IO_PAD723
+signal IO_PAD725
+signal IO_PAD726
+signal IO_PAD727
+signal IO_PAD729
+signal IO_PAD731
+signal IO_PAD733
+signal IO_PAD734
+signal IO_PAD735
+signal IO_PAD736
+signal IO_PAD737
+signal IO_PAD739
+signal IO_PAD741
+signal IO_PAD742
+signal IO_PAD743
+signal IO_PAD744
+signal IO_PAD745
+signal IO_PAD746
+signal IO_PAD747
+signal IO_PAD749
+signal IO_PAD751
+signal IO_PAD752
+signal IO_PAD753
+signal IO_PAD754
+signal IO_PAD755
+signal IO_PAD757
+signal IO_PAD759
+signal IO_PAD760
+signal IO_PAD761
+signal IO_PAD763
+signal IO_PAD765
+signal IO_PAD766
+signal IO_PAD767
+signal IO_PAD769
+signal IO_PAD770
+signal IO_PAD771
+signal IO_PAD772
+signal IO_PAD773
+signal IO_PAD775
+signal IO_PAD777
+signal IO_PAD778
+signal IO_PAD779
+signal IO_PAD780
+signal IO_PAD781
+signal IO_PAD783
+signal IO_PAD784
+signal IO_PAD785
+signal IO_PAD787
+signal IO_PAD789
+signal IO_PAD790
+signal IO_PAD791
+signal IO_PAD793
+signal IO_PAD795
+signal IO_PAD796
+signal IO_PAD797
+signal IO_PAD798
+signal IO_PAD799
+signal IO_PAD801
+signal IO_PAD803
+signal IO_PAD804
+signal IO_PAD805
+signal IO_PAD806
+signal IO_PAD807
+signal IO_PAD809
+signal IO_PAD811
+signal IO_PAD812
+signal IO_PAD813
+signal IO_PAD814
+signal IO_PAD815
+signal IO_PAD817
+signal IO_PAD818
+signal IO_PAD819
+signal IO_PAD821
+signal IO_PAD823
+signal IO_PAD824
+signal IO_PAD825
+signal IO_PAD827
+signal IO_PAD829
+signal IO_PAD830
+signal IO_PAD831
+signal IO_PAD832
+signal IO_PAD833
+signal IO_PAD835
+signal IO_PAD837
+signal IO_PAD838
+signal IO_PAD840
+signal IO_PAD841
+signal IO_PAD843
+signal IO_PAD845
+signal IO_PAD846
+signal IO_PAD847
+signal IO_PAD848
+signal IO_PAD849
+signal IO_PAD851
+signal IO_PAD853
+signal IO_PAD854
+signal IO_PAD855
+signal IO_PAD857
+signal IO_PAD859
+signal IO_PAD860
+signal IO_PAD861
+signal IO_PAD863
+signal IO_PAD864
+signal IO_PAD865
+signal IO_PAD866
+signal IO_PAD867
+signal IO_PAD869
+signal IO_PAD871
+signal IO_PAD872
+signal IO_PAD873
+signal IO_PAD874
+signal IO_PAD875
+signal IO_PAD877
+signal IO_PAD879
+signal IO_PAD880
+signal IO_PAD881
+signal IO_PAD882
+signal IO_PAD883
+signal IO_PAD885
+signal IO_PAD887
+signal IO_PAD888
+signal IO_PAD889
+signal IO_PAD891
+signal IO_PAD893
+signal IO_PAD894
+signal IO_PAD895
+signal IO_PAD897
+signal IO_PAD898
+signal IO_PAD899
+signal IO_PAD900
+signal IO_PAD901
+signal IO_PAD903
+signal IO_PAD905
+signal IO_PAD906
+signal IO_PAD907
+signal IO_PAD908
+signal IO_PAD909
+signal IO_PAD911
+signal IO_PAD912
+signal IO_PAD913
+signal IO_PAD915
+signal IO_PAD917
+signal IO_PAD918
+signal IO_PAD919
+signal IO_PAD921
+signal IO_PAD923
+signal IO_PAD924
+signal IO_PAD925
+signal IO_PAD926
+signal IO_PAD927
+signal IO_PAD929
+signal IO_PAD931
+signal IO_PAD932
+signal IO_PAD933
+signal IO_PAD934
+signal IO_PAD935
+signal IO_PAD936
+signal IO_PAD937
+signal IO_PAD939
+signal IO_PAD941
+signal IO_PAD942
+signal IO_PAD943
+signal IO_PAD944
+signal IO_PAD945
+signal IO_PAD947
+signal IO_PAD949
+signal IO_PAD951
+signal IO_PAD952
+signal IO_PAD953
+signal IO_PAD955
+signal IO_PAD956
+signal IO_PAD957
+signal IO_PAD959
+signal IO_PAD960
+signal IO_PAD961
+signal IO_PAD963
+signal IO_PAD964
+signal IO_PAD965
+signal IO_PAD966
+signal IO_PAD967
+signal IO_PAD968
+signal IO_PAD973
+signal IO_PAD974
+signal IO_PAD976
+signal IO_PAD977
+signal IO_PAD978
+signal IO_PAD979
+signal IO_PAD980
+signal IO_PAD982
+signal IO_PAD984
+signal IO_PAD985
+signal IO_PAD986
+signal IO_PAD987
+signal IO_PAD988
+signal IO_PAD990
+signal IO_PAD992
+signal IO_PAD994
+signal IO_PAD996
+signal IO_PAD997
+signal IO_PAD998
+signal IO_PAD1000
+signal IO_PAD1001
+signal IO_PAD1002
+signal IO_PAD1004
+signal IO_PAD1006
+signal IO_PAD1008
+signal IO_PAD1009
+signal IO_PAD1010
+signal IO_PAD1011
+signal IO_PAD1012
+signal IO_PAD1014
+signal IO_PAD1015
+signal IO_PAD1016
+signal IO_PAD1018
+signal IO_PAD1020
+signal IO_PAD1021
+signal IO_PAD1022
+signal IO_PAD1024
+signal IO_PAD1026
+signal IO_PAD1028
+signal IO_PAD1030
+signal IO_PAD1032
+signal IO_PAD1033
+signal IO_PAD1034
+signal IO_PAD1035
+signal IO_PAD1036
+signal IO_PAD1038
+signal IO_PAD1039
+signal IO_PAD1040
+signal IO_PAD1042
+signal IO_PAD1044
+signal IO_PAD1045
+signal IO_PAD1046
+signal IO_PAD1048
+signal IO_PAD1049
+signal IO_PAD1050
+signal IO_PAD1052
+signal IO_PAD1054
+signal IO_PAD1056
+signal IO_PAD1057
+signal IO_PAD1058
+signal IO_PAD1060
+signal IO_PAD1061
+signal IO_PAD1062
+signal IO_PAD1064
+signal IO_PAD1066
+signal IO_PAD1068
+signal IO_PAD1069
+signal IO_PAD1070
+signal IO_PAD1072
+signal IO_PAD1073
+signal IO_PAD1074
+signal IO_PAD1076
+signal IO_PAD1078
+signal IO_PAD1080
+signal IO_PAD1081
+signal IO_PAD1082
+signal IO_PAD1084
+signal IO_PAD1085
+signal IO_PAD1086
+signal IO_PAD1088
+signal IO_PAD1090
+signal IO_PAD1091
+signal IO_PAD1092
+signal IO_PAD1093
+signal IO_PAD1094
+signal IO_PAD1096
+signal IO_PAD1098
+signal IO_PAD1100
+signal IO_PAD1102
+signal IO_PAD1104
+signal IO_PAD1105
+signal IO_PAD1106
+signal IO_PAD1108
+signal IO_PAD1109
+signal IO_PAD1110
+signal IO_PAD1112
+signal IO_PAD1114
+signal IO_PAD1115
+signal IO_PAD1116
+
+register BSR 2459
+register BR 1
+register DIR 32
+
+instruction length 6
+
+instruction EXTEST 000000 BSR
+instruction SAMPLE/PRELOAD 000001 BSR
+instruction IDCODE 001001 DIR
+instruction BYPASS 111111 BR
+
+bit 2458 I 1 IO_PAD968
+bit 2457 O 1 IO_PAD968 2456 1 Z
+bit 2456 C 1 *
+bit 2455 I 1 IO_PAD967
+bit 2454 O 1 IO_PAD967 2453 1 Z
+bit 2453 C 1 *
+bit 2452 I 1 IO_PAD966
+bit 2451 O 1 IO_PAD966 2450 1 Z
+bit 2450 C 1 *
+bit 2449 I 1 IO_PAD965
+bit 2448 O 1 IO_PAD965 2447 1 Z
+bit 2447 C 1 *
+bit 2446 I 1 IO_PAD964
+bit 2445 O 1 IO_PAD964 2444 1 Z
+bit 2444 C 1 *
+bit 2443 I 1 IO_PAD963
+bit 2442 O 1 IO_PAD963 2441 1 Z
+bit 2441 C 1 *
+bit 2440 I 1 IO_PAD961
+bit 2439 O 1 IO_PAD961 2438 1 Z
+bit 2438 C 1 *
+bit 2437 I 1 IO_PAD960
+bit 2436 O 1 IO_PAD960 2435 1 Z
+bit 2435 C 1 *
+bit 2434 I 1 IO_PAD959
+bit 2433 O 1 IO_PAD959 2432 1 Z
+bit 2432 C 1 *
+bit 2431 I 1 IO_PAD957
+bit 2430 O 1 IO_PAD957 2429 1 Z
+bit 2429 C 1 *
+bit 2428 I 1 IO_PAD956
+bit 2427 O 1 IO_PAD956 2426 1 Z
+bit 2426 C 1 *
+bit 2425 I 1 IO_PAD955
+bit 2424 O 1 IO_PAD955 2423 1 Z
+bit 2423 C 1 *
+bit 2422 I 1 IO_PAD953
+bit 2421 O 1 IO_PAD953 2420 1 Z
+bit 2420 C 1 *
+bit 2419 I 1 IO_PAD952
+bit 2418 O 1 IO_PAD952 2417 1 Z
+bit 2417 C 1 *
+bit 2416 I 1 IO_PAD951
+bit 2415 O 1 IO_PAD951 2414 1 Z
+bit 2414 C 1 *
+bit 2413 O 1 *
+bit 2412 O 1 *
+bit 2411 O 1 *
+bit 2410 O 1 *
+bit 2409 O 1 *
+bit 2408 O 1 *
+bit 2407 I 1 IO_PAD949
+bit 2406 O 1 IO_PAD949 2405 1 Z
+bit 2405 C 1 *
+bit 2404 I 1 IO_PAD947
+bit 2403 O 1 IO_PAD947 2402 1 Z
+bit 2402 C 1 *
+bit 2401 I 1 IO_PAD945
+bit 2400 O 1 IO_PAD945 2399 1 Z
+bit 2399 C 1 *
+bit 2398 I 1 IO_PAD944
+bit 2397 O 1 IO_PAD944 2396 1 Z
+bit 2396 C 1 *
+bit 2395 I 1 IO_PAD943
+bit 2394 O 1 IO_PAD943 2393 1 Z
+bit 2393 C 1 *
+bit 2392 I 1 IO_PAD942
+bit 2391 O 1 IO_PAD942 2390 1 Z
+bit 2390 C 1 *
+bit 2389 I 1 IO_PAD941
+bit 2388 O 1 IO_PAD941 2387 1 Z
+bit 2387 C 1 *
+bit 2386 I 1 IO_PAD939
+bit 2385 O 1 IO_PAD939 2384 1 Z
+bit 2384 C 1 *
+bit 2383 I 1 IO_PAD937
+bit 2382 O 1 IO_PAD937 2381 1 Z
+bit 2381 C 1 *
+bit 2380 I 1 IO_PAD936
+bit 2379 O 1 IO_PAD936 2378 1 Z
+bit 2378 C 1 *
+bit 2377 I 1 IO_PAD935
+bit 2376 O 1 IO_PAD935 2375 1 Z
+bit 2375 C 1 *
+bit 2374 I 1 IO_PAD934
+bit 2373 O 1 IO_PAD934 2372 1 Z
+bit 2372 C 1 *
+bit 2371 I 1 IO_PAD933
+bit 2370 O 1 IO_PAD933 2369 1 Z
+bit 2369 C 1 *
+bit 2368 I 1 IO_PAD932
+bit 2367 O 1 IO_PAD932 2366 1 Z
+bit 2366 C 1 *
+bit 2365 I 1 IO_PAD931
+bit 2364 O 1 IO_PAD931 2363 1 Z
+bit 2363 C 1 *
+bit 2362 I 1 IO_PAD929
+bit 2361 O 1 IO_PAD929 2360 1 Z
+bit 2360 C 1 *
+bit 2359 I 1 IO_PAD927
+bit 2358 O 1 IO_PAD927 2357 1 Z
+bit 2357 C 1 *
+bit 2356 I 1 IO_PAD926
+bit 2355 O 1 IO_PAD926 2354 1 Z
+bit 2354 C 1 *
+bit 2353 I 1 IO_PAD925
+bit 2352 O 1 IO_PAD925 2351 1 Z
+bit 2351 C 1 *
+bit 2350 I 1 IO_PAD924
+bit 2349 O 1 IO_PAD924 2348 1 Z
+bit 2348 C 1 *
+bit 2347 I 1 IO_PAD923
+bit 2346 O 1 IO_PAD923 2345 1 Z
+bit 2345 C 1 *
+bit 2344 I 1 IO_PAD921
+bit 2343 O 1 IO_PAD921 2342 1 Z
+bit 2342 C 1 *
+bit 2341 I 1 IO_PAD919
+bit 2340 O 1 IO_PAD919 2339 1 Z
+bit 2339 C 1 *
+bit 2338 I 1 IO_PAD918
+bit 2337 O 1 IO_PAD918 2336 1 Z
+bit 2336 C 1 *
+bit 2335 I 1 IO_PAD917
+bit 2334 O 1 IO_PAD917 2333 1 Z
+bit 2333 C 1 *
+bit 2332 O 1 *
+bit 2331 O 1 *
+bit 2330 O 1 *
+bit 2329 O 1 *
+bit 2328 O 1 *
+bit 2327 O 1 *
+bit 2326 I 1 IO_PAD915
+bit 2325 O 1 IO_PAD915 2324 1 Z
+bit 2324 C 1 *
+bit 2323 I 1 IO_PAD913
+bit 2322 O 1 IO_PAD913 2321 1 Z
+bit 2321 C 1 *
+bit 2320 I 1 IO_PAD912
+bit 2319 O 1 IO_PAD912 2318 1 Z
+bit 2318 C 1 *
+bit 2317 I 1 IO_PAD911
+bit 2316 O 1 IO_PAD911 2315 1 Z
+bit 2315 C 1 *
+bit 2314 I 1 IO_PAD909
+bit 2313 O 1 IO_PAD909 2312 1 Z
+bit 2312 C 1 *
+bit 2311 I 1 IO_PAD908
+bit 2310 O 1 IO_PAD908 2309 1 Z
+bit 2309 C 1 *
+bit 2308 I 1 IO_PAD907
+bit 2307 O 1 IO_PAD907 2306 1 Z
+bit 2306 C 1 *
+bit 2305 I 1 IO_PAD906
+bit 2304 O 1 IO_PAD906 2303 1 Z
+bit 2303 C 1 *
+bit 2302 I 1 IO_PAD905
+bit 2301 O 1 IO_PAD905 2300 1 Z
+bit 2300 C 1 *
+bit 2299 I 1 IO_PAD903
+bit 2298 O 1 IO_PAD903 2297 1 Z
+bit 2297 C 1 *
+bit 2296 I 1 IO_PAD901
+bit 2295 O 1 IO_PAD901 2294 1 Z
+bit 2294 C 1 *
+bit 2293 I 1 IO_PAD900
+bit 2292 O 1 IO_PAD900 2291 1 Z
+bit 2291 C 1 *
+bit 2290 I 1 IO_PAD899
+bit 2289 O 1 IO_PAD899 2288 1 Z
+bit 2288 C 1 *
+bit 2287 I 1 IO_PAD898
+bit 2286 O 1 IO_PAD898 2285 1 Z
+bit 2285 C 1 *
+bit 2284 I 1 IO_PAD897
+bit 2283 O 1 IO_PAD897 2282 1 Z
+bit 2282 C 1 *
+bit 2281 I 1 IO_PAD895
+bit 2280 O 1 IO_PAD895 2279 1 Z
+bit 2279 C 1 *
+bit 2278 I 1 IO_PAD894
+bit 2277 O 1 IO_PAD894 2276 1 Z
+bit 2276 C 1 *
+bit 2275 I 1 IO_PAD893
+bit 2274 O 1 IO_PAD893 2273 1 Z
+bit 2273 C 1 *
+bit 2272 I 1 IO_PAD891
+bit 2271 O 1 IO_PAD891 2270 1 Z
+bit 2270 C 1 *
+bit 2269 I 1 IO_PAD889
+bit 2268 O 1 IO_PAD889 2267 1 Z
+bit 2267 C 1 *
+bit 2266 I 1 IO_PAD888
+bit 2265 O 1 IO_PAD888 2264 1 Z
+bit 2264 C 1 *
+bit 2263 I 1 IO_PAD887
+bit 2262 O 1 IO_PAD887 2261 1 Z
+bit 2261 C 1 *
+bit 2260 O 1 *
+bit 2259 O 1 *
+bit 2258 O 1 *
+bit 2257 O 1 *
+bit 2256 O 1 *
+bit 2255 O 1 *
+bit 2254 I 1 IO_PAD885
+bit 2253 O 1 IO_PAD885 2252 1 Z
+bit 2252 C 1 *
+bit 2251 I 1 IO_PAD883
+bit 2250 O 1 IO_PAD883 2249 1 Z
+bit 2249 C 1 *
+bit 2248 I 1 IO_PAD882
+bit 2247 O 1 IO_PAD882 2246 1 Z
+bit 2246 C 1 *
+bit 2245 I 1 IO_PAD881
+bit 2244 O 1 IO_PAD881 2243 1 Z
+bit 2243 C 1 *
+bit 2242 I 1 IO_PAD880
+bit 2241 O 1 IO_PAD880 2240 1 Z
+bit 2240 C 1 *
+bit 2239 I 1 IO_PAD879
+bit 2238 O 1 IO_PAD879 2237 1 Z
+bit 2237 C 1 *
+bit 2236 I 1 IO_PAD877
+bit 2235 O 1 IO_PAD877 2234 1 Z
+bit 2234 C 1 *
+bit 2233 I 1 IO_PAD875
+bit 2232 O 1 IO_PAD875 2231 1 Z
+bit 2231 C 1 *
+bit 2230 I 1 IO_PAD874
+bit 2229 O 1 IO_PAD874 2228 1 Z
+bit 2228 C 1 *
+bit 2227 I 1 IO_PAD873
+bit 2226 O 1 IO_PAD873 2225 1 Z
+bit 2225 C 1 *
+bit 2224 I 1 IO_PAD872
+bit 2223 O 1 IO_PAD872 2222 1 Z
+bit 2222 C 1 *
+bit 2221 I 1 IO_PAD871
+bit 2220 O 1 IO_PAD871 2219 1 Z
+bit 2219 C 1 *
+bit 2218 I 1 IO_PAD869
+bit 2217 O 1 IO_PAD869 2216 1 Z
+bit 2216 C 1 *
+bit 2215 I 1 IO_PAD867
+bit 2214 O 1 IO_PAD867 2213 1 Z
+bit 2213 C 1 *
+bit 2212 I 1 IO_PAD866
+bit 2211 O 1 IO_PAD866 2210 1 Z
+bit 2210 C 1 *
+bit 2209 I 1 IO_PAD865
+bit 2208 O 1 IO_PAD865 2207 1 Z
+bit 2207 C 1 *
+bit 2206 I 1 IO_PAD864
+bit 2205 O 1 IO_PAD864 2204 1 Z
+bit 2204 C 1 *
+bit 2203 I 1 IO_PAD863
+bit 2202 O 1 IO_PAD863 2201 1 Z
+bit 2201 C 1 *
+bit 2200 I 1 IO_PAD861
+bit 2199 O 1 IO_PAD861 2198 1 Z
+bit 2198 C 1 *
+bit 2197 I 1 IO_PAD860
+bit 2196 O 1 IO_PAD860 2195 1 Z
+bit 2195 C 1 *
+bit 2194 I 1 IO_PAD859
+bit 2193 O 1 IO_PAD859 2192 1 Z
+bit 2192 C 1 *
+bit 2191 I 1 IO_PAD857
+bit 2190 O 1 IO_PAD857 2189 1 Z
+bit 2189 C 1 *
+bit 2188 I 1 IO_PAD855
+bit 2187 O 1 IO_PAD855 2186 1 Z
+bit 2186 C 1 *
+bit 2185 I 1 IO_PAD854
+bit 2184 O 1 IO_PAD854 2183 1 Z
+bit 2183 C 1 *
+bit 2182 I 1 IO_PAD853
+bit 2181 O 1 IO_PAD853 2180 1 Z
+bit 2180 C 1 *
+bit 2179 O 1 *
+bit 2178 O 1 *
+bit 2177 O 1 *
+bit 2176 O 1 *
+bit 2175 O 1 *
+bit 2174 O 1 *
+bit 2173 I 1 IO_PAD851
+bit 2172 O 1 IO_PAD851 2171 1 Z
+bit 2171 C 1 *
+bit 2170 I 1 IO_PAD849
+bit 2169 O 1 IO_PAD849 2168 1 Z
+bit 2168 C 1 *
+bit 2167 I 1 IO_PAD848
+bit 2166 O 1 IO_PAD848 2165 1 Z
+bit 2165 C 1 *
+bit 2164 I 1 IO_PAD847
+bit 2163 O 1 IO_PAD847 2162 1 Z
+bit 2162 C 1 *
+bit 2161 I 1 IO_PAD846
+bit 2160 O 1 IO_PAD846 2159 1 Z
+bit 2159 C 1 *
+bit 2158 I 1 IO_PAD845
+bit 2157 O 1 IO_PAD845 2156 1 Z
+bit 2156 C 1 *
+bit 2155 I 1 IO_PAD843
+bit 2154 O 1 IO_PAD843 2153 1 Z
+bit 2153 C 1 *
+bit 2152 I 1 IO_PAD841
+bit 2151 O 1 IO_PAD841 2150 1 Z
+bit 2150 C 1 *
+bit 2149 I 1 IO_PAD840
+bit 2148 O 1 IO_PAD840 2147 1 Z
+bit 2147 C 1 *
+bit 2146 I 1 IO_PAD838
+bit 2145 O 1 IO_PAD838 2144 1 Z
+bit 2144 C 1 *
+bit 2143 I 1 IO_PAD837
+bit 2142 O 1 IO_PAD837 2141 1 Z
+bit 2141 C 1 *
+bit 2140 I 1 IO_PAD835
+bit 2139 O 1 IO_PAD835 2138 1 Z
+bit 2138 C 1 *
+bit 2137 I 1 IO_PAD833
+bit 2136 O 1 IO_PAD833 2135 1 Z
+bit 2135 C 1 *
+bit 2134 I 1 IO_PAD832
+bit 2133 O 1 IO_PAD832 2132 1 Z
+bit 2132 C 1 *
+bit 2131 I 1 IO_PAD831
+bit 2130 O 1 IO_PAD831 2129 1 Z
+bit 2129 C 1 *
+bit 2128 I 1 IO_PAD830
+bit 2127 O 1 IO_PAD830 2126 1 Z
+bit 2126 C 1 *
+bit 2125 I 1 IO_PAD829
+bit 2124 O 1 IO_PAD829 2123 1 Z
+bit 2123 C 1 *
+bit 2122 I 1 IO_PAD827
+bit 2121 O 1 IO_PAD827 2120 1 Z
+bit 2120 C 1 *
+bit 2119 O 1 *
+bit 2118 O 1 *
+bit 2117 O 1 *
+bit 2116 O 1 *
+bit 2115 O 1 *
+bit 2114 O 1 *
+bit 2113 I 1 IO_PAD825
+bit 2112 O 1 IO_PAD825 2111 1 Z
+bit 2111 C 1 *
+bit 2110 I 1 IO_PAD824
+bit 2109 O 1 IO_PAD824 2108 1 Z
+bit 2108 C 1 *
+bit 2107 I 1 IO_PAD823
+bit 2106 O 1 IO_PAD823 2105 1 Z
+bit 2105 C 1 *
+bit 2104 I 1 IO_PAD821
+bit 2103 O 1 IO_PAD821 2102 1 Z
+bit 2102 C 1 *
+bit 2101 I 1 IO_PAD819
+bit 2100 O 1 IO_PAD819 2099 1 Z
+bit 2099 C 1 *
+bit 2098 I 1 IO_PAD818
+bit 2097 O 1 IO_PAD818 2096 1 Z
+bit 2096 C 1 *
+bit 2095 I 1 IO_PAD817
+bit 2094 O 1 IO_PAD817 2093 1 Z
+bit 2093 C 1 *
+bit 2092 I 1 IO_PAD815
+bit 2091 O 1 IO_PAD815 2090 1 Z
+bit 2090 C 1 *
+bit 2089 I 1 IO_PAD814
+bit 2088 O 1 IO_PAD814 2087 1 Z
+bit 2087 C 1 *
+bit 2086 I 1 IO_PAD813
+bit 2085 O 1 IO_PAD813 2084 1 Z
+bit 2084 C 1 *
+bit 2083 I 1 IO_PAD812
+bit 2082 O 1 IO_PAD812 2081 1 Z
+bit 2081 C 1 *
+bit 2080 I 1 IO_PAD811
+bit 2079 O 1 IO_PAD811 2078 1 Z
+bit 2078 C 1 *
+bit 2077 I 1 IO_PAD809
+bit 2076 O 1 IO_PAD809 2075 1 Z
+bit 2075 C 1 *
+bit 2074 I 1 IO_PAD807
+bit 2073 O 1 IO_PAD807 2072 1 Z
+bit 2072 C 1 *
+bit 2071 I 1 IO_PAD806
+bit 2070 O 1 IO_PAD806 2069 1 Z
+bit 2069 C 1 *
+bit 2068 I 1 IO_PAD805
+bit 2067 O 1 IO_PAD805 2066 1 Z
+bit 2066 C 1 *
+bit 2065 I 1 IO_PAD804
+bit 2064 O 1 IO_PAD804 2063 1 Z
+bit 2063 C 1 *
+bit 2062 I 1 IO_PAD803
+bit 2061 O 1 IO_PAD803 2060 1 Z
+bit 2060 C 1 *
+bit 2059 I 1 IO_PAD801
+bit 2058 O 1 IO_PAD801 2057 1 Z
+bit 2057 C 1 *
+bit 2056 I 1 IO_PAD799
+bit 2055 O 1 IO_PAD799 2054 1 Z
+bit 2054 C 1 *
+bit 2053 I 1 IO_PAD798
+bit 2052 O 1 IO_PAD798 2051 1 Z
+bit 2051 C 1 *
+bit 2050 I 1 IO_PAD797
+bit 2049 O 1 IO_PAD797 2048 1 Z
+bit 2048 C 1 *
+bit 2047 I 1 IO_PAD796
+bit 2046 O 1 IO_PAD796 2045 1 Z
+bit 2045 C 1 *
+bit 2044 I 1 IO_PAD795
+bit 2043 O 1 IO_PAD795 2042 1 Z
+bit 2042 C 1 *
+bit 2041 I 1 IO_PAD793
+bit 2040 O 1 IO_PAD793 2039 1 Z
+bit 2039 C 1 *
+bit 2038 O 1 *
+bit 2037 O 1 *
+bit 2036 O 1 *
+bit 2035 O 1 *
+bit 2034 O 1 *
+bit 2033 O 1 *
+bit 2032 I 1 IO_PAD791
+bit 2031 O 1 IO_PAD791 2030 1 Z
+bit 2030 C 1 *
+bit 2029 I 1 IO_PAD790
+bit 2028 O 1 IO_PAD790 2027 1 Z
+bit 2027 C 1 *
+bit 2026 I 1 IO_PAD789
+bit 2025 O 1 IO_PAD789 2024 1 Z
+bit 2024 C 1 *
+bit 2023 I 1 IO_PAD787
+bit 2022 O 1 IO_PAD787 2021 1 Z
+bit 2021 C 1 *
+bit 2020 I 1 IO_PAD785
+bit 2019 O 1 IO_PAD785 2018 1 Z
+bit 2018 C 1 *
+bit 2017 I 1 IO_PAD784
+bit 2016 O 1 IO_PAD784 2015 1 Z
+bit 2015 C 1 *
+bit 2014 I 1 IO_PAD783
+bit 2013 O 1 IO_PAD783 2012 1 Z
+bit 2012 C 1 *
+bit 2011 I 1 IO_PAD781
+bit 2010 O 1 IO_PAD781 2009 1 Z
+bit 2009 C 1 *
+bit 2008 I 1 IO_PAD780
+bit 2007 O 1 IO_PAD780 2006 1 Z
+bit 2006 C 1 *
+bit 2005 I 1 IO_PAD779
+bit 2004 O 1 IO_PAD779 2003 1 Z
+bit 2003 C 1 *
+bit 2002 I 1 IO_PAD778
+bit 2001 O 1 IO_PAD778 2000 1 Z
+bit 2000 C 1 *
+bit 1999 I 1 IO_PAD777
+bit 1998 O 1 IO_PAD777 1997 1 Z
+bit 1997 C 1 *
+bit 1996 I 1 IO_PAD775
+bit 1995 O 1 IO_PAD775 1994 1 Z
+bit 1994 C 1 *
+bit 1993 I 1 IO_PAD773
+bit 1992 O 1 IO_PAD773 1991 1 Z
+bit 1991 C 1 *
+bit 1990 I 1 IO_PAD772
+bit 1989 O 1 IO_PAD772 1988 1 Z
+bit 1988 C 1 *
+bit 1987 I 1 IO_PAD771
+bit 1986 O 1 IO_PAD771 1985 1 Z
+bit 1985 C 1 *
+bit 1984 I 1 IO_PAD770
+bit 1983 O 1 IO_PAD770 1982 1 Z
+bit 1982 C 1 *
+bit 1981 I 1 IO_PAD769
+bit 1980 O 1 IO_PAD769 1979 1 Z
+bit 1979 C 1 *
+bit 1978 I 1 IO_PAD767
+bit 1977 O 1 IO_PAD767 1976 1 Z
+bit 1976 C 1 *
+bit 1975 I 1 IO_PAD766
+bit 1974 O 1 IO_PAD766 1973 1 Z
+bit 1973 C 1 *
+bit 1972 I 1 IO_PAD765
+bit 1971 O 1 IO_PAD765 1970 1 Z
+bit 1970 C 1 *
+bit 1969 I 1 IO_PAD763
+bit 1968 O 1 IO_PAD763 1967 1 Z
+bit 1967 C 1 *
+bit 1966 O 1 *
+bit 1965 O 1 *
+bit 1964 O 1 *
+bit 1963 O 1 *
+bit 1962 O 1 *
+bit 1961 O 1 *
+bit 1960 I 1 IO_PAD761
+bit 1959 O 1 IO_PAD761 1958 1 Z
+bit 1958 C 1 *
+bit 1957 I 1 IO_PAD760
+bit 1956 O 1 IO_PAD760 1955 1 Z
+bit 1955 C 1 *
+bit 1954 I 1 IO_PAD759
+bit 1953 O 1 IO_PAD759 1952 1 Z
+bit 1952 C 1 *
+bit 1951 I 1 IO_PAD757
+bit 1950 O 1 IO_PAD757 1949 1 Z
+bit 1949 C 1 *
+bit 1948 I 1 IO_PAD755
+bit 1947 O 1 IO_PAD755 1946 1 Z
+bit 1946 C 1 *
+bit 1945 I 1 IO_PAD754
+bit 1944 O 1 IO_PAD754 1943 1 Z
+bit 1943 C 1 *
+bit 1942 I 1 IO_PAD753
+bit 1941 O 1 IO_PAD753 1940 1 Z
+bit 1940 C 1 *
+bit 1939 I 1 IO_PAD752
+bit 1938 O 1 IO_PAD752 1937 1 Z
+bit 1937 C 1 *
+bit 1936 I 1 IO_PAD751
+bit 1935 O 1 IO_PAD751 1934 1 Z
+bit 1934 C 1 *
+bit 1933 I 1 IO_PAD749
+bit 1932 O 1 IO_PAD749 1931 1 Z
+bit 1931 C 1 *
+bit 1930 I 1 IO_PAD747
+bit 1929 O 1 IO_PAD747 1928 1 Z
+bit 1928 C 1 *
+bit 1927 I 1 IO_PAD746
+bit 1926 O 1 IO_PAD746 1925 1 Z
+bit 1925 C 1 *
+bit 1924 I 1 IO_PAD745
+bit 1923 O 1 IO_PAD745 1922 1 Z
+bit 1922 C 1 *
+bit 1921 I 1 IO_PAD744
+bit 1920 O 1 IO_PAD744 1919 1 Z
+bit 1919 C 1 *
+bit 1918 I 1 IO_PAD743
+bit 1917 O 1 IO_PAD743 1916 1 Z
+bit 1916 C 1 *
+bit 1915 I 1 IO_PAD742
+bit 1914 O 1 IO_PAD742 1913 1 Z
+bit 1913 C 1 *
+bit 1912 I 1 IO_PAD741
+bit 1911 O 1 IO_PAD741 1910 1 Z
+bit 1910 C 1 *
+bit 1909 I 1 IO_PAD739
+bit 1908 O 1 IO_PAD739 1907 1 Z
+bit 1907 C 1 *
+bit 1906 I 1 IO_PAD737
+bit 1905 O 1 IO_PAD737 1904 1 Z
+bit 1904 C 1 *
+bit 1903 I 1 IO_PAD736
+bit 1902 O 1 IO_PAD736 1901 1 Z
+bit 1901 C 1 *
+bit 1900 I 1 IO_PAD735
+bit 1899 O 1 IO_PAD735 1898 1 Z
+bit 1898 C 1 *
+bit 1897 I 1 IO_PAD734
+bit 1896 O 1 IO_PAD734 1895 1 Z
+bit 1895 C 1 *
+bit 1894 I 1 IO_PAD733
+bit 1893 O 1 IO_PAD733 1892 1 Z
+bit 1892 C 1 *
+bit 1891 I 1 IO_PAD731
+bit 1890 O 1 IO_PAD731 1889 1 Z
+bit 1889 C 1 *
+bit 1888 I 1 IO_PAD729
+bit 1887 O 1 IO_PAD729 1886 1 Z
+bit 1886 C 1 *
+bit 1885 O 1 *
+bit 1884 O 1 *
+bit 1883 O 1 *
+bit 1882 O 1 *
+bit 1881 O 1 *
+bit 1880 O 1 *
+bit 1879 I 1 IO_PAD727
+bit 1878 O 1 IO_PAD727 1877 1 Z
+bit 1877 C 1 *
+bit 1876 I 1 IO_PAD726
+bit 1875 O 1 IO_PAD726 1874 1 Z
+bit 1874 C 1 *
+bit 1873 I 1 IO_PAD725
+bit 1872 O 1 IO_PAD725 1871 1 Z
+bit 1871 C 1 *
+bit 1870 I 1 IO_PAD723
+bit 1869 O 1 IO_PAD723 1868 1 Z
+bit 1868 C 1 *
+bit 1867 I 1 IO_PAD722
+bit 1866 O 1 IO_PAD722 1865 1 Z
+bit 1865 C 1 *
+bit 1864 I 1 IO_PAD721
+bit 1863 O 1 IO_PAD721 1862 1 Z
+bit 1862 C 1 *
+bit 1861 I 1 IO_PAD719
+bit 1860 O 1 IO_PAD719 1859 1 Z
+bit 1859 C 1 *
+bit 1858 I 1 IO_PAD718
+bit 1857 O 1 IO_PAD718 1856 1 Z
+bit 1856 C 1 *
+bit 1855 I 1 IO_PAD717
+bit 1854 O 1 IO_PAD717 1853 1 Z
+bit 1853 C 1 *
+bit 1852 I 1 IO_PAD715
+bit 1851 O 1 IO_PAD715 1850 1 Z
+bit 1850 C 1 *
+bit 1849 I 1 IO_PAD714
+bit 1848 O 1 IO_PAD714 1847 1 Z
+bit 1847 C 1 *
+bit 1846 I 1 IO_PAD713
+bit 1845 O 1 IO_PAD713 1844 1 Z
+bit 1844 C 1 *
+bit 1843 I 1 IO_PAD712
+bit 1842 O 1 IO_PAD712 1841 1 Z
+bit 1841 C 1 *
+bit 1840 I 1 IO_PAD711
+bit 1839 O 1 IO_PAD711 1838 1 Z
+bit 1838 C 1 *
+bit 1837 I 1 IO_PAD710
+bit 1836 O 1 IO_PAD710 1835 1 Z
+bit 1835 C 1 *
+bit 1834 I 1 CCLK_PAD706
+bit 1833 O 1 CCLK_PAD706 1832 1 Z
+bit 1832 C 1 *
+bit 1831 I 1 DONE_PAD705
+bit 1830 O 1 DONE_PAD705 1829 1 Z
+bit 1829 C 1 *
+bit 1828 I 1 IO_PAD704
+bit 1827 O 1 IO_PAD704 1826 1 Z
+bit 1826 C 1 *
+bit 1825 I 1 IO_PAD703
+bit 1824 O 1 IO_PAD703 1823 1 Z
+bit 1823 C 1 *
+bit 1822 I 1 IO_PAD701
+bit 1821 O 1 IO_PAD701 1820 1 Z
+bit 1820 C 1 *
+bit 1819 I 1 IO_PAD700
+bit 1818 O 1 IO_PAD700 1817 1 Z
+bit 1817 C 1 *
+bit 1816 I 1 IO_PAD699
+bit 1815 O 1 IO_PAD699 1814 1 Z
+bit 1814 C 1 *
+bit 1813 I 1 IO_PAD698
+bit 1812 O 1 IO_PAD698 1811 1 Z
+bit 1811 C 1 *
+bit 1810 I 1 IO_PAD697
+bit 1809 O 1 IO_PAD697 1808 1 Z
+bit 1808 C 1 *
+bit 1807 I 1 IO_PAD695
+bit 1806 O 1 IO_PAD695 1805 1 Z
+bit 1805 C 1 *
+bit 1804 I 1 IO_PAD693
+bit 1803 O 1 IO_PAD693 1802 1 Z
+bit 1802 C 1 *
+bit 1801 I 1 IO_PAD692
+bit 1800 O 1 IO_PAD692 1799 1 Z
+bit 1799 C 1 *
+bit 1798 I 1 IO_PAD691
+bit 1797 O 1 IO_PAD691 1796 1 Z
+bit 1796 C 1 *
+bit 1795 I 1 IO_PAD690
+bit 1794 O 1 IO_PAD690 1793 1 Z
+bit 1793 C 1 *
+bit 1792 I 1 IO_PAD689
+bit 1791 O 1 IO_PAD689 1790 1 Z
+bit 1790 C 1 *
+bit 1789 I 1 IO_PAD687
+bit 1788 O 1 IO_PAD687 1787 1 Z
+bit 1787 C 1 *
+bit 1786 I 1 IO_PAD685
+bit 1785 O 1 IO_PAD685 1784 1 Z
+bit 1784 C 1 *
+bit 1783 I 1 IO_PAD683
+bit 1782 O 1 IO_PAD683 1781 1 Z
+bit 1781 C 1 *
+bit 1780 I 1 IO_PAD681
+bit 1779 O 1 IO_PAD681 1778 1 Z
+bit 1778 C 1 *
+bit 1777 I 1 IO_PAD680
+bit 1776 O 1 IO_PAD680 1775 1 Z
+bit 1775 C 1 *
+bit 1774 I 1 IO_PAD679
+bit 1773 O 1 IO_PAD679 1772 1 Z
+bit 1772 C 1 *
+bit 1771 I 1 IO_PAD677
+bit 1770 O 1 IO_PAD677 1769 1 Z
+bit 1769 C 1 *
+bit 1768 I 1 IO_PAD676
+bit 1767 O 1 IO_PAD676 1766 1 Z
+bit 1766 C 1 *
+bit 1765 I 1 IO_PAD675
+bit 1764 O 1 IO_PAD675 1763 1 Z
+bit 1763 C 1 *
+bit 1762 I 1 IO_PAD673
+bit 1761 O 1 IO_PAD673 1760 1 Z
+bit 1760 C 1 *
+bit 1759 I 1 IO_PAD671
+bit 1758 O 1 IO_PAD671 1757 1 Z
+bit 1757 C 1 *
+bit 1756 I 1 IO_PAD669
+bit 1755 O 1 IO_PAD669 1754 1 Z
+bit 1754 C 1 *
+bit 1753 I 1 IO_PAD668
+bit 1752 O 1 IO_PAD668 1751 1 Z
+bit 1751 C 1 *
+bit 1750 I 1 IO_PAD667
+bit 1749 O 1 IO_PAD667 1748 1 Z
+bit 1748 C 1 *
+bit 1747 I 1 IO_PAD666
+bit 1746 O 1 IO_PAD666 1745 1 Z
+bit 1745 C 1 *
+bit 1744 I 1 IO_PAD665
+bit 1743 O 1 IO_PAD665 1742 1 Z
+bit 1742 C 1 *
+bit 1741 I 1 IO_PAD663
+bit 1740 O 1 IO_PAD663 1739 1 Z
+bit 1739 C 1 *
+bit 1738 I 1 IO_PAD662
+bit 1737 O 1 IO_PAD662 1736 1 Z
+bit 1736 C 1 *
+bit 1735 I 1 IO_PAD661
+bit 1734 O 1 IO_PAD661 1733 1 Z
+bit 1733 C 1 *
+bit 1732 I 1 IO_PAD659
+bit 1731 O 1 IO_PAD659 1730 1 Z
+bit 1730 C 1 *
+bit 1729 I 1 IO_PAD657
+bit 1728 O 1 IO_PAD657 1727 1 Z
+bit 1727 C 1 *
+bit 1726 I 1 IO_PAD656
+bit 1725 O 1 IO_PAD656 1724 1 Z
+bit 1724 C 1 *
+bit 1723 I 1 IO_PAD655
+bit 1722 O 1 IO_PAD655 1721 1 Z
+bit 1721 C 1 *
+bit 1720 I 1 IO_PAD653
+bit 1719 O 1 IO_PAD653 1718 1 Z
+bit 1718 C 1 *
+bit 1717 I 1 IO_PAD651
+bit 1716 O 1 IO_PAD651 1715 1 Z
+bit 1715 C 1 *
+bit 1714 I 1 IO_PAD649
+bit 1713 O 1 IO_PAD649 1712 1 Z
+bit 1712 C 1 *
+bit 1711 I 1 IO_PAD647
+bit 1710 O 1 IO_PAD647 1709 1 Z
+bit 1709 C 1 *
+bit 1708 I 1 IO_PAD645
+bit 1707 O 1 IO_PAD645 1706 1 Z
+bit 1706 C 1 *
+bit 1705 I 1 IO_PAD644
+bit 1704 O 1 IO_PAD644 1703 1 Z
+bit 1703 C 1 *
+bit 1702 I 1 IO_PAD643
+bit 1701 O 1 IO_PAD643 1700 1 Z
+bit 1700 C 1 *
+bit 1699 I 1 IO_PAD642
+bit 1698 O 1 IO_PAD642 1697 1 Z
+bit 1697 C 1 *
+bit 1696 I 1 IO_PAD641
+bit 1695 O 1 IO_PAD641 1694 1 Z
+bit 1694 C 1 *
+bit 1693 I 1 IO_PAD639
+bit 1692 O 1 IO_PAD639 1691 1 Z
+bit 1691 C 1 *
+bit 1690 I 1 IO_PAD638
+bit 1689 O 1 IO_PAD638 1688 1 Z
+bit 1688 C 1 *
+bit 1687 I 1 IO_PAD637
+bit 1686 O 1 IO_PAD637 1685 1 Z
+bit 1685 C 1 *
+bit 1684 I 1 IO_PAD635
+bit 1683 O 1 IO_PAD635 1682 1 Z
+bit 1682 C 1 *
+bit 1681 I 1 IO_PAD633
+bit 1680 O 1 IO_PAD633 1679 1 Z
+bit 1679 C 1 *
+bit 1678 I 1 IO_PAD632
+bit 1677 O 1 IO_PAD632 1676 1 Z
+bit 1676 C 1 *
+bit 1675 I 1 IO_PAD631
+bit 1674 O 1 IO_PAD631 1673 1 Z
+bit 1673 C 1 *
+bit 1672 I 1 IO_PAD629
+bit 1671 O 1 IO_PAD629 1670 1 Z
+bit 1670 C 1 *
+bit 1669 I 1 IO_PAD628
+bit 1668 O 1 IO_PAD628 1667 1 Z
+bit 1667 C 1 *
+bit 1666 I 1 IO_PAD627
+bit 1665 O 1 IO_PAD627 1664 1 Z
+bit 1664 C 1 *
+bit 1663 I 1 IO_PAD625
+bit 1662 O 1 IO_PAD625 1661 1 Z
+bit 1661 C 1 *
+bit 1660 I 1 IO_PAD623
+bit 1659 O 1 IO_PAD623 1658 1 Z
+bit 1658 C 1 *
+bit 1657 I 1 IO_PAD621
+bit 1656 O 1 IO_PAD621 1655 1 Z
+bit 1655 C 1 *
+bit 1654 I 1 IO_PAD620
+bit 1653 O 1 IO_PAD620 1652 1 Z
+bit 1652 C 1 *
+bit 1651 I 1 IO_PAD619
+bit 1650 O 1 IO_PAD619 1649 1 Z
+bit 1649 C 1 *
+bit 1648 I 1 IO_PAD617
+bit 1647 O 1 IO_PAD617 1646 1 Z
+bit 1646 C 1 *
+bit 1645 I 1 IO_PAD616
+bit 1644 O 1 IO_PAD616 1643 1 Z
+bit 1643 C 1 *
+bit 1642 I 1 IO_PAD615
+bit 1641 O 1 IO_PAD615 1640 1 Z
+bit 1640 C 1 *
+bit 1639 I 1 IO_PAD613
+bit 1638 O 1 IO_PAD613 1637 1 Z
+bit 1637 C 1 *
+bit 1636 I 1 IO_PAD611
+bit 1635 O 1 IO_PAD611 1634 1 Z
+bit 1634 C 1 *
+bit 1633 I 1 IO_PAD609
+bit 1632 O 1 IO_PAD609 1631 1 Z
+bit 1631 C 1 *
+bit 1630 I 1 IO_PAD608
+bit 1629 O 1 IO_PAD608 1628 1 Z
+bit 1628 C 1 *
+bit 1627 I 1 IO_PAD607
+bit 1626 O 1 IO_PAD607 1625 1 Z
+bit 1625 C 1 *
+bit 1624 I 1 IO_PAD605
+bit 1623 O 1 IO_PAD605 1622 1 Z
+bit 1622 C 1 *
+bit 1621 I 1 IO_PAD604
+bit 1620 O 1 IO_PAD604 1619 1 Z
+bit 1619 C 1 *
+bit 1618 I 1 IO_PAD603
+bit 1617 O 1 IO_PAD603 1616 1 Z
+bit 1616 C 1 *
+bit 1615 I 1 IO_PAD601
+bit 1614 O 1 IO_PAD601 1613 1 Z
+bit 1613 C 1 *
+bit 1612 I 1 IO_PAD599
+bit 1611 O 1 IO_PAD599 1610 1 Z
+bit 1610 C 1 *
+bit 1609 I 1 IO_PAD597
+bit 1608 O 1 IO_PAD597 1607 1 Z
+bit 1607 C 1 *
+bit 1606 I 1 IO_PAD596
+bit 1605 O 1 IO_PAD596 1604 1 Z
+bit 1604 C 1 *
+bit 1603 I 1 IO_PAD595
+bit 1602 O 1 IO_PAD595 1601 1 Z
+bit 1601 C 1 *
+bit 1600 I 1 IO_PAD593
+bit 1599 O 1 IO_PAD593 1598 1 Z
+bit 1598 C 1 *
+bit 1597 I 1 IO_PAD592
+bit 1596 O 1 IO_PAD592 1595 1 Z
+bit 1595 C 1 *
+bit 1594 I 1 IO_PAD591
+bit 1593 O 1 IO_PAD591 1592 1 Z
+bit 1592 C 1 *
+bit 1591 I 1 IO_PAD589
+bit 1590 O 1 IO_PAD589 1589 1 Z
+bit 1589 C 1 *
+bit 1588 I 1 IO_PAD587
+bit 1587 O 1 IO_PAD587 1586 1 Z
+bit 1586 C 1 *
+bit 1585 I 1 IO_PAD586
+bit 1584 O 1 IO_PAD586 1583 1 Z
+bit 1583 C 1 *
+bit 1582 I 1 IO_PAD585
+bit 1581 O 1 IO_PAD585 1580 1 Z
+bit 1580 C 1 *
+bit 1579 I 1 IO_PAD584
+bit 1578 O 1 IO_PAD584 1577 1 Z
+bit 1577 C 1 *
+bit 1576 I 1 IO_PAD583
+bit 1575 O 1 IO_PAD583 1574 1 Z
+bit 1574 C 1 *
+bit 1573 I 1 IO_PAD581
+bit 1572 O 1 IO_PAD581 1571 1 Z
+bit 1571 C 1 *
+bit 1570 I 1 IO_PAD579
+bit 1569 O 1 IO_PAD579 1568 1 Z
+bit 1568 C 1 *
+bit 1567 I 1 IO_PAD577
+bit 1566 O 1 IO_PAD577 1565 1 Z
+bit 1565 C 1 *
+bit 1564 I 1 IO_PAD575
+bit 1563 O 1 IO_PAD575 1562 1 Z
+bit 1562 C 1 *
+bit 1561 I 1 IO_PAD573
+bit 1560 O 1 IO_PAD573 1559 1 Z
+bit 1559 C 1 *
+bit 1558 I 1 IO_PAD572
+bit 1557 O 1 IO_PAD572 1556 1 Z
+bit 1556 C 1 *
+bit 1555 I 1 IO_PAD571
+bit 1554 O 1 IO_PAD571 1553 1 Z
+bit 1553 C 1 *
+bit 1552 I 1 IO_PAD569
+bit 1551 O 1 IO_PAD569 1550 1 Z
+bit 1550 C 1 *
+bit 1549 I 1 IO_PAD568
+bit 1548 O 1 IO_PAD568 1547 1 Z
+bit 1547 C 1 *
+bit 1546 I 1 IO_PAD567
+bit 1545 O 1 IO_PAD567 1544 1 Z
+bit 1544 C 1 *
+bit 1543 I 1 IO_PAD565
+bit 1542 O 1 IO_PAD565 1541 1 Z
+bit 1541 C 1 *
+bit 1540 I 1 IO_PAD563
+bit 1539 O 1 IO_PAD563 1538 1 Z
+bit 1538 C 1 *
+bit 1537 I 1 IO_PAD562
+bit 1536 O 1 IO_PAD562 1535 1 Z
+bit 1535 C 1 *
+bit 1534 I 1 IO_PAD561
+bit 1533 O 1 IO_PAD561 1532 1 Z
+bit 1532 C 1 *
+bit 1531 I 1 IO_PAD560
+bit 1530 O 1 IO_PAD560 1529 1 Z
+bit 1529 C 1 *
+bit 1528 I 1 IO_PAD558
+bit 1527 O 1 IO_PAD558 1526 1 Z
+bit 1526 C 1 *
+bit 1525 I 1 IO_PAD557
+bit 1524 O 1 IO_PAD557 1523 1 Z
+bit 1523 C 1 *
+bit 1522 I 1 IO_PAD556
+bit 1521 O 1 IO_PAD556 1520 1 Z
+bit 1520 C 1 *
+bit 1519 I 1 IO_PAD555
+bit 1518 O 1 IO_PAD555 1517 1 Z
+bit 1517 C 1 *
+bit 1516 I 1 IO_PAD553
+bit 1515 O 1 IO_PAD553 1514 1 Z
+bit 1514 C 1 *
+bit 1513 I 1 IO_PAD551
+bit 1512 O 1 IO_PAD551 1511 1 Z
+bit 1511 C 1 *
+bit 1510 I 1 IO_PAD550
+bit 1509 O 1 IO_PAD550 1508 1 Z
+bit 1508 C 1 *
+bit 1507 I 1 IO_PAD549
+bit 1506 O 1 IO_PAD549 1505 1 Z
+bit 1505 C 1 *
+bit 1504 I 1 IO_PAD547
+bit 1503 O 1 IO_PAD547 1502 1 Z
+bit 1502 C 1 *
+bit 1501 I 1 IO_PAD546
+bit 1500 O 1 IO_PAD546 1499 1 Z
+bit 1499 C 1 *
+bit 1498 I 1 IO_PAD545
+bit 1497 O 1 IO_PAD545 1496 1 Z
+bit 1496 C 1 *
+bit 1495 I 1 IO_PAD543
+bit 1494 O 1 IO_PAD543 1493 1 Z
+bit 1493 C 1 *
+bit 1492 I 1 IO_PAD541
+bit 1491 O 1 IO_PAD541 1490 1 Z
+bit 1490 C 1 *
+bit 1489 I 1 IO_PAD539
+bit 1488 O 1 IO_PAD539 1487 1 Z
+bit 1487 C 1 *
+bit 1486 I 1 IO_PAD537
+bit 1485 O 1 IO_PAD537 1484 1 Z
+bit 1484 C 1 *
+bit 1483 I 1 IO_PAD535
+bit 1482 O 1 IO_PAD535 1481 1 Z
+bit 1481 C 1 *
+bit 1480 I 1 IO_PAD534
+bit 1479 O 1 IO_PAD534 1478 1 Z
+bit 1478 C 1 *
+bit 1477 I 1 IO_PAD533
+bit 1476 O 1 IO_PAD533 1475 1 Z
+bit 1475 C 1 *
+bit 1474 I 1 IO_PAD532
+bit 1473 O 1 IO_PAD532 1472 1 Z
+bit 1472 C 1 *
+bit 1471 I 1 IO_PAD531
+bit 1470 O 1 IO_PAD531 1469 1 Z
+bit 1469 C 1 *
+bit 1468 I 1 IO_PAD529
+bit 1467 O 1 IO_PAD529 1466 1 Z
+bit 1466 C 1 *
+bit 1465 I 1 IO_PAD527
+bit 1464 O 1 IO_PAD527 1463 1 Z
+bit 1463 C 1 *
+bit 1462 I 1 IO_PAD526
+bit 1461 O 1 IO_PAD526 1460 1 Z
+bit 1460 C 1 *
+bit 1459 I 1 IO_PAD525
+bit 1458 O 1 IO_PAD525 1457 1 Z
+bit 1457 C 1 *
+bit 1456 I 1 IO_PAD523
+bit 1455 O 1 IO_PAD523 1454 1 Z
+bit 1454 C 1 *
+bit 1453 I 1 IO_PAD522
+bit 1452 O 1 IO_PAD522 1451 1 Z
+bit 1451 C 1 *
+bit 1450 I 1 IO_PAD521
+bit 1449 O 1 IO_PAD521 1448 1 Z
+bit 1448 C 1 *
+bit 1447 I 1 IO_PAD519
+bit 1446 O 1 IO_PAD519 1445 1 Z
+bit 1445 C 1 *
+bit 1444 I 1 IO_PAD517
+bit 1443 O 1 IO_PAD517 1442 1 Z
+bit 1442 C 1 *
+bit 1441 I 1 IO_PAD515
+bit 1440 O 1 IO_PAD515 1439 1 Z
+bit 1439 C 1 *
+bit 1438 I 1 IO_PAD514
+bit 1437 O 1 IO_PAD514 1436 1 Z
+bit 1436 C 1 *
+bit 1435 I 1 IO_PAD513
+bit 1434 O 1 IO_PAD513 1433 1 Z
+bit 1433 C 1 *
+bit 1432 I 1 IO_PAD511
+bit 1431 O 1 IO_PAD511 1430 1 Z
+bit 1430 C 1 *
+bit 1429 I 1 IO_PAD510
+bit 1428 O 1 IO_PAD510 1427 1 Z
+bit 1427 C 1 *
+bit 1426 I 1 IO_PAD509
+bit 1425 O 1 IO_PAD509 1424 1 Z
+bit 1424 C 1 *
+bit 1423 I 1 IO_PAD507
+bit 1422 O 1 IO_PAD507 1421 1 Z
+bit 1421 C 1 *
+bit 1420 I 1 IO_PAD505
+bit 1419 O 1 IO_PAD505 1418 1 Z
+bit 1418 C 1 *
+bit 1417 I 1 IO_PAD503
+bit 1416 O 1 IO_PAD503 1415 1 Z
+bit 1415 C 1 *
+bit 1414 I 1 IO_PAD502
+bit 1413 O 1 IO_PAD502 1412 1 Z
+bit 1412 C 1 *
+bit 1411 I 1 IO_PAD501
+bit 1410 O 1 IO_PAD501 1409 1 Z
+bit 1409 C 1 *
+bit 1408 I 1 IO_PAD499
+bit 1407 O 1 IO_PAD499 1406 1 Z
+bit 1406 C 1 *
+bit 1405 I 1 IO_PAD498
+bit 1404 O 1 IO_PAD498 1403 1 Z
+bit 1403 C 1 *
+bit 1402 I 1 IO_PAD497
+bit 1401 O 1 IO_PAD497 1400 1 Z
+bit 1400 C 1 *
+bit 1399 I 1 IO_PAD495
+bit 1398 O 1 IO_PAD495 1397 1 Z
+bit 1397 C 1 *
+bit 1396 I 1 IO_PAD493
+bit 1395 O 1 IO_PAD493 1394 1 Z
+bit 1394 C 1 *
+bit 1393 I 1 IO_PAD491
+bit 1392 O 1 IO_PAD491 1391 1 Z
+bit 1391 C 1 *
+bit 1390 I 1 IO_PAD490
+bit 1389 O 1 IO_PAD490 1388 1 Z
+bit 1388 C 1 *
+bit 1387 I 1 IO_PAD489
+bit 1386 O 1 IO_PAD489 1385 1 Z
+bit 1385 C 1 *
+bit 1384 I 1 IO_PAD487
+bit 1383 O 1 IO_PAD487 1382 1 Z
+bit 1382 C 1 *
+bit 1381 I 1 IO_PAD486
+bit 1380 O 1 IO_PAD486 1379 1 Z
+bit 1379 C 1 *
+bit 1378 I 1 IO_PAD485
+bit 1377 O 1 IO_PAD485 1376 1 Z
+bit 1376 C 1 *
+bit 1375 I 1 IO_PAD483
+bit 1374 O 1 IO_PAD483 1373 1 Z
+bit 1373 C 1 *
+bit 1372 I 1 IO_PAD481
+bit 1371 O 1 IO_PAD481 1370 1 Z
+bit 1370 C 1 *
+bit 1369 I 1 IO_PAD480
+bit 1368 O 1 IO_PAD480 1367 1 Z
+bit 1367 C 1 *
+bit 1366 I 1 IO_PAD479
+bit 1365 O 1 IO_PAD479 1364 1 Z
+bit 1364 C 1 *
+bit 1363 I 1 IO_PAD477
+bit 1362 O 1 IO_PAD477 1361 1 Z
+bit 1361 C 1 *
+bit 1360 I 1 IO_PAD476
+bit 1359 O 1 IO_PAD476 1358 1 Z
+bit 1358 C 1 *
+bit 1357 I 1 IO_PAD475
+bit 1356 O 1 IO_PAD475 1355 1 Z
+bit 1355 C 1 *
+bit 1354 I 1 IO_PAD474
+bit 1353 O 1 IO_PAD474 1352 1 Z
+bit 1352 C 1 *
+bit 1351 I 1 IO_PAD473
+bit 1350 O 1 IO_PAD473 1349 1 Z
+bit 1349 C 1 *
+bit 1348 I 1 IO_PAD471
+bit 1347 O 1 IO_PAD471 1346 1 Z
+bit 1346 C 1 *
+bit 1345 I 1 IO_PAD469
+bit 1344 O 1 IO_PAD469 1343 1 Z
+bit 1343 C 1 *
+bit 1342 I 1 IO_PAD467
+bit 1341 O 1 IO_PAD467 1340 1 Z
+bit 1340 C 1 *
+bit 1339 I 1 IO_PAD465
+bit 1338 O 1 IO_PAD465 1337 1 Z
+bit 1337 C 1 *
+bit 1336 I 1 IO_PAD463
+bit 1335 O 1 IO_PAD463 1334 1 Z
+bit 1334 C 1 *
+bit 1333 I 1 IO_PAD462
+bit 1332 O 1 IO_PAD462 1331 1 Z
+bit 1331 C 1 *
+bit 1330 I 1 IO_PAD461
+bit 1329 O 1 IO_PAD461 1328 1 Z
+bit 1328 C 1 *
+bit 1327 I 1 IO_PAD459
+bit 1326 O 1 IO_PAD459 1325 1 Z
+bit 1325 C 1 *
+bit 1324 I 1 IO_PAD457
+bit 1323 O 1 IO_PAD457 1322 1 Z
+bit 1322 C 1 *
+bit 1321 I 1 IO_PAD456
+bit 1320 O 1 IO_PAD456 1319 1 Z
+bit 1319 C 1 *
+bit 1318 I 1 IO_PAD455
+bit 1317 O 1 IO_PAD455 1316 1 Z
+bit 1316 C 1 *
+bit 1315 I 1 IO_PAD453
+bit 1314 O 1 IO_PAD453 1313 1 Z
+bit 1313 C 1 *
+bit 1312 I 1 IO_PAD452
+bit 1311 O 1 IO_PAD452 1310 1 Z
+bit 1310 C 1 *
+bit 1309 I 1 IO_PAD451
+bit 1308 O 1 IO_PAD451 1307 1 Z
+bit 1307 C 1 *
+bit 1306 I 1 IO_PAD450
+bit 1305 O 1 IO_PAD450 1304 1 Z
+bit 1304 C 1 *
+bit 1303 I 1 IO_PAD449
+bit 1302 O 1 IO_PAD449 1301 1 Z
+bit 1301 C 1 *
+bit 1300 I 1 IO_PAD447
+bit 1299 O 1 IO_PAD447 1298 1 Z
+bit 1298 C 1 *
+bit 1297 I 1 IO_PAD445
+bit 1296 O 1 IO_PAD445 1295 1 Z
+bit 1295 C 1 *
+bit 1294 I 1 IO_PAD443
+bit 1293 O 1 IO_PAD443 1292 1 Z
+bit 1292 C 1 *
+bit 1291 I 1 IO_PAD442
+bit 1290 O 1 IO_PAD442 1289 1 Z
+bit 1289 C 1 *
+bit 1288 I 1 IO_PAD441
+bit 1287 O 1 IO_PAD441 1286 1 Z
+bit 1286 C 1 *
+bit 1285 I 1 IO_PAD439
+bit 1284 O 1 IO_PAD439 1283 1 Z
+bit 1283 C 1 *
+bit 1282 I 1 IO_PAD438
+bit 1281 O 1 IO_PAD438 1280 1 Z
+bit 1280 C 1 *
+bit 1279 I 1 IO_PAD437
+bit 1278 O 1 IO_PAD437 1277 1 Z
+bit 1277 C 1 *
+bit 1276 I 1 IO_PAD435
+bit 1275 O 1 IO_PAD435 1274 1 Z
+bit 1274 C 1 *
+bit 1273 I 1 IO_PAD433
+bit 1272 O 1 IO_PAD433 1271 1 Z
+bit 1271 C 1 *
+bit 1270 I 1 IO_PAD431
+bit 1269 O 1 IO_PAD431 1268 1 Z
+bit 1268 C 1 *
+bit 1267 I 1 IO_PAD429
+bit 1266 O 1 IO_PAD429 1265 1 Z
+bit 1265 C 1 *
+bit 1264 I 1 IO_PAD428
+bit 1263 O 1 IO_PAD428 1262 1 Z
+bit 1262 C 1 *
+bit 1261 I 1 IO_PAD427
+bit 1260 O 1 IO_PAD427 1259 1 Z
+bit 1259 C 1 *
+bit 1258 I 1 IO_PAD426
+bit 1257 O 1 IO_PAD426 1256 1 Z
+bit 1256 C 1 *
+bit 1255 I 1 IO_PAD425
+bit 1254 O 1 IO_PAD425 1253 1 Z
+bit 1253 C 1 *
+bit 1252 I 1 IO_PAD423
+bit 1251 O 1 IO_PAD423 1250 1 Z
+bit 1250 C 1 *
+bit 1249 I 1 IO_PAD421
+bit 1248 O 1 IO_PAD421 1247 1 Z
+bit 1247 C 1 *
+bit 1246 I 1 IO_PAD420
+bit 1245 O 1 IO_PAD420 1244 1 Z
+bit 1244 C 1 *
+bit 1243 I 1 IO_PAD419
+bit 1242 O 1 IO_PAD419 1241 1 Z
+bit 1241 C 1 *
+bit 1240 I 1 IO_PAD418
+bit 1239 O 1 IO_PAD418 1238 1 Z
+bit 1238 C 1 *
+bit 1237 I 1 IO_PAD417
+bit 1236 O 1 IO_PAD417 1235 1 Z
+bit 1235 C 1 *
+bit 1234 I 1 IO_PAD415
+bit 1233 O 1 IO_PAD415 1232 1 Z
+bit 1232 C 1 *
+bit 1231 I 1 IO_PAD414
+bit 1230 O 1 IO_PAD414 1229 1 Z
+bit 1229 C 1 *
+bit 1228 I 1 M2_PAD413
+bit 1227 I 1 M0_PAD412
+bit 1226 I 1 M1_PAD411
+bit 1225 I 1 IO_PAD409
+bit 1224 O 1 IO_PAD409 1223 1 Z
+bit 1223 C 1 *
+bit 1222 I 1 IO_PAD408
+bit 1221 O 1 IO_PAD408 1220 1 Z
+bit 1220 C 1 *
+bit 1219 I 1 IO_PAD407
+bit 1218 O 1 IO_PAD407 1217 1 Z
+bit 1217 C 1 *
+bit 1216 I 1 IO_PAD406
+bit 1215 O 1 IO_PAD406 1214 1 Z
+bit 1214 C 1 *
+bit 1213 I 1 IO_PAD405
+bit 1212 O 1 IO_PAD405 1211 1 Z
+bit 1211 C 1 *
+bit 1210 I 1 IO_PAD404
+bit 1209 O 1 IO_PAD404 1208 1 Z
+bit 1208 C 1 *
+bit 1207 I 1 IO_PAD402
+bit 1206 O 1 IO_PAD402 1205 1 Z
+bit 1205 C 1 *
+bit 1204 I 1 IO_PAD401
+bit 1203 O 1 IO_PAD401 1202 1 Z
+bit 1202 C 1 *
+bit 1201 I 1 IO_PAD400
+bit 1200 O 1 IO_PAD400 1199 1 Z
+bit 1199 C 1 *
+bit 1198 I 1 IO_PAD398
+bit 1197 O 1 IO_PAD398 1196 1 Z
+bit 1196 C 1 *
+bit 1195 I 1 IO_PAD397
+bit 1194 O 1 IO_PAD397 1193 1 Z
+bit 1193 C 1 *
+bit 1192 I 1 IO_PAD396
+bit 1191 O 1 IO_PAD396 1190 1 Z
+bit 1190 C 1 *
+bit 1189 I 1 IO_PAD394
+bit 1188 O 1 IO_PAD394 1187 1 Z
+bit 1187 C 1 *
+bit 1186 I 1 IO_PAD393
+bit 1185 O 1 IO_PAD393 1184 1 Z
+bit 1184 C 1 *
+bit 1183 I 1 IO_PAD392
+bit 1182 O 1 IO_PAD392 1181 1 Z
+bit 1181 C 1 *
+bit 1180 O 1 *
+bit 1179 O 1 *
+bit 1178 O 1 *
+bit 1177 O 1 *
+bit 1176 O 1 *
+bit 1175 O 1 *
+bit 1174 I 1 IO_PAD390
+bit 1173 O 1 IO_PAD390 1172 1 Z
+bit 1172 C 1 *
+bit 1171 I 1 IO_PAD388
+bit 1170 O 1 IO_PAD388 1169 1 Z
+bit 1169 C 1 *
+bit 1168 I 1 IO_PAD386
+bit 1167 O 1 IO_PAD386 1166 1 Z
+bit 1166 C 1 *
+bit 1165 I 1 IO_PAD385
+bit 1164 O 1 IO_PAD385 1163 1 Z
+bit 1163 C 1 *
+bit 1162 I 1 IO_PAD384
+bit 1161 O 1 IO_PAD384 1160 1 Z
+bit 1160 C 1 *
+bit 1159 I 1 IO_PAD383
+bit 1158 O 1 IO_PAD383 1157 1 Z
+bit 1157 C 1 *
+bit 1156 I 1 IO_PAD382
+bit 1155 O 1 IO_PAD382 1154 1 Z
+bit 1154 C 1 *
+bit 1153 I 1 IO_PAD380
+bit 1152 O 1 IO_PAD380 1151 1 Z
+bit 1151 C 1 *
+bit 1150 I 1 IO_PAD378
+bit 1149 O 1 IO_PAD378 1148 1 Z
+bit 1148 C 1 *
+bit 1147 I 1 IO_PAD377
+bit 1146 O 1 IO_PAD377 1145 1 Z
+bit 1145 C 1 *
+bit 1144 I 1 IO_PAD376
+bit 1143 O 1 IO_PAD376 1142 1 Z
+bit 1142 C 1 *
+bit 1141 I 1 IO_PAD375
+bit 1140 O 1 IO_PAD375 1139 1 Z
+bit 1139 C 1 *
+bit 1138 I 1 IO_PAD374
+bit 1137 O 1 IO_PAD374 1136 1 Z
+bit 1136 C 1 *
+bit 1135 I 1 IO_PAD373
+bit 1134 O 1 IO_PAD373 1133 1 Z
+bit 1133 C 1 *
+bit 1132 I 1 IO_PAD372
+bit 1131 O 1 IO_PAD372 1130 1 Z
+bit 1130 C 1 *
+bit 1129 I 1 IO_PAD370
+bit 1128 O 1 IO_PAD370 1127 1 Z
+bit 1127 C 1 *
+bit 1126 I 1 IO_PAD368
+bit 1125 O 1 IO_PAD368 1124 1 Z
+bit 1124 C 1 *
+bit 1123 I 1 IO_PAD367
+bit 1122 O 1 IO_PAD367 1121 1 Z
+bit 1121 C 1 *
+bit 1120 I 1 IO_PAD366
+bit 1119 O 1 IO_PAD366 1118 1 Z
+bit 1118 C 1 *
+bit 1117 I 1 IO_PAD365
+bit 1116 O 1 IO_PAD365 1115 1 Z
+bit 1115 C 1 *
+bit 1114 I 1 IO_PAD364
+bit 1113 O 1 IO_PAD364 1112 1 Z
+bit 1112 C 1 *
+bit 1111 I 1 IO_PAD362
+bit 1110 O 1 IO_PAD362 1109 1 Z
+bit 1109 C 1 *
+bit 1108 I 1 IO_PAD360
+bit 1107 O 1 IO_PAD360 1106 1 Z
+bit 1106 C 1 *
+bit 1105 I 1 IO_PAD359
+bit 1104 O 1 IO_PAD359 1103 1 Z
+bit 1103 C 1 *
+bit 1102 I 1 IO_PAD358
+bit 1101 O 1 IO_PAD358 1100 1 Z
+bit 1100 C 1 *
+bit 1099 O 1 *
+bit 1098 O 1 *
+bit 1097 O 1 *
+bit 1096 O 1 *
+bit 1095 O 1 *
+bit 1094 O 1 *
+bit 1093 I 1 IO_PAD356
+bit 1092 O 1 IO_PAD356 1091 1 Z
+bit 1091 C 1 *
+bit 1090 I 1 IO_PAD354
+bit 1089 O 1 IO_PAD354 1088 1 Z
+bit 1088 C 1 *
+bit 1087 I 1 IO_PAD353
+bit 1086 O 1 IO_PAD353 1085 1 Z
+bit 1085 C 1 *
+bit 1084 I 1 IO_PAD352
+bit 1083 O 1 IO_PAD352 1082 1 Z
+bit 1082 C 1 *
+bit 1081 I 1 IO_PAD350
+bit 1080 O 1 IO_PAD350 1079 1 Z
+bit 1079 C 1 *
+bit 1078 I 1 IO_PAD349
+bit 1077 O 1 IO_PAD349 1076 1 Z
+bit 1076 C 1 *
+bit 1075 I 1 IO_PAD348
+bit 1074 O 1 IO_PAD348 1073 1 Z
+bit 1073 C 1 *
+bit 1072 I 1 IO_PAD347
+bit 1071 O 1 IO_PAD347 1070 1 Z
+bit 1070 C 1 *
+bit 1069 I 1 IO_PAD346
+bit 1068 O 1 IO_PAD346 1067 1 Z
+bit 1067 C 1 *
+bit 1066 I 1 IO_PAD344
+bit 1065 O 1 IO_PAD344 1064 1 Z
+bit 1064 C 1 *
+bit 1063 I 1 IO_PAD342
+bit 1062 O 1 IO_PAD342 1061 1 Z
+bit 1061 C 1 *
+bit 1060 I 1 IO_PAD341
+bit 1059 O 1 IO_PAD341 1058 1 Z
+bit 1058 C 1 *
+bit 1057 I 1 IO_PAD340
+bit 1056 O 1 IO_PAD340 1055 1 Z
+bit 1055 C 1 *
+bit 1054 I 1 IO_PAD339
+bit 1053 O 1 IO_PAD339 1052 1 Z
+bit 1052 C 1 *
+bit 1051 I 1 IO_PAD338
+bit 1050 O 1 IO_PAD338 1049 1 Z
+bit 1049 C 1 *
+bit 1048 I 1 IO_PAD336
+bit 1047 O 1 IO_PAD336 1046 1 Z
+bit 1046 C 1 *
+bit 1045 I 1 IO_PAD335
+bit 1044 O 1 IO_PAD335 1043 1 Z
+bit 1043 C 1 *
+bit 1042 I 1 IO_PAD334
+bit 1041 O 1 IO_PAD334 1040 1 Z
+bit 1040 C 1 *
+bit 1039 I 1 IO_PAD332
+bit 1038 O 1 IO_PAD332 1037 1 Z
+bit 1037 C 1 *
+bit 1036 I 1 IO_PAD330
+bit 1035 O 1 IO_PAD330 1034 1 Z
+bit 1034 C 1 *
+bit 1033 I 1 IO_PAD329
+bit 1032 O 1 IO_PAD329 1031 1 Z
+bit 1031 C 1 *
+bit 1030 I 1 IO_PAD328
+bit 1029 O 1 IO_PAD328 1028 1 Z
+bit 1028 C 1 *
+bit 1027 O 1 *
+bit 1026 O 1 *
+bit 1025 O 1 *
+bit 1024 O 1 *
+bit 1023 O 1 *
+bit 1022 O 1 *
+bit 1021 I 1 IO_PAD326
+bit 1020 O 1 IO_PAD326 1019 1 Z
+bit 1019 C 1 *
+bit 1018 I 1 IO_PAD324
+bit 1017 O 1 IO_PAD324 1016 1 Z
+bit 1016 C 1 *
+bit 1015 I 1 IO_PAD323
+bit 1014 O 1 IO_PAD323 1013 1 Z
+bit 1013 C 1 *
+bit 1012 I 1 IO_PAD322
+bit 1011 O 1 IO_PAD322 1010 1 Z
+bit 1010 C 1 *
+bit 1009 I 1 IO_PAD321
+bit 1008 O 1 IO_PAD321 1007 1 Z
+bit 1007 C 1 *
+bit 1006 I 1 IO_PAD320
+bit 1005 O 1 IO_PAD320 1004 1 Z
+bit 1004 C 1 *
+bit 1003 I 1 IO_PAD318
+bit 1002 O 1 IO_PAD318 1001 1 Z
+bit 1001 C 1 *
+bit 1000 I 1 IO_PAD316
+bit 999 O 1 IO_PAD316 998 1 Z
+bit 998 C 1 *
+bit 997 I 1 IO_PAD315
+bit 996 O 1 IO_PAD315 995 1 Z
+bit 995 C 1 *
+bit 994 I 1 IO_PAD314
+bit 993 O 1 IO_PAD314 992 1 Z
+bit 992 C 1 *
+bit 991 I 1 IO_PAD313
+bit 990 O 1 IO_PAD313 989 1 Z
+bit 989 C 1 *
+bit 988 I 1 IO_PAD312
+bit 987 O 1 IO_PAD312 986 1 Z
+bit 986 C 1 *
+bit 985 I 1 IO_PAD310
+bit 984 O 1 IO_PAD310 983 1 Z
+bit 983 C 1 *
+bit 982 I 1 IO_PAD308
+bit 981 O 1 IO_PAD308 980 1 Z
+bit 980 C 1 *
+bit 979 I 1 IO_PAD307
+bit 978 O 1 IO_PAD307 977 1 Z
+bit 977 C 1 *
+bit 976 I 1 IO_PAD306
+bit 975 O 1 IO_PAD306 974 1 Z
+bit 974 C 1 *
+bit 973 I 1 IO_PAD305
+bit 972 O 1 IO_PAD305 971 1 Z
+bit 971 C 1 *
+bit 970 I 1 IO_PAD304
+bit 969 O 1 IO_PAD304 968 1 Z
+bit 968 C 1 *
+bit 967 I 1 IO_PAD302
+bit 966 O 1 IO_PAD302 965 1 Z
+bit 965 C 1 *
+bit 964 I 1 IO_PAD301
+bit 963 O 1 IO_PAD301 962 1 Z
+bit 962 C 1 *
+bit 961 I 1 IO_PAD300
+bit 960 O 1 IO_PAD300 959 1 Z
+bit 959 C 1 *
+bit 958 I 1 IO_PAD298
+bit 957 O 1 IO_PAD298 956 1 Z
+bit 956 C 1 *
+bit 955 I 1 IO_PAD296
+bit 954 O 1 IO_PAD296 953 1 Z
+bit 953 C 1 *
+bit 952 I 1 IO_PAD295
+bit 951 O 1 IO_PAD295 950 1 Z
+bit 950 C 1 *
+bit 949 I 1 IO_PAD294
+bit 948 O 1 IO_PAD294 947 1 Z
+bit 947 C 1 *
+bit 946 O 1 *
+bit 945 O 1 *
+bit 944 O 1 *
+bit 943 O 1 *
+bit 942 O 1 *
+bit 941 O 1 *
+bit 940 I 1 IO_PAD292
+bit 939 O 1 IO_PAD292 938 1 Z
+bit 938 C 1 *
+bit 937 I 1 IO_PAD290
+bit 936 O 1 IO_PAD290 935 1 Z
+bit 935 C 1 *
+bit 934 I 1 IO_PAD289
+bit 933 O 1 IO_PAD289 932 1 Z
+bit 932 C 1 *
+bit 931 I 1 IO_PAD288
+bit 930 O 1 IO_PAD288 929 1 Z
+bit 929 C 1 *
+bit 928 I 1 IO_PAD287
+bit 927 O 1 IO_PAD287 926 1 Z
+bit 926 C 1 *
+bit 925 I 1 IO_PAD286
+bit 924 O 1 IO_PAD286 923 1 Z
+bit 923 C 1 *
+bit 922 I 1 IO_PAD284
+bit 921 O 1 IO_PAD284 920 1 Z
+bit 920 C 1 *
+bit 919 I 1 IO_PAD282
+bit 918 O 1 IO_PAD282 917 1 Z
+bit 917 C 1 *
+bit 916 I 1 IO_PAD281
+bit 915 O 1 IO_PAD281 914 1 Z
+bit 914 C 1 *
+bit 913 I 1 IO_PAD279
+bit 912 O 1 IO_PAD279 911 1 Z
+bit 911 C 1 *
+bit 910 I 1 IO_PAD278
+bit 909 O 1 IO_PAD278 908 1 Z
+bit 908 C 1 *
+bit 907 I 1 IO_PAD276
+bit 906 O 1 IO_PAD276 905 1 Z
+bit 905 C 1 *
+bit 904 I 1 IO_PAD274
+bit 903 O 1 IO_PAD274 902 1 Z
+bit 902 C 1 *
+bit 901 I 1 IO_PAD273
+bit 900 O 1 IO_PAD273 899 1 Z
+bit 899 C 1 *
+bit 898 I 1 IO_PAD272
+bit 897 O 1 IO_PAD272 896 1 Z
+bit 896 C 1 *
+bit 895 I 1 IO_PAD271
+bit 894 O 1 IO_PAD271 893 1 Z
+bit 893 C 1 *
+bit 892 I 1 IO_PAD270
+bit 891 O 1 IO_PAD270 890 1 Z
+bit 890 C 1 *
+bit 889 I 1 IO_PAD268
+bit 888 O 1 IO_PAD268 887 1 Z
+bit 887 C 1 *
+bit 886 O 1 *
+bit 885 O 1 *
+bit 884 O 1 *
+bit 883 O 1 *
+bit 882 O 1 *
+bit 881 O 1 *
+bit 880 I 1 IO_PAD266
+bit 879 O 1 IO_PAD266 878 1 Z
+bit 878 C 1 *
+bit 877 I 1 IO_PAD265
+bit 876 O 1 IO_PAD265 875 1 Z
+bit 875 C 1 *
+bit 874 I 1 IO_PAD264
+bit 873 O 1 IO_PAD264 872 1 Z
+bit 872 C 1 *
+bit 871 I 1 IO_PAD262
+bit 870 O 1 IO_PAD262 869 1 Z
+bit 869 C 1 *
+bit 868 I 1 IO_PAD260
+bit 867 O 1 IO_PAD260 866 1 Z
+bit 866 C 1 *
+bit 865 I 1 IO_PAD259
+bit 864 O 1 IO_PAD259 863 1 Z
+bit 863 C 1 *
+bit 862 I 1 IO_PAD258
+bit 861 O 1 IO_PAD258 860 1 Z
+bit 860 C 1 *
+bit 859 I 1 IO_PAD256
+bit 858 O 1 IO_PAD256 857 1 Z
+bit 857 C 1 *
+bit 856 I 1 IO_PAD255
+bit 855 O 1 IO_PAD255 854 1 Z
+bit 854 C 1 *
+bit 853 I 1 IO_PAD254
+bit 852 O 1 IO_PAD254 851 1 Z
+bit 851 C 1 *
+bit 850 I 1 IO_PAD253
+bit 849 O 1 IO_PAD253 848 1 Z
+bit 848 C 1 *
+bit 847 I 1 IO_PAD252
+bit 846 O 1 IO_PAD252 845 1 Z
+bit 845 C 1 *
+bit 844 I 1 IO_PAD250
+bit 843 O 1 IO_PAD250 842 1 Z
+bit 842 C 1 *
+bit 841 I 1 IO_PAD248
+bit 840 O 1 IO_PAD248 839 1 Z
+bit 839 C 1 *
+bit 838 I 1 IO_PAD247
+bit 837 O 1 IO_PAD247 836 1 Z
+bit 836 C 1 *
+bit 835 I 1 IO_PAD246
+bit 834 O 1 IO_PAD246 833 1 Z
+bit 833 C 1 *
+bit 832 I 1 IO_PAD245
+bit 831 O 1 IO_PAD245 830 1 Z
+bit 830 C 1 *
+bit 829 I 1 IO_PAD244
+bit 828 O 1 IO_PAD244 827 1 Z
+bit 827 C 1 *
+bit 826 I 1 IO_PAD242
+bit 825 O 1 IO_PAD242 824 1 Z
+bit 824 C 1 *
+bit 823 I 1 IO_PAD240
+bit 822 O 1 IO_PAD240 821 1 Z
+bit 821 C 1 *
+bit 820 I 1 IO_PAD239
+bit 819 O 1 IO_PAD239 818 1 Z
+bit 818 C 1 *
+bit 817 I 1 IO_PAD238
+bit 816 O 1 IO_PAD238 815 1 Z
+bit 815 C 1 *
+bit 814 I 1 IO_PAD237
+bit 813 O 1 IO_PAD237 812 1 Z
+bit 812 C 1 *
+bit 811 I 1 IO_PAD236
+bit 810 O 1 IO_PAD236 809 1 Z
+bit 809 C 1 *
+bit 808 I 1 IO_PAD234
+bit 807 O 1 IO_PAD234 806 1 Z
+bit 806 C 1 *
+bit 805 O 1 *
+bit 804 O 1 *
+bit 803 O 1 *
+bit 802 O 1 *
+bit 801 O 1 *
+bit 800 O 1 *
+bit 799 I 1 IO_PAD232
+bit 798 O 1 IO_PAD232 797 1 Z
+bit 797 C 1 *
+bit 796 I 1 IO_PAD231
+bit 795 O 1 IO_PAD231 794 1 Z
+bit 794 C 1 *
+bit 793 I 1 IO_PAD230
+bit 792 O 1 IO_PAD230 791 1 Z
+bit 791 C 1 *
+bit 790 I 1 IO_PAD228
+bit 789 O 1 IO_PAD228 788 1 Z
+bit 788 C 1 *
+bit 787 I 1 IO_PAD226
+bit 786 O 1 IO_PAD226 785 1 Z
+bit 785 C 1 *
+bit 784 I 1 IO_PAD225
+bit 783 O 1 IO_PAD225 782 1 Z
+bit 782 C 1 *
+bit 781 I 1 IO_PAD224
+bit 780 O 1 IO_PAD224 779 1 Z
+bit 779 C 1 *
+bit 778 I 1 IO_PAD222
+bit 777 O 1 IO_PAD222 776 1 Z
+bit 776 C 1 *
+bit 775 I 1 IO_PAD221
+bit 774 O 1 IO_PAD221 773 1 Z
+bit 773 C 1 *
+bit 772 I 1 IO_PAD220
+bit 771 O 1 IO_PAD220 770 1 Z
+bit 770 C 1 *
+bit 769 I 1 IO_PAD219
+bit 768 O 1 IO_PAD219 767 1 Z
+bit 767 C 1 *
+bit 766 I 1 IO_PAD218
+bit 765 O 1 IO_PAD218 764 1 Z
+bit 764 C 1 *
+bit 763 I 1 IO_PAD216
+bit 762 O 1 IO_PAD216 761 1 Z
+bit 761 C 1 *
+bit 760 I 1 IO_PAD214
+bit 759 O 1 IO_PAD214 758 1 Z
+bit 758 C 1 *
+bit 757 I 1 IO_PAD213
+bit 756 O 1 IO_PAD213 755 1 Z
+bit 755 C 1 *
+bit 754 I 1 IO_PAD212
+bit 753 O 1 IO_PAD212 752 1 Z
+bit 752 C 1 *
+bit 751 I 1 IO_PAD211
+bit 750 O 1 IO_PAD211 749 1 Z
+bit 749 C 1 *
+bit 748 I 1 IO_PAD210
+bit 747 O 1 IO_PAD210 746 1 Z
+bit 746 C 1 *
+bit 745 I 1 IO_PAD208
+bit 744 O 1 IO_PAD208 743 1 Z
+bit 743 C 1 *
+bit 742 I 1 IO_PAD207
+bit 741 O 1 IO_PAD207 740 1 Z
+bit 740 C 1 *
+bit 739 I 1 IO_PAD206
+bit 738 O 1 IO_PAD206 737 1 Z
+bit 737 C 1 *
+bit 736 I 1 IO_PAD204
+bit 735 O 1 IO_PAD204 734 1 Z
+bit 734 C 1 *
+bit 733 O 1 *
+bit 732 O 1 *
+bit 731 O 1 *
+bit 730 O 1 *
+bit 729 O 1 *
+bit 728 O 1 *
+bit 727 I 1 IO_PAD202
+bit 726 O 1 IO_PAD202 725 1 Z
+bit 725 C 1 *
+bit 724 I 1 IO_PAD201
+bit 723 O 1 IO_PAD201 722 1 Z
+bit 722 C 1 *
+bit 721 I 1 IO_PAD200
+bit 720 O 1 IO_PAD200 719 1 Z
+bit 719 C 1 *
+bit 718 I 1 IO_PAD198
+bit 717 O 1 IO_PAD198 716 1 Z
+bit 716 C 1 *
+bit 715 I 1 IO_PAD196
+bit 714 O 1 IO_PAD196 713 1 Z
+bit 713 C 1 *
+bit 712 I 1 IO_PAD195
+bit 711 O 1 IO_PAD195 710 1 Z
+bit 710 C 1 *
+bit 709 I 1 IO_PAD194
+bit 708 O 1 IO_PAD194 707 1 Z
+bit 707 C 1 *
+bit 706 I 1 IO_PAD193
+bit 705 O 1 IO_PAD193 704 1 Z
+bit 704 C 1 *
+bit 703 I 1 IO_PAD192
+bit 702 O 1 IO_PAD192 701 1 Z
+bit 701 C 1 *
+bit 700 I 1 IO_PAD190
+bit 699 O 1 IO_PAD190 698 1 Z
+bit 698 C 1 *
+bit 697 I 1 IO_PAD188
+bit 696 O 1 IO_PAD188 695 1 Z
+bit 695 C 1 *
+bit 694 I 1 IO_PAD187
+bit 693 O 1 IO_PAD187 692 1 Z
+bit 692 C 1 *
+bit 691 I 1 IO_PAD186
+bit 690 O 1 IO_PAD186 689 1 Z
+bit 689 C 1 *
+bit 688 I 1 IO_PAD185
+bit 687 O 1 IO_PAD185 686 1 Z
+bit 686 C 1 *
+bit 685 I 1 IO_PAD184
+bit 684 O 1 IO_PAD184 683 1 Z
+bit 683 C 1 *
+bit 682 I 1 IO_PAD183
+bit 681 O 1 IO_PAD183 680 1 Z
+bit 680 C 1 *
+bit 679 I 1 IO_PAD182
+bit 678 O 1 IO_PAD182 677 1 Z
+bit 677 C 1 *
+bit 676 I 1 IO_PAD180
+bit 675 O 1 IO_PAD180 674 1 Z
+bit 674 C 1 *
+bit 673 I 1 IO_PAD178
+bit 672 O 1 IO_PAD178 671 1 Z
+bit 671 C 1 *
+bit 670 I 1 IO_PAD177
+bit 669 O 1 IO_PAD177 668 1 Z
+bit 668 C 1 *
+bit 667 I 1 IO_PAD176
+bit 666 O 1 IO_PAD176 665 1 Z
+bit 665 C 1 *
+bit 664 I 1 IO_PAD175
+bit 663 O 1 IO_PAD175 662 1 Z
+bit 662 C 1 *
+bit 661 I 1 IO_PAD174
+bit 660 O 1 IO_PAD174 659 1 Z
+bit 659 C 1 *
+bit 658 I 1 IO_PAD172
+bit 657 O 1 IO_PAD172 656 1 Z
+bit 656 C 1 *
+bit 655 I 1 IO_PAD170
+bit 654 O 1 IO_PAD170 653 1 Z
+bit 653 C 1 *
+bit 652 O 1 *
+bit 651 O 1 *
+bit 650 O 1 *
+bit 649 O 1 *
+bit 648 O 1 *
+bit 647 O 1 *
+bit 646 I 1 IO_PAD168
+bit 645 O 1 IO_PAD168 644 1 Z
+bit 644 C 1 *
+bit 643 I 1 IO_PAD167
+bit 642 O 1 IO_PAD167 641 1 Z
+bit 641 C 1 *
+bit 640 I 1 IO_PAD166
+bit 639 O 1 IO_PAD166 638 1 Z
+bit 638 C 1 *
+bit 637 I 1 IO_PAD164
+bit 636 O 1 IO_PAD164 635 1 Z
+bit 635 C 1 *
+bit 634 I 1 IO_PAD163
+bit 633 O 1 IO_PAD163 632 1 Z
+bit 632 C 1 *
+bit 631 I 1 IO_PAD162
+bit 630 O 1 IO_PAD162 629 1 Z
+bit 629 C 1 *
+bit 628 I 1 IO_PAD160
+bit 627 O 1 IO_PAD160 626 1 Z
+bit 626 C 1 *
+bit 625 I 1 IO_PAD159
+bit 624 O 1 IO_PAD159 623 1 Z
+bit 623 C 1 *
+bit 622 I 1 IO_PAD158
+bit 621 O 1 IO_PAD158 620 1 Z
+bit 620 C 1 *
+bit 619 I 1 IO_PAD156
+bit 618 O 1 IO_PAD156 617 1 Z
+bit 617 C 1 *
+bit 616 I 1 IO_PAD155
+bit 615 O 1 IO_PAD155 614 1 Z
+bit 614 C 1 *
+bit 613 I 1 IO_PAD154
+bit 612 O 1 IO_PAD154 611 1 Z
+bit 611 C 1 *
+bit 610 I 1 IO_PAD153
+bit 609 O 1 IO_PAD153 608 1 Z
+bit 608 C 1 *
+bit 607 I 1 IO_PAD152
+bit 606 O 1 IO_PAD152 605 1 Z
+bit 605 C 1 *
+bit 604 I 1 IO_PAD151
+bit 603 O 1 IO_PAD151 602 1 Z
+bit 602 C 1 *
+bit 601 O 1 *
+bit 600 I 1 HSWAP_EN_PAD147
+bit 599 I 1 IO_PAD146
+bit 598 O 1 IO_PAD146 597 1 Z
+bit 597 C 1 *
+bit 596 I 1 IO_PAD145
+bit 595 O 1 IO_PAD145 594 1 Z
+bit 594 C 1 *
+bit 593 I 1 IO_PAD143
+bit 592 O 1 IO_PAD143 591 1 Z
+bit 591 C 1 *
+bit 590 I 1 IO_PAD142
+bit 589 O 1 IO_PAD142 588 1 Z
+bit 588 C 1 *
+bit 587 I 1 IO_PAD141
+bit 586 O 1 IO_PAD141 585 1 Z
+bit 585 C 1 *
+bit 584 I 1 IO_PAD140
+bit 583 O 1 IO_PAD140 582 1 Z
+bit 582 C 1 *
+bit 581 I 1 IO_PAD139
+bit 580 O 1 IO_PAD139 579 1 Z
+bit 579 C 1 *
+bit 578 I 1 IO_PAD137
+bit 577 O 1 IO_PAD137 576 1 Z
+bit 576 C 1 *
+bit 575 I 1 IO_PAD135
+bit 574 O 1 IO_PAD135 573 1 Z
+bit 573 C 1 *
+bit 572 I 1 IO_PAD134
+bit 571 O 1 IO_PAD134 570 1 Z
+bit 570 C 1 *
+bit 569 I 1 IO_PAD133
+bit 568 O 1 IO_PAD133 567 1 Z
+bit 567 C 1 *
+bit 566 I 1 IO_PAD132
+bit 565 O 1 IO_PAD132 564 1 Z
+bit 564 C 1 *
+bit 563 I 1 IO_PAD131
+bit 562 O 1 IO_PAD131 561 1 Z
+bit 561 C 1 *
+bit 560 I 1 IO_PAD129
+bit 559 O 1 IO_PAD129 558 1 Z
+bit 558 C 1 *
+bit 557 I 1 IO_PAD127
+bit 556 O 1 IO_PAD127 555 1 Z
+bit 555 C 1 *
+bit 554 I 1 IO_PAD125
+bit 553 O 1 IO_PAD125 552 1 Z
+bit 552 C 1 *
+bit 551 I 1 IO_PAD123
+bit 550 O 1 IO_PAD123 549 1 Z
+bit 549 C 1 *
+bit 548 I 1 IO_PAD122
+bit 547 O 1 IO_PAD122 546 1 Z
+bit 546 C 1 *
+bit 545 I 1 IO_PAD121
+bit 544 O 1 IO_PAD121 543 1 Z
+bit 543 C 1 *
+bit 542 I 1 IO_PAD119
+bit 541 O 1 IO_PAD119 540 1 Z
+bit 540 C 1 *
+bit 539 I 1 IO_PAD118
+bit 538 O 1 IO_PAD118 537 1 Z
+bit 537 C 1 *
+bit 536 I 1 IO_PAD117
+bit 535 O 1 IO_PAD117 534 1 Z
+bit 534 C 1 *
+bit 533 I 1 IO_PAD115
+bit 532 O 1 IO_PAD115 531 1 Z
+bit 531 C 1 *
+bit 530 I 1 IO_PAD113
+bit 529 O 1 IO_PAD113 528 1 Z
+bit 528 C 1 *
+bit 527 I 1 IO_PAD111
+bit 526 O 1 IO_PAD111 525 1 Z
+bit 525 C 1 *
+bit 524 I 1 IO_PAD110
+bit 523 O 1 IO_PAD110 522 1 Z
+bit 522 C 1 *
+bit 521 I 1 IO_PAD109
+bit 520 O 1 IO_PAD109 519 1 Z
+bit 519 C 1 *
+bit 518 I 1 IO_PAD108
+bit 517 O 1 IO_PAD108 516 1 Z
+bit 516 C 1 *
+bit 515 I 1 IO_PAD107
+bit 514 O 1 IO_PAD107 513 1 Z
+bit 513 C 1 *
+bit 512 I 1 IO_PAD105
+bit 511 O 1 IO_PAD105 510 1 Z
+bit 510 C 1 *
+bit 509 I 1 IO_PAD104
+bit 508 O 1 IO_PAD104 507 1 Z
+bit 507 C 1 *
+bit 506 I 1 IO_PAD103
+bit 505 O 1 IO_PAD103 504 1 Z
+bit 504 C 1 *
+bit 503 I 1 IO_PAD101
+bit 502 O 1 IO_PAD101 501 1 Z
+bit 501 C 1 *
+bit 500 I 1 IO_PAD99
+bit 499 O 1 IO_PAD99 498 1 Z
+bit 498 C 1 *
+bit 497 I 1 IO_PAD98
+bit 496 O 1 IO_PAD98 495 1 Z
+bit 495 C 1 *
+bit 494 I 1 IO_PAD97
+bit 493 O 1 IO_PAD97 492 1 Z
+bit 492 C 1 *
+bit 491 I 1 IO_PAD95
+bit 490 O 1 IO_PAD95 489 1 Z
+bit 489 C 1 *
+bit 488 I 1 IO_PAD93
+bit 487 O 1 IO_PAD93 486 1 Z
+bit 486 C 1 *
+bit 485 I 1 IO_PAD91
+bit 484 O 1 IO_PAD91 483 1 Z
+bit 483 C 1 *
+bit 482 I 1 IO_PAD89
+bit 481 O 1 IO_PAD89 480 1 Z
+bit 480 C 1 *
+bit 479 I 1 IO_PAD87
+bit 478 O 1 IO_PAD87 477 1 Z
+bit 477 C 1 *
+bit 476 I 1 IO_PAD86
+bit 475 O 1 IO_PAD86 474 1 Z
+bit 474 C 1 *
+bit 473 I 1 IO_PAD85
+bit 472 O 1 IO_PAD85 471 1 Z
+bit 471 C 1 *
+bit 470 I 1 IO_PAD84
+bit 469 O 1 IO_PAD84 468 1 Z
+bit 468 C 1 *
+bit 467 I 1 IO_PAD83
+bit 466 O 1 IO_PAD83 465 1 Z
+bit 465 C 1 *
+bit 464 I 1 IO_PAD81
+bit 463 O 1 IO_PAD81 462 1 Z
+bit 462 C 1 *
+bit 461 I 1 IO_PAD80
+bit 460 O 1 IO_PAD80 459 1 Z
+bit 459 C 1 *
+bit 458 I 1 IO_PAD79
+bit 457 O 1 IO_PAD79 456 1 Z
+bit 456 C 1 *
+bit 455 I 1 IO_PAD77
+bit 454 O 1 IO_PAD77 453 1 Z
+bit 453 C 1 *
+bit 452 I 1 IO_PAD75
+bit 451 O 1 IO_PAD75 450 1 Z
+bit 450 C 1 *
+bit 449 I 1 IO_PAD74
+bit 448 O 1 IO_PAD74 447 1 Z
+bit 447 C 1 *
+bit 446 I 1 IO_PAD73
+bit 445 O 1 IO_PAD73 444 1 Z
+bit 444 C 1 *
+bit 443 I 1 IO_PAD71
+bit 442 O 1 IO_PAD71 441 1 Z
+bit 441 C 1 *
+bit 440 I 1 IO_PAD70
+bit 439 O 1 IO_PAD70 438 1 Z
+bit 438 C 1 *
+bit 437 I 1 IO_PAD69
+bit 436 O 1 IO_PAD69 435 1 Z
+bit 435 C 1 *
+bit 434 I 1 IO_PAD67
+bit 433 O 1 IO_PAD67 432 1 Z
+bit 432 C 1 *
+bit 431 I 1 IO_PAD65
+bit 430 O 1 IO_PAD65 429 1 Z
+bit 429 C 1 *
+bit 428 I 1 IO_PAD63
+bit 427 O 1 IO_PAD63 426 1 Z
+bit 426 C 1 *
+bit 425 I 1 IO_PAD62
+bit 424 O 1 IO_PAD62 423 1 Z
+bit 423 C 1 *
+bit 422 I 1 IO_PAD61
+bit 421 O 1 IO_PAD61 420 1 Z
+bit 420 C 1 *
+bit 419 I 1 IO_PAD59
+bit 418 O 1 IO_PAD59 417 1 Z
+bit 417 C 1 *
+bit 416 I 1 IO_PAD58
+bit 415 O 1 IO_PAD58 414 1 Z
+bit 414 C 1 *
+bit 413 I 1 IO_PAD57
+bit 412 O 1 IO_PAD57 411 1 Z
+bit 411 C 1 *
+bit 410 I 1 IO_PAD55
+bit 409 O 1 IO_PAD55 408 1 Z
+bit 408 C 1 *
+bit 407 I 1 IO_PAD53
+bit 406 O 1 IO_PAD53 405 1 Z
+bit 405 C 1 *
+bit 404 I 1 IO_PAD51
+bit 403 O 1 IO_PAD51 402 1 Z
+bit 402 C 1 *
+bit 401 I 1 IO_PAD50
+bit 400 O 1 IO_PAD50 399 1 Z
+bit 399 C 1 *
+bit 398 I 1 IO_PAD49
+bit 397 O 1 IO_PAD49 396 1 Z
+bit 396 C 1 *
+bit 395 I 1 IO_PAD47
+bit 394 O 1 IO_PAD47 393 1 Z
+bit 393 C 1 *
+bit 392 I 1 IO_PAD46
+bit 391 O 1 IO_PAD46 390 1 Z
+bit 390 C 1 *
+bit 389 I 1 IO_PAD45
+bit 388 O 1 IO_PAD45 387 1 Z
+bit 387 C 1 *
+bit 386 I 1 IO_PAD43
+bit 385 O 1 IO_PAD43 384 1 Z
+bit 384 C 1 *
+bit 383 I 1 IO_PAD41
+bit 382 O 1 IO_PAD41 381 1 Z
+bit 381 C 1 *
+bit 380 I 1 IO_PAD39
+bit 379 O 1 IO_PAD39 378 1 Z
+bit 378 C 1 *
+bit 377 I 1 IO_PAD38
+bit 376 O 1 IO_PAD38 375 1 Z
+bit 375 C 1 *
+bit 374 I 1 IO_PAD37
+bit 373 O 1 IO_PAD37 372 1 Z
+bit 372 C 1 *
+bit 371 I 1 IO_PAD35
+bit 370 O 1 IO_PAD35 369 1 Z
+bit 369 C 1 *
+bit 368 I 1 IO_PAD34
+bit 367 O 1 IO_PAD34 366 1 Z
+bit 366 C 1 *
+bit 365 I 1 IO_PAD33
+bit 364 O 1 IO_PAD33 363 1 Z
+bit 363 C 1 *
+bit 362 I 1 IO_PAD31
+bit 361 O 1 IO_PAD31 360 1 Z
+bit 360 C 1 *
+bit 359 I 1 IO_PAD29
+bit 358 O 1 IO_PAD29 357 1 Z
+bit 357 C 1 *
+bit 356 I 1 IO_PAD28
+bit 355 O 1 IO_PAD28 354 1 Z
+bit 354 C 1 *
+bit 353 I 1 IO_PAD27
+bit 352 O 1 IO_PAD27 351 1 Z
+bit 351 C 1 *
+bit 350 I 1 IO_PAD26
+bit 349 O 1 IO_PAD26 348 1 Z
+bit 348 C 1 *
+bit 347 I 1 IO_PAD25
+bit 346 O 1 IO_PAD25 345 1 Z
+bit 345 C 1 *
+bit 344 I 1 IO_PAD23
+bit 343 O 1 IO_PAD23 342 1 Z
+bit 342 C 1 *
+bit 341 I 1 IO_PAD21
+bit 340 O 1 IO_PAD21 339 1 Z
+bit 339 C 1 *
+bit 338 I 1 IO_PAD19
+bit 337 O 1 IO_PAD19 336 1 Z
+bit 336 C 1 *
+bit 335 I 1 IO_PAD17
+bit 334 O 1 IO_PAD17 333 1 Z
+bit 333 C 1 *
+bit 332 I 1 IO_PAD15
+bit 331 O 1 IO_PAD15 330 1 Z
+bit 330 C 1 *
+bit 329 I 1 IO_PAD14
+bit 328 O 1 IO_PAD14 327 1 Z
+bit 327 C 1 *
+bit 326 I 1 IO_PAD13
+bit 325 O 1 IO_PAD13 324 1 Z
+bit 324 C 1 *
+bit 323 I 1 IO_PAD11
+bit 322 O 1 IO_PAD11 321 1 Z
+bit 321 C 1 *
+bit 320 I 1 IO_PAD10
+bit 319 O 1 IO_PAD10 318 1 Z
+bit 318 C 1 *
+bit 317 I 1 IO_PAD9
+bit 316 O 1 IO_PAD9 315 1 Z
+bit 315 C 1 *
+bit 314 I 1 IO_PAD7
+bit 313 O 1 IO_PAD7 312 1 Z
+bit 312 C 1 *
+bit 311 I 1 IO_PAD5
+bit 310 O 1 IO_PAD5 309 1 Z
+bit 309 C 1 *
+bit 308 I 1 IO_PAD4
+bit 307 O 1 IO_PAD4 306 1 Z
+bit 306 C 1 *
+bit 305 I 1 IO_PAD3
+bit 304 O 1 IO_PAD3 303 1 Z
+bit 303 C 1 *
+bit 302 I 1 IO_PAD2
+bit 301 O 1 IO_PAD2 300 1 Z
+bit 300 C 1 *
+bit 299 I 1 IO_PAD1117
+bit 298 O 1 IO_PAD1117 297 1 Z
+bit 297 C 1 *
+bit 296 I 1 IO_PAD1116
+bit 295 O 1 IO_PAD1116 294 1 Z
+bit 294 C 1 *
+bit 293 I 1 IO_PAD1115
+bit 292 O 1 IO_PAD1115 291 1 Z
+bit 291 C 1 *
+bit 290 I 1 IO_PAD1114
+bit 289 O 1 IO_PAD1114 288 1 Z
+bit 288 C 1 *
+bit 287 I 1 IO_PAD1112
+bit 286 O 1 IO_PAD1112 285 1 Z
+bit 285 C 1 *
+bit 284 I 1 IO_PAD1110
+bit 283 O 1 IO_PAD1110 282 1 Z
+bit 282 C 1 *
+bit 281 I 1 IO_PAD1109
+bit 280 O 1 IO_PAD1109 279 1 Z
+bit 279 C 1 *
+bit 278 I 1 IO_PAD1108
+bit 277 O 1 IO_PAD1108 276 1 Z
+bit 276 C 1 *
+bit 275 I 1 IO_PAD1106
+bit 274 O 1 IO_PAD1106 273 1 Z
+bit 273 C 1 *
+bit 272 I 1 IO_PAD1105
+bit 271 O 1 IO_PAD1105 270 1 Z
+bit 270 C 1 *
+bit 269 I 1 IO_PAD1104
+bit 268 O 1 IO_PAD1104 267 1 Z
+bit 267 C 1 *
+bit 266 I 1 IO_PAD1102
+bit 265 O 1 IO_PAD1102 264 1 Z
+bit 264 C 1 *
+bit 263 I 1 IO_PAD1100
+bit 262 O 1 IO_PAD1100 261 1 Z
+bit 261 C 1 *
+bit 260 I 1 IO_PAD1098
+bit 259 O 1 IO_PAD1098 258 1 Z
+bit 258 C 1 *
+bit 257 I 1 IO_PAD1096
+bit 256 O 1 IO_PAD1096 255 1 Z
+bit 255 C 1 *
+bit 254 I 1 IO_PAD1094
+bit 253 O 1 IO_PAD1094 252 1 Z
+bit 252 C 1 *
+bit 251 I 1 IO_PAD1093
+bit 250 O 1 IO_PAD1093 249 1 Z
+bit 249 C 1 *
+bit 248 I 1 IO_PAD1092
+bit 247 O 1 IO_PAD1092 246 1 Z
+bit 246 C 1 *
+bit 245 I 1 IO_PAD1091
+bit 244 O 1 IO_PAD1091 243 1 Z
+bit 243 C 1 *
+bit 242 I 1 IO_PAD1090
+bit 241 O 1 IO_PAD1090 240 1 Z
+bit 240 C 1 *
+bit 239 I 1 IO_PAD1088
+bit 238 O 1 IO_PAD1088 237 1 Z
+bit 237 C 1 *
+bit 236 I 1 IO_PAD1086
+bit 235 O 1 IO_PAD1086 234 1 Z
+bit 234 C 1 *
+bit 233 I 1 IO_PAD1085
+bit 232 O 1 IO_PAD1085 231 1 Z
+bit 231 C 1 *
+bit 230 I 1 IO_PAD1084
+bit 229 O 1 IO_PAD1084 228 1 Z
+bit 228 C 1 *
+bit 227 I 1 IO_PAD1082
+bit 226 O 1 IO_PAD1082 225 1 Z
+bit 225 C 1 *
+bit 224 I 1 IO_PAD1081
+bit 223 O 1 IO_PAD1081 222 1 Z
+bit 222 C 1 *
+bit 221 I 1 IO_PAD1080
+bit 220 O 1 IO_PAD1080 219 1 Z
+bit 219 C 1 *
+bit 218 I 1 IO_PAD1078
+bit 217 O 1 IO_PAD1078 216 1 Z
+bit 216 C 1 *
+bit 215 I 1 IO_PAD1076
+bit 214 O 1 IO_PAD1076 213 1 Z
+bit 213 C 1 *
+bit 212 I 1 IO_PAD1074
+bit 211 O 1 IO_PAD1074 210 1 Z
+bit 210 C 1 *
+bit 209 I 1 IO_PAD1073
+bit 208 O 1 IO_PAD1073 207 1 Z
+bit 207 C 1 *
+bit 206 I 1 IO_PAD1072
+bit 205 O 1 IO_PAD1072 204 1 Z
+bit 204 C 1 *
+bit 203 I 1 IO_PAD1070
+bit 202 O 1 IO_PAD1070 201 1 Z
+bit 201 C 1 *
+bit 200 I 1 IO_PAD1069
+bit 199 O 1 IO_PAD1069 198 1 Z
+bit 198 C 1 *
+bit 197 I 1 IO_PAD1068
+bit 196 O 1 IO_PAD1068 195 1 Z
+bit 195 C 1 *
+bit 194 I 1 IO_PAD1066
+bit 193 O 1 IO_PAD1066 192 1 Z
+bit 192 C 1 *
+bit 191 I 1 IO_PAD1064
+bit 190 O 1 IO_PAD1064 189 1 Z
+bit 189 C 1 *
+bit 188 I 1 IO_PAD1062
+bit 187 O 1 IO_PAD1062 186 1 Z
+bit 186 C 1 *
+bit 185 I 1 IO_PAD1061
+bit 184 O 1 IO_PAD1061 183 1 Z
+bit 183 C 1 *
+bit 182 I 1 IO_PAD1060
+bit 181 O 1 IO_PAD1060 180 1 Z
+bit 180 C 1 *
+bit 179 I 1 IO_PAD1058
+bit 178 O 1 IO_PAD1058 177 1 Z
+bit 177 C 1 *
+bit 176 I 1 IO_PAD1057
+bit 175 O 1 IO_PAD1057 174 1 Z
+bit 174 C 1 *
+bit 173 I 1 IO_PAD1056
+bit 172 O 1 IO_PAD1056 171 1 Z
+bit 171 C 1 *
+bit 170 I 1 IO_PAD1054
+bit 169 O 1 IO_PAD1054 168 1 Z
+bit 168 C 1 *
+bit 167 I 1 IO_PAD1052
+bit 166 O 1 IO_PAD1052 165 1 Z
+bit 165 C 1 *
+bit 164 I 1 IO_PAD1050
+bit 163 O 1 IO_PAD1050 162 1 Z
+bit 162 C 1 *
+bit 161 I 1 IO_PAD1049
+bit 160 O 1 IO_PAD1049 159 1 Z
+bit 159 C 1 *
+bit 158 I 1 IO_PAD1048
+bit 157 O 1 IO_PAD1048 156 1 Z
+bit 156 C 1 *
+bit 155 I 1 IO_PAD1046
+bit 154 O 1 IO_PAD1046 153 1 Z
+bit 153 C 1 *
+bit 152 I 1 IO_PAD1045
+bit 151 O 1 IO_PAD1045 150 1 Z
+bit 150 C 1 *
+bit 149 I 1 IO_PAD1044
+bit 148 O 1 IO_PAD1044 147 1 Z
+bit 147 C 1 *
+bit 146 I 1 IO_PAD1042
+bit 145 O 1 IO_PAD1042 144 1 Z
+bit 144 C 1 *
+bit 143 I 1 IO_PAD1040
+bit 142 O 1 IO_PAD1040 141 1 Z
+bit 141 C 1 *
+bit 140 I 1 IO_PAD1039
+bit 139 O 1 IO_PAD1039 138 1 Z
+bit 138 C 1 *
+bit 137 I 1 IO_PAD1038
+bit 136 O 1 IO_PAD1038 135 1 Z
+bit 135 C 1 *
+bit 134 I 1 IO_PAD1036
+bit 133 O 1 IO_PAD1036 132 1 Z
+bit 132 C 1 *
+bit 131 I 1 IO_PAD1035
+bit 130 O 1 IO_PAD1035 129 1 Z
+bit 129 C 1 *
+bit 128 I 1 IO_PAD1034
+bit 127 O 1 IO_PAD1034 126 1 Z
+bit 126 C 1 *
+bit 125 I 1 IO_PAD1033
+bit 124 O 1 IO_PAD1033 123 1 Z
+bit 123 C 1 *
+bit 122 I 1 IO_PAD1032
+bit 121 O 1 IO_PAD1032 120 1 Z
+bit 120 C 1 *
+bit 119 I 1 IO_PAD1030
+bit 118 O 1 IO_PAD1030 117 1 Z
+bit 117 C 1 *
+bit 116 I 1 IO_PAD1028
+bit 115 O 1 IO_PAD1028 114 1 Z
+bit 114 C 1 *
+bit 113 I 1 IO_PAD1026
+bit 112 O 1 IO_PAD1026 111 1 Z
+bit 111 C 1 *
+bit 110 I 1 IO_PAD1024
+bit 109 O 1 IO_PAD1024 108 1 Z
+bit 108 C 1 *
+bit 107 I 1 IO_PAD1022
+bit 106 O 1 IO_PAD1022 105 1 Z
+bit 105 C 1 *
+bit 104 I 1 IO_PAD1021
+bit 103 O 1 IO_PAD1021 102 1 Z
+bit 102 C 1 *
+bit 101 I 1 IO_PAD1020
+bit 100 O 1 IO_PAD1020 99 1 Z
+bit 99 C 1 *
+bit 98 I 1 IO_PAD1018
+bit 97 O 1 IO_PAD1018 96 1 Z
+bit 96 C 1 *
+bit 95 I 1 IO_PAD1016
+bit 94 O 1 IO_PAD1016 93 1 Z
+bit 93 C 1 *
+bit 92 I 1 IO_PAD1015
+bit 91 O 1 IO_PAD1015 90 1 Z
+bit 90 C 1 *
+bit 89 I 1 IO_PAD1014
+bit 88 O 1 IO_PAD1014 87 1 Z
+bit 87 C 1 *
+bit 86 I 1 IO_PAD1012
+bit 85 O 1 IO_PAD1012 84 1 Z
+bit 84 C 1 *
+bit 83 I 1 IO_PAD1011
+bit 82 O 1 IO_PAD1011 81 1 Z
+bit 81 C 1 *
+bit 80 I 1 IO_PAD1010
+bit 79 O 1 IO_PAD1010 78 1 Z
+bit 78 C 1 *
+bit 77 I 1 IO_PAD1009
+bit 76 O 1 IO_PAD1009 75 1 Z
+bit 75 C 1 *
+bit 74 I 1 IO_PAD1008
+bit 73 O 1 IO_PAD1008 72 1 Z
+bit 72 C 1 *
+bit 71 I 1 IO_PAD1006
+bit 70 O 1 IO_PAD1006 69 1 Z
+bit 69 C 1 *
+bit 68 I 1 IO_PAD1004
+bit 67 O 1 IO_PAD1004 66 1 Z
+bit 66 C 1 *
+bit 65 I 1 IO_PAD1002
+bit 64 O 1 IO_PAD1002 63 1 Z
+bit 63 C 1 *
+bit 62 I 1 IO_PAD1001
+bit 61 O 1 IO_PAD1001 60 1 Z
+bit 60 C 1 *
+bit 59 I 1 IO_PAD1000
+bit 58 O 1 IO_PAD1000 57 1 Z
+bit 57 C 1 *
+bit 56 I 1 IO_PAD998
+bit 55 O 1 IO_PAD998 54 1 Z
+bit 54 C 1 *
+bit 53 I 1 IO_PAD997
+bit 52 O 1 IO_PAD997 51 1 Z
+bit 51 C 1 *
+bit 50 I 1 IO_PAD996
+bit 49 O 1 IO_PAD996 48 1 Z
+bit 48 C 1 *
+bit 47 I 1 IO_PAD994
+bit 46 O 1 IO_PAD994 45 1 Z
+bit 45 C 1 *
+bit 44 I 1 IO_PAD992
+bit 43 O 1 IO_PAD992 42 1 Z
+bit 42 C 1 *
+bit 41 I 1 IO_PAD990
+bit 40 O 1 IO_PAD990 39 1 Z
+bit 39 C 1 *
+bit 38 I 1 IO_PAD988
+bit 37 O 1 IO_PAD988 36 1 Z
+bit 36 C 1 *
+bit 35 I 1 IO_PAD987
+bit 34 O 1 IO_PAD987 33 1 Z
+bit 33 C 1 *
+bit 32 I 1 IO_PAD986
+bit 31 O 1 IO_PAD986 30 1 Z
+bit 30 C 1 *
+bit 29 I 1 IO_PAD985
+bit 28 O 1 IO_PAD985 27 1 Z
+bit 27 C 1 *
+bit 26 I 1 IO_PAD984
+bit 25 O 1 IO_PAD984 24 1 Z
+bit 24 C 1 *
+bit 23 I 1 IO_PAD982
+bit 22 O 1 IO_PAD982 21 1 Z
+bit 21 C 1 *
+bit 20 I 1 IO_PAD980
+bit 19 O 1 IO_PAD980 18 1 Z
+bit 18 C 1 *
+bit 17 I 1 IO_PAD979
+bit 16 O 1 IO_PAD979 15 1 Z
+bit 15 C 1 *
+bit 14 I 1 IO_PAD978
+bit 13 O 1 IO_PAD978 12 1 Z
+bit 12 C 1 *
+bit 11 I 1 IO_PAD977
+bit 10 O 1 IO_PAD977 9 1 Z
+bit 9 C 1 *
+bit 8 I 1 IO_PAD976
+bit 7 O 1 IO_PAD976 6 1 Z
+bit 6 C 1 *
+bit 5 I 1 IO_PAD974
+bit 4 O 1 IO_PAD974 3 1 Z
+bit 3 C 1 *
+bit 2 I 1 IO_PAD973
+bit 1 O 1 IO_PAD973 0 1 Z
+bit 0 C 1 *
--- /dev/null
+signal GND1
+signal GND2
+signal GND3
+signal GND4
+signal GND5
+signal GND6
+signal GND7
+signal GND8
+signal GND9
+signal GND10
+signal GND11
+signal GND12
+signal GND13
+signal GND14
+signal GND15
+signal GND16
+signal GND17
+signal GND18
+signal GND19
+signal GND20
+signal GND21
+signal GND22
+signal GND23
+signal GND24
+signal GND25
+signal GND26
+signal GND27
+signal GND28
+signal GND29
+signal GND30
+signal GND31
+signal GND32
+signal GND33
+signal GND34
+signal GND35
+signal GND36
+signal GND37
+signal GND38
+signal GND39
+signal GND40
+signal GND41
+signal GND42
+signal GND43
+signal GND44
+signal GND45
+signal GND46
+signal GND47
+signal GND48
+signal GND49
+signal GND50
+signal GND51
+signal GND52
+signal GND53
+signal GND54
+signal GND55
+signal GND56
+signal GND57
+signal GND58
+signal GND59
+signal GND60
+signal GND61
+signal GND62
+signal GND63
+signal GND64
+signal GND65
+signal GND66
+signal GND67
+signal GND68
+signal GND69
+signal GND70
+signal GND71
+signal GND72
+signal GND73
+signal GND74
+signal GND75
+signal GND76
+signal GND77
+signal GND78
+signal GND79
+signal GND80
+signal GND81
+signal GND82
+signal GND83
+signal GND84
+signal GND85
+signal GND86
+signal GND87
+signal GND88
+signal GND89
+signal GND90
+signal GND91
+signal GND92
+signal GND93
+signal GND94
+signal GND95
+signal GND96
+signal GND97
+signal GND98
+signal GND99
+signal GND100
+signal GND101
+signal GND102
+signal GND103
+signal GND104
+signal GND105
+signal GND106
+signal GND107
+signal GND108
+signal GND109
+signal GND110
+signal GND111
+signal GND112
+signal GND113
+signal GND114
+signal GND115
+signal GND116
+signal GND117
+signal GND118
+signal GND119
+signal GND120
+signal GND121
+signal GND122
+signal GND123
+signal GND124
+signal GND125
+signal GND126
+signal GND127
+signal GND128
+signal GND129
+signal GND130
+signal GND131
+signal GND132
+signal GND133
+signal GND134
+signal GND135
+signal GND136
+signal GND137
+signal GND138
+signal GND139
+signal GND140
+signal GND141
+signal GND142
+signal GND143
+signal GND144
+signal GND145
+signal GND146
+signal GND147
+signal GND148
+signal GND149
+signal GND150
+signal GND151
+signal GND152
+signal GND153
+signal GND154
+signal GND155
+signal GND156
+signal GND157
+signal GND158
+signal GND159
+signal GND160
+signal GND161
+signal GND162
+signal GND163
+signal GND164
+signal GND165
+signal GND166
+signal GND167
+signal GND168
+signal GND169
+signal GND170
+signal GND171
+signal GND172
+signal GND173
+signal GND174
+signal GND175
+signal GND176
+signal GND177
+signal GND178
+signal GND179
+signal GND180
+signal GND181
+signal GND182
+signal GND183
+signal GND184
+signal CCLK_AL31
+signal DONE_AD24
+signal HSWAP_EN_L11
+signal M0_AL4
+signal M1_AK4
+signal M2_AG8
+signal PROG_B
+signal TCK
+signal TDI
+signal TDO
+signal TMS
+signal VCCAUX1
+signal VCCAUX2
+signal VCCAUX3
+signal VCCAUX4
+signal VCCAUX5
+signal VCCAUX6
+signal VCCAUX7
+signal VCCAUX8
+signal VCCAUX9
+signal VCCAUX10
+signal VCCAUX11
+signal VCCAUX12
+signal VCCAUX13
+signal VCCAUX14
+signal VCCAUX15
+signal VCCAUX16
+signal VCCAUX17
+signal VCCAUX18
+signal VCCAUX19
+signal VCCAUX20
+signal VCCAUX21
+signal VCCAUX22
+signal VCCAUX23
+signal VCCAUX24
+signal VCCAUX25
+signal VCCAUX26
+signal VCCAUX27
+signal VCCAUX28
+signal VCCAUX29
+signal VCCAUX30
+signal VCCAUX31
+signal VCCAUX32
+signal VCCINT1
+signal VCCINT2
+signal VCCINT3
+signal VCCINT4
+signal VCCINT5
+signal VCCINT6
+signal VCCINT7
+signal VCCINT8
+signal VCCINT9
+signal VCCINT10
+signal VCCINT11
+signal VCCINT12
+signal VCCINT13
+signal VCCINT14
+signal VCCINT15
+signal VCCINT16
+signal VCCINT17
+signal VCCINT18
+signal VCCINT19
+signal VCCINT20
+signal VCCINT21
+signal VCCINT22
+signal VCCINT23
+signal VCCINT24
+signal VCCINT25
+signal VCCINT26
+signal VCCINT27
+signal VCCINT28
+signal VCCINT29
+signal VCCINT30
+signal VCCINT31
+signal VCCINT32
+signal VCCINT33
+signal VCCINT34
+signal VCCINT35
+signal VCCINT36
+signal VCCINT37
+signal VCCINT38
+signal VCCINT39
+signal VCCINT40
+signal VCCO01
+signal VCCO02
+signal VCCO03
+signal VCCO04
+signal VCCO05
+signal VCCO06
+signal VCCO07
+signal VCCO08
+signal VCCO09
+signal VCCO010
+signal VCCO011
+signal VCCO012
+signal VCCO013
+signal VCCO11
+signal VCCO12
+signal VCCO13
+signal VCCO14
+signal VCCO15
+signal VCCO16
+signal VCCO17
+signal VCCO18
+signal VCCO19
+signal VCCO110
+signal VCCO111
+signal VCCO112
+signal VCCO113
+signal VCCO21
+signal VCCO22
+signal VCCO23
+signal VCCO24
+signal VCCO25
+signal VCCO26
+signal VCCO27
+signal VCCO28
+signal VCCO29
+signal VCCO210
+signal VCCO211
+signal VCCO212
+signal VCCO213
+signal VCCO31
+signal VCCO32
+signal VCCO33
+signal VCCO34
+signal VCCO35
+signal VCCO36
+signal VCCO37
+signal VCCO38
+signal VCCO39
+signal VCCO310
+signal VCCO311
+signal VCCO312
+signal VCCO313
+signal VCCO41
+signal VCCO42
+signal VCCO43
+signal VCCO44
+signal VCCO45
+signal VCCO46
+signal VCCO47
+signal VCCO48
+signal VCCO49
+signal VCCO410
+signal VCCO411
+signal VCCO412
+signal VCCO413
+signal VCCO51
+signal VCCO52
+signal VCCO53
+signal VCCO54
+signal VCCO55
+signal VCCO56
+signal VCCO57
+signal VCCO58
+signal VCCO59
+signal VCCO510
+signal VCCO511
+signal VCCO512
+signal VCCO513
+signal VCCO61
+signal VCCO62
+signal VCCO63
+signal VCCO64
+signal VCCO65
+signal VCCO66
+signal VCCO67
+signal VCCO68
+signal VCCO69
+signal VCCO610
+signal VCCO611
+signal VCCO612
+signal VCCO613
+signal VCCO71
+signal VCCO72
+signal VCCO73
+signal VCCO74
+signal VCCO75
+signal VCCO76
+signal VCCO77
+signal VCCO78
+signal VCCO79
+signal VCCO710
+signal VCCO711
+signal VCCO712
+signal VCCO713
+signal IO_A3
+signal IO_A4
+signal IO_A6
+signal IO_A7
+signal IO_A8
+signal IO_A10
+signal IO_A11
+signal IO_A12
+signal IO_A14
+signal IO_A15
+signal IO_A17
+signal IO_A18
+signal IO_A20
+signal IO_A21
+signal IO_A23
+signal IO_A24
+signal IO_A25
+signal IO_A27
+signal IO_A28
+signal IO_A29
+signal IO_A31
+signal IO_A32
+signal IO_B3
+signal IO_B4
+signal IO_B5
+signal IO_B6
+signal IO_B7
+signal IO_B8
+signal IO_B9
+signal IO_B10
+signal IO_B11
+signal IO_B12
+signal IO_B14
+signal IO_B15
+signal IO_B16
+signal IO_B17
+signal IO_B18
+signal IO_B19
+signal IO_B20
+signal IO_B21
+signal IO_B23
+signal IO_B24
+signal IO_B25
+signal IO_B26
+signal IO_B27
+signal IO_B28
+signal IO_B29
+signal IO_B30
+signal IO_B31
+signal IO_B32
+signal IO_C1
+signal IO_C2
+signal IO_C5
+signal IO_C6
+signal IO_C7
+signal IO_C9
+signal IO_C10
+signal IO_C12
+signal IO_C13
+signal IO_C14
+signal IO_C15
+signal IO_C16
+signal IO_C17
+signal IO_C18
+signal IO_C19
+signal IO_C20
+signal IO_C21
+signal IO_C22
+signal IO_C23
+signal IO_C25
+signal IO_C26
+signal IO_C28
+signal IO_C29
+signal IO_C30
+signal IO_C33
+signal IO_C34
+signal IO_D1
+signal IO_D2
+signal IO_D5
+signal IO_D6
+signal IO_D7
+signal IO_D8
+signal IO_D9
+signal IO_D10
+signal IO_D12
+signal IO_D13
+signal IO_D14
+signal IO_D15
+signal IO_D17
+signal IO_D18
+signal IO_D20
+signal IO_D21
+signal IO_D22
+signal IO_D23
+signal IO_D25
+signal IO_D26
+signal IO_D27
+signal IO_D28
+signal IO_D29
+signal IO_D30
+signal IO_D33
+signal IO_D34
+signal IO_E2
+signal IO_E3
+signal IO_E7
+signal IO_E8
+signal IO_E10
+signal IO_E12
+signal IO_E14
+signal IO_E17
+signal IO_E18
+signal IO_E21
+signal IO_E23
+signal IO_E25
+signal IO_E27
+signal IO_E28
+signal IO_E32
+signal IO_E33
+signal IO_F1
+signal IO_F2
+signal IO_F3
+signal IO_F4
+signal IO_F6
+signal IO_F7
+signal IO_F8
+signal IO_F9
+signal IO_F10
+signal IO_F11
+signal IO_F12
+signal IO_F14
+signal IO_F15
+signal IO_F16
+signal IO_F17
+signal IO_F18
+signal IO_F19
+signal IO_F20
+signal IO_F21
+signal IO_F23
+signal IO_F24
+signal IO_F25
+signal IO_F26
+signal IO_F27
+signal IO_F28
+signal IO_F29
+signal IO_F31
+signal IO_F32
+signal IO_F33
+signal IO_F34
+signal IO_G1
+signal IO_G2
+signal IO_G3
+signal IO_G4
+signal IO_G5
+signal IO_G6
+signal IO_G9
+signal IO_G10
+signal IO_G11
+signal IO_G12
+signal IO_G13
+signal IO_G14
+signal IO_G15
+signal IO_G16
+signal IO_G17
+signal IO_G18
+signal IO_G19
+signal IO_G20
+signal IO_G21
+signal IO_G22
+signal IO_G23
+signal IO_G24
+signal IO_G25
+signal IO_G26
+signal IO_G29
+signal IO_G30
+signal IO_G31
+signal IO_G32
+signal IO_G33
+signal IO_G34
+signal IO_H1
+signal IO_H2
+signal IO_H4
+signal IO_H5
+signal IO_H6
+signal IO_H8
+signal IO_H9
+signal IO_H10
+signal IO_H12
+signal IO_H13
+signal IO_H14
+signal IO_H17
+signal IO_H18
+signal IO_H21
+signal IO_H22
+signal IO_H23
+signal IO_H25
+signal IO_H26
+signal IO_H29
+signal IO_H30
+signal IO_H31
+signal IO_H33
+signal IO_H34
+signal IO_J2
+signal IO_J3
+signal IO_J4
+signal IO_J6
+signal IO_J7
+signal IO_J8
+signal IO_J9
+signal IO_J10
+signal IO_J11
+signal IO_J12
+signal IO_J14
+signal IO_J15
+signal IO_J17
+signal IO_J18
+signal IO_J20
+signal IO_J21
+signal IO_J23
+signal IO_J24
+signal IO_J25
+signal IO_J26
+signal IO_J27
+signal IO_J28
+signal IO_J29
+signal IO_J31
+signal IO_J32
+signal IO_J33
+signal IO_K1
+signal IO_K2
+signal IO_K3
+signal IO_K4
+signal IO_K5
+signal IO_K6
+signal IO_K7
+signal IO_K8
+signal IO_K9
+signal IO_K11
+signal IO_K12
+signal IO_K13
+signal IO_K14
+signal IO_K15
+signal IO_K16
+signal IO_K17
+signal IO_K18
+signal IO_K19
+signal IO_K20
+signal IO_K21
+signal IO_K22
+signal IO_K23
+signal IO_K24
+signal IO_K26
+signal IO_K27
+signal IO_K28
+signal IO_K29
+signal IO_K30
+signal IO_K31
+signal IO_K32
+signal IO_K33
+signal IO_K34
+signal IO_L1
+signal IO_L2
+signal IO_L6
+signal IO_L7
+signal IO_L9
+signal IO_L10
+signal IO_L12
+signal IO_L13
+signal IO_L14
+signal IO_L15
+signal IO_L16
+signal IO_L17
+signal IO_L18
+signal IO_L19
+signal IO_L20
+signal IO_L21
+signal IO_L22
+signal IO_L23
+signal IO_L24
+signal IO_L25
+signal IO_L26
+signal IO_L28
+signal IO_L29
+signal IO_L33
+signal IO_L34
+signal IO_M1
+signal IO_M2
+signal IO_M3
+signal IO_M4
+signal IO_M5
+signal IO_M6
+signal IO_M7
+signal IO_M8
+signal IO_M9
+signal IO_M10
+signal IO_M11
+signal IO_M24
+signal IO_M25
+signal IO_M26
+signal IO_M27
+signal IO_M28
+signal IO_M29
+signal IO_M30
+signal IO_M31
+signal IO_M32
+signal IO_M33
+signal IO_M34
+signal IO_N3
+signal IO_N4
+signal IO_N7
+signal IO_N8
+signal IO_N10
+signal IO_N11
+signal IO_N24
+signal IO_N25
+signal IO_N27
+signal IO_N28
+signal IO_N31
+signal IO_N32
+signal IO_P1
+signal IO_P2
+signal IO_P3
+signal IO_P4
+signal IO_P5
+signal IO_P6
+signal IO_P7
+signal IO_P8
+signal IO_P9
+signal IO_P10
+signal IO_P11
+signal IO_P24
+signal IO_P25
+signal IO_P26
+signal IO_P27
+signal IO_P28
+signal IO_P29
+signal IO_P30
+signal IO_P31
+signal IO_P32
+signal IO_P33
+signal IO_P34
+signal IO_R1
+signal IO_R2
+signal IO_R3
+signal IO_R4
+signal IO_R6
+signal IO_R7
+signal IO_R9
+signal IO_R10
+signal IO_R11
+signal IO_R24
+signal IO_R25
+signal IO_R26
+signal IO_R28
+signal IO_R29
+signal IO_R31
+signal IO_R32
+signal IO_R33
+signal IO_R34
+signal IO_T2
+signal IO_T3
+signal IO_T6
+signal IO_T7
+signal IO_T10
+signal IO_T11
+signal IO_T24
+signal IO_T25
+signal IO_T28
+signal IO_T29
+signal IO_T32
+signal IO_T33
+signal IO_U1
+signal IO_U2
+signal IO_U3
+signal IO_U4
+signal IO_U5
+signal IO_U6
+signal IO_U7
+signal IO_U8
+signal IO_U9
+signal IO_U10
+signal IO_U11
+signal IO_U24
+signal IO_U25
+signal IO_U26
+signal IO_U27
+signal IO_U28
+signal IO_U29
+signal IO_U30
+signal IO_U31
+signal IO_U32
+signal IO_U33
+signal IO_U34
+signal IO_V1
+signal IO_V2
+signal IO_V3
+signal IO_V4
+signal IO_V5
+signal IO_V6
+signal IO_V7
+signal IO_V8
+signal IO_V9
+signal IO_V10
+signal IO_V11
+signal IO_V24
+signal IO_V25
+signal IO_V26
+signal IO_V27
+signal IO_V28
+signal IO_V29
+signal IO_V30
+signal IO_V31
+signal IO_V32
+signal IO_V33
+signal IO_V34
+signal IO_W2
+signal IO_W3
+signal IO_W6
+signal IO_W7
+signal IO_W10
+signal IO_W11
+signal IO_W24
+signal IO_W25
+signal IO_W28
+signal IO_W29
+signal IO_W32
+signal IO_W33
+signal IO_Y1
+signal IO_Y2
+signal IO_Y3
+signal IO_Y4
+signal IO_Y6
+signal IO_Y7
+signal IO_Y9
+signal IO_Y10
+signal IO_Y11
+signal IO_Y24
+signal IO_Y25
+signal IO_Y26
+signal IO_Y28
+signal IO_Y29
+signal IO_Y31
+signal IO_Y32
+signal IO_Y33
+signal IO_Y34
+signal IO_AA1
+signal IO_AA2
+signal IO_AA3
+signal IO_AA4
+signal IO_AA5
+signal IO_AA6
+signal IO_AA7
+signal IO_AA8
+signal IO_AA9
+signal IO_AA10
+signal IO_AA11
+signal IO_AA24
+signal IO_AA25
+signal IO_AA26
+signal IO_AA27
+signal IO_AA28
+signal IO_AA29
+signal IO_AA30
+signal IO_AA31
+signal IO_AA32
+signal IO_AA33
+signal IO_AA34
+signal IO_AB3
+signal IO_AB4
+signal IO_AB7
+signal IO_AB8
+signal IO_AB10
+signal IO_AB11
+signal IO_AB24
+signal IO_AB25
+signal IO_AB27
+signal IO_AB28
+signal IO_AB31
+signal IO_AB32
+signal IO_AC1
+signal IO_AC2
+signal IO_AC3
+signal IO_AC4
+signal IO_AC5
+signal IO_AC6
+signal IO_AC7
+signal IO_AC8
+signal IO_AC9
+signal IO_AC10
+signal IO_AC11
+signal IO_AC24
+signal IO_AC25
+signal IO_AC26
+signal IO_AC27
+signal IO_AC28
+signal IO_AC29
+signal IO_AC30
+signal IO_AC31
+signal IO_AC32
+signal IO_AC33
+signal IO_AC34
+signal IO_AD1
+signal IO_AD2
+signal IO_AD6
+signal IO_AD7
+signal IO_AD9
+signal IO_AD10
+signal IO_AD11
+signal IO_AD12
+signal IO_AD13
+signal IO_AD14
+signal IO_AD15
+signal IO_AD16
+signal IO_AD17
+signal IO_AD18
+signal IO_AD19
+signal IO_AD20
+signal IO_AD21
+signal IO_AD22
+signal IO_AD23
+signal IO_AD25
+signal IO_AD26
+signal IO_AD28
+signal IO_AD29
+signal IO_AD33
+signal IO_AD34
+signal IO_AE1
+signal IO_AE2
+signal IO_AE3
+signal IO_AE4
+signal IO_AE5
+signal IO_AE6
+signal IO_AE7
+signal IO_AE8
+signal IO_AE9
+signal IO_AE11
+signal IO_AE12
+signal IO_AE13
+signal IO_AE14
+signal IO_AE15
+signal IO_AE16
+signal IO_AE17
+signal IO_AE18
+signal IO_AE19
+signal IO_AE20
+signal IO_AE21
+signal IO_AE22
+signal IO_AE23
+signal IO_AE24
+signal IO_AE26
+signal IO_AE27
+signal IO_AE28
+signal IO_AE29
+signal IO_AE30
+signal IO_AE31
+signal IO_AE32
+signal IO_AE33
+signal IO_AE34
+signal IO_AF2
+signal IO_AF3
+signal IO_AF4
+signal IO_AF6
+signal IO_AF7
+signal IO_AF8
+signal IO_AF9
+signal IO_AF10
+signal IO_AF11
+signal IO_AF12
+signal IO_AF14
+signal IO_AF15
+signal IO_AF17
+signal IO_AF18
+signal IO_AF20
+signal IO_AF21
+signal IO_AF23
+signal IO_AF24
+signal IO_AF25
+signal IO_AF26
+signal IO_AF27
+signal IO_AF28
+signal IO_AF29
+signal IO_AF31
+signal IO_AF32
+signal IO_AF33
+signal IO_AG1
+signal IO_AG2
+signal IO_AG4
+signal IO_AG5
+signal IO_AG6
+signal IO_AG9
+signal IO_AG10
+signal IO_AG12
+signal IO_AG13
+signal IO_AG14
+signal IO_AG17
+signal IO_AG18
+signal IO_AG21
+signal IO_AG22
+signal IO_AG23
+signal IO_AG25
+signal IO_AG26
+signal IO_AG27
+signal IO_AG29
+signal IO_AG30
+signal IO_AG31
+signal IO_AG33
+signal IO_AG34
+signal IO_AH1
+signal IO_AH2
+signal IO_AH3
+signal IO_AH4
+signal IO_AH5
+signal IO_AH6
+signal IO_AH9
+signal IO_AH10
+signal IO_AH11
+signal IO_AH12
+signal IO_AH13
+signal IO_AH14
+signal IO_AH15
+signal IO_AH16
+signal IO_AH17
+signal IO_AH18
+signal IO_AH19
+signal IO_AH20
+signal IO_AH21
+signal IO_AH22
+signal IO_AH23
+signal IO_AH24
+signal IO_AH25
+signal IO_AH26
+signal IO_AH29
+signal IO_AH30
+signal IO_AH31
+signal IO_AH32
+signal IO_AH33
+signal IO_AH34
+signal IO_AJ1
+signal IO_AJ2
+signal IO_AJ3
+signal IO_AJ4
+signal IO_AJ6
+signal IO_AJ7
+signal IO_AJ8
+signal IO_AJ9
+signal IO_AJ10
+signal IO_AJ11
+signal IO_AJ12
+signal IO_AJ14
+signal IO_AJ15
+signal IO_AJ16
+signal IO_AJ17
+signal IO_AJ18
+signal IO_AJ19
+signal IO_AJ20
+signal IO_AJ21
+signal IO_AJ23
+signal IO_AJ24
+signal IO_AJ25
+signal IO_AJ26
+signal IO_AJ27
+signal IO_AJ28
+signal IO_AJ29
+signal IO_AJ31
+signal IO_AJ32
+signal IO_AJ33
+signal IO_AJ34
+signal IO_AK2
+signal IO_AK3
+signal IO_AK7
+signal IO_AK8
+signal IO_AK10
+signal IO_AK12
+signal IO_AK14
+signal IO_AK17
+signal IO_AK18
+signal IO_AK21
+signal IO_AK23
+signal IO_AK25
+signal IO_AK27
+signal IO_AK28
+signal IO_AK32
+signal IO_AK33
+signal IO_AL1
+signal IO_AL2
+signal IO_AL5
+signal IO_AL6
+signal IO_AL7
+signal IO_AL8
+signal IO_AL9
+signal IO_AL10
+signal IO_AL12
+signal IO_AL13
+signal IO_AL14
+signal IO_AL15
+signal IO_AL17
+signal IO_AL18
+signal IO_AL20
+signal IO_AL21
+signal IO_AL22
+signal IO_AL23
+signal IO_AL25
+signal IO_AL26
+signal IO_AL27
+signal IO_AL28
+signal IO_AL29
+signal IO_AL30
+signal IO_AL33
+signal IO_AL34
+signal IO_AM1
+signal IO_AM2
+signal IO_AM5
+signal IO_AM6
+signal IO_AM7
+signal IO_AM9
+signal IO_AM10
+signal IO_AM12
+signal IO_AM13
+signal IO_AM14
+signal IO_AM15
+signal IO_AM16
+signal IO_AM17
+signal IO_AM18
+signal IO_AM19
+signal IO_AM20
+signal IO_AM21
+signal IO_AM22
+signal IO_AM23
+signal IO_AM25
+signal IO_AM26
+signal IO_AM28
+signal IO_AM29
+signal IO_AM30
+signal IO_AM33
+signal IO_AM34
+signal IO_AN3
+signal IO_AN4
+signal IO_AN5
+signal IO_AN6
+signal IO_AN7
+signal IO_AN8
+signal IO_AN9
+signal IO_AN10
+signal IO_AN11
+signal IO_AN12
+signal IO_AN14
+signal IO_AN15
+signal IO_AN16
+signal IO_AN17
+signal IO_AN18
+signal IO_AN19
+signal IO_AN20
+signal IO_AN21
+signal IO_AN23
+signal IO_AN24
+signal IO_AN25
+signal IO_AN26
+signal IO_AN27
+signal IO_AN28
+signal IO_AN29
+signal IO_AN30
+signal IO_AN31
+signal IO_AN32
+signal IO_AP3
+signal IO_AP4
+signal IO_AP6
+signal IO_AP7
+signal IO_AP8
+signal IO_AP10
+signal IO_AP11
+signal IO_AP12
+signal IO_AP14
+signal IO_AP15
+signal IO_AP17
+signal IO_AP18
+signal IO_AP20
+signal IO_AP21
+signal IO_AP23
+signal IO_AP24
+signal IO_AP25
+signal IO_AP27
+signal IO_AP28
+signal IO_AP29
+signal IO_AP31
+
+register BSR 2459
+register BR 1
+register DIR 32
+
+instruction length 6
+
+instruction EXTEST 000000 BSR
+instruction SAMPLE/PRELOAD 000001 BSR
+instruction IDCODE 001001 DIR
+instruction BYPASS 111111 BR
+
+bit 2458 I 1 IO_C33
+bit 2457 O 1 IO_C33 2456 1 Z
+bit 2456 C 1 *
+bit 2455 I 1 IO_C34
+bit 2454 O 1 IO_C34 2453 1 Z
+bit 2453 C 1 *
+bit 2452 I 1 IO_D33
+bit 2451 O 1 IO_D33 2450 1 Z
+bit 2450 C 1 *
+bit 2449 I 1 IO_D34
+bit 2448 O 1 IO_D34 2447 1 Z
+bit 2447 C 1 *
+bit 2446 I 1 IO_E32
+bit 2445 O 1 IO_E32 2444 1 Z
+bit 2444 C 1 *
+bit 2443 I 1 IO_E33
+bit 2442 O 1 IO_E33 2441 1 Z
+bit 2441 C 1 *
+bit 2440 I 1 IO_F31
+bit 2439 O 1 IO_F31 2438 1 Z
+bit 2438 C 1 *
+bit 2437 I 1 IO_F32
+bit 2436 O 1 IO_F32 2435 1 Z
+bit 2435 C 1 *
+bit 2434 I 1 IO_F33
+bit 2433 O 1 IO_F33 2432 1 Z
+bit 2432 C 1 *
+bit 2431 I 1 IO_F34
+bit 2430 O 1 IO_F34 2429 1 Z
+bit 2429 C 1 *
+bit 2428 I 1 IO_G29
+bit 2427 O 1 IO_G29 2426 1 Z
+bit 2426 C 1 *
+bit 2425 I 1 IO_G30
+bit 2424 O 1 IO_G30 2423 1 Z
+bit 2423 C 1 *
+bit 2422 I 1 IO_G31
+bit 2421 O 1 IO_G31 2420 1 Z
+bit 2420 C 1 *
+bit 2419 I 1 IO_G32
+bit 2418 O 1 IO_G32 2417 1 Z
+bit 2417 C 1 *
+bit 2416 I 1 IO_G33
+bit 2415 O 1 IO_G33 2414 1 Z
+bit 2414 C 1 *
+bit 2413 O 1 *
+bit 2412 O 1 *
+bit 2411 O 1 *
+bit 2410 O 1 *
+bit 2409 O 1 *
+bit 2408 O 1 *
+bit 2407 I 1 IO_G34
+bit 2406 O 1 IO_G34 2405 1 Z
+bit 2405 C 1 *
+bit 2404 I 1 IO_H29
+bit 2403 O 1 IO_H29 2402 1 Z
+bit 2402 C 1 *
+bit 2401 I 1 IO_H30
+bit 2400 O 1 IO_H30 2399 1 Z
+bit 2399 C 1 *
+bit 2398 I 1 IO_H33
+bit 2397 O 1 IO_H33 2396 1 Z
+bit 2396 C 1 *
+bit 2395 I 1 IO_H34
+bit 2394 O 1 IO_H34 2393 1 Z
+bit 2393 C 1 *
+bit 2392 I 1 IO_J28
+bit 2391 O 1 IO_J28 2390 1 Z
+bit 2390 C 1 *
+bit 2389 I 1 IO_J29
+bit 2388 O 1 IO_J29 2387 1 Z
+bit 2387 C 1 *
+bit 2386 I 1 IO_H31
+bit 2385 O 1 IO_H31 2384 1 Z
+bit 2384 C 1 *
+bit 2383 I 1 IO_J31
+bit 2382 O 1 IO_J31 2381 1 Z
+bit 2381 C 1 *
+bit 2380 I 1 IO_J32
+bit 2379 O 1 IO_J32 2378 1 Z
+bit 2378 C 1 *
+bit 2377 I 1 IO_J33
+bit 2376 O 1 IO_J33 2375 1 Z
+bit 2375 C 1 *
+bit 2374 I 1 IO_J27
+bit 2373 O 1 IO_J27 2372 1 Z
+bit 2372 C 1 *
+bit 2371 I 1 IO_K26
+bit 2370 O 1 IO_K26 2369 1 Z
+bit 2369 C 1 *
+bit 2368 I 1 IO_K27
+bit 2367 O 1 IO_K27 2366 1 Z
+bit 2366 C 1 *
+bit 2365 I 1 IO_K28
+bit 2364 O 1 IO_K28 2363 1 Z
+bit 2363 C 1 *
+bit 2362 I 1 IO_K29
+bit 2361 O 1 IO_K29 2360 1 Z
+bit 2360 C 1 *
+bit 2359 I 1 IO_K30
+bit 2358 O 1 IO_K30 2357 1 Z
+bit 2357 C 1 *
+bit 2356 I 1 IO_K31
+bit 2355 O 1 IO_K31 2354 1 Z
+bit 2354 C 1 *
+bit 2353 I 1 IO_K32
+bit 2352 O 1 IO_K32 2351 1 Z
+bit 2351 C 1 *
+bit 2350 I 1 IO_K33
+bit 2349 O 1 IO_K33 2348 1 Z
+bit 2348 C 1 *
+bit 2347 I 1 IO_K34
+bit 2346 O 1 IO_K34 2345 1 Z
+bit 2345 C 1 *
+bit 2344 I 1 IO_L25
+bit 2343 O 1 IO_L25 2342 1 Z
+bit 2342 C 1 *
+bit 2341 I 1 IO_L26
+bit 2340 O 1 IO_L26 2339 1 Z
+bit 2339 C 1 *
+bit 2338 I 1 IO_L28
+bit 2337 O 1 IO_L28 2336 1 Z
+bit 2336 C 1 *
+bit 2335 I 1 IO_L29
+bit 2334 O 1 IO_L29 2333 1 Z
+bit 2333 C 1 *
+bit 2332 O 1 *
+bit 2331 O 1 *
+bit 2330 O 1 *
+bit 2329 O 1 *
+bit 2328 O 1 *
+bit 2327 O 1 *
+bit 2326 I 1 IO_L33
+bit 2325 O 1 IO_L33 2324 1 Z
+bit 2324 C 1 *
+bit 2323 I 1 IO_L34
+bit 2322 O 1 IO_L34 2321 1 Z
+bit 2321 C 1 *
+bit 2320 I 1 IO_M24
+bit 2319 O 1 IO_M24 2318 1 Z
+bit 2318 C 1 *
+bit 2317 I 1 IO_M25
+bit 2316 O 1 IO_M25 2315 1 Z
+bit 2315 C 1 *
+bit 2314 I 1 IO_M27
+bit 2313 O 1 IO_M27 2312 1 Z
+bit 2312 C 1 *
+bit 2311 I 1 IO_M28
+bit 2310 O 1 IO_M28 2309 1 Z
+bit 2309 C 1 *
+bit 2308 I 1 IO_M29
+bit 2307 O 1 IO_M29 2306 1 Z
+bit 2306 C 1 *
+bit 2305 I 1 IO_M30
+bit 2304 O 1 IO_M30 2303 1 Z
+bit 2303 C 1 *
+bit 2302 I 1 IO_M31
+bit 2301 O 1 IO_M31 2300 1 Z
+bit 2300 C 1 *
+bit 2299 I 1 IO_M32
+bit 2298 O 1 IO_M32 2297 1 Z
+bit 2297 C 1 *
+bit 2296 I 1 IO_M33
+bit 2295 O 1 IO_M33 2294 1 Z
+bit 2294 C 1 *
+bit 2293 I 1 IO_M34
+bit 2292 O 1 IO_M34 2291 1 Z
+bit 2291 C 1 *
+bit 2290 I 1 IO_M26
+bit 2289 O 1 IO_M26 2288 1 Z
+bit 2288 C 1 *
+bit 2287 I 1 IO_N25
+bit 2286 O 1 IO_N25 2285 1 Z
+bit 2285 C 1 *
+bit 2284 I 1 IO_N27
+bit 2283 O 1 IO_N27 2282 1 Z
+bit 2282 C 1 *
+bit 2281 I 1 IO_N28
+bit 2280 O 1 IO_N28 2279 1 Z
+bit 2279 C 1 *
+bit 2278 I 1 IO_N31
+bit 2277 O 1 IO_N31 2276 1 Z
+bit 2276 C 1 *
+bit 2275 I 1 IO_N32
+bit 2274 O 1 IO_N32 2273 1 Z
+bit 2273 C 1 *
+bit 2272 I 1 IO_N24
+bit 2271 O 1 IO_N24 2270 1 Z
+bit 2270 C 1 *
+bit 2269 I 1 IO_P24
+bit 2268 O 1 IO_P24 2267 1 Z
+bit 2267 C 1 *
+bit 2266 I 1 IO_P25
+bit 2265 O 1 IO_P25 2264 1 Z
+bit 2264 C 1 *
+bit 2263 I 1 IO_P26
+bit 2262 O 1 IO_P26 2261 1 Z
+bit 2261 C 1 *
+bit 2260 O 1 *
+bit 2259 O 1 *
+bit 2258 O 1 *
+bit 2257 O 1 *
+bit 2256 O 1 *
+bit 2255 O 1 *
+bit 2254 I 1 IO_P27
+bit 2253 O 1 IO_P27 2252 1 Z
+bit 2252 C 1 *
+bit 2251 I 1 IO_P28
+bit 2250 O 1 IO_P28 2249 1 Z
+bit 2249 C 1 *
+bit 2248 I 1 IO_P29
+bit 2247 O 1 IO_P29 2246 1 Z
+bit 2246 C 1 *
+bit 2245 I 1 IO_P30
+bit 2244 O 1 IO_P30 2243 1 Z
+bit 2243 C 1 *
+bit 2242 I 1 IO_P31
+bit 2241 O 1 IO_P31 2240 1 Z
+bit 2240 C 1 *
+bit 2239 I 1 IO_P32
+bit 2238 O 1 IO_P32 2237 1 Z
+bit 2237 C 1 *
+bit 2236 I 1 IO_P33
+bit 2235 O 1 IO_P33 2234 1 Z
+bit 2234 C 1 *
+bit 2233 I 1 IO_P34
+bit 2232 O 1 IO_P34 2231 1 Z
+bit 2231 C 1 *
+bit 2230 I 1 IO_R24
+bit 2229 O 1 IO_R24 2228 1 Z
+bit 2228 C 1 *
+bit 2227 I 1 IO_R25
+bit 2226 O 1 IO_R25 2225 1 Z
+bit 2225 C 1 *
+bit 2224 I 1 IO_R28
+bit 2223 O 1 IO_R28 2222 1 Z
+bit 2222 C 1 *
+bit 2221 I 1 IO_R29
+bit 2220 O 1 IO_R29 2219 1 Z
+bit 2219 C 1 *
+bit 2218 I 1 IO_R31
+bit 2217 O 1 IO_R31 2216 1 Z
+bit 2216 C 1 *
+bit 2215 I 1 IO_R32
+bit 2214 O 1 IO_R32 2213 1 Z
+bit 2213 C 1 *
+bit 2212 I 1 IO_R33
+bit 2211 O 1 IO_R33 2210 1 Z
+bit 2210 C 1 *
+bit 2209 I 1 IO_R34
+bit 2208 O 1 IO_R34 2207 1 Z
+bit 2207 C 1 *
+bit 2206 I 1 IO_R26
+bit 2205 O 1 IO_R26 2204 1 Z
+bit 2204 C 1 *
+bit 2203 I 1 IO_T25
+bit 2202 O 1 IO_T25 2201 1 Z
+bit 2201 C 1 *
+bit 2200 I 1 IO_T28
+bit 2199 O 1 IO_T28 2198 1 Z
+bit 2198 C 1 *
+bit 2197 I 1 IO_T29
+bit 2196 O 1 IO_T29 2195 1 Z
+bit 2195 C 1 *
+bit 2194 I 1 IO_T32
+bit 2193 O 1 IO_T32 2192 1 Z
+bit 2192 C 1 *
+bit 2191 I 1 IO_T33
+bit 2190 O 1 IO_T33 2189 1 Z
+bit 2189 C 1 *
+bit 2188 I 1 IO_T24
+bit 2187 O 1 IO_T24 2186 1 Z
+bit 2186 C 1 *
+bit 2185 I 1 IO_U24
+bit 2184 O 1 IO_U24 2183 1 Z
+bit 2183 C 1 *
+bit 2182 I 1 IO_U25
+bit 2181 O 1 IO_U25 2180 1 Z
+bit 2180 C 1 *
+bit 2179 O 1 *
+bit 2178 O 1 *
+bit 2177 O 1 *
+bit 2176 O 1 *
+bit 2175 O 1 *
+bit 2174 O 1 *
+bit 2173 I 1 IO_U26
+bit 2172 O 1 IO_U26 2171 1 Z
+bit 2171 C 1 *
+bit 2170 I 1 IO_U27
+bit 2169 O 1 IO_U27 2168 1 Z
+bit 2168 C 1 *
+bit 2167 I 1 IO_U28
+bit 2166 O 1 IO_U28 2165 1 Z
+bit 2165 C 1 *
+bit 2164 I 1 IO_U29
+bit 2163 O 1 IO_U29 2162 1 Z
+bit 2162 C 1 *
+bit 2161 I 1 IO_U30
+bit 2160 O 1 IO_U30 2159 1 Z
+bit 2159 C 1 *
+bit 2158 I 1 IO_U31
+bit 2157 O 1 IO_U31 2156 1 Z
+bit 2156 C 1 *
+bit 2155 I 1 IO_U32
+bit 2154 O 1 IO_U32 2153 1 Z
+bit 2153 C 1 *
+bit 2152 I 1 IO_U33
+bit 2151 O 1 IO_U33 2150 1 Z
+bit 2150 C 1 *
+bit 2149 I 1 IO_U34
+bit 2148 O 1 IO_U34 2147 1 Z
+bit 2147 C 1 *
+bit 2146 I 1 IO_V34
+bit 2145 O 1 IO_V34 2144 1 Z
+bit 2144 C 1 *
+bit 2143 I 1 IO_V33
+bit 2142 O 1 IO_V33 2141 1 Z
+bit 2141 C 1 *
+bit 2140 I 1 IO_V32
+bit 2139 O 1 IO_V32 2138 1 Z
+bit 2138 C 1 *
+bit 2137 I 1 IO_V31
+bit 2136 O 1 IO_V31 2135 1 Z
+bit 2135 C 1 *
+bit 2134 I 1 IO_V30
+bit 2133 O 1 IO_V30 2132 1 Z
+bit 2132 C 1 *
+bit 2131 I 1 IO_V29
+bit 2130 O 1 IO_V29 2129 1 Z
+bit 2129 C 1 *
+bit 2128 I 1 IO_V28
+bit 2127 O 1 IO_V28 2126 1 Z
+bit 2126 C 1 *
+bit 2125 I 1 IO_V27
+bit 2124 O 1 IO_V27 2123 1 Z
+bit 2123 C 1 *
+bit 2122 I 1 IO_V26
+bit 2121 O 1 IO_V26 2120 1 Z
+bit 2120 C 1 *
+bit 2119 O 1 *
+bit 2118 O 1 *
+bit 2117 O 1 *
+bit 2116 O 1 *
+bit 2115 O 1 *
+bit 2114 O 1 *
+bit 2113 I 1 IO_V25
+bit 2112 O 1 IO_V25 2111 1 Z
+bit 2111 C 1 *
+bit 2110 I 1 IO_V24
+bit 2109 O 1 IO_V24 2108 1 Z
+bit 2108 C 1 *
+bit 2107 I 1 IO_W24
+bit 2106 O 1 IO_W24 2105 1 Z
+bit 2105 C 1 *
+bit 2104 I 1 IO_W33
+bit 2103 O 1 IO_W33 2102 1 Z
+bit 2102 C 1 *
+bit 2101 I 1 IO_W32
+bit 2100 O 1 IO_W32 2099 1 Z
+bit 2099 C 1 *
+bit 2098 I 1 IO_W29
+bit 2097 O 1 IO_W29 2096 1 Z
+bit 2096 C 1 *
+bit 2095 I 1 IO_W28
+bit 2094 O 1 IO_W28 2093 1 Z
+bit 2093 C 1 *
+bit 2092 I 1 IO_W25
+bit 2091 O 1 IO_W25 2090 1 Z
+bit 2090 C 1 *
+bit 2089 I 1 IO_Y26
+bit 2088 O 1 IO_Y26 2087 1 Z
+bit 2087 C 1 *
+bit 2086 I 1 IO_Y34
+bit 2085 O 1 IO_Y34 2084 1 Z
+bit 2084 C 1 *
+bit 2083 I 1 IO_Y33
+bit 2082 O 1 IO_Y33 2081 1 Z
+bit 2081 C 1 *
+bit 2080 I 1 IO_Y32
+bit 2079 O 1 IO_Y32 2078 1 Z
+bit 2078 C 1 *
+bit 2077 I 1 IO_Y31
+bit 2076 O 1 IO_Y31 2075 1 Z
+bit 2075 C 1 *
+bit 2074 I 1 IO_Y29
+bit 2073 O 1 IO_Y29 2072 1 Z
+bit 2072 C 1 *
+bit 2071 I 1 IO_Y28
+bit 2070 O 1 IO_Y28 2069 1 Z
+bit 2069 C 1 *
+bit 2068 I 1 IO_Y25
+bit 2067 O 1 IO_Y25 2066 1 Z
+bit 2066 C 1 *
+bit 2065 I 1 IO_Y24
+bit 2064 O 1 IO_Y24 2063 1 Z
+bit 2063 C 1 *
+bit 2062 I 1 IO_AA34
+bit 2061 O 1 IO_AA34 2060 1 Z
+bit 2060 C 1 *
+bit 2059 I 1 IO_AA33
+bit 2058 O 1 IO_AA33 2057 1 Z
+bit 2057 C 1 *
+bit 2056 I 1 IO_AA32
+bit 2055 O 1 IO_AA32 2054 1 Z
+bit 2054 C 1 *
+bit 2053 I 1 IO_AA31
+bit 2052 O 1 IO_AA31 2051 1 Z
+bit 2051 C 1 *
+bit 2050 I 1 IO_AA30
+bit 2049 O 1 IO_AA30 2048 1 Z
+bit 2048 C 1 *
+bit 2047 I 1 IO_AA29
+bit 2046 O 1 IO_AA29 2045 1 Z
+bit 2045 C 1 *
+bit 2044 I 1 IO_AA28
+bit 2043 O 1 IO_AA28 2042 1 Z
+bit 2042 C 1 *
+bit 2041 I 1 IO_AA27
+bit 2040 O 1 IO_AA27 2039 1 Z
+bit 2039 C 1 *
+bit 2038 O 1 *
+bit 2037 O 1 *
+bit 2036 O 1 *
+bit 2035 O 1 *
+bit 2034 O 1 *
+bit 2033 O 1 *
+bit 2032 I 1 IO_AA26
+bit 2031 O 1 IO_AA26 2030 1 Z
+bit 2030 C 1 *
+bit 2029 I 1 IO_AA25
+bit 2028 O 1 IO_AA25 2027 1 Z
+bit 2027 C 1 *
+bit 2026 I 1 IO_AA24
+bit 2025 O 1 IO_AA24 2024 1 Z
+bit 2024 C 1 *
+bit 2023 I 1 IO_AB24
+bit 2022 O 1 IO_AB24 2021 1 Z
+bit 2021 C 1 *
+bit 2020 I 1 IO_AB32
+bit 2019 O 1 IO_AB32 2018 1 Z
+bit 2018 C 1 *
+bit 2017 I 1 IO_AB31
+bit 2016 O 1 IO_AB31 2015 1 Z
+bit 2015 C 1 *
+bit 2014 I 1 IO_AB28
+bit 2013 O 1 IO_AB28 2012 1 Z
+bit 2012 C 1 *
+bit 2011 I 1 IO_AB27
+bit 2010 O 1 IO_AB27 2009 1 Z
+bit 2009 C 1 *
+bit 2008 I 1 IO_AB25
+bit 2007 O 1 IO_AB25 2006 1 Z
+bit 2006 C 1 *
+bit 2005 I 1 IO_AC26
+bit 2004 O 1 IO_AC26 2003 1 Z
+bit 2003 C 1 *
+bit 2002 I 1 IO_AC34
+bit 2001 O 1 IO_AC34 2000 1 Z
+bit 2000 C 1 *
+bit 1999 I 1 IO_AC33
+bit 1998 O 1 IO_AC33 1997 1 Z
+bit 1997 C 1 *
+bit 1996 I 1 IO_AC32
+bit 1995 O 1 IO_AC32 1994 1 Z
+bit 1994 C 1 *
+bit 1993 I 1 IO_AC31
+bit 1992 O 1 IO_AC31 1991 1 Z
+bit 1991 C 1 *
+bit 1990 I 1 IO_AC30
+bit 1989 O 1 IO_AC30 1988 1 Z
+bit 1988 C 1 *
+bit 1987 I 1 IO_AC29
+bit 1986 O 1 IO_AC29 1985 1 Z
+bit 1985 C 1 *
+bit 1984 I 1 IO_AC28
+bit 1983 O 1 IO_AC28 1982 1 Z
+bit 1982 C 1 *
+bit 1981 I 1 IO_AC27
+bit 1980 O 1 IO_AC27 1979 1 Z
+bit 1979 C 1 *
+bit 1978 I 1 IO_AC25
+bit 1977 O 1 IO_AC25 1976 1 Z
+bit 1976 C 1 *
+bit 1975 I 1 IO_AC24
+bit 1974 O 1 IO_AC24 1973 1 Z
+bit 1973 C 1 *
+bit 1972 I 1 IO_AD34
+bit 1971 O 1 IO_AD34 1970 1 Z
+bit 1970 C 1 *
+bit 1969 I 1 IO_AD33
+bit 1968 O 1 IO_AD33 1967 1 Z
+bit 1967 C 1 *
+bit 1966 O 1 *
+bit 1965 O 1 *
+bit 1964 O 1 *
+bit 1963 O 1 *
+bit 1962 O 1 *
+bit 1961 O 1 *
+bit 1960 I 1 IO_AD29
+bit 1959 O 1 IO_AD29 1958 1 Z
+bit 1958 C 1 *
+bit 1957 I 1 IO_AD28
+bit 1956 O 1 IO_AD28 1955 1 Z
+bit 1955 C 1 *
+bit 1954 I 1 IO_AD26
+bit 1953 O 1 IO_AD26 1952 1 Z
+bit 1952 C 1 *
+bit 1951 I 1 IO_AD25
+bit 1950 O 1 IO_AD25 1949 1 Z
+bit 1949 C 1 *
+bit 1948 I 1 IO_AE34
+bit 1947 O 1 IO_AE34 1946 1 Z
+bit 1946 C 1 *
+bit 1945 I 1 IO_AE33
+bit 1944 O 1 IO_AE33 1943 1 Z
+bit 1943 C 1 *
+bit 1942 I 1 IO_AE32
+bit 1941 O 1 IO_AE32 1940 1 Z
+bit 1940 C 1 *
+bit 1939 I 1 IO_AE31
+bit 1938 O 1 IO_AE31 1937 1 Z
+bit 1937 C 1 *
+bit 1936 I 1 IO_AE30
+bit 1935 O 1 IO_AE30 1934 1 Z
+bit 1934 C 1 *
+bit 1933 I 1 IO_AE29
+bit 1932 O 1 IO_AE29 1931 1 Z
+bit 1931 C 1 *
+bit 1930 I 1 IO_AE28
+bit 1929 O 1 IO_AE28 1928 1 Z
+bit 1928 C 1 *
+bit 1927 I 1 IO_AE27
+bit 1926 O 1 IO_AE27 1925 1 Z
+bit 1925 C 1 *
+bit 1924 I 1 IO_AE26
+bit 1923 O 1 IO_AE26 1922 1 Z
+bit 1922 C 1 *
+bit 1921 I 1 IO_AF27
+bit 1920 O 1 IO_AF27 1919 1 Z
+bit 1919 C 1 *
+bit 1918 I 1 IO_AF33
+bit 1917 O 1 IO_AF33 1916 1 Z
+bit 1916 C 1 *
+bit 1915 I 1 IO_AF32
+bit 1914 O 1 IO_AF32 1913 1 Z
+bit 1913 C 1 *
+bit 1912 I 1 IO_AF31
+bit 1911 O 1 IO_AF31 1910 1 Z
+bit 1910 C 1 *
+bit 1909 I 1 IO_AG31
+bit 1908 O 1 IO_AG31 1907 1 Z
+bit 1907 C 1 *
+bit 1906 I 1 IO_AF29
+bit 1905 O 1 IO_AF29 1904 1 Z
+bit 1904 C 1 *
+bit 1903 I 1 IO_AF28
+bit 1902 O 1 IO_AF28 1901 1 Z
+bit 1901 C 1 *
+bit 1900 I 1 IO_AG34
+bit 1899 O 1 IO_AG34 1898 1 Z
+bit 1898 C 1 *
+bit 1897 I 1 IO_AG33
+bit 1896 O 1 IO_AG33 1895 1 Z
+bit 1895 C 1 *
+bit 1894 I 1 IO_AG30
+bit 1893 O 1 IO_AG30 1892 1 Z
+bit 1892 C 1 *
+bit 1891 I 1 IO_AG29
+bit 1890 O 1 IO_AG29 1889 1 Z
+bit 1889 C 1 *
+bit 1888 I 1 IO_AH34
+bit 1887 O 1 IO_AH34 1886 1 Z
+bit 1886 C 1 *
+bit 1885 O 1 *
+bit 1884 O 1 *
+bit 1883 O 1 *
+bit 1882 O 1 *
+bit 1881 O 1 *
+bit 1880 O 1 *
+bit 1879 I 1 IO_AH33
+bit 1878 O 1 IO_AH33 1877 1 Z
+bit 1877 C 1 *
+bit 1876 I 1 IO_AH32
+bit 1875 O 1 IO_AH32 1874 1 Z
+bit 1874 C 1 *
+bit 1873 I 1 IO_AH31
+bit 1872 O 1 IO_AH31 1871 1 Z
+bit 1871 C 1 *
+bit 1870 I 1 IO_AH30
+bit 1869 O 1 IO_AH30 1868 1 Z
+bit 1868 C 1 *
+bit 1867 I 1 IO_AH29
+bit 1866 O 1 IO_AH29 1865 1 Z
+bit 1865 C 1 *
+bit 1864 I 1 IO_AJ34
+bit 1863 O 1 IO_AJ34 1862 1 Z
+bit 1862 C 1 *
+bit 1861 I 1 IO_AJ33
+bit 1860 O 1 IO_AJ33 1859 1 Z
+bit 1859 C 1 *
+bit 1858 I 1 IO_AJ32
+bit 1857 O 1 IO_AJ32 1856 1 Z
+bit 1856 C 1 *
+bit 1855 I 1 IO_AJ31
+bit 1854 O 1 IO_AJ31 1853 1 Z
+bit 1853 C 1 *
+bit 1852 I 1 IO_AK33
+bit 1851 O 1 IO_AK33 1850 1 Z
+bit 1850 C 1 *
+bit 1849 I 1 IO_AK32
+bit 1848 O 1 IO_AK32 1847 1 Z
+bit 1847 C 1 *
+bit 1846 I 1 IO_AL34
+bit 1845 O 1 IO_AL34 1844 1 Z
+bit 1844 C 1 *
+bit 1843 I 1 IO_AL33
+bit 1842 O 1 IO_AL33 1841 1 Z
+bit 1841 C 1 *
+bit 1840 I 1 IO_AM34
+bit 1839 O 1 IO_AM34 1838 1 Z
+bit 1838 C 1 *
+bit 1837 I 1 IO_AM33
+bit 1836 O 1 IO_AM33 1835 1 Z
+bit 1835 C 1 *
+bit 1834 I 1 CCLK_AL31
+bit 1833 O 1 CCLK_AL31 1832 1 Z
+bit 1832 C 1 *
+bit 1831 I 1 DONE_AD24
+bit 1830 O 1 DONE_AD24 1829 1 Z
+bit 1829 C 1 *
+bit 1828 I 1 IO_AL30
+bit 1827 O 1 IO_AL30 1826 1 Z
+bit 1826 C 1 *
+bit 1825 I 1 IO_AN32
+bit 1824 O 1 IO_AN32 1823 1 Z
+bit 1823 C 1 *
+bit 1822 I 1 IO_AP32
+bit 1821 O 1 IO_AP32 1820 1 Z
+bit 1820 C 1 *
+bit 1819 I 1 IO_AN31
+bit 1818 O 1 IO_AN31 1817 1 Z
+bit 1817 C 1 *
+bit 1816 I 1 IO_AP31
+bit 1815 O 1 IO_AP31 1814 1 Z
+bit 1814 C 1 *
+bit 1813 I 1 IO_AJ29
+bit 1812 O 1 IO_AJ29 1811 1 Z
+bit 1811 C 1 *
+bit 1810 I 1 IO_AM30
+bit 1809 O 1 IO_AM30 1808 1 Z
+bit 1808 C 1 *
+bit 1807 I 1 IO_AN30
+bit 1806 O 1 IO_AN30 1805 1 Z
+bit 1805 C 1 *
+bit 1804 I 1 IO_AL29
+bit 1803 O 1 IO_AL29 1802 1 Z
+bit 1802 C 1 *
+bit 1801 I 1 IO_AM29
+bit 1800 O 1 IO_AM29 1799 1 Z
+bit 1799 C 1 *
+bit 1798 I 1 IO_AG27
+bit 1797 O 1 IO_AG27 1796 1 Z
+bit 1796 C 1 *
+bit 1795 I 1 IO_AN29
+bit 1794 O 1 IO_AN29 1793 1 Z
+bit 1793 C 1 *
+bit 1792 I 1 IO_AP29
+bit 1791 O 1 IO_AP29 1790 1 Z
+bit 1790 C 1 *
+bit 1789 I 1 IO_AJ28
+bit 1788 O 1 IO_AJ28 1787 1 Z
+bit 1787 C 1 *
+bit 1786 I 1 IO_AK28
+bit 1785 O 1 IO_AK28 1784 1 Z
+bit 1784 C 1 *
+bit 1783 I 1 IO_AJ27
+bit 1782 O 1 IO_AJ27 1781 1 Z
+bit 1781 C 1 *
+bit 1780 I 1 IO_AL28
+bit 1779 O 1 IO_AL28 1778 1 Z
+bit 1778 C 1 *
+bit 1777 I 1 IO_AM28
+bit 1776 O 1 IO_AM28 1775 1 Z
+bit 1775 C 1 *
+bit 1774 I 1 IO_AN28
+bit 1773 O 1 IO_AN28 1772 1 Z
+bit 1772 C 1 *
+bit 1771 I 1 IO_AP28
+bit 1770 O 1 IO_AP28 1769 1 Z
+bit 1769 C 1 *
+bit 1768 I 1 IO_AF26
+bit 1767 O 1 IO_AF26 1766 1 Z
+bit 1766 C 1 *
+bit 1765 I 1 IO_AK27
+bit 1764 O 1 IO_AK27 1763 1 Z
+bit 1763 C 1 *
+bit 1762 I 1 IO_AL27
+bit 1761 O 1 IO_AL27 1760 1 Z
+bit 1760 C 1 *
+bit 1759 I 1 IO_AN27
+bit 1758 O 1 IO_AN27 1757 1 Z
+bit 1757 C 1 *
+bit 1756 I 1 IO_AP27
+bit 1755 O 1 IO_AP27 1754 1 Z
+bit 1754 C 1 *
+bit 1753 I 1 IO_AG26
+bit 1752 O 1 IO_AG26 1751 1 Z
+bit 1751 C 1 *
+bit 1750 I 1 IO_AH26
+bit 1749 O 1 IO_AH26 1748 1 Z
+bit 1748 C 1 *
+bit 1747 I 1 IO_AJ26
+bit 1746 O 1 IO_AJ26 1745 1 Z
+bit 1745 C 1 *
+bit 1744 I 1 IO_AL26
+bit 1743 O 1 IO_AL26 1742 1 Z
+bit 1742 C 1 *
+bit 1741 I 1 IO_AM26
+bit 1740 O 1 IO_AM26 1739 1 Z
+bit 1739 C 1 *
+bit 1738 I 1 IO_AN26
+bit 1737 O 1 IO_AN26 1736 1 Z
+bit 1736 C 1 *
+bit 1735 I 1 IO_AF25
+bit 1734 O 1 IO_AF25 1733 1 Z
+bit 1733 C 1 *
+bit 1732 I 1 IO_AG25
+bit 1731 O 1 IO_AG25 1730 1 Z
+bit 1730 C 1 *
+bit 1729 I 1 IO_AH25
+bit 1728 O 1 IO_AH25 1727 1 Z
+bit 1727 C 1 *
+bit 1726 I 1 IO_AJ25
+bit 1725 O 1 IO_AJ25 1724 1 Z
+bit 1724 C 1 *
+bit 1723 I 1 IO_AK25
+bit 1722 O 1 IO_AK25 1721 1 Z
+bit 1721 C 1 *
+bit 1720 I 1 IO_AL25
+bit 1719 O 1 IO_AL25 1718 1 Z
+bit 1718 C 1 *
+bit 1717 I 1 IO_AM25
+bit 1716 O 1 IO_AM25 1715 1 Z
+bit 1715 C 1 *
+bit 1714 I 1 IO_AN25
+bit 1713 O 1 IO_AN25 1712 1 Z
+bit 1712 C 1 *
+bit 1711 I 1 IO_AP25
+bit 1710 O 1 IO_AP25 1709 1 Z
+bit 1709 C 1 *
+bit 1708 I 1 IO_AE24
+bit 1707 O 1 IO_AE24 1706 1 Z
+bit 1706 C 1 *
+bit 1705 I 1 IO_AH24
+bit 1704 O 1 IO_AH24 1703 1 Z
+bit 1703 C 1 *
+bit 1702 I 1 IO_AJ24
+bit 1701 O 1 IO_AJ24 1700 1 Z
+bit 1700 C 1 *
+bit 1699 I 1 IO_AN24
+bit 1698 O 1 IO_AN24 1697 1 Z
+bit 1697 C 1 *
+bit 1696 I 1 IO_AP24
+bit 1695 O 1 IO_AP24 1694 1 Z
+bit 1694 C 1 *
+bit 1693 I 1 IO_AF24
+bit 1692 O 1 IO_AF24 1691 1 Z
+bit 1691 C 1 *
+bit 1690 I 1 IO_AD23
+bit 1689 O 1 IO_AD23 1688 1 Z
+bit 1688 C 1 *
+bit 1687 I 1 IO_AE23
+bit 1686 O 1 IO_AE23 1685 1 Z
+bit 1685 C 1 *
+bit 1684 I 1 IO_AF23
+bit 1683 O 1 IO_AF23 1682 1 Z
+bit 1682 C 1 *
+bit 1681 I 1 IO_AG23
+bit 1680 O 1 IO_AG23 1679 1 Z
+bit 1679 C 1 *
+bit 1678 I 1 IO_AH23
+bit 1677 O 1 IO_AH23 1676 1 Z
+bit 1676 C 1 *
+bit 1675 I 1 IO_AJ23
+bit 1674 O 1 IO_AJ23 1673 1 Z
+bit 1673 C 1 *
+bit 1672 I 1 IO_AK23
+bit 1671 O 1 IO_AK23 1670 1 Z
+bit 1670 C 1 *
+bit 1669 I 1 IO_AL23
+bit 1668 O 1 IO_AL23 1667 1 Z
+bit 1667 C 1 *
+bit 1666 I 1 IO_AM23
+bit 1665 O 1 IO_AM23 1664 1 Z
+bit 1664 C 1 *
+bit 1663 I 1 IO_AD22
+bit 1662 O 1 IO_AD22 1661 1 Z
+bit 1661 C 1 *
+bit 1660 I 1 IO_AN23
+bit 1659 O 1 IO_AN23 1658 1 Z
+bit 1658 C 1 *
+bit 1657 I 1 IO_AP23
+bit 1656 O 1 IO_AP23 1655 1 Z
+bit 1655 C 1 *
+bit 1654 I 1 IO_AG22
+bit 1653 O 1 IO_AG22 1652 1 Z
+bit 1652 C 1 *
+bit 1651 I 1 IO_AH22
+bit 1650 O 1 IO_AH22 1649 1 Z
+bit 1649 C 1 *
+bit 1648 I 1 IO_AE22
+bit 1647 O 1 IO_AE22 1646 1 Z
+bit 1646 C 1 *
+bit 1645 I 1 IO_AL22
+bit 1644 O 1 IO_AL22 1643 1 Z
+bit 1643 C 1 *
+bit 1642 I 1 IO_AM22
+bit 1641 O 1 IO_AM22 1640 1 Z
+bit 1640 C 1 *
+bit 1639 I 1 IO_AD21
+bit 1638 O 1 IO_AD21 1637 1 Z
+bit 1637 C 1 *
+bit 1636 I 1 IO_AE21
+bit 1635 O 1 IO_AE21 1634 1 Z
+bit 1634 C 1 *
+bit 1633 I 1 IO_AF21
+bit 1632 O 1 IO_AF21 1631 1 Z
+bit 1631 C 1 *
+bit 1630 I 1 IO_AG21
+bit 1629 O 1 IO_AG21 1628 1 Z
+bit 1628 C 1 *
+bit 1627 I 1 IO_AH21
+bit 1626 O 1 IO_AH21 1625 1 Z
+bit 1625 C 1 *
+bit 1624 I 1 IO_AJ21
+bit 1623 O 1 IO_AJ21 1622 1 Z
+bit 1622 C 1 *
+bit 1621 I 1 IO_AK21
+bit 1620 O 1 IO_AK21 1619 1 Z
+bit 1619 C 1 *
+bit 1618 I 1 IO_AD20
+bit 1617 O 1 IO_AD20 1616 1 Z
+bit 1616 C 1 *
+bit 1615 I 1 IO_AL21
+bit 1614 O 1 IO_AL21 1613 1 Z
+bit 1613 C 1 *
+bit 1612 I 1 IO_AM21
+bit 1611 O 1 IO_AM21 1610 1 Z
+bit 1610 C 1 *
+bit 1609 I 1 IO_AN21
+bit 1608 O 1 IO_AN21 1607 1 Z
+bit 1607 C 1 *
+bit 1606 I 1 IO_AP21
+bit 1605 O 1 IO_AP21 1604 1 Z
+bit 1604 C 1 *
+bit 1603 I 1 IO_AD19
+bit 1602 O 1 IO_AD19 1601 1 Z
+bit 1601 C 1 *
+bit 1600 I 1 IO_AE20
+bit 1599 O 1 IO_AE20 1598 1 Z
+bit 1598 C 1 *
+bit 1597 I 1 IO_AF20
+bit 1596 O 1 IO_AF20 1595 1 Z
+bit 1595 C 1 *
+bit 1594 I 1 IO_AH20
+bit 1593 O 1 IO_AH20 1592 1 Z
+bit 1592 C 1 *
+bit 1591 I 1 IO_AJ20
+bit 1590 O 1 IO_AJ20 1589 1 Z
+bit 1589 C 1 *
+bit 1588 I 1 IO_AE19
+bit 1587 O 1 IO_AE19 1586 1 Z
+bit 1586 C 1 *
+bit 1585 I 1 IO_AL20
+bit 1584 O 1 IO_AL20 1583 1 Z
+bit 1583 C 1 *
+bit 1582 I 1 IO_AM20
+bit 1581 O 1 IO_AM20 1580 1 Z
+bit 1580 C 1 *
+bit 1579 I 1 IO_AN20
+bit 1578 O 1 IO_AN20 1577 1 Z
+bit 1577 C 1 *
+bit 1576 I 1 IO_AP20
+bit 1575 O 1 IO_AP20 1574 1 Z
+bit 1574 C 1 *
+bit 1573 I 1 IO_AD18
+bit 1572 O 1 IO_AD18 1571 1 Z
+bit 1571 C 1 *
+bit 1570 I 1 IO_AH19
+bit 1569 O 1 IO_AH19 1568 1 Z
+bit 1568 C 1 *
+bit 1567 I 1 IO_AJ19
+bit 1566 O 1 IO_AJ19 1565 1 Z
+bit 1565 C 1 *
+bit 1564 I 1 IO_AM19
+bit 1563 O 1 IO_AM19 1562 1 Z
+bit 1562 C 1 *
+bit 1561 I 1 IO_AN19
+bit 1560 O 1 IO_AN19 1559 1 Z
+bit 1559 C 1 *
+bit 1558 I 1 IO_AE18
+bit 1557 O 1 IO_AE18 1556 1 Z
+bit 1556 C 1 *
+bit 1555 I 1 IO_AF18
+bit 1554 O 1 IO_AF18 1553 1 Z
+bit 1553 C 1 *
+bit 1552 I 1 IO_AG18
+bit 1551 O 1 IO_AG18 1550 1 Z
+bit 1550 C 1 *
+bit 1549 I 1 IO_AH18
+bit 1548 O 1 IO_AH18 1547 1 Z
+bit 1547 C 1 *
+bit 1546 I 1 IO_AJ18
+bit 1545 O 1 IO_AJ18 1544 1 Z
+bit 1544 C 1 *
+bit 1543 I 1 IO_AK18
+bit 1542 O 1 IO_AK18 1541 1 Z
+bit 1541 C 1 *
+bit 1540 I 1 IO_AL18
+bit 1539 O 1 IO_AL18 1538 1 Z
+bit 1538 C 1 *
+bit 1537 I 1 IO_AM18
+bit 1536 O 1 IO_AM18 1535 1 Z
+bit 1535 C 1 *
+bit 1534 I 1 IO_AN18
+bit 1533 O 1 IO_AN18 1532 1 Z
+bit 1532 C 1 *
+bit 1531 I 1 IO_AP18
+bit 1530 O 1 IO_AP18 1529 1 Z
+bit 1529 C 1 *
+bit 1528 I 1 IO_AP17
+bit 1527 O 1 IO_AP17 1526 1 Z
+bit 1526 C 1 *
+bit 1525 I 1 IO_AN17
+bit 1524 O 1 IO_AN17 1523 1 Z
+bit 1523 C 1 *
+bit 1522 I 1 IO_AM17
+bit 1521 O 1 IO_AM17 1520 1 Z
+bit 1520 C 1 *
+bit 1519 I 1 IO_AL17
+bit 1518 O 1 IO_AL17 1517 1 Z
+bit 1517 C 1 *
+bit 1516 I 1 IO_AK17
+bit 1515 O 1 IO_AK17 1514 1 Z
+bit 1514 C 1 *
+bit 1513 I 1 IO_AJ17
+bit 1512 O 1 IO_AJ17 1511 1 Z
+bit 1511 C 1 *
+bit 1510 I 1 IO_AH17
+bit 1509 O 1 IO_AH17 1508 1 Z
+bit 1508 C 1 *
+bit 1507 I 1 IO_AG17
+bit 1506 O 1 IO_AG17 1505 1 Z
+bit 1505 C 1 *
+bit 1504 I 1 IO_AF17
+bit 1503 O 1 IO_AF17 1502 1 Z
+bit 1502 C 1 *
+bit 1501 I 1 IO_AE17
+bit 1500 O 1 IO_AE17 1499 1 Z
+bit 1499 C 1 *
+bit 1498 I 1 IO_AD17
+bit 1497 O 1 IO_AD17 1496 1 Z
+bit 1496 C 1 *
+bit 1495 I 1 IO_AN16
+bit 1494 O 1 IO_AN16 1493 1 Z
+bit 1493 C 1 *
+bit 1492 I 1 IO_AM16
+bit 1491 O 1 IO_AM16 1490 1 Z
+bit 1490 C 1 *
+bit 1489 I 1 IO_AJ16
+bit 1488 O 1 IO_AJ16 1487 1 Z
+bit 1487 C 1 *
+bit 1486 I 1 IO_AH16
+bit 1485 O 1 IO_AH16 1484 1 Z
+bit 1484 C 1 *
+bit 1483 I 1 IO_AE16
+bit 1482 O 1 IO_AE16 1481 1 Z
+bit 1481 C 1 *
+bit 1480 I 1 IO_AP15
+bit 1479 O 1 IO_AP15 1478 1 Z
+bit 1478 C 1 *
+bit 1477 I 1 IO_AN15
+bit 1476 O 1 IO_AN15 1475 1 Z
+bit 1475 C 1 *
+bit 1474 I 1 IO_AM15
+bit 1473 O 1 IO_AM15 1472 1 Z
+bit 1472 C 1 *
+bit 1471 I 1 IO_AL15
+bit 1470 O 1 IO_AL15 1469 1 Z
+bit 1469 C 1 *
+bit 1468 I 1 IO_AD16
+bit 1467 O 1 IO_AD16 1466 1 Z
+bit 1466 C 1 *
+bit 1465 I 1 IO_AJ15
+bit 1464 O 1 IO_AJ15 1463 1 Z
+bit 1463 C 1 *
+bit 1462 I 1 IO_AH15
+bit 1461 O 1 IO_AH15 1460 1 Z
+bit 1460 C 1 *
+bit 1459 I 1 IO_AF15
+bit 1458 O 1 IO_AF15 1457 1 Z
+bit 1457 C 1 *
+bit 1456 I 1 IO_AE15
+bit 1455 O 1 IO_AE15 1454 1 Z
+bit 1454 C 1 *
+bit 1453 I 1 IO_AD15
+bit 1452 O 1 IO_AD15 1451 1 Z
+bit 1451 C 1 *
+bit 1450 I 1 IO_AP14
+bit 1449 O 1 IO_AP14 1448 1 Z
+bit 1448 C 1 *
+bit 1447 I 1 IO_AN14
+bit 1446 O 1 IO_AN14 1445 1 Z
+bit 1445 C 1 *
+bit 1444 I 1 IO_AM14
+bit 1443 O 1 IO_AM14 1442 1 Z
+bit 1442 C 1 *
+bit 1441 I 1 IO_AL14
+bit 1440 O 1 IO_AL14 1439 1 Z
+bit 1439 C 1 *
+bit 1438 I 1 IO_AK14
+bit 1437 O 1 IO_AK14 1436 1 Z
+bit 1436 C 1 *
+bit 1435 I 1 IO_AJ14
+bit 1434 O 1 IO_AJ14 1433 1 Z
+bit 1433 C 1 *
+bit 1432 I 1 IO_AH14
+bit 1431 O 1 IO_AH14 1430 1 Z
+bit 1430 C 1 *
+bit 1429 I 1 IO_AG14
+bit 1428 O 1 IO_AG14 1427 1 Z
+bit 1427 C 1 *
+bit 1426 I 1 IO_AF14
+bit 1425 O 1 IO_AF14 1424 1 Z
+bit 1424 C 1 *
+bit 1423 I 1 IO_AE14
+bit 1422 O 1 IO_AE14 1421 1 Z
+bit 1421 C 1 *
+bit 1420 I 1 IO_AM13
+bit 1419 O 1 IO_AM13 1418 1 Z
+bit 1418 C 1 *
+bit 1417 I 1 IO_AL13
+bit 1416 O 1 IO_AL13 1415 1 Z
+bit 1415 C 1 *
+bit 1414 I 1 IO_AH13
+bit 1413 O 1 IO_AH13 1412 1 Z
+bit 1412 C 1 *
+bit 1411 I 1 IO_AG13
+bit 1410 O 1 IO_AG13 1409 1 Z
+bit 1409 C 1 *
+bit 1408 I 1 IO_AD14
+bit 1407 O 1 IO_AD14 1406 1 Z
+bit 1406 C 1 *
+bit 1405 I 1 IO_AE13
+bit 1404 O 1 IO_AE13 1403 1 Z
+bit 1403 C 1 *
+bit 1402 I 1 IO_AD13
+bit 1401 O 1 IO_AD13 1400 1 Z
+bit 1400 C 1 *
+bit 1399 I 1 IO_AP12
+bit 1398 O 1 IO_AP12 1397 1 Z
+bit 1397 C 1 *
+bit 1396 I 1 IO_AN12
+bit 1395 O 1 IO_AN12 1394 1 Z
+bit 1394 C 1 *
+bit 1393 I 1 IO_AM12
+bit 1392 O 1 IO_AM12 1391 1 Z
+bit 1391 C 1 *
+bit 1390 I 1 IO_AL12
+bit 1389 O 1 IO_AL12 1388 1 Z
+bit 1388 C 1 *
+bit 1387 I 1 IO_AK12
+bit 1386 O 1 IO_AK12 1385 1 Z
+bit 1385 C 1 *
+bit 1384 I 1 IO_AJ12
+bit 1383 O 1 IO_AJ12 1382 1 Z
+bit 1382 C 1 *
+bit 1381 I 1 IO_AH12
+bit 1380 O 1 IO_AH12 1379 1 Z
+bit 1379 C 1 *
+bit 1378 I 1 IO_AG12
+bit 1377 O 1 IO_AG12 1376 1 Z
+bit 1376 C 1 *
+bit 1375 I 1 IO_AF12
+bit 1374 O 1 IO_AF12 1373 1 Z
+bit 1373 C 1 *
+bit 1372 I 1 IO_AE12
+bit 1371 O 1 IO_AE12 1370 1 Z
+bit 1370 C 1 *
+bit 1369 I 1 IO_AP11
+bit 1368 O 1 IO_AP11 1367 1 Z
+bit 1367 C 1 *
+bit 1366 I 1 IO_AN11
+bit 1365 O 1 IO_AN11 1364 1 Z
+bit 1364 C 1 *
+bit 1363 I 1 IO_AD12
+bit 1362 O 1 IO_AD12 1361 1 Z
+bit 1361 C 1 *
+bit 1360 I 1 IO_AJ11
+bit 1359 O 1 IO_AJ11 1358 1 Z
+bit 1358 C 1 *
+bit 1357 I 1 IO_AH11
+bit 1356 O 1 IO_AH11 1355 1 Z
+bit 1355 C 1 *
+bit 1354 I 1 IO_AF11
+bit 1353 O 1 IO_AF11 1352 1 Z
+bit 1352 C 1 *
+bit 1351 I 1 IO_AE11
+bit 1350 O 1 IO_AE11 1349 1 Z
+bit 1349 C 1 *
+bit 1348 I 1 IO_AD11
+bit 1347 O 1 IO_AD11 1346 1 Z
+bit 1346 C 1 *
+bit 1345 I 1 IO_AP10
+bit 1344 O 1 IO_AP10 1343 1 Z
+bit 1343 C 1 *
+bit 1342 I 1 IO_AN10
+bit 1341 O 1 IO_AN10 1340 1 Z
+bit 1340 C 1 *
+bit 1339 I 1 IO_AM10
+bit 1338 O 1 IO_AM10 1337 1 Z
+bit 1337 C 1 *
+bit 1336 I 1 IO_AL10
+bit 1335 O 1 IO_AL10 1334 1 Z
+bit 1334 C 1 *
+bit 1333 I 1 IO_AK10
+bit 1332 O 1 IO_AK10 1331 1 Z
+bit 1331 C 1 *
+bit 1330 I 1 IO_AJ10
+bit 1329 O 1 IO_AJ10 1328 1 Z
+bit 1328 C 1 *
+bit 1327 I 1 IO_AH10
+bit 1326 O 1 IO_AH10 1325 1 Z
+bit 1325 C 1 *
+bit 1324 I 1 IO_AG10
+bit 1323 O 1 IO_AG10 1322 1 Z
+bit 1322 C 1 *
+bit 1321 I 1 IO_AF10
+bit 1320 O 1 IO_AF10 1319 1 Z
+bit 1319 C 1 *
+bit 1318 I 1 IO_AN9
+bit 1317 O 1 IO_AN9 1316 1 Z
+bit 1316 C 1 *
+bit 1315 I 1 IO_AM9
+bit 1314 O 1 IO_AM9 1313 1 Z
+bit 1313 C 1 *
+bit 1312 I 1 IO_AL9
+bit 1311 O 1 IO_AL9 1310 1 Z
+bit 1310 C 1 *
+bit 1309 I 1 IO_AJ9
+bit 1308 O 1 IO_AJ9 1307 1 Z
+bit 1307 C 1 *
+bit 1306 I 1 IO_AH9
+bit 1305 O 1 IO_AH9 1304 1 Z
+bit 1304 C 1 *
+bit 1303 I 1 IO_AG9
+bit 1302 O 1 IO_AG9 1301 1 Z
+bit 1301 C 1 *
+bit 1300 I 1 IO_AP8
+bit 1299 O 1 IO_AP8 1298 1 Z
+bit 1298 C 1 *
+bit 1297 I 1 IO_AN8
+bit 1296 O 1 IO_AN8 1295 1 Z
+bit 1295 C 1 *
+bit 1294 I 1 IO_AL8
+bit 1293 O 1 IO_AL8 1292 1 Z
+bit 1292 C 1 *
+bit 1291 I 1 IO_AK8
+bit 1290 O 1 IO_AK8 1289 1 Z
+bit 1289 C 1 *
+bit 1288 I 1 IO_AF9
+bit 1287 O 1 IO_AF9 1286 1 Z
+bit 1286 C 1 *
+bit 1285 I 1 IO_AP7
+bit 1284 O 1 IO_AP7 1283 1 Z
+bit 1283 C 1 *
+bit 1282 I 1 IO_AN7
+bit 1281 O 1 IO_AN7 1280 1 Z
+bit 1280 C 1 *
+bit 1279 I 1 IO_AM7
+bit 1278 O 1 IO_AM7 1277 1 Z
+bit 1277 C 1 *
+bit 1276 I 1 IO_AL7
+bit 1275 O 1 IO_AL7 1274 1 Z
+bit 1274 C 1 *
+bit 1273 I 1 IO_AJ8
+bit 1272 O 1 IO_AJ8 1271 1 Z
+bit 1271 C 1 *
+bit 1270 I 1 IO_AK7
+bit 1269 O 1 IO_AK7 1268 1 Z
+bit 1268 C 1 *
+bit 1267 I 1 IO_AJ7
+bit 1266 O 1 IO_AJ7 1265 1 Z
+bit 1265 C 1 *
+bit 1264 I 1 IO_AP6
+bit 1263 O 1 IO_AP6 1262 1 Z
+bit 1262 C 1 *
+bit 1261 I 1 IO_AN6
+bit 1260 O 1 IO_AN6 1259 1 Z
+bit 1259 C 1 *
+bit 1258 I 1 IO_AJ6
+bit 1257 O 1 IO_AJ6 1256 1 Z
+bit 1256 C 1 *
+bit 1255 I 1 IO_AM6
+bit 1254 O 1 IO_AM6 1253 1 Z
+bit 1253 C 1 *
+bit 1252 I 1 IO_AL6
+bit 1251 O 1 IO_AL6 1250 1 Z
+bit 1250 C 1 *
+bit 1249 I 1 IO_AN5
+bit 1248 O 1 IO_AN5 1247 1 Z
+bit 1247 C 1 *
+bit 1246 I 1 IO_AM5
+bit 1245 O 1 IO_AM5 1244 1 Z
+bit 1244 C 1 *
+bit 1243 I 1 IO_AL5
+bit 1242 O 1 IO_AL5 1241 1 Z
+bit 1241 C 1 *
+bit 1240 I 1 IO_AP4
+bit 1239 O 1 IO_AP4 1238 1 Z
+bit 1238 C 1 *
+bit 1237 I 1 IO_AN4
+bit 1236 O 1 IO_AN4 1235 1 Z
+bit 1235 C 1 *
+bit 1234 I 1 IO_AP3
+bit 1233 O 1 IO_AP3 1232 1 Z
+bit 1232 C 1 *
+bit 1231 I 1 IO_AN3
+bit 1230 O 1 IO_AN3 1229 1 Z
+bit 1229 C 1 *
+bit 1228 I 1 M2_AG8
+bit 1227 I 1 M0_AL4
+bit 1226 I 1 M1_AK4
+bit 1225 I 1 IO_AM2
+bit 1224 O 1 IO_AM2 1223 1 Z
+bit 1223 C 1 *
+bit 1222 I 1 IO_AM1
+bit 1221 O 1 IO_AM1 1220 1 Z
+bit 1220 C 1 *
+bit 1219 I 1 IO_AL2
+bit 1218 O 1 IO_AL2 1217 1 Z
+bit 1217 C 1 *
+bit 1216 I 1 IO_AL1
+bit 1215 O 1 IO_AL1 1214 1 Z
+bit 1214 C 1 *
+bit 1213 I 1 IO_AK3
+bit 1212 O 1 IO_AK3 1211 1 Z
+bit 1211 C 1 *
+bit 1210 I 1 IO_AK2
+bit 1209 O 1 IO_AK2 1208 1 Z
+bit 1208 C 1 *
+bit 1207 I 1 IO_AJ4
+bit 1206 O 1 IO_AJ4 1205 1 Z
+bit 1205 C 1 *
+bit 1204 I 1 IO_AJ3
+bit 1203 O 1 IO_AJ3 1202 1 Z
+bit 1202 C 1 *
+bit 1201 I 1 IO_AJ2
+bit 1200 O 1 IO_AJ2 1199 1 Z
+bit 1199 C 1 *
+bit 1198 I 1 IO_AJ1
+bit 1197 O 1 IO_AJ1 1196 1 Z
+bit 1196 C 1 *
+bit 1195 I 1 IO_AH6
+bit 1194 O 1 IO_AH6 1193 1 Z
+bit 1193 C 1 *
+bit 1192 I 1 IO_AH5
+bit 1191 O 1 IO_AH5 1190 1 Z
+bit 1190 C 1 *
+bit 1189 I 1 IO_AH4
+bit 1188 O 1 IO_AH4 1187 1 Z
+bit 1187 C 1 *
+bit 1186 I 1 IO_AH3
+bit 1185 O 1 IO_AH3 1184 1 Z
+bit 1184 C 1 *
+bit 1183 I 1 IO_AH2
+bit 1182 O 1 IO_AH2 1181 1 Z
+bit 1181 C 1 *
+bit 1180 O 1 *
+bit 1179 O 1 *
+bit 1178 O 1 *
+bit 1177 O 1 *
+bit 1176 O 1 *
+bit 1175 O 1 *
+bit 1174 I 1 IO_AH1
+bit 1173 O 1 IO_AH1 1172 1 Z
+bit 1172 C 1 *
+bit 1171 I 1 IO_AG6
+bit 1170 O 1 IO_AG6 1169 1 Z
+bit 1169 C 1 *
+bit 1168 I 1 IO_AG5
+bit 1167 O 1 IO_AG5 1166 1 Z
+bit 1166 C 1 *
+bit 1165 I 1 IO_AG2
+bit 1164 O 1 IO_AG2 1163 1 Z
+bit 1163 C 1 *
+bit 1162 I 1 IO_AG1
+bit 1161 O 1 IO_AG1 1160 1 Z
+bit 1160 C 1 *
+bit 1159 I 1 IO_AF7
+bit 1158 O 1 IO_AF7 1157 1 Z
+bit 1157 C 1 *
+bit 1156 I 1 IO_AF6
+bit 1155 O 1 IO_AF6 1154 1 Z
+bit 1154 C 1 *
+bit 1153 I 1 IO_AG4
+bit 1152 O 1 IO_AG4 1151 1 Z
+bit 1151 C 1 *
+bit 1150 I 1 IO_AF4
+bit 1149 O 1 IO_AF4 1148 1 Z
+bit 1148 C 1 *
+bit 1147 I 1 IO_AF3
+bit 1146 O 1 IO_AF3 1145 1 Z
+bit 1145 C 1 *
+bit 1144 I 1 IO_AF2
+bit 1143 O 1 IO_AF2 1142 1 Z
+bit 1142 C 1 *
+bit 1141 I 1 IO_AF8
+bit 1140 O 1 IO_AF8 1139 1 Z
+bit 1139 C 1 *
+bit 1138 I 1 IO_AE9
+bit 1137 O 1 IO_AE9 1136 1 Z
+bit 1136 C 1 *
+bit 1135 I 1 IO_AE8
+bit 1134 O 1 IO_AE8 1133 1 Z
+bit 1133 C 1 *
+bit 1132 I 1 IO_AE7
+bit 1131 O 1 IO_AE7 1130 1 Z
+bit 1130 C 1 *
+bit 1129 I 1 IO_AE6
+bit 1128 O 1 IO_AE6 1127 1 Z
+bit 1127 C 1 *
+bit 1126 I 1 IO_AE5
+bit 1125 O 1 IO_AE5 1124 1 Z
+bit 1124 C 1 *
+bit 1123 I 1 IO_AE4
+bit 1122 O 1 IO_AE4 1121 1 Z
+bit 1121 C 1 *
+bit 1120 I 1 IO_AE3
+bit 1119 O 1 IO_AE3 1118 1 Z
+bit 1118 C 1 *
+bit 1117 I 1 IO_AE2
+bit 1116 O 1 IO_AE2 1115 1 Z
+bit 1115 C 1 *
+bit 1114 I 1 IO_AE1
+bit 1113 O 1 IO_AE1 1112 1 Z
+bit 1112 C 1 *
+bit 1111 I 1 IO_AD10
+bit 1110 O 1 IO_AD10 1109 1 Z
+bit 1109 C 1 *
+bit 1108 I 1 IO_AD9
+bit 1107 O 1 IO_AD9 1106 1 Z
+bit 1106 C 1 *
+bit 1105 I 1 IO_AD7
+bit 1104 O 1 IO_AD7 1103 1 Z
+bit 1103 C 1 *
+bit 1102 I 1 IO_AD6
+bit 1101 O 1 IO_AD6 1100 1 Z
+bit 1100 C 1 *
+bit 1099 O 1 *
+bit 1098 O 1 *
+bit 1097 O 1 *
+bit 1096 O 1 *
+bit 1095 O 1 *
+bit 1094 O 1 *
+bit 1093 I 1 IO_AD2
+bit 1092 O 1 IO_AD2 1091 1 Z
+bit 1091 C 1 *
+bit 1090 I 1 IO_AD1
+bit 1089 O 1 IO_AD1 1088 1 Z
+bit 1088 C 1 *
+bit 1087 I 1 IO_AC11
+bit 1086 O 1 IO_AC11 1085 1 Z
+bit 1085 C 1 *
+bit 1084 I 1 IO_AC10
+bit 1083 O 1 IO_AC10 1082 1 Z
+bit 1082 C 1 *
+bit 1081 I 1 IO_AC8
+bit 1080 O 1 IO_AC8 1079 1 Z
+bit 1079 C 1 *
+bit 1078 I 1 IO_AC7
+bit 1077 O 1 IO_AC7 1076 1 Z
+bit 1076 C 1 *
+bit 1075 I 1 IO_AC6
+bit 1074 O 1 IO_AC6 1073 1 Z
+bit 1073 C 1 *
+bit 1072 I 1 IO_AC5
+bit 1071 O 1 IO_AC5 1070 1 Z
+bit 1070 C 1 *
+bit 1069 I 1 IO_AC4
+bit 1068 O 1 IO_AC4 1067 1 Z
+bit 1067 C 1 *
+bit 1066 I 1 IO_AC3
+bit 1065 O 1 IO_AC3 1064 1 Z
+bit 1064 C 1 *
+bit 1063 I 1 IO_AC2
+bit 1062 O 1 IO_AC2 1061 1 Z
+bit 1061 C 1 *
+bit 1060 I 1 IO_AC1
+bit 1059 O 1 IO_AC1 1058 1 Z
+bit 1058 C 1 *
+bit 1057 I 1 IO_AC9
+bit 1056 O 1 IO_AC9 1055 1 Z
+bit 1055 C 1 *
+bit 1054 I 1 IO_AB10
+bit 1053 O 1 IO_AB10 1052 1 Z
+bit 1052 C 1 *
+bit 1051 I 1 IO_AB8
+bit 1050 O 1 IO_AB8 1049 1 Z
+bit 1049 C 1 *
+bit 1048 I 1 IO_AB7
+bit 1047 O 1 IO_AB7 1046 1 Z
+bit 1046 C 1 *
+bit 1045 I 1 IO_AB4
+bit 1044 O 1 IO_AB4 1043 1 Z
+bit 1043 C 1 *
+bit 1042 I 1 IO_AB3
+bit 1041 O 1 IO_AB3 1040 1 Z
+bit 1040 C 1 *
+bit 1039 I 1 IO_AB11
+bit 1038 O 1 IO_AB11 1037 1 Z
+bit 1037 C 1 *
+bit 1036 I 1 IO_AA11
+bit 1035 O 1 IO_AA11 1034 1 Z
+bit 1034 C 1 *
+bit 1033 I 1 IO_AA10
+bit 1032 O 1 IO_AA10 1031 1 Z
+bit 1031 C 1 *
+bit 1030 I 1 IO_AA9
+bit 1029 O 1 IO_AA9 1028 1 Z
+bit 1028 C 1 *
+bit 1027 O 1 *
+bit 1026 O 1 *
+bit 1025 O 1 *
+bit 1024 O 1 *
+bit 1023 O 1 *
+bit 1022 O 1 *
+bit 1021 I 1 IO_AA8
+bit 1020 O 1 IO_AA8 1019 1 Z
+bit 1019 C 1 *
+bit 1018 I 1 IO_AA7
+bit 1017 O 1 IO_AA7 1016 1 Z
+bit 1016 C 1 *
+bit 1015 I 1 IO_AA6
+bit 1014 O 1 IO_AA6 1013 1 Z
+bit 1013 C 1 *
+bit 1012 I 1 IO_AA5
+bit 1011 O 1 IO_AA5 1010 1 Z
+bit 1010 C 1 *
+bit 1009 I 1 IO_AA4
+bit 1008 O 1 IO_AA4 1007 1 Z
+bit 1007 C 1 *
+bit 1006 I 1 IO_AA3
+bit 1005 O 1 IO_AA3 1004 1 Z
+bit 1004 C 1 *
+bit 1003 I 1 IO_AA2
+bit 1002 O 1 IO_AA2 1001 1 Z
+bit 1001 C 1 *
+bit 1000 I 1 IO_AA1
+bit 999 O 1 IO_AA1 998 1 Z
+bit 998 C 1 *
+bit 997 I 1 IO_Y11
+bit 996 O 1 IO_Y11 995 1 Z
+bit 995 C 1 *
+bit 994 I 1 IO_Y10
+bit 993 O 1 IO_Y10 992 1 Z
+bit 992 C 1 *
+bit 991 I 1 IO_Y7
+bit 990 O 1 IO_Y7 989 1 Z
+bit 989 C 1 *
+bit 988 I 1 IO_Y6
+bit 987 O 1 IO_Y6 986 1 Z
+bit 986 C 1 *
+bit 985 I 1 IO_Y4
+bit 984 O 1 IO_Y4 983 1 Z
+bit 983 C 1 *
+bit 982 I 1 IO_Y3
+bit 981 O 1 IO_Y3 980 1 Z
+bit 980 C 1 *
+bit 979 I 1 IO_Y2
+bit 978 O 1 IO_Y2 977 1 Z
+bit 977 C 1 *
+bit 976 I 1 IO_Y1
+bit 975 O 1 IO_Y1 974 1 Z
+bit 974 C 1 *
+bit 973 I 1 IO_Y9
+bit 972 O 1 IO_Y9 971 1 Z
+bit 971 C 1 *
+bit 970 I 1 IO_W10
+bit 969 O 1 IO_W10 968 1 Z
+bit 968 C 1 *
+bit 967 I 1 IO_W7
+bit 966 O 1 IO_W7 965 1 Z
+bit 965 C 1 *
+bit 964 I 1 IO_W6
+bit 963 O 1 IO_W6 962 1 Z
+bit 962 C 1 *
+bit 961 I 1 IO_W3
+bit 960 O 1 IO_W3 959 1 Z
+bit 959 C 1 *
+bit 958 I 1 IO_W2
+bit 957 O 1 IO_W2 956 1 Z
+bit 956 C 1 *
+bit 955 I 1 IO_W11
+bit 954 O 1 IO_W11 953 1 Z
+bit 953 C 1 *
+bit 952 I 1 IO_V11
+bit 951 O 1 IO_V11 950 1 Z
+bit 950 C 1 *
+bit 949 I 1 IO_V10
+bit 948 O 1 IO_V10 947 1 Z
+bit 947 C 1 *
+bit 946 O 1 *
+bit 945 O 1 *
+bit 944 O 1 *
+bit 943 O 1 *
+bit 942 O 1 *
+bit 941 O 1 *
+bit 940 I 1 IO_V9
+bit 939 O 1 IO_V9 938 1 Z
+bit 938 C 1 *
+bit 937 I 1 IO_V8
+bit 936 O 1 IO_V8 935 1 Z
+bit 935 C 1 *
+bit 934 I 1 IO_V7
+bit 933 O 1 IO_V7 932 1 Z
+bit 932 C 1 *
+bit 931 I 1 IO_V6
+bit 930 O 1 IO_V6 929 1 Z
+bit 929 C 1 *
+bit 928 I 1 IO_V5
+bit 927 O 1 IO_V5 926 1 Z
+bit 926 C 1 *
+bit 925 I 1 IO_V4
+bit 924 O 1 IO_V4 923 1 Z
+bit 923 C 1 *
+bit 922 I 1 IO_V3
+bit 921 O 1 IO_V3 920 1 Z
+bit 920 C 1 *
+bit 919 I 1 IO_V2
+bit 918 O 1 IO_V2 917 1 Z
+bit 917 C 1 *
+bit 916 I 1 IO_V1
+bit 915 O 1 IO_V1 914 1 Z
+bit 914 C 1 *
+bit 913 I 1 IO_U1
+bit 912 O 1 IO_U1 911 1 Z
+bit 911 C 1 *
+bit 910 I 1 IO_U2
+bit 909 O 1 IO_U2 908 1 Z
+bit 908 C 1 *
+bit 907 I 1 IO_U3
+bit 906 O 1 IO_U3 905 1 Z
+bit 905 C 1 *
+bit 904 I 1 IO_U4
+bit 903 O 1 IO_U4 902 1 Z
+bit 902 C 1 *
+bit 901 I 1 IO_U5
+bit 900 O 1 IO_U5 899 1 Z
+bit 899 C 1 *
+bit 898 I 1 IO_U6
+bit 897 O 1 IO_U6 896 1 Z
+bit 896 C 1 *
+bit 895 I 1 IO_U7
+bit 894 O 1 IO_U7 893 1 Z
+bit 893 C 1 *
+bit 892 I 1 IO_U8
+bit 891 O 1 IO_U8 890 1 Z
+bit 890 C 1 *
+bit 889 I 1 IO_U9
+bit 888 O 1 IO_U9 887 1 Z
+bit 887 C 1 *
+bit 886 O 1 *
+bit 885 O 1 *
+bit 884 O 1 *
+bit 883 O 1 *
+bit 882 O 1 *
+bit 881 O 1 *
+bit 880 I 1 IO_U10
+bit 879 O 1 IO_U10 878 1 Z
+bit 878 C 1 *
+bit 877 I 1 IO_U11
+bit 876 O 1 IO_U11 875 1 Z
+bit 875 C 1 *
+bit 874 I 1 IO_T11
+bit 873 O 1 IO_T11 872 1 Z
+bit 872 C 1 *
+bit 871 I 1 IO_T2
+bit 870 O 1 IO_T2 869 1 Z
+bit 869 C 1 *
+bit 868 I 1 IO_T3
+bit 867 O 1 IO_T3 866 1 Z
+bit 866 C 1 *
+bit 865 I 1 IO_T6
+bit 864 O 1 IO_T6 863 1 Z
+bit 863 C 1 *
+bit 862 I 1 IO_T7
+bit 861 O 1 IO_T7 860 1 Z
+bit 860 C 1 *
+bit 859 I 1 IO_T10
+bit 858 O 1 IO_T10 857 1 Z
+bit 857 C 1 *
+bit 856 I 1 IO_R9
+bit 855 O 1 IO_R9 854 1 Z
+bit 854 C 1 *
+bit 853 I 1 IO_R1
+bit 852 O 1 IO_R1 851 1 Z
+bit 851 C 1 *
+bit 850 I 1 IO_R2
+bit 849 O 1 IO_R2 848 1 Z
+bit 848 C 1 *
+bit 847 I 1 IO_R3
+bit 846 O 1 IO_R3 845 1 Z
+bit 845 C 1 *
+bit 844 I 1 IO_R4
+bit 843 O 1 IO_R4 842 1 Z
+bit 842 C 1 *
+bit 841 I 1 IO_R6
+bit 840 O 1 IO_R6 839 1 Z
+bit 839 C 1 *
+bit 838 I 1 IO_R7
+bit 837 O 1 IO_R7 836 1 Z
+bit 836 C 1 *
+bit 835 I 1 IO_R10
+bit 834 O 1 IO_R10 833 1 Z
+bit 833 C 1 *
+bit 832 I 1 IO_R11
+bit 831 O 1 IO_R11 830 1 Z
+bit 830 C 1 *
+bit 829 I 1 IO_P1
+bit 828 O 1 IO_P1 827 1 Z
+bit 827 C 1 *
+bit 826 I 1 IO_P2
+bit 825 O 1 IO_P2 824 1 Z
+bit 824 C 1 *
+bit 823 I 1 IO_P3
+bit 822 O 1 IO_P3 821 1 Z
+bit 821 C 1 *
+bit 820 I 1 IO_P4
+bit 819 O 1 IO_P4 818 1 Z
+bit 818 C 1 *
+bit 817 I 1 IO_P5
+bit 816 O 1 IO_P5 815 1 Z
+bit 815 C 1 *
+bit 814 I 1 IO_P6
+bit 813 O 1 IO_P6 812 1 Z
+bit 812 C 1 *
+bit 811 I 1 IO_P7
+bit 810 O 1 IO_P7 809 1 Z
+bit 809 C 1 *
+bit 808 I 1 IO_P8
+bit 807 O 1 IO_P8 806 1 Z
+bit 806 C 1 *
+bit 805 O 1 *
+bit 804 O 1 *
+bit 803 O 1 *
+bit 802 O 1 *
+bit 801 O 1 *
+bit 800 O 1 *
+bit 799 I 1 IO_P9
+bit 798 O 1 IO_P9 797 1 Z
+bit 797 C 1 *
+bit 796 I 1 IO_P10
+bit 795 O 1 IO_P10 794 1 Z
+bit 794 C 1 *
+bit 793 I 1 IO_P11
+bit 792 O 1 IO_P11 791 1 Z
+bit 791 C 1 *
+bit 790 I 1 IO_N11
+bit 789 O 1 IO_N11 788 1 Z
+bit 788 C 1 *
+bit 787 I 1 IO_N3
+bit 786 O 1 IO_N3 785 1 Z
+bit 785 C 1 *
+bit 784 I 1 IO_N4
+bit 783 O 1 IO_N4 782 1 Z
+bit 782 C 1 *
+bit 781 I 1 IO_N7
+bit 780 O 1 IO_N7 779 1 Z
+bit 779 C 1 *
+bit 778 I 1 IO_N8
+bit 777 O 1 IO_N8 776 1 Z
+bit 776 C 1 *
+bit 775 I 1 IO_N10
+bit 774 O 1 IO_N10 773 1 Z
+bit 773 C 1 *
+bit 772 I 1 IO_M9
+bit 771 O 1 IO_M9 770 1 Z
+bit 770 C 1 *
+bit 769 I 1 IO_M1
+bit 768 O 1 IO_M1 767 1 Z
+bit 767 C 1 *
+bit 766 I 1 IO_M2
+bit 765 O 1 IO_M2 764 1 Z
+bit 764 C 1 *
+bit 763 I 1 IO_M3
+bit 762 O 1 IO_M3 761 1 Z
+bit 761 C 1 *
+bit 760 I 1 IO_M4
+bit 759 O 1 IO_M4 758 1 Z
+bit 758 C 1 *
+bit 757 I 1 IO_M5
+bit 756 O 1 IO_M5 755 1 Z
+bit 755 C 1 *
+bit 754 I 1 IO_M6
+bit 753 O 1 IO_M6 752 1 Z
+bit 752 C 1 *
+bit 751 I 1 IO_M7
+bit 750 O 1 IO_M7 749 1 Z
+bit 749 C 1 *
+bit 748 I 1 IO_M8
+bit 747 O 1 IO_M8 746 1 Z
+bit 746 C 1 *
+bit 745 I 1 IO_M10
+bit 744 O 1 IO_M10 743 1 Z
+bit 743 C 1 *
+bit 742 I 1 IO_M11
+bit 741 O 1 IO_M11 740 1 Z
+bit 740 C 1 *
+bit 739 I 1 IO_L1
+bit 738 O 1 IO_L1 737 1 Z
+bit 737 C 1 *
+bit 736 I 1 IO_L2
+bit 735 O 1 IO_L2 734 1 Z
+bit 734 C 1 *
+bit 733 O 1 *
+bit 732 O 1 *
+bit 731 O 1 *
+bit 730 O 1 *
+bit 729 O 1 *
+bit 728 O 1 *
+bit 727 I 1 IO_L6
+bit 726 O 1 IO_L6 725 1 Z
+bit 725 C 1 *
+bit 724 I 1 IO_L7
+bit 723 O 1 IO_L7 722 1 Z
+bit 722 C 1 *
+bit 721 I 1 IO_L9
+bit 720 O 1 IO_L9 719 1 Z
+bit 719 C 1 *
+bit 718 I 1 IO_L10
+bit 717 O 1 IO_L10 716 1 Z
+bit 716 C 1 *
+bit 715 I 1 IO_K1
+bit 714 O 1 IO_K1 713 1 Z
+bit 713 C 1 *
+bit 712 I 1 IO_K2
+bit 711 O 1 IO_K2 710 1 Z
+bit 710 C 1 *
+bit 709 I 1 IO_K3
+bit 708 O 1 IO_K3 707 1 Z
+bit 707 C 1 *
+bit 706 I 1 IO_K4
+bit 705 O 1 IO_K4 704 1 Z
+bit 704 C 1 *
+bit 703 I 1 IO_K5
+bit 702 O 1 IO_K5 701 1 Z
+bit 701 C 1 *
+bit 700 I 1 IO_K6
+bit 699 O 1 IO_K6 698 1 Z
+bit 698 C 1 *
+bit 697 I 1 IO_K7
+bit 696 O 1 IO_K7 695 1 Z
+bit 695 C 1 *
+bit 694 I 1 IO_K8
+bit 693 O 1 IO_K8 692 1 Z
+bit 692 C 1 *
+bit 691 I 1 IO_K9
+bit 690 O 1 IO_K9 689 1 Z
+bit 689 C 1 *
+bit 688 I 1 IO_J8
+bit 687 O 1 IO_J8 686 1 Z
+bit 686 C 1 *
+bit 685 I 1 IO_J2
+bit 684 O 1 IO_J2 683 1 Z
+bit 683 C 1 *
+bit 682 I 1 IO_J3
+bit 681 O 1 IO_J3 680 1 Z
+bit 680 C 1 *
+bit 679 I 1 IO_J4
+bit 678 O 1 IO_J4 677 1 Z
+bit 677 C 1 *
+bit 676 I 1 IO_H4
+bit 675 O 1 IO_H4 674 1 Z
+bit 674 C 1 *
+bit 673 I 1 IO_J6
+bit 672 O 1 IO_J6 671 1 Z
+bit 671 C 1 *
+bit 670 I 1 IO_J7
+bit 669 O 1 IO_J7 668 1 Z
+bit 668 C 1 *
+bit 667 I 1 IO_H1
+bit 666 O 1 IO_H1 665 1 Z
+bit 665 C 1 *
+bit 664 I 1 IO_H2
+bit 663 O 1 IO_H2 662 1 Z
+bit 662 C 1 *
+bit 661 I 1 IO_H5
+bit 660 O 1 IO_H5 659 1 Z
+bit 659 C 1 *
+bit 658 I 1 IO_H6
+bit 657 O 1 IO_H6 656 1 Z
+bit 656 C 1 *
+bit 655 I 1 IO_G1
+bit 654 O 1 IO_G1 653 1 Z
+bit 653 C 1 *
+bit 652 O 1 *
+bit 651 O 1 *
+bit 650 O 1 *
+bit 649 O 1 *
+bit 648 O 1 *
+bit 647 O 1 *
+bit 646 I 1 IO_G2
+bit 645 O 1 IO_G2 644 1 Z
+bit 644 C 1 *
+bit 643 I 1 IO_G3
+bit 642 O 1 IO_G3 641 1 Z
+bit 641 C 1 *
+bit 640 I 1 IO_G4
+bit 639 O 1 IO_G4 638 1 Z
+bit 638 C 1 *
+bit 637 I 1 IO_G5
+bit 636 O 1 IO_G5 635 1 Z
+bit 635 C 1 *
+bit 634 I 1 IO_G6
+bit 633 O 1 IO_G6 632 1 Z
+bit 632 C 1 *
+bit 631 I 1 IO_F1
+bit 630 O 1 IO_F1 629 1 Z
+bit 629 C 1 *
+bit 628 I 1 IO_F2
+bit 627 O 1 IO_F2 626 1 Z
+bit 626 C 1 *
+bit 625 I 1 IO_F3
+bit 624 O 1 IO_F3 623 1 Z
+bit 623 C 1 *
+bit 622 I 1 IO_F4
+bit 621 O 1 IO_F4 620 1 Z
+bit 620 C 1 *
+bit 619 I 1 IO_E2
+bit 618 O 1 IO_E2 617 1 Z
+bit 617 C 1 *
+bit 616 I 1 IO_E3
+bit 615 O 1 IO_E3 614 1 Z
+bit 614 C 1 *
+bit 613 I 1 IO_D1
+bit 612 O 1 IO_D1 611 1 Z
+bit 611 C 1 *
+bit 610 I 1 IO_D2
+bit 609 O 1 IO_D2 608 1 Z
+bit 608 C 1 *
+bit 607 I 1 IO_C1
+bit 606 O 1 IO_C1 605 1 Z
+bit 605 C 1 *
+bit 604 I 1 IO_C2
+bit 603 O 1 IO_C2 602 1 Z
+bit 602 C 1 *
+bit 601 O 1 *
+bit 600 I 1 HSWAP_EN_L11
+bit 599 I 1 IO_D5
+bit 598 O 1 IO_D5 597 1 Z
+bit 597 C 1 *
+bit 596 I 1 IO_B3
+bit 595 O 1 IO_B3 594 1 Z
+bit 594 C 1 *
+bit 593 I 1 IO_A3
+bit 592 O 1 IO_A3 591 1 Z
+bit 591 C 1 *
+bit 590 I 1 IO_B4
+bit 589 O 1 IO_B4 588 1 Z
+bit 588 C 1 *
+bit 587 I 1 IO_A4
+bit 586 O 1 IO_A4 585 1 Z
+bit 585 C 1 *
+bit 584 I 1 IO_F6
+bit 583 O 1 IO_F6 582 1 Z
+bit 582 C 1 *
+bit 581 I 1 IO_C5
+bit 580 O 1 IO_C5 579 1 Z
+bit 579 C 1 *
+bit 578 I 1 IO_B5
+bit 577 O 1 IO_B5 576 1 Z
+bit 576 C 1 *
+bit 575 I 1 IO_D6
+bit 574 O 1 IO_D6 573 1 Z
+bit 573 C 1 *
+bit 572 I 1 IO_C6
+bit 571 O 1 IO_C6 570 1 Z
+bit 570 C 1 *
+bit 569 I 1 IO_H8
+bit 568 O 1 IO_H8 567 1 Z
+bit 567 C 1 *
+bit 566 I 1 IO_B6
+bit 565 O 1 IO_B6 564 1 Z
+bit 564 C 1 *
+bit 563 I 1 IO_A6
+bit 562 O 1 IO_A6 561 1 Z
+bit 561 C 1 *
+bit 560 I 1 IO_F7
+bit 559 O 1 IO_F7 558 1 Z
+bit 558 C 1 *
+bit 557 I 1 IO_E7
+bit 556 O 1 IO_E7 555 1 Z
+bit 555 C 1 *
+bit 554 I 1 IO_F8
+bit 553 O 1 IO_F8 552 1 Z
+bit 552 C 1 *
+bit 551 I 1 IO_D7
+bit 550 O 1 IO_D7 549 1 Z
+bit 549 C 1 *
+bit 548 I 1 IO_C7
+bit 547 O 1 IO_C7 546 1 Z
+bit 546 C 1 *
+bit 545 I 1 IO_B7
+bit 544 O 1 IO_B7 543 1 Z
+bit 543 C 1 *
+bit 542 I 1 IO_A7
+bit 541 O 1 IO_A7 540 1 Z
+bit 540 C 1 *
+bit 539 I 1 IO_J9
+bit 538 O 1 IO_J9 537 1 Z
+bit 537 C 1 *
+bit 536 I 1 IO_E8
+bit 535 O 1 IO_E8 534 1 Z
+bit 534 C 1 *
+bit 533 I 1 IO_D8
+bit 532 O 1 IO_D8 531 1 Z
+bit 531 C 1 *
+bit 530 I 1 IO_B8
+bit 529 O 1 IO_B8 528 1 Z
+bit 528 C 1 *
+bit 527 I 1 IO_A8
+bit 526 O 1 IO_A8 525 1 Z
+bit 525 C 1 *
+bit 524 I 1 IO_H9
+bit 523 O 1 IO_H9 522 1 Z
+bit 522 C 1 *
+bit 521 I 1 IO_G9
+bit 520 O 1 IO_G9 519 1 Z
+bit 519 C 1 *
+bit 518 I 1 IO_F9
+bit 517 O 1 IO_F9 516 1 Z
+bit 516 C 1 *
+bit 515 I 1 IO_D9
+bit 514 O 1 IO_D9 513 1 Z
+bit 513 C 1 *
+bit 512 I 1 IO_C9
+bit 511 O 1 IO_C9 510 1 Z
+bit 510 C 1 *
+bit 509 I 1 IO_B9
+bit 508 O 1 IO_B9 507 1 Z
+bit 507 C 1 *
+bit 506 I 1 IO_J10
+bit 505 O 1 IO_J10 504 1 Z
+bit 504 C 1 *
+bit 503 I 1 IO_H10
+bit 502 O 1 IO_H10 501 1 Z
+bit 501 C 1 *
+bit 500 I 1 IO_G10
+bit 499 O 1 IO_G10 498 1 Z
+bit 498 C 1 *
+bit 497 I 1 IO_F10
+bit 496 O 1 IO_F10 495 1 Z
+bit 495 C 1 *
+bit 494 I 1 IO_E10
+bit 493 O 1 IO_E10 492 1 Z
+bit 492 C 1 *
+bit 491 I 1 IO_D10
+bit 490 O 1 IO_D10 489 1 Z
+bit 489 C 1 *
+bit 488 I 1 IO_C10
+bit 487 O 1 IO_C10 486 1 Z
+bit 486 C 1 *
+bit 485 I 1 IO_B10
+bit 484 O 1 IO_B10 483 1 Z
+bit 483 C 1 *
+bit 482 I 1 IO_A10
+bit 481 O 1 IO_A10 480 1 Z
+bit 480 C 1 *
+bit 479 I 1 IO_K11
+bit 478 O 1 IO_K11 477 1 Z
+bit 477 C 1 *
+bit 476 I 1 IO_G11
+bit 475 O 1 IO_G11 474 1 Z
+bit 474 C 1 *
+bit 473 I 1 IO_F11
+bit 472 O 1 IO_F11 471 1 Z
+bit 471 C 1 *
+bit 470 I 1 IO_B11
+bit 469 O 1 IO_B11 468 1 Z
+bit 468 C 1 *
+bit 467 I 1 IO_A11
+bit 466 O 1 IO_A11 465 1 Z
+bit 465 C 1 *
+bit 464 I 1 IO_J11
+bit 463 O 1 IO_J11 462 1 Z
+bit 462 C 1 *
+bit 461 I 1 IO_L12
+bit 460 O 1 IO_L12 459 1 Z
+bit 459 C 1 *
+bit 458 I 1 IO_K12
+bit 457 O 1 IO_K12 456 1 Z
+bit 456 C 1 *
+bit 455 I 1 IO_J12
+bit 454 O 1 IO_J12 453 1 Z
+bit 453 C 1 *
+bit 452 I 1 IO_H12
+bit 451 O 1 IO_H12 450 1 Z
+bit 450 C 1 *
+bit 449 I 1 IO_G12
+bit 448 O 1 IO_G12 447 1 Z
+bit 447 C 1 *
+bit 446 I 1 IO_F12
+bit 445 O 1 IO_F12 444 1 Z
+bit 444 C 1 *
+bit 443 I 1 IO_E12
+bit 442 O 1 IO_E12 441 1 Z
+bit 441 C 1 *
+bit 440 I 1 IO_D12
+bit 439 O 1 IO_D12 438 1 Z
+bit 438 C 1 *
+bit 437 I 1 IO_C12
+bit 436 O 1 IO_C12 435 1 Z
+bit 435 C 1 *
+bit 434 I 1 IO_L13
+bit 433 O 1 IO_L13 432 1 Z
+bit 432 C 1 *
+bit 431 I 1 IO_B12
+bit 430 O 1 IO_B12 429 1 Z
+bit 429 C 1 *
+bit 428 I 1 IO_A12
+bit 427 O 1 IO_A12 426 1 Z
+bit 426 C 1 *
+bit 425 I 1 IO_H13
+bit 424 O 1 IO_H13 423 1 Z
+bit 423 C 1 *
+bit 422 I 1 IO_G13
+bit 421 O 1 IO_G13 420 1 Z
+bit 420 C 1 *
+bit 419 I 1 IO_K13
+bit 418 O 1 IO_K13 417 1 Z
+bit 417 C 1 *
+bit 416 I 1 IO_D13
+bit 415 O 1 IO_D13 414 1 Z
+bit 414 C 1 *
+bit 413 I 1 IO_C13
+bit 412 O 1 IO_C13 411 1 Z
+bit 411 C 1 *
+bit 410 I 1 IO_L14
+bit 409 O 1 IO_L14 408 1 Z
+bit 408 C 1 *
+bit 407 I 1 IO_K14
+bit 406 O 1 IO_K14 405 1 Z
+bit 405 C 1 *
+bit 404 I 1 IO_J14
+bit 403 O 1 IO_J14 402 1 Z
+bit 402 C 1 *
+bit 401 I 1 IO_H14
+bit 400 O 1 IO_H14 399 1 Z
+bit 399 C 1 *
+bit 398 I 1 IO_G14
+bit 397 O 1 IO_G14 396 1 Z
+bit 396 C 1 *
+bit 395 I 1 IO_F14
+bit 394 O 1 IO_F14 393 1 Z
+bit 393 C 1 *
+bit 392 I 1 IO_E14
+bit 391 O 1 IO_E14 390 1 Z
+bit 390 C 1 *
+bit 389 I 1 IO_L15
+bit 388 O 1 IO_L15 387 1 Z
+bit 387 C 1 *
+bit 386 I 1 IO_D14
+bit 385 O 1 IO_D14 384 1 Z
+bit 384 C 1 *
+bit 383 I 1 IO_C14
+bit 382 O 1 IO_C14 381 1 Z
+bit 381 C 1 *
+bit 380 I 1 IO_B14
+bit 379 O 1 IO_B14 378 1 Z
+bit 378 C 1 *
+bit 377 I 1 IO_A14
+bit 376 O 1 IO_A14 375 1 Z
+bit 375 C 1 *
+bit 374 I 1 IO_L16
+bit 373 O 1 IO_L16 372 1 Z
+bit 372 C 1 *
+bit 371 I 1 IO_K15
+bit 370 O 1 IO_K15 369 1 Z
+bit 369 C 1 *
+bit 368 I 1 IO_J15
+bit 367 O 1 IO_J15 366 1 Z
+bit 366 C 1 *
+bit 365 I 1 IO_G15
+bit 364 O 1 IO_G15 363 1 Z
+bit 363 C 1 *
+bit 362 I 1 IO_F15
+bit 361 O 1 IO_F15 360 1 Z
+bit 360 C 1 *
+bit 359 I 1 IO_K16
+bit 358 O 1 IO_K16 357 1 Z
+bit 357 C 1 *
+bit 356 I 1 IO_D15
+bit 355 O 1 IO_D15 354 1 Z
+bit 354 C 1 *
+bit 353 I 1 IO_C15
+bit 352 O 1 IO_C15 351 1 Z
+bit 351 C 1 *
+bit 350 I 1 IO_B15
+bit 349 O 1 IO_B15 348 1 Z
+bit 348 C 1 *
+bit 347 I 1 IO_A15
+bit 346 O 1 IO_A15 345 1 Z
+bit 345 C 1 *
+bit 344 I 1 IO_L17
+bit 343 O 1 IO_L17 342 1 Z
+bit 342 C 1 *
+bit 341 I 1 IO_G16
+bit 340 O 1 IO_G16 339 1 Z
+bit 339 C 1 *
+bit 338 I 1 IO_F16
+bit 337 O 1 IO_F16 336 1 Z
+bit 336 C 1 *
+bit 335 I 1 IO_C16
+bit 334 O 1 IO_C16 333 1 Z
+bit 333 C 1 *
+bit 332 I 1 IO_B16
+bit 331 O 1 IO_B16 330 1 Z
+bit 330 C 1 *
+bit 329 I 1 IO_K17
+bit 328 O 1 IO_K17 327 1 Z
+bit 327 C 1 *
+bit 326 I 1 IO_J17
+bit 325 O 1 IO_J17 324 1 Z
+bit 324 C 1 *
+bit 323 I 1 IO_H17
+bit 322 O 1 IO_H17 321 1 Z
+bit 321 C 1 *
+bit 320 I 1 IO_G17
+bit 319 O 1 IO_G17 318 1 Z
+bit 318 C 1 *
+bit 317 I 1 IO_F17
+bit 316 O 1 IO_F17 315 1 Z
+bit 315 C 1 *
+bit 314 I 1 IO_E17
+bit 313 O 1 IO_E17 312 1 Z
+bit 312 C 1 *
+bit 311 I 1 IO_D17
+bit 310 O 1 IO_D17 309 1 Z
+bit 309 C 1 *
+bit 308 I 1 IO_C17
+bit 307 O 1 IO_C17 306 1 Z
+bit 306 C 1 *
+bit 305 I 1 IO_B17
+bit 304 O 1 IO_B17 303 1 Z
+bit 303 C 1 *
+bit 302 I 1 IO_A17
+bit 301 O 1 IO_A17 300 1 Z
+bit 300 C 1 *
+bit 299 I 1 IO_A18
+bit 298 O 1 IO_A18 297 1 Z
+bit 297 C 1 *
+bit 296 I 1 IO_B18
+bit 295 O 1 IO_B18 294 1 Z
+bit 294 C 1 *
+bit 293 I 1 IO_C18
+bit 292 O 1 IO_C18 291 1 Z
+bit 291 C 1 *
+bit 290 I 1 IO_D18
+bit 289 O 1 IO_D18 288 1 Z
+bit 288 C 1 *
+bit 287 I 1 IO_E18
+bit 286 O 1 IO_E18 285 1 Z
+bit 285 C 1 *
+bit 284 I 1 IO_F18
+bit 283 O 1 IO_F18 282 1 Z
+bit 282 C 1 *
+bit 281 I 1 IO_G18
+bit 280 O 1 IO_G18 279 1 Z
+bit 279 C 1 *
+bit 278 I 1 IO_H18
+bit 277 O 1 IO_H18 276 1 Z
+bit 276 C 1 *
+bit 275 I 1 IO_J18
+bit 274 O 1 IO_J18 273 1 Z
+bit 273 C 1 *
+bit 272 I 1 IO_K18
+bit 271 O 1 IO_K18 270 1 Z
+bit 270 C 1 *
+bit 269 I 1 IO_L18
+bit 268 O 1 IO_L18 267 1 Z
+bit 267 C 1 *
+bit 266 I 1 IO_B19
+bit 265 O 1 IO_B19 264 1 Z
+bit 264 C 1 *
+bit 263 I 1 IO_C19
+bit 262 O 1 IO_C19 261 1 Z
+bit 261 C 1 *
+bit 260 I 1 IO_F19
+bit 259 O 1 IO_F19 258 1 Z
+bit 258 C 1 *
+bit 257 I 1 IO_G19
+bit 256 O 1 IO_G19 255 1 Z
+bit 255 C 1 *
+bit 254 I 1 IO_K19
+bit 253 O 1 IO_K19 252 1 Z
+bit 252 C 1 *
+bit 251 I 1 IO_A20
+bit 250 O 1 IO_A20 249 1 Z
+bit 249 C 1 *
+bit 248 I 1 IO_B20
+bit 247 O 1 IO_B20 246 1 Z
+bit 246 C 1 *
+bit 245 I 1 IO_C20
+bit 244 O 1 IO_C20 243 1 Z
+bit 243 C 1 *
+bit 242 I 1 IO_D20
+bit 241 O 1 IO_D20 240 1 Z
+bit 240 C 1 *
+bit 239 I 1 IO_L19
+bit 238 O 1 IO_L19 237 1 Z
+bit 237 C 1 *
+bit 236 I 1 IO_F20
+bit 235 O 1 IO_F20 234 1 Z
+bit 234 C 1 *
+bit 233 I 1 IO_G20
+bit 232 O 1 IO_G20 231 1 Z
+bit 231 C 1 *
+bit 230 I 1 IO_J20
+bit 229 O 1 IO_J20 228 1 Z
+bit 228 C 1 *
+bit 227 I 1 IO_K20
+bit 226 O 1 IO_K20 225 1 Z
+bit 225 C 1 *
+bit 224 I 1 IO_L20
+bit 223 O 1 IO_L20 222 1 Z
+bit 222 C 1 *
+bit 221 I 1 IO_A21
+bit 220 O 1 IO_A21 219 1 Z
+bit 219 C 1 *
+bit 218 I 1 IO_B21
+bit 217 O 1 IO_B21 216 1 Z
+bit 216 C 1 *
+bit 215 I 1 IO_C21
+bit 214 O 1 IO_C21 213 1 Z
+bit 213 C 1 *
+bit 212 I 1 IO_D21
+bit 211 O 1 IO_D21 210 1 Z
+bit 210 C 1 *
+bit 209 I 1 IO_E21
+bit 208 O 1 IO_E21 207 1 Z
+bit 207 C 1 *
+bit 206 I 1 IO_F21
+bit 205 O 1 IO_F21 204 1 Z
+bit 204 C 1 *
+bit 203 I 1 IO_G21
+bit 202 O 1 IO_G21 201 1 Z
+bit 201 C 1 *
+bit 200 I 1 IO_H21
+bit 199 O 1 IO_H21 198 1 Z
+bit 198 C 1 *
+bit 197 I 1 IO_J21
+bit 196 O 1 IO_J21 195 1 Z
+bit 195 C 1 *
+bit 194 I 1 IO_K21
+bit 193 O 1 IO_K21 192 1 Z
+bit 192 C 1 *
+bit 191 I 1 IO_C22
+bit 190 O 1 IO_C22 189 1 Z
+bit 189 C 1 *
+bit 188 I 1 IO_D22
+bit 187 O 1 IO_D22 186 1 Z
+bit 186 C 1 *
+bit 185 I 1 IO_G22
+bit 184 O 1 IO_G22 183 1 Z
+bit 183 C 1 *
+bit 182 I 1 IO_H22
+bit 181 O 1 IO_H22 180 1 Z
+bit 180 C 1 *
+bit 179 I 1 IO_L21
+bit 178 O 1 IO_L21 177 1 Z
+bit 177 C 1 *
+bit 176 I 1 IO_K22
+bit 175 O 1 IO_K22 174 1 Z
+bit 174 C 1 *
+bit 173 I 1 IO_L22
+bit 172 O 1 IO_L22 171 1 Z
+bit 171 C 1 *
+bit 170 I 1 IO_A23
+bit 169 O 1 IO_A23 168 1 Z
+bit 168 C 1 *
+bit 167 I 1 IO_B23
+bit 166 O 1 IO_B23 165 1 Z
+bit 165 C 1 *
+bit 164 I 1 IO_C23
+bit 163 O 1 IO_C23 162 1 Z
+bit 162 C 1 *
+bit 161 I 1 IO_D23
+bit 160 O 1 IO_D23 159 1 Z
+bit 159 C 1 *
+bit 158 I 1 IO_E23
+bit 157 O 1 IO_E23 156 1 Z
+bit 156 C 1 *
+bit 155 I 1 IO_F23
+bit 154 O 1 IO_F23 153 1 Z
+bit 153 C 1 *
+bit 152 I 1 IO_G23
+bit 151 O 1 IO_G23 150 1 Z
+bit 150 C 1 *
+bit 149 I 1 IO_H23
+bit 148 O 1 IO_H23 147 1 Z
+bit 147 C 1 *
+bit 146 I 1 IO_J23
+bit 145 O 1 IO_J23 144 1 Z
+bit 144 C 1 *
+bit 143 I 1 IO_K23
+bit 142 O 1 IO_K23 141 1 Z
+bit 141 C 1 *
+bit 140 I 1 IO_A24
+bit 139 O 1 IO_A24 138 1 Z
+bit 138 C 1 *
+bit 137 I 1 IO_B24
+bit 136 O 1 IO_B24 135 1 Z
+bit 135 C 1 *
+bit 134 I 1 IO_L23
+bit 133 O 1 IO_L23 132 1 Z
+bit 132 C 1 *
+bit 131 I 1 IO_F24
+bit 130 O 1 IO_F24 129 1 Z
+bit 129 C 1 *
+bit 128 I 1 IO_G24
+bit 127 O 1 IO_G24 126 1 Z
+bit 126 C 1 *
+bit 125 I 1 IO_J24
+bit 124 O 1 IO_J24 123 1 Z
+bit 123 C 1 *
+bit 122 I 1 IO_K24
+bit 121 O 1 IO_K24 120 1 Z
+bit 120 C 1 *
+bit 119 I 1 IO_L24
+bit 118 O 1 IO_L24 117 1 Z
+bit 117 C 1 *
+bit 116 I 1 IO_A25
+bit 115 O 1 IO_A25 114 1 Z
+bit 114 C 1 *
+bit 113 I 1 IO_B25
+bit 112 O 1 IO_B25 111 1 Z
+bit 111 C 1 *
+bit 110 I 1 IO_C25
+bit 109 O 1 IO_C25 108 1 Z
+bit 108 C 1 *
+bit 107 I 1 IO_D25
+bit 106 O 1 IO_D25 105 1 Z
+bit 105 C 1 *
+bit 104 I 1 IO_E25
+bit 103 O 1 IO_E25 102 1 Z
+bit 102 C 1 *
+bit 101 I 1 IO_F25
+bit 100 O 1 IO_F25 99 1 Z
+bit 99 C 1 *
+bit 98 I 1 IO_G25
+bit 97 O 1 IO_G25 96 1 Z
+bit 96 C 1 *
+bit 95 I 1 IO_H25
+bit 94 O 1 IO_H25 93 1 Z
+bit 93 C 1 *
+bit 92 I 1 IO_J25
+bit 91 O 1 IO_J25 90 1 Z
+bit 90 C 1 *
+bit 89 I 1 IO_B26
+bit 88 O 1 IO_B26 87 1 Z
+bit 87 C 1 *
+bit 86 I 1 IO_C26
+bit 85 O 1 IO_C26 84 1 Z
+bit 84 C 1 *
+bit 83 I 1 IO_D26
+bit 82 O 1 IO_D26 81 1 Z
+bit 81 C 1 *
+bit 80 I 1 IO_F26
+bit 79 O 1 IO_F26 78 1 Z
+bit 78 C 1 *
+bit 77 I 1 IO_G26
+bit 76 O 1 IO_G26 75 1 Z
+bit 75 C 1 *
+bit 74 I 1 IO_H26
+bit 73 O 1 IO_H26 72 1 Z
+bit 72 C 1 *
+bit 71 I 1 IO_A27
+bit 70 O 1 IO_A27 69 1 Z
+bit 69 C 1 *
+bit 68 I 1 IO_B27
+bit 67 O 1 IO_B27 66 1 Z
+bit 66 C 1 *
+bit 65 I 1 IO_D27
+bit 64 O 1 IO_D27 63 1 Z
+bit 63 C 1 *
+bit 62 I 1 IO_E27
+bit 61 O 1 IO_E27 60 1 Z
+bit 60 C 1 *
+bit 59 I 1 IO_J26
+bit 58 O 1 IO_J26 57 1 Z
+bit 57 C 1 *
+bit 56 I 1 IO_A28
+bit 55 O 1 IO_A28 54 1 Z
+bit 54 C 1 *
+bit 53 I 1 IO_B28
+bit 52 O 1 IO_B28 51 1 Z
+bit 51 C 1 *
+bit 50 I 1 IO_C28
+bit 49 O 1 IO_C28 48 1 Z
+bit 48 C 1 *
+bit 47 I 1 IO_D28
+bit 46 O 1 IO_D28 45 1 Z
+bit 45 C 1 *
+bit 44 I 1 IO_F27
+bit 43 O 1 IO_F27 42 1 Z
+bit 42 C 1 *
+bit 41 I 1 IO_E28
+bit 40 O 1 IO_E28 39 1 Z
+bit 39 C 1 *
+bit 38 I 1 IO_F28
+bit 37 O 1 IO_F28 36 1 Z
+bit 36 C 1 *
+bit 35 I 1 IO_A29
+bit 34 O 1 IO_A29 33 1 Z
+bit 33 C 1 *
+bit 32 I 1 IO_B29
+bit 31 O 1 IO_B29 30 1 Z
+bit 30 C 1 *
+bit 29 I 1 IO_F29
+bit 28 O 1 IO_F29 27 1 Z
+bit 27 C 1 *
+bit 26 I 1 IO_C29
+bit 25 O 1 IO_C29 24 1 Z
+bit 24 C 1 *
+bit 23 I 1 IO_D29
+bit 22 O 1 IO_D29 21 1 Z
+bit 21 C 1 *
+bit 20 I 1 IO_B30
+bit 19 O 1 IO_B30 18 1 Z
+bit 18 C 1 *
+bit 17 I 1 IO_C30
+bit 16 O 1 IO_C30 15 1 Z
+bit 15 C 1 *
+bit 14 I 1 IO_D30
+bit 13 O 1 IO_D30 12 1 Z
+bit 12 C 1 *
+bit 11 I 1 IO_A31
+bit 10 O 1 IO_A31 9 1 Z
+bit 9 C 1 *
+bit 8 I 1 IO_B31
+bit 7 O 1 IO_B31 6 1 Z
+bit 6 C 1 *
+bit 5 I 1 IO_A32
+bit 4 O 1 IO_A32 3 1 Z
+bit 3 C 1 *
+bit 2 I 1 IO_B32
+bit 1 O 1 IO_B32 0 1 Z
+bit 0 C 1 *
--- /dev/null
+signal GND1
+signal GND2
+signal GND3
+signal GND4
+signal GND5
+signal GND6
+signal GND7
+signal GND8
+signal GND9
+signal GND10
+signal GND11
+signal GND12
+signal GND13
+signal GND14
+signal GND15
+signal GND16
+signal GND17
+signal GND18
+signal GND19
+signal GND20
+signal GND21
+signal GND22
+signal GND23
+signal GND24
+signal GND25
+signal GND26
+signal GND27
+signal GND28
+signal GND29
+signal GND30
+signal GND31
+signal GND32
+signal GND33
+signal GND34
+signal GND35
+signal GND36
+signal GND37
+signal GND38
+signal GND39
+signal GND40
+signal GND41
+signal GND42
+signal GND43
+signal GND44
+signal GND45
+signal GND46
+signal GND47
+signal GND48
+signal GND49
+signal GND50
+signal GND51
+signal GND52
+signal GND53
+signal GND54
+signal GND55
+signal GND56
+signal GND57
+signal GND58
+signal GND59
+signal GND60
+signal GND61
+signal GND62
+signal GND63
+signal GND64
+signal GND65
+signal GND66
+signal GND67
+signal GND68
+signal GND69
+signal GND70
+signal GND71
+signal GND72
+signal GND73
+signal GND74
+signal GND75
+signal GND76
+signal GND77
+signal GND78
+signal GND79
+signal GND80
+signal GND81
+signal GND82
+signal GND83
+signal GND84
+signal GND85
+signal GND86
+signal GND87
+signal GND88
+signal GND89
+signal GND90
+signal GND91
+signal GND92
+signal GND93
+signal GND94
+signal GND95
+signal GND96
+signal GND97
+signal GND98
+signal GND99
+signal GND100
+signal GND101
+signal GND102
+signal GND103
+signal GND104
+signal GND105
+signal GND106
+signal GND107
+signal GND108
+signal GND109
+signal GND110
+signal GND111
+signal GND112
+signal GND113
+signal GND114
+signal GND115
+signal GND116
+signal GND117
+signal GND118
+signal GND119
+signal GND120
+signal CCLK_AH28
+signal DONE_AJ28
+signal HSWAP_EN_A3
+signal M0_AJ3
+signal M1_AH3
+signal M2_AK3
+signal PROG_B
+signal TCK
+signal TDI
+signal TDO
+signal TMS
+signal VCCAUX1
+signal VCCAUX2
+signal VCCAUX3
+signal VCCAUX4
+signal VCCAUX5
+signal VCCAUX6
+signal VCCAUX7
+signal VCCAUX8
+signal VCCAUX9
+signal VCCAUX10
+signal VCCAUX11
+signal VCCAUX12
+signal VCCAUX13
+signal VCCAUX14
+signal VCCAUX15
+signal VCCAUX16
+signal VCCAUX17
+signal VCCAUX18
+signal VCCAUX19
+signal VCCAUX20
+signal VCCAUX21
+signal VCCAUX22
+signal VCCAUX23
+signal VCCAUX24
+signal VCCINT1
+signal VCCINT2
+signal VCCINT3
+signal VCCINT4
+signal VCCINT5
+signal VCCINT6
+signal VCCINT7
+signal VCCINT8
+signal VCCINT9
+signal VCCINT10
+signal VCCINT11
+signal VCCINT12
+signal VCCINT13
+signal VCCINT14
+signal VCCINT15
+signal VCCINT16
+signal VCCINT17
+signal VCCINT18
+signal VCCINT19
+signal VCCINT20
+signal VCCINT21
+signal VCCINT22
+signal VCCINT23
+signal VCCINT24
+signal VCCINT25
+signal VCCINT26
+signal VCCINT27
+signal VCCINT28
+signal VCCINT29
+signal VCCINT30
+signal VCCINT31
+signal VCCINT32
+signal VCCO01
+signal VCCO02
+signal VCCO03
+signal VCCO04
+signal VCCO05
+signal VCCO06
+signal VCCO07
+signal VCCO08
+signal VCCO09
+signal VCCO010
+signal VCCO11
+signal VCCO12
+signal VCCO13
+signal VCCO14
+signal VCCO15
+signal VCCO16
+signal VCCO17
+signal VCCO18
+signal VCCO19
+signal VCCO110
+signal VCCO21
+signal VCCO22
+signal VCCO23
+signal VCCO24
+signal VCCO25
+signal VCCO26
+signal VCCO27
+signal VCCO28
+signal VCCO29
+signal VCCO210
+signal VCCO31
+signal VCCO32
+signal VCCO33
+signal VCCO34
+signal VCCO35
+signal VCCO36
+signal VCCO37
+signal VCCO38
+signal VCCO39
+signal VCCO310
+signal VCCO41
+signal VCCO42
+signal VCCO43
+signal VCCO44
+signal VCCO45
+signal VCCO46
+signal VCCO47
+signal VCCO48
+signal VCCO49
+signal VCCO410
+signal VCCO51
+signal VCCO52
+signal VCCO53
+signal VCCO54
+signal VCCO55
+signal VCCO56
+signal VCCO57
+signal VCCO58
+signal VCCO59
+signal VCCO510
+signal VCCO61
+signal VCCO62
+signal VCCO63
+signal VCCO64
+signal VCCO65
+signal VCCO66
+signal VCCO67
+signal VCCO68
+signal VCCO69
+signal VCCO610
+signal VCCO71
+signal VCCO72
+signal VCCO73
+signal VCCO74
+signal VCCO75
+signal VCCO76
+signal VCCO77
+signal VCCO78
+signal VCCO79
+signal VCCO710
+signal IO_A4
+signal IO_A5
+signal IO_A7
+signal IO_A8
+signal IO_A9
+signal IO_A11
+signal IO_A12
+signal IO_A13
+signal IO_A15
+signal IO_A16
+signal IO_A18
+signal IO_A19
+signal IO_A20
+signal IO_A22
+signal IO_A23
+signal IO_A24
+signal IO_A26
+signal IO_A27
+signal IO_B4
+signal IO_B5
+signal IO_B6
+signal IO_B7
+signal IO_B8
+signal IO_B9
+signal IO_B10
+signal IO_B11
+signal IO_B12
+signal IO_B13
+signal IO_B14
+signal IO_B15
+signal IO_B16
+signal IO_B17
+signal IO_B18
+signal IO_B19
+signal IO_B20
+signal IO_B21
+signal IO_B22
+signal IO_B23
+signal IO_B24
+signal IO_B25
+signal IO_B26
+signal IO_B27
+signal IO_C1
+signal IO_C2
+signal IO_C4
+signal IO_C6
+signal IO_C7
+signal IO_C8
+signal IO_C10
+signal IO_C11
+signal IO_C12
+signal IO_C14
+signal IO_C15
+signal IO_C16
+signal IO_C17
+signal IO_C19
+signal IO_C20
+signal IO_C21
+signal IO_C23
+signal IO_C24
+signal IO_C25
+signal IO_C27
+signal IO_C29
+signal IO_C30
+signal IO_D1
+signal IO_D2
+signal IO_D3
+signal IO_D4
+signal IO_D5
+signal IO_D7
+signal IO_D8
+signal IO_D9
+signal IO_D11
+signal IO_D12
+signal IO_D13
+signal IO_D15
+signal IO_D16
+signal IO_D18
+signal IO_D19
+signal IO_D20
+signal IO_D22
+signal IO_D23
+signal IO_D24
+signal IO_D26
+signal IO_D27
+signal IO_D28
+signal IO_D29
+signal IO_D30
+signal IO_E1
+signal IO_E2
+signal IO_E4
+signal IO_E6
+signal IO_E8
+signal IO_E9
+signal IO_E11
+signal IO_E12
+signal IO_E13
+signal IO_E15
+signal IO_E16
+signal IO_E18
+signal IO_E19
+signal IO_E20
+signal IO_E22
+signal IO_E23
+signal IO_E25
+signal IO_E27
+signal IO_E29
+signal IO_E30
+signal IO_F2
+signal IO_F3
+signal IO_F5
+signal IO_F6
+signal IO_F7
+signal IO_F8
+signal IO_F9
+signal IO_F10
+signal IO_F11
+signal IO_F12
+signal IO_F13
+signal IO_F14
+signal IO_F15
+signal IO_F16
+signal IO_F17
+signal IO_F18
+signal IO_F19
+signal IO_F20
+signal IO_F21
+signal IO_F22
+signal IO_F23
+signal IO_F24
+signal IO_F25
+signal IO_F26
+signal IO_F28
+signal IO_F29
+signal IO_G1
+signal IO_G2
+signal IO_G3
+signal IO_G4
+signal IO_G6
+signal IO_G7
+signal IO_G8
+signal IO_G10
+signal IO_G11
+signal IO_G12
+signal IO_G14
+signal IO_G15
+signal IO_G16
+signal IO_G17
+signal IO_G19
+signal IO_G20
+signal IO_G21
+signal IO_G23
+signal IO_G24
+signal IO_G25
+signal IO_G27
+signal IO_G28
+signal IO_G29
+signal IO_G30
+signal IO_H1
+signal IO_H2
+signal IO_H3
+signal IO_H4
+signal IO_H5
+signal IO_H6
+signal IO_H7
+signal IO_H8
+signal IO_H9
+signal IO_H11
+signal IO_H12
+signal IO_H13
+signal IO_H15
+signal IO_H16
+signal IO_H18
+signal IO_H19
+signal IO_H20
+signal IO_H22
+signal IO_H23
+signal IO_H24
+signal IO_H25
+signal IO_H26
+signal IO_H27
+signal IO_H28
+signal IO_H29
+signal IO_H30
+signal IO_J1
+signal IO_J2
+signal IO_J4
+signal IO_J5
+signal IO_J6
+signal IO_J8
+signal IO_J9
+signal IO_J10
+signal IO_J12
+signal IO_J13
+signal IO_J14
+signal IO_J15
+signal IO_J16
+signal IO_J17
+signal IO_J18
+signal IO_J19
+signal IO_J21
+signal IO_J22
+signal IO_J23
+signal IO_J25
+signal IO_J26
+signal IO_J27
+signal IO_J29
+signal IO_J30
+signal IO_K2
+signal IO_K3
+signal IO_K6
+signal IO_K7
+signal IO_K9
+signal IO_K10
+signal IO_K11
+signal IO_K12
+signal IO_K13
+signal IO_K14
+signal IO_K15
+signal IO_K16
+signal IO_K17
+signal IO_K18
+signal IO_K19
+signal IO_K20
+signal IO_K21
+signal IO_K22
+signal IO_K24
+signal IO_K25
+signal IO_K28
+signal IO_K29
+signal IO_L1
+signal IO_L2
+signal IO_L3
+signal IO_L4
+signal IO_L5
+signal IO_L6
+signal IO_L7
+signal IO_L8
+signal IO_L10
+signal IO_L21
+signal IO_L23
+signal IO_L24
+signal IO_L25
+signal IO_L26
+signal IO_L27
+signal IO_L28
+signal IO_L29
+signal IO_L30
+signal IO_M1
+signal IO_M2
+signal IO_M3
+signal IO_M4
+signal IO_M5
+signal IO_M6
+signal IO_M7
+signal IO_M8
+signal IO_M9
+signal IO_M10
+signal IO_M21
+signal IO_M22
+signal IO_M23
+signal IO_M24
+signal IO_M25
+signal IO_M26
+signal IO_M27
+signal IO_M28
+signal IO_M29
+signal IO_M30
+signal IO_N1
+signal IO_N2
+signal IO_N4
+signal IO_N5
+signal IO_N6
+signal IO_N8
+signal IO_N9
+signal IO_N10
+signal IO_N21
+signal IO_N22
+signal IO_N23
+signal IO_N25
+signal IO_N26
+signal IO_N27
+signal IO_N29
+signal IO_N30
+signal IO_P2
+signal IO_P3
+signal IO_P6
+signal IO_P7
+signal IO_P9
+signal IO_P10
+signal IO_P21
+signal IO_P22
+signal IO_P24
+signal IO_P25
+signal IO_P28
+signal IO_P29
+signal IO_R1
+signal IO_R2
+signal IO_R3
+signal IO_R4
+signal IO_R5
+signal IO_R6
+signal IO_R7
+signal IO_R8
+signal IO_R9
+signal IO_R10
+signal IO_R21
+signal IO_R22
+signal IO_R23
+signal IO_R24
+signal IO_R25
+signal IO_R26
+signal IO_R27
+signal IO_R28
+signal IO_R29
+signal IO_R30
+signal IO_T1
+signal IO_T2
+signal IO_T3
+signal IO_T4
+signal IO_T5
+signal IO_T6
+signal IO_T7
+signal IO_T8
+signal IO_T9
+signal IO_T10
+signal IO_T21
+signal IO_T22
+signal IO_T23
+signal IO_T24
+signal IO_T25
+signal IO_T26
+signal IO_T27
+signal IO_T28
+signal IO_T29
+signal IO_T30
+signal IO_U2
+signal IO_U3
+signal IO_U6
+signal IO_U7
+signal IO_U9
+signal IO_U10
+signal IO_U21
+signal IO_U22
+signal IO_U24
+signal IO_U25
+signal IO_U28
+signal IO_U29
+signal IO_V1
+signal IO_V2
+signal IO_V4
+signal IO_V5
+signal IO_V6
+signal IO_V8
+signal IO_V9
+signal IO_V10
+signal IO_V21
+signal IO_V22
+signal IO_V23
+signal IO_V25
+signal IO_V26
+signal IO_V27
+signal IO_V29
+signal IO_V30
+signal IO_W1
+signal IO_W2
+signal IO_W3
+signal IO_W4
+signal IO_W5
+signal IO_W6
+signal IO_W7
+signal IO_W8
+signal IO_W9
+signal IO_W10
+signal IO_W21
+signal IO_W22
+signal IO_W23
+signal IO_W24
+signal IO_W25
+signal IO_W26
+signal IO_W27
+signal IO_W28
+signal IO_W29
+signal IO_W30
+signal IO_Y1
+signal IO_Y2
+signal IO_Y3
+signal IO_Y4
+signal IO_Y5
+signal IO_Y6
+signal IO_Y7
+signal IO_Y8
+signal IO_Y10
+signal IO_Y21
+signal IO_Y23
+signal IO_Y24
+signal IO_Y25
+signal IO_Y26
+signal IO_Y27
+signal IO_Y28
+signal IO_Y29
+signal IO_Y30
+signal IO_AA2
+signal IO_AA3
+signal IO_AA6
+signal IO_AA7
+signal IO_AA9
+signal IO_AA10
+signal IO_AA11
+signal IO_AA12
+signal IO_AA13
+signal IO_AA14
+signal IO_AA15
+signal IO_AA16
+signal IO_AA17
+signal IO_AA18
+signal IO_AA19
+signal IO_AA20
+signal IO_AA21
+signal IO_AA22
+signal IO_AA24
+signal IO_AA25
+signal IO_AA28
+signal IO_AA29
+signal IO_AB1
+signal IO_AB2
+signal IO_AB4
+signal IO_AB5
+signal IO_AB6
+signal IO_AB8
+signal IO_AB9
+signal IO_AB10
+signal IO_AB12
+signal IO_AB13
+signal IO_AB14
+signal IO_AB15
+signal IO_AB16
+signal IO_AB17
+signal IO_AB18
+signal IO_AB19
+signal IO_AB21
+signal IO_AB22
+signal IO_AB23
+signal IO_AB25
+signal IO_AB26
+signal IO_AB27
+signal IO_AB29
+signal IO_AB30
+signal IO_AC1
+signal IO_AC2
+signal IO_AC3
+signal IO_AC4
+signal IO_AC5
+signal IO_AC6
+signal IO_AC7
+signal IO_AC8
+signal IO_AC9
+signal IO_AC11
+signal IO_AC12
+signal IO_AC13
+signal IO_AC15
+signal IO_AC16
+signal IO_AC18
+signal IO_AC19
+signal IO_AC20
+signal IO_AC22
+signal IO_AC23
+signal IO_AC24
+signal IO_AC25
+signal IO_AC26
+signal IO_AC27
+signal IO_AC28
+signal IO_AC29
+signal IO_AC30
+signal IO_AD1
+signal IO_AD2
+signal IO_AD3
+signal IO_AD4
+signal IO_AD6
+signal IO_AD7
+signal IO_AD8
+signal IO_AD10
+signal IO_AD11
+signal IO_AD12
+signal IO_AD14
+signal IO_AD15
+signal IO_AD16
+signal IO_AD17
+signal IO_AD19
+signal IO_AD20
+signal IO_AD21
+signal IO_AD23
+signal IO_AD24
+signal IO_AD25
+signal IO_AD27
+signal IO_AD28
+signal IO_AD29
+signal IO_AD30
+signal IO_AE2
+signal IO_AE3
+signal IO_AE5
+signal IO_AE6
+signal IO_AE7
+signal IO_AE8
+signal IO_AE9
+signal IO_AE10
+signal IO_AE11
+signal IO_AE12
+signal IO_AE13
+signal IO_AE14
+signal IO_AE15
+signal IO_AE16
+signal IO_AE17
+signal IO_AE18
+signal IO_AE19
+signal IO_AE20
+signal IO_AE21
+signal IO_AE22
+signal IO_AE23
+signal IO_AE24
+signal IO_AE25
+signal IO_AE26
+signal IO_AE28
+signal IO_AE29
+signal IO_AF1
+signal IO_AF2
+signal IO_AF4
+signal IO_AF6
+signal IO_AF8
+signal IO_AF9
+signal IO_AF11
+signal IO_AF12
+signal IO_AF13
+signal IO_AF15
+signal IO_AF16
+signal IO_AF18
+signal IO_AF19
+signal IO_AF20
+signal IO_AF22
+signal IO_AF23
+signal IO_AF25
+signal IO_AF27
+signal IO_AF29
+signal IO_AF30
+signal IO_AG1
+signal IO_AG2
+signal IO_AG3
+signal IO_AG4
+signal IO_AG5
+signal IO_AG7
+signal IO_AG8
+signal IO_AG9
+signal IO_AG11
+signal IO_AG12
+signal IO_AG13
+signal IO_AG15
+signal IO_AG16
+signal IO_AG18
+signal IO_AG19
+signal IO_AG20
+signal IO_AG22
+signal IO_AG23
+signal IO_AG24
+signal IO_AG26
+signal IO_AG27
+signal IO_AG28
+signal IO_AG29
+signal IO_AG30
+signal IO_AH1
+signal IO_AH2
+signal IO_AH4
+signal IO_AH6
+signal IO_AH7
+signal IO_AH8
+signal IO_AH10
+signal IO_AH11
+signal IO_AH12
+signal IO_AH14
+signal IO_AH15
+signal IO_AH16
+signal IO_AH17
+signal IO_AH19
+signal IO_AH20
+signal IO_AH21
+signal IO_AH23
+signal IO_AH24
+signal IO_AH25
+signal IO_AH27
+signal IO_AH29
+signal IO_AH30
+signal IO_AJ4
+signal IO_AJ5
+signal IO_AJ6
+signal IO_AJ7
+signal IO_AJ8
+signal IO_AJ9
+signal IO_AJ10
+signal IO_AJ11
+signal IO_AJ12
+signal IO_AJ13
+signal IO_AJ14
+signal IO_AJ15
+signal IO_AJ16
+signal IO_AJ17
+signal IO_AJ18
+signal IO_AJ19
+signal IO_AJ20
+signal IO_AJ21
+signal IO_AJ22
+signal IO_AJ23
+signal IO_AJ24
+signal IO_AJ25
+signal IO_AJ26
+signal IO_AJ27
+signal IO_AK4
+signal IO_AK5
+signal IO_AK7
+signal IO_AK8
+signal IO_AK9
+signal IO_AK11
+signal IO_AK12
+signal IO_AK13
+signal IO_AK15
+signal IO_AK16
+signal IO_AK18
+signal IO_AK19
+signal IO_AK20
+signal IO_AK22
+signal IO_AK23
+signal IO_AK24
+signal IO_AK26
+signal IO_AK27
+
+register BSR 2459
+register BR 1
+register DIR 32
+
+instruction length 6
+
+instruction EXTEST 000000 BSR
+instruction SAMPLE/PRELOAD 000001 BSR
+instruction IDCODE 001001 DIR
+instruction BYPASS 111111 BR
+
+bit 2458 I 1 IO_C29
+bit 2457 O 1 IO_C29 2456 1 Z
+bit 2456 C 1 *
+bit 2455 I 1 IO_C30
+bit 2454 O 1 IO_C30 2453 1 Z
+bit 2453 C 1 *
+bit 2452 I 1 IO_D27
+bit 2451 O 1 IO_D27 2450 1 Z
+bit 2450 C 1 *
+bit 2449 I 1 IO_D28
+bit 2448 O 1 IO_D28 2447 1 Z
+bit 2447 C 1 *
+bit 2446 I 1 IO_D29
+bit 2445 O 1 IO_D29 2444 1 Z
+bit 2444 C 1 *
+bit 2443 I 1 IO_D30
+bit 2442 O 1 IO_D30 2441 1 Z
+bit 2441 C 1 *
+bit 2440 I 1 IO_E29
+bit 2439 O 1 IO_E29 2438 1 Z
+bit 2438 C 1 *
+bit 2437 I 1 IO_E30
+bit 2436 O 1 IO_E30 2435 1 Z
+bit 2435 C 1 *
+bit 2434 I 1 IO_E27
+bit 2433 O 1 IO_E27 2432 1 Z
+bit 2432 C 1 *
+bit 2431 I 1 IO_F26
+bit 2430 O 1 IO_F26 2429 1 Z
+bit 2429 C 1 *
+bit 2428 I 1 IO_F28
+bit 2427 O 1 IO_F28 2426 1 Z
+bit 2426 C 1 *
+bit 2425 I 1 IO_F29
+bit 2424 O 1 IO_F29 2423 1 Z
+bit 2423 C 1 *
+bit 2422 O 1 *
+bit 2421 O 1 *
+bit 2420 O 1 *
+bit 2419 O 1 *
+bit 2418 O 1 *
+bit 2417 O 1 *
+bit 2416 O 1 *
+bit 2415 O 1 *
+bit 2414 O 1 *
+bit 2413 O 1 *
+bit 2412 O 1 *
+bit 2411 O 1 *
+bit 2410 O 1 *
+bit 2409 O 1 *
+bit 2408 O 1 *
+bit 2407 O 1 *
+bit 2406 O 1 *
+bit 2405 O 1 *
+bit 2404 I 1 IO_G27
+bit 2403 O 1 IO_G27 2402 1 Z
+bit 2402 C 1 *
+bit 2401 I 1 IO_G28
+bit 2400 O 1 IO_G28 2399 1 Z
+bit 2399 C 1 *
+bit 2398 I 1 IO_G29
+bit 2397 O 1 IO_G29 2396 1 Z
+bit 2396 C 1 *
+bit 2395 I 1 IO_G30
+bit 2394 O 1 IO_G30 2393 1 Z
+bit 2393 C 1 *
+bit 2392 I 1 IO_G25
+bit 2391 O 1 IO_G25 2390 1 Z
+bit 2390 C 1 *
+bit 2389 I 1 IO_H24
+bit 2388 O 1 IO_H24 2387 1 Z
+bit 2387 C 1 *
+bit 2386 I 1 IO_H25
+bit 2385 O 1 IO_H25 2384 1 Z
+bit 2384 C 1 *
+bit 2383 I 1 IO_H26
+bit 2382 O 1 IO_H26 2381 1 Z
+bit 2381 C 1 *
+bit 2380 I 1 IO_H27
+bit 2379 O 1 IO_H27 2378 1 Z
+bit 2378 C 1 *
+bit 2377 I 1 IO_H28
+bit 2376 O 1 IO_H28 2375 1 Z
+bit 2375 C 1 *
+bit 2374 O 1 *
+bit 2373 O 1 *
+bit 2372 O 1 *
+bit 2371 I 1 IO_J25
+bit 2370 O 1 IO_J25 2369 1 Z
+bit 2369 C 1 *
+bit 2368 I 1 IO_H29
+bit 2367 O 1 IO_H29 2366 1 Z
+bit 2366 C 1 *
+bit 2365 I 1 IO_H30
+bit 2364 O 1 IO_H30 2363 1 Z
+bit 2363 C 1 *
+bit 2362 I 1 IO_J26
+bit 2361 O 1 IO_J26 2360 1 Z
+bit 2360 C 1 *
+bit 2359 I 1 IO_J27
+bit 2358 O 1 IO_J27 2357 1 Z
+bit 2357 C 1 *
+bit 2356 I 1 IO_J29
+bit 2355 O 1 IO_J29 2354 1 Z
+bit 2354 C 1 *
+bit 2353 I 1 IO_J30
+bit 2352 O 1 IO_J30 2351 1 Z
+bit 2351 C 1 *
+bit 2350 I 1 IO_J23
+bit 2349 O 1 IO_J23 2348 1 Z
+bit 2348 C 1 *
+bit 2347 I 1 IO_K22
+bit 2346 O 1 IO_K22 2345 1 Z
+bit 2345 C 1 *
+bit 2344 I 1 IO_K24
+bit 2343 O 1 IO_K24 2342 1 Z
+bit 2342 C 1 *
+bit 2341 I 1 IO_K25
+bit 2340 O 1 IO_K25 2339 1 Z
+bit 2339 C 1 *
+bit 2338 O 1 *
+bit 2337 O 1 *
+bit 2336 O 1 *
+bit 2335 O 1 *
+bit 2334 O 1 *
+bit 2333 O 1 *
+bit 2332 O 1 *
+bit 2331 O 1 *
+bit 2330 O 1 *
+bit 2329 O 1 *
+bit 2328 O 1 *
+bit 2327 O 1 *
+bit 2326 I 1 IO_K28
+bit 2325 O 1 IO_K28 2324 1 Z
+bit 2324 C 1 *
+bit 2323 I 1 IO_K29
+bit 2322 O 1 IO_K29 2321 1 Z
+bit 2321 C 1 *
+bit 2320 I 1 IO_K21
+bit 2319 O 1 IO_K21 2318 1 Z
+bit 2318 C 1 *
+bit 2317 I 1 IO_L21
+bit 2316 O 1 IO_L21 2315 1 Z
+bit 2315 C 1 *
+bit 2314 I 1 IO_L23
+bit 2313 O 1 IO_L23 2312 1 Z
+bit 2312 C 1 *
+bit 2311 I 1 IO_L24
+bit 2310 O 1 IO_L24 2309 1 Z
+bit 2309 C 1 *
+bit 2308 I 1 IO_L25
+bit 2307 O 1 IO_L25 2306 1 Z
+bit 2306 C 1 *
+bit 2305 I 1 IO_L26
+bit 2304 O 1 IO_L26 2303 1 Z
+bit 2303 C 1 *
+bit 2302 I 1 IO_L27
+bit 2301 O 1 IO_L27 2300 1 Z
+bit 2300 C 1 *
+bit 2299 I 1 IO_L28
+bit 2298 O 1 IO_L28 2297 1 Z
+bit 2297 C 1 *
+bit 2296 O 1 *
+bit 2295 O 1 *
+bit 2294 O 1 *
+bit 2293 O 1 *
+bit 2292 O 1 *
+bit 2291 O 1 *
+bit 2290 I 1 IO_L29
+bit 2289 O 1 IO_L29 2288 1 Z
+bit 2288 C 1 *
+bit 2287 I 1 IO_L30
+bit 2286 O 1 IO_L30 2285 1 Z
+bit 2285 C 1 *
+bit 2284 I 1 IO_M22
+bit 2283 O 1 IO_M22 2282 1 Z
+bit 2282 C 1 *
+bit 2281 I 1 IO_M23
+bit 2280 O 1 IO_M23 2279 1 Z
+bit 2279 C 1 *
+bit 2278 I 1 IO_M24
+bit 2277 O 1 IO_M24 2276 1 Z
+bit 2276 C 1 *
+bit 2275 I 1 IO_M25
+bit 2274 O 1 IO_M25 2273 1 Z
+bit 2273 C 1 *
+bit 2272 I 1 IO_M27
+bit 2271 O 1 IO_M27 2270 1 Z
+bit 2270 C 1 *
+bit 2269 I 1 IO_M28
+bit 2268 O 1 IO_M28 2267 1 Z
+bit 2267 C 1 *
+bit 2266 O 1 *
+bit 2265 O 1 *
+bit 2264 O 1 *
+bit 2263 O 1 *
+bit 2262 O 1 *
+bit 2261 O 1 *
+bit 2260 O 1 *
+bit 2259 O 1 *
+bit 2258 O 1 *
+bit 2257 O 1 *
+bit 2256 O 1 *
+bit 2255 O 1 *
+bit 2254 I 1 IO_M29
+bit 2253 O 1 IO_M29 2252 1 Z
+bit 2252 C 1 *
+bit 2251 I 1 IO_M30
+bit 2250 O 1 IO_M30 2249 1 Z
+bit 2249 C 1 *
+bit 2248 I 1 IO_M21
+bit 2247 O 1 IO_M21 2246 1 Z
+bit 2246 C 1 *
+bit 2245 I 1 IO_N21
+bit 2244 O 1 IO_N21 2243 1 Z
+bit 2243 C 1 *
+bit 2242 I 1 IO_N22
+bit 2241 O 1 IO_N22 2240 1 Z
+bit 2240 C 1 *
+bit 2239 I 1 IO_N23
+bit 2238 O 1 IO_N23 2237 1 Z
+bit 2237 C 1 *
+bit 2236 I 1 IO_M26
+bit 2235 O 1 IO_M26 2234 1 Z
+bit 2234 C 1 *
+bit 2233 I 1 IO_N25
+bit 2232 O 1 IO_N25 2231 1 Z
+bit 2231 C 1 *
+bit 2230 I 1 IO_N26
+bit 2229 O 1 IO_N26 2228 1 Z
+bit 2228 C 1 *
+bit 2227 I 1 IO_N27
+bit 2226 O 1 IO_N27 2225 1 Z
+bit 2225 C 1 *
+bit 2224 O 1 *
+bit 2223 O 1 *
+bit 2222 O 1 *
+bit 2221 O 1 *
+bit 2220 O 1 *
+bit 2219 O 1 *
+bit 2218 I 1 IO_N29
+bit 2217 O 1 IO_N29 2216 1 Z
+bit 2216 C 1 *
+bit 2215 I 1 IO_N30
+bit 2214 O 1 IO_N30 2213 1 Z
+bit 2213 C 1 *
+bit 2212 I 1 IO_P21
+bit 2211 O 1 IO_P21 2210 1 Z
+bit 2210 C 1 *
+bit 2209 I 1 IO_P22
+bit 2208 O 1 IO_P22 2207 1 Z
+bit 2207 C 1 *
+bit 2206 I 1 IO_P24
+bit 2205 O 1 IO_P24 2204 1 Z
+bit 2204 C 1 *
+bit 2203 I 1 IO_P25
+bit 2202 O 1 IO_P25 2201 1 Z
+bit 2201 C 1 *
+bit 2200 I 1 IO_P28
+bit 2199 O 1 IO_P28 2198 1 Z
+bit 2198 C 1 *
+bit 2197 I 1 IO_P29
+bit 2196 O 1 IO_P29 2195 1 Z
+bit 2195 C 1 *
+bit 2194 I 1 IO_R21
+bit 2193 O 1 IO_R21 2192 1 Z
+bit 2192 C 1 *
+bit 2191 I 1 IO_R22
+bit 2190 O 1 IO_R22 2189 1 Z
+bit 2189 C 1 *
+bit 2188 O 1 *
+bit 2187 O 1 *
+bit 2186 O 1 *
+bit 2185 O 1 *
+bit 2184 O 1 *
+bit 2183 O 1 *
+bit 2182 O 1 *
+bit 2181 O 1 *
+bit 2180 O 1 *
+bit 2179 O 1 *
+bit 2178 O 1 *
+bit 2177 O 1 *
+bit 2176 O 1 *
+bit 2175 O 1 *
+bit 2174 O 1 *
+bit 2173 O 1 *
+bit 2172 O 1 *
+bit 2171 O 1 *
+bit 2170 I 1 IO_R23
+bit 2169 O 1 IO_R23 2168 1 Z
+bit 2168 C 1 *
+bit 2167 I 1 IO_R24
+bit 2166 O 1 IO_R24 2165 1 Z
+bit 2165 C 1 *
+bit 2164 I 1 IO_R25
+bit 2163 O 1 IO_R25 2162 1 Z
+bit 2162 C 1 *
+bit 2161 I 1 IO_R26
+bit 2160 O 1 IO_R26 2159 1 Z
+bit 2159 C 1 *
+bit 2158 I 1 IO_R27
+bit 2157 O 1 IO_R27 2156 1 Z
+bit 2156 C 1 *
+bit 2155 I 1 IO_R28
+bit 2154 O 1 IO_R28 2153 1 Z
+bit 2153 C 1 *
+bit 2152 I 1 IO_R29
+bit 2151 O 1 IO_R29 2150 1 Z
+bit 2150 C 1 *
+bit 2149 I 1 IO_R30
+bit 2148 O 1 IO_R30 2147 1 Z
+bit 2147 C 1 *
+bit 2146 I 1 IO_T30
+bit 2145 O 1 IO_T30 2144 1 Z
+bit 2144 C 1 *
+bit 2143 I 1 IO_T29
+bit 2142 O 1 IO_T29 2141 1 Z
+bit 2141 C 1 *
+bit 2140 I 1 IO_T28
+bit 2139 O 1 IO_T28 2138 1 Z
+bit 2138 C 1 *
+bit 2137 I 1 IO_T27
+bit 2136 O 1 IO_T27 2135 1 Z
+bit 2135 C 1 *
+bit 2134 I 1 IO_T26
+bit 2133 O 1 IO_T26 2132 1 Z
+bit 2132 C 1 *
+bit 2131 I 1 IO_T25
+bit 2130 O 1 IO_T25 2129 1 Z
+bit 2129 C 1 *
+bit 2128 I 1 IO_T24
+bit 2127 O 1 IO_T24 2126 1 Z
+bit 2126 C 1 *
+bit 2125 I 1 IO_T23
+bit 2124 O 1 IO_T23 2123 1 Z
+bit 2123 C 1 *
+bit 2122 O 1 *
+bit 2121 O 1 *
+bit 2120 O 1 *
+bit 2119 O 1 *
+bit 2118 O 1 *
+bit 2117 O 1 *
+bit 2116 O 1 *
+bit 2115 O 1 *
+bit 2114 O 1 *
+bit 2113 O 1 *
+bit 2112 O 1 *
+bit 2111 O 1 *
+bit 2110 O 1 *
+bit 2109 O 1 *
+bit 2108 O 1 *
+bit 2107 O 1 *
+bit 2106 O 1 *
+bit 2105 O 1 *
+bit 2104 I 1 IO_T22
+bit 2103 O 1 IO_T22 2102 1 Z
+bit 2102 C 1 *
+bit 2101 I 1 IO_T21
+bit 2100 O 1 IO_T21 2099 1 Z
+bit 2099 C 1 *
+bit 2098 I 1 IO_U29
+bit 2097 O 1 IO_U29 2096 1 Z
+bit 2096 C 1 *
+bit 2095 I 1 IO_U28
+bit 2094 O 1 IO_U28 2093 1 Z
+bit 2093 C 1 *
+bit 2092 I 1 IO_U25
+bit 2091 O 1 IO_U25 2090 1 Z
+bit 2090 C 1 *
+bit 2089 I 1 IO_U24
+bit 2088 O 1 IO_U24 2087 1 Z
+bit 2087 C 1 *
+bit 2086 I 1 IO_U22
+bit 2085 O 1 IO_U22 2084 1 Z
+bit 2084 C 1 *
+bit 2083 I 1 IO_U21
+bit 2082 O 1 IO_U21 2081 1 Z
+bit 2081 C 1 *
+bit 2080 I 1 IO_V30
+bit 2079 O 1 IO_V30 2078 1 Z
+bit 2078 C 1 *
+bit 2077 I 1 IO_V29
+bit 2076 O 1 IO_V29 2075 1 Z
+bit 2075 C 1 *
+bit 2074 O 1 *
+bit 2073 O 1 *
+bit 2072 O 1 *
+bit 2071 O 1 *
+bit 2070 O 1 *
+bit 2069 O 1 *
+bit 2068 I 1 IO_V27
+bit 2067 O 1 IO_V27 2066 1 Z
+bit 2066 C 1 *
+bit 2065 I 1 IO_V26
+bit 2064 O 1 IO_V26 2063 1 Z
+bit 2063 C 1 *
+bit 2062 I 1 IO_V25
+bit 2061 O 1 IO_V25 2060 1 Z
+bit 2060 C 1 *
+bit 2059 I 1 IO_W26
+bit 2058 O 1 IO_W26 2057 1 Z
+bit 2057 C 1 *
+bit 2056 I 1 IO_V23
+bit 2055 O 1 IO_V23 2054 1 Z
+bit 2054 C 1 *
+bit 2053 I 1 IO_V22
+bit 2052 O 1 IO_V22 2051 1 Z
+bit 2051 C 1 *
+bit 2050 I 1 IO_V21
+bit 2049 O 1 IO_V21 2048 1 Z
+bit 2048 C 1 *
+bit 2047 I 1 IO_W21
+bit 2046 O 1 IO_W21 2045 1 Z
+bit 2045 C 1 *
+bit 2044 I 1 IO_W30
+bit 2043 O 1 IO_W30 2042 1 Z
+bit 2042 C 1 *
+bit 2041 I 1 IO_W29
+bit 2040 O 1 IO_W29 2039 1 Z
+bit 2039 C 1 *
+bit 2038 O 1 *
+bit 2037 O 1 *
+bit 2036 O 1 *
+bit 2035 O 1 *
+bit 2034 O 1 *
+bit 2033 O 1 *
+bit 2032 O 1 *
+bit 2031 O 1 *
+bit 2030 O 1 *
+bit 2029 O 1 *
+bit 2028 O 1 *
+bit 2027 O 1 *
+bit 2026 I 1 IO_W28
+bit 2025 O 1 IO_W28 2024 1 Z
+bit 2024 C 1 *
+bit 2023 I 1 IO_W27
+bit 2022 O 1 IO_W27 2021 1 Z
+bit 2021 C 1 *
+bit 2020 I 1 IO_W25
+bit 2019 O 1 IO_W25 2018 1 Z
+bit 2018 C 1 *
+bit 2017 I 1 IO_W24
+bit 2016 O 1 IO_W24 2015 1 Z
+bit 2015 C 1 *
+bit 2014 I 1 IO_W23
+bit 2013 O 1 IO_W23 2012 1 Z
+bit 2012 C 1 *
+bit 2011 I 1 IO_W22
+bit 2010 O 1 IO_W22 2009 1 Z
+bit 2009 C 1 *
+bit 2008 I 1 IO_Y30
+bit 2007 O 1 IO_Y30 2006 1 Z
+bit 2006 C 1 *
+bit 2005 I 1 IO_Y29
+bit 2004 O 1 IO_Y29 2003 1 Z
+bit 2003 C 1 *
+bit 2002 O 1 *
+bit 2001 O 1 *
+bit 2000 O 1 *
+bit 1999 O 1 *
+bit 1998 O 1 *
+bit 1997 O 1 *
+bit 1996 I 1 IO_Y28
+bit 1995 O 1 IO_Y28 1994 1 Z
+bit 1994 C 1 *
+bit 1993 I 1 IO_Y27
+bit 1992 O 1 IO_Y27 1991 1 Z
+bit 1991 C 1 *
+bit 1990 I 1 IO_Y26
+bit 1989 O 1 IO_Y26 1988 1 Z
+bit 1988 C 1 *
+bit 1987 I 1 IO_Y25
+bit 1986 O 1 IO_Y25 1985 1 Z
+bit 1985 C 1 *
+bit 1984 I 1 IO_Y24
+bit 1983 O 1 IO_Y24 1982 1 Z
+bit 1982 C 1 *
+bit 1981 I 1 IO_Y23
+bit 1980 O 1 IO_Y23 1979 1 Z
+bit 1979 C 1 *
+bit 1978 I 1 IO_Y21
+bit 1977 O 1 IO_Y21 1976 1 Z
+bit 1976 C 1 *
+bit 1975 I 1 IO_AA21
+bit 1974 O 1 IO_AA21 1973 1 Z
+bit 1973 C 1 *
+bit 1972 I 1 IO_AA29
+bit 1971 O 1 IO_AA29 1970 1 Z
+bit 1970 C 1 *
+bit 1969 I 1 IO_AA28
+bit 1968 O 1 IO_AA28 1967 1 Z
+bit 1967 C 1 *
+bit 1966 O 1 *
+bit 1965 O 1 *
+bit 1964 O 1 *
+bit 1963 O 1 *
+bit 1962 O 1 *
+bit 1961 O 1 *
+bit 1960 O 1 *
+bit 1959 O 1 *
+bit 1958 O 1 *
+bit 1957 O 1 *
+bit 1956 O 1 *
+bit 1955 O 1 *
+bit 1954 I 1 IO_AA25
+bit 1953 O 1 IO_AA25 1952 1 Z
+bit 1952 C 1 *
+bit 1951 I 1 IO_AA24
+bit 1950 O 1 IO_AA24 1949 1 Z
+bit 1949 C 1 *
+bit 1948 I 1 IO_AA22
+bit 1947 O 1 IO_AA22 1946 1 Z
+bit 1946 C 1 *
+bit 1945 I 1 IO_AB23
+bit 1944 O 1 IO_AB23 1943 1 Z
+bit 1943 C 1 *
+bit 1942 I 1 IO_AB30
+bit 1941 O 1 IO_AB30 1940 1 Z
+bit 1940 C 1 *
+bit 1939 I 1 IO_AB29
+bit 1938 O 1 IO_AB29 1937 1 Z
+bit 1937 C 1 *
+bit 1936 I 1 IO_AB27
+bit 1935 O 1 IO_AB27 1934 1 Z
+bit 1934 C 1 *
+bit 1933 I 1 IO_AB26
+bit 1932 O 1 IO_AB26 1931 1 Z
+bit 1931 C 1 *
+bit 1930 I 1 IO_AC30
+bit 1929 O 1 IO_AC30 1928 1 Z
+bit 1928 C 1 *
+bit 1927 I 1 IO_AC29
+bit 1926 O 1 IO_AC29 1925 1 Z
+bit 1925 C 1 *
+bit 1924 I 1 IO_AB25
+bit 1923 O 1 IO_AB25 1922 1 Z
+bit 1922 C 1 *
+bit 1921 O 1 *
+bit 1920 O 1 *
+bit 1919 O 1 *
+bit 1918 I 1 IO_AC28
+bit 1917 O 1 IO_AC28 1916 1 Z
+bit 1916 C 1 *
+bit 1915 I 1 IO_AC27
+bit 1914 O 1 IO_AC27 1913 1 Z
+bit 1913 C 1 *
+bit 1912 I 1 IO_AC26
+bit 1911 O 1 IO_AC26 1910 1 Z
+bit 1910 C 1 *
+bit 1909 I 1 IO_AC25
+bit 1908 O 1 IO_AC25 1907 1 Z
+bit 1907 C 1 *
+bit 1906 I 1 IO_AC24
+bit 1905 O 1 IO_AC24 1904 1 Z
+bit 1904 C 1 *
+bit 1903 I 1 IO_AD25
+bit 1902 O 1 IO_AD25 1901 1 Z
+bit 1901 C 1 *
+bit 1900 I 1 IO_AD30
+bit 1899 O 1 IO_AD30 1898 1 Z
+bit 1898 C 1 *
+bit 1897 I 1 IO_AD29
+bit 1896 O 1 IO_AD29 1895 1 Z
+bit 1895 C 1 *
+bit 1894 I 1 IO_AD28
+bit 1893 O 1 IO_AD28 1892 1 Z
+bit 1892 C 1 *
+bit 1891 I 1 IO_AD27
+bit 1890 O 1 IO_AD27 1889 1 Z
+bit 1889 C 1 *
+bit 1888 O 1 *
+bit 1887 O 1 *
+bit 1886 O 1 *
+bit 1885 O 1 *
+bit 1884 O 1 *
+bit 1883 O 1 *
+bit 1882 O 1 *
+bit 1881 O 1 *
+bit 1880 O 1 *
+bit 1879 O 1 *
+bit 1878 O 1 *
+bit 1877 O 1 *
+bit 1876 O 1 *
+bit 1875 O 1 *
+bit 1874 O 1 *
+bit 1873 O 1 *
+bit 1872 O 1 *
+bit 1871 O 1 *
+bit 1870 I 1 IO_AE29
+bit 1869 O 1 IO_AE29 1868 1 Z
+bit 1868 C 1 *
+bit 1867 I 1 IO_AE28
+bit 1866 O 1 IO_AE28 1865 1 Z
+bit 1865 C 1 *
+bit 1864 I 1 IO_AE26
+bit 1863 O 1 IO_AE26 1862 1 Z
+bit 1862 C 1 *
+bit 1861 I 1 IO_AF27
+bit 1860 O 1 IO_AF27 1859 1 Z
+bit 1859 C 1 *
+bit 1858 I 1 IO_AF30
+bit 1857 O 1 IO_AF30 1856 1 Z
+bit 1856 C 1 *
+bit 1855 I 1 IO_AF29
+bit 1854 O 1 IO_AF29 1853 1 Z
+bit 1853 C 1 *
+bit 1852 I 1 IO_AG30
+bit 1851 O 1 IO_AG30 1850 1 Z
+bit 1850 C 1 *
+bit 1849 I 1 IO_AG29
+bit 1848 O 1 IO_AG29 1847 1 Z
+bit 1847 C 1 *
+bit 1846 I 1 IO_AG28
+bit 1845 O 1 IO_AG28 1844 1 Z
+bit 1844 C 1 *
+bit 1843 I 1 IO_AG27
+bit 1842 O 1 IO_AG27 1841 1 Z
+bit 1841 C 1 *
+bit 1840 I 1 IO_AH30
+bit 1839 O 1 IO_AH30 1838 1 Z
+bit 1838 C 1 *
+bit 1837 I 1 IO_AH29
+bit 1836 O 1 IO_AH29 1835 1 Z
+bit 1835 C 1 *
+bit 1834 I 1 CCLK_AH28
+bit 1833 O 1 CCLK_AH28 1832 1 Z
+bit 1832 C 1 *
+bit 1831 I 1 DONE_AJ28
+bit 1830 O 1 DONE_AJ28 1829 1 Z
+bit 1829 C 1 *
+bit 1828 I 1 IO_AK28
+bit 1827 O 1 IO_AK28 1826 1 Z
+bit 1826 C 1 *
+bit 1825 I 1 IO_AJ27
+bit 1824 O 1 IO_AJ27 1823 1 Z
+bit 1823 C 1 *
+bit 1822 I 1 IO_AK27
+bit 1821 O 1 IO_AK27 1820 1 Z
+bit 1820 C 1 *
+bit 1819 I 1 IO_AJ26
+bit 1818 O 1 IO_AJ26 1817 1 Z
+bit 1817 C 1 *
+bit 1816 I 1 IO_AK26
+bit 1815 O 1 IO_AK26 1814 1 Z
+bit 1814 C 1 *
+bit 1813 I 1 IO_AH27
+bit 1812 O 1 IO_AH27 1811 1 Z
+bit 1811 C 1 *
+bit 1810 I 1 IO_AG26
+bit 1809 O 1 IO_AG26 1808 1 Z
+bit 1808 C 1 *
+bit 1807 I 1 IO_AF25
+bit 1806 O 1 IO_AF25 1805 1 Z
+bit 1805 C 1 *
+bit 1804 I 1 IO_AH25
+bit 1803 O 1 IO_AH25 1802 1 Z
+bit 1802 C 1 *
+bit 1801 I 1 IO_AJ25
+bit 1800 O 1 IO_AJ25 1799 1 Z
+bit 1799 C 1 *
+bit 1798 O 1 *
+bit 1797 O 1 *
+bit 1796 O 1 *
+bit 1795 I 1 IO_AE25
+bit 1794 O 1 IO_AE25 1793 1 Z
+bit 1793 C 1 *
+bit 1792 I 1 IO_AE24
+bit 1791 O 1 IO_AE24 1790 1 Z
+bit 1790 C 1 *
+bit 1789 I 1 IO_AG24
+bit 1788 O 1 IO_AG24 1787 1 Z
+bit 1787 C 1 *
+bit 1786 I 1 IO_AH24
+bit 1785 O 1 IO_AH24 1784 1 Z
+bit 1784 C 1 *
+bit 1783 O 1 *
+bit 1782 O 1 *
+bit 1781 O 1 *
+bit 1780 O 1 *
+bit 1779 O 1 *
+bit 1778 O 1 *
+bit 1777 O 1 *
+bit 1776 O 1 *
+bit 1775 O 1 *
+bit 1774 O 1 *
+bit 1773 O 1 *
+bit 1772 O 1 *
+bit 1771 O 1 *
+bit 1770 O 1 *
+bit 1769 O 1 *
+bit 1768 O 1 *
+bit 1767 O 1 *
+bit 1766 O 1 *
+bit 1765 I 1 IO_AJ24
+bit 1764 O 1 IO_AJ24 1763 1 Z
+bit 1763 C 1 *
+bit 1762 I 1 IO_AK24
+bit 1761 O 1 IO_AK24 1760 1 Z
+bit 1760 C 1 *
+bit 1759 I 1 IO_AD24
+bit 1758 O 1 IO_AD24 1757 1 Z
+bit 1757 C 1 *
+bit 1756 I 1 IO_AC23
+bit 1755 O 1 IO_AC23 1754 1 Z
+bit 1754 C 1 *
+bit 1753 I 1 IO_AD23
+bit 1752 O 1 IO_AD23 1751 1 Z
+bit 1751 C 1 *
+bit 1750 I 1 IO_AE23
+bit 1749 O 1 IO_AE23 1748 1 Z
+bit 1748 C 1 *
+bit 1747 I 1 IO_AF23
+bit 1746 O 1 IO_AF23 1745 1 Z
+bit 1745 C 1 *
+bit 1744 I 1 IO_AG23
+bit 1743 O 1 IO_AG23 1742 1 Z
+bit 1742 C 1 *
+bit 1741 I 1 IO_AH23
+bit 1740 O 1 IO_AH23 1739 1 Z
+bit 1739 C 1 *
+bit 1738 O 1 *
+bit 1737 O 1 *
+bit 1736 O 1 *
+bit 1735 I 1 IO_AJ23
+bit 1734 O 1 IO_AJ23 1733 1 Z
+bit 1733 C 1 *
+bit 1732 I 1 IO_AK23
+bit 1731 O 1 IO_AK23 1730 1 Z
+bit 1730 C 1 *
+bit 1729 I 1 IO_AB22
+bit 1728 O 1 IO_AB22 1727 1 Z
+bit 1727 C 1 *
+bit 1726 I 1 IO_AC22
+bit 1725 O 1 IO_AC22 1724 1 Z
+bit 1724 C 1 *
+bit 1723 I 1 IO_AE22
+bit 1722 O 1 IO_AE22 1721 1 Z
+bit 1721 C 1 *
+bit 1720 I 1 IO_AF22
+bit 1719 O 1 IO_AF22 1718 1 Z
+bit 1718 C 1 *
+bit 1717 I 1 IO_AG22
+bit 1716 O 1 IO_AG22 1715 1 Z
+bit 1715 C 1 *
+bit 1714 I 1 IO_AJ22
+bit 1713 O 1 IO_AJ22 1712 1 Z
+bit 1712 C 1 *
+bit 1711 I 1 IO_AK22
+bit 1710 O 1 IO_AK22 1709 1 Z
+bit 1709 C 1 *
+bit 1708 O 1 *
+bit 1707 O 1 *
+bit 1706 O 1 *
+bit 1705 O 1 *
+bit 1704 O 1 *
+bit 1703 O 1 *
+bit 1702 O 1 *
+bit 1701 O 1 *
+bit 1700 O 1 *
+bit 1699 O 1 *
+bit 1698 O 1 *
+bit 1697 O 1 *
+bit 1696 O 1 *
+bit 1695 O 1 *
+bit 1694 O 1 *
+bit 1693 O 1 *
+bit 1692 O 1 *
+bit 1691 O 1 *
+bit 1690 I 1 IO_AD21
+bit 1689 O 1 IO_AD21 1688 1 Z
+bit 1688 C 1 *
+bit 1687 I 1 IO_AE21
+bit 1686 O 1 IO_AE21 1685 1 Z
+bit 1685 C 1 *
+bit 1684 I 1 IO_AH21
+bit 1683 O 1 IO_AH21 1682 1 Z
+bit 1682 C 1 *
+bit 1681 I 1 IO_AJ21
+bit 1680 O 1 IO_AJ21 1679 1 Z
+bit 1679 C 1 *
+bit 1678 O 1 *
+bit 1677 O 1 *
+bit 1676 O 1 *
+bit 1675 I 1 IO_AB21
+bit 1674 O 1 IO_AB21 1673 1 Z
+bit 1673 C 1 *
+bit 1672 I 1 IO_AA20
+bit 1671 O 1 IO_AA20 1670 1 Z
+bit 1670 C 1 *
+bit 1669 I 1 IO_AC20
+bit 1668 O 1 IO_AC20 1667 1 Z
+bit 1667 C 1 *
+bit 1666 I 1 IO_AD20
+bit 1665 O 1 IO_AD20 1664 1 Z
+bit 1664 C 1 *
+bit 1663 O 1 *
+bit 1662 O 1 *
+bit 1661 O 1 *
+bit 1660 I 1 IO_AE20
+bit 1659 O 1 IO_AE20 1658 1 Z
+bit 1658 C 1 *
+bit 1657 I 1 IO_AF20
+bit 1656 O 1 IO_AF20 1655 1 Z
+bit 1655 C 1 *
+bit 1654 I 1 IO_AG20
+bit 1653 O 1 IO_AG20 1652 1 Z
+bit 1652 C 1 *
+bit 1651 I 1 IO_AH20
+bit 1650 O 1 IO_AH20 1649 1 Z
+bit 1649 C 1 *
+bit 1648 O 1 *
+bit 1647 O 1 *
+bit 1646 O 1 *
+bit 1645 I 1 IO_AJ20
+bit 1644 O 1 IO_AJ20 1643 1 Z
+bit 1643 C 1 *
+bit 1642 I 1 IO_AK20
+bit 1641 O 1 IO_AK20 1640 1 Z
+bit 1640 C 1 *
+bit 1639 I 1 IO_AA19
+bit 1638 O 1 IO_AA19 1637 1 Z
+bit 1637 C 1 *
+bit 1636 I 1 IO_AB19
+bit 1635 O 1 IO_AB19 1634 1 Z
+bit 1634 C 1 *
+bit 1633 O 1 *
+bit 1632 O 1 *
+bit 1631 O 1 *
+bit 1630 I 1 IO_AC19
+bit 1629 O 1 IO_AC19 1628 1 Z
+bit 1628 C 1 *
+bit 1627 I 1 IO_AD19
+bit 1626 O 1 IO_AD19 1625 1 Z
+bit 1625 C 1 *
+bit 1624 I 1 IO_AE19
+bit 1623 O 1 IO_AE19 1622 1 Z
+bit 1622 C 1 *
+bit 1621 I 1 IO_AF19
+bit 1620 O 1 IO_AF19 1619 1 Z
+bit 1619 C 1 *
+bit 1618 O 1 *
+bit 1617 O 1 *
+bit 1616 O 1 *
+bit 1615 I 1 IO_AG19
+bit 1614 O 1 IO_AG19 1613 1 Z
+bit 1613 C 1 *
+bit 1612 I 1 IO_AH19
+bit 1611 O 1 IO_AH19 1610 1 Z
+bit 1610 C 1 *
+bit 1609 I 1 IO_AJ19
+bit 1608 O 1 IO_AJ19 1607 1 Z
+bit 1607 C 1 *
+bit 1606 I 1 IO_AK19
+bit 1605 O 1 IO_AK19 1604 1 Z
+bit 1604 C 1 *
+bit 1603 I 1 IO_AA18
+bit 1602 O 1 IO_AA18 1601 1 Z
+bit 1601 C 1 *
+bit 1600 I 1 IO_AB18
+bit 1599 O 1 IO_AB18 1598 1 Z
+bit 1598 C 1 *
+bit 1597 I 1 IO_AC18
+bit 1596 O 1 IO_AC18 1595 1 Z
+bit 1595 C 1 *
+bit 1594 I 1 IO_AE18
+bit 1593 O 1 IO_AE18 1592 1 Z
+bit 1592 C 1 *
+bit 1591 I 1 IO_AF18
+bit 1590 O 1 IO_AF18 1589 1 Z
+bit 1589 C 1 *
+bit 1588 I 1 IO_AG18
+bit 1587 O 1 IO_AG18 1586 1 Z
+bit 1586 C 1 *
+bit 1585 I 1 IO_AJ18
+bit 1584 O 1 IO_AJ18 1583 1 Z
+bit 1583 C 1 *
+bit 1582 I 1 IO_AK18
+bit 1581 O 1 IO_AK18 1580 1 Z
+bit 1580 C 1 *
+bit 1579 I 1 IO_AA17
+bit 1578 O 1 IO_AA17 1577 1 Z
+bit 1577 C 1 *
+bit 1576 I 1 IO_AB17
+bit 1575 O 1 IO_AB17 1574 1 Z
+bit 1574 C 1 *
+bit 1573 I 1 IO_AA16
+bit 1572 O 1 IO_AA16 1571 1 Z
+bit 1571 C 1 *
+bit 1570 I 1 IO_AD17
+bit 1569 O 1 IO_AD17 1568 1 Z
+bit 1568 C 1 *
+bit 1567 I 1 IO_AE17
+bit 1566 O 1 IO_AE17 1565 1 Z
+bit 1565 C 1 *
+bit 1564 I 1 IO_AH17
+bit 1563 O 1 IO_AH17 1562 1 Z
+bit 1562 C 1 *
+bit 1561 I 1 IO_AJ17
+bit 1560 O 1 IO_AJ17 1559 1 Z
+bit 1559 C 1 *
+bit 1558 O 1 *
+bit 1557 O 1 *
+bit 1556 O 1 *
+bit 1555 I 1 IO_AB16
+bit 1554 O 1 IO_AB16 1553 1 Z
+bit 1553 C 1 *
+bit 1552 I 1 IO_AC16
+bit 1551 O 1 IO_AC16 1550 1 Z
+bit 1550 C 1 *
+bit 1549 I 1 IO_AD16
+bit 1548 O 1 IO_AD16 1547 1 Z
+bit 1547 C 1 *
+bit 1546 I 1 IO_AE16
+bit 1545 O 1 IO_AE16 1544 1 Z
+bit 1544 C 1 *
+bit 1543 I 1 IO_AF16
+bit 1542 O 1 IO_AF16 1541 1 Z
+bit 1541 C 1 *
+bit 1540 I 1 IO_AG16
+bit 1539 O 1 IO_AG16 1538 1 Z
+bit 1538 C 1 *
+bit 1537 I 1 IO_AH16
+bit 1536 O 1 IO_AH16 1535 1 Z
+bit 1535 C 1 *
+bit 1534 I 1 IO_AJ16
+bit 1533 O 1 IO_AJ16 1532 1 Z
+bit 1532 C 1 *
+bit 1531 I 1 IO_AK16
+bit 1530 O 1 IO_AK16 1529 1 Z
+bit 1529 C 1 *
+bit 1528 I 1 IO_AK15
+bit 1527 O 1 IO_AK15 1526 1 Z
+bit 1526 C 1 *
+bit 1525 I 1 IO_AJ15
+bit 1524 O 1 IO_AJ15 1523 1 Z
+bit 1523 C 1 *
+bit 1522 I 1 IO_AH15
+bit 1521 O 1 IO_AH15 1520 1 Z
+bit 1520 C 1 *
+bit 1519 I 1 IO_AG15
+bit 1518 O 1 IO_AG15 1517 1 Z
+bit 1517 C 1 *
+bit 1516 I 1 IO_AF15
+bit 1515 O 1 IO_AF15 1514 1 Z
+bit 1514 C 1 *
+bit 1513 I 1 IO_AE15
+bit 1512 O 1 IO_AE15 1511 1 Z
+bit 1511 C 1 *
+bit 1510 I 1 IO_AD15
+bit 1509 O 1 IO_AD15 1508 1 Z
+bit 1508 C 1 *
+bit 1507 I 1 IO_AD14
+bit 1506 O 1 IO_AD14 1505 1 Z
+bit 1505 C 1 *
+bit 1504 I 1 IO_AC15
+bit 1503 O 1 IO_AC15 1502 1 Z
+bit 1502 C 1 *
+bit 1501 I 1 IO_AB15
+bit 1500 O 1 IO_AB15 1499 1 Z
+bit 1499 C 1 *
+bit 1498 I 1 IO_AA15
+bit 1497 O 1 IO_AA15 1496 1 Z
+bit 1496 C 1 *
+bit 1495 I 1 IO_AJ14
+bit 1494 O 1 IO_AJ14 1493 1 Z
+bit 1493 C 1 *
+bit 1492 I 1 IO_AH14
+bit 1491 O 1 IO_AH14 1490 1 Z
+bit 1490 C 1 *
+bit 1489 I 1 IO_AE14
+bit 1488 O 1 IO_AE14 1487 1 Z
+bit 1487 C 1 *
+bit 1486 I 1 IO_AE13
+bit 1485 O 1 IO_AE13 1484 1 Z
+bit 1484 C 1 *
+bit 1483 O 1 *
+bit 1482 O 1 *
+bit 1481 O 1 *
+bit 1480 I 1 IO_AB14
+bit 1479 O 1 IO_AB14 1478 1 Z
+bit 1478 C 1 *
+bit 1477 I 1 IO_AA14
+bit 1476 O 1 IO_AA14 1475 1 Z
+bit 1475 C 1 *
+bit 1474 I 1 IO_AK13
+bit 1473 O 1 IO_AK13 1472 1 Z
+bit 1472 C 1 *
+bit 1471 I 1 IO_AJ13
+bit 1470 O 1 IO_AJ13 1469 1 Z
+bit 1469 C 1 *
+bit 1468 O 1 *
+bit 1467 O 1 *
+bit 1466 O 1 *
+bit 1465 I 1 IO_AG13
+bit 1464 O 1 IO_AG13 1463 1 Z
+bit 1463 C 1 *
+bit 1462 I 1 IO_AF13
+bit 1461 O 1 IO_AF13 1460 1 Z
+bit 1460 C 1 *
+bit 1459 I 1 IO_AC13
+bit 1458 O 1 IO_AC13 1457 1 Z
+bit 1457 C 1 *
+bit 1456 I 1 IO_AB13
+bit 1455 O 1 IO_AB13 1454 1 Z
+bit 1454 C 1 *
+bit 1453 O 1 *
+bit 1452 O 1 *
+bit 1451 O 1 *
+bit 1450 I 1 IO_AA13
+bit 1449 O 1 IO_AA13 1448 1 Z
+bit 1448 C 1 *
+bit 1447 I 1 IO_AA12
+bit 1446 O 1 IO_AA12 1445 1 Z
+bit 1445 C 1 *
+bit 1444 I 1 IO_AK12
+bit 1443 O 1 IO_AK12 1442 1 Z
+bit 1442 C 1 *
+bit 1441 I 1 IO_AJ12
+bit 1440 O 1 IO_AJ12 1439 1 Z
+bit 1439 C 1 *
+bit 1438 O 1 *
+bit 1437 O 1 *
+bit 1436 O 1 *
+bit 1435 I 1 IO_AH12
+bit 1434 O 1 IO_AH12 1433 1 Z
+bit 1433 C 1 *
+bit 1432 I 1 IO_AG12
+bit 1431 O 1 IO_AG12 1430 1 Z
+bit 1430 C 1 *
+bit 1429 I 1 IO_AF12
+bit 1428 O 1 IO_AF12 1427 1 Z
+bit 1427 C 1 *
+bit 1426 I 1 IO_AE12
+bit 1425 O 1 IO_AE12 1424 1 Z
+bit 1424 C 1 *
+bit 1423 O 1 *
+bit 1422 O 1 *
+bit 1421 O 1 *
+bit 1420 I 1 IO_AD12
+bit 1419 O 1 IO_AD12 1418 1 Z
+bit 1418 C 1 *
+bit 1417 I 1 IO_AC12
+bit 1416 O 1 IO_AC12 1415 1 Z
+bit 1415 C 1 *
+bit 1414 I 1 IO_AB12
+bit 1413 O 1 IO_AB12 1412 1 Z
+bit 1412 C 1 *
+bit 1411 I 1 IO_AC11
+bit 1410 O 1 IO_AC11 1409 1 Z
+bit 1409 C 1 *
+bit 1408 O 1 *
+bit 1407 O 1 *
+bit 1406 O 1 *
+bit 1405 I 1 IO_AK11
+bit 1404 O 1 IO_AK11 1403 1 Z
+bit 1403 C 1 *
+bit 1402 I 1 IO_AJ11
+bit 1401 O 1 IO_AJ11 1400 1 Z
+bit 1400 C 1 *
+bit 1399 I 1 IO_AH11
+bit 1398 O 1 IO_AH11 1397 1 Z
+bit 1397 C 1 *
+bit 1396 I 1 IO_AG11
+bit 1395 O 1 IO_AG11 1394 1 Z
+bit 1394 C 1 *
+bit 1393 O 1 *
+bit 1392 O 1 *
+bit 1391 O 1 *
+bit 1390 I 1 IO_AF11
+bit 1389 O 1 IO_AF11 1388 1 Z
+bit 1388 C 1 *
+bit 1387 I 1 IO_AE11
+bit 1386 O 1 IO_AE11 1385 1 Z
+bit 1385 C 1 *
+bit 1384 I 1 IO_AD11
+bit 1383 O 1 IO_AD11 1382 1 Z
+bit 1382 C 1 *
+bit 1381 I 1 IO_AD10
+bit 1380 O 1 IO_AD10 1379 1 Z
+bit 1379 C 1 *
+bit 1378 I 1 IO_AA11
+bit 1377 O 1 IO_AA11 1376 1 Z
+bit 1376 C 1 *
+bit 1375 I 1 IO_AJ10
+bit 1374 O 1 IO_AJ10 1373 1 Z
+bit 1373 C 1 *
+bit 1372 I 1 IO_AH10
+bit 1371 O 1 IO_AH10 1370 1 Z
+bit 1370 C 1 *
+bit 1369 I 1 IO_AE10
+bit 1368 O 1 IO_AE10 1367 1 Z
+bit 1367 C 1 *
+bit 1366 I 1 IO_AE9
+bit 1365 O 1 IO_AE9 1364 1 Z
+bit 1364 C 1 *
+bit 1363 O 1 *
+bit 1362 O 1 *
+bit 1361 O 1 *
+bit 1360 O 1 *
+bit 1359 O 1 *
+bit 1358 O 1 *
+bit 1357 O 1 *
+bit 1356 O 1 *
+bit 1355 O 1 *
+bit 1354 O 1 *
+bit 1353 O 1 *
+bit 1352 O 1 *
+bit 1351 O 1 *
+bit 1350 O 1 *
+bit 1349 O 1 *
+bit 1348 I 1 IO_AB10
+bit 1347 O 1 IO_AB10 1346 1 Z
+bit 1346 C 1 *
+bit 1345 I 1 IO_AK9
+bit 1344 O 1 IO_AK9 1343 1 Z
+bit 1343 C 1 *
+bit 1342 I 1 IO_AJ9
+bit 1341 O 1 IO_AJ9 1340 1 Z
+bit 1340 C 1 *
+bit 1339 I 1 IO_AG9
+bit 1338 O 1 IO_AG9 1337 1 Z
+bit 1337 C 1 *
+bit 1336 I 1 IO_AF9
+bit 1335 O 1 IO_AF9 1334 1 Z
+bit 1334 C 1 *
+bit 1333 O 1 *
+bit 1332 O 1 *
+bit 1331 O 1 *
+bit 1330 I 1 IO_AC9
+bit 1329 O 1 IO_AC9 1328 1 Z
+bit 1328 C 1 *
+bit 1327 I 1 IO_AB9
+bit 1326 O 1 IO_AB9 1325 1 Z
+bit 1325 C 1 *
+bit 1324 I 1 IO_AK8
+bit 1323 O 1 IO_AK8 1322 1 Z
+bit 1322 C 1 *
+bit 1321 I 1 IO_AJ8
+bit 1320 O 1 IO_AJ8 1319 1 Z
+bit 1319 C 1 *
+bit 1318 O 1 *
+bit 1317 O 1 *
+bit 1316 O 1 *
+bit 1315 I 1 IO_AH8
+bit 1314 O 1 IO_AH8 1313 1 Z
+bit 1313 C 1 *
+bit 1312 I 1 IO_AG8
+bit 1311 O 1 IO_AG8 1310 1 Z
+bit 1310 C 1 *
+bit 1309 I 1 IO_AF8
+bit 1308 O 1 IO_AF8 1307 1 Z
+bit 1307 C 1 *
+bit 1306 I 1 IO_AE8
+bit 1305 O 1 IO_AE8 1304 1 Z
+bit 1304 C 1 *
+bit 1303 O 1 *
+bit 1302 O 1 *
+bit 1301 O 1 *
+bit 1300 I 1 IO_AD8
+bit 1299 O 1 IO_AD8 1298 1 Z
+bit 1298 C 1 *
+bit 1297 I 1 IO_AC8
+bit 1296 O 1 IO_AC8 1295 1 Z
+bit 1295 C 1 *
+bit 1294 I 1 IO_AK7
+bit 1293 O 1 IO_AK7 1292 1 Z
+bit 1292 C 1 *
+bit 1291 I 1 IO_AJ7
+bit 1290 O 1 IO_AJ7 1289 1 Z
+bit 1289 C 1 *
+bit 1288 O 1 *
+bit 1287 O 1 *
+bit 1286 O 1 *
+bit 1285 O 1 *
+bit 1284 O 1 *
+bit 1283 O 1 *
+bit 1282 O 1 *
+bit 1281 O 1 *
+bit 1280 O 1 *
+bit 1279 O 1 *
+bit 1278 O 1 *
+bit 1277 O 1 *
+bit 1276 O 1 *
+bit 1275 O 1 *
+bit 1274 O 1 *
+bit 1273 O 1 *
+bit 1272 O 1 *
+bit 1271 O 1 *
+bit 1270 I 1 IO_AH7
+bit 1269 O 1 IO_AH7 1268 1 Z
+bit 1268 C 1 *
+bit 1267 I 1 IO_AG7
+bit 1266 O 1 IO_AG7 1265 1 Z
+bit 1265 C 1 *
+bit 1264 I 1 IO_AE7
+bit 1263 O 1 IO_AE7 1262 1 Z
+bit 1262 C 1 *
+bit 1261 I 1 IO_AD7
+bit 1260 O 1 IO_AD7 1259 1 Z
+bit 1259 C 1 *
+bit 1258 I 1 IO_AE6
+bit 1257 O 1 IO_AE6 1256 1 Z
+bit 1256 C 1 *
+bit 1255 I 1 IO_AJ6
+bit 1254 O 1 IO_AJ6 1253 1 Z
+bit 1253 C 1 *
+bit 1252 I 1 IO_AH6
+bit 1251 O 1 IO_AH6 1250 1 Z
+bit 1250 C 1 *
+bit 1249 I 1 IO_AF6
+bit 1248 O 1 IO_AF6 1247 1 Z
+bit 1247 C 1 *
+bit 1246 I 1 IO_AG5
+bit 1245 O 1 IO_AG5 1244 1 Z
+bit 1244 C 1 *
+bit 1243 I 1 IO_AH4
+bit 1242 O 1 IO_AH4 1241 1 Z
+bit 1241 C 1 *
+bit 1240 I 1 IO_AK5
+bit 1239 O 1 IO_AK5 1238 1 Z
+bit 1238 C 1 *
+bit 1237 I 1 IO_AJ5
+bit 1236 O 1 IO_AJ5 1235 1 Z
+bit 1235 C 1 *
+bit 1234 I 1 IO_AK4
+bit 1233 O 1 IO_AK4 1232 1 Z
+bit 1232 C 1 *
+bit 1231 I 1 IO_AJ4
+bit 1230 O 1 IO_AJ4 1229 1 Z
+bit 1229 C 1 *
+bit 1228 I 1 M2_AK3
+bit 1227 I 1 M0_AJ3
+bit 1226 I 1 M1_AH3
+bit 1225 I 1 IO_AH2
+bit 1224 O 1 IO_AH2 1223 1 Z
+bit 1223 C 1 *
+bit 1222 I 1 IO_AH1
+bit 1221 O 1 IO_AH1 1220 1 Z
+bit 1220 C 1 *
+bit 1219 I 1 IO_AG4
+bit 1218 O 1 IO_AG4 1217 1 Z
+bit 1217 C 1 *
+bit 1216 I 1 IO_AG3
+bit 1215 O 1 IO_AG3 1214 1 Z
+bit 1214 C 1 *
+bit 1213 I 1 IO_AG2
+bit 1212 O 1 IO_AG2 1211 1 Z
+bit 1211 C 1 *
+bit 1210 I 1 IO_AG1
+bit 1209 O 1 IO_AG1 1208 1 Z
+bit 1208 C 1 *
+bit 1207 I 1 IO_AF2
+bit 1206 O 1 IO_AF2 1205 1 Z
+bit 1205 C 1 *
+bit 1204 I 1 IO_AF1
+bit 1203 O 1 IO_AF1 1202 1 Z
+bit 1202 C 1 *
+bit 1201 I 1 IO_AF4
+bit 1200 O 1 IO_AF4 1199 1 Z
+bit 1199 C 1 *
+bit 1198 I 1 IO_AE5
+bit 1197 O 1 IO_AE5 1196 1 Z
+bit 1196 C 1 *
+bit 1195 I 1 IO_AE3
+bit 1194 O 1 IO_AE3 1193 1 Z
+bit 1193 C 1 *
+bit 1192 I 1 IO_AE2
+bit 1191 O 1 IO_AE2 1190 1 Z
+bit 1190 C 1 *
+bit 1189 O 1 *
+bit 1188 O 1 *
+bit 1187 O 1 *
+bit 1186 O 1 *
+bit 1185 O 1 *
+bit 1184 O 1 *
+bit 1183 O 1 *
+bit 1182 O 1 *
+bit 1181 O 1 *
+bit 1180 O 1 *
+bit 1179 O 1 *
+bit 1178 O 1 *
+bit 1177 O 1 *
+bit 1176 O 1 *
+bit 1175 O 1 *
+bit 1174 O 1 *
+bit 1173 O 1 *
+bit 1172 O 1 *
+bit 1171 I 1 IO_AD4
+bit 1170 O 1 IO_AD4 1169 1 Z
+bit 1169 C 1 *
+bit 1168 I 1 IO_AD3
+bit 1167 O 1 IO_AD3 1166 1 Z
+bit 1166 C 1 *
+bit 1165 I 1 IO_AD2
+bit 1164 O 1 IO_AD2 1163 1 Z
+bit 1163 C 1 *
+bit 1162 I 1 IO_AD1
+bit 1161 O 1 IO_AD1 1160 1 Z
+bit 1160 C 1 *
+bit 1159 I 1 IO_AD6
+bit 1158 O 1 IO_AD6 1157 1 Z
+bit 1157 C 1 *
+bit 1156 I 1 IO_AC7
+bit 1155 O 1 IO_AC7 1154 1 Z
+bit 1154 C 1 *
+bit 1153 I 1 IO_AC6
+bit 1152 O 1 IO_AC6 1151 1 Z
+bit 1151 C 1 *
+bit 1150 I 1 IO_AC5
+bit 1149 O 1 IO_AC5 1148 1 Z
+bit 1148 C 1 *
+bit 1147 I 1 IO_AC4
+bit 1146 O 1 IO_AC4 1145 1 Z
+bit 1145 C 1 *
+bit 1144 I 1 IO_AC3
+bit 1143 O 1 IO_AC3 1142 1 Z
+bit 1142 C 1 *
+bit 1141 O 1 *
+bit 1140 O 1 *
+bit 1139 O 1 *
+bit 1138 I 1 IO_AB6
+bit 1137 O 1 IO_AB6 1136 1 Z
+bit 1136 C 1 *
+bit 1135 I 1 IO_AC2
+bit 1134 O 1 IO_AC2 1133 1 Z
+bit 1133 C 1 *
+bit 1132 I 1 IO_AC1
+bit 1131 O 1 IO_AC1 1130 1 Z
+bit 1130 C 1 *
+bit 1129 I 1 IO_AB5
+bit 1128 O 1 IO_AB5 1127 1 Z
+bit 1127 C 1 *
+bit 1126 I 1 IO_AB4
+bit 1125 O 1 IO_AB4 1124 1 Z
+bit 1124 C 1 *
+bit 1123 I 1 IO_AB2
+bit 1122 O 1 IO_AB2 1121 1 Z
+bit 1121 C 1 *
+bit 1120 I 1 IO_AB1
+bit 1119 O 1 IO_AB1 1118 1 Z
+bit 1118 C 1 *
+bit 1117 I 1 IO_AB8
+bit 1116 O 1 IO_AB8 1115 1 Z
+bit 1115 C 1 *
+bit 1114 I 1 IO_AA9
+bit 1113 O 1 IO_AA9 1112 1 Z
+bit 1112 C 1 *
+bit 1111 I 1 IO_AA7
+bit 1110 O 1 IO_AA7 1109 1 Z
+bit 1109 C 1 *
+bit 1108 I 1 IO_AA6
+bit 1107 O 1 IO_AA6 1106 1 Z
+bit 1106 C 1 *
+bit 1105 O 1 *
+bit 1104 O 1 *
+bit 1103 O 1 *
+bit 1102 O 1 *
+bit 1101 O 1 *
+bit 1100 O 1 *
+bit 1099 O 1 *
+bit 1098 O 1 *
+bit 1097 O 1 *
+bit 1096 O 1 *
+bit 1095 O 1 *
+bit 1094 O 1 *
+bit 1093 I 1 IO_AA3
+bit 1092 O 1 IO_AA3 1091 1 Z
+bit 1091 C 1 *
+bit 1090 I 1 IO_AA2
+bit 1089 O 1 IO_AA2 1088 1 Z
+bit 1088 C 1 *
+bit 1087 I 1 IO_AA10
+bit 1086 O 1 IO_AA10 1085 1 Z
+bit 1085 C 1 *
+bit 1084 I 1 IO_Y10
+bit 1083 O 1 IO_Y10 1082 1 Z
+bit 1082 C 1 *
+bit 1081 I 1 IO_Y8
+bit 1080 O 1 IO_Y8 1079 1 Z
+bit 1079 C 1 *
+bit 1078 I 1 IO_Y7
+bit 1077 O 1 IO_Y7 1076 1 Z
+bit 1076 C 1 *
+bit 1075 I 1 IO_Y6
+bit 1074 O 1 IO_Y6 1073 1 Z
+bit 1073 C 1 *
+bit 1072 I 1 IO_Y5
+bit 1071 O 1 IO_Y5 1070 1 Z
+bit 1070 C 1 *
+bit 1069 I 1 IO_Y4
+bit 1068 O 1 IO_Y4 1067 1 Z
+bit 1067 C 1 *
+bit 1066 I 1 IO_Y3
+bit 1065 O 1 IO_Y3 1064 1 Z
+bit 1064 C 1 *
+bit 1063 O 1 *
+bit 1062 O 1 *
+bit 1061 O 1 *
+bit 1060 O 1 *
+bit 1059 O 1 *
+bit 1058 O 1 *
+bit 1057 I 1 IO_Y2
+bit 1056 O 1 IO_Y2 1055 1 Z
+bit 1055 C 1 *
+bit 1054 I 1 IO_Y1
+bit 1053 O 1 IO_Y1 1052 1 Z
+bit 1052 C 1 *
+bit 1051 I 1 IO_W9
+bit 1050 O 1 IO_W9 1049 1 Z
+bit 1049 C 1 *
+bit 1048 I 1 IO_W8
+bit 1047 O 1 IO_W8 1046 1 Z
+bit 1046 C 1 *
+bit 1045 I 1 IO_W7
+bit 1044 O 1 IO_W7 1043 1 Z
+bit 1043 C 1 *
+bit 1042 I 1 IO_W6
+bit 1041 O 1 IO_W6 1040 1 Z
+bit 1040 C 1 *
+bit 1039 I 1 IO_W4
+bit 1038 O 1 IO_W4 1037 1 Z
+bit 1037 C 1 *
+bit 1036 I 1 IO_W3
+bit 1035 O 1 IO_W3 1034 1 Z
+bit 1034 C 1 *
+bit 1033 O 1 *
+bit 1032 O 1 *
+bit 1031 O 1 *
+bit 1030 O 1 *
+bit 1029 O 1 *
+bit 1028 O 1 *
+bit 1027 O 1 *
+bit 1026 O 1 *
+bit 1025 O 1 *
+bit 1024 O 1 *
+bit 1023 O 1 *
+bit 1022 O 1 *
+bit 1021 I 1 IO_W2
+bit 1020 O 1 IO_W2 1019 1 Z
+bit 1019 C 1 *
+bit 1018 I 1 IO_W1
+bit 1017 O 1 IO_W1 1016 1 Z
+bit 1016 C 1 *
+bit 1015 I 1 IO_W10
+bit 1014 O 1 IO_W10 1013 1 Z
+bit 1013 C 1 *
+bit 1012 I 1 IO_V10
+bit 1011 O 1 IO_V10 1010 1 Z
+bit 1010 C 1 *
+bit 1009 I 1 IO_V9
+bit 1008 O 1 IO_V9 1007 1 Z
+bit 1007 C 1 *
+bit 1006 I 1 IO_V8
+bit 1005 O 1 IO_V8 1004 1 Z
+bit 1004 C 1 *
+bit 1003 I 1 IO_W5
+bit 1002 O 1 IO_W5 1001 1 Z
+bit 1001 C 1 *
+bit 1000 I 1 IO_V6
+bit 999 O 1 IO_V6 998 1 Z
+bit 998 C 1 *
+bit 997 I 1 IO_V5
+bit 996 O 1 IO_V5 995 1 Z
+bit 995 C 1 *
+bit 994 I 1 IO_V4
+bit 993 O 1 IO_V4 992 1 Z
+bit 992 C 1 *
+bit 991 O 1 *
+bit 990 O 1 *
+bit 989 O 1 *
+bit 988 O 1 *
+bit 987 O 1 *
+bit 986 O 1 *
+bit 985 I 1 IO_V2
+bit 984 O 1 IO_V2 983 1 Z
+bit 983 C 1 *
+bit 982 I 1 IO_V1
+bit 981 O 1 IO_V1 980 1 Z
+bit 980 C 1 *
+bit 979 I 1 IO_U10
+bit 978 O 1 IO_U10 977 1 Z
+bit 977 C 1 *
+bit 976 I 1 IO_U9
+bit 975 O 1 IO_U9 974 1 Z
+bit 974 C 1 *
+bit 973 I 1 IO_U7
+bit 972 O 1 IO_U7 971 1 Z
+bit 971 C 1 *
+bit 970 I 1 IO_U6
+bit 969 O 1 IO_U6 968 1 Z
+bit 968 C 1 *
+bit 967 I 1 IO_U3
+bit 966 O 1 IO_U3 965 1 Z
+bit 965 C 1 *
+bit 964 I 1 IO_U2
+bit 963 O 1 IO_U2 962 1 Z
+bit 962 C 1 *
+bit 961 I 1 IO_T10
+bit 960 O 1 IO_T10 959 1 Z
+bit 959 C 1 *
+bit 958 I 1 IO_T9
+bit 957 O 1 IO_T9 956 1 Z
+bit 956 C 1 *
+bit 955 O 1 *
+bit 954 O 1 *
+bit 953 O 1 *
+bit 952 O 1 *
+bit 951 O 1 *
+bit 950 O 1 *
+bit 949 O 1 *
+bit 948 O 1 *
+bit 947 O 1 *
+bit 946 O 1 *
+bit 945 O 1 *
+bit 944 O 1 *
+bit 943 O 1 *
+bit 942 O 1 *
+bit 941 O 1 *
+bit 940 O 1 *
+bit 939 O 1 *
+bit 938 O 1 *
+bit 937 I 1 IO_T8
+bit 936 O 1 IO_T8 935 1 Z
+bit 935 C 1 *
+bit 934 I 1 IO_T7
+bit 933 O 1 IO_T7 932 1 Z
+bit 932 C 1 *
+bit 931 I 1 IO_T6
+bit 930 O 1 IO_T6 929 1 Z
+bit 929 C 1 *
+bit 928 I 1 IO_T5
+bit 927 O 1 IO_T5 926 1 Z
+bit 926 C 1 *
+bit 925 I 1 IO_T4
+bit 924 O 1 IO_T4 923 1 Z
+bit 923 C 1 *
+bit 922 I 1 IO_T3
+bit 921 O 1 IO_T3 920 1 Z
+bit 920 C 1 *
+bit 919 I 1 IO_T2
+bit 918 O 1 IO_T2 917 1 Z
+bit 917 C 1 *
+bit 916 I 1 IO_T1
+bit 915 O 1 IO_T1 914 1 Z
+bit 914 C 1 *
+bit 913 I 1 IO_R1
+bit 912 O 1 IO_R1 911 1 Z
+bit 911 C 1 *
+bit 910 I 1 IO_R2
+bit 909 O 1 IO_R2 908 1 Z
+bit 908 C 1 *
+bit 907 I 1 IO_R3
+bit 906 O 1 IO_R3 905 1 Z
+bit 905 C 1 *
+bit 904 I 1 IO_R4
+bit 903 O 1 IO_R4 902 1 Z
+bit 902 C 1 *
+bit 901 I 1 IO_R5
+bit 900 O 1 IO_R5 899 1 Z
+bit 899 C 1 *
+bit 898 I 1 IO_R6
+bit 897 O 1 IO_R6 896 1 Z
+bit 896 C 1 *
+bit 895 I 1 IO_R7
+bit 894 O 1 IO_R7 893 1 Z
+bit 893 C 1 *
+bit 892 I 1 IO_R8
+bit 891 O 1 IO_R8 890 1 Z
+bit 890 C 1 *
+bit 889 O 1 *
+bit 888 O 1 *
+bit 887 O 1 *
+bit 886 O 1 *
+bit 885 O 1 *
+bit 884 O 1 *
+bit 883 O 1 *
+bit 882 O 1 *
+bit 881 O 1 *
+bit 880 O 1 *
+bit 879 O 1 *
+bit 878 O 1 *
+bit 877 O 1 *
+bit 876 O 1 *
+bit 875 O 1 *
+bit 874 O 1 *
+bit 873 O 1 *
+bit 872 O 1 *
+bit 871 I 1 IO_R9
+bit 870 O 1 IO_R9 869 1 Z
+bit 869 C 1 *
+bit 868 I 1 IO_R10
+bit 867 O 1 IO_R10 866 1 Z
+bit 866 C 1 *
+bit 865 I 1 IO_P2
+bit 864 O 1 IO_P2 863 1 Z
+bit 863 C 1 *
+bit 862 I 1 IO_P3
+bit 861 O 1 IO_P3 860 1 Z
+bit 860 C 1 *
+bit 859 I 1 IO_P6
+bit 858 O 1 IO_P6 857 1 Z
+bit 857 C 1 *
+bit 856 I 1 IO_P7
+bit 855 O 1 IO_P7 854 1 Z
+bit 854 C 1 *
+bit 853 I 1 IO_P9
+bit 852 O 1 IO_P9 851 1 Z
+bit 851 C 1 *
+bit 850 I 1 IO_P10
+bit 849 O 1 IO_P10 848 1 Z
+bit 848 C 1 *
+bit 847 I 1 IO_N1
+bit 846 O 1 IO_N1 845 1 Z
+bit 845 C 1 *
+bit 844 I 1 IO_N2
+bit 843 O 1 IO_N2 842 1 Z
+bit 842 C 1 *
+bit 841 O 1 *
+bit 840 O 1 *
+bit 839 O 1 *
+bit 838 O 1 *
+bit 837 O 1 *
+bit 836 O 1 *
+bit 835 I 1 IO_N4
+bit 834 O 1 IO_N4 833 1 Z
+bit 833 C 1 *
+bit 832 I 1 IO_N5
+bit 831 O 1 IO_N5 830 1 Z
+bit 830 C 1 *
+bit 829 I 1 IO_N6
+bit 828 O 1 IO_N6 827 1 Z
+bit 827 C 1 *
+bit 826 I 1 IO_M5
+bit 825 O 1 IO_M5 824 1 Z
+bit 824 C 1 *
+bit 823 I 1 IO_N8
+bit 822 O 1 IO_N8 821 1 Z
+bit 821 C 1 *
+bit 820 I 1 IO_N9
+bit 819 O 1 IO_N9 818 1 Z
+bit 818 C 1 *
+bit 817 I 1 IO_N10
+bit 816 O 1 IO_N10 815 1 Z
+bit 815 C 1 *
+bit 814 I 1 IO_M10
+bit 813 O 1 IO_M10 812 1 Z
+bit 812 C 1 *
+bit 811 I 1 IO_M1
+bit 810 O 1 IO_M1 809 1 Z
+bit 809 C 1 *
+bit 808 I 1 IO_M2
+bit 807 O 1 IO_M2 806 1 Z
+bit 806 C 1 *
+bit 805 O 1 *
+bit 804 O 1 *
+bit 803 O 1 *
+bit 802 O 1 *
+bit 801 O 1 *
+bit 800 O 1 *
+bit 799 O 1 *
+bit 798 O 1 *
+bit 797 O 1 *
+bit 796 O 1 *
+bit 795 O 1 *
+bit 794 O 1 *
+bit 793 I 1 IO_M3
+bit 792 O 1 IO_M3 791 1 Z
+bit 791 C 1 *
+bit 790 I 1 IO_M4
+bit 789 O 1 IO_M4 788 1 Z
+bit 788 C 1 *
+bit 787 I 1 IO_M6
+bit 786 O 1 IO_M6 785 1 Z
+bit 785 C 1 *
+bit 784 I 1 IO_M7
+bit 783 O 1 IO_M7 782 1 Z
+bit 782 C 1 *
+bit 781 I 1 IO_M8
+bit 780 O 1 IO_M8 779 1 Z
+bit 779 C 1 *
+bit 778 I 1 IO_M9
+bit 777 O 1 IO_M9 776 1 Z
+bit 776 C 1 *
+bit 775 I 1 IO_L1
+bit 774 O 1 IO_L1 773 1 Z
+bit 773 C 1 *
+bit 772 I 1 IO_L2
+bit 771 O 1 IO_L2 770 1 Z
+bit 770 C 1 *
+bit 769 O 1 *
+bit 768 O 1 *
+bit 767 O 1 *
+bit 766 O 1 *
+bit 765 O 1 *
+bit 764 O 1 *
+bit 763 I 1 IO_L3
+bit 762 O 1 IO_L3 761 1 Z
+bit 761 C 1 *
+bit 760 I 1 IO_L4
+bit 759 O 1 IO_L4 758 1 Z
+bit 758 C 1 *
+bit 757 I 1 IO_L5
+bit 756 O 1 IO_L5 755 1 Z
+bit 755 C 1 *
+bit 754 I 1 IO_L6
+bit 753 O 1 IO_L6 752 1 Z
+bit 752 C 1 *
+bit 751 I 1 IO_L7
+bit 750 O 1 IO_L7 749 1 Z
+bit 749 C 1 *
+bit 748 I 1 IO_L8
+bit 747 O 1 IO_L8 746 1 Z
+bit 746 C 1 *
+bit 745 I 1 IO_L10
+bit 744 O 1 IO_L10 743 1 Z
+bit 743 C 1 *
+bit 742 I 1 IO_K10
+bit 741 O 1 IO_K10 740 1 Z
+bit 740 C 1 *
+bit 739 I 1 IO_K2
+bit 738 O 1 IO_K2 737 1 Z
+bit 737 C 1 *
+bit 736 I 1 IO_K3
+bit 735 O 1 IO_K3 734 1 Z
+bit 734 C 1 *
+bit 733 O 1 *
+bit 732 O 1 *
+bit 731 O 1 *
+bit 730 O 1 *
+bit 729 O 1 *
+bit 728 O 1 *
+bit 727 O 1 *
+bit 726 O 1 *
+bit 725 O 1 *
+bit 724 O 1 *
+bit 723 O 1 *
+bit 722 O 1 *
+bit 721 I 1 IO_K6
+bit 720 O 1 IO_K6 719 1 Z
+bit 719 C 1 *
+bit 718 I 1 IO_K7
+bit 717 O 1 IO_K7 716 1 Z
+bit 716 C 1 *
+bit 715 I 1 IO_K9
+bit 714 O 1 IO_K9 713 1 Z
+bit 713 C 1 *
+bit 712 I 1 IO_J8
+bit 711 O 1 IO_J8 710 1 Z
+bit 710 C 1 *
+bit 709 I 1 IO_J1
+bit 708 O 1 IO_J1 707 1 Z
+bit 707 C 1 *
+bit 706 I 1 IO_J2
+bit 705 O 1 IO_J2 704 1 Z
+bit 704 C 1 *
+bit 703 I 1 IO_J4
+bit 702 O 1 IO_J4 701 1 Z
+bit 701 C 1 *
+bit 700 I 1 IO_J5
+bit 699 O 1 IO_J5 698 1 Z
+bit 698 C 1 *
+bit 697 I 1 IO_H1
+bit 696 O 1 IO_H1 695 1 Z
+bit 695 C 1 *
+bit 694 I 1 IO_H2
+bit 693 O 1 IO_H2 692 1 Z
+bit 692 C 1 *
+bit 691 I 1 IO_J6
+bit 690 O 1 IO_J6 689 1 Z
+bit 689 C 1 *
+bit 688 O 1 *
+bit 687 O 1 *
+bit 686 O 1 *
+bit 685 I 1 IO_H3
+bit 684 O 1 IO_H3 683 1 Z
+bit 683 C 1 *
+bit 682 I 1 IO_H4
+bit 681 O 1 IO_H4 680 1 Z
+bit 680 C 1 *
+bit 679 I 1 IO_H5
+bit 678 O 1 IO_H5 677 1 Z
+bit 677 C 1 *
+bit 676 I 1 IO_H6
+bit 675 O 1 IO_H6 674 1 Z
+bit 674 C 1 *
+bit 673 I 1 IO_H7
+bit 672 O 1 IO_H7 671 1 Z
+bit 671 C 1 *
+bit 670 I 1 IO_G6
+bit 669 O 1 IO_G6 668 1 Z
+bit 668 C 1 *
+bit 667 I 1 IO_G1
+bit 666 O 1 IO_G1 665 1 Z
+bit 665 C 1 *
+bit 664 I 1 IO_G2
+bit 663 O 1 IO_G2 662 1 Z
+bit 662 C 1 *
+bit 661 I 1 IO_G3
+bit 660 O 1 IO_G3 659 1 Z
+bit 659 C 1 *
+bit 658 I 1 IO_G4
+bit 657 O 1 IO_G4 656 1 Z
+bit 656 C 1 *
+bit 655 O 1 *
+bit 654 O 1 *
+bit 653 O 1 *
+bit 652 O 1 *
+bit 651 O 1 *
+bit 650 O 1 *
+bit 649 O 1 *
+bit 648 O 1 *
+bit 647 O 1 *
+bit 646 O 1 *
+bit 645 O 1 *
+bit 644 O 1 *
+bit 643 O 1 *
+bit 642 O 1 *
+bit 641 O 1 *
+bit 640 O 1 *
+bit 639 O 1 *
+bit 638 O 1 *
+bit 637 I 1 IO_F2
+bit 636 O 1 IO_F2 635 1 Z
+bit 635 C 1 *
+bit 634 I 1 IO_F3
+bit 633 O 1 IO_F3 632 1 Z
+bit 632 C 1 *
+bit 631 I 1 IO_F5
+bit 630 O 1 IO_F5 629 1 Z
+bit 629 C 1 *
+bit 628 I 1 IO_E4
+bit 627 O 1 IO_E4 626 1 Z
+bit 626 C 1 *
+bit 625 I 1 IO_E1
+bit 624 O 1 IO_E1 623 1 Z
+bit 623 C 1 *
+bit 622 I 1 IO_E2
+bit 621 O 1 IO_E2 620 1 Z
+bit 620 C 1 *
+bit 619 I 1 IO_D1
+bit 618 O 1 IO_D1 617 1 Z
+bit 617 C 1 *
+bit 616 I 1 IO_D2
+bit 615 O 1 IO_D2 614 1 Z
+bit 614 C 1 *
+bit 613 I 1 IO_D3
+bit 612 O 1 IO_D3 611 1 Z
+bit 611 C 1 *
+bit 610 I 1 IO_D4
+bit 609 O 1 IO_D4 608 1 Z
+bit 608 C 1 *
+bit 607 I 1 IO_C1
+bit 606 O 1 IO_C1 605 1 Z
+bit 605 C 1 *
+bit 604 I 1 IO_C2
+bit 603 O 1 IO_C2 602 1 Z
+bit 602 C 1 *
+bit 601 O 1 *
+bit 600 I 1 HSWAP_EN_A3
+bit 599 I 1 IO_C4
+bit 598 O 1 IO_C4 597 1 Z
+bit 597 C 1 *
+bit 596 I 1 IO_B4
+bit 595 O 1 IO_B4 594 1 Z
+bit 594 C 1 *
+bit 593 I 1 IO_A4
+bit 592 O 1 IO_A4 591 1 Z
+bit 591 C 1 *
+bit 590 I 1 IO_B5
+bit 589 O 1 IO_B5 588 1 Z
+bit 588 C 1 *
+bit 587 I 1 IO_A5
+bit 586 O 1 IO_A5 585 1 Z
+bit 585 C 1 *
+bit 584 O 1 *
+bit 583 O 1 *
+bit 582 O 1 *
+bit 581 I 1 IO_D5
+bit 580 O 1 IO_D5 579 1 Z
+bit 579 C 1 *
+bit 578 I 1 IO_E6
+bit 577 O 1 IO_E6 576 1 Z
+bit 576 C 1 *
+bit 575 I 1 IO_C6
+bit 574 O 1 IO_C6 573 1 Z
+bit 573 C 1 *
+bit 572 I 1 IO_B6
+bit 571 O 1 IO_B6 570 1 Z
+bit 570 C 1 *
+bit 569 O 1 *
+bit 568 O 1 *
+bit 567 O 1 *
+bit 566 I 1 IO_F6
+bit 565 O 1 IO_F6 564 1 Z
+bit 564 C 1 *
+bit 563 I 1 IO_F7
+bit 562 O 1 IO_F7 561 1 Z
+bit 561 C 1 *
+bit 560 I 1 IO_D7
+bit 559 O 1 IO_D7 558 1 Z
+bit 558 C 1 *
+bit 557 I 1 IO_C7
+bit 556 O 1 IO_C7 555 1 Z
+bit 555 C 1 *
+bit 554 O 1 *
+bit 553 O 1 *
+bit 552 O 1 *
+bit 551 O 1 *
+bit 550 O 1 *
+bit 549 O 1 *
+bit 548 O 1 *
+bit 547 O 1 *
+bit 546 O 1 *
+bit 545 O 1 *
+bit 544 O 1 *
+bit 543 O 1 *
+bit 542 O 1 *
+bit 541 O 1 *
+bit 540 O 1 *
+bit 539 O 1 *
+bit 538 O 1 *
+bit 537 O 1 *
+bit 536 I 1 IO_B7
+bit 535 O 1 IO_B7 534 1 Z
+bit 534 C 1 *
+bit 533 I 1 IO_A7
+bit 532 O 1 IO_A7 531 1 Z
+bit 531 C 1 *
+bit 530 I 1 IO_G7
+bit 529 O 1 IO_G7 528 1 Z
+bit 528 C 1 *
+bit 527 I 1 IO_H8
+bit 526 O 1 IO_H8 525 1 Z
+bit 525 C 1 *
+bit 524 I 1 IO_G8
+bit 523 O 1 IO_G8 522 1 Z
+bit 522 C 1 *
+bit 521 I 1 IO_F8
+bit 520 O 1 IO_F8 519 1 Z
+bit 519 C 1 *
+bit 518 I 1 IO_E8
+bit 517 O 1 IO_E8 516 1 Z
+bit 516 C 1 *
+bit 515 I 1 IO_D8
+bit 514 O 1 IO_D8 513 1 Z
+bit 513 C 1 *
+bit 512 I 1 IO_C8
+bit 511 O 1 IO_C8 510 1 Z
+bit 510 C 1 *
+bit 509 O 1 *
+bit 508 O 1 *
+bit 507 O 1 *
+bit 506 I 1 IO_B8
+bit 505 O 1 IO_B8 504 1 Z
+bit 504 C 1 *
+bit 503 I 1 IO_A8
+bit 502 O 1 IO_A8 501 1 Z
+bit 501 C 1 *
+bit 500 I 1 IO_J9
+bit 499 O 1 IO_J9 498 1 Z
+bit 498 C 1 *
+bit 497 I 1 IO_H9
+bit 496 O 1 IO_H9 495 1 Z
+bit 495 C 1 *
+bit 494 I 1 IO_F9
+bit 493 O 1 IO_F9 492 1 Z
+bit 492 C 1 *
+bit 491 I 1 IO_E9
+bit 490 O 1 IO_E9 489 1 Z
+bit 489 C 1 *
+bit 488 I 1 IO_D9
+bit 487 O 1 IO_D9 486 1 Z
+bit 486 C 1 *
+bit 485 I 1 IO_B9
+bit 484 O 1 IO_B9 483 1 Z
+bit 483 C 1 *
+bit 482 I 1 IO_A9
+bit 481 O 1 IO_A9 480 1 Z
+bit 480 C 1 *
+bit 479 O 1 *
+bit 478 O 1 *
+bit 477 O 1 *
+bit 476 O 1 *
+bit 475 O 1 *
+bit 474 O 1 *
+bit 473 O 1 *
+bit 472 O 1 *
+bit 471 O 1 *
+bit 470 O 1 *
+bit 469 O 1 *
+bit 468 O 1 *
+bit 467 O 1 *
+bit 466 O 1 *
+bit 465 O 1 *
+bit 464 O 1 *
+bit 463 O 1 *
+bit 462 O 1 *
+bit 461 I 1 IO_G10
+bit 460 O 1 IO_G10 459 1 Z
+bit 459 C 1 *
+bit 458 I 1 IO_F10
+bit 457 O 1 IO_F10 456 1 Z
+bit 456 C 1 *
+bit 455 I 1 IO_C10
+bit 454 O 1 IO_C10 453 1 Z
+bit 453 C 1 *
+bit 452 I 1 IO_B10
+bit 451 O 1 IO_B10 450 1 Z
+bit 450 C 1 *
+bit 449 O 1 *
+bit 448 O 1 *
+bit 447 O 1 *
+bit 446 I 1 IO_J10
+bit 445 O 1 IO_J10 444 1 Z
+bit 444 C 1 *
+bit 443 I 1 IO_K11
+bit 442 O 1 IO_K11 441 1 Z
+bit 441 C 1 *
+bit 440 I 1 IO_H11
+bit 439 O 1 IO_H11 438 1 Z
+bit 438 C 1 *
+bit 437 I 1 IO_G11
+bit 436 O 1 IO_G11 435 1 Z
+bit 435 C 1 *
+bit 434 O 1 *
+bit 433 O 1 *
+bit 432 O 1 *
+bit 431 I 1 IO_F11
+bit 430 O 1 IO_F11 429 1 Z
+bit 429 C 1 *
+bit 428 I 1 IO_E11
+bit 427 O 1 IO_E11 426 1 Z
+bit 426 C 1 *
+bit 425 I 1 IO_D11
+bit 424 O 1 IO_D11 423 1 Z
+bit 423 C 1 *
+bit 422 I 1 IO_C11
+bit 421 O 1 IO_C11 420 1 Z
+bit 420 C 1 *
+bit 419 O 1 *
+bit 418 O 1 *
+bit 417 O 1 *
+bit 416 I 1 IO_B11
+bit 415 O 1 IO_B11 414 1 Z
+bit 414 C 1 *
+bit 413 I 1 IO_A11
+bit 412 O 1 IO_A11 411 1 Z
+bit 411 C 1 *
+bit 410 I 1 IO_K12
+bit 409 O 1 IO_K12 408 1 Z
+bit 408 C 1 *
+bit 407 I 1 IO_J12
+bit 406 O 1 IO_J12 405 1 Z
+bit 405 C 1 *
+bit 404 O 1 *
+bit 403 O 1 *
+bit 402 O 1 *
+bit 401 I 1 IO_H12
+bit 400 O 1 IO_H12 399 1 Z
+bit 399 C 1 *
+bit 398 I 1 IO_G12
+bit 397 O 1 IO_G12 396 1 Z
+bit 396 C 1 *
+bit 395 I 1 IO_F12
+bit 394 O 1 IO_F12 393 1 Z
+bit 393 C 1 *
+bit 392 I 1 IO_E12
+bit 391 O 1 IO_E12 390 1 Z
+bit 390 C 1 *
+bit 389 O 1 *
+bit 388 O 1 *
+bit 387 O 1 *
+bit 386 I 1 IO_D12
+bit 385 O 1 IO_D12 384 1 Z
+bit 384 C 1 *
+bit 383 I 1 IO_C12
+bit 382 O 1 IO_C12 381 1 Z
+bit 381 C 1 *
+bit 380 I 1 IO_B12
+bit 379 O 1 IO_B12 378 1 Z
+bit 378 C 1 *
+bit 377 I 1 IO_A12
+bit 376 O 1 IO_A12 375 1 Z
+bit 375 C 1 *
+bit 374 I 1 IO_K13
+bit 373 O 1 IO_K13 372 1 Z
+bit 372 C 1 *
+bit 371 I 1 IO_J13
+bit 370 O 1 IO_J13 369 1 Z
+bit 369 C 1 *
+bit 368 I 1 IO_H13
+bit 367 O 1 IO_H13 366 1 Z
+bit 366 C 1 *
+bit 365 I 1 IO_F13
+bit 364 O 1 IO_F13 363 1 Z
+bit 363 C 1 *
+bit 362 I 1 IO_E13
+bit 361 O 1 IO_E13 360 1 Z
+bit 360 C 1 *
+bit 359 I 1 IO_D13
+bit 358 O 1 IO_D13 357 1 Z
+bit 357 C 1 *
+bit 356 I 1 IO_B13
+bit 355 O 1 IO_B13 354 1 Z
+bit 354 C 1 *
+bit 353 I 1 IO_A13
+bit 352 O 1 IO_A13 351 1 Z
+bit 351 C 1 *
+bit 350 I 1 IO_K14
+bit 349 O 1 IO_K14 348 1 Z
+bit 348 C 1 *
+bit 347 I 1 IO_J14
+bit 346 O 1 IO_J14 345 1 Z
+bit 345 C 1 *
+bit 344 I 1 IO_K15
+bit 343 O 1 IO_K15 342 1 Z
+bit 342 C 1 *
+bit 341 I 1 IO_G14
+bit 340 O 1 IO_G14 339 1 Z
+bit 339 C 1 *
+bit 338 I 1 IO_F14
+bit 337 O 1 IO_F14 336 1 Z
+bit 336 C 1 *
+bit 335 I 1 IO_C14
+bit 334 O 1 IO_C14 333 1 Z
+bit 333 C 1 *
+bit 332 I 1 IO_B14
+bit 331 O 1 IO_B14 330 1 Z
+bit 330 C 1 *
+bit 329 O 1 *
+bit 328 O 1 *
+bit 327 O 1 *
+bit 326 I 1 IO_J15
+bit 325 O 1 IO_J15 324 1 Z
+bit 324 C 1 *
+bit 323 I 1 IO_H15
+bit 322 O 1 IO_H15 321 1 Z
+bit 321 C 1 *
+bit 320 I 1 IO_G15
+bit 319 O 1 IO_G15 318 1 Z
+bit 318 C 1 *
+bit 317 I 1 IO_F15
+bit 316 O 1 IO_F15 315 1 Z
+bit 315 C 1 *
+bit 314 I 1 IO_E15
+bit 313 O 1 IO_E15 312 1 Z
+bit 312 C 1 *
+bit 311 I 1 IO_D15
+bit 310 O 1 IO_D15 309 1 Z
+bit 309 C 1 *
+bit 308 I 1 IO_C15
+bit 307 O 1 IO_C15 306 1 Z
+bit 306 C 1 *
+bit 305 I 1 IO_B15
+bit 304 O 1 IO_B15 303 1 Z
+bit 303 C 1 *
+bit 302 I 1 IO_A15
+bit 301 O 1 IO_A15 300 1 Z
+bit 300 C 1 *
+bit 299 I 1 IO_A16
+bit 298 O 1 IO_A16 297 1 Z
+bit 297 C 1 *
+bit 296 I 1 IO_B16
+bit 295 O 1 IO_B16 294 1 Z
+bit 294 C 1 *
+bit 293 I 1 IO_C16
+bit 292 O 1 IO_C16 291 1 Z
+bit 291 C 1 *
+bit 290 I 1 IO_D16
+bit 289 O 1 IO_D16 288 1 Z
+bit 288 C 1 *
+bit 287 I 1 IO_E16
+bit 286 O 1 IO_E16 285 1 Z
+bit 285 C 1 *
+bit 284 I 1 IO_F16
+bit 283 O 1 IO_F16 282 1 Z
+bit 282 C 1 *
+bit 281 I 1 IO_G16
+bit 280 O 1 IO_G16 279 1 Z
+bit 279 C 1 *
+bit 278 I 1 IO_H16
+bit 277 O 1 IO_H16 276 1 Z
+bit 276 C 1 *
+bit 275 I 1 IO_J16
+bit 274 O 1 IO_J16 273 1 Z
+bit 273 C 1 *
+bit 272 I 1 IO_K16
+bit 271 O 1 IO_K16 270 1 Z
+bit 270 C 1 *
+bit 269 I 1 IO_J17
+bit 268 O 1 IO_J17 267 1 Z
+bit 267 C 1 *
+bit 266 I 1 IO_B17
+bit 265 O 1 IO_B17 264 1 Z
+bit 264 C 1 *
+bit 263 I 1 IO_C17
+bit 262 O 1 IO_C17 261 1 Z
+bit 261 C 1 *
+bit 260 I 1 IO_F17
+bit 259 O 1 IO_F17 258 1 Z
+bit 258 C 1 *
+bit 257 I 1 IO_G17
+bit 256 O 1 IO_G17 255 1 Z
+bit 255 C 1 *
+bit 254 O 1 *
+bit 253 O 1 *
+bit 252 O 1 *
+bit 251 I 1 IO_K17
+bit 250 O 1 IO_K17 249 1 Z
+bit 249 C 1 *
+bit 248 I 1 IO_K18
+bit 247 O 1 IO_K18 246 1 Z
+bit 246 C 1 *
+bit 245 I 1 IO_A18
+bit 244 O 1 IO_A18 243 1 Z
+bit 243 C 1 *
+bit 242 I 1 IO_B18
+bit 241 O 1 IO_B18 240 1 Z
+bit 240 C 1 *
+bit 239 O 1 *
+bit 238 O 1 *
+bit 237 O 1 *
+bit 236 I 1 IO_D18
+bit 235 O 1 IO_D18 234 1 Z
+bit 234 C 1 *
+bit 233 I 1 IO_E18
+bit 232 O 1 IO_E18 231 1 Z
+bit 231 C 1 *
+bit 230 I 1 IO_H18
+bit 229 O 1 IO_H18 228 1 Z
+bit 228 C 1 *
+bit 227 I 1 IO_J18
+bit 226 O 1 IO_J18 225 1 Z
+bit 225 C 1 *
+bit 224 I 1 IO_F18
+bit 223 O 1 IO_F18 222 1 Z
+bit 222 C 1 *
+bit 221 I 1 IO_A19
+bit 220 O 1 IO_A19 219 1 Z
+bit 219 C 1 *
+bit 218 I 1 IO_B19
+bit 217 O 1 IO_B19 216 1 Z
+bit 216 C 1 *
+bit 215 I 1 IO_C19
+bit 214 O 1 IO_C19 213 1 Z
+bit 213 C 1 *
+bit 212 I 1 IO_D19
+bit 211 O 1 IO_D19 210 1 Z
+bit 210 C 1 *
+bit 209 O 1 *
+bit 208 O 1 *
+bit 207 O 1 *
+bit 206 I 1 IO_E19
+bit 205 O 1 IO_E19 204 1 Z
+bit 204 C 1 *
+bit 203 I 1 IO_F19
+bit 202 O 1 IO_F19 201 1 Z
+bit 201 C 1 *
+bit 200 I 1 IO_G19
+bit 199 O 1 IO_G19 198 1 Z
+bit 198 C 1 *
+bit 197 I 1 IO_H19
+bit 196 O 1 IO_H19 195 1 Z
+bit 195 C 1 *
+bit 194 O 1 *
+bit 193 O 1 *
+bit 192 O 1 *
+bit 191 I 1 IO_J19
+bit 190 O 1 IO_J19 189 1 Z
+bit 189 C 1 *
+bit 188 I 1 IO_K19
+bit 187 O 1 IO_K19 186 1 Z
+bit 186 C 1 *
+bit 185 I 1 IO_A20
+bit 184 O 1 IO_A20 183 1 Z
+bit 183 C 1 *
+bit 182 I 1 IO_B20
+bit 181 O 1 IO_B20 180 1 Z
+bit 180 C 1 *
+bit 179 O 1 *
+bit 178 O 1 *
+bit 177 O 1 *
+bit 176 I 1 IO_C20
+bit 175 O 1 IO_C20 174 1 Z
+bit 174 C 1 *
+bit 173 I 1 IO_D20
+bit 172 O 1 IO_D20 171 1 Z
+bit 171 C 1 *
+bit 170 I 1 IO_E20
+bit 169 O 1 IO_E20 168 1 Z
+bit 168 C 1 *
+bit 167 I 1 IO_F20
+bit 166 O 1 IO_F20 165 1 Z
+bit 165 C 1 *
+bit 164 O 1 *
+bit 163 O 1 *
+bit 162 O 1 *
+bit 161 I 1 IO_G20
+bit 160 O 1 IO_G20 159 1 Z
+bit 159 C 1 *
+bit 158 I 1 IO_H20
+bit 157 O 1 IO_H20 156 1 Z
+bit 156 C 1 *
+bit 155 I 1 IO_B21
+bit 154 O 1 IO_B21 153 1 Z
+bit 153 C 1 *
+bit 152 I 1 IO_C21
+bit 151 O 1 IO_C21 150 1 Z
+bit 150 C 1 *
+bit 149 I 1 IO_K20
+bit 148 O 1 IO_K20 147 1 Z
+bit 147 C 1 *
+bit 146 I 1 IO_F21
+bit 145 O 1 IO_F21 144 1 Z
+bit 144 C 1 *
+bit 143 I 1 IO_G21
+bit 142 O 1 IO_G21 141 1 Z
+bit 141 C 1 *
+bit 140 I 1 IO_A22
+bit 139 O 1 IO_A22 138 1 Z
+bit 138 C 1 *
+bit 137 I 1 IO_B22
+bit 136 O 1 IO_B22 135 1 Z
+bit 135 C 1 *
+bit 134 O 1 *
+bit 133 O 1 *
+bit 132 O 1 *
+bit 131 O 1 *
+bit 130 O 1 *
+bit 129 O 1 *
+bit 128 O 1 *
+bit 127 O 1 *
+bit 126 O 1 *
+bit 125 O 1 *
+bit 124 O 1 *
+bit 123 O 1 *
+bit 122 O 1 *
+bit 121 O 1 *
+bit 120 O 1 *
+bit 119 I 1 IO_J21
+bit 118 O 1 IO_J21 117 1 Z
+bit 117 C 1 *
+bit 116 I 1 IO_D22
+bit 115 O 1 IO_D22 114 1 Z
+bit 114 C 1 *
+bit 113 I 1 IO_E22
+bit 112 O 1 IO_E22 111 1 Z
+bit 111 C 1 *
+bit 110 I 1 IO_F22
+bit 109 O 1 IO_F22 108 1 Z
+bit 108 C 1 *
+bit 107 I 1 IO_E23
+bit 106 O 1 IO_E23 105 1 Z
+bit 105 C 1 *
+bit 104 O 1 *
+bit 103 O 1 *
+bit 102 O 1 *
+bit 101 I 1 IO_H22
+bit 100 O 1 IO_H22 99 1 Z
+bit 99 C 1 *
+bit 98 I 1 IO_J22
+bit 97 O 1 IO_J22 96 1 Z
+bit 96 C 1 *
+bit 95 I 1 IO_A23
+bit 94 O 1 IO_A23 93 1 Z
+bit 93 C 1 *
+bit 92 I 1 IO_B23
+bit 91 O 1 IO_B23 90 1 Z
+bit 90 C 1 *
+bit 89 O 1 *
+bit 88 O 1 *
+bit 87 O 1 *
+bit 86 I 1 IO_C23
+bit 85 O 1 IO_C23 84 1 Z
+bit 84 C 1 *
+bit 83 I 1 IO_D23
+bit 82 O 1 IO_D23 81 1 Z
+bit 81 C 1 *
+bit 80 I 1 IO_F23
+bit 79 O 1 IO_F23 78 1 Z
+bit 78 C 1 *
+bit 77 I 1 IO_G23
+bit 76 O 1 IO_G23 75 1 Z
+bit 75 C 1 *
+bit 74 O 1 *
+bit 73 O 1 *
+bit 72 O 1 *
+bit 71 I 1 IO_H23
+bit 70 O 1 IO_H23 69 1 Z
+bit 69 C 1 *
+bit 68 I 1 IO_G24
+bit 67 O 1 IO_G24 66 1 Z
+bit 66 C 1 *
+bit 65 I 1 IO_A24
+bit 64 O 1 IO_A24 63 1 Z
+bit 63 C 1 *
+bit 62 I 1 IO_B24
+bit 61 O 1 IO_B24 60 1 Z
+bit 60 C 1 *
+bit 59 O 1 *
+bit 58 O 1 *
+bit 57 O 1 *
+bit 56 O 1 *
+bit 55 O 1 *
+bit 54 O 1 *
+bit 53 O 1 *
+bit 52 O 1 *
+bit 51 O 1 *
+bit 50 O 1 *
+bit 49 O 1 *
+bit 48 O 1 *
+bit 47 O 1 *
+bit 46 O 1 *
+bit 45 O 1 *
+bit 44 O 1 *
+bit 43 O 1 *
+bit 42 O 1 *
+bit 41 I 1 IO_C24
+bit 40 O 1 IO_C24 39 1 Z
+bit 39 C 1 *
+bit 38 I 1 IO_D24
+bit 37 O 1 IO_D24 36 1 Z
+bit 36 C 1 *
+bit 35 I 1 IO_F24
+bit 34 O 1 IO_F24 33 1 Z
+bit 33 C 1 *
+bit 32 I 1 IO_F25
+bit 31 O 1 IO_F25 30 1 Z
+bit 30 C 1 *
+bit 29 I 1 IO_E25
+bit 28 O 1 IO_E25 27 1 Z
+bit 27 C 1 *
+bit 26 I 1 IO_B25
+bit 25 O 1 IO_B25 24 1 Z
+bit 24 C 1 *
+bit 23 I 1 IO_C25
+bit 22 O 1 IO_C25 21 1 Z
+bit 21 C 1 *
+bit 20 I 1 IO_A26
+bit 19 O 1 IO_A26 18 1 Z
+bit 18 C 1 *
+bit 17 I 1 IO_B26
+bit 16 O 1 IO_B26 15 1 Z
+bit 15 C 1 *
+bit 14 O 1 *
+bit 13 O 1 *
+bit 12 O 1 *
+bit 11 I 1 IO_D26
+bit 10 O 1 IO_D26 9 1 Z
+bit 9 C 1 *
+bit 8 I 1 IO_C27
+bit 7 O 1 IO_C27 6 1 Z
+bit 6 C 1 *
+bit 5 I 1 IO_A27
+bit 4 O 1 IO_A27 3 1 Z
+bit 3 C 1 *
+bit 2 I 1 IO_B27
+bit 1 O 1 IO_B27 0 1 Z
+bit 0 C 1 *
--- /dev/null
+0000 xc3s500e_fg320 0
--- /dev/null
+signal TCK
+signal TDI
+signal TDO
+signal TMS
+signal PAD100
+signal PAD101
+signal PAD102
+signal PAD60
+signal PAD61
+signal PAD104
+signal IPAD93
+signal PAD62
+signal PAD105
+signal PAD63
+signal PAD106
+signal PAD107
+signal IPAD204
+signal PAD65
+signal PAD109
+signal IPAD98
+signal PAD66
+signal PAD67
+signal PAD69
+signal IPAD209
+signal IPAD137
+signal IPAD138
+signal PAD181
+signal PAD182
+signal PAD183
+signal IPAD21
+signal PAD185
+signal IPAD22
+signal PAD186
+signal PAD187
+signal PAD188
+signal IPAD28
+signal IPAD29
+signal PAD110
+signal PAD111
+signal PAD70
+signal PAD113
+signal PAD71
+signal PAD114
+signal PAD72
+signal PAD115
+signal PAD116
+signal PAD117
+signal PAD74
+signal IPAD214
+signal PAD118
+signal PAD75
+signal PAD76
+signal PAD77
+signal IPAD144
+signal IPAD145
+signal PAD79
+signal IPAD219
+signal PAD190
+signal PAD191
+signal PAD192
+signal PAD193
+signal PAD195
+signal PAD196
+signal PAD197
+signal PAD198
+signal IPAD35
+signal IPAD36
+signal PAD120
+signal DONE
+signal PAD121
+signal PAD122
+signal PAD80
+signal PAD123
+signal PAD81
+signal PAD124
+signal PAD82
+signal PAD127
+signal PAD84
+signal IPAD151
+signal PAD128
+signal PAD85
+signal IPAD224
+signal IPAD152
+signal PAD86
+signal PAD87
+signal IPAD228
+signal PAD89
+signal IPAD3
+signal IPAD158
+signal IPAD159
+signal IPAD9
+signal PAD11
+signal IPAD42
+signal PAD12
+signal IPAD43
+signal PAD14
+signal IPAD46
+signal PAD15
+signal PAD16
+signal PAD17
+signal PAD18
+signal PAD19
+signal PAD200
+signal PAD201
+signal PAD202
+signal PAD203
+signal PAD130
+signal PAD131
+signal PAD205
+signal PAD132
+signal PAD90
+signal PAD206
+signal PAD133
+signal PAD91
+signal PAD207
+signal PAD134
+signal PAD208
+signal PAD92
+signal PAD135
+signal PAD136
+signal PAD94
+signal PAD95
+signal IPAD162
+signal PAD139
+signal PAD96
+signal PAD97
+signal PAD99
+signal PAD20
+signal IPAD54
+signal PAD23
+signal IPAD55
+signal PAD24
+signal PAD25
+signal PAD26
+signal IPAD58
+signal PAD27
+signal IPAD59
+signal PAD210
+signal PAD211
+signal PAD212
+signal PAD140
+signal PAD213
+signal PAD141
+signal PAD142
+signal PAD215
+signal PAD143
+signal PAD216
+signal PAD217
+signal PAD218
+signal PAD146
+signal PAD147
+signal IPAD170
+signal PAD148
+signal IPAD171
+signal PAD149
+signal IPAD174
+signal IPAD175
+signal PAD30
+signal PAD31
+signal PAD32
+signal IPAD64
+signal PAD33
+signal PAD34
+signal PAD1
+signal PAD2
+signal IPAD68
+signal PAD37
+signal PAD4
+signal IPAD103
+signal PAD5
+signal PAD38
+signal PAD6
+signal PAD39
+signal PAD220
+signal PAD7
+signal PAD221
+signal PAD8
+signal PAD222
+signal IPAD108
+signal PAD150
+signal PAD223
+signal PAD225
+signal PAD153
+signal PAD226
+signal PAD154
+signal PAD227
+signal PAD155
+signal PAD156
+signal PAD229
+signal PAD157
+signal IPAD180
+signal IPAD184
+signal IPAD189
+signal PAD40
+signal PAD41
+signal IPAD73
+signal PAD44
+signal PAD45
+signal IPAD112
+signal IPAD78
+signal PAD47
+signal PAD48
+signal PAD49
+signal PAD230
+signal PAD231
+signal PAD232
+signal IPAD119
+signal PAD160
+signal PAD161
+signal PAD163
+signal PAD164
+signal PAD165
+signal PAD166
+signal PAD167
+signal PAD168
+signal PAD169
+signal PROG_B
+signal IPAD194
+signal IPAD199
+signal PAD50
+signal PAD51
+signal IPAD83
+signal PAD52
+signal PAD53
+signal IPAD88
+signal PAD56
+signal PAD57
+signal IPAD125
+signal IPAD126
+signal IPAD129
+signal PAD172
+signal IPAD10
+signal PAD173
+signal PAD176
+signal IPAD13
+signal PAD177
+signal PAD178
+signal PAD179
+signal GND0
+signal GND1
+signal GND2
+signal GND3
+signal GND4
+signal GND5
+signal GND6
+signal GND7
+signal GND8
+signal GND9
+signal GND10
+signal GND11
+signal GND12
+signal GND13
+signal GND14
+signal GND15
+signal GND16
+signal GND17
+signal GND18
+signal GND19
+signal GND20
+signal GND21
+signal GND22
+signal GND23
+signal GND24
+signal GND25
+signal GND26
+signal VDD0
+signal VDD1
+signal VDD2
+signal VDD3
+signal VDD4
+signal VDD5
+signal VDD6
+signal VDD7
+signal VDD8
+signal VDD9
+signal VDD10
+signal VDD11
+signal VDD12
+signal VDD13
+signal VDD14
+signal VDD15
+signal VDD16
+signal VDD17
+signal VDD18
+signal VDD19
+signal VDD20
+signal VDD21
+signal VDD22
+signal VDD23
+signal VDD24
+signal VDD25
+signal VDD26
+signal VDD27
+signal Vaux0
+signal Vaux1
+signal Vaux2
+signal Vaux3
+signal Vaux4
+signal Vaux5
+signal Vaux6
+
+register BSR 588
+register BR 1
+register DIR 32
+
+instruction length 6
+
+instruction SAMPLE/PRELOAD 100000 BSR
+instruction IDCODE 100100 DIR
+instruction EXTEST 111100 BSR
+instruction BYPASS 111111 BR
+
+bit 587 I 1 IPAD59
+bit 586 I 1 PAD60
+bit 585 O 1 PAD60 584 0 Z
+bit 584 C 0 *
+bit 583 I 1 PAD61
+bit 582 O 1 PAD61 581 0 Z
+bit 581 C 0 *
+bit 580 I 1 PAD62
+bit 579 O 1 PAD62 578 0 Z
+bit 578 C 0 *
+bit 577 I 1 PAD63
+bit 576 O 1 PAD63 575 0 Z
+bit 575 C 0 *
+bit 574 I 1 IPAD64
+bit 573 I 1 PAD65
+bit 572 O 1 PAD65 571 0 Z
+bit 571 C 0 *
+bit 570 I 1 PAD66
+bit 569 O 1 PAD66 568 0 Z
+bit 568 C 0 *
+bit 567 I 1 PAD67
+bit 566 O 1 PAD67 565 0 Z
+bit 565 C 0 *
+bit 564 I 1 IPAD68
+bit 563 I 1 PAD69
+bit 562 O 1 PAD69 561 0 Z
+bit 561 C 0 *
+bit 560 I 1 PAD70
+bit 559 O 1 PAD70 558 0 Z
+bit 558 C 0 *
+bit 557 I 1 PAD71
+bit 556 O 1 PAD71 555 0 Z
+bit 555 C 0 *
+bit 554 I 1 PAD72
+bit 553 O 1 PAD72 552 0 Z
+bit 552 C 0 *
+bit 551 I 1 IPAD73
+bit 550 I 1 PAD74
+bit 549 O 1 PAD74 548 0 Z
+bit 548 C 0 *
+bit 547 I 1 PAD75
+bit 546 O 1 PAD75 545 0 Z
+bit 545 C 0 *
+bit 544 I 1 PAD76
+bit 543 O 1 PAD76 542 0 Z
+bit 542 C 0 *
+bit 541 I 1 PAD77
+bit 540 O 1 PAD77 539 0 Z
+bit 539 C 0 *
+bit 538 I 1 IPAD78
+bit 537 I 1 PAD79
+bit 536 O 1 PAD79 535 0 Z
+bit 535 C 0 *
+bit 534 I 1 PAD80
+bit 533 O 1 PAD80 532 0 Z
+bit 532 C 0 *
+bit 531 I 1 PAD81
+bit 530 O 1 PAD81 529 0 Z
+bit 529 C 0 *
+bit 528 I 1 PAD82
+bit 527 O 1 PAD82 526 0 Z
+bit 526 C 0 *
+bit 525 I 1 IPAD83
+bit 524 I 1 PAD84
+bit 523 O 1 PAD84 522 0 Z
+bit 522 C 0 *
+bit 521 I 1 PAD85
+bit 520 O 1 PAD85 519 0 Z
+bit 519 C 0 *
+bit 518 I 1 PAD86
+bit 517 O 1 PAD86 516 0 Z
+bit 516 C 0 *
+bit 515 I 1 PAD87
+bit 514 O 1 PAD87 513 0 Z
+bit 513 C 0 *
+bit 512 I 1 IPAD88
+bit 511 I 1 PAD89
+bit 510 O 1 PAD89 509 0 Z
+bit 509 C 0 *
+bit 508 I 1 PAD90
+bit 507 O 1 PAD90 506 0 Z
+bit 506 C 0 *
+bit 505 I 1 PAD91
+bit 504 O 1 PAD91 503 0 Z
+bit 503 C 0 *
+bit 502 I 1 PAD92
+bit 501 O 1 PAD92 500 0 Z
+bit 500 C 0 *
+bit 499 I 1 IPAD93
+bit 498 I 1 PAD94
+bit 497 O 1 PAD94 496 0 Z
+bit 496 C 0 *
+bit 495 I 1 PAD95
+bit 494 O 1 PAD95 493 0 Z
+bit 493 C 0 *
+bit 492 I 1 PAD96
+bit 491 O 1 PAD96 490 0 Z
+bit 490 C 0 *
+bit 489 I 1 PAD97
+bit 488 O 1 PAD97 487 0 Z
+bit 487 C 0 *
+bit 486 I 1 IPAD98
+bit 485 I 1 PAD99
+bit 484 O 1 PAD99 483 0 Z
+bit 483 C 0 *
+bit 482 I 1 PAD100
+bit 481 O 1 PAD100 480 0 Z
+bit 480 C 0 *
+bit 479 I 1 PAD101
+bit 478 O 1 PAD101 477 0 Z
+bit 477 C 0 *
+bit 476 I 1 PAD102
+bit 475 O 1 PAD102 474 0 Z
+bit 474 C 0 *
+bit 473 I 1 IPAD103
+bit 472 I 1 PAD104
+bit 471 O 1 PAD104 470 0 Z
+bit 470 C 0 *
+bit 469 I 1 PAD105
+bit 468 O 1 PAD105 467 0 Z
+bit 467 C 0 *
+bit 466 I 1 PAD106
+bit 465 O 1 PAD106 464 0 Z
+bit 464 C 0 *
+bit 463 I 1 PAD107
+bit 462 O 1 PAD107 461 0 Z
+bit 461 C 0 *
+bit 460 I 1 IPAD108
+bit 459 I 1 PAD109
+bit 458 O 1 *
+bit 457 O 1 *
+bit 456 I 1 PAD110
+bit 455 O 1 *
+bit 454 O 1 *
+bit 453 I 1 PAD111
+bit 452 O 1 *
+bit 451 O 1 *
+bit 450 I 1 IPAD112
+bit 449 I 1 PAD113
+bit 448 O 1 *
+bit 447 O 1 *
+bit 446 I 1 PAD114
+bit 445 O 1 *
+bit 444 O 1 *
+bit 443 I 1 PAD115
+bit 442 O 1 *
+bit 441 O 1 *
+bit 440 I 1 PAD116
+bit 439 O 1 *
+bit 438 O 1 *
+bit 437 I 1 DONE
+bit 436 O 1 PAD109 435 0 Z
+bit 435 C 0 *
+bit 434 I 1 PAD117
+bit 433 O 1 PAD110 432 0 Z
+bit 432 C 0 *
+bit 431 I 1 PAD118
+bit 430 O 1 *
+bit 429 O 1 *
+bit 428 I 1 IPAD119
+bit 427 I 1 PAD120
+bit 426 O 1 *
+bit 425 O 1 *
+bit 424 I 1 PAD121
+bit 423 O 1 *
+bit 422 O 1 *
+bit 421 I 1 PAD122
+bit 420 O 1 *
+bit 419 O 1 *
+bit 418 I 1 PAD123
+bit 417 O 1 *
+bit 416 O 1 *
+bit 415 I 1 PAD124
+bit 414 O 1 *
+bit 413 O 1 *
+bit 412 I 1 IPAD125
+bit 411 I 1 IPAD126
+bit 410 I 1 PAD127
+bit 409 O 1 *
+bit 408 O 1 *
+bit 407 I 1 PAD128
+bit 406 O 1 *
+bit 405 O 1 *
+bit 404 I 1 IPAD129
+bit 403 I 1 PAD130
+bit 402 O 1 *
+bit 401 O 1 *
+bit 400 I 1 PAD131
+bit 399 O 1 *
+bit 398 O 1 *
+bit 397 I 1 PAD132
+bit 396 O 1 *
+bit 395 O 1 *
+bit 394 I 1 PAD133
+bit 393 O 1 *
+bit 392 O 1 *
+bit 391 I 1 PAD134
+bit 390 O 1 *
+bit 389 O 1 *
+bit 388 I 1 PAD135
+bit 387 O 1 *
+bit 386 O 1 *
+bit 385 I 1 PAD136
+bit 384 O 1 *
+bit 383 O 1 *
+bit 382 I 1 IPAD137
+bit 381 I 1 IPAD138
+bit 380 I 1 PAD139
+bit 379 O 1 *
+bit 378 O 1 *
+bit 377 I 1 PAD140
+bit 376 O 1 *
+bit 375 O 1 *
+bit 374 I 1 PAD141
+bit 373 O 1 *
+bit 372 O 1 *
+bit 371 I 1 PAD142
+bit 370 O 1 PAD113 369 0 Z
+bit 369 C 0 *
+bit 368 I 1 PAD143
+bit 367 O 1 IPAD112 366 0 Z
+bit 366 C 0 *
+bit 365 I 1 IPAD144
+bit 364 I 1 IPAD145
+bit 363 I 1 PAD146
+bit 362 O 1 *
+bit 361 O 1 *
+bit 360 I 1 PAD147
+bit 359 O 1 *
+bit 358 O 1 *
+bit 357 I 1 PAD148
+bit 356 O 1 *
+bit 355 O 1 *
+bit 354 I 1 PAD149
+bit 353 O 1 *
+bit 352 O 1 *
+bit 351 I 1 PAD150
+bit 350 O 1 *
+bit 349 O 1 *
+bit 348 I 1 IPAD151
+bit 347 I 1 IPAD152
+bit 346 I 1 PAD153
+bit 345 O 1 *
+bit 344 O 1 *
+bit 343 I 1 PAD154
+bit 342 O 1 *
+bit 341 O 1 *
+bit 340 I 1 PAD155
+bit 339 O 1 *
+bit 338 O 1 *
+bit 337 I 1 PAD156
+bit 336 O 1 *
+bit 335 O 1 *
+bit 334 I 1 PAD157
+bit 333 O 1 *
+bit 332 O 1 *
+bit 331 I 1 IPAD158
+bit 330 I 1 IPAD159
+bit 329 I 1 PAD160
+bit 328 O 1 *
+bit 327 O 1 *
+bit 326 I 1 PAD161
+bit 325 O 1 *
+bit 324 O 1 *
+bit 323 I 1 IPAD162
+bit 322 I 1 PAD163
+bit 321 O 1 *
+bit 320 O 1 *
+bit 319 I 1 PAD164
+bit 318 O 1 *
+bit 317 O 1 *
+bit 316 I 1 PAD165
+bit 315 O 1 *
+bit 314 O 1 *
+bit 313 I 1 PAD166
+bit 312 O 1 *
+bit 311 O 1 *
+bit 310 I 1 PAD167
+bit 309 O 1 *
+bit 308 O 1 *
+bit 307 I 1 PAD168
+bit 306 O 1 *
+bit 305 O 1 *
+bit 304 I 1 PAD169
+bit 303 O 1 *
+bit 302 O 1 *
+bit 301 I 1 IPAD170
+bit 300 I 1 IPAD171
+bit 299 I 1 PAD172
+bit 298 O 1 *
+bit 297 O 1 *
+bit 296 I 1 PAD173
+bit 295 O 1 *
+bit 294 O 1 *
+bit 293 I 1 IPAD174
+bit 292 I 1 IPAD175
+bit 291 I 1 PAD176
+bit 290 O 1 *
+bit 289 O 1 *
+bit 288 I 1 PAD177
+bit 287 O 1 *
+bit 286 O 1 *
+bit 285 I 1 PAD178
+bit 284 O 1 *
+bit 283 O 1 *
+bit 282 I 1 PAD179
+bit 281 O 1 *
+bit 280 O 1 *
+bit 279 I 1 IPAD180
+bit 278 I 1 PAD181
+bit 277 O 1 *
+bit 276 O 1 *
+bit 275 I 1 PAD182
+bit 274 O 1 *
+bit 273 O 1 *
+bit 272 I 1 PAD183
+bit 271 O 1 *
+bit 270 O 1 *
+bit 269 I 1 IPAD184
+bit 268 I 1 PAD185
+bit 267 O 1 *
+bit 266 O 1 *
+bit 265 I 1 PAD186
+bit 264 O 1 *
+bit 263 O 1 *
+bit 262 I 1 PAD187
+bit 261 O 1 *
+bit 260 O 1 *
+bit 259 I 1 PAD188
+bit 258 O 1 *
+bit 257 O 1 *
+bit 256 I 1 IPAD189
+bit 255 I 1 PAD190
+bit 254 O 1 *
+bit 253 O 1 *
+bit 252 I 1 PAD191
+bit 251 O 1 *
+bit 250 O 1 *
+bit 249 I 1 PAD192
+bit 248 O 1 *
+bit 247 O 1 *
+bit 246 I 1 PAD193
+bit 245 O 1 *
+bit 244 O 1 *
+bit 243 I 1 IPAD194
+bit 242 I 1 PAD195
+bit 241 O 1 *
+bit 240 O 1 *
+bit 239 I 1 PAD196
+bit 238 O 1 *
+bit 237 O 1 *
+bit 236 I 1 PAD197
+bit 235 O 1 *
+bit 234 O 1 *
+bit 233 I 1 PAD198
+bit 232 O 1 *
+bit 231 O 1 *
+bit 230 I 1 IPAD199
+bit 229 I 1 PAD200
+bit 228 O 1 *
+bit 227 O 1 *
+bit 226 I 1 PAD201
+bit 225 O 1 *
+bit 224 O 1 *
+bit 223 I 1 PAD202
+bit 222 O 1 *
+bit 221 O 1 *
+bit 220 I 1 PAD203
+bit 219 O 1 *
+bit 218 O 1 *
+bit 217 I 1 IPAD204
+bit 216 I 1 PAD205
+bit 215 O 1 *
+bit 214 O 1 *
+bit 213 I 1 PAD206
+bit 212 O 1 *
+bit 211 O 1 *
+bit 210 I 1 PAD207
+bit 209 O 1 *
+bit 208 O 1 *
+bit 207 I 1 PAD208
+bit 206 O 1 *
+bit 205 O 1 *
+bit 204 I 1 IPAD209
+bit 203 I 1 PAD210
+bit 202 O 1 *
+bit 201 O 1 *
+bit 200 I 1 PAD211
+bit 199 O 1 *
+bit 198 O 1 *
+bit 197 I 1 PAD212
+bit 196 O 1 *
+bit 195 O 1 *
+bit 194 I 1 PAD213
+bit 193 O 1 *
+bit 192 O 1 *
+bit 191 I 1 IPAD214
+bit 190 I 1 PAD215
+bit 189 O 1 *
+bit 188 O 1 *
+bit 187 I 1 PAD216
+bit 186 O 1 *
+bit 185 O 1 *
+bit 184 I 1 PAD217
+bit 183 O 1 *
+bit 182 O 1 *
+bit 181 I 1 PAD218
+bit 180 O 1 *
+bit 179 O 1 *
+bit 178 I 1 IPAD219
+bit 177 I 1 PAD220
+bit 176 O 1 *
+bit 175 O 1 *
+bit 174 I 1 PAD221
+bit 173 O 1 *
+bit 172 O 1 *
+bit 171 I 1 PAD222
+bit 170 O 1 *
+bit 169 O 1 *
+bit 168 I 1 PAD223
+bit 167 O 1 *
+bit 166 O 1 *
+bit 165 I 1 IPAD224
+bit 164 I 1 PAD225
+bit 163 O 1 *
+bit 162 O 1 *
+bit 161 I 1 PAD226
+bit 160 O 1 *
+bit 159 O 1 *
+bit 158 I 1 PAD227
+bit 157 O 1 *
+bit 156 O 1 *
+bit 155 I 1 IPAD228
+bit 154 I 1 PAD229
+bit 153 O 1 *
+bit 152 O 1 *
+bit 151 I 1 PAD230
+bit 150 O 1 *
+bit 149 O 1 *
+bit 148 I 1 PAD231
+bit 147 O 1 *
+bit 146 O 1 *
+bit 145 I 1 PAD232
+bit 144 O 1 *
+bit 143 O 1 *
+bit 142 I 1 PROG_B
+bit 141 I 1 PAD1
+bit 140 O 1 PAD1 139 0 Z
+bit 139 C 0 *
+bit 138 I 1 PAD2
+bit 137 O 1 PAD2 136 0 Z
+bit 136 C 0 *
+bit 135 I 1 IPAD3
+bit 134 I 1 PAD4
+bit 133 O 1 PAD4 132 0 Z
+bit 132 C 0 *
+bit 131 I 1 PAD5
+bit 130 O 1 PAD5 129 0 Z
+bit 129 C 0 *
+bit 128 I 1 PAD6
+bit 127 O 1 PAD6 126 0 Z
+bit 126 C 0 *
+bit 125 I 1 PAD7
+bit 124 O 1 PAD7 123 0 Z
+bit 123 C 0 *
+bit 122 I 1 PAD8
+bit 121 O 1 PAD8 120 0 Z
+bit 120 C 0 *
+bit 119 I 1 IPAD9
+bit 118 I 1 IPAD10
+bit 117 I 1 PAD11
+bit 116 O 1 PAD11 115 0 Z
+bit 115 C 0 *
+bit 114 I 1 PAD12
+bit 113 O 1 PAD12 112 0 Z
+bit 112 C 0 *
+bit 111 I 1 IPAD13
+bit 110 I 1 PAD14
+bit 109 O 1 PAD14 108 0 Z
+bit 108 C 0 *
+bit 107 I 1 PAD15
+bit 106 O 1 PAD15 105 0 Z
+bit 105 C 0 *
+bit 104 I 1 PAD16
+bit 103 O 1 PAD16 102 0 Z
+bit 102 C 0 *
+bit 101 I 1 PAD17
+bit 100 O 1 PAD17 99 0 Z
+bit 99 C 0 *
+bit 98 I 1 PAD18
+bit 97 O 1 PAD18 96 0 Z
+bit 96 C 0 *
+bit 95 I 1 PAD19
+bit 94 O 1 PAD19 93 0 Z
+bit 93 C 0 *
+bit 92 I 1 PAD20
+bit 91 O 1 PAD20 90 0 Z
+bit 90 C 0 *
+bit 89 I 1 IPAD21
+bit 88 I 1 IPAD22
+bit 87 I 1 PAD23
+bit 86 O 1 PAD23 85 0 Z
+bit 85 C 0 *
+bit 84 I 1 PAD24
+bit 83 O 1 PAD24 82 0 Z
+bit 82 C 0 *
+bit 81 I 1 PAD25
+bit 80 O 1 PAD25 79 0 Z
+bit 79 C 0 *
+bit 78 I 1 PAD26
+bit 77 O 1 PAD26 76 0 Z
+bit 76 C 0 *
+bit 75 I 1 PAD27
+bit 74 O 1 PAD27 73 0 Z
+bit 73 C 0 *
+bit 72 I 1 IPAD28
+bit 71 I 1 IPAD29
+bit 70 I 1 PAD30
+bit 69 O 1 PAD30 68 0 Z
+bit 68 C 0 *
+bit 67 I 1 PAD31
+bit 66 O 1 PAD31 65 0 Z
+bit 65 C 0 *
+bit 64 I 1 PAD32
+bit 63 O 1 PAD32 62 0 Z
+bit 62 C 0 *
+bit 61 I 1 PAD33
+bit 60 O 1 PAD33 59 0 Z
+bit 59 C 0 *
+bit 58 I 1 PAD34
+bit 57 O 1 PAD34 56 0 Z
+bit 56 C 0 *
+bit 55 I 1 IPAD35
+bit 54 I 1 IPAD36
+bit 53 I 1 PAD37
+bit 52 O 1 PAD37 51 0 Z
+bit 51 C 0 *
+bit 50 I 1 PAD38
+bit 49 O 1 PAD38 48 0 Z
+bit 48 C 0 *
+bit 47 I 1 PAD39
+bit 46 O 1 PAD39 45 0 Z
+bit 45 C 0 *
+bit 44 I 1 PAD40
+bit 43 O 1 PAD40 42 0 Z
+bit 42 C 0 *
+bit 41 I 1 PAD41
+bit 40 O 1 PAD41 39 0 Z
+bit 39 C 0 *
+bit 38 I 1 IPAD42
+bit 37 I 1 IPAD43
+bit 36 I 1 PAD44
+bit 35 O 1 PAD44 34 0 Z
+bit 34 C 0 *
+bit 33 I 1 PAD45
+bit 32 O 1 PAD45 31 0 Z
+bit 31 C 0 *
+bit 30 I 1 IPAD46
+bit 29 I 1 PAD47
+bit 28 O 1 PAD47 27 0 Z
+bit 27 C 0 *
+bit 26 I 1 PAD48
+bit 25 O 1 PAD48 24 0 Z
+bit 24 C 0 *
+bit 23 I 1 PAD49
+bit 22 O 1 PAD49 21 0 Z
+bit 21 C 0 *
+bit 20 I 1 PAD50
+bit 19 O 1 PAD50 18 0 Z
+bit 18 C 0 *
+bit 17 I 1 PAD51
+bit 16 O 1 PAD51 15 0 Z
+bit 15 C 0 *
+bit 14 I 1 PAD52
+bit 13 O 1 PAD52 12 0 Z
+bit 12 C 0 *
+bit 11 I 1 PAD53
+bit 10 O 1 PAD53 9 0 Z
+bit 9 C 0 *
+bit 8 I 1 IPAD54
+bit 7 I 1 IPAD55
+bit 6 I 1 PAD56
+bit 5 O 1 PAD56 4 0 Z
+bit 4 C 0 *
+bit 3 I 1 PAD57
+bit 2 O 1 PAD57 1 0 Z
+bit 1 C 0 *
+bit 0 I 1 IPAD58
--- /dev/null
+signal TCK
+signal TDI
+signal TDO
+signal TMS
+signal PAD101
+signal PAD102
+signal PAD60
+signal PAD61
+signal PAD104
+signal IPAD93
+signal PAD62
+signal PAD105
+signal PAD63
+signal PAD106
+signal PAD107
+signal IPAD204
+signal PAD109
+signal IPAD98
+signal PAD66
+signal PAD67
+signal IPAD209
+signal PAD181
+signal PAD185
+signal PAD186
+signal PAD187
+signal PAD188
+signal IPAD28
+signal IPAD29
+signal PAD110
+signal PAD111
+signal PAD71
+signal PAD113
+signal PAD72
+signal PAD114
+signal PAD115
+signal PAD116
+signal PAD74
+signal PAD117
+signal PAD75
+signal PAD118
+signal IPAD214
+signal IPAD144
+signal IPAD145
+signal PAD79
+signal PAD190
+signal PAD191
+signal PAD192
+signal PAD193
+signal PAD195
+signal PAD196
+signal PAD197
+signal PAD198
+signal IPAD35
+signal IPAD36
+signal DONE
+signal PAD120
+signal PAD121
+signal PAD80
+signal PAD122
+signal PAD81
+signal PAD123
+signal PAD82
+signal PAD124
+signal PAD84
+signal PAD127
+signal PAD85
+signal PAD128
+signal IPAD151
+signal PAD86
+signal IPAD152
+signal PAD87
+signal IPAD228
+signal PAD89
+signal IPAD3
+signal IPAD9
+signal PAD11
+signal PAD12
+signal IPAD46
+signal PAD16
+signal PAD17
+signal PAD19
+signal PAD200
+signal PAD201
+signal PAD202
+signal PAD203
+signal PAD130
+signal PAD131
+signal PAD205
+signal PAD132
+signal PAD90
+signal PAD206
+signal PAD133
+signal PAD91
+signal PAD207
+signal PAD208
+signal PAD92
+signal PAD94
+signal PAD95
+signal IPAD162
+signal PAD139
+signal PAD96
+signal PAD97
+signal PAD20
+signal PAD23
+signal IPAD54
+signal PAD24
+signal IPAD55
+signal PAD25
+signal PAD26
+signal PAD27
+signal IPAD58
+signal IPAD59
+signal PAD210
+signal PAD211
+signal PAD212
+signal PAD213
+signal PAD140
+signal PAD141
+signal PAD142
+signal PAD143
+signal PAD217
+signal PAD218
+signal PAD146
+signal IPAD170
+signal PAD147
+signal IPAD171
+signal PAD148
+signal PAD149
+signal IPAD174
+signal IPAD175
+signal PAD30
+signal PAD31
+signal PAD32
+signal IPAD64
+signal PAD33
+signal PAD34
+signal PAD1
+signal PAD2
+signal IPAD68
+signal PAD4
+signal PAD5
+signal PAD6
+signal PAD220
+signal PAD7
+signal PAD221
+signal PAD8
+signal PAD222
+signal PAD150
+signal PAD223
+signal PAD225
+signal PAD153
+signal PAD154
+signal PAD156
+signal PAD229
+signal PAD157
+signal IPAD184
+signal PAD40
+signal PAD41
+signal IPAD112
+signal IPAD78
+signal PAD47
+signal PAD48
+signal PAD49
+signal PAD230
+signal PAD231
+signal PAD232
+signal IPAD119
+signal PAD163
+signal PAD164
+signal PAD165
+signal PAD166
+signal PAD167
+signal PAD168
+signal PAD169
+signal PROG_B
+signal IPAD194
+signal IPAD199
+signal PAD50
+signal PAD51
+signal IPAD83
+signal PAD52
+signal PAD53
+signal IPAD88
+signal PAD56
+signal PAD57
+signal IPAD125
+signal IPAD126
+signal IPAD129
+signal PAD172
+signal IPAD10
+signal PAD173
+signal PAD176
+signal IPAD13
+signal PAD177
+signal PAD178
+signal PAD179
+signal GND0
+signal GND1
+signal GND2
+signal GND3
+signal GND4
+signal GND5
+signal GND6
+signal GND7
+signal GND8
+signal GND9
+signal GND10
+signal GND11
+signal GND12
+signal GND13
+signal GND14
+signal GND15
+signal GND16
+signal GND17
+signal GND18
+signal GND19
+signal GND20
+signal GND21
+signal GND22
+signal GND23
+signal GND24
+signal GND25
+signal GND26
+signal VDD0
+signal VDD1
+signal VDD2
+signal VDD3
+signal VDD4
+signal VDD5
+signal VDD6
+signal VDD7
+signal VDD8
+signal VDD9
+signal VDD10
+signal VDD11
+signal VDD12
+signal VDD13
+signal VDD14
+signal VDD15
+signal VDD16
+signal VDD17
+signal VDD18
+signal VDD19
+signal VDD20
+signal VDD21
+signal VDD22
+signal VDD23
+signal Vaux0
+signal Vaux1
+signal Vaux2
+signal Vaux3
+signal Vaux4
+signal Vaux5
+
+register BSR 588
+register BR 1
+register DIR 32
+
+instruction length 6
+
+instruction SAMPLE/PRELOAD 100000 BSR
+instruction IDCODE 100100 DIR
+instruction EXTEST 111100 BSR
+instruction BYPASS 111111 BR
+
+bit 587 I 1 IPAD59
+bit 586 I 1 PAD60
+bit 585 O 1 PAD60 584 0 Z
+bit 584 C 0 *
+bit 583 I 1 PAD61
+bit 582 O 1 PAD61 581 0 Z
+bit 581 C 0 *
+bit 580 I 1 PAD62
+bit 579 O 1 PAD62 578 0 Z
+bit 578 C 0 *
+bit 577 I 1 PAD63
+bit 576 O 1 PAD63 575 0 Z
+bit 575 C 0 *
+bit 574 I 1 IPAD64
+bit 573 O 1 *
+bit 572 O 1 *
+bit 571 O 1 *
+bit 570 I 1 PAD66
+bit 569 O 1 PAD66 568 0 Z
+bit 568 C 0 *
+bit 567 I 1 PAD67
+bit 566 O 1 PAD67 565 0 Z
+bit 565 C 0 *
+bit 564 I 1 IPAD68
+bit 563 O 1 *
+bit 562 O 1 *
+bit 561 O 1 *
+bit 560 O 1 *
+bit 559 O 1 *
+bit 558 O 1 *
+bit 557 I 1 PAD71
+bit 556 O 1 PAD71 555 0 Z
+bit 555 C 0 *
+bit 554 I 1 PAD72
+bit 553 O 1 PAD72 552 0 Z
+bit 552 C 0 *
+bit 551 O 1 *
+bit 550 I 1 PAD74
+bit 549 O 1 PAD74 548 0 Z
+bit 548 C 0 *
+bit 547 I 1 PAD75
+bit 546 O 1 PAD75 545 0 Z
+bit 545 C 0 *
+bit 544 O 1 *
+bit 543 O 1 *
+bit 542 O 1 *
+bit 541 O 1 *
+bit 540 O 1 *
+bit 539 O 1 *
+bit 538 I 1 IPAD78
+bit 537 I 1 PAD79
+bit 536 O 1 PAD79 535 0 Z
+bit 535 C 0 *
+bit 534 I 1 PAD80
+bit 533 O 1 PAD80 532 0 Z
+bit 532 C 0 *
+bit 531 I 1 PAD81
+bit 530 O 1 PAD81 529 0 Z
+bit 529 C 0 *
+bit 528 I 1 PAD82
+bit 527 O 1 PAD82 526 0 Z
+bit 526 C 0 *
+bit 525 I 1 IPAD83
+bit 524 I 1 PAD84
+bit 523 O 1 PAD84 522 0 Z
+bit 522 C 0 *
+bit 521 I 1 PAD85
+bit 520 O 1 PAD85 519 0 Z
+bit 519 C 0 *
+bit 518 I 1 PAD86
+bit 517 O 1 PAD86 516 0 Z
+bit 516 C 0 *
+bit 515 I 1 PAD87
+bit 514 O 1 PAD87 513 0 Z
+bit 513 C 0 *
+bit 512 I 1 IPAD88
+bit 511 I 1 PAD89
+bit 510 O 1 PAD89 509 0 Z
+bit 509 C 0 *
+bit 508 I 1 PAD90
+bit 507 O 1 PAD90 506 0 Z
+bit 506 C 0 *
+bit 505 I 1 PAD91
+bit 504 O 1 PAD91 503 0 Z
+bit 503 C 0 *
+bit 502 I 1 PAD92
+bit 501 O 1 PAD92 500 0 Z
+bit 500 C 0 *
+bit 499 I 1 IPAD93
+bit 498 I 1 PAD94
+bit 497 O 1 PAD94 496 0 Z
+bit 496 C 0 *
+bit 495 I 1 PAD95
+bit 494 O 1 PAD95 493 0 Z
+bit 493 C 0 *
+bit 492 I 1 PAD96
+bit 491 O 1 PAD96 490 0 Z
+bit 490 C 0 *
+bit 489 I 1 PAD97
+bit 488 O 1 PAD97 487 0 Z
+bit 487 C 0 *
+bit 486 I 1 IPAD98
+bit 485 O 1 *
+bit 484 O 1 *
+bit 483 O 1 *
+bit 482 O 1 *
+bit 481 O 1 *
+bit 480 O 1 *
+bit 479 I 1 PAD101
+bit 478 O 1 PAD101 477 0 Z
+bit 477 C 0 *
+bit 476 I 1 PAD102
+bit 475 O 1 PAD102 474 0 Z
+bit 474 C 0 *
+bit 473 O 1 *
+bit 472 I 1 PAD104
+bit 471 O 1 PAD104 470 0 Z
+bit 470 C 0 *
+bit 469 I 1 PAD105
+bit 468 O 1 PAD105 467 0 Z
+bit 467 C 0 *
+bit 466 I 1 PAD106
+bit 465 O 1 PAD106 464 0 Z
+bit 464 C 0 *
+bit 463 I 1 PAD107
+bit 462 O 1 PAD107 461 0 Z
+bit 461 C 0 *
+bit 460 O 1 *
+bit 459 I 1 PAD109
+bit 458 O 1 *
+bit 457 O 1 *
+bit 456 I 1 PAD110
+bit 455 O 1 *
+bit 454 O 1 *
+bit 453 I 1 PAD111
+bit 452 O 1 *
+bit 451 O 1 *
+bit 450 I 1 IPAD112
+bit 449 I 1 PAD113
+bit 448 O 1 *
+bit 447 O 1 *
+bit 446 I 1 PAD114
+bit 445 O 1 *
+bit 444 O 1 *
+bit 443 I 1 PAD115
+bit 442 O 1 *
+bit 441 O 1 *
+bit 440 I 1 PAD116
+bit 439 O 1 *
+bit 438 O 1 *
+bit 437 I 1 DONE
+bit 436 O 1 PAD109 435 0 Z
+bit 435 C 0 *
+bit 434 I 1 PAD117
+bit 433 O 1 PAD110 432 0 Z
+bit 432 C 0 *
+bit 431 I 1 PAD118
+bit 430 O 1 *
+bit 429 O 1 *
+bit 428 I 1 IPAD119
+bit 427 I 1 PAD120
+bit 426 O 1 *
+bit 425 O 1 *
+bit 424 I 1 PAD121
+bit 423 O 1 *
+bit 422 O 1 *
+bit 421 I 1 PAD122
+bit 420 O 1 *
+bit 419 O 1 *
+bit 418 I 1 PAD123
+bit 417 O 1 *
+bit 416 O 1 *
+bit 415 I 1 PAD124
+bit 414 O 1 *
+bit 413 O 1 *
+bit 412 I 1 IPAD125
+bit 411 I 1 IPAD126
+bit 410 I 1 PAD127
+bit 409 O 1 *
+bit 408 O 1 *
+bit 407 I 1 PAD128
+bit 406 O 1 *
+bit 405 O 1 *
+bit 404 I 1 IPAD129
+bit 403 I 1 PAD130
+bit 402 O 1 *
+bit 401 O 1 *
+bit 400 I 1 PAD131
+bit 399 O 1 *
+bit 398 O 1 *
+bit 397 I 1 PAD132
+bit 396 O 1 *
+bit 395 O 1 *
+bit 394 I 1 PAD133
+bit 393 O 1 *
+bit 392 O 1 *
+bit 391 O 1 *
+bit 390 O 1 *
+bit 389 O 1 *
+bit 388 O 1 *
+bit 387 O 1 *
+bit 386 O 1 *
+bit 385 O 1 *
+bit 384 O 1 *
+bit 383 O 1 *
+bit 382 O 1 *
+bit 381 O 1 *
+bit 380 I 1 PAD139
+bit 379 O 1 *
+bit 378 O 1 *
+bit 377 I 1 PAD140
+bit 376 O 1 *
+bit 375 O 1 *
+bit 374 I 1 PAD141
+bit 373 O 1 *
+bit 372 O 1 *
+bit 371 I 1 PAD142
+bit 370 O 1 PAD113 369 0 Z
+bit 369 C 0 *
+bit 368 I 1 PAD143
+bit 367 O 1 IPAD112 366 0 Z
+bit 366 C 0 *
+bit 365 I 1 IPAD144
+bit 364 I 1 IPAD145
+bit 363 I 1 PAD146
+bit 362 O 1 *
+bit 361 O 1 *
+bit 360 I 1 PAD147
+bit 359 O 1 *
+bit 358 O 1 *
+bit 357 I 1 PAD148
+bit 356 O 1 *
+bit 355 O 1 *
+bit 354 I 1 PAD149
+bit 353 O 1 *
+bit 352 O 1 *
+bit 351 I 1 PAD150
+bit 350 O 1 *
+bit 349 O 1 *
+bit 348 I 1 IPAD151
+bit 347 I 1 IPAD152
+bit 346 I 1 PAD153
+bit 345 O 1 *
+bit 344 O 1 *
+bit 343 I 1 PAD154
+bit 342 O 1 *
+bit 341 O 1 *
+bit 340 O 1 *
+bit 339 O 1 *
+bit 338 O 1 *
+bit 337 I 1 PAD156
+bit 336 O 1 *
+bit 335 O 1 *
+bit 334 I 1 PAD157
+bit 333 O 1 *
+bit 332 O 1 *
+bit 331 O 1 *
+bit 330 O 1 *
+bit 329 O 1 *
+bit 328 O 1 *
+bit 327 O 1 *
+bit 326 O 1 *
+bit 325 O 1 *
+bit 324 O 1 *
+bit 323 I 1 IPAD162
+bit 322 I 1 PAD163
+bit 321 O 1 *
+bit 320 O 1 *
+bit 319 I 1 PAD164
+bit 318 O 1 *
+bit 317 O 1 *
+bit 316 I 1 PAD165
+bit 315 O 1 *
+bit 314 O 1 *
+bit 313 I 1 PAD166
+bit 312 O 1 *
+bit 311 O 1 *
+bit 310 I 1 PAD167
+bit 309 O 1 *
+bit 308 O 1 *
+bit 307 I 1 PAD168
+bit 306 O 1 *
+bit 305 O 1 *
+bit 304 I 1 PAD169
+bit 303 O 1 *
+bit 302 O 1 *
+bit 301 I 1 IPAD170
+bit 300 I 1 IPAD171
+bit 299 I 1 PAD172
+bit 298 O 1 *
+bit 297 O 1 *
+bit 296 I 1 PAD173
+bit 295 O 1 *
+bit 294 O 1 *
+bit 293 I 1 IPAD174
+bit 292 I 1 IPAD175
+bit 291 I 1 PAD176
+bit 290 O 1 *
+bit 289 O 1 *
+bit 288 I 1 PAD177
+bit 287 O 1 *
+bit 286 O 1 *
+bit 285 I 1 PAD178
+bit 284 O 1 *
+bit 283 O 1 *
+bit 282 I 1 PAD179
+bit 281 O 1 *
+bit 280 O 1 *
+bit 279 O 1 *
+bit 278 I 1 PAD181
+bit 277 O 1 *
+bit 276 O 1 *
+bit 275 O 1 *
+bit 274 O 1 *
+bit 273 O 1 *
+bit 272 O 1 *
+bit 271 O 1 *
+bit 270 O 1 *
+bit 269 I 1 IPAD184
+bit 268 I 1 PAD185
+bit 267 O 1 *
+bit 266 O 1 *
+bit 265 I 1 PAD186
+bit 264 O 1 *
+bit 263 O 1 *
+bit 262 I 1 PAD187
+bit 261 O 1 *
+bit 260 O 1 *
+bit 259 I 1 PAD188
+bit 258 O 1 *
+bit 257 O 1 *
+bit 256 O 1 *
+bit 255 I 1 PAD190
+bit 254 O 1 *
+bit 253 O 1 *
+bit 252 I 1 PAD191
+bit 251 O 1 *
+bit 250 O 1 *
+bit 249 I 1 PAD192
+bit 248 O 1 *
+bit 247 O 1 *
+bit 246 I 1 PAD193
+bit 245 O 1 *
+bit 244 O 1 *
+bit 243 I 1 IPAD194
+bit 242 I 1 PAD195
+bit 241 O 1 *
+bit 240 O 1 *
+bit 239 I 1 PAD196
+bit 238 O 1 *
+bit 237 O 1 *
+bit 236 I 1 PAD197
+bit 235 O 1 *
+bit 234 O 1 *
+bit 233 I 1 PAD198
+bit 232 O 1 *
+bit 231 O 1 *
+bit 230 I 1 IPAD199
+bit 229 I 1 PAD200
+bit 228 O 1 *
+bit 227 O 1 *
+bit 226 I 1 PAD201
+bit 225 O 1 *
+bit 224 O 1 *
+bit 223 I 1 PAD202
+bit 222 O 1 *
+bit 221 O 1 *
+bit 220 I 1 PAD203
+bit 219 O 1 *
+bit 218 O 1 *
+bit 217 I 1 IPAD204
+bit 216 I 1 PAD205
+bit 215 O 1 *
+bit 214 O 1 *
+bit 213 I 1 PAD206
+bit 212 O 1 *
+bit 211 O 1 *
+bit 210 I 1 PAD207
+bit 209 O 1 *
+bit 208 O 1 *
+bit 207 I 1 PAD208
+bit 206 O 1 *
+bit 205 O 1 *
+bit 204 I 1 IPAD209
+bit 203 I 1 PAD210
+bit 202 O 1 *
+bit 201 O 1 *
+bit 200 I 1 PAD211
+bit 199 O 1 *
+bit 198 O 1 *
+bit 197 I 1 PAD212
+bit 196 O 1 *
+bit 195 O 1 *
+bit 194 I 1 PAD213
+bit 193 O 1 *
+bit 192 O 1 *
+bit 191 I 1 IPAD214
+bit 190 O 1 *
+bit 189 O 1 *
+bit 188 O 1 *
+bit 187 O 1 *
+bit 186 O 1 *
+bit 185 O 1 *
+bit 184 I 1 PAD217
+bit 183 O 1 *
+bit 182 O 1 *
+bit 181 I 1 PAD218
+bit 180 O 1 *
+bit 179 O 1 *
+bit 178 O 1 *
+bit 177 I 1 PAD220
+bit 176 O 1 *
+bit 175 O 1 *
+bit 174 I 1 PAD221
+bit 173 O 1 *
+bit 172 O 1 *
+bit 171 I 1 PAD222
+bit 170 O 1 *
+bit 169 O 1 *
+bit 168 I 1 PAD223
+bit 167 O 1 *
+bit 166 O 1 *
+bit 165 O 1 *
+bit 164 I 1 PAD225
+bit 163 O 1 *
+bit 162 O 1 *
+bit 161 O 1 *
+bit 160 O 1 *
+bit 159 O 1 *
+bit 158 O 1 *
+bit 157 O 1 *
+bit 156 O 1 *
+bit 155 I 1 IPAD228
+bit 154 I 1 PAD229
+bit 153 O 1 *
+bit 152 O 1 *
+bit 151 I 1 PAD230
+bit 150 O 1 *
+bit 149 O 1 *
+bit 148 I 1 PAD231
+bit 147 O 1 *
+bit 146 O 1 *
+bit 145 I 1 PAD232
+bit 144 O 1 *
+bit 143 O 1 *
+bit 142 I 1 PROG_B
+bit 141 I 1 PAD1
+bit 140 O 1 PAD1 139 0 Z
+bit 139 C 0 *
+bit 138 I 1 PAD2
+bit 137 O 1 PAD2 136 0 Z
+bit 136 C 0 *
+bit 135 I 1 IPAD3
+bit 134 I 1 PAD4
+bit 133 O 1 PAD4 132 0 Z
+bit 132 C 0 *
+bit 131 I 1 PAD5
+bit 130 O 1 PAD5 129 0 Z
+bit 129 C 0 *
+bit 128 I 1 PAD6
+bit 127 O 1 PAD6 126 0 Z
+bit 126 C 0 *
+bit 125 I 1 PAD7
+bit 124 O 1 PAD7 123 0 Z
+bit 123 C 0 *
+bit 122 I 1 PAD8
+bit 121 O 1 PAD8 120 0 Z
+bit 120 C 0 *
+bit 119 I 1 IPAD9
+bit 118 I 1 IPAD10
+bit 117 I 1 PAD11
+bit 116 O 1 PAD11 115 0 Z
+bit 115 C 0 *
+bit 114 I 1 PAD12
+bit 113 O 1 PAD12 112 0 Z
+bit 112 C 0 *
+bit 111 I 1 IPAD13
+bit 110 O 1 *
+bit 109 O 1 *
+bit 108 O 1 *
+bit 107 O 1 *
+bit 106 O 1 *
+bit 105 O 1 *
+bit 104 I 1 PAD16
+bit 103 O 1 PAD16 102 0 Z
+bit 102 C 0 *
+bit 101 I 1 PAD17
+bit 100 O 1 PAD17 99 0 Z
+bit 99 C 0 *
+bit 98 O 1 *
+bit 97 O 1 *
+bit 96 O 1 *
+bit 95 I 1 PAD19
+bit 94 O 1 PAD19 93 0 Z
+bit 93 C 0 *
+bit 92 I 1 PAD20
+bit 91 O 1 PAD20 90 0 Z
+bit 90 C 0 *
+bit 89 O 1 *
+bit 88 O 1 *
+bit 87 I 1 PAD23
+bit 86 O 1 PAD23 85 0 Z
+bit 85 C 0 *
+bit 84 I 1 PAD24
+bit 83 O 1 PAD24 82 0 Z
+bit 82 C 0 *
+bit 81 I 1 PAD25
+bit 80 O 1 PAD25 79 0 Z
+bit 79 C 0 *
+bit 78 I 1 PAD26
+bit 77 O 1 PAD26 76 0 Z
+bit 76 C 0 *
+bit 75 I 1 PAD27
+bit 74 O 1 PAD27 73 0 Z
+bit 73 C 0 *
+bit 72 I 1 IPAD28
+bit 71 I 1 IPAD29
+bit 70 I 1 PAD30
+bit 69 O 1 PAD30 68 0 Z
+bit 68 C 0 *
+bit 67 I 1 PAD31
+bit 66 O 1 PAD31 65 0 Z
+bit 65 C 0 *
+bit 64 I 1 PAD32
+bit 63 O 1 PAD32 62 0 Z
+bit 62 C 0 *
+bit 61 I 1 PAD33
+bit 60 O 1 PAD33 59 0 Z
+bit 59 C 0 *
+bit 58 I 1 PAD34
+bit 57 O 1 PAD34 56 0 Z
+bit 56 C 0 *
+bit 55 I 1 IPAD35
+bit 54 I 1 IPAD36
+bit 53 O 1 *
+bit 52 O 1 *
+bit 51 O 1 *
+bit 50 O 1 *
+bit 49 O 1 *
+bit 48 O 1 *
+bit 47 O 1 *
+bit 46 O 1 *
+bit 45 O 1 *
+bit 44 I 1 PAD40
+bit 43 O 1 PAD40 42 0 Z
+bit 42 C 0 *
+bit 41 I 1 PAD41
+bit 40 O 1 PAD41 39 0 Z
+bit 39 C 0 *
+bit 38 O 1 *
+bit 37 O 1 *
+bit 36 O 1 *
+bit 35 O 1 *
+bit 34 O 1 *
+bit 33 O 1 *
+bit 32 O 1 *
+bit 31 O 1 *
+bit 30 I 1 IPAD46
+bit 29 I 1 PAD47
+bit 28 O 1 PAD47 27 0 Z
+bit 27 C 0 *
+bit 26 I 1 PAD48
+bit 25 O 1 PAD48 24 0 Z
+bit 24 C 0 *
+bit 23 I 1 PAD49
+bit 22 O 1 PAD49 21 0 Z
+bit 21 C 0 *
+bit 20 I 1 PAD50
+bit 19 O 1 PAD50 18 0 Z
+bit 18 C 0 *
+bit 17 I 1 PAD51
+bit 16 O 1 PAD51 15 0 Z
+bit 15 C 0 *
+bit 14 I 1 PAD52
+bit 13 O 1 PAD52 12 0 Z
+bit 12 C 0 *
+bit 11 I 1 PAD53
+bit 10 O 1 PAD53 9 0 Z
+bit 9 C 0 *
+bit 8 I 1 IPAD54
+bit 7 I 1 IPAD55
+bit 6 I 1 PAD56
+bit 5 O 1 PAD56 4 0 Z
+bit 4 C 0 *
+bit 3 I 1 PAD57
+bit 2 O 1 PAD57 1 0 Z
+bit 1 C 0 *
+bit 0 I 1 IPAD58
--- /dev/null
+signal TCK
+signal TDI
+signal TDO
+signal TMS
+signal PAD100
+signal PAD101
+signal PAD102
+signal PAD60
+signal PAD61
+signal PAD104
+signal IPAD93
+signal PAD62
+signal PAD105
+signal PAD63
+signal PAD106
+signal PAD107
+signal IPAD204
+signal PAD65
+signal PAD109
+signal IPAD98
+signal PAD66
+signal PAD67
+signal PAD69
+signal IPAD209
+signal IPAD137
+signal IPAD138
+signal PAD181
+signal PAD182
+signal PAD183
+signal IPAD21
+signal PAD185
+signal IPAD22
+signal PAD186
+signal PAD187
+signal PAD188
+signal IPAD28
+signal IPAD29
+signal PAD110
+signal PAD111
+signal PAD70
+signal PAD113
+signal PAD71
+signal PAD114
+signal PAD72
+signal PAD115
+signal PAD116
+signal PAD117
+signal PAD74
+signal IPAD214
+signal PAD118
+signal PAD75
+signal PAD76
+signal PAD77
+signal IPAD144
+signal IPAD145
+signal PAD79
+signal IPAD219
+signal PAD190
+signal PAD191
+signal PAD192
+signal PAD193
+signal PAD195
+signal PAD196
+signal PAD197
+signal PAD198
+signal IPAD35
+signal IPAD36
+signal PAD120
+signal DONE
+signal PAD121
+signal PAD122
+signal PAD80
+signal PAD123
+signal PAD81
+signal PAD124
+signal PAD82
+signal PAD127
+signal PAD84
+signal IPAD151
+signal PAD128
+signal PAD85
+signal IPAD224
+signal IPAD152
+signal PAD86
+signal PAD87
+signal IPAD228
+signal PAD89
+signal IPAD3
+signal IPAD158
+signal IPAD159
+signal IPAD9
+signal PAD11
+signal IPAD42
+signal PAD12
+signal IPAD43
+signal PAD14
+signal IPAD46
+signal PAD15
+signal PAD16
+signal PAD17
+signal PAD18
+signal PAD19
+signal PAD200
+signal PAD201
+signal PAD202
+signal PAD203
+signal PAD130
+signal PAD131
+signal PAD205
+signal PAD132
+signal PAD90
+signal PAD206
+signal PAD133
+signal PAD91
+signal PAD207
+signal PAD134
+signal PAD208
+signal PAD92
+signal PAD135
+signal PAD136
+signal PAD94
+signal PAD95
+signal IPAD162
+signal PAD139
+signal PAD96
+signal PAD97
+signal PAD99
+signal PAD20
+signal IPAD54
+signal PAD23
+signal IPAD55
+signal PAD24
+signal PAD25
+signal PAD26
+signal IPAD58
+signal PAD27
+signal IPAD59
+signal PAD210
+signal PAD211
+signal PAD212
+signal PAD140
+signal PAD213
+signal PAD141
+signal PAD142
+signal PAD215
+signal PAD143
+signal PAD216
+signal PAD217
+signal PAD218
+signal PAD146
+signal PAD147
+signal IPAD170
+signal PAD148
+signal IPAD171
+signal PAD149
+signal IPAD174
+signal IPAD175
+signal PAD30
+signal PAD31
+signal PAD32
+signal IPAD64
+signal PAD33
+signal PAD34
+signal PAD1
+signal PAD2
+signal IPAD68
+signal PAD37
+signal PAD4
+signal IPAD103
+signal PAD5
+signal PAD38
+signal PAD6
+signal PAD39
+signal PAD220
+signal PAD7
+signal PAD221
+signal PAD8
+signal PAD222
+signal IPAD108
+signal PAD150
+signal PAD223
+signal PAD225
+signal PAD153
+signal PAD226
+signal PAD154
+signal PAD227
+signal PAD155
+signal PAD156
+signal PAD229
+signal PAD157
+signal IPAD180
+signal IPAD184
+signal IPAD189
+signal PAD40
+signal PAD41
+signal IPAD73
+signal PAD44
+signal PAD45
+signal IPAD112
+signal IPAD78
+signal PAD47
+signal PAD48
+signal PAD49
+signal PAD230
+signal PAD231
+signal PAD232
+signal IPAD119
+signal PAD160
+signal PAD161
+signal PAD163
+signal PAD164
+signal PAD165
+signal PAD166
+signal PAD167
+signal PAD168
+signal PAD169
+signal PROG_B
+signal IPAD194
+signal IPAD199
+signal PAD50
+signal PAD51
+signal IPAD83
+signal PAD52
+signal PAD53
+signal IPAD88
+signal PAD56
+signal PAD57
+signal IPAD125
+signal IPAD126
+signal IPAD129
+signal PAD172
+signal IPAD10
+signal PAD173
+signal PAD176
+signal IPAD13
+signal PAD177
+signal PAD178
+signal PAD179
+signal GND0
+signal GND1
+signal GND2
+signal GND3
+signal GND4
+signal GND5
+signal GND6
+signal GND7
+signal GND8
+signal GND9
+signal GND10
+signal GND11
+signal GND12
+signal GND13
+signal GND14
+signal GND15
+signal GND16
+signal GND17
+signal GND18
+signal GND19
+signal VDD0
+signal VDD1
+signal VDD2
+signal VDD3
+signal VDD4
+signal VDD5
+signal VDD6
+signal VDD7
+signal VDD8
+signal VDD9
+signal VDD10
+signal VDD11
+signal VDD12
+signal VDD13
+signal VDD14
+signal VDD15
+signal Vaux0
+signal Vaux1
+signal Vaux2
+signal Vaux3
+signal Vaux4
+signal Vaux5
+signal Vaux6
+
+register BSR 588
+register BR 1
+register DIR 32
+
+instruction length 6
+
+instruction SAMPLE/PRELOAD 100000 BSR
+instruction IDCODE 100100 DIR
+instruction EXTEST 111100 BSR
+instruction BYPASS 111111 BR
+
+bit 587 I 1 IPAD59
+bit 586 I 1 PAD60
+bit 585 O 1 PAD60 584 0 Z
+bit 584 C 0 *
+bit 583 I 1 PAD61
+bit 582 O 1 PAD61 581 0 Z
+bit 581 C 0 *
+bit 580 I 1 PAD62
+bit 579 O 1 PAD62 578 0 Z
+bit 578 C 0 *
+bit 577 I 1 PAD63
+bit 576 O 1 PAD63 575 0 Z
+bit 575 C 0 *
+bit 574 O 1 *
+bit 573 O 1 *
+bit 572 O 1 *
+bit 571 O 1 *
+bit 570 O 1 *
+bit 569 O 1 *
+bit 568 O 1 *
+bit 567 O 1 *
+bit 566 O 1 *
+bit 565 O 1 *
+bit 564 I 1 IPAD68
+bit 563 O 1 *
+bit 562 O 1 *
+bit 561 O 1 *
+bit 560 O 1 *
+bit 559 O 1 *
+bit 558 O 1 *
+bit 557 I 1 PAD71
+bit 556 O 1 PAD71 555 0 Z
+bit 555 C 0 *
+bit 554 I 1 PAD72
+bit 553 O 1 PAD72 552 0 Z
+bit 552 C 0 *
+bit 551 O 1 *
+bit 550 I 1 PAD74
+bit 549 O 1 PAD74 548 0 Z
+bit 548 C 0 *
+bit 547 I 1 PAD75
+bit 546 O 1 PAD75 545 0 Z
+bit 545 C 0 *
+bit 544 O 1 *
+bit 543 O 1 *
+bit 542 O 1 *
+bit 541 O 1 *
+bit 540 O 1 *
+bit 539 O 1 *
+bit 538 I 1 IPAD78
+bit 537 I 1 PAD79
+bit 536 O 1 PAD79 535 0 Z
+bit 535 C 0 *
+bit 534 I 1 PAD80
+bit 533 O 1 PAD80 532 0 Z
+bit 532 C 0 *
+bit 531 I 1 PAD81
+bit 530 O 1 PAD81 529 0 Z
+bit 529 C 0 *
+bit 528 I 1 PAD82
+bit 527 O 1 PAD82 526 0 Z
+bit 526 C 0 *
+bit 525 I 1 IPAD83
+bit 524 I 1 PAD84
+bit 523 O 1 PAD84 522 0 Z
+bit 522 C 0 *
+bit 521 I 1 PAD85
+bit 520 O 1 PAD85 519 0 Z
+bit 519 C 0 *
+bit 518 I 1 PAD86
+bit 517 O 1 PAD86 516 0 Z
+bit 516 C 0 *
+bit 515 I 1 PAD87
+bit 514 O 1 PAD87 513 0 Z
+bit 513 C 0 *
+bit 512 I 1 IPAD88
+bit 511 I 1 PAD89
+bit 510 O 1 PAD89 509 0 Z
+bit 509 C 0 *
+bit 508 I 1 PAD90
+bit 507 O 1 PAD90 506 0 Z
+bit 506 C 0 *
+bit 505 I 1 PAD91
+bit 504 O 1 PAD91 503 0 Z
+bit 503 C 0 *
+bit 502 I 1 PAD92
+bit 501 O 1 PAD92 500 0 Z
+bit 500 C 0 *
+bit 499 I 1 IPAD93
+bit 498 I 1 PAD94
+bit 497 O 1 PAD94 496 0 Z
+bit 496 C 0 *
+bit 495 I 1 PAD95
+bit 494 O 1 PAD95 493 0 Z
+bit 493 C 0 *
+bit 492 I 1 PAD96
+bit 491 O 1 PAD96 490 0 Z
+bit 490 C 0 *
+bit 489 I 1 PAD97
+bit 488 O 1 PAD97 487 0 Z
+bit 487 C 0 *
+bit 486 I 1 IPAD98
+bit 485 O 1 *
+bit 484 O 1 *
+bit 483 O 1 *
+bit 482 O 1 *
+bit 481 O 1 *
+bit 480 O 1 *
+bit 479 I 1 PAD101
+bit 478 O 1 PAD101 477 0 Z
+bit 477 C 0 *
+bit 476 I 1 PAD102
+bit 475 O 1 PAD102 474 0 Z
+bit 474 C 0 *
+bit 473 O 1 *
+bit 472 O 1 *
+bit 471 O 1 *
+bit 470 O 1 *
+bit 469 O 1 *
+bit 468 O 1 *
+bit 467 O 1 *
+bit 466 I 1 PAD106
+bit 465 O 1 PAD106 464 0 Z
+bit 464 C 0 *
+bit 463 I 1 PAD107
+bit 462 O 1 PAD107 461 0 Z
+bit 461 C 0 *
+bit 460 O 1 *
+bit 459 O 1 *
+bit 458 O 1 *
+bit 457 O 1 *
+bit 456 O 1 *
+bit 455 O 1 *
+bit 454 O 1 *
+bit 453 O 1 *
+bit 452 O 1 *
+bit 451 O 1 *
+bit 450 I 1 IPAD112
+bit 449 I 1 PAD113
+bit 448 O 1 *
+bit 447 O 1 *
+bit 446 I 1 PAD114
+bit 445 O 1 *
+bit 444 O 1 *
+bit 443 I 1 PAD115
+bit 442 O 1 *
+bit 441 O 1 *
+bit 440 I 1 PAD116
+bit 439 O 1 *
+bit 438 O 1 *
+bit 437 I 1 DONE
+bit 436 O 1 *
+bit 435 O 1 *
+bit 434 I 1 PAD117
+bit 433 O 1 *
+bit 432 O 1 *
+bit 431 I 1 PAD118
+bit 430 O 1 *
+bit 429 O 1 *
+bit 428 I 1 IPAD119
+bit 427 I 1 PAD120
+bit 426 O 1 *
+bit 425 O 1 *
+bit 424 I 1 PAD121
+bit 423 O 1 *
+bit 422 O 1 *
+bit 421 I 1 PAD122
+bit 420 O 1 *
+bit 419 O 1 *
+bit 418 I 1 PAD123
+bit 417 O 1 *
+bit 416 O 1 *
+bit 415 I 1 PAD124
+bit 414 O 1 *
+bit 413 O 1 *
+bit 412 O 1 *
+bit 411 O 1 *
+bit 410 I 1 PAD127
+bit 409 O 1 *
+bit 408 O 1 *
+bit 407 I 1 PAD128
+bit 406 O 1 *
+bit 405 O 1 *
+bit 404 I 1 IPAD129
+bit 403 I 1 PAD130
+bit 402 O 1 *
+bit 401 O 1 *
+bit 400 I 1 PAD131
+bit 399 O 1 *
+bit 398 O 1 *
+bit 397 O 1 *
+bit 396 O 1 *
+bit 395 O 1 *
+bit 394 O 1 *
+bit 393 O 1 *
+bit 392 O 1 *
+bit 391 O 1 *
+bit 390 O 1 *
+bit 389 O 1 *
+bit 388 O 1 *
+bit 387 O 1 *
+bit 386 O 1 *
+bit 385 O 1 *
+bit 384 O 1 *
+bit 383 O 1 *
+bit 382 O 1 *
+bit 381 O 1 *
+bit 380 I 1 PAD139
+bit 379 O 1 *
+bit 378 O 1 *
+bit 377 I 1 PAD140
+bit 376 O 1 *
+bit 375 O 1 *
+bit 374 I 1 PAD141
+bit 373 O 1 *
+bit 372 O 1 *
+bit 371 I 1 PAD142
+bit 370 O 1 PAD113 369 0 Z
+bit 369 C 0 *
+bit 368 I 1 PAD143
+bit 367 O 1 IPAD112 366 0 Z
+bit 366 C 0 *
+bit 365 I 1 IPAD144
+bit 364 I 1 IPAD145
+bit 363 I 1 PAD146
+bit 362 O 1 *
+bit 361 O 1 *
+bit 360 I 1 PAD147
+bit 359 O 1 *
+bit 358 O 1 *
+bit 357 I 1 PAD148
+bit 356 O 1 *
+bit 355 O 1 *
+bit 354 I 1 PAD149
+bit 353 O 1 *
+bit 352 O 1 *
+bit 351 I 1 PAD150
+bit 350 O 1 *
+bit 349 O 1 *
+bit 348 I 1 IPAD151
+bit 347 I 1 IPAD152
+bit 346 O 1 *
+bit 345 O 1 *
+bit 344 O 1 *
+bit 343 O 1 *
+bit 342 O 1 *
+bit 341 O 1 *
+bit 340 O 1 *
+bit 339 O 1 *
+bit 338 O 1 *
+bit 337 I 1 PAD156
+bit 336 O 1 *
+bit 335 O 1 *
+bit 334 I 1 PAD157
+bit 333 O 1 *
+bit 332 O 1 *
+bit 331 O 1 *
+bit 330 O 1 *
+bit 329 O 1 *
+bit 328 O 1 *
+bit 327 O 1 *
+bit 326 O 1 *
+bit 325 O 1 *
+bit 324 O 1 *
+bit 323 O 1 *
+bit 322 I 1 PAD163
+bit 321 O 1 *
+bit 320 O 1 *
+bit 319 I 1 PAD164
+bit 318 O 1 *
+bit 317 O 1 *
+bit 316 I 1 PAD165
+bit 315 O 1 *
+bit 314 O 1 *
+bit 313 I 1 PAD166
+bit 312 O 1 *
+bit 311 O 1 *
+bit 310 O 1 *
+bit 309 O 1 *
+bit 308 O 1 *
+bit 307 I 1 PAD168
+bit 306 O 1 *
+bit 305 O 1 *
+bit 304 I 1 PAD169
+bit 303 O 1 *
+bit 302 O 1 *
+bit 301 I 1 IPAD170
+bit 300 I 1 IPAD171
+bit 299 I 1 PAD172
+bit 298 O 1 *
+bit 297 O 1 *
+bit 296 I 1 PAD173
+bit 295 O 1 *
+bit 294 O 1 *
+bit 293 I 1 IPAD174
+bit 292 I 1 IPAD175
+bit 291 I 1 PAD176
+bit 290 O 1 *
+bit 289 O 1 *
+bit 288 I 1 PAD177
+bit 287 O 1 *
+bit 286 O 1 *
+bit 285 I 1 PAD178
+bit 284 O 1 *
+bit 283 O 1 *
+bit 282 I 1 PAD179
+bit 281 O 1 *
+bit 280 O 1 *
+bit 279 O 1 *
+bit 278 I 1 PAD181
+bit 277 O 1 *
+bit 276 O 1 *
+bit 275 O 1 *
+bit 274 O 1 *
+bit 273 O 1 *
+bit 272 O 1 *
+bit 271 O 1 *
+bit 270 O 1 *
+bit 269 I 1 IPAD184
+bit 268 O 1 *
+bit 267 O 1 *
+bit 266 O 1 *
+bit 265 O 1 *
+bit 264 O 1 *
+bit 263 O 1 *
+bit 262 I 1 PAD187
+bit 261 O 1 *
+bit 260 O 1 *
+bit 259 I 1 PAD188
+bit 258 O 1 *
+bit 257 O 1 *
+bit 256 O 1 *
+bit 255 I 1 PAD190
+bit 254 O 1 *
+bit 253 O 1 *
+bit 252 I 1 PAD191
+bit 251 O 1 *
+bit 250 O 1 *
+bit 249 O 1 *
+bit 248 O 1 *
+bit 247 O 1 *
+bit 246 O 1 *
+bit 245 O 1 *
+bit 244 O 1 *
+bit 243 O 1 *
+bit 242 I 1 PAD195
+bit 241 O 1 *
+bit 240 O 1 *
+bit 239 I 1 PAD196
+bit 238 O 1 *
+bit 237 O 1 *
+bit 236 I 1 PAD197
+bit 235 O 1 *
+bit 234 O 1 *
+bit 233 I 1 PAD198
+bit 232 O 1 *
+bit 231 O 1 *
+bit 230 I 1 IPAD199
+bit 229 I 1 PAD200
+bit 228 O 1 *
+bit 227 O 1 *
+bit 226 I 1 PAD201
+bit 225 O 1 *
+bit 224 O 1 *
+bit 223 I 1 PAD202
+bit 222 O 1 *
+bit 221 O 1 *
+bit 220 I 1 PAD203
+bit 219 O 1 *
+bit 218 O 1 *
+bit 217 I 1 IPAD204
+bit 216 I 1 PAD205
+bit 215 O 1 *
+bit 214 O 1 *
+bit 213 I 1 PAD206
+bit 212 O 1 *
+bit 211 O 1 *
+bit 210 I 1 PAD207
+bit 209 O 1 *
+bit 208 O 1 *
+bit 207 I 1 PAD208
+bit 206 O 1 *
+bit 205 O 1 *
+bit 204 I 1 IPAD209
+bit 203 I 1 PAD210
+bit 202 O 1 *
+bit 201 O 1 *
+bit 200 I 1 PAD104
+bit 199 O 1 *
+bit 198 O 1 *
+bit 197 I 1 PAD212
+bit 196 O 1 *
+bit 195 O 1 *
+bit 194 I 1 PAD109
+bit 193 O 1 *
+bit 192 O 1 *
+bit 191 I 1 IPAD214
+bit 190 O 1 *
+bit 189 O 1 *
+bit 188 O 1 *
+bit 187 O 1 *
+bit 186 O 1 *
+bit 185 O 1 *
+bit 184 I 1 PAD217
+bit 183 O 1 *
+bit 182 O 1 *
+bit 181 I 1 PAD136
+bit 180 O 1 *
+bit 179 O 1 *
+bit 178 O 1 *
+bit 177 O 1 *
+bit 176 O 1 *
+bit 175 O 1 *
+bit 174 O 1 *
+bit 173 O 1 *
+bit 172 O 1 *
+bit 171 I 1 PAD222
+bit 170 O 1 *
+bit 169 O 1 *
+bit 168 I 1 PAD223
+bit 167 O 1 *
+bit 166 O 1 *
+bit 165 O 1 *
+bit 164 O 1 *
+bit 163 O 1 *
+bit 162 O 1 *
+bit 161 O 1 *
+bit 160 O 1 *
+bit 159 O 1 *
+bit 158 O 1 *
+bit 157 O 1 *
+bit 156 O 1 *
+bit 155 I 1 IPAD228
+bit 154 I 1 PAD229
+bit 153 O 1 *
+bit 152 O 1 *
+bit 151 I 1 PAD230
+bit 150 O 1 *
+bit 149 O 1 *
+bit 148 I 1 PAD231
+bit 147 O 1 *
+bit 146 O 1 *
+bit 145 I 1 PAD183
+bit 144 O 1 *
+bit 143 O 1 *
+bit 142 I 1 PAD182
+bit 141 I 1 PAD1
+bit 140 O 1 PAD1 139 0 Z
+bit 139 C 0 *
+bit 138 I 1 PAD2
+bit 137 O 1 PAD2 136 0 Z
+bit 136 C 0 *
+bit 135 I 1 IPAD3
+bit 134 I 1 PAD4
+bit 133 O 1 PAD4 132 0 Z
+bit 132 C 0 *
+bit 131 I 1 PAD5
+bit 130 O 1 PAD5 129 0 Z
+bit 129 C 0 *
+bit 128 O 1 *
+bit 127 O 1 *
+bit 126 O 1 *
+bit 125 I 1 PAD7
+bit 124 O 1 PAD7 123 0 Z
+bit 123 C 0 *
+bit 122 I 1 PAD8
+bit 121 O 1 PAD8 120 0 Z
+bit 120 C 0 *
+bit 119 O 1 *
+bit 118 O 1 *
+bit 117 I 1 PAD11
+bit 116 O 1 PAD11 115 0 Z
+bit 115 C 0 *
+bit 114 I 1 PAD12
+bit 113 O 1 PAD12 112 0 Z
+bit 112 C 0 *
+bit 111 I 1 IPAD13
+bit 110 O 1 *
+bit 109 O 1 *
+bit 108 O 1 *
+bit 107 O 1 *
+bit 106 O 1 *
+bit 105 O 1 *
+bit 104 I 1 PAD16
+bit 103 O 1 PAD16 102 0 Z
+bit 102 C 0 *
+bit 101 I 1 PAD17
+bit 100 O 1 PAD17 99 0 Z
+bit 99 C 0 *
+bit 98 O 1 *
+bit 97 O 1 *
+bit 96 O 1 *
+bit 95 O 1 *
+bit 94 O 1 *
+bit 93 O 1 *
+bit 92 O 1 *
+bit 91 O 1 *
+bit 90 O 1 *
+bit 89 O 1 *
+bit 88 O 1 *
+bit 87 I 1 PAD23
+bit 86 O 1 PAD23 85 0 Z
+bit 85 C 0 *
+bit 84 I 1 PAD24
+bit 83 O 1 PAD24 82 0 Z
+bit 82 C 0 *
+bit 81 I 1 PAD25
+bit 80 O 1 PAD25 79 0 Z
+bit 79 C 0 *
+bit 78 I 1 PAD26
+bit 77 O 1 PAD26 76 0 Z
+bit 76 C 0 *
+bit 75 I 1 PAD27
+bit 74 O 1 PAD27 73 0 Z
+bit 73 C 0 *
+bit 72 I 1 IPAD28
+bit 71 I 1 IPAD29
+bit 70 I 1 PAD30
+bit 69 O 1 PAD30 68 0 Z
+bit 68 C 0 *
+bit 67 I 1 PAD31
+bit 66 O 1 PAD31 65 0 Z
+bit 65 C 0 *
+bit 64 I 1 PAD32
+bit 63 O 1 PAD32 62 0 Z
+bit 62 C 0 *
+bit 61 I 1 PAD33
+bit 60 O 1 PAD33 59 0 Z
+bit 59 C 0 *
+bit 58 I 1 PAD34
+bit 57 O 1 PAD34 56 0 Z
+bit 56 C 0 *
+bit 55 I 1 IPAD35
+bit 54 I 1 IPAD36
+bit 53 O 1 *
+bit 52 O 1 *
+bit 51 O 1 *
+bit 50 O 1 *
+bit 49 O 1 *
+bit 48 O 1 *
+bit 47 O 1 *
+bit 46 O 1 *
+bit 45 O 1 *
+bit 44 I 1 PAD40
+bit 43 O 1 PAD40 42 0 Z
+bit 42 C 0 *
+bit 41 I 1 PAD41
+bit 40 O 1 PAD41 39 0 Z
+bit 39 C 0 *
+bit 38 O 1 *
+bit 37 O 1 *
+bit 36 O 1 *
+bit 35 O 1 *
+bit 34 O 1 *
+bit 33 O 1 *
+bit 32 O 1 *
+bit 31 O 1 *
+bit 30 I 1 IPAD46
+bit 29 I 1 PAD47
+bit 28 O 1 PAD47 27 0 Z
+bit 27 C 0 *
+bit 26 I 1 PAD48
+bit 25 O 1 PAD48 24 0 Z
+bit 24 C 0 *
+bit 23 I 1 PAD49
+bit 22 O 1 PAD49 21 0 Z
+bit 21 C 0 *
+bit 20 I 1 PAD50
+bit 19 O 1 PAD50 18 0 Z
+bit 18 C 0 *
+bit 17 O 1 *
+bit 16 O 1 *
+bit 15 O 1 *
+bit 14 I 1 PAD52
+bit 13 O 1 PAD52 12 0 Z
+bit 12 C 0 *
+bit 11 I 1 PAD53
+bit 10 O 1 PAD53 9 0 Z
+bit 9 C 0 *
+bit 8 O 1 *
+bit 7 O 1 *
+bit 6 I 1 PAD56
+bit 5 O 1 PAD56 4 0 Z
+bit 4 C 0 *
+bit 3 I 1 PAD57
+bit 2 O 1 PAD57 1 0 Z
+bit 1 C 0 *
+bit 0 I 1 IPAD58
--- /dev/null
+#
+# $Id: STEPPINGS,v 1.1 2003/02/14 11:14:56 telka Exp $
+#
+# Copyright (C) 2003 Tower Technologies s.r.l.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Alessandro Zummo <azummo@towertech.it>, 2003.
+# DJF:w
+
+# bits 31-28 of the Device Identification Register
+0100 xc9572xl_vq44 0
--- /dev/null
+signal PB00_01
+signal PB00_04
+signal PB00_05
+signal PB00_07
+signal PB00_08
+signal PB00_10
+signal PB00_13
+signal PB00_14
+signal PB00_16
+signal PB01_01
+signal PB01_04
+signal PB01_05
+signal PB01_07
+signal PB01_08
+signal PB01_10
+signal PB01_13
+signal PB01_14
+signal PB01_16
+signal PB02_01
+signal PB02_04
+signal PB02_07
+signal PB02_08
+signal PB02_10
+signal PB02_13
+signal PB02_14
+signal PB02_15
+signal PB02_16
+signal PB03_01
+signal PB03_04
+signal PB03_07
+signal PB03_10
+signal PB03_13
+signal PB03_14
+signal PB03_16
+signal TCK
+signal TDI
+signal TDO
+signal TMS
+signal Vccint_1
+signal VccInt_Vpp
+signal Vccio
+signal Vssint_2
+signal Vssio_1
+
+register BSR 216
+register BR 1
+register DIR 32
+
+instruction length 8
+
+instruction BYPASS 11111111 BR
+instruction EXTEST 00000000 BSR
+instruction IDCODE 11111110 DIR
+instruction SAMPLE/PRELOAD 00000001 BSR
+
+bit 215 O 1 *
+bit 214 O 1 *
+bit 213 O 1 *
+bit 212 I 1 PB00_01
+bit 211 O 1 PB00_01 210 0 Z
+bit 210 C 0 *
+bit 209 O 1 *
+bit 208 O 1 *
+bit 207 O 1 *
+bit 206 O 1 *
+bit 205 O 1 *
+bit 204 O 1 *
+bit 203 I 1 PB00_04
+bit 202 O 1 PB00_04 201 0 Z
+bit 201 C 0 *
+bit 200 I 1 PB00_05
+bit 199 O 1 PB00_05 198 0 Z
+bit 198 C 0 *
+bit 197 O 1 *
+bit 196 O 1 *
+bit 195 O 1 *
+bit 194 I 1 PB00_07
+bit 193 O 1 PB00_07 192 0 Z
+bit 192 C 0 *
+bit 191 I 1 PB00_08
+bit 190 O 1 PB00_08 189 0 Z
+bit 189 C 0 *
+bit 188 O 1 *
+bit 187 O 1 *
+bit 186 O 1 *
+bit 185 I 1 PB00_10
+bit 184 O 1 PB00_10 183 0 Z
+bit 183 C 0 *
+bit 182 O 1 *
+bit 181 O 1 *
+bit 180 O 1 *
+bit 179 O 1 *
+bit 178 O 1 *
+bit 177 O 1 *
+bit 176 I 1 PB00_13
+bit 175 O 1 PB00_13 174 0 Z
+bit 174 C 0 *
+bit 173 I 1 PB00_14
+bit 172 O 1 PB00_14 171 0 Z
+bit 171 C 0 *
+bit 170 O 1 *
+bit 169 O 1 *
+bit 168 O 1 *
+bit 167 I 1 PB00_16
+bit 166 O 1 PB00_16 165 0 Z
+bit 165 C 0 *
+bit 164 O 1 *
+bit 163 O 1 *
+bit 162 O 1 *
+bit 161 O 1 *
+bit 160 O 1 *
+bit 159 O 1 *
+bit 158 I 1 PB01_01
+bit 157 O 1 PB01_01 156 0 Z
+bit 156 C 0 *
+bit 155 O 1 *
+bit 154 O 1 *
+bit 153 O 1 *
+bit 152 O 1 *
+bit 151 O 1 *
+bit 150 O 1 *
+bit 149 I 1 PB01_04
+bit 148 O 1 PB01_04 147 0 Z
+bit 147 C 0 *
+bit 146 I 1 PB01_05
+bit 145 O 1 PB01_05 144 0 Z
+bit 144 C 0 *
+bit 143 O 1 *
+bit 142 O 1 *
+bit 141 O 1 *
+bit 140 I 1 PB01_07
+bit 139 O 1 PB01_07 138 0 Z
+bit 138 C 0 *
+bit 137 I 1 PB01_08
+bit 136 O 1 PB01_08 135 0 Z
+bit 135 C 0 *
+bit 134 O 1 *
+bit 133 O 1 *
+bit 132 O 1 *
+bit 131 I 1 PB01_10
+bit 130 O 1 PB01_10 129 0 Z
+bit 129 C 0 *
+bit 128 O 1 *
+bit 127 O 1 *
+bit 126 O 1 *
+bit 125 O 1 *
+bit 124 O 1 *
+bit 123 O 1 *
+bit 122 I 1 PB01_13
+bit 121 O 1 PB01_13 120 0 Z
+bit 120 C 0 *
+bit 119 I 1 PB01_14
+bit 118 O 1 PB01_14 117 0 Z
+bit 117 C 0 *
+bit 116 O 1 *
+bit 115 O 1 *
+bit 114 O 1 *
+bit 113 I 1 PB01_16
+bit 112 O 1 PB01_16 111 0 Z
+bit 111 C 0 *
+bit 110 O 1 *
+bit 109 O 1 *
+bit 108 O 1 *
+bit 107 O 1 *
+bit 106 O 1 *
+bit 105 O 1 *
+bit 104 I 1 PB02_01
+bit 103 O 1 PB02_01 102 0 Z
+bit 102 C 0 *
+bit 101 O 1 *
+bit 100 O 1 *
+bit 99 O 1 *
+bit 98 O 1 *
+bit 97 O 1 *
+bit 96 O 1 *
+bit 95 I 1 PB02_04
+bit 94 O 1 PB02_04 93 0 Z
+bit 93 C 0 *
+bit 92 O 1 *
+bit 91 O 1 *
+bit 90 O 1 *
+bit 89 O 1 *
+bit 88 O 1 *
+bit 87 O 1 *
+bit 86 I 1 PB02_07
+bit 85 O 1 PB02_07 84 0 Z
+bit 84 C 0 *
+bit 83 I 1 PB02_08
+bit 82 O 1 PB02_08 81 0 Z
+bit 81 C 0 *
+bit 80 O 1 *
+bit 79 O 1 *
+bit 78 O 1 *
+bit 77 I 1 PB02_10
+bit 76 O 1 PB02_10 75 0 Z
+bit 75 C 0 *
+bit 74 O 1 *
+bit 73 O 1 *
+bit 72 O 1 *
+bit 71 O 1 *
+bit 70 O 1 *
+bit 69 O 1 *
+bit 68 I 1 PB02_13
+bit 67 O 1 PB02_13 66 0 Z
+bit 66 C 0 *
+bit 65 I 1 PB02_14
+bit 64 O 1 PB02_14 63 0 Z
+bit 63 C 0 *
+bit 62 I 1 PB02_15
+bit 61 O 1 PB02_15 60 0 Z
+bit 60 C 0 *
+bit 59 I 1 PB02_16
+bit 58 O 1 PB02_16 57 0 Z
+bit 57 C 0 *
+bit 56 O 1 *
+bit 55 O 1 *
+bit 54 O 1 *
+bit 53 O 1 *
+bit 52 O 1 *
+bit 51 O 1 *
+bit 50 I 1 PB03_01
+bit 49 O 1 PB03_01 48 0 Z
+bit 48 C 0 *
+bit 47 O 1 *
+bit 46 O 1 *
+bit 45 O 1 *
+bit 44 O 1 *
+bit 43 O 1 *
+bit 42 O 1 *
+bit 41 I 1 PB03_04
+bit 40 O 1 PB03_04 39 0 Z
+bit 39 C 0 *
+bit 38 O 1 *
+bit 37 O 1 *
+bit 36 O 1 *
+bit 35 O 1 *
+bit 34 O 1 *
+bit 33 O 1 *
+bit 32 I 1 PB03_07
+bit 31 O 1 PB03_07 30 0 Z
+bit 30 C 0 *
+bit 29 O 1 *
+bit 28 O 1 *
+bit 27 O 1 *
+bit 26 O 1 *
+bit 25 O 1 *
+bit 24 O 1 *
+bit 23 I 1 PB03_10
+bit 22 O 1 PB03_10 21 0 Z
+bit 21 C 0 *
+bit 20 O 1 *
+bit 19 O 1 *
+bit 18 O 1 *
+bit 17 O 1 *
+bit 16 O 1 *
+bit 15 O 1 *
+bit 14 I 1 PB03_13
+bit 13 O 1 PB03_13 12 0 Z
+bit 12 C 0 *
+bit 11 I 1 PB03_14
+bit 10 O 1 PB03_14 9 0 Z
+bit 9 C 0 *
+bit 8 O 1 *
+bit 7 O 1 *
+bit 6 O 1 *
+bit 5 I 1 PB03_16
+bit 4 O 1 PB03_16 3 0 Z
+bit 3 C 0 *
+bit 2 O 1 *
+bit 1 O 1 *
+bit 0 O 1 *
--- /dev/null
+#
+# $Id: STEPPINGS,v 1.1 2003/02/14 11:14:56 telka Exp $
+#
+# Copyright (C) 2003 Tower Technologies s.r.l.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Jerome Debard <jdebard@vmetro.no>, 2005.
+#
+
+# bits 31-28 of the Device Identification Register
+0000 xcf04s 0
--- /dev/null
+#
+# JTAG declarations for XCF04s
+# Copyright (C) 2005
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Jerome Debard <jdebard@vmetro.no>, 2005.
+#
+
+signal D0 1
+signal NC1 2
+signal CLK 3
+signal TDI 4
+signal TMS 5
+signal TCK 6
+signal CF 7
+signal OE_RESET 8
+signal NC2 9
+signal CE 10
+signal GND 11
+signal NC3 12
+signal CEO 13
+signal NC4 14
+signal NC5 15
+signal NC6 16
+signal TDO 17
+signal VCC 18
+signal VCCO 19
+signal VCCAUX 20
+
+
+
+# mandatory data registers
+register BSR 25
+register BR 1
+
+# optional data registers
+register UCR 32
+
+# user-defined registers
+
+
+# instructions
+instruction length 8
+
+# mandatory instructions
+instruction EXTEST 00000000 BSR
+instruction SAMPLE/PRELOAD 00000001 BSR
+instruction BYPASS 11111111 BR
+#instruction INTEST ???????? BSR
+instruction IDCODE 11111110 UCR
+instruction USERCODE 11111101 UCR
+instruction HIGHZ 11111100 BR
+instruction CLAMP 11111010 BR
+
+# user-defined instructions
+#instruction ISPEN 11101000
+#instruction ISPENC 11101001
+#instruction FPGM 11101010
+#instruction FADDR 11101011
+#instruction FVFY0 11101111
+#instruction FVFY1 11111000
+#instruction FVFY3 11100010
+#instruction FVFY6 11100110
+#instruction FERASE 11101100
+#instruction SERASE 00001010
+#instruction FDATA0 11101101
+#instruction FDATA3 11110011
+#instruction FBLANK0 11100101
+#instruction FBLANK3 11100001
+#instruction FBLANK6 11100100
+#instruction NORMRST 11110000
+#instruction CONFIG 11101110
+#instruction priv1 11110001
+#instruction ISCTESTSTATUS 11100011
+#instruction priv3 11100111
+#instruction priv4 11110110
+#instruction priv5 11100000
+#instruction priv6 11110111
+#instruction priv7 11110010
+#instruction ISCCLRSTATUS 11110100
+#instruction priv9 11110101
+
+
+# BSR description
+bit 0 I ? CLK
+bit 1 X ? .
+bit 2 X ? .
+bit 3 C ? .
+bit 4 O ? D0 3 0 Z
+bit 5 X ? .
+bit 6 X ? .
+bit 7 X ? .
+bit 8 X ? .
+bit 9 X ? .
+bit 10 X ? .
+bit 11 C ? .
+bit 12 O ? CEO 11 0 Z
+bit 13 X ? .
+bit 14 X ? .
+bit 15 I ? CE
+bit 16 X ? .
+bit 17 X ? .
+bit 18 C ? .
+bit 19 O ? OE_RESET 18 0 Z
+bit 20 I ? OE_RESET
+bit 21 C ? .
+bit 22 O ? CF 21 0 Z
+bit 23 X ? .
+bit 24 X ? .
--- /dev/null
+#
+# $Id$
+#
+# Copyright (C) 2003 Jachym Holecek <freza@psi.cz>
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+
+# bits 31-28 of the Device Identification Register
+0000 xcr3032xl-vq44 0
--- /dev/null
+#
+# $Id$
+#
+# JTAG declarations for XCR3032XL-VQ44
+# Copyright (C) 2004 RightHand Technologies, Inc.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Andrew Dyer <adyer@righthandtech.com>, 2004
+#
+# Documentation:
+# [1] Xilinx Inc., "CoolRunner XPLA3 Preliminary Product Specification"
+# DS012 (v1.7) June 23, 2003
+# [2] Xilinx Inc., "BSDL file for device XCR3032, package VQ44
+# Revision: 1.2", 2002-01-03
+# [3] Xilinx Inc., "XCR3032XL 32 Macrocell CPLD Preliminary Product Specification"
+# DS023 (v1.8) August 15, 2003
+#
+signal tck
+signal tdi
+signal tdo
+signal tms
+signal CLK0_IN0
+signal CLK1_IN1
+signal CLK2_IN2
+signal CLK3_IN3
+signal A0
+signal A1
+signal A2
+signal A4
+signal A5
+signal A6
+signal A7
+signal A9
+signal A10
+signal A11
+signal A12
+signal A13
+signal A14
+signal A15
+signal B0
+signal B1
+signal B2
+signal B4
+signal B5
+signal B6
+signal B7
+signal B9
+signal B10
+signal B11
+signal B12
+signal B13
+signal B14
+signal B15
+signal VDDE1
+signal VDDE2
+signal VDDI1
+signal VDDI2
+signal GND1
+signal GND2
+signal GND3
+
+register BSR 132
+register BR 1
+register DIR 32
+
+instruction length 5
+
+instruction BYPASS 11111 BR
+instruction SAMPLE/PRELOAD 00010 BSR
+instruction EXTEST 00000 BSR
+instruction IDCODE 00001 DIR
+
+bit 131 O 1 *
+bit 130 I 1 A0
+bit 129 O 1 A0 128 0 Z
+bit 128 C 1 *
+bit 127 O 1 *
+bit 126 I 1 A1
+bit 125 O 1 A1 124 0 Z
+bit 124 C 1 *
+bit 123 O 1 *
+bit 122 I 1 A2
+bit 121 O 1 A2 120 0 Z
+bit 120 C 1 *
+bit 119 O 1 *
+bit 118 O 1 *
+bit 117 O 1 *
+bit 116 O 1 *
+bit 115 O 1 *
+bit 114 I 1 A4
+bit 113 O 1 A4 112 0 Z
+bit 112 C 1 *
+bit 111 O 1 *
+bit 110 I 1 A5
+bit 109 O 1 A5 108 0 Z
+bit 108 C 1 *
+bit 107 O 1 *
+bit 106 I 1 A6
+bit 105 O 1 A6 104 0 Z
+bit 104 C 1 *
+bit 103 O 1 *
+bit 102 I 1 A7
+bit 101 O 1 A7 100 0 Z
+bit 100 C 1 *
+bit 99 O 1 *
+bit 98 O 1 *
+bit 97 O 1 *
+bit 96 O 1 *
+bit 95 O 1 *
+bit 94 I 1 A9
+bit 93 O 1 A9 92 0 Z
+bit 92 C 1 *
+bit 91 O 1 *
+bit 90 I 1 A10
+bit 89 O 1 A10 88 0 Z
+bit 88 C 1 *
+bit 87 O 1 *
+bit 86 I 1 A11
+bit 85 O 1 A11 84 0 Z
+bit 84 C 1 *
+bit 83 O 1 *
+bit 82 I 1 A12
+bit 81 O 1 A12 80 0 Z
+bit 80 C 1 *
+bit 79 O 1 *
+bit 78 I 1 A13
+bit 77 O 1 A13 76 0 Z
+bit 76 C 1 *
+bit 75 O 1 *
+bit 74 I 1 A14
+bit 73 O 1 A14 72 0 Z
+bit 72 C 1 *
+bit 71 O 1 *
+bit 70 I 1 A15
+bit 69 O 1 A15 68 0 Z
+bit 68 C 1 *
+bit 67 O 1 *
+bit 66 I 1 B0
+bit 65 O 1 B0 64 0 Z
+bit 64 C 1 *
+bit 63 O 1 *
+bit 62 I 1 B1
+bit 61 O 1 B1 60 0 Z
+bit 60 C 1 *
+bit 59 O 1 *
+bit 58 I 1 B2
+bit 57 O 1 B2 56 0 Z
+bit 56 C 1 *
+bit 55 O 1 *
+bit 54 O 1 *
+bit 53 O 1 *
+bit 52 O 1 *
+bit 51 O 1 *
+bit 50 I 1 B4
+bit 49 O 1 B4 48 0 Z
+bit 48 C 1 *
+bit 47 O 1 *
+bit 46 I 1 B5
+bit 45 O 1 B5 44 0 Z
+bit 44 C 1 *
+bit 43 O 1 *
+bit 42 I 1 B6
+bit 41 O 1 B6 40 0 Z
+bit 40 C 1 *
+bit 39 O 1 *
+bit 38 I 1 B7
+bit 37 O 1 B7 36 0 Z
+bit 36 C 1 *
+bit 35 O 1 *
+bit 34 O 1 *
+bit 33 O 1 *
+bit 32 O 1 *
+bit 31 O 1 *
+bit 30 I 1 B9
+bit 29 O 1 B9 28 0 Z
+bit 28 C 1 *
+bit 27 O 1 *
+bit 26 I 1 B10
+bit 25 O 1 B10 24 0 Z
+bit 24 C 1 *
+bit 23 O 1 *
+bit 22 I 1 B11
+bit 21 O 1 B11 20 0 Z
+bit 20 C 1 *
+bit 19 O 1 *
+bit 18 I 1 B12
+bit 17 O 1 B12 16 0 Z
+bit 16 C 1 *
+bit 15 O 1 *
+bit 14 I 1 B13
+bit 13 O 1 B13 12 0 Z
+bit 12 C 1 *
+bit 11 O 1 *
+bit 10 I 1 B14
+bit 9 O 1 B14 8 0 Z
+bit 8 C 1 *
+bit 7 O 1 *
+bit 6 I 1 B15
+bit 5 O 1 B15 4 0 Z
+bit 4 C 1 *
+bit 3 I 1 CLK0_IN0
+bit 2 I 1 CLK1_IN1
+bit 1 I 1 CLK2_IN2
+bit 0 I 1 CLK3_IN3
--- /dev/null
+#
+# $Id$
+#
+# Copyright (C) 2002 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Marcel Telka <marcel@telka.sk>, 2002.
+#
+
+# bits 31-28 of the Device Identification Register
+0000 xcr3128xl-cs144 0
--- /dev/null
+#
+# $Id$
+#
+# JTAG declarations for XCR3128XL-CS144
+# Copyright (C) 2002 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Marcel Telka <marcel@telka.sk>, 2002.
+#
+# Documentation:
+# [1] Xilinx Inc., "CoolRunner XPLA3 CPLD Advance Product Specification",
+# DS012 (v1.5) January 7, 2002
+# [2] Xilinx Inc., "BSDL file for device xcr3128xl, package cs144
+# Revision 1.3", 2002-01-03
+# [3] Xilinx Inc., "XCR3128XL 128 Macrocell CPLD Preliminary Product
+# Specification", DS016 (v1.8) January 8, 2002
+#
+
+# 8 function blocks (A to H) by 16 macrocells (0 to 15)
+# see Table 3 in [3] and Table 4 in [3]
+signal A0 B12
+signal A2 D12
+signal A3 D13
+signal A4 E10
+signal A5 E11
+signal A6 E12
+signal A10 E13
+signal A11 F10
+signal A12 F12
+signal A13 F13
+signal A14 G10
+signal A15 G11
+signal B0 A13
+signal B1 A12
+signal B2 B11
+signal B3 A11
+signal B4 D10
+signal B5 C10
+signal B6 B10
+signal B10 D9
+signal B11 C9
+signal B12 B9
+signal B13 A9
+signal B14 D8
+signal B15 C8
+signal C0 G13
+signal C2 H13
+signal C3 H12
+signal C4 H11
+signal C5 J13
+signal C6 J12
+signal C10 J11
+signal C11 J10
+signal C12 K13
+signal C13 K12
+signal C14 K11
+signal C15 K10
+signal D0 M8
+signal D1 L8
+signal D2 K8
+signal D3 N9
+signal D4 L9
+signal D5 K9
+signal D6 N10
+signal D10 M10
+signal D11 L10
+signal D12 N11
+signal D13 M11
+signal D14 L11
+signal D15 M12
+signal E0 A1
+signal E1 A2
+signal E2 C3
+signal E3 B3
+signal E4 A3
+signal E5 C4
+signal E6 B4
+signal E10 A4
+signal E11 D5
+signal E12 B5
+signal E13 A5
+signal E14 D6
+signal E15 C6
+signal F0 B1
+signal F2 D1
+signal F3 E4
+signal F4 E3
+signal F5 E2
+signal F6 E1
+signal F10 F4
+signal F11 F3
+signal F12 F2
+signal F13 G2
+signal F14 G1
+signal F15 G3
+signal G0 N7
+signal G1 M7
+signal G2 N6
+signal G3 M6
+signal G4 M5
+signal G5 L5
+signal G6 K5
+signal G10 N4
+signal G11 M4
+signal G12 L4
+signal G13 K4
+signal G14 N3
+signal G15 M3
+signal GND A6 A8 C5 C13 D3 G4 H10 L6 L7 M9 N2 N8
+signal H0 H1
+signal H2 H3
+signal H3 H4
+signal H4 J1
+signal H5 J3
+signal H6 J4
+signal H10 K1
+signal H11 K2
+signal H12 K3
+signal H13 L1
+signal H14 M2
+signal H15 N1
+signal IN0_CLK0 D7
+signal IN1_CLK1 C7
+signal IN2_CLK2 A7
+signal IN3_CLK3 B7
+signal PORT_EN F1
+signal TCK G12
+signal TDI D2
+signal TDO D11
+signal TMS H2
+signal Vcc A10 B2 B6 B8 D4 F11 J2 K6 K7 L13 N5 N12
+signal N/C B13 C1 C2 C11 C12 L2 L3 L12 M1 M13 N13
+
+# mandatory data registers
+register BSR 444 # see [2]
+register BR 1
+# optional data registers
+register DIR 32
+# user-defined registers
+register ISPSR 274 # ISP (In-System Programming) Shift Register, see [2]
+
+# instructions - see [2]
+instruction length 5
+# mandatory instructions - see Table 3 in [1]
+instruction EXTEST 00000 BSR
+instruction SAMPLE/PRELOAD 00010 BSR
+instruction BYPASS 11111 BR
+# optional instructions - see Table 3 in [1]
+instruction IDCODE 00001 DIR
+instruction HIGHZ 00101 BR
+instruction INTEST 00011 BSR
+# user-defined instructions - see Table 5 in [1]
+instruction ENABLE 01001 ISPSR
+instruction ERASE 01010 ISPSR
+instruction PROGRAM 01011 ISPSR
+instruction DISABLE 10000 ISPSR
+instruction VERIFY 01100 ISPSR
+
+# see [2]
+bit 443 X ? .
+bit 442 I ? A0
+bit 441 O ? A0 440 0 Z
+bit 440 C ? A0
+bit 439 X ? .
+bit 438 X ? .
+bit 437 X ? .
+bit 436 X ? .
+bit 435 X ? .
+bit 434 I ? A2
+bit 433 O ? A2 432 0 Z
+bit 432 C ? A2
+bit 431 X ? .
+bit 430 I ? A3
+bit 429 O ? A3 428 0 Z
+bit 428 C ? A3
+bit 427 X ? .
+bit 426 I ? A4
+bit 425 O ? A4 424 0 Z
+bit 424 C ? A4
+bit 423 X ? .
+bit 422 I ? A5
+bit 421 O ? A5 420 0 Z
+bit 420 C ? A5
+bit 419 X ? .
+bit 418 I ? A6
+bit 417 O ? A6 416 0 Z
+bit 416 C ? A6
+bit 415 X ? .
+bit 414 X ? .
+bit 413 X ? .
+bit 412 X ? .
+bit 411 I ? A10
+bit 410 O ? A10 409 0 Z
+bit 409 C ? A10
+bit 408 X ? .
+bit 407 I ? A11
+bit 406 O ? A11 405 0 Z
+bit 405 C ? A11
+bit 404 X ? .
+bit 403 I ? A12
+bit 402 O ? A12 401 0 Z
+bit 401 C ? A12
+bit 400 X ? .
+bit 399 I ? A13
+bit 398 O ? A13 397 0 Z
+bit 397 C ? A13
+bit 396 X ? .
+bit 395 I ? A14
+bit 394 O ? A14 393 0 Z
+bit 393 C ? A14
+bit 392 X ? .
+bit 391 I ? A15
+bit 390 O ? A15 389 0 Z
+bit 389 C ? A15
+bit 388 X ? .
+bit 387 I ? C0
+bit 386 O ? C0 385 0 Z
+bit 385 C ? C0
+bit 384 X ? .
+bit 383 X ? .
+bit 382 X ? .
+bit 381 X ? .
+bit 380 X ? .
+bit 379 I ? C2
+bit 378 O ? C2 377 0 Z
+bit 377 C ? C2
+bit 376 X ? .
+bit 375 I ? C3
+bit 374 O ? C3 373 0 Z
+bit 373 C ? C3
+bit 372 X ? .
+bit 371 I ? C4
+bit 370 O ? C4 369 0 Z
+bit 369 C ? C4
+bit 368 X ? .
+bit 367 I ? C5
+bit 366 O ? C5 365 0 Z
+bit 365 C ? C5
+bit 364 X ? .
+bit 363 I ? C6
+bit 362 O ? C6 361 0 Z
+bit 361 C ? C6
+bit 360 X ? .
+bit 359 X ? .
+bit 358 X ? .
+bit 357 X ? .
+bit 356 I ? C10
+bit 355 O ? C10 354 0 Z
+bit 354 C ? C10
+bit 353 X ? .
+bit 352 I ? C11
+bit 351 O ? C11 350 0 Z
+bit 350 C ? C11
+bit 349 X ? .
+bit 348 I ? C12
+bit 347 O ? C12 346 0 Z
+bit 346 C ? C12
+bit 345 X ? .
+bit 344 I ? C13
+bit 343 O ? C13 342 0 Z
+bit 342 C ? C13
+bit 341 X ? .
+bit 340 I ? C14
+bit 339 O ? C14 338 0 Z
+bit 338 C ? C14
+bit 337 X ? .
+bit 336 I ? C15
+bit 335 O ? C15 334 0 Z
+bit 334 C ? C15
+bit 333 X ? .
+bit 332 I ? B0
+bit 331 O ? B0 330 0 Z
+bit 330 C ? B0
+bit 329 X ? .
+bit 328 I ? B1
+bit 327 O ? B1 326 0 Z
+bit 326 C ? B1
+bit 325 X ? .
+bit 324 I ? B2
+bit 323 O ? B2 322 0 Z
+bit 322 C ? B2
+bit 321 X ? .
+bit 320 I ? B3
+bit 319 O ? B3 318 0 Z
+bit 318 C ? B3
+bit 317 X ? .
+bit 316 I ? B4
+bit 315 O ? B4 314 0 Z
+bit 314 C ? B4
+bit 313 X ? .
+bit 312 I ? B5
+bit 311 O ? B5 310 0 Z
+bit 310 C ? B5
+bit 309 X ? .
+bit 308 I ? B6
+bit 307 O ? B6 306 0 Z
+bit 306 C ? B6
+bit 305 X ? .
+bit 304 X ? .
+bit 303 X ? .
+bit 302 X ? .
+bit 301 I ? B10
+bit 300 O ? B10 299 0 Z
+bit 299 C ? B10
+bit 298 X ? .
+bit 297 I ? B11
+bit 296 O ? B11 295 0 Z
+bit 295 C ? B11
+bit 294 X ? .
+bit 293 I ? B12
+bit 292 O ? B12 291 0 Z
+bit 291 C ? B12
+bit 290 X ? .
+bit 289 I ? B13
+bit 288 O ? B13 287 0 Z
+bit 287 C ? B13
+bit 286 X ? .
+bit 285 I ? B14
+bit 284 O ? B14 283 0 Z
+bit 283 C ? B14
+bit 282 X ? .
+bit 281 I ? B15
+bit 280 O ? B15 279 0 Z
+bit 279 C ? B15
+bit 278 X ? .
+bit 277 I ? D0
+bit 276 O ? D0 275 0 Z
+bit 275 C ? D0
+bit 274 X ? .
+bit 273 I ? D1
+bit 272 O ? D1 271 0 Z
+bit 271 C ? D1
+bit 270 X ? .
+bit 269 I ? D2
+bit 268 O ? D2 267 0 Z
+bit 267 C ? D2
+bit 266 X ? .
+bit 265 I ? D3
+bit 264 O ? D3 263 0 Z
+bit 263 C ? D3
+bit 262 X ? .
+bit 261 I ? D4
+bit 260 O ? D4 259 0 Z
+bit 259 C ? D4
+bit 258 X ? .
+bit 257 I ? D5
+bit 256 O ? D5 255 0 Z
+bit 255 C ? D5
+bit 254 X ? .
+bit 253 I ? D6
+bit 252 O ? D6 251 0 Z
+bit 251 C ? D6
+bit 250 X ? .
+bit 249 X ? .
+bit 248 X ? .
+bit 247 X ? .
+bit 246 I ? D10
+bit 245 O ? D10 244 0 Z
+bit 244 C ? D10
+bit 243 X ? .
+bit 242 I ? D11
+bit 241 O ? D11 240 0 Z
+bit 240 C ? D11
+bit 239 X ? .
+bit 238 I ? D12
+bit 237 O ? D12 236 0 Z
+bit 236 C ? D12
+bit 235 X ? .
+bit 234 I ? D13
+bit 233 O ? D13 232 0 Z
+bit 232 C ? D13
+bit 231 X ? .
+bit 230 I ? D14
+bit 229 O ? D14 228 0 Z
+bit 228 C ? D14
+bit 227 X ? .
+bit 226 I ? D15
+bit 225 O ? D15 224 0 Z
+bit 224 C ? D15
+bit 223 X ? .
+bit 222 I ? E0
+bit 221 O ? E0 220 0 Z
+bit 220 C ? E0
+bit 219 X ? .
+bit 218 I ? E1
+bit 217 O ? E1 216 0 Z
+bit 216 C ? E1
+bit 215 X ? .
+bit 214 I ? E2
+bit 213 O ? E2 212 0 Z
+bit 212 C ? E2
+bit 211 X ? .
+bit 210 I ? E3
+bit 209 O ? E3 208 0 Z
+bit 208 C ? E3
+bit 207 X ? .
+bit 206 I ? E4
+bit 205 O ? E4 204 0 Z
+bit 204 C ? E4
+bit 203 X ? .
+bit 202 I ? E5
+bit 201 O ? E5 200 0 Z
+bit 200 C ? E5
+bit 199 X ? .
+bit 198 I ? E6
+bit 197 O ? E6 196 0 Z
+bit 196 C ? E6
+bit 195 X ? .
+bit 194 X ? .
+bit 193 X ? .
+bit 192 X ? .
+bit 191 I ? E10
+bit 190 O ? E10 189 0 Z
+bit 189 C ? E10
+bit 188 X ? .
+bit 187 I ? E11
+bit 186 O ? E11 185 0 Z
+bit 185 C ? E11
+bit 184 X ? .
+bit 183 I ? E12
+bit 182 O ? E12 181 0 Z
+bit 181 C ? E12
+bit 180 X ? .
+bit 179 I ? E13
+bit 178 O ? E13 177 0 Z
+bit 177 C ? E13
+bit 176 X ? .
+bit 175 I ? E14
+bit 174 O ? E14 173 0 Z
+bit 173 C ? E14
+bit 172 X ? .
+bit 171 I ? E15
+bit 170 O ? E15 169 0 Z
+bit 169 C ? E15
+bit 168 X ? .
+bit 167 I ? G0
+bit 166 O ? G0 165 0 Z
+bit 165 C ? G0
+bit 164 X ? .
+bit 163 I ? G1
+bit 162 O ? G1 161 0 Z
+bit 161 C ? G1
+bit 160 X ? .
+bit 159 I ? G2
+bit 158 O ? G2 157 0 Z
+bit 157 C ? G2
+bit 156 X ? .
+bit 155 I ? G3
+bit 154 O ? G3 153 0 Z
+bit 153 C ? G3
+bit 152 X ? .
+bit 151 I ? G4
+bit 150 O ? G4 149 0 Z
+bit 149 C ? G4
+bit 148 X ? .
+bit 147 I ? G5
+bit 146 O ? G5 145 0 Z
+bit 145 C ? G5
+bit 144 X ? .
+bit 143 I ? G6
+bit 142 O ? G6 141 0 Z
+bit 141 C ? G6
+bit 140 X ? .
+bit 139 X ? .
+bit 138 X ? .
+bit 137 X ? .
+bit 136 I ? G10
+bit 135 O ? G10 134 0 Z
+bit 134 C ? G10
+bit 133 X ? .
+bit 132 I ? G11
+bit 131 O ? G11 130 0 Z
+bit 130 C ? G11
+bit 129 X ? .
+bit 128 I ? G12
+bit 127 O ? G12 126 0 Z
+bit 126 C ? G12
+bit 125 X ? .
+bit 124 I ? G13
+bit 123 O ? G13 122 0 Z
+bit 122 C ? G13
+bit 121 X ? .
+bit 120 I ? G14
+bit 119 O ? G14 118 0 Z
+bit 118 C ? G14
+bit 117 X ? .
+bit 116 I ? G15
+bit 115 O ? G15 114 0 Z
+bit 114 C ? G15
+bit 113 X ? .
+bit 112 I ? F0
+bit 111 O ? F0 110 0 Z
+bit 110 C ? F0
+bit 109 X ? .
+bit 108 X ? .
+bit 107 X ? .
+bit 106 X ? .
+bit 105 X ? .
+bit 104 I ? F2
+bit 103 O ? F2 102 0 Z
+bit 102 C ? F2
+bit 101 X ? .
+bit 100 I ? F3
+bit 99 O ? F3 98 0 Z
+bit 98 C ? F3
+bit 97 X ? .
+bit 96 I ? F4
+bit 95 O ? F4 94 0 Z
+bit 94 C ? F4
+bit 93 X ? .
+bit 92 I ? F5
+bit 91 O ? F5 90 0 Z
+bit 90 C ? F5
+bit 89 X ? .
+bit 88 I ? F6
+bit 87 O ? F6 86 0 Z
+bit 86 C ? F6
+bit 85 X ? .
+bit 84 X ? .
+bit 83 X ? .
+bit 82 X ? .
+bit 81 I ? F10
+bit 80 O ? F10 79 0 Z
+bit 79 C ? F10
+bit 78 X ? .
+bit 77 I ? F11
+bit 76 O ? F11 75 0 Z
+bit 75 C ? F11
+bit 74 X ? .
+bit 73 I ? F12
+bit 72 O ? F12 71 0 Z
+bit 71 C ? F12
+bit 70 X ? .
+bit 69 I ? F13
+bit 68 O ? F13 67 0 Z
+bit 67 C ? F13
+bit 66 X ? .
+bit 65 I ? F14
+bit 64 O ? F14 63 0 Z
+bit 63 C ? F14
+bit 62 X ? .
+bit 61 I ? F15
+bit 60 O ? F15 59 0 Z
+bit 59 C ? F15
+bit 58 X ? .
+bit 57 I ? H0
+bit 56 O ? H0 55 0 Z
+bit 55 C ? H0
+bit 54 X ? .
+bit 53 X ? .
+bit 52 X ? .
+bit 51 X ? .
+bit 50 X ? .
+bit 49 I ? H2
+bit 48 O ? H2 47 0 Z
+bit 47 C ? .
+bit 46 X ? .
+bit 45 I ? H3
+bit 44 O ? H3 43 0 Z
+bit 43 C ? H3
+bit 42 X ? .
+bit 41 I ? H4
+bit 40 O ? H4 39 0 Z
+bit 39 C ? H4
+bit 38 X ? .
+bit 37 I ? H5
+bit 36 O ? H5 35 0 Z
+bit 35 C ? H5
+bit 34 X ? .
+bit 33 I ? H6
+bit 32 O ? H6 31 0 Z
+bit 31 C ? H6
+bit 30 X ? .
+bit 29 X ? .
+bit 28 X ? .
+bit 27 X ? .
+bit 26 I ? H10
+bit 25 O ? H10 24 0 Z
+bit 24 C ? H10
+bit 23 X ? .
+bit 22 I ? H11
+bit 21 O ? H11 20 0 Z
+bit 20 C ? H11
+bit 19 X ? .
+bit 18 I ? H12
+bit 17 O ? H12 16 0 Z
+bit 16 C ? H12
+bit 15 X ? .
+bit 14 I ? H13
+bit 13 O ? H13 12 0 Z
+bit 12 C ? H13
+bit 11 X ? .
+bit 10 I ? H14
+bit 9 O ? H14 8 0 Z
+bit 8 C ? H14
+bit 7 X ? .
+bit 6 I ? H15
+bit 5 O ? H15 4 0 Z
+bit 4 C ? H15
+bit 3 I ? IN0_CLK0
+bit 2 I ? IN1_CLK1
+bit 1 I ? IN2_CLK2
+bit 0 I ? IN3_CLK3
--- /dev/null
+# JTAG declarations for XCR3128XL-VQ100
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Michael Lauer <mickeyl@handhelds.org>, 2004.
+# Based on the definition for XCR3128XL-CS144
+#
+# Additional Documentation:
+# [1] Xilinx Inc., "CoolRunner XPLA3 CPLD Advance Product Specification",
+# DS012 (v1.5) January 7, 2002
+# [2] Xilinx Inc., "BSDL file for device xcr3128xl, package vq100
+# Revision 1.3", 2002-01-03
+# [3] Xilinx Inc., "XCR3128XL 128 Macrocell CPLD Preliminary Product
+# Specification", DS016 (v1.8) January 8, 2002
+#
+
+# 8 function blocks (A to H) by 16 macrocells (0 to 15)
+# see Table 3 in [3] and Table 4 in [3]
+signal A2 72
+signal A3 71
+signal A4 70
+signal A5 69
+signal A6 68
+signal A10 67
+signal A12 65
+signal A13 64
+signal A14 63
+signal B0 75
+signal B1 76
+signal B2 77
+signal B3 78
+signal B4 79
+signal B5 80
+signal B6 81
+signal B10 83
+signal B11 84
+signal B12 85
+signal C2 61
+signal C3 60
+signal C5 58
+signal C6 57
+signal C10 56
+signal C11 55
+signal C12 54
+signal C13 53
+signal C14 52
+signal D1 40
+signal D2 41
+signal D3 42
+signal D4 44
+signal D5 45
+signal D6 46
+signal D10 47
+signal D11 48
+signal D12 49
+signal D13 50
+signal E0 2
+signal E1 1
+signal E2 100
+signal E3 99
+signal E4 98
+signal E5 97
+signal E6 96
+signal TCK 62
+signal TDI 4
+signal TDO 73
+signal TMS 15
+signal IN0_CLK0 90
+signal IN1_CLK1 89
+signal IN2_CLK2 88
+signal IN3_CLK3 87
+signal PORT_EN 11
+signal Vcc 3 18 34 39 51 66 82 91
+signal GND 26 38 43 59 74 86 95
+
+# mandatory data registers
+register BSR 444 # see [2]
+register BR 1
+# optional data registers
+register DIR 32
+# user-defined registers
+register ISPSR 274 # ISP (In-System Programming) Shift Register, see [2]
+
+# instructions - see [2]
+instruction length 5
+# mandatory instructions - see Table 3 in [1]
+instruction EXTEST 00000 BSR
+instruction SAMPLE/PRELOAD 00010 BSR
+instruction BYPASS 11111 BR
+# optional instructions - see Table 3 in [1]
+instruction IDCODE 00001 DIR
+instruction HIGHZ 00101 BR
+instruction INTEST 00011 BSR
+# user-defined instructions - see Table 5 in [1]
+instruction ENABLE 01001 ISPSR
+instruction ERASE 01010 ISPSR
+instruction PROGRAM 01011 ISPSR
+instruction DISABLE 10000 ISPSR
+instruction VERIFY 01100 ISPSR
+
+bit 443 O 1 *
+bit 442 O 1 *
+bit 441 O 1 *
+bit 440 O 1 *
+bit 439 O 1 *
+bit 438 O 1 *
+bit 437 O 1 *
+bit 436 O 1 *
+bit 435 O 1 *
+bit 434 I 1 A2
+bit 433 O 1 A2 432 0 Z
+bit 432 C 1 *
+bit 431 O 1 *
+bit 430 I 1 A3
+bit 429 O 1 A3 428 0 Z
+bit 428 C 1 *
+bit 427 O 1 *
+bit 426 I 1 A4
+bit 425 O 1 A4 424 0 Z
+bit 424 C 1 *
+bit 423 O 1 *
+bit 422 I 1 A5
+bit 421 O 1 A5 420 0 Z
+bit 420 C 1 *
+bit 419 O 1 *
+bit 418 I 1 A6
+bit 417 O 1 A6 416 0 Z
+bit 416 C 1 *
+bit 415 O 1 *
+bit 414 O 1 *
+bit 413 O 1 *
+bit 412 O 1 *
+bit 411 I 1 A10
+bit 410 O 1 A10 409 0 Z
+bit 409 C 1 *
+bit 408 O 1 *
+bit 407 O 1 *
+bit 406 O 1 *
+bit 405 O 1 *
+bit 404 O 1 *
+bit 403 I 1 A12
+bit 402 O 1 A12 401 0 Z
+bit 401 C 1 *
+bit 400 O 1 *
+bit 399 I 1 A13
+bit 398 O 1 A13 397 0 Z
+bit 397 C 1 *
+bit 396 O 1 *
+bit 395 I 1 A14
+bit 394 O 1 A14 393 0 Z
+bit 393 C 1 *
+bit 392 O 1 *
+bit 391 O 1 *
+bit 390 O 1 *
+bit 389 O 1 *
+bit 388 O 1 *
+bit 387 O 1 *
+bit 386 O 1 *
+bit 385 O 1 *
+bit 384 O 1 *
+bit 383 O 1 *
+bit 382 O 1 *
+bit 381 O 1 *
+bit 380 O 1 *
+bit 379 I 1 C2
+bit 378 O 1 C2 377 0 Z
+bit 377 C 1 *
+bit 376 O 1 *
+bit 375 I 1 C3
+bit 374 O 1 C3 373 0 Z
+bit 373 C 1 *
+bit 372 O 1 *
+bit 371 O 1 *
+bit 370 O 1 *
+bit 369 O 1 *
+bit 368 O 1 *
+bit 367 I 1 C5
+bit 366 O 1 C5 365 0 Z
+bit 365 C 1 *
+bit 364 O 1 *
+bit 363 I 1 C6
+bit 362 O 1 C6 361 0 Z
+bit 361 C 1 *
+bit 360 O 1 *
+bit 359 O 1 *
+bit 358 O 1 *
+bit 357 O 1 *
+bit 356 I 1 C10
+bit 355 O 1 C10 354 0 Z
+bit 354 C 1 *
+bit 353 O 1 *
+bit 352 I 1 C11
+bit 351 O 1 C11 350 0 Z
+bit 350 C 1 *
+bit 349 O 1 *
+bit 348 I 1 C12
+bit 347 O 1 C12 346 0 Z
+bit 346 C 1 *
+bit 345 O 1 *
+bit 344 I 1 C13
+bit 343 O 1 C13 342 0 Z
+bit 342 C 1 *
+bit 341 O 1 *
+bit 340 I 1 C14
+bit 339 O 1 C14 338 0 Z
+bit 338 C 1 *
+bit 337 O 1 *
+bit 336 O 1 *
+bit 335 O 1 *
+bit 334 O 1 *
+bit 333 O 1 *
+bit 332 I 1 B0
+bit 331 O 1 B0 330 0 Z
+bit 330 C 1 *
+bit 329 O 1 *
+bit 328 I 1 B1
+bit 327 O 1 B1 326 0 Z
+bit 326 C 1 *
+bit 325 O 1 *
+bit 324 I 1 B2
+bit 323 O 1 B2 322 0 Z
+bit 322 C 1 *
+bit 321 O 1 *
+bit 320 I 1 B3
+bit 319 O 1 B3 318 0 Z
+bit 318 C 1 *
+bit 317 O 1 *
+bit 316 I 1 B4
+bit 315 O 1 B4 314 0 Z
+bit 314 C 1 *
+bit 313 O 1 *
+bit 312 I 1 B5
+bit 311 O 1 B5 310 0 Z
+bit 310 C 1 *
+bit 309 O 1 *
+bit 308 I 1 B6
+bit 307 O 1 B6 306 0 Z
+bit 306 C 1 *
+bit 305 O 1 *
+bit 304 O 1 *
+bit 303 O 1 *
+bit 302 O 1 *
+bit 301 I 1 B10
+bit 300 O 1 B10 299 0 Z
+bit 299 C 1 *
+bit 298 O 1 *
+bit 297 I 1 B11
+bit 296 O 1 B11 295 0 Z
+bit 295 C 1 *
+bit 294 O 1 *
+bit 293 I 1 B12
+bit 292 O 1 B12 291 0 Z
+bit 291 C 1 *
+bit 290 O 1 *
+bit 289 O 1 *
+bit 288 O 1 *
+bit 287 O 1 *
+bit 286 O 1 *
+bit 285 O 1 *
+bit 284 O 1 *
+bit 283 O 1 *
+bit 282 O 1 *
+bit 281 O 1 *
+bit 280 O 1 *
+bit 279 O 1 *
+bit 278 O 1 *
+bit 277 O 1 *
+bit 276 O 1 *
+bit 275 O 1 *
+bit 274 O 1 *
+bit 273 I 1 D1
+bit 272 O 1 D1 271 0 Z
+bit 271 C 1 *
+bit 270 O 1 *
+bit 269 I 1 D2
+bit 268 O 1 D2 267 0 Z
+bit 267 C 1 *
+bit 266 O 1 *
+bit 265 I 1 D3
+bit 264 O 1 D3 263 0 Z
+bit 263 C 1 *
+bit 262 O 1 *
+bit 261 I 1 D4
+bit 260 O 1 D4 259 0 Z
+bit 259 C 1 *
+bit 258 O 1 *
+bit 257 I 1 D5
+bit 256 O 1 D5 255 0 Z
+bit 255 C 1 *
+bit 254 O 1 *
+bit 253 I 1 D6
+bit 252 O 1 D6 251 0 Z
+bit 251 C 1 *
+bit 250 O 1 *
+bit 249 O 1 *
+bit 248 O 1 *
+bit 247 O 1 *
+bit 246 I 1 D10
+bit 245 O 1 D10 244 0 Z
+bit 244 C 1 *
+bit 243 O 1 *
+bit 242 I 1 D11
+bit 241 O 1 D11 240 0 Z
+bit 240 C 1 *
+bit 239 O 1 *
+bit 238 I 1 D12
+bit 237 O 1 D12 236 0 Z
+bit 236 C 1 *
+bit 235 O 1 *
+bit 234 I 1 D13
+bit 233 O 1 D13 232 0 Z
+bit 232 C 1 *
+bit 231 O 1 *
+bit 230 O 1 *
+bit 229 O 1 *
+bit 228 O 1 *
+bit 227 O 1 *
+bit 226 O 1 *
+bit 225 O 1 *
+bit 224 O 1 *
+bit 223 O 1 *
+bit 222 I 1 E0
+bit 221 O 1 E0 220 0 Z
+bit 220 C 1 *
+bit 219 O 1 *
+bit 218 I 1 E1
+bit 217 O 1 E1 216 0 Z
+bit 216 C 1 *
+bit 215 O 1 *
+bit 214 I 1 E2
+bit 213 O 1 E2 212 0 Z
+bit 212 C 1 *
+bit 211 O 1 *
+bit 210 I 1 E3
+bit 209 O 1 E3 208 0 Z
+bit 208 C 1 *
+bit 207 O 1 *
+bit 206 I 1 E4
+bit 205 O 1 E4 204 0 Z
+bit 204 C 1 *
+bit 203 O 1 *
+bit 202 I 1 E5
+bit 201 O 1 E5 200 0 Z
+bit 200 C 1 *
+bit 199 O 1 *
+bit 198 I 1 E6
+bit 197 O 1 E6 196 0 Z
+bit 196 C 1 *
+bit 195 O 1 *
+bit 194 O 1 *
+bit 193 O 1 *
+bit 192 O 1 *
+bit 191 O 1 *
+bit 190 O 1 *
+bit 189 O 1 *
+bit 188 O 1 *
+bit 187 O 1 *
+bit 186 O 1 *
+bit 185 O 1 *
+bit 184 O 1 *
+bit 183 I 1 E12
+bit 182 O 1 E12 181 0 Z
+bit 181 C 1 *
+bit 180 O 1 *
+bit 179 I 1 E13
+bit 178 O 1 E13 177 0 Z
+bit 177 C 1 *
+bit 176 O 1 *
+bit 175 I 1 E14
+bit 174 O 1 E14 173 0 Z
+bit 173 C 1 *
+bit 172 O 1 *
+bit 171 O 1 *
+bit 170 O 1 *
+bit 169 O 1 *
+bit 168 O 1 *
+bit 167 O 1 *
+bit 166 O 1 *
+bit 165 O 1 *
+bit 164 O 1 *
+bit 163 I 1 G1
+bit 162 O 1 G1 161 0 Z
+bit 161 C 1 *
+bit 160 O 1 *
+bit 159 I 1 G2
+bit 158 O 1 G2 157 0 Z
+bit 157 C 1 *
+bit 156 O 1 *
+bit 155 I 1 G3
+bit 154 O 1 G3 153 0 Z
+bit 153 C 1 *
+bit 152 O 1 *
+bit 151 I 1 G4
+bit 150 O 1 G4 149 0 Z
+bit 149 C 1 *
+bit 148 O 1 *
+bit 147 I 1 G5
+bit 146 O 1 G5 145 0 Z
+bit 145 C 1 *
+bit 144 O 1 *
+bit 143 I 1 G6
+bit 142 O 1 G6 141 0 Z
+bit 141 C 1 *
+bit 140 O 1 *
+bit 139 O 1 *
+bit 138 O 1 *
+bit 137 O 1 *
+bit 136 I 1 G10
+bit 135 O 1 G10 134 0 Z
+bit 134 C 1 *
+bit 133 O 1 *
+bit 132 I 1 G11
+bit 131 O 1 G11 130 0 Z
+bit 130 C 1 *
+bit 129 O 1 *
+bit 128 I 1 G12
+bit 127 O 1 G12 126 0 Z
+bit 126 C 1 *
+bit 125 O 1 *
+bit 124 I 1 G13
+bit 123 O 1 G13 122 0 Z
+bit 122 C 1 *
+bit 121 O 1 *
+bit 120 O 1 *
+bit 119 O 1 *
+bit 118 O 1 *
+bit 117 O 1 *
+bit 116 O 1 *
+bit 115 O 1 *
+bit 114 O 1 *
+bit 113 O 1 *
+bit 112 O 1 *
+bit 111 O 1 *
+bit 110 O 1 *
+bit 109 O 1 *
+bit 108 O 1 *
+bit 107 O 1 *
+bit 106 O 1 *
+bit 105 O 1 *
+bit 104 I 1 F2
+bit 103 O 1 F2 102 0 Z
+bit 102 C 1 *
+bit 101 O 1 *
+bit 100 I 1 F3
+bit 99 O 1 F3 98 0 Z
+bit 98 C 1 *
+bit 97 O 1 *
+bit 96 I 1 F4
+bit 95 O 1 F4 94 0 Z
+bit 94 C 1 *
+bit 93 O 1 *
+bit 92 I 1 F5
+bit 91 O 1 F5 90 0 Z
+bit 90 C 1 *
+bit 89 O 1 *
+bit 88 I 1 F6
+bit 87 O 1 F6 86 0 Z
+bit 86 C 1 *
+bit 85 O 1 *
+bit 84 O 1 *
+bit 83 O 1 *
+bit 82 O 1 *
+bit 81 I 1 F10
+bit 80 O 1 F10 79 0 Z
+bit 79 C 1 *
+bit 78 O 1 *
+bit 77 O 1 *
+bit 76 O 1 *
+bit 75 O 1 *
+bit 74 O 1 *
+bit 73 O 1 *
+bit 72 O 1 *
+bit 71 O 1 *
+bit 70 O 1 *
+bit 69 I 1 F13
+bit 68 O 1 F13 67 0 Z
+bit 67 C 1 *
+bit 66 O 1 *
+bit 65 I 1 F14
+bit 64 O 1 F14 63 0 Z
+bit 63 C 1 *
+bit 62 O 1 *
+bit 61 I 1 F15
+bit 60 O 1 F15 59 0 Z
+bit 59 C 1 *
+bit 58 O 1 *
+bit 57 O 1 *
+bit 56 O 1 *
+bit 55 O 1 *
+bit 54 O 1 *
+bit 53 O 1 *
+bit 52 O 1 *
+bit 51 O 1 *
+bit 50 O 1 *
+bit 49 I 1 H2
+bit 48 O 1 H2 47 0 Z
+bit 47 C 1 *
+bit 46 O 1 *
+bit 45 I 1 H3
+bit 44 O 1 H3 43 0 Z
+bit 43 C 1 *
+bit 42 O 1 *
+bit 41 O 1 *
+bit 40 O 1 *
+bit 39 O 1 *
+bit 38 O 1 *
+bit 37 I 1 H5
+bit 36 O 1 H5 35 0 Z
+bit 35 C 1 *
+bit 34 O 1 *
+bit 33 I 1 H6
+bit 32 O 1 H6 31 0 Z
+bit 31 C 1 *
+bit 30 O 1 *
+bit 29 O 1 *
+bit 28 O 1 *
+bit 27 O 1 *
+bit 26 I 1 H10
+bit 25 O 1 H10 24 0 Z
+bit 24 C 1 *
+bit 23 O 1 *
+bit 22 I 1 H11
+bit 21 O 1 H11 20 0 Z
+bit 20 C 1 *
+bit 19 O 1 *
+bit 18 I 1 H12
+bit 17 O 1 H12 16 0 Z
+bit 16 C 1 *
+bit 15 O 1 *
+bit 14 I 1 H13
+bit 13 O 1 H13 12 0 Z
+bit 12 C 1 *
+bit 11 O 1 *
+bit 10 I 1 H14
+bit 9 O 1 H14 8 0 Z
+bit 8 C 1 *
+bit 7 O 1 *
+bit 6 O 1 *
+bit 5 O 1 *
+bit 4 O 1 *
+bit 3 I 1 IN0_CLK0
+bit 2 I 1 IN1_CLK1
+bit 1 I 1 IN2_CLK2
+bit 0 I 1 IN3_CLK3
--- /dev/null
+#
+# $Id$
+#
+# Copyright (C) 2003 Jachym Holecek <freza@psi.cz>
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+
+# bits 31-28 of the Device Identification Register
+0000 xcr3256xl-ft256 0
--- /dev/null
+#
+# $Id$
+#
+# Copyright (C) 2003 Jachym Holecek <freza@psi.cz>
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+
+signal tdi
+signal tck
+signal tms
+signal tdo
+signal CLK0
+signal CLK1
+signal CLK2
+signal CLK3
+signal IO_0
+signal IO_1
+signal IO_2
+signal IO_3
+signal IO_4
+signal IO_5
+signal IO_6
+signal IO_7
+signal IO_8
+signal IO_9
+signal IO_10
+signal IO_11
+signal IO_12
+signal IO_13
+signal IO_14
+signal IO_15
+signal IO_16
+signal IO_17
+signal IO_18
+signal IO_19
+signal IO_20
+signal IO_21
+signal IO_22
+signal IO_23
+signal IO_24
+signal IO_25
+signal IO_26
+signal IO_27
+signal IO_28
+signal IO_29
+signal IO_30
+signal IO_31
+signal IO_32
+signal IO_33
+signal IO_34
+signal IO_35
+signal IO_36
+signal IO_38
+signal IO_39
+signal IO_40
+signal IO_41
+signal IO_43
+signal IO_44
+signal IO_45
+signal IO_46
+signal IO_47
+signal IO_48
+signal IO_49
+signal IO_50
+signal IO_51
+signal IO_52
+signal IO_53
+signal IO_54
+signal IO_55
+signal IO_56
+signal IO_57
+signal IO_58
+signal IO_59
+signal IO_60
+signal IO_61
+signal IO_62
+signal IO_63
+signal IO_64
+signal IO_65
+signal IO_66
+signal IO_67
+signal IO_68
+signal IO_69
+signal IO_70
+signal IO_71
+signal IO_72
+signal IO_73
+signal IO_74
+signal IO_75
+signal IO_76
+signal IO_77
+signal IO_78
+signal IO_79
+signal IO_80
+signal IO_81
+signal IO_82
+signal IO_83
+signal IO_84
+signal IO_85
+signal IO_86
+signal IO_87
+signal IO_88
+signal IO_89
+signal IO_90
+signal IO_91
+signal IO_92
+signal IO_93
+signal IO_94
+signal IO_95
+signal IO_96
+signal IO_97
+signal IO_98
+signal IO_99
+signal IO_100
+signal IO_101
+signal IO_102
+signal IO_103
+signal IO_104
+signal IO_105
+signal IO_106
+signal IO_108
+signal IO_109
+signal IO_110
+signal IO_111
+signal IO_112
+signal IO_113
+signal IO_114
+signal IO_115
+signal IO_116
+signal IO_117
+signal IO_118
+signal IO_119
+signal IO_120
+signal IO_121
+signal IO_122
+signal IO_123
+signal IO_124
+signal IO_125
+signal IO_126
+signal IO_127
+signal IO_128
+signal IO_129
+signal IO_130
+signal IO_131
+signal IO_133
+signal IO_134
+signal IO_135
+signal IO_136
+signal IO_137
+signal IO_138
+signal IO_139
+signal IO_140
+signal IO_141
+signal IO_142
+signal IO_143
+signal IO_144
+signal IO_145
+signal IO_146
+signal IO_147
+signal IO_148
+signal IO_149
+signal IO_150
+signal IO_151
+signal IO_152
+signal IO_153
+signal IO_154
+signal IO_155
+signal IO_156
+signal IO_157
+signal IO_158
+
+# Boundary Scan (mandatory regs)
+register BSR 740 # Boundary Scan Register
+register BR 1 # Bypass Register
+
+# Optional data reg
+register DIR 32 # ID Code Register
+
+# In-System Programming (user defined regs)
+register ISPSR 313 # ISP Shift Register
+
+instruction length 5
+
+# Mandatory cmds
+instruction BYPASS 11111 BR
+instruction SAMPLE/PRELOAD 00010 BSR
+instruction EXTEST 00000 BSR
+
+# Optional cmds
+instruction IDCODE 00001 DIR
+instruction INTEST 00011 BSR
+instruction HIGHZ 00101 BR
+
+# Mysterious cmds
+#instruction STRTEST 00100
+#instruction CLAMP 00110 BR
+
+# User defined regs
+instruction ENABLE 01001 ISPSR
+instruction ERASE 01010 ISPSR
+instruction PROGRAM 01011 ISPSR
+instruction DISABLE 10000 ISPSR
+instruction VERIFY 01100 ISPSR
+
+# Another mysterious cmds
+#instruction ISP_EOTF 01000 ISPSR
+#instruction ISP_INIT 01101 BR
+#instruction ISP_WRITE 00111 ISPSR
+#instruction ISP_READ 01110 ISPSR
+#instruction TEST_MODE 10001 BR
+
+bit 739 O 1 *
+bit 738 I 1 IO_0
+bit 737 O 1 IO_0 736 0 Z
+bit 736 C 1 *
+bit 735 O 1 *
+bit 734 I 1 IO_1
+bit 733 O 1 IO_1 732 0 Z
+bit 732 C 1 *
+bit 731 O 1 *
+bit 730 I 1 IO_2
+bit 729 O 1 IO_2 728 0 Z
+bit 728 C 1 *
+bit 727 O 1 *
+bit 726 I 1 IO_3
+bit 725 O 1 IO_3 724 0 Z
+bit 724 C 1 *
+bit 723 O 1 *
+bit 722 I 1 IO_4
+bit 721 O 1 IO_4 720 0 Z
+bit 720 C 1 *
+bit 719 O 1 *
+bit 718 O 1 *
+bit 717 O 1 *
+bit 716 O 1 *
+bit 715 O 1 *
+bit 714 O 1 *
+bit 713 O 1 *
+bit 712 I 1 IO_5
+bit 711 O 1 IO_5 710 0 Z
+bit 710 C 1 *
+bit 709 O 1 *
+bit 708 I 1 IO_6
+bit 707 O 1 IO_6 706 0 Z
+bit 706 C 1 *
+bit 705 O 1 *
+bit 704 I 1 IO_7
+bit 703 O 1 IO_7 702 0 Z
+bit 702 C 1 *
+bit 701 O 1 *
+bit 700 I 1 IO_8
+bit 699 O 1 IO_8 698 0 Z
+bit 698 C 1 *
+bit 697 O 1 *
+bit 696 I 1 IO_9
+bit 695 O 1 IO_9 694 0 Z
+bit 694 C 1 *
+bit 693 O 1 *
+bit 692 I 1 IO_10
+bit 691 O 1 IO_10 690 0 Z
+bit 690 C 1 *
+bit 689 O 1 *
+bit 688 I 1 IO_11
+bit 687 O 1 IO_11 686 0 Z
+bit 686 C 1 *
+bit 685 O 1 *
+bit 684 I 1 IO_12
+bit 683 O 1 IO_12 682 0 Z
+bit 682 C 1 *
+bit 681 O 1 *
+bit 680 I 1 IO_13
+bit 679 O 1 IO_13 678 0 Z
+bit 678 C 1 *
+bit 677 O 1 *
+bit 676 I 1 IO_14
+bit 675 O 1 IO_14 674 0 Z
+bit 674 C 1 *
+bit 673 O 1 *
+bit 672 O 1 *
+bit 671 O 1 *
+bit 670 O 1 *
+bit 669 O 1 *
+bit 668 O 1 *
+bit 667 O 1 *
+bit 666 I 1 IO_15
+bit 665 O 1 IO_15 664 0 Z
+bit 664 C 1 *
+bit 663 O 1 *
+bit 662 I 1 IO_16
+bit 661 O 1 IO_16 660 0 Z
+bit 660 C 1 *
+bit 659 O 1 *
+bit 658 I 1 IO_17
+bit 657 O 1 IO_17 656 0 Z
+bit 656 C 1 *
+bit 655 O 1 *
+bit 654 I 1 IO_18
+bit 653 O 1 IO_18 652 0 Z
+bit 652 C 1 *
+bit 651 O 1 *
+bit 650 I 1 IO_19
+bit 649 O 1 IO_19 648 0 Z
+bit 648 C 1 *
+bit 647 O 1 *
+bit 646 I 1 IO_20
+bit 645 O 1 IO_20 644 0 Z
+bit 644 C 1 *
+bit 643 O 1 *
+bit 642 I 1 IO_21
+bit 641 O 1 IO_21 640 0 Z
+bit 640 C 1 *
+bit 639 O 1 *
+bit 638 I 1 IO_22
+bit 637 O 1 IO_22 636 0 Z
+bit 636 C 1 *
+bit 635 O 1 *
+bit 634 I 1 IO_23
+bit 633 O 1 IO_23 632 0 Z
+bit 632 C 1 *
+bit 631 O 1 *
+bit 630 I 1 IO_24
+bit 629 O 1 IO_24 628 0 Z
+bit 628 C 1 *
+bit 627 O 1 *
+bit 626 O 1 *
+bit 625 O 1 *
+bit 624 O 1 *
+bit 623 O 1 *
+bit 622 O 1 *
+bit 621 O 1 *
+bit 620 I 1 IO_25
+bit 619 O 1 IO_25 618 0 Z
+bit 618 C 1 *
+bit 617 O 1 *
+bit 616 I 1 IO_26
+bit 615 O 1 IO_26 614 0 Z
+bit 614 C 1 *
+bit 613 O 1 *
+bit 612 I 1 IO_27
+bit 611 O 1 IO_27 610 0 Z
+bit 610 C 1 *
+bit 609 O 1 *
+bit 608 I 1 IO_28
+bit 607 O 1 IO_28 606 0 Z
+bit 606 C 1 *
+bit 605 O 1 *
+bit 604 I 1 IO_29
+bit 603 O 1 IO_29 602 0 Z
+bit 602 C 1 *
+bit 601 O 1 *
+bit 600 I 1 IO_30
+bit 599 O 1 IO_30 598 0 Z
+bit 598 C 1 *
+bit 597 O 1 *
+bit 596 I 1 IO_31
+bit 595 O 1 IO_31 594 0 Z
+bit 594 C 1 *
+bit 593 O 1 *
+bit 592 I 1 IO_32
+bit 591 O 1 IO_32 590 0 Z
+bit 590 C 1 *
+bit 589 O 1 *
+bit 588 I 1 IO_33
+bit 587 O 1 IO_33 586 0 Z
+bit 586 C 1 *
+bit 585 O 1 *
+bit 584 I 1 IO_34
+bit 583 O 1 IO_34 582 0 Z
+bit 582 C 1 *
+bit 581 O 1 *
+bit 580 O 1 *
+bit 579 O 1 *
+bit 578 O 1 *
+bit 577 O 1 *
+bit 576 O 1 *
+bit 575 O 1 *
+bit 574 I 1 IO_35
+bit 573 O 1 IO_35 572 0 Z
+bit 572 C 1 *
+bit 571 O 1 *
+bit 570 I 1 IO_36
+bit 569 O 1 IO_36 568 0 Z
+bit 568 C 1 *
+bit 567 O 1 *
+bit 566 O 1 *
+bit 565 O 1 *
+bit 564 O 1 *
+bit 563 O 1 *
+bit 562 I 1 IO_38
+bit 561 O 1 IO_38 560 0 Z
+bit 560 C 1 *
+bit 559 O 1 *
+bit 558 I 1 IO_39
+bit 557 O 1 IO_39 556 0 Z
+bit 556 C 1 *
+bit 555 O 1 *
+bit 554 I 1 IO_40
+bit 553 O 1 IO_40 552 0 Z
+bit 552 C 1 *
+bit 551 O 1 *
+bit 550 I 1 IO_41
+bit 549 O 1 IO_41 548 0 Z
+bit 548 C 1 *
+bit 547 O 1 *
+bit 546 O 1 *
+bit 545 O 1 *
+bit 544 O 1 *
+bit 543 O 1 *
+bit 542 I 1 IO_43
+bit 541 O 1 IO_43 540 0 Z
+bit 540 C 1 *
+bit 539 O 1 *
+bit 538 I 1 IO_44
+bit 537 O 1 IO_44 536 0 Z
+bit 536 C 1 *
+bit 535 O 1 *
+bit 534 O 1 *
+bit 533 O 1 *
+bit 532 O 1 *
+bit 531 O 1 *
+bit 530 O 1 *
+bit 529 O 1 *
+bit 528 I 1 IO_45
+bit 527 O 1 IO_45 526 0 Z
+bit 526 C 1 *
+bit 525 O 1 *
+bit 524 I 1 IO_46
+bit 523 O 1 IO_46 522 0 Z
+bit 522 C 1 *
+bit 521 O 1 *
+bit 520 I 1 IO_47
+bit 519 O 1 IO_47 518 0 Z
+bit 518 C 1 *
+bit 517 O 1 *
+bit 516 I 1 IO_48
+bit 515 O 1 IO_48 514 0 Z
+bit 514 C 1 *
+bit 513 O 1 *
+bit 512 I 1 IO_49
+bit 511 O 1 IO_49 510 0 Z
+bit 510 C 1 *
+bit 509 O 1 *
+bit 508 I 1 IO_50
+bit 507 O 1 IO_50 506 0 Z
+bit 506 C 1 *
+bit 505 O 1 *
+bit 504 I 1 IO_51
+bit 503 O 1 IO_51 502 0 Z
+bit 502 C 1 *
+bit 501 O 1 *
+bit 500 I 1 IO_52
+bit 499 O 1 IO_52 498 0 Z
+bit 498 C 1 *
+bit 497 O 1 *
+bit 496 I 1 IO_53
+bit 495 O 1 IO_53 494 0 Z
+bit 494 C 1 *
+bit 493 O 1 *
+bit 492 I 1 IO_54
+bit 491 O 1 IO_54 490 0 Z
+bit 490 C 1 *
+bit 489 O 1 *
+bit 488 O 1 *
+bit 487 O 1 *
+bit 486 O 1 *
+bit 485 O 1 *
+bit 484 O 1 *
+bit 483 O 1 *
+bit 482 I 1 IO_55
+bit 481 O 1 IO_55 480 0 Z
+bit 480 C 1 *
+bit 479 O 1 *
+bit 478 I 1 IO_56
+bit 477 O 1 IO_56 476 0 Z
+bit 476 C 1 *
+bit 475 O 1 *
+bit 474 I 1 IO_57
+bit 473 O 1 IO_57 472 0 Z
+bit 472 C 1 *
+bit 471 O 1 *
+bit 470 I 1 IO_58
+bit 469 O 1 IO_58 468 0 Z
+bit 468 C 1 *
+bit 467 O 1 *
+bit 466 I 1 IO_59
+bit 465 O 1 IO_59 464 0 Z
+bit 464 C 1 *
+bit 463 O 1 *
+bit 462 I 1 IO_60
+bit 461 O 1 IO_60 460 0 Z
+bit 460 C 1 *
+bit 459 O 1 *
+bit 458 I 1 IO_61
+bit 457 O 1 IO_61 456 0 Z
+bit 456 C 1 *
+bit 455 O 1 *
+bit 454 I 1 IO_62
+bit 453 O 1 IO_62 452 0 Z
+bit 452 C 1 *
+bit 451 O 1 *
+bit 450 I 1 IO_63
+bit 449 O 1 IO_63 448 0 Z
+bit 448 C 1 *
+bit 447 O 1 *
+bit 446 I 1 IO_64
+bit 445 O 1 IO_64 444 0 Z
+bit 444 C 1 *
+bit 443 O 1 *
+bit 442 O 1 *
+bit 441 O 1 *
+bit 440 O 1 *
+bit 439 O 1 *
+bit 438 O 1 *
+bit 437 O 1 *
+bit 436 I 1 IO_65
+bit 435 O 1 IO_65 434 0 Z
+bit 434 C 1 *
+bit 433 O 1 *
+bit 432 I 1 IO_66
+bit 431 O 1 IO_66 430 0 Z
+bit 430 C 1 *
+bit 429 O 1 *
+bit 428 I 1 IO_67
+bit 427 O 1 IO_67 426 0 Z
+bit 426 C 1 *
+bit 425 O 1 *
+bit 424 I 1 IO_68
+bit 423 O 1 IO_68 422 0 Z
+bit 422 C 1 *
+bit 421 O 1 *
+bit 420 I 1 IO_69
+bit 419 O 1 IO_69 418 0 Z
+bit 418 C 1 *
+bit 417 O 1 *
+bit 416 I 1 IO_70
+bit 415 O 1 IO_70 414 0 Z
+bit 414 C 1 *
+bit 413 O 1 *
+bit 412 I 1 IO_71
+bit 411 O 1 IO_71 410 0 Z
+bit 410 C 1 *
+bit 409 O 1 *
+bit 408 I 1 IO_72
+bit 407 O 1 IO_72 406 0 Z
+bit 406 C 1 *
+bit 405 O 1 *
+bit 404 I 1 IO_73
+bit 403 O 1 IO_73 402 0 Z
+bit 402 C 1 *
+bit 401 O 1 *
+bit 400 I 1 IO_74
+bit 399 O 1 IO_74 398 0 Z
+bit 398 C 1 *
+bit 397 O 1 *
+bit 396 O 1 *
+bit 395 O 1 *
+bit 394 O 1 *
+bit 393 O 1 *
+bit 392 O 1 *
+bit 391 O 1 *
+bit 390 I 1 IO_75
+bit 389 O 1 IO_75 388 0 Z
+bit 388 C 1 *
+bit 387 O 1 *
+bit 386 I 1 IO_76
+bit 385 O 1 IO_76 384 0 Z
+bit 384 C 1 *
+bit 383 O 1 *
+bit 382 I 1 IO_77
+bit 381 O 1 IO_77 380 0 Z
+bit 380 C 1 *
+bit 379 O 1 *
+bit 378 I 1 IO_78
+bit 377 O 1 IO_78 376 0 Z
+bit 376 C 1 *
+bit 375 O 1 *
+bit 374 I 1 IO_79
+bit 373 O 1 IO_79 372 0 Z
+bit 372 C 1 *
+bit 371 O 1 *
+bit 370 I 1 IO_80
+bit 369 O 1 IO_80 368 0 Z
+bit 368 C 1 *
+bit 367 O 1 *
+bit 366 I 1 IO_81
+bit 365 O 1 IO_81 364 0 Z
+bit 364 C 1 *
+bit 363 O 1 *
+bit 362 I 1 IO_82
+bit 361 O 1 IO_82 360 0 Z
+bit 360 C 1 *
+bit 359 O 1 *
+bit 358 I 1 IO_83
+bit 357 O 1 IO_83 356 0 Z
+bit 356 C 1 *
+bit 355 O 1 *
+bit 354 I 1 IO_84
+bit 353 O 1 IO_84 352 0 Z
+bit 352 C 1 *
+bit 351 O 1 *
+bit 350 O 1 *
+bit 349 O 1 *
+bit 348 O 1 *
+bit 347 O 1 *
+bit 346 O 1 *
+bit 345 O 1 *
+bit 344 I 1 IO_85
+bit 343 O 1 IO_85 342 0 Z
+bit 342 C 1 *
+bit 341 O 1 *
+bit 340 I 1 IO_86
+bit 339 O 1 IO_86 338 0 Z
+bit 338 C 1 *
+bit 337 O 1 *
+bit 336 I 1 IO_87
+bit 335 O 1 IO_87 334 0 Z
+bit 334 C 1 *
+bit 333 O 1 *
+bit 332 I 1 IO_88
+bit 331 O 1 IO_88 330 0 Z
+bit 330 C 1 *
+bit 329 O 1 *
+bit 328 I 1 IO_89
+bit 327 O 1 IO_89 326 0 Z
+bit 326 C 1 *
+bit 325 O 1 *
+bit 324 I 1 IO_90
+bit 323 O 1 IO_90 322 0 Z
+bit 322 C 1 *
+bit 321 O 1 *
+bit 320 I 1 IO_91
+bit 319 O 1 IO_91 318 0 Z
+bit 318 C 1 *
+bit 317 O 1 *
+bit 316 I 1 IO_92
+bit 315 O 1 IO_92 314 0 Z
+bit 314 C 1 *
+bit 313 O 1 *
+bit 312 I 1 IO_93
+bit 311 O 1 IO_93 310 0 Z
+bit 310 C 1 *
+bit 309 O 1 *
+bit 308 I 1 IO_94
+bit 307 O 1 IO_94 306 0 Z
+bit 306 C 1 *
+bit 305 O 1 *
+bit 304 O 1 *
+bit 303 O 1 *
+bit 302 O 1 *
+bit 301 O 1 *
+bit 300 O 1 *
+bit 299 O 1 *
+bit 298 I 1 IO_95
+bit 297 O 1 IO_95 296 0 Z
+bit 296 C 1 *
+bit 295 O 1 *
+bit 294 I 1 IO_96
+bit 293 O 1 IO_96 292 0 Z
+bit 292 C 1 *
+bit 291 O 1 *
+bit 290 I 1 IO_97
+bit 289 O 1 IO_97 288 0 Z
+bit 288 C 1 *
+bit 287 O 1 *
+bit 286 I 1 IO_98
+bit 285 O 1 IO_98 284 0 Z
+bit 284 C 1 *
+bit 283 O 1 *
+bit 282 I 1 IO_99
+bit 281 O 1 IO_99 280 0 Z
+bit 280 C 1 *
+bit 279 O 1 *
+bit 278 I 1 IO_100
+bit 277 O 1 IO_100 276 0 Z
+bit 276 C 1 *
+bit 275 O 1 *
+bit 274 I 1 IO_101
+bit 273 O 1 IO_101 272 0 Z
+bit 272 C 1 *
+bit 271 O 1 *
+bit 270 I 1 IO_102
+bit 269 O 1 IO_102 268 0 Z
+bit 268 C 1 *
+bit 267 O 1 *
+bit 266 I 1 IO_103
+bit 265 O 1 IO_103 264 0 Z
+bit 264 C 1 *
+bit 263 O 1 *
+bit 262 I 1 IO_104
+bit 261 O 1 IO_104 260 0 Z
+bit 260 C 1 *
+bit 259 O 1 *
+bit 258 O 1 *
+bit 257 O 1 *
+bit 256 O 1 *
+bit 255 O 1 *
+bit 254 O 1 *
+bit 253 O 1 *
+bit 252 I 1 IO_105
+bit 251 O 1 IO_105 250 0 Z
+bit 250 C 1 *
+bit 249 O 1 *
+bit 248 I 1 IO_106
+bit 247 O 1 IO_106 246 0 Z
+bit 246 C 1 *
+bit 245 O 1 *
+bit 244 O 1 *
+bit 243 O 1 *
+bit 242 O 1 *
+bit 241 O 1 *
+bit 240 I 1 IO_108
+bit 239 O 1 IO_108 238 0 Z
+bit 238 C 1 *
+bit 237 O 1 *
+bit 236 I 1 IO_109
+bit 235 O 1 IO_109 234 0 Z
+bit 234 C 1 *
+bit 233 O 1 *
+bit 232 I 1 IO_110
+bit 231 O 1 IO_110 230 0 Z
+bit 230 C 1 *
+bit 229 O 1 *
+bit 228 I 1 IO_111
+bit 227 O 1 IO_111 226 0 Z
+bit 226 C 1 *
+bit 225 O 1 *
+bit 224 I 1 IO_112
+bit 223 O 1 IO_112 222 0 Z
+bit 222 C 1 *
+bit 221 O 1 *
+bit 220 I 1 IO_113
+bit 219 O 1 IO_113 218 0 Z
+bit 218 C 1 *
+bit 217 O 1 *
+bit 216 I 1 IO_114
+bit 215 O 1 IO_114 214 0 Z
+bit 214 C 1 *
+bit 213 O 1 *
+bit 212 O 1 *
+bit 211 O 1 *
+bit 210 O 1 *
+bit 209 O 1 *
+bit 208 O 1 *
+bit 207 O 1 *
+bit 206 I 1 IO_115
+bit 205 O 1 IO_115 204 0 Z
+bit 204 C 1 *
+bit 203 O 1 *
+bit 202 I 1 IO_116
+bit 201 O 1 IO_116 200 0 Z
+bit 200 C 1 *
+bit 199 O 1 *
+bit 198 I 1 IO_117
+bit 197 O 1 IO_117 196 0 Z
+bit 196 C 1 *
+bit 195 O 1 *
+bit 194 I 1 IO_118
+bit 193 O 1 IO_118 192 0 Z
+bit 192 C 1 *
+bit 191 O 1 *
+bit 190 I 1 IO_119
+bit 189 O 1 IO_119 188 0 Z
+bit 188 C 1 *
+bit 187 O 1 *
+bit 186 I 1 IO_120
+bit 185 O 1 IO_120 184 0 Z
+bit 184 C 1 *
+bit 183 O 1 *
+bit 182 I 1 IO_121
+bit 181 O 1 IO_121 180 0 Z
+bit 180 C 1 *
+bit 179 O 1 *
+bit 178 I 1 IO_122
+bit 177 O 1 IO_122 176 0 Z
+bit 176 C 1 *
+bit 175 O 1 *
+bit 174 I 1 IO_123
+bit 173 O 1 IO_123 172 0 Z
+bit 172 C 1 *
+bit 171 O 1 *
+bit 170 I 1 IO_124
+bit 169 O 1 IO_124 168 0 Z
+bit 168 C 1 *
+bit 167 O 1 *
+bit 166 O 1 *
+bit 165 O 1 *
+bit 164 O 1 *
+bit 163 O 1 *
+bit 162 O 1 *
+bit 161 O 1 *
+bit 160 I 1 IO_125
+bit 159 O 1 IO_125 158 0 Z
+bit 158 C 1 *
+bit 157 O 1 *
+bit 156 I 1 IO_126
+bit 155 O 1 IO_126 154 0 Z
+bit 154 C 1 *
+bit 153 O 1 *
+bit 152 I 1 IO_127
+bit 151 O 1 IO_127 150 0 Z
+bit 150 C 1 *
+bit 149 O 1 *
+bit 148 I 1 IO_128
+bit 147 O 1 IO_128 146 0 Z
+bit 146 C 1 *
+bit 145 O 1 *
+bit 144 I 1 IO_129
+bit 143 O 1 IO_129 142 0 Z
+bit 142 C 1 *
+bit 141 O 1 *
+bit 140 I 1 IO_130
+bit 139 O 1 IO_130 138 0 Z
+bit 138 C 1 *
+bit 137 O 1 *
+bit 136 I 1 IO_131
+bit 135 O 1 IO_131 134 0 Z
+bit 134 C 1 *
+bit 133 O 1 *
+bit 132 O 1 *
+bit 131 O 1 *
+bit 130 O 1 *
+bit 129 O 1 *
+bit 128 I 1 IO_133
+bit 127 O 1 IO_133 126 0 Z
+bit 126 C 1 *
+bit 125 O 1 *
+bit 124 I 1 IO_134
+bit 123 O 1 IO_134 122 0 Z
+bit 122 C 1 *
+bit 121 O 1 *
+bit 120 O 1 *
+bit 119 O 1 *
+bit 118 O 1 *
+bit 117 O 1 *
+bit 116 O 1 *
+bit 115 O 1 *
+bit 114 I 1 IO_135
+bit 113 O 1 IO_135 112 0 Z
+bit 112 C 1 *
+bit 111 O 1 *
+bit 110 I 1 IO_136
+bit 109 O 1 IO_136 108 0 Z
+bit 108 C 1 *
+bit 107 O 1 *
+bit 106 I 1 IO_137
+bit 105 O 1 IO_137 104 0 Z
+bit 104 C 1 *
+bit 103 O 1 *
+bit 102 I 1 IO_138
+bit 101 O 1 IO_138 100 0 Z
+bit 100 C 1 *
+bit 99 O 1 *
+bit 98 I 1 IO_139
+bit 97 O 1 IO_139 96 0 Z
+bit 96 C 1 *
+bit 95 O 1 *
+bit 94 I 1 IO_140
+bit 93 O 1 IO_140 92 0 Z
+bit 92 C 1 *
+bit 91 O 1 *
+bit 90 I 1 IO_141
+bit 89 O 1 IO_141 88 0 Z
+bit 88 C 1 *
+bit 87 O 1 *
+bit 86 I 1 IO_142
+bit 85 O 1 IO_142 84 0 Z
+bit 84 C 1 *
+bit 83 O 1 *
+bit 82 I 1 IO_143
+bit 81 O 1 IO_143 80 0 Z
+bit 80 C 1 *
+bit 79 O 1 *
+bit 78 I 1 IO_144
+bit 77 O 1 IO_144 76 0 Z
+bit 76 C 1 *
+bit 75 O 1 *
+bit 74 O 1 *
+bit 73 O 1 *
+bit 72 O 1 *
+bit 71 O 1 *
+bit 70 O 1 *
+bit 69 O 1 *
+bit 68 I 1 IO_145
+bit 67 O 1 IO_145 66 0 Z
+bit 66 C 1 *
+bit 65 O 1 *
+bit 64 I 1 IO_146
+bit 63 O 1 IO_146 62 0 Z
+bit 62 C 1 *
+bit 61 O 1 *
+bit 60 I 1 IO_147
+bit 59 O 1 IO_147 58 0 Z
+bit 58 C 1 *
+bit 57 O 1 *
+bit 56 I 1 IO_148
+bit 55 O 1 IO_148 54 0 Z
+bit 54 C 1 *
+bit 53 O 1 *
+bit 52 I 1 IO_149
+bit 51 O 1 IO_149 50 0 Z
+bit 50 C 1 *
+bit 49 O 1 *
+bit 48 I 1 IO_150
+bit 47 O 1 IO_150 46 0 Z
+bit 46 C 1 *
+bit 45 O 1 *
+bit 44 I 1 IO_151
+bit 43 O 1 IO_151 42 0 Z
+bit 42 C 1 *
+bit 41 O 1 *
+bit 40 I 1 IO_152
+bit 39 O 1 IO_152 38 0 Z
+bit 38 C 1 *
+bit 37 O 1 *
+bit 36 I 1 IO_153
+bit 35 O 1 IO_153 34 0 Z
+bit 34 C 1 *
+bit 33 O 1 *
+bit 32 I 1 IO_154
+bit 31 O 1 IO_154 30 0 Z
+bit 30 C 1 *
+bit 29 O 1 *
+bit 28 O 1 *
+bit 27 O 1 *
+bit 26 O 1 *
+bit 25 O 1 *
+bit 24 O 1 *
+bit 23 O 1 *
+bit 22 I 1 IO_155
+bit 21 O 1 IO_155 20 0 Z
+bit 20 C 1 *
+bit 19 O 1 *
+bit 18 I 1 IO_156
+bit 17 O 1 IO_156 16 0 Z
+bit 16 C 1 *
+bit 15 O 1 *
+bit 14 I 1 IO_157
+bit 13 O 1 IO_157 12 0 Z
+bit 12 C 1 *
+bit 11 O 1 *
+bit 10 I 1 IO_158
+bit 9 O 1 IO_158 8 0 Z
+bit 8 C 1 *
+bit 7 O 1 *
+bit 6 I 1 IO_159
+bit 5 O 1 IO_159 4 0 Z
+bit 4 C 1 *
+bit 3 I 1 CLK0
+bit 2 I 1 CLK1
+bit 1 I 1 CLK2
+bit 0 I 1 CLK3
--- /dev/null
+Makefile
+Makefile.in
--- /dev/null
+2008-01-18 Arnim Laeuger <arniml@users.sourceforge.net>
+
+ * UrJTAG.txt (packages): Some notes about Flex & BSDL
+
+2007-12-30 Arnim Laeuger <arniml@users.sourceforge.net>
+
+ * UrJTAG.txt (Example): Added contents from README.svf, new section on BSDL
+
+2007-12-15 Kolja Waschk <kawk>
+
+ * fdl.txt, gpl.txt: licenses as plain text files
+ * lgpl.txt: Lesser GPL not in use (yet), removed
+ * jtag.1, bsdl2jtag.1: manpages copied (with permission) from
+ Debian openwince jtag package, then updated for UrJTAG.
+ * Makefile.am: add new files
+
+2007-12-10 Arnim Laeuger <arniml@users.sourceforge.net>
+
+ * UrJTAG.txt: Balancing of tags.
+
+2007-12-07 Kolja Waschk <kawk>
+
+ * UrJTAG.txt: New software manual, using asciidoc formatting
+ * internals.xml: merged into UrJTAG.txt.
+
+2003-09-15 Marcel Telka <marcel@telka.sk>
+
+ * internals.xml: Fixed spelling (patch 805108, Andreas Mohr).
+
+2003-03-19 Marcel Telka <marcel@telka.sk>
+
+ * Makefile.am: New file.
+
+2003-03-06 Marcel Telka <marcel@telka.sk>
+
+ * internals.xml: Internals documentation started.
+
--- /dev/null
+#
+# $Id$
+#
+# Copyright (C) 2003 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Marcel Telka <marcel@telka.sk>, 2003.
+#
+
+include $(top_srcdir)/Makefile.rules
+
+man_MANS = jtag.1 bsdl2jtag.1
+
+EXTRA_DIST = \
+ gpl.txt \
+ fdl.txt \
+ UrJTAG.txt \
+ README.ejtag \
+ howto_add_support_for_more_flash.txt \
+ $(man_MANS)
+
--- /dev/null
+This diff files add:\r
+1) EJTAG support. It supply ability to flash almost ALL EJTAG-capable boards (ARM, MIPS).\r
+It is not needed to search BSDL sescriptors. it uses STANDARD path to access flash.\r
+For new CPU it is needed just add data files wich can be authomatically\r
+generated, but jtag-tools originally used this files and auto generation for EJTAG-capable\r
+CPUs is not wroted. Anybody can wrote this code.\r
+\r
+EJTAG driver written by Marek Marek Michalkiewicz <marekm@amelek.gda.pl>, 2005\r
+under GPL http://www.amelek.gda.pl/rtl8181/jtag/\r
+\r
+2) data files for very different EJTAG capable MIPS CPUs in file data-add.diff\r
+Realtek RTL8181, RTL8186, Admtek ADM5120, Atheros AR2312, TI AR7, Brecis (PMC-Sierra) MSP2006.\r
+anybody can create files for nes CPUs using this files as template.\r
+Truly say, it is needed to change just\r
+"instruction length" and "endian" strings.\r
+Instruction length can be given by "detect" command:\r
+jtag> detect\r
+IR length: 5\r
+Chain length: 1\r
+Device Id: 0001-0000001000000010-00101110000-1\r
+ ^^^^ ^^^^^^^^^^^^^^^^ ^^^^^^^^^^^\r
+--->>>> step-PARTS -MANUFACTURER\r
+\r
+3) address-support.diff contains support for non-zero flash address.\r
+Different CPUs use different flash addresses.\r
+\r
+Example: TI AR7 (famouse ADSL modems) uses 0x30000000\r
+another MIPS CPUs uses 0x3fc00000 (standard for MIPS32 boards).\r
+0x1------- is for 8bit access to flash (example: 0x1fc00000)\r
+0x3------- is for 16-bit access to flash (example: 0x3fc00000)\r
+0x5------- is for 32-bit access to flash (example: 0x5fc00000)\r
+length depends on flash. It is possible to try any from this address regions.\r
+Many CPUs map flash to all of this addresses.\r
+\r
+So, for EJTAG non-zero flash address support IS NEEDED. Unfortunetly, ejtag-tools\r
+not maintained by owner and this patch is not implemented more than 2 years.\r
+But, i think, it is not needed to create new sourceforge project.\r
+\r
+For success flashing it is needed to take into attention:\r
+in file /libbrux/flash/amd.c there are strings:\r
+ o = 1; /* Heuristic */\r
+Flash can be connected to board using switch in address. In some cases it is needed\r
+to add 1 to this digit. For example, MSP2006 boards uses amd_flash_autodetect8 \r
+with o = 1. And AR7 uses o = 0.\r
+\r
+4) example of successful flashing using EJTAG: http://forum.openwrt.org/viewtopic.php?id=4191\r
+\r
+Patch do not conflicts with another patches.\r
+it \r
+1)adds /src/bus/ejtag.c file\r
+2) register this file in /src/bus/buses.c buses.h makefile.am\r
+3) removes one check from /src/tap/parport/ppdev.c\r
+4) change in flash.c is not needed, but can speedup flashing. It just exclude "printf" from cycle.\r
+5) comment two strings in libbrux/flash/detectflash.c\r
+it is not needed\r
+6) add non-zero flash address support to libbrux/flash/jedec.c and amd.c\r
+i wonder why this is not added to CVS tree. This patch was given by different peoples many times.\r
--- /dev/null
+Universal JTAG library, server and tools
+========================================
+Kolja Waschk (Ed.)
+$Id$
+
+/////////////////////////////////////////////////////////////////////////////
+This document is formatted to be readable for "asciidoc". Before you
+make any changes, please read the use guide at the asciidoc home page
+www.methods.co.nz/asciidoc and try to adapt to the style used here; e.g.
+use the single-line section header style ("== header =="). Please do not use
+any whitespace other than SPACE (ASCII 0x20) and break lines > 79 chars.
+/////////////////////////////////////////////////////////////////////////////
+
+== Copyright ==
+
+Copyright 2007, 2008 Kolja Waschk and the respective authors.
+
+Permission is granted to copy, distribute and/or modify this document under the
+terms of the GNU Free Documentation License, Version 1.2 or any later version
+published by the Free Software Foundation. A copy of the license is included in
+the section entitled "GNU Free Documentation License".
+
+//=========================================================================
+
+== General ==
+
+=== JTAG ===
+// Contributed by Ralf Engels
+
+JTAG basics can be found all over the Internet. This section should go into
+some more details about working with JTAG. What hardware do you need, what is
+the usage of JTAG, where do I get files. What file formats are available...
+
+==== Introduction ====
+
+JTAG (IEEE 1149.1) is a serial interface for testing devices with
+integrated circuits. The problem that the JTAG interface was designed to solve
+is checking if connections between ICs are OK. Therefore you can set and check
+in- and outputs of ICs. In order to save pins and logic a very simple serial
+design was invented.
+
+* One pin serial input
+* One pin serial output
+* One pin clock
+* One pin control
+
+The control pin (together with clock) allows to switch device states. A state
+machine inside each chip can be controlled, e.g. to reset the device. This
+control machine also allows to have two internal shift registers in each device
+(although we only have on in- and one output-pin). The registers are called
+instruction register (IR) and data register (DR). The current UrJTAG tool
+allows you to set the IR and set and get the DR. It doesn't allow you to
+directly control the state machine (yet).
+
+==== Interfaces ====
+
+The simplest interface that you can build is like the Xilinx parallel cable
+(also called DLC5). If your device works with a 5V or 3.3V supply voltage then
+this device can even be built just with passive parts. (picture missing here)
+UrJTAG also supports a number of other interface adapters.
+
+==== Additions ====
+
+In the meantime the JTAG specification was used as a basis for programming
+flash files and debugging processors. UrJTAG supports programming a couple of
+different flash devices. It also supports programming of non-flash devices via
+SVF files. UrJTAG does not support debugging yet. Other open source solutions
+such as OpenOCD allow you to debug ARM processors with gdb.
+
+==== BSDL and UrJTAG data files ====
+
+The BSDL file format describes the JTAG interface for one IC. It is a VHDL
+syntax with the needed information (like pin-names, register lengths and
+commands) that is usually created by the supplier. e.g. Xilinx BSDL files are
+all included in their free web-pack (using file extension ".bsd").
+
+UrJTAG uses a different file format internally. So in order to add a new device
+to UrJTAG you need to convert those files and produce a directory structure.
+Currently there are at least three tools available to do that; included with
+UrJTAG is "bsdl2jtag". Please ask on the mailing list in case of problems with
+that. Please also send proven working files back to this project.
+
+Starting with post-0.7 releases, UrJTAG contains a BSDL subsystem that
+retrieves the descriptions for chips in the chain from BSDL files on the
+fly. "bsdl2jtag" is in fact a wrapper that uses the BSDL subsystem to
+convert the BSDL file.
+
+==== SVF files ====
+
+The SVF file format contains a number of high level commands to drive the JTAG
+bus. For example you can shift the IR or DR and even check for the results.
+The Xilinx Impact and Altera QuartusII tools allow you to write this file to
+program devices.
+
+The player has been developed according to the "Serial Vector Format
+Specification", Revision E, 8 March 1999 issued by ASSET InterTech, Inc. The
+full specification can be found at
+http://www.asset-intertech.com/support/svf.pdf[].
+
+UrJTAG features an "SVF player" that can read SVF files and perform the
+described actions on the bus.
+
+SVF parser and lexer are also copyright 2002, CDS at http://www-csd.ijs.si/[].
+They have been reused from the "Experimental Boundary Scan" project at
+http://ebsp.sourceforge.net/[].
+
+==== JAM/STAPL files ====
+
+Another format for describing actions over JTAG interfaces is STAPL, actually
+standardized as JEDEC "JESD-71A". Compared to SVF, it looks more like an
+actual programming language and features looping, conditional execution, and
+more. STAPL is not yet supported by UrJTAG.
+
+//------------------------------------------------------------------------
+
+=== UrJTAG ===
+// Written by K.Waschk
+
+==== Introduction ====
+
+UrJTAG is a software package which enables working with JTAG-aware (IEEE
+1149.1) hardware devices (parts) and boards through a JTAG adapter.
+
+This package has an open and modular architecture with the ability to write
+miscellaneous extensions (like board testers, flash memory programmers, and so
+on).
+
+UrJTAG is free software, covered by the GNU General Public License,
+and you are welcome to change it and/or distribute copies of it under certain
+conditions. There is absolutely no warranty for UrJTAG. Please read
+the COPYING file for more info.
+
+WARNING: This software may damage your hardware!
+
+Feedback and contributions are welcome.
+
+==== About this document ====
+
+This documentation is far from being complete. You're encouraged to amend and
+supplement it and submit your changes in the Bugs or Enhancements tracker
+at the UrJTAG website.
+
+==== UrJTAG Website ====
+
+The most current version of this documentation and UrJTAG source code
+is always available from the project homepage at http://www.urjtag.org[].
+
+==== The name "UrJTAG" ====
+
+I (Kolja) favour short names, so I thought about adding only a few
+letters to "JTAG". The prefix "Ur" in German means "ancestral", an "Ur-Vater"
+is a forefather. UrJTAG shall become the forefather, the prototype for many
+other JTAG tools. By mere chance the "Ur" is also another name for an aurochs,
+an animal similar to the GNU...
+
+==== Authors, contributors, ... thanks ====
+
+A list of contributors is maintained in the file THANKS in the source
+distribution. Special thanks go to Marcel Telka, who actually "invented" the
+JTAG tools and wrote most of this basis of UrJTAG, and Arnim Laeuger for his
+continuous support and development of SVF and BSDL subsystem and FT2232
+drivers.
+
+==== UrJTAG and openwince JTAG Tools ====
+
+The JTAG Tools originally were developed by Marcel Telka as part of
+the openwince project. Still a large portion of the source code is his work.
+However, the last release of the JTAG tools was version 0.5.1 in 2003. After a
+few years the development completely stalled. Every few months or so on the
+project's mailing list someone asked about continuing, but a critical mass
+wasn't reached before late 2007. A fork of the JTAG tools was created under the
+wings of the UrJTAG project at Sourceforge.
+
+//------------------------------------------------------------------------
+
+=== System requirements ===
+//Copied from original README
+
+==== Supported host operating systems ====
+
+JTAG Tools should run on all Unix like operating systems including MS Windows
+with Cygwin installed. A precompiled version that runs on MS Windows without
+Cygwin is available as a Windows installer executable.
+
+==== Required software for running UrJTAG ====
+
+Required only for MS Windows, unless you use the precompiled version:
+
+ * current Cygwin net installation from http://cygwin.com[]
+ * ioperm package (a part of the standard Cygwin net installation)
+
+It may be necessary to run the command "ioperm -i" to install the IOPERM.SYS
+driver in the system.
+
+If UrJTAG was compiled to use the readline library, it has to be present on
+the system as well. It's probably a standard part of your distribution.
+
+More software is needed if you want to compile UrJTAG (which you probably want
+because currently no pre-compiled binaries are available...).
+See "Installation" below.
+
+==== Supported JTAG adapters/cables ====
+
+See 'help cable' command for up-to-date info.
+
+Parallel-port cables:
+
+ * Arcom JTAG Cable
+ * Altera ByteBlaster/ByteBlaster II/ByteBlasterMV Parallel Port Download Cable
+ * Xilinx DLC5 JTAG Parallel Cable III
+ * ETC EA253 JTAG Cable
+ * ETC EI012 JTAG Cable
+ * Ka-Ro TRITON (PXA255/250) JTAG Cable
+ * Keith & Koep JTAG Cable
+ * Lattice Parallel Port JTAG Cable
+ * Mpcbdm JTAG Cable
+ * Macraigor Wiggler JTAG Cable
+
+FT2232-based USB cables:
+
+ * Amontec JTAGkey
+ * Amontec JTAGkey-Tiny (supported as cable "JTAGkey")
+ * KrisTech UsbScarab2 ARM JTAG http://www.kristech.eu/[]
+ * Olimex ARM-USB-JTAG
+ * Olimex ARM-USB-TINY
+ * OOCDLink-s (experimental) http://www.joernonline.de/dw/doku.php?id=projects:oocdlink:2_oocdlinks[]
+ * Other FT2232-based USB JTAG cables (experimental)
+ * TinCanTools Flyswatter
+ * Turtelizer 2 (experimental) http://www.ethernut.de/en/hardware/turtelizer/[]
+ * USB to JTAG Interface (experimental)
+ * http://www.hs-augsburg.de/~hhoegl/proj/usbjtag/usbjtag.html[]
+ * Black gnICE http://docs.blackfin.uclinux.org/doku.php?id=hw:jtag:gnice[]
+ * Xverve Signalyzer Tool (experimental)
+
+Other USB cables:
+
+ * Altera USB-Blaster and compatible http://www.ixo.de/info/usb_jtag[]
+ * Segger/IAR J-Link / Atmel SAM-ICE (experimental, work in progress)
+ * Xilinx Platform USB Cable / DLC9 (slow, experimental, work in progress - don't use)
+
+Other cables:
+
+ * Technologic Systems TS-7800 SoC GPIO builtin JTAG interface
+
+==== JTAG-aware parts (chips) ====
+
+The data/ directory of the UrJTAG installation has some more, but at
+least the following are supported:
+
+ * Altera EP1C20F400
+ * Altera MAX7000 (w/ BSDL)
+ * Altera EPM7128AETC100
+ * Altera Cyclone I & II (w/ BSDL)
+ * Analog Devices Sharc-21065L
+ * Atmel ATmega128 (partial support)
+ * Atmel AT32AP7000 (partial support)
+ * Broadcom BCM1250
+ * Broadcom BCM3310 (partial support)
+ * Broadcom BCM5421S
+ * Broadcom BCM4712 (partial support)
+ * DEC SA1100
+ * Hitachi HD64465
+ * Hitachi SH7727
+ * Hitachi SH7729
+ * IBM PowerPC 440GX
+ * Intel IXP425
+ * Intel SA1110
+ * Intel PXA250/PXA255/PXA260/PXA261/PXA262/PXA263
+ * Lattice LC4032V
+ * Lattice M4A3-64/32
+ * Lattice M4A3-256/192
+ * Motorola MPC8245
+ * Samsung S3C4510B
+ * Sharp LH7A400
+ * Toshiba TX4925/TX4926
+ * Xilinx XC2C256-TQ144
+ * Xilinx XCR3032XL-VQ44
+ * Xilinx XCR3128XL-CS144
+ * Xilinx XCR3128XL-VQ100
+ * Xilinx XCR3256XL-FT256
+ * Xilinx Spartan-IIE
+ * Xilinx Spartan-3/E
+ * Xilinx Spartan-3AN
+
+==== Flash chips ====
+
+NOTE: Not all chips are supported in every possible configuration, there may
+be untested combinations of chip type, bus width, ...
+
+ * Intel 28FxxxJ3A (28F320J3A, 28F640J3A, 28F128J3A)
+ * Intel 28FxxxK3 (28F640K3, 28F128K3, 28F256K3)
+ * Intel 28FxxxK18 (28F640K18, 28F128K18, 28F256K18)
+ * AMD Am29LV64xD (Am29LV640D, Am29LV641D, Am29LV642D)
+ * AMD Am29xx040B (Am29F040B, Am29LV040B)
+
+UrJTAG uses the multi-byte write mode if supported by the particular flash
+device. The flash code will automatically switch to this algorithm if the
+Device Geometry Definition reports that more than one memory location can be
+written in a single step (refer to CFI details shown by 'detectflash'). Since
+multiple locations are written in a burst-like manner with only one polling
+sequence afterwards, the overall flashing performance increases by factor of
+5-17.
+
+In case you encounter any issues with the multi-byte write mode, run configure
+with the '--disable-flash-multi-byte' option and re-compile to disable this
+algorithm.
+
+//------------------------------------------------------------------------
+
+=== Compilation and installation ===
+
+==== Installation of precompiled UrJTAG for Windows ====
+
+By simply running UrJTAG-xxx.exe, the executable and data files will
+be installed in your Windows program folder, usually some place like
+C:\Program Files\UrJTAG. It comes ready with support for JTAG cables that are
+directly attached to a parallel port. However, if you work with Windows Vista
+and want access to the parallel port, a driver for it has to be installed
+separately. It is available from
+
+ http://www.highrez.co.uk/Downloads/InpOut32/
+
+If you want to use UrJTAG with a JTAG cable attached to the USB port,
+actual cable drivers have to be installed beside UrJTAG itself. Usually,
+the cable vendor will provide the drivers. For example, drivers for
+Altera USB-Blaster come with their Quartus software. For FTDI-based
+cables, you need an INF file describing the cable and FTDIBUS.SYS and
+FTD2XX.DLL from FTDI (CDM drivers). If your cable shows up in the device
+manager without any warning sign, UrJTAG probably is able to talk to it.
+
+Finally, UrJTAG additionally needs libusb-win32 to talk to some USB cables that
+are not based on FTDI chips (Xilinx Platform Cable USB, Segger J-Link). The
+so-called libusb-win32 filter driver is available from the project's download
+page at Sourceforge:
+
+ http://libusb-win32.sourceforge.net/#downloads
+
+==== Required software for compiling UrJTAG ====
+
+To run autogen.sh, you need autoconf and automake, bison, and a recent flex.
+
+The distributed source tarball contains source pregenerated with a current
+flex version; flex therefore is only needed if you want to compile code
+checked out from our Subversion repository. Flex 2.5.4a as it comes with
+most but the very latest Cygwin release cannot build the scanners for BSDL and
+SVF. Building these files requires Flex 2.5.33 or newer. The configure script
+will compare the available Flex version against these preconditions and enables
+or disables the related features.
+
+Furthermore, libtool should be available, and "devel" versions of the following
+packages:
+
+ * gettext
+ * readline (not needed, but really eases interactive use)
+ * ioperm (needed only for Cygwin)
+
+==== Required libraries for USB support ====
+
+For USB adapter support (including support for parallel port adapters attached
+to USB-to-parallel converters), one or more additional libraries are required.
+
+Many USB JTAG adapters and USB-to-parallel converters are based on chips
+made by FTDI. To support these, either intra.net's "libftdi" or FTDI's
+"FTD2XX" library can be used.
+
+On many modern Linux distributions, libftdi is available as a precompiled
+package and can be installed using the distribution's package management system
+(e.g. "apt-get libftdi-dev" for Debian and Ubuntu). If it isn't available or
+you don't run Linux, you can get it from
+
+ * http://www.intra2net.com/en/developer/libftdi/[]
+
+Alternatively, you can use the FTD2XX library from the chip manufacturer FTDI.
+It is available for Linux and Windows. There's more information about linking
+to that library in a Cygwin environment below.
+
+All other USB JTAG adapters can be supported only if libusb is installed.
+There is a libusb-win32 variant that can be used in a Cygwin environment:
+
+ * http://libusb.sourceforge.net[] (libusb)
+ * http://libusb-win32.sourceforge.net[] (libusb for Windows)
+
+For specific notes regarding the use of these libraries in a Cygwin
+environment, see below.
+
+==== Installing from source tar.gz ====
+
+The installation follows the standard configure, make, make install scheme:
+
+ tar xzvf urjtag-x.y.tar.gz
+ cd urjtag-x.y
+ ./configure
+ make
+ make install
+
+==== Installing from Subversion repository ====
+
+If you want to try the very newest version of UrJTAG...
+
+ svn co http://urjtag.svn.sourceforge.net/svnroot/urjtag/trunk urjtag
+
+ cd urjtag/jtag
+ ./autogen.sh
+ # ./configure done by autogen.sh; run it here with special options if needed
+ make
+ make install
+
+==== Linking to FTD2XX.DLL in Cygwin environment ====
+
+Before running configure, get the D2XX drivers from FTDI.
+
+ * http://www.ftdichip.com/Drivers/D2XX.htm[] (FTDI FTD2XX library)
+
+Unzip the archive into a directory of your choice (probably a choice
+without spaces in the name is better) and afterwards run configure with the
+"--with-ftd2xx" pointing to that directory, e.g.
+
+ ./configure --with-ftd2xx="/cygdrive/c/temp/ftdi-cdm-drivers"
+
+Configure should now report
+
+ jtag is now configured for
+ ...
+ Detected libftd2xx : yes
+
+
+==== Using LibUSB-Win32 in Cygwin environment ====
+
+Before running configure, install the LibUSB-Win32 "filter" driver from SF.
+
+ * http://libusb-win32.sourceforge.net[]
+
+Then point configure to the directory where LibUSB-Win32 was installed (it
+might give problems if the path contains spaces, as "Program Files" does!):
+
+ ./configure --with-libusb="/cygdrive/c/Programme/LibUSB-Win32/"
+
+==== Compiling with MinGW ====
+
+UrJTAG may be compiled into a Windows executable using the MinGW compiler
+(http://www.mingw.org[]), or Cygwin GCC with the "-mno-cygwin" compiler flag.
+
+This has the advantage over running in a Cygwin environment that you don't need
+to install anything else but the jtag.exe (plus libraries like FTD2XX.dll or
+InpOut32.DLL that are required for device access under Windows in any case).
+
+However, because support for MinGW is quite new in UrJTAG, it may lack some
+features (e.g. readline support) or run a little slower.
+
+Because it seems to be easier to set up a Cygwin environment, we recommend
+using the Cygwin GCC with "-mno-cygwin" flag instead of using a MinGW setup:
+
+ CFLAGS="-mno-cygwin -O2" ./configure --with-ftd2xx=/tmp/cdm-drivers --with-inpout32
+
+
+It is even possible to cross-compile and build the executable on a Linux
+host:
+
+ ./configure --host=i586-mingw32msvc --with-ftd2xx=/tmp/cdm-drivers --with-inpout32
+ make
+
+
+The "--with-inpout32" switch tells UrJTAG to use the InpOut32.DLL for access to
+parallel ports, because the Cygwin ioperm isn't available for MinGW. The InpOut32
+library is available from logix4u.net:
+
+ http://logix4u.net/Legacy_Ports/Parallel_Port/Inpout32.dll_for_Windows_98/2000/NT/XP.html
+
+An version updated to work in Windows Vista and 64 bit Windows is available from highrez:
+
+ http://www.highrez.co.uk/Downloads/InpOut32/
+
+==== Driver tailoring ====
+
+The configure script enables all default bus, cable and lowlevel drivers. You
+can include and exclude specific drivers if required. For a list of parameters
+run
+
+ ./configure --help
+
+to figure out the appropriate --enable-bus, --enable-cable, and --enable-lowlevel
+options.
+
+
+==== Building the BSDL subsystem ====
+
+As mentioned above, building the BSDL lexer requires Flex 2.5.33 or newer. If
+the detected Flex version is not recent enough, configure will disable the
+BSDL subsystem. The detection result is summarized at the end of configure:
+
+ jtag is now configured for
+ ...
+ Build BSDL subsystem : yes
+
+Flex is only required when you're working on a check-out of the Subversion
+repository. In this case Flex has to be called to transform bsdl_flex.l to
+bsdl_flex.c. When you're compiling from released sources, the local Flex
+version is not relevant since the output file of Flex is part of the
+tarball. I.e. even if the local Flex fails the check, the BSDL subsystem is
+enabled and will be compiled from the released C files.
+
+//=========================================================================
+
+== Usage ==
+
+=== Quick start ===
+// Contributed by Ralf Engels
+
+==== Run the software ====
+
+Connect your JTAG adapter between your PC and target device and turn
+on your device.
+
+To run UrJTAG type "jtag" and press Enter; jtag should start and
+display some initial information. Output should end with a line like this:
+
+ WARNING: UrJTAG may damage your hardware!
+ Type "quit" to exit, "help" for help.
+
+==== Configure the cable ====
+
+Type "help cable" for a list of supported JTAG cables.
+
+Type the "cable" command followed by the cable name and possibly further
+arguments for cable configuration. Example:
+
+ jtag> cable EA253 parallel 0x378
+ Initializing ETC EA253 JTAG Cable on parallel port at 0x378
+
+See the section about the "cable" command for details and USB support.
+
+==== Detect parts on the JTAG chain ====
+
+Type "detect" at the jtag command prompt:
+
+ jtag> detect
+
+Your output should look like this:
+
+ IR length: 5
+ Chain length: 1
+ Device Id: 01011001001001100100000000010011
+ Manufacturer: Intel
+ Part: PXA250
+ Stepping: C0
+ Filename: /usr/local/share/urjtag/intel/pxa250/pxa250c0
+
+If you get empty output or an error message your JTAG adapter is not connected
+properly, or your target board doesn't work, or it is turned off.
+
+The "detect" command is required before all other commands.
+
+==== Print current JTAG chain status ====
+
+ jtag> print chain
+ No. Manufacturer Part Stepping Instruction Register
+ ---------------------------------------------------------
+ 0 Intel PXA250 C0 BYPASS BR
+
+==== Sample device pin status ====
+
+ jtag> instruction SAMPLE/PRELOAD
+ jtag> shift ir
+ jtag> shift dr
+ jtag> dr
+ 1000110010000010000110010111111111111111111001101110...
+ jtag> print chain
+ No. Manufacturer Part Stepping Instruction Register
+ ------------------------------------------------------------
+ 0 Intel PXA250 C0 SAMPLE/PRELOAD BSR
+ jtag> get signal BOOT_SEL[0]
+ BOOT_SEL[0] = 0
+ jtag>
+
+ Note: BSR is "Boundary Scan Register"
+
+==== Burn flash connected to the part ====
+
+ jtag> flashmem 0 brux.b
+ 0x00000000
+ Note: Supported configuration is 2 x 16 bit only
+ BOOT_SEL: Asynchronous 32-bit ROM
+
+ 2 x 16 bit CFI devices detected (QRY ok)!
+
+ program:
+ block 0 unlocked
+ erasing block 0: 0
+ addr: 0x00002854
+ verify:
+ addr: 0x00002854
+ Done.
+ jtag>
+
+or:
+
+ jtag> flashmem msbin xboot.bin
+ Note: Supported configuration is 2 x 16 bit only
+ BOOT_SEL: Asynchronous 32-bit ROM
+
+ 2 x 16 bit CFI devices detected (QRY ok)!
+
+ block 0 unlocked
+ erasing block 0: 0
+ program:
+ record: start = 0x00000000, len = 0x00000004, checksum = 0x000001EB
+ record: start = 0x00000040, len = 0x00000008, checksum = 0x000001B0
+ record: start = 0x00001000, len = 0x00002B30, checksum = 0x00122CAB
+ record: start = 0x00004000, len = 0x00000160, checksum = 0x0000684B
+ record: start = 0x00005000, len = 0x00000054, checksum = 0x000008EE
+ record: start = 0x00005054, len = 0x00000030, checksum = 0x00000DA9
+ record: start = 0x00000000, len = 0x00001000, checksum = 0x00000000
+
+ verify:
+ record: start = 0x00000000, len = 0x00000004, checksum = 0x000001EB
+ record: start = 0x00000040, len = 0x00000008, checksum = 0x000001B0
+ record: start = 0x00001000, len = 0x00002B30, checksum = 0x00122CAB
+ record: start = 0x00004000, len = 0x00000160, checksum = 0x0000684B
+ record: start = 0x00005000, len = 0x00000054, checksum = 0x000008EE
+ record: start = 0x00005054, len = 0x00000030, checksum = 0x00000DA9
+ record: start = 0x00000000, len = 0x00001000, checksum = 0x00000000
+
+ Done.
+ jtag>
+
+//------------------------------------------------------------------------
+
+=== JTAG commands ===
+// Various authors...
+
+==== Overview ====
+
+Following is a list of commands currently supported by jtag and some
+example usage.
+
+*bit*:: define new BSR bit
+*bus*:: change active bus
+*bsdl*:: manage BSDL files
+*cable*:: select JTAG cable
+*detect*:: detect parts on the JTAG chain
+*detectflash*:: detect parameters of flash chips attached to a part
+*discovery*:: discovery of unknown parts in the JTAG chain
+*dr*:: display or set active data register for a part
+*endian*:: set/print endianess for reading/writing binary files
+*eraseflash*:: erase flash memory by number of blocks
+*flashmem*:: burn flash memory with data from a file
+*frequency*:: setup JTAG frequency
+*get*:: get external signal value
+*help*:: display this help
+*include*:: include command sequence from external file
+*initbus*:: initialize bus driver for active part
+*instruction*:: change active instruction for a part or declare new instruction
+*part*:: change active part for current JTAG chain
+*peek*:: read a single word
+*poke*:: write a single word
+*print*:: display JTAG chain list/status
+*quit*:: exit and terminate this session
+*readmem*:: read content of the memory and write it to file
+*register*:: define new data register for a part
+*scan*:: detect changes on input pins of current part
+*set*:: set external signal value
+*shift*:: shift data/instruction registers through JTAG chain
+*signal*:: define new signal for a part
+*svf*:: execute SVF commands from file
+*writemem*:: write content from file to memory
+
+Some tools derived from the same openwince JTAG Tools code base as UrJTAG
+know additional commands, which are not supported in UrJTAG. See the section
+about "Unsupported commands", below, about workarounds.
+
+==== Basic commands ====
+
+===== quit =====
+
+This command closes the jtag console.
+
+===== help =====
+
+Without additional parameter it gives an overview of the available commands.
+With a parameter you can get more information about any of the commands.
+Example:
+
+ jtag> help cable
+
+Most cable drivers require some more details about the cable to start properly.
+To learn about the details, use the "cable" command with the name of the cable
+followed by the word "help". Example:
+
+ jtag> cable wiggler help
+
+===== include =====
+
+Run commands from a named script file installed with UrJTAG or applies a BSDL
+file to the active part. The directory prefix is added automatically
+(e.g. /usr/share/urjtag/, depending on your installation), unless the file
+name starts with a dot or slash.
+
+For example, the following startup sequence configures the cable, chain, and
+loads definitions and bus driver for a Samsung S3C4510B CPU to peek its memory
+at 0x0:
+
+ jtag> cable wiggler ppdev /dev/parport0
+ jtag> detect
+ jtag> include samsung/s3c4510b/s3c4510b
+ jtag> peek 0x0000
+
+If the file contains valid BSDL syntax, it will be converted to native
+commands on the fly.
+
+Optionally, a number X may be specified following the file name, to cause
+an X times repetition of the command sequence from the file.
+
+==== Chain management ====
+
+===== cable =====
+
+Sets and initializes the cable driver. This is usually the first command that
+you are executing in a session. Example:
+
+ jtag> cable EA253 parallel 0x378
+ Initializing ETC EA253 JTAG Cable on parallel port at 0x378
+
+For a parallel cable using the ppdev driver you would use this:
+
+ jtag> cable DLC5 ppdev /dev/parport0
+
+If you get an error, it may be that the parallel port kernel driver
+was compiled as a module in your Linux kernel and wasn't loaded automatically.
+Then you should try to load the ppdev driver manually (with root rights outside
+the jtag shell):
+
+ modprobe ppdev
+ modprobe parport
+ modprobe parport_pc
+
+UrJTAG now also supports some USB cables. Unfortunately, there is no standard
+for "JTAG over USB", so this support is limited to a few selected cables only.
+For cables based on the FT2232 chip from FTDI, the cable command has to be
+given cable name and optionally the driver name, USB Vendor, and Product ID of
+the cable:
+
+ jtag> cable ARM-USB-OCD vid=15ba pid=0003 driver=ftdi-mpsse
+
+For all known cables, UrJTAG knows the VID and PID so you can just say
+
+ jtag> cable ARM-USB-OCD
+
+If your cable isn't detected automatically though it's listed as a known and
+supported cable, feel free to report its VID and PID. It might be a different
+revision and should be added to the known & tested list of cables.
+
+As stated above, the driver name is not mandatory for the cable
+command. UrJTAG will select the driver automatically based on UrJTAG's
+configuration. In case your system provides just one of libftdi or FTD2XX
+the respective driver is selected. If both libraries are available, then
+FTD2XX is selected. That's simply because FTD2XX showed some performance
+advantages over libftdi in the past. You can still force libftdi with the
+respective parameter.
+
+WARNING: There's one quirk to consider when using FTDI's FTD2XX driver. It
+connects to any known FTDI chip, randomly. I.e. if there's more than one FTDI
+device connected to the host, chances are that the driver connects to the
+wrong USB device. This might be an OEM USB-serial converter and you'll be
+banging your head why there's no proper reading from the JTAG chain. Therefore
+it's strongly recommended to specify the desc=xxx parameter for the cable
+command if the ftd2xx driver is to be used. Set xxx to the product or serial
+number descriptor string that are exhibited by the USB device.
+
+===== detect =====
+
+Detects devices on the chain. Example:
+
+ jtag> detect
+ IR length: 5
+ Chain length: 1
+ Device Id: 01011001001001100100000000010011
+ Manufacturer: Intel
+ Part: PXA250
+ Stepping: C0
+ Filename: /usr/local/share/jtag/intel/pxa250/pxa250c0
+
+During "detect", UrJTAG searches through the files in its database (usually in
+/usr/share/urjtag) and optionally in the search path for BSDL files (see bsdl
+command) to find a match for the manufacturer, revision and part number for the
+IDCODE read from the part. However, not all parts identify themselves in a way
+that is useful for "detect". For example, many chips with an ARM processor core
+inside present an IDCODE that may be specific to the the particular core inside
+the chip (e.g. ARM7TDMI), but doesn't tell about the actual manufacturer of
+the chip. In such case, the data for the part has to be included manually. See
+also the documentation for the "include" command.
+
+===== print =====
+
+Print a list of parts in the chain and the currently active instruction per part.
+Further details of bus, signals and instructions can be obtained with dedicated
+command options, see "help print".
+
+===== initbus =====
+
+Selects and initializes a bus of the currently selected part, e.g. the external
+memory bus of a CPU. This is required in order to access chips that aren't
+connected in the JTAG chain, but indirectly accessible through other chips
+(e.g. CPU or programmable logic).
+
+Type "help initbus" to get a list of supported bus types.
+If you do not find a bus driver for your specific hardware, you might be lucky
+enough to have EJTAG in your target (most MIPS-based CPUs do) and should try
+the "ejtag" bus driver. In contrast to the method "via BSR", it uploads some
+instructions to the CPU and triggers their execution to access the bus, and
+should work with almost any EJTAG-capable chip (Note: JTAG isn't EJTAG):
+
+ jtag> initbus ejtag
+
+There's another option to support new chips "via BSR", the "prototype" bus
+driver, which can be adapted to support your part with command parameters.
+The only prerequisite for using this driver is knowledge of the names of the
+signals that represent address bus, data bus, and enable signals, and that
+address and data lines are numbered in order.
+
+For example, assume the signals are named in the BSDL description as follows:
+
+ * Data bus: D0, D1, ... D31
+ * Address bus: ADDR0, ADDR1, ... ADDR22
+ * Output Enable: nOE
+ * Write Enable: nWE
+ * Chip Select: nRCS0
+
+The enable signals seem to be active low (indicated by the leading "n" in their
+names). Further we assume the interesting connected part, some flash chip, is
+only 16 bits wide even though the data bus width is 32 bits. With this
+information, you could use the following command (all on a single line!) to
+access the bus:
+
+ initbus prototype amsb=ADDR22 alsb=ADDR0 dmsb=D15 dlsb=D0
+ ncs=nRCS0 nwe=nWE noe=nOE amode=x16
+
+The "prototype" bus driver cannot deal with systems where address and data
+bus are multiplexed on the same pins. If signals aren't numbered in the right
+order or with gaps, you may get along by defining proper names as aliases for
+the actual signals, with commands like "salias ADDR12 BSCGX44".
+
+Most drivers work "via BSR", i.e. they directly access the pins of the device.
+Because it isn't possible to efficiently address only particular pins but only
+all at once, and data for all pins has to be transferred through JTAG for every
+single change, this method isn't the fastest, but usually easiest to implement
+and, well, sometimes it counts whether it works at all.
+
+The "fjmem" (FPGA JTAG memory) bus driver attempts to address this issue by
+moving control and observation away from BSR to a device-internal
+register. For sure this is only possible on FPGAs where the designer can hook
+additional logic to the JTAG chain. A core design plus examples for different
+FPGA families is available in the extra/fjmem directory. Refer to the README
+located there.
+
+Some chips don't allow direct access to their pins via BSR at all. For these,
+writing a new bus driver that utilizes a debug module to upload specific code
+to access the bus is inevitable.
+
+===== bus =====
+
+It's possible to initialize more than one bus for part(s) within a chain. The
+"bus" command allows to select the active bus for readmem, flashmem,
+etc. operation.
+
+==== Part definition commands ====
+
+The following commands are also used in the data files to define a device (IC)
+on the JTAG chain. It is not recommended to use these commands in an interactive
+session. Instead you should produce a device definition file out of a .bsd file
+using one of the supplied tools (or use the new BSDL subsystem, see below).
+
+*bit*:: define new BSR bit
+*instruction*:: change active instruction for a part or declare new instruction
+*register*:: define new data register for a part
+*signal*:: define new signal for a part
+
+==== TAP control ====
+
+The following commands can be used to directly manipulate and display the state
+of the TAP controller(s) and registers in the chain:
+
+*dr*:: display or set active data register for a part
+*instruction*:: change active instruction for a part or declare new instruction
+*get*:: get external signal value
+*pod*:: low level direct access to POD signals like TRST; use with care
+*scan*:: detect changes on input pins of current part
+*set*:: set external signal value
+*shift*:: shift data/instruction registers through JTAG chain
+
+==== RAM/Flash access ====
+
+These commands can be used if a part in the chain has memory connected to it
+(or integrated). Before they can be used, a bus driver has to be selected and
+initialized (see initbus command).
+
+*detectflash*:: detect parameters of flash chips attached to a part
+*endian*:: set/print endianess for reading/writing binary files
+*eraseflash*:: erase flash memory by number of blocks
+*flashmem*:: burn flash memory with data from a file
+*peek*:: read a single word
+*poke*:: write a single word
+*readmem*:: read content of the memory and write it to file
+*writemem*:: write content from file to memory
+
+==== Highlevel commands ====
+
+===== svf =====
+
+The SVF player operates on a single part in the scan chain. Therefore, you
+have to bring up the JTAG software, specify a cable and detect the scan
+chain beforehand.
+
+The player will establish a new instruction called "SIR" and a new register
+called "SDR". They are used internally by the respective SVF commands and are
+reassigned with new values as the player advances through the file. It is not
+recommended to use them outside of the SVF player as their content is dynamic.
+
+An example session:
+
+ jtag> cable ppdev /dev/parport0 DLC5
+ Initializing Xilinx DLC5 JTAG Parallel Cable III on ppdev port /dev/parport0
+ jtag> detect
+ IR length: 5
+ Chain length: 1
+ Device Id: 10010000101000100000000010010011
+ Manufacturer: Xilinx
+ Part: XC2S300E-PQ208
+ Stepping: 9
+ Filename: /usr/local/share/jtag/xilinx/xc2s300e-pq208/xc2s300e-pq208
+ jtag> part <desired part of the scan chain>
+ jtag> svf <SVF file for selected part>
+ jtag> instruction BYPASS
+ jtag> shift ir
+ jtag> part <next part>
+ jtag> svf <SVF file for selected part>
+ jtag> instruction BYPASS
+ jtag> shift ir
+
+It is recommended to set the part's instruction register to BYPASS although
+most SVF files do this at the end. By setting the instruction explicitely to
+BYPASS the output of the print command will always show meaningful
+information.
+
+The SVF player will issue messages when situations arise that cannot be
+handled. These messages are classified as warnings or errors depending on
+whether the player can continue operation (warning) or not (error).
+In case the TDO parameter of an SDR command leads to a mismatch the player
+issues a warning and continues. If the player should abort in this case then
+specify 'stop' at the svf command.
+
+The absence of error or warning messages indicate that the SVF file was
+executed without problems. To get a progress reporting while the player advances
+through the SVF file, specify 'progress' at the svf command.
+
+.Limitations and Deficiencies
+*****************************
+Several limitations exist for the SVF player.
+
+It has been tested so far with files generated by these tools:
+
+ - Xilinx ISE WebPack 6.3.02i - 9.1.02i
+ - Altera Quartus II 4.1sp1 - 7.0
+
+Configuration for these devices has been tested so far:
+
+ - Altera EPC1C12Q240
+ - Altera MAX3032, EPM3032ALC44
+ - Altera MAX3064, EPM3064ALC44
+ - Altera MAX7032, EPM7032SLC44
+ - Altera MAX7064, EPM7064SLC44, EPM7064STC44
+ - Xilinx Spartan-IIE, XC2S300E-PQ208
+ - Xilinx Spartan-3, XC3S1000-FG456, XC3S5000-FG900
+
+The implementation of some SVF commands has deficiencies.
+
+ - HIR, HDR commands not supported. +
+ Their functionality should be covered by the part concept of UrJTAG.
+ - PIO command not supported.
+ - PIOMAP command not supported.
+ - RUNTEST SCK not supported. +
+ The maximum time constraint is not guaranteed.
+ - TRST +
+ Parameters Z and ABSENT are not supported.
+ - TIR, TDR commands not supported. +
+ Their functionality should be covered by the part concept of UrJTAG.
+
+SVF files for programming flash-based devices might or might not work for a given
+setup. This has been observed for Actel IGLOO devices where success and failure
+depends on the actual clocking rate of the chosen cable.
+
+The ref_freq=<...> option to the svf command allows to tweak the calculation
+of 'RUNTEST xxx SEC' commands. For these commands, the SVF player needs to
+calculate the equivalent number of clocks and per default it will use the
+current cable clock frequency. This can be overridden with the ref_freq option
+that specifies a fixed reference frequency for such calculations.
+*****************************
+
+===== bsdl =====
+
+The 'bsdl' command is used to set up and test the underlying BSDL subsystem of
+UrJTAG.
+
+Whenever 'detect' encounters a new part, a configuration process is
+started. This involves matching the retrieved IDCODE against the part
+descriptions in /usr/share/urjtag as described above. However, before this
+database is searched for a suitable description, the BSDL subsystem is started
+and searches for a BSDL file that matches this device. If it finds a matching
+file, traversal of the /usr/share/urjtag database is skipped. If not, then
+this standard process follows.
+
+To tell the BSDL subsytem where to look for BSDL files, the 'bsdl path
+pathlist' command has to be issued prior to 'detect'. The contents of
+'pathlist' must be a semicolon-separated list of directories where BSDL files
+are located. This list is stored by 'bsdl path' and is used later on when
+'detect' calls the BSDL subsystem.
+
+IMPORTANT: The BSDL subsystem applies the first BSDL file that parses without
+errors and that contains the correct IDCODE. Scanning the specified
+directories happens in exactly the given order. Inside a directory however,
+the order depends largely on your filesystem's behavior.
+
+Further details of the 'bsdl' command:
+
+ - bsdl path <path1>[;<path2>[;<pathN>]] +
+ set paths for locating BSDL files
+ - bsdl debug on|off +
+ switches debug messages on or off
+ - bsdl test [file] +
+ reads file (if specified) or all files found via 'bsdl path' and
+ prints a short status, an active part is not required
+ - bsdl dump [file] +
+ reads file (if specified) or all files found via 'bsdl path' and
+ prints all configuration commands, an active part is not required
+
+TIP: The 'bsdl dump file' command implements the same functionality as
+bsdl2jtag.
+
+==== Unsupported commands ====
+
+===== script =====
+
+Although it's still there, its functionality has been merged into the include
+command. Please use "include" instead.
+
+===== setdevice =====
+
+This command was only there to support the SHARC 21065L processor,
+which has no IDCODE and therefore can't be initialized correctly by
+just running "detect". However, the proper initialization can be done
+after "detect" by loading the proper declarations and bus driver manually:
+
+ jtag> include analog/sharc21065l/sharc21065l
+
+===== spiflashmem =====
+
+The commands "spidetectflash", "spiflashmem", "spireadflash" and
+"spieraseflash" only exist in a version of the JTAG tools copyrighted by
+Intratrade Ltd., we just know about them from a posting on the net.
+
+//========================================================================
+
+== Internals ==
+
+This section is only a placeholder for the information that will
+be added soon...
+
+=== Files ===
+
+==== Source code Overview ====
+
+doc/:: Documentation
+
+data/:: Part descriptions (data files)
+
+include/:: C header files
+
+src/:: C source code
+
+src/bsdl:: BSDL subsystem
+src/bus:: Bus driver for various CPUs and other parts
+src/cmd:: Implementation of the commands for the "jtag" shell
+src/flash:: Flash detection and programming algorithms
+src/jim:: JIM, the JTAG target simulator
+src/lib:: Utility functions
+src/part:: Functions for accessing specific parts in a chain
+src/svf:: SVF player
+src/tap:: Functions for accessing the chain in general
+
+//------------------------------------------------------------------------
+
+=== Drivers ===
+
+ * Cable drivers
+ * Link drivers
+ * TAP drivers
+ * Chain drivers
+ * Bus drivers
+ * Flash drivers
+ * Commands
+
+==== Cable-specific drivers (src/tap/cable) ====
+
+Cable-specific drivers are those which are visible to the user through
+the "jtag" command shell. They're listed in response to the "help cable"
+command. Each driver has to provide the following functions:
+
+ * connect(), init() - Initialization
+ * done(), cable_free(), disconnect() - Cleaning up
+ * set_frequency() - set bitrate for shifting data through the chain
+ * clock(), get_tdo(), transfer() - immediate JTAG activities
+ * flush() - internally used to actually perform JTAG activities
+ * help() - a help text to be displayed by the jtag command shell
+
+===== Initialization =====
+
+After allocating a "cable_t" structure, a pointer to it and further
+parameters (as strings) have to be passed first to the selected cable's
+connect() function.
+
+Following that, the init() function is called via cable_init(). If cable_init()
+returns a zero value, all is fine and the cable is ready for use.
+
+===== Cleaning up =====
+
+There are two functions for actual cleanup:
+
+ * done() is responsible for driving the hardware to a safe and consistent state.
+ * cable_free() then can be used to clean up eventually extra allocated memory etc.
+
+Both are usually called from chain_disconnect().
+
+An additional mechanism allows to clean up if a disconnection was detected by
+the low level driver (e.g. USB or parallel port driver). A cable has to provide
+a disconnect() function for this purpose:
+
+ 1. Low level (e.g. parport) driver calls cable driver->disconnect()
+ 2. cable driver->disconnect() calls chain_disconnect()
+ 3. chain_disconnect() calls cable driver->done()
+ 4. chain_disconnect() then calls cable driver->cable_free()
+
+After return from chain_disconnect() to cable driver->disconnect(), the cable_t
+structure has been freed and must not be accessed anymore.
+
+===== JTAG Activities =====
+
+Currently the API provides five different functions for performing operations
+at the JTAG interface on the low level signal level (using the four signals
+TMS, TCK, TDI, and TDO).
+
+ * clock(tms,tdi,n) takes values for TMS and TDI output as its parameters, ensures that actual cable signals are set accordingly, and does a 0-1 transition on TCK (n times)
+ * get_tdo() returns the current value at the TDO input.
+ * set_trst(x) sets the TRST signal and returns the current value.
+ * get_trst() returns the current value of the TRST signal.
+
+For many JTAG adapters, there's almost no delay when doing alternating clock()
+and get_tdo(). Writing and reading happens immediately and the result is
+available immediately as well. This is the case with most parallel port
+adapters (but not when attached to USB-to-parallel adapters or USB docking
+stations) and memory mapped IO (e.g. general purpose I/O pins of
+microcontrollers).
+
+But there are adapters, especially USB and Ethernet based adapters, which
+exhibit a rather long delay between the initiation of reading a bit and the
+delivery of the value of the bit. It is at least 1 millisecond with USB,
+which would limit the transfer rate to 1 kHz. One way to workaround this
+is to transmit bits compacted into bytes and chunks of bytes, which is
+possible with the transfer() function.
+
+ * transfer(in, out)
+
+The transfer() function does a series of TCK pulses, with data for TDI read as
+bytes from memory. The bytes are automatically serialized. TMS is set to zero
+during transfer()s. Optionally, prior to each bit shifted out to the interface,
+TDO input can be read into memory (deserialized into a byte array of the same
+size as the input array).
+
+It still doesn't yield much improvement if the operation consists of many read
+and write transitions (e.g. repeatedly writing an instruction and some data
+register values, then reading from the data register, as it is necessary for
+memory access). For that reason, the above functions are also available in
+variants that don't cause immediate activity, but rather schedule it for later.
+In the API, they're visible as
+
+ * cable_defer_clock()
+ * cable_defer_get_tdo()
+ * cable_defer_set_trst()
+ * cable_defer_get_trst()
+ * cable_defer_transfer()
+
+These functions aren't implemented in the cable driver (but currently in
+src/tap/cable.c). The cable driver just has to provide a flush() function to
+actually execute the queued activity in some cable-specific optimal way, and
+to store the results of get_tdo() and transfer() activity. The caller later
+can pick up the results using these functions (implemented in cable.c):
+
+ * cable_get_tdo_late()
+ * cable_get_trst_late()
+ * cable_transfer_late()
+
+As an example, consider the following sequence of activities:
+
+ 1. clock()
+ 2. get_tdo()
+ 3. clock()
+ 4. get_tdo()
+
+If the result of the first get_tdo() isn't absolutely required before the
+second clock(), the sequence can be optimized into the following sequence (if
+
+ 1. defer_clock()
+ 2. defer_clock()
+ 3. flush()
+ 4. get_tdo_late()
+ 5. get_tdo_late()
+
+The next sections explain the queueing mechanism and its limits in detail.
+
+===== When flushing occurs =====
+
+The cable_flush() function is used to flush the queue towards the cable. It
+takes one additional argument, "how_much", which may be one of
+
+ * OPTIONALLY: The cable driver may flush if it's reasonable (e.g. if the
+ queue has been filled so that some buffer limit for the cable interface
+ is reached). It would be wise to flush early to keep the queue small, if
+ there is no point in queueing up more items because the transfer to the
+ cable would have to be split into smaller chunks anyway. This is used by
+ UrJTAG immediately after adding items to the queue.
+
+ * TO_OUTPUT: The cable driver should at least flush as much so that one
+ output becomes available in the output queue. If there's already something
+ in the output queue, this should be interpreted similar to OPTIONALLY. This
+ is used by UrJTAG immediately before it wants to use that output.
+
+ * COMPLETELY: The cable driver has to flush the queue completely. This is
+ used by UrJTAG immediately before actions that circumvent the queueing
+ such as calls to the legacy clock/get_tdo functions. It could also be
+ used by application code to ensure that some action is actually done in
+ time.
+
+===== JTAG activity queueing =====
+
+The source in src/tap/cable.c provides to important functions to access the
+two queues "todo" (with activity to be done) and "done" (with results):
+
+ * cable_add_queue_item
+ * cable_get_queue_item
+
+In src/tap/cable/generic.c you'll find two implementations of dequeueing
+algorithms, i.e. implementations of the flush() function. These could be used
+by any new cable driver unless it provides a more sophisticated algorithm
+itself:
+
+ * generic_flush_one_by_one() simply calls the "classic" functions one after
+ another. The performance of the cable driver using this implementation will
+ be the same whether the immediate or defer variants of the functions are used.
+ * generic_flush_using_transfer() tries to optimize as many clock() and
+ get_tdo() by transforming them into calls to transfer() instead. This can
+ give a slight advantage.
+
+The generic implementations also serve as a template for new cable-specific
+implementations.
+
+===== Generic implementations =====
+
+As a reference and in many cases completely sufficient for new cables, take a
+look at the code in src/tap/cable/generic.c, which contains generic routines,
+suitable for parallel port based cables (and some for other types of cables as
+well).
+
+==== Link drivers ====
+
+Link drivers like the "parport" driver collection provide the basis for
+communication between cable driver and actual JTAG adapter. The openwince JTAG
+tools supported only parallel port links with the "parport" drivers. UrJTAG
+introduced support for USB links, but in the early releases the drivers for
+these just mimic the parallel port links.
+
+The basic functions provided by all link drivers are
+
+ * connect(), to called from cable driver connect()
+ * open(), to actually connect to the device during cable driver init()
+ * close(), to disconnect from the device during cable driver done()
+ * free(), to free all resources, called from cable driver free()
+
+===== parport =====
+
+Currently there are parport drivers for direct access to the parallel port on a
+PC using I/O addresses (direct.c), and for using ppdev on Linux or ppi on FreeBSD.
+
+In addition, there are "ftdi" and "ftd2xx" parport drivers that actually are for
+communication with USB cables based on FTDI chips. They cannot be used for
+connecting old parallel port cables through parallel to USB adapters with FTDI
+chips, and probably soon will be rewritten as "usbconn" drivers instead.
+
+All parport drivers present a common API for setting and reading signals.
+
+===== usbconn =====
+
+The usbconn drivers provide a common API to search for and connect with USB
+devices. At the moment, there are drivers for libusd, libftdi and FTD2XX
+(e.g. to communicate with FTDI chip based cables through libftdi and/or
+FTD2XX, to communicate with Cypress FX2 using EZUSB.SYS or CyUSB.sys, and
+more).
+
+/////////////////////////////////////////////////////////////////////////////
+arniml, 18-may-2008: Obsolete?
+In contrast to the parport API, the usbconn drivers provide only the functions
+for connecting, disconnecting, and for releasing ressources. The actual
+communication must be implemented using the underlying library's functions,
+e.g. usb_write from libusb, or ftdi_write from libftdi. Therefore, each driver
+using usbconn usually only works together with one particular usbconn driver.
+/////////////////////////////////////////////////////////////////////////////
+
+==== Bus drivers ====
+
+Bus drivers translate read and write operations on a bus into JTAG commands
+and methods. A bus in this context is neither restricted to a processor bus,
+nor to memory. Any system component that can be read from and written to could
+be seen as attached to a bus. I.e. external or internal memory (RAM, ROM,
+Flash) and peripherals connected to a processor or simply an FPGA with 1:1
+connections.
+
+The available bus drivers are listed in response to "help initbus". Each
+driver has to provide the following functions:
+
+ * bus_new() - Initialization
+ * bus_free() - Cleaning up
+ * bus_printinfo() - Short description
+ * bus_prepare() - Preparation
+ * bus_area() - Description of the bus geometry
+ * bus_read_start() - Initiate reading
+ * bus_read_next() - Read access
+ * bus_read_end() - Finish reading
+ * bus_read() - Atomic reading
+ * bus_write() - Write access
+
+IMPORTANT: Address parameters to the functions listed above specify always
+byte locations, independent of the actual data width. The bus driver has to
+adjust the address on its own if required.
+
+===== Creation =====
+
+Upon calling of its bus_new() function, the driver allocates a "bus_t"
+structure and performs all required internal initializations.
+
+===== Initialization =====
+
+After creation of the new "bus_t" structure, the bus_init() function will
+be called to give the driver the possibility to initialize it's internal
+states or BSR bits as required. Such functionality has been split from
+bus_new() since some drivers require to re-initialize during runtime.
+
+===== Cleaning up =====
+
+The driver is supposed to free all allocated memory (including its "bus_t"
+structure). Additionally, it should set the device into a state that doesn't
+prevent it from normal operation.
+
+===== Short description =====
+
+Prints a message describing the driver. This function is called by the "print"
+command before it lists the areas covered by this bus driver.
+
+===== Preparation =====
+
+This function is called whenever a bus operation is initiated. The
+driver should perform the required preparation steps so that
+subsequent calls to the bus_read_* and bus_write functions can perform
+their tasks properly.
+
+E.g. a BSR bus driver would put the device into EXTEST mode to activate the
+boundary scan register on the device pins.
+
+===== Description of the bus geometry =====
+
+At certain stages, the bus driver's bus_area() function is called by other
+commands to query the bus geometry for a given address. The bus driver must
+fill in the fields of a "bus_area_t" structure describing the geometry of the
+area in which the specified address is located:
+
+ * a short textual description of the area
+ * start address of area
+ * length of area in bytes
+ * data width in bits
+
+Queries with an address out of range must result in an area length of
+
+ UINT64_C(0x100000000)
+
+===== Initiate reading =====
+
+Since the JTAG state machine defines a capture-shift-update sequence, it is
+required to shift the address for a read prior to capturing the read
+data. Therefore, the bus_read_start() function is called with the very first
+address to read from. This enables the driver to shift the address into the
+device before it can actually retrieve the read data for this address.
+
+===== Read access =====
+
+The bus_read_next() function fetches the read data from the device that has
+been addressed by a previous call to bus_read_start() or
+bus_read_next(). Again, this is due to the capture-shift-update sequence of
+JTAG:
+
+ 1. capture read data from device pins
+ 2. shift new address
+ 3. update new address to device pins
+
+IMPORTANT: The address parameter specifies the location of the 'following'
+read access. It is not the address of the data returned by this function call.
+
+===== Finish reading =====
+
+Function "bus_read_end()" is called at the end of a read sequence. I.e. when
+the higher level command determines that the last data portion is to be read
+from the device. There is no new address and the function driver is supposed
+to return the read data that was addressed previously.
+
+===== Atomic reading =====
+
+For ease of use, a bus driver has to supply a "bus_read()" function that
+encapsulates reading data from a single address in an atomic operation. Bus
+drivers typically build this function from "bus_read_start()" and a subsequent
+"bus_read_end()".
+
+===== Write access =====
+
+This function writes one data element at the specified address. Since this
+translates to a single JTAG operation (capture ignored, shift and update
+address & data), there is no splitting as with the read functions.
+
+=== Data file format ===
+// By Marcel Telka
+
+JTAG declarations files are located in directory "data". The files contains
+common part specific JTAG information in parseable form, e.g. list of the JTAG
+commands, boundary scan register, list of JTAG registers, etc.
+
+Syntax of the JTAG declaration file is defined in the following subsections.
+
+==== General rules ====
+
+JTAG declaration file is text file which consists of lines. Empty lines are
+ignored. Text after first "#" on the line to the end of line is ignored. This
+is useful for comments. All other lines are significant.
+
+Each significant line consists of tokens separated by whitespace. Whitespace
+could be spaces and/or tabs.
+
+==== Signal Definition ====
+
+Signal definition line consists of word "signal" followed by whitespace and
+signal name (without spaces in the name). Rest of the line should contain
+whitespace separated list of pins of the part. This list is currently not used
+for any purpose in JTAG Tools. It is intended for future use.
+
+
+//------------------------------------------------------------------------
+
+=== Development ===
+
+==== Future Plans ====
+
+- C API and library package
+- Bindings for Python, Perl, ...
+- TCP/IP access
+- New cable drivers
+- ...
+
+==== How to contribute ====
+
+ * Using Subversion
+ * Create and submit a patch
+ * Use SourceForge trackers
+
+//========================================================================
+
+== F.A.Q. ==
+
+For a list of known problems in current versions, please also check the "Bugs"
+tracker at the UrJTAG website!
+
+Q. The documentation is incomplete. Where can I get more information?::
+ A. Please ask in the "Using UrJTAG" Forum on http://urjtag.org[]
+
+Q. My flash isn't detected or can't be programmed. What can I do?::
+ A. Please record the output of the "detect" and "detectflash" commands and ask in the Forum. If possible, re-compile UrJTAG before with "--enable-jedec-exp" to get extra information.
+
+Q. My CPU/FPGA/etc. chip isn't detected. What can I do?::
+ A. First try to get hold of a "BSDL" description of the chip from the vendor, and specify where to find this file to UrJTAG using "bsdl path" before you "detect". Second, a bus driver has to be selected. Maybe "ejtag" or "prototype" work.
+
+Q. When I type "cable parallel 0x378 DLC5" (in a Cygwin environment) I get "Unknown port driver: parallel"?::
+ A. Please install the Cygwin ioperm package, and re-configure/compile.
+
+Q. When I type "cable parallel 0x378 DLC5" (in a Cygwin environment) I get "Error: Cable initialization failed!".::
+ A. Please install ioperm.sys driver using `ioperm -i` command.
+
+Q. When running autogen.sh, I get "Can't exec "autopoint": No such file or directory"::
+ A. You need the headers for gettext (e.g. Debian package "gettext-devel").
+
+Q. When running autogen.sh, it complains about missing CVS::
+ A. The easiest solution is to actually install CVS for this step, just to get around this error message.
+
+Q. During compilation, I get "svf_bison.y: No such file or directory"::
+ A. You need "bison".
+
+Q. During compilation, I get "flex: can't open ... src/svf/svf_flex.l"::
+ A. You need "flex"
+
+Q. During compilation, I get "src/svf/svf_flex.l", line 27: unrecognized %option: bison-locations"::
+ A. You need a newer version of flex. It should be 2.5.31 or newer;
+ Unfortunately, Cygwin comes with only 2.5.4a. You may try to compile and
+ install a newer version of flex from source to solve this. The distributed
+ source tarball contains source pregenerated with a current flex version,
+ you need flex yourself only to compile from fresh SVN checkouts.
+
+Q. When running "make install", I get "Permission denied" errors::
+ A. If you want to install into a system directory (the default /usr/local is one), you'll have to run "make install" as the superuser, e.g. do "sudo make install".
+
+Q. My BSDL file defines the bus DAT as bit_vector(15 downto 0), how should I access single elements?::
+ A. BSDL syntax is an extension of the VHDL language. Array elements are indexed with
+ parentheses: DAT(4) selects index number 4 of the DAT vector. Also refer to the "print
+ signals" command.
+
+Q. My board requires certain signals to be set to dedicated values before external memories can be accessed.::
+ A. Most (if not all) BSR-based bus drivers allow for static configurations of
+ pins that are controlled by BSR bits. Apply the required "set" commands before
+ issueing the "initbus ..." command. These settings are preserved by all bus
+ related commands if they don't collide with the signals required for bus operation.
+
+Q. My USB pod seems slow.::
+ A. USB-based JTAG pods suffer from a couple of intrinsic issues. Consider the
+ following to get maximum performance:
+ * Run UrJTAG on native linux. Cygwin and VMWare are reportedly slower.
+ * Connect the pod via a high speed USB hub to a high speed USB host port.
+ Even though the pod is a full speed device, it benefits from the shorter
+ turn-around times between host and hub.
+
+//========================================================================
+
+== Licensing ==
+
+=== Overview ===
+
+Various licenses are used for the UrJTAG project. The GPL is used for most
+of the code except for some include files, JIM, and cable driver source, where
+a BSD or MIT license is used; this is noted in the file headers.
+
+=== GNU Free Documentation License (FDL) ===
+.........................................
+include::fdl.txt[]
+.........................................
+=== GNU General Public License (GPL) ===
+.........................................
+include::gpl.txt[]
+.........................................
+
--- /dev/null
+.TH bsdl2jtag 1 "April 7, 2009" UrJTAG
+.SH NAME
+bsdl2jtag \- UrJTAG declaration file conversion
+.SH SYNOPSIS
+.B bsdl2jtag
+.I bsdlfile
+.I jtagfile
+.SH DESCRIPTION
+.B bsdl2jtag
+converts BSDL files to JTAG files which can be used by
+.BR jtag (1).
+.B bsdl2jtag
+reads from
+.I bsdlfile
+and produces its output in the file
+.IR jtagfile .
+.SH OPTIONS
+None.
+.SH BUGS
+Bugs are tracked at the project homepage, http://www.urjtag.org
+.SH "SEE ALSO"
+.BR jtag (1)
+.SH AUTHORS
+Authors and contributors are listed in the AUTHORS and THANKS files in
+the source documentation.
+.SH HISTORY
+JTAG Tools originally have been developed as part of the openwince project by
+Marcel Telka. They became an independent project named UrJTAG in late 2007.
+
--- /dev/null
+ GNU Free Documentation License
+ Version 1.2, November 2002
+
+
+ Copyright (C) 2000,2001,2002 Free Software Foundation, Inc.
+ 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ Everyone is permitted to copy and distribute verbatim copies
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+
+
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--- /dev/null
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+library. If this is what you want to do, use the GNU Lesser General
+Public License instead of this License.
--- /dev/null
+[ 1460563 ] How to add Support more Flash chip???
+
+Date: 2006-06-04 15:48
+Sender: ameziti
+
+Hi
+
+I will not give here the answers but just the we to do the
+work.
+
+Theres three category of things you have to consider:
+
+1- the part wich contain the jtag port (processor, fpga..)
+2- the flash memory you want to flash (amd, intel, atmel..)
+3- the bus wich indicate how the part and the flash are
+connected together on your card.
+
+Use the patches that are on the site as exemples to
+inderstand how to do your job.
+
+Exemples:
+
+1- for the part (processor) with jtag:
+ -have a look at the patch 1173994 for the IBM PPC405EP
+ - you will need bsdl file of your processor and use
+ - bsdl2jtag to transform your file
+ - he add a directory jtag-0.5.1/data/ibm
+ - add and modify same files... look at the patch
+ - understand what that mean and do the same think
+
+2- you have to add your flash :
+ - have a look at the patch 1281666 for the Am29LV040B
+ - he modify the jtag-0.5.1/libbrux/flash/amd.c file
+ - he modify the jtag-0.5.1/libbrux/flash/jedec.c
+ - understand what that mean and do the same think
+
+3 - you have to add your bus (interconnexion card) betwin
+the processor and the flash
+ - look at the second party of the patch 1173994 where
+begin at line 756 with jtag-0.5.1.orig/src/bus
+ - you have to modify this directory files buses.h buses.c
+ - writing and adding your own bus description ixp425.c
+(look at the examples to understand what to do)
+
+
+generally:
+You have also to understand
+- the architecture of the jtag-0.5.1 project
+- how to modify makefiles
+- to install the ioperm-0.4 for managing the parallel port
+- to install the include-0.4.2 wich contains the *.h files
+- to install cygwin (if you work under windows) with
+developpement pack which contain debug module
+- prefer a fast and quick PC for not to wast the time
+during compilation
+- perhaps an logic analyser for debugging your hardware
+
+I took about 1 month (during wasting time) to understand
+all of this things and do it for flashing
+an AT49BV322A atmel flash
+with the spartan 3 xc3s1500 xilinx fpga
+on the DS-BD-3S1500MB-FG676 memec card
+
+good work
+
+Abdallah MEZITI
+
+
--- /dev/null
+.TH jtag 1 "April 7, 2009" UrJTAG
+.SH NAME
+jtag \- UrJTAG command shell
+.SH SYNOPSIS
+.B jtag
+[\-hinqv]
+.I file
+.B ...
+.SH DESCRIPTION
+UrJTAG is a software package which enables working with JTAG-aware (IEEE
+1149.1) hardware devices (parts) and boards through JTAG adapter.
+.SH OPTIONS
+.TP
+.I \-h, \-\-help
+Display a short help text and exit.
+.TP
+.I \-i, \-\-interactive
+Enter interactive mode after executing commands from files (this is the default if no files are named on the command line).
+.TP
+.I \-n, \-\-norc
+Disable reading ~/.jtag/rc on startup.
+.TP
+.I \-q, \-\-quiet
+Do not print help on startup.
+.TP
+.I \-v, \-\-version
+Display version information and exit.
+.SH ARGUMENTS
+If arguments remain after option processing, they are taken as names of files
+containing JTAG commands, one per line. Unless the
+.I \-\-interactive
+option was specified, the program will exit after processing the commands from
+the file[s].
+.SH FILES
+.PP
+.I ~/.jtag/rc
+.IP
+A per-user text file containing JTAG commands to execute at startup.
+.PP
+.I /usr/share/urjtag
+.IP
+Data files about various CPUs, flash chips etc.
+.SH BUGS
+Bugs are tracked at the project homepage, http://www.urjtag.org.
+.SH "SEE ALSO"
+.BR bsdl2jtag (1)
+.SH AUTHORS
+Authors and contributors are listed in the AUTHORS and THANKS files in
+the source documentation.
+.SH HISTORY
+JTAG Tools originally have been developed as part of the openwince project by
+Marcel Telka. They became an independent project named UrJTAG in late 2007.
+
--- /dev/null
+FPGA JTAG Memory (fjmem) Design
+===============================
+$Id$
+
+
+Introduction
+------------
+
+This directory contains the VHDL design files that complement UrJTAG's fjmem
+bus driver. The fjmem system utilizes generic embedded JTAG components that
+are available in several FPGA families. These stubs connect to the fjmem_core
+design and act as the interface to the external JTAG chain.
+
+The fjmem_core design implements a data register that is hooked into the JTAG
+chain when a USER instruction is selected. UrJTAG communicates with fjmem_core
+by shifting command, address and data information through this register. This
+information is processed by fjmem_core and results in read or write operations
+on a generic memory interface.
+
+
+JTAG stubs
+----------
+
+Modern FPGA devices contain a JTAG component that allows user logic to connect
+to the external JTAG chain. Xilinx devices like the Spartan 3 call it
+BSCAN_SPARTAN3 while it's named cyclone_jtag in Altera's Cyclone
+devices. Apart from details, both components provide equivalent
+functionality: User logic can place a data shift register between TDI and TDO
+that is activated by special USER instructions.
+
+Xilinx BSCAN_SPARTAN3:
+ * USER1, opcode 00010
+ * USER2, opcode 00011
+Extensively documented in "Configuration and Readback of Spartan-II FPGAs
+Using Boundary Scan" (xapp188.pdf).
+
+Altera cyclone_jtag:
+ * USER0, opcode 0000001100
+ * USER1, opcode 0000001110
+Briefly mentioned in the "MAXII Device Handbook".
+
+
+Integration
+-----------
+
+A short description of fjmem_core's ports:
+
+ -- JTAG Interface
+ clkdr_i - TCK clock
+ trst_i - TAP reset
+ shift_i - Shift enable
+ update_i - Update clock
+ tdi_i - TDI chain input
+ tdo_o - TDO chain output
+ -- Memory Interface
+ clk_i - Clock
+ res_i - Reset
+ strobe_o - Strobe
+ read_o - Read enable
+ write_o - Write enable
+ ack_i - Acknowledge
+ cs_o - Chip select lines
+ addr_o - Address vector
+ din_i - Data input vector
+ dout_o - Data output vector
+
+
+Whenever the fjmem_core receives a command from the fjmem bus driver, it
+issues the according signals on the memory interface. This interface is
+synchronous to clk_i.
+
+Active strobe_o announces a read or write operation. All other outputs are
+valid only when strobe_o is '1'. Access direction outputs read_o and write_o
+are mutually exclusive. cs_o is a one-hot vector and identifies the selected
+memory block.
+
+Two sample toplevel designs are provided for Cyclone and Spartan3 devices that
+demonstrate the attachment of asynchronous and synchronous (on-chip) memories.
+
+
+Configuration
+-------------
+
+The specific configuration of fjmem_core is taken from fjmem_config_pack. The
+user has to set a number of constants that determine the behavior of the core
+design.
+
+ -- Specify the active levels of trst_i, shift_i and res_i
+ trst_act_level_c - TRST active level
+ shift_act_level_c - Shift enable active level
+ res_act_level_c - res_i active level
+
+A block is a consecutive memory range that has a common geometry, i.e. it
+represents a single memory component in the system. The number of block
+relates directly to the number of lines in the cs_o chip select vector.
+
+ -- number of used blocks
+ constant num_blocks_c : natural := 4;
+ -- number of bits for block field
+ constant num_block_field_c : natural := 2;
+
+Specify the geometry of each block: address and data vector width. The block
+(= memory range) is expected to use the full address vector width.
+
+ constant blocks_c : block_array_t :=
+ ((addr_width => 18, -- block #0
+ data_width => 16),
+ (addr_width => 18, -- block #1
+ data_width => 16),
+ (addr_width => 19, -- block #2
+ data_width => 8),
+ (addr_width => 8, -- block #3
+ data_width => 8)
+ );
+
+For completeness, it's required to set constants for the maximum address and
+data vector widths.
+
+ constant max_addr_width_c : natural := 19;
+ constant max_data_width_c : natural := 16;
--- /dev/null
+-------------------------------------------------------------------------------
+--
+-- $Id$
+--
+-- This program is free software; you can redistribute it and/or
+-- modify it under the terms of the GNU General Public License
+-- as published by the Free Software Foundation; either version 2
+-- of the License, or (at your option) any later version.
+--
+-- This program is distributed in the hope that it will be useful,
+-- but WITHOUT ANY WARRANTY; without even the implied warranty of
+-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+-- GNU General Public License for more details.
+--
+-- You should have received a copy of the GNU General Public License
+-- along with this program; if not, write to the Free Software
+-- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+-- 02111-1307, USA.
+--
+-- Written by Arnim Laeuger <arniml@users.sourceforge.net>, 2008.
+--
+-------------------------------------------------------------------------------
+
+library ieee;
+use ieee.std_logic_1164.all;
+
+package fjmem_config_pack is
+
+ -----------------------------------------------------------------------------
+ -- Specify the active levels of trst_i, shift_i and res_i
+ --
+ constant trst_act_level_c : std_logic := '1';
+ constant shift_act_level_c : std_logic := '1';
+ constant res_act_level_c : std_logic := '1';
+ --
+ -----------------------------------------------------------------------------
+
+
+ -----------------------------------------------------------------------------
+ -- Adapt the number of used blocks and the number of bits that are
+ -- required for the block field (2 ** num_block_field_c >= num_blocks_c)
+ --
+ -- number of used blocks
+ constant num_blocks_c : natural := 4;
+ -- number of bits for block field
+ constant num_block_field_c : natural := 2;
+ --
+ -----------------------------------------------------------------------------
+
+
+ -----------------------------------------------------------------------------
+ -- Don't change the array type
+ --
+ type block_desc_t is
+ record
+ addr_width : natural;
+ data_width : natural;
+ end record;
+ type block_array_t is array (natural range 0 to num_blocks_c-1) of block_desc_t;
+ --
+ -----------------------------------------------------------------------------
+
+
+ -----------------------------------------------------------------------------
+ -- Fill in the array for all your used blocks
+ --
+ constant blocks_c : block_array_t :=
+ ((addr_width => 18, -- block #0
+ data_width => 16),
+ (addr_width => 18, -- block #1
+ data_width => 16),
+ (addr_width => 19, -- block #2
+ data_width => 8),
+ (addr_width => 8, -- block #3
+ data_width => 8)
+ );
+ --
+ -- And specify the maximum address and data width
+ --
+ constant max_addr_width_c : natural := 19;
+ constant max_data_width_c : natural := 16;
+ --
+ -----------------------------------------------------------------------------
+
+end;
--- /dev/null
+-------------------------------------------------------------------------------
+--
+-- $Id$
+--
+-- This program is free software; you can redistribute it and/or
+-- modify it under the terms of the GNU General Public License
+-- as published by the Free Software Foundation; either version 2
+-- of the License, or (at your option) any later version.
+--
+-- This program is distributed in the hope that it will be useful,
+-- but WITHOUT ANY WARRANTY; without even the implied warranty of
+-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+-- GNU General Public License for more details.
+--
+-- You should have received a copy of the GNU General Public License
+-- along with this program; if not, write to the Free Software
+-- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+-- 02111-1307, USA.
+--
+-- Written by Arnim Laeuger <arniml@users.sourceforge.net>, 2008.
+--
+-------------------------------------------------------------------------------
+
+library ieee;
+use ieee.std_logic_1164.all;
+
+package fjmem_config_pack is
+
+ -----------------------------------------------------------------------------
+ -- Specify the active levels of trst_i, shift_i and res_i
+ --
+ constant trst_act_level_c : std_logic := '1';
+ constant shift_act_level_c : std_logic := '1';
+ constant res_act_level_c : std_logic := '1';
+ --
+ -----------------------------------------------------------------------------
+
+
+ -----------------------------------------------------------------------------
+ -- Adapt the number of used blocks and the number of bits that are
+ -- required for the block field (2 ** num_block_field_c >= num_blocks_c)
+ --
+ -- number of used blocks
+ constant num_blocks_c : natural := 4;
+ -- number of bits for block field
+ constant num_block_field_c : natural := 2;
+ --
+ -----------------------------------------------------------------------------
+
+
+ -----------------------------------------------------------------------------
+ -- Don't change the array type
+ --
+ type block_desc_t is
+ record
+ addr_width : natural;
+ data_width : natural;
+ end record;
+ type block_array_t is array (natural range 0 to num_blocks_c-1) of block_desc_t;
+ --
+ -----------------------------------------------------------------------------
+
+
+ -----------------------------------------------------------------------------
+ -- Fill in the array for all your used blocks
+ --
+ constant blocks_c : block_array_t :=
+ ((addr_width => 24, -- block #0, FLASH
+ data_width => 16),
+ (addr_width => 18, -- block #1, RAM0
+ data_width => 16),
+ (addr_width => 18, -- block #2, RAM1
+ data_width => 16),
+ (addr_width => 8, -- block #3, embedded RAM
+ data_width => 8)
+ );
+ --
+ -- And specify the maximum address and data width
+ --
+ constant max_addr_width_c : natural := 24;
+ constant max_data_width_c : natural := 16;
+ --
+ -----------------------------------------------------------------------------
+
+end;
--- /dev/null
+-------------------------------------------------------------------------------
+--
+-- $Id$
+--
+-- jmem_core - a generic interface module for accessing on-chip and off-chip
+-- memory and peripherals
+--
+-- For host software support visit
+-- http://urjtag.org/
+--
+-- This program is free software; you can redistribute it and/or
+-- modify it under the terms of the GNU General Public License
+-- as published by the Free Software Foundation; either version 2
+-- of the License, or (at your option) any later version.
+--
+-- This program is distributed in the hope that it will be useful,
+-- but WITHOUT ANY WARRANTY; without even the implied warranty of
+-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+-- GNU General Public License for more details.
+--
+-- You should have received a copy of the GNU General Public License
+-- along with this program; if not, write to the Free Software
+-- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+-- 02111-1307, USA.
+--
+-- Written by Arnim Laeuger <arniml@users.sourceforge.net>, 2008.
+--
+-------------------------------------------------------------------------------
+
+library ieee;
+use ieee.std_logic_1164.all;
+
+use work.fjmem_config_pack.all;
+use work.fjmem_pack.all;
+
+entity fjmem_core is
+
+ port (
+ -- JTAG Interface ---------------------------------------------------------
+ clkdr_i : in std_logic;
+ trst_i : in std_logic;
+ shift_i : in std_logic;
+ update_i : in std_logic;
+ tdi_i : in std_logic;
+ tdo_o : out std_logic;
+ -- Memory Interface -------------------------------------------------------
+ clk_i : in std_logic;
+ res_i : in std_logic;
+ strobe_o : out std_logic;
+ read_o : out std_logic;
+ write_o : out std_logic;
+ ack_i : in std_logic;
+ cs_o : out std_logic_vector(num_blocks_c-1 downto 0);
+ addr_o : out std_logic_vector(max_addr_width_c-1 downto 0);
+ din_i : in std_logic_vector(max_data_width_c-1 downto 0);
+ dout_o : out std_logic_vector(max_data_width_c-1 downto 0)
+ );
+
+end fjmem_core;
+
+
+library ieee;
+use ieee.numeric_std.all;
+
+architecture rtl of fjmem_core is
+
+ signal trst_s : boolean;
+ signal shift_en_s,
+ capture_en_s : boolean;
+
+ signal shift_q : std_logic_vector(shift_range_t);
+ signal update_q : std_logic_vector(shift_range_t);
+
+ signal res_s : boolean;
+
+ signal din_q : std_logic_vector(data_range_t);
+ signal ack_q,
+ ack_for_shift_q : std_logic;
+
+ signal instr_q : std_logic_vector(instr_range_t);
+ signal block_q : std_logic_vector(block_range_t);
+ signal strobe_toggle_q : std_logic;
+ signal addr_q : std_logic_vector(addr_range_t);
+ signal dout_q : std_logic_vector(data_range_t);
+
+ signal strobe_sync_q : std_logic_vector(1 downto 0);
+ signal strobe_edge_q : std_logic;
+
+begin
+
+ -----------------------------------------------------------------------------
+ -- Mapping of input signals to internal flags
+ -----------------------------------------------------------------------------
+ trst_s <= trst_i = trst_act_level_c;
+ shift_en_s <= shift_i = shift_act_level_c;
+ capture_en_s <= shift_i /= shift_act_level_c;
+
+ res_s <= res_i = res_act_level_c;
+
+
+ -----------------------------------------------------------------------------
+ -- Process shift
+ --
+ -- Purpose:
+ -- Implements the shift register between tdi_i and tdo_o.
+ --
+ -- Instruction are handled as follows.
+ -- read :
+ -- write :
+ -- detect : a dedicated pattern is captured that allows that marks the
+ -- variable length fields:
+ -- * block field marked with '1'
+ -- * address field marked with '0'
+ -- * data field marked with '1'
+ -- This allows the host software to detect how these fields are
+ -- located inside the bit stream (total length of bitstream has
+ -- been determined previously).
+ -- query : Based on the shifted block number, the used bits in the
+ -- address and data field are marked with '1'. This reports the
+ -- specific addr and data widths of the specified block.
+ --
+ shift: process (trst_s, clkdr_i)
+ variable addr_width_v,
+ data_width_v : natural;
+ variable idx_v : natural;
+ begin
+ if trst_s then
+ shift_q <= (others => '0');
+
+ elsif rising_edge(clkdr_i) then
+ if shift_en_s then
+ -- shift mode
+ shift_q(shift_width_c-2 downto 0) <= shift_q(shift_width_c-1 downto 1);
+ shift_q(shift_width_c-1) <= tdi_i;
+
+ else
+ -- capture mode
+ idx_v := to_integer(unsigned(shift_q(block_range_t)));
+ if idx_v < num_blocks_c then
+ addr_width_v := blocks_c(idx_v).addr_width;
+ data_width_v := blocks_c(idx_v).data_width;
+ else
+ addr_width_v := 0;
+ data_width_v := 0;
+ end if;
+
+ case instr_q is
+ when instr_read_c =>
+ shift_q(instr_range_t) <= instr_q;
+ shift_q(shift_ack_pos_c) <= ack_for_shift_q;
+ shift_q(data_range_t) <= din_q;
+
+ when instr_write_c =>
+ shift_q(instr_range_t) <= instr_q;
+
+ when instr_idle_c =>
+ shift_q <= (others => '0');
+
+ when instr_detect_c =>
+ shift_q <= (others => '0');
+ shift_q(instr_range_t) <= instr_q;
+ -- mark block field with '1'
+ shift_q(block_range_t) <= (others => '1');
+ -- mark address field with '0'
+ shift_q(addr_range_t) <= (others => '0');
+ -- mark data field with '1'
+ shift_q(data_range_t) <= (others => '1');
+
+ when instr_query_c =>
+ if idx_v < num_blocks_c then
+ shift_q <= (others => '0');
+ -- mark used address bits of this block in the address field with '1'
+ for idx in addr_range_t loop
+ if idx < shift_addr_pos_c + addr_width_v then
+ shift_q(idx) <= '1';
+ end if;
+ end loop;
+ -- mark used data bits of this block in the data field '1'
+ for idx in data_range_t loop
+ if idx < shift_data_pos_c + data_width_v then
+ shift_q(idx) <= '1';
+ end if;
+ end loop;
+ else
+ -- unused block
+ shift_q <= (others => '0');
+ end if;
+ shift_q(instr_range_t) <= instr_q;
+
+ when others =>
+ shift_q <= (others => '-');
+ shift_q(instr_range_t) <= instr_q;
+ end case;
+
+ end if;
+ end if;
+ end process shift;
+ --
+ -----------------------------------------------------------------------------
+
+
+ -----------------------------------------------------------------------------
+ -- Process din
+ --
+ -- Purpose:
+ -- Stores the provided data at din_i for later capture.
+ -- The ack_i input is stored in a two-stage pipeline to allow din_q to
+ -- settle before ack is actually detected in the clkdr clock domain.
+ --
+ din: process (res_s, clk_i)
+ begin
+ if res_s then
+ din_q <= (others => '0');
+ ack_q <= '0';
+ ack_for_shift_q <= '0';
+
+ elsif rising_edge(clk_i) then
+ if ack_i = '1' then
+ din_q <= din_i;
+ ack_q <= '1';
+ end if;
+ ack_for_shift_q <= ack_q;
+
+ if ack_for_shift_q = '1' then
+ -- reset for the moment, functionality not yet complete
+ ack_q <= '0';
+ end if;
+
+ end if;
+ end process din;
+ --
+ -----------------------------------------------------------------------------
+
+
+ -----------------------------------------------------------------------------
+ -- Process dout
+ --
+ -- Purpose:
+ -- Stores the updated block, instruction, address and data fields.
+ --
+ dout: process (trst_s, update_i)
+ begin
+ if trst_s then
+ instr_q <= instr_idle_c;
+ block_q <= (others => '0');
+ addr_q <= (others => '0');
+ dout_q <= (others => '0');
+ strobe_toggle_q <= '0';
+
+ elsif rising_edge(update_i) then
+ instr_q <= shift_q(instr_range_t);
+ block_q <= shift_q(block_range_t);
+ addr_q <= shift_q(addr_range_t);
+ dout_q <= shift_q(data_range_t);
+
+ strobe_toggle_q <= not strobe_toggle_q;
+
+ end if;
+ end process dout;
+ --
+ -----------------------------------------------------------------------------
+
+
+ -----------------------------------------------------------------------------
+ -- Process strobe_sync
+ --
+ -- Purpose:
+ -- Implements the synchronizer for the strobe signal from clkdr_i to
+ -- clk_i domain. This is a toggle synchronizer.
+ --
+ strobe_sync: process (res_s, clk_i)
+ begin
+ if res_s then
+ strobe_sync_q <= (others => '0');
+ strobe_edge_q <= '0';
+
+ elsif rising_edge(clk_i) then
+ strobe_sync_q(1) <= strobe_toggle_q;
+ strobe_sync_q(0) <= strobe_sync_q(1);
+
+ strobe_edge_q <= strobe_sync_q(0);
+ end if;
+ end process strobe_sync;
+ --
+ -----------------------------------------------------------------------------
+
+
+ -----------------------------------------------------------------------------
+ -- Process cs_gen
+ --
+ -- Purpose:
+ -- Generates the cs_o output vector.
+ --
+ cs_gen: process (block_q)
+ begin
+ for idx in 0 to num_blocks_c-1 loop
+ if idx = to_integer(unsigned(block_q)) then
+ cs_o(idx) <= '1';
+ else
+ cs_o(idx) <= '0';
+ end if;
+ end loop;
+ end process cs_gen;
+ --
+ -----------------------------------------------------------------------------
+
+
+ -----------------------------------------------------------------------------
+ -- Output mapping
+ -----------------------------------------------------------------------------
+ tdo_o <= shift_q(0);
+ strobe_o <= strobe_sync_q(0) xor strobe_edge_q;
+ read_o <= '1' when instr_q = instr_read_c else '0';
+ write_o <= '1' when instr_q = instr_write_c else '0';
+ addr_o <= addr_q;
+ dout_o <= dout_q;
+
+end rtl;
--- /dev/null
+-------------------------------------------------------------------------------
+--
+-- $Id$
+--
+-- This program is free software; you can redistribute it and/or
+-- modify it under the terms of the GNU General Public License
+-- as published by the Free Software Foundation; either version 2
+-- of the License, or (at your option) any later version.
+--
+-- This program is distributed in the hope that it will be useful,
+-- but WITHOUT ANY WARRANTY; without even the implied warranty of
+-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+-- GNU General Public License for more details.
+--
+-- You should have received a copy of the GNU General Public License
+-- along with this program; if not, write to the Free Software
+-- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+-- 02111-1307, USA.
+--
+-- Written by Arnim Laeuger <arniml@users.sourceforge.net>, 2008.
+--
+-------------------------------------------------------------------------------
+
+library ieee;
+use ieee.std_logic_1164.all;
+
+entity fjmem_cyclone is
+
+ port (
+ altera_reserved_tck : in std_logic;
+ altera_reserved_tms : in std_logic;
+ altera_reserved_tdi : in std_logic;
+ altera_reserved_tdo : out std_logic;
+ ext_clk_i : in std_logic;
+ wd_o : out std_logic;
+ rgb_r_o : out std_logic_vector( 2 downto 0);
+ rgb_g_o : out std_logic_vector( 2 downto 0);
+ rgb_b_o : out std_logic_vector( 2 downto 0);
+ comp_sync_n_o : out std_logic;
+ audio_l_o : out std_logic;
+ audio_r_o : out std_logic;
+ audio_o : out std_logic_vector( 7 downto 0);
+ pad_clk_o : out std_logic;
+ pad_latch_o : out std_logic;
+ pad_data_i : in std_logic_vector( 1 downto 0);
+ rxd_i : in std_logic;
+ txd_o : out std_logic;
+ cts_i : in std_logic;
+ rts_o : out std_logic;
+ rama_a_o : out std_logic_vector(17 downto 0);
+ rama_d_b : inout std_logic_vector(15 downto 0);
+ rama_cs_n_o : out std_logic;
+ rama_oe_n_o : out std_logic;
+ rama_we_n_o : out std_logic;
+ rama_lb_n_o : out std_logic;
+ rama_ub_n_o : out std_logic;
+ ramb_a_o : out std_logic_vector(17 downto 0);
+ ramb_d_b : inout std_logic_vector(15 downto 0);
+ ramb_cs_n_o : out std_logic;
+ ramb_oe_n_o : out std_logic;
+ ramb_we_n_o : out std_logic;
+ ramb_lb_n_o : out std_logic;
+ ramb_ub_n_o : out std_logic;
+ fl_a_o : out std_logic_vector(18 downto 0);
+ fl_d_b : inout std_logic_vector( 7 downto 0);
+ fl_we_n_o : out std_logic;
+ fl_oe_n_o : out std_logic;
+ fl_cs_n_o : out std_logic;
+ fl_cs2_n_o : out std_logic;
+ fl_rdy_i : in std_logic
+ );
+
+end fjmem_cyclone;
+
+
+library ieee;
+use ieee.numeric_std.all;
+
+use work.fjmem_config_pack.all;
+
+architecture struct of fjmem_cyclone is
+
+ component fjmem_core
+ port (
+ clkdr_i : in std_logic;
+ trst_i : in std_logic;
+ shift_i : in std_logic;
+ update_i : in std_logic;
+ tdi_i : in std_logic;
+ tdo_o : out std_logic;
+ clk_i : in std_logic;
+ res_i : in std_logic;
+ strobe_o : out std_logic;
+ read_o : out std_logic;
+ write_o : out std_logic;
+ ack_i : in std_logic;
+ cs_o : out std_logic_vector(num_blocks_c-1 downto 0);
+ addr_o : out std_logic_vector(max_addr_width_c-1 downto 0);
+ din_i : in std_logic_vector(max_data_width_c-1 downto 0);
+ dout_o : out std_logic_vector(max_data_width_c-1 downto 0)
+ );
+ end component;
+
+ component cyclone_jtag
+ port (
+ tms : in std_logic;
+ tck : in std_logic;
+ tdi : in std_logic;
+ tdo : out std_logic;
+ tmsutap : out std_logic;
+ tckutap : out std_logic;
+ tdiutap : out std_logic;
+ tdouser : in std_logic;
+ shiftuser : out std_logic;
+ clkdruser : out std_logic;
+ updateuser : out std_logic;
+ runidleuser : out std_logic;
+ usr1user : out std_logic
+ );
+ end component;
+
+ component generic_ram_ena
+ generic (
+ addr_width_g : integer := 10;
+ data_width_g : integer := 8
+ );
+ port (
+ clk_i : in std_logic;
+ a_i : in std_logic_vector(addr_width_g-1 downto 0);
+ we_i : in std_logic;
+ ena_i : in std_logic;
+ d_i : in std_logic_vector(data_width_g-1 downto 0);
+ d_o : out std_logic_vector(data_width_g-1 downto 0)
+ );
+ end component;
+
+ signal tdi_s,
+ tdo_s : std_logic;
+ signal clkdr_s,
+ trst_s,
+ shift_s,
+ update_s : std_logic;
+
+ signal addr_s : std_logic_vector(max_addr_width_c-1 downto 0);
+ signal din_s,
+ dout_s : std_logic_vector(max_data_width_c-1 downto 0);
+
+ signal res_s : std_logic;
+
+ signal read_s,
+ write_s,
+ strobe_s : std_logic;
+ signal cs_s : std_logic_vector(3 downto 0);
+ signal ack_q : std_logic;
+
+ type state_t is (IDLE,
+ READ_WAIT,
+ WRITE_DRIVE,
+ WRITE_WAIT,
+ WRITE_FINISH);
+ signal state_q : state_t;
+
+ signal cnt_q : unsigned(1 downto 0);
+
+ signal rama_cs_n_q,
+ rama_oe_n_q,
+ rama_we_n_q,
+ rama_lb_n_q,
+ rama_ub_n_q,
+ rama_d_en_q : std_logic;
+ signal ramb_cs_n_q,
+ ramb_oe_n_q,
+ ramb_we_n_q,
+ ramb_lb_n_q,
+ ramb_ub_n_q,
+ ramb_d_en_q : std_logic;
+ signal fl_cs_n_q,
+ fl_oe_n_q,
+ fl_we_n_q,
+ fl_d_en_q : std_logic;
+
+ signal en_emb_rams_s : std_logic;
+ signal d_from_emb_ram_s : std_logic_vector(7 downto 0);
+
+begin
+
+ res_s <= '0';
+
+
+ cyclone_jtag_b : cyclone_jtag
+ port map (
+ tms => altera_reserved_tms,
+ tck => altera_reserved_tck,
+ tdi => altera_reserved_tdi,
+ tdo => altera_reserved_tdo,
+ tmsutap => open,
+ tckutap => open,
+ tdiutap => tdi_s,
+ tdouser => tdo_s,
+ shiftuser => shift_s,
+ clkdruser => clkdr_s,
+ updateuser => update_s,
+ runidleuser => open, --trst_s,
+ usr1user => open
+ );
+ trst_s <= '0';
+
+
+ fjmem_core_b : fjmem_core
+ port map (
+ clkdr_i => clkdr_s,
+ trst_i => trst_s,
+ shift_i => shift_s,
+ update_i => update_s,
+ tdi_i => tdi_s,
+ tdo_o => tdo_s,
+ clk_i => ext_clk_i,
+ res_i => res_s,
+ strobe_o => strobe_s,
+ read_o => read_s,
+ write_o => write_s,
+ ack_i => ack_q,
+ cs_o => cs_s,
+ addr_o => addr_s,
+ din_i => din_s,
+ dout_o => dout_s
+ );
+ wd_o <= '0';
+
+
+ -----------------------------------------------------------------------------
+ -- Process mem_ctrl
+ --
+ -- Purpose:
+ -- Handles access to external memory.
+ --
+ mem_ctrl: process (res_s, ext_clk_i)
+ begin
+ if res_s = '1' then
+ -- RAMA
+ rama_cs_n_q <= '1';
+ rama_oe_n_q <= '1';
+ rama_we_n_q <= '1';
+ rama_lb_n_q <= '1';
+ rama_ub_n_q <= '1';
+ rama_d_en_q <= '0';
+ -- RAMB
+ ramb_cs_n_q <= '1';
+ ramb_oe_n_q <= '1';
+ ramb_we_n_q <= '1';
+ ramb_lb_n_q <= '1';
+ ramb_ub_n_q <= '1';
+ ramb_d_en_q <= '0';
+ -- Flash
+ fl_cs_n_q <= '1';
+ fl_oe_n_q <= '1';
+ fl_we_n_q <= '1';
+ fl_d_en_q <= '0';
+
+ ack_q <= '0';
+
+ state_q <= IDLE;
+ cnt_q <= (others => '0');
+
+ elsif rising_edge(ext_clk_i) then
+ case state_q is
+ when IDLE =>
+ if strobe_s = '1' then
+ if write_s = '1' then
+ state_q <= WRITE_DRIVE;
+ else
+ state_q <= READ_WAIT;
+ ack_q <= '1';
+ end if;
+
+ case cs_s is
+ -- RAMA
+ when "0001" =>
+ rama_cs_n_q <= '0';
+ rama_lb_n_q <= '0';
+ rama_ub_n_q <= '0';
+ if read_s = '1' then
+ rama_oe_n_q <= '0';
+ end if;
+ if write_s = '1' then
+ rama_d_en_q <= '1';
+ end if;
+
+ -- RAMB
+ when "0010" =>
+ ramb_cs_n_q <= '0';
+ ramb_lb_n_q <= '0';
+ ramb_ub_n_q <= '0';
+ if read_s = '1' then
+ ramb_oe_n_q <= '0';
+ end if;
+ if write_s = '1' then
+ ramb_d_en_q <= '1';
+ end if;
+
+ -- Flash
+ when "0100" =>
+ fl_cs_n_q <= '0';
+ if read_s = '1' then
+ fl_oe_n_q <= '0';
+ -- start counter on read
+ cnt_q <= (others => '1');
+ end if;
+ if write_s = '1' then
+ fl_d_en_q <= '1';
+ end if;
+
+ -- unimlemented / invalid
+ when others =>
+ null;
+
+ end case;
+ end if;
+
+ when READ_WAIT =>
+ if cnt_q = 0 then
+ state_q <= IDLE;
+ ack_q <= '0';
+
+ -- disable all memories
+ rama_cs_n_q <= '1';
+ rama_oe_n_q <= '1';
+ rama_lb_n_q <= '1';
+ rama_ub_n_q <= '1';
+ ramb_cs_n_q <= '1';
+ ramb_oe_n_q <= '1';
+ ramb_lb_n_q <= '1';
+ ramb_ub_n_q <= '1';
+ fl_cs_n_q <= '1';
+ fl_oe_n_q <= '1';
+ end if;
+
+ when WRITE_DRIVE =>
+ state_q <= WRITE_WAIT;
+
+ -- output drivers are active during this state
+ -- thus we can activate the write impulse at the end
+ case cs_s is
+ when "0001" =>
+ rama_we_n_q <= '0';
+ when "0010" =>
+ ramb_we_n_q <= '0';
+ when "0100" =>
+ fl_we_n_q <= '0';
+ -- start counter
+ cnt_q <= (others => '1');
+ when others =>
+ null;
+ end case;
+
+ when WRITE_WAIT =>
+ if cnt_q = 0 then
+ state_q <= WRITE_FINISH;
+ ack_q <= '0';
+
+ -- disable write signals
+ rama_we_n_q <= '1';
+ ramb_we_n_q <= '1';
+ fl_we_n_q <= '1';
+ end if;
+
+ when WRITE_FINISH =>
+ state_q <= IDLE;
+
+ -- disable output enables
+ rama_d_en_q <= '0';
+ ramb_d_en_q <= '0';
+ fl_d_en_q <= '0';
+ -- disable all memories
+ rama_cs_n_q <= '1';
+ rama_oe_n_q <= '1';
+ rama_lb_n_q <= '1';
+ rama_ub_n_q <= '1';
+ ramb_cs_n_q <= '1';
+ ramb_oe_n_q <= '1';
+ ramb_lb_n_q <= '1';
+ ramb_ub_n_q <= '1';
+ fl_cs_n_q <= '1';
+ fl_oe_n_q <= '1';
+
+ when others =>
+ state_q <= IDLE;
+
+ end case;
+
+ if cnt_q /= 0 then
+ cnt_q <= cnt_q - 1;
+ end if;
+
+ end if;
+ end process mem_ctrl;
+ --
+ -----------------------------------------------------------------------------
+
+
+ -----------------------------------------------------------------------------
+ -- An embedded RAM
+ -----------------------------------------------------------------------------
+ en_emb_rams_s <= cs_s(3) and strobe_s;
+ --
+ emb_ram_b : generic_ram_ena
+ generic map (
+ addr_width_g => 8,
+ data_width_g => 8
+ )
+ port map (
+ clk_i => ext_clk_i,
+ a_i => addr_s(7 downto 0),
+ we_i => write_s,
+ ena_i => en_emb_rams_s,
+ d_i => dout_s(7 downto 0),
+ d_o => d_from_emb_ram_s
+ );
+
+
+ -----------------------------------------------------------------------------
+ -- Process read_mux
+ --
+ -- Purpose:
+ -- Read multiplexer from memory to jop_core.
+ --
+ read_mux: process (cs_s,
+ rama_d_b, ramb_d_b, fl_d_b,
+ d_from_emb_ram_s)
+ variable din_v : std_logic_vector(din_s'range);
+ begin
+ din_v := (others => '0');
+
+ if cs_s(0) = '1' then
+ din_v := din_v or rama_d_b;
+ end if;
+ if cs_s(1) = '1' then
+ din_v := din_v or ramb_d_b;
+ end if;
+ if cs_s(2) = '1' then
+ din_v(7 downto 0) := din_v(7 downto 0) or fl_d_b;
+ end if;
+ if cs_s(3) = '1' then
+ din_v(7 downto 0) := din_v(7 downto 0) or d_from_emb_ram_s;
+ end if;
+
+ din_s <= din_v;
+ end process read_mux;
+ --
+ -----------------------------------------------------------------------------
+
+
+ -----------------------------------------------------------------------------
+ -- JOP pin defaults
+ -----------------------------------------------------------------------------
+ -- UART
+ txd_o <= '1';
+ rts_o <= '1';
+ -- RAMA
+ rama_a_o <= addr_s(17 downto 0);
+ rama_d_b <= dout_s
+ when rama_d_en_q = '1' else
+ (others => 'Z');
+ rama_cs_n_o <= rama_cs_n_q;
+ rama_oe_n_o <= rama_oe_n_q;
+ rama_we_n_o <= rama_we_n_q;
+ rama_lb_n_o <= rama_lb_n_q;
+ rama_ub_n_o <= rama_ub_n_q;
+ -- RAMB
+ ramb_a_o <= addr_s(17 downto 0);
+ ramb_d_b <= dout_s
+ when ramb_d_en_q = '1' else
+ (others => 'Z');
+ ramb_cs_n_o <= ramb_cs_n_q;
+ ramb_oe_n_o <= ramb_oe_n_q;
+ ramb_we_n_o <= ramb_we_n_q;
+ ramb_lb_n_o <= ramb_lb_n_q;
+ ramb_ub_n_o <= ramb_ub_n_q;
+ -- Flash
+ fl_a_o <= addr_s(18 downto 0);
+ fl_d_b <= dout_s(7 downto 0)
+ when fl_d_en_q = '1' else
+ (others => 'Z');
+ fl_we_n_o <= fl_we_n_q;
+ fl_oe_n_o <= fl_oe_n_q;
+ fl_cs_n_o <= fl_cs_n_q;
+ fl_cs2_n_o <= '1';
+ -- Misc
+ rgb_r_o <= (others => '0');
+ rgb_g_o <= (others => '0');
+ rgb_b_o <= (others => '0');
+ comp_sync_n_o <= '0';
+ audio_l_o <= '0';
+ audio_r_o <= '0';
+ audio_o <= (others => '0');
+ pad_clk_o <= '0';
+ pad_latch_o <= '0';
+
+end struct;
--- /dev/null
+-------------------------------------------------------------------------------
+--
+-- $Id$
+--
+-- This program is free software; you can redistribute it and/or
+-- modify it under the terms of the GNU General Public License
+-- as published by the Free Software Foundation; either version 2
+-- of the License, or (at your option) any later version.
+--
+-- This program is distributed in the hope that it will be useful,
+-- but WITHOUT ANY WARRANTY; without even the implied warranty of
+-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+-- GNU General Public License for more details.
+--
+-- You should have received a copy of the GNU General Public License
+-- along with this program; if not, write to the Free Software
+-- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+-- 02111-1307, USA.
+--
+-- Written by Arnim Laeuger <arniml@users.sourceforge.net>, 2008.
+--
+-------------------------------------------------------------------------------
+
+library ieee;
+use ieee.std_logic_1164.all;
+
+use work.fjmem_config_pack.all;
+
+package fjmem_pack is
+
+ -----------------------------------------------------------------------------
+ -- Constants that build the shift register
+ --
+ constant shift_instr_pos_c : natural := 0;
+ constant shift_instr_width_c : natural := 3;
+ constant shift_ack_pos_c : natural := shift_instr_pos_c + shift_instr_width_c;
+ constant shift_ack_width_c : natural := 1;
+ constant shift_block_pos_c : natural := shift_ack_pos_c + shift_ack_width_c;
+ constant shift_block_width_c : natural := num_block_field_c;
+ constant shift_addr_pos_c : natural := shift_block_pos_c + shift_block_width_c;
+ constant shift_addr_width_c : natural := max_addr_width_c;
+ constant shift_data_pos_c : natural := shift_addr_pos_c + shift_addr_width_c;
+ constant shift_data_width_c : natural := max_data_width_c;
+ constant shift_width_c : natural := shift_data_pos_c + shift_data_width_c;
+ --
+ subtype instr_range_t is natural range shift_instr_width_c-1 downto 0;
+ subtype block_range_t is natural range shift_block_pos_c+shift_block_width_c-1 downto shift_block_pos_c;
+ subtype addr_range_t is natural range shift_addr_pos_c+shift_addr_width_c-1 downto shift_addr_pos_c;
+ subtype data_range_t is natural range shift_data_pos_c+shift_data_width_c-1 downto shift_data_pos_c;
+ subtype shift_range_t is natural range shift_width_c-1 downto 0;
+ --
+ -----------------------------------------------------------------------------
+
+
+ -----------------------------------------------------------------------------
+ -- Instruction constants
+ --
+ constant instr_idle_c : std_logic_vector(instr_range_t) := "000";
+ constant instr_detect_c : std_logic_vector(instr_range_t) := "111";
+ constant instr_query_c : std_logic_vector(instr_range_t) := "110";
+ constant instr_read_c : std_logic_vector(instr_range_t) := "001";
+ constant instr_write_c : std_logic_vector(instr_range_t) := "010";
+ --
+ -----------------------------------------------------------------------------
+
+end;
--- /dev/null
+-------------------------------------------------------------------------------
+--
+-- $Id$
+--
+-- This program is free software; you can redistribute it and/or
+-- modify it under the terms of the GNU General Public License
+-- as published by the Free Software Foundation; either version 2
+-- of the License, or (at your option) any later version.
+--
+-- This program is distributed in the hope that it will be useful,
+-- but WITHOUT ANY WARRANTY; without even the implied warranty of
+-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+-- GNU General Public License for more details.
+--
+-- You should have received a copy of the GNU General Public License
+-- along with this program; if not, write to the Free Software
+-- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+-- 02111-1307, USA.
+--
+-- Written by Arnim Laeuger <arniml@users.sourceforge.net>, 2008.
+--
+-------------------------------------------------------------------------------
+
+library ieee;
+use ieee.std_logic_1164.all;
+
+entity fjmem_spartan3 is
+
+ port (
+ -- Zefant-DDR FPGA Module Peripherals -----------------------------------
+ -- Clock oscillator
+ osc1 : in std_logic;
+
+ -- Flash Memory
+ fl_a : out std_logic_vector(24 downto 0);
+ fl_d : inout std_logic_vector(15 downto 0);
+ fl_ce_n : out std_logic;
+ fl_oe_n : out std_logic;
+ fl_we_n : out std_logic;
+ fl_byte_n : out std_logic;
+ fl_rp_n : out std_logic;
+ fl_sts : in std_logic;
+
+ -- FPGA dedicated/dual purpose pins
+ fpga_cs_b : inout std_logic;
+ fpga_dout_busy : inout std_logic;
+ fpga_init_b : inout std_logic;
+ fpga_rdwr_b : inout std_logic;
+
+ fpga_cpld_io : inout std_logic_vector(7 downto 0);
+
+ -- SRAM 0
+ sr0_a : out std_logic_vector(17 downto 0);
+ sr0_d : inout std_logic_vector(15 downto 0);
+ sr0_ce_n : out std_logic;
+ sr0_lb_n : out std_logic;
+ sr0_oe_n : out std_logic;
+ sr0_ub_n : out std_logic;
+ sr0_we_n : out std_logic;
+ -- SRAM 1
+ sr1_a : out std_logic_vector(17 downto 0);
+ sr1_d : inout std_logic_vector(15 downto 0);
+ sr1_ce_n : out std_logic;
+ sr1_lb_n : out std_logic;
+ sr1_oe_n : out std_logic;
+ sr1_ub_n : out std_logic;
+ sr1_we_n : out std_logic;
+
+ -- Zefant-XS3 Baseboard Peripherals -----------------------------------
+ -- EEPROM
+ ee_cs_n : out std_logic;
+ ee_sck : out std_logic;
+ ee_si : out std_logic;
+ ee_so : in std_logic;
+
+ -- User Interface
+ button : in std_logic_vector(5 downto 0);
+ led : out std_logic_vector(5 downto 0);
+
+ -- Audio Codec
+ aud_sdata_in : in std_logic;
+ aud_sdata_out : out std_logic;
+ aud_bit_clk : in std_logic;
+ aud_cin : out std_logic;
+ aud_reset_n : out std_logic;
+ aud_sync : out std_logic;
+
+ -- Video DAC
+ vid_blank : out std_logic;
+ vid_clk : out std_logic;
+ vid_r : out std_logic_vector(7 downto 0);
+ vid_g : out std_logic_vector(7 downto 0);
+ vid_b : out std_logic_vector(7 downto 0);
+ vid_hsync : out std_logic;
+ vid_psave_n : out std_logic;
+ vid_sync_n : out std_logic;
+ vid_vsync : out std_logic;
+
+ -- Extension Connectors
+ x301 : inout std_logic_vector(19 downto 2);
+ x303 : inout std_logic_vector(30 downto 1);
+
+ -- RS 232
+ rs232_rxd : in std_logic_vector(1 downto 0);
+ rs232_txd : out std_logic_vector(1 downto 0);
+ rs232_cts : in std_logic_vector(1 downto 0);
+ rs232_rts : out std_logic_vector(1 downto 0);
+
+ -- USB
+ usb_rcv : in std_logic;
+ usb_vp : in std_logic;
+ usb_vm : in std_logic;
+ usb_vbus : in std_logic;
+ usb_oe_n : out std_logic;
+ usb_softcon : out std_logic;
+ usb_suspnd : out std_logic;
+ usb_vmo : out std_logic;
+ usb_vpo : out std_logic
+ );
+
+end fjmem_spartan3;
+
+
+library ieee;
+use ieee.numeric_std.all;
+
+use work.fjmem_config_pack.all;
+
+architecture struct of fjmem_spartan3 is
+
+ component fjmem_core
+ port (
+ clkdr_i : in std_logic;
+ trst_i : in std_logic;
+ shift_i : in std_logic;
+ update_i : in std_logic;
+ tdi_i : in std_logic;
+ tdo_o : out std_logic;
+ clk_i : in std_logic;
+ res_i : in std_logic;
+ strobe_o : out std_logic;
+ read_o : out std_logic;
+ write_o : out std_logic;
+ ack_i : in std_logic;
+ cs_o : out std_logic_vector(num_blocks_c-1 downto 0);
+ addr_o : out std_logic_vector(max_addr_width_c-1 downto 0);
+ din_i : in std_logic_vector(max_data_width_c-1 downto 0);
+ dout_o : out std_logic_vector(max_data_width_c-1 downto 0)
+ );
+ end component;
+
+ component BSCAN_SPARTAN3
+ port (
+ CAPTURE : out std_ulogic := 'H';
+ DRCK1 : out std_ulogic := 'L';
+ DRCK2 : out std_ulogic := 'L';
+ RESET : out std_ulogic := 'L';
+ SEL1 : out std_ulogic := 'L';
+ SEL2 : out std_ulogic := 'L';
+ SHIFT : out std_ulogic := 'L';
+ TDI : out std_ulogic := 'L';
+ UPDATE : out std_ulogic := 'L';
+ TDO1 : in std_ulogic := 'X';
+ TDO2 : in std_ulogic := 'X'
+ );
+ end component;
+
+
+ component generic_ram_ena
+ generic (
+ addr_width_g : integer := 10;
+ data_width_g : integer := 8
+ );
+ port (
+ clk_i : in std_logic;
+ a_i : in std_logic_vector(addr_width_g-1 downto 0);
+ we_i : in std_logic;
+ ena_i : in std_logic;
+ d_i : in std_logic_vector(data_width_g-1 downto 0);
+ d_o : out std_logic_vector(data_width_g-1 downto 0)
+ );
+ end component;
+
+ signal tdi_s,
+ tdo_s : std_logic;
+ signal clkdr_s,
+ trst_s,
+ shift_s,
+ update_s : std_logic;
+
+ signal addr_s : std_logic_vector(max_addr_width_c-1 downto 0);
+ signal din_s,
+ dout_s : std_logic_vector(max_data_width_c-1 downto 0);
+
+ signal res_s : std_logic;
+
+ signal read_s,
+ write_s,
+ strobe_s : std_logic;
+ signal cs_s : std_logic_vector(3 downto 0);
+ signal ack_q : std_logic;
+
+ type state_t is (IDLE,
+ READ_WAIT,
+ WRITE_DRIVE,
+ WRITE_WAIT,
+ WRITE_FINISH);
+ signal state_q : state_t;
+
+ signal cnt_q : unsigned(2 downto 0);
+
+ signal fl_ce_n_q,
+ fl_oe_n_q,
+ fl_we_n_q,
+ fl_d_en_q : std_logic;
+ signal sr0_ce_n_q,
+ sr0_oe_n_q,
+ sr0_we_n_q,
+ sr0_lb_n_q,
+ sr0_ub_n_q,
+ sr0_d_en_q : std_logic;
+ signal sr1_ce_n_q,
+ sr1_oe_n_q,
+ sr1_we_n_q,
+ sr1_lb_n_q,
+ sr1_ub_n_q,
+ sr1_d_en_q : std_logic;
+
+ signal en_emb_rams_s : std_logic;
+ signal d_from_emb_ram_s : std_logic_vector(7 downto 0);
+
+ signal vss_s : std_logic;
+
+begin
+
+ vss_s <= '0';
+ res_s <= '0';
+
+
+ bscan_spartan3_b : BSCAN_SPARTAN3
+ port map (
+ CAPTURE => open,
+ DRCK1 => clkdr_s,
+ DRCK2 => open,
+ RESET => open, --trst_s,
+ SEL1 => open,
+ SEL2 => open,
+ SHIFT => shift_s,
+ TDI => tdi_s,
+ UPDATE => update_s,
+ TDO1 => tdo_s,
+ TDO2 => vss_s
+ );
+ trst_s <= '0';
+
+
+ fjmem_core_b : fjmem_core
+ port map (
+ clkdr_i => clkdr_s,
+ trst_i => trst_s,
+ shift_i => shift_s,
+ update_i => update_s,
+ tdi_i => tdi_s,
+ tdo_o => tdo_s,
+ clk_i => osc1,
+ res_i => res_s,
+ strobe_o => strobe_s,
+ read_o => read_s,
+ write_o => write_s,
+ ack_i => ack_q,
+ cs_o => cs_s,
+ addr_o => addr_s,
+ din_i => din_s,
+ dout_o => dout_s
+ );
+
+
+ -----------------------------------------------------------------------------
+ -- Process mem_ctrl
+ --
+ -- Purpose:
+ -- Handles access to external memory.
+ --
+ mem_ctrl: process (res_s, osc1)
+ begin
+ if res_s = '1' then
+ -- Flash
+ fl_ce_n_q <= '1';
+ fl_oe_n_q <= '1';
+ fl_we_n_q <= '1';
+ fl_d_en_q <= '0';
+ -- RAM0
+ sr0_ce_n_q <= '1';
+ sr0_oe_n_q <= '1';
+ sr0_we_n_q <= '1';
+ sr0_lb_n_q <= '1';
+ sr0_ub_n_q <= '1';
+ sr0_d_en_q <= '0';
+ -- RAM1
+ sr1_ce_n_q <= '1';
+ sr1_oe_n_q <= '1';
+ sr1_we_n_q <= '1';
+ sr1_lb_n_q <= '1';
+ sr1_ub_n_q <= '1';
+ sr1_d_en_q <= '0';
+
+ ack_q <= '0';
+
+ state_q <= IDLE;
+ cnt_q <= (others => '0');
+
+ elsif rising_edge(osc1) then
+ case state_q is
+ when IDLE =>
+ if strobe_s = '1' then
+ if write_s = '1' then
+ state_q <= WRITE_DRIVE;
+ else
+ state_q <= READ_WAIT;
+ ack_q <= '1';
+ end if;
+
+ case cs_s is
+ -- Flash
+ when "0001" =>
+ fl_ce_n_q <= '0';
+ if read_s = '1' then
+ fl_oe_n_q <= '0';
+ -- start counter on read
+ cnt_q <= (others => '1');
+ end if;
+ if write_s = '1' then
+ fl_d_en_q <= '1';
+ end if;
+
+ -- RAM0
+ when "0010" =>
+ sr0_ce_n_q <= '0';
+ sr0_lb_n_q <= '0';
+ sr0_ub_n_q <= '0';
+ if read_s = '1' then
+ sr0_oe_n_q <= '0';
+ -- start counter on read
+ cnt_q <= (others => '1');
+ end if;
+ if write_s = '1' then
+ sr0_d_en_q <= '1';
+ end if;
+
+ -- RAM1
+ when "0100" =>
+ sr1_ce_n_q <= '0';
+ sr1_lb_n_q <= '0';
+ sr1_ub_n_q <= '0';
+ if read_s = '1' then
+ sr1_oe_n_q <= '0';
+ -- start counter on read
+ cnt_q <= (others => '1');
+ end if;
+ if write_s = '1' then
+ sr1_d_en_q <= '1';
+ end if;
+
+ -- unimlemented / invalid
+ when others =>
+ null;
+
+ end case;
+ end if;
+
+ when READ_WAIT =>
+ if cnt_q = 0 then
+ state_q <= IDLE;
+ ack_q <= '0';
+
+ -- disable all memories
+ fl_ce_n_q <= '1';
+ fl_oe_n_q <= '1';
+ sr0_ce_n_q <= '1';
+ sr0_oe_n_q <= '1';
+ sr0_lb_n_q <= '1';
+ sr0_ub_n_q <= '1';
+ sr1_ce_n_q <= '1';
+ sr1_oe_n_q <= '1';
+ sr1_lb_n_q <= '1';
+ sr1_ub_n_q <= '1';
+ end if;
+
+ when WRITE_DRIVE =>
+ state_q <= WRITE_WAIT;
+
+ -- output drivers are active during this state
+ -- thus we can activate the write impulse at the end
+ case cs_s is
+ when "0001" =>
+ fl_we_n_q <= '0';
+ -- start counter
+ cnt_q <= (others => '1');
+ when "0010" =>
+ sr0_we_n_q <= '0';
+ -- start counter
+ cnt_q <= (others => '1');
+ when "0100" =>
+ sr1_we_n_q <= '0';
+ -- start counter
+ cnt_q <= (others => '1');
+ when others =>
+ null;
+ end case;
+
+ when WRITE_WAIT =>
+ if cnt_q = 0 then
+ state_q <= WRITE_FINISH;
+ ack_q <= '0';
+
+ -- disable write signals
+ fl_we_n_q <= '1';
+ sr0_we_n_q <= '1';
+ sr1_we_n_q <= '1';
+ end if;
+
+ when WRITE_FINISH =>
+ state_q <= IDLE;
+
+ -- disable output enables
+ fl_d_en_q <= '0';
+ sr0_d_en_q <= '0';
+ sr1_d_en_q <= '0';
+ -- disable all memories
+ fl_ce_n_q <= '1';
+ fl_oe_n_q <= '1';
+ sr0_ce_n_q <= '1';
+ sr0_oe_n_q <= '1';
+ sr0_lb_n_q <= '1';
+ sr0_ub_n_q <= '1';
+ sr1_ce_n_q <= '1';
+ sr1_oe_n_q <= '1';
+ sr1_lb_n_q <= '1';
+ sr1_ub_n_q <= '1';
+
+ when others =>
+ state_q <= IDLE;
+
+ end case;
+
+ if cnt_q /= 0 then
+ cnt_q <= cnt_q - 1;
+ end if;
+
+ end if;
+ end process mem_ctrl;
+ --
+ -----------------------------------------------------------------------------
+
+
+ -----------------------------------------------------------------------------
+ -- An embedded RAM
+ -----------------------------------------------------------------------------
+ en_emb_rams_s <= cs_s(3) and strobe_s;
+ --
+ emb_ram_b : generic_ram_ena
+ generic map (
+ addr_width_g => 8,
+ data_width_g => 8
+ )
+ port map (
+ clk_i => osc1,
+ a_i => addr_s(7 downto 0),
+ we_i => write_s,
+ ena_i => en_emb_rams_s,
+ d_i => dout_s(7 downto 0),
+ d_o => d_from_emb_ram_s
+ );
+
+
+ -----------------------------------------------------------------------------
+ -- Process read_mux
+ --
+ -- Purpose:
+ -- Read multiplexer from memory to jop_core.
+ --
+ read_mux: process (cs_s,
+ fl_d, sr0_d, sr1_d,
+ d_from_emb_ram_s)
+ variable din_v : std_logic_vector(din_s'range);
+ begin
+ din_v := (others => '0');
+
+ if cs_s(0) = '1' then
+ din_v := din_v or fl_d;
+ end if;
+ if cs_s(1) = '1' then
+ din_v := din_v or sr0_d;
+ end if;
+ if cs_s(2) = '1' then
+ din_v := din_v or sr1_d;
+ end if;
+ if cs_s(3) = '1' then
+ din_v(7 downto 0) := din_v(7 downto 0) or d_from_emb_ram_s;
+ end if;
+
+ din_s <= din_v;
+ end process read_mux;
+ --
+ -----------------------------------------------------------------------------
+
+
+ -----------------------------------------------------------------------------
+ -- Pin defaults
+ -----------------------------------------------------------------------------
+ -- Flash Memory -------------------------------------------------------------
+ fl_addr: process (addr_s)
+ begin
+ fl_a <= (others => '0');
+ fl_a(24 downto 1) <= addr_s;
+ end process fl_addr;
+ fl_d <= dout_s
+ when fl_d_en_q = '1' else
+ (others => 'Z');
+ fl_ce_n <= fl_ce_n_q;
+ fl_oe_n <= fl_oe_n_q;
+ fl_we_n <= fl_we_n_q;
+ fl_byte_n <= '1';
+ fl_rp_n <= '1';
+
+ fpga_cs_b <= 'Z';
+ fpga_dout_busy <= 'Z';
+ fpga_init_b <= 'Z';
+ fpga_rdwr_b <= 'Z';
+
+ fpga_cpld_io(7 downto 2) <= (others => 'Z');
+
+-- cpld_clk <= '0';
+ -- same pin assigned clkd_clk <=> x303(30)
+ x303(30) <= '0';
+
+ -- SRAMs in SO-DIMM Socket --------------------------------------------------
+ sr0_a <= addr_s(17 downto 0);
+ sr0_d <= dout_s
+ when sr0_d_en_q = '1' else
+ (others => 'Z');
+ sr0_ce_n <= sr0_ce_n_q;
+ sr0_lb_n <= sr0_lb_n_q;
+ sr0_oe_n <= sr0_oe_n_q;
+ sr0_ub_n <= sr0_ub_n_q;
+ sr0_we_n <= sr0_we_n_q;
+ sr1_a <= addr_s(17 downto 0);
+ sr1_d <= dout_s
+ when sr1_d_en_q = '1' else
+ (others => 'Z');
+ sr1_ce_n <= sr1_ce_n_q;
+ sr1_lb_n <= sr1_lb_n_q;
+ sr1_oe_n <= sr1_oe_n_q;
+ sr1_ub_n <= sr1_ub_n_q;
+ sr1_we_n <= sr1_we_n_q;
+
+ -- Baseboard EEPROM ---------------------------------------------------------
+ ee_cs_n <= '1';
+ ee_sck <= '0';
+ ee_si <= '0';
+
+ -- User Interface -----------------------------------------------------------
+ led <= (others => '0');
+
+ -- Audio Codec --------------------------------------------------------------
+ aud_sdata_out <= '0';
+ aud_cin <= '0';
+ aud_reset_n <= '0';
+ aud_sync <= '0';
+
+ -- Video DAC ----------------------------------------------------------------
+ vid_blank <= '1';
+ vid_clk <= '0';
+ vid_r <= (others => '0');
+ vid_g <= (others => '0');
+ vid_b <= (others => '0');
+ vid_hsync <= '0';
+ vid_psave_n <= '1';
+ vid_sync_n <= '0';
+ vid_vsync <= '0';
+
+ -- Extension Connectors -----------------------------------------------------
+ x301 <= (others => 'Z');
+ x303 <= (others => 'Z');
+
+ -- RS 232 -------------------------------------------------------------------
+ rs232_txd <= (others => '1');
+ rs232_rts <= (others => '1');
+
+ -- USB ----------------------------------------------------------------------
+ usb_oe_n <= '1';
+ usb_softcon <= '0';
+ usb_suspnd <= '1';
+ usb_vmo <= '0';
+ usb_vpo <= '1';
+
+end struct;
--- /dev/null
+-------------------------------------------------------------------------------
+--
+-- Parametrizable, generic RAM with enable.
+--
+-- $Id$
+--
+-- Copyright (c) 2006 Arnim Laeuger (arniml@opencores.org)
+--
+-- All rights reserved
+--
+-- Redistribution and use in source and synthezised forms, with or without
+-- modification, are permitted provided that the following conditions are met:
+--
+-- Redistributions of source code must retain the above copyright notice,
+-- this list of conditions and the following disclaimer.
+--
+-- Redistributions in synthesized form must reproduce the above copyright
+-- notice, this list of conditions and the following disclaimer in the
+-- documentation and/or other materials provided with the distribution.
+--
+-- Neither the name of the author nor the names of other contributors may
+-- be used to endorse or promote products derived from this software without
+-- specific prior written permission.
+--
+-- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+-- AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+-- THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+-- PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE
+-- LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+-- CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+-- SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+-- INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+-- CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+-- ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+-- POSSIBILITY OF SUCH DAMAGE.
+--
+-- Please report bugs to the author, but before you do so, please
+-- make sure that this is not a derivative work and that
+-- you have the latest version of this file.
+--
+-- The latest version of this file can be found at:
+-- http://www.opencores.org/cvsweb.shtml/t48/
+--
+-------------------------------------------------------------------------------
+
+library ieee;
+use ieee.std_logic_1164.all;
+
+entity generic_ram_ena is
+
+ generic (
+ addr_width_g : integer := 10;
+ data_width_g : integer := 8
+ );
+ port (
+ clk_i : in std_logic;
+ a_i : in std_logic_vector(addr_width_g-1 downto 0);
+ we_i : in std_logic;
+ ena_i : in std_logic;
+ d_i : in std_logic_vector(data_width_g-1 downto 0);
+ d_o : out std_logic_vector(data_width_g-1 downto 0)
+ );
+
+end generic_ram_ena;
+
+
+library ieee;
+use ieee.numeric_std.all;
+
+architecture rtl of generic_ram_ena is
+
+ type mem_t is array (natural range 0 to 2**addr_width_g-1) of
+ std_logic_vector(d_i'range);
+ signal mem_q : mem_t
+ -- pragma translate_off
+ := (others => (others => '0'))
+ -- pragma translate_on
+ ;
+ signal a_q : std_logic_vector(a_i'range);
+
+begin
+
+ mem: process (clk_i)
+ begin
+
+ if clk_i'event and clk_i = '1' then
+ if ena_i = '1' then
+ if we_i = '1' then
+ mem_q(to_integer(unsigned(a_i))) <= d_i;
+ end if;
+
+ a_q <= a_i;
+ end if;
+
+ d_o <= mem_q(to_integer(unsigned(a_i)));
+ end if;
+ end process mem;
+
+end rtl;
--- /dev/null
+Makefile
+Makefile.in
--- /dev/null
+#
+# $Id$
+#
+# Copyright (C) 2002 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Marcel Telka <marcel@telka.sk>, 2002.
+#
+
+include $(top_srcdir)/Makefile.rules
+
+noinst_HEADERS = \
+ bsbit.h \
+ bsdl.h \
+ bsdl_mode.h \
+ bitmask.h \
+ bus.h \
+ bus_driver.h \
+ cable.h \
+ chain.h \
+ data_register.h \
+ cmd.h \
+ flash.h \
+ flash/cfi.h \
+ flash/mic.h \
+ flash/intel.h \
+ gettext.h \
+ instruction.h \
+ parport.h \
+ part.h \
+ register.h \
+ bssignal.h \
+ state.h \
+ jtag.h \
+ tap.h \
+ fclock.h \
+ jim.h \
+ jim/some_cpu.h \
+ pod.h \
+ svf.h \
+ usbconn.h \
+ usbconn/libftdx.h \
+ usbconn/libusb.h \
+ xpcu.h
--- /dev/null
+/*
+ * $Id$
+ *
+ * Common header file
+ * Copyright (C) 2002 ETC s.r.o.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the ETC s.r.o. nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2002.
+ *
+ */
+
+#ifndef COMMON_H
+#define COMMON_H
+
+#ifndef LANGUAGE
+# ifdef __ASSEMBLY__
+# define LANGUAGE ASM
+# else
+# define LANGUAGE C
+# endif
+#endif
+
+#ifndef ASM
+#define ASM 0
+#endif
+
+#ifndef C
+#define C 1
+#endif
+
+#define MAX_BITS_ABS_VAL 1024
+#define BITS_ABS(a) (((((a) + MAX_BITS_ABS_VAL) / MAX_BITS_ABS_VAL) * 2 - 1) * (a))
+#define BITS_MIN(a,b) (((a) + (b) - BITS_ABS((a) - (b))) / 2)
+
+#define bit(b) (1 << (b))
+#define bits(b1,b2) (((2 << BITS_ABS((b1) - (b2))) - 1) << BITS_MIN(b1,b2))
+#define bits_val(b1,b2,v) (((v) << BITS_MIN(b1,b2)) & bits(b1,b2))
+#define bits_get(b1,b2,v) (((v) & bits(b1,b2)) >> BITS_MIN(b1,b2))
+
+#endif /* COMMON_H */
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2002 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2002.
+ *
+ */
+
+#ifndef BSBIT_H
+#define BSBIT_H
+
+typedef struct bsbit bsbit_t;
+
+#include "bssignal.h"
+
+#define BSBIT_INPUT 1
+#define BSBIT_OUTPUT 2
+#define BSBIT_CONTROL 3
+#define BSBIT_INTERNAL 4
+#define BSBIT_BIDIR 5
+
+#define BSBIT_STATE_Z (-1)
+
+struct bsbit {
+ int bit;
+ char *name;
+ int type;
+ signal_t *signal;
+ int safe; /* safe value */
+ int control; /* -1 for none */
+ int control_value;
+ int control_state;
+};
+
+bsbit_t *bsbit_alloc( int bit, const char *name, int type, signal_t *signal, int safe );
+void bsbit_free( bsbit_t *b );
+
+#endif /* BSBIT_H */
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2007, Arnim Laeuger
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Arnim Laeuger <arniml@users.sourceforge.net>, 2007.
+ *
+ */
+
+#ifndef BSDL_H
+#define BSDL_H
+
+#include <bsdl_mode.h>
+
+typedef struct {
+ char **path_list;
+ int debug;
+} bsdl_globs_t;
+
+#define BSDL_GLOBS_INIT(bsdl) {\
+ bsdl.path_list = NULL;\
+ bsdl.debug = 0;\
+}
+
+#include "chain.h"
+
+int bsdl_read_file(chain_t *, const char *, int, const char *);
+void bsdl_set_path(chain_t *, const char *);
+int bsdl_scan_files(chain_t *, const char *, int);
+
+#endif /* BSDL_H */
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2008, Arnim Laeuger
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Arnim Laeuger <arniml@users.sourceforge.net>, 2008.
+ *
+ */
+
+#ifndef BSDL_MODE_H
+#define BSDL_MODE_H
+
+#define BSDL_MODE_MSG_NOTE (1 << 0)
+#define BSDL_MODE_MSG_WARN (1 << 1)
+#define BSDL_MODE_MSG_ERR (1 << 2)
+#define BSDL_MODE_MSG_FATAL (1 << 3)
+
+#define BSDL_MODE_MSG_ALL (BSDL_MODE_MSG_FATAL | \
+ BSDL_MODE_MSG_ERR | \
+ BSDL_MODE_MSG_WARN | \
+ BSDL_MODE_MSG_NOTE)
+#define BSDL_MODE_MSG_ALWAYS BSDL_MODE_MSG_FATAL
+
+#define BSDL_MODE_SYN_CHECK (1 << 4)
+#define BSDL_MODE_INSTR_PRINT (1 << 5)
+#define BSDL_MODE_INSTR_EXEC (1 << 6)
+#define BSDL_MODE_IDCODE_CHECK (1 << 7)
+#define BSDL_MODE_ACTION_ALL (BSDL_MODE_SYN_CHECK | \
+ BSDL_MODE_INSTR_PRINT | \
+ BSDL_MODE_INSTR_EXEC | \
+ BSDL_MODE_IDCODE_CHECK)
+
+#define BSDL_MODE_INCLUDE1 (BSDL_MODE_MSG_ALWAYS)
+#define BSDL_MODE_INCLUDE2 (BSDL_MODE_SYN_CHECK | \
+ BSDL_MODE_INSTR_EXEC | \
+ BSDL_MODE_MSG_WARN | \
+ BSDL_MODE_MSG_ERR | \
+ BSDL_MODE_MSG_FATAL)
+#define BSDL_MODE_DETECT (BSDL_MODE_SYN_CHECK | \
+ BSDL_MODE_INSTR_EXEC | \
+ BSDL_MODE_IDCODE_CHECK | \
+ BSDL_MODE_MSG_ALWAYS)
+#define BSDL_MODE_TEST (BSDL_MODE_SYN_CHECK | \
+ BSDL_MODE_MSG_ALL)
+#define BSDL_MODE_DUMP (BSDL_MODE_SYN_CHECK | \
+ BSDL_MODE_INSTR_PRINT | \
+ BSDL_MODE_MSG_WARN | \
+ BSDL_MODE_MSG_ERR | \
+ BSDL_MODE_MSG_FATAL)
+
+#endif /* BSDL_MODE_H */
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2002 ETC s.r.o.
+ * Copyright (C) 2003 Marcel Telka
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2002, 2003.
+ *
+ */
+
+#ifndef SIGNAL_H
+#define SIGNAL_H
+
+typedef struct signal signal_t;
+
+#include "bsbit.h"
+
+struct signal {
+ char *name;
+ char *pin; /* djf hack pin number from bsdl */
+ signal_t *next;
+ bsbit_t *input;
+ bsbit_t *output;
+};
+
+typedef struct salias salias_t;
+
+struct salias {
+ char *name;
+ salias_t *next;
+ signal_t *signal;
+};
+
+signal_t *signal_alloc( const char *name );
+void signal_free( signal_t *s );
+
+salias_t *salias_alloc( const char *name, const signal_t *signal );
+void salias_free( salias_t *salias );
+
+#endif /* SIGNAL_H */
--- /dev/null
+/*
+ * $Id$
+ *
+ * Bus driver interface
+ * Copyright (C) 2002 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2002.
+ *
+ */
+
+#ifndef BUS_H
+#define BUS_H
+
+#include <stdint.h>
+
+#include <bus_driver.h>
+
+typedef struct {
+ int len;
+ bus_t **buses;
+} buses_t;
+
+extern buses_t buses;
+extern const bus_driver_t *bus_drivers[];
+
+void buses_free( void );
+void buses_add( bus_t *abus );
+void buses_delete( bus_t *abus );
+
+#endif /* BUS_H */
--- /dev/null
+/*
+ * $Id$
+ *
+ * Bus driver interface
+ * Copyright (C) 2002, 2003 ETC s.r.o.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the ETC s.r.o. nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2002, 2003.
+ *
+ */
+
+#ifndef BRUX_BUS_H
+#define BRUX_BUS_H
+
+#include <stdint.h>
+
+#include "chain.h"
+
+typedef struct {
+ const char *description;
+ uint32_t start;
+ uint64_t length;
+ unsigned int width;
+} bus_area_t;
+
+typedef struct bus bus_t;
+typedef struct bus_driver bus_driver_t;
+
+struct bus_driver {
+ const char *name;
+ const char *description;
+ bus_t *(*new_bus)( chain_t *chain, const bus_driver_t *driver, char *cmd_params[] );
+ void (*free_bus)( bus_t *bus );
+ void (*printinfo)( bus_t *bus );
+ void (*prepare)( bus_t *bus );
+ int (*area)( bus_t *bus, uint32_t adr, bus_area_t *area );
+ void (*read_start)( bus_t *bus, uint32_t adr );
+ uint32_t (*read_next)( bus_t *bus, uint32_t adr );
+ uint32_t (*read_end)( bus_t *bus );
+ uint32_t (*read)( bus_t *bus, uint32_t adr );
+ void (*write)( bus_t *bus, uint32_t adr, uint32_t data );
+ int (*init) (bus_t *bus);
+};
+
+struct bus {
+ chain_t *chain;
+ part_t *part;
+ void *params;
+ int initialized;
+ const bus_driver_t *driver;
+};
+
+extern bus_t *bus;
+
+#define CHAIN bus->chain
+#define PART bus->part
+#define INITIALIZED bus->initialized
+
+#define bus_printinfo(bus) bus->driver->printinfo(bus)
+#define bus_prepare(bus) bus->driver->prepare(bus)
+#define bus_area(bus,adr,a) bus->driver->area(bus,adr,a)
+#define bus_read_start(bus,adr) bus->driver->read_start(bus,adr)
+#define bus_read_next(bus,adr) bus->driver->read_next(bus,adr)
+#define bus_read_end(bus) bus->driver->read_end(bus)
+#define bus_read(bus,adr) bus->driver->read(bus,adr)
+#define bus_write(bus,adr,data) bus->driver->write(bus,adr,data)
+#define bus_free(bus) bus->driver->free_bus(bus)
+#define bus_init(bus) bus->driver->init(bus)
+
+#endif /* BRUX_BUS_H */
--- /dev/null
+/*
+ * $Id$
+ *
+ * Cable driver interface
+ * Copyright (C) 2003 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2003.
+ *
+ */
+
+#ifndef CABLE_H
+#define CABLE_H
+
+#include <stdint.h>
+
+typedef struct cable_t cable_t;
+
+#include "usbconn.h"
+#include "parport.h"
+#include "chain.h"
+#include "pod.h"
+
+typedef struct cable_driver_t cable_driver_t;
+
+typedef enum
+{
+ OPTIONALLY,
+ TO_OUTPUT,
+ COMPLETELY
+}
+cable_flush_amount_t;
+
+struct cable_driver_t {
+ const char *name;
+ const char *description;
+ int (*connect)( char *params[], cable_t *cable );
+ void (*disconnect)( cable_t *cable );
+ void (*cable_free)( cable_t *cable );
+ int (*init)( cable_t * );
+ void (*done)( cable_t * );
+ void (*set_frequency)( cable_t *, uint32_t freq );
+ void (*clock)( cable_t *, int, int, int );
+ int (*get_tdo)( cable_t * );
+ int (*transfer)( cable_t *, int, char *, char * );
+ int (*set_signal)( cable_t *, int, int );
+ int (*get_signal)( cable_t *, pod_sigsel_t );
+ void (*flush)( cable_t *, cable_flush_amount_t );
+ void (*help)( const char * );
+};
+
+typedef struct cable_queue_t cable_queue_t;
+
+struct cable_queue_t {
+ enum {
+ CABLE_CLOCK,
+ CABLE_GET_TDO,
+ CABLE_TRANSFER,
+ CABLE_SET_SIGNAL,
+ CABLE_GET_SIGNAL
+ } action;
+ union {
+ struct {
+ int tms;
+ int tdi;
+ int n;
+ } clock;
+ struct {
+ pod_sigsel_t sig;
+ int mask;
+ int val;
+ } value;
+ struct {
+ int len;
+ char *in;
+ char *out;
+ } transfer;
+ struct {
+ int len;
+ int res;
+ char *out;
+ } xferred;
+ } arg;
+};
+
+typedef struct cable_queue_info_t cable_queue_info_t;
+
+struct cable_queue_info_t {
+ cable_queue_t *data;
+ int max_items;
+ int num_items;
+ int next_item;
+ int next_free;
+};
+
+struct cable_t {
+ cable_driver_t *driver;
+ union {
+ usbconn_t *usb;
+ parport_t *port;
+ } link;
+ void *params;
+ chain_t *chain;
+ cable_queue_info_t todo;
+ cable_queue_info_t done;
+ uint32_t delay;
+ uint32_t frequency;
+};
+
+void cable_free( cable_t *cable );
+int cable_init( cable_t *cable );
+void cable_done( cable_t *cable );
+void cable_flush( cable_t *cable, cable_flush_amount_t );
+void cable_clock( cable_t *cable, int tms, int tdi, int n );
+ int cable_defer_clock( cable_t *cable, int tms, int tdi, int n );
+int cable_get_tdo( cable_t *cable );
+ int cable_get_tdo_late( cable_t *cable );
+ int cable_defer_get_tdo( cable_t *cable );
+int cable_set_signal( cable_t *cable, int mask, int val );
+ int cable_defer_set_signal( cable_t *cable, int mask, int val );
+int cable_get_signal( cable_t *cable, pod_sigsel_t sig );
+ int cable_get_signal_late( cable_t *cable, pod_sigsel_t sig );
+ int cable_defer_get_signal( cable_t *cable, pod_sigsel_t sig );
+int cable_transfer( cable_t *cable, int len, char *in, char *out );
+ int cable_transfer_late( cable_t *cable, char *out );
+ int cable_defer_transfer( cable_t *cable, int len, char *in, char *out );
+
+void cable_set_frequency( cable_t *cable, uint32_t frequency );
+uint32_t cable_get_frequency( cable_t *cable );
+void cable_wait( cable_t *cable );
+void cable_purge_queue( cable_queue_info_t *q, int io );
+int cable_add_queue_item( cable_t *cable, cable_queue_info_t *q );
+int cable_get_queue_item( cable_t *cable, cable_queue_info_t *q );
+
+extern cable_driver_t *cable_drivers[];
+
+#endif /* CABLE_H */
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2003 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2003.
+ *
+ */
+
+#ifndef CHAIN_H
+#define CHAIN_H
+
+#include "part.h"
+#include "pod.h"
+
+typedef struct chain_t chain_t;
+
+#include "cable.h"
+#include "bsdl.h"
+
+#define EXITMODE_SHIFT 0
+#define EXITMODE_IDLE 1
+#define EXITMODE_EXIT1 2
+#define EXITMODE_UPDATE 3
+
+struct chain_t {
+ int state;
+ parts_t *parts;
+ int total_instr_len;
+ int active_part;
+ cable_t *cable;
+ bsdl_globs_t bsdl;
+};
+
+chain_t *chain_alloc( void );
+void chain_free( chain_t *chain );
+void chain_disconnect( chain_t *chain );
+void chain_clock( chain_t *chain, int tms, int tdi, int n );
+void chain_defer_clock( chain_t *chain, int tms, int tdi, int n );
+int chain_set_trst( chain_t *chain, int trst );
+int chain_get_trst( chain_t *chain );
+void chain_shift_instructions( chain_t *chain );
+void chain_shift_instructions_mode( chain_t *chain, int capture_output, int capture, int chain_exit );
+void chain_shift_data_registers( chain_t *chain, int capture_output );
+void chain_shift_data_registers_mode( chain_t *chain, int capture_output, int capture, int chain_exit );
+void chain_flush( chain_t *chain );
+int chain_set_pod_signal( chain_t *chain, int mask, int val );
+int chain_get_pod_signal( chain_t *chain, pod_sigsel_t sig );
+
+typedef struct {
+ chain_t **chains;
+ int size; /* allocated chains array size */
+} chains_t;
+
+#endif /* CHAIN_H */
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2003 ETC s.r.o.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the ETC s.r.o. nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2003.
+ *
+ */
+
+#ifndef CMD_H
+#define CMD_H
+
+#include "chain.h"
+
+typedef struct {
+ char *name;
+ char *desc;
+ void (*help)( void );
+ int (*run)( chain_t *chain, char *params[] );
+} cmd_t;
+
+extern const cmd_t *cmds[];
+
+char **cmd_completion( const char *text, int start, int end );
+int cmd_run( chain_t *chain, char *params[] );
+int cmd_params( char *params[] );
+int cmd_get_number( char *s, unsigned int *i );
+int cmd_test_cable( chain_t *chain );
+
+#endif /* CMD_H */
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2002 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2002.
+ *
+ */
+
+#ifndef DATA_REGISTER_H
+#define DATA_REGISTER_H
+
+#include "register.h"
+
+#define MAXLEN_DATA_REGISTER 32
+
+typedef struct data_register data_register;
+
+struct data_register {
+ char name[MAXLEN_DATA_REGISTER + 1]; /* (public) register name */
+ tap_register *in; /* (public) register value clocked in */
+ tap_register *out; /* (public) register value clocked out */
+ data_register *next;
+};
+
+data_register *data_register_alloc( const char *name, int len );
+void data_register_free( data_register *dr );
+
+#endif /* DATA_REGISTER_H */
--- /dev/null
+/*
+ * fclock.h
+ *
+ * Copyright (C) 2005 Hein Roehrig
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ */
+
+
+#ifndef FCLOCK_H
+#define FCLOCK_H
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+
+/* return real time in seconds starting at some arbitrary point in
+ time*/
+long double frealtime();
+
+/* return the CPU time used by this process (seconds) */
+long double fcputime();
+
+
+#ifdef __cplusplus
+}
+#endif
+
+
+#endif
+
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2003 ETC s.r.o.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the ETC s.r.o. nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2003.
+ *
+ */
+
+#ifndef FLASH_H
+#define FLASH_H
+
+#include <stdio.h>
+#include <stdint.h>
+
+#include <bus_driver.h>
+
+/* Following moved here from brux/cfi.h */
+
+#include <flash/cfi.h>
+
+typedef struct {
+ int width; /* 1 for 8 bits, 2 for 16 bits, 4 for 32 bits, etc. */
+ cfi_query_structure_t cfi;
+} cfi_chip_t;
+
+typedef struct {
+ bus_t *bus;
+ uint32_t address;
+ int bus_width; /* in cfi_chips, e.g. 4 for 32 bits */
+ cfi_chip_t **cfi_chips;
+} cfi_array_t;
+
+void cfi_array_free( cfi_array_t *cfi_array );
+int cfi_detect( bus_t *bus, uint32_t adr, cfi_array_t **cfi_array );
+
+/* End of brux/cfi.h */
+
+typedef struct {
+ unsigned int bus_width; /* 1 for 8 bits, 2 for 16 bits, 4 for 32 bits, etc. */
+ const char *name;
+ const char *description;
+ int (*autodetect)( cfi_array_t *cfi_array );
+ void (*print_info)( cfi_array_t *cfi_array );
+ int (*erase_block)( cfi_array_t *cfi_array, uint32_t adr );
+ int (*unlock_block)( cfi_array_t *cfi_array, uint32_t adr );
+ int (*program)( cfi_array_t *cfi_array, uint32_t adr, uint32_t *buffer, int count );
+ void (*readarray)( cfi_array_t *cfi_array );
+} flash_driver_t;
+
+#define FLASH_ERROR_NOERROR 0
+#define FLASH_ERROR_INVALID_COMMAND_SEQUENCE 1
+#define FLASH_ERROR_LOW_VPEN 2
+#define FLASH_ERROR_BLOCK_LOCKED 3
+#define FLASH_ERROR_UNKNOWN 99
+
+void detectflash( bus_t *bus, uint32_t adr );
+
+void flashmem( bus_t *bus, FILE *f, uint32_t addr, int );
+void flashmsbin( bus_t *bus, FILE *f, int );
+
+/* end of original brux/flash.h */
+
+extern flash_driver_t *flash_drivers[];
+
+#endif /* FLASH_H */
+
--- /dev/null
+/*
+ * $Id$
+ *
+ * Common Flash Memory Interface (CFI) Declarations
+ * Copyright (C) 2002 ETC s.r.o.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the ETC s.r.o. nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2002.
+ *
+ * Documentation:
+ * [1] JEDEC Solid State Technology Association, "Common Flash Interface (CFI)",
+ * September 1999, Order Number: JESD68
+ * [2] JEDEC Solid State Technology Association, "Common Flash Interface (CFI) ID Codes",
+ * September 2001, Order Number: JEP137-A
+ * [3] AMD, "Common Flash Memory Interface Specification", Release 2.0
+ * December 1, 2001.
+ * [4] SPANSION, "Common Flash Interface Version 1.4 Vendor Specific
+ * Extensions", March 22, 2004.
+ *
+ */
+
+#ifndef FLASH_CFI_H
+#define FLASH_CFI_H
+
+#ifndef __ASSEMBLY__
+#include <stdint.h>
+#endif
+
+/* CFI commands - see Table 1 in [1] */
+
+#define CFI_CMD_READ_ARRAY1 0xFF
+#define CFI_CMD_READ_ARRAY2 0xF0
+#define CFI_CMD_QUERY 0x98
+#define CFI_CMD_QUERY_OFFSET 0x55
+
+/* Query identification string - see 4.3.2 in [1] */
+
+#define CFI_QUERY_ID_OFFSET 0x10
+#define PRI_VENDOR_ID_OFFSET 0x13
+#define PRI_VENDOR_TABLE_ADR_OFFSET 0x15
+#define ALT_VENDOR_ID_OFFSET 0x17
+#define ALT_VENDOR_TABLE_ADR_OFFSET 0x19
+
+#ifndef __ASSEMBLY__
+typedef struct cfi_query_identification_string {
+ uint16_t pri_id_code;
+ void *pri_vendor_tbl;
+ uint16_t alt_id_code;
+ void *alt_vendor_tbl;
+} cfi_query_identification_string_t;
+#endif /* __ASSEMBLY__ */
+
+/* Algorithm command set & control interface ID codes - see Table 1 in [2] */
+
+#define CFI_VENDOR_NULL 0x0000
+#define CFI_VENDOR_INTEL_ECS 0x0001
+#define CFI_VENDOR_AMD_SCS 0x0002
+#define CFI_VENDOR_INTEL_SCS 0x0003
+#define CFI_VENDOR_AMD_ECS 0x0004
+#define CFI_VENDOR_MITSUBISHI_SCS 0x0100
+#define CFI_VENDOR_MITSUBISHI_ECS 0x0101
+#define CFI_VENDOR_SST_PWCS 0x0102
+
+/* Query system interface information - see 4.3.3 in [1] */
+
+#define VCC_MIN_WEV_OFFSET 0x1B /* Vcc Logic Supply Minimum Write/Erase voltage */
+#define VCC_MAX_WEV_OFFSET 0x1C /* Vcc Logic Supply Maximum Write/Erase voltage */
+#define VPP_MIN_WEV_OFFSET 0x1D /* Vpp [Programming] Supply Minimum Write/Erase voltage */
+#define VPP_MAX_WEV_OFFSET 0x1E /* Vpp [Programming] Supply Maximum Write/Erase voltage */
+#define TYP_SINGLE_WRITE_TIMEOUT_OFFSET 0x1F /* Typical timeout per single byte/word write */
+#define TYP_BUFFER_WRITE_TIMEOUT_OFFSET 0x20 /* Typical timeout for minimum-size buffer write */
+#define TYP_BLOCK_ERASE_TIMEOUT_OFFSET 0x21 /* Typical timeout per individual block erase */
+#define TYP_CHIP_ERASE_TIMEOUT_OFFSET 0x22 /* Typical timeout for full chip erase */
+#define MAX_SINGLE_WRITE_TIMEOUT_OFFSET 0x23 /* Maximum timeout for byte/word write */
+#define MAX_BUFFER_WRITE_TIMEOUT_OFFSET 0x24 /* Maximum timeout for buffer write */
+#define MAX_BLOCK_ERASE_TIMEOUT_OFFSET 0x25 /* Maximum timeout per individual block erase */
+#define MAX_CHIP_ERASE_TIMEOUT_OFFSET 0x26 /* Maximum timeout for chip erase */
+
+#ifndef __ASSEMBLY__
+typedef struct cfi_query_system_interface_information {
+ uint16_t vcc_min_wev; /* in mV */
+ uint16_t vcc_max_wev; /* in mV */
+ uint16_t vpp_min_wev; /* in mV, 0 - no Vpp pin is present */
+ uint16_t vpp_max_wev; /* in mV, 0 - no Vpp pin is present */
+ uint32_t typ_single_write_timeout; /* in us, 0 - not supported */
+ uint32_t typ_buffer_write_timeout; /* in us, 0 - not supported */
+ uint32_t typ_block_erase_timeout; /* in ms, 0 - not supported */
+ uint32_t typ_chip_erase_timeout; /* in ms, 0 - not supported */
+ uint32_t max_single_write_timeout; /* in us, 0 - not supported */
+ uint32_t max_buffer_write_timeout; /* in us, 0 - not supported */
+ uint32_t max_block_erase_timeout; /* in ms, 0 - not supported */
+ uint32_t max_chip_erase_timeout; /* in ms, 0 - not supported */
+} cfi_query_system_interface_information_t;
+#endif /* __ASSEMBLY__ */
+
+/* Device geometry definition - see 4.3.4 in [1] */
+
+#define DEVICE_SIZE_OFFSET 0x27 /* Device Size */
+#define FLASH_DEVICE_INTERFACE_OFFSET 0x28 /* Flash Device Interface description */
+#define MAX_BYTES_WRITE_OFFSET 0x2A /* Maximum number of bytes in multi-byte write */
+#define NUMBER_OF_ERASE_REGIONS_OFFSET 0x2C /* Number of Erase Block Regions */
+#define ERASE_BLOCK_REGION_OFFSET 0x2D /* Erase Block Region Information */
+
+#ifndef __ASSEMBLY__
+typedef struct cfi_erase_block_region cfi_erase_block_region_t;
+
+typedef struct cfi_device_geometry {
+ uint32_t device_size; /* in B */
+ uint16_t device_interface; /* see Table 2 in [2] */
+ uint32_t max_bytes_write; /* in B */
+ uint8_t number_of_erase_regions;
+ cfi_erase_block_region_t *erase_block_regions;
+} cfi_device_geometry_t;
+
+struct cfi_erase_block_region {
+ uint32_t erase_block_size; /* in B */
+ uint32_t number_of_erase_blocks;
+};
+#endif /* __ASSEMBLY__ */
+
+/* Device interface code assignments (for cfi_device_geometry.device_interface) - see Table 2 in [2] */
+
+#define CFI_INTERFACE_X8 0
+#define CFI_INTERFACE_X16 1
+#define CFI_INTERFACE_X8_X16 2
+#define CFI_INTERFACE_X32 3
+#define CFI_INTERFACE_X16_X32 4
+
+/* CFI Query structure - see 4.3.1 in [1] */
+
+#ifndef __ASSEMBLY__
+typedef struct cfi_query_structure {
+ cfi_query_identification_string_t identification_string;
+ cfi_query_system_interface_information_t system_interface_info;
+ cfi_device_geometry_t device_geometry;
+} cfi_query_structure_t;
+#endif /* __ASSEMBLY__ */
+
+/* AMD primary vendor-specific extended query structure - see [3] and [4] */
+#define MAJOR_VERSION_OFFSET 0x03
+#define MINOR_VERSION_OFFSET 0x04
+#define ADDRESS_SENSITIVE_UNLOCK_OFFSET 0x05
+#define ERASE_SUSPEND_OFFSET 0x06
+#define SECTOR_PROTECT_OFFSET 0x07
+#define SECTOR_TEMPORARY_UNPROTECT_OFFSET 0x08
+#define SECTOR_PROTECT_SCHEME_OFFSET 0x09
+#define SIMULTANEOUS_OPERATION_OFFSET 0x0A
+#define BURST_MODE_TYPE_OFFSET 0x0B
+#define PAGE_MODE_TYPE_OFFSET 0x0C
+#define ACC_MIN_OFFSET 0x0D
+#define ACC_MAX_OFFSET 0x0E
+#define TOP_BOTTOM_SECTOR_FLAG_OFFSET 0x0F
+#define PROGRAM_SUSPEND_OFFSET 0x10
+#define UNLOCK_BYPASS_OFFSET 0x11
+#define SECSI_SECTOR_SIZE_OFFSET 0x12
+#define EMBEDDED_HWRST_TIMEOUT_MAX_OFFSET 0x13
+#define NON_EMBEDDED_HWRST_TIMEOUT_MAX_OFFSET 0x14
+#define ERASE_SUSPEND_TIMEOUT_MAX_OFFSET 0x15
+#define PROGRAM_SUSPEND_TIMEOUT_MAX_OFFSET 0x16
+#define BANK_ORGANIZATION_OFFSET 0x17
+#define BANK_REGION_INFO_OFFSET 0X18
+
+#ifndef __ASSEMBLY__
+typedef struct amd_pri_extened_query_structure {
+ uint8_t major_version;
+ uint8_t minor_version;
+ uint8_t address_sensitive_unlock;
+ uint8_t erase_suspend;
+ uint8_t sector_protect;
+ uint8_t sector_temporary_unprotect;
+ uint8_t sector_protect_scheme;
+ uint8_t simultaneous_operation;
+ uint8_t burst_mode_type;
+ uint8_t page_mode_type;
+ uint16_t acc_min; /* in mV */
+ uint16_t acc_max; /* in mV */
+ uint8_t top_bottom_sector_flag;
+ uint8_t program_suspend;
+ uint8_t unlock_bypass;
+ uint8_t secsi_sector_size;
+ uint8_t embedded_hwrst_timeout_max;
+ uint8_t non_embedded_hwrst_timeout_max; /* in ns */
+ uint8_t erase_suspend_timeout_max; /* in ns */
+ uint8_t program_suspend_timeout_max; /* in us */
+ uint8_t bank_organization; /* in us */
+ uint8_t bank_region_info[0];
+} amd_pri_extened_query_structure_t;
+#endif /* __ASSEMBLY__ */
+
+#endif /* FLASH_CFI_H */
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2002 ETC s.r.o.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the ETC s.r.o. nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2002.
+ *
+ * Documentation:
+ * [1] Intel Corporation, "3 Volt Intel Strata Flash Memory 28F128J3A, 28F640J3A,
+ * 28F320J3A (x8/x16)", April 2002, Order Number: 290667-011
+ * [2] Intel Corporation, "3 Volt Synchronous Intel Strata Flash Memory 28F640K3, 28F640K18,
+ * 28F128K3, 28F128K18, 28F256K3, 28F256K18 (x16)", June 2002, Order Number: 290737-005
+ *
+ */
+
+#ifndef FLASH_INTEL_H
+#define FLASH_INTEL_H
+
+#include <bitmask.h>
+
+/* Intel CFI commands - see Table 4. in [1] and Table 3. in [2] */
+
+#define CFI_INTEL_CMD_READ_ARRAY 0xFF /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */
+#define CFI_INTEL_CMD_READ_IDENTIFIER 0x90 /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */
+#define CFI_INTEL_CMD_READ_QUERY 0x98 /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */
+#define CFI_INTEL_CMD_READ_STATUS_REGISTER 0x70 /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */
+#define CFI_INTEL_CMD_CLEAR_STATUS_REGISTER 0x50 /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */
+#define CFI_INTEL_CMD_PROGRAM1 0x40 /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */
+#define CFI_INTEL_CMD_PROGRAM2 0x10 /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */
+#define CFI_INTEL_CMD_WRITE_TO_BUFFER 0xE8 /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */
+#define CFI_INTEL_CMD_CONFIRM 0xD0 /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */
+#define CFI_INTEL_CMD_BLOCK_ERASE 0x20 /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */
+#define CFI_INTEL_CMD_SUSPEND 0xB0 /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */
+#define CFI_INTEL_CMD_RESUME 0xD0 /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */
+#define CFI_INTEL_CMD_WRITE_CONFIRM 0xD0 /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */
+#define CFI_INTEL_CMD_LOCK_SETUP 0x60 /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */
+#define CFI_INTEL_CMD_LOCK_BLOCK 0x01 /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */
+#define CFI_INTEL_CMD_UNLOCK_BLOCK 0xD0 /* 28FxxxJ3A - unlocks all blocks, 28FFxxxK3, 28FxxxK18 */
+#define CFI_INTEL_CMD_LOCK_DOWN_BLOCK 0x2F /* 28FxxxK3, 28FxxxK18 */
+
+/* Intel CFI Status Register bits - see Table 6. in [1] and Table 7. in [2] */
+
+#define CFI_INTEL_SR_READY bit(7) /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */
+#define CFI_INTEL_SR_ERASE_SUSPEND bit(6) /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */
+#define CFI_INTEL_SR_ERASE_ERROR bit(5) /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */
+#define CFI_INTEL_SR_PROGRAM_ERROR bit(4) /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */
+#define CFI_INTEL_SR_VPEN_ERROR bit(3) /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */
+#define CFI_INTEL_SR_PROGRAM_SUSPEND bit(2) /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */
+#define CFI_INTEL_SR_BLOCK_LOCKED bit(1) /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */
+#define CFI_INTEL_SR_BEFP bit(0) /* 28FxxxK3, 28FxxxK18 */
+
+/* Intel flash device ID codes for 28FxxxJ3A - see Table 5. in [1] */
+
+#define CFI_CHIP_INTEL_28F320J3A 0x0016
+#define CFI_CHIPN_INTEL_28F320J3A "28F320J3A"
+#define CFI_CHIP_INTEL_28F640J3A 0x0017
+#define CFI_CHIPN_INTEL_28F640J3A "28F640J3A"
+#define CFI_CHIP_INTEL_28F128J3A 0x0018
+#define CFI_CHIPN_INTEL_28F128J3A "28F128J3A"
+
+/* Intel flash device ID codes for 28FxxxK3 and 28FxxxK18 - see Table 8. in [2] */
+
+#define CFI_CHIP_INTEL_28F640K3 0x8801
+#define CFI_CHIPN_INTEL_28F640K3 "28F640K3"
+#define CFI_CHIP_INTEL_28F128K3 0x8802
+#define CFI_CHIPN_INTEL_28F128K3 "28F128K3"
+#define CFI_CHIP_INTEL_28F256K3 0x8803
+#define CFI_CHIPN_INTEL_28F256K3 "28F256K3"
+#define CFI_CHIP_INTEL_28F640K18 0x8805
+#define CFI_CHIPN_INTEL_28F640K18 "28F640K18"
+#define CFI_CHIP_INTEL_28F128K18 0x8806
+#define CFI_CHIPN_INTEL_28F128K18 "28F128K18"
+#define CFI_CHIP_INTEL_28F256K18 0x8807
+#define CFI_CHIPN_INTEL_28F256K18 "28F256K18"
+
+#endif /* FLASH_INTEL_H */
--- /dev/null
+/*
+ * $Id$
+ *
+ * Manufacturer's Identification Code declarations
+ * Copyright (C) 2002 ETC s.r.o.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the ETC s.r.o. nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2002.
+ *
+ * Documentation:
+ * [1] JEDEC Solid State Technology Association, "Standard Manufacturer's
+ * Identification Code", May 2003, Order Number: JEP106M
+ *
+ */
+
+#ifndef STD_MIC_H
+#define STD_MIC_H
+
+/* Manufacturer's Identification Code - see Table 1 in [1] */
+
+#define STD_MIC_AMD 0x01
+#define STD_MICN_AMD "AMD"
+#define STD_MIC_AMI 0x02
+#define STD_MICN_AMI "AMI"
+#define STD_MIC_FAIRCHILD 0x83
+#define STD_MICN_FAIRCHILD "Fairchild"
+#define STD_MIC_FUJITSU 0x04
+#define STD_MICN_FUJITSU "Fujitsu"
+#define STD_MIC_GTE 0x85
+#define STD_MICN_GTE "GTE"
+#define STD_MIC_HARRIS 0x86
+#define STD_MICN_HARRIS "Harris"
+#define STD_MIC_HITACHI 0x07
+#define STD_MICN_HITACHI "Hitachi"
+#define STD_MIC_INMOS 0x08
+#define STD_MICN_INMOS "Inmos"
+#define STD_MIC_INTEL 0x89
+#define STD_MICN_INTEL "Intel"
+#define STD_MIC_ITT 0x8A
+#define STD_MICN_ITT "I.T.T."
+#define STD_MIC_INTERSIL 0x0B
+#define STD_MICN_INTERSIL "Intersil"
+#define STD_MIC_MONOLITHIC_MEMORIES 0x8C
+#define STD_MICN_MONOLITHIC_MEMORIES "Monolithic Memories"
+#define STD_MIC_MOSTEK 0x0D
+#define STD_MICN_MOSTEK "Mostek"
+#define STD_MIC_MOTOROLA 0x0E
+#define STD_MICN_MOTOROLA "Motorola"
+#define STD_MIC_NATIONAL 0x8F
+#define STD_MICN_NATIONAL "National"
+#define STD_MIC_NEC 0x10
+#define STD_MICN_NEC "NEC"
+#define STD_MIC_RCA 0x91
+#define STC_MICN_RCA "RCA"
+#define STD_MIC_RAYTHEON 0x92
+#define STD_MICN_RAYTHEON "Raytheon"
+#define STD_MIC_CONEXANT 0x13
+#define STD_MICN_CONEXANT "Conexant (Rockwell)"
+#define STD_MIC_SEEQ 0x94
+#define STD_MICN_SEEQ "Seeq"
+#define STD_MIC_PHILIPS 0x15
+#define STD_MICN_PHILIPS "Philips Semi. (Signetics)"
+#define STD_MIC_SYNERTEK 0x16
+#define STD_MICN_SYNERTEK "Synertek"
+#define STD_MIC_TEXAS_INSTRUMENTS 0x97
+#define STD_MICN_TEXAS_INSTRUMENTS "Texas Instruments"
+#define STD_MIC_TOSHIBA 0x98
+#define STD_MICN_TOSHIBA "Toshiba"
+#define STD_MIC_XICOR 0x19
+#define STD_MICN_XICOR "Xicor"
+#define STD_MIC_ZILOG 0x1A
+#define STD_MICN_ZILOG "Zilog"
+#define STD_MIC_EUROTECHNIQUE 0x9B
+#define STD_MICN_EUROTECHNIQUE "Eurotechnique"
+#define STD_MIC_MITSUBISHI 0x1C
+#define STD_MICN_MITSUBISHI "Mitsubishi"
+#define STD_MIC_LUCENT 0x9D
+#define STD_MICN_LUCENT "Lucent (AT&T)"
+#define STD_MIC_EXEL 0x9E
+#define STD_MICN_EXEL "Exel"
+#define STD_MIC_ATMEL 0x1F
+#define STD_MICN_ATMEL "Atmel"
+#define STD_MIC_SGS_THOMSON 0x20
+#define STD_MICN_SGS_THOMSON "SGS/Thomson"
+#define STD_MIC_LATTICE 0xA1
+#define STD_MICN_LATTICE "Lattice Semi."
+#define STD_MIC_NCR 0xA2
+#define STD_MICN_NCR "NCR"
+#define STD_MIC_WAFER_SCALE_INTEGRATION 0x23
+#define STD_MICN_WAFER_SCALE_INTEGRATION "Wafer Scale Integration"
+#define STD_MIC_IBM 0xA4
+#define STD_MICN_IBM "IBM"
+#define STD_MIC_TRISTAR 0x25
+#define STD_MICN_TRISTAR "Tristar"
+#define STD_MIC_VISIC 0x26
+#define STD_MICN_VISIC "Visic"
+#define STD_MIC_INTL_CMOS_TECHNOLOGY 0xA7
+#define STD_MICN_INTL_CMOS_TECHNOLOGY "Intl. CMOS Technology"
+#define STD_MIC_SSSI 0xA8
+#define STD_MICN_SSSI "SSSI"
+#define STD_MIC_MICROCHIP_TECHNOLOGY 0x29
+#define STD_MICN_MICROCHIP_TECHNOLOGY "MicrochipTechnology"
+#define STD_MIC_RICOH 0x2A
+#define STD_MICN_RICOH "Ricoh Ltd."
+#define STD_MIC_VLSI 0xAB
+#define STD_MICN_VLSI "VLSI"
+#define STD_MIC_MICRON_TECHNOLOGY 0x2C
+#define STD_MICN_MICRON_TECHNOLOGY "Micron Technology"
+#define STD_MIC_HYUNDAI_ELECTRONICS 0xAD
+#define STD_MICN_HYUNDAI_ELECTRONICS "Hyundai Electronics"
+#define STD_MIC_OKI_SEMICONDUCTOR 0xAE
+#define STD_MICN_OKI_SEMICONDUCTOR "OKI Semiconductor"
+#define STD_MIC_ACTEL 0x2F
+#define STD_MICN_ACTEL "ACTEL"
+#define STD_MIC_SHARP 0xB0
+#define STD_MICN_SHARP "Sharp"
+#define STD_MIC_CATALYST 0x31
+#define STD_MICN_CATALYST "Catalyst"
+#define STD_MIC_PANASONIC 0x32
+#define STD_MICN_PANASONIC "Panasonic"
+#define STD_MIC_IDT 0xB3
+#define STD_MICN_IDT "IDT"
+#define STD_MIC_CYPRESS 0x34
+#define STD_MICN_CYPRESS "Cypress"
+#define STD_MIC_DEC 0xB5
+#define STD_MICN_DEC "DEC"
+#define STD_MIC_LSI_LOGIC 0xB6
+#define STD_MICN_LSI_LOGIC "LSI Logic"
+#define STD_MIC_ZARLINK 0x37
+#define STD_MICN_ZARLINK "Zarlink (formerly Plessey)"
+#define STD_MIC_UTMC 0x38
+#define STD_MICN_UTMC "UTMC"
+#define STD_MIC_THINKING_MACHINE 0xB9
+#define STD_MICN_THINKING_MACHINE "Thinking Machine"
+#define STD_MIC_THOMSON_CSF 0xBA
+#define STD_MICN_THOMSON_CSF "Thomson CSF"
+#define STD_MIC_INTEGRATED_CMOS 0x3B
+#define STD_MICN_INTEGRATED_CMOS "Integrated CMOS(Vertex)"
+#define STD_MIC_HONEYWELL 0xBC
+#define STD_MICN_HONEYWELL "Honeywell"
+#define STD_MIC_TEKTRONIX 0x3D
+#define STD_MICN_TEKTRONIX "Tektronix"
+#define STD_MIC_SUN_MICROSYSTEMS 0x3E
+#define STD_MICN_SUN_MICROSYSTEMS "Sun Microsystems"
+#define STD_MIC_SST 0xBF
+#define STD_MICN_SST "SST"
+#define STD_MIC_MOSEL 0x40
+#define STD_MICN_MOSEL "MOSEL"
+#define STD_MIC_INFINEON 0xC1
+#define STD_MICN_INFINEON "Infineon (formerly Siemens)"
+#define STD_MIC_MACRONIX 0xC2
+#define STD_MICN_MACRONIX "Macronix"
+#define STD_MIC_XEROX 0x43
+#define STD_MICN_XEROX "Xerox"
+#define STD_MIC_PLUS_LOGIC 0xC4
+#define STD_MICN_PLUS_LOGIC "Plus Logic"
+#define STD_MIC_SUNDISK 0x45
+#define STD_MICN_SUNDISK "SunDisk"
+#define STD_MIC_ELAN_CIRCUIT 0x46
+#define STD_MICN_ELAN_CIRCUIT "Elan Circuit Tech."
+/* TODO */
+
+#endif /* STD_MIC_H */
--- /dev/null
+/* Convenience header for conditional use of GNU <libintl.h>.
+ Copyright (C) 1995-1998, 2000-2002 Free Software Foundation, Inc.
+
+ This program is free software; you can redistribute it and/or modify it
+ under the terms of the GNU Library General Public License as published
+ by the Free Software Foundation; either version 2, or (at your option)
+ any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Library General Public License for more details.
+
+ You should have received a copy of the GNU Library General Public
+ License along with this program; if not, write to the Free Software
+ Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307,
+ USA. */
+
+#ifndef _LIBGETTEXT_H
+#define _LIBGETTEXT_H 1
+
+/* NLS can be disabled through the configure --disable-nls option. */
+#if ENABLE_NLS
+
+/* Get declarations of GNU message catalog functions. */
+# include <libintl.h>
+
+#else
+
+/* Solaris /usr/include/locale.h includes /usr/include/libintl.h, which
+ chokes if dcgettext is defined as a macro. So include it now, to make
+ later inclusions of <locale.h> a NOP. We don't include <libintl.h>
+ as well because people using "gettext.h" will not include <libintl.h>,
+ and also including <libintl.h> would fail on SunOS 4, whereas <locale.h>
+ is OK. */
+#if defined(__sun)
+# include <locale.h>
+#endif
+
+/* Disabled NLS.
+ The casts to 'const char *' serve the purpose of producing warnings
+ for invalid uses of the value returned from these functions.
+ On pre-ANSI systems without 'const', the config.h file is supposed to
+ contain "#define const". */
+# define gettext(Msgid) ((const char *) (Msgid))
+# define dgettext(Domainname, Msgid) ((const char *) (Msgid))
+# define dcgettext(Domainname, Msgid, Category) ((const char *) (Msgid))
+# define ngettext(Msgid1, Msgid2, N) \
+ ((N) == 1 ? (const char *) (Msgid1) : (const char *) (Msgid2))
+# define dngettext(Domainname, Msgid1, Msgid2, N) \
+ ((N) == 1 ? (const char *) (Msgid1) : (const char *) (Msgid2))
+# define dcngettext(Domainname, Msgid1, Msgid2, N, Category) \
+ ((N) == 1 ? (const char *) (Msgid1) : (const char *) (Msgid2))
+# define textdomain(Domainname) ((const char *) (Domainname))
+# define bindtextdomain(Domainname, Dirname) ((const char *) (Dirname))
+# define bind_textdomain_codeset(Domainname, Codeset) ((const char *) (Codeset))
+
+#endif
+
+/* A pseudo function call that serves as a marker for the automated
+ extraction of messages, but does not call gettext(). The run-time
+ translation is done at a different place in the code.
+ The argument, String, should be a literal string. Concatenated strings
+ and other string expressions won't work.
+ The macro's expansion is not parenthesized, so that it is suitable as
+ initializer for static 'char[]' or 'const char[]' variables. */
+#define gettext_noop(String) String
+
+#endif /* _LIBGETTEXT_H */
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2002 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2002.
+ *
+ */
+
+#ifndef INSTRUCTION_H
+#define INSTRUCTION_H
+
+#include "register.h"
+#include "data_register.h"
+
+#define MAXLEN_INSTRUCTION 20
+
+typedef struct instruction instruction;
+
+struct instruction {
+ char name[MAXLEN_INSTRUCTION + 1];
+ tap_register *value;
+ tap_register *out;
+ data_register *data_register;
+ instruction *next;
+};
+
+instruction *instruction_alloc( const char *name, int len, const char *val );
+void instruction_free( instruction *i );
+
+#endif /* INSTRUCTION_H */
--- /dev/null
+/*
+ * $Id: jim.h $
+ *
+ * Copyright (C) 2008 Kolja Waschk <kawk>
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * Documentation used while writing this code:
+ *
+ * http://www.inaccessnetworks.com/projects/ianjtag/jtag-intro/jtag-intro.html
+ * "A Brief Introduction to the JTAG Boundary Scan Interface", Nick Patavalis
+ *
+ * http://www.xjtag.com/support-jtag/jtag-technical-guide.php
+ * "JTAG - A technical overview", XJTAG Ltd.
+ *
+ */
+
+#ifndef JIM_H
+#define JIM_H 1
+
+#include <stdint.h>
+#include <stdlib.h>
+
+typedef enum
+{
+ RESET = 0,
+ SELECT_DR = 0+1,
+ CAPTURE_DR = 0+2,
+ SHIFT_DR = 0+3,
+ EXIT1_DR = 0+4,
+ PAUSE_DR = 0+5,
+ EXIT2_DR = 0+6,
+ UPDATE_DR = 0+7,
+ IDLE = 8,
+ SELECT_IR = 8+1,
+ CAPTURE_IR = 8+2,
+ SHIFT_IR = 8+3,
+ EXIT1_IR = 8+4,
+ PAUSE_IR = 8+5,
+ EXIT2_IR = 8+6,
+ UPDATE_IR = 8+7,
+}
+tap_state_t;
+
+typedef struct
+{
+ uint32_t *reg;
+ int len;
+} shift_reg_t;
+
+typedef struct jim_device
+{
+ struct jim_device *prev;
+
+ tap_state_t tap_state;
+ void (*tck_rise)(struct jim_device *dev, int tms, int tdi, uint8_t *shmem, size_t shmem_size);
+ void (*tck_fall)(struct jim_device *dev, uint8_t *shmem, size_t shmem_size);
+ void (*dev_free)(struct jim_device *dev);
+ void *state;
+ int num_sregs;
+ int current_dr;
+ shift_reg_t *sreg;
+ int tdo;
+ int tdo_buffer;
+}
+jim_device_t;
+
+typedef struct jim_state
+{
+ int trst;
+ uint8_t *shmem;
+ size_t shmem_size;
+ jim_device_t *last_device_in_chain;
+}
+jim_state_t;
+
+typedef struct jim_bus_device
+{
+ int width; /* bytes */
+ int size ; /* words (each <width> bytes) */
+ void *state; /* device-dependent */
+ void (*init)(struct jim_bus_device *x);
+ uint32_t (*capture)(struct jim_bus_device *x,
+ uint32_t address, uint32_t control,
+ uint8_t *shmem, size_t shmem_size);
+ void (*update)(struct jim_bus_device *x,
+ uint32_t address, uint32_t data, uint32_t control,
+ uint8_t *shmem, size_t shmem_size);
+ void (*free)(struct jim_bus_device *x);
+}
+jim_bus_device_t;
+
+typedef struct
+{
+ uint32_t offset;
+ int adr_shift;
+ int data_shift;
+ jim_bus_device_t *part;
+}
+jim_attached_part_t;
+
+void jim_set_trst(jim_state_t *s, int trst);
+int jim_get_trst(jim_state_t *s);
+int jim_get_tdo(jim_state_t *s);
+void jim_tck_rise(jim_state_t *s, int tms, int tdi);
+void jim_tck_fall(jim_state_t *s);
+jim_device_t *jim_alloc_device(int num_sregs, const int reg_size[]);
+jim_state_t *jim_init(void);
+void jim_free(jim_state_t *s);
+void jim_print_sreg(shift_reg_t *r);
+void jim_print_tap_state(char *rof, jim_device_t *dev);
+
+#endif
+
--- /dev/null
+/*
+ * $Id: tap.c $
+ *
+ * Copyright (C) 2008 Kolja Waschk <kawk>
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include <jim.h>
+
+void some_cpu_tck_rise(jim_device_t *dev);
+jim_device_t *some_cpu(void);
+
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2003 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2003.
+ *
+ */
+
+#ifndef JTAG_H
+#define JTAG_H
+
+#include <stdio.h>
+#include <stdint.h>
+
+#include <flash.h>
+
+#include "chain.h"
+#include "bus.h"
+#include "part.h"
+
+#define URJTAG_STATUS_OK 0
+#define URJTAG_STATUS_FAIL 1
+#define URJTAG_STATUS_SYNTAX_ERROR -1
+
+
+extern bus_t *bus;
+extern int big_endian;
+extern int debug_mode;
+
+const char *jtag_get_data_dir( void );
+
+int jtag_parse_file( chain_t *chain, const char *filename );
+int jtag_parse_line( chain_t *chain, char *line );
+int jtag_parse_stream( chain_t *chain, FILE *f );
+
+int detect_parts( chain_t *chain, const char *db_path );
+int manual_add( chain_t *chain, int instr_len );
+int detect_register_size( chain_t *chain );
+void discovery( chain_t *chain );
+void idcode( chain_t *chain , unsigned int bytes);
+
+void readmem( bus_t *bus, FILE *f, uint32_t addr, uint32_t len );
+void writemem( bus_t *bus, FILE *f, uint32_t addr, uint32_t len );
+
+void flasherase( bus_t *bus, uint32_t addr, int number );
+
+#endif /* JTAG_H */
--- /dev/null
+/*
+ * $Id$
+ *
+ * Parallel Port Connection Driver Interface
+ * Copyright (C) 2003 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2003.
+ *
+ */
+
+#ifndef PARPORT_H
+#define PARPORT_H
+
+#include <stdint.h>
+
+typedef struct parport_t parport_t;
+
+#include "cable.h"
+
+typedef struct {
+ const char *type;
+ parport_t *(*connect)( const char **, int );
+ void (*parport_free)( parport_t * );
+ int (*open)( parport_t * );
+ int (*close)( parport_t * );
+ int (*set_data)( parport_t *, uint8_t );
+ int (*get_data)( parport_t * );
+ int (*get_status)( parport_t * );
+ int (*set_control)( parport_t *, uint8_t );
+} parport_driver_t;
+
+struct parport_t {
+ parport_driver_t *driver;
+ void *params;
+ cable_t *cable;
+};
+
+int parport_open( parport_t *port );
+int parport_close( parport_t *port );
+int parport_set_data( parport_t *port, uint8_t data );
+int parport_get_data( parport_t *port );
+int parport_get_status( parport_t *port );
+int parport_set_control( parport_t *port, uint8_t data );
+
+extern parport_driver_t *parport_drivers[];
+
+#endif /* PARPORT_H */
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2002 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2002.
+ *
+ */
+
+#ifndef PART_H
+#define PART_H
+
+#include <stdio.h>
+
+#include "bssignal.h"
+#include "instruction.h"
+#include "data_register.h"
+#include "bsbit.h"
+
+#define MAXLEN_MANUFACTURER 25
+#define MAXLEN_PART 20
+#define MAXLEN_STEPPING 8
+
+typedef struct part part_t;
+
+struct part {
+ tap_register *id;
+ char *alias; /* djf refdes */
+ char manufacturer[MAXLEN_MANUFACTURER + 1];
+ char part[MAXLEN_PART + 1];
+ char stepping[MAXLEN_STEPPING + 1];
+ signal_t *signals;
+ salias_t *saliases;
+ int instruction_length;
+ instruction *instructions;
+ instruction *active_instruction;
+ data_register *data_registers;
+ int boundary_length;
+ bsbit_t **bsbits;
+};
+
+part_t *part_alloc( const tap_register *id );
+void part_free( part_t *p );
+part_t *read_part( FILE *f, tap_register_t *idr );
+instruction *part_find_instruction( part_t *p, const char *iname );
+data_register *part_find_data_register( part_t *p, const char *drname );
+signal_t *part_find_signal( part_t *p, const char *signalname );
+void part_set_instruction( part_t *p, const char *iname );
+void part_set_signal( part_t *p, signal_t *s, int out, int val );
+int part_get_signal( part_t *p, signal_t *s );
+void part_print( part_t *p );
+
+typedef struct parts parts_t;
+
+struct parts {
+ int len;
+ part_t **parts;
+};
+
+parts_t *parts_alloc( void );
+void parts_free( parts_t *ps );
+int parts_add_part( parts_t *ps, part_t *p );
+void parts_set_instruction( parts_t *ps, const char *iname );
+void parts_print( parts_t *ps );
+
+#endif /* PART_H */
--- /dev/null
+/*
+ * $Id$
+ *
+ * Pod signal names
+ * Copyright (C) 2008 K. Waschk
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ */
+
+#ifndef POD_H
+#define POD_H
+
+typedef enum
+{
+ CS_NONE = 0, // no/invalid signal
+ CS_TDI = (1<<0), // out: JTAG/SPI data in
+ CS_TCK = (1<<1), // out: JTAG/SPI clock
+ CS_TMS = (1<<2), // out: JTAG test mode select/SPI slave select
+ CS_TRST = (1<<3), // out: JTAG TAP reset
+ CS_RESET = (1<<4), // out: system reset
+ CS_SCK = (1<<5), // out: I2C clock (not yet used)
+ CS_SDA = (1<<6), // inout: I2C data (not yet used)
+ CS_SS = (1<<7), // out: SPI slave select (not yet used)
+}
+pod_sigsel_t;
+
+#endif /* POD_H */
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2002, 2003 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2002, 2003.
+ *
+ */
+
+#ifndef REGISTER_H
+#define REGISTER_H
+
+#define tap_register_t tap_register
+typedef struct tap_register {
+ char *data; /* (public, r/w) register data */
+ int len; /* (public, r/o) register length */
+ char *string; /* (private) string representation of register data */
+} tap_register_t;
+
+tap_register *register_alloc( int len );
+tap_register *register_duplicate( const tap_register_t *tr );
+void register_free( tap_register_t *tr );
+tap_register *register_fill( tap_register_t *tr, int val );
+const char *register_get_string( const tap_register_t *tr );
+int register_all_bits_same_value( const tap_register_t *tr );
+tap_register *register_init( tap_register_t *tr, const char *value );
+int register_compare( const tap_register_t *tr, const tap_register_t *tr2 );
+int register_match( const tap_register_t *tr, const char *expr );
+tap_register *register_inc( tap_register_t *tr );
+tap_register *register_dec( tap_register_t *tr );
+tap_register *register_shift_right( tap_register_t *tr, int shift );
+tap_register *register_shift_left( tap_register_t *tr, int shift );
+
+#endif /* REGISTER_H */
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2002 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2002.
+ *
+ */
+
+#ifndef STATE_H
+#define STATE_H
+
+#include <bitmask.h>
+
+#include "chain.h"
+
+#define TAPSTAT_DR bit(0)
+#define TAPSTAT_IR bit(1)
+#define TAPSTAT_SHIFT bit(2) /* register shift with TMS = 0 */
+#define TAPSTAT_IDLE bit(3) /* to Run-Test/Idle with TMS = 0 */
+#define TAPSTAT_CAPTURE bit(4) /* Capture state */
+#define TAPSTAT_UPDATE bit(5) /* to Update with TMS = 1 */
+#define TAPSTAT_PAUSE bit(6) /* to Pause with TMS = 0 */
+#define TAPSTAT_RESET bit(7) /* Test-Logic-Reset or unknown state */
+
+#define Unknown_State TAPSTAT_RESET
+#define Test_Logic_Reset (TAPSTAT_RESET | TAPSTAT_IDLE)
+#define Run_Test_Idle TAPSTAT_IDLE
+#define Select_DR_Scan TAPSTAT_DR
+#define Capture_DR (TAPSTAT_DR | TAPSTAT_SHIFT | TAPSTAT_CAPTURE)
+#define Shift_DR (TAPSTAT_DR | TAPSTAT_SHIFT)
+#define Exit1_DR (TAPSTAT_DR | TAPSTAT_UPDATE | TAPSTAT_PAUSE)
+#define Pause_DR (TAPSTAT_DR | TAPSTAT_PAUSE)
+#define Exit2_DR (TAPSTAT_DR | TAPSTAT_SHIFT | TAPSTAT_UPDATE)
+#define Update_DR (TAPSTAT_DR | TAPSTAT_IDLE)
+#define Select_IR_Scan TAPSTAT_IR
+#define Capture_IR (TAPSTAT_IR | TAPSTAT_SHIFT | TAPSTAT_CAPTURE)
+#define Shift_IR (TAPSTAT_IR | TAPSTAT_SHIFT)
+#define Exit1_IR (TAPSTAT_IR | TAPSTAT_UPDATE | TAPSTAT_PAUSE)
+#define Pause_IR (TAPSTAT_IR | TAPSTAT_PAUSE)
+#define Exit2_IR (TAPSTAT_IR | TAPSTAT_SHIFT | TAPSTAT_UPDATE)
+#define Update_IR (TAPSTAT_IR | TAPSTAT_IDLE)
+
+int tap_state( chain_t *chain );
+int tap_state_init( chain_t *chain );
+int tap_state_done( chain_t *chain );
+int tap_state_reset( chain_t *chain );
+int tap_state_set_trst( chain_t *chain, int old_trst, int new_trst );
+int tap_state_clock( chain_t *chain, int tms );
+
+#endif /* STATE_H */
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2004, Arnim Laeuger
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Arnim Laeuger <arniml@users.sourceforge.net>, 2004.
+ *
+ */
+
+#ifndef SVF_H
+#define SVF_H
+
+#include "chain.h"
+
+void svf_run(chain_t *chain, FILE *, int, int, uint32_t);
+
+#endif /* SVF_H */
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2002 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2002.
+ *
+ */
+
+#ifndef TAP_H
+#define TAP_H
+
+#include "register.h"
+#include "chain.h"
+
+void tap_reset( chain_t *chain );
+void tap_reset_bypass( chain_t *chain );
+void tap_capture_dr( chain_t *chain );
+void tap_capture_ir( chain_t *chain );
+void tap_defer_shift_register( chain_t *chain, const tap_register *in, tap_register *out, int tap_exit );
+void tap_shift_register_output( chain_t *chain, const tap_register *in, tap_register *out, int tap_exit );
+void tap_shift_register( chain_t *chain, const tap_register *in, tap_register *out, int tap_exit );
+
+#endif /* TAP_H */
--- /dev/null
+/*
+ * $Id$
+ *
+ * USB Device Connection Driver Interface
+ * Copyright (C) 2008 K. Waschk
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Kolja Waschk <kawk>, 2008
+ *
+ */
+
+#ifndef USBCONN_H
+#define USBCONN_H
+
+#include <stdint.h>
+#include <stddef.h>
+
+typedef struct usbconn_t usbconn_t;
+
+#include "cable.h"
+
+typedef struct
+{
+ char *name;
+ char *desc;
+ char *driver;
+ int32_t vid;
+ int32_t pid;
+} usbconn_cable_t;
+
+typedef struct {
+ const char *type;
+ usbconn_t *(*connect)( const char **, int, usbconn_cable_t *);
+ void (*free)( usbconn_t * );
+ int (*open)( usbconn_t * );
+ int (*close)( usbconn_t * );
+ int (*read)( usbconn_t *, uint8_t *, int );
+ int (*write)( usbconn_t *, uint8_t *, int, int );
+} usbconn_driver_t;
+
+struct usbconn_t {
+ usbconn_driver_t *driver;
+ void *params;
+ cable_t *cable;
+};
+
+usbconn_t *usbconn_connect( const char **, int, usbconn_cable_t *);
+int usbconn_free( usbconn_t *conn );
+int usbconn_open( usbconn_t *conn );
+int usbconn_close( usbconn_t *conn );
+int usbconn_read( usbconn_t *conn, uint8_t *buf, int len );
+int usbconn_write( usbconn_t *conn, uint8_t *buf, int len, int recv );
+extern usbconn_driver_t *usbconn_drivers[];
+
+#endif /* USBCONN_H */
--- /dev/null
+/*
+ * $Id$
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by A. Laeuger, 2008
+ *
+ */
+
+#ifndef _USBCONN_LIBFTDX_H
+#define _USBCONN_LIBFTDX_H 1
+
+#define FTDX_MAXSEND 4096
+#define FTDX_MAXSEND_MPSSE (64 * 1024)
+
+/* Maximum chunk to receive from ftdi/ftd2xx driver.
+ Larger values might speed up comm, but there's an upper limit
+ when too many bytes are sent and the underlying libftdi or libftd2xx
+ don't fetch the returned data in time -> deadlock */
+#define FTDI_MAXRECV ( 4 * 64)
+#define FTD2XX_MAXRECV (63 * 64)
+#define FTDX_MAXRECV (FTD2XX_MAXRECV < FTDI_MAXRECV ? FTD2XX_MAXRECV : FTDI_MAXRECV)
+
+#endif
--- /dev/null
+/*
+ * $Id$
+ *
+ * Link driver for accessing USB devices via libusb
+ *
+ * Copyright (C) 2008 K. Waschk
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Kolja Waschk, 2008
+ *
+ */
+
+#ifndef _USBCONN_LIBUSB_H
+#define _USBCONN_LIBUSB_H 1
+
+#include <usb.h>
+
+typedef struct {
+ struct usb_device *dev;
+ struct usb_dev_handle *handle;
+ void *data;
+} libusb_param_t;
+
+#endif
+
--- /dev/null
+/*
+ * $Id$
+ *
+ * Xilinx Platform Cable USB functions
+ * Copyright (C) 2008 K. Waschk
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Kolja Waschk <kawk>, 2008
+ *
+ */
+
+#ifndef XPCU_H
+#define XPCU_H 1
+
+#include <stdint.h>
+#include <usb.h>
+
+#define XPCU_VID 0x03FD
+#define XPCU_PID 0x0008
+
+struct usb_device *find_xpcu(void);
+int xpcu_init();
+int xpcu_close(struct usb_dev_handle *xpcu);
+int xpcu_request_28(struct usb_dev_handle *xpcu, int value);
+int xpcu_raise_ioa5(struct usb_dev_handle *xpcu);
+int xpcu_write_gpio(struct usb_dev_handle *xpcu, uint8_t bits);
+int xpcu_read_gpio(struct usb_dev_handle *xpcu, uint8_t *bits);
+int xpcu_bitrev_test(struct usb_dev_handle *xpcu);
+int xpcu_select_gpio(struct usb_dev_handle *xpcu, int select);
+int xpcu_open(struct usb_dev_handle **xpcu);
+int xpcu_request_a6(struct usb_dev_handle *xpcu, int nibbles, uint8_t *xmit, int inlen, uint8_t *recv);
+
+
+#endif /* XPCU_H */
+
--- /dev/null
+Makefile.in.in
+Makefile.in
+Makefile
+POTFILES
+Rules-quot
+boldquot.sed
+en@boldquot.header
+en@quot.header
+insert-header.sin
+quot.sed
+remove-potcdate.sin
+remove-potcdate.sed
+jtag.pot
+messages.mo
+*.gmo
+stamp-po
+Makevars.template
--- /dev/null
+2007-12-23 Kolja Waschk <kawk>
+
+ * rw/fr/sk.po: Committed machine-updated files.
+
+2007-11-02 Kolja Waschk <kawk>
+
+ * created "UrJTAG" project as fork of openwince jtag tools. All older
+ log entries in this ChangeLog describe the openwince development.
+
+2005-04-06 Marcel Telka <marcel@telka.sk>
+
+ * rw.po: Added Kinyarwanda translation by Steven Michael Murphy.
+ * LINGUAS: Added rw.
+
+2004-11-24 Marcel Telka <marcel@telka.sk>
+
+ * POTFILES.in: Added src/cmd/reset.c.
+
+2004-11-18 Marcel Telka <marcel@telka.sk>
+
+ * POTFILES.in: Added src/bus/ppc440gx_ebc8.c, src/bus/tx4925.c, and src/tap/cable/lattice.c.
+
+2004-10-22 Marcel Telka <marcel@telka.sk>
+
+ * POTFILES.in: Added src/bus/lh7a400.c (patch 886068, Marko Rößler).
+
+2004-05-11 Marcel Telka <marcel@telka.sk>
+
+ * fr.po: Updated French translation by Michel Robitaille.
+
+2004-01-07 Marcel Telka <marcel@telka.sk>
+
+ * POTFILES.in: Added missing files.
+
+2004-01-07 Marcel Telka <marcel@telka.sk>
+
+ * fr.po: Updated French translation by Michel Robitaille.
+
+2004-01-06 Marcel Telka <marcel@telka.sk>
+
+ * fr.po: Added French translation by Michel Robitaille.
+ * LINGUAS: Added fr.
+
+2003-10-08 Marcel Telka <marcel@telka.sk>
+
+ * sk.po: Updated Slovak translation.
+
+2003-09-23 Marcel Telka <marcel@telka.sk>
+
+ * POTFILES.in: Added src/tap/cable/triton.c.
+
+2003-09-05 Marcel Telka <marcel@telka.sk>
+
+ * POTFILES.in: Added src/cmd/initbus.c.
+
+2003-09-04 Marcel Telka <marcel@telka.sk>
+
+ * sk.po: Updated Slovak translation for 0.5 release reformatted by TP-Robot.
+
+2003-08-19 Marcel Telka <marcel@telka.sk>
+
+ * Makevars (MSGID_BUGS_ADDRESS): Added e-mail address.
+ * sk.po: Added e-mail address for bugs. Removed some comments.
+
+2003-08-19 Marcel Telka <marcel@telka.sk>
+
+ * POTFILES.in: Added src/bus/s3c4510x.c.
+ * sk.po: Updated Slovak translation.
+
+2003-08-19 Marcel Telka <marcel@telka.sk>
+
+ * sk.po: Updated Slovak translation.
+
+2003-08-18 Marcel Telka <marcel@telka.sk>
+
+ * POTFILES.in: Added src/cmd/eraseflash.c.
+ * sk.po: Added Slovak translations.
+ * LINGUAS: Added sk.
+
+2003-08-14 Marcel Telka <marcel@telka.sk>
+
+ * POTFILES.in: Added new source files.
+
--- /dev/null
+# $Id$
+
+fr
+rw
+sk
--- /dev/null
+# $Id$
+
+include $(top_srcdir)/Makefile.rules
+
+# Makefile variables for PO directory in any package using GNU gettext.
+
+# Usually the message domain is the same as the package name.
+DOMAIN = $(PACKAGE)
+
+# These two variables depend on the location of this directory.
+subdir = po
+top_builddir = ..
+
+# These options get passed to xgettext.
+XGETTEXT_OPTIONS = --keyword=_ --keyword=N_
+
+# This is the copyright holder that gets inserted into the header of the
+# $(DOMAIN).pot file. Set this to the copyright holder of the surrounding
+# package. (Note that the msgstr strings, extracted from the package's
+# sources, belong to the copyright holder of the package.) Translators are
+# expected to transfer the copyright for their translations to this person
+# or entity, or to disclaim their copyright. The empty string stands for
+# the public domain; in this case the translators are expected to disclaim
+# their copyright.
+COPYRIGHT_HOLDER = ETC s.r.o.
+
+# This is the email address or URL to which the translators shall report
+# bugs in the untranslated strings:
+# - Strings which are not entire sentences, see the maintainer guidelines
+# in the GNU gettext documentation, section 'Preparing Strings'.
+# - Strings which use unclear terms or require additional context to be
+# understood.
+# - Strings which make invalid assumptions about notation of date, time or
+# money.
+# - Pluralisation problems.
+# - Incorrect English spelling.
+# - Incorrect formatting.
+# It can be your email address, or a mailing list address where translators
+# can write to without being subscribed, or the URL of a web page through
+# which the translators can contact you.
+MSGID_BUGS_ADDRESS = marcel@telka.sk
+
+# This is the list of locale categories, beyond LC_MESSAGES, for which the
+# message catalogs shall be used. It is usually empty.
+EXTRA_LOCALE_CATEGORIES =
--- /dev/null
+# $Id$
+src/bsdl/bsdl_bison.c
+src/bsdl/bsdl.c
+src/bsdl/bsdl_flex.c
+src/bsdl/bsdl_sem.c
+src/bsdl/vhdl_bison.c
+src/bsdl/vhdl_flex.c
+src/bus/au1500.c
+src/bus/avr32.c
+src/bus/bcm1250.c
+src/bus/bf533_ezkit.c
+src/bus/bf533_stamp.c
+src/bus/bf537_stamp.c
+src/bus/bf548_ezkit.c
+src/bus/bf561_ezkit.c
+src/bus/bscoach.c
+src/bus/buses.c
+src/bus/ejtag.c
+src/bus/fjmem.c
+src/bus/generic_bus.c
+src/bus/h7202.c
+src/bus/ixp425.c
+src/bus/jopcyc.c
+src/bus/lh7a400.c
+src/bus/mpc5200.c
+src/bus/mpc824x.c
+src/bus/ppc405ep.c
+src/bus/ppc440gx_ebc8.c
+src/bus/prototype.c
+src/bus/pxa2x0.c
+src/bus/readmem.c
+src/bus/s3c4510x.c
+src/bus/sa1110.c
+src/bus/sh7727.c
+src/bus/sh7750r.c
+src/bus/sh7751r.c
+src/bus/sharc21065l.c
+src/bus/slsup3.c
+src/bus/tx4925.c
+src/bus/writemem.c
+src/bus/zefant-xs3.c
+src/cmd/bit.c
+src/cmd/bsdl.c
+src/cmd/bus.c
+src/cmd/cable.c
+src/cmd/cmd.c
+src/cmd/debug.c
+src/cmd/detect.c
+src/cmd/detectflash.c
+src/cmd/discovery.c
+src/cmd/dr.c
+src/cmd/endian.c
+src/cmd/eraseflash.c
+src/cmd/flashmem.c
+src/cmd/frequency.c
+src/cmd/get.c
+src/cmd/help.c
+src/cmd/idcode.c
+src/cmd/include.c
+src/cmd/initbus.c
+src/cmd/instruction.c
+src/cmd/parse.c
+src/cmd/part.c
+src/cmd/peekpoke.c
+src/cmd/pod.c
+src/cmd/print.c
+src/cmd/quit.c
+src/cmd/readmem.c
+src/cmd/register.c
+src/cmd/reset.c
+src/cmd/salias.c
+src/cmd/scan.c
+src/cmd/set.c
+src/cmd/shell.c
+src/cmd/shift.c
+src/cmd/signal.c
+src/cmd/svf.c
+src/cmd/test.c
+src/cmd/usleep.c
+src/cmd/writemem.c
+src/flash/amd.c
+src/flash/amd_flash.c
+src/flash/cfi.c
+src/flash/detectflash.c
+src/flash/flash.c
+src/flash/intel.c
+src/flash/jedec.c
+src/flash/jedec_exp.c
+src/jim/intel_28f800b3.c
+src/jim/some_cpu.c
+src/jim/tap.c
+src/jtag.c
+src/lib/fclock.c
+src/lib/getdelim.c
+src/lib/getline.c
+src/part/bsbit.c
+src/part/data_register.c
+src/part/instruction.c
+src/part/part.c
+src/part/signal.c
+src/svf/svf_bison.c
+src/svf/svf.c
+src/svf/svf_flex.c
+src/tap/cable/arcom.c
+src/tap/cable/byteblaster.c
+src/tap/cable.c
+src/tap/cable/dlc5.c
+src/tap/cable/ea253.c
+src/tap/cable/ei012.c
+src/tap/cable/ft2232.c
+src/tap/cable/generic.c
+src/tap/cable/generic_parport.c
+src/tap/cable/generic_usbconn.c
+src/tap/cable/jim.c
+src/tap/cable/jlink.c
+src/tap/cable/keithkoep.c
+src/tap/cable/lattice.c
+src/tap/cable/mpcbdm.c
+src/tap/cable/triton.c
+src/tap/cable/ts7800.c
+src/tap/cable/usbblaster.c
+src/tap/cable/vision_ep9307.c
+src/tap/cable/wiggler2.c
+src/tap/cable/wiggler.c
+src/tap/cable/xpc.c
+src/tap/chain.c
+src/tap/detect.c
+src/tap/discovery.c
+src/tap/parport.c
+src/tap/parport/direct.c
+src/tap/parport/ppdev.c
+src/tap/parport/ppi.c
+src/tap/register.c
+src/tap/state.c
+src/tap/tap.c
+src/tap/usbconn.c
+src/tap/usbconn/libusb.c
+src/tap/usbconn/libftd2xx.c
+src/tap/usbconn/libftdi.c
--- /dev/null
+# Messages français pour GNU concernant jtag.
+# Copyright © 2004 Free Software Foundation, Inc.
+# This file is distributed under the same license as the PACKAGE package.
+# Michel Robitaille <robitail@IRO.UMontreal.CA>, traducteur depuis/since 1996.
+#
+msgid ""
+msgstr ""
+"Project-Id-Version: GNU jtag 0.5.1\n"
+"Report-Msgid-Bugs-To: marcel@telka.sk\n"
+"POT-Creation-Date: 2009-04-08 22:49+0200\n"
+"PO-Revision-Date: 2004-05-10 08:00-0500\n"
+"Last-Translator: Michel Robitaille <robitail@IRO.UMontreal.CA>\n"
+"Language-Team: French <traduc@traduc.org>\n"
+"MIME-Version: 1.0\n"
+"Content-Type: text/plain; charset=ISO-8859-1\n"
+"Content-Transfer-Encoding: 8-bit\n"
+"Plural-Forms: nplurals=2; plural=(n > 1);\n"
+
+#: bsdl_bison.y:257
+msgid "Unsupported BSDL construct found"
+msgstr ""
+
+#: bsdl_bison.y:320
+msgid "Error in Instruction_Opcode attribute statement"
+msgstr ""
+
+#: bsdl_bison.y:333
+msgid "Multiple opcode patterns are not supported, first pattern will be used"
+msgstr ""
+
+#: bsdl_bison.y:364
+msgid "Error in Opcode List"
+msgstr ""
+
+#: bsdl_bison.y:450
+msgid "Error in Boundary Cell description"
+msgstr ""
+
+#: bsdl_bison.y:574
+#, fuzzy
+msgid "Error in ISC_Pin_Behavior Definition"
+msgstr "ERREUR: longueur de l'enregistrement invalide!\n"
+
+#: bsdl_bison.y:586
+#, fuzzy
+msgid "Error in ISC_Fixed_System_Pins Definition"
+msgstr "ERREUR: longueur de l'enregistrement invalide!\n"
+
+#: bsdl_bison.y:613
+#, fuzzy
+msgid "Error in ISC_Security Definition"
+msgstr "ERREUR: longueur de l'enregistrement invalide!\n"
+
+#: bsdl_bison.y:647
+#, fuzzy
+msgid "Error in ISC_Flow Definition"
+msgstr "ERREUR: longueur de l'enregistrement invalide!\n"
+
+#: bsdl_bison.y:811
+#, fuzzy
+msgid "Error in ISC_Procedure Definition"
+msgstr "ERREUR: longueur de l'enregistrement invalide!\n"
+
+#: bsdl_bison.y:835
+#, fuzzy
+msgid "Error in ISC_Action Definition"
+msgstr "ERREUR: longueur de l'enregistrement invalide!\n"
+
+#: bsdl_bison.y:875 bsdl_bison.y:883 vhdl_bison.y:657
+#, c-format
+msgid "Line %d, %s.\n"
+msgstr ""
+
+#: bsdl_bison.y:1114 bsdl_bison.y:1182 bsdl_bison.y:1241 bsdl_bison.y:1276
+#: bsdl_bison.y:1314 bsdl_bison.y:1464 bsdl_bison.y:1514 bsdl_flex.l:443
+#: bsdl_flex.l:529 src/bsdl/bsdl_sem.c:169 src/bsdl/bsdl_sem.c:545
+#: vhdl_bison.y:821 vhdl_bison.y:922 vhdl_bison.y:1010 vhdl_bison.y:1042
+#: vhdl_bison.y:1062 vhdl_bison.y:1092 vhdl_bison.y:1109 vhdl_bison.y:1127
+#: vhdl_flex.l:373 vhdl_flex.l:460 svf_flex.l:369
+#, fuzzy, c-format
+msgid "Out of memory, %s line %i\n"
+msgstr "Mémoire épuisée\n"
+
+#: src/bsdl/bsdl.c:138
+#, fuzzy
+msgid "No JTAG chain available\n"
+msgstr "(pas de description disponible)"
+
+#: src/bsdl/bsdl.c:143
+msgid "Chain without any parts\n"
+msgstr ""
+
+#: src/bsdl/bsdl.c:160
+#, c-format
+msgid "Reading file '%s'\n"
+msgstr ""
+
+#: src/bsdl/bsdl.c:164
+#, fuzzy, c-format
+msgid "Unable to open BSDL file '%s'\n"
+msgstr "Incapable d'ouvrir le fichier `%s'!\n"
+
+#: src/bsdl/bsdl.c:178
+#, c-format
+msgid "BSDL file '%s' passed VHDL stage correctly\n"
+msgstr ""
+
+#: src/bsdl/bsdl.c:185
+#, c-format
+msgid "BSDL file '%s' passed BSDL stage correctly\n"
+msgstr ""
+
+#: src/bsdl/bsdl.c:192
+#, c-format
+msgid "BSDL file '%s' contains errors in VHDL stage, stopping\n"
+msgstr ""
+
+#: src/bsdl/bsdl.c:326 src/tap/detect.c:364
+#, c-format
+msgid " Filename: %s\n"
+msgstr " nom de fichier: %s\n"
+
+#: src/bsdl/bsdl.c:338
+#, fuzzy, c-format
+msgid "Cannot open directory %s\n"
+msgstr "ne peut ouvrir %s\n"
+
+#: bsdl_flex.l:405 vhdl_flex.l:333
+#, c-format
+msgid "Illegal character %c (/%03o) at line %d:\n"
+msgstr ""
+
+#: bsdl_flex.l:437 vhdl_flex.l:365
+msgid "Scanner could not be initialized\n"
+msgstr ""
+
+#: src/bsdl/bsdl_sem.c:238
+msgid "No IDCODE specification found.\n"
+msgstr ""
+
+#: src/bsdl/bsdl_sem.c:640
+msgid "IDCODE matched\n"
+msgstr ""
+
+#: src/bsdl/bsdl_sem.c:643
+msgid "IDCODE mismatch\n"
+msgstr ""
+
+#: src/bsdl/bsdl_sem.c:690
+msgid "BSDL stage reported errors, aborting.\n"
+msgstr ""
+
+#: src/bsdl/bsdl_sem.c:698
+#, c-format
+msgid "Got IDCODE: %s\n"
+msgstr ""
+
+#: vhdl_bison.y:219
+msgid "Improper Entity declaration"
+msgstr ""
+
+#: vhdl_bison.y:220
+msgid "Check if source file is BSDL"
+msgstr ""
+
+#: vhdl_bison.y:230 vhdl_bison.y:238
+#, fuzzy
+msgid "Syntax Error"
+msgstr "ERREUR de syntaxe!\n"
+
+#: vhdl_bison.y:248
+msgid "Improper Port declaration"
+msgstr ""
+
+#: vhdl_bison.y:280
+#, fuzzy
+msgid "Error in Package declaration(s)"
+msgstr "ERREUR: longueur de l'enregistrement invalide!\n"
+
+#: vhdl_bison.y:305
+#, fuzzy
+msgid "Error in Standard Package"
+msgstr "ERREUR: longueur de l'enregistrement invalide!\n"
+
+#: vhdl_bison.y:323
+#, fuzzy
+msgid "Error in Standard Declarations"
+msgstr "ERREUR: longueur de l'enregistrement invalide!\n"
+
+#: vhdl_bison.y:334
+#, fuzzy
+msgid "Error in Attribute type identification"
+msgstr "ERREUR: longueur de l'enregistrement invalide!\n"
+
+#: vhdl_bison.y:350
+#, fuzzy
+msgid "Error in Type definition"
+msgstr "ERREUR: longueur de l'enregistrement invalide!\n"
+
+#: vhdl_bison.y:366
+#, fuzzy
+msgid "Error in Bit definition"
+msgstr "ERREUR: longueur de l'enregistrement invalide!\n"
+
+#: vhdl_bison.y:377
+#, fuzzy
+msgid "Error in Record Definition"
+msgstr "ERREUR: longueur de l'enregistrement invalide!\n"
+
+#: vhdl_bison.y:390
+#, fuzzy
+msgid "Error in defered constant"
+msgstr "ERREUR: longueur de l'enregistrement invalide!\n"
+
+#: vhdl_bison.y:402
+#, fuzzy
+msgid "Error in Package Body definition"
+msgstr "ERREUR: longueur de l'enregistrement invalide!\n"
+
+#: vhdl_bison.y:414
+#, fuzzy
+msgid "Error in Cell Constant definition"
+msgstr "ERREUR: longueur de l'enregistrement invalide!\n"
+
+#: vhdl_bison.y:425
+#, fuzzy
+msgid "Error in Cell Data Record"
+msgstr "Error: échec de la connexion par cable!\n"
+
+#: vhdl_bison.y:434
+#, fuzzy
+msgid "Error in Cell_Type Function field"
+msgstr "Error: échec de la connexion par cable!\n"
+
+#: vhdl_bison.y:441
+#, fuzzy
+msgid "Error in BScan_Inst Instruction field"
+msgstr "Error: échec de la connexion par cable!\n"
+
+#: vhdl_bison.y:448
+#, fuzzy
+msgid "Error in Constant CAP data source field"
+msgstr "ERREUR: longueur de l'enregistrement invalide!\n"
+
+#: vhdl_bison.y:472
+#, fuzzy
+msgid "Error in User-Defined Package declarations"
+msgstr "ERREUR: longueur de l'enregistrement invalide!\n"
+
+#: vhdl_bison.y:479
+msgid "Unknown VHDL statement"
+msgstr ""
+
+#: vhdl_bison.y:502
+#, fuzzy
+msgid "Error in Attribute specification"
+msgstr "ERREUR: longueur de l'enregistrement invalide!\n"
+
+#: vhdl_bison.y:651
+#, c-format
+msgid "In Package %s, Line %d, %s.\n"
+msgstr ""
+
+#: vhdl_bison.y:664
+msgid "Too many errors"
+msgstr ""
+
+#: vhdl_flex.l:518
+#, fuzzy, c-format
+msgid "Cannot open file %s or %s.\n"
+msgstr "ne peut ouvrir %s\n"
+
+#: src/bus/au1500.c:126
+#, fuzzy, c-format
+msgid "AU1500 compatible bus driver via BSR (JTAG part No. %d)\n"
+msgstr "pilote de bus compatible Intel SA-1110 via BSR (JTAG no de pièce %d)\n"
+
+#: src/bus/au1500.c:297
+msgid "AU1500 BUS Driver via BSR"
+msgstr ""
+
+#: src/bus/avr32.c:127
+#, c-format
+msgid "%s(%d): error, "
+msgstr ""
+
+#: src/bus/avr32.c:150
+#, fuzzy, c-format
+msgid "%s: instr=%s\n"
+msgstr "%-13s %s\n"
+
+#: src/bus/avr32.c:153
+#, fuzzy, c-format
+msgid "%s: ret=%s\n"
+msgstr "%-13s %s\n"
+
+#: src/bus/avr32.c:166
+#, fuzzy, c-format
+msgid "%s: data=%s\n"
+msgstr "%-13s %s\n"
+
+#: src/bus/avr32.c:169
+#, c-format
+msgid "%s: data out=%s\n"
+msgstr ""
+
+#: src/bus/avr32.c:190
+#, c-format
+msgid "%s: slave=%01x, addr=%08x, %s\n"
+msgstr ""
+
+#: src/bus/avr32.c:215 src/bus/avr32.c:240 src/bus/avr32.c:311
+#: src/bus/avr32.c:322
+#, c-format
+msgid "%s: data=%08x\n"
+msgstr ""
+
+#: src/bus/avr32.c:282
+#, c-format
+msgid "%s: addr=%08x, mode=%s\n"
+msgstr ""
+
+#: src/bus/avr32.c:370
+#, fuzzy, c-format
+msgid "%s: read status %08x\n"
+msgstr "%s: état invalide: %2X\n"
+
+#: src/bus/avr32.c:401
+#, c-format
+msgid "%s: status=%08x\n"
+msgstr ""
+
+#: src/bus/avr32.c:569
+#, fuzzy, c-format
+msgid "AVR32 multi-mode bus driver (JTAG part No. %d)\n"
+msgstr "pilote de bus compatible Intel SA-1110 via BSR (JTAG no de pièce %d)\n"
+
+#: src/bus/avr32.c:651
+#, fuzzy, c-format
+msgid "%s:addr=%08x\n"
+msgstr "adr: 0x%08X"
+
+#: src/bus/avr32.c:760
+msgid ""
+"Atmel AVR32 multi-mode bus driver, requires <mode> parameter\n"
+" valid <mode> parameters:\n"
+" x8: 8 bit bus for the uncached HSB area, via OCD registers\n"
+" x16: 16 bit bus for the uncached HSB area, via OCD "
+"registers\n"
+" x32: 32 bit bus for the uncached HSB area, via OCD "
+"registers\n"
+" OCD : 32 bit bus for the OCD registers\n"
+" HSBC: 32 bit bus for the cached HSB area, via SAB\n"
+" HSBU: 32 bit bus for the uncached HSB area, via SAB"
+msgstr ""
+
+#: src/bus/bcm1250.c:120
+#, c-format
+msgid "Broadcom BCM1250 compatible bus driver via BSR (JTAG part No. %d)\n"
+msgstr ""
+"Pilote de bus compatible Broadcom BCM1250 via BSR (JTAG No de pièce %d)\n"
+
+#: src/bus/bcm1250.c:488
+msgid "Broadcom BCM1250 compatible bus driver via BSR"
+msgstr "pilote de bus compatible Broadcom BCM1250 via BSR"
+
+#: src/bus/bf533_ezkit.c:143
+#, fuzzy, c-format
+msgid "Blackfin BF533 EZKit compatible bus driver via BSR (JTAG part No. %d)\n"
+msgstr ""
+"Pilote de bus compatible Broadcom BCM1250 via BSR (JTAG No de pièce %d)\n"
+
+#: src/bus/bf533_ezkit.c:324
+msgid "Blackfin BF533 EZKit board bus driver"
+msgstr ""
+
+#: src/bus/bf533_stamp.c:144
+#, fuzzy, c-format
+msgid "Blackfin BF533 compatible bus driver via BSR (JTAG part No. %d)\n"
+msgstr ""
+"Pilote de bus compatible Broadcom BCM1250 via BSR (JTAG No de pièce %d)\n"
+
+#: src/bus/bf533_stamp.c:325
+msgid "Blackfin BF533 Stamp board bus driver"
+msgstr ""
+
+#: src/bus/bf537_stamp.c:317 src/bus/pxa2x0.c:242
+#, fuzzy, c-format
+msgid "%s (JTAG part No. %d)\n"
+msgstr "pilote de bus compatible Intel SA-1110 via BSR (JTAG no de pièce %d)\n"
+
+#: src/bus/bf537_stamp.c:337
+#, fuzzy
+msgid "Blackfin BF537 Stamp board bus driver via BSR"
+msgstr ""
+"Pilote de bus compatible Broadcom BCM1250 via BSR (JTAG No de pièce %d)\n"
+
+#: src/bus/bf537_stamp.c:347
+#, fuzzy
+msgid "Blackfin BF537 EZ-KIT board bus driver via BSR"
+msgstr ""
+"Pilote de bus compatible Broadcom BCM1250 via BSR (JTAG No de pièce %d)\n"
+
+#: src/bus/bf537_stamp.c:357
+#, fuzzy
+msgid "Blackfin BF527 EZ-KIT board bus driver via BSR"
+msgstr ""
+"Pilote de bus compatible Broadcom BCM1250 via BSR (JTAG No de pièce %d)\n"
+
+#: src/bus/bf537_stamp.c:367
+#, fuzzy
+msgid "Blackfin BF538F EZ-KIT board bus driver"
+msgstr ""
+"Pilote de bus compatible Broadcom BCM1250 via BSR (JTAG No de pièce %d)\n"
+
+#: src/bus/bf537_stamp.c:377
+#, fuzzy
+msgid "Blackfin BF526 EZ-KIT board bus driver"
+msgstr ""
+"Pilote de bus compatible Broadcom BCM1250 via BSR (JTAG No de pièce %d)\n"
+
+#: src/bus/bf548_ezkit.c:142
+#, fuzzy, c-format
+msgid ""
+"Blackfin BF548 EZ-KIT compatible bus driver via BSR (JTAG part No. %d)\n"
+msgstr ""
+"Pilote de bus compatible Broadcom BCM1250 via BSR (JTAG No de pièce %d)\n"
+
+#: src/bus/bf548_ezkit.c:313
+msgid "Blackfin BF548 EZ-KIT board bus driver"
+msgstr ""
+
+#: src/bus/bf561_ezkit.c:147
+#, fuzzy, c-format
+msgid ""
+"Blackfin BF561 EZ-KIT compatible bus driver via BSR (JTAG part No. %d)\n"
+msgstr ""
+"pilote de bus compatible Hitachi SH7751R via BSR (JTAG no de pièce %d)\n"
+
+#: src/bus/bf561_ezkit.c:336
+msgid "Blackfin BF561 EZ-KIT board bus driver"
+msgstr ""
+
+#: src/bus/bscoach.c:146
+#, fuzzy, c-format
+msgid ""
+"Goepel electronic Boundary Scan Coach compatible bus driver via BSR (JTAG "
+"part No. %d)\n"
+msgstr ""
+"pilote de bus compatible Hitachi SH7727 via BSR (JTAG no de pièce %d)\n"
+
+#: src/bus/bscoach.c:382
+msgid ""
+"Goepel Boundary Scan Coach compatible bus driver for flash programming via "
+"BSR"
+msgstr ""
+
+#: src/bus/buses.c:167 src/cmd/include.c:74 src/cmd/parse.c:59
+#: src/cmd/parse.c:93 src/cmd/scan.c:88 src/cmd/shell.c:62 src/jtag.c:407
+#: src/jtag.c:426 src/jtag.c:450 src/tap/detect.c:271
+#: src/tap/usbconn/libusb.c:150 src/tap/usbconn/libftd2xx.c:283
+#: src/tap/usbconn/libftdi.c:252
+#, c-format
+msgid "Out of memory\n"
+msgstr "Mémoire épuisée\n"
+
+#: src/bus/ejtag.c:149
+#, fuzzy, c-format
+msgid "EJTAG compatible bus driver via PrAcc (JTAG part No. %d)\n"
+msgstr "pilote de bus compatible Intel SA-1110 via BSR (JTAG no de pièce %d)\n"
+
+#: src/bus/ejtag.c:176
+#, c-format
+msgid "%s(%d) EJADDRESS, EJDATA or EJCONTROL register not found\n"
+msgstr ""
+
+#: src/bus/ejtag.c:195
+#, c-format
+msgid "%s(%d) Reset occurred, ctrl=%s\n"
+msgstr ""
+
+#: src/bus/ejtag.c:202
+#, c-format
+msgid "%s(%d) No processor access, ctrl=%s\n"
+msgstr ""
+
+#: src/bus/ejtag.c:215
+#, c-format
+msgid "%s(%d) PrAcc bad alignment: addr=0x%08x\n"
+msgstr ""
+
+#: src/bus/ejtag.c:229
+#, c-format
+msgid "%s(%d) PrAcc write: addr=0x%08x data=0x%08x\n"
+msgstr ""
+
+#: src/bus/ejtag.c:236
+#, c-format
+msgid "%s(%d) Unknown write addr=0x%08x data=0x%08x\n"
+msgstr ""
+
+#: src/bus/ejtag.c:291
+#, c-format
+msgid "%s(%d) EJCONTROL or EJIMPCODE register not found\n"
+msgstr ""
+
+#: src/bus/ejtag.c:481
+#, c-format
+msgid "%s(%d) Failed to enter debug mode, ctrl=%s\n"
+msgstr ""
+
+#: src/bus/ejtag.c:677
+#, fuzzy
+msgid "EJTAG compatible bus driver via PrAcc"
+msgstr "pilote de bus compatible Intel PXA2x0 via BSR"
+
+#: src/bus/fjmem.c:91 src/bus/fjmem.c:106 src/bus/fjmem.c:187
+#: src/bus/fjmem.c:193 src/bus/fjmem.c:295 src/cmd/instruction.c:95
+#: src/cmd/register.c:71 src/cmd/register.c:85 src/cmd/salias.c:72
+#: src/cmd/signal.c:88 src/tap/detect.c:212 src/tap/detect.c:235
+#: src/tap/tap.c:53
+#, c-format
+msgid "out of memory\n"
+msgstr "mémoire épuisée\n"
+
+#: src/bus/fjmem.c:101 src/cmd/instruction.c:84
+#, c-format
+msgid "invalid instruction length\n"
+msgstr "longueur d'instruction invalide\n"
+
+#: src/bus/fjmem.c:367
+#, c-format
+msgid "Wrong parameter specification: %s\n"
+msgstr ""
+
+#: src/bus/fjmem.c:424
+#, c-format
+msgid "Parameter for instruction opcode missing.\n"
+msgstr ""
+
+#: src/bus/fjmem.c:473
+#, fuzzy, c-format
+msgid "fjmem FPGA bus driver via USER register (JTAG part No. %d)\n"
+msgstr "pilote de bus compatible Intel SA-1110 via BSR (JTAG no de pièce %d)\n"
+
+#: src/bus/fjmem.c:595 src/bus/fjmem.c:627 src/bus/fjmem.c:661
+#: src/bus/fjmem.c:696 src/bus/jopcyc.c:549 src/bus/jopcyc.c:584
+#: src/bus/jopcyc.c:615 src/bus/jopcyc.c:647 src/bus/zefant-xs3.c:692
+#: src/bus/zefant-xs3.c:759 src/bus/zefant-xs3.c:807 src/bus/zefant-xs3.c:859
+#, c-format
+msgid "Address out of range\n"
+msgstr ""
+
+#: src/bus/fjmem.c:713
+msgid ""
+"FPGA JTAG memory bus driver via USER register, requires parameters:\n"
+" opcode=<USERx OPCODE> [len=<FJMEM REG LEN>]"
+msgstr ""
+
+#: src/bus/generic_bus.c:40 src/cmd/get.c:63 src/cmd/set.c:77
+#: src/cmd/test.c:65
+#, c-format
+msgid "signal '%s' not found\n"
+msgstr "signal '%s' non repéré\n"
+
+#: src/bus/ixp425.c:121
+#, c-format
+msgid "Intel IXP425 compatible bus driver via BSR (JTAG part No. %d)\n"
+msgstr "pilote de bus compatible Intel IXP425 via BSR (JTAG No de pièce %d)\n"
+
+#: src/bus/ixp425.c:291
+msgid "Intel IXP425 compatible bus driver via BSR"
+msgstr "pilote de bus compatible Intel IXP425 via BSR"
+
+#: src/bus/jopcyc.c:349
+#, fuzzy, c-format
+msgid ""
+"JOP.design Cyclone Board compatible bus driver via BSR (JTAG part No. %d)\n"
+msgstr ""
+"Pilote de bus compatible Broadcom BCM1250 via BSR (JTAG No de pièce %d)\n"
+
+#: src/bus/jopcyc.c:677
+#, fuzzy
+msgid "JOP.design Cyclone Board compatible bus driver via BSR"
+msgstr "pilote de bus compatible Broadcom BCM1250 via BSR"
+
+#: src/bus/lh7a400.c:142
+#, fuzzy, c-format
+msgid "Sharp LH7A400 compatible bus driver via BSR (JTAG part No. %d)\n"
+msgstr ""
+"pilote de bus compatible Hitachi SH7750R via BSR (JTAG no de pièce %d)\n"
+
+#: src/bus/lh7a400.c:320
+#, fuzzy
+msgid "Sharp LH7A400 compatible bus driver via BSR (flash access only!)"
+msgstr ""
+"pilote de bus compatible Hitachi SH7750R via BSR (JTAG no de pièce %d)\n"
+
+#: src/bus/mpc5200.c:147
+#, fuzzy, c-format
+msgid "Freescale MPC5200 compatible bus driver via BSR (JTAG part No. %d)\n"
+msgstr "pilote de bus compatible Intel PXA2x0 via BSR (JTAG No de pièce %d)\n"
+
+#: src/bus/mpc5200.c:161
+msgid "LocalPlus Bus"
+msgstr ""
+
+#: src/bus/mpc5200.c:376
+#, fuzzy
+msgid "Freescale MPC5200 compatible bus driver via BSR, parameter: [mux]"
+msgstr "pilote de bus compatible Intel PXA2x0 via BSR"
+
+#: src/bus/mpc824x.c:107
+#, c-format
+msgid ""
+" Bus width 64 exists in mpc824x, but not supported by UrJTAG currently\n"
+msgstr ""
+
+#: src/bus/mpc824x.c:111
+#, c-format
+msgid " Only 8,32 and 64 bus width are supported for Banks 0 and 1\n"
+msgstr ""
+
+#: src/bus/mpc824x.c:120
+#, c-format
+msgid ""
+"Usage: initbus mpc824x [width=WIDTH] [revbits] [dbgAddr] [dbgData]\n"
+"\n"
+" WIDTH data bus width - 8, 32, 64 (default 8)\n"
+" revbits reverse bits in data bus (default - no)\n"
+" dbgAddr display address bus state (default - no)\n"
+" dbgData display data bus state (default - no)\n"
+msgstr ""
+
+#: src/bus/mpc824x.c:140
+#, c-format
+msgid " Using default bus width %d\n"
+msgstr ""
+
+#: src/bus/mpc824x.c:235
+#, fuzzy, c-format
+msgid "Motorola MPC824x compatible bus driver via BSR (JTAG part No. %d)\n"
+msgstr "pilote de bus compatible Intel PXA2x0 via BSR (JTAG No de pièce %d)\n"
+
+#: src/bus/mpc824x.c:256
+msgid "Base ROM Interface (Bank 1)"
+msgstr ""
+
+#: src/bus/mpc824x.c:265 src/bus/mpc824x.c:283
+msgid "Base ROM Interface (Bank 0)"
+msgstr ""
+
+#: src/bus/mpc824x.c:311
+#, c-format
+msgid "Warning: unhandled bus width: %i\n"
+msgstr ""
+
+#: src/bus/mpc824x.c:325
+#, c-format
+msgid "Addr [%2d:0]: %06X "
+msgstr ""
+
+#: src/bus/mpc824x.c:370
+#, c-format
+msgid "Data WR [%d:0]: %08X "
+msgstr ""
+
+#: src/bus/mpc824x.c:407
+#, c-format
+msgid "Data RD [%d:0]: %08X "
+msgstr ""
+
+#: src/bus/mpc824x.c:519
+#, fuzzy
+msgid "Motorola MPC824x compatible bus driver via BSR"
+msgstr "pilote de bus compatible Intel PXA2x0 via BSR"
+
+#: src/bus/ppc405ep.c:116
+#, fuzzy, c-format
+msgid "IBM PowerPC 405EP compatible bus driver via BSR (JTAG part No. %d)\n"
+msgstr "pilote de bus compatible Intel IXP425 via BSR (JTAG No de pièce %d)\n"
+
+#: src/bus/ppc405ep.c:267
+#, fuzzy
+msgid "IBM PowerPC 405EP compatible bus driver via BSR"
+msgstr "pilote de bus compatible Intel IXP425 via BSR"
+
+#: src/bus/ppc440gx_ebc8.c:118
+#, fuzzy, c-format
+msgid ""
+"IBM PowerPC 440GX 8-bit compatible bus driver via BSR (JTAG part No. %d)\n"
+msgstr "pilote de bus compatible Intel IXP425 via BSR (JTAG No de pièce %d)\n"
+
+#: src/bus/ppc440gx_ebc8.c:269
+#, fuzzy
+msgid "IBM PowerPC 440GX 8-bit EBC compatible bus driver via BSR"
+msgstr "pilote de bus compatible Intel IXP425 via BSR"
+
+#: src/bus/prototype.c:129
+#, c-format
+msgid "value %s not defined for parameter %s\n"
+msgstr ""
+
+#: src/bus/prototype.c:138
+#, fuzzy, c-format
+msgid "signal '%s' is not found\n"
+msgstr "signal '%s' non repéré\n"
+
+#: src/bus/prototype.c:166
+#, c-format
+msgid "parameter %s is unknown\n"
+msgstr ""
+
+#: src/bus/prototype.c:195
+#, c-format
+msgid "parameters alsb=<signal> and/or amsb=<signal> are not defined\n"
+msgstr ""
+
+#: src/bus/prototype.c:243
+#, c-format
+msgid "parameters dlsb=<signal> and/or dmsb=<signal> are not defined\n"
+msgstr ""
+
+#: src/bus/prototype.c:248
+#, c-format
+msgid "parameter cs=<signal> or ncs=<signal> is not defined\n"
+msgstr ""
+
+#: src/bus/prototype.c:253
+#, c-format
+msgid "parameter oe=<signal> or noe=<signal> is not defined\n"
+msgstr ""
+
+#: src/bus/prototype.c:258
+#, c-format
+msgid "parameter we=<signal> or nwe=<signal> is not defined\n"
+msgstr ""
+
+#: src/bus/prototype.c:283
+#, fuzzy, c-format
+msgid "Configurable prototype bus driver via BSR (JTAG part No. %d)\n"
+msgstr "pilote de bus compatible Intel SA-1110 via BSR (JTAG no de pièce %d)\n"
+
+#: src/bus/prototype.c:436
+msgid ""
+"Configurable prototype bus driver via BSR, requires parameters:\n"
+" amsb=<addr MSB> alsb=<addr LSB> dmsb=<data MSB> dlsb=<data LSB>\n"
+" ncs=<CS#>|cs=<CS> noe=<OE#>|oe=<OE> nwe=<WE#>|we=<WE> [amode=auto|"
+"x8|x16|x32]"
+msgstr ""
+
+#: src/bus/pxa2x0.c:302 src/bus/pxa2x0.c:392
+msgid "Static Chip Select 0"
+msgstr "Sélection statique du module 0"
+
+#: src/bus/pxa2x0.c:364
+msgid "Memory Mapped registers (Memory Ctl)"
+msgstr "Registres mémoire mappé (Ctl Mémoire)"
+
+#: src/bus/pxa2x0.c:457
+msgid "PXA270 internal address space (cfg, SRAM)"
+msgstr ""
+
+#: src/bus/pxa2x0.c:475
+msgid "PXA270 SDRAM space (4x 64MB)"
+msgstr ""
+
+#: src/bus/pxa2x0.c:702
+msgid "Intel PXA2x0 compatible bus driver via BSR"
+msgstr "pilote de bus compatible Intel PXA2x0 via BSR"
+
+#: src/bus/pxa2x0.c:718
+#, fuzzy
+msgid "Intel PXA27x compatible bus driver via BSR"
+msgstr "pilote de bus compatible Intel PXA2x0 via BSR"
+
+#: src/bus/readmem.c:55 src/bus/writemem.c:49 src/flash/detectflash.c:56
+#, c-format
+msgid "Error: Missing bus driver!\n"
+msgstr "Erreur: pilote de bus manquant!\n"
+
+#: src/bus/readmem.c:62 src/bus/writemem.c:56
+#, c-format
+msgid "Error: Bus width detection failed\n"
+msgstr "ERREUR: détection de la largeur de bus a échoué\n"
+
+#: src/bus/readmem.c:68 src/bus/writemem.c:62
+#, c-format
+msgid "Unknown bus width!\n"
+msgstr "Largeur de bus inconnu!\n"
+
+#: src/bus/readmem.c:75 src/bus/writemem.c:69
+#, c-format
+msgid "address: 0x%08X\n"
+msgstr "adresse: 0x%08X\n"
+
+#: src/bus/readmem.c:76 src/bus/writemem.c:70
+#, c-format
+msgid "length: 0x%08X\n"
+msgstr "longueur: 0x%08X\n"
+
+#: src/bus/readmem.c:79 src/bus/writemem.c:73
+#, c-format
+msgid "length is 0.\n"
+msgstr "longeur est 0.\n"
+
+#: src/bus/readmem.c:85
+#, c-format
+msgid "reading:\n"
+msgstr "lecture en cours:\n"
+
+#: src/bus/readmem.c:105 src/bus/writemem.c:87 src/flash/flash.c:160
+#: src/flash/flash.c:205 src/flash/flash.c:308 src/flash/flash.c:358
+#, c-format
+msgid "addr: 0x%08X"
+msgstr "adr: 0x%08X"
+
+#: src/bus/readmem.c:113 src/bus/writemem.c:122 src/flash/flash.c:220
+#, c-format
+msgid ""
+"\n"
+"Done.\n"
+msgstr ""
+"\n"
+"Complété.\n"
+
+#: src/bus/s3c4510x.c:182
+#, fuzzy, c-format
+msgid ""
+"Samsung S3C4510B compatibile bus driver via BSR (JTAG part No. %d) RCS0=%"
+"ubit\n"
+msgstr ""
+"pilote de bus compatible Samsung S3C4510B via BSR (JTAG no de pièce %d)\n"
+
+#: src/bus/s3c4510x.c:414
+msgid "Samsung S3C4510B compatible bus driver via BSR"
+msgstr "pilote de bus compatible Samsung S3C4510B via BSR"
+
+#: src/bus/sa1110.c:128
+#, c-format
+msgid "Intel SA-1110 compatible bus driver via BSR (JTAG part No. %d)\n"
+msgstr "pilote de bus compatible Intel SA-1110 via BSR (JTAG no de pièce %d)\n"
+
+#: src/bus/sa1110.c:305
+msgid "Intel SA-1110 compatible bus driver via BSR"
+msgstr "pilote de bus compatible Intel SA-1110 via BSR"
+
+#: src/bus/sh7727.c:138
+#, c-format
+msgid "Hitachi SH7727 compatible bus driver via BSR (JTAG part No. %d)\n"
+msgstr ""
+"pilote de bus compatible Hitachi SH7727 via BSR (JTAG no de pièce %d)\n"
+
+#: src/bus/sh7727.c:165
+#, c-format
+msgid "Error: Invalid bus width (MD3 = MD4 = 0)!\n"
+msgstr "ERREUR: largeur de bus invalide (MD3 = MD4 = 0)!\n"
+
+#: src/bus/sh7727.c:346
+msgid "Hitachi SH7727 compatible bus driver via BSR"
+msgstr "pilote de bus compatible Hitachi SH7727 via BSR"
+
+#: src/bus/sh7750r.c:136
+#, c-format
+msgid "Hitachi SH7750R compatible bus driver via BSR (JTAG part No. %d)\n"
+msgstr ""
+"pilote de bus compatible Hitachi SH7750R via BSR (JTAG no de pièce %d)\n"
+
+#: src/bus/sh7750r.c:328
+msgid "Hitachi SH7750R compatible bus driver via BSR"
+msgstr "pilote de bus compatible Hitachi SH7750R via BSR"
+
+#: src/bus/sh7751r.c:130
+#, c-format
+msgid "Hitachi SH7751R compatible bus driver via BSR (JTAG part No. %d)\n"
+msgstr ""
+"pilote de bus compatible Hitachi SH7751R via BSR (JTAG no de pièce %d)\n"
+
+#: src/bus/sh7751r.c:316
+msgid "Hitachi SH7751R compatible bus driver via BSR"
+msgstr "pilote de bus compatible Hitachi SH7751R via BSR"
+
+#: src/bus/sharc21065l.c:123
+#, fuzzy, c-format
+msgid ""
+"Analog Device's SHARC 21065L compatible bus driver via BSR (JTAG part No. %"
+"d)\n"
+msgstr "pilote de bus compatible Intel SA-1110 via BSR (JTAG no de pièce %d)\n"
+
+#: src/bus/sharc21065l.c:135
+msgid "Boot Memory Select"
+msgstr ""
+
+#: src/bus/sharc21065l.c:309
+#, fuzzy
+msgid "SHARC_21065L compatible bus driver via BSR"
+msgstr "pilote de bus compatible Intel SA-1110 via BSR"
+
+#: src/bus/slsup3.c:167
+#, fuzzy, c-format
+msgid "SLS UP3 bus driver via BSR (JTAG part No. %d)\n"
+msgstr "pilote de bus compatible Intel SA-1110 via BSR (JTAG no de pièce %d)\n"
+
+#: src/bus/slsup3.c:178
+msgid "Flash Memory (2 MByte) byte mode"
+msgstr ""
+
+#: src/bus/slsup3.c:187
+msgid "SRAM 128KByte (64K x 16)"
+msgstr ""
+
+#: src/bus/slsup3.c:196
+msgid "LCD Display (RS select by A0)"
+msgstr ""
+
+#: src/bus/slsup3.c:423
+#, fuzzy
+msgid "SLS UP3 compatible bus driver via BSR"
+msgstr "pilote de bus compatible Intel IXP425 via BSR"
+
+#: src/bus/tx4925.c:140
+#, fuzzy, c-format
+msgid "Toshiba TX4925 compatible bus driver via BSR (JTAG part No. %d)\n"
+msgstr "pilote de bus compatible Intel IXP425 via BSR (JTAG No de pièce %d)\n"
+
+#: src/bus/tx4925.c:311
+#, fuzzy
+msgid "Toshiba TX4925 compatible bus driver via BSR"
+msgstr "pilote de bus compatible Intel IXP425 via BSR"
+
+#: src/bus/writemem.c:79
+#, fuzzy, c-format
+msgid "writing:\n"
+msgstr "lecture en cours:\n"
+
+#: src/bus/writemem.c:91
+#, c-format
+msgid "Data not on word boundary, NOT SUPPORTED!"
+msgstr ""
+
+#: src/bus/writemem.c:93
+#, fuzzy, c-format
+msgid "Unexpected end of file!\n"
+msgstr "ERREUR: fin prématurée du fichier\n"
+
+#: src/bus/writemem.c:94
+#, fuzzy, c-format
+msgid "Addr: 0x%08X\n"
+msgstr "adr: 0x%08X\n"
+
+#: src/bus/writemem.c:99
+#, c-format
+msgid "Short read: bc=0x%X\n"
+msgstr ""
+
+#: src/bus/zefant-xs3.c:423
+#, fuzzy, c-format
+msgid ""
+"Simple Solutions Zefant-XS3 Board compatible bus driver via BSR (JTAG part "
+"No. %d)\n"
+msgstr ""
+"pilote de bus compatible Hitachi SH7727 via BSR (JTAG no de pièce %d)\n"
+
+#: src/bus/zefant-xs3.c:737 src/bus/zefant-xs3.c:783 src/bus/zefant-xs3.c:837
+#: src/bus/zefant-xs3.c:946
+#, fuzzy, c-format
+msgid "Component type not supported\n"
+msgstr "Flash non supporté!\n"
+
+#: src/bus/zefant-xs3.c:953
+#, fuzzy
+msgid "Simple Solutions Zefant-XS3 Board compatible bus driver via BSR"
+msgstr "pilote de bus compatible Samsung S3C4510B via BSR"
+
+#: src/cmd/bit.c:61
+#, c-format
+msgid "%s: invalid number of parameters (%d) for command '%s'\n"
+msgstr ""
+
+#: src/cmd/bit.c:66
+#, c-format
+msgid "%s: cable test failed for command '%s'\n"
+msgstr ""
+
+#: src/cmd/bit.c:71 src/cmd/bus.c:46 src/cmd/dr.c:48 src/cmd/get.c:52
+#: src/cmd/initbus.c:46 src/cmd/instruction.c:44 src/cmd/part.c:59
+#: src/cmd/print.c:65 src/cmd/register.c:50 src/cmd/salias.c:49
+#: src/cmd/scan.c:50 src/cmd/set.c:53 src/cmd/signal.c:50 src/cmd/test.c:54
+#, c-format
+msgid "Run \"detect\" first.\n"
+msgstr "Eéxcuer \"détecter\" d'abord.\n"
+
+#: src/cmd/bit.c:76 src/cmd/dr.c:53 src/cmd/get.c:57 src/cmd/initbus.c:51
+#: src/cmd/instruction.c:49 src/cmd/register.c:55 src/cmd/salias.c:54
+#: src/cmd/scan.c:55 src/cmd/set.c:58 src/cmd/signal.c:55 src/cmd/test.c:59
+#, c-format
+msgid "%s: no active part\n"
+msgstr "%s: aucune pièce active\n"
+
+#: src/cmd/bit.c:83
+#, fuzzy, c-format
+msgid "%s: missing Boundary Scan Register (BSR) for command '%s'\n"
+msgstr "registre Boundary Scan Register (BSR) manquant\n"
+
+#: src/cmd/bit.c:89
+#, c-format
+msgid "%s: unable to get boundary bit number for command '%s'\n"
+msgstr ""
+
+#: src/cmd/bit.c:94
+#, fuzzy, c-format
+msgid "%s: invalid boundary bit number for command '%s'\n"
+msgstr "numéro de bit de limite invalide\n"
+
+#: src/cmd/bit.c:98
+#, fuzzy, c-format
+msgid "%s: duplicate bit declaration for command '%s'\n"
+msgstr "déclaration double de bit\n"
+
+#: src/cmd/bit.c:104
+#, c-format
+msgid "%s: invalid bit type length for command '%s'\n"
+msgstr ""
+
+#: src/cmd/bit.c:129
+#, fuzzy, c-format
+msgid "%s: invalid bit type for command '%s'\n"
+msgstr "flash: séquence de commande invalide\n"
+
+#: src/cmd/bit.c:135
+#, c-format
+msgid "%s: invalid default value length for command '%s'\n"
+msgstr ""
+
+#: src/cmd/bit.c:145
+#, c-format
+msgid "%s: out of memory for command '%s'\n"
+msgstr ""
+
+#: src/cmd/bit.c:155
+#, c-format
+msgid "%s: unable to get control bit number for command '%s'\n"
+msgstr ""
+
+#: src/cmd/bit.c:159
+#, fuzzy, c-format
+msgid "%s: invalid control bit number for command '%s'\n"
+msgstr "numéro de bit de contrôle invalide\n"
+
+#: src/cmd/bit.c:166
+#, c-format
+msgid "%s: invalid control value length for command '%s'\n"
+msgstr ""
+
+#: src/cmd/bit.c:184
+#, c-format
+msgid ""
+"Usage: %s NUMBER TYPE DEFAULT SIGNAL [CBIT CVAL CSTATE]\n"
+"Define new BSR (Boundary Scan Register) bit for SIGNAL, with\n"
+"DEFAULT value.\n"
+"\n"
+"NUMBER Bit number in the BSR\n"
+"TYPE Bit type, valid values are I, O, B, C, and X\n"
+"DEFAULT Default (safe) bit value, valid values are 1, 0, ?\n"
+"SIGNAL Associated signal name\n"
+"CBIT Control bit number\n"
+"CVAL Control value\n"
+"CSTATE Control state, valid state is only Z\n"
+msgstr ""
+"Usage: %s NUMÉRO TYPE DÉFAUT SIGNAL [BITC VALC ÉTATC]\n"
+"Définir le nouveau bit du registre BSR (Boundary Scan Register) pour le "
+"SIGNAL, avec\n"
+"la valeur par DÉFAUT.\n"
+"\n"
+"NUMÉRO numéro du bit du BSR\n"
+"TYPE type de bit, valeurs permises: I, O, B, C et X\n"
+"DÉFAUT valeur du bit par défaut (sûre), valeurs permises: 1, 0, ?\n"
+"SIGNAL nom du signal associé\n"
+"BITC numéro de bit de contrôle\n"
+"VALC valeur de contrôle\n"
+"ÉTATC état de contrôle, état permis est seulement Z\n"
+
+#: src/cmd/bit.c:200
+msgid "define new BSR bit"
+msgstr "définir un nouveau bit BSR"
+
+#: src/cmd/bsdl.c:93
+#, c-format
+msgid ""
+"Usage: %s path PATHLIST\n"
+"Usage: %s test [FILE]\n"
+"Usage: %s dump [FILE]\n"
+"Usage: %s debug on|off\n"
+"Manage BSDL files\n"
+"\n"
+"PATHLIST semicolon separated list of directory paths to search for BSDL "
+"files\n"
+"FILE file containing part description in BSDL format\n"
+msgstr ""
+
+#: src/cmd/bsdl.c:106
+msgid "manage BSDL files"
+msgstr ""
+
+#: src/cmd/bus.c:54
+#, c-format
+msgid "%s: invalid bus number\n"
+msgstr "%s: numéro de bus invalide\n"
+
+#: src/cmd/bus.c:67
+#, c-format
+msgid ""
+"Usage: %s BUS\n"
+"Change active bus.\n"
+"\n"
+"BUS bus number\n"
+msgstr ""
+"Usage: %s BUS\n"
+"Changer le bus actif.\n"
+"\n"
+"BUS numéro de bus\n"
+
+#: src/cmd/bus.c:76
+msgid "change active bus"
+msgstr "changer le bus actif"
+
+#: src/cmd/cable.c:58
+#, c-format
+msgid "Note: the 'cable' command syntax changed, please read the help text\n"
+msgstr ""
+
+#: src/cmd/cable.c:76
+#, fuzzy, c-format
+msgid "Unknown cable type: %s\n"
+msgstr "Cable inconnue: %s\n"
+
+#: src/cmd/cable.c:98 src/tap/cable/ft2232.c:1580
+#: src/tap/cable/generic_parport.c:82 src/tap/cable/generic_usbconn.c:223
+#: src/tap/cable/jim.c:68 src/tap/cable/usbblaster.c:79
+#: src/tap/cable/vision_ep9307.c:201 src/tap/cable/wiggler.c:195
+#, c-format
+msgid "%s(%d) malloc failed!\n"
+msgstr ""
+
+#: src/cmd/cable.c:105 src/tap/cable/generic_parport.c:76
+#, c-format
+msgid "Error: Cable connection failed!\n"
+msgstr "Error: échec de la connexion par cable!\n"
+
+#: src/cmd/cable.c:113
+#, c-format
+msgid "Error: Cable initialization failed!\n"
+msgstr "Error: échec de l'initialisation par cable!\n"
+
+#: src/cmd/cable.c:130
+#, c-format
+msgid ""
+"Usage: %s DRIVER [DRIVER_OPTS]\n"
+"Select JTAG cable type.\n"
+"\n"
+"DRIVER name of cable\n"
+"DRIVER_OPTS options for the selected cable\n"
+"\n"
+"Type \"cable DRIVER help\" for info about options for cable DRIVER.\n"
+"\n"
+"List of supported cables:\n"
+msgstr ""
+
+#: src/cmd/cable.c:142 src/cmd/help.c:41
+#, c-format
+msgid "%-13s %s\n"
+msgstr "%-13s %s\n"
+
+#: src/cmd/cable.c:147
+msgid "select JTAG cable"
+msgstr "sélectionner le cable JTAG"
+
+#: src/cmd/cmd.c:170
+#, c-format
+msgid "Error: Cable not configured. Please use '%s' command first!\n"
+msgstr "ERREUR: cable non configuré. SVP utiliser la commande '%s' d'abord!\n"
+
+#: src/cmd/cmd.c:194
+#, c-format
+msgid "%s: syntax error!\n"
+msgstr "%s: erreur de syntaxe!\n"
+
+#: src/cmd/cmd.c:205
+#, fuzzy, c-format
+msgid "%s: Ambiguous command\n"
+msgstr "%s: commande inconnue\n"
+
+#: src/cmd/cmd.c:206 src/cmd/help.c:57
+#, c-format
+msgid "%s: unknown command\n"
+msgstr "%s: commande inconnue\n"
+
+#: src/cmd/debug.c:56
+#, c-format
+msgid ""
+"Usage: %s n\n"
+"Enabled debugging.\n"
+"\n"
+"n =1 fileio, 2=tap commands, 4 =?\n"
+msgstr ""
+
+#: src/cmd/debug.c:65
+msgid "debug jtag program"
+msgstr ""
+
+#: src/cmd/detect.c:83
+#, c-format
+msgid ""
+"Usage: %s\n"
+"Detect parts on the JTAG chain.\n"
+"\n"
+"Output from this command is a list of the detected parts.\n"
+"If no parts are detected other commands may not work properly.\n"
+msgstr ""
+"Usage: %s\n"
+"Détecter les pièces sur la chaîne JTAG.\n"
+"\n"
+"La sortie de cette commande est une liste de pièces détectées.\n"
+"Si aucune pièce n'est détectée, les autres commandes peuvent ne pas "
+"fonctionner correctement.\n"
+
+#: src/cmd/detect.c:93
+msgid "detect parts on the JTAG chain"
+msgstr "pièces détectés sur la caîne JTAG"
+
+#: src/cmd/detectflash.c:41 src/cmd/eraseflash.c:47 src/cmd/flashmem.c:49
+#: src/cmd/peekpoke.c:47 src/cmd/peekpoke.c:109 src/cmd/readmem.c:45
+#: src/cmd/writemem.c:43
+#, c-format
+msgid "Error: Bus driver missing.\n"
+msgstr "Erreur: pilote du bus manquant.\n"
+
+#: src/cmd/detectflash.c:57
+#, fuzzy, c-format
+msgid ""
+"Usage: %s ADDRESS\n"
+"Detect flash memory type connected to a part.\n"
+"\n"
+"ADDRESS Base address for memory region\n"
+msgstr ""
+"Usage: %s\n"
+"Détecter un type de mémoire flash connecté.\n"
+
+#: src/cmd/detectflash.c:66
+msgid "detect parameters of flash chips attached to a part"
+msgstr "paramètres de détection de modules flahs connectés"
+
+#: src/cmd/discovery.c:51
+#, c-format
+msgid ""
+"Usage: %s\n"
+"Discovery of unknown parts in the JTAG chain.\n"
+"\n"
+"'%s' attempts to detect these parameters of an unknown JTAG\n"
+"chain:\n"
+" 1. IR (instruction register) length\n"
+" 2. DR (data register) length for all possible instructions\n"
+"\n"
+"Warning: This may be dangerous for some parts (especially if the\n"
+"part doesn't have TRST signal).\n"
+msgstr ""
+"Usage: %s\n"
+"Découvrir les pièces inconnues sur la chaîne JTAG.\n"
+"\n"
+"'%s' tentatives pour détecter ces paramètres sur une chaîne JTAG inconnue:\n"
+" 1. IR (registre d'instruction register) longueur\n"
+" 2. DR (registre de données) longueurs de toutes les instructions possibles\n"
+"\n"
+"AVERTISSMENT: ceci peut être dangereus pour certaintes pièces (spécialement "
+"si celles-ci\n"
+"n'ont pas de signal TRST).\n"
+
+#: src/cmd/discovery.c:66
+msgid "discovery of unknown parts in the JTAG chain"
+msgstr "découverte des pièces inconnues dans la chaîne JTAG"
+
+#: src/cmd/dr.c:58
+#, c-format
+msgid "%s: part without active instruction\n"
+msgstr "%s: pièces sans instruction active\n"
+
+#: src/cmd/dr.c:62
+#, c-format
+msgid "%s: part without active data register\n"
+msgstr "%s: pièces sans registre actif de données\n"
+
+#: src/cmd/dr.c:79
+#, c-format
+msgid "%s: register length mismatch\n"
+msgstr ""
+
+#: src/cmd/dr.c:94
+#, c-format
+msgid "%s\n"
+msgstr "%s\n"
+
+#: src/cmd/dr.c:103
+#, fuzzy, c-format
+msgid ""
+"Usage: %s [DIR]\n"
+"Usage: %s BITSTRING\n"
+"Display input or output data register content or set current register.\n"
+"\n"
+"DIR requested data register; possible values: 'in' for\n"
+" input and 'out' for output; default is 'out'\n"
+"BITSTRING set current data register with BITSTRING (e.g. 01010)\n"
+msgstr ""
+"Usage: %s [DIR]\n"
+"Afficher le contenu des registres d'entrée et de sortie de données.\n"
+"\n"
+"DIR registre de données interrogé; valeurs possibles: 'in' pour\n"
+" l'entrée et 'out' pour la sortie; par défaut 'out'\n"
+
+#: src/cmd/dr.c:115
+msgid "display active data register for a part"
+msgstr "afficher le registre actif de données pour une pièce"
+
+#: src/cmd/endian.c:42
+#, c-format
+msgid "Endianess for external files: big\n"
+msgstr ""
+"système de poids fort/faible des fichiers externes: gros (big endian)\n"
+
+#: src/cmd/endian.c:44
+#, c-format
+msgid "Endianess for external files: little\n"
+msgstr ""
+"système de poids fort/faible des fichiers externes: petit (little endian)\n"
+
+#: src/cmd/endian.c:65
+#, c-format
+msgid ""
+"Usage: %s\n"
+"Set or print endianess for external files.\n"
+msgstr ""
+"Usage: %s\n"
+"Initialiser ou afficher le système de poids fort/faible (big/little endian) "
+"des fichiers externes.\n"
+
+#: src/cmd/endian.c:72
+msgid "set/print endianess"
+msgstr ""
+"Initialiser ou afficher le système de poids fort/faible (big/little endian)."
+
+#: src/cmd/eraseflash.c:65
+#, c-format
+msgid ""
+"Usage: %s ADDR BLOCKS\n"
+"Erase flash memory from ADDR.\n"
+"\n"
+"ADDR target addres for erasing block\n"
+"BLOCKS number of blocks to erase\n"
+"\n"
+"ADDR and BLOCKS could be in decimal or hexadecimal (prefixed with 0x) form.\n"
+"\n"
+"Supported Flash Memories:\n"
+msgstr ""
+"Usage: %s ADR BLOCS\n"
+"Effacer la mémoire flash à partir de l'ADResse.\n"
+"\n"
+"ADR ADRessse cible pour effacer un bloc\n"
+"BLOCS numbre de blocs à effacer\n"
+"\n"
+"ADR et BLOCS peuvent être en valeur décimal ou hexadécimal (préfixé avec "
+"0x).\n"
+"\n"
+"Mémoires flash supportées:\n"
+
+#: src/cmd/eraseflash.c:77 src/cmd/flashmem.c:97
+#, c-format
+msgid ""
+"%s\n"
+" %s\n"
+msgstr ""
+"%s\n"
+" %s\n"
+
+#: src/cmd/eraseflash.c:82
+msgid "erase flash memory by number of blocks"
+msgstr "effacer la mémoire flash par numéro de bloc"
+
+#: src/cmd/flashmem.c:64 src/cmd/writemem.c:52 src/jtag.c:414
+#, c-format
+msgid "Unable to open file `%s'!\n"
+msgstr "Incapable d'ouvrir le fichier `%s'!\n"
+
+#: src/cmd/flashmem.c:82
+#, fuzzy, c-format
+msgid ""
+"Usage: %s ADDR FILENAME [noverify]\n"
+"Usage: %s FILENAME [noverify]\n"
+"Program FILENAME content to flash memory.\n"
+"\n"
+"ADDR target address for raw binary image\n"
+"FILENAME name of the input file\n"
+"%-10s FILENAME is in MS .bin format (for WinCE)\n"
+"%-10s if specified, verification is skipped\n"
+"\n"
+"ADDR could be in decimal or hexadecimal (prefixed with 0x) form.\n"
+"\n"
+"Supported Flash Memories:\n"
+msgstr ""
+"Usage: %s ADR FICHIER\n"
+"Usage: %s FICHIER\n"
+"Programmer le contenu de la mémoire flash avec le FICHIER.\n"
+"\n"
+"ADR ADResse cible d'une image binaire brute\n"
+"FICHIER nom du FICHIER d'entrée\n"
+"%-10s FICHIER est un format MS .bin (pour WinCE)\n"
+"\n"
+"ADR et BLOCS peuvent être en valeur décimal ou hexadécimal (préfixé avec "
+"0x).\n"
+"\n"
+"Mémoires flahs supportées:\n"
+
+#: src/cmd/flashmem.c:102
+msgid "burn flash memory with data from a file"
+msgstr "brûler la mémoire flahs avec les données à partir d'un fichier"
+
+#: src/cmd/frequency.c:43
+#, c-format
+msgid "Current TCK frequency is %u Hz\n"
+msgstr "Fréquence courant TCK est %u Hz\n"
+
+#: src/cmd/frequency.c:53
+#, c-format
+msgid "Setting TCK frequency to %u Hz\n"
+msgstr "Initialisation de la fréquence TCK à %u Hz\n"
+
+#: src/cmd/frequency.c:63
+#, c-format
+msgid ""
+"Usage: %s [FREQ]\n"
+"Change TCK frequency to FREQ or print current TCK frequency.\n"
+"\n"
+"FREQ is in hertz. It's a maximum TCK frequency for JTAG interface.\n"
+"In some cases the TCK frequency is less than FREQ, but the frequency\n"
+"is never more than FREQ. Maximum supported frequency depends on JTAG\n"
+"adapter.\n"
+"\n"
+"FREQ must be an unsigned integer. Minimum allowed frequency is 1 Hz.\n"
+"Use 0 for FREQ to disable frequency limit.\n"
+msgstr ""
+"Usage: %s [FRÉQUENCE]\n"
+"Modifier ou afficher la fréquence courante TCK.\n"
+"\n"
+"FRÉQUENCE est en hertz. C'est la férquence maximale TCK pour une interface "
+"JTAG.\n"
+"Dans certains cas, la fréquence TCK est inférieure à la FRÉQUENCE mais "
+"jamais\n"
+"plus que la FRÉQUENCE. La fréquence maximum supportée dépend de l'adapteur "
+"JTAG.\n"
+"\n"
+"FRÉQUENCE doit être un entier non signé. La fréquence minimale permise est 1 "
+"Hz.\n"
+"Utilise 0 comme valeur pour désactiver la limite de fréquence.\n"
+
+#: src/cmd/frequency.c:78
+msgid "setup JTAG frequency"
+msgstr "initialisation de la fréquence JTAG"
+
+#: src/cmd/get.c:68
+#, c-format
+msgid "%s = %d\n"
+msgstr "%s = %d\n"
+
+#: src/cmd/get.c:77
+#, c-format
+msgid ""
+"Usage: %s SIGNAL\n"
+"Get signal state from output BSR (Boundary Scan Register).\n"
+"\n"
+"SIGNAL signal name (from JTAG declaration file)\n"
+msgstr ""
+"Usage: %s SIGNAL\n"
+"Obtenir l'état du signal de la sortie BSR (Boundary Scan Register).\n"
+"\n"
+"SIGNAL nom du signal (à partir du fichier de déclaration JTAG)\n"
+
+#: src/cmd/get.c:86
+msgid "get external signal value"
+msgstr "obtenir la valeur externe du signal"
+
+#: src/cmd/help.c:39
+#, c-format
+msgid ""
+"Command list:\n"
+"\n"
+msgstr ""
+"Liste de commandes:\n"
+"\n"
+
+#: src/cmd/help.c:41
+msgid "(no description available)"
+msgstr "(pas de description disponible)"
+
+#: src/cmd/help.c:42
+#, c-format
+msgid ""
+"\n"
+"Type \"help COMMAND\" for details about a particular command.\n"
+msgstr ""
+"\n"
+"Taper \"help COMMANDE\" pour des détails au sujet d'une commande "
+"particulière.\n"
+
+#: src/cmd/help.c:66
+#, c-format
+msgid ""
+"Usage: %s [COMMAND]\n"
+"Print short help for COMMAND, or list of available commands.\n"
+msgstr ""
+"Usage: %s [COMMANDE]\n"
+"Afficher une aide sommaire de la COMMANDE ou lister les commandes "
+"disponibles.\n"
+
+#: src/cmd/help.c:73
+msgid "display this help"
+msgstr "afficher l'aide-mémoire"
+
+#: src/cmd/idcode.c:50
+#, c-format
+msgid "Reading %d bytes if idcode\n"
+msgstr ""
+
+#: src/cmd/idcode.c:59
+#, c-format
+msgid ""
+"Usage: %s [BYTES]\n"
+"Read [BYTES]|all IDCODEs of all parts in a JTAG chain.\n"
+"\n"
+"BYTES must be an unsigned integer, Use 0 for BYTES to read all bytes\n"
+msgstr ""
+
+#: src/cmd/idcode.c:68
+#, fuzzy
+msgid "Read IDCODEs of all parts in a JTAG chain"
+msgstr "découverte des pièces inconnues dans la chaîne JTAG"
+
+#: src/cmd/include.c:49
+#, c-format
+msgid "Please use the 'include' command instead of 'script'\n"
+msgstr ""
+
+#: src/cmd/include.c:99
+#, fuzzy, c-format
+msgid "Unable to open file `%s go=%d'!\n"
+msgstr "Incapable d'ouvrir le fichier `%s'!\n"
+
+#: src/cmd/include.c:113
+#, fuzzy, c-format
+msgid ""
+"Usage: %s FILENAME [n] \n"
+"Run command sequence n times from external FILENAME.\n"
+"\n"
+"FILENAME Name of the file with commands\n"
+msgstr ""
+"Usage: %s FICHIER\n"
+"Exécuter une séquence de commandes à partir d'un FICHIER externe.\n"
+"\n"
+"FICHIER nom du fichier contenant les commande\n"
+
+#: src/cmd/include.c:134
+msgid "include command sequence from external repository"
+msgstr "inclure une séquence de commandes à partir du dépôt externe"
+
+#: src/cmd/include.c:153
+msgid "run command sequence from external file"
+msgstr "exécuter une séquence de commandes à partir d'un FICHIER externe"
+
+#: src/cmd/initbus.c:59
+#, fuzzy, c-format
+msgid "bus alloc/attach failed!\n"
+msgstr "initialisation du bus a échoué!\n"
+
+#: src/cmd/initbus.c:64
+#, c-format
+msgid "bus initialization failed!\n"
+msgstr "initialisation du bus a échoué!\n"
+
+#: src/cmd/initbus.c:70
+#, fuzzy, c-format
+msgid "Initialized bus %d, active bus %d\n"
+msgstr "initialiser le pilote du bus pour la pièce active."
+
+#: src/cmd/initbus.c:76
+#, c-format
+msgid "Unknown bus: %s\n"
+msgstr "bus inconnu: %s\n"
+
+#: src/cmd/initbus.c:87
+#, c-format
+msgid ""
+"Usage: %s BUSNAME\n"
+"Initialize new bus driver for active part.\n"
+"\n"
+"BUSNAME Name of the bus\n"
+"\n"
+"List of available buses:\n"
+msgstr ""
+"Usage: %s BUS\n"
+"Initialiser le pilote du bus pour la pièce active.\n"
+"\n"
+"BUS nom du bus\n"
+"\n"
+"Liste des bus disponibles:\n"
+
+#: src/cmd/initbus.c:96
+#, c-format
+msgid "%-10s %s\n"
+msgstr "%-10s %s\n"
+
+#: src/cmd/initbus.c:101
+msgid "initialize bus driver for active part"
+msgstr "initialiser le pilote du bus pour la pièce active."
+
+#: src/cmd/instruction.c:58
+#, c-format
+msgid "%s: unknown instruction '%s'\n"
+msgstr "%s: instruction inconnue '%s'\n"
+
+#: src/cmd/instruction.c:69
+#, c-format
+msgid "instruction length is already set and used\n"
+msgstr "la longueur d'instruction est déjà initialisée et utilisée\n"
+
+#: src/cmd/instruction.c:89
+#, c-format
+msgid "Instruction '%s' already defined\n"
+msgstr "Instruction '%s' est déjà définie\n"
+
+#: src/cmd/instruction.c:104
+#, c-format
+msgid "unknown data register '%s'\n"
+msgstr "registre de données inconnu '%s'\n"
+
+#: src/cmd/instruction.c:118
+#, c-format
+msgid ""
+"Usage: %s INSTRUCTION\n"
+"Usage: %s length LENGTH\n"
+"Usage: %s INSTRUCTION CODE REGISTER\n"
+"Change active INSTRUCTION for a part or declare new instruction.\n"
+"\n"
+"INSTRUCTION instruction name (e.g. BYPASS)\n"
+"LENGTH common instruction length\n"
+"CODE instruction code (e.g. 11111)\n"
+"REGISTER default data register for instruction (e.g. BR)\n"
+msgstr ""
+"Usage: %s INSTRUCTION\n"
+"Usage: %s longueur LONGUEUR\n"
+"Usage: %s INSTRUCTION CODE REGISTRE\n"
+"Changer l'INSTRUCTION active pour une pièce ou déclarer une nouvelle "
+"instruction.\n"
+"\n"
+"INSTRUCTION nom de l'instruction (i.e. BYPASS)\n"
+"LENGTH longueur commune d'instruction\n"
+"CODE code d'instruction (i.e. 11111)\n"
+"REGISTRE registre de données pour l'instruction (i.e. BR)\n"
+
+#: src/cmd/instruction.c:132
+msgid "change active instruction for a part or declare new instruction"
+msgstr ""
+"changer l'instruction active pour une pièce ou déclarer une nouvelle "
+"instruction."
+
+#: src/cmd/part.c:81
+#, c-format
+msgid "%s: invalid part number\n"
+msgstr "%s: numéro de pièce invalide\n"
+
+#: src/cmd/part.c:94
+#, fuzzy, c-format
+msgid ""
+"Usage: %s PART\n"
+"Change active part for current JTAG chain.\n"
+"\n"
+"PART part number | alias\n"
+msgstr ""
+"Usage: %s PIÈCE\n"
+"Changer la pièce active pour la chaîne courant JTAG.\n"
+"\n"
+"PIÈCE numéro de pièce\n"
+
+#: src/cmd/part.c:103
+msgid "change active part for current JTAG chain"
+msgstr "changer la pièce active pour la chaîne courante JTAG"
+
+#: src/cmd/peekpoke.c:62
+#, fuzzy, c-format
+msgid "bus_read(0x%08x) = 0x%02X (%i)\n"
+msgstr "bus_read(0x%08x) = 0x%08X (%i)\n"
+
+#: src/cmd/peekpoke.c:66
+#, fuzzy, c-format
+msgid "bus_read(0x%08x) = 0x%04X (%i)\n"
+msgstr "bus_read(0x%08x) = 0x%08X (%i)\n"
+
+#: src/cmd/peekpoke.c:69
+#, c-format
+msgid "bus_read(0x%08x) = 0x%08X (%i)\n"
+msgstr "bus_read(0x%08x) = 0x%08X (%i)\n"
+
+#: src/cmd/peekpoke.c:80
+#, c-format
+msgid ""
+"Usage: %s ADDR\n"
+"Read a single word (bus width size).\n"
+"\n"
+"ADDR address to read from\n"
+"\n"
+"ADDR could be in decimal or hexadecimal (prefixed with 0x) form.\n"
+"\n"
+msgstr ""
+"Usage: %s ADR\n"
+"Lire un mot simple (taille de la largeur de bus).\n"
+"\n"
+"ADR adresse de lecture\n"
+"\n"
+"ADR peut être en décimal ou hexadécimal (préfixé par 0x).\n"
+"\n"
+
+#: src/cmd/peekpoke.c:92
+msgid "read a single word"
+msgstr "lire un mot simple"
+
+#: src/cmd/peekpoke.c:131
+#, fuzzy, c-format
+msgid ""
+"Usage: %s ADDR VAL [ADDR VAL] ... \n"
+"Write a single word (bus width size).\n"
+"\n"
+"ADDR address to write\n"
+"VAL value to write\n"
+"\n"
+"ADDR and VAL could be in decimal or hexadecimal (prefixed with 0x) form.\n"
+"\n"
+msgstr ""
+"Usage: %s ADR VAL\n"
+"Écrire un mot simple (taille de la largeur de bus).\n"
+"\n"
+"ADR adresse d'écriture\n"
+"VAL valeur à écrire\n"
+"\n"
+"ADR et VAL peuvent être en décimal ou en hexadécimal (préfixé par 0x).\n"
+"\n"
+
+#: src/cmd/peekpoke.c:144
+msgid "write a single word"
+msgstr "écrire un mot simple"
+
+#: src/cmd/pod.c:78
+#, c-format
+msgid ""
+"Usage: %s SIGNAL=# [SIGNAL=# ...]\n"
+"Set state of POD signal(s) to 0 or 1.\n"
+"\n"
+"SIGNAL\t TCK,TMS, TDI, TRST, or RESET\n"
+"# 0 or 1\n"
+msgstr ""
+
+#: src/cmd/pod.c:88
+msgid "Set state of POD signal(s)"
+msgstr ""
+
+#: src/cmd/print.c:98
+#, c-format
+msgid " Active %%-%ds %%-%ds"
+msgstr ""
+
+#: src/cmd/print.c:102 src/cmd/print.c:105 src/cmd/print.c:109
+#: src/cmd/print.c:137 src/cmd/print.c:140 src/cmd/print.c:144
+#, c-format
+msgid "(%d) String conversion failed!\n"
+msgstr "(%d) la conversion de chaîne a échoué!\n"
+
+#: src/cmd/print.c:103 src/cmd/print.c:107 src/cmd/print.c:138
+#: src/cmd/print.c:142
+msgid "Instruction"
+msgstr "Instruction"
+
+#: src/cmd/print.c:103 src/cmd/print.c:107 src/cmd/print.c:138
+#: src/cmd/print.c:142
+msgid "Register"
+msgstr "Registre"
+
+#: src/cmd/print.c:117
+#, fuzzy, c-format
+msgid " %%c %%-%ds %%-%ds\n"
+msgstr " No. %%-%ds %%-%ds %%-%ds %%-%ds %%-%ds\n"
+
+#: src/cmd/print.c:133
+#, fuzzy, c-format
+msgid " No. %%-%ds %%-%ds %%-%ds %%-%ds %%-%ds"
+msgstr " No. %%-%ds %%-%ds %%-%ds %%-%ds %%-%ds\n"
+
+#: src/cmd/print.c:138 src/cmd/print.c:142
+msgid "Manufacturer"
+msgstr "Manufacturier"
+
+#: src/cmd/print.c:138 src/cmd/print.c:142
+msgid "Part"
+msgstr "Pièce"
+
+#: src/cmd/print.c:138 src/cmd/print.c:142
+msgid "Stepping"
+msgstr "Pas"
+
+#: src/cmd/print.c:156
+#, fuzzy, c-format
+msgid " %3d %s "
+msgstr " %3d "
+
+#: src/cmd/print.c:158 src/part/part.c:330
+#, c-format
+msgid " %3d "
+msgstr " %3d "
+
+#: src/cmd/print.c:170
+#, c-format
+msgid ""
+"\n"
+"Active bus:\n"
+"*%d: "
+msgstr ""
+"\n"
+"Bus actif:\n"
+"*%d: "
+
+#: src/cmd/print.c:175
+#, c-format
+msgid "Error in bus area discovery at 0x%08llX\n"
+msgstr "ERREUR dans la zone de découverte du bus à 0x%08llX\n"
+
+#: src/cmd/print.c:180
+#, c-format
+msgid "\tstart: 0x%08X, length: 0x%08llX, data width: %d bit, (%s)\n"
+msgstr ""
+"\tdébut: 0x%08X, longueur: 0x%08llX, largeur des données: %d bits, (%s)\n"
+
+#: src/cmd/print.c:182
+#, c-format
+msgid "\tstart: 0x%08X, length: 0x%08llX, data width: %d bit\n"
+msgstr "\tdébut: 0x%08X, longueur: 0x%08llX, largeur des données: %d bits\n"
+
+#: src/cmd/print.c:197
+#, c-format
+msgid "*%d: "
+msgstr "*%d: "
+
+#: src/cmd/print.c:199
+#, c-format
+msgid "%d: "
+msgstr "%d: "
+
+#: src/cmd/print.c:210
+#, fuzzy, c-format
+msgid ""
+"Usage: %s [chain|bus|signals|instructions]\n"
+"Display JTAG chain status.\n"
+"\n"
+"Display list of the parts connected to the JTAG chain including\n"
+"part number and current (active) instruction and data register.\n"
+msgstr ""
+"Usage: %s [chaîne|bus]\n"
+"Afficher l'état de la chaîne JTAG.\n"
+"\n"
+"Afficher la liste des pièces connectés à la chaîne JTAG incluant\n"
+"le numéro de pièce, l'instruiction courante (active) et le registre de "
+"données.\n"
+
+#: src/cmd/print.c:220
+msgid "display JTAG chain list/status"
+msgstr "afficher la liste/état de la chaîne JTAG"
+
+#: src/cmd/quit.c:44
+#, c-format
+msgid ""
+"Usage: %s\n"
+"Exit from %s.\n"
+msgstr ""
+"Usage: %s\n"
+"Quitter à partir de %s.\n"
+
+#: src/cmd/quit.c:51
+msgid "exit and terminate this session"
+msgstr "quitter et terminer la session"
+
+#: src/cmd/readmem.c:54
+#, c-format
+msgid "Unable to create file `%s'!\n"
+msgstr "Incapable de créer le fichier `%s'!\n"
+
+#: src/cmd/readmem.c:67
+#, c-format
+msgid ""
+"Usage: %s ADDR LEN FILENAME\n"
+"Copy device memory content starting with ADDR to FILENAME file.\n"
+"\n"
+"ADDR start address of the copied memory area\n"
+"LEN copied memory length\n"
+"FILENAME name of the output file\n"
+"\n"
+"ADDR and LEN could be in decimal or hexadecimal (prefixed with 0x) form.\n"
+msgstr ""
+"Usage: %s ADR LONG FICHIER\n"
+"Copier le contenu de la mémoire du périphérique débutant à l'ADR dans le "
+"FICHIER.\n"
+"\n"
+"ADR adresse de départ de la zone mémoire à copier\n"
+"LONG longeur de la zone mémoire à copier\n"
+"FICHIER nom du fichier de sortie\n"
+"\n"
+"ADR et LONG peuvent être en décimal ou hexadécimal (préfixe par 0x).\n"
+
+#: src/cmd/readmem.c:80
+msgid "read content of the memory and write it to file"
+msgstr "lire le contenu de la mémoire et l'écrire dans le fichier"
+
+#: src/cmd/register.c:65
+#, c-format
+msgid "Data register '%s' already defined\n"
+msgstr "registre de données '%s' est déjà défini\n"
+
+#: src/cmd/register.c:103
+#, c-format
+msgid ""
+"Usage: %s NAME LENGTH\n"
+"Define new data register with specified NAME and LENGTH.\n"
+"\n"
+"NAME Data register name\n"
+"LENGTH Data register length\n"
+msgstr ""
+"Usage: %s NOM LONGUEUR\n"
+"Définir un nouveau registre de données avec un NOM et une LONGUER "
+"spécifique.\n"
+"\n"
+"NOM nom du registre de données\n"
+"LONGUEUR longueur du registre de données\n"
+
+#: src/cmd/register.c:113
+msgid "define new data register for a part"
+msgstr "définir un nouveau registre de données pour la pièce"
+
+#: src/cmd/reset.c:53
+#, fuzzy, c-format
+msgid ""
+"Usage: %s\n"
+"Reset current JTAG chain.\n"
+msgstr "changer la pièce active pour la chaîne courante JTAG"
+
+#: src/cmd/reset.c:60
+#, fuzzy
+msgid "reset JTAG chain"
+msgstr "sélectionner le cable JTAG"
+
+#: src/cmd/salias.c:60 src/cmd/signal.c:73
+#, c-format
+msgid "Signal '%s' already defined\n"
+msgstr "Signal '%s' déjà défini\n"
+
+#: src/cmd/salias.c:66
+#, fuzzy, c-format
+msgid "Signal '%s' not found\n"
+msgstr "signal '%s' non repéré\n"
+
+#: src/cmd/salias.c:86
+#, fuzzy, c-format
+msgid ""
+"Usage: %s ALIAS SIGNAL\n"
+"Define new signal ALIAS as alias for existing SIGNAL.\n"
+"\n"
+"ALIAS New signal alias name\n"
+"SIGNAL Existing signal name\n"
+msgstr ""
+"Usage: %s SIGNAL [BROCHES...]\n"
+"Définir un nouveau signal avec le nom SIGNAL pour la pièce.\n"
+"\n"
+"SIGNAL nouveau nom de signal\n"
+"BROCHES liste debroches pour le signal (non utilisé)\n"
+
+#: src/cmd/salias.c:96
+#, fuzzy
+msgid "define an alias for a signal"
+msgstr "définir un nouveau signal pour une pièce"
+
+#: src/cmd/scan.c:64 src/part/part.c:186 src/part/part.c:223
+#, c-format
+msgid "%s(%s:%d) Boundary Scan Register (BSR) not found\n"
+msgstr "%s(%s:%d) Boundary Scan Register (BSR) non repéré\n"
+
+#: src/cmd/scan.c:78
+#, c-format
+msgid "%s(%s:%d) Part can't SAMPLE\n"
+msgstr ""
+
+#: src/cmd/scan.c:113
+#, fuzzy, c-format
+msgid ": %d > %d\n"
+msgstr "%s = %d\n"
+
+#: src/cmd/scan.c:128
+#, c-format
+msgid ""
+"Usage: %s [SIGNAL]* \n"
+"Read BSR and show changes since last scan.\n"
+msgstr ""
+
+#: src/cmd/scan.c:135
+msgid "read BSR and show changes since last scan"
+msgstr ""
+
+#: src/cmd/set.c:89
+#, c-format
+msgid ""
+"Usage: %s SIGNAL DIR [DATA]\n"
+"Set signal state in input BSR (Boundary Scan Register).\n"
+"\n"
+"SIGNAL signal name (from JTAG declaration file)\n"
+"DIR requested signal direction; possible values: 'in' or 'out'\n"
+"DATA desired output signal value ('0' or '1'); used only if DIR\n"
+" is 'out'\n"
+msgstr ""
+"Usage: %s SIGNAL DIR [DONNÉE]\n"
+"Initialiser l'état du signal à l'entrée du BSR (Boundary Scan Register).\n"
+"\n"
+"SIGNAL nom du signal (à partir du fichier de déclaration JTAG)\n"
+"DIR direction requise du signal; valeurs possibles: 'in' ou 'out'\n"
+"DATA valeur de sortie du signal ('0' ou '1'); utilisé seulement si "
+"DIR\n"
+" est à 'out'\n"
+
+#: src/cmd/set.c:101
+msgid "set external signal value"
+msgstr "initialiser la valeur d'un signal externe"
+
+#: src/cmd/shell.c:84
+#, c-format
+msgid ""
+"Usage: %s cmmd\n"
+"Shell out to os for a command.\n"
+"\n"
+"CMMD OS Shell Command\n"
+msgstr ""
+
+#: src/cmd/shell.c:93
+msgid "shell cmmd"
+msgstr ""
+
+#: src/cmd/shift.c:60
+#, c-format
+msgid ""
+"Usage: %s\n"
+"Usage: %s\n"
+"Shift instruction or data register through JTAG chain.\n"
+msgstr ""
+"Usage: %s\n"
+"Usage: %s\n"
+"Décaler le registre d'instruction ou de données à travers la chaîne JTAG.\n"
+
+#: src/cmd/shift.c:68
+msgid "shift data/instruction registers through JTAG chain"
+msgstr "décaler le registre instruction/données à travers la chaîne JTAG"
+
+#: src/cmd/signal.c:102
+#, fuzzy, c-format
+msgid ""
+"Usage: %s SIGNAL [PIN#]\n"
+"Define new signal with name SIGNAL for a part.\n"
+"\n"
+"SIGNAL\t\tNew signal name\n"
+"PIN# \tList of pin # for a signal\n"
+msgstr ""
+"Usage: %s SIGNAL [BROCHES...]\n"
+"Définir un nouveau signal avec le nom SIGNAL pour la pièce.\n"
+"\n"
+"SIGNAL nouveau nom de signal\n"
+"BROCHES liste debroches pour le signal (non utilisé)\n"
+
+#: src/cmd/signal.c:112
+msgid "define new signal for a part"
+msgstr "définir un nouveau signal pour une pièce"
+
+#: src/cmd/svf.c:63
+#, c-format
+msgid "%s: cannot open file '%s' for reading\n"
+msgstr ""
+
+#: src/cmd/svf.c:76
+#, c-format
+msgid ""
+"Usage: %s FILE [stop] [progress] [ref_freq=<frequency>]\n"
+"Execute svf commands from FILE.\n"
+"stop : Command execution stops upon TDO mismatch.\n"
+"progress : Continually displays progress status.\n"
+"ref_freq : Use <frequency> as the reference for 'RUNTEST xxx SEC' commands\n"
+"\n"
+"FILE file containing SVF commands\n"
+msgstr ""
+
+#: src/cmd/svf.c:88
+msgid "execute svf commands from file"
+msgstr ""
+
+#: src/cmd/test.c:78
+#, fuzzy, c-format
+msgid "<FAIL>%s = %d\n"
+msgstr "%s = %d\n"
+
+#: src/cmd/test.c:89
+#, fuzzy, c-format
+msgid ""
+"Usage: %s SIGNAL 0/1\n"
+"Test signal state from output BSR (Boundary Scan Register).\n"
+"\n"
+"SIGNAL signal name (from JTAG declaration file)\n"
+msgstr ""
+"Usage: %s SIGNAL\n"
+"Obtenir l'état du signal de la sortie BSR (Boundary Scan Register).\n"
+"\n"
+"SIGNAL nom du signal (à partir du fichier de déclaration JTAG)\n"
+
+#: src/cmd/test.c:98
+#, fuzzy
+msgid "test external signal value"
+msgstr "obtenir la valeur externe du signal"
+
+#: src/cmd/usleep.c:55
+#, c-format
+msgid ""
+"Usage: %s USECS\n"
+"Sleep some number of microseconds.\n"
+msgstr ""
+
+#: src/cmd/usleep.c:62
+msgid "Sleep some number of microseconds"
+msgstr ""
+
+#: src/cmd/writemem.c:65
+#, fuzzy, c-format
+msgid ""
+"Usage: %s ADDR LEN FILENAME\n"
+"Write to device memory starting at ADDR the FILENAME file.\n"
+"\n"
+"ADDR start address of the written memory area\n"
+"LEN written memory length\n"
+"FILENAME name of the input file\n"
+"\n"
+"ADDR and LEN could be in decimal or hexadecimal (prefixed with 0x) form.\n"
+"NOTE: This is NOT useful for FLASH programming!\n"
+msgstr ""
+"Usage: %s ADR LONG FICHIER\n"
+"Copier le contenu de la mémoire du périphérique débutant à l'ADR dans le "
+"FICHIER.\n"
+"\n"
+"ADR adresse de départ de la zone mémoire à copier\n"
+"LONG longeur de la zone mémoire à copier\n"
+"FICHIER nom du fichier de sortie\n"
+"\n"
+"ADR et LONG peuvent être en décimal ou hexadécimal (préfixe par 0x).\n"
+
+#: src/cmd/writemem.c:79
+msgid "write content of file to the memory"
+msgstr ""
+
+#: src/flash/amd.c:279
+#, c-format
+msgid ""
+"Chip: AMD Flash\n"
+"\tManufacturer: "
+msgstr ""
+"Module: AMD Flash\n"
+"\tManufacturier: "
+
+#: src/flash/amd.c:283 src/flash/amd.c:311 src/flash/amd.c:326
+#: src/flash/amd.c:344 src/flash/amd_flash.c:236
+#, c-format
+msgid ""
+"\n"
+"\tChip: "
+msgstr ""
+"\n"
+"\tModule: "
+
+#: src/flash/amd.c:305 src/flash/amd.c:320 src/flash/amd.c:338
+#: src/flash/amd.c:353 src/flash/amd_flash.c:247
+#, c-format
+msgid "Unknown (ID 0x%04x)"
+msgstr "Inconnu (ID 0x%04x)"
+
+#: src/flash/amd.c:358
+#, fuzzy, c-format
+msgid "Unknown manufacturer (ID 0x%04x) Chip (ID 0x%04x)"
+msgstr "Manufacturier inconnu (ID 0x%04x)"
+
+#: src/flash/amd.c:361 src/flash/amd_flash.c:250
+#, c-format
+msgid ""
+"\n"
+"\tProtected: %04x\n"
+msgstr ""
+"\n"
+"\tProtégé: %04x\n"
+
+#: src/flash/amd.c:566 src/flash/amd.c:578 src/flash/amd.c:590
+#: src/flash/detectflash.c:106 src/flash/detectflash.c:136
+msgid "AMD/Fujitsu Standard Command Set"
+msgstr "AMD/Fujitsu Jeu standard de commandes"
+
+#: src/flash/amd.c:567
+msgid "supported: AMD 29LV640D, 29LV641D, 29LV642D; 2x16 Bit"
+msgstr "supportés: AMD 29LV640D, 29LV641D, 29LV642D; 2x16 Bit"
+
+#: src/flash/amd.c:579
+#, fuzzy
+msgid "supported: AMD 29LV800B, S92GLxxxN; MX29LV640B; 1x16 Bit"
+msgstr "supportés: AMD 29LV800B; 1x16 Bit"
+
+#: src/flash/amd.c:591
+#, fuzzy
+msgid "supported: AMD 29LV160, AMD 29LV065D, AMD 29LV040B, S92GLxxxN; 1x8 Bit"
+msgstr "supportés: AMD 29LV640D, 29LV641D, 29LV642D; 2x16 Bit"
+
+#: src/flash/amd_flash.c:230
+#, fuzzy, c-format
+msgid ""
+"Chip: AMD Flash\n"
+"\tPartNumber: "
+msgstr ""
+"Module: AMD Flash\n"
+"\tManufacturier: "
+
+#: src/flash/amd_flash.c:233
+#, c-format
+msgid "Unknown manufacturer (ID 0x%04x)"
+msgstr "Manufacturier inconnu (ID 0x%04x)"
+
+#: src/flash/amd_flash.c:240
+#, c-format
+msgid "5V Flash\n"
+msgstr ""
+
+#: src/flash/amd_flash.c:244
+#, c-format
+msgid "3V Flash\n"
+msgstr ""
+
+#: src/flash/amd_flash.c:362
+#, fuzzy
+msgid "AMD Standard Command Set"
+msgstr "AMD/Fujitsu Jeu standard de commandes"
+
+#: src/flash/amd_flash.c:363
+#, fuzzy
+msgid "supported: AMD 29LV040B, 29C040B, 1x8 Bit"
+msgstr "supportés: AMD 29LV800B; 1x16 Bit"
+
+#: src/flash/detectflash.c:87
+#, c-format
+msgid "Flash not found!\n"
+msgstr "Flash non détecté!\n"
+
+#: src/flash/detectflash.c:96
+#, c-format
+msgid "Query identification string:\n"
+msgstr "Chaîne de requêtre d'identification:\n"
+
+#: src/flash/detectflash.c:100 src/flash/detectflash.c:130
+msgid "null"
+msgstr "nul"
+
+#: src/flash/detectflash.c:103 src/flash/detectflash.c:133
+msgid "Intel/Sharp Extended Command Set"
+msgstr "Jeu étendu de commandes Intel/Sharp"
+
+#: src/flash/detectflash.c:109 src/flash/detectflash.c:139
+#: src/flash/intel.c:468 src/flash/intel.c:480 src/flash/intel.c:492
+msgid "Intel Standard Command Set"
+msgstr "Jeu standard de commandes Intel"
+
+#: src/flash/detectflash.c:112 src/flash/detectflash.c:142
+msgid "AMD/Fujitsu Extended Command Set"
+msgstr "Jeu étendu de commandes AMD/Fujitsu"
+
+#: src/flash/detectflash.c:115 src/flash/detectflash.c:145
+msgid "Mitsubishi Standard Command Set"
+msgstr "Jeu standard de commandes Mitsubishi"
+
+#: src/flash/detectflash.c:118 src/flash/detectflash.c:148
+msgid "Mitsubishi Extended Command Set"
+msgstr "Jeu étendu de commandes Mitsubishi"
+
+#: src/flash/detectflash.c:121 src/flash/detectflash.c:151
+msgid "Page Write Command Set"
+msgstr "Jeu de commande d'écriture de page"
+
+#: src/flash/detectflash.c:124 src/flash/detectflash.c:154
+#: src/flash/detectflash.c:198
+msgid "unknown!!!"
+msgstr "inconnu!!!"
+
+#: src/flash/detectflash.c:127
+#, c-format
+msgid ""
+"\tPrimary Algorithm Command Set and Control Interface ID Code: 0x%04X (%s)\n"
+msgstr ""
+"\tJeu de commandes Primary Algorithm et Code ID de contrôle d'interface: 0x%"
+"04X (%s)\n"
+
+#: src/flash/detectflash.c:157
+#, c-format
+msgid ""
+"\tAlternate Algorithm Command Set and Control Interface ID Code: 0x%04X (%"
+"s)\n"
+msgstr ""
+"\tJeu alternatif de commandes Primary Algorithm et Code ID de contrôle "
+"d'interface: 0x%04X (%s)\n"
+
+#: src/flash/detectflash.c:160
+#, c-format
+msgid "Query system interface information:\n"
+msgstr "Requête d'information d'interface système:\n"
+
+#: src/flash/detectflash.c:161
+#, c-format
+msgid "\tVcc Logic Supply Minimum Write/Erase or Write voltage: %d mV\n"
+msgstr ""
+"\tVcc logique Puissance minimum Écri/Efface ou Voltage d'écriture: %d mV\n"
+
+#: src/flash/detectflash.c:162
+#, c-format
+msgid "\tVcc Logic Supply Maximum Write/Erase or Write voltage: %d mV\n"
+msgstr ""
+"\tVcc logique Puissance maximum Écri/Efface ou Voltage d'écriture: %d mV\n"
+
+#: src/flash/detectflash.c:163
+#, c-format
+msgid "\tVpp [Programming] Supply Minimum Write/Erase voltage: %d mV\n"
+msgstr ""
+"\tVpp [Programmation] puissance minimum Écriture/Efface voltage: %d mV\n"
+
+#: src/flash/detectflash.c:164
+#, c-format
+msgid "\tVpp [Programming] Supply Maximum Write/Erase voltage: %d mV\n"
+msgstr ""
+"\tVpp [Programmation] puissance maximum Écriture/Efface voltage: %d mV\n"
+
+#: src/flash/detectflash.c:165
+#, c-format
+msgid "\tTypical timeout per single byte/word program: %d us\n"
+msgstr "\tDélai d'expiration typique par programme simple octet/mot: %d us\n"
+
+#: src/flash/detectflash.c:166
+#, c-format
+msgid "\tTypical timeout for maximum-size multi-byte program: %d us\n"
+msgstr ""
+"\tDélai d'expiration typique pour la taille maximale par programme multi-"
+"octets: %d us\n"
+
+#: src/flash/detectflash.c:167
+#, c-format
+msgid "\tTypical timeout per individual block erase: %d ms\n"
+msgstr ""
+"\tDélai d'expiration typique par effacement individuel de blocs: %d ms\n"
+
+#: src/flash/detectflash.c:168
+#, c-format
+msgid "\tTypical timeout for full chip erase: %d ms\n"
+msgstr ""
+"\tDélai d'expiration typique pour un effacement complet du module: %d ms\n"
+
+#: src/flash/detectflash.c:169
+#, c-format
+msgid "\tMaximum timeout for byte/word program: %d us\n"
+msgstr "\tDélai d'expiration maximal pour un programme octer/mot: %d us\n"
+
+#: src/flash/detectflash.c:170
+#, c-format
+msgid "\tMaximum timeout for multi-byte program: %d us\n"
+msgstr "\tDélai d'expiration maximum pour programme multi-octets: %d us\n"
+
+#: src/flash/detectflash.c:171
+#, c-format
+msgid "\tMaximum timeout per individual block erase: %d ms\n"
+msgstr ""
+"\tDélai d'expiration maximum par effacement individuel de blocs: %d ms\n"
+
+#: src/flash/detectflash.c:172
+#, c-format
+msgid "\tMaximum timeout for chip erase: %d ms\n"
+msgstr ""
+"\tDélai d'expiration maximum pour un effacement complet du module: %d ms\n"
+
+#: src/flash/detectflash.c:175
+#, c-format
+msgid "Device geometry definition:\n"
+msgstr "Définition de la géométrie du périphérique:\n"
+
+#: src/flash/detectflash.c:176
+#, c-format
+msgid "\tDevice Size: %d B (%d KiB, %d MiB)\n"
+msgstr "\tTaille du périphérique: %d O (%d KiB, %d MiB)\n"
+
+#: src/flash/detectflash.c:183
+msgid "x8"
+msgstr "x8"
+
+#: src/flash/detectflash.c:186
+msgid "x16"
+msgstr "x16"
+
+#: src/flash/detectflash.c:189
+msgid "x8/x16"
+msgstr "x8/x16"
+
+#: src/flash/detectflash.c:192
+msgid "x32"
+msgstr "x32"
+
+#: src/flash/detectflash.c:195
+msgid "x16/x32"
+msgstr "x16/x32"
+
+#: src/flash/detectflash.c:201
+#, c-format
+msgid "\tFlash Device Interface Code description: 0x%04X (%s)\n"
+msgstr "\tDescription du code de l'interface du module: 0x%04X (%s)\n"
+
+#: src/flash/detectflash.c:202
+#, c-format
+msgid "\tMaximum number of bytes in multi-byte program: %d\n"
+msgstr "\tNombre maximum d'octets d'un programme multi-octest: %d\n"
+
+#: src/flash/detectflash.c:203
+#, c-format
+msgid "\tNumber of Erase Block Regions within device: %d\n"
+msgstr ""
+"\tNumbre de régions de blocs d'effacement à l'intérieur du périphérique: %d\n"
+
+#: src/flash/detectflash.c:204
+#, c-format
+msgid "\tErase Block Region Information:\n"
+msgstr "\tInformation sur la région du bloc d'effacement:\n"
+
+#: src/flash/detectflash.c:209
+#, c-format
+msgid "\t\tRegion %d:\n"
+msgstr "\t\tRégion %d:\n"
+
+#: src/flash/detectflash.c:210
+#, c-format
+msgid "\t\t\tErase Block Size: %d B (%d KiB)\n"
+msgstr "\t\t\tTaille du bloc d'effacement: %d B (%d KiB)\n"
+
+#: src/flash/detectflash.c:213
+#, c-format
+msgid "\t\t\tNumber of Erase Blocks: %d\n"
+msgstr "\t\t\tNombre de blocs d'effacement: %d\n"
+
+#: src/flash/detectflash.c:225
+msgid "Required"
+msgstr ""
+
+#: src/flash/detectflash.c:225
+msgid "Not required"
+msgstr ""
+
+#: src/flash/detectflash.c:228
+msgid "Supported"
+msgstr ""
+
+#: src/flash/detectflash.c:228 src/flash/detectflash.c:239
+#: src/flash/detectflash.c:249
+#, fuzzy
+msgid "Not supported"
+msgstr "Flash non supporté!\n"
+
+#: src/flash/detectflash.c:231
+msgid "170-nm Floating Gate technology"
+msgstr ""
+
+#: src/flash/detectflash.c:231
+msgid "230-nm MirrorBit(tm) technology"
+msgstr ""
+
+#: src/flash/detectflash.c:232
+msgid "130-nm Floating Gate technology"
+msgstr ""
+
+#: src/flash/detectflash.c:232
+msgid "110-nm MirrorBit(tm) technology"
+msgstr ""
+
+#: src/flash/detectflash.c:233
+msgid "90-nm Floating Gate technology"
+msgstr ""
+
+#: src/flash/detectflash.c:233
+msgid "90-nm MirrorBit(tm) technology"
+msgstr ""
+
+#: src/flash/detectflash.c:236
+msgid "CS49"
+msgstr ""
+
+#: src/flash/detectflash.c:236
+msgid "CS59"
+msgstr ""
+
+#: src/flash/detectflash.c:236
+msgid "CS99"
+msgstr ""
+
+#: src/flash/detectflash.c:239
+msgid "Read only"
+msgstr ""
+
+#: src/flash/detectflash.c:239
+msgid "Read/write"
+msgstr ""
+
+#: src/flash/detectflash.c:242
+msgid "29F040 mode"
+msgstr ""
+
+#: src/flash/detectflash.c:242
+msgid "29F016 mode"
+msgstr ""
+
+#: src/flash/detectflash.c:242
+msgid "29F400 mode"
+msgstr ""
+
+#: src/flash/detectflash.c:243
+#, fuzzy
+msgid "29LV800 mode"
+msgstr "Am29LV800B"
+
+#: src/flash/detectflash.c:243
+msgid "29BDS640 mode (Software Command Locking)"
+msgstr ""
+
+#: src/flash/detectflash.c:244
+msgid "29BDD160 mode (New Sector Protect)"
+msgstr ""
+
+#: src/flash/detectflash.c:245
+msgid "29PDL128 mode (New Sector Protect + 29LV800)"
+msgstr ""
+
+#: src/flash/detectflash.c:246
+msgid "Advanced Sector Protect"
+msgstr ""
+
+#: src/flash/detectflash.c:249
+msgid "4 word Page"
+msgstr ""
+
+#: src/flash/detectflash.c:249
+msgid "8 word Page"
+msgstr ""
+
+#: src/flash/detectflash.c:249
+msgid "16 word Page"
+msgstr ""
+
+#: src/flash/detectflash.c:253
+msgid "No boot"
+msgstr ""
+
+#: src/flash/detectflash.c:253
+msgid "8x8kb sectors at top and bottom with WP control"
+msgstr ""
+
+#: src/flash/detectflash.c:254
+msgid "Bottom boot device"
+msgstr ""
+
+#: src/flash/detectflash.c:254
+msgid "Top boot device"
+msgstr ""
+
+#: src/flash/detectflash.c:255
+msgid "Uniform bottom boot device"
+msgstr ""
+
+#: src/flash/detectflash.c:255
+msgid "Uniform top boot device"
+msgstr ""
+
+#: src/flash/detectflash.c:257
+msgid "Bad value"
+msgstr ""
+
+#: src/flash/detectflash.c:265
+#, c-format
+msgid "Primary Vendor-Specific Extended Query:\n"
+msgstr ""
+
+#: src/flash/detectflash.c:266
+#, c-format
+msgid "\tMajor version number: %c\n"
+msgstr ""
+
+#: src/flash/detectflash.c:267
+#, c-format
+msgid "\tMinor version number: %c\n"
+msgstr ""
+
+#: src/flash/detectflash.c:271 src/flash/detectflash.c:274
+#, c-format
+msgid "\tAddress Sensitive Unlock: %s\n"
+msgstr ""
+
+#: src/flash/detectflash.c:279 src/flash/detectflash.c:282
+#: src/flash/detectflash.c:287 src/flash/detectflash.c:290
+#, c-format
+msgid "\tProcess Technology: %s\n"
+msgstr ""
+
+#: src/flash/detectflash.c:293
+#, c-format
+msgid "\tErase Suspend: %s\n"
+msgstr ""
+
+#: src/flash/detectflash.c:295
+#, fuzzy, c-format
+msgid "\tSector Protect: Not supported\n"
+msgstr "Flash non supporté!\n"
+
+#: src/flash/detectflash.c:297
+#, c-format
+msgid "\tSector Protect: %d sectors per group\n"
+msgstr ""
+
+#: src/flash/detectflash.c:299 src/flash/detectflash.c:301
+#, c-format
+msgid "\tSector Temporary Unprotect: %s\n"
+msgstr ""
+
+#: src/flash/detectflash.c:303 src/flash/detectflash.c:306
+#, c-format
+msgid "\tSector Protect/Unprotect Scheme: %s\n"
+msgstr ""
+
+#: src/flash/detectflash.c:308
+#, fuzzy, c-format
+msgid "\tSimultaneous Operation: Not supported\n"
+msgstr "Flash non supporté!\n"
+
+#: src/flash/detectflash.c:310
+#, c-format
+msgid "\tSimultaneous Operation: %d sectors\n"
+msgstr ""
+
+#: src/flash/detectflash.c:312 src/flash/detectflash.c:314
+#, c-format
+msgid "\tBurst Mode Type: %s\n"
+msgstr ""
+
+#: src/flash/detectflash.c:316 src/flash/detectflash.c:318
+#, c-format
+msgid "\tPage Mode Type: %s\n"
+msgstr ""
+
+#: src/flash/detectflash.c:322
+#, c-format
+msgid "\tACC (Acceleration) Supply Minimum: %d mV\n"
+msgstr ""
+
+#: src/flash/detectflash.c:323
+#, c-format
+msgid "\tACC (Acceleration) Supply Maximum: %d mV\n"
+msgstr ""
+
+#: src/flash/detectflash.c:325 src/flash/detectflash.c:327
+#, c-format
+msgid "\tTop/Bottom Sector Flag: %s\n"
+msgstr ""
+
+#: src/flash/detectflash.c:332 src/flash/detectflash.c:334
+#, c-format
+msgid "\tProgram Suspend: %s\n"
+msgstr ""
+
+#: src/flash/detectflash.c:339 src/flash/detectflash.c:341
+#, c-format
+msgid "\tUnlock Bypass: %s\n"
+msgstr ""
+
+#: src/flash/detectflash.c:342
+#, c-format
+msgid "\tSecSi Sector (Customer OTP Area) Size: %d bytes\n"
+msgstr ""
+
+#: src/flash/detectflash.c:343
+#, c-format
+msgid "\tEmbedded Hardware Reset Timeout Maximum: %d ns\n"
+msgstr ""
+
+#: src/flash/detectflash.c:344
+#, c-format
+msgid "\tNon-Embedded Hardware Reset Timeout Maximum: %d ns\n"
+msgstr ""
+
+#: src/flash/detectflash.c:345
+#, c-format
+msgid "\tErase Suspend Timeout Maximum: %d us\n"
+msgstr ""
+
+#: src/flash/detectflash.c:346
+#, c-format
+msgid "\tProgram Suspend Timeout Maximum: %d us\n"
+msgstr ""
+
+#: src/flash/detectflash.c:351
+#, c-format
+msgid "\tBank Organization:\n"
+msgstr ""
+
+#: src/flash/detectflash.c:353
+#, c-format
+msgid "\t\tBank%d: %d sectors\n"
+msgstr ""
+
+#: src/flash/flash.c:89
+#, c-format
+msgid "unknown flash - vendor id: %d (0x%04x)\n"
+msgstr "flahs inconnu - identificateur du manufacturier: %d (0x%04x)\n"
+
+#: src/flash/flash.c:93
+#, c-format
+msgid "Flash not supported!\n"
+msgstr "Flash non supporté!\n"
+
+#: src/flash/flash.c:104 src/flash/flash.c:265 src/flash/flash.c:391
+#, c-format
+msgid "no flash driver found\n"
+msgstr "aucun pilote de flahs repéré\n"
+
+#: src/flash/flash.c:115
+#, c-format
+msgid "Invalid sync sequence!\n"
+msgstr "Séquence de synchro invalide!\n"
+
+#: src/flash/flash.c:133
+#, c-format
+msgid "block %d unlocked\n"
+msgstr "bloc %d déverrouillé\n"
+
+#: src/flash/flash.c:134 src/flash/flash.c:301
+#, c-format
+msgid "erasing block %d: %d\n"
+msgstr "effacement du bloc %d: %d\n"
+
+#: src/flash/flash.c:138 src/flash/flash.c:284
+#, c-format
+msgid "program:\n"
+msgstr "programme:\n"
+
+#: src/flash/flash.c:146 src/flash/flash.c:191
+#, c-format
+msgid "Error: premature end of file\n"
+msgstr "ERREUR: fin prématurée du fichier\n"
+
+#: src/flash/flash.c:149 src/flash/flash.c:194
+#, c-format
+msgid "record: start = 0x%08X, len = 0x%08X, checksum = 0x%08X\n"
+msgstr "enregistrement: début = 0x%08X, longueur = 0x%08X, checksum = 0x%08X\n"
+
+#: src/flash/flash.c:153 src/flash/flash.c:198
+#, c-format
+msgid "Error: Invalid record length!\n"
+msgstr "ERREUR: longueur de l'enregistrement invalide!\n"
+
+#: src/flash/flash.c:165 src/flash/flash.c:328
+#, c-format
+msgid ""
+"\n"
+"flash error\n"
+msgstr ""
+"\n"
+"erreur flash\n"
+
+#: src/flash/flash.c:177 src/flash/flash.c:340
+#, fuzzy, c-format
+msgid "verify skipped\n"
+msgstr "vérifier:\n"
+
+#: src/flash/flash.c:182 src/flash/flash.c:345
+#, c-format
+msgid "verify:\n"
+msgstr "vérifier:\n"
+
+#: src/flash/flash.c:211
+#, c-format
+msgid ""
+"\n"
+"verify error: 0x%08X vs. 0x%08X at addr %08X\n"
+msgstr ""
+"\n"
+"ERREUR de vérification: 0x%08X vs. 0x%08X à l'adresse %08X\n"
+
+#: src/flash/flash.c:278 src/tap/detect.c:451
+#, c-format
+msgid "Out of memory!\n"
+msgstr "Mémoire épuisée!\n"
+
+#: src/flash/flash.c:300
+#, c-format
+msgid ""
+"\n"
+"block %d unlocked\n"
+msgstr ""
+"\n"
+"bloc %d déverrouillé\n"
+
+#: src/flash/flash.c:335 src/flash/flash.c:372
+#, fuzzy, c-format
+msgid "addr: 0x%08X\n"
+msgstr "adr: 0x%08X"
+
+#: src/flash/flash.c:373
+#, fuzzy, c-format
+msgid ""
+"verify error:\n"
+"read: 0x%08X\n"
+"expected: 0x%08X\n"
+msgstr ""
+"\n"
+"ERREUR de vérification:\n"
+"lu: 0x%08X\n"
+"attendu: 0x%08X\n"
+
+#: src/flash/flash.c:379
+#, fuzzy, c-format
+msgid ""
+"addr: 0x%08X\n"
+"Done.\n"
+msgstr "adr: 0x%08X"
+
+#: src/flash/flash.c:396
+#, c-format
+msgid ""
+"\n"
+"Erasing %d Flash block%s from address 0x%x\n"
+msgstr ""
+
+#: src/flash/flash.c:401
+#, c-format
+msgid "(%d%% Completed) FLASH Block %d : Unlocking ... "
+msgstr ""
+
+#: src/flash/flash.c:404
+#, c-format
+msgid "Erasing ... "
+msgstr ""
+
+#: src/flash/flash.c:410
+#, c-format
+msgid "(100%% Completed) FLASH Block %d : Unlocking ... Erasing ... Ok.\n"
+msgstr ""
+
+#: src/flash/flash.c:412
+#, c-format
+msgid "Ok."
+msgstr ""
+
+#: src/flash/flash.c:414
+#, c-format
+msgid "%78s"
+msgstr ""
+
+#: src/flash/flash.c:419
+#, c-format
+msgid "ERROR.\n"
+msgstr ""
+
+#: src/flash/flash.c:425
+#, c-format
+msgid ""
+"\n"
+"Erasing Completed.\n"
+msgstr ""
+
+#: src/flash/flash.c:427
+#, c-format
+msgid ""
+"\n"
+"Erasing Failed.\n"
+msgstr ""
+
+#: src/flash/intel.c:116 src/flash/intel.c:119 src/flash/intel.c:122
+#, c-format
+msgid "Manufacturer: %s\n"
+msgstr "Manufacturier: %s\n"
+
+#: src/flash/intel.c:125
+#, c-format
+msgid "Unknown manufacturer (0x%04X)!\n"
+msgstr "Manufacturier inconnu (0x%04X)!\n"
+
+#: src/flash/intel.c:129
+#, c-format
+msgid "Chip: "
+msgstr "Module: "
+
+#: src/flash/intel.c:181
+#, c-format
+msgid "Unknown (0x%02X)!\n"
+msgstr "Inconnu (0x%02X)!\n"
+
+#: src/flash/intel.c:240
+#, c-format
+msgid "flash: invalid command seq\n"
+msgstr "flash: séquence de commande invalide\n"
+
+#: src/flash/intel.c:243
+#, c-format
+msgid "flash: low vpen\n"
+msgstr "flash: vpen bas\n"
+
+#: src/flash/intel.c:246
+#, c-format
+msgid "flash: block locked\n"
+msgstr "flash: bloc verrouillé\n"
+
+#: src/flash/intel.c:268
+#, c-format
+msgid "flash: unknown error while unblocking\n"
+msgstr "flash: erreur inconnue lors du déverrouillage\n"
+
+#: src/flash/intel.c:287 src/flash/intel.c:339
+#, c-format
+msgid "flash: unknown error while programming\n"
+msgstr "flash: erreur inconnue lors de la programmation\n"
+
+#: src/flash/intel.c:469
+msgid "supported: 28Fxxxx, 2 x 16 bit"
+msgstr "supportés: 28Fxxxx, 2 x 16 bit"
+
+#: src/flash/intel.c:481
+msgid "supported: 28Fxxxx, 1 x 16 bit"
+msgstr "supportés: 28Fxxxx, 1 x 16 bit"
+
+#: src/flash/intel.c:493
+msgid "supported: 28Fxxxx, 1 x 8 bit"
+msgstr "supportés: 28Fxxxx, 1 x 8 bit"
+
+#: src/jtag.c:295
+#, c-format
+msgid "'%s' must not be run suid root!\n"
+msgstr ""
+
+#: src/jtag.c:356
+#, fuzzy, c-format
+msgid "%s #%s\n"
+msgstr "%-13s %s\n"
+
+#: src/jtag.c:359
+#, c-format
+msgid "Usage: %s [OPTIONS] [FILE [FILE ... ]] \n"
+msgstr ""
+
+#: src/jtag.c:362
+#, c-format
+msgid " -h, --help display this help and exit\n"
+msgstr ""
+
+#: src/jtag.c:363
+#, c-format
+msgid " -v, --version display version information and exit\n"
+msgstr ""
+
+#: src/jtag.c:365
+#, c-format
+msgid " -n, --norc disable reading ~/.jtag/rc on startup\n"
+msgstr ""
+
+#: src/jtag.c:366
+#, c-format
+msgid " -i, --interactive enter interactive mode after reading files\n"
+msgstr ""
+
+#: src/jtag.c:367
+#, c-format
+msgid " -q, --quiet Do not print help on startup\n"
+msgstr ""
+
+#: src/jtag.c:369
+#, c-format
+msgid " [FILE] file containing commands to execute\n"
+msgstr ""
+
+#: src/jtag.c:372
+#, c-format
+msgid " Please report bugs at http://www.urjtag.org\n"
+msgstr ""
+
+#: src/jtag.c:379
+#, c-format
+msgid ""
+"\n"
+"%s #%s\n"
+"\n"
+"Copyright (C) 2002, 2003 ETC s.r.o.\n"
+"Copyright (C) 2007, 2008 Kolja Waschk and the respective authors\n"
+msgstr ""
+
+#: src/jtag.c:384
+#, c-format
+msgid ""
+"\n"
+"This program is free software; you can redistribute it and/or modify\n"
+"it under the terms of the GNU General Public License as published by\n"
+"the Free Software Foundation; either version 2 of the License, or\n"
+"(at your option) any later version.\n"
+"\n"
+"This program is distributed in the hope that it will be useful,\n"
+"but WITHOUT ANY WARRANTY; without even the implied warranty of\n"
+"MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the\n"
+"GNU General Public License for more details.\n"
+"\n"
+"You should have received a copy of the GNU General Public License\n"
+"along with this program; if not, write to the Free Software\n"
+"Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA\n"
+msgstr ""
+
+#: src/jtag.c:439
+#, fuzzy, c-format
+msgid ""
+"\n"
+"%s #%s\n"
+"Copyright (C) 2002, 2003 ETC s.r.o.\n"
+"Copyright (C) 2007, 2008 Kolja Waschk and the respective authors\n"
+"\n"
+"%s is free software, covered by the GNU General Public License, and you are\n"
+"welcome to change it and/or distribute copies of it under certain "
+"conditions.\n"
+"There is absolutely no warranty for %s.\n"
+"\n"
+msgstr ""
+"%s\n"
+"Copyright © 2002, 2003 ETC s.r.o.\n"
+"%s est un logiciel libre; vous pouvez le redistribuer ou le\n"
+"modifier selon les termes de la License Publique Générale de GNU, publiée\n"
+"par la Free Software Foundation (soit la version 2 ou selon votre choix, "
+"toute version ultérieure).\n"
+"\n"
+"Ce programme est distribué dans l'espoir qu'il soit utile,\n"
+"mais AUCUNE garantie n'est donnée pour %s\n"
+"tant pour des raisons COMMERCIALES que\n"
+"pour RÉPONDRE À UN BESOIN PARTICULIER. Consulter la licence\n"
+"GNU General Public License pour plus de détails.\n"
+"\n"
+"Vous devriez avoir reçu copie de la Licence Publique Générale de GNU\n"
+"avec ce programme; sinon, écrire à la Free Software Foundation, Inc.,\n"
+"59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.\n"
+
+#: src/jtag.c:455
+#, fuzzy, c-format
+msgid "WARNING: %s may damage your hardware!\n"
+msgstr ""
+"AVERTISSEMENT: %s peut endommager votre matériel! Taper \"quit\" pour "
+"quitter!\n"
+"\n"
+
+#: src/jtag.c:456
+#, fuzzy, c-format
+msgid ""
+"Type \"quit\" to exit, \"help\" for help.\n"
+"\n"
+msgstr ""
+"Taper \"help\" pour de l'aide.\n"
+"\n"
+
+#: src/part/data_register.c:46
+#, c-format
+msgid "Warning: Data register name too long\n"
+msgstr "AVERTISSEMENT: nom du registre de données trop long\n"
+
+#: src/part/instruction.c:46
+#, c-format
+msgid "Warning: Instruction name too long\n"
+msgstr "AVERTISSEMENT: nom de l'instruction trop long\n"
+
+#: src/part/part.c:194
+#, c-format
+msgid "signal '%s' cannot be set as output\n"
+msgstr "signal '%s' ne peut être initialisé comme sortie\n"
+
+#: src/part/part.c:204
+#, c-format
+msgid "signal '%s' cannot be set as input\n"
+msgstr "signal '%s' ne peut être initialisé comme entrée\n"
+
+#: src/part/part.c:228
+#, c-format
+msgid "signal '%s' is not input signal\n"
+msgstr "signal '%s' n'est pas un signal d'entrée\n"
+
+#: src/part/part.c:245
+#, c-format
+msgid "%%-%ds %%-%ds %%-%ds %%-%ds %%-%ds\n"
+msgstr "%%-%ds %%-%ds %%-%ds %%-%ds %%-%ds\n"
+
+#: src/part/part.c:254 src/part/part.c:256
+msgid "(none)"
+msgstr "(aucun)"
+
+#: src/svf/svf.c:351 src/svf/svf.c:529 src/svf/svf.c:868 src/svf/svf.c:872
+#, fuzzy, c-format
+msgid "out of memory"
+msgstr "mémoire épuisée\n"
+
+#: src/svf/svf.c:449
+#, c-format
+msgid "Error %s: mismatch at position %d for TDO\n"
+msgstr ""
+
+#: src/svf/svf.c:601 src/svf/svf.c:1011
+#, c-format
+msgid "Warning %s: command %s not implemented\n"
+msgstr ""
+
+#: src/svf/svf.c:634
+#, c-format
+msgid "Error %s: only TCK is supported for RUNTEST.\n"
+msgstr ""
+
+#: src/svf/svf.c:638
+#, c-format
+msgid "Error %s: maximum time must be larger or equal to minimum time.\n"
+msgstr ""
+
+#: src/svf/svf.c:644
+#, c-format
+msgid "Warning %s: maximum time for RUNTEST not guaranteed.\n"
+msgstr ""
+
+#: src/svf/svf.c:645
+#, c-format
+msgid " This message is only displayed once.\n"
+msgstr ""
+
+#: src/svf/svf.c:669
+#, c-format
+msgid "Error %s: Maximum cable clock frequency required for RUNTEST.\n"
+msgstr ""
+
+#: src/svf/svf.c:670
+#, c-format
+msgid " Set the cable frequency with 'FREQUENCY <Hz>'.\n"
+msgstr ""
+
+#: src/svf/svf.c:820
+#, c-format
+msgid "Error %s: first %s command after length change must have a TDI value.\n"
+msgstr ""
+
+#: src/svf/svf.c:845
+#, c-format
+msgid "Error %s: SIR command length inconsistent.\n"
+msgstr ""
+
+#: src/svf/svf.c:946
+#, c-format
+msgid "Error %s: no further TRST command allowed after mode ABSENT\n"
+msgstr ""
+
+#: src/svf/svf.c:966
+#, c-format
+msgid "Error %s: TRST ABSENT must not be issued after a STATE command\n"
+msgstr ""
+
+#: src/svf/svf.c:972
+#, c-format
+msgid "Error %s: TRST ABSENT must not be issued after an SIR or SDR command\n"
+msgstr ""
+
+#: src/svf/svf.c:982
+#, c-format
+msgid "Warning %s: unimplemented mode '%s' for TRST\n"
+msgstr ""
+
+#: src/svf/svf.c:1070
+#, fuzzy, c-format
+msgid "Error %s: no JTAG chain available\n"
+msgstr "ERREUR: incapable de détecter la fin de la chaîne JTAG!\n"
+
+#: src/svf/svf.c:1074
+#, c-format
+msgid "Error %s: chain without any parts\n"
+msgstr ""
+
+#: src/svf/svf.c:1090
+#, c-format
+msgid "Error %s: could not establish SDR register\n"
+msgstr ""
+
+#: src/svf/svf.c:1122
+#, c-format
+msgid "Error %s: could not establish SIR instruction\n"
+msgstr ""
+
+#: src/svf/svf.c:1156
+#, c-format
+msgid ""
+"Mismatches occurred between scanned device output and expected TDO values.\n"
+msgstr ""
+
+#: src/svf/svf.c:1158
+#, c-format
+msgid "Scanned device output matched expected TDO values.\n"
+msgstr ""
+
+#: svf_flex.l:351
+#, c-format
+msgid "Parsing %6d/%d (%3.0d%%)"
+msgstr ""
+
+#: src/tap/cable/arcom.c:129
+msgid "Arcom JTAG Cable"
+msgstr "Cable JTAG Arcom"
+
+#: src/tap/cable/byteblaster.c:154
+msgid ""
+"Altera ByteBlaster/ByteBlaster II/ByteBlasterMV Parallel Port Download Cable"
+msgstr ""
+"Cable du port parallèle de chargement Altera ByteBlaster/ByteBlaster II/"
+"ByteBlasterMV"
+
+#: src/tap/cable.c:175
+#, c-format
+msgid "Failed to allocate memory for cable activity queue.\n"
+msgstr ""
+
+#: src/tap/cable.c:220
+#, c-format
+msgid "Out of memory: couldn't resize activity queue to %d\n"
+msgstr ""
+
+#: src/tap/cable.c:225
+#, c-format
+msgid "(Resized JTAG activity queue to hold max %d items)\n"
+msgstr ""
+
+#: src/tap/cable.c:405 src/tap/cable.c:463
+#, c-format
+msgid "Internal error: Got wrong type of result from queue (%d? %p.%d)\n"
+msgstr ""
+
+#: src/tap/cable.c:469
+#, c-format
+msgid "Internal error: Got wrong signal's value from queue (%d? %p.%d)\n"
+msgstr ""
+
+#: src/tap/cable.c:523
+#, c-format
+msgid "Internal error: Got wrong type of result from queue (#%d %p.%d)\n"
+msgstr ""
+
+#: src/tap/cable.c:529
+#, c-format
+msgid "Internal error: Wanted transfer result but none was queued\n"
+msgstr ""
+
+#: src/tap/cable/dlc5.c:125
+msgid "Xilinx DLC5 JTAG Parallel Cable III"
+msgstr "Cable parallèle JTAG Xilinx DLC5 III"
+
+#: src/tap/cable/ea253.c:129
+msgid "ETC EA253 JTAG Cable"
+msgstr "Cable JATB ETC EA253"
+
+#: src/tap/cable/ei012.c:131
+msgid "ETC EI012 JTAG Cable"
+msgstr "Cable JTAG ETC EI012"
+
+#: src/tap/cable/ft2232.c:248
+#, c-format
+msgid "Warning: Setting lowest supported frequency for FT2232: %d\n"
+msgstr ""
+
+#: src/tap/cable/ft2232.c:680
+#, c-format
+msgid "Error: Please power on the TARGET board and connect VCC signal!\n"
+msgstr ""
+
+#: src/tap/cable/ft2232.c:1662
+#, c-format
+msgid ""
+"Usage: cable %s [vid=VID] [pid=PID] [desc=DESC] [driver=DRIVER]\n"
+"\n"
+"VID vendor ID (hex), defaults to %04X\n"
+"PID product ID (hex), defaults to %04X\n"
+"DESC Some string to match in description or serial no.\n"
+"DRIVER usbconn driver, either ftdi-mpsse or ftd2xx-mpsse\n"
+" defaults to %s if not specified\n"
+"\n"
+msgstr ""
+
+#: src/tap/cable/ft2232.c:1680
+msgid "Generic FTDI FT2232 Cable"
+msgstr ""
+
+#: src/tap/cable/ft2232.c:1712
+msgid "Olimex ARM-USB-OCD[-TINY] (FT2232) Cable"
+msgstr ""
+
+#: src/tap/cable/ft2232.c:1758
+msgid "Analog Devices Blackfin gnICE (FT2232) Cable (EXPERIMENTAL)"
+msgstr ""
+
+#: src/tap/cable/ft2232.c:1790
+msgid "Amontec JTAGkey (FT2232) Cable"
+msgstr ""
+
+#: src/tap/cable/ft2232.c:1822
+msgid "OOCDLink-s (FT2232) Cable (EXPERIMENTAL)"
+msgstr ""
+
+#: src/tap/cable/ft2232.c:1854
+msgid "Turtelizer 2 Rev. B (FT2232) Cable (EXPERIMENTAL)"
+msgstr ""
+
+#: src/tap/cable/ft2232.c:1886
+msgid "USB to JTAG Interface (FT2232) Cable (EXPERIMENTAL)"
+msgstr ""
+
+#: src/tap/cable/ft2232.c:1918
+msgid "Xverve DT-USB-ST Signalyzer Tool (FT2232) Cable (EXPERIMENTAL)"
+msgstr ""
+
+#: src/tap/cable/ft2232.c:1950
+msgid "TinCanTools Flyswatter Cable"
+msgstr ""
+
+#: src/tap/cable/ft2232.c:1982
+msgid "KrisTech usbScarabeus2 (FT2232) Cable"
+msgstr ""
+
+#: src/tap/cable/generic.c:110
+#, c-format
+msgid "No space in cable activity results queue.\n"
+msgstr ""
+
+#: src/tap/cable/generic.c:389
+#, c-format
+msgid "calibration error, wall clock is not monotonically increasing\n"
+msgstr ""
+
+#: src/tap/cable/generic_parport.c:58 src/tap/cable/jim.c:54
+#, c-format
+msgid "not enough arguments!\n"
+msgstr ""
+
+#: src/tap/cable/generic_parport.c:67
+#, fuzzy, c-format
+msgid "Unknown port driver: %s\n"
+msgstr "registre de données inconnu '%s'\n"
+
+#: src/tap/cable/generic_parport.c:112
+#, c-format
+msgid ""
+"Usage: cable %s parallel PORTADDR\n"
+" or: cable %s ppdev PPDEV\n"
+" or: cable %s ppi PPIDEV\n"
+"\n"
+"PORTADDR parallel port address (e.g. 0x378)\n"
+"PPDEV ppdev device (e.g. /dev/parport0)\n"
+"PPIDEF ppi device (e.g. /dev/ppi0)\n"
+"\n"
+msgstr ""
+
+#: src/tap/cable/generic_usbconn.c:217
+#, c-format
+msgid "Couldn't connect to suitable USB device.\n"
+msgstr ""
+
+#: src/tap/cable/generic_usbconn.c:253
+#, c-format
+msgid ""
+"Usage: cable %s [vid=VID] [pid=PID] [desc=DESC] [...]\n"
+"\n"
+"VID USB Device Vendor ID (hex, e.g. 0abc)\n"
+"PID USB Device Product ID (hex, e.g. 0abc)\n"
+"DESC Some string to match in description or serial no.\n"
+"\n"
+msgstr ""
+
+#: src/tap/cable/jim.c:58
+#, c-format
+msgid "JTAG target simulator JIM - work in progress!\n"
+msgstr ""
+
+#: src/tap/cable/jim.c:62
+#, fuzzy, c-format
+msgid "Initialization failed.\n"
+msgstr "initialisation du bus a échoué!\n"
+
+#: src/tap/cable/jim.c:151
+#, c-format
+msgid "Usage: cable %s\n"
+msgstr ""
+
+#: src/tap/cable/jim.c:159
+msgid "JTAG target simulator JIM"
+msgstr ""
+
+#: src/tap/cable/jlink.c:572
+msgid "Segger/IAR J-Link, Atmel SAM-ICE and others."
+msgstr ""
+
+#: src/tap/cable/keithkoep.c:141
+msgid "Keith & Koep JTAG cable"
+msgstr "Cable JTAG Keith & Koep"
+
+#: src/tap/cable/lattice.c:131
+#, fuzzy
+msgid "Lattice Parallel Port JTAG Cable"
+msgstr "Cable JTAG Macraigor Wiggler"
+
+#: src/tap/cable/mpcbdm.c:142
+msgid "Mpcbdm JTAG cable"
+msgstr "Cable JTAG Mpcbdm"
+
+#: src/tap/cable/triton.c:143
+msgid "Ka-Ro TRITON Starterkit II (PXA255/250) JTAG Cable"
+msgstr "Cable JTAG Ka-Ro TRITON Starterkit II (PXA255/250)"
+
+#: src/tap/cable/ts7800.c:87 src/tap/cable/vision_ep9307.c:93
+#, fuzzy, c-format
+msgid "Error: unable to open /dev/mem\n"
+msgstr "ERREUR: mémoire épuisée!\n"
+
+#: src/tap/cable/ts7800.c:97 src/tap/cable/vision_ep9307.c:130
+#, c-format
+msgid "Error: unable to mmap the GPIO registers\n"
+msgstr ""
+
+#: src/tap/cable/ts7800.c:120 src/tap/cable/vision_ep9307.c:155
+#, c-format
+msgid "Error: unable to munmap the GPIO registers\n"
+msgstr ""
+
+#: src/tap/cable/ts7800.c:152 src/tap/cable/vision_ep9307.c:193
+#, c-format
+msgid "Error: This cable type does not accept parameters!\n"
+msgstr ""
+
+#: src/tap/cable/ts7800.c:156
+#, c-format
+msgid "Initializing TS-7800 Built-in JTAG Chain\n"
+msgstr ""
+
+#: src/tap/cable/ts7800.c:160
+#, fuzzy, c-format
+msgid "%s(%d) Out of memory\n"
+msgstr "%s(%d) Mémoire épuisée.\n"
+
+#: src/tap/cable/ts7800.c:281 src/tap/cable/vision_ep9307.c:320
+#, c-format
+msgid ""
+"Usage: cable %s\n"
+"\n"
+msgstr ""
+
+#: src/tap/cable/ts7800.c:288
+msgid "TS-7800 Built-in JTAG Chain"
+msgstr ""
+
+#: src/tap/cable/usbblaster.c:102
+#, c-format
+msgid "Warning: USB-Blaster frequency is fixed to %ld Hz\n"
+msgstr ""
+
+#: src/tap/cable/usbblaster.c:456
+#, c-format
+msgid ""
+"Usage: cable %s [vid=VID] [pid=PID] [desc=DESC] [driver=DRIVER]\n"
+"\n"
+"VID vendor ID (hex, e.g. 0abc)\n"
+"PID product ID (hex, e.g. 0abc)\n"
+"DESC Some string to match in description or serial no.\n"
+"DRIVER usbconn driver, either ftdi or ftd2xx\n"
+" defaults to %s if not specified\n"
+"\n"
+msgstr ""
+
+#: src/tap/cable/usbblaster.c:472
+msgid "Altera USB-Blaster Cable"
+msgstr ""
+
+#: src/tap/cable/vision_ep9307.c:103
+#, c-format
+msgid "Error: unable to mmap the System Control registers\n"
+msgstr ""
+
+#: src/tap/cable/vision_ep9307.c:122
+#, c-format
+msgid "Error: unable to munmap the System Controller registers\n"
+msgstr ""
+
+#: src/tap/cable/vision_ep9307.c:197
+#, c-format
+msgid "Initializing Vision EP9307 SoM GPIO JTAG Cable\n"
+msgstr ""
+
+#: src/tap/cable/vision_ep9307.c:327
+msgid "Vision EP9307 SoM GPIO JTAG Cable"
+msgstr ""
+
+#: src/tap/cable/wiggler2.c:148
+msgid "Modified (with CPU Reset) WIGGLER JTAG Cable"
+msgstr ""
+
+#: src/tap/cable/wiggler.c:213
+#, c-format
+msgid "Pin mapping failed\n"
+msgstr ""
+
+#: src/tap/cable/wiggler.c:327
+#, c-format
+msgid ""
+"Usage: cable %s parallel PORTADDR [TDO,TRST,TDI,TCK,TMS,SRESET]\n"
+" or: cable %s ppdev PPDEV [TDO,TRST,TDI,TCK,TMS,SRESET]\n"
+" or: cable %s ppi PPIDEV [TDO,TRST,TDI,TCK,TMS,SRESET]\n"
+"\n"
+"PORTADDR parallel port address (e.g. 0x378)\n"
+"PPDEV ppdev device (e.g. /dev/parport0)\n"
+"PPIDEF ppi device (e.g. /dev/ppi0)\n"
+"TDO, ... parallel port bit number, prepend '#' for inversion\n"
+" default is '%s'\n"
+"\n"
+msgstr ""
+
+#: src/tap/cable/wiggler.c:359
+msgid "Macraigor Wiggler JTAG Cable"
+msgstr "Cable JTAG Macraigor Wiggler"
+
+#: src/tap/cable/wiggler.c:377
+#, fuzzy
+msgid "Excelpoint IGLOO JTAG Cable"
+msgstr "Cable JTAG Arcom"
+
+#: src/tap/cable/xpc.c:634
+msgid "Xilinx Platform Cable USB internal chain"
+msgstr ""
+
+#: src/tap/cable/xpc.c:660
+msgid "Xilinx Platform Cable USB external chain"
+msgstr ""
+
+#: src/tap/chain.c:149 src/tap/chain.c:200
+#, c-format
+msgid "%s(%d) Part %d without active instruction\n"
+msgstr "%s(%d) pièce %d sans instruction active\n"
+
+#: src/tap/chain.c:204
+#, c-format
+msgid "%s(%d) Part %d without data register\n"
+msgstr "%s(%d) pièce %d sans registre de données\n"
+
+#: src/tap/detect.c:59
+#, c-format
+msgid "Cannot open %s\n"
+msgstr "ne peut ouvrir %s\n"
+
+#: src/tap/detect.c:206
+#, c-format
+msgid "IR length: %d\n"
+msgstr "longueur IR: %d\n"
+
+#: src/tap/detect.c:223
+#, c-format
+msgid "Unable to detect JTAG chain length\n"
+msgstr "Incapable de détecter la longueur de la chaîne JTAG\n"
+
+#: src/tap/detect.c:226
+#, c-format
+msgid "Chain length: %d\n"
+msgstr "Longueur de la chaîne: %d\n"
+
+#: src/tap/detect.c:267
+#, fuzzy, c-format
+msgid "Device Id: %s (0x%016<PRIX64>)\n"
+msgstr "Identificateur du périphérique: %s\n"
+
+#: src/tap/detect.c:296
+#, c-format
+msgid " Unknown manufacturer!\n"
+msgstr " Manufacturier inconnu!\n"
+
+#: src/tap/detect.c:302
+#, c-format
+msgid " Manufacturer: %s\n"
+msgstr " Manufacturier: %s\n"
+
+#: src/tap/detect.c:304
+#, c-format
+msgid "Warning: Manufacturer too long\n"
+msgstr "AVERTISSEMENT: nom du manufacturier trop long\n"
+
+#: src/tap/detect.c:320
+#, c-format
+msgid " Unknown part!\n"
+msgstr " Pièce inconnue!\n"
+
+#: src/tap/detect.c:326
+#, fuzzy, c-format
+msgid " Part(%d): %s\n"
+msgstr " Pièce: %s\n"
+
+#: src/tap/detect.c:328
+#, c-format
+msgid "Warning: Part too long\n"
+msgstr "AVERTISSEMENT: nom de pièce trop long\n"
+
+#: src/tap/detect.c:344
+#, c-format
+msgid " Unknown stepping!\n"
+msgstr " Pas inconnu!\n"
+
+#: src/tap/detect.c:350
+#, c-format
+msgid " Stepping: %s\n"
+msgstr " Pas : %s\n"
+
+#: src/tap/detect.c:352
+#, c-format
+msgid "Warning: Stepping too long\n"
+msgstr "AVERTISSEMENT: pas trop long\n"
+
+#: src/tap/detect.c:382
+#, c-format
+msgid "Error: Unable to detect JTAG chain end!\n"
+msgstr "ERREUR: incapable de détecter la fin de la chaîne JTAG!\n"
+
+#: src/tap/detect.c:409
+#, fuzzy, c-format
+msgid "Error: Unable to allocate a register!\n"
+msgstr "ERREUR: incapable de détecter la fin de la chaîne JTAG!\n"
+
+#: src/tap/detect.c:417
+#, fuzzy, c-format
+msgid "Error: Unable to allocate space for parts!\n"
+msgstr "ERREUR: incapable de détecter la fin de la chaîne JTAG!\n"
+
+#: src/tap/detect.c:424
+#, fuzzy, c-format
+msgid "Error: Unable to allocate space for a part!\n"
+msgstr "ERREUR: incapable de détecter la fin de la chaîne JTAG!\n"
+
+#: src/tap/detect.c:440
+#, c-format
+msgid "Error: could not set BR register"
+msgstr ""
+
+#: src/tap/detect.c:462
+#, c-format
+msgid "Error: could not set BYPASS instruction"
+msgstr ""
+
+#: src/tap/discovery.c:108
+#, c-format
+msgid "Warning: TDO seems to be stuck at %d\n"
+msgstr ""
+
+#: src/tap/discovery.c:133
+#, c-format
+msgid "Detecting IR length ... "
+msgstr "Détection de la longuer IR..."
+
+#: src/tap/discovery.c:139 src/tap/discovery.c:171
+#, c-format
+msgid "%d\n"
+msgstr "%d\n"
+
+#: src/tap/discovery.c:142
+#, c-format
+msgid "Error: Invalid IR length!\n"
+msgstr "ERREUR: longueur IR invalide!\n"
+
+#: src/tap/discovery.c:153
+#, c-format
+msgid "Error: Out of memory!\n"
+msgstr "ERREUR: mémoire épuisée!\n"
+
+#: src/tap/discovery.c:165
+#, c-format
+msgid "Detecting DR length for IR %s ... "
+msgstr "Détection de la longeur DR de IR %s..."
+
+#: src/tap/parport/direct.c:139
+#, c-format
+msgid "Couldn't load InpOut32.dll; maybe not installed?\n"
+msgstr ""
+
+#: src/tap/parport/direct.c:206 src/tap/parport/ppdev.c:119
+#: src/tap/parport/ppi.c:115
+#, c-format
+msgid "Syntax error!\n"
+msgstr "ERREUR de syntaxe!\n"
+
+#: src/tap/parport/direct.c:213
+#, c-format
+msgid "Invalid port address!\n"
+msgstr "Adresse de port invalide!\n"
+
+#: src/tap/parport/direct.c:225
+#, c-format
+msgid "Disconnecting %s from parallel port at 0x%x\n"
+msgstr "Déconnexion de %s du port parallèle à 0x%x\n"
+
+#: src/tap/parport/direct.c:231
+#, fuzzy, c-format
+msgid "Initializing parallel port at 0x%x\n"
+msgstr "Initialisation de %s sur le port parallèle à 0x%x\n"
+
+#: src/tap/parport/direct.c:235 src/tap/parport/ppdev.c:134
+#: src/tap/parport/ppi.c:130
+#, c-format
+msgid "%s(%d) Out of memory.\n"
+msgstr "%s(%d) Mémoire épuisée.\n"
+
+#: src/tap/parport/ppdev.c:125
+#, c-format
+msgid "Disconnecting %s from ppdev port %s\n"
+msgstr "Déconnexion de %s du port ppdev %s\n"
+
+#: src/tap/parport/ppdev.c:130
+#, fuzzy, c-format
+msgid "Initializing ppdev port %s\n"
+msgstr "Initialisation de %s sur le port ppdev %s\n"
+
+#: src/tap/parport/ppdev.c:148
+#, fuzzy, c-format
+msgid "Could not open port %s: %s\n"
+msgstr "ne peut ouvrir %s\n"
+
+#: src/tap/parport/ppdev.c:153
+#, c-format
+msgid "Could not claim ppdev device: %s\n"
+msgstr ""
+
+#: src/tap/parport/ppi.c:121
+#, fuzzy, c-format
+msgid "Disconnecting %s from ppi port %s\n"
+msgstr "Déconnexion de %s du port ppdev %s\n"
+
+#: src/tap/parport/ppi.c:126
+#, fuzzy, c-format
+msgid "Initializing on ppi port %s\n"
+msgstr "Initialisation de %s sur le port ppdev %s\n"
+
+#: src/tap/tap.c:71 src/tap/tap.c:131 src/tap/tap.c:142
+#, c-format
+msgid "%s: Invalid state: %2X\n"
+msgstr "%s: état invalide: %2X\n"
+
+#: src/tap/usbconn/libftd2xx.c:100
+#, c-format
+msgid "%s(): FT_Write() failed.\n"
+msgstr ""
+
+#: src/tap/usbconn/libftd2xx.c:104 src/tap/usbconn/libftdi.c:89
+#, c-format
+msgid "%s(): Written fewer bytes than requested.\n"
+msgstr ""
+
+#: src/tap/usbconn/libftd2xx.c:123 src/tap/usbconn/libftdi.c:108
+#, c-format
+msgid "%s(): Receive buffer does not exist.\n"
+msgstr ""
+
+#: src/tap/usbconn/libftd2xx.c:130 src/tap/usbconn/libftd2xx.c:190
+#, c-format
+msgid "%s(): Error from FT_Read(): %d\n"
+msgstr ""
+
+#: src/tap/usbconn/libftd2xx.c:134 src/tap/usbconn/libftdi.c:119
+#, c-format
+msgid "%s(): Received less bytes than requested.\n"
+msgstr ""
+
+#: src/tap/usbconn/libftd2xx.c:256 src/tap/usbconn/libftdi.c:224
+#, c-format
+msgid "%s(): Send buffer does not exist.\n"
+msgstr ""
+
+#: src/tap/usbconn/libftd2xx.c:314
+#, c-format
+msgid "Connected to libftd2xx driver.\n"
+msgstr ""
+
+#: src/tap/usbconn/libftd2xx.c:389 src/tap/usbconn/libftd2xx.c:428
+#: src/tap/usbconn/libftd2xx.c:448 src/tap/usbconn/libftd2xx.c:471
+#, c-format
+msgid "%s(): Can't reset device.\n"
+msgstr ""
+
+#: src/tap/usbconn/libftd2xx.c:391 src/tap/usbconn/libftd2xx.c:430
+#: src/tap/usbconn/libftd2xx.c:450 src/tap/usbconn/libftd2xx.c:473
+#, c-format
+msgid "%s(): Can't purge RX buffer.\n"
+msgstr ""
+
+#: src/tap/usbconn/libftd2xx.c:394
+#, c-format
+msgid "%s(): Can't set latency timer.\n"
+msgstr ""
+
+#: src/tap/usbconn/libftd2xx.c:397
+#, c-format
+msgid "%s(): Can't set baudrate.\n"
+msgstr ""
+
+#: src/tap/usbconn/libftd2xx.c:433
+#, c-format
+msgid "%s(): Can't set USB parameters.\n"
+msgstr ""
+
+#: src/tap/usbconn/libftd2xx.c:436
+#, c-format
+msgid "%s(): Can't set special characters.\n"
+msgstr ""
+
+#: src/tap/usbconn/libftd2xx.c:442
+#, c-format
+msgid "%s(): Can't set target latency timer.\n"
+msgstr ""
+
+#: src/tap/usbconn/libftd2xx.c:445
+#, c-format
+msgid "%s(): Can't set MPSSE bitmode.\n"
+msgstr ""
+
+#: src/tap/usbconn/libftdi.c:84
+#, c-format
+msgid "%s(): ftdi_write_data() failed: %s\n"
+msgstr ""
+
+#: src/tap/usbconn/libftdi.c:115 src/tap/usbconn/libftdi.c:168
+#, c-format
+msgid "%s(): Error from ftdi_read_data(): %s\n"
+msgstr ""
+
+#: src/tap/usbconn/libftdi.c:286
+#, c-format
+msgid "Connected to libftdi driver.\n"
+msgstr ""
+
+#: src/tap/usbconn/libftdi.c:324
+#, c-format
+msgid "%s() failed: %s\n"
+msgstr ""
+
+#: src/tap/usbconn/libftdi.c:349
+#, c-format
+msgid "%s(): ftdi_usb_purge_buffers() failed: %s\n"
+msgstr ""
+
+#: src/tap/usbconn/libftdi.c:352 src/tap/usbconn/libftdi.c:369
+#, c-format
+msgid "%s(): ftdi_read_data() failed: %s\n"
+msgstr ""
+
+#: src/tap/usbconn/libftdi.c:361
+#, c-format
+msgid "%s(): ftdi_usb_purge_rx_buffer() failed: %s\n"
+msgstr ""
+
+#: src/tap/usbconn/libftdi.c:366
+#, c-format
+msgid "%s(): ftdi_usb_purge_tx_buffer() failed: %s\n"
+msgstr ""
+
+#: src/tap/usbconn/libftdi.c:386
+#, c-format
+msgid "%s(): ftdi_poll_status() failed: %s\n"
+msgstr ""
+
+#: src/tap/usbconn/libftdi.c:391 src/tap/usbconn/libftdi.c:485
+#: src/tap/usbconn/libftdi.c:504
+#, c-format
+msgid "%s(): ftdi_usb_reset() failed: %s\n"
+msgstr ""
+
+#: src/tap/usbconn/libftdi.c:414 src/tap/usbconn/libftdi.c:477
+#, c-format
+msgid "%s(): ftdi_set_latency_timer() failed: %s\n"
+msgstr ""
+
+#: src/tap/usbconn/libftdi.c:427
+#, c-format
+msgid "%s(): ftdi_set_baudrate() failed: %s\n"
+msgstr ""
+
+#: src/tap/usbconn/libftdi.c:481
+#, c-format
+msgid "%s(): ftdi_set_bitmode() failed: %s\n"
+msgstr ""
+
+#~ msgid "supported: AMD 29LV800B; 1x16 Bit"
+#~ msgstr "supportés: AMD 29LV800B; 1x16 Bit"
+
+#, fuzzy
+#~ msgid ""
+#~ "Blackfin BF537 Stamp compatible bus driver via BSR (JTAG part No. %d)\n"
+#~ msgstr ""
+#~ "Pilote de bus compatible Broadcom BCM1250 via BSR (JTAG No de pièce %d)\n"
+
+#, fuzzy
+#~ msgid ""
+#~ "Blackfin BF537 EZ-KIT compatible bus driver via BSR (JTAG part No. %d)\n"
+#~ msgstr ""
+#~ "Pilote de bus compatible Broadcom BCM1250 via BSR (JTAG No de pièce %d)\n"
+
+#, fuzzy
+#~ msgid ""
+#~ "Blackfin BF527 EZ-KIT compatible bus driver via BSR (JTAG part No. %d)\n"
+#~ msgstr ""
+#~ "Pilote de bus compatible Broadcom BCM1250 via BSR (JTAG No de pièce %d)\n"
+
+#~ msgid "Intel PXA2x0 compatible bus driver via BSR (JTAG part No. %d)\n"
+#~ msgstr ""
+#~ "pilote de bus compatible Intel PXA2x0 via BSR (JTAG No de pièce %d)\n"
+
+#, fuzzy
+#~ msgid "Intel PXA27x compatible bus driver via BSR (JTAG part No. %d)\n"
+#~ msgstr ""
+#~ "pilote de bus compatible Intel PXA2x0 via BSR (JTAG No de pièce %d)\n"
+
+#~ msgid "AMD"
+#~ msgstr "AMD"
+
+#, fuzzy
+#~ msgid "Am29LV040B"
+#~ msgstr "Am29LV800B"
+
+#~ msgid "Am29LV640D/Am29LV641D/Am29LV642D"
+#~ msgstr "Am29LV640D/Am29LV641D/Am29LV642D"
+
+#~ msgid "Am29LV800B"
+#~ msgstr "Am29LV800B"
+
+#, fuzzy
+#~ msgid "MX29LV160B"
+#~ msgstr "Am29LV800B"
+
+#, fuzzy
+#~ msgid "AM29LV160DB"
+#~ msgstr "Am29LV800B"
+
+#, fuzzy
+#~ msgid "Am29LV065D"
+#~ msgstr "Am29LV800B"
+
+#, fuzzy
+#~ msgid "Am29C040B\t-\t"
+#~ msgstr "Am29LV800B"
+
+#, fuzzy
+#~ msgid "Am29LV040B\t-\t"
+#~ msgstr "Am29LV800B"
+
+#, fuzzy
+#~ msgid "addr: 0x%08X\r"
+#~ msgstr "adr: 0x%08X"
+
+#~ msgid "Error during file read.\n"
+#~ msgstr "ERREUR durant la lecture du fichier.\n"
+
+#, fuzzy
+#~ msgid "Disconnecting %s\n"
+#~ msgstr "Déconnexion de %s du port ppdev %s\n"
+
+#, fuzzy
+#~ msgid "Disconnecting %s from FTDI device %s\n"
+#~ msgstr "Déconnexion de %s du port ppdev %s\n"
+
+#, fuzzy
+#~ msgid "Initializing %s on FTDI device %s\n"
+#~ msgstr "Initialisation de %s sur le port ppdev %s\n"
+
+#, fuzzy
+#~ msgid "Initializing on FTDI device %s\n"
+#~ msgstr "Initialisation de %s sur le port ppdev %s\n"
+
+#, fuzzy
+#~ msgid "Disconnecting %s, device %s\n"
+#~ msgstr "Déconnexion de %s du port ppdev %s\n"
+
+#, fuzzy
+#~ msgid "Initializing %s, device %s\n"
+#~ msgstr "Initialisation de %s sur le port ppdev %s\n"
+
+#, fuzzy
+#~ msgid "Initializing device %s\n"
+#~ msgstr "Initialisation de %s sur le port ppdev %s\n"
+
+#~ msgid ""
+#~ "Usage: %s FILENAME\n"
+#~ "Run command sequence from external FILENAME from the repository.\n"
+#~ "\n"
+#~ "FILENAME Name of the file with commands\n"
+#~ msgstr ""
+#~ "Usage: %s FICHIER\n"
+#~ "Exécuter une séquence de commandes à partir du FICHIER du dépôt externe.\n"
+#~ "\n"
+#~ "FICHIER nom du fichier contenant les commandes\n"
+
+#~ msgid "supported: AMD 29LV160; 1x8 Bit"
+#~ msgstr "supportés: AMD 29LV160; 1x8 Bit"
+
+#~ msgid "Unknown connection type: %s\n"
+#~ msgstr "Type de connexion inconnue: %s\n"
+
+#~ msgid ""
+#~ "Usage: %s PORTADDR CABLE\n"
+#~ "Usage: %s DEV CABLE\n"
+#~ "Select JTAG cable connected to parallel port.\n"
+#~ "\n"
+#~ "PORTADDR parallel port address (e.g. 0x378)\n"
+#~ "CABLE cable type\n"
+#~ "DEV ppdev device (e.g. /dev/parport0)\n"
+#~ "\n"
+#~ "List of supported cables:\n"
+#~ "%-13s No cable connected\n"
+#~ msgstr ""
+#~ "Usage: %s ADDR_PORT CABLE\n"
+#~ "Usage: %s PÉRIPHÉRIQUE CABLE\n"
+#~ "Sélectionner le cable JTAG connecté au port parallèle.\n"
+#~ "\n"
+#~ "ADDR_PORT adresse du port parallèle (i.e. 0x378)\n"
+#~ "CABLE type de cable\n"
+#~ "PÉR PÉRiphérique (i.e. /dev/parport0)\n"
+#~ "\n"
+#~ "Lists des cables supportés:\n"
+#~ "%-13s Aucun cable connecté\n"
+
+#~ msgid "Note: Supported configuration is 2 x 16 bit or 1 x 16 bit only\n"
+#~ msgstr ""
+#~ "Note: configuration supportés sont 2 x 16 bits ou 1 x 16 bits seulement\n"
+
+#~ msgid "Changed cable to 'none'\n"
+#~ msgstr "Cable changé pour 'aucun'\n"
--- /dev/null
+# Kinyarwanda translations for jtag package.
+# Copyright (C) 2005 Free Software Foundation, Inc.
+# This file is distributed under the same license as the jtag package.
+# Steve Murphy <murf@e-tools.com>, 2005.
+# Steve performed initial rough translation from compendium built from translations provided by the following translators:
+# Philibert Ndandali <ndandali@yahoo.fr>, 2005.
+# Viateur MUGENZI <muvia1@yahoo.fr>, 2005.
+# Noëlla Mupole <s24211045@tuks.co.za>, 2005.
+# Carole Karema <karemacarole@hotmail.com>, 2005.
+# JEAN BAPTISTE NGENDAHAYO <ngenda_denis@yahoo.co.uk>, 2005.
+# Augustin KIBERWA <akiberwa@yahoo.co.uk>, 2005.
+# Donatien NSENGIYUMVA <ndonatienuk@yahoo.co.uk>, 2005.
+# Antoine Bigirimana <antoine@e-tools.com>, 2005.
+#
+msgid ""
+msgstr ""
+"Project-Id-Version: jtag 0.5.1\n"
+"Report-Msgid-Bugs-To: marcel@telka.sk\n"
+"POT-Creation-Date: 2009-04-08 22:49+0200\n"
+"PO-Revision-Date: 2005-04-04 10:55-0700\n"
+"Last-Translator: Steven Michael Murphy <murf@e-tools.com>\n"
+"Language-Team: Kinyarwanda <translation-team-rw@lists.sourceforge.net>\n"
+"MIME-Version: 1.0\n"
+"Content-Type: text/plain; charset=UTF-8\n"
+"Content-Transfer-Encoding: 8bit\n"
+
+#: bsdl_bison.y:257
+msgid "Unsupported BSDL construct found"
+msgstr ""
+
+#: bsdl_bison.y:320
+msgid "Error in Instruction_Opcode attribute statement"
+msgstr ""
+
+#: bsdl_bison.y:333
+msgid "Multiple opcode patterns are not supported, first pattern will be used"
+msgstr ""
+
+#: bsdl_bison.y:364
+msgid "Error in Opcode List"
+msgstr ""
+
+#: bsdl_bison.y:450
+msgid "Error in Boundary Cell description"
+msgstr ""
+
+#: bsdl_bison.y:574
+#, fuzzy
+msgid "Error in ISC_Pin_Behavior Definition"
+msgstr "Icyabitswe Uburebure"
+
+#: bsdl_bison.y:586
+#, fuzzy
+msgid "Error in ISC_Fixed_System_Pins Definition"
+msgstr "Icyabitswe Uburebure"
+
+#: bsdl_bison.y:613
+#, fuzzy
+msgid "Error in ISC_Security Definition"
+msgstr "Icyabitswe Uburebure"
+
+#: bsdl_bison.y:647
+#, fuzzy
+msgid "Error in ISC_Flow Definition"
+msgstr "Icyabitswe Uburebure"
+
+#: bsdl_bison.y:811
+#, fuzzy
+msgid "Error in ISC_Procedure Definition"
+msgstr "Icyabitswe Uburebure"
+
+#: bsdl_bison.y:835
+#, fuzzy
+msgid "Error in ISC_Action Definition"
+msgstr "Icyabitswe Uburebure"
+
+#: bsdl_bison.y:875 bsdl_bison.y:883 vhdl_bison.y:657
+#, c-format
+msgid "Line %d, %s.\n"
+msgstr ""
+
+#: bsdl_bison.y:1114 bsdl_bison.y:1182 bsdl_bison.y:1241 bsdl_bison.y:1276
+#: bsdl_bison.y:1314 bsdl_bison.y:1464 bsdl_bison.y:1514 bsdl_flex.l:443
+#: bsdl_flex.l:529 src/bsdl/bsdl_sem.c:169 src/bsdl/bsdl_sem.c:545
+#: vhdl_bison.y:821 vhdl_bison.y:922 vhdl_bison.y:1010 vhdl_bison.y:1042
+#: vhdl_bison.y:1062 vhdl_bison.y:1092 vhdl_bison.y:1109 vhdl_bison.y:1127
+#: vhdl_flex.l:373 vhdl_flex.l:460 svf_flex.l:369
+#, fuzzy, c-format
+msgid "Out of memory, %s line %i\n"
+msgstr "Bya"
+
+#: src/bsdl/bsdl.c:138
+#, fuzzy
+msgid "No JTAG chain available\n"
+msgstr "(Oya Isobanuramiterere Bihari"
+
+#: src/bsdl/bsdl.c:143
+msgid "Chain without any parts\n"
+msgstr ""
+
+#: src/bsdl/bsdl.c:160
+#, c-format
+msgid "Reading file '%s'\n"
+msgstr ""
+
+#: src/bsdl/bsdl.c:164
+#, fuzzy, c-format
+msgid "Unable to open BSDL file '%s'\n"
+msgstr "Kuri Gufungura IDOSIYE"
+
+#: src/bsdl/bsdl.c:178
+#, c-format
+msgid "BSDL file '%s' passed VHDL stage correctly\n"
+msgstr ""
+
+#: src/bsdl/bsdl.c:185
+#, c-format
+msgid "BSDL file '%s' passed BSDL stage correctly\n"
+msgstr ""
+
+#: src/bsdl/bsdl.c:192
+#, c-format
+msgid "BSDL file '%s' contains errors in VHDL stage, stopping\n"
+msgstr ""
+
+#: src/bsdl/bsdl.c:326 src/tap/detect.c:364
+#, fuzzy, c-format
+msgid " Filename: %s\n"
+msgstr "Izina ry'idosiye:"
+
+#: src/bsdl/bsdl.c:338
+#, fuzzy, c-format
+msgid "Cannot open directory %s\n"
+msgstr "Gufungura"
+
+#: bsdl_flex.l:405 vhdl_flex.l:333
+#, c-format
+msgid "Illegal character %c (/%03o) at line %d:\n"
+msgstr ""
+
+#: bsdl_flex.l:437 vhdl_flex.l:365
+msgid "Scanner could not be initialized\n"
+msgstr ""
+
+#: src/bsdl/bsdl_sem.c:238
+msgid "No IDCODE specification found.\n"
+msgstr ""
+
+#: src/bsdl/bsdl_sem.c:640
+msgid "IDCODE matched\n"
+msgstr ""
+
+#: src/bsdl/bsdl_sem.c:643
+msgid "IDCODE mismatch\n"
+msgstr ""
+
+#: src/bsdl/bsdl_sem.c:690
+msgid "BSDL stage reported errors, aborting.\n"
+msgstr ""
+
+#: src/bsdl/bsdl_sem.c:698
+#, c-format
+msgid "Got IDCODE: %s\n"
+msgstr ""
+
+#: vhdl_bison.y:219
+msgid "Improper Entity declaration"
+msgstr ""
+
+#: vhdl_bison.y:220
+msgid "Check if source file is BSDL"
+msgstr ""
+
+#: vhdl_bison.y:230 vhdl_bison.y:238
+#, fuzzy
+msgid "Syntax Error"
+msgstr "Ikosa ry'imyandikire"
+
+#: vhdl_bison.y:248
+msgid "Improper Port declaration"
+msgstr ""
+
+#: vhdl_bison.y:280
+#, fuzzy
+msgid "Error in Package declaration(s)"
+msgstr "Icyabitswe Uburebure"
+
+#: vhdl_bison.y:305
+#, fuzzy
+msgid "Error in Standard Package"
+msgstr "Icyabitswe Uburebure"
+
+#: vhdl_bison.y:323
+#, fuzzy
+msgid "Error in Standard Declarations"
+msgstr "Icyabitswe Uburebure"
+
+#: vhdl_bison.y:334
+#, fuzzy
+msgid "Error in Attribute type identification"
+msgstr "Icyabitswe Uburebure"
+
+#: vhdl_bison.y:350
+#, fuzzy
+msgid "Error in Type definition"
+msgstr "Icyabitswe Uburebure"
+
+#: vhdl_bison.y:366
+#, fuzzy
+msgid "Error in Bit definition"
+msgstr "Icyabitswe Uburebure"
+
+#: vhdl_bison.y:377
+#, fuzzy
+msgid "Error in Record Definition"
+msgstr "Icyabitswe Uburebure"
+
+#: vhdl_bison.y:390
+#, fuzzy
+msgid "Error in defered constant"
+msgstr "Icyabitswe Uburebure"
+
+#: vhdl_bison.y:402
+#, fuzzy
+msgid "Error in Package Body definition"
+msgstr "Icyabitswe Uburebure"
+
+#: vhdl_bison.y:414
+#, fuzzy
+msgid "Error in Cell Constant definition"
+msgstr "Icyabitswe Uburebure"
+
+#: vhdl_bison.y:425
+#, fuzzy
+msgid "Error in Cell Data Record"
+msgstr "Ukwihuza Byanze"
+
+#: vhdl_bison.y:434
+#, fuzzy
+msgid "Error in Cell_Type Function field"
+msgstr "Ukwihuza Byanze"
+
+#: vhdl_bison.y:441
+#, fuzzy
+msgid "Error in BScan_Inst Instruction field"
+msgstr "Ukwihuza Byanze"
+
+#: vhdl_bison.y:448
+#, fuzzy
+msgid "Error in Constant CAP data source field"
+msgstr "Icyabitswe Uburebure"
+
+#: vhdl_bison.y:472
+#, fuzzy
+msgid "Error in User-Defined Package declarations"
+msgstr "Icyabitswe Uburebure"
+
+#: vhdl_bison.y:479
+msgid "Unknown VHDL statement"
+msgstr ""
+
+#: vhdl_bison.y:502
+#, fuzzy
+msgid "Error in Attribute specification"
+msgstr "Icyabitswe Uburebure"
+
+#: vhdl_bison.y:651
+#, c-format
+msgid "In Package %s, Line %d, %s.\n"
+msgstr ""
+
+#: vhdl_bison.y:664
+msgid "Too many errors"
+msgstr ""
+
+#: vhdl_flex.l:518
+#, fuzzy, c-format
+msgid "Cannot open file %s or %s.\n"
+msgstr "Gufungura"
+
+#: src/bus/au1500.c:126
+#, fuzzy, c-format
+msgid "AU1500 compatible bus driver via BSR (JTAG part No. %d)\n"
+msgstr "Musomyi: Biturutse"
+
+#: src/bus/au1500.c:297
+msgid "AU1500 BUS Driver via BSR"
+msgstr ""
+
+#: src/bus/avr32.c:127
+#, c-format
+msgid "%s(%d): error, "
+msgstr ""
+
+# #-#-#-#-# dbaccess.pot (PACKAGE VERSION) #-#-#-#-#
+# #-#-#-#-# dbaccess.pot (PACKAGE VERSION) #-#-#-#-#
+# #-#-#-#-# dbaccess.pot (PACKAGE VERSION) #-#-#-#-#
+#: src/bus/avr32.c:150
+#, fuzzy, c-format
+msgid "%s: instr=%s\n"
+msgstr "%-13s%s"
+
+# #-#-#-#-# dbaccess.pot (PACKAGE VERSION) #-#-#-#-#
+# #-#-#-#-# dbaccess.pot (PACKAGE VERSION) #-#-#-#-#
+# #-#-#-#-# dbaccess.pot (PACKAGE VERSION) #-#-#-#-#
+#: src/bus/avr32.c:153
+#, fuzzy, c-format
+msgid "%s: ret=%s\n"
+msgstr "%-13s%s"
+
+# #-#-#-#-# dbaccess.pot (PACKAGE VERSION) #-#-#-#-#
+# #-#-#-#-# dbaccess.pot (PACKAGE VERSION) #-#-#-#-#
+# #-#-#-#-# dbaccess.pot (PACKAGE VERSION) #-#-#-#-#
+#: src/bus/avr32.c:166
+#, fuzzy, c-format
+msgid "%s: data=%s\n"
+msgstr "%-13s%s"
+
+#: src/bus/avr32.c:169
+#, c-format
+msgid "%s: data out=%s\n"
+msgstr ""
+
+#: src/bus/avr32.c:190
+#, c-format
+msgid "%s: slave=%01x, addr=%08x, %s\n"
+msgstr ""
+
+#: src/bus/avr32.c:215 src/bus/avr32.c:240 src/bus/avr32.c:311
+#: src/bus/avr32.c:322
+#, c-format
+msgid "%s: data=%08x\n"
+msgstr ""
+
+#: src/bus/avr32.c:282
+#, c-format
+msgid "%s: addr=%08x, mode=%s\n"
+msgstr ""
+
+#: src/bus/avr32.c:370
+#, fuzzy, c-format
+msgid "%s: read status %08x\n"
+msgstr "%s:Leta"
+
+#: src/bus/avr32.c:401
+#, c-format
+msgid "%s: status=%08x\n"
+msgstr ""
+
+#: src/bus/avr32.c:569
+#, fuzzy, c-format
+msgid "AVR32 multi-mode bus driver (JTAG part No. %d)\n"
+msgstr "Musomyi: Biturutse"
+
+#: src/bus/avr32.c:651
+#, fuzzy, c-format
+msgid "%s:addr=%08x\n"
+msgstr "Aderesi"
+
+#: src/bus/avr32.c:760
+msgid ""
+"Atmel AVR32 multi-mode bus driver, requires <mode> parameter\n"
+" valid <mode> parameters:\n"
+" x8: 8 bit bus for the uncached HSB area, via OCD registers\n"
+" x16: 16 bit bus for the uncached HSB area, via OCD "
+"registers\n"
+" x32: 32 bit bus for the uncached HSB area, via OCD "
+"registers\n"
+" OCD : 32 bit bus for the OCD registers\n"
+" HSBC: 32 bit bus for the cached HSB area, via SAB\n"
+" HSBU: 32 bit bus for the uncached HSB area, via SAB"
+msgstr ""
+
+#: src/bus/bcm1250.c:120
+#, fuzzy, c-format
+msgid "Broadcom BCM1250 compatible bus driver via BSR (JTAG part No. %d)\n"
+msgstr "Musomyi: Biturutse"
+
+#: src/bus/bcm1250.c:488
+#, fuzzy
+msgid "Broadcom BCM1250 compatible bus driver via BSR"
+msgstr "Musomyi: Biturutse"
+
+#: src/bus/bf533_ezkit.c:143
+#, fuzzy, c-format
+msgid "Blackfin BF533 EZKit compatible bus driver via BSR (JTAG part No. %d)\n"
+msgstr "Musomyi: Biturutse"
+
+#: src/bus/bf533_ezkit.c:324
+msgid "Blackfin BF533 EZKit board bus driver"
+msgstr ""
+
+#: src/bus/bf533_stamp.c:144
+#, fuzzy, c-format
+msgid "Blackfin BF533 compatible bus driver via BSR (JTAG part No. %d)\n"
+msgstr "Musomyi: Biturutse"
+
+#: src/bus/bf533_stamp.c:325
+msgid "Blackfin BF533 Stamp board bus driver"
+msgstr ""
+
+#: src/bus/bf537_stamp.c:317 src/bus/pxa2x0.c:242
+#, fuzzy, c-format
+msgid "%s (JTAG part No. %d)\n"
+msgstr "Musomyi: Biturutse"
+
+#: src/bus/bf537_stamp.c:337
+#, fuzzy
+msgid "Blackfin BF537 Stamp board bus driver via BSR"
+msgstr "Musomyi: Biturutse"
+
+#: src/bus/bf537_stamp.c:347
+#, fuzzy
+msgid "Blackfin BF537 EZ-KIT board bus driver via BSR"
+msgstr "Musomyi: Biturutse"
+
+#: src/bus/bf537_stamp.c:357
+#, fuzzy
+msgid "Blackfin BF527 EZ-KIT board bus driver via BSR"
+msgstr "Musomyi: Biturutse"
+
+#: src/bus/bf537_stamp.c:367
+#, fuzzy
+msgid "Blackfin BF538F EZ-KIT board bus driver"
+msgstr "Musomyi: Biturutse"
+
+#: src/bus/bf537_stamp.c:377
+#, fuzzy
+msgid "Blackfin BF526 EZ-KIT board bus driver"
+msgstr "Musomyi: Biturutse"
+
+#: src/bus/bf548_ezkit.c:142
+#, fuzzy, c-format
+msgid ""
+"Blackfin BF548 EZ-KIT compatible bus driver via BSR (JTAG part No. %d)\n"
+msgstr "Musomyi: Biturutse"
+
+#: src/bus/bf548_ezkit.c:313
+msgid "Blackfin BF548 EZ-KIT board bus driver"
+msgstr ""
+
+#: src/bus/bf561_ezkit.c:147
+#, fuzzy, c-format
+msgid ""
+"Blackfin BF561 EZ-KIT compatible bus driver via BSR (JTAG part No. %d)\n"
+msgstr "Musomyi: Biturutse"
+
+#: src/bus/bf561_ezkit.c:336
+msgid "Blackfin BF561 EZ-KIT board bus driver"
+msgstr ""
+
+#: src/bus/bscoach.c:146
+#, fuzzy, c-format
+msgid ""
+"Goepel electronic Boundary Scan Coach compatible bus driver via BSR (JTAG "
+"part No. %d)\n"
+msgstr "Musomyi: Biturutse"
+
+#: src/bus/bscoach.c:382
+msgid ""
+"Goepel Boundary Scan Coach compatible bus driver for flash programming via "
+"BSR"
+msgstr ""
+
+#: src/bus/buses.c:167 src/cmd/include.c:74 src/cmd/parse.c:59
+#: src/cmd/parse.c:93 src/cmd/scan.c:88 src/cmd/shell.c:62 src/jtag.c:407
+#: src/jtag.c:426 src/jtag.c:450 src/tap/detect.c:271
+#: src/tap/usbconn/libusb.c:150 src/tap/usbconn/libftd2xx.c:283
+#: src/tap/usbconn/libftdi.c:252
+#, fuzzy, c-format
+msgid "Out of memory\n"
+msgstr "Bya"
+
+#: src/bus/ejtag.c:149
+#, fuzzy, c-format
+msgid "EJTAG compatible bus driver via PrAcc (JTAG part No. %d)\n"
+msgstr "Musomyi: Biturutse"
+
+#: src/bus/ejtag.c:176
+#, c-format
+msgid "%s(%d) EJADDRESS, EJDATA or EJCONTROL register not found\n"
+msgstr ""
+
+#: src/bus/ejtag.c:195
+#, c-format
+msgid "%s(%d) Reset occurred, ctrl=%s\n"
+msgstr ""
+
+#: src/bus/ejtag.c:202
+#, c-format
+msgid "%s(%d) No processor access, ctrl=%s\n"
+msgstr ""
+
+#: src/bus/ejtag.c:215
+#, c-format
+msgid "%s(%d) PrAcc bad alignment: addr=0x%08x\n"
+msgstr ""
+
+#: src/bus/ejtag.c:229
+#, c-format
+msgid "%s(%d) PrAcc write: addr=0x%08x data=0x%08x\n"
+msgstr ""
+
+#: src/bus/ejtag.c:236
+#, c-format
+msgid "%s(%d) Unknown write addr=0x%08x data=0x%08x\n"
+msgstr ""
+
+#: src/bus/ejtag.c:291
+#, c-format
+msgid "%s(%d) EJCONTROL or EJIMPCODE register not found\n"
+msgstr ""
+
+#: src/bus/ejtag.c:481
+#, c-format
+msgid "%s(%d) Failed to enter debug mode, ctrl=%s\n"
+msgstr ""
+
+#: src/bus/ejtag.c:677
+#, fuzzy
+msgid "EJTAG compatible bus driver via PrAcc"
+msgstr "Musomyi: Biturutse"
+
+#: src/bus/fjmem.c:91 src/bus/fjmem.c:106 src/bus/fjmem.c:187
+#: src/bus/fjmem.c:193 src/bus/fjmem.c:295 src/cmd/instruction.c:95
+#: src/cmd/register.c:71 src/cmd/register.c:85 src/cmd/salias.c:72
+#: src/cmd/signal.c:88 src/tap/detect.c:212 src/tap/detect.c:235
+#: src/tap/tap.c:53
+#, fuzzy, c-format
+msgid "out of memory\n"
+msgstr "Inyuma Bya"
+
+#: src/bus/fjmem.c:101 src/cmd/instruction.c:84
+#, fuzzy, c-format
+msgid "invalid instruction length\n"
+msgstr "Sibyo"
+
+#: src/bus/fjmem.c:367
+#, c-format
+msgid "Wrong parameter specification: %s\n"
+msgstr ""
+
+#: src/bus/fjmem.c:424
+#, c-format
+msgid "Parameter for instruction opcode missing.\n"
+msgstr ""
+
+#: src/bus/fjmem.c:473
+#, fuzzy, c-format
+msgid "fjmem FPGA bus driver via USER register (JTAG part No. %d)\n"
+msgstr "Musomyi: Biturutse"
+
+#: src/bus/fjmem.c:595 src/bus/fjmem.c:627 src/bus/fjmem.c:661
+#: src/bus/fjmem.c:696 src/bus/jopcyc.c:549 src/bus/jopcyc.c:584
+#: src/bus/jopcyc.c:615 src/bus/jopcyc.c:647 src/bus/zefant-xs3.c:692
+#: src/bus/zefant-xs3.c:759 src/bus/zefant-xs3.c:807 src/bus/zefant-xs3.c:859
+#, c-format
+msgid "Address out of range\n"
+msgstr ""
+
+#: src/bus/fjmem.c:713
+msgid ""
+"FPGA JTAG memory bus driver via USER register, requires parameters:\n"
+" opcode=<USERx OPCODE> [len=<FJMEM REG LEN>]"
+msgstr ""
+
+#: src/bus/generic_bus.c:40 src/cmd/get.c:63 src/cmd/set.c:77
+#: src/cmd/test.c:65
+#, fuzzy, c-format
+msgid "signal '%s' not found\n"
+msgstr "OYA"
+
+#: src/bus/ixp425.c:121
+#, fuzzy, c-format
+msgid "Intel IXP425 compatible bus driver via BSR (JTAG part No. %d)\n"
+msgstr "Musomyi: Biturutse"
+
+#: src/bus/ixp425.c:291
+#, fuzzy
+msgid "Intel IXP425 compatible bus driver via BSR"
+msgstr "Musomyi: Biturutse"
+
+#: src/bus/jopcyc.c:349
+#, fuzzy, c-format
+msgid ""
+"JOP.design Cyclone Board compatible bus driver via BSR (JTAG part No. %d)\n"
+msgstr "Musomyi: Biturutse"
+
+#: src/bus/jopcyc.c:677
+#, fuzzy
+msgid "JOP.design Cyclone Board compatible bus driver via BSR"
+msgstr "Musomyi: Biturutse"
+
+#: src/bus/lh7a400.c:142
+#, fuzzy, c-format
+msgid "Sharp LH7A400 compatible bus driver via BSR (JTAG part No. %d)\n"
+msgstr "Musomyi: Biturutse"
+
+#: src/bus/lh7a400.c:320
+#, fuzzy
+msgid "Sharp LH7A400 compatible bus driver via BSR (flash access only!)"
+msgstr "Musomyi: Biturutse"
+
+#: src/bus/mpc5200.c:147
+#, fuzzy, c-format
+msgid "Freescale MPC5200 compatible bus driver via BSR (JTAG part No. %d)\n"
+msgstr "Musomyi: Biturutse"
+
+#: src/bus/mpc5200.c:161
+msgid "LocalPlus Bus"
+msgstr ""
+
+#: src/bus/mpc5200.c:376
+#, fuzzy
+msgid "Freescale MPC5200 compatible bus driver via BSR, parameter: [mux]"
+msgstr "Musomyi: Biturutse"
+
+#: src/bus/mpc824x.c:107
+#, c-format
+msgid ""
+" Bus width 64 exists in mpc824x, but not supported by UrJTAG currently\n"
+msgstr ""
+
+#: src/bus/mpc824x.c:111
+#, c-format
+msgid " Only 8,32 and 64 bus width are supported for Banks 0 and 1\n"
+msgstr ""
+
+#: src/bus/mpc824x.c:120
+#, c-format
+msgid ""
+"Usage: initbus mpc824x [width=WIDTH] [revbits] [dbgAddr] [dbgData]\n"
+"\n"
+" WIDTH data bus width - 8, 32, 64 (default 8)\n"
+" revbits reverse bits in data bus (default - no)\n"
+" dbgAddr display address bus state (default - no)\n"
+" dbgData display data bus state (default - no)\n"
+msgstr ""
+
+#: src/bus/mpc824x.c:140
+#, c-format
+msgid " Using default bus width %d\n"
+msgstr ""
+
+#: src/bus/mpc824x.c:235
+#, fuzzy, c-format
+msgid "Motorola MPC824x compatible bus driver via BSR (JTAG part No. %d)\n"
+msgstr "Musomyi: Biturutse"
+
+#: src/bus/mpc824x.c:256
+msgid "Base ROM Interface (Bank 1)"
+msgstr ""
+
+#: src/bus/mpc824x.c:265 src/bus/mpc824x.c:283
+msgid "Base ROM Interface (Bank 0)"
+msgstr ""
+
+#: src/bus/mpc824x.c:311
+#, c-format
+msgid "Warning: unhandled bus width: %i\n"
+msgstr ""
+
+#: src/bus/mpc824x.c:325
+#, c-format
+msgid "Addr [%2d:0]: %06X "
+msgstr ""
+
+#: src/bus/mpc824x.c:370
+#, c-format
+msgid "Data WR [%d:0]: %08X "
+msgstr ""
+
+#: src/bus/mpc824x.c:407
+#, c-format
+msgid "Data RD [%d:0]: %08X "
+msgstr ""
+
+#: src/bus/mpc824x.c:519
+#, fuzzy
+msgid "Motorola MPC824x compatible bus driver via BSR"
+msgstr "Musomyi: Biturutse"
+
+#: src/bus/ppc405ep.c:116
+#, fuzzy, c-format
+msgid "IBM PowerPC 405EP compatible bus driver via BSR (JTAG part No. %d)\n"
+msgstr "Musomyi: Biturutse"
+
+#: src/bus/ppc405ep.c:267
+#, fuzzy
+msgid "IBM PowerPC 405EP compatible bus driver via BSR"
+msgstr "Musomyi: Biturutse"
+
+#: src/bus/ppc440gx_ebc8.c:118
+#, fuzzy, c-format
+msgid ""
+"IBM PowerPC 440GX 8-bit compatible bus driver via BSR (JTAG part No. %d)\n"
+msgstr "Musomyi: Biturutse"
+
+#: src/bus/ppc440gx_ebc8.c:269
+#, fuzzy
+msgid "IBM PowerPC 440GX 8-bit EBC compatible bus driver via BSR"
+msgstr "Musomyi: Biturutse"
+
+#: src/bus/prototype.c:129
+#, c-format
+msgid "value %s not defined for parameter %s\n"
+msgstr ""
+
+#: src/bus/prototype.c:138
+#, fuzzy, c-format
+msgid "signal '%s' is not found\n"
+msgstr "OYA"
+
+#: src/bus/prototype.c:166
+#, c-format
+msgid "parameter %s is unknown\n"
+msgstr ""
+
+#: src/bus/prototype.c:195
+#, c-format
+msgid "parameters alsb=<signal> and/or amsb=<signal> are not defined\n"
+msgstr ""
+
+#: src/bus/prototype.c:243
+#, c-format
+msgid "parameters dlsb=<signal> and/or dmsb=<signal> are not defined\n"
+msgstr ""
+
+#: src/bus/prototype.c:248
+#, c-format
+msgid "parameter cs=<signal> or ncs=<signal> is not defined\n"
+msgstr ""
+
+#: src/bus/prototype.c:253
+#, c-format
+msgid "parameter oe=<signal> or noe=<signal> is not defined\n"
+msgstr ""
+
+#: src/bus/prototype.c:258
+#, c-format
+msgid "parameter we=<signal> or nwe=<signal> is not defined\n"
+msgstr ""
+
+#: src/bus/prototype.c:283
+#, fuzzy, c-format
+msgid "Configurable prototype bus driver via BSR (JTAG part No. %d)\n"
+msgstr "Musomyi: Biturutse"
+
+#: src/bus/prototype.c:436
+msgid ""
+"Configurable prototype bus driver via BSR, requires parameters:\n"
+" amsb=<addr MSB> alsb=<addr LSB> dmsb=<data MSB> dlsb=<data LSB>\n"
+" ncs=<CS#>|cs=<CS> noe=<OE#>|oe=<OE> nwe=<WE#>|we=<WE> [amode=auto|"
+"x8|x16|x32]"
+msgstr ""
+
+#: src/bus/pxa2x0.c:302 src/bus/pxa2x0.c:392
+#, fuzzy
+msgid "Static Chip Select 0"
+msgstr "0"
+
+#: src/bus/pxa2x0.c:364
+msgid "Memory Mapped registers (Memory Ctl)"
+msgstr ""
+
+#: src/bus/pxa2x0.c:457
+msgid "PXA270 internal address space (cfg, SRAM)"
+msgstr ""
+
+#: src/bus/pxa2x0.c:475
+msgid "PXA270 SDRAM space (4x 64MB)"
+msgstr ""
+
+#: src/bus/pxa2x0.c:702
+#, fuzzy
+msgid "Intel PXA2x0 compatible bus driver via BSR"
+msgstr "Musomyi: Biturutse"
+
+#: src/bus/pxa2x0.c:718
+#, fuzzy
+msgid "Intel PXA27x compatible bus driver via BSR"
+msgstr "Musomyi: Biturutse"
+
+#: src/bus/readmem.c:55 src/bus/writemem.c:49 src/flash/detectflash.c:56
+#, fuzzy, c-format
+msgid "Error: Missing bus driver!\n"
+msgstr "Musomyi:"
+
+#: src/bus/readmem.c:62 src/bus/writemem.c:56
+#, fuzzy, c-format
+msgid "Error: Bus width detection failed\n"
+msgstr "Ubugari"
+
+#: src/bus/readmem.c:68 src/bus/writemem.c:62
+#, fuzzy, c-format
+msgid "Unknown bus width!\n"
+msgstr "Ubugari"
+
+#: src/bus/readmem.c:75 src/bus/writemem.c:69
+#, fuzzy, c-format
+msgid "address: 0x%08X\n"
+msgstr "Aderesi"
+
+#: src/bus/readmem.c:76 src/bus/writemem.c:70
+#, fuzzy, c-format
+msgid "length: 0x%08X\n"
+msgstr "Uburebure"
+
+#: src/bus/readmem.c:79 src/bus/writemem.c:73
+#, fuzzy, c-format
+msgid "length is 0.\n"
+msgstr "Uburebure ni 0"
+
+#: src/bus/readmem.c:85
+#, c-format
+msgid "reading:\n"
+msgstr ""
+
+#: src/bus/readmem.c:105 src/bus/writemem.c:87 src/flash/flash.c:160
+#: src/flash/flash.c:205 src/flash/flash.c:308 src/flash/flash.c:358
+#, fuzzy, c-format
+msgid "addr: 0x%08X"
+msgstr "Aderesi"
+
+#: src/bus/readmem.c:113 src/bus/writemem.c:122 src/flash/flash.c:220
+#, fuzzy, c-format
+msgid ""
+"\n"
+"Done.\n"
+msgstr "Byakozwe."
+
+#: src/bus/s3c4510x.c:182
+#, fuzzy, c-format
+msgid ""
+"Samsung S3C4510B compatibile bus driver via BSR (JTAG part No. %d) RCS0=%"
+"ubit\n"
+msgstr "Musomyi: Biturutse"
+
+#: src/bus/s3c4510x.c:414
+#, fuzzy
+msgid "Samsung S3C4510B compatible bus driver via BSR"
+msgstr "Musomyi: Biturutse"
+
+#: src/bus/sa1110.c:128
+#, fuzzy, c-format
+msgid "Intel SA-1110 compatible bus driver via BSR (JTAG part No. %d)\n"
+msgstr "Musomyi: Biturutse"
+
+#: src/bus/sa1110.c:305
+#, fuzzy
+msgid "Intel SA-1110 compatible bus driver via BSR"
+msgstr "Musomyi: Biturutse"
+
+#: src/bus/sh7727.c:138
+#, fuzzy, c-format
+msgid "Hitachi SH7727 compatible bus driver via BSR (JTAG part No. %d)\n"
+msgstr "Musomyi: Biturutse"
+
+#: src/bus/sh7727.c:165
+#, fuzzy, c-format
+msgid "Error: Invalid bus width (MD3 = MD4 = 0)!\n"
+msgstr "Ubugari 0"
+
+#: src/bus/sh7727.c:346
+#, fuzzy
+msgid "Hitachi SH7727 compatible bus driver via BSR"
+msgstr "Musomyi: Biturutse"
+
+#: src/bus/sh7750r.c:136
+#, fuzzy, c-format
+msgid "Hitachi SH7750R compatible bus driver via BSR (JTAG part No. %d)\n"
+msgstr "Musomyi: Biturutse"
+
+#: src/bus/sh7750r.c:328
+#, fuzzy
+msgid "Hitachi SH7750R compatible bus driver via BSR"
+msgstr "Musomyi: Biturutse"
+
+#: src/bus/sh7751r.c:130
+#, fuzzy, c-format
+msgid "Hitachi SH7751R compatible bus driver via BSR (JTAG part No. %d)\n"
+msgstr "Musomyi: Biturutse"
+
+#: src/bus/sh7751r.c:316
+#, fuzzy
+msgid "Hitachi SH7751R compatible bus driver via BSR"
+msgstr "Musomyi: Biturutse"
+
+#: src/bus/sharc21065l.c:123
+#, fuzzy, c-format
+msgid ""
+"Analog Device's SHARC 21065L compatible bus driver via BSR (JTAG part No. %"
+"d)\n"
+msgstr "Musomyi: Biturutse"
+
+#: src/bus/sharc21065l.c:135
+msgid "Boot Memory Select"
+msgstr ""
+
+#: src/bus/sharc21065l.c:309
+#, fuzzy
+msgid "SHARC_21065L compatible bus driver via BSR"
+msgstr "Musomyi: Biturutse"
+
+#: src/bus/slsup3.c:167
+#, fuzzy, c-format
+msgid "SLS UP3 bus driver via BSR (JTAG part No. %d)\n"
+msgstr "Musomyi: Biturutse"
+
+#: src/bus/slsup3.c:178
+msgid "Flash Memory (2 MByte) byte mode"
+msgstr ""
+
+#: src/bus/slsup3.c:187
+msgid "SRAM 128KByte (64K x 16)"
+msgstr ""
+
+#: src/bus/slsup3.c:196
+msgid "LCD Display (RS select by A0)"
+msgstr ""
+
+#: src/bus/slsup3.c:423
+#, fuzzy
+msgid "SLS UP3 compatible bus driver via BSR"
+msgstr "Musomyi: Biturutse"
+
+#: src/bus/tx4925.c:140
+#, fuzzy, c-format
+msgid "Toshiba TX4925 compatible bus driver via BSR (JTAG part No. %d)\n"
+msgstr "Musomyi: Biturutse"
+
+#: src/bus/tx4925.c:311
+#, fuzzy
+msgid "Toshiba TX4925 compatible bus driver via BSR"
+msgstr "Musomyi: Biturutse"
+
+#: src/bus/writemem.c:79
+#, c-format
+msgid "writing:\n"
+msgstr ""
+
+#: src/bus/writemem.c:91
+#, c-format
+msgid "Data not on word boundary, NOT SUPPORTED!"
+msgstr ""
+
+#: src/bus/writemem.c:93
+#, fuzzy, c-format
+msgid "Unexpected end of file!\n"
+msgstr "Impera Bya"
+
+#: src/bus/writemem.c:94
+#, fuzzy, c-format
+msgid "Addr: 0x%08X\n"
+msgstr "Aderesi"
+
+#: src/bus/writemem.c:99
+#, c-format
+msgid "Short read: bc=0x%X\n"
+msgstr ""
+
+#: src/bus/zefant-xs3.c:423
+#, fuzzy, c-format
+msgid ""
+"Simple Solutions Zefant-XS3 Board compatible bus driver via BSR (JTAG part "
+"No. %d)\n"
+msgstr "Musomyi: Biturutse"
+
+#: src/bus/zefant-xs3.c:737 src/bus/zefant-xs3.c:783 src/bus/zefant-xs3.c:837
+#: src/bus/zefant-xs3.c:946
+#, fuzzy, c-format
+msgid "Component type not supported\n"
+msgstr "OYA"
+
+#: src/bus/zefant-xs3.c:953
+#, fuzzy
+msgid "Simple Solutions Zefant-XS3 Board compatible bus driver via BSR"
+msgstr "Musomyi: Biturutse"
+
+#: src/cmd/bit.c:61
+#, c-format
+msgid "%s: invalid number of parameters (%d) for command '%s'\n"
+msgstr ""
+
+#: src/cmd/bit.c:66
+#, c-format
+msgid "%s: cable test failed for command '%s'\n"
+msgstr ""
+
+#: src/cmd/bit.c:71 src/cmd/bus.c:46 src/cmd/dr.c:48 src/cmd/get.c:52
+#: src/cmd/initbus.c:46 src/cmd/instruction.c:44 src/cmd/part.c:59
+#: src/cmd/print.c:65 src/cmd/register.c:50 src/cmd/salias.c:49
+#: src/cmd/scan.c:50 src/cmd/set.c:53 src/cmd/signal.c:50 src/cmd/test.c:54
+#, fuzzy, c-format
+msgid "Run \"detect\" first.\n"
+msgstr "Itangira"
+
+#: src/cmd/bit.c:76 src/cmd/dr.c:53 src/cmd/get.c:57 src/cmd/initbus.c:51
+#: src/cmd/instruction.c:49 src/cmd/register.c:55 src/cmd/salias.c:54
+#: src/cmd/scan.c:55 src/cmd/set.c:58 src/cmd/signal.c:55 src/cmd/test.c:59
+#, fuzzy, c-format
+msgid "%s: no active part\n"
+msgstr "%s:Oya Gikora"
+
+#: src/cmd/bit.c:83
+#, fuzzy, c-format
+msgid "%s: missing Boundary Scan Register (BSR) for command '%s'\n"
+msgstr "Ibuze"
+
+#: src/cmd/bit.c:89
+#, c-format
+msgid "%s: unable to get boundary bit number for command '%s'\n"
+msgstr ""
+
+#: src/cmd/bit.c:94
+#, fuzzy, c-format
+msgid "%s: invalid boundary bit number for command '%s'\n"
+msgstr "Sibyo"
+
+#: src/cmd/bit.c:98
+#, fuzzy, c-format
+msgid "%s: duplicate bit declaration for command '%s'\n"
+msgstr "Gusubiramo"
+
+#: src/cmd/bit.c:104
+#, c-format
+msgid "%s: invalid bit type length for command '%s'\n"
+msgstr ""
+
+#: src/cmd/bit.c:129
+#, fuzzy, c-format
+msgid "%s: invalid bit type for command '%s'\n"
+msgstr "Umurabyo Sibyo Komandi:"
+
+#: src/cmd/bit.c:135
+#, c-format
+msgid "%s: invalid default value length for command '%s'\n"
+msgstr ""
+
+#: src/cmd/bit.c:145
+#, c-format
+msgid "%s: out of memory for command '%s'\n"
+msgstr ""
+
+#: src/cmd/bit.c:155
+#, c-format
+msgid "%s: unable to get control bit number for command '%s'\n"
+msgstr ""
+
+#: src/cmd/bit.c:159
+#, fuzzy, c-format
+msgid "%s: invalid control bit number for command '%s'\n"
+msgstr "Sibyo Igenzura"
+
+#: src/cmd/bit.c:166
+#, c-format
+msgid "%s: invalid control value length for command '%s'\n"
+msgstr ""
+
+#: src/cmd/bit.c:184
+#, fuzzy, c-format
+msgid ""
+"Usage: %s NUMBER TYPE DEFAULT SIGNAL [CBIT CVAL CSTATE]\n"
+"Define new BSR (Boundary Scan Register) bit for SIGNAL, with\n"
+"DEFAULT value.\n"
+"\n"
+"NUMBER Bit number in the BSR\n"
+"TYPE Bit type, valid values are I, O, B, C, and X\n"
+"DEFAULT Default (safe) bit value, valid values are 1, 0, ?\n"
+"SIGNAL Associated signal name\n"
+"CBIT Control bit number\n"
+"CVAL Control value\n"
+"CSTATE Control state, valid state is only Z\n"
+msgstr ""
+"Gishya kugirango Agaciro Umubare in i Ubwoko Byemewe Uduciro C Na Agaciro "
+"Byemewe Uduciro 1. 0 Leta Byemewe Leta ni"
+
+#: src/cmd/bit.c:200
+#, fuzzy
+msgid "define new BSR bit"
+msgstr "Kugaragaza... Gishya"
+
+#: src/cmd/bsdl.c:93
+#, c-format
+msgid ""
+"Usage: %s path PATHLIST\n"
+"Usage: %s test [FILE]\n"
+"Usage: %s dump [FILE]\n"
+"Usage: %s debug on|off\n"
+"Manage BSDL files\n"
+"\n"
+"PATHLIST semicolon separated list of directory paths to search for BSDL "
+"files\n"
+"FILE file containing part description in BSDL format\n"
+msgstr ""
+
+#: src/cmd/bsdl.c:106
+msgid "manage BSDL files"
+msgstr ""
+
+#: src/cmd/bus.c:54
+#, fuzzy, c-format
+msgid "%s: invalid bus number\n"
+msgstr "%s:Sibyo"
+
+#: src/cmd/bus.c:67
+#, fuzzy, c-format
+msgid ""
+"Usage: %s BUS\n"
+"Change active bus.\n"
+"\n"
+"BUS bus number\n"
+msgstr "Gikora"
+
+#: src/cmd/bus.c:76
+#, fuzzy
+msgid "change active bus"
+msgstr "Guhindura>> Gikora"
+
+#: src/cmd/cable.c:58
+#, c-format
+msgid "Note: the 'cable' command syntax changed, please read the help text\n"
+msgstr ""
+
+#: src/cmd/cable.c:76
+#, fuzzy, c-format
+msgid "Unknown cable type: %s\n"
+msgstr "Ukwihuza Ubwoko"
+
+#: src/cmd/cable.c:98 src/tap/cable/ft2232.c:1580
+#: src/tap/cable/generic_parport.c:82 src/tap/cable/generic_usbconn.c:223
+#: src/tap/cable/jim.c:68 src/tap/cable/usbblaster.c:79
+#: src/tap/cable/vision_ep9307.c:201 src/tap/cable/wiggler.c:195
+#, c-format
+msgid "%s(%d) malloc failed!\n"
+msgstr ""
+
+#: src/cmd/cable.c:105 src/tap/cable/generic_parport.c:76
+#, fuzzy, c-format
+msgid "Error: Cable connection failed!\n"
+msgstr "Ukwihuza Byanze"
+
+#: src/cmd/cable.c:113
+#, fuzzy, c-format
+msgid "Error: Cable initialization failed!\n"
+msgstr "Byanze"
+
+#: src/cmd/cable.c:130
+#, c-format
+msgid ""
+"Usage: %s DRIVER [DRIVER_OPTS]\n"
+"Select JTAG cable type.\n"
+"\n"
+"DRIVER name of cable\n"
+"DRIVER_OPTS options for the selected cable\n"
+"\n"
+"Type \"cable DRIVER help\" for info about options for cable DRIVER.\n"
+"\n"
+"List of supported cables:\n"
+msgstr ""
+
+# #-#-#-#-# dbaccess.pot (PACKAGE VERSION) #-#-#-#-#
+# #-#-#-#-# dbaccess.pot (PACKAGE VERSION) #-#-#-#-#
+# #-#-#-#-# dbaccess.pot (PACKAGE VERSION) #-#-#-#-#
+#: src/cmd/cable.c:142 src/cmd/help.c:41
+#, fuzzy, c-format
+msgid "%-13s %s\n"
+msgstr "%-13s%s"
+
+#: src/cmd/cable.c:147
+#, fuzzy
+msgid "select JTAG cable"
+msgstr "Guhitamo"
+
+#: src/cmd/cmd.c:170
+#, fuzzy, c-format
+msgid "Error: Cable not configured. Please use '%s' command first!\n"
+msgstr "OYA Gukoresha Komandi: Itangira"
+
+# sw/source\ui\utlui\initui.src:RID_SW_SHELLRES.STR_CALC_SYNTAX.text
+#: src/cmd/cmd.c:194
+#, fuzzy, c-format
+msgid "%s: syntax error!\n"
+msgstr "%s:Ikosa ry'iyandikanteruro**"
+
+#: src/cmd/cmd.c:205
+#, fuzzy, c-format
+msgid "%s: Ambiguous command\n"
+msgstr "%s:Kitazwi"
+
+#: src/cmd/cmd.c:206 src/cmd/help.c:57
+#, fuzzy, c-format
+msgid "%s: unknown command\n"
+msgstr "%s:Kitazwi"
+
+#: src/cmd/debug.c:56
+#, c-format
+msgid ""
+"Usage: %s n\n"
+"Enabled debugging.\n"
+"\n"
+"n =1 fileio, 2=tap commands, 4 =?\n"
+msgstr ""
+
+#: src/cmd/debug.c:65
+msgid "debug jtag program"
+msgstr ""
+
+#: src/cmd/detect.c:83
+#, fuzzy, c-format
+msgid ""
+"Usage: %s\n"
+"Detect parts on the JTAG chain.\n"
+"\n"
+"Output from this command is a list of the detected parts.\n"
+"If no parts are detected other commands may not work properly.\n"
+msgstr ""
+"ku i Bivuye iyi Komandi: ni a Urutonde Bya i Oya Ikindi Amabwiriza Gicurasi "
+"OYA Akazi"
+
+#: src/cmd/detect.c:93
+#, fuzzy
+msgid "detect parts on the JTAG chain"
+msgstr "ku i"
+
+#: src/cmd/detectflash.c:41 src/cmd/eraseflash.c:47 src/cmd/flashmem.c:49
+#: src/cmd/peekpoke.c:47 src/cmd/peekpoke.c:109 src/cmd/readmem.c:45
+#: src/cmd/writemem.c:43
+#, fuzzy, c-format
+msgid "Error: Bus driver missing.\n"
+msgstr "Musomyi: Ibuze"
+
+#: src/cmd/detectflash.c:57
+#, fuzzy, c-format
+msgid ""
+"Usage: %s ADDRESS\n"
+"Detect flash memory type connected to a part.\n"
+"\n"
+"ADDRESS Base address for memory region\n"
+msgstr "Umurabyo Ububiko Ubwoko Kuri a"
+
+#: src/cmd/detectflash.c:66
+#, fuzzy
+msgid "detect parameters of flash chips attached to a part"
+msgstr "Ibigenga Bya Umurabyo Kuri a"
+
+#: src/cmd/discovery.c:51
+#, fuzzy, c-format
+msgid ""
+"Usage: %s\n"
+"Discovery of unknown parts in the JTAG chain.\n"
+"\n"
+"'%s' attempts to detect these parameters of an unknown JTAG\n"
+"chain:\n"
+" 1. IR (instruction register) length\n"
+" 2. DR (data register) length for all possible instructions\n"
+"\n"
+"Warning: This may be dangerous for some parts (especially if the\n"
+"part doesn't have TRST signal).\n"
+msgstr ""
+"Bya Kitazwi in i Kuri Ibigenga Bya Kitazwi 1. Kwiyandikisha 2. Ibyatanzwe "
+"Kwiyandikisha Uburebure kugirango Byose Gicurasi kugirango NIBA"
+
+#: src/cmd/discovery.c:66
+#, fuzzy
+msgid "discovery of unknown parts in the JTAG chain"
+msgstr "Bya Kitazwi in i"
+
+#: src/cmd/dr.c:58
+#, fuzzy, c-format
+msgid "%s: part without active instruction\n"
+msgstr "%s:Gikora"
+
+#: src/cmd/dr.c:62
+#, fuzzy, c-format
+msgid "%s: part without active data register\n"
+msgstr "%s:Gikora Ibyatanzwe"
+
+#: src/cmd/dr.c:79
+#, c-format
+msgid "%s: register length mismatch\n"
+msgstr ""
+
+# basctl/source\basicide\basidesh.src:RID_IMGBTN_REMOVEWATCH.text
+#: src/cmd/dr.c:94
+#, fuzzy, c-format
+msgid "%s\n"
+msgstr "%s"
+
+#: src/cmd/dr.c:103
+#, fuzzy, c-format
+msgid ""
+"Usage: %s [DIR]\n"
+"Usage: %s BITSTRING\n"
+"Display input or output data register content or set current register.\n"
+"\n"
+"DIR requested data register; possible values: 'in' for\n"
+" input and 'out' for output; default is 'out'\n"
+"BITSTRING set current data register with BITSTRING (e.g. 01010)\n"
+msgstr ""
+"Iyinjiza Cyangwa Ibisohoka Ibyatanzwe Kwiyandikisha Ibikubiyemo Ibyatanzwe "
+"Kwiyandikisha Uduciro Iyinjiza Na kugirango Ibisohoka Mburabuzi ni"
+
+#: src/cmd/dr.c:115
+#, fuzzy
+msgid "display active data register for a part"
+msgstr "Kugaragaza Gikora Ibyatanzwe Kwiyandikisha kugirango a"
+
+#: src/cmd/endian.c:42
+#, fuzzy, c-format
+msgid "Endianess for external files: big\n"
+msgstr "kugirango external Idosiye"
+
+#: src/cmd/endian.c:44
+#, fuzzy, c-format
+msgid "Endianess for external files: little\n"
+msgstr "kugirango external Idosiye"
+
+#: src/cmd/endian.c:65
+#, fuzzy, c-format
+msgid ""
+"Usage: %s\n"
+"Set or print endianess for external files.\n"
+msgstr "Cyangwa Gucapa kugirango external Idosiye"
+
+#: src/cmd/endian.c:72
+#, fuzzy
+msgid "set/print endianess"
+msgstr "Gushyiraho Gucapa"
+
+#: src/cmd/eraseflash.c:65
+#, fuzzy, c-format
+msgid ""
+"Usage: %s ADDR BLOCKS\n"
+"Erase flash memory from ADDR.\n"
+"\n"
+"ADDR target addres for erasing block\n"
+"BLOCKS number of blocks to erase\n"
+"\n"
+"ADDR and BLOCKS could be in decimal or hexadecimal (prefixed with 0x) form.\n"
+"\n"
+"Supported Flash Memories:\n"
+msgstr ""
+"Umurabyo Ububiko Bivuye Intego kugirango Umubare Bya Kuri Na in NYACUMI "
+"Cyangwa Na: Ifishi"
+
+# #-#-#-#-# dbaccess.pot (PACKAGE VERSION) #-#-#-#-#
+# #-#-#-#-# dbaccess.pot (PACKAGE VERSION) #-#-#-#-#
+# #-#-#-#-# dbaccess.pot (PACKAGE VERSION) #-#-#-#-#
+#: src/cmd/eraseflash.c:77 src/cmd/flashmem.c:97
+#, fuzzy, c-format
+msgid ""
+"%s\n"
+" %s\n"
+msgstr "%s%s"
+
+#: src/cmd/eraseflash.c:82
+#, fuzzy
+msgid "erase flash memory by number of blocks"
+msgstr "Umurabyo Ububiko ku Umubare Bya"
+
+#: src/cmd/flashmem.c:64 src/cmd/writemem.c:52 src/jtag.c:414
+#, fuzzy, c-format
+msgid "Unable to open file `%s'!\n"
+msgstr "Kuri Gufungura IDOSIYE"
+
+#: src/cmd/flashmem.c:82
+#, fuzzy, c-format
+msgid ""
+"Usage: %s ADDR FILENAME [noverify]\n"
+"Usage: %s FILENAME [noverify]\n"
+"Program FILENAME content to flash memory.\n"
+"\n"
+"ADDR target address for raw binary image\n"
+"FILENAME name of the input file\n"
+"%-10s FILENAME is in MS .bin format (for WinCE)\n"
+"%-10s if specified, verification is skipped\n"
+"\n"
+"ADDR could be in decimal or hexadecimal (prefixed with 0x) form.\n"
+"\n"
+"Supported Flash Memories:\n"
+msgstr ""
+"Ibikubiyemo Kuri Umurabyo Ububiko Intego Aderesi kugirango Nyabibiri Izina: "
+"Bya i Iyinjiza ni in Imiterere kugirango in NYACUMI Cyangwa Na: Ifishi"
+
+#: src/cmd/flashmem.c:102
+#, fuzzy
+msgid "burn flash memory with data from a file"
+msgstr "Umurabyo Ububiko Na: Ibyatanzwe Bivuye a IDOSIYE"
+
+#: src/cmd/frequency.c:43
+#, fuzzy, c-format
+msgid "Current TCK frequency is %u Hz\n"
+msgstr "Ubwisubire ni"
+
+#: src/cmd/frequency.c:53
+#, fuzzy, c-format
+msgid "Setting TCK frequency to %u Hz\n"
+msgstr "Ubwisubire Kuri"
+
+#: src/cmd/frequency.c:63
+#, fuzzy, c-format
+msgid ""
+"Usage: %s [FREQ]\n"
+"Change TCK frequency to FREQ or print current TCK frequency.\n"
+"\n"
+"FREQ is in hertz. It's a maximum TCK frequency for JTAG interface.\n"
+"In some cases the TCK frequency is less than FREQ, but the frequency\n"
+"is never more than FREQ. Maximum supported frequency depends on JTAG\n"
+"adapter.\n"
+"\n"
+"FREQ must be an unsigned integer. Minimum allowed frequency is 1 Hz.\n"
+"Use 0 for FREQ to disable frequency limit.\n"
+msgstr ""
+"Ubwisubire Kuri Cyangwa Gucapa KIGEZWEHO Ubwisubire ni in a Kinini "
+"Ubwisubire kugirango i Ubwisubire ni Birutwa i Nta narimwe Birenzeho "
+"Ubwisubire ku Bitashizweho umukono Umubare wuzuye Ubwisubire ni 1. 0 "
+"kugirango Kuri Ubwisubire"
+
+#: src/cmd/frequency.c:78
+#, fuzzy
+msgid "setup JTAG frequency"
+msgstr "Imikorere Ubwisubire"
+
+# desktop/source\app\ssodlg.src:DLG_SSOLOGIN.text
+#: src/cmd/get.c:68
+#, fuzzy, c-format
+msgid "%s = %d\n"
+msgstr "%s=%d"
+
+#: src/cmd/get.c:77
+#, fuzzy, c-format
+msgid ""
+"Usage: %s SIGNAL\n"
+"Get signal state from output BSR (Boundary Scan Register).\n"
+"\n"
+"SIGNAL signal name (from JTAG declaration file)\n"
+msgstr "Leta Bivuye Ibisohoka Izina: Bivuye IDOSIYE"
+
+#: src/cmd/get.c:86
+#, fuzzy
+msgid "get external signal value"
+msgstr "Kubona external Agaciro"
+
+#: src/cmd/help.c:39
+#, fuzzy, c-format
+msgid ""
+"Command list:\n"
+"\n"
+msgstr "Urutonde"
+
+#: src/cmd/help.c:41
+#, fuzzy
+msgid "(no description available)"
+msgstr "(Oya Isobanuramiterere Bihari"
+
+#: src/cmd/help.c:42
+#, fuzzy, c-format
+msgid ""
+"\n"
+"Type \"help COMMAND\" for details about a particular command.\n"
+msgstr "Ifashayobora kugirango Birambuye Ibyerekeye a Komandi:"
+
+#: src/cmd/help.c:66
+#, fuzzy, c-format
+msgid ""
+"Usage: %s [COMMAND]\n"
+"Print short help for COMMAND, or list of available commands.\n"
+msgstr "Ifashayobora kugirango Cyangwa Urutonde Bya Bihari Amabwiriza"
+
+#: src/cmd/help.c:73
+#, fuzzy
+msgid "display this help"
+msgstr "Kugaragaza iyi Ifashayobora"
+
+#: src/cmd/idcode.c:50
+#, c-format
+msgid "Reading %d bytes if idcode\n"
+msgstr ""
+
+#: src/cmd/idcode.c:59
+#, c-format
+msgid ""
+"Usage: %s [BYTES]\n"
+"Read [BYTES]|all IDCODEs of all parts in a JTAG chain.\n"
+"\n"
+"BYTES must be an unsigned integer, Use 0 for BYTES to read all bytes\n"
+msgstr ""
+
+#: src/cmd/idcode.c:68
+#, fuzzy
+msgid "Read IDCODEs of all parts in a JTAG chain"
+msgstr "Bya Kitazwi in i"
+
+#: src/cmd/include.c:49
+#, c-format
+msgid "Please use the 'include' command instead of 'script'\n"
+msgstr ""
+
+#: src/cmd/include.c:99
+#, fuzzy, c-format
+msgid "Unable to open file `%s go=%d'!\n"
+msgstr "Kuri Gufungura IDOSIYE"
+
+#: src/cmd/include.c:113
+#, fuzzy, c-format
+msgid ""
+"Usage: %s FILENAME [n] \n"
+"Run command sequence n times from external FILENAME.\n"
+"\n"
+"FILENAME Name of the file with commands\n"
+msgstr "Komandi: Bivuye external Bya i IDOSIYE Na:"
+
+#: src/cmd/include.c:134
+#, fuzzy
+msgid "include command sequence from external repository"
+msgstr "Gushyiramo Komandi: Bivuye external"
+
+#: src/cmd/include.c:153
+#, fuzzy
+msgid "run command sequence from external file"
+msgstr "Gukoresha Komandi: Bivuye external IDOSIYE"
+
+#: src/cmd/initbus.c:59
+#, fuzzy, c-format
+msgid "bus alloc/attach failed!\n"
+msgstr "Byanze"
+
+#: src/cmd/initbus.c:64
+#, fuzzy, c-format
+msgid "bus initialization failed!\n"
+msgstr "Byanze"
+
+#: src/cmd/initbus.c:70
+#, fuzzy, c-format
+msgid "Initialized bus %d, active bus %d\n"
+msgstr "gutangiza Musomyi: kugirango Gikora"
+
+#: src/cmd/initbus.c:76
+#, c-format
+msgid "Unknown bus: %s\n"
+msgstr ""
+
+#: src/cmd/initbus.c:87
+#, fuzzy, c-format
+msgid ""
+"Usage: %s BUSNAME\n"
+"Initialize new bus driver for active part.\n"
+"\n"
+"BUSNAME Name of the bus\n"
+"\n"
+"List of available buses:\n"
+msgstr "Gishya Musomyi: kugirango Gikora Bya i Bya Bihari"
+
+# #-#-#-#-# dbaccess.pot (PACKAGE VERSION) #-#-#-#-#
+# #-#-#-#-# dbaccess.pot (PACKAGE VERSION) #-#-#-#-#
+# #-#-#-#-# dbaccess.pot (PACKAGE VERSION) #-#-#-#-#
+#: src/cmd/initbus.c:96
+#, fuzzy, c-format
+msgid "%-10s %s\n"
+msgstr "%-10s%s"
+
+#: src/cmd/initbus.c:101
+#, fuzzy
+msgid "initialize bus driver for active part"
+msgstr "gutangiza Musomyi: kugirango Gikora"
+
+#: src/cmd/instruction.c:58
+#, fuzzy, c-format
+msgid "%s: unknown instruction '%s'\n"
+msgstr "%s:Kitazwi"
+
+#: src/cmd/instruction.c:69
+#, fuzzy, c-format
+msgid "instruction length is already set and used\n"
+msgstr "Uburebure ni Gushyiraho Na"
+
+#: src/cmd/instruction.c:89
+#, c-format
+msgid "Instruction '%s' already defined\n"
+msgstr ""
+
+#: src/cmd/instruction.c:104
+#, fuzzy, c-format
+msgid "unknown data register '%s'\n"
+msgstr "Kitazwi Ibyatanzwe Kwiyandikisha"
+
+#: src/cmd/instruction.c:118
+#, fuzzy, c-format
+msgid ""
+"Usage: %s INSTRUCTION\n"
+"Usage: %s length LENGTH\n"
+"Usage: %s INSTRUCTION CODE REGISTER\n"
+"Change active INSTRUCTION for a part or declare new instruction.\n"
+"\n"
+"INSTRUCTION instruction name (e.g. BYPASS)\n"
+"LENGTH common instruction length\n"
+"CODE instruction code (e.g. 11111)\n"
+"REGISTER default data register for instruction (e.g. BR)\n"
+msgstr "g. g. g."
+
+#: src/cmd/instruction.c:132
+#, fuzzy
+msgid "change active instruction for a part or declare new instruction"
+msgstr "Guhindura>> Gikora kugirango a Cyangwa Gishya"
+
+#: src/cmd/part.c:81
+#, fuzzy, c-format
+msgid "%s: invalid part number\n"
+msgstr "%s:Sibyo"
+
+#: src/cmd/part.c:94
+#, fuzzy, c-format
+msgid ""
+"Usage: %s PART\n"
+"Change active part for current JTAG chain.\n"
+"\n"
+"PART part number | alias\n"
+msgstr "Gikora kugirango KIGEZWEHO"
+
+#: src/cmd/part.c:103
+#, fuzzy
+msgid "change active part for current JTAG chain"
+msgstr "Guhindura>> Gikora kugirango KIGEZWEHO"
+
+#: src/cmd/peekpoke.c:62
+#, c-format
+msgid "bus_read(0x%08x) = 0x%02X (%i)\n"
+msgstr ""
+
+#: src/cmd/peekpoke.c:66
+#, c-format
+msgid "bus_read(0x%08x) = 0x%04X (%i)\n"
+msgstr ""
+
+#: src/cmd/peekpoke.c:69
+#, c-format
+msgid "bus_read(0x%08x) = 0x%08X (%i)\n"
+msgstr ""
+
+#: src/cmd/peekpoke.c:80
+#, fuzzy, c-format
+msgid ""
+"Usage: %s ADDR\n"
+"Read a single word (bus width size).\n"
+"\n"
+"ADDR address to read from\n"
+"\n"
+"ADDR could be in decimal or hexadecimal (prefixed with 0x) form.\n"
+"\n"
+msgstr ""
+"a UMWE ijambo Ubugari Ingano Aderesi Kuri Gusoma in NYACUMI Cyangwa Na: "
+"Ifishi"
+
+#: src/cmd/peekpoke.c:92
+#, fuzzy
+msgid "read a single word"
+msgstr "Gusoma a UMWE ijambo"
+
+#: src/cmd/peekpoke.c:131
+#, fuzzy, c-format
+msgid ""
+"Usage: %s ADDR VAL [ADDR VAL] ... \n"
+"Write a single word (bus width size).\n"
+"\n"
+"ADDR address to write\n"
+"VAL value to write\n"
+"\n"
+"ADDR and VAL could be in decimal or hexadecimal (prefixed with 0x) form.\n"
+"\n"
+msgstr ""
+"a UMWE ijambo Ubugari Ingano Aderesi Kuri Agaciro Kuri Na in NYACUMI Cyangwa "
+"Na: Ifishi"
+
+#: src/cmd/peekpoke.c:144
+#, fuzzy
+msgid "write a single word"
+msgstr "Kwandika a UMWE ijambo"
+
+#: src/cmd/pod.c:78
+#, c-format
+msgid ""
+"Usage: %s SIGNAL=# [SIGNAL=# ...]\n"
+"Set state of POD signal(s) to 0 or 1.\n"
+"\n"
+"SIGNAL\t TCK,TMS, TDI, TRST, or RESET\n"
+"# 0 or 1\n"
+msgstr ""
+
+#: src/cmd/pod.c:88
+msgid "Set state of POD signal(s)"
+msgstr ""
+
+#: src/cmd/print.c:98
+#, c-format
+msgid " Active %%-%ds %%-%ds"
+msgstr ""
+
+#: src/cmd/print.c:102 src/cmd/print.c:105 src/cmd/print.c:109
+#: src/cmd/print.c:137 src/cmd/print.c:140 src/cmd/print.c:144
+#, fuzzy, c-format
+msgid "(%d) String conversion failed!\n"
+msgstr "(%d)Ihindurangero Byanze"
+
+#: src/cmd/print.c:103 src/cmd/print.c:107 src/cmd/print.c:138
+#: src/cmd/print.c:142
+msgid "Instruction"
+msgstr ""
+
+#: src/cmd/print.c:103 src/cmd/print.c:107 src/cmd/print.c:138
+#: src/cmd/print.c:142
+msgid "Register"
+msgstr "Kwiyandikisha"
+
+#: src/cmd/print.c:117
+#, fuzzy, c-format
+msgid " %%c %%-%ds %%-%ds\n"
+msgstr "Oya"
+
+#: src/cmd/print.c:133
+#, fuzzy, c-format
+msgid " No. %%-%ds %%-%ds %%-%ds %%-%ds %%-%ds"
+msgstr "Oya"
+
+#: src/cmd/print.c:138 src/cmd/print.c:142
+msgid "Manufacturer"
+msgstr "Ukora mu nganda"
+
+#: src/cmd/print.c:138 src/cmd/print.c:142
+msgid "Part"
+msgstr ""
+
+#: src/cmd/print.c:138 src/cmd/print.c:142
+msgid "Stepping"
+msgstr ""
+
+# basctl/source\basicide\basidesh.src:RID_IMGBTN_REMOVEWATCH.text
+#: src/cmd/print.c:156
+#, fuzzy, c-format
+msgid " %3d %s "
+msgstr "%3d"
+
+# basctl/source\basicide\basidesh.src:RID_IMGBTN_REMOVEWATCH.text
+#: src/cmd/print.c:158 src/part/part.c:330
+#, fuzzy, c-format
+msgid " %3d "
+msgstr "%3d"
+
+#: src/cmd/print.c:170
+#, c-format
+msgid ""
+"\n"
+"Active bus:\n"
+"*%d: "
+msgstr ""
+
+#: src/cmd/print.c:175
+#, fuzzy, c-format
+msgid "Error in bus area discovery at 0x%08llX\n"
+msgstr "in Ubuso ku"
+
+#: src/cmd/print.c:180
+#, fuzzy, c-format
+msgid "\tstart: 0x%08X, length: 0x%08llX, data width: %d bit, (%s)\n"
+msgstr "Gutangira Uburebure Ibyatanzwe Ubugari"
+
+#: src/cmd/print.c:182
+#, fuzzy, c-format
+msgid "\tstart: 0x%08X, length: 0x%08llX, data width: %d bit\n"
+msgstr "Gutangira Uburebure Ibyatanzwe Ubugari"
+
+# desktop/source\app\ssodlg.src:DLG_SSOLOGIN.text
+#: src/cmd/print.c:197
+#, fuzzy, c-format
+msgid "*%d: "
+msgstr "*%d:"
+
+# #-#-#-#-# dbaccess.pot (PACKAGE VERSION) #-#-#-#-#
+# #-#-#-#-# dbaccess.pot (PACKAGE VERSION) #-#-#-#-#
+# #-#-#-#-# dbaccess.pot (PACKAGE VERSION) #-#-#-#-#
+#: src/cmd/print.c:199
+#, fuzzy, c-format
+msgid "%d: "
+msgstr "%d:"
+
+#: src/cmd/print.c:210
+#, fuzzy, c-format
+msgid ""
+"Usage: %s [chain|bus|signals|instructions]\n"
+"Display JTAG chain status.\n"
+"\n"
+"Display list of the parts connected to the JTAG chain including\n"
+"part number and current (active) instruction and data register.\n"
+msgstr ""
+"Imimerere Urutonde Bya i Kuri i Umubare Na KIGEZWEHO Gikora Na Ibyatanzwe "
+"Kwiyandikisha"
+
+#: src/cmd/print.c:220
+#, fuzzy
+msgid "display JTAG chain list/status"
+msgstr "Kugaragaza Urutonde Imimerere"
+
+#: src/cmd/quit.c:44
+#, fuzzy, c-format
+msgid ""
+"Usage: %s\n"
+"Exit from %s.\n"
+msgstr "Bivuye"
+
+#: src/cmd/quit.c:51
+#, fuzzy
+msgid "exit and terminate this session"
+msgstr "Gusohoka Na iyi Umukoro"
+
+#: src/cmd/readmem.c:54
+#, fuzzy, c-format
+msgid "Unable to create file `%s'!\n"
+msgstr "Kuri Kurema IDOSIYE"
+
+#: src/cmd/readmem.c:67
+#, fuzzy, c-format
+msgid ""
+"Usage: %s ADDR LEN FILENAME\n"
+"Copy device memory content starting with ADDR to FILENAME file.\n"
+"\n"
+"ADDR start address of the copied memory area\n"
+"LEN copied memory length\n"
+"FILENAME name of the output file\n"
+"\n"
+"ADDR and LEN could be in decimal or hexadecimal (prefixed with 0x) form.\n"
+msgstr ""
+"APAREYE Ububiko Ibikubiyemo Na: Kuri IDOSIYE Gutangira Aderesi Bya i Ububiko "
+"Ububiko Izina: Bya i Ibisohoka Na in NYACUMI Cyangwa Na: Ifishi"
+
+#: src/cmd/readmem.c:80
+#, fuzzy
+msgid "read content of the memory and write it to file"
+msgstr "Gusoma Ibikubiyemo Bya i Ububiko Na Kwandika Kuri IDOSIYE"
+
+#: src/cmd/register.c:65
+#, fuzzy, c-format
+msgid "Data register '%s' already defined\n"
+msgstr "Kwiyandikisha"
+
+#: src/cmd/register.c:103
+#, fuzzy, c-format
+msgid ""
+"Usage: %s NAME LENGTH\n"
+"Define new data register with specified NAME and LENGTH.\n"
+"\n"
+"NAME Data register name\n"
+"LENGTH Data register length\n"
+msgstr "Gishya Ibyatanzwe Kwiyandikisha Na: Na Kwiyandikisha Kwiyandikisha"
+
+#: src/cmd/register.c:113
+#, fuzzy
+msgid "define new data register for a part"
+msgstr "Kugaragaza... Gishya Ibyatanzwe Kwiyandikisha kugirango a"
+
+#: src/cmd/reset.c:53
+#, fuzzy, c-format
+msgid ""
+"Usage: %s\n"
+"Reset current JTAG chain.\n"
+msgstr "Guhindura>> Gikora kugirango KIGEZWEHO"
+
+#: src/cmd/reset.c:60
+#, fuzzy
+msgid "reset JTAG chain"
+msgstr "Guhitamo"
+
+#: src/cmd/salias.c:60 src/cmd/signal.c:73
+#, c-format
+msgid "Signal '%s' already defined\n"
+msgstr ""
+
+#: src/cmd/salias.c:66
+#, fuzzy, c-format
+msgid "Signal '%s' not found\n"
+msgstr "OYA"
+
+#: src/cmd/salias.c:86
+#, fuzzy, c-format
+msgid ""
+"Usage: %s ALIAS SIGNAL\n"
+"Define new signal ALIAS as alias for existing SIGNAL.\n"
+"\n"
+"ALIAS New signal alias name\n"
+"SIGNAL Existing signal name\n"
+msgstr "Gishya Na: Izina: kugirango a Bya kugirango a OYA"
+
+#: src/cmd/salias.c:96
+#, fuzzy
+msgid "define an alias for a signal"
+msgstr "Kugaragaza... Gishya kugirango a"
+
+#: src/cmd/scan.c:64 src/part/part.c:186 src/part/part.c:223
+#, fuzzy, c-format
+msgid "%s(%s:%d) Boundary Scan Register (BSR) not found\n"
+msgstr "%s(%s:%d)OYA"
+
+#: src/cmd/scan.c:78
+#, c-format
+msgid "%s(%s:%d) Part can't SAMPLE\n"
+msgstr ""
+
+# desktop/source\app\ssodlg.src:DLG_SSOLOGIN.text
+#: src/cmd/scan.c:113
+#, fuzzy, c-format
+msgid ": %d > %d\n"
+msgstr "%s=%d"
+
+#: src/cmd/scan.c:128
+#, c-format
+msgid ""
+"Usage: %s [SIGNAL]* \n"
+"Read BSR and show changes since last scan.\n"
+msgstr ""
+
+#: src/cmd/scan.c:135
+msgid "read BSR and show changes since last scan"
+msgstr ""
+
+#: src/cmd/set.c:89
+#, fuzzy, c-format
+msgid ""
+"Usage: %s SIGNAL DIR [DATA]\n"
+"Set signal state in input BSR (Boundary Scan Register).\n"
+"\n"
+"SIGNAL signal name (from JTAG declaration file)\n"
+"DIR requested signal direction; possible values: 'in' or 'out'\n"
+"DATA desired output signal value ('0' or '1'); used only if DIR\n"
+" is 'out'\n"
+msgstr ""
+"Leta in Iyinjiza Izina: Bivuye IDOSIYE Icyerekezo Uduciro Cyangwa Ibisohoka "
+"Agaciro Cyangwa NIBA ni"
+
+#: src/cmd/set.c:101
+#, fuzzy
+msgid "set external signal value"
+msgstr "Gushyiraho external Agaciro"
+
+#: src/cmd/shell.c:84
+#, c-format
+msgid ""
+"Usage: %s cmmd\n"
+"Shell out to os for a command.\n"
+"\n"
+"CMMD OS Shell Command\n"
+msgstr ""
+
+#: src/cmd/shell.c:93
+msgid "shell cmmd"
+msgstr ""
+
+#: src/cmd/shift.c:60
+#, fuzzy, c-format
+msgid ""
+"Usage: %s\n"
+"Usage: %s\n"
+"Shift instruction or data register through JTAG chain.\n"
+msgstr "Cyangwa Ibyatanzwe Kwiyandikisha Gihinguranya"
+
+#: src/cmd/shift.c:68
+#, fuzzy
+msgid "shift data/instruction registers through JTAG chain"
+msgstr "Gusunika Ibyatanzwe Gihinguranya"
+
+#: src/cmd/signal.c:102
+#, fuzzy, c-format
+msgid ""
+"Usage: %s SIGNAL [PIN#]\n"
+"Define new signal with name SIGNAL for a part.\n"
+"\n"
+"SIGNAL\t\tNew signal name\n"
+"PIN# \tList of pin # for a signal\n"
+msgstr "Gishya Na: Izina: kugirango a Bya kugirango a OYA"
+
+#: src/cmd/signal.c:112
+#, fuzzy
+msgid "define new signal for a part"
+msgstr "Kugaragaza... Gishya kugirango a"
+
+#: src/cmd/svf.c:63
+#, c-format
+msgid "%s: cannot open file '%s' for reading\n"
+msgstr ""
+
+#: src/cmd/svf.c:76
+#, c-format
+msgid ""
+"Usage: %s FILE [stop] [progress] [ref_freq=<frequency>]\n"
+"Execute svf commands from FILE.\n"
+"stop : Command execution stops upon TDO mismatch.\n"
+"progress : Continually displays progress status.\n"
+"ref_freq : Use <frequency> as the reference for 'RUNTEST xxx SEC' commands\n"
+"\n"
+"FILE file containing SVF commands\n"
+msgstr ""
+
+#: src/cmd/svf.c:88
+msgid "execute svf commands from file"
+msgstr ""
+
+# desktop/source\app\ssodlg.src:DLG_SSOLOGIN.text
+#: src/cmd/test.c:78
+#, fuzzy, c-format
+msgid "<FAIL>%s = %d\n"
+msgstr "%s=%d"
+
+#: src/cmd/test.c:89
+#, fuzzy, c-format
+msgid ""
+"Usage: %s SIGNAL 0/1\n"
+"Test signal state from output BSR (Boundary Scan Register).\n"
+"\n"
+"SIGNAL signal name (from JTAG declaration file)\n"
+msgstr "Leta Bivuye Ibisohoka Izina: Bivuye IDOSIYE"
+
+#: src/cmd/test.c:98
+#, fuzzy
+msgid "test external signal value"
+msgstr "Kubona external Agaciro"
+
+#: src/cmd/usleep.c:55
+#, c-format
+msgid ""
+"Usage: %s USECS\n"
+"Sleep some number of microseconds.\n"
+msgstr ""
+
+#: src/cmd/usleep.c:62
+msgid "Sleep some number of microseconds"
+msgstr ""
+
+#: src/cmd/writemem.c:65
+#, fuzzy, c-format
+msgid ""
+"Usage: %s ADDR LEN FILENAME\n"
+"Write to device memory starting at ADDR the FILENAME file.\n"
+"\n"
+"ADDR start address of the written memory area\n"
+"LEN written memory length\n"
+"FILENAME name of the input file\n"
+"\n"
+"ADDR and LEN could be in decimal or hexadecimal (prefixed with 0x) form.\n"
+"NOTE: This is NOT useful for FLASH programming!\n"
+msgstr ""
+"APAREYE Ububiko Ibikubiyemo Na: Kuri IDOSIYE Gutangira Aderesi Bya i Ububiko "
+"Ububiko Izina: Bya i Ibisohoka Na in NYACUMI Cyangwa Na: Ifishi"
+
+#: src/cmd/writemem.c:79
+msgid "write content of file to the memory"
+msgstr ""
+
+#: src/flash/amd.c:279
+#, c-format
+msgid ""
+"Chip: AMD Flash\n"
+"\tManufacturer: "
+msgstr ""
+
+#: src/flash/amd.c:283 src/flash/amd.c:311 src/flash/amd.c:326
+#: src/flash/amd.c:344 src/flash/amd_flash.c:236
+#, c-format
+msgid ""
+"\n"
+"\tChip: "
+msgstr ""
+
+#: src/flash/amd.c:305 src/flash/amd.c:320 src/flash/amd.c:338
+#: src/flash/amd.c:353 src/flash/amd_flash.c:247
+#, c-format
+msgid "Unknown (ID 0x%04x)"
+msgstr ""
+
+#: src/flash/amd.c:358
+#, fuzzy, c-format
+msgid "Unknown manufacturer (ID 0x%04x) Chip (ID 0x%04x)"
+msgstr "Ukora mu nganda"
+
+# sc/source\ui\src\attrdlg.src:RID_SCPAGE_PROTECTION.BTN_PROTECTED.text
+#: src/flash/amd.c:361 src/flash/amd_flash.c:250
+#, fuzzy, c-format
+msgid ""
+"\n"
+"\tProtected: %04x\n"
+msgstr "Birinzwe"
+
+#: src/flash/amd.c:566 src/flash/amd.c:578 src/flash/amd.c:590
+#: src/flash/detectflash.c:106 src/flash/detectflash.c:136
+msgid "AMD/Fujitsu Standard Command Set"
+msgstr ""
+
+#: src/flash/amd.c:567
+msgid "supported: AMD 29LV640D, 29LV641D, 29LV642D; 2x16 Bit"
+msgstr ""
+
+#: src/flash/amd.c:579
+msgid "supported: AMD 29LV800B, S92GLxxxN; MX29LV640B; 1x16 Bit"
+msgstr ""
+
+#: src/flash/amd.c:591
+msgid "supported: AMD 29LV160, AMD 29LV065D, AMD 29LV040B, S92GLxxxN; 1x8 Bit"
+msgstr ""
+
+#: src/flash/amd_flash.c:230
+#, c-format
+msgid ""
+"Chip: AMD Flash\n"
+"\tPartNumber: "
+msgstr ""
+
+#: src/flash/amd_flash.c:233
+#, fuzzy, c-format
+msgid "Unknown manufacturer (ID 0x%04x)"
+msgstr "Ukora mu nganda"
+
+#: src/flash/amd_flash.c:240
+#, c-format
+msgid "5V Flash\n"
+msgstr ""
+
+#: src/flash/amd_flash.c:244
+#, c-format
+msgid "3V Flash\n"
+msgstr ""
+
+#: src/flash/amd_flash.c:362
+msgid "AMD Standard Command Set"
+msgstr ""
+
+#: src/flash/amd_flash.c:363
+msgid "supported: AMD 29LV040B, 29C040B, 1x8 Bit"
+msgstr ""
+
+#: src/flash/detectflash.c:87
+#, fuzzy, c-format
+msgid "Flash not found!\n"
+msgstr "OYA Byabonetse"
+
+#: src/flash/detectflash.c:96
+#, fuzzy, c-format
+msgid "Query identification string:\n"
+msgstr "irangamimerere Ikurikiranyanyuguti"
+
+#: src/flash/detectflash.c:100 src/flash/detectflash.c:130
+#, fuzzy
+msgid "null"
+msgstr "NTAGIHARI"
+
+#: src/flash/detectflash.c:103 src/flash/detectflash.c:133
+msgid "Intel/Sharp Extended Command Set"
+msgstr ""
+
+#: src/flash/detectflash.c:109 src/flash/detectflash.c:139
+#: src/flash/intel.c:468 src/flash/intel.c:480 src/flash/intel.c:492
+msgid "Intel Standard Command Set"
+msgstr ""
+
+#: src/flash/detectflash.c:112 src/flash/detectflash.c:142
+msgid "AMD/Fujitsu Extended Command Set"
+msgstr ""
+
+#: src/flash/detectflash.c:115 src/flash/detectflash.c:145
+msgid "Mitsubishi Standard Command Set"
+msgstr ""
+
+#: src/flash/detectflash.c:118 src/flash/detectflash.c:148
+msgid "Mitsubishi Extended Command Set"
+msgstr ""
+
+#: src/flash/detectflash.c:121 src/flash/detectflash.c:151
+msgid "Page Write Command Set"
+msgstr ""
+
+# filter/source\xsltdialog\xmlfilterdialogstrings.src:STR_UNKNOWN_APPLICATION.text
+#: src/flash/detectflash.c:124 src/flash/detectflash.c:154
+#: src/flash/detectflash.c:198
+#, fuzzy
+msgid "unknown!!!"
+msgstr "Kitazwi"
+
+#: src/flash/detectflash.c:127
+#, fuzzy, c-format
+msgid ""
+"\tPrimary Algorithm Command Set and Control Interface ID Code: 0x%04X (%s)\n"
+msgstr "Na"
+
+#: src/flash/detectflash.c:157
+#, fuzzy, c-format
+msgid ""
+"\tAlternate Algorithm Command Set and Control Interface ID Code: 0x%04X (%"
+"s)\n"
+msgstr "Na"
+
+#: src/flash/detectflash.c:160
+#, fuzzy, c-format
+msgid "Query system interface information:\n"
+msgstr "Sisitemu Ibisobanuro"
+
+#: src/flash/detectflash.c:161
+#, fuzzy, c-format
+msgid "\tVcc Logic Supply Minimum Write/Erase or Write voltage: %d mV\n"
+msgstr "Cyangwa"
+
+#: src/flash/detectflash.c:162
+#, fuzzy, c-format
+msgid "\tVcc Logic Supply Maximum Write/Erase or Write voltage: %d mV\n"
+msgstr "Cyangwa"
+
+#: src/flash/detectflash.c:163
+#, c-format
+msgid "\tVpp [Programming] Supply Minimum Write/Erase voltage: %d mV\n"
+msgstr ""
+
+#: src/flash/detectflash.c:164
+#, c-format
+msgid "\tVpp [Programming] Supply Maximum Write/Erase voltage: %d mV\n"
+msgstr ""
+
+#: src/flash/detectflash.c:165
+#, fuzzy, c-format
+msgid "\tTypical timeout per single byte/word program: %d us\n"
+msgstr "Igihe cyarenze: UMWE Bayite ijambo Porogaramu"
+
+#: src/flash/detectflash.c:166
+#, fuzzy, c-format
+msgid "\tTypical timeout for maximum-size multi-byte program: %d us\n"
+msgstr "Igihe cyarenze: kugirango Kinini Ingano Bayite Porogaramu"
+
+#: src/flash/detectflash.c:167
+#, fuzzy, c-format
+msgid "\tTypical timeout per individual block erase: %d ms\n"
+msgstr "Igihe cyarenze: Funga"
+
+#: src/flash/detectflash.c:168
+#, fuzzy, c-format
+msgid "\tTypical timeout for full chip erase: %d ms\n"
+msgstr "Igihe cyarenze: kugirango"
+
+#: src/flash/detectflash.c:169
+#, fuzzy, c-format
+msgid "\tMaximum timeout for byte/word program: %d us\n"
+msgstr "Igihe cyarenze: kugirango Bayite ijambo Porogaramu"
+
+#: src/flash/detectflash.c:170
+#, fuzzy, c-format
+msgid "\tMaximum timeout for multi-byte program: %d us\n"
+msgstr "Igihe cyarenze: kugirango Bayite Porogaramu"
+
+#: src/flash/detectflash.c:171
+#, fuzzy, c-format
+msgid "\tMaximum timeout per individual block erase: %d ms\n"
+msgstr "Igihe cyarenze: Funga"
+
+#: src/flash/detectflash.c:172
+#, fuzzy, c-format
+msgid "\tMaximum timeout for chip erase: %d ms\n"
+msgstr "Igihe cyarenze: kugirango"
+
+#: src/flash/detectflash.c:175
+#, fuzzy, c-format
+msgid "Device geometry definition:\n"
+msgstr "Iyigamashusho Insobanuro"
+
+#: src/flash/detectflash.c:176
+#, c-format
+msgid "\tDevice Size: %d B (%d KiB, %d MiB)\n"
+msgstr ""
+
+#: src/flash/detectflash.c:183
+msgid "x8"
+msgstr ""
+
+#: src/flash/detectflash.c:186
+msgid "x16"
+msgstr ""
+
+#: src/flash/detectflash.c:189
+msgid "x8/x16"
+msgstr ""
+
+#: src/flash/detectflash.c:192
+msgid "x32"
+msgstr ""
+
+#: src/flash/detectflash.c:195
+msgid "x16/x32"
+msgstr ""
+
+#: src/flash/detectflash.c:201
+#, fuzzy, c-format
+msgid "\tFlash Device Interface Code description: 0x%04X (%s)\n"
+msgstr "Isobanuramiterere"
+
+#: src/flash/detectflash.c:202
+#, fuzzy, c-format
+msgid "\tMaximum number of bytes in multi-byte program: %d\n"
+msgstr "Umubare Bya Bayite in Bayite Porogaramu"
+
+#: src/flash/detectflash.c:203
+#, fuzzy, c-format
+msgid "\tNumber of Erase Block Regions within device: %d\n"
+msgstr "Bya muri APAREYE"
+
+#: src/flash/detectflash.c:204
+#, c-format
+msgid "\tErase Block Region Information:\n"
+msgstr ""
+
+#: src/flash/detectflash.c:209
+#, c-format
+msgid "\t\tRegion %d:\n"
+msgstr ""
+
+#: src/flash/detectflash.c:210
+#, c-format
+msgid "\t\t\tErase Block Size: %d B (%d KiB)\n"
+msgstr ""
+
+#: src/flash/detectflash.c:213
+#, fuzzy, c-format
+msgid "\t\t\tNumber of Erase Blocks: %d\n"
+msgstr "Bya"
+
+#: src/flash/detectflash.c:225
+msgid "Required"
+msgstr ""
+
+#: src/flash/detectflash.c:225
+msgid "Not required"
+msgstr ""
+
+#: src/flash/detectflash.c:228
+msgid "Supported"
+msgstr ""
+
+#: src/flash/detectflash.c:228 src/flash/detectflash.c:239
+#: src/flash/detectflash.c:249
+#, fuzzy
+msgid "Not supported"
+msgstr "OYA"
+
+#: src/flash/detectflash.c:231
+msgid "170-nm Floating Gate technology"
+msgstr ""
+
+#: src/flash/detectflash.c:231
+msgid "230-nm MirrorBit(tm) technology"
+msgstr ""
+
+#: src/flash/detectflash.c:232
+msgid "130-nm Floating Gate technology"
+msgstr ""
+
+#: src/flash/detectflash.c:232
+msgid "110-nm MirrorBit(tm) technology"
+msgstr ""
+
+#: src/flash/detectflash.c:233
+msgid "90-nm Floating Gate technology"
+msgstr ""
+
+#: src/flash/detectflash.c:233
+msgid "90-nm MirrorBit(tm) technology"
+msgstr ""
+
+#: src/flash/detectflash.c:236
+msgid "CS49"
+msgstr ""
+
+#: src/flash/detectflash.c:236
+msgid "CS59"
+msgstr ""
+
+#: src/flash/detectflash.c:236
+msgid "CS99"
+msgstr ""
+
+#: src/flash/detectflash.c:239
+msgid "Read only"
+msgstr ""
+
+#: src/flash/detectflash.c:239
+msgid "Read/write"
+msgstr ""
+
+#: src/flash/detectflash.c:242
+msgid "29F040 mode"
+msgstr ""
+
+#: src/flash/detectflash.c:242
+msgid "29F016 mode"
+msgstr ""
+
+#: src/flash/detectflash.c:242
+msgid "29F400 mode"
+msgstr ""
+
+#: src/flash/detectflash.c:243
+msgid "29LV800 mode"
+msgstr ""
+
+#: src/flash/detectflash.c:243
+msgid "29BDS640 mode (Software Command Locking)"
+msgstr ""
+
+#: src/flash/detectflash.c:244
+msgid "29BDD160 mode (New Sector Protect)"
+msgstr ""
+
+#: src/flash/detectflash.c:245
+msgid "29PDL128 mode (New Sector Protect + 29LV800)"
+msgstr ""
+
+#: src/flash/detectflash.c:246
+msgid "Advanced Sector Protect"
+msgstr ""
+
+#: src/flash/detectflash.c:249
+msgid "4 word Page"
+msgstr ""
+
+#: src/flash/detectflash.c:249
+msgid "8 word Page"
+msgstr ""
+
+#: src/flash/detectflash.c:249
+msgid "16 word Page"
+msgstr ""
+
+#: src/flash/detectflash.c:253
+msgid "No boot"
+msgstr ""
+
+#: src/flash/detectflash.c:253
+msgid "8x8kb sectors at top and bottom with WP control"
+msgstr ""
+
+#: src/flash/detectflash.c:254
+msgid "Bottom boot device"
+msgstr ""
+
+#: src/flash/detectflash.c:254
+msgid "Top boot device"
+msgstr ""
+
+#: src/flash/detectflash.c:255
+msgid "Uniform bottom boot device"
+msgstr ""
+
+#: src/flash/detectflash.c:255
+msgid "Uniform top boot device"
+msgstr ""
+
+#: src/flash/detectflash.c:257
+msgid "Bad value"
+msgstr ""
+
+#: src/flash/detectflash.c:265
+#, c-format
+msgid "Primary Vendor-Specific Extended Query:\n"
+msgstr ""
+
+#: src/flash/detectflash.c:266
+#, c-format
+msgid "\tMajor version number: %c\n"
+msgstr ""
+
+#: src/flash/detectflash.c:267
+#, c-format
+msgid "\tMinor version number: %c\n"
+msgstr ""
+
+#: src/flash/detectflash.c:271 src/flash/detectflash.c:274
+#, c-format
+msgid "\tAddress Sensitive Unlock: %s\n"
+msgstr ""
+
+#: src/flash/detectflash.c:279 src/flash/detectflash.c:282
+#: src/flash/detectflash.c:287 src/flash/detectflash.c:290
+#, c-format
+msgid "\tProcess Technology: %s\n"
+msgstr ""
+
+#: src/flash/detectflash.c:293
+#, c-format
+msgid "\tErase Suspend: %s\n"
+msgstr ""
+
+#: src/flash/detectflash.c:295
+#, fuzzy, c-format
+msgid "\tSector Protect: Not supported\n"
+msgstr "OYA"
+
+#: src/flash/detectflash.c:297
+#, c-format
+msgid "\tSector Protect: %d sectors per group\n"
+msgstr ""
+
+#: src/flash/detectflash.c:299 src/flash/detectflash.c:301
+#, c-format
+msgid "\tSector Temporary Unprotect: %s\n"
+msgstr ""
+
+#: src/flash/detectflash.c:303 src/flash/detectflash.c:306
+#, c-format
+msgid "\tSector Protect/Unprotect Scheme: %s\n"
+msgstr ""
+
+#: src/flash/detectflash.c:308
+#, fuzzy, c-format
+msgid "\tSimultaneous Operation: Not supported\n"
+msgstr "OYA"
+
+#: src/flash/detectflash.c:310
+#, c-format
+msgid "\tSimultaneous Operation: %d sectors\n"
+msgstr ""
+
+#: src/flash/detectflash.c:312 src/flash/detectflash.c:314
+#, c-format
+msgid "\tBurst Mode Type: %s\n"
+msgstr ""
+
+#: src/flash/detectflash.c:316 src/flash/detectflash.c:318
+#, c-format
+msgid "\tPage Mode Type: %s\n"
+msgstr ""
+
+#: src/flash/detectflash.c:322
+#, c-format
+msgid "\tACC (Acceleration) Supply Minimum: %d mV\n"
+msgstr ""
+
+#: src/flash/detectflash.c:323
+#, c-format
+msgid "\tACC (Acceleration) Supply Maximum: %d mV\n"
+msgstr ""
+
+#: src/flash/detectflash.c:325 src/flash/detectflash.c:327
+#, c-format
+msgid "\tTop/Bottom Sector Flag: %s\n"
+msgstr ""
+
+#: src/flash/detectflash.c:332 src/flash/detectflash.c:334
+#, c-format
+msgid "\tProgram Suspend: %s\n"
+msgstr ""
+
+#: src/flash/detectflash.c:339 src/flash/detectflash.c:341
+#, c-format
+msgid "\tUnlock Bypass: %s\n"
+msgstr ""
+
+#: src/flash/detectflash.c:342
+#, c-format
+msgid "\tSecSi Sector (Customer OTP Area) Size: %d bytes\n"
+msgstr ""
+
+#: src/flash/detectflash.c:343
+#, c-format
+msgid "\tEmbedded Hardware Reset Timeout Maximum: %d ns\n"
+msgstr ""
+
+#: src/flash/detectflash.c:344
+#, c-format
+msgid "\tNon-Embedded Hardware Reset Timeout Maximum: %d ns\n"
+msgstr ""
+
+#: src/flash/detectflash.c:345
+#, c-format
+msgid "\tErase Suspend Timeout Maximum: %d us\n"
+msgstr ""
+
+#: src/flash/detectflash.c:346
+#, c-format
+msgid "\tProgram Suspend Timeout Maximum: %d us\n"
+msgstr ""
+
+#: src/flash/detectflash.c:351
+#, c-format
+msgid "\tBank Organization:\n"
+msgstr ""
+
+#: src/flash/detectflash.c:353
+#, c-format
+msgid "\t\tBank%d: %d sectors\n"
+msgstr ""
+
+#: src/flash/flash.c:89
+#, fuzzy, c-format
+msgid "unknown flash - vendor id: %d (0x%04x)\n"
+msgstr "Kitazwi Umurabyo Umucuruzi ID"
+
+#: src/flash/flash.c:93
+#, fuzzy, c-format
+msgid "Flash not supported!\n"
+msgstr "OYA"
+
+#: src/flash/flash.c:104 src/flash/flash.c:265 src/flash/flash.c:391
+#, fuzzy, c-format
+msgid "no flash driver found\n"
+msgstr "Oya Umurabyo Musomyi:"
+
+#: src/flash/flash.c:115
+#, c-format
+msgid "Invalid sync sequence!\n"
+msgstr ""
+
+#: src/flash/flash.c:133
+#, fuzzy, c-format
+msgid "block %d unlocked\n"
+msgstr "Funga"
+
+#: src/flash/flash.c:134 src/flash/flash.c:301
+#, fuzzy, c-format
+msgid "erasing block %d: %d\n"
+msgstr "Funga"
+
+# offmgr/source\offapp\dialog\optgdlg.src:OFA_TP_HELPERPROG.FT_PROGRAM.text
+#: src/flash/flash.c:138 src/flash/flash.c:284
+#, fuzzy, c-format
+msgid "program:\n"
+msgstr "Porogaramu"
+
+#: src/flash/flash.c:146 src/flash/flash.c:191
+#, fuzzy, c-format
+msgid "Error: premature end of file\n"
+msgstr "Impera Bya"
+
+#: src/flash/flash.c:149 src/flash/flash.c:194
+#, fuzzy, c-format
+msgid "record: start = 0x%08X, len = 0x%08X, checksum = 0x%08X\n"
+msgstr "Icyabitswe Gutangira LEN"
+
+#: src/flash/flash.c:153 src/flash/flash.c:198
+#, fuzzy, c-format
+msgid "Error: Invalid record length!\n"
+msgstr "Icyabitswe Uburebure"
+
+#: src/flash/flash.c:165 src/flash/flash.c:328
+#, fuzzy, c-format
+msgid ""
+"\n"
+"flash error\n"
+msgstr "Umurabyo"
+
+#: src/flash/flash.c:177 src/flash/flash.c:340
+#, c-format
+msgid "verify skipped\n"
+msgstr ""
+
+#: src/flash/flash.c:182 src/flash/flash.c:345
+#, c-format
+msgid "verify:\n"
+msgstr ""
+
+#: src/flash/flash.c:211
+#, fuzzy, c-format
+msgid ""
+"\n"
+"verify error: 0x%08X vs. 0x%08X at addr %08X\n"
+msgstr "Ikosa ku Aderesi"
+
+#: src/flash/flash.c:278 src/tap/detect.c:451
+#, fuzzy, c-format
+msgid "Out of memory!\n"
+msgstr "Ububiko bwarenzwe"
+
+#: src/flash/flash.c:300
+#, fuzzy, c-format
+msgid ""
+"\n"
+"block %d unlocked\n"
+msgstr "Funga"
+
+#: src/flash/flash.c:335 src/flash/flash.c:372
+#, fuzzy, c-format
+msgid "addr: 0x%08X\n"
+msgstr "Aderesi"
+
+#: src/flash/flash.c:373
+#, fuzzy, c-format
+msgid ""
+"verify error:\n"
+"read: 0x%08X\n"
+"expected: 0x%08X\n"
+msgstr "Ikosa Ikitezwe:"
+
+#: src/flash/flash.c:379
+#, fuzzy, c-format
+msgid ""
+"addr: 0x%08X\n"
+"Done.\n"
+msgstr "Aderesi"
+
+#: src/flash/flash.c:396
+#, c-format
+msgid ""
+"\n"
+"Erasing %d Flash block%s from address 0x%x\n"
+msgstr ""
+
+#: src/flash/flash.c:401
+#, c-format
+msgid "(%d%% Completed) FLASH Block %d : Unlocking ... "
+msgstr ""
+
+#: src/flash/flash.c:404
+#, c-format
+msgid "Erasing ... "
+msgstr ""
+
+#: src/flash/flash.c:410
+#, c-format
+msgid "(100%% Completed) FLASH Block %d : Unlocking ... Erasing ... Ok.\n"
+msgstr ""
+
+#: src/flash/flash.c:412
+#, c-format
+msgid "Ok."
+msgstr ""
+
+#: src/flash/flash.c:414
+#, c-format
+msgid "%78s"
+msgstr ""
+
+#: src/flash/flash.c:419
+#, c-format
+msgid "ERROR.\n"
+msgstr ""
+
+#: src/flash/flash.c:425
+#, c-format
+msgid ""
+"\n"
+"Erasing Completed.\n"
+msgstr ""
+
+#: src/flash/flash.c:427
+#, c-format
+msgid ""
+"\n"
+"Erasing Failed.\n"
+msgstr ""
+
+#: src/flash/intel.c:116 src/flash/intel.c:119 src/flash/intel.c:122
+#, fuzzy, c-format
+msgid "Manufacturer: %s\n"
+msgstr "Ukora mu nganda"
+
+#: src/flash/intel.c:125
+#, fuzzy, c-format
+msgid "Unknown manufacturer (0x%04X)!\n"
+msgstr "Ukora mu nganda"
+
+#: src/flash/intel.c:129
+#, c-format
+msgid "Chip: "
+msgstr ""
+
+#: src/flash/intel.c:181
+#, c-format
+msgid "Unknown (0x%02X)!\n"
+msgstr ""
+
+#: src/flash/intel.c:240
+#, fuzzy, c-format
+msgid "flash: invalid command seq\n"
+msgstr "Umurabyo Sibyo Komandi:"
+
+#: src/flash/intel.c:243
+#, fuzzy, c-format
+msgid "flash: low vpen\n"
+msgstr "Umurabyo Byo hasi"
+
+#: src/flash/intel.c:246
+#, fuzzy, c-format
+msgid "flash: block locked\n"
+msgstr "Umurabyo Funga"
+
+#: src/flash/intel.c:268
+#, fuzzy, c-format
+msgid "flash: unknown error while unblocking\n"
+msgstr "Umurabyo Kitazwi Ikosa"
+
+#: src/flash/intel.c:287 src/flash/intel.c:339
+#, fuzzy, c-format
+msgid "flash: unknown error while programming\n"
+msgstr "Umurabyo Kitazwi Ikosa"
+
+#: src/flash/intel.c:469
+#, fuzzy
+msgid "supported: 28Fxxxx, 2 x 16 bit"
+msgstr "2. X"
+
+#: src/flash/intel.c:481
+#, fuzzy
+msgid "supported: 28Fxxxx, 1 x 16 bit"
+msgstr "1. X"
+
+#: src/flash/intel.c:493
+#, fuzzy
+msgid "supported: 28Fxxxx, 1 x 8 bit"
+msgstr "1. X 8"
+
+#: src/jtag.c:295
+#, c-format
+msgid "'%s' must not be run suid root!\n"
+msgstr ""
+
+# #-#-#-#-# dbaccess.pot (PACKAGE VERSION) #-#-#-#-#
+# #-#-#-#-# dbaccess.pot (PACKAGE VERSION) #-#-#-#-#
+# #-#-#-#-# dbaccess.pot (PACKAGE VERSION) #-#-#-#-#
+#: src/jtag.c:356
+#, fuzzy, c-format
+msgid "%s #%s\n"
+msgstr "%-13s%s"
+
+#: src/jtag.c:359
+#, c-format
+msgid "Usage: %s [OPTIONS] [FILE [FILE ... ]] \n"
+msgstr ""
+
+#: src/jtag.c:362
+#, c-format
+msgid " -h, --help display this help and exit\n"
+msgstr ""
+
+#: src/jtag.c:363
+#, c-format
+msgid " -v, --version display version information and exit\n"
+msgstr ""
+
+#: src/jtag.c:365
+#, c-format
+msgid " -n, --norc disable reading ~/.jtag/rc on startup\n"
+msgstr ""
+
+#: src/jtag.c:366
+#, c-format
+msgid " -i, --interactive enter interactive mode after reading files\n"
+msgstr ""
+
+#: src/jtag.c:367
+#, c-format
+msgid " -q, --quiet Do not print help on startup\n"
+msgstr ""
+
+#: src/jtag.c:369
+#, c-format
+msgid " [FILE] file containing commands to execute\n"
+msgstr ""
+
+#: src/jtag.c:372
+#, c-format
+msgid " Please report bugs at http://www.urjtag.org\n"
+msgstr ""
+
+#: src/jtag.c:379
+#, c-format
+msgid ""
+"\n"
+"%s #%s\n"
+"\n"
+"Copyright (C) 2002, 2003 ETC s.r.o.\n"
+"Copyright (C) 2007, 2008 Kolja Waschk and the respective authors\n"
+msgstr ""
+
+#: src/jtag.c:384
+#, c-format
+msgid ""
+"\n"
+"This program is free software; you can redistribute it and/or modify\n"
+"it under the terms of the GNU General Public License as published by\n"
+"the Free Software Foundation; either version 2 of the License, or\n"
+"(at your option) any later version.\n"
+"\n"
+"This program is distributed in the hope that it will be useful,\n"
+"but WITHOUT ANY WARRANTY; without even the implied warranty of\n"
+"MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the\n"
+"GNU General Public License for more details.\n"
+"\n"
+"You should have received a copy of the GNU General Public License\n"
+"along with this program; if not, write to the Free Software\n"
+"Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA\n"
+msgstr ""
+
+#: src/jtag.c:439
+#, fuzzy, c-format
+msgid ""
+"\n"
+"%s #%s\n"
+"Copyright (C) 2002, 2003 ETC s.r.o.\n"
+"Copyright (C) 2007, 2008 Kolja Waschk and the respective authors\n"
+"\n"
+"%s is free software, covered by the GNU General Public License, and you are\n"
+"welcome to change it and/or distribute copies of it under certain "
+"conditions.\n"
+"There is absolutely no warranty for %s.\n"
+"\n"
+msgstr "%sR. o."
+
+#: src/jtag.c:455
+#, fuzzy, c-format
+msgid "WARNING: %s may damage your hardware!\n"
+msgstr "Gicurasi Kuvamo Kuri Gusohoka"
+
+#: src/jtag.c:456
+#, fuzzy, c-format
+msgid ""
+"Type \"quit\" to exit, \"help\" for help.\n"
+"\n"
+msgstr "Ifashayobora kugirango Ifashayobora"
+
+#: src/part/data_register.c:46
+#, fuzzy, c-format
+msgid "Warning: Data register name too long\n"
+msgstr "Kwiyandikisha Izina:"
+
+#: src/part/instruction.c:46
+#, fuzzy, c-format
+msgid "Warning: Instruction name too long\n"
+msgstr "Izina:"
+
+#: src/part/part.c:194
+#, fuzzy, c-format
+msgid "signal '%s' cannot be set as output\n"
+msgstr "Gushyiraho Nka"
+
+#: src/part/part.c:204
+#, fuzzy, c-format
+msgid "signal '%s' cannot be set as input\n"
+msgstr "Gushyiraho Nka"
+
+#: src/part/part.c:228
+#, fuzzy, c-format
+msgid "signal '%s' is not input signal\n"
+msgstr "ni OYA Iyinjiza"
+
+#: src/part/part.c:245
+#, c-format
+msgid "%%-%ds %%-%ds %%-%ds %%-%ds %%-%ds\n"
+msgstr ""
+
+#: src/part/part.c:254 src/part/part.c:256
+msgid "(none)"
+msgstr "(ntacyo)"
+
+#: src/svf/svf.c:351 src/svf/svf.c:529 src/svf/svf.c:868 src/svf/svf.c:872
+#, fuzzy, c-format
+msgid "out of memory"
+msgstr "Inyuma Bya"
+
+#: src/svf/svf.c:449
+#, c-format
+msgid "Error %s: mismatch at position %d for TDO\n"
+msgstr ""
+
+#: src/svf/svf.c:601 src/svf/svf.c:1011
+#, c-format
+msgid "Warning %s: command %s not implemented\n"
+msgstr ""
+
+#: src/svf/svf.c:634
+#, c-format
+msgid "Error %s: only TCK is supported for RUNTEST.\n"
+msgstr ""
+
+#: src/svf/svf.c:638
+#, c-format
+msgid "Error %s: maximum time must be larger or equal to minimum time.\n"
+msgstr ""
+
+#: src/svf/svf.c:644
+#, c-format
+msgid "Warning %s: maximum time for RUNTEST not guaranteed.\n"
+msgstr ""
+
+#: src/svf/svf.c:645
+#, c-format
+msgid " This message is only displayed once.\n"
+msgstr ""
+
+#: src/svf/svf.c:669
+#, c-format
+msgid "Error %s: Maximum cable clock frequency required for RUNTEST.\n"
+msgstr ""
+
+#: src/svf/svf.c:670
+#, c-format
+msgid " Set the cable frequency with 'FREQUENCY <Hz>'.\n"
+msgstr ""
+
+#: src/svf/svf.c:820
+#, c-format
+msgid "Error %s: first %s command after length change must have a TDI value.\n"
+msgstr ""
+
+#: src/svf/svf.c:845
+#, c-format
+msgid "Error %s: SIR command length inconsistent.\n"
+msgstr ""
+
+#: src/svf/svf.c:946
+#, c-format
+msgid "Error %s: no further TRST command allowed after mode ABSENT\n"
+msgstr ""
+
+#: src/svf/svf.c:966
+#, c-format
+msgid "Error %s: TRST ABSENT must not be issued after a STATE command\n"
+msgstr ""
+
+#: src/svf/svf.c:972
+#, c-format
+msgid "Error %s: TRST ABSENT must not be issued after an SIR or SDR command\n"
+msgstr ""
+
+#: src/svf/svf.c:982
+#, c-format
+msgid "Warning %s: unimplemented mode '%s' for TRST\n"
+msgstr ""
+
+#: src/svf/svf.c:1070
+#, fuzzy, c-format
+msgid "Error %s: no JTAG chain available\n"
+msgstr "Kuri Impera"
+
+#: src/svf/svf.c:1074
+#, c-format
+msgid "Error %s: chain without any parts\n"
+msgstr ""
+
+#: src/svf/svf.c:1090
+#, c-format
+msgid "Error %s: could not establish SDR register\n"
+msgstr ""
+
+#: src/svf/svf.c:1122
+#, c-format
+msgid "Error %s: could not establish SIR instruction\n"
+msgstr ""
+
+#: src/svf/svf.c:1156
+#, c-format
+msgid ""
+"Mismatches occurred between scanned device output and expected TDO values.\n"
+msgstr ""
+
+#: src/svf/svf.c:1158
+#, c-format
+msgid "Scanned device output matched expected TDO values.\n"
+msgstr ""
+
+#: svf_flex.l:351
+#, c-format
+msgid "Parsing %6d/%d (%3.0d%%)"
+msgstr ""
+
+#: src/tap/cable/arcom.c:129
+msgid "Arcom JTAG Cable"
+msgstr ""
+
+#: src/tap/cable/byteblaster.c:154
+msgid ""
+"Altera ByteBlaster/ByteBlaster II/ByteBlasterMV Parallel Port Download Cable"
+msgstr ""
+
+#: src/tap/cable.c:175
+#, c-format
+msgid "Failed to allocate memory for cable activity queue.\n"
+msgstr ""
+
+#: src/tap/cable.c:220
+#, c-format
+msgid "Out of memory: couldn't resize activity queue to %d\n"
+msgstr ""
+
+#: src/tap/cable.c:225
+#, c-format
+msgid "(Resized JTAG activity queue to hold max %d items)\n"
+msgstr ""
+
+#: src/tap/cable.c:405 src/tap/cable.c:463
+#, c-format
+msgid "Internal error: Got wrong type of result from queue (%d? %p.%d)\n"
+msgstr ""
+
+#: src/tap/cable.c:469
+#, c-format
+msgid "Internal error: Got wrong signal's value from queue (%d? %p.%d)\n"
+msgstr ""
+
+#: src/tap/cable.c:523
+#, c-format
+msgid "Internal error: Got wrong type of result from queue (#%d %p.%d)\n"
+msgstr ""
+
+#: src/tap/cable.c:529
+#, c-format
+msgid "Internal error: Wanted transfer result but none was queued\n"
+msgstr ""
+
+#: src/tap/cable/dlc5.c:125
+msgid "Xilinx DLC5 JTAG Parallel Cable III"
+msgstr ""
+
+#: src/tap/cable/ea253.c:129
+msgid "ETC EA253 JTAG Cable"
+msgstr ""
+
+#: src/tap/cable/ei012.c:131
+msgid "ETC EI012 JTAG Cable"
+msgstr ""
+
+#: src/tap/cable/ft2232.c:248
+#, c-format
+msgid "Warning: Setting lowest supported frequency for FT2232: %d\n"
+msgstr ""
+
+#: src/tap/cable/ft2232.c:680
+#, c-format
+msgid "Error: Please power on the TARGET board and connect VCC signal!\n"
+msgstr ""
+
+#: src/tap/cable/ft2232.c:1662
+#, c-format
+msgid ""
+"Usage: cable %s [vid=VID] [pid=PID] [desc=DESC] [driver=DRIVER]\n"
+"\n"
+"VID vendor ID (hex), defaults to %04X\n"
+"PID product ID (hex), defaults to %04X\n"
+"DESC Some string to match in description or serial no.\n"
+"DRIVER usbconn driver, either ftdi-mpsse or ftd2xx-mpsse\n"
+" defaults to %s if not specified\n"
+"\n"
+msgstr ""
+
+#: src/tap/cable/ft2232.c:1680
+msgid "Generic FTDI FT2232 Cable"
+msgstr ""
+
+#: src/tap/cable/ft2232.c:1712
+msgid "Olimex ARM-USB-OCD[-TINY] (FT2232) Cable"
+msgstr ""
+
+#: src/tap/cable/ft2232.c:1758
+msgid "Analog Devices Blackfin gnICE (FT2232) Cable (EXPERIMENTAL)"
+msgstr ""
+
+#: src/tap/cable/ft2232.c:1790
+msgid "Amontec JTAGkey (FT2232) Cable"
+msgstr ""
+
+#: src/tap/cable/ft2232.c:1822
+msgid "OOCDLink-s (FT2232) Cable (EXPERIMENTAL)"
+msgstr ""
+
+#: src/tap/cable/ft2232.c:1854
+msgid "Turtelizer 2 Rev. B (FT2232) Cable (EXPERIMENTAL)"
+msgstr ""
+
+#: src/tap/cable/ft2232.c:1886
+msgid "USB to JTAG Interface (FT2232) Cable (EXPERIMENTAL)"
+msgstr ""
+
+#: src/tap/cable/ft2232.c:1918
+msgid "Xverve DT-USB-ST Signalyzer Tool (FT2232) Cable (EXPERIMENTAL)"
+msgstr ""
+
+#: src/tap/cable/ft2232.c:1950
+msgid "TinCanTools Flyswatter Cable"
+msgstr ""
+
+#: src/tap/cable/ft2232.c:1982
+msgid "KrisTech usbScarabeus2 (FT2232) Cable"
+msgstr ""
+
+#: src/tap/cable/generic.c:110
+#, c-format
+msgid "No space in cable activity results queue.\n"
+msgstr ""
+
+#: src/tap/cable/generic.c:389
+#, c-format
+msgid "calibration error, wall clock is not monotonically increasing\n"
+msgstr ""
+
+#: src/tap/cable/generic_parport.c:58 src/tap/cable/jim.c:54
+#, c-format
+msgid "not enough arguments!\n"
+msgstr ""
+
+#: src/tap/cable/generic_parport.c:67
+#, fuzzy, c-format
+msgid "Unknown port driver: %s\n"
+msgstr "Kitazwi Ibyatanzwe Kwiyandikisha"
+
+#: src/tap/cable/generic_parport.c:112
+#, c-format
+msgid ""
+"Usage: cable %s parallel PORTADDR\n"
+" or: cable %s ppdev PPDEV\n"
+" or: cable %s ppi PPIDEV\n"
+"\n"
+"PORTADDR parallel port address (e.g. 0x378)\n"
+"PPDEV ppdev device (e.g. /dev/parport0)\n"
+"PPIDEF ppi device (e.g. /dev/ppi0)\n"
+"\n"
+msgstr ""
+
+#: src/tap/cable/generic_usbconn.c:217
+#, c-format
+msgid "Couldn't connect to suitable USB device.\n"
+msgstr ""
+
+#: src/tap/cable/generic_usbconn.c:253
+#, c-format
+msgid ""
+"Usage: cable %s [vid=VID] [pid=PID] [desc=DESC] [...]\n"
+"\n"
+"VID USB Device Vendor ID (hex, e.g. 0abc)\n"
+"PID USB Device Product ID (hex, e.g. 0abc)\n"
+"DESC Some string to match in description or serial no.\n"
+"\n"
+msgstr ""
+
+#: src/tap/cable/jim.c:58
+#, c-format
+msgid "JTAG target simulator JIM - work in progress!\n"
+msgstr ""
+
+#: src/tap/cable/jim.c:62
+#, fuzzy, c-format
+msgid "Initialization failed.\n"
+msgstr "Byanze"
+
+#: src/tap/cable/jim.c:151
+#, c-format
+msgid "Usage: cable %s\n"
+msgstr ""
+
+#: src/tap/cable/jim.c:159
+msgid "JTAG target simulator JIM"
+msgstr ""
+
+#: src/tap/cable/jlink.c:572
+msgid "Segger/IAR J-Link, Atmel SAM-ICE and others."
+msgstr ""
+
+#: src/tap/cable/keithkoep.c:141
+msgid "Keith & Koep JTAG cable"
+msgstr ""
+
+#: src/tap/cable/lattice.c:131
+msgid "Lattice Parallel Port JTAG Cable"
+msgstr ""
+
+#: src/tap/cable/mpcbdm.c:142
+msgid "Mpcbdm JTAG cable"
+msgstr ""
+
+#: src/tap/cable/triton.c:143
+msgid "Ka-Ro TRITON Starterkit II (PXA255/250) JTAG Cable"
+msgstr ""
+
+#: src/tap/cable/ts7800.c:87 src/tap/cable/vision_ep9307.c:93
+#, fuzzy, c-format
+msgid "Error: unable to open /dev/mem\n"
+msgstr "Bya Ububiko"
+
+#: src/tap/cable/ts7800.c:97 src/tap/cable/vision_ep9307.c:130
+#, c-format
+msgid "Error: unable to mmap the GPIO registers\n"
+msgstr ""
+
+#: src/tap/cable/ts7800.c:120 src/tap/cable/vision_ep9307.c:155
+#, c-format
+msgid "Error: unable to munmap the GPIO registers\n"
+msgstr ""
+
+#: src/tap/cable/ts7800.c:152 src/tap/cable/vision_ep9307.c:193
+#, c-format
+msgid "Error: This cable type does not accept parameters!\n"
+msgstr ""
+
+#: src/tap/cable/ts7800.c:156
+#, c-format
+msgid "Initializing TS-7800 Built-in JTAG Chain\n"
+msgstr ""
+
+#: src/tap/cable/ts7800.c:160
+#, fuzzy, c-format
+msgid "%s(%d) Out of memory\n"
+msgstr "%s(%d)Bya Ububiko"
+
+#: src/tap/cable/ts7800.c:281 src/tap/cable/vision_ep9307.c:320
+#, c-format
+msgid ""
+"Usage: cable %s\n"
+"\n"
+msgstr ""
+
+#: src/tap/cable/ts7800.c:288
+msgid "TS-7800 Built-in JTAG Chain"
+msgstr ""
+
+#: src/tap/cable/usbblaster.c:102
+#, c-format
+msgid "Warning: USB-Blaster frequency is fixed to %ld Hz\n"
+msgstr ""
+
+#: src/tap/cable/usbblaster.c:456
+#, c-format
+msgid ""
+"Usage: cable %s [vid=VID] [pid=PID] [desc=DESC] [driver=DRIVER]\n"
+"\n"
+"VID vendor ID (hex, e.g. 0abc)\n"
+"PID product ID (hex, e.g. 0abc)\n"
+"DESC Some string to match in description or serial no.\n"
+"DRIVER usbconn driver, either ftdi or ftd2xx\n"
+" defaults to %s if not specified\n"
+"\n"
+msgstr ""
+
+#: src/tap/cable/usbblaster.c:472
+msgid "Altera USB-Blaster Cable"
+msgstr ""
+
+#: src/tap/cable/vision_ep9307.c:103
+#, c-format
+msgid "Error: unable to mmap the System Control registers\n"
+msgstr ""
+
+#: src/tap/cable/vision_ep9307.c:122
+#, c-format
+msgid "Error: unable to munmap the System Controller registers\n"
+msgstr ""
+
+#: src/tap/cable/vision_ep9307.c:197
+#, c-format
+msgid "Initializing Vision EP9307 SoM GPIO JTAG Cable\n"
+msgstr ""
+
+#: src/tap/cable/vision_ep9307.c:327
+msgid "Vision EP9307 SoM GPIO JTAG Cable"
+msgstr ""
+
+#: src/tap/cable/wiggler2.c:148
+msgid "Modified (with CPU Reset) WIGGLER JTAG Cable"
+msgstr ""
+
+#: src/tap/cable/wiggler.c:213
+#, c-format
+msgid "Pin mapping failed\n"
+msgstr ""
+
+#: src/tap/cable/wiggler.c:327
+#, c-format
+msgid ""
+"Usage: cable %s parallel PORTADDR [TDO,TRST,TDI,TCK,TMS,SRESET]\n"
+" or: cable %s ppdev PPDEV [TDO,TRST,TDI,TCK,TMS,SRESET]\n"
+" or: cable %s ppi PPIDEV [TDO,TRST,TDI,TCK,TMS,SRESET]\n"
+"\n"
+"PORTADDR parallel port address (e.g. 0x378)\n"
+"PPDEV ppdev device (e.g. /dev/parport0)\n"
+"PPIDEF ppi device (e.g. /dev/ppi0)\n"
+"TDO, ... parallel port bit number, prepend '#' for inversion\n"
+" default is '%s'\n"
+"\n"
+msgstr ""
+
+#: src/tap/cable/wiggler.c:359
+msgid "Macraigor Wiggler JTAG Cable"
+msgstr ""
+
+#: src/tap/cable/wiggler.c:377
+msgid "Excelpoint IGLOO JTAG Cable"
+msgstr ""
+
+#: src/tap/cable/xpc.c:634
+msgid "Xilinx Platform Cable USB internal chain"
+msgstr ""
+
+#: src/tap/cable/xpc.c:660
+msgid "Xilinx Platform Cable USB external chain"
+msgstr ""
+
+#: src/tap/chain.c:149 src/tap/chain.c:200
+#, fuzzy, c-format
+msgid "%s(%d) Part %d without active instruction\n"
+msgstr "%s(%d)Gikora"
+
+#: src/tap/chain.c:204
+#, fuzzy, c-format
+msgid "%s(%d) Part %d without data register\n"
+msgstr "%s(%d)Ibyatanzwe"
+
+#: src/tap/detect.c:59
+#, fuzzy, c-format
+msgid "Cannot open %s\n"
+msgstr "Gufungura"
+
+#: src/tap/detect.c:206
+#, fuzzy, c-format
+msgid "IR length: %d\n"
+msgstr "Uburebure"
+
+#: src/tap/detect.c:223
+#, fuzzy, c-format
+msgid "Unable to detect JTAG chain length\n"
+msgstr "Kuri"
+
+#: src/tap/detect.c:226
+#, fuzzy, c-format
+msgid "Chain length: %d\n"
+msgstr "Uburebure"
+
+#: src/tap/detect.c:267
+#, c-format
+msgid "Device Id: %s (0x%016<PRIX64>)\n"
+msgstr ""
+
+#: src/tap/detect.c:296
+#, fuzzy, c-format
+msgid " Unknown manufacturer!\n"
+msgstr "Ukora mu nganda"
+
+#: src/tap/detect.c:302
+#, fuzzy, c-format
+msgid " Manufacturer: %s\n"
+msgstr "Ukora mu nganda"
+
+#: src/tap/detect.c:304
+#, c-format
+msgid "Warning: Manufacturer too long\n"
+msgstr ""
+
+#: src/tap/detect.c:320
+#, c-format
+msgid " Unknown part!\n"
+msgstr ""
+
+#: src/tap/detect.c:326
+#, c-format
+msgid " Part(%d): %s\n"
+msgstr ""
+
+#: src/tap/detect.c:328
+#, c-format
+msgid "Warning: Part too long\n"
+msgstr ""
+
+#: src/tap/detect.c:344
+#, c-format
+msgid " Unknown stepping!\n"
+msgstr ""
+
+#: src/tap/detect.c:350
+#, c-format
+msgid " Stepping: %s\n"
+msgstr ""
+
+#: src/tap/detect.c:352
+#, c-format
+msgid "Warning: Stepping too long\n"
+msgstr ""
+
+#: src/tap/detect.c:382
+#, fuzzy, c-format
+msgid "Error: Unable to detect JTAG chain end!\n"
+msgstr "Kuri Impera"
+
+#: src/tap/detect.c:409
+#, fuzzy, c-format
+msgid "Error: Unable to allocate a register!\n"
+msgstr "Kuri Impera"
+
+#: src/tap/detect.c:417
+#, fuzzy, c-format
+msgid "Error: Unable to allocate space for parts!\n"
+msgstr "Kuri Impera"
+
+#: src/tap/detect.c:424
+#, fuzzy, c-format
+msgid "Error: Unable to allocate space for a part!\n"
+msgstr "Kuri Impera"
+
+#: src/tap/detect.c:440
+#, c-format
+msgid "Error: could not set BR register"
+msgstr ""
+
+#: src/tap/detect.c:462
+#, c-format
+msgid "Error: could not set BYPASS instruction"
+msgstr ""
+
+#: src/tap/discovery.c:108
+#, c-format
+msgid "Warning: TDO seems to be stuck at %d\n"
+msgstr ""
+
+#: src/tap/discovery.c:133
+#, fuzzy, c-format
+msgid "Detecting IR length ... "
+msgstr "Uburebure"
+
+# basctl/source\basicide\basidesh.src:RID_IMGBTN_REMOVEWATCH.text
+#: src/tap/discovery.c:139 src/tap/discovery.c:171
+#, fuzzy, c-format
+msgid "%d\n"
+msgstr "%d"
+
+#: src/tap/discovery.c:142
+#, fuzzy, c-format
+msgid "Error: Invalid IR length!\n"
+msgstr "Uburebure"
+
+#: src/tap/discovery.c:153
+#, fuzzy, c-format
+msgid "Error: Out of memory!\n"
+msgstr "Bya Ububiko"
+
+#: src/tap/discovery.c:165
+#, fuzzy, c-format
+msgid "Detecting DR length for IR %s ... "
+msgstr "Uburebure kugirango"
+
+#: src/tap/parport/direct.c:139
+#, c-format
+msgid "Couldn't load InpOut32.dll; maybe not installed?\n"
+msgstr ""
+
+#: src/tap/parport/direct.c:206 src/tap/parport/ppdev.c:119
+#: src/tap/parport/ppi.c:115
+#, fuzzy, c-format
+msgid "Syntax error!\n"
+msgstr "Ikosa ry'imyandikire"
+
+#: src/tap/parport/direct.c:213
+#, fuzzy, c-format
+msgid "Invalid port address!\n"
+msgstr "Umuyoboro Aderesi"
+
+#: src/tap/parport/direct.c:225
+#, fuzzy, c-format
+msgid "Disconnecting %s from parallel port at 0x%x\n"
+msgstr "Bivuye Biteganye Umuyoboro ku"
+
+#: src/tap/parport/direct.c:231
+#, fuzzy, c-format
+msgid "Initializing parallel port at 0x%x\n"
+msgstr "ku Biteganye Umuyoboro ku"
+
+#: src/tap/parport/direct.c:235 src/tap/parport/ppdev.c:134
+#: src/tap/parport/ppi.c:130
+#, fuzzy, c-format
+msgid "%s(%d) Out of memory.\n"
+msgstr "%s(%d)Bya Ububiko"
+
+#: src/tap/parport/ppdev.c:125
+#, fuzzy, c-format
+msgid "Disconnecting %s from ppdev port %s\n"
+msgstr "Bivuye Umuyoboro"
+
+#: src/tap/parport/ppdev.c:130
+#, fuzzy, c-format
+msgid "Initializing ppdev port %s\n"
+msgstr "ku Umuyoboro"
+
+#: src/tap/parport/ppdev.c:148
+#, fuzzy, c-format
+msgid "Could not open port %s: %s\n"
+msgstr "Gufungura"
+
+#: src/tap/parport/ppdev.c:153
+#, c-format
+msgid "Could not claim ppdev device: %s\n"
+msgstr ""
+
+#: src/tap/parport/ppi.c:121
+#, fuzzy, c-format
+msgid "Disconnecting %s from ppi port %s\n"
+msgstr "Bivuye Umuyoboro"
+
+#: src/tap/parport/ppi.c:126
+#, fuzzy, c-format
+msgid "Initializing on ppi port %s\n"
+msgstr "ku Umuyoboro"
+
+#: src/tap/tap.c:71 src/tap/tap.c:131 src/tap/tap.c:142
+#, fuzzy, c-format
+msgid "%s: Invalid state: %2X\n"
+msgstr "%s:Leta"
+
+#: src/tap/usbconn/libftd2xx.c:100
+#, c-format
+msgid "%s(): FT_Write() failed.\n"
+msgstr ""
+
+#: src/tap/usbconn/libftd2xx.c:104 src/tap/usbconn/libftdi.c:89
+#, c-format
+msgid "%s(): Written fewer bytes than requested.\n"
+msgstr ""
+
+#: src/tap/usbconn/libftd2xx.c:123 src/tap/usbconn/libftdi.c:108
+#, c-format
+msgid "%s(): Receive buffer does not exist.\n"
+msgstr ""
+
+#: src/tap/usbconn/libftd2xx.c:130 src/tap/usbconn/libftd2xx.c:190
+#, c-format
+msgid "%s(): Error from FT_Read(): %d\n"
+msgstr ""
+
+#: src/tap/usbconn/libftd2xx.c:134 src/tap/usbconn/libftdi.c:119
+#, c-format
+msgid "%s(): Received less bytes than requested.\n"
+msgstr ""
+
+#: src/tap/usbconn/libftd2xx.c:256 src/tap/usbconn/libftdi.c:224
+#, c-format
+msgid "%s(): Send buffer does not exist.\n"
+msgstr ""
+
+#: src/tap/usbconn/libftd2xx.c:314
+#, c-format
+msgid "Connected to libftd2xx driver.\n"
+msgstr ""
+
+#: src/tap/usbconn/libftd2xx.c:389 src/tap/usbconn/libftd2xx.c:428
+#: src/tap/usbconn/libftd2xx.c:448 src/tap/usbconn/libftd2xx.c:471
+#, c-format
+msgid "%s(): Can't reset device.\n"
+msgstr ""
+
+#: src/tap/usbconn/libftd2xx.c:391 src/tap/usbconn/libftd2xx.c:430
+#: src/tap/usbconn/libftd2xx.c:450 src/tap/usbconn/libftd2xx.c:473
+#, c-format
+msgid "%s(): Can't purge RX buffer.\n"
+msgstr ""
+
+#: src/tap/usbconn/libftd2xx.c:394
+#, c-format
+msgid "%s(): Can't set latency timer.\n"
+msgstr ""
+
+#: src/tap/usbconn/libftd2xx.c:397
+#, c-format
+msgid "%s(): Can't set baudrate.\n"
+msgstr ""
+
+#: src/tap/usbconn/libftd2xx.c:433
+#, c-format
+msgid "%s(): Can't set USB parameters.\n"
+msgstr ""
+
+#: src/tap/usbconn/libftd2xx.c:436
+#, c-format
+msgid "%s(): Can't set special characters.\n"
+msgstr ""
+
+#: src/tap/usbconn/libftd2xx.c:442
+#, c-format
+msgid "%s(): Can't set target latency timer.\n"
+msgstr ""
+
+#: src/tap/usbconn/libftd2xx.c:445
+#, c-format
+msgid "%s(): Can't set MPSSE bitmode.\n"
+msgstr ""
+
+#: src/tap/usbconn/libftdi.c:84
+#, c-format
+msgid "%s(): ftdi_write_data() failed: %s\n"
+msgstr ""
+
+#: src/tap/usbconn/libftdi.c:115 src/tap/usbconn/libftdi.c:168
+#, c-format
+msgid "%s(): Error from ftdi_read_data(): %s\n"
+msgstr ""
+
+#: src/tap/usbconn/libftdi.c:286
+#, c-format
+msgid "Connected to libftdi driver.\n"
+msgstr ""
+
+#: src/tap/usbconn/libftdi.c:324
+#, c-format
+msgid "%s() failed: %s\n"
+msgstr ""
+
+#: src/tap/usbconn/libftdi.c:349
+#, c-format
+msgid "%s(): ftdi_usb_purge_buffers() failed: %s\n"
+msgstr ""
+
+#: src/tap/usbconn/libftdi.c:352 src/tap/usbconn/libftdi.c:369
+#, c-format
+msgid "%s(): ftdi_read_data() failed: %s\n"
+msgstr ""
+
+#: src/tap/usbconn/libftdi.c:361
+#, c-format
+msgid "%s(): ftdi_usb_purge_rx_buffer() failed: %s\n"
+msgstr ""
+
+#: src/tap/usbconn/libftdi.c:366
+#, c-format
+msgid "%s(): ftdi_usb_purge_tx_buffer() failed: %s\n"
+msgstr ""
+
+#: src/tap/usbconn/libftdi.c:386
+#, c-format
+msgid "%s(): ftdi_poll_status() failed: %s\n"
+msgstr ""
+
+#: src/tap/usbconn/libftdi.c:391 src/tap/usbconn/libftdi.c:485
+#: src/tap/usbconn/libftdi.c:504
+#, c-format
+msgid "%s(): ftdi_usb_reset() failed: %s\n"
+msgstr ""
+
+#: src/tap/usbconn/libftdi.c:414 src/tap/usbconn/libftdi.c:477
+#, c-format
+msgid "%s(): ftdi_set_latency_timer() failed: %s\n"
+msgstr ""
+
+#: src/tap/usbconn/libftdi.c:427
+#, c-format
+msgid "%s(): ftdi_set_baudrate() failed: %s\n"
+msgstr ""
+
+#: src/tap/usbconn/libftdi.c:481
+#, c-format
+msgid "%s(): ftdi_set_bitmode() failed: %s\n"
+msgstr ""
+
+#, fuzzy
+#~ msgid ""
+#~ "Blackfin BF537 Stamp compatible bus driver via BSR (JTAG part No. %d)\n"
+#~ msgstr "Musomyi: Biturutse"
+
+#, fuzzy
+#~ msgid ""
+#~ "Blackfin BF537 EZ-KIT compatible bus driver via BSR (JTAG part No. %d)\n"
+#~ msgstr "Musomyi: Biturutse"
+
+#, fuzzy
+#~ msgid ""
+#~ "Blackfin BF527 EZ-KIT compatible bus driver via BSR (JTAG part No. %d)\n"
+#~ msgstr "Musomyi: Biturutse"
+
+#, fuzzy
+#~ msgid "Intel PXA2x0 compatible bus driver via BSR (JTAG part No. %d)\n"
+#~ msgstr "Musomyi: Biturutse"
+
+#, fuzzy
+#~ msgid "Intel PXA27x compatible bus driver via BSR (JTAG part No. %d)\n"
+#~ msgstr "Musomyi: Biturutse"
+
+#, fuzzy
+#~ msgid "addr: 0x%08X\r"
+#~ msgstr "Aderesi"
+
+#, fuzzy
+#~ msgid "Error during file read.\n"
+#~ msgstr "IDOSIYE Gusoma"
+
+#, fuzzy
+#~ msgid "Disconnecting %s\n"
+#~ msgstr "Bivuye Umuyoboro"
+
+#, fuzzy
+#~ msgid "Disconnecting %s from FTDI device %s\n"
+#~ msgstr "Bivuye Umuyoboro"
+
+#, fuzzy
+#~ msgid "Initializing %s on FTDI device %s\n"
+#~ msgstr "ku Umuyoboro"
+
+#, fuzzy
+#~ msgid "Initializing on FTDI device %s\n"
+#~ msgstr "ku Umuyoboro"
+
+#, fuzzy
+#~ msgid "Disconnecting %s, device %s\n"
+#~ msgstr "Bivuye Umuyoboro"
+
+#, fuzzy
+#~ msgid "Initializing %s, device %s\n"
+#~ msgstr "ku Umuyoboro"
+
+#, fuzzy
+#~ msgid "Initializing device %s\n"
+#~ msgstr "ku Umuyoboro"
+
+#, fuzzy
+#~ msgid ""
+#~ "Usage: %s FILENAME\n"
+#~ "Run command sequence from external FILENAME from the repository.\n"
+#~ "\n"
+#~ "FILENAME Name of the file with commands\n"
+#~ msgstr "Komandi: Bivuye external Bivuye i Bya i IDOSIYE Na:"
+
+#, fuzzy
+#~ msgid ""
+#~ "Usage: %s PORTADDR CABLE\n"
+#~ "Usage: %s DEV CABLE\n"
+#~ "Select JTAG cable connected to parallel port.\n"
+#~ "\n"
+#~ "PORTADDR parallel port address (e.g. 0x378)\n"
+#~ "CABLE cable type\n"
+#~ "DEV ppdev device (e.g. /dev/parport0)\n"
+#~ "\n"
+#~ "List of supported cables:\n"
+#~ "%-13s No cable connected\n"
+#~ msgstr "g. g."
+
+#, fuzzy
+#~ msgid "Note: Supported configuration is 2 x 16 bit or 1 x 16 bit only\n"
+#~ msgstr "Iboneza ni 2. X Cyangwa 1. X"
+
+#, fuzzy
+#~ msgid "Changed cable to 'none'\n"
+#~ msgstr "Kuri"
--- /dev/null
+# Slovak translations for jtag package
+# Copyright (C) 2003 ETC s.r.o.
+# This file is distributed under the same license as the jtag package.
+# Marcel Telka <marcel@telka.sk>, 2003.
+#
+msgid ""
+msgstr ""
+"Project-Id-Version: jtag 0.5.1\n"
+"Report-Msgid-Bugs-To: marcel@telka.sk\n"
+"POT-Creation-Date: 2009-04-08 22:49+0200\n"
+"PO-Revision-Date: 2003-10-08 21:25+0200\n"
+"Last-Translator: Marcel Telka <marcel@telka.sk>\n"
+"Language-Team: Slovak <sk-i18n@lists.linux.sk>\n"
+"MIME-Version: 1.0\n"
+"Content-Type: text/plain; charset=UTF-8\n"
+"Content-Transfer-Encoding: 8bit\n"
+
+#: bsdl_bison.y:257
+msgid "Unsupported BSDL construct found"
+msgstr ""
+
+#: bsdl_bison.y:320
+msgid "Error in Instruction_Opcode attribute statement"
+msgstr ""
+
+#: bsdl_bison.y:333
+msgid "Multiple opcode patterns are not supported, first pattern will be used"
+msgstr ""
+
+#: bsdl_bison.y:364
+msgid "Error in Opcode List"
+msgstr ""
+
+#: bsdl_bison.y:450
+msgid "Error in Boundary Cell description"
+msgstr ""
+
+#: bsdl_bison.y:574
+#, fuzzy
+msgid "Error in ISC_Pin_Behavior Definition"
+msgstr "Chyba: Neplatná dĺžka záznamu!\n"
+
+#: bsdl_bison.y:586
+#, fuzzy
+msgid "Error in ISC_Fixed_System_Pins Definition"
+msgstr "Chyba: Neplatná dĺžka záznamu!\n"
+
+#: bsdl_bison.y:613
+#, fuzzy
+msgid "Error in ISC_Security Definition"
+msgstr "Chyba: Neplatná dĺžka záznamu!\n"
+
+#: bsdl_bison.y:647
+#, fuzzy
+msgid "Error in ISC_Flow Definition"
+msgstr "Chyba: Neplatná dĺžka záznamu!\n"
+
+#: bsdl_bison.y:811
+#, fuzzy
+msgid "Error in ISC_Procedure Definition"
+msgstr "Chyba: Neplatná dĺžka záznamu!\n"
+
+#: bsdl_bison.y:835
+#, fuzzy
+msgid "Error in ISC_Action Definition"
+msgstr "Chyba: Neplatná dĺžka záznamu!\n"
+
+#: bsdl_bison.y:875 bsdl_bison.y:883 vhdl_bison.y:657
+#, c-format
+msgid "Line %d, %s.\n"
+msgstr ""
+
+#: bsdl_bison.y:1114 bsdl_bison.y:1182 bsdl_bison.y:1241 bsdl_bison.y:1276
+#: bsdl_bison.y:1314 bsdl_bison.y:1464 bsdl_bison.y:1514 bsdl_flex.l:443
+#: bsdl_flex.l:529 src/bsdl/bsdl_sem.c:169 src/bsdl/bsdl_sem.c:545
+#: vhdl_bison.y:821 vhdl_bison.y:922 vhdl_bison.y:1010 vhdl_bison.y:1042
+#: vhdl_bison.y:1062 vhdl_bison.y:1092 vhdl_bison.y:1109 vhdl_bison.y:1127
+#: vhdl_flex.l:373 vhdl_flex.l:460 svf_flex.l:369
+#, fuzzy, c-format
+msgid "Out of memory, %s line %i\n"
+msgstr "Nedostatok pamäte\n"
+
+#: src/bsdl/bsdl.c:138
+#, fuzzy
+msgid "No JTAG chain available\n"
+msgstr "(popis je nedostupný)"
+
+#: src/bsdl/bsdl.c:143
+msgid "Chain without any parts\n"
+msgstr ""
+
+#: src/bsdl/bsdl.c:160
+#, c-format
+msgid "Reading file '%s'\n"
+msgstr ""
+
+#: src/bsdl/bsdl.c:164
+#, fuzzy, c-format
+msgid "Unable to open BSDL file '%s'\n"
+msgstr "Nepodarilo sa otvoriť súbor `%s'!\n"
+
+#: src/bsdl/bsdl.c:178
+#, c-format
+msgid "BSDL file '%s' passed VHDL stage correctly\n"
+msgstr ""
+
+#: src/bsdl/bsdl.c:185
+#, c-format
+msgid "BSDL file '%s' passed BSDL stage correctly\n"
+msgstr ""
+
+#: src/bsdl/bsdl.c:192
+#, c-format
+msgid "BSDL file '%s' contains errors in VHDL stage, stopping\n"
+msgstr ""
+
+#: src/bsdl/bsdl.c:326 src/tap/detect.c:364
+#, c-format
+msgid " Filename: %s\n"
+msgstr " Súbor: %s\n"
+
+#: src/bsdl/bsdl.c:338
+#, fuzzy, c-format
+msgid "Cannot open directory %s\n"
+msgstr "Nepodarilo sa otvoriť %s\n"
+
+#: bsdl_flex.l:405 vhdl_flex.l:333
+#, c-format
+msgid "Illegal character %c (/%03o) at line %d:\n"
+msgstr ""
+
+#: bsdl_flex.l:437 vhdl_flex.l:365
+msgid "Scanner could not be initialized\n"
+msgstr ""
+
+#: src/bsdl/bsdl_sem.c:238
+msgid "No IDCODE specification found.\n"
+msgstr ""
+
+#: src/bsdl/bsdl_sem.c:640
+msgid "IDCODE matched\n"
+msgstr ""
+
+#: src/bsdl/bsdl_sem.c:643
+msgid "IDCODE mismatch\n"
+msgstr ""
+
+#: src/bsdl/bsdl_sem.c:690
+msgid "BSDL stage reported errors, aborting.\n"
+msgstr ""
+
+#: src/bsdl/bsdl_sem.c:698
+#, c-format
+msgid "Got IDCODE: %s\n"
+msgstr ""
+
+#: vhdl_bison.y:219
+msgid "Improper Entity declaration"
+msgstr ""
+
+#: vhdl_bison.y:220
+msgid "Check if source file is BSDL"
+msgstr ""
+
+#: vhdl_bison.y:230 vhdl_bison.y:238
+#, fuzzy
+msgid "Syntax Error"
+msgstr "Chyba syntaxe!\n"
+
+#: vhdl_bison.y:248
+msgid "Improper Port declaration"
+msgstr ""
+
+#: vhdl_bison.y:280
+#, fuzzy
+msgid "Error in Package declaration(s)"
+msgstr "Chyba: Neplatná dĺžka záznamu!\n"
+
+#: vhdl_bison.y:305
+#, fuzzy
+msgid "Error in Standard Package"
+msgstr "Chyba: Neplatná dĺžka záznamu!\n"
+
+#: vhdl_bison.y:323
+#, fuzzy
+msgid "Error in Standard Declarations"
+msgstr "Chyba: Neplatná dĺžka záznamu!\n"
+
+#: vhdl_bison.y:334
+#, fuzzy
+msgid "Error in Attribute type identification"
+msgstr "Chyba: Neplatná dĺžka záznamu!\n"
+
+#: vhdl_bison.y:350
+#, fuzzy
+msgid "Error in Type definition"
+msgstr "Chyba: Neplatná dĺžka záznamu!\n"
+
+#: vhdl_bison.y:366
+#, fuzzy
+msgid "Error in Bit definition"
+msgstr "Chyba: Neplatná dĺžka záznamu!\n"
+
+#: vhdl_bison.y:377
+#, fuzzy
+msgid "Error in Record Definition"
+msgstr "Chyba: Neplatná dĺžka záznamu!\n"
+
+#: vhdl_bison.y:390
+#, fuzzy
+msgid "Error in defered constant"
+msgstr "Chyba: Neplatná dĺžka záznamu!\n"
+
+#: vhdl_bison.y:402
+#, fuzzy
+msgid "Error in Package Body definition"
+msgstr "Chyba: Neplatná dĺžka záznamu!\n"
+
+#: vhdl_bison.y:414
+#, fuzzy
+msgid "Error in Cell Constant definition"
+msgstr "Chyba: Neplatná dĺžka záznamu!\n"
+
+#: vhdl_bison.y:425
+#, fuzzy
+msgid "Error in Cell Data Record"
+msgstr "Chyba: Pripojenie kábla zlyhalo!\n"
+
+#: vhdl_bison.y:434
+#, fuzzy
+msgid "Error in Cell_Type Function field"
+msgstr "Chyba: Pripojenie kábla zlyhalo!\n"
+
+#: vhdl_bison.y:441
+#, fuzzy
+msgid "Error in BScan_Inst Instruction field"
+msgstr "Chyba: Pripojenie kábla zlyhalo!\n"
+
+#: vhdl_bison.y:448
+#, fuzzy
+msgid "Error in Constant CAP data source field"
+msgstr "Chyba: Neplatná dĺžka záznamu!\n"
+
+#: vhdl_bison.y:472
+#, fuzzy
+msgid "Error in User-Defined Package declarations"
+msgstr "Chyba: Neplatná dĺžka záznamu!\n"
+
+#: vhdl_bison.y:479
+msgid "Unknown VHDL statement"
+msgstr ""
+
+#: vhdl_bison.y:502
+#, fuzzy
+msgid "Error in Attribute specification"
+msgstr "Chyba: Neplatná dĺžka záznamu!\n"
+
+#: vhdl_bison.y:651
+#, c-format
+msgid "In Package %s, Line %d, %s.\n"
+msgstr ""
+
+#: vhdl_bison.y:664
+msgid "Too many errors"
+msgstr ""
+
+#: vhdl_flex.l:518
+#, fuzzy, c-format
+msgid "Cannot open file %s or %s.\n"
+msgstr "Nepodarilo sa otvoriť %s\n"
+
+#: src/bus/au1500.c:126
+#, fuzzy, c-format
+msgid "AU1500 compatible bus driver via BSR (JTAG part No. %d)\n"
+msgstr ""
+"Intel SA-1110 kompatibilný ovládač zbernice cez BSR (JTAG súčiastka č. %d)\n"
+
+#: src/bus/au1500.c:297
+msgid "AU1500 BUS Driver via BSR"
+msgstr ""
+
+#: src/bus/avr32.c:127
+#, c-format
+msgid "%s(%d): error, "
+msgstr ""
+
+#: src/bus/avr32.c:150
+#, fuzzy, c-format
+msgid "%s: instr=%s\n"
+msgstr "%-13s %s\n"
+
+#: src/bus/avr32.c:153
+#, fuzzy, c-format
+msgid "%s: ret=%s\n"
+msgstr "%-13s %s\n"
+
+#: src/bus/avr32.c:166
+#, fuzzy, c-format
+msgid "%s: data=%s\n"
+msgstr "%-13s %s\n"
+
+#: src/bus/avr32.c:169
+#, c-format
+msgid "%s: data out=%s\n"
+msgstr ""
+
+#: src/bus/avr32.c:190
+#, c-format
+msgid "%s: slave=%01x, addr=%08x, %s\n"
+msgstr ""
+
+#: src/bus/avr32.c:215 src/bus/avr32.c:240 src/bus/avr32.c:311
+#: src/bus/avr32.c:322
+#, c-format
+msgid "%s: data=%08x\n"
+msgstr ""
+
+#: src/bus/avr32.c:282
+#, c-format
+msgid "%s: addr=%08x, mode=%s\n"
+msgstr ""
+
+#: src/bus/avr32.c:370
+#, fuzzy, c-format
+msgid "%s: read status %08x\n"
+msgstr "%s: Neplatný stav: %2X\n"
+
+#: src/bus/avr32.c:401
+#, c-format
+msgid "%s: status=%08x\n"
+msgstr ""
+
+#: src/bus/avr32.c:569
+#, fuzzy, c-format
+msgid "AVR32 multi-mode bus driver (JTAG part No. %d)\n"
+msgstr ""
+"Intel SA-1110 kompatibilný ovládač zbernice cez BSR (JTAG súčiastka č. %d)\n"
+
+#: src/bus/avr32.c:651
+#, fuzzy, c-format
+msgid "%s:addr=%08x\n"
+msgstr "adresa: 0x%08X"
+
+#: src/bus/avr32.c:760
+msgid ""
+"Atmel AVR32 multi-mode bus driver, requires <mode> parameter\n"
+" valid <mode> parameters:\n"
+" x8: 8 bit bus for the uncached HSB area, via OCD registers\n"
+" x16: 16 bit bus for the uncached HSB area, via OCD "
+"registers\n"
+" x32: 32 bit bus for the uncached HSB area, via OCD "
+"registers\n"
+" OCD : 32 bit bus for the OCD registers\n"
+" HSBC: 32 bit bus for the cached HSB area, via SAB\n"
+" HSBU: 32 bit bus for the uncached HSB area, via SAB"
+msgstr ""
+
+#: src/bus/bcm1250.c:120
+#, c-format
+msgid "Broadcom BCM1250 compatible bus driver via BSR (JTAG part No. %d)\n"
+msgstr ""
+"Broadcom BCM1250 kompatibilný ovládač zbernice cez BSR (JTAG súčiastka č. %"
+"d)\n"
+
+#: src/bus/bcm1250.c:488
+msgid "Broadcom BCM1250 compatible bus driver via BSR"
+msgstr "Broadcom BCM1250 kompatibilný ovládač zbernice cez BSR"
+
+#: src/bus/bf533_ezkit.c:143
+#, fuzzy, c-format
+msgid "Blackfin BF533 EZKit compatible bus driver via BSR (JTAG part No. %d)\n"
+msgstr ""
+"Broadcom BCM1250 kompatibilný ovládač zbernice cez BSR (JTAG súčiastka č. %"
+"d)\n"
+
+#: src/bus/bf533_ezkit.c:324
+msgid "Blackfin BF533 EZKit board bus driver"
+msgstr ""
+
+#: src/bus/bf533_stamp.c:144
+#, fuzzy, c-format
+msgid "Blackfin BF533 compatible bus driver via BSR (JTAG part No. %d)\n"
+msgstr ""
+"Broadcom BCM1250 kompatibilný ovládač zbernice cez BSR (JTAG súčiastka č. %"
+"d)\n"
+
+#: src/bus/bf533_stamp.c:325
+msgid "Blackfin BF533 Stamp board bus driver"
+msgstr ""
+
+#: src/bus/bf537_stamp.c:317 src/bus/pxa2x0.c:242
+#, fuzzy, c-format
+msgid "%s (JTAG part No. %d)\n"
+msgstr ""
+"Intel SA-1110 kompatibilný ovládač zbernice cez BSR (JTAG súčiastka č. %d)\n"
+
+#: src/bus/bf537_stamp.c:337
+#, fuzzy
+msgid "Blackfin BF537 Stamp board bus driver via BSR"
+msgstr ""
+"Broadcom BCM1250 kompatibilný ovládač zbernice cez BSR (JTAG súčiastka č. %"
+"d)\n"
+
+#: src/bus/bf537_stamp.c:347
+#, fuzzy
+msgid "Blackfin BF537 EZ-KIT board bus driver via BSR"
+msgstr ""
+"Broadcom BCM1250 kompatibilný ovládač zbernice cez BSR (JTAG súčiastka č. %"
+"d)\n"
+
+#: src/bus/bf537_stamp.c:357
+#, fuzzy
+msgid "Blackfin BF527 EZ-KIT board bus driver via BSR"
+msgstr ""
+"Broadcom BCM1250 kompatibilný ovládač zbernice cez BSR (JTAG súčiastka č. %"
+"d)\n"
+
+#: src/bus/bf537_stamp.c:367
+#, fuzzy
+msgid "Blackfin BF538F EZ-KIT board bus driver"
+msgstr ""
+"Broadcom BCM1250 kompatibilný ovládač zbernice cez BSR (JTAG súčiastka č. %"
+"d)\n"
+
+#: src/bus/bf537_stamp.c:377
+#, fuzzy
+msgid "Blackfin BF526 EZ-KIT board bus driver"
+msgstr ""
+"Broadcom BCM1250 kompatibilný ovládač zbernice cez BSR (JTAG súčiastka č. %"
+"d)\n"
+
+#: src/bus/bf548_ezkit.c:142
+#, fuzzy, c-format
+msgid ""
+"Blackfin BF548 EZ-KIT compatible bus driver via BSR (JTAG part No. %d)\n"
+msgstr ""
+"Broadcom BCM1250 kompatibilný ovládač zbernice cez BSR (JTAG súčiastka č. %"
+"d)\n"
+
+#: src/bus/bf548_ezkit.c:313
+msgid "Blackfin BF548 EZ-KIT board bus driver"
+msgstr ""
+
+#: src/bus/bf561_ezkit.c:147
+#, fuzzy, c-format
+msgid ""
+"Blackfin BF561 EZ-KIT compatible bus driver via BSR (JTAG part No. %d)\n"
+msgstr ""
+"Hitachi SH7751R kompatibilný ovládač zbernice cez BSR (JTAG súčiastka č. %"
+"d)\n"
+
+#: src/bus/bf561_ezkit.c:336
+msgid "Blackfin BF561 EZ-KIT board bus driver"
+msgstr ""
+
+#: src/bus/bscoach.c:146
+#, fuzzy, c-format
+msgid ""
+"Goepel electronic Boundary Scan Coach compatible bus driver via BSR (JTAG "
+"part No. %d)\n"
+msgstr ""
+"Hitachi SH7727 kompatibilný ovládač zbernice cez BSR (JTAG súčiastka č. %d)\n"
+
+#: src/bus/bscoach.c:382
+msgid ""
+"Goepel Boundary Scan Coach compatible bus driver for flash programming via "
+"BSR"
+msgstr ""
+
+#: src/bus/buses.c:167 src/cmd/include.c:74 src/cmd/parse.c:59
+#: src/cmd/parse.c:93 src/cmd/scan.c:88 src/cmd/shell.c:62 src/jtag.c:407
+#: src/jtag.c:426 src/jtag.c:450 src/tap/detect.c:271
+#: src/tap/usbconn/libusb.c:150 src/tap/usbconn/libftd2xx.c:283
+#: src/tap/usbconn/libftdi.c:252
+#, c-format
+msgid "Out of memory\n"
+msgstr "Nedostatok pamäte\n"
+
+#: src/bus/ejtag.c:149
+#, fuzzy, c-format
+msgid "EJTAG compatible bus driver via PrAcc (JTAG part No. %d)\n"
+msgstr ""
+"Intel SA-1110 kompatibilný ovládač zbernice cez BSR (JTAG súčiastka č. %d)\n"
+
+#: src/bus/ejtag.c:176
+#, c-format
+msgid "%s(%d) EJADDRESS, EJDATA or EJCONTROL register not found\n"
+msgstr ""
+
+#: src/bus/ejtag.c:195
+#, c-format
+msgid "%s(%d) Reset occurred, ctrl=%s\n"
+msgstr ""
+
+#: src/bus/ejtag.c:202
+#, c-format
+msgid "%s(%d) No processor access, ctrl=%s\n"
+msgstr ""
+
+#: src/bus/ejtag.c:215
+#, c-format
+msgid "%s(%d) PrAcc bad alignment: addr=0x%08x\n"
+msgstr ""
+
+#: src/bus/ejtag.c:229
+#, c-format
+msgid "%s(%d) PrAcc write: addr=0x%08x data=0x%08x\n"
+msgstr ""
+
+#: src/bus/ejtag.c:236
+#, c-format
+msgid "%s(%d) Unknown write addr=0x%08x data=0x%08x\n"
+msgstr ""
+
+#: src/bus/ejtag.c:291
+#, c-format
+msgid "%s(%d) EJCONTROL or EJIMPCODE register not found\n"
+msgstr ""
+
+#: src/bus/ejtag.c:481
+#, c-format
+msgid "%s(%d) Failed to enter debug mode, ctrl=%s\n"
+msgstr ""
+
+#: src/bus/ejtag.c:677
+#, fuzzy
+msgid "EJTAG compatible bus driver via PrAcc"
+msgstr "Intel PXA2x0 kompatibilný ovládač zbernice cez BSR"
+
+#: src/bus/fjmem.c:91 src/bus/fjmem.c:106 src/bus/fjmem.c:187
+#: src/bus/fjmem.c:193 src/bus/fjmem.c:295 src/cmd/instruction.c:95
+#: src/cmd/register.c:71 src/cmd/register.c:85 src/cmd/salias.c:72
+#: src/cmd/signal.c:88 src/tap/detect.c:212 src/tap/detect.c:235
+#: src/tap/tap.c:53
+#, c-format
+msgid "out of memory\n"
+msgstr "nedostatok pamäte\n"
+
+#: src/bus/fjmem.c:101 src/cmd/instruction.c:84
+#, c-format
+msgid "invalid instruction length\n"
+msgstr "neplatná dĺžka inštrukcie\n"
+
+#: src/bus/fjmem.c:367
+#, c-format
+msgid "Wrong parameter specification: %s\n"
+msgstr ""
+
+#: src/bus/fjmem.c:424
+#, c-format
+msgid "Parameter for instruction opcode missing.\n"
+msgstr ""
+
+#: src/bus/fjmem.c:473
+#, fuzzy, c-format
+msgid "fjmem FPGA bus driver via USER register (JTAG part No. %d)\n"
+msgstr ""
+"Intel SA-1110 kompatibilný ovládač zbernice cez BSR (JTAG súčiastka č. %d)\n"
+
+#: src/bus/fjmem.c:595 src/bus/fjmem.c:627 src/bus/fjmem.c:661
+#: src/bus/fjmem.c:696 src/bus/jopcyc.c:549 src/bus/jopcyc.c:584
+#: src/bus/jopcyc.c:615 src/bus/jopcyc.c:647 src/bus/zefant-xs3.c:692
+#: src/bus/zefant-xs3.c:759 src/bus/zefant-xs3.c:807 src/bus/zefant-xs3.c:859
+#, c-format
+msgid "Address out of range\n"
+msgstr ""
+
+#: src/bus/fjmem.c:713
+msgid ""
+"FPGA JTAG memory bus driver via USER register, requires parameters:\n"
+" opcode=<USERx OPCODE> [len=<FJMEM REG LEN>]"
+msgstr ""
+
+#: src/bus/generic_bus.c:40 src/cmd/get.c:63 src/cmd/set.c:77
+#: src/cmd/test.c:65
+#, c-format
+msgid "signal '%s' not found\n"
+msgstr "signál '%s' nenájdený\n"
+
+#: src/bus/ixp425.c:121
+#, c-format
+msgid "Intel IXP425 compatible bus driver via BSR (JTAG part No. %d)\n"
+msgstr ""
+"Intel IXP425 kompatibilný ovládač zbernice cez BSR (JTAG súčiastka č. %d)\n"
+
+#: src/bus/ixp425.c:291
+msgid "Intel IXP425 compatible bus driver via BSR"
+msgstr "Intel IXP425 kompatibilný ovládač zbernice cez BSR"
+
+#: src/bus/jopcyc.c:349
+#, fuzzy, c-format
+msgid ""
+"JOP.design Cyclone Board compatible bus driver via BSR (JTAG part No. %d)\n"
+msgstr ""
+"Broadcom BCM1250 kompatibilný ovládač zbernice cez BSR (JTAG súčiastka č. %"
+"d)\n"
+
+#: src/bus/jopcyc.c:677
+#, fuzzy
+msgid "JOP.design Cyclone Board compatible bus driver via BSR"
+msgstr "Broadcom BCM1250 kompatibilný ovládač zbernice cez BSR"
+
+#: src/bus/lh7a400.c:142
+#, fuzzy, c-format
+msgid "Sharp LH7A400 compatible bus driver via BSR (JTAG part No. %d)\n"
+msgstr ""
+"Hitachi SH7750R kompatibilný ovládač zbernice cez BSR (JTAG súčiastka č. %"
+"d)\n"
+
+#: src/bus/lh7a400.c:320
+#, fuzzy
+msgid "Sharp LH7A400 compatible bus driver via BSR (flash access only!)"
+msgstr ""
+"Hitachi SH7750R kompatibilný ovládač zbernice cez BSR (JTAG súčiastka č. %"
+"d)\n"
+
+#: src/bus/mpc5200.c:147
+#, fuzzy, c-format
+msgid "Freescale MPC5200 compatible bus driver via BSR (JTAG part No. %d)\n"
+msgstr ""
+"Intel PXA2x0 kompatibilný ovládač zbernice cez BSR (JTAG súčiastka č. %d)\n"
+
+#: src/bus/mpc5200.c:161
+msgid "LocalPlus Bus"
+msgstr ""
+
+#: src/bus/mpc5200.c:376
+#, fuzzy
+msgid "Freescale MPC5200 compatible bus driver via BSR, parameter: [mux]"
+msgstr "Intel PXA2x0 kompatibilný ovládač zbernice cez BSR"
+
+#: src/bus/mpc824x.c:107
+#, c-format
+msgid ""
+" Bus width 64 exists in mpc824x, but not supported by UrJTAG currently\n"
+msgstr ""
+
+#: src/bus/mpc824x.c:111
+#, c-format
+msgid " Only 8,32 and 64 bus width are supported for Banks 0 and 1\n"
+msgstr ""
+
+#: src/bus/mpc824x.c:120
+#, c-format
+msgid ""
+"Usage: initbus mpc824x [width=WIDTH] [revbits] [dbgAddr] [dbgData]\n"
+"\n"
+" WIDTH data bus width - 8, 32, 64 (default 8)\n"
+" revbits reverse bits in data bus (default - no)\n"
+" dbgAddr display address bus state (default - no)\n"
+" dbgData display data bus state (default - no)\n"
+msgstr ""
+
+#: src/bus/mpc824x.c:140
+#, c-format
+msgid " Using default bus width %d\n"
+msgstr ""
+
+#: src/bus/mpc824x.c:235
+#, fuzzy, c-format
+msgid "Motorola MPC824x compatible bus driver via BSR (JTAG part No. %d)\n"
+msgstr ""
+"Intel PXA2x0 kompatibilný ovládač zbernice cez BSR (JTAG súčiastka č. %d)\n"
+
+#: src/bus/mpc824x.c:256
+msgid "Base ROM Interface (Bank 1)"
+msgstr ""
+
+#: src/bus/mpc824x.c:265 src/bus/mpc824x.c:283
+msgid "Base ROM Interface (Bank 0)"
+msgstr ""
+
+#: src/bus/mpc824x.c:311
+#, c-format
+msgid "Warning: unhandled bus width: %i\n"
+msgstr ""
+
+#: src/bus/mpc824x.c:325
+#, c-format
+msgid "Addr [%2d:0]: %06X "
+msgstr ""
+
+#: src/bus/mpc824x.c:370
+#, c-format
+msgid "Data WR [%d:0]: %08X "
+msgstr ""
+
+#: src/bus/mpc824x.c:407
+#, c-format
+msgid "Data RD [%d:0]: %08X "
+msgstr ""
+
+#: src/bus/mpc824x.c:519
+#, fuzzy
+msgid "Motorola MPC824x compatible bus driver via BSR"
+msgstr "Intel PXA2x0 kompatibilný ovládač zbernice cez BSR"
+
+#: src/bus/ppc405ep.c:116
+#, fuzzy, c-format
+msgid "IBM PowerPC 405EP compatible bus driver via BSR (JTAG part No. %d)\n"
+msgstr ""
+"Intel IXP425 kompatibilný ovládač zbernice cez BSR (JTAG súčiastka č. %d)\n"
+
+#: src/bus/ppc405ep.c:267
+#, fuzzy
+msgid "IBM PowerPC 405EP compatible bus driver via BSR"
+msgstr "Intel IXP425 kompatibilný ovládač zbernice cez BSR"
+
+#: src/bus/ppc440gx_ebc8.c:118
+#, fuzzy, c-format
+msgid ""
+"IBM PowerPC 440GX 8-bit compatible bus driver via BSR (JTAG part No. %d)\n"
+msgstr ""
+"Intel IXP425 kompatibilný ovládač zbernice cez BSR (JTAG súčiastka č. %d)\n"
+
+#: src/bus/ppc440gx_ebc8.c:269
+#, fuzzy
+msgid "IBM PowerPC 440GX 8-bit EBC compatible bus driver via BSR"
+msgstr "Intel IXP425 kompatibilný ovládač zbernice cez BSR"
+
+#: src/bus/prototype.c:129
+#, c-format
+msgid "value %s not defined for parameter %s\n"
+msgstr ""
+
+#: src/bus/prototype.c:138
+#, fuzzy, c-format
+msgid "signal '%s' is not found\n"
+msgstr "signál '%s' nenájdený\n"
+
+#: src/bus/prototype.c:166
+#, c-format
+msgid "parameter %s is unknown\n"
+msgstr ""
+
+#: src/bus/prototype.c:195
+#, c-format
+msgid "parameters alsb=<signal> and/or amsb=<signal> are not defined\n"
+msgstr ""
+
+#: src/bus/prototype.c:243
+#, c-format
+msgid "parameters dlsb=<signal> and/or dmsb=<signal> are not defined\n"
+msgstr ""
+
+#: src/bus/prototype.c:248
+#, c-format
+msgid "parameter cs=<signal> or ncs=<signal> is not defined\n"
+msgstr ""
+
+#: src/bus/prototype.c:253
+#, c-format
+msgid "parameter oe=<signal> or noe=<signal> is not defined\n"
+msgstr ""
+
+#: src/bus/prototype.c:258
+#, c-format
+msgid "parameter we=<signal> or nwe=<signal> is not defined\n"
+msgstr ""
+
+#: src/bus/prototype.c:283
+#, fuzzy, c-format
+msgid "Configurable prototype bus driver via BSR (JTAG part No. %d)\n"
+msgstr ""
+"Intel SA-1110 kompatibilný ovládač zbernice cez BSR (JTAG súčiastka č. %d)\n"
+
+#: src/bus/prototype.c:436
+msgid ""
+"Configurable prototype bus driver via BSR, requires parameters:\n"
+" amsb=<addr MSB> alsb=<addr LSB> dmsb=<data MSB> dlsb=<data LSB>\n"
+" ncs=<CS#>|cs=<CS> noe=<OE#>|oe=<OE> nwe=<WE#>|we=<WE> [amode=auto|"
+"x8|x16|x32]"
+msgstr ""
+
+#: src/bus/pxa2x0.c:302 src/bus/pxa2x0.c:392
+msgid "Static Chip Select 0"
+msgstr "Statický výber čipu 0"
+
+#: src/bus/pxa2x0.c:364
+msgid "Memory Mapped registers (Memory Ctl)"
+msgstr "Pamäťovo mapované registre (Memory Ctl)"
+
+#: src/bus/pxa2x0.c:457
+msgid "PXA270 internal address space (cfg, SRAM)"
+msgstr ""
+
+#: src/bus/pxa2x0.c:475
+msgid "PXA270 SDRAM space (4x 64MB)"
+msgstr ""
+
+#: src/bus/pxa2x0.c:702
+msgid "Intel PXA2x0 compatible bus driver via BSR"
+msgstr "Intel PXA2x0 kompatibilný ovládač zbernice cez BSR"
+
+#: src/bus/pxa2x0.c:718
+#, fuzzy
+msgid "Intel PXA27x compatible bus driver via BSR"
+msgstr "Intel PXA2x0 kompatibilný ovládač zbernice cez BSR"
+
+#: src/bus/readmem.c:55 src/bus/writemem.c:49 src/flash/detectflash.c:56
+#, c-format
+msgid "Error: Missing bus driver!\n"
+msgstr "Chyba: Chýba ovládač zbernice!\n"
+
+#: src/bus/readmem.c:62 src/bus/writemem.c:56
+#, c-format
+msgid "Error: Bus width detection failed\n"
+msgstr "Chyba: Detekcia šírky zbernice zlyhala\n"
+
+#: src/bus/readmem.c:68 src/bus/writemem.c:62
+#, c-format
+msgid "Unknown bus width!\n"
+msgstr "Neznáma šírka zbernice!\n"
+
+#: src/bus/readmem.c:75 src/bus/writemem.c:69
+#, c-format
+msgid "address: 0x%08X\n"
+msgstr "adresa: 0x%08X\n"
+
+#: src/bus/readmem.c:76 src/bus/writemem.c:70
+#, c-format
+msgid "length: 0x%08X\n"
+msgstr "dĺžka: 0x%08X\n"
+
+#: src/bus/readmem.c:79 src/bus/writemem.c:73
+#, c-format
+msgid "length is 0.\n"
+msgstr "dĺžka je 0.\n"
+
+#: src/bus/readmem.c:85
+#, c-format
+msgid "reading:\n"
+msgstr "čítam:\n"
+
+#: src/bus/readmem.c:105 src/bus/writemem.c:87 src/flash/flash.c:160
+#: src/flash/flash.c:205 src/flash/flash.c:308 src/flash/flash.c:358
+#, c-format
+msgid "addr: 0x%08X"
+msgstr "adresa: 0x%08X"
+
+#: src/bus/readmem.c:113 src/bus/writemem.c:122 src/flash/flash.c:220
+#, c-format
+msgid ""
+"\n"
+"Done.\n"
+msgstr ""
+"\n"
+"Hotovo.\n"
+
+#: src/bus/s3c4510x.c:182
+#, fuzzy, c-format
+msgid ""
+"Samsung S3C4510B compatibile bus driver via BSR (JTAG part No. %d) RCS0=%"
+"ubit\n"
+msgstr ""
+"Samsung S3C4510B kompatibilný ovládač zbernice cez BSR (JTAG súčiastka č. %"
+"d)\n"
+
+#: src/bus/s3c4510x.c:414
+msgid "Samsung S3C4510B compatible bus driver via BSR"
+msgstr "Samsung S3C4510B kompatibilný ovládač zbernice cez BSR"
+
+#: src/bus/sa1110.c:128
+#, c-format
+msgid "Intel SA-1110 compatible bus driver via BSR (JTAG part No. %d)\n"
+msgstr ""
+"Intel SA-1110 kompatibilný ovládač zbernice cez BSR (JTAG súčiastka č. %d)\n"
+
+#: src/bus/sa1110.c:305
+msgid "Intel SA-1110 compatible bus driver via BSR"
+msgstr "Intel SA-1110 kompatibilný ovládač zbernice cez BSR"
+
+#: src/bus/sh7727.c:138
+#, c-format
+msgid "Hitachi SH7727 compatible bus driver via BSR (JTAG part No. %d)\n"
+msgstr ""
+"Hitachi SH7727 kompatibilný ovládač zbernice cez BSR (JTAG súčiastka č. %d)\n"
+
+#: src/bus/sh7727.c:165
+#, c-format
+msgid "Error: Invalid bus width (MD3 = MD4 = 0)!\n"
+msgstr "Chyba: Neplatná šírka zbernice (MD3 = MD4 = 0)!\n"
+
+#: src/bus/sh7727.c:346
+msgid "Hitachi SH7727 compatible bus driver via BSR"
+msgstr "Hitachi SH7727 kompatibilný ovládač zbernice cez BSR"
+
+#: src/bus/sh7750r.c:136
+#, c-format
+msgid "Hitachi SH7750R compatible bus driver via BSR (JTAG part No. %d)\n"
+msgstr ""
+"Hitachi SH7750R kompatibilný ovládač zbernice cez BSR (JTAG súčiastka č. %"
+"d)\n"
+
+#: src/bus/sh7750r.c:328
+msgid "Hitachi SH7750R compatible bus driver via BSR"
+msgstr "Hitachi SH7750R kompatibilný ovládač zbernice cez BSR"
+
+#: src/bus/sh7751r.c:130
+#, c-format
+msgid "Hitachi SH7751R compatible bus driver via BSR (JTAG part No. %d)\n"
+msgstr ""
+"Hitachi SH7751R kompatibilný ovládač zbernice cez BSR (JTAG súčiastka č. %"
+"d)\n"
+
+#: src/bus/sh7751r.c:316
+msgid "Hitachi SH7751R compatible bus driver via BSR"
+msgstr "Hitachi SH7751R kompatibilný ovládač zbernice cez BSR"
+
+#: src/bus/sharc21065l.c:123
+#, fuzzy, c-format
+msgid ""
+"Analog Device's SHARC 21065L compatible bus driver via BSR (JTAG part No. %"
+"d)\n"
+msgstr ""
+"Intel SA-1110 kompatibilný ovládač zbernice cez BSR (JTAG súčiastka č. %d)\n"
+
+#: src/bus/sharc21065l.c:135
+msgid "Boot Memory Select"
+msgstr ""
+
+#: src/bus/sharc21065l.c:309
+#, fuzzy
+msgid "SHARC_21065L compatible bus driver via BSR"
+msgstr "Intel SA-1110 kompatibilný ovládač zbernice cez BSR"
+
+#: src/bus/slsup3.c:167
+#, fuzzy, c-format
+msgid "SLS UP3 bus driver via BSR (JTAG part No. %d)\n"
+msgstr ""
+"Intel SA-1110 kompatibilný ovládač zbernice cez BSR (JTAG súčiastka č. %d)\n"
+
+#: src/bus/slsup3.c:178
+msgid "Flash Memory (2 MByte) byte mode"
+msgstr ""
+
+#: src/bus/slsup3.c:187
+msgid "SRAM 128KByte (64K x 16)"
+msgstr ""
+
+#: src/bus/slsup3.c:196
+msgid "LCD Display (RS select by A0)"
+msgstr ""
+
+#: src/bus/slsup3.c:423
+#, fuzzy
+msgid "SLS UP3 compatible bus driver via BSR"
+msgstr "Intel IXP425 kompatibilný ovládač zbernice cez BSR"
+
+#: src/bus/tx4925.c:140
+#, fuzzy, c-format
+msgid "Toshiba TX4925 compatible bus driver via BSR (JTAG part No. %d)\n"
+msgstr ""
+"Intel IXP425 kompatibilný ovládač zbernice cez BSR (JTAG súčiastka č. %d)\n"
+
+#: src/bus/tx4925.c:311
+#, fuzzy
+msgid "Toshiba TX4925 compatible bus driver via BSR"
+msgstr "Intel IXP425 kompatibilný ovládač zbernice cez BSR"
+
+#: src/bus/writemem.c:79
+#, fuzzy, c-format
+msgid "writing:\n"
+msgstr "čítam:\n"
+
+#: src/bus/writemem.c:91
+#, c-format
+msgid "Data not on word boundary, NOT SUPPORTED!"
+msgstr ""
+
+#: src/bus/writemem.c:93
+#, fuzzy, c-format
+msgid "Unexpected end of file!\n"
+msgstr "Chyba: neočakávaný koniec súboru\n"
+
+#: src/bus/writemem.c:94
+#, fuzzy, c-format
+msgid "Addr: 0x%08X\n"
+msgstr "adresa: 0x%08X\n"
+
+#: src/bus/writemem.c:99
+#, c-format
+msgid "Short read: bc=0x%X\n"
+msgstr ""
+
+#: src/bus/zefant-xs3.c:423
+#, fuzzy, c-format
+msgid ""
+"Simple Solutions Zefant-XS3 Board compatible bus driver via BSR (JTAG part "
+"No. %d)\n"
+msgstr ""
+"Hitachi SH7727 kompatibilný ovládač zbernice cez BSR (JTAG súčiastka č. %d)\n"
+
+#: src/bus/zefant-xs3.c:737 src/bus/zefant-xs3.c:783 src/bus/zefant-xs3.c:837
+#: src/bus/zefant-xs3.c:946
+#, fuzzy, c-format
+msgid "Component type not supported\n"
+msgstr "Nepodporovaná flash pamäť!\n"
+
+#: src/bus/zefant-xs3.c:953
+#, fuzzy
+msgid "Simple Solutions Zefant-XS3 Board compatible bus driver via BSR"
+msgstr "Samsung S3C4510B kompatibilný ovládač zbernice cez BSR"
+
+#: src/cmd/bit.c:61
+#, c-format
+msgid "%s: invalid number of parameters (%d) for command '%s'\n"
+msgstr ""
+
+#: src/cmd/bit.c:66
+#, c-format
+msgid "%s: cable test failed for command '%s'\n"
+msgstr ""
+
+#: src/cmd/bit.c:71 src/cmd/bus.c:46 src/cmd/dr.c:48 src/cmd/get.c:52
+#: src/cmd/initbus.c:46 src/cmd/instruction.c:44 src/cmd/part.c:59
+#: src/cmd/print.c:65 src/cmd/register.c:50 src/cmd/salias.c:49
+#: src/cmd/scan.c:50 src/cmd/set.c:53 src/cmd/signal.c:50 src/cmd/test.c:54
+#, c-format
+msgid "Run \"detect\" first.\n"
+msgstr "Spustite najskôr \"detect\".\n"
+
+#: src/cmd/bit.c:76 src/cmd/dr.c:53 src/cmd/get.c:57 src/cmd/initbus.c:51
+#: src/cmd/instruction.c:49 src/cmd/register.c:55 src/cmd/salias.c:54
+#: src/cmd/scan.c:55 src/cmd/set.c:58 src/cmd/signal.c:55 src/cmd/test.c:59
+#, c-format
+msgid "%s: no active part\n"
+msgstr "%s: nie je aktívna súčiastka\n"
+
+#: src/cmd/bit.c:83
+#, fuzzy, c-format
+msgid "%s: missing Boundary Scan Register (BSR) for command '%s'\n"
+msgstr "chýbajúci Boundary Scan Register (BSR)\n"
+
+#: src/cmd/bit.c:89
+#, c-format
+msgid "%s: unable to get boundary bit number for command '%s'\n"
+msgstr ""
+
+#: src/cmd/bit.c:94
+#, fuzzy, c-format
+msgid "%s: invalid boundary bit number for command '%s'\n"
+msgstr "neplatné číslo hraničného bitu\n"
+
+#: src/cmd/bit.c:98
+#, fuzzy, c-format
+msgid "%s: duplicate bit declaration for command '%s'\n"
+msgstr "duplikátna deklarácia bitu\n"
+
+#: src/cmd/bit.c:104
+#, c-format
+msgid "%s: invalid bit type length for command '%s'\n"
+msgstr ""
+
+#: src/cmd/bit.c:129
+#, fuzzy, c-format
+msgid "%s: invalid bit type for command '%s'\n"
+msgstr "flash: neplatná sekvencia príkazov\n"
+
+#: src/cmd/bit.c:135
+#, c-format
+msgid "%s: invalid default value length for command '%s'\n"
+msgstr ""
+
+#: src/cmd/bit.c:145
+#, c-format
+msgid "%s: out of memory for command '%s'\n"
+msgstr ""
+
+#: src/cmd/bit.c:155
+#, c-format
+msgid "%s: unable to get control bit number for command '%s'\n"
+msgstr ""
+
+#: src/cmd/bit.c:159
+#, fuzzy, c-format
+msgid "%s: invalid control bit number for command '%s'\n"
+msgstr "neplatné číslo riadiaceho bitu\n"
+
+#: src/cmd/bit.c:166
+#, c-format
+msgid "%s: invalid control value length for command '%s'\n"
+msgstr ""
+
+#: src/cmd/bit.c:184
+#, c-format
+msgid ""
+"Usage: %s NUMBER TYPE DEFAULT SIGNAL [CBIT CVAL CSTATE]\n"
+"Define new BSR (Boundary Scan Register) bit for SIGNAL, with\n"
+"DEFAULT value.\n"
+"\n"
+"NUMBER Bit number in the BSR\n"
+"TYPE Bit type, valid values are I, O, B, C, and X\n"
+"DEFAULT Default (safe) bit value, valid values are 1, 0, ?\n"
+"SIGNAL Associated signal name\n"
+"CBIT Control bit number\n"
+"CVAL Control value\n"
+"CSTATE Control state, valid state is only Z\n"
+msgstr ""
+"Použitie: %s ČÍSLO TYP PREDVOLENÉ SIGNÁL [RBIT RHOD RSTAV]\n"
+"Definuje nový BSR (Boundary Scan Register) bit pre SIGNÁL,\n"
+"s PREDVOLENOU hodnotou.\n"
+"\n"
+"ČÍSLO Čislo bitu v BSR\n"
+"TYP Typ bitu, platné hodnoty sú I, O, B, C a X\n"
+"PREDVOLENÉ Predvolená (bezpečná) hodnota bitu,\n"
+" platné hodnoty sú 1, O, ?\n"
+"SIGNÁL Názov prideleného signálu\n"
+"RBIT Číslo riadiaceho bitu\n"
+"RHOD Riadiaca hodnota\n"
+"RSTAV Riadiaci stav, platný stav je len Z\n"
+
+#: src/cmd/bit.c:200
+msgid "define new BSR bit"
+msgstr "definuje nový BSR bit"
+
+#: src/cmd/bsdl.c:93
+#, c-format
+msgid ""
+"Usage: %s path PATHLIST\n"
+"Usage: %s test [FILE]\n"
+"Usage: %s dump [FILE]\n"
+"Usage: %s debug on|off\n"
+"Manage BSDL files\n"
+"\n"
+"PATHLIST semicolon separated list of directory paths to search for BSDL "
+"files\n"
+"FILE file containing part description in BSDL format\n"
+msgstr ""
+
+#: src/cmd/bsdl.c:106
+msgid "manage BSDL files"
+msgstr ""
+
+#: src/cmd/bus.c:54
+#, c-format
+msgid "%s: invalid bus number\n"
+msgstr "%s: neplatné číslo zbernice\n"
+
+#: src/cmd/bus.c:67
+#, c-format
+msgid ""
+"Usage: %s BUS\n"
+"Change active bus.\n"
+"\n"
+"BUS bus number\n"
+msgstr ""
+"Použitie: %s ZBERNICA\n"
+"Zmeniť aktívnu zbernicu.\n"
+"\n"
+"ZBERNICA číslo zbernice\n"
+
+#: src/cmd/bus.c:76
+msgid "change active bus"
+msgstr "zmeniť aktívnu zbernicu"
+
+#: src/cmd/cable.c:58
+#, c-format
+msgid "Note: the 'cable' command syntax changed, please read the help text\n"
+msgstr ""
+
+#: src/cmd/cable.c:76
+#, fuzzy, c-format
+msgid "Unknown cable type: %s\n"
+msgstr "Neznámy kábel: %s\n"
+
+#: src/cmd/cable.c:98 src/tap/cable/ft2232.c:1580
+#: src/tap/cable/generic_parport.c:82 src/tap/cable/generic_usbconn.c:223
+#: src/tap/cable/jim.c:68 src/tap/cable/usbblaster.c:79
+#: src/tap/cable/vision_ep9307.c:201 src/tap/cable/wiggler.c:195
+#, c-format
+msgid "%s(%d) malloc failed!\n"
+msgstr ""
+
+#: src/cmd/cable.c:105 src/tap/cable/generic_parport.c:76
+#, c-format
+msgid "Error: Cable connection failed!\n"
+msgstr "Chyba: Pripojenie kábla zlyhalo!\n"
+
+#: src/cmd/cable.c:113
+#, c-format
+msgid "Error: Cable initialization failed!\n"
+msgstr "Chyba: Inicializácia kábla zlyhala!\n"
+
+#: src/cmd/cable.c:130
+#, c-format
+msgid ""
+"Usage: %s DRIVER [DRIVER_OPTS]\n"
+"Select JTAG cable type.\n"
+"\n"
+"DRIVER name of cable\n"
+"DRIVER_OPTS options for the selected cable\n"
+"\n"
+"Type \"cable DRIVER help\" for info about options for cable DRIVER.\n"
+"\n"
+"List of supported cables:\n"
+msgstr ""
+
+#: src/cmd/cable.c:142 src/cmd/help.c:41
+#, c-format
+msgid "%-13s %s\n"
+msgstr "%-13s %s\n"
+
+#: src/cmd/cable.c:147
+msgid "select JTAG cable"
+msgstr "nastaviť JTAG kábel"
+
+#: src/cmd/cmd.c:170
+#, c-format
+msgid "Error: Cable not configured. Please use '%s' command first!\n"
+msgstr ""
+"Chyba: Kábel nie je nakonfigurovaný. Prosím najskôr použie príkaz '%s'!\n"
+
+#: src/cmd/cmd.c:194
+#, c-format
+msgid "%s: syntax error!\n"
+msgstr "%s: chyba syntaxe!\n"
+
+#: src/cmd/cmd.c:205
+#, fuzzy, c-format
+msgid "%s: Ambiguous command\n"
+msgstr "%s: neznámy príkaz\n"
+
+#: src/cmd/cmd.c:206 src/cmd/help.c:57
+#, c-format
+msgid "%s: unknown command\n"
+msgstr "%s: neznámy príkaz\n"
+
+#: src/cmd/debug.c:56
+#, c-format
+msgid ""
+"Usage: %s n\n"
+"Enabled debugging.\n"
+"\n"
+"n =1 fileio, 2=tap commands, 4 =?\n"
+msgstr ""
+
+#: src/cmd/debug.c:65
+msgid "debug jtag program"
+msgstr ""
+
+#: src/cmd/detect.c:83
+#, c-format
+msgid ""
+"Usage: %s\n"
+"Detect parts on the JTAG chain.\n"
+"\n"
+"Output from this command is a list of the detected parts.\n"
+"If no parts are detected other commands may not work properly.\n"
+msgstr ""
+"Použitie: %s\n"
+"Detekovať súčiastky v JTAG reťazci.\n"
+"\n"
+"Výstupom tohoto príkazu je zoznam zdetekovaných súčiastok.\n"
+"Ak nie sú súčiastky zdetekované, ostatné príkazy nemusia fungovať\n"
+"správne.\n"
+
+#: src/cmd/detect.c:93
+msgid "detect parts on the JTAG chain"
+msgstr "detekovať súčiastky v JTAG reťazci"
+
+#: src/cmd/detectflash.c:41 src/cmd/eraseflash.c:47 src/cmd/flashmem.c:49
+#: src/cmd/peekpoke.c:47 src/cmd/peekpoke.c:109 src/cmd/readmem.c:45
+#: src/cmd/writemem.c:43
+#, c-format
+msgid "Error: Bus driver missing.\n"
+msgstr "Chyba: Chýba ovládač zbernice.\n"
+
+#: src/cmd/detectflash.c:57
+#, fuzzy, c-format
+msgid ""
+"Usage: %s ADDRESS\n"
+"Detect flash memory type connected to a part.\n"
+"\n"
+"ADDRESS Base address for memory region\n"
+msgstr ""
+"Použitie: %s\n"
+"Detekovať typ flash pamäte pripojený k súčiastke.\n"
+
+#: src/cmd/detectflash.c:66
+msgid "detect parameters of flash chips attached to a part"
+msgstr "detekovať parametre čipov flash pripojených k súčiastke"
+
+#: src/cmd/discovery.c:51
+#, c-format
+msgid ""
+"Usage: %s\n"
+"Discovery of unknown parts in the JTAG chain.\n"
+"\n"
+"'%s' attempts to detect these parameters of an unknown JTAG\n"
+"chain:\n"
+" 1. IR (instruction register) length\n"
+" 2. DR (data register) length for all possible instructions\n"
+"\n"
+"Warning: This may be dangerous for some parts (especially if the\n"
+"part doesn't have TRST signal).\n"
+msgstr ""
+"Použitie: %s\n"
+"Preskúmať neznáme súčiastky v JTAG reťazci.\n"
+"\n"
+"'%s' sa pokúša detekovať tieto parametre neznámeho JTAG\n"
+"reťazca:\n"
+" 1. dĺžku IR (inštrukčného registra)\n"
+" 2. dĺžku DR (dátového rgistra) pre všetky možné inštrukcie\n"
+"\n"
+"Upozornenie: Toto môže byť nebezpečné pre niektoré súčiastky\n"
+"(hlavne v prípade, ak súčiastka nemá TRST signál).\n"
+
+#: src/cmd/discovery.c:66
+msgid "discovery of unknown parts in the JTAG chain"
+msgstr "preskúmať neznáme súčiastky v JTAG reťazci"
+
+#: src/cmd/dr.c:58
+#, c-format
+msgid "%s: part without active instruction\n"
+msgstr "%s: súčiastka bez aktívnej inštrukcie\n"
+
+#: src/cmd/dr.c:62
+#, c-format
+msgid "%s: part without active data register\n"
+msgstr "%s: súčiastka bez aktívneho dátového registra\n"
+
+#: src/cmd/dr.c:79
+#, c-format
+msgid "%s: register length mismatch\n"
+msgstr ""
+
+#: src/cmd/dr.c:94
+#, c-format
+msgid "%s\n"
+msgstr "%s\n"
+
+#: src/cmd/dr.c:103
+#, fuzzy, c-format
+msgid ""
+"Usage: %s [DIR]\n"
+"Usage: %s BITSTRING\n"
+"Display input or output data register content or set current register.\n"
+"\n"
+"DIR requested data register; possible values: 'in' for\n"
+" input and 'out' for output; default is 'out'\n"
+"BITSTRING set current data register with BITSTRING (e.g. 01010)\n"
+msgstr ""
+"Použitie: %s [SMER]\n"
+"Zobraziť obsah vstupného alebo výstupného dátového registra.\n"
+"\n"
+"SMER požadovaný dátový register; možné hodnoty sú: 'in'\n"
+" pre vstupný a 'out' pre výstupný; predvolená hodnota\n"
+" je 'out'\n"
+
+#: src/cmd/dr.c:115
+msgid "display active data register for a part"
+msgstr "zobraziť akívny dátový register pre súčiastku"
+
+#: src/cmd/endian.c:42
+#, c-format
+msgid "Endianess for external files: big\n"
+msgstr "Poradie bajtov pre externé súbory: big endian\n"
+
+#: src/cmd/endian.c:44
+#, c-format
+msgid "Endianess for external files: little\n"
+msgstr "Poradie bajtov pre externé súbory: little endian\n"
+
+#: src/cmd/endian.c:65
+#, c-format
+msgid ""
+"Usage: %s\n"
+"Set or print endianess for external files.\n"
+msgstr ""
+"Použitie: %s\n"
+"Nastaviť alebo vypísať poradie bajtov pre externá súbory.\n"
+
+#: src/cmd/endian.c:72
+msgid "set/print endianess"
+msgstr "nastaviť/vypísať poradie bajtov"
+
+#: src/cmd/eraseflash.c:65
+#, c-format
+msgid ""
+"Usage: %s ADDR BLOCKS\n"
+"Erase flash memory from ADDR.\n"
+"\n"
+"ADDR target addres for erasing block\n"
+"BLOCKS number of blocks to erase\n"
+"\n"
+"ADDR and BLOCKS could be in decimal or hexadecimal (prefixed with 0x) form.\n"
+"\n"
+"Supported Flash Memories:\n"
+msgstr ""
+"Použitie: %s ADRESA BLOKY\n"
+"Vymazať pamäť flash od ADRESY.\n"
+"\n"
+"ADRESA cieľová adresa pre vymazanie bloku\n"
+"BLOKY počet blokov na vymazanie\n"
+"\n"
+"ADRESA a BLOKY môžu byť v desiatkovom alebo šestnástkovom (začína s 0x)\n"
+"tvare.\n"
+"\n"
+"Podporované pamäte flash:\n"
+
+#: src/cmd/eraseflash.c:77 src/cmd/flashmem.c:97
+#, c-format
+msgid ""
+"%s\n"
+" %s\n"
+msgstr ""
+"%s\n"
+" %s\n"
+
+#: src/cmd/eraseflash.c:82
+msgid "erase flash memory by number of blocks"
+msgstr "vymazať pamäť flash podľa počtu blokov"
+
+#: src/cmd/flashmem.c:64 src/cmd/writemem.c:52 src/jtag.c:414
+#, c-format
+msgid "Unable to open file `%s'!\n"
+msgstr "Nepodarilo sa otvoriť súbor `%s'!\n"
+
+#: src/cmd/flashmem.c:82
+#, fuzzy, c-format
+msgid ""
+"Usage: %s ADDR FILENAME [noverify]\n"
+"Usage: %s FILENAME [noverify]\n"
+"Program FILENAME content to flash memory.\n"
+"\n"
+"ADDR target address for raw binary image\n"
+"FILENAME name of the input file\n"
+"%-10s FILENAME is in MS .bin format (for WinCE)\n"
+"%-10s if specified, verification is skipped\n"
+"\n"
+"ADDR could be in decimal or hexadecimal (prefixed with 0x) form.\n"
+"\n"
+"Supported Flash Memories:\n"
+msgstr ""
+"Použitie: %s ADRESA SÚBOR\n"
+"Použitie: %s SÚBOR\n"
+"Naprogramovať obsah SÚBORu do flash pamäte.\n"
+"\n"
+"ADRESA cieľová adresa pre priamy binárny obraz\n"
+"SÚBOR názov vstupného súboru\n"
+"%-10s SÚBOR je vo formáte MS .bin (pre WinCE)\n"
+"\n"
+"ADRESA môže byť v desiatkovom alebo šestnástkovom (začína s 0x) tvare.\n"
+"\n"
+"Podporované pamäte flash:\n"
+
+#: src/cmd/flashmem.c:102
+msgid "burn flash memory with data from a file"
+msgstr "napáliť dáta zo súboru do pamäte flash"
+
+#: src/cmd/frequency.c:43
+#, c-format
+msgid "Current TCK frequency is %u Hz\n"
+msgstr "Aktuálna frekvencia TCK je %u Hz\n"
+
+#: src/cmd/frequency.c:53
+#, c-format
+msgid "Setting TCK frequency to %u Hz\n"
+msgstr "Nastavujem frekvenciu TCK na %u Hz\n"
+
+#: src/cmd/frequency.c:63
+#, c-format
+msgid ""
+"Usage: %s [FREQ]\n"
+"Change TCK frequency to FREQ or print current TCK frequency.\n"
+"\n"
+"FREQ is in hertz. It's a maximum TCK frequency for JTAG interface.\n"
+"In some cases the TCK frequency is less than FREQ, but the frequency\n"
+"is never more than FREQ. Maximum supported frequency depends on JTAG\n"
+"adapter.\n"
+"\n"
+"FREQ must be an unsigned integer. Minimum allowed frequency is 1 Hz.\n"
+"Use 0 for FREQ to disable frequency limit.\n"
+msgstr ""
+"Použitie: %s [FREK]\n"
+"Zmeniť frekvenciu TCK na FREK alebo vypísať aktuálnu frekvenciu TCK.\n"
+"\n"
+"FREK je v hertzoch. Je to maximálna frekvencia TCK pre JTAG rozhranie.\n"
+"V niektorých prípadoch je frekvencia TCK menšia ako FREK, ale nikdy\n"
+"nie je väčšia ako FREK. Maximálna podporovaná frekvencia závisí od\n"
+"JTAG adapéra.\n"
+"\n"
+"FREK musí byť celé číslo bez znamienka. Minimálna povolená frekvencia\n"
+"je 1 Hz. Ak chcete vypnúť obmedzenie frekvencie, použite 0 pre FREK.\n"
+
+#: src/cmd/frequency.c:78
+msgid "setup JTAG frequency"
+msgstr "nastaviť JTAG frekvenciu"
+
+#: src/cmd/get.c:68
+#, c-format
+msgid "%s = %d\n"
+msgstr "%s = %d\n"
+
+#: src/cmd/get.c:77
+#, c-format
+msgid ""
+"Usage: %s SIGNAL\n"
+"Get signal state from output BSR (Boundary Scan Register).\n"
+"\n"
+"SIGNAL signal name (from JTAG declaration file)\n"
+msgstr ""
+"Použitie: %s SIGNÁL\n"
+"Získať stav signálu z výstupného BSR (Boundary Scan Register).\n"
+"\n"
+"SIGNÁL názov signálu (zo súboru JTAG deklarácií)\n"
+
+#: src/cmd/get.c:86
+msgid "get external signal value"
+msgstr "získať hodnotu externého signálu"
+
+#: src/cmd/help.c:39
+#, c-format
+msgid ""
+"Command list:\n"
+"\n"
+msgstr ""
+"Zoznam príkazov:\n"
+"\n"
+
+#: src/cmd/help.c:41
+msgid "(no description available)"
+msgstr "(popis je nedostupný)"
+
+#: src/cmd/help.c:42
+#, c-format
+msgid ""
+"\n"
+"Type \"help COMMAND\" for details about a particular command.\n"
+msgstr ""
+"\n"
+"Napíšte \"help PRÍKAZ\" a získate podrobnosti o príslušnom príkaze.\n"
+
+#: src/cmd/help.c:66
+#, c-format
+msgid ""
+"Usage: %s [COMMAND]\n"
+"Print short help for COMMAND, or list of available commands.\n"
+msgstr ""
+"Použitie: %s [PRÍKAZ]\n"
+"Vypísať krátku pomoc pre PRÍKAZ alebo zoznam dostupných príkazov.\n"
+
+#: src/cmd/help.c:73
+msgid "display this help"
+msgstr "zobraziť túto pomoc"
+
+#: src/cmd/idcode.c:50
+#, c-format
+msgid "Reading %d bytes if idcode\n"
+msgstr ""
+
+#: src/cmd/idcode.c:59
+#, c-format
+msgid ""
+"Usage: %s [BYTES]\n"
+"Read [BYTES]|all IDCODEs of all parts in a JTAG chain.\n"
+"\n"
+"BYTES must be an unsigned integer, Use 0 for BYTES to read all bytes\n"
+msgstr ""
+
+#: src/cmd/idcode.c:68
+#, fuzzy
+msgid "Read IDCODEs of all parts in a JTAG chain"
+msgstr "preskúmať neznáme súčiastky v JTAG reťazci"
+
+#: src/cmd/include.c:49
+#, c-format
+msgid "Please use the 'include' command instead of 'script'\n"
+msgstr ""
+
+#: src/cmd/include.c:99
+#, fuzzy, c-format
+msgid "Unable to open file `%s go=%d'!\n"
+msgstr "Nepodarilo sa otvoriť súbor `%s'!\n"
+
+#: src/cmd/include.c:113
+#, fuzzy, c-format
+msgid ""
+"Usage: %s FILENAME [n] \n"
+"Run command sequence n times from external FILENAME.\n"
+"\n"
+"FILENAME Name of the file with commands\n"
+msgstr ""
+"Použitie: %s SÚBOR\n"
+"Spustiť príkazovú sekvenciu z externého SÚBORu.\n"
+"\n"
+"SÚBOR Názov súboru s príkazmi\n"
+
+#: src/cmd/include.c:134
+msgid "include command sequence from external repository"
+msgstr "vložiť sekvenciu príkazov zo štandardného externého súboru"
+
+#: src/cmd/include.c:153
+msgid "run command sequence from external file"
+msgstr "spustiť sekvenciu príkazov z externého súboru"
+
+#: src/cmd/initbus.c:59
+#, fuzzy, c-format
+msgid "bus alloc/attach failed!\n"
+msgstr "inicializácia zbernice zlyhala!\n"
+
+#: src/cmd/initbus.c:64
+#, c-format
+msgid "bus initialization failed!\n"
+msgstr "inicializácia zbernice zlyhala!\n"
+
+#: src/cmd/initbus.c:70
+#, fuzzy, c-format
+msgid "Initialized bus %d, active bus %d\n"
+msgstr "inicializovať ovládač zbernice pre aktívnu súčiastku"
+
+#: src/cmd/initbus.c:76
+#, c-format
+msgid "Unknown bus: %s\n"
+msgstr "Neznáma zbernica: %s\n"
+
+#: src/cmd/initbus.c:87
+#, c-format
+msgid ""
+"Usage: %s BUSNAME\n"
+"Initialize new bus driver for active part.\n"
+"\n"
+"BUSNAME Name of the bus\n"
+"\n"
+"List of available buses:\n"
+msgstr ""
+"Použitie: %s ZBERNICA\n"
+"Inicializovať nový ovládač zbernice pre aktívnu súčiastku.\n"
+"\n"
+"ZBERNICA Názov zbernice\n"
+"\n"
+"Zoznam dostupných zberníc:\n"
+
+#: src/cmd/initbus.c:96
+#, c-format
+msgid "%-10s %s\n"
+msgstr "%-10s %s\n"
+
+#: src/cmd/initbus.c:101
+msgid "initialize bus driver for active part"
+msgstr "inicializovať ovládač zbernice pre aktívnu súčiastku"
+
+#: src/cmd/instruction.c:58
+#, c-format
+msgid "%s: unknown instruction '%s'\n"
+msgstr "%s: neznáma inštrukcia '%s'\n"
+
+#: src/cmd/instruction.c:69
+#, c-format
+msgid "instruction length is already set and used\n"
+msgstr "dĺžka inštrukcie je už nastavená a používaná\n"
+
+#: src/cmd/instruction.c:89
+#, c-format
+msgid "Instruction '%s' already defined\n"
+msgstr "Inštrukcia '%s' je už definovaná\n"
+
+#: src/cmd/instruction.c:104
+#, c-format
+msgid "unknown data register '%s'\n"
+msgstr "neznámy dátový register '%s'\n"
+
+#: src/cmd/instruction.c:118
+#, c-format
+msgid ""
+"Usage: %s INSTRUCTION\n"
+"Usage: %s length LENGTH\n"
+"Usage: %s INSTRUCTION CODE REGISTER\n"
+"Change active INSTRUCTION for a part or declare new instruction.\n"
+"\n"
+"INSTRUCTION instruction name (e.g. BYPASS)\n"
+"LENGTH common instruction length\n"
+"CODE instruction code (e.g. 11111)\n"
+"REGISTER default data register for instruction (e.g. BR)\n"
+msgstr ""
+"Použitie: %s INŠTRUKCIA\n"
+"Použitie: %s length DĹŽKA\n"
+"Použitie: %s INŠTRUKCIA KÓD REGISTER\n"
+"Zmeniť aktívnu INŠTRUKCIU pre súčiastku alebo deklarovať novú inštrukciu.\n"
+"\n"
+"INŠTRUKCIA názov inštrukcie (napr. BYPASS)\n"
+"DĹŽKA spoločná dĺžka inštrukcií\n"
+"KÓD kód inštrukcie (napr. 11111)\n"
+"REGISTER predvolený dátový register pre inštrukciu (napr. BR)\n"
+
+#: src/cmd/instruction.c:132
+msgid "change active instruction for a part or declare new instruction"
+msgstr ""
+"zmeniť aktívnu inštrukciu pre súčiastku alebo deklarovať novú inštrukciu"
+
+#: src/cmd/part.c:81
+#, c-format
+msgid "%s: invalid part number\n"
+msgstr "%s: neplatné číslo súčiastky\n"
+
+#: src/cmd/part.c:94
+#, fuzzy, c-format
+msgid ""
+"Usage: %s PART\n"
+"Change active part for current JTAG chain.\n"
+"\n"
+"PART part number | alias\n"
+msgstr ""
+"Použitie: %s SÚČIASTKA\n"
+"Zmeniť aktívnu súčiastku pre aktuálny JTAG reťazec.\n"
+"\n"
+"SÚČIASTKA číslo súčiaskty\n"
+
+#: src/cmd/part.c:103
+msgid "change active part for current JTAG chain"
+msgstr "zmeniť aktívnu súčiastku pre aktuálny JTAG reťazec"
+
+#: src/cmd/peekpoke.c:62
+#, fuzzy, c-format
+msgid "bus_read(0x%08x) = 0x%02X (%i)\n"
+msgstr "bus_read(0x%08x) = 0x%08X (%i)\n"
+
+#: src/cmd/peekpoke.c:66
+#, fuzzy, c-format
+msgid "bus_read(0x%08x) = 0x%04X (%i)\n"
+msgstr "bus_read(0x%08x) = 0x%08X (%i)\n"
+
+#: src/cmd/peekpoke.c:69
+#, c-format
+msgid "bus_read(0x%08x) = 0x%08X (%i)\n"
+msgstr "bus_read(0x%08x) = 0x%08X (%i)\n"
+
+#: src/cmd/peekpoke.c:80
+#, c-format
+msgid ""
+"Usage: %s ADDR\n"
+"Read a single word (bus width size).\n"
+"\n"
+"ADDR address to read from\n"
+"\n"
+"ADDR could be in decimal or hexadecimal (prefixed with 0x) form.\n"
+"\n"
+msgstr ""
+"Použitie: %s ADRESA\n"
+"Prečítať jedno slovo (s veľkosťou šírky zbernice).\n"
+"\n"
+"ADRESA adresa, z ktorej čítať\n"
+"\n"
+"ADRESA môže byť v desiatkovom alebo šestnástkovom (začína s 0x) tvare.\n"
+
+#: src/cmd/peekpoke.c:92
+msgid "read a single word"
+msgstr "prečítať jedno slovo"
+
+#: src/cmd/peekpoke.c:131
+#, fuzzy, c-format
+msgid ""
+"Usage: %s ADDR VAL [ADDR VAL] ... \n"
+"Write a single word (bus width size).\n"
+"\n"
+"ADDR address to write\n"
+"VAL value to write\n"
+"\n"
+"ADDR and VAL could be in decimal or hexadecimal (prefixed with 0x) form.\n"
+"\n"
+msgstr ""
+"Použitie: %s ADRESA HODNOTA\n"
+"Zapísať jedno slovo (s veľkosťou šírky zbernice).\n"
+"\n"
+"ADRESA adresa pre zápis\n"
+"HODNOTA zapisovaná hodnota\n"
+"\n"
+"ADRESA a HODNOTA môžu byť v desiatkovom alebo šestnástkovom (začína s 0x)\n"
+"tvare.\n"
+"\n"
+
+#: src/cmd/peekpoke.c:144
+msgid "write a single word"
+msgstr "zapísať jedno slovo"
+
+#: src/cmd/pod.c:78
+#, c-format
+msgid ""
+"Usage: %s SIGNAL=# [SIGNAL=# ...]\n"
+"Set state of POD signal(s) to 0 or 1.\n"
+"\n"
+"SIGNAL\t TCK,TMS, TDI, TRST, or RESET\n"
+"# 0 or 1\n"
+msgstr ""
+
+#: src/cmd/pod.c:88
+msgid "Set state of POD signal(s)"
+msgstr ""
+
+#: src/cmd/print.c:98
+#, c-format
+msgid " Active %%-%ds %%-%ds"
+msgstr ""
+
+#: src/cmd/print.c:102 src/cmd/print.c:105 src/cmd/print.c:109
+#: src/cmd/print.c:137 src/cmd/print.c:140 src/cmd/print.c:144
+#, c-format
+msgid "(%d) String conversion failed!\n"
+msgstr "(%d) Konverzia reťazca zlyhala!\n"
+
+#: src/cmd/print.c:103 src/cmd/print.c:107 src/cmd/print.c:138
+#: src/cmd/print.c:142
+msgid "Instruction"
+msgstr "Inštrukcia"
+
+#: src/cmd/print.c:103 src/cmd/print.c:107 src/cmd/print.c:138
+#: src/cmd/print.c:142
+msgid "Register"
+msgstr "Register"
+
+#: src/cmd/print.c:117
+#, fuzzy, c-format
+msgid " %%c %%-%ds %%-%ds\n"
+msgstr " Č. %%-%ds %%-%ds %%-%ds %%-%ds %%-%ds\n"
+
+#: src/cmd/print.c:133
+#, fuzzy, c-format
+msgid " No. %%-%ds %%-%ds %%-%ds %%-%ds %%-%ds"
+msgstr " Č. %%-%ds %%-%ds %%-%ds %%-%ds %%-%ds\n"
+
+#: src/cmd/print.c:138 src/cmd/print.c:142
+msgid "Manufacturer"
+msgstr "Výrobca"
+
+#: src/cmd/print.c:138 src/cmd/print.c:142
+msgid "Part"
+msgstr "Súčiastka"
+
+#: src/cmd/print.c:138 src/cmd/print.c:142
+msgid "Stepping"
+msgstr "Stupeň"
+
+#: src/cmd/print.c:156
+#, fuzzy, c-format
+msgid " %3d %s "
+msgstr " %3d "
+
+#: src/cmd/print.c:158 src/part/part.c:330
+#, c-format
+msgid " %3d "
+msgstr " %3d "
+
+#: src/cmd/print.c:170
+#, c-format
+msgid ""
+"\n"
+"Active bus:\n"
+"*%d: "
+msgstr ""
+"\n"
+"Aktívna zbernica:\n"
+"*%d: "
+
+#: src/cmd/print.c:175
+#, c-format
+msgid "Error in bus area discovery at 0x%08llX\n"
+msgstr "Chyba pri zisťovaní oblasti zbernice na adrese 0x%08llX\n"
+
+#: src/cmd/print.c:180
+#, c-format
+msgid "\tstart: 0x%08X, length: 0x%08llX, data width: %d bit, (%s)\n"
+msgstr "\tzačiatok: 0x%08X, dĺžka: 0x%08llX, šírka údajov: %d bitov, (%s)\n"
+
+#: src/cmd/print.c:182
+#, c-format
+msgid "\tstart: 0x%08X, length: 0x%08llX, data width: %d bit\n"
+msgstr "\tzačiatok: 0x%08X, dĺžka: 0x%08llX, šírka údajov: %d bitov\n"
+
+#: src/cmd/print.c:197
+#, c-format
+msgid "*%d: "
+msgstr "*%d: "
+
+#: src/cmd/print.c:199
+#, c-format
+msgid "%d: "
+msgstr "%d: "
+
+#: src/cmd/print.c:210
+#, fuzzy, c-format
+msgid ""
+"Usage: %s [chain|bus|signals|instructions]\n"
+"Display JTAG chain status.\n"
+"\n"
+"Display list of the parts connected to the JTAG chain including\n"
+"part number and current (active) instruction and data register.\n"
+msgstr ""
+"Použitie: %s [chain|bus]\n"
+"Zobraziť stav JTAG reťazca.\n"
+"\n"
+"Zobraziť zoznam súčiastok zapojených v JTAG reťazci vrátane čísla\n"
+"súčiastky a aktuálnej (aktívnej) inštrukcie a dátového registra.\n"
+
+#: src/cmd/print.c:220
+msgid "display JTAG chain list/status"
+msgstr "zobraziť zoznam/stav JTAG reťazca"
+
+#: src/cmd/quit.c:44
+#, c-format
+msgid ""
+"Usage: %s\n"
+"Exit from %s.\n"
+msgstr ""
+"Použitie: %s\n"
+"Ukončit %s.\n"
+
+#: src/cmd/quit.c:51
+msgid "exit and terminate this session"
+msgstr "ukončiť toto sedenie"
+
+#: src/cmd/readmem.c:54
+#, c-format
+msgid "Unable to create file `%s'!\n"
+msgstr "Nepodarilo sa vytvoriť súbor `%s'!\n"
+
+#: src/cmd/readmem.c:67
+#, c-format
+msgid ""
+"Usage: %s ADDR LEN FILENAME\n"
+"Copy device memory content starting with ADDR to FILENAME file.\n"
+"\n"
+"ADDR start address of the copied memory area\n"
+"LEN copied memory length\n"
+"FILENAME name of the output file\n"
+"\n"
+"ADDR and LEN could be in decimal or hexadecimal (prefixed with 0x) form.\n"
+msgstr ""
+"Použitie: %s ADRESA DĹŽKA SÚBOR\n"
+"Kopírovať obsah pamäte zariadenia z ADRESY do SÚBORu.\n"
+"\n"
+"ADRESA začiatočná adresa kopírovanej oblasti pamäte\n"
+"DĹŽKA dĺžka kopírovanej pamäte\n"
+"SÚBOR názov výstupného súboru\n"
+"\n"
+"ADRESA a DĹŽKA môžu byť v desiatkovom alebo šestnástkovom (začína s 0x) "
+"tvare.\n"
+
+#: src/cmd/readmem.c:80
+msgid "read content of the memory and write it to file"
+msgstr "čítať obsah pamäte a zapísať ho do súboru"
+
+#: src/cmd/register.c:65
+#, c-format
+msgid "Data register '%s' already defined\n"
+msgstr "Dátový register '%s' je už definovaný\n"
+
+#: src/cmd/register.c:103
+#, c-format
+msgid ""
+"Usage: %s NAME LENGTH\n"
+"Define new data register with specified NAME and LENGTH.\n"
+"\n"
+"NAME Data register name\n"
+"LENGTH Data register length\n"
+msgstr ""
+"Použitie: %s NÁZOV DĹŽKA\n"
+"DEfinovať nový dátový register so zadaným NÁZVOM a DĹŽKOU.\n"
+"\n"
+"NÁZOV Názov dátového registra\n"
+"DĹŽKA Dĺžka dátového registra\n"
+
+#: src/cmd/register.c:113
+msgid "define new data register for a part"
+msgstr "definovať nový dátový register pre súčiastku"
+
+#: src/cmd/reset.c:53
+#, fuzzy, c-format
+msgid ""
+"Usage: %s\n"
+"Reset current JTAG chain.\n"
+msgstr "zmeniť aktívnu súčiastku pre aktuálny JTAG reťazec"
+
+#: src/cmd/reset.c:60
+#, fuzzy
+msgid "reset JTAG chain"
+msgstr "nastaviť JTAG kábel"
+
+#: src/cmd/salias.c:60 src/cmd/signal.c:73
+#, c-format
+msgid "Signal '%s' already defined\n"
+msgstr "Signál '%s' je už definovaný\n"
+
+#: src/cmd/salias.c:66
+#, fuzzy, c-format
+msgid "Signal '%s' not found\n"
+msgstr "signál '%s' nenájdený\n"
+
+#: src/cmd/salias.c:86
+#, fuzzy, c-format
+msgid ""
+"Usage: %s ALIAS SIGNAL\n"
+"Define new signal ALIAS as alias for existing SIGNAL.\n"
+"\n"
+"ALIAS New signal alias name\n"
+"SIGNAL Existing signal name\n"
+msgstr ""
+"Použitie: %s SIGNÁL [ZOZNAM...]\n"
+"DEfinovať nový signál s názvom SIGNÁL pre súčiastku.\n"
+"\n"
+"SIGNÁL Názov nového signálu\n"
+"ZOZNAM Zoznam nožičiek pre signál (nepoužité)\n"
+
+#: src/cmd/salias.c:96
+#, fuzzy
+msgid "define an alias for a signal"
+msgstr "definovať nový signál pre súčiastku"
+
+#: src/cmd/scan.c:64 src/part/part.c:186 src/part/part.c:223
+#, c-format
+msgid "%s(%s:%d) Boundary Scan Register (BSR) not found\n"
+msgstr "%s(%s:%d) Boundary Scan Register (BSR) nebol nájdený\n"
+
+#: src/cmd/scan.c:78
+#, c-format
+msgid "%s(%s:%d) Part can't SAMPLE\n"
+msgstr ""
+
+#: src/cmd/scan.c:113
+#, fuzzy, c-format
+msgid ": %d > %d\n"
+msgstr "%s = %d\n"
+
+#: src/cmd/scan.c:128
+#, c-format
+msgid ""
+"Usage: %s [SIGNAL]* \n"
+"Read BSR and show changes since last scan.\n"
+msgstr ""
+
+#: src/cmd/scan.c:135
+msgid "read BSR and show changes since last scan"
+msgstr ""
+
+#: src/cmd/set.c:89
+#, c-format
+msgid ""
+"Usage: %s SIGNAL DIR [DATA]\n"
+"Set signal state in input BSR (Boundary Scan Register).\n"
+"\n"
+"SIGNAL signal name (from JTAG declaration file)\n"
+"DIR requested signal direction; possible values: 'in' or 'out'\n"
+"DATA desired output signal value ('0' or '1'); used only if DIR\n"
+" is 'out'\n"
+msgstr ""
+"Použitie: %s SIGNÁL SMER [DÁTA]\n"
+"Nastaviť stav signálu vo vstupnom BSR (Boundary Scan Register).\n"
+"\n"
+"SIGNÁL názov signálu (zo súboru JTAG deklarácií)\n"
+"SMER požadovaný smer signálu; možné hodnoty sú: 'in' alebo 'out'\n"
+"DÁTA želaná hodnota výstupného signálu ('0' alebo '1'); použité "
+"len\n"
+" ak SMER je 'out'\n"
+
+#: src/cmd/set.c:101
+msgid "set external signal value"
+msgstr "nastaviť hodnotu externého signálu"
+
+#: src/cmd/shell.c:84
+#, c-format
+msgid ""
+"Usage: %s cmmd\n"
+"Shell out to os for a command.\n"
+"\n"
+"CMMD OS Shell Command\n"
+msgstr ""
+
+#: src/cmd/shell.c:93
+msgid "shell cmmd"
+msgstr ""
+
+#: src/cmd/shift.c:60
+#, c-format
+msgid ""
+"Usage: %s\n"
+"Usage: %s\n"
+"Shift instruction or data register through JTAG chain.\n"
+msgstr ""
+"Použitie: %s\n"
+"Použitie: %s\n"
+"Posunúť inštrukčný alebo dátový register cez JTAG reťazec.\n"
+
+#: src/cmd/shift.c:68
+msgid "shift data/instruction registers through JTAG chain"
+msgstr "posunúť dátové/inštrukčné registre cez JTAG reťazec"
+
+#: src/cmd/signal.c:102
+#, fuzzy, c-format
+msgid ""
+"Usage: %s SIGNAL [PIN#]\n"
+"Define new signal with name SIGNAL for a part.\n"
+"\n"
+"SIGNAL\t\tNew signal name\n"
+"PIN# \tList of pin # for a signal\n"
+msgstr ""
+"Použitie: %s SIGNÁL [ZOZNAM...]\n"
+"DEfinovať nový signál s názvom SIGNÁL pre súčiastku.\n"
+"\n"
+"SIGNÁL Názov nového signálu\n"
+"ZOZNAM Zoznam nožičiek pre signál (nepoužité)\n"
+
+#: src/cmd/signal.c:112
+msgid "define new signal for a part"
+msgstr "definovať nový signál pre súčiastku"
+
+#: src/cmd/svf.c:63
+#, c-format
+msgid "%s: cannot open file '%s' for reading\n"
+msgstr ""
+
+#: src/cmd/svf.c:76
+#, c-format
+msgid ""
+"Usage: %s FILE [stop] [progress] [ref_freq=<frequency>]\n"
+"Execute svf commands from FILE.\n"
+"stop : Command execution stops upon TDO mismatch.\n"
+"progress : Continually displays progress status.\n"
+"ref_freq : Use <frequency> as the reference for 'RUNTEST xxx SEC' commands\n"
+"\n"
+"FILE file containing SVF commands\n"
+msgstr ""
+
+#: src/cmd/svf.c:88
+msgid "execute svf commands from file"
+msgstr ""
+
+#: src/cmd/test.c:78
+#, fuzzy, c-format
+msgid "<FAIL>%s = %d\n"
+msgstr "%s = %d\n"
+
+#: src/cmd/test.c:89
+#, fuzzy, c-format
+msgid ""
+"Usage: %s SIGNAL 0/1\n"
+"Test signal state from output BSR (Boundary Scan Register).\n"
+"\n"
+"SIGNAL signal name (from JTAG declaration file)\n"
+msgstr ""
+"Použitie: %s SIGNÁL\n"
+"Získať stav signálu z výstupného BSR (Boundary Scan Register).\n"
+"\n"
+"SIGNÁL názov signálu (zo súboru JTAG deklarácií)\n"
+
+#: src/cmd/test.c:98
+#, fuzzy
+msgid "test external signal value"
+msgstr "získať hodnotu externého signálu"
+
+#: src/cmd/usleep.c:55
+#, c-format
+msgid ""
+"Usage: %s USECS\n"
+"Sleep some number of microseconds.\n"
+msgstr ""
+
+#: src/cmd/usleep.c:62
+msgid "Sleep some number of microseconds"
+msgstr ""
+
+#: src/cmd/writemem.c:65
+#, fuzzy, c-format
+msgid ""
+"Usage: %s ADDR LEN FILENAME\n"
+"Write to device memory starting at ADDR the FILENAME file.\n"
+"\n"
+"ADDR start address of the written memory area\n"
+"LEN written memory length\n"
+"FILENAME name of the input file\n"
+"\n"
+"ADDR and LEN could be in decimal or hexadecimal (prefixed with 0x) form.\n"
+"NOTE: This is NOT useful for FLASH programming!\n"
+msgstr ""
+"Použitie: %s ADRESA DĹŽKA SÚBOR\n"
+"Kopírovať obsah pamäte zariadenia z ADRESY do SÚBORu.\n"
+"\n"
+"ADRESA začiatočná adresa kopírovanej oblasti pamäte\n"
+"DĹŽKA dĺžka kopírovanej pamäte\n"
+"SÚBOR názov výstupného súboru\n"
+"\n"
+"ADRESA a DĹŽKA môžu byť v desiatkovom alebo šestnástkovom (začína s 0x) "
+"tvare.\n"
+
+#: src/cmd/writemem.c:79
+msgid "write content of file to the memory"
+msgstr ""
+
+#: src/flash/amd.c:279
+#, c-format
+msgid ""
+"Chip: AMD Flash\n"
+"\tManufacturer: "
+msgstr ""
+"Čip: AMD Flash\n"
+"\tVýrobca: "
+
+#: src/flash/amd.c:283 src/flash/amd.c:311 src/flash/amd.c:326
+#: src/flash/amd.c:344 src/flash/amd_flash.c:236
+#, c-format
+msgid ""
+"\n"
+"\tChip: "
+msgstr ""
+"\n"
+"\tČip: "
+
+#: src/flash/amd.c:305 src/flash/amd.c:320 src/flash/amd.c:338
+#: src/flash/amd.c:353 src/flash/amd_flash.c:247
+#, c-format
+msgid "Unknown (ID 0x%04x)"
+msgstr "Neznámy (ID 0x%04x)"
+
+#: src/flash/amd.c:358
+#, fuzzy, c-format
+msgid "Unknown manufacturer (ID 0x%04x) Chip (ID 0x%04x)"
+msgstr "Neznámy výrobca (ID 0x%04x)"
+
+#: src/flash/amd.c:361 src/flash/amd_flash.c:250
+#, c-format
+msgid ""
+"\n"
+"\tProtected: %04x\n"
+msgstr ""
+"\n"
+"\tChránené: %04x\n"
+
+#: src/flash/amd.c:566 src/flash/amd.c:578 src/flash/amd.c:590
+#: src/flash/detectflash.c:106 src/flash/detectflash.c:136
+msgid "AMD/Fujitsu Standard Command Set"
+msgstr "Štandardná množina príkazov AMD/Fujitsu"
+
+#: src/flash/amd.c:567
+msgid "supported: AMD 29LV640D, 29LV641D, 29LV642D; 2x16 Bit"
+msgstr "podporované: AMD 29LV640D, 29LV641D, 29LV642D; 2x16 bitov"
+
+#: src/flash/amd.c:579
+#, fuzzy
+msgid "supported: AMD 29LV800B, S92GLxxxN; MX29LV640B; 1x16 Bit"
+msgstr "podporované: AMD 29LV800B; 1x16 bitov"
+
+#: src/flash/amd.c:591
+#, fuzzy
+msgid "supported: AMD 29LV160, AMD 29LV065D, AMD 29LV040B, S92GLxxxN; 1x8 Bit"
+msgstr "podporované: AMD 29LV640D, 29LV641D, 29LV642D; 2x16 bitov"
+
+#: src/flash/amd_flash.c:230
+#, fuzzy, c-format
+msgid ""
+"Chip: AMD Flash\n"
+"\tPartNumber: "
+msgstr ""
+"Čip: AMD Flash\n"
+"\tVýrobca: "
+
+#: src/flash/amd_flash.c:233
+#, c-format
+msgid "Unknown manufacturer (ID 0x%04x)"
+msgstr "Neznámy výrobca (ID 0x%04x)"
+
+#: src/flash/amd_flash.c:240
+#, c-format
+msgid "5V Flash\n"
+msgstr ""
+
+#: src/flash/amd_flash.c:244
+#, c-format
+msgid "3V Flash\n"
+msgstr ""
+
+#: src/flash/amd_flash.c:362
+#, fuzzy
+msgid "AMD Standard Command Set"
+msgstr "Štandardná množina príkazov AMD/Fujitsu"
+
+#: src/flash/amd_flash.c:363
+#, fuzzy
+msgid "supported: AMD 29LV040B, 29C040B, 1x8 Bit"
+msgstr "podporované: AMD 29LV800B; 1x16 bitov"
+
+#: src/flash/detectflash.c:87
+#, c-format
+msgid "Flash not found!\n"
+msgstr "Pamäť flash nebola nájdená!\n"
+
+#: src/flash/detectflash.c:96
+#, c-format
+msgid "Query identification string:\n"
+msgstr "Identifikačný reťazec:\n"
+
+#: src/flash/detectflash.c:100 src/flash/detectflash.c:130
+msgid "null"
+msgstr "nič"
+
+#: src/flash/detectflash.c:103 src/flash/detectflash.c:133
+msgid "Intel/Sharp Extended Command Set"
+msgstr "Rozšírená sada príkazov Intel/Sharp"
+
+#: src/flash/detectflash.c:109 src/flash/detectflash.c:139
+#: src/flash/intel.c:468 src/flash/intel.c:480 src/flash/intel.c:492
+msgid "Intel Standard Command Set"
+msgstr "Štandardná sada príkazov Intel"
+
+#: src/flash/detectflash.c:112 src/flash/detectflash.c:142
+msgid "AMD/Fujitsu Extended Command Set"
+msgstr "Rozšírená sada príkazov AMD/Fujitsu"
+
+#: src/flash/detectflash.c:115 src/flash/detectflash.c:145
+msgid "Mitsubishi Standard Command Set"
+msgstr "Štandardná sada príkazov Mitsubishi"
+
+#: src/flash/detectflash.c:118 src/flash/detectflash.c:148
+msgid "Mitsubishi Extended Command Set"
+msgstr "Rozšírená sada príkazov Mitsubishi"
+
+#: src/flash/detectflash.c:121 src/flash/detectflash.c:151
+msgid "Page Write Command Set"
+msgstr "Sada príkazov Page Write"
+
+#: src/flash/detectflash.c:124 src/flash/detectflash.c:154
+#: src/flash/detectflash.c:198
+msgid "unknown!!!"
+msgstr "neznáma!!!"
+
+#: src/flash/detectflash.c:127
+#, c-format
+msgid ""
+"\tPrimary Algorithm Command Set and Control Interface ID Code: 0x%04X (%s)\n"
+msgstr ""
+"\tID kód sady príkazov a riadiaceho rozhrania primárneho algoritmu: 0x%04X (%"
+"s)\n"
+
+#: src/flash/detectflash.c:157
+#, c-format
+msgid ""
+"\tAlternate Algorithm Command Set and Control Interface ID Code: 0x%04X (%"
+"s)\n"
+msgstr ""
+"\tID kód sady príkazov a riadiaceho rozhrania alternatívneho algoritmu: 0x%"
+"04X (%s)\n"
+
+#: src/flash/detectflash.c:160
+#, c-format
+msgid "Query system interface information:\n"
+msgstr "Informácie systémového rozhrania:\n"
+
+#: src/flash/detectflash.c:161
+#, c-format
+msgid "\tVcc Logic Supply Minimum Write/Erase or Write voltage: %d mV\n"
+msgstr ""
+"\tVcc minimálne napäte zdroja logiky pre zápis/vymazávanie alebo zápis: %d "
+"mV\n"
+
+#: src/flash/detectflash.c:162
+#, c-format
+msgid "\tVcc Logic Supply Maximum Write/Erase or Write voltage: %d mV\n"
+msgstr ""
+"\tVcc maximálne napätie zdroja logiky pre zápis/vymazávanie alebo zápis: %d "
+"mV\n"
+
+#: src/flash/detectflash.c:163
+#, c-format
+msgid "\tVpp [Programming] Supply Minimum Write/Erase voltage: %d mV\n"
+msgstr ""
+"\tVpp [programovanie] minimálne napátie zdroja pre zápis/vymazanie: %d mV\n"
+
+#: src/flash/detectflash.c:164
+#, c-format
+msgid "\tVpp [Programming] Supply Maximum Write/Erase voltage: %d mV\n"
+msgstr ""
+"\tVpp [programovanie] maximálne napätie zdroja pre zápis/programovanie: %d "
+"mV\n"
+
+#: src/flash/detectflash.c:165
+#, c-format
+msgid "\tTypical timeout per single byte/word program: %d us\n"
+msgstr "\tTypický časový limit pre programovanie jedného bajtu/slova: %d µs\n"
+
+#: src/flash/detectflash.c:166
+#, c-format
+msgid "\tTypical timeout for maximum-size multi-byte program: %d us\n"
+msgstr ""
+"\tTypický časový limit pre programovanie maximálnej viacbajtovej sekvencie: %"
+"d µs\n"
+
+#: src/flash/detectflash.c:167
+#, c-format
+msgid "\tTypical timeout per individual block erase: %d ms\n"
+msgstr "\tTypický časový limit pre vymazanie jedného bloku: %d ms\n"
+
+#: src/flash/detectflash.c:168
+#, c-format
+msgid "\tTypical timeout for full chip erase: %d ms\n"
+msgstr "\tTypický časový limit pre vymazanie celého čipu: %d ms\n"
+
+#: src/flash/detectflash.c:169
+#, c-format
+msgid "\tMaximum timeout for byte/word program: %d us\n"
+msgstr "\tMaximálny časový limit pre programovanie bajtu/slova: %d µs\n"
+
+#: src/flash/detectflash.c:170
+#, c-format
+msgid "\tMaximum timeout for multi-byte program: %d us\n"
+msgstr ""
+"\tMaximálny časový limit pre programovanie viacbajtovej sekvencie: %d µs\n"
+
+#: src/flash/detectflash.c:171
+#, c-format
+msgid "\tMaximum timeout per individual block erase: %d ms\n"
+msgstr "\tMaximálny časový limit pre vymazanie jedného bloku: %d ms\n"
+
+#: src/flash/detectflash.c:172
+#, c-format
+msgid "\tMaximum timeout for chip erase: %d ms\n"
+msgstr "\tMaximálny časový limit pre vymazanie čipu: %d ms\n"
+
+#: src/flash/detectflash.c:175
+#, c-format
+msgid "Device geometry definition:\n"
+msgstr "Definícia geometrie zariadenia:\n"
+
+#: src/flash/detectflash.c:176
+#, c-format
+msgid "\tDevice Size: %d B (%d KiB, %d MiB)\n"
+msgstr "\tVeľkosť zariadenia: %d B (%d KiB, %d MiB)\n"
+
+#: src/flash/detectflash.c:183
+msgid "x8"
+msgstr "x8"
+
+#: src/flash/detectflash.c:186
+msgid "x16"
+msgstr "x16"
+
+#: src/flash/detectflash.c:189
+msgid "x8/x16"
+msgstr "x8/x16"
+
+#: src/flash/detectflash.c:192
+msgid "x32"
+msgstr "x32"
+
+#: src/flash/detectflash.c:195
+msgid "x16/x32"
+msgstr "x16/x32"
+
+#: src/flash/detectflash.c:201
+#, c-format
+msgid "\tFlash Device Interface Code description: 0x%04X (%s)\n"
+msgstr "\tPopisný kód rozhrania flash zariadenia: 0x%04X (%s)\n"
+
+#: src/flash/detectflash.c:202
+#, c-format
+msgid "\tMaximum number of bytes in multi-byte program: %d\n"
+msgstr "\tMaximálny počet bajtov pri viacbajtovom programovaní: %d\n"
+
+#: src/flash/detectflash.c:203
+#, c-format
+msgid "\tNumber of Erase Block Regions within device: %d\n"
+msgstr "\tPočet oblastí vymazávnia blokov v zariadení: %d\n"
+
+#: src/flash/detectflash.c:204
+#, c-format
+msgid "\tErase Block Region Information:\n"
+msgstr "\tInformácie o oblasti vymazávania blokov:\n"
+
+#: src/flash/detectflash.c:209
+#, c-format
+msgid "\t\tRegion %d:\n"
+msgstr "\t\tOblasť %d:\n"
+
+#: src/flash/detectflash.c:210
+#, c-format
+msgid "\t\t\tErase Block Size: %d B (%d KiB)\n"
+msgstr "\t\t\tVeľkosť vymazávacieho bloku: %d B (%d KiB)\n"
+
+#: src/flash/detectflash.c:213
+#, c-format
+msgid "\t\t\tNumber of Erase Blocks: %d\n"
+msgstr "\t\t\tPočet vymazávacích blokov: %d\n"
+
+#: src/flash/detectflash.c:225
+msgid "Required"
+msgstr ""
+
+#: src/flash/detectflash.c:225
+msgid "Not required"
+msgstr ""
+
+#: src/flash/detectflash.c:228
+msgid "Supported"
+msgstr ""
+
+#: src/flash/detectflash.c:228 src/flash/detectflash.c:239
+#: src/flash/detectflash.c:249
+#, fuzzy
+msgid "Not supported"
+msgstr "Nepodporovaná flash pamäť!\n"
+
+#: src/flash/detectflash.c:231
+msgid "170-nm Floating Gate technology"
+msgstr ""
+
+#: src/flash/detectflash.c:231
+msgid "230-nm MirrorBit(tm) technology"
+msgstr ""
+
+#: src/flash/detectflash.c:232
+msgid "130-nm Floating Gate technology"
+msgstr ""
+
+#: src/flash/detectflash.c:232
+msgid "110-nm MirrorBit(tm) technology"
+msgstr ""
+
+#: src/flash/detectflash.c:233
+msgid "90-nm Floating Gate technology"
+msgstr ""
+
+#: src/flash/detectflash.c:233
+msgid "90-nm MirrorBit(tm) technology"
+msgstr ""
+
+#: src/flash/detectflash.c:236
+msgid "CS49"
+msgstr ""
+
+#: src/flash/detectflash.c:236
+msgid "CS59"
+msgstr ""
+
+#: src/flash/detectflash.c:236
+msgid "CS99"
+msgstr ""
+
+#: src/flash/detectflash.c:239
+msgid "Read only"
+msgstr ""
+
+#: src/flash/detectflash.c:239
+msgid "Read/write"
+msgstr ""
+
+#: src/flash/detectflash.c:242
+msgid "29F040 mode"
+msgstr ""
+
+#: src/flash/detectflash.c:242
+msgid "29F016 mode"
+msgstr ""
+
+#: src/flash/detectflash.c:242
+msgid "29F400 mode"
+msgstr ""
+
+#: src/flash/detectflash.c:243
+#, fuzzy
+msgid "29LV800 mode"
+msgstr "Am29LV800B"
+
+#: src/flash/detectflash.c:243
+msgid "29BDS640 mode (Software Command Locking)"
+msgstr ""
+
+#: src/flash/detectflash.c:244
+msgid "29BDD160 mode (New Sector Protect)"
+msgstr ""
+
+#: src/flash/detectflash.c:245
+msgid "29PDL128 mode (New Sector Protect + 29LV800)"
+msgstr ""
+
+#: src/flash/detectflash.c:246
+msgid "Advanced Sector Protect"
+msgstr ""
+
+#: src/flash/detectflash.c:249
+msgid "4 word Page"
+msgstr ""
+
+#: src/flash/detectflash.c:249
+msgid "8 word Page"
+msgstr ""
+
+#: src/flash/detectflash.c:249
+msgid "16 word Page"
+msgstr ""
+
+#: src/flash/detectflash.c:253
+msgid "No boot"
+msgstr ""
+
+#: src/flash/detectflash.c:253
+msgid "8x8kb sectors at top and bottom with WP control"
+msgstr ""
+
+#: src/flash/detectflash.c:254
+msgid "Bottom boot device"
+msgstr ""
+
+#: src/flash/detectflash.c:254
+msgid "Top boot device"
+msgstr ""
+
+#: src/flash/detectflash.c:255
+msgid "Uniform bottom boot device"
+msgstr ""
+
+#: src/flash/detectflash.c:255
+msgid "Uniform top boot device"
+msgstr ""
+
+#: src/flash/detectflash.c:257
+msgid "Bad value"
+msgstr ""
+
+#: src/flash/detectflash.c:265
+#, c-format
+msgid "Primary Vendor-Specific Extended Query:\n"
+msgstr ""
+
+#: src/flash/detectflash.c:266
+#, c-format
+msgid "\tMajor version number: %c\n"
+msgstr ""
+
+#: src/flash/detectflash.c:267
+#, c-format
+msgid "\tMinor version number: %c\n"
+msgstr ""
+
+#: src/flash/detectflash.c:271 src/flash/detectflash.c:274
+#, c-format
+msgid "\tAddress Sensitive Unlock: %s\n"
+msgstr ""
+
+#: src/flash/detectflash.c:279 src/flash/detectflash.c:282
+#: src/flash/detectflash.c:287 src/flash/detectflash.c:290
+#, c-format
+msgid "\tProcess Technology: %s\n"
+msgstr ""
+
+#: src/flash/detectflash.c:293
+#, c-format
+msgid "\tErase Suspend: %s\n"
+msgstr ""
+
+#: src/flash/detectflash.c:295
+#, fuzzy, c-format
+msgid "\tSector Protect: Not supported\n"
+msgstr "Nepodporovaná flash pamäť!\n"
+
+#: src/flash/detectflash.c:297
+#, c-format
+msgid "\tSector Protect: %d sectors per group\n"
+msgstr ""
+
+#: src/flash/detectflash.c:299 src/flash/detectflash.c:301
+#, c-format
+msgid "\tSector Temporary Unprotect: %s\n"
+msgstr ""
+
+#: src/flash/detectflash.c:303 src/flash/detectflash.c:306
+#, c-format
+msgid "\tSector Protect/Unprotect Scheme: %s\n"
+msgstr ""
+
+#: src/flash/detectflash.c:308
+#, fuzzy, c-format
+msgid "\tSimultaneous Operation: Not supported\n"
+msgstr "Nepodporovaná flash pamäť!\n"
+
+#: src/flash/detectflash.c:310
+#, c-format
+msgid "\tSimultaneous Operation: %d sectors\n"
+msgstr ""
+
+#: src/flash/detectflash.c:312 src/flash/detectflash.c:314
+#, c-format
+msgid "\tBurst Mode Type: %s\n"
+msgstr ""
+
+#: src/flash/detectflash.c:316 src/flash/detectflash.c:318
+#, c-format
+msgid "\tPage Mode Type: %s\n"
+msgstr ""
+
+#: src/flash/detectflash.c:322
+#, c-format
+msgid "\tACC (Acceleration) Supply Minimum: %d mV\n"
+msgstr ""
+
+#: src/flash/detectflash.c:323
+#, c-format
+msgid "\tACC (Acceleration) Supply Maximum: %d mV\n"
+msgstr ""
+
+#: src/flash/detectflash.c:325 src/flash/detectflash.c:327
+#, c-format
+msgid "\tTop/Bottom Sector Flag: %s\n"
+msgstr ""
+
+#: src/flash/detectflash.c:332 src/flash/detectflash.c:334
+#, c-format
+msgid "\tProgram Suspend: %s\n"
+msgstr ""
+
+#: src/flash/detectflash.c:339 src/flash/detectflash.c:341
+#, c-format
+msgid "\tUnlock Bypass: %s\n"
+msgstr ""
+
+#: src/flash/detectflash.c:342
+#, c-format
+msgid "\tSecSi Sector (Customer OTP Area) Size: %d bytes\n"
+msgstr ""
+
+#: src/flash/detectflash.c:343
+#, c-format
+msgid "\tEmbedded Hardware Reset Timeout Maximum: %d ns\n"
+msgstr ""
+
+#: src/flash/detectflash.c:344
+#, c-format
+msgid "\tNon-Embedded Hardware Reset Timeout Maximum: %d ns\n"
+msgstr ""
+
+#: src/flash/detectflash.c:345
+#, c-format
+msgid "\tErase Suspend Timeout Maximum: %d us\n"
+msgstr ""
+
+#: src/flash/detectflash.c:346
+#, c-format
+msgid "\tProgram Suspend Timeout Maximum: %d us\n"
+msgstr ""
+
+#: src/flash/detectflash.c:351
+#, c-format
+msgid "\tBank Organization:\n"
+msgstr ""
+
+#: src/flash/detectflash.c:353
+#, c-format
+msgid "\t\tBank%d: %d sectors\n"
+msgstr ""
+
+#: src/flash/flash.c:89
+#, c-format
+msgid "unknown flash - vendor id: %d (0x%04x)\n"
+msgstr "neznáma flash pamäť - id dodávateľa: %d (0x%04x)\n"
+
+#: src/flash/flash.c:93
+#, c-format
+msgid "Flash not supported!\n"
+msgstr "Nepodporovaná flash pamäť!\n"
+
+#: src/flash/flash.c:104 src/flash/flash.c:265 src/flash/flash.c:391
+#, c-format
+msgid "no flash driver found\n"
+msgstr "ovládač pre flash pamäť nebol nájdený\n"
+
+#: src/flash/flash.c:115
+#, c-format
+msgid "Invalid sync sequence!\n"
+msgstr "Neplatná synchronizačná sekvencia!\n"
+
+#: src/flash/flash.c:133
+#, c-format
+msgid "block %d unlocked\n"
+msgstr "blok %d odomknutý\n"
+
+#: src/flash/flash.c:134 src/flash/flash.c:301
+#, c-format
+msgid "erasing block %d: %d\n"
+msgstr "vymazávam blok %d: %d\n"
+
+#: src/flash/flash.c:138 src/flash/flash.c:284
+#, c-format
+msgid "program:\n"
+msgstr "programovanie:\n"
+
+#: src/flash/flash.c:146 src/flash/flash.c:191
+#, c-format
+msgid "Error: premature end of file\n"
+msgstr "Chyba: neočakávaný koniec súboru\n"
+
+#: src/flash/flash.c:149 src/flash/flash.c:194
+#, c-format
+msgid "record: start = 0x%08X, len = 0x%08X, checksum = 0x%08X\n"
+msgstr "záznam: začiatok = 0x%08X, dĺžka = 0x%08X, kontrolná suma = 0x%08X\n"
+
+#: src/flash/flash.c:153 src/flash/flash.c:198
+#, c-format
+msgid "Error: Invalid record length!\n"
+msgstr "Chyba: Neplatná dĺžka záznamu!\n"
+
+#: src/flash/flash.c:165 src/flash/flash.c:328
+#, c-format
+msgid ""
+"\n"
+"flash error\n"
+msgstr ""
+"\n"
+"chyba flash\n"
+
+#: src/flash/flash.c:177 src/flash/flash.c:340
+#, fuzzy, c-format
+msgid "verify skipped\n"
+msgstr "kontrola:\n"
+
+#: src/flash/flash.c:182 src/flash/flash.c:345
+#, c-format
+msgid "verify:\n"
+msgstr "kontrola:\n"
+
+#: src/flash/flash.c:211
+#, c-format
+msgid ""
+"\n"
+"verify error: 0x%08X vs. 0x%08X at addr %08X\n"
+msgstr ""
+"\n"
+"chyba pri kontrole: 0x%08X vs. 0x%08X na adrese %08X\n"
+
+#: src/flash/flash.c:278 src/tap/detect.c:451
+#, c-format
+msgid "Out of memory!\n"
+msgstr "Nedostatok pamäte!\n"
+
+#: src/flash/flash.c:300
+#, c-format
+msgid ""
+"\n"
+"block %d unlocked\n"
+msgstr ""
+"\n"
+"blok %d odomknutý\n"
+
+#: src/flash/flash.c:335 src/flash/flash.c:372
+#, fuzzy, c-format
+msgid "addr: 0x%08X\n"
+msgstr "adresa: 0x%08X"
+
+#: src/flash/flash.c:373
+#, fuzzy, c-format
+msgid ""
+"verify error:\n"
+"read: 0x%08X\n"
+"expected: 0x%08X\n"
+msgstr ""
+"\n"
+"chyba pri kontrole:\n"
+"načítané: 0x%08X\n"
+"očakávané: 0x%08X\n"
+
+#: src/flash/flash.c:379
+#, fuzzy, c-format
+msgid ""
+"addr: 0x%08X\n"
+"Done.\n"
+msgstr "adresa: 0x%08X"
+
+#: src/flash/flash.c:396
+#, c-format
+msgid ""
+"\n"
+"Erasing %d Flash block%s from address 0x%x\n"
+msgstr ""
+
+#: src/flash/flash.c:401
+#, c-format
+msgid "(%d%% Completed) FLASH Block %d : Unlocking ... "
+msgstr ""
+
+#: src/flash/flash.c:404
+#, c-format
+msgid "Erasing ... "
+msgstr ""
+
+#: src/flash/flash.c:410
+#, c-format
+msgid "(100%% Completed) FLASH Block %d : Unlocking ... Erasing ... Ok.\n"
+msgstr ""
+
+#: src/flash/flash.c:412
+#, c-format
+msgid "Ok."
+msgstr ""
+
+#: src/flash/flash.c:414
+#, c-format
+msgid "%78s"
+msgstr ""
+
+#: src/flash/flash.c:419
+#, c-format
+msgid "ERROR.\n"
+msgstr ""
+
+#: src/flash/flash.c:425
+#, c-format
+msgid ""
+"\n"
+"Erasing Completed.\n"
+msgstr ""
+
+#: src/flash/flash.c:427
+#, c-format
+msgid ""
+"\n"
+"Erasing Failed.\n"
+msgstr ""
+
+#: src/flash/intel.c:116 src/flash/intel.c:119 src/flash/intel.c:122
+#, c-format
+msgid "Manufacturer: %s\n"
+msgstr "Výrobca: %s\n"
+
+#: src/flash/intel.c:125
+#, c-format
+msgid "Unknown manufacturer (0x%04X)!\n"
+msgstr "Neznámy výrobva (0x%04X)!\n"
+
+#: src/flash/intel.c:129
+#, c-format
+msgid "Chip: "
+msgstr "Čip: "
+
+#: src/flash/intel.c:181
+#, c-format
+msgid "Unknown (0x%02X)!\n"
+msgstr "Neznámy (0x%02X)!\n"
+
+#: src/flash/intel.c:240
+#, c-format
+msgid "flash: invalid command seq\n"
+msgstr "flash: neplatná sekvencia príkazov\n"
+
+#: src/flash/intel.c:243
+#, c-format
+msgid "flash: low vpen\n"
+msgstr "flash: nízke vpen\n"
+
+#: src/flash/intel.c:246
+#, c-format
+msgid "flash: block locked\n"
+msgstr "flash: blok uzamknutý\n"
+
+#: src/flash/intel.c:268
+#, c-format
+msgid "flash: unknown error while unblocking\n"
+msgstr "flash: neznáma chyba pri odblokovaní\n"
+
+#: src/flash/intel.c:287 src/flash/intel.c:339
+#, c-format
+msgid "flash: unknown error while programming\n"
+msgstr "flash: neznáma chyba pri programovaní\n"
+
+#: src/flash/intel.c:469
+msgid "supported: 28Fxxxx, 2 x 16 bit"
+msgstr "podporované: 28Fxxxx, 2 x 16 bitov"
+
+#: src/flash/intel.c:481
+msgid "supported: 28Fxxxx, 1 x 16 bit"
+msgstr "podporované: 28Fxxxx, 1 x 16 bitov"
+
+#: src/flash/intel.c:493
+msgid "supported: 28Fxxxx, 1 x 8 bit"
+msgstr "podporované: 28Fxxxx, 1 x 8 bitov"
+
+#: src/jtag.c:295
+#, c-format
+msgid "'%s' must not be run suid root!\n"
+msgstr ""
+
+#: src/jtag.c:356
+#, fuzzy, c-format
+msgid "%s #%s\n"
+msgstr "%-13s %s\n"
+
+#: src/jtag.c:359
+#, c-format
+msgid "Usage: %s [OPTIONS] [FILE [FILE ... ]] \n"
+msgstr ""
+
+#: src/jtag.c:362
+#, c-format
+msgid " -h, --help display this help and exit\n"
+msgstr ""
+
+#: src/jtag.c:363
+#, c-format
+msgid " -v, --version display version information and exit\n"
+msgstr ""
+
+#: src/jtag.c:365
+#, c-format
+msgid " -n, --norc disable reading ~/.jtag/rc on startup\n"
+msgstr ""
+
+#: src/jtag.c:366
+#, c-format
+msgid " -i, --interactive enter interactive mode after reading files\n"
+msgstr ""
+
+#: src/jtag.c:367
+#, c-format
+msgid " -q, --quiet Do not print help on startup\n"
+msgstr ""
+
+#: src/jtag.c:369
+#, c-format
+msgid " [FILE] file containing commands to execute\n"
+msgstr ""
+
+#: src/jtag.c:372
+#, c-format
+msgid " Please report bugs at http://www.urjtag.org\n"
+msgstr ""
+
+#: src/jtag.c:379
+#, c-format
+msgid ""
+"\n"
+"%s #%s\n"
+"\n"
+"Copyright (C) 2002, 2003 ETC s.r.o.\n"
+"Copyright (C) 2007, 2008 Kolja Waschk and the respective authors\n"
+msgstr ""
+
+#: src/jtag.c:384
+#, c-format
+msgid ""
+"\n"
+"This program is free software; you can redistribute it and/or modify\n"
+"it under the terms of the GNU General Public License as published by\n"
+"the Free Software Foundation; either version 2 of the License, or\n"
+"(at your option) any later version.\n"
+"\n"
+"This program is distributed in the hope that it will be useful,\n"
+"but WITHOUT ANY WARRANTY; without even the implied warranty of\n"
+"MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the\n"
+"GNU General Public License for more details.\n"
+"\n"
+"You should have received a copy of the GNU General Public License\n"
+"along with this program; if not, write to the Free Software\n"
+"Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA\n"
+msgstr ""
+
+#: src/jtag.c:439
+#, fuzzy, c-format
+msgid ""
+"\n"
+"%s #%s\n"
+"Copyright (C) 2002, 2003 ETC s.r.o.\n"
+"Copyright (C) 2007, 2008 Kolja Waschk and the respective authors\n"
+"\n"
+"%s is free software, covered by the GNU General Public License, and you are\n"
+"welcome to change it and/or distribute copies of it under certain "
+"conditions.\n"
+"There is absolutely no warranty for %s.\n"
+"\n"
+msgstr ""
+"%s\n"
+"Autorské práva © 2002, 2003 ETC s.r.o.\n"
+"%s je voľný softvér, pokrytý Všeobecnou verejnou licenciou GNU a môžete ho\n"
+"meniť a/alebo distribuovať jeho kópie za určitých podmienok.\n"
+"Neposkytuje sa žiadna záruka pre %s.\n"
+"\n"
+
+#: src/jtag.c:455
+#, fuzzy, c-format
+msgid "WARNING: %s may damage your hardware!\n"
+msgstr ""
+"Upozornenie: %s môže poškodiť váš hardvér! Napíšte \"quit\" pre ukončenie!\n"
+"\n"
+
+#: src/jtag.c:456
+#, fuzzy, c-format
+msgid ""
+"Type \"quit\" to exit, \"help\" for help.\n"
+"\n"
+msgstr ""
+"Napíšte \"help\" pre získanie pomoci.\n"
+"\n"
+
+#: src/part/data_register.c:46
+#, c-format
+msgid "Warning: Data register name too long\n"
+msgstr "Upozornenie: Názov dátového registra je príliš dlhý\n"
+
+#: src/part/instruction.c:46
+#, c-format
+msgid "Warning: Instruction name too long\n"
+msgstr "Upozornenie: Názov inštrukcie je príliš dlhý\n"
+
+#: src/part/part.c:194
+#, c-format
+msgid "signal '%s' cannot be set as output\n"
+msgstr "signál '%s' nemôže byť nastavený ako výstup\n"
+
+#: src/part/part.c:204
+#, c-format
+msgid "signal '%s' cannot be set as input\n"
+msgstr "signál '%s' nemôže byť nastavený ako vstup\n"
+
+#: src/part/part.c:228
+#, c-format
+msgid "signal '%s' is not input signal\n"
+msgstr "signál '%s' nie je vstupný\n"
+
+#: src/part/part.c:245
+#, c-format
+msgid "%%-%ds %%-%ds %%-%ds %%-%ds %%-%ds\n"
+msgstr "%%-%ds %%-%ds %%-%ds %%-%ds %%-%ds\n"
+
+#: src/part/part.c:254 src/part/part.c:256
+msgid "(none)"
+msgstr "(nič)"
+
+#: src/svf/svf.c:351 src/svf/svf.c:529 src/svf/svf.c:868 src/svf/svf.c:872
+#, fuzzy, c-format
+msgid "out of memory"
+msgstr "nedostatok pamäte\n"
+
+#: src/svf/svf.c:449
+#, c-format
+msgid "Error %s: mismatch at position %d for TDO\n"
+msgstr ""
+
+#: src/svf/svf.c:601 src/svf/svf.c:1011
+#, c-format
+msgid "Warning %s: command %s not implemented\n"
+msgstr ""
+
+#: src/svf/svf.c:634
+#, c-format
+msgid "Error %s: only TCK is supported for RUNTEST.\n"
+msgstr ""
+
+#: src/svf/svf.c:638
+#, c-format
+msgid "Error %s: maximum time must be larger or equal to minimum time.\n"
+msgstr ""
+
+#: src/svf/svf.c:644
+#, c-format
+msgid "Warning %s: maximum time for RUNTEST not guaranteed.\n"
+msgstr ""
+
+#: src/svf/svf.c:645
+#, c-format
+msgid " This message is only displayed once.\n"
+msgstr ""
+
+#: src/svf/svf.c:669
+#, c-format
+msgid "Error %s: Maximum cable clock frequency required for RUNTEST.\n"
+msgstr ""
+
+#: src/svf/svf.c:670
+#, c-format
+msgid " Set the cable frequency with 'FREQUENCY <Hz>'.\n"
+msgstr ""
+
+#: src/svf/svf.c:820
+#, c-format
+msgid "Error %s: first %s command after length change must have a TDI value.\n"
+msgstr ""
+
+#: src/svf/svf.c:845
+#, c-format
+msgid "Error %s: SIR command length inconsistent.\n"
+msgstr ""
+
+#: src/svf/svf.c:946
+#, c-format
+msgid "Error %s: no further TRST command allowed after mode ABSENT\n"
+msgstr ""
+
+#: src/svf/svf.c:966
+#, c-format
+msgid "Error %s: TRST ABSENT must not be issued after a STATE command\n"
+msgstr ""
+
+#: src/svf/svf.c:972
+#, c-format
+msgid "Error %s: TRST ABSENT must not be issued after an SIR or SDR command\n"
+msgstr ""
+
+#: src/svf/svf.c:982
+#, c-format
+msgid "Warning %s: unimplemented mode '%s' for TRST\n"
+msgstr ""
+
+#: src/svf/svf.c:1070
+#, fuzzy, c-format
+msgid "Error %s: no JTAG chain available\n"
+msgstr "Chyba: Nepodarilo sa zdetekovať koniec JTAG reťazca!\n"
+
+#: src/svf/svf.c:1074
+#, c-format
+msgid "Error %s: chain without any parts\n"
+msgstr ""
+
+#: src/svf/svf.c:1090
+#, c-format
+msgid "Error %s: could not establish SDR register\n"
+msgstr ""
+
+#: src/svf/svf.c:1122
+#, c-format
+msgid "Error %s: could not establish SIR instruction\n"
+msgstr ""
+
+#: src/svf/svf.c:1156
+#, c-format
+msgid ""
+"Mismatches occurred between scanned device output and expected TDO values.\n"
+msgstr ""
+
+#: src/svf/svf.c:1158
+#, c-format
+msgid "Scanned device output matched expected TDO values.\n"
+msgstr ""
+
+#: svf_flex.l:351
+#, c-format
+msgid "Parsing %6d/%d (%3.0d%%)"
+msgstr ""
+
+#: src/tap/cable/arcom.c:129
+msgid "Arcom JTAG Cable"
+msgstr "JTAG kábel Arcom"
+
+#: src/tap/cable/byteblaster.c:154
+msgid ""
+"Altera ByteBlaster/ByteBlaster II/ByteBlasterMV Parallel Port Download Cable"
+msgstr ""
+"JTAG kábel Altera ByteBlaster/ByteBlaster II/ByteBlasterMV pre paralelný port"
+
+#: src/tap/cable.c:175
+#, c-format
+msgid "Failed to allocate memory for cable activity queue.\n"
+msgstr ""
+
+#: src/tap/cable.c:220
+#, c-format
+msgid "Out of memory: couldn't resize activity queue to %d\n"
+msgstr ""
+
+#: src/tap/cable.c:225
+#, c-format
+msgid "(Resized JTAG activity queue to hold max %d items)\n"
+msgstr ""
+
+#: src/tap/cable.c:405 src/tap/cable.c:463
+#, c-format
+msgid "Internal error: Got wrong type of result from queue (%d? %p.%d)\n"
+msgstr ""
+
+#: src/tap/cable.c:469
+#, c-format
+msgid "Internal error: Got wrong signal's value from queue (%d? %p.%d)\n"
+msgstr ""
+
+#: src/tap/cable.c:523
+#, c-format
+msgid "Internal error: Got wrong type of result from queue (#%d %p.%d)\n"
+msgstr ""
+
+#: src/tap/cable.c:529
+#, c-format
+msgid "Internal error: Wanted transfer result but none was queued\n"
+msgstr ""
+
+#: src/tap/cable/dlc5.c:125
+msgid "Xilinx DLC5 JTAG Parallel Cable III"
+msgstr "Xilinx DLC5 JTAG paralelný kábel III"
+
+#: src/tap/cable/ea253.c:129
+msgid "ETC EA253 JTAG Cable"
+msgstr "JTAG kábel ETC EA253"
+
+#: src/tap/cable/ei012.c:131
+msgid "ETC EI012 JTAG Cable"
+msgstr "JTAG kábel ETC EI012"
+
+#: src/tap/cable/ft2232.c:248
+#, c-format
+msgid "Warning: Setting lowest supported frequency for FT2232: %d\n"
+msgstr ""
+
+#: src/tap/cable/ft2232.c:680
+#, c-format
+msgid "Error: Please power on the TARGET board and connect VCC signal!\n"
+msgstr ""
+
+#: src/tap/cable/ft2232.c:1662
+#, c-format
+msgid ""
+"Usage: cable %s [vid=VID] [pid=PID] [desc=DESC] [driver=DRIVER]\n"
+"\n"
+"VID vendor ID (hex), defaults to %04X\n"
+"PID product ID (hex), defaults to %04X\n"
+"DESC Some string to match in description or serial no.\n"
+"DRIVER usbconn driver, either ftdi-mpsse or ftd2xx-mpsse\n"
+" defaults to %s if not specified\n"
+"\n"
+msgstr ""
+
+#: src/tap/cable/ft2232.c:1680
+msgid "Generic FTDI FT2232 Cable"
+msgstr ""
+
+#: src/tap/cable/ft2232.c:1712
+msgid "Olimex ARM-USB-OCD[-TINY] (FT2232) Cable"
+msgstr ""
+
+#: src/tap/cable/ft2232.c:1758
+msgid "Analog Devices Blackfin gnICE (FT2232) Cable (EXPERIMENTAL)"
+msgstr ""
+
+#: src/tap/cable/ft2232.c:1790
+msgid "Amontec JTAGkey (FT2232) Cable"
+msgstr ""
+
+#: src/tap/cable/ft2232.c:1822
+msgid "OOCDLink-s (FT2232) Cable (EXPERIMENTAL)"
+msgstr ""
+
+#: src/tap/cable/ft2232.c:1854
+msgid "Turtelizer 2 Rev. B (FT2232) Cable (EXPERIMENTAL)"
+msgstr ""
+
+#: src/tap/cable/ft2232.c:1886
+msgid "USB to JTAG Interface (FT2232) Cable (EXPERIMENTAL)"
+msgstr ""
+
+#: src/tap/cable/ft2232.c:1918
+msgid "Xverve DT-USB-ST Signalyzer Tool (FT2232) Cable (EXPERIMENTAL)"
+msgstr ""
+
+#: src/tap/cable/ft2232.c:1950
+msgid "TinCanTools Flyswatter Cable"
+msgstr ""
+
+#: src/tap/cable/ft2232.c:1982
+msgid "KrisTech usbScarabeus2 (FT2232) Cable"
+msgstr ""
+
+#: src/tap/cable/generic.c:110
+#, c-format
+msgid "No space in cable activity results queue.\n"
+msgstr ""
+
+#: src/tap/cable/generic.c:389
+#, c-format
+msgid "calibration error, wall clock is not monotonically increasing\n"
+msgstr ""
+
+#: src/tap/cable/generic_parport.c:58 src/tap/cable/jim.c:54
+#, c-format
+msgid "not enough arguments!\n"
+msgstr ""
+
+#: src/tap/cable/generic_parport.c:67
+#, fuzzy, c-format
+msgid "Unknown port driver: %s\n"
+msgstr "neznámy dátový register '%s'\n"
+
+#: src/tap/cable/generic_parport.c:112
+#, c-format
+msgid ""
+"Usage: cable %s parallel PORTADDR\n"
+" or: cable %s ppdev PPDEV\n"
+" or: cable %s ppi PPIDEV\n"
+"\n"
+"PORTADDR parallel port address (e.g. 0x378)\n"
+"PPDEV ppdev device (e.g. /dev/parport0)\n"
+"PPIDEF ppi device (e.g. /dev/ppi0)\n"
+"\n"
+msgstr ""
+
+#: src/tap/cable/generic_usbconn.c:217
+#, c-format
+msgid "Couldn't connect to suitable USB device.\n"
+msgstr ""
+
+#: src/tap/cable/generic_usbconn.c:253
+#, c-format
+msgid ""
+"Usage: cable %s [vid=VID] [pid=PID] [desc=DESC] [...]\n"
+"\n"
+"VID USB Device Vendor ID (hex, e.g. 0abc)\n"
+"PID USB Device Product ID (hex, e.g. 0abc)\n"
+"DESC Some string to match in description or serial no.\n"
+"\n"
+msgstr ""
+
+#: src/tap/cable/jim.c:58
+#, c-format
+msgid "JTAG target simulator JIM - work in progress!\n"
+msgstr ""
+
+#: src/tap/cable/jim.c:62
+#, fuzzy, c-format
+msgid "Initialization failed.\n"
+msgstr "inicializácia zbernice zlyhala!\n"
+
+#: src/tap/cable/jim.c:151
+#, c-format
+msgid "Usage: cable %s\n"
+msgstr ""
+
+#: src/tap/cable/jim.c:159
+msgid "JTAG target simulator JIM"
+msgstr ""
+
+#: src/tap/cable/jlink.c:572
+msgid "Segger/IAR J-Link, Atmel SAM-ICE and others."
+msgstr ""
+
+#: src/tap/cable/keithkoep.c:141
+msgid "Keith & Koep JTAG cable"
+msgstr "JTAG kábel Keith & Koep"
+
+#: src/tap/cable/lattice.c:131
+#, fuzzy
+msgid "Lattice Parallel Port JTAG Cable"
+msgstr "JTAG kábel Macraigor Wiggler"
+
+#: src/tap/cable/mpcbdm.c:142
+msgid "Mpcbdm JTAG cable"
+msgstr "JTAG kábel Mpcbdm"
+
+#: src/tap/cable/triton.c:143
+msgid "Ka-Ro TRITON Starterkit II (PXA255/250) JTAG Cable"
+msgstr "JTAG kábel pre Ka-Ro TRITON Starterkit II (PXA255/250)"
+
+#: src/tap/cable/ts7800.c:87 src/tap/cable/vision_ep9307.c:93
+#, fuzzy, c-format
+msgid "Error: unable to open /dev/mem\n"
+msgstr "Chyba: Nedostatok pamäte!\n"
+
+#: src/tap/cable/ts7800.c:97 src/tap/cable/vision_ep9307.c:130
+#, c-format
+msgid "Error: unable to mmap the GPIO registers\n"
+msgstr ""
+
+#: src/tap/cable/ts7800.c:120 src/tap/cable/vision_ep9307.c:155
+#, c-format
+msgid "Error: unable to munmap the GPIO registers\n"
+msgstr ""
+
+#: src/tap/cable/ts7800.c:152 src/tap/cable/vision_ep9307.c:193
+#, c-format
+msgid "Error: This cable type does not accept parameters!\n"
+msgstr ""
+
+#: src/tap/cable/ts7800.c:156
+#, c-format
+msgid "Initializing TS-7800 Built-in JTAG Chain\n"
+msgstr ""
+
+#: src/tap/cable/ts7800.c:160
+#, fuzzy, c-format
+msgid "%s(%d) Out of memory\n"
+msgstr "%s(%d) Nedostatok pamäte.\n"
+
+#: src/tap/cable/ts7800.c:281 src/tap/cable/vision_ep9307.c:320
+#, c-format
+msgid ""
+"Usage: cable %s\n"
+"\n"
+msgstr ""
+
+#: src/tap/cable/ts7800.c:288
+msgid "TS-7800 Built-in JTAG Chain"
+msgstr ""
+
+#: src/tap/cable/usbblaster.c:102
+#, c-format
+msgid "Warning: USB-Blaster frequency is fixed to %ld Hz\n"
+msgstr ""
+
+#: src/tap/cable/usbblaster.c:456
+#, c-format
+msgid ""
+"Usage: cable %s [vid=VID] [pid=PID] [desc=DESC] [driver=DRIVER]\n"
+"\n"
+"VID vendor ID (hex, e.g. 0abc)\n"
+"PID product ID (hex, e.g. 0abc)\n"
+"DESC Some string to match in description or serial no.\n"
+"DRIVER usbconn driver, either ftdi or ftd2xx\n"
+" defaults to %s if not specified\n"
+"\n"
+msgstr ""
+
+#: src/tap/cable/usbblaster.c:472
+msgid "Altera USB-Blaster Cable"
+msgstr ""
+
+#: src/tap/cable/vision_ep9307.c:103
+#, c-format
+msgid "Error: unable to mmap the System Control registers\n"
+msgstr ""
+
+#: src/tap/cable/vision_ep9307.c:122
+#, c-format
+msgid "Error: unable to munmap the System Controller registers\n"
+msgstr ""
+
+#: src/tap/cable/vision_ep9307.c:197
+#, c-format
+msgid "Initializing Vision EP9307 SoM GPIO JTAG Cable\n"
+msgstr ""
+
+#: src/tap/cable/vision_ep9307.c:327
+msgid "Vision EP9307 SoM GPIO JTAG Cable"
+msgstr ""
+
+#: src/tap/cable/wiggler2.c:148
+msgid "Modified (with CPU Reset) WIGGLER JTAG Cable"
+msgstr ""
+
+#: src/tap/cable/wiggler.c:213
+#, c-format
+msgid "Pin mapping failed\n"
+msgstr ""
+
+#: src/tap/cable/wiggler.c:327
+#, c-format
+msgid ""
+"Usage: cable %s parallel PORTADDR [TDO,TRST,TDI,TCK,TMS,SRESET]\n"
+" or: cable %s ppdev PPDEV [TDO,TRST,TDI,TCK,TMS,SRESET]\n"
+" or: cable %s ppi PPIDEV [TDO,TRST,TDI,TCK,TMS,SRESET]\n"
+"\n"
+"PORTADDR parallel port address (e.g. 0x378)\n"
+"PPDEV ppdev device (e.g. /dev/parport0)\n"
+"PPIDEF ppi device (e.g. /dev/ppi0)\n"
+"TDO, ... parallel port bit number, prepend '#' for inversion\n"
+" default is '%s'\n"
+"\n"
+msgstr ""
+
+#: src/tap/cable/wiggler.c:359
+msgid "Macraigor Wiggler JTAG Cable"
+msgstr "JTAG kábel Macraigor Wiggler"
+
+#: src/tap/cable/wiggler.c:377
+#, fuzzy
+msgid "Excelpoint IGLOO JTAG Cable"
+msgstr "JTAG kábel Arcom"
+
+#: src/tap/cable/xpc.c:634
+msgid "Xilinx Platform Cable USB internal chain"
+msgstr ""
+
+#: src/tap/cable/xpc.c:660
+msgid "Xilinx Platform Cable USB external chain"
+msgstr ""
+
+#: src/tap/chain.c:149 src/tap/chain.c:200
+#, c-format
+msgid "%s(%d) Part %d without active instruction\n"
+msgstr "%s(%d) Súčiastka %d bez aktívnej inštrukcie\n"
+
+#: src/tap/chain.c:204
+#, c-format
+msgid "%s(%d) Part %d without data register\n"
+msgstr "%s(%d) Súčiastka %d bez dátového registra\n"
+
+#: src/tap/detect.c:59
+#, c-format
+msgid "Cannot open %s\n"
+msgstr "Nepodarilo sa otvoriť %s\n"
+
+#: src/tap/detect.c:206
+#, c-format
+msgid "IR length: %d\n"
+msgstr "Dĺžka IR: %d\n"
+
+#: src/tap/detect.c:223
+#, c-format
+msgid "Unable to detect JTAG chain length\n"
+msgstr "Nepodarilo sa zdetekovať dĺžku JTAG reťazca\n"
+
+#: src/tap/detect.c:226
+#, c-format
+msgid "Chain length: %d\n"
+msgstr "Dĺžka reťazca: %d\n"
+
+#: src/tap/detect.c:267
+#, fuzzy, c-format
+msgid "Device Id: %s (0x%016<PRIX64>)\n"
+msgstr "Id zariadenia: %s\n"
+
+#: src/tap/detect.c:296
+#, c-format
+msgid " Unknown manufacturer!\n"
+msgstr " Neznámy výrobca!\n"
+
+#: src/tap/detect.c:302
+#, c-format
+msgid " Manufacturer: %s\n"
+msgstr " Výrobca: %s\n"
+
+#: src/tap/detect.c:304
+#, c-format
+msgid "Warning: Manufacturer too long\n"
+msgstr "Upozornenie: Výrobca je príliš dlhý\n"
+
+#: src/tap/detect.c:320
+#, c-format
+msgid " Unknown part!\n"
+msgstr " Neznáma súčiastka!\n"
+
+#: src/tap/detect.c:326
+#, fuzzy, c-format
+msgid " Part(%d): %s\n"
+msgstr " Súčiastka: %s\n"
+
+#: src/tap/detect.c:328
+#, c-format
+msgid "Warning: Part too long\n"
+msgstr "Upozornenie: Súčiastka je príliš dlhá\n"
+
+#: src/tap/detect.c:344
+#, c-format
+msgid " Unknown stepping!\n"
+msgstr " Neznámy stupeň!\n"
+
+#: src/tap/detect.c:350
+#, c-format
+msgid " Stepping: %s\n"
+msgstr " Stupeň: %s\n"
+
+#: src/tap/detect.c:352
+#, c-format
+msgid "Warning: Stepping too long\n"
+msgstr "Upozornenie: Stupeň je príliš dlhý\n"
+
+#: src/tap/detect.c:382
+#, c-format
+msgid "Error: Unable to detect JTAG chain end!\n"
+msgstr "Chyba: Nepodarilo sa zdetekovať koniec JTAG reťazca!\n"
+
+#: src/tap/detect.c:409
+#, fuzzy, c-format
+msgid "Error: Unable to allocate a register!\n"
+msgstr "Chyba: Nepodarilo sa zdetekovať koniec JTAG reťazca!\n"
+
+#: src/tap/detect.c:417
+#, fuzzy, c-format
+msgid "Error: Unable to allocate space for parts!\n"
+msgstr "Chyba: Nepodarilo sa zdetekovať koniec JTAG reťazca!\n"
+
+#: src/tap/detect.c:424
+#, fuzzy, c-format
+msgid "Error: Unable to allocate space for a part!\n"
+msgstr "Chyba: Nepodarilo sa zdetekovať koniec JTAG reťazca!\n"
+
+#: src/tap/detect.c:440
+#, c-format
+msgid "Error: could not set BR register"
+msgstr ""
+
+#: src/tap/detect.c:462
+#, c-format
+msgid "Error: could not set BYPASS instruction"
+msgstr ""
+
+#: src/tap/discovery.c:108
+#, c-format
+msgid "Warning: TDO seems to be stuck at %d\n"
+msgstr ""
+
+#: src/tap/discovery.c:133
+#, c-format
+msgid "Detecting IR length ... "
+msgstr "Detekujem dĺžku IR ... "
+
+#: src/tap/discovery.c:139 src/tap/discovery.c:171
+#, c-format
+msgid "%d\n"
+msgstr "%d\n"
+
+#: src/tap/discovery.c:142
+#, c-format
+msgid "Error: Invalid IR length!\n"
+msgstr "Chyba: Neplatná dĺžka IR!\n"
+
+#: src/tap/discovery.c:153
+#, c-format
+msgid "Error: Out of memory!\n"
+msgstr "Chyba: Nedostatok pamäte!\n"
+
+#: src/tap/discovery.c:165
+#, c-format
+msgid "Detecting DR length for IR %s ... "
+msgstr "Detekujem dĺžku DR pre IR %s ... "
+
+#: src/tap/parport/direct.c:139
+#, c-format
+msgid "Couldn't load InpOut32.dll; maybe not installed?\n"
+msgstr ""
+
+#: src/tap/parport/direct.c:206 src/tap/parport/ppdev.c:119
+#: src/tap/parport/ppi.c:115
+#, c-format
+msgid "Syntax error!\n"
+msgstr "Chyba syntaxe!\n"
+
+#: src/tap/parport/direct.c:213
+#, c-format
+msgid "Invalid port address!\n"
+msgstr "Neplatná adresa portu!\n"
+
+#: src/tap/parport/direct.c:225
+#, c-format
+msgid "Disconnecting %s from parallel port at 0x%x\n"
+msgstr "Odpájam %s z paralelného portu na adrese 0x%x\n"
+
+#: src/tap/parport/direct.c:231
+#, fuzzy, c-format
+msgid "Initializing parallel port at 0x%x\n"
+msgstr "Inicializujem %s na paralelnom porte na adrese 0x%x\n"
+
+#: src/tap/parport/direct.c:235 src/tap/parport/ppdev.c:134
+#: src/tap/parport/ppi.c:130
+#, c-format
+msgid "%s(%d) Out of memory.\n"
+msgstr "%s(%d) Nedostatok pamäte.\n"
+
+#: src/tap/parport/ppdev.c:125
+#, c-format
+msgid "Disconnecting %s from ppdev port %s\n"
+msgstr "Odpájam %s z ppdev portu %s\n"
+
+#: src/tap/parport/ppdev.c:130
+#, fuzzy, c-format
+msgid "Initializing ppdev port %s\n"
+msgstr "Inicializujem %s na ppdev porte %s\n"
+
+#: src/tap/parport/ppdev.c:148
+#, fuzzy, c-format
+msgid "Could not open port %s: %s\n"
+msgstr "Nepodarilo sa otvoriť %s\n"
+
+#: src/tap/parport/ppdev.c:153
+#, c-format
+msgid "Could not claim ppdev device: %s\n"
+msgstr ""
+
+#: src/tap/parport/ppi.c:121
+#, fuzzy, c-format
+msgid "Disconnecting %s from ppi port %s\n"
+msgstr "Odpájam %s z ppdev portu %s\n"
+
+#: src/tap/parport/ppi.c:126
+#, fuzzy, c-format
+msgid "Initializing on ppi port %s\n"
+msgstr "Inicializujem %s na ppdev porte %s\n"
+
+#: src/tap/tap.c:71 src/tap/tap.c:131 src/tap/tap.c:142
+#, c-format
+msgid "%s: Invalid state: %2X\n"
+msgstr "%s: Neplatný stav: %2X\n"
+
+#: src/tap/usbconn/libftd2xx.c:100
+#, c-format
+msgid "%s(): FT_Write() failed.\n"
+msgstr ""
+
+#: src/tap/usbconn/libftd2xx.c:104 src/tap/usbconn/libftdi.c:89
+#, c-format
+msgid "%s(): Written fewer bytes than requested.\n"
+msgstr ""
+
+#: src/tap/usbconn/libftd2xx.c:123 src/tap/usbconn/libftdi.c:108
+#, c-format
+msgid "%s(): Receive buffer does not exist.\n"
+msgstr ""
+
+#: src/tap/usbconn/libftd2xx.c:130 src/tap/usbconn/libftd2xx.c:190
+#, c-format
+msgid "%s(): Error from FT_Read(): %d\n"
+msgstr ""
+
+#: src/tap/usbconn/libftd2xx.c:134 src/tap/usbconn/libftdi.c:119
+#, c-format
+msgid "%s(): Received less bytes than requested.\n"
+msgstr ""
+
+#: src/tap/usbconn/libftd2xx.c:256 src/tap/usbconn/libftdi.c:224
+#, c-format
+msgid "%s(): Send buffer does not exist.\n"
+msgstr ""
+
+#: src/tap/usbconn/libftd2xx.c:314
+#, c-format
+msgid "Connected to libftd2xx driver.\n"
+msgstr ""
+
+#: src/tap/usbconn/libftd2xx.c:389 src/tap/usbconn/libftd2xx.c:428
+#: src/tap/usbconn/libftd2xx.c:448 src/tap/usbconn/libftd2xx.c:471
+#, c-format
+msgid "%s(): Can't reset device.\n"
+msgstr ""
+
+#: src/tap/usbconn/libftd2xx.c:391 src/tap/usbconn/libftd2xx.c:430
+#: src/tap/usbconn/libftd2xx.c:450 src/tap/usbconn/libftd2xx.c:473
+#, c-format
+msgid "%s(): Can't purge RX buffer.\n"
+msgstr ""
+
+#: src/tap/usbconn/libftd2xx.c:394
+#, c-format
+msgid "%s(): Can't set latency timer.\n"
+msgstr ""
+
+#: src/tap/usbconn/libftd2xx.c:397
+#, c-format
+msgid "%s(): Can't set baudrate.\n"
+msgstr ""
+
+#: src/tap/usbconn/libftd2xx.c:433
+#, c-format
+msgid "%s(): Can't set USB parameters.\n"
+msgstr ""
+
+#: src/tap/usbconn/libftd2xx.c:436
+#, c-format
+msgid "%s(): Can't set special characters.\n"
+msgstr ""
+
+#: src/tap/usbconn/libftd2xx.c:442
+#, c-format
+msgid "%s(): Can't set target latency timer.\n"
+msgstr ""
+
+#: src/tap/usbconn/libftd2xx.c:445
+#, c-format
+msgid "%s(): Can't set MPSSE bitmode.\n"
+msgstr ""
+
+#: src/tap/usbconn/libftdi.c:84
+#, c-format
+msgid "%s(): ftdi_write_data() failed: %s\n"
+msgstr ""
+
+#: src/tap/usbconn/libftdi.c:115 src/tap/usbconn/libftdi.c:168
+#, c-format
+msgid "%s(): Error from ftdi_read_data(): %s\n"
+msgstr ""
+
+#: src/tap/usbconn/libftdi.c:286
+#, c-format
+msgid "Connected to libftdi driver.\n"
+msgstr ""
+
+#: src/tap/usbconn/libftdi.c:324
+#, c-format
+msgid "%s() failed: %s\n"
+msgstr ""
+
+#: src/tap/usbconn/libftdi.c:349
+#, c-format
+msgid "%s(): ftdi_usb_purge_buffers() failed: %s\n"
+msgstr ""
+
+#: src/tap/usbconn/libftdi.c:352 src/tap/usbconn/libftdi.c:369
+#, c-format
+msgid "%s(): ftdi_read_data() failed: %s\n"
+msgstr ""
+
+#: src/tap/usbconn/libftdi.c:361
+#, c-format
+msgid "%s(): ftdi_usb_purge_rx_buffer() failed: %s\n"
+msgstr ""
+
+#: src/tap/usbconn/libftdi.c:366
+#, c-format
+msgid "%s(): ftdi_usb_purge_tx_buffer() failed: %s\n"
+msgstr ""
+
+#: src/tap/usbconn/libftdi.c:386
+#, c-format
+msgid "%s(): ftdi_poll_status() failed: %s\n"
+msgstr ""
+
+#: src/tap/usbconn/libftdi.c:391 src/tap/usbconn/libftdi.c:485
+#: src/tap/usbconn/libftdi.c:504
+#, c-format
+msgid "%s(): ftdi_usb_reset() failed: %s\n"
+msgstr ""
+
+#: src/tap/usbconn/libftdi.c:414 src/tap/usbconn/libftdi.c:477
+#, c-format
+msgid "%s(): ftdi_set_latency_timer() failed: %s\n"
+msgstr ""
+
+#: src/tap/usbconn/libftdi.c:427
+#, c-format
+msgid "%s(): ftdi_set_baudrate() failed: %s\n"
+msgstr ""
+
+#: src/tap/usbconn/libftdi.c:481
+#, c-format
+msgid "%s(): ftdi_set_bitmode() failed: %s\n"
+msgstr ""
+
+#~ msgid "supported: AMD 29LV800B; 1x16 Bit"
+#~ msgstr "podporované: AMD 29LV800B; 1x16 bitov"
+
+#, fuzzy
+#~ msgid ""
+#~ "Blackfin BF537 Stamp compatible bus driver via BSR (JTAG part No. %d)\n"
+#~ msgstr ""
+#~ "Broadcom BCM1250 kompatibilný ovládač zbernice cez BSR (JTAG súčiastka č. "
+#~ "%d)\n"
+
+#, fuzzy
+#~ msgid ""
+#~ "Blackfin BF537 EZ-KIT compatible bus driver via BSR (JTAG part No. %d)\n"
+#~ msgstr ""
+#~ "Broadcom BCM1250 kompatibilný ovládač zbernice cez BSR (JTAG súčiastka č. "
+#~ "%d)\n"
+
+#, fuzzy
+#~ msgid ""
+#~ "Blackfin BF527 EZ-KIT compatible bus driver via BSR (JTAG part No. %d)\n"
+#~ msgstr ""
+#~ "Broadcom BCM1250 kompatibilný ovládač zbernice cez BSR (JTAG súčiastka č. "
+#~ "%d)\n"
+
+#~ msgid "Intel PXA2x0 compatible bus driver via BSR (JTAG part No. %d)\n"
+#~ msgstr ""
+#~ "Intel PXA2x0 kompatibilný ovládač zbernice cez BSR (JTAG súčiastka č. %"
+#~ "d)\n"
+
+#, fuzzy
+#~ msgid "Intel PXA27x compatible bus driver via BSR (JTAG part No. %d)\n"
+#~ msgstr ""
+#~ "Intel PXA2x0 kompatibilný ovládač zbernice cez BSR (JTAG súčiastka č. %"
+#~ "d)\n"
+
+#~ msgid "AMD"
+#~ msgstr "AMD"
+
+#, fuzzy
+#~ msgid "Am29LV040B"
+#~ msgstr "Am29LV800B"
+
+#~ msgid "Am29LV640D/Am29LV641D/Am29LV642D"
+#~ msgstr "Am29LV640D/Am29LV641D/Am29LV642D"
+
+#~ msgid "Am29LV800B"
+#~ msgstr "Am29LV800B"
+
+#, fuzzy
+#~ msgid "MX29LV160B"
+#~ msgstr "Am29LV800B"
+
+#, fuzzy
+#~ msgid "AM29LV160DB"
+#~ msgstr "Am29LV800B"
+
+#, fuzzy
+#~ msgid "Am29LV065D"
+#~ msgstr "Am29LV800B"
+
+#, fuzzy
+#~ msgid "Am29C040B\t-\t"
+#~ msgstr "Am29LV800B"
+
+#, fuzzy
+#~ msgid "Am29LV040B\t-\t"
+#~ msgstr "Am29LV800B"
+
+#, fuzzy
+#~ msgid "addr: 0x%08X\r"
+#~ msgstr "adresa: 0x%08X"
+
+#~ msgid "Error during file read.\n"
+#~ msgstr "Chyba pri čítaní zo súboru.\n"
+
+#, fuzzy
+#~ msgid "Disconnecting %s\n"
+#~ msgstr "Odpájam %s z ppdev portu %s\n"
+
+#, fuzzy
+#~ msgid "Disconnecting %s from FTDI device %s\n"
+#~ msgstr "Odpájam %s z ppdev portu %s\n"
+
+#, fuzzy
+#~ msgid "Initializing %s on FTDI device %s\n"
+#~ msgstr "Inicializujem %s na ppdev porte %s\n"
+
+#, fuzzy
+#~ msgid "Initializing on FTDI device %s\n"
+#~ msgstr "Inicializujem %s na ppdev porte %s\n"
+
+#, fuzzy
+#~ msgid "Disconnecting %s, device %s\n"
+#~ msgstr "Odpájam %s z ppdev portu %s\n"
+
+#, fuzzy
+#~ msgid "Initializing %s, device %s\n"
+#~ msgstr "Inicializujem %s na ppdev porte %s\n"
+
+#, fuzzy
+#~ msgid "Initializing device %s\n"
+#~ msgstr "Inicializujem %s na ppdev porte %s\n"
+
+#~ msgid ""
+#~ "Usage: %s FILENAME\n"
+#~ "Run command sequence from external FILENAME from the repository.\n"
+#~ "\n"
+#~ "FILENAME Name of the file with commands\n"
+#~ msgstr ""
+#~ "Použitie: %s SÚBOR\n"
+#~ "Spustiť sekvenciu príkazov z externého štandardného SÚBORu.\n"
+#~ "\n"
+#~ "SÚBOR Názov súboru s príkazmi\n"
+
+#~ msgid "supported: AMD 29LV160; 1x8 Bit"
+#~ msgstr "podporované: AMD 29LV160; 1x8 bitov"
+
+#~ msgid "Unknown connection type: %s\n"
+#~ msgstr "Neznámy typ pripojenia: %s\n"
+
+#~ msgid ""
+#~ "Usage: %s PORTADDR CABLE\n"
+#~ "Usage: %s DEV CABLE\n"
+#~ "Select JTAG cable connected to parallel port.\n"
+#~ "\n"
+#~ "PORTADDR parallel port address (e.g. 0x378)\n"
+#~ "CABLE cable type\n"
+#~ "DEV ppdev device (e.g. /dev/parport0)\n"
+#~ "\n"
+#~ "List of supported cables:\n"
+#~ "%-13s No cable connected\n"
+#~ msgstr ""
+#~ "Použitie: %s PORTADRESA KÁBEL\n"
+#~ "Použitie: %s ZARIADENIE KÁBEL\n"
+#~ "Nastaviť JTAG kábel pripojený k paralelnému portu.\n"
+#~ "\n"
+#~ "PORTADRESA adresa paralelného portu (napr. 0x378)\n"
+#~ "KÁBEL typ kábla\n"
+#~ "ZARIADENIE zariadenie ppdev (napr. /dev/parport0)\n"
+#~ "\n"
+#~ "Zoznam podporovaných káblov:\n"
+#~ "%-13s Žiaden kábel nepripojený\n"
+
+#~ msgid "Note: Supported configuration is 2 x 16 bit or 1 x 16 bit only\n"
+#~ msgstr ""
+#~ "Poznámka: Podporovaná konfigurácia je len 2 x 16 bitov alebo 1 x 16 "
+#~ "bitov\n"
+
+#~ msgid "Changed cable to 'none'\n"
+#~ msgstr "Kábel zmenený na 'žiaden'\n"
--- /dev/null
+Makefile.in
+Makefile
+.deps
+jtag
+bsdl2jtag
--- /dev/null
+#
+# $Id$
+#
+# Copyright (C) 2002 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Marcel Telka <marcel@telka.sk>, 2002.
+#
+
+include $(top_srcdir)/Makefile.rules
+
+SUBDIRS = \
+ flash \
+ lib \
+ tap \
+ part \
+ bus \
+ cmd
+
+if ENABLE_SVF
+SUBDIRS += svf
+endif
+
+if ENABLE_BSDL
+SUBDIRS += bsdl
+endif
+
+bin_PROGRAMS = \
+ jtag
+
+dist_bin_SCRIPTS = \
+ bsdl2jtag
+
+jtag_SOURCES = \
+ jtag.c
+
+jtag_DEPENDENCIES = \
+ flash/libflash.a \
+ lib/libjtaglib.a \
+ tap/libtap.a \
+ part/libpart.a \
+ bus/libbus.a \
+ cmd/libcmd.a
+
+if ENABLE_SVF
+jtag_DEPENDENCIES += svf/libsvf.a
+endif
+
+if ENABLE_BSDL
+jtag_DEPENDENCIES += bsdl/libbsdl.a
+endif
+
+jtag_LDADD = \
+ -Lcmd -lcmd \
+ -Ltap -ltap \
+ -Lpart -lpart \
+ -Llib -ljtaglib \
+ -Lflash -lflash \
+ -Ltap -ltap \
+ -Lflash -lflash \
+ -Lbus -lbus \
+ -lm \
+ @FTD2XXLIB@ \
+ @LIBINTL@
+
+if ENABLE_SVF
+jtag_LDADD += -Lsvf -lsvf
+endif
+
+if ENABLE_BSDL
+jtag_LDADD += -Lbsdl -lbsdl
+endif
+
+if ENABLE_JIM
+SUBDIRS += jim
+jtag_LDADD += -Ljim -ljim
+jtag_DEPENDENCIES += jim/libjim.a
+endif
+
+if DMALLOC
+jtag_LDADD += -ldmalloc
+endif
+
+localedir = $(datadir)/locale
+INCLUDES = -DLOCALEDIR=\"$(localedir)\"
--- /dev/null
+#
+# $Id$
+#
+# Copyright (C) 2007, Arnim Laeuger
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+
+include $(top_srcdir)/Makefile.rules
+
+noinst_LIBRARIES = libbsdl.a
+
+libbsdl_a_SOURCES = \
+ vhdl_bison.y \
+ vhdl_flex.l \
+ bsdl_bison.y \
+ bsdl_flex.l \
+ bsdl.c \
+ bsdl_sem.c
+
+noinst_HEADERS = \
+ bsdl_bison.h \
+ bsdl_config.h \
+ bsdl_msg.h \
+ bsdl_parser.h \
+ bsdl_sysdep.h \
+ bsdl_types.h \
+ vhdl_bison.h \
+ vhdl_parser.h
+
+# additional dependencies
+# - all files depend on bsdl_config.h which dynamically generated
+# - *_flex files must be processed after their *_bison counterparts
+# to ensure that *_bison.h is present
+vhdl_flex.$(OBJEXT): vhdl_bison.$(OBJEXT) bsdl_config.h
+vhdl_bison.$(OBJEXT): bsdl_config.h
+bsdl_flex.$(OBJEXT): bsdl_bison.$(OBJEXT) bsdl_config.h
+bsdl_bison.$(OBJEXT): bsdl_config.h
+bsdl.$(OBJEXT) : bsdl_config.h
+bsdl_sem.$(OBJEXT): bsdl_config.h
+
+vhdl_bison.h: vhdl_bison.c
+bsdl_bison.h: bsdl_bison.c
+
+bsdl_config.h: ../../config.h
+ grep 'DMALLOC' $< > $@
+
+AM_LFLAGS = -i
+
+MAINTAINERCLEANFILES = \
+ vhdl_bison.c \
+ vhdl_bison.h \
+ bsdl_bison.c \
+ bsdl_bison.h \
+ vhdl_flex.c \
+ bsdl_config.h
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2007, Arnim Laeuger
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Arnim Laeuger <arniml@users.sourceforge.net>, 2007.
+ *
+ */
+
+#include <stdlib.h>
+#include <stdio.h>
+#include <stdarg.h>
+#define __USE_GNU
+#include <string.h>
+
+#include <dirent.h>
+#include <sys/stat.h>
+
+#include "sysdep.h"
+
+#include "jtag.h"
+#include "cmd.h"
+
+//#include "bsdl_local.h"
+#include "bsdl_types.h"
+#include "vhdl_parser.h"
+#include "bsdl_parser.h"
+
+#include "bsdl_msg.h"
+
+#ifdef DMALLOC
+#include "dmalloc.h"
+#endif
+
+
+/*****************************************************************************
+ * bsdl_msg( proc_mode, type, format, ... )
+ *
+ * Main printing function for the BSDL subsystem.
+ *
+ * Parameters
+ * proc_mode : processing mode, consisting of BSDL_MODE_* bits
+ * type : one of the BSDL_MSG_* defines, determines message tag
+ * format : printf format
+ * ... : additional parameters to fill the printf format string
+ *
+ * Returns
+ * void
+ ****************************************************************************/
+void bsdl_msg( int proc_mode, int type, const char *format, ... )
+{
+ va_list lst;
+
+ va_start( lst, format );
+ switch (type)
+ {
+ case BSDL_MSG_NOTE:
+ if (!(proc_mode & BSDL_MODE_MSG_NOTE))
+ return;
+ printf( "-N- " );
+ break;
+ case BSDL_MSG_WARN:
+ if (!(proc_mode & BSDL_MODE_MSG_WARN))
+ return;
+ printf( "-W- " );
+ break;
+ case BSDL_MSG_ERR:
+ if (!(proc_mode & BSDL_MODE_MSG_ERR))
+ return;
+ printf( "-E- " );
+ break;
+ case BSDL_MSG_FATAL:
+ if (!(proc_mode & BSDL_MODE_MSG_FATAL))
+ return;
+ printf( "-F- " );
+ break;
+ default:
+ printf( "-?- " );
+ break;
+ }
+ vprintf( format, lst );
+ va_end( lst );
+}
+
+
+/*****************************************************************************
+ * bsdl_read_file( chain, BSDL_File_Name, proc_mode, idcode )
+ *
+ * Read, parse and optionally apply contents of BSDL file.
+ *
+ * Parameters
+ * chain : pointer to active chain structure
+ * BSDL_File_Name : name of BSDL file to read
+ * proc_mode : processing mode, consisting of BSDL_MODE_* bits
+ * idcode : reference idcode string
+ *
+ * Returns
+ * < 0 : Error occured, parse/syntax problems or out of memory
+ * = 0 : No errors, idcode not checked or mismatching
+ * > 0 : No errors, idcode checked and matched
+ *
+ ****************************************************************************/
+int bsdl_read_file( chain_t *chain, const char *BSDL_File_Name, int proc_mode,
+ const char *idcode )
+{
+ bsdl_globs_t *globs = &(chain->bsdl);
+ FILE *BSDL_File;
+ vhdl_parser_priv_t *vhdl_parser_priv;
+ jtag_ctrl_t jtag_ctrl;
+ int Compile_Errors = 1;
+ int result;
+
+ if (globs->debug)
+ proc_mode |= BSDL_MODE_MSG_ALL;
+
+ jtag_ctrl.proc_mode = proc_mode;
+
+ /* perform some basic checks */
+ if (proc_mode & BSDL_MODE_INSTR_EXEC)
+ {
+ if (chain == NULL)
+ {
+ bsdl_msg( proc_mode, BSDL_MSG_ERR, _("No JTAG chain available\n") );
+ return -1;
+ }
+ if (chain->parts == NULL)
+ {
+ bsdl_msg( proc_mode, BSDL_MSG_ERR, _("Chain without any parts\n") );
+ return -1;
+ }
+ if (!(chain && chain->parts))
+ return -1;
+
+ jtag_ctrl.chain = chain;
+ jtag_ctrl.part = chain->parts->parts[chain->active_part];
+ }
+ else
+ {
+ jtag_ctrl.chain = NULL;
+ jtag_ctrl.part = NULL;
+ }
+
+ BSDL_File = fopen( BSDL_File_Name, "r" );
+
+ bsdl_msg( proc_mode, BSDL_MSG_NOTE, _("Reading file '%s'\n"), BSDL_File_Name );
+
+ if (BSDL_File == NULL) {
+ bsdl_msg( proc_mode,
+ BSDL_MSG_ERR, _("Unable to open BSDL file '%s'\n"), BSDL_File_Name );
+ return -1;
+ }
+
+ if ((vhdl_parser_priv = vhdl_parser_init( BSDL_File, &jtag_ctrl )))
+ {
+ vhdl_parser_priv->jtag_ctrl->idcode = NULL;
+
+ vhdlparse( vhdl_parser_priv );
+
+ Compile_Errors = vhdl_flex_get_compile_errors( vhdl_parser_priv->scanner );
+ if (Compile_Errors == 0)
+ {
+ bsdl_msg( proc_mode,
+ BSDL_MSG_NOTE, _("BSDL file '%s' passed VHDL stage correctly\n"),
+ BSDL_File_Name );
+
+ result = bsdl_process_elements( &jtag_ctrl, idcode );
+
+ if (result >= 0)
+ bsdl_msg( proc_mode,
+ BSDL_MSG_NOTE, _("BSDL file '%s' passed BSDL stage correctly\n"),
+ BSDL_File_Name );
+
+ }
+ else
+ {
+ bsdl_msg( proc_mode,
+ BSDL_MSG_ERR, _("BSDL file '%s' contains errors in VHDL stage, stopping\n"),
+ BSDL_File_Name );
+ }
+
+
+ vhdl_parser_deinit( vhdl_parser_priv );
+ }
+
+ return Compile_Errors == 0 ? result : -1;
+}
+
+
+/*****************************************************************************
+ * void bsdl_set_path( chain, pathlist )
+ *
+ * Dissects pathlist and enters its elements to the global variable
+ * bsdl.path_list.
+ *
+ * Parameters
+ * chain : pointer to active chain structure
+ * pathlist : string containing the paths to be stored, format:
+ * <path1>;<path2>;<path3>;...
+ *
+ * Returns
+ * void
+ ****************************************************************************/
+void bsdl_set_path( chain_t *chain, const char *pathlist )
+{
+ bsdl_globs_t *globs = &(chain->bsdl);
+ char *delim;
+ char *elem;
+ char *pathelem;
+ int num;
+ size_t len;
+
+ /* free memory of current path list */
+ if (globs->path_list)
+ {
+ for (num = 0; globs->path_list[num]; num++)
+ if (globs->path_list[num])
+ free( globs->path_list[num] );
+ free( globs->path_list );
+ globs->path_list = NULL;
+ }
+
+ /* run through path list and determine number of elements */
+ for (num = 0, elem = (char *)pathlist; strlen(elem) > 0; )
+ {
+ delim = strchr( elem, ';' );
+ if ((delim - elem > 0) || (delim == NULL))
+ {
+ num++;
+ /* extend path list array */
+ globs->path_list = (char **)realloc( globs->path_list, (num+1) * sizeof(char *) );
+ /* enter path element up to the delimeter */
+ if (delim == NULL)
+ len = strlen( elem );
+ else
+ len = delim-elem;
+ pathelem = malloc( len + 1 );
+ memcpy( pathelem, elem, len );
+ pathelem[len] = '\0';
+ globs->path_list[num-1] = pathelem;
+ globs->path_list[num] = NULL;
+ }
+ elem = delim ? delim + 1 : elem + strlen( elem );
+ }
+
+ if (globs->debug)
+ for (num = 0; globs->path_list[num] != NULL; num++)
+ bsdl_msg( BSDL_MODE_MSG_ALL,
+ BSDL_MSG_NOTE, "%s\n", globs->path_list[num] );
+}
+
+
+/*****************************************************************************
+ * bsdl_scan_files( chain, idcode, proc_mode )
+ *
+ * Scans through all files found via the elements in bsdl_path_list
+ * and does a test read on each of them.
+ * If mode >= 1 is requested, it will read the first BSDL file with matching
+ * idcode in "execute" mode. I.e. all extracted statements are applied to
+ * the current part.
+ *
+ * Parameters
+ * chain : pointer to active chain structure
+ * idcode : reference idcode string
+ * proc_mode : processing mode, consisting of BSDL_MODE_* bits
+ *
+ * Returns
+ * < 0 : Error occured, parse/syntax problems or out of memory
+ * = 0 : No errors, idcode not checked or mismatching
+ * > 0 : No errors, idcode checked and matched
+ *
+ ****************************************************************************/
+int bsdl_scan_files( chain_t *chain, const char *idcode, int proc_mode )
+{
+ bsdl_globs_t *globs = &(chain->bsdl);
+ int idx = 0;
+ int result = 0;
+
+ /* abort if no path list was specified */
+ if (globs->path_list == NULL)
+ return 0;
+
+ while (globs->path_list[idx] && (result <= 0))
+ {
+ DIR *dir;
+
+ if ((dir = opendir( globs->path_list[idx] )))
+ {
+ struct dirent *elem;
+
+ /* run through all elements in the current directory */
+ while ((elem = readdir( dir )) && (result <= 0))
+ {
+ char *name;
+
+ name = (char *)malloc( strlen( globs->path_list[idx] )
+ + strlen( elem->d_name ) + 1 + 1 );
+ if (name)
+ {
+ struct stat buf;
+
+ strcpy( name, globs->path_list[idx] );
+ strcat( name, "/" );
+ strcat( name, elem->d_name );
+
+ if (stat( name, &buf ) == 0)
+ {
+ if (buf.st_mode & S_IFREG)
+ {
+ result = bsdl_read_file( chain, name, proc_mode, idcode );
+ if (result == 1)
+ printf( _(" Filename: %s\n"), name );
+ }
+ }
+
+ free( name );
+ }
+ }
+
+ closedir( dir );
+ }
+ else
+ bsdl_msg( proc_mode,
+ BSDL_MSG_WARN, _("Cannot open directory %s\n"), globs->path_list[idx] );
+
+ idx++;
+ }
+
+ return result;
+}
+
+
+/*
+ Local Variables:
+ mode:C
+ c-default-style:gnu
+ indent-tabs-mode:nil
+ End:
+*/
--- /dev/null
+/*
+ * $Id$
+ *
+ * Original Yacc code by Ken Parker, 1990
+ * Extensions and adaptions for UrJTAG by Arnim Laeuger, 2007
+ *
+ */
+
+/* ----------------------------------------------------------------------- */
+/* */
+/* Yacc code for BSDL */
+/* */
+/* ----------------------------------------------------------------------- */
+/* Date: 901003 */
+
+/*
+
+Email header accompanying the original Yacc code:
+ http://www.eda.org/vug_bbs/bsdl.parser
+
+-----------------------------------8<--------------------------------------
+
+Hello All,
+
+This is this first mailing of the BSDL* Version 0.0 parser specifications
+we are sending to people who request it from our publicized E-Mail address;
+
+ bsdl%hpmtlx@hplabs.HP.com
+
+You are free to redistribute this at will, but we feel that it would be
+better if respondents asked for it directly so that their addresses can
+be entered into our list for future mailings and updates.
+
+It would be helpful if you could confirm receipt of this transmission.
+We also would be very interested to hear about your experiences with this
+information and what you are planning to do with BSDL.
+
+Regards,
+
+Ken Parker
+Hewlett-Packard Company
+
+
+*Boundary-Scan Description Language - as documented in:
+
+"A Language for Describing Boundary-Scan Devices", K.P. Parker
+and S. Oresjo, Proceedings 1990 International Test Conference,
+Washington DC, pp 222-234
+
+
+- -----------------cut here---------------------------------------------------
+
+
+901004.0721 Hewlett-Packard Company
+901016.1049 Manufacturing Test Division
+ P.O. Box 301
+ Loveland, Colorado 80537
+ USA
+
+ October 1990
+Hello BSDL Parser Requestor,
+
+ This Electronic Mail reply contains the computer specifications for
+Hewlett-Packard's Version 0.0 BSDL parser. This section of the reply
+explains the contents of the rest of this file.
+
+This file is composed of seven (7) parts:
+
+ 1) How to use this file
+
+ 2) UNIX* Lex source (lexicographical tokenizing rules)
+
+ 3) UNIX* Yacc source (BNF-like syntax description)
+
+ 4) A sample main program to recognize BSDL.
+
+ 5) A BSDL description of the Texas Instruments 74bct8374 that is
+ recognized by the parser, for testing purposes.
+
+ 6) The VHDL package STD_1149_1_1990 needed by this parser.
+
+ 7) [added 901016] Porting experiences to other systems.
+
+
+RECOMMENDATION: Save a copy of this file in archival storage before
+ processing it via the instructions below. This will
+ allow you to recover from errors, and allow you to
+ compare subsequently released data for changes.
+
+DISCLAIMERS:
+
+1. The IEEE 1149.1 Working Group has not endorsed BSDL Version 0.0 and
+ therefore no person may represent it as an IEEE standard or imply that
+ a resulting IEEE standard will be identical to it.
+
+2. The IEEE 1149.1 Working Group recognizes that BSDL Version 0.0 is a
+ well-conceived initiative that is likely to excelerate the creation
+ of tools that support the 1149.1 standard. As such, changes and
+ enhancements will be carefully considered so as not to needlessly
+ disrupt these development efforts. The overriding goal is the
+ ultimate success of the 1149.1 standard.
+
+LEGAL NOTICES:
+
+ Hewlett-Packard Company makes no warranty of any kind with regard to
+ this information, including, but not limited to, the implied
+ waranties of merchantability and fitness for a particular purpose.
+
+ Hewlett-Packard Company shall not be liable for errors contained
+ herein or direct, indirect, special, incidental, or consequential
+ damages in connection with the furnishing, performance, or use of
+ this material.
+
+
+*UNIX is a trademark of AT&T in the USA and other countries.
+
+*/
+
+
+%pure-parser
+%parse-param {bsdl_parser_priv_t *priv_data}
+%defines
+%name-prefix="bsdl"
+
+%{
+#include <stdlib.h>
+#include <string.h>
+#include <stdio.h>
+#include <ctype.h>
+
+#include "bsdl_sysdep.h"
+
+#include "bsdl_types.h"
+#include "bsdl_msg.h"
+
+/* interface to flex */
+#include "bsdl_bison.h"
+#include "bsdl_parser.h"
+
+#ifdef DMALLOC
+#include "dmalloc.h"
+#endif
+
+#define YYLEX_PARAM priv_data->scanner
+int yylex (YYSTYPE *, void *);
+
+#if 1
+#define ERROR_LIMIT 0
+#define BUMP_ERROR if (bsdl_flex_postinc_compile_errors( priv_data->scanner ) > ERROR_LIMIT) \
+ {Give_Up_And_Quit( priv_data ); YYABORT;}
+#else
+#define BUMP_ERROR {Give_Up_And_Quit( priv_data );YYABORT;}
+#endif
+
+static void Print_Error( bsdl_parser_priv_t *, const char * );
+static void Print_Warning( bsdl_parser_priv_t *, const char * );
+static void Give_Up_And_Quit( bsdl_parser_priv_t * );
+
+/* semantic functions */
+static void add_instruction( bsdl_parser_priv_t *, char *, char * );
+static void ac_set_register( bsdl_parser_priv_t *, char *, int );
+static void ac_add_instruction( bsdl_parser_priv_t *, char * );
+static void ac_apply_assoc( bsdl_parser_priv_t * );
+static void prt_add_name( bsdl_parser_priv_t *, char * );
+static void prt_add_bit( bsdl_parser_priv_t * );
+static void prt_add_range( bsdl_parser_priv_t *, int, int );
+static void ci_no_disable( bsdl_parser_priv_t * );
+static void ci_set_cell_spec_disable( bsdl_parser_priv_t *, int, int, int );
+static void ci_set_cell_spec( bsdl_parser_priv_t *, int, char * );
+static void ci_append_cell_info( bsdl_parser_priv_t *, int );
+
+void yyerror( bsdl_parser_priv_t *, const char * );
+%}
+
+%union {
+ int integer;
+ char *str;
+}
+
+
+%token CONSTANT PIN_MAP
+%token PHYSICAL_PIN_MAP PIN_MAP_STRING
+%token TAP_SCAN_IN TAP_SCAN_OUT TAP_SCAN_MODE TAP_SCAN_RESET
+%token TAP_SCAN_CLOCK
+%token INSTRUCTION_LENGTH INSTRUCTION_OPCODE INSTRUCTION_CAPTURE INSTRUCTION_DISABLE
+%token INSTRUCTION_GUARD INSTRUCTION_PRIVATE
+%token REGISTER_ACCESS
+%token BOUNDARY_LENGTH BOUNDARY_REGISTER IDCODE_REGISTER
+%token USERCODE_REGISTER BOUNDARY DEVICE_ID
+%token INPUT OUTPUT2 OUTPUT3 CONTROL CONTROLR INTERNAL
+%token CLOCK BIDIR BIDIR_IN BIDIR_OUT
+%token Z WEAK0 WEAK1 IDENTIFIER
+%token PULL0 PULL1 KEEPER
+%token DECIMAL_NUMBER BINARY_PATTERN
+%token BIN_X_PATTERN COMMA
+%token LPAREN RPAREN LBRACKET RBRACKET COLON ASTERISK
+%token COMPLIANCE_PATTERNS
+%token OBSERVE_ONLY
+%token BYPASS CLAMP EXTEST HIGHZ IDCODE INTEST PRELOAD RUNBIST SAMPLE USERCODE
+%token COMPONENT_CONFORMANCE STD_1149_1_1990 STD_1149_1_1993 STD_1149_1_2001
+%token ISC_CONFORMANCE STD_1532_2001 STD_1532_2002
+%token ISC_PIN_BEHAVIOR
+%token ISC_FIXED_SYSTEM_PINS
+%token ISC_STATUS IMPLEMENTED
+%token ISC_BLANK_USERCODE
+%token ISC_SECURITY ISC_DISABLE_READ ISC_DISABLE_PROGRAM ISC_DISABLE_ERASE ISC_DISABLE_KEY
+%token ISC_FLOW UNPROCESSED EXIT_ON_ERROR ARRAY SECURITY INITIALIZE REPEAT TERMINATE
+%token LOOP MIN MAX DOLLAR EQUAL HEX_STRING WAIT REAL_NUMBER
+%token PLUS MINUS SH_RIGHT SH_LEFT TILDE QUESTION_MARK EXCLAMATION_MARK QUESTION_EXCLAMATION
+%token CRC OST
+%token ISC_PROCEDURE
+%token ISC_ACTION PROPRIETARY OPTIONAL RECOMMENDED
+%token ISC_ILLEGAL_EXIT
+%token ILLEGAL
+
+%type <str> HEX_STRING
+%type <str> BIN_X_PATTERN
+%type <str> IDENTIFIER
+%type <str> BINARY_PATTERN
+%type <str> Binary_Pattern
+%type <str> Binary_Pattern_List
+%type <str> REAL_NUMBER
+%type <integer> DECIMAL_NUMBER
+%type <integer> Cell_Function
+%type <str> Safe_Value
+%type <integer> Disable_Value
+%type <str> Standard_Reg
+%type <str> Instruction_Name
+
+%start BSDL_Statement
+
+%% /* End declarations, begin rules */
+
+BSDL_Statement : BSDL_Pin_Map
+ | BSDL_Map_String
+ | BSDL_Tap_Scan_In
+ | BSDL_Tap_Scan_Out
+ | BSDL_Tap_Scan_Mode
+ | BSDL_Tap_Scan_Reset
+ | BSDL_Tap_Scan_Clock
+ | BSDL_Inst_Length
+ | BSDL_Opcode
+ | BSDL_Inst_Capture
+ | BSDL_Inst_Disable
+ | BSDL_Inst_Guard
+ | BSDL_Inst_Private
+ | BSDL_Idcode_Register
+ | BSDL_Usercode_Register
+ | BSDL_Register_Access
+ | BSDL_Boundary_Length
+ | BSDL_Boundary_Register
+ | BSDL_Compliance_Patterns
+ | BSDL_Component_Conformance
+ | ISC_Extension
+ | error
+ {
+ Print_Error( priv_data, _("Unsupported BSDL construct found") );
+ BUMP_ERROR;
+ YYABORT;
+ }
+;
+
+/****************************************************************************/
+BSDL_Pin_Map : PIN_MAP PHYSICAL_PIN_MAP
+;
+
+/****************************************************************************/
+BSDL_Map_String : PIN_MAP_STRING Pin_Mapping
+ | BSDL_Map_String COMMA Pin_Mapping
+;
+Pin_Mapping : IDENTIFIER COLON Physical_Pin_Desc
+ { free( $1 ); }
+;
+Physical_Pin_Desc : Physical_Pin
+ | LPAREN Physical_Pin_List RPAREN
+;
+Physical_Pin_List : Physical_Pin
+ | Physical_Pin_List COMMA Physical_Pin
+;
+Physical_Pin : IDENTIFIER
+ { free( $1 ); }
+ | IDENTIFIER LPAREN DECIMAL_NUMBER RPAREN
+ { free( $1 ); }
+ | DECIMAL_NUMBER
+;
+
+/****************************************************************************/
+BSDL_Tap_Scan_In : TAP_SCAN_IN DECIMAL_NUMBER
+;
+
+/****************************************************************************/
+BSDL_Tap_Scan_Out : TAP_SCAN_OUT DECIMAL_NUMBER
+;
+
+/****************************************************************************/
+BSDL_Tap_Scan_Mode : TAP_SCAN_MODE DECIMAL_NUMBER
+;
+
+/****************************************************************************/
+BSDL_Tap_Scan_Reset : TAP_SCAN_RESET DECIMAL_NUMBER
+;
+
+/****************************************************************************/
+BSDL_Tap_Scan_Clock : TAP_SCAN_CLOCK DECIMAL_NUMBER
+;
+
+/****************************************************************************/
+BSDL_Inst_Length : INSTRUCTION_LENGTH DECIMAL_NUMBER
+ { priv_data->jtag_ctrl->instr_len = $2; }
+;
+
+/****************************************************************************/
+BSDL_Opcode : INSTRUCTION_OPCODE BSDL_Opcode_Table
+;
+BSDL_Opcode_Table : Opcode_Desc
+ | BSDL_Opcode_Table COMMA Opcode_Desc
+ | error
+ {
+ Print_Error( priv_data,
+ _("Error in Instruction_Opcode attribute statement") );
+ BUMP_ERROR;
+ YYABORT;
+ }
+;
+Opcode_Desc : IDENTIFIER LPAREN Binary_Pattern_List RPAREN
+ { add_instruction( priv_data, $1, $3 ); }
+;
+Binary_Pattern_List : Binary_Pattern
+ { $$ = $1; }
+ | Binary_Pattern_List COMMA Binary_Pattern
+ {
+ Print_Warning( priv_data,
+ _("Multiple opcode patterns are not supported, first pattern will be used") );
+ $$ = $1;
+ free( $3 );
+ }
+;
+Binary_Pattern : BINARY_PATTERN
+ { $$ = $1; }
+;
+
+/****************************************************************************/
+BSDL_Inst_Capture : INSTRUCTION_CAPTURE BIN_X_PATTERN
+ { free( $2 ); }
+;
+
+/****************************************************************************/
+BSDL_Inst_Disable : INSTRUCTION_DISABLE IDENTIFIER
+ { free( $2 ); }
+;
+
+/****************************************************************************/
+BSDL_Inst_Guard : INSTRUCTION_GUARD IDENTIFIER
+ { free( $2 ); }
+;
+
+/****************************************************************************/
+BSDL_Inst_Private : INSTRUCTION_PRIVATE Private_Opcode_List
+;
+Private_Opcode_List : Private_Opcode
+ | Private_Opcode_List COMMA Private_Opcode
+ | error
+ {
+ Print_Error( priv_data, _("Error in Opcode List") );
+ BUMP_ERROR;
+ YYABORT;
+ }
+;
+Private_Opcode : IDENTIFIER
+ { free( $1 ); }
+;
+
+/****************************************************************************/
+BSDL_Idcode_Register : IDCODE_REGISTER BIN_X_PATTERN
+ { priv_data->jtag_ctrl->idcode = $2; }
+;
+
+/****************************************************************************/
+BSDL_Usercode_Register : USERCODE_REGISTER BIN_X_PATTERN
+ { priv_data->jtag_ctrl->usercode = $2; }
+;
+
+/****************************************************************************/
+BSDL_Register_Access : REGISTER_ACCESS Register_String
+;
+Register_String : Register_Assoc
+ | Register_String COMMA Register_Assoc
+;
+Register_Assoc : Register_Decl LPAREN Reg_Opcode_List RPAREN
+ { ac_apply_assoc( priv_data ); }
+;
+Register_Decl : Standard_Reg
+ { ac_set_register( priv_data, $1, 0 ); }
+ | IDENTIFIER LBRACKET DECIMAL_NUMBER RBRACKET
+ { ac_set_register( priv_data, $1, $3 ); }
+;
+Standard_Reg : BOUNDARY
+ { $$ = strdup( "BOUNDARY" ); }
+ | BYPASS
+ { $$ = strdup( "BYPASS" ); }
+ | IDCODE
+ { $$ = strdup( "IDCODE" ); }
+ | USERCODE
+ { $$ = strdup( "USERCODE" ); }
+ | DEVICE_ID
+ { $$ = strdup( "DEVICE_ID" ); }
+;
+Reg_Opcode_List : Reg_Opcode
+ | Reg_Opcode_List COMMA Reg_Opcode
+;
+Instruction_Name : BYPASS
+ { $$ = strdup( "BYPASS" ); }
+ | CLAMP
+ { $$ = strdup( "CLAMP" ); }
+ | EXTEST
+ { $$ = strdup( "EXTEST" ); }
+ | HIGHZ
+ { $$ = strdup( "HIGHZ" ); }
+ | IDCODE
+ { $$ = strdup( "IDCODE" ); }
+ | INTEST
+ { $$ = strdup( "INTEST" ); }
+ | PRELOAD
+ { $$ = strdup( "PRELOAD" ); }
+ | RUNBIST
+ { $$ = strdup( "RUNBIST" ); }
+ | SAMPLE
+ { $$ = strdup( "SAMPLE" ); }
+ | USERCODE
+ { $$ = strdup( "USERCODE" ); }
+ | IDENTIFIER
+ { $$ = $1; }
+;
+Reg_Opcode : Instruction_Name
+ { ac_add_instruction( priv_data, $1 ); }
+;
+
+
+/****************************************************************************/
+BSDL_Boundary_Length : BOUNDARY_LENGTH DECIMAL_NUMBER
+ { priv_data->jtag_ctrl->bsr_len = $2; }
+;
+
+/****************************************************************************/
+BSDL_Boundary_Register : BOUNDARY_REGISTER BSDL_Cell_Table
+;
+BSDL_Cell_Table : Cell_Entry
+ | BSDL_Cell_Table COMMA Cell_Entry
+ | error
+ {Print_Error( priv_data, _("Error in Boundary Cell description") );
+ BUMP_ERROR; YYABORT; }
+;
+Cell_Entry : DECIMAL_NUMBER LPAREN Cell_Info RPAREN
+ { ci_append_cell_info( priv_data, $1 ); }
+;
+Cell_Info : Cell_Spec
+ { ci_no_disable( priv_data ); }
+ | Cell_Spec COMMA Disable_Spec
+;
+Cell_Spec : IDENTIFIER COMMA Port_Name COMMA Cell_Function
+ COMMA Safe_Value
+ {
+ free( $1 );
+ ci_set_cell_spec( priv_data, $5, $7 );
+ }
+;
+Port_Name : IDENTIFIER
+ {
+ prt_add_name( priv_data, $1 );
+ prt_add_bit( priv_data );
+ }
+ | IDENTIFIER LPAREN DECIMAL_NUMBER RPAREN
+ {
+ prt_add_name( priv_data, $1 );
+ prt_add_range( priv_data, $3, $3 );
+ }
+ | ASTERISK
+ {
+ prt_add_name( priv_data, strdup( "*" ) );
+ prt_add_bit( priv_data );
+ }
+;
+Cell_Function : INPUT
+ { $$ = INPUT; }
+ | OUTPUT2
+ { $$ = OUTPUT2; }
+ | OUTPUT3
+ { $$ = OUTPUT3; }
+ | CONTROL
+ { $$ = CONTROL; }
+ | CONTROLR
+ { $$ = CONTROLR; }
+ | INTERNAL
+ { $$ = INTERNAL; }
+ | CLOCK
+ { $$ = CLOCK; }
+ | BIDIR
+ { $$ = BIDIR; }
+ | OBSERVE_ONLY
+ { $$ = OBSERVE_ONLY; }
+;
+Safe_Value : IDENTIFIER
+ { $$ = $1; }
+ | DECIMAL_NUMBER
+ {
+ char *tmp;
+ tmp = (char *)malloc( 2 );
+ snprintf( tmp, 2, "%i", $1 );
+ tmp[1] = '\0';
+ $$ = tmp;
+ }
+;
+Disable_Spec : DECIMAL_NUMBER COMMA DECIMAL_NUMBER COMMA Disable_Value
+ { ci_set_cell_spec_disable( priv_data, $1, $3, $5 ); }
+;
+Disable_Value : Z
+ { $$ = Z; }
+ | WEAK0
+ { $$ = WEAK0; }
+ | WEAK1
+ { $$ = WEAK1; }
+ | PULL0
+ { $$ = PULL0; }
+ | PULL1
+ { $$ = PULL1; }
+ | KEEPER
+ { $$ = KEEPER; }
+;
+
+/****************************************************************************/
+BSDL_Compliance_Patterns : COMPLIANCE_PATTERNS BSDL_Compliance_Pattern
+;
+BSDL_Compliance_Pattern : LPAREN Physical_Pin_List RPAREN
+ { bsdl_flex_set_bin_x( priv_data->scanner ); }
+ LPAREN Bin_X_Pattern_List RPAREN
+;
+Bin_X_Pattern_List : BIN_X_PATTERN
+ { free( $1 ); }
+ | Bin_X_Pattern_List COMMA BIN_X_PATTERN
+ { free( $3 ); }
+;
+
+/****************************************************************************/
+BSDL_Component_Conformance : COMPONENT_CONFORMANCE STD_1149_1_1990
+ { priv_data->jtag_ctrl->conformance = CONF_1990; }
+ | COMPONENT_CONFORMANCE STD_1149_1_1993
+ { priv_data->jtag_ctrl->conformance = CONF_1993; }
+ | COMPONENT_CONFORMANCE STD_1149_1_2001
+ { priv_data->jtag_ctrl->conformance = CONF_2001; }
+;
+/****************************************************************************/
+ISC_Extension : ISC_Conformance
+ | ISC_Pin_Behavior
+ | ISC_Fixed_System_Pins
+ | ISC_Status
+ | ISC_Blank_Usercode
+ | ISC_Security
+ | ISC_Flow
+ | ISC_Procedure
+ | ISC_Action
+ | ISC_Illegal_Exit
+;
+/****************************************************************************/
+ISC_Conformance : ISC_CONFORMANCE STD_1532_2001
+ | ISC_CONFORMANCE STD_1532_2002
+;
+/****************************************************************************/
+ISC_Pin_Behavior : ISC_PIN_BEHAVIOR Pin_Behavior_Option
+;
+Pin_Behavior_Option : HIGHZ
+ | CLAMP
+ | error
+ {
+ Print_Error( priv_data, _("Error in ISC_Pin_Behavior Definition") );
+ BUMP_ERROR;
+ YYABORT;
+ }
+;
+/****************************************************************************/
+ISC_Fixed_System_Pins : ISC_FIXED_SYSTEM_PINS Fixed_Pin_List
+;
+Fixed_Pin_List : Port_Id
+ | Fixed_Pin_List COMMA Port_Id
+ | error
+ {
+ Print_Error( priv_data, _("Error in ISC_Fixed_System_Pins Definition") );
+ BUMP_ERROR;
+ YYABORT;
+ }
+;
+Port_Id : IDENTIFIER
+ { free( $1 ); }
+ | IDENTIFIER LPAREN DECIMAL_NUMBER RPAREN
+ { free( $1 ); }
+;
+/****************************************************************************/
+ISC_Status : ISC_STATUS Status_Modifier IMPLEMENTED
+;
+Status_Modifier : /* empty */
+ | IDENTIFIER
+ { free( $1 ); }
+;
+/****************************************************************************/
+ISC_Blank_Usercode : ISC_BLANK_USERCODE BIN_X_PATTERN
+ { free( $2 ); }
+;
+/****************************************************************************/
+ISC_Security : ISC_SECURITY Protection_Spec
+;
+Protection_Spec : Read_Spec COMMA Program_Spec COMMA Erase_Spec COMMA Key_Spec
+ | error
+ {
+ Print_Error( priv_data, _("Error in ISC_Security Definition") );
+ BUMP_ERROR;
+ YYABORT;
+ }
+;
+Read_Spec : ISC_DISABLE_READ Bit_Spec
+;
+Program_Spec : ISC_DISABLE_PROGRAM Bit_Spec
+;
+Erase_Spec : ISC_DISABLE_ERASE Bit_Spec
+;
+Key_Spec : ISC_DISABLE_KEY Bit_Range
+;
+Bit_Spec : ASTERISK
+ | DECIMAL_NUMBER
+;
+Bit_Range : ASTERISK
+ | DECIMAL_NUMBER MINUS DECIMAL_NUMBER
+;
+/****************************************************************************/
+ISC_Flow : ISC_FLOW Flow_Definition_List
+;
+Flow_Definition_List : Flow_Definition
+ | Flow_Definition_List COMMA Flow_Definition
+;
+Flow_Definition : Flow_Descriptor
+ | Flow_Descriptor Initialize_Block
+ | Flow_Descriptor Initialize_Block Repeat_Block
+ | Flow_Descriptor Initialize_Block Repeat_Block Terminate_Block
+ | Flow_Descriptor Repeat_Block
+ | Flow_Descriptor Repeat_Block Terminate_Block
+ | Flow_Descriptor Terminate_Block
+ | error
+ {
+ Print_Error( priv_data, _("Error in ISC_Flow Definition") );
+ BUMP_ERROR;
+ YYABORT;
+ }
+;
+Flow_Descriptor : IDENTIFIER
+ { free( $1 ); }
+ | IDENTIFIER Data_Name
+ { free( $1 ); }
+ | IDENTIFIER Data_Name UNPROCESSED
+ { free( $1 ); }
+ | IDENTIFIER Data_Name UNPROCESSED EXIT_ON_ERROR
+ { free( $1 ); }
+ | IDENTIFIER UNPROCESSED
+ { free( $1 ); }
+ | IDENTIFIER UNPROCESSED EXIT_ON_ERROR
+ { free( $1 ); }
+ | IDENTIFIER EXIT_ON_ERROR
+ { free( $1 ); }
+;
+Data_Name : LPAREN Standard_Data_Name RPAREN
+ | LPAREN IDENTIFIER RPAREN
+ { free( $2 ); }
+;
+Standard_Data_Name : ARRAY | USERCODE | SECURITY | IDCODE | PRELOAD
+;
+Initialize_Block : INITIALIZE Activity_List
+;
+Repeat_Block : REPEAT DECIMAL_NUMBER Activity_List
+;
+Terminate_Block : TERMINATE Activity_List
+;
+Activity_List : Activity_Element
+ | Activity_List Activity_Element
+;
+Activity_Element : Activity
+ | Loop_Block
+;
+Loop_Block : LOOP Loop_Min_Spec Loop_Max_Spec LPAREN Loop_Activity_List RPAREN
+;
+Loop_Min_Spec : /* empty */
+ | MIN DECIMAL_NUMBER
+;
+Loop_Max_Spec : MAX DECIMAL_NUMBER
+;
+Loop_Activity_List : Activity
+ | Loop_Activity_List Activity
+;
+Activity : LPAREN Instruction_Name Wait_Specification RPAREN
+ { free( $2 ); }
+ | LPAREN Instruction_Name Update_Field_List Wait_Specification RPAREN
+ { free( $2 ); }
+ | LPAREN Instruction_Name Wait_Specification Capture_Field_List RPAREN
+ { free( $2 ); }
+ | LPAREN Instruction_Name Update_Field_List Wait_Specification Capture_Field_List RPAREN
+ { free( $2 ); }
+;
+Update_Field_List : Update_Field
+ | Update_Field_List COMMA Update_Field
+;
+Update_Field : DECIMAL_NUMBER
+ | DECIMAL_NUMBER COLON
+ { bsdl_flex_set_hex( priv_data->scanner ); }
+ Data_Expression
+ { bsdl_flex_set_decimal( priv_data->scanner ); }
+;
+Data_Expression : HEX_STRING
+ { free( $1 ); }
+ | Input_Specifier
+ | Variable_Expression
+;
+Variable_Expression : Variable
+ | Variable_Assignment
+ | Variable_Update
+;
+Variable_Assignment : Variable EQUAL
+ { bsdl_flex_set_hex( priv_data->scanner ); }
+ HEX_STRING
+ {
+ free( $4 );
+ bsdl_flex_set_decimal( priv_data->scanner );
+ }
+ | Variable Input_Specifier
+;
+Variable_Update : Variable Complement_Operator
+ | Variable Binary_Operator DECIMAL_NUMBER
+;
+Input_Specifier : Input_Operator
+ | IO_Operator
+;
+Capture_Field_List : Capture_Field
+ | Capture_Field_List COMMA Capture_Field
+;
+Capture_Field : DECIMAL_NUMBER COLON
+ { bsdl_flex_set_hex( priv_data->scanner ); }
+ Capture_Field_Rest
+ { bsdl_flex_set_decimal( priv_data->scanner ); }
+;
+Capture_Field_Rest : Capture_Specification
+ | Capture_Specification CRC_Tag
+ | Capture_Specification CRC_Tag OST_Tag
+ | Capture_Specification OST_Tag
+;
+Capture_Specification : Expected_Data
+ | Expected_Data Compare_Mask
+;
+Expected_Data : /* empty */
+ | Output_Operator
+ | Output_Operator Data_Expression
+ | Data_Expression
+;
+Compare_Mask : ASTERISK
+ | ASTERISK Output_Operator
+ | ASTERISK Output_Operator Data_Expression
+ | ASTERISK Data_Expression
+;
+Wait_Specification : WAIT Duration_Specification
+ | WAIT Duration_Specification MIN
+ | WAIT Duration_Specification MIN COLON Duration_Specification MAX
+;
+Duration_Specification : Clock_Cycles
+ | REAL_NUMBER
+ { free( $1 ); }
+ | Clock_Cycles COMMA REAL_NUMBER
+ { free( $3 ); }
+;
+Clock_Cycles : Port_Id DECIMAL_NUMBER
+;
+Variable : DOLLAR IDENTIFIER
+ { free( $2 ); }
+;
+Binary_Operator : PLUS
+ { bsdl_flex_set_decimal( priv_data->scanner ); }
+ | MINUS
+ { bsdl_flex_set_decimal( priv_data->scanner ); }
+ | SH_RIGHT
+ { bsdl_flex_set_decimal( priv_data->scanner ); }
+ | SH_LEFT
+ { bsdl_flex_set_decimal( priv_data->scanner ); }
+;
+Complement_Operator : TILDE
+;
+Input_Operator : QUESTION_MARK
+;
+Output_Operator : EXCLAMATION_MARK
+;
+IO_Operator : QUESTION_EXCLAMATION
+;
+CRC_Tag : COLON CRC
+;
+OST_Tag : COLON OST
+;
+/****************************************************************************/
+ISC_Procedure : ISC_PROCEDURE Procedure_List
+;
+Procedure_List : Procedure
+ | Procedure_List COMMA Procedure
+;
+Procedure : IDENTIFIER EQUAL LPAREN Flow_Descriptor_List RPAREN
+ { free( $1 ); }
+ | IDENTIFIER Data_Name EQUAL LPAREN Flow_Descriptor_List RPAREN
+ { free( $1 ); }
+ | error
+ {
+ Print_Error( priv_data, _("Error in ISC_Procedure Definition") );
+ BUMP_ERROR;
+ YYABORT;
+ }
+;
+Flow_Descriptor_List : Flow_Descriptor
+ | Flow_Descriptor_List COMMA Flow_Descriptor
+;
+/****************************************************************************/
+ISC_Action : ISC_ACTION Action_List
+;
+Action_List : Action
+ | Action_List COMMA Action
+;
+Action : IDENTIFIER EQUAL LPAREN Action_Specification_List RPAREN
+ { free( $1 ); }
+ | IDENTIFIER Data_Name EQUAL LPAREN Action_Specification_List RPAREN
+ { free( $1 ); }
+ | IDENTIFIER PROPRIETARY EQUAL LPAREN Action_Specification_List RPAREN
+ { free( $1 ); }
+ | IDENTIFIER Data_Name PROPRIETARY EQUAL LPAREN Action_Specification_List RPAREN
+ { free( $1 ); }
+ | error
+ {
+ Print_Error( priv_data, _("Error in ISC_Action Definition") );
+ BUMP_ERROR;
+ YYABORT;
+ }
+;
+Action_Specification_List : Action_Specification
+ | Action_Specification_List COMMA Action_Specification
+;
+Action_Specification : IDENTIFIER
+ { free( $1 ); }
+ | IDENTIFIER Data_Name
+ { free( $1 ); }
+ | IDENTIFIER Data_Name PROPRIETARY
+ { free( $1 ); }
+ | IDENTIFIER Data_Name Option_Specification
+ { free( $1 ); }
+ | IDENTIFIER Data_Name PROPRIETARY Option_Specification
+ { free( $1 ); }
+ | IDENTIFIER PROPRIETARY
+ { free( $1 ); }
+ | IDENTIFIER PROPRIETARY Option_Specification
+ { free( $1 ); }
+ | IDENTIFIER Option_Specification
+ { free( $1 ); }
+;
+Option_Specification : OPTIONAL | RECOMMENDED
+;
+/****************************************************************************/
+ISC_Illegal_Exit : ISC_ILLEGAL_EXIT Exit_Instruction_List
+;
+Exit_Instruction_List : IDENTIFIER
+ { free( $1 ); }
+ | Exit_Instruction_List COMMA IDENTIFIER
+ { free( $3 ); }
+;
+%% /* End rules, begin programs */
+/*----------------------------------------------------------------------*/
+static void Print_Error( bsdl_parser_priv_t *priv_data, const char *Errmess )
+{
+ bsdl_msg( priv_data->jtag_ctrl->proc_mode,
+ BSDL_MSG_ERR, _("Line %d, %s.\n"),
+ priv_data->lineno,
+ Errmess );
+}
+/*----------------------------------------------------------------------*/
+static void Print_Warning( bsdl_parser_priv_t *priv_data, const char *Warnmess )
+{
+ bsdl_msg( priv_data->jtag_ctrl->proc_mode,
+ BSDL_MSG_WARN, _("Line %d, %s.\n"),
+ priv_data->lineno,
+ Warnmess );
+}
+/*----------------------------------------------------------------------*/
+static void Give_Up_And_Quit( bsdl_parser_priv_t *priv_data )
+{
+ //Print_Error( priv_data, "Too many errors" );
+ bsdl_flex_stop_buffer( priv_data->scanner );
+}
+/*----------------------------------------------------------------------*/
+void yyerror( bsdl_parser_priv_t *priv_data, const char *error_string )
+{
+}
+
+
+/*****************************************************************************
+ * void bsdl_sem_init( bsdl_parser_priv_t *priv )
+ *
+ * Initializes storage elements in the private parser and jtag control
+ * structures that are used for semantic purposes.
+ *
+ * Parameters
+ * priv : private data container for parser related tasks
+ *
+ * Returns
+ * void
+ ****************************************************************************/
+static void bsdl_sem_init( bsdl_parser_priv_t *priv )
+{
+ jtag_ctrl_t *jc = priv->jtag_ctrl;
+
+ jc->instr_len = -1;
+ jc->bsr_len = -1;
+ jc->conformance = CONF_UNKNOWN;
+ jc->idcode = NULL;
+ jc->usercode = NULL;
+
+ jc->instr_list = NULL;
+
+ priv->ainfo.next = NULL;
+ priv->ainfo.reg = NULL;
+ priv->ainfo.instr_list = NULL;
+ jc->ainfo_list = NULL;
+
+ priv->tmp_cell_info.next = NULL;
+ priv->tmp_cell_info.port_name = NULL;
+ priv->tmp_cell_info.basic_safe_value = NULL;
+ jc->cell_info_first = NULL;
+ jc->cell_info_last = NULL;
+
+ priv->tmp_port_desc.names_list = NULL;
+ priv->tmp_port_desc.next = NULL;
+}
+
+
+/*****************************************************************************
+ * void free_instr_list( struct instr_elem *il )
+ *
+ * Deallocates the given list of instr_elem.
+ *
+ * Parameters
+ * il : first instr_elem to deallocate
+ *
+ * Returns
+ * void
+ ****************************************************************************/
+static void free_instr_list( instr_elem_t *il )
+{
+ if (il)
+ {
+ if (il->instr)
+ free( il->instr );
+ if (il->opcode)
+ free( il->opcode );
+ free_instr_list( il->next );
+ free( il );
+ }
+}
+
+
+/*****************************************************************************
+ * void free_ainfo_list( ainfo_elem_t *ai, int free_me )
+ *
+ * Deallocates the given list of ainfo_elem.
+ *
+ * Parameters
+ * ai : first ainfo_elem to deallocate
+ * free_me : set to 1 to free memory for ai as well
+ *
+ * Returns
+ * void
+ ****************************************************************************/
+static void free_ainfo_list( ainfo_elem_t *ai, int free_me )
+{
+ if (ai)
+ {
+ if (ai->reg)
+ free( ai->reg );
+
+ free_instr_list( ai->instr_list );
+ free_ainfo_list( ai->next, 1 );
+
+ if (free_me)
+ free( ai );
+ }
+}
+
+
+/*****************************************************************************
+ * void free_string_list( string_elem_t *sl )
+ *
+ * Deallocates the given list of string_elem items.
+ *
+ * Parameters
+ * sl : first string_elem to deallocate
+ *
+ * Returns
+ * void
+ ****************************************************************************/
+static void free_string_list( string_elem_t *sl)
+{
+ if (sl)
+ {
+ if (sl->string)
+ free( sl->string );
+ free_string_list( sl->next );
+ free( sl );
+ }
+}
+
+
+/*****************************************************************************
+ * void free_c_list( cell_info_t *ci, int free_me )
+ *
+ * Deallocates the given list of cell_info items.
+ *
+ * Parameters
+ * ci : first cell_info item to deallocate
+ * free_me : 1 -> free memory for *ci as well
+ * 0 -> don't free *ci memory
+ *
+ * Returns
+ * void
+ ****************************************************************************/
+static void free_ci_list( cell_info_t *ci, int free_me )
+{
+ if (ci)
+ {
+ free_ci_list( ci->next, 1 );
+
+ if (ci->port_name)
+ free( ci->port_name );
+
+ if (ci->basic_safe_value)
+ free( ci->basic_safe_value );
+
+ if (free_me)
+ free( ci );
+ }
+}
+
+
+/*****************************************************************************
+ * void bsdl_sem_deinit( bsdl_parser_priv_t *priv )
+ *
+ * Frees and deinitializes storage elements in the private parser and
+ * jtag control structures that were filled by semantic rules.
+ *
+ * Parameters
+ * priv : private data container for parser related tasks
+ *
+ * Returns
+ * void
+ ****************************************************************************/
+static void bsdl_sem_deinit( bsdl_parser_priv_t *priv )
+{
+ jtag_ctrl_t *jc = priv->jtag_ctrl;
+
+ if (jc->idcode)
+ {
+ free( jc->idcode );
+ jc->idcode = NULL;
+ }
+
+ if (jc->usercode)
+ {
+ free( jc->usercode );
+ jc->usercode = NULL;
+ }
+
+ /* free cell_info list */
+ free_ci_list( jc->cell_info_first, 1 );
+ jc->cell_info_first = jc->cell_info_last = NULL;
+ free_ci_list( &(priv->tmp_cell_info), 0 );
+
+ /* free instr_list */
+ free_instr_list( jc->instr_list );
+ jc->instr_list = NULL;
+
+ /* free ainfo_list */
+ free_ainfo_list( jc->ainfo_list, 1 );
+ jc->ainfo_list = NULL;
+ free_ainfo_list( &(priv->ainfo), 0 );
+
+ /* free string list in temporary port descritor */
+ free_string_list( priv->tmp_port_desc.names_list );
+ priv->tmp_port_desc.names_list = NULL;
+}
+
+
+/*****************************************************************************
+ * bsdl_parser_priv_t *bsdl_parser_init( jtag_ctrl_t *jtag_ctrl )
+ *
+ * Initializes storage elements in the private parser structure that are
+ * used for parser maintenance purposes.
+ * Subsequently calls initializer functions for the scanner and the semantic
+ * parts.
+ *
+ * Parameters
+ * jtag_ctrl : pointer to jtag control structure
+ *
+ * Returns
+ * pointer to private parser structure
+ ****************************************************************************/
+bsdl_parser_priv_t *bsdl_parser_init( jtag_ctrl_t *jtag_ctrl )
+{
+ bsdl_parser_priv_t *new_priv;
+
+ if (!(new_priv = (bsdl_parser_priv_t *)malloc( sizeof( bsdl_parser_priv_t ) ))) {
+ bsdl_msg( jtag_ctrl->proc_mode,
+ BSDL_MSG_ERR, _("Out of memory, %s line %i\n"), __FILE__, __LINE__ );
+ return NULL;
+ }
+
+ new_priv->jtag_ctrl = jtag_ctrl;
+
+ if (!(new_priv->scanner = bsdl_flex_init( jtag_ctrl->proc_mode ))) {
+ free(new_priv);
+ new_priv = NULL;
+ }
+
+ bsdl_sem_init( new_priv );
+
+ return new_priv;
+}
+
+
+/*****************************************************************************
+ * void bsdl_parser_deinit( bsdl_parser_priv_t *priv )
+ *
+ * Frees storage elements in the private parser structure that are
+ * used for parser maintenance purposes.
+ * Subsequently calls deinitializer functions for the scanner and the semantic
+ * parts.
+ *
+ * Parameters
+ * priv : private data container for parser related tasks
+ *
+ * Returns
+ * void
+ ****************************************************************************/
+void bsdl_parser_deinit( bsdl_parser_priv_t *priv_data )
+{
+ bsdl_sem_deinit( priv_data );
+ bsdl_flex_deinit( priv_data->scanner );
+ free( priv_data );
+}
+
+
+/*****************************************************************************
+ * void add_instruction( bsdl_parser_priv_t *priv, char *instr, char *opcode )
+ *
+ * Converts the instruction specification into a member of the main
+ * list of instructions at priv->jtag_ctrl->instr_list.
+ *
+ * Parameters
+ * priv : private data container for parser related tasks
+ * instr : instruction name
+ * opcode : instruction opcode
+ *
+ * Returns
+ * void
+ ****************************************************************************/
+static void add_instruction( bsdl_parser_priv_t *priv, char *instr, char *opcode )
+{
+ instr_elem_t *new_instr;
+
+ new_instr = (instr_elem_t *)malloc( sizeof( instr_elem_t ) );
+ if (new_instr)
+ {
+ new_instr->next = priv->jtag_ctrl->instr_list;
+ new_instr->instr = instr;
+ new_instr->opcode = opcode;
+
+ priv->jtag_ctrl->instr_list = new_instr;
+ }
+ else
+ bsdl_msg( priv->jtag_ctrl->proc_mode,
+ BSDL_MSG_FATAL, _("Out of memory, %s line %i\n"), __FILE__, __LINE__ );
+}
+
+
+/*****************************************************************************
+ * void ac_set_register( bsdl_parser_priv_t *priv, char *reg, int reg_len )
+ * Register Access management function
+ *
+ * Stores the register specification values for the current register access
+ * specification in the temporary storage region for later usage.
+ *
+ * Parameters
+ * priv : private data container for parser related tasks
+ * reg : register name
+ * reg_len : optional register length
+ *
+ * Returns
+ * void
+ ****************************************************************************/
+static void ac_set_register( bsdl_parser_priv_t *priv, char *reg, int reg_len )
+{
+ ainfo_elem_t *tmp_ai = &(priv->ainfo);
+
+ tmp_ai->reg = reg;
+ tmp_ai->reg_len = reg_len;
+}
+
+
+/*****************************************************************************
+ * void ac_add_instruction( bsdl_parser_priv_t *priv, char *instr )
+ * Register Access management function
+ *
+ * Appends the specified instruction to the list of instructions for the
+ * current register access specification in the temporary storage region
+ * for later usage.
+ *
+ * Parameters
+ * priv : private data container for parser related tasks
+ * instr : instruction name
+ *
+ * Returns
+ * void
+ ****************************************************************************/
+static void ac_add_instruction( bsdl_parser_priv_t *priv, char *instr )
+{
+ ainfo_elem_t *tmp_ai = &(priv->ainfo);
+ instr_elem_t *new_instr;
+
+ new_instr = (instr_elem_t *)malloc( sizeof( instr_elem_t ) );
+ if (new_instr)
+ {
+ new_instr->next = tmp_ai->instr_list;
+ new_instr->instr = instr;
+ new_instr->opcode = NULL;
+
+ tmp_ai->instr_list = new_instr;
+ }
+ else
+ bsdl_msg( priv->jtag_ctrl->proc_mode,
+ BSDL_MSG_FATAL, _("Out of memory, %s line %i\n"), __FILE__, __LINE__ );
+}
+
+
+/*****************************************************************************
+ * void ac_apply_assoc( bsdl_parser_priv_t *priv )
+ * Register Access management function
+ *
+ * Appends the collected register access specification from the temporary
+ * storage region to the main ainfo list.
+ *
+ * Parameters
+ * priv : private data container for parser related tasks
+ *
+ * Returns
+ * void
+ ****************************************************************************/
+static void ac_apply_assoc( bsdl_parser_priv_t *priv )
+{
+ jtag_ctrl_t *jc = priv->jtag_ctrl;
+ ainfo_elem_t *tmp_ai = &(priv->ainfo);
+ ainfo_elem_t *new_ai;
+
+ new_ai = (ainfo_elem_t *)malloc( sizeof( ainfo_elem_t ) );
+ if (new_ai)
+ {
+ new_ai->next = jc->ainfo_list;
+ new_ai->reg = tmp_ai->reg;
+ new_ai->reg_len = tmp_ai->reg_len;
+ new_ai->instr_list = tmp_ai->instr_list;
+
+ jc->ainfo_list = new_ai;
+ }
+ else
+ bsdl_msg( jc->proc_mode,
+ BSDL_MSG_FATAL, _("Out of memory, %s line %i\n"), __FILE__, __LINE__ );
+
+ /* clean up obsolete temporary entries */
+ tmp_ai->reg = NULL;
+ tmp_ai->reg_len = 0;
+ tmp_ai->instr_list = NULL;
+}
+
+
+/*****************************************************************************
+ * void prt_add_name( bsdl_parser_priv_t *priv, char *name )
+ * Port name management function
+ *
+ * Sets the name field of the temporary storage area for port description
+ * (port_desc) to the parameter name.
+ *
+ * Parameters
+ * priv : private data container for parser related tasks
+ * name : base name of the port, memory get's free'd lateron
+ *
+ * Returns
+ * void
+ ****************************************************************************/
+static void prt_add_name( bsdl_parser_priv_t *priv, char *name )
+{
+ port_desc_t *pd = &(priv->tmp_port_desc);
+ string_elem_t *new_string;
+
+ new_string = (string_elem_t *)malloc( sizeof( string_elem_t ) );
+ if (new_string)
+ {
+ new_string->next = pd->names_list;
+ new_string->string = name;
+
+ pd->names_list = new_string;
+ }
+ else
+ bsdl_msg( priv->jtag_ctrl->proc_mode,
+ BSDL_MSG_FATAL, _("Out of memory, %s line %i\n"), __FILE__, __LINE__ );
+}
+
+
+/*****************************************************************************
+ * void prt_add_bit( bsdl_parser_priv_t *priv )
+ * Port name management function
+ *
+ * Sets the vector and index fields of the temporary storage area for port
+ * description (port_desc) to non-vector information. The low and high indice
+ * are set to equal numbers (exact value is irrelevant).
+ *
+ * Parameters
+ * priv : private data container for parser related tasks
+ *
+ * Returns
+ * void
+ ****************************************************************************/
+static void prt_add_bit( bsdl_parser_priv_t *priv )
+{
+ port_desc_t *pd = &(priv->tmp_port_desc);
+
+ pd->is_vector = 0;
+ pd->low_idx = 0;
+ pd->high_idx = 0;
+}
+
+
+/*****************************************************************************
+ * void prt_add_range( bsdl_parser_priv_t *priv, int low, int high )
+ * Port name management function
+ *
+ * Sets the vector and index fields of the temporary storage area for port
+ * description (port_desc) to the specified vector information.
+ *
+ * Parameters
+ * priv : private data container for parser related tasks
+ * low : low index of vector
+ * high : high index of vector
+ *
+ * Returns
+ * void
+ ****************************************************************************/
+static void prt_add_range( bsdl_parser_priv_t *priv, int low, int high )
+{
+ port_desc_t *pd = &(priv->tmp_port_desc);
+
+ pd->is_vector = 1;
+ pd->low_idx = low;
+ pd->high_idx = high;
+}
+
+
+/*****************************************************************************
+ * void ci_no_disable( bsdl_parser_priv_t *priv )
+ * Cell Info management function
+ *
+ * Tracks that there is no disable term for the current cell info.
+ *
+ * Parameters
+ * priv : private data container for parser related tasks
+ *
+ * Returns
+ * void
+ ****************************************************************************/
+static void ci_no_disable( bsdl_parser_priv_t *priv )
+{
+ priv->tmp_cell_info.ctrl_bit_num = -1;
+}
+
+
+/*****************************************************************************
+ * void ci_set_cell_spec_disable( bsdl_parser_priv_t *priv, int ctrl_bit_num,
+ * int safe_value, int disable_value )
+ * Cell Info management function
+ *
+ * Applies the disable specification of the current cell spec to the variables
+ * for temporary storage of these information elements.
+ *
+ * Parameters
+ * priv : private data container for parser related tasks
+ * ctrl_bit_num : bit number of related control cell
+ * safe_value : safe value for initialization of this cell
+ * disable_value : currently ignored
+ *
+ * Returns
+ * void
+ ****************************************************************************/
+static void ci_set_cell_spec_disable( bsdl_parser_priv_t *priv, int ctrl_bit_num,
+ int safe_value, int disable_value )
+{
+ cell_info_t *ci = &(priv->tmp_cell_info);
+
+ ci->ctrl_bit_num = ctrl_bit_num;
+ ci->disable_safe_value = safe_value;
+ /* disable value is ignored at the moment */
+}
+
+
+/*****************************************************************************
+ * void ci_set_cell_spec( bsdl_parser_priv_t *priv,
+ * int function, char *safe_value )
+ * Cell Info management function
+ *
+ * Sets the specified values of the current cell_spec (without disable term)
+ * to the variables for temporary storage of these information elements.
+ * The name of the related port is taken from the port_desc structure that
+ * was filled in previously by the rule Port_Name.
+ *
+ * Parameters
+ * priv : private data container for parser related tasks
+ * function : cell function indentificator
+ * safe_value : safe value for initialization of this cell
+ *
+ * Returns
+ * void
+ ****************************************************************************/
+static void ci_set_cell_spec( bsdl_parser_priv_t *priv,
+ int function, char *safe_value )
+{
+ cell_info_t *ci = &(priv->tmp_cell_info);
+ port_desc_t *pd = &(priv->tmp_port_desc);
+ string_elem_t *name = priv->tmp_port_desc.names_list;
+ char *port_string;
+ size_t str_len, name_len;
+
+ ci->cell_function = function;
+ ci->basic_safe_value = safe_value;
+
+ /* handle indexed port name:
+ - names of scalar ports are simply copied from the port_desc structure
+ to the final string that goes into ci
+ - names of vectored ports are expanded with their decimal index as
+ collected earlier earlier in rule Port_Name
+ */
+ name_len = strlen( name->string );
+ str_len = name_len + 1 + 10 + 1 + 1;
+ if ((port_string = (char *)malloc( str_len )) != NULL)
+ {
+ if (pd->is_vector)
+ snprintf( port_string, str_len-1, "%s(%d)", name->string, pd->low_idx );
+ else
+ strncpy( port_string, name->string, str_len-1 );
+ port_string[str_len-1] = '\0';
+
+ ci->port_name = port_string;
+ }
+ else
+ {
+ bsdl_msg( priv->jtag_ctrl->proc_mode,
+ BSDL_MSG_FATAL, _("Out of memory, %s line %i\n"), __FILE__, __LINE__ );
+ ci->port_name = NULL;
+ }
+
+ free_string_list( priv->tmp_port_desc.names_list );
+ priv->tmp_port_desc.names_list = NULL;
+}
+
+
+/*****************************************************************************
+ * void ci_append_cell_info( bsdl_parser_priv_t *priv, int bit_num )
+ * Cell Info management function
+ *
+ * Appends the temporary cell info to the global list of cell infos.
+ *
+ * Parameters
+ * priv : private data container for parser related tasks
+ * bit_num : bit number of current cell
+ *
+ * Returns
+ * void
+ ****************************************************************************/
+static void ci_append_cell_info( bsdl_parser_priv_t *priv, int bit_num )
+{
+ cell_info_t *tmp_ci = &(priv->tmp_cell_info);
+ cell_info_t *ci;
+ jtag_ctrl_t *jc = priv->jtag_ctrl;
+
+ ci = (cell_info_t *)malloc( sizeof( cell_info_t ) );
+ if (ci)
+ {
+ ci->next = NULL;
+ if (jc->cell_info_last)
+ jc->cell_info_last->next = ci;
+ else
+ jc->cell_info_first = ci;
+ jc->cell_info_last = ci;
+
+ ci->bit_num = bit_num;
+ ci->port_name = tmp_ci->port_name;
+ ci->cell_function = tmp_ci->cell_function;
+ ci->basic_safe_value = tmp_ci->basic_safe_value;
+ ci->ctrl_bit_num = tmp_ci->ctrl_bit_num;
+ ci->disable_safe_value = tmp_ci->disable_safe_value;
+
+ tmp_ci->port_name = NULL;
+ tmp_ci->basic_safe_value = NULL;
+ }
+ else
+ bsdl_msg( jc->proc_mode,
+ BSDL_MSG_FATAL, _("Out of memory, %s line %i\n"), __FILE__, __LINE__ );
+}
+
+
+/*
+ Local Variables:
+ mode:C
+ c-default-style:gnu
+ indent-tabs-mode:nil
+ End:
+*/
--- /dev/null
+/*
+ * $Id$
+ *
+ * Original Lex source by Ken Parker, 1990
+ * Extensions and adaptions for UrJTAG by Arnim Laeuger, 2007
+ *
+ */
+
+/*----------------------------------------------------------
+ *
+ * Lex source for BSDL
+ *
+ *----------------------------------------------------------*/
+/* Date: 901003 */
+
+/*
+
+Email header accompanying the original Yacc code:
+ http://www.eda.org/vug_bbs/bsdl.parser
+
+-----------------------------------8<--------------------------------------
+
+Hello All,
+
+This is this first mailing of the BSDL* Version 0.0 parser specifications
+we are sending to people who request it from our publicized E-Mail address;
+
+ bsdl%hpmtlx@hplabs.HP.com
+
+You are free to redistribute this at will, but we feel that it would be
+better if respondents asked for it directly so that their addresses can
+be entered into our list for future mailings and updates.
+
+It would be helpful if you could confirm receipt of this transmission.
+We also would be very interested to hear about your experiences with this
+information and what you are planning to do with BSDL.
+
+Regards,
+
+Ken Parker
+Hewlett-Packard Company
+
+
+*Boundary-Scan Description Language - as documented in:
+
+"A Language for Describing Boundary-Scan Devices", K.P. Parker
+and S. Oresjo, Proceedings 1990 International Test Conference,
+Washington DC, pp 222-234
+
+
+- -----------------cut here---------------------------------------------------
+
+
+901004.0721 Hewlett-Packard Company
+901016.1049 Manufacturing Test Division
+ P.O. Box 301
+ Loveland, Colorado 80537
+ USA
+
+ October 1990
+Hello BSDL Parser Requestor,
+
+ This Electronic Mail reply contains the computer specifications for
+Hewlett-Packard's Version 0.0 BSDL parser. This section of the reply
+explains the contents of the rest of this file.
+
+This file is composed of seven (7) parts:
+
+ 1) How to use this file
+
+ 2) UNIX* Lex source (lexicographical tokenizing rules)
+
+ 3) UNIX* Yacc source (BNF-like syntax description)
+
+ 4) A sample main program to recognize BSDL.
+
+ 5) A BSDL description of the Texas Instruments 74bct8374 that is
+ recognized by the parser, for testing purposes.
+
+ 6) The VHDL package STD_1149_1_1990 needed by this parser.
+
+ 7) [added 901016] Porting experiences to other systems.
+
+
+RECOMMENDATION: Save a copy of this file in archival storage before
+ processing it via the instructions below. This will
+ allow you to recover from errors, and allow you to
+ compare subsequently released data for changes.
+
+DISCLAIMERS:
+
+1. The IEEE 1149.1 Working Group has not endorsed BSDL Version 0.0 and
+ therefore no person may represent it as an IEEE standard or imply that
+ a resulting IEEE standard will be identical to it.
+
+2. The IEEE 1149.1 Working Group recognizes that BSDL Version 0.0 is a
+ well-conceived initiative that is likely to excelerate the creation
+ of tools that support the 1149.1 standard. As such, changes and
+ enhancements will be carefully considered so as not to needlessly
+ disrupt these development efforts. The overriding goal is the
+ ultimate success of the 1149.1 standard.
+
+LEGAL NOTICES:
+
+ Hewlett-Packard Company makes no warranty of any kind with regard to
+ this information, including, but not limited to, the implied
+ waranties of merchantability and fitness for a particular purpose.
+
+ Hewlett-Packard Company shall not be liable for errors contained
+ herein or direct, indirect, special, incidental, or consequential
+ damages in connection with the furnishing, performance, or use of
+ this material.
+
+
+*UNIX is a trademark of AT&T in the USA and other countries.
+
+*/
+
+%option bison-bridge
+%option reentrant
+%option prefix="bsdl"
+%option outfile="lex.yy.c"
+
+%{
+/* Begin lex input specifications */
+
+#include <stdlib.h>
+#include <ctype.h>
+
+#include "bsdl_sysdep.h"
+
+#include "bsdl_msg.h"
+
+#include "bsdl_bison.h"
+#include "bsdl_parser.h"
+
+#ifdef DMALLOC
+#include "dmalloc.h"
+#endif
+
+#define YY_EXTRA_TYPE scan_extra_t *
+
+static char *new_string( scan_extra_t *, const char * );
+
+#define BINARY 0
+#define DECIMAL 1
+#define BIN_X 2
+#define HEX 3
+
+%}
+%a 2800
+%e 1200
+%p 4700
+%n 520
+%k 140
+%o 3000
+%START RES BOU REG PAC ISC
+White [ \t\b\r]*
+VHDL_Comment \-\-[^\n]*
+Binary_Pattern [0-1]+
+Bin_X_Pattern [0-1X]+
+Hex_String [0-9A-F]+
+Digit [0-9]
+Exponent [E][+-]?{Digit}+
+Real_Number {Digit}+[\.]{Digit}+{Exponent}
+Decimal_Number {Digit}+
+Identifier [A-Z][A-Z0-9_]*
+Eol [\n]
+Comma [,]
+Lparen [\(]
+Rparen [\)]
+Lbracket [\[]
+Rbracket [\]]
+Colon [\:]
+Asterisk [\*]
+Dollar [\$]
+Equal [\=]
+Plus [\+]
+Minus [\-]
+Sh_Right [\>][\>]
+Sh_Left [\<][\<]
+Tilde [\~]
+Question_Exclamation [\?][\!]
+Question [\?]
+Exclamation [\!]
+Illegal [^A-Z0-9 \t\b\n\r\"\&\'\*\(\)\[\]\_\:\.\,\;\$\=\+\-\>\<\~\?\!]
+Constant CONSTANT
+Physical_Pin_Map PHYSICAL_PIN_MAP
+Pin_Map PIN_MAP
+Pin_Map_String PIN_MAP_STRING
+Tap_Scan_In TAP_SCAN_IN
+Tap_Scan_Out TAP_SCAN_OUT
+Tap_Scan_Clock TAP_SCAN_CLOCK
+Tap_Scan_Mode TAP_SCAN_MODE
+Tap_Scan_Reset TAP_SCAN_RESET
+Instruction_Length INSTRUCTION_LENGTH
+Instruction_Opcode INSTRUCTION_OPCODE
+Instruction_Capture INSTRUCTION_CAPTURE
+Instruction_Disable INSTRUCTION_DISABLE
+Instruction_Guard INSTRUCTION_GUARD
+Instruction_Private INSTRUCTION_PRIVATE
+Register_Access REGISTER_ACCESS
+Boundary_Length BOUNDARY_LENGTH
+Boundary_Register BOUNDARY_REGISTER
+Idcode_Register IDCODE_REGISTER
+Usercode_Register USERCODE_REGISTER
+Boundary BOUNDARY
+Bypass BYPASS
+Clamp CLAMP
+Extest EXTEST
+Highz HIGHZ
+Idcode IDCODE
+Intest INTEST
+Preload PRELOAD
+Runbist RUNBIST
+Sample SAMPLE
+Usercode USERCODE
+Device_Id DEVICE_ID
+Input INPUT
+Output2 OUTPUT2
+Output3 OUTPUT3
+Control CONTROL
+Controlr CONTROLR
+Internal INTERNAL
+Clock CLOCK
+Observe_Only OBSERVE_ONLY
+Bidir BIDIR
+Bidir_In BIDIR_IN
+Bidir_Out BIDIR_OUT
+Z Z
+Weak0 WEAK0
+Weak1 WEAK1
+Pull0 PULL0
+Pull1 PULL1
+Keeper KEEPER
+Compliance_Patterns COMPLIANCE_PATTERNS
+Component_Conformance COMPONENT_CONFORMANCE
+Std_1149_1_1990 STD_1149_1_1990
+Std_1149_1_1993 STD_1149_1_1993
+Std_1149_1_2001 STD_1149_1_2001
+ISC_Conformance ISC_CONFORMANCE
+Std_1532_2001 STD_1532_2001
+Std_1532_2002 STD_1532_2002
+ISC_Pin_Behavior ISC_PIN_BEHAVIOR
+ISC_Fixed_System_Pins ISC_FIXED_SYSTEM_PINS
+ISC_Status ISC_STATUS
+Implemented IMPLEMENTED
+ISC_Blank_Usercode ISC_BLANK_USERCODE
+ISC_Security ISC_SECURITY
+ISC_Disable_Read ISC_DISABLE_READ
+ISC_Disable_Program ISC_DISABLE_PROGRAM
+ISC_Disable_Erase ISC_DISABLE_ERASE
+ISC_Disable_Key ISC_DISABLE_KEY
+ISC_Flow ISC_FLOW
+Unprocessed UNPROCESSED
+Exit_On_Error EXIT_ON_ERROR
+Array ARRAY
+Security SECURITY
+Initialize INITIALIZE
+Repeat REPEAT
+Terminate TERMINATE
+Loop LOOP
+Wait WAIT
+Min MIN
+Max MAX
+Crc CRC
+Ost OST
+ISC_Procedure ISC_PROCEDURE
+ISC_Action ISC_ACTION
+Proprierary PROPRIETARY
+Optional OPTIONAL
+Recommended RECOMMENDED
+ISC_Illegal_Exit ISC_ILLEGAL_EXIT
+%%
+{Constant} {yyextra->Base = DECIMAL; return( CONSTANT ); }
+{Pin_Map} {return( PIN_MAP ); }
+{Physical_Pin_Map} {return( PHYSICAL_PIN_MAP ); }
+{Pin_Map_String} {return( PIN_MAP_STRING ); }
+{Tap_Scan_In} {return( TAP_SCAN_IN ); }
+{Tap_Scan_Out} {return( TAP_SCAN_OUT ); }
+{Tap_Scan_Clock} {return( TAP_SCAN_CLOCK ); }
+{Tap_Scan_Mode} {return( TAP_SCAN_MODE ); }
+{Tap_Scan_Reset} {return( TAP_SCAN_RESET ); }
+{Instruction_Length} {yyextra->Base = DECIMAL; return( INSTRUCTION_LENGTH ); }
+{Instruction_Opcode} {yyextra->Base = BINARY; /* Enable Binary Patterns */
+ return( INSTRUCTION_OPCODE ); }
+{Instruction_Capture} {yyextra->Base = BIN_X; /* Enable Bin_X Patterns */
+ return( INSTRUCTION_CAPTURE ); }
+{Instruction_Disable} {return( INSTRUCTION_DISABLE ); }
+{Instruction_Guard} {return( INSTRUCTION_GUARD ); }
+{Instruction_Private} {return( INSTRUCTION_PRIVATE ); }
+{Register_Access} {BEGIN(REG); yyextra->Base = DECIMAL;
+ return( REGISTER_ACCESS ); }
+{Boundary_Length} {yyextra->Base = DECIMAL; return( BOUNDARY_LENGTH ); }
+{Boundary_Register} {BEGIN(BOU); yyextra->Base = DECIMAL;
+ return( BOUNDARY_REGISTER ); }
+{Idcode_Register} {yyextra->Base = BIN_X; return( IDCODE_REGISTER ); }
+{Usercode_Register} {yyextra->Base = BIN_X; return( USERCODE_REGISTER ); }
+{Compliance_Patterns} {yyextra->Base = DECIMAL; return( COMPLIANCE_PATTERNS ); }
+{Component_Conformance} {return( COMPONENT_CONFORMANCE ); }
+{Std_1149_1_1990} {return( STD_1149_1_1990 ); }
+{Std_1149_1_1993} {return( STD_1149_1_1993 ); }
+{Std_1149_1_2001} {return( STD_1149_1_2001 ); }
+{ISC_Conformance} {yyextra->Base = DECIMAL; return( ISC_CONFORMANCE ); }
+{Std_1532_2001} {return( STD_1532_2001 ); }
+{Std_1532_2002} {return( STD_1532_2002 ); }
+{ISC_Pin_Behavior} {BEGIN(ISC); yyextra->Base = DECIMAL; return( ISC_PIN_BEHAVIOR ); }
+{ISC_Fixed_System_Pins} {yyextra->Base = DECIMAL; return( ISC_FIXED_SYSTEM_PINS ); }
+{ISC_Status} {yyextra->Base = DECIMAL; return( ISC_STATUS ); }
+<ISC>{Implemented} {return( IMPLEMENTED ); }
+{ISC_Blank_Usercode} {yyextra->Base = BIN_X; return( ISC_BLANK_USERCODE ); }
+{ISC_Security} {yyextra->Base = DECIMAL; return( ISC_SECURITY ); }
+{ISC_Disable_Read} {yyextra->Base = DECIMAL; return( ISC_DISABLE_READ ); }
+{ISC_Disable_Program} {yyextra->Base = DECIMAL; return( ISC_DISABLE_PROGRAM ); }
+{ISC_Disable_Erase} {yyextra->Base = DECIMAL; return( ISC_DISABLE_ERASE ); }
+{ISC_Disable_Key} {yyextra->Base = DECIMAL; return( ISC_DISABLE_KEY ); }
+{ISC_Flow} {yyextra->Base = DECIMAL; return( ISC_FLOW ); }
+<ISC>{Unprocessed} {return( UNPROCESSED ); }
+<ISC>{Exit_On_Error} {return( EXIT_ON_ERROR ); }
+<ISC>{Array} {return( ARRAY ); }
+<ISC>{Security} {return( SECURITY ); }
+<ISC>{Preload} {return( PRELOAD ); }
+<ISC>{Initialize} {return( INITIALIZE ); }
+<ISC>{Repeat} {yyextra->Base = DECIMAL; return( REPEAT ); }
+<ISC>{Terminate} {return( TERMINATE ); }
+<ISC>{Loop} {return( LOOP ); }
+<ISC>{Wait} {return( WAIT ); }
+<ISC>{Min} {return( MIN ); }
+<ISC>{Max} {return( MAX ); }
+<ISC>{Crc} {return( CRC ); }
+<ISC>{Ost} {return( OST ); }
+<ISC>{Dollar} {return( DOLLAR ); }
+<ISC>{Equal} {return( EQUAL ); }
+<ISC>{Plus} {return( PLUS ); }
+<ISC>{Minus} {return( MINUS ); }
+<ISC>{Sh_Right} {return( SH_RIGHT ); }
+<ISC>{Sh_Left} {return( SH_LEFT ); }
+<ISC>{Tilde} {return( TILDE ); }
+<ISC>{Question_Exclamation} {return( QUESTION_EXCLAMATION ); }
+<ISC>{Question} {return( QUESTION_MARK ); }
+<ISC>{Exclamation} {return( EXCLAMATION_MARK ); }
+{ISC_Procedure} {yyextra->Base = DECIMAL; return( ISC_PROCEDURE ); }
+{ISC_Action} {yyextra->Base = DECIMAL; return( ISC_ACTION ); }
+<ISC>{Proprierary} {return( PROPRIETARY ); }
+<ISC>{Optional} {return( OPTIONAL ); }
+<ISC>{Recommended} {return( RECOMMENDED ); }
+{ISC_Illegal_Exit} {return( ISC_ILLEGAL_EXIT ); }
+<REG,ISC>{Bypass} {return( BYPASS ); }
+<REG,ISC>{Boundary} {return( BOUNDARY ); }
+<REG,ISC>{Clamp} {return( CLAMP ); }
+<REG,ISC>{Extest} {return( EXTEST ); }
+<REG,ISC>{Highz} {return( HIGHZ ); }
+<REG,ISC>{Idcode} {return( IDCODE ); }
+<REG,ISC>{Intest} {return( INTEST ); }
+<REG,ISC>{Preload} {return( PRELOAD ); }
+<REG,ISC>{Runbist} {return( RUNBIST ); }
+<REG,ISC>{Sample} {return( SAMPLE ); }
+<REG,ISC>{Usercode} {return( USERCODE ); }
+<REG,ISC>{Device_Id} {return( DEVICE_ID ); }
+<BOU,PAC>{Input} {return( INPUT ); }
+<BOU,PAC>{Output2} {return( OUTPUT2 ); }
+<BOU,PAC>{Output3} {return( OUTPUT3 ); }
+<BOU,PAC>{Controlr} {return( CONTROLR ); }
+<BOU,PAC>{Control} {return( CONTROL ); }
+<BOU,PAC>{Internal} {return( INTERNAL ); }
+<BOU,PAC>{Clock} {return( CLOCK ); }
+<BOU,PAC>{Observe_Only} {return( OBSERVE_ONLY ); }
+<BOU>{Bidir} {return( BIDIR ); }
+<PAC>{Bidir_In} {return( BIDIR_IN ); }
+<PAC>{Bidir_Out} {return( BIDIR_OUT ); }
+<BOU>{Z} {return( Z ); }
+<BOU>{Weak0} {return( WEAK0 ); }
+<BOU>{Weak1} {return( WEAK1 ); }
+<BOU>{Pull0} {return( PULL0 ); }
+<BOU>{Pull1} {return( PULL1 ); }
+<BOU>{Keeper} {return( KEEPER ); }
+{Eol} {yylineno++; /* Count lines */}
+{Comma} {return( COMMA ); }
+{Lparen} {return( LPAREN );}
+{Rparen} {return( RPAREN );}
+{Lbracket} {return( LBRACKET ); }
+{Rbracket} {return( RBRACKET ); }
+{Colon} {return( COLON ); }
+{Asterisk} {return( ASTERISK ); }
+{White} { /* Do Nothing on White Space */ }
+{VHDL_Comment} { /* Do Nothing on Comments */ }
+{Bin_X_Pattern} {if (yyextra->Base != BIN_X) REJECT;
+ yylval->str = new_string( yyextra, yytext );
+ return( BIN_X_PATTERN );}
+{Hex_String} {if (yyextra->Base != HEX) REJECT;
+ yylval->str = new_string( yyextra, yytext );
+ return( HEX_STRING );}
+{Identifier} {yylval->str = new_string( yyextra, yytext );
+ return( IDENTIFIER ); }
+{Binary_Pattern} {if (yyextra->Base != BINARY) REJECT;
+ yylval->str = new_string( yyextra, yytext );
+ return( BINARY_PATTERN );}
+{Decimal_Number} {if (yyextra->Base != DECIMAL) REJECT;
+ yylval->integer = atoi( (char *)yytext );
+ return( DECIMAL_NUMBER );}
+{Real_Number} {yylval->str = new_string( yyextra, yytext );
+ return( REAL_NUMBER );}
+{Illegal} {bsdl_msg( yyextra->proc_mode,
+ BSDL_MSG_ERR,
+ _("Illegal character %c (/%03o) at line %d:\n"),
+ (char)yytext[yyleng-1], (int)yytext[yyleng-1],
+ yylineno );
+ yyextra->Compile_Errors++;
+ return( ILLEGAL ); /* Will cause syntax error */}
+<<EOF>> {
+ yypop_buffer_state( yyscanner );
+ if ( !YY_CURRENT_BUFFER )
+ yyterminate();
+}
+%%
+/*****************************************************************************
+ * void *bsdl_flex_init( int proc_mode )
+ *
+ * Initializes the scanner and storage elements extra data structure.
+ *
+ * Parameters
+ * proc_mode : processing mode, consisting of BSDL_MODE_* bits
+ *
+ * Returns
+ * pointer to newly initialized scanner structure
+ ****************************************************************************/
+void *bsdl_flex_init( int proc_mode )
+{
+ scan_extra_t *extra;
+ yyscan_t scanner;
+
+ /* get our scanner structure */
+ if (yylex_init(&scanner) != 0)
+ {
+ bsdl_msg( proc_mode,
+ BSDL_MSG_FATAL, _("Scanner could not be initialized\n") );
+ return NULL;
+ }
+
+ if (!(extra = (scan_extra_t *)malloc( sizeof( scan_extra_t ) ))) {
+ bsdl_msg( proc_mode,
+ BSDL_MSG_FATAL, _("Out of memory, %s line %i\n"), __FILE__, __LINE__ );
+ yylex_destroy( scanner );
+ return NULL;
+ }
+
+ extra->proc_mode = proc_mode;
+ extra->Compile_Errors = 0;
+ extra->Base = DECIMAL;
+
+ yyset_extra( extra, scanner );
+
+ return scanner;
+}
+
+
+/*****************************************************************************
+ * void bsdl_flex_deinit( void *scanner )
+ *
+ * Deinitializes the scanner and closes the input file.
+ *
+ * Parameters
+ * scanner : pointer to scanner definition structure
+ *
+ * Returns
+ * void
+ ****************************************************************************/
+void bsdl_flex_deinit( void *scanner )
+{
+ if (yyget_in( scanner ))
+ {
+ /* file might still be open so close it in any case
+ e.g. when a compile error occured and the parser didn't hit EOF/yywrap() */
+ fclose( yyget_in( scanner ) );
+ yyset_in( NULL, scanner );
+ }
+ free( yyget_extra( scanner ) );
+ yylex_destroy( scanner );
+}
+
+
+/*****************************************************************************
+ * void yywrap( yyscan_t scanner )
+ *
+ * Closes the input file upon EOF condition.
+ *
+ * Parameters
+ * scanner : pointer to scanner definition structure
+ *
+ * Returns
+ * 1
+ ****************************************************************************/
+int yywrap( yyscan_t scanner )
+{
+ if (yyget_in( scanner )) {
+ fclose( yyget_in( scanner ) );
+ yyset_in( NULL, scanner );
+ }
+ return 1;
+}
+
+
+/*****************************************************************************
+ * char *new_string( scan_extra_t *extra, const char *str )
+ *
+ * Allocates memory for a string and copies the contents of *str.
+ *
+ * Parameters
+ * extra : pointer to extra data structure
+ * str : pointer to string to be duplicated
+ *
+ * Returns
+ * pointer to allocated and initialized string memory
+ ****************************************************************************/
+static char *new_string( scan_extra_t *extra, const char *str )
+{
+ char *n_str;
+ size_t n_str_size;
+
+ n_str_size = strlen( str ) + 1;
+ if ((n_str = (char *)malloc( n_str_size )))
+ {
+ strncpy( n_str, str, n_str_size-1 );
+ n_str[n_str_size-1] = '\0'; /* set very last element to EOS */
+ }
+ else
+ bsdl_msg( extra->proc_mode,
+ BSDL_MSG_FATAL, _("Out of memory, %s line %i\n"), __FILE__, __LINE__ );
+
+ return(n_str);
+}
+
+
+/*****************************************************************************
+ * void bsdl_flex_switch_buffer( yyscan_t scanner, const char *buffer, int lineno )
+ *
+ * Selects the specified string buffer for further scanning.
+ *
+ * Parameters
+ * scanner : pointer to scanner definition structure
+ * buffer : pointer to string buffer to be scanned
+ * lineno : initial line number offset
+ *
+ * Returns
+ * void
+ ****************************************************************************/
+void bsdl_flex_switch_buffer( yyscan_t scanner, const char *buffer, int lineno )
+{
+ /* ugly, ulgy, ugly
+ prepare yyg for later use of YY_CURRENT_BUFFER */
+ struct yyguts_t * yyg = (struct yyguts_t*)scanner;
+
+ /* yy_scan_string() switches to the string buffer internally,
+ so we must save the current buffer state explicitly by pushing the stack
+ and setting top of stack to the current buffer state again.
+ yy_scan_string() can then savely switch YY_CURRENT_BUFFER to the string buffer.
+ yypop_buffer_state() will delete the string buffer afterwards and pop the saved
+ current buffer state. */
+ yypush_buffer_state( YY_CURRENT_BUFFER, scanner );
+ yy_scan_string( buffer, scanner );
+ yyset_lineno( lineno, scanner );
+}
+
+
+/*****************************************************************************
+ * void bsdl_flex_stop_buffer( yyscan_t scanner )
+ *
+ * Removes the current buffer from the scanner stack.
+ *
+ * Parameters
+ * scanner : pointer to scanner definition structure
+ *
+ * Returns
+ * void
+ ****************************************************************************/
+void bsdl_flex_stop_buffer( yyscan_t scanner )
+{
+ yypop_buffer_state( scanner );
+// if ( !YY_CURRENT_BUFFER )
+// yyterminate();
+}
+
+
+/*****************************************************************************
+ * int bsdl_flex_get_compile_errors( yyscan_t scanner )
+ *
+ * Retrieves the accumulated number of compile errors encountered so far.
+ *
+ * Parameters
+ * scanner : pointer to scanner definition structure
+ *
+ * Returns
+ * number of compile errors
+ ****************************************************************************/
+int bsdl_flex_get_compile_errors( yyscan_t scanner )
+{
+ scan_extra_t *extra = yyget_extra( scanner );
+ return extra->Compile_Errors;
+}
+
+
+/*****************************************************************************
+ * void bsdl_flex_set_compile_errors( int n, yyscan_t scanner )
+ *
+ * Sets the number of compile errors to n.
+ *
+ * Parameters
+ * n : preset number
+ * scanner : pointer to scanner definition structure
+ *
+ * Returns
+ * void
+ ****************************************************************************/
+static void bsdl_flex_set_compile_errors( int n, yyscan_t scanner )
+{
+ scan_extra_t *extra = yyget_extra( scanner );
+ extra->Compile_Errors = n;
+}
+
+
+/*****************************************************************************
+ * int bsdl_flex_postinc_compile_errors( yyscan_t scanner )
+ *
+ * Increments the number of compile errors.
+ *
+ * Parameters
+ * scanner : pointer to scanner definition structure
+ *
+ * Returns
+ * number of compile errors before increment
+ ****************************************************************************/
+int bsdl_flex_postinc_compile_errors( yyscan_t scanner )
+{
+ int errors = bsdl_flex_get_compile_errors( scanner );
+
+ bsdl_flex_set_compile_errors( errors+1, scanner );
+ return errors;
+}
+
+
+/*****************************************************************************
+ * void bsdl_flex_set_bin_x( yyscan_t scanner )
+ *
+ * Selects BIN_X mode for pattern matching.
+ *
+ * Parameters
+ * scanner : pointer to scanner definition structure
+ *
+ * Returns
+ * void
+ ****************************************************************************/
+void bsdl_flex_set_bin_x( yyscan_t scanner )
+{
+ scan_extra_t *extra = yyget_extra( scanner );
+ extra->Base = BIN_X;
+}
+
+
+/*****************************************************************************
+ * void bsdl_flex_set_hex( yyscan_t scanner )
+ *
+ * Selects HEX mode for pattern matching.
+ *
+ * Parameters
+ * scanner : pointer to scanner definition structure
+ *
+ * Returns
+ * void
+ ****************************************************************************/
+void bsdl_flex_set_hex( yyscan_t scanner )
+{
+ scan_extra_t *extra = yyget_extra( scanner );
+ extra->Base = HEX;
+}
+
+
+/*****************************************************************************
+ * void bsdl_flex_set_decimal( yyscan_t scanner )
+ *
+ * Selects DECIMAL mode for pattern matching.
+ *
+ * Parameters
+ * scanner : pointer to scanner definition structure
+ *
+ * Returns
+ * void
+ ****************************************************************************/
+void bsdl_flex_set_decimal( yyscan_t scanner )
+{
+ scan_extra_t *extra = yyget_extra( scanner );
+ extra->Base = DECIMAL;
+}
+
+
+/*
+ Local Variables:
+ mode:C
+ c-default-style:gnu
+ indent-tabs-mode:nil
+ End:
+*/
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2008, Arnim Laeuger
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Arnim Laeuger <arniml@users.sourceforge.net>, 2007.
+ *
+ */
+
+#ifndef BSDL_MSG_H
+#define BSDL_MSG_H
+
+#include "bsdl_types.h"
+
+/* message types for bsdl_msg() */
+#define BSDL_MSG_NOTE 0
+#define BSDL_MSG_WARN 1
+#define BSDL_MSG_ERR 2
+#define BSDL_MSG_FATAL 3
+
+void bsdl_msg( int, int, const char *, ... );
+
+#endif /* BSDL_MSG_H */
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2008, Arnim Laeuger
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Arnim Laeuger <arniml@users.sourceforge.net>, 2008.
+ *
+ */
+
+#ifndef BSDL_PARSER_H
+#define BSDL_PARSER_H
+
+#include "bsdl_types.h"
+
+/* VHDL lexer declarations */
+void *bsdl_flex_init( int );
+void bsdl_flex_deinit( void * );
+void bsdl_flex_set_bin_x( void * );
+void bsdl_flex_set_hex( void * );
+void bsdl_flex_set_decimal( void * );
+int bsdl_flex_get_compile_errors( void * );
+int bsdl_flex_postinc_compile_errors( void * );
+void bsdl_flex_switch_buffer( void *, const char *, int );
+void bsdl_flex_stop_buffer( void * );
+
+/* BSDL parser declarations */
+bsdl_parser_priv_t *bsdl_parser_init( jtag_ctrl_t * );
+void bsdl_parser_deinit( bsdl_parser_priv_t * );
+int bsdlparse( bsdl_parser_priv_t * );
+
+/* BSDL semantic functions */
+int bsdl_process_elements( jtag_ctrl_t *, const char * );
+
+#endif /* BSDL_PARSER_H */
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2008, Arnim Laeuger
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Arnim Laeuger <arniml@users.sourceforge.net>, 2007.
+ *
+ * This file contains semantic actions that are called by the bison
+ * parser. They interface between the parser and the jtag application.
+ *
+ */
+
+#include <stdlib.h>
+#include <stdio.h>
+#include <string.h>
+
+#include <jtag.h>
+#include <cmd.h>
+
+#include "bsdl_sysdep.h"
+
+#include "bsdl_types.h"
+#include "bsdl_msg.h"
+
+#include "bsdl_parser.h"
+#include "bsdl_bison.h"
+
+#ifdef DMALLOC
+#include "dmalloc.h"
+#endif
+
+/*****************************************************************************
+ * void print_cmd(char **cmd)
+ *
+ * Prints the strings in array cmd until NULL is encountered.
+ *
+ * Parameters
+ * cmd : array of strings to print, terminated by NULL
+ *
+ * Returns
+ * void
+ ****************************************************************************/
+static void print_cmd(char **cmd)
+{
+ int idx = 0;
+ char *elem;
+
+ while ((elem = cmd[idx])) {
+ printf("%s%s", idx > 0 ? " ": "", elem);
+ idx++;
+ }
+ printf("\n");
+}
+
+
+/*****************************************************************************
+ * int bsdl_set_instruction_length( jtag_ctrl_t *jc )
+ *
+ * Sets the specified length of the instruction register via shell command
+ * instruction length <len>
+ *
+ * Parameters
+ * jc : jtag control structure
+ *
+ * Returns
+ * 1 -> all ok
+ * 0 -> error occured
+ ****************************************************************************/
+static int bsdl_set_instruction_length( jtag_ctrl_t *jc )
+{
+ char lenstring[6];
+ char *cmd[] = {"instruction",
+ "length",
+ lenstring,
+ NULL};
+
+ snprintf( lenstring, 6, "%i", jc->instr_len );
+ lenstring[5] = '\0';
+
+ if (jc->proc_mode & BSDL_MODE_INSTR_EXEC)
+ cmd_run( jc->chain, cmd );
+ if (jc->proc_mode & BSDL_MODE_INSTR_PRINT)
+ print_cmd( cmd );
+
+ return 1;
+}
+
+
+/*****************************************************************************
+ * int bsdl_emit_ports( jtag_ctrl_t *jc )
+ *
+ * Adds the specified port name as a signal via shell command
+ * signal <pin>
+ * The port name is taken from the port_desc structure that was filled in
+ * previously by rule Scalar_or_Vector. This way, the function can build
+ * vectored ports as well.
+ * Keep in mind that multiple names can be defined by one port specification
+ * (there's a names_list in port_desc).
+ *
+ * Parameters
+ * jc : jtag control structure
+ *
+ * Returns
+ * 1 -> all ok
+ * 0 -> error occured
+ ****************************************************************************/
+static int bsdl_emit_ports(jtag_ctrl_t *jc)
+{
+ port_desc_t *pd = jc->port_desc;
+ struct string_elem *name;
+ size_t str_len, name_len;
+ char *port_string;
+ int idx;
+ int result = 0;
+ char *cmd[] = {"signal",
+ NULL,
+ NULL};
+
+ while (pd)
+ {
+ name = pd->names_list;
+ while (name) {
+ /* handle indexed port name:
+ - names of scalar ports are simply copied from the port_desc structure
+ to the final string that goes into ci
+ - names of vectored ports are expanded with their decimal index as
+ collected earlier in rule Scalar_or_Vector
+ */
+ name_len = strlen( name->string );
+ str_len = name_len + 1 + 10 + 1 + 1;
+ if ((port_string = (char *)malloc( str_len )) != NULL)
+ {
+ cmd[1] = port_string;
+
+ for (idx = pd->low_idx; idx <= pd->high_idx; idx++)
+ {
+ if (pd->is_vector)
+ snprintf( port_string, str_len-1, "%s(%d)", name->string, idx );
+ else
+ strncpy( port_string, name->string, str_len-1 );
+ port_string[str_len-1] = '\0';
+
+ if (jc->proc_mode & BSDL_MODE_INSTR_EXEC)
+ cmd_run( jc->chain, cmd );
+ if (jc->proc_mode & BSDL_MODE_INSTR_PRINT)
+ print_cmd( cmd );
+ }
+
+ free( port_string );
+ result = 1;
+ }
+ else
+ bsdl_msg( jc->proc_mode,
+ BSDL_MSG_FATAL, _("Out of memory, %s line %i\n"), __FILE__, __LINE__ );
+
+ name = name->next;
+ }
+
+ pd = pd->next;
+ }
+
+ return result;
+}
+
+
+/*****************************************************************************
+ * int create_register( jtag_ctrl_t *jc, char *reg_name, size_t len )
+ *
+ * Generic function to create a jtag register via shell command
+ * register <reg_name> <len>
+ *
+ * Parameters
+ * jc : jtag control structure
+ * reg_name : name of the new register
+ * len : number of bits (= length) of new register
+ *
+ * Returns
+ * 1 -> all ok
+ * 0 -> error occured
+ ****************************************************************************/
+static int create_register( jtag_ctrl_t *jc, char *reg_name, size_t len)
+{
+ const size_t str_len = 10;
+ char len_str[str_len+1];
+ char *cmd[] = {"register",
+ reg_name,
+ len_str,
+ NULL};
+
+ if (part_find_data_register( jc->part, reg_name ))
+ return 1;
+
+ /* convert length information to string */
+ snprintf( len_str, str_len, "%zu", len );
+
+ if (jc->proc_mode & BSDL_MODE_INSTR_EXEC)
+ cmd_run( jc->chain, cmd );
+ if (jc->proc_mode & BSDL_MODE_INSTR_PRINT)
+ print_cmd( cmd );
+
+ return 1;
+}
+
+
+/*****************************************************************************
+ * int bsdl_process_idcode( jtag_ctrl_t *jc )
+ *
+ * Creates the DIR register based on the extracted idcode.
+ *
+ * Parameters
+ * jc : jtag control structure
+ *
+ * Returns
+ * 1 -> all ok
+ * 0 -> error occured
+ ****************************************************************************/
+static int bsdl_process_idcode(jtag_ctrl_t *jc)
+{
+ if (jc->idcode)
+ create_register( jc, "DIR", strlen( jc->idcode ) );
+ else
+ bsdl_msg( jc->proc_mode,
+ BSDL_MSG_WARN, _("No IDCODE specification found.\n") );
+
+ return 1;
+}
+
+
+/*****************************************************************************
+ * int bsdl_process_usercode( jtag_ctrl_t *jc )
+ *
+ * Creates the USERCODE register, the contents of the usercode string is
+ * ignored.
+ *
+ * Parameters
+ * jc : jtag control structure
+ *
+ * Returns
+ * 1 -> all ok
+ * 0 -> error occured
+ ****************************************************************************/
+static int bsdl_process_usercode( jtag_ctrl_t *jc )
+{
+ if (jc->usercode)
+ create_register( jc, "USERCODE", strlen( jc->usercode ) );
+
+ /* we're not interested in the usercode value at all */
+
+ return 1;
+}
+
+
+/*****************************************************************************
+ * int bsdl_set_bsr_length( jtag_ctrl_t *jc )
+ *
+ * Creates the BSR register based on the specified length.
+ *
+ * Parameters
+ * jc : jtag control structure
+ *
+ * Returns
+ * 1 -> all ok
+ * 0 -> error occured
+ ****************************************************************************/
+static int bsdl_set_bsr_length( jtag_ctrl_t *jc )
+{
+ create_register( jc, "BSR", jc->bsr_len );
+
+ return 1;
+}
+
+
+/*****************************************************************************
+ * int bsdl_process_cell_info( jtag_ctrl_t *jc )
+ * Cell Info management function
+ *
+ * Creates a BSR cell from the temporary storage variables via shell command
+ * bit <bit_num> <type> <default> <signal> [<cbit> <cval> Z]
+ *
+ * Parameters
+ * jc : jtag control structure
+ *
+ * Returns
+ * 1 -> all ok
+ * 0 -> error occured
+ ****************************************************************************/
+static int bsdl_process_cell_info( jtag_ctrl_t *jc )
+{
+ cell_info_t *ci = jc->cell_info_first;
+ const size_t str_len = 10;
+ char bit_num_str[str_len+1];
+ char ctrl_bit_num_str[str_len+1];
+ char disable_safe_value_str[str_len+1];
+ char *cmd[] = {"bit",
+ bit_num_str,
+ NULL,
+ NULL,
+ NULL,
+ NULL,
+ disable_safe_value_str,
+ "Z",
+ NULL};
+
+ while (ci)
+ {
+ /* convert bit number to string */
+ snprintf( bit_num_str, str_len, "%i", ci->bit_num );
+ bit_num_str[str_len] = '\0';
+ /* convert cell function from BSDL token to jtag syntax */
+ switch (ci->cell_function)
+ {
+ case INTERNAL:
+ /* fall through */
+ case OUTPUT2:
+ /* fall through */
+ case OUTPUT3:
+ cmd[2] = "O";
+ break;
+ case OBSERVE_ONLY:
+ /* fall through */
+ case INPUT:
+ /* fall through */
+ case CLOCK:
+ cmd[2] = "I";
+ break;
+ case CONTROL:
+ /* fall through */
+ case CONTROLR:
+ cmd[2] = "C";
+ break;
+ case BIDIR:
+ cmd[2] = "B";
+ break;
+ default:
+ /* spoil command */
+ cmd[2] = "?";
+ break;
+ }
+ /* convert basic safe value */
+ cmd[3] = strcasecmp( ci->basic_safe_value, "x" ) == 0 ? "?" : ci->basic_safe_value;
+ /* apply port name */
+ cmd[4] = ci->port_name;
+
+ /* add disable spec if present */
+ if (ci->ctrl_bit_num >= 0)
+ {
+ /* convert bit number to string */
+ snprintf( ctrl_bit_num_str, str_len, "%i", ci->ctrl_bit_num );
+ ctrl_bit_num_str[str_len] = '\0';
+ /* convert disable safe value to string */
+ snprintf( disable_safe_value_str, str_len, "%i", ci->disable_safe_value );
+ disable_safe_value_str[str_len] = '\0';
+ cmd[5] = ctrl_bit_num_str;
+ }
+ else
+ /* stop command procssing here */
+ cmd[5] = NULL;
+
+ if (jc->proc_mode & BSDL_MODE_INSTR_EXEC)
+ cmd_run( jc->chain, cmd );
+ if (jc->proc_mode & BSDL_MODE_INSTR_PRINT)
+ print_cmd( cmd );
+
+ ci = ci->next;
+ }
+
+ return 1;
+}
+
+
+/*****************************************************************************
+ * int bsdl_process_register_access( jtag_ctrl_t *jc )
+ * Register Access management function
+ *
+ * Runs through the main instruction list and builds the instruction/register
+ * association for each instruction from the register access specifications
+ * via shell command
+ * instruction <instruction> <code> <register>
+ *
+ * Additional register are created on the fly:
+ * - standard registers that haven't been created so far
+ * - non-standard registers encountered in register access specs
+ *
+ * Mandatory instruction/register associations are generated also in
+ * absence of a related register access specification (such specs are
+ * optional in the BSDL standard).
+ *
+ * Parameters
+ * jc : jtag control structure
+ *
+ * Returns
+ * 1 -> all ok
+ * 0 -> error occured
+ ****************************************************************************/
+static int bsdl_process_register_access( jtag_ctrl_t *jc )
+{
+ ainfo_elem_t *ai;
+ instr_elem_t *cinst;
+
+ /* ensure that all mandatory registers are created prior to
+ handling the instruction/register associations
+ + BOUNDARY/BSR has been generated during the parsing process
+ + DEVICE_ID/DIR has been generated during the parsing process
+ */
+ /* we need a BYPASS register */
+ create_register( jc, "BYPASS", 1 );
+
+ /* next scan through all register_access definitions and create
+ the non-standard registers */
+ ai = jc->ainfo_list;
+ while (ai)
+ {
+ int is_std = 0;
+
+ if (strcasecmp( ai->reg, "BOUNDARY" ) == 0) is_std = 1;
+ if (strcasecmp( ai->reg, "BYPASS" ) == 0) is_std = 1;
+ if (strcasecmp( ai->reg, "DEVICE_ID" ) == 0) is_std = 1;
+ if (strcasecmp( ai->reg, "USERCODE" ) == 0) is_std = 1;
+
+ if (!is_std)
+ create_register( jc, ai->reg, ai->reg_len );
+
+ ai = ai->next;
+ }
+
+
+ /* next scan through all instruction/opcode definitions and resolve
+ the instruction/register associations for these */
+ cinst = jc->instr_list;
+ while (cinst)
+ {
+ char *reg_name = NULL;
+ char *instr_name = NULL;
+
+ /* now see which of the register_access elements matches this instruction */
+ ai = jc->ainfo_list;
+ while (ai && (reg_name == NULL))
+ {
+ instr_elem_t *tinst = ai->instr_list;
+
+ while (tinst && (reg_name == NULL))
+ {
+ if (strcasecmp( tinst->instr, cinst->instr ) == 0)
+ {
+ /* found the instruction inside the current access info,
+ now set the register name
+ map some standard register names to different internal names*/
+ if (strcasecmp( ai->reg, "BOUNDARY" ) == 0) reg_name = "BSR";
+ else if (strcasecmp( ai->reg, "DEVICE_ID" ) == 0) reg_name = "DIR";
+ else reg_name = ai->reg;
+ }
+
+ tinst = tinst->next;
+ }
+
+ ai = ai->next;
+ }
+
+ if (reg_name == NULL)
+ {
+ /* BSDL file didn't specify an explicit register_access definition
+ if we're looking at a standard mandatory instruction, we should
+ build the association ourselves */
+ if (strcasecmp( cinst->instr, "BYPASS" ) == 0) reg_name = "BYPASS";
+ else if (strcasecmp( cinst->instr, "CLAMP" ) == 0) reg_name = "BYPASS";
+ else if (strcasecmp( cinst->instr, "EXTEST" ) == 0) reg_name = "BSR";
+ else if (strcasecmp( cinst->instr, "HIGHZ" ) == 0) reg_name = "BYPASS";
+ else if (strcasecmp( cinst->instr, "IDCODE" ) == 0) reg_name = "DIR";
+ else if (strcasecmp( cinst->instr, "INTEST" ) == 0) reg_name = "BSR";
+ else if (strcasecmp( cinst->instr, "PRELOAD" ) == 0) reg_name = "BSR";
+ else if (strcasecmp( cinst->instr, "SAMPLE" ) == 0) reg_name = "BSR";
+ else if (strcasecmp( cinst->instr, "USERCODE" ) == 0) reg_name = "USERCODE";
+ }
+
+ if (strcasecmp( cinst->instr, "SAMPLE" ) == 0)
+ instr_name = "SAMPLE/PRELOAD";
+ else
+ instr_name = cinst->instr;
+
+ if (reg_name)
+ {
+ char *cmd[] = {"instruction",
+ instr_name,
+ cinst->opcode,
+ reg_name,
+ NULL};
+
+ if (jc->proc_mode & BSDL_MODE_INSTR_EXEC)
+ cmd_run( jc->chain, cmd );
+ if (jc->proc_mode & BSDL_MODE_INSTR_PRINT)
+ print_cmd( cmd );
+ }
+
+ cinst = cinst->next;
+ }
+
+ return 1;
+}
+
+
+/*****************************************************************************
+ * int parse_vhdl_elem( bsdl_parser_priv_t *priv, vhdl_elem_t *elem )
+ *
+ * Runs the specified vhdl element through the BSDl parser.
+ *
+ * Parameters
+ * priv : private data container for parser related tasks
+ * elem : vhdl element to be parsed
+ *
+ * Returns
+ * BSDL_MODE_SYN_CHECK -> parsing successful
+ * 0 -> error occured
+ ****************************************************************************/
+static int parse_vhdl_elem( bsdl_parser_priv_t *priv, vhdl_elem_t *elem )
+{
+ char *buf;
+ size_t buf_len;
+ size_t name_string_len;
+ size_t elem_string_len;
+
+ name_string_len = elem->name ? strlen( elem->name ) : 0;
+ elem_string_len = elem->payload ? strlen( elem->payload ) : 0;
+
+ /* allocate enough memory for total buffer */
+ buf_len = name_string_len + 1 + elem_string_len + 1;
+ buf = (char *)malloc( buf_len );
+ if (!buf)
+ {
+ bsdl_msg( priv->jtag_ctrl->proc_mode,
+ BSDL_MSG_FATAL, _("Out of memory, %s line %i\n"), __FILE__, __LINE__ );
+ return -1;
+ }
+ buf[0] = '\0';
+
+ if (name_string_len > 0)
+ strncat( buf, elem->name, buf_len );
+ strncat( buf, " ", buf_len - name_string_len );
+
+ if (elem_string_len > 0)
+ strncat( buf, elem->payload, buf_len - name_string_len - 1 );
+
+ buf[buf_len - 1] = '\0';
+
+ priv->lineno = elem->line;
+
+ /* buffer is prepared for string parsing */
+ bsdl_flex_switch_buffer( priv->scanner, buf, elem->line );
+ bsdlparse( priv );
+
+ free( buf );
+
+ return bsdl_flex_get_compile_errors( priv->scanner ) == 0 ? BSDL_MODE_SYN_CHECK : 0;
+}
+
+
+/*****************************************************************************
+ * int build_commands( bsdl_parser_priv_t *priv )
+ *
+ * Calls the various functions that execute or print the information extracted
+ * from the BSDL/vhdl elements.
+ *
+ * Parameters
+ * priv : private data container for parser related tasks
+ *
+ * Returns
+ * bit field consisting of BSDL_MODE_* actions
+ * telling if INSTR_EXEC or INSTR_PRINT succeeded
+ ****************************************************************************/
+static int build_commands( bsdl_parser_priv_t *priv )
+{
+ jtag_ctrl_t *jc = priv->jtag_ctrl;
+ int result = 1;
+
+ result &= bsdl_emit_ports( jc );
+
+ result &= bsdl_set_instruction_length( jc );
+
+ result &= bsdl_process_idcode( jc );
+
+ result &= bsdl_process_usercode( jc );
+
+ result &= bsdl_set_bsr_length( jc );
+
+ result &= bsdl_process_register_access( jc );
+
+ result &= bsdl_process_cell_info( jc );
+
+ return result ? BSDL_MODE_INSTR_EXEC | BSDL_MODE_INSTR_PRINT : 0;
+}
+
+
+/*****************************************************************************
+ * int compare_idcode( jtag_ctrl_t *jc, const char *idcode )
+ *
+ * Compares idcode versus jtag_ctrl->idcode.
+ *
+ * Parameters
+ * jc : jtag_ctrl structure
+ * idcode : idcode string
+ *
+ * Returns
+ * 1 -> idcodes match
+ * 0 -> idcodes don't match
+ ****************************************************************************/
+static int compare_idcode( jtag_ctrl_t *jc, const char *idcode )
+{
+ int idcode_match = 0;
+
+ /* should we compare the idcodes? */
+ if (idcode)
+ {
+ if (strlen( idcode ) == strlen(jc->idcode))
+ {
+ int idx;
+
+ /* compare given idcode with idcode from BSDL file */
+ idcode_match = BSDL_MODE_IDCODE_CHECK;
+ for (idx = 0; idx < strlen( idcode ); idx++)
+ if (jc->idcode[idx] != 'X')
+ if (idcode[idx] != jc->idcode[idx])
+ idcode_match = 0;
+
+ if (idcode_match)
+ bsdl_msg( jc->proc_mode,
+ BSDL_MSG_NOTE, _("IDCODE matched\n") );
+ else
+ bsdl_msg( jc->proc_mode,
+ BSDL_MSG_NOTE, _("IDCODE mismatch\n") );
+ }
+ }
+
+ return idcode_match;
+}
+
+
+/*****************************************************************************
+ * int bsdl_process_elements( jtag_ctrl_t *jc, const char *idcode )
+ *
+ * If enabled, runs through the list of vhdl elements in jtag ctrl and parser
+ * them as BSDL statements.
+ * If enabled, compares idcode versus jc->idcode.
+ * If enabled, prints or executes the resulting jtag commands.
+ *
+ * Parameters
+ * jc : jtag_ctrl structure
+ * idcode : idcode string
+ *
+ * Returns
+ * < 0 : Error occured, parse/syntax problems or out of memory
+ * = 0 : No errors, idcode not checked or mismatching
+ * > 0 : No errors, idcode checked and matched
+ *
+ ****************************************************************************/
+int bsdl_process_elements( jtag_ctrl_t *jc, const char *idcode )
+{
+ bsdl_parser_priv_t *priv;
+ vhdl_elem_t *el = jc->vhdl_elem_first;
+ int result = BSDL_MODE_SYN_CHECK;
+
+ if ((priv = bsdl_parser_init( jc )) == NULL)
+ return -1;
+
+ if (jc->proc_mode & BSDL_MODE_SYN_CHECK)
+ {
+ while (el && (result & BSDL_MODE_SYN_CHECK))
+ {
+ result = parse_vhdl_elem( priv, el );
+
+ el = el->next;
+ }
+
+ if (!(result & BSDL_MODE_SYN_CHECK))
+ {
+ bsdl_msg( jc->proc_mode,
+ BSDL_MSG_ERR, _("BSDL stage reported errors, aborting.\n") );
+ bsdl_parser_deinit( priv );
+ return -1;
+ }
+ }
+
+ if (jc->idcode)
+ bsdl_msg( jc->proc_mode,
+ BSDL_MSG_NOTE, _("Got IDCODE: %s\n"), jc->idcode );
+
+ if (jc->proc_mode & BSDL_MODE_IDCODE_CHECK)
+ result |= compare_idcode( jc, idcode );
+
+ if (jc->proc_mode & (BSDL_MODE_INSTR_EXEC | BSDL_MODE_INSTR_PRINT))
+ /* IDCODE check positive if requested? */
+ if ( ((jc->proc_mode & BSDL_MODE_IDCODE_CHECK) &&
+ (result & BSDL_MODE_IDCODE_CHECK))
+ || (!(jc->proc_mode & BSDL_MODE_IDCODE_CHECK)) )
+ result |= build_commands( priv );
+
+ if ((result & jc->proc_mode) == (jc->proc_mode & BSDL_MODE_ACTION_ALL))
+ if (jc->proc_mode & BSDL_MODE_IDCODE_CHECK)
+ result = 1;
+ else
+ result = 0;
+ else
+ result = -1;
+
+ bsdl_parser_deinit( priv );
+
+ return result;
+}
+
+
+/*
+ Local Variables:
+ mode:C
+ c-default-style:gnu
+ indent-tabs-mode:nil
+ End:
+*/
--- /dev/null
+/*
+ * $Id$
+ *
+ * Reduced version of the global sysdep.h that is suitable for the
+ * BSDL subsystem components. config.h defines a number of macros
+ * that collide with BSDL tokens.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ */
+
+#ifndef BSDL_SYSDEP_H
+#define BSDL_SYSDEP_H
+
+
+#include "bsdl_config.h"
+
+#include "gettext.h"
+#define _(s) gettext(s)
+#define N_(s) gettext_noop(s)
+#define P_(s,p,n) ngettext(s,p,n)
+
+#ifdef S_SPLINT_S
+#undef gettext
+#define gettext(s) s
+#undef gettext_noop
+#define gettext_noop(s) s
+#undef ngettext
+#define ngettext(s,p,n) s
+#endif
+
+#endif /* BSDL_SYSDEP_H */
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2008, Arnim Laeuger
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Arnim Laeuger <arniml@users.sourceforge.net>, 2008.
+ *
+ */
+
+#ifndef BSDL_TYPES_H
+#define BSDL_TYPES_H
+
+#include <jtag.h>
+#include <bsdl_mode.h>
+
+/* private data of the flex scanner
+ handled internally in bsdl_flex.l as yyextra */
+struct scan_extra
+{
+ int proc_mode;
+ int Compile_Errors;
+ int Base;
+};
+typedef struct scan_extra scan_extra_t;
+
+/* list of instructions
+ the instruction name and its opcode (optional) is stored here */
+struct instr_elem
+{
+ struct instr_elem *next;
+ char *instr;
+ char *opcode;
+};
+typedef struct instr_elem instr_elem_t;
+
+/* register access information
+ * derived from the entries of the REGISTER_ACCESS attribute
+ * ainfo_elem describes a register and its accosiated instructions
+ * - register name
+ * - register length (optional)
+ * - list of associated instructions
+ */
+struct ainfo_elem
+{
+ struct ainfo_elem *next;
+ char *reg;
+ int reg_len;
+ instr_elem_t *instr_list;
+};
+typedef struct ainfo_elem ainfo_elem_t;
+
+/* structure cell_info collects bit/cell information from the
+ BOUNDARY_REGISTER attribute
+ each Cell_Entry fills in the structure and the contents is used for the
+ respective 'bit' command */
+struct cell_info
+{
+ struct cell_info *next;
+ /* basic cell spec entries */
+ int bit_num;
+ char *port_name;
+ int cell_function;
+ char *basic_safe_value;
+ /* the disable spec entries */
+ int ctrl_bit_num;
+ int disable_safe_value;
+};
+typedef struct cell_info cell_info_t;
+
+/* structure string_elem enables to build lists of strings */
+struct string_elem
+{
+ struct string_elem *next;
+ char *string;
+};
+typedef struct string_elem string_elem_t;
+
+/* structure port_desc contains all descriptive information for a port
+ definition:
+ - one or more names
+ - flag showing whether it's a vector (element) or a scalar
+ - low and high indice if it's a vector */
+struct port_desc
+{
+ string_elem_t *names_list;
+ struct port_desc *next;
+ int is_vector;
+ int low_idx;
+ int high_idx;
+};
+typedef struct port_desc port_desc_t;
+
+typedef enum
+{
+ VET_CONSTANT,
+ VET_ATTRIBUTE_STRING,
+ VET_ATTRIBUTE_DECIMAL,
+ VET_UNKNOWN
+} vhdl_elem_type_t;
+
+struct vhdl_elem
+{
+ struct vhdl_elem *next;
+ vhdl_elem_type_t type;
+ char *name;
+ char *payload;
+ int line;
+};
+typedef struct vhdl_elem vhdl_elem_t;
+
+typedef enum
+{
+ CONF_1990,
+ CONF_1993,
+ CONF_2001,
+ CONF_UNKNOWN
+} bsdl_conformance_t;
+
+/* structure jtag_ctrl collects all elements that are required to interface
+ with jtag internals */
+struct jtag_ctrl
+{
+ int proc_mode;
+ chain_t *chain;
+ part_t *part;
+ /* collected by VHDL parser */
+ port_desc_t *port_desc;
+ vhdl_elem_t *vhdl_elem_first;
+ vhdl_elem_t *vhdl_elem_last;
+ /* collected by BSDL parser */
+ char *idcode; /* IDCODE string */
+ char *usercode; /* USERCODE string */
+ int instr_len;
+ int bsr_len;
+ bsdl_conformance_t conformance;
+ instr_elem_t *instr_list;
+ ainfo_elem_t *ainfo_list;
+ cell_info_t *cell_info_first;
+ cell_info_t *cell_info_last;
+};
+typedef struct jtag_ctrl jtag_ctrl_t;
+
+/* private data of the VHDL bison parser
+ used to store variables the would end up as globals otherwise */
+struct vhdl_parser_priv
+{
+ char Package_File_Name[100];
+ int Reading_Package;
+ char *buffer;
+ size_t len_buffer;
+ void *scanner;
+ jtag_ctrl_t *jtag_ctrl;
+ port_desc_t tmp_port_desc;
+};
+typedef struct vhdl_parser_priv vhdl_parser_priv_t;
+
+/* private data of the BSDL bison parser
+ used to store variables the would end up as globals otherwise */
+struct bsdl_parser_priv
+{
+ void *scanner;
+ jtag_ctrl_t *jtag_ctrl;
+ int lineno;
+ ainfo_elem_t ainfo;
+ cell_info_t tmp_cell_info;
+ port_desc_t tmp_port_desc;
+};
+typedef struct bsdl_parser_priv bsdl_parser_priv_t;
+
+#endif /* BSDL_TYPES_H */
+
+
+/*
+ Local Variables:
+ mode:C
+ c-default-style:gnu
+ indent-tabs-mode:nil
+ End:
+*/
--- /dev/null
+/*
+ * $Id$
+ *
+ * Original Yacc code by Ken Parker, 1990
+ * Extensions and adaptions for UrJTAG by Arnim Laeuger, 2007
+ *
+ */
+
+/* ----------------------------------------------------------------------- */
+/* */
+/* Yacc code for BSDL */
+/* */
+/* ----------------------------------------------------------------------- */
+/* Date: 901003 */
+
+/*
+
+Email header accompanying the original Yacc code:
+ http://www.eda.org/vug_bbs/bsdl.parser
+
+-----------------------------------8<--------------------------------------
+
+Hello All,
+
+This is this first mailing of the BSDL* Version 0.0 parser specifications
+we are sending to people who request it from our publicized E-Mail address;
+
+ bsdl%hpmtlx@hplabs.HP.com
+
+You are free to redistribute this at will, but we feel that it would be
+better if respondents asked for it directly so that their addresses can
+be entered into our list for future mailings and updates.
+
+It would be helpful if you could confirm receipt of this transmission.
+We also would be very interested to hear about your experiences with this
+information and what you are planning to do with BSDL.
+
+Regards,
+
+Ken Parker
+Hewlett-Packard Company
+
+
+*Boundary-Scan Description Language - as documented in:
+
+"A Language for Describing Boundary-Scan Devices", K.P. Parker
+and S. Oresjo, Proceedings 1990 International Test Conference,
+Washington DC, pp 222-234
+
+
+- -----------------cut here---------------------------------------------------
+
+
+901004.0721 Hewlett-Packard Company
+901016.1049 Manufacturing Test Division
+ P.O. Box 301
+ Loveland, Colorado 80537
+ USA
+
+ October 1990
+Hello BSDL Parser Requestor,
+
+ This Electronic Mail reply contains the computer specifications for
+Hewlett-Packard's Version 0.0 BSDL parser. This section of the reply
+explains the contents of the rest of this file.
+
+This file is composed of seven (7) parts:
+
+ 1) How to use this file
+
+ 2) UNIX* Lex source (lexicographical tokenizing rules)
+
+ 3) UNIX* Yacc source (BNF-like syntax description)
+
+ 4) A sample main program to recognize BSDL.
+
+ 5) A BSDL description of the Texas Instruments 74bct8374 that is
+ recognized by the parser, for testing purposes.
+
+ 6) The VHDL package STD_1149_1_1990 needed by this parser.
+
+ 7) [added 901016] Porting experiences to other systems.
+
+
+RECOMMENDATION: Save a copy of this file in archival storage before
+ processing it via the instructions below. This will
+ allow you to recover from errors, and allow you to
+ compare subsequently released data for changes.
+
+DISCLAIMERS:
+
+1. The IEEE 1149.1 Working Group has not endorsed BSDL Version 0.0 and
+ therefore no person may represent it as an IEEE standard or imply that
+ a resulting IEEE standard will be identical to it.
+
+2. The IEEE 1149.1 Working Group recognizes that BSDL Version 0.0 is a
+ well-conceived initiative that is likely to excelerate the creation
+ of tools that support the 1149.1 standard. As such, changes and
+ enhancements will be carefully considered so as not to needlessly
+ disrupt these development efforts. The overriding goal is the
+ ultimate success of the 1149.1 standard.
+
+LEGAL NOTICES:
+
+ Hewlett-Packard Company makes no warranty of any kind with regard to
+ this information, including, but not limited to, the implied
+ waranties of merchantability and fitness for a particular purpose.
+
+ Hewlett-Packard Company shall not be liable for errors contained
+ herein or direct, indirect, special, incidental, or consequential
+ damages in connection with the furnishing, performance, or use of
+ this material.
+
+
+*UNIX is a trademark of AT&T in the USA and other countries.
+
+*/
+
+
+%pure-parser
+%parse-param {vhdl_parser_priv_t *priv_data}
+%defines
+%name-prefix="vhdl"
+
+%{
+#include <stdlib.h>
+#include <string.h>
+#include <stdio.h>
+#include <ctype.h>
+
+#include "bsdl_sysdep.h"
+
+#include "bsdl_types.h"
+#include "bsdl_msg.h"
+
+/* interface to flex */
+#include "vhdl_bison.h"
+#include "vhdl_parser.h"
+
+#ifdef DMALLOC
+#include "dmalloc.h"
+#endif
+
+#define YYLEX_PARAM priv_data->scanner
+int yylex (YYSTYPE *, void *);
+
+#if 1
+#define ERROR_LIMIT 15
+#define BUMP_ERROR if (vhdl_flex_postinc_compile_errors( priv_data->scanner ) > ERROR_LIMIT) \
+ {Give_Up_And_Quit( priv_data );YYABORT;}
+#else
+#define BUMP_ERROR {Give_Up_And_Quit( priv_data );YYABORT;}
+#endif
+
+static void Init_Text( vhdl_parser_priv_t * );
+static void Store_Text( vhdl_parser_priv_t *, char * );
+static void Print_Error( vhdl_parser_priv_t *, const char * );
+static void Give_Up_And_Quit( vhdl_parser_priv_t * );
+
+/* VHDL semantic action interface */
+static void vhdl_set_entity( vhdl_parser_priv_t *, char * );
+static void vhdl_port_add_name( vhdl_parser_priv_t *, char * );
+static void vhdl_port_add_bit( vhdl_parser_priv_t * );
+static void vhdl_port_add_range( vhdl_parser_priv_t *, int, int );
+static void vhdl_port_apply_port( vhdl_parser_priv_t * );
+
+//static void set_attr_bool( vhdl_parser_priv_t *, char *, int );
+static void set_attr_decimal( vhdl_parser_priv_t *, char *, int );
+static void set_attr_string( vhdl_parser_priv_t *, char *, char * );
+//static void set_attr_real( vhdl_parser_priv_t *, char *, char * );
+//static void set_attr_const( vhdl_parser_priv_t *, char *, char * );
+
+void yyerror( vhdl_parser_priv_t *, const char * );
+%}
+
+%union
+{
+ int integer;
+ char *str;
+}
+
+
+%token ENTITY PORT GENERIC USE ATTRIBUTE IS
+%token OF CONSTANT STRING END ALL
+%token PHYSICAL_PIN_MAP PIN_MAP_STRING TRUE FALSE SIGNAL
+%token LOW BOTH IN OUT INOUT
+%token BUFFER LINKAGE BIT BIT_VECTOR TO DOWNTO
+%token PACKAGE BODY TYPE SUBTYPE RECORD ARRAY
+%token POSITIVE RANGE CELL_INFO
+%token INPUT OUTPUT2 OUTPUT3 CONTROL CONTROLR INTERNAL
+%token CLOCK BIDIR BIDIR_IN BIDIR_OUT EXTEST SAMPLE
+%token INTEST RUNBIST PI PO UPD CAP X BIN_X_PATTERN
+%token ZERO ONE Z IDENTIFIER
+%token SINGLE_QUOTE QUOTED_STRING DECIMAL_NUMBER
+%token REAL_NUMBER CONCATENATE SEMICOLON COMMA
+%token LPAREN RPAREN COLON
+%token BOX COLON_EQUAL PERIOD ILLEGAL
+%token BSDL_EXTENSION
+%token OBSERVE_ONLY
+%token STD_1532_2001 STD_1532_2002
+
+%type <str> BIN_X_PATTERN
+%type <str> IDENTIFIER
+%type <str> QUOTED_STRING
+%type <integer> DECIMAL_NUMBER
+%type <integer> Boolean
+%type <str> REAL_NUMBER
+
+%start BSDL_Program
+
+%% /* End declarations, begin rules */
+
+BSDL_Program : Begin_BSDL BSDL_Body End_BSDL
+;
+Begin_BSDL : ENTITY IDENTIFIER IS
+ { vhdl_set_entity( priv_data, $2 ); }
+ | error
+ {
+ Print_Error( priv_data, _("Improper Entity declaration") );
+ Print_Error( priv_data, _("Check if source file is BSDL") );
+ BUMP_ERROR; YYABORT; /* Probably not a BSDL source file */
+ }
+;
+BSDL_Body : VHDL_Generic
+ VHDL_Port
+ VHDL_Use_Part
+ VHDL_Elements
+ | error
+ {
+ Print_Error( priv_data, _("Syntax Error") );
+ BUMP_ERROR; YYABORT;
+ }
+;
+End_BSDL : END IDENTIFIER SEMICOLON
+ { free( $2 ); }
+ | error
+ {
+ Print_Error( priv_data, _("Syntax Error") );
+ BUMP_ERROR; YYABORT;
+ }
+;
+VHDL_Generic : GENERIC LPAREN PHYSICAL_PIN_MAP COLON STRING COLON_EQUAL
+ Quoted_String RPAREN SEMICOLON
+;
+VHDL_Port : PORT LPAREN Port_Specifier_List RPAREN SEMICOLON
+ | error
+ {
+ Print_Error( priv_data, _("Improper Port declaration") );
+ BUMP_ERROR; YYABORT;
+ }
+;
+Port_Specifier_List : Port_Specifier
+ | Port_Specifier_List SEMICOLON Port_Specifier
+;
+Port_Specifier : Port_List COLON Function Scaler_Or_Vector
+ { vhdl_port_apply_port( priv_data ); }
+;
+Port_List : IDENTIFIER
+ { vhdl_port_add_name( priv_data, $1 ); }
+ | Port_List COMMA IDENTIFIER
+ { vhdl_port_add_name( priv_data, $3 ); }
+;
+Function : IN | OUT | INOUT | BUFFER | LINKAGE
+;
+Scaler_Or_Vector : BIT
+ { vhdl_port_add_bit( priv_data ); }
+ | BIT_VECTOR LPAREN Vector_Range RPAREN
+;
+Vector_Range : DECIMAL_NUMBER TO DECIMAL_NUMBER
+ { vhdl_port_add_range( priv_data, $1, $3 ); }
+ | DECIMAL_NUMBER DOWNTO DECIMAL_NUMBER
+ { vhdl_port_add_range( priv_data, $3, $1 ); }
+;
+VHDL_Use_Part : ISC_Use
+ | Standard_Use
+ | Standard_Use ISC_Use
+ | Standard_Use VHDL_Use_List
+ | error
+ {
+ Print_Error( priv_data, _("Error in Package declaration(s)") );
+ BUMP_ERROR; YYABORT;
+ }
+;
+Standard_Use : USE IDENTIFIER
+ {/* Parse Standard 1149.1 Package */
+ strcpy( priv_data->Package_File_Name, $2 );
+ free( $2 );
+ }
+ PERIOD ALL SEMICOLON
+ {
+ priv_data->Reading_Package = 1;
+ vhdl_flex_switch_file( priv_data->scanner,
+ priv_data->Package_File_Name );
+ }
+ Standard_Package
+ {
+ priv_data->Reading_Package = 0;
+ }
+;
+Standard_Package : PACKAGE IDENTIFIER IS Standard_Decls Defered_Constants
+ Standard_Decls END IDENTIFIER SEMICOLON Package_Body
+ { free( $2 ); free( $8 ); }
+ | error
+ {
+ Print_Error( priv_data, _("Error in Standard Package") );
+ BUMP_ERROR; YYABORT;
+ }
+;
+Standard_Decls : Standard_Decl
+ | Standard_Decls Standard_Decl
+;
+Standard_Decl : ATTRIBUTE IDENTIFIER COLON Attribute_Type SEMICOLON
+ { free( $2 ); }
+ | TYPE IDENTIFIER IS Type_Body SEMICOLON
+ { free( $2 ); }
+ | TYPE CELL_INFO IS ARRAY LPAREN POSITIVE RANGE BOX RPAREN
+ OF IDENTIFIER SEMICOLON
+ { free( $11 ); }
+ | SUBTYPE PIN_MAP_STRING IS STRING SEMICOLON
+ | SUBTYPE BSDL_EXTENSION IS STRING SEMICOLON
+ | error
+ {
+ Print_Error( priv_data, _("Error in Standard Declarations") );
+ BUMP_ERROR; YYABORT;
+ }
+;
+Attribute_Type : IDENTIFIER
+ { free( $1 ); }
+ | STRING
+ | DECIMAL_NUMBER
+ | BSDL_EXTENSION
+ | error
+ {
+ Print_Error( priv_data, _("Error in Attribute type identification") );
+ BUMP_ERROR; YYABORT;
+ }
+;
+Type_Body : LPAREN ID_Bits RPAREN
+ | LPAREN ID_List RPAREN
+ | LPAREN LOW COMMA BOTH RPAREN
+ | ARRAY LPAREN DECIMAL_NUMBER TO DECIMAL_NUMBER RPAREN
+ OF IDENTIFIER
+ { free( $8 ); }
+ | ARRAY LPAREN DECIMAL_NUMBER DOWNTO DECIMAL_NUMBER RPAREN
+ OF IDENTIFIER
+ { free( $8 ); }
+ | RECORD Record_Body END RECORD
+ | error
+ {
+ Print_Error( priv_data, _("Error in Type definition") );
+ BUMP_ERROR; YYABORT;
+ }
+;
+ID_Bits : ID_Bit
+ | ID_Bits COMMA ID_Bit
+;
+ID_List : IDENTIFIER
+ { free( $1 ); }
+ | ID_List COMMA IDENTIFIER
+ { free( $3 ); }
+;
+ID_Bit : SINGLE_QUOTE BIN_X_PATTERN SINGLE_QUOTE
+ { free( $2 ); }
+ | error
+ {
+ Print_Error( priv_data, _("Error in Bit definition") );
+ BUMP_ERROR; YYABORT;
+ }
+;
+Record_Body : Record_Element
+ | Record_Body Record_Element
+;
+Record_Element : IDENTIFIER COLON IDENTIFIER SEMICOLON
+ { free( $1 ); free( $3 ); }
+ | error
+ {
+ Print_Error( priv_data, _("Error in Record Definition") );
+ BUMP_ERROR; YYABORT;
+ }
+;
+Defered_Constants : Defered_Constant
+ | Defered_Constants Defered_Constant
+;
+Defered_Constant : CONSTANT Constant_Body
+;
+Constant_Body : IDENTIFIER COLON CELL_INFO SEMICOLON
+ { free( $1 ); }
+ | error
+ {
+ Print_Error( priv_data, _("Error in defered constant") );
+ BUMP_ERROR; YYABORT;
+ }
+;
+VHDL_Use_List : VHDL_Use
+ | VHDL_Use_List VHDL_Use
+;
+Package_Body : PACKAGE BODY IDENTIFIER IS Constant_List END IDENTIFIER
+ { free( $3 ); free( $7 ); }
+ SEMICOLON
+ | error
+ {
+ Print_Error( priv_data, _("Error in Package Body definition") );
+ BUMP_ERROR; YYABORT;
+ }
+;
+Constant_List : Cell_Constant
+ | Constant_List Cell_Constant
+;
+Cell_Constant : CONSTANT IDENTIFIER COLON CELL_INFO COLON_EQUAL
+ LPAREN Triples_List RPAREN SEMICOLON
+ { free( $2 ); }
+ | error
+ {
+ Print_Error( priv_data, _("Error in Cell Constant definition") );
+ BUMP_ERROR; YYABORT;
+ }
+;
+Triples_List : Triple
+ | Triples_List COMMA Triple
+;
+Triple : LPAREN Triple_Function COMMA Triple_Inst COMMA CAP_Data
+ RPAREN
+ | error
+ {
+ Print_Error( priv_data, _("Error in Cell Data Record") );
+ BUMP_ERROR; YYABORT;
+ }
+;
+Triple_Function : INPUT | OUTPUT2 | OUTPUT3 | INTERNAL | CONTROL
+ | CONTROLR | CLOCK | BIDIR_IN | BIDIR_OUT
+ | OBSERVE_ONLY
+ | error
+ {
+ Print_Error( priv_data, _("Error in Cell_Type Function field") );
+ BUMP_ERROR; YYABORT;
+ }
+;
+Triple_Inst : EXTEST | SAMPLE | INTEST | RUNBIST
+ | error
+ {
+ Print_Error( priv_data, _("Error in BScan_Inst Instruction field") );
+ BUMP_ERROR; YYABORT;
+ }
+;
+CAP_Data : PI | PO | UPD | CAP | X | ZERO | ONE
+ | error
+ {
+ Print_Error( priv_data, _("Error in Constant CAP data source field") );
+ BUMP_ERROR; YYABORT;
+ }
+;
+VHDL_Use : USE IDENTIFIER
+ {/* Parse Standard 1149.1 Package */
+ strcpy(priv_data->Package_File_Name, $2);
+ free($2);
+ }
+ PERIOD ALL SEMICOLON
+ {
+ priv_data->Reading_Package = 1;
+ vhdl_flex_switch_file(priv_data->scanner,
+ priv_data->Package_File_Name);
+ }
+ User_Package
+ {
+ priv_data->Reading_Package = 0;
+ }
+;
+User_Package : PACKAGE IDENTIFIER
+ IS Defered_Constants END IDENTIFIER SEMICOLON Package_Body
+ { free($2); free($6); }
+ | error
+ {Print_Error(priv_data, _("Error in User-Defined Package declarations"));
+ BUMP_ERROR; YYABORT; }
+;
+VHDL_Elements : VHDL_Element
+ | VHDL_Elements VHDL_Element
+ | error
+ {
+ Print_Error( priv_data, _("Unknown VHDL statement") );
+ BUMP_ERROR; YYABORT;
+ }
+;
+VHDL_Element : VHDL_Constant
+ | VHDL_Attribute
+;
+VHDL_Constant : CONSTANT VHDL_Constant_Part
+;
+VHDL_Constant_Part : IDENTIFIER COLON PIN_MAP_STRING COLON_EQUAL
+ Quoted_String SEMICOLON
+ // { set_attr_const( priv_data, $1, strdup( "PIN_MAP_STRING" ) ); }
+ { free( $1 ); }
+;
+VHDL_Attribute : ATTRIBUTE VHDL_Attribute_Types
+;
+VHDL_Attribute_Types : VHDL_Attr_Boolean
+ | VHDL_Attr_Decimal
+ | VHDL_Attr_Real
+ | VHDL_Attr_String
+ | VHDL_Attr_PhysicalPinMap
+ | error
+ {
+ Print_Error( priv_data, _("Error in Attribute specification") );
+ BUMP_ERROR; YYABORT;
+ }
+;
+VHDL_Attr_Boolean : IDENTIFIER OF IDENTIFIER COLON SIGNAL IS Boolean SEMICOLON
+ {
+ //set_attr_bool( priv_data, $1, $7 );
+ //free( $3 );
+ /* skip boolean attributes for the time being */
+ free( $1 ); free( $3 );
+ }
+;
+Boolean : TRUE
+ { $$ = 1; }
+ | FALSE
+ { $$ = 0; }
+;
+VHDL_Attr_Decimal : IDENTIFIER OF IDENTIFIER COLON ENTITY IS DECIMAL_NUMBER SEMICOLON
+ {
+ set_attr_decimal( priv_data, $1, $7 );
+ free( $3 );
+ }
+;
+VHDL_Attr_Real : IDENTIFIER OF IDENTIFIER COLON SIGNAL IS LPAREN REAL_NUMBER COMMA Stop RPAREN SEMICOLON
+ {
+ //set_attr_real( priv_data, $1, $8 );
+ //free( $3 );
+ /* skip real attributes for the time being */
+ free( $1 ); free( $3 ); free( $8 );
+ }
+;
+Stop : LOW | BOTH
+;
+VHDL_Attr_String : IDENTIFIER OF IDENTIFIER COLON ENTITY IS Quoted_String SEMICOLON
+ {
+ set_attr_string( priv_data, $1, strdup( priv_data->buffer ) );
+ free( $3 );
+ }
+;
+VHDL_Attr_PhysicalPinMap : IDENTIFIER OF IDENTIFIER COLON ENTITY IS PHYSICAL_PIN_MAP SEMICOLON
+ { free( $1 ); free( $3 ); }
+;
+Quoted_String : QUOTED_STRING
+ {
+ Init_Text( priv_data );
+ Store_Text( priv_data, $1 );
+ free( $1 );
+ }
+ | Quoted_String CONCATENATE QUOTED_STRING
+ {
+ Store_Text( priv_data, $3 );
+ free( $3 );
+ }
+;
+ISC_Use : USE ISC_Packages PERIOD ALL SEMICOLON
+ {
+ priv_data->Reading_Package = 1;
+ vhdl_flex_switch_file( priv_data->scanner,
+ priv_data->Package_File_Name );
+ }
+ ISC_Package
+ {
+ priv_data->Reading_Package = 0;
+ }
+;
+ISC_Packages : STD_1532_2001
+ {
+ strcpy( priv_data->Package_File_Name, "STD_1532_2001" );
+ }
+ | STD_1532_2002
+ {
+ strcpy( priv_data->Package_File_Name, "STD_1532_2002" );
+ }
+;
+ISC_Package : ISC_Package_Header ISC_Package_Body
+;
+ISC_Package_Header : PACKAGE ISC_Packages IS
+ Standard_Use
+ {
+ priv_data->Reading_Package = 1;
+ }
+ Standard_Decls
+ END ISC_Packages SEMICOLON
+;
+ISC_Package_Body : PACKAGE BODY ISC_Packages IS
+ END ISC_Packages SEMICOLON
+;
+%% /* End rules, begin programs */
+/*****************************************************************************
+ * void Init_Text( vhdl_parser_priv_t *priv )
+ *
+ * Allocates the internal test buffer if not already existing.
+ *
+ * Parameters
+ * priv : private data container for parser related tasks
+ *
+ * Returns
+ * void
+ ****************************************************************************/
+static void Init_Text( vhdl_parser_priv_t *priv )
+{
+ if (priv->len_buffer == 0)
+ {
+ priv->buffer = (char *)malloc( 160 );
+ priv->len_buffer = 160;
+ }
+ priv->buffer[0] = '\0';
+}
+
+
+/*****************************************************************************
+ * void Store_Text( vhdl_parser_priv_t *priv, char *Source )
+ *
+ * Appends the given String to the internal text buffer. The buffer
+ * is extended if the string does not fit into the current size.
+ *
+ * Parameters
+ * priv : private data container for parser related tasks
+ * String : pointer to string that is to be added to buffer
+ *
+ * Returns
+ * void
+ ****************************************************************************/
+static void Store_Text( vhdl_parser_priv_t *priv, char *Source )
+{ /* Save characters from VHDL string in local string buffer. */
+ size_t req_len;
+ char *SourceEnd;
+
+ SourceEnd = ++Source; /* skip leading '"' */
+ while (*SourceEnd && (*SourceEnd != '"') && (*SourceEnd != '\n'))
+ SourceEnd++;
+ /* terminate Source string with NUL character */
+ *SourceEnd = '\0';
+
+ req_len = strlen( priv->buffer ) + strlen( Source ) + 1;
+ if (req_len > priv->len_buffer)
+ {
+ priv->buffer = (char *)realloc( priv->buffer, req_len );
+ priv->len_buffer = req_len;
+ }
+ strcat( priv->buffer, Source );
+}
+/*----------------------------------------------------------------------*/
+static void Print_Error( vhdl_parser_priv_t *priv_data, const char *Errmess )
+{
+ jtag_ctrl_t *jc = priv_data->jtag_ctrl;
+
+ if (priv_data->Reading_Package)
+ bsdl_msg( jc->proc_mode,
+ BSDL_MSG_ERR, _("In Package %s, Line %d, %s.\n"),
+ priv_data->Package_File_Name,
+ vhdl_flex_get_lineno( priv_data->scanner ),
+ Errmess );
+ else
+ bsdl_msg( jc->proc_mode,
+ BSDL_MSG_ERR, _("Line %d, %s.\n"),
+ vhdl_flex_get_lineno( priv_data->scanner ),
+ Errmess );
+}
+/*----------------------------------------------------------------------*/
+static void Give_Up_And_Quit( vhdl_parser_priv_t *priv_data )
+{
+ Print_Error( priv_data, _("Too many errors") );
+}
+/*----------------------------------------------------------------------*/
+void yyerror( vhdl_parser_priv_t *priv_data, const char *error_string )
+{
+}
+
+
+/*****************************************************************************
+ * void vhdl_sem_init( vhdl_parser_priv_t *priv )
+ *
+ * Initializes storage elements in the private parser and jtag control
+ * structures that are used for semantic purposes.
+ *
+ * Parameters
+ * priv : private data container for parser related tasks
+ *
+ * Returns
+ * void
+ ****************************************************************************/
+static void vhdl_sem_init( vhdl_parser_priv_t *priv )
+{
+ priv->tmp_port_desc.names_list = NULL;
+ priv->tmp_port_desc.next = NULL;
+
+ priv->jtag_ctrl->port_desc = NULL;
+
+ priv->jtag_ctrl->vhdl_elem_first = NULL;
+ priv->jtag_ctrl->vhdl_elem_last = NULL;
+}
+
+
+/*****************************************************************************
+ * void free_string_list( string_elem_t *sl )
+ *
+ * Deallocates the given list of string_elem items.
+ *
+ * Parameters
+ * sl : first string_elem to deallocate
+ *
+ * Returns
+ * void
+ ****************************************************************************/
+static void free_string_list( string_elem_t *sl )
+{
+ if (sl)
+ {
+ if (sl->string)
+ free( sl->string );
+ free_string_list( sl->next );
+ free( sl );
+ }
+}
+
+
+/*****************************************************************************
+ * void free_port_list( port_desc_t *pl, int free_me )
+ *
+ * Deallocates the given list of port_desc.
+ *
+ * Parameters
+ * pl : first port_desc to deallocate
+ * free_me : set to 1 to free memory for ai as well
+ *
+ * Returns
+ * void
+ ****************************************************************************/
+static void free_port_list( port_desc_t *pl, int free_me )
+{
+ if (pl)
+ {
+ free_string_list( pl->names_list );
+ free_port_list( pl->next, 1 );
+
+ if (free_me)
+ free( pl );
+ }
+}
+
+
+/*****************************************************************************
+ * void free_elem_list( vhdl_elem_t *el )
+ *
+ * Deallocates the given list of vhdl_elem items.
+ *
+ * Parameters
+ * el : first vhdl_elem to deallocate
+ *
+ * Returns
+ * void
+ ****************************************************************************/
+static void free_elem_list( vhdl_elem_t *el )
+{
+ if (el)
+ {
+ free_elem_list( el->next );
+
+ if (el->name)
+ free( el->name );
+
+ if (el->payload)
+ free( el->payload );
+ free( el );
+ }
+}
+
+
+/*****************************************************************************
+ * void vhdl_sem_deinit( vhdl_parser_priv_t *priv )
+ *
+ * Frees and deinitializes storage elements in the private parser and
+ * jtag control structures that were filled by semantic rules.
+ *
+ * Parameters
+ * priv : private data container for parser related tasks
+ *
+ * Returns
+ * void
+ ****************************************************************************/
+static void vhdl_sem_deinit( vhdl_parser_priv_t *priv_data )
+{
+ port_desc_t *pd = priv_data->jtag_ctrl->port_desc;
+ vhdl_elem_t *el = priv_data->jtag_ctrl->vhdl_elem_first;
+
+ /* free port_desc list */
+ free_port_list( pd, 1 );
+ free_port_list( &(priv_data->tmp_port_desc), 0 );
+
+ /* free VHDL element list */
+ free_elem_list( el );
+
+ priv_data->jtag_ctrl = NULL;
+}
+
+
+/*****************************************************************************
+ * vhdl_parser_priv_t *vhdl_parser_init( FILE *f, jtag_ctrl_t *jtag_ctrl )
+ *
+ * Initializes storage elements in the private parser structure that are
+ * used for parser maintenance purposes.
+ * Subsequently calls initializer functions for the scanner and the semantic
+ * parts.
+ *
+ * Parameters
+ * f : descriptor of file for scanning
+ * jtag_ctrl : pointer to jtag control structure
+ *
+ * Returns
+ * pointer to private parser structure
+ ****************************************************************************/
+vhdl_parser_priv_t *vhdl_parser_init( FILE *f, jtag_ctrl_t *jtag_ctrl )
+{
+ vhdl_parser_priv_t *new_priv;
+
+ if (!(new_priv = (vhdl_parser_priv_t *)malloc( sizeof( vhdl_parser_priv_t ) )))
+ {
+ bsdl_msg( jtag_ctrl->proc_mode,
+ BSDL_MSG_ERR, _("Out of memory, %s line %i\n"), __FILE__, __LINE__ );
+ return NULL;
+ }
+
+ new_priv->jtag_ctrl = jtag_ctrl;
+
+ new_priv->Reading_Package = 0;
+ new_priv->buffer = NULL;
+ new_priv->len_buffer = 0;
+
+ if (!(new_priv->scanner = vhdl_flex_init( f, jtag_ctrl->proc_mode )))
+ {
+ free( new_priv );
+ new_priv = NULL;
+ }
+
+ vhdl_sem_init( new_priv );
+
+ return new_priv;
+}
+
+
+/*****************************************************************************
+ * void vhdl_parser_deinit( vhdl_parser_priv_t *priv )
+ *
+ * Frees storage elements in the private parser structure that are
+ * used for parser maintenance purposes.
+ * Subsequently calls deinitializer functions for the scanner and the semantic
+ * parts.
+ *
+ * Parameters
+ * priv : private data container for parser related tasks
+ *
+ * Returns
+ * void
+ ****************************************************************************/
+void vhdl_parser_deinit( vhdl_parser_priv_t *priv_data )
+{
+ if (priv_data->buffer)
+ {
+ free( priv_data->buffer );
+ priv_data->buffer = NULL;
+ }
+
+ vhdl_sem_deinit( priv_data );
+ vhdl_flex_deinit( priv_data->scanner );
+ free( priv_data );
+}
+
+/*****************************************************************************
+ * void vhdl_set_entity( vhdl_parser_priv_t *priv, char *entityname )
+ *
+ * Applies the entity name from BSDL as the part name.
+ *
+ * Parameters
+ * priv : private data container for parser related tasks
+ * entityname : entity name string, memory gets free'd
+ *
+ * Returns
+ * void
+ ****************************************************************************/
+static void vhdl_set_entity( vhdl_parser_priv_t *priv, char *entityname )
+{
+ if (priv->jtag_ctrl->proc_mode & BSDL_MODE_INSTR_EXEC)
+ {
+ strncpy( priv->jtag_ctrl->part->part, entityname, MAXLEN_PART );
+ priv->jtag_ctrl->part->part[MAXLEN_PART] = '\0';
+ }
+
+ free( entityname );
+}
+
+/*****************************************************************************
+ * void vhdl_port_add_name( vhdl_parser_priv_t *priv, char *name )
+ * Port name management function
+ *
+ * Sets the name field of the temporary storage area for port description
+ * (port_desc) to the parameter name.
+ *
+ * Parameters
+ * priv : private data container for parser related tasks
+ * name : base name of the port, memory get's free'd lateron
+ *
+ * Returns
+ * void
+ ****************************************************************************/
+static void vhdl_port_add_name( vhdl_parser_priv_t *priv, char *name )
+{
+ port_desc_t *pd = &(priv->tmp_port_desc);
+ string_elem_t *new_string;
+
+ new_string = (string_elem_t *)malloc( sizeof( string_elem_t ) );
+ if (new_string)
+ {
+ new_string->next = pd->names_list;
+ new_string->string = name;
+
+ pd->names_list = new_string;
+ }
+ else
+ bsdl_msg( priv->jtag_ctrl->proc_mode,
+ BSDL_MSG_FATAL, _("Out of memory, %s line %i\n"), __FILE__, __LINE__ );
+}
+
+
+/*****************************************************************************
+ * void vhdl_port_add_bit( vhdl_parser_priv_t *priv )
+ * Port name management function
+ *
+ * Sets the vector and index fields of the temporary storage area for port
+ * description (port_desc) to non-vector information. The low and high indice
+ * are set to equal numbers (exact value is irrelevant).
+ *
+ * Parameters
+ * priv : private data container for parser related tasks
+ *
+ * Returns
+ * void
+ ****************************************************************************/
+static void vhdl_port_add_bit( vhdl_parser_priv_t *priv )
+{
+ port_desc_t *pd = &(priv->tmp_port_desc);
+
+ pd->is_vector = 0;
+ pd->low_idx = 0;
+ pd->high_idx = 0;
+}
+
+
+/*****************************************************************************
+ * void vhdl_port_add_range( vhdl_parser_priv_t *priv, int low, int high )
+ * Port name management function
+ *
+ * Sets the vector and index fields of the temporary storage area for port
+ * description (port_desc) to the specified vector information.
+ *
+ * Parameters
+ * priv : private data container for parser related tasks
+ * low : low index of vector
+ * high : high index of vector
+ *
+ * Returns
+ * void
+ ****************************************************************************/
+static void vhdl_port_add_range( vhdl_parser_priv_t *priv, int low, int high )
+{
+ port_desc_t *pd = &(priv->tmp_port_desc);
+
+ pd->is_vector = 1;
+ pd->low_idx = low;
+ pd->high_idx = high;
+}
+
+/*****************************************************************************
+ * void vhdl_port_apply_port( vhdl_parser_priv_t *priv )
+ * Port name management function
+ *
+ * Applies the current temporary port description to the final list
+ * of port descriptions.
+ *
+ * Parameters
+ * priv : private data container for parser related tasks
+ *
+ * Returns
+ * void
+ ****************************************************************************/
+static void vhdl_port_apply_port( vhdl_parser_priv_t *priv )
+{
+ port_desc_t *tmp_pd = &(priv->tmp_port_desc);
+ port_desc_t *pd = (port_desc_t *)malloc( sizeof( port_desc_t ) );
+
+ if (pd)
+ {
+ /* insert at top of list */
+ pd->next = priv->jtag_ctrl->port_desc;
+ priv->jtag_ctrl->port_desc = pd;
+
+ /* copy information from temporary port descriptor */
+ pd->names_list = tmp_pd->names_list;
+ pd->is_vector = tmp_pd->is_vector;
+ pd->low_idx = tmp_pd->low_idx;
+ pd->high_idx = tmp_pd->high_idx;
+
+ /* and reset temporary port descriptor */
+ tmp_pd->names_list = NULL;
+ tmp_pd->next = NULL;
+ }
+ else
+ bsdl_msg( priv->jtag_ctrl->proc_mode,
+ BSDL_MSG_FATAL, _("Out of memory, %s line %i\n"), __FILE__, __LINE__ );
+}
+
+static void add_elem( vhdl_parser_priv_t *priv, vhdl_elem_t *el )
+{
+ jtag_ctrl_t *jc = priv->jtag_ctrl;
+
+ el->next = NULL;
+ if (jc->vhdl_elem_last)
+ jc->vhdl_elem_last->next = el;
+ jc->vhdl_elem_last = el;
+
+ if (!jc->vhdl_elem_first)
+ jc->vhdl_elem_first = el;
+
+ el->line = vhdl_flex_get_lineno( priv->scanner );
+}
+
+#if 0
+static void set_attr_bool( vhdl_parser_priv_t *priv, char *name, int value )
+{
+ vhdl_elem_t *el = (vhdl_elem_t *)malloc( sizeof( vhdl_elem_t ) );
+
+ if (el)
+ {
+ el->type = VET_ATTRIBUTE_BOOL;
+ el->name = name;
+ el->payload.bool = value;
+
+ add_elem( priv, el );
+ }
+ else
+ bsdl_msg( BSDL_MSG_FATAL, _("Out of memory, %s line %i\n"), __FILE__, __LINE__ );
+}
+#endif
+
+static void set_attr_decimal( vhdl_parser_priv_t *priv, char *name, int value )
+{
+ vhdl_elem_t *el = (vhdl_elem_t *)malloc( sizeof( vhdl_elem_t ) );
+ char *string = (char *)malloc( 10 );
+
+ if (el && string)
+ {
+ el->type = VET_ATTRIBUTE_DECIMAL;
+ el->name = name;
+ snprintf( string, 10, "%d", value );
+ el->payload = string;
+
+ add_elem( priv, el );
+ }
+ else
+ bsdl_msg( priv->jtag_ctrl->proc_mode,
+ BSDL_MSG_FATAL, _("Out of memory, %s line %i\n"), __FILE__, __LINE__ );
+}
+
+static void set_attr_string( vhdl_parser_priv_t *priv, char *name, char *string )
+{
+ vhdl_elem_t *el = (vhdl_elem_t *)malloc( sizeof( vhdl_elem_t ) );
+
+ /* skip certain attributes */
+ if ( (strcasecmp( name, "DESIGN_WARNING" ) == 0)
+ || (strcasecmp( name, "BOUNDARY_CELLS" ) == 0)
+ || (strcasecmp( name, "INSTRUCTION_SEQUENCE" ) == 0)
+ || (strcasecmp( name, "INSTRUCTION_USAGE" ) == 0)
+ || (strcasecmp( name, "ISC_DESIGN_WARNING" ) == 0))
+ {
+ free( name );
+ free( string );
+ free( el );
+ return;
+ }
+
+ if (el)
+ {
+ el->type = VET_ATTRIBUTE_STRING;
+ el->name = name;
+ el->payload = string;
+
+ add_elem(priv, el);
+ }
+ else
+ bsdl_msg( priv->jtag_ctrl->proc_mode,
+ BSDL_MSG_FATAL, _("Out of memory, %s line %i\n"), __FILE__, __LINE__ );
+}
+
+#if 0
+static void set_attr_real( vhdl_parser_priv_t *priv, char *name, char *string )
+{
+ vhdl_elem_t *el = (vhdl_elem_t *)malloc( sizeof( vhdl_elem_t ) );
+
+ if (el)
+ {
+ el->type = VET_ATTRIBUTE_REAL;
+ el->name = name;
+ el->payload.real = string;
+
+ add_elem( priv, el );
+ }
+ else
+ bsdl_msg( BSDL_MSG_FATAL, _("Out of memory, %s line %i\n"), __FILE__, __LINE__ );
+}
+#endif
+
+#if 0
+static void set_attr_const( vhdl_parser_priv_t *priv, char *name, char *string )
+{
+ vhdl_elem_t *el = (vhdl_elem_t *)malloc( sizeof( vhdl_elem_t ) );
+
+ if (el)
+ {
+ el->type = VET_CONSTANT;
+ el->name = name;
+ el->payload = string;
+
+ add_elem( priv, el );
+ }
+ else
+ bsdl_msg( BSDL_MSG_FATAL, _("Out of memory, %s line %i\n"), __FILE__, __LINE__ );
+}
+#endif
+
+
+/*
+ Local Variables:
+ mode:C
+ c-default-style:gnu
+ indent-tabs-mode:nil
+ End:
+*/
--- /dev/null
+/*
+ * $Id$
+ *
+ * Original Lex source by Ken Parker, 1990
+ * Extensions and adaptions for UrJTAG by Arnim Laeuger, 2007
+ *
+ */
+
+/*----------------------------------------------------------
+ *
+ * Lex source for BSDL
+ *
+ *----------------------------------------------------------*/
+/* Date: 901003 */
+
+/*
+
+Email header accompanying the original Yacc code:
+ http://www.eda.org/vug_bbs/bsdl.parser
+
+-----------------------------------8<--------------------------------------
+
+Hello All,
+
+This is this first mailing of the BSDL* Version 0.0 parser specifications
+we are sending to people who request it from our publicized E-Mail address;
+
+ bsdl%hpmtlx@hplabs.HP.com
+
+You are free to redistribute this at will, but we feel that it would be
+better if respondents asked for it directly so that their addresses can
+be entered into our list for future mailings and updates.
+
+It would be helpful if you could confirm receipt of this transmission.
+We also would be very interested to hear about your experiences with this
+information and what you are planning to do with BSDL.
+
+Regards,
+
+Ken Parker
+Hewlett-Packard Company
+
+
+*Boundary-Scan Description Language - as documented in:
+
+"A Language for Describing Boundary-Scan Devices", K.P. Parker
+and S. Oresjo, Proceedings 1990 International Test Conference,
+Washington DC, pp 222-234
+
+
+- -----------------cut here---------------------------------------------------
+
+
+901004.0721 Hewlett-Packard Company
+901016.1049 Manufacturing Test Division
+ P.O. Box 301
+ Loveland, Colorado 80537
+ USA
+
+ October 1990
+Hello BSDL Parser Requestor,
+
+ This Electronic Mail reply contains the computer specifications for
+Hewlett-Packard's Version 0.0 BSDL parser. This section of the reply
+explains the contents of the rest of this file.
+
+This file is composed of seven (7) parts:
+
+ 1) How to use this file
+
+ 2) UNIX* Lex source (lexicographical tokenizing rules)
+
+ 3) UNIX* Yacc source (BNF-like syntax description)
+
+ 4) A sample main program to recognize BSDL.
+
+ 5) A BSDL description of the Texas Instruments 74bct8374 that is
+ recognized by the parser, for testing purposes.
+
+ 6) The VHDL package STD_1149_1_1990 needed by this parser.
+
+ 7) [added 901016] Porting experiences to other systems.
+
+
+RECOMMENDATION: Save a copy of this file in archival storage before
+ processing it via the instructions below. This will
+ allow you to recover from errors, and allow you to
+ compare subsequently released data for changes.
+
+DISCLAIMERS:
+
+1. The IEEE 1149.1 Working Group has not endorsed BSDL Version 0.0 and
+ therefore no person may represent it as an IEEE standard or imply that
+ a resulting IEEE standard will be identical to it.
+
+2. The IEEE 1149.1 Working Group recognizes that BSDL Version 0.0 is a
+ well-conceived initiative that is likely to excelerate the creation
+ of tools that support the 1149.1 standard. As such, changes and
+ enhancements will be carefully considered so as not to needlessly
+ disrupt these development efforts. The overriding goal is the
+ ultimate success of the 1149.1 standard.
+
+LEGAL NOTICES:
+
+ Hewlett-Packard Company makes no warranty of any kind with regard to
+ this information, including, but not limited to, the implied
+ waranties of merchantability and fitness for a particular purpose.
+
+ Hewlett-Packard Company shall not be liable for errors contained
+ herein or direct, indirect, special, incidental, or consequential
+ damages in connection with the furnishing, performance, or use of
+ this material.
+
+
+*UNIX is a trademark of AT&T in the USA and other countries.
+
+*/
+
+%option bison-bridge
+%option reentrant
+%option prefix="vhdl"
+%option outfile="lex.yy.c"
+
+%{
+/* Begin lex input specifications */
+
+#include <stdlib.h>
+#include <ctype.h>
+
+#include "bsdl_sysdep.h"
+
+#include "bsdl_msg.h"
+
+#include "vhdl_bison.h"
+#include "vhdl_parser.h"
+
+#ifdef DMALLOC
+#include "dmalloc.h"
+#endif
+
+#define YY_EXTRA_TYPE scan_extra_t *
+
+static char *new_string( scan_extra_t *, const char * );
+
+#define BINARY 0
+#define DECIMAL 1
+#define BIN_X 2
+
+%}
+%a 2800
+%e 1200
+%p 4700
+%n 520
+%k 140
+%o 3000
+%START RES BOU REG PAC
+White [ \t\b\r]*
+VHDL_Comment \-\-[^\n]*
+Bin_X_Pattern [0-1X]+
+Digit [0-9]
+Exponent [E][+-]?{Digit}+
+Real_Number {Digit}+[\.]{Digit}+{Exponent}
+Decimal_Number {Digit}+
+Identifier [A-Z][A-Z0-9_]*
+Quoted_String \"[^\"\n]*\"
+Concatenate &
+Single_Quote [\']
+Semicolon ;
+Eol [\n]
+Comma [,]
+Lparen [\(]
+Rparen [\)]
+Colon_Equal \:\=
+Colon [\:]
+Period [\.]
+Box [\<][\>]
+Illegal [^A-Z0-9 \t\b\n\r\"\&\'\*\(\)\[\]\_\:\.\,\;\<\>]
+Entity ENTITY
+Port PORT
+Generic GENERIC
+Use USE
+Attribute ATTRIBUTE
+Is IS
+Of OF
+Constant CONSTANT
+String STRING
+End END
+All ALL
+Physical_Pin_Map PHYSICAL_PIN_MAP
+Pin_Map_String PIN_MAP_STRING
+True TRUE
+False FALSE
+Signal SIGNAL
+Low LOW
+Both BOTH
+Out OUT
+Inout INOUT
+In IN
+Buffer BUFFER
+Linkage LINKAGE
+Bit_Vector BIT_VECTOR
+Bit BIT
+To TO
+Downto DOWNTO
+Package PACKAGE
+Body BODY
+Type TYPE
+Subtype SUBTYPE
+Record RECORD
+Array ARRAY
+Positive POSITIVE
+Range RANGE
+Cell_Info CELL_INFO
+Input INPUT
+Output2 OUTPUT2
+Output3 OUTPUT3
+Control CONTROL
+Controlr CONTROLR
+Internal INTERNAL
+Clock CLOCK
+Observe_Only OBSERVE_ONLY
+Bidir BIDIR
+Bidir_In BIDIR_IN
+Bidir_Out BIDIR_OUT
+Z Z
+Extest EXTEST
+Sample SAMPLE
+Intest INTEST
+Runbist RUNBIST
+Pi PI
+Po PO
+Upd UPD
+Cap CAP
+X X
+Zero ZERO
+One ONE
+Bsdl_Extension BSDL_EXTENSION
+Std_1532_2001 STD_1532_2001
+Std_1532_2002 STD_1532_2002
+%%
+{Entity} {return( ENTITY ); }
+{Port} {yyextra->Base = DECIMAL; /* Default number base */
+ return( PORT ); }
+{Generic} {yyextra->Base = DECIMAL; return( GENERIC ); }
+{Use} {yyextra->Base = DECIMAL; return( USE ); }
+{Attribute} {yyextra->Base = DECIMAL; return( ATTRIBUTE ); }
+{Is} {return( IS ); }
+{Constant} {yyextra->Base = DECIMAL; return( CONSTANT ); }
+{String} {return( STRING ); }
+{End} {yyextra->Base = DECIMAL;
+ BEGIN INITIAL; /* Turn off start conditions */
+ return( END ); }
+{All} {return( ALL ); }
+{Of} {return( OF ); }
+{Physical_Pin_Map} {return( PHYSICAL_PIN_MAP ); }
+{Pin_Map_String} {return( PIN_MAP_STRING ); }
+{True} {return( TRUE ); }
+{False} {return( FALSE ); }
+{Signal} {return( SIGNAL ); }
+{Low} {return( LOW ); }
+{Both} {return( BOTH ); }
+{In} {return( IN ); }
+{Out} {return( OUT ); }
+{Inout} {return( INOUT ); }
+{Buffer} {return( BUFFER ); }
+{Linkage} {return( LINKAGE ); }
+{Bit} {return( BIT ); }
+{Bit_Vector} {return( BIT_VECTOR ); }
+{To} {return( TO ); }
+{Downto} {return( DOWNTO ); }
+{Package} {return( PACKAGE ); }
+{Body} {return( BODY ); }
+{Type} {return( TYPE ); }
+{Subtype} {return( SUBTYPE ); }
+{Record} {return( RECORD ); }
+{Array} {yyextra->Base = DECIMAL; return( ARRAY ); }
+{Positive} {return( POSITIVE ); }
+{Range} {return( RANGE ); }
+{Cell_Info} {BEGIN PAC; return( CELL_INFO ); }
+{Bsdl_Extension} {return( BSDL_EXTENSION ); }
+{Std_1532_2001} {return( STD_1532_2001 ); }
+{Std_1532_2002} {return( STD_1532_2002 ); }
+<BOU,PAC>{Input} {return( INPUT ); }
+<BOU,PAC>{Output2} {return( OUTPUT2 ); }
+<BOU,PAC>{Output3} {return( OUTPUT3 ); }
+<BOU,PAC>{Controlr} {return( CONTROLR ); }
+<BOU,PAC>{Control} {return( CONTROL ); }
+<BOU,PAC>{Internal} {return( INTERNAL ); }
+<BOU,PAC>{Clock} {return( CLOCK ); }
+<BOU,PAC>{Observe_Only} {return( OBSERVE_ONLY ); }
+<BOU>{Bidir} {return( BIDIR ); }
+<PAC>{Bidir_In} {return( BIDIR_IN ); }
+<PAC>{Bidir_Out} {return( BIDIR_OUT ); }
+<PAC>{Extest} {return( EXTEST ); }
+<PAC>{Sample} {return( SAMPLE ); }
+<PAC>{Intest} {return( INTEST ); }
+<PAC>{Runbist} {return( RUNBIST ); }
+<PAC>{Pi} {return( PI ); }
+<PAC>{Po} {return( PO ); }
+<PAC>{Upd} {return( UPD ); }
+<PAC>{Cap} {return( CAP ); }
+<PAC>{X} {return( X ); }
+<PAC>{Zero} {return( ZERO ); }
+<PAC>{One} {return( ONE ); }
+<BOU>{Z} {return( Z ); }
+{Eol} {yylineno++; /* Count lines */}
+{Comma} {return( COMMA ); }
+{Lparen} {return( LPAREN );}
+{Rparen} {return( RPAREN );}
+{Period} {return( PERIOD ); }
+{Colon} {return( COLON ); }
+{Box} {return( BOX ); }
+{Single_Quote} {yyextra->Base = BIN_X; return( SINGLE_QUOTE ); }
+{Colon_Equal} {return( COLON_EQUAL ); }
+{White} { /* Do Nothing on White Space */ }
+{VHDL_Comment} { /* Do Nothing on Comments */ }
+{Bin_X_Pattern} {if (yyextra->Base != BIN_X) REJECT;
+ yylval->str = new_string( yyextra, yytext );
+ return( BIN_X_PATTERN );}
+{Identifier} {yylval->str = new_string( yyextra, yytext );
+ return( IDENTIFIER ); }
+{Quoted_String} {yylval->str = new_string( yyextra, yytext );
+ return( QUOTED_STRING ); }
+{Decimal_Number} {if (yyextra->Base != DECIMAL) REJECT;
+ yylval->integer = atoi( (char *)yytext );
+ return( DECIMAL_NUMBER );}
+{Real_Number} {yylval->str = new_string( yyextra, yytext );
+ return( REAL_NUMBER );}
+{Concatenate} {return( CONCATENATE );}
+{Semicolon} {return( SEMICOLON );}
+{Illegal} {bsdl_msg( yyextra->proc_mode,
+ BSDL_MSG_ERR,
+ _("Illegal character %c (/%03o) at line %d:\n"),
+ (char)yytext[yyleng-1], (int)yytext[yyleng-1],
+ yylineno );
+ yyextra->Compile_Errors++;
+ return( ILLEGAL ); /* Will cause syntax error */}
+<<EOF>> {
+ yypop_buffer_state( yyscanner );
+ if ( !YY_CURRENT_BUFFER )
+ yyterminate();
+}
+%%
+/*****************************************************************************
+ * void *vhdl_flex_init( FILE *f, int mode )
+ *
+ * Initializes the scanner and storage elements extra data structure.
+ *
+ * Parameters
+ * f : descriptor of file for scanning
+ * proc_mode : processing mode, consisting of BSDL_MODE_* bits
+ *
+ * Returns
+ * pointer to newly initialized scanner structure
+ ****************************************************************************/
+void *vhdl_flex_init( FILE *f, int proc_mode )
+{
+ scan_extra_t *extra;
+ yyscan_t scanner;
+
+ /* get our scanner structure */
+ if (yylex_init( &scanner ) != 0)
+ {
+ bsdl_msg( proc_mode, BSDL_MSG_FATAL, _("Scanner could not be initialized\n") );
+ return NULL;
+ }
+ yyset_in( f, scanner );
+
+ if (!(extra = (scan_extra_t *)malloc( sizeof( scan_extra_t ) )))
+ {
+ bsdl_msg( proc_mode,
+ BSDL_MSG_FATAL, _("Out of memory, %s line %i\n"), __FILE__, __LINE__ );
+ yylex_destroy( scanner );
+ return NULL;
+ }
+
+ extra->proc_mode = proc_mode;
+ extra->Compile_Errors = 0;
+ extra->Base = DECIMAL;
+
+ yyset_extra( extra, scanner );
+
+ return scanner;
+}
+
+
+/*****************************************************************************
+ * void vhdl_flex_deinit( void *scanner )
+ *
+ * Deinitializes the scanner and closes the input file.
+ *
+ * Parameters
+ * scanner : pointer to scanner definition structure
+ *
+ * Returns
+ * void
+ ****************************************************************************/
+void vhdl_flex_deinit( void *scanner )
+{
+ if (yyget_in( scanner ))
+ {
+ /* file might still be open so close it in any case
+ e.g. when a compile error occured and the parser didn't hit EOF/yywrap() */
+ fclose( yyget_in( scanner ) );
+ yyset_in( NULL, scanner );
+ }
+ free( yyget_extra( scanner ) );
+ yylex_destroy( scanner );
+}
+
+
+/*****************************************************************************
+ * void yywrap( yyscan_t scanner )
+ *
+ * Closes the input file upon EOF condition.
+ *
+ * Parameters
+ * scanner : pointer to scanner definition structure
+ *
+ * Returns
+ * 1
+ ****************************************************************************/
+int yywrap( yyscan_t scanner )
+{
+ if (yyget_in( scanner ))
+ {
+ fclose( yyget_in( scanner ) );
+ yyset_in( NULL, scanner );
+ }
+ return 1;
+}
+
+
+/*****************************************************************************
+ * char *new_string( scan_extra_t * extra, const char *str )
+ *
+ * Allocates memory for a string and copies the contents of *str.
+ *
+ * Parameters
+ * extra : pointer to extra data structure
+ * str : pointer to string to be duplicated
+ *
+ * Returns
+ * pointer to allocated and initialized string memory
+ ****************************************************************************/
+static char *new_string( scan_extra_t *extra, const char *str )
+{
+ char *n_str;
+ size_t n_str_size;
+
+ n_str_size = strlen( str ) + 1;
+ if ((n_str = (char *)malloc( n_str_size )))
+ {
+ strncpy( n_str, str, n_str_size-1 );
+ n_str[n_str_size-1] = '\0'; /* set very last element to EOS */
+ }
+ else
+ bsdl_msg( extra->proc_mode,
+ BSDL_MSG_FATAL, _("Out of memory, %s line %i\n"), __FILE__, __LINE__ );
+
+ return n_str;
+}
+
+
+/*****************************************************************************
+ * void vhdl_flex_switch_file( yyscan_t scanner, char *filename )
+ *
+ * Selects the specified file for further scanning.
+ *
+ * Parameters
+ * scanner : pointer to scanner definition structure
+ * filename : name of the new file to be scanned
+ *
+ * Returns
+ * void
+ ****************************************************************************/
+void vhdl_flex_switch_file( yyscan_t scanner, char *filename )
+{
+ scan_extra_t *extra;
+ FILE *f;
+ char *s;
+
+ /* convert filename to all upper case */
+ s = filename;
+ while (*s)
+ {
+ if (islower( *s ))
+ *s = toupper( *s );
+ s++;
+ }
+
+ extra = yyget_extra( scanner );
+
+ /* file in current directory has precedence */
+ f = fopen( filename, "r" );
+ if (!f)
+ {
+ const char *db_path = jtag_get_data_dir();
+ char *db_file;
+
+ if ((db_file = (char *)malloc( strlen( db_path ) +
+ 1 + /* "/" */
+ 4 + /* "bsdl" */
+ 1 + /* "/" */
+ strlen( filename ) +
+ 1 )))
+ {
+ strcpy( db_file, db_path );
+ strcat( db_file, "/" );
+ strcat( db_file, "bsdl" );
+ strcat( db_file, "/" );
+ strcat( db_file, filename );
+ f = fopen( db_file, "r" );
+
+ if (!f)
+ bsdl_msg( extra->proc_mode,
+ BSDL_MSG_FATAL, _("Cannot open file %s or %s.\n"), filename, db_file );
+ free( db_file );
+ if (!f)
+ return;
+ }
+ }
+
+ yypush_buffer_state( yy_create_buffer( f, YY_BUF_SIZE, scanner ), scanner );
+ yyset_lineno( 1, scanner );
+}
+
+
+/*****************************************************************************
+ * int vhdl_flex_get_compile_errors( yyscan_t scanner )
+ *
+ * Retrieves the accumulated number of compile errors encountered so far.
+ *
+ * Parameters
+ * scanner : pointer to scanner definition structure
+ *
+ * Returns
+ * number of compile errors
+ ****************************************************************************/
+int vhdl_flex_get_compile_errors( yyscan_t scanner )
+{
+ scan_extra_t *extra = yyget_extra( scanner );
+ return extra->Compile_Errors;
+}
+
+
+/*****************************************************************************
+ * void vhdl_flex_set_compile_errors( int n, yyscan_t scanner )
+ *
+ * Sets the number of compile errors to n.
+ *
+ * Parameters
+ * n : preset number
+ * scanner : pointer to scanner definition structure
+ *
+ * Returns
+ * void
+ ****************************************************************************/
+static void vhdl_flex_set_compile_errors( int n, yyscan_t scanner )
+{
+ scan_extra_t *extra = yyget_extra( scanner );
+ extra->Compile_Errors = n;
+}
+
+
+/*****************************************************************************
+ * int vhdl_flex_postinc_compile_errors( yyscan_t scanner )
+ *
+ * Increments the number of compile errors.
+ *
+ * Parameters
+ * scanner : pointer to scanner definition structure
+ *
+ * Returns
+ * number of compile errors before increment
+ ****************************************************************************/
+int vhdl_flex_postinc_compile_errors( yyscan_t scanner )
+{
+ int errors = vhdl_flex_get_compile_errors( scanner );
+
+ vhdl_flex_set_compile_errors( errors+1, scanner );
+ return errors;
+}
+
+
+/*****************************************************************************
+ * int vhdl_flex_get_lineno( yyscan_t scanner )
+ *
+ * Returns the current line number in the scanned file.
+ *
+ * Parameters
+ * scanner : pointer to scanner definition structure
+ *
+ * Returns
+ * current line number
+ ****************************************************************************/
+int vhdl_flex_get_lineno( yyscan_t scanner )
+{
+ return yyget_lineno( scanner );
+}
+
+
+/*
+ Local Variables:
+ mode:C
+ c-default-style:gnu
+ indent-tabs-mode:nil
+ End:
+*/
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2008, Arnim Laeuger
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Arnim Laeuger <arniml@users.sourceforge.net>, 2008.
+ *
+ */
+
+#ifndef VHDL_PARSER_H
+#define VHDL_PARSER_H
+
+#include "bsdl_types.h"
+
+/* VHDL lexer declarations */
+void *vhdl_flex_init( FILE *, int );
+void vhdl_flex_deinit( void * );
+void vhdl_flex_switch_file( void *, char * );
+int vhdl_flex_get_compile_errors( void * );
+int vhdl_flex_postinc_compile_errors( void * );
+int vhdl_flex_get_lineno( void * );
+
+/* VHDL parser declarations */
+vhdl_parser_priv_t *vhdl_parser_init( FILE *, jtag_ctrl_t * );
+void vhdl_parser_deinit( vhdl_parser_priv_t * );
+int vhdlparse( vhdl_parser_priv_t * );
+
+#endif /* VHDL_PARSER_H */
--- /dev/null
+#!/bin/bash
+#
+# $Id$
+#
+# Convert a BSDL file to a jtag part description
+#
+# Copyright (C) 2009, A. Laeuger
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+
+scriptname=`basename $0`
+
+function usage ()
+{
+ cat <<EOF
+Usage: $scriptname <bsdl-file> <jtag-file>
+Converts a BSDL file to a jtag part description.
+
+Parameters
+ bsdl-file : Name of BSDL file
+ jtag-file : Name of converted jtag description file
+
+EOF
+}
+
+if [[ -z $1 || -z $2 ]]; then
+ usage
+ exit 1
+fi
+
+
+echo "bsdl dump $1" | jtag > $2
+
+exit 0
--- /dev/null
+.deps
+Makefile
+Makefile.in
--- /dev/null
+#
+# $Id$
+#
+# Copyright (C) 2003 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Marcel Telka <marcel@telka.sk>, 2003.
+#
+
+include $(top_srcdir)/Makefile.rules
+
+noinst_LIBRARIES = libbus.a
+
+libbus_a_SOURCES = \
+ buses.c \
+ buses.h \
+ generic_bus.c \
+ generic_bus.h \
+ pxa2x0_mc.h \
+ readmem.c \
+ writemem.c
+
+if ENABLE_BUS_AU1500
+libbus_a_SOURCES += au1500.c
+endif
+
+if ENABLE_BUS_AVR32
+libbus_a_SOURCES += avr32.c
+endif
+
+if ENABLE_BUS_BCM1250
+libbus_a_SOURCES += bcm1250.c
+endif
+
+if ENABLE_BUS_BF526_EZKIT
+libbus_a_SOURCES += bf537_stamp.c
+endif
+
+if ENABLE_BUS_BF527_EZKIT
+libbus_a_SOURCES += bf537_stamp.c
+endif
+
+if ENABLE_BUS_BF533_STAMP
+libbus_a_SOURCES += bf533_stamp.c
+endif
+
+if ENABLE_BUS_BF533_EZKIT
+libbus_a_SOURCES += bf533_ezkit.c
+endif
+
+if ENABLE_BUS_BF537_STAMP
+libbus_a_SOURCES += bf537_stamp.c
+endif
+
+if ENABLE_BUS_BF537_EZKIT
+libbus_a_SOURCES += bf537_stamp.c
+endif
+
+if ENABLE_BUS_BF538F_EZKIT
+libbus_a_SOURCES += bf537_stamp.c
+endif
+
+if ENABLE_BUS_BF548_EZKIT
+libbus_a_SOURCES += bf548_ezkit.c
+endif
+
+if ENABLE_BUS_BF561_EZKIT
+libbus_a_SOURCES += bf561_ezkit.c
+endif
+
+if ENABLE_BUS_BSCOACH
+libbus_a_SOURCES += bscoach.c
+endif
+
+if ENABLE_BUS_EJTAG
+libbus_a_SOURCES += ejtag.c
+endif
+
+if ENABLE_BUS_EJTAG_DMA
+libbus_a_SOURCES += ejtag_dma.c
+endif
+
+if ENABLE_BUS_FJMEM
+libbus_a_SOURCES += fjmem.c
+endif
+
+if ENABLE_BUS_H7202
+libbus_a_SOURCES += h7202.c
+endif
+
+if ENABLE_BUS_IXP425
+libbus_a_SOURCES += ixp425.c
+endif
+
+if ENABLE_BUS_JOPCYC
+libbus_a_SOURCES += jopcyc.c
+endif
+
+if ENABLE_BUS_LH7A400
+libbus_a_SOURCES += lh7a400.c
+endif
+
+if ENABLE_BUS_MPC5200
+libbus_a_SOURCES += mpc5200.c
+endif
+
+if ENABLE_BUS_MPC824X
+libbus_a_SOURCES += mpc824x.c
+endif
+
+if ENABLE_BUS_PPC405EP
+libbus_a_SOURCES += ppc405ep.c
+endif
+
+if ENABLE_BUS_PPC440GX_EBC8
+libbus_a_SOURCES += ppc440gx_ebc8.c
+endif
+
+if ENABLE_BUS_PROTOTYPE
+libbus_a_SOURCES += prototype.c
+endif
+
+if ENABLE_BUS_PXA2X0
+libbus_a_SOURCES += pxa2x0.c
+else
+if ENABLE_BUS_PXA27X
+libbus_a_SOURCES += pxa2x0.c
+endif
+endif
+
+if ENABLE_BUS_S3C4510
+libbus_a_SOURCES += s3c4510x.c
+endif
+
+if ENABLE_BUS_SA1110
+libbus_a_SOURCES += sa1110.c
+endif
+
+if ENABLE_BUS_SH7727
+libbus_a_SOURCES += sh7727.c
+endif
+
+if ENABLE_BUS_SH7750R
+libbus_a_SOURCES += sh7750r.c
+endif
+
+if ENABLE_BUS_SH7751R
+libbus_a_SOURCES += sh7751r.c
+endif
+
+if ENABLE_BUS_SHARC_21065L
+libbus_a_SOURCES += sharc21065l.c
+endif
+
+if ENABLE_BUS_SLSUP3
+libbus_a_SOURCES += slsup3.c
+endif
+
+if ENABLE_BUS_TX4925
+libbus_a_SOURCES += tx4925.c
+endif
+
+if ENABLE_BUS_ZEFANT_XS3
+libbus_a_SOURCES += zefant-xs3.c
+endif
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2003 BLXCPU co. Ltd.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by ZHANG WEI <zwblue@sohu.com>, 2003
+ *
+ * Documentation:
+ * [1] AMD, "AMD Alchemy Solutions AU1500 Processor Data Book -
+ * Preliminary Information", June 2003, Publication ID: 30361B
+ *
+ */
+
+
+#include "sysdep.h"
+
+#include <string.h>
+#include <stdint.h>
+#include <stdlib.h>
+
+#include "part.h"
+#include "bus.h"
+#include "chain.h"
+#include "bssignal.h"
+#include "jtag.h"
+#include "buses.h"
+#include "generic_bus.h"
+
+typedef struct{
+ signal_t *rad[32];
+ signal_t *nrcs[4];
+ signal_t *nrwe;
+ signal_t *nroe;
+ signal_t *rd[32];
+} bus_params_t;
+
+#define RAD ((bus_params_t *) bus->params)->rad
+#define nRCS ((bus_params_t *) bus->params)->nrcs
+#define nRWE ((bus_params_t *) bus->params)->nrwe
+#define nROE ((bus_params_t *) bus->params)->nroe
+#define RD ((bus_params_t *) bus->params)->rd
+
+/**
+ * bus->driver->(*new_bus)
+ *
+ */
+static bus_t *au1500_bus_new( chain_t *chain, const bus_driver_t *driver, char *cmd_params[] )
+{
+ bus_t *bus;
+ part_t *part;
+ char buff[10];
+ int i;
+ int failed = 0;
+
+ bus = calloc( 1, sizeof (bus_t) );
+ if (!bus)
+ return NULL;
+
+ bus->driver = driver;
+ bus->params = calloc( 1, sizeof(bus_params_t) );
+ if (!bus->params){
+ free(bus);
+ return NULL;
+ }
+
+ CHAIN = chain;
+ PART = part = chain->parts->parts[chain->active_part];
+
+ for(i=0; i<32; i++){
+ sprintf( buff, "RAD%d", i);
+ failed |= generic_bus_attach_sig( part, &(RAD[i]), buff );
+ }
+
+ for(i=0; i<4; i++){
+ sprintf( buff, "RCE_N%d", i);
+ failed |= generic_bus_attach_sig( part, &(nRCS[i]), buff );
+ }
+
+
+ failed |= generic_bus_attach_sig( part, &(nRWE), "RWE_N" );
+
+ failed |= generic_bus_attach_sig( part, &(nROE), "ROE_N" );
+
+ for(i=0; i<32; i++){
+ sprintf( buff, "RD%d", i);
+ failed |= generic_bus_attach_sig( part, &(RD[i]), buff );
+ }
+
+ if (failed) {
+ free( bus->params );
+ free ( bus );
+ return NULL;
+ }
+
+ return bus;
+
+}
+
+/**
+ * bus->driver->(*printinfo)
+ *
+ */
+static void
+au1500_bus_printinfo( bus_t *bus)
+{
+ int i;
+
+ for (i = 0; i < CHAIN->parts->len; i++)
+ if (PART == CHAIN->parts->parts[i])
+ break;
+ printf( _("AU1500 compatible bus driver via BSR (JTAG part No. %d)\n"), i );
+}
+
+/**
+ * bus->driver->(*area)
+ *
+ */
+static int
+au1500_bus_area(bus_t *bus, uint32_t addr, bus_area_t *area)
+{
+ area->description = NULL;
+ area->start = UINT32_C(0x00000000);
+ area->length = UINT64_C(0x00100000000);
+// area->width = 16;
+ area->width = part_get_signal( PART, part_find_signal( PART, "ROMSIZ" ) ) ? 16 : 32;
+
+
+ return URJTAG_STATUS_OK;
+
+}
+
+static void
+setup_address( bus_t *bus, uint32_t a)
+{
+ int i;
+ part_t *p = PART;
+
+ for( i = 0; i < 32; i++)
+ part_set_signal( p, RAD[i], 1, (a >>i) & 1);
+}
+
+static void
+set_data_in( bus_t *bus )
+{
+ int i;
+ part_t *p = PART;
+ bus_area_t area;
+
+ au1500_bus_area( bus, 0, &area);
+
+ for( i = 0; i < area.width; i++ )
+ part_set_signal( p, RD[i], 0, 0 );
+
+}
+
+static uint32_t
+get_data_out( bus_t *bus )
+{
+ int i;
+ part_t *p = PART;
+ bus_area_t area;
+ uint32_t d = 0;
+
+ au1500_bus_area( bus, 0, &area);
+
+ for( i = 0; i < area.width; i++ )
+ d |= (uint32_t)(part_get_signal( p, RD[i] ) << i);
+
+ return d;
+}
+
+static void
+setup_data( bus_t *bus, uint32_t d)
+{
+ int i;
+ part_t *p = PART;
+ bus_area_t area;
+
+ au1500_bus_area( bus, 0, &area);
+
+ for( i = 0; i < area.width; i++ )
+ part_set_signal( p, RD[i], 1, ( d>>i ) & 1 );
+}
+
+/**
+ * bus->driver->(*read_start)
+ *
+ */
+static void
+au1500_bus_read_start( bus_t *bus, uint32_t adr )
+{
+ part_t *p = PART;
+ chain_t *chain = CHAIN;
+
+ part_set_signal( p, nRCS[0], 1, 0 );
+ part_set_signal( p, nRCS[1], 1, 1 );
+ part_set_signal( p, nRCS[2], 1, 1 );
+ part_set_signal( p, nRCS[3], 1, 1 );
+ part_set_signal( p, nRWE, 1, 1 );
+ part_set_signal( p, nROE, 1, 0);
+
+ setup_address( bus, adr);
+ set_data_in( bus );
+
+ chain_shift_data_registers( chain, 0 );
+}
+
+/**
+ * bus->driver->(*read_next)
+ *
+ */
+static uint32_t
+au1500_bus_read_next( bus_t *bus, uint32_t adr )
+{
+ chain_t *chain = CHAIN;
+
+ setup_address( bus, adr );
+ chain_shift_data_registers( chain, 1 );
+
+ return get_data_out( bus );
+}
+
+/**
+ * bus->driver->(*read_end)
+ *
+ */
+static uint32_t
+au1500_bus_read_end( bus_t *bus )
+{
+ part_t *p = PART;
+ chain_t *chain = CHAIN;
+
+ part_set_signal( p, nRCS[0], 1, 1 );
+ part_set_signal( p, nRCS[1], 1, 1 );
+ part_set_signal( p, nRCS[2], 1, 1 );
+ part_set_signal( p, nRCS[3], 1, 1 );
+ part_set_signal( p, nRWE, 1, 1 );
+ part_set_signal( p, nROE, 1, 1 );
+
+ chain_shift_data_registers( chain, 1 );
+
+ return get_data_out( bus );
+}
+
+/**
+ * bus->driver->(*write)
+ *
+ */
+static void
+au1500_bus_write( bus_t *bus, uint32_t adr, uint32_t data )
+{
+ part_t *p = PART;
+ chain_t *chain = CHAIN;
+
+ part_set_signal( p, nRCS[0], 1, 0 );
+ part_set_signal( p, nRCS[1], 1, 1 );
+ part_set_signal( p, nRCS[2], 1, 1 );
+ part_set_signal( p, nRCS[3], 1, 1 );
+ part_set_signal( p, nRWE, 1, 1 );
+ part_set_signal( p, nROE, 1, 1 );
+
+ setup_address( bus, adr );
+ setup_data( bus, data );
+
+ chain_shift_data_registers( chain, 0 );
+
+ part_set_signal( p, nRWE, 1, 0 );
+ chain_shift_data_registers( chain, 0 );
+
+ part_set_signal( p, nRWE, 1, 1);
+ part_set_signal( p, nROE, 1, 1);
+ part_set_signal( p, nRCS[0], 1, 1);
+ part_set_signal( p, nRCS[1], 1, 1 );
+ part_set_signal( p, nRCS[2], 1, 1 );
+ part_set_signal( p, nRCS[3], 1, 1 );
+
+ chain_shift_data_registers( chain, 0);
+}
+
+const bus_driver_t au1500_bus = {
+ "au1500",
+ N_("AU1500 BUS Driver via BSR"),
+ au1500_bus_new,
+ generic_bus_free,
+ au1500_bus_printinfo,
+ generic_bus_prepare_extest,
+ au1500_bus_area,
+ au1500_bus_read_start,
+ au1500_bus_read_next,
+ au1500_bus_read_end,
+ generic_bus_read,
+ au1500_bus_write,
+ generic_bus_no_init
+};
+
--- /dev/null
+/*
+ * $Id$
+ *
+ * AVR32 multi-mode bus driver
+ *
+ * Copyright (c) 2008 Gabor Juhos <juhosg@openwrt.org>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Documentation:
+ * [1] Atmel Corporation, "AT32AP7000 - High Performance, Low Power
+ * AVR(R)32 32-Bit Microcontroller", Rev. 32003K-AVR32-10/07
+ */
+
+#include "sysdep.h"
+
+#include <stdlib.h>
+#include <stdint.h>
+#include <string.h>
+
+#include "part.h"
+#include "bus.h"
+#include "chain.h"
+#include "bssignal.h"
+#include "jtag.h"
+#include "buses.h"
+#include "generic_bus.h"
+#include "data_register.h"
+#include "tap.h"
+
+typedef struct {
+ unsigned int mode;
+
+ unsigned int slave;
+ uint32_t addr_mask;
+
+ uint32_t rwcs_rd;
+ uint32_t rwcs_wr;
+} bus_params_t;
+
+#define BUS_MODE_OCD 0
+#define BUS_MODE_HSBC 1
+#define BUS_MODE_HSBU 2
+#define BUS_MODE_x8 3
+#define BUS_MODE_x16 4
+#define BUS_MODE_x32 5
+
+#define BP (( bus_params_t *) bus->params)
+#define SLAVE (BP->slave)
+#define MODE (BP->mode)
+#define ADDR_MASK (BP->addr_mask)
+#define RWCS_RD (BP->rwcs_rd)
+#define RWCS_WR (BP->rwcs_wr)
+
+/* ------------------------------------------------------------------------- */
+#define SAB_SLAVE_OCD 1
+#define SAB_SLAVE_HSB_CACHED 4
+#define SAB_SLAVE_HSB_UNCACHED 5
+
+#define ACCESS_MODE_WRITE 0
+#define ACCESS_MODE_READ 1
+
+#define ACCESS_STATUS_OK 0
+#define ACCESS_STATUS_ERR -1
+
+#define SAB_OCD_AREA_SIZE UINT64_C(0x1000)
+#define SAB_OCD_ADDR_MASK 0xfff
+#define SAB_HSB_AREA_SIZE UINT64_C(0x100000000)
+#define SAB_HSB_ADDR_MASK 0xffffffff
+
+/* OCD register addresses */
+#define OCD_REG_RWCS 0x1c
+#define OCD_REG_RWA 0x24
+#define OCD_REG_RWD 0x28
+
+/* OCD RWCS register definitions */
+#define OCD_RWCS_AC 0x80000000 /* start access */
+#define OCD_RWCS_SZ32 0x10000000 /* word access */
+#define OCD_RWCS_SZ16 0x08000000 /* half-word access */
+#define OCD_RWCS_SZ8 0x00000000 /* byte access */
+#define OCD_RWCS_RW 0x40000000 /* access mode 0:read, 1: write */
+#define OCD_RWCS_CNT_S 2
+#define OCD_RWCS_ERR 0x00000002 /* last access generated and error */
+#define OCD_RWCS_DV 0x00000001 /* data is valid */
+
+/* shorthands */
+#define OCD_RWCS_READONE (OCD_RWCS_AC | (1 << OCD_RWCS_CNT_S))
+#define OCD_RWCS_WRITEONE (OCD_RWCS_READONE | OCD_RWCS_RW)
+#define OCD_RWCS_READ8 (OCD_RWCS_READONE | OCD_RWCS_SZ8)
+#define OCD_RWCS_WRITE8 (OCD_RWCS_WRITEONE | OCD_RWCS_SZ8)
+#define OCD_RWCS_READ16 (OCD_RWCS_READONE | OCD_RWCS_SZ16)
+#define OCD_RWCS_WRITE16 (OCD_RWCS_WRITEONE | OCD_RWCS_SZ16)
+#define OCD_RWCS_READ32 (OCD_RWCS_READONE | OCD_RWCS_SZ32)
+#define OCD_RWCS_WRITE32 (OCD_RWCS_WRITEONE | OCD_RWCS_SZ32)
+
+#define DBG_BASIC 0x0001
+#define DBG_SHIFT 0x0002
+#define DBG_TRACE 0x8000
+
+#define DBG_ALL 0xffff
+
+#define DBG_LEVEL 0
+
+#define DBG(t, f, ...) \
+ do { \
+ if (DBG_LEVEL & (t)) \
+ printf( f, ## __VA_ARGS__ ); \
+ } while (0)
+
+#define TRACE_ENTER() DBG(DBG_TRACE, ">>> %s", __FUNCTION__ )
+#define TRACE_EXIT() DBG(DBG_TRACE, "<<< %s", __FUNCTION__ )
+
+#define ERR(f, ...) \
+ printf( _("%s(%d): error, " f), __FILE__, __LINE__, ## __VA_ARGS__ )
+
+/* ------------------------------------------------------------------------- */
+
+static inline void
+register_set_bit (tap_register * tr, unsigned int bitno, unsigned int val)
+{
+ tr->data[bitno] = (val) ? 1 : 0;
+}
+
+static inline int
+register_get_bit (tap_register * tr, unsigned int bitno)
+{
+ return (tr->data[bitno] & 1) ? 1 : 0;
+}
+
+static inline void
+shift_instr (bus_t * bus, unsigned int bit)
+{
+ tap_register *r = PART->active_instruction->out;
+
+ do
+ {
+ DBG (DBG_SHIFT, _("%s: instr=%s\n"), __FUNCTION__,
+ register_get_string (PART->active_instruction->value));
+ chain_shift_instructions_mode (CHAIN, 1, 1, EXITMODE_IDLE);
+ DBG (DBG_SHIFT, _("%s: ret=%s\n"), __FUNCTION__, register_get_string (r));
+ /* TODO: add timeout checking */
+ }
+ while (register_get_bit (r, bit));
+}
+
+static inline void
+shift_data (bus_t * bus, unsigned int bit)
+{
+ data_register *dr = PART->active_instruction->data_register;
+
+ do
+ {
+ DBG (DBG_SHIFT, _("%s: data=%s\n"), __FUNCTION__,
+ register_get_string (dr->in));
+ chain_shift_data_registers (CHAIN, 1);
+ DBG (DBG_SHIFT, _("%s: data out=%s\n"), __FUNCTION__,
+ register_get_string (dr->out));
+ /* TODO: add timeout checking */
+ }
+ while (register_get_bit (dr->out, bit));
+}
+
+/* ------------------------------------------------------------------------- */
+
+static void
+mwa_scan_in_instr (bus_t * bus)
+{
+ shift_instr (bus, 2);
+}
+
+static void
+mwa_scan_in_addr (bus_t * bus, unsigned int slave, uint32_t addr, int mode)
+{
+ tap_register *r = PART->active_instruction->data_register->in;
+ int i;
+
+ DBG (DBG_BASIC, _("%s: slave=%01x, addr=%08x, %s\n"),
+ __FUNCTION__, slave, addr,
+ (mode == ACCESS_MODE_READ) ? "READ" : "WRITE");
+
+ /* set slave bits */
+ for (i = 0; i < 4; i++)
+ register_set_bit (r, 31 + i, slave & (1 << i));
+
+ /* set address bits */
+ addr >>= 2;
+ for (i = 0; i < 30; i++)
+ register_set_bit (r, 1 + i, addr & (1 << i));
+
+ /* set access mode */
+ register_set_bit (r, 0, mode);
+
+ shift_data (bus, 32);
+}
+
+static void
+mwa_scan_in_data (bus_t * bus, uint32_t data)
+{
+ tap_register *r = PART->active_instruction->data_register->in;
+ int i;
+
+ DBG (DBG_BASIC, _("%s: data=%08x\n"), __FUNCTION__, data);
+
+ register_set_bit (r, 0, 0);
+ register_set_bit (r, 1, 0);
+ register_set_bit (r, 2, 0);
+
+ for (i = 0; i < 32; i++)
+ register_set_bit (r, 3 + i, data & (1 << i));
+
+ shift_data (bus, 0);
+}
+
+static void
+mwa_scan_out_data (bus_t * bus, uint32_t * pdata)
+{
+ tap_register *r = PART->active_instruction->data_register->out;
+ uint32_t data;
+ int i;
+
+ shift_data (bus, 32);
+
+ data = 0;
+ for (i = 0; i < 32; i++)
+ data |= register_get_bit (r, i) << i;
+
+ DBG (DBG_BASIC, _("%s: data=%08x\n"), __FUNCTION__, data);
+
+ *pdata = data;
+}
+
+static inline void
+mwa_read_word (bus_t * bus, unsigned int slave, uint32_t addr,
+ uint32_t * data)
+{
+ mwa_scan_in_instr (bus);
+ mwa_scan_in_addr (bus, slave, addr, ACCESS_MODE_READ);
+ mwa_scan_out_data (bus, data);
+}
+
+static inline void
+mwa_write_word (bus_t * bus, unsigned int slave, uint32_t addr, uint32_t data)
+{
+ mwa_scan_in_instr (bus);
+ mwa_scan_in_addr (bus, slave, addr, ACCESS_MODE_WRITE);
+ mwa_scan_in_data (bus, data);
+}
+
+/* ------------------------------------------------------------------------- */
+
+static void
+nexus_access_start (bus_t * bus)
+{
+ shift_instr (bus, 2);
+}
+
+static void
+nexus_access_end (bus_t * bus)
+{
+ tap_reset_bypass (CHAIN);
+}
+
+static void
+nexus_access_set_addr (bus_t * bus, uint32_t addr, int mode)
+{
+ tap_register *r = PART->active_instruction->data_register->in;
+ int i;
+
+ DBG (DBG_BASIC, _("%s: addr=%08x, mode=%s\n"), __FUNCTION__, addr,
+ (mode == ACCESS_MODE_READ) ? "READ" : "WRITE");
+
+ register_fill (r, 0);
+
+ /* set address bits */
+ addr >>= 2;
+ for (i = 0; i < 7; i++)
+ register_set_bit (r, 27 + i, addr & (1 << i));
+
+ /* set access mode */
+ register_set_bit (r, 26, mode);
+
+ shift_data (bus, 32);
+}
+
+static void
+nexus_access_read_data (bus_t * bus, uint32_t * pdata)
+{
+ tap_register *r = PART->active_instruction->data_register->out;
+ uint32_t data;
+ int i;
+
+ shift_data (bus, 32);
+
+ data = 0;
+ for (i = 0; i < 32; i++)
+ data |= register_get_bit (r, i) << i;
+
+ DBG (DBG_BASIC, _("%s: data=%08x\n"), __FUNCTION__, data);
+
+ *pdata = data;
+}
+
+static void
+nexus_access_write_data (bus_t * bus, uint32_t data)
+{
+ tap_register *r = PART->active_instruction->data_register->in;
+ int i;
+
+ DBG (DBG_BASIC, _("%s: data=%08x\n"), __FUNCTION__, data);
+
+ register_set_bit (r, 0, 0);
+ register_set_bit (r, 1, 0);
+
+ for (i = 0; i < 32; i++)
+ register_set_bit (r, 2 + i, data & (1 << i));
+
+ shift_data (bus, 0);
+}
+
+static inline void
+nexus_reg_read (bus_t * bus, uint32_t reg, uint32_t * data)
+{
+ nexus_access_set_addr (bus, reg, ACCESS_MODE_READ);
+ nexus_access_read_data (bus, data);
+}
+
+static inline void
+nexus_reg_write (bus_t * bus, uint32_t reg, uint32_t data)
+{
+ nexus_access_set_addr (bus, reg, ACCESS_MODE_WRITE);
+ nexus_access_write_data (bus, data);
+}
+
+/* ------------------------------------------------------------------------- */
+
+static void
+nexus_memacc_set_addr (bus_t * bus, uint32_t addr, uint32_t rwcs)
+{
+ nexus_reg_write (bus, OCD_REG_RWA, addr);
+ nexus_reg_write (bus, OCD_REG_RWCS, rwcs);
+}
+
+static int
+nexus_memacc_read (bus_t * bus, uint32_t * data)
+{
+ uint32_t status;
+ int ret;
+
+ do
+ {
+ nexus_reg_read (bus, OCD_REG_RWCS, &status);
+ status &= (OCD_RWCS_ERR | OCD_RWCS_DV);
+ /* TODO: add timeout checking */
+ }
+ while (status == 0);
+
+ DBG (DBG_BASIC, _("%s: read status %08x\n"), __FUNCTION__, status);
+
+ ret = ACCESS_STATUS_OK;
+ switch (status)
+ {
+ case 1:
+ nexus_reg_read (bus, OCD_REG_RWD, data);
+ break;
+ default:
+ ERR ("read failed, status=%d\n", status);
+ *data = 0xffffffff;
+ ret = ACCESS_STATUS_ERR;
+ break;
+ }
+
+ return ret;
+}
+
+static int
+nexus_memacc_write (bus_t * bus, uint32_t addr, uint32_t data, uint32_t rwcs)
+{
+ uint32_t status;
+ int ret;
+
+ nexus_reg_write (bus, OCD_REG_RWA, addr);
+ nexus_reg_write (bus, OCD_REG_RWCS, rwcs);
+ nexus_reg_write (bus, OCD_REG_RWD, data);
+
+ nexus_reg_read (bus, OCD_REG_RWCS, &status);
+ status &= (OCD_RWCS_ERR | OCD_RWCS_DV);
+
+ DBG (DBG_BASIC, _("%s: status=%08x\n"), __FUNCTION__, status);
+
+ ret = ACCESS_STATUS_OK;
+ if (status)
+ {
+ ERR ("write failed, status=%d\n", status);
+ ret = ACCESS_STATUS_ERR;
+ }
+
+ return ret;
+}
+
+/* ------------------------------------------------------------------------- */
+
+static void
+avr32_bus_setup (bus_t * bus, chain_t * chain, part_t * part,
+ unsigned int mode)
+{
+ CHAIN = chain;
+ PART = part;
+ MODE = mode;
+
+ switch (mode)
+ {
+ case BUS_MODE_OCD:
+ SLAVE = SAB_SLAVE_OCD;
+ ADDR_MASK = SAB_OCD_ADDR_MASK & ~(3);
+ break;
+
+ case BUS_MODE_HSBC:
+ SLAVE = SAB_SLAVE_HSB_CACHED;
+ ADDR_MASK = SAB_HSB_ADDR_MASK & ~(3);
+ break;
+
+ case BUS_MODE_HSBU:
+ SLAVE = SAB_SLAVE_HSB_UNCACHED;
+ ADDR_MASK = SAB_HSB_ADDR_MASK & ~(3);
+ break;
+
+ case BUS_MODE_x8:
+ ADDR_MASK = SAB_HSB_ADDR_MASK;
+ RWCS_RD = OCD_RWCS_READ8;
+ RWCS_WR = OCD_RWCS_WRITE8;
+ break;
+
+ case BUS_MODE_x16:
+ ADDR_MASK = SAB_HSB_ADDR_MASK & ~(1);
+ RWCS_RD = OCD_RWCS_READ16;
+ RWCS_WR = OCD_RWCS_WRITE16;
+ break;
+
+ case BUS_MODE_x32:
+ ADDR_MASK = SAB_HSB_ADDR_MASK & ~(3);
+ RWCS_RD = OCD_RWCS_READ32;
+ RWCS_WR = OCD_RWCS_WRITE32;
+ break;
+ }
+}
+
+static int
+check_instruction (part_t * part, const char *instr)
+{
+ int ret;
+
+ ret = (part_find_instruction (part, instr) == NULL);
+ if (ret)
+ ERR ("instruction %s not found\n", instr);
+
+ return ret;
+}
+
+/**
+ * bus->driver->(*new_bus)
+ *
+ */
+static bus_t *
+avr32_bus_new (chain_t * chain, const bus_driver_t *driver, char *cmd_params[])
+{
+ bus_t *bus;
+ part_t *part;
+ char *param;
+ unsigned int mode;
+
+ part = chain->parts->parts[chain->active_part];
+
+ param = cmd_params[2];
+ if (!param)
+ {
+ ERR ("no bus mode specified\n");
+ return NULL;
+ }
+
+ if (!strcasecmp ("OCD", param))
+ {
+ mode = BUS_MODE_OCD;
+ }
+ else if (!strcasecmp ("HSBC", param))
+ {
+ mode = BUS_MODE_HSBC;
+ }
+ else if (!strcasecmp ("HSBU", param))
+ {
+ mode = BUS_MODE_HSBU;
+ }
+ else if (!strcasecmp ("x8", param))
+ {
+ mode = BUS_MODE_x8;
+ }
+ else if (!strcasecmp ("x16", param))
+ {
+ mode = BUS_MODE_x16;
+ }
+ else if (!strcasecmp ("x32", param))
+ {
+ mode = BUS_MODE_x32;
+ }
+ else
+ {
+ ERR ("invalid bus mode: %s\n", param);
+ return NULL;
+ }
+
+ switch (mode)
+ {
+ case BUS_MODE_OCD:
+ case BUS_MODE_HSBC:
+ case BUS_MODE_HSBU:
+ if (check_instruction (part, "MEMORY_WORD_ACCESS"))
+ return NULL;
+ break;
+ case BUS_MODE_x8:
+ case BUS_MODE_x16:
+ case BUS_MODE_x32:
+ if (check_instruction (part, "NEXUS_ACCESS"))
+ return NULL;
+ break;
+ }
+
+ bus = calloc( 1, sizeof (bus_t) );
+ if (!bus)
+ return NULL;
+
+ bus->driver = driver;
+ bus->params = calloc( 1, sizeof (bus_params_t) );
+ if (!bus->params)
+ {
+ free (bus);
+ return NULL;
+ }
+
+ avr32_bus_setup (bus, chain, part, mode);
+
+ return bus;
+}
+
+/**
+ * bus->driver->(*printinfo)
+ *
+ */
+static void
+avr32_bus_printinfo (bus_t * bus)
+{
+ int i;
+
+ for (i = 0; i < CHAIN->parts->len; i++)
+ if (PART == CHAIN->parts->parts[i])
+ break;
+
+ printf (_("AVR32 multi-mode bus driver (JTAG part No. %d)\n"), i);
+}
+
+/**
+ * bus->driver->(*prepare)
+ *
+ */
+static void
+avr32_bus_prepare (bus_t * bus)
+{
+ if (!INITIALIZED)
+ bus_init( bus );
+}
+
+/**
+ * bus->driver->(*area)
+ *
+ */
+static int
+avr32_bus_area (bus_t * bus, uint32_t addr, bus_area_t * area)
+{
+ switch (MODE)
+ {
+ case BUS_MODE_HSBC:
+ area->description = "HSB memory space, cached";
+ area->start = UINT32_C (0x00000000);
+ area->length = SAB_HSB_AREA_SIZE;
+ area->width = 32;
+ break;
+ case BUS_MODE_HSBU:
+ area->description = "HSB memory space, uncached";
+ area->start = UINT32_C (0x00000000);
+ area->length = SAB_HSB_AREA_SIZE;
+ area->width = 32;
+ break;
+ case BUS_MODE_x8:
+ area->description = "HSB memory space, uncached";
+ area->start = UINT32_C (0x00000000);
+ area->length = SAB_HSB_AREA_SIZE;
+ area->width = 8;
+ break;
+ case BUS_MODE_x16:
+ area->description = "HSB memory space, uncached";
+ area->start = UINT32_C (0x00000000);
+ area->length = SAB_HSB_AREA_SIZE;
+ area->width = 16;
+ break;
+ case BUS_MODE_x32:
+ area->description = "HSB memory space, uncached";
+ area->start = UINT32_C (0x00000000);
+ area->length = SAB_HSB_AREA_SIZE;
+ area->width = 32;
+ break;
+ case BUS_MODE_OCD:
+ if (addr < SAB_OCD_AREA_SIZE)
+ {
+ area->description = "OCD registers";
+ area->start = UINT32_C (0x00000000);
+ area->length = SAB_OCD_AREA_SIZE;
+ area->width = 32;
+ break;
+ }
+ /* fallthrough */
+ default:
+ area->description = NULL;
+ area->length = UINT64_C (0x100000000);
+ area->width = 0;
+ break;
+ }
+
+ return URJTAG_STATUS_OK;
+}
+
+/**
+ * bus->driver->(*read_start)
+ *
+ */
+static void
+avr32_bus_read_start (bus_t * bus, uint32_t addr)
+{
+ addr &= ADDR_MASK;
+
+ DBG (DBG_BASIC, _("%s:addr=%08x\n"), __FUNCTION__, addr);
+
+ switch (MODE)
+ {
+ case BUS_MODE_OCD:
+ case BUS_MODE_HSBC:
+ case BUS_MODE_HSBU:
+ part_set_instruction (PART, "MEMORY_WORD_ACCESS");
+ mwa_scan_in_instr (bus);
+ mwa_scan_in_addr (bus, SLAVE, addr, ACCESS_MODE_READ);
+ break;
+
+ case BUS_MODE_x8:
+ case BUS_MODE_x16:
+ case BUS_MODE_x32:
+ part_set_instruction (PART, "NEXUS_ACCESS");
+ nexus_access_start (bus);
+ nexus_memacc_set_addr (bus, addr, RWCS_RD);
+ break;
+ }
+}
+
+/**
+ * bus->driver->(*read_end)
+ *
+ */
+static uint32_t
+avr32_bus_read_end (bus_t * bus)
+{
+ uint32_t data;
+
+ switch (MODE)
+ {
+ case BUS_MODE_OCD:
+ case BUS_MODE_HSBC:
+ case BUS_MODE_HSBU:
+ mwa_scan_out_data (bus, &data);
+ break;
+ case BUS_MODE_x8:
+ case BUS_MODE_x16:
+ case BUS_MODE_x32:
+ nexus_memacc_read (bus, &data);
+ nexus_access_end (bus);
+ break;
+ }
+
+ return data;
+}
+
+/**
+ * bus->driver->(*read_next)
+ *
+ */
+static uint32_t
+avr32_bus_read_next (bus_t * bus, uint32_t addr)
+{
+ uint32_t data;
+
+ addr &= ADDR_MASK;
+
+ switch (MODE)
+ {
+ case BUS_MODE_OCD:
+ case BUS_MODE_HSBC:
+ case BUS_MODE_HSBU:
+ data = avr32_bus_read_end (bus);
+ avr32_bus_read_start (bus, addr);
+ break;
+ case BUS_MODE_x8:
+ case BUS_MODE_x16:
+ case BUS_MODE_x32:
+ nexus_memacc_read (bus, &data);
+ nexus_memacc_set_addr (bus, addr, RWCS_RD);
+ break;
+ }
+
+ return data;
+}
+
+/**
+ * bus->driver->(*write)
+ *
+ */
+static void
+avr32_bus_write (bus_t * bus, uint32_t addr, uint32_t data)
+{
+ addr &= ADDR_MASK;
+
+ switch (MODE)
+ {
+ case BUS_MODE_OCD:
+ case BUS_MODE_HSBC:
+ case BUS_MODE_HSBU:
+ part_set_instruction (PART, "MEMORY_WORD_ACCESS");
+ mwa_write_word (bus, SLAVE, addr, data);
+ break;
+ case BUS_MODE_x8:
+ case BUS_MODE_x16:
+ case BUS_MODE_x32:
+ part_set_instruction (PART, "NEXUS_ACCESS");
+ nexus_access_start (bus);
+ nexus_memacc_write (bus, addr, data, RWCS_WR);
+ nexus_access_end (bus);
+ break;
+ }
+}
+
+const bus_driver_t avr32_bus_driver = {
+ "avr32",
+ N_("Atmel AVR32 multi-mode bus driver, requires <mode> parameter\n"
+ " valid <mode> parameters:\n"
+ " x8: 8 bit bus for the uncached HSB area, via OCD registers\n"
+ " x16: 16 bit bus for the uncached HSB area, via OCD registers\n"
+ " x32: 32 bit bus for the uncached HSB area, via OCD registers\n"
+ " OCD : 32 bit bus for the OCD registers\n"
+ " HSBC: 32 bit bus for the cached HSB area, via SAB\n"
+ " HSBU: 32 bit bus for the uncached HSB area, via SAB"),
+ avr32_bus_new,
+ generic_bus_free,
+ avr32_bus_printinfo,
+ avr32_bus_prepare,
+ avr32_bus_area,
+ avr32_bus_read_start,
+ avr32_bus_read_next,
+ avr32_bus_read_end,
+ generic_bus_read,
+ avr32_bus_write,
+ generic_bus_no_init
+};
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2003 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Matan Ziv-Av.
+ * Modified by Marcel Telka <marcel@telka.sk>, 2003.
+ *
+ */
+
+#include "sysdep.h"
+
+#include <string.h>
+#include <stdint.h>
+#include <stdlib.h>
+
+#include "part.h"
+#include "bus.h"
+#include "chain.h"
+#include "bssignal.h"
+#include "jtag.h"
+#include "buses.h"
+#include "generic_bus.h"
+
+//#define USE_BCM_EJTAG
+
+typedef struct {
+ signal_t *io_ad[32];
+ signal_t *io_cs_l[8];
+ signal_t *io_rw;
+ signal_t *io_wr_l;
+ signal_t *io_oe_l;
+} bus_params_t;
+
+#define IO_AD ((bus_params_t *) bus->params)->io_ad
+#define IO_CS_L ((bus_params_t *) bus->params)->io_cs_l
+#define IO_RW ((bus_params_t *) bus->params)->io_rw
+#define IO_WR_L ((bus_params_t *) bus->params)->io_wr_l
+#define IO_OE_L ((bus_params_t *) bus->params)->io_oe_l
+
+/**
+ * bus->driver->(*new_bus)
+ *
+ */
+static bus_t *
+bcm1250_bus_new( chain_t *chain, const bus_driver_t *driver, char *cmd_params[] )
+{
+ bus_t *bus;
+ part_t *part;
+ char buff[10];
+ int i;
+ int failed = 0;
+
+ bus = calloc( 1, sizeof (bus_t) );
+ if (!bus)
+ return NULL;
+
+ bus->driver = driver;
+ bus->params = calloc( 1, sizeof (bus_params_t) );
+ if (!bus->params) {
+ free( bus );
+ return NULL;
+ }
+
+ CHAIN = chain;
+ PART = part = chain->parts->parts[chain->active_part];
+
+ for (i = 0; i < 32; i++) {
+ sprintf( buff, "IO_AD%d", i );
+ failed |= generic_bus_attach_sig( part, &(IO_AD[i]), buff );
+ }
+
+ for (i = 0; i < 8; i++) {
+ sprintf( buff, "IO_CS_L%d", i );
+ failed |= generic_bus_attach_sig( part, &(IO_CS_L[i]), buff );
+ }
+
+ failed |= generic_bus_attach_sig( part, &(IO_RW), "IO_RW" );
+
+ failed |= generic_bus_attach_sig( part, &(IO_WR_L), "IO_WR_L" );
+
+ failed |= generic_bus_attach_sig( part, &(IO_OE_L), "IO_OE_L" );
+
+ if (failed) {
+ free( bus->params );
+ free( bus );
+ return NULL;
+ }
+
+ return bus;
+}
+
+/**
+ * bus->driver->(*printinfo)
+ *
+ */
+static void
+bcm1250_bus_printinfo( bus_t *bus )
+{
+ int i;
+
+ for (i = 0; i < CHAIN->parts->len; i++)
+ if (PART == CHAIN->parts->parts[i])
+ break;
+ printf( _("Broadcom BCM1250 compatible bus driver via BSR (JTAG part No. %d)\n"), i );
+}
+
+/**
+ * bus->driver->(*area)
+ *
+ */
+static int
+bcm1250_bus_area( bus_t *bus, uint32_t addr, bus_area_t *area )
+{
+ area->description = NULL;
+ area->start = UINT32_C(0x00000000);
+ area->length = UINT64_C(0x100000000);
+ area->width = 8;
+
+ return URJTAG_STATUS_OK;
+}
+
+#ifndef USE_BCM_EJTAG
+
+static void
+setup_address( bus_t *bus, uint32_t a )
+{
+ int i;
+ part_t *p = PART;
+
+ for (i = 0; i < 24; i++) {
+ part_set_signal( p, IO_AD[i], 1, (a >> i) & 1 );
+ }
+}
+
+static void
+set_data_in( bus_t *bus )
+{
+ int i;
+ part_t *p = PART;
+
+ for (i = 0; i < 8; i++) {
+ part_set_signal( p, IO_AD[i+24], 0, 0 );
+ }
+}
+
+static void
+setup_data( bus_t *bus, uint32_t d )
+{
+ int i;
+ part_t *p = PART;
+
+ for (i = 0; i < 8; i++) {
+ part_set_signal( p, IO_AD[i+24], 1, (d >> i) & 1 );
+ }
+}
+
+/**
+ * bus->driver->(*read_start)
+ *
+ */
+static void
+bcm1250_bus_read_start( bus_t *bus, uint32_t adr )
+{
+ part_t *p = PART;
+ chain_t *chain = CHAIN;
+
+ part_set_signal( p, IO_CS_L[0], 1, 0 );
+ part_set_signal( p, IO_CS_L[1], 1, 1 );
+ part_set_signal( p, IO_CS_L[2], 1, 1 );
+ part_set_signal( p, IO_CS_L[3], 1, 1 );
+ part_set_signal( p, IO_CS_L[4], 1, 1 );
+ part_set_signal( p, IO_CS_L[5], 1, 1 );
+ part_set_signal( p, IO_CS_L[6], 1, 1 );
+ part_set_signal( p, IO_CS_L[7], 1, 1 );
+ part_set_signal( p, IO_RW, 1, 1 );
+ part_set_signal( p, IO_WR_L, 1, 1 );
+ part_set_signal( p, IO_OE_L, 1, 0 );
+
+ setup_address( bus, adr );
+ set_data_in( bus );
+
+ chain_shift_data_registers( chain, 0 );
+}
+
+/**
+ * bus->driver->(*read_next)
+ *
+ */
+static uint32_t
+bcm1250_bus_read_next( bus_t *bus , uint32_t adr )
+{
+ part_t *p = PART;
+ chain_t *chain = CHAIN;
+
+ setup_address( bus, adr );
+ chain_shift_data_registers( chain, 1 );
+
+ {
+ int i;
+ uint32_t d = 0;
+
+ for (i = 0; i < 8; i++) {
+ d |= (uint32_t) (part_get_signal( p, IO_AD[i+24] ) << i);
+ }
+
+ return d;
+ }
+}
+
+/**
+ * bus->driver->(*read_end)
+ *
+ */
+static uint32_t
+bcm1250_bus_read_end( bus_t *bus )
+{
+ part_t *p = PART;
+ chain_t *chain = CHAIN;
+
+ part_set_signal( p, IO_CS_L[0], 1, 1 );
+ part_set_signal( p, IO_OE_L, 1, 1 );
+ chain_shift_data_registers( chain, 1 );
+
+ {
+ int i;
+ uint32_t d = 0;
+
+ for (i = 0; i < 8; i++) {
+ d |= (uint32_t) (part_get_signal( p, IO_AD[i+24] ) << i);
+ }
+
+ return d;
+ }
+}
+
+/**
+ * bus->driver->(*write)
+ *
+ */
+static void
+bcm1250_bus_write( bus_t *bus, uint32_t adr, uint32_t data )
+{
+ part_t *p = PART;
+ chain_t *chain = CHAIN;
+
+ part_set_signal( p, IO_CS_L[0], 1, 0 );
+ part_set_signal( p, IO_CS_L[1], 1, 1 );
+ part_set_signal( p, IO_CS_L[2], 1, 1 );
+ part_set_signal( p, IO_CS_L[3], 1, 1 );
+ part_set_signal( p, IO_CS_L[4], 1, 1 );
+ part_set_signal( p, IO_CS_L[5], 1, 1 );
+ part_set_signal( p, IO_CS_L[6], 1, 1 );
+ part_set_signal( p, IO_CS_L[7], 1, 1 );
+ part_set_signal( p, IO_RW, 1, 0 );
+ part_set_signal( p, IO_WR_L, 1, 1 );
+ part_set_signal( p, IO_OE_L, 1, 1 );
+
+ setup_address( bus, adr );
+ setup_data( bus, data );
+
+ chain_shift_data_registers( chain, 0 );
+
+ part_set_signal( p, IO_WR_L, 1, 0 );
+ chain_shift_data_registers( chain, 0 );
+
+ part_set_signal( p, IO_WR_L, 1, 1 );
+ chain_shift_data_registers( chain, 0 );
+}
+
+#else /* #ifndef USE_BCM_EJTAG */
+
+int addr;
+uint64_t base = 0x1fc00000;
+
+static int
+bcm1250_ejtag_do(bus_t *bus, uint64_t ad, uint64_t da, int read, int type,
+ unsigned char *buf, int verbose) {
+
+ part_t *p = PART;
+ chain_t *chain = CHAIN;
+ char ctrl[15]="010000000000";
+ char addrr[80]="0000" "111" "000"
+ "11111111111111111111111111111111"
+ "00000000" "00011111" "11000000" "00000000" "000";
+ int j, k, n, m;
+ uint64_t a;
+
+ if(verbose)printf("BCM1250: ejtag_do(%08Lx, %08Lx, %i, %i)\n", ad, da, read, type);
+
+ a=ad>>5;
+ for(j=0;j<35;j++) {
+ addrr[76-j]='0'+(a&1);
+ a>>=1;
+ }
+
+ j=(1<<type)-1;
+ for(m=10; m<42; m++) addrr[m]='0';
+ n=ad&(~j&0x1f);
+ for(m=n; m<n+(1<<type); m++) addrr[m+10]='1';
+
+ ctrl[2]='0';
+ ctrl[3]='0';
+ part_set_instruction( p, "CONTROLL" );
+ chain_shift_instructions(chain);
+ j=strlen(ctrl);
+ k=0;
+ while(j>0){
+ j--;
+ p->active_instruction->data_register->in->data[j]=ctrl[k++]&1;
+ }
+ chain_shift_data_registers( chain, 1 );
+
+
+ if(read) {
+ addrr[7]='0';
+ addrr[8]='0';
+ addrr[9]='0';
+ } else {
+ addrr[7]='0';
+ addrr[8]='1';
+ addrr[9]='0';
+ }
+
+ part_set_instruction( p, "ADDR" );
+ chain_shift_instructions(chain);
+ j=strlen(addrr);
+ k=0;
+ while(j>0){
+ j--;
+ p->active_instruction->data_register->in->data[j]=addrr[k++]&1;
+ }
+ chain_shift_data_registers( chain, 0 );
+
+ if(!read) {
+ part_set_instruction( p, "DATA");
+ chain_shift_instructions(chain);
+ for(j=0;j<277;j++)
+ p->active_instruction->data_register->in->data[j]=j&1;
+ p->active_instruction->data_register->in->data[259]=1;
+ p->active_instruction->data_register->in->data[258]=0;
+ p->active_instruction->data_register->in->data[257]=0;
+ p->active_instruction->data_register->in->data[256]=1;
+ j=0;
+ if(type<5) {
+ k=256-(n+(1<<type))*8;
+ while(j<(8<<type)){
+ p->active_instruction->data_register->in->data[k+j]=da&1;
+ da>>=1;
+ j++;
+ }
+ } else {
+ int r;
+ for(r=0; r<32; r++) {
+ int s,t;
+ t=buf[r];
+ for(s=0;s<8;s++) {
+ p->active_instruction->data_register->in->data[248-r*8+s]=t&1;
+ t>>=1;
+ }
+ }
+ }
+ chain_shift_data_registers( chain, 0 );
+ }
+
+
+ ctrl[2]='1';
+ if(!read)ctrl[3]='1';
+ part_set_instruction( p, "CONTROLL" );
+ chain_shift_instructions(chain);
+ j=strlen(ctrl);
+ k=0;
+ while(j>0){
+ j--;
+ p->active_instruction->data_register->in->data[j]=ctrl[k++]&1;
+ }
+ chain_shift_data_registers( chain, 1 );
+ if(verbose || read) {
+ volatile int q;
+ int to;
+
+ to=5;
+ for(q=0;q<100;q++);
+ part_set_instruction( p, "DATA");
+ chain_shift_instructions(chain);
+ chain_shift_data_registers( chain, 1 );
+
+ while((p->active_instruction->data_register->out->data[276-17]==0) && to--) {
+ chain_shift_data_registers( chain, 1 );
+ }
+ for(j=n;j<n+(1<<type);j++) {
+ buf[j]=0;
+ for(m=0;m<8;m++) {
+ buf[j]<<=1;
+ buf[j]+=p->active_instruction->data_register->out->data[255-(j*8)-m]&1;
+ }
+ if(verbose)printf("%02x ",buf[j]);
+ }
+ if(verbose) {
+ printf("\n");
+
+ printf(" status:\n");
+ for(j=0;j<21;j++) {
+ printf("%c", '0'+p->active_instruction->data_register->out->data[276-j]);
+ if((j==5) || (j==11) || (j==12) || (j==16) || (j==17))printf(" ");
+ }
+ printf("\n");
+ }
+ }
+ return URJTAG_STATUS_OK;
+}
+
+/**
+ * bus->driver->(*read_start)
+ *
+ */
+static void
+bcm1250_bus_read_start(bus_t *bus, uint32_t adr )
+{
+ addr=adr;
+}
+
+/**
+ * bus->driver->(*read)
+ *
+ */
+static uint32_t
+bcm1250_bus_read(bus_t *bus, uint32_t adr )
+{
+ unsigned char buf[32];
+ bcm1250_ejtag_do(bus, adr+base, 0, 1, 0, buf, 0);
+ return buf[adr&0x1f];
+
+}
+
+/**
+ * bus->driver->(*read_next)
+ *
+ */
+static uint32_t
+bcm1250_bus_read_next(bus_t *bus, uint32_t adr )
+{
+ uint32_t t;
+ t=bcm1250_bus_read(bus, addr);
+ addr=adr;
+ return t;
+}
+
+/**
+ * bus->driver->(*read_end)
+ *
+ */
+static uint32_t bcm1250_bus_read_end(bus_t *bus)
+{
+ return bcm1250_bus_read(bus, addr);
+}
+
+/**
+ * bus->driver->(*write)
+ *
+ */
+static void
+bcm1250_bus_write( bus_t *bus, uint32_t adr, uint32_t data )
+{
+ unsigned char buf[32];
+ bcm1250_ejtag_do(bus, adr+base, data, 0, 0, buf, 0);
+}
+
+#endif /* #else #ifndef USE_BCM_EJTAG */
+
+const bus_driver_t bcm1250_bus = {
+ "bcm1250",
+ N_("Broadcom BCM1250 compatible bus driver via BSR"),
+ bcm1250_bus_new,
+ generic_bus_free,
+ bcm1250_bus_printinfo,
+ generic_bus_prepare_extest,
+ bcm1250_bus_area,
+ bcm1250_bus_read_start,
+ bcm1250_bus_read_next,
+ bcm1250_bus_read_end,
+#ifndef USE_BCM_EJTAG
+ generic_bus_read,
+#else
+ bcm1250_bus_read,
+#endif
+ bcm1250_bus_write,
+ generic_bus_no_init
+};
+
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2002 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Christian Pellegrin <chri@ascensit.com>, 2003.
+ * Modified by Marcel Telka <marcel@telka.sk>, 2003.
+ *
+ */
+
+#include "sysdep.h"
+
+#include <stdlib.h>
+#include <stdint.h>
+#include <string.h>
+
+#include "part.h"
+#include "bus.h"
+#include "chain.h"
+#include "bssignal.h"
+#include "jtag.h"
+#include "buses.h"
+#include "generic_bus.h"
+
+typedef struct {
+ signal_t *ams[4];
+ signal_t *addr[19];
+ signal_t *data[16];
+ signal_t *abe[2];
+ signal_t *awe;
+ signal_t *aoe;
+ signal_t *sras;
+ signal_t *scas;
+ signal_t *sms;
+ signal_t *swe;
+} bus_params_t;
+
+#define AMS ((bus_params_t *) bus->params)->ams
+#define ADDR ((bus_params_t *) bus->params)->addr
+#define DATA ((bus_params_t *) bus->params)->data
+#define AWE ((bus_params_t *) bus->params)->awe
+#define AOE ((bus_params_t *) bus->params)->aoe
+#define ABE ((bus_params_t *) bus->params)->abe
+#define SRAS ((bus_params_t *) bus->params)->sras
+#define SCAS ((bus_params_t *) bus->params)->scas
+#define SMS ((bus_params_t *) bus->params)->sms
+#define SWE ((bus_params_t *) bus->params)->swe
+
+/**
+ * bus->driver->(*new_bus)
+ *
+ */
+static bus_t *
+bf533_ezkit_bus_new( chain_t *chain, const bus_driver_t *driver, char *cmd_params[] )
+{
+ bus_t *bus;
+ part_t *part;
+ char buff[15];
+ int i;
+ int failed = 0;
+
+ bus = calloc( 1, sizeof (bus_t) );
+ if (!bus)
+ return NULL;
+
+ bus->driver = driver;
+ bus->params = calloc( 1, sizeof (bus_params_t) );
+ if (!bus->params) {
+ free( bus );
+ return NULL;
+ }
+
+ CHAIN = chain;
+ PART = part = chain->parts->parts[chain->active_part];
+
+ for (i = 0; i < 4; i++) {
+ sprintf( buff, "AMS_B%d", i );
+ failed |= generic_bus_attach_sig( part, &(AMS[i]), buff );
+ }
+
+ for (i = 0; i < 19; i++) {
+ sprintf( buff, "ADDR[%d]", i + 1);
+ failed |= generic_bus_attach_sig( part, &(ADDR[i]), buff );
+ }
+
+ for (i = 0; i < 16; i++) {
+ sprintf( buff, "DATA[%d]", i);
+ failed |= generic_bus_attach_sig( part, &(DATA[i]), buff );
+ }
+
+ failed |= generic_bus_attach_sig( part, &(AWE), "AWE_B" );
+
+ failed |= generic_bus_attach_sig( part, &(AOE), "AOE_B" );
+
+ failed |= generic_bus_attach_sig( part, &(ABE[0]), "ABE_B0" );
+
+ failed |= generic_bus_attach_sig( part, &(ABE[1]), "ABE_B1" );
+
+ failed |= generic_bus_attach_sig( part, &(SRAS), "SRAS_B" );
+
+ failed |= generic_bus_attach_sig( part, &(SCAS), "SCAS_B" );
+
+ failed |= generic_bus_attach_sig( part, &(SWE), "SWE_B" );
+
+ failed |= generic_bus_attach_sig( part, &(SMS), "SMS_B" );
+
+ if (failed) {
+ free( bus->params );
+ free( bus );
+ return NULL;
+ }
+
+ return bus;
+}
+
+/**
+ * bus->driver->(*printinfo)
+ *
+ */
+static void
+bf533_ezkit_bus_printinfo( bus_t *bus )
+{
+ int i;
+
+ for (i = 0; i < CHAIN->parts->len; i++)
+ if (PART == CHAIN->parts->parts[i])
+ break;
+ printf( _("Blackfin BF533 EZKit compatible bus driver via BSR (JTAG part No. %d)\n"), i );
+}
+
+/**
+ * bus->driver->(*area)
+ *
+ */
+static int
+bf533_ezkit_bus_area( bus_t *bus, uint32_t adr, bus_area_t *area )
+{
+ area->description = NULL;
+ area->start = UINT32_C(0x00000000);
+ area->length = UINT64_C(0x100000000);
+ area->width = 16;
+
+ return URJTAG_STATUS_OK;
+}
+
+static void
+select_flash( bus_t *bus )
+{
+ part_t *p = PART;
+
+ part_set_signal( p, AMS[0], 1, 0 );
+ part_set_signal( p, AMS[1], 1, 1 );
+ part_set_signal( p, AMS[2], 1, 1 );
+ part_set_signal( p, AMS[3], 1, 1 );
+
+ part_set_signal( p, ABE[0], 1, 0 );
+ part_set_signal( p, ABE[1], 1, 0 );
+
+ part_set_signal( p, SRAS, 1, 1 );
+ part_set_signal( p, SCAS, 1, 1 );
+ part_set_signal( p, SWE, 1, 1 );
+ part_set_signal( p, SMS, 1, 1 );
+}
+
+static void
+unselect_flash( bus_t *bus )
+{
+ part_t *p = PART;
+
+ part_set_signal( p, AMS[0], 1, 1 );
+ part_set_signal( p, AMS[1], 1, 1 );
+ part_set_signal( p, AMS[2], 1, 1 );
+ part_set_signal( p, AMS[3], 1, 1 );
+
+ part_set_signal( p, ABE[0], 1, 1 );
+ part_set_signal( p, ABE[1], 1, 1 );
+
+ part_set_signal( p, SRAS, 1, 1 );
+ part_set_signal( p, SCAS, 1, 1 );
+ part_set_signal( p, SWE, 1, 1 );
+ part_set_signal( p, SMS, 1, 1 );
+}
+
+static void
+setup_address( bus_t *bus, uint32_t a )
+{
+ int i;
+ part_t *p = PART;
+
+ for (i = 0; i < 19; i++)
+ part_set_signal( p, ADDR[i], 1, (a >> (i + 1)) & 1 );
+}
+
+static void
+set_data_in( bus_t *bus )
+{
+ int i;
+ part_t *p = PART;
+
+ for (i = 0; i < 16; i++)
+ part_set_signal( p, DATA[i], 0, 0 );
+}
+
+static void
+setup_data( bus_t *bus, uint32_t d )
+{
+ int i;
+ part_t *p = PART;
+
+ for (i = 0; i < 16; i++)
+ part_set_signal( p, DATA[i], 1, (d >> i) & 1 );
+
+}
+
+/**
+ * bus->driver->(*read_start)
+ *
+ */
+static void
+bf533_ezkit_bus_read_start( bus_t *bus, uint32_t adr )
+{
+ part_t *p = PART;
+ chain_t *chain = CHAIN;
+
+ select_flash( bus );
+ part_set_signal( p, AOE, 1, 0 );
+ part_set_signal( p, AWE, 1, 1 );
+
+ setup_address( bus, adr );
+ set_data_in( bus );
+
+ chain_shift_data_registers( chain, 0 );
+}
+
+/**
+ * bus->driver->(*read_next)
+ *
+ */
+static uint32_t
+bf533_ezkit_bus_read_next( bus_t *bus, uint32_t adr )
+{
+ part_t *p = PART;
+ chain_t *chain = CHAIN;
+ int i;
+ uint32_t d = 0;
+
+ setup_address( bus, adr );
+ chain_shift_data_registers( chain, 1 );
+
+ for (i = 0; i < 16; i++)
+ d |= (uint32_t) (part_get_signal( p, DATA[i] ) << i);
+
+ return d;
+}
+
+/**
+ * bus->driver->(*read_end)
+ *
+ */
+static uint32_t
+bf533_ezkit_bus_read_end( bus_t *bus )
+{
+ part_t *p = PART;
+ chain_t *chain = CHAIN;
+ int i;
+ uint32_t d = 0;
+
+ unselect_flash( bus );
+ part_set_signal( p, AOE, 1, 1 );
+ part_set_signal( p, AWE, 1, 1 );
+
+ chain_shift_data_registers( chain, 1 );
+
+ for (i = 0; i < 16; i++)
+ d |= (uint32_t) (part_get_signal( p, DATA[i] ) << i);
+
+ return d;
+}
+
+/**
+ * bus->driver->(*write)
+ *
+ */
+static void
+bf533_ezkit_bus_write( bus_t *bus, uint32_t adr, uint32_t data )
+{
+ part_t *p = PART;
+ chain_t *chain = CHAIN;
+
+// printf("Writing %04X to %08X...\n", data, adr);
+
+ select_flash( bus );
+ part_set_signal( p, AOE, 1, 1 );
+
+ setup_address( bus, adr );
+ setup_data( bus, data );
+
+ chain_shift_data_registers( chain, 0 );
+
+ part_set_signal( p, AWE, 1, 0 );
+ chain_shift_data_registers( chain, 0 );
+ part_set_signal( p, AWE, 1, 1 );
+ unselect_flash( bus );
+ chain_shift_data_registers( chain, 0 );
+}
+
+const bus_driver_t bf533_ezkit_bus = {
+ "bf533_ezkit",
+ N_("Blackfin BF533 EZKit board bus driver"),
+ bf533_ezkit_bus_new,
+ generic_bus_free,
+ bf533_ezkit_bus_printinfo,
+ generic_bus_prepare_extest,
+ bf533_ezkit_bus_area,
+ bf533_ezkit_bus_read_start,
+ bf533_ezkit_bus_read_next,
+ bf533_ezkit_bus_read_end,
+ generic_bus_read,
+ bf533_ezkit_bus_write,
+ generic_bus_no_init
+};
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2002 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Christian Pellegrin <chri@ascensit.com>, 2003.
+ * Modified by Marcel Telka <marcel@telka.sk>, 2003.
+ *
+ */
+
+#include "sysdep.h"
+
+#include <stdlib.h>
+#include <stdint.h>
+#include <string.h>
+
+#include "part.h"
+#include "bus.h"
+#include "chain.h"
+#include "bssignal.h"
+#include "jtag.h"
+#include "buses.h"
+#include "generic_bus.h"
+
+typedef struct {
+ signal_t *ams[4];
+ signal_t *addr[19];
+ signal_t *data[16];
+ signal_t *pf[2];
+ signal_t *awe;
+ signal_t *are;
+ signal_t *aoe;
+ signal_t *sras;
+ signal_t *scas;
+ signal_t *sms;
+ signal_t *swe;
+} bus_params_t;
+
+#define AMS ((bus_params_t *) bus->params)->ams
+#define ADDR ((bus_params_t *) bus->params)->addr
+#define DATA ((bus_params_t *) bus->params)->data
+#define PF ((bus_params_t *) bus->params)->pf
+#define AWE ((bus_params_t *) bus->params)->awe
+#define ARE ((bus_params_t *) bus->params)->are
+#define AOE ((bus_params_t *) bus->params)->aoe
+#define SRAS ((bus_params_t *) bus->params)->sras
+#define SCAS ((bus_params_t *) bus->params)->scas
+#define SMS ((bus_params_t *) bus->params)->sms
+#define SWE ((bus_params_t *) bus->params)->swe
+
+/**
+ * bus->driver->(*new_bus)
+ *
+ */
+static bus_t *
+bf533_stamp_bus_new( chain_t *chain, const bus_driver_t *driver, char *cmd_params[] )
+{
+ bus_t *bus;
+ part_t *part;
+ char buff[15];
+ int i;
+ int failed = 0;
+
+ bus = calloc( 1, sizeof (bus_t) );
+ if (!bus)
+ return NULL;
+
+ bus->driver = driver;
+ bus->params = calloc( 1, sizeof (bus_params_t) );
+ if (!bus->params) {
+ free( bus );
+ return NULL;
+ }
+
+ CHAIN = chain;
+ PART = part = chain->parts->parts[chain->active_part];
+
+ for (i = 0; i < 2; i++) {
+ sprintf( buff, "PF%d", i );
+ failed |= generic_bus_attach_sig( part, &(PF[i]), buff );
+ }
+
+ for (i = 0; i < 4; i++) {
+ sprintf( buff, "AMS_B%d", i );
+ failed |= generic_bus_attach_sig( part, &(AMS[i]), buff );
+ }
+
+ for (i = 0; i < 19; i++) {
+ sprintf( buff, "ADDR[%d]", i + 1);
+ failed |= generic_bus_attach_sig( part, &(ADDR[i]), buff );
+ }
+
+ for (i = 0; i < 16; i++) {
+ sprintf( buff, "DATA[%d]", i);
+ failed |= generic_bus_attach_sig( part, &(DATA[i]), buff );
+ }
+
+ failed |= generic_bus_attach_sig( part, &(AWE), "AWE_B" );
+
+ failed |= generic_bus_attach_sig( part, &(ARE), "ARE_B" );
+
+ failed |= generic_bus_attach_sig( part, &(AOE), "AOE_B" );
+
+ failed |= generic_bus_attach_sig( part, &(SRAS), "SRAS_B" );
+
+ failed |= generic_bus_attach_sig( part, &(SCAS), "SCAS_B" );
+
+ failed |= generic_bus_attach_sig( part, &(SWE), "SWE_B" );
+
+ failed |= generic_bus_attach_sig( part, &(SMS), "SMS_B" );
+
+ if (failed) {
+ free( bus->params );
+ free( bus );
+ return NULL;
+ }
+
+ return bus;
+}
+
+/**
+ * bus->driver->(*printinfo)
+ *
+ */
+static void
+bf533_stamp_bus_printinfo( bus_t *bus )
+{
+ int i;
+
+ for (i = 0; i < CHAIN->parts->len; i++)
+ if (PART == CHAIN->parts->parts[i])
+ break;
+ printf( _("Blackfin BF533 compatible bus driver via BSR (JTAG part No. %d)\n"), i );
+}
+
+/**
+ * bus->driver->(*area)
+ *
+ */
+static int
+bf533_stamp_bus_area( bus_t *bus, uint32_t adr, bus_area_t *area )
+{
+ area->description = NULL;
+ area->start = UINT32_C(0x00000000);
+ area->length = UINT64_C(0x100000000);
+ area->width = 16;
+
+ return URJTAG_STATUS_OK;
+}
+
+static void
+select_flash( bus_t *bus )
+{
+ part_t *p = PART;
+
+ part_set_signal( p, PF[0], 1, 0 );
+ part_set_signal( p, PF[1], 1, 0 );
+
+ part_set_signal( p, AMS[0], 1, 0 );
+ part_set_signal( p, AMS[1], 1, 1 );
+ part_set_signal( p, AMS[2], 1, 1 );
+ part_set_signal( p, AMS[3], 1, 1 );
+
+ part_set_signal( p, SRAS, 1, 1 );
+ part_set_signal( p, SCAS, 1, 1 );
+ part_set_signal( p, SWE, 1, 1 );
+ part_set_signal( p, SMS, 1, 1 );
+}
+
+static void
+unselect_flash( bus_t *bus )
+{
+ part_t *p = PART;
+
+ part_set_signal( p, PF[0], 1, 0 );
+ part_set_signal( p, PF[1], 1, 0 );
+
+ part_set_signal( p, AMS[0], 1, 1 );
+ part_set_signal( p, AMS[1], 1, 1 );
+ part_set_signal( p, AMS[2], 1, 1 );
+ part_set_signal( p, AMS[3], 1, 1 );
+
+ part_set_signal( p, SRAS, 1, 1 );
+ part_set_signal( p, SCAS, 1, 1 );
+ part_set_signal( p, SWE, 1, 1 );
+ part_set_signal( p, SMS, 1, 1 );
+}
+
+static void
+setup_address( bus_t *bus, uint32_t a )
+{
+ int i;
+ part_t *p = PART;
+
+ for (i = 0; i < 19; i++)
+ part_set_signal( p, ADDR[i], 1, (a >> (i + 1)) & 1 );
+}
+
+static void
+set_data_in( bus_t *bus )
+{
+ int i;
+ part_t *p = PART;
+
+ for (i = 0; i < 16; i++)
+ part_set_signal( p, DATA[i], 0, 0 );
+}
+
+static void
+setup_data( bus_t *bus, uint32_t d )
+{
+ int i;
+ part_t *p = PART;
+
+ for (i = 0; i < 16; i++)
+ part_set_signal( p, DATA[i], 1, (d >> i) & 1 );
+
+}
+
+/**
+ * bus->driver->(*read_start)
+ *
+ */
+static void
+bf533_stamp_bus_read_start( bus_t *bus, uint32_t adr )
+{
+ part_t *p = PART;
+ chain_t *chain = CHAIN;
+
+ select_flash( bus );
+ part_set_signal( p, AOE, 1, 0 );
+ part_set_signal( p, ARE, 1, 0 );
+ part_set_signal( p, AWE, 1, 1 );
+
+ setup_address( bus, adr );
+ set_data_in( bus );
+
+ chain_shift_data_registers( chain, 0 );
+}
+
+/**
+ * bus->driver->(*read_next)
+ *
+ */
+static uint32_t
+bf533_stamp_bus_read_next( bus_t *bus, uint32_t adr )
+{
+ part_t *p = PART;
+ chain_t *chain = CHAIN;
+ int i;
+ uint32_t d = 0;
+
+ setup_address( bus, adr );
+ chain_shift_data_registers( chain, 1 );
+
+ for (i = 0; i < 16; i++)
+ d |= (uint32_t) (part_get_signal( p, DATA[i] ) << i);
+
+ return d;
+}
+
+/**
+ * bus->driver->(*read_end)
+ *
+ */
+static uint32_t
+bf533_stamp_bus_read_end( bus_t *bus )
+{
+ part_t *p = PART;
+ chain_t *chain = CHAIN;
+ int i;
+ uint32_t d = 0;
+
+ unselect_flash( bus );
+ part_set_signal( p, AOE, 1, 1 );
+ part_set_signal( p, ARE, 1, 1 );
+ part_set_signal( p, AWE, 1, 1 );
+
+ chain_shift_data_registers( chain, 1 );
+
+ for (i = 0; i < 16; i++)
+ d |= (uint32_t) (part_get_signal( p, DATA[i] ) << i);
+
+ return d;
+}
+
+/**
+ * bus->driver->(*write)
+ *
+ */
+static void
+bf533_stamp_bus_write( bus_t *bus, uint32_t adr, uint32_t data )
+{
+ part_t *p = PART;
+ chain_t *chain = CHAIN;
+
+// printf("Writing %04X to %08X...\n", data, adr);
+
+ select_flash( bus );
+ part_set_signal( p, ARE, 1, 1 );
+
+ setup_address( bus, adr );
+ setup_data( bus, data );
+
+ chain_shift_data_registers( chain, 0 );
+
+ part_set_signal( p, AWE, 1, 0 );
+ chain_shift_data_registers( chain, 0 );
+ part_set_signal( p, AWE, 1, 1 );
+ unselect_flash( bus );
+ chain_shift_data_registers( chain, 0 );
+}
+
+const bus_driver_t bf533_stamp_bus = {
+ "bf533_stamp",
+ N_("Blackfin BF533 Stamp board bus driver"),
+ bf533_stamp_bus_new,
+ generic_bus_free,
+ bf533_stamp_bus_printinfo,
+ generic_bus_prepare_extest,
+ bf533_stamp_bus_area,
+ bf533_stamp_bus_read_start,
+ bf533_stamp_bus_read_next,
+ bf533_stamp_bus_read_end,
+ generic_bus_read,
+ bf533_stamp_bus_write,
+ generic_bus_no_init
+};
--- /dev/null
+/*
+ * $Id$
+ *
+ * Analog Devices ADSP-BF537 STAMP/EZ-KIT Lite bus driver
+ * Copyright (C) 2008 Analog Devices, Inc.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Jie Zhang <jie.zhang@analog.com>, 2008.
+ *
+ */
+
+#include "sysdep.h"
+
+#include <stdlib.h>
+#include <stdint.h>
+#include <string.h>
+
+#include "part.h"
+#include "bus.h"
+#include "chain.h"
+#include "bssignal.h"
+#include "jtag.h"
+#include "buses.h"
+#include "generic_bus.h"
+
+typedef struct {
+ signal_t *ams[4];
+ signal_t *addr[19];
+ signal_t *data[16];
+ signal_t *abe[2];
+ signal_t *awe;
+ signal_t *are;
+ signal_t *sras;
+ signal_t *scas;
+ signal_t *sms;
+ signal_t *swe;
+} bus_params_t;
+
+#define AMS ((bus_params_t *) bus->params)->ams
+#define ADDR ((bus_params_t *) bus->params)->addr
+#define DATA ((bus_params_t *) bus->params)->data
+#define AWE ((bus_params_t *) bus->params)->awe
+#define ARE ((bus_params_t *) bus->params)->are
+#define ABE ((bus_params_t *) bus->params)->abe
+#define SRAS ((bus_params_t *) bus->params)->sras
+#define SCAS ((bus_params_t *) bus->params)->scas
+#define SMS ((bus_params_t *) bus->params)->sms
+#define SWE ((bus_params_t *) bus->params)->swe
+
+/*
+ * bus->driver->(*new_bus)
+ *
+ */
+static bus_t *
+bf537_stamp_bus_new( chain_t *chain, const bus_driver_t *driver, char *cmd_params[] )
+{
+ bus_t *bus;
+ part_t *part;
+ char buff[15];
+ int i;
+ int failed = 0;
+
+ bus = calloc( 1, sizeof (bus_t) );
+ if (!bus)
+ return NULL;
+
+ bus->driver = driver;
+ bus->params = calloc( 1, sizeof (bus_params_t) );
+ if (!bus->params) {
+ free( bus );
+ return NULL;
+ }
+
+ CHAIN = chain;
+ PART = part = chain->parts->parts[chain->active_part];
+
+ for (i = 0; i < 4; i++) {
+ sprintf( buff, "AMS_B%d", i );
+ failed |= generic_bus_attach_sig( part, &(AMS[i]), buff );
+ }
+
+ for (i = 0; i < 19; i++) {
+ sprintf( buff, "ADDR%d", i + 1);
+ failed |= generic_bus_attach_sig( part, &(ADDR[i]), buff );
+ }
+
+ for (i = 0; i < 16; i++) {
+ sprintf( buff, "DATA%d", i);
+ failed |= generic_bus_attach_sig( part, &(DATA[i]), buff );
+ }
+
+ failed |= generic_bus_attach_sig( part, &(AWE), "AWE_B" );
+
+ failed |= generic_bus_attach_sig( part, &(ARE), "ARE_B" );
+
+ failed |= generic_bus_attach_sig( part, &(ABE[0]), "ABE_B0" );
+
+ failed |= generic_bus_attach_sig( part, &(ABE[1]), "ABE_B1" );
+
+ failed |= generic_bus_attach_sig( part, &(SRAS), "SRAS_B" );
+
+ failed |= generic_bus_attach_sig( part, &(SCAS), "SCAS_B" );
+
+ failed |= generic_bus_attach_sig( part, &(SWE), "SWE_B" );
+
+ failed |= generic_bus_attach_sig( part, &(SMS), "SMS_B" );
+
+ if (failed) {
+ free( bus->params );
+ free( bus );
+ return NULL;
+ }
+
+ return bus;
+}
+
+/**
+ * bus->driver->(*area)
+ *
+ */
+static int
+bf537_stamp_bus_area( bus_t *bus, uint32_t adr, bus_area_t *area )
+{
+ area->description = NULL;
+ area->start = UINT32_C(0x00000000);
+ area->length = UINT64_C(0x100000000);
+ area->width = 16;
+
+ return URJTAG_STATUS_OK;
+}
+
+static void
+select_flash( bus_t *bus )
+{
+ part_t *p = PART;
+
+ part_set_signal( p, AMS[0], 1, 0 );
+ part_set_signal( p, AMS[1], 1, 1 );
+ part_set_signal( p, AMS[2], 1, 1 );
+ part_set_signal( p, AMS[3], 1, 1 );
+
+ part_set_signal( p, ABE[0], 1, 0 );
+ part_set_signal( p, ABE[1], 1, 0 );
+
+ part_set_signal( p, SRAS, 1, 1 );
+ part_set_signal( p, SCAS, 1, 1 );
+ part_set_signal( p, SWE, 1, 1 );
+ part_set_signal( p, SMS, 1, 1 );
+}
+
+static void
+unselect_flash( bus_t *bus )
+{
+ part_t *p = PART;
+
+ part_set_signal( p, AMS[0], 1, 1 );
+ part_set_signal( p, AMS[1], 1, 1 );
+ part_set_signal( p, AMS[2], 1, 1 );
+ part_set_signal( p, AMS[3], 1, 1 );
+
+ part_set_signal( p, ABE[0], 1, 1 );
+ part_set_signal( p, ABE[1], 1, 1 );
+
+ part_set_signal( p, SRAS, 1, 1 );
+ part_set_signal( p, SCAS, 1, 1 );
+ part_set_signal( p, SWE, 1, 1 );
+ part_set_signal( p, SMS, 1, 1 );
+}
+
+static void
+setup_address( bus_t *bus, uint32_t a )
+{
+ int i;
+ part_t *p = PART;
+
+ for (i = 0; i < 19; i++)
+ part_set_signal( p, ADDR[i], 1, (a >> (i + 1)) & 1 );
+}
+
+static void
+set_data_in( bus_t *bus )
+{
+ int i;
+ part_t *p = PART;
+
+ for (i = 0; i < 16; i++)
+ part_set_signal( p, DATA[i], 0, 0 );
+}
+
+static void
+setup_data( bus_t *bus, uint32_t d )
+{
+ int i;
+ part_t *p = PART;
+
+ for (i = 0; i < 16; i++)
+ part_set_signal( p, DATA[i], 1, (d >> i) & 1 );
+
+}
+
+/**
+ * bus->driver->(*read_start)
+ *
+ */
+static void
+bf537_stamp_bus_read_start( bus_t *bus, uint32_t adr )
+{
+ part_t *p = PART;
+ chain_t *chain = CHAIN;
+
+ select_flash( bus );
+ part_set_signal( p, ARE, 1, 0 );
+ part_set_signal( p, AWE, 1, 1 );
+
+ setup_address( bus, adr );
+ set_data_in( bus );
+
+ chain_shift_data_registers( chain, 0 );
+}
+
+/**
+ * bus->driver->(*read_next)
+ *
+ */
+static uint32_t
+bf537_stamp_bus_read_next( bus_t *bus, uint32_t adr )
+{
+ part_t *p = PART;
+ chain_t *chain = CHAIN;
+ int i;
+ uint32_t d = 0;
+
+ setup_address( bus, adr );
+ chain_shift_data_registers( chain, 1 );
+
+ for (i = 0; i < 16; i++)
+ d |= (uint32_t) (part_get_signal( p, DATA[i] ) << i);
+
+ return d;
+}
+
+/**
+ * bus->driver->(*read_end)
+ *
+ */
+static uint32_t
+bf537_stamp_bus_read_end( bus_t *bus )
+{
+ part_t *p = PART;
+ chain_t *chain = CHAIN;
+ int i;
+ uint32_t d = 0;
+
+ unselect_flash( bus );
+ part_set_signal( p, ARE, 1, 1 );
+ part_set_signal( p, AWE, 1, 1 );
+
+ chain_shift_data_registers( chain, 1 );
+
+ for (i = 0; i < 16; i++)
+ d |= (uint32_t) (part_get_signal( p, DATA[i] ) << i);
+
+ return d;
+}
+
+/**
+ * bus->driver->(*write)
+ *
+ */
+static void
+bf537_stamp_bus_write( bus_t *bus, uint32_t adr, uint32_t data )
+{
+ part_t *p = PART;
+ chain_t *chain = CHAIN;
+
+ select_flash( bus );
+ part_set_signal( p, ARE, 1, 1 );
+
+ setup_address( bus, adr );
+ setup_data( bus, data );
+
+ chain_shift_data_registers( chain, 0 );
+
+ part_set_signal( p, AWE, 1, 0 );
+ chain_shift_data_registers( chain, 0 );
+ part_set_signal( p, AWE, 1, 1 );
+ unselect_flash( bus );
+ chain_shift_data_registers( chain, 0 );
+}
+
+/**
+ * bus->driver->(*printinfo)
+ *
+ */
+static void
+bf537_stamp_bus_printinfo( bus_t *bus )
+{
+ int i;
+
+ for (i = 0; i < CHAIN->parts->len; i++)
+ if (PART == CHAIN->parts->parts[i])
+ break;
+ printf( _("%s (JTAG part No. %d)\n"), bus->driver->description, i );
+}
+
+#define BF537_STAMP_BUS_FUNCTIONS \
+ bf537_stamp_bus_new, \
+ generic_bus_free, \
+ bf537_stamp_bus_printinfo, \
+ generic_bus_prepare_extest, \
+ bf537_stamp_bus_area, \
+ bf537_stamp_bus_read_start, \
+ bf537_stamp_bus_read_next, \
+ bf537_stamp_bus_read_end, \
+ generic_bus_read, \
+ bf537_stamp_bus_write, \
+ generic_bus_no_init
+
+#ifdef ENABLE_BUS_BF537_STAMP
+
+const bus_driver_t bf537_stamp_bus = {
+ "bf537_stamp",
+ N_("Blackfin BF537 Stamp board bus driver via BSR"),
+ BF537_STAMP_BUS_FUNCTIONS
+};
+
+#endif /* #ifdef ENABLE_BUS_BF537_STAMP */
+
+#ifdef ENABLE_BUS_BF537_EZKIT
+
+const bus_driver_t bf537_ezkit_bus = {
+ "bf537_ezkit",
+ N_("Blackfin BF537 EZ-KIT board bus driver via BSR"),
+ BF537_STAMP_BUS_FUNCTIONS
+};
+
+#endif /* #ifdef ENABLE_BUS_BF537_EZKIT */
+
+#ifdef ENABLE_BUS_BF527_EZKIT
+
+const bus_driver_t bf527_ezkit_bus = {
+ "bf527_ezkit",
+ N_("Blackfin BF527 EZ-KIT board bus driver via BSR"),
+ BF537_STAMP_BUS_FUNCTIONS
+};
+
+#endif /* #ifdef ENABLE_BUS_BF527_EZKIT */
+
+#ifdef ENABLE_BUS_BF538F_EZKIT
+
+const bus_driver_t bf538f_ezkit_bus = {
+ "bf538f_ezkit",
+ N_("Blackfin BF538F EZ-KIT board bus driver"),
+ BF537_STAMP_BUS_FUNCTIONS
+};
+
+#endif /* #ifdef ENABLE_BUS_BF538F_EZKIT */
+
+#ifdef ENABLE_BUS_BF526_EZKIT
+
+const bus_driver_t bf526_ezkit_bus = {
+ "bf526_ezkit",
+ N_("Blackfin BF526 EZ-KIT board bus driver"),
+ BF537_STAMP_BUS_FUNCTIONS
+};
+
+#endif /* #ifdef ENABLE_BUS_BF526_EZKIT */
--- /dev/null
+/*
+ * $Id$
+ *
+ * Analog Devices ADSP-BF548 EZ-KIT Lite bus driver
+ * Copyright (C) 2008 Analog Devices, Inc.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Jie Zhang <jie.zhang@analog.com>, 2008.
+ */
+
+#include "sysdep.h"
+
+#include <stdlib.h>
+#include <stdint.h>
+#include <string.h>
+
+#include "part.h"
+#include "bus.h"
+#include "chain.h"
+#include "bssignal.h"
+#include "jtag.h"
+#include "buses.h"
+#include "generic_bus.h"
+
+typedef struct {
+ signal_t *ams[4];
+ signal_t *addr[24];
+ signal_t *data[16];
+ signal_t *awe;
+ signal_t *are;
+ signal_t *aoe;
+ signal_t *dcs0;
+ signal_t *nce;
+} bus_params_t;
+
+#define AMS ((bus_params_t *) bus->params)->ams
+#define ADDR ((bus_params_t *) bus->params)->addr
+#define DATA ((bus_params_t *) bus->params)->data
+#define AOE ((bus_params_t *) bus->params)->aoe
+#define AWE ((bus_params_t *) bus->params)->awe
+#define ARE ((bus_params_t *) bus->params)->are
+#define DCS0 ((bus_params_t *) bus->params)->dcs0
+#define NCE ((bus_params_t *) bus->params)->nce
+
+/**
+ * bus->driver->(*new_bus)
+ *
+ */
+static bus_t *
+bf548_ezkit_bus_new( chain_t *chain, const bus_driver_t *driver, char *cmd_params[] )
+{
+ bus_t *bus;
+ part_t *part;
+ char buff[15];
+ int i;
+ int failed = 0;
+
+ bus = calloc( 1, sizeof (bus_t) );
+ if (!bus)
+ return NULL;
+
+ bus->driver = driver;
+ bus->params = calloc( 1, sizeof (bus_params_t) );
+ if (!bus->params) {
+ free( bus );
+ return NULL;
+ }
+
+ CHAIN = chain;
+ PART = part = chain->parts->parts[chain->active_part];
+
+ for (i = 0; i < 4; i++) {
+ sprintf( buff, "AMS%dB", i );
+ failed |= generic_bus_attach_sig( part, &(AMS[i]), buff );
+ }
+
+ for (i = 0; i < 3; i++) {
+ sprintf( buff, "ADDR%d", i + 1);
+ failed |= generic_bus_attach_sig( part, &(ADDR[i]), buff );
+ }
+
+ for (i = 3; i < 9; i++) {
+ sprintf( buff, "PORTH_%d", i + 5);
+ failed |= generic_bus_attach_sig( part, &(ADDR[i]), buff );
+ }
+
+ for (i = 9; i < 24; i++) {
+ sprintf( buff, "PORTI_%d", i - 9);
+ failed |= generic_bus_attach_sig( part, &(ADDR[i]), buff );
+ }
+
+ for (i = 0; i < 16; i++) {
+ sprintf( buff, "DATA%d", i);
+ failed |= generic_bus_attach_sig( part, &(DATA[i]), buff );
+ }
+
+ failed |= generic_bus_attach_sig( part, &(AWE), "AWEB" );
+
+ failed |= generic_bus_attach_sig( part, &(ARE), "AREB" );
+
+ failed |= generic_bus_attach_sig( part, &(AOE), "AOEB" );
+
+ failed |= generic_bus_attach_sig( part, &(DCS0), "CS0_B" );
+
+ failed |= generic_bus_attach_sig( part, &(NCE), "PORTJ_1" );
+
+ if (failed) {
+ free( bus->params );
+ free( bus );
+ return NULL;
+ }
+
+ return bus;
+}
+
+/**
+ * bus->driver->(*printinfo)
+ *
+ */
+static void
+bf548_ezkit_bus_printinfo( bus_t *bus )
+{
+ int i;
+
+ for (i = 0; i < CHAIN->parts->len; i++)
+ if (PART == CHAIN->parts->parts[i])
+ break;
+ printf( _("Blackfin BF548 EZ-KIT compatible bus driver via BSR (JTAG part No. %d)\n"), i );
+}
+
+/**
+ * bus->driver->(*area)
+ *
+ */
+static int
+bf548_ezkit_bus_area( bus_t *bus, uint32_t adr, bus_area_t *area )
+{
+ area->description = NULL;
+ area->start = UINT32_C(0x00000000);
+ area->length = UINT64_C(0x100000000);
+ area->width = 16;
+
+ return URJTAG_STATUS_OK;
+}
+
+static void
+select_flash( bus_t *bus )
+{
+ part_t *p = PART;
+
+ part_set_signal( p, AMS[0], 1, 0 );
+ part_set_signal( p, AMS[1], 1, 1 );
+ part_set_signal( p, AMS[2], 1, 1 );
+ part_set_signal( p, AMS[3], 1, 1 );
+ part_set_signal( p, DCS0, 1, 1 );
+ part_set_signal( p, NCE, 1, 1 );
+}
+
+static void
+unselect_flash( bus_t *bus )
+{
+ part_t *p = PART;
+
+ part_set_signal( p, AMS[0], 1, 1 );
+ part_set_signal( p, AMS[1], 1, 1 );
+ part_set_signal( p, AMS[2], 1, 1 );
+ part_set_signal( p, AMS[3], 1, 1 );
+ part_set_signal( p, DCS0, 1, 1 );
+ part_set_signal( p, NCE, 1, 1 );
+}
+
+static void
+setup_address( bus_t *bus, uint32_t a )
+{
+ int i;
+ part_t *p = PART;
+
+ for (i = 0; i < 24; i++)
+ part_set_signal( p, ADDR[i], 1, (a >> (i + 1)) & 1 );
+}
+
+static void
+set_data_in( bus_t *bus )
+{
+ int i;
+ part_t *p = PART;
+
+ for (i = 0; i < 16; i++)
+ part_set_signal( p, DATA[i], 0, 0 );
+}
+
+static void
+setup_data( bus_t *bus, uint32_t d )
+{
+ int i;
+ part_t *p = PART;
+
+ for (i = 0; i < 16; i++)
+ part_set_signal( p, DATA[i], 1, (d >> i) & 1 );
+
+}
+
+/**
+ * bus->driver->(*read_start)
+ *
+ */
+static void
+bf548_ezkit_bus_read_start( bus_t *bus, uint32_t adr )
+{
+ part_t *p = PART;
+ chain_t *chain = CHAIN;
+
+ select_flash( bus );
+ part_set_signal( p, AOE, 1, 0 );
+ part_set_signal( p, ARE, 1, 0 );
+ part_set_signal( p, AWE, 1, 1 );
+
+ setup_address( bus, adr );
+ set_data_in( bus );
+
+ chain_shift_data_registers( chain, 0 );
+}
+
+/**
+ * bus->driver->(*read_next)
+ *
+ */
+static uint32_t
+bf548_ezkit_bus_read_next( bus_t *bus, uint32_t adr )
+{
+ part_t *p = PART;
+ chain_t *chain = CHAIN;
+ int i;
+ uint32_t d = 0;
+
+ setup_address( bus, adr );
+ chain_shift_data_registers( chain, 1 );
+
+ for (i = 0; i < 16; i++)
+ d |= (uint32_t) (part_get_signal( p, DATA[i] ) << i);
+
+ return d;
+}
+
+/**
+ * bus->driver->(*read_end)
+ *
+ */
+static uint32_t
+bf548_ezkit_bus_read_end( bus_t *bus )
+{
+ part_t *p = PART;
+ chain_t *chain = CHAIN;
+ int i;
+ uint32_t d = 0;
+
+ part_set_signal( p, AOE, 1, 1 );
+ part_set_signal( p, ARE, 1, 1 );
+ part_set_signal( p, AWE, 1, 1 );
+ unselect_flash( bus );
+
+ chain_shift_data_registers( chain, 1 );
+
+ for (i = 0; i < 16; i++)
+ d |= (uint32_t) (part_get_signal( p, DATA[i] ) << i);
+
+ return d;
+}
+
+/**
+ * bus->driver->(*write)
+ *
+ */
+static void
+bf548_ezkit_bus_write( bus_t *bus, uint32_t adr, uint32_t data )
+{
+ part_t *p = PART;
+ chain_t *chain = CHAIN;
+
+ select_flash( bus );
+ part_set_signal( p, AOE, 1, 0 );
+ part_set_signal( p, ARE, 1, 1 );
+
+ setup_address( bus, adr );
+ setup_data( bus, data );
+
+ chain_shift_data_registers( chain, 0 );
+
+ part_set_signal( p, AWE, 1, 0 );
+ chain_shift_data_registers( chain, 0 );
+ part_set_signal( p, AWE, 1, 1 );
+ part_set_signal( p, AOE, 1, 1 );
+ unselect_flash( bus );
+ chain_shift_data_registers( chain, 0 );
+}
+
+const bus_driver_t bf548_ezkit_bus = {
+ "bf548_ezkit",
+ N_("Blackfin BF548 EZ-KIT board bus driver"),
+ bf548_ezkit_bus_new,
+ generic_bus_free,
+ bf548_ezkit_bus_printinfo,
+ generic_bus_prepare_extest,
+ bf548_ezkit_bus_area,
+ bf548_ezkit_bus_read_start,
+ bf548_ezkit_bus_read_next,
+ bf548_ezkit_bus_read_end,
+ generic_bus_read,
+ bf548_ezkit_bus_write,
+ generic_bus_no_init
+};
--- /dev/null
+/*
+ * $Id$
+ *
+ * Analog Devices ADSP-BF561 EZ-KIT Lite bus driver
+ * Copyright (C) 2008 Analog Devices, Inc.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Jie Zhang <jie.zhang@analog.com>, 2008.
+ *
+ */
+
+#include "sysdep.h"
+
+#include <stdlib.h>
+#include <stdint.h>
+#include <string.h>
+
+#include "part.h"
+#include "bus.h"
+#include "chain.h"
+#include "bssignal.h"
+#include "jtag.h"
+#include "buses.h"
+#include "generic_bus.h"
+
+typedef struct {
+ signal_t *ams[4];
+ signal_t *addr[24];
+ signal_t *abe[4];
+ signal_t *data[32];
+ signal_t *awe;
+ signal_t *aoe;
+ signal_t *sras;
+ signal_t *scas;
+ signal_t *sms[4];
+ signal_t *swe;
+} bus_params_t;
+
+#define AMS ((bus_params_t *) bus->params)->ams
+#define ADDR ((bus_params_t *) bus->params)->addr
+#define ABE ((bus_params_t *) bus->params)->abe
+#define DATA ((bus_params_t *) bus->params)->data
+#define AWE ((bus_params_t *) bus->params)->awe
+#define AOE ((bus_params_t *) bus->params)->aoe
+#define SRAS ((bus_params_t *) bus->params)->sras
+#define SCAS ((bus_params_t *) bus->params)->scas
+#define SMS ((bus_params_t *) bus->params)->sms
+#define SWE ((bus_params_t *) bus->params)->swe
+
+/**
+ * bus->driver->(*new_bus)
+ *
+ */
+static bus_t *
+bf561_ezkit_bus_new( chain_t *chain, const bus_driver_t *driver, char *cmd_params[] )
+{
+ bus_t *bus;
+ part_t *part;
+ char buff[15];
+ int i;
+ int failed = 0;
+
+ bus = calloc( 1, sizeof (bus_t) );
+ if (!bus)
+ return NULL;
+
+ bus->driver = driver;
+ bus->params = calloc( 1, sizeof (bus_params_t) );
+ if (!bus->params) {
+ free( bus );
+ return NULL;
+ }
+
+ CHAIN = chain;
+ PART = part = chain->parts->parts[chain->active_part];
+
+ for (i = 0; i < 4; i++) {
+ sprintf( buff, "AMS_B%d", i );
+ failed |= generic_bus_attach_sig( part, &(AMS[i]), buff );
+ }
+
+ for (i = 0; i < 24; i++) {
+ sprintf( buff, "ADDR%d", i + 2);
+ failed |= generic_bus_attach_sig( part, &(ADDR[i]), buff );
+ }
+
+ for (i = 0; i < 4; i++) {
+ sprintf( buff, "ABE_B%d", i);
+ failed |= generic_bus_attach_sig( part, &(ABE[i]), buff );
+ }
+
+ for (i = 0; i < 32; i++) {
+ sprintf( buff, "DATA%d", i);
+ failed |= generic_bus_attach_sig( part, &(DATA[i]), buff );
+ }
+
+ failed |= generic_bus_attach_sig( part, &(AWE), "AWE_B" );
+
+ failed |= generic_bus_attach_sig( part, &(AOE), "AOE_B" );
+
+ failed |= generic_bus_attach_sig( part, &(SRAS), "SRAS_B" );
+
+ failed |= generic_bus_attach_sig( part, &(SCAS), "SCAS_B" );
+
+ failed |= generic_bus_attach_sig( part, &(SWE), "SWE_B" );
+
+ for (i = 0; i < 4; i++) {
+ sprintf( buff, "SMS_B%d", i );
+ failed |= generic_bus_attach_sig( part, &(SMS[i]), buff );
+ }
+
+ if (failed) {
+ free( bus->params );
+ free( bus );
+ return NULL;
+ }
+
+ return bus;
+}
+
+/**
+ * bus->driver->(*printinfo)
+ *
+ */
+static void
+bf561_ezkit_bus_printinfo( bus_t *bus )
+{
+ int i;
+
+ for (i = 0; i < CHAIN->parts->len; i++)
+ if (PART == CHAIN->parts->parts[i])
+ break;
+ printf( _("Blackfin BF561 EZ-KIT compatible bus driver via BSR (JTAG part No. %d)\n"), i );
+}
+
+/**
+ * bus->driver->(*area)
+ *
+ */
+static int
+bf561_ezkit_bus_area( bus_t *bus, uint32_t addr, bus_area_t *area )
+{
+ area->description = NULL;
+ area->start = UINT32_C(0x00000000);
+ area->length = UINT64_C(0x100000000);
+ area->width = 16;
+ return URJTAG_STATUS_OK;
+}
+
+static void
+select_flash( bus_t *bus )
+{
+ part_t *p = PART;
+
+ part_set_signal( p, AMS[0], 1, 0 );
+ part_set_signal( p, AMS[1], 1, 1 );
+ part_set_signal( p, AMS[2], 1, 1 );
+ part_set_signal( p, AMS[3], 1, 1 );
+
+ part_set_signal( p, ABE[0], 1, 0 );
+ part_set_signal( p, ABE[1], 1, 0 );
+ part_set_signal( p, ABE[2], 1, 0 );
+ part_set_signal( p, ABE[3], 1, 0 );
+
+ part_set_signal( p, SRAS, 1, 1 );
+ part_set_signal( p, SCAS, 1, 1 );
+ part_set_signal( p, SWE, 1, 1 );
+ part_set_signal( p, SMS[0], 1, 1 );
+ part_set_signal( p, SMS[1], 1, 1 );
+ part_set_signal( p, SMS[2], 1, 1 );
+ part_set_signal( p, SMS[3], 1, 1 );
+}
+
+static void
+unselect_flash( bus_t *bus )
+{
+ part_t *p = PART;
+
+ part_set_signal( p, AMS[0], 1, 1 );
+ part_set_signal( p, AMS[1], 1, 1 );
+ part_set_signal( p, AMS[2], 1, 1 );
+ part_set_signal( p, AMS[3], 1, 1 );
+
+ part_set_signal( p, ABE[0], 1, 1 );
+ part_set_signal( p, ABE[1], 1, 1 );
+ part_set_signal( p, ABE[2], 1, 1 );
+ part_set_signal( p, ABE[3], 1, 1 );
+
+ part_set_signal( p, SRAS, 1, 1 );
+ part_set_signal( p, SCAS, 1, 1 );
+ part_set_signal( p, SWE, 1, 1 );
+ part_set_signal( p, SMS[0], 1, 1 );
+ part_set_signal( p, SMS[1], 1, 1 );
+ part_set_signal( p, SMS[2], 1, 1 );
+ part_set_signal( p, SMS[3], 1, 1 );
+}
+
+static void
+setup_address( bus_t *bus, uint32_t a )
+{
+ int i;
+ part_t *p = PART;
+
+ for (i = 0; i < 24; i++)
+ part_set_signal( p, ADDR[i], 1, (a >> (i + 2)) & 1 );
+ part_set_signal( p, ABE[3], 1, (a >> 1) & 1 );
+}
+
+static void
+set_data_in( bus_t *bus )
+{
+ int i;
+ part_t *p = PART;
+
+ for (i = 0; i < 16; i++)
+ part_set_signal( p, DATA[i], 0, 0 );
+}
+
+static void
+setup_data( bus_t *bus, uint32_t d )
+{
+ int i;
+ part_t *p = PART;
+
+ for (i = 0; i < 16; i++)
+ part_set_signal( p, DATA[i], 1, (d >> i) & 1 );
+
+}
+
+/**
+ * bus->driver->(*read_start)
+ *
+ */
+static void
+bf561_ezkit_bus_read_start( bus_t *bus, uint32_t adr )
+{
+ part_t *p = PART;
+ chain_t *chain = CHAIN;
+
+ select_flash( bus );
+ part_set_signal( p, AOE, 1, 0 );
+ part_set_signal( p, AWE, 1, 1 );
+
+ setup_address( bus, adr );
+ set_data_in( bus );
+
+ chain_shift_data_registers( chain, 0 );
+}
+
+/**
+ * bus->driver->(*read_next)
+ *
+ */
+static uint32_t
+bf561_ezkit_bus_read_next( bus_t *bus, uint32_t adr )
+{
+ part_t *p = PART;
+ chain_t *chain = CHAIN;
+ int i;
+ uint32_t d = 0;
+
+ setup_address( bus, adr );
+ chain_shift_data_registers( chain, 1 );
+
+ for (i = 0; i < 16; i++)
+ d |= (uint32_t) (part_get_signal( p, DATA[i] ) << i);
+
+ return d;
+}
+
+/**
+ * bus->driver->(*read_end)
+ *
+ */
+static uint32_t
+bf561_ezkit_bus_read_end( bus_t *bus )
+{
+ part_t *p = PART;
+ chain_t *chain = CHAIN;
+ int i;
+ uint32_t d = 0;
+
+ unselect_flash( bus );
+ part_set_signal( p, AOE, 1, 1 );
+ part_set_signal( p, AWE, 1, 1 );
+
+ chain_shift_data_registers( chain, 1 );
+
+ for (i = 0; i < 16; i++)
+ d |= (uint32_t) (part_get_signal( p, DATA[i] ) << i);
+
+ return d;
+}
+
+/**
+ * bus->driver->(*write)
+ *
+ */
+static void
+bf561_ezkit_bus_write( bus_t *bus, uint32_t adr, uint32_t data )
+{
+ part_t *p = PART;
+ chain_t *chain = CHAIN;
+
+ select_flash( bus );
+ part_set_signal( p, AOE, 1, 1 );
+
+ setup_address( bus, adr );
+ setup_data( bus, data );
+
+ chain_shift_data_registers( chain, 0 );
+
+ part_set_signal( p, AWE, 1, 0 );
+ chain_shift_data_registers( chain, 0 );
+ part_set_signal( p, AWE, 1, 1 );
+ unselect_flash( bus );
+ chain_shift_data_registers( chain, 0 );
+}
+
+const bus_driver_t bf561_ezkit_bus = {
+ "bf561_ezkit",
+ N_("Blackfin BF561 EZ-KIT board bus driver"),
+ bf561_ezkit_bus_new,
+ generic_bus_free,
+ bf561_ezkit_bus_printinfo,
+ generic_bus_prepare_extest,
+ bf561_ezkit_bus_area,
+ bf561_ezkit_bus_read_start,
+ bf561_ezkit_bus_read_next,
+ bf561_ezkit_bus_read_end,
+ generic_bus_read,
+ bf561_ezkit_bus_write,
+ generic_bus_no_init
+};
--- /dev/null
+/*
+ * $Id$
+ *
+ * Busdriver for flashaccess on the Goepel "Boundary Scan Coach" training board
+ * www.goepel.com
+ * The flash has 1Mbit but only 15 address lines are connected.
+ * So only 4Kbit can be accessed.
+ * Erfurt, Oct. 10th M. Schneider www.masla.de
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ */
+
+#include "sysdep.h"
+
+#include <stdlib.h>
+#include <stdint.h>
+#include <string.h>
+
+#include "part.h"
+#include "bus.h"
+#include "chain.h"
+#include "bssignal.h"
+#include "jtag.h"
+#include "buses.h"
+#include "generic_bus.h"
+#include "state.h"
+
+
+typedef struct{
+ uint32_t last_adr;
+ signal_t *adr[15];
+ signal_t *d[8];
+ signal_t *deca;
+ signal_t *decb;
+ signal_t *decc;
+ signal_t *we_f;
+ signal_t *oe_f;
+} bus_params_t;
+
+#define LAST_ADR ((bus_params_t *) bus->params)->last_adr
+#define ADR ((bus_params_t *) bus->params)->adr
+#define D ((bus_params_t *) bus->params)->d
+#define DECA ((bus_params_t *) bus->params)->deca
+#define DECB ((bus_params_t *) bus->params)->decb
+#define DECC ((bus_params_t *) bus->params)->decc
+#define WE_F ((bus_params_t *) bus->params)->we_f
+#define OE_F ((bus_params_t *) bus->params)->oe_f
+
+
+/**
+ * bus->driver->(*new_bus)
+ *
+ */
+static bus_t *
+flashbscoach_bus_new( chain_t *chain, const bus_driver_t *driver, char *cmd_params[] )
+{
+ bus_t *bus;
+ part_t *part;
+ int failed = 0;
+
+ bus = calloc( 1, sizeof (bus_t) );
+ if (!bus)
+ return NULL;
+
+ bus->driver = driver;
+ bus->params = calloc( 1, sizeof (bus_params_t) );
+ if (!bus->params) {
+ free( bus );\
+ return NULL;
+ }
+
+ CHAIN = chain;
+ PART = part = chain->parts->parts[chain->active_part];
+ //OE & WE
+ failed |= generic_bus_attach_sig( part, &(OE_F), "PB02_00" );
+ failed |= generic_bus_attach_sig( part, &(WE_F), "PB02_08" );
+ //Decoder
+ failed |= generic_bus_attach_sig( part, &(DECA), "PB02_04" );
+ failed |= generic_bus_attach_sig( part, &(DECB), "PB00_12" );
+ failed |= generic_bus_attach_sig( part, &(DECC), "PB02_07" );
+ //Adressbus
+ failed |= generic_bus_attach_sig( part, &(ADR[0]), "PB01_09" );
+ failed |= generic_bus_attach_sig( part, &(ADR[1]), "PB01_06" );
+ failed |= generic_bus_attach_sig( part, &(ADR[2]), "PB01_10" );
+ failed |= generic_bus_attach_sig( part, &(ADR[3]), "PB01_11" );
+ failed |= generic_bus_attach_sig( part, &(ADR[4]), "PB01_12" );
+ failed |= generic_bus_attach_sig( part, &(ADR[5]), "PB01_13" );
+ failed |= generic_bus_attach_sig( part, &(ADR[6]), "PB01_15" );
+ failed |= generic_bus_attach_sig( part, &(ADR[7]), "PB01_14" );
+ failed |= generic_bus_attach_sig( part, &(ADR[8]), "PB01_16" );
+ failed |= generic_bus_attach_sig( part, &(ADR[9]), "PB00_01" );
+ failed |= generic_bus_attach_sig( part, &(ADR[10]), "PB00_04" );
+ failed |= generic_bus_attach_sig( part, &(ADR[11]), "PB00_05" );
+ failed |= generic_bus_attach_sig( part, &(ADR[12]), "PB00_00" );
+ failed |= generic_bus_attach_sig( part, &(ADR[13]), "PB00_07" );
+ failed |= generic_bus_attach_sig( part, &(ADR[14]), "PB00_02" );
+ //Datenbus
+ failed |= generic_bus_attach_sig( part, &(D[0]), "PB00_10" );
+ failed |= generic_bus_attach_sig( part, &(D[1]), "PB00_06" );
+ failed |= generic_bus_attach_sig( part, &(D[2]), "PB00_13" );
+ failed |= generic_bus_attach_sig( part, &(D[3]), "PB00_09" );
+ failed |= generic_bus_attach_sig( part, &(D[4]), "PB00_14" );
+ failed |= generic_bus_attach_sig( part, &(D[5]), "PB00_16" );
+ failed |= generic_bus_attach_sig( part, &(D[6]), "PB02_01" );
+ failed |= generic_bus_attach_sig( part, &(D[7]), "PB00_11" );
+
+
+
+
+ if (failed) {
+ free( bus->params );
+ free ( bus );
+ return NULL;
+ }
+
+
+ return bus;
+}
+
+/**
+ * bus->driver->(*printinfo)
+ *
+ */
+static void
+flashbscoach_bus_printinfo( bus_t *bus )
+{
+ int i;
+
+ for (i = 0; i < CHAIN->parts->len; i++)
+ if (PART == CHAIN->parts->parts[i])
+ break;
+ printf( _("Goepel electronic Boundary Scan Coach compatible bus driver via BSR (JTAG part No. %d)\n"), i );
+}
+
+
+
+
+
+
+
+/**
+ * bus->driver->(*init)
+ *
+ */
+static int
+flashbscoach_bus_init( bus_t *bus )
+{
+ part_t *p = PART;
+ chain_t *chain = CHAIN;
+ int i=0;
+
+ if (tap_state(chain) != Run_Test_Idle) {
+ /* silently skip initialization if TAP isn't in RUNTEST/IDLE state
+ this is required to avoid interfering with detect when initbus
+ is contained in the part description file
+ bus_init() will be called latest by bus_prepare() */
+ return URJTAG_STATUS_OK;
+ }
+
+
+ part_set_instruction( p, "SAMPLE/PRELOAD" );
+ chain_shift_instructions( chain );
+
+ part_set_signal( p, DECA, 1, 1 );
+ part_set_signal( p, DECB, 1, 1 );
+ part_set_signal( p, DECC, 1, 1 );
+ part_set_signal( p, OE_F, 1, 1 ); //OE_F low aktiv
+ part_set_signal( p, WE_F, 1, 1 ); //WE_F low aktiv
+
+ for(i = 0; i < 15; i++)
+ part_set_signal( p, ADR[i], 1, 1);
+
+ part_set_signal( p, D[0], 1, 0 );
+ part_set_signal( p, D[1], 1, 0 );
+ part_set_signal( p, D[2], 1, 0 );
+ part_set_signal( p, D[3], 1, 0 );
+ part_set_signal( p, D[4], 1, 0 );
+ part_set_signal( p, D[5], 1, 0 );
+ part_set_signal( p, D[6], 1, 0 );
+ part_set_signal( p, D[7], 1, 0 );
+
+ chain_shift_data_registers( chain, 0 );
+
+ INITIALIZED = 1;
+
+ return URJTAG_STATUS_OK;
+}
+
+
+/**
+ * bus->driver->(*area)
+ *
+ */
+static int
+flashbscoach_bus_area( bus_t *bus, uint32_t adr, bus_area_t *area )
+{
+ area->description = NULL;
+ area->start = UINT32_C(0x00000000);
+ area->length = UINT64_C(0x00100000000);
+ area->width = 8;
+// area->width = part_get_signal( PART, part_find_signal( PART, "ROMSIZ" ) ) ? 16 : 32;
+
+
+ return 0;
+
+
+}
+static void
+setup_data( bus_t *bus, uint32_t d )
+{
+ int i;
+ part_t *p = PART;
+ bus_area_t area;
+
+ flashbscoach_bus_area( bus, 0, &area);
+
+
+
+ for (i = 0; i < area.width; i++)
+ part_set_signal( p, D[i], 1, (d >> i) & 1 );
+}
+
+static void
+set_data_in( bus_t *bus )
+{
+
+ part_t *p = PART;
+ bus_area_t area;
+
+ flashbscoach_bus_area( bus, 0, &area);
+
+ part_set_signal( p, D[0], 0, 0 );
+ part_set_signal( p, D[1], 0, 0 );
+ part_set_signal( p, D[2], 0, 0 );
+ part_set_signal( p, D[3], 0, 0 );
+ part_set_signal( p, D[4], 0, 0 );
+ part_set_signal( p, D[5], 0, 0 );
+ part_set_signal( p, D[6], 0, 0 );
+ part_set_signal( p, D[7], 0, 0 );
+}
+static void
+setup_address( bus_t *bus, uint32_t a)
+{
+ int i;
+ part_t *p = PART;
+
+ for( i = 0; i < 15; i++)
+ part_set_signal( p, ADR[i], 1, (a >>i) & 1);
+}
+static uint32_t
+get_data_out( bus_t *bus )
+{
+ int i;
+ part_t *p = PART;
+ bus_area_t area;
+ uint32_t d = 0;
+
+ flashbscoach_bus_area( bus, 0, &area);
+
+ for( i = 0; i < area.width; i++ )
+ d |= (uint32_t)(part_get_signal( p, D[i] ) << i);
+
+ return d;
+}
+/**
+ * bus->driver->(*read_start)
+ *
+ */
+static void
+flashbscoach_bus_read_start( bus_t *bus, uint32_t adr )
+{
+ part_t *p = PART;
+ chain_t *chain = CHAIN;
+
+ LAST_ADR = adr;
+
+ part_set_signal( p, DECA, 1, 0 );
+ part_set_signal( p, DECB, 1, 1 );
+ part_set_signal( p, DECC, 1, 1 );
+ part_set_signal( p, OE_F, 1, 0 ); //OE_F low aktiv
+ part_set_signal( p, WE_F, 1, 1); //WE_F low aktiv
+
+ setup_address( bus, adr);
+ set_data_in( bus );
+
+ chain_shift_data_registers( chain, 0 );
+
+}
+
+/**
+ * bus->driver->(*read_next)
+ *
+ */
+static uint32_t
+flashbscoach_bus_read_next( bus_t *bus, uint32_t adr )
+{
+// part_t *p = PART;
+ chain_t *chain = CHAIN;
+
+
+ setup_address( bus, adr );
+ chain_shift_data_registers( chain, 1 );
+
+// d = get_data_out( bus );
+// LAST_ADR = adr;
+ return get_data_out( bus );
+
+}
+
+/**
+ * bus->driver->(*read_end)
+ *
+ */
+static uint32_t
+flashbscoach_bus_read_end( bus_t *bus )
+{
+ part_t *p = PART;
+ chain_t *chain = CHAIN;
+
+
+
+ part_set_signal( p, DECA, 1, 1 );
+ part_set_signal( p, DECB, 1, 1 );
+ part_set_signal( p, DECC, 1, 1 );
+ part_set_signal( p, OE_F, 1, 1 ); //OE_F low aktiv
+ part_set_signal( p, WE_F, 1, 1 ); //WE_F low aktiv
+
+ chain_shift_data_registers( chain, 1 );
+
+ return get_data_out( bus );
+
+}
+
+/**
+ * bus->driver->(*write)
+ *
+ */
+static void
+flashbscoach_bus_write( bus_t *bus, uint32_t adr, uint32_t data )
+{
+ part_t *p = PART;
+ chain_t *chain = CHAIN;
+ part_set_signal( p, DECA, 1, 0 );
+ part_set_signal( p, DECB, 1, 1 );
+ part_set_signal( p, DECC, 1, 1 );
+ part_set_signal( p, OE_F, 1, 1 ); //OE_F low aktiv
+ part_set_signal( p, WE_F, 1, 1); //WE_F low aktiv
+
+ setup_address( bus, adr );
+ setup_data( bus, data );
+
+ chain_shift_data_registers( chain, 0 );
+
+ part_set_signal( p, WE_F, 1, 0);
+ chain_shift_data_registers( chain, 0 );
+
+ part_set_signal( p, DECA, 1, 1 );
+ part_set_signal( p, DECB, 1, 1 );
+ part_set_signal( p, DECC, 1, 1 );
+ part_set_signal( p, OE_F, 1, 1 ); //OE_F low aktiv
+ part_set_signal( p, WE_F, 1, 1); //WE_F low aktiv
+
+ chain_shift_data_registers( chain, 0);
+}
+
+const bus_driver_t bscoach_bus = {
+ "flashbscoach",
+ N_("Goepel Boundary Scan Coach compatible bus driver for flash programming via BSR"),
+ flashbscoach_bus_new,
+ generic_bus_free,
+ flashbscoach_bus_printinfo,
+ generic_bus_prepare_extest,
+ flashbscoach_bus_area,
+ flashbscoach_bus_read_start,
+ flashbscoach_bus_read_next,
+ flashbscoach_bus_read_end,
+ generic_bus_read,
+ flashbscoach_bus_write,
+ flashbscoach_bus_init
+};
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2003 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2003.
+ *
+ */
+
+#include "sysdep.h"
+
+#include <stdlib.h>
+
+#include "bus.h"
+#include "buses.h"
+
+const bus_driver_t *bus_drivers[] = {
+#ifdef ENABLE_BUS_AU1500
+ &au1500_bus,
+#endif
+#ifdef ENABLE_BUS_AVR32
+ &avr32_bus_driver,
+#endif
+#ifdef ENABLE_BUS_BCM1250
+ &bcm1250_bus,
+#endif
+#ifdef ENABLE_BUS_BF526_EZKIT
+ &bf526_ezkit_bus,
+#endif
+#ifdef ENABLE_BUS_BF527_EZKIT
+ &bf527_ezkit_bus,
+#endif
+#ifdef ENABLE_BUS_BF533_STAMP
+ &bf533_stamp_bus,
+#endif
+#ifdef ENABLE_BUS_BF533_EZKIT
+ &bf533_ezkit_bus,
+#endif
+#ifdef ENABLE_BUS_BF537_STAMP
+ &bf537_stamp_bus,
+#endif
+#ifdef ENABLE_BUS_BF537_EZKIT
+ &bf537_ezkit_bus,
+#endif
+#ifdef ENABLE_BUS_BF538F_EZKIT
+ &bf538f_ezkit_bus,
+#endif
+#ifdef ENABLE_BUS_BF548_EZKIT
+ &bf548_ezkit_bus,
+#endif
+#ifdef ENABLE_BUS_BF561_EZKIT
+ &bf561_ezkit_bus,
+#endif
+#ifdef ENABLE_BUS_BSCOACH
+ &bscoach_bus,
+#endif
+#ifdef ENABLE_BUS_EJTAG
+ &ejtag_bus,
+ &ejtag_dma_bus,
+#endif
+#ifdef ENABLE_BUS_FJMEM
+ &fjmem_bus,
+#endif
+#ifdef ENABLE_BUS_IXP425
+ &ixp425_bus,
+#endif
+#ifdef ENABLE_BUS_JOPCYC
+ &jopcyc_bus,
+#endif
+#ifdef ENABLE_BUS_H7202
+ &h7202_bus,
+#endif
+#ifdef ENABLE_BUS_LH7A400
+ &lh7a400_bus,
+#endif
+#ifdef ENABLE_BUS_MPC5200
+ &mpc5200_bus,
+#endif
+#ifdef ENABLE_BUS_MPC824X
+ &mpc824x_bus,
+#endif
+#ifdef ENABLE_BUS_PPC405EP
+ &ppc405ep_bus,
+#endif
+#ifdef ENABLE_BUS_PPC440GX_EBC8
+ &ppc440gx_ebc8_bus,
+#endif
+#ifdef ENABLE_BUS_PROTOTYPE
+ &prototype_bus,
+#endif
+#ifdef ENABLE_BUS_PXA2X0
+ &pxa2x0_bus,
+#endif
+#ifdef ENABLE_BUS_PXA27X
+ &pxa27x_bus,
+#endif
+#ifdef ENABLE_BUS_S3C4510
+ &s3c4510_bus,
+#endif
+#ifdef ENABLE_BUS_SA1110
+ &sa1110_bus,
+#endif
+#ifdef ENABLE_BUS_SH7727
+ &sh7727_bus,
+#endif
+#ifdef ENABLE_BUS_SH7750R
+ &sh7750r_bus,
+#endif
+#ifdef ENABLE_BUS_SH7751R
+ &sh7751r_bus,
+#endif
+#ifdef ENABLE_BUS_SHARC_21065L
+ &sharc_21065L_bus,
+#endif
+#ifdef ENABLE_BUS_SLSUP3
+ &slsup3_bus,
+#endif
+#ifdef ENABLE_BUS_TX4925
+ &tx4925_bus,
+#endif
+#ifdef ENABLE_BUS_ZEFANT_XS3
+ &zefant_xs3_bus,
+#endif
+ NULL /* last must be NULL */
+};
+
+bus_t *bus = NULL;
+buses_t buses = {0, NULL};
+
+void buses_free( void )
+{
+ int i;
+
+ for (i = 0; i < buses.len; i++)
+ bus_free( buses.buses[i] );
+
+ free( buses.buses );
+ buses.len = 0;
+ buses.buses = NULL;
+ bus = NULL;
+}
+
+void buses_add( bus_t *abus )
+{
+ bus_t **b;
+
+ if (abus == NULL)
+ return;
+
+ b = realloc( buses.buses, (buses.len + 1) * sizeof (bus_t *) );
+ if (b == NULL) {
+ printf( _("Out of memory\n") );
+ return;
+ }
+ buses.buses = b;
+ buses.buses[buses.len++] = abus;
+ if (bus == NULL)
+ bus = abus;
+}
+
+void buses_delete( bus_t *abus )
+{
+ int i;
+ bus_t **b;
+
+ for (i = 0; i < buses.len; i++)
+ if (abus == buses.buses[i])
+ break;
+ if (i >= buses.len)
+ return;
+
+ while (i + 1 < buses.len) {
+ buses.buses[i] = buses.buses[i + 1];
+ i++;
+ }
+ buses.len--;
+ b = realloc( buses.buses, buses.len * sizeof (bus_t *) );
+ if ((b != NULL) || (buses.len == 0))
+ buses.buses = b;
+
+ if (bus != abus)
+ return;
+
+ if (buses.len > 0)
+ bus = buses.buses[0];
+}
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2003 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2003.
+ *
+ */
+
+#ifndef BUSES_H
+#define BUSES_H
+
+extern const bus_driver_t au1500_bus;
+extern const bus_driver_t avr32_bus_driver;
+extern const bus_driver_t bcm1250_bus;
+extern const bus_driver_t bf526_ezkit_bus;
+extern const bus_driver_t bf527_ezkit_bus;
+extern const bus_driver_t bf533_stamp_bus;
+extern const bus_driver_t bf533_ezkit_bus;
+extern const bus_driver_t bf537_stamp_bus;
+extern const bus_driver_t bf537_ezkit_bus;
+extern const bus_driver_t bf538f_ezkit_bus;
+extern const bus_driver_t bf548_ezkit_bus;
+extern const bus_driver_t bf561_ezkit_bus;
+extern const bus_driver_t bscoach_bus;
+extern const bus_driver_t ejtag_bus;
+extern const bus_driver_t fjmem_bus;
+extern const bus_driver_t h7202_bus;
+extern const bus_driver_t ixp425_bus;
+extern const bus_driver_t jopcyc_bus;
+extern const bus_driver_t lh7a400_bus;
+extern const bus_driver_t mpc5200_bus;
+extern const bus_driver_t mpc824x_bus;
+extern const bus_driver_t ppc405ep_bus;
+extern const bus_driver_t ppc440gx_ebc8_bus;
+extern const bus_driver_t prototype_bus;
+extern const bus_driver_t pxa2x0_bus;
+extern const bus_driver_t pxa27x_bus;
+extern const bus_driver_t s3c4510_bus;
+extern const bus_driver_t sa1110_bus;
+extern const bus_driver_t sh7727_bus;
+extern const bus_driver_t sh7750r_bus;
+extern const bus_driver_t sh7751r_bus;
+extern const bus_driver_t sharc_21065L_bus;
+extern const bus_driver_t slsup3_bus;
+extern const bus_driver_t tx4925_bus;
+extern const bus_driver_t zefant_xs3_bus;
+extern const bus_driver_t ejtag_dma_bus;
+#endif /* BUSES_H */
--- /dev/null
+/*
+ * $Id$
+ *
+ * EJTAG compatible bus driver via PrAcc
+ * Copyright (C) 2005, Marek Michalkiewicz
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marek Michalkiewicz <marekm@amelek.gda.pl>, 2005.
+ *
+ * Documentation:
+ * [1] MIPS Licensees, "MIPS EJTAG Debug Solution", 980818 Rev. 2.0.0
+ * [2] MIPS Technologies, Inc. "EJTAG Specification", 2001-02-15, Rev. 2.60
+ *
+ */
+
+#include "sysdep.h"
+
+#include <stdlib.h>
+#include <stdint.h>
+#include <string.h>
+
+#include "part.h"
+#include "bus.h"
+#include "chain.h"
+#include "bssignal.h"
+#include "jtag.h"
+#include "buses.h"
+#include "generic_bus.h"
+#include "state.h"
+
+typedef struct {
+ uint32_t impcode; /* EJTAG Implementation Register */
+ uint16_t adr_hi; /* cached high bits of $3 */
+} bus_params_t;
+
+#define BP ((bus_params_t *) bus->params)
+
+#define EJTAG_VER ((BP->impcode >> 29) & 7)
+
+#define EJTAG_20 0
+#define EJTAG_25 1
+#define EJTAG_26 2
+#define EJTAG_31 3
+
+/* EJTAG 3.1 Control Register Bits */
+#define VPED 23 /* R */
+/* EJTAG 2.6 Control Register Bits */
+#define Rocc 31 /* R/W0 */
+#define Psz1 30 /* R */
+#define Psz0 29 /* R */
+#define Doze 22 /* R */
+#define ProbTrap 14 /* R/W */
+#define DebugMode 3 /* R */
+/* EJTAG 1.5.3 Control Register Bits */
+#define Dnm 28 /* */
+#define Sync 23 /* R/W */
+#define Run 21 /* R */
+#define PerRst 20 /* R/W */
+#define PRnW 19 /* R 0 = Read, 1 = Write */
+#define PrAcc 18 /* R/W0 */
+#define DmaAcc 17 /* R/W */
+#define PrRst 16 /* R/W */
+#define ProbEn 15 /* R/W */
+#define SetDev 14 /* R */
+#define JtagBrk 12 /* R/W1 */
+#define DStrt 11 /* R/W1 */
+#define DeRR 10 /* R */
+#define DrWn 9 /* R/W */
+#define Dsz1 8 /* R/W */
+#define Dsz0 7 /* R/W */
+#define DLock 5 /* R/W */
+#define BrkSt 3 /* R */
+#define TIF 2 /* W0/R */
+#define TOF 1 /* W0/R */
+#define ClkEn 0 /* R/W */
+
+/* EJTAG 3.1 Debug Control Register at drseg 0xFF300000 */
+#define PCS 9 /* R */
+#define PCR2 8 /* R/W */
+#define PCR1 7 /* R/W */
+#define PCR0 6 /* R/W */
+/* EJTAG 2.X Debug Control Register at drseg 0xFF300000 */
+#define DataBrk 17 /* R */
+#define InstBrk 16 /* R */
+#define NMIPend 2 /* R */
+#define SRstE 1 /* R/W */
+#define DCRProbeEn 0 /* R */
+/* EJTAG 1.5.3 Debug Control Register at drseg 0xFF300000*/
+#define HIS 30 /* R */
+#define ENM 29 /* R 0=Little End,1=Big Endian */
+#define MIntE 4 /* R/W */
+#define MNmiE 3 /* R/W */
+#define MemProt 2 /* R/W 0=WriteOK,1=Protected */
+#define MRst 1 /* R/W */
+#define TraceMode 0 /* R/W */
+
+/**
+ * bus->driver->(*new_bus)
+ *
+ */
+static bus_t *
+ejtag_bus_new( chain_t *chain, const bus_driver_t *driver, char *cmd_params[] )
+{
+ bus_t *bus;
+
+ bus = calloc( 1, sizeof (bus_t) );
+ if (!bus)
+ return NULL;
+
+ bus->driver = driver;
+ bus->params = calloc( 1, sizeof (bus_params_t) );
+ if (!bus->params) {
+ free( bus );
+ return NULL;
+ }
+
+ CHAIN = chain;
+ PART = chain->parts->parts[chain->active_part];
+
+ return bus;
+}
+
+/**
+ * bus->driver->(*printinfo)
+ *
+ */
+static void
+ejtag_bus_printinfo( bus_t *bus )
+{
+ int i;
+
+ for (i = 0; i < CHAIN->parts->len; i++)
+ if (PART == CHAIN->parts->parts[i])
+ break;
+ printf( _("EJTAG compatible bus driver via PrAcc (JTAG part No. %d)\n"), i );
+}
+
+static uint32_t
+reg_value( tap_register *reg )
+{
+ uint32_t retval = 0;
+ int i;
+
+ for (i = 0; i < reg->len; i++) {
+ if (reg->data[i])
+ retval |= (1 << i);
+ }
+ return retval;
+}
+
+static uint32_t
+ejtag_run_pracc( bus_t *bus, const uint32_t *code, unsigned int len )
+{
+ data_register *ejaddr, *ejdata, *ejctrl;
+ int i, pass;
+ uint32_t addr, data, retval;
+
+ ejaddr = part_find_data_register( PART, "EJADDRESS" );
+ ejdata = part_find_data_register( PART, "EJDATA" );
+ ejctrl = part_find_data_register( PART, "EJCONTROL" );
+ if (!(ejaddr && ejdata && ejctrl)) {
+ printf( _("%s(%d) EJADDRESS, EJDATA or EJCONTROL register not found\n"),
+ __FILE__, __LINE__ );
+ return 0;
+ }
+
+ part_set_instruction( PART, "EJTAG_CONTROL" );
+ chain_shift_instructions( CHAIN );
+
+ pass = 0;
+ retval = 0;
+
+ for (;;) {
+ ejctrl->in->data[PrAcc] = 1;
+ chain_shift_data_registers( CHAIN, 0 );
+ chain_shift_data_registers( CHAIN, 1 );
+
+// printf( "ctrl=%s\n", register_get_string( ejctrl->out ) );
+
+ if (ejctrl->out->data[Rocc]) {
+ printf( _("%s(%d) Reset occurred, ctrl=%s\n"),
+ __FILE__, __LINE__,
+ register_get_string( ejctrl->out ) );
+ INITIALIZED = 0;
+ break;
+ }
+ if (! ejctrl->out->data[PrAcc]) {
+ printf( _("%s(%d) No processor access, ctrl=%s\n"),
+ __FILE__, __LINE__,
+ register_get_string( ejctrl->out ) );
+ INITIALIZED = 0;
+ break;
+ }
+
+ part_set_instruction( PART, "EJTAG_ADDRESS" );
+ chain_shift_instructions( CHAIN );
+
+ chain_shift_data_registers( CHAIN, 1 );
+ addr = reg_value( ejaddr->out );
+ if (addr & 3) {
+ printf( _("%s(%d) PrAcc bad alignment: addr=0x%08x\n"),
+ __FILE__, __LINE__, addr );
+ addr &= ~3;
+ }
+
+ part_set_instruction( PART, "EJTAG_DATA" );
+ chain_shift_instructions( CHAIN );
+
+ register_fill( ejdata->in, 0 );
+
+ if (ejctrl->out->data[PRnW]) {
+ chain_shift_data_registers( CHAIN, 1 );
+ data = reg_value( ejdata->out );
+#if 0
+ printf( _("%s(%d) PrAcc write: addr=0x%08x data=0x%08x\n"),
+ __FILE__, __LINE__, addr, data );
+#endif
+ if (addr == UINT32_C(0xff200000)) {
+ /* Return value from the target CPU. */
+ retval = data;
+ } else {
+ printf( _("%s(%d) Unknown write addr=0x%08x data=0x%08x\n"),
+ __FILE__, __LINE__, addr, data );
+ }
+ } else {
+ if (addr == UINT32_C(0xff200200) && pass++)
+ break;
+
+ data = 0;
+ if (addr >= 0xff200200 && addr < 0xff200200 + (len << 2)) {
+ data = code[(addr - 0xff200200) >> 2];
+
+ for (i = 0; i < 32; i++)
+ ejdata->in->data[i] = (data >> i) & 1;
+ }
+#if 0
+ printf( "%s(%d) PrAcc read: addr=0x%08x data=0x%08x\n",
+ __FILE__, __LINE__, addr, data );
+#endif
+ chain_shift_data_registers( CHAIN, 0 );
+ }
+
+ part_set_instruction( PART, "EJTAG_CONTROL" );
+ chain_shift_instructions( CHAIN );
+
+ ejctrl->in->data[PrAcc] = 0;
+ chain_shift_data_registers( CHAIN, 0 );
+ }
+ return retval;
+}
+
+static int
+ejtag_bus_init( bus_t *bus )
+{
+ data_register *ejctrl, *ejimpl, *ejaddr, *ejdata, *ejall;
+ uint32_t code[4] = {
+ 0x3c04ff20, // lui $4,0xff20
+ 0x349f0200, // ori $31,$4,0x0200
+ 0x03e00008, // jr $31
+ 0x3c030000 // lui $3,0
+ };
+
+ if (tap_state(CHAIN) != Run_Test_Idle) {
+ /* silently skip initialization if TAP isn't in RUNTEST/IDLE state
+ this is required to avoid interfering with detect when initbus
+ is contained in the part description file
+ bus_init() will be called latest by bus_prepare() */
+ return URJTAG_STATUS_OK;
+ }
+
+ ejctrl = part_find_data_register( PART, "EJCONTROL" );
+ ejimpl = part_find_data_register( PART, "EJIMPCODE" );
+ ejaddr = part_find_data_register( PART, "EJADDRESS" );
+ ejdata = part_find_data_register( PART, "EJDATA" );
+ ejall = part_find_data_register( PART, "EJALL" );
+ if (!(ejctrl && ejimpl)) {
+ printf( _("%s(%d) EJCONTROL or EJIMPCODE register not found\n"),
+ __FILE__, __LINE__ );
+ return URJTAG_STATUS_FAIL;
+ }
+
+ part_set_instruction( PART, "EJTAG_IMPCODE" );
+ chain_shift_instructions( CHAIN );
+ chain_shift_data_registers( CHAIN, 0 );//Write
+ chain_shift_data_registers( CHAIN, 1 );//Read
+ printf( "ImpCode=%s %08X\n", register_get_string( ejimpl->out ), reg_value( ejimpl->out ) );
+ BP->impcode = reg_value( ejimpl->out );
+
+ switch (EJTAG_VER) {
+ case EJTAG_20: printf( "EJTAG version: <= 2.0\n"); break;
+ case EJTAG_25: printf( "EJTAG version: 2.5\n"); break;
+ case EJTAG_26: printf( "EJTAG version: 2.6\n"); break;
+ case EJTAG_31: printf( "EJTAG version: 3.1\n"); break;
+ default:
+ printf( "EJTAG version: unknown (%d)\n", EJTAG_VER );
+ }
+ printf( "EJTAG Implementation flags:%s%s%s%s%s%s%s\n",
+ (BP->impcode & (1 << 28)) ? " R3k" : " R4k",
+ (BP->impcode & (1 << 24)) ? " DINTsup" : "",
+ (BP->impcode & (1 << 22)) ? " ASID_8" : "",
+ (BP->impcode & (1 << 21)) ? " ASID_6" : "",
+ (BP->impcode & (1 << 16)) ? " MIPS16" : "",
+ (BP->impcode & (1 << 14)) ? " NoDMA" : " DMA",
+ (BP->impcode & (1 )) ? " MIPS64" : " MIPS32" );
+
+ if (EJTAG_VER >= EJTAG_25) {
+ part_set_instruction( PART, "EJTAGBOOT" );
+ chain_shift_instructions( CHAIN );
+ }
+ part_set_instruction( PART, "EJTAG_CONTROL" );
+ chain_shift_instructions( CHAIN );
+ //Reset
+ register_fill( ejctrl->in, 0 );
+ ejctrl->in->data[PrRst] = 1;
+ ejctrl->in->data[PerRst] = 1;
+ chain_shift_data_registers( CHAIN, 0 );//Write
+ ejctrl->in->data[PrRst] = 0;
+ ejctrl->in->data[PerRst] = 0;
+ chain_shift_data_registers( CHAIN, 0 );//Write
+//
+ if (EJTAG_VER == EJTAG_20)
+ {
+ // Try enabling memory write on EJTAG_20 (BCM6348)
+ // Badly Copied from HairyDairyMaid V4.8
+ //ejtag_dma_write(0xff300000, (ejtag_dma_read(0xff300000) & ~(1<<2)) );
+// printf("Set Address to READ from\n");
+// printf("Select EJTAG ADDRESS Register\n");
+ part_set_instruction( PART, "EJTAG_ADDRESS" );
+ chain_shift_instructions ( CHAIN );
+ //Set to Debug Control Register Address, 0xFF300000
+ register_init( ejaddr->in, "11111111001100000000000000000000");
+// printf("Write to ejaddr->in =%s %08X\n",register_get_string( ejaddr->in),reg_value( ejaddr->in ) );
+ chain_shift_data_registers (CHAIN, 0);//Write
+// printf("Select EJTAG CONTROL Register\n");
+ part_set_instruction( PART, "EJTAG_CONTROL" );
+ chain_shift_instructions( CHAIN );
+ //Set some bits in CONTROL Register 0x00068B00
+ register_fill( ejctrl->in, 0 ); // Clear Register
+ ejctrl->in->data[PrAcc] = 1; // 18----|||
+ ejctrl->in->data[DmaAcc] = 1; // 17----|||
+ ejctrl->in->data[ProbEn] = 1; // 15-----||
+ ejctrl->in->data[DStrt] = 1; // 11------|
+ ejctrl->in->data[DrWn] = 1; // 9-------|
+ ejctrl->in->data[Dsz1] = 1; // 8-------| DMA_WORD = 0x00000100 = Bit8
+ chain_shift_data_registers( CHAIN, 1 );//WriteRead
+// printf("Write To ejctrl->in =%s %08X\n",register_get_string( ejctrl->in), reg_value( ejctrl->in ) );
+// printf("Read From ejctrl->out =%s %08X\n",register_get_string( ejctrl->out),reg_value( ejctrl->out ) );
+ do {
+// printf("Wait for DStrt to clear\n");
+ part_set_instruction( PART, "EJTAG_CONTROL" );
+ chain_shift_instructions( CHAIN );
+ register_fill( ejctrl->in, 0 );
+ //Set some bits in CONTROL Register 0x00068000
+ ejctrl->in->data[PrAcc] = 1; // 18----||
+ ejctrl->in->data[DmaAcc] = 1; // 17----||
+ ejctrl->in->data[ProbEn] = 1; // 15-----|
+ chain_shift_data_registers( CHAIN, 1 );//WriteRead
+// printf("Write To ejctrl->in =%s %08X\n",register_get_string( ejctrl->in), reg_value( ejctrl->in ) );
+// printf("Read From ejctrl->out =%s %08X\n",register_get_string( ejctrl->out),reg_value( ejctrl->out ) );
+ } while ( ejctrl->out->data[DStrt]==1 );
+// printf("Select EJTAG DATA Register\n");
+ part_set_instruction( PART, "EJTAG_DATA" );
+ chain_shift_instructions (CHAIN );
+ register_fill( ejdata->in, 0 ); // Clear Register
+ chain_shift_data_registers( CHAIN, 1 );//WriteRead
+// printf( "Write To ejdata->in =%s %08X\n", register_get_string( ejdata->in), reg_value( ejdata->in ) );
+// printf( "Read From ejdata->out =%s %08X\n", register_get_string( ejdata->out),reg_value( ejdata->out ) );
+// printf("Select EJTAG CONTROL Register\n");
+ part_set_instruction( PART, "EJTAG_CONTROL" );
+ chain_shift_instructions( CHAIN );
+ register_fill( ejctrl->in, 0 );
+ //Set some bits in CONTROL Register 0x00048000
+ ejctrl->in->data[PrAcc] = 1; // 18----||
+ ejctrl->in->data[ProbEn] = 1; // 15-----|
+ chain_shift_data_registers( CHAIN, 1 );//WriteRead
+// printf("Write To ejctrl->in =%s %08X\n",register_get_string( ejctrl->in), reg_value( ejctrl->in ) );
+// printf("Read From ejctrl->out =%s %08X\n",register_get_string( ejctrl->out),reg_value( ejctrl->out ) );
+ if (ejctrl->out->data[DeRR]==1)
+ {
+ printf("DMA READ ERROR\n");
+ }
+ //Now have data from DCR, need to reset the MP Bit (2) and write it back out
+ register_init( ejdata->in, register_get_string( ejdata->out ) );
+ ejdata->in->data[MemProt] = 0;
+// printf( "Need to Write ejdata-> =%s %08X\n", register_get_string( ejdata->in),reg_value( ejdata->in ) );
+
+ // Now the Write
+// printf("Set Address To Write To\n");
+// printf("Select EJTAG ADDRESS Register\n");
+ part_set_instruction( PART, "EJTAG_ADDRESS" );
+ chain_shift_instructions ( CHAIN );
+ register_init( ejaddr->in, "11111111001100000000000000000000" );
+// printf("Write to ejaddr->in =%s %08X\n",register_get_string( ejaddr->in), reg_value( ejaddr->in ) );
+ //This appears to be a write with NO Read
+ chain_shift_data_registers ( CHAIN, 0 );//Write
+// printf("Select EJTAG DATA Register\n");
+ part_set_instruction( PART, "EJTAG_DATA" );
+ chain_shift_instructions ( CHAIN );
+ //The value is already in ejdata->in, so write it
+// printf("Write To ejdata->in =%s %08X\n", register_get_string( ejdata->in),reg_value( ejdata->in ) );
+ chain_shift_data_registers( CHAIN, 0 );//Write
+// printf("Select EJTAG CONTROL Register\n");
+ part_set_instruction( PART, "EJTAG_CONTROL" );
+ chain_shift_instructions( CHAIN );
+
+ //Set some bits in CONTROL Register
+ register_fill( ejctrl->in, 0 ); // Clear Register
+ ejctrl->in->data[DmaAcc] = 1; // 17
+ ejctrl->in->data[Dsz1] = 1; // DMA_WORD = 0x00000100 = Bit8
+ ejctrl->in->data[DStrt] = 1; // 11
+ ejctrl->in->data[ProbEn] = 1; // 15
+ ejctrl->in->data[PrAcc] = 1; // 18
+ chain_shift_data_registers( CHAIN, 1 );//Write/Read
+// printf("Write to ejctrl->in =%s %08X\n",register_get_string( ejctrl->in), reg_value( ejctrl->in ) );
+// printf("Read from ejctrl->out =%s %08X\n",register_get_string( ejctrl->out), reg_value( ejctrl->out ) );
+ do {
+// printf("Wait for DStrt to clear\n");
+ //Might not need these 2 lines
+ part_set_instruction( PART, "EJTAG_CONTROL" );
+ chain_shift_instructions( CHAIN );
+ ejctrl->in->data[DmaAcc] = 1; // 17
+ ejctrl->in->data[ProbEn] = 1; // 15
+ ejctrl->in->data[PrAcc] = 1; // 18
+ chain_shift_data_registers( CHAIN, 1 );//Write/Read
+// printf("Write to ejctrl->in =%s %08X\n",register_get_string( ejctrl->in), reg_value( ejctrl->in ) );
+// printf("Read from ejctrl->out =%s %08X\n",register_get_string( ejctrl->out), reg_value( ejctrl->out ) );
+ } while ( ejctrl->out->data[DStrt]==1 );
+// printf("Select EJTAG CONTROL Register\n");
+ part_set_instruction( PART, "EJTAG_CONTROL" );
+ chain_shift_instructions( CHAIN );
+ register_fill( ejctrl->in, 0 );
+ //Set some bits in CONTROL Register 0x00048000
+ ejctrl->in->data[PrAcc] = 1; // 18----||
+ ejctrl->in->data[ProbEn] = 1; // 15-----|
+ chain_shift_data_registers( CHAIN, 1 );//Write/Read
+// printf("Write To ejctrl->in =%s %08X\n",register_get_string( ejctrl->in),reg_value( ejctrl->in ) );
+// printf("Read From ejctrl->out =%s %08X\n",register_get_string( ejctrl->out),reg_value( ejctrl->out ) );
+ if ( ejctrl->out->data[DeRR]==1 )
+ {
+ printf("DMA WRITE ERROR\n");
+ }
+ }
+
+ part_set_instruction( PART, "EJTAG_CONTROL" );
+ chain_shift_instructions( CHAIN );
+
+ register_fill( ejctrl->in, 0 );
+ ejctrl->in->data[PrAcc] = 1;
+ ejctrl->in->data[ProbEn] = 1;
+ if (EJTAG_VER >= EJTAG_25) {
+ ejctrl->in->data[ProbTrap] = 1;
+ ejctrl->in->data[Rocc] = 1;
+ }
+ chain_shift_data_registers( CHAIN, 0 );
+
+ ejctrl->in->data[PrAcc] = 1;
+ ejctrl->in->data[ProbEn] = 1;
+ ejctrl->in->data[ProbTrap] = 1;
+ ejctrl->in->data[JtagBrk] = 1;
+
+ chain_shift_data_registers( CHAIN, 0 );
+
+ ejctrl->in->data[JtagBrk] = 0;
+ chain_shift_data_registers( CHAIN, 1 );
+
+ if (! ejctrl->out->data[BrkSt]) {
+ printf( _("%s(%d) Failed to enter debug mode, ctrl=%s\n"),
+ __FILE__, __LINE__,
+ register_get_string( ejctrl->out ) );
+ return URJTAG_STATUS_FAIL;
+ }
+ else
+ {
+ printf("Processor entered Debug Mode.\n");
+ }
+ if (ejctrl->out->data[Rocc]) {
+ ejctrl->in->data[Rocc] = 0;
+ chain_shift_data_registers( CHAIN, 0 );
+ ejctrl->in->data[Rocc] = 1;
+ chain_shift_data_registers( CHAIN, 1 );
+ }
+
+ //HDM now Clears Watchdog
+
+
+ ejtag_run_pracc( bus, code, 4 );
+ BP->adr_hi = 0;
+ INITIALIZED = 1;
+ return URJTAG_STATUS_OK;
+}
+
+/**
+ * bus->driver->(*prepare)
+ *
+ */
+static void
+ejtag_bus_prepare( bus_t *bus )
+{
+ if (!INITIALIZED)
+ bus_init( bus );
+}
+
+/**
+ * bus->driver->(*area)
+ *
+ */
+static int
+ejtag_bus_area( bus_t *bus, uint32_t adr, bus_area_t *area )
+{
+ if (adr < UINT32_C(0x20000000)) {
+ area->description = NULL;
+ area->start = UINT32_C(0x00000000);
+ area->length = UINT64_C(0x20000000);
+ area->width = 8;
+ } else if (adr < UINT32_C(0x40000000)) {
+ area->description = NULL;
+ area->start = UINT32_C(0x20000000);
+ area->length = UINT64_C(0x20000000);
+ area->width = 16;
+ } else if (adr < UINT32_C(0x60000000)) {
+ area->description = NULL;
+ area->start = UINT32_C(0x40000000);
+ area->length = UINT64_C(0x20000000);
+ area->width = 32;
+ } else {
+ area->description = NULL;
+ area->start = UINT32_C(0x60000000);
+ area->length = UINT64_C(0xa0000000);
+ area->width = 0;
+ }
+ return URJTAG_STATUS_OK;
+}
+
+static int
+ejtag_gen_read( bus_t *bus, uint32_t *code, uint32_t adr )
+{
+ uint16_t adr_hi, adr_lo;
+ uint32_t *p = code;
+
+ /* 16-bit signed offset, phys -> kseg1 */
+ adr_lo = adr & 0xffff;
+ adr_hi = ((adr >> 16) & 0x1fff);
+ /* Increment adr_hi if adr_lo < 0 */
+ adr_hi += (adr_lo >> 15);
+ /* Bypass cache */
+ adr_hi += 0xa000;
+
+ if (BP->adr_hi != adr_hi) {
+ BP->adr_hi = adr_hi;
+ *p++ = 0x3c030000 | adr_hi; // lui $3,adr_hi
+ }
+ switch (adr >> 29) {
+ case 0:
+ *p++ = 0x90620000 | adr_lo; // lbu $2,adr_lo($3)
+ break;
+ case 1:
+ *p++ = 0x94620000 | (adr_lo & ~1); // lhu $2,adr_lo($3)
+ break;
+ case 2:
+ *p++ = 0x8c620000 | (adr_lo & ~3); // lw $2,adr_lo($3)
+ break;
+ default: /* unknown bus width */
+ *p++ = 0x00001025; // move $2,$0
+ break;
+ }
+ *p++ = 0x03e00008; // jr $31
+ return p - code;
+}
+
+/**
+ * bus->driver->(*read_start)
+ *
+ */
+static void
+ejtag_bus_read_start( bus_t *bus, uint32_t adr )
+{
+ uint32_t code[3];
+
+ ejtag_run_pracc( bus, code, ejtag_gen_read( bus, code, adr ));
+ // printf("bus_read_start: adr=0x%08x\n", adr);
+}
+
+/**
+ * bus->driver->(*read_next)
+ *
+ */
+static uint32_t
+ejtag_bus_read_next( bus_t *bus, uint32_t adr )
+{
+ uint32_t d;
+ uint32_t code[4], *p = code;
+
+ *p++ = 0xac820000; // sw $2,0($4)
+ p += ejtag_gen_read( bus, p, adr );
+
+ d = ejtag_run_pracc( bus, code, p - code );
+
+ // printf("bus_read_next: adr=0x%08x data=0x%08x\n", adr, d);
+ return d;
+}
+
+/**
+ * bus->driver->(*read_end)
+ *
+ */
+static uint32_t
+ejtag_bus_read_end( bus_t *bus )
+{
+ uint32_t d;
+ static const uint32_t code[2] = {
+ 0xac820000, // sw $2,0($4)
+ 0x03e00008 // jr $31
+ };
+
+ d = ejtag_run_pracc( bus, code, 2 );
+
+ // printf("bus_read_end: data=0x%08x\n", d);
+ return d;
+}
+
+/**
+ * bus->driver->(*write)
+ *
+ */
+static void
+ejtag_bus_write( bus_t *bus, uint32_t adr, uint32_t data )
+{
+ uint16_t adr_hi, adr_lo;
+ uint32_t code[5], *p = code;
+
+ /* 16-bit signed offset, phys -> kseg1 */
+ adr_lo = adr & 0xffff;
+ adr_hi = ((adr >> 16) & 0x1fff) + (adr_lo >> 15) + 0xa000;
+
+ if (BP->adr_hi != adr_hi) {
+ BP->adr_hi = adr_hi;
+ *p++ = 0x3c030000 | adr_hi; // lui $3,adr_hi
+ }
+ switch (adr >> 29) {
+ case 0:
+ *p++ = 0x34020000 | (data & 0xff); // li $2,data
+ *p++ = 0xa0620000 | adr_lo; // sb $2,adr_lo($3)
+ break;
+ case 1:
+ *p++ = 0x34020000 | (data & 0xffff); // li $2,data
+ *p++ = 0xa4620000 | (adr_lo & ~1); // sh $2,adr_lo($3)
+ break;
+ case 2:
+ *p++ = 0x3c020000 | (data >> 16); // lui $2,data_hi
+ *p++ = 0x34420000 | (data & 0xffff); // ori $2,data_lo
+ *p++ = 0xac620000 | (adr_lo & ~3); // sw $2,adr_lo($3)
+ break;
+ }
+ *p++ = 0x03e00008; // jr $31
+
+ ejtag_run_pracc( bus, code, p - code );
+
+ // printf("bus_write: adr=0x%08x data=0x%08x\n", adr, data);
+}
+
+const bus_driver_t ejtag_bus = {
+ "ejtag",
+ N_("EJTAG compatible bus driver via PrAcc"),
+ ejtag_bus_new,
+ generic_bus_free,
+ ejtag_bus_printinfo,
+ ejtag_bus_prepare,
+ ejtag_bus_area,
+ ejtag_bus_read_start,
+ ejtag_bus_read_next,
+ ejtag_bus_read_end,
+ generic_bus_read,
+ ejtag_bus_write,
+ ejtag_bus_init
+};
--- /dev/null
+/*
+ * $Id$
+ *
+ * EJTAG compatible bus driver via DMA
+ * Copyright (C) 2008, Julien Aube
+ * Credits goes to
+ * - Marek Michalkiewicz (EJTAG Pracc driver),
+ * - HairyDairyMaid for the HairyDairyMaid v48 utility,
+ * - Florian Fanelli for the help on the flash interface infos,
+ * - All others who contributed to the previous projetcs
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marek Michalkiewicz <marekm@amelek.gda.pl>, 2005.
+ *
+ * Documentation:
+ * [1] MIPS Licensees, "MIPS EJTAG Debug Solution", 980818 Rev. 2.0.0
+ * [2] MIPS Technologies, Inc. "EJTAG Specification", 2001-02-15, Rev. 2.60
+ *
+ *
+ */
+
+//#define PRINT_DATA_DEBUG 1
+#include "sysdep.h"
+
+#include <stdlib.h>
+#include <stdint.h>
+#include <string.h>
+
+#include "part.h"
+#include "bus.h"
+#include "chain.h"
+#include "bssignal.h"
+#include "jtag.h"
+#include "buses.h"
+#include "generic_bus.h"
+#include "state.h"
+
+typedef struct {
+ uint32_t impcode; /* EJTAG Implementation Register */
+} bus_params_t;
+
+#define BP ((bus_params_t *) bus->params)
+
+#define EJTAG_VER ((BP->impcode >> 29) & 7)
+#define EJTAG_20 0
+#define EJTAG_25 1
+#define EJTAG_26 2
+
+/* EJTAG control register bits */
+#define PerRst 20
+#define PRnW 19
+#define PrAcc 18
+#define PrRst 16
+#define ProbEn 15
+#define JtagBrk 12
+#define BrkSt 3
+#define Rocc 31
+#define ProbTrap 14
+
+/* DMA */
+#define DmaAcc 17
+#define DstRt 11
+#define DmaRwn 9
+#define Derr 10
+// default : DMA tranfser size BYTE
+#define DMA_HALFWORD 7
+#define DMA_WORD 8
+#define DMA_BYTE 0
+
+/**
+ * bus->driver->(*new_bus)
+ *
+ */
+static bus_t *
+ejtag_dma_bus_new( chain_t *chain, const bus_driver_t *driver, char *cmd_params[] )
+{
+ bus_t *bus;
+
+ bus = calloc( 1, sizeof (bus_t) );
+ if (!bus)
+ return NULL;
+
+ bus->driver = driver;
+ bus->params = calloc( 1, sizeof (bus_params_t) );
+ if (!bus->params) {
+ free( bus );
+ return NULL;
+ }
+
+ CHAIN = chain;
+ PART = chain->parts->parts[chain->active_part];
+
+ return bus;
+}
+
+/**
+ * bus->driver->(*printinfo)
+ *
+ */
+static void
+ejtag_dma_bus_printinfo( bus_t *bus )
+{
+ int i;
+
+ for (i = 0; i < CHAIN->parts->len; i++)
+ if (PART == CHAIN->parts->parts[i])
+ break;
+ printf( _("EJTAG compatible bus driver via DMA (JTAG part No. %d)\n"), i );
+}
+
+/**
+ * helper function
+ *
+ */
+static uint32_t
+reg_value( tap_register *reg )
+{
+ uint32_t retval = 0;
+ int i;
+
+ for (i = 0; i < reg->len; i++) {
+ if (reg->data[i])
+ retval |= (1 << i);
+ }
+ return retval;
+}
+
+#ifdef PRINT_DATA_DEBUG
+/* Small debug helper */
+char siz_(int sz)
+{
+ switch(sz) {
+ case DMA_WORD: return 'w';
+ case DMA_BYTE: return 'b';
+ case DMA_HALFWORD: return 'h';
+ default : return 'e';
+ }
+ return 'E';
+}
+#endif
+
+/**
+ * low-level dma write
+ *
+ */
+static void ejtag_dma_write(bus_t *bus, unsigned int addr, unsigned int data,int sz)
+{
+ static data_register *ejctrl = NULL;
+ static data_register *ejaddr = NULL;
+ static data_register *ejdata = NULL;
+ int i=0;
+ int timeout=5;
+
+ if (ejctrl == NULL)
+ ejctrl = part_find_data_register( PART, "EJCONTROL" );
+ if (ejaddr == NULL)
+ ejaddr = part_find_data_register( PART, "EJADDRESS" );
+ if (ejdata == NULL)
+ ejdata = part_find_data_register( PART, "EJDATA" );
+
+ switch (sz) { /* Fill the other bytes with copy of the current */
+ case DMA_BYTE:
+ data &= 0xff; data |= (data<<8) | (data << 16) | (data << 24);
+ break;
+ case DMA_HALFWORD:
+ data &= 0xffff; data |= (data << 16);
+ break;
+ default: break;
+ }
+
+ part_set_instruction( PART, "EJTAG_ADDRESS" );
+ chain_shift_instructions( CHAIN );
+ for (i = 0; i < 32; i++)
+ ejaddr->in->data[i] = (addr >> i) & 1;
+ chain_shift_data_registers( CHAIN, 0 ); /* Push the address to write */
+#ifdef PRINT_DATA_DEBUG
+ printf("Wrote to ejaddr->in =%s %08X\n",register_get_string( ejaddr->in),reg_value( ejaddr->in ) );
+#endif
+ part_set_instruction( PART, "EJTAG_DATA" );
+ chain_shift_instructions( CHAIN );
+ for (i = 0; i < 32; i++)
+ ejdata->in->data[i] = (data >> i) & 1;
+ chain_shift_data_registers( CHAIN, 0 ); /* Push the data to write */
+#ifdef PRINT_DATA_DEBUG
+ printf("Wrote to edata->in(%c) =%s %08X\n",siz_(sz),register_get_string( ejdata->in),reg_value( ejdata->in ) );
+#endif
+ part_set_instruction( PART, "EJTAG_CONTROL" );
+ chain_shift_instructions( CHAIN );
+ register_fill( ejctrl->in, 0 );
+ ejctrl->in->data[PrAcc] = 1; // Processor access
+ ejctrl->in->data[ProbEn] = 1;
+ ejctrl->in->data[DmaAcc] = 1; // DMA operation request */
+ ejctrl->in->data[DstRt] = 1;
+ if (sz)
+ ejctrl->in->data[sz] = 1; // Size : can be WORD/HALFWORD or nothing for byte
+ chain_shift_data_registers( CHAIN, 0 ); /* Do the operation */
+ //printf("Wrote to ejctrl->in =%s %08X\n",register_get_string( ejctrl->in),reg_value( ejctrl->in ) );
+
+ do {
+ part_set_instruction( PART, "EJTAG_CONTROL" );
+ chain_shift_instructions( CHAIN );
+ register_fill( ejctrl->in, 0 );
+ ejctrl->in->data[PrAcc] = 1;
+ ejctrl->in->data[ProbEn] = 1;
+ ejctrl->in->data[DmaAcc] = 1;
+ chain_shift_data_registers( CHAIN, 1 );
+ timeout--;
+ if ( ! timeout)
+ break;
+ } while(ejctrl->out->data[DstRt] == 1); // This flag tell us the processor has completed the op
+
+ part_set_instruction( PART, "EJTAG_CONTROL" );
+ chain_shift_instructions( CHAIN );
+ register_fill( ejctrl->in, 0 );
+ ejctrl->in->data[PrAcc] = 1;
+ ejctrl->in->data[ProbEn] = 1;
+ chain_shift_data_registers( CHAIN, 1 ); // Disable DMA, reset state to previous one.
+ if (ejctrl->out->data[Derr] == 1) { // Check for DMA error, i.e. incorrect address
+ printf( _("%s(%d) Error on dma write (dma transaction failed)\n"),
+ __FILE__, __LINE__ );
+ }
+ return ;
+}
+
+/**
+ * low level dma read operation
+ *
+ */
+static unsigned int ejtag_dma_read(bus_t *bus, unsigned int addr,int sz)
+{
+ static data_register *ejctrl = NULL;
+ static data_register *ejaddr = NULL;
+ static data_register *ejdata = NULL;
+ int i=0;
+ int timeout=5;
+ unsigned int ret;
+
+ if (ejctrl == NULL)
+ ejctrl = part_find_data_register( PART, "EJCONTROL" );
+ if (ejaddr == NULL)
+ ejaddr = part_find_data_register( PART, "EJADDRESS" );
+ if (ejdata == NULL)
+ ejdata = part_find_data_register( PART, "EJDATA" );
+
+ part_set_instruction( PART, "EJTAG_ADDRESS" );
+ chain_shift_instructions( CHAIN );
+ for (i = 0; i < 32; i++)
+ ejaddr->in->data[i] = (addr >> i) & 1;
+ chain_shift_data_registers( CHAIN, 0 ); /* Push the address to read */
+#ifdef PRINT_DATA_DEBUG
+ printf("Wrote to ejaddr->in =%s %08X\n",register_get_string( ejaddr->in),reg_value( ejaddr->in ) );
+#endif
+ part_set_instruction( PART, "EJTAG_CONTROL" );
+ chain_shift_instructions( CHAIN );
+ register_fill( ejctrl->in, 0 );
+ ejctrl->in->data[PrAcc] = 1; // Processor access
+ ejctrl->in->data[ProbEn] = 1;
+ ejctrl->in->data[DmaAcc] = 1; // DMA operation request */
+ ejctrl->in->data[DstRt] = 1;
+ if (sz)
+ ejctrl->in->data[sz] = 1; // Size : can be WORD/HALFWORD or nothing for byte
+ ejctrl->in->data[DmaRwn] = 1; // This is a read
+ chain_shift_data_registers( CHAIN, 0 ); /* Do the operation */
+ //printf("Wrote to ejctrl->in =%s %08X\n",register_get_string( ejctrl->in),reg_value( ejctrl->in ) );
+
+ do {
+ part_set_instruction( PART, "EJTAG_CONTROL" );
+ chain_shift_instructions( CHAIN );
+ register_fill( ejctrl->in, 0 );
+ ejctrl->in->data[PrAcc] = 1;
+ ejctrl->in->data[ProbEn] = 1;
+ ejctrl->in->data[DmaAcc] = 1;
+ chain_shift_data_registers( CHAIN, 1 );
+
+ //printf("Wrote to ejctrl->in =%s %08X\n",register_get_string( ejctrl->in),reg_value( ejctrl->in ) );
+ //printf("Read from ejctrl->out =%s %08X\n",register_get_string( ejctrl->out),reg_value( ejctrl->out ) );
+ timeout--;
+ if ( ! timeout)
+ break;
+ } while(ejctrl->out->data[DstRt] == 1); // This flag tell us the processor has completed the op
+
+ part_set_instruction( PART, "EJTAG_DATA" );
+ chain_shift_instructions( CHAIN );
+ register_fill( ejdata->in,0);
+ chain_shift_data_registers( CHAIN, 1 );
+ ret = reg_value(ejdata->out);
+#ifdef PRINT_DATA_DEBUG
+ printf("Read from ejdata->out(%c) =%s %08X\n",siz_(sz),register_get_string( ejdata->out),reg_value( ejdata->out ) );
+#endif
+ part_set_instruction( PART, "EJTAG_CONTROL" );
+ chain_shift_instructions( CHAIN );
+ register_fill( ejctrl->in, 0 );
+ ejctrl->in->data[PrAcc] = 1;
+ ejctrl->in->data[ProbEn] = 1;
+ chain_shift_data_registers( CHAIN, 1 ); // Disable DMA, reset state to previous one.
+
+// printf("Wrote to ejctrl->in =%s %08X\n",register_get_string( ejctrl->in),reg_value( ejctrl->in ) );
+// printf("Read from ejctrl->out =%s %08X\n",register_get_string( ejctrl->out),reg_value( ejctrl->out ) );
+
+ if (ejctrl->out->data[Derr] == 1) { // Check for DMA error, i.e. incorrect address
+ printf( _("%s(%d) Error on dma read (dma transaction failed)\n"),
+ __FILE__, __LINE__ );
+ }
+
+ switch (sz) {
+ case DMA_HALFWORD : ret &= ret & 0xffff; break;
+ case DMA_BYTE : ret &= ret & 0xff; break;
+ case DMA_WORD:
+ default: break;
+ }
+
+ return ret;
+}
+
+/**
+ * bus->driver->(*initbus)
+ *
+ */
+int ejtag_dma_bus_init( bus_t *bus )
+{
+ data_register *ejctrl=NULL, *ejimpl=NULL, *ejaddr=NULL, *ejdata=NULL;
+ int timeout=100;
+
+ if (tap_state(CHAIN) != Run_Test_Idle) {
+ /* silently skip initialization if TAP isn't in RUNTEST/IDLE state
+ this is required to avoid interfering with detect when initbus
+ is contained in the part description file
+ bus_init() will be called latest by bus_prepare() */
+ return URJTAG_STATUS_OK;
+ }
+
+ ejctrl = part_find_data_register( PART, "EJCONTROL" );
+ ejimpl = part_find_data_register( PART, "EJIMPCODE" );
+ ejaddr = part_find_data_register( PART, "EJADDRESS" );
+ ejdata = part_find_data_register( PART, "EJDATA" );
+
+ if (!(ejctrl && ejimpl)) {
+ printf( _("%s(%d) EJCONTROL or EJIMPCODE register not found\n"),
+ __FILE__, __LINE__ );
+ return URJTAG_STATUS_FAIL;
+ }
+ if (!(ejaddr && ejdata)) {
+ printf( _("%s(%d) EJADDRESS of EJDATA register not found, DMA impossible\n"),
+ __FILE__, __LINE__ );
+ return URJTAG_STATUS_FAIL;
+ }
+
+ part_set_instruction( PART, "EJTAG_IMPCODE" );
+ chain_shift_instructions( CHAIN );
+ chain_shift_data_registers( CHAIN, 0 );
+ chain_shift_data_registers( CHAIN, 1 );
+ printf( "ImpCode=%s\n", register_get_string( ejimpl->out ) );
+ BP->impcode = reg_value( ejimpl->out );
+
+ switch (EJTAG_VER) {
+ case EJTAG_20: printf( "EJTAG version: <= 2.0\n"); break;
+ case EJTAG_25: printf( "EJTAG version: 2.5\n"); break;
+ case EJTAG_26: printf( "EJTAG version: 2.6\n"); break;
+ default:
+ printf( "EJTAG version: unknown (%d)\n", EJTAG_VER );
+ }
+ printf( "EJTAG Implementation flags:%s%s%s%s%s%s%s\n",
+ (BP->impcode & (1 << 28)) ? " R3k" : " R4k",
+ (BP->impcode & (1 << 24)) ? " DINTsup" : "",
+ (BP->impcode & (1 << 22)) ? " ASID_8" : "",
+ (BP->impcode & (1 << 21)) ? " ASID_6" : "",
+ (BP->impcode & (1 << 16)) ? " MIPS16" : "",
+ (BP->impcode & (1 << 14)) ? " NoDMA" : " DMA",
+ (BP->impcode & (1 )) ? " MIPS64" : " MIPS32" );
+
+ if (BP->impcode & (1 << 14)) {
+ printf( "Warning, plateform claim there are no DMA support\n");
+ }
+
+ if (EJTAG_VER != EJTAG_20) {
+ printf( "Warning, plateform has a version which is not supposed to have DMA\n");
+ }
+
+ // The purpose of this is to make the processor break into debug mode on
+ // reset rather than execute the reset vector
+ part_set_instruction( PART, "EJTAGBOOT" );
+ chain_shift_instructions( CHAIN );
+
+ // Prepare for following instructions
+ part_set_instruction( PART, "EJTAG_CONTROL" );
+ chain_shift_instructions( CHAIN );
+ register_fill( ejctrl->in, 0 );
+
+ // Reset the processor
+ ejctrl->in->data[PrRst] = 1;
+ ejctrl->in->data[PerRst] = 1;
+ chain_shift_data_registers( CHAIN, 0 );
+
+ // Release reset
+ ejctrl->in->data[PrRst] = 0;
+ ejctrl->in->data[PerRst] = 0;
+ chain_shift_data_registers( CHAIN, 0 );
+
+ ejctrl->in->data[PrAcc] = 1;
+ ejctrl->in->data[ProbEn] = 1;
+ ejctrl->in->data[ProbTrap] = 1;
+ ejctrl->in->data[JtagBrk] = 1;
+ ejctrl->in->data[Rocc] = 1;
+ chain_shift_data_registers( CHAIN, 0 );
+
+ /* Wait until processor is in break */
+ ejctrl->in->data[JtagBrk] = 0;
+ do {
+ chain_shift_data_registers( CHAIN, 1 );
+ timeout--;
+ if (!timeout) break;
+ } while ( ejctrl->out->data[BrkSt] == 0 );
+
+ if (timeout == 0)
+ {
+ printf( _("%s(%d) Failed to enter debug mode, ctrl=%s\n"),
+ __FILE__, __LINE__,
+ register_get_string( ejctrl->out ) );
+ return URJTAG_STATUS_FAIL;
+ }
+
+ // Handle the reset bit clear, if any
+ if (ejctrl->out->data[Rocc]) {
+ ejctrl->in->data[Rocc] = 0;
+ chain_shift_data_registers( CHAIN, 0 );
+ ejctrl->in->data[Rocc] = 1;
+ chain_shift_data_registers( CHAIN, 1 );
+ }
+
+
+ // Clear Memory Protection Bit in DCR
+ printf( _("Clear memory protection bit in DCR\n"));
+ unsigned int val = ejtag_dma_read(bus, 0xff300000,DMA_WORD);
+ ejtag_dma_write(bus, 0xff300000, val & ~(1<<2), DMA_WORD );
+
+ // Clear watchdog, if any
+ printf( _("Clear Watchdog\n"));
+ ejtag_dma_write(bus, 0xb8000080,0,DMA_WORD);
+
+ printf( _("Potential flash base address: [0x%x], [0x%x]\n"),
+ ejtag_dma_read(bus, 0xfffe2000,DMA_WORD), ejtag_dma_read(bus, 0xfffe1000,DMA_WORD));
+
+ printf( _("Processor successfully switched in debug mode.\n"));
+
+ INITIALIZED = 1;
+ return URJTAG_STATUS_OK;
+}
+/**
+ * bus->driver->(*prepare)
+ *
+ */
+void
+ejtag_dma_bus_prepare( bus_t *bus )
+{
+ if (!INITIALIZED)
+ bus_init( bus );
+}
+
+/**
+ * bus->driver->(*area)
+ *
+ */
+int
+ejtag_dma_bus_area( bus_t *bus, uint32_t adr, bus_area_t *area )
+{
+
+ /* from MIPS.org datasheets */
+ if (adr < UINT32_C(0x1E000000)) {
+ area->description = "USEG : User addresses";
+ area->start = UINT32_C(0x00000000);
+ area->length = UINT64_C(0x1E000000);
+ area->width = 32;
+ } else if (adr < UINT32_C(0x20000000)) {
+ area->description = "FLASH : Addresses in flash (boot=0x1FC000000)";
+ area->start = UINT32_C(0x1E000000);
+ area->length = UINT64_C(0x2000000);
+ area->width = 16;
+ } else if (adr < UINT32_C(0x80000000)) {
+ area->description = "USEG : User addresses";
+ area->start = UINT32_C(0x20000000);
+ area->length = UINT64_C(0x60000000);
+ area->width = 32;
+ } else if (adr < UINT32_C(0xA0000000)) {
+ area->description = "KSEG0: Kernel Unmapped Cached";
+ area->start = UINT32_C(0x80000000);
+ area->length = UINT64_C(0x20000000);
+ area->width = 32;
+ } else if (adr < UINT32_C(0xC0000000)) {
+ area->description = "KSEG1: Kernel Unmapped Uncached";
+ area->start = UINT32_C(0xA0000000);
+ area->length = UINT64_C(0x20000000);
+ area->width = 32;
+ } else if (adr < UINT32_C(0xE0000000)) {
+ area->description = "SSEG : Supervisor Mapped";
+ area->start = UINT32_C(0xC0000000);
+ area->length = UINT64_C(0x20000000);
+ area->width = 32;
+ } else {
+ area->description = "KSEG3: Kernel Mapped";
+ area->start = UINT32_C(0xE0000000);
+ area->length = UINT64_C(0x20000000);
+ area->width = 32;
+ }
+ return URJTAG_STATUS_OK;
+}
+
+int get_sz(uint32_t adr)
+{
+ static bus_area_t area;
+ static int initialized = 0;
+
+ if (! initialized) {
+ ejtag_dma_bus_area(NULL,adr,&area);
+ initialized = 1;
+ }
+ switch (area.width)
+ {
+ case 32: return DMA_WORD;
+ case 16: return DMA_HALFWORD;
+ default: break;
+ }
+ return DMA_BYTE;
+}
+/**
+ * bus->driver->(*write)
+ *
+ */
+void ejtag_dma_bus_write(bus_t *bus, uint32_t adr, uint32_t data)
+{
+ //printf("%s:adr=0x%x,data=0x%x\n",__FUNCTION__,adr,data);
+ ejtag_dma_write(bus, adr,data, get_sz(adr));
+}
+/**
+ * bus->driver->(*read)
+ *
+ */
+unsigned int ejtag_dma_bus_read(bus_t *bus, uint32_t adr)
+{
+ int data = ejtag_dma_read(bus, adr, get_sz(adr));
+ //printf("%s:adr=0x%x,got=0x%x\n",__FUNCTION__,adr,data);
+ return data;
+}
+
+static unsigned int _data_read;
+/**
+ * bus->driver->(*read_start)
+ *
+ */
+void ejtag_dma_bus_read_start(bus_t *bus, uint32_t adr)
+{
+ _data_read = ejtag_dma_read(bus, adr,get_sz(adr));
+ //printf("%s:adr=0x%x, got=0x%x\n",__FUNCTION__,adr,_data_read);
+ return;
+}
+/**
+ * bus->driver->(*read_next)
+ *
+ */
+unsigned int ejtag_dma_bus_read_next(bus_t *bus, uint32_t adr)
+{
+ unsigned int tmp_value = _data_read;
+ _data_read = ejtag_dma_read(bus, adr,get_sz(adr));
+ //printf("%s:adr=0x%x, got=0x%x\n",__FUNCTION__,adr,_data_read);
+ return tmp_value;
+}
+/**
+ * bus->driver->(*read_end)
+ *
+ */
+unsigned int ejtag_dma_bus_read_end(bus_t *bus)
+{
+ return _data_read;
+}
+
+const bus_driver_t ejtag_dma_bus = {
+ "ejtag_dma",
+ N_("EJTAG compatible bus driver via DMA"),
+ ejtag_dma_bus_new,
+ generic_bus_free,
+ ejtag_dma_bus_printinfo,
+ ejtag_dma_bus_prepare,
+ ejtag_dma_bus_area,
+ ejtag_dma_bus_read_start,
+ ejtag_dma_bus_read_next,
+ ejtag_dma_bus_read_end,
+ ejtag_dma_bus_read,
+ ejtag_dma_bus_write,
+ ejtag_dma_bus_init
+};
+
--- /dev/null
+/*
+ * $Id$
+ *
+ * Bus driver for the FPGA JTAG memory (fjmem) design.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Arnim Laeuger <arniml@users.sourceforge.net>, 2008.
+ *
+ */
+
+#include "sysdep.h"
+
+#include <stdlib.h>
+#include <stdint.h>
+#include <string.h>
+
+#include "part.h"
+#include "bus.h"
+#include "chain.h"
+#include "jtag.h"
+#include "buses.h"
+#include "generic_bus.h"
+#include "cmd.h"
+#include "tap.h"
+
+
+#undef DEBUG
+
+#define FJMEM_INST_NAME "FJMEM_INST"
+#define FJMEM_REG_NAME "FJMEM_REG"
+#define FJMEM_MAX_REG_LEN 2048
+
+struct block_param {
+ struct block_param *next;
+ uint16_t num;
+ uint32_t start, end;
+ uint16_t addr_width;
+ uint16_t data_width;
+ uint8_t ashift;
+};
+typedef struct block_param block_param_t;
+
+struct block_desc {
+ uint16_t reg_len;
+ uint16_t instr_pos;
+ uint16_t block_pos;
+ uint16_t block_len;
+ uint16_t addr_pos;
+ uint16_t addr_len;
+ uint16_t data_pos;
+ uint16_t data_len;
+ block_param_t *blocks;
+};
+typedef struct block_desc block_desc_t;
+
+typedef struct {
+ uint32_t last_addr;
+ data_register *fjmem_reg;
+ block_desc_t block_desc;
+} bus_params_t;
+
+#define LAST_ADDR ((bus_params_t *) bus->params)->last_addr
+#define FJMEM_REG ((bus_params_t *) bus->params)->fjmem_reg
+#define BLOCK_DESC ((bus_params_t *) bus->params)->block_desc
+
+static int
+fjmem_detect_reg_len( chain_t *chain, part_t *part, char *opcode, int len )
+{
+ data_register *dr;
+ instruction *i;
+ int l, fjmem_reg_len;
+ char *tdo_bit;
+
+ /* build register FJMEM_REG with length of 1 bit*/
+ dr = data_register_alloc( FJMEM_REG_NAME, 1 );
+ if (!dr) {
+ printf( _("out of memory\n") );
+ return 0;
+ }
+
+ dr->next = part->data_registers;
+ part->data_registers = dr;
+
+ /* build instruction FJMEM_INST with code given by command line parameter
+ that maps to FJMEM_REG */
+ if (strlen( opcode ) != part->instruction_length) {
+ printf( _("invalid instruction length\n") );
+ return 0;
+ }
+ i = instruction_alloc( FJMEM_INST_NAME, part->instruction_length, opcode );
+ if (!i) {
+ printf( _("out of memory\n") );
+ return 0;
+ }
+ i->next = part->instructions;
+ part->instructions = i;
+ i->data_register = dr;
+
+ /* force jtag reset on all parts of the chain
+ -> they're in BYPASS mode now */
+ chain_set_trst( chain, 0 );
+ chain_set_trst( chain, 1 );
+ tap_reset_bypass( chain );
+
+ /* flood all BYPASS registers with 0 for the following detection */
+ register_fill( dr->in, 0);
+ tap_capture_dr( chain );
+ for (l = 0; l < chain->parts->len; l++)
+ tap_shift_register( chain, dr->in, NULL, EXITMODE_SHIFT );
+ /* shift once more and return to idle state */
+ tap_shift_register( chain, dr->in, NULL, EXITMODE_IDLE );
+
+ /* set the FJMEM_INST instruction and activate it */
+ part_set_instruction( part, FJMEM_INST_NAME );
+ chain_shift_instructions( chain );
+
+ /* skip autodetect if register length was already specified */
+ if (len)
+ return len;
+
+ /* now detect the register length of FJMEM_REG:
+ shift 1s through the data register until they appear at TDO
+ NB: We don't shift only through the FJMEM_REG but also through the
+ registers of all other parts in the chain. They're set to
+ BYPASS hopefully. */
+ fjmem_reg_len = 0;
+ register_fill( dr->in, 1);
+ register_fill( dr->out, 0);
+ tdo_bit = dr->out->data;
+
+ tap_capture_dr( chain );
+ /* read current TDO and then shift once */
+ tap_shift_register( chain, dr->in, dr->out, EXITMODE_SHIFT );
+ register_get_string( dr->out );
+ while ((tdo_bit[0] == 0) && (fjmem_reg_len < FJMEM_MAX_REG_LEN)) {
+ /* read current TDO and then shift once */
+ tap_shift_register( chain, dr->in, dr->out, EXITMODE_SHIFT );
+ tdo_bit = dr->out->data;
+ fjmem_reg_len++;
+ }
+ /* consider BYPASS register of other parts in the chain */
+ fjmem_reg_len -= chain->parts->len - 1;
+ /* shift once more and return to idle state */
+ tap_shift_register( chain, dr->in, NULL, EXITMODE_IDLE );
+#ifdef DEBUG
+ printf("FJMEM data register length: %d\n", fjmem_reg_len);
+#endif
+
+ return fjmem_reg_len < FJMEM_MAX_REG_LEN ? fjmem_reg_len : -1;
+}
+
+static int
+fjmem_detect_fields( chain_t *chain, part_t *part, bus_t *bus )
+{
+ block_desc_t *bd = &(BLOCK_DESC);
+ data_register *dr = FJMEM_REG;
+ int idx;
+#ifdef DEBUG
+ const char *reg_string;
+#endif
+
+ /* set safe defaults */
+ bd->block_len = 0;
+ bd->addr_pos = 0;
+ bd->addr_len = 0;
+ bd->data_pos = 0;
+ bd->data_len = 0;
+
+ /* extend FJMEM_REG to finally detected size */
+ if (dr->in)
+ free( dr->in );
+ if ((dr->in = register_alloc( bd->reg_len )) == NULL) {
+ printf( _("out of memory\n") );
+ return 0;
+ }
+ if (dr->out)
+ free( dr->out );
+ if ((dr->out = register_alloc( bd->reg_len )) == NULL) {
+ printf( _("out of memory\n") );
+ return 0;
+ }
+
+ /* Shift the detect instruction (all-1) into FJMEM_REG. */
+ register_fill( dr->in, 1 );
+ chain_shift_data_registers( chain, 1 );
+
+ /* With the next shift we will read the field marker pattern.
+ Shift in the query for block 0, will be used lateron. */
+ register_fill( dr->in, 0 );
+ /* enter query instruction: 110 */
+ dr->in->data[bd->instr_pos+1] = 1;
+ dr->in->data[bd->instr_pos+2] = 1;
+
+ /* shift register */
+ chain_shift_data_registers( chain, 1 );
+
+ /* and examine output from field detect */
+#ifdef DEBUG
+ reg_string = register_get_string( dr->out );
+ printf("captured: %s\n", reg_string);
+#endif
+ /* scan block field */
+ idx = bd->block_pos;
+ while (dr->out->data[idx] && (idx < dr->out->len))
+ idx++;
+ bd->block_len = idx - bd->block_pos;
+ /* scan address field */
+ bd->addr_pos = idx;
+ while ((dr->out->data[idx] == 0) && (idx < dr->out->len))
+ idx++;
+ bd->addr_len = idx - bd->addr_pos;
+ /* scan data field */
+ bd->data_pos = idx;
+ while (dr->out->data[idx] && (idx < dr->out->len))
+ idx++;
+ bd->data_len = idx - bd->data_pos;
+
+#ifdef DEBUG
+ printf("block pos: %d, len: %d\n", bd->block_pos, bd->block_len);
+ printf("addr pos: %d, len: %d\n", bd->addr_pos, bd->addr_len);
+ printf("data pos: %d, len: %d\n", bd->data_pos, bd->data_len);
+#endif
+
+ if ((bd->block_len > 0) &&
+ (bd->addr_len > 0) &&
+ (bd->data_len > 0))
+ return 1;
+ else
+ return 0;
+}
+
+static int
+fjmem_query_blocks( chain_t *chain, part_t *part, bus_t *bus )
+{
+ block_desc_t *bd = &(BLOCK_DESC);
+ data_register *dr = FJMEM_REG;
+ int max_block_num, block_num;
+ int failed = 0;
+#ifdef DEBUG
+ const char *reg_string;
+#endif
+
+ /* the current block number is 0, it has been requested by the previous
+ shift during fjmem_detect_fields */
+ max_block_num = (1 << bd->block_len) - 1;
+ for (block_num = 0; block_num <= max_block_num; block_num++) {
+ int next_block_num = block_num + 1;
+ int idx;
+ int addr_len, data_len;
+
+ /* prepare the next query before shifting the data register */
+ for (idx = 0; idx < bd->block_len; idx++) {
+ dr->in->data[bd->block_pos + idx] = next_block_num & 1;
+ next_block_num >>= 1;
+ }
+ chain_shift_data_registers( chain, 1 );
+
+ /* and examine output from block query */
+#ifdef DEBUG
+ reg_string = register_get_string( dr->out );
+ printf("captured: %s\n", reg_string);
+#endif
+
+ /* extract address field length */
+ for (addr_len = 0; addr_len < bd->addr_len; addr_len++)
+ if (dr->out->data[bd->addr_pos + addr_len] == 0)
+ break;
+
+ /* extract data field length */
+ for (data_len = 0; data_len < bd->data_len; data_len++)
+ if (dr->out->data[bd->data_pos + data_len] == 0)
+ break;
+
+ /* it's a valid block only if address field and data field are
+ both larger than 0 */
+ if ((addr_len > 0) && (data_len > 0)) {
+ block_param_t *bl;
+ int nbytes;
+
+ if ((bl = (block_param_t *)calloc( 1, sizeof( block_param_t ) )) == NULL) {
+ printf( _("out of memory\n") );
+ failed |= 1;
+ break;
+ }
+
+ bl->next = bd->blocks;
+ bl->num = block_num;
+ bl->addr_width = addr_len;
+ bl->data_width = data_len;
+ bd->blocks = bl;
+
+ /* determine address shift, depends on data width */
+ nbytes = data_len / 8;
+ if (data_len % 8)
+ nbytes++;
+
+ bl->ashift = 0;
+ while (nbytes != 1) {
+ bl->ashift++;
+ nbytes >>= 1;
+ }
+
+ /* determine start address of this block */
+ if (bl->next == NULL)
+ bl->start = 0;
+ else {
+ if ((bl->addr_width << bl->ashift) <= (bl->next->addr_width << bl->next->ashift)) {
+ bl->start = bl->next->start + (1 << (bl->next->addr_width + bl->next->ashift));
+ } else {
+ uint32_t mask = 1 << (bl->addr_width + bl->ashift);
+ bl->start = bl->next->start & ~(mask - 1);
+ bl->start += mask;
+ }
+ }
+ /* and fill in end address of this block */
+ bl->end = bl->start + (1 << (bl->addr_width + bl->ashift)) - 1;
+
+#ifdef DEBUG
+ printf("block # %d\n", block_num);
+ printf(" start 0x%08x\n", bl->start);
+ printf(" end 0x%08x\n", bl->end);
+ printf(" addr len %d\n", bl->addr_width);
+ printf(" data len %d\n", bl->data_width);
+#endif
+ }
+ }
+
+ return failed ? 0 : 1;
+}
+
+/**
+ * bus->driver->(*new_bus)
+ *
+ */
+static bus_t *
+fjmem_bus_new( chain_t *chain, const bus_driver_t *driver, char *params[] )
+{
+ bus_t *bus = NULL;
+ int failed = 0;
+ part_t *part;
+ char *opcode = NULL;
+ int fjmem_reg_len = 0;
+ int idx;
+
+ part = chain->parts->parts[chain->active_part];
+
+ /* parse parameters */
+ for (idx = 2; idx < cmd_params( params ); idx++) {
+ char *comma, *value;
+
+ comma = strchr( params[idx], '=' );
+ if (comma == NULL) {
+ printf( _("Wrong parameter specification: %s\n"), params[idx] );
+ continue;
+ }
+
+ /* set value and terminate parameter name string */
+ value = comma + 1;
+ *comma = '\0';
+
+ if (strcasecmp( params[idx], "opcode" ) == 0)
+ opcode = value;
+ if (strcasecmp( params[idx], "len" ) == 0) {
+ unsigned int tmp;
+ cmd_get_number( value, &tmp );
+ fjmem_reg_len = (int)tmp;
+ }
+ }
+
+ if (opcode) {
+ block_desc_t *bd;
+
+ fjmem_reg_len = fjmem_detect_reg_len( chain, part, opcode, fjmem_reg_len );
+ if (fjmem_reg_len <= 0)
+ return NULL;
+
+ bus = calloc( 1, sizeof (bus_t) );
+ if (!bus)
+ return NULL;
+
+ bus->driver = driver;
+ bus->params = calloc( 1, sizeof (bus_params_t) );
+ if (!bus->params) {
+ free( bus );
+ return NULL;
+ }
+
+ CHAIN = chain;
+ PART = chain->parts->parts[chain->active_part];
+ FJMEM_REG = part_find_data_register( PART, FJMEM_REG_NAME );
+ bd = &(BLOCK_DESC);
+ bd->blocks = NULL;
+ bd->reg_len = fjmem_reg_len;
+ bd->instr_pos = 0;
+ bd->block_pos = bd->instr_pos + 4; /* 3 bits for instruction field, 1 bit ack field */
+
+ if (fjmem_detect_fields( chain, part, bus ) > 0) {
+ if (fjmem_query_blocks( chain, part, bus ) > 0) {
+ } else
+ failed |= 1;
+ } else
+ failed |= 1;
+
+ if (failed) {
+ free( bus->params );
+ free( bus );
+ return NULL;
+ }
+ } else
+ printf( _("Parameter for instruction opcode missing.\n") );
+
+ return bus;
+}
+
+static void
+fjmem_free_blocks( block_param_t *bl )
+{
+ if (bl) {
+ fjmem_free_blocks( bl->next );
+ free( bl );
+ }
+}
+
+/**
+ * bus->driver->(*free_bus)
+ *
+ */
+static void
+fjmem_bus_free( bus_t *bus )
+{
+ data_register *dr = FJMEM_REG;
+
+ /* fill all fields with '0'
+ -> prepare idle instruction for next startup/detect */
+ part_set_instruction( PART, FJMEM_INST_NAME );
+ chain_shift_instructions( CHAIN );
+
+ register_fill( dr->in, 0 );
+ chain_shift_data_registers( CHAIN, 0 );
+
+ fjmem_free_blocks( BLOCK_DESC.blocks );
+ BLOCK_DESC.blocks = NULL;
+
+ generic_bus_free( bus );
+}
+
+/**
+ * bus->driver->(*printinfo)
+ *
+ */
+static void
+fjmem_bus_printinfo( bus_t *bus )
+{
+ int i;
+
+ for (i = 0; i < CHAIN->parts->len; i++)
+ if (PART == CHAIN->parts->parts[i])
+ break;
+ printf( _("fjmem FPGA bus driver via USER register (JTAG part No. %d)\n"), i );
+}
+
+/**
+ * bus->driver->(*prepare)
+ *
+ */
+static void
+fjmem_bus_prepare( bus_t *bus )
+{
+ if (!INITIALIZED)
+ bus_init( bus );
+
+ /* ensure FJMEM_INST is active */
+ part_set_instruction( PART, FJMEM_INST_NAME );
+ chain_shift_instructions( CHAIN );
+}
+
+static int
+block_bus_area( bus_t *bus, uint32_t adr, bus_area_t *area, block_param_t **bl_match )
+{
+ block_param_t *bl = BLOCK_DESC.blocks;
+ uint32_t prev_start;
+
+ *bl_match = NULL;
+
+ /* run through all detected/queried blocks and check if adr falls into
+ one of their ranges */
+ prev_start = 0;
+ while (bl) {
+ if ((bl->start <= adr) && (bl->end >= adr)) {
+ /* adr lies inside a matching block range */
+ area->description = NULL;
+ area->start = bl->start;
+ area->length = bl->end - bl->start + 1;
+ area->width = bl->data_width;
+ *bl_match = bl;
+ prev_start = area->start;
+ } else if (((prev_start > adr) || (prev_start == 0)) && (bl->end < adr)) {
+ /* a gap between blocks */
+ area->description = "Dummy";
+ area->start = bl->end + 1;
+ area->length = prev_start > 0 ? prev_start - (bl->end+1) : UINT64_C(0x100000000);
+ area->width = 0;
+ *bl_match = NULL;
+ prev_start = area->start;
+ } else
+ prev_start = bl->start;
+
+ bl = bl->next;
+ }
+
+ return URJTAG_STATUS_OK;
+}
+
+/**
+ * bus->driver->(*area)
+ *
+ */
+static int
+fjmem_bus_area( bus_t *bus, uint32_t adr, bus_area_t *area )
+{
+ block_param_t *bl;
+
+ return block_bus_area( bus, adr, area, &bl );
+}
+
+static void
+setup_address( bus_t *bus, uint32_t a, block_param_t *block )
+{
+ data_register *dr = FJMEM_REG;
+ block_desc_t *bd = &(BLOCK_DESC);
+ int idx;
+ uint16_t num = block->num;
+
+ LAST_ADDR = a;
+
+ /* correct address for > 8 bit data widths */
+ a >>= block->ashift;
+
+ /* set block number */
+ for (idx = 0; idx < bd->block_len; idx++) {
+ dr->in->data[bd->block_pos + idx] = num & 1;
+ num >>= 1;
+ }
+
+ /* set address */
+ for (idx = 0; idx < block->addr_width; idx++) {
+ dr->in->data[bd->addr_pos + idx] = a & 1;
+ a >>= 1;
+ }
+}
+
+static void
+setup_data( bus_t *bus, uint32_t d, block_param_t *block )
+{
+ data_register *dr = FJMEM_REG;
+ block_desc_t *bd = &(BLOCK_DESC);
+ int idx;
+
+ /* set data */
+ for (idx = 0; idx < block->data_width; idx++) {
+ dr->in->data[bd->data_pos + idx] = d & 1;
+ d >>= 1;
+ }
+}
+
+/**
+ * bus->driver->(*read_start)
+ *
+ */
+static void
+fjmem_bus_read_start( bus_t *bus, uint32_t adr )
+{
+ chain_t *chain = CHAIN;
+ block_desc_t *bd = &(BLOCK_DESC);
+ data_register *dr = FJMEM_REG;
+ bus_area_t area;
+ block_param_t *block;
+
+ block_bus_area( bus, adr, &area, &block );
+ if (!block) {
+ printf( _("Address out of range\n") );
+ LAST_ADDR = adr;
+ return;
+ }
+
+ setup_address( bus, adr, block );
+
+ /* select read instruction */
+ dr->in->data[bd->instr_pos+0] = 1;
+ dr->in->data[bd->instr_pos+1] = 0;
+ dr->in->data[bd->instr_pos+2] = 0;
+
+ chain_shift_data_registers( chain, 0 );
+}
+
+/**
+ * bus->driver->(*read_next)
+ *
+ */
+static uint32_t
+fjmem_bus_read_next( bus_t *bus, uint32_t adr )
+{
+ chain_t *chain = CHAIN;
+ block_desc_t *bd = &(BLOCK_DESC);
+ data_register *dr = FJMEM_REG;
+ uint32_t d;
+ bus_area_t area;
+ block_param_t *block;
+ int idx;
+
+ block_bus_area( bus, adr, &area, &block );
+ if (!block) {
+ printf( _("Address out of range\n") );
+ LAST_ADDR = adr;
+ return 0;
+ }
+
+ setup_address( bus, adr, block );
+ chain_shift_data_registers( chain, 1 );
+
+ /* extract data from TDO stream */
+ d = 0;
+ for (idx = 0; idx < block->data_width; idx++)
+ if (dr->out->data[bd->data_pos + idx])
+ d |= 1 << idx;
+
+ return d;
+}
+
+/**
+ * bus->driver->(*read_end)
+ *
+ */
+static uint32_t
+fjmem_bus_read_end( bus_t *bus )
+{
+ chain_t *chain = CHAIN;
+ block_desc_t *bd = &(BLOCK_DESC);
+ data_register *dr = FJMEM_REG;
+ uint32_t d;
+ bus_area_t area;
+ block_param_t *block;
+ int idx;
+
+ block_bus_area( bus, LAST_ADDR, &area, &block );
+ if (!block) {
+ printf( _("Address out of range\n") );
+ return 0;
+ }
+
+ /* prepare idle instruction to disable any spurious unintentional reads */
+ dr->in->data[bd->instr_pos+0] = 0;
+ dr->in->data[bd->instr_pos+1] = 0;
+ dr->in->data[bd->instr_pos+2] = 0;
+
+ chain_shift_data_registers( chain, 1 );
+
+ /* extract data from TDO stream */
+ d = 0;
+ for (idx = 0; idx < block->data_width; idx++)
+ if (dr->out->data[bd->data_pos + idx])
+ d |= 1 << idx;
+
+ return d;
+}
+
+/**
+ * bus->driver->(*write)
+ *
+ */
+static void
+fjmem_bus_write( bus_t *bus, uint32_t adr, uint32_t data )
+{
+ chain_t *chain = CHAIN;
+ block_desc_t *bd = &(BLOCK_DESC);
+ data_register *dr = FJMEM_REG;
+ bus_area_t area;
+ block_param_t *block;
+
+ block_bus_area( bus, adr, &area, &block );
+ if (!block) {
+ printf( _("Address out of range\n") );
+ return;
+ }
+
+ setup_address( bus, adr, block );
+ setup_data( bus, data, block );
+
+ /* select write instruction */
+ dr->in->data[bd->instr_pos+0] = 0;
+ dr->in->data[bd->instr_pos+1] = 1;
+ dr->in->data[bd->instr_pos+2] = 0;
+
+ chain_shift_data_registers( chain, 0 );
+}
+
+const bus_driver_t fjmem_bus = {
+ "fjmem",
+ N_("FPGA JTAG memory bus driver via USER register, requires parameters:\n"
+ " opcode=<USERx OPCODE> [len=<FJMEM REG LEN>]"),
+ fjmem_bus_new,
+ fjmem_bus_free,
+ fjmem_bus_printinfo,
+ fjmem_bus_prepare,
+ fjmem_bus_area,
+ fjmem_bus_read_start,
+ fjmem_bus_read_next,
+ fjmem_bus_read_end,
+ generic_bus_read,
+ fjmem_bus_write,
+ generic_bus_no_init
+};
+
+
+/*
+ Local Variables:
+ mode:C
+ tab-width:2
+ indent-tabs-mode:t
+ End:
+*/
--- /dev/null
+/*
+ * $Id$
+ *
+ * Generic bus driver utility functions
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by H Hartley Sweeten <hsweeten@visionengravers.com>, 2008.
+ *
+ */
+
+#include "sysdep.h"
+
+#include <stdlib.h>
+
+#include <jtag.h>
+
+#include "generic_bus.h"
+
+int
+generic_bus_attach_sig( part_t *part, signal_t **sig, char *id )
+{
+ int failed = URJTAG_STATUS_OK;
+
+ *sig = part_find_signal( part, id );
+ if (!*sig) {
+ printf( _("signal '%s' not found\n"), id );
+ failed = URJTAG_STATUS_FAIL;
+ }
+
+ return failed;
+}
+
+/**
+ * bus->driver->(*free_bus)
+ *
+ */
+void
+generic_bus_free( bus_t *bus )
+{
+ free( bus->params );
+ free( bus );
+}
+
+/**
+ * bus->driver->(*init)
+ *
+ */
+int
+generic_bus_no_init( bus_t *bus )
+{
+ INITIALIZED = 1;
+
+ return URJTAG_STATUS_OK;
+}
+
+/**
+ * bus->driver->(*prepare)
+ *
+ */
+void
+generic_bus_prepare_extest( bus_t *bus )
+{
+ if (!INITIALIZED)
+ bus_init( bus );
+
+ part_set_instruction( PART, "EXTEST" );
+ chain_shift_instructions( CHAIN );
+}
+
+/**
+ * bus->driver->(*read)
+ *
+ */
+uint32_t
+generic_bus_read( bus_t *bus, uint32_t adr )
+{
+ bus_read_start( bus, adr );
+ return bus_read_end( bus );
+}
--- /dev/null
+/*
+ * $Id$
+ *
+ * Generic bus driver utility functions
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by H Hartley Sweeten <hsweeten@visionengravers.com>, 2008.
+ *
+ */
+
+#ifndef GENERIC_BUS_H
+#define GENERIC_BUS_H
+
+#include "bus.h"
+
+int generic_bus_attach_sig( part_t *part, signal_t **sig, char *id );
+
+void generic_bus_free( bus_t *bus );
+int generic_bus_no_init( bus_t *bus );
+void generic_bus_prepare_extest( bus_t *bus );
+uint32_t generic_bus_read( bus_t *bus, uint32_t adr );
+
+#endif /* GENERIC_BUS_H */
--- /dev/null
+/*
+ * Copyright (C) 2005, Raphael Mack
+ * Work heavily based on file sa1110.c
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Raphael Mack <mail AT raphael-mack DOT de>
+ *
+ * Documentation:
+ * [1] MagnaChip Semiconductor Ltd. "HMS30C7202"
+ *
+ */
+
+//#include "sysdep.h"
+
+#include <stdlib.h>
+#include <stdint.h>
+#include <string.h>
+
+#include "part.h"
+#include "bus.h"
+#include "chain.h"
+#include "bssignal.h"
+#include "jtag.h"
+#include "buses.h"
+#include "generic_bus.h"
+
+typedef struct {
+ signal_t *a[25];
+ signal_t *d[32];
+ signal_t *nRCS[4];
+ signal_t *nRWE[4];
+ signal_t *nROE;
+} bus_params_t;
+
+#define A ((bus_params_t *) bus->params)->a
+#define D ((bus_params_t *) bus->params)->d
+#define nRCS ((bus_params_t *) bus->params)->nRCS
+#define nRWE ((bus_params_t *) bus->params)->nRWE
+#define nROE ((bus_params_t *) bus->params)->nROE
+
+/**
+ * bus->driver->(*new_bus)
+ *
+ */
+static bus_t *
+h7202_bus_new( chain_t *chain, const bus_driver_t *driver, char *cmd_params[] )
+{
+ bus_t *bus;
+ part_t *part;
+ char buff[10];
+ int i;
+ int failed = 0;
+
+ bus = calloc( 1, sizeof (bus_t) );
+ if (!bus)
+ return NULL;
+
+ bus->driver = driver;
+ bus->params = calloc( 1, sizeof (bus_params_t) );
+ if (!bus->params) {
+ free( bus );
+ return NULL;
+ }
+
+ CHAIN = chain;
+ PART = part = chain->parts->parts[chain->active_part];
+
+ for (i = 0; i < 25; i++) {
+ sprintf( buff, "RA%d", i );
+ failed |= generic_bus_attach_sig( part, &(A[i]), buff );
+ }
+
+ for (i = 0; i < 32; i++) {
+ sprintf( buff, "RD%d", i );
+ failed |= generic_bus_attach_sig( part, &(D[i]), buff );
+ }
+
+ for (i = 0; i < 4; i++) {
+ sprintf( buff, "nRCS%d", i );
+ failed |= generic_bus_attach_sig( part, &(nRCS[i]), buff );
+ }
+
+ failed |= generic_bus_attach_sig( part, &(nROE), "nROE" );
+
+ for (i = 0; i < 4; i++){
+ sprintf( buff, "nRWE%d", i);
+ failed |= generic_bus_attach_sig( part, &(nRWE[i]), buff );
+ }
+
+ if (failed) {
+ free( bus->params );
+ free( bus );
+ return NULL;
+ }
+
+ return bus;
+}
+
+/**
+ * bus->driver->(*printinfo)
+ *
+ */
+static void
+h7202_bus_printinfo( bus_t *bus )
+{
+ int i;
+
+ for (i = 0; i < CHAIN->parts->len; i++)
+ if (PART == CHAIN->parts->parts[i])
+ break;
+ printf( "H7202 compatible bus driver via BSR (JTAG part No. %d)\n", i );
+}
+
+/**
+ * bus->driver->(*area)
+ *
+ */
+static int
+h7202_bus_area( bus_t *bus, uint32_t adr, bus_area_t *area )
+{
+ area->description = NULL;
+ area->start = UINT32_C(0x00000000);
+ area->length = UINT64_C(0x100000000);
+ area->width = 16; //part_get_signal( PART, part_find_signal( PART, "ROM_SEL" ) ) ? 32 : 16;
+
+ return URJTAG_STATUS_OK;
+}
+
+static void
+setup_address( bus_t *bus, uint32_t a )
+{
+ int i;
+ part_t *p = PART;
+
+ for (i = 0; i < 26; i++)
+ part_set_signal( p, A[i], 1, (a >> i) & 1 );
+}
+
+static void
+set_data_in( bus_t *bus )
+{
+ int i;
+ part_t *p = PART;
+ bus_area_t area;
+
+ h7202_bus_area( bus, 0, &area );
+
+ for (i = 0; i < area.width; i++)
+ part_set_signal( p, D[i], 0, 0 );
+}
+
+static void
+setup_data( bus_t *bus, uint32_t d )
+{
+ int i;
+ part_t *p = PART;
+ bus_area_t area;
+
+ h7202_bus_area( bus, 0, &area );
+
+ for (i = 0; i < area.width; i++)
+ part_set_signal( p, D[i], 1, (d >> i) & 1 );
+}
+
+/**
+ * bus->driver->(*read_start)
+ *
+ */
+static void
+h7202_bus_read_start( bus_t *bus, uint32_t adr )
+{
+ /* see Figure 10-12 in [1] */
+ part_t *p = PART;
+ chain_t *chain = CHAIN;
+
+ part_set_signal( p, nRCS[0], 1, 0 );
+ part_set_signal( p, nRCS[1], 1, 1 );
+ part_set_signal( p, nRCS[2], 1, 1 );
+ part_set_signal( p, nRCS[3], 1, 1 );
+ part_set_signal( p, nRWE[0], 1, 1 );
+ part_set_signal( p, nROE, 1, 0 );
+
+ setup_address( bus, adr );
+ set_data_in( bus );
+
+ chain_shift_data_registers( chain, 0 );
+}
+
+/**
+ * bus->driver->(*read_next)
+ *
+ */
+static uint32_t
+h7202_bus_read_next( bus_t *bus, uint32_t adr )
+{
+ /* see Figure 10-12 in [1] */
+ part_t *p = PART;
+ chain_t *chain = CHAIN;
+ int i;
+ uint32_t d = 0;
+ bus_area_t area;
+
+ h7202_bus_area( bus, adr, &area );
+
+ setup_address( bus, adr );
+ chain_shift_data_registers( chain, 1 );
+
+ for (i = 0; i < area.width; i++)
+ d |= (uint32_t) (part_get_signal( p, D[i] ) << i);
+
+ return d;
+}
+
+/**
+ * bus->driver->(*read_end)
+ *
+ */
+static uint32_t
+h7202_bus_read_end( bus_t *bus )
+{
+ /* see Figure 10-12 in [1] */
+ part_t *p = PART;
+ chain_t *chain = CHAIN;
+ int i;
+ uint32_t d = 0;
+ bus_area_t area;
+
+ h7202_bus_area( bus, 0, &area );
+
+ part_set_signal( p, nRCS[0], 1, 1 );
+ part_set_signal( p, nRCS[1], 1, 1 );
+ part_set_signal( p, nRCS[2], 1, 1 );
+ part_set_signal( p, nRCS[3], 1, 1 );
+ part_set_signal( p, nROE, 1, 1 );
+ chain_shift_data_registers( chain, 1 );
+
+ for (i = 0; i < area.width; i++)
+ d |= (uint32_t) (part_get_signal( p, D[i] ) << i);
+
+ return d;
+}
+
+/**
+ * bus->driver->(*write)
+ *
+ */
+static void
+h7202_bus_write( bus_t *bus, uint32_t adr, uint32_t data )
+{
+ /* see Figure 10-16 in [1] */
+ part_t *p = PART;
+ chain_t *chain = CHAIN;
+
+ // part_set_signal( p, nRCS[0], 1, (adr >> 27) != 0 );
+ //part_set_signal( p, nRCS[1], 1, (adr >> 27) != 1 );
+ //part_set_signal( p, nRCS[2], 1, (adr >> 27) != 2 );
+ //part_set_signal( p, nRCS[3], 1, (adr >> 27) != 3 );
+ part_set_signal( p, nRCS[0], 1, 0 );
+ part_set_signal( p, nRCS[1], 1, 1 );
+ part_set_signal( p, nRCS[2], 1, 1 );
+ part_set_signal( p, nRCS[3], 1, 1 );
+
+ part_set_signal( p, nRWE[0], 1, 0 );
+ part_set_signal( p, nRWE[1], 1, 1 );
+ part_set_signal( p, nRWE[2], 1, 1 );
+ part_set_signal( p, nRWE[3], 1, 1 );
+ part_set_signal( p, nROE, 1, 1 );
+
+ setup_address( bus, adr );
+ setup_data( bus, data );
+
+ chain_shift_data_registers( chain, 0 );
+
+ part_set_signal( p, nRWE[0], 1, 1 );
+ part_set_signal( p, nRCS[0], 1, 1 );
+ part_set_signal( p, nRCS[1], 1, 1 );
+ part_set_signal( p, nRCS[2], 1, 1 );
+ part_set_signal( p, nRCS[3], 1, 1 );
+ chain_shift_data_registers( chain, 0 );
+}
+
+const bus_driver_t h7202_bus = {
+ "h7202",
+ "H7202 compatible bus driver via BSR",
+ h7202_bus_new,
+ generic_bus_free,
+ h7202_bus_printinfo,
+ generic_bus_prepare_extest,
+ h7202_bus_area,
+ h7202_bus_read_start,
+ h7202_bus_read_next,
+ h7202_bus_read_end,
+ generic_bus_read,
+ h7202_bus_write,
+ generic_bus_no_init
+};
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2002 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Christian Pellegrin <chri@ascensit.com>, 2003.
+ * Modified by Marcel Telka <marcel@telka.sk>, 2003.
+ *
+ */
+
+#include "sysdep.h"
+
+#include <stdlib.h>
+#include <stdint.h>
+#include <string.h>
+
+#include "part.h"
+#include "bus.h"
+#include "chain.h"
+#include "bssignal.h"
+#include "jtag.h"
+#include "buses.h"
+#include "generic_bus.h"
+
+typedef struct {
+ signal_t *ex_cs[8];
+ signal_t *ex_addr[24];
+ signal_t *ex_data[16];
+ signal_t *ex_wr;
+ signal_t *ex_rd;
+} bus_params_t;
+
+#define EX_CS ((bus_params_t *) bus->params)->ex_cs
+#define EX_ADDR ((bus_params_t *) bus->params)->ex_addr
+#define EX_DATA ((bus_params_t *) bus->params)->ex_data
+#define EX_WR ((bus_params_t *) bus->params)->ex_wr
+#define EX_RD ((bus_params_t *) bus->params)->ex_rd
+
+/**
+ * bus->driver->(*new_bus)
+ *
+ */
+static bus_t *
+ixp425_bus_new( chain_t *chain, const bus_driver_t *driver, char *cmd_params[] )
+{
+ bus_t *bus;
+ part_t *part;
+ char buff[15];
+ int i;
+ int failed = 0;
+
+ bus = calloc( 1, sizeof (bus_t) );
+ if (!bus)
+ return NULL;
+
+ bus->driver = driver;
+ bus->params = calloc( 1, sizeof (bus_params_t) );
+ if (!bus->params) {
+ free( bus );
+ return NULL;
+ }
+
+ CHAIN = chain;
+ PART = part = chain->parts->parts[chain->active_part];
+
+ for (i = 0; i < 8; i++) {
+ sprintf( buff, "EX_CS[%d]", i );
+ failed |= generic_bus_attach_sig( part, &(EX_CS[i]), buff );
+ }
+
+ for (i = 0; i < 24; i++) {
+ sprintf( buff, "EX_ADDR[%d]", i );
+ failed |= generic_bus_attach_sig( part, &(EX_ADDR[i]), buff );
+ }
+
+ for (i = 0; i < 16; i++) {
+ sprintf( buff, "EX_DATA[%d]", i );
+ failed |= generic_bus_attach_sig( part, &(EX_DATA[i]), buff );
+ }
+
+ failed |= generic_bus_attach_sig( part, &(EX_WR), "EX_WR" );
+
+ failed |= generic_bus_attach_sig( part, &(EX_RD), "EX_RD" );
+
+ if (failed) {
+ free( bus->params );
+ free( bus );
+ return NULL;
+ }
+
+ return bus;
+}
+
+/**
+ * bus->driver->(*printinfo)
+ *
+ */
+static void
+ixp425_bus_printinfo( bus_t *bus )
+{
+ int i;
+
+ for (i = 0; i < CHAIN->parts->len; i++)
+ if (PART == CHAIN->parts->parts[i])
+ break;
+ printf( _("Intel IXP425 compatible bus driver via BSR (JTAG part No. %d)\n"), i );
+}
+
+/**
+ * bus->driver->(*area)
+ *
+ */
+static int
+ixp425_bus_area( bus_t *bus, uint32_t adr, bus_area_t *area )
+{
+ area->description = NULL;
+ area->start = UINT32_C(0x00000000);
+ area->length = UINT64_C(0x100000000);
+ area->width = 16;
+
+ return URJTAG_STATUS_OK;
+}
+
+static void
+select_flash( bus_t *bus )
+{
+ part_t *p = PART;
+
+ part_set_signal( p, EX_CS[0], 1, 0 );
+ part_set_signal( p, EX_CS[1], 1, 1 );
+ part_set_signal( p, EX_CS[2], 1, 1 );
+ part_set_signal( p, EX_CS[3], 1, 1 );
+ part_set_signal( p, EX_CS[4], 1, 1 );
+ part_set_signal( p, EX_CS[5], 1, 1 );
+ part_set_signal( p, EX_CS[6], 1, 1 );
+ part_set_signal( p, EX_CS[7], 1, 1 );
+}
+
+static void
+unselect_flash( bus_t *bus )
+{
+ part_t *p = PART;
+
+ part_set_signal( p, EX_CS[0], 1, 1 );
+ part_set_signal( p, EX_CS[1], 1, 1 );
+ part_set_signal( p, EX_CS[2], 1, 1 );
+ part_set_signal( p, EX_CS[3], 1, 1 );
+ part_set_signal( p, EX_CS[4], 1, 1 );
+ part_set_signal( p, EX_CS[5], 1, 1 );
+ part_set_signal( p, EX_CS[6], 1, 1 );
+ part_set_signal( p, EX_CS[7], 1, 1 );
+}
+
+static void
+setup_address( bus_t *bus, uint32_t a )
+{
+ int i;
+ part_t *p = PART;
+
+ for (i = 0; i < 24; i++)
+ part_set_signal( p, EX_ADDR[i], 1, (a >> i) & 1 );
+}
+
+static void
+set_data_in( bus_t *bus )
+{
+ int i;
+ part_t *p = PART;
+
+ for (i = 0; i < 16; i++)
+ part_set_signal( p, EX_DATA[i], 0, 0 );
+}
+
+static void
+setup_data( bus_t *bus, uint32_t d )
+{
+ int i;
+ part_t *p = PART;
+
+ for (i = 0; i < 16; i++)
+ part_set_signal( p, EX_DATA[i], 1, (d >> i) & 1 );
+}
+
+/**
+ * bus->driver->(*read_start)
+ *
+ */
+static void
+ixp425_bus_read_start( bus_t *bus, uint32_t adr )
+{
+ part_t *p = PART;
+ chain_t *chain = CHAIN;
+
+ select_flash( bus );
+ part_set_signal( p, EX_RD, 1, 0 );
+ part_set_signal( p, EX_WR, 1, 1 );
+
+ setup_address( bus, adr );
+ set_data_in( bus );
+
+ chain_shift_data_registers( chain, 0 );
+}
+
+/**
+ * bus->driver->(*read_next)
+ *
+ */
+static uint32_t
+ixp425_bus_read_next( bus_t *bus, uint32_t adr )
+{
+ part_t *p = PART;
+ chain_t *chain = CHAIN;
+ int i;
+ uint32_t d = 0;
+
+ setup_address( bus, adr );
+ chain_shift_data_registers( chain, 1 );
+
+ for (i = 0; i < 16; i++)
+ d |= (uint32_t) (part_get_signal( p, EX_DATA[i] ) << i);
+
+ return d;
+}
+
+/**
+ * bus->driver->(*read_end)
+ *
+ */
+static uint32_t
+ixp425_bus_read_end( bus_t *bus )
+{
+ part_t *p = PART;
+ chain_t *chain = CHAIN;
+ int i;
+ uint32_t d = 0;
+
+ unselect_flash( bus );
+ part_set_signal( p, EX_RD, 1, 1 );
+ part_set_signal( p, EX_WR, 1, 1 );
+
+ chain_shift_data_registers( chain, 1 );
+
+ for (i = 0; i < 16; i++)
+ d |= (uint32_t) (part_get_signal( p, EX_DATA[i] ) << i);
+
+ return d;
+}
+
+/**
+ * bus->driver->(*write)
+ *
+ */
+static void
+ixp425_bus_write( bus_t *bus, uint32_t adr, uint32_t data )
+{
+ part_t *p = PART;
+ chain_t *chain = CHAIN;
+
+ select_flash( bus );
+ part_set_signal( p, EX_RD, 1, 1 );
+
+ setup_address( bus, adr );
+ setup_data( bus, data );
+
+ chain_shift_data_registers( chain, 0 );
+
+ part_set_signal( p, EX_WR, 1, 0 );
+ chain_shift_data_registers( chain, 0 );
+ part_set_signal( p, EX_WR, 1, 1 );
+ unselect_flash( bus );
+ chain_shift_data_registers( chain, 0 );
+}
+
+const bus_driver_t ixp425_bus = {
+ "ixp425",
+ N_("Intel IXP425 compatible bus driver via BSR"),
+ ixp425_bus_new,
+ generic_bus_free,
+ ixp425_bus_printinfo,
+ generic_bus_prepare_extest,
+ ixp425_bus_area,
+ ixp425_bus_read_start,
+ ixp425_bus_read_next,
+ ixp425_bus_read_end,
+ generic_bus_read,
+ ixp425_bus_write,
+ generic_bus_no_init
+};
--- /dev/null
+/*
+ * $Id$
+ *
+ * Bus driver for the Cyclone Boards manufactured by JOP.design.
+ *
+ * http://www.jopdesign.com/
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Arnim Laeuger <arniml@users.sourceforge.net>, 2005.
+ *
+ * Notes:
+ * ------
+ * This driver supports both RAMs and the Flash memory found on
+ * the Cyclone Boards. So far, it has been tested with the EP1C12
+ * board - the CYCBIG1M32M product. In general, the board equipped
+ * with the EP1C6 should work without any modifications of this
+ * driver. You will definitely require a proper device description
+ * for the EP1C6Q240.
+ *
+ * http://jopdesign.com/cyclone/cyc.pdf
+ *
+ * The three external components are assigned different address
+ * ranges. These are arbtitrary but help to distinguish the devices.
+ *
+ * RAMA: 0x00000000 - 0x0007FFFF
+ * RAMB: 0x00080000 - 0x000FFFFF
+ * Flash: 0x00100000 - 0x0017FFFF
+ *
+ * JTAG Tool generates byte addresses when accessing memories. Thus
+ * this driver discards the LSB when the RAM ranges are addressed.
+ * readmem and writemem care for proper address increment based on
+ * the bus width.
+ * On the other hand, this driver reads and writes always one word
+ * (= 2 bytes) from/to the RAMs. It does not use the byte-enables.
+ * This is mainly due to the lack of byte-enable information in the
+ * bus-driver API.
+ *
+ * Remember to clarify the endianess of your data when working with
+ * the RAMs.
+ *
+ */
+
+#include "sysdep.h"
+
+#include <stdlib.h>
+#include <stdint.h>
+#include <string.h>
+
+#include "part.h"
+#include "bus.h"
+#include "chain.h"
+#include "bssignal.h"
+#include "jtag.h"
+#include "buses.h"
+#include "generic_bus.h"
+#include "state.h"
+
+#define RAM_ADDR_WIDTH 18
+#define RAM_DATA_WIDTH 16
+#define FLASH_ADDR_WIDTH 19
+#define FLASH_DATA_WIDTH 8
+
+/* length is in number of bytes
+ the full address width is taken to build the power of 2 */
+#define RAM_LENGTH (1 << (RAM_ADDR_WIDTH+1))
+#define FLASH_LENGTH (1 << FLASH_ADDR_WIDTH)
+
+#define RAMA_START 0
+#define RAMB_START RAM_LENGTH
+#define FLASH_START 2*RAM_LENGTH
+
+typedef enum {RAM, FLASH, NAND} ctype_t;
+
+typedef struct {
+ ctype_t ctype;
+ char *cname;
+ signal_t *a[FLASH_ADDR_WIDTH];
+ signal_t *d[RAM_DATA_WIDTH];
+ signal_t *ncs;
+ signal_t *noe;
+ signal_t *nwe;
+ signal_t *nlb;
+ signal_t *nub;
+ signal_t *ncs2;
+ signal_t *nrdy;
+} component_t;
+
+typedef struct {
+ uint32_t last_addr; /* holds last address of read or write access */
+ component_t rama;
+ component_t ramb;
+ component_t flash;
+ signal_t *ser_txd;
+ signal_t *ser_nrts;
+ signal_t *ser_rxd;
+ signal_t *ser_ncts;
+} bus_params_t;
+
+#define LAST_ADDR ((bus_params_t *) bus->params)->last_addr
+#define A comp->a
+#define D comp->d
+#define nCS comp->ncs
+#define nOE comp->noe
+#define nWE comp->nwe
+#define nLB comp->nlb
+#define nUB comp->nub
+#define nCS2 comp->ncs2
+#define nRDY comp->nrdy
+
+#define COMP_RAMA &(((bus_params_t *) bus->params)->rama)
+#define COMP_RAMB &(((bus_params_t *) bus->params)->ramb)
+#define COMP_FLASH &(((bus_params_t *) bus->params)->flash)
+
+#define SER_RXD ((bus_params_t *) bus->params)->ser_rxd
+#define SER_NRTS ((bus_params_t *) bus->params)->ser_nrts
+#define SER_TXD ((bus_params_t *) bus->params)->ser_txd
+#define SER_NCTS ((bus_params_t *) bus->params)->ser_ncts
+
+/**
+ * bus->driver->(*new_bus)
+ *
+ */
+static bus_t *
+jopcyc_bus_new( chain_t *chain, const bus_driver_t *driver, char *cmd_params[] )
+{
+ bus_t *bus;
+ part_t *part;
+ int failed = 0;
+ component_t *comp;
+
+ bus = calloc( 1, sizeof (bus_t) );
+ if (!bus)
+ return NULL;
+
+ bus->driver = driver;
+ bus->params = calloc( 1, sizeof (bus_params_t) );
+ if (!bus->params) {
+ free( bus );
+ return NULL;
+ }
+
+ CHAIN = chain;
+ PART = part = chain->parts->parts[chain->active_part];
+
+ /*
+ * Setup RAMA
+ */
+ comp = COMP_RAMA;
+ comp->ctype = RAM;
+ comp->cname = "RAMA";
+
+ failed |= generic_bus_attach_sig( part, &(A[ 0]), "IO64" );
+ failed |= generic_bus_attach_sig( part, &(A[ 1]), "IO66" );
+ failed |= generic_bus_attach_sig( part, &(A[ 2]), "IO68" );
+ failed |= generic_bus_attach_sig( part, &(A[ 3]), "IO74" );
+ failed |= generic_bus_attach_sig( part, &(A[ 4]), "IO76" );
+ failed |= generic_bus_attach_sig( part, &(A[ 5]), "IO107" );
+ failed |= generic_bus_attach_sig( part, &(A[ 6]), "IO113" );
+ failed |= generic_bus_attach_sig( part, &(A[ 7]), "IO115" );
+ failed |= generic_bus_attach_sig( part, &(A[ 8]), "IO117" );
+ failed |= generic_bus_attach_sig( part, &(A[ 9]), "IO119" );
+ failed |= generic_bus_attach_sig( part, &(A[10]), "IO118" );
+ failed |= generic_bus_attach_sig( part, &(A[11]), "IO116" );
+ failed |= generic_bus_attach_sig( part, &(A[12]), "IO114" );
+ failed |= generic_bus_attach_sig( part, &(A[13]), "IO108" );
+ failed |= generic_bus_attach_sig( part, &(A[14]), "IO106" );
+ failed |= generic_bus_attach_sig( part, &(A[15]), "IO67" );
+ failed |= generic_bus_attach_sig( part, &(A[16]), "IO65" );
+ failed |= generic_bus_attach_sig( part, &(A[17]), "IO63" );
+ A[18] = NULL;
+
+ failed |= generic_bus_attach_sig( part, &(D[ 0]), "IO82" );
+ failed |= generic_bus_attach_sig( part, &(D[ 1]), "IO84" );
+ failed |= generic_bus_attach_sig( part, &(D[ 2]), "IO86" );
+ failed |= generic_bus_attach_sig( part, &(D[ 3]), "IO88" );
+ failed |= generic_bus_attach_sig( part, &(D[ 4]), "IO94" );
+ failed |= generic_bus_attach_sig( part, &(D[ 5]), "IO98" );
+ failed |= generic_bus_attach_sig( part, &(D[ 6]), "IO100" );
+ failed |= generic_bus_attach_sig( part, &(D[ 7]), "IO104" );
+ failed |= generic_bus_attach_sig( part, &(D[ 8]), "IO101" );
+ failed |= generic_bus_attach_sig( part, &(D[ 9]), "IO99" );
+ failed |= generic_bus_attach_sig( part, &(D[10]), "IO95" );
+ failed |= generic_bus_attach_sig( part, &(D[11]), "IO93" );
+ failed |= generic_bus_attach_sig( part, &(D[12]), "IO87" );
+ failed |= generic_bus_attach_sig( part, &(D[13]), "IO85" );
+ failed |= generic_bus_attach_sig( part, &(D[14]), "IO83" );
+ failed |= generic_bus_attach_sig( part, &(D[15]), "IO79" );
+
+ failed |= generic_bus_attach_sig( part, &(nCS), "IO78" );
+ failed |= generic_bus_attach_sig( part, &(nOE), "IO73" );
+ failed |= generic_bus_attach_sig( part, &(nWE), "IO105" );
+ failed |= generic_bus_attach_sig( part, &(nLB), "IO77" );
+ failed |= generic_bus_attach_sig( part, &(nUB), "IO75" );
+ nCS2 = NULL;
+ nRDY = NULL;
+
+ /*
+ * Setup RAMB
+ */
+ comp = COMP_RAMB;
+ comp->ctype = RAM;
+ comp->cname = "RAMB";
+
+ failed |= generic_bus_attach_sig( part, &(A[ 0]), "IO237" );
+ failed |= generic_bus_attach_sig( part, &(A[ 1]), "IO235" );
+ failed |= generic_bus_attach_sig( part, &(A[ 2]), "IO233" );
+ failed |= generic_bus_attach_sig( part, &(A[ 3]), "IO227" );
+ failed |= generic_bus_attach_sig( part, &(A[ 4]), "IO225" );
+ failed |= generic_bus_attach_sig( part, &(A[ 5]), "IO194" );
+ failed |= generic_bus_attach_sig( part, &(A[ 6]), "IO188" );
+ failed |= generic_bus_attach_sig( part, &(A[ 7]), "IO186" );
+ failed |= generic_bus_attach_sig( part, &(A[ 8]), "IO184" );
+ failed |= generic_bus_attach_sig( part, &(A[ 9]), "IO182" );
+ failed |= generic_bus_attach_sig( part, &(A[10]), "IO183" );
+ failed |= generic_bus_attach_sig( part, &(A[11]), "IO185" );
+ failed |= generic_bus_attach_sig( part, &(A[12]), "IO187" );
+ failed |= generic_bus_attach_sig( part, &(A[13]), "IO193" );
+ failed |= generic_bus_attach_sig( part, &(A[14]), "IO195" );
+ failed |= generic_bus_attach_sig( part, &(A[15]), "IO234" );
+ failed |= generic_bus_attach_sig( part, &(A[16]), "IO236" );
+ failed |= generic_bus_attach_sig( part, &(A[17]), "IO238" );
+ A[18] = NULL;
+
+ failed |= generic_bus_attach_sig( part, &(D[ 0]), "IO219" );
+ failed |= generic_bus_attach_sig( part, &(D[ 1]), "IO217" );
+ failed |= generic_bus_attach_sig( part, &(D[ 2]), "IO215" );
+ failed |= generic_bus_attach_sig( part, &(D[ 3]), "IO213" );
+ failed |= generic_bus_attach_sig( part, &(D[ 4]), "IO207" );
+ failed |= generic_bus_attach_sig( part, &(D[ 5]), "IO203" );
+ failed |= generic_bus_attach_sig( part, &(D[ 6]), "IO201" );
+ failed |= generic_bus_attach_sig( part, &(D[ 7]), "IO197" );
+ failed |= generic_bus_attach_sig( part, &(D[ 8]), "IO200" );
+ failed |= generic_bus_attach_sig( part, &(D[ 9]), "IO202" );
+ failed |= generic_bus_attach_sig( part, &(D[10]), "IO206" );
+ failed |= generic_bus_attach_sig( part, &(D[11]), "IO208" );
+ failed |= generic_bus_attach_sig( part, &(D[12]), "IO214" );
+ failed |= generic_bus_attach_sig( part, &(D[13]), "IO216" );
+ failed |= generic_bus_attach_sig( part, &(D[14]), "IO218" );
+ failed |= generic_bus_attach_sig( part, &(D[15]), "IO222" );
+
+ failed |= generic_bus_attach_sig( part, &(nCS), "IO223" );
+ failed |= generic_bus_attach_sig( part, &(nOE), "IO228" );
+ failed |= generic_bus_attach_sig( part, &(nWE), "IO196" );
+ failed |= generic_bus_attach_sig( part, &(nLB), "IO224" );
+ failed |= generic_bus_attach_sig( part, &(nUB), "IO226" );
+ nCS2 = NULL;
+ nRDY = NULL;
+
+ /*
+ * Setup FLASH
+ */
+ comp = COMP_FLASH;
+ comp->ctype = FLASH;
+ comp->cname = "FLASH";
+
+ failed |= generic_bus_attach_sig( part, &(A[ 0]), "IO47" );
+ failed |= generic_bus_attach_sig( part, &(A[ 1]), "IO48" );
+ failed |= generic_bus_attach_sig( part, &(A[ 2]), "IO49" );
+ failed |= generic_bus_attach_sig( part, &(A[ 3]), "IO50" );
+ failed |= generic_bus_attach_sig( part, &(A[ 4]), "IO125" );
+ failed |= generic_bus_attach_sig( part, &(A[ 5]), "IO127" );
+ failed |= generic_bus_attach_sig( part, &(A[ 6]), "IO131" );
+ failed |= generic_bus_attach_sig( part, &(A[ 7]), "IO133" );
+ failed |= generic_bus_attach_sig( part, &(A[ 8]), "IO158" );
+ failed |= generic_bus_attach_sig( part, &(A[ 9]), "IO16" );
+ failed |= generic_bus_attach_sig( part, &(A[10]), "IO20" );
+ failed |= generic_bus_attach_sig( part, &(A[11]), "IO14" );
+ failed |= generic_bus_attach_sig( part, &(A[12]), "IO135" );
+ failed |= generic_bus_attach_sig( part, &(A[13]), "IO156" );
+ failed |= generic_bus_attach_sig( part, &(A[14]), "IO144" );
+ failed |= generic_bus_attach_sig( part, &(A[15]), "IO137" );
+ failed |= generic_bus_attach_sig( part, &(A[16]), "IO139" );
+ failed |= generic_bus_attach_sig( part, &(A[17]), "IO143" );
+ failed |= generic_bus_attach_sig( part, &(A[18]), "IO141" );
+
+ failed |= generic_bus_attach_sig( part, &(D[ 0]), "IO46" );
+ failed |= generic_bus_attach_sig( part, &(D[ 1]), "IO45" );
+ failed |= generic_bus_attach_sig( part, &(D[ 2]), "IO44" );
+ failed |= generic_bus_attach_sig( part, &(D[ 3]), "IO165" );
+ failed |= generic_bus_attach_sig( part, &(D[ 4]), "IO164" );
+ failed |= generic_bus_attach_sig( part, &(D[ 5]), "IO17" );
+ failed |= generic_bus_attach_sig( part, &(D[ 6]), "IO18" );
+ failed |= generic_bus_attach_sig( part, &(D[ 7]), "IO19" );
+ D[ 8] = NULL;
+ D[ 9] = NULL;
+ D[10] = NULL;
+ D[11] = NULL;
+ D[12] = NULL;
+ D[13] = NULL;
+ D[14] = NULL;
+ D[15] = NULL;
+
+ failed |= generic_bus_attach_sig( part, &(nWE), "IO15" );
+ failed |= generic_bus_attach_sig( part, &(nOE), "IO24" );
+ failed |= generic_bus_attach_sig( part, &(nCS), "IO37" );
+ failed |= generic_bus_attach_sig( part, &(nCS2), "IO23" );
+
+ /* CLK1 is not observable :-(
+ failed |= generic_bus_attach_sig( part, &(nRDY), "CLK1" );
+ */
+ nRDY = NULL;
+
+ nLB = NULL;
+ nUB = NULL;
+
+ /*
+ * Setup Serial Port
+ */
+ failed |= generic_bus_attach_sig( part, &(SER_RXD), "CLK2" );
+ failed |= generic_bus_attach_sig( part, &(SER_NRTS), "IO177" );
+ failed |= generic_bus_attach_sig( part, &(SER_TXD), "IO178" );
+ failed |= generic_bus_attach_sig( part, &(SER_NCTS), "CLK0" );
+
+ if (failed) {
+ free( bus->params );
+ free( bus );
+ return NULL;
+ }
+
+ return bus;
+}
+
+/**
+ * bus->driver->(*printinfo)
+ *
+ */
+static void
+jopcyc_bus_printinfo( bus_t *bus )
+{
+ int i;
+
+ for (i = 0; i < CHAIN->parts->len; i++)
+ if (PART == CHAIN->parts->parts[i])
+ break;
+ printf( _("JOP.design Cyclone Board compatible bus driver via BSR (JTAG part No. %d)\n"), i );
+}
+
+static void
+setup_address( bus_t *bus, uint32_t a, component_t *comp )
+{
+ int i;
+ part_t *p = PART;
+ int addr_width;
+
+ LAST_ADDR = a;
+
+ switch (comp->ctype) {
+ case RAM:
+ addr_width = RAM_ADDR_WIDTH;
+ /* address a is a byte address so it is transferred into
+ a word address here */
+ a >>= 1;
+ break;
+ case FLASH:
+ addr_width = FLASH_ADDR_WIDTH;
+ break;
+ default:
+ addr_width = 0;
+ break;
+ }
+
+ for (i = 0; i < addr_width; i++)
+ part_set_signal( p, A[i], 1, (a >> i) & 1 );
+}
+
+static int
+detect_data_width( component_t *comp )
+{
+ int width;
+
+ switch (comp->ctype) {
+ case RAM:
+ width = RAM_DATA_WIDTH;
+ break;
+ case FLASH:
+ width = FLASH_DATA_WIDTH;
+ break;
+ default:
+ width = 0;
+ break;
+ }
+
+ return width;
+}
+
+static void
+set_data_in( bus_t *bus, component_t *comp )
+{
+ int i;
+ part_t *p = PART;
+ int width;
+
+ width = detect_data_width( comp );
+
+ for (i = 0; i < width; i++)
+ part_set_signal( p, D[i], 0, 0 );
+}
+
+static void
+setup_data( bus_t *bus, uint32_t d, component_t *comp )
+{
+ int i;
+ part_t *p = PART;
+ int width;
+
+ width = detect_data_width( comp );
+
+ for (i = 0; i < width; i++)
+ part_set_signal( p, D[i], 1, (d >> i) & 1 );
+}
+
+/**
+ * bus->driver->(*init)
+ *
+ */
+static int
+jopcyc_bus_init( bus_t *bus )
+{
+ part_t *p = PART;
+ chain_t *chain = CHAIN;
+ component_t *comp;
+
+ if (tap_state(chain) != Run_Test_Idle) {
+ /* silently skip initialization if TAP isn't in RUNTEST/IDLE state
+ this is required to avoid interfering with detect when initbus
+ is contained in the part description file
+ bus_init() will be called latest by bus_prepare() */
+ return URJTAG_STATUS_OK;
+ }
+
+ /* Preload update registers
+ See AN039, "Guidelines for IEEE Std. 1149.1 Boundary Scan Testing */
+
+ part_set_instruction( p, "SAMPLE/PRELOAD" );
+ chain_shift_instructions( chain );
+
+ /* RAMA */
+ comp = COMP_RAMA;
+ set_data_in( bus, comp );
+ part_set_signal( p, nCS, 1, 1 );
+ part_set_signal( p, nWE, 1, 1 );
+ part_set_signal( p, nOE, 1, 1 );
+ part_set_signal( p, nLB, 1, 1 );
+ part_set_signal( p, nUB, 1, 1 );
+
+ /* RAMB */
+ comp = COMP_RAMB;
+ set_data_in( bus, comp );
+ part_set_signal( p, nCS, 1, 1 );
+ part_set_signal( p, nWE, 1, 1 );
+ part_set_signal( p, nOE, 1, 1 );
+ part_set_signal( p, nLB, 1, 1 );
+ part_set_signal( p, nUB, 1, 1 );
+
+ /* FLASH */
+ comp = COMP_FLASH;
+ set_data_in( bus, comp );
+ part_set_signal( p, nCS, 1, 1 );
+ part_set_signal( p, nWE, 1, 1 );
+ part_set_signal( p, nOE, 1, 1 );
+ part_set_signal( p, nCS2, 1, 1 );
+ part_set_signal( p, nRDY, 0, 0 );
+
+ /* Serial Port */
+ part_set_signal( p, SER_RXD, 0, 0 );
+ part_set_signal( p, SER_NRTS, 1, 1 );
+ part_set_signal( p, SER_TXD, 1, 1 );
+ part_set_signal( p, SER_NCTS, 0, 0 );
+
+ chain_shift_data_registers( chain, 0 );
+
+ INITIALIZED = 1;
+
+ return URJTAG_STATUS_OK;
+}
+
+static int
+comp_bus_area( bus_t *bus, uint32_t adr, bus_area_t *area, component_t **comp )
+{
+ if (adr < RAMB_START) {
+ area->description = "RAMA Component";
+ area->start = RAMA_START;
+ area->length = RAM_LENGTH;
+ area->width = RAM_DATA_WIDTH;
+ *comp = COMP_RAMA;
+ } else if (adr < FLASH_START) {
+ area->description = "RAMB Component";
+ area->start = RAMB_START;
+ area->length = RAM_LENGTH;
+ area->width = RAM_DATA_WIDTH;
+ *comp = COMP_RAMB;
+ } else if (adr < FLASH_START + FLASH_LENGTH) {
+ area->description = "FLASH Component";
+ area->start = FLASH_START;
+ area->length = FLASH_LENGTH;
+ area->width = FLASH_DATA_WIDTH;
+ *comp = COMP_FLASH;
+ } else {
+ area->description = "Dummy";
+ area->start = 2 * RAM_LENGTH + FLASH_LENGTH;
+ area->length = UINT64_C(0x100000000);
+ area->width = 0;
+ *comp = NULL;
+ }
+
+ return URJTAG_STATUS_OK;
+}
+
+/**
+ * bus->driver->(*area)
+ *
+ */
+static int
+jopcyc_bus_area( bus_t *bus, uint32_t adr, bus_area_t *area )
+{
+ component_t *comp;
+
+ return comp_bus_area( bus, adr, area, &comp );
+}
+
+/**
+ * bus->driver->(*read_start)
+ *
+ */
+static void
+jopcyc_bus_read_start( bus_t *bus, uint32_t adr )
+{
+ part_t *p = PART;
+ chain_t *chain = CHAIN;
+ bus_area_t area;
+ component_t *comp;
+
+ comp_bus_area( bus, adr, &area, &comp );
+ if (!comp) {
+ printf( _("Address out of range\n") );
+ LAST_ADDR = adr;
+ return;
+ }
+
+ part_set_signal( p, nCS, 1, 0 );
+ part_set_signal( p, nWE, 1, 1 );
+ part_set_signal( p, nOE, 1, 0 );
+ if (comp->ctype == RAM) {
+ part_set_signal( p, nLB, 1, 0 );
+ part_set_signal( p, nUB, 1, 0 );
+ }
+
+ setup_address( bus, adr, comp );
+ set_data_in( bus, comp );
+
+ chain_shift_data_registers( chain, 0 );
+}
+
+/**
+ * bus->driver->(*read_next)
+ *
+ */
+static uint32_t
+jopcyc_bus_read_next( bus_t *bus, uint32_t adr )
+{
+ part_t *p = PART;
+ chain_t *chain = CHAIN;
+ int i;
+ uint32_t d = 0;
+ bus_area_t area;
+ component_t *comp;
+
+ comp_bus_area( bus, adr, &area, &comp );
+ if (!comp) {
+ printf( _("Address out of range\n") );
+ LAST_ADDR = adr;
+ return 0;
+ }
+
+ setup_address( bus, adr, comp );
+ chain_shift_data_registers( chain, 1 );
+
+ for (i = 0; i < area.width; i++)
+ d |= (uint32_t) (part_get_signal( p, D[i] ) << i);
+
+ return d;
+}
+
+/**
+ * bus->driver->(*read_end)
+ *
+ */
+static uint32_t
+jopcyc_bus_read_end( bus_t *bus )
+{
+ part_t *p = PART;
+ chain_t *chain = CHAIN;
+ int i;
+ uint32_t d = 0;
+ bus_area_t area;
+ component_t *comp;
+
+ /* use last address of access to determine component */
+ comp_bus_area( bus, LAST_ADDR, &area, &comp );
+ if (!comp) {
+ printf( _("Address out of range\n") );
+ return 0;
+ }
+
+ part_set_signal( p, nCS, 1, 1 );
+ part_set_signal( p, nOE, 1, 1 );
+ if (comp->ctype == RAM) {
+ part_set_signal( p, nLB, 1, 1 );
+ part_set_signal( p, nUB, 1, 1 );
+ }
+ chain_shift_data_registers( chain, 1 );
+
+ for (i = 0; i < area.width; i++)
+ d |= (uint32_t) (part_get_signal( p, D[i] ) << i);
+
+ return d;
+}
+
+/**
+ * bus->driver->(*write)
+ *
+ */
+static void
+jopcyc_bus_write( bus_t *bus, uint32_t adr, uint32_t data )
+{
+ part_t *p = PART;
+ chain_t *chain = CHAIN;
+ bus_area_t area;
+ component_t *comp;
+
+ comp_bus_area( bus, adr, &area, &comp );
+ if (!comp) {
+ printf( _("Address out of range\n") );
+ return;
+ }
+
+ part_set_signal( p, nCS, 1, 0 );
+ part_set_signal( p, nWE, 1, 1 );
+ part_set_signal( p, nOE, 1, 1 );
+ if (comp->ctype == RAM) {
+ part_set_signal( p, nLB, 1, 0 );
+ part_set_signal( p, nUB, 1, 0 );
+ }
+
+ setup_address( bus, adr, comp );
+ setup_data( bus, data, comp );
+
+ chain_shift_data_registers( chain, 0 );
+
+ part_set_signal( p, nWE, 1, 0 );
+ chain_shift_data_registers( chain, 0 );
+ part_set_signal( p, nWE, 1, 1 );
+ part_set_signal( p, nCS, 1, 1 );
+ if (comp->ctype == RAM) {
+ part_set_signal( p, nLB, 1, 1 );
+ part_set_signal( p, nUB, 1, 1 );
+ }
+ chain_shift_data_registers( chain, 0 );
+}
+
+const bus_driver_t jopcyc_bus = {
+ "jopcyc",
+ N_("JOP.design Cyclone Board compatible bus driver via BSR"),
+ jopcyc_bus_new,
+ generic_bus_free,
+ jopcyc_bus_printinfo,
+ generic_bus_prepare_extest,
+ jopcyc_bus_area,
+ jopcyc_bus_read_start,
+ jopcyc_bus_read_next,
+ jopcyc_bus_read_end,
+ generic_bus_read,
+ jopcyc_bus_write,
+ jopcyc_bus_init
+};
+
+
+/*
+ Local Variables:
+ mode:C
+ tab-width:2
+ indent-tabs-mode:t
+ End:
+*/
--- /dev/null
+/*
+ * $Id$
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marko Roessler <marko.roessler@indakom.de>, 2004
+ *
+ * based on sa1110.c
+ * Written by Marcel Telka <marcel@telka.sk>, 2002, 2003.
+ *
+ * Documentation:
+ *
+ * [1] Sharp Microelectronics, "LH7A400 Universal SOC Preliminary
+ * Users's Guide", May 2003, Reference No. SMA02010
+ *
+ *
+ * Notes:
+ * - this bus driver ONLY works for the asynchronous boot mode!
+ * - use only to access flash devices
+ */
+
+#include "sysdep.h"
+
+#include <stdlib.h>
+#include <stdint.h>
+#include <string.h>
+
+#include "part.h"
+#include "bus.h"
+#include "chain.h"
+#include "bssignal.h"
+#include "jtag.h"
+#include "buses.h"
+#include "generic_bus.h"
+
+#define ADR_NUM 24
+#define D_NUM 32
+#define nCS_NUM 4
+#define WIDTH_NUM 2
+
+typedef struct {
+ signal_t *a[ADR_NUM];
+ signal_t *d[D_NUM];
+ signal_t *ncs[nCS_NUM];
+ signal_t *nwe;
+ signal_t *noe;
+ signal_t *width[WIDTH_NUM];
+} bus_params_t;
+
+#define A ((bus_params_t *) bus->params)->a
+#define D ((bus_params_t *) bus->params)->d
+#define nCS ((bus_params_t *) bus->params)->ncs
+#define nWE ((bus_params_t *) bus->params)->nwe
+#define nOE ((bus_params_t *) bus->params)->noe
+#define WIDTH ((bus_params_t *) bus->params)->width
+
+/**
+ * bus->driver->(*new_bus)
+ *
+ */
+static bus_t *
+lh7a400_bus_new( chain_t *chain, const const bus_driver_t *driver, char *cmd_params[] )
+{
+ bus_t *bus;
+ part_t *part;
+ char buff[10];
+ int i;
+ int failed = 0;
+
+ bus = calloc( 1, sizeof (bus_t) );
+ if (!bus)
+ return NULL;
+
+ bus->driver = driver;
+ bus->params = calloc( 1, sizeof (bus_params_t) );
+ if (!bus->params) {
+ free( bus );
+ return NULL;
+ }
+
+ CHAIN = chain;
+ PART = part = chain->parts->parts[chain->active_part];
+
+ for (i = 0; i < ADR_NUM; i++) {
+ sprintf( buff, "A%d", i );
+ failed |= generic_bus_attach_sig( part, &(A[i]), buff );
+ }
+
+ for (i = 0; i < D_NUM; i++) {
+ sprintf( buff, "D%d", i );
+ failed |= generic_bus_attach_sig( part, &(D[i]), buff );
+ }
+
+ for (i = 0; i < nCS_NUM; i++) {
+ sprintf( buff, "nCS%d", i );
+ failed |= generic_bus_attach_sig( part, &(nCS[i]), buff );
+ }
+
+ for (i = 0; i < WIDTH_NUM; i++) {
+ sprintf( buff, "WIDTH%d", i );
+ failed |= generic_bus_attach_sig( part, &(WIDTH[i]), buff );
+ }
+
+ failed |= generic_bus_attach_sig( part, &(nWE), "nWE0" );
+
+ failed |= generic_bus_attach_sig( part, &(nOE), "nOE" );
+
+ if (failed) {
+ free( bus->params );
+ free( bus );
+ return NULL;
+ }
+
+ return bus;
+}
+
+/**
+ * bus->driver->(*printinfo)
+ *
+ */
+static void
+lh7a400_bus_printinfo( bus_t *bus )
+{
+ int i;
+
+ for (i = 0; i < CHAIN->parts->len; i++)
+ if (PART == CHAIN->parts->parts[i])
+ break;
+ printf( _("Sharp LH7A400 compatible bus driver via BSR (JTAG part No. %d)\n"), i );
+}
+
+/**
+ * bus->driver->(*area)
+ *
+ */
+static int
+lh7a400_bus_area ( bus_t *bus, uint32_t adr, bus_area_t *area )
+{
+ unsigned int width;
+
+ area->description = NULL;
+ area->start = UINT32_C(0x00000000);
+ area->length = UINT64_C(0x10000000);
+
+ /* we determine the size of the flash that was booted from [1] table 3.1 */
+ width = part_get_signal( PART, part_find_signal( PART, "WIDTH0" ) );
+ width |= part_get_signal( PART, part_find_signal( PART, "WIDTH1" ) ) << 1;
+
+ if (width < 0)
+ return URJTAG_STATUS_FAIL;
+
+ switch (width) {
+ case 0:
+ area->width = 8;
+ break;
+ case 1:
+ area->width = 16;
+ break;
+ case 2:
+ case 3:
+ area->width = 32;
+ }
+
+ return URJTAG_STATUS_OK;
+}
+
+static void
+setup_address( bus_t *bus, uint32_t a )
+{
+ int i;
+ part_t *p = PART;
+
+ for (i = 0; i < ADR_NUM; i++)
+ part_set_signal( p, A[i], 1, (a >> i) & 1 );
+}
+
+static void
+set_data_in( bus_t *bus )
+{
+ int i;
+ part_t *p = PART;
+ bus_area_t area;
+
+ lh7a400_bus_area( bus, 0, &area );
+
+ for (i = 0; i < area.width; i++)
+ part_set_signal( p, D[i], 0, 0 );
+
+}
+
+static void
+setup_data( bus_t *bus, uint32_t d )
+{
+ int i;
+ part_t *p = PART;
+ bus_area_t area;
+
+ lh7a400_bus_area( bus, 0, &area );
+
+ for (i = 0; i < area.width; i++)
+ part_set_signal( p, D[i], 1, (d >> i) & 1 );
+}
+
+/**
+ * bus->driver->(*read_start)
+ *
+ */
+static void
+lh7a400_bus_read_start( bus_t *bus, uint32_t adr )
+{
+ /* see Figure 3-3 in [1] */
+ part_t *p = PART;
+ chain_t *chain = CHAIN;
+
+ part_set_signal( p, nCS[0], 1, (adr >> 27) != 0 );
+ part_set_signal( p, nWE, 1, 1 );
+ part_set_signal( p, nOE, 1, 0 );
+
+ setup_address( bus, adr );
+ set_data_in( bus );
+
+ chain_shift_data_registers( chain, 0 );
+}
+
+/**
+ * bus->driver->(*read_next)
+ *
+ */
+static uint32_t
+lh7a400_bus_read_next( bus_t *bus, uint32_t adr )
+{
+ /* see Figure 3-3 in [1] */
+ part_t *p = PART;
+ chain_t *chain = CHAIN;
+ int i;
+ uint32_t d = 0;
+ bus_area_t area;
+
+ lh7a400_bus_area( bus, adr, &area );
+
+ setup_address( bus, adr );
+ chain_shift_data_registers( chain, 1 );
+
+ for (i = 0; i < area.width; i++)
+ d |= (uint32_t) (part_get_signal( p, D[i] ) << i);
+
+ return d;
+}
+
+/**
+ * bus->driver->(*read_end)
+ *
+ */
+static uint32_t
+lh7a400_bus_read_end( bus_t *bus )
+{
+ /* see Figure 3-3 in [1] */
+ part_t *p = PART;
+ chain_t *chain = CHAIN;
+ int i;
+ uint32_t d = 0;
+ bus_area_t area;
+
+ lh7a400_bus_area( bus, 0, &area );
+
+ part_set_signal( p, nCS[0], 1, 1 );
+ part_set_signal( p, nOE, 1, 1 );
+
+ chain_shift_data_registers( chain, 1 );
+
+ for (i = 0; i < area.width; i++)
+ d |= (uint32_t) (part_get_signal( p, D[i] ) << i);
+
+ return d;
+}
+
+/**
+ * bus->driver->(*write)
+ *
+ */
+static void
+lh7a400_bus_write( bus_t *bus, uint32_t adr, uint32_t data )
+{
+ /* see Figure 3-3 in [1] */
+ part_t *p = PART;
+ chain_t *chain = CHAIN;
+
+ part_set_signal( p, nCS[0], 1, (adr >> 27) != 0 );
+ part_set_signal( p, nWE, 1, 1 );
+ part_set_signal( p, nOE, 1, 1 );
+
+ setup_address( bus, adr );
+ setup_data( bus, data );
+
+ chain_shift_data_registers( chain, 0 );
+
+ part_set_signal( p, nWE, 1, 0 );
+ chain_shift_data_registers( chain, 0 );
+
+ part_set_signal( p, nWE, 1, 1 );
+ part_set_signal( p, nCS[0], 1, 1 );
+ chain_shift_data_registers( chain, 0 );
+}
+
+const bus_driver_t lh7a400_bus = {
+ "lh7a400",
+ N_("Sharp LH7A400 compatible bus driver via BSR (flash access only!)"),
+ lh7a400_bus_new,
+ generic_bus_free,
+ lh7a400_bus_printinfo,
+ generic_bus_prepare_extest,
+ lh7a400_bus_area,
+ lh7a400_bus_read_start,
+ lh7a400_bus_read_next,
+ lh7a400_bus_read_end,
+ generic_bus_read,
+ lh7a400_bus_write,
+ generic_bus_no_init
+};
--- /dev/null
+/*
+ * $Id$
+ *
+ * Freescale MPC5200 compatible bus driver via BSR
+ * Copyright (C) 2003 Marcel Telka
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Asier Llano <a.llano@usyscom.com>, 2004.
+ *
+ * Documentation:
+ * [1] Freescale, "Freescale MPC5200 Users Guide", Rev. 2, 08/2004
+ * Order Number: MPC5200UG
+ *
+ */
+
+#include "sysdep.h"
+
+#include <stdlib.h>
+#include <stdint.h>
+#include <string.h>
+
+#include "part.h"
+#include "bus.h"
+#include "bssignal.h"
+#include "jtag.h"
+#include "buses.h"
+#include "generic_bus.h"
+
+#define LPC_NUM_CS 6
+#define LPC_NUM_AD 32
+#define LPC_ADDR_TO_CS(a) (a >> bp->lpc_num_ad)
+#define LPC_ADDR_SIZE ( ( (unsigned long long)1 << bp->lpc_num_ad ) * LPC_NUM_CS )
+
+typedef struct {
+ uint32_t last_adr;
+ signal_t *ad[LPC_NUM_AD];
+ signal_t *ncs[LPC_NUM_CS];
+ signal_t *nwe;
+ signal_t *noe;
+ signal_t *ata_iso;
+ signal_t *nale;
+ int muxed;
+ int lpc_num_ad;
+ int lpc_num_d;
+} bus_params_t;
+
+#define LAST_ADR ((bus_params_t *) bus->params)->last_adr
+#define AD ((bus_params_t *) bus->params)->ad
+#define nCS ((bus_params_t *) bus->params)->ncs
+#define nWE ((bus_params_t *) bus->params)->nwe
+#define nOE ((bus_params_t *) bus->params)->noe
+#define nALE ((bus_params_t *) bus->params)->nale
+#define ATA_ISO ((bus_params_t *) bus->params)->ata_iso
+
+/**
+ * bus->driver->(*new_bus)
+ *
+ */
+static bus_t *
+mpc5200_bus_new( chain_t *chain, const bus_driver_t *driver, char *cmd_params[] )
+{
+ bus_t *bus;
+ bus_params_t *bp;
+ part_t *part;
+ char buff[10];
+ int i;
+ int failed = 0;
+
+ bus = calloc( 1, sizeof (bus_t) );
+ if (!bus)
+ return NULL;
+
+ bus->driver = driver;
+ bus->params = bp = (bus_params_t *)calloc( 1, sizeof (bus_params_t) );
+ if (!bus->params) {
+ free( bus );
+ return NULL;
+ }
+
+ bp->lpc_num_ad = 24;
+ bp->lpc_num_d = 8;
+
+ if (cmd_params[2] && !strncasecmp ("MUX", cmd_params[2], 3)) {
+ bp->lpc_num_ad = 25;
+ bp->lpc_num_d = 16;
+ bp->muxed = 1;
+ }
+ printf("%sMUXed %db address, %db data bus\n", (bp->muxed ? "" : "Non-"), bp->lpc_num_ad, bp->lpc_num_d);
+
+ CHAIN = chain;
+ PART = part = chain->parts->parts[chain->active_part];
+
+ /* Get the signals */
+ for (i = 0; i < LPC_NUM_AD; i++) {
+ sprintf( buff, "EXT_AD_%d", i );
+ failed |= generic_bus_attach_sig( part, &(AD[i]), buff );
+ }
+
+ for (i = 0; i < LPC_NUM_CS; i++) {
+ sprintf( buff, "LP_CS%d_B", i );
+ failed |= generic_bus_attach_sig( part, &(nCS[i]), buff );
+ }
+
+ failed |= generic_bus_attach_sig( part, &(nWE), "LP_RW" );
+
+ failed |= generic_bus_attach_sig( part, &(nOE), "LP_OE" );
+
+ failed |= generic_bus_attach_sig( part, &(nALE), "LP_ALE_B" );
+
+ failed |= generic_bus_attach_sig( part, &(ATA_ISO), "ATA_ISOLATION" );
+
+ if (failed) {
+ free( bus->params );
+ free( bus );
+ return NULL;
+ }
+
+ return bus;
+}
+
+/**
+ * bus->driver->(*printinfo)
+ *
+ */
+static void
+mpc5200_bus_printinfo( bus_t *bus )
+{
+ int i;
+
+ for (i = 0; i < CHAIN->parts->len; i++)
+ if (PART == CHAIN->parts->parts[i])
+ break;
+ printf( _("Freescale MPC5200 compatible bus driver via BSR (JTAG part No. %d)\n"), i );
+}
+
+/**
+ * bus->driver->(*area)
+ *
+ */
+static int
+mpc5200_bus_area( bus_t *bus, uint32_t adr, bus_area_t *area )
+{
+ bus_params_t *bp = (bus_params_t *) bus->params;
+
+ if( adr < LPC_ADDR_SIZE )
+ {
+ area->description = N_("LocalPlus Bus");
+ area->start = UINT32_C(0x00000000);
+ area->length = LPC_ADDR_SIZE;
+ area->width = bp->lpc_num_d;
+ return URJTAG_STATUS_OK;
+ }
+
+ area->description = NULL;
+ area->start = LPC_ADDR_SIZE;
+ area->length = UINT64_C(0x100000000) - LPC_ADDR_SIZE;
+ area->width = 0;
+ return URJTAG_STATUS_OK;
+}
+
+static void
+setup_address( bus_t *bus, uint32_t a )
+{
+ bus_params_t *bp = (bus_params_t *) bus->params;
+ part_t *p = PART;
+ int i;
+
+ for (i = 0; i < bp->lpc_num_ad; i++)
+ part_set_signal( p, AD[i], 1, (a >> i) & 1 );
+}
+
+static void
+set_data_in( bus_t *bus, uint32_t adr )
+{
+ bus_params_t *bp = (bus_params_t *) bus->params;
+ part_t *p = PART;
+ bus_area_t area;
+ int i;
+
+ mpc5200_bus_area( bus, adr, &area );
+ if (area.width > bp->lpc_num_d)
+ return;
+
+ for (i = 0; i < area.width; i++)
+ part_set_signal( p, AD[i + (LPC_NUM_AD - bp->lpc_num_d)], 0, 0 );
+}
+
+static void
+setup_data( bus_t *bus, uint32_t adr, uint32_t d )
+{
+ bus_params_t *bp = (bus_params_t *) bus->params;
+ part_t *p = PART;
+ bus_area_t area;
+ int i;
+
+ mpc5200_bus_area( bus, adr, &area );
+ if (area.width > bp->lpc_num_d)
+ return;
+
+ for (i = 0; i < area.width; i++)
+ part_set_signal( p, AD[i + (LPC_NUM_AD - bp->lpc_num_d)], 1, (d >> i) & 1 );
+}
+
+static uint32_t
+get_data( bus_t *bus, uint32_t adr )
+{
+ bus_params_t *bp = (bus_params_t *) bus->params;
+ bus_area_t area;
+ uint32_t d = 0;
+ part_t *p = PART;
+ int i;
+
+ mpc5200_bus_area( bus, adr, &area );
+ if (area.width > bp->lpc_num_d)
+ return 0;
+
+ for (i = 0; i < area.width; i++) {
+ d |= (uint32_t) (part_get_signal( p, AD[i + (LPC_NUM_AD - bp->lpc_num_d)] ) << i);
+ }
+ return d;
+}
+
+/**
+ * bus->driver->(*read_start)
+ *
+ */
+static void
+mpc5200_bus_read_start( bus_t *bus, uint32_t adr )
+{
+ bus_params_t *bp = (bus_params_t *) bus->params;
+ part_t *p = PART;
+ uint8_t cs = LPC_ADDR_TO_CS(adr);
+ int i;
+
+ LAST_ADR = adr;
+
+ /* see Figure 6-45 in [1] */
+
+ for (i = 0; i < LPC_NUM_CS; i++) {
+ part_set_signal( p, nCS[i], 1, !(cs==i) );
+ }
+
+ part_set_signal( p, ATA_ISO,1, 1 );
+ part_set_signal( p, nWE, 1, 1 );
+ part_set_signal( p, nOE, 1, 0 );
+
+ setup_address( bus, adr );
+
+ if ( !bp->muxed )
+ set_data_in( bus, adr );
+ else {
+ part_set_signal( p, nALE, 1, 0 );
+ chain_shift_data_registers( CHAIN, 0 );
+ part_set_signal( p, nALE, 1, 1 );
+ }
+ chain_shift_data_registers( CHAIN, 0 );
+}
+
+/**
+ * bus->driver->(*read_next)
+ *
+ */
+static uint32_t
+mpc5200_bus_read_next( bus_t *bus, uint32_t adr )
+{
+ bus_params_t *bp = (bus_params_t *) bus->params;
+ part_t *p = PART;
+ uint32_t d;
+
+ if (!bp->muxed) {
+ setup_address( bus, adr );
+ chain_shift_data_registers( CHAIN, 1 );
+ d = get_data( bus, LAST_ADR );
+ } else {
+ set_data_in( bus, adr );
+ chain_shift_data_registers( CHAIN, 0 );
+
+ chain_shift_data_registers( CHAIN, 1 );
+ d = get_data( bus, LAST_ADR );
+
+ setup_address( bus, adr );
+ LAST_ADR = adr;
+
+ part_set_signal( p, nALE, 1, 0 );
+ chain_shift_data_registers( CHAIN, 0 );
+ part_set_signal( p, nALE, 1, 1 );
+ chain_shift_data_registers( CHAIN, 0 );
+ }
+
+ LAST_ADR = adr;
+ return d;
+}
+
+/**
+ * bus->driver->(*read_end)
+ *
+ */
+static uint32_t
+mpc5200_bus_read_end( bus_t *bus )
+{
+ bus_params_t *bp = (bus_params_t *) bus->params;
+ part_t *p = PART;
+ int i;
+
+ if (bp->muxed) {
+ set_data_in( bus, LAST_ADR );
+ chain_shift_data_registers( CHAIN, 0 );
+ }
+ for (i = 0; i < LPC_NUM_CS; i++) {
+ part_set_signal( p, nCS[i], 1, 1 );
+ }
+ part_set_signal( p, nOE, 1, 1 );
+
+ chain_shift_data_registers( CHAIN, 1 );
+
+ return get_data( bus, LAST_ADR );
+}
+
+/**
+ * bus->driver->(*write)
+ *
+ */
+static void
+mpc5200_bus_write( bus_t *bus, uint32_t adr, uint32_t data )
+{
+ bus_params_t *bp = (bus_params_t *) bus->params;
+ /* see Figure 6-47 in [1] */
+ part_t *p = PART;
+ chain_t *chain = CHAIN;
+ uint8_t cs = LPC_ADDR_TO_CS(adr);
+ int i;
+
+ if (bp->muxed) {
+ setup_address( bus, adr );
+ part_set_signal( p, nALE, 1, 0 );
+ chain_shift_data_registers( chain, 0 );
+ part_set_signal( p, nALE, 1, 1 );
+ chain_shift_data_registers( chain, 0 );
+ }
+
+ for (i = 0; i < LPC_NUM_CS; i++) {
+ part_set_signal( p, nCS[i], 1, !(cs==i) );
+ }
+ part_set_signal( p, ATA_ISO,1, 1 );
+ part_set_signal( p, nWE, 1, 1 );
+ part_set_signal( p, nOE, 1, 1 );
+
+ if (!bp->muxed)
+ setup_address( bus, adr );
+ setup_data( bus, adr, data );
+
+ chain_shift_data_registers( chain, 0 );
+
+ part_set_signal( p, nWE, 1, 0 );
+ chain_shift_data_registers( chain, 0 );
+ part_set_signal( p, nWE, 1, 1 );
+ chain_shift_data_registers( chain, 0 );
+}
+
+const bus_driver_t mpc5200_bus = {
+ "mpc5200",
+ N_("Freescale MPC5200 compatible bus driver via BSR, parameter: [mux]"),
+ mpc5200_bus_new,
+ generic_bus_free,
+ mpc5200_bus_printinfo,
+ generic_bus_prepare_extest,
+ mpc5200_bus_area,
+ mpc5200_bus_read_start,
+ mpc5200_bus_read_next,
+ mpc5200_bus_read_end,
+ generic_bus_read,
+ mpc5200_bus_write,
+ generic_bus_no_init
+};
--- /dev/null
+/*
+ * $Id$
+ *
+ * Motorola MPC824x compatible bus driver via BSR
+ * Copyright (C) 2003 Marcel Telka
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2003.
+ *
+ * Documentation:
+ * [1] Motorola, Inc., "MPC8245 Integrated Processor User's Manual",
+ * MPC8245UM/D, 10/2001, Rev. 1
+ *
+ */
+
+#include "sysdep.h"
+
+#include <stdlib.h>
+#include <stdint.h>
+#include <string.h>
+
+#include "part.h"
+#include "bus.h"
+#include "bssignal.h"
+#include "jtag.h"
+#include "buses.h"
+#include "generic_bus.h"
+
+typedef struct {
+ int boot_nfoe;
+ int boot_sdma1;
+ uint32_t last_adr;
+ signal_t *ar[23];
+ signal_t *nrcs0;
+ signal_t *nwe;
+ signal_t *nfoe;
+ signal_t *d[32];
+} bus_params_t;
+
+#define boot_nFOE ((bus_params_t *) bus->params)->boot_nfoe
+#define boot_SDMA1 ((bus_params_t *) bus->params)->boot_sdma1
+#define LAST_ADR ((bus_params_t *) bus->params)->last_adr
+#define AR ((bus_params_t *) bus->params)->ar
+#define nRCS0 ((bus_params_t *) bus->params)->nrcs0
+#define nWE ((bus_params_t *) bus->params)->nwe
+#define nFOE ((bus_params_t *) bus->params)->nfoe
+#define D ((bus_params_t *) bus->params)->d
+
+int BUS_WIDTH = 8;
+char REVBITS = 0;
+char dbgAddr = 0;
+char dbgData = 0;
+
+
+/**
+ * bus->driver->(*new_bus)
+ *
+ */
+static bus_t *
+mpc824x_bus_new( chain_t *chain, const bus_driver_t *driver, char *cmd_params[] )
+{
+ bus_t *bus;
+ part_t *part;
+ char buff[10];
+ int i;
+ int failed = 0;
+ signal_t *s_nfoe;
+ signal_t *s_sdma1;
+
+ char param[16], value[16];
+
+ char dfltWidth = 1;
+
+ dbgAddr = 0;
+ dbgData = 0;
+ REVBITS = 0;
+
+ for (i=2; cmd_params[i]; i++) {
+ if (strstr( cmd_params[i], "=")) {
+ sscanf( cmd_params[i], "%[^=]%*c%s", param, value );
+
+ if (!strcmp( "width", param )) {
+ if (!strcmp( "8", value )) {
+ BUS_WIDTH = 8;
+ dfltWidth = 0;
+ } else if (!strcmp( "32", value )) {
+ BUS_WIDTH = 32;
+ dfltWidth = 0;
+ }
+ else if (!strcmp( "64", value )) {
+ // BUS_WIDTH = 64; // Needs to fix, look at setup_data()
+ BUS_WIDTH = 32;
+ printf(_(" Bus width 64 exists in mpc824x, but not supported by UrJTAG currently\n"));
+ dfltWidth = 1;
+ }
+ else {
+ printf(_(" Only 8,32 and 64 bus width are supported for Banks 0 and 1\n"));
+ return NULL;
+ }
+ }
+ } else {
+ if (!strcmp( "revbits", cmd_params[i]))
+ REVBITS = 1;
+
+ if (!strcmp( "help", cmd_params[i])) {
+ printf(_("Usage: initbus mpc824x [width=WIDTH] [revbits] [dbgAddr] [dbgData]\n\n"
+ " WIDTH data bus width - 8, 32, 64 (default 8)\n"
+ " revbits reverse bits in data bus (default - no)\n"
+ " dbgAddr display address bus state (default - no)\n"
+ " dbgData display data bus state (default - no)\n"));
+ return NULL;
+ }
+
+ if (!strcmp( "dbgAddr", cmd_params[i]))
+ dbgAddr = 1;
+
+
+ if (!strcmp( "dbgData", cmd_params[i]))
+ dbgData = 1;
+
+
+ }
+
+ }
+ if (dfltWidth)
+ printf(_(" Using default bus width %d\n"), BUS_WIDTH);
+
+ // REVBITS = 0;
+
+ bus = calloc( 1, sizeof (bus_t) );
+ if (!bus)
+ return NULL;
+
+ bus->driver = driver;
+ bus->params = calloc( 1, sizeof (bus_params_t) );
+ if (!bus->params) {
+ free( bus );
+ return NULL;
+ }
+
+ CHAIN = chain;
+ PART = part = chain->parts->parts[chain->active_part];
+
+ s_nfoe = part_find_signal( part, "nFOE" );
+ s_sdma1 = part_find_signal( part, "SDMA1" );
+ part_set_signal( part, s_nfoe, 0, 0 );
+ part_set_signal( part, s_sdma1, 0, 0 );
+
+ part_set_instruction( part, "SAMPLE/PRELOAD" );
+ chain_shift_instructions( chain );
+ chain_shift_data_registers( chain, 0 );
+ part_set_instruction( part, "EXTEST" );
+ chain_shift_instructions( chain );
+ chain_shift_data_registers( chain, 1 );
+
+ boot_nFOE = part_get_signal( part, s_nfoe );
+ boot_SDMA1 = part_get_signal( part, s_sdma1 );
+
+
+ for (i = 0; i <= 10; i++) {
+ sprintf( buff, "SDMA%d", i );
+ failed |= generic_bus_attach_sig( part, &(AR[i]), buff );
+ }
+
+ failed |= generic_bus_attach_sig( part, &(AR[11]), "SDBA0" );
+
+ for (i = 0; i < 8; i++) {
+ sprintf( buff, "PAR%d", i );
+ failed |= generic_bus_attach_sig( part, &(AR[19 - i]), buff );
+ }
+
+ failed |= generic_bus_attach_sig( part, &(AR[20]), "SDBA1" );
+
+ failed |= generic_bus_attach_sig( part, &(AR[21]), "SDMA11" );
+
+ failed |= generic_bus_attach_sig( part, &(AR[22]), "SDMA12" );
+
+ failed |= generic_bus_attach_sig( part, &(nRCS0), "nRCS0" );
+
+ failed |= generic_bus_attach_sig( part, &(nWE), "nWE" );
+
+ failed |= generic_bus_attach_sig( part, &(nFOE), "nFOE" );
+
+ /*
+ Freescale MPC824x uses inversed bit order ([1], p. 2-18):
+ msb is MDH[0] while lsb is MDH[31]
+ Flash chips usually use another bit orded:
+ msb is D[31] and lsb is D[0]
+
+ This should be rewired in the PCB (MDH[0] - D[31], ..., MDH[31] - D[0]).
+ Otherwise you will have to use "revbits" UrJTAG parameter and
+ binary files with reversed bit order.
+ */
+
+ for (i = 0; i < 32; i++) { /* Needs to be fixed for 64-bit bus width */
+ sprintf( buff, "MDH%d", 31 - i );
+ failed |= generic_bus_attach_sig( part, &(D[i]), buff );
+ }
+
+ if (failed) {
+ free( bus->params );
+ free( bus );
+ return NULL;
+ }
+
+ return bus;
+}
+
+/**
+ * bus->driver->(*printinfo)
+ *
+ */
+static void
+mpc824x_bus_printinfo( bus_t *bus )
+{
+ int i;
+
+ for (i = 0; i < CHAIN->parts->len; i++)
+ if (PART == CHAIN->parts->parts[i])
+ break;
+ printf( _("Motorola MPC824x compatible bus driver via BSR (JTAG part No. %d)\n"), i );
+}
+
+/**
+ * bus->driver->(*area)
+ *
+ */
+static int
+mpc824x_bus_area( bus_t *bus, uint32_t adr, bus_area_t *area )
+{
+
+ if (adr < UINT32_C(0xFF000000)) {
+ area->description = NULL;
+ area->start = UINT32_C(0x00000000);
+ area->length = UINT64_C(0xFF000000);
+ area->width = 0;
+
+ return URJTAG_STATUS_OK;
+ }
+
+ if (adr < UINT32_C(0xFF800000)) {
+ area->description = N_("Base ROM Interface (Bank 1)");
+ area->start = UINT32_C(0xFF000000);
+ area->length = UINT64_C(0x00800000);
+ area->width = 0;
+
+ return URJTAG_STATUS_OK;
+ }
+
+ if (boot_SDMA1 == 0) {
+ area->description = N_("Base ROM Interface (Bank 0)");
+ area->start = UINT32_C(0xFF800000);
+ area->length = UINT64_C(0x00800000);
+ area->width = BUS_WIDTH;
+
+ return URJTAG_STATUS_OK;
+ }
+
+ /* extended addresing mode is disabled (SDMA1 is 1) */
+ if (adr < UINT32_C(0xFFC00000)) {
+ area->description = NULL;
+ area->start = UINT32_C(0xFF800000);
+ area->length = UINT64_C(0x00400000);
+ area->width = BUS_WIDTH;
+
+ return URJTAG_STATUS_OK;
+ }
+
+ area->description = N_("Base ROM Interface (Bank 0)");
+ area->start = UINT32_C(0xFFC00000);
+ area->length = UINT64_C(0x00400000);
+ area->width = BUS_WIDTH;
+
+ return URJTAG_STATUS_OK;
+}
+
+static void
+setup_address( bus_t *bus, uint32_t a )
+{
+ int i;
+ part_t *p = PART;
+
+ switch (BUS_WIDTH) {
+ case 8:/* 8-bit data bus */
+ for (i = 0; i < 23; i++)
+ part_set_signal( p, AR[i], 1, (a >> i) & 1 );
+ break;
+ case 32:/* 32-bit data bus */
+ for (i = 0; i < 21; i++)
+ part_set_signal( p, AR[i], 1, (a >> (i+2)) & 1 );
+ break;
+ case 64:
+ for (i = 0; i < 20; i++)
+ part_set_signal( p, AR[i], 1, (a >> (i+3)) & 1 );
+ break;
+ default:
+ printf(_("Warning: unhandled bus width: %i\n"), BUS_WIDTH);
+ return;
+ }
+
+ /* Just for debugging */
+ if (dbgAddr) {
+ int j, k;
+ switch (BUS_WIDTH) {
+ case 8: k = 23; break;
+ case 32: k = 21; break;
+ case 64: k = 20; break;
+ default: return;
+ }
+
+ printf(_("Addr [%2d:0]: %06X "), k, a);
+ for (i=0; i<3; i++) {
+ for (j=0; j<8; j++)
+ if ((i*8+j) >= (23 - k))
+ printf("%1d", (a >> (23 - (i*8+j)) ) & 1);
+ else
+ printf(" ");
+ printf(" ");
+ }
+ printf("\n");
+ }
+
+}
+
+static void
+set_data_in( bus_t *bus, uint32_t adr )
+{
+ int i;
+ part_t *p = PART;
+ bus_area_t area;
+
+ mpc824x_bus_area( bus, adr, &area );
+ if (area.width > 64)
+ return;
+
+ for (i = 0; i < area.width; i++)
+ part_set_signal( p, D[i], 0, 0 );
+}
+
+static void
+setup_data( bus_t *bus, uint32_t adr, uint32_t d )
+{
+ int i;
+ part_t *p = PART;
+ bus_area_t area;
+
+ mpc824x_bus_area( bus, adr, &area );
+ if (area.width > 64)
+ return;
+
+ for (i = 0; i < area.width; i++)
+ part_set_signal( p, D[i], 1, (d >> ((REVBITS==1) ? BUS_WIDTH-1-i : i)) & 1 );
+
+ /* Just for debugging */
+ if (dbgData) {
+ printf(_("Data WR [%d:0]: %08X "), area.width-1, d);
+ int j;
+ int bytes =0;
+ if (BUS_WIDTH==8) bytes = 1;
+ else if (BUS_WIDTH==32) bytes = 4;
+ else if (BUS_WIDTH==64) bytes = 4; /* Needs to be fixed - d is 32-bit long, so no 64 bit mode is possible */
+
+ for (i=0; i<bytes; i++) {
+ for (j=0; j<8; j++)
+ if (REVBITS)
+ printf("%1d", (d >> (BUS_WIDTH-1 - (i*8+j)) ) & 1);
+ else
+ printf("%1d", (d >> ( (i*8+j)) ) & 1);
+ printf(" ");
+ }
+ printf("\n");
+ }
+
+}
+
+static uint32_t
+get_data( bus_t *bus, uint32_t adr )
+{
+ bus_area_t area;
+ int i;
+ uint32_t d = 0;
+ part_t *p = PART;
+
+ mpc824x_bus_area( bus, adr, &area );
+ if (area.width > 64)
+ return 0;
+
+ for (i = 0; i < area.width; i++)
+ d |= (uint32_t) (part_get_signal( p, D[i] ) << ((REVBITS==1) ? BUS_WIDTH-1-i : i));
+
+ /* Just for debugging */
+ if (dbgData) {
+ printf(_("Data RD [%d:0]: %08X "), area.width-1, d);
+ int j;
+ int bytes = 0;
+ if (BUS_WIDTH==8) bytes = 1;
+ else if (BUS_WIDTH==32) bytes = 4;
+ else if (BUS_WIDTH==64) bytes = 4; /* Needs to be fixed - d is 32-bit long, so no 64 bit mode is possible */
+
+ for (i=0; i<bytes; i++) {
+ for (j=0; j<8; j++)
+ if (REVBITS)
+ printf("%1d", (d >> (BUS_WIDTH-1 - (i*8+j)) ) & 1);
+ else
+ printf("%1d", (d >> ( (i*8+j)) ) & 1);
+ printf(" ");
+ }
+ printf("\n");
+ }
+
+ return d;
+}
+
+/**
+ * bus->driver->(*read_start)
+ *
+ */
+static void
+mpc824x_bus_read_start( bus_t *bus, uint32_t adr )
+{
+ part_t *p = PART;
+
+ LAST_ADR = adr;
+
+ /* see Figure 6-45 in [1] */
+ part_set_signal( p, nRCS0, 1, 0 );
+ part_set_signal( p, nWE, 1, 1 );
+ part_set_signal( p, nFOE, 1, 0 );
+
+ setup_address( bus, adr );
+ set_data_in( bus, adr );
+
+ chain_shift_data_registers( CHAIN, 0 );
+}
+
+/**
+ * bus->driver->(*read_next)
+ *
+ */
+static uint32_t
+mpc824x_bus_read_next( bus_t *bus, uint32_t adr )
+{
+ uint32_t d;
+
+ setup_address( bus, adr );
+ chain_shift_data_registers( CHAIN, 1 );
+
+ d = get_data( bus, LAST_ADR );
+ LAST_ADR = adr;
+ return d;
+}
+
+/**
+ * bus->driver->(*read_end)
+ *
+ */
+static uint32_t
+mpc824x_bus_read_end( bus_t *bus )
+{
+ part_t *p = PART;
+
+ part_set_signal( p, nRCS0, 1, 1 );
+ part_set_signal( p, nFOE, 1, 1 );
+
+ chain_shift_data_registers( CHAIN, 1 );
+
+ return get_data( bus, LAST_ADR );
+}
+
+/**
+ * bus->driver->(*write)
+ *
+ */
+static void
+mpc824x_bus_write( bus_t *bus, uint32_t adr, uint32_t data )
+{
+ part_t *p = PART;
+
+ LAST_ADR = adr;
+
+
+ /* see Figure 6-47 in [1] */
+ part_set_signal( p, nRCS0, 1, 0 );
+ part_set_signal( p, nWE, 1, 1 );
+ part_set_signal( p, nFOE, 1, 1 );
+
+ setup_address( bus, adr );
+
+ setup_data( bus, adr, data );
+
+ chain_shift_data_registers( CHAIN, 0 );
+
+ part_set_signal( p, nWE, 1, 0 );
+ chain_shift_data_registers( CHAIN, 0 );
+ part_set_signal( p, nWE, 1, 1 );
+ part_set_signal( p, nRCS0, 1, 1 );
+ chain_shift_data_registers( CHAIN, 0 );
+
+
+
+}
+
+const bus_driver_t mpc824x_bus = {
+ "mpc824x",
+ N_("Motorola MPC824x compatible bus driver via BSR"),
+ mpc824x_bus_new,
+ generic_bus_free,
+ mpc824x_bus_printinfo,
+ generic_bus_prepare_extest,
+ mpc824x_bus_area,
+ mpc824x_bus_read_start,
+ mpc824x_bus_read_next,
+ mpc824x_bus_read_end,
+ generic_bus_read,
+ mpc824x_bus_write,
+ generic_bus_no_init
+};
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2002, 2003 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2002, 2003.
+ * Modified by Wojtek Kaniewski <wojtekka@toxygen.net>, 2004.
+ */
+
+#include "sysdep.h"
+
+#include <stdlib.h>
+#include <stdint.h>
+#include <string.h>
+
+#include "part.h"
+#include "bus.h"
+#include "chain.h"
+#include "bssignal.h"
+#include "jtag.h"
+#include "buses.h"
+#include "generic_bus.h"
+
+typedef struct {
+ signal_t *a[32];
+ signal_t *d[16];
+ signal_t *ncs;
+ signal_t *nwe;
+ signal_t *noe;
+} bus_params_t;
+
+#define A ((bus_params_t *) bus->params)->a
+#define D ((bus_params_t *) bus->params)->d
+#define nCS ((bus_params_t *) bus->params)->ncs
+#define nWE ((bus_params_t *) bus->params)->nwe
+#define nOE ((bus_params_t *) bus->params)->noe
+
+
+/**
+ * bus->driver->(*new_bus)
+ *
+ */
+static bus_t *
+ppc405ep_bus_new( chain_t *chain, const bus_driver_t *driver, char *cmd_params[] )
+{
+ bus_t *bus;
+ part_t *part;
+ char buff[10];
+ int i;
+ int failed = 0;
+
+ bus = calloc( 1, sizeof (bus_t) );
+ if (!bus)
+ return NULL;
+
+ bus->driver = driver;
+ bus->params = calloc( 1, sizeof (bus_params_t) );
+ if (!bus->params) {
+ free( bus );
+ return NULL;
+ }
+
+ CHAIN = chain;
+ PART = part = chain->parts->parts[chain->active_part];
+
+ for (i = 6; i < 32; i++) {
+ sprintf( buff, "PerAddr%d", i );
+ failed |= generic_bus_attach_sig( part, &(A[i]), buff );
+ }
+
+ for (i = 0; i < 16; i++) {
+ sprintf( buff, "PerData%d", i );
+ failed |= generic_bus_attach_sig( part, &(D[i]), buff );
+ }
+
+ failed |= generic_bus_attach_sig( part, &(nCS), "PerCS0" );
+
+ failed |= generic_bus_attach_sig( part, &(nWE), "PerWBE1" );
+
+ failed |= generic_bus_attach_sig( part, &(nOE), "PerOE" );
+
+ if (failed) {
+ free( bus->params );
+ free( bus );
+ return NULL;
+ }
+
+ return bus;
+}
+
+/**
+ * bus->driver->(*printinfo)
+ *
+ */
+static void
+ppc405ep_bus_printinfo( bus_t *bus )
+{
+ int i;
+
+ for (i = 0; i < CHAIN->parts->len; i++)
+ if (PART == CHAIN->parts->parts[i])
+ break;
+ printf( _("IBM PowerPC 405EP compatible bus driver via BSR (JTAG part No. %d)\n"), i );
+}
+
+/**
+ * bus->driver->(*area)
+ *
+ */
+static int
+ppc405ep_bus_area( bus_t *bus, uint32_t adr, bus_area_t *area )
+{
+ area->description = NULL;
+ area->start = UINT32_C(0x00000000);
+ area->length = UINT64_C(0x100000000);
+ area->width = 16;
+
+ return URJTAG_STATUS_OK;
+}
+
+static void
+setup_address( bus_t *bus, uint32_t a )
+{
+ int i;
+ part_t *p = PART;
+
+ for (i = 6; i < 32; i++)
+ part_set_signal( p, A[i], 1, (a >> (31-i)) & 1 );
+}
+
+static void
+set_data_in( bus_t *bus )
+{
+ int i;
+ part_t *p = PART;
+ bus_area_t area;
+
+ ppc405ep_bus_area( bus, 0, &area );
+
+ for (i = 0; i < area.width; i++)
+ part_set_signal( p, D[i], 0, 0 );
+}
+
+static void
+setup_data( bus_t *bus, uint32_t d )
+{
+ int i;
+ part_t *p = PART;
+ bus_area_t area;
+
+ ppc405ep_bus_area( bus, 0, &area );
+
+ for (i = 0; i < area.width; i++)
+ part_set_signal( p, D[15-i], 1, (d >> i) & 1 );
+}
+
+/**
+ * bus->driver->(*read_start)
+ *
+ */
+static void
+ppc405ep_bus_read_start( bus_t *bus, uint32_t adr )
+{
+ part_t *p = PART;
+ chain_t *chain = CHAIN;
+
+ part_set_signal( p, nCS, 1, 0 );
+ part_set_signal( p, nWE, 1, 1 );
+ part_set_signal( p, nOE, 1, 0 );
+
+ setup_address( bus, adr );
+ set_data_in( bus );
+
+ chain_shift_data_registers( chain, 0 );
+}
+
+/**
+ * bus->driver->(*read_next)
+ *
+ */
+static uint32_t
+ppc405ep_bus_read_next( bus_t *bus, uint32_t adr )
+{
+ part_t *p = PART;
+ chain_t *chain = CHAIN;
+ int i;
+ uint32_t d = 0;
+ bus_area_t area;
+
+ ppc405ep_bus_area( bus, adr, &area );
+
+ setup_address( bus, adr );
+ chain_shift_data_registers( chain, 1 );
+
+ for (i = 0; i < area.width; i++)
+ d |= (uint32_t) (part_get_signal( p, D[15-i] ) << i);
+
+ return d;
+}
+
+/**
+ * bus->driver->(*read_end)
+ *
+ */
+static uint32_t
+ppc405ep_bus_read_end( bus_t *bus )
+{
+ part_t *p = PART;
+ chain_t *chain = CHAIN;
+ int i;
+ uint32_t d = 0;
+ bus_area_t area;
+
+ ppc405ep_bus_area( bus, 0, &area );
+
+ part_set_signal( p, nCS, 1, 1 );
+ part_set_signal( p, nOE, 1, 1 );
+ chain_shift_data_registers( chain, 1 );
+
+ for (i = 0; i < area.width; i++)
+ d |= (uint32_t) (part_get_signal( p, D[15-i] ) << i);
+
+ return d;
+}
+
+/**
+ * bus->driver->(*write)
+ *
+ */
+static void
+ppc405ep_bus_write( bus_t *bus, uint32_t adr, uint32_t data )
+{
+ part_t *p = PART;
+ chain_t *chain = CHAIN;
+
+ part_set_signal( p, nCS, 1, 0 );
+ part_set_signal( p, nWE, 1, 1 );
+ part_set_signal( p, nOE, 1, 1 );
+
+ setup_address( bus, adr );
+ setup_data( bus, data );
+
+ chain_shift_data_registers( chain, 0 );
+
+ part_set_signal( p, nWE, 1, 0 );
+ chain_shift_data_registers( chain, 0 );
+ part_set_signal( p, nWE, 1, 1 );
+ part_set_signal( p, nCS, 1, 1 );
+ chain_shift_data_registers( chain, 0 );
+}
+
+const bus_driver_t ppc405ep_bus = {
+ "ppc405ep",
+ N_("IBM PowerPC 405EP compatible bus driver via BSR"),
+ ppc405ep_bus_new,
+ generic_bus_free,
+ ppc405ep_bus_printinfo,
+ generic_bus_prepare_extest,
+ ppc405ep_bus_area,
+ ppc405ep_bus_read_start,
+ ppc405ep_bus_read_next,
+ ppc405ep_bus_read_end,
+ generic_bus_read,
+ ppc405ep_bus_write,
+ generic_bus_no_init
+};
--- /dev/null
+/*
+ * Copyright (C) 2002, 2003 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2002, 2003.
+ */
+
+#include "sysdep.h"
+
+#include <stdlib.h>
+#include <stdint.h>
+#include <string.h>
+
+#include "part.h"
+#include "bus.h"
+#include "chain.h"
+#include "bssignal.h"
+#include "jtag.h"
+#include "buses.h"
+#include "generic_bus.h"
+
+#define PPC440GX_ADDR_LINES 32
+#define PPC440GX_DATA_LINES 8
+
+typedef struct {
+ signal_t *a[PPC440GX_ADDR_LINES];
+ signal_t *d[PPC440GX_DATA_LINES];
+ signal_t *ncs;
+ signal_t *nwe;
+ signal_t *noe;
+} bus_params_t;
+
+#define A ((bus_params_t *) bus->params)->a
+#define D ((bus_params_t *) bus->params)->d
+#define nCS ((bus_params_t *) bus->params)->ncs
+#define nWE ((bus_params_t *) bus->params)->nwe
+#define nOE ((bus_params_t *) bus->params)->noe
+
+
+/**
+ * bus->driver->(*new_bus)
+ *
+ */
+static bus_t *
+ppc440gx_ebc8_bus_new( chain_t *chain, const bus_driver_t *driver, char *cmd_params[] )
+{
+ bus_t *bus;
+ part_t *part;
+ char buff[10];
+ int i;
+ int failed = 0;
+
+ bus = calloc( 1, sizeof (bus_t) );
+ if (!bus)
+ return NULL;
+
+ bus->driver = driver;
+ bus->params = calloc( 1, sizeof (bus_params_t) );
+ if (!bus->params) {
+ free( bus );
+ return NULL;
+ }
+
+ CHAIN = chain;
+ PART = part = chain->parts->parts[chain->active_part];
+
+ for (i = 0; i < PPC440GX_ADDR_LINES; i++) {
+ sprintf( buff, "EBCADR%d", i );
+ failed |= generic_bus_attach_sig( part, &(A[i]), buff );
+ }
+
+ for (i = 0; i < PPC440GX_DATA_LINES; i++) {
+ sprintf( buff, "EBCDATA%d", i );
+ failed |= generic_bus_attach_sig( part, &(D[i]), buff );
+ }
+
+ failed |= generic_bus_attach_sig( part, &(nCS), "EBCCS0_N" );
+
+ failed |= generic_bus_attach_sig( part, &(nWE), "EBCWE_N" );
+
+ failed |= generic_bus_attach_sig( part, &(nOE), "EBCOE_N" );
+
+ if (failed) {
+ free( bus->params );
+ free( bus );
+ return NULL;
+ }
+
+ return bus;
+}
+
+/**
+ * bus->driver->(*printinfo)
+ *
+ */
+static void
+ppc440gx_ebc8_bus_printinfo( bus_t *bus )
+{
+ int i;
+
+ for (i = 0; i < CHAIN->parts->len; i++)
+ if (PART == CHAIN->parts->parts[i])
+ break;
+ printf( _("IBM PowerPC 440GX 8-bit compatible bus driver via BSR (JTAG part No. %d)\n"), i );
+}
+
+/**
+ * bus->driver->(*area)
+ *
+ */
+static int
+ppc440gx_ebc8_bus_area( bus_t *bus, uint32_t adr, bus_area_t *area )
+{
+ area->description = NULL;
+ area->start = UINT32_C(0x00000000);
+ area->length = UINT64_C(0x100000000); /* ??????????? */
+ area->width = PPC440GX_DATA_LINES;
+
+ return URJTAG_STATUS_OK;
+}
+
+static void
+setup_address( bus_t *bus, uint32_t a )
+{
+ int i;
+ part_t *p = PART;
+
+ for (i = 0; i < PPC440GX_ADDR_LINES; i++)
+ part_set_signal( p, A[i], 1, (a >> (PPC440GX_ADDR_LINES-1-i)) & 1 );
+}
+
+static void
+set_data_in( bus_t *bus )
+{
+ int i;
+ part_t *p = PART;
+ bus_area_t area;
+
+ ppc440gx_ebc8_bus_area( bus, 0, &area );
+
+ for (i = 0; i < area.width; i++)
+ part_set_signal( p, D[i], 0, 0 );
+}
+
+static void
+setup_data( bus_t *bus, uint32_t d )
+{
+ int i;
+ part_t *p = PART;
+ bus_area_t area;
+
+ ppc440gx_ebc8_bus_area( bus, 0, &area );
+
+ for (i = 0; i < area.width; i++)
+ part_set_signal( p, D[PPC440GX_DATA_LINES-1-i], 1, (d >> i) & 1 );
+}
+
+/**
+ * bus->driver->(*read_start)
+ *
+ */
+static void
+ppc440gx_ebc8_bus_read_start( bus_t *bus, uint32_t adr )
+{
+ part_t *p = PART;
+ chain_t *chain = CHAIN;
+
+ part_set_signal( p, nCS, 1, 0 );
+ part_set_signal( p, nWE, 1, 1 );
+ part_set_signal( p, nOE, 1, 0 );
+
+ setup_address( bus, adr );
+ set_data_in( bus );
+
+ chain_shift_data_registers( chain, 0 );
+}
+
+/**
+ * bus->driver->(*read_next)
+ *
+ */
+static uint32_t
+ppc440gx_ebc8_bus_read_next( bus_t *bus, uint32_t adr )
+{
+ part_t *p = PART;
+ chain_t *chain = CHAIN;
+ int i;
+ uint32_t d = 0;
+ bus_area_t area;
+
+ ppc440gx_ebc8_bus_area( bus, adr, &area );
+
+ setup_address( bus, adr );
+ chain_shift_data_registers( chain, 1 );
+
+ for (i = 0; i < area.width; i++)
+ d |= (uint32_t) (part_get_signal( p, D[PPC440GX_DATA_LINES-1-i] ) << i);
+
+ return d;
+}
+
+/**
+ * bus->driver->(*read_end)
+ *
+ */
+static uint32_t
+ppc440gx_ebc8_bus_read_end( bus_t *bus )
+{
+ part_t *p = PART;
+ chain_t *chain = CHAIN;
+ int i;
+ uint32_t d = 0;
+ bus_area_t area;
+
+ ppc440gx_ebc8_bus_area( bus, 0, &area );
+
+ part_set_signal( p, nCS, 1, 1 );
+ part_set_signal( p, nOE, 1, 1 );
+ chain_shift_data_registers( chain, 1 );
+
+ for (i = 0; i < area.width; i++)
+ d |= (uint32_t) (part_get_signal( p, D[PPC440GX_DATA_LINES-1-i] ) << i);
+
+ return d;
+}
+
+/**
+ * bus->driver->(*write)
+ *
+ */
+static void
+ppc440gx_ebc8_bus_write( bus_t *bus, uint32_t adr, uint32_t data )
+{
+ part_t *p = PART;
+ chain_t *chain = CHAIN;
+
+ part_set_signal( p, nCS, 1, 0 );
+ part_set_signal( p, nWE, 1, 1 );
+ part_set_signal( p, nOE, 1, 1 );
+
+ setup_address( bus, adr );
+ setup_data( bus, data );
+
+ chain_shift_data_registers( chain, 0 );
+
+ part_set_signal( p, nWE, 1, 0 );
+ chain_shift_data_registers( chain, 0 );
+ part_set_signal( p, nWE, 1, 1 );
+ part_set_signal( p, nCS, 1, 1 );
+ chain_shift_data_registers( chain, 0 );
+}
+
+const bus_driver_t ppc440gx_ebc8_bus = {
+ "ppc440gx_ebc8",
+ N_("IBM PowerPC 440GX 8-bit EBC compatible bus driver via BSR"),
+ ppc440gx_ebc8_bus_new,
+ generic_bus_free,
+ ppc440gx_ebc8_bus_printinfo,
+ generic_bus_prepare_extest,
+ ppc440gx_ebc8_bus_area,
+ ppc440gx_ebc8_bus_read_start,
+ ppc440gx_ebc8_bus_read_next,
+ ppc440gx_ebc8_bus_read_end,
+ generic_bus_read,
+ ppc440gx_ebc8_bus_write,
+ generic_bus_no_init
+};
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2002, 2003 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2002, 2003.
+ * Modified by Wojtek Kaniewski <wojtekka@toxygen.net>, 2004.
+ * Modified from ppc405ep.c by Detrick Martin <jtag@detrickmartin.net>, 2008.
+ */
+
+#include "sysdep.h"
+
+#include <stdlib.h>
+#include <stdint.h>
+#include <string.h>
+
+#include "part.h"
+#include "bus.h"
+#include "chain.h"
+#include "bssignal.h"
+#include "jtag.h"
+#include "buses.h"
+#include "generic_bus.h"
+
+typedef struct {
+ signal_t *a[32];
+ signal_t *d[32];
+ signal_t *cs;
+ signal_t *we;
+ signal_t *oe;
+ int alsbi, amsbi, ai, aw, dlsbi, dmsbi, di, dw, csa, wea, oea;
+ int ashift;
+} bus_params_t;
+
+#define A ((bus_params_t *) bus->params)->a
+#define D ((bus_params_t *) bus->params)->d
+#define CS ((bus_params_t *) bus->params)->cs
+#define WE ((bus_params_t *) bus->params)->we
+#define OE ((bus_params_t *) bus->params)->oe
+
+#define ALSBI ((bus_params_t *) bus->params)->alsbi
+#define AMSBI ((bus_params_t *) bus->params)->amsbi
+#define AI ((bus_params_t *) bus->params)->ai
+#define AW ((bus_params_t *) bus->params)->aw
+#define DLSBI ((bus_params_t *) bus->params)->dlsbi
+#define DMSBI ((bus_params_t *) bus->params)->dmsbi
+#define DI ((bus_params_t *) bus->params)->di
+#define DW ((bus_params_t *) bus->params)->dw
+#define CSA ((bus_params_t *) bus->params)->csa
+#define WEA ((bus_params_t *) bus->params)->wea
+#define OEA ((bus_params_t *) bus->params)->oea
+
+#define ASHIFT ((bus_params_t *) bus->params)->ashift
+
+static void
+prototype_bus_signal_parse( char *str, char *fmt, int *inst )
+{
+ char pre[16], suf[16];
+
+ switch( sscanf( str, "%[^0-9]%d%s", pre, inst, suf ) ) {
+ case 1:
+ strcpy( fmt, str );
+ break;
+ case 2:
+ sprintf( fmt, "%s%s", pre, "%d" );
+ break;
+ case 3:
+ sprintf( fmt, "%s%s%s", pre, "%d", suf );
+ }
+}
+
+/**
+ * bus->driver->(*new_bus)
+ *
+ */
+static bus_t *
+prototype_bus_new( chain_t *chain, const bus_driver_t *driver, char *cmd_params[] )
+{
+ bus_t *bus;
+ signal_t *sig;
+ char buff[16], fmt[16], afmt[16], dfmt[16], param[16], value[16];
+ int i, j, inst, max, min;
+ int failed = 0;
+ int ashift = -1;
+
+ bus = calloc( 1, sizeof (bus_t) );
+ if (!bus)
+ return NULL;
+
+ bus->driver = driver;
+ bus->params = calloc( 1, sizeof (bus_params_t) );
+ if (!bus->params) {
+ free( bus );
+ return NULL;
+ }
+
+ CHAIN = chain;
+ PART = chain->parts->parts[chain->active_part];
+
+ CS = OE = WE = NULL;
+ ALSBI = AMSBI = DLSBI = DMSBI = -1;
+ for ( i = 2; cmd_params[i]; i++ ) {
+ if (!strstr( cmd_params[i], "=")) continue;
+ sscanf( cmd_params[i], "%[^=]%*c%s", param, value );
+
+ if (!strcmp( "amode", param )) {
+ if (!strcmp( "x8", value ))
+ ashift = 0;
+ else if (!strcmp( "x16", value ))
+ ashift = 1;
+ else if (!strcmp( "x32", value ))
+ ashift = 2;
+ else if (strcmp( "auto", value ))
+ printf( _("value %s not defined for parameter %s\n"), value, param );
+ continue;
+ }
+
+ prototype_bus_signal_parse( value, fmt, &inst );
+ if( inst > 31 ) continue;
+
+ sig = part_find_signal( PART, value );
+ if (!sig) {
+ printf( _("signal '%s' is not found\n"), value );
+ failed = 1;
+ } else if (!strcmp( "alsb", param )) {
+ ALSBI = inst;
+ A[inst] = sig;
+ strcpy( afmt, fmt );
+ } else if (!strcmp( "amsb", param )) {
+ AMSBI = inst;
+ A[inst] = sig;
+ strcpy( afmt, fmt );
+ } else if (!strcmp( "dlsb", param )) {
+ DLSBI = inst;
+ D[inst] = sig;
+ strcpy( dfmt, fmt );
+ } else if (!strcmp( "dmsb", param )) {
+ DMSBI = inst;
+ D[inst] = sig;
+ strcpy( dfmt, fmt );
+ } else if (!(strcmp( "cs", param ) && strcmp( "ncs", param ))) {
+ CS = sig;
+ CSA = ( *param == 'n' ) ? 0 : 1;
+ } else if (!(strcmp( "oe", param ) && strcmp( "noe", param ))) {
+ OE = sig;
+ OEA = ( *param == 'n' ) ? 0 : 1;
+ } else if (!(strcmp( "we", param ) && strcmp( "nwe", param ))) {
+ WE = sig;
+ WEA = ( *param == 'n' ? 0 : 1 );
+ } else {
+ printf( _("parameter %s is unknown\n"), param );
+ failed = 1;
+ }
+ }
+
+ if ( ALSBI >= 0 || AMSBI >= 0 ) {
+ if ( ALSBI == -1 || AMSBI == -1 ) {
+ for ( min = 0; min <= 31; min++ ) {
+ sprintf( buff, afmt, min );
+ A[min] = part_find_signal( PART, buff );
+ if(A[min]) break;
+ }
+ for ( max = 31; max >= 0; max-- ) {
+ sprintf( buff, afmt, max );
+ A[max] = part_find_signal( PART, buff );
+ if(A[max]) break;
+ }
+ if ( ALSBI == -1 )
+ ALSBI = ( max-AMSBI < AMSBI-min ) ? min : max;
+ else
+ AMSBI = ( max-ALSBI < ALSBI-min ) ? min : max;
+ }
+ AI = ( AMSBI > ALSBI ? 1 : -1 );
+ AW = ( AMSBI > ALSBI ? AMSBI - ALSBI : ALSBI - AMSBI ) + 1;
+ for (i = 0, j = ALSBI; i < AW; i++, j += AI ) {
+ sprintf( buff, afmt, j );
+ A[j] = part_find_signal( PART, buff );
+ }
+ } else {
+ printf( _("parameters alsb=<signal> and/or amsb=<signal> are not defined\n") );
+ failed = 1;
+ }
+
+ if ( DLSBI >= 0 || DMSBI >= 0 ) {
+ if ( DLSBI == -1 || DMSBI == -1 ) {
+ for ( min = 0; min <= 31; min++ ) {
+ sprintf( buff, dfmt, min );
+ D[min] = part_find_signal( PART, buff );
+ if(D[min]) break;
+ }
+ for ( max = 31; max >= 0; max-- ) {
+ sprintf( buff, dfmt, max );
+ D[max] = part_find_signal( PART, buff );
+ if(D[max]) break;
+ }
+ if ( DLSBI == -1 )
+ DLSBI = ( max - DMSBI < DMSBI - min ) ? min : max;
+ else
+ DMSBI = ( max - DLSBI < DLSBI - min ) ? min : max;
+ }
+ DI = ( DMSBI > DLSBI ? 1 : -1 );
+ DW = ( DMSBI > DLSBI ? DMSBI - DLSBI : DLSBI - DMSBI ) + 1;
+ for ( i = 0, j = DLSBI; i < DW; i++, j += DI ) {
+ sprintf( buff, dfmt, j );
+ D[j] = part_find_signal( PART, buff );
+ }
+
+ /* bus drivers are called with a byte address
+ this address needs to be adjusted by setup_address() to the memory data width */
+ if (ashift < 0) {
+ int nbytes;
+
+ /* parameter 'amode' wasn't specified, derive the address shift from the
+ data bus width */
+ nbytes = DW / 8;
+ if ( DW % 8 > 0 )
+ nbytes++;
+
+ ashift = 0;
+ while (nbytes != 1) {
+ nbytes >>= 1;
+ ashift++;
+ }
+ }
+ ASHIFT = ashift;
+
+ } else {
+ printf( _("parameters dlsb=<signal> and/or dmsb=<signal> are not defined\n") );
+ failed = 1;
+ }
+
+ if (!CS) {
+ printf( _("parameter cs=<signal> or ncs=<signal> is not defined\n") );
+ failed = 1;
+ }
+
+ if (!OE) {
+ printf( _("parameter oe=<signal> or noe=<signal> is not defined\n") );
+ failed = 1;
+ }
+
+ if (!WE) {
+ printf( _("parameter we=<signal> or nwe=<signal> is not defined\n") );
+ failed = 1;
+ }
+
+ if (failed) {
+ free( bus->params );
+ free( bus );
+ return NULL;
+ }
+
+ return bus;
+}
+
+/**
+ * bus->driver->(*printinfo)
+ *
+ */
+static void
+prototype_bus_printinfo( bus_t *bus )
+{
+ int i;
+
+ for ( i = 0; i < CHAIN->parts->len; i++ )
+ if ( PART == CHAIN->parts->parts[i] )
+ break;
+ printf( _("Configurable prototype bus driver via BSR (JTAG part No. %d)\n"), i );
+}
+
+/**
+ * bus->driver->(*area)
+ *
+ */
+static int
+prototype_bus_area( bus_t *bus, uint32_t adr, bus_area_t *area )
+{
+ area->description = NULL;
+ area->start = UINT32_C(0x00000000);
+ area->length = UINT64_C(0x100000000);
+ area->width = DW;
+
+ return URJTAG_STATUS_OK;
+}
+
+static void
+setup_address( bus_t *bus, uint32_t a )
+{
+ int i, j;
+ part_t *p = PART;
+
+ a >>= ASHIFT;
+
+ for ( i = 0, j = ALSBI; i < AW; i++, j += AI )
+ part_set_signal( p, A[j], 1, (a >> i) & 1 );
+}
+
+static void
+set_data_in( bus_t *bus )
+{
+ int i, j;
+ part_t *p = PART;
+ bus_area_t area;
+
+ prototype_bus_area( bus, 0, &area );
+
+ for ( i = 0, j = DLSBI; i < DW; i++, j += DI )
+ part_set_signal( p, D[j], 0, 0 );
+}
+
+static void
+setup_data( bus_t *bus, uint32_t d )
+{
+ int i, j;
+ part_t *p = PART;
+ bus_area_t area;
+
+ prototype_bus_area( bus, 0, &area );
+
+ for ( i = 0, j = DLSBI; i < DW; i++, j += DI )
+ part_set_signal( p, D[j], 1, (d >> i) & 1 );
+}
+
+/**
+ * bus->driver->(*read_start)
+ *
+ */
+static void
+prototype_bus_read_start( bus_t *bus, uint32_t adr )
+{
+ part_t *p = PART;
+ chain_t *chain = CHAIN;
+
+ part_set_signal( p, CS, 1, CSA );
+ part_set_signal( p, WE, 1, WEA ? 0 : 1 );
+ part_set_signal( p, OE, 1, OEA );
+
+ setup_address( bus, adr );
+ set_data_in( bus );
+
+ chain_shift_data_registers( chain, 0 );
+}
+
+/**
+ * bus->driver->(*read_next)
+ *
+ */
+static uint32_t
+prototype_bus_read_next( bus_t *bus, uint32_t adr )
+{
+ part_t *p = PART;
+ chain_t *chain = CHAIN;
+ int i, j;
+ uint32_t d = 0;
+ bus_area_t area;
+
+ prototype_bus_area( bus, adr, &area );
+
+ setup_address( bus, adr );
+ chain_shift_data_registers( chain, 1 );
+
+ for ( i = 0, j = DLSBI; i < DW; i++, j += DI )
+ d |= (uint32_t) (part_get_signal( p, D[j] ) << i);
+
+ return d;
+}
+
+/**
+ * bus->driver->(*read_end)
+ *
+ */
+static uint32_t
+prototype_bus_read_end( bus_t *bus )
+{
+ part_t *p = PART;
+ chain_t *chain = CHAIN;
+ int i, j;
+ uint32_t d = 0;
+ bus_area_t area;
+
+ prototype_bus_area( bus, 0, &area );
+
+ part_set_signal( p, CS, 1, CSA ? 0 : 1 );
+ part_set_signal( p, OE, 1, OEA ? 0 : 1 );
+ chain_shift_data_registers( chain, 1 );
+
+ for ( i = 0, j = DLSBI; i < DW; i++, j += DI )
+ d |= (uint32_t) (part_get_signal( p, D[j] ) << i);
+
+ return d;
+}
+
+/**
+ * bus->driver->(*write)
+ *
+ */
+static void
+prototype_bus_write( bus_t *bus, uint32_t adr, uint32_t data )
+{
+ part_t *p = PART;
+ chain_t *chain = CHAIN;
+
+ part_set_signal( p, CS, 1, CSA );
+ part_set_signal( p, WE, 1, WEA ? 0 : 1 );
+ part_set_signal( p, OE, 1, OEA ? 0 : 1 );
+
+ setup_address( bus, adr );
+ setup_data( bus, data );
+
+ chain_shift_data_registers( chain, 0 );
+
+ part_set_signal( p, WE, 1, WEA );
+ chain_shift_data_registers( chain, 0 );
+ part_set_signal( p, WE, 1, WEA ? 0 : 1 );
+ part_set_signal( p, CS, 1, CSA ? 0 : 1 );
+ chain_shift_data_registers( chain, 0 );
+}
+
+const bus_driver_t prototype_bus = {
+ "prototype",
+ N_("Configurable prototype bus driver via BSR, requires parameters:\n"
+ " amsb=<addr MSB> alsb=<addr LSB> dmsb=<data MSB> dlsb=<data LSB>\n"
+ " ncs=<CS#>|cs=<CS> noe=<OE#>|oe=<OE> nwe=<WE#>|we=<WE> [amode=auto|x8|x16|x32]"),
+ prototype_bus_new,
+ generic_bus_free,
+ prototype_bus_printinfo,
+ generic_bus_prepare_extest,
+ prototype_bus_area,
+ prototype_bus_read_start,
+ prototype_bus_read_next,
+ prototype_bus_read_end,
+ generic_bus_read,
+ prototype_bus_write,
+ generic_bus_no_init
+};
+
--- /dev/null
+/*
+ * $Id$
+ *
+ * Intel PXA2x0 compatible bus driver via BSR
+ * Copyright (C) 2002, 2003 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2002, 2003.
+ *
+ * 2005-01-29: Cliff Brake <cliff.brake@gmail.com> <http://bec-systems.com>
+ * - added support for PXA270
+ *
+ * Documentation:
+ * [1] Intel Corporation, "Intel PXA250 and PXA210 Application Processors
+ * Developer's Manual", February 2002, Order Number: 278522-001
+ *
+ */
+
+#include "sysdep.h"
+
+#include <stdlib.h>
+#include <stdint.h>
+#include <string.h>
+
+#include "part.h"
+#include "bus.h"
+#include "bssignal.h"
+#include "jtag.h"
+#include "buses.h"
+#include "generic_bus.h"
+#include "state.h"
+
+#include "pxa2x0_mc.h"
+
+
+/*
+ * the following defines are used in proc field of the the
+ * bus_params_t structure and are used in various functions
+ * below
+ */
+
+#define PROC_PXA25x 1 // including px26x series
+#define PROC_PXA27x 2
+
+
+#define nCS_TOTAL 6
+
+typedef struct {
+ char* sig_name;
+ int enabled;
+ int bus_width; // set 0 for disabled (or auto-detect)
+ char label_buf[81];
+} ncs_map_entry;
+
+/*
+ * Tables indexed by nCS[index]
+ * An array of plain char* would probably do it too, but anyway...
+ *
+ * Note: the setup of nCS[*] is board-specific, rather than chip-specific!
+ * The memory mapping and nCS[*] functions are normally set up by the boot loader.
+ * In our JTAG code, we manipulate the outer pins explicitly, without the help
+ * of the CPU's memory controller - hence the need to mimick its setup.
+ *
+ * Note that bus_area() and bus_read()/bus_write() use a window of 64MB
+ * per nCS pin (26bit addresses), which seems to be the most common option.
+ * For static CS[0] and CS[1] == 128 MB, the algorithms have to be modified...
+ */
+
+// Fool-proof basic mapping with only nCS[0] wired.
+// nCS[0] doesn't collide with any other GPIO functions.
+static ncs_map_entry pxa25x_ncs_map[nCS_TOTAL] = {
+ {"nCS[0]", 1, 0},
+ {NULL, 0, 0},
+ {NULL, 0, 0},
+ {NULL, 0, 0},
+ {NULL, 0, 0},
+ {NULL, 0, 0}
+};
+
+// Default mapping with all nCS[*] GPIO pins used as nCS.
+// Note that the same GPIO pins might be used e.g. for PCCard
+// service space access or PWM outputs, or some other purpose.
+static ncs_map_entry pxa27x_ncs_map[nCS_TOTAL] = {
+ {"nCS[0]", 1, 0}, // nCS[0]
+ {"GPIO[15]", 1, 16}, // nCS[1]
+ {"GPIO[78]", 1, 16}, // nCS[2]
+ {"GPIO[79]", 1, 16}, // nCS[3]
+ {"GPIO[80]", 1, 16}, // nCS[4]
+ {"GPIO[33]", 1, 16} // nCS[5]
+};
+
+
+typedef struct {
+ uint32_t last_adr;
+ signal_t *ma[26];
+ signal_t *md[32];
+ signal_t *ncs[nCS_TOTAL];
+ signal_t *dqm[4];
+ signal_t *rdnwr;
+ signal_t *nwe;
+ signal_t *noe;
+ signal_t *nsdcas;
+ MC_registers_t MC_registers;
+ int inited;
+ int proc;
+} bus_params_t;
+
+#define PROC ((bus_params_t *) bus->params)->proc
+#define LAST_ADR ((bus_params_t *) bus->params)->last_adr
+#define MA ((bus_params_t *) bus->params)->ma
+#define MD ((bus_params_t *) bus->params)->md
+#define nCS ((bus_params_t *) bus->params)->ncs
+#define DQM ((bus_params_t *) bus->params)->dqm
+#define RDnWR ((bus_params_t *) bus->params)->rdnwr
+#define nWE ((bus_params_t *) bus->params)->nwe
+#define nOE ((bus_params_t *) bus->params)->noe
+#define nSDCAS ((bus_params_t *) bus->params)->nsdcas
+
+#define MC_pointer (&((bus_params_t *) bus->params)->MC_registers)
+
+#define INITED ((bus_params_t *) bus->params)->inited
+
+/**
+ * bus->driver->(*new_bus)
+ *
+ */
+static bus_t *
+pxa2xx_bus_new( chain_t *chain, const bus_driver_t *driver, char *cmd_params[] )
+{
+ part_t *part;
+ bus_t *bus;
+ ncs_map_entry* ncs_map = NULL;
+ char buff[10];
+ int i;
+ int failed = 0;
+
+ if (!chain || !chain->parts || chain->parts->len <= chain->active_part || chain->active_part < 0)
+ return NULL;
+
+ bus = calloc( 1, sizeof (bus_t) );
+ if (!bus)
+ return NULL;
+
+ bus->driver = driver;
+ bus->params = calloc( 1, sizeof (bus_params_t) );
+ if (!bus->params) {
+ free( bus );
+ return NULL;
+ }
+
+ CHAIN = chain;
+ PART = part = chain->parts->parts[chain->active_part];
+ if (strcmp (driver->name, "pxa2x0") == 0)
+ PROC = PROC_PXA25x;
+ else if (strcmp (driver->name, "pxa27x") == 0)
+ PROC = PROC_PXA27x;
+ else {
+ free (bus->params);
+ free (bus);
+ return NULL;
+ }
+
+ for (i = 0; i < 26; i++) {
+ sprintf( buff, "MA[%d]", i );
+ failed |= generic_bus_attach_sig( part, &(MA[i]), buff );
+ }
+
+ for (i = 0; i < 32; i++) {
+ sprintf( buff, "MD[%d]", i );
+ failed |= generic_bus_attach_sig( part, &(MD[i]), buff );
+ }
+
+ if (PROC == PROC_PXA25x) {
+ ncs_map = pxa25x_ncs_map;
+ }
+ else if (PROC == PROC_PXA27x) {
+ ncs_map = pxa27x_ncs_map;
+ }
+ else
+ {
+ printf( "BUG in the code, file %s, line %d: unknown PROC\n", __FILE__, __LINE__ );
+ ncs_map = pxa25x_ncs_map; // be dumb by default
+ }
+ for (i = 0; i < nCS_TOTAL; i++) {
+ if (ncs_map[i].enabled > 0) {
+ failed |= generic_bus_attach_sig( part, &(nCS[i]), ncs_map[i].sig_name );
+ }
+ else // disabled - this GPIO pin is unused or used for some other function
+ {
+ nCS[i] = NULL;
+ }
+ }
+
+ for (i = 0; i < 4; i++) {
+ sprintf( buff, "DQM[%d]", i );
+ failed |= generic_bus_attach_sig( part, &(DQM[i]), buff );
+ }
+
+ failed |= generic_bus_attach_sig( part, &(RDnWR), "RDnWR" );
+
+ failed |= generic_bus_attach_sig( part, &(nWE), "nWE" );
+
+ failed |= generic_bus_attach_sig( part, &(nOE), "nOE" );
+
+ failed |= generic_bus_attach_sig( part, &(nSDCAS), "nSDCAS" );
+
+ if (failed) {
+ free( bus->params );
+ free( bus );
+ return NULL;
+ }
+
+ return bus;
+}
+
+/**
+ * bus->driver->(*printinfo)
+ *
+ */
+static void
+pxa2xx_bus_printinfo( bus_t *bus )
+{
+ int i;
+
+ for (i = 0; i < CHAIN->parts->len; i++)
+ if (PART == CHAIN->parts->parts[i])
+ break;
+ printf( _("%s (JTAG part No. %d)\n"), bus->driver->description, i );
+}
+
+/**
+ * bus->driver->(*init)
+ *
+ */
+static int
+pxa2xx_bus_init( bus_t *bus )
+{
+ chain_t *chain = CHAIN;
+ part_t *p = PART;
+
+ if (tap_state(chain) != Run_Test_Idle) {
+ /* silently skip initialization if TAP isn't in RUNTEST/IDLE state
+ this is required to avoid interfering with detect when initbus
+ is contained in the part description file
+ bus_init() will be called latest by bus_prepare() */
+ return URJTAG_STATUS_OK;
+ }
+
+ part_set_instruction( p, "SAMPLE/PRELOAD" );
+ chain_shift_instructions( chain );
+ chain_shift_data_registers( chain, 1 );
+
+ if (PROC == PROC_PXA25x)
+ {
+ BOOT_DEF = BOOT_DEF_PKG_TYPE |
+ BOOT_DEF_BOOT_SEL(part_get_signal( p, part_find_signal( p, "BOOT_SEL[2]" ) ) << 2
+ | part_get_signal( p, part_find_signal( p, "BOOT_SEL[1]" ) ) << 1
+ | part_get_signal( p, part_find_signal( p, "BOOT_SEL[0]" ) ));
+ }
+ else if (PROC == PROC_PXA27x)
+ {
+ BOOT_DEF = BOOT_DEF_PKG_TYPE |
+ BOOT_DEF_BOOT_SEL(part_get_signal( p, part_find_signal( p, "BOOT_SEL" ) ));
+ }
+ else
+ printf( "BUG in the code, file %s, line %d.\n", __FILE__, __LINE__ );
+
+ part_set_instruction( p, "BYPASS" );
+ chain_shift_instructions( chain );
+
+ INITIALIZED = 1;
+
+ return URJTAG_STATUS_OK;
+}
+
+/**
+ * bus->driver->(*area)
+ *
+ */
+static int
+pxa2xx_bus_area( bus_t *bus, uint32_t adr, bus_area_t *area )
+{
+ uint32_t tmp_addr;
+ int ncs_index;
+
+ /* Static Chip Select 0 (64 MB) */
+ if (adr < UINT32_C(0x04000000)) {
+ area->description = N_("Static Chip Select 0");
+ area->start = UINT32_C(0x00000000);
+ area->length = UINT64_C(0x04000000);
+
+ if (pxa25x_ncs_map[0].bus_width > 0)
+ {
+ area->width = pxa25x_ncs_map[0].bus_width;
+ }
+ else
+ {
+ /* see Table 6-36. in [1] */
+ switch (get_BOOT_DEF_BOOT_SEL(BOOT_DEF)) {
+ case 0:
+ area->width = 32;
+ break;
+ case 1:
+ area->width = 16;
+ break;
+ case 2:
+ case 3:
+ area->width = 0;
+ break;
+ case 4:
+ case 5:
+ case 6:
+ case 7:
+ printf( "TODO - BOOT_SEL: %d\n", get_BOOT_DEF_BOOT_SEL(BOOT_DEF) );
+ return URJTAG_STATUS_FAIL;
+ default:
+ printf( "BUG in the code, file %s, line %d.\n", __FILE__, __LINE__ );
+ return URJTAG_STATUS_FAIL;
+ }
+ }
+ return URJTAG_STATUS_OK;
+ }
+
+ /* Static Chip Select 1..5 (per 64 MB) */
+ for (ncs_index = 1, tmp_addr = 0x04000000; ncs_index <= 5; ncs_index++, tmp_addr += 0x04000000)
+ {
+ if ((adr >= tmp_addr) && (adr < tmp_addr + 0x04000000)) { // if the addr is within our window
+ sprintf(pxa25x_ncs_map[ncs_index].label_buf, "Static Chip Select %d = %s %s",
+ ncs_index, pxa25x_ncs_map[ncs_index].sig_name,
+ pxa25x_ncs_map[ncs_index].enabled ? "" : "(disabled)");
+ area->description = pxa25x_ncs_map[ncs_index].label_buf;
+ area->start = tmp_addr;
+ area->length = UINT64_C(0x04000000);
+ area->width = pxa25x_ncs_map[ncs_index].bus_width;
+
+ return URJTAG_STATUS_OK;
+ }
+ }
+
+ if (adr < UINT32_C(0x48000000)) {
+ area->description = NULL;
+ area->start = UINT32_C(0x18000000);
+ area->length = UINT64_C(0x30000000);
+ area->width = 0;
+
+ return URJTAG_STATUS_OK;
+ }
+
+ if (adr < UINT32_C(0x4C000000)) {
+ area->description = N_("Memory Mapped registers (Memory Ctl)");
+ area->start = UINT32_C(0x48000000);
+ area->length = UINT64_C(0x04000000);
+ area->width = 32;
+
+ return URJTAG_STATUS_OK;
+ }
+
+ area->description = NULL;
+ area->start = UINT32_C(0x4C000000);
+ area->length = UINT64_C(0xB4000000);
+ area->width = 0;
+
+ return URJTAG_STATUS_OK;
+}
+
+/**
+ * bus->driver->(*area)
+ *
+ */
+static int
+pxa27x_bus_area( bus_t *bus, uint32_t adr, bus_area_t *area )
+{
+ uint32_t tmp_addr;
+ int ncs_index;
+
+ /* Static Chip Select 0 (64 MB) */
+ if (adr < UINT32_C(0x04000000)) {
+ area->description = N_("Static Chip Select 0");
+ area->start = UINT32_C(0x00000000);
+ area->length = UINT64_C(0x04000000);
+
+ if (pxa27x_ncs_map[0].bus_width > 0)
+ {
+ area->width = pxa27x_ncs_map[0].bus_width;
+ }
+ else
+ {
+ /* see Table 6-36. in [1] */
+ switch (get_BOOT_DEF_BOOT_SEL(BOOT_DEF)) {
+ case 0:
+ area->width = 32;
+ break;
+ case 1:
+ area->width = 16;
+ break;
+ case 2:
+ case 3:
+ area->width = 0;
+ break;
+ case 4:
+ case 5:
+ case 6:
+ case 7:
+ printf( "TODO - BOOT_SEL: %d\n", get_BOOT_DEF_BOOT_SEL(BOOT_DEF) );
+ return URJTAG_STATUS_FAIL;
+ default:
+ printf( "BUG in the code, file %s, line %d.\n", __FILE__, __LINE__ );
+ return URJTAG_STATUS_FAIL;
+ }
+ }
+ return URJTAG_STATUS_OK;
+ }
+
+ /* Static Chip Select 1..5 (per 64 MB) */
+ for (ncs_index = 1, tmp_addr = 0x04000000; ncs_index <= 5; ncs_index++, tmp_addr += 0x04000000)
+ {
+ //printf( "Checking area %08X - %08X... ", tmp_addr, tmp_addr + 0x04000000 - 1);
+ if ((adr >= tmp_addr) && (adr < tmp_addr + 0x04000000)) { // if the addr is within our window
+ //printf( "match\n");
+ sprintf(pxa27x_ncs_map[ncs_index].label_buf, "Static Chip Select %d = %s %s",
+ ncs_index, pxa27x_ncs_map[ncs_index].sig_name,
+ pxa27x_ncs_map[ncs_index].enabled ? "" : "(disabled)");
+ area->description = pxa27x_ncs_map[ncs_index].label_buf;
+ area->start = tmp_addr;
+ area->length = UINT64_C(0x04000000);
+ area->width = pxa27x_ncs_map[ncs_index].bus_width;
+
+ return URJTAG_STATUS_OK;
+ }
+ //else printf( "no match\n");
+ }
+
+ if (adr < UINT32_C(0x40000000)) {
+ area->description = NULL;
+ area->start = UINT32_C(0x18000000);
+ area->length = UINT64_C(0x28000000);
+ area->width = 0;
+
+ return URJTAG_STATUS_OK;
+ }
+
+ if (adr < UINT32_C(0x60000000)) {
+ area->description = N_("PXA270 internal address space (cfg, SRAM)");
+ area->start = UINT32_C(0x40000000);
+ area->length = UINT64_C(0x20000000);
+ area->width = 32;
+
+ return URJTAG_STATUS_OK;
+ }
+
+ if (adr < UINT32_C(0xA0000000)) {
+ area->description = NULL;
+ area->start = UINT32_C(0x60000000);
+ area->length = UINT64_C(0x40000000);
+ area->width = 0;
+
+ return URJTAG_STATUS_OK;
+ }
+
+ if (adr < UINT32_C(0xB0000000)) {
+ area->description = N_("PXA270 SDRAM space (4x 64MB)");
+ area->start = UINT32_C(0xA0000000);
+ area->length = UINT64_C(0x10000000);
+ area->width = 32;
+
+ return URJTAG_STATUS_OK;
+ }
+
+ area->description = NULL;
+ area->start = UINT32_C(0xB0000000);
+ area->length = UINT64_C(0x50000000);
+ area->width = 0;
+
+ return URJTAG_STATUS_OK;
+}
+
+static void
+setup_address( bus_t *bus, uint32_t a )
+{
+ int i;
+ part_t *p = PART;
+
+ for (i = 0; i < 26; i++)
+ part_set_signal( p, MA[i], 1, (a >> i) & 1 );
+}
+
+static void
+set_data_in( bus_t *bus, uint32_t adr )
+{
+ int i;
+ part_t *p = PART;
+ bus_area_t area;
+
+ bus->driver->area( bus, adr, &area );
+
+ for (i = 0; i < area.width; i++)
+ part_set_signal( p, MD[i], 0, 0 );
+}
+
+static void
+setup_data( bus_t *bus, uint32_t adr, uint32_t d )
+{
+ int i;
+ part_t *p = PART;
+ bus_area_t area;
+
+ bus->driver->area( bus, adr, &area );
+
+ for (i = 0; i < area.width; i++)
+ part_set_signal( p, MD[i], 1, (d >> i) & 1 );
+}
+
+/**
+ * bus->driver->(*read_start)
+ *
+ */
+static void
+pxa2xx_bus_read_start( bus_t *bus, uint32_t adr )
+{
+ int cs_index = 0;
+
+ chain_t *chain = CHAIN;
+ part_t *p = PART;
+
+ LAST_ADR = adr;
+ if (adr >= 0x18000000)
+ return;
+
+ cs_index = adr >> 26;
+ if (nCS[cs_index] == NULL)
+ return;
+
+ /* see Figure 6-13 in [1] */
+ part_set_signal( p, nCS[cs_index], 1, 0 );
+ part_set_signal( p, DQM[0], 1, 0 );
+ part_set_signal( p, DQM[1], 1, 0 );
+ part_set_signal( p, DQM[2], 1, 0 );
+ part_set_signal( p, DQM[3], 1, 0 );
+ part_set_signal( p, RDnWR, 1, 1 );
+ part_set_signal( p, nWE, 1, 1 );
+ part_set_signal( p, nOE, 1, 0 );
+ part_set_signal( p, nSDCAS, 1, 0 );
+
+ setup_address( bus, adr );
+ set_data_in( bus, adr );
+
+ chain_shift_data_registers( chain, 0 );
+}
+
+/**
+ * bus->driver->(*read_next)
+ *
+ */
+static uint32_t
+pxa2xx_bus_read_next( bus_t *bus, uint32_t adr )
+{
+ part_t *p = PART;
+ chain_t *chain = CHAIN;
+ uint32_t d;
+ uint32_t old_last_adr = LAST_ADR;
+
+ LAST_ADR = adr;
+
+ if (adr < UINT32_C(0x18000000)) {
+ int i;
+ bus_area_t area;
+
+ if (nCS[adr >> 26] == NULL) // avoid undefined nCS windows
+ return 0;
+
+ bus->driver->area( bus, adr, &area );
+
+ /* see Figure 6-13 in [1] */
+ setup_address( bus, adr );
+ chain_shift_data_registers( chain, 1 );
+
+ d = 0;
+ for (i = 0; i < area.width; i++)
+ d |= (uint32_t) (part_get_signal( p, MD[i] ) << i);
+
+ return d;
+ }
+
+ // anything above 0x18000000 is essentially unreachable...
+ if (adr < UINT32_C(0x48000000))
+ return 0;
+
+ if (adr < UINT32_C(0x4C000000)) {
+ if (old_last_adr == (MC_BASE + BOOT_DEF_OFFSET))
+ return BOOT_DEF;
+
+ return 0;
+ }
+
+ return 0;
+}
+
+/**
+ * bus->driver->(*read_end)
+ *
+ */
+static uint32_t
+pxa2xx_bus_read_end( bus_t *bus )
+{
+ part_t *p = PART;
+ chain_t *chain = CHAIN;
+
+ if (LAST_ADR < UINT32_C(0x18000000)) {
+ int i;
+ uint32_t d = 0;
+ bus_area_t area;
+
+ if (nCS[LAST_ADR >> 26] == NULL) // avoid undefined nCS windows
+ return 0;
+
+ bus->driver->area( bus, LAST_ADR, &area );
+
+ /* see Figure 6-13 in [1] */
+ part_set_signal( p, nCS[0], 1, 1 );
+ part_set_signal( p, nOE, 1, 1 );
+ part_set_signal( p, nSDCAS, 1, 1 );
+
+ chain_shift_data_registers( chain, 1 );
+
+ for (i = 0; i < area.width; i++)
+ d |= (uint32_t) (part_get_signal( p, MD[i] ) << i);
+
+ return d;
+ }
+
+ // anything above 0x18000000 is essentially unreachable...
+ if (LAST_ADR < UINT32_C(0x48000000))
+ return 0;
+
+ if (LAST_ADR < UINT32_C(0x4C000000)) {
+ if (LAST_ADR == (MC_BASE + BOOT_DEF_OFFSET))
+ return BOOT_DEF;
+
+ return 0;
+ }
+
+ return 0;
+}
+
+/**
+ * bus->driver->(*write)
+ *
+ */
+static void
+pxa2xx_bus_write( bus_t *bus, uint32_t adr, uint32_t data )
+{
+ int cs_index = 0;
+
+ /* see Figure 6-17 in [1] */
+ part_t *p = PART;
+ chain_t *chain = CHAIN;
+
+ if (adr >= 0x18000000)
+ return;
+
+ cs_index = adr >> 26;
+ if (nCS[cs_index] == NULL)
+ return;
+
+ part_set_signal( p, nCS[cs_index], 1, 0 );
+ part_set_signal( p, DQM[0], 1, 0 );
+ part_set_signal( p, DQM[1], 1, 0 );
+ part_set_signal( p, DQM[2], 1, 0 );
+ part_set_signal( p, DQM[3], 1, 0 );
+ part_set_signal( p, RDnWR, 1, 0 );
+ part_set_signal( p, nWE, 1, 1 );
+ part_set_signal( p, nOE, 1, 1 );
+ part_set_signal( p, nSDCAS, 1, 0 );
+
+ setup_address( bus, adr );
+ setup_data( bus, adr, data );
+
+ chain_shift_data_registers( chain, 0 );
+
+ part_set_signal( p, nWE, 1, 0 );
+ chain_shift_data_registers( chain, 0 );
+ part_set_signal( p, nWE, 1, 1 );
+ chain_shift_data_registers( chain, 0 );
+}
+
+const bus_driver_t pxa2x0_bus = {
+ "pxa2x0",
+ N_("Intel PXA2x0 compatible bus driver via BSR"),
+ pxa2xx_bus_new,
+ generic_bus_free,
+ pxa2xx_bus_printinfo,
+ generic_bus_prepare_extest,
+ pxa2xx_bus_area,
+ pxa2xx_bus_read_start,
+ pxa2xx_bus_read_next,
+ pxa2xx_bus_read_end,
+ generic_bus_read,
+ pxa2xx_bus_write,
+ pxa2xx_bus_init
+};
+
+const bus_driver_t pxa27x_bus = {
+ "pxa27x",
+ N_("Intel PXA27x compatible bus driver via BSR"),
+ pxa2xx_bus_new,
+ generic_bus_free,
+ pxa2xx_bus_printinfo,
+ generic_bus_prepare_extest,
+ pxa27x_bus_area,
+ pxa2xx_bus_read_start,
+ pxa2xx_bus_read_next,
+ pxa2xx_bus_read_end,
+ generic_bus_read,
+ pxa2xx_bus_write,
+ pxa2xx_bus_init
+};
--- /dev/null
+/*
+ * $Id$
+ *
+ * XScale PXA26x/PXA255/PXA250/PXA210 Memory Controller Registers
+ * Copyright (C) 2002, 2003 ETC s.r.o.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the ETC s.r.o. nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2002, 2003.
+ *
+ * Documentation:
+ * [1] Intel Corporation, "Intel PXA250 and PXA210 Application Processors
+ * Developer's Manual", February 2002, Order Number: 278522-001
+ * [2] Intel Corporation, "Intel PXA250 and PXA210 Application Processors
+ * Specification Update", February 2003, Order Number: 278534-012
+ * [3] Intel Corporation, "Intel PXA26x Processor Family Developer's Manual",
+ * March 2003, Order Number: 278638-002
+ * [4] Intel Corporation, "Intel PXA255 Processor Developer's Manual"
+ * March 2003, Order Number: 278693-001
+ *
+ */
+
+#ifndef PXA2X0_MC_H
+#define PXA2X0_MC_H
+
+#include <bitmask.h>
+
+#ifndef __ASSEMBLY__
+#include <stdint.h>
+#endif
+
+#if defined(PXA2X0_NOPXA250) && !defined(PXA2X0_NOPXA255)
+#define PXA2X0_NOPXA255
+#endif
+
+#if defined(PXA2X0_NOPXA255) && !defined(PXA2X0_NOPXA260)
+#define PXA2X0_NOPXA260
+#endif
+
+/* Memory Controller Registers */
+
+#define MC_BASE 0x48000000
+
+#ifndef __ASSEMBLY__
+typedef volatile struct MC_registers {
+ uint32_t mdcnfg;
+ uint32_t mdrefr;
+ uint32_t msc0;
+ uint32_t msc1;
+ uint32_t msc2;
+ uint32_t mecr;
+ uint32_t __reserved1;
+ uint32_t sxcnfg;
+ uint32_t __reserved2;
+ uint32_t sxmrs;
+ uint32_t mcmem0;
+ uint32_t mcmem1;
+ uint32_t mcatt0;
+ uint32_t mcatt1;
+ uint32_t mcio0;
+ uint32_t mcio1;
+ uint32_t mdmrs;
+ uint32_t boot_def;
+#if !defined(PXA2X0_NOPXA255)
+ uint32_t __reserved3[4];
+ uint32_t mdmrslp;
+#endif /* PXA255 and above only */
+#if !defined(PXA2X0_NOPXA260)
+ uint32_t __reserved4[2];
+ uint32_t sa1111cr;
+#endif /* PXA260 and above only */
+} MC_registers_t;
+
+#ifdef PXA2X0_UNMAPPED
+#define MC_pointer ((MC_registers_t*) MC_BASE)
+#endif
+
+#define MDCNFG MC_pointer->mdcnfg
+#define MDREFR MC_pointer->mdrefr
+#define MSC0 MC_pointer->msc0
+#define MSC1 MC_pointer->msc1
+#define MSC2 MC_pointer->msc2
+#define MECR MC_pointer->mecr
+#define SXCNFG MC_pointer->sxcnfg
+#define SXMRS MC_pointer->sxmrs
+#define MCMEM0 MC_pointer->mcmem0
+#define MCMEM1 MC_pointer->mcmem1
+#define MCATT0 MC_pointer->mcatt0
+#define MCATT1 MC_pointer->mcatt1
+#define MCIO0 MC_pointer->mcio0
+#define MCIO1 MC_pointer->mcio1
+#define MDMRS MC_pointer->mdmrs
+#define BOOT_DEF MC_pointer->boot_def
+#if !defined(PXA2X0_NOPXA255)
+#define MDMRSLP MC_pointer->mdmrslp
+#endif /* PXA255 and above only */
+#if !defined(PXA2X0_NOPXA260)
+#define SA1111CR MC_pointer->sa1111cr
+#endif /* PXA260 and above only */
+#endif /* __ASSEMBLY__ */
+
+#define MDCNFG_OFFSET 0x00
+#define MDREFR_OFFSET 0x04
+#define MSC0_OFFSET 0x08
+#define MSC1_OFFSET 0x0C
+#define MSC2_OFFSET 0x10
+#define MECR_OFFSET 0x14
+#define SXCNFG_OFFSET 0x1C
+#define SXMRS_OFFSET 0x24
+#define MCMEM0_OFFSET 0x28
+#define MCMEM1_OFFSET 0x2C
+#define MCATT0_OFFSET 0x30
+#define MCATT1_OFFSET 0x34
+#define MCIO0_OFFSET 0x38
+#define MCIO1_OFFSET 0x3C
+#define MDMRS_OFFSET 0x40
+#define BOOT_DEF_OFFSET 0x44
+#if !defined(PXA2X0_NOPXA255)
+#define MDMRSLP_OFFSET 0x58
+#endif /* PXA255 and above only */
+#if !defined(PXA2X0_NOPXA260)
+#define SA1111CR_OFFSET 0x64
+#endif /* PXA260 and above only */
+
+/* MDCNFG bits - see Table 6-3 in [1] and D25 in [2], Table 6-3 in [3], Table 6-2 in [4] */
+
+#define MDCNFG_DSA1111_2 bit(28)
+#define MDCNFG_DLATCH2 bit(27)
+#define MDCNFG_DTC2_MASK bits(25,24)
+#define MDCNFG_DTC2(x) bits_val(25,24,x)
+#define get_MDCNFG_DTC2(x) bits_get(25,24,x)
+#define MDCNFG_DNB2 bit(23)
+#define MDCNFG_DRAC2_MASK bits(22,21)
+#define MDCNFG_DRAC2(x) bits_val(22,21,x)
+#define get_MDCNFG_DRAC2(x) bits_get(22,21,x)
+#define MDCNFG_DCAC2_MASK bits(20,19)
+#define MDCNFG_DCAC2(x) bits_val(20,19,x)
+#define get_MDCNFG_DCAC2(x) bits_get(20,19,x)
+#define MDCNFG_DWID2 bit(18)
+#define MDCNFG_DE3 bit(17)
+#define MDCNFG_DE2 bit(16)
+#define MDCNFG_DSA1111_0 bit(12)
+#define MDCNFG_DLATCH0 bit(11)
+#define MDCNFG_DTC0_MASK bits(9,8)
+#define MDCNFG_DTC0(x) bits_val(9,8,x)
+#define get_MDCNFG_DTC0(x) bits_get(9,8,x)
+#define MDCNFG_DNB0 bit(7)
+#define MDCNFG_DRAC0_MASK bits(6,5)
+#define MDCNFG_DRAC0(x) bits_val(6,5,x)
+#define get_MDCNFG_DRAC0(x) bits_get(6,5,x)
+#define MDCNFG_DCAC0_MASK bits(4,3)
+#define MDCNFG_DCAC0(x) bits_val(4,3,x)
+#define get_MDCNFG_DCAC0(x) bits_get(4,3,x)
+#define MDCNFG_DWID0 bit(2)
+#define MDCNFG_DE1 bit(1)
+#define MDCNFG_DE0 bit(0)
+
+/* MDREFR bits - see Table 6-5 in [1], Table 6-6 in [3], Table 6-5 in [4] */
+
+#define MDREFR_K2FREE bit(25)
+#define MDREFR_K1FREE bit(24)
+#define MDREFR_K0FREE bit(23)
+#define MDREFR_SLFRSH bit(22)
+#define MDREFR_APD bit(20)
+#define MDREFR_K2DB2 bit(19)
+#define MDREFR_K2RUN bit(18)
+#define MDREFR_K1DB2 bit(17)
+#define MDREFR_K1RUN bit(16)
+#define MDREFR_E1PIN bit(15)
+#define MDREFR_K0DB2 bit(14)
+#define MDREFR_K0RUN bit(13)
+#define MDREFR_E0PIN bit(12)
+#define MDREFR_DRI_MASK bits(11,0)
+#define MDREFR_DRI(x) bits_val(11,0,x)
+#define get_MDREFR_DRI(x) bits_get(11,0,x)
+
+/* MSC0 bits - see Table 6-21 in [1], Table 6-25 in [3], Table 6-21 in [4] */
+
+#define MSC0_RBUFF1 bit(31)
+#define MSC0_RRR1_MASK bits(30,28)
+#define MSC0_RRR1(x) bits_val(30,28,x)
+#define get_MSC0_RRR1(x) bits_get(30,28,x)
+#define MSC0_RDN1_MASK bits(27,24)
+#define MSC0_RDN1(x) bits_val(27,24,x)
+#define get_MSC0_RDN1(x) bits_get(27,24,x)
+#define MSC0_RDF1_MASK bits(23,20)
+#define MSC0_RDF1(x) bits_val(23,20,x)
+#define get_MSC0_RDF1(x) bits_get(23,20,x)
+#define MSC0_RBW1 bit(19)
+#define MSC0_RT1_MASK bits(18,16)
+#define MSC0_RT1(x) bits_val(18,16,x)
+#define get_MSC0_RT1(x) bits_get(18,16,x)
+#define MSC0_RBUFF0 bit(15)
+#define MSC0_RRR0_MASK bits(14,12)
+#define MSC0_RRR0(x) bits_val(14,12,x)
+#define get_MSC0_RRR0(x) bits_get(14,12,x)
+#define MSC0_RDN0_MASK bits(11,9)
+#define MSC0_RDN0(x) bits_val(11,8,x)
+#define get_MSC0_RDN0(x) bits_get(11,8,x)
+#define MSC0_RDF0_MASK bits(7,4)
+#define MSC0_RDF0(x) bits_val(7,4,x)
+#define get_MSC0_RDF0(x) bits_get(7,4,x)
+#define MSC0_RBW0 bit(3)
+#define MSC0_RT0_MASK bits(2,0)
+#define MSC0_RT0(x) bits_val(2,0,x)
+#define get_MSC0_RT0(x) bits_get(2,0,x)
+
+/* MSC1 bits - see Table 6-21 in [1], Table 6-25 in [3], Table 6-21 in [4] */
+
+#define MSC1_RBUFF3 bit(31)
+#define MSC1_RRR3_MASK bits(30,28)
+#define MSC1_RRR3(x) bits_val(30,28,x)
+#define get_MSC1_RRR3(x) bits_get(30,28,x)
+#define MSC1_RDN3_MASK bits(27,24)
+#define MSC1_RDN3(x) bits_val(27,24,x)
+#define get_MSC1_RDN3(x) bits_get(27,24,x)
+#define MSC1_RDF3_MASK bits(23,20)
+#define MSC1_RDF3(x) bits_val(23,20,x)
+#define get_MSC1_RDF3(x) bits_get(23,20,x)
+#define MSC1_RBW3 bit(19)
+#define MSC1_RT3_MASK bits(18,16)
+#define MSC1_RT3(x) bits_val(18,16,x)
+#define get_MSC1_RT3(x) bits_get(18,16,x)
+#define MSC1_RBUFF2 bit(15)
+#define MSC1_RRR2_MASK bits(14,12)
+#define MSC1_RRR2(x) bits_val(14,12,x)
+#define get_MSC1_RRR2(x) bits_get(14,12,x)
+#define MSC1_RDN2_MASK bits(11,9)
+#define MSC1_RDN2(x) bits_val(11,8,x)
+#define get_MSC1_RDN2(x) bits_get(11,8,x)
+#define MSC1_RDF2_MASK bits(7,4)
+#define MSC1_RDF2(x) bits_val(7,4,x)
+#define get_MSC1_RDF2(x) bits_get(7,4,x)
+#define MSC1_RBW2 bit(3)
+#define MSC1_RT2_MASK bits(2,0)
+#define MSC1_RT2(x) bits_val(2,0,x)
+#define get_MSC1_RT2(x) bits_get(2,0,x)
+
+/* MSC2 bits - see Table 6-21 in [1], Table 6-25 in [3], Table 6-21 in [4] */
+
+#define MSC2_RBUFF5 bit(31)
+#define MSC2_RRR5_MASK bits(30,28)
+#define MSC2_RRR5(x) bits_val(30,28,x)
+#define get_MSC2_RRR5(x) bits_get(30,28,x)
+#define MSC2_RDN5_MASK bits(27,24)
+#define MSC2_RDN5(x) bits_val(27,24,x)
+#define get_MSC2_RDN5(x) bits_get(27,24,x)
+#define MSC2_RDF5_MASK bits(23,20)
+#define MSC2_RDF5(x) bits_val(23,20,x)
+#define get_MSC2_RDF5(x) bits_get(23,20,x)
+#define MSC2_RBW5 bit(19)
+#define MSC2_RT5_MASK bits(18,16)
+#define MSC2_RT5(x) bits_val(18,16,x)
+#define get_MSC2_RT5(x) bits_get(18,16,x)
+#define MSC2_RBUFF4 bit(15)
+#define MSC2_RRR4_MASK bits(14,12)
+#define MSC2_RRR4(x) bits_val(14,12,x)
+#define get_MSC2_RRR4(x) bits_get(14,12,x)
+#define MSC2_RDN4_MASK bits(11,9)
+#define MSC2_RDN4(x) bits_val(11,8,x)
+#define get_MSC2_RDN4(x) bits_get(11,8,x)
+#define MSC2_RDF4_MASK bits(7,4)
+#define MSC2_RDF4(x) bits_val(7,4,x)
+#define get_MSC2_RDF4(x) bits_get(7,4,x)
+#define MSC2_RBW4 bit(3)
+#define MSC2_RT4_MASK bits(2,0)
+#define MSC2_RT4(x) bits_val(2,0,x)
+#define get_MSC2_RT4(x) bits_get(2,0,x)
+
+/* MECR bits - see Table 6-27 in [1], Table 6-31 in [3], Table 6-27 in [4] */
+
+#define MECR_CIT bit(1)
+#define MECR_NOS bit(0)
+
+/* SXCNFG bits - see Table 6-13 in [1], Table 6-14 in [3], Table 6-13 in [4] */
+
+#define SXCNFG_SXLATCH2 bit(30)
+#define SXCNFG_SXTP2_MASK bits(29,28)
+#define SXCNFG_SXTP2(x) bits_val(29,28,x)
+#define get_SXCNFG_SXTP2(x) bits_get(29,28,x)
+#define SXCNFG_SXCA2_MASK bits(27,26)
+#define SXCNFG_SXCA2(x) bits_val(27,26,x)
+#define get_SXCNFG_SXCA2(x) bits_get(27,26,x)
+#define SXCNFG_SXRA2_MASK bits(25,24)
+#define SXCNFG_SXRA2(x) bits_val(25,24,x)
+#define get_SXCNFG_SXRA2(x) bits_get(25,24,x)
+#define SXCNFG_SXRL2_MASK bits(23,21)
+#define SXCNFG_SXRL2(x) bits(23,21,x)
+#define SXCNFG_SXCL2_MASK bits(20,18)
+#define SXCNFG_SXCL2(x) bits_val(20,18,x)
+#define get_SXCNFG_SXCL2(x) bits_get(20,18,x)
+#define SXCNFG_SXEN2_MASK bits(17,16)
+#define SXCNFG_SXEN2(x) bits_val(17,16,x)
+#define get_SXCNFG_SXEN2(x) bits_get(17,16,x)
+#define SXCNFG_SXLATCH0 bit(14)
+#define SXCNFG_SXTP0_MASK bits(13,12)
+#define SXCNFG_SXTP0(x) bits_val(13,12,x)
+#define get_SXCNFG_SXTP0(x) bits_get(13,12,x)
+#define SXCNFG_SXCA0_MASK bits(11,10)
+#define SXCNFG_SXCA0(x) bits_val(11,10,x)
+#define get_SXCNFG_SXCA0(x) bits_get(11,10,x)
+#define SXCNFG_SXRA0_MASK bits(9,8)
+#define SXCNFG_SXRA0(x) bits_val(9,8,x)
+#define get_SXCNFG_SXRA0(x) bits_get(9,8,x)
+#define SXCNFG_SXRL0_MASK bits(7,5)
+#define SXCNFG_SXRL0(x) bits(7,5,x)
+#define SXCNFG_SXCL0_MASK bits(4,2)
+#define SXCNFG_SXCL0(x) bits_val(4,2,x)
+#define get_SXCNFG_SXCL0(x) bits_get(4,2,x)
+#define SXCNFG_SXEN0_MASK bits(1,0)
+#define SXCNFG_SXEN0(x) bits_val(1,0,x)
+#define get_SXCNFG_SXEN0(x) bits_get(1,0,x)
+
+/* SXMRS bits - see Table 6-16 in [1], Table 6-17 in [3], Table 6-16 in [4] */
+
+#define SXMRS_SXMRS2_MASK bits(30,16)
+#define SXMRS_SXMRS2(x) bits_val(30,16,x)
+#define get_SXMRS_SXMRS2(x) bits_get(30,16,x)
+#define SXMRS_SXMRS0_MASK bits(14,0)
+#define SXMRS_SXMRS0(x) bits_val(14,0,x)
+#define get_SXMRS_SXMRS0(x) bits_get(14,0,x)
+
+/* MCMEMx bits - see Table 6-23 in [1], Table 6-27 in [3], Table 6-23 in [4] */
+
+#define MCMEM_HOLD_MASK bits(19,14)
+#define MCMEM_HOLD(x) bits_val(19,14,x)
+#define get_MCMEM_HOLD(x) bits_get(19,14,x)
+#define MCMEM_ASST_MASK bits(11,7)
+#define MCMEM_ASST(x) bits_val(11,7,x)
+#define get_MCMEM_ASST(x) bits_get(11,7,x)
+#define MCMEM_SET_MASK bits(6,0)
+#define MCMEM_SET(x) bits_val(6,0,x)
+#define get_MCMEM_SET(x) bits_get(6,0,x)
+
+/* MCATTx bits - see Table 6-24 in [1], Table 6-28 in [3], Table 6-24 in [4] */
+
+#define MCATT_HOLD_MASK bits(19,14)
+#define MCATT_HOLD(x) bits_val(19,14,x)
+#define get_MCATT_HOLD(x) bits_get(19,14,x)
+#define MCATT_ASST_MASK bits(11,7)
+#define MCATT_ASST(x) bits_val(11,7,x)
+#define get_MCATT_ASST(x) bits_get(11,7,x)
+#define MCATT_SET_MASK bits(6,0)
+#define MCATT_SET(x) bits_val(6,0,x)
+#define get_MCATT_SET(x) bits_get(6,0,x)
+
+/* MCIOx bits - see Table 6-25 in [1], Table 6-29 in [3], Table 6-25 in [4] */
+
+#define MCIO_HOLD_MASK bits(19,14)
+#define MCIO_HOLD(x) bits_val(19,14,x)
+#define get_MCIO_HOLD(x) bits_get(19,14,x)
+#define MCIO_ASST_MASK bits(11,7)
+#define MCIO_ASST(x) bits_val(11,7,x)
+#define get_MCIO_ASST(x) bits_get(11,7,x)
+#define MCIO_SET_MASK bits(6,0)
+#define MCIO_SET(x) bits_val(6,0,x)
+#define get_MCIO_SET(x) bits_get(6,0,x)
+
+/* MDMRS bits - see Table 6-4 in [1], Table 6-4 in [3], Table 6-3 in [4] */
+
+#define MDMRS_MDMRS2_MASK bits(30,23)
+#define MDMRS_MDMRS2(x) bits_val(30,23,x)
+#define get_MDMRS_MDMRS2(x) bits_get(30,23,x)
+#define MDMRS_MDCL2_MASK bits(22,20)
+#define MDMRS_MDCL2(x) bits_val(22,20,x)
+#define get_MDMRS_MDCL2(x) bits_get(22,20,x)
+#define MDMRS_MDADD2 bit(19)
+#define MDMRS_MDBL2_MASK bits(18,16)
+#define MDMRS_MDBL2(x) bits_val(18,16,x)
+#define get_MDMRS_MDBL2(x) bits_get(18,16,x)
+#define MDMRS_MDMRS0_MASK bits(14,7)
+#define MDMRS_MDMRS0(x) bits_val(14,7,x)
+#define get_MDMRS_MDMRS0(x) bits_get(14,7,x)
+#define MDMRS_MDCL0_MASK bits(6,4)
+#define MDMRS_MDCL0(x) bits_val(6,4,x)
+#define get_MDMRS_MDCL0(x) bits_get(6,4,x)
+#define MDMRS_MDADD0 bit(3)
+#define MDMRS_MDBL0_MASK bits(2,0)
+#define MDMRS_MDBL0(x) bits_val(2,0,x)
+#define get_MDMRS_MDBL0(x) bits_get(2,0,x)
+
+/* BOOT_DEF bits - see Table 6-37 in [1], Table 6-40 in [3], Table 6-37 in [4] */
+
+#define BOOT_DEF_PKG_TYPE bit(3)
+#define BOOT_DEF_BOOT_SEL_MASK bits(2,0)
+#define BOOT_DEF_BOOT_SEL(x) bits_val(2,0,x)
+#define get_BOOT_DEF_BOOT_SEL(x) bits_get(2,0,x)
+
+#if !defined(PXA2X0_NOPXA255)
+/* MDMRSLP bits - see Table 6-5 in [3], Table 6-4 in [4] */
+
+#define MDMRSLP_MDLPEN2 bit(31)
+#define MDMRSLP_MDMRSLP2_MASK bits(30,16)
+#define MDMRSLP_MDMRSLP2(x) bits_val(30,16,x)
+#define get_MDMRSLP_MDMRSLP2(x) bits_get(30,16,x)
+#define MDMRSLP_MDLPEN0 bit(15)
+#define MDMRSLP_MDMRSLP0_MASK bits(14,0)
+#define MDMRSLP_MDMRSLP0(x) bits_val(14,0,x)
+#define get_MDMRSLP_MDMRSLP0(x) bits_get(14,0,x)
+#endif /* PXA255 and above only */
+
+#if !defined(PXA2X0_NOPXA260)
+/* SA1111CR bits - see Table 6-24 in [3] */
+
+#define SA1111CR_SA1111_5 bit(5)
+#define SA1111CR_SA1111_4 bit(4)
+#define SA1111CR_SA1111_3 bit(3)
+#define SA1111CR_SA1111_2 bit(2)
+#define SA1111CR_SA1111_1 bit(1)
+#define SA1111CR_SA1111_0 bit(0)
+#endif /* PXA260 and above only */
+
+#endif /* PXA2X0_MC_H */
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2002 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2002.
+ *
+ * Documentation:
+ * [1] JEDEC Solid State Technology Association, "Common Flash Interface (CFI)",
+ * September 1999, Order Number: JESD68
+ * [2] JEDEC Solid State Technology Association, "Common Flash Interface (CFI) ID Codes",
+ * September 2001, Order Number: JEP137-A
+ *
+ */
+
+#include "sysdep.h"
+
+#include <stdint.h>
+#include <string.h>
+#include <flash/cfi.h>
+#include <flash/intel.h>
+#include <flash/mic.h>
+
+#include "bus.h"
+#include "flash.h"
+#include "jtag.h"
+
+void
+readmem( bus_t *bus, FILE *f, uint32_t addr, uint32_t len )
+{
+ uint32_t step;
+ uint32_t a;
+ int bc = 0;
+#define BSIZE 4096
+ uint8_t b[BSIZE];
+ bus_area_t area;
+ uint64_t end;
+
+ if (!bus) {
+ printf( _("Error: Missing bus driver!\n") );
+ return;
+ }
+
+ bus_prepare( bus );
+
+ if (bus_area( bus, addr, &area ) != URJTAG_STATUS_OK) {
+ printf( _("Error: Bus width detection failed\n") );
+ return;
+ }
+ step = area.width / 8;
+
+ if (step == 0) {
+ printf( _("Unknown bus width!\n") );
+ return;
+ }
+
+ addr = addr & (~(step - 1));
+ len = (len + step - 1) & (~(step - 1));
+
+ printf( _("address: 0x%08X\n"), addr );
+ printf( _("length: 0x%08X\n"), len );
+
+ if (len == 0) {
+ printf( _("length is 0.\n") );
+ return;
+ }
+
+ a = addr;
+ end = a + len;
+ printf( _("reading:\n") );
+ bus_read_start( bus, addr );
+ for (a += step; a <= end; a += step) {
+ uint32_t data;
+ int j;
+
+ if (a < addr + len)
+ data = bus_read_next( bus, a );
+ else
+ data = bus_read_end( bus );
+
+ for (j = step; j > 0; j--)
+ if (big_endian)
+ b[bc++] = (data >> ((j - 1) * 8)) & 0xFF;
+ else {
+ b[bc++] = data & 0xFF;
+ data >>= 8;
+ }
+
+ if ((bc >= BSIZE) || (a >= end) ) {
+ printf( _("addr: 0x%08X"), a );
+ printf( "\r" );
+ fflush( stdout );
+ fwrite( b, bc, 1, f );
+ bc = 0;
+ }
+ }
+
+ printf( _("\nDone.\n") );
+}
--- /dev/null
+/**
+** @file s3c4510x.c
+**
+** $Id$
+**
+** Copyright (C) 2003, All Rights Reserved
+**
+** This program is free software; you can redistribute it and/or
+** modify it under the terms of the GNU General Public License
+** as published by the Free Software Foundation; either version 2
+** of the License, or (at your option) any later version.
+**
+** This program is distributed in the hope that it will be useful,
+** but WITHOUT ANY WARRANTY; without even the implied warranty of
+** MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+** GNU General Public License for more details.
+**
+** You should have received a copy of the GNU General Public License
+** along with this program; if not, write to the Free Software
+** Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+** 02111-1307, USA.
+**
+** @author
+** Jiun-Shian Ho <asky@syncom.com.tw>,
+** Copy from other bus drivers written by Marcel Telka <marcel@telka.sk>
+**
+** Krzysztof Blaszkowski <info@sysmikro.com.pl>
+** - fixed bug with driving nWBE, nECS, nSDCS (for SDRAM),
+** - fixed bug with preparing bus state after each chain_shift_data_registers().
+** tested on "peek" command only (2003/10/07).
+**
+** @brief
+** Bus driver for Samsung S3C4510X (ARM7TDMI) micro controller.
+**
+** @par Reference Documentations
+** - [1] Samsung Electronics Co., Ltd.,
+** "S3C4510B 32-Bit RISC Microcontroller User's Manual",
+** Revision 1, August 2000, Order Number: 21-S3-C4510B-082000
+**
+** @note
+** - This bus driver is coded basing on S3C4510B.
+** However, Samsung do NOT giving a special JTAG ID-Code for this chip.
+** - Data Bus width is detected by B0SIZE[0:1];
+** the bus parameter is defined as 32-bit, but actually controlled by
+** @ref dbus_width. Make sure that B0SIZE[0:1] is welded correct.
+** Otherwise, you must modify @ref s3c4510_bus_width().
+** - ROM/Flash is selected by nRCS[5:0], now suppose only nRCS0.
+** So is nWBE[4:0], now suppose only nWBE0
+** - Unfortunately, B0SIZE isn't known before first SCAN/PRELOAD.
+** Is bus driver allowed to do JTAG activity during bus_area or bus_new?
+**
+=============================================================================*/
+
+
+#include "sysdep.h"
+
+#include <stdlib.h>
+#include <stdint.h>
+#include <string.h>
+
+#include "part.h"
+#include "bus.h"
+#include "chain.h"
+#include "bssignal.h"
+#include "jtag.h"
+#include "buses.h"
+#include "generic_bus.h"
+#include "state.h"
+
+
+#ifndef DEBUG_LVL2
+#define DEBUG_LVL2(x)
+#endif
+
+/** @brief Bus driver for Samsung S3C4510X */
+typedef struct {
+ signal_t *a[22]; /**< Only 22-bits addressing */
+ signal_t *d[32]; /**< Data bus */
+ signal_t *nrcs[6]; /**< not ROM/SRAM/Flash Chip Select;
+ ** Only using nRCS0. */
+ signal_t *necs[4];
+ signal_t *nsdcs[4];
+
+ signal_t *nwbe[4]; /**< not Write Byte Enable */
+ signal_t *noe; /**< not Output Enable */
+ int dbuswidth;
+} bus_params_t;
+
+#define A ((bus_params_t *) bus->params)->a
+#define D ((bus_params_t *) bus->params)->d
+#define nRCS ((bus_params_t *) bus->params)->nrcs
+#define nECS ((bus_params_t *) bus->params)->necs
+#define nSDCS ((bus_params_t *) bus->params)->nsdcs
+#define nWBE ((bus_params_t *) bus->params)->nwbe
+#define nOE ((bus_params_t *) bus->params)->noe
+
+#define dbus_width ((bus_params_t *) bus->params)->dbuswidth
+/** @brief Width of Data Bus. Detected by B0SIZE[1:0] */
+
+/**
+ * bus->driver->(*new_bus)
+ *
+ */
+static bus_t *
+s3c4510_bus_new( chain_t *chain, const bus_driver_t *driver, char *cmd_params[] )
+{
+ bus_t *bus;
+ part_t *part;
+ char buff[10];
+ int i;
+ int failed = 0;
+
+ bus = calloc( 1, sizeof (bus_t) );
+ if (!bus)
+ return NULL;
+
+ bus->driver = driver;
+ bus->params = calloc( 1, sizeof (bus_params_t) );
+ if (!bus->params) {
+ free( bus );
+ return NULL;
+ }
+
+
+ dbus_width = 16;
+ CHAIN = chain;
+ PART = part = chain->parts->parts[chain->active_part];
+
+ for (i = 0; i < 22; i++) {
+ sprintf( buff, "ADDR%d", i );
+ failed |= generic_bus_attach_sig( part, &(A[i]), buff );
+ }
+
+ for (i = 0; i < 32; i++) {
+ sprintf( buff, "XDATA%d", i );
+ failed |= generic_bus_attach_sig( part, &(D[i]), buff );
+ }
+
+ for (i = 0; i < 6; i++) {
+ sprintf( buff, "nRCS%d", i );
+ failed |= generic_bus_attach_sig( part, &(nRCS[i]), buff );
+ }
+
+ for (i = 0; i < 4; i++) {
+ sprintf( buff, "nECS%d", i );
+ failed |= generic_bus_attach_sig( part, &(nECS[i]), buff );
+ }
+
+ for (i = 0; i < 4; i++) {
+ sprintf( buff, "nRAS%d", i ); /* those are nSDCS for SDRAMs only */
+ failed |= generic_bus_attach_sig( part, &(nSDCS[i]), buff );
+ }
+
+ for (i = 0; i < 4; i++) {
+ sprintf( buff, "nWBE%d", i );
+ failed |= generic_bus_attach_sig( part, &(nWBE[i]), buff );
+ }
+
+ failed |= generic_bus_attach_sig( part, &(nOE), "nOE" );
+
+ if (failed) {
+ free( bus->params );
+ free( bus );
+ return NULL;
+ }
+
+ return bus;
+}
+
+/**
+ * bus->driver->(*printinfo)
+ *
+ */
+static void
+s3c4510_bus_printinfo( bus_t *bus )
+{
+ int i;
+
+ for (i = 0; i < CHAIN->parts->len; i++)
+ if (PART == CHAIN->parts->parts[i])
+ break;
+ printf( _("Samsung S3C4510B compatibile bus driver via BSR (JTAG part No. %d) RCS0=%ubit\n"), i ,dbus_width );
+}
+
+/**
+ * bus->driver->(*init)
+ *
+ */
+static int
+s3c4510_bus_init( bus_t *bus )
+{
+ part_t *p = PART;
+ chain_t *chain = CHAIN;
+
+ if (tap_state(chain) != Run_Test_Idle) {
+ /* silently skip initialization if TAP isn't in RUNTEST/IDLE state
+ this is required to avoid interfering with detect when initbus
+ is contained in the part description file
+ bus_init() will be called latest by bus_prepare() */
+ return URJTAG_STATUS_OK;
+ }
+
+ part_set_instruction( p, "SAMPLE/PRELOAD" );
+ chain_shift_instructions( chain );
+ chain_shift_data_registers( chain, 0 );
+
+ INITIALIZED = 1;
+
+ return URJTAG_STATUS_OK;
+}
+
+/**
+ * bus->driver->(*area)
+ *
+ */
+static int
+s3c4510_bus_area( bus_t *bus, uint32_t adr, bus_area_t *area )
+{
+ int b0size0, b0size1; // , endian;
+
+ area->description = NULL;
+ area->start = UINT32_C(0x00000000);
+ area->length = UINT64_C(0x100000000);
+
+ // endian = part_get_signal( PART, part_find_signal( PART, "LITTLE" ));
+ b0size0 = part_get_signal( PART, part_find_signal( PART, "B0SIZE0" ));
+ b0size1 = part_get_signal( PART, part_find_signal( PART, "B0SIZE1" ));
+
+ switch ((b0size1 << 1) | b0size0) {
+ case 1:
+ area->width = dbus_width = 8;
+ return URJTAG_STATUS_OK;
+ case 2:
+ area->width = dbus_width = 16;
+ return URJTAG_STATUS_OK;
+ case 3:
+ area->width = dbus_width = 32;
+ return URJTAG_STATUS_OK;
+ default:
+ printf( "B0SIZE[1:0]: Unknown\n" );
+ area->width = 0;
+ return URJTAG_STATUS_FAIL;
+ }
+}
+
+static void s3c4510_bus_setup_ctrl( bus_t *bus, int mode )
+{
+ int k;
+ part_t *p = PART;
+
+ for (k = 0; k < 6; k++)
+ part_set_signal( p, nRCS[k], 1, (mode & (1 << k)) ? 1 : 0 );
+
+ for (k = 0; k < 4; k++)
+ part_set_signal( p, nECS[k], 1, 1 );
+
+ for (k = 0; k < 4; k++)
+ part_set_signal( p, nSDCS[k], 1, 1 );
+
+ for (k = 0; k < 4; k++)
+ part_set_signal( p, nWBE[k], 1, (mode & (1 << (k + 8))) ? 1 : 0 );
+
+ part_set_signal( p, nOE, 1, (mode & (1 << 16)) ? 1 : 0 );
+}
+
+static void
+setup_address( bus_t *bus, uint32_t a )
+{
+ int i,so;
+ part_t *p = PART;
+
+ switch(dbus_width)
+ {
+ case 32: so=2; break;
+ case 16: so=1; break;
+ default: so=0; break;
+ }
+
+ for (i = 0; i < 22; i++)
+ part_set_signal( p, A[i], 1, (a >> (i+so)) & 1 );
+}
+
+static void
+set_data_in( bus_t *bus )
+{
+ int i;
+ part_t *p = PART;
+
+ for (i = 0; i < dbus_width; i++)
+ part_set_signal( p, D[i], 0, 0 );
+}
+
+static void
+setup_data( bus_t *bus, uint32_t d )
+{
+ int i;
+ part_t *p = PART;
+
+ for (i = 0; i < dbus_width; i++)
+ part_set_signal( p, D[i], 1, (d >> i) & 1 );
+ /* Set other bits as 0 */
+ for (i = dbus_width; i < 32; i++)
+ part_set_signal( p, D[i], 1, 0 );
+}
+
+/**
+ * bus->driver->(*read_start)
+ *
+ */
+static void
+s3c4510_bus_read_start( bus_t *bus, uint32_t adr )
+{
+ /* see Figure 4-19 in [1] */
+ chain_t *chain = CHAIN;
+
+ s3c4510_bus_setup_ctrl( bus, 0x00fffe); /* nOE=0, nRCS0 =0 */
+ setup_address( bus, adr );
+ set_data_in( bus );
+ chain_shift_data_registers( chain, 0 );
+}
+
+/**
+ * bus->driver->(*read_next)
+ *
+ */
+static uint32_t
+s3c4510_bus_read_next( bus_t *bus, uint32_t adr )
+{
+ /* see Figure 4-20 in [1] */
+ part_t *p = PART;
+ chain_t *chain = CHAIN;
+ int i;
+ uint32_t d = 0;
+
+ s3c4510_bus_setup_ctrl( bus, 0x00fffe); /* nOE=0, nRCS0 =0 */
+ setup_address( bus, adr );
+ set_data_in( bus );
+ chain_shift_data_registers( chain, 1 );
+
+ for (i = 0; i < dbus_width; i++)
+ d |= (uint32_t) (part_get_signal( p, D[i] ) << i);
+
+ return d;
+}
+
+/**
+ * bus->driver->(*read_end)
+ *
+ */
+static uint32_t
+s3c4510_bus_read_end( bus_t *bus )
+{
+ /* see Figure 4-19 in [1] */
+ part_t *p = PART;
+ chain_t *chain = CHAIN;
+ int i;
+ uint32_t d = 0;
+
+ s3c4510_bus_setup_ctrl( bus, 0x01ffff); /* nOE=1, nRCS0 =1 */
+ chain_shift_data_registers( chain, 1 );
+
+ for (i = 0; i < dbus_width; i++)
+ d |= (uint32_t) (part_get_signal( p, D[i] ) << i);
+
+ return d;
+}
+
+/**
+ * bus->driver->(*write)
+ *
+ * @brief
+ * ROM/SRAM/FlashPage Write Access Timing
+ */
+static void
+s3c4510_bus_write( bus_t *bus, uint32_t adr, uint32_t data )
+{
+ /* see Figure 4-21 in [1] */
+ chain_t *chain = CHAIN;
+
+ s3c4510_bus_setup_ctrl( bus, 0x01fffe); /* nOE=1, nRCS0 =0 */
+ setup_address( bus, adr );
+ setup_data( bus, data );
+
+ chain_shift_data_registers( chain, 0 );
+
+ switch (dbus_width)
+ {
+ default:
+ case 8:
+ s3c4510_bus_setup_ctrl( bus, 0x01fefe); /* nOE=1, nRCS0 =0, nWBE0=0 */
+ break;
+ case 16:
+ s3c4510_bus_setup_ctrl( bus, 0x01fcfe); /* nOE=1, nRCS0 =0, nWBE0-1=0 */
+ break;
+
+ case 32:
+ s3c4510_bus_setup_ctrl( bus, 0x01f0fe); /* nOE=1, nRCS0 =0, nWBE0-3=0 */
+ break;
+ }
+
+ setup_address( bus, adr );
+ setup_data( bus, data );
+
+ chain_shift_data_registers( chain, 0 );
+
+ s3c4510_bus_setup_ctrl( bus, 0x01ffff); /* nOE=1, nRCS0 =1 */
+ chain_shift_data_registers( chain, 0 );
+
+ DEBUG_LVL2( printf("bus_write %08x @ %08x\n", data, adr); )
+}
+
+const bus_driver_t s3c4510_bus = {
+ "s3c4510x",
+ N_("Samsung S3C4510B compatible bus driver via BSR"),
+ s3c4510_bus_new,
+ generic_bus_free,
+ s3c4510_bus_printinfo,
+ generic_bus_prepare_extest,
+ s3c4510_bus_area,
+ s3c4510_bus_read_start,
+ s3c4510_bus_read_next,
+ s3c4510_bus_read_end,
+ generic_bus_read,
+ s3c4510_bus_write,
+ s3c4510_bus_init
+};
+
+
+
+/*=============================================================================
+**
+** CVS Log
+** $Log$
+** Revision 1.5 2003/09/10 12:38:01 telka
+** 2003-09-10 Marcel Telka <marcel@telka.sk>
+**
+** * src/bus/bcm1250.c (bcm1250_bus_printinfo, bcm1250_bus): Fixed typo (compatibile->compatible) in
+** output message (thanks to Andreas Mohr).
+** * src/bus/ixp425.c (ixp425_bus_printinfo, ixp425_bus): Ditto.
+** * src/bus/pxa2x0.c (pxa2x0_bus_printinfo, pxa2x0_bus): Ditto.
+** * src/bus/s3c4510x.c (s3c4510_bus_printinfo, s3c4510_bus): Ditto.
+** * src/bus/sa1110.c (sa1110_bus_printinfo, sa1110_bus): Ditto.
+** * src/bus/sh7727.c (sh7727_bus_printinfo, sh7727_bus): Ditto.
+** * src/bus/sh7750r.c (sh7750r_bus_printinfo, sh7750r_bus): Ditto.
+** * src/bus/sh7751r.c (sh7751r_bus_printinfo, sh7751r_bus): Ditto.
+**
+** Revision 1.4 2003/09/05 21:09:14 telka
+** 2003-09-05 Marcel Telka <marcel@telka.sk>
+**
+** * include/bus.h (bus_drivers): Added constant declaration.
+** (new_sa1110_bus, new_pxa250_bus, new_ixp425_bus, new_sh7727_bus, new_sh7750r_bus, new_sh7751r_bus)
+** (new_bcm1250_bus): Function declarations removed.
+** * src/bus/buses.c (bus_drivers): New constant definition.
+** * src/bus/buses.h: New file.
+** * src/bus/Makefile.am (libbus_a_SOURCES): Added buses.h.
+**
+** * src/bus/bcm1250.c (bcm1250_bus_printinfo): Added new function parameter 'bus'.
+** (bcm1250_bus): Changed structure type to bus_driver_t. Changed members.
+** (new_bcm1250_bus): Function renamed ...
+** (bcm1250_bus_new): ... to this one. Changed parameter list to void (and function body updated).
+** * src/bus/ixp425.c (ixp425_bus_printinfo): Added new function parameter 'bus'.
+** (ixp425_bus): Changed structure type to bus_driver_t. Changed members.
+** (new_ixp425_bus): Function renamed ...
+** (ixp425_bus_new): ... to this one. Changed parameter list to void (and function body updated).
+** * src/bus/pxa2x0.c (pxa2x0_bus_printinfo): Added new function parameter 'bus'.
+** (pxa250_bus): Structure transformed ...
+** (pxa2x0_bus): ... to this constant (changed type to bus_driver_t, changed members).
+** (new_pxa250_bus): Function renamed ...
+** (pxa2x0_bus_new): ... to this one. Changed parameter list to void (and function body updated).
+** * src/bus/s3c4510x.c (s3c4510_bus_printinfo): Added new function parameter 'bus'.
+** (s3c4510_bus): Changed structure type to bus_driver_t. Changed members.
+** (new_s3c4510_bus): Function renamed ...
+** (s3c4510_bus_new): ... to this one. Changed parameter list to void (and function body updated).
+** * src/bus/sa1110.c (sa1110_bus_printinfo): Added new function parameter 'bus'.
+** (sa1110_bus): Changed structure type to bus_driver_t. Changed members.
+** (new_sa1110_bus): Function renamed ...
+** (sa1110_bus_new): ... to this one. Changed parameter list to void (and function body updated).
+** * src/bus/sh7727.c (sh7727_bus_printinfo): Added new function parameter 'bus'.
+** (sh7727_bus): Changed structure type to bus_driver_t. Changed members.
+** (new_sh7727_bus): Function renamed ...
+** (sh7727_bus_new): ... to this one. Changed parameter list to void (and function body updated).
+** * src/bus/sh7750r.c (sh7750r_bus_printinfo): Added new function parameter 'bus'.
+** (sh7750r_bus): Changed structure type to bus_driver_t. Changed members.
+** (new_sh7750r_bus): Function renamed ...
+** (sh7750r_bus_new): ... to this one. Changed parameter list to void (and function body updated).
+** * src/bus/sh7751r.c (sh7751r_bus_printinfo): Added new function parameter 'bus'.
+** (sh7751r_bus): Changed structure type to bus_driver_t. Changed members.
+** (new_sh7751r_bus): Function renamed ...
+** (sh7751r_bus_new): ... to this one. Changed parameter list to void (and function body updated).
+**
+** * src/cmd/cable.c (cmd_cable_run): Replaced bus->free() call with bus_free().
+** * src/jtag.c (main): Ditto.
+**
+** * src/cmd/cmd.c (cmds): Added cmd_initbus.
+** * src/cmd/detect.c (cmd_detect_run): Removed explicit bus driver detection.
+** * src/cmd/initbus.c: New file.
+** * src/cmd/Makefile.am (libcmd_a_SOURCES): Added initbus.c.
+**
+** * data/broadcom/bcm1250/bcm1250: Added 'initbus' command call.
+** * data/hitachi/sh7727/sh7727: Ditto.
+** * data/intel/ixp425/ixp425: Ditto.
+** * data/intel/pxa250/pxa250: Ditto.
+** * data/intel/pxa250/pxa250c0: Ditto.
+** * data/intel/sa1110/sa1110: Ditto.
+** * data/samsung/s3c4510b/s3c4510b: Ditto.
+**
+** Revision 1.3 2003/08/28 07:26:02 telka
+** 2003-08-28 Marcel Telka <marcel@telka.sk>
+**
+** * src/readmem.c (readmem): Replaced bus_width macro with new bus_area.
+** * src/bus/bcm1250.c (bcm1250_bus_width): Function removed.
+** (bcm1250_bus_area): New function.
+** * src/bus/ixp425.c (ixp425_bus_width): Function removed.
+** (ixp425_bus_area): New function.
+** * src/bus/pxa2x0.c (pxa250_bus_width): Function removed.
+** (pxa2x0_bus_area): New function.
+** * src/bus/s3c4510x.c (s3c4510_bus_width): Function removed.
+** (s3c4510_bus_area): New function.
+** * src/bus/sa1110.c (sa1110_bus_width: Function removed.
+** (sa1110_bus_area): New function.
+** * src/bus/sh7727.c (sh7727_bus_width): Function removed.
+** (sh7727_bus_area): New function.
+** * src/bus/sh7750r.c (sh7750r_bus_width): Function removed.
+** (sh7750r_bus_area): New function.
+** * src/bus/sh7751r.c (sh7751r_bus_width): Function removed.
+** (sh7751r_bus_area): New function.
+** * src/cmd/print.c (cmd_print_run): Added bus area printing.
+**
+** Revision 1.2 2003/08/19 09:59:26 telka
+** 2003-08-19 Marcel Telka <marcel@telka.sk>
+**
+** * src/bus/s3c4510x.c: Changed comment.
+**
+** Revision 1.1 2003/08/19 09:53:25 telka
+** 2003-08-19 Marcel Telka <marcel@telka.sk>
+**
+** * src/bus/Makefile.am (libbus_a_SOURCES): Added s3c4510x.c.
+** * src/bus/s3c4510x.c: New file (Jiun-Shian Ho).
+**
+*/
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2002, 2003 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2002, 2003.
+ *
+ * Documentation:
+ * [1] Intel Corporation, "Intel StrongARM SA-1110 Microprocessor
+ * Developer's Manual", October 2001, Order Number: 278240-004
+ *
+ */
+
+#include "sysdep.h"
+
+#include <stdlib.h>
+#include <stdint.h>
+#include <string.h>
+
+#include "part.h"
+#include "bus.h"
+#include "chain.h"
+#include "bssignal.h"
+#include "jtag.h"
+#include "buses.h"
+#include "generic_bus.h"
+
+typedef struct {
+ signal_t *a[26];
+ signal_t *d[32];
+ signal_t *ncs[6];
+ signal_t *rd_nwr;
+ signal_t *nwe;
+ signal_t *noe;
+} bus_params_t;
+
+#define A ((bus_params_t *) bus->params)->a
+#define D ((bus_params_t *) bus->params)->d
+#define nCS ((bus_params_t *) bus->params)->ncs
+#define RD_nWR ((bus_params_t *) bus->params)->rd_nwr
+#define nWE ((bus_params_t *) bus->params)->nwe
+#define nOE ((bus_params_t *) bus->params)->noe
+
+/**
+ * bus->driver->(*new_bus)
+ *
+ */
+static bus_t *
+sa1110_bus_new( chain_t *chain, const bus_driver_t *driver, char *cmd_params[] )
+{
+ bus_t *bus;
+ part_t *part;
+ char buff[10];
+ int i;
+ int failed = 0;
+
+ bus = calloc( 1, sizeof (bus_t) );
+ if (!bus)
+ return NULL;
+
+ bus->driver = driver;
+ bus->params = calloc( 1, sizeof (bus_params_t) );
+ if (!bus->params) {
+ free( bus );
+ return NULL;
+ }
+
+ CHAIN = chain;
+ PART = part = chain->parts->parts[chain->active_part];
+
+ for (i = 0; i < 26; i++) {
+ sprintf( buff, "A%d", i );
+ failed |= generic_bus_attach_sig( part, &(A[i]), buff );
+ }
+
+ for (i = 0; i < 32; i++) {
+ sprintf( buff, "D%d", i );
+ failed |= generic_bus_attach_sig( part, &(D[i]), buff );
+ }
+
+ for (i = 0; i < 6; i++) {
+ sprintf( buff, "nCS%d", i );
+ failed |= generic_bus_attach_sig( part, &(nCS[i]), buff );
+ }
+
+ failed |= generic_bus_attach_sig( part, &(RD_nWR), "RD_nWR" );
+
+ failed |= generic_bus_attach_sig( part, &(nWE), "nWE" );
+
+ failed |= generic_bus_attach_sig( part, &(nOE), "nOE" );
+
+ if (failed) {
+ free( bus->params );
+ free( bus );
+ return NULL;
+ }
+
+ return bus;
+}
+
+/**
+ * bus->driver->(*printinfo)
+ *
+ */
+static void
+sa1110_bus_printinfo( bus_t *bus )
+{
+ int i;
+
+ for (i = 0; i < CHAIN->parts->len; i++)
+ if (PART == CHAIN->parts->parts[i])
+ break;
+ printf( _("Intel SA-1110 compatible bus driver via BSR (JTAG part No. %d)\n"), i );
+}
+
+/**
+ * bus->driver->(*area)
+ *
+ */
+static int
+sa1110_bus_area( bus_t *bus, uint32_t adr, bus_area_t *area )
+{
+ area->description = NULL;
+ area->start = UINT32_C(0x00000000);
+ area->length = UINT64_C(0x100000000);
+ area->width = part_get_signal( PART, part_find_signal( PART, "ROM_SEL" ) ) ? 32 : 16;
+
+ return URJTAG_STATUS_OK;
+}
+
+static void
+setup_address( bus_t *bus, uint32_t a )
+{
+ int i;
+ part_t *p = PART;
+
+ for (i = 0; i < 26; i++)
+ part_set_signal( p, A[i], 1, (a >> i) & 1 );
+}
+
+static void
+set_data_in( bus_t *bus )
+{
+ int i;
+ part_t *p = PART;
+ bus_area_t area;
+
+ sa1110_bus_area( bus, 0, &area );
+
+ for (i = 0; i < area.width; i++)
+ part_set_signal( p, D[i], 0, 0 );
+}
+
+static void
+setup_data( bus_t *bus, uint32_t d )
+{
+ int i;
+ part_t *p = PART;
+ bus_area_t area;
+
+ sa1110_bus_area( bus, 0, &area );
+
+ for (i = 0; i < area.width; i++)
+ part_set_signal( p, D[i], 1, (d >> i) & 1 );
+}
+
+/**
+ * bus->driver->(*read_start)
+ *
+ */
+static void
+sa1110_bus_read_start( bus_t *bus, uint32_t adr )
+{
+ /* see Figure 10-12 in [1] */
+ part_t *p = PART;
+ chain_t *chain = CHAIN;
+
+ part_set_signal( p, nCS[0], 1, (adr >> 27) != 0 );
+ part_set_signal( p, nCS[1], 1, (adr >> 27) != 1 );
+ part_set_signal( p, nCS[2], 1, (adr >> 27) != 2 );
+ part_set_signal( p, nCS[3], 1, (adr >> 27) != 3 );
+ part_set_signal( p, nCS[4], 1, (adr >> 27) != 8 );
+ part_set_signal( p, nCS[5], 1, (adr >> 27) != 9 );
+ part_set_signal( p, RD_nWR, 1, 1 );
+ part_set_signal( p, nWE, 1, 1 );
+ part_set_signal( p, nOE, 1, 0 );
+
+ setup_address( bus, adr );
+ set_data_in( bus );
+
+ chain_shift_data_registers( chain, 0 );
+}
+
+/**
+ * bus->driver->(*read_next)
+ *
+ */
+static uint32_t
+sa1110_bus_read_next( bus_t *bus, uint32_t adr )
+{
+ /* see Figure 10-12 in [1] */
+ part_t *p = PART;
+ chain_t *chain = CHAIN;
+ int i;
+ uint32_t d = 0;
+ bus_area_t area;
+
+ sa1110_bus_area( bus, adr, &area );
+
+ setup_address( bus, adr );
+ chain_shift_data_registers( chain, 1 );
+
+ for (i = 0; i < area.width; i++)
+ d |= (uint32_t) (part_get_signal( p, D[i] ) << i);
+
+ return d;
+}
+
+/**
+ * bus->driver->(*read_end)
+ *
+ */
+static uint32_t
+sa1110_bus_read_end( bus_t *bus )
+{
+ /* see Figure 10-12 in [1] */
+ part_t *p = PART;
+ chain_t *chain = CHAIN;
+ int i;
+ uint32_t d = 0;
+ bus_area_t area;
+
+ sa1110_bus_area( bus, 0, &area );
+
+ part_set_signal( p, nCS[0], 1, 1 );
+ part_set_signal( p, nCS[1], 1, 1 );
+ part_set_signal( p, nCS[2], 1, 1 );
+ part_set_signal( p, nCS[3], 1, 1 );
+ part_set_signal( p, nCS[4], 1, 1 );
+ part_set_signal( p, nCS[5], 1, 1 );
+ part_set_signal( p, nOE, 1, 1 );
+ chain_shift_data_registers( chain, 1 );
+
+ for (i = 0; i < area.width; i++)
+ d |= (uint32_t) (part_get_signal( p, D[i] ) << i);
+
+ return d;
+}
+
+/**
+ * bus->driver->(*write)
+ *
+ */
+static void
+sa1110_bus_write( bus_t *bus, uint32_t adr, uint32_t data )
+{
+ /* see Figure 10-16 in [1] */
+ part_t *p = PART;
+ chain_t *chain = CHAIN;
+
+ part_set_signal( p, nCS[0], 1, (adr >> 27) != 0 );
+ part_set_signal( p, nCS[1], 1, (adr >> 27) != 1 );
+ part_set_signal( p, nCS[2], 1, (adr >> 27) != 2 );
+ part_set_signal( p, nCS[3], 1, (adr >> 27) != 3 );
+ part_set_signal( p, nCS[4], 1, (adr >> 27) != 8 );
+ part_set_signal( p, nCS[5], 1, (adr >> 27) != 9 );
+ part_set_signal( p, RD_nWR, 1, 0 );
+ part_set_signal( p, nWE, 1, 1 );
+ part_set_signal( p, nOE, 1, 1 );
+
+ setup_address( bus, adr );
+ setup_data( bus, data );
+
+ chain_shift_data_registers( chain, 0 );
+
+ part_set_signal( p, nWE, 1, 0 );
+ chain_shift_data_registers( chain, 0 );
+ part_set_signal( p, nWE, 1, 1 );
+ part_set_signal( p, nCS[0], 1, 1 );
+ part_set_signal( p, nCS[1], 1, 1 );
+ part_set_signal( p, nCS[2], 1, 1 );
+ part_set_signal( p, nCS[3], 1, 1 );
+ part_set_signal( p, nCS[4], 1, 1 );
+ part_set_signal( p, nCS[5], 1, 1 );
+ chain_shift_data_registers( chain, 0 );
+}
+
+const bus_driver_t sa1110_bus = {
+ "sa1110",
+ N_("Intel SA-1110 compatible bus driver via BSR"),
+ sa1110_bus_new,
+ generic_bus_free,
+ sa1110_bus_printinfo,
+ generic_bus_prepare_extest,
+ sa1110_bus_area,
+ sa1110_bus_read_start,
+ sa1110_bus_read_next,
+ sa1110_bus_read_end,
+ generic_bus_read,
+ sa1110_bus_write,
+ generic_bus_no_init
+};
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2003 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Matan Ziv-Av <matan@svgalib.org>, 2003.
+ * Modified by Marcel Telka <marcel@telka.sk>, 2003.
+ *
+ */
+
+#include "sysdep.h"
+
+#include <stdint.h>
+#include <stdlib.h>
+#include <string.h>
+
+#include "part.h"
+#include "bus.h"
+#include "chain.h"
+#include "bssignal.h"
+#include "jtag.h"
+#include "buses.h"
+#include "generic_bus.h"
+
+typedef struct {
+ signal_t *a[26];
+ signal_t *d[32];
+ signal_t *cs[7];
+ signal_t *we[4];
+ signal_t *rdwr;
+ signal_t *rd;
+ signal_t *md3;
+ signal_t *md4;
+} bus_params_t;
+
+#define A ((bus_params_t *) bus->params)->a
+#define D ((bus_params_t *) bus->params)->d
+#define CS ((bus_params_t *) bus->params)->cs
+#define WE ((bus_params_t *) bus->params)->we
+#define RDWR ((bus_params_t *) bus->params)->rdwr
+#define RD ((bus_params_t *) bus->params)->rd
+#define MD3 ((bus_params_t *) bus->params)->md3
+#define MD4 ((bus_params_t *) bus->params)->md4
+
+/**
+ * bus->driver->(*new_bus)
+ *
+ */
+static bus_t *
+sh7727_bus_new( chain_t *chain, const bus_driver_t *driver, char *cmd_params[] )
+{
+ bus_t *bus;
+ part_t *part;
+ char buff[10];
+ int i;
+ int failed = 0;
+
+ bus = calloc( 1, sizeof (bus_t) );
+ if (!bus)
+ return NULL;
+
+ bus->driver = driver;
+ bus->params = calloc( 1, sizeof (bus_params_t) );
+ if (!bus->params) {
+ free( bus );
+ return NULL;
+ }
+
+ CHAIN = chain;
+ PART = part = chain->parts->parts[chain->active_part];
+
+ for (i = 0; i < 26; i++) {
+ sprintf( buff, "A%d", i );
+ failed |= generic_bus_attach_sig( part, &(A[i]), buff );
+ }
+
+ for (i = 0; i < 32; i++) {
+ sprintf( buff, "D%d", i );
+ failed |= generic_bus_attach_sig( part, &(D[i]), buff );
+ }
+
+ for (i = 0; i < 7; i++) {
+ if (i == 1)
+ continue;
+ sprintf( buff, "CS%d", i );
+ failed |= generic_bus_attach_sig( part, &(CS[i]), buff );
+ }
+
+ for (i = 0; i < 4; i++) {
+ sprintf( buff, "WE%d", i );
+ failed |= generic_bus_attach_sig( part, &(WE[i]), buff );
+ }
+
+ failed |= generic_bus_attach_sig( part, &(RDWR), "RDWR" );
+
+ failed |= generic_bus_attach_sig( part, &(RD), "RD" );
+
+ failed |= generic_bus_attach_sig( part, &(MD3), "MD3" );
+
+ failed |= generic_bus_attach_sig( part, &(MD4), "MD4" );
+
+ if (failed) {
+ free( bus->params );
+ free( bus );
+ return NULL;
+ }
+
+ return bus;
+}
+
+/**
+ * bus->driver->(*printinfo)
+ *
+ */
+static void
+sh7727_bus_printinfo( bus_t *bus )
+{
+ int i;
+
+ for (i = 0; i < CHAIN->parts->len; i++)
+ if (PART == CHAIN->parts->parts[i])
+ break;
+ printf( _("Hitachi SH7727 compatible bus driver via BSR (JTAG part No. %d)\n"), i );
+}
+
+/**
+ * bus->driver->(*area)
+ *
+ */
+static int
+sh7727_bus_area( bus_t *bus, uint32_t adr, bus_area_t *area )
+{
+ part_t *p = PART;
+
+ area->description = NULL;
+ area->start = UINT32_C(0x00000000);
+ area->length = UINT64_C(0x100000000);
+
+ switch (part_get_signal( p, MD4 ) << 1 | part_get_signal( p, MD3 )) {
+ case 1:
+ area->width = 8;
+ return URJTAG_STATUS_OK;
+ case 2:
+ area->width = 16;
+ return URJTAG_STATUS_OK;
+ case 3:
+ area->width = 32;
+ return URJTAG_STATUS_OK;
+ default:
+ printf( _("Error: Invalid bus width (MD3 = MD4 = 0)!\n") );
+ area->width = 0;
+ return URJTAG_STATUS_FAIL;
+ }
+}
+
+static void
+setup_address( bus_t *bus, uint32_t a )
+{
+ int i;
+ part_t *p = PART;
+
+ for (i = 0; i < 26; i++)
+ part_set_signal( p, A[i], 1, (a >> i) & 1 );
+}
+
+static void
+set_data_in( bus_t *bus )
+{
+ int i;
+ part_t *p = PART;
+ bus_area_t area;
+
+ sh7727_bus_area( bus, 0, &area );
+
+ for (i = 0; i < area.width; i++)
+ part_set_signal( p, D[i], 0, 0 );
+}
+
+static void
+setup_data( bus_t *bus, uint32_t d )
+{
+ int i;
+ part_t *p = PART;
+ bus_area_t area;
+
+ sh7727_bus_area( bus, 0, &area );
+
+ for (i = 0; i < area.width; i++)
+ part_set_signal( p, D[i], 1, (d >> i) & 1 );
+}
+
+/**
+ * bus->driver->(*read_start)
+ *
+ */
+static void
+sh7727_bus_read_start( bus_t *bus, uint32_t adr )
+{
+ part_t *p = PART;
+ int cs[8];
+ int i;
+
+ for (i = 0; i < 8; i++)
+ cs[i] = 1;
+ cs[(adr & 0x1C000000) >> 26] = 0;
+
+ part_set_signal( p, CS[0], 1, cs[0] );
+ part_set_signal( p, CS[2], 1, cs[2] );
+ part_set_signal( p, CS[3], 1, cs[3] );
+ part_set_signal( p, CS[4], 1, cs[4] );
+ part_set_signal( p, CS[5], 1, cs[5] );
+ part_set_signal( p, CS[6], 1, cs[6] );
+ part_set_signal( p, RDWR, 1, 1 );
+ part_set_signal( p, WE[0], 1, 1 );
+ part_set_signal( p, WE[1], 1, 1 );
+ part_set_signal( p, WE[2], 1, 1 );
+ part_set_signal( p, WE[3], 1, 1 );
+ part_set_signal( p, RD, 1, 0 );
+
+ setup_address( bus, adr );
+ set_data_in( bus );
+
+ chain_shift_data_registers( CHAIN, 0 );
+}
+
+/**
+ * bus->driver->(*read_next)
+ *
+ */
+static uint32_t
+sh7727_bus_read_next( bus_t *bus, uint32_t adr )
+{
+ part_t *p = PART;
+ int i;
+ uint32_t d = 0;
+ bus_area_t area;
+
+ sh7727_bus_area( bus, 0, &area );
+
+ setup_address( bus, adr );
+ chain_shift_data_registers( CHAIN, 1 );
+
+ for (i = 0; i < area.width; i++)
+ d |= (uint32_t) (part_get_signal( p, D[i] ) << i);
+
+ return d;
+}
+
+/**
+ * bus->driver->(*read_end)
+ *
+ */
+static uint32_t
+sh7727_bus_read_end( bus_t *bus )
+{
+ part_t *p = PART;
+ int i;
+ uint32_t d = 0;
+ bus_area_t area;
+
+ sh7727_bus_area( bus, 0, &area );
+
+ part_set_signal( p, CS[0], 1, 1 );
+ part_set_signal( p, CS[2], 1, 1 );
+ part_set_signal( p, CS[3], 1, 1 );
+ part_set_signal( p, CS[4], 1, 1 );
+ part_set_signal( p, CS[5], 1, 1 );
+ part_set_signal( p, CS[6], 1, 1 );
+
+ part_set_signal( p, RD, 1, 1 );
+ chain_shift_data_registers( CHAIN, 1 );
+
+ for (i = 0; i < area.width; i++)
+ d |= (uint32_t) (part_get_signal( p, D[i] ) << i);
+
+ return d;
+}
+
+/**
+ * bus->driver->(*write)
+ *
+ */
+static void
+sh7727_bus_write( bus_t *bus, uint32_t adr, uint32_t data )
+{
+ chain_t *chain = CHAIN;
+ part_t *p = PART;
+ int cs[8];
+ int i;
+
+ for (i = 0; i < 8 ; i++)
+ cs[i] = 1;
+ cs[(adr & 0x1C000000) >> 26] = 0;
+
+ part_set_signal( p, CS[0], 1, cs[0] );
+ part_set_signal( p, CS[2], 1, cs[2] );
+ part_set_signal( p, CS[3], 1, cs[3] );
+ part_set_signal( p, CS[4], 1, cs[4] );
+ part_set_signal( p, CS[5], 1, cs[5] );
+ part_set_signal( p, CS[6], 1, cs[6] );
+
+ part_set_signal( p, RDWR, 1, 0 );
+ part_set_signal( p, WE[0], 1, 1 );
+ part_set_signal( p, WE[1], 1, 1 );
+ part_set_signal( p, WE[2], 1, 1 );
+ part_set_signal( p, WE[3], 1, 1 );
+ part_set_signal( p, RD, 1, 1 );
+
+ setup_address( bus, adr );
+ setup_data( bus, data );
+
+ chain_shift_data_registers( chain, 0 );
+
+ part_set_signal( p, WE[0], 1, 0 );
+ part_set_signal( p, WE[1], 1, 0 );
+ part_set_signal( p, WE[2], 1, 0 );
+ part_set_signal( p, WE[3], 1, 0 );
+
+ chain_shift_data_registers( chain, 0 );
+
+ part_set_signal( p, WE[0], 1, 1 );
+ part_set_signal( p, WE[1], 1, 1 );
+ part_set_signal( p, WE[2], 1, 1 );
+ part_set_signal( p, WE[3], 1, 1 );
+
+ chain_shift_data_registers( chain, 0 );
+}
+
+const bus_driver_t sh7727_bus = {
+ "sh7727",
+ N_("Hitachi SH7727 compatible bus driver via BSR"),
+ sh7727_bus_new,
+ generic_bus_free,
+ sh7727_bus_printinfo,
+ generic_bus_prepare_extest,
+ sh7727_bus_area,
+ sh7727_bus_read_start,
+ sh7727_bus_read_next,
+ sh7727_bus_read_end,
+ generic_bus_read,
+ sh7727_bus_write,
+ generic_bus_no_init
+};
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2003 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Matan Ziv-Av <matan@svgalib.org>, 2003.
+ * Modified by Marcel Telka <marcel@telka.sk>, 2003.
+ *
+ */
+
+#include "sysdep.h"
+
+#include <stdint.h>
+#include <stdlib.h>
+#include <string.h>
+
+#include "part.h"
+#include "bus.h"
+#include "chain.h"
+#include "bssignal.h"
+#include "jtag.h"
+#include "buses.h"
+#include "generic_bus.h"
+
+typedef struct {
+ signal_t *a[26];
+ signal_t *d[64];
+ signal_t *cs[7];
+ signal_t *we[4];
+ signal_t *rdwr;
+ signal_t *rd;
+ signal_t *rdwr2;
+ signal_t *rd2;
+} bus_params_t;
+
+#define A ((bus_params_t *) bus->params)->a
+#define D ((bus_params_t *) bus->params)->d
+#define CS ((bus_params_t *) bus->params)->cs
+#define WE ((bus_params_t *) bus->params)->we
+#define RDWR ((bus_params_t *) bus->params)->rdwr
+#define RD ((bus_params_t *) bus->params)->rd
+#define RDWR2 ((bus_params_t *) bus->params)->rdwr2
+#define RD2 ((bus_params_t *) bus->params)->rd2
+
+/**
+ * bus->driver->(*new_bus)
+ *
+ */
+static bus_t *
+sh7750r_bus_new( chain_t *chain, const bus_driver_t *driver, char *cmd_params[] )
+{
+ bus_t *bus;
+ part_t *part;
+ char buff[10];
+ int i;
+ int failed = 0;
+
+ bus = calloc( 1, sizeof (bus_t) );
+ if (!bus)
+ return NULL;
+
+ bus->driver = driver;
+ bus->params = calloc( 1, sizeof (bus_params_t) );
+ if (!bus->params) {
+ free( bus );
+ return NULL;
+ }
+
+ CHAIN = chain;
+ PART = part = chain->parts->parts[chain->active_part];
+
+ for (i = 0; i < 26; i++) {
+ sprintf( buff, "A%d", i );
+ failed |= generic_bus_attach_sig( part, &(A[i]), buff );
+ }
+
+ for (i = 0; i < 32; i++) {
+ sprintf( buff, "D%d", i );
+ failed |= generic_bus_attach_sig( part, &(D[i]), buff );
+ }
+
+ for (i = 0; i < 7; i++) {
+ sprintf( buff, "CS%d", i );
+ failed |= generic_bus_attach_sig( part, &(CS[i]), buff );
+ }
+
+ for (i = 0; i < 8; i++) {
+ sprintf( buff, "WE%d", i );
+ failed |= generic_bus_attach_sig( part, &(WE[i]), buff );
+ }
+
+ failed |= generic_bus_attach_sig( part, &(RDWR), "RDWR" );
+
+ failed |= generic_bus_attach_sig( part, &(RD), "RD" );
+
+ failed |= generic_bus_attach_sig( part, &(RDWR2), "RDWR2" );
+
+ failed |= generic_bus_attach_sig( part, &(RD2), "RD2" );
+
+ if (failed) {
+ free( bus->params );
+ free( bus );
+ return NULL;
+ }
+
+ return bus;
+}
+
+/**
+ * bus->driver->(*printinfo)
+ *
+ */
+static void
+sh7750r_bus_printinfo( bus_t *bus )
+{
+ int i;
+
+ for (i = 0; i < CHAIN->parts->len; i++)
+ if (PART == CHAIN->parts->parts[i])
+ break;
+ printf( _("Hitachi SH7750R compatible bus driver via BSR (JTAG part No. %d)\n"), i );
+}
+
+/**
+ * bus->driver->(*area)
+ *
+ */
+static int
+sh7750r_bus_area( bus_t *bus, uint32_t adr, bus_area_t *area )
+{
+ area->description = NULL;
+ area->start = UINT32_C(0x00000000);
+ area->length = UINT64_C(0x100000000);
+ area->width = 32;
+
+ return URJTAG_STATUS_OK;
+}
+
+static void
+setup_address( bus_t *bus, uint32_t a )
+{
+ int i;
+ part_t *p = PART;
+
+ for (i = 0; i < 26; i++)
+ part_set_signal( p, A[i], 1, (a >> i) & 1 );
+}
+
+static void
+set_data_in( bus_t *bus )
+{
+ int i;
+ part_t *p = PART;
+
+ for (i = 0; i < 32; i++)
+ part_set_signal( p, D[i], 0, 0 );
+}
+
+static void
+setup_data( bus_t *bus, uint32_t d )
+{
+ int i;
+ part_t *p = PART;
+
+ for (i = 0; i < 32; i++)
+ part_set_signal( p, D[i], 1, (d >> i) & 1 );
+}
+
+/**
+ * bus->driver->(*read_start)
+ *
+ */
+static void
+sh7750r_bus_read_start( bus_t *bus, uint32_t adr )
+{
+ part_t *p = PART;
+ int cs[8];
+ int i;
+
+ for (i = 0; i < 8; i++)
+ cs[i] = 1;
+ cs[(adr & 0x1C000000) >> 26] = 0;
+
+ part_set_signal( p, CS[0], 1, cs[0] );
+ part_set_signal( p, CS[1], 1, cs[1] );
+ part_set_signal( p, CS[2], 1, cs[2] );
+ part_set_signal( p, CS[3], 1, cs[3] );
+ part_set_signal( p, CS[4], 1, cs[4] );
+ part_set_signal( p, CS[5], 1, cs[5] );
+ part_set_signal( p, CS[6], 1, cs[6] );
+ part_set_signal( p, RDWR, 1, 1 );
+ part_set_signal( p, RDWR2, 1, 1 );
+ part_set_signal( p, WE[0], 1, 1 );
+ part_set_signal( p, WE[1], 1, 1 );
+ part_set_signal( p, WE[2], 1, 1 );
+ part_set_signal( p, WE[3], 1, 1 );
+ part_set_signal( p, RD, 1, 0 );
+ part_set_signal( p, RD2, 1, 0 );
+
+ setup_address( bus, adr );
+ set_data_in( bus );
+ chain_shift_data_registers( CHAIN, 0 );
+}
+
+/**
+ * bus->driver->(*read_next)
+ *
+ */
+static uint32_t
+sh7750r_bus_read_next( bus_t *bus, uint32_t adr )
+{
+ part_t *p = PART;
+ int i;
+ uint32_t d = 0;
+
+ setup_address( bus, adr );
+ chain_shift_data_registers( CHAIN, 1 );
+
+ for (i = 0; i < 32; i++)
+ d |= (uint32_t) (part_get_signal( p, D[i] ) << i);
+
+ return d;
+}
+
+/**
+ * bus->driver->(*read_end)
+ *
+ */
+static uint32_t
+sh7750r_bus_read_end( bus_t *bus )
+{
+ part_t *p = PART;
+ int cs[8];
+ int i;
+ uint32_t d = 0;
+
+ for (i = 0; i < 8; i++)
+ cs[i] = 1;
+
+ part_set_signal( p, CS[0], 1, cs[0] );
+ part_set_signal( p, CS[1], 1, cs[1] );
+ part_set_signal( p, CS[2], 1, cs[2] );
+ part_set_signal( p, CS[3], 1, cs[3] );
+ part_set_signal( p, CS[4], 1, cs[4] );
+ part_set_signal( p, CS[5], 1, cs[5] );
+ part_set_signal( p, CS[6], 1, cs[6] );
+
+ part_set_signal( p, RD, 1, 1 );
+ part_set_signal( p, RD2, 1, 1 );
+ chain_shift_data_registers( CHAIN, 1 );
+
+ for (i = 0; i < 32; i++)
+ d |= (uint32_t) (part_get_signal( p, D[i] ) << i);
+
+ return d;
+}
+
+/**
+ * bus->driver->(*write)
+ *
+ */
+static void
+sh7750r_bus_write( bus_t *bus, uint32_t adr, uint32_t data )
+{
+ chain_t *chain = CHAIN;
+ part_t *p = PART;
+ int cs[8];
+ int i;
+
+ for (i = 0; i < 8 ; i++)
+ cs[i] = 1;
+ cs[(adr & 0x1C000000) >> 26] = 0;
+
+ part_set_signal( p, CS[0], 1, cs[0] );
+ part_set_signal( p, CS[1], 1, cs[1] );
+ part_set_signal( p, CS[2], 1, cs[2] );
+ part_set_signal( p, CS[3], 1, cs[3] );
+ part_set_signal( p, CS[4], 1, cs[4] );
+ part_set_signal( p, CS[5], 1, cs[5] );
+ part_set_signal( p, CS[6], 1, cs[6] );
+
+ part_set_signal( p, RDWR, 1, 0 );
+ part_set_signal( p, RDWR2, 1, 0 );
+ part_set_signal( p, WE[0], 1, 1 );
+ part_set_signal( p, WE[1], 1, 1 );
+ part_set_signal( p, WE[2], 1, 1 );
+ part_set_signal( p, WE[3], 1, 1 );
+ part_set_signal( p, RD, 1, 1 );
+ part_set_signal( p, RD2, 1, 1 );
+
+ setup_address( bus, adr );
+ setup_data( bus, data );
+
+ chain_shift_data_registers( chain, 0 );
+
+ part_set_signal( p, WE[0], 1, 0 );
+ part_set_signal( p, WE[1], 1, 0 );
+ part_set_signal( p, WE[2], 1, 0 );
+ part_set_signal( p, WE[3], 1, 0 );
+
+ chain_shift_data_registers( chain, 0 );
+
+ part_set_signal( p, WE[0], 1, 1 );
+ part_set_signal( p, WE[1], 1, 1 );
+ part_set_signal( p, WE[2], 1, 1 );
+ part_set_signal( p, WE[3], 1, 1 );
+
+ chain_shift_data_registers( chain, 0 );
+}
+
+const bus_driver_t sh7750r_bus = {
+ "sh7750r",
+ N_("Hitachi SH7750R compatible bus driver via BSR"),
+ sh7750r_bus_new,
+ generic_bus_free,
+ sh7750r_bus_printinfo,
+ generic_bus_prepare_extest,
+ sh7750r_bus_area,
+ sh7750r_bus_read_start,
+ sh7750r_bus_read_next,
+ sh7750r_bus_read_end,
+ generic_bus_read,
+ sh7750r_bus_write,
+ generic_bus_no_init
+};
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2003 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Matan Ziv-Av <matan@svgalib.org>, 2003.
+ * Modified by Marcel Telka <marcel@telka.sk>, 2003.
+ *
+ */
+
+#include "sysdep.h"
+
+#include <stdint.h>
+#include <stdlib.h>
+#include <string.h>
+
+#include "part.h"
+#include "bus.h"
+#include "chain.h"
+#include "bssignal.h"
+#include "jtag.h"
+#include "buses.h"
+#include "generic_bus.h"
+
+typedef struct {
+ signal_t *a[26];
+ signal_t *d[32];
+ signal_t *cs[8];
+ signal_t *we[4];
+ signal_t *rdwr;
+ signal_t *rd;
+ signal_t *bs;
+} bus_params_t;
+
+#define A ((bus_params_t *) bus->params)->a
+#define D ((bus_params_t *) bus->params)->d
+#define CS ((bus_params_t *) bus->params)->cs
+#define WE ((bus_params_t *) bus->params)->we
+#define RDWR ((bus_params_t *) bus->params)->rdwr
+#define RD ((bus_params_t *) bus->params)->rd
+#define BS ((bus_params_t *) bus->params)->bs
+
+/**
+ * bus->driver->(*new_bus)
+ *
+ */
+static bus_t *
+sh7751r_bus_new( chain_t *chain, const bus_driver_t *driver, char *cmd_params[] )
+{
+ bus_t *bus;
+ part_t *part;
+ char buff[10];
+ int i;
+ int failed = 0;
+
+ bus = calloc( 1, sizeof (bus_t) );
+ if (!bus)
+ return NULL;
+
+ bus->driver = driver;
+ bus->params = calloc( 1, sizeof (bus_params_t) );
+ if (!bus->params) {
+ free( bus );
+ return NULL;
+ }
+
+ CHAIN = chain;
+ PART = part = chain->parts->parts[chain->active_part];
+
+ for (i = 0; i < 26; i++) {
+ sprintf( buff, "A%d", i );
+ failed |= generic_bus_attach_sig( part, &(A[i]), buff );
+ }
+
+ for (i = 0; i < 32; i++) {
+ sprintf( buff, "D%d", i );
+ failed |= generic_bus_attach_sig( part, &(D[i]), buff );
+ }
+
+ for (i = 0; i < 7; i++) {
+ sprintf( buff, "CS%d", i );
+ failed |= generic_bus_attach_sig( part, &(CS[i]), buff );
+ }
+
+ for (i = 0; i < 4; i++) {
+ sprintf( buff, "WE%d", i );
+ failed |= generic_bus_attach_sig( part, &(WE[i]), buff );
+ }
+
+ failed |= generic_bus_attach_sig( part, &(RDWR), "RD_WR" );
+
+ failed |= generic_bus_attach_sig( part, &(RD), "RD_CASS_FRAME" );
+
+ if (failed) {
+ free( bus->params );
+ free( bus );
+ return NULL;
+ }
+
+ return bus;
+}
+
+/**
+ * bus->driver->(*printinfo)
+ *
+ */
+static void
+sh7751r_bus_printinfo( bus_t *bus )
+{
+ int i;
+
+ for (i = 0; i < CHAIN->parts->len; i++)
+ if (PART == CHAIN->parts->parts[i])
+ break;
+ printf( _("Hitachi SH7751R compatible bus driver via BSR (JTAG part No. %d)\n"), i );
+}
+
+/**
+ * bus->driver->(*area)
+ *
+ */
+static int
+sh7751r_bus_area( bus_t *bus, uint32_t adr, bus_area_t *area )
+{
+ area->description = NULL;
+ area->start = UINT32_C(0x00000000);
+ area->length = UINT64_C(0x100000000);
+ area->width = 16;
+
+ return URJTAG_STATUS_OK;
+}
+
+static void
+setup_address( bus_t *bus, uint32_t a )
+{
+ int i;
+ part_t *p = PART;
+
+ for (i = 0; i < 26; i++)
+ part_set_signal( p, A[i], 1, (a >> i) & 1 );
+}
+
+static void
+set_data_in( bus_t *bus )
+{
+ int i;
+ part_t *p = PART;
+
+ for (i = 0; i < 32; i++)
+ part_set_signal( p, D[i], 0, 0 );
+}
+
+static void
+setup_data( bus_t *bus, uint32_t d )
+{
+ int i;
+ part_t *p = PART;
+
+ for (i = 0; i < 32; i++)
+ part_set_signal( p, D[i], 1, (d >> i) & 1 );
+}
+
+/**
+ * bus->driver->(*read_start)
+ *
+ */
+static void
+sh7751r_bus_read_start( bus_t *bus, uint32_t adr )
+{
+ part_t *p = PART;
+ int cs[8];
+ int i;
+
+ for (i = 0; i < 8; i++)
+ cs[i] = 1;
+ cs[(adr & 0x1C000000) >> 26] = 0;
+
+ part_set_signal( p, CS[0], 1, cs[0] );
+ part_set_signal( p, CS[1], 1, cs[1] );
+ part_set_signal( p, CS[2], 1, cs[2] );
+ part_set_signal( p, CS[3], 1, cs[3] );
+ part_set_signal( p, CS[4], 1, cs[4] );
+ part_set_signal( p, CS[5], 1, cs[5] );
+ part_set_signal( p, CS[6], 1, cs[6] );
+ part_set_signal( p, RDWR, 1, 1 );
+ part_set_signal( p, WE[0], 1, 1 );
+ part_set_signal( p, WE[1], 1, 1 );
+ part_set_signal( p, WE[2], 1, 1 );
+ part_set_signal( p, WE[3], 1, 1 );
+ part_set_signal( p, RD, 1, 0 );
+
+ setup_address( bus, adr );
+ set_data_in( bus );
+ chain_shift_data_registers( CHAIN, 0 );
+}
+
+/**
+ * bus->driver->(*read_next)
+ *
+ */
+static uint32_t
+sh7751r_bus_read_next( bus_t *bus, uint32_t adr )
+{
+ part_t *p = PART;
+ int i;
+ uint32_t d = 0;
+
+ setup_address( bus, adr );
+ chain_shift_data_registers( CHAIN, 1 );
+
+ for (i = 0; i < 32; i++)
+ d |= (uint32_t) (part_get_signal( p, D[i] ) << i);
+
+ return d;
+}
+
+/**
+ * bus->driver->(*read_end)
+ *
+ */
+static uint32_t
+sh7751r_bus_read_end( bus_t *bus )
+{
+ part_t *p = PART;
+ int cs[8];
+ int i;
+ uint32_t d = 0;
+
+ for (i = 0; i < 8; i++)
+ cs[i] = 1;
+
+ part_set_signal( p, CS[0], 1, cs[0] );
+ part_set_signal( p, CS[1], 1, cs[1] );
+ part_set_signal( p, CS[2], 1, cs[2] );
+ part_set_signal( p, CS[3], 1, cs[3] );
+ part_set_signal( p, CS[4], 1, cs[4] );
+ part_set_signal( p, CS[5], 1, cs[5] );
+ part_set_signal( p, CS[6], 1, cs[6] );
+
+ part_set_signal( p, RD, 1, 1 );
+ chain_shift_data_registers( CHAIN, 1 );
+
+ for (i = 0; i < 32; i++)
+ d |= (uint32_t) (part_get_signal( p, D[i] ) << i);
+
+ return d;
+}
+
+/**
+ * bus->driver->(*write)
+ *
+ */
+static void
+sh7751r_bus_write( bus_t *bus, uint32_t adr, uint32_t data )
+{
+ chain_t *chain = CHAIN;
+ part_t *p = PART;
+ int cs[8];
+ int i;
+
+ for (i = 0; i < 8 ; i++)
+ cs[i] = 1;
+ cs[(adr & 0x1C000000) >> 26] = 0;
+
+ part_set_signal( p, CS[0], 1, cs[0] );
+ part_set_signal( p, CS[1], 1, cs[1] );
+ part_set_signal( p, CS[2], 1, cs[2] );
+ part_set_signal( p, CS[3], 1, cs[3] );
+ part_set_signal( p, CS[4], 1, cs[4] );
+ part_set_signal( p, CS[5], 1, cs[5] );
+ part_set_signal( p, CS[6], 1, cs[6] );
+
+ part_set_signal( p, RDWR, 1, 0 );
+ part_set_signal( p, WE[0], 1, 1 );
+ part_set_signal( p, WE[1], 1, 1 );
+ part_set_signal( p, WE[2], 1, 1 );
+ part_set_signal( p, WE[3], 1, 1 );
+ part_set_signal( p, RD, 1, 1 );
+
+ setup_address( bus, adr );
+ setup_data( bus, data );
+ chain_shift_data_registers( chain, 0 );
+
+ part_set_signal( p, WE[0], 1, 0 );
+ part_set_signal( p, WE[1], 1, 0 );
+ part_set_signal( p, WE[2], 1, 0 );
+ part_set_signal( p, WE[3], 1, 0 );
+
+ chain_shift_data_registers( chain, 0 );
+
+ part_set_signal( p, WE[0], 1, 1 );
+ part_set_signal( p, WE[1], 1, 1 );
+ part_set_signal( p, WE[2], 1, 1 );
+ part_set_signal( p, WE[3], 1, 1 );
+
+ chain_shift_data_registers( chain, 0 );
+}
+
+const bus_driver_t sh7751r_bus = {
+ "sh7751r",
+ N_("Hitachi SH7751R compatible bus driver via BSR"),
+ sh7751r_bus_new,
+ generic_bus_free,
+ sh7751r_bus_printinfo,
+ generic_bus_prepare_extest,
+ sh7751r_bus_area,
+ sh7751r_bus_read_start,
+ sh7751r_bus_read_next,
+ sh7751r_bus_read_end,
+ generic_bus_read,
+ sh7751r_bus_write,
+ generic_bus_no_init
+};
--- /dev/null
+/*
+ * $Id$
+ *
+ * Analog Device's SHARC 21065L compatible bus driver via BSR
+ * Copyright (C) 2006 Kila Medical Systems.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Ajith Kumar P.C <ajithpc@kila.com>
+ *
+ * Documentation:
+ * [1] Analog Devices Inc.,"ADSP-21065L SHARC Technical Reference", September 1998
+ * [2] Analog Devices Inc.,"ADSP-21065L SHARC User's Manual", September 1998
+ *
+ */
+
+#include "sysdep.h"
+
+#include <stdlib.h>
+#include <stdint.h>
+#include <string.h>
+
+#include "part.h"
+#include "bus.h"
+#include "bssignal.h"
+#include "jtag.h"
+#include "buses.h"
+#include "generic_bus.h"
+
+//no SDRAM access
+
+typedef struct {
+ uint32_t last_adr;
+ signal_t *ma[19]; //19 - 512K flash address are used
+ signal_t *md[8]; //8 bit data bus connected to Flash are used
+ signal_t *bms; //boot memory select
+ signal_t *nwe;
+ signal_t *noe;
+} bus_params_t;
+
+#define LAST_ADR ((bus_params_t *) bus->params)->last_adr
+#define MA ((bus_params_t *) bus->params)->ma
+#define MD ((bus_params_t *) bus->params)->md
+#define BMS ((bus_params_t *) bus->params)->bms
+#define nWE ((bus_params_t *) bus->params)->nwe
+#define nOE ((bus_params_t *) bus->params)->noe
+
+/**
+ * bus->driver->(*new_bus)
+ *
+ */
+static bus_t *sharc_21065L_bus_new( chain_t *chain, const bus_driver_t *driver, char *cmd_params[] )
+{
+ bus_t *bus;
+ part_t *part;
+ char buff[15];
+ int i;
+ int failed = 0;
+
+ bus = calloc( 1, sizeof (bus_t) );
+ if (!bus)
+ return NULL;
+
+ bus->driver = driver;
+ bus->params = calloc( 1, sizeof (bus_params_t) );
+ if (!bus->params) {
+ free( bus );
+ return NULL;
+ }
+
+ CHAIN = chain;
+ PART = part = chain->parts->parts[chain->active_part];
+
+ for (i = 0; i < 19; i++) {
+ sprintf( buff, "ADDR%d", i );
+ failed |= generic_bus_attach_sig( part, &(MA[i]), buff );
+ }
+
+ for (i = 0; i < 8; i++) {
+ sprintf( buff, "DATA%d", i );
+ failed |= generic_bus_attach_sig( part, &(MD[i]), buff );
+ }
+
+ failed |= generic_bus_attach_sig( part, &(BMS), "BMS_B" );
+
+ failed |= generic_bus_attach_sig( part, &(nWE), "WR_B" );
+
+ failed |= generic_bus_attach_sig( part, &(nOE), "RD_B" );
+
+ if (failed) {
+ free( bus->params );
+ free( bus );
+ return NULL;
+ }
+
+ return bus;
+}
+
+/**
+ * bus->driver->(*printinfo)
+ *
+ */
+static void sharc_21065L_bus_printinfo( bus_t *bus )
+{
+ int i;
+
+ for (i = 0; i < CHAIN->parts->len; i++)
+ if (PART == CHAIN->parts->parts[i])
+ break;
+ printf( _("Analog Device's SHARC 21065L compatible bus driver via BSR (JTAG part No. %d)\n"), i );
+}
+
+/**
+ * bus->driver->(*area)
+ *
+ */
+static int
+sharc_21065L_bus_area( bus_t *bus, uint32_t adr, bus_area_t *area )
+{
+ /* BMS (512 KB) */
+ if (adr < UINT32_C(0x080000)) {
+ area->description = N_("Boot Memory Select");
+ area->start = UINT32_C(0x000000);
+ area->length = UINT64_C(0x080000);
+ area->width = 8;
+
+ return URJTAG_STATUS_OK;
+ }
+
+ area->description = NULL;
+ area->start = UINT32_C(0xffffffff);
+ area->length = UINT64_C(0x080000);
+ area->width = 0;
+ return URJTAG_STATUS_OK;
+}
+
+static void
+setup_address( bus_t *bus, uint32_t a )
+{
+ int i;
+ part_t *p = PART;
+
+ for (i = 0; i < 19; i++)
+ part_set_signal( p, MA[i], 1, (a >> i) & 1 );
+}
+
+static void
+set_data_in( bus_t *bus, uint32_t adr )
+{
+ int i;
+ part_t *p = PART;
+ bus_area_t area;
+
+ sharc_21065L_bus_area( bus, adr, &area );
+
+ for (i = 0; i < area.width; i++)
+ part_set_signal( p, MD[i], 0, 0 );
+}
+
+
+static void
+setup_data( bus_t *bus, uint32_t adr, uint32_t d )
+{
+ int i;
+ part_t *p = PART;
+ bus_area_t area;
+
+ sharc_21065L_bus_area( bus, adr, &area );
+
+ for (i = 0; i < area.width; i++)
+ part_set_signal( p, MD[i], 1, (d >> i) & 1 );
+}
+
+/**
+ * bus->driver->(*read_start)
+ *
+ */
+static void
+sharc_21065L_bus_read_start( bus_t *bus, uint32_t adr )
+{
+ chain_t *chain = CHAIN;
+ part_t *p = PART;
+
+ LAST_ADR = adr;
+ if (adr >= 0x080000)
+ return;
+
+
+ part_set_signal( p, BMS, 1, 0 );
+ part_set_signal( p, nWE, 1, 1 );
+ part_set_signal( p, nOE, 1, 0 );
+
+ setup_address( bus, adr );
+ set_data_in( bus, adr );
+
+ chain_shift_data_registers( chain, 0 );
+}
+
+/**
+ * bus->driver->(*read_next)
+ *
+ */
+static uint32_t
+sharc_21065L_bus_read_next( bus_t *bus, uint32_t adr )
+{
+ part_t *p = PART;
+ chain_t *chain = CHAIN;
+ uint32_t d;
+ //uint32_t old_last_adr = LAST_ADR;
+
+ LAST_ADR = adr;
+
+ if (adr < UINT32_C(0x080000)) {
+ int i;
+ bus_area_t area;
+
+ sharc_21065L_bus_area( bus, adr, &area );
+
+
+ setup_address( bus, adr );
+ chain_shift_data_registers( chain, 1 );
+
+ d = 0;
+ for (i = 0; i < area.width; i++)
+ d |= (uint32_t) (part_get_signal( p, MD[i] ) << i);
+
+ return d;
+ }
+ return 0;
+}
+
+/**
+ * bus->driver->(*read_end)
+ *
+ */
+static uint32_t
+sharc_21065L_bus_read_end( bus_t *bus )
+{
+ part_t *p = PART;
+ chain_t *chain = CHAIN;
+
+ if (LAST_ADR < UINT32_C(0x080000)) {
+ int i;
+ uint32_t d = 0;
+ bus_area_t area;
+
+ sharc_21065L_bus_area( bus, LAST_ADR, &area );
+
+
+ part_set_signal( p, BMS, 1, 1 );
+ part_set_signal( p, nWE, 1, 1 );
+ part_set_signal( p, nOE, 1, 1 );
+
+ chain_shift_data_registers( chain, 1 );
+
+ for (i = 0; i < area.width; i++)
+ d |= (uint32_t) (part_get_signal( p, MD[i] ) << i);
+
+ return d;
+ }
+
+ return 0;
+}
+
+/**
+ * bus->driver->(*write)
+ *
+ */
+static void
+sharc_21065L_bus_write( bus_t *bus, uint32_t adr, uint32_t data )
+{
+ part_t *p = PART;
+ chain_t *chain = CHAIN;
+
+ if (adr >= 0x080000)
+ return;
+
+
+ part_set_signal( p, BMS, 1, 0 );
+ part_set_signal( p, nWE, 1, 1 );
+ part_set_signal( p, nOE, 1, 1 );
+
+ setup_address( bus, adr );
+ setup_data( bus, adr, data );
+
+ chain_shift_data_registers( chain, 0 );
+
+ part_set_signal( p, nWE, 1, 0 );
+ chain_shift_data_registers( chain, 0 );
+ part_set_signal( p, nWE, 1, 1 );
+ chain_shift_data_registers( chain, 0 );
+}
+
+const bus_driver_t sharc_21065L_bus = {
+ "SHARC_21065L",
+ N_("SHARC_21065L compatible bus driver via BSR"),
+ sharc_21065L_bus_new,
+ generic_bus_free,
+ sharc_21065L_bus_printinfo,
+ generic_bus_prepare_extest,
+ sharc_21065L_bus_area,
+ sharc_21065L_bus_read_start,
+ sharc_21065L_bus_read_next,
+ sharc_21065L_bus_read_end,
+ generic_bus_read,
+ sharc_21065L_bus_write,
+ generic_bus_no_init
+};
--- /dev/null
+/*
+ * $Id$
+ *
+ * Altera UP3 Education Kit bus driver via BSR
+ * Copyright (C) 2005 Kent Palmkvist
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Kent Palmkvist <kentp@isy.liu.se>, 2005.
+ *
+ * Documentation:
+ * [1] System Level Solutions Inc., "UP3 Education Kit, Reference Manual",
+ *
+ */
+
+#include "sysdep.h"
+
+#include <stdlib.h>
+#include <stdint.h>
+#include <string.h>
+
+#include "part.h"
+#include "bus.h"
+#include "bssignal.h"
+#include "jtag.h"
+#include "buses.h"
+#include "generic_bus.h"
+
+int databusio[16] = {94,96,98,100,102,104,106,113,95,97,99,101,103,105,107,114};
+int addrbusio[20] = {93,88,87,86,85,84,83,63,64,65,66,67,68,74,75,76,77,82,81,78};
+
+typedef struct {
+ uint32_t last_adr;
+ signal_t *ad[20];
+ signal_t *dq[16];
+ signal_t *nsdce;
+ signal_t *sdclk;
+ signal_t *noe;
+ signal_t *nsrce;
+ signal_t *nflce;
+ signal_t *nflbyte;
+ signal_t *nflby;
+ signal_t *nwe;
+ signal_t *lcde;
+ signal_t *lcdrs;
+ signal_t *lcdrw;
+} bus_params_t;
+
+#define LAST_ADR ((bus_params_t *) bus->params)->last_adr
+#define AD ((bus_params_t *) bus->params)->ad
+#define DQ ((bus_params_t *) bus->params)->dq
+#define nSDce ((bus_params_t *) bus->params)->nsdce
+#define nOE ((bus_params_t *) bus->params)->noe
+#define nSRce ((bus_params_t *) bus->params)->nsrce
+#define nFLce ((bus_params_t *) bus->params)->nflce
+#define nFLbyte ((bus_params_t *) bus->params)->nflbyte
+#define nFLby ((bus_params_t *) bus->params)->nflby
+#define nWE ((bus_params_t *) bus->params)->nwe
+#define SDclk ((bus_params_t *) bus->params)->sdclk
+#define LCDe ((bus_params_t *) bus->params)->lcde
+#define LCDrs ((bus_params_t *) bus->params)->lcdrs
+#define LCDrw ((bus_params_t *) bus->params)->lcdrw
+
+/* All addresses and length are in Bytes */
+/* Assume 8 bit flash data bus */
+#define FLASHSTART UINT32_C(0x0000000)
+#define FLASHSIZE UINT64_C(0x0200000) /* Number of bytes */
+/* Assume 16 bit SRAM data bus */
+#define SRAMSTART 0x0200000
+#define SRAMSIZE 0x0020000
+#define LCDSTART 0x0300000
+#define LCDSIZE 0x0100000
+
+/**
+ * bus->driver->(*new_bus)
+ *
+ */
+static bus_t *
+slsup3_bus_new( chain_t *chain, const bus_driver_t *driver, char *cmd_params[] )
+{
+ bus_t *bus;
+ part_t *part;
+ char buff[10];
+ int i;
+ int failed = 0;
+
+ bus = calloc( 1, sizeof (bus_t) );
+ if (!bus)
+ return NULL;
+
+ bus->driver = driver;
+ bus->params = calloc( 1, sizeof (bus_params_t) );
+ if (!bus->params) {
+ free( bus );
+ return NULL;
+ }
+
+ CHAIN = chain;
+ PART = part = chain->parts->parts[chain->active_part];
+
+ for(i = 0; i < 20 ; i++) {
+ sprintf( buff, "IO%d", addrbusio[i] );
+ failed |= generic_bus_attach_sig( part, &(AD[i]), buff );
+ }
+
+ for(i = 0; i < 16 ; i++) {
+ sprintf( buff, "IO%d", databusio[i] );
+ failed |= generic_bus_attach_sig( part, &(DQ[i]), buff );
+ }
+
+ failed |= generic_bus_attach_sig( part, &(nOE), "IO118" );
+
+ failed |= generic_bus_attach_sig( part, &(nSRce), "IO116" );
+
+ failed |= generic_bus_attach_sig( part, &(nSDce), "IO119" );
+
+ failed |= generic_bus_attach_sig( part, &(nFLce), "IO117" );
+
+ failed |= generic_bus_attach_sig( part, &(nFLbyte), "IO115" );
+
+ failed |= generic_bus_attach_sig( part, &(nFLby), "IO80" );
+
+ failed |= generic_bus_attach_sig( part, &(nWE), "IO79" );
+
+ failed |= generic_bus_attach_sig( part, &(SDclk), "IO11" );
+
+ failed |= generic_bus_attach_sig( part, &(LCDe), "IO50" );
+
+ failed |= generic_bus_attach_sig( part, &(LCDrs), "IO108" );
+
+ failed |= generic_bus_attach_sig( part, &(LCDrw), "IO73" );
+
+ if (failed) {
+ free( bus->params );
+ free( bus );
+ return NULL;
+ }
+
+ return bus;
+}
+
+/**
+ * bus->driver->(*printinfo)
+ *
+ */
+static void
+slsup3_bus_printinfo( bus_t *bus )
+{
+ int i;
+
+ for (i = 0; i < CHAIN->parts->len; i++)
+ if (PART == CHAIN->parts->parts[i])
+ break;
+ printf( _("SLS UP3 bus driver via BSR (JTAG part No. %d)\n"), i );
+}
+
+/**
+ * bus->driver->(*area)
+ *
+ */
+static int
+slsup3_bus_area( bus_t *bus, uint32_t adr, bus_area_t *area )
+{
+ if ((adr >= FLASHSTART) && (adr < (FLASHSTART + FLASHSIZE))) {
+ area->description = N_("Flash Memory (2 MByte) byte mode");
+ area->start = FLASHSTART;
+ area->length = FLASHSIZE;
+ area->width = 8; /* 16 */
+
+ return URJTAG_STATUS_OK;
+ }
+
+ if ((adr >= SRAMSTART) && (adr < (SRAMSTART + SRAMSIZE))) {
+ area->description = N_("SRAM 128KByte (64K x 16)");
+ area->start = SRAMSTART;
+ area->length = SRAMSIZE;
+ area->width = 16;
+
+ return URJTAG_STATUS_OK;
+ }
+
+ if ((adr >= LCDSTART) && (adr < (LCDSTART + LCDSIZE))) {
+ area->description = N_("LCD Display (RS select by A0)");
+ area->start = LCDSTART;
+ area->length = LCDSIZE;
+ area->width = 8;
+
+ return URJTAG_STATUS_OK;
+ }
+
+ area->description = NULL;
+ area->start = UINT32_C(0x0400000);
+ area->length = UINT64_C(0xFFC00000);
+ area->width = 0;
+
+ return URJTAG_STATUS_OK;
+}
+
+static void
+setup_address( bus_t *bus, uint32_t a )
+{
+ int i;
+ part_t *p = PART;
+ bus_area_t area;
+
+ slsup3_bus_area( bus, a, &area );
+ if (area.width > 16)
+ return;
+
+ part_set_signal( p, LCDrs, 1, a & 1);
+
+ /* FLASH memory address setup. Use DQ15 to select byte */
+ if ((a >= (FLASHSTART)) && (a < (FLASHSTART + FLASHSIZE))) {
+ for (i = 0; i < 20; i++)
+ part_set_signal( p, AD[i], 1, (a >> (i+1)) & 1 );
+ part_set_signal( p, nFLce, 1, 0);
+ part_set_signal( p, DQ[15], 1, (a & 1));
+ } else
+ part_set_signal( p, nFLce, 1, 1);
+
+ /* SRAM memory address setup */
+ if ((a >= SRAMSTART) && (a < (SRAMSTART + SRAMSIZE))) {
+ part_set_signal( p, nSRce, 1, 0);
+ for (i = 0; i < 20; i++)
+ part_set_signal( p, AD[i], 1, (a >> (i + (area.width / 8) - 1)) & 1 );
+ } else
+ part_set_signal( p, nSRce, 1, 1);
+
+
+}
+
+static void
+set_data_in( bus_t *bus, uint32_t adr )
+{
+ int i;
+ part_t *p = PART;
+ bus_area_t area;
+
+ slsup3_bus_area( bus, adr, &area );
+ if (area.width > 16)
+ return;
+
+ for (i = 0; i < area.width; i++)
+ part_set_signal( p, DQ[i], 0, 0 );
+}
+
+static void
+setup_data( bus_t *bus, uint32_t adr, uint32_t d )
+{
+ int i;
+ part_t *p = PART;
+ bus_area_t area;
+
+ slsup3_bus_area( bus, adr, &area );
+ if (area.width > 16)
+ return;
+
+ for (i = 0; i < area.width; i++)
+ part_set_signal( p, DQ[i], 1, (d >> i) & 1 );
+}
+
+static uint32_t
+get_data( bus_t *bus, uint32_t adr )
+{
+ bus_area_t area;
+ int i;
+ uint32_t d = 0;
+ part_t *p = PART;
+
+ slsup3_bus_area( bus, adr, &area );
+ if (area.width > 16)
+ return 0;
+
+ for (i = 0; i < area.width; i++)
+ d |= (uint32_t) (part_get_signal( p, DQ[i] ) << i);
+
+ return d;
+}
+
+/**
+ * bus->driver->(*read_start)
+ *
+ */
+static void
+slsup3_bus_read_start( bus_t *bus, uint32_t adr )
+{
+ part_t *p = PART;
+
+ LAST_ADR = adr;
+
+ part_set_signal( p, nSDce, 1, 1); /* Inihibit SDRAM */
+ part_set_signal( p, nOE, 1, 0);
+ part_set_signal( p, nSRce, 1, 1);
+ part_set_signal( p, nFLce, 1, 1);
+ part_set_signal( p, nFLbyte, 1, 0);
+ part_set_signal( p, nWE, 1, 1);
+ part_set_signal( p, SDclk, 1, 0);
+ part_set_signal( p, LCDe, 1, 0);
+ part_set_signal( p, LCDrw, 1, 1);
+
+ setup_address( bus, adr );
+
+ if ((adr >= LCDSTART) && (adr < (LCDSTART + LCDSIZE))) {
+ part_set_signal( p, LCDe, 1, 1);
+ chain_shift_data_registers( CHAIN, 0 );
+ part_set_signal( p, LCDe, 1, 0);
+ }
+
+ set_data_in( bus, adr );
+
+ chain_shift_data_registers( CHAIN, 0 );
+
+}
+
+/**
+ * bus->driver->(*read_next)
+ *
+ */
+static uint32_t
+slsup3_bus_read_next( bus_t *bus, uint32_t adr )
+{
+ uint32_t d;
+
+ part_t *p = PART;
+
+ setup_address( bus, adr );
+
+ if ((adr >= LCDSTART) && (adr < (LCDSTART + LCDSIZE))) {
+ part_set_signal( p, LCDe, 1, 1);
+ chain_shift_data_registers( CHAIN, 0 );
+ part_set_signal( p, LCDe, 1, 0);
+ }
+
+ chain_shift_data_registers( CHAIN, 1 );
+
+ d = get_data( bus, LAST_ADR );
+
+ LAST_ADR = adr;
+
+ return d;
+}
+
+/**
+ * bus->driver->(*read_end)
+ *
+ */
+static uint32_t
+slsup3_bus_read_end( bus_t *bus )
+{
+ part_t *p = PART;
+ uint32_t d;
+
+ if ((LAST_ADR >= LCDSTART) && (LAST_ADR < (LCDSTART + LCDSIZE))) {
+ part_set_signal( p, LCDe, 1, 1);
+ chain_shift_data_registers( CHAIN, 0 );
+ part_set_signal( p, LCDe, 1, 0);
+ }
+
+ part_set_signal( p, nOE, 1, 1);
+
+ chain_shift_data_registers( CHAIN, 1 );
+
+ d = get_data( bus, LAST_ADR );
+
+ return d;
+}
+
+/**
+ * bus->driver->(*write)
+ *
+ */
+static void
+slsup3_bus_write( bus_t *bus, uint32_t adr, uint32_t data )
+{
+ part_t *p = PART;
+ chain_t *chain = CHAIN;
+
+ part_set_signal( p, nSDce, 1, 1); /* Inihibit SDRAM */
+ part_set_signal( p, nOE, 1, 1);
+ part_set_signal( p, nSRce, 1, 1);
+ part_set_signal( p, nFLce, 1, 1);
+ part_set_signal( p, nFLbyte, 1, 0);
+ part_set_signal( p, nWE, 1, 1);
+ part_set_signal( p, SDclk, 1, 0);
+ part_set_signal( p, LCDe, 1, 0);
+ part_set_signal( p, LCDrw, 1, 0);
+
+ setup_address( bus, adr );
+ setup_data( bus, adr, data );
+
+ if ((adr >= LCDSTART) && (adr < (LCDSTART + LCDSIZE))) {
+ chain_shift_data_registers( chain, 0 );
+ part_set_signal( p, LCDe, 1, 1);
+ chain_shift_data_registers( CHAIN, 0 );
+ part_set_signal( p, LCDe, 1, 0);
+ chain_shift_data_registers( CHAIN, 0 );
+ } else {
+
+ chain_shift_data_registers( chain, 0 );
+
+ part_set_signal( p, nWE, 1, 0 );
+ chain_shift_data_registers( chain, 0 );
+ part_set_signal( p, nWE, 1, 1 );
+ chain_shift_data_registers( chain, 0 );
+ }
+}
+
+const bus_driver_t slsup3_bus = {
+ "slsup3",
+ N_("SLS UP3 compatible bus driver via BSR"),
+ slsup3_bus_new,
+ generic_bus_free,
+ slsup3_bus_printinfo,
+ generic_bus_prepare_extest,
+ slsup3_bus_area,
+ slsup3_bus_read_start,
+ slsup3_bus_read_next,
+ slsup3_bus_read_end,
+ generic_bus_read,
+ slsup3_bus_write,
+ generic_bus_no_init
+};
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2003 RightHand Technologies, Inc.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Christian Pellegrin <chri@ascensit.com>, 2003.
+ * Modified by Marcel Telka <marcel@telka.sk>, 2003.
+ * Modified by Andrew Dyer <adyer@righthandtech.com>, 2003.
+ *
+ */
+
+#include "sysdep.h"
+
+#include <stdlib.h>
+#include <stdint.h>
+#include <string.h>
+
+#include "part.h"
+#include "bus.h"
+#include "chain.h"
+#include "bssignal.h"
+#include "jtag.h"
+#include "buses.h"
+#include "generic_bus.h"
+
+// FIXME board level write protect is ignored here
+// should be okay because pin isn't implemented
+// on 29LV200 we use now.
+
+typedef struct {
+ signal_t *oe;
+ signal_t *swe;
+ signal_t *romce[4];
+ signal_t *sdcs[4];
+ signal_t *addr[20];
+ signal_t *data[16];
+} bus_params_t;
+
+#define OE ((bus_params_t *) bus->params)->oe
+#define SWE ((bus_params_t *) bus->params)->swe
+#define ROMCE ((bus_params_t *) bus->params)->romce
+#define SDCS ((bus_params_t *) bus->params)->sdcs
+#define ADDR ((bus_params_t *) bus->params)->addr
+#define DATA ((bus_params_t *) bus->params)->data
+
+// the number of bytes wide that the TX4925
+// CS0 signal is set to by the external
+// config resistors on A13/A12 at reset
+// 1, 2, or 4 are legal values
+
+#define TX4925_FLASH_CS_WIDTH 2
+
+/**
+ * bus->driver->(*new_bus)
+ *
+ */
+static bus_t *
+tx4925_bus_new( chain_t *chain, const bus_driver_t *driver, char *cmd_params[] )
+{
+ bus_t *bus;
+ part_t *part;
+ char buff[15];
+ int i;
+ int failed = 0;
+
+ bus = calloc( 1, sizeof (bus_t) );
+ if (!bus)
+ return NULL;
+
+ bus->driver = driver;
+ bus->params = calloc( 1, sizeof (bus_params_t) );
+ if (!bus->params) {
+ free( bus );
+ return NULL;
+ }
+
+ CHAIN = chain;
+ PART = part = chain->parts->parts[chain->active_part];
+
+ failed |= generic_bus_attach_sig( part, &(OE), "OE" );
+
+ failed |= generic_bus_attach_sig( part, &(SWE), "SWE" );
+
+ for (i = 0; i < 4; i++) {
+ sprintf( buff, "ROMCE_%d", i );
+ failed |= generic_bus_attach_sig( part, &(ROMCE[i]), buff );
+ }
+
+ for (i = 0; i < 4; i++) {
+ sprintf( buff, "SDCS_%d", i );
+ failed |= generic_bus_attach_sig( part, &(SDCS[i]), buff );
+ }
+
+ for (i = 0; i < 20; i++) {
+ sprintf( buff, "ADDR_%d", i );
+ failed |= generic_bus_attach_sig( part, &(ADDR[i]), buff );
+ }
+
+ for (i = 0; i < 16; i++) {
+ sprintf( buff, "DATA_%d", i );
+ failed |= generic_bus_attach_sig( part, &(DATA[i]), buff );
+ }
+
+ if (failed) {
+ free( bus->params );
+ free( bus );
+ return NULL;
+ }
+
+ return bus;
+}
+
+/**
+ * bus->driver->(*printinfo)
+ *
+ */
+static void
+tx4925_bus_printinfo( bus_t *bus )
+{
+ int i;
+
+ for (i = 0; i < CHAIN->parts->len; i++)
+ if (PART == CHAIN->parts->parts[i])
+ break;
+ printf( _("Toshiba TX4925 compatible bus driver via BSR (JTAG part No. %d)\n"), i );
+}
+
+/**
+ * bus->driver->(*area)
+ *
+ */
+static int
+tx4925_bus_area( bus_t *bus, uint32_t adr, bus_area_t *area )
+{
+ area->description = NULL;
+ area->start = UINT32_C(0x00000000);
+ area->length = UINT64_C(0x100000000);
+ area->width = 16;
+
+ return URJTAG_STATUS_OK;
+}
+
+static void
+select_flash( bus_t *bus )
+{
+ part_t *p = PART;
+
+ part_set_signal( p, ROMCE[0], 1, 0 );
+ part_set_signal( p, ROMCE[1], 1, 1 );
+ part_set_signal( p, ROMCE[2], 1, 1 );
+ part_set_signal( p, ROMCE[3], 1, 1 );
+ part_set_signal( p, SDCS[0], 1, 1 );
+ part_set_signal( p, SDCS[1], 1, 1 );
+ part_set_signal( p, SDCS[2], 1, 1 );
+ part_set_signal( p, SDCS[3], 1, 1 );
+}
+
+static void
+unselect_flash( bus_t *bus )
+{
+ part_t *p = PART;
+
+ part_set_signal( p, ROMCE[0], 1, 1 );
+ part_set_signal( p, ROMCE[1], 1, 1 );
+ part_set_signal( p, ROMCE[2], 1, 1 );
+ part_set_signal( p, ROMCE[3], 1, 1 );
+ part_set_signal( p, SDCS[0], 1, 1 );
+ part_set_signal( p, SDCS[1], 1, 1 );
+ part_set_signal( p, SDCS[2], 1, 1 );
+ part_set_signal( p, SDCS[3], 1, 1 );
+}
+
+static void
+setup_address( bus_t *bus, uint32_t a )
+{
+ int i;
+ part_t *p = PART;
+ int addr_shift = (TX4925_FLASH_CS_WIDTH / 2);
+
+ for (i = 0; i < 20; i++)
+ part_set_signal( p, ADDR[i], 1, (a >> (i+addr_shift)) & 1 );
+}
+
+static void
+set_data_in( bus_t *bus )
+{
+ int i;
+ part_t *p = PART;
+
+ for (i = 0; i < 16; i++)
+ part_set_signal( p, DATA[i], 0, 0 );
+}
+
+static void
+setup_data( bus_t *bus, uint32_t d )
+{
+ int i;
+ part_t *p = PART;
+
+ for (i = 0; i < 16; i++)
+ part_set_signal( p, DATA[i], 1, (d >> i) & 1 );
+}
+
+/**
+ * bus->driver->(*read_start)
+ *
+ */
+static void
+tx4925_bus_read_start( bus_t *bus, uint32_t adr )
+{
+ part_t *p = PART;
+ chain_t *chain = CHAIN;
+
+ select_flash( bus );
+ setup_address( bus, adr );
+ part_set_signal( p, OE, 1, 0 );
+ part_set_signal( p, SWE, 1, 1 );
+
+ set_data_in( bus );
+
+ chain_shift_data_registers( chain, 0 );
+}
+
+/**
+ * bus->driver->(*read_next)
+ *
+ */
+static uint32_t
+tx4925_bus_read_next( bus_t *bus, uint32_t adr )
+{
+ part_t *p = PART;
+ chain_t *chain = CHAIN;
+ int i;
+ uint32_t d = 0;
+
+ setup_address( bus, adr );
+ chain_shift_data_registers( chain, 1 );
+
+ for (i = 0; i < 16; i++)
+ d |= (uint32_t) (part_get_signal( p, DATA[i] ) << i);
+
+ return d;
+}
+
+/**
+ * bus->driver->(*read_end)
+ *
+ */
+static uint32_t
+tx4925_bus_read_end( bus_t *bus )
+{
+ part_t *p = PART;
+ chain_t *chain = CHAIN;
+ int i;
+ uint32_t d = 0;
+
+ unselect_flash( bus );
+ part_set_signal( p, OE, 1, 1 );
+ part_set_signal( p, SWE, 1, 1 );
+
+ chain_shift_data_registers( chain, 1 );
+
+ for (i = 0; i < 16; i++)
+ d |= (uint32_t) (part_get_signal( p, DATA[i] ) << i);
+
+ return d;
+}
+
+/**
+ * bus->driver->(*write)
+ *
+ */
+static void
+tx4925_bus_write( bus_t *bus, uint32_t adr, uint32_t data )
+{
+ part_t *p = PART;
+ chain_t *chain = CHAIN;
+
+ select_flash( bus );
+ part_set_signal( p, OE, 1, 1 );
+
+ setup_address( bus, adr );
+ setup_data( bus, data );
+
+ chain_shift_data_registers( chain, 0 );
+
+ part_set_signal( p, SWE, 1, 0 );
+ chain_shift_data_registers( chain, 0 );
+ part_set_signal( p, SWE, 1, 1 );
+ unselect_flash( bus );
+ chain_shift_data_registers( chain, 0 );
+}
+
+const bus_driver_t tx4925_bus = {
+ "tx4925",
+ N_("Toshiba TX4925 compatible bus driver via BSR"),
+ tx4925_bus_new,
+ generic_bus_free,
+ tx4925_bus_printinfo,
+ generic_bus_prepare_extest,
+ tx4925_bus_area,
+ tx4925_bus_read_start,
+ tx4925_bus_read_next,
+ tx4925_bus_read_end,
+ generic_bus_read,
+ tx4925_bus_write,
+ generic_bus_no_init
+};
--- /dev/null
+/*
+ * $Id$
+ *
+ * Written by Kent Palmkvist (kentp@isy.liu.se>, 2005.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ *
+ */
+
+#include "sysdep.h"
+
+#include <stdint.h>
+#include <string.h>
+#include <flash/cfi.h>
+#include <flash/intel.h>
+#include <flash/mic.h>
+
+#include "bus.h"
+#include "flash.h"
+#include "jtag.h"
+
+void
+writemem( bus_t *bus, FILE *f, uint32_t addr, uint32_t len )
+{
+ uint32_t step;
+ uint32_t a;
+ int bc = 0;
+ int bidx = 0;
+#define BSIZE 4096
+ uint8_t b[BSIZE];
+ bus_area_t area;
+ uint64_t end;
+
+ if (!bus) {
+ printf( _("Error: Missing bus driver!\n") );
+ return;
+ }
+
+ bus_prepare( bus );
+
+ if (bus_area( bus, addr, &area ) != URJTAG_STATUS_OK) {
+ printf( _("Error: Bus width detection failed\n") );
+ return;
+ }
+ step = area.width / 8;
+
+ if (step == 0) {
+ printf( _("Unknown bus width!\n") );
+ return;
+ }
+
+ addr = addr & (~(step - 1));
+ len = (len + step - 1) & (~(step - 1));
+
+ printf( _("address: 0x%08X\n"), addr );
+ printf( _("length: 0x%08X\n"), len );
+
+ if (len == 0) {
+ printf( _("length is 0.\n") );
+ return;
+ }
+
+ a = addr;
+ end = a + len;
+ printf( _("writing:\n") );
+
+ for (; a < end; a += step) {
+ uint32_t data;
+ int j;
+
+ /* Read one block of data */
+ if ( bc < step ) {
+ printf( _("addr: 0x%08X"), a );
+ printf( "\r" );
+ fflush( stdout );
+ if (bc != 0)
+ printf( _("Data not on word boundary, NOT SUPPORTED!"));
+ if (feof(f)) {
+ printf( _("Unexpected end of file!\n"));
+ printf( _("Addr: 0x%08X\n"), a);
+ break;
+ }
+ bc = fread( b, 1, BSIZE, f );
+ if (!bc) {
+ printf( _("Short read: bc=0x%X\n"), bc);
+ }
+ bidx = 0;
+
+ }
+
+ /* Write a word at time */
+ data = 0;
+ for (j = step; j > 0; j--) {
+ if (big_endian) {
+ data |= b[bidx++];
+ data <<= 8;
+ bc--;
+ } else {
+ data |= (b[bidx++] << ((step - j) * 8));
+ bc--;
+ }
+ }
+
+ bus_write( bus, a, data );
+
+ }
+
+ printf( _("\nDone.\n") );
+}
--- /dev/null
+/*
+ * $Id$
+ *
+ * Bus driver for the Zefant-XS3 Board manufactured by Simple Solutions.
+ *
+ * http://www.zefant.de/
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Arnim Laeuger <arniml@users.sourceforge.net>, 2005.
+ *
+ * Notes:
+ * ------
+ * This driver supports the Flash memory of the FPGA module, the
+ * optional SRAMs in the SO-DIMM socket and the serial EEPROM
+ * found on the mini ATX baseboard.
+ *
+ * The external components are assigned different address ranges.
+ * These are arbtitrary but help to distinguish the devices.
+ * Please note that the address ranges reflect a maximum capacity
+ * situation for Flash and EEPROM. The actual chips might provide
+ * a smaller memory array.
+ *
+ * FLASH: 0x00000000 - 0x001FFFFF
+ * RAM0: 0x00200000 - 0x0027FFFF
+ * RAM1: 0x00280000 - 0x002FFFFF
+ * EEPROM: 0x00300000 - 0x0030FFFF
+ * status: 0x00310000 - 0x0031FFFF
+ *
+ * JTAG Tool generates byte addresses when accessing memories. Thus
+ * this driver discards the LSB when the RAM and flash ranges are
+ * addressed. readmem and writemem care for proper address increment
+ * based on the bus width.
+ * On the other hand, this driver reads and writes always one word
+ * (= 2 bytes) from/to the RAMs. It does not use the byte-enables.
+ * This is mainly due to the lack of byte-enable information in the
+ * bus-driver API.
+ *
+ * Remember to clarify the endianess of your data when working with
+ * the memories.
+ *
+ */
+
+#include "sysdep.h"
+
+#include <stdlib.h>
+#include <stdint.h>
+#include <string.h>
+
+#include "part.h"
+#include "bus.h"
+#include "chain.h"
+#include "bssignal.h"
+#include "jtag.h"
+#include "buses.h"
+#include "generic_bus.h"
+#include "state.h"
+
+/* EEPROM commands */
+#define EEPROM_CMD_WREN 0x06
+#define EEPROM_CMD_WRDI 0x04
+#define EEPROM_CMD_RDSR 0x05
+#define EEPROM_CMD_WRSR 0x01
+#define EEPROM_CMD_READ 0x03
+#define EEPROM_CMD_WRITE 0x02
+
+#define RAM_ADDR_WIDTH 18
+#define RAM_DATA_WIDTH 16
+#define FLASH_ADDR_WIDTH 25
+#define FLASH_DATA_WIDTH 16
+#define EEPROM_ADDR_WIDTH 16
+#define EEPROM_DATA_WIDTH 8
+
+/* length is in number of bytes
+ the full address width is taken to build the power of 2 */
+#define RAM_LENGTH (1 << (RAM_ADDR_WIDTH+1))
+/* the flash component ignores A0, so address is not doubled here */
+#define FLASH_LENGTH (1 << FLASH_ADDR_WIDTH)
+#define EEPROM_LENGTH (1 << EEPROM_ADDR_WIDTH)
+#define EEPROM_STATUS_LENGTH EEPROM_LENGTH
+
+#define FLASH_START 0
+#define RAM0_START FLASH_LENGTH
+#define RAM1_START (RAM0_START + RAM_LENGTH)
+#define EEPROM_START (RAM1_START + RAM_LENGTH)
+#define EEPROM_STATUS_START (EEPROM_START + EEPROM_LENGTH)
+
+typedef enum {RAM, FLASH, EEPROM, EEPROM_STATUS} ctype_t;
+
+typedef struct {
+ ctype_t ctype;
+ char *cname;
+ signal_t *a[FLASH_ADDR_WIDTH];
+ signal_t *d[RAM_DATA_WIDTH];
+ signal_t *ncs;
+ signal_t *noe;
+ signal_t *nwe;
+ signal_t *nlb;
+ signal_t *nub;
+ signal_t *nbyte;
+ signal_t *sts;
+ signal_t *nrp;
+ signal_t *si;
+ signal_t *so;
+ signal_t *sck;
+} component_t;
+
+typedef struct {
+ uint32_t last_addr; /* holds last address of read or write access */
+ component_t flash;
+ component_t ram0;
+ component_t ram1;
+ component_t eeprom;
+ component_t eeprom_status;
+} bus_params_t;
+
+#define LAST_ADDR ((bus_params_t *) bus->params)->last_addr
+#define A comp->a
+#define D comp->d
+#define nCS comp->ncs
+#define nOE comp->noe
+#define nWE comp->nwe
+#define nLB comp->nlb
+#define nUB comp->nub
+#define nBYTE comp->nbyte
+#define STS comp->sts
+#define nRP comp->nrp
+#define SI comp->si
+#define SO comp->so
+#define SCK comp->sck
+
+#define COMP_FLASH &(((bus_params_t *) bus->params)->flash)
+#define COMP_RAM0 &(((bus_params_t *) bus->params)->ram0)
+#define COMP_RAM1 &(((bus_params_t *) bus->params)->ram1)
+#define COMP_EEPROM &(((bus_params_t *) bus->params)->eeprom)
+#define COMP_EEPROM_STATUS &(((bus_params_t *) bus->params)->eeprom_status)
+
+/**
+ * bus->driver->(*new_bus)
+ *
+ */
+static bus_t *
+zefant_xs3_bus_new( chain_t *chain, const bus_driver_t *driver, char *cmd_params[] )
+{
+ bus_t *bus;
+ part_t *part;
+ int failed = 0;
+ component_t *comp;
+ int idx;
+
+ bus = calloc( 1, sizeof (bus_t) );
+ if (!bus)
+ return NULL;
+
+ bus->driver = driver;
+ bus->params = calloc( 1, sizeof (bus_params_t) );
+ if (!bus->params) {
+ free( bus );\
+ return NULL;
+ }
+
+ CHAIN = chain;
+ PART = part = chain->parts->parts[chain->active_part];
+
+ /*
+ * Setup FLASH
+ */
+ comp = COMP_FLASH;
+ comp->ctype = FLASH;
+ comp->cname = "FLASH";
+
+ failed |= generic_bus_attach_sig( part, &(A[ 0]), "IO_V9" );
+ failed |= generic_bus_attach_sig( part, &(A[ 1]), "IO_U10" );
+ failed |= generic_bus_attach_sig( part, &(A[ 2]), "IO_V10" );
+ failed |= generic_bus_attach_sig( part, &(A[ 3]), "IO_W10" );
+ failed |= generic_bus_attach_sig( part, &(A[ 4]), "IO_Y10" );
+ failed |= generic_bus_attach_sig( part, &(A[ 5]), "IO_W8" );
+ failed |= generic_bus_attach_sig( part, &(A[ 6]), "IO_W9" );
+ failed |= generic_bus_attach_sig( part, &(A[ 7]), "IO_V8" );
+ failed |= generic_bus_attach_sig( part, &(A[ 8]), "IO_V6" );
+ failed |= generic_bus_attach_sig( part, &(A[ 9]), "IO_AA8" );
+ failed |= generic_bus_attach_sig( part, &(A[10]), "IO_AB8" );
+ failed |= generic_bus_attach_sig( part, &(A[11]), "IO_U7" );
+ failed |= generic_bus_attach_sig( part, &(A[12]), "IO_V7" );
+ failed |= generic_bus_attach_sig( part, &(A[13]), "IO_U6" );
+ failed |= generic_bus_attach_sig( part, &(A[14]), "IO_Y6" );
+ failed |= generic_bus_attach_sig( part, &(A[15]), "IO_AB11" );
+ failed |= generic_bus_attach_sig( part, &(A[16]), "IO_AB10" );
+ failed |= generic_bus_attach_sig( part, &(A[17]), "IO_AA10" );
+ failed |= generic_bus_attach_sig( part, &(A[18]), "IO_W6" );
+ failed |= generic_bus_attach_sig( part, &(A[19]), "IO_AA6" );
+ failed |= generic_bus_attach_sig( part, &(A[20]), "IO_U11" );
+ failed |= generic_bus_attach_sig( part, &(A[21]), "IO_Y13" );
+ failed |= generic_bus_attach_sig( part, &(A[22]), "IO_AB13" );
+ failed |= generic_bus_attach_sig( part, &(A[23]), "IO_U13" );
+ failed |= generic_bus_attach_sig( part, &(A[24]), "IO_AA13" );
+
+ failed |= generic_bus_attach_sig( part, &(D[ 0]), "IO_AA14" );
+ failed |= generic_bus_attach_sig( part, &(D[ 1]), "IO_AB14" );
+ failed |= generic_bus_attach_sig( part, &(D[ 2]), "IO_U12" );
+ failed |= generic_bus_attach_sig( part, &(D[ 3]), "IO_V12" );
+ failed |= generic_bus_attach_sig( part, &(D[ 4]), "IO_W11" );
+ failed |= generic_bus_attach_sig( part, &(D[ 5]), "IO_V11" );
+ failed |= generic_bus_attach_sig( part, &(D[ 6]), "IO_AB9" );
+ failed |= generic_bus_attach_sig( part, &(D[ 7]), "IO_AA9" );
+ failed |= generic_bus_attach_sig( part, &(D[ 8]), "IO_U16" );
+ failed |= generic_bus_attach_sig( part, &(D[ 9]), "IO_AB15" );
+ failed |= generic_bus_attach_sig( part, &(D[10]), "IO_AA15" );
+ failed |= generic_bus_attach_sig( part, &(D[11]), "IO_W14" );
+ failed |= generic_bus_attach_sig( part, &(D[12]), "IO_V14" );
+ failed |= generic_bus_attach_sig( part, &(D[13]), "IO_U14" );
+ failed |= generic_bus_attach_sig( part, &(D[14]), "IO_W13" );
+ failed |= generic_bus_attach_sig( part, &(D[15]), "IO_V13" );
+
+ failed |= generic_bus_attach_sig( part, &(nWE), "IO_Y17" );
+ failed |= generic_bus_attach_sig( part, &(nOE), "IO_AA17" );
+ failed |= generic_bus_attach_sig( part, &(nCS), "IO_U17" );
+ nLB = NULL;
+ nUB = NULL;
+
+ failed |= generic_bus_attach_sig( part, &(nRP), "IO_V16" );
+ failed |= generic_bus_attach_sig( part, &(nBYTE), "IO_Y16" );
+ failed |= generic_bus_attach_sig( part, &(STS), "IO_W16" );
+
+ SI = NULL;
+ SO = NULL;
+ SCK = NULL;
+
+ /*
+ * Setup SO-DIMM SRAM0
+ */
+ comp = COMP_RAM0;
+ comp->ctype = RAM;
+ comp->cname = "RAM0";
+
+ failed |= generic_bus_attach_sig( part, &(A[ 0]), "IO_AA4" );
+ failed |= generic_bus_attach_sig( part, &(A[ 1]), "IO_AB4" );
+ failed |= generic_bus_attach_sig( part, &(A[ 2]), "IO_W5" );
+ failed |= generic_bus_attach_sig( part, &(A[ 3]), "IO_Y3" );
+ failed |= generic_bus_attach_sig( part, &(A[ 4]), "IO_Y1" );
+ failed |= generic_bus_attach_sig( part, &(A[ 5]), "IO_M1" );
+ failed |= generic_bus_attach_sig( part, &(A[ 6]), "IO_N2" );
+ failed |= generic_bus_attach_sig( part, &(A[ 7]), "IO_L2" );
+ failed |= generic_bus_attach_sig( part, &(A[ 8]), "IO_L1" );
+ failed |= generic_bus_attach_sig( part, &(A[ 9]), "IO_K1" );
+ failed |= generic_bus_attach_sig( part, &(A[10]), "IO_K3" );
+ failed |= generic_bus_attach_sig( part, &(A[11]), "IO_L6" );
+ failed |= generic_bus_attach_sig( part, &(A[12]), "IO_L4" );
+ failed |= generic_bus_attach_sig( part, &(A[13]), "IO_L3" );
+ failed |= generic_bus_attach_sig( part, &(A[14]), "IO_K4" );
+ failed |= generic_bus_attach_sig( part, &(A[15]), "IO_AB5" );
+ failed |= generic_bus_attach_sig( part, &(A[16]), "IO_AA5" );
+ failed |= generic_bus_attach_sig( part, &(A[17]), "IO_Y5" );
+ A[18] = NULL;
+ A[19] = NULL;
+ A[20] = NULL;
+ A[21] = NULL;
+ A[22] = NULL;
+ A[23] = NULL;
+ A[24] = NULL;
+
+ failed |= generic_bus_attach_sig( part, &(D[ 0]), "IO_W1" );
+ failed |= generic_bus_attach_sig( part, &(D[ 1]), "IO_V5" );
+ failed |= generic_bus_attach_sig( part, &(D[ 2]), "IO_V3" );
+ failed |= generic_bus_attach_sig( part, &(D[ 3]), "IO_V1" );
+ failed |= generic_bus_attach_sig( part, &(D[ 4]), "IO_N1" );
+ failed |= generic_bus_attach_sig( part, &(D[ 5]), "IO_N3" );
+ failed |= generic_bus_attach_sig( part, &(D[ 6]), "IO_M2" );
+ failed |= generic_bus_attach_sig( part, &(D[ 7]), "IO_M5" );
+ failed |= generic_bus_attach_sig( part, &(D[ 8]), "IO_M4" );
+ failed |= generic_bus_attach_sig( part, &(D[ 9]), "IO_M6" );
+ failed |= generic_bus_attach_sig( part, &(D[10]), "IO_L5" );
+ failed |= generic_bus_attach_sig( part, &(D[11]), "IO_N4" );
+ failed |= generic_bus_attach_sig( part, &(D[12]), "IO_T6" );
+ failed |= generic_bus_attach_sig( part, &(D[13]), "IO_V2" );
+ failed |= generic_bus_attach_sig( part, &(D[14]), "IO_V4" );
+ failed |= generic_bus_attach_sig( part, &(D[15]), "IO_U5" );
+
+ failed |= generic_bus_attach_sig( part, &(nCS), "IO_W3" );
+ failed |= generic_bus_attach_sig( part, &(nOE), "IO_Y2" );
+ failed |= generic_bus_attach_sig( part, &(nWE), "IO_M3" );
+ failed |= generic_bus_attach_sig( part, &(nLB), "IO_W2" );
+ failed |= generic_bus_attach_sig( part, &(nUB), "IO_W4" );
+ nRP = NULL;
+ nBYTE = NULL;
+ STS = NULL;
+
+ SI = NULL;
+ SO = NULL;
+ SCK = NULL;
+
+ /*
+ * Setup SO-DIMM SRAM1
+ */
+ comp = COMP_RAM1;
+ comp->ctype = RAM;
+ comp->cname = "RAM1";
+
+ failed |= generic_bus_attach_sig( part, &(A[ 0]), "IO_H5" );
+ failed |= generic_bus_attach_sig( part, &(A[ 1]), "IO_F5" );
+ failed |= generic_bus_attach_sig( part, &(A[ 2]), "IO_F2" );
+ failed |= generic_bus_attach_sig( part, &(A[ 3]), "IO_D1" );
+ failed |= generic_bus_attach_sig( part, &(A[ 4]), "IO_E1" );
+ failed |= generic_bus_attach_sig( part, &(A[ 5]), "IO_F10" );
+ failed |= generic_bus_attach_sig( part, &(A[ 6]), "IO_C7" );
+ failed |= generic_bus_attach_sig( part, &(A[ 7]), "IO_C10" );
+ failed |= generic_bus_attach_sig( part, &(A[ 8]), "IO_A10" );
+ failed |= generic_bus_attach_sig( part, &(A[ 9]), "IO_B10" );
+ failed |= generic_bus_attach_sig( part, &(A[10]), "IO_F11" );
+ failed |= generic_bus_attach_sig( part, &(A[11]), "IO_A9" );
+ failed |= generic_bus_attach_sig( part, &(A[12]), "IO_B9" );
+ failed |= generic_bus_attach_sig( part, &(A[13]), "IO_B8" );
+ failed |= generic_bus_attach_sig( part, &(A[14]), "IO_F9" );
+ failed |= generic_bus_attach_sig( part, &(A[15]), "IO_F4" );
+ failed |= generic_bus_attach_sig( part, &(A[16]), "IO_G6" );
+ failed |= generic_bus_attach_sig( part, &(A[17]), "IO_G5" );
+ A[18] = NULL;
+ A[19] = NULL;
+ A[20] = NULL;
+ A[21] = NULL;
+ A[22] = NULL;
+ A[23] = NULL;
+ A[24] = NULL;
+
+ failed |= generic_bus_attach_sig( part, &(D[ 0]), "IO_C1" );
+ failed |= generic_bus_attach_sig( part, &(D[ 1]), "IO_E2" );
+ failed |= generic_bus_attach_sig( part, &(D[ 2]), "IO_C2" );
+ failed |= generic_bus_attach_sig( part, &(D[ 3]), "IO_C3" );
+ failed |= generic_bus_attach_sig( part, &(D[ 4]), "IO_B5" );
+ failed |= generic_bus_attach_sig( part, &(D[ 5]), "IO_A5" );
+ failed |= generic_bus_attach_sig( part, &(D[ 6]), "IO_B6" );
+ failed |= generic_bus_attach_sig( part, &(D[ 7]), "IO_D7" );
+ failed |= generic_bus_attach_sig( part, &(D[ 8]), "IO_D9" );
+ failed |= generic_bus_attach_sig( part, &(D[ 9]), "IO_E9" );
+ failed |= generic_bus_attach_sig( part, &(D[10]), "IO_F7" );
+ failed |= generic_bus_attach_sig( part, &(D[11]), "IO_E7" );
+ failed |= generic_bus_attach_sig( part, &(D[12]), "IO_D5" );
+ failed |= generic_bus_attach_sig( part, &(D[13]), "IO_C4" );
+ failed |= generic_bus_attach_sig( part, &(D[14]), "IO_D3" );
+ failed |= generic_bus_attach_sig( part, &(D[15]), "IO_D4" );
+
+ failed |= generic_bus_attach_sig( part, &(nCS), "IO_D2" );
+ failed |= generic_bus_attach_sig( part, &(nOE), "IO_F3" );
+ failed |= generic_bus_attach_sig( part, &(nWE), "IO_E10" );
+ failed |= generic_bus_attach_sig( part, &(nLB), "IO_E4" );
+ failed |= generic_bus_attach_sig( part, &(nUB), "IO_E3" );
+ nRP = NULL;
+ nBYTE = NULL;
+ STS = NULL;
+
+ SI = NULL;
+ SO = NULL;
+ SCK = NULL;
+
+ /*
+ * Setup EEPROM
+ */
+ comp = COMP_EEPROM;
+ comp->ctype = EEPROM;
+ comp->cname = "EEPROM";
+
+ failed |= generic_bus_attach_sig( part, &(SI), "IO_H19" );
+ failed |= generic_bus_attach_sig( part, &(SO), "IO_J21" );
+ failed |= generic_bus_attach_sig( part, &(SCK), "IO_H21" );
+ failed |= generic_bus_attach_sig( part, &(nCS), "IO_K22" );
+
+ for (idx = 0; idx < FLASH_ADDR_WIDTH; idx++)
+ A[idx] = NULL;
+ for (idx = 0; idx < RAM_DATA_WIDTH; idx++)
+ D[idx] = NULL;
+ nOE = NULL;
+ nWE = NULL;
+ nLB = NULL;
+ nUB = NULL;
+ nRP = NULL;
+ nBYTE = NULL;
+ STS = NULL;
+
+ /*
+ * Setup EEPROM Status
+ * copy settings from EEPROM
+ */
+ ((bus_params_t *) bus->params)->eeprom_status = ((bus_params_t *) bus->params)->eeprom;
+ comp = COMP_EEPROM_STATUS;
+ comp->ctype = EEPROM_STATUS;
+ comp->cname = "EEPROM Status";
+
+
+ if (failed) {
+ free( bus->params );
+ free( bus );
+ return NULL;
+ }
+
+ return bus;
+}
+
+/**
+ * bus->driver->(*printinfo)
+ *
+ */
+static void
+zefant_xs3_bus_printinfo( bus_t *bus )
+{
+ int i;
+
+ for (i = 0; i < CHAIN->parts->len; i++)
+ if (PART == CHAIN->parts->parts[i])
+ break;
+ printf( _("Simple Solutions Zefant-XS3 Board compatible bus driver via BSR (JTAG part No. %d)\n"), i );
+}
+
+static void
+setup_address( bus_t *bus, uint32_t a, component_t *comp )
+{
+ int i;
+ part_t *p = PART;
+ int addr_width;
+
+ LAST_ADDR = a;
+
+ switch (comp->ctype) {
+ case FLASH:
+ addr_width = FLASH_ADDR_WIDTH;
+ /* address a is a byte address,
+ A0 is ignored by the flash chip */
+ break;
+ case RAM:
+ addr_width = RAM_ADDR_WIDTH;
+ /* address a is a byte address so it is transferred into
+ a word address here */
+ a >>= 1;
+ break;
+ case EEPROM:
+ case EEPROM_STATUS:
+ addr_width = EEPROM_ADDR_WIDTH;
+ break;
+ default:
+ addr_width = 0;
+ break;
+ }
+
+ for (i = 0; i < addr_width; i++)
+ part_set_signal( p, A[i], 1, (a >> i) & 1 );
+}
+
+static int
+detect_data_width( component_t *comp )
+{
+ int width;
+
+ switch (comp->ctype) {
+ case RAM:
+ width = RAM_DATA_WIDTH;
+ break;
+ case FLASH:
+ width = FLASH_DATA_WIDTH;
+ break;
+ case EEPROM:
+ case EEPROM_STATUS:
+ width = EEPROM_DATA_WIDTH;
+ break;
+ default:
+ width = 0;
+ break;
+ }
+
+ return width;
+}
+
+static void
+set_data_in( bus_t *bus, component_t *comp )
+{
+ int i;
+ part_t *p = PART;
+ int width;
+
+ width = detect_data_width( comp );
+
+ for (i = 0; i < width; i++)
+ part_set_signal( p, D[i], 0, 0 );
+}
+
+static void
+setup_data( bus_t *bus, uint32_t d, component_t *comp )
+{
+ int i;
+ part_t *p = PART;
+ int width;
+
+ width = detect_data_width( comp );
+
+ for (i = 0; i < width; i++)
+ part_set_signal( p, D[i], 1, (d >> i) & 1 );
+}
+
+static uint8_t
+eeprom_shift_byte( chain_t *chain, part_t *p, component_t *comp, uint8_t byte )
+{
+ int pos;
+ uint8_t so_data = 0x00;
+
+ for (pos = 7; pos >= 0; pos--) {
+ /* set clock to 0 */
+ part_set_signal( p, SCK, 1, 0 );
+ /* apply data bit */
+ part_set_signal( p, SI, 1, (byte >> pos) & 0x01 );
+ /* commit signals */
+ chain_shift_data_registers( chain, 1 );
+
+ /* set clock to 1 */
+ part_set_signal( p, SCK, 1, 1 );
+ /* commit signals */
+ chain_shift_data_registers( chain, 1 );
+
+ /* read data on SO that was asserted by device after SCK went 0 */
+ so_data |= (uint8_t) (part_get_signal( p, SO ) << pos);
+ }
+
+ return so_data;
+}
+
+static void
+eeprom_disable_device( chain_t *chain, part_t *p, component_t *comp )
+{
+ /* ensure that SCK is low before disabling device */
+ part_set_signal( p, SCK, 1, 0 );
+ chain_shift_data_registers( chain, 0 );
+
+ /* finally disable device */
+ part_set_signal( p, nCS, 1, 1 );
+ chain_shift_data_registers( chain, 0 );
+}
+
+/**
+ * bus->driver->(*init)
+ *
+ */
+static int
+zefant_xs3_bus_init( bus_t *bus )
+{
+ part_t *p = PART;
+ chain_t *chain = CHAIN;
+ component_t *comp;
+
+ if (tap_state(chain) != Run_Test_Idle) {
+ /* silently skip initialization if TAP isn't in RUNTEST/IDLE state
+ this is required to avoid interfering with detect when initbus
+ is contained in the part description file
+ bus_init() will be called latest by bus_prepare() */
+ return URJTAG_STATUS_OK;
+ }
+
+ /* Preload update registers */
+
+ part_set_instruction( p, "SAMPLE/PRELOAD" );
+ chain_shift_instructions( chain );
+
+ /* FLASH */
+ comp = COMP_FLASH;
+ setup_data( bus, 0, comp );
+ part_set_signal( p, nCS, 1, 1 );
+ part_set_signal( p, nWE, 1, 1 );
+ part_set_signal( p, nOE, 1, 1 );
+ part_set_signal( p, nRP, 1, 1 );
+ part_set_signal( p, nBYTE, 1, 1 );
+ part_set_signal( p, STS, 0, 0 );
+
+ /* RAM0 */
+ comp = COMP_RAM0;
+ setup_data( bus, 0, comp );
+ part_set_signal( p, nCS, 1, 1 );
+ part_set_signal( p, nWE, 1, 1 );
+ part_set_signal( p, nOE, 1, 1 );
+ part_set_signal( p, nLB, 1, 1 );
+ part_set_signal( p, nUB, 1, 1 );
+
+ /* RAM1 */
+ comp = COMP_RAM1;
+ setup_data( bus, 0, comp );
+ part_set_signal( p, nCS, 1, 1 );
+ part_set_signal( p, nWE, 1, 1 );
+ part_set_signal( p, nOE, 1, 1 );
+ part_set_signal( p, nLB, 1, 1 );
+ part_set_signal( p, nUB, 1, 1 );
+
+ /* EEPROM */
+ comp = COMP_EEPROM;
+ part_set_signal(p, SI, 1, 0 );
+ part_set_signal(p, SO, 0, 0 );
+ part_set_signal(p, SCK, 1, 0 );
+ part_set_signal(p, nCS, 1, 1 );
+
+ /* EEPROM Status */
+ comp = COMP_EEPROM_STATUS;
+ part_set_signal(p, SI, 1, 0 );
+ part_set_signal(p, SO, 0, 0 );
+ part_set_signal(p, SCK, 1, 0 );
+ part_set_signal(p, nCS, 1, 1 );
+
+ chain_shift_data_registers( chain, 0 );
+
+ INITIALIZED = 1;
+
+ return URJTAG_STATUS_OK;
+}
+
+static int
+comp_bus_area( bus_t *bus, uint32_t adr, bus_area_t *area, component_t **comp )
+{
+ if (adr < RAM0_START) {
+ area->description = "FLASH Component";
+ area->start = FLASH_START;
+ area->length = FLASH_LENGTH;
+ area->width = FLASH_DATA_WIDTH;
+ *comp = COMP_FLASH;
+ } else if (adr < RAM1_START) {
+ area->description = "SO-DIMM RAM0 Component";
+ area->start = RAM0_START;
+ area->length = RAM_LENGTH;
+ area->width = RAM_DATA_WIDTH;
+ *comp = COMP_RAM0;
+ } else if (adr < EEPROM_START) {
+ area->description = "SO-DIMM RAM1 Component";
+ area->start = RAM1_START;
+ area->length = RAM_LENGTH;
+ area->width = RAM_DATA_WIDTH;
+ *comp = COMP_RAM1;
+ } else if (adr < EEPROM_STATUS_START) {
+ area->description = "EEPROM Component";
+ area->start = EEPROM_START;
+ area->length = EEPROM_LENGTH;
+ area->width = EEPROM_DATA_WIDTH;
+ *comp = COMP_EEPROM;
+ } else if (adr < EEPROM_STATUS_START + EEPROM_STATUS) {
+ area->description = "EEPROM Component Status";
+ area->start = EEPROM_STATUS_START;
+ area->length = EEPROM_LENGTH;
+ area->width = EEPROM_DATA_WIDTH;
+ *comp = COMP_EEPROM_STATUS;
+ } else {
+ area->description = "Dummy";
+ area->start = FLASH_LENGTH + 2*RAM_LENGTH +2* EEPROM_LENGTH;
+ area->length = UINT64_C(0x100000000);
+ area->width = 0;
+ *comp = NULL;
+ }
+
+ return URJTAG_STATUS_OK;
+}
+
+/**
+ * bus->driver->(*area)
+ *
+ */
+static int
+zefant_xs3_bus_area( bus_t *bus, uint32_t adr, bus_area_t *area )
+{
+ component_t *comp;
+
+ return comp_bus_area( bus, adr, area, &comp );
+}
+
+/**
+ * bus->driver->(*read_start)
+ *
+ */
+static void
+zefant_xs3_bus_read_start( bus_t *bus, uint32_t adr )
+{
+ part_t *p = PART;
+ chain_t *chain = CHAIN;
+ bus_area_t area;
+ component_t *comp;
+ uint8_t cmd = EEPROM_CMD_READ;
+
+ comp_bus_area( bus, adr, &area, &comp );
+ if (!comp) {
+ printf( _("Address out of range\n") );
+ LAST_ADDR = adr;
+ return;
+ }
+
+ /* determine proper address setup strategy for component */
+ switch (comp->ctype) {
+ case FLASH:
+ case RAM:
+ part_set_signal( p, nCS, 1, 0 );
+ part_set_signal( p, nWE, 1, 1 );
+ part_set_signal( p, nOE, 1, 0 );
+ if (comp->ctype == RAM) {
+ part_set_signal( p, nLB, 1, 0 );
+ part_set_signal( p, nUB, 1, 0 );
+ }
+
+ setup_address( bus, adr, comp );
+ set_data_in( bus, comp );
+
+ chain_shift_data_registers( chain, 0 );
+
+ break;
+
+ case EEPROM_STATUS:
+ cmd = EEPROM_CMD_RDSR;
+ /* fall through */
+ case EEPROM:
+ /* enable device */
+ part_set_signal( p, nCS, 1, 0 );
+
+ /* shift command */
+ eeprom_shift_byte( chain, p, comp, cmd );
+
+ if (comp->ctype == EEPROM) {
+ /* send address high part */
+ eeprom_shift_byte( chain, p, comp, (adr >> 8) & 0xff);
+ /* send address low part */
+ eeprom_shift_byte( chain, p, comp, adr & 0xff);
+ }
+
+ LAST_ADDR = adr;
+ break;
+
+ default:
+ printf( _("Component type not supported\n") );
+ break;
+ }
+
+}
+
+/**
+ * bus->driver->(*read_next)
+ *
+ */
+static uint32_t
+zefant_xs3_bus_read_next( bus_t *bus, uint32_t adr )
+{
+ part_t *p = PART;
+ chain_t *chain = CHAIN;
+ int i;
+ uint32_t d = 0;
+ bus_area_t area;
+ component_t *comp;
+
+ comp_bus_area( bus, adr, &area, &comp );
+ if (!comp) {
+ printf( _("Address out of range\n") );
+ LAST_ADDR = adr;
+ return 0;
+ }
+
+ /* determine proper read strategy for component */
+ switch (comp->ctype) {
+ case FLASH:
+ case RAM:
+ setup_address( bus, adr, comp );
+ chain_shift_data_registers( chain, 1 );
+
+ for (i = 0; i < area.width; i++)
+ d |= (uint32_t) (part_get_signal( p, D[i] ) << i);
+
+ break;
+
+ case EEPROM_STATUS:
+ case EEPROM:
+ /* read next byte */
+ d = (uint32_t)eeprom_shift_byte( chain, p, comp, 0x00 );
+ break;
+
+ default:
+ printf( _("Component type not supported\n") );
+ break;
+ }
+
+ return d;
+}
+
+/**
+ * bus->driver->(*read_end)
+ *
+ */
+static uint32_t
+zefant_xs3_bus_read_end( bus_t *bus )
+{
+ part_t *p = PART;
+ chain_t *chain = CHAIN;
+ int i;
+ uint32_t d = 0;
+ bus_area_t area;
+ component_t *comp;
+
+ /* use last address of access to determine component */
+ comp_bus_area( bus, LAST_ADDR, &area, &comp );
+ if (!comp) {
+ printf( _("Address out of range\n") );
+ return 0;
+ }
+
+ /* determine proper read strategy for component */
+ switch (comp->ctype) {
+ case FLASH:
+ case RAM:
+ part_set_signal( p, nCS, 1, 1 );
+ part_set_signal( p, nOE, 1, 1 );
+ if (comp->ctype == RAM) {
+ part_set_signal( p, nLB, 1, 1 );
+ part_set_signal( p, nUB, 1, 1 );
+ }
+ chain_shift_data_registers( chain, 1 );
+
+ for (i = 0; i < area.width; i++)
+ d |= (uint32_t) (part_get_signal( p, D[i] ) << i);
+
+ break;
+
+ case EEPROM_STATUS:
+ case EEPROM:
+ /* read final byte */
+ d = (uint32_t)eeprom_shift_byte( chain, p, comp, 0x00 );
+ eeprom_disable_device( chain, p, comp );
+
+ break;
+
+ default:
+ printf( _("Component type not supported\n") );
+ break;
+ }
+
+ return d;
+}
+
+/**
+ * bus->driver->(*write)
+ *
+ */
+static void
+zefant_xs3_bus_write( bus_t *bus, uint32_t adr, uint32_t data )
+{
+ part_t *p = PART;
+ chain_t *chain = CHAIN;
+ bus_area_t area;
+ component_t *comp;
+ uint8_t cmd = EEPROM_CMD_WRITE;
+
+ comp_bus_area( bus, adr, &area, &comp );
+ if (!comp) {
+ printf( _("Address out of range\n") );
+ return;
+ }
+
+ switch (comp->ctype) {
+ case FLASH:
+ case RAM:
+ part_set_signal( p, nCS, 1, 0 );
+ part_set_signal( p, nWE, 1, 1 );
+ part_set_signal( p, nOE, 1, 1 );
+ if (comp->ctype == RAM) {
+ part_set_signal( p, nLB, 1, 0 );
+ part_set_signal( p, nUB, 1, 0 );
+ }
+
+ setup_address( bus, adr, comp );
+ setup_data( bus, data, comp );
+
+ chain_shift_data_registers( chain, 0 );
+
+ part_set_signal( p, nWE, 1, 0 );
+ chain_shift_data_registers( chain, 0 );
+ part_set_signal( p, nWE, 1, 1 );
+ part_set_signal( p, nCS, 1, 1 );
+ if (comp->ctype == RAM) {
+ part_set_signal( p, nLB, 1, 1 );
+ part_set_signal( p, nUB, 1, 1 );
+ }
+ chain_shift_data_registers( chain, 0 );
+
+ break;
+
+ case EEPROM_STATUS:
+ cmd = EEPROM_CMD_WRSR;
+ /* fall through */
+ case EEPROM:
+ /*
+ * Step 1:
+ * Poll status register and ensure that device is ready.
+ */
+ part_set_signal( p, nCS, 1, 0 );
+
+ /* poll status register for nRDY */
+ do {
+ eeprom_shift_byte( chain, p, comp, EEPROM_CMD_RDSR );
+ } while (eeprom_shift_byte( chain, p, comp, 0x00) & 0x01);
+
+ eeprom_disable_device( chain, p, comp );
+
+
+ /*
+ * Step 2:
+ * Enable writing.
+ */
+ part_set_signal( p, nCS, 1, 0 );
+
+ /* enable writing */
+ eeprom_shift_byte( chain, p, comp, EEPROM_CMD_WREN );
+
+ eeprom_disable_device( chain, p, comp );
+
+
+ /*
+ * Step 3:
+ * Write data to device.
+ */
+ part_set_signal( p, nCS, 1, 0 );
+
+ /* send command
+ command code has been determined by component type */
+ eeprom_shift_byte( chain, p, comp, cmd );
+
+ if (comp->ctype == EEPROM) {
+ /* send address high part */
+ eeprom_shift_byte( chain, p, comp, (adr >> 8) & 0xff);
+ /* send address low part */
+ eeprom_shift_byte( chain, p, comp, adr & 0xff);
+ }
+
+ /* send data to be written */
+ eeprom_shift_byte( chain, p, comp, (uint8_t)(data & 0xff) );
+
+ eeprom_disable_device( chain, p, comp );
+
+ break;
+
+ default:
+ printf( _("Component type not supported\n") );
+ break;
+ }
+}
+
+const bus_driver_t zefant_xs3_bus = {
+ "zefant-xs3",
+ N_("Simple Solutions Zefant-XS3 Board compatible bus driver via BSR"),
+ zefant_xs3_bus_new,
+ generic_bus_free,
+ zefant_xs3_bus_printinfo,
+ generic_bus_prepare_extest,
+ zefant_xs3_bus_area,
+ zefant_xs3_bus_read_start,
+ zefant_xs3_bus_read_next,
+ zefant_xs3_bus_read_end,
+ generic_bus_read,
+ zefant_xs3_bus_write,
+ zefant_xs3_bus_init
+};
+
+
+/*
+ Local Variables:
+ mode:C
+ tab-width:2
+ indent-tabs-mode:t
+ End:
+*/
--- /dev/null
+.deps
+Makefile
+Makefile.in
--- /dev/null
+#
+# $Id$
+#
+# Copyright (C) 2003 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Marcel Telka <marcel@telka.sk>, 2003.
+#
+
+include $(top_srcdir)/Makefile.rules
+
+noinst_LIBRARIES = libcmd.a
+
+libcmd_a_SOURCES = \
+ frequency.c \
+ cable.c \
+ reset.c \
+ discovery.c \
+ idcode.c \
+ detect.c \
+ detectflash.c \
+ help.c \
+ quit.c \
+ scan.c \
+ signal.c \
+ salias.c \
+ bit.c \
+ register.c \
+ initbus.c \
+ print.c \
+ part.c \
+ bus.c \
+ instruction.c \
+ shift.c \
+ dr.c \
+ get.c \
+ test.c \
+ debug.c \
+ shell.c \
+ set.c \
+ endian.c \
+ parse.c \
+ peekpoke.c \
+ pod.c \
+ readmem.c \
+ writemem.c \
+ flashmem.c \
+ eraseflash.c \
+ include.c \
+ addpart.c \
+ cmd.c \
+ usleep.c \
+ jtag_data_dir.c
+
+if ENABLE_SVF
+libcmd_a_SOURCES += svf.c
+endif
+
+if ENABLE_BSDL
+libcmd_a_SOURCES += bsdl.c
+endif
+
+AM_CPPFLAGS = -DJTAG_BIN_DIR=\"$(bindir)\" -DJTAG_DATA_DIR=\"$(pkgdatadir)\"
--- /dev/null
+/*
+ * $Id$
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Ville Voipio <ville.voipio@iki.fi>, 2008.
+ *
+ */
+
+#include "sysdep.h"
+
+#include <stdio.h>
+#include <string.h>
+
+#include "jtag.h"
+#include "chain.h"
+#include "bus.h"
+
+#include "cmd.h"
+
+static int
+cmd_addpart_run( chain_t *chain, char *params[] )
+{
+ unsigned int len;
+
+ if (cmd_params( params ) != 2)
+ return -1;
+
+ if (cmd_get_number( params[1], &len ))
+ return -1;
+
+ if (!cmd_test_cable( chain ))
+ return 1;
+
+ manual_add( chain, len );
+
+ if (chain->parts == NULL)
+ return 1;
+
+ if (chain->parts->len == 0) {
+ parts_free( chain->parts );
+ chain->parts = NULL;
+ }
+
+ parts_set_instruction(chain->parts, "BYPASS");
+ chain_shift_instructions(chain);
+
+ return 1;
+}
+
+
+static void
+cmd_addpart_help( void )
+{
+ printf( _(
+ "Usage: %s IRLENGTH\n"
+ "Manually add a part to the end of the chain.\n"
+ "\n"
+ "IRLENGTH instruction register length\n"
+ ), "addpart" );
+}
+
+
+cmd_t cmd_addpart = {
+ "addpart",
+ N_("manually adds parts on the JTAG chain"),
+ cmd_addpart_help,
+ cmd_addpart_run
+};
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2003 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2003.
+ *
+ */
+
+#include "sysdep.h"
+
+#include <stdio.h>
+#include <string.h>
+
+#include "jtag.h"
+
+#include "cmd.h"
+
+static void
+cmd_bit_print_params( char *params[], unsigned int parameters, char *command )
+{
+ unsigned int i;
+
+ strcpy(command, params[0]);
+ for (i=1; i<parameters; i++) {
+ strcat(command, " ");
+ strcat(command, params[i]);
+ }
+}
+
+static int
+cmd_bit_run( chain_t *chain, char *params[] )
+{
+ part_t *part;
+ data_register *bsr;
+ unsigned int bit;
+ int type;
+ int safe;
+ unsigned int control;
+ unsigned int parameters = cmd_params( params );
+ char command[1024];
+
+ cmd_bit_print_params(params, parameters, command);
+
+ if ((parameters != 5) && (parameters != 8)) {
+ printf( _("%s: invalid number of parameters (%d) for command '%s'\n"), "bit", parameters, command );
+ return -1;
+ }
+
+ if (!cmd_test_cable( chain )) {
+ printf( _("%s: cable test failed for command '%s'\n"), "bit", command);
+ return 1;
+ }
+
+ if (!chain->parts) {
+ printf( _("Run \"detect\" first.\n") );
+ return 1;
+ }
+
+ if (chain->active_part >= chain->parts->len) {
+ printf( _("%s: no active part\n"), "bit" );
+ return 1;
+ }
+
+ part = chain->parts->parts[chain->active_part];
+ bsr = part_find_data_register( part, "BSR" );
+ if (bsr == NULL) {
+ printf( _("%s: missing Boundary Scan Register (BSR) for command '%s'\n"), "bit", command );
+ return 1;
+ }
+
+ /* bit number */
+ if (cmd_get_number( params[1], &bit )) {
+ printf( _("%s: unable to get boundary bit number for command '%s'\n"), "bit", command );
+ return -1;
+ }
+
+ if (bit >= bsr->in->len) {
+ printf( _("%s: invalid boundary bit number for command '%s'\n"), "bit", command );
+ return 1;
+ }
+ if (part->bsbits[bit] != NULL) {
+ printf( _("%s: duplicate bit declaration for command '%s'\n"), "bit", command );
+ return 1;
+ }
+
+ /* bit type */
+ if (strlen( params[2] ) != 1) {
+ printf( _("%s: invalid bit type length for command '%s'\n"), "bit", command );
+ return -1;
+ }
+ switch (params[2][0]) {
+ case 'I':
+ case 'i':
+ type = BSBIT_INPUT;
+ break;
+ case 'O':
+ case 'o':
+ type = BSBIT_OUTPUT;
+ break;
+ case 'B':
+ case 'b':
+ type = BSBIT_BIDIR;
+ break;
+ case 'C':
+ case 'c':
+ type = BSBIT_CONTROL;
+ break;
+ case 'X':
+ case 'x':
+ type = BSBIT_INTERNAL;
+ break;
+ default:
+ printf( _("%s: invalid bit type for command '%s'\n"), "bit", command );
+ return -1;
+ }
+
+ /* default (safe) value */
+ if (strlen( params[3] ) != 1) {
+ printf( _("%s: invalid default value length for command '%s'\n"), "bit", command );
+ return -1;
+ }
+
+ safe = (params[3][0] == '1') ? 1 : 0;
+ bsr->in->data[bit] = safe;
+
+ /* allocate bsbit */
+ part->bsbits[bit] = bsbit_alloc( bit, params[4], type, part_find_signal( part, params[4] ), safe );
+ if (part->bsbits[bit] == NULL) {
+ printf( _("%s: out of memory for command '%s'\n"), "bit", command );
+ return 1;
+ }
+
+ /* test for control bit */
+ if (cmd_params( params ) == 5)
+ return 1;
+
+ /* control bit number */
+ if (cmd_get_number( params[5], &control )) {
+ printf( _("%s: unable to get control bit number for command '%s'\n"), "bit", command );
+ return -1;
+ }
+ if (control >= bsr->in->len) {
+ printf( _("%s: invalid control bit number for command '%s'\n"), "bit", command );
+ return 1;
+ }
+ part->bsbits[bit]->control = control;
+
+ /* control value */
+ if (strlen( params[6] ) != 1) {
+ printf( _("%s: invalid control value length for command '%s'\n"), "bit", command );
+ return -1;
+ }
+ part->bsbits[bit]->control_value = (params[6][0] == '1') ? 1 : 0;
+
+ /* control state */
+ if (strcasecmp(params[7], "Z"))
+ return -1;
+
+ part->bsbits[bit]->control_state = BSBIT_STATE_Z;
+
+ return 1;
+}
+
+static void
+cmd_bit_help( void )
+{
+ printf( _(
+ "Usage: %s NUMBER TYPE DEFAULT SIGNAL [CBIT CVAL CSTATE]\n"
+ "Define new BSR (Boundary Scan Register) bit for SIGNAL, with\n"
+ "DEFAULT value.\n"
+ "\n"
+ "NUMBER Bit number in the BSR\n"
+ "TYPE Bit type, valid values are I, O, B, C, and X\n"
+ "DEFAULT Default (safe) bit value, valid values are 1, 0, ?\n"
+ "SIGNAL Associated signal name\n"
+ "CBIT Control bit number\n"
+ "CVAL Control value\n"
+ "CSTATE Control state, valid state is only Z\n"
+ ), "bit" );
+}
+
+cmd_t cmd_bit = {
+ "bit",
+ N_("define new BSR bit"),
+ cmd_bit_help,
+ cmd_bit_run
+};
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2007, Arnim Laeuger
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Arnim Laeuger <arniml@users.sourceforge.net>, 2007.
+ *
+ */
+
+
+#include "sysdep.h"
+
+#include <stdio.h>
+#include <string.h>
+
+#include "bsdl.h"
+#include "chain.h"
+#include "cmd.h"
+
+static int
+cmd_bsdl_run( chain_t *chain, char *params[] )
+{
+ int num_params, result = -1;
+ bsdl_globs_t *globs = &(chain->bsdl);
+
+ num_params = cmd_params(params);
+ if (num_params >= 2) {
+ if (strcmp(params[1], "test") == 0) {
+ int debug_save;
+
+ debug_save = globs->debug;
+ globs->debug = 1;
+ if (num_params == 3) {
+ result = bsdl_read_file(chain, params[2], BSDL_MODE_TEST, NULL) >= 0 ? 1 : -1;
+ } else if (num_params == 2) {
+ bsdl_scan_files(chain, NULL, BSDL_MODE_TEST);
+ result = 1;
+ }
+ globs->debug = debug_save;
+ }
+
+ if (strcmp(params[1], "dump") == 0) {
+ if (num_params == 3) {
+ result = bsdl_read_file(chain, params[2], BSDL_MODE_DUMP, NULL) >= 0 ? 1 : -1;
+ } else if (num_params == 2) {
+ bsdl_scan_files(chain, NULL, BSDL_MODE_DUMP);
+ result = 1;
+ }
+ }
+
+ if (num_params == 3) {
+ if (strcmp(params[1], "path") == 0) {
+ bsdl_set_path(chain, params[2]);
+ result = 1;
+ }
+
+ if (strcmp(params[1], "debug") == 0) {
+ if (strcmp(params[2], "on") == 0) {
+ globs->debug = 1;
+ result = 1;
+ }
+ if (strcmp(params[2], "off") == 0) {
+ globs->debug = 0;
+ result = 1;
+ }
+ }
+ }
+ }
+
+ return result;
+}
+
+
+static void
+cmd_bsdl_help( void )
+{
+ printf( _(
+ "Usage: %s path PATHLIST\n"
+ "Usage: %s test [FILE]\n"
+ "Usage: %s dump [FILE]\n"
+ "Usage: %s debug on|off\n"
+ "Manage BSDL files\n"
+ "\n"
+ "PATHLIST semicolon separated list of directory paths to search for BSDL files\n"
+ "FILE file containing part description in BSDL format\n"
+ ), "bsdl", "bsdl", "bsdl", "bsdl" );
+}
+
+cmd_t cmd_bsdl = {
+ "bsdl",
+ N_("manage BSDL files"),
+ cmd_bsdl_help,
+ cmd_bsdl_run
+};
+
+
+/* Emacs specific variables
+;;; Local Variables: ***
+;;; indent-tabs-mode:t ***
+;;; tab-width:2 ***
+;;; End: ***
+*/
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2003 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2003.
+ *
+ */
+
+#include "sysdep.h"
+
+#include <stdio.h>
+#include <string.h>
+
+#include "jtag.h"
+
+#include "cmd.h"
+
+static int
+cmd_bus_run( chain_t *chain, char *params[] )
+{
+ unsigned int n;
+
+ if (cmd_params( params ) != 2)
+ return -1;
+
+ if (!cmd_test_cable( chain ))
+ return 1;
+
+ if (!chain->parts) {
+ printf( _("Run \"detect\" first.\n") );
+ return 1;
+ }
+
+ if (cmd_get_number( params[1], &n ))
+ return -1;
+
+ if (n >= buses.len) {
+ printf( _("%s: invalid bus number\n"), "bus" );
+ return 1;
+ }
+
+ bus = buses.buses[n];
+
+ return 1;
+}
+
+static void
+cmd_bus_help( void )
+{
+ printf( _(
+ "Usage: %s BUS\n"
+ "Change active bus.\n"
+ "\n"
+ "BUS bus number\n"
+ ), "bus" );
+}
+
+cmd_t cmd_bus = {
+ "bus",
+ N_("change active bus"),
+ cmd_bus_help,
+ cmd_bus_run
+};
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2003 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2003.
+ *
+ */
+
+#include "sysdep.h"
+
+#include <stdio.h>
+#include <string.h>
+#include <stdlib.h>
+
+#include "parport.h"
+#include "tap.h"
+#include "cable.h"
+#include "chain.h"
+#include "jtag.h"
+#include "bus.h"
+
+#include "cmd.h"
+
+static int
+cmd_cable_run( chain_t *chain, char *params[] )
+{
+ cable_t *cable;
+ int i;
+ int paramc = cmd_params( params );
+
+ /* we need at least one parameter for 'cable' command */
+ if (paramc < 2) return -1;
+
+ /* maybe old syntax was used? search connection type driver */
+ for (i = 0; parport_drivers[i]; i++)
+ if (strcasecmp( params[1], parport_drivers[i]->type ) == 0)
+ break;
+
+ if (parport_drivers[i] != 0)
+ {
+ /* Old syntax was used. Swap params. */
+ printf( _("Note: the 'cable' command syntax changed, please read the help text\n") );
+ if (paramc >= 4)
+ {
+ char *tmparam;
+ tmparam = params[3];
+ params[3] = params[2];
+ params[2] = params[1];
+ params[1] = tmparam;
+ }
+ else
+ return -1;
+ }
+
+ /* search cable driver list */
+ for (i = 0; cable_drivers[i]; i++)
+ if (strcasecmp( params[1], cable_drivers[i]->name ) == 0)
+ break;
+ if (!cable_drivers[i]) {
+ printf( _("Unknown cable type: %s\n"), params[1] );
+ return 1;
+ }
+
+ if (paramc >= 3)
+ {
+ if (strcasecmp( params[2], "help" ) == 0)
+ {
+ cable_drivers[i]->help(cable_drivers[i]->name);
+ return 1;
+ }
+ }
+
+ if (bus) {
+ bus_free( bus );
+ bus = NULL;
+ }
+
+ chain_disconnect( chain );
+
+ cable = calloc(1, sizeof(cable_t) );
+ if (!cable) {
+ printf( _("%s(%d) malloc failed!\n"), __FILE__, __LINE__);
+ return 1;
+ }
+
+ cable->driver = cable_drivers[i];
+
+ if ( cable->driver->connect( ++params, cable ) ) {
+ printf( _("Error: Cable connection failed!\n") );
+ free( cable );
+ return 1;
+ }
+
+ chain->cable = cable;
+
+ if (cable_init( chain->cable )) {
+ printf( _("Error: Cable initialization failed!\n") );
+ chain_disconnect( chain );
+ return 1;
+ }
+ chain_set_trst( chain, 0 );
+ chain_set_trst( chain, 1 );
+ tap_reset( chain );
+
+ return 1;
+}
+
+static void
+cmd_cable_help( void )
+{
+ int i;
+
+ printf( _(
+ "Usage: %s DRIVER [DRIVER_OPTS]\n"
+ "Select JTAG cable type.\n"
+ "\n"
+ "DRIVER name of cable\n"
+ "DRIVER_OPTS options for the selected cable\n"
+ "\n"
+ "Type \"cable DRIVER help\" for info about options for cable DRIVER.\n"
+ "\n"
+ "List of supported cables:\n"
+ ), "cable" );
+
+ for (i = 0; cable_drivers[i]; i++)
+ printf( _("%-13s %s\n"), cable_drivers[i]->name, _(cable_drivers[i]->description) );
+}
+
+cmd_t cmd_cable = {
+ "cable",
+ N_("select JTAG cable"),
+ cmd_cable_help,
+ cmd_cable_run
+};
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2002, 2003 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2002, 2003.
+ *
+ */
+
+#include "sysdep.h"
+
+#include <stdio.h>
+#include <string.h>
+#ifdef HAVE_LIBREADLINE
+#include <readline/readline.h>
+#endif
+
+#include "jtag.h"
+
+#include "cmd.h"
+
+extern cmd_t cmd_quit;
+extern cmd_t cmd_help;
+extern cmd_t cmd_frequency;
+extern cmd_t cmd_cable;
+extern cmd_t cmd_reset;
+extern cmd_t cmd_discovery;
+extern cmd_t cmd_idcode;
+extern cmd_t cmd_detect;
+extern cmd_t cmd_signal;
+extern cmd_t cmd_scan;
+extern const cmd_t cmd_salias;
+extern cmd_t cmd_bit;
+extern cmd_t cmd_register;
+extern const cmd_t cmd_initbus;
+extern cmd_t cmd_print;
+extern cmd_t cmd_part;
+extern cmd_t cmd_bus;
+extern cmd_t cmd_instruction;
+extern cmd_t cmd_shift;
+extern cmd_t cmd_dr;
+extern cmd_t cmd_get;
+extern cmd_t cmd_test;
+extern cmd_t cmd_shell;
+extern cmd_t cmd_set;
+extern cmd_t cmd_endian;
+extern cmd_t cmd_peek;
+extern cmd_t cmd_poke;
+extern cmd_t cmd_pod;
+extern cmd_t cmd_readmem;
+extern cmd_t cmd_writemem;
+extern cmd_t cmd_detectflash;
+extern cmd_t cmd_flashmem;
+extern cmd_t cmd_eraseflash;
+extern cmd_t cmd_script;
+extern cmd_t cmd_include;
+extern cmd_t cmd_addpart;
+extern cmd_t cmd_usleep;
+#ifdef ENABLE_SVF
+extern cmd_t cmd_svf;
+#endif
+#ifdef ENABLE_BSDL
+extern cmd_t cmd_bsdl;
+#endif
+extern cmd_t cmd_debug;
+
+const cmd_t *cmds[] = {
+ &cmd_quit,
+ &cmd_help,
+ &cmd_frequency,
+ &cmd_cable,
+ &cmd_reset,
+ &cmd_discovery,
+ &cmd_idcode,
+ &cmd_detect,
+ &cmd_signal,
+ &cmd_scan,
+ &cmd_salias,
+ &cmd_bit,
+ &cmd_register,
+ &cmd_initbus,
+ &cmd_print,
+ &cmd_part,
+ &cmd_bus,
+ &cmd_instruction,
+ &cmd_shift,
+ &cmd_dr,
+ &cmd_get,
+ &cmd_test,
+ &cmd_shell,
+ &cmd_set,
+ &cmd_endian,
+ &cmd_peek,
+ &cmd_poke,
+ &cmd_pod,
+ &cmd_readmem,
+ &cmd_writemem,
+ &cmd_detectflash,
+ &cmd_flashmem,
+ &cmd_eraseflash,
+ &cmd_script,
+ &cmd_include,
+ &cmd_addpart,
+ &cmd_usleep,
+#ifdef ENABLE_SVF
+ &cmd_svf,
+#endif
+#ifdef ENABLE_BSDL
+ &cmd_bsdl,
+#endif
+ &cmd_debug,
+ NULL /* last must be NULL */
+};
+
+#ifdef HAVE_LIBREADLINE
+static char *
+cmd_find_next( const char *text, int state )
+{
+ static size_t cmd_idx, len;
+
+ if (!state) {
+ cmd_idx = 0;
+ len = strlen(text);
+ }
+
+ while (cmds[cmd_idx]) {
+ char *name = cmds[cmd_idx++]->name;
+ if (!strncmp(name, text, len))
+ return strdup(name);
+ }
+
+ return NULL;
+}
+
+#ifdef HAVE_READLINE_COMPLETION
+char **
+cmd_completion( const char *text, int start, int end )
+{
+ char **ret = NULL;
+
+ if (start == 0)
+ ret = rl_completion_matches(text, cmd_find_next);
+
+ return ret;
+}
+#endif
+#endif
+
+int
+cmd_test_cable( chain_t *chain )
+{
+ if (chain->cable)
+ return 1;
+
+ printf( _("Error: Cable not configured. Please use '%s' command first!\n"), "cable" );
+ return 0;
+}
+
+/* Remainder copied from libbrux/cmd/cmd.c */
+
+int
+cmd_run( chain_t *chain, char *params[] )
+{
+ int i, pidx;
+ size_t len;
+
+ if (!params[0])
+ return 1;
+
+ pidx = -1;
+ len = strlen(params[0]);
+
+ for (i = 0; cmds[i]; ++i) {
+ if (strcasecmp( cmds[i]->name, params[0] ) == 0) {
+ int r;
+ run_cmd:
+ r = cmds[i]->run( chain, params );
+ if (r < 0)
+ printf( _("%s: syntax error!\n"), params[0] );
+ return r;
+ } else if (strncasecmp( cmds[i]->name, params[0], len ) == 0) {
+ if (pidx == -1)
+ pidx = i;
+ else
+ pidx = -2;
+ }
+ }
+
+ switch (pidx) {
+ case -2: printf( _("%s: Ambiguous command\n"), params[0] ); break;
+ case -1: printf( _("%s: unknown command\n"), params[0] ); break;
+ default: i = pidx; goto run_cmd;
+ }
+
+ return 1;
+}
+
+int
+cmd_params( char *params[] )
+{
+ int i = 0;
+
+ while (params[i])
+ i++;
+
+ return i;
+}
+
+int
+cmd_get_number( char *s, unsigned int *i )
+{
+ int n;
+ int r;
+ size_t l;
+
+ if (!s || !i)
+ return -1;
+
+ l = strlen( s );
+
+ n = -1;
+ r = sscanf( s, "0x%x%n", i, &n);
+ if (r == 1 && n == l)
+ return 0;
+
+ n = -1;
+ r = sscanf( s, "%u%n", i, &n );
+ if (r == 1 && n == l)
+ return 0;
+
+ return -1;
+}
--- /dev/null
+/*
+ * $Id: debug.c,v 1.0 2005/10/10 00:00:0 DJF $
+ *
+ * Copyright (C) 2005 Protoparts
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by David Farrell, 2005
+ * based on templates by and portions Written by Marcel Telka <marcel@telka.sk>, 2003.i
+ *
+ */
+
+#include "sysdep.h"
+
+#include <stdio.h>
+#include <string.h>
+//#include <stdlib.h>
+//#include "part.h"
+//#include "bssignal.h"
+#include "jtag.h"
+
+#include "cmd.h"
+
+static int
+cmd_debug_run( chain_t *chain, char *params[] )
+{
+ unsigned int i;
+
+ if (cmd_params( params ) != 2)
+ return -1;
+
+ if (cmd_get_number( params[1], &i ))
+ return 1;
+
+ debug_mode = i;
+ return 1;
+}
+
+static void
+cmd_debug_help( void )
+{
+ printf( _(
+ "Usage: %s n\n"
+ "Enabled debugging.\n"
+ "\n"
+ "n =1 fileio, 2=tap commands, 4 =?\n"
+ ), "debug n" );
+}
+
+cmd_t cmd_debug = {
+ "debug",
+ N_("debug jtag program"),
+ cmd_debug_help,
+ cmd_debug_run
+};
+
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2003 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2003.
+ *
+ */
+
+#include "sysdep.h"
+
+#include <stdio.h>
+#include <string.h>
+
+#include "jtag.h"
+#include "chain.h"
+#include "bus.h"
+
+#include "cmd.h"
+
+static int
+cmd_detect_run( chain_t *chain, char *params[] )
+{
+ int i;
+ bus_t * abus;
+
+ if (cmd_params( params ) != 1)
+ return -1;
+
+ if (!cmd_test_cable( chain ))
+ return 1;
+
+ buses_free();
+ parts_free( chain->parts );
+ chain->parts = NULL;
+ detect_parts( chain, jtag_get_data_dir() );
+ if (!chain->parts)
+ return 1;
+ if (!chain->parts->len) {
+ parts_free( chain->parts );
+ chain->parts = NULL;
+ return 1;
+ }
+ parts_set_instruction( chain->parts, "SAMPLE/PRELOAD" );
+ chain_shift_instructions( chain );
+ chain_shift_data_registers( chain, 1 );
+ parts_set_instruction( chain->parts, "BYPASS" );
+ chain_shift_instructions( chain );
+
+ // Initialize all the buses
+ for (i = 0; i < buses.len; i++)
+ {
+ abus = buses.buses[i];
+ if(abus->driver->init)
+ {
+ if(abus->driver->init(abus) != URJTAG_STATUS_OK)
+ return -1;
+ }
+ }
+
+ return 1;
+}
+
+static void
+cmd_detect_help( void )
+{
+ printf( _(
+ "Usage: %s\n"
+ "Detect parts on the JTAG chain.\n"
+ "\n"
+ "Output from this command is a list of the detected parts.\n"
+ "If no parts are detected other commands may not work properly.\n"
+ ), "detect" );
+}
+
+cmd_t cmd_detect = {
+ "detect",
+ N_("detect parts on the JTAG chain"),
+ cmd_detect_help,
+ cmd_detect_run
+};
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2003 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2003.
+ *
+ */
+
+#include "sysdep.h"
+
+#include <stdio.h>
+
+#include <flash.h>
+#include <cmd.h>
+
+static int
+cmd_detectflash_run( chain_t *chain, char *params[] )
+{
+ uint32_t adr;
+
+ if (cmd_params( params ) != 2)
+ return -1;
+
+ if (!bus) {
+ printf( _("Error: Bus driver missing.\n") );
+ return 1;
+ }
+
+ if (cmd_get_number( params[1], &adr ))
+ return -1;
+
+ detectflash( bus, adr );
+
+ return 1;
+}
+
+static void
+cmd_detectflash_help( void )
+{
+ printf( _(
+ "Usage: %s ADDRESS\n"
+ "Detect flash memory type connected to a part.\n"
+ "\n"
+ "ADDRESS Base address for memory region\n"
+ ), "detectflash" );
+}
+
+cmd_t cmd_detectflash = {
+ "detectflash",
+ N_("detect parameters of flash chips attached to a part"),
+ cmd_detectflash_help,
+ cmd_detectflash_run
+};
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2003 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2003.
+ *
+ */
+
+#include "sysdep.h"
+
+#include <stdio.h>
+
+#include "jtag.h"
+
+#include "cmd.h"
+
+static int
+cmd_discovery_run( chain_t *chain, char *params[] )
+{
+ if (cmd_params( params ) != 1)
+ return -1;
+
+ if (!cmd_test_cable( chain ))
+ return 1;
+
+ discovery( chain );
+
+ return 1;
+}
+
+static void
+cmd_discovery_help( void )
+{
+ printf( _(
+ "Usage: %s\n"
+ "Discovery of unknown parts in the JTAG chain.\n"
+ "\n"
+ "'%s' attempts to detect these parameters of an unknown JTAG\n"
+ "chain:\n"
+ " 1. IR (instruction register) length\n"
+ " 2. DR (data register) length for all possible instructions\n"
+ "\n"
+ "Warning: This may be dangerous for some parts (especially if the\n"
+ "part doesn't have TRST signal).\n"
+ ), "discovery", "discovery" );
+}
+
+cmd_t cmd_discovery = {
+ "discovery",
+ N_("discovery of unknown parts in the JTAG chain"),
+ cmd_discovery_help,
+ cmd_discovery_run
+};
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2003 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2003.
+ *
+ */
+
+#include "sysdep.h"
+
+#include <stdio.h>
+#include <string.h>
+
+#include "register.h"
+#include "jtag.h"
+
+#include "cmd.h"
+
+static int
+cmd_dr_run( chain_t *chain, char *params[] )
+{
+ int dir = 1;
+ tap_register *r;
+
+ if (cmd_params( params ) < 1 || cmd_params( params ) > 2)
+ return -1;
+
+ if (!cmd_test_cable( chain ))
+ return 1;
+
+ if (!chain->parts) {
+ printf( _("Run \"detect\" first.\n") );
+ return 1;
+ }
+
+ if (chain->active_part >= chain->parts->len) {
+ printf( _("%s: no active part\n"), "dr" );
+ return 1;
+ }
+
+ if (chain->parts->parts[chain->active_part]->active_instruction == NULL) {
+ printf( _("%s: part without active instruction\n"), "dr" );
+ return 1;
+ }
+ if (chain->parts->parts[chain->active_part]->active_instruction->data_register == NULL) {
+ printf( _("%s: part without active data register\n"), "dr" );
+ return 1;
+ }
+
+ if (params[1]) {
+ if (strcasecmp( params[1], "in" ) == 0)
+ dir = 0;
+ else if (strcasecmp( params[1], "out" ) == 0)
+ dir = 1;
+ else {
+ unsigned int bit;
+ if (strspn(params[1], "01") != strlen(params[1])) {
+ return -1;
+ }
+
+ r = chain->parts->parts[chain->active_part]->active_instruction->data_register->in;
+ if (r->len != strlen(params[1])) {
+ printf( _("%s: register length mismatch\n"), "dr" );
+ return 1;
+ }
+ for (bit = 0; params[1][bit]; bit++) {
+ r->data[r->len - 1 - bit] = (params[1][bit] == '1');
+ }
+
+ dir = 0;
+ }
+ }
+
+ if (dir)
+ r = chain->parts->parts[chain->active_part]->active_instruction->data_register->out;
+ else
+ r = chain->parts->parts[chain->active_part]->active_instruction->data_register->in;
+ printf( _("%s\n"), register_get_string( r ) );
+
+ return 1;
+}
+
+static void
+cmd_dr_help( void )
+{
+ printf( _(
+ "Usage: %s [DIR]\n"
+ "Usage: %s BITSTRING\n"
+ "Display input or output data register content or set current register.\n"
+ "\n"
+ "DIR requested data register; possible values: 'in' for\n"
+ " input and 'out' for output; default is 'out'\n"
+ "BITSTRING set current data register with BITSTRING (e.g. 01010)\n"
+ ), "dr", "dr" );
+}
+
+cmd_t cmd_dr = {
+ "dr",
+ N_("display active data register for a part"),
+ cmd_dr_help,
+ cmd_dr_run
+};
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2003 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2003.
+ *
+ */
+
+#include "sysdep.h"
+
+#include <stdio.h>
+#include <string.h>
+
+#include "jtag.h"
+
+#include "cmd.h"
+
+static int
+cmd_endian_run( chain_t *chain, char *params[] )
+{
+ if (cmd_params( params ) > 2)
+ return -1;
+
+ if (!params[1]) {
+ if (big_endian)
+ printf( _("Endianess for external files: big\n") );
+ else
+ printf( _("Endianess for external files: little\n") );
+ return 1;
+ }
+
+
+ if (strcasecmp( params[1], "little" ) == 0) {
+ big_endian = 0;
+ return 1;
+ }
+ if (strcasecmp( params[1], "big" ) == 0) {
+ big_endian = 1;
+ return 1;
+ }
+
+ return -1;
+}
+
+static void
+cmd_endian_help( void )
+{
+ printf( _(
+ "Usage: %s\n"
+ "Set or print endianess for external files.\n"
+ ), "endian [little|big]" );
+}
+
+cmd_t cmd_endian = {
+ "endian",
+ N_("set/print endianess"),
+ cmd_endian_help,
+ cmd_endian_run
+};
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2003 TF
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Thomas Froehlich <t.froehlich@gmx.at>, 2003.
+ *
+ */
+
+#include "sysdep.h"
+
+#include <stdio.h>
+#include <stdint.h>
+#include <string.h>
+
+#include "jtag.h"
+#include "flash.h"
+
+#include "cmd.h"
+
+static int
+cmd_eraseflash_run( chain_t *chain, char *params[] )
+{
+ uint32_t adr = 0;
+ unsigned int number = 0;
+
+ if (cmd_params( params ) != 3)
+ return -1;
+ if (!cmd_test_cable( chain ))
+ return 1;
+ if (!bus) {
+ printf( _("Error: Bus driver missing.\n") );
+ return 1;
+ }
+ if (cmd_get_number( params[1], &adr ))
+ return -1;
+ if (cmd_get_number( params[2], &number ))
+ return -1;
+ flasherase( bus, adr, number );
+
+ return 1;
+}
+
+static void
+cmd_eraseflash_help( void )
+{
+ int i;
+
+ printf( _(
+ "Usage: %s ADDR BLOCKS\n"
+ "Erase flash memory from ADDR.\n"
+ "\n"
+ "ADDR target addres for erasing block\n"
+ "BLOCKS number of blocks to erase\n"
+ "\n"
+ "ADDR and BLOCKS could be in decimal or hexadecimal (prefixed with 0x) form.\n"
+ "\n"
+ "Supported Flash Memories:\n"
+ ), "eraseflash" );
+
+ for (i = 0; flash_drivers[i]; i++)
+ printf( _("%s\n %s\n"), _(flash_drivers[i]->name), _(flash_drivers[i]->description) );
+}
+
+cmd_t cmd_eraseflash = {
+ "eraseflash",
+ N_("erase flash memory by number of blocks"),
+ cmd_eraseflash_help,
+ cmd_eraseflash_run
+};
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2003 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2003.
+ *
+ */
+
+#include "sysdep.h"
+
+#include <stdio.h>
+#include <stdint.h>
+#include <string.h>
+
+#include "jtag.h"
+#include "flash.h"
+
+#include "cmd.h"
+
+static int
+cmd_flashmem_run( chain_t *chain, char *params[] )
+{
+ int msbin;
+ int noverify = 0;
+ uint32_t adr = 0;
+ FILE *f;
+ int paramc = cmd_params( params );
+
+ if (paramc < 3)
+ return -1;
+
+ if (!bus) {
+ printf( _("Error: Bus driver missing.\n") );
+ return 1;
+ }
+
+ msbin = strcasecmp( "msbin", params[1] ) == 0;
+ if (!msbin && cmd_get_number( params[1], &adr ))
+ return -1;
+
+ if (paramc > 3)
+ noverify = strcasecmp( "noverify", params[3] ) == 0;
+ else
+ noverify = 0;
+
+ f = fopen( params[2], "rb" );
+ if (!f) {
+ printf( _("Unable to open file `%s'!\n"), params[2] );
+ return 1;
+ }
+ if (msbin)
+ flashmsbin( bus, f, noverify );
+ else
+ flashmem( bus, f, adr, noverify );
+ fclose( f );
+
+ return 1;
+}
+
+static void
+cmd_flashmem_help( void )
+{
+ int i;
+
+ printf( _(
+ "Usage: %s ADDR FILENAME [noverify]\n"
+ "Usage: %s FILENAME [noverify]\n"
+ "Program FILENAME content to flash memory.\n"
+ "\n"
+ "ADDR target address for raw binary image\n"
+ "FILENAME name of the input file\n"
+ "%-10s FILENAME is in MS .bin format (for WinCE)\n"
+ "%-10s if specified, verification is skipped\n"
+ "\n"
+ "ADDR could be in decimal or hexadecimal (prefixed with 0x) form.\n"
+ "\n"
+ "Supported Flash Memories:\n"
+ ), "flashmem", "flashmem msbin", "msbin", "noverify" );
+
+ for (i = 0; flash_drivers[i]; i++)
+ printf( _("%s\n %s\n"), _(flash_drivers[i]->name), _(flash_drivers[i]->description) );
+}
+
+cmd_t cmd_flashmem = {
+ "flashmem",
+ N_("burn flash memory with data from a file"),
+ cmd_flashmem_help,
+ cmd_flashmem_run
+};
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2003 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2003.
+ *
+ */
+
+#include "sysdep.h"
+
+#include <stdio.h>
+
+#include "cable.h"
+#include "jtag.h"
+
+#include "cmd.h"
+
+static int
+cmd_frequency_run( chain_t *chain, char *params[] )
+{
+ unsigned int freq;
+
+ if (!cmd_test_cable( chain ))
+ return 1;
+
+ if (cmd_params( params ) == 1) {
+ printf( _("Current TCK frequency is %u Hz\n"), cable_get_frequency(chain->cable) );
+ return 1;
+ }
+
+ if (cmd_params( params ) != 2)
+ return -1;
+
+ if (cmd_get_number( params[1], &freq ))
+ return -1;
+
+ printf( _("Setting TCK frequency to %u Hz\n"), freq );
+ cable_set_frequency(chain->cable, freq);
+
+ return 1;
+}
+
+static void
+cmd_frequency_help( void )
+{
+ printf( _(
+ "Usage: %s [FREQ]\n"
+ "Change TCK frequency to FREQ or print current TCK frequency.\n"
+ "\n"
+ "FREQ is in hertz. It's a maximum TCK frequency for JTAG interface.\n"
+ "In some cases the TCK frequency is less than FREQ, but the frequency\n"
+ "is never more than FREQ. Maximum supported frequency depends on JTAG\n"
+ "adapter.\n"
+ "\n"
+ "FREQ must be an unsigned integer. Minimum allowed frequency is 1 Hz.\n"
+ "Use 0 for FREQ to disable frequency limit.\n"
+ ), "frequency" );
+}
+
+cmd_t cmd_frequency = {
+ "frequency",
+ N_("setup JTAG frequency"),
+ cmd_frequency_help,
+ cmd_frequency_run
+};
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2003 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2003.
+ *
+ */
+
+#include "sysdep.h"
+
+#include <stdio.h>
+#include <string.h>
+
+#include "part.h"
+#include "bssignal.h"
+#include "jtag.h"
+
+#include "cmd.h"
+
+static int
+cmd_get_run( chain_t *chain, char *params[] )
+{
+ int data;
+ signal_t *s;
+
+ if (cmd_params( params ) != 3)
+ return -1;
+
+ if (strcasecmp( params[1], "signal") != 0)
+ return -1;
+
+ if (!cmd_test_cable( chain ))
+ return 1;
+
+ if (!chain->parts) {
+ printf( _("Run \"detect\" first.\n") );
+ return 1;
+ }
+
+ if (chain->active_part >= chain->parts->len) {
+ printf( _("%s: no active part\n"), "get" );
+ return 1;
+ }
+
+ s = part_find_signal( chain->parts->parts[chain->active_part], params[2] );
+ if (!s) {
+ printf( _("signal '%s' not found\n"), params[2] );
+ return 1;
+ }
+ data = part_get_signal( chain->parts->parts[chain->active_part], s );
+ if (data != -1)
+ printf( _("%s = %d\n"), params[2], data );
+
+ return 1;
+}
+
+static void
+cmd_get_help( void )
+{
+ printf( _(
+ "Usage: %s SIGNAL\n"
+ "Get signal state from output BSR (Boundary Scan Register).\n"
+ "\n"
+ "SIGNAL signal name (from JTAG declaration file)\n"
+ ), "get signal" );
+}
+
+cmd_t cmd_get = {
+ "get",
+ N_("get external signal value"),
+ cmd_get_help,
+ cmd_get_run
+};
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2003 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2003.
+ *
+ */
+
+#include "sysdep.h"
+
+#include <stdio.h>
+#include <string.h>
+
+#include <cmd.h>
+
+static int
+cmd_help_run( chain_t *chain, char *params[] )
+{
+ int i;
+
+ /* short description generation */
+ if (!params[1]) {
+ printf( _("Command list:\n\n") );
+ for (i = 0; cmds[i]; i++)
+ printf( _("%-13s %s\n"), cmds[i]->name, cmds[i]->desc ? _(cmds[i]->desc) : _("(no description available)") );
+ printf( _("\nType \"help COMMAND\" for details about a particular command.\n") );
+ return 1;
+ }
+
+ if (params[2])
+ return -1;
+
+ /* search and print help for a particular command */
+ for (i = 0; cmds[i]; i++)
+ if (strcasecmp( cmds[i]->name, params[1] ) == 0) {
+ if (cmds[i]->help)
+ cmds[i]->help();
+ return 1;
+ }
+
+ printf( _("%s: unknown command\n"), params[1] );
+
+ return 1;
+}
+
+static void
+cmd_help_help( void )
+{
+ printf( _(
+ "Usage: %s [COMMAND]\n"
+ "Print short help for COMMAND, or list of available commands.\n"
+ ), "help" );
+}
+
+cmd_t cmd_help = {
+ "help",
+ N_("display this help"),
+ cmd_help_help,
+ cmd_help_run
+};
--- /dev/null
+/*
+ * $Id: idcode.c 1102 2008-02-27 03:38:31Z jiez $
+ *
+ * Copyright (C) 2003 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Uwe Bonnes <bon@elektron.ikp.physik.tu-darmstadt.de>, 2008.
+ *
+ */
+#include "sysdep.h"
+
+#include <stdio.h>
+
+#include "jtag.h"
+
+#include "cmd.h"
+
+static int
+cmd_idcode_run( chain_t *chain, char *params[] )
+{
+ unsigned int bytes=0;
+
+ if (cmd_params( params ) == 1) {
+ bytes = 0;
+ }
+
+ else if (cmd_params( params ) >2)
+ return -1;
+
+ else if (cmd_get_number( params[1], &bytes ))
+ return -1;
+
+ if (!cmd_test_cable( chain ))
+ return 1;
+
+ printf( _("Reading %d bytes if idcode\n"), bytes );
+ idcode( chain , bytes);
+ return 1;
+}
+
+static void
+cmd_idcode_help( void )
+{
+ printf( _(
+ "Usage: %s [BYTES]\n"
+ "Read [BYTES]|all IDCODEs of all parts in a JTAG chain.\n"
+ "\n"
+ "BYTES must be an unsigned integer, Use 0 for BYTES to read all bytes\n"
+ ), "idcode" );
+}
+
+cmd_t cmd_idcode = {
+ "idcode",
+ N_("Read IDCODEs of all parts in a JTAG chain"),
+ cmd_idcode_help,
+ cmd_idcode_run
+};
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2003 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2003.
+ *
+ */
+
+#include "sysdep.h"
+
+#include <ctype.h>
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+
+#include "jtag.h"
+
+#include "cmd.h"
+#include "bsdl.h"
+
+static int
+cmd_include_or_script_run( chain_t *chain, int is_include, char *params[] )
+{
+ int go = 0, i, j = 1;
+ char *path;
+ int len;
+
+ if (cmd_params( params ) < 2)
+ return -1;
+
+ if( ! is_include )
+ {
+ printf(_("Please use the 'include' command instead of 'script'\n") );
+ }
+
+ /* If "params[1]" begins with a slash, or dots followed by a slash,
+ * assume that user wants to ignore the search path */
+
+ path = params[1];
+#ifdef __MINGW32__
+ if (isalpha(*path) && path[1] == ':') path += 2;
+#endif
+ while( *path == '.' ) path++;
+ if(*path == '/' || *path == '\\' || ! is_include)
+ {
+ path = strdup(params[1]);
+ }
+ else
+ {
+ const char *jtag_data_dir = jtag_get_data_dir();
+ path = malloc(len = strlen( jtag_data_dir ) + strlen( params[1] ) + 2);
+ if(path != NULL)
+ {
+ snprintf( path, len, "%s/%s", jtag_data_dir, params[1] );
+ }
+ }
+ if (path == NULL) {
+ printf( _("Out of memory\n") );
+ return 1;
+ }
+
+#ifdef ENABLE_BSDL
+ /* perform a test read to check for BSDL syntax */
+ if (bsdl_read_file( chain, path, BSDL_MODE_INCLUDE1, NULL ) >= 0)
+ {
+ /* it seems to be a proper BSDL file, so re-read and execute */
+ go = bsdl_read_file( chain, path, BSDL_MODE_INCLUDE2, NULL );
+
+ free( path );
+ return 1;
+ }
+#endif
+
+ if (cmd_params( params ) > 2) {
+ sscanf(params[2],"%d",&j); /* loop n times option */
+ }
+
+ for(i = 0; i < j ;i++) {
+ go = jtag_parse_file( chain, path );
+
+ if (go < 0) {
+ if (go != -99)
+ printf( _("Unable to open file `%s go=%d'!\n"), path, go );
+ break;
+ }
+ }
+
+ free( path );
+
+ return go ? 1 : 0;
+}
+
+static void
+cmd_include_or_script_help( char *cmd )
+{
+ printf( _(
+ "Usage: %s FILENAME [n] \n"
+ "Run command sequence n times from external FILENAME.\n"
+ "\n"
+ "FILENAME Name of the file with commands\n"
+ ), cmd );
+}
+
+static int
+cmd_include_run( chain_t *chain, char *params[] )
+{
+ return cmd_include_or_script_run( chain, 1, params );
+}
+
+static void
+cmd_include_help( void )
+{
+ cmd_include_or_script_help( "include" );
+}
+
+cmd_t cmd_include = {
+ "include",
+ N_("include command sequence from external repository"),
+ cmd_include_help,
+ cmd_include_run
+};
+
+static int
+cmd_script_run( chain_t *chain, char *params[] )
+{
+ return cmd_include_or_script_run( chain, 0, params );
+}
+
+static void
+cmd_script_help( void )
+{
+ cmd_include_or_script_help( "script" );
+}
+
+cmd_t cmd_script = {
+ "script",
+ N_("run command sequence from external file"),
+ cmd_script_help,
+ cmd_script_run
+};
+
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2003 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2003.
+ *
+ */
+
+#include "sysdep.h"
+
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+
+#include "cmd.h"
+#include "jtag.h"
+
+static int
+cmd_initbus_run( chain_t *chain, char *params[] )
+{
+ int i;
+
+ if (cmd_params( params ) < 2)
+ return -1;
+
+ if (!cmd_test_cable( chain ))
+ return 1;
+
+ if (!chain->parts) {
+ printf( _("Run \"detect\" first.\n") );
+ return 1;
+ }
+
+ if (chain->active_part >= chain->parts->len || chain->active_part < 0) {
+ printf( _("%s: no active part\n"), "initbus" );
+ return 1;
+ }
+
+ for (i = 0; bus_drivers[i] != NULL; i++) {
+ if (strcasecmp( bus_drivers[i]->name, params[1] ) == 0) {
+ bus_t *abus = bus_drivers[i]->new_bus( chain, bus_drivers[i], params );
+ if (abus == NULL) {
+ printf( _("bus alloc/attach failed!\n") );
+ return 1;
+ }
+ buses_add( abus );
+ if (bus_init( abus ) != URJTAG_STATUS_OK)
+ printf( _("bus initialization failed!\n") );
+
+ for (i = 0; i < buses.len; i++)
+ if (buses.buses[i] == bus)
+ break;
+ if (i != buses.len - 1)
+ printf( _("Initialized bus %d, active bus %d\n"), buses.len - 1, i );
+
+ return 1;
+ }
+ }
+
+ printf( _("Unknown bus: %s\n"), params[1] );
+
+ return 1;
+}
+
+static void
+cmd_initbus_help( void )
+{
+ int i;
+
+ printf( _(
+ "Usage: %s BUSNAME\n"
+ "Initialize new bus driver for active part.\n"
+ "\n"
+ "BUSNAME Name of the bus\n"
+ "\n"
+ "List of available buses:\n"
+ ), "initbus" );
+
+ for (i = 0; bus_drivers[i] != NULL; i++)
+ printf( _("%-10s %s\n"), bus_drivers[i]->name, bus_drivers[i]->description );
+}
+
+const cmd_t cmd_initbus = {
+ "initbus",
+ N_("initialize bus driver for active part"),
+ cmd_initbus_help,
+ cmd_initbus_run
+};
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2003 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2003.
+ *
+ */
+
+#include "sysdep.h"
+
+#include <stdio.h>
+#include <string.h>
+
+#include "part.h"
+#include "jtag.h"
+
+#include "cmd.h"
+
+static int
+cmd_instruction_run( chain_t *chain, char *params[] )
+{
+ part_t *part;
+
+ if (!cmd_test_cable( chain ))
+ return 1;
+
+ if (!chain->parts) {
+ printf( _("Run \"detect\" first.\n") );
+ return 1;
+ }
+
+ if (chain->active_part >= chain->parts->len) {
+ printf( _("%s: no active part\n"), "instruction" );
+ return 1;
+ }
+
+ part = chain->parts->parts[chain->active_part];
+
+ if (cmd_params( params ) == 2) {
+ part_set_instruction( part, params[1] );
+ if (part->active_instruction == NULL)
+ printf( _("%s: unknown instruction '%s'\n"), "instruction", params[1] );
+ return 1;
+ }
+
+ if (cmd_params( params ) == 3) {
+ unsigned int len;
+
+ if (strcasecmp( params[1], "length" ) != 0)
+ return -1;
+
+ if (part->instructions != NULL) {
+ printf( _("instruction length is already set and used\n") );
+ return 1;
+ }
+
+ if (cmd_get_number( params[2], &len ))
+ return -1;
+
+ part->instruction_length = len;
+ return 1;
+ }
+
+ if (cmd_params( params ) == 4) {
+ instruction *i;
+
+ if (strlen( params[2] ) != part->instruction_length) {
+ printf( _("invalid instruction length\n") );
+ return 1;
+ }
+
+ if (part_find_instruction( part, params[1] ) != NULL) {
+ printf( _("Instruction '%s' already defined\n"), params[1] );
+ return 1;
+ }
+
+ i = instruction_alloc( params[1], part->instruction_length, params[2] );
+ if (!i) {
+ printf( _("out of memory\n") );
+ return 1;
+ }
+
+ i->next = part->instructions;
+ part->instructions = i;
+
+ i->data_register = part_find_data_register( part, params[3] );
+ if (i->data_register == NULL) {
+ printf( _("unknown data register '%s'\n"), params[3] );
+ return 1;
+ }
+
+ return 1;
+ }
+
+ return -1;
+}
+
+static void
+cmd_instruction_help( void )
+{
+ printf( _(
+ "Usage: %s INSTRUCTION\n"
+ "Usage: %s length LENGTH\n"
+ "Usage: %s INSTRUCTION CODE REGISTER\n"
+ "Change active INSTRUCTION for a part or declare new instruction.\n"
+ "\n"
+ "INSTRUCTION instruction name (e.g. BYPASS)\n"
+ "LENGTH common instruction length\n"
+ "CODE instruction code (e.g. 11111)\n"
+ "REGISTER default data register for instruction (e.g. BR)\n"
+ ), "instruction", "instruction", "instruction" );
+}
+
+cmd_t cmd_instruction = {
+ "instruction",
+ N_("change active instruction for a part or declare new instruction"),
+ cmd_instruction_help,
+ cmd_instruction_run
+};
--- /dev/null
+/*
+ * Copyright 2008 Mike Frysinger
+ * Copyright 2008 Analog Devices Inc.
+ *
+ * Licensed under the GPL-2 or later.
+ */
+
+#include <config.h>
+#include "jtag.h"
+
+#ifdef JTAG_RELOCATABLE
+
+#include <stdlib.h>
+#include <string.h>
+
+extern char *make_relative_prefix (const char *progname, const char *bin_prefix, const char *prefix);
+
+extern const char *jtag_argv0;
+static char *jtag_data_dir = NULL;
+
+const char *jtag_get_data_dir(void)
+{
+ if (jtag_data_dir)
+ return jtag_data_dir;
+
+ jtag_data_dir = make_relative_prefix(jtag_argv0, JTAG_BIN_DIR, JTAG_DATA_DIR);
+ if (!jtag_data_dir)
+ jtag_data_dir = JTAG_DATA_DIR;
+
+ return jtag_data_dir;
+}
+
+#else
+
+const char *jtag_get_data_dir(void)
+{
+ return JTAG_DATA_DIR;
+}
+
+#endif
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2002, 2003 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2002, 2003.
+ * Modified by Ajith Kumar P.C <ajithpc@kila.com>, 20/09/2006.
+ * Modified by Ville Voipio <vv@iki.fi>, 7-May-2008
+ *
+ */
+
+#include "sysdep.h"
+
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+#include <ctype.h>
+
+#include "chain.h"
+#include "cmd.h"
+#include "jtag.h"
+
+#define MAXINPUTLINE 100 /* Maximum input line length */
+
+
+
+int
+jtag_parse_line( chain_t *chain, char *line )
+{
+ int l, i, r, tcnt;
+ char **a;
+ char *c, *d;
+ char *sline;
+
+ if (line == NULL)
+ return 1;
+ l = strlen(line);
+ if (l == 0)
+ return 1;
+
+ /* allocate as many chars as in the input line; this will be enough in all cases */
+ sline = malloc((l+1) * sizeof(char));
+ if (sline == NULL) {
+ printf( _("Out of memory\n") );
+ return 1;
+ }
+
+ /* count and copy the tokens */
+ c = line;
+ d = sline;
+ tcnt = 0;
+ while (1) {
+ /* eat up leading spaces */
+ while (isspace(*c))
+ c++;
+
+ /* if the command ends here (either by NUL or comment) */
+ if (*c == '\0' || *c == '#')
+ break;
+
+ /* copy the meat (non-space, non-NUL) */
+ while (!isspace(*c) && *c != '\0') {
+ *d++ = *c++;
+ }
+ /* mark the end to the destination string */
+ *d++ = '\0';
+ tcnt++;
+ }
+
+ if (tcnt == 0) {
+ free(sline);
+ return 1;
+ }
+
+ /* allocate the token pointer table */
+ a = malloc((tcnt + 1) * sizeof(char *));
+ if (a == NULL) {
+ fprintf(stderr, _("Out of memory\n"));
+ return 1;
+ }
+
+ /* find the starting points for the tokens */
+ d = sline;
+ for (i = 0; i < tcnt; i++)
+ {
+ a[i] = d;
+ while (*d++ != '\0')
+ ;
+ }
+ a[tcnt] = NULL;
+
+ r = cmd_run( chain, a );
+ if(debug_mode & 1)printf("Return in jtag_parse_line r=%d\n",r);
+ free( a );
+ free(sline);
+ return r;
+}
+
+
+int
+jtag_parse_stream( chain_t *chain, FILE *f )
+{
+ char inputline[MAXINPUTLINE + 1];
+ int go = 1, i, c, lnr, clip, found_comment;
+
+ /* read the stream line-by-line until EOF or "quit" */
+ lnr = 0;
+ do {
+ i = 0;
+ clip = 0;
+ found_comment = 0;
+
+ /* read stream until '\n' or EOF, copy at most MAXINPUTLINE-1 chars */
+ while (1) {
+ c = fgetc(f);
+ if (c == EOF || c == '\n')
+ break;
+ if (c == '#')
+ found_comment = 1;
+ if (i < sizeof(inputline) - 1)
+ inputline[i++] = c;
+ else
+ clip = 1;
+ }
+ inputline[i] = '\0';
+ lnr++;
+ if (clip && !found_comment)
+ fprintf(stdout, "Warning: line %d exceeds %d characters, clipped\n", lnr, (int)sizeof(inputline) - 1);
+ go = jtag_parse_line(chain, inputline);
+ chain_flush( chain );
+ }
+ while (go && c != EOF);
+
+ return go;
+}
+
+int
+jtag_parse_file( chain_t *chain, const char *filename )
+{
+ FILE *f;
+ int go;
+
+ f = fopen( filename, "r" );
+ if (!f)
+ return -1;
+
+ go = jtag_parse_stream( chain, f );
+
+ fclose(f);
+ if(debug_mode & 1)printf("File Closed gp=%d\n",go);
+ return go;
+}
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2003 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2003.
+ *
+ */
+
+#include "sysdep.h"
+
+#include <stdio.h>
+#include <string.h>
+#include <stdlib.h>
+
+#include "jtag.h"
+
+#include "cmd.h"
+
+static int
+cmd_part_run( chain_t *chain, char *params[] )
+{
+ unsigned int n;
+
+/* part alias U1 (3 params) */
+ if(cmd_params( params ) == 3) {
+ if(strcasecmp(params[1],"alias") == 0) {
+part_t *part;
+ part = chain->parts->parts[chain->active_part];
+ part->alias = malloc(strlen(params[2])+1);
+ strcpy(part->alias,params[2]);
+ return 1;
+ }
+ }
+
+
+ if (cmd_params( params ) != 2)
+ return -1;
+
+ if (!cmd_test_cable( chain ))
+ return 1;
+
+ if (!chain->parts) {
+ printf( _("Run \"detect\" first.\n") );
+ return 1;
+ }
+
+/* Search for alias too djf */
+ if (cmd_get_number( params[1], &n )) {
+
+ /* Search all parts to check their aliases */
+ int i;
+ char *a;
+
+ for(i=0;i<chain->parts->len;i++) {
+ a = chain->parts->parts[i]->alias;
+ if(a && strcasecmp(a,params[1]) == 0)break;
+ }
+ if(i < chain->parts->len)n = i;
+
+
+ else return -1;
+ }
+
+ if (n >= chain->parts->len) {
+ printf( _("%s: invalid part number\n"), "part" );
+ return 1;
+ }
+
+ chain->active_part = n;
+
+ return 1;
+}
+
+static void
+cmd_part_help( void )
+{
+ printf( _(
+ "Usage: %s PART\n"
+ "Change active part for current JTAG chain.\n"
+ "\n"
+ "PART part number | alias\n"
+ ), "part" );
+}
+
+cmd_t cmd_part = {
+ "part",
+ N_("change active part for current JTAG chain"),
+ cmd_part_help,
+ cmd_part_run
+};
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2003 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Matan Ziv-Av <matan@svgalib.org>, 2003.
+ *
+ */
+
+#include "sysdep.h"
+
+#include <stdio.h>
+#include <stdint.h>
+
+#include "jtag.h"
+
+#include "cmd.h"
+
+static int
+cmd_peek_run( chain_t *chain, char *params[] )
+{
+ uint32_t adr, val;
+ int pars, j = 1;
+ bus_area_t area;
+
+ /* bus_t * bus = part_get_active_bus(chain); */
+
+ if ( (pars = cmd_params( params )) < 2)
+ return -1;
+
+ if (!bus) {
+ printf( _("Error: Bus driver missing.\n") );
+ return 1;
+ }
+ do {
+ if (cmd_get_number( params[j], &adr ))
+ return -1;
+
+ bus_prepare( bus );
+ bus_area( bus, adr, &area );
+ val = bus_read( bus, adr );
+
+ switch ( area.width )
+ {
+ case 8:
+ val &= 0xff;
+ printf( _("bus_read(0x%08x) = 0x%02X (%i)\n"), adr, val, val );
+ break;
+ case 16:
+ val &= 0xffff;
+ printf( _("bus_read(0x%08x) = 0x%04X (%i)\n"), adr, val, val );
+ break;
+ default:
+ printf( _("bus_read(0x%08x) = 0x%08X (%i)\n"), adr, val, val );
+ }
+ } while (++j != pars);
+
+ return 1;
+}
+
+static void
+cmd_peek_help( void )
+{
+ printf( _(
+ "Usage: %s ADDR\n"
+ "Read a single word (bus width size).\n"
+ "\n"
+ "ADDR address to read from\n"
+ "\n"
+ "ADDR could be in decimal or hexadecimal (prefixed with 0x) form.\n"
+ "\n"
+ ), "peek" );
+}
+
+cmd_t cmd_peek = {
+ "peek",
+ N_("read a single word"),
+ cmd_peek_help,
+ cmd_peek_run
+};
+
+static int
+cmd_poke_run( chain_t *chain, char *params[] )
+{
+ uint32_t adr, val;
+ bus_area_t area;
+ /*bus_t * bus = part_get_active_bus(chain);*/
+ int k = 1, pars = cmd_params( params );
+
+ if ( pars < 3 || !(pars & 1))
+ return -1;
+
+ if (!bus) {
+ printf( _("Error: Bus driver missing.\n") );
+ return 1;
+ }
+
+
+ bus_prepare( bus );
+
+ while ( k < pars) {
+ if (cmd_get_number( params[k], &adr ) || cmd_get_number( params[k+1], &val ))
+ return -1;
+ bus_area( bus, adr, &area );
+ bus_write( bus, adr, val );
+ k += 2;
+ }
+
+ return 1;
+}
+
+static void
+cmd_poke_help( void )
+{
+ printf( _(
+ "Usage: %s ADDR VAL [ADDR VAL] ... \n"
+ "Write a single word (bus width size).\n"
+ "\n"
+ "ADDR address to write\n"
+ "VAL value to write\n"
+ "\n"
+ "ADDR and VAL could be in decimal or hexadecimal (prefixed with 0x) form.\n"
+ "\n"
+ ), "poke" );
+}
+
+cmd_t cmd_poke = {
+ "poke",
+ N_("write a single word"),
+ cmd_poke_help,
+ cmd_poke_run
+};
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2008 K. Waschk
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Kolja Waschk, 2008
+ * based on idea and code by Sebastian Hesselbarth, 2008
+ * and code by Marcel Telka <marcel@telka.sk>, 2003.
+ *
+ */
+
+#include "sysdep.h"
+
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+
+#include "jtag.h"
+#include <cable.h>
+
+#include "cmd.h"
+
+static int
+cmd_pod_run( chain_t *chain, char *params[] )
+{
+ int i,j;
+ int mask = 0;
+ int val = 0;
+
+ if ((i = cmd_params( params )) < 2)
+ return -1;
+
+ if (!cmd_test_cable( chain ))
+ return -1;
+
+ for (j=1; j<i; j++)
+ {
+ char *eq = strrchr(params[j], '=');
+ if (!eq)
+ return -1;
+ pod_sigsel_t it = CS_NONE;
+ int n = strlen(params[j]);
+ if (n > 4 && (strncasecmp(params[j], "tck", 3) == 0)) it = CS_TCK;
+ else if (n > 4 && (strncasecmp(params[j], "tms", 3) == 0)) it = CS_TMS;
+ else if (n > 4 && (strncasecmp(params[j], "tdi", 3) == 0)) it = CS_TDI;
+ else if (n > 5 && (strncasecmp(params[j], "trst", 3) == 0)) it = CS_TRST;
+ else if (n > 6 && (strncasecmp(params[j], "reset", 3) == 0)) it = CS_RESET;
+ if (it == CS_NONE)
+ return -1;
+ mask |= it;
+ if (atoi(eq+1) != 0) val |= it;
+ }
+
+ chain_set_pod_signal( chain, mask, val );
+
+ return 1;
+}
+
+static void
+cmd_pod_help( void )
+{
+ printf( _(
+ "Usage: %s SIGNAL=# [SIGNAL=# ...]\n"
+ "Set state of POD signal(s) to 0 or 1.\n"
+ "\n"
+ "SIGNAL TCK,TMS, TDI, TRST, or RESET\n"
+ "# 0 or 1\n"
+ ), "pod" );
+}
+
+cmd_t cmd_pod = {
+ "pod",
+ N_("Set state of POD signal(s)"),
+ cmd_pod_help,
+ cmd_pod_run
+};
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2003 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2003.
+ *
+ */
+
+#include <config.h>
+
+#include "sysdep.h"
+
+#include <stdlib.h>
+#include <stdio.h>
+#include <string.h>
+
+#ifdef HAVE_WCHAR_H
+#include <wchar.h>
+#else
+typedef char wchar_t;
+# define mbstowcs(dst,src,n) 0
+# define wcslen(str) strlen(str)
+#endif
+
+#include "part.h"
+#include "jtag.h"
+
+#include "cmd.h"
+
+static int
+cmd_print_run( chain_t *chain, char *params[] )
+{
+ char format[128];
+#if HAVE_SWPRINTF
+ wchar_t wformat[128];
+#endif /* HAVE_SWPRINTF */
+ wchar_t wheader[128];
+ char header[128];
+ int i;
+ int noheader = 0;
+
+ if (cmd_params( params ) > 2)
+ return -1;
+
+ if (!cmd_test_cable( chain ))
+ return 1;
+
+ if (!chain->parts) {
+ printf( _("Run \"detect\" first.\n") );
+ return 1;
+ }
+
+ if (cmd_params( params ) == 2) {
+ if (strcasecmp( params[1], "bus") == 0)
+ noheader = 1;
+
+ if (strcasecmp( params[1], "signals") == 0) {
+
+ printf("Signals:\n");
+ part_t *part;
+ signal_t *s;
+ part = chain->parts->parts[chain->active_part];
+ for(s = part->signals;s != NULL;s = s->next) {
+ salias_t *sa;
+ if(s->pin)printf("%s %s",s->name,s->pin);
+ else printf("%s",s->name);
+ if(s->input)printf("\tinput=%s",s->input->name);
+ if(s->output)printf("\toutput=%s",s->output->name);
+
+ for (sa = part->saliases; sa != NULL; sa = sa->next) {
+ if (s == sa->signal)printf("\tsalias=%s",sa->name);
+ }
+ printf("\n");
+ }
+ return(1);
+ }
+
+ if (strcasecmp( params[1], "instructions") == 0) {
+ part_t *part;
+ instruction *inst;
+
+ snprintf( format, 128, _(" Active %%-%ds %%-%ds"),
+ MAXLEN_INSTRUCTION, MAXLEN_DATA_REGISTER );
+#if HAVE_SWPRINTF
+ if (mbstowcs( wformat, format, 128 ) == -1)
+ printf( _("(%d) String conversion failed!\n"), __LINE__ );
+ swprintf( wheader, 128, wformat, _("Instruction"), _("Register") );
+ if (wcstombs( header, wheader, 128 ) == -1)
+ printf( _("(%d) String conversion failed!\n"), __LINE__ );
+#else /* HAVE_SWPRINTF */
+ snprintf( header, 128, format, _("Instruction"), _("Register") );
+ if (mbstowcs( wheader, header, 128 ) == -1)
+ printf( _("(%d) String conversion failed!\n"), __LINE__ );
+#endif /* HAVE_SWPRINTF */
+ puts( header );
+
+ for (i = 0; i < wcslen( wheader ); i++ )
+ putchar( '-' );
+ putchar( '\n' );
+
+ snprintf( format, 128, _(" %%c %%-%ds %%-%ds\n"),
+ MAXLEN_INSTRUCTION, MAXLEN_DATA_REGISTER );
+
+ part = chain->parts->parts[chain->active_part];
+ for (inst = part->instructions; inst != NULL; inst = inst->next) {
+ printf( format,
+ inst == part->active_instruction
+ ? 'X'
+ : ' ',
+ inst->name, inst->data_register->name);
+ }
+ return(1);
+ }
+ }
+
+ if (noheader == 0) {
+ snprintf( format, 128, _(" No. %%-%ds %%-%ds %%-%ds %%-%ds %%-%ds"), MAXLEN_MANUFACTURER, MAXLEN_PART, MAXLEN_STEPPING,
+ MAXLEN_INSTRUCTION, MAXLEN_DATA_REGISTER );
+#if HAVE_SWPRINTF
+ if (mbstowcs( wformat, format, 128 ) == -1)
+ printf( _("(%d) String conversion failed!\n"), __LINE__ );
+ swprintf( wheader, 128, wformat, _("Manufacturer"), _("Part"), _("Stepping"), _("Instruction"), _("Register") );
+ if (wcstombs( header, wheader, 128 ) == -1)
+ printf( _("(%d) String conversion failed!\n"), __LINE__ );
+#else /* HAVE_SWPRINTF */
+ snprintf( header, 128, format, _("Manufacturer"), _("Part"), _("Stepping"), _("Instruction"), _("Register") );
+ if (mbstowcs( wheader, header, 128 ) == -1)
+ printf( _("(%d) String conversion failed!\n"), __LINE__ );
+#endif /* HAVE_SWPRINTF */
+ puts( header );
+
+ for (i = 0; i < wcslen( wheader ); i++ )
+ putchar( '-' );
+ putchar( '\n' );
+ }
+
+ if (cmd_params( params ) == 1) {
+ if (chain->parts->len > chain->active_part) {
+ if(chain->parts->parts[chain->active_part]->alias)
+ printf( _(" %3d %s "), chain->active_part,chain->parts->parts[chain->active_part]->alias );
+ else
+ printf( _(" %3d "), chain->active_part);
+
+ part_print( chain->parts->parts[chain->active_part] );
+ }
+ if (bus != NULL) {
+ int i;
+ uint64_t a;
+ bus_area_t area;
+
+ for (i = 0; i < buses.len; i++)
+ if (buses.buses[i] == bus)
+ break;
+ printf( _("\nActive bus:\n*%d: "), i );
+ bus_printinfo( bus );
+
+ for (a = 0; a < UINT64_C(0x100000000); a = area.start + area.length) {
+ if (bus_area( bus, a, &area ) != URJTAG_STATUS_OK) {
+ printf( _("Error in bus area discovery at 0x%08llX\n"), (long long unsigned int)a );
+ break;
+ }
+ if (area.width != 0) {
+ if (area.description != NULL)
+ printf( _("\tstart: 0x%08X, length: 0x%08llX, data width: %d bit, (%s)\n"), area.start, (long long unsigned int)area.length, area.width, _(area.description) );
+ else
+ printf( _("\tstart: 0x%08X, length: 0x%08llX, data width: %d bit\n"), area.start, (long long unsigned int)area.length, area.width );
+ }
+ }
+ }
+
+ return 1;
+ }
+
+ if (strcasecmp( params[1], "chain" ) == 0) {
+ parts_print( chain->parts );
+ return 1;
+ }
+
+ for (i = 0; i < buses.len; i++) {
+ if (buses.buses[i] == bus)
+ printf( _("*%d: "), i );
+ else
+ printf( _("%d: "), i );
+ bus_printinfo( buses.buses[i] );
+ }
+
+ return 1;
+}
+
+static void
+cmd_print_help( void )
+{
+ printf( _(
+ "Usage: %s [chain|bus|signals|instructions]\n"
+ "Display JTAG chain status.\n"
+ "\n"
+ "Display list of the parts connected to the JTAG chain including\n"
+ "part number and current (active) instruction and data register.\n"
+ ), "print" );
+}
+
+cmd_t cmd_print = {
+ "print",
+ N_("display JTAG chain list/status"),
+ cmd_print_help,
+ cmd_print_run
+};
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2003 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2003.
+ *
+ */
+
+#include "sysdep.h"
+
+#include <stdio.h>
+
+#include <cmd.h>
+
+static int
+cmd_quit_run( chain_t *chain, char *params[] )
+{
+ if (params[1])
+ return -1;
+
+ return 0;
+}
+
+static void
+cmd_quit_help( void )
+{
+ printf( _(
+ "Usage: %s\n"
+ "Exit from %s.\n"
+ ), "quit", PACKAGE );
+}
+
+cmd_t cmd_quit = {
+ "quit",
+ N_("exit and terminate this session"),
+ cmd_quit_help,
+ cmd_quit_run
+};
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2003 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2003.
+ *
+ */
+
+#include "sysdep.h"
+
+#include <stdio.h>
+#include <stdint.h>
+
+#include "jtag.h"
+
+#include "cmd.h"
+
+static int
+cmd_readmem_run( chain_t *chain, char *params[] )
+{
+ uint32_t adr;
+ uint32_t len;
+ FILE *f;
+
+ if (cmd_params( params ) != 4)
+ return -1;
+
+ if (!bus) {
+ printf( _("Error: Bus driver missing.\n") );
+ return 1;
+ }
+
+ if (cmd_get_number( params[1], &adr) || cmd_get_number( params[2], &len))
+ return -1;
+
+ f = fopen( params[3], "w" );
+ if (!f) {
+ printf( _("Unable to create file `%s'!\n"), params[3] );
+ return 1;
+ }
+ readmem( bus, f, adr, len );
+ fclose( f );
+
+ return 1;
+}
+
+static void
+cmd_readmem_help( void )
+{
+ printf( _(
+ "Usage: %s ADDR LEN FILENAME\n"
+ "Copy device memory content starting with ADDR to FILENAME file.\n"
+ "\n"
+ "ADDR start address of the copied memory area\n"
+ "LEN copied memory length\n"
+ "FILENAME name of the output file\n"
+ "\n"
+ "ADDR and LEN could be in decimal or hexadecimal (prefixed with 0x) form.\n"
+ ), "readmem" );
+}
+
+cmd_t cmd_readmem = {
+ "readmem",
+ N_("read content of the memory and write it to file"),
+ cmd_readmem_help,
+ cmd_readmem_run
+};
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2003 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2003.
+ *
+ */
+
+#include "sysdep.h"
+
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+
+#include "jtag.h"
+
+#include "cmd.h"
+
+static int
+cmd_register_run( chain_t *chain, char *params[] )
+{
+ part_t *part;
+ unsigned int len;
+ data_register *dr;
+
+ if (cmd_params( params ) != 3)
+ return -1;
+
+
+ if (!cmd_test_cable( chain ))
+ return 1;
+
+ if (!chain->parts) {
+ printf( _("Run \"detect\" first.\n") );
+ return 1;
+ }
+
+ if (chain->active_part >= chain->parts->len) {
+ printf( _("%s: no active part\n"), "register" );
+ return 1;
+ }
+
+ if (cmd_get_number( params[2], &len ))
+ return -1;
+
+ part = chain->parts->parts[chain->active_part];
+
+ if (part_find_data_register( part, params[1] ) != NULL) {
+ printf( _("Data register '%s' already defined\n"), params[1] );
+ return 1;
+ }
+
+ dr = data_register_alloc( params[1], len );
+ if (!dr) {
+ printf( _("out of memory\n") );
+ return 1;
+ }
+
+ dr->next = part->data_registers;
+ part->data_registers = dr;
+
+ /* Boundary Scan Register */
+ if (strcasecmp( dr->name, "BSR" ) == 0) {
+ int i;
+
+ part->boundary_length = len;
+ part->bsbits = malloc( part->boundary_length * sizeof *part->bsbits );
+ if (!part->bsbits) {
+ printf( _("out of memory\n") );
+ return 1;
+ }
+ for (i = 0; i < part->boundary_length; i++)
+ part->bsbits[i] = NULL;
+ }
+
+ /* Device Identification Register */
+ if (strcasecmp( dr->name, "DIR" ) == 0)
+ register_init( dr->out, register_get_string( part->id ) );
+
+ return 1;
+}
+
+static void
+cmd_register_help( void )
+{
+ printf( _(
+ "Usage: %s NAME LENGTH\n"
+ "Define new data register with specified NAME and LENGTH.\n"
+ "\n"
+ "NAME Data register name\n"
+ "LENGTH Data register length\n"
+ ), "register" );
+}
+
+cmd_t cmd_register = {
+ "register",
+ N_("define new data register for a part"),
+ cmd_register_help,
+ cmd_register_run
+};
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2004 Marcel Telka
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2004.
+ *
+ */
+
+#include "sysdep.h"
+
+#include <stdio.h>
+#include <string.h>
+
+#include "jtag.h"
+#include "tap.h"
+
+#include "cmd.h"
+
+static int
+cmd_reset_run( chain_t *chain, char *params[] )
+{
+ if (cmd_params( params ) > 1)
+ return -1;
+
+ if (!cmd_test_cable( chain ))
+ return 1;
+
+ tap_reset_bypass( chain );
+
+ return 1;
+}
+
+static void
+cmd_reset_help( void )
+{
+ printf( _(
+ "Usage: %s\n"
+ "Reset current JTAG chain.\n"
+ ), "reset" );
+}
+
+cmd_t cmd_reset = {
+ "reset",
+ N_("reset JTAG chain"),
+ cmd_reset_help,
+ cmd_reset_run
+};
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2003 Marcel Telka
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2003.
+ *
+ */
+
+#include "sysdep.h"
+
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+
+#include "jtag.h"
+
+#include "cmd.h"
+
+static int
+cmd_salias_run( chain_t *chain, char *params[] )
+{
+ part_t *part;
+ signal_t *s;
+ salias_t *sa;
+
+ if (cmd_params( params ) != 3)
+ return -1;
+
+ if (!cmd_test_cable( chain ))
+ return 1;
+
+ if (!chain->parts) {
+ printf( _("Run \"detect\" first.\n") );
+ return 1;
+ }
+
+ if (chain->active_part >= chain->parts->len) {
+ printf( _("%s: no active part\n"), "signal" );
+ return 1;
+ }
+
+ part = chain->parts->parts[chain->active_part];
+ if (part_find_signal( part, params[1] ) != NULL) {
+ printf( _("Signal '%s' already defined\n"), params[1] );
+ return 1;
+ }
+
+ s = part_find_signal( part, params[2] );
+ if (s == NULL) {
+ printf( _("Signal '%s' not found\n"), params[2] );
+ return 1;
+ }
+
+ sa = salias_alloc( params[1], s );
+ if (!sa) {
+ printf( _("out of memory\n") );
+ return 1;
+ }
+
+ sa->next = part->saliases;
+ part->saliases = sa;
+
+ return 1;
+}
+
+static void
+cmd_salias_help( void )
+{
+ printf( _(
+ "Usage: %s ALIAS SIGNAL\n"
+ "Define new signal ALIAS as alias for existing SIGNAL.\n"
+ "\n"
+ "ALIAS New signal alias name\n"
+ "SIGNAL Existing signal name\n"
+ ), "signal" );
+}
+
+const cmd_t cmd_salias = {
+ "salias",
+ N_("define an alias for a signal"),
+ cmd_salias_help,
+ cmd_salias_run
+};
--- /dev/null
+/*
+ * $Id: scan.c 733 2007-11-07 22:21:33Z arniml $
+ *
+ * Copyright (C) 2003 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2003.
+ *
+ */
+
+#include "sysdep.h"
+
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+
+#include "jtag.h"
+
+#include "cmd.h"
+
+static int
+cmd_scan_run( chain_t *chain, char *params[] )
+{
+ part_t *part;
+ data_register *bsr;
+ tap_register *obsr;
+ int i;
+
+ if ((i = cmd_params( params )) < 1)
+ return -1;
+
+ if (!cmd_test_cable( chain ))
+ return 1;
+
+ if (!chain->parts) {
+ printf( _("Run \"detect\" first.\n") );
+ return 1;
+ }
+
+ if (chain->active_part >= chain->parts->len) {
+ printf( _("%s: no active part\n"), "scan" );
+ return 1;
+ }
+
+ part = chain->parts->parts[chain->active_part];
+
+ /* search for Boundary Scan Register */
+ bsr = part_find_data_register( part, "BSR" );
+ if (!bsr) {
+ printf( _("%s(%s:%d) Boundary Scan Register (BSR) not found\n"), __FUNCTION__, __FILE__, __LINE__ );
+ return 1;
+ }
+
+ if(part_find_instruction( part, "SAMPLE"))
+ {
+ part_set_instruction( part, "SAMPLE");
+ }
+ else if(part_find_instruction( part, "SAMPLE/PRELOAD"))
+ {
+ part_set_instruction( part, "SAMPLE/PRELOAD");
+ }
+ else
+ {
+ printf( _("%s(%s:%d) Part can't SAMPLE\n"), __FUNCTION__, __FILE__, __LINE__ );
+ return 1;
+ }
+
+ chain_shift_instructions( chain );
+
+ obsr = register_alloc( bsr->out->len );
+
+ if(!obsr)
+ {
+ printf( _("Out of memory\n") );
+ return 1;
+ }
+
+ {
+ signal_t *s;
+
+ register_init( obsr, register_get_string( bsr->out )); // copy
+
+ chain_shift_data_registers( chain, 1 );
+
+ for(s=part->signals; s; s=s->next)
+ {
+ if(s->input != NULL)
+ {
+ int old = obsr->data[s->input->bit];
+ int new = bsr->out->data[s->input->bit];
+ if( old != new )
+ {
+ salias_t *a;
+ printf("%s", s->name);
+ for(a = part->saliases; a; a=a->next)
+ {
+ if(a->signal == s) printf(",%s", a->name);
+ }
+ printf( _(": %d > %d\n"), old, new);
+ }
+ }
+ }
+ }
+
+ register_free( obsr );
+
+ return 1;
+}
+
+static void
+cmd_scan_help( void )
+{
+ printf( _(
+ "Usage: %s [SIGNAL]* \n"
+ "Read BSR and show changes since last scan.\n"
+ ), "scan" );
+}
+
+cmd_t cmd_scan = {
+ "scan",
+ N_("read BSR and show changes since last scan"),
+ cmd_scan_help,
+ cmd_scan_run
+};
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2003 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2003.
+ *
+ */
+
+#include "sysdep.h"
+
+#include <stdio.h>
+#include <string.h>
+
+#include "part.h"
+#include "bssignal.h"
+#include "jtag.h"
+
+#include "cmd.h"
+
+static int
+cmd_set_run( chain_t *chain, char *params[] )
+{
+ int dir;
+ unsigned int data = 0;
+ signal_t *s;
+
+ if (cmd_params( params ) < 4 || cmd_params( params ) > 5)
+ return -1;
+
+ if (strcasecmp( params[1], "signal" ) != 0)
+ return -1;
+
+ if (!cmd_test_cable( chain ))
+ return 1;
+
+ if (!chain->parts) {
+ printf( _("Run \"detect\" first.\n") );
+ return 1;
+ }
+
+ if (chain->active_part >= chain->parts->len) {
+ printf( _("%s: no active part\n"), "set" );
+ return 1;
+ }
+
+ /* direction */
+ if (strcasecmp( params[3], "in" ) != 0 && strcasecmp( params[3], "out" ) != 0)
+ return -1;
+
+ dir = (strcasecmp( params[3], "in" ) == 0) ? 0 : 1;
+
+ if (dir) {
+ if (cmd_get_number( params[4], &data ))
+ return -1;
+ if (data > 1)
+ return -1;
+ }
+
+ s = part_find_signal( chain->parts->parts[chain->active_part], params[2] );
+ if (!s) {
+ printf( _("signal '%s' not found\n"), params[2] );
+ return 1;
+ }
+ part_set_signal( chain->parts->parts[chain->active_part], s, dir, data );
+
+ return 1;
+}
+
+static void
+cmd_set_help( void )
+{
+ printf( _(
+ "Usage: %s SIGNAL DIR [DATA]\n"
+ "Set signal state in input BSR (Boundary Scan Register).\n"
+ "\n"
+ "SIGNAL signal name (from JTAG declaration file)\n"
+ "DIR requested signal direction; possible values: 'in' or 'out'\n"
+ "DATA desired output signal value ('0' or '1'); used only if DIR\n"
+ " is 'out'\n"
+ ), "set signal" );
+}
+
+cmd_t cmd_set = {
+ "set",
+ N_("set external signal value"),
+ cmd_set_help,
+ cmd_set_run
+};
--- /dev/null
+/*
+ * $Id: shell.c,v 1.6 2003/08/19 08:42:20 telka Exp $
+ *
+ * Copyright (C) 2003 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2003.
+ * shell.c added by djf
+ */
+
+#include "sysdep.h"
+
+#include <sys/types.h>
+#include <unistd.h>
+
+#include <stdio.h>
+#include <string.h>
+#include <stdlib.h>
+//#include "part.h"
+//#include "bssignal.h"
+#include "jtag.h"
+
+#include "cmd.h"
+
+static int
+cmd_shell_run( chain_t *chain, char *params[] )
+{
+ int i, len, n = cmd_params(params);
+ char *shell_cmd;
+
+ if((n=cmd_params( params )) == 1)
+ return -1;
+
+ /* I must apologize to everyone who knows what they are doing for
+ * the following. If you can pass a shell argument past strtok the
+ * please fix this.
+ */
+ /* The problem is the parser which splits commands into params[]
+ * and doesn't allow quoting. So we concatenate the params[] here
+ * with single spaces, although the original might have different
+ * whitespace (more than one space, tabs, ...) - kawk */
+
+ for(i=1,len=0; i<n; i++) len += (1 + strlen(params[i]));
+
+ shell_cmd = malloc(len);
+ if(shell_cmd == NULL)
+ {
+ printf( _("Out of memory\n") );
+ return -1;
+ }
+
+ strcpy(shell_cmd, params[1]);
+ for(i=2; i<n; i++)
+ {
+ strcat(shell_cmd, " ");
+ strcat(shell_cmd, params[i]);
+ }
+ printf("Executing '%s'\n", shell_cmd);
+
+ system(shell_cmd);
+ free(shell_cmd);
+
+ return 1;
+}
+
+static void
+cmd_shell_help( void )
+{
+ printf( _(
+ "Usage: %s cmmd\n"
+ "Shell out to os for a command.\n"
+ "\n"
+ "CMMD OS Shell Command\n"
+ ), "shell cmmd" );
+}
+
+cmd_t cmd_shell = {
+ "shell",
+ N_("shell cmmd"),
+ cmd_shell_help,
+ cmd_shell_run
+};
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2003 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2003.
+ *
+ */
+
+#include "sysdep.h"
+
+#include <stdio.h>
+#include <string.h>
+
+#include "chain.h"
+#include "jtag.h"
+
+#include "cmd.h"
+
+static int
+cmd_shift_run( chain_t *chain, char *params[] )
+{
+ if (cmd_params( params ) != 2)
+ return -1;
+
+ if (!cmd_test_cable( chain ))
+ return 1;
+
+ if (strcasecmp( params[1], "ir" ) == 0) {
+ chain_shift_instructions( chain );
+ return 1;
+ }
+ if (strcasecmp( params[1], "dr" ) == 0) {
+ chain_shift_data_registers( chain, 1 );
+ return 1;
+ }
+
+ return -1;
+}
+
+static void
+cmd_shift_help( void )
+{
+ printf( _(
+ "Usage: %s\n"
+ "Usage: %s\n"
+ "Shift instruction or data register through JTAG chain.\n"
+ ), "shift ir", "shift dr" );
+}
+
+cmd_t cmd_shift = {
+ "shift",
+ N_("shift data/instruction registers through JTAG chain"),
+ cmd_shift_help,
+ cmd_shift_run
+};
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2003 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2003.
+ *
+ */
+
+#include "sysdep.h"
+
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+
+#include "jtag.h"
+
+#include "cmd.h"
+
+static int
+cmd_signal_run( chain_t *chain, char *params[] )
+{
+ part_t *part;
+ signal_t *s;
+ int i;
+
+ if ((i = cmd_params( params )) < 2)
+ return -1;
+
+
+ if (!cmd_test_cable( chain ))
+ return 1;
+
+ if (!chain->parts) {
+ printf( _("Run \"detect\" first.\n") );
+ return 1;
+ }
+
+ if (chain->active_part >= chain->parts->len) {
+ printf( _("%s: no active part\n"), "signal" );
+ return 1;
+ }
+
+ part = chain->parts->parts[chain->active_part];
+ if ((s = part_find_signal( part, params[1] )) != NULL) {
+ if(i == 3) {
+ printf("Defining pin for signal %s\n",s->name);
+
+ if(s->pin)free(s->pin); /* erase old */
+
+ /* Allocate the space for the pin number & copy it */
+ s->pin = malloc(strlen(params[2])+1);
+ strcpy(s->pin,params[2]);
+
+ return 1;
+ }
+ else {
+ printf( _("Signal '%s' already defined\n"), params[1] );
+ return 1;
+ }
+ }
+
+ s = signal_alloc( params[1]);
+
+ if(i == 3) { /* Add pin number */
+ /* Allocate the space for the pin number & copy it */
+ s->pin = malloc(strlen(params[2])+1);
+ strcpy(s->pin,params[2]);
+
+ }
+
+ if (!s) {
+ printf( _("out of memory\n") );
+ return 1;
+ }
+
+ s->next = part->signals;
+ part->signals = s;
+
+ return 1;
+}
+
+static void
+cmd_signal_help( void )
+{
+ printf( _(
+ "Usage: %s SIGNAL [PIN#]\n"
+ "Define new signal with name SIGNAL for a part.\n"
+ "\n"
+ "SIGNAL New signal name\n"
+ "PIN# List of pin # for a signal\n"
+ ), "signal" );
+}
+
+cmd_t cmd_signal = {
+ "signal",
+ N_("define new signal for a part"),
+ cmd_signal_help,
+ cmd_signal_run
+};
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2004, Arnim Laeuger
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Arnim Laeuger <arniml@users.sourceforge.net>, 2004.
+ *
+ */
+
+
+#include "sysdep.h"
+
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+
+#include <svf.h>
+#include <cmd.h>
+
+static int
+cmd_svf_run( chain_t *chain, char *params[] )
+{
+ FILE *SVF_FILE;
+ int num_params, i, result = -1;
+ int stop = 0;
+ int print_progress = 0;
+ uint32_t ref_freq = 0;
+
+ num_params = cmd_params( params );
+ if (num_params > 1) {
+ for (i = 2; i < num_params; i++) {
+ if (strcasecmp(params[i], "stop") == 0)
+ stop = 1;
+ else if (strcasecmp(params[i], "progress") == 0)
+ print_progress = 1;
+ else if (strncasecmp(params[i], "ref_freq=", 9) == 0)
+ ref_freq = strtol(params[i]+9, NULL, 10);
+ else
+ return -1;
+ }
+
+ if ((SVF_FILE = fopen(params[1], "r")) != NULL) {
+ svf_run(chain, SVF_FILE, stop, print_progress, ref_freq);
+ result = 1;
+
+ fclose(SVF_FILE);
+ } else {
+ printf( _("%s: cannot open file '%s' for reading\n"), "svf", params[1] );
+ }
+
+ }
+
+ return result;
+}
+
+
+static void
+cmd_svf_help( void )
+{
+ printf( _(
+ "Usage: %s FILE [stop] [progress] [ref_freq=<frequency>]\n"
+ "Execute svf commands from FILE.\n"
+ "stop : Command execution stops upon TDO mismatch.\n"
+ "progress : Continually displays progress status.\n"
+ "ref_freq : Use <frequency> as the reference for 'RUNTEST xxx SEC' commands\n"
+ "\n"
+ "FILE file containing SVF commands\n"
+ ), "svf" );
+}
+
+cmd_t cmd_svf = {
+ "svf",
+ N_("execute svf commands from file"),
+ cmd_svf_help,
+ cmd_svf_run
+};
+
+
+/* Emacs specific variables
+;;; Local Variables: ***
+;;; indent-tabs-mode:t ***
+;;; tab-width:2 ***
+;;; End: ***
+*/
--- /dev/null
+/*
+ * $Id: test.c,v 1.0 2005/10/10 00:00:0 DJF $
+ *
+ * Copyright (C) 2005 Protoparts
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by David Farrell, 2005
+ * based on templates by and portions Written by Marcel Telka <marcel@telka.sk>, 2003.i
+ *
+ */
+
+#include "sysdep.h"
+
+#include <stdio.h>
+#include <string.h>
+//#include <stdlib.h>
+#include "part.h"
+#include "bssignal.h"
+#include "jtag.h"
+
+#include "cmd.h"
+
+static int
+cmd_test_run( chain_t *chain, char *params[] )
+{
+ int data;
+ unsigned int i;
+ signal_t *s;
+
+ if (cmd_params( params ) != 4)
+ return -1;
+
+ if (strcasecmp( params[1], "signal") != 0)
+ return -1;
+
+ if (!cmd_test_cable( chain ))
+ return 1;
+
+ if (!chain->parts) {
+ printf( _("Run \"detect\" first.\n") );
+ return 1;
+ }
+
+ if (chain->active_part >= chain->parts->len) {
+ printf( _("%s: no active part\n"), "get" );
+ return 1;
+ }
+
+ s = part_find_signal( chain->parts->parts[chain->active_part], params[2] );
+ if (!s) {
+ printf( _("signal '%s' not found\n"), params[2] );
+ return 1;
+ }
+
+ /* values 0,1,X since X is not a number, the following failure exits clean
+ * and doesnt test anything, as it should.
+ */
+ if (cmd_get_number( params[3], &i ))
+ return 1;
+
+ data = part_get_signal( chain->parts->parts[chain->active_part], s );
+ if (data != -1) {
+ if(data != i) {
+ printf( _("<FAIL>%s = %d\n"), params[2], data );
+ return -99;
+ }
+ }
+ return 1;
+}
+
+static void
+cmd_test_help( void )
+{
+ printf( _(
+ "Usage: %s SIGNAL 0/1\n"
+ "Test signal state from output BSR (Boundary Scan Register).\n"
+ "\n"
+ "SIGNAL signal name (from JTAG declaration file)\n"
+ ), "test signal" );
+}
+
+cmd_t cmd_test = {
+ "test",
+ N_("test external signal value"),
+ cmd_test_help,
+ cmd_test_run
+};
+
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2008 Stanislav Sinyagin
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Stanislav Sinyagin <ssinyagin@k-open.com>, 2008.
+ *
+ */
+
+#include "sysdep.h"
+
+#include <unistd.h>
+
+#include <stdio.h>
+#include <string.h>
+
+#include "jtag.h"
+#include "cmd.h"
+
+static int
+cmd_usleep_run( chain_t *chain, char *params[] )
+{
+ unsigned int usecs;
+
+ if (cmd_params( params ) != 2)
+ return -1;
+
+ if (cmd_get_number( params[1], &usecs ))
+ return -1;
+
+ usleep(usecs);
+
+ return 1;
+}
+
+static void
+cmd_usleep_help( void )
+{
+ printf( _(
+ "Usage: %s USECS\n"
+ "Sleep some number of microseconds.\n"
+ ), "usleep" );
+}
+
+cmd_t cmd_usleep = {
+ "usleep",
+ N_("Sleep some number of microseconds"),
+ cmd_usleep_help,
+ cmd_usleep_run
+};
--- /dev/null
+/*
+ * $Id$
+ *
+ * Written by Kent Palmkvist <kentp@isy.liu.se>, 2005
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ */
+
+#include "sysdep.h"
+
+#include <stdio.h>
+#include <stdint.h>
+
+#include "jtag.h"
+
+#include "cmd.h"
+
+static int
+cmd_writemem_run( chain_t *chain, char *params[] )
+{
+ uint32_t adr;
+ uint32_t len;
+ FILE *f;
+
+ if (cmd_params( params ) != 4)
+ return -1;
+
+ if (!bus) {
+ printf( _("Error: Bus driver missing.\n") );
+ return 1;
+ }
+
+ if (cmd_get_number( params[1], &adr) || cmd_get_number( params[2], &len))
+ return -1;
+
+ f = fopen( params[3], "r" );
+ if (!f) {
+ printf( _("Unable to open file `%s'!\n"), params[3] );
+ return 1;
+ }
+ writemem( bus, f, adr, len );
+ fclose( f );
+
+ return 1;
+}
+
+static void
+cmd_writemem_help( void )
+{
+ printf( _(
+ "Usage: %s ADDR LEN FILENAME\n"
+ "Write to device memory starting at ADDR the FILENAME file.\n"
+ "\n"
+ "ADDR start address of the written memory area\n"
+ "LEN written memory length\n"
+ "FILENAME name of the input file\n"
+ "\n"
+ "ADDR and LEN could be in decimal or hexadecimal (prefixed with 0x) form.\n"
+ "NOTE: This is NOT useful for FLASH programming!\n"
+ ), "writemem" );
+}
+
+cmd_t cmd_writemem = {
+ "writemem",
+ N_("write content of file to the memory"),
+ cmd_writemem_help,
+ cmd_writemem_run
+};
--- /dev/null
+#
+# $Id: Makefile.am 506 2003-08-13 10:05:15Z telka $
+#
+# Copyright (C) 2002 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Marcel Telka <marcel@telka.sk>, 2002.
+#
+
+include $(top_srcdir)/Makefile.rules
+
+noinst_LIBRARIES = libflash.a
+
+libflash_a_SOURCES = \
+ amd.c \
+ amd_flash.c \
+ cfi.c \
+ detectflash.c \
+ flash.c \
+ intel.c \
+ jedec.c
+
+if JEDEC_EXP
+libflash_a_SOURCES += \
+ jedec_exp.c
+endif
+
--- /dev/null
+/*
+ * $Id$
+ *
+ * Flash driver for AMD Am29LV640D, Am29LV641D, Am29LV642D
+ * Copyright (C) 2003 AH
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by August Hörandl <august.hoerandl@gmx.at>
+ * Modified by Marcel Telka <marcel@telka.sk>, 2003.
+ *
+ * Documentation:
+ * [1] Advanced Micro Devices, "Am29LV640D/Am29LV641D",
+ * September 20, 2002 Rev B, 22366b8.pdf
+ * [2] Advanced Micro Devices, "Am29LV642D",
+ * August 14, 2001 Rev A, 25022.pdf
+ * [3] Spansion, "S29GL-N MirrorBit Flash Family"
+ * October 13, 2006 Rev B, Amendment 3
+ *
+ */
+
+#include "sysdep.h"
+
+#include <stdint.h>
+#include <stdlib.h>
+#include <string.h>
+#include <stdio.h>
+#include <flash/cfi.h>
+#include <flash/intel.h>
+#include <unistd.h>
+
+#include <flash.h>
+#include <bus.h>
+
+static int dbg = 0;
+
+static int amd_flash_erase_block( cfi_array_t *cfi_array, uint32_t adr );
+static int amd_flash_unlock_block( cfi_array_t *cfi_array, uint32_t adr );
+static int amd_flash_program_single( cfi_array_t *cfi_array, uint32_t adr, uint32_t data );
+static int amd_flash_program_buffer( cfi_array_t *cfi_array, uint32_t adr, uint32_t *buffer, int count );
+static int amd_flash_program( cfi_array_t *cfi_array, uint32_t adr, uint32_t *buffer, int count );
+static int amd_flash_program32( cfi_array_t *cfi_array, uint32_t adr, uint32_t *buffer, int count );
+static void amd_flash_read_array( cfi_array_t *cfi_array );
+
+/* The code below assumes a connection of the flash chip address LSB (A0)
+ * to A0, A1 or A2 of the byte-addressed CPU bus dependent on the bus width.
+ *
+ * 8 Bit devices: A0..Ax connected to A0..Ax of CPU bus
+ * 8/16 Bit devices: A0..Ax connected to A1..Ax+1 of CPU bus
+ * 16 Bit devices: A0..Ax connected to A1..Ax+1 of CPU bus
+ * 16/32 Bit devices: A0..Ax connected to A2..Ax+2 of CPU bus
+ * 32 Bit devices: A0..Ax connected to A2..Ax+2 of CPU bus
+ *
+ * The offset computed by amd_flash_address_shift() is used here dependent on
+ * the bus width (8, 16 or 32 bit) to align the patterns emitted on the
+ * address lines at either A0, A1 or A2. */
+
+/* NOTE: It does not work for SoC chips or boards with extra address decoders
+ * that do address alignment themselves, such as the Samsung S3C4510B. The bus
+ * driver has to deal with this. - kawk 2008-01 */
+
+static int
+amd_flash_address_shift( cfi_array_t *cfi_array )
+{
+ if(cfi_array->bus_width == 4) return 2;
+
+ /* else: cfi_array->bus_width is 2 (16 bit) or 1 (8 bit): */
+
+ switch( cfi_array->cfi_chips[0]->cfi.device_geometry.device_interface )
+ {
+ case CFI_INTERFACE_X8_X16: /* regardless whether 8 or 16 bit mode */
+ case CFI_INTERFACE_X16: /* native */
+ return 1;
+
+ case CFI_INTERFACE_X16_X32: /* e.g. 32 bit flash in 16 bit mode */
+ case CFI_INTERFACE_X32: /* unlikely */
+ return 2;
+
+ default: break;
+ }
+
+ if(cfi_array->bus_width == 2) return 1;
+
+ return 0;
+}
+
+/* autodetect, we can handle this chip */
+static int
+amd_flash_autodetect32( cfi_array_t *cfi_array )
+{
+ if(cfi_array->bus_width != 4) return 0;
+ return (cfi_array->cfi_chips[0]->cfi.identification_string.pri_id_code == CFI_VENDOR_AMD_SCS);
+}
+
+static int
+amd_flash_autodetect16( cfi_array_t *cfi_array )
+{
+ if(cfi_array->bus_width != 2) return 0;
+ return (cfi_array->cfi_chips[0]->cfi.identification_string.pri_id_code == CFI_VENDOR_AMD_SCS);
+}
+
+static int
+amd_flash_autodetect8( cfi_array_t *cfi_array )
+{
+ if(cfi_array->bus_width != 1) return 0;
+ return (cfi_array->cfi_chips[0]->cfi.identification_string.pri_id_code == CFI_VENDOR_AMD_SCS);
+}
+/*
+ * check device status
+ * 1/true PASS
+ * 0/false FAIL
+ */
+/*
+ * first implementation: see [1], page 29
+ */
+#if 0
+static int
+amdstatus29( cfi_array_t *cfi_array, uint32_t adr, int data )
+{
+ bus_t *bus = cfi_array->bus;
+ int o = amd_flash_address_shift( cfi_array );
+ int timeout;
+ uint32_t dq7mask = ((1 << 7) << 16) + (1 << 7);
+ uint32_t dq5mask = ((1 << 5) << 16) + (1 << 5);
+ uint32_t bit7 = (data & (1 << 7)) != 0;
+ uint32_t data1;
+
+ for (timeout = 0; timeout < 100; timeout++) {
+ data1 = bus_read( bus, adr << o );
+ data1 = bus_read( bus, adr << o );
+ if (dbg)
+ printf( "amdstatus %d: %04X (%04X) = %04X\n", timeout, data1, (data1 & dq7mask), bit7 );
+ if (((data1 & dq7mask) == dq7mask) == bit7) /* FIXME: This looks non-portable */
+ return 1;
+
+ if ((data1 & dq5mask) == dq5mask)
+ break;
+ usleep( 100 );
+ }
+
+ data1 = bus_read( bus, adr << o );
+ if (((data1 & dq7mask) == dq7mask) == bit7) /* FIXME: This looks non-portable */
+ return 1;
+
+ return 0;
+}
+#endif /* 0 */
+
+
+#if 1
+/*
+ * second implementation: see [1], page 30
+ */
+static int
+amdstatus( cfi_array_t *cfi_array, uint32_t adr, int data )
+{
+ bus_t *bus = cfi_array->bus;
+
+ int timeout;
+ uint32_t togglemask = ((1 << 6) << 16) + (1 << 6); /* DQ 6 */
+ /* int dq5mask = ((1 << 5) << 16) + (1 << 5); DQ5 */
+
+ for (timeout = 0; timeout < 7000; timeout++) {
+ uint32_t data1 = bus_read( bus, adr );
+ uint32_t data2 = bus_read( bus, adr );
+
+ /*printf("amdstatus %d: %04X/%04X %04X/%04X \n", */
+ /* timeout, data1, data2, (data1 & togglemask), (data2 & togglemask)); */
+ if ( (data1 & togglemask) == (data2 & togglemask))
+ return 1;
+
+ /* if ( (data1 & dq5mask) != 0 ) TODO */
+ /* return 0; */
+ if (dbg)
+ printf( "amdstatus %d: %04X/%04X\n", timeout, data1, data2 );
+ usleep( 100 );
+ }
+ return 0;
+}
+
+#else /* 1 */
+
+/* Note: This implementation of amdstatus() has been added by patch
+ [ 1429825 ] EJTAG driver (some remaining patch lines for flash/amd.c)
+ It's a quirk workaround and seems to break status polling for other chips.
+ Therefore it's deactivated at the moment but kept for reference. */
+/*
+ * second implementation: see [1], page 30
+ */
+static int
+amdstatus( cfi_array_t *cfi_array, uint32_t adr, int data )
+{
+ bus_t *bus = cfi_array->bus;
+ int o = amd_flash_address_shift( cfi_array );
+ int timeout;
+ uint32_t togglemask = ((1 << 6) << 16) + (1 << 6); /* DQ 6 */
+ /* int dq5mask = ((1 << 5) << 16) + (1 << 5); DQ5 */
+ uint32_t data1, data2;
+
+ data1 = bus_read( bus, adr );
+ for (timeout = 0; timeout < 100; timeout++) {
+ data2 = bus_read( bus, adr );
+
+
+ /*printf("amdstatus %d: %04X/%04X %04X/%04X \n", */
+ /* timeout, data1, data2, (data1 & togglemask), (data2 & togglemask)); */
+ /* Work around an issue with RTL8181: toggle bits don't
+ toggle when reading the same flash address repeatedly
+ without any other memory access in between. Other
+ bits reflect the current status, and data after the
+ operation is complete - only Q6/Q2 bits don't toggle
+ when they should. Looks like the CPU not deasserting
+ CE or OE, so data is output to the bus continuously.
+ So, check for the correct data read twice instead. */
+ /*if ( (data1 & togglemask) == (data2 & togglemask)) */
+ if ( (data1 == data) && (data2 == data) )
+ return 1;
+
+ /* if ( (data1 & dq5mask) != 0 ) TODO */
+ /* return 0; */
+ if (dbg)
+ printf( "amdstatus %d: %04X/%04X\n", timeout, data1, data2 );
+ else
+ printf( "." );
+ usleep( 100 );
+ data1 = data2;
+ }
+ return 0;
+}
+
+#endif /* 0 */
+
+#if 0
+static int
+amdisprotected( parts *ps, cfi_array_t *cfi_array, uint32_t adr )
+{
+ uint32_t data;
+ int o = amd_flash_address_shift( cfi_array );
+
+ bus_write( ps, cfi_array->address + (0x0555 << o), 0x00aa00aa ); /* autoselect p29, sector erase */
+ bus_write( ps, cfi_array->address + (0x02aa << o), 0x00550055 );
+ bus_write( ps, cfi_array->address + (0x0555 << o), 0x00900090 );
+
+ data = bus_read( ps, adr + (0x0002 << 2) );
+ /* Read Array */
+ amd_flash_read_array( ps ); /* AMD reset */
+
+ return ((data & 0x00ff00ff) != 0);
+}
+#endif /* 0 */
+
+static void
+amd_flash_print_info( cfi_array_t *cfi_array )
+{
+ int mid, cid, prot;
+ bus_t *bus = cfi_array->bus;
+ int o = amd_flash_address_shift( cfi_array );
+
+ bus_write( bus, cfi_array->address + (0x0555 << o), 0x00aa00aa ); /* autoselect p29 */
+ bus_write( bus, cfi_array->address + (0x02aa << o), 0x00550055 );
+ bus_write( bus, cfi_array->address + (0x0555 << o), 0x00900090 );
+ mid = bus_read( bus, cfi_array->address + (0x00 << o) ) & 0xFFFF;
+ cid = bus_read( bus, cfi_array->address + (0x01 << o) ) & 0xFFFF;
+ prot = bus_read( bus, cfi_array->address + (0x02 << o) ) & 0xFF;
+ amd_flash_read_array( cfi_array ); /* AMD reset */
+ printf( _("Chip: AMD Flash\n\tManufacturer: ") );
+ switch (mid) {
+ case 0x0001:
+ printf( "AMD" );
+ printf( _("\n\tChip: ") );
+ switch (cid) {
+ case 0x0049:
+ printf( "AM29LV160DB" );
+ break;
+ case 0x0093:
+ printf( "Am29LV065D" );
+ break;
+ case 0x004F:
+ printf( "Am29LV040B" );
+ break;
+ case 0x22D7:
+ printf( "Am29LV640D/Am29LV641D/Am29LV642D" );
+ break;
+ case 0x225B:
+ printf( "Am29LV800B" );
+ break;
+ case 0x227E: /* 16-bit mode */
+ case 0x007E: /* 8-bit mode */
+ printf( "S29GLxxxN" );
+ break;
+ default:
+ printf ( _("Unknown (ID 0x%04x)"), cid );
+ break;
+ }
+ break;
+ case 0x001f:
+ printf( "Atmel" );
+ printf( _("\n\tChip: ") );
+ switch (cid) {
+ case 0x01d2:
+ printf( "AT49BW642DT" );
+ break;
+ case 0x01d6:
+ printf( "AT49BW642D" );
+ break;
+ default:
+ printf ( _("Unknown (ID 0x%04x)"), cid );
+ break;
+ }
+ break;
+ case 0x0020:
+ printf( "ST/Samsung" );
+ printf( _("\n\tChip: ") );
+ switch (cid) {
+ case 0x00ca:
+ printf( "M29W320DT" );
+ break;
+ case 0x00cb:
+ printf( "M29W320DB" );
+ break;
+ case 0x22ed:
+ printf( "M29W640DT" );
+ break;
+ default:
+ printf ( _("Unknown (ID 0x%04x)"), cid );
+ break;
+ }
+ break;
+ case 0x00C2:
+ printf( "Macronix" );
+ printf( _("\n\tChip: ") );
+ switch (cid) {
+ case 0x2249:
+ printf( "MX29LV160B" );
+ break;
+ case 0x22CB:
+ printf( "MX29LV640B" );
+ break;
+ default:
+ printf ( _("Unknown (ID 0x%04x)"), cid );
+ break;
+ }
+ break;
+ default:
+ printf( _("Unknown manufacturer (ID 0x%04x) Chip (ID 0x%04x)"), mid, cid );
+ break;
+ }
+ printf( _("\n\tProtected: %04x\n"), prot );
+
+ /* Read Array */
+ bus_write( bus, cfi_array->address + (0x0000 << o), 0x00ff00ff );
+}
+
+static int
+amd_flash_erase_block( cfi_array_t *cfi_array, uint32_t adr )
+{
+ bus_t *bus = cfi_array->bus;
+ int o = amd_flash_address_shift( cfi_array );
+
+ printf("flash_erase_block 0x%08X\n", adr);
+
+ /* printf("protected: %d\n", amdisprotected(ps, cfi_array, adr)); */
+
+ bus_write( bus, cfi_array->address + (0x0555 << o), 0x00aa00aa ); /* autoselect p29, sector erase */
+ bus_write( bus, cfi_array->address + (0x02aa << o), 0x00550055 );
+ bus_write( bus, cfi_array->address + (0x0555 << o), 0x00800080 );
+ bus_write( bus, cfi_array->address + (0x0555 << o), 0x00aa00aa );
+ bus_write( bus, cfi_array->address + (0x02aa << o), 0x00550055 );
+ bus_write( bus, adr, 0x00300030 );
+
+ if (amdstatus( cfi_array, adr, 0xffff )) {
+ printf( "flash_erase_block 0x%08X DONE\n", adr );
+ amd_flash_read_array( cfi_array ); /* AMD reset */
+ return 0;
+ }
+ printf( "flash_erase_block 0x%08X FAILED\n", adr );
+ /* Read Array */
+ amd_flash_read_array( cfi_array ); /* AMD reset */
+
+ return FLASH_ERROR_UNKNOWN;
+}
+
+static int
+amd_flash_unlock_block( cfi_array_t *cfi_array, uint32_t adr )
+{
+ printf( "flash_unlock_block 0x%08X IGNORE\n", adr );
+ return 0;
+}
+
+static int
+amd_flash_program_single( cfi_array_t *cfi_array, uint32_t adr, uint32_t data )
+{
+ int status;
+ bus_t *bus = cfi_array->bus;
+ int o = amd_flash_address_shift( cfi_array );
+
+ if (dbg)
+ printf("\nflash_program 0x%08X = 0x%08X\n", adr, data);
+
+ bus_write( bus, cfi_array->address + (0x0555 << o), 0x00aa00aa ); /* autoselect p29, program */
+ bus_write( bus, cfi_array->address + (0x02aa << o), 0x00550055 );
+ bus_write( bus, cfi_array->address + (0x0555 << o), 0x00A000A0 );
+
+ bus_write( bus, adr, data );
+ status = amdstatus( cfi_array, adr, data );
+ /* amd_flash_read_array(ps); */
+
+ return !status;
+}
+
+static int
+amd_program_buffer_status( cfi_array_t *cfi_array, uint32_t adr, uint32_t data )
+{
+ /* NOTE: Status polling according to [3], Figure 1.
+ The current method for status polling is not compatible with 32 bit (2x16) configurations
+ since it only checks the DQ7 bit of the lower chip. */
+ bus_t *bus = cfi_array->bus;
+ int timeout;
+ const uint32_t dq7mask = (1 << 7);
+ const uint32_t dq5mask = (1 << 5);
+ uint32_t bit7 = data & dq7mask;
+ uint32_t data1;
+
+ for (timeout = 0; timeout < 7000; timeout++) {
+ data1 = bus_read( bus, adr );
+ if (dbg)
+ printf( "amd_program_buffer_status %d: %04X (%04X) = %04X\n", timeout, data1, (data1 & dq7mask), bit7 );
+ if ((data1 & dq7mask) == bit7)
+ return 1;
+
+ if ((data1 & dq5mask) == dq5mask)
+ break;
+ usleep( 100 );
+ }
+
+ data1 = bus_read( bus, adr );
+ if ((data1 & dq7mask) == bit7)
+ return 1;
+
+ return 0;
+}
+
+static int
+amd_flash_program_buffer( cfi_array_t *cfi_array, uint32_t adr, uint32_t *buffer, int count )
+{
+ /* NOTE: Write buffer programming operation according to [3], Figure 1. */
+ int status;
+ bus_t *bus = cfi_array->bus;
+ cfi_chip_t *cfi_chip = cfi_array->cfi_chips[0];
+ int o = amd_flash_address_shift( cfi_array );
+ int wb_bytes = cfi_chip->cfi.device_geometry.max_bytes_write;
+ int chip_width = cfi_chip->width;
+ int offset = 0;
+
+ if (dbg)
+ printf("\nflash_program_buffer 0x%08X, count 0x%08X\n", adr, count);
+
+ while (count > 0) {
+ int wcount, idx;
+ uint32_t sa = adr;
+
+ /* determine length of next multi-byte write */
+ wcount = wb_bytes - (adr % wb_bytes);
+ wcount /= chip_width;
+ if (wcount > count)
+ wcount = count;
+
+ bus_write( bus, cfi_array->address + (0x0555 << o), 0x00aa00aa );
+ bus_write( bus, cfi_array->address + (0x02aa << o), 0x00550055 );
+ bus_write( bus, adr, 0x00250025 );
+ bus_write( bus, sa, wcount-1 );
+
+ /* write payload to write buffer */
+ for (idx = 0; idx < wcount; idx++) {
+ bus_write( bus, adr, buffer[offset + idx] );
+ adr += cfi_array->bus_width;
+ }
+ offset += wcount;
+
+ /* program buffer to flash */
+ bus_write( bus, sa, 0x00290029 );
+
+ status = amd_program_buffer_status( cfi_array, adr - cfi_array->bus_width, buffer[offset - 1] );
+ /* amd_flash_read_array(ps); */
+ if (status != 1)
+ return 1;
+
+ count -= wcount;
+ }
+
+ return 0;
+}
+
+static int
+amd_flash_program( cfi_array_t *cfi_array, uint32_t adr, uint32_t *buffer, int count )
+{
+ cfi_query_structure_t *cfi = &(cfi_array->cfi_chips[0]->cfi);
+ int max_bytes_write = cfi->device_geometry.max_bytes_write;
+
+#ifndef FLASH_MULTI_BYTE
+ max_bytes_write = 0;
+#endif
+
+ /* multi-byte writes supported? */
+ if (max_bytes_write > 1)
+ return amd_flash_program_buffer( cfi_array, adr, buffer, count );
+
+ else {
+ /* unroll buffer to single writes */
+ int idx;
+
+ for (idx = 0; idx < count; idx++) {
+ int status = amd_flash_program_single( cfi_array, adr, buffer[idx] );
+ if (status)
+ return status;
+ adr += cfi_array->bus_width;
+ }
+ }
+
+ return 0;
+}
+
+static int
+amd_flash_program32( cfi_array_t *cfi_array, uint32_t adr, uint32_t *buffer, int count )
+{
+ /* Single byte programming is forced for 32 bit (2x16) flash configuration.
+ a) lack of testing capbilities for 2x16 multi-byte write operation
+ b) amd_flash_program_buffer() is not 2x16 compatible at the moment
+ due to insufficiency of amd_program_buffer_status()
+ Closing these issues will obsolete amd_flash_program32(). */
+ int idx;
+
+ /* unroll buffer to single writes */
+ for (idx = 0; idx < count; idx++) {
+ int status = amd_flash_program_single( cfi_array, adr, buffer[idx] );
+ if (status)
+ return status;
+ adr += cfi_array->bus_width;
+ }
+
+ return 0;
+}
+
+static void
+amd_flash_read_array( cfi_array_t *cfi_array )
+{
+ /* Read Array */
+ bus_write( cfi_array->bus, cfi_array->address, 0x00F000F0 ); /* AMD reset */
+}
+
+flash_driver_t amd_32_flash_driver = {
+ 4, /* buswidth */
+ N_("AMD/Fujitsu Standard Command Set"),
+ N_("supported: AMD 29LV640D, 29LV641D, 29LV642D; 2x16 Bit"),
+ amd_flash_autodetect32,
+ amd_flash_print_info,
+ amd_flash_erase_block,
+ amd_flash_unlock_block,
+ amd_flash_program32,
+ amd_flash_read_array,
+};
+
+flash_driver_t amd_16_flash_driver = {
+ 2, /* buswidth */
+ N_("AMD/Fujitsu Standard Command Set"),
+ N_("supported: AMD 29LV800B, S29GLxxxN; MX29LV640B; 1x16 Bit"),
+ amd_flash_autodetect16,
+ amd_flash_print_info,
+ amd_flash_erase_block,
+ amd_flash_unlock_block,
+ amd_flash_program,
+ amd_flash_read_array,
+};
+
+flash_driver_t amd_8_flash_driver = {
+ 1, /* buswidth */
+ N_("AMD/Fujitsu Standard Command Set"),
+ N_("supported: AMD 29LV160, AMD 29LV065D, AMD 29LV040B, S29GLxxxN; 1x8 Bit"),
+ amd_flash_autodetect8,
+ amd_flash_print_info,
+ amd_flash_erase_block,
+ amd_flash_unlock_block,
+ amd_flash_program,
+ amd_flash_read_array,
+};
--- /dev/null
+/*
+ * $Id: amd_flash.c,v 1.0 20/09/2006 12:38:01 $
+ *
+ * AMD 8 bit flash driver for AM29F040B & AM29LV040B
+ * Copyright (C) 2006 Kila Medical Systems.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Ajith Kumar P.C <ajithpc@kila.com>
+ *
+ * Documentation:
+ * [1] Spansion, Am29F040B Data Sheet
+ * [2] Spansion, Am29LV040B Data Sheet
+*/
+
+#include "sysdep.h"
+
+#include <stdint.h>
+#include <stdlib.h>
+#include <string.h>
+#include <stdio.h>
+#include <flash/cfi.h>
+#include <flash/intel.h>
+#include <unistd.h>
+
+#include <jtag.h>
+#include <flash.h>
+#include <bus.h>
+
+//write specific
+#define AMD_SECTOR_PROTECTED
+
+//Read Specific
+#define AMD_READ_IN_ERASE_SUSPENDED_SECTOR
+#define AMD_READ_IN_NON_ERASE_SUSPENDED_SECTOR
+#define AMD_NORMAL_READ
+#define AMD_UNKNOWN_READ
+
+//Mode
+#define AMD_ERASE_SUSPEND_MODE
+#define AMD_READING_MODE
+#define AMD_EMBEDDED_ERASE_ALGORITHM
+#define AMD_EMBEDDED_PROGRAM_ALGORITHM
+#define AMD_UNDEFINED_MODE
+
+#define FLASH_ERASE_ERROR -5
+#define ERASE_FLASH_SUCCESS 1
+
+#define AMD_29xx040B 1
+
+#define AMD_BYPASS_UNLOCK_ALGORITHM 1
+#define AMD_STANDARD_WRITE_ALGORITHM 0
+#define AMD_BYPASS_UNLOCK_MODE 1
+#define AMD_STANDARD_MODE 0
+
+struct
+{
+ unsigned long flash;
+ unsigned short algorithm;
+ unsigned short unlock_bypass;
+}
+var_forced_detection;
+
+int amd_detect(bus_t *bus, uint32_t adr, cfi_array_t **cfi_array );
+static int amd_29xx040_autodetect( cfi_array_t *cfi_array );
+static int amd_29xx040_status( bus_t *bus, uint32_t adr, unsigned short data );
+static void amd_29xx040_print_info( cfi_array_t *cfi_array );
+static void amd_29xx040_read_array( cfi_array_t *cfi_array );
+static int amd_29xx040_erase_block( cfi_array_t *cfi_array, uint32_t adr );
+static int amd_29xx040_program_single( cfi_array_t *cfi_array, uint32_t adr, uint32_t data );
+static int amd_29xx040_program( cfi_array_t *cfi_array, uint32_t adr, uint32_t *buffer, int count );
+static int amd_29xx040_unlock_block( cfi_array_t *cfi_array, uint32_t adr );
+
+int amd_detect(bus_t *bus, uint32_t adr, cfi_array_t **cfi_array )
+{
+ int mid;
+ int did;
+ bus_area_t area;
+ cfi_query_structure_t *cfi ;
+
+ if (!cfi_array || !bus)
+ return -1; /* invalid parameters */
+
+ *cfi_array = calloc( 1, sizeof (cfi_array_t) );
+ if (!*cfi_array)
+ return -2; /* out of memory */
+
+ bus_write( bus, adr+0x0, 0xf0 );
+ bus_write( bus, adr+0x555, 0xaa );
+ bus_write( bus, adr+0x2AA, 0x55 );
+ bus_write( bus, adr+0x555, 0x90 );
+ mid = bus_read( bus, adr+0x0);
+ did = bus_read( bus, adr+0x1);
+ bus_write( bus, adr+0x0, 0xf0 );
+
+ printf( "%s: mid %x, did %x\n", __FUNCTION__, mid, did );
+ if (mid != 0x01)
+ return -1;
+
+ switch(did)
+ {
+ case 0xA4:
+ var_forced_detection.flash = AMD_29xx040B;
+ break;
+ case 0x4F:
+ var_forced_detection.flash = AMD_29xx040B;
+ var_forced_detection.algorithm = AMD_BYPASS_UNLOCK_ALGORITHM;
+ break;
+ default:
+ break;
+ }
+
+ (*cfi_array)->bus = bus;
+ (*cfi_array)->address = 0;
+ if (bus_area( bus, adr+0, &area ) != URJTAG_STATUS_OK)
+ return -8; /* bus width detection failed */
+ unsigned int bw = area.width;
+ int ba,i;
+ if (bw != 8 && bw != 16 && bw != 32)
+ return -3; /* invalid bus width */
+ (*cfi_array)->bus_width = ba = bw / 8;
+ (*cfi_array)->cfi_chips = calloc( ba, sizeof (cfi_chip_t *) );
+ if (!(*cfi_array)->cfi_chips)
+ return -2;
+ for ( i=0; i<ba; i++ )
+ {
+ (*cfi_array)->cfi_chips[i] = calloc( 1, sizeof (cfi_chip_t) );
+ if (!(*cfi_array)->cfi_chips[i])
+ return -2; /* out of memory */
+ (*cfi_array)->cfi_chips[i]->width = 1; //ba;
+ cfi = &(*cfi_array)->cfi_chips[i]->cfi;
+
+ cfi->identification_string.pri_id_code = CFI_VENDOR_NULL;
+ cfi->identification_string.pri_vendor_tbl = NULL;
+ cfi->identification_string.alt_id_code = 0;
+ cfi->identification_string.alt_vendor_tbl = NULL;
+
+ cfi->device_geometry.device_size = 512*1024;
+ cfi->device_geometry.device_interface = 0; // x 8
+ cfi->device_geometry.max_bytes_write = 32; //not used
+ cfi->device_geometry.number_of_erase_regions = 1;
+ cfi->device_geometry.erase_block_regions =
+ malloc( cfi->device_geometry.number_of_erase_regions * sizeof (cfi_erase_block_region_t) );
+ if (!cfi->device_geometry.erase_block_regions)
+ return -2; /* out of memory */
+
+ cfi->device_geometry.erase_block_regions[i].erase_block_size = 64 * 1024;
+ cfi->device_geometry.erase_block_regions[i].number_of_erase_blocks = 8;
+ //Add other details for info
+ }
+ return 0;
+}
+
+
+static int amd_29xx040_autodetect( cfi_array_t *cfi_array )
+{
+ return(var_forced_detection.flash == AMD_29xx040B); //Non-CFI Am29xx040B flash
+}
+
+static int amd_29xx040_status( bus_t *bus, uint32_t adr, unsigned short data )
+{
+ short timeout;
+ unsigned short dq7bit,dq7mask,dq5mask;
+ unsigned short data1;
+
+ dq7mask = (1 << 7);
+ dq5mask = (1 << 5);
+ dq7bit = data & dq7mask;
+
+ for (timeout = 0; timeout < 1000; timeout++) //typical sector erase time = 0.7 sec
+ {
+ data1 = (unsigned short)(bus_read( bus, adr ) & 0xFF);
+ if((data1 & dq7mask) == dq7bit)
+ return 1; //Success
+
+ if((data1 & dq5mask) == dq5mask)
+ {
+ data1 = (unsigned short)(bus_read( bus, adr ) & 0xFF);
+ if((data1 & dq7mask) == dq7bit)
+ {
+ return 1; //Success
+ }
+ else
+ {
+ return 0; //Failure - Needs a reset command to return back to read array data
+ }
+ }
+ usleep (50);
+ }
+
+ return 0; //hardware failure
+}
+
+
+
+static void amd_29xx040_print_info( cfi_array_t *cfi_array )
+{
+ int mid, did, prot;
+ bus_t *bus = cfi_array->bus;
+
+
+ bus_write( bus, cfi_array->address + 0x0, 0xf0 );
+ bus_write( bus, cfi_array->address + 0x555, 0xaa );
+ bus_write( bus, cfi_array->address + 0x2AA, 0x55 );
+ bus_write( bus, cfi_array->address + 0x555, 0x90 );
+ mid = bus_read( bus, cfi_array->address + 0x0);
+ did = bus_read( bus, cfi_array->address + 0x1);
+ prot = bus_read( bus, cfi_array->address + 0x2);
+ bus_write( bus, cfi_array->address + 0x0, 0xf0 );
+
+ printf( "%s: mid %x, did %x\n", __FUNCTION__, mid, did );
+// amd_29xx040_read_array( cfi_array ); /* AMD reset */
+
+ switch (mid)
+ {
+ case 0x01:
+ printf( _("Chip: AMD Flash\n\tPartNumber: ") );
+ break;
+ default:
+ printf( _("Unknown manufacturer (ID 0x%04x)"), mid );
+ break;
+ }
+ printf( _("\n\tChip: ") );
+ switch (did) {
+ case 0xA4:
+ printf( "Am29C040B\t-\t" );
+ printf( _("5V Flash\n") );
+ break;
+ case 0x4F:
+ printf( "Am29LV040B\t-\t" );
+ printf( _("3V Flash\n") );
+ break;
+ default:
+ printf ( _("Unknown (ID 0x%04x)"), did );
+ break;
+ }
+ printf( _("\n\tProtected: %04x\n"), prot );
+}
+
+static void amd_29xx040_read_array( cfi_array_t *cfi_array )
+{
+ /* Read Array */
+ if(var_forced_detection.unlock_bypass == AMD_BYPASS_UNLOCK_MODE)
+ {
+ bus_write( cfi_array->bus, cfi_array->address + 0x555, 0x90 );
+ bus_write( cfi_array->bus, cfi_array->address + 0x2AA, 0x00 );
+ usleep(100);
+ var_forced_detection.unlock_bypass = AMD_STANDARD_MODE;
+ }
+ bus_write( cfi_array->bus, cfi_array->address + 0x0, 0x0F0 ); /* AMD reset */
+}
+
+
+
+static int amd_29xx040_erase_block( cfi_array_t *cfi_array, uint32_t adr )
+{
+ bus_t *bus = cfi_array->bus;
+
+ printf("flash_erase_block 0x%08X\n", adr);
+
+ /* printf("protected: %d\n", amdisprotected(ps, adr)); */
+
+ if(var_forced_detection.unlock_bypass == AMD_BYPASS_UNLOCK_MODE)
+ {
+ bus_write( bus, cfi_array->address + 0x555, 0x90 );
+ bus_write( bus, cfi_array->address + 0x2AA, 0x00 );
+ usleep(100);
+ var_forced_detection.unlock_bypass = AMD_STANDARD_MODE;
+ }
+
+ bus_write( bus, cfi_array->address + 0x0, 0xf0 );
+ bus_write( bus, cfi_array->address + 0x555, 0xaa );
+ bus_write( bus, cfi_array->address + 0x2AA, 0x55 );
+ bus_write( bus, cfi_array->address + 0x555, 0x80 );
+ bus_write( bus, cfi_array->address + 0x555, 0xaa );
+ bus_write( bus, cfi_array->address + 0x2AA, 0x55 );
+// bus_write( bus, cfi_array->address + 0x555, 0x10 ); //Chip Erase
+ bus_write( bus, adr, 0x30 ); //Sector erase
+
+
+ if (amd_29xx040_status( bus, adr, 0xff )) {
+ printf( "flash_erase_block 0x%08X DONE\n", adr );
+ amd_29xx040_read_array( cfi_array ); /* AMD reset */
+ return ERASE_FLASH_SUCCESS;
+ }
+ printf( "flash_erase_block 0x%08X FAILED\n", adr );
+ /* Read Array */
+ amd_29xx040_read_array( cfi_array ); /* AMD reset */
+
+ return FLASH_ERASE_ERROR;
+}
+
+static int amd_29xx040_program_single( cfi_array_t *cfi_array, uint32_t adr, uint32_t data )
+{
+ int status;
+ bus_t *bus = cfi_array->bus;
+
+ if (0)
+ printf("\nflash_program 0x%08X = 0x%08X\n", adr, data);
+ if(var_forced_detection.algorithm == AMD_BYPASS_UNLOCK_ALGORITHM)
+ {
+ if(var_forced_detection.unlock_bypass != AMD_BYPASS_UNLOCK_MODE)
+ {
+ bus_write( bus, cfi_array->address + 0x555, 0xaa );
+ bus_write( bus, cfi_array->address + 0x2AA, 0x55 );
+ bus_write( bus, cfi_array->address + 0x555, 0x20 );
+ usleep(1000);
+ var_forced_detection.unlock_bypass = AMD_BYPASS_UNLOCK_MODE;
+ }
+ }
+ else
+ {
+ bus_write( bus, cfi_array->address + 0x555, 0xaa );
+ bus_write( bus, cfi_array->address + 0x2AA, 0x55 );
+ }
+
+ bus_write( bus, cfi_array->address + 0x555, 0xA0 );
+ bus_write( bus, adr, data );
+ status = amd_29xx040_status( bus, adr, data );
+ /* amd_29xx040_read_array(cfi_array); */
+
+ return !status;
+}
+
+static int amd_29xx040_program( cfi_array_t *cfi_array, uint32_t adr, uint32_t *buffer, int count )
+{
+ int idx;
+
+ /* unroll buffer to single writes */
+ for (idx = 0; idx < count; idx++) {
+ int status = amd_29xx040_program_single( cfi_array, adr, buffer[idx] );
+ if (status)
+ return status;
+ adr += cfi_array->bus_width;
+ }
+
+ return 0;
+}
+
+static int amd_29xx040_unlock_block( cfi_array_t *cfi_array, uint32_t adr )
+{
+ printf( "flash_unlock_block 0x%08X IGNORE\n", adr );
+ return 0;
+}
+
+
+flash_driver_t amd_29xx040_flash_driver = {
+ 1, /* buswidth */
+ N_("AMD Standard Command Set"),
+ N_("supported: AMD 29LV040B, 29C040B, 1x8 Bit"),
+ amd_29xx040_autodetect,
+ amd_29xx040_print_info,
+ amd_29xx040_erase_block,
+ amd_29xx040_unlock_block,
+ amd_29xx040_program,
+ amd_29xx040_read_array,
+};
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2002, 2003 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2002, 2003.
+ *
+ * Documentation:
+ * [1] JEDEC Solid State Technology Association, "Common Flash Interface (CFI)",
+ * September 1999, Order Number: JESD68
+ * [2] Intel Corporation, "Common Flash Interface (CFI) and Command Sets
+ * Application Note 646", April 2000, Order Number: 292204-004
+ *
+ */
+
+#include "sysdep.h"
+
+#include <stdint.h>
+#include <stdlib.h>
+#include <flash/cfi.h>
+
+#include <jtag.h>
+#include <flash.h>
+#include <bus.h>
+
+void
+cfi_array_free( cfi_array_t *cfi_array )
+{
+ if (!cfi_array)
+ return;
+
+ if (cfi_array->cfi_chips) {
+ int i;
+
+ for (i = 0; i < cfi_array->bus_width; i++) {
+ if (!cfi_array->cfi_chips[i])
+ continue;
+
+ free( cfi_array->cfi_chips[i]->cfi.device_geometry.erase_block_regions );
+ if (cfi_array->cfi_chips[i]->cfi.identification_string.pri_vendor_tbl)
+ free (cfi_array->cfi_chips[i]->cfi.identification_string.pri_vendor_tbl);
+ free( cfi_array->cfi_chips[i] );
+ }
+ free( cfi_array->cfi_chips );
+ }
+
+ free( cfi_array );
+}
+
+int
+cfi_detect( bus_t *bus, uint32_t adr, cfi_array_t **cfi_array )
+{
+ unsigned int bw; /* bus width */
+ unsigned int d; /* data offset */
+ int ba; /* bus width address multiplier */
+ int ma; /* flash mode address multiplier */
+ bus_area_t area;
+
+ if (!cfi_array || !bus)
+ return -1; /* invalid parameters */
+
+ *cfi_array = calloc( 1, sizeof (cfi_array_t) );
+ if (!*cfi_array)
+ return -2; /* out of memory */
+
+ (*cfi_array)->bus = bus;
+ (*cfi_array)->address = adr;
+ if (bus_area( bus, adr, &area ) != URJTAG_STATUS_OK)
+ return -8; /* bus width detection failed */
+ bw = area.width;
+ if (bw != 8 && bw != 16 && bw != 32)
+ return -3; /* invalid bus width */
+ (*cfi_array)->bus_width = ba = bw / 8;
+ (*cfi_array)->cfi_chips = calloc( ba, sizeof (cfi_chip_t *) );
+ if (!(*cfi_array)->cfi_chips)
+ return -2; /* out of memory */
+
+ for (d = 0; d < bw; d += 8) {
+#define A(off) (adr + (off) * ba * ma)
+#define D(data) ((data) << d)
+#define gD(data) (((data) >> d) & 0xFF)
+#define read1(off) gD(bus_read( bus, A(off) ))
+#define read2(off) (bus_read_start( bus, A(off) ), gD(bus_read_next( bus, A((off) + 1) )) | gD(bus_read_end( bus )) << 8)
+#define write1(off,data) bus_write( bus, A(off), D(data) )
+
+ cfi_query_structure_t *cfi;
+ uint32_t tmp;
+ int ret = -4; /* CFI not detected (Q) */
+ uint16_t pri_vendor_tbl_adr;
+
+ /* detect CFI capable devices - see Table 1 in [1] */
+ for (ma = 1; ma <= 4; ma *= 2) {
+ write1( CFI_CMD_QUERY_OFFSET, CFI_CMD_QUERY );
+
+ if (read1(CFI_QUERY_ID_OFFSET) == 'Q') {
+ ret = -5; /* CFI not detected (R) */
+ if (read1(CFI_QUERY_ID_OFFSET + 1) == 'R')
+ break;
+ }
+
+ write1( 0, CFI_CMD_READ_ARRAY1 );
+ }
+
+ if (ma > 4)
+ return ret; /* CFI not detected (Q or R) */
+
+ if (read1(CFI_QUERY_ID_OFFSET + 2) != 'Y') {
+ write1( 0, CFI_CMD_READ_ARRAY1 );
+ return -6; /* CFI not detected (Y) */
+ }
+
+ (*cfi_array)->cfi_chips[d / 8] = calloc( 1, sizeof (cfi_chip_t) );
+ if (!(*cfi_array)->cfi_chips[d / 8]) {
+ write1( 0, CFI_CMD_READ_ARRAY1 );
+ return -2; /* out of memory */
+ }
+ cfi = &(*cfi_array)->cfi_chips[d / 8]->cfi;
+
+ /* Identification string - see Table 6 in [1] */
+ cfi->identification_string.pri_id_code = read2(PRI_VENDOR_ID_OFFSET);
+ cfi->identification_string.pri_vendor_tbl = NULL;
+ cfi->identification_string.alt_id_code = read2(ALT_VENDOR_ID_OFFSET);
+ cfi->identification_string.alt_vendor_tbl = NULL;
+
+ /* System interface information - see Table 7 in [1] */
+ tmp = read1(VCC_MIN_WEV_OFFSET);
+ cfi->system_interface_info.vcc_min_wev = ((tmp >> 4) & 0xF) * 1000 + (tmp & 0xF) * 100;
+ tmp = read1(VCC_MAX_WEV_OFFSET);
+ cfi->system_interface_info.vcc_max_wev = ((tmp >> 4) & 0xF) * 1000 + (tmp & 0xF) * 100;
+ tmp = read1(VPP_MIN_WEV_OFFSET);
+ cfi->system_interface_info.vpp_min_wev = ((tmp >> 4) & 0xF) * 1000 + (tmp & 0xF) * 100;
+ tmp = read1(VPP_MAX_WEV_OFFSET);
+ cfi->system_interface_info.vpp_max_wev = ((tmp >> 4) & 0xF) * 1000 + (tmp & 0xF) * 100;
+
+ /* TODO: Add out of range checks for timeouts */
+ tmp = read1(TYP_SINGLE_WRITE_TIMEOUT_OFFSET);
+ cfi->system_interface_info.typ_single_write_timeout = tmp ? (1 << tmp) : 0;
+
+ tmp = read1(TYP_BUFFER_WRITE_TIMEOUT_OFFSET);
+ cfi->system_interface_info.typ_buffer_write_timeout = tmp ? (1 << tmp) : 0;
+
+ tmp = read1(TYP_BLOCK_ERASE_TIMEOUT_OFFSET);
+ cfi->system_interface_info.typ_block_erase_timeout = tmp ? (1 << tmp) : 0;
+
+ tmp = read1(TYP_CHIP_ERASE_TIMEOUT_OFFSET);
+ cfi->system_interface_info.typ_chip_erase_timeout = tmp ? (1 << tmp) : 0;
+
+ tmp = read1(MAX_SINGLE_WRITE_TIMEOUT_OFFSET);
+ cfi->system_interface_info.max_single_write_timeout =
+ (tmp ? (1 << tmp) : 0) * cfi->system_interface_info.typ_single_write_timeout;
+
+ tmp = read1(MAX_BUFFER_WRITE_TIMEOUT_OFFSET);
+ cfi->system_interface_info.max_buffer_write_timeout =
+ (tmp ? (1 << tmp) : 0) * cfi->system_interface_info.typ_buffer_write_timeout;
+
+ tmp = read1(MAX_BLOCK_ERASE_TIMEOUT_OFFSET);
+ cfi->system_interface_info.max_block_erase_timeout =
+ (tmp ? (1 << tmp) : 0) * cfi->system_interface_info.typ_block_erase_timeout;
+
+ tmp = read1(MAX_CHIP_ERASE_TIMEOUT_OFFSET);
+ cfi->system_interface_info.max_chip_erase_timeout =
+ (tmp ? (1 << tmp) : 0) * cfi->system_interface_info.typ_chip_erase_timeout;
+
+ /* Device geometry - see Table 8 in [1] */
+ /* TODO: Add out of range check */
+ cfi->device_geometry.device_size = 1 << read1(DEVICE_SIZE_OFFSET);
+
+ cfi->device_geometry.device_interface = read2(FLASH_DEVICE_INTERFACE_OFFSET);
+
+ /* TODO: Add out of range check */
+ cfi->device_geometry.max_bytes_write = 1 << read2(MAX_BYTES_WRITE_OFFSET);
+
+ tmp = cfi->device_geometry.number_of_erase_regions = read1(NUMBER_OF_ERASE_REGIONS_OFFSET);
+
+ cfi->device_geometry.erase_block_regions = malloc( tmp * sizeof (cfi_erase_block_region_t) );
+ if (!cfi->device_geometry.erase_block_regions) {
+ write1( 0, CFI_CMD_READ_ARRAY1 );
+ return -2; /* out of memory */
+ }
+
+ {
+ int a;
+ int i;
+
+ for (i = 0, a = ERASE_BLOCK_REGION_OFFSET; i < tmp; i++, a += 4) {
+ uint32_t y = read2(a);
+ uint32_t z = read2(a + 2) << 8;
+ if (z == 0)
+ z = 128;
+ cfi->device_geometry.erase_block_regions[i].erase_block_size = z;
+ cfi->device_geometry.erase_block_regions[i].number_of_erase_blocks = y + 1;
+ }
+ }
+
+ pri_vendor_tbl_adr = read2(PRI_VENDOR_TABLE_ADR_OFFSET);
+
+ /* AMD CFI Primary Vendor-Specific Extended Query Table - see [3] and [4] */
+ if (cfi->identification_string.pri_id_code == CFI_VENDOR_AMD_SCS
+ && pri_vendor_tbl_adr != 0) {
+ amd_pri_extened_query_structure_t *pri_vendor_tbl;
+ uint8_t major_version;
+ uint8_t minor_version;
+ uint8_t num_of_banks;
+ int i;
+#undef A
+#define A(off) (adr + (pri_vendor_tbl_adr + off) * ba * ma)
+
+ if (read1 (0) != 'P' || read1 (1) != 'R' || read1 (2) != 'I') {
+ write1 (0, CFI_CMD_READ_ARRAY1);
+ return -9; /* CFI primary vendor table not detected */
+ }
+
+ major_version = read1 (MAJOR_VERSION_OFFSET);
+ minor_version = read1 (MINOR_VERSION_OFFSET);
+ if (major_version > '1' || (major_version == '1' && minor_version >= '3'))
+ num_of_banks = read1 (BANK_ORGANIZATION_OFFSET);
+ else
+ num_of_banks = 0;
+ pri_vendor_tbl = (amd_pri_extened_query_structure_t *)
+ calloc (1, sizeof (amd_pri_extened_query_structure_t)
+ + num_of_banks * sizeof (uint8_t));
+ if (!pri_vendor_tbl) {
+ write1 (0, CFI_CMD_READ_ARRAY1);
+ return -2; /* out of memory */
+ }
+
+ if (major_version > '1' || (major_version == '1' && minor_version >= '0')) {
+ pri_vendor_tbl->major_version = major_version;
+ pri_vendor_tbl->minor_version = minor_version;
+ pri_vendor_tbl->address_sensitive_unlock = read1 (ADDRESS_SENSITIVE_UNLOCK_OFFSET);
+ pri_vendor_tbl->erase_suspend = read1 (ERASE_SUSPEND_OFFSET);
+ pri_vendor_tbl->sector_protect = read1 (SECTOR_PROTECT_OFFSET);
+ pri_vendor_tbl->sector_temporary_unprotect = read1 (SECTOR_TEMPORARY_UNPROTECT_OFFSET);
+ pri_vendor_tbl->sector_protect_scheme = read1 (SECTOR_PROTECT_SCHEME_OFFSET);
+ pri_vendor_tbl->simultaneous_operation = read1 (SIMULTANEOUS_OPERATION_OFFSET);
+ pri_vendor_tbl->burst_mode_type = read1 (BURST_MODE_TYPE_OFFSET);
+ pri_vendor_tbl->page_mode_type = read1 (PAGE_MODE_TYPE_OFFSET);
+ }
+ if (major_version > '1' || (major_version == '1' && minor_version >= '1')) {
+ tmp = read1 (ACC_MIN_OFFSET);
+ pri_vendor_tbl->acc_min = ((tmp >> 4) & 0xF) * 1000 + (tmp & 0xF) * 100;
+ tmp = read1 (ACC_MAX_OFFSET);
+ pri_vendor_tbl->acc_max = ((tmp >> 4) & 0xF) * 1000 + (tmp & 0xF) * 100;
+ pri_vendor_tbl->top_bottom_sector_flag = read1 (TOP_BOTTOM_SECTOR_FLAG_OFFSET);
+ }
+ if (major_version > '1' || (major_version == '1' && minor_version >= '2'))
+ pri_vendor_tbl->program_suspend = read1 (PROGRAM_SUSPEND_OFFSET);
+ if (major_version > '1' || (major_version == '1' && minor_version >= '3')) {
+ if (pri_vendor_tbl->simultaneous_operation)
+ pri_vendor_tbl->bank_organization = read1 (BANK_ORGANIZATION_OFFSET);
+ else
+ pri_vendor_tbl->bank_organization = 0;
+ for (i = 0; i < pri_vendor_tbl->bank_organization; i++)
+ pri_vendor_tbl->bank_region_info[i] = read1 (BANK_REGION_INFO_OFFSET + i * sizeof (uint8_t));
+ }
+ if (major_version > '1' || (major_version == '1' && minor_version >= '4')) {
+ pri_vendor_tbl->unlock_bypass = read1 (UNLOCK_BYPASS_OFFSET);
+ tmp = read1 (SECSI_SECTOR_SIZE_OFFSET);
+ pri_vendor_tbl->secsi_sector_size = tmp ? (1 << tmp) : 0;
+ tmp = read1 (EMBEDDED_HWRST_TIMEOUT_MAX_OFFSET);
+ pri_vendor_tbl->embedded_hwrst_timeout_max = tmp ? (1 << tmp) : 0;
+ tmp = read1 (NON_EMBEDDED_HWRST_TIMEOUT_MAX_OFFSET);
+ pri_vendor_tbl->non_embedded_hwrst_timeout_max = tmp ? (1 << tmp) : 0;
+ tmp = read1 (ERASE_SUSPEND_TIMEOUT_MAX_OFFSET);
+ pri_vendor_tbl->erase_suspend_timeout_max = tmp ? (1 << tmp) : 0;
+ tmp = read1 (PROGRAM_SUSPEND_TIMEOUT_MAX_OFFSET);
+ pri_vendor_tbl->program_suspend_timeout_max = tmp ? (1 << tmp) : 0;
+ }
+
+ cfi->identification_string.pri_vendor_tbl = (void *) pri_vendor_tbl;
+
+#undef A
+#define A(off) (adr + (off) * ba * ma)
+
+ /* Reverse the order of erase block region information for top boot devices. */
+ if ((major_version > '1' || (major_version == '1' && minor_version >= '1'))
+ && pri_vendor_tbl->top_bottom_sector_flag == 0x3)
+ {
+ uint32_t y, z;
+ uint32_t n = cfi->device_geometry.number_of_erase_regions;
+
+ for (i = 0; i < n / 2; i++) {
+ z = cfi->device_geometry.erase_block_regions[i].erase_block_size;
+ y = cfi->device_geometry.erase_block_regions[i].number_of_erase_blocks;
+ cfi->device_geometry.erase_block_regions[i].erase_block_size
+ = cfi->device_geometry.erase_block_regions[n - i - 1].erase_block_size;
+ cfi->device_geometry.erase_block_regions[i].number_of_erase_blocks
+ = cfi->device_geometry.erase_block_regions[n - i - 1].number_of_erase_blocks;
+ cfi->device_geometry.erase_block_regions[n - i - 1].erase_block_size = z;
+ cfi->device_geometry.erase_block_regions[n - i - 1].number_of_erase_blocks = y;
+ }
+ }
+ }
+
+ /* TODO: Intel Primary Algorithm Extended Query Table - see Table 5. in [2] */
+
+ /* Read Array */
+ write1( 0, CFI_CMD_READ_ARRAY1 );
+
+#undef A
+#undef D
+#undef gD
+#undef read1
+#undef read2
+#undef write1
+
+ switch (cfi->device_geometry.device_interface) {
+ case CFI_INTERFACE_X8:
+ if (ma != 1)
+ return -7; /* error in device detection */
+ (*cfi_array)->cfi_chips[d / 8]->width = 1;
+ break;
+ case CFI_INTERFACE_X16:
+ if (ma != 1)
+ return -7; /* error in device detection */
+ (*cfi_array)->cfi_chips[d / 8]->width = 2;
+ d += 8;
+ break;
+ case CFI_INTERFACE_X8_X16:
+ if (ma != 1 && ma != 2)
+ return -7; /* error in device detection */
+ (*cfi_array)->cfi_chips[d / 8]->width = 2 / ma;
+ if (ma == 1)
+ d += 8;
+ break;
+ case CFI_INTERFACE_X32:
+ if (ma != 1)
+ return -7; /* error in device detection */
+ (*cfi_array)->cfi_chips[d / 8]->width = 4;
+ d += 24;
+ break;
+ case CFI_INTERFACE_X16_X32:
+ if (ma != 1 && ma != 2)
+ return -7; /* error in device detection */
+ (*cfi_array)->cfi_chips[d / 8]->width = 4 / ma;
+ if (ma == 1)
+ d += 24;
+ else
+ d += 8;
+ break;
+ default:
+ return -7; /* error in device detection */
+ }
+ }
+
+ return 0;
+}
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2002 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2002.
+ *
+ * Documentation:
+ * [1] JEDEC Solid State Technology Association, "Common Flash Interface (CFI)",
+ * September 1999, Order Number: JESD68
+ * [2] JEDEC Solid State Technology Association, "Common Flash Interface (CFI) ID Codes",
+ * September 2001, Order Number: JEP137-A
+ *
+ */
+
+#include "sysdep.h"
+
+#include <stdint.h>
+#include <string.h>
+#include <flash/cfi.h>
+#include <flash/intel.h>
+#include <flash/mic.h>
+
+#include <flash.h>
+#include <bus.h>
+
+cfi_array_t *cfi_array = NULL;
+
+extern int jedec_exp_detect( bus_t *bus, uint32_t adr, cfi_array_t **cfi_array );
+extern int jedec_detect( bus_t *bus, uint32_t adr, cfi_array_t **cfi_array );
+
+extern int amd_detect(bus_t *bus, uint32_t adr, cfi_array_t **cfi_array ); //Ajith
+
+void
+detectflash( bus_t *bus, uint32_t adr )
+{
+ cfi_query_structure_t *cfi;
+ const char *s;
+
+ if (!bus) {
+ printf( _("Error: Missing bus driver!\n") );
+ return;
+ }
+
+ cfi_array_free( cfi_array );
+ cfi_array = NULL;
+
+ bus_prepare( bus );
+
+ if (cfi_detect( bus, adr, &cfi_array )) {
+ cfi_array_free( cfi_array );
+ cfi_array = NULL;
+ if (jedec_detect( bus, adr, &cfi_array ) != 0) {
+ cfi_array_free( cfi_array );
+ cfi_array = NULL;
+ if(amd_detect(bus, adr, &cfi_array ) != 0)
+ {
+ cfi_array_free( cfi_array );
+ cfi_array = NULL;
+#ifdef JEDEC_EXP
+ if (jedec_exp_detect( bus, adr, &cfi_array )) {
+ cfi_array_free( cfi_array );
+ cfi_array = NULL;
+ }
+#endif
+ }
+ }
+ }
+
+ if (cfi_array == NULL)
+ {
+ printf( _("Flash not found!\n") );
+ return;
+ }
+
+ cfi = &cfi_array->cfi_chips[0]->cfi;
+
+ /* detect CFI capable devices */
+ /* TODO: Low chip only */
+ /* see 4.3.2 in [1] */
+ printf( _("Query identification string:\n") );
+ /* see section 2 in [2] */
+ switch (cfi->identification_string.pri_id_code) {
+ case CFI_VENDOR_NULL:
+ s = N_("null");
+ break;
+ case CFI_VENDOR_INTEL_ECS:
+ s = N_("Intel/Sharp Extended Command Set");
+ break;
+ case CFI_VENDOR_AMD_SCS:
+ s = N_("AMD/Fujitsu Standard Command Set");
+ break;
+ case CFI_VENDOR_INTEL_SCS:
+ s = N_("Intel Standard Command Set");
+ break;
+ case CFI_VENDOR_AMD_ECS:
+ s = N_("AMD/Fujitsu Extended Command Set");
+ break;
+ case CFI_VENDOR_MITSUBISHI_SCS:
+ s = N_("Mitsubishi Standard Command Set");
+ break;
+ case CFI_VENDOR_MITSUBISHI_ECS:
+ s = N_("Mitsubishi Extended Command Set");
+ break;
+ case CFI_VENDOR_SST_PWCS:
+ s = N_("Page Write Command Set");
+ break;
+ default:
+ s = N_("unknown!!!");
+ break;
+ }
+ printf( _("\tPrimary Algorithm Command Set and Control Interface ID Code: 0x%04X (%s)\n"), cfi->identification_string.pri_id_code, _(s) );
+ switch (cfi->identification_string.alt_id_code) {
+ case CFI_VENDOR_NULL:
+ s = N_("null");
+ break;
+ case CFI_VENDOR_INTEL_ECS:
+ s = N_("Intel/Sharp Extended Command Set");
+ break;
+ case CFI_VENDOR_AMD_SCS:
+ s = N_("AMD/Fujitsu Standard Command Set");
+ break;
+ case CFI_VENDOR_INTEL_SCS:
+ s = N_("Intel Standard Command Set");
+ break;
+ case CFI_VENDOR_AMD_ECS:
+ s = N_("AMD/Fujitsu Extended Command Set");
+ break;
+ case CFI_VENDOR_MITSUBISHI_SCS:
+ s = N_("Mitsubishi Standard Command Set");
+ break;
+ case CFI_VENDOR_MITSUBISHI_ECS:
+ s = N_("Mitsubishi Extended Command Set");
+ break;
+ case CFI_VENDOR_SST_PWCS:
+ s = N_("Page Write Command Set");
+ break;
+ default:
+ s = N_("unknown!!!");
+ break;
+ }
+ printf( _("\tAlternate Algorithm Command Set and Control Interface ID Code: 0x%04X (%s)\n"), cfi->identification_string.alt_id_code, _(s) );
+
+ /* see 4.3.3 in [1] */
+ printf( _("Query system interface information:\n") );
+ printf( _("\tVcc Logic Supply Minimum Write/Erase or Write voltage: %d mV\n"), cfi->system_interface_info.vcc_min_wev );
+ printf( _("\tVcc Logic Supply Maximum Write/Erase or Write voltage: %d mV\n"), cfi->system_interface_info.vcc_max_wev );
+ printf( _("\tVpp [Programming] Supply Minimum Write/Erase voltage: %d mV\n"), cfi->system_interface_info.vpp_min_wev );
+ printf( _("\tVpp [Programming] Supply Maximum Write/Erase voltage: %d mV\n"), cfi->system_interface_info.vpp_max_wev );
+ printf( _("\tTypical timeout per single byte/word program: %d us\n"), cfi->system_interface_info.typ_single_write_timeout );
+ printf( _("\tTypical timeout for maximum-size multi-byte program: %d us\n"), cfi->system_interface_info.typ_buffer_write_timeout );
+ printf( _("\tTypical timeout per individual block erase: %d ms\n"), cfi->system_interface_info.typ_block_erase_timeout );
+ printf( _("\tTypical timeout for full chip erase: %d ms\n"), cfi->system_interface_info.typ_chip_erase_timeout );
+ printf( _("\tMaximum timeout for byte/word program: %d us\n"), cfi->system_interface_info.max_single_write_timeout );
+ printf( _("\tMaximum timeout for multi-byte program: %d us\n"), cfi->system_interface_info.max_buffer_write_timeout );
+ printf( _("\tMaximum timeout per individual block erase: %d ms\n"), cfi->system_interface_info.max_block_erase_timeout );
+ printf( _("\tMaximum timeout for chip erase: %d ms\n"), cfi->system_interface_info.max_chip_erase_timeout );
+
+ /* see 4.3.4 in [1] */
+ printf( _("Device geometry definition:\n") );
+ printf( _("\tDevice Size: %d B (%d KiB, %d MiB)\n"),
+ cfi->device_geometry.device_size,
+ cfi->device_geometry.device_size / 1024,
+ cfi->device_geometry.device_size / (1024 * 1024) );
+ /* see section 4 in [2] */
+ switch (cfi->device_geometry.device_interface) {
+ case CFI_INTERFACE_X8:
+ s = N_("x8");
+ break;
+ case CFI_INTERFACE_X16:
+ s = N_("x16");
+ break;
+ case CFI_INTERFACE_X8_X16:
+ s = N_("x8/x16");
+ break;
+ case CFI_INTERFACE_X32:
+ s = N_("x32");
+ break;
+ case CFI_INTERFACE_X16_X32:
+ s = N_("x16/x32");
+ break;
+ default:
+ s = N_("unknown!!!");
+ break;
+ }
+ printf( _("\tFlash Device Interface Code description: 0x%04X (%s)\n"), cfi->device_geometry.device_interface, _(s) );
+ printf( _("\tMaximum number of bytes in multi-byte program: %d\n"), cfi->device_geometry.max_bytes_write );
+ printf( _("\tNumber of Erase Block Regions within device: %d\n"), cfi->device_geometry.number_of_erase_regions );
+ printf( _("\tErase Block Region Information:\n") );
+ {
+ int i;
+
+ for (i = 0; i < cfi->device_geometry.number_of_erase_regions; i++) {
+ printf( _("\t\tRegion %d:\n"), i );
+ printf( _("\t\t\tErase Block Size: %d B (%d KiB)\n"),
+ cfi->device_geometry.erase_block_regions[i].erase_block_size,
+ cfi->device_geometry.erase_block_regions[i].erase_block_size / 1024 );
+ printf( _("\t\t\tNumber of Erase Blocks: %d\n"), cfi->device_geometry.erase_block_regions[i].number_of_erase_blocks );
+ }
+ }
+
+ if (cfi->identification_string.pri_id_code == CFI_VENDOR_AMD_SCS
+ && cfi->identification_string.pri_vendor_tbl != NULL)
+ {
+ amd_pri_extened_query_structure_t *pri_vendor_tbl;
+ uint8_t major_version;
+ uint8_t minor_version;
+ int i;
+ const char *required_or_not[2] = {
+ N_("Required"), N_("Not required")
+ };
+ const char *supported_or_not[2] = {
+ N_("Supported"), N_("Not supported")
+ };
+ const char *process_technology[6] = {
+ N_("170-nm Floating Gate technology"), N_("230-nm MirrorBit(tm) technology"),
+ N_("130-nm Floating Gate technology"), N_("110-nm MirrorBit(tm) technology"),
+ N_("90-nm Floating Gate technology"), N_("90-nm MirrorBit(tm) technology")
+ };
+ const char *process_technology_13[3] = {
+ N_("CS49"), N_("CS59"), N_("CS99")
+ };
+ const char *erase_suspend[3] = {
+ N_("Not supported"), N_("Read only"), N_("Read/write")
+ };
+ const char *sector_protect_scheme[8] = {
+ N_("29F040 mode"), N_("29F016 mode"), N_("29F400 mode"),
+ N_("29LV800 mode"), N_("29BDS640 mode (Software Command Locking)"),
+ N_("29BDD160 mode (New Sector Protect)"),
+ N_("29PDL128 mode (New Sector Protect + 29LV800)"),
+ N_("Advanced Sector Protect")
+ };
+ const char *page_mode_type[4] = {
+ N_("Not supported"), N_("4 word Page"), N_("8 word Page"), N_("16 word Page")
+ };
+
+ const char *top_bottom[6] = {
+ N_("No boot"), N_("8x8kb sectors at top and bottom with WP control"),
+ N_("Bottom boot device"), N_("Top boot device"),
+ N_("Uniform bottom boot device"), N_("Uniform top boot device")
+ };
+ const char *bad_value = N_("Bad value");
+
+#define ARRAY_SIZE(a) (sizeof (a) / sizeof ((a)[0]))
+
+ pri_vendor_tbl = cfi->identification_string.pri_vendor_tbl;
+ major_version = pri_vendor_tbl->major_version;
+ minor_version = pri_vendor_tbl->minor_version;
+
+ printf (_("Primary Vendor-Specific Extended Query:\n"));
+ printf (_("\tMajor version number: %c\n"), pri_vendor_tbl->major_version);
+ printf (_("\tMinor version number: %c\n"), pri_vendor_tbl->minor_version);
+ if (major_version > '1' || (major_version == '1' && minor_version >= '0'))
+ {
+ if ((pri_vendor_tbl->address_sensitive_unlock & 0x3) < ARRAY_SIZE (required_or_not))
+ printf (_("\tAddress Sensitive Unlock: %s\n"),
+ required_or_not[pri_vendor_tbl->address_sensitive_unlock & 0x3]);
+ else
+ printf (_("\tAddress Sensitive Unlock: %s\n"), bad_value);
+
+ if (major_version > '1' || (major_version == '1' && minor_version >= '4'))
+ {
+ if ((pri_vendor_tbl->address_sensitive_unlock >> 2) < ARRAY_SIZE (process_technology))
+ printf (_("\tProcess Technology: %s\n"),
+ process_technology[pri_vendor_tbl->address_sensitive_unlock >> 2]);
+ else
+ printf (_("\tProcess Technology: %s\n"), bad_value);
+ }
+ else if (major_version == '1' && minor_version == '3')
+ {
+ if ((pri_vendor_tbl->address_sensitive_unlock >> 2) < ARRAY_SIZE (process_technology_13))
+ printf (_("\tProcess Technology: %s\n"),
+ process_technology_13[pri_vendor_tbl->address_sensitive_unlock >> 2]);
+ else
+ printf (_("\tProcess Technology: %s\n"), bad_value);
+ }
+ if (pri_vendor_tbl->erase_suspend < ARRAY_SIZE (erase_suspend))
+ printf (_("\tErase Suspend: %s\n"), erase_suspend[pri_vendor_tbl->erase_suspend]);
+ if (pri_vendor_tbl->sector_protect == 0)
+ printf (_("\tSector Protect: Not supported\n"));
+ else
+ printf (_("\tSector Protect: %d sectors per group\n"), pri_vendor_tbl->sector_protect);
+ if (pri_vendor_tbl->sector_temporary_unprotect < ARRAY_SIZE (supported_or_not))
+ printf (_("\tSector Temporary Unprotect: %s\n"), supported_or_not[pri_vendor_tbl->sector_temporary_unprotect]);
+ else
+ printf (_("\tSector Temporary Unprotect: %s\n"), bad_value);
+ if (pri_vendor_tbl->sector_protect_scheme < ARRAY_SIZE (sector_protect_scheme))
+ printf (_("\tSector Protect/Unprotect Scheme: %s\n"),
+ sector_protect_scheme[pri_vendor_tbl->sector_protect_scheme]);
+ else
+ printf (_("\tSector Protect/Unprotect Scheme: %s\n"), bad_value);
+ if (pri_vendor_tbl->simultaneous_operation == 0)
+ printf (_("\tSimultaneous Operation: Not supported\n"));
+ else
+ printf (_("\tSimultaneous Operation: %d sectors\n"), pri_vendor_tbl->simultaneous_operation);
+ if (pri_vendor_tbl->burst_mode_type < ARRAY_SIZE (supported_or_not))
+ printf (_("\tBurst Mode Type: %s\n"), supported_or_not[pri_vendor_tbl->burst_mode_type]);
+ else
+ printf (_("\tBurst Mode Type: %s\n"), bad_value);
+ if (pri_vendor_tbl->page_mode_type < ARRAY_SIZE (page_mode_type))
+ printf (_("\tPage Mode Type: %s\n"), page_mode_type[pri_vendor_tbl->page_mode_type]);
+ else
+ printf (_("\tPage Mode Type: %s\n"), bad_value);
+ }
+ if (major_version > '1' || (major_version == '1' && minor_version >= '1'))
+ {
+ printf (_("\tACC (Acceleration) Supply Minimum: %d mV\n"), pri_vendor_tbl->acc_min);
+ printf (_("\tACC (Acceleration) Supply Maximum: %d mV\n"), pri_vendor_tbl->acc_max);
+ if (pri_vendor_tbl->top_bottom_sector_flag < ARRAY_SIZE (top_bottom))
+ printf (_("\tTop/Bottom Sector Flag: %s\n"), top_bottom[pri_vendor_tbl->top_bottom_sector_flag]);
+ else
+ printf (_("\tTop/Bottom Sector Flag: %s\n"), bad_value);
+ }
+ if (major_version > '1' || (major_version == '1' && minor_version >= '2'))
+ {
+ if (pri_vendor_tbl->program_suspend < ARRAY_SIZE (supported_or_not))
+ printf (_("\tProgram Suspend: %s\n"), supported_or_not[pri_vendor_tbl->program_suspend]);
+ else
+ printf (_("\tProgram Suspend: %s\n"), bad_value);
+ }
+ if (major_version > '1' || (major_version == '1' && minor_version >= '4'))
+ {
+ if (pri_vendor_tbl->unlock_bypass < ARRAY_SIZE (supported_or_not))
+ printf (_("\tUnlock Bypass: %s\n"), supported_or_not[pri_vendor_tbl->unlock_bypass]);
+ else
+ printf (_("\tUnlock Bypass: %s\n"), bad_value);
+ printf (_("\tSecSi Sector (Customer OTP Area) Size: %d bytes\n"), pri_vendor_tbl->secsi_sector_size);
+ printf (_("\tEmbedded Hardware Reset Timeout Maximum: %d ns\n"), pri_vendor_tbl->embedded_hwrst_timeout_max);
+ printf (_("\tNon-Embedded Hardware Reset Timeout Maximum: %d ns\n"), pri_vendor_tbl->non_embedded_hwrst_timeout_max);
+ printf (_("\tErase Suspend Timeout Maximum: %d us\n"), pri_vendor_tbl->erase_suspend_timeout_max);
+ printf (_("\tProgram Suspend Timeout Maximum: %d us\n"), pri_vendor_tbl->program_suspend_timeout_max);
+ }
+ if ((major_version > '1' || (major_version == '1' && minor_version >= '3'))
+ && pri_vendor_tbl->bank_organization)
+ {
+ printf (_("\tBank Organization:\n"));
+ for (i = 0; i < pri_vendor_tbl->bank_organization; i++)
+ printf (_("\t\tBank%d: %d sectors\n"), i + 1, pri_vendor_tbl->bank_region_info[i]);
+ }
+ }
+}
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2002 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2002.
+ * Modified by Ajith Kumar P.C <ajithpc@kila.com>, 20/09/2006
+ *
+ * Documentation:
+ * [1] Advanced Micro Devices, "Common Flash Memory Interface Specification Release 2.0",
+ * December 1, 2001
+ * [2] Intel Corporation, "Intel PXA250 and PXA210 Application Processors
+ * Developer's Manual", February 2002, Order Number: 278522-001
+ * [3] Intel Corporation, "Common Flash Interface (CFI) and Command Sets
+ * Application Note 646", April 2000, Order Number: 292204-004
+ * [4] Advanced Micro Devices, "Common Flash Memory Interface Publication 100 Vendor & Device
+ * ID Code Assignments", December 1, 2001, Volume Number: 96.1
+ *
+ */
+
+#include "sysdep.h"
+
+#include <stdint.h>
+#include <stdlib.h>
+#include <string.h>
+
+#include <flash/cfi.h>
+#include <flash/intel.h>
+
+#include "bus.h"
+#include "flash.h"
+#include "jtag.h"
+
+extern flash_driver_t amd_32_flash_driver;
+extern flash_driver_t amd_16_flash_driver;
+extern flash_driver_t amd_8_flash_driver;
+extern flash_driver_t intel_32_flash_driver;
+extern flash_driver_t intel_16_flash_driver;
+extern flash_driver_t intel_8_flash_driver;
+extern flash_driver_t amd_29xx040_flash_driver; //20/09/2006
+
+flash_driver_t *flash_drivers[] = {
+ &amd_32_flash_driver,
+ &amd_16_flash_driver,
+ &amd_8_flash_driver,
+ &intel_32_flash_driver,
+ &intel_16_flash_driver,
+ &intel_8_flash_driver,
+ &amd_29xx040_flash_driver, //20/09/2006
+ NULL
+};
+
+extern cfi_array_t *cfi_array;
+static flash_driver_t *flash_driver = NULL;
+
+static void
+set_flash_driver( void )
+{
+ int i;
+ cfi_query_structure_t *cfi;
+
+ flash_driver = NULL;
+ if (cfi_array == NULL)
+ return;
+ cfi = &cfi_array->cfi_chips[0]->cfi;
+
+ for (i = 0; flash_drivers[i] != NULL; i++)
+ if (flash_drivers[i]->autodetect( cfi_array )) {
+ flash_driver = flash_drivers[i];
+ flash_driver->print_info( cfi_array );
+ return;
+ }
+
+ printf( _("unknown flash - vendor id: %d (0x%04x)\n"),
+ cfi->identification_string.pri_id_code,
+ cfi->identification_string.pri_id_code );
+
+ printf( _("Flash not supported!\n") );
+}
+
+void
+flashmsbin( bus_t *bus, FILE *f, int noverify )
+{
+ uint32_t adr;
+ cfi_query_structure_t *cfi;
+
+ set_flash_driver();
+ if (!cfi_array || !flash_driver) {
+ printf( _("no flash driver found\n") );
+ return;
+ }
+ cfi = &cfi_array->cfi_chips[0]->cfi;
+
+ /* test sync bytes */
+ {
+ char sync[8];
+ fread( &sync, sizeof (char), 7, f );
+ sync[7] = '\0';
+ if (strcmp( "B000FF\n", sync ) != 0) {
+ printf( _("Invalid sync sequence!\n") );
+ return;
+ }
+ }
+
+ /* erase memory blocks */
+ {
+ uint32_t start;
+ uint32_t len;
+ int first, last;
+
+ fread( &start, sizeof start, 1, f );
+ fread( &len, sizeof len, 1, f );
+ first = start / (cfi->device_geometry.erase_block_regions[0].erase_block_size * 2);
+ last = (start + len - 1) / (cfi->device_geometry.erase_block_regions[0].erase_block_size * 2);
+ for (; first <= last; first++) {
+ adr = first * cfi->device_geometry.erase_block_regions[0].erase_block_size * 2;
+ flash_driver->unlock_block( cfi_array, adr );
+ printf( _("block %d unlocked\n"), first );
+ printf( _("erasing block %d: %d\n"), first, flash_driver->erase_block( cfi_array, adr ) );
+ }
+ }
+
+ printf( _("program:\n") );
+ for (;;) {
+ uint32_t a, l, c;
+
+ fread( &a, sizeof a, 1, f );
+ fread( &l, sizeof l, 1, f );
+ fread( &c, sizeof c, 1, f );
+ if (feof( f )) {
+ printf( _("Error: premature end of file\n") );
+ return;
+ }
+ printf( _("record: start = 0x%08X, len = 0x%08X, checksum = 0x%08X\n"), a, l, c );
+ if ((a == 0) && (c == 0))
+ break;
+ if (l & 3) {
+ printf( _("Error: Invalid record length!\n") );
+ return;
+ }
+
+ while (l) {
+ uint32_t data;
+
+ printf( _("addr: 0x%08X"), a );
+ printf( "\r" );
+ fflush(stdout);
+ fread( &data, sizeof data, 1, f );
+ if (flash_driver->program( cfi_array, a, &data, 1 )) {
+ printf( _("\nflash error\n") );
+ return;
+ }
+ a += 4;
+ l -= 4;
+ }
+ }
+ printf( "\n" );
+
+ flash_driver->readarray( cfi_array );
+
+ if (noverify) {
+ printf( _("verify skipped\n") );
+ return;
+ }
+
+ fseek( f, 15, SEEK_SET );
+ printf( _("verify:\n") );
+
+ for (;;) {
+ uint32_t a, l, c;
+
+ fread( &a, sizeof a, 1, f );
+ fread( &l, sizeof l, 1, f );
+ fread( &c, sizeof c, 1, f );
+ if (feof( f )) {
+ printf( _("Error: premature end of file\n") );
+ return;
+ }
+ printf( _("record: start = 0x%08X, len = 0x%08X, checksum = 0x%08X\n"), a, l, c );
+ if ((a == 0) && (c == 0))
+ break;
+ if (l & 3) {
+ printf( _("Error: Invalid record length!\n") );
+ return;
+ }
+
+ while (l) {
+ uint32_t data, readed;
+
+ printf( _("addr: 0x%08X"), a );
+ printf( "\r" );
+ fflush( stdout );
+ fread( &data, sizeof data, 1, f );
+ readed = bus_read( bus, a );
+ if (data != readed) {
+ printf( _("\nverify error: 0x%08X vs. 0x%08X at addr %08X\n"),
+ readed, data, a );
+ return;
+ }
+ a += 4;
+ l -= 4;
+ }
+ }
+
+ printf( _("\nDone.\n") );
+}
+
+static int
+find_block( cfi_query_structure_t *cfi, int adr, int bus_width, int chip_width, int *bytes_until_next_block )
+{
+ int i;
+ int b = 0;
+ int bb = 0;
+
+ for (i = 0; i < cfi->device_geometry.number_of_erase_regions; i++) {
+ const int region_blocks = cfi->device_geometry.erase_block_regions[i].number_of_erase_blocks;
+ const int flash_block_size = cfi->device_geometry.erase_block_regions[i].erase_block_size;
+ const int region_block_size = (bus_width / chip_width) * flash_block_size;
+ const int region_size = region_blocks * region_block_size;
+
+ if (adr < (bb + region_size))
+ {
+ int bir = (adr - bb) / region_block_size;
+ *bytes_until_next_block = bb + (bir + 1) * region_block_size - adr;
+ return b + bir;
+ }
+ b += region_blocks;
+ bb += region_size;
+ }
+ return -1;
+}
+
+void
+flashmem( bus_t *bus, FILE *f, uint32_t addr, int noverify )
+{
+ uint32_t adr;
+ cfi_query_structure_t *cfi;
+ int *erased;
+ int i;
+ int neb;
+ int bus_width;
+ int chip_width;
+#define BSIZE (1 << 12)
+ uint32_t write_buffer[BSIZE];
+ int write_buffer_count;
+ uint32_t write_buffer_adr;
+
+ set_flash_driver();
+ if (!cfi_array || !flash_driver) {
+ printf( _("no flash driver found\n") );
+ return;
+ }
+ cfi = &cfi_array->cfi_chips[0]->cfi;
+
+ bus_width = cfi_array->bus_width;
+ chip_width = cfi_array->cfi_chips[0]->width;
+
+ for (i = 0, neb = 0; i < cfi->device_geometry.number_of_erase_regions; i++)
+ neb += cfi->device_geometry.erase_block_regions[i].number_of_erase_blocks;
+
+ erased = malloc( neb * sizeof *erased );
+ if (!erased) {
+ printf( _("Out of memory!\n") );
+ return;
+ }
+ for (i = 0; i < neb; i++)
+ erased[i] = 0;
+
+ printf( _("program:\n") );
+ adr = addr;
+ while (!feof( f )) {
+ uint32_t data;
+ uint8_t b[BSIZE];
+ int bc = 0, bn = 0, btr = BSIZE;
+ int block_no = find_block( cfi, adr - cfi_array->address, bus_width, chip_width, &btr );
+
+ write_buffer_count = 0;
+ write_buffer_adr = adr;
+
+ if(btr > BSIZE) btr = BSIZE;
+ bn = fread( b, 1, btr, f );
+
+ if (bn > 0 && !erased[block_no]) {
+ flash_driver->unlock_block( cfi_array, adr );
+ printf( _("\nblock %d unlocked\n"), block_no );
+ printf( _("erasing block %d: %d\n"), block_no, flash_driver->erase_block( cfi_array, adr ) );
+ erased[block_no] = 1;
+ }
+
+ for (bc = 0; bc < bn; bc += flash_driver->bus_width) {
+ int j;
+ if ((adr & (BSIZE-1)) == 0) {
+ printf( _("addr: 0x%08X"), adr );
+ printf( "\r" );
+ fflush( stdout );
+ }
+
+ data = 0;
+ for (j = 0; j < flash_driver->bus_width; j++)
+ if (big_endian)
+ data = (data << 8) | b[bc + j];
+ else
+ data |= b[bc + j] << (j * 8);
+
+ /* store data in write buffer, will be programmed to flash later */
+ write_buffer[write_buffer_count++] = data;
+
+ adr += flash_driver->bus_width;
+ }
+
+ if (write_buffer_count > 0)
+ if (flash_driver->program( cfi_array, write_buffer_adr, write_buffer, write_buffer_count )) {
+ printf( _("\nflash error\n") );
+ return;
+ }
+
+ }
+ free( erased );
+
+ printf( _("addr: 0x%08X\n"), adr - flash_driver->bus_width);
+
+ flash_driver->readarray( cfi_array );
+
+ if (noverify) {
+ printf( _("verify skipped\n") );
+ return;
+ }
+
+ fseek( f, 0, SEEK_SET );
+ printf( _("verify:\n") );
+ fflush( stdout );
+ adr = addr;
+ while (!feof( f )) {
+ uint32_t data, readed;
+ uint8_t b[BSIZE];
+ int bc = 0, bn = 0, btr = BSIZE;
+
+ bn = fread( b, 1, btr, f );
+
+ for (bc = 0; bc < bn; bc += flash_driver->bus_width) {
+ int j;
+ if ((adr & 0xFF) == 0) {
+ printf( _("addr: 0x%08X"), adr );
+ printf( "\r" );
+ fflush( stdout );
+ }
+
+ data = 0;
+ for (j = 0; j < flash_driver->bus_width; j++)
+ if (big_endian)
+ data = (data << 8) | b[bc + j];
+ else
+ data |= b[bc + j] << (j * 8);
+
+ readed = bus_read( bus, adr );
+ if (data != readed) {
+ printf( _("addr: 0x%08X\n"), adr );
+ printf( _("verify error:\nread: 0x%08X\nexpected: 0x%08X\n"), readed, data );
+ return;
+ }
+ adr += flash_driver->bus_width;
+ }
+ }
+ printf( _("addr: 0x%08X\nDone.\n"), adr - flash_driver->bus_width);
+}
+
+void
+flasherase( bus_t *bus, uint32_t addr, int number )
+{
+ cfi_query_structure_t *cfi;
+ int i;
+ int status = 0;
+ int bus_width;
+ int chip_width;
+
+ set_flash_driver();
+ if (!cfi_array || !flash_driver) {
+ printf( _("no flash driver found\n") );
+ return;
+ }
+ cfi = &cfi_array->cfi_chips[0]->cfi;
+
+ bus_width = cfi_array->bus_width;
+ chip_width = cfi_array->cfi_chips[0]->width;
+
+ printf( _("\nErasing %d Flash block%s from address 0x%x\n"), number, number > 1 ? "s" : "", addr );
+
+ for (i = 1; i <= number; i++) {
+ int btr = 0;
+ int block_no = find_block( cfi, addr - cfi_array->address, bus_width, chip_width, &btr );
+
+ if (block_no < 0) {
+ status = FLASH_ERROR_UNKNOWN;
+ break;
+ }
+
+ printf( _("(%d%% Completed) FLASH Block %d : Unlocking ... "), i*100/number, block_no );
+ fflush(stdout);
+ flash_driver->unlock_block( cfi_array, addr );
+ printf( _("Erasing ... ") );
+ fflush(stdout);
+ status = flash_driver->erase_block( cfi_array, addr );
+ if (status == 0) {
+ if (i == number) {
+ printf( "\r" );
+ printf( _("(100%% Completed) FLASH Block %d : Unlocking ... Erasing ... Ok.\n"), block_no );
+ } else {
+ printf( _("Ok.") );
+ printf( "\r" );
+ printf( _("%78s"), "" );
+ printf( "\r" );
+ }
+ }
+ else
+ printf( _("ERROR.\n") );
+ addr += btr;
+ }
+
+ if (status == 0)
+ printf( _("\nErasing Completed.\n") );
+ else
+ printf( _("\nErasing Failed.\n") );
+
+ /* BYPASS */
+ // parts_set_instruction( ps, "BYPASS" );
+ // chain_shift_instructions( chain );
+}
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2002 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2002.
+ * Changed by August Hörandl, 2003
+ *
+ * Documentation:
+ * [1] Advanced Micro Devices, "Common Flash Memory Interface Specification Release 2.0",
+ * December 1, 2001
+ * [2] Intel Corporation, "Intel PXA250 and PXA210 Application Processors
+ * Developer's Manual", February 2002, Order Number: 278522-001
+ * [3] Intel Corporation, "Common Flash Interface (CFI) and Command Sets
+ * Application Note 646", April 2000, Order Number: 292204-004
+ * [4] Advanced Micro Devices, "Common Flash Memory Interface Publication 100 Vendor & Device
+ * ID Code Assignments", December 1, 2001, Volume Number: 96.1
+ * [5] Micron Technology, Inc. "Q-Flash Memory MT28F123J3, MT28F640J3, MT28F320J3",
+ * MT28F640J3.fm - Rev. N 3/05 EN
+ *
+ */
+
+#include "sysdep.h"
+
+#include <stdint.h>
+#include <stdlib.h>
+#include <string.h>
+#include <flash/cfi.h>
+#include <flash/intel.h>
+#include <flash/mic.h>
+
+#include <jtag.h>
+#include <flash.h>
+#include <bus.h>
+
+static int intel_flash_erase_block( cfi_array_t *cfi_array, uint32_t adr );
+static int intel_flash_unlock_block( cfi_array_t *cfi_array, uint32_t adr );
+static int intel_flash_program_single( cfi_array_t *cfi_array, uint32_t adr, uint32_t data );
+static int intel_flash_program_buffer( cfi_array_t *cfi_array, uint32_t adr, uint32_t *buffer, int count );
+static int intel_flash_program( cfi_array_t *cfi_array, uint32_t adr, uint32_t *buffer, int count );
+static int intel_flash_erase_block32( cfi_array_t *cfi_array, uint32_t adr );
+static int intel_flash_unlock_block32( cfi_array_t *cfi_array, uint32_t adr );
+static int intel_flash_program32_single( cfi_array_t *cfi_array, uint32_t adr, uint32_t data );
+static int intel_flash_program32( cfi_array_t *cfi_array, uint32_t adr, uint32_t *buffer, int count );
+
+/* autodetect, we can handle this chip */
+static int
+intel_flash_autodetect32( cfi_array_t *cfi_array )
+{
+ bus_area_t area;
+
+ if (bus_area( cfi_array->bus, cfi_array->address, &area ) != URJTAG_STATUS_OK)
+ return 0;
+
+ return ((cfi_array->cfi_chips[0]->cfi.identification_string.pri_id_code == CFI_VENDOR_MITSUBISHI_SCS)
+ || (cfi_array->cfi_chips[0]->cfi.identification_string.pri_id_code == CFI_VENDOR_MITSUBISHI_ECS)
+ || (cfi_array->cfi_chips[0]->cfi.identification_string.pri_id_code == CFI_VENDOR_INTEL_ECS)
+ || (cfi_array->cfi_chips[0]->cfi.identification_string.pri_id_code == CFI_VENDOR_INTEL_SCS))
+ && (area.width == 32);
+}
+
+static int
+intel_flash_autodetect( cfi_array_t *cfi_array )
+{
+ bus_area_t area;
+
+ if (bus_area( cfi_array->bus, cfi_array->address, &area ) != URJTAG_STATUS_OK)
+ return 0;
+
+ return ((cfi_array->cfi_chips[0]->cfi.identification_string.pri_id_code == CFI_VENDOR_MITSUBISHI_SCS)
+ || (cfi_array->cfi_chips[0]->cfi.identification_string.pri_id_code == CFI_VENDOR_MITSUBISHI_ECS)
+ || (cfi_array->cfi_chips[0]->cfi.identification_string.pri_id_code == CFI_VENDOR_INTEL_ECS)
+ || (cfi_array->cfi_chips[0]->cfi.identification_string.pri_id_code == CFI_VENDOR_INTEL_SCS))
+ && (area.width == 16);
+}
+
+static int
+intel_flash_autodetect8( cfi_array_t *cfi_array )
+{
+ bus_area_t area;
+
+ if (bus_area( cfi_array->bus, cfi_array->address, &area ) != URJTAG_STATUS_OK)
+ return 0;
+
+ return ((cfi_array->cfi_chips[0]->cfi.identification_string.pri_id_code == CFI_VENDOR_MITSUBISHI_SCS)
+ || (cfi_array->cfi_chips[0]->cfi.identification_string.pri_id_code == CFI_VENDOR_MITSUBISHI_ECS)
+ || (cfi_array->cfi_chips[0]->cfi.identification_string.pri_id_code == CFI_VENDOR_INTEL_ECS)
+ || (cfi_array->cfi_chips[0]->cfi.identification_string.pri_id_code == CFI_VENDOR_INTEL_SCS))
+ && (area.width == 8);
+}
+
+static void
+_intel_flash_print_info( cfi_array_t *cfi_array, int o )
+{
+ uint32_t mid, cid;
+ bus_t *bus = cfi_array->bus;
+
+ mid = (bus_read( bus, cfi_array->address + (0x00 << o) ) & 0xFF);
+ switch (mid) {
+ case STD_MIC_INTEL:
+ printf( _("Manufacturer: %s\n"), STD_MICN_INTEL );
+ break;
+ case STD_MIC_MITSUBISHI:
+ printf( _("Manufacturer: %s\n"), STD_MICN_MITSUBISHI );
+ break;
+ case STD_MIC_MICRON_TECHNOLOGY:
+ printf( _("Manufacturer: %s\n"), STD_MICN_MICRON_TECHNOLOGY );
+ break;
+ default:
+ printf( _("Unknown manufacturer (0x%04X)!\n"), mid);
+ break;
+ }
+
+ printf( _("Chip: ") );
+ cid = (bus_read( bus, cfi_array->address + (0x01 << o) ) & 0xFFFF);
+ switch (cid) {
+ case 0x0016:
+ printf( "28F320J3A\n" );
+ break;
+ case 0x0017:
+ printf( "28F640J3A\n" );
+ break;
+ case 0x0018:
+ printf( "28F128J3A\n" );
+ break;
+ case 0x001D:
+ printf( "28F256J3A\n" );
+ break;
+ case 0x8801:
+ printf( "28F640K3\n" );
+ break;
+ case 0x8802:
+ printf( "28F128K3\n" );
+ break;
+ case 0x8803:
+ printf( "28F256K3\n" );
+ break;
+ case 0x8805:
+ printf( "28F640K18\n" );
+ break;
+ case 0x8806:
+ printf( "28F128K18\n" );
+ break;
+ case 0x8807:
+ printf( "28F256K18\n" );
+ break;
+ case 0x880B:
+ printf( "GE28F640L18T\n" );
+ break;
+ case 0x880C:
+ printf( "GE28F128L18T\n" );
+ break;
+ case 0x880D:
+ printf( "GE28F256L18T\n" );
+ break;
+ case 0x880E:
+ printf( "GE28F640L18B\n" );
+ break;
+ case 0x880F:
+ printf( "GE28F128L18B\n" );
+ break;
+ case 0x8810:
+ printf( "GE28F256L18B\n" );
+ break;
+ default:
+ printf( _("Unknown (0x%02X)!\n"), cid );
+ break;
+ }
+
+ /* Read Array */
+ bus_write( bus, cfi_array->address + (0 << o), 0x00FF00FF );
+}
+
+static void
+intel_flash_print_info( cfi_array_t *cfi_array )
+{
+ int o = 1;
+ bus_t *bus = cfi_array->bus;
+
+ /* Intel Primary Algorithm Extended Query Table - see Table 5. in [3] */
+ /* TODO */
+
+ /* Clear Status Register */
+ bus_write( bus, cfi_array->address + (0 << o), 0x0050 );
+
+ /* Read Identifier Command */
+ bus_write( bus, cfi_array->address + (0 << 0), 0x0090 );
+
+ _intel_flash_print_info( cfi_array, o );
+}
+
+static void
+intel_flash_print_info32( cfi_array_t *cfi_array )
+{
+ int o = 2;
+ bus_t *bus = cfi_array->bus;
+ /* Intel Primary Algorithm Extended Query Table - see Table 5. in [3] */
+ /* TODO */
+
+ /* Clear Status Register */
+ bus_write( bus, cfi_array->address + (0 << o), 0x00500050 );
+
+ /* Read Identifier Command */
+ bus_write( bus, cfi_array->address + (0 << 0), 0x00900090 );
+
+ _intel_flash_print_info( cfi_array, o );
+}
+
+static int
+intel_flash_erase_block( cfi_array_t *cfi_array, uint32_t adr )
+{
+ uint16_t sr;
+ bus_t *bus = cfi_array->bus;
+
+ bus_write( bus, cfi_array->address, CFI_INTEL_CMD_CLEAR_STATUS_REGISTER );
+ bus_write( bus, adr, CFI_INTEL_CMD_BLOCK_ERASE );
+ bus_write( bus, adr, CFI_INTEL_CMD_CONFIRM );
+
+ while (!((sr = bus_read( bus, cfi_array->address ) & 0xFE) & CFI_INTEL_SR_READY)) ; /* TODO: add timeout */
+
+ switch (sr & ~CFI_INTEL_SR_READY) {
+ case 0:
+ return 0;
+ case CFI_INTEL_SR_ERASE_ERROR | CFI_INTEL_SR_PROGRAM_ERROR:
+ printf( _("flash: invalid command seq\n") );
+ return FLASH_ERROR_INVALID_COMMAND_SEQUENCE;
+ case CFI_INTEL_SR_ERASE_ERROR | CFI_INTEL_SR_VPEN_ERROR:
+ printf( _("flash: low vpen\n") );
+ return FLASH_ERROR_LOW_VPEN;
+ case CFI_INTEL_SR_ERASE_ERROR | CFI_INTEL_SR_BLOCK_LOCKED:
+ printf( _("flash: block locked\n") );
+ return FLASH_ERROR_BLOCK_LOCKED;
+ default:
+ break;
+ }
+
+ return FLASH_ERROR_UNKNOWN;
+}
+
+static int
+intel_flash_unlock_block( cfi_array_t *cfi_array, uint32_t adr )
+{
+ uint16_t sr;
+ bus_t *bus = cfi_array->bus;
+
+ bus_write( bus, cfi_array->address, CFI_INTEL_CMD_CLEAR_STATUS_REGISTER );
+ bus_write( bus, adr, CFI_INTEL_CMD_LOCK_SETUP );
+ bus_write( bus, adr, CFI_INTEL_CMD_UNLOCK_BLOCK );
+
+ while (!((sr = bus_read( bus, cfi_array->address ) & 0xFE) & CFI_INTEL_SR_READY)) ; /* TODO: add timeout */
+
+ if (sr != CFI_INTEL_SR_READY) {
+ printf( _("flash: unknown error while unblocking\n") );
+ return FLASH_ERROR_UNKNOWN;
+ } else
+ return 0;
+}
+
+static int
+intel_flash_program_single( cfi_array_t *cfi_array, uint32_t adr, uint32_t data )
+{
+ uint16_t sr;
+ bus_t *bus = cfi_array->bus;
+
+ bus_write( bus, cfi_array->address, CFI_INTEL_CMD_CLEAR_STATUS_REGISTER );
+ bus_write( bus, adr, CFI_INTEL_CMD_PROGRAM1 );
+ bus_write( bus, adr, data );
+
+ while (!((sr = bus_read( bus, cfi_array->address ) & 0xFE) & CFI_INTEL_SR_READY)) ; /* TODO: add timeout */
+
+ if (sr != CFI_INTEL_SR_READY) {
+ printf( _("flash: unknown error while programming\n") );
+ return FLASH_ERROR_UNKNOWN;
+ } else
+ return 0;
+}
+
+static int
+intel_flash_program_buffer( cfi_array_t *cfi_array, uint32_t adr, uint32_t *buffer, int count )
+{
+ /* NOTE: Write-to-buffer programming operation according to [5], Figure 9 */
+ uint16_t sr;
+ bus_t *bus = cfi_array->bus;
+ cfi_chip_t *cfi_chip = cfi_array->cfi_chips[0];
+ int wb_bytes = cfi_chip->cfi.device_geometry.max_bytes_write;
+ int chip_width = cfi_chip->width;
+ int offset = 0;
+
+ while (count > 0) {
+ int wcount, idx;
+ uint32_t block_adr = adr;
+
+ /* determine length of next multi-byte write */
+ wcount = wb_bytes - (adr % wb_bytes);
+ wcount /= chip_width;
+ if (wcount > count)
+ wcount = count;
+
+ /* issue command WRITE_TO_BUFFER */
+ bus_write( bus, cfi_array->address, CFI_INTEL_CMD_CLEAR_STATUS_REGISTER );
+ bus_write( bus, adr, CFI_INTEL_CMD_WRITE_TO_BUFFER );
+ /* poll XSR7 == 1 */
+ while (!((sr = bus_read( bus, cfi_array->address ) & 0xFE) & CFI_INTEL_SR_READY)) ; /* TODO: add timeout */
+
+ /* write count value (number of upcoming writes - 1) */
+ bus_write( bus, adr, wcount-1 );
+
+ /* write payload to buffer */
+ for (idx = 0; idx < wcount; idx++) {
+ bus_write( bus, adr, buffer[offset + idx] );
+ adr += cfi_array->bus_width;
+ }
+ offset += wcount;
+
+ /* issue command WRITE_CONFIRM */
+ bus_write( bus, block_adr, CFI_INTEL_CMD_WRITE_CONFIRM );
+
+ count -= wcount;
+ }
+
+ /* poll SR7 == 1 */
+ while (!((sr = bus_read( bus, cfi_array->address ) & 0xFE) & CFI_INTEL_SR_READY)) ; /* TODO: add timeout */
+ if (sr != CFI_INTEL_SR_READY) {
+ printf( _("flash: unknown error while programming\n") );
+ return FLASH_ERROR_UNKNOWN;
+ }
+
+ return 0;
+}
+
+static int
+intel_flash_program( cfi_array_t *cfi_array, uint32_t adr, uint32_t *buffer, int count )
+{
+ cfi_query_structure_t *cfi = &(cfi_array->cfi_chips[0]->cfi);
+ int max_bytes_write = cfi->device_geometry.max_bytes_write;
+
+#ifndef FLASH_MULTI_BYTE
+ max_bytes_write = 0;
+#endif
+
+ /* multi-byte writes supported? */
+ if (max_bytes_write > 1)
+ return intel_flash_program_buffer( cfi_array, adr, buffer, count );
+
+ else {
+ /* unroll buffer to single writes */
+ int idx;
+
+ for (idx = 0; idx < count; idx++) {
+ int status = intel_flash_program_single( cfi_array, adr, buffer[idx] );
+ if (status)
+ return status;
+ adr += cfi_array->bus_width;
+ }
+ }
+
+ return 0;
+}
+
+static int
+intel_flash_erase_block32( cfi_array_t *cfi_array, uint32_t adr )
+{
+ uint32_t sr;
+ bus_t *bus = cfi_array->bus;
+
+ bus_write( bus, cfi_array->address, (CFI_INTEL_CMD_CLEAR_STATUS_REGISTER << 16) | CFI_INTEL_CMD_CLEAR_STATUS_REGISTER );
+ bus_write( bus, adr, (CFI_INTEL_CMD_BLOCK_ERASE << 16) | CFI_INTEL_CMD_BLOCK_ERASE );
+ bus_write( bus, adr, (CFI_INTEL_CMD_CONFIRM << 16) | CFI_INTEL_CMD_CONFIRM );
+
+ while (((sr = bus_read( bus, cfi_array->address ) & 0x00FE00FE) & ((CFI_INTEL_SR_READY << 16) | CFI_INTEL_SR_READY)) != ((CFI_INTEL_SR_READY << 16) | CFI_INTEL_SR_READY)) ; /* TODO: add timeout */
+
+ if (sr != ((CFI_INTEL_SR_READY << 16) | CFI_INTEL_SR_READY)) {
+ printf( "\nsr = 0x%08X\n", sr );
+ return FLASH_ERROR_UNKNOWN;
+ } else
+ return 0;
+}
+
+static int
+intel_flash_unlock_block32( cfi_array_t *cfi_array, uint32_t adr )
+{
+ uint32_t sr;
+ bus_t *bus = cfi_array->bus;
+
+ bus_write( bus, cfi_array->address, (CFI_INTEL_CMD_CLEAR_STATUS_REGISTER << 16) | CFI_INTEL_CMD_CLEAR_STATUS_REGISTER );
+ bus_write( bus, adr, (CFI_INTEL_CMD_LOCK_SETUP << 16) | CFI_INTEL_CMD_LOCK_SETUP );
+ bus_write( bus, adr, (CFI_INTEL_CMD_UNLOCK_BLOCK << 16) | CFI_INTEL_CMD_UNLOCK_BLOCK );
+
+ while (((sr = bus_read( bus, cfi_array->address ) & 0x00FE00FE) & ((CFI_INTEL_SR_READY << 16) | CFI_INTEL_SR_READY)) != ((CFI_INTEL_SR_READY << 16) | CFI_INTEL_SR_READY)) ; /* TODO: add timeout */
+
+ if (sr != ((CFI_INTEL_SR_READY << 16) | CFI_INTEL_SR_READY)) {
+ printf( "\nsr = 0x%08X\n", sr );
+ return FLASH_ERROR_UNKNOWN;
+ } else
+ return 0;
+}
+
+static int
+intel_flash_program32_single( cfi_array_t *cfi_array, uint32_t adr, uint32_t data )
+{
+ uint32_t sr;
+ bus_t *bus = cfi_array->bus;
+
+ bus_write( bus, cfi_array->address, (CFI_INTEL_CMD_CLEAR_STATUS_REGISTER << 16) | CFI_INTEL_CMD_CLEAR_STATUS_REGISTER );
+ bus_write( bus, adr, (CFI_INTEL_CMD_PROGRAM1 << 16) | CFI_INTEL_CMD_PROGRAM1 );
+ bus_write( bus, adr, data );
+
+ while (((sr = bus_read( bus, cfi_array->address ) & 0x00FE00FE) & ((CFI_INTEL_SR_READY << 16) | CFI_INTEL_SR_READY)) != ((CFI_INTEL_SR_READY << 16) | CFI_INTEL_SR_READY)) ; /* TODO: add timeout */
+
+ if (sr != ((CFI_INTEL_SR_READY << 16) | CFI_INTEL_SR_READY)) {
+ printf( "\nsr = 0x%08X\n", sr );
+ return FLASH_ERROR_UNKNOWN;
+ } else
+ return 0;
+}
+
+static int
+intel_flash_program32( cfi_array_t *cfi_array, uint32_t adr, uint32_t *buffer, int count )
+{
+ /* Single byte programming is forced for 32 bit (2x16) flash configuration.
+ a) lack of testing capbilities for 2x16 multi-byte write operation
+ b) no implementation of intel_flash_program32_buffer() available
+ Closing these issues will enable multi-byte for 2x16 as well. */
+ int idx;
+
+ /* unroll buffer to single writes */
+ for (idx = 0; idx < count; idx++) {
+ int status = intel_flash_program32_single( cfi_array, adr, buffer[idx] );
+ if (status)
+ return status;
+ adr += cfi_array->bus_width;
+ }
+
+ return 0;
+}
+
+static void
+intel_flash_readarray32( cfi_array_t *cfi_array )
+{
+ /* Read Array */
+ bus_write( cfi_array->bus, cfi_array->address, 0x00FF00FF );
+}
+
+static void
+intel_flash_readarray( cfi_array_t *cfi_array )
+{
+ /* Read Array */
+ bus_write( cfi_array->bus, cfi_array->address, 0x00FF00FF );
+}
+
+flash_driver_t intel_32_flash_driver = {
+ 4, /* buswidth */
+ N_("Intel Standard Command Set"),
+ N_("supported: 28Fxxxx, 2 x 16 bit"),
+ intel_flash_autodetect32,
+ intel_flash_print_info32,
+ intel_flash_erase_block32,
+ intel_flash_unlock_block32,
+ intel_flash_program32,
+ intel_flash_readarray32,
+};
+
+flash_driver_t intel_16_flash_driver = {
+ 2, /* buswidth */
+ N_("Intel Standard Command Set"),
+ N_("supported: 28Fxxxx, 1 x 16 bit"),
+ intel_flash_autodetect,
+ intel_flash_print_info,
+ intel_flash_erase_block,
+ intel_flash_unlock_block,
+ intel_flash_program,
+ intel_flash_readarray,
+};
+
+flash_driver_t intel_8_flash_driver = {
+ 1, /* buswidth */
+ N_("Intel Standard Command Set"),
+ N_("supported: 28Fxxxx, 1 x 8 bit"),
+ intel_flash_autodetect8,
+ intel_flash_print_info,
+ intel_flash_erase_block,
+ intel_flash_unlock_block,
+ intel_flash_program,
+ intel_flash_readarray,
+};
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2003 Matan Ziv-Av
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Matan Ziv-Av, 2003.
+ *
+ */
+
+#include <stdint.h>
+#include <stdlib.h>
+#include <string.h>
+#include <stdio.h>
+#include <flash/cfi.h>
+#include <flash/intel.h>
+#include <unistd.h>
+
+#include <jtag.h>
+#include <flash.h>
+#include <bus.h>
+
+/* Manufacturers */
+#define MANUFACTURER_AMD 0x0001
+#define MANUFACTURER_ATMEL 0x001F
+#define MANUFACTURER_FUJITSU 0x0004
+#define MANUFACTURER_ST 0x0020
+#define MANUFACTURER_SST 0x00BF
+#define MANUFACTURER_TOSHIBA 0x0098
+#define MANUFACTURER_MX 0x00C2
+
+/* AMD */
+#define AM29F800BB 0x2258
+#define AM29F800BT 0x22D6
+#define AM29LV800BB 0x225B
+#define AM29LV800BT 0x22DA
+#define AM29LV160DT 0x22C4
+#define AM29LV160DB 0x2249
+#define AM29BDS323D 0x22D1
+#define AM29BDS643D 0x227E
+#define AM29LV040B 0x004F
+
+/* Atmel */
+#define AT49xV16x 0x00C0
+#define AT49xV16xT 0x00C2
+
+/* Fujitsu */
+#define MBM29LV160TE 0x22C4
+#define MBM29LV160BE 0x2249
+#define MBM29LV800BB 0x225B
+
+/* ST - www.st.com */
+#define M29W800T 0x00D7
+#define M29W160DT 0x22C4
+#define M29W160DB 0x2249
+
+/* SST */
+#define SST39LF800 0x2781
+#define SST39LF160 0x2782
+
+/* Toshiba */
+#define TC58FVT160 0x00C2
+#define TC58FVB160 0x0043
+
+/* MX */
+#define MX29LV400T 0x22B9
+
+/* Autoselect methods */
+#define AUTOSELECT_M1 0
+#define AUTOSELECT_M2 1
+#define AUTOSELECT_NUM 2
+
+struct mtd_erase_region_info {
+ uint32_t offset; /* At which this region starts, from the beginning of the MTD */
+ uint32_t erasesize; /* For this region */
+ uint32_t numblocks; /* Number of blocks of erasesize in this region */
+};
+
+struct amd_flash_info {
+ const int mfr_id;
+ const int dev_id;
+ const char *name;
+ const long size;
+ const uint8_t interface_width;
+ const int as_method;
+ const int numeraseregions;
+ const struct mtd_erase_region_info regions[4];
+};
+
+static const struct amd_flash_info table[] = {
+ {
+ .mfr_id = MANUFACTURER_AMD,
+ .dev_id = AM29LV160DT,
+ .name = "AMD AM29LV160DT",
+ .size = 0x00200000,
+ .interface_width = CFI_INTERFACE_X16, /* correct default? */
+ .as_method = AUTOSELECT_M1,
+ .numeraseregions = 4,
+ .regions = {
+ { .offset = 0x000000, .erasesize = 0x10000, .numblocks = 31 },
+ { .offset = 0x1F0000, .erasesize = 0x08000, .numblocks = 1 },
+ { .offset = 0x1F8000, .erasesize = 0x02000, .numblocks = 2 },
+ { .offset = 0x1FC000, .erasesize = 0x04000, .numblocks = 1 }
+ }
+ }, {
+ .mfr_id = MANUFACTURER_AMD,
+ .dev_id = AM29LV160DB,
+ .name = "AMD AM29LV160DB",
+ .size = 0x00200000,
+ .interface_width = CFI_INTERFACE_X16, /* correct default? */
+ .as_method = AUTOSELECT_M1,
+ .numeraseregions = 4,
+ .regions = {
+ { .offset = 0x000000, .erasesize = 0x04000, .numblocks = 1 },
+ { .offset = 0x004000, .erasesize = 0x02000, .numblocks = 2 },
+ { .offset = 0x008000, .erasesize = 0x08000, .numblocks = 1 },
+ { .offset = 0x010000, .erasesize = 0x10000, .numblocks = 31 }
+ }
+ }, {
+ .mfr_id = MANUFACTURER_TOSHIBA,
+ .dev_id = TC58FVT160,
+ .name = "Toshiba TC58FVT160",
+ .size = 0x00200000,
+ .interface_width = CFI_INTERFACE_X16, /* correct default? */
+ .as_method = AUTOSELECT_M1,
+ .numeraseregions = 4,
+ .regions = {
+ { .offset = 0x000000, .erasesize = 0x10000, .numblocks = 31 },
+ { .offset = 0x1F0000, .erasesize = 0x08000, .numblocks = 1 },
+ { .offset = 0x1F8000, .erasesize = 0x02000, .numblocks = 2 },
+ { .offset = 0x1FC000, .erasesize = 0x04000, .numblocks = 1 }
+ }
+ }, {
+ .mfr_id = MANUFACTURER_FUJITSU,
+ .dev_id = MBM29LV160TE,
+ .name = "Fujitsu MBM29LV160TE",
+ .size = 0x00200000,
+ .interface_width = CFI_INTERFACE_X16, /* correct default? */
+ .as_method = AUTOSELECT_M1,
+ .numeraseregions = 4,
+ .regions = {
+ { .offset = 0x000000, .erasesize = 0x10000, .numblocks = 31 },
+ { .offset = 0x1F0000, .erasesize = 0x08000, .numblocks = 1 },
+ { .offset = 0x1F8000, .erasesize = 0x02000, .numblocks = 2 },
+ { .offset = 0x1FC000, .erasesize = 0x04000, .numblocks = 1 }
+ }
+ }, {
+ .mfr_id = MANUFACTURER_TOSHIBA,
+ .dev_id = TC58FVB160,
+ .name = "Toshiba TC58FVB160",
+ .size = 0x00200000,
+ .interface_width = CFI_INTERFACE_X16, /* correct default? */
+ .as_method = AUTOSELECT_M1,
+ .numeraseregions = 4,
+ .regions = {
+ { .offset = 0x000000, .erasesize = 0x04000, .numblocks = 1 },
+ { .offset = 0x004000, .erasesize = 0x02000, .numblocks = 2 },
+ { .offset = 0x008000, .erasesize = 0x08000, .numblocks = 1 },
+ { .offset = 0x010000, .erasesize = 0x10000, .numblocks = 31 }
+ }
+ }, {
+ .mfr_id = MANUFACTURER_FUJITSU,
+ .dev_id = MBM29LV160BE,
+ .name = "Fujitsu MBM29LV160BE",
+ .size = 0x00200000,
+ .interface_width = CFI_INTERFACE_X16, /* correct default? */
+ .as_method = AUTOSELECT_M1,
+ .numeraseregions = 4,
+ .regions = {
+ { .offset = 0x000000, .erasesize = 0x04000, .numblocks = 1 },
+ { .offset = 0x004000, .erasesize = 0x02000, .numblocks = 2 },
+ { .offset = 0x008000, .erasesize = 0x08000, .numblocks = 1 },
+ { .offset = 0x010000, .erasesize = 0x10000, .numblocks = 31 }
+ }
+ }, {
+ .mfr_id = MANUFACTURER_AMD,
+ .dev_id = AM29LV800BB,
+ .name = "AMD AM29LV800BB",
+ .size = 0x00100000,
+ .interface_width = CFI_INTERFACE_X16, /* correct default? */
+ .as_method = AUTOSELECT_M1,
+ .numeraseregions = 4,
+ .regions = {
+ { .offset = 0x000000, .erasesize = 0x04000, .numblocks = 1 },
+ { .offset = 0x004000, .erasesize = 0x02000, .numblocks = 2 },
+ { .offset = 0x008000, .erasesize = 0x08000, .numblocks = 1 },
+ { .offset = 0x010000, .erasesize = 0x10000, .numblocks = 15 }
+ }
+ }, {
+ .mfr_id = MANUFACTURER_AMD,
+ .dev_id = AM29F800BB,
+ .name = "AMD AM29F800BB",
+ .size = 0x00100000,
+ .interface_width = CFI_INTERFACE_X16, /* correct default? */
+ .as_method = AUTOSELECT_M1,
+ .numeraseregions = 4,
+ .regions = {
+ { .offset = 0x000000, .erasesize = 0x04000, .numblocks = 1 },
+ { .offset = 0x004000, .erasesize = 0x02000, .numblocks = 2 },
+ { .offset = 0x008000, .erasesize = 0x08000, .numblocks = 1 },
+ { .offset = 0x010000, .erasesize = 0x10000, .numblocks = 15 }
+ }
+ }, {
+ .mfr_id = MANUFACTURER_AMD,
+ .dev_id = AM29LV800BT,
+ .name = "AMD AM29LV800BT",
+ .size = 0x00100000,
+ .interface_width = CFI_INTERFACE_X16, /* correct default? */
+ .as_method = AUTOSELECT_M1,
+ .numeraseregions = 4,
+ .regions = {
+ { .offset = 0x000000, .erasesize = 0x10000, .numblocks = 15 },
+ { .offset = 0x0F0000, .erasesize = 0x08000, .numblocks = 1 },
+ { .offset = 0x0F8000, .erasesize = 0x02000, .numblocks = 2 },
+ { .offset = 0x0FC000, .erasesize = 0x04000, .numblocks = 1 }
+ }
+ }, {
+ .mfr_id = MANUFACTURER_AMD,
+ .dev_id = AM29F800BT,
+ .name = "AMD AM29F800BT",
+ .size = 0x00100000,
+ .interface_width = CFI_INTERFACE_X16, /* correct default? */
+ .as_method = AUTOSELECT_M1,
+ .numeraseregions = 4,
+ .regions = {
+ { .offset = 0x000000, .erasesize = 0x10000, .numblocks = 15 },
+ { .offset = 0x0F0000, .erasesize = 0x08000, .numblocks = 1 },
+ { .offset = 0x0F8000, .erasesize = 0x02000, .numblocks = 2 },
+ { .offset = 0x0FC000, .erasesize = 0x04000, .numblocks = 1 }
+ }
+ }, {
+ .mfr_id = MANUFACTURER_AMD,
+ .dev_id = AM29LV800BB,
+ .name = "AMD AM29LV800BB",
+ .size = 0x00100000,
+ .interface_width = CFI_INTERFACE_X16, /* correct default? */
+ .as_method = AUTOSELECT_M1,
+ .numeraseregions = 4,
+ .regions = {
+ { .offset = 0x000000, .erasesize = 0x10000, .numblocks = 15 },
+ { .offset = 0x0F0000, .erasesize = 0x08000, .numblocks = 1 },
+ { .offset = 0x0F8000, .erasesize = 0x02000, .numblocks = 2 },
+ { .offset = 0x0FC000, .erasesize = 0x04000, .numblocks = 1 }
+ }
+ }, {
+ .mfr_id = MANUFACTURER_FUJITSU,
+ .dev_id = MBM29LV800BB,
+ .name = "Fujitsu MBM29LV800BB",
+ .size = 0x00100000,
+ .interface_width = CFI_INTERFACE_X16, /* correct default? */
+ .as_method = AUTOSELECT_M1,
+ .numeraseregions = 4,
+ .regions = {
+ { .offset = 0x000000, .erasesize = 0x04000, .numblocks = 1 },
+ { .offset = 0x004000, .erasesize = 0x02000, .numblocks = 2 },
+ { .offset = 0x008000, .erasesize = 0x08000, .numblocks = 1 },
+ { .offset = 0x010000, .erasesize = 0x10000, .numblocks = 15 }
+ }
+ }, {
+ .mfr_id = MANUFACTURER_ST,
+ .dev_id = M29W800T,
+ .name = "ST M29W800T",
+ .size = 0x00100000,
+ .interface_width = CFI_INTERFACE_X16, /* correct default? */
+ .as_method = AUTOSELECT_M1,
+ .numeraseregions = 4,
+ .regions = {
+ { .offset = 0x000000, .erasesize = 0x10000, .numblocks = 15 },
+ { .offset = 0x0F0000, .erasesize = 0x08000, .numblocks = 1 },
+ { .offset = 0x0F8000, .erasesize = 0x02000, .numblocks = 2 },
+ { .offset = 0x0FC000, .erasesize = 0x04000, .numblocks = 1 }
+ }
+ }, {
+ .mfr_id = MANUFACTURER_ST,
+ .dev_id = M29W160DT,
+ .name = "ST M29W160DT",
+ .size = 0x00200000,
+ .interface_width = CFI_INTERFACE_X16, /* correct default? */
+ .as_method = AUTOSELECT_M1,
+ .numeraseregions = 4,
+ .regions = {
+ { .offset = 0x000000, .erasesize = 0x10000, .numblocks = 31 },
+ { .offset = 0x1F0000, .erasesize = 0x08000, .numblocks = 1 },
+ { .offset = 0x1F8000, .erasesize = 0x02000, .numblocks = 2 },
+ { .offset = 0x1FC000, .erasesize = 0x04000, .numblocks = 1 }
+ }
+ }, {
+ .mfr_id = MANUFACTURER_ST,
+ .dev_id = M29W160DB,
+ .name = "ST M29W160DB",
+ .size = 0x00200000,
+ .interface_width = CFI_INTERFACE_X16, /* correct default? */
+ .as_method = AUTOSELECT_M1,
+ .numeraseregions = 4,
+ .regions = {
+ { .offset = 0x000000, .erasesize = 0x04000, .numblocks = 1 },
+ { .offset = 0x004000, .erasesize = 0x02000, .numblocks = 2 },
+ { .offset = 0x008000, .erasesize = 0x08000, .numblocks = 1 },
+ { .offset = 0x010000, .erasesize = 0x10000, .numblocks = 31 }
+ }
+ }, {
+ .mfr_id = MANUFACTURER_AMD,
+ .dev_id = AM29BDS323D,
+ .name = "AMD AM29BDS323D",
+ .size = 0x00400000,
+ .interface_width = CFI_INTERFACE_X16, /* correct default? */
+ .as_method = AUTOSELECT_M1,
+ .numeraseregions = 3,
+ .regions = {
+ { .offset = 0x000000, .erasesize = 0x10000, .numblocks = 48 },
+ { .offset = 0x300000, .erasesize = 0x10000, .numblocks = 15 },
+ { .offset = 0x3f0000, .erasesize = 0x02000, .numblocks = 8 },
+ }
+ }, {
+ .mfr_id = MANUFACTURER_AMD,
+ .dev_id = AM29BDS643D,
+ .name = "AMD AM29BDS643D",
+ .size = 0x00800000,
+ .interface_width = CFI_INTERFACE_X16, /* correct default? */
+ .as_method = AUTOSELECT_M1,
+ .numeraseregions = 3,
+ .regions = {
+ { .offset = 0x000000, .erasesize = 0x10000, .numblocks = 96 },
+ { .offset = 0x600000, .erasesize = 0x10000, .numblocks = 31 },
+ { .offset = 0x7f0000, .erasesize = 0x02000, .numblocks = 8 },
+ }
+ }, {
+ .mfr_id = MANUFACTURER_ATMEL,
+ .dev_id = AT49xV16x,
+ .name = "Atmel AT49xV16x",
+ .size = 0x00200000,
+ .interface_width = CFI_INTERFACE_X16, /* correct default? */
+ .as_method = AUTOSELECT_M1,
+ .numeraseregions = 2,
+ .regions = {
+ { .offset = 0x000000, .erasesize = 0x02000, .numblocks = 8 },
+ { .offset = 0x010000, .erasesize = 0x10000, .numblocks = 31 }
+ }
+ }, {
+ .mfr_id = MANUFACTURER_ATMEL,
+ .dev_id = AT49xV16xT,
+ .name = "Atmel AT49xV16xT",
+ .size = 0x00200000,
+ .interface_width = CFI_INTERFACE_X16, /* correct default? */
+ .as_method = AUTOSELECT_M1,
+ .numeraseregions = 2,
+ .regions = {
+ { .offset = 0x000000, .erasesize = 0x10000, .numblocks = 31 },
+ { .offset = 0x1F0000, .erasesize = 0x02000, .numblocks = 8 }
+ }
+ }, {
+ .mfr_id = MANUFACTURER_MX,
+ .dev_id = MX29LV400T,
+ .name = "MX 29LV400T",
+ .size = 0x0080000,
+ .interface_width = CFI_INTERFACE_X16, /* correct default? */
+ .as_method = AUTOSELECT_M1,
+ .numeraseregions = 4,
+ .regions = {
+ { .offset = 0x000000, .erasesize = 0x10000, .numblocks = 7 },
+ { .offset = 0x070000, .erasesize = 0x08000, .numblocks = 1 },
+ { .offset = 0x078000, .erasesize = 0x02000, .numblocks = 2 },
+ { .offset = 0x07c000, .erasesize = 0x04000, .numblocks = 1 },
+ }
+ }, {
+ .mfr_id = MANUFACTURER_AMD,
+ .dev_id = AM29LV040B,
+ .name = "AMD AM29LV040B",
+ .size = 0x0080000,
+ .interface_width = CFI_INTERFACE_X8, /* checked, ok */
+ .as_method = AUTOSELECT_M2,
+ .numeraseregions = 1,
+ .regions = {
+ { .offset = 0x000000, .erasesize = 0x10000, .numblocks = 8 },
+ }
+ }
+};
+
+int
+jedec_detect( bus_t *bus, uint32_t adr, cfi_array_t **cfi_array )
+{
+ /* Temporary containers for manufacturer and device id while
+ probing with different Autoselect methods. */
+ int manid_as[AUTOSELECT_NUM], devid_as[AUTOSELECT_NUM];
+ int manid = 0, devid = 0;
+ int ba, bw;
+ int i, j;
+ cfi_query_structure_t *cfi;
+ bus_area_t area;
+
+ *cfi_array = calloc( 1, sizeof (cfi_array_t) );
+ if (!*cfi_array)
+ return -2; /* out of memory */
+
+ (*cfi_array)->bus = bus;
+ (*cfi_array)->address = adr;
+ if (bus_area( bus, adr, &area ) != URJTAG_STATUS_OK)
+ return -8; /* bus width detection failed */
+ bw = area.width;
+ if (bw != 8 && bw != 16 && bw != 32)
+ return -3; /* invalid bus width */
+ (*cfi_array)->bus_width = ba = bw / 8;
+
+ (*cfi_array)->cfi_chips = calloc( 1, sizeof (cfi_chip_t *) * ba);
+ if (!(*cfi_array)->cfi_chips)
+ return -2; /* out of memory */
+
+ (*cfi_array)->cfi_chips[0] = calloc( 1, sizeof (cfi_chip_t) );
+ if (!(*cfi_array)->cfi_chips[0])
+ return -2; /* out of memory */
+
+ /* probe device with Autoselect method 1 */
+ bus_write(bus, adr, 0xf0);
+ bus_write(bus, adr+0xaaa, 0xaa);
+ bus_write(bus, adr+0x555, 0x55);
+ bus_write(bus, adr+0xaaa, 0x90);
+
+ manid_as[AUTOSELECT_M1] = bus_read(bus, adr+0);
+ devid_as[AUTOSELECT_M1] = bus_read(bus, adr+2);
+ bus_write(bus, adr, 0xf0);
+
+ /* probe device with Autoselect method 2 */
+ bus_write(bus, adr, 0xf0);
+ bus_write(bus, adr+0x555, 0xaa);
+ bus_write(bus, adr+0x2aa, 0x55);
+ bus_write(bus, adr+0x555, 0x90);
+
+ manid_as[AUTOSELECT_M2] = bus_read(bus, adr+0);
+ devid_as[AUTOSELECT_M2] = bus_read(bus, adr+1);
+ bus_write(bus, adr, 0xf0);
+
+ for(i=0 ; i<sizeof(table)/sizeof(struct amd_flash_info) ; i++) {
+ /* compare manufacturer and device id based on the result
+ of the device's Autoselect method */
+ manid = manid_as[table[i].as_method];
+ devid = devid_as[table[i].as_method];
+ if(manid==table[i].mfr_id && devid==table[i].dev_id) break;
+ }
+ fprintf(stderr, "dev ID=%04x man ID=%04x\n", devid, manid);
+
+ if(i==sizeof(table)/sizeof(struct amd_flash_info))
+ return -4;
+
+ cfi = &(*cfi_array)->cfi_chips[0]->cfi;
+
+ cfi->identification_string.pri_id_code = CFI_VENDOR_AMD_SCS;
+ cfi->identification_string.pri_vendor_tbl = NULL;
+ cfi->identification_string.alt_id_code = 0;
+ cfi->identification_string.alt_vendor_tbl = NULL;
+
+ cfi->device_geometry.device_size = table[i].size;
+ /* annotate chip width */
+ cfi->device_geometry.device_interface = table[i].interface_width;
+ switch (table[i].interface_width) {
+ case CFI_INTERFACE_X8:
+ (*cfi_array)->cfi_chips[0]->width = 1;
+ break;
+ case CFI_INTERFACE_X16:
+ (*cfi_array)->cfi_chips[0]->width = 2;
+ break;
+ case CFI_INTERFACE_X8_X16:
+ fprintf(stderr, "Warning: Unsupported interface geometry %s, falling back to %s\n", "CFI_INTERFACE_X8_X16", "CFI_INTERFACE_X16");
+ (*cfi_array)->cfi_chips[0]->width = 2;
+ cfi->device_geometry.device_interface = CFI_INTERFACE_X16;
+ break;
+ case CFI_INTERFACE_X32:
+ (*cfi_array)->cfi_chips[0]->width = 4;
+ break;
+ case CFI_INTERFACE_X16_X32:
+ fprintf(stderr, "Warning: Unsupported interface geometry %s, falling back to %s\n", "CFI_INTERFACE_X16_X32", "CFI_INTERFACE_X32");
+ (*cfi_array)->cfi_chips[0]->width = 4;
+ cfi->device_geometry.device_interface = CFI_INTERFACE_X32;
+ break;
+ default:
+ /* unsupported interface geometry */
+ fprintf(stderr, "Error: Unsupported interface geometry %d, bailing out\n", table[i].interface_width);
+ (*cfi_array)->cfi_chips[0]->width = 1;
+ cfi->device_geometry.device_interface = CFI_INTERFACE_X8;
+ return -5;
+ break;
+ }
+
+ cfi->device_geometry.number_of_erase_regions = table[i].numeraseregions;
+
+ cfi->device_geometry.erase_block_regions =
+ malloc( cfi->device_geometry.number_of_erase_regions * sizeof (cfi_erase_block_region_t) );
+ if (!cfi->device_geometry.erase_block_regions)
+ return -2; /* out of memory */
+
+ for(j=0;j<cfi->device_geometry.number_of_erase_regions; j++) {
+ cfi->device_geometry.erase_block_regions[j].erase_block_size =
+ table[i].regions[j].erasesize;
+ cfi->device_geometry.erase_block_regions[j].number_of_erase_blocks =
+ table[i].regions[j].numblocks;
+ }
+
+ fprintf(stderr, "Found %s flash, size = %li bytes.\n", table[i].name, table[i].size);
+
+ return 0;
+}
+
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2008 Kolja Waschk
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Kolja Waschk, 2008,
+ * partially based on snippets from jedec.c/amd_flash.c/cfi.c
+ */
+
+#include <stdint.h>
+#include <stdlib.h>
+#include <string.h>
+#include <stdio.h>
+#include <flash/cfi.h>
+#include <flash/intel.h>
+#include <unistd.h>
+
+#include <jtag.h>
+#include <flash.h>
+#include <bus.h>
+#include <bitmask.h>
+
+void jedec_exp_read_id(bus_t *bus, uint32_t adr, uint32_t dmask,
+ uint32_t pata, uint32_t patb, uint32_t dcmd,
+ int det_addroffset, int det_dataoffset, uint32_t det_addrpat)
+{
+ int locofs;
+
+ det_addrpat <<= det_addroffset;
+ printf(" trying with address pattern base %08x:", det_addrpat);
+ bus_write(bus, adr + det_addrpat, pata);
+ bus_write(bus, adr + (det_addrpat>>1), patb);
+ bus_write(bus, adr + det_addrpat, dcmd);
+
+ for(locofs = 0; locofs <= 2; locofs++)
+ {
+ printf(" %08x", (dmask & bus_read(bus, adr + (locofs<<det_addroffset))) >> det_dataoffset);
+ }
+
+ printf("\n");
+}
+
+int
+jedec_exp_detect( bus_t *bus, uint32_t adr, cfi_array_t **cfi_array )
+{
+ /* Temporary containers for manufacturer and device id while
+ probing with different Autoselect methods. */
+ int ba, bw;
+ int det_buswidth;
+ bus_area_t area;
+
+ *cfi_array = calloc( 1, sizeof (cfi_array_t) );
+ if (!*cfi_array)
+ return -2; /* out of memory */
+
+ (*cfi_array)->bus = bus;
+ (*cfi_array)->address = adr;
+ if (bus_area( bus, adr, &area ) != URJTAG_STATUS_OK)
+ return -8; /* bus width detection failed */
+ bw = area.width;
+
+ if (bw == 0) bw = 32; // autodetection!
+
+ if (bw != 8 && bw != 16 && bw != 32)
+ return -3; /* invalid bus width */
+ (*cfi_array)->bus_width = ba = bw / 8;
+
+ (*cfi_array)->cfi_chips = calloc( 1, sizeof (cfi_chip_t *) );
+ if (!(*cfi_array)->cfi_chips)
+ return -2; /* out of memory */
+
+ (*cfi_array)->cfi_chips[0] = calloc( 1, sizeof (cfi_chip_t) );
+ if (!(*cfi_array)->cfi_chips[0])
+ return -2; /* out of memory */
+
+ printf("=== experimental extensive JEDEC brute-force autodetection ===\n");
+ for(det_buswidth = bw; det_buswidth >= 8; det_buswidth >>= 1)
+ {
+ int det_datawidth;
+ printf("- trying with cpu buswidth %d\n", det_buswidth);
+ for(det_datawidth = det_buswidth; det_datawidth >= 8; det_datawidth >>= 1)
+ {
+ int det_dataoffset;
+ printf("-- trying with flash datawidth %d\n", det_datawidth);
+ for(det_dataoffset = 0; det_dataoffset + det_datawidth <= det_buswidth; det_dataoffset += 8)
+ {
+ int det_addroffset;
+ uint32_t dmask = bits(det_dataoffset, det_datawidth+det_dataoffset-1);
+ uint32_t pata = ~dmask | ( 0xAA << det_dataoffset );
+ uint32_t patb = ~dmask | ( 0x55 << det_dataoffset );
+ uint32_t dcmd = ~dmask | ( 0x90 << det_dataoffset );
+
+ printf("--- trying with flash dataoffset %d", det_dataoffset);
+ printf(" (using %08X, %08X and %08X)\n", pata, patb, dcmd);
+
+ for(det_addroffset = 0; det_addroffset <= 2; det_addroffset++)
+ {
+ jedec_exp_read_id(bus,adr,dmask,pata,patb,dcmd,det_addroffset,det_dataoffset,0x5555);
+ jedec_exp_read_id(bus,adr,dmask,pata,patb,dcmd,det_addroffset,det_dataoffset,0x0555);
+ }
+ }
+ }
+ }
+ printf("=== end of experimental extensive JEDEC brute-force autodetection ===\n");
+
+ return 1;
+}
+
--- /dev/null
+#
+# $Id: Makefile.am $
+#
+# Copyright (C) 2008 Kolja Waschk <kawk>
+#
+# Permission is hereby granted, free of charge, to any person obtaining a copy
+# of this software and associated documentation files (the "Software"), to deal
+# in the Software without restriction, including without limitation the rights
+# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+# copies of the Software, and to permit persons to whom the Software is
+# furnished to do so, subject to the following conditions:
+#
+# The above copyright notice and this permission notice shall be included in
+# all copies or substantial portions of the Software.
+#
+# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+# AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+# OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+# THE SOFTWARE.
+
+include $(top_srcdir)/Makefile.rules
+
+noinst_LIBRARIES = libjim.a
+
+libjim_a_SOURCES = \
+ tap.c \
+ some_cpu.c \
+ intel_28f800b3.c
--- /dev/null
+# This directory contains source code that simulates various aspects of
+# a target. It is mainly thought to assist in testing and debugging the rest of
+# UrJTAG. The connection between UrJTAG and the code here currently is by means
+# of a special "cable" named "jim", which can access a virtual chain of
+# devices. The only device yet is "some_cpu", which is automatically put in
+# the chain when you type "cable jim".
+
+cable jim
+bsdl path .
+detect
+initbus prototype amsb=A(31) alsb=A(0) dmsb=D(15) dlsb=D(0) cs=CS oe=OE we=WE amode=x16
+detectflash 0
+# eraseflash 0 1
+
--- /dev/null
+/*
+ * $Id: tap.c $
+ *
+ * Copyright (C) 2008 Kolja Waschk <kawk>
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This code simulates an Intel Advanced Boot Block Flash Memory (B3) 28FxxxB3.
+ * The simulation is based on documentation found in the corresponding datasheet,
+ * Order Number 290580, Revision: 020, 18 Aug 2005.
+ */
+
+#include <jim.h>
+#include <stdint.h>
+#include <stdlib.h>
+#include <stdio.h>
+#include <sys/time.h>
+#include <time.h>
+
+#undef VERBOSE
+
+typedef enum
+{
+ READ_ARRAY = 0,
+ READ_STATUS = 1,
+ READ_ID = 2,
+ PROG_SETUP = 3,
+ PROG_CONTINUE = 4,
+ PROG_SUSP_TO_READ_STATUS = 5,
+ PROG_SUSP_TO_READ_ARRAY = 6,
+ PROG_SUSP_TO_READ_ID = 7,
+ PROG_COMPLETE = 8,
+ ERASE_SETUP = 9,
+ ERASE_ERROR = 10,
+ ERASE_CONTINUE = 11,
+ ERASE_SUSP_TO_READ_STATUS = 12,
+ ERASE_SUSP_TO_READ_ARRAY = 13,
+ ERASE_SUSP_TO_READ_ID = 14,
+ ERASE_COMPLETE = 15
+}
+intel_f28xxxb3_op_state_t;
+
+const char *intel_28fxxx_opstate_name[16] =
+{
+ "READ_ARRAY",
+ "READ_STATUS",
+ "READ_ID",
+ "PROG_SETUP",
+ "PROG_CONTINUE",
+ "PROG_SUSP_TO_READ_STATUS",
+ "PROG_SUSP_TO_READ_ARRAY",
+ "PROG_SUSP_TO_READ_ID",
+ "PROG_COMPLETE",
+ "ERASE_SETUP",
+ "ERASE_ERROR",
+ "ERASE_CONTINUE",
+ "ERASE_SUSP_TO_READ_STATUS",
+ "ERASE_SUSP_TO_READ_ARRAY",
+ "ERASE_SUSP_TO_READ_ID",
+ "ERASE_COMPLETE"
+};
+
+typedef enum
+{
+ TOP = 0,
+ BOTTOM = 1
+}
+b3_boot_type_t;
+
+#define I28F_WSM_READY 0x80
+#define I28F_ERASE_SUSPENDED 0x40
+#define I28F_ERASE_ERROR 0x20
+#define I28F_PROG_ERROR 0x10
+#define I28F_VPP_LOW 0x08
+#define I28F_PROG_SUSPENDED 0x04
+#define I28F_BLOCK_LOCKED 0x02
+#define I28F_RESERVED 0x01
+
+
+typedef struct
+{
+ uint16_t identifier;
+ uint32_t data_buffer;
+ uint32_t address_buffer;
+ uint32_t control_buffer;
+ uint8_t status, status_buffer;
+ intel_f28xxxb3_op_state_t opstate;
+ b3_boot_type_t boot_type;
+ struct timeval prog_start_time;
+}
+intel_f28xxxb3_state_t;
+
+void intel_28fxxxb3_init(jim_bus_device_t *d, uint16_t id, b3_boot_type_t bt)
+{
+ d->state = malloc(sizeof(intel_f28xxxb3_state_t));
+ if(d->state != NULL)
+ {
+ intel_f28xxxb3_state_t *is = d->state;
+ is->opstate = READ_ARRAY;
+ is->identifier = id;
+ is->boot_type = bt;
+ is->status = 0x00;
+ is->status_buffer = 0x00;
+ is->control_buffer = 0x00000000;
+ }
+}
+
+void intel_28f800b3b_init(jim_bus_device_t *d)
+{
+ intel_28fxxxb3_init(d, 0x8893, BOTTOM);
+}
+
+void intel_28fxxxb3_free(jim_bus_device_t *d)
+{
+ if(d->state != NULL) free(d->state);
+}
+
+uint32_t intel_28fxxxb3_capture(jim_bus_device_t *d,
+ uint32_t address, uint32_t control,
+ uint8_t *shmem, size_t shmem_size)
+{
+ uint32_t data = 0;
+
+ if((control&7) == 5) /* OE and CS: READ */
+ {
+ intel_f28xxxb3_state_t *is = d->state;
+
+ switch(is->opstate)
+ {
+ case READ_STATUS:
+ case PROG_CONTINUE:
+ case ERASE_CONTINUE:
+ case PROG_SUSP_TO_READ_STATUS:
+ case ERASE_SUSP_TO_READ_STATUS:
+ data = is->status_buffer;
+ break;
+
+ case READ_ID:
+ case PROG_SUSP_TO_READ_ID:
+ case ERASE_SUSP_TO_READ_ID:
+ if(address == 1) data = is->identifier;
+ else if(address == 0) data = 0x0089;
+ break;
+
+ case READ_ARRAY:
+ case PROG_SUSP_TO_READ_ARRAY:
+ case ERASE_SUSP_TO_READ_ARRAY:
+ data = shmem[(address<<1)]<<8;
+ data |= shmem[(address<<1)]+1;
+ break;
+
+ default:
+ break;
+ }
+#ifdef VERBOSE
+ printf("i28fxxxb3: read %04X from %08X (in %s)\n",
+ data & 0xFFFF, address, intel_28fxxx_opstate_name[is->opstate]);
+#endif
+ }
+
+#if 0
+ printf("capture A=%08X, D=%08X%s%s%s\n", address, data,
+ (control & 1) ? ", OE":"",
+ (control & 2) ? ", WE":"",
+ (control & 4) ? ", CS":"");
+#endif
+
+ return data;
+}
+
+void intel_28fxxxb3_update(jim_bus_device_t *d,
+ uint32_t address, uint32_t data, uint32_t control,
+ uint8_t *shmem, size_t shmem_size)
+{
+#if 0
+ printf("update A=%08X, D=%08X%s%s%s\n", address, data,
+ (control & 1) ? ", OE":"",
+ (control & 2) ? ", WE":"",
+ (control & 4) ? ", CS":"");
+#endif
+
+ if(d->state != NULL)
+ {
+ intel_f28xxxb3_state_t *is = d->state;
+ if( (((is->control_buffer&1)==0) && ((control&1)==1)) /* OE rise */
+ ||(((is->control_buffer&4)==0) && ((control&4)==1))) /* CS rise */
+ {
+ if(is->opstate == PROG_CONTINUE || is->opstate == ERASE_CONTINUE)
+ {
+ long dusecs;
+ struct timeval yet, diff;
+ gettimeofday(&yet, NULL);
+
+ diff.tv_sec = yet.tv_sec - is->prog_start_time.tv_sec;
+ if(yet.tv_usec >= is->prog_start_time.tv_usec)
+ {
+ diff.tv_usec = yet.tv_usec - is->prog_start_time.tv_usec;
+ }
+ else
+ {
+ diff.tv_usec = yet.tv_usec + 1E6 - is->prog_start_time.tv_usec;
+ diff.tv_sec --;
+ }
+ dusecs = 1E6 * diff.tv_sec + diff.tv_usec;
+ if(is->opstate == PROG_CONTINUE)
+ {
+ if(dusecs > 40)
+ {
+ shmem[(is->address_buffer<<1)] &= ((data >> 8) & 0xFF);
+ shmem[(is->address_buffer<<1) + 1] &= (data & 0xFF);
+ is->status |= I28F_WSM_READY;
+ }
+ }
+ else if(is->opstate == ERASE_CONTINUE)
+ {
+ if(dusecs > 600E3)
+ {
+ is->status |= I28F_WSM_READY;
+ }
+ }
+ }
+ is->status_buffer = is->status; /* latch status */
+ }
+
+ if(((control&7)==6)&&((is->control_buffer&2)!=2)) /* WE rise, CS active: WRITE */
+ {
+ intel_f28xxxb3_state_t *is = d->state;
+ uint8_t dl = data & 0xFF;
+
+#ifdef VERBOSE
+ printf("i28fxxxb3: write %04X to %08X (in %s)\n",
+ data & 0xFFFF, address, intel_28fxxx_opstate_name[is->opstate]);
+#endif
+
+ if(dl == 0x50)
+ {
+ is->status &= ~(I28F_BLOCK_LOCKED|I28F_VPP_LOW|I28F_PROG_ERROR|I28F_ERASE_ERROR);
+ }
+
+ switch(is->opstate)
+ {
+ case READ_STATUS:
+ case READ_ARRAY:
+ case READ_ID:
+ switch(dl)
+ {
+ case 0x10:
+ case 0x40: is->opstate = PROG_SETUP; break;
+ case 0x20: is->opstate = ERASE_SETUP; break;
+ case 0x70: is->opstate = READ_STATUS; break;
+ case 0x90: is->opstate = READ_ID; break;
+ default: is->opstate = READ_ARRAY; break;
+ }
+ break;
+
+ case PROG_SETUP:
+ if(dl != 0x10 && dl != 0x40)
+ {
+ is->status |= I28F_PROG_ERROR | I28F_ERASE_ERROR;
+ is->opstate = READ_STATUS;
+ }
+ else
+ {
+ is->status &= ~I28F_WSM_READY;
+ is->data_buffer = data;
+ is->address_buffer = address;
+ is->opstate = PROG_CONTINUE;
+ gettimeofday(&(is->prog_start_time), NULL);
+ }
+ break;
+
+ case PROG_CONTINUE:
+ if(dl == 0xB0)
+ {
+ is->opstate = PROG_SUSP_TO_READ_STATUS;
+ is->status |= I28F_PROG_SUSPENDED;
+ }
+ break;
+
+ case PROG_SUSP_TO_READ_STATUS:
+ case PROG_SUSP_TO_READ_ARRAY:
+ case PROG_SUSP_TO_READ_ID:
+ switch(dl)
+ {
+ case 0xD0: is->status &= ~I28F_PROG_SUSPENDED;
+ is->opstate = PROG_CONTINUE; break;
+ case 0x70: is->opstate = PROG_SUSP_TO_READ_STATUS; break;
+ case 0x90: is->opstate = PROG_SUSP_TO_READ_ID; break;
+ default: is->opstate = PROG_SUSP_TO_READ_ARRAY; break;
+ }
+ break;
+
+ case ERASE_SETUP:
+ if(dl != 0xD0)
+ {
+ is->status |= I28F_PROG_ERROR | I28F_ERASE_ERROR;
+ is->opstate = READ_STATUS;
+ }
+ else
+ {
+ is->status &= 0x7F;
+ is->data_buffer = data;
+ is->address_buffer = address;
+ is->opstate = ERASE_CONTINUE;
+ gettimeofday(&(is->prog_start_time), NULL);
+ }
+ break;
+
+ case ERASE_CONTINUE:
+ if(dl == 0xB0)
+ {
+ is->opstate = ERASE_SUSP_TO_READ_STATUS;
+ is->status |= I28F_ERASE_SUSPENDED;
+ }
+ break;
+
+ case ERASE_SUSP_TO_READ_STATUS:
+ case ERASE_SUSP_TO_READ_ARRAY:
+ case ERASE_SUSP_TO_READ_ID:
+ switch(dl)
+ {
+ case 0xD0: is->status &= ~I28F_ERASE_SUSPENDED;
+ is->opstate = ERASE_CONTINUE; break;
+ case 0x70: is->opstate = ERASE_SUSP_TO_READ_STATUS; break;
+ case 0x90: is->opstate = ERASE_SUSP_TO_READ_ID; break;
+ default: is->opstate = ERASE_SUSP_TO_READ_ARRAY; break;
+ }
+ break;
+
+ case PROG_COMPLETE:
+ case ERASE_ERROR:
+ case ERASE_COMPLETE:
+ switch(dl)
+ {
+ case 0x10:
+ case 0x40: is->opstate = PROG_SETUP; break;
+ case 0x20: is->opstate = ERASE_SETUP; break;
+ case 0x70: is->opstate = READ_STATUS; break;
+ case 0x90: is->opstate = READ_ID; break;
+ default: is->opstate = READ_ARRAY; break;
+ }
+ break;
+ }
+ }
+ is->control_buffer = control;
+ }
+}
+
+jim_bus_device_t intel_28f800b3b =
+{
+ 2, /* width [bytes] */
+ 0x80000, /* size [words, each <width> bytes] */
+ NULL, /* state */
+ intel_28f800b3b_init, /* init() */
+ intel_28fxxxb3_capture, /* access() */
+ intel_28fxxxb3_update, /* access() */
+ intel_28fxxxb3_free /* free() */
+};
+
--- /dev/null
+--
+-- $Id: $
+--
+-- BSDL definitions for "some_cpu" of "JTAG target simulator"
+--
+-- Copyright (C) 2008 Kolja Waschk <kawk>
+--
+-- Permission is hereby granted, free of charge, to any person obtaining a copy
+-- of this software and associated documentation files (the "Software"), to deal
+-- in the Software without restriction, including without limitation the rights
+-- to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+-- copies of the Software, and to permit persons to whom the Software is
+-- furnished to do so, subject to the following conditions:
+--
+-- The above copyright notice and this permission notice shall be included in
+-- all copies or substantial portions of the Software.
+--
+-- THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+-- IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+-- FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+-- AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+-- LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+-- OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+-- THE SOFTWARE.
+--
+--
+--
+-- The following Perl code has been used to create the BSR mapping.
+-- It is aligned for easy access to the register in the some_cpu.c code:
+--
+-- 31.. 0 address output A31..A0 (A0 addresses bytes!)
+-- 63..32 data output (from CPU to attached parts) D31..D0
+-- 95..64 data input (from attached parts to CPU) D31..D0
+-- 96 control output OE
+-- 97 control output WE
+-- 98 control output CS
+-- 99 control input RESET
+--
+--
+-- sub io_pin($$$$$)
+-- {
+-- my ($inbitno, $outbitno, $ctrlbitno, $name,$dir) = @_;
+--
+-- if($dir eq 'inout' || $dir eq 'in') {
+-- printf '"%d (BC_1, %s, input, X), " &%s', $inbitno, $name, "\n";
+-- } else {
+-- printf '"%d (BC_1, *, internal, X), " &%s', $inbitno, "\n";
+-- };
+-- if($dir ne 'in') {
+-- printf '"%d (BC_1, %s, output3, X, %d, 0, Z), " &%s', $outbitno, $name, $ctrlbitno, "\n";
+-- printf '"%d (BC_1, *, control, 0), " &%s', $ctrlbitno, "\n";
+-- }
+-- }
+--
+-- #######################################
+--
+-- io_pin(100, 96, 103, 'OE','out');
+-- io_pin(101, 97, 104, 'WE','out');
+-- io_pin(102, 98, 105, 'CS','out');
+-- io_pin(99, 0, 0, 'RESET','in');
+-- $bsi = 106;
+--
+-- for(my $i=0;$i<32; $i++) {
+-- # address output in 0.. 31
+-- # address buffer in
+-- # address control in
+-- io_pin($i+$bsi,$i,$i+$bsi+32,sprintf('A(%d)',$i),'out');
+-- }
+-- for(my $i=0;$i<32; $i++) {
+-- # data output in 32.. 63
+-- # data input in 64.. 95
+-- # data control in
+-- io_pin($i+64, $i+32, $i+$bsi+64, sprintf('D(%d)',$i), 'inout');
+-- };
+
+
+entity some_cpu is
+
+generic (PHYSICAL_PIN_MAP : string := " JIM ");
+
+port (
+ RESET : in bit ;
+ TCK : in bit ;
+ TMS : in bit ;
+ TDO : out bit ;
+ TDI : in bit ;
+ OE : out bit ;
+ CS : out bit ;
+ WE : out bit ;
+ A : out bit_vector(0 to 31);
+ D : inout bit_vector(0 to 31)
+);
+
+use STD_1149_1_1994.all;
+
+attribute COMPONENT_CONFORMANCE of some_cpu : entity is " STD_1149_1_1993 ";
+attribute PIN_MAP of some_cpu : entity is PHYSICAL_PIN_MAP ;
+
+constant JIM : PIN_MAP_STRING:=
+" CS : 2, " &
+" OE : 3, " &
+" WE : 4, " &
+" TCK : 5, " &
+" TMS : 6, " &
+" TDO : 7, " &
+" TDI : 8, " &
+" A : (100,101,102,103,104,105,106,107,108,109," &
+ "110,111,112,113,114,115,116,117,118,119," &
+ "120,121,122,123,124,125,126,127,128,129,130,131) , " &
+" D : (200,201,202,203,204,205,206,207,208,209," &
+ "210,211,212,213,214,215,216,217,218,219," &
+ "220,221,222,223,224,225,226,227,228,229,230,231) , " &
+" RESET : 1 " ;
+
+attribute TAP_SCAN_IN of TDI : signal is true ;
+attribute TAP_SCAN_OUT of TDO : signal is true ;
+attribute TAP_SCAN_MODE of TMS : signal is true ;
+attribute TAP_SCAN_CLOCK of TCK : signal is (8.0e6, BOTH) ;
+
+attribute INSTRUCTION_LENGTH of some_cpu : entity is 2 ;
+
+attribute INSTRUCTION_OPCODE of some_cpu : entity is
+" EXTEST ( 00 )," &
+" IDCODE ( 01 )," &
+" SAMPLE ( 10 )," &
+" BYPASS ( 11 )" ;
+
+attribute INSTRUCTION_CAPTURE of some_cpu : entity is " 01 ";
+
+attribute IDCODE_REGISTER of some_cpu : entity is "10000111011001010100001100100001" ;
+
+attribute BOUNDARY_LENGTH of some_cpu : entity is 202 ;
+
+attribute BOUNDARY_REGISTER of some_cpu : entity is
+
+"100 (BC_1, *, internal, X), " &
+"96 (BC_1, OE, output3, X, 103, 0, Z), " &
+"103 (BC_1, *, control, 0), " &
+"101 (BC_1, *, internal, X), " &
+"97 (BC_1, WE, output3, X, 104, 0, Z), " &
+"104 (BC_1, *, control, 0), " &
+"102 (BC_1, *, internal, X), " &
+"98 (BC_1, CS, output3, X, 105, 0, Z), " &
+"105 (BC_1, *, control, 0), " &
+"99 (BC_1, RESET, input, X), " &
+"106 (BC_1, *, internal, X), " &
+"0 (BC_1, A(0), output3, X, 138, 0, Z), " &
+"138 (BC_1, *, control, 0), " &
+"107 (BC_1, *, internal, X), " &
+"1 (BC_1, A(1), output3, X, 139, 0, Z), " &
+"139 (BC_1, *, control, 0), " &
+"108 (BC_1, *, internal, X), " &
+"2 (BC_1, A(2), output3, X, 140, 0, Z), " &
+"140 (BC_1, *, control, 0), " &
+"109 (BC_1, *, internal, X), " &
+"3 (BC_1, A(3), output3, X, 141, 0, Z), " &
+"141 (BC_1, *, control, 0), " &
+"110 (BC_1, *, internal, X), " &
+"4 (BC_1, A(4), output3, X, 142, 0, Z), " &
+"142 (BC_1, *, control, 0), " &
+"111 (BC_1, *, internal, X), " &
+"5 (BC_1, A(5), output3, X, 143, 0, Z), " &
+"143 (BC_1, *, control, 0), " &
+"112 (BC_1, *, internal, X), " &
+"6 (BC_1, A(6), output3, X, 144, 0, Z), " &
+"144 (BC_1, *, control, 0), " &
+"113 (BC_1, *, internal, X), " &
+"7 (BC_1, A(7), output3, X, 145, 0, Z), " &
+"145 (BC_1, *, control, 0), " &
+"114 (BC_1, *, internal, X), " &
+"8 (BC_1, A(8), output3, X, 146, 0, Z), " &
+"146 (BC_1, *, control, 0), " &
+"115 (BC_1, *, internal, X), " &
+"9 (BC_1, A(9), output3, X, 147, 0, Z), " &
+"147 (BC_1, *, control, 0), " &
+"116 (BC_1, *, internal, X), " &
+"10 (BC_1, A(10), output3, X, 148, 0, Z), " &
+"148 (BC_1, *, control, 0), " &
+"117 (BC_1, *, internal, X), " &
+"11 (BC_1, A(11), output3, X, 149, 0, Z), " &
+"149 (BC_1, *, control, 0), " &
+"118 (BC_1, *, internal, X), " &
+"12 (BC_1, A(12), output3, X, 150, 0, Z), " &
+"150 (BC_1, *, control, 0), " &
+"119 (BC_1, *, internal, X), " &
+"13 (BC_1, A(13), output3, X, 151, 0, Z), " &
+"151 (BC_1, *, control, 0), " &
+"120 (BC_1, *, internal, X), " &
+"14 (BC_1, A(14), output3, X, 152, 0, Z), " &
+"152 (BC_1, *, control, 0), " &
+"121 (BC_1, *, internal, X), " &
+"15 (BC_1, A(15), output3, X, 153, 0, Z), " &
+"153 (BC_1, *, control, 0), " &
+"122 (BC_1, *, internal, X), " &
+"16 (BC_1, A(16), output3, X, 154, 0, Z), " &
+"154 (BC_1, *, control, 0), " &
+"123 (BC_1, *, internal, X), " &
+"17 (BC_1, A(17), output3, X, 155, 0, Z), " &
+"155 (BC_1, *, control, 0), " &
+"124 (BC_1, *, internal, X), " &
+"18 (BC_1, A(18), output3, X, 156, 0, Z), " &
+"156 (BC_1, *, control, 0), " &
+"125 (BC_1, *, internal, X), " &
+"19 (BC_1, A(19), output3, X, 157, 0, Z), " &
+"157 (BC_1, *, control, 0), " &
+"126 (BC_1, *, internal, X), " &
+"20 (BC_1, A(20), output3, X, 158, 0, Z), " &
+"158 (BC_1, *, control, 0), " &
+"127 (BC_1, *, internal, X), " &
+"21 (BC_1, A(21), output3, X, 159, 0, Z), " &
+"159 (BC_1, *, control, 0), " &
+"128 (BC_1, *, internal, X), " &
+"22 (BC_1, A(22), output3, X, 160, 0, Z), " &
+"160 (BC_1, *, control, 0), " &
+"129 (BC_1, *, internal, X), " &
+"23 (BC_1, A(23), output3, X, 161, 0, Z), " &
+"161 (BC_1, *, control, 0), " &
+"130 (BC_1, *, internal, X), " &
+"24 (BC_1, A(24), output3, X, 162, 0, Z), " &
+"162 (BC_1, *, control, 0), " &
+"131 (BC_1, *, internal, X), " &
+"25 (BC_1, A(25), output3, X, 163, 0, Z), " &
+"163 (BC_1, *, control, 0), " &
+"132 (BC_1, *, internal, X), " &
+"26 (BC_1, A(26), output3, X, 164, 0, Z), " &
+"164 (BC_1, *, control, 0), " &
+"133 (BC_1, *, internal, X), " &
+"27 (BC_1, A(27), output3, X, 165, 0, Z), " &
+"165 (BC_1, *, control, 0), " &
+"134 (BC_1, *, internal, X), " &
+"28 (BC_1, A(28), output3, X, 166, 0, Z), " &
+"166 (BC_1, *, control, 0), " &
+"135 (BC_1, *, internal, X), " &
+"29 (BC_1, A(29), output3, X, 167, 0, Z), " &
+"167 (BC_1, *, control, 0), " &
+"136 (BC_1, *, internal, X), " &
+"30 (BC_1, A(30), output3, X, 168, 0, Z), " &
+"168 (BC_1, *, control, 0), " &
+"137 (BC_1, *, internal, X), " &
+"31 (BC_1, A(31), output3, X, 169, 0, Z), " &
+"169 (BC_1, *, control, 0), " &
+"64 (BC_1, D(0), input, X), " &
+"32 (BC_1, D(0), output3, X, 170, 0, Z), " &
+"170 (BC_1, *, control, 0), " &
+"65 (BC_1, D(1), input, X), " &
+"33 (BC_1, D(1), output3, X, 171, 0, Z), " &
+"171 (BC_1, *, control, 0), " &
+"66 (BC_1, D(2), input, X), " &
+"34 (BC_1, D(2), output3, X, 172, 0, Z), " &
+"172 (BC_1, *, control, 0), " &
+"67 (BC_1, D(3), input, X), " &
+"35 (BC_1, D(3), output3, X, 173, 0, Z), " &
+"173 (BC_1, *, control, 0), " &
+"68 (BC_1, D(4), input, X), " &
+"36 (BC_1, D(4), output3, X, 174, 0, Z), " &
+"174 (BC_1, *, control, 0), " &
+"69 (BC_1, D(5), input, X), " &
+"37 (BC_1, D(5), output3, X, 175, 0, Z), " &
+"175 (BC_1, *, control, 0), " &
+"70 (BC_1, D(6), input, X), " &
+"38 (BC_1, D(6), output3, X, 176, 0, Z), " &
+"176 (BC_1, *, control, 0), " &
+"71 (BC_1, D(7), input, X), " &
+"39 (BC_1, D(7), output3, X, 177, 0, Z), " &
+"177 (BC_1, *, control, 0), " &
+"72 (BC_1, D(8), input, X), " &
+"40 (BC_1, D(8), output3, X, 178, 0, Z), " &
+"178 (BC_1, *, control, 0), " &
+"73 (BC_1, D(9), input, X), " &
+"41 (BC_1, D(9), output3, X, 179, 0, Z), " &
+"179 (BC_1, *, control, 0), " &
+"74 (BC_1, D(10), input, X), " &
+"42 (BC_1, D(10), output3, X, 180, 0, Z), " &
+"180 (BC_1, *, control, 0), " &
+"75 (BC_1, D(11), input, X), " &
+"43 (BC_1, D(11), output3, X, 181, 0, Z), " &
+"181 (BC_1, *, control, 0), " &
+"76 (BC_1, D(12), input, X), " &
+"44 (BC_1, D(12), output3, X, 182, 0, Z), " &
+"182 (BC_1, *, control, 0), " &
+"77 (BC_1, D(13), input, X), " &
+"45 (BC_1, D(13), output3, X, 183, 0, Z), " &
+"183 (BC_1, *, control, 0), " &
+"78 (BC_1, D(14), input, X), " &
+"46 (BC_1, D(14), output3, X, 184, 0, Z), " &
+"184 (BC_1, *, control, 0), " &
+"79 (BC_1, D(15), input, X), " &
+"47 (BC_1, D(15), output3, X, 185, 0, Z), " &
+"185 (BC_1, *, control, 0), " &
+"80 (BC_1, D(16), input, X), " &
+"48 (BC_1, D(16), output3, X, 186, 0, Z), " &
+"186 (BC_1, *, control, 0), " &
+"81 (BC_1, D(17), input, X), " &
+"49 (BC_1, D(17), output3, X, 187, 0, Z), " &
+"187 (BC_1, *, control, 0), " &
+"82 (BC_1, D(18), input, X), " &
+"50 (BC_1, D(18), output3, X, 188, 0, Z), " &
+"188 (BC_1, *, control, 0), " &
+"83 (BC_1, D(19), input, X), " &
+"51 (BC_1, D(19), output3, X, 189, 0, Z), " &
+"189 (BC_1, *, control, 0), " &
+"84 (BC_1, D(20), input, X), " &
+"52 (BC_1, D(20), output3, X, 190, 0, Z), " &
+"190 (BC_1, *, control, 0), " &
+"85 (BC_1, D(21), input, X), " &
+"53 (BC_1, D(21), output3, X, 191, 0, Z), " &
+"191 (BC_1, *, control, 0), " &
+"86 (BC_1, D(22), input, X), " &
+"54 (BC_1, D(22), output3, X, 192, 0, Z), " &
+"192 (BC_1, *, control, 0), " &
+"87 (BC_1, D(23), input, X), " &
+"55 (BC_1, D(23), output3, X, 193, 0, Z), " &
+"193 (BC_1, *, control, 0), " &
+"88 (BC_1, D(24), input, X), " &
+"56 (BC_1, D(24), output3, X, 194, 0, Z), " &
+"194 (BC_1, *, control, 0), " &
+"89 (BC_1, D(25), input, X), " &
+"57 (BC_1, D(25), output3, X, 195, 0, Z), " &
+"195 (BC_1, *, control, 0), " &
+"90 (BC_1, D(26), input, X), " &
+"58 (BC_1, D(26), output3, X, 196, 0, Z), " &
+"196 (BC_1, *, control, 0), " &
+"91 (BC_1, D(27), input, X), " &
+"59 (BC_1, D(27), output3, X, 197, 0, Z), " &
+"197 (BC_1, *, control, 0), " &
+"92 (BC_1, D(28), input, X), " &
+"60 (BC_1, D(28), output3, X, 198, 0, Z), " &
+"198 (BC_1, *, control, 0), " &
+"93 (BC_1, D(29), input, X), " &
+"61 (BC_1, D(29), output3, X, 199, 0, Z), " &
+"199 (BC_1, *, control, 0), " &
+"94 (BC_1, D(30), input, X), " &
+"62 (BC_1, D(30), output3, X, 200, 0, Z), " &
+"200 (BC_1, *, control, 0), " &
+"95 (BC_1, D(31), input, X), " &
+"63 (BC_1, D(31), output3, X, 201, 0, Z), " &
+"201 (BC_1, *, control, 0) " ;
+
+end some_cpu ;
+
+
+
--- /dev/null
+/*
+ * $Id: tap.c $
+ *
+ * Copyright (C) 2008 Kolja Waschk <kawk>
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+#include <jim.h>
+#include <bitmask.h>
+
+#undef VERBOSE
+
+extern jim_bus_device_t intel_28f800b3b;
+
+jim_attached_part_t some_cpu_attached[] =
+{
+ /* 1. Address offset: base offset [bytes]
+ * 2. Address shift: Distance between address LSB of device and CPU
+ * 3. Data shift: Distance between D0 of device and CPU e.g. 0, 8, 16 or 24 bits
+ * 4. Part: Pointer to part structure */
+
+ { 0x00000000, 1, 0, &intel_28f800b3b },
+
+ { 0xFFFFFFFF, 0, 0, NULL } /* Always end list with part == NULL */
+};
+
+#define BSR_LEN 202
+
+void some_cpu_report_idcode(jim_device_t *dev)
+{
+ dev->sreg[0].reg[0] = 0x1; /* IDCODE instruction b0001 */
+ dev->sreg[1].reg[0] = 0x87654321; /* Load IDR (fake) */
+ dev->current_dr = 1; /* IDR */
+}
+
+void some_cpu_tck_rise(jim_device_t *dev,
+ int tms, int tdi,
+ uint8_t *shmem, size_t shmem_size )
+{
+ int i;
+
+ switch(dev->tap_state)
+ {
+ case RESET:
+
+ some_cpu_report_idcode(dev);
+ break;
+
+ case CAPTURE_DR:
+
+ if(dev->current_dr==2) // if(dev->sreg[0].reg[0] == 0 && dev->current_dr == 2) /* EXTEST */
+ {
+ uint32_t a = dev->sreg[2].reg[0];
+ uint32_t d = 0;
+ uint32_t c = dev->sreg[2].reg[3];
+
+#ifdef VERBOSE
+ printf("CAPTURE_DR/EXTEST\n");
+#endif
+
+ for(i=0; some_cpu_attached[i].part; i++)
+ {
+ jim_attached_part_t *tp = &(((jim_attached_part_t*)(dev->state))[i]);
+ jim_bus_device_t *b = tp->part;
+
+ /* Address decoder */
+ if(tp->offset <= a)
+ {
+ uint32_t as = (a - (tp->offset)) >> tp->adr_shift;
+ if(as < b->size)
+ {
+ d |= b->capture(b, as, c, shmem, shmem_size) << tp->data_shift;
+ }
+ }
+ }
+
+ /* Store data into data "input" cells in BSR */
+ dev->sreg[2].reg[2] = d;
+ }
+ break;
+
+ case UPDATE_IR:
+
+#ifdef VERBOSE
+ printf("UPDATE_IR/");
+#endif
+
+ switch(dev->sreg[0].reg[0])
+ {
+ case 0x0: /* EXTEST */
+#ifdef VERBOSE
+ printf("EXTEST\n");
+#endif
+ dev->current_dr = 2;
+ break;
+ case 0x1: /* IDCODE */
+#ifdef VERBOSE
+ printf("IDCODE\n");
+#endif
+ some_cpu_report_idcode(dev);
+ break;
+ case 0x2: /* SAMPLE */
+#ifdef VERBOSE
+ printf("SAMPLE\n");
+#endif
+ dev->current_dr = 2;
+ break;
+ case 0x3: /* BYPASS */
+#ifdef VERBOSE
+ printf("BYPASS\n");
+#endif
+ default:
+ dev->current_dr = 0; /* BYPASS */
+ break;
+ }
+ break;
+
+ default:
+ break;
+ }
+}
+
+void some_cpu_tck_fall(jim_device_t *dev,
+ uint8_t *shmem, size_t shmem_size )
+{
+ int i;
+
+ switch(dev->tap_state)
+ {
+ case UPDATE_DR:
+
+ if(dev->sreg[0].reg[0] == 0 && dev->current_dr == 2) /* EXTEST */
+ {
+ uint32_t a = dev->sreg[2].reg[0];
+ uint32_t d = dev->sreg[2].reg[1];
+ uint32_t c = dev->sreg[2].reg[3];
+
+#ifdef VERBOSE
+ printf("UPDATE_DR/EXTEST\n");
+#endif
+
+ for(i=0; some_cpu_attached[i].part; i++)
+ {
+ jim_attached_part_t *tp = &(((jim_attached_part_t*)(dev->state))[i]);
+ jim_bus_device_t *b = tp->part;
+
+ /* Address decoder */
+ if(tp->offset <= a)
+ {
+ uint32_t as = (a - (tp->offset)) >> tp->adr_shift;
+ if(as < b->size)
+ {
+ b->update(b, as, d >> tp->data_shift, c, shmem, shmem_size);
+ }
+ }
+ }
+ }
+ break;
+
+ default:
+ break;
+ }
+}
+
+void some_cpu_free(jim_device_t *dev)
+{
+ int i;
+
+ if(!dev) return;
+ if(!dev->state) return;
+
+ for(i=0;some_cpu_attached[i].part;i++)
+ {
+ jim_bus_device_t *b = ((jim_attached_part_t*)(dev->state))[i].part;
+ if(b->free != NULL) b->free(b);
+ free(b);
+ }
+ free(dev->state);
+}
+
+jim_device_t *some_cpu(void)
+{
+ jim_device_t *dev;
+ const int reg_size[3] = { 2 /* IR */, 32 /* IDR */, BSR_LEN /* BSR */ };
+
+ dev = jim_alloc_device(3, reg_size);
+
+ if(dev)
+ {
+ /* Allocate memory for copies of the original structure for dynamic
+ * modifications (e.g. if bus width changes because of some signal) */
+
+ dev->state = malloc(sizeof(some_cpu_attached));
+ if(!dev->state)
+ {
+ free(dev);
+ dev = NULL;
+ }
+ else
+ {
+ int i;
+ dev->tck_rise = some_cpu_tck_rise;
+ dev->tck_fall = some_cpu_tck_fall;
+ dev->dev_free = some_cpu_free;
+ memcpy(dev->state, some_cpu_attached, sizeof(some_cpu_attached));
+
+ for(i=0;some_cpu_attached[i].part;i++)
+ {
+ jim_bus_device_t **b = &(((jim_attached_part_t*)(dev->state))[i].part);
+ *b = malloc(sizeof(jim_bus_device_t));
+ if(*b == NULL) break;
+ memcpy(*b, some_cpu_attached[i].part, sizeof(jim_bus_device_t));
+ (*b)->init(*b);
+ }
+
+ if(some_cpu_attached[i].part) /* loop broken; failed to malloc all parts */
+ {
+ for(i--;i>=0;i--) free(((jim_attached_part_t*)(dev->state))[i].part);
+ free(dev->state);
+ free(dev);
+ dev = NULL;
+ }
+ }
+ }
+ return dev;
+}
+
--- /dev/null
+/*
+ * $Id: tap.c $
+ *
+ * Copyright (C) 2008 Kolja Waschk <kawk>
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+#include <stdint.h>
+#include <jim.h>
+
+#include <jim/some_cpu.h>
+
+#undef VERBOSE
+
+const tap_state_t next_tap_state[16][2] =
+{
+ /* RESET */ { IDLE, RESET },
+ /* SELECT_DR */ { CAPTURE_DR, SELECT_IR },
+ /* CAPTURE_DR */ { SHIFT_DR, EXIT1_DR },
+ /* SHIFT_DR */ { SHIFT_DR, EXIT1_DR },
+ /* EXIT1_DR */ { PAUSE_DR, UPDATE_DR },
+ /* PAUSE_DR */ { PAUSE_DR, EXIT2_DR },
+ /* EXIT2_DR */ { SHIFT_DR, UPDATE_DR },
+ /* UPDATE_DR */ { IDLE, SELECT_DR },
+ /* IDLE */ { IDLE, SELECT_DR },
+ /* SELECT_IR */ { CAPTURE_IR, RESET },
+ /* CAPTURE_IR */ { SHIFT_IR, EXIT1_IR },
+ /* SHIFT_IR */ { SHIFT_IR, EXIT1_IR },
+ /* EXIT1_IR */ { PAUSE_IR, UPDATE_IR },
+ /* PAUSE_IR */ { EXIT2_IR, EXIT2_IR },
+ /* EXIT2_IR */ { SHIFT_IR, UPDATE_IR },
+ /* UPDATE_IR */ { IDLE, SELECT_DR }
+};
+
+void jim_print_sreg(shift_reg_t *r)
+{
+ int i;
+ for(i=(r->len+31)/32; i>=0; i--) printf(" %08X", r->reg[i]);
+}
+
+void jim_print_tap_state(char *rof, jim_device_t *dev)
+{
+ printf(" tck %s, state=", rof);
+ switch(dev->tap_state & 7)
+ {
+ case 0: printf((dev->tap_state==RESET) ? "RESET":"IDLE" ); break;
+ case 1: printf("SELECT"); break;
+ case 2: printf("CAPTURE"); break;
+ case 3: printf("SHIFT"); break;
+ case 4: printf("EXIT1"); break;
+ case 5: printf("PAUSE"); break;
+ case 6: printf("EXIT2"); break;
+ default: printf("UPDATE"); break;
+ }
+ if(dev->tap_state & 7)
+ {
+ if(dev->tap_state & 8)
+ {
+ printf("_IR="); jim_print_sreg(&dev->sreg[0]);
+ }
+ else
+ {
+ printf("_DR");
+ if(dev->current_dr != 0)
+ {
+ printf("(%d)=", dev->current_dr);
+ jim_print_sreg(&dev->sreg[dev->current_dr]);
+ }
+ }
+ }
+ printf("\n");
+}
+
+
+void jim_set_trst(jim_state_t *s, int trst)
+{
+ s->trst = trst;
+}
+
+int jim_get_trst(jim_state_t *s)
+{
+ return s->trst;
+}
+
+int jim_get_tdo(jim_state_t *s)
+{
+ if(s->last_device_in_chain == NULL) return 0;
+ return s->last_device_in_chain -> tdo;
+}
+
+void jim_tck_rise(jim_state_t *s, int tms, int tdi)
+{
+ jim_device_t *dev;
+
+
+ for(dev = s->last_device_in_chain; dev; dev = dev->prev)
+ {
+ int dev_tdi;
+ int i, n;
+ shift_reg_t *sr;
+ uint32_t *reg;
+
+#ifdef VERBOSE
+ jim_print_tap_state("rise", dev);
+#endif
+
+ dev_tdi = (dev->prev != NULL) ? dev->prev->tdo : tdi;
+
+ if(dev->tck_rise != NULL) dev->tck_rise(dev, tms, dev_tdi, s->shmem, s->shmem_size);
+
+ if(dev->tap_state & 8)
+ {
+ sr = &(dev->sreg[0]);
+ }
+ else
+ {
+ if(dev->current_dr == 0)
+ {
+ sr = NULL; /* BYPASS */
+ }
+ else
+ {
+ sr = &(dev->sreg[dev->current_dr]);
+ }
+ }
+
+ if(sr == NULL) /* BYPASS */
+ {
+ dev->tdo_buffer = dev_tdi;
+ }
+ else
+ {
+ reg = sr->reg;
+
+ if(dev->tap_state == SHIFT_IR || dev->tap_state == SHIFT_DR)
+ {
+ /* Start with LSW of shift register at index 0 */
+
+ n = (sr->len-1) / 32;
+ for(i=0; i < (sr->len-1)/32; i++)
+ {
+ reg[i] >>= 1;
+ if(reg[i+1] & 1) reg[i] |= 0x80000000;
+ }
+
+ /* End with MSW at index i */
+
+ reg[i] >>=1;
+ if(dev_tdi != 0)
+ {
+ n = (sr->len & 31);
+ if(n == 0) n = 32;
+ reg[i] |= (1 << (n-1));
+ }
+ }
+
+ dev->tdo_buffer = reg[0] & 1;
+ }
+
+ dev->tap_state = next_tap_state[dev->tap_state][tms];
+ }
+}
+
+void jim_tck_fall(jim_state_t *s)
+{
+ jim_device_t *dev;
+
+ for(dev = s->last_device_in_chain; dev; dev = dev->prev)
+ {
+ dev->tdo = dev->tdo_buffer;
+
+#ifdef VERBOSE
+ jim_print_tap_state("fall", dev);
+#endif
+
+ if(dev->tck_fall != NULL) dev->tck_fall(dev, s->shmem, s->shmem_size);
+ }
+}
+
+jim_device_t *jim_alloc_device(int num_sregs, const int reg_size[])
+{
+ int i, r;
+
+ jim_device_t *dev = (jim_device_t *)malloc(sizeof(jim_device_t));
+
+ if(dev == NULL)
+ {
+ printf("Out of memory\n");
+ return NULL;
+ }
+
+ dev->sreg =
+ (shift_reg_t *)malloc(num_sregs * sizeof(shift_reg_t));
+
+ if(dev->sreg == NULL)
+ {
+ free(dev);
+ printf("Out of memory\n");
+ return NULL;
+ }
+
+ for(r=0,i=0;i<num_sregs;i++)
+ {
+ dev->sreg[i].len = reg_size[i];
+ dev->sreg[i].reg =
+ (uint32_t*)calloc(((reg_size[i]+31)/32), sizeof(uint32_t));
+ if(dev->sreg[i].reg == NULL) r++;
+ }
+
+ if(r>0)
+ {
+ printf("Out of memory\n");
+ for(i=0;i<num_sregs;i++) if(dev->sreg[i].reg!=NULL) free(dev->sreg[i].reg);
+ free(dev->sreg);
+ free(dev);
+ return NULL;
+ }
+
+ dev->num_sregs = num_sregs;
+ dev->current_dr = 0;
+ dev->tck_rise = NULL;
+ dev->tck_fall = NULL;
+ dev->dev_free = NULL;
+ dev->tap_state = RESET;
+ dev->tdo = dev->tdo_buffer = 1;
+
+ return dev;
+}
+
+jim_state_t *jim_init(void)
+{
+ jim_state_t *s;
+
+ s = (jim_state_t *)malloc(sizeof(jim_state_t));
+ if(s == NULL)
+ {
+ printf("Out of memory!\n");
+ return NULL;
+ }
+
+ s->shmem_size = (1<<20)*16; /* 16 MByte */
+ s->shmem = malloc(s->shmem_size);
+
+ if(s->shmem != NULL)
+ {
+ memset(s->shmem, 0xFF, s->shmem_size);
+ printf("Allocated %zd bytes for device memory simulation.\n", s->shmem_size);
+ }
+ else
+ {
+ free(s);
+ printf("Out of memory!\n");
+ return NULL;
+ }
+
+ s->trst = 0;
+ s->last_device_in_chain = some_cpu();
+
+ if(s->last_device_in_chain != NULL)
+ {
+ s->last_device_in_chain->prev = NULL;
+ }
+ else
+ {
+ printf("Out of memory!\n");
+ free(s->shmem);
+ free(s);
+ return NULL;
+ }
+ return s;
+}
+
+void jim_free(jim_state_t *s)
+{
+ jim_device_t *dev, *pre;
+
+ if(s == NULL) return;
+
+ for(dev = s->last_device_in_chain; dev; dev=pre)
+ {
+ int i;
+
+ if(dev->dev_free != NULL) dev->dev_free(dev);
+ for(i=0;i<dev->num_sregs;i++)
+ {
+ free(dev->sreg[i].reg);
+ }
+ free(dev->sreg);
+ pre = dev->prev;
+ free(dev);
+ }
+
+ s->last_device_in_chain = NULL;
+ free(s->shmem);
+ free(s);
+}
+
+
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2002, 2003 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2002, 2003.
+ * Modified by Ajith Kumar P.C <ajithpc@kila.com>, 20/09/2006.
+ *
+ */
+
+#include "sysdep.h"
+
+#ifndef SVN_REVISION
+#define SVN_REVISION "0"
+#endif
+
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+#include <unistd.h>
+#include <sys/stat.h>
+#include <sys/types.h>
+#ifdef HAVE_LIBREADLINE
+#include <readline/readline.h>
+#ifdef HAVE_READLINE_HISTORY_H
+#include <readline/history.h>
+#endif
+#endif
+#include <getopt.h>
+#ifdef ENABLE_NLS
+#include <locale.h>
+#endif /* ENABLE_NLS */
+
+#include "chain.h"
+#include "bus.h"
+#include "cmd.h"
+#include "jtag.h"
+
+#ifndef HAVE_GETLINE
+ssize_t getline( char **lineptr, size_t *n, FILE *stream );
+#endif
+
+int debug_mode = 0;
+int big_endian = 0;
+int interactive = 0;
+extern cfi_array_t *cfi_array;
+
+#define JTAGDIR ".jtag"
+#define HISTORYFILE "history"
+#define RCFILE "rc"
+
+static void
+jtag_create_jtagdir( void )
+{
+ char *home = getenv( "HOME" );
+ char *jdir;
+
+ if (!home)
+ return;
+
+ jdir = malloc( strlen(home) + strlen(JTAGDIR) + 2 ); /* "/" and trailing \0 */
+ if (!jdir)
+ return;
+
+ strcpy( jdir, home );
+ strcat( jdir, "/" );
+ strcat( jdir, JTAGDIR );
+
+ /* Create the directory if it doesn't exists. */
+#ifdef __MINGW32__
+ mkdir( jdir );
+#else
+ mkdir( jdir, S_IRWXU | S_IRGRP | S_IXGRP | S_IROTH | S_IXOTH );
+#endif
+
+ free( jdir );
+}
+
+#ifdef HAVE_LIBREADLINE
+#ifdef HAVE_READLINE_HISTORY
+
+static void
+jtag_load_history( void )
+{
+ char *home = getenv( "HOME" );
+ char *file;
+
+ using_history();
+
+ if (!home)
+ return;
+
+ file = malloc( strlen(home) + strlen(JTAGDIR) + strlen(HISTORYFILE) + 3 ); /* 2 x "/" and trailing \0 */
+ if (!file)
+ return;
+
+ strcpy( file, home );
+ strcat( file, "/" );
+ strcat( file, JTAGDIR );
+ strcat( file, "/" );
+ strcat( file, HISTORYFILE );
+
+ read_history( file );
+
+ free( file );
+}
+
+static void
+jtag_save_history( void )
+{
+ char *home = getenv( "HOME" );
+ char *file;
+
+ if (!home)
+ return;
+
+ file = malloc( strlen(home) + strlen(JTAGDIR) + strlen(HISTORYFILE) + 3); /* 2 x "/" and trailing \0 */
+ if (!file)
+ return;
+
+ strcpy( file, home );
+ strcat( file, "/" );
+ strcat( file, JTAGDIR );
+ strcat( file, "/");
+ strcat( file, HISTORYFILE );
+
+ write_history( file );
+
+ free( file );
+}
+
+#endif /* HAVE_READLINE_HISTORY */
+#endif
+
+static int jtag_readline_multiple_commands_support(chain_t *chain, char * line) /* multiple commands should be separated with '::' */
+{
+ int r;
+ char *nextcmd = line;
+
+ if (!line || !(strlen( line ) > 0))
+ return 1;
+
+ do {
+ line = nextcmd;
+
+ nextcmd = strstr(nextcmd, "::"); /* :: to not confuse ms-dos users ;-) */
+
+ if (nextcmd) {
+ *nextcmd++ = 0;
+ ++nextcmd;
+ while (*line == ':') ++line;
+ }
+
+ r = jtag_parse_line( chain, line );
+
+ chain_flush( chain );
+
+ } while (nextcmd && r);
+
+ return r;
+}
+
+static void
+jtag_readline_loop( chain_t *chain, const char *prompt )
+{
+#ifdef HAVE_LIBREADLINE
+ char *line = NULL;
+#ifdef HAVE_READLINE_HISTORY
+ HIST_ENTRY *hptr;
+#endif
+
+ /* Iterate */
+ while (jtag_readline_multiple_commands_support( chain, line )) {
+ free( line );
+
+ /* Read a line from the terminal */
+ line = readline( prompt );
+
+ /* We got EOF, bail */
+ if (!line) {
+ line = strdup( "quit\n" );
+ puts( "quit" );
+ if (!line)
+ return;
+ }
+
+#ifdef HAVE_READLINE_HISTORY
+ /* Check if we actually got something , Don't add duplicate lines*/
+ if (strlen( line )) {
+ if (history_length == 0)
+ add_history( line );
+ else {
+ hptr = history_get( history_length );
+ /* Apple leopard libreadline emulation screws up indexing, try the other one */
+ if (hptr == NULL)
+ hptr = history_get( history_length-1 );
+ if (hptr != NULL) {
+ if (strcmp( line, hptr->line ))
+ add_history( line );
+ }
+ else
+ add_history( line );
+ }
+ }
+#endif
+ }
+ free( line );
+#else
+ char line[1024];
+ line[0] = 0;
+ do
+ {
+ if (!jtag_readline_multiple_commands_support( chain, line ))
+ break;
+ printf("%s", prompt);
+ fflush(stdout);
+ }
+ while(fgets(line, 1023, stdin));
+#endif
+}
+
+static int
+jtag_parse_rc( chain_t *chain )
+{
+ char *home = getenv( "HOME" );
+ char *file;
+ int go;
+
+ if (!home)
+ return 1;
+
+ file = malloc( strlen(home) + strlen(JTAGDIR) + strlen(RCFILE) + 3 ); /* 2 x "/" and trailing \0 */
+ if (!file)
+ return 1;
+
+ strcpy( file, home );
+ strcat( file, "/" );
+ strcat( file, JTAGDIR );
+ strcat( file, "/" );
+ strcat( file, RCFILE );
+
+ go = jtag_parse_file( chain, file );
+
+ free( file );
+
+ return go;
+}
+
+static void
+cleanup( chain_t *chain )
+{
+ cfi_array_free( cfi_array );
+ cfi_array = NULL;
+
+ if (bus) {
+ bus_free( bus );
+ bus = NULL;
+ }
+ chain_free( chain );
+ chain = NULL;
+}
+
+const char *jtag_argv0;
+int
+main( int argc, char *const argv[] )
+{
+ int go = 0;
+ int i;
+ int c;
+ int norc = 0;
+ int help = 0;
+ int version = 0;
+ int quiet = 0;
+ chain_t *chain = NULL;
+
+ jtag_argv0 = argv[0];
+
+ if(geteuid()==0 && getuid()!=0)
+ {
+ printf (_("'%s' must not be run suid root!\n"), "jtag");
+ return(-1);
+ }
+
+#ifdef ENABLE_NLS
+ /* l10n support */
+ setlocale( LC_ALL, "" );
+ bindtextdomain( PACKAGE, LOCALEDIR );
+ textdomain( PACKAGE );
+#endif /* ENABLE_NLS */
+
+ while (1)
+ {
+ static struct option long_options[] =
+ {
+ {"version", no_argument, 0, 'v'},
+ {"norc", no_argument, 0, 'n'},
+ {"interactive", no_argument, 0, 'i'},
+ {"help", no_argument, 0, 'h'},
+ {"quiet", no_argument, 0, 'q'},
+ {0, 0, 0, 0}
+ };
+
+ /* `getopt_long' stores the option index here. */
+ int option_index = 0;
+
+ c = getopt_long (argc, argv, "vnhiq",
+ long_options, &option_index);
+
+ /* Detect the end of the options. */
+ if (c == -1)
+ break;
+
+ switch (c)
+ {
+ case 'v':
+ version = 1;
+ break;
+
+ case 'n':
+ norc = 1;
+ break;
+
+ case 'i':
+ interactive = 1;
+ break;
+
+ case 'h':
+ default:
+ help = 1;
+ break;
+
+ case 'q':
+ quiet = 1;
+ break;
+ }
+ }
+
+ if (help)
+ {
+ /* Print help info and exit. */
+ printf (_("%s #%s\n"), PACKAGE_STRING, SVN_REVISION);
+ printf ("\n");
+
+ printf (_("Usage: %s [OPTIONS] [FILE [FILE ... ]] \n"), "jtag");
+ printf ("\n");
+
+ printf (_(" -h, --help display this help and exit\n"));
+ printf (_(" -v, --version display version information and exit\n"));
+ printf ("\n");
+ printf (_(" -n, --norc disable reading ~/.jtag/rc on startup\n"));
+ printf (_(" -i, --interactive enter interactive mode after reading files\n"));
+ printf (_(" -q, --quiet Do not print help on startup\n"));
+ printf ("\n");
+ printf (_(" [FILE] file containing commands to execute\n"));
+ printf ("\n");
+
+ printf (_(" Please report bugs at http://www.urjtag.org\n"));
+
+ exit(0);
+ }
+
+ if (version)
+ {
+ printf(_("\n%s #%s\n\n"
+ "Copyright (C) 2002, 2003 ETC s.r.o.\n"
+ "Copyright (C) 2007, 2008, 2009 Kolja Waschk and the respective authors\n"
+ ), PACKAGE_STRING, SVN_REVISION);
+
+ printf(_("\n"
+ "This program is free software; you can redistribute it and/or modify\n"
+ "it under the terms of the GNU General Public License as published by\n"
+ "the Free Software Foundation; either version 2 of the License, or\n"
+ "(at your option) any later version.\n"
+ "\n"
+ "This program is distributed in the hope that it will be useful,\n"
+ "but WITHOUT ANY WARRANTY; without even the implied warranty of\n"
+ "MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the\n"
+ "GNU General Public License for more details.\n"
+ "\n"
+ "You should have received a copy of the GNU General Public License\n"
+ "along with this program; if not, write to the Free Software\n"
+ "Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA\n"));
+
+ exit(0);
+ }
+
+ /* input from files */
+ if (argc > optind) {
+ for (i = optind; i < argc; i++) {
+ chain = chain_alloc();
+ if (!chain) {
+ printf( _("Out of memory\n") );
+ return -1;
+ }
+
+ go = jtag_parse_file( chain, argv[i] );
+ cleanup( chain );
+ if (go < 0) {
+ printf( _("Unable to open file `%s'!\n"), argv[i] );
+ break;
+ }
+ }
+
+ if(!interactive) return 0;
+ }
+
+ /* input from stdin */
+ if (!isatty(0)) {
+ chain = chain_alloc();
+ if (!chain) {
+ printf( _("Out of memory\n") );
+ return -1;
+ }
+ jtag_parse_stream( chain, stdin );
+
+ cleanup( chain );
+
+ return 0;
+ }
+
+ /* interactive */
+ if (!quiet)
+ printf(
+ _("\n%s #%s\n"
+ "Copyright (C) 2002, 2003 ETC s.r.o.\n"
+ "Copyright (C) 2007, 2008, 2009 Kolja Waschk and the respective authors\n\n"
+ "%s is free software, covered by the GNU General Public License, and you are\n"
+ "welcome to change it and/or distribute copies of it under certain conditions.\n"
+ "There is absolutely no warranty for %s.\n\n"), PACKAGE_STRING, SVN_REVISION,
+ PACKAGE_NAME, PACKAGE_NAME
+ );
+
+ chain = chain_alloc();
+ if (!chain) {
+ printf( _("Out of memory\n") );
+ return -1;
+ }
+
+ if (!quiet) {
+ printf( _("WARNING: %s may damage your hardware!\n"), PACKAGE_NAME );
+ printf( _("Type \"quit\" to exit, \"help\" for help.\n\n") );
+ }
+
+ /* Create ~/.jtag */
+ jtag_create_jtagdir();
+
+ /* Parse and execute the RC file */
+ go = norc ? 1 : jtag_parse_rc( chain );
+
+#ifdef HAVE_LIBREADLINE
+#ifdef HAVE_READLINE_COMPLETION
+ rl_attempted_completion_function = cmd_completion;
+#endif
+#endif
+
+ if (go) {
+
+#ifdef HAVE_READLINE_HISTORY
+ /* Load history */
+ jtag_load_history();
+#endif
+
+ /* main loop */
+ jtag_readline_loop( chain, getenv("JTAG_PROMPT") ? : "jtag> " );
+
+#ifdef HAVE_READLINE_HISTORY
+ /* Save history */
+ jtag_save_history();
+#endif
+ }
+
+ cleanup( chain );
+
+ return 0;
+}
--- /dev/null
+.deps
+Makefile
+Makefile.in
--- /dev/null
+#
+# $Id$
+#
+# Copyright (C) 2003 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Marcel Telka <marcel@telka.sk>, 2003.
+#
+
+include $(top_srcdir)/Makefile.rules
+
+noinst_LIBRARIES = libjtaglib.a
+
+if JTAG_RELOCATABLE
+libiberty_sources = \
+ ansidecl.h \
+ filenames.h \
+ lbasename.c \
+ libiberty.h \
+ lrealpath.c \
+ make-relative-prefix.c \
+ safe-ctype.c \
+ safe-ctype.h
+else
+libiberty_sources =
+endif
+
+libjtaglib_a_SOURCES = \
+ getdelim.c \
+ getline.c \
+ fclock.c \
+ $(libiberty_sources)
--- /dev/null
+/* ANSI and traditional C compatability macros
+ Copyright 1991, 1992, 1993, 1994, 1995, 1996, 1998, 1999, 2000, 2001
+ Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
+
+/* ANSI and traditional C compatibility macros
+
+ ANSI C is assumed if __STDC__ is #defined.
+
+ Macro ANSI C definition Traditional C definition
+ ----- ---- - ---------- ----------- - ----------
+ ANSI_PROTOTYPES 1 not defined
+ PTR `void *' `char *'
+ PTRCONST `void *const' `char *'
+ LONG_DOUBLE `long double' `double'
+ const not defined `'
+ volatile not defined `'
+ signed not defined `'
+ VA_START(ap, var) va_start(ap, var) va_start(ap)
+
+ Note that it is safe to write "void foo();" indicating a function
+ with no return value, in all K+R compilers we have been able to test.
+
+ For declaring functions with prototypes, we also provide these:
+
+ PARAMS ((prototype))
+ -- for functions which take a fixed number of arguments. Use this
+ when declaring the function. When defining the function, write a
+ K+R style argument list. For example:
+
+ char *strcpy PARAMS ((char *dest, char *source));
+ ...
+ char *
+ strcpy (dest, source)
+ char *dest;
+ char *source;
+ { ... }
+
+
+ VPARAMS ((prototype, ...))
+ -- for functions which take a variable number of arguments. Use
+ PARAMS to declare the function, VPARAMS to define it. For example:
+
+ int printf PARAMS ((const char *format, ...));
+ ...
+ int
+ printf VPARAMS ((const char *format, ...))
+ {
+ ...
+ }
+
+ For writing functions which take variable numbers of arguments, we
+ also provide the VA_OPEN, VA_CLOSE, and VA_FIXEDARG macros. These
+ hide the differences between K+R <varargs.h> and C89 <stdarg.h> more
+ thoroughly than the simple VA_START() macro mentioned above.
+
+ VA_OPEN and VA_CLOSE are used *instead of* va_start and va_end.
+ Immediately after VA_OPEN, put a sequence of VA_FIXEDARG calls
+ corresponding to the list of fixed arguments. Then use va_arg
+ normally to get the variable arguments, or pass your va_list object
+ around. You do not declare the va_list yourself; VA_OPEN does it
+ for you.
+
+ Here is a complete example:
+
+ int
+ printf VPARAMS ((const char *format, ...))
+ {
+ int result;
+
+ VA_OPEN (ap, format);
+ VA_FIXEDARG (ap, const char *, format);
+
+ result = vfprintf (stdout, format, ap);
+ VA_CLOSE (ap);
+
+ return result;
+ }
+
+
+ You can declare variables either before or after the VA_OPEN,
+ VA_FIXEDARG sequence. Also, VA_OPEN and VA_CLOSE are the beginning
+ and end of a block. They must appear at the same nesting level,
+ and any variables declared after VA_OPEN go out of scope at
+ VA_CLOSE. Unfortunately, with a K+R compiler, that includes the
+ argument list. You can have multiple instances of VA_OPEN/VA_CLOSE
+ pairs in a single function in case you need to traverse the
+ argument list more than once.
+
+ For ease of writing code which uses GCC extensions but needs to be
+ portable to other compilers, we provide the GCC_VERSION macro that
+ simplifies testing __GNUC__ and __GNUC_MINOR__ together, and various
+ wrappers around __attribute__. Also, __extension__ will be #defined
+ to nothing if it doesn't work. See below.
+
+ This header also defines a lot of obsolete macros:
+ CONST, VOLATILE, SIGNED, PROTO, EXFUN, DEFUN, DEFUN_VOID,
+ AND, DOTS, NOARGS. Don't use them. */
+
+#ifndef _ANSIDECL_H
+#define _ANSIDECL_H 1
+
+/* Every source file includes this file,
+ so they will all get the switch for lint. */
+/* LINTLIBRARY */
+
+/* Using MACRO(x,y) in cpp #if conditionals does not work with some
+ older preprocessors. Thus we can't define something like this:
+
+#define HAVE_GCC_VERSION(MAJOR, MINOR) \
+ (__GNUC__ > (MAJOR) || (__GNUC__ == (MAJOR) && __GNUC_MINOR__ >= (MINOR)))
+
+and then test "#if HAVE_GCC_VERSION(2,7)".
+
+So instead we use the macro below and test it against specific values. */
+
+/* This macro simplifies testing whether we are using gcc, and if it
+ is of a particular minimum version. (Both major & minor numbers are
+ significant.) This macro will evaluate to 0 if we are not using
+ gcc at all. */
+#ifndef GCC_VERSION
+#define GCC_VERSION (__GNUC__ * 1000 + __GNUC_MINOR__)
+#endif /* GCC_VERSION */
+
+#if defined (__STDC__) || defined (_AIX) || (defined (__mips) && defined (_SYSTYPE_SVR4)) || defined(_WIN32) || (defined(__alpha) && defined(__cplusplus))
+/* All known AIX compilers implement these things (but don't always
+ define __STDC__). The RISC/OS MIPS compiler defines these things
+ in SVR4 mode, but does not define __STDC__. */
+/* eraxxon@alumni.rice.edu: The Compaq C++ compiler, unlike many other
+ C++ compilers, does not define __STDC__, though it acts as if this
+ was so. (Verified versions: 5.7, 6.2, 6.3, 6.5) */
+
+#define ANSI_PROTOTYPES 1
+#define PTR void *
+#define PTRCONST void *const
+#define LONG_DOUBLE long double
+
+/* PARAMS is often defined elsewhere (e.g. by libintl.h), so wrap it in
+ a #ifndef. */
+#ifndef PARAMS
+#define PARAMS(ARGS) ARGS
+#endif
+
+#define VPARAMS(ARGS) ARGS
+#define VA_START(VA_LIST, VAR) va_start(VA_LIST, VAR)
+
+/* variadic function helper macros */
+/* "struct Qdmy" swallows the semicolon after VA_OPEN/VA_FIXEDARG's
+ use without inhibiting further decls and without declaring an
+ actual variable. */
+#define VA_OPEN(AP, VAR) { va_list AP; va_start(AP, VAR); { struct Qdmy
+#define VA_CLOSE(AP) } va_end(AP); }
+#define VA_FIXEDARG(AP, T, N) struct Qdmy
+
+#undef const
+#undef volatile
+#undef signed
+
+/* inline requires special treatment; it's in C99, and GCC >=2.7 supports
+ it too, but it's not in C89. */
+#undef inline
+#if __STDC_VERSION__ > 199901L
+/* it's a keyword */
+#else
+# if GCC_VERSION >= 2007
+# define inline __inline__ /* __inline__ prevents -pedantic warnings */
+# else
+# define inline /* nothing */
+# endif
+#endif
+
+/* These are obsolete. Do not use. */
+#ifndef IN_GCC
+#define CONST const
+#define VOLATILE volatile
+#define SIGNED signed
+
+#define PROTO(type, name, arglist) type name arglist
+#define EXFUN(name, proto) name proto
+#define DEFUN(name, arglist, args) name(args)
+#define DEFUN_VOID(name) name(void)
+#define AND ,
+#define DOTS , ...
+#define NOARGS void
+#endif /* ! IN_GCC */
+
+#else /* Not ANSI C. */
+
+#undef ANSI_PROTOTYPES
+#define PTR char *
+#define PTRCONST PTR
+#define LONG_DOUBLE double
+
+#define PARAMS(args) ()
+#define VPARAMS(args) (va_alist) va_dcl
+#define VA_START(va_list, var) va_start(va_list)
+
+#define VA_OPEN(AP, VAR) { va_list AP; va_start(AP); { struct Qdmy
+#define VA_CLOSE(AP) } va_end(AP); }
+#define VA_FIXEDARG(AP, TYPE, NAME) TYPE NAME = va_arg(AP, TYPE)
+
+/* some systems define these in header files for non-ansi mode */
+#undef const
+#undef volatile
+#undef signed
+#undef inline
+#define const
+#define volatile
+#define signed
+#define inline
+
+#ifndef IN_GCC
+#define CONST
+#define VOLATILE
+#define SIGNED
+
+#define PROTO(type, name, arglist) type name ()
+#define EXFUN(name, proto) name()
+#define DEFUN(name, arglist, args) name arglist args;
+#define DEFUN_VOID(name) name()
+#define AND ;
+#define DOTS
+#define NOARGS
+#endif /* ! IN_GCC */
+
+#endif /* ANSI C. */
+
+/* Define macros for some gcc attributes. This permits us to use the
+ macros freely, and know that they will come into play for the
+ version of gcc in which they are supported. */
+
+#if (GCC_VERSION < 2007)
+# define __attribute__(x)
+#endif
+
+/* Attribute __malloc__ on functions was valid as of gcc 2.96. */
+#ifndef ATTRIBUTE_MALLOC
+# if (GCC_VERSION >= 2096)
+# define ATTRIBUTE_MALLOC __attribute__ ((__malloc__))
+# else
+# define ATTRIBUTE_MALLOC
+# endif /* GNUC >= 2.96 */
+#endif /* ATTRIBUTE_MALLOC */
+
+/* Attributes on labels were valid as of gcc 2.93. */
+#ifndef ATTRIBUTE_UNUSED_LABEL
+# if (!defined (__cplusplus) && GCC_VERSION >= 2093)
+# define ATTRIBUTE_UNUSED_LABEL ATTRIBUTE_UNUSED
+# else
+# define ATTRIBUTE_UNUSED_LABEL
+# endif /* !__cplusplus && GNUC >= 2.93 */
+#endif /* ATTRIBUTE_UNUSED_LABEL */
+
+#ifndef ATTRIBUTE_UNUSED
+#define ATTRIBUTE_UNUSED __attribute__ ((__unused__))
+#endif /* ATTRIBUTE_UNUSED */
+
+/* Before GCC 3.4, the C++ frontend couldn't parse attributes placed after the
+ identifier name. */
+#if ! defined(__cplusplus) || (GCC_VERSION >= 3004)
+# define ARG_UNUSED(NAME) NAME ATTRIBUTE_UNUSED
+#else /* !__cplusplus || GNUC >= 3.4 */
+# define ARG_UNUSED(NAME) NAME
+#endif /* !__cplusplus || GNUC >= 3.4 */
+
+#ifndef ATTRIBUTE_NORETURN
+#define ATTRIBUTE_NORETURN __attribute__ ((__noreturn__))
+#endif /* ATTRIBUTE_NORETURN */
+
+/* Attribute `nonnull' was valid as of gcc 3.3. */
+#ifndef ATTRIBUTE_NONNULL
+# if (GCC_VERSION >= 3003)
+# define ATTRIBUTE_NONNULL(m) __attribute__ ((__nonnull__ (m)))
+# else
+# define ATTRIBUTE_NONNULL(m)
+# endif /* GNUC >= 3.3 */
+#endif /* ATTRIBUTE_NONNULL */
+
+/* Attribute `pure' was valid as of gcc 3.0. */
+#ifndef ATTRIBUTE_PURE
+# if (GCC_VERSION >= 3000)
+# define ATTRIBUTE_PURE __attribute__ ((__pure__))
+# else
+# define ATTRIBUTE_PURE
+# endif /* GNUC >= 3.0 */
+#endif /* ATTRIBUTE_PURE */
+
+/* Use ATTRIBUTE_PRINTF when the format specifier must not be NULL.
+ This was the case for the `printf' format attribute by itself
+ before GCC 3.3, but as of 3.3 we need to add the `nonnull'
+ attribute to retain this behavior. */
+#ifndef ATTRIBUTE_PRINTF
+#define ATTRIBUTE_PRINTF(m, n) __attribute__ ((__format__ (__printf__, m, n))) ATTRIBUTE_NONNULL(m)
+#define ATTRIBUTE_PRINTF_1 ATTRIBUTE_PRINTF(1, 2)
+#define ATTRIBUTE_PRINTF_2 ATTRIBUTE_PRINTF(2, 3)
+#define ATTRIBUTE_PRINTF_3 ATTRIBUTE_PRINTF(3, 4)
+#define ATTRIBUTE_PRINTF_4 ATTRIBUTE_PRINTF(4, 5)
+#define ATTRIBUTE_PRINTF_5 ATTRIBUTE_PRINTF(5, 6)
+#endif /* ATTRIBUTE_PRINTF */
+
+/* Use ATTRIBUTE_FPTR_PRINTF when the format attribute is to be set on
+ a function pointer. Format attributes were allowed on function
+ pointers as of gcc 3.1. */
+#ifndef ATTRIBUTE_FPTR_PRINTF
+# if (GCC_VERSION >= 3001)
+# define ATTRIBUTE_FPTR_PRINTF(m, n) ATTRIBUTE_PRINTF(m, n)
+# else
+# define ATTRIBUTE_FPTR_PRINTF(m, n)
+# endif /* GNUC >= 3.1 */
+# define ATTRIBUTE_FPTR_PRINTF_1 ATTRIBUTE_FPTR_PRINTF(1, 2)
+# define ATTRIBUTE_FPTR_PRINTF_2 ATTRIBUTE_FPTR_PRINTF(2, 3)
+# define ATTRIBUTE_FPTR_PRINTF_3 ATTRIBUTE_FPTR_PRINTF(3, 4)
+# define ATTRIBUTE_FPTR_PRINTF_4 ATTRIBUTE_FPTR_PRINTF(4, 5)
+# define ATTRIBUTE_FPTR_PRINTF_5 ATTRIBUTE_FPTR_PRINTF(5, 6)
+#endif /* ATTRIBUTE_FPTR_PRINTF */
+
+/* Use ATTRIBUTE_NULL_PRINTF when the format specifier may be NULL. A
+ NULL format specifier was allowed as of gcc 3.3. */
+#ifndef ATTRIBUTE_NULL_PRINTF
+# if (GCC_VERSION >= 3003)
+# define ATTRIBUTE_NULL_PRINTF(m, n) __attribute__ ((__format__ (__printf__, m, n)))
+# else
+# define ATTRIBUTE_NULL_PRINTF(m, n)
+# endif /* GNUC >= 3.3 */
+# define ATTRIBUTE_NULL_PRINTF_1 ATTRIBUTE_NULL_PRINTF(1, 2)
+# define ATTRIBUTE_NULL_PRINTF_2 ATTRIBUTE_NULL_PRINTF(2, 3)
+# define ATTRIBUTE_NULL_PRINTF_3 ATTRIBUTE_NULL_PRINTF(3, 4)
+# define ATTRIBUTE_NULL_PRINTF_4 ATTRIBUTE_NULL_PRINTF(4, 5)
+# define ATTRIBUTE_NULL_PRINTF_5 ATTRIBUTE_NULL_PRINTF(5, 6)
+#endif /* ATTRIBUTE_NULL_PRINTF */
+
+/* Attribute `sentinel' was valid as of gcc 3.5. */
+#ifndef ATTRIBUTE_SENTINEL
+# if (GCC_VERSION >= 3005)
+# define ATTRIBUTE_SENTINEL __attribute__ ((__sentinel__))
+# else
+# define ATTRIBUTE_SENTINEL
+# endif /* GNUC >= 3.5 */
+#endif /* ATTRIBUTE_SENTINEL */
+
+
+#ifndef ATTRIBUTE_ALIGNED_ALIGNOF
+# if (GCC_VERSION >= 3000)
+# define ATTRIBUTE_ALIGNED_ALIGNOF(m) __attribute__ ((__aligned__ (__alignof__ (m))))
+# else
+# define ATTRIBUTE_ALIGNED_ALIGNOF(m)
+# endif /* GNUC >= 3.0 */
+#endif /* ATTRIBUTE_ALIGNED_ALIGNOF */
+
+/* Useful for structures whose layout must much some binary specification
+ regardless of the alignment and padding qualities of the compiler. */
+#ifndef ATTRIBUTE_PACKED
+# define ATTRIBUTE_PACKED __attribute__ ((packed))
+#endif
+
+/* Attribute `hot' and `cold' was valid as of gcc 4.3. */
+#ifndef ATTRIBUTE_COLD
+# if (GCC_VERSION >= 4003)
+# define ATTRIBUTE_COLD __attribute__ ((__cold__))
+# else
+# define ATTRIBUTE_COLD
+# endif /* GNUC >= 4.3 */
+#endif /* ATTRIBUTE_COLD */
+#ifndef ATTRIBUTE_HOT
+# if (GCC_VERSION >= 4003)
+# define ATTRIBUTE_HOT __attribute__ ((__hot__))
+# else
+# define ATTRIBUTE_HOT
+# endif /* GNUC >= 4.3 */
+#endif /* ATTRIBUTE_HOT */
+
+/* We use __extension__ in some places to suppress -pedantic warnings
+ about GCC extensions. This feature didn't work properly before
+ gcc 2.8. */
+#if GCC_VERSION < 2008
+#define __extension__
+#endif
+
+#endif /* ansidecl.h */
--- /dev/null
+/*
+ * fclock.c
+ *
+ * Copyright (C) 2005 Hein Roehrig
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ */
+
+#define _ISOC99_SOURCE
+#define _POSIX_C_SOURCE 200112L
+#include <unistd.h>
+#include <stdlib.h>
+#include <stdio.h>
+#include <time.h>
+#ifndef __MINGW32__
+#include <sys/times.h>
+#endif
+#include <math.h>
+#include <assert.h>
+
+/* ------------------------------------------------------------------ */
+
+#ifdef __APPLE__
+#include <mach/mach_time.h>
+#include <sys/types.h>
+#include <sys/time.h>
+
+long double
+frealtime()
+{
+ long double result;
+ static uint64_t start_mat;
+ static long double start_time;
+ static double multiplier;
+
+ mach_timebase_info_data_t mtid;
+ struct timeval tv;
+
+ if(!mtid.denom == 0) {
+ mach_timebase_info(&mtid);
+ multiplier = (double)mtid.numer / (double)mtid.denom;
+ gettimeofday(&tv, NULL);
+ start_time = (long double)tv.tv_sec + (long double)tv.tv_usec * 1000.0;
+ start_mat = mach_absolute_time();
+ }
+
+ result = start_time + (mach_absolute_time() - start_mat) * multiplier;
+
+ assert(isnormal(result));
+ assert(result > 0);
+ return result;
+}
+#else /* def __APPLE__ */
+
+/* ------------------------------------------------------------------ */
+
+#ifdef _POSIX_TIMERS
+
+long double
+frealtime()
+{
+ long double result;
+
+ struct timespec t;
+ if (clock_gettime(CLOCK_REALTIME, &t)==-1) {
+ perror("frealtime (clock_gettime)");
+ exit(EXIT_FAILURE);
+ }
+ result = (long double)t.tv_sec + (long double)t.tv_nsec*(long double)1e-9;
+
+ assert(isnormal(result));
+ assert(result > 0);
+ return result;
+}
+
+#else /* def _POSIX_TIMERS */
+
+/* ------------------------------------------------------------------ */
+
+#ifdef __MINGW32__
+
+#include <sys/timeb.h>
+
+long double
+frealtime()
+{
+ long double result;
+
+ struct timeb t;
+
+ ftime(&t);
+ result = (long double)t.time + (long double)t.millitm * (long double)1e-3;
+
+ assert(isnormal(result));
+ assert(result > 0);
+ return result;
+}
+
+
+#else /* def __MINGW32__ */
+
+/* ------------------------------------------------------------------ */
+
+#ifndef CLK_TCK
+static clock_t CLK_TCK = 0;
+static void set_clk_tck(void) __attribute__ ((constructor));
+static void set_clk_tck(void)
+{
+ long v = sysconf(_SC_CLK_TCK);
+ if (v == -1) {
+ perror("sysconf(_SC_CLK_TCK)");
+ exit(EXIT_FAILURE);
+ }
+ CLK_TCK = v;
+}
+#endif
+
+long double
+frealtime()
+{
+ long double result;
+
+
+ struct tms t;
+ clock_t c=times(&t);
+ if (c==(clock_t)-1) {
+ perror("frealtime (times)");
+ exit(EXIT_FAILURE);
+ }
+ result = (long double)c/CLK_TCK;
+
+ assert(isnormal(result));
+ assert(result > 0);
+ return result;
+}
+
+#endif
+#endif
+#endif
+
+
--- /dev/null
+/* Macros for taking apart, interpreting and processing file names.
+
+ These are here because some non-Posix (a.k.a. DOSish) systems have
+ drive letter brain-damage at the beginning of an absolute file name,
+ use forward- and back-slash in path names interchangeably, and
+ some of them have case-insensitive file names.
+
+ Copyright 2000, 2001, 2007 Free Software Foundation, Inc.
+
+This file is part of BFD, the Binary File Descriptor library.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
+
+#ifndef FILENAMES_H
+#define FILENAMES_H
+
+#if defined(__MSDOS__) || defined(_WIN32) || defined(__OS2__) || defined (__CYGWIN__)
+
+#ifndef HAVE_DOS_BASED_FILE_SYSTEM
+#define HAVE_DOS_BASED_FILE_SYSTEM 1
+#endif
+
+#define IS_DIR_SEPARATOR(c) ((c) == '/' || (c) == '\\')
+/* Note that IS_ABSOLUTE_PATH accepts d:foo as well, although it is
+ only semi-absolute. This is because the users of IS_ABSOLUTE_PATH
+ want to know whether to prepend the current working directory to
+ a file name, which should not be done with a name like d:foo. */
+#define IS_ABSOLUTE_PATH(f) (IS_DIR_SEPARATOR((f)[0]) || (((f)[0]) && ((f)[1] == ':')))
+
+#else /* not DOSish */
+
+#define IS_DIR_SEPARATOR(c) ((c) == '/')
+#define IS_ABSOLUTE_PATH(f) (IS_DIR_SEPARATOR((f)[0]))
+
+#endif /* not DOSish */
+
+extern int filename_cmp (const char *s1, const char *s2);
+#define FILENAME_CMP(s1, s2) filename_cmp(s1, s2)
+
+#endif /* FILENAMES_H */
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2003 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2003.
+ *
+ */
+
+#include "sysdep.h"
+
+#include <stdio.h>
+#include <stdlib.h>
+#include <unistd.h>
+
+#ifndef HAVE_GETDELIM
+
+#define GETDELIM_BUFFER 128
+
+ssize_t
+getdelim( char **lineptr, size_t *n, int delimiter, FILE *stream )
+{
+ char *p;
+ int c;
+ size_t len = 0;
+
+ if (!lineptr || !n || (!*lineptr && *n))
+ return -1;
+
+ /* allocate initial buffer */
+ if (!*lineptr || !*n) {
+ char *np;
+ np = realloc( *lineptr, GETDELIM_BUFFER );
+ if (!np)
+ return -1;
+ *n = GETDELIM_BUFFER;
+ *lineptr = np;
+ }
+
+ p = *lineptr;
+
+ /* read characters from stream */
+ while ((c = fgetc( stream )) != EOF) {
+ if (len >= *n) {
+ char *np = realloc( *lineptr, *n * 2 );
+ if (!np)
+ return -1;
+ p = np + (p - *lineptr);
+ *lineptr = np;
+ *n *= 2;
+ }
+ *p++ = (char) c;
+ len++;
+ if (delimiter == c)
+ break;
+ }
+
+ /* end of file without any bytes read */
+ if ((c == EOF) && (len == 0))
+ return -1;
+
+ /* trailing '\0' */
+ if (len >= *n) {
+ char *np = realloc( *lineptr, *n + 1 );
+ if (!np)
+ return -1;
+ p = np + (p - *lineptr);
+ *lineptr = np;
+ *n += 1;
+ }
+ *p = '\0';
+
+ return len;
+}
+
+#endif /* HAVE_GETDELIM */
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2003 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2003.
+ *
+ */
+
+#include "sysdep.h"
+
+#include <stdio.h>
+#include <unistd.h>
+
+#ifndef HAVE_GETLINE
+
+#ifndef HAVE_GETDELIM
+ssize_t getdelim( char **lineptr, size_t *n, int delimiter, FILE *stream );
+#endif /* HAVE_GETDELIM */
+
+ssize_t
+getline( char **lineptr, size_t *n, FILE *stream )
+{
+ return getdelim( lineptr, n, '\n', stream );
+}
+
+#endif /* HAVE_GETLINE */
--- /dev/null
+/* Libiberty basename. Like basename, but is not overridden by the
+ system C library.
+ Copyright (C) 2001, 2002 Free Software Foundation, Inc.
+
+This file is part of the libiberty library.
+Libiberty is free software; you can redistribute it and/or
+modify it under the terms of the GNU Library General Public
+License as published by the Free Software Foundation; either
+version 2 of the License, or (at your option) any later version.
+
+Libiberty is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+Library General Public License for more details.
+
+You should have received a copy of the GNU Library General Public
+License along with libiberty; see the file COPYING.LIB. If
+not, write to the Free Software Foundation, Inc., 51 Franklin Street - Fifth Floor,
+Boston, MA 02110-1301, USA. */
+
+/*
+
+@deftypefn Replacement {const char*} lbasename (const char *@var{name})
+
+Given a pointer to a string containing a typical pathname
+(@samp{/usr/src/cmd/ls/ls.c} for example), returns a pointer to the
+last component of the pathname (@samp{ls.c} in this case). The
+returned pointer is guaranteed to lie within the original
+string. This latter fact is not true of many vendor C
+libraries, which return special strings or modify the passed
+strings for particular input.
+
+In particular, the empty string returns the same empty string,
+and a path ending in @code{/} returns the empty string after it.
+
+@end deftypefn
+
+*/
+
+#ifdef HAVE_CONFIG_H
+#include "config.h"
+#endif
+#include "ansidecl.h"
+#include "libiberty.h"
+#include "safe-ctype.h"
+#include "filenames.h"
+
+const char *
+lbasename (const char *name)
+{
+ const char *base;
+
+#if defined (HAVE_DOS_BASED_FILE_SYSTEM)
+ /* Skip over a possible disk name. */
+ if (ISALPHA (name[0]) && name[1] == ':')
+ name += 2;
+#endif
+
+ for (base = name; *name; name++)
+ if (IS_DIR_SEPARATOR (*name))
+ base = name + 1;
+
+ return base;
+}
--- /dev/null
+/* Function declarations for libiberty.
+
+ Copyright 2001, 2002, 2005 Free Software Foundation, Inc.
+
+ Note - certain prototypes declared in this header file are for
+ functions whoes implementation copyright does not belong to the
+ FSF. Those prototypes are present in this file for reference
+ purposes only and their presence in this file should not construed
+ as an indication of ownership by the FSF of the implementation of
+ those functions in any way or form whatsoever.
+
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 2, or (at your option)
+ any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software
+ Foundation, Inc., 51 Franklin Street - Fifth Floor,
+ Boston, MA 02110-1301, USA.
+
+ Written by Cygnus Support, 1994.
+
+ The libiberty library provides a number of functions which are
+ missing on some operating systems. We do not declare those here,
+ to avoid conflicts with the system header files on operating
+ systems that do support those functions. In this file we only
+ declare those functions which are specific to libiberty. */
+
+#ifndef LIBIBERTY_H
+#define LIBIBERTY_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "ansidecl.h"
+
+/* Get a definition for size_t. */
+#include <stddef.h>
+/* Get a definition for va_list. */
+#include <stdarg.h>
+
+#include <stdio.h>
+
+/* If the OS supports it, ensure that the supplied stream is setup to
+ avoid any multi-threaded locking. Otherwise leave the FILE pointer
+ unchanged. If the stream is NULL do nothing. */
+
+extern void unlock_stream (FILE *);
+
+/* If the OS supports it, ensure that the standard I/O streams, stdin,
+ stdout and stderr are setup to avoid any multi-threaded locking.
+ Otherwise do nothing. */
+
+extern void unlock_std_streams (void);
+
+/* Open and return a FILE pointer. If the OS supports it, ensure that
+ the stream is setup to avoid any multi-threaded locking. Otherwise
+ return the FILE pointer unchanged. */
+
+extern FILE *fopen_unlocked (const char *, const char *);
+extern FILE *fdopen_unlocked (int, const char *);
+extern FILE *freopen_unlocked (const char *, const char *, FILE *);
+
+/* Build an argument vector from a string. Allocates memory using
+ malloc. Use freeargv to free the vector. */
+
+extern char **buildargv (const char *) ATTRIBUTE_MALLOC;
+
+/* Free a vector returned by buildargv. */
+
+extern void freeargv (char **);
+
+/* Duplicate an argument vector. Allocates memory using malloc. Use
+ freeargv to free the vector. */
+
+extern char **dupargv (char **) ATTRIBUTE_MALLOC;
+
+/* Expand "@file" arguments in argv. */
+
+extern void expandargv PARAMS ((int *, char ***));
+
+/* Write argv to an @-file, inserting necessary quoting. */
+
+extern int writeargv PARAMS ((char **, FILE *));
+
+/* Return the last component of a path name. Note that we can't use a
+ prototype here because the parameter is declared inconsistently
+ across different systems, sometimes as "char *" and sometimes as
+ "const char *" */
+
+/* HAVE_DECL_* is a three-state macro: undefined, 0 or 1. If it is
+ undefined, we haven't run the autoconf check so provide the
+ declaration without arguments. If it is 0, we checked and failed
+ to find the declaration so provide a fully prototyped one. If it
+ is 1, we found it so don't provide any declaration at all. */
+#if !HAVE_DECL_BASENAME
+#if defined (__GNU_LIBRARY__ ) || defined (__linux__) || defined (__FreeBSD__) || defined (__OpenBSD__) || defined(__NetBSD__) || defined (__CYGWIN__) || defined (__CYGWIN32__) || defined (__MINGW32__) || defined (HAVE_DECL_BASENAME)
+extern char *basename (const char *);
+#else
+/* Do not allow basename to be used if there is no prototype seen. We
+ either need to use the above prototype or have one from
+ autoconf which would result in HAVE_DECL_BASENAME being set. */
+#define basename basename_cannot_be_used_without_a_prototype
+#endif
+#endif
+
+/* A well-defined basename () that is always compiled in. */
+
+extern const char *lbasename (const char *);
+
+/* A well-defined realpath () that is always compiled in. */
+
+extern char *lrealpath (const char *);
+
+/* Concatenate an arbitrary number of strings. You must pass NULL as
+ the last argument of this function, to terminate the list of
+ strings. Allocates memory using xmalloc. */
+
+extern char *concat (const char *, ...) ATTRIBUTE_MALLOC ATTRIBUTE_SENTINEL;
+
+/* Concatenate an arbitrary number of strings. You must pass NULL as
+ the last argument of this function, to terminate the list of
+ strings. Allocates memory using xmalloc. The first argument is
+ not one of the strings to be concatenated, but if not NULL is a
+ pointer to be freed after the new string is created, similar to the
+ way xrealloc works. */
+
+extern char *reconcat (char *, const char *, ...) ATTRIBUTE_MALLOC ATTRIBUTE_SENTINEL;
+
+/* Determine the length of concatenating an arbitrary number of
+ strings. You must pass NULL as the last argument of this function,
+ to terminate the list of strings. */
+
+extern unsigned long concat_length (const char *, ...) ATTRIBUTE_SENTINEL;
+
+/* Concatenate an arbitrary number of strings into a SUPPLIED area of
+ memory. You must pass NULL as the last argument of this function,
+ to terminate the list of strings. The supplied memory is assumed
+ to be large enough. */
+
+extern char *concat_copy (char *, const char *, ...) ATTRIBUTE_SENTINEL;
+
+/* Concatenate an arbitrary number of strings into a GLOBAL area of
+ memory. You must pass NULL as the last argument of this function,
+ to terminate the list of strings. The supplied memory is assumed
+ to be large enough. */
+
+extern char *concat_copy2 (const char *, ...) ATTRIBUTE_SENTINEL;
+
+/* This is the global area used by concat_copy2. */
+
+extern char *libiberty_concat_ptr;
+
+/* Concatenate an arbitrary number of strings. You must pass NULL as
+ the last argument of this function, to terminate the list of
+ strings. Allocates memory using alloca. The arguments are
+ evaluated twice! */
+#define ACONCAT(ACONCAT_PARAMS) \
+ (libiberty_concat_ptr = (char *) alloca (concat_length ACONCAT_PARAMS + 1), \
+ concat_copy2 ACONCAT_PARAMS)
+
+/* Check whether two file descriptors refer to the same file. */
+
+extern int fdmatch (int fd1, int fd2);
+
+/* Return the position of the first bit set in the argument. */
+/* Prototypes vary from system to system, so we only provide a
+ prototype on systems where we know that we need it. */
+#if defined (HAVE_DECL_FFS) && !HAVE_DECL_FFS
+extern int ffs(int);
+#endif
+
+/* Get the working directory. The result is cached, so don't call
+ chdir() between calls to getpwd(). */
+
+extern char * getpwd (void);
+
+/* Get the current time. */
+/* Prototypes vary from system to system, so we only provide a
+ prototype on systems where we know that we need it. */
+#ifdef __MINGW32__
+/* Forward declaration to avoid #include <sys/time.h>. */
+struct timeval;
+extern int gettimeofday (struct timeval *, void *);
+#endif
+
+/* Get the amount of time the process has run, in microseconds. */
+
+extern long get_run_time (void);
+
+/* Generate a relocated path to some installation directory. Allocates
+ return value using malloc. */
+
+extern char *make_relative_prefix (const char *, const char *,
+ const char *) ATTRIBUTE_MALLOC;
+
+/* Generate a relocated path to some installation directory without
+ attempting to follow any soft links. Allocates
+ return value using malloc. */
+
+extern char *make_relative_prefix_ignore_links (const char *, const char *,
+ const char *) ATTRIBUTE_MALLOC;
+
+/* Choose a temporary directory to use for scratch files. */
+
+extern char *choose_temp_base (void) ATTRIBUTE_MALLOC;
+
+/* Return a temporary file name or NULL if unable to create one. */
+
+extern char *make_temp_file (const char *) ATTRIBUTE_MALLOC;
+
+/* Remove a link to a file unless it is special. */
+
+extern int unlink_if_ordinary (const char *);
+
+/* Allocate memory filled with spaces. Allocates using malloc. */
+
+extern const char *spaces (int count);
+
+/* Return the maximum error number for which strerror will return a
+ string. */
+
+extern int errno_max (void);
+
+/* Return the name of an errno value (e.g., strerrno (EINVAL) returns
+ "EINVAL"). */
+
+extern const char *strerrno (int);
+
+/* Given the name of an errno value, return the value. */
+
+extern int strtoerrno (const char *);
+
+/* ANSI's strerror(), but more robust. */
+
+extern char *xstrerror (int);
+
+/* Return the maximum signal number for which strsignal will return a
+ string. */
+
+extern int signo_max (void);
+
+/* Return a signal message string for a signal number
+ (e.g., strsignal (SIGHUP) returns something like "Hangup"). */
+/* This is commented out as it can conflict with one in system headers.
+ We still document its existence though. */
+
+/*extern const char *strsignal (int);*/
+
+/* Return the name of a signal number (e.g., strsigno (SIGHUP) returns
+ "SIGHUP"). */
+
+extern const char *strsigno (int);
+
+/* Given the name of a signal, return its number. */
+
+extern int strtosigno (const char *);
+
+/* Register a function to be run by xexit. Returns 0 on success. */
+
+extern int xatexit (void (*fn) (void));
+
+/* Exit, calling all the functions registered with xatexit. */
+
+extern void xexit (int status) ATTRIBUTE_NORETURN;
+
+/* Set the program name used by xmalloc. */
+
+extern void xmalloc_set_program_name (const char *);
+
+/* Report an allocation failure. */
+extern void xmalloc_failed (size_t) ATTRIBUTE_NORETURN;
+
+/* Allocate memory without fail. If malloc fails, this will print a
+ message to stderr (using the name set by xmalloc_set_program_name,
+ if any) and then call xexit. */
+
+extern void *xmalloc (size_t) ATTRIBUTE_MALLOC;
+
+/* Reallocate memory without fail. This works like xmalloc. Note,
+ realloc type functions are not suitable for attribute malloc since
+ they may return the same address across multiple calls. */
+
+extern void *xrealloc (void *, size_t);
+
+/* Allocate memory without fail and set it to zero. This works like
+ xmalloc. */
+
+extern void *xcalloc (size_t, size_t) ATTRIBUTE_MALLOC;
+
+/* Copy a string into a memory buffer without fail. */
+
+extern char *xstrdup (const char *) ATTRIBUTE_MALLOC;
+
+/* Copy at most N characters from string into a buffer without fail. */
+
+extern char *xstrndup (const char *, size_t) ATTRIBUTE_MALLOC;
+
+/* Copy an existing memory buffer to a new memory buffer without fail. */
+
+extern void *xmemdup (const void *, size_t, size_t) ATTRIBUTE_MALLOC;
+
+/* Physical memory routines. Return values are in BYTES. */
+extern double physmem_total (void);
+extern double physmem_available (void);
+
+
+/* These macros provide a K&R/C89/C++-friendly way of allocating structures
+ with nice encapsulation. The XDELETE*() macros are technically
+ superfluous, but provided here for symmetry. Using them consistently
+ makes it easier to update client code to use different allocators such
+ as new/delete and new[]/delete[]. */
+
+/* Scalar allocators. */
+
+#define XNEW(T) ((T *) xmalloc (sizeof (T)))
+#define XCNEW(T) ((T *) xcalloc (1, sizeof (T)))
+#define XDELETE(P) free ((void*) (P))
+
+/* Array allocators. */
+
+#define XNEWVEC(T, N) ((T *) xmalloc (sizeof (T) * (N)))
+#define XCNEWVEC(T, N) ((T *) xcalloc ((N), sizeof (T)))
+#define XRESIZEVEC(T, P, N) ((T *) xrealloc ((void *) (P), sizeof (T) * (N)))
+#define XDELETEVEC(P) free ((void*) (P))
+
+/* Allocators for variable-sized structures and raw buffers. */
+
+#define XNEWVAR(T, S) ((T *) xmalloc ((S)))
+#define XCNEWVAR(T, S) ((T *) xcalloc (1, (S)))
+#define XRESIZEVAR(T, P, S) ((T *) xrealloc ((P), (S)))
+
+/* Type-safe obstack allocator. */
+
+#define XOBNEW(O, T) ((T *) obstack_alloc ((O), sizeof (T)))
+#define XOBFINISH(O, T) ((T) obstack_finish ((O)))
+
+/* hex character manipulation routines */
+
+#define _hex_array_size 256
+#define _hex_bad 99
+extern const unsigned char _hex_value[_hex_array_size];
+extern void hex_init (void);
+#define hex_p(c) (hex_value (c) != _hex_bad)
+/* If you change this, note well: Some code relies on side effects in
+ the argument being performed exactly once. */
+#define hex_value(c) ((unsigned int) _hex_value[(unsigned char) (c)])
+
+/* Flags for pex_init. These are bits to be or'ed together. */
+
+/* Record subprocess times, if possible. */
+#define PEX_RECORD_TIMES 0x1
+
+/* Use pipes for communication between processes, if possible. */
+#define PEX_USE_PIPES 0x2
+
+/* Save files used for communication between processes. */
+#define PEX_SAVE_TEMPS 0x4
+
+/* Prepare to execute one or more programs, with standard output of
+ each program fed to standard input of the next.
+ FLAGS As above.
+ PNAME The name of the program to report in error messages.
+ TEMPBASE A base name to use for temporary files; may be NULL to
+ use a random name.
+ Returns NULL on error. */
+
+extern struct pex_obj *pex_init (int flags, const char *pname,
+ const char *tempbase);
+
+/* Flags for pex_run. These are bits to be or'ed together. */
+
+/* Last program in pipeline. Standard output of program goes to
+ OUTNAME, or, if OUTNAME is NULL, to standard output of caller. Do
+ not set this if you want to call pex_read_output. After this is
+ set, pex_run may no longer be called with the same struct
+ pex_obj. */
+#define PEX_LAST 0x1
+
+/* Search for program in executable search path. */
+#define PEX_SEARCH 0x2
+
+/* OUTNAME is a suffix. */
+#define PEX_SUFFIX 0x4
+
+/* Send program's standard error to standard output. */
+#define PEX_STDERR_TO_STDOUT 0x8
+
+/* Input file should be opened in binary mode. This flag is ignored
+ on Unix. */
+#define PEX_BINARY_INPUT 0x10
+
+/* Output file should be opened in binary mode. This flag is ignored
+ on Unix. For proper behaviour PEX_BINARY_INPUT and
+ PEX_BINARY_OUTPUT have to match appropriately--i.e., a call using
+ PEX_BINARY_OUTPUT should be followed by a call using
+ PEX_BINARY_INPUT. */
+#define PEX_BINARY_OUTPUT 0x20
+
+/* Capture stderr to a pipe. The output can be read by
+ calling pex_read_err and reading from the returned
+ FILE object. This flag may be specified only for
+ the last program in a pipeline.
+
+ This flag is supported only on Unix and Windows. */
+#define PEX_STDERR_TO_PIPE 0x40
+
+/* Capture stderr in binary mode. This flag is ignored
+ on Unix. */
+#define PEX_BINARY_ERROR 0x80
+
+
+/* Execute one program. Returns NULL on success. On error returns an
+ error string (typically just the name of a system call); the error
+ string is statically allocated.
+
+ OBJ Returned by pex_init.
+
+ FLAGS As above.
+
+ EXECUTABLE The program to execute.
+
+ ARGV NULL terminated array of arguments to pass to the program.
+
+ OUTNAME Sets the output file name as follows:
+
+ PEX_SUFFIX set (OUTNAME may not be NULL):
+ TEMPBASE parameter to pex_init not NULL:
+ Output file name is the concatenation of TEMPBASE
+ and OUTNAME.
+ TEMPBASE is NULL:
+ Output file name is a random file name ending in
+ OUTNAME.
+ PEX_SUFFIX not set:
+ OUTNAME not NULL:
+ Output file name is OUTNAME.
+ OUTNAME NULL, TEMPBASE not NULL:
+ Output file name is randomly chosen using
+ TEMPBASE.
+ OUTNAME NULL, TEMPBASE NULL:
+ Output file name is randomly chosen.
+
+ If PEX_LAST is not set, the output file name is the
+ name to use for a temporary file holding stdout, if
+ any (there will not be a file if PEX_USE_PIPES is set
+ and the system supports pipes). If a file is used, it
+ will be removed when no longer needed unless
+ PEX_SAVE_TEMPS is set.
+
+ If PEX_LAST is set, and OUTNAME is not NULL, standard
+ output is written to the output file name. The file
+ will not be removed. If PEX_LAST and PEX_SUFFIX are
+ both set, TEMPBASE may not be NULL.
+
+ ERRNAME If not NULL, this is the name of a file to which
+ standard error is written. If NULL, standard error of
+ the program is standard error of the caller.
+
+ ERR On an error return, *ERR is set to an errno value, or
+ to 0 if there is no relevant errno.
+*/
+
+extern const char *pex_run (struct pex_obj *obj, int flags,
+ const char *executable, char * const *argv,
+ const char *outname, const char *errname,
+ int *err);
+
+/* As for pex_run (), but takes an extra parameter to enable the
+ environment for the child process to be specified.
+
+ ENV The environment for the child process, specified as
+ an array of character pointers. Each element of the
+ array should point to a string of the form VAR=VALUE,
+ with the exception of the last element which must be
+ a null pointer.
+*/
+
+extern const char *pex_run_in_environment (struct pex_obj *obj, int flags,
+ const char *executable,
+ char * const *argv,
+ char * const *env,
+ const char *outname,
+ const char *errname, int *err);
+
+/* Return a stream for a temporary file to pass to the first program
+ in the pipeline as input. The file name is chosen as for pex_run.
+ pex_run closes the file automatically; don't close it yourself. */
+
+extern FILE *pex_input_file (struct pex_obj *obj, int flags,
+ const char *in_name);
+
+/* Return a stream for a pipe connected to the standard input of the
+ first program in the pipeline. You must have passed
+ `PEX_USE_PIPES' to `pex_init'. Close the returned stream
+ yourself. */
+
+extern FILE *pex_input_pipe (struct pex_obj *obj, int binary);
+
+/* Read the standard output of the last program to be executed.
+ pex_run can not be called after this. BINARY should be non-zero if
+ the file should be opened in binary mode; this is ignored on Unix.
+ Returns NULL on error. Don't call fclose on the returned FILE; it
+ will be closed by pex_free. */
+
+extern FILE *pex_read_output (struct pex_obj *, int binary);
+
+/* Read the standard error of the last program to be executed.
+ pex_run can not be called after this. BINARY should be non-zero if
+ the file should be opened in binary mode; this is ignored on Unix.
+ Returns NULL on error. Don't call fclose on the returned FILE; it
+ will be closed by pex_free. */
+
+extern FILE *pex_read_err (struct pex_obj *, int binary);
+
+/* Return exit status of all programs in VECTOR. COUNT indicates the
+ size of VECTOR. The status codes in the vector are in the order of
+ the calls to pex_run. Returns 0 on error, 1 on success. */
+
+extern int pex_get_status (struct pex_obj *, int count, int *vector);
+
+/* Return times of all programs in VECTOR. COUNT indicates the size
+ of VECTOR. struct pex_time is really just struct timeval, but that
+ is not portable to all systems. Returns 0 on error, 1 on
+ success. */
+
+struct pex_time
+{
+ unsigned long user_seconds;
+ unsigned long user_microseconds;
+ unsigned long system_seconds;
+ unsigned long system_microseconds;
+};
+
+extern int pex_get_times (struct pex_obj *, int count,
+ struct pex_time *vector);
+
+/* Clean up a pex_obj. */
+
+extern void pex_free (struct pex_obj *);
+
+/* Just execute one program. Return value is as for pex_run.
+ FLAGS Combination of PEX_SEARCH and PEX_STDERR_TO_STDOUT.
+ EXECUTABLE As for pex_run.
+ ARGV As for pex_run.
+ PNAME As for pex_init.
+ OUTNAME As for pex_run when PEX_LAST is set.
+ ERRNAME As for pex_run.
+ STATUS Set to exit status on success.
+ ERR As for pex_run.
+*/
+
+extern const char *pex_one (int flags, const char *executable,
+ char * const *argv, const char *pname,
+ const char *outname, const char *errname,
+ int *status, int *err);
+
+/* pexecute and pwait are the old pexecute interface, still here for
+ backward compatibility. Don't use these for new code. Instead,
+ use pex_init/pex_run/pex_get_status/pex_free, or pex_one. */
+
+/* Definitions used by the pexecute routine. */
+
+#define PEXECUTE_FIRST 1
+#define PEXECUTE_LAST 2
+#define PEXECUTE_ONE (PEXECUTE_FIRST + PEXECUTE_LAST)
+#define PEXECUTE_SEARCH 4
+#define PEXECUTE_VERBOSE 8
+
+/* Execute a program. */
+
+extern int pexecute (const char *, char * const *, const char *,
+ const char *, char **, char **, int);
+
+/* Wait for pexecute to finish. */
+
+extern int pwait (int, int *, int);
+
+#if !HAVE_DECL_ASPRINTF
+/* Like sprintf but provides a pointer to malloc'd storage, which must
+ be freed by the caller. */
+
+extern int asprintf (char **, const char *, ...) ATTRIBUTE_PRINTF_2;
+#endif
+
+#if !HAVE_DECL_VASPRINTF
+/* Like vsprintf but provides a pointer to malloc'd storage, which
+ must be freed by the caller. */
+
+extern int vasprintf (char **, const char *, va_list) ATTRIBUTE_PRINTF(2,0);
+#endif
+
+#if defined(HAVE_DECL_SNPRINTF) && !HAVE_DECL_SNPRINTF
+/* Like sprintf but prints at most N characters. */
+extern int snprintf (char *, size_t, const char *, ...) ATTRIBUTE_PRINTF_3;
+#endif
+
+#if defined(HAVE_DECL_VSNPRINTF) && !HAVE_DECL_VSNPRINTF
+/* Like vsprintf but prints at most N characters. */
+extern int vsnprintf (char *, size_t, const char *, va_list) ATTRIBUTE_PRINTF(3,0);
+#endif
+
+#if defined(HAVE_DECL_STRVERSCMP) && !HAVE_DECL_STRVERSCMP
+/* Compare version strings. */
+extern int strverscmp (const char *, const char *);
+#endif
+
+#define ARRAY_SIZE(a) (sizeof (a) / sizeof ((a)[0]))
+
+/* Drastically simplified alloca configurator. If we're using GCC,
+ we use __builtin_alloca; otherwise we use the C alloca. The C
+ alloca is always available. You can override GCC by defining
+ USE_C_ALLOCA yourself. The canonical autoconf macro C_ALLOCA is
+ also set/unset as it is often used to indicate whether code needs
+ to call alloca(0). */
+extern void *C_alloca (size_t) ATTRIBUTE_MALLOC;
+#undef alloca
+#if GCC_VERSION >= 2000 && !defined USE_C_ALLOCA
+# define alloca(x) __builtin_alloca(x)
+# undef C_ALLOCA
+# define ASTRDUP(X) \
+ (__extension__ ({ const char *const libiberty_optr = (X); \
+ const unsigned long libiberty_len = strlen (libiberty_optr) + 1; \
+ char *const libiberty_nptr = (char *const) alloca (libiberty_len); \
+ (char *) memcpy (libiberty_nptr, libiberty_optr, libiberty_len); }))
+#else
+# define alloca(x) C_alloca(x)
+# undef USE_C_ALLOCA
+# define USE_C_ALLOCA 1
+# undef C_ALLOCA
+# define C_ALLOCA 1
+extern const char *libiberty_optr;
+extern char *libiberty_nptr;
+extern unsigned long libiberty_len;
+# define ASTRDUP(X) \
+ (libiberty_optr = (X), \
+ libiberty_len = strlen (libiberty_optr) + 1, \
+ libiberty_nptr = (char *) alloca (libiberty_len), \
+ (char *) memcpy (libiberty_nptr, libiberty_optr, libiberty_len))
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+
+
+#endif /* ! defined (LIBIBERTY_H) */
--- /dev/null
+/* Libiberty realpath. Like realpath, but more consistent behavior.
+ Based on gdb_realpath from GDB.
+
+ Copyright 2003 Free Software Foundation, Inc.
+
+ This file is part of the libiberty library.
+
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 2 of the License, or
+ (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software
+ Foundation, Inc., 51 Franklin Street - Fifth Floor,
+ Boston, MA 02110-1301, USA. */
+
+/*
+
+@deftypefn Replacement {const char*} lrealpath (const char *@var{name})
+
+Given a pointer to a string containing a pathname, returns a canonical
+version of the filename. Symlinks will be resolved, and ``.'' and ``..''
+components will be simplified. The returned value will be allocated using
+@code{malloc}, or @code{NULL} will be returned on a memory allocation error.
+
+@end deftypefn
+
+*/
+
+#include "config.h"
+#include "ansidecl.h"
+#include "libiberty.h"
+
+#ifdef HAVE_LIMITS_H
+#include <limits.h>
+#endif
+#ifdef HAVE_STDLIB_H
+#include <stdlib.h>
+#endif
+#ifdef HAVE_UNISTD_H
+#include <unistd.h>
+#endif
+#ifdef HAVE_STRING_H
+#include <string.h>
+#endif
+
+/* On GNU libc systems the declaration is only visible with _GNU_SOURCE. */
+#if defined(HAVE_CANONICALIZE_FILE_NAME) \
+ && defined(NEED_DECLARATION_CANONICALIZE_FILE_NAME)
+extern char *canonicalize_file_name (const char *);
+#endif
+
+#if defined(HAVE_REALPATH)
+# if defined (PATH_MAX)
+# define REALPATH_LIMIT PATH_MAX
+# else
+# if defined (MAXPATHLEN)
+# define REALPATH_LIMIT MAXPATHLEN
+# endif
+# endif
+#else
+ /* cygwin has realpath, so it won't get here. */
+# if defined (_WIN32)
+# define WIN32_LEAN_AND_MEAN
+# include <windows.h> /* for GetFullPathName */
+# endif
+#endif
+
+char *
+lrealpath (const char *filename)
+{
+ /* Method 1: The system has a compile time upper bound on a filename
+ path. Use that and realpath() to canonicalize the name. This is
+ the most common case. Note that, if there isn't a compile time
+ upper bound, you want to avoid realpath() at all costs. */
+#if defined(REALPATH_LIMIT)
+ {
+ char buf[REALPATH_LIMIT];
+ const char *rp = realpath (filename, buf);
+ if (rp == NULL)
+ rp = filename;
+ return strdup (rp);
+ }
+#endif /* REALPATH_LIMIT */
+
+ /* Method 2: The host system (i.e., GNU) has the function
+ canonicalize_file_name() which malloc's a chunk of memory and
+ returns that, use that. */
+#if defined(HAVE_CANONICALIZE_FILE_NAME)
+ {
+ char *rp = canonicalize_file_name (filename);
+ if (rp == NULL)
+ return strdup (filename);
+ else
+ return rp;
+ }
+#endif
+
+ /* Method 3: Now we're getting desperate! The system doesn't have a
+ compile time buffer size and no alternative function. Query the
+ OS, using pathconf(), for the buffer limit. Care is needed
+ though, some systems do not limit PATH_MAX (return -1 for
+ pathconf()) making it impossible to pass a correctly sized buffer
+ to realpath() (it could always overflow). On those systems, we
+ skip this. */
+#if defined (HAVE_REALPATH) && defined (HAVE_UNISTD_H)
+ {
+ /* Find out the max path size. */
+ long path_max = pathconf ("/", _PC_PATH_MAX);
+ if (path_max > 0)
+ {
+ /* PATH_MAX is bounded. */
+ char *buf, *rp, *ret;
+ buf = (char *) malloc (path_max);
+ if (buf == NULL)
+ return NULL;
+ rp = realpath (filename, buf);
+ ret = strdup (rp ? rp : filename);
+ free (buf);
+ return ret;
+ }
+ }
+#endif
+
+ /* The MS Windows method. If we don't have realpath, we assume we
+ don't have symlinks and just canonicalize to a Windows absolute
+ path. GetFullPath converts ../ and ./ in relative paths to
+ absolute paths, filling in current drive if one is not given
+ or using the current directory of a specified drive (eg, "E:foo").
+ It also converts all forward slashes to back slashes. */
+#if defined (_WIN32)
+ {
+ char buf[MAX_PATH];
+ char* basename;
+ DWORD len = GetFullPathName (filename, MAX_PATH, buf, &basename);
+ if (len == 0 || len > MAX_PATH - 1)
+ return strdup (filename);
+ else
+ {
+ /* The file system is case-preserving but case-insensitive,
+ Canonicalize to lowercase, using the codepage associated
+ with the process locale. */
+ CharLowerBuff (buf, len);
+ return strdup (buf);
+ }
+ }
+#endif
+
+ /* This system is a lost cause, just duplicate the filename. */
+ return strdup (filename);
+}
--- /dev/null
+/* Relative (relocatable) prefix support.
+ Copyright (C) 1987, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
+ 1999, 2000, 2001, 2002, 2006 Free Software Foundation, Inc.
+
+This file is part of libiberty.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 2, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+for more details.
+
+You should have received a copy of the GNU General Public License
+along with GCC; see the file COPYING. If not, write to the Free
+Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
+02110-1301, USA. */
+
+/*
+
+@deftypefn Extension {const char*} make_relative_prefix (const char *@var{progname}, const char *@var{bin_prefix}, const char *@var{prefix})
+
+Given three paths @var{progname}, @var{bin_prefix}, @var{prefix},
+return the path that is in the same position relative to
+@var{progname}'s directory as @var{prefix} is relative to
+@var{bin_prefix}. That is, a string starting with the directory
+portion of @var{progname}, followed by a relative pathname of the
+difference between @var{bin_prefix} and @var{prefix}.
+
+If @var{progname} does not contain any directory separators,
+@code{make_relative_prefix} will search @env{PATH} to find a program
+named @var{progname}. Also, if @var{progname} is a symbolic link,
+the symbolic link will be resolved.
+
+For example, if @var{bin_prefix} is @code{/alpha/beta/gamma/gcc/delta},
+@var{prefix} is @code{/alpha/beta/gamma/omega/}, and @var{progname} is
+@code{/red/green/blue/gcc}, then this function will return
+@code{/red/green/blue/../../omega/}.
+
+The return value is normally allocated via @code{malloc}. If no
+relative prefix can be found, return @code{NULL}.
+
+@end deftypefn
+
+*/
+
+#ifdef HAVE_CONFIG_H
+#include "config.h"
+#endif
+
+#ifdef HAVE_STDLIB_H
+#include <stdlib.h>
+#endif
+#ifdef HAVE_UNISTD_H
+#include <unistd.h>
+#endif
+
+#include <string.h>
+
+#include "ansidecl.h"
+#include "libiberty.h"
+
+#ifndef R_OK
+#define R_OK 4
+#define W_OK 2
+#define X_OK 1
+#endif
+
+#ifndef DIR_SEPARATOR
+# define DIR_SEPARATOR '/'
+#endif
+
+#if defined (_WIN32) || defined (__MSDOS__) \
+ || defined (__DJGPP__) || defined (__OS2__)
+# define HAVE_DOS_BASED_FILE_SYSTEM
+# define HAVE_HOST_EXECUTABLE_SUFFIX
+# define HOST_EXECUTABLE_SUFFIX ".exe"
+# ifndef DIR_SEPARATOR_2
+# define DIR_SEPARATOR_2 '\\'
+# endif
+# define PATH_SEPARATOR ';'
+#else
+# define PATH_SEPARATOR ':'
+#endif
+
+#ifndef DIR_SEPARATOR_2
+# define IS_DIR_SEPARATOR(ch) ((ch) == DIR_SEPARATOR)
+#else
+# define IS_DIR_SEPARATOR(ch) \
+ (((ch) == DIR_SEPARATOR) || ((ch) == DIR_SEPARATOR_2))
+#endif
+
+#define DIR_UP ".."
+
+static char *save_string (const char *, int);
+static char **split_directories (const char *, int *);
+static void free_split_directories (char **);
+
+static char *
+save_string (const char *s, int len)
+{
+ char *result = (char *) malloc (len + 1);
+
+ memcpy (result, s, len);
+ result[len] = 0;
+ return result;
+}
+
+/* Split a filename into component directories. */
+
+static char **
+split_directories (const char *name, int *ptr_num_dirs)
+{
+ int num_dirs = 0;
+ char **dirs;
+ const char *p, *q;
+ int ch;
+
+ /* Count the number of directories. Special case MSDOS disk names as part
+ of the initial directory. */
+ p = name;
+#ifdef HAVE_DOS_BASED_FILE_SYSTEM
+ if (name[1] == ':' && IS_DIR_SEPARATOR (name[2]))
+ {
+ p += 3;
+ num_dirs++;
+ }
+#endif /* HAVE_DOS_BASED_FILE_SYSTEM */
+
+ while ((ch = *p++) != '\0')
+ {
+ if (IS_DIR_SEPARATOR (ch))
+ {
+ num_dirs++;
+ while (IS_DIR_SEPARATOR (*p))
+ p++;
+ }
+ }
+
+ dirs = (char **) malloc (sizeof (char *) * (num_dirs + 2));
+ if (dirs == NULL)
+ return NULL;
+
+ /* Now copy the directory parts. */
+ num_dirs = 0;
+ p = name;
+#ifdef HAVE_DOS_BASED_FILE_SYSTEM
+ if (name[1] == ':' && IS_DIR_SEPARATOR (name[2]))
+ {
+ dirs[num_dirs++] = save_string (p, 3);
+ if (dirs[num_dirs - 1] == NULL)
+ {
+ free (dirs);
+ return NULL;
+ }
+ p += 3;
+ }
+#endif /* HAVE_DOS_BASED_FILE_SYSTEM */
+
+ q = p;
+ while ((ch = *p++) != '\0')
+ {
+ if (IS_DIR_SEPARATOR (ch))
+ {
+ while (IS_DIR_SEPARATOR (*p))
+ p++;
+
+ dirs[num_dirs++] = save_string (q, p - q);
+ if (dirs[num_dirs - 1] == NULL)
+ {
+ dirs[num_dirs] = NULL;
+ free_split_directories (dirs);
+ return NULL;
+ }
+ q = p;
+ }
+ }
+
+ if (p - 1 - q > 0)
+ dirs[num_dirs++] = save_string (q, p - 1 - q);
+ dirs[num_dirs] = NULL;
+
+ if (dirs[num_dirs - 1] == NULL)
+ {
+ free_split_directories (dirs);
+ return NULL;
+ }
+
+ if (ptr_num_dirs)
+ *ptr_num_dirs = num_dirs;
+ return dirs;
+}
+
+/* Release storage held by split directories. */
+
+static void
+free_split_directories (char **dirs)
+{
+ int i = 0;
+
+ if (dirs != NULL)
+ {
+ while (dirs[i] != NULL)
+ free (dirs[i++]);
+
+ free ((char *) dirs);
+ }
+}
+
+/* Given three strings PROGNAME, BIN_PREFIX, PREFIX, return a string that gets
+ to PREFIX starting with the directory portion of PROGNAME and a relative
+ pathname of the difference between BIN_PREFIX and PREFIX.
+
+ For example, if BIN_PREFIX is /alpha/beta/gamma/gcc/delta, PREFIX is
+ /alpha/beta/gamma/omega/, and PROGNAME is /red/green/blue/gcc, then this
+ function will return /red/green/blue/../../omega/.
+
+ If no relative prefix can be found, return NULL. */
+
+static char *
+make_relative_prefix_1 (const char *progname, const char *bin_prefix,
+ const char *prefix, const int resolve_links)
+{
+ char **prog_dirs = NULL, **bin_dirs = NULL, **prefix_dirs = NULL;
+ int prog_num, bin_num, prefix_num;
+ int i, n, common;
+ int needed_len;
+ char *ret = NULL, *ptr, *full_progname;
+
+ if (progname == NULL || bin_prefix == NULL || prefix == NULL)
+ return NULL;
+
+ /* If there is no full pathname, try to find the program by checking in each
+ of the directories specified in the PATH environment variable. */
+ if (lbasename (progname) == progname)
+ {
+ char *temp;
+
+ temp = getenv ("PATH");
+ if (temp)
+ {
+ char *startp, *endp, *nstore;
+ size_t prefixlen = strlen (temp) + 1;
+ if (prefixlen < 2)
+ prefixlen = 2;
+
+ nstore = (char *) alloca (prefixlen + strlen (progname) + 1);
+
+ startp = endp = temp;
+ while (1)
+ {
+ if (*endp == PATH_SEPARATOR || *endp == 0)
+ {
+ if (endp == startp)
+ {
+ nstore[0] = '.';
+ nstore[1] = DIR_SEPARATOR;
+ nstore[2] = '\0';
+ }
+ else
+ {
+ strncpy (nstore, startp, endp - startp);
+ if (! IS_DIR_SEPARATOR (endp[-1]))
+ {
+ nstore[endp - startp] = DIR_SEPARATOR;
+ nstore[endp - startp + 1] = 0;
+ }
+ else
+ nstore[endp - startp] = 0;
+ }
+ strcat (nstore, progname);
+ if (! access (nstore, X_OK)
+#ifdef HAVE_HOST_EXECUTABLE_SUFFIX
+ || ! access (strcat (nstore, HOST_EXECUTABLE_SUFFIX), X_OK)
+#endif
+ )
+ {
+ progname = nstore;
+ break;
+ }
+
+ if (*endp == 0)
+ break;
+ endp = startp = endp + 1;
+ }
+ else
+ endp++;
+ }
+ }
+ }
+
+ if ( resolve_links )
+ {
+ full_progname = lrealpath (progname);
+ if (full_progname == NULL)
+ return NULL;
+ }
+ else
+ full_progname = strdup(progname);
+
+ prog_dirs = split_directories (full_progname, &prog_num);
+ free (full_progname);
+ if (prog_dirs == NULL)
+ return NULL;
+
+ bin_dirs = split_directories (bin_prefix, &bin_num);
+ if (bin_dirs == NULL)
+ goto bailout;
+
+ /* Remove the program name from comparison of directory names. */
+ prog_num--;
+
+ /* If we are still installed in the standard location, we don't need to
+ specify relative directories. Also, if argv[0] still doesn't contain
+ any directory specifiers after the search above, then there is not much
+ we can do. */
+ if (prog_num == bin_num)
+ {
+ for (i = 0; i < bin_num; i++)
+ {
+ if (strcmp (prog_dirs[i], bin_dirs[i]) != 0)
+ break;
+ }
+
+ if (prog_num <= 0 || i == bin_num)
+ goto bailout;
+ }
+
+ prefix_dirs = split_directories (prefix, &prefix_num);
+ if (prefix_dirs == NULL)
+ goto bailout;
+
+ /* Find how many directories are in common between bin_prefix & prefix. */
+ n = (prefix_num < bin_num) ? prefix_num : bin_num;
+ for (common = 0; common < n; common++)
+ {
+ if (strcmp (bin_dirs[common], prefix_dirs[common]) != 0)
+ break;
+ }
+
+ /* If there are no common directories, there can be no relative prefix. */
+ if (common == 0)
+ goto bailout;
+
+ /* Two passes: first figure out the size of the result string, and
+ then construct it. */
+ needed_len = 0;
+ for (i = 0; i < prog_num; i++)
+ needed_len += strlen (prog_dirs[i]);
+ needed_len += sizeof (DIR_UP) * (bin_num - common);
+ for (i = common; i < prefix_num; i++)
+ needed_len += strlen (prefix_dirs[i]);
+ needed_len += 1; /* Trailing NUL. */
+
+ ret = (char *) malloc (needed_len);
+ if (ret == NULL)
+ goto bailout;
+
+ /* Build up the pathnames in argv[0]. */
+ *ret = '\0';
+ for (i = 0; i < prog_num; i++)
+ strcat (ret, prog_dirs[i]);
+
+ /* Now build up the ..'s. */
+ ptr = ret + strlen(ret);
+ for (i = common; i < bin_num; i++)
+ {
+ strcpy (ptr, DIR_UP);
+ ptr += sizeof (DIR_UP) - 1;
+ *(ptr++) = DIR_SEPARATOR;
+ }
+ *ptr = '\0';
+
+ /* Put in directories to move over to prefix. */
+ for (i = common; i < prefix_num; i++)
+ strcat (ret, prefix_dirs[i]);
+
+ bailout:
+ free_split_directories (prog_dirs);
+ free_split_directories (bin_dirs);
+ free_split_directories (prefix_dirs);
+
+ return ret;
+}
+
+
+/* Do the full job, including symlink resolution.
+ This path will find files installed in the same place as the
+ program even when a soft link has been made to the program
+ from somwhere else. */
+
+char *
+make_relative_prefix (const char *progname, const char *bin_prefix,
+ const char *prefix)
+{
+ return make_relative_prefix_1 (progname, bin_prefix, prefix, 1);
+}
+
+/* Make the relative pathname without attempting to resolve any links.
+ '..' etc may also be left in the pathname.
+ This will find the files the user meant the program to find if the
+ installation is patched together with soft links. */
+
+char *
+make_relative_prefix_ignore_links (const char *progname,
+ const char *bin_prefix,
+ const char *prefix)
+{
+ return make_relative_prefix_1 (progname, bin_prefix, prefix, 0);
+}
+
--- /dev/null
+/* <ctype.h> replacement macros.
+
+ Copyright (C) 2000, 2001, 2002, 2003, 2004,
+ 2005 Free Software Foundation, Inc.
+ Contributed by Zack Weinberg <zackw@stanford.edu>.
+
+This file is part of the libiberty library.
+Libiberty is free software; you can redistribute it and/or
+modify it under the terms of the GNU Library General Public
+License as published by the Free Software Foundation; either
+version 2 of the License, or (at your option) any later version.
+
+Libiberty is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+Library General Public License for more details.
+
+You should have received a copy of the GNU Library General Public
+License along with libiberty; see the file COPYING.LIB. If
+not, write to the Free Software Foundation, Inc., 51 Franklin Street - Fifth Floor,
+Boston, MA 02110-1301, USA. */
+
+/*
+
+@defvr Extension HOST_CHARSET
+This macro indicates the basic character set and encoding used by the
+host: more precisely, the encoding used for character constants in
+preprocessor @samp{#if} statements (the C "execution character set").
+It is defined by @file{safe-ctype.h}, and will be an integer constant
+with one of the following values:
+
+@ftable @code
+@item HOST_CHARSET_UNKNOWN
+The host character set is unknown - that is, not one of the next two
+possibilities.
+
+@item HOST_CHARSET_ASCII
+The host character set is ASCII.
+
+@item HOST_CHARSET_EBCDIC
+The host character set is some variant of EBCDIC. (Only one of the
+nineteen EBCDIC varying characters is tested; exercise caution.)
+@end ftable
+@end defvr
+
+@deffn Extension ISALPHA (@var{c})
+@deffnx Extension ISALNUM (@var{c})
+@deffnx Extension ISBLANK (@var{c})
+@deffnx Extension ISCNTRL (@var{c})
+@deffnx Extension ISDIGIT (@var{c})
+@deffnx Extension ISGRAPH (@var{c})
+@deffnx Extension ISLOWER (@var{c})
+@deffnx Extension ISPRINT (@var{c})
+@deffnx Extension ISPUNCT (@var{c})
+@deffnx Extension ISSPACE (@var{c})
+@deffnx Extension ISUPPER (@var{c})
+@deffnx Extension ISXDIGIT (@var{c})
+
+These twelve macros are defined by @file{safe-ctype.h}. Each has the
+same meaning as the corresponding macro (with name in lowercase)
+defined by the standard header @file{ctype.h}. For example,
+@code{ISALPHA} returns true for alphabetic characters and false for
+others. However, there are two differences between these macros and
+those provided by @file{ctype.h}:
+
+@itemize @bullet
+@item These macros are guaranteed to have well-defined behavior for all
+values representable by @code{signed char} and @code{unsigned char}, and
+for @code{EOF}.
+
+@item These macros ignore the current locale; they are true for these
+fixed sets of characters:
+@multitable {@code{XDIGIT}} {yada yada yada yada yada yada yada yada}
+@item @code{ALPHA} @tab @kbd{A-Za-z}
+@item @code{ALNUM} @tab @kbd{A-Za-z0-9}
+@item @code{BLANK} @tab @kbd{space tab}
+@item @code{CNTRL} @tab @code{!PRINT}
+@item @code{DIGIT} @tab @kbd{0-9}
+@item @code{GRAPH} @tab @code{ALNUM || PUNCT}
+@item @code{LOWER} @tab @kbd{a-z}
+@item @code{PRINT} @tab @code{GRAPH ||} @kbd{space}
+@item @code{PUNCT} @tab @kbd{`~!@@#$%^&*()_-=+[@{]@}\|;:'",<.>/?}
+@item @code{SPACE} @tab @kbd{space tab \n \r \f \v}
+@item @code{UPPER} @tab @kbd{A-Z}
+@item @code{XDIGIT} @tab @kbd{0-9A-Fa-f}
+@end multitable
+
+Note that, if the host character set is ASCII or a superset thereof,
+all these macros will return false for all values of @code{char} outside
+the range of 7-bit ASCII. In particular, both ISPRINT and ISCNTRL return
+false for characters with numeric values from 128 to 255.
+@end itemize
+@end deffn
+
+@deffn Extension ISIDNUM (@var{c})
+@deffnx Extension ISIDST (@var{c})
+@deffnx Extension IS_VSPACE (@var{c})
+@deffnx Extension IS_NVSPACE (@var{c})
+@deffnx Extension IS_SPACE_OR_NUL (@var{c})
+@deffnx Extension IS_ISOBASIC (@var{c})
+These six macros are defined by @file{safe-ctype.h} and provide
+additional character classes which are useful when doing lexical
+analysis of C or similar languages. They are true for the following
+sets of characters:
+
+@multitable {@code{SPACE_OR_NUL}} {yada yada yada yada yada yada yada yada}
+@item @code{IDNUM} @tab @kbd{A-Za-z0-9_}
+@item @code{IDST} @tab @kbd{A-Za-z_}
+@item @code{VSPACE} @tab @kbd{\r \n}
+@item @code{NVSPACE} @tab @kbd{space tab \f \v \0}
+@item @code{SPACE_OR_NUL} @tab @code{VSPACE || NVSPACE}
+@item @code{ISOBASIC} @tab @code{VSPACE || NVSPACE || PRINT}
+@end multitable
+@end deffn
+
+*/
+
+#include "ansidecl.h"
+#include <safe-ctype.h>
+#include <stdio.h> /* for EOF */
+
+#if EOF != -1
+ #error "<safe-ctype.h> requires EOF == -1"
+#endif
+
+/* Shorthand */
+#define bl _sch_isblank
+#define cn _sch_iscntrl
+#define di _sch_isdigit
+#define is _sch_isidst
+#define lo _sch_islower
+#define nv _sch_isnvsp
+#define pn _sch_ispunct
+#define pr _sch_isprint
+#define sp _sch_isspace
+#define up _sch_isupper
+#define vs _sch_isvsp
+#define xd _sch_isxdigit
+
+/* Masks. */
+#define L (const unsigned short) (lo|is |pr) /* lower case letter */
+#define XL (const unsigned short) (lo|is|xd|pr) /* lowercase hex digit */
+#define U (const unsigned short) (up|is |pr) /* upper case letter */
+#define XU (const unsigned short) (up|is|xd|pr) /* uppercase hex digit */
+#define D (const unsigned short) (di |xd|pr) /* decimal digit */
+#define P (const unsigned short) (pn |pr) /* punctuation */
+#define _ (const unsigned short) (pn|is |pr) /* underscore */
+
+#define C (const unsigned short) ( cn) /* control character */
+#define Z (const unsigned short) (nv |cn) /* NUL */
+#define M (const unsigned short) (nv|sp |cn) /* cursor movement: \f \v */
+#define V (const unsigned short) (vs|sp |cn) /* vertical space: \r \n */
+#define T (const unsigned short) (nv|sp|bl|cn) /* tab */
+#define S (const unsigned short) (nv|sp|bl|pr) /* space */
+
+/* Are we ASCII? */
+#if HOST_CHARSET == HOST_CHARSET_ASCII
+
+const unsigned short _sch_istable[256] =
+{
+ Z, C, C, C, C, C, C, C, /* NUL SOH STX ETX EOT ENQ ACK BEL */
+ C, T, V, M, M, V, C, C, /* BS HT LF VT FF CR SO SI */
+ C, C, C, C, C, C, C, C, /* DLE DC1 DC2 DC3 DC4 NAK SYN ETB */
+ C, C, C, C, C, C, C, C, /* CAN EM SUB ESC FS GS RS US */
+ S, P, P, P, P, P, P, P, /* SP ! " # $ % & ' */
+ P, P, P, P, P, P, P, P, /* ( ) * + , - . / */
+ D, D, D, D, D, D, D, D, /* 0 1 2 3 4 5 6 7 */
+ D, D, P, P, P, P, P, P, /* 8 9 : ; < = > ? */
+ P, XU, XU, XU, XU, XU, XU, U, /* @ A B C D E F G */
+ U, U, U, U, U, U, U, U, /* H I J K L M N O */
+ U, U, U, U, U, U, U, U, /* P Q R S T U V W */
+ U, U, U, P, P, P, P, _, /* X Y Z [ \ ] ^ _ */
+ P, XL, XL, XL, XL, XL, XL, L, /* ` a b c d e f g */
+ L, L, L, L, L, L, L, L, /* h i j k l m n o */
+ L, L, L, L, L, L, L, L, /* p q r s t u v w */
+ L, L, L, P, P, P, P, C, /* x y z { | } ~ DEL */
+
+ /* high half of unsigned char is locale-specific, so all tests are
+ false in "C" locale */
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+};
+
+const unsigned char _sch_tolower[256] =
+{
+ 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15,
+ 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31,
+ 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47,
+ 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63,
+ 64,
+
+ 'a', 'b', 'c', 'd', 'e', 'f', 'g', 'h', 'i', 'j', 'k', 'l', 'm',
+ 'n', 'o', 'p', 'q', 'r', 's', 't', 'u', 'v', 'w', 'x', 'y', 'z',
+
+ 91, 92, 93, 94, 95, 96,
+
+ 'a', 'b', 'c', 'd', 'e', 'f', 'g', 'h', 'i', 'j', 'k', 'l', 'm',
+ 'n', 'o', 'p', 'q', 'r', 's', 't', 'u', 'v', 'w', 'x', 'y', 'z',
+
+ 123,124,125,126,127,
+
+ 128,129,130,131, 132,133,134,135, 136,137,138,139, 140,141,142,143,
+ 144,145,146,147, 148,149,150,151, 152,153,154,155, 156,157,158,159,
+ 160,161,162,163, 164,165,166,167, 168,169,170,171, 172,173,174,175,
+ 176,177,178,179, 180,181,182,183, 184,185,186,187, 188,189,190,191,
+
+ 192,193,194,195, 196,197,198,199, 200,201,202,203, 204,205,206,207,
+ 208,209,210,211, 212,213,214,215, 216,217,218,219, 220,221,222,223,
+ 224,225,226,227, 228,229,230,231, 232,233,234,235, 236,237,238,239,
+ 240,241,242,243, 244,245,246,247, 248,249,250,251, 252,253,254,255,
+};
+
+const unsigned char _sch_toupper[256] =
+{
+ 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15,
+ 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31,
+ 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47,
+ 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63,
+ 64,
+
+ 'A', 'B', 'C', 'D', 'E', 'F', 'G', 'H', 'I', 'J', 'K', 'L', 'M',
+ 'N', 'O', 'P', 'Q', 'R', 'S', 'T', 'U', 'V', 'W', 'X', 'Y', 'Z',
+
+ 91, 92, 93, 94, 95, 96,
+
+ 'A', 'B', 'C', 'D', 'E', 'F', 'G', 'H', 'I', 'J', 'K', 'L', 'M',
+ 'N', 'O', 'P', 'Q', 'R', 'S', 'T', 'U', 'V', 'W', 'X', 'Y', 'Z',
+
+ 123,124,125,126,127,
+
+ 128,129,130,131, 132,133,134,135, 136,137,138,139, 140,141,142,143,
+ 144,145,146,147, 148,149,150,151, 152,153,154,155, 156,157,158,159,
+ 160,161,162,163, 164,165,166,167, 168,169,170,171, 172,173,174,175,
+ 176,177,178,179, 180,181,182,183, 184,185,186,187, 188,189,190,191,
+
+ 192,193,194,195, 196,197,198,199, 200,201,202,203, 204,205,206,207,
+ 208,209,210,211, 212,213,214,215, 216,217,218,219, 220,221,222,223,
+ 224,225,226,227, 228,229,230,231, 232,233,234,235, 236,237,238,239,
+ 240,241,242,243, 244,245,246,247, 248,249,250,251, 252,253,254,255,
+};
+
+#else
+# if HOST_CHARSET == HOST_CHARSET_EBCDIC
+ #error "FIXME: write tables for EBCDIC"
+# else
+ #error "Unrecognized host character set"
+# endif
+#endif
--- /dev/null
+/* <ctype.h> replacement macros.
+
+ Copyright (C) 2000, 2001 Free Software Foundation, Inc.
+ Contributed by Zack Weinberg <zackw@stanford.edu>.
+
+This file is part of the libiberty library.
+Libiberty is free software; you can redistribute it and/or
+modify it under the terms of the GNU Library General Public
+License as published by the Free Software Foundation; either
+version 2 of the License, or (at your option) any later version.
+
+Libiberty is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+Library General Public License for more details.
+
+You should have received a copy of the GNU Library General Public
+License along with libiberty; see the file COPYING.LIB. If
+not, write to the Free Software Foundation, Inc., 51 Franklin Street - Fifth Floor,
+Boston, MA 02110-1301, USA. */
+
+/* This is a compatible replacement of the standard C library's <ctype.h>
+ with the following properties:
+
+ - Implements all isxxx() macros required by C99.
+ - Also implements some character classes useful when
+ parsing C-like languages.
+ - Does not change behavior depending on the current locale.
+ - Behaves properly for all values in the range of a signed or
+ unsigned char.
+
+ To avoid conflicts, this header defines the isxxx functions in upper
+ case, e.g. ISALPHA not isalpha. */
+
+#ifndef SAFE_CTYPE_H
+#define SAFE_CTYPE_H
+
+#ifdef isalpha
+ #error "safe-ctype.h and ctype.h may not be used simultaneously"
+#endif
+
+/* Determine host character set. */
+#define HOST_CHARSET_UNKNOWN 0
+#define HOST_CHARSET_ASCII 1
+#define HOST_CHARSET_EBCDIC 2
+
+#if '\n' == 0x0A && ' ' == 0x20 && '0' == 0x30 \
+ && 'A' == 0x41 && 'a' == 0x61 && '!' == 0x21
+# define HOST_CHARSET HOST_CHARSET_ASCII
+#else
+# if '\n' == 0x15 && ' ' == 0x40 && '0' == 0xF0 \
+ && 'A' == 0xC1 && 'a' == 0x81 && '!' == 0x5A
+# define HOST_CHARSET HOST_CHARSET_EBCDIC
+# else
+# define HOST_CHARSET HOST_CHARSET_UNKNOWN
+# endif
+#endif
+
+/* Categories. */
+
+enum {
+ /* In C99 */
+ _sch_isblank = 0x0001, /* space \t */
+ _sch_iscntrl = 0x0002, /* nonprinting characters */
+ _sch_isdigit = 0x0004, /* 0-9 */
+ _sch_islower = 0x0008, /* a-z */
+ _sch_isprint = 0x0010, /* any printing character including ' ' */
+ _sch_ispunct = 0x0020, /* all punctuation */
+ _sch_isspace = 0x0040, /* space \t \n \r \f \v */
+ _sch_isupper = 0x0080, /* A-Z */
+ _sch_isxdigit = 0x0100, /* 0-9A-Fa-f */
+
+ /* Extra categories useful to cpplib. */
+ _sch_isidst = 0x0200, /* A-Za-z_ */
+ _sch_isvsp = 0x0400, /* \n \r */
+ _sch_isnvsp = 0x0800, /* space \t \f \v \0 */
+
+ /* Combinations of the above. */
+ _sch_isalpha = _sch_isupper|_sch_islower, /* A-Za-z */
+ _sch_isalnum = _sch_isalpha|_sch_isdigit, /* A-Za-z0-9 */
+ _sch_isidnum = _sch_isidst|_sch_isdigit, /* A-Za-z0-9_ */
+ _sch_isgraph = _sch_isalnum|_sch_ispunct, /* isprint and not space */
+ _sch_iscppsp = _sch_isvsp|_sch_isnvsp, /* isspace + \0 */
+ _sch_isbasic = _sch_isprint|_sch_iscppsp /* basic charset of ISO C
+ (plus ` and @) */
+};
+
+/* Character classification. */
+extern const unsigned short _sch_istable[256];
+
+#define _sch_test(c, bit) (_sch_istable[(c) & 0xff] & (unsigned short)(bit))
+
+#define ISALPHA(c) _sch_test(c, _sch_isalpha)
+#define ISALNUM(c) _sch_test(c, _sch_isalnum)
+#define ISBLANK(c) _sch_test(c, _sch_isblank)
+#define ISCNTRL(c) _sch_test(c, _sch_iscntrl)
+#define ISDIGIT(c) _sch_test(c, _sch_isdigit)
+#define ISGRAPH(c) _sch_test(c, _sch_isgraph)
+#define ISLOWER(c) _sch_test(c, _sch_islower)
+#define ISPRINT(c) _sch_test(c, _sch_isprint)
+#define ISPUNCT(c) _sch_test(c, _sch_ispunct)
+#define ISSPACE(c) _sch_test(c, _sch_isspace)
+#define ISUPPER(c) _sch_test(c, _sch_isupper)
+#define ISXDIGIT(c) _sch_test(c, _sch_isxdigit)
+
+#define ISIDNUM(c) _sch_test(c, _sch_isidnum)
+#define ISIDST(c) _sch_test(c, _sch_isidst)
+#define IS_ISOBASIC(c) _sch_test(c, _sch_isbasic)
+#define IS_VSPACE(c) _sch_test(c, _sch_isvsp)
+#define IS_NVSPACE(c) _sch_test(c, _sch_isnvsp)
+#define IS_SPACE_OR_NUL(c) _sch_test(c, _sch_iscppsp)
+
+/* Character transformation. */
+extern const unsigned char _sch_toupper[256];
+extern const unsigned char _sch_tolower[256];
+#define TOUPPER(c) _sch_toupper[(c) & 0xff]
+#define TOLOWER(c) _sch_tolower[(c) & 0xff]
+
+#endif /* SAFE_CTYPE_H */
--- /dev/null
+Makefile
+Makefile.in
+.deps
--- /dev/null
+#
+# $Id$
+#
+# Copyright (C) 2002 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Marcel Telka <marcel@telka.sk>, 2002.
+#
+
+include $(top_srcdir)/Makefile.rules
+
+noinst_LIBRARIES = libpart.a
+
+libpart_a_SOURCES = \
+ signal.c \
+ instruction.c \
+ data_register.c \
+ bsbit.c \
+ part.c
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2002 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2002.
+ *
+ */
+
+#include <stdlib.h>
+#include <string.h>
+
+#include "bsbit.h"
+
+bsbit_t *
+bsbit_alloc( int bit, const char *name, int type, signal_t *signal, int safe )
+{
+ bsbit_t *b = malloc( sizeof *b );
+ if (!b)
+ return NULL;
+
+ b->name = strdup( name );
+ if (!b->name) {
+ free( b );
+ return NULL;
+ }
+
+ b->bit = bit;
+ b->type = type;
+ b->signal = NULL;
+ b->safe = safe;
+ b->control = -1;
+
+ if (signal != NULL) {
+ b->signal = signal;
+ switch (type) {
+ case BSBIT_INPUT:
+ signal->input = b;
+ break;
+ case BSBIT_OUTPUT:
+ signal->output = b;
+ break;
+ case BSBIT_BIDIR:
+ signal->input = b;
+ signal->output = b;
+ break;
+ }
+ }
+
+ return b;
+}
+
+void
+bsbit_free( bsbit_t *b )
+{
+ if (!b)
+ return;
+
+ free( b->name );
+ free( b );
+}
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2002 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2002.
+ *
+ */
+
+#include "sysdep.h"
+
+#include <stdlib.h>
+#include <string.h>
+#include <stdio.h>
+
+#include "data_register.h"
+
+data_register *
+data_register_alloc( const char *name, int len )
+{
+ data_register *dr;
+
+ if (!name)
+ return NULL;
+
+ dr = malloc( sizeof *dr );
+ if (!dr)
+ return NULL;
+
+ if (strlen( name ) > MAXLEN_DATA_REGISTER)
+ printf( _("Warning: Data register name too long\n") );
+ strncpy( dr->name, name, MAXLEN_DATA_REGISTER );
+ dr->name[MAXLEN_DATA_REGISTER] = '\0';
+
+ if (len>0)
+ {
+ dr->in = register_alloc( len );
+ dr->out = register_alloc( len );
+ }
+ else
+ {
+ dr->in = register_alloc( 1 );
+ dr->out = register_alloc( 1 );
+ }
+ if (!dr->in || !dr->out) {
+ free( dr->in );
+ free( dr->out );
+ free( dr->name );
+ free( dr );
+ return NULL;
+ }
+
+ dr->next = NULL;
+
+ return dr;
+}
+
+void
+data_register_free( data_register *dr )
+{
+ if (!dr)
+ return;
+
+ register_free( dr->in );
+ register_free( dr->out );
+ free( dr );
+}
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2002 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2002.
+ *
+ */
+
+#include "sysdep.h"
+
+#include <stdlib.h>
+#include <stdio.h>
+#include <string.h>
+
+#include "instruction.h"
+
+instruction *
+instruction_alloc( const char *name, int len, const char *val )
+{
+ instruction *i;
+
+ if (!name || !val)
+ return NULL;
+
+ i = malloc( sizeof *i );
+ if (!i)
+ return NULL;
+
+ if (strlen( name ) > MAXLEN_INSTRUCTION)
+ printf( _("Warning: Instruction name too long\n") );
+ strncpy( i->name, name, MAXLEN_INSTRUCTION );
+ i->name[MAXLEN_INSTRUCTION] = '\0';
+
+ i->value = register_alloc( len );
+ if (!i->value) {
+ free( i );
+ return NULL;
+ }
+ i->out = register_alloc( len );
+ if (!i->out) {
+ free( i->value );
+ free( i );
+ return NULL;
+ }
+
+ register_init( i->value, val );
+ i->data_register = NULL;
+ i->next = NULL;
+
+ return i;
+}
+
+void
+instruction_free( instruction *i )
+{
+ if (!i)
+ return;
+
+ if (i->value)
+ register_free( i->value );
+ if (i->out)
+ register_free( i->out );
+ free( i );
+}
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2002 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2002.
+ *
+ */
+
+#include "sysdep.h"
+
+#include <stdlib.h>
+#include <string.h>
+
+#include "part.h"
+
+/* part */
+
+part_t *
+part_alloc( const tap_register *id )
+{
+ part_t *p = malloc( sizeof *p );
+ if (!p)
+ return NULL;
+ p->alias = NULL; /* djf */
+ p->id = register_duplicate( id );
+ p->manufacturer[0] = '\0';
+ p->part[0] = '\0';
+ p->stepping[0] = '\0';
+ p->signals = NULL;
+ p->saliases = NULL;
+ p->instruction_length = 0;
+ p->instructions = NULL;
+ p->active_instruction = NULL;
+ p->data_registers = NULL;
+ p->boundary_length = 0;
+ p->bsbits = NULL;
+
+ return p;
+}
+
+void
+part_free( part_t *p )
+{
+ int i;
+
+ if (!p)
+ return;
+
+ /* id */
+ free( p->id );
+
+ if(p->alias)free(p->alias); /* djf */
+
+ /* signals */
+ while (p->signals) {
+ signal_t *s = p->signals;
+ p->signals = s->next;
+ signal_free( s );
+ }
+
+ /* saliases */
+ while (p->saliases) {
+ salias_t *sa = p->saliases;
+ p->saliases = sa->next;
+ salias_free( sa );
+ }
+
+ /* instructions */
+ while (p->instructions) {
+ instruction *i = p->instructions;
+ p->instructions = i->next;
+ instruction_free( i );
+ }
+
+ /* data registers */
+ while (p->data_registers) {
+ data_register *dr = p->data_registers;
+ p->data_registers = dr->next;
+ data_register_free( dr );
+ }
+
+ /* bsbits */
+ for (i = 0; i < p->boundary_length; i++)
+ bsbit_free( p->bsbits[i] );
+ free( p->bsbits );
+
+ free( p );
+}
+
+instruction *
+part_find_instruction( part_t *p, const char *iname )
+{
+ instruction *i;
+
+ if (!p || !iname)
+ return NULL;
+
+ i = p->instructions;
+ while (i) {
+ if (strcasecmp( iname, i->name ) == 0)
+ break;
+ i = i->next;
+ }
+
+ return i;
+}
+
+data_register *
+part_find_data_register( part_t *p, const char *drname )
+{
+ data_register *dr;
+
+ if (!p || !drname)
+ return NULL;
+
+ dr = p->data_registers;
+ while (dr) {
+ if (strcasecmp( drname, dr->name ) == 0)
+ break;
+ dr = dr->next;
+ }
+
+ return dr;
+}
+
+signal_t *
+part_find_signal( part_t *p, const char *signalname )
+{
+ signal_t *s;
+ salias_t *sa;
+
+ if (!p || !signalname)
+ return NULL;
+
+ s = p->signals;
+ while (s) {
+ if (strcasecmp( signalname, s->name ) == 0)
+ return s;
+ s = s->next;
+ }
+
+ sa = p->saliases;
+ while (sa) {
+ if (strcasecmp( signalname, sa->name ) == 0)
+ return sa->signal;
+ sa = sa->next;
+ }
+
+ return NULL;
+}
+
+void
+part_set_instruction( part_t *p, const char *iname )
+{
+ if (p)
+ p->active_instruction = part_find_instruction( p, iname );
+}
+
+void
+part_set_signal( part_t *p, signal_t *s, int out, int val )
+{
+ data_register *bsr;
+
+ if (!p || !s)
+ return;
+
+ /* search for Boundary Scan Register */
+ bsr = part_find_data_register( p, "BSR" );
+ if (!bsr) {
+ printf( _("%s(%s:%d) Boundary Scan Register (BSR) not found\n"), __FUNCTION__, __FILE__, __LINE__ );
+ return;
+ }
+
+ /* setup signal */
+ if (out) {
+ int control;
+ if (!s->output) {
+ printf( _("signal '%s' cannot be set as output\n"), s->name );
+ return;
+ }
+ bsr->in->data[s->output->bit] = val & 1;
+
+ control = p->bsbits[s->output->bit]->control;
+ if (control >= 0)
+ bsr->in->data[control] = p->bsbits[s->output->bit]->control_value ^ 1;
+ } else {
+ if (!s->input) {
+ printf( _("signal '%s' cannot be set as input\n"), s->name );
+ return;
+ }
+ if (s->output)
+ bsr->in->data[s->output->control] = p->bsbits[s->output->bit]->control_value;
+ }
+}
+
+int
+part_get_signal( part_t *p, signal_t *s )
+{
+ data_register *bsr;
+
+ if (!p || !s)
+ return -1;
+
+ /* search for Boundary Scan Register */
+ bsr = part_find_data_register( p, "BSR" );
+ if (!bsr) {
+ printf( _("%s(%s:%d) Boundary Scan Register (BSR) not found\n"), __FUNCTION__, __FILE__, __LINE__ );
+ return -1;
+ }
+
+ if (!s->input) {
+ printf( _("signal '%s' is not input signal\n"), s->name );
+ return -1;
+ }
+
+ return bsr->out->data[s->input->bit];
+}
+
+void
+part_print( part_t *p )
+{
+ const char *instruction = NULL;
+ const char *dr = NULL;
+ char format[100];
+
+ if (!p)
+ return;
+
+ snprintf( format, 100, _("%%-%ds %%-%ds %%-%ds %%-%ds %%-%ds\n"), MAXLEN_MANUFACTURER, MAXLEN_PART, MAXLEN_STEPPING,
+ MAXLEN_INSTRUCTION, MAXLEN_DATA_REGISTER );
+
+ if (p->active_instruction) {
+ instruction = p->active_instruction->name;
+ if (p->active_instruction->data_register != NULL)
+ dr = p->active_instruction->data_register->name;
+ }
+ if (instruction == NULL)
+ instruction = _("(none)");
+ if (dr == NULL)
+ dr = _("(none)");
+ printf( format, p->manufacturer, p->part, p->stepping, instruction, dr );
+}
+
+/* parts */
+
+parts_t *
+parts_alloc( void )
+{
+ parts_t *ps = malloc( sizeof *ps );
+ if (!ps)
+ return NULL;
+
+ ps->len = 0;
+ ps->parts = NULL;
+
+ return ps;
+}
+
+void
+parts_free( parts_t *ps )
+{
+ int i;
+
+ if (!ps)
+ return;
+
+ for (i = 0; i < ps->len; i++)
+ part_free(ps->parts[i]);
+
+ free( ps->parts );
+ free( ps );
+}
+
+int
+parts_add_part( parts_t *ps, part_t *p )
+{
+ part_t **np = realloc( ps->parts, (ps->len + 1) * sizeof *ps->parts );
+
+ if (!np)
+ return 0;
+
+ ps->parts = np;
+ ps->parts[ps->len++] = p;
+
+ return 1;
+}
+
+void
+parts_set_instruction( parts_t *ps, const char *iname )
+{
+ int i;
+
+ if (!ps)
+ return;
+
+ for (i = 0; i < ps->len; i++)
+ ps->parts[i]->active_instruction = part_find_instruction( ps->parts[i], iname );
+}
+
+void
+parts_print( parts_t *ps )
+{
+ int i;
+
+ if (!ps)
+ return;
+
+ for (i = 0; i < ps->len; i++) {
+ part_t *p = ps->parts[i];
+
+ if (!p)
+ continue;
+
+ printf( _(" %3d "), i );
+ part_print( p );
+ }
+}
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2002 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2002.
+ *
+ */
+
+#include <stdlib.h>
+#include <string.h>
+
+#include "bssignal.h"
+
+signal_t *
+signal_alloc( const char *name )
+{
+ signal_t *s = malloc( sizeof *s );
+ if (!s)
+ return NULL;
+
+ s->name = strdup( name );
+ if (!s->name) {
+ free( s );
+ return NULL;
+ }
+ s->pin = NULL; /* djf hack pin number */
+ s->next = NULL;
+ s->input = NULL;
+ s->output = NULL;
+
+ return s;
+}
+
+void
+signal_free( signal_t *s )
+{
+ if (!s)
+ return;
+ free( s->name );
+ free( s );
+}
+
+salias_t *
+salias_alloc( const char *name, const signal_t *signal )
+{
+ salias_t *sa = malloc( sizeof *sa );
+ if (sa == NULL)
+ return NULL;
+
+ sa->name = strdup( name );
+ if (sa->name == NULL) {
+ free( sa );
+ return NULL;
+ }
+ sa->next = NULL;
+ sa->signal = (signal_t *)signal;
+
+ return sa;
+}
+
+void salias_free( salias_t *salias )
+{
+ if (salias == NULL)
+ return;
+ free( salias->name );
+ free( salias );
+}
--- /dev/null
+#
+# $Id$
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by A. Laeuger <arniml@sourceforge.net>, 2007.
+#
+
+include $(top_srcdir)/Makefile.rules
+
+AM_YFLAGS = -d
+
+noinst_LIBRARIES = libsvf.a
+
+libsvf_a_SOURCES = \
+ svf_bison.y \
+ svf_flex.l \
+ svf.h \
+ svf.c
+
+svf_flex.$(OBJEXT) svf.$(OBJEXT): svf_bison.$(OBJEXT)
+
+svf_bison.h: svf_bison.c
+
+MAINTAINERCLEANFILES = \
+ svf_bison.c \
+ svf_bison.h \
+ svf_flex.c
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2004, Arnim Laeuger
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Arnim Laeuger <arniml@users.sourceforge.net>, 2004.
+ *
+ * See "Serial Vector Format Specification", Revision E, 1999
+ * ASSET InterTech, Inc.
+ * http://www.asset-intertech.com/support/svf.pdf
+ *
+ */
+
+
+#include <stdlib.h>
+#include <stdio.h>
+#include <string.h>
+#include <ctype.h>
+#include <math.h>
+#include <signal.h>
+#include <unistd.h>
+#include <sys/types.h>
+#ifndef SA_ONESHOT
+#define SA_ONESHOT SA_RESETHAND
+#endif
+
+#include "sysdep.h"
+
+#include <jtag.h>
+#include <tap.h>
+#include <state.h>
+
+#include <cmd.h>
+
+#include "svf.h"
+#include "svf_bison.h"
+
+#ifdef __MINGW32__
+#include "fclock.h"
+#endif
+
+
+/* define for debug messages */
+#undef DEBUG
+
+
+int svfparse(parser_priv_t *priv_data, chain_t *chain);
+
+
+/*
+ * svf_force_reset_state()
+ *
+ * Puts TAP controller into reset state by clocking 5 times with TMS = 1.
+ */
+static void
+svf_force_reset_state( chain_t *chain )
+{
+ chain_clock(chain, 1, 0, 5);
+ tap_state_reset(chain);
+}
+
+
+/*
+ * svf_goto_state(state)
+ *
+ * Moves from any TAP state to the specified state.
+ * The state traversal is done according to the SVF specification.
+ * See STATE of the Serial Vector Format Specification
+ *
+ * Encoding of state is according to the jtag suite's defines.
+ *
+ * Parameter:
+ * state : new TAP controller state
+ */
+static void
+svf_goto_state( chain_t *chain, int new_state)
+{
+ int current_state;
+
+ current_state = tap_state(chain);
+
+ /* handle unknown state */
+ if (new_state == Unknown_State)
+ new_state = Test_Logic_Reset;
+
+ /* abort if new_state already reached */
+ if (current_state == new_state)
+ return;
+
+ switch (current_state) {
+ case Test_Logic_Reset:
+ chain_clock(chain, 0, 0, 1);
+ break;
+
+ case Run_Test_Idle:
+ chain_clock(chain, 1, 0, 1);
+ break;
+
+ case Select_DR_Scan:
+ case Select_IR_Scan:
+ if (new_state == Test_Logic_Reset ||
+ new_state == Run_Test_Idle ||
+ (current_state & TAPSTAT_DR && new_state & TAPSTAT_IR) ||
+ (current_state & TAPSTAT_IR && new_state & TAPSTAT_DR))
+ /* progress in select-idle/reset loop */
+ chain_clock(chain, 1, 0, 1);
+ else
+ /* enter DR/IR branch */
+ chain_clock(chain, 0, 0, 1);
+ break;
+
+ case Capture_DR:
+ if (new_state == Shift_DR)
+ /* enter Shift_DR state */
+ chain_clock(chain, 0, 0, 1);
+ else
+ /* bypass Shift_DR */
+ chain_clock(chain, 1, 0, 1);
+ break;
+
+ case Capture_IR:
+ if (new_state == Shift_IR)
+ /* enter Shift_IR state */
+ chain_clock(chain, 0, 0, 1);
+ else
+ /* bypass Shift_IR */
+ chain_clock(chain, 1, 0, 1);
+ break;
+
+ case Shift_DR:
+ case Shift_IR:
+ /* progress to Exit1_DR/IR */
+ chain_clock(chain, 1, 0, 1);
+ break;
+
+ case Exit1_DR:
+ if (new_state == Pause_DR)
+ /* enter Pause_DR state */
+ chain_clock(chain, 0, 0, 1);
+ else
+ /* bypass Pause_DR */
+ chain_clock(chain, 1, 0, 1);
+ break;
+
+ case Exit1_IR:
+ if (new_state == Pause_IR)
+ /* enter Pause_IR state */
+ chain_clock(chain, 0, 0, 1);
+ else
+ /* bypass Pause_IR */
+ chain_clock(chain, 1, 0, 1);
+ break;
+
+ case Pause_DR:
+ case Pause_IR:
+ /* progress to Exit2_DR/IR */
+ chain_clock(chain, 1, 0, 1);
+ break;
+
+ case Exit2_DR:
+ if (new_state == Shift_DR)
+ /* enter Shift_DR state */
+ chain_clock(chain, 0, 0, 1);
+ else
+ /* progress to Update_DR */
+ chain_clock(chain, 1, 0, 1);
+ break;
+
+ case Exit2_IR:
+ if (new_state == Shift_IR)
+ /* enter Shift_IR state */
+ chain_clock(chain, 0, 0, 1);
+ else
+ /* progress to Update_IR */
+ chain_clock(chain, 1, 0, 1);
+ break;
+
+ case Update_DR:
+ case Update_IR:
+ if (new_state == Run_Test_Idle)
+ /* enter Run_Test_Idle */
+ chain_clock(chain, 0, 0, 1);
+ else
+ /* progress to Select_DR/IR */
+ chain_clock(chain, 1, 0, 1);
+ break;
+
+ default:
+ svf_force_reset_state(chain);
+ break;
+ }
+
+ /* continue state changes */
+ svf_goto_state(chain, new_state);
+}
+
+
+/*
+ * svf_map_state(state)
+ *
+ * Maps the state encoding of the SVF parser to the
+ * state encoding of the jtag suite.
+ *
+ * Parameter:
+ * state : state encoded by/for SVF parser
+ *
+ * Return value:
+ * state encoded for jtag tools
+ */
+static int
+svf_map_state(int state)
+{
+ int jtag_state;
+
+ switch (state) {
+ case RESET:
+ jtag_state = Test_Logic_Reset;
+ break;
+ case IDLE:
+ jtag_state = Run_Test_Idle;
+ break;
+ case DRSELECT:
+ jtag_state = Select_DR_Scan;
+ break;
+ case DRCAPTURE:
+ jtag_state = Capture_DR;
+ break;
+ case DRSHIFT:
+ jtag_state = Shift_DR;
+ break;
+ case DREXIT1:
+ jtag_state = Exit1_DR;
+ break;
+ case DRPAUSE:
+ jtag_state = Pause_DR;
+ break;
+ case DREXIT2:
+ jtag_state = Exit2_DR;
+ break;
+ case DRUPDATE:
+ jtag_state = Update_DR;
+ break;
+
+ case IRSELECT:
+ jtag_state = Select_IR_Scan;
+ break;
+ case IRCAPTURE:
+ jtag_state = Capture_IR;
+ break;
+ case IRSHIFT:
+ jtag_state = Shift_IR;
+ break;
+ case IREXIT1:
+ jtag_state = Exit1_IR;
+ break;
+ case IRPAUSE:
+ jtag_state = Pause_IR;
+ break;
+ case IREXIT2:
+ jtag_state = Exit2_IR;
+ break;
+ case IRUPDATE:
+ jtag_state = Update_IR;
+ break;
+
+ default:
+ jtag_state = Unknown_State;
+ break;
+ }
+
+ return(jtag_state);
+}
+
+
+/*
+ * svf_hex2dec(nibble)
+ *
+ * Converts a hexadecimal nibble (4 bits) to its decimal value.
+ *
+ * Parameter:
+ * nibble : hexadecimal character
+ *
+ * Return value:
+ * decimal value of nibble or 0 if nibble is not a hexadecimal character
+ */
+static int
+svf_hex2dec(char nibble)
+{
+ int lower;
+
+ if (nibble >= '0' && nibble <= '9')
+ return((int)(nibble - '0'));
+
+ lower = tolower((int)nibble);
+ if (lower >= 'a' && lower <= 'f')
+ return(lower - (int)'a' + 10);
+
+ return(0);
+}
+
+
+/*
+ * svf_build_bit_string(hex_string, len)
+ *
+ * Converts the hexadecimal string hex_string into a string of single bits
+ * with len elements (bits).
+ * If hex_string contains less nibbles than fit into len bits, the resulting
+ * bit string is padded with 0 bits.
+ *
+ * Note:
+ * The memory for the resulting bit string is calloc'ed and must be
+ * free'd when the bit string is not used anymore.
+ *
+ * Example:
+ * hex string : 1a
+ * len : 16
+ * bit string : 0000000000011010
+ *
+ * Parameter:
+ * hex_string : hex string to be converted
+ * len : number of bits in resulting bit string
+ *
+ * Return value:
+ * pointer to new bit string
+ * NULL upon error
+ */
+static char *
+svf_build_bit_string(char *hex_string, int len)
+{
+ char *bit_string, *bit_string_pos;
+ int nibble;
+ char *hex_string_pos;
+ int hex_string_idx;
+
+ if (!(bit_string = (char *)calloc(len + 1, sizeof(char)))) {
+ printf( _("out of memory") );
+ return(NULL);
+ }
+
+ /* copy reduced hexadecimal string to full bit string */
+ hex_string_idx = strlen(hex_string);
+ hex_string_pos = &(hex_string[hex_string_idx]);
+ nibble = 3;
+ bit_string_pos = &(bit_string[len]);
+ do {
+ bit_string_pos--;
+ if (nibble == 3) {
+ nibble = 0;
+ hex_string_pos--;
+ hex_string_idx--;
+ } else
+ nibble++;
+
+ *bit_string_pos = svf_hex2dec(hex_string_idx >= 0 ? *hex_string_pos : '0') & (1 << nibble) ? '1' : '0';
+ } while (bit_string_pos != bit_string);
+
+ bit_string[len] = '\0';
+
+ return(bit_string);
+}
+
+
+/*
+ * svf_copy_hex_to_register(hex_string, reg, len)
+ *
+ * Copies the contents of the hexadecimal string hex_string into the given
+ * tap register.
+ *
+ * Parameter:
+ * hex_string : hex string to be entered in reg
+ * reg : tap register to hold the converted hex string
+ *
+ * Return value:
+ * 1 : all ok
+ * 0 : error occurred
+ */
+static int
+svf_copy_hex_to_register(char *hex_string, tap_register *reg)
+{
+ char *bit_string;
+
+ if (!(bit_string = svf_build_bit_string(hex_string, reg->len)))
+ return(0);
+
+ register_init(reg, bit_string);
+
+ /* free memory as we do not need the intermediate bit_string anymore */
+ free(bit_string);
+
+ return(1);
+}
+
+
+/*
+ * svf_compare_tdo(tdo, mask, reg)
+ *
+ * Compares the captured device output in tap register reg with the expected
+ * hex_string tdo (specified in SVF command SDR/SDI.
+ *
+ * Comparison honours the "care" bits in mask ('1') while matching the contents
+ * of reg with tdo.
+ *
+ * Parameter:
+ * tdo : reference hex string
+ * mask : hex string for masking tdo
+ * reg : hex string to be compared vs. tdo
+ *
+ * Return value:
+ * 1 : tdo matches reg at all positions where mask is '1'
+ * 0 : tdo and reg do not match or error occurred
+ */
+static int
+svf_compare_tdo(parser_priv_t *priv, char *tdo, char *mask, tap_register *reg, YYLTYPE *loc)
+{
+ char *tdo_bit, *mask_bit;
+ int pos, mismatch, result = 1;
+
+ if (!(tdo_bit = svf_build_bit_string(tdo, reg->len)))
+ return(0);
+ if (!(mask_bit = svf_build_bit_string(mask, reg->len))) {
+ free(tdo_bit);
+ return(0);
+ }
+
+ /* retrieve string representation */
+ register_get_string(reg);
+
+ mismatch = -1;
+ for (pos = 0; pos < reg->len; pos++)
+ if ((tdo_bit[pos] != reg->string[pos]) && (mask_bit[pos] == '1'))
+ mismatch = pos;
+
+ if (mismatch >= 0) {
+ printf( _("Error %s: mismatch at position %d for TDO\n"), "svf", mismatch);
+ if (loc != NULL) {
+ printf( " in input file between line %d col %d and line %d col %d\n",
+ loc->first_line+1,
+ loc->first_column+1,
+ loc->last_line+1,
+ loc->last_column+1 );
+ }
+
+#ifdef DEBUG
+ printf( "Expected : %s\n", tdo_bit );
+ printf( "Mask : %s\n", mask_bit );
+ printf( "TDO data : %s\n", reg->string );
+#endif
+
+ if (priv->svf_stop_on_mismatch)
+ result = 0;
+ }
+
+ free(mask_bit);
+ free(tdo_bit);
+
+ return(result);
+}
+
+
+/*
+ * svf_remember_param(rem, new)
+ *
+ * Assigns the contents of the string new to the string rem.
+ * By doing so, the responsability to free the memory occupied by new
+ * is transferred to the code that handles *rem.
+ * Nothing happens when new is NULL. In this case the current value of
+ * rem has to be "remembered".
+ *
+ * Parameter:
+ * rem : hex string pointer pointing to the "remembered" string
+ * new : hex string that has to be rememberd
+ * memory of the string is free'd
+ */
+static void
+svf_remember_param(char **rem, char *new)
+{
+ if (new) {
+ if (*rem)
+ free(*rem);
+
+ *rem = new;
+ }
+}
+
+
+/*
+ * svf_all_care(string, number)
+ *
+ * Allocates a hex string of given length (number gives number of bits)
+ * and sets it to all 'F'.
+ * The allocated memory of the string has to be free'd by the caller.
+ *
+ * Parameter:
+ * string : is updated with the pointer to the allocated hex string
+ * number : number of required bits
+ *
+ * Return value:
+ * 1 : all ok
+ * 0 : error occurred
+ */
+static int
+svf_all_care(char **string, double number)
+{
+ char *ptr;
+ int num, result;
+
+ result = 1;
+
+ num = (int)number;
+ num = num % 4 == 0 ? num / 4 : num / 4 + 1;
+
+ /* build string with all cares */
+ if (!(ptr = (char *)calloc(num + 1, sizeof(char)))) {
+ printf( _("out of memory") );
+ return(0);
+ }
+ memset(ptr, 'F', num);
+ ptr[num] = '\0';
+
+ svf_remember_param(string, ptr);
+ /* responsability for free'ing ptr is now at the code that
+ operates on *string */
+
+ return(result);
+}
+
+
+/* ***************************************************************************
+ * svf_endxr(ir_dr, state)
+ *
+ * Register end states for shifting IR and DR.
+ *
+ * Parameter:
+ * ir_dr : selects ENDIR or ENDDR
+ * state : required end state (SVF parser encoding)
+ * ***************************************************************************/
+void
+svf_endxr(parser_priv_t *priv, enum generic_irdr_coding ir_dr, int state)
+{
+ switch (ir_dr) {
+ case generic_ir:
+ priv->endir = svf_map_state(state);
+ break;
+ case generic_dr:
+ priv->enddr = svf_map_state(state);
+ break;
+ }
+}
+
+
+/* ***************************************************************************
+ * svf_frequency(chain, freq)
+ *
+ * Implements the FREQUENCY command.
+ *
+ * Parameter:
+ * freq : frequency in HZ
+ * ***************************************************************************/
+void
+svf_frequency(chain_t *chain, double freq)
+{
+ cable_set_frequency(chain->cable, freq);
+}
+
+
+/* ***************************************************************************
+ * svf_hxr(ir_dr, params)
+ *
+ * Handles HIR, HDR.
+ *
+ * Note:
+ * Functionality not implemented.
+ *
+ * Parameter:
+ * ir_dr : selects HIR or HDR
+ * params : paramter set for TXR, HXR and SXR
+ *
+ * Return value:
+ * 1 : all ok
+ * 0 : error occurred
+ * ***************************************************************************/
+int
+svf_hxr(enum generic_irdr_coding ir_dr, struct ths_params *params)
+{
+ if (params->number != 0.0)
+ printf( _("Warning %s: command %s not implemented\n"), "svf",
+ ir_dr == generic_ir ? "HIR" : "HDR");
+
+ return(1);
+}
+
+
+static int max_time_reached;
+static void sigalrm_handler(int signal)
+{
+ max_time_reached = 1;
+}
+
+
+/* ***************************************************************************
+ * svf_runtest(params)
+ *
+ * Implements the RUNTEST command.
+ *
+ * Parameter:
+ * params : paramter set for RUNTEST
+ *
+ * Return value:
+ * 1 : all ok
+ * 0 : error occurred
+ * ***************************************************************************/
+int
+svf_runtest(chain_t *chain, parser_priv_t *priv, struct runtest *params)
+{
+ uint32_t run_count, frequency;
+
+ /* check for restrictions */
+ if (params->run_count > 0 && params->run_clk != TCK) {
+ printf( _("Error %s: only TCK is supported for RUNTEST.\n"), "svf");
+ return(0);
+ }
+ if (params->max_time > 0.0 && params->max_time < params->min_time) {
+ printf( _("Error %s: maximum time must be larger or equal to minimum time.\n"),
+ "svf");
+ return(0);
+ }
+ if (params->max_time > 0.0)
+ if (!priv->issued_runtest_maxtime) {
+ printf( _("Warning %s: maximum time for RUNTEST not guaranteed.\n"), "svf");
+ printf( _(" This message is only displayed once.\n"));
+ priv->issued_runtest_maxtime = 1;
+ }
+
+ /* update default values for run_state and end_state */
+ if (params->run_state != 0) {
+ priv->runtest_run_state = svf_map_state(params->run_state);
+
+ if (params->end_state == 0)
+ priv->runtest_end_state = svf_map_state(params->run_state);
+ }
+ if (params->end_state != 0)
+ priv->runtest_end_state = svf_map_state(params->end_state);
+
+ /* compute run_count */
+ run_count = params->run_count;
+ if (params->min_time > 0.0) {
+ frequency = priv->ref_freq > 0 ? priv->ref_freq : cable_get_frequency(chain->cable);
+ if (frequency > 0) {
+ uint32_t min_time_run_count = ceil(params->min_time * frequency);
+ if (min_time_run_count > run_count) {
+ run_count = min_time_run_count;
+ }
+ } else {
+ printf( _("Error %s: Maximum cable clock frequency required for RUNTEST.\n"), "svf" );
+ printf( _(" Set the cable frequency with 'FREQUENCY <Hz>'.\n") );
+ return 0;
+ }
+ }
+
+ svf_goto_state(chain, priv->runtest_run_state);
+
+#ifdef __MINGW32__
+ if (params->max_time > 0.0) {
+ double maxt = frealtime() + params->max_time;
+
+ while (run_count-- > 0 && frealtime() < maxt) {
+ chain_clock(chain, 0, 0, 1);
+ }
+ }
+ else
+ chain_clock(chain, 0, 0, run_count);
+
+ svf_goto_state(chain, priv->runtest_end_state);
+
+#else
+ /* set up the timer for max_time */
+ if (params->max_time > 0.0) {
+ struct sigaction sa;
+ unsigned max_time;
+
+ sa.sa_handler = sigalrm_handler;
+ sa.sa_flags = SA_ONESHOT;
+ sigemptyset(&sa.sa_mask);
+ if (sigaction(SIGALRM, &sa, NULL) != 0) {
+ perror("sigaction");
+ exit(EXIT_FAILURE);
+ }
+
+ max_time = floor(params->max_time / 1000000);
+ if (max_time == 0) {
+ max_time = 1;
+ }
+ ualarm(max_time, 0);
+ }
+
+ if (params->max_time > 0.0)
+ while (run_count-- > 0 && !max_time_reached) {
+ chain_clock(chain, 0, 0, 1);
+ }
+ else
+ chain_clock(chain, 0, 0, run_count);
+
+ svf_goto_state(chain, priv->runtest_end_state);
+
+ /* stop the timer */
+ if (params->max_time > 0.0) {
+ struct sigaction sa;
+ sa.sa_handler = SIG_IGN;
+ sa.sa_flags = 0;
+ sigemptyset(&sa.sa_mask);
+ if (sigaction(SIGALRM, &sa, NULL) != 0) {
+ perror("sigaction");
+ exit(EXIT_FAILURE);
+ }
+ }
+#endif
+
+ return(1);
+}
+
+
+/* ***************************************************************************
+ * svf_state(path_states, stable_state)
+ *
+ * Implements the STATE command.
+ *
+ * Parameter:
+ * path_states : states to traverse before reaching stable_state
+ * (SVF parser encoding)
+ * stable_state : final stable state
+ * (SVF parser encoding)
+ *
+ * Return value:
+ * 1 : all ok
+ * 0 : error occurred
+ * ***************************************************************************/
+int
+svf_state(chain_t *chain, parser_priv_t *priv, struct path_states *path_states,
+ int stable_state)
+{
+ int i;
+
+ priv->svf_state_executed = 1;
+
+ for (i = 0; i < path_states->num_states; i++)
+ svf_goto_state(chain, svf_map_state(path_states->states[i]));
+
+ if (stable_state)
+ svf_goto_state(chain, svf_map_state(stable_state));
+
+ return(1);
+}
+
+
+/* ***************************************************************************
+ * svf_sxr(ir_dr, params)
+ *
+ * Implements the SIR and SDR commands.
+ *
+ * Parameter:
+ * ir_dr : selects SIR or SDR
+ * params : paramter set for TXR, HXR and SXR
+ *
+ * Return value:
+ * 1 : all ok
+ * 0 : error occurred
+ * ***************************************************************************/
+int
+svf_sxr(chain_t *chain, parser_priv_t *priv, enum generic_irdr_coding ir_dr,
+ struct ths_params *params, YYLTYPE *loc)
+{
+ sxr_t *sxr_params;
+ int len, result = 1;
+
+ sxr_params = ir_dr == generic_ir ? &(priv->sir_params) : &(priv->sdr_params);
+
+ /* remember parameters */
+ svf_remember_param(&sxr_params->params.tdi, params->tdi);
+
+ sxr_params->params.tdo = params->tdo; /* tdo is not "remembered" */
+
+ svf_remember_param(&sxr_params->params.mask, params->mask);
+
+ svf_remember_param(&sxr_params->params.smask, params->smask);
+
+
+ /* handle length change for MASK and SMASK */
+ if (sxr_params->params.number != params->number) {
+ sxr_params->no_tdi = 1;
+ sxr_params->no_tdo = 1;
+
+ if (!params->mask)
+ if (!svf_all_care(&sxr_params->params.mask, params->number))
+ result = 0;
+ if (!params->smask)
+ if (!svf_all_care(&sxr_params->params.smask, params->number))
+ result = 0;
+ }
+
+ sxr_params->params.number = params->number;
+
+ /* check consistency */
+ if (sxr_params->no_tdi) {
+ if (!params->tdi) {
+ printf( _("Error %s: first %s command after length change must have a TDI value.\n"), "svf",
+ ir_dr == generic_ir ? "SIR" : "SDR");
+ result = 0;
+ }
+ sxr_params->no_tdi = 0;
+ }
+
+ /* take over responsability for free'ing parameter strings */
+ params->tdi = NULL;
+ params->mask = NULL;
+ params->smask = NULL;
+
+ /* result of consistency check */
+ if (!result)
+ return(0);
+
+
+ /*
+ * handle tap registers
+ */
+ len = (int)sxr_params->params.number;
+ switch (ir_dr) {
+ case generic_ir:
+ /* is SIR large enough? */
+ if (priv->ir->value->len != len) {
+ printf( _("Error %s: SIR command length inconsistent.\n"),
+ "svf");
+ if (loc != NULL) {
+ printf( " in input file between line %d col %d and line %d col %d\n",
+ loc->first_line+1,
+ loc->first_column+1,
+ loc->last_line+1,
+ loc->last_column+1 );
+ }
+ return(0);
+ }
+ break;
+
+ case generic_dr:
+ /* check data register SDR */
+ if (priv->dr->in->len != len) {
+ /* length does not match, so install proper registers */
+ register_free(priv->dr->in);
+ priv->dr->in = NULL;
+ register_free(priv->dr->out);
+ priv->dr->out = NULL;
+
+ if (!(priv->dr->in = register_alloc(len))) {
+ printf( _("out of memory") );
+ return(0);
+ }
+ if (!(priv->dr->out = register_alloc(len))) {
+ printf( _("out of memory") );
+ return(0);
+ }
+ }
+ break;
+
+ }
+
+ /* fill register with value of TDI parameter */
+ if (!svf_copy_hex_to_register(sxr_params->params.tdi,
+ ir_dr == generic_ir ? priv->ir->value :
+ priv->dr->in))
+ return(0);
+
+
+ /* shift selected instruction/register */
+ switch (ir_dr) {
+ case generic_ir:
+ svf_goto_state(chain, Shift_IR);
+ chain_shift_instructions_mode(chain,
+ sxr_params->params.tdo ? 1 : 0,
+ 0,
+ EXITMODE_EXIT1);
+ svf_goto_state(chain, priv->endir);
+
+ if (sxr_params->params.tdo)
+ result = svf_compare_tdo(priv, sxr_params->params.tdo, sxr_params->params.mask, priv->ir->out, loc);
+ break;
+
+ case generic_dr:
+ svf_goto_state(chain, Shift_DR);
+ chain_shift_data_registers_mode(chain,
+ sxr_params->params.tdo ? 1 : 0,
+ 0,
+ EXITMODE_EXIT1);
+ svf_goto_state(chain, priv->enddr);
+
+ if (sxr_params->params.tdo)
+ result = svf_compare_tdo(priv, sxr_params->params.tdo, sxr_params->params.mask, priv->dr->out, loc);
+ break;
+ }
+
+ /* log mismatches */
+ if (result == 0)
+ priv->mismatch_occurred = 1;
+
+ return(result);
+}
+
+
+
+/* ***************************************************************************
+ * svf_trst(int trst_mode)
+ *
+ * Sets TRST pin according to trst_mode.
+ * TRST modes are encoded via defines in svf.h.
+ *
+ * Note:
+ * The modes Z and ABSENT are not supported.
+ *
+ * Parameter:
+ * trst_mode : selected mode for TRST
+ *
+ * Return value:
+ * 1 : all ok
+ * 0 : error occurred
+ * ***************************************************************************/
+int
+svf_trst(chain_t *chain, parser_priv_t *priv, int trst_mode)
+{
+ int trst_cable = -1;
+ char *unimplemented_mode;
+
+ if (priv->svf_trst_absent) {
+ printf( _("Error %s: no further TRST command allowed after mode ABSENT\n"),
+ "svf");
+ return(0);
+ }
+
+ switch (trst_mode) {
+ case ON:
+ trst_cable = 0;
+ break;
+ case OFF:
+ trst_cable = 1;
+ break;
+ case Z:
+ unimplemented_mode = "Z";
+ break;
+ case ABSENT:
+ unimplemented_mode = "ABSENT";
+ priv->svf_trst_absent = 1;
+
+ if (priv->svf_state_executed) {
+ printf( _("Error %s: TRST ABSENT must not be issued after a STATE command\n"),
+ "svf");
+ return(0);
+ }
+ if (priv->sir_params.params.number > 0.0 ||
+ priv->sdr_params.params.number > 0.0) {
+ printf( _("Error %s: TRST ABSENT must not be issued after an SIR or SDR command\n"),
+ "svf");
+ }
+ break;
+ default:
+ unimplemented_mode = "UNKNOWN";
+ break;
+ }
+
+ if (trst_cable < 0)
+ printf( _("Warning %s: unimplemented mode '%s' for TRST\n"), "svf",
+ unimplemented_mode);
+ else
+ cable_set_signal(chain->cable, CS_TRST, trst_cable ? CS_TRST : 0);
+
+ return(1);
+}
+
+
+/* ***************************************************************************
+ * svf_txr(ir_dr, params)
+ *
+ * Handles TIR, TDR.
+ *
+ * Note:
+ * Functionality not implemented.
+ *
+ * Parameter:
+ * ir_dr : selects TIR or TDR
+ * params : paramter set for TXR, HXR and SXR
+ *
+ * Return value:
+ * 1 : all ok
+ * 0 : error occurred
+ * ***************************************************************************/
+int
+svf_txr(enum generic_irdr_coding ir_dr, struct ths_params *params)
+{
+ if (params->number != 0.0)
+ printf( _("Warning %s: command %s not implemented\n"), "svf",
+ ir_dr == generic_ir ? "TIR" : "TDR");
+
+ return(1);
+}
+
+
+/* ***************************************************************************
+ * svf_run(chain, SVF_FILE, stop_on_mismatch, ref_freq)
+ *
+ * Main entry point for the 'svf' command. Calls the svf parser.
+ *
+ * Checks the jtag-environment (availability of SIR instruction and SDR
+ * register). Initializes all svf-global variables and performs clean-up
+ * afterwards.
+ *
+ * Parameter:
+ * chain : pointer to global chain
+ * SVF_FILE : file handle of SVF file
+ * stop_on_mismatch : 1 = stop upon tdo mismatch
+ * 0 = continue upon mismatch
+ * print_progress : 1 = continually print progress status
+ * 0 = don't print
+ * ref_freq : reference frequency for RUNTEST
+ *
+ * Return value:
+ * 1 : all ok
+ * 0 : error occurred
+ * ***************************************************************************/
+void
+svf_run(chain_t *chain, FILE *SVF_FILE, int stop_on_mismatch, int print_progress,
+ uint32_t ref_freq)
+{
+ const sxr_t sxr_default = { {0.0, NULL, NULL, NULL, NULL},
+ 1, 1};
+ parser_priv_t priv;
+ int c = ~EOF;
+ int num_lines;
+ uint32_t old_frequency = cable_get_frequency( chain->cable );
+
+ /* get number of lines in svf file so we can give user some feedback on long
+ files or slow cables */
+ rewind( SVF_FILE );
+ num_lines = 0;
+ while (EOF != c) {
+ c = fgetc( SVF_FILE );
+ if ('\n' == c)
+ num_lines++;
+ }
+ rewind( SVF_FILE );
+ if (0 == num_lines)
+ /* avoid those annoying divide/0 crashes */
+ num_lines++;
+
+ /* initialize
+ - part
+ - instruction register
+ - data register */
+ if (chain == NULL) {
+ printf( _("Error %s: no JTAG chain available\n"), "svf");
+ return;
+ }
+ if (chain->parts == NULL) {
+ printf( _("Error %s: chain without any parts\n"), "svf");
+ return;
+ }
+ priv.part = chain->parts->parts[chain->active_part];
+
+ /* setup register SDR if not already existing */
+ if (!(priv.dr = part_find_data_register(priv.part, "SDR"))) {
+ char *register_cmd[] = {"register",
+ "SDR",
+ "32",
+ NULL};
+
+ if (cmd_run(chain, register_cmd) < 1)
+ return;
+
+ if (!(priv.dr = part_find_data_register(priv.part, "SDR"))) {
+ printf( _("Error %s: could not establish SDR register\n"), "svf");
+ return;
+ }
+ }
+
+ /* setup instruction SIR if not already existing */
+ if (!(priv.ir = part_find_instruction(priv.part, "SIR"))) {
+ char *instruction_cmd[] = {"instruction",
+ "SIR",
+ "",
+ "SDR",
+ NULL};
+ char *instruction_string;
+ int len, result;
+
+ len = priv.part->instruction_length;
+ if (len > 0) {
+ if ((instruction_string = (char *)calloc(len+1, sizeof(char))) != NULL) {
+ memset(instruction_string, '1', len);
+ instruction_string[len] = '\0';
+ instruction_cmd[2] = instruction_string;
+
+ result = cmd_run(chain,instruction_cmd);
+
+ free(instruction_string);
+
+ if (result < 1)
+ return;
+ }
+ }
+
+ if (!(priv.ir = part_find_instruction(priv.part, "SIR"))) {
+ printf( _("Error %s: could not establish SIR instruction\n"), "svf");
+ return;
+ }
+ }
+
+ /* initialize variables for new parser run */
+ priv.svf_stop_on_mismatch = stop_on_mismatch;
+
+ priv.sir_params = priv.sdr_params = sxr_default;
+
+ priv.endir = priv.enddr = Run_Test_Idle;
+
+ priv.runtest_run_state = priv.runtest_end_state = Run_Test_Idle;
+
+ priv.svf_trst_absent = 0;
+ priv.svf_state_executed = 0;
+
+ priv.mismatch_occurred = 0;
+
+ /* set back flags for issued warnings */
+ priv.issued_runtest_maxtime = 0;
+
+ priv.ref_freq = ref_freq;
+
+ /* select SIR instruction */
+ part_set_instruction(priv.part, "SIR");
+
+ if (svf_bison_init(&priv, SVF_FILE, num_lines, print_progress)) {
+ svfparse(&priv, chain);
+ svf_bison_deinit(&priv);
+ }
+
+ if (print_progress) {
+ if (priv.mismatch_occurred > 0)
+ printf( _("Mismatches occurred between scanned device output and expected TDO values.\n") );
+ else
+ printf( _("Scanned device output matched expected TDO values.\n") );
+ }
+
+ /* clean up */
+ /* SIR */
+ if (priv.sir_params.params.tdi)
+ free(priv.sir_params.params.tdi);
+ if (priv.sir_params.params.mask)
+ free(priv.sir_params.params.mask);
+ if (priv.sir_params.params.smask)
+ free(priv.sir_params.params.smask);
+ /* SDR */
+ if (priv.sdr_params.params.tdi)
+ free(priv.sdr_params.params.tdi);
+ if (priv.sdr_params.params.mask)
+ free(priv.sdr_params.params.mask);
+ if (priv.sdr_params.params.smask)
+ free(priv.sdr_params.params.smask);
+
+ /* restore previous frequency setting, required by SVF spec */
+ if (old_frequency != cable_get_frequency( chain->cable ))
+ cable_set_frequency( chain->cable, old_frequency );
+}
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2004, Arnim Laeuger
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Arnim Laeuger <arniml@users.sourceforge.net>, 2004.
+ *
+ */
+
+
+#include <stdint.h>
+
+#include "chain.h"
+
+#define MAX_PATH_STATES 64
+
+/* Coding for commands referring either to IR or DR */
+enum generic_irdr_coding { generic_ir, generic_dr };
+
+
+struct tdval {
+ int token;
+ double dvalue;
+};
+struct tcval {
+ int token;
+ char *cvalue;
+ struct tcval *next;
+};
+
+
+struct ths_params {
+ double number;
+ char *tdi;
+ char *tdo;
+ char *mask;
+ char *smask;
+};
+
+struct path_states {
+ int states[MAX_PATH_STATES];
+ int num_states;
+};
+
+struct runtest {
+ int run_state;
+ uint32_t run_count;
+ int run_clk;
+ double min_time;
+ double max_time;
+ int end_state;
+};
+
+typedef struct {
+ struct ths_params params;
+ int no_tdi;
+ int no_tdo;
+} sxr_t;
+
+
+struct svf_parser_params {
+ struct ths_params ths_params;
+ struct path_states path_states;
+ struct runtest runtest;
+};
+
+
+/* private data of the bison parser
+ used to store variables the would end up as globals otherwise */
+struct parser_priv {
+ struct svf_parser_params parser_params;
+ void *scanner;
+ part_t *part;
+ instruction *ir;
+ data_register *dr;
+ sxr_t sir_params;
+ sxr_t sdr_params;
+ int endir;
+ int enddr;
+ int runtest_run_state;
+ int runtest_end_state;
+ int svf_stop_on_mismatch;
+ int svf_trst_absent;
+ int svf_state_executed;
+ uint32_t ref_freq;
+ int mismatch_occurred;
+ /* protocol issued warnings */
+ int issued_runtest_maxtime;
+};
+typedef struct parser_priv parser_priv_t;
+
+struct scanner_extra {
+ int num_lines;
+ int print_progress;
+ int planb;
+ char decimal_point;
+};
+typedef struct scanner_extra scanner_extra_t;
+
+struct YYLTYPE;
+
+void *svf_flex_init(FILE *, int, int);
+void svf_flex_deinit(void *);
+
+int svf_bison_init(parser_priv_t *, FILE *, int, int);
+void svf_bison_deinit(parser_priv_t *);
+
+void svf_endxr(parser_priv_t *, enum generic_irdr_coding, int);
+void svf_frequency(chain_t *, double);
+int svf_hxr(enum generic_irdr_coding, struct ths_params *);
+int svf_runtest(chain_t *, parser_priv_t *, struct runtest *);
+int svf_state(chain_t *, parser_priv_t *, struct path_states *, int);
+int svf_sxr(chain_t *, parser_priv_t *, enum generic_irdr_coding, struct ths_params *, struct YYLTYPE *);
+int svf_trst(chain_t *, parser_priv_t *, int);
+int svf_txr(enum generic_irdr_coding, struct ths_params *);
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2002 by CSD at http://www-csd.ijs.si
+ * Copyright (C) 2004, Arnim Laeuger
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Arnim Laeuger <arniml@users.sourceforge.net>, 2004.
+ * Original parser skeleton by Robert Sedevici <robert.sedevcic@ijs.si>, 2002.
+ *
+ */
+
+%pure-parser
+%parse-param {parser_priv_t *priv_data}
+%parse-param {chain_t *chain}
+%name-prefix="svf"
+%locations
+
+%{
+#include <stdio.h>
+#include <stdlib.h>
+
+#include "svf.h"
+
+/* interface to flex */
+#include "svf_bison.h"
+#define YYLEX_PARAM priv_data->scanner
+int yylex (YYSTYPE *, YYLTYPE *, void *);
+
+#define YYERROR_VERBOSE
+
+
+void yyerror(YYLTYPE *, parser_priv_t *priv_data, chain_t *, const char *);
+
+static void svf_free_ths_params(struct ths_params *);
+%}
+
+%union {
+ int token;
+ double dvalue;
+ char *cvalue;
+ int ivalue;
+ struct tdval tdval;
+ struct tcval *tcval;
+}
+
+
+%token IDENTIFIER NUMBER HEXA_NUM VECTOR_STRING
+
+%token EMPTY
+%token ENDDR ENDIR
+%token FREQUENCY HZ
+%token STATE RESET IDLE
+%token TDI TDO MASK SMASK
+%token TRST ON OFF Z ABSENT
+%token HDR HIR SDR SIR TDR TIR
+%token PIO PIOMAP IN OUT INOUT H L U D X
+%token RUNTEST MAXIMUM SEC TCK SCK ENDSTATE
+%token IRPAUSE IRSHIFT IRUPDATE IRSELECT IREXIT1 IREXIT2 IRCAPTURE
+%token DRPAUSE DRSHIFT DRUPDATE DRSELECT DREXIT1 DREXIT2 DRCAPTURE
+%token SVF_EOF 0 /* SVF_EOF must match bison's token YYEOF */
+
+%type <dvalue> NUMBER
+%type <tdval> runtest_clk_count
+%type <token> runtest_run_state_opt
+%type <token> runtest_end_state_opt
+
+%%
+
+line
+ : /* empty */
+ | line svf_statement
+ | error SVF_EOF
+ /* Eat whole file in case of error.
+ * This is necessary because the lexer will remember parts of the file
+ * inside its input buffer.
+ * In case errors do not driver the lexer to EOF then the next start
+ * of yyparse() will read from this buffer, executing commands after the
+ * previous error!
+ */
+;
+
+
+svf_statement
+ : ENDIR stable_state ';'
+ {
+ svf_endxr(priv_data, generic_ir, $<token>2);
+ }
+
+ | ENDDR stable_state ';'
+ {
+ svf_endxr(priv_data, generic_dr, $<token>2);
+ }
+
+ | FREQUENCY ';'
+ {
+ svf_frequency(chain, 0.0);
+ }
+
+ | FREQUENCY NUMBER HZ ';'
+ {
+ svf_frequency(chain, $2);
+ }
+
+ | HDR NUMBER ths_param_list ';'
+ {
+ struct ths_params *p = &(priv_data->parser_params.ths_params);
+
+ p->number = $2;
+ svf_hxr(generic_dr, p);
+ svf_free_ths_params(p);
+ }
+
+ | HIR NUMBER ths_param_list ';'
+ {
+ struct ths_params *p = &(priv_data->parser_params.ths_params);
+
+ p->number = $2;
+ svf_hxr(generic_ir, p);
+ svf_free_ths_params(p);
+ }
+
+ | PIOMAP '(' direction IDENTIFIER piomap_rec ')' ';'
+ {
+ printf("PIOMAP not implemented\n");
+ yyerror(&@$, priv_data, chain, "PIOMAP");
+ YYERROR;
+ }
+
+ | PIO VECTOR_STRING ';'
+ {
+ free($<cvalue>2);
+ printf("PIO not implemented\n");
+ yyerror(&@$, priv_data, chain, "PIO");
+ YYERROR;
+ }
+
+ | RUNTEST runtest_run_state_opt runtest_clk_count runtest_time_opt runtest_end_state_opt ';'
+ {
+ struct runtest *rt = &(priv_data->parser_params.runtest);
+
+ rt->run_state = $2;
+ rt->run_count = $3.dvalue;
+ rt->run_clk = $3.token;
+ rt->end_state = $5;
+
+ if (!svf_runtest(chain, priv_data, rt)) {
+ yyerror(&@$, priv_data, chain, "RUNTEST");
+ YYERROR;
+ }
+ }
+
+ | RUNTEST runtest_run_state_opt runtest_time runtest_end_state_opt ';'
+ {
+ struct runtest *rt = &(priv_data->parser_params.runtest);
+
+ rt->run_state = $2;
+ rt->run_count = 0;
+ rt->run_clk = 0;
+ rt->end_state = $4;
+
+ if (!svf_runtest(chain, priv_data, rt)) {
+ yyerror(&@$, priv_data, chain, "RUNTEST");
+ YYERROR;
+ }
+ }
+
+ | SDR NUMBER ths_param_list ';'
+ {
+ struct ths_params *p = &(priv_data->parser_params.ths_params);
+ int result;
+
+ p->number = $2;
+ result = svf_sxr(chain, priv_data, generic_dr, p, &@$);
+ svf_free_ths_params(p);
+
+ if (!result) {
+ yyerror(&@$, priv_data, chain, "SDR");
+ YYERROR;
+ }
+ }
+
+ | SIR NUMBER ths_param_list ';'
+ {
+ struct ths_params *p = &(priv_data->parser_params.ths_params);
+ int result;
+
+ p->number = $2;
+ result = svf_sxr(chain, priv_data, generic_ir, p, &@$);
+ svf_free_ths_params(p);
+
+ if (!result) {
+ yyerror(&@$, priv_data, chain, "SIR");
+ YYERROR;
+ }
+ }
+
+ | STATE path_states stable_state ';'
+ {
+ if (!svf_state(chain, priv_data, &(priv_data->parser_params.path_states), $<token>3)) {
+ yyerror(&@$, priv_data, chain, "STATE");
+ YYERROR;
+ }
+ }
+
+ | TDR NUMBER ths_param_list ';'
+ {
+ struct ths_params *p = &(priv_data->parser_params.ths_params);
+ int result;
+
+ p->number = $2;
+ result = svf_txr(generic_dr, p);
+ svf_free_ths_params(p);
+
+ if (!result) {
+ yyerror(&@$, priv_data, chain, "TDR");
+ YYERROR;
+ }
+ }
+
+ | TIR NUMBER ths_param_list ';'
+ {
+ struct ths_params *p = &(priv_data->parser_params.ths_params);
+ int result;
+
+ p->number = $2;
+ result = svf_txr(generic_ir, p);
+ svf_free_ths_params(p);
+
+ if (!result) {
+ yyerror(&@$, priv_data, chain, "TIR");
+ YYERROR;
+ }
+ }
+
+ | TRST trst_mode ';'
+ {
+ if (!svf_trst(chain, priv_data, $<token>2)) {
+ yyerror(&@$, priv_data, chain, "TRST");
+ YYERROR;
+ }
+ }
+;
+
+
+ths_param_list
+ : /* empty element */
+ | ths_param_list ths_opt_param
+;
+
+ths_opt_param
+ : TDI HEXA_NUM
+ {
+ priv_data->parser_params.ths_params.tdi = $<cvalue>2;
+ }
+
+ | TDO HEXA_NUM
+ {
+ priv_data->parser_params.ths_params.tdo = $<cvalue>2;
+ }
+
+ | MASK HEXA_NUM
+ {
+ priv_data->parser_params.ths_params.mask = $<cvalue>2;
+ }
+
+ | SMASK HEXA_NUM
+ {
+ priv_data->parser_params.ths_params.smask = $<cvalue>2;
+ }
+;
+
+stable_state
+ : RESET
+ | IDLE
+ | DRPAUSE
+ | IRPAUSE
+;
+
+runtest_run_state_opt
+ : { $$ = 0; } /* specify value for 'not existing' */
+ | stable_state
+ {
+ $$ = $<token>1;
+ }
+;
+
+runtest_clk_count
+ : NUMBER TCK
+ {
+ $$.token = $<token>2;
+ $$.dvalue = $<dvalue>1;
+ }
+
+ | NUMBER SCK
+ {
+ $$.token = $<token>2;
+ $$.dvalue = $<dvalue>1;
+ }
+;
+
+runtest_time_opt
+ :
+ {
+ priv_data->parser_params.runtest.min_time = 0.0;
+ priv_data->parser_params.runtest.max_time = 0.0;
+ }
+
+ | runtest_time
+;
+
+runtest_time
+ : NUMBER SEC runtest_max_time_opt
+ {
+ priv_data->parser_params.runtest.min_time = $<dvalue>1;
+ }
+;
+
+runtest_max_time_opt
+ :
+ {
+ priv_data->parser_params.runtest.max_time = 0.0;
+ }
+ | MAXIMUM NUMBER SEC
+ {
+ priv_data->parser_params.runtest.max_time = $<dvalue>2;
+ }
+;
+
+runtest_end_state_opt
+ : { $$ = 0; } /* specify value for 'not existing' */
+ | ENDSTATE stable_state
+ {
+ $$ = $<token>2;
+ }
+;
+
+all_states
+ : DRSELECT
+ | DRCAPTURE
+ | DRSHIFT
+ | DREXIT1
+ | DREXIT2
+ | DRUPDATE
+ | IRSELECT
+ | IRCAPTURE
+ | IRSHIFT
+ | IREXIT1
+ | IREXIT2
+ | IRUPDATE
+ | IRPAUSE
+ | DRPAUSE
+ | RESET
+ | IDLE
+;
+
+path_states
+ : /* empty element, returns index 0 */
+ {
+ priv_data->parser_params.path_states.num_states = 0;
+ }
+
+ | path_states all_states
+ {
+ struct path_states *ps = &(priv_data->parser_params.path_states);
+
+ if (ps->num_states < MAX_PATH_STATES) {
+ ps->states[ps->num_states] = $<token>2;
+ ps->num_states++;
+ } else
+ printf("Error %s: maximum number of %d path states reached.\n",
+ "svf", MAX_PATH_STATES);
+ }
+;
+
+piomap_rec
+ :
+ | piomap_rec direction IDENTIFIER
+;
+
+trst_mode
+ : ON
+ | OFF
+ | Z
+ | ABSENT
+;
+
+direction
+ : IN
+ | OUT
+ | INOUT
+;
+
+%%
+
+
+void
+yyerror(YYLTYPE *locp, parser_priv_t *priv_data, chain_t *chain, const char *error_string)
+{
+ printf("Error occurred for SVF command %s.\n", error_string);
+}
+
+
+static void
+svf_free_ths_params(struct ths_params *params)
+{
+ params->number = 0.0;
+
+ if (params->tdi) {
+ free(params->tdi);
+ params->tdi = NULL;
+ }
+ if (params->tdo) {
+ free(params->tdo);
+ params->tdo = NULL;
+ }
+ if (params->mask) {
+ free(params->mask);
+ params->mask = NULL;
+ }
+ if (params->smask) {
+ free(params->smask);
+ params->smask = NULL;
+ }
+}
+
+
+int
+svf_bison_init(parser_priv_t *priv_data, FILE *f, int num_lines, int print_progress)
+{
+ const struct svf_parser_params params = {
+ {0.0, NULL, NULL, NULL, NULL},
+ {{}, 0},
+ {0, 0.0, 0, 0, 0, 0}
+ };
+
+ priv_data->parser_params = params;
+
+ if ((priv_data->scanner = svf_flex_init(f, num_lines, print_progress)) == NULL)
+ return 0;
+ else
+ return 1;
+}
+
+
+void
+svf_bison_deinit(parser_priv_t *priv_data)
+{
+ svf_flex_deinit(priv_data->scanner);
+}
--- /dev/null
+/* $Id$
+ *
+ * Copyright (C) 2002 by CSD at http://www-csd.ijs.si
+ * Copyright (C) 2004, Arnim Laeuger
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Original lexer by Robert Sedevici <robert.sedevcic@ijs.si>, 2002.
+ * Modified by Arnim Laeuger <arniml@users.sourceforge.net>, 2004.
+ *
+ */
+
+
+%option bison-bridge
+%option reentrant
+%option prefix="svf"
+%option outfile="lex.yy.c"
+%option bison-locations
+
+%{
+#include <strings.h>
+#include <ctype.h>
+
+#include <sysdep.h>
+
+#ifdef ENABLE_NLS
+#include <locale.h>
+#endif
+
+#include "svf.h"
+#include "svf_bison.h"
+
+#define YY_EXTRA_TYPE scanner_extra_t *
+
+static int map_keyw_ident(YYSTYPE *, char *);
+static void align_string(char *);
+
+static void fix_yylloc(YYLTYPE *, char *);
+static void fix_yylloc_nl(YYLTYPE *, char *, YY_EXTRA_TYPE);
+static void progress_nl(YYLTYPE *, YY_EXTRA_TYPE);
+
+int yywrap(yyscan_t scanner)
+{
+ return(1);
+}
+
+#define YY_USER_INIT { \
+ yylloc->first_line = yylloc->last_line = yylloc->first_column = yylloc->last_column = 0; \
+}
+
+%}
+
+%pointer
+
+LETTER [A-Za-z]
+DIGIT [0-9]
+HEX_DIGIT {DIGIT}|[a-fA-F]
+WSPACE [ \t\r]
+COMMENT (!.*)|("//".*)[^\n]
+
+%s expect_vector
+
+%%
+
+
+{LETTER}+[0-9A-Za-z_]* {
+ /* token is a keyword or identifier */
+ int keyw;
+
+ fix_yylloc(yylloc, yytext);
+ keyw = map_keyw_ident(yylval, yytext);
+
+ /* enable detection of VECTOR_STRING when this is a PIO command */
+ if (keyw == PIO) {
+ BEGIN(expect_vector);
+ }
+
+ return(keyw);
+} /* end of keyword or identifier */
+
+
+{DIGIT}+(\.{DIGIT}+)?([eE][-+]?{DIGIT}+)? {
+ /* token is a real number */
+
+ char *real_string = strdup(yytext);
+
+ /* Note: We need to compensate the current locale's representation
+ of the decimal point since strtod() functionality depends
+ on the locale settings. */
+
+ if (real_string) {
+ char *point_pos = strchr(real_string, '.');
+ YY_EXTRA_TYPE extra = yyget_extra(yyscanner);
+
+ if (point_pos)
+ /* convert decimal point into current locale's representation */
+ *point_pos = extra->decimal_point;
+
+ yylval->dvalue = strtod(real_string, (char **) NULL);
+ fix_yylloc(yylloc, yytext);
+
+ free(real_string);
+ } else
+ yylval->dvalue = 0.0;
+
+ return(NUMBER);
+} /* end of real number */
+
+
+<expect_vector>"("{WSPACE}*[\n\rHhLlZzUuDdXx \t\r]+{WSPACE}*")" {
+ /* There is an overlap of VECTOR_STRING and HEXA_NUM when the string
+ contains only 'd' or 'D'. To prevent complicated parsing rules,
+ the lexer is instructed to detect VECTOR_STRING only when a PIO
+ command has been scanned previously.
+ This is enabled with <expect_vector>. */
+ /* token is a vector string */
+ char *cstring;
+
+ fix_yylloc_nl(yylloc, yytext, yyget_extra(yyscanner));
+ align_string(yytext);
+
+ cstring = calloc(strlen(yytext) + 1, sizeof(char));
+ strcpy(cstring, yytext);
+ yylval->cvalue = cstring;
+ return(VECTOR_STRING);
+} /* end of vector string */
+
+
+"("{WSPACE}*[\n\rA-Fa-f0-9 \t\r]+{WSPACE}*")" {
+ /* token is a hexadecimal value (2) */
+ char *cstring;
+
+ fix_yylloc_nl(yylloc, yytext, yyget_extra(yyscanner));
+ align_string(yytext);
+
+ cstring = calloc(strlen(yytext) + 1, sizeof(char));
+ strcpy(cstring, yytext);
+ yylval->cvalue = cstring;
+ return(HEXA_NUM);
+} /* end of hexadecimal value */
+
+
+{WSPACE}+ {
+ /* token is a white space character */
+ fix_yylloc(yylloc, yytext);
+} /* end of white space */
+
+
+{COMMENT} {
+ /* token is a comment */
+ fix_yylloc(yylloc, yytext);
+} /* end of comment */
+
+
+[()] {
+ /* left or right parenthes */
+ fix_yylloc(yylloc, yytext);
+ return(yytext[0]);
+} /* end of left or right parenthesis */
+
+
+\n {
+ /* token is a new line character */
+ yylloc->first_line = yylloc->last_line;
+ yylloc->first_column = yylloc->last_column;
+ ++yylloc->last_line;
+ yylloc->last_column = 0;
+ progress_nl(yylloc, yyget_extra(yyscanner));
+} /* end of new line */
+
+
+; {
+ /* token is end of statement character */
+
+ /* release expect_vector */
+ BEGIN(INITIAL);
+
+ fix_yylloc(yylloc, yytext);
+ return(yytext[0]);
+} /* end of statement character */
+
+
+<<EOF>> {
+
+ return(EOF);
+} /* end of file token */
+
+
+. {
+ /* print token if interactive parsing enabled and yyin != stdin */
+
+ fprintf(stderr, "Error: \"%s\" is not a legal SVF language token\n", yytext);
+
+} /* end of any other character */
+
+%%
+
+
+/*=============================================================================
+ * rwtable - reserve word table
+ *===========================================================================*/
+static struct rwtable
+{
+ char *rw_name;
+ int rw_yylex;
+} rwtable[] = {
+ {"ABSENT", ABSENT},
+ {"D", D},
+ {"DRCAPTURE", DRCAPTURE},
+ {"DREXIT1", DREXIT1},
+ {"DREXIT2", DREXIT2},
+ {"DRPAUSE", DRPAUSE},
+ {"DRSELECT", DRSELECT},
+ {"DRSHIFT", DRSHIFT},
+ {"DRUPDATE", DRUPDATE},
+ {"EMPTY", EMPTY},
+ {"ENDDR", ENDDR},
+ {"ENDIR", ENDIR},
+ {"ENDSTATE", ENDSTATE},
+ {"FREQUENCY", FREQUENCY},
+ {"H", H},
+ {"HDR", HDR},
+ {"HIR", HIR},
+ {"HZ", HZ},
+ {"IDLE", IDLE},
+ {"IN", IN},
+ {"INOUT", INOUT},
+ {"IRCAPTURE", IRCAPTURE},
+ {"IREXIT1", IREXIT1},
+ {"IREXIT2", IREXIT2},
+ {"IRPAUSE", IRPAUSE},
+ {"IRSELECT", IRSELECT},
+ {"IRSHIFT", IRSHIFT},
+ {"IRUPDATE", IRUPDATE},
+ {"L", L},
+ {"MASK", MASK},
+ {"MAXIMUM", MAXIMUM},
+ {"OFF", OFF},
+ {"ON", ON},
+ {"OUT", OUT},
+ {"PIO", PIO},
+ {"PIOMAP", PIOMAP},
+ {"RESET", RESET},
+ {"RUNTEST", RUNTEST},
+ {"SCK", SCK},
+ {"SDR", SDR},
+ {"SEC", SEC},
+ {"SIR", SIR},
+ {"SMASK", SMASK},
+ {"STATE", STATE},
+ {"TCK", TCK},
+ {"TDI", TDI},
+ {"TDO", TDO},
+ {"TDR", TDR},
+ {"TIR", TIR},
+ {"TRST", TRST},
+ {"U", U},
+ {"X", X},
+ {"Z", Z}
+};//end of rwtable struct
+
+#define END(v) (sizeof(v) / sizeof(v[0]) - 1)
+
+static int
+map_keyw_ident(YYSTYPE * mylval, char *str)
+{
+ int idx;
+ int rw = IDENTIFIER;
+
+ mylval->cvalue = str;
+
+ for (idx = 0; idx <= END(rwtable); idx++) {
+ if (strcasecmp(rwtable[idx].rw_name, str) == 0) {
+ /* always return terminal value as semantic value */
+ rw = rwtable[idx].rw_yylex;
+ mylval->token = rw;
+ }
+ }
+
+ return(rw);
+}
+
+
+static void
+align_string(char *str)
+{
+ int src, dst, len;
+
+ dst = 0;
+ len = strlen(str);
+
+ for (src = 0; src < len; src++) {
+ if (isxdigit(str[src]))
+ str[dst++] = str[src];
+ }
+ str[dst] = '\0';
+}
+
+
+static void
+fix_yylloc(YYLTYPE * mylloc, char *str)
+{
+ mylloc->first_line = mylloc->last_line;
+ mylloc->first_column = mylloc->last_column;
+ mylloc->last_column += strlen(str);
+}
+
+
+static void
+fix_yylloc_nl(YYLTYPE * mylloc, char *str, YY_EXTRA_TYPE extra)
+{
+ char *p;
+
+ mylloc->first_line = mylloc->last_line;
+ mylloc->first_column = mylloc->last_column;
+ for (p = str; *p; ++p) {
+ if (*p == '\n') {
+ mylloc->last_column = 0;
+ ++mylloc->last_line;
+ progress_nl(mylloc, extra);
+ } else {
+ ++mylloc->last_column;
+ }
+ }
+}
+
+
+static void
+progress_nl(YYLTYPE * mylloc, YY_EXTRA_TYPE extra)
+{
+ int percent;
+
+ if ((extra->print_progress) && (mylloc->last_line % 10==0)) {
+ percent = ((mylloc->last_line * 100) + 1) / extra->num_lines;
+ if (percent <= 1) return; // dont bother printing < 1 %
+ printf( "\r" );
+ printf( _("Parsing %6d/%d (%3.0d%%)"),
+ mylloc->last_line, extra->num_lines, percent);
+ }
+}
+
+
+void *svf_flex_init(FILE *f, int num_lines, int print_progress)
+{
+ YY_EXTRA_TYPE extra;
+ yyscan_t scanner;
+
+ /* get our scanner structure */
+ if (yylex_init(&scanner) != 0)
+ return NULL;
+
+ yyset_in(f, scanner);
+
+ if (!(extra = (scanner_extra_t *)malloc(sizeof(scanner_extra_t)))) {
+ printf( _("Out of memory, %s line %i\n"), __FILE__, __LINE__ );
+ yylex_destroy(scanner);
+ return NULL;
+ }
+
+ extra->num_lines = num_lines;
+ extra->print_progress = print_progress;
+
+#ifdef ENABLE_NLS
+ {
+ struct lconv *lc = localeconv();
+ extra->decimal_point = lc->decimal_point[0];
+ }
+#else
+ extra->decimal_point = '.';
+#endif
+
+ yyset_extra(extra, scanner);
+
+ return scanner;
+}
+
+
+void svf_flex_deinit(void *scanner)
+{
+ YY_EXTRA_TYPE extra = yyget_extra(scanner);
+ if (extra->print_progress)
+ printf("\n");
+ free(extra);
+ yylex_destroy(scanner);
+}
--- /dev/null
+Makefile
+Makefile.in
+.deps
--- /dev/null
+#
+# $Id$
+#
+# Copyright (C) 2002 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Marcel Telka <marcel@telka.sk>, 2002.
+#
+
+include $(top_srcdir)/Makefile.rules
+
+noinst_LIBRARIES = libtap.a
+
+libtap_a_SOURCES = \
+ tap.c \
+ register.c \
+ state.c \
+ chain.c \
+ detect.c \
+ discovery.c \
+ idcode.c \
+ parport.c \
+ usbconn.c \
+ cable.c \
+ cable/generic.h \
+ cable/generic.c \
+ cable/generic_usbconn.h \
+ cable/generic_usbconn.c \
+ cable/generic_parport.h \
+ cable/generic_parport.c \
+ cable/cmd_xfer.h \
+ cable/cmd_xfer.c
+
+if ENABLE_CABLE_ARCOM
+libtap_a_SOURCES += \
+ cable/arcom.c
+endif
+
+if ENABLE_CABLE_BYTEBLASTER
+libtap_a_SOURCES += \
+ cable/byteblaster.c
+endif
+
+if ENABLE_CABLE_DLC5
+libtap_a_SOURCES += \
+ cable/dlc5.c
+endif
+
+if ENABLE_CABLE_EA253
+libtap_a_SOURCES += \
+ cable/ea253.c
+endif
+
+if ENABLE_CABLE_EI012
+libtap_a_SOURCES += \
+ cable/ei012.c
+endif
+
+if ENABLE_CABLE_KEITHKOEP
+libtap_a_SOURCES += \
+ cable/keithkoep.c
+endif
+
+if ENABLE_CABLE_LATTICE
+libtap_a_SOURCES += \
+ cable/lattice.c
+endif
+
+if ENABLE_CABLE_MPCBDM
+libtap_a_SOURCES += \
+ cable/mpcbdm.c
+endif
+
+if ENABLE_CABLE_TRITON
+libtap_a_SOURCES += \
+ cable/triton.c
+endif
+
+if ENABLE_CABLE_WIGGLER
+libtap_a_SOURCES += \
+ cable/wiggler.c \
+ cable/wiggler2.c
+endif
+
+if ENABLE_CABLE_JLINK
+libtap_a_SOURCES += \
+ cable/jlink.c
+endif
+
+if ENABLE_CABLE_XPC
+libtap_a_SOURCES += \
+ cable/xpc.c
+endif
+
+if ENABLE_CABLE_USBBLASTER
+libtap_a_SOURCES += \
+ cable/usbblaster.c
+endif
+
+if ENABLE_CABLE_FT2232
+libtap_a_SOURCES += \
+ cable/ft2232.c
+endif
+
+if ENABLE_CABLE_TS7800
+libtap_a_SOURCES += \
+ cable/ts7800.c
+endif
+
+
+if HAVE_LIBUSB
+libtap_a_SOURCES += \
+ usbconn/libusb.c
+endif
+
+
+if ENABLE_JIM
+libtap_a_SOURCES += \
+ cable/jim.c
+endif
+
+if ENABLE_LOWLEVEL_FTDI
+libtap_a_SOURCES += \
+ usbconn/libftdi.c
+endif
+
+if ENABLE_LOWLEVEL_FTD2XX
+libtap_a_SOURCES += \
+ usbconn/libftd2xx.c
+endif
+
+if ENABLE_LOWLEVEL_DIRECT
+libtap_a_SOURCES += \
+ parport/direct.c
+endif
+
+if ENABLE_LOWLEVEL_PPDEV
+libtap_a_SOURCES += \
+ parport/ppdev.c
+endif
+
+if ENABLE_LOWLEVEL_PPI
+libtap_a_SOURCES += \
+ parport/ppi.c
+endif
+
+if ENABLE_CABLE_EP9307
+libtap_a_SOURCES += \
+ cable/vision_ep9307.c
+endif
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2003 ETC s.r.o.
+ * Copyright (C) 2005 Hein Roehrig,
+ * Copyright (C) 2008 Kolja Waschk
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2003;
+ * Busy loop waiting (*freq* functions) Hein Roehrig, 2005;
+ * JTAG activity queuing and API (*defer* functions) K. Waschk, 2008
+ *
+ */
+
+#include "sysdep.h"
+
+#include <stdlib.h>
+#include <unistd.h>
+#include <sys/types.h>
+#include <stdint.h>
+#include <string.h>
+
+#include "jtag.h"
+#include "cable.h"
+
+#undef VERBOSE
+
+extern cable_driver_t arcom_cable_driver;
+extern cable_driver_t byteblaster_cable_driver;
+extern cable_driver_t usbblaster_cable_driver;
+extern cable_driver_t ft2232_cable_driver;
+extern cable_driver_t ft2232_jtagkey_cable_driver;
+extern cable_driver_t ft2232_armusbocd_cable_driver;
+extern cable_driver_t ft2232_gnice_cable_driver;
+extern cable_driver_t ft2232_oocdlinks_cable_driver;
+extern cable_driver_t ft2232_signalyzer_cable_driver;
+extern cable_driver_t ft2232_turtelizer2_cable_driver;
+extern cable_driver_t ft2232_usbtojtagif_cable_driver;
+extern cable_driver_t ft2232_flyswatter_cable_driver;
+extern cable_driver_t ft2232_usbscarab2_cable_driver;
+extern cable_driver_t dlc5_cable_driver;
+extern cable_driver_t ea253_cable_driver;
+extern cable_driver_t ei012_cable_driver;
+extern cable_driver_t igloo_cable_driver;
+extern cable_driver_t keithkoep_cable_driver;
+extern cable_driver_t lattice_cable_driver;
+extern cable_driver_t mpcbdm_cable_driver;
+extern cable_driver_t triton_cable_driver;
+extern cable_driver_t jim_cable_driver;
+extern cable_driver_t wiggler_cable_driver;
+extern cable_driver_t wiggler2_cable_driver;
+extern cable_driver_t wiggler_cable_driver;
+extern cable_driver_t xpc_int_cable_driver;
+extern cable_driver_t xpc_ext_cable_driver;
+extern cable_driver_t jlink_cable_driver;
+extern cable_driver_t ep9307_cable_driver;
+extern cable_driver_t ts7800_cable_driver;
+
+cable_driver_t *cable_drivers[] = {
+#ifdef ENABLE_CABLE_ARCOM
+ &arcom_cable_driver,
+#endif
+#ifdef ENABLE_CABLE_BYTEBLASTER
+ &byteblaster_cable_driver,
+#endif
+
+#ifdef ENABLE_CABLE_USBBLASTER
+ &usbblaster_cable_driver,
+#endif
+
+#ifdef ENABLE_CABLE_FT2232
+ &ft2232_cable_driver,
+ &ft2232_jtagkey_cable_driver,
+ &ft2232_armusbocd_cable_driver,
+ &ft2232_gnice_cable_driver,
+ &ft2232_oocdlinks_cable_driver,
+ &ft2232_signalyzer_cable_driver,
+ &ft2232_turtelizer2_cable_driver,
+ &ft2232_usbtojtagif_cable_driver,
+ &ft2232_flyswatter_cable_driver,
+ &ft2232_usbscarab2_cable_driver,
+#endif
+
+#ifdef ENABLE_CABLE_DLC5
+ &dlc5_cable_driver,
+#endif
+#ifdef ENABLE_CABLE_EA253
+ &ea253_cable_driver,
+#endif
+#ifdef ENABLE_CABLE_EI012
+ &ei012_cable_driver,
+#endif
+#ifdef ENABLE_CABLE_IGLOO
+ &igloo_cable_driver,
+#endif
+#ifdef ENABLE_CABLE_KEITHKOEP
+ &keithkoep_cable_driver,
+#endif
+#ifdef ENABLE_CABLE_LATTICE
+ &lattice_cable_driver,
+#endif
+#ifdef ENABLE_CABLE_MPCBDM
+ &mpcbdm_cable_driver,
+#endif
+#ifdef ENABLE_CABLE_TRITON
+ &triton_cable_driver,
+#endif
+#ifdef ENABLE_JIM
+ &jim_cable_driver,
+#endif
+#ifdef ENABLE_CABLE_WIGGLER
+ &wiggler_cable_driver,
+ &wiggler2_cable_driver,
+#endif
+
+#ifdef ENABLE_CABLE_XPC
+ &xpc_int_cable_driver,
+ &xpc_ext_cable_driver,
+#endif
+
+#ifdef ENABLE_CABLE_JLINK
+ &jlink_cable_driver,
+#endif
+
+#ifdef ENABLE_CABLE_EP9307
+ &ep9307_cable_driver,
+#endif
+
+#ifdef ENABLE_CABLE_TS7800
+ &ts7800_cable_driver,
+#endif
+ NULL /* last must be NULL */
+};
+
+void
+cable_free( cable_t *cable )
+{
+ cable->driver->cable_free( cable );
+}
+
+int
+cable_init( cable_t *cable )
+{
+ cable->delay = 0;
+ cable->frequency = 0;
+
+ cable->todo.max_items = 128;
+ cable->todo.num_items = 0;
+ cable->todo.next_item = 0;
+ cable->todo.next_free = 0;
+ cable->todo.data = malloc(cable->todo.max_items*sizeof(cable_queue_t));
+
+ cable->done.max_items = 128;
+ cable->done.num_items = 0;
+ cable->done.next_item = 0;
+ cable->done.next_free = 0;
+ cable->done.data = malloc(cable->done.max_items*sizeof(cable_queue_t));
+
+ if(cable->todo.data == NULL || cable->done.data == NULL)
+ {
+ printf(_("Failed to allocate memory for cable activity queue.\n"));
+ if(cable->todo.data != NULL) free(cable->todo.data);
+ if(cable->done.data != NULL) free(cable->done.data);
+ return 1;
+ }
+
+ return cable->driver->init( cable );
+}
+
+void
+cable_flush ( cable_t *cable, cable_flush_amount_t how_much )
+{
+ cable->driver->flush( cable, how_much );
+}
+
+void
+cable_done( cable_t *cable )
+{
+ cable_flush( cable, COMPLETELY );
+ if( cable->todo.data != NULL)
+ {
+ free( cable->todo.data );
+ free( cable->done.data );
+ }
+ return cable->driver->done( cable );
+}
+
+int
+cable_add_queue_item( cable_t *cable, cable_queue_info_t *q )
+{
+ int i,j;
+ if( q->num_items >= q->max_items ) /* queue full? */
+ {
+ int new_max_items;
+ cable_queue_t *resized;
+
+#ifdef VERBOSE
+ printf("Queue %p needs resizing; n(%d) >= max(%d); free=%d, next=%d\n",
+ q, q->num_items, q->max_items, q->next_free, q->next_item);
+#endif
+
+ new_max_items = q->max_items + 128;
+ resized = realloc(q->data, new_max_items * sizeof(cable_queue_t));
+ if(resized == NULL)
+ {
+ printf(_("Out of memory: couldn't resize activity queue to %d\n"),
+ new_max_items);
+ return -1; /* report failure */
+ }
+#ifdef VERBOSE
+ printf(_("(Resized JTAG activity queue to hold max %d items)\n"),
+ new_max_items);
+#endif
+ q->data = resized;
+
+ /* The queue was full. Except for the special case when next_item is 0,
+ * resizing just introduced a gap between old and new max, which has to
+ * be filled; either by moving data from next_item .. max_items, or
+ * from 0 .. next_free (whatever is smaller). */
+
+#define CHOOSE_SMALLEST_AREA_TO_MOVE 1
+
+ if(q->next_item != 0)
+ {
+ int added_space = new_max_items - q->max_items;
+ int num_to_move = q->max_items - q->next_item;
+
+#ifdef CHOOSE_SMALLEST_AREA_TO_MOVE
+ if(num_to_move <= q->next_free)
+#endif
+ {
+ /* Move queue items at end of old array
+ * towards end of new array: 345612__ -> 3456__12 */
+
+ int dest = new_max_items - num_to_move;
+#ifdef VERBOSE
+ printf("Resize: Move %d items towards end of queue memory (%d > %d)\n",
+ num_to_move, q->next_item, dest);
+#endif
+ memmove(&(q->data[dest]), &(q->data[q->next_item]),
+ num_to_move * sizeof(cable_queue_t));
+
+ q->next_item = dest;
+ }
+#ifdef CHOOSE_SMALLEST_AREA_TO_MOVE
+ else
+ {
+ if(q->next_free <= added_space)
+ {
+ /* Relocate queue items at beginning of old array
+ * to end of new array: 561234__ -> __123456 */
+
+#ifdef VERBOSE
+ printf("Resize: Move %d items from start to end\n", q->next_free);
+#endif
+ memcpy(&(q->data[q->max_items]), &(q->data[0]),
+ q->next_free * sizeof(cable_queue_t));
+
+ }
+ else
+ {
+ /* Same as above, but for the case if new space
+ * isn't large enough to hold all relocated items */
+
+ /* Step 1: 456123__ -> __612345 */
+
+#ifdef VERBOSE
+ printf("Resize.A: Move %d items from start to end\n", added_space);
+#endif
+
+ memcpy(&(q->data[q->max_items]), &(q->data[0]),
+ added_space * sizeof(cable_queue_t));
+
+ /* Step 2: __612345 -> 6__12345 */
+
+#ifdef VERBOSE
+ printf("Resize.B: Move %d items towards start (offset %d)\n",
+ (q->next_free - added_space), added_space);
+#endif
+
+ memmove(&(q->data[0]), &(q->data[added_space]),
+ (q->next_free - added_space) * sizeof(cable_queue_t));
+ }
+ }
+#endif
+ }
+ q->max_items = new_max_items;
+ q->next_free = q->next_item + q->num_items;
+ if(q->next_free >= new_max_items) q->next_free -= new_max_items;
+
+#ifdef VERBOSE
+ printf("Queue %p after resizing; n(%d) >= max(%d); free=%d, next=%d\n",
+ q, q->num_items, q->max_items, q->next_free, q->next_item);
+#endif
+ }
+
+ i = q->next_free;
+ j = i+1;
+ if( j >= q->max_items ) j = 0;
+ q->next_free = j;
+ q->num_items ++;
+
+ // printf("add_queue_item to %p: %d\n", q, i);
+ return i;
+}
+
+int
+cable_get_queue_item( cable_t *cable, cable_queue_info_t *q )
+{
+ if(q->num_items > 0)
+ {
+ int i = q->next_item;
+ int j = i+1;
+ if( j >= q->max_items ) j = 0;
+ q->next_item = j;
+ q->num_items --;
+ // printf("get_queue_item from %p: %d\n", q, i);
+ return i;
+ }
+
+ // printf("get_queue_item from %p: %d\n", q, -1);
+ return -1;
+}
+
+void
+cable_purge_queue( cable_queue_info_t *q, int io )
+{
+ while(q->num_items > 0)
+ {
+ int i = q->next_item;
+ if(q->data[i].action == CABLE_TRANSFER)
+ {
+ if(io == 0) /* todo queue */
+ {
+ if(q->data[i].arg.transfer.in != NULL) free(q->data[i].arg.transfer.in);
+ if(q->data[i].arg.transfer.out != NULL) free(q->data[i].arg.transfer.out);
+ }
+ else /* done queue */
+ {
+ if(q->data[i].arg.xferred.out != NULL) free(q->data[i].arg.xferred.out);
+ }
+ }
+
+ i++;
+ if(i >= q->max_items) i = 0;
+ q->num_items--;
+ }
+
+ q->num_items = 0;
+ q->next_item = 0;
+ q->next_free = 0;
+}
+
+void
+cable_clock( cable_t *cable, int tms, int tdi, int n )
+{
+ cable_flush( cable, COMPLETELY );
+ cable->driver->clock( cable, tms, tdi, n );
+}
+
+int
+cable_defer_clock ( cable_t *cable, int tms, int tdi, int n )
+{
+ int i = cable_add_queue_item( cable, &(cable->todo) );
+ if( i < 0 ) return 1; /* report failure */
+ cable->todo.data[i].action = CABLE_CLOCK;
+ cable->todo.data[i].arg.clock.tms = tms;
+ cable->todo.data[i].arg.clock.tdi = tdi;
+ cable->todo.data[i].arg.clock.n = n;
+ cable_flush( cable, OPTIONALLY );
+ return 0; /* success */
+}
+
+int
+cable_get_tdo( cable_t *cable )
+{
+ cable_flush( cable, COMPLETELY );
+ return cable->driver->get_tdo( cable );
+}
+
+int
+cable_get_tdo_late( cable_t *cable )
+{
+ int i;
+ cable_flush( cable, TO_OUTPUT );
+ i = cable_get_queue_item( cable, &(cable->done) );
+ if( i >= 0 )
+ {
+ if(cable->done.data[i].action != CABLE_GET_TDO)
+ {
+ printf(_("Internal error: Got wrong type of result from queue (%d? %p.%d)\n"),
+ cable->done.data[i].action, &(cable->done), i);
+ cable_purge_queue( &(cable->done), 1 );
+ }
+ else
+ {
+ return cable->done.data[i].arg.value.val;
+ }
+ }
+ return cable->driver->get_tdo( cable );
+}
+
+int
+cable_defer_get_tdo( cable_t *cable )
+{
+ int i = cable_add_queue_item( cable, &(cable->todo) );
+ if( i < 0 ) return 1; /* report failure */
+ cable->todo.data[i].action = CABLE_GET_TDO;
+ cable_flush( cable, OPTIONALLY );
+ return 0; /* success */
+}
+
+int
+cable_set_signal( cable_t *cable, int mask, int val )
+{
+ cable_flush( cable, COMPLETELY );
+ return cable->driver->set_signal( cable, mask, val );
+}
+
+int
+cable_defer_set_signal( cable_t *cable, int mask, int val )
+{
+ int i = cable_add_queue_item( cable, &(cable->todo) );
+ if( i < 0 ) return 1; /* report failure */
+ cable->todo.data[i].action = CABLE_SET_SIGNAL;
+ cable->todo.data[i].arg.value.mask = mask;
+ cable->todo.data[i].arg.value.val = val;
+ cable_flush( cable, OPTIONALLY );
+ return 0; /* success */
+}
+
+int
+cable_get_signal( cable_t *cable, pod_sigsel_t sig )
+{
+ cable_flush( cable, COMPLETELY );
+ return cable->driver->get_signal( cable, sig );
+}
+
+int
+cable_get_signal_late( cable_t *cable, pod_sigsel_t sig )
+{
+ int i;
+ cable_flush( cable, TO_OUTPUT );
+ i = cable_get_queue_item( cable, &(cable->done) );
+ if( i >= 0 )
+ {
+ if(cable->done.data[i].action != CABLE_GET_SIGNAL)
+ {
+ printf(_("Internal error: Got wrong type of result from queue (%d? %p.%d)\n"),
+ cable->done.data[i].action, &(cable->done), i);
+ cable_purge_queue( &(cable->done), 1 );
+ }
+ else if(cable->done.data[i].arg.value.sig != sig)
+ {
+ printf(_("Internal error: Got wrong signal's value from queue (%d? %p.%d)\n"),
+ cable->done.data[i].action, &(cable->done), i);
+ cable_purge_queue( &(cable->done), 1 );
+ }
+ else
+ {
+ return cable->done.data[i].arg.value.val;
+ }
+ }
+ return cable->driver->get_signal( cable, sig );
+}
+
+int
+cable_defer_get_signal( cable_t *cable, pod_sigsel_t sig )
+{
+ int i = cable_add_queue_item( cable, &(cable->todo) );
+ if( i < 0 ) return 1; /* report failure */
+ cable->todo.data[i].action = CABLE_GET_SIGNAL;
+ cable->todo.data[i].arg.value.sig = sig;
+ cable_flush( cable, OPTIONALLY );
+ return 0; /* success */
+}
+
+int
+cable_transfer( cable_t *cable, int len, char *in, char *out )
+{
+ cable_flush( cable, COMPLETELY );
+ return cable->driver->transfer( cable, len, in, out );
+}
+
+int
+cable_transfer_late( cable_t *cable, char *out )
+{
+ int i;
+ cable_flush( cable, TO_OUTPUT );
+ i = cable_get_queue_item( cable, &(cable->done) );
+
+ if( i >= 0 && cable->done.data[i].action == CABLE_TRANSFER)
+ {
+#if 0
+ printf("Got queue item (%p.%d) len=%d out=%p\n",
+ &(cable->done), i,
+ cable->done.data[i].arg.xferred.len,
+ cable->done.data[i].arg.xferred.out);
+#endif
+ if(out) memcpy(out,
+ cable->done.data[i].arg.xferred.out,
+ cable->done.data[i].arg.xferred.len);
+ free(cable->done.data[i].arg.xferred.out);
+ return cable->done.data[i].arg.xferred.res;
+ }
+
+ if(cable->done.data[i].action != CABLE_TRANSFER)
+ {
+ printf(_("Internal error: Got wrong type of result from queue (#%d %p.%d)\n"),
+ cable->done.data[i].action, &(cable->done), i);
+ cable_purge_queue( &(cable->done), 1 );
+ }
+ else
+ {
+ printf(_("Internal error: Wanted transfer result but none was queued\n"));
+ }
+ return 0;
+}
+
+int
+cable_defer_transfer( cable_t *cable, int len, char *in, char *out )
+{
+ char *ibuf, *obuf = NULL;
+ int i;
+
+ ibuf = malloc(len);
+ if(ibuf == NULL) return 1;
+
+ if(out)
+ {
+ obuf = malloc(len);
+ if(obuf == NULL)
+ {
+ free(ibuf);
+ return 1;
+ }
+ }
+
+ i = cable_add_queue_item( cable, &(cable->todo) );
+ if( i < 0 )
+ {
+ free(ibuf);
+ if(obuf) free(obuf);
+ return 1; /* report failure */
+ }
+
+ cable->todo.data[i].action = CABLE_TRANSFER;
+ cable->todo.data[i].arg.transfer.len = len;
+ if(in) memcpy(ibuf, in, len);
+ cable->todo.data[i].arg.transfer.in = ibuf;
+ cable->todo.data[i].arg.transfer.out = obuf;
+ cable_flush( cable, OPTIONALLY );
+ return 0; /* success */
+}
+
+void
+cable_set_frequency( cable_t *cable, uint32_t new_frequency )
+{
+ cable_flush( cable, COMPLETELY );
+ cable->driver->set_frequency( cable, new_frequency );
+}
+
+uint32_t
+cable_get_frequency( cable_t *cable )
+{
+ return cable->frequency;
+}
+
+void
+cable_wait( cable_t *cable )
+{
+ int i;
+ volatile int j;
+ uint32_t delay = cable->delay;
+
+ if (delay == 0)
+ return;
+
+ for (i = 0; i < delay; ++i) {
+ j = i;
+ }
+}
--- /dev/null
+/*
+ * $Id$
+ *
+ * Arcom JTAG Cable Driver
+ * Copyright (C) 2002, 2003 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2002, 2003.
+ *
+ */
+
+#include "sysdep.h"
+
+#include "cable.h"
+#include "parport.h"
+#include "chain.h"
+
+#include "generic.h"
+#include "generic_parport.h"
+
+/*
+ * data D[7:0] (pins 9:2)
+ */
+#define TDI 1
+#define TCK 0
+#define TMS 2
+#define TRST 3
+
+/*
+ * 7 - BUSY (pin 11)
+ * 6 - ACK (pin 10)
+ * 5 - PE (pin 12)
+ * 4 - SEL (pin 13)
+ * 3 - ERROR (pin 15)
+ */
+#define TDO 7
+
+static int
+arcom_init( cable_t *cable )
+{
+ int data;
+
+ if (parport_open( cable->link.port ))
+ return -1;
+
+ if ((data = parport_get_data( cable->link.port )) < 0) {
+ if (parport_set_data( cable->link.port, 1 << TRST ))
+ return -1;
+ PARAM_SIGNALS(cable) = CS_TRST;
+ } else
+ PARAM_SIGNALS(cable) = ((data >> TRST) && 1) ? CS_TRST : 0;
+
+ return 0;
+}
+
+static void
+arcom_clock( cable_t *cable, int tms, int tdi, int n )
+{
+ int i;
+ int trst = (PARAM_SIGNALS(cable) & CS_TRST) ? 1 : 0;
+
+ tms = tms ? 1 : 0;
+ tdi = tdi ? 1 : 0;
+
+ for (i = 0; i < n; i++) {
+ parport_set_data( cable->link.port, (trst << TRST) | (0 << TCK) | (tms << TMS) | (tdi << TDI) );
+ cable_wait( cable );
+ parport_set_data( cable->link.port, (trst << TRST) | (1 << TCK) | (tms << TMS) | (tdi << TDI) );
+ cable_wait( cable );
+ }
+
+ PARAM_SIGNALS(cable) &= CS_TRST;
+ PARAM_SIGNALS(cable) |= CS_TCK;
+ PARAM_SIGNALS(cable) |= tms ? CS_TMS : 0;
+ PARAM_SIGNALS(cable) |= tdi ? CS_TDI : 0;
+}
+
+static int
+arcom_get_tdo( cable_t *cable )
+{
+ int trst = (PARAM_SIGNALS(cable) & CS_TRST) ? 1 : 0;
+
+ parport_set_data( cable->link.port, (trst << TRST) | (0 << TCK) );
+ PARAM_SIGNALS(cable) &= ~(CS_TDI | CS_TCK | CS_TMS);
+
+ cable_wait( cable );
+
+ return (parport_get_status( cable->link.port ) >> TDO) & 1;
+}
+
+static int
+arcom_set_signal( cable_t *cable, int mask, int val )
+{
+ int prev_sigs = PARAM_SIGNALS(cable);
+
+ mask &= (CS_TDI | CS_TCK | CS_TMS | CS_TRST); // only these can be modified
+
+ if (mask != 0)
+ {
+ int data = 0;
+ int sigs = (prev_sigs & ~mask) | (val & mask);
+ data |= (sigs & CS_TDI) ? (1 << TDI) : 0;
+ data |= (sigs & CS_TCK) ? (1 << TCK) : 0;
+ data |= (sigs & CS_TMS) ? (1 << TMS) : 0;
+ data |= (sigs & CS_TRST) ? (1 << TRST) : 0;
+ parport_set_data( cable->link.port, data );
+ PARAM_SIGNALS(cable) = sigs;
+ }
+
+ return prev_sigs;
+}
+
+cable_driver_t arcom_cable_driver = {
+ "ARCOM",
+ N_("Arcom JTAG Cable"),
+ generic_parport_connect,
+ generic_disconnect,
+ generic_parport_free,
+ arcom_init,
+ generic_parport_done,
+ generic_set_frequency,
+ arcom_clock,
+ arcom_get_tdo,
+ generic_transfer,
+ arcom_set_signal,
+ generic_get_signal,
+ generic_flush_one_by_one,
+ generic_parport_help
+};
--- /dev/null
+/*
+ * $Id$
+ *
+ * Altera ByteBlaster/ByteBlaster II/ByteBlasterMV Parallel Port Download Cable Driver
+ * Copyright (C) 2002, 2003 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2002, 2003.
+ *
+ * Documentation:
+ * [1] Altera Corporation, "ByteBlaster Parallel Port Download Cable Data Sheet",
+ * February 1998, ver. 2.01, Order Number: A-DS-BYTE-02.01
+ * [2] Altera Corporation, "ByteBlasterMV Parallel Port Download Cable Data Sheet",
+ * July 2002, Version 3.3, Order Number: DS-BYTBLMV-3.3
+ * [3] Altera Corporation, "ByteBlaster II Parallel Port Download Cable Data Sheet",
+ * December 2002, Version 1.0, Order Number: DS-BYTEBLSTRII-1.0 L01-08739-00
+ *
+ */
+
+#include "sysdep.h"
+
+#include "cable.h"
+#include "parport.h"
+#include "chain.h"
+
+#include "generic.h"
+#include "generic_parport.h"
+
+/*
+ * data D[7:0] (pins 9:2)
+ */
+#define TDI 6
+#define TCK 0
+#define TMS 1
+#define BB_CHECK 5
+
+/*
+ * 7 - BUSY (pin 11)
+ * 6 - ACK (pin 10)
+ * 5 - PE (pin 12)
+ * 4 - SEL (pin 13)
+ * 3 - ERROR (pin 15)
+ */
+#define TDO 7
+#define BB_PRESENT 6
+#define VCC_OK_N 3
+
+/*
+ * 0 - STROBE (pin 1)
+ * 1 - AUTOFD (pin 14)
+ * 2 - INIT (pin 16)
+ * 3 - SELECT (pin 17)
+*/
+#define BB_ENABLE 0xC
+
+static int
+byteblaster_init( cable_t *cable )
+{
+ int BB_II = 0;
+
+ if (parport_open( cable->link.port ))
+ return -1;
+
+ PARAM_SIGNALS(cable) = CS_TRST;
+
+ /* check if a ByteBlaster or ByteBlasterMV is connected */
+ parport_set_data( cable->link.port, 1 << BB_CHECK);
+ if ( !( ( parport_get_status( cable->link.port ) >> BB_PRESENT ) & 1 ) )
+ BB_II = 1;
+ parport_set_data( cable->link.port, 0);
+ if ( ( parport_get_status( cable->link.port ) >> BB_PRESENT ) & 1 )
+ BB_II = 1;
+
+ /* check if the power supply is ok (only for ByteBlaster II) */
+ /* if no ByteBlaster at all is connected this check will fail, too */
+ if ( ( BB_II ) && ( ( parport_get_status( cable->link.port ) >> VCC_OK_N ) & 1 ) )
+ return -1;
+
+ /* Enable ByteBlaster */
+ parport_set_control( cable->link.port, BB_ENABLE );
+
+ return 0;
+}
+
+static void
+byteblaster_clock( cable_t *cable, int tms, int tdi, int n )
+{
+ int i;
+
+ tms = tms ? 1 : 0;
+ tdi = tdi ? 1 : 0;
+
+ for (i = 0; i < n; i++) {
+ parport_set_data( cable->link.port, (0 << TCK) | (tms << TMS) | (tdi << TDI) );
+ cable_wait( cable );
+ parport_set_data( cable->link.port, (1 << TCK) | (tms << TMS) | (tdi << TDI) );
+ cable_wait( cable );
+ }
+
+ PARAM_SIGNALS(cable) &= CS_TRST;
+ PARAM_SIGNALS(cable) |= CS_TCK;
+ PARAM_SIGNALS(cable) |= tms ? CS_TMS : 0;
+ PARAM_SIGNALS(cable) |= tdi ? CS_TDI : 0;
+}
+
+static int
+byteblaster_get_tdo( cable_t *cable )
+{
+ parport_set_data( cable->link.port, 0 << TCK );
+ PARAM_SIGNALS(cable) &= ~(CS_TDI | CS_TCK | CS_TMS);
+
+ cable_wait( cable );
+
+ return (parport_get_status( cable->link.port ) >> TDO) & 1;
+}
+
+static int
+byteblaster_set_signal( cable_t *cable, int mask, int val )
+{
+ int prev_sigs = PARAM_SIGNALS(cable);
+
+ mask &= (CS_TDI | CS_TCK | CS_TMS); // only these can be modified
+
+ if (mask != 0)
+ {
+ int data = 0;
+ int sigs = (prev_sigs & ~mask) | (val & mask);
+ data |= (sigs & CS_TDI) ? (1 << TDI) : 0;
+ data |= (sigs & CS_TCK) ? (1 << TCK) : 0;
+ data |= (sigs & CS_TMS) ? (1 << TMS) : 0;
+ parport_set_data( cable->link.port, data );
+ PARAM_SIGNALS(cable) = sigs;
+ }
+
+ return prev_sigs;
+}
+
+cable_driver_t byteblaster_cable_driver = {
+ "ByteBlaster",
+ N_("Altera ByteBlaster/ByteBlaster II/ByteBlasterMV Parallel Port Download Cable"),
+ generic_parport_connect,
+ generic_disconnect,
+ generic_parport_free,
+ byteblaster_init,
+ generic_parport_done,
+ generic_set_frequency,
+ byteblaster_clock,
+ byteblaster_get_tdo,
+ generic_transfer,
+ byteblaster_set_signal,
+ generic_get_signal,
+ generic_flush_one_by_one,
+ generic_parport_help
+};
--- /dev/null
+/*
+ * $Id$
+ *
+ * Generic command buffer handler.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Arnim Laeuger, 2008.
+ *
+ */
+
+#include <stdlib.h>
+#include <string.h>
+
+#include "sysdep.h"
+
+#include "generic.h"
+#include "generic_usbconn.h"
+
+#include "cmd_xfer.h"
+
+
+/*****************************************************************************
+ * extend_cmd_buffer( cmd )
+ *
+ * Extends the buffer of the given command if a new byte wouldn't fit into
+ * the current buffer size.
+ *
+ * cmd : pointer to cx_cmd_t
+ *
+ * Return value:
+ * 0 : Error occured, not enough memory
+ * 1 : All ok
+ *
+ ****************************************************************************/
+static int
+extend_cmd_buffer( cx_cmd_t *cmd )
+{
+ /* check size of cmd buffer and increase it if not sufficient */
+ if (cmd->buf_pos >= cmd->buf_len)
+ {
+ cmd->buf_len *= 2;
+ if (cmd->buf)
+ cmd->buf = (uint8_t *)realloc( cmd->buf, cmd->buf_len );
+ }
+
+ return cmd->buf ? 1 : 0;
+}
+
+
+/*****************************************************************************
+ * cx_cmd_space( cmd, max_len )
+ *
+ * Return the difference between actually allocated bytes in the buffer of
+ * the current last command and max_len. If there are already more bytes
+ * allocated than max_len, this function will return zero.
+ *
+ * cmd : pointer to cx_cmd_t struct
+ * max_len : upper limit for the space to allocate
+ *
+ * Return value:
+ * 0 : No space left
+ * >0: Number of bytes left
+ *
+ ****************************************************************************/
+int
+cx_cmd_space( cx_cmd_root_t *cmd_root, int max_len )
+{
+ int n;
+ cx_cmd_t *cmd = cmd_root->last;
+
+ if (!cmd)
+ return max_len;
+
+ n = max_len - cmd->buf_pos;
+ if (n < 0)
+ return 0;
+
+ return n;
+}
+
+
+/*****************************************************************************
+ * cx_cmd_push( cmd, d )
+ *
+ * Pushes the byte value d to the buffer of the current last command.
+ *
+ * cmd_root : pointer to cx_cmd_root_t struct
+ * d : new value to be pushed
+ *
+ * Return value:
+ * 0 : Error occured
+ * 1 : All ok
+ *
+ ****************************************************************************/
+int
+cx_cmd_push( cx_cmd_root_t *cmd_root, uint8_t d )
+{
+ cx_cmd_t *cmd = cmd_root->last;
+
+ if (!cmd)
+ return 0;
+
+ if (!extend_cmd_buffer( cmd ))
+ return 0;
+
+ cmd->buf[cmd->buf_pos++] = d;
+
+ return 1;
+}
+
+
+/*****************************************************************************
+ * cx_cmd_dequeue( cmd_root )
+ *
+ * Dequeues the first command.
+ *
+ * cmd_root : pointer to cx_cmd_root_t parameter struct
+ *
+ * Return value:
+ * NULL : Error occured
+ * <>NULL : All ok, pointer to dequeued cx_cmd_t
+ *
+ ****************************************************************************/
+cx_cmd_t *
+cx_cmd_dequeue( cx_cmd_root_t *cmd_root )
+{
+ cx_cmd_t *cmd = cmd_root->first;
+
+ if (cmd)
+ {
+ if ((cmd_root->first = cmd->next) == NULL)
+ cmd_root->last = NULL;
+ cmd->next = NULL;
+ }
+
+ return cmd;
+}
+
+
+/*****************************************************************************
+ * cx_cmd_free( cmd )
+ *
+ * Frees allocated memory of specified cmd structure.
+ *
+ * cmd : pointer to cx_cmd_t
+ *
+ * Return value:
+ * none
+ *
+ ****************************************************************************/
+void
+cx_cmd_free( cx_cmd_t *cmd )
+{
+ if (cmd)
+ {
+ if (cmd->buf)
+ free( cmd->buf );
+ free( cmd );
+ }
+}
+
+
+/*****************************************************************************
+ * cx_cmd_queue( cmd_root, to_recv )
+ *
+ * Allocates a new cx_cmd_t and queues it at the end of the command
+ * queue. The value of to_recv will be stored in the new cmd element,
+ * set to 0 if this command will not generate receive bytes.
+ *
+ * cmd_root : pointer to cx_cmd_root_t parameter struct
+ * to_recv : number of receive bytes that this command will generate
+ *
+ * Return value:
+ * NULL : Error occured
+ * <>NULL : All ok, pointer to allocated cx_cmd_t
+ *
+ ****************************************************************************/
+cx_cmd_t *
+cx_cmd_queue( cx_cmd_root_t *cmd_root, uint32_t to_recv )
+{
+ cx_cmd_t *cmd = (cx_cmd_t *)malloc( sizeof( cx_cmd_t ) );
+
+ if (cmd)
+ {
+ cmd->buf_len = 64;
+ if ((cmd->buf = (uint8_t *)malloc( cmd->buf_len )) == NULL)
+ {
+ free( cmd );
+ cmd = NULL;
+ }
+ else
+ {
+ cmd->buf_pos = 0;
+ cmd->to_recv = to_recv;
+ cmd->next = NULL;
+ if (!cmd_root->first)
+ cmd_root->first = cmd;
+ if (cmd_root->last)
+ cmd_root->last->next = cmd;
+ cmd_root->last = cmd;
+ }
+ }
+
+ return cmd;
+}
+
+
+/*****************************************************************************
+ * cx_cmd_init( cmd_root )
+ *
+ * Initializes the command root structure.
+ *
+ * cmd_root : pointer to cx_cmd_root_t
+ *
+ * Return value:
+ * none
+ *
+ ****************************************************************************/
+void
+cx_cmd_init( cx_cmd_root_t *cmd_root )
+{
+ cmd_root->first = NULL;
+ cmd_root->last = NULL;
+}
+
+
+/*****************************************************************************
+ * cx_cmd_deinit( cmd_root )
+ *
+ * Deinitialzes and frees all elements from the command root structure.
+ *
+ * cmd_root : pointer to cx_cmd_root_t
+ *
+ * Return value:
+ * none
+ *
+ ****************************************************************************/
+void
+cx_cmd_deinit( cx_cmd_root_t *cmd_root )
+{
+ cx_cmd_t *cmd;
+ while (cmd_root->first)
+ {
+ cmd = cx_cmd_dequeue( cmd_root );
+ cx_cmd_free( cmd );
+ }
+}
+
+
+/*****************************************************************************
+ * cx_xfer( cmd_root, out_cmd, cable, how_much )
+ *
+ * Unrolls the queued commands and posts their payload to the usbconn driver.
+ * NB: usbconn_write will buffer the accumulated payload until usbconn_read
+ * is called.
+ *
+ * Flushing of the posted payload bytes is triggered when how_much
+ * requests to do so or if receive bytes are expected.
+ *
+ * cmd_root : pointer to cx_cmd_root_t struct
+ * out_cmd : pointer to cx_cmd_t for an optional command that is appended
+ * to send buffer in case commands have been scheduled that
+ * yield return/receive data from the device
+ * cable : current cable_t
+ * how_much : cable_flush_amount_t value specifying the flush strategy
+ *
+ * Return value:
+ * none
+ *
+ ****************************************************************************/
+void
+cx_xfer( cx_cmd_root_t *cmd_root, const cx_cmd_t *out_cmd,
+ cable_t *cable, cable_flush_amount_t how_much )
+{
+ cx_cmd_t *cmd = cx_cmd_dequeue( cmd_root );
+ uint32_t bytes_to_recv;
+
+ bytes_to_recv = 0;
+
+ while (cmd)
+ {
+ /* Step 1: copy command bytes buffered for sending them later
+ through the usbconn driver */
+ bytes_to_recv += cmd->to_recv;
+ /* write command data (buffered) */
+ usbconn_write( cable->link.usb, cmd->buf, cmd->buf_pos, cmd->to_recv );
+ cx_cmd_free( cmd );
+ cmd = cx_cmd_dequeue( cmd_root );
+ }
+
+ /* it's possible for the caller to define an extra command that is
+ appended right before sending commands to the device in case output
+ data is expected */
+ if (bytes_to_recv && out_cmd)
+ {
+ usbconn_write( cable->link.usb, out_cmd->buf, out_cmd->buf_pos, out_cmd->to_recv );
+ bytes_to_recv += out_cmd->to_recv;
+ }
+
+ if (bytes_to_recv || (how_much != TO_OUTPUT))
+ {
+ /* Step 2: flush scheduled bytes */
+ usbconn_read( cable->link.usb, NULL, 0 );
+
+ bytes_to_recv = 0;
+ }
+}
+
+
+/*****************************************************************************
+ * cx_xfer_recv( cable )
+ *
+ * Extracts the byte at the current position from the receive buffer.
+ *
+ * cable : pointer to the current cable struct
+ *
+ * Return value:
+ * Byte value from receive buffer
+ *
+ ****************************************************************************/
+uint8_t
+cx_xfer_recv( cable_t *cable )
+{
+ uint8_t buf;
+
+ if (usbconn_read( cable->link.usb, &buf, 1 ) == 1)
+ {
+ return buf;
+ }
+ else
+ return 0;
+}
+
+
+/*
+ Local Variables:
+ mode:C
+ c-default-style:gnu
+ indent-tabs-mode:nil
+ End:
+*/
--- /dev/null
+/*
+ * $Id$
+ *
+ * Generic command buffer handler.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Arnim Laeuger, 2008.
+ *
+ */
+
+#ifndef CMD_XFER_H
+#define CMD_XFER_H
+
+#include "sysdep.h"
+
+#include <cable.h>
+
+/* description of a command
+ the buffer can contain one or more commands if receive count
+ is zero for all of them */
+typedef struct cx_cmd cx_cmd_t;
+struct cx_cmd {
+ cx_cmd_t *next;
+ uint32_t buf_len;
+ uint32_t buf_pos;
+ uint8_t *buf;
+ uint32_t to_recv;
+};
+
+struct cx_cmd_root {
+ cx_cmd_t *first;
+ cx_cmd_t *last;
+};
+typedef struct cx_cmd_root cx_cmd_root_t;
+
+int cx_cmd_space( cx_cmd_root_t *cmd_root, int max_len );
+int cx_cmd_push( cx_cmd_root_t *cmd_root, uint8_t d);
+cx_cmd_t *cx_cmd_dequeue( cx_cmd_root_t *cmd_root );
+void cx_cmd_free( cx_cmd_t *cmd );
+cx_cmd_t *cx_cmd_queue( cx_cmd_root_t *cmd_root, uint32_t to_recv );
+void cx_cmd_init( cx_cmd_root_t *cmd_root );
+void cx_cmd_deinit( cx_cmd_root_t *cmd_root );
+
+void cx_xfer( cx_cmd_root_t *cmd_root, const cx_cmd_t *out_cmd,
+ cable_t *cable, cable_flush_amount_t how_much );
+uint8_t cx_xfer_recv( cable_t *cable );
+
+#endif /* CMD_XFER_H */
--- /dev/null
+/*
+ * $Id$
+ *
+ * Xilinx DLC5 JTAG Parallel Cable III Driver
+ * Copyright (C) 2002, 2003 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2002, 2003.
+ *
+ * Documentation:
+ * [1] Xilinx, Inc., "JTAG Programmer Guide",
+ * http://toolbox.xilinx.com/docsan/3_1i/pdf/docs/jtg/jtg.pdf
+ *
+ */
+
+#include "sysdep.h"
+
+#include "cable.h"
+#include "parport.h"
+#include "chain.h"
+
+#include "generic.h"
+#include "generic_parport.h"
+
+/* see Figure B-1 in [1] */
+
+/*
+ * data D[7:0] (pins 9:2)
+ */
+#define TDI 0
+#define TCK 1
+#define TMS 2
+#define CTRL 3
+#define PROG 4
+
+/*
+ * 7 - BUSY (pin 11)
+ * 6 - ACK (pin 10)
+ * 5 - PE (pin 12)
+ * 4 - SEL (pin 13)
+ * 3 - ERROR (pin 15)
+ */
+#define TDO 4
+
+static int
+dlc5_init( cable_t *cable )
+{
+ if (parport_open( cable->link.port ))
+ return -1;
+
+ PARAM_SIGNALS(cable) = CS_TRST;
+
+ return 0;
+}
+
+static void
+dlc5_clock( cable_t *cable, int tms, int tdi, int n )
+{
+ int i;
+
+ tms = tms ? 1 : 0;
+ tdi = tdi ? 1 : 0;
+
+ for (i = 0; i < n; i++) {
+ parport_set_data( cable->link.port, (1 << PROG) | (0 << TCK) | (tms << TMS) | (tdi << TDI) );
+ cable_wait( cable );
+ parport_set_data( cable->link.port, (1 << PROG) | (1 << TCK) | (tms << TMS) | (tdi << TDI) );
+ cable_wait( cable );
+ }
+
+ PARAM_SIGNALS(cable) &= CS_TRST;
+ PARAM_SIGNALS(cable) |= CS_TCK;
+ PARAM_SIGNALS(cable) |= tms ? CS_TMS : 0;
+ PARAM_SIGNALS(cable) |= tdi ? CS_TDI : 0;
+}
+
+static int
+dlc5_get_tdo( cable_t *cable )
+{
+ parport_set_data( cable->link.port, (1 << PROG) | ( 0 << TCK ) );
+ PARAM_SIGNALS(cable) &= ~(CS_TDI | CS_TCK | CS_TMS);
+
+ cable_wait( cable );
+
+ return (parport_get_status( cable->link.port ) >> TDO) & 1;
+}
+
+static int
+dlc5_set_signal( cable_t *cable, int mask, int val )
+{
+ int prev_sigs = PARAM_SIGNALS(cable);
+
+ mask &= (CS_TDI | CS_TCK | CS_TMS); // only these can be modified
+
+ if (mask != 0)
+ {
+ int data = 0;
+ int sigs = (prev_sigs & ~mask) | (val & mask);
+ data |= (sigs & CS_TDI) ? (1 << TDI) : 0;
+ data |= (sigs & CS_TCK) ? (1 << TCK) : 0;
+ data |= (sigs & CS_TMS) ? (1 << TMS) : 0;
+ parport_set_data( cable->link.port, ( 1 << PROG ) | data );
+ PARAM_SIGNALS(cable) = sigs;
+ }
+
+ return prev_sigs;
+}
+
+cable_driver_t dlc5_cable_driver = {
+ "DLC5",
+ N_("Xilinx DLC5 JTAG Parallel Cable III"),
+ generic_parport_connect,
+ generic_disconnect,
+ generic_parport_free,
+ dlc5_init,
+ generic_parport_done,
+ generic_set_frequency,
+ dlc5_clock,
+ dlc5_get_tdo,
+ generic_transfer,
+ dlc5_set_signal,
+ generic_get_signal,
+ generic_flush_one_by_one,
+ generic_parport_help
+};
--- /dev/null
+/*
+ * $Id$
+ *
+ * ETC EA253 JTAG Cable Driver
+ * Copyright (C) 2002, 2003 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2002, 2003.
+ *
+ */
+
+#include "sysdep.h"
+
+#include "cable.h"
+#include "parport.h"
+#include "chain.h"
+
+#include "generic.h"
+#include "generic_parport.h"
+
+/*
+ * data D[7:0] (pins 9:2)
+ */
+#define TDI 0
+#define TCK 1
+#define TMS 2
+#define TRST 4
+
+/*
+ * 7 - BUSY (pin 11)
+ * 6 - ACK (pin 10)
+ * 5 - PE (pin 12)
+ * 4 - SEL (pin 13)
+ * 3 - ERROR (pin 15)
+ */
+#define TDO 4
+
+static int
+ea253_init( cable_t *cable )
+{
+ int data;
+
+ if (parport_open( cable->link.port ))
+ return -1;
+
+ if ((data = parport_get_data( cable->link.port )) < 0) {
+ if (parport_set_data( cable->link.port, 1 << TRST ))
+ return -1;
+ PARAM_SIGNALS(cable) = CS_TRST;
+ } else
+ PARAM_SIGNALS(cable) = ((data >> TRST) && 1) ? CS_TRST : 0;
+
+ return 0;
+}
+
+static void
+ea253_clock( cable_t *cable, int tms, int tdi, int n )
+{
+ int i;
+ int trst = (PARAM_SIGNALS(cable) & CS_TRST) ? 1 : 0;
+
+ tms = tms ? 1 : 0;
+ tdi = tdi ? 1 : 0;
+
+ for (i = 0; i < n; i++) {
+ parport_set_data( cable->link.port, (trst << TRST) | (0 << TCK) | (tms << TMS) | (tdi << TDI) );
+ cable_wait( cable );
+ parport_set_data( cable->link.port, (trst << TRST) | (1 << TCK) | (tms << TMS) | (tdi << TDI) );
+ cable_wait( cable );
+ }
+
+ PARAM_SIGNALS(cable) &= CS_TRST;
+ PARAM_SIGNALS(cable) |= CS_TCK;
+ PARAM_SIGNALS(cable) |= tms ? CS_TMS : 0;
+ PARAM_SIGNALS(cable) |= tdi ? CS_TDI : 0;
+}
+
+static int
+ea253_get_tdo( cable_t *cable )
+{
+ int trst = (PARAM_SIGNALS(cable) & CS_TRST) ? 1 : 0;
+
+ parport_set_data( cable->link.port, (trst << TRST) | (0 << TCK) );
+ PARAM_SIGNALS(cable) &= ~(CS_TDI | CS_TCK | CS_TMS);
+
+ cable_wait( cable );
+
+ return (parport_get_status( cable->link.port ) >> TDO) & 1;
+}
+
+static int
+ea253_set_signal( cable_t *cable, int mask, int val )
+{
+ int prev_sigs = PARAM_SIGNALS(cable);
+
+ mask &= (CS_TDI | CS_TCK | CS_TMS | CS_TRST); // only these can be modified
+
+ if (mask != 0)
+ {
+ int data = 0;
+ int sigs = (prev_sigs & ~mask) | (val & mask);
+ data |= (sigs & CS_TDI) ? (1 << TDI) : 0;
+ data |= (sigs & CS_TCK) ? (1 << TCK) : 0;
+ data |= (sigs & CS_TMS) ? (1 << TMS) : 0;
+ data |= (sigs & CS_TRST) ? (1 << TRST) : 0;
+ parport_set_data( cable->link.port, data );
+ PARAM_SIGNALS(cable) = sigs;
+ }
+
+ return prev_sigs;
+}
+
+cable_driver_t ea253_cable_driver = {
+ "EA253",
+ N_("ETC EA253 JTAG Cable"),
+ generic_parport_connect,
+ generic_disconnect,
+ generic_parport_free,
+ ea253_init,
+ generic_parport_done,
+ generic_set_frequency,
+ ea253_clock,
+ ea253_get_tdo,
+ generic_transfer,
+ ea253_set_signal,
+ generic_get_signal,
+ generic_flush_one_by_one,
+ generic_parport_help
+};
--- /dev/null
+/*
+ * $Id$
+ *
+ * ETC EI012 JTAG Cable Driver
+ * Copyright (C) 2002, 2003 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2002, 2003.
+ *
+ */
+
+#include "sysdep.h"
+
+#include "cable.h"
+#include "parport.h"
+#include "chain.h"
+
+#include "generic.h"
+#include "generic_parport.h"
+
+/*
+ * data D[7:0] (pins 9:2)
+ */
+#define TCK 0
+#define TDI 1
+#define TMS 2
+#define TRST 4
+
+/*
+ * status
+ *
+ * 7 - BUSY (pin 11)
+ * 6 - ACK (pin 10)
+ * 5 - PE (pin 12)
+ * 4 - SEL (pin 13)
+ * 3 - ERROR (pin 15)
+ */
+#define TDO 7
+
+static int
+ei012_init( cable_t *cable )
+{
+ int data;
+
+ if (parport_open( cable->link.port ))
+ return -1;
+
+ if ((data = parport_get_data( cable->link.port )) < 0) {
+ if (parport_set_data( cable->link.port, 1 << TRST ))
+ return -1;
+ PARAM_SIGNALS(cable) = CS_TRST;
+ } else
+ PARAM_SIGNALS(cable) = ((data >> TRST) && 1) ? CS_TRST : 0;
+
+ return 0;
+}
+
+static void
+ei012_clock( cable_t *cable, int tms, int tdi, int n )
+{
+ int i;
+ int trst = (PARAM_SIGNALS(cable) & CS_TRST) ? 1 : 0;
+
+ tms = tms ? 1 : 0;
+ tdi = tdi ? 1 : 0;
+
+ for (i = 0; i < n; i++) {
+ parport_set_data( cable->link.port, (trst << TRST) | (0 << TCK) | (tms << TMS) | (tdi << TDI) );
+ cable_wait( cable );
+ parport_set_data( cable->link.port, (trst << TRST) | (1 << TCK) | (tms << TMS) | (tdi << TDI) );
+ cable_wait( cable );
+ }
+
+ PARAM_SIGNALS(cable) &= CS_TRST;
+ PARAM_SIGNALS(cable) |= CS_TCK;
+ PARAM_SIGNALS(cable) |= tms ? CS_TMS : 0;
+ PARAM_SIGNALS(cable) |= tdi ? CS_TDI : 0;
+}
+
+static int
+ei012_get_tdo( cable_t *cable )
+{
+ int trst = (PARAM_SIGNALS(cable) & CS_TRST) ? 1 : 0;
+
+ parport_set_data( cable->link.port, (trst << TRST) | (0 << TCK) );
+ PARAM_SIGNALS(cable) &= ~(CS_TDI | CS_TCK | CS_TMS);
+
+ cable_wait( cable );
+
+ return (parport_get_status( cable->link.port ) >> TDO) & 1;
+}
+
+static int
+ei012_set_signal( cable_t *cable, int mask, int val )
+{
+ int prev_sigs = PARAM_SIGNALS(cable);
+
+ mask &= (CS_TDI | CS_TCK | CS_TMS | CS_TRST); // only these can be modified
+
+ if (mask != 0)
+ {
+ int data = 0;
+ int sigs = (prev_sigs & ~mask) | (val & mask);
+ data |= (sigs & CS_TDI) ? (1 << TDI) : 0;
+ data |= (sigs & CS_TCK) ? (1 << TCK) : 0;
+ data |= (sigs & CS_TMS) ? (1 << TMS) : 0;
+ data |= (sigs & CS_TRST) ? (1 << TRST) : 0;
+ parport_set_data( cable->link.port, data );
+ PARAM_SIGNALS(cable) = sigs;
+ }
+
+ return prev_sigs;
+}
+
+cable_driver_t ei012_cable_driver = {
+ "EI012",
+ N_("ETC EI012 JTAG Cable"),
+ generic_parport_connect,
+ generic_disconnect,
+ generic_parport_free,
+ ei012_init,
+ generic_parport_done,
+ generic_set_frequency,
+ ei012_clock,
+ ei012_get_tdo,
+ generic_transfer,
+ ei012_set_signal,
+ generic_get_signal,
+ generic_flush_one_by_one,
+ generic_parport_help
+};
--- /dev/null
+/*
+ * $Id$
+ *
+ * Generic cable driver for FTDI's FT2232C chip in MPSSE mode.
+ * Copyright (C) 2007 A. Laeuger
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Arnim Laeuger, 2007-2008.
+ * Support for JTAGkey submitted by Laurent Gauch, 2008.
+ *
+ */
+
+#include <stdlib.h>
+#include <string.h>
+
+#include "sysdep.h"
+
+#include <cable.h>
+#include <chain.h>
+#include <cmd.h>
+
+#include "generic.h"
+#include "generic_usbconn.h"
+
+#include "usbconn.h"
+#include "usbconn/libftdx.h"
+
+#include "cmd_xfer.h"
+
+/* Maximum TCK frequency of FT2232 */
+#define FT2232_MAX_TCK_FREQ 6000000
+
+/* The default driver if not specified otherwise during connect */
+#ifdef ENABLE_LOWLEVEL_FTD2XX
+#define DEFAULT_DRIVER "ftd2xx-mpsse"
+#else
+#define DEFAULT_DRIVER "ftdi-mpsse"
+#endif
+
+
+/* repeat the definitions for MPSSE command processor here
+ since we cannot rely on the existence of ftdi.h even though
+ they're defined there */
+
+/* Shifting commands IN MPSSE Mode*/
+#define MPSSE_WRITE_NEG 0x01 /* Write TDI/DO on negative TCK/SK edge*/
+#define MPSSE_BITMODE 0x02 /* Write bits, not bytes */
+#define MPSSE_READ_NEG 0x04 /* Sample TDO/DI on negative TCK/SK edge */
+#define MPSSE_LSB 0x08 /* LSB first */
+#define MPSSE_DO_WRITE 0x10 /* Write TDI/DO */
+#define MPSSE_DO_READ 0x20 /* Read TDO/DI */
+#define MPSSE_WRITE_TMS 0x40 /* Write TMS/CS */
+
+/* FTDI MPSSE commands */
+#define SET_BITS_LOW 0x80
+/*BYTE DATA*/
+/*BYTE Direction*/
+#define SET_BITS_HIGH 0x82
+/*BYTE DATA*/
+/*BYTE Direction*/
+#define GET_BITS_LOW 0x81
+#define GET_BITS_HIGH 0x83
+#define LOOPBACK_START 0x84
+#define LOOPBACK_END 0x85
+#define TCK_DIVISOR 0x86
+#define SEND_IMMEDIATE 0x87
+
+
+/* bit and bitmask definitions for GPIO commands */
+#define BIT_TCK 0
+#define BIT_TDI 1
+#define BIT_TDO 2
+#define BIT_TMS 3
+#define BITMASK_TDO (1 << BIT_TDO)
+#define BITMASK_TDI (1 << BIT_TDI)
+#define BITMASK_TCK (1 << BIT_TCK)
+#define BITMASK_TMS (1 << BIT_TMS)
+
+/* bit and bitmask definitions for Amontec JTAGkey */
+#define BIT_JTAGKEY_nOE 4
+#define BIT_JTAGKEY_TRST_N_OUT 0
+#define BIT_JTAGKEY_SRST_N_OUT 1
+#define BIT_JTAGKEY_TRST_N_OE_N 2
+#define BIT_JTAGKEY_SRST_N_OE_N 3
+#define BITMASK_JTAGKEY_nOE (1 << BIT_JTAGKEY_nOE)
+#define BITMASK_JTAGKEY_TRST_N_OUT (1 << BIT_JTAGKEY_TRST_N_OUT)
+#define BITMASK_JTAGKEY_SRST_N_OUT (1 << BIT_JTAGKEY_SRST_N_OUT)
+#define BITMASK_JTAGKEY_TRST_N_OE_N (1 << BIT_JTAGKEY_TRST_N_OE_N)
+#define BITMASK_JTAGKEY_SRST_N_OE_N (1 << BIT_JTAGKEY_SRST_N_OE_N)
+
+/* bit and bitmask definitions for Olimex ARM-USB-OCD */
+#define BIT_ARMUSBOCD_nOE 4
+#define BIT_ARMUSBOCD_nTRST 0
+#define BIT_ARMUSBOCD_nTSRST 1
+#define BIT_ARMUSBOCD_nTRST_nOE 2
+#define BIT_ARMUSBOCD_RED_LED 3
+#define BITMASK_ARMUSBOCD_nOE (1 << BIT_ARMUSBOCD_nOE)
+#define BITMASK_ARMUSBOCD_nTRST (1 << BIT_ARMUSBOCD_nTRST)
+#define BITMASK_ARMUSBOCD_nTSRST (1 << BIT_ARMUSBOCD_nTSRST)
+#define BITMASK_ARMUSBOCD_nTRST_nOE (1 << BIT_ARMUSBOCD_nTRST_nOE)
+#define BITMASK_ARMUSBOCD_RED_LED (1 << BIT_ARMUSBOCD_RED_LED)
+
+/* bit and bitmask definitions for Blackfin gnICE */
+#define BIT_GNICE_nTRST 1
+#define BIT_GNICE_nLED 3
+#define BITMASK_GNICE_nTRST (1 << BIT_GNICE_nTRST)
+#define BITMASK_GNICE_nLED (1 << BIT_GNICE_nLED)
+
+/* bit and bitmask definitions for OOCDLink-s */
+#define BIT_OOCDLINKS_nTRST_nOE 0
+#define BIT_OOCDLINKS_nTRST 1
+#define BIT_OOCDLINKS_nSRST_nOE 2
+#define BIT_OOCDLINKS_nSRST 3
+#define BITMASK_OOCDLINKS_nTRST_nOE (1 << BIT_OOCDLINKS_nTRST_nOE)
+#define BITMASK_OOCDLINKS_nTRST (1 << BIT_OOCDLINKS_nTRST)
+#define BITMASK_OOCDLINKS_nSRST_nOE (1 << BIT_OOCDLINKS_nSRST_nOE)
+#define BITMASK_OOCDLINKS_nSRST (1 << BIT_OOCDLINKS_nSRST)
+
+/* bit and bitmask definitions for Turtelizer 2 */
+#define BIT_TURTELIZER2_nJTAGOE 4
+#define BIT_TURTELIZER2_RST 6
+#define BIT_TURTELIZER2_nTX1LED 2
+#define BIT_TURTELIZER2_nRX1LED 3
+#define BITMASK_TURTELIZER2_nJTAGOE (1 << BIT_TURTELIZER2_nJTAGOE)
+#define BITMASK_TURTELIZER2_RST (1 << BIT_TURTELIZER2_RST)
+#define BITMASK_TURTELIZER2_nTX1LED (1 << BIT_TURTELIZER2_nTX1LED)
+#define BITMASK_TURTELIZER2_nRX1LED (1 << BIT_TURTELIZER2_nRX1LED)
+
+/* bit and bitmask definitions for USB to JTAG Interface */
+#define BIT_USBTOJTAGIF_nTRST 4
+#define BIT_USBTOJTAGIF_RST 6
+#define BIT_USBTOJTAGIF_DBGRQ 7
+#define BIT_USBTOJTAGIF_nRxLED 2
+#define BIT_USBTOJTAGIF_nTxLED 3
+#define BITMASK_USBTOJTAGIF_nTRST (1 << BIT_USBTOJTAGIF_nTRST)
+#define BITMASK_USBTOJTAGIF_RST (1 << BIT_USBTOJTAGIF_RST)
+#define BITMASK_USBTOJTAGIF_DBGRQ (1 << BIT_USBTOJTAGIF_DBGRQ)
+#define BITMASK_USBTOJTAGIF_nRxLED (1 << BIT_USBTOJTAGIF_nRxLED)
+#define BITMASK_USBTOJTAGIF_nTxLED (1 << BIT_USBTOJTAGIF_nTxLED)
+
+/* bit and bitmask definitions for Xverve DT-USB-ST Signalyzer Tool */
+#define BIT_SIGNALYZER_nTRST 4
+#define BIT_SIGNALYZER_nSRST 5
+#define BITMASK_SIGNALYZER_nTRST (1 << BIT_SIGNALYZER_nTRST)
+#define BITMASK_SIGNALYZER_nSRST (1 << BIT_SIGNALYZER_nSRST)
+
+/* bit and bitmask definitions for TinCanTools Flyswatter board*/
+#define BIT_FLYSWATTER_nLED2 3
+#define BIT_FLYSWATTER_nTRST 4
+#define BIT_FLYSWATTER_nSRST 5
+#define BIT_FLYSWATTER_nOE1 6
+#define BIT_FLYSWATTER_nOE2 7
+#define BITMASK_FLYSWATTER_nLED2 (1 << BIT_FLYSWATTER_nLED2)
+#define BITMASK_FLYSWATTER_nTRST (1 << BIT_FLYSWATTER_nTRST)
+#define BITMASK_FLYSWATTER_nSRST (1 << BIT_FLYSWATTER_nSRST)
+#define BITMASK_FLYSWATTER_nOE1 (1 << BIT_FLYSWATTER_nOE1)
+#define BITMASK_FLYSWATTER_nOE2 (1 << BIT_FLYSWATTER_nOE2)
+
+/* --- Bit and bitmask definitions for usbScarab2 --- */
+/* usbScarabeus2 is a design of Krzysztof Kajstura ( http://www.kristech.eu ). */
+/* UrJTAG support added by Tomek Cedro ( http://www.tomek.cedro.info ) */
+/* as a part of work for TP R&D (Polish Telecom, FT/Orange Group) http://www.tp.pl */
+#define BIT_USBSCARAB2_nCONNECTED 5 //ADBUS
+#define BIT_USBSCARAB2_TRST 0 //ACBUS
+#define BIT_USBSCARAB2_nSRST 1 //ACBUS
+#define BIT_USBSCARAB2_LED 3 //ACBUS
+#define BITMASK_USBSCARAB2_LED (1 << BIT_USBSCARAB2_LED)
+#define BITMASK_USBSCARAB2_TRST (1 << BIT_USBSCARAB2_TRST)
+#define BITMASK_USBSCARAB2_nSRST (1 << BIT_USBSCARAB2_nSRST)
+#define BITMASK_USBSCARAB2_nCONNECTED (1 << BIT_USBSCARAB2_nCONNECTED)
+
+
+
+typedef struct {
+ uint32_t mpsse_frequency;
+
+ /* this driver issues several "Set Data Bits Low Byte" commands
+ here is the place where cable specific values can be stored
+ that are used each time this command is issued */
+ uint8_t low_byte_value;
+ uint8_t low_byte_dir;
+
+ /* this driver issues several "Set Data Bits High Byte" commands
+ here is the place where cable specific values can be stored
+ that are used each time this command is issued */
+ uint8_t high_byte_value;
+ uint8_t high_byte_dir;
+
+ /* the following variables store the bit position of TRST and RESET (SRST)
+ for XOR'ing with the default values of low_byte_value and high_byte_value
+ allowed values:
+ < 0 : feature not used
+ < 8 : applies to low byte
+ < 12 : applies to high byte */
+ int bit_trst;
+ int bit_reset;
+
+ /* variables to save last TDO value
+ this acts as a cache to prevent multiple "Read Data Bits Low" transfer
+ over USB for ft2232_get_tdo */
+ unsigned int last_tdo_valid;
+ unsigned int last_tdo;
+ int signals;
+
+ cx_cmd_root_t cmd_root;
+} params_t;
+
+
+static const uint8_t imm_buf[1] = {SEND_IMMEDIATE};
+static const cx_cmd_t imm_cmd = {NULL, 1, 1, (uint8_t *)imm_buf, 0};
+
+
+static void
+ft2232_set_frequency( cable_t *cable, uint32_t new_frequency )
+{
+ params_t *params = (params_t *)cable->params;
+ cx_cmd_root_t *cmd_root = &(params->cmd_root);
+
+ if (!new_frequency || new_frequency > FT2232_MAX_TCK_FREQ)
+ new_frequency = FT2232_MAX_TCK_FREQ;
+
+ /* update ft2232 frequency if cable setting changed */
+ if (new_frequency != params->mpsse_frequency)
+ {
+ uint32_t div;
+
+ div = FT2232_MAX_TCK_FREQ / new_frequency;
+ if (FT2232_MAX_TCK_FREQ % new_frequency)
+ div++;
+
+ if (div >= (1 << 16))
+ {
+ div = (1 << 16) - 1;
+ printf( _("Warning: Setting lowest supported frequency for FT2232: %d\n"), FT2232_MAX_TCK_FREQ/div );
+ }
+
+ /* send new divisor to device */
+ div -= 1;
+ cx_cmd_queue( cmd_root, 0 );
+ cx_cmd_push( cmd_root, TCK_DIVISOR );
+ cx_cmd_push( cmd_root, div & 0xff );
+ cx_cmd_push( cmd_root, (div >> 8) & 0xff );
+
+ cx_xfer( cmd_root, &imm_cmd, cable, COMPLETELY );
+
+ params->mpsse_frequency = FT2232_MAX_TCK_FREQ / (div + 1);
+ cable->frequency = params->mpsse_frequency;
+ }
+}
+
+
+static int
+ft2232_generic_init( cable_t *cable )
+{
+ params_t *params = (params_t *)cable->params;
+ cx_cmd_root_t *cmd_root = &(params->cmd_root);
+
+ if (usbconn_open( cable->link.usb )) return -1;
+
+ /* safe default values */
+ params->low_byte_value = 0;
+ params->low_byte_dir = 0;
+
+ /* Set Data Bits Low Byte
+ TCK = 0, TMS = 1, TDI = 0 */
+ cx_cmd_queue( cmd_root, 0 );
+ cx_cmd_push( cmd_root, SET_BITS_LOW );
+ cx_cmd_push( cmd_root, params->low_byte_value | BITMASK_TMS );
+ cx_cmd_push( cmd_root, params->low_byte_dir | BITMASK_TCK | BITMASK_TDI | BITMASK_TMS );
+
+ /* Set Data Bits High Byte */
+ params->high_byte_value = 0;
+ params->high_byte_value = 0;
+ params->high_byte_dir = 0;
+ cx_cmd_push( cmd_root, SET_BITS_HIGH );
+ cx_cmd_push( cmd_root, params->high_byte_value );
+ cx_cmd_push( cmd_root, params->high_byte_dir );
+
+ ft2232_set_frequency( cable, FT2232_MAX_TCK_FREQ );
+
+ params->bit_trst = -1; /* not used */
+ params->bit_reset = -1; /* not used */
+
+ params->last_tdo_valid = 0;
+ params->signals = 0;
+
+ return 0;
+}
+
+static int
+ft2232_jtagkey_init( cable_t *cable )
+{
+ params_t *params = (params_t *)cable->params;
+ cx_cmd_root_t *cmd_root = &(params->cmd_root);
+
+ if (usbconn_open( cable->link.usb )) return -1;
+
+ /* static low byte value and direction:
+ set nOE to '0' -> activate output enables */
+ params->low_byte_value = 0;
+ params->low_byte_dir = BITMASK_JTAGKEY_nOE;
+
+ /* Set Data Bits Low Byte
+ TCK = 0, TMS = 1, TDI = 0, nOE = 0 */
+ cx_cmd_queue( cmd_root, 0 );
+ cx_cmd_push( cmd_root, SET_BITS_LOW );
+ cx_cmd_push( cmd_root, params->low_byte_value | BITMASK_TMS );
+ cx_cmd_push( cmd_root, params->low_byte_dir | BITMASK_TCK | BITMASK_TDI | BITMASK_TMS );
+
+ /* Set Data Bits High Byte
+ default:
+ TRST_N_OUT = 1
+ TRST_N_OE_N = 0
+ SRST_N_OUT = 1
+ SRST_N_OE_N = 0 */
+ params->high_byte_value = BITMASK_JTAGKEY_TRST_N_OUT | BITMASK_JTAGKEY_SRST_N_OUT;
+ params->high_byte_dir = BITMASK_JTAGKEY_TRST_N_OUT
+ | BITMASK_JTAGKEY_TRST_N_OE_N
+ | BITMASK_JTAGKEY_SRST_N_OUT
+ | BITMASK_JTAGKEY_SRST_N_OE_N;
+ cx_cmd_push( cmd_root, SET_BITS_HIGH );
+ cx_cmd_push( cmd_root, params->high_byte_value );
+ cx_cmd_push( cmd_root, 0 );
+ cx_cmd_push( cmd_root, SET_BITS_HIGH );
+ cx_cmd_push( cmd_root, params->high_byte_value );
+ cx_cmd_push( cmd_root, params->high_byte_dir );
+
+ ft2232_set_frequency( cable, FT2232_MAX_TCK_FREQ );
+
+ params->bit_trst = BIT_JTAGKEY_TRST_N_OUT + 8; /* member of HIGH byte */
+ params->bit_reset = BIT_JTAGKEY_SRST_N_OUT + 8; /* member of HIGH byte */
+
+ params->last_tdo_valid = 0;
+ params->signals = CS_TRST | CS_RESET;
+
+ return 0;
+}
+
+
+static int
+ft2232_armusbocd_init( cable_t *cable )
+{
+ params_t *params = (params_t *)cable->params;
+ cx_cmd_root_t *cmd_root = &(params->cmd_root);
+
+ if (usbconn_open( cable->link.usb )) return -1;
+
+ /* static low byte value and direction:
+ set nOE to '0' -> activate output enables */
+ params->low_byte_value = 0;
+ params->low_byte_dir = BITMASK_ARMUSBOCD_nOE;
+
+ /* Set Data Bits Low Byte
+ TCK = 0, TMS = 1, TDI = 0, nOE = 0 */
+ cx_cmd_queue( cmd_root, 0 );
+ cx_cmd_push( cmd_root, SET_BITS_LOW );
+ cx_cmd_push( cmd_root, params->low_byte_value | BITMASK_TMS );
+ cx_cmd_push( cmd_root, params->low_byte_dir | BITMASK_TCK | BITMASK_TDI | BITMASK_TMS );
+
+ /* Set Data Bits High Byte
+ default:
+ TRST = 1
+ TRST buffer enable = 0
+ TSRST = 1
+ RED LED on */
+ params->high_byte_value = BITMASK_ARMUSBOCD_nTRST
+ | BITMASK_ARMUSBOCD_nTSRST
+ | BITMASK_ARMUSBOCD_RED_LED;
+ params->high_byte_dir = BITMASK_ARMUSBOCD_nTRST
+ | BITMASK_ARMUSBOCD_nTRST_nOE
+ | BITMASK_ARMUSBOCD_nTSRST
+ | BITMASK_ARMUSBOCD_RED_LED;
+ cx_cmd_push( cmd_root, SET_BITS_HIGH );
+ cx_cmd_push( cmd_root, params->high_byte_value );
+ cx_cmd_push( cmd_root, 0 );
+ cx_cmd_push( cmd_root, SET_BITS_HIGH );
+ cx_cmd_push( cmd_root, params->high_byte_value );
+ cx_cmd_push( cmd_root, params->high_byte_dir );
+
+ ft2232_set_frequency( cable, FT2232_MAX_TCK_FREQ );
+
+ params->bit_trst = BIT_ARMUSBOCD_nTRST + 8; /* member of HIGH byte */
+ params->bit_reset = BIT_ARMUSBOCD_nTSRST + 8; /* member of HIGH byte */
+
+ params->last_tdo_valid = 0;
+ params->signals = CS_TRST | CS_RESET;
+
+ return 0;
+}
+
+
+static int
+ft2232_gnice_init( cable_t *cable )
+{
+ params_t *params = (params_t *)cable->params;
+ cx_cmd_root_t *cmd_root = &(params->cmd_root);
+
+ if (usbconn_open( cable->link.usb )) return -1;
+
+ /* safe default values */
+ params->low_byte_value = 0;
+ params->low_byte_dir = 0;
+
+ /* Set Data Bits Low Byte
+ TCK = 0, TMS = 1, TDI = 0 */
+ cx_cmd_queue( cmd_root, 0 );
+ cx_cmd_push( cmd_root, SET_BITS_LOW );
+ cx_cmd_push( cmd_root, params->low_byte_value | BITMASK_TMS );
+ cx_cmd_push( cmd_root, params->low_byte_dir | BITMASK_TCK | BITMASK_TDI | BITMASK_TMS );
+
+ /* Set Data Bits High Byte */
+ params->high_byte_value = BITMASK_GNICE_nTRST;
+ params->high_byte_dir = BITMASK_GNICE_nTRST | BITMASK_GNICE_nLED;
+ cx_cmd_push( cmd_root, SET_BITS_HIGH );
+ cx_cmd_push( cmd_root, params->high_byte_value );
+ cx_cmd_push( cmd_root, 0 );
+ cx_cmd_push( cmd_root, SET_BITS_HIGH );
+ cx_cmd_push( cmd_root, params->high_byte_value );
+ cx_cmd_push( cmd_root, params->high_byte_dir );
+
+ ft2232_set_frequency( cable, FT2232_MAX_TCK_FREQ );
+
+ params->bit_trst = BIT_GNICE_nTRST + 8; /* member of HIGH byte */
+ params->bit_reset = -1; /* not used */
+
+ params->last_tdo_valid = 0;
+ params->signals = CS_TRST;
+
+ return 0;
+}
+
+
+static int
+ft2232_oocdlinks_init( cable_t *cable )
+{
+ params_t *params = (params_t *)cable->params;
+ cx_cmd_root_t *cmd_root = &(params->cmd_root);
+
+ if (usbconn_open( cable->link.usb )) return -1;
+
+ /* static low byte value and direction */
+ params->low_byte_value = 0;
+ params->low_byte_dir = 0;
+
+ /* Set Data Bits Low Byte
+ TCK = 0, TMS = 1, TDI = 0 */
+ cx_cmd_queue( cmd_root, 0 );
+ cx_cmd_push( cmd_root, SET_BITS_LOW );
+ cx_cmd_push( cmd_root, params->low_byte_value | BITMASK_TMS );
+ cx_cmd_push( cmd_root, params->low_byte_dir | BITMASK_TCK | BITMASK_TDI | BITMASK_TMS );
+
+ /* Set Data Bits High Byte
+ default:
+ TRST = 1
+ TRST buffer enable = 0
+ SRST = 1
+ SRST buffer enable = 0 */
+ params->high_byte_value = BITMASK_OOCDLINKS_nTRST
+ | BITMASK_OOCDLINKS_nSRST;
+ params->high_byte_dir = BITMASK_OOCDLINKS_nTRST
+ | BITMASK_OOCDLINKS_nTRST_nOE
+ | BITMASK_OOCDLINKS_nSRST
+ | BITMASK_OOCDLINKS_nSRST_nOE;
+ cx_cmd_push( cmd_root, SET_BITS_HIGH );
+ cx_cmd_push( cmd_root, params->high_byte_value );
+ cx_cmd_push( cmd_root, 0 );
+ cx_cmd_push( cmd_root, SET_BITS_HIGH );
+ cx_cmd_push( cmd_root, params->high_byte_value );
+ cx_cmd_push( cmd_root, params->high_byte_dir );
+
+ ft2232_set_frequency( cable, FT2232_MAX_TCK_FREQ );
+
+ params->bit_trst = BIT_OOCDLINKS_nTRST + 8; /* member of HIGH byte */
+ params->bit_reset = BIT_OOCDLINKS_nSRST + 8; /* member of HIGH byte */
+
+ params->last_tdo_valid = 0;
+ params->signals = CS_TRST | CS_RESET;
+
+ return 0;
+}
+
+
+static int
+ft2232_turtelizer2_init( cable_t *cable )
+{
+ params_t *params = (params_t *)cable->params;
+ cx_cmd_root_t *cmd_root = &(params->cmd_root);
+
+ if (usbconn_open( cable->link.usb )) return -1;
+
+ /* static low byte value and direction:
+ set nJTAGOE to '0' -> activate output enables
+ set RST to 0 -> inactive nSRST */
+ params->low_byte_value = 0;
+ params->low_byte_dir = BITMASK_TURTELIZER2_nJTAGOE | BITMASK_TURTELIZER2_RST;
+
+ /* Set Data Bits Low Byte
+ TCK = 0, TMS = 1, TDI = 0 */
+ cx_cmd_queue( cmd_root, 0 );
+ cx_cmd_push( cmd_root, SET_BITS_LOW );
+ cx_cmd_push( cmd_root, params->low_byte_value | BITMASK_TMS );
+ cx_cmd_push( cmd_root, params->low_byte_dir | BITMASK_TCK | BITMASK_TDI | BITMASK_TMS );
+
+ /* Set Data Bits High Byte
+ default:
+ TX1LED on
+ RX1LED on */
+ params->high_byte_value = 0;
+ params->high_byte_dir = BITMASK_TURTELIZER2_nTX1LED | BITMASK_TURTELIZER2_nRX1LED;
+ cx_cmd_push( cmd_root, SET_BITS_HIGH );
+ cx_cmd_push( cmd_root, params->high_byte_value );
+ cx_cmd_push( cmd_root, params->high_byte_dir );
+
+ ft2232_set_frequency( cable, FT2232_MAX_TCK_FREQ );
+
+ params->bit_trst = -1; /* not used */
+ params->bit_reset = BIT_TURTELIZER2_RST; /* member of LOW byte */
+
+ params->last_tdo_valid = 0;
+ params->signals = CS_RESET;
+
+ return 0;
+}
+
+
+static int
+ft2232_usbtojtagif_init( cable_t *cable )
+{
+ params_t *params = (params_t *)cable->params;
+ cx_cmd_root_t *cmd_root = &(params->cmd_root);
+
+ if (usbconn_open( cable->link.usb )) return -1;
+
+ /* static low byte value and direction:
+ nTRST = 1, RST = 1, DBGRQ = 0 */
+ params->low_byte_value = BITMASK_USBTOJTAGIF_nTRST | BITMASK_USBTOJTAGIF_RST;
+ params->low_byte_dir = BITMASK_USBTOJTAGIF_nTRST | BITMASK_USBTOJTAGIF_RST | BITMASK_USBTOJTAGIF_DBGRQ;
+
+ /* Set Data Bits Low Byte
+ TCK = 0, TMS = 1, TDI = 0 */
+ cx_cmd_queue( cmd_root, 0 );
+ cx_cmd_push( cmd_root, SET_BITS_LOW );
+ cx_cmd_push( cmd_root, params->low_byte_value | BITMASK_TMS );
+ cx_cmd_push( cmd_root, params->low_byte_dir | BITMASK_TCK | BITMASK_TDI | BITMASK_TMS );
+
+ /* Set Data Bits High Byte
+ default:
+ RxLED on
+ TxLED on */
+ params->high_byte_value = 0;
+ params->high_byte_value = 0;
+ params->high_byte_dir = BITMASK_USBTOJTAGIF_nRxLED | BITMASK_USBTOJTAGIF_nTxLED;
+ cx_cmd_push( cmd_root, SET_BITS_HIGH );
+ cx_cmd_push( cmd_root, params->high_byte_value );
+ cx_cmd_push( cmd_root, params->high_byte_dir );
+
+ /* I-couplers can only work up to 3 MHz
+ ref. http://www.hs-augsburg.de/~hhoegl/proj/usbjtag/usbjtag.html */
+ ft2232_set_frequency( cable, FT2232_MAX_TCK_FREQ/2 );
+
+ params->bit_trst = BIT_USBTOJTAGIF_nTRST; /* member of LOW byte */
+ params->bit_reset = BIT_USBTOJTAGIF_RST; /* member of LOW byte */
+
+ params->last_tdo_valid = 0;
+ params->signals = CS_TRST | CS_RESET;
+
+ return 0;
+}
+
+
+static int
+ft2232_signalyzer_init( cable_t *cable )
+{
+ params_t *params = (params_t *)cable->params;
+ cx_cmd_root_t *cmd_root = &(params->cmd_root);
+
+ if (usbconn_open( cable->link.usb )) return -1;
+
+ /* static low byte value and direction:
+ nTRST = 1, nSRST = 1 */
+ params->low_byte_value = BITMASK_SIGNALYZER_nTRST | BITMASK_SIGNALYZER_nSRST;
+ params->low_byte_dir = BITMASK_SIGNALYZER_nTRST | BITMASK_SIGNALYZER_nSRST;
+
+ /* Set Data Bits Low Byte
+ TCK = 0, TMS = 1, TDI = 0 */
+ cx_cmd_queue( cmd_root, 0 );
+ cx_cmd_push( cmd_root, SET_BITS_LOW );
+ cx_cmd_push( cmd_root, params->low_byte_value | BITMASK_TMS );
+ cx_cmd_push( cmd_root, params->low_byte_dir | BITMASK_TCK | BITMASK_TDI | BITMASK_TMS );
+
+ /* Set Data Bits High Byte */
+ params->high_byte_value = 0;
+ params->high_byte_dir = 0;
+ cx_cmd_push( cmd_root, SET_BITS_HIGH );
+ cx_cmd_push( cmd_root, params->high_byte_value );
+ cx_cmd_push( cmd_root, params->high_byte_dir );
+
+ ft2232_set_frequency( cable, FT2232_MAX_TCK_FREQ );
+
+ params->bit_trst = BIT_SIGNALYZER_nTRST; /* member of LOW byte */
+ params->bit_reset = BIT_SIGNALYZER_nSRST; /* member of LOW byte */
+
+ params->last_tdo_valid = 0;
+ params->signals = CS_TRST | CS_RESET;
+
+ return 0;
+}
+
+
+static int
+ft2232_flyswatter_init( cable_t *cable )
+{
+ params_t *params = (params_t *)cable->params;
+ cx_cmd_root_t *cmd_root = &(params->cmd_root);
+
+ if (usbconn_open( cable->link.usb )) return -1;
+
+ /* static low byte value and direction:
+ nTRST = 1, nSRST = 1 (ADBUS5 inverted),
+ set nOE1 and nOE2 to '0' -> activate output enables */
+ params->low_byte_value = BITMASK_FLYSWATTER_nTRST;
+ params->low_byte_dir = BITMASK_FLYSWATTER_nOE1 | BITMASK_FLYSWATTER_nOE2 |
+ BITMASK_FLYSWATTER_nTRST | BITMASK_FLYSWATTER_nSRST;
+
+ /* Set Data Bits Low Byte
+ TCK = 0, TMS = 1, TDI = 0 */
+ cx_cmd_queue( cmd_root, 0 );
+ cx_cmd_push( cmd_root, SET_BITS_LOW );
+ cx_cmd_push( cmd_root, params->low_byte_value | BITMASK_TMS );
+ cx_cmd_push( cmd_root, params->low_byte_dir | BITMASK_TCK | BITMASK_TDI | BITMASK_TMS );
+
+ /* Set Data Bits High Byte */
+ /* Turn LED2 on */
+ params->high_byte_value = 0;
+ params->high_byte_dir = BITMASK_FLYSWATTER_nLED2;
+ cx_cmd_push( cmd_root, SET_BITS_HIGH );
+ cx_cmd_push( cmd_root, params->high_byte_value );
+ cx_cmd_push( cmd_root, params->high_byte_dir );
+
+ ft2232_set_frequency( cable, FT2232_MAX_TCK_FREQ );
+
+ params->bit_trst = BIT_FLYSWATTER_nTRST; /* member of LOW byte */
+ params->bit_reset = BIT_FLYSWATTER_nSRST; /* member of LOW byte */
+
+ params->last_tdo_valid = 0;
+ params->signals = CS_TRST | CS_RESET;
+
+
+ return 0;
+}
+
+static int
+ft2232_usbscarab2_init( cable_t *cable )
+{
+ params_t *params = (params_t *)cable->params;
+ cx_cmd_root_t *cmd_root = &(params->cmd_root);
+
+ if (usbconn_open( cable->link.usb )) return -1;
+
+ /* Check if cable is connected to the target and the target is powered on */
+ cx_cmd_queue(cmd_root,1);
+ cx_cmd_push(cmd_root, GET_BITS_LOW);
+ cx_xfer( &(params->cmd_root), &imm_cmd, cable, COMPLETELY);
+ if ( (cx_xfer_recv( cable ) & BITMASK_USBSCARAB2_nCONNECTED) != 0)
+ {
+ printf( _("Error: Please power on the TARGET board and connect VCC signal!\n") );
+ return -1;
+ }
+
+ /* These bits will be set by default to: */
+ params->low_byte_value = 0;
+ params->low_byte_dir = 0;
+
+ /* Set Data Bits Low Byte
+ TCK = 0, TMS = 1, TDI = 0 */
+ cx_cmd_queue( cmd_root, 0 );
+ cx_cmd_push( cmd_root, SET_BITS_LOW );
+ cx_cmd_push( cmd_root, params->low_byte_value | BITMASK_TMS );
+ cx_cmd_push( cmd_root, params->low_byte_dir | BITMASK_TCK | BITMASK_TDI | BITMASK_TMS );
+
+ /* Set Data Bits High Byte */
+ /* nLED=0 */
+ params->high_byte_value = 0 | BITMASK_USBSCARAB2_TRST;
+ params->high_byte_dir = 0 | BITMASK_USBSCARAB2_LED | BITMASK_USBSCARAB2_TRST | BITMASK_USBSCARAB2_nSRST;
+ cx_cmd_push( cmd_root, SET_BITS_HIGH );
+ cx_cmd_push( cmd_root, params->high_byte_value);
+ cx_cmd_push( cmd_root, params->high_byte_dir);
+
+ ft2232_set_frequency( cable, FT2232_MAX_TCK_FREQ );
+
+ params->bit_trst = BIT_USBSCARAB2_TRST + 8; /* member of HIGH byte */
+ params->bit_reset = BIT_USBSCARAB2_nSRST + 8; /* member of HIGH byte */
+
+ params->last_tdo_valid = 0;
+ params->signals = CS_TRST | CS_RESET;
+
+ printf("Cable initialization OK!\n");
+ return 0;
+}
+
+
+static void
+ft2232_generic_done( cable_t *cable )
+{
+ params_t *params = (params_t *)cable->params;
+ cx_cmd_root_t *cmd_root = &(params->cmd_root);
+
+ /* Set Data Bits Low Byte
+ set all to input */
+ cx_cmd_queue( cmd_root, 0 );
+ cx_cmd_push( cmd_root, SET_BITS_LOW );
+ cx_cmd_push( cmd_root, 0 );
+ cx_cmd_push( cmd_root, 0 );
+
+ /* Set Data Bits High Byte
+ set all to input */
+ cx_cmd_push( cmd_root, SET_BITS_HIGH );
+ cx_cmd_push( cmd_root, 0 );
+ cx_cmd_push( cmd_root, 0 );
+ cx_xfer( cmd_root, &imm_cmd, cable, COMPLETELY );
+
+ generic_usbconn_done( cable );
+}
+
+
+static void
+ft2232_jtagkey_done( cable_t *cable )
+{
+ params_t *params = (params_t *)cable->params;
+ cx_cmd_root_t *cmd_root = &(params->cmd_root);
+
+ /* Set Data Bits Low Byte
+ disable output drivers */
+ cx_cmd_queue( cmd_root, 0 );
+ cx_cmd_push( cmd_root, SET_BITS_LOW );
+ cx_cmd_push( cmd_root, BITMASK_JTAGKEY_nOE );
+ cx_cmd_push( cmd_root, BITMASK_JTAGKEY_nOE );
+
+ /* Set Data Bits Low Byte
+ set all to input */
+ cx_cmd_push( cmd_root, SET_BITS_LOW );
+ cx_cmd_push( cmd_root, BITMASK_JTAGKEY_nOE );
+ cx_cmd_push( cmd_root, 0 );
+
+ /* Set Data Bits High Byte
+ disable output drivers */
+ cx_cmd_push( cmd_root, SET_BITS_HIGH );
+ cx_cmd_push( cmd_root,
+ BITMASK_JTAGKEY_TRST_N_OUT
+ | BITMASK_JTAGKEY_TRST_N_OE_N
+ | BITMASK_JTAGKEY_SRST_N_OUT
+ | BITMASK_JTAGKEY_SRST_N_OE_N );
+ cx_cmd_push( cmd_root,
+ BITMASK_JTAGKEY_TRST_N_OUT
+ | BITMASK_JTAGKEY_TRST_N_OE_N
+ | BITMASK_JTAGKEY_SRST_N_OUT
+ | BITMASK_JTAGKEY_SRST_N_OE_N );
+
+ /* Set Data Bits High Byte
+ set all to input */
+ cx_cmd_push( cmd_root, SET_BITS_HIGH );
+ cx_cmd_push( cmd_root,
+ BITMASK_JTAGKEY_TRST_N_OUT
+ | BITMASK_JTAGKEY_TRST_N_OE_N
+ | BITMASK_JTAGKEY_SRST_N_OUT
+ | BITMASK_JTAGKEY_SRST_N_OE_N );
+ cx_cmd_push( cmd_root, 0 );
+ cx_xfer( cmd_root, &imm_cmd, cable, COMPLETELY );
+
+ generic_usbconn_done( cable );
+}
+
+
+static void
+ft2232_armusbocd_done( cable_t *cable )
+{
+ params_t *params = (params_t *)cable->params;
+ cx_cmd_root_t *cmd_root = &(params->cmd_root);
+
+ /* Set Data Bits Low Byte
+ disable output drivers */
+ cx_cmd_queue( cmd_root, 0 );
+ cx_cmd_push( cmd_root, SET_BITS_LOW );
+ cx_cmd_push( cmd_root, BITMASK_ARMUSBOCD_nOE );
+ cx_cmd_push( cmd_root, BITMASK_ARMUSBOCD_nOE );
+
+ /* Set Data Bits Low Byte
+ set all to input */
+ cx_cmd_push( cmd_root, SET_BITS_LOW );
+ cx_cmd_push( cmd_root, BITMASK_ARMUSBOCD_nOE );
+ cx_cmd_push( cmd_root, 0 );
+
+ /* Set Data Bits High Byte
+ disable output drivers */
+ cx_cmd_push( cmd_root, SET_BITS_HIGH );
+ cx_cmd_push( cmd_root,
+ BITMASK_ARMUSBOCD_nTRST
+ | BITMASK_ARMUSBOCD_nTRST_nOE
+ | BITMASK_ARMUSBOCD_nTSRST );
+ cx_cmd_push( cmd_root,
+ BITMASK_ARMUSBOCD_nTRST
+ | BITMASK_ARMUSBOCD_nTRST_nOE
+ | BITMASK_ARMUSBOCD_nTSRST
+ | BITMASK_ARMUSBOCD_RED_LED );
+
+ /* Set Data Bits High Byte
+ set all to input */
+ cx_cmd_push( cmd_root, SET_BITS_HIGH );
+ cx_cmd_push( cmd_root,
+ BITMASK_ARMUSBOCD_nTRST
+ | BITMASK_ARMUSBOCD_nTRST_nOE
+ | BITMASK_ARMUSBOCD_nTSRST );
+ cx_cmd_push( cmd_root, 0 );
+ cx_xfer( cmd_root, &imm_cmd, cable, COMPLETELY );
+
+ generic_usbconn_done( cable );
+}
+
+static void
+ft2232_gnice_done( cable_t *cable )
+{
+ params_t *params = (params_t *)cable->params;
+ cx_cmd_root_t *cmd_root = &(params->cmd_root);
+
+ /* Set Data Bits Low Byte
+ disable output drivers */
+ cx_cmd_queue( cmd_root, 0 );
+ cx_cmd_push( cmd_root, SET_BITS_LOW );
+ cx_cmd_push( cmd_root, 0 );
+ cx_cmd_push( cmd_root, 0 );
+
+ /* Set Data Bits High Byte
+ disable output drivers */
+ cx_cmd_push( cmd_root, SET_BITS_HIGH );
+ cx_cmd_push( cmd_root, BITMASK_GNICE_nTRST);
+ cx_cmd_push( cmd_root, BITMASK_GNICE_nTRST | BITMASK_GNICE_nLED);
+
+ /* Set Data Bits High Byte
+ set all to input */
+ cx_cmd_push( cmd_root, SET_BITS_HIGH );
+ cx_cmd_push( cmd_root, BITMASK_GNICE_nTRST);
+ cx_cmd_push( cmd_root, 0 );
+ cx_xfer( cmd_root, &imm_cmd, cable, COMPLETELY );
+
+ generic_usbconn_done( cable );
+}
+
+static void
+ft2232_oocdlinks_done( cable_t *cable )
+{
+ params_t *params = (params_t *)cable->params;
+ cx_cmd_root_t *cmd_root = &(params->cmd_root);
+
+ /* Set Data Bits Low Byte
+ set all to input */
+ cx_cmd_queue( cmd_root, 0 );
+ cx_cmd_push( cmd_root, SET_BITS_LOW );
+ cx_cmd_push( cmd_root, 0 );
+ cx_cmd_push( cmd_root, 0 );
+
+ /* Set Data Bits High Byte
+ disable output drivers */
+ cx_cmd_push( cmd_root, SET_BITS_HIGH );
+ cx_cmd_push( cmd_root,
+ BITMASK_OOCDLINKS_nTRST
+ | BITMASK_OOCDLINKS_nTRST_nOE
+ | BITMASK_OOCDLINKS_nSRST
+ | BITMASK_OOCDLINKS_nSRST_nOE );
+ cx_cmd_push( cmd_root,
+ BITMASK_OOCDLINKS_nTRST
+ | BITMASK_OOCDLINKS_nTRST_nOE
+ | BITMASK_OOCDLINKS_nSRST
+ | BITMASK_OOCDLINKS_nSRST_nOE );
+
+ /* Set Data Bits High Byte
+ set all to input */
+ cx_cmd_push( cmd_root, SET_BITS_HIGH );
+ cx_cmd_push( cmd_root,
+ BITMASK_OOCDLINKS_nTRST
+ | BITMASK_OOCDLINKS_nTRST_nOE
+ | BITMASK_OOCDLINKS_nSRST
+ | BITMASK_OOCDLINKS_nSRST_nOE );
+ cx_cmd_push( cmd_root, 0 );
+ cx_xfer( cmd_root, &imm_cmd, cable, COMPLETELY );
+
+ generic_usbconn_done( cable );
+}
+
+
+static void
+ft2232_turtelizer2_done( cable_t *cable )
+{
+ params_t *params = (params_t *)cable->params;
+ cx_cmd_root_t *cmd_root = &(params->cmd_root);
+
+ /* Set Data Bits Low Byte
+ disable output drivers */
+ cx_cmd_queue( cmd_root, 0 );
+ cx_cmd_push( cmd_root, SET_BITS_LOW );
+ cx_cmd_push( cmd_root, BITMASK_TURTELIZER2_nJTAGOE );
+ cx_cmd_push( cmd_root, BITMASK_TURTELIZER2_nJTAGOE );
+
+ /* Set Data Bits Low Byte
+ set all to input */
+ cx_cmd_push( cmd_root, SET_BITS_LOW );
+ cx_cmd_push( cmd_root, BITMASK_TURTELIZER2_nJTAGOE );
+ cx_cmd_push( cmd_root, 0 );
+
+ /* Set Data Bits High Byte
+ switch off LEDs */
+ cx_cmd_push( cmd_root, SET_BITS_HIGH );
+ cx_cmd_push( cmd_root, BITMASK_TURTELIZER2_nTX1LED | BITMASK_TURTELIZER2_nRX1LED );
+ cx_cmd_push( cmd_root, BITMASK_TURTELIZER2_nTX1LED | BITMASK_TURTELIZER2_nRX1LED );
+
+ /* Set Data Bits High Byte
+ set all to input */
+ cx_cmd_push( cmd_root, SET_BITS_HIGH );
+ cx_cmd_push( cmd_root, 0 );
+ cx_cmd_push( cmd_root, 0 );
+ cx_xfer( cmd_root, &imm_cmd, cable, COMPLETELY );
+
+ generic_usbconn_done( cable );
+}
+
+
+static void
+ft2232_usbtojtagif_done( cable_t *cable )
+{
+ params_t *params = (params_t *)cable->params;
+ cx_cmd_root_t *cmd_root = &(params->cmd_root);
+
+ /* Set Data Bits Low Byte
+ set all to input */
+ cx_cmd_queue( cmd_root, 0 );
+ cx_cmd_push( cmd_root, SET_BITS_LOW );
+ cx_cmd_push( cmd_root, BITMASK_USBTOJTAGIF_nTRST | BITMASK_USBTOJTAGIF_RST );
+ cx_cmd_push( cmd_root, 0 );
+
+ /* Set Data Bits High Byte
+ disable output drivers */
+ cx_cmd_push( cmd_root, SET_BITS_HIGH );
+ cx_cmd_push( cmd_root, BITMASK_USBTOJTAGIF_nRxLED | BITMASK_USBTOJTAGIF_nTxLED );
+ cx_cmd_push( cmd_root, BITMASK_USBTOJTAGIF_nRxLED | BITMASK_USBTOJTAGIF_nTxLED );
+
+ /* Set Data Bits High Byte
+ set all to input */
+ cx_cmd_push( cmd_root, SET_BITS_HIGH );
+ cx_cmd_push( cmd_root, BITMASK_USBTOJTAGIF_nRxLED | BITMASK_USBTOJTAGIF_nTxLED );
+ cx_cmd_push( cmd_root, 0 );
+ cx_xfer( cmd_root, &imm_cmd, cable, COMPLETELY );
+
+ generic_usbconn_done( cable );
+}
+
+
+static void
+ft2232_signalyzer_done( cable_t *cable )
+{
+ params_t *params = (params_t *)cable->params;
+ cx_cmd_root_t *cmd_root = &(params->cmd_root);
+
+ /* Set Data Bits Low Byte
+ set all to input */
+ cx_cmd_queue( cmd_root, 0 );
+ cx_cmd_push( cmd_root, SET_BITS_LOW );
+ cx_cmd_push( cmd_root, BITMASK_SIGNALYZER_nTRST | BITMASK_SIGNALYZER_nSRST );
+ cx_cmd_push( cmd_root, 0 );
+
+ /* Set Data Bits High Byte
+ disable output drivers */
+ cx_cmd_push( cmd_root, SET_BITS_HIGH );
+ cx_cmd_push( cmd_root, BITMASK_SIGNALYZER_nTRST | BITMASK_SIGNALYZER_nSRST );
+ cx_cmd_push( cmd_root, BITMASK_SIGNALYZER_nTRST | BITMASK_SIGNALYZER_nSRST );
+
+ /* Set Data Bits High Byte
+ set all to input */
+ cx_cmd_push( cmd_root, SET_BITS_HIGH );
+ cx_cmd_push( cmd_root, 0 );
+ cx_cmd_push( cmd_root, 0 );
+ cx_xfer( cmd_root, &imm_cmd, cable, COMPLETELY );
+
+ generic_usbconn_done( cable );
+}
+
+
+static void
+ft2232_flyswatter_done( cable_t *cable )
+{
+ params_t *params = (params_t *)cable->params;
+ cx_cmd_root_t *cmd_root = &(params->cmd_root);
+
+ /* Set Data Bits Low Byte
+ disable output drivers */
+ cx_cmd_queue( cmd_root, 0 );
+ cx_cmd_push( cmd_root, SET_BITS_LOW );
+ cx_cmd_push( cmd_root, BITMASK_FLYSWATTER_nOE1 | BITMASK_FLYSWATTER_nOE2 );
+ cx_cmd_push( cmd_root, BITMASK_FLYSWATTER_nOE1 | BITMASK_FLYSWATTER_nOE2 );
+
+ /* Set Data Bits Low Byte
+ set all to input */
+ cx_cmd_push( cmd_root, SET_BITS_LOW );
+ cx_cmd_push( cmd_root, BITMASK_FLYSWATTER_nOE1 | BITMASK_FLYSWATTER_nOE2 );
+ cx_cmd_push( cmd_root, 0 );
+
+ /* Set Data Bits High Byte
+ set all to input */
+ cx_cmd_push( cmd_root, SET_BITS_HIGH );
+ cx_cmd_push( cmd_root, BITMASK_FLYSWATTER_nLED2 );
+ cx_cmd_push( cmd_root, 0 );
+ cx_xfer( cmd_root, &imm_cmd, cable, COMPLETELY );
+
+ generic_usbconn_done( cable );
+}
+
+static void
+ft2232_usbscarab2_done( cable_t *cable )
+{
+ params_t *params = (params_t *)cable->params;
+ cx_cmd_root_t *cmd_root = &(params->cmd_root);
+
+ /* Set Data Bits Low Byte
+ set all to input */
+ cx_cmd_queue( cmd_root, 0 );
+ cx_cmd_push( cmd_root, SET_BITS_LOW );
+ cx_cmd_push( cmd_root, 0 );
+ cx_cmd_push( cmd_root, 0 );
+
+ /* Set Data Bits High Byte
+ deassert RST signals and blank LED */
+ cx_cmd_push( cmd_root, SET_BITS_HIGH );
+ cx_cmd_push( cmd_root, 0 );
+ cx_cmd_push( cmd_root, 0 );
+
+ cx_xfer( cmd_root, &imm_cmd, cable, COMPLETELY );
+
+ generic_usbconn_done( cable );
+}
+
+
+static void
+ft2232_clock_schedule( cable_t *cable, int tms, int tdi, int n )
+{
+ params_t *params = (params_t *)cable->params;
+ cx_cmd_root_t *cmd_root = &(params->cmd_root);
+
+ tms = tms ? 0x7f : 0;
+ tdi = tdi ? 1 << 7 : 0;
+
+ cx_cmd_queue( cmd_root, 0 );
+ while (n > 0)
+ {
+ if (cx_cmd_space( cmd_root, FTDX_MAXSEND_MPSSE ) < 4)
+ {
+ /* no space left for Clock Data plus Send Immediate
+ transfer queued commands to device and read receive data
+ to internal buffer */
+ cx_xfer( cmd_root, &imm_cmd, cable, COMPLETELY );
+ cx_cmd_queue( cmd_root, 0 );
+ }
+
+ /* Clock Data to TMS/CS Pin (no Read) */
+ cx_cmd_push( cmd_root, MPSSE_WRITE_TMS |
+ MPSSE_LSB | MPSSE_BITMODE | MPSSE_WRITE_NEG );
+ if (n <= 7)
+ {
+ cx_cmd_push( cmd_root, n-1 );
+ n = 0;
+ }
+ else
+ {
+ cx_cmd_push( cmd_root, 7-1 );
+ n -= 7;
+ }
+ cx_cmd_push( cmd_root, tdi | tms );
+ }
+
+ params->signals &= ~(CS_TMS | CS_TDI | CS_TCK);
+ if (tms) params->signals |= CS_TMS;
+ if (tdi) params->signals |= CS_TDI;
+ // if (tck) params->signals |= CS_TCK;
+}
+
+
+static void
+ft2232_clock( cable_t *cable, int tms, int tdi, int n )
+{
+ params_t *params = (params_t *)cable->params;
+
+ ft2232_clock_schedule( cable, tms, tdi, n );
+ cx_xfer( &(params->cmd_root), &imm_cmd, cable, COMPLETELY );
+ params->last_tdo_valid = 0;
+}
+
+
+static void
+ft2232_get_tdo_schedule( cable_t *cable )
+{
+ params_t *params = (params_t *)cable->params;
+ cx_cmd_root_t *cmd_root = &(params->cmd_root);
+
+ /* Read Data Bits Low Byte */
+ cx_cmd_queue( cmd_root, 1 );
+ cx_cmd_push( cmd_root, GET_BITS_LOW );
+}
+
+
+static int
+ft2232_get_tdo_finish( cable_t *cable )
+{
+ params_t *params = (params_t *)cable->params;
+ int value;
+
+ value = ( cx_xfer_recv( cable ) & BITMASK_TDO) ? 1 : 0;
+
+ params->last_tdo = value;
+ params->last_tdo_valid = 1;
+
+ return value;
+}
+
+
+static int
+ft2232_get_tdo( cable_t *cable )
+{
+ params_t *params = (params_t *)cable->params;
+
+ ft2232_get_tdo_schedule( cable );
+ cx_xfer( &(params->cmd_root), &imm_cmd, cable, COMPLETELY );
+ return ft2232_get_tdo_finish( cable );
+}
+
+
+static void
+ft2232_set_signal_schedule( params_t *params, int mask, int val,
+ int set_low, int set_high )
+{
+ cx_cmd_root_t *cmd_root = &(params->cmd_root);
+
+ /* filter for supported signals */
+ mask &= CS_TCK | CS_TDI | CS_TMS | CS_TRST | CS_RESET;
+ if (mask != 0)
+ {
+ int sigs = (params->signals & ~mask) | (val & mask);
+ uint8_t low_or = 0;
+ uint8_t low_xor = 0;
+ uint8_t high_xor = 0;
+
+ /* prepare low and high byte */
+ if (sigs & CS_TCK) low_or |= BITMASK_TCK;
+ if (sigs & CS_TDI) low_or |= BITMASK_TDI;
+ if (sigs & CS_TMS) low_or |= BITMASK_TMS;
+ /* TRST and RESET (SRST) are XOR'ed to the default value since
+ the right value depends on the external circuitry (inverter or not) */
+ if ((sigs & CS_TRST) == 0)
+ if (params->bit_trst >= 0)
+ {
+ if (params->bit_trst < 8)
+ {
+ low_xor |= 1 << params->bit_trst;
+ }
+ else
+ {
+ high_xor |= 1 << (params->bit_trst - 8);
+ }
+ }
+ if ((sigs & CS_RESET) == 0)
+ if (params->bit_reset >= 0)
+ {
+ if (params->bit_reset < 8)
+ {
+ low_xor |= 1 << params->bit_reset;
+ }
+ else
+ {
+ high_xor |= 1 << (params->bit_reset - 8);
+ }
+ }
+
+ if (set_low)
+ {
+ cx_cmd_queue( cmd_root, 0 );
+ cx_cmd_push( cmd_root, SET_BITS_LOW );
+ cx_cmd_push( cmd_root, (params->low_byte_value | low_or) ^ low_xor );
+ cx_cmd_push( cmd_root, params->low_byte_dir | BITMASK_TCK | BITMASK_TDI | BITMASK_TMS );
+ }
+
+ if (set_high)
+ {
+ cx_cmd_queue( cmd_root, 0 );
+ cx_cmd_push( cmd_root, SET_BITS_HIGH );
+ cx_cmd_push( cmd_root, params->high_byte_value ^ high_xor );
+ cx_cmd_push( cmd_root, params->high_byte_dir );
+ }
+
+ params->signals = sigs;
+ }
+}
+
+
+static int
+ft2232_set_signal( cable_t *cable, int mask, int val )
+{
+ params_t *params = (params_t *)cable->params;
+
+ int prev_sigs = params->signals;
+
+ ft2232_set_signal_schedule( params, mask, val, 1, 1 );
+ cx_xfer( &(params->cmd_root), &imm_cmd, cable, COMPLETELY );
+ params->last_tdo_valid = 0;
+
+ return prev_sigs;
+}
+
+
+static void
+ft2232_transfer_schedule( cable_t *cable, int len, char *in, char *out )
+{
+ params_t *params = (params_t *)cable->params;
+ cx_cmd_root_t *cmd_root = &(params->cmd_root);
+ int in_offset = 0;
+ int bitwise_len;
+ int chunkbytes;
+
+ /* lower TMS for transfer
+ also lower TCK to ensure correct clocking */
+ ft2232_set_signal_schedule( params, CS_TCK | CS_TMS, 0, 1, 0 );
+
+ chunkbytes = len >> 3;
+ while (chunkbytes > 0)
+ {
+ int byte_idx;
+
+ /* reduce chunkbytes to the maximum amount we can receive in one step */
+ if (out && chunkbytes > FTDX_MAXRECV)
+ chunkbytes = FTDX_MAXRECV;
+ /* reduce chunkbytes to the maximum amount that fits into one buffer
+ for performance reasons */
+ if (chunkbytes > FTDX_MAXSEND_MPSSE - 4)
+ chunkbytes = FTDX_MAXSEND_MPSSE - 4;
+ /* restrict chunkbytes to the maximum amount that can be transferred
+ for one single operation */
+ if (chunkbytes > (1 << 16))
+ chunkbytes = 1 << 16;
+
+ /***********************************************************************
+ * Step 1:
+ * Determine data shifting command (bytewise).
+ * Either with or without read
+ ***********************************************************************/
+ if (out)
+ {
+ cx_cmd_queue( cmd_root, chunkbytes );
+ /* Clock Data Bytes In and Out LSB First
+ out on negative edge, in on positive edge */
+ cx_cmd_push( cmd_root, MPSSE_DO_READ | MPSSE_DO_WRITE |
+ MPSSE_LSB | MPSSE_WRITE_NEG );
+ }
+ else
+ {
+ cx_cmd_queue( cmd_root, 0 );
+ /* Clock Data Bytes Out on -ve Clock Edge LSB First (no Read) */
+ cx_cmd_push( cmd_root, MPSSE_DO_WRITE |
+ MPSSE_LSB | MPSSE_WRITE_NEG );
+ }
+ /* set byte count */
+ cx_cmd_push( cmd_root, (chunkbytes - 1) & 0xff );
+ cx_cmd_push( cmd_root, ((chunkbytes - 1) >> 8) & 0xff );
+
+ /*********************************************************************
+ * Step 2:
+ * Write TDI data in bundles of 8 bits.
+ *********************************************************************/
+ for (byte_idx = 0; byte_idx < chunkbytes; byte_idx++)
+ {
+ int bit_idx;
+ unsigned char b = 0;
+
+ for (bit_idx = 1; bit_idx < 256; bit_idx <<= 1)
+ if (in[in_offset++])
+ b |= bit_idx;
+ cx_cmd_push( cmd_root, b );
+ }
+
+ /* recalc chunkbytes for next round */
+ chunkbytes = (len - in_offset) >> 3;
+ }
+
+ /* determine bitwise shift amount */
+ bitwise_len = (len - in_offset) % 8;
+ if (bitwise_len > 0)
+ {
+ /***********************************************************************
+ * Step 3:
+ * Determine data shifting command (bitwise).
+ * Either with or without read
+ ***********************************************************************/
+ if (out)
+ {
+ cx_cmd_queue( cmd_root, 1 );
+ /* Clock Data Bytes In and Out LSB First
+ out on negative edge, in on positive edge */
+ cx_cmd_push( cmd_root, MPSSE_DO_READ | MPSSE_DO_WRITE |
+ MPSSE_LSB | MPSSE_BITMODE | MPSSE_WRITE_NEG );
+ }
+ else
+ {
+ cx_cmd_queue( cmd_root, 0 );
+ /* Clock Data Bytes Out on -ve Clock Edge LSB First (no Read) */
+ cx_cmd_push( cmd_root, MPSSE_DO_WRITE |
+ MPSSE_LSB | MPSSE_BITMODE | MPSSE_WRITE_NEG );
+ }
+ /* determine bit count */
+ cx_cmd_push( cmd_root, bitwise_len - 1 );
+
+ /***********************************************************************
+ * Step 4:
+ * Write TDI data bitwise
+ ***********************************************************************/
+ {
+ int bit_idx;
+ unsigned char b = 0;
+ for (bit_idx = 1; bit_idx < 1 << bitwise_len; bit_idx <<= 1)
+ {
+ if (in[in_offset++])
+ b |= bit_idx;
+ }
+ cx_cmd_push( cmd_root, b );
+ }
+ }
+
+ if (out)
+ {
+ /* Read Data Bits Low Byte to get current TDO,
+ Do this only if we'll read out data nonetheless */
+ cx_cmd_queue( cmd_root, 1 );
+ cx_cmd_push( cmd_root, GET_BITS_LOW );
+ params->last_tdo_valid = 1;
+ }
+ else
+ params->last_tdo_valid = 0;
+}
+
+
+static int
+ft2232_transfer_finish( cable_t *cable, int len, char *out )
+{
+ params_t *params = (params_t *)cable->params;
+ int bitwise_len;
+ int chunkbytes;
+ int out_offset = 0;
+
+ chunkbytes = len >> 3;
+ bitwise_len = len % 8;
+
+ if (out)
+ {
+ if (chunkbytes > 0)
+ {
+ uint32_t xferred;
+
+ /*********************************************************************
+ * Step 5:
+ * Read TDO data in bundles of 8 bits if read is requested.
+ *********************************************************************/
+ xferred = chunkbytes;
+ for (; xferred > 0; xferred--)
+ {
+ int bit_idx;
+ unsigned char b;
+
+ b = cx_xfer_recv( cable );
+ for (bit_idx = 1; bit_idx < 256; bit_idx <<= 1)
+ out[out_offset++] = (b & bit_idx) ? 1 : 0;
+ }
+ }
+
+ if (bitwise_len > 0)
+ {
+ /***********************************************************************
+ * Step 6:
+ * Read TDO data bitwise if read is requested.
+ ***********************************************************************/
+ int bit_idx;
+ unsigned char b;
+
+ b = cx_xfer_recv( cable );
+
+ for (bit_idx = (1 << (8 - bitwise_len)); bit_idx < 256; bit_idx <<= 1)
+ out[out_offset++] = (b & bit_idx) ? 1 : 0;
+ }
+
+ /* gather current TDO */
+ params->last_tdo = ( cx_xfer_recv( cable ) & BITMASK_TDO) ? 1 : 0;
+ params->last_tdo_valid = 1;
+ }
+ else
+ params->last_tdo_valid = 0;
+
+ return 0;
+}
+
+
+static int
+ft2232_transfer( cable_t *cable, int len, char *in, char *out )
+{
+ params_t *params = (params_t *)cable->params;
+
+ ft2232_transfer_schedule( cable, len, in, out );
+ cx_xfer( &(params->cmd_root), &imm_cmd, cable, COMPLETELY );
+ return ft2232_transfer_finish( cable, len, out );
+}
+
+
+static void
+ft2232_flush( cable_t *cable, cable_flush_amount_t how_much )
+{
+ params_t *params = (params_t *)cable->params;
+
+ if (how_much == OPTIONALLY) return;
+
+ if (cable->todo.num_items == 0)
+ cx_xfer( &(params->cmd_root), &imm_cmd, cable, how_much );
+
+ while (cable->todo.num_items > 0)
+ {
+ int i, j, n;
+ int post_signals = params->signals;
+ int last_tdo_valid_schedule = params->last_tdo_valid;
+ int last_tdo_valid_finish = params->last_tdo_valid;
+
+ for (j = i = cable->todo.next_item, n = 0; n < cable->todo.num_items; n++)
+ {
+
+ switch (cable->todo.data[i].action)
+ {
+ case CABLE_CLOCK:
+ ft2232_clock_schedule( cable,
+ cable->todo.data[i].arg.clock.tms,
+ cable->todo.data[i].arg.clock.tdi,
+ cable->todo.data[i].arg.clock.n );
+ last_tdo_valid_schedule = 0;
+ break;
+
+ case CABLE_GET_TDO:
+ if (!last_tdo_valid_schedule)
+ {
+ ft2232_get_tdo_schedule( cable );
+ last_tdo_valid_schedule = 1;
+ }
+ break;
+
+ case CABLE_SET_SIGNAL:
+ ft2232_set_signal_schedule( params,
+ cable->todo.data[i].arg.value.mask,
+ cable->todo.data[i].arg.value.val, 1, 1 );
+ last_tdo_valid_schedule = 0;
+ break;
+
+ case CABLE_TRANSFER:
+ ft2232_transfer_schedule( cable,
+ cable->todo.data[i].arg.transfer.len,
+ cable->todo.data[i].arg.transfer.in,
+ cable->todo.data[i].arg.transfer.out );
+ last_tdo_valid_schedule = params->last_tdo_valid;
+ break;
+
+ default:
+ break;
+ }
+
+ i++;
+ if (i >= cable->todo.max_items)
+ i = 0;
+ }
+
+ cx_xfer( &(params->cmd_root), &imm_cmd, cable, how_much );
+
+ while (j != i)
+ {
+ switch (cable->todo.data[j].action)
+ {
+ case CABLE_CLOCK:
+ {
+ post_signals &= ~(CS_TCK | CS_TDI | CS_TMS);
+ post_signals |= (cable->todo.data[j].arg.clock.tms ? CS_TMS : 0);
+ post_signals |= (cable->todo.data[j].arg.clock.tdi ? CS_TDI : 0);
+ params->last_tdo_valid = last_tdo_valid_finish = 0;
+ break;
+ }
+ case CABLE_GET_TDO:
+ {
+ int tdo;
+ int m;
+ if (last_tdo_valid_finish)
+ tdo = params->last_tdo;
+ else
+ tdo = ft2232_get_tdo_finish( cable );
+ last_tdo_valid_finish = params->last_tdo_valid;
+ m = cable_add_queue_item( cable, &(cable->done) );
+ cable->done.data[m].action = CABLE_GET_TDO;
+ cable->done.data[m].arg.value.val = tdo;
+ break;
+ }
+ case CABLE_SET_SIGNAL:
+ {
+ int m = cable_add_queue_item( cable, &(cable->done) );
+ cable->done.data[m].action = CABLE_SET_SIGNAL;
+ cable->done.data[m].arg.value.mask = cable->todo.data[j].arg.value.mask;
+ cable->done.data[m].arg.value.val = post_signals;
+ int mask = cable->todo.data[j].arg.value.mask & ~(CS_TCK | CS_TDI | CS_TMS | CS_TRST | CS_RESET);
+ post_signals = (post_signals & ~mask) | (cable->todo.data[j].arg.value.val & mask);
+ }
+ case CABLE_GET_SIGNAL:
+ {
+ int m = cable_add_queue_item( cable, &(cable->done) );
+ cable->done.data[m].action = CABLE_GET_SIGNAL;
+ cable->done.data[m].arg.value.sig = cable->todo.data[j].arg.value.sig;
+ cable->done.data[m].arg.value.val = (post_signals & cable->todo.data[j].arg.value.sig) ? 1 : 0;
+ break;
+ }
+ case CABLE_TRANSFER:
+ {
+ int r = ft2232_transfer_finish( cable,
+ cable->todo.data[j].arg.transfer.len,
+ cable->todo.data[j].arg.transfer.out );
+ last_tdo_valid_finish = params->last_tdo_valid;
+ free( cable->todo.data[j].arg.transfer.in );
+ if (cable->todo.data[j].arg.transfer.out)
+ {
+ int m = cable_add_queue_item( cable, &(cable->done) );
+ if (m < 0)
+ printf("out of memory!\n");
+ cable->done.data[m].action = CABLE_TRANSFER;
+ cable->done.data[m].arg.xferred.len = cable->todo.data[j].arg.transfer.len;
+ cable->done.data[m].arg.xferred.res = r;
+ cable->done.data[m].arg.xferred.out = cable->todo.data[j].arg.transfer.out;
+ }
+ }
+ default:
+ break;
+ }
+
+ j++;
+ if (j >= cable->todo.max_items)
+ j = 0;
+ cable->todo.num_items--;
+ }
+
+ cable->todo.next_item = i;
+ }
+}
+
+
+static int
+ft2232_connect( char *params[], cable_t *cable )
+{
+ params_t *cable_params;
+ int result;
+
+ /* perform generic_usbconn_connect */
+ if ( ( result = generic_usbconn_connect( params, cable ) ) != 0 )
+ return result;
+
+ cable_params = (params_t *)malloc( sizeof(params_t) );
+ if (!cable_params) {
+ printf( _("%s(%d) malloc failed!\n"), __FILE__, __LINE__);
+ /* NOTE:
+ * Call the underlying usbport driver (*free) routine directly
+ * not generic_usbconn_free() since it also free's cable->params
+ * (which is not established) and cable (which the caller will do)
+ */
+ cable->link.usb->driver->free( cable->link.usb );
+ return 4;
+ }
+
+ cable_params->mpsse_frequency = 0;
+ cable_params->last_tdo_valid = 0;
+
+ cx_cmd_init( &(cable_params->cmd_root) );
+
+ /* exchange generic cable parameters with our private parameter set */
+ free( cable->params );
+ cable->params = cable_params;
+
+ return 0;
+}
+
+
+static void
+ft2232_cable_free( cable_t *cable )
+{
+ params_t *params = (params_t *)cable->params;
+
+ cx_cmd_deinit( &(params->cmd_root) );
+
+ generic_usbconn_free( cable );
+}
+
+
+usbconn_cable_t usbconn_cable_ft2232_ftdi;
+usbconn_cable_t usbconn_cable_armusbocd_ftdi;
+usbconn_cable_t usbconn_cable_gnice_ftdi;
+usbconn_cable_t usbconn_cable_jtagkey_ftdi;
+usbconn_cable_t usbconn_cable_oocdlinks_ftdi;
+usbconn_cable_t usbconn_cable_turtelizer2_ftdi;
+usbconn_cable_t usbconn_cable_usbtojtagif_ftdi;
+usbconn_cable_t usbconn_cable_signalyzer_ftdi;
+usbconn_cable_t usbconn_cable_flyswatter_ftdi;
+usbconn_cable_t usbconn_cable_usbscarab2_ftdi;
+
+
+static void
+ft2232_usbcable_help( const char *cablename )
+{
+ usbconn_cable_t *conn;
+
+ conn = &usbconn_cable_armusbocd_ftdi;
+ if (strcasecmp( conn->name, cablename ) == 0)
+ goto found;
+ conn = &usbconn_cable_gnice_ftdi;
+ if (strcasecmp( conn->name, cablename ) == 0)
+ goto found;
+ conn = &usbconn_cable_jtagkey_ftdi;
+ if (strcasecmp( conn->name, cablename ) == 0)
+ goto found;
+ conn = &usbconn_cable_oocdlinks_ftdi;
+ if (strcasecmp( conn->name, cablename ) == 0)
+ goto found;
+ conn = &usbconn_cable_turtelizer2_ftdi;
+ if (strcasecmp( conn->name, cablename ) == 0)
+ goto found;
+ conn = &usbconn_cable_usbtojtagif_ftdi;
+ if (strcasecmp( conn->name, cablename ) == 0)
+ goto found;
+ conn = &usbconn_cable_signalyzer_ftdi;
+ if (strcasecmp( conn->name, cablename ) == 0)
+ goto found;
+ conn = &usbconn_cable_flyswatter_ftdi;
+ if (strcasecmp( conn->name, cablename ) == 0)
+ goto found;
+ conn = &usbconn_cable_usbscarab2_ftdi;
+ if (strcasecmp( conn->name, cablename ) == 0)
+ goto found;
+ conn = &usbconn_cable_ft2232_ftdi;
+found:
+
+ printf( _(
+ "Usage: cable %s [vid=VID] [pid=PID] [desc=DESC] [driver=DRIVER]\n"
+ "\n"
+ "VID vendor ID (hex), defaults to %04X\n"
+ "PID product ID (hex), defaults to %04X\n"
+ "DESC Some string to match in description or serial no.\n"
+ "DRIVER usbconn driver, either ftdi-mpsse or ftd2xx-mpsse\n"
+ " defaults to %s if not specified\n"
+ "\n"
+ ),
+ cablename,
+ conn->vid, conn->pid,
+ DEFAULT_DRIVER
+ );
+}
+
+
+cable_driver_t ft2232_cable_driver = {
+ "FT2232",
+ N_("Generic FTDI FT2232 Cable"),
+ ft2232_connect,
+ generic_disconnect,
+ ft2232_cable_free,
+ ft2232_generic_init,
+ ft2232_generic_done,
+ ft2232_set_frequency,
+ ft2232_clock,
+ ft2232_get_tdo,
+ ft2232_transfer,
+ ft2232_set_signal,
+ generic_get_signal,
+ ft2232_flush,
+ ft2232_usbcable_help
+};
+usbconn_cable_t usbconn_cable_ft2232_ftdi = {
+ "FT2232", /* cable name */
+ NULL, /* string pattern, not used */
+ "ftdi-mpsse", /* default usbconn driver */
+ 0x0000, /* VID */
+ 0x0000 /* PID */
+};
+usbconn_cable_t usbconn_cable_ft2232_ftd2xx = {
+ "FT2232", /* cable name */
+ NULL, /* string pattern, not used */
+ "ftd2xx-mpsse", /* default usbconn driver */
+ 0x0000, /* VID */
+ 0x0000 /* PID */
+};
+
+cable_driver_t ft2232_armusbocd_cable_driver = {
+ "ARM-USB-OCD",
+ N_("Olimex ARM-USB-OCD[-TINY] (FT2232) Cable"),
+ ft2232_connect,
+ generic_disconnect,
+ ft2232_cable_free,
+ ft2232_armusbocd_init,
+ ft2232_armusbocd_done,
+ ft2232_set_frequency,
+ ft2232_clock,
+ ft2232_get_tdo,
+ ft2232_transfer,
+ ft2232_set_signal,
+ generic_get_signal,
+ ft2232_flush,
+ ft2232_usbcable_help
+};
+usbconn_cable_t usbconn_cable_armusbocd_ftdi = {
+ "ARM-USB-OCD", /* cable name */
+ NULL, /* string pattern, not used */
+ "ftdi-mpsse", /* default usbconn driver */
+ 0x15BA, /* VID */
+ 0x0003 /* PID */
+};
+usbconn_cable_t usbconn_cable_armusbocd_ftd2xx = {
+ "ARM-USB-OCD", /* cable name */
+ NULL, /* string pattern, not used */
+ "ftd2xx-mpsse", /* default usbconn driver */
+ 0x15BA, /* VID */
+ 0x0003 /* PID */
+};
+usbconn_cable_t usbconn_cable_armusbocdtiny_ftdi = {
+ "ARM-USB-OCD", /* cable name */
+ NULL, /* string pattern, not used */
+ "ftdi-mpsse", /* default usbconn driver */
+ 0x15BA, /* VID */
+ 0x0004 /* PID */
+};
+usbconn_cable_t usbconn_cable_armusbocdtiny_ftd2xx = {
+ "ARM-USB-OCD", /* cable name */
+ NULL, /* string pattern, not used */
+ "ftd2xx-mpsse", /* default usbconn driver */
+ 0x15BA, /* VID */
+ 0x0004 /* PID */
+};
+
+cable_driver_t ft2232_gnice_cable_driver = {
+ "gnICE",
+ N_("Analog Devices Blackfin gnICE (FT2232) Cable (EXPERIMENTAL)"),
+ ft2232_connect,
+ generic_disconnect,
+ ft2232_cable_free,
+ ft2232_gnice_init,
+ ft2232_gnice_done,
+ ft2232_set_frequency,
+ ft2232_clock,
+ ft2232_get_tdo,
+ ft2232_transfer,
+ ft2232_set_signal,
+ generic_get_signal,
+ ft2232_flush,
+ ft2232_usbcable_help
+};
+usbconn_cable_t usbconn_cable_gnice_ftdi = {
+ "gnICE", /* cable name */
+ NULL, /* string pattern, not used */
+ "ftdi-mpsse", /* default usbconn driver */
+ 0x0456, /* VID */
+ 0xF000 /* PID */
+};
+usbconn_cable_t usbconn_cable_gnice_ftd2xx = {
+ "gnICE", /* cable name */
+ NULL, /* string pattern, not used */
+ "ftd2xx-mpsse", /* default usbconn driver */
+ 0x0456, /* VID */
+ 0xF000 /* PID */
+};
+
+cable_driver_t ft2232_jtagkey_cable_driver = {
+ "JTAGkey",
+ N_("Amontec JTAGkey (FT2232) Cable"),
+ ft2232_connect,
+ generic_disconnect,
+ ft2232_cable_free,
+ ft2232_jtagkey_init,
+ ft2232_jtagkey_done,
+ ft2232_set_frequency,
+ ft2232_clock,
+ ft2232_get_tdo,
+ ft2232_transfer,
+ ft2232_set_signal,
+ generic_get_signal,
+ ft2232_flush,
+ ft2232_usbcable_help
+};
+usbconn_cable_t usbconn_cable_jtagkey_ftdi = {
+ "JTAGkey", /* cable name */
+ NULL, /* string pattern, not used */
+ "ftdi-mpsse", /* default usbconn driver */
+ 0x0403, /* VID */
+ 0xCFF8 /* PID */
+};
+usbconn_cable_t usbconn_cable_jtagkey_ftd2xx = {
+ "JTAGkey", /* cable name */
+ NULL, /* string pattern, not used */
+ "ftd2xx-mpsse", /* default usbconn driver */
+ 0x0403, /* VID */
+ 0xCFF8 /* PID */
+};
+
+cable_driver_t ft2232_oocdlinks_cable_driver = {
+ "OOCDLink-s",
+ N_("OOCDLink-s (FT2232) Cable (EXPERIMENTAL)"),
+ ft2232_connect,
+ generic_disconnect,
+ ft2232_cable_free,
+ ft2232_oocdlinks_init,
+ ft2232_oocdlinks_done,
+ ft2232_set_frequency,
+ ft2232_clock,
+ ft2232_get_tdo,
+ ft2232_transfer,
+ ft2232_set_signal,
+ generic_get_signal,
+ ft2232_flush,
+ ft2232_usbcable_help
+};
+usbconn_cable_t usbconn_cable_oocdlinks_ftdi = {
+ "OOCDLink-s", /* cable name */
+ NULL, /* string pattern, not used */
+ "ftdi-mpsse", /* default usbconn driver */
+ 0x0403, /* VID */
+ 0xbaf8 /* PID */
+};
+usbconn_cable_t usbconn_cable_oocdlinks_ftd2xx = {
+ "OOCDLink-s", /* cable name */
+ NULL, /* string pattern, not used */
+ "ftd2xx-mpsse", /* default usbconn driver */
+ 0x0403, /* VID */
+ 0xbaf8 /* PID */
+};
+
+cable_driver_t ft2232_turtelizer2_cable_driver = {
+ "Turtelizer2",
+ N_("Turtelizer 2 Rev. B (FT2232) Cable (EXPERIMENTAL)"),
+ ft2232_connect,
+ generic_disconnect,
+ ft2232_cable_free,
+ ft2232_turtelizer2_init,
+ ft2232_turtelizer2_done,
+ ft2232_set_frequency,
+ ft2232_clock,
+ ft2232_get_tdo,
+ ft2232_transfer,
+ ft2232_set_signal,
+ generic_get_signal,
+ ft2232_flush,
+ ft2232_usbcable_help
+};
+usbconn_cable_t usbconn_cable_turtelizer2_ftdi = {
+ "Turtelizer2", /* cable name */
+ NULL, /* string pattern, not used */
+ "ftdi-mpsse", /* default usbconn driver */
+ 0x0403, /* VID */
+ 0xBDC8 /* PID */
+};
+usbconn_cable_t usbconn_cable_turtelizer2_ftd2xx = {
+ "Turtelizer2", /* cable name */
+ NULL, /* string pattern, not used */
+ "ftd2xx-mpsse", /* default usbconn driver */
+ 0x0403, /* VID */
+ 0xBDC8 /* PID */
+};
+
+cable_driver_t ft2232_usbtojtagif_cable_driver = {
+ "USB-to-JTAG-IF",
+ N_("USB to JTAG Interface (FT2232) Cable (EXPERIMENTAL)"),
+ ft2232_connect,
+ generic_disconnect,
+ ft2232_cable_free,
+ ft2232_usbtojtagif_init,
+ ft2232_usbtojtagif_done,
+ ft2232_set_frequency,
+ ft2232_clock,
+ ft2232_get_tdo,
+ ft2232_transfer,
+ ft2232_set_signal,
+ generic_get_signal,
+ ft2232_flush,
+ ft2232_usbcable_help
+};
+usbconn_cable_t usbconn_cable_usbtojtagif_ftdi = {
+ "USB-to-JTAG-IF", /* cable name */
+ NULL, /* string pattern, not used */
+ "ftdi-mpsse", /* default usbconn driver */
+ 0x0000, /* VID */
+ 0x0000 /* PID */
+};
+usbconn_cable_t usbconn_cable_usbtojtagif_ftd2xx = {
+ "USB-to-JTAG-IF", /* cable name */
+ NULL, /* string pattern, not used */
+ "ftd2xx-mpsse", /* default usbconn driver */
+ 0x0000, /* VID */
+ 0x0000 /* PID */
+};
+
+cable_driver_t ft2232_signalyzer_cable_driver = {
+ "Signalyzer",
+ N_("Xverve DT-USB-ST Signalyzer Tool (FT2232) Cable (EXPERIMENTAL)"),
+ ft2232_connect,
+ generic_disconnect,
+ ft2232_cable_free,
+ ft2232_signalyzer_init,
+ ft2232_signalyzer_done,
+ ft2232_set_frequency,
+ ft2232_clock,
+ ft2232_get_tdo,
+ ft2232_transfer,
+ ft2232_set_signal,
+ generic_get_signal,
+ ft2232_flush,
+ ft2232_usbcable_help
+};
+usbconn_cable_t usbconn_cable_signalyzer_ftdi = {
+ "Signalyzer", /* cable name */
+ NULL, /* string pattern, not used */
+ "ftdi-mpsse", /* default usbconn driver */
+ 0x0000, /* VID */
+ 0x0000 /* PID */
+};
+usbconn_cable_t usbconn_cable_signalyzer_ftd2xx = {
+ "Signalyzer", /* cable name */
+ NULL, /* string pattern, not used */
+ "ftd2xx-mpsse", /* default usbconn driver */
+ 0x0000, /* VID */
+ 0x0000 /* PID */
+};
+
+cable_driver_t ft2232_flyswatter_cable_driver = {
+ "Flyswatter",
+ N_("TinCanTools Flyswatter (FT2232) Cable"),
+ ft2232_connect,
+ generic_disconnect,
+ ft2232_cable_free,
+ ft2232_flyswatter_init,
+ ft2232_flyswatter_done,
+ ft2232_set_frequency,
+ ft2232_clock,
+ ft2232_get_tdo,
+ ft2232_transfer,
+ ft2232_set_signal,
+ generic_get_signal,
+ ft2232_flush,
+ ft2232_usbcable_help
+};
+usbconn_cable_t usbconn_cable_flyswatter_ftdi = {
+ "Flyswatter", /* cable name */
+ NULL, /* string pattern, not used */
+ "ftdi-mpsse", /* default usbconn driver */
+ 0x0403, /* VID */
+ 0x6010 /* PID */
+};
+usbconn_cable_t usbconn_cable_flyswatter_ftd2xx = {
+ "Flyswatter", /* cable name */
+ NULL, /* string pattern, not used */
+ "ftd2xx-mpsse", /* default usbconn driver */
+ 0x0403, /* VID */
+ 0x6010 /* PID */
+};
+
+cable_driver_t ft2232_usbscarab2_cable_driver = {
+ "usbScarab2",
+ N_("KrisTech usbScarabeus2 (FT2232) Cable"),
+ ft2232_connect,
+ generic_disconnect,
+ ft2232_cable_free,
+ ft2232_usbscarab2_init,
+ ft2232_usbscarab2_done,
+ ft2232_set_frequency,
+ ft2232_clock,
+ ft2232_get_tdo,
+ ft2232_transfer,
+ ft2232_set_signal,
+ generic_get_signal,
+ ft2232_flush,
+ ft2232_usbcable_help
+};
+usbconn_cable_t usbconn_cable_usbscarab2_ftdi = {
+ "usbScarab2", /* cable name */
+ "usbScarab2", /* string pattern, not used */
+ "ftdi-mpsse", /* default usbconn driver */
+ 0x0403, /* VID */
+ 0xbbe0 /* PID */
+};
+usbconn_cable_t usbconn_cable_usbscarab2_ftd2xx = {
+ "usbScarab2", /* cable name */
+ "usbScarab2", /* string pattern, not used */
+ "ftd2xx-mpsse", /* default usbconn driver */
+ 0x0403, /* VID */
+ 0xbbe0 /* PID */
+};
+
+
+/*
+ Local Variables:
+ mode:C
+ c-default-style:gnu
+ indent-tabs-mode:nil
+ End:
+*/
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2003 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2003.
+ *
+ */
+
+#include "sysdep.h"
+
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+#include <assert.h>
+#include <math.h>
+
+#include "cable.h"
+#include "parport.h"
+#include "chain.h"
+#include "fclock.h"
+
+#include "generic.h"
+
+#include <cmd.h>
+
+
+#ifndef HAVE_FMAX
+/* workaround for libm implementations that don't provide the fmax() function */
+#define fmax(_f1_,_f2_) ( (_f1_) > (_f2_) ? (_f1_) : (_f2_) )
+#endif
+
+
+#undef VERBOSE
+
+#ifdef VERBOSE
+void
+print_vector(int len, char *vec)
+{
+ int i;
+ for(i=0;i<len;i++) printf("%c",vec[i]?'1':'0');
+}
+#endif
+
+void
+generic_disconnect( cable_t *cable )
+{
+ cable_done( cable );
+ chain_disconnect( cable->chain );
+}
+
+int
+generic_transfer( cable_t *cable, int len, char *in, char *out )
+{
+ int i;
+
+ if(out)
+ for(i=0; i<len; i++) {
+ out[i] = cable->driver->get_tdo( cable );
+ cable->driver->clock( cable, 0, in[i], 1 );
+ }
+ else
+ for(i=0; i<len; i++) {
+ cable->driver->clock( cable, 0, in[i], 1 );
+ }
+
+ return i;
+}
+
+int
+generic_get_signal( cable_t *cable, pod_sigsel_t sig )
+{
+ return (((PARAM_SIGNALS(cable)) & sig) != 0) ? 1:0;
+}
+
+int
+do_one_queued_action( cable_t *cable )
+{
+ int i;
+
+#ifdef VERBOSE
+ printf("do_one_queued\n");
+#endif
+
+ if ( (i = cable_get_queue_item( cable, &(cable->todo) )) >= 0 )
+ {
+ int j;
+
+ if( cable->done.num_items >= cable->done.max_items )
+ {
+ if( cable->todo.data[i].action == CABLE_GET_TDO
+ || cable->todo.data[i].action == CABLE_GET_SIGNAL
+ || cable->todo.data[i].action == CABLE_TRANSFER )
+ {
+ printf(_("No space in cable activity results queue.\n"));
+ cable_purge_queue( &(cable->done), 1 );
+ }
+ }
+
+ switch(cable->todo.data[i].action)
+ {
+ case CABLE_CLOCK:
+ cable->driver->clock( cable,
+ cable->todo.data[i].arg.clock.tms,
+ cable->todo.data[i].arg.clock.tdi,
+ cable->todo.data[i].arg.clock.n );
+ break;
+ case CABLE_SET_SIGNAL:
+ cable_set_signal( cable,
+ cable->todo.data[i].arg.value.sig,
+ cable->todo.data[i].arg.value.val );
+ break;
+ case CABLE_TRANSFER:
+ {
+ int r = cable->driver->transfer( cable,
+ cable->todo.data[i].arg.transfer.len,
+ cable->todo.data[i].arg.transfer.in,
+ cable->todo.data[i].arg.transfer.out);
+
+ free(cable->todo.data[i].arg.transfer.in);
+ if(cable->todo.data[i].arg.transfer.out != NULL)
+ {
+ j = cable_add_queue_item( cable, &(cable->done) );
+#ifdef VERBOSE
+ printf("add result from transfer to %p.%d (out=%p)\n", &(cable->done), j, cable->todo.data[i].arg.transfer.out);
+#endif
+ cable->done.data[j].action = CABLE_TRANSFER;
+ cable->done.data[j].arg.xferred.len = cable->todo.data[i].arg.transfer.len;
+ cable->done.data[j].arg.xferred.res = r;
+ cable->done.data[j].arg.xferred.out = cable->todo.data[i].arg.transfer.out;
+ }
+ break;
+ }
+ case CABLE_GET_TDO:
+ j = cable_add_queue_item( cable, &(cable->done) );
+#ifdef VERBOSE
+ printf("add result from get_tdo to %p.%d\n", &(cable->done), j);
+#endif
+ cable->done.data[j].action = CABLE_GET_TDO;
+ cable->done.data[j].arg.value.val =
+ cable->driver->get_tdo( cable );
+ break;
+ case CABLE_GET_SIGNAL:
+ j = cable_add_queue_item( cable, &(cable->done) );
+#ifdef VERBOSE
+ printf("add result from get_signal to %p.%d\n", &(cable->done), j);
+#endif
+ cable->done.data[j].action = CABLE_GET_SIGNAL;
+ cable->done.data[j].arg.value.sig =
+ cable->todo.data[i].arg.value.sig;
+ cable->done.data[j].arg.value.val =
+ cable->driver->get_signal( cable,
+ cable->todo.data[i].arg.value.sig );
+ break;
+ }
+#ifdef VERBOSE
+ printf("do_one_queued done\n");
+#endif
+
+ return 1;
+ }
+#ifdef VERBOSE
+ printf("do_one_queued abort\n");
+#endif
+
+ return 0;
+}
+
+void
+generic_flush_one_by_one( cable_t *cable, cable_flush_amount_t how_much )
+{
+ /* This will flush always, even if how_much == OPTIONALLY,
+ * because there is no reason to let the queue grow */
+
+ while( do_one_queued_action( cable ) );
+}
+
+void
+generic_flush_using_transfer( cable_t *cable, cable_flush_amount_t how_much )
+{
+ int i, j, n;
+ char *in, *out;
+
+ if( how_much == OPTIONALLY ) return;
+
+ if(cable->todo.num_items == 0) return;
+
+ do
+ {
+ int r, bits = 0, tdo = 0;
+
+#ifdef VERBOSE
+ printf("flush(%d)\n", cable->todo.num_items);
+#endif
+
+ /* Combine as much as possible into transfer() */
+
+ /* Step 1: Count clocks. Can do only clock(TMS=0), get_tdo, transfer */
+
+ for(i = cable->todo.next_item, n=0; n < cable->todo.num_items; n++)
+ {
+ if(cable->todo.data[i].action != CABLE_CLOCK
+ && cable->todo.data[i].action != CABLE_TRANSFER
+ && cable->todo.data[i].action != CABLE_GET_TDO)
+ {
+#ifdef VERBOSE
+ printf("cutoff at n=%d because action unsuitable for transfer\n", n);
+#endif
+ break;
+ }
+ if(cable->todo.data[i].action == CABLE_CLOCK
+ && cable->todo.data[i].arg.clock.tms != 0)
+ {
+#ifdef VERBOSE
+ printf("cutoff at n=%d because clock.tms=1 is unsuitable for transfer\n", n);
+#endif
+ break;
+ }
+ if(cable->todo.data[i].action == CABLE_CLOCK)
+ {
+ int k = cable->todo.data[i].arg.clock.n;
+#ifdef VERBOSE
+ printf("%d clock(s)\n", k);
+#endif
+ bits += k;
+ }
+ else if(cable->todo.data[i].action == CABLE_TRANSFER)
+ {
+ int k = cable->todo.data[i].arg.transfer.len;
+#ifdef VERBOSE
+ printf("%d transfer\n", k);
+#endif
+ bits += k;
+ }
+ i++;
+ if(i >= cable->todo.max_items) i = 0;
+ }
+
+#ifdef VERBOSE
+ printf("%d combined into one (%d bits)\n", n, bits);
+#endif
+
+ if(bits == 0 || n <= 1)
+ {
+ do_one_queued_action( cable );
+ }
+ else
+ {
+ /* Step 2: Combine into single transfer. */
+
+ in = malloc(bits);
+ out = malloc(bits);
+
+ if(in == NULL || out == NULL)
+ {
+ if(in != NULL) free(in);
+ if(out != NULL) free(out);
+ generic_flush_one_by_one( cable, how_much );
+ break;
+ }
+
+ for(j=0, bits=0, i=cable->todo.next_item; j<n; j++)
+ {
+ if(cable->todo.data[i].action == CABLE_CLOCK)
+ {
+ int k;
+ for(k=0;k<cable->todo.data[i].arg.clock.n;k++)
+ in[bits++] = cable->todo.data[i].arg.clock.tdi;
+ }
+ else if(cable->todo.data[i].action == CABLE_TRANSFER)
+ {
+ int len = cable->todo.data[i].arg.transfer.len;
+ if(len>0)
+ {
+ memcpy(in+bits, cable->todo.data[i].arg.transfer.in, len);
+ bits += len;
+ }
+ }
+ i++;
+ if(i >= cable->todo.max_items) i = 0;
+ }
+
+ /* Step 3: Do the transfer */
+
+ r = cable->driver->transfer( cable, bits, in, out );
+#ifdef VERBOSE
+ printf("in: "); print_vector(bits,in); printf("\n");
+ if(out) { printf("out: "); print_vector(bits,out); printf("\n"); }
+#endif
+
+ /* Step 4: Pick results from transfer */
+
+ for(j=0, bits=0, i=cable->todo.next_item; j<n; j++)
+ {
+ if(cable->todo.data[i].action == CABLE_CLOCK)
+ {
+ int k;
+ for(k=0;k<cable->todo.data[i].arg.clock.n;k++)
+ tdo = out[bits++];
+ }
+ else if(cable->todo.data[i].action == CABLE_GET_TDO)
+ {
+ int c = cable_add_queue_item( cable, &(cable->done) );
+#ifdef VERBOSE
+ printf("add result from transfer to %p.%d\n", &(cable->done), c);
+#endif
+ cable->done.data[c].action = CABLE_GET_TDO;
+ cable->done.data[c].arg.value.val = tdo;
+ }
+ else if(cable->todo.data[i].action == CABLE_TRANSFER)
+ {
+ char *p = cable->todo.data[i].arg.transfer.out;
+ int len = cable->todo.data[i].arg.transfer.len;
+ free(cable->todo.data[i].arg.transfer.in);
+ if(p != NULL)
+ {
+ int c = cable_add_queue_item( cable, &(cable->done) );
+#ifdef VERBOSE
+ printf("add result from transfer to %p.%d\n", &(cable->done), c);
+#endif
+ cable->done.data[c].action = CABLE_TRANSFER;
+ cable->done.data[c].arg.xferred.len = len;
+ cable->done.data[c].arg.xferred.res = r;
+ cable->done.data[c].arg.xferred.out = p;
+ if(len > 0) memcpy(p, out+bits, len);
+ }
+ if(len>0) bits += len;
+ if(bits>0) tdo = out[bits-1];
+ }
+ i++;
+ if(i >= cable->todo.max_items) i = 0;
+ }
+
+ cable->todo.next_item = i;
+ cable->todo.num_items -= n;
+
+ free(in);
+ free(out);
+ }
+ }
+ while(cable->todo.num_items > 0);
+}
+
+void
+generic_set_frequency( cable_t *cable, uint32_t new_frequency )
+{
+ if (new_frequency == 0) {
+ cable->delay = 0;
+ cable->frequency = 0;
+ } else {
+ const double tolerance = 0.1;
+ uint32_t loops = 2048;
+ uint32_t delay = cable->delay;
+ uint32_t frequency = cable->frequency;
+
+ if (new_frequency > (1.0 - tolerance) * frequency &&
+ new_frequency < (1.0 + tolerance) * frequency)
+ return;
+
+ printf("requested frequency %u, now calibrating delay loop\n", new_frequency);
+
+ while (1) {
+ uint32_t i, new_delay;
+ long double start, end, real_frequency;
+
+ cable->delay = delay;
+ start = frealtime();
+ for (i = 0; i < loops; ++i) {
+ cable->driver->clock(cable, 0, 0, 1);
+ }
+ end = frealtime();
+
+ if (end < start) {
+ printf( _("calibration error, wall clock is not monotonically increasing\n") );
+ break;
+ }
+ if (end == start) {
+ /* retry with higher loop count
+ if the timer is not fine grained enough */
+ loops *= 2;
+ continue;
+ }
+ real_frequency = (long double)loops / (end - start);
+ printf("new real frequency %Lg, delay %u\n",
+ real_frequency, delay);
+
+ new_delay = (long double)delay * real_frequency / new_frequency;
+
+ if (real_frequency >= (1.0 - tolerance)*new_frequency) {
+ if (real_frequency <= (1.0 + tolerance)*new_frequency) {
+ frequency = real_frequency;
+ break;
+ }
+ if (new_delay > delay) {
+ delay = new_delay;
+ } else {
+ delay++;
+ }
+
+ } else {
+ if (delay == 0) {
+ printf("operating without delay\n");
+ frequency = real_frequency;
+ break;
+ }
+
+ if (new_delay < delay) {
+ delay = new_delay;
+ } else {
+ if (delay > 0)
+ delay--;
+ }
+ }
+ }
+
+ printf("done\n");
+
+ cable->delay = delay;
+ cable->frequency = frequency;
+ }
+}
+
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2003 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2003.
+ *
+ */
+
+#ifndef GENERIC_H
+#define GENERIC_H
+
+#include "cable.h"
+#include "parport.h"
+
+typedef struct {
+ int signals;
+} generic_params_t;
+
+#define PARAM_SIGNALS(cable) ((generic_params_t *) cable->params)->signals
+
+void generic_disconnect( cable_t *cable );
+void generic_set_frequency( cable_t *cable, uint32_t new_freq );
+int generic_transfer( cable_t *cable, int len, char *in, char *out );
+int generic_get_signal( cable_t *cable, pod_sigsel_t sig );
+void generic_flush_one_by_one( cable_t *cable, cable_flush_amount_t hm );
+void generic_flush_using_transfer( cable_t *cable, cable_flush_amount_t hm );
+
+#endif /* GENERIC_H */
--- /dev/null
+/*
+ * $Id: generic.c 1003 2008-02-10 10:00:30Z kawk $
+ *
+ * Copyright (C) 2003 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2003.
+ *
+ */
+
+#include "sysdep.h"
+
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+
+#include "cable.h"
+#include "chain.h"
+#include "parport.h"
+#include "generic.h"
+#include "generic_parport.h"
+
+#include <cmd.h>
+
+#undef VERBOSE
+
+#ifdef VERBOSE
+void
+print_vector(int len, char *vec)
+{
+ int i;
+ for(i=0;i<len;i++) printf("%c",vec[i]?'1':'0');
+}
+#endif
+
+int
+generic_parport_connect( char *params[], cable_t *cable )
+{
+ generic_params_t *cable_params;
+ parport_t *port;
+ int i;
+
+ if ( cmd_params( params ) < 3 ) {
+ printf( _("not enough arguments!\n") );
+ return 1;
+ }
+
+ /* search parport driver list */
+ for (i = 0; parport_drivers[i]; i++)
+ if (strcasecmp( params[1], parport_drivers[i]->type ) == 0)
+ break;
+ if (!parport_drivers[i]) {
+ printf( _("Unknown port driver: %s\n"), params[1] );
+ return 2;
+ }
+
+ /* set up parport driver */
+ port = parport_drivers[i]->connect( (const char **) ¶ms[2],
+ cmd_params( params ) - 2 );
+
+ if (port == NULL) {
+ printf( _("Error: Cable connection failed!\n") );
+ return 3;
+ }
+
+ cable_params = malloc( sizeof *cable_params );
+ if (!cable_params) {
+ printf( _("%s(%d) malloc failed!\n"), __FILE__, __LINE__);
+ parport_drivers[i]->parport_free( port );
+ return 4;
+ }
+
+ cable->link.port = port;
+ cable->params = cable_params;
+ cable->chain = NULL;
+
+ return 0;
+}
+
+void
+generic_parport_free( cable_t *cable )
+{
+ cable->link.port->driver->parport_free( cable->link.port );
+ free( cable->params );
+ free( cable );
+}
+
+void
+generic_parport_done( cable_t *cable )
+{
+ parport_close( cable->link.port );
+}
+
+void
+generic_parport_help( const char *cablename )
+{
+ printf( _(
+ "Usage: cable %s parallel PORTADDR\n"
+#if ENABLE_LOWLEVEL_PPDEV
+ " or: cable %s ppdev PPDEV\n"
+#endif
+#if HAVE_DEV_PPBUS_PPI_H
+ " or: cable %s ppi PPIDEV\n"
+#endif
+ "\n"
+ "PORTADDR parallel port address (e.g. 0x378)\n"
+#if ENABLE_LOWLEVEL_PPDEV
+ "PPDEV ppdev device (e.g. /dev/parport0)\n"
+#endif
+#if HAVE_DEV_PPBUS_PPI_H
+ "PPIDEF ppi device (e.g. /dev/ppi0)\n"
+#endif
+ "\n"
+ ),
+#if ENABLE_LOWLEVEL_PPDEV
+ cablename,
+#endif
+#if HAVE_DEV_PPBUS_PPI_H
+ cablename,
+#endif
+ cablename
+ );
+}
+
--- /dev/null
+/*
+ * $Id: generic.h 1002 2008-02-10 09:50:59Z kawk $
+ *
+ * Copyright (C) 2003 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2003.
+ *
+ */
+
+#ifndef GENERIC_PARPORT_H
+#define GENERIC_PARPORT_H
+
+#include "cable.h"
+#include "parport.h"
+
+int generic_parport_connect( char *params[], cable_t *cable );
+void generic_parport_free( cable_t *cable );
+void generic_parport_done( cable_t *cable );
+void generic_parport_help( const char *name );
+
+#endif /* GENERIC_H */
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2003 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2003.
+ *
+ */
+
+#include "sysdep.h"
+
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+
+#include "cable.h"
+#include "chain.h"
+#include "generic.h"
+#include "generic_usbconn.h"
+
+#include <cmd.h>
+
+#undef VERBOSE
+
+#ifdef ENABLE_CABLE_XPC
+extern usbconn_cable_t usbconn_cable_xpc_int;
+extern usbconn_cable_t usbconn_cable_xpc_ext;
+#endif
+#ifdef ENABLE_CABLE_JLINK
+extern usbconn_cable_t usbconn_cable_jlink;
+#endif
+#ifdef ENABLE_CABLE_FT2232
+#ifdef ENABLE_LOWLEVEL_FTD2XX
+extern usbconn_cable_t usbconn_cable_ft2232_ftd2xx;
+extern usbconn_cable_t usbconn_cable_armusbocd_ftd2xx;
+extern usbconn_cable_t usbconn_cable_armusbocdtiny_ftd2xx;
+extern usbconn_cable_t usbconn_cable_gnice_ftd2xx;
+extern usbconn_cable_t usbconn_cable_jtagkey_ftd2xx;
+extern usbconn_cable_t usbconn_cable_oocdlinks_ftd2xx;
+extern usbconn_cable_t usbconn_cable_turtelizer2_ftd2xx;
+extern usbconn_cable_t usbconn_cable_usbtojtagif_ftd2xx;
+extern usbconn_cable_t usbconn_cable_signalyzer_ftd2xx;
+extern usbconn_cable_t usbconn_cable_flyswatter_ftd2xx;
+extern usbconn_cable_t usbconn_cable_usbscarab2_ftd2xx;
+#endif
+#ifdef ENABLE_LOWLEVEL_FTDI
+extern usbconn_cable_t usbconn_cable_ft2232_ftdi;
+extern usbconn_cable_t usbconn_cable_armusbocd_ftdi;
+extern usbconn_cable_t usbconn_cable_armusbocdtiny_ftdi;
+extern usbconn_cable_t usbconn_cable_gnice_ftdi;
+extern usbconn_cable_t usbconn_cable_jtagkey_ftdi;
+extern usbconn_cable_t usbconn_cable_oocdlinks_ftdi;
+extern usbconn_cable_t usbconn_cable_turtelizer2_ftdi;
+extern usbconn_cable_t usbconn_cable_usbtojtagif_ftdi;
+extern usbconn_cable_t usbconn_cable_signalyzer_ftdi;
+extern usbconn_cable_t usbconn_cable_flyswatter_ftdi;
+extern usbconn_cable_t usbconn_cable_usbscarab2_ftdi;
+#endif
+#endif
+#ifdef ENABLE_CABLE_USBBLASTER
+#ifdef ENABLE_LOWLEVEL_FTD2XX
+extern usbconn_cable_t usbconn_cable_usbblaster_ftd2xx;
+extern usbconn_cable_t usbconn_cable_cubic_cyclonium_ftd2xx;
+extern usbconn_cable_t usbconn_cable_nios_eval_ftd2xx;
+extern usbconn_cable_t usbconn_cable_usb_jtag_ftd2xx;
+#endif
+#ifdef ENABLE_LOWLEVEL_FTDI
+extern usbconn_cable_t usbconn_cable_usbblaster_ftdi;
+extern usbconn_cable_t usbconn_cable_cubic_cyclonium_ftdi;
+extern usbconn_cable_t usbconn_cable_nios_eval_ftdi;
+extern usbconn_cable_t usbconn_cable_usb_jtag_ftdi;
+#endif
+#endif
+
+usbconn_cable_t *usbconn_cables[] =
+{
+#ifdef ENABLE_CABLE_XPC
+ &usbconn_cable_xpc_int,
+ &usbconn_cable_xpc_ext,
+#endif
+#ifdef ENABLE_CABLE_JLINK
+ &usbconn_cable_jlink,
+#endif
+#ifdef ENABLE_CABLE_FT2232
+#ifdef ENABLE_LOWLEVEL_FTD2XX
+ &usbconn_cable_ft2232_ftd2xx,
+ &usbconn_cable_armusbocd_ftd2xx,
+ &usbconn_cable_armusbocdtiny_ftd2xx,
+ &usbconn_cable_gnice_ftd2xx,
+ &usbconn_cable_jtagkey_ftd2xx,
+ &usbconn_cable_oocdlinks_ftd2xx,
+ &usbconn_cable_turtelizer2_ftd2xx,
+ &usbconn_cable_usbtojtagif_ftd2xx,
+ &usbconn_cable_signalyzer_ftd2xx,
+ &usbconn_cable_flyswatter_ftd2xx,
+ &usbconn_cable_usbscarab2_ftd2xx,
+#endif
+#ifdef ENABLE_LOWLEVEL_FTDI
+ &usbconn_cable_ft2232_ftdi,
+ &usbconn_cable_armusbocd_ftdi,
+ &usbconn_cable_armusbocdtiny_ftdi,
+ &usbconn_cable_gnice_ftdi,
+ &usbconn_cable_jtagkey_ftdi,
+ &usbconn_cable_oocdlinks_ftdi,
+ &usbconn_cable_turtelizer2_ftdi,
+ &usbconn_cable_usbtojtagif_ftdi,
+ &usbconn_cable_signalyzer_ftdi,
+ &usbconn_cable_flyswatter_ftdi,
+ &usbconn_cable_usbscarab2_ftdi,
+#endif
+#endif
+#ifdef ENABLE_CABLE_USBBLASTER
+#ifdef ENABLE_LOWLEVEL_FTD2XX
+ &usbconn_cable_usbblaster_ftd2xx,
+ &usbconn_cable_cubic_cyclonium_ftd2xx,
+ &usbconn_cable_nios_eval_ftd2xx,
+ &usbconn_cable_usb_jtag_ftd2xx,
+#endif
+#ifdef ENABLE_LOWLEVEL_FTDI
+ &usbconn_cable_usbblaster_ftdi,
+ &usbconn_cable_cubic_cyclonium_ftdi,
+ &usbconn_cable_nios_eval_ftdi,
+ &usbconn_cable_usb_jtag_ftdi,
+#endif
+#endif
+ NULL
+};
+
+int
+generic_usbconn_connect( char *params[], cable_t *cable )
+{
+ usbconn_cable_t user_specified = {
+ NULL, /* no name */
+ NULL, /* no string pattern */
+ NULL, /* no specific driver */
+ -1, /* no VID */
+ -1, /* no PID */
+ };
+
+ int paramc = cmd_params( params );
+ generic_params_t *cable_params;
+ usbconn_t *conn = NULL;
+ int i;
+
+ if(strcasecmp(params[0], "usb") != 0)
+ {
+ user_specified.name = params[0];
+ }
+
+ /* parse arguments beyond the cable name */
+ for (i = 1; i < paramc; i++)
+ {
+ if(strncasecmp("pid=", params[i], 4) == 0)
+ {
+ user_specified.pid = strtol( params[i] + 4, NULL, 16 );
+ }
+ else if(strncasecmp("vid=", params[i], 4) == 0)
+ {
+ user_specified.vid = strtol( params[i] + 4, NULL, 16 );
+ }
+ else if(strncasecmp("desc=", params[i], 5) == 0)
+ {
+ user_specified.desc = params[i] + 5;
+ }
+ else if(strncasecmp("driver=", params[i], 7) == 0)
+ {
+ user_specified.driver = params[i] + 7;
+ }
+ }
+
+ /* search usbconn driver list */
+ for (i = 0; usbconn_drivers[i] && !conn; i++)
+ {
+ if ((user_specified.driver == NULL)
+ || (strcasecmp(user_specified.driver, usbconn_drivers[i]->type) == 0))
+ {
+ int j;
+
+ /* search cable list */
+ for (j = 0; usbconn_cables[j] && !conn; j++)
+ {
+ if((user_specified.name == NULL)
+ || (strcasecmp(user_specified.name, usbconn_cables[j]->name) == 0))
+ {
+ if(strcasecmp(usbconn_cables[j]->driver, usbconn_drivers[i]->type) == 0)
+ {
+ usbconn_cable_t cable_try = *(usbconn_cables[j]);
+
+ if(user_specified.vid >= 0) cable_try.vid = user_specified.vid;
+ if(user_specified.pid >= 0) cable_try.pid = user_specified.pid;
+ if(user_specified.desc != 0) cable_try.desc = user_specified.desc;
+
+ conn = usbconn_drivers[i]->connect( (const char **) ¶ms[1],
+ paramc - 1, &cable_try );
+ }
+ }
+ }
+ }
+ }
+
+ if (!conn) {
+ printf( _("Couldn't connect to suitable USB device.\n") );
+ return 2;
+ }
+
+ cable_params = malloc( sizeof(generic_params_t) );
+ if (!cable_params) {
+ printf( _("%s(%d) malloc failed!\n"), __FILE__, __LINE__);
+ usbconn_drivers[i]->free( conn );
+ return 4;
+ }
+
+ cable->link.usb = conn;
+ cable->params = cable_params;
+ cable->chain = NULL;
+
+ return 0;
+}
+
+void
+generic_usbconn_free( cable_t *cable )
+{
+ cable->link.usb->driver->free( cable->link.usb );
+ free( cable->params );
+ free( cable );
+}
+
+void
+generic_usbconn_done( cable_t *cable )
+{
+ usbconn_close( cable->link.usb );
+}
+
+void
+generic_usbconn_help( const char *cablename )
+{
+ printf( _(
+ "Usage: cable %s [vid=VID] [pid=PID] [desc=DESC] [...]\n"
+ "\n"
+ "VID USB Device Vendor ID (hex, e.g. 0abc)\n"
+ "PID USB Device Product ID (hex, e.g. 0abc)\n"
+ "DESC Some string to match in description or serial no.\n"
+ "\n"
+ ),
+ cablename
+ );
+}
+
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2003 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2003.
+ *
+ */
+
+#ifndef GENERIC_USBCONN_H
+#define GENERIC_USBCONN_H
+
+#include "cable.h"
+#include "usbconn.h"
+
+int generic_usbconn_connect( char *params[], cable_t *cable );
+void generic_usbconn_done( cable_t *cable );
+void generic_usbconn_help( const char *name );
+void generic_usbconn_free( cable_t *cable );
+
+#endif /* GENERIC_H */
--- /dev/null
+/*
+ * $Id: $
+ *
+ * JTAG target simulator JIM "cable" driver
+ *
+ * Copyright (C) 2008 Kolja Waschk
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ */
+
+#include "sysdep.h"
+
+#include <stdlib.h>
+#include <string.h>
+#include <ctype.h>
+
+#include "cable.h"
+#include "parport.h"
+#include "chain.h"
+
+#include "generic.h"
+
+#include <cmd.h>
+
+#include <jim.h>
+
+/* private parameters of this cable driver */
+typedef struct
+{
+ jim_state_t *s;
+}
+jim_cable_params_t;
+
+int
+jim_cable_connect( char *params[], cable_t *cable )
+{
+ jim_cable_params_t *cable_params;
+ jim_state_t *s;
+
+ if ( cmd_params( params ) < 1 ) {
+ printf( _("not enough arguments!\n") );
+ return 1;
+ }
+
+ printf( _("JTAG target simulator JIM - work in progress!\n"));
+
+ s = jim_init();
+ if (!s) {
+ printf( _("Initialization failed.\n") );
+ return 3;
+ }
+
+ cable_params = malloc( sizeof(jim_cable_params_t) );
+ if (!cable_params) {
+ printf( _("%s(%d) malloc failed!\n"), __FILE__, __LINE__);
+ jim_free( s );
+ return 4;
+ }
+
+ cable->params = cable_params;
+ ((jim_cable_params_t *)(cable->params))->s = s;
+ cable->chain = NULL;
+
+ return 0;
+}
+
+void
+jim_cable_disconnect( cable_t *cable )
+{
+ cable_done( cable );
+ chain_disconnect( cable->chain );
+}
+
+void
+jim_cable_free( cable_t *cable )
+{
+ if(cable->params != NULL)
+ {
+ jim_free( ((jim_cable_params_t*)(cable->params))->s );
+ free( cable->params );
+ }
+ free( cable );
+}
+
+void
+jim_cable_done( cable_t *cable )
+{
+}
+
+static int
+jim_cable_init( cable_t *cable )
+{
+ return 0;
+}
+
+static void
+jim_cable_clock( cable_t *cable, int tms, int tdi, int n )
+{
+ int i;
+ jim_cable_params_t *jcp = (jim_cable_params_t*)(cable->params);
+
+ for(i = 0; i < n; i++)
+ {
+ jim_tck_rise( jcp->s, tms, tdi );
+ jim_tck_fall( jcp->s );
+ }
+}
+
+static int
+jim_cable_get_tdo( cable_t *cable )
+{
+ jim_cable_params_t *jcp = (jim_cable_params_t*)(cable->params);
+
+ return jim_get_tdo( jcp->s );
+}
+
+static int
+jim_cable_get_trst( cable_t *cable )
+{
+ jim_cable_params_t *jcp = (jim_cable_params_t*)(cable->params);
+
+ return jim_get_trst( jcp->s );
+}
+
+static int
+jim_cable_set_trst( cable_t *cable, int trst )
+{
+ jim_cable_params_t *jcp = (jim_cable_params_t*)(cable->params);
+
+ jim_set_trst( jcp->s, trst );
+ return jim_get_trst( jcp->s );
+}
+
+static void
+jim_cable_help( const char *cablename )
+{
+ printf( _(
+ "Usage: cable %s\n"
+ ),
+ cablename
+ );
+}
+
+cable_driver_t jim_cable_driver = {
+ "JIM",
+ N_("JTAG target simulator JIM"),
+ jim_cable_connect,
+ jim_cable_disconnect,
+ jim_cable_free,
+ jim_cable_init,
+ jim_cable_done,
+ generic_set_frequency,
+ jim_cable_clock,
+ jim_cable_get_tdo,
+ generic_transfer,
+ jim_cable_set_trst,
+ jim_cable_get_trst,
+ generic_flush_using_transfer,
+ jim_cable_help
+};
+
--- /dev/null
+/*
+ * $Id: jlink.c,v 1.8 2003/08/19 08:42:20 telka Exp $
+ *
+ * Segger J-Link cable driver
+ *
+ * Large portions of code were taken from the OpenOCD driver written by
+ * Juergen Stuber, which in turn was based on Dominic Rath's and Benedikt
+ * Sauter's usbprog.c. Therefore most of this code is actually
+ *
+ * Copyright (C) 2007 Juergen Stuber
+ *
+ * Modified to work in UrJTAG by K. Waschk in 2008.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ */
+
+
+#include "generic.h"
+#include "generic_usbconn.h"
+
+#include "usbconn.h"
+#include "usbconn/libusb.h"
+
+/* ---------------------------------------------------------------------- */
+
+
+#include "sysdep.h"
+
+#include "cable.h"
+#include "chain.h"
+
+#include "jtag.h"
+
+#include <usb.h>
+#include <string.h>
+
+#define INFO(...) printf(__VA_ARGS__)
+#define ERROR(...) printf(__VA_ARGS__)
+#define DEBUG(...)
+
+#define JLINK_WRITE_ENDPOINT 0x02
+#define JLINK_READ_ENDPOINT 0x81
+
+#define JLINK_USB_TIMEOUT 100
+
+#define JLINK_IN_BUFFER_SIZE 2064
+#define JLINK_OUT_BUFFER_SIZE 2064
+
+/* We use the maximal value observed */
+#define JLINK_TAP_BUFFER_SIZE 390
+
+typedef struct
+{
+ /* Global USB buffers */
+ char usb_in_buffer[JLINK_IN_BUFFER_SIZE];
+ char usb_out_buffer[JLINK_OUT_BUFFER_SIZE];
+
+ int tap_length;
+ uint8_t tms_buffer[JLINK_TAP_BUFFER_SIZE];
+ uint8_t tdi_buffer[JLINK_TAP_BUFFER_SIZE];
+
+ int last_tdo;
+}
+jlink_usbconn_data_t;
+
+/* Constants for JLink command */
+#define JLINK_DO_TRST_CYCLE 0x02
+#define JLINK_SPEED_COMMAND 0x05
+#define JLINK_GET_STATUS_COMMAND 0x07
+#define JLINK_GET_A 0xc1
+#define JLINK_GET_B 0xc2
+#define JLINK_SET_TMS_LOW_COMMAND 0xc9
+#define JLINK_SET_TMS_HIGH_COMMAND 0xca
+#define JLINK_SET_TDI_LOW_COMMAND 0xcb
+#define JLINK_SET_TDI_HIGH_COMMAND 0xcc
+#define JLINK_TAP_SEQUENCE_COMMAND 0xcd
+#define JLINK_SET_SRST_LOW_COMMAND 0xdc
+#define JLINK_SET_SRST_HIGH_COMMAND 0xdd
+#define JLINK_SET_TRST_LOW_COMMAND 0xde
+#define JLINK_SET_TRST_HIGH_COMMAND 0xdf
+
+#define JLINK_MAX_SPEED 12000
+
+/* Queue command functions */
+static void jlink_reset( libusb_param_t *params, int trst, int srst);
+static void jlink_simple_command( libusb_param_t *params, uint8_t command );
+
+
+/* J-Link tap buffer functions */
+static void jlink_tap_init( jlink_usbconn_data_t *data );
+static int jlink_tap_execute( libusb_param_t *params );
+static void jlink_tap_append_step( jlink_usbconn_data_t *data, int, int);
+
+/* Jlink lowlevel functions */
+static int jlink_usb_message( libusb_param_t *params, int, int );
+static int jlink_usb_write( libusb_param_t *params, unsigned int );
+static int jlink_usb_read( libusb_param_t *params );
+
+static void jlink_debug_buffer(char *buffer, int length);
+
+/* API functions */
+
+void jlink_set_frequency( cable_t *cable, uint32_t frequency );
+
+/***************************************************************************/
+/* J-Link tap functions */
+
+void jlink_reset( libusb_param_t *params, int trst, int srst)
+{
+ DEBUG("trst: %i, srst: %i\n", trst, srst);
+
+ /* Signals are active low */
+ if (trst == 0)
+ {
+ jlink_simple_command( params, JLINK_SET_TRST_HIGH_COMMAND);
+ }
+ else if (trst == 1)
+ {
+ jlink_simple_command( params, JLINK_SET_TRST_LOW_COMMAND);
+ }
+
+ if (srst == 0)
+ {
+ jlink_simple_command( params, JLINK_SET_SRST_HIGH_COMMAND);
+ }
+ else if (srst == 1)
+ {
+ jlink_simple_command( params, JLINK_SET_SRST_LOW_COMMAND);
+ }
+}
+
+
+static void jlink_simple_command( libusb_param_t *params, uint8_t command)
+{
+ int result;
+ jlink_usbconn_data_t *data = params->data;
+
+ DEBUG("simple_command: 0x%02x\n", command);
+
+ data->usb_out_buffer[0] = command;
+ result = jlink_usb_write( params, 1 );
+
+ if (result != 1)
+ {
+ ERROR("J-Link command 0x%02x failed (%d)\n", command, result);
+ }
+}
+
+static int jlink_get_status( libusb_param_t *params )
+{
+ int result;
+ jlink_usbconn_data_t *data = params->data;
+
+ jlink_simple_command( params, 0x07 );
+
+ result = jlink_usb_read( params );
+
+ if(result == 8)
+ {
+ int vref = data->usb_in_buffer[0] + (data->usb_in_buffer[1]<<8);
+ INFO("Vref = %d.%d TCK=%d TDI=%d TDO=%d TMS=%d TRES=%d TRST=%d\n",
+ vref / 1000, vref % 1000,
+ data->usb_in_buffer[2],
+ data->usb_in_buffer[3],
+ data->usb_in_buffer[4],
+ data->usb_in_buffer[5],
+ data->usb_in_buffer[6],
+ data->usb_in_buffer[7]);
+ if(vref < 1500)
+ {
+ ERROR("Vref too low. Eventually the target isn't powered or disconnected?\n");
+ result = -15;
+ }
+ }
+ else
+ {
+ ERROR("J-Link command 0x07 (get status) failed (%d)\n", result);
+ }
+
+ return result;
+}
+
+
+/***************************************************************************/
+
+static void jlink_tap_init( jlink_usbconn_data_t *data )
+{
+ data->tap_length = 0;
+}
+
+static void jlink_tap_append_step( jlink_usbconn_data_t *data, int tms, int tdi)
+{
+ int index = data->tap_length >> 3;
+
+ if (index < JLINK_TAP_BUFFER_SIZE)
+ {
+ int bit_index = data->tap_length & 7;
+ uint8_t bit = 1 << bit_index;
+
+ if(bit_index == 0)
+ {
+ data->tms_buffer[index] = 0;
+ data->tdi_buffer[index] = 0;
+ }
+
+ if(tms) data->tms_buffer[index] |= bit;
+ if(tdi) data->tdi_buffer[index] |= bit;
+
+ data->tap_length++;
+ }
+ else
+ {
+ ERROR("jlink_tap_append_step, overflow\n");
+ }
+}
+
+/* Send a tap sequence to the device, and receive the answer */
+
+static int jlink_tap_execute( libusb_param_t *params )
+{
+ jlink_usbconn_data_t *data = params->data;
+ int byte_length;
+ int tms_offset;
+ int tdi_offset;
+ int i;
+ int result;
+
+ if (data->tap_length > 0)
+ {
+ byte_length = (data->tap_length + 7) >> 3;
+ data->usb_out_buffer[0] = JLINK_TAP_SEQUENCE_COMMAND;
+ data->usb_out_buffer[1] = (data->tap_length >> 0) & 0xff;
+ data->usb_out_buffer[2] = (data->tap_length >> 8) & 0xff;
+
+ tms_offset = 3;
+ for (i = 0; i < byte_length; i++)
+ {
+ data->usb_out_buffer[tms_offset + i] =
+ data->tms_buffer[i];
+ }
+
+ tdi_offset = tms_offset + byte_length;
+ for (i = 0; i < byte_length; i++)
+ {
+ data->usb_out_buffer[tdi_offset + i] =
+ data->tdi_buffer[i];
+ }
+
+ result = jlink_usb_message(
+ params,
+ 3 + 2 * byte_length,
+ byte_length);
+
+ if (result == byte_length)
+ {
+ int bit_index = (data->tap_length - 1) & 7;
+ uint8_t bit = 1 << bit_index;
+
+ data->last_tdo =
+ ((data->usb_in_buffer[byte_length-1]) & bit ) ? 1 : 0;
+ }
+ else
+ {
+ ERROR(
+ "jlink_tap_execute, wrong result %d, expected %d\n",
+ result,
+ byte_length);
+
+ return -2;
+ }
+
+ jlink_tap_init( data );
+ }
+ return 0;
+}
+
+/* ---------------------------------------------------------------------- */
+
+/* Send a message and receive the reply. */
+static int jlink_usb_message(
+ libusb_param_t *params,
+ int out_length,
+ int in_length)
+{
+ int result;
+
+ result = jlink_usb_write( params, out_length );
+ if (result == out_length)
+ {
+ result = jlink_usb_read( params );
+ if (result == in_length)
+ {
+ return result;
+ }
+ else
+ {
+ ERROR(
+ "usb_bulk_read failed (requested=%d, result=%d)\n",
+ in_length,
+ result);
+
+ return -1;
+ }
+ }
+ else
+ {
+ ERROR(
+ "usb_bulk_write failed (requested=%d, result=%d)\n",
+ out_length,
+ result);
+
+ return -1;
+ }
+}
+
+/* ---------------------------------------------------------------------- */
+
+/* Write data from out_buffer to USB. */
+static int jlink_usb_write( libusb_param_t *params, unsigned int out_length )
+{
+ int result;
+ jlink_usbconn_data_t *data;
+
+ data = params->data;
+
+ if (out_length > JLINK_OUT_BUFFER_SIZE)
+ {
+ ERROR("jlink_jtag_write illegal out_length=%d (max=%d)\n", out_length,
+ JLINK_OUT_BUFFER_SIZE);
+
+ return -1;
+ }
+
+ result = usb_bulk_write(
+ params->handle,
+ JLINK_WRITE_ENDPOINT,
+ data->usb_out_buffer,
+ out_length,
+ JLINK_USB_TIMEOUT);
+
+ DEBUG("jlink_usb_write, out_length = %d, result = %d\n", out_length, result);
+ jlink_debug_buffer(data->usb_out_buffer, out_length);
+ return result;
+}
+
+/* ---------------------------------------------------------------------- */
+
+/* Read data from USB into in_buffer. */
+static int jlink_usb_read( libusb_param_t *params )
+{
+ jlink_usbconn_data_t *data = params->data;
+
+ int result = usb_bulk_read(
+ params->handle,
+ JLINK_READ_ENDPOINT,
+ data->usb_in_buffer,
+ JLINK_IN_BUFFER_SIZE,
+ JLINK_USB_TIMEOUT);
+
+ DEBUG("jlink_usb_read, result = %d\n", result);
+ jlink_debug_buffer(data->usb_in_buffer, result);
+ return result;
+}
+
+/* ---------------------------------------------------------------------- */
+
+#define BYTES_PER_LINE 16
+
+static void jlink_debug_buffer(char *buffer, int length)
+{
+ char line[81];
+ char s[4];
+ int i;
+ int j;
+
+ for (i = 0; i < length; i += BYTES_PER_LINE)
+ {
+ snprintf(line, 5, "%04x", i);
+ for (j = i; j < i + BYTES_PER_LINE && j < length; j++)
+ {
+ snprintf(s, 4, " %02x", buffer[j]);
+ strcat(line, s);
+ }
+ DEBUG(line);
+ DEBUG("\n");
+ }
+}
+
+/* ---------------------------------------------------------------------- */
+
+static int
+jlink_init( cable_t *cable )
+{
+ int result;
+ libusb_param_t *params;
+ jlink_usbconn_data_t *data;
+
+ params = cable->link.usb->params;
+ params->data = malloc(sizeof(jlink_usbconn_data_t));
+ if(params->data == NULL)
+ {
+ return -1;
+ }
+ data = params->data;
+
+ if (usbconn_open( cable->link.usb )) return -1;
+
+ jlink_tap_init( data );
+
+ result = jlink_usb_read( params );
+
+ if (result != 2 || data->usb_in_buffer[0] != 0x07
+ || data->usb_in_buffer[1] != 0x00)
+ {
+ INFO("J-Link initial read failed, don't worry (result=%d)\n", result);
+ }
+
+ result = jlink_get_status( params );
+ if (result < 0)
+ {
+ ERROR("Resetting J-Link. Please retry the cable command.\n");
+ usb_reset ( params->handle );
+ return -1;
+ }
+
+ INFO("J-Link JTAG Interface ready\n");
+
+ jlink_set_frequency( cable, 4E6 );
+
+ jlink_reset( params, 0, 0);
+
+ return 0;
+}
+
+/* ---------------------------------------------------------------------- */
+
+static
+void jlink_free( cable_t *cable )
+{
+ jlink_usbconn_data_t *data;
+ data = ((libusb_param_t*)(cable->link.usb->params))->data;
+ free(data);
+
+ generic_usbconn_free( cable );
+}
+
+/* ---------------------------------------------------------------------- */
+
+void jlink_set_frequency( cable_t *cable, uint32_t frequency )
+{
+ int result;
+ int speed = frequency / 1E3;
+ libusb_param_t *params = cable->link.usb->params;
+ jlink_usbconn_data_t *data = params->data;
+
+ if (1 <= speed && speed <= JLINK_MAX_SPEED)
+ {
+ data->usb_out_buffer[0] = JLINK_SPEED_COMMAND;
+ /* speed = 0xFFFF for automatic (probably needs RTCK) */
+ data->usb_out_buffer[1] = (speed >> 0) & 0xff;
+ data->usb_out_buffer[2] = (speed >> 8) & 0xff;
+
+ result = jlink_usb_write( params, 3 );
+
+ if (result != 3)
+ {
+ ERROR("J-Link setting speed failed (%d)\n", result);
+ }
+ }
+ else
+ {
+ INFO("Requested speed %dkHz exceeds maximum of %dkHz, ignored\n",
+ speed, JLINK_MAX_SPEED);
+ }
+}
+
+/* ---------------------------------------------------------------------- */
+
+static void
+jlink_clock( cable_t *cable, int tms, int tdi, int n )
+{
+ int i;
+ libusb_param_t *params = cable->link.usb->params;
+ jlink_usbconn_data_t *data = params->data;
+
+ for (i = 0; i < n; i++)
+ {
+ jlink_tap_append_step( data, tms, tdi);
+ }
+ jlink_tap_execute( params );
+}
+
+/* ---------------------------------------------------------------------- */
+
+static int
+jlink_get_tdo( cable_t *cable )
+{
+ libusb_param_t *params = cable->link.usb->params;
+ jlink_usbconn_data_t *data = params->data;
+
+ // TODO: This is the TDO _before_ last clock occured
+ // ... Anyone knows how to get the current TDO state?
+
+ return data->last_tdo;
+}
+
+/* ---------------------------------------------------------------------- */
+
+void
+jlink_copy_out_data( jlink_usbconn_data_t *data, int len, int offset, char *buf )
+{
+ int i;
+ for(i=0;i<len;i++)
+ {
+ int bit = (1<<(i&7));
+ int byte = i>>3;
+ buf[offset+i] = (data->usb_in_buffer[byte] & bit) ? 1 : 0;
+ }
+}
+
+int
+jlink_transfer( cable_t *cable, int len, char *in, char *out )
+{
+ int i,j;
+ libusb_param_t *params = cable->link.usb->params;
+ jlink_usbconn_data_t *data = params->data;
+
+ for(j=0, i=0; i<len; i++)
+ {
+ jlink_tap_append_step(data, 0, in[i]);
+
+ if(data->tap_length >= 8*JLINK_TAP_BUFFER_SIZE)
+ {
+ jlink_tap_execute( params );
+ if(out) jlink_copy_out_data( data, i-j, j, out);
+ j = i;
+ }
+ }
+ if(data->tap_length > 0)
+ {
+ jlink_tap_execute( params );
+ if(out) jlink_copy_out_data( data, i-j, j, out);
+ }
+
+ return i;
+}
+
+/* ---------------------------------------------------------------------- */
+
+static int
+jlink_set_signal( cable_t *cable, int mask, int val )
+{
+ return 1;
+}
+
+cable_driver_t jlink_cable_driver = {
+ "jlink",
+ N_("Segger/IAR J-Link, Atmel SAM-ICE and others."),
+ generic_usbconn_connect,
+ generic_disconnect,
+ jlink_free,
+ jlink_init,
+ generic_usbconn_done,
+ jlink_set_frequency,
+ jlink_clock,
+ jlink_get_tdo,
+ jlink_transfer,
+ jlink_set_signal,
+ generic_get_signal,
+ generic_flush_using_transfer,
+ generic_usbconn_help
+};
+
+usbconn_cable_t usbconn_cable_jlink = {
+ "jlink", /* cable name */
+ NULL, /* string pattern, not used */
+ "libusb", /* usbconn driver */
+ 0x1366, /* VID */
+ 0x0101 /* PID */
+};
+
+
--- /dev/null
+/*
+ * $Id$
+ *
+ * Keith & Koep JTAG Cable Driver
+ * Copyright (C) 2002, 2003 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2002, 2003.
+ *
+ * Documentation:
+ * [1] ftp://www.keith-koep.com/pub/arm-tools/jtag/jtag05_sch.pdf
+ *
+ */
+
+#include "sysdep.h"
+
+#include "cable.h"
+#include "parport.h"
+#include "chain.h"
+
+#include "generic.h"
+#include "generic_parport.h"
+
+/*
+ * data D[7:0] (pins 9:2)
+ */
+#define TDI 0
+#define TCK 1
+#define TMS 2
+
+/*
+ * status
+ *
+ * 7 - BUSY (pin 11)
+ * 6 - ACK (pin 10)
+ * 5 - PE (pin 12)
+ * 4 - SEL (pin 13)
+ * 3 - ERROR (pin 15)
+ */
+#define TDO 5
+
+/*
+ * control
+ *
+ * 0 - STROBE (pin 1)
+ * 1 - AUTOFD (pin 14)
+ * 2 - INIT (pin 16)
+ * 3 - SELIN (pin 17)
+ */
+#define TRST 0
+
+static int
+keithkoep_init( cable_t *cable )
+{
+ if (parport_open( cable->link.port ))
+ return -1;
+
+ parport_set_control( cable->link.port, 1 << TRST );
+ PARAM_SIGNALS(cable) = CS_TRST;
+
+ return 0;
+}
+
+static void
+keithkoep_clock( cable_t *cable, int tms, int tdi, int n )
+{
+ int i;
+
+ tms = tms ? 1 : 0;
+ tdi = tdi ? 1 : 0;
+
+ for (i = 0; i < n; i++) {
+ parport_set_data( cable->link.port, (0 << TCK) | (tms << TMS) | (tdi << TDI) );
+ cable_wait( cable );
+ parport_set_data( cable->link.port, (1 << TCK) | (tms << TMS) | (tdi << TDI) );
+ cable_wait( cable );
+ }
+
+ PARAM_SIGNALS(cable) &= CS_TRST;
+ PARAM_SIGNALS(cable) |= CS_TCK;
+ PARAM_SIGNALS(cable) |= tms ? CS_TMS : 0;
+ PARAM_SIGNALS(cable) |= tdi ? CS_TDI : 0;
+}
+
+static int
+keithkoep_get_tdo( cable_t *cable )
+{
+ parport_set_data( cable->link.port, 0 << TCK );
+ PARAM_SIGNALS(cable) &= ~(CS_TDI | CS_TCK | CS_TMS);
+
+ cable_wait( cable );
+
+ return (parport_get_status( cable->link.port ) >> TDO) & 1;
+}
+
+static int
+keithkoep_set_signal( cable_t *cable, int mask, int val )
+{
+ int prev_sigs = PARAM_SIGNALS(cable);
+
+ mask &= (CS_TDI | CS_TCK | CS_TMS | CS_TRST); // only these can be modified
+
+ if (mask != 0)
+ {
+ int sigs = (prev_sigs & ~mask) | (val & mask);
+
+ if ((mask & ~CS_TRST) != 0)
+ {
+ int data = 0;
+ data |= (sigs & CS_TDI) ? (1 << TDI) : 0;
+ data |= (sigs & CS_TCK) ? (1 << TCK) : 0;
+ data |= (sigs & CS_TMS) ? (1 << TMS) : 0;
+ parport_set_data( cable->link.port, data );
+ }
+ if ((mask & CS_TRST) != 0)
+ {
+ parport_set_control( cable->link.port, (sigs & CS_TRST) ? (1 << TRST) : 0 );
+ }
+ PARAM_SIGNALS(cable) = sigs;
+ }
+
+ return prev_sigs;
+}
+
+cable_driver_t keithkoep_cable_driver = {
+ "KeithKoep",
+ N_("Keith & Koep JTAG cable"),
+ generic_parport_connect,
+ generic_disconnect,
+ generic_parport_free,
+ keithkoep_init,
+ generic_parport_done,
+ generic_set_frequency,
+ keithkoep_clock,
+ keithkoep_get_tdo,
+ generic_transfer,
+ keithkoep_set_signal,
+ generic_get_signal,
+ generic_flush_one_by_one,
+ generic_parport_help
+};
--- /dev/null
+/*
+ * $Id$
+ *
+ * Lattice Parallel Port Download Cable Driver
+ * Copyright (C) 2002, 2003 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2002, 2003.
+ *
+ */
+
+#include "sysdep.h"
+
+#include "cable.h"
+#include "parport.h"
+#include "chain.h"
+
+#include "generic.h"
+#include "generic_parport.h"
+
+/*
+ * 0 - STROBE (pin 1)
+ * 1 - AUTOFD (pin 14)
+ * 2 - INIT (pin 16)
+ * 3 - SELECT (pin 17)
+ * data D[7:0] (pins 9:2)
+ * 7 - BUSY (pin 11)
+ * 6 - ACK (pin 10)
+ * 5 - PE (pin 12)
+ * 4 - SEL (pin 13)
+ * 3 - ERROR (pin 15)
+ */
+#define TDI 0
+#define TCK 1
+#define TMS 2
+#define TRST 4
+#define TDO 6
+
+
+static int
+lattice_init( cable_t *cable )
+{
+ int data;
+
+ if (parport_open( cable->link.port ))
+ return -1;
+
+ if ((data = parport_get_data( cable->link.port )) < 0) {
+ if (parport_set_data( cable->link.port, 1 << TRST ))
+ return -1;
+ PARAM_SIGNALS(cable) = CS_TRST;
+ } else
+ PARAM_SIGNALS(cable) = ((data >> TRST) && 1) ? CS_TRST : 0;
+
+ return 0;
+}
+
+static void
+lattice_clock( cable_t *cable, int tms, int tdi, int n )
+{
+ int i;
+ int trst = (PARAM_SIGNALS(cable) & CS_TRST) ? 1 : 0;
+
+ tms = tms ? 1 : 0;
+ tdi = tdi ? 1 : 0;
+
+ for (i = 0; i < n; i++) {
+ parport_set_data( cable->link.port, (trst << TRST) | (0 << TCK) | (tms << TMS) | (tdi << TDI) );
+ cable_wait( cable );
+ parport_set_data( cable->link.port, (trst << TRST) | (1 << TCK) | (tms << TMS) | (tdi << TDI) );
+ cable_wait( cable );
+ }
+
+ PARAM_SIGNALS(cable) &= CS_TRST;
+ PARAM_SIGNALS(cable) |= CS_TCK;
+ PARAM_SIGNALS(cable) |= tms ? CS_TMS : 0;
+ PARAM_SIGNALS(cable) |= tdi ? CS_TDI : 0;
+}
+
+static int
+lattice_get_tdo( cable_t *cable )
+{
+ int trst = (PARAM_SIGNALS(cable) & CS_TRST) ? 1 : 0;
+
+ parport_set_data( cable->link.port, (trst << TRST) | (0 << TCK) );
+ PARAM_SIGNALS(cable) &= ~(CS_TDI | CS_TCK | CS_TMS);
+
+ cable_wait( cable );
+
+ return (parport_get_status( cable->link.port ) >> TDO) & 1;
+}
+
+static int
+lattice_set_signal( cable_t *cable, int mask, int val )
+{
+ int prev_sigs = PARAM_SIGNALS(cable);
+
+ mask &= (CS_TDI | CS_TCK | CS_TMS | CS_TRST); // only these can be modified
+
+ if (mask != 0)
+ {
+ int data = 0;
+ int sigs = (PARAM_SIGNALS(cable) & ~mask) | (val & mask);
+ data |= (sigs & CS_TDI) ? (1 << TDI) : 0;
+ data |= (sigs & CS_TCK) ? (1 << TCK) : 0;
+ data |= (sigs & CS_TMS) ? (1 << TMS) : 0;
+ data |= (sigs & CS_TRST) ? (1 << TRST) : 0;
+ parport_set_data( cable->link.port, data );
+ PARAM_SIGNALS(cable) = sigs;
+ }
+
+ return prev_sigs;
+}
+
+cable_driver_t lattice_cable_driver = {
+ "Lattice",
+ N_("Lattice Parallel Port JTAG Cable"),
+ generic_parport_connect,
+ generic_disconnect,
+ generic_parport_free,
+ lattice_init,
+ generic_parport_done,
+ generic_set_frequency,
+ lattice_clock,
+ lattice_get_tdo,
+ generic_transfer,
+ lattice_set_signal,
+ generic_get_signal,
+ generic_flush_one_by_one,
+ generic_parport_help
+};
--- /dev/null
+/*
+ * $Id$
+ *
+ * Mpcbdm JTAG Cable Driver
+ * Copyright (C) 2002, 2003 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2002, 2003.
+ * Modified for Mpcbdm by Christian Pellegrin <chri@ascensit.com>, 2003.
+ *
+ * Documentation:
+ * [1] http://www.vas-gmbh.de/software/mpcbdm/VDB2.gif
+ *
+ */
+
+#include "sysdep.h"
+
+#include "cable.h"
+#include "parport.h"
+#include "chain.h"
+
+#include "generic.h"
+#include "generic_parport.h"
+
+/*
+ * data D[7:0] (pins 9:2)
+ */
+#define TDI 1
+#define TCK 0
+#define TMS 2
+
+/*
+ * control
+ */
+#define HRESET 3 /* the signal is inverted by cable hardware */
+#define SRESET 1 /* the signal is inverted by cable hardware */
+#define TRST 0 /* the signal is inverted by cable hardware */
+
+/*
+ * status
+ *
+ * 7 - BUSY (pin 11)
+ * 6 - ACK (pin 10)
+ * 5 - PE (pin 12)
+ * 4 - SEL (pin 13)
+ * 3 - ERROR (pin 15)
+ */
+#define TDO 5
+
+static int
+mpcbdm_init( cable_t *cable )
+{
+ if (parport_open( cable->link.port ))
+ return -1;
+
+ parport_set_control( cable->link.port, 0 );
+ PARAM_SIGNALS(cable) = ( CS_TRST | CS_RESET );
+
+ return 0;
+}
+
+static void
+mpcbdm_clock( cable_t *cable, int tms, int tdi, int n )
+{
+ int i;
+
+ tms = tms ? 1 : 0;
+ tdi = tdi ? 1 : 0;
+
+ for (i = 0; i < n; i++) {
+ parport_set_data( cable->link.port, (0 << TCK) | (tms << TMS) | (tdi << TDI) );
+ cable_wait( cable );
+ parport_set_data( cable->link.port, (1 << TCK) | (tms << TMS) | (tdi << TDI) );
+ cable_wait( cable );
+ }
+
+ PARAM_SIGNALS(cable) &= (CS_TRST | CS_RESET);
+ PARAM_SIGNALS(cable) |= CS_TCK;
+ PARAM_SIGNALS(cable) |= tms ? CS_TMS : 0;
+ PARAM_SIGNALS(cable) |= tdi ? CS_TDI : 0;
+}
+
+static int
+mpcbdm_get_tdo( cable_t *cable )
+{
+ parport_set_data( cable->link.port, 0 << TCK );
+ PARAM_SIGNALS(cable) &= ~(CS_TDI | CS_TCK | CS_TMS);
+
+ cable_wait( cable );
+
+ return (parport_get_status( cable->link.port ) >> TDO) & 1;
+}
+
+static int
+mpcbdm_set_signal( cable_t *cable, int mask, int val )
+{
+ int prev_sigs = PARAM_SIGNALS(cable);
+
+ mask &= (CS_TDI | CS_TCK | CS_TMS | CS_TRST | CS_RESET); // only these can be modified
+
+ if (mask)
+ {
+ int sigs = (PARAM_SIGNALS(cable) & ~mask) | (val & mask);
+
+ if ((mask & ~(CS_TRST | CS_RESET)) != 0)
+ {
+ int data = 0;
+ data |= (sigs & CS_TDI) ? (1 << TDI) : 0;
+ data |= (sigs & CS_TCK) ? (1 << TCK) : 0;
+ data |= (sigs & CS_TMS) ? (1 << TMS) : 0;
+ parport_set_data( cable->link.port, data );
+ }
+ if ((mask & (CS_TRST | CS_RESET)) != 0)
+ {
+ int data = 0;
+ data |= (sigs & CS_TRST) ? 0 : (1 << TRST);
+ // data |= (sigs & CS_RESET) ? 0 : (1 << SRESET); // use SRESET or HRESET? which polarity?
+ parport_set_control( cable->link.port, data );
+ }
+ PARAM_SIGNALS(cable) = sigs;
+ }
+
+ return prev_sigs;
+}
+
+cable_driver_t mpcbdm_cable_driver = {
+ "MPCBDM",
+ N_("Mpcbdm JTAG cable"),
+ generic_parport_connect,
+ generic_disconnect,
+ generic_parport_free,
+ mpcbdm_init,
+ generic_parport_done,
+ generic_set_frequency,
+ mpcbdm_clock,
+ mpcbdm_get_tdo,
+ generic_transfer,
+ mpcbdm_set_signal,
+ generic_get_signal,
+ generic_flush_one_by_one,
+ generic_parport_help
+};
--- /dev/null
+/*
+ * $Id$
+ *
+ * Ka-Ro TRITON Starterkit II (PXA255/250) JTAG Cable
+ * Copyright (C) 2002, 2003 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2002, 2003.
+ * Modified for TRITON by Andreas Mohr <andi@lisas.de>, 2003
+ *
+ */
+
+/*
+ * Ka-Ro electronics GmbH (http://www.karo-electronics.de)
+ * TRITON Starterkit II (PXA255/250) JTAG Parallel Cable Driver
+ * (boards probably produced by www.mite.cz)
+ * Other vendors: www.strategic-test.com, www.fsforth.de (www.es-usa.com),
+ * www.directinsight.co.uk, www.quantum.com.pl,
+ *
+ * This code has been verified to work with a Starterkit II,
+ * but a Starterkit I might also work (however it has a differing JTAG cable
+ * interface circuit, so all bets are off).
+ */
+
+#include "sysdep.h"
+
+#include "cable.h"
+#include "parport.h"
+#include "chain.h"
+
+#include "generic.h"
+#include "generic_parport.h"
+
+/*
+ * data D[7:0] (pins 9:2)
+ */
+#define TDI 1
+#define TCK 0
+#define TMS 2
+#define TRST 3
+#define SRESET 4
+#define ENAB 5 /* not programmed, since it's always 0 */
+
+/*
+ * status
+ *
+ * 7 - BUSY (pin 11)
+ * 6 - ACK (pin 10)
+ * 5 - PE (pin 12)
+ * 4 - SEL (pin 13)
+ * 3 - ERROR (pin 15)
+ */
+#define TDO 7
+
+static int
+triton_init( cable_t *cable )
+{
+ if (parport_open( cable->link.port ))
+ return -1;
+
+ PARAM_SIGNALS(cable) = CS_TRST | CS_RESET;
+ parport_set_data( cable->link.port, (1 << TRST) | (1 << SRESET) );
+
+ return 0;
+}
+
+static void
+triton_clock( cable_t *cable, int tms, int tdi, int n )
+{
+ int i;
+ int trst = (PARAM_SIGNALS(cable) & CS_TRST) ? 1 : 0;
+ int sreset = (PARAM_SIGNALS(cable) & CS_RESET) ? 1 : 0;
+
+ tms = tms ? 1 : 0;
+ tdi = tdi ? 1 : 0;
+
+ for (i = 0; i < n; i++) {
+ parport_set_data( cable->link.port, (trst << TRST) | (sreset << SRESET) | (0 << TCK) | (tms << TMS) | (tdi << TDI) );
+ cable_wait( cable );
+ parport_set_data( cable->link.port, (trst << TRST) | (sreset << SRESET) | (1 << TCK) | (tms << TMS) | (tdi << TDI) );
+ cable_wait( cable );
+ }
+
+ PARAM_SIGNALS(cable) &= (CS_TRST | CS_RESET);
+ PARAM_SIGNALS(cable) |= CS_TCK;
+ PARAM_SIGNALS(cable) |= tms ? CS_TMS : 0;
+ PARAM_SIGNALS(cable) |= tdi ? CS_TDI : 0;
+}
+
+static int
+triton_get_tdo( cable_t *cable )
+{
+ int trst = (PARAM_SIGNALS(cable) & CS_TRST) ? 1 : 0;
+ int sreset = (PARAM_SIGNALS(cable) & CS_RESET) ? 1 : 0;
+
+ parport_set_data( cable->link.port, (trst << TRST) | (sreset << SRESET) | (0 << TCK) );
+ PARAM_SIGNALS(cable) &= ~(CS_TDI | CS_TCK | CS_TMS);
+
+ cable_wait( cable );
+
+ return (parport_get_status( cable->link.port ) >> TDO) & 1;
+}
+
+static int
+triton_set_signal( cable_t *cable, int mask, int val )
+{
+ int prev_sigs = PARAM_SIGNALS(cable);
+
+ mask &= (CS_TDI | CS_TCK | CS_TMS | CS_TRST | CS_RESET); // only these can be modified
+
+ if (mask != 0)
+ {
+ int data = 0;
+ int sigs = (PARAM_SIGNALS(cable) & ~mask) | (val & mask);
+ data |= (sigs & CS_TDI) ? (1 << TDI) : 0;
+ data |= (sigs & CS_TCK) ? (1 << TCK) : 0;
+ data |= (sigs & CS_TMS) ? (1 << TMS) : 0;
+ data |= (sigs & CS_TRST) ? (1 << TRST) : 0;
+ data |= (sigs & CS_RESET) ? (1 << SRESET) : 0;
+ parport_set_data( cable->link.port, data );
+ PARAM_SIGNALS(cable) = sigs;
+ }
+
+ return prev_sigs;
+}
+
+cable_driver_t triton_cable_driver = {
+ "TRITON",
+ N_("Ka-Ro TRITON Starterkit II (PXA255/250) JTAG Cable"),
+ generic_parport_connect,
+ generic_disconnect,
+ generic_parport_free,
+ triton_init,
+ generic_parport_done,
+ generic_set_frequency,
+ triton_clock,
+ triton_get_tdo,
+ generic_transfer,
+ triton_set_signal,
+ generic_get_signal,
+ generic_flush_one_by_one,
+ generic_parport_help
+};
--- /dev/null
+/*
+ * $Id$
+ *
+ * Technologic Systems TS-7800 SoC GPIO JTAG Cable Driver
+ * Copyright (C) 2008 Catalin Ionescu
+ * Based on Vision EP9307 SoM GPIO JTAG Cable Driver
+ * Copyright (C) 2007, 2008 H Hartley Sweeten
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Catalin Ionescu <catalin.ionescu@radioconsult.ro>, 2008
+ *
+ */
+
+#include "sysdep.h"
+
+#include <stdlib.h>
+#include <string.h>
+
+#include <sys/types.h>
+#include <sys/stat.h>
+#include <sys/mman.h>
+#include <fcntl.h>
+#include <unistd.h>
+
+#include "cable.h"
+#include "chain.h"
+
+#include "generic.h"
+
+#include <cmd.h>
+
+#define GPIO_BASE 0xF1010000
+#define GPIO_OUT (0x0100/4)
+#define GPIO_DIR (0x0104/4)
+#define GPIO_INPOL (0x010C/4)
+#define GPIO_IN (0x0110/4)
+#define GPIO_INTEDGE (0x0118/4)
+#define GPIO_INTLEV (0x011C/4)
+
+#define TDO 4
+#define TDI 2
+#define TMS 5
+#define TCK 1
+
+#define HGPIO(b) (1 << (b))
+#define ts7800_TDO HGPIO(TDO)
+#define ts7800_TDI HGPIO(TDI)
+#define ts7800_TMS HGPIO(TMS)
+#define ts7800_TCK HGPIO(TCK)
+
+#define GPIO_INPUT_MASK ((ts7800_TCK)|(ts7800_TMS)|(ts7800_TDI))
+#define GPIO_OUTPUT_MASK ts7800_TDO
+#define GPIO_BITMASK (~((ts7800_TDO)|(ts7800_TDI)|(ts7800_TMS)|(ts7800_TCK)))
+
+typedef struct {
+ int fd_dev_mem;
+ void *map_base;
+ size_t map_size;
+ uint32_t *gpio_base;
+ int signals;
+ uint32_t lastout;
+} ts7800_params_t;
+
+static int
+ts7800_gpio_open( cable_t *cable )
+{
+ ts7800_params_t *p = cable->params;
+ off_t map_mask;
+
+ /* Open the memory device so we can access the hardware registers */
+ p->fd_dev_mem = open("/dev/mem", O_RDWR | O_SYNC);
+ if (p->fd_dev_mem == -1) {
+ printf( _("Error: unable to open /dev/mem\n") );
+ return -1;
+ }
+
+ p->map_size = getpagesize();
+ map_mask = p->map_size - 1;
+
+ /* Map the GPIO registers */
+ p->map_base = mmap(0, p->map_size, PROT_READ | PROT_WRITE, MAP_SHARED, p->fd_dev_mem, GPIO_BASE & ~map_mask);
+ if (p->map_base == MAP_FAILED) {
+ printf( _("Error: unable to mmap the GPIO registers\n") );
+ close (p->fd_dev_mem);
+ return -1;
+ }
+
+ /* Create the pointers to access the GPIO registers */
+ p->gpio_base = (uint32_t*)p->map_base;
+
+ /* Set the GPIO pins as inputs/outputs as needed for the JTAG interface */
+ p->gpio_base[GPIO_DIR] = ( p->gpio_base[GPIO_DIR] & GPIO_BITMASK ) | GPIO_OUTPUT_MASK;
+
+ p->lastout=p->gpio_base[GPIO_OUT];
+
+ return 0;
+}
+
+static int
+ts7800_gpio_close( cable_t *cable )
+{
+ ts7800_params_t *p = cable->params;
+
+ /* Unmap the GPIO registers */
+ if (munmap(p->map_base, p->map_size) == -1) {
+ printf( _("Error: unable to munmap the GPIO registers\n"));
+ }
+ close(p->fd_dev_mem);
+ return 0;
+}
+
+static int
+ts7800_gpio_write( cable_t *cable, uint8_t data )
+{
+ int sigs;
+ ts7800_params_t *p = cable->params;
+
+ p->gpio_base[GPIO_OUT] = p->lastout = (p->lastout & GPIO_BITMASK) | data;
+ cable_wait(cable);
+
+ return 0;
+}
+
+static int
+ts7800_gpio_read( cable_t *cable )
+{
+ ts7800_params_t *p = cable->params;
+
+ return p->gpio_base[GPIO_IN];
+}
+
+static int
+ts7800_connect( char *params[], cable_t *cable )
+{
+ ts7800_params_t *cable_params;
+
+ if ( cmd_params( params ) != 1) {
+ printf( _("Error: This cable type does not accept parameters!\n") );
+ return 1;
+ }
+
+ printf( _("Initializing TS-7800 Built-in JTAG Chain\n") );
+
+ cable_params = malloc( sizeof *cable_params );
+ if (!cable_params) {
+ printf( _("%s(%d) Out of memory\n"), __FILE__, __LINE__ );
+ free( cable );
+ return 4;
+ }
+
+ cable->params = cable_params;
+ cable->chain = NULL;
+ cable->delay = 1000;
+
+ return 0;
+}
+
+static void
+ts7800_disconnect( cable_t *cable )
+{
+ ts7800_gpio_close( cable );
+ chain_disconnect( cable->chain );
+}
+
+static void
+ts7800_cable_free( cable_t *cable )
+{
+ free( cable->params );
+ free( cable );
+}
+
+static int
+ts7800_init( cable_t *cable )
+{
+ ts7800_params_t *p = cable->params;
+
+ if (ts7800_gpio_open( cable ))
+ return -1;
+
+ p->signals = CS_TRST;
+
+ return 0;
+}
+
+static void
+ts7800_done( cable_t *cable )
+{
+ ts7800_gpio_close( cable );
+}
+
+static void
+ts7800_clock( cable_t *cable, int tms, int tdi, int n )
+{
+ int bit_mask;
+ int i;
+
+ tms = tms ? 1 : 0;
+ tdi = tdi ? 1 : 0;
+
+ bit_mask = (tms << TMS) | (tdi << TDI);
+
+ for (i = 0; i < n; i++) {
+ ts7800_gpio_write( cable, (0 << TCK) | bit_mask );
+ ts7800_gpio_write( cable, (1 << TCK) | bit_mask );
+ ts7800_gpio_write( cable, (0 << TCK) | bit_mask );
+ }
+}
+
+/**
+ * NOTE: This also lowers the TDI and TMS lines; is this intended?
+ */
+static int
+ts7800_get_tdo( cable_t *cable )
+{
+ ts7800_params_t *p = cable->params;
+ ts7800_gpio_write( cable, p->lastout & ~(0 << TCK) );
+
+ return (ts7800_gpio_read( cable ) >> TDO) & 1;
+}
+
+static int
+ts7800_current_signals( cable_t *cable )
+{
+ ts7800_params_t *p = cable->params;
+
+ int sigs = p->signals & ~(CS_TMS | CS_TDI | CS_TCK);
+ if (p->lastout & (1 << TCK)) sigs |= CS_TCK;
+ if (p->lastout & (1 << TDI)) sigs |= CS_TDI;
+ if (p->lastout & (1 << TMS)) sigs |= CS_TMS;
+
+ return sigs;
+}
+
+static int
+ts7800_set_signal( cable_t *cable, int mask, int val )
+{
+ ts7800_params_t *p = cable->params;
+
+ int prev_sigs = current_signals( cable );
+
+ mask &= (CS_TDI | CS_TCK | CS_TMS); // only these can be modified
+
+ if (mask != 0)
+ {
+ sigs = (prev_sigs & ~mask) | (val & mask);
+ tms = (sigs & CS_TMS) ? (1 << TMS) : 0;
+ tdi = (sigs & CS_TDI) ? (1 << TDI) : 0;
+ tck = (sigs & CS_TCK) ? (1 << TCK) : 0;
+ ts7800_gpio_write( cable, tms | tdi | tck );
+ }
+
+ return prev_sigs;
+}
+
+static int
+ts7800_get_signal( cable_t *cable, pod_sigsel_t sig )
+{
+ ts7800_params_t *p = cable->params;
+
+ return (current_signals( cable ) & sig) ? 1 : 0;
+}
+
+static void
+ts7800_help( const char *cablename )
+{
+ printf( _(
+ "Usage: cable %s\n"
+ "\n"
+ ), cablename );
+}
+
+cable_driver_t ts7800_cable_driver = {
+ "ts7800",
+ N_("TS-7800 Built-in JTAG Chain"),
+ ts7800_connect,
+ ts7800_disconnect,
+ ts7800_cable_free,
+ ts7800_init,
+ ts7800_done,
+ generic_set_frequency,
+ ts7800_clock,
+ ts7800_get_tdo,
+ generic_transfer,
+ ts7800_set_signal,
+ ts7800_get_signal,
+ generic_flush_one_by_one,
+ ts7800_help
+};
--- /dev/null
+/*
+ * $Id$
+ *
+ * Altera USB-Blaster<tm> Cable Driver
+ * Copyright (C) 2006 K. Waschk
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Kolja Waschk, 2006; http://www.ixo.de
+ *
+ */
+
+#include "sysdep.h"
+
+#include <stdlib.h>
+#include <string.h>
+
+#include "cable.h"
+#include "chain.h"
+#include "cmd.h"
+
+#include "generic.h"
+#include "generic_usbconn.h"
+
+#include "usbconn.h"
+#include "usbconn/libftdx.h"
+
+#include "cmd_xfer.h"
+
+
+#define TCK 0
+#define TMS 1
+#define TDI 4
+#define READ 6
+#define SHMODE 7
+#define OTHERS ((1<<2)|(1<<3)|(1<<5))
+
+#define TDO 0
+
+#define FIXED_FREQUENCY 12000000L
+
+/* The default driver if not specified otherwise during connect */
+#ifdef ENABLE_LOWLEVEL_FTD2XX
+#define DEFAULT_DRIVER "ftd2xx"
+#else
+#define DEFAULT_DRIVER "ftdi"
+#endif
+
+typedef struct {
+ cx_cmd_root_t cmd_root;
+} params_t;
+
+static int
+usbblaster_connect( char *params[], cable_t *cable )
+{
+ params_t *cable_params;
+ int result;
+
+ /* perform generic_usbconn_connect */
+ if ( ( result = generic_usbconn_connect( params, cable ) ) != 0 )
+ return result;
+
+ cable_params = (params_t *)malloc( sizeof(params_t) );
+ if (!cable_params)
+ {
+ printf( _("%s(%d) malloc failed!\n"), __FILE__, __LINE__);
+ /* NOTE:
+ * Call the underlying usbport driver (*free) routine directly
+ * not generic_usbconn_free() since it also free's cable->params
+ * (which is not established) and cable (which the caller will do)
+ */
+ cable->link.usb->driver->free( cable->link.usb );
+ return 4;
+ }
+
+ cx_cmd_init( &(cable_params->cmd_root) );
+
+ /* exchange generic cable parameters with our private parameter set */
+ free( cable->params );
+ cable->params = cable_params;
+
+ return 0;
+}
+
+void
+usbblaster_set_frequency( cable_t *cable, uint32_t new_frequency )
+{
+ if (new_frequency != FIXED_FREQUENCY)
+ printf( _("Warning: USB-Blaster frequency is fixed to %ld Hz\n"),
+ FIXED_FREQUENCY );
+
+ cable->frequency = FIXED_FREQUENCY;
+}
+
+static int
+usbblaster_init( cable_t *cable )
+{
+ int i;
+ params_t *params = (params_t *)cable->params;
+ cx_cmd_root_t *cmd_root = &(params->cmd_root);
+
+ if (usbconn_open( cable->link.usb )) return -1;
+
+ cx_cmd_queue( cmd_root, 0 );
+ for(i=0;i<64;i++)
+ cx_cmd_push( cmd_root, 0 );
+
+ cx_xfer( cmd_root, NULL, cable, COMPLETELY );
+
+ usbblaster_set_frequency( cable, FIXED_FREQUENCY );
+
+ return 0;
+}
+
+static void
+usbblaster_cable_free( cable_t *cable )
+{
+ params_t *params = (params_t *)cable->params;
+
+ cx_cmd_deinit( &(params->cmd_root) );
+
+ generic_usbconn_free( cable );
+}
+
+static void
+usbblaster_clock_schedule( cable_t *cable, int tms, int tdi, int n )
+{
+ params_t *params = (params_t *)cable->params;
+ cx_cmd_root_t *cmd_root = &(params->cmd_root);
+ int i, m;
+
+ tms = tms ? (1<<TMS) : 0;
+ tdi = tdi ? (1<<TDI) : 0;
+
+ // printf("clock: %d %d %d\n", tms, tdi, n);
+
+ m = n;
+ if (tms == 0 && m >= 8)
+ {
+ unsigned char tdis = tdi ? 0xFF : 0;
+
+ cx_cmd_queue( cmd_root, 0 );
+ while (m >= 8)
+ {
+ int i;
+ int chunkbytes = (m >> 3);
+ if(chunkbytes > 63) chunkbytes = 63;
+
+ if (cx_cmd_space( cmd_root, FTDX_MAXSEND ) < chunkbytes+1)
+ {
+ /* no space left for next clocking command
+ transfer queued commands to device and read receive data
+ to internal buffer */
+ cx_xfer( cmd_root, NULL, cable, COMPLETELY );
+ cx_cmd_queue( cmd_root, 0 );
+ }
+
+
+ cx_cmd_push( cmd_root, (1<<SHMODE)|(0<<READ)|chunkbytes );
+
+ for (i=0; i<chunkbytes; i++)
+ {
+ cx_cmd_push( cmd_root, tdis );
+ }
+
+ m -= (chunkbytes << 3);
+ }
+ }
+
+ for (i = 0; i < m; i++) {
+ cx_cmd_queue( cmd_root, 0 );
+ cx_cmd_push( cmd_root, OTHERS | (0 << TCK) | tms | tdi );
+ cx_cmd_push( cmd_root, OTHERS | (1 << TCK) | tms | tdi );
+ }
+}
+
+static void
+usbblaster_clock( cable_t *cable, int tms, int tdi, int n )
+{
+ params_t *params = (params_t *)cable->params;
+
+ usbblaster_clock_schedule( cable, tms, tdi, n );
+ cx_xfer( &(params->cmd_root), NULL, cable, COMPLETELY );
+}
+
+static void
+usbblaster_get_tdo_schedule( cable_t *cable )
+{
+ params_t *params = (params_t *)cable->params;
+ cx_cmd_root_t *cmd_root = &(params->cmd_root);
+
+ cx_cmd_queue( cmd_root, 1 );
+ cx_cmd_push( cmd_root, OTHERS ); /* TCK low */
+ cx_cmd_push( cmd_root, OTHERS | (1 << READ) ); /* TCK low */
+}
+
+static int
+usbblaster_get_tdo_finish( cable_t *cable )
+{
+#if 0
+ char x = ( cx_xfer_recv( cable ) & (1 << TDO)) ? 1 : 0;
+ printf("GetTDO %d\n", x);
+ return x;
+#else
+ return ( cx_xfer_recv( cable ) & (1 << TDO)) ? 1 : 0;
+#endif
+}
+
+static int
+usbblaster_get_tdo( cable_t *cable )
+{
+ params_t *params = (params_t *)cable->params;
+
+ usbblaster_get_tdo_schedule( cable );
+ cx_xfer( &(params->cmd_root), NULL, cable, COMPLETELY );
+ return usbblaster_get_tdo_finish( cable );
+}
+
+static int
+usbblaster_set_signal( cable_t *cable, int mask, int val )
+{
+ return 1;
+}
+
+static void
+usbblaster_transfer_schedule( cable_t *cable, int len, char *in, char *out )
+{
+ params_t *params = (params_t *)cable->params;
+ cx_cmd_root_t *cmd_root = &(params->cmd_root);
+ int in_offset = 0;
+
+ cx_cmd_queue( cmd_root, 0 );
+ cx_cmd_push( cmd_root, OTHERS ); /* TCK low */
+
+#if 0
+ {
+ int o;
+ printf("%d in: ", len);
+ for(o=0;o<len;o++) printf("%c", in[o]?'1':'0');
+ printf("\n");
+ }
+#endif
+
+ while(len - in_offset >= 8)
+ {
+ int i;
+ int chunkbytes = ((len-in_offset)>>3);
+ if(chunkbytes > 63) chunkbytes = 63;
+
+ if(out)
+ {
+ cx_cmd_queue( cmd_root, chunkbytes );
+ cx_cmd_push( cmd_root, (1<<SHMODE)|(1<<READ)|chunkbytes );
+ }
+ else {
+ cx_cmd_queue( cmd_root, 0 );
+ cx_cmd_push( cmd_root, (1<<SHMODE)|(0<<READ)|chunkbytes );
+ }
+
+ for(i=0; i<chunkbytes; i++)
+ {
+ int j;
+ unsigned char b = 0;
+ for(j=1; j<256; j<<=1) if(in[in_offset++]) b |= j;
+ cx_cmd_push( cmd_root, b );
+ }
+ }
+
+ while(len > in_offset)
+ {
+ char tdi = in[in_offset++] ? 1 : 0;
+
+ cx_cmd_queue( cmd_root, out ? 1 : 0 );
+ cx_cmd_push( cmd_root, OTHERS | (tdi << TDI));/* TCK low */
+ cx_cmd_push( cmd_root, OTHERS | ((out)?(1 << READ):0) | (1 << TCK) | (tdi << TDI));
+ }
+}
+
+static int
+usbblaster_transfer_finish( cable_t *cable, int len, char *out )
+{
+ params_t *params = (params_t *)cable->params;
+ cx_cmd_root_t *cmd_root = &(params->cmd_root);
+ int out_offset = 0;
+
+ if (out == NULL)
+ return 0;
+
+ while(len - out_offset >= 8)
+ {
+ int i;
+ int chunkbytes = ((len-out_offset)>>3);
+ if(chunkbytes > 63) chunkbytes = 63;
+
+ if(out)
+ {
+ cx_xfer( cmd_root, NULL, cable, COMPLETELY );
+
+ for(i=0; i<chunkbytes; i++)
+ {
+ int j;
+ unsigned char b = cx_xfer_recv( cable );
+#if 0
+ printf("read byte: %02X\n", b);
+#endif
+
+ for(j=1; j<256; j<<=1) out[out_offset++] = (b & j) ? 1:0;
+ }
+ }
+ }
+
+ while(len > out_offset)
+ out[out_offset++] = ( cx_xfer_recv( cable ) & (1 << TDO)) ? 1 : 0;
+
+#if 0
+ {
+ int o;
+ printf("%d out: ", len);
+ for(o=0;o<len;o++) printf("%c", out[o]?'1':'0');
+ printf("\n");
+ }
+#endif
+
+ return 0;
+}
+
+static int
+usbblaster_transfer( cable_t *cable, int len, char *in, char *out )
+{
+ params_t *params = (params_t *)cable->params;
+
+ usbblaster_transfer_schedule( cable, len, in, out );
+ cx_xfer( &(params->cmd_root), NULL, cable, COMPLETELY );
+ return usbblaster_transfer_finish( cable, len, out );
+}
+
+static void
+usbblaster_flush( cable_t *cable, cable_flush_amount_t how_much )
+{
+ params_t *params = (params_t *)cable->params;
+
+ if (how_much == OPTIONALLY) return;
+
+ if (cable->todo.num_items == 0)
+ cx_xfer( &(params->cmd_root), NULL, cable, how_much );
+
+ while (cable->todo.num_items > 0)
+ {
+ int i, j, n;
+
+ for (j = i = cable->todo.next_item, n = 0; n < cable->todo.num_items; n++)
+ {
+
+ switch (cable->todo.data[i].action)
+ {
+ case CABLE_CLOCK:
+ usbblaster_clock_schedule( cable,
+ cable->todo.data[i].arg.clock.tms,
+ cable->todo.data[i].arg.clock.tdi,
+ cable->todo.data[i].arg.clock.n );
+ break;
+
+ case CABLE_GET_TDO:
+ usbblaster_get_tdo_schedule( cable );
+ break;
+
+ case CABLE_TRANSFER:
+ usbblaster_transfer_schedule( cable,
+ cable->todo.data[i].arg.transfer.len,
+ cable->todo.data[i].arg.transfer.in,
+ cable->todo.data[i].arg.transfer.out );
+ break;
+
+ default:
+ break;
+ }
+
+ i++;
+ if (i >= cable->todo.max_items)
+ i = 0;
+ }
+
+ cx_xfer( &(params->cmd_root), NULL, cable, how_much );
+
+ while (j != i)
+ {
+ switch (cable->todo.data[j].action)
+ {
+ case CABLE_GET_TDO:
+ {
+ int m;
+ m = cable_add_queue_item( cable, &(cable->done) );
+ cable->done.data[m].action = CABLE_GET_TDO;
+ cable->done.data[m].arg.value.val = usbblaster_get_tdo_finish( cable );
+ break;
+ }
+ case CABLE_GET_SIGNAL:
+ {
+ int m = cable_add_queue_item( cable, &(cable->done) );
+ cable->done.data[m].action = CABLE_GET_SIGNAL;
+ cable->done.data[m].arg.value.sig = cable->todo.data[j].arg.value.sig;
+ if (cable->todo.data[j].arg.value.sig == CS_TRST)
+ cable->done.data[m].arg.value.val = 1;
+ else
+ cable->done.data[m].arg.value.val = -1; // not supported yet
+ break;
+ }
+ case CABLE_TRANSFER:
+ {
+ int r = usbblaster_transfer_finish( cable,
+ cable->todo.data[j].arg.transfer.len,
+ cable->todo.data[j].arg.transfer.out );
+ free( cable->todo.data[j].arg.transfer.in );
+ if (cable->todo.data[j].arg.transfer.out)
+ {
+ int m = cable_add_queue_item( cable, &(cable->done) );
+ if (m < 0)
+ printf("out of memory!\n");
+ cable->done.data[m].action = CABLE_TRANSFER;
+ cable->done.data[m].arg.xferred.len = cable->todo.data[j].arg.transfer.len;
+ cable->done.data[m].arg.xferred.res = r;
+ cable->done.data[m].arg.xferred.out = cable->todo.data[j].arg.transfer.out;
+ }
+ }
+ default:
+ break;
+ }
+
+ j++;
+ if (j >= cable->todo.max_items)
+ j = 0;
+ cable->todo.num_items--;
+ }
+
+ cable->todo.next_item = i;
+ }
+}
+
+void
+usbblaster_help( const char *cablename )
+{
+ printf( _(
+ "Usage: cable %s [vid=VID] [pid=PID] [desc=DESC] [driver=DRIVER]\n"
+ "\n"
+ "VID vendor ID (hex, e.g. 0abc)\n"
+ "PID product ID (hex, e.g. 0abc)\n"
+ "DESC Some string to match in description or serial no.\n"
+ "DRIVER usbconn driver, either ftdi or ftd2xx\n"
+ " defaults to %s if not specified\n"
+ "\n"
+ ),
+ cablename,
+ DEFAULT_DRIVER
+ );
+}
+
+cable_driver_t usbblaster_cable_driver = {
+ "UsbBlaster",
+ N_("Altera USB-Blaster Cable"),
+ usbblaster_connect,
+ generic_disconnect,
+ usbblaster_cable_free,
+ usbblaster_init,
+ generic_usbconn_done,
+ usbblaster_set_frequency,
+ usbblaster_clock,
+ usbblaster_get_tdo,
+ usbblaster_transfer,
+ usbblaster_set_signal,
+ generic_get_signal,
+// generic_flush_one_by_one,
+// generic_flush_using_transfer,
+ usbblaster_flush,
+ usbblaster_help,
+};
+usbconn_cable_t usbconn_cable_usbblaster_ftdi = {
+ "UsbBlaster", /* cable name */
+ NULL, /* string pattern, not used */
+ "ftdi", /* default usbconn driver */
+ 0x09FB, /* VID */
+ 0x6001 /* PID */
+};
+usbconn_cable_t usbconn_cable_cubic_cyclonium_ftdi = {
+ "UsbBlaster", /* cable name */
+ NULL, /* string pattern, not used */
+ "ftdi", /* default usbconn driver */
+ 0x09FB, /* VID */
+ 0x6002 /* PID */
+};
+usbconn_cable_t usbconn_cable_nios_eval_ftdi = {
+ "UsbBlaster", /* cable name */
+ NULL, /* string pattern, not used */
+ "ftdi", /* default usbconn driver */
+ 0x09FB, /* VID */
+ 0x6003 /* PID */
+};
+usbconn_cable_t usbconn_cable_usb_jtag_ftdi = {
+ "UsbBlaster", /* cable name */
+ NULL, /* string pattern, not used */
+ "ftdi", /* default usbconn driver */
+ 0x16C0, /* VID */
+ 0x06AD /* PID */
+};
+usbconn_cable_t usbconn_cable_usbblaster_ftd2xx = {
+ "UsbBlaster", /* cable name */
+ NULL, /* string pattern, not used */
+ "ftd2xx", /* default usbconn driver */
+ 0x09FB, /* VID */
+ 0x6001 /* PID */
+};
+usbconn_cable_t usbconn_cable_cubic_cyclonium_ftd2xx = {
+ "UsbBlaster", /* cable name */
+ NULL, /* string pattern, not used */
+ "ftd2xx", /* default usbconn driver */
+ 0x09FB, /* VID */
+ 0x6002 /* PID */
+};
+usbconn_cable_t usbconn_cable_nios_eval_ftd2xx = {
+ "UsbBlaster", /* cable name */
+ NULL, /* string pattern, not used */
+ "ftdi", /* default usbconn driver */
+ 0x09FB, /* VID */
+ 0x6003 /* PID */
+};
+usbconn_cable_t usbconn_cable_usb_jtag_ftd2xx = {
+ "UsbBlaster", /* cable name */
+ NULL, /* string pattern, not used */
+ "ftd2xx", /* default usbconn driver */
+ 0x16C0, /* VID */
+ 0x06AD /* PID */
+};
--- /dev/null
+/*
+ * $Id: vision_ep9307.c $
+ *
+ * Vision EP9307 SoM GPIO JTAG Cable Driver
+ * Copyright (C) 2007, 2008 H Hartley Sweeten
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by H Hartley Sweeten <hsweeten@visionengravers.com>, 2007, 2008.
+ *
+ */
+
+#include "sysdep.h"
+
+#include <stdlib.h>
+#include <string.h>
+
+#include <sys/types.h>
+#include <sys/stat.h>
+#include <sys/mman.h>
+#include <fcntl.h>
+#include <unistd.h>
+
+#include "cable.h"
+#include "chain.h"
+
+#include "generic.h"
+
+#include <cmd.h>
+
+#define SYSCON_BASE 0x80930000
+#define SYSCON_DEVICE_CONFIG 0x80
+#define SYSCON_SWLOCK 0xC0
+
+#define SYSCON_DEVCFG_HonIDE (1 << 11)
+
+#define GPIO_BASE 0x80840000
+#define GPIO_PHDR 0x40
+#define GPIO_PHDDR 0x44
+
+#define TDO 4
+#define TDI 6
+#define TMS 5
+#define TCK 7
+#define TRST 3
+
+#define HGPIO(b) (1 << (b))
+#define EP9307_TDO HGPIO(TDO)
+#define EP9307_TDI HGPIO(TDI)
+#define EP9307_TMS HGPIO(TMS)
+#define EP9307_TCK HGPIO(TCK)
+#define EP9307_TRST HGPIO(TRST)
+
+#define GPIO_INPUT_MASK ((EP9307_TCK)|(EP9307_TMS)|(EP9307_TDI)|(EP9307_TRST))
+#define GPIO_OUTPUT_MASK (~(EP9307_TDO))
+#define GPIO_BITMASK (~((EP9307_TDO)|(EP9307_TDI)|(EP9307_TMS)|(EP9307_TCK)|(EP9307_TRST)))
+
+typedef struct {
+ int fd_dev_mem;
+ void *map_base;
+ size_t map_size;
+ uint32_t *gpio_PHDR;
+ uint32_t lastout;
+ int signals;
+} ep9307_params_t;
+
+static int
+ep9307_gpio_open( cable_t *cable )
+{
+ ep9307_params_t *p = cable->params;
+ off_t map_mask;
+ uint32_t *syscon_devcfg;
+ uint32_t *syscon_sysswlock;
+ uint32_t *gpio_PHDDR;
+ uint32_t tmp;
+
+ /* Open the memory device so we can access the hardware registers */
+ p->fd_dev_mem = open("/dev/mem", O_RDWR | O_SYNC);
+ if (p->fd_dev_mem == -1) {
+ printf( _("Error: unable to open /dev/mem\n") );
+ return -1;
+ }
+
+ p->map_size = getpagesize();
+ map_mask = p->map_size - 1;
+
+ /* Map the System Controller registers */
+ p->map_base = mmap(0, p->map_size, PROT_READ | PROT_WRITE, MAP_SHARED, p->fd_dev_mem, SYSCON_BASE & ~map_mask);
+ if (p->map_base == MAP_FAILED) {
+ printf( _("Error: unable to mmap the System Control registers\n") );
+ close (p->fd_dev_mem);
+ return -1;
+ }
+
+ /* Create the pointers to access the DeviceCfg and SysSWLock registers */
+ syscon_devcfg = (uint32_t*)(p->map_base + SYSCON_DEVICE_CONFIG);
+ syscon_sysswlock = (uint32_t*)(p->map_base + SYSCON_SWLOCK);
+
+ /* Set the HonIDE bit in the DeviceCfg register so we can use Port H as GPIO */
+ tmp = *((uint32_t*)syscon_devcfg);
+ tmp |= SYSCON_DEVCFG_HonIDE;
+
+ /* The DeviceCfg register has a SoftwareLock; unlock it first */
+ *((uint32_t*)syscon_sysswlock) = 0xAA;
+ *((uint32_t*)syscon_devcfg) = tmp;
+
+ /* Unmap the System Controller registers */
+ if (munmap(p->map_base, p->map_size) == -1) {
+ printf( _("Error: unable to munmap the System Controller registers\n"));
+ close (p->fd_dev_mem);
+ return -1;
+ }
+
+ /* Map the GPIO registers */
+ p->map_base = mmap(0, p->map_size, PROT_READ | PROT_WRITE, MAP_SHARED, p->fd_dev_mem, GPIO_BASE & ~map_mask);
+ if (p->map_base == MAP_FAILED) {
+ printf( _("Error: unable to mmap the GPIO registers\n") );
+ close (p->fd_dev_mem);
+ return -1;
+ }
+
+ /* Create the pointers to access the PHDR and PHDDR registers */
+ p->gpio_PHDR = (uint32_t*)(p->map_base + GPIO_PHDR);
+ gpio_PHDDR = (uint32_t*)(p->map_base + GPIO_PHDDR);
+
+ /* Set the GPIO pins as inputs/outputs as needed for the JTAG interface */
+ tmp = *((uint32_t*)gpio_PHDDR);
+ tmp |= GPIO_INPUT_MASK;
+ tmp &= GPIO_OUTPUT_MASK;
+ *((uint32_t*)gpio_PHDDR) = tmp;
+
+ return 0;
+}
+
+static int
+ep9307_gpio_close( cable_t *cable )
+{
+ ep9307_params_t *p = cable->params;
+
+ /* Unmap the GPIO registers */
+ if (munmap(p->map_base, p->map_size) == -1) {
+ printf( _("Error: unable to munmap the GPIO registers\n"));
+ }
+ close(p->fd_dev_mem);
+ return 0;
+}
+
+static int
+ep9307_gpio_write( cable_t *cable, uint8_t data )
+{
+ ep9307_params_t *p = cable->params;
+ uint32_t tmp;
+
+ tmp = *((uint32_t*)p->gpio_PHDR);
+ tmp &= ~GPIO_OUTPUT_MASK;
+ tmp |= data;
+ *((uint32_t*)p->gpio_PHDR) = tmp;
+ p->lastout = tmp;
+
+ return 0;
+}
+
+static int
+ep9307_gpio_read( cable_t *cable )
+{
+ ep9307_params_t *p = cable->params;
+ uint32_t tmp;
+
+ tmp = *((uint32_t*)p->gpio_PHDR);
+
+ return tmp;
+}
+
+static int
+ep9307_connect( char *params[], cable_t *cable )
+{
+ ep9307_params_t *cable_params;
+
+ if ( cmd_params( params ) != 1) {
+ printf( _("Error: This cable type does not accept parameters!\n") );
+ return 1;
+ }
+
+ printf( _("Initializing Vision EP9307 SoM GPIO JTAG Cable\n") );
+
+ cable_params = malloc( sizeof *cable_params );
+ if (!cable_params) {
+ printf( _("%s(%d) malloc failed!\n"), __FILE__, __LINE__);
+ return 4;
+ }
+
+ cable->link.port = NULL;
+ cable->params = cable_params;
+ cable->chain = NULL;
+
+ return 0;
+}
+
+static void
+ep9307_cable_free( cable_t *cable )
+{
+ free( cable->params );
+ free( cable );
+}
+
+static int
+ep9307_init( cable_t *cable )
+{
+ ep9307_params_t *p = cable->params;
+
+ if (ep9307_gpio_open( cable ))
+ return -1;
+
+ ep9307_gpio_write( cable, 1 << TRST );
+ cable_wait( cable );
+ p->signals = CS_TRST;
+
+ return 0;
+}
+
+static void
+ep9307_done( cable_t *cable )
+{
+ ep9307_gpio_close( cable );
+}
+
+static void
+ep9307_clock( cable_t *cable, int tms, int tdi, int n )
+{
+ ep9307_params_t *p = cable->params;
+ int bit_mask;
+ int i;
+
+ tms = tms ? 1 : 0;
+ tdi = tdi ? 1 : 0;
+
+ bit_mask = (tms << TMS) | (tdi << TDI) | (p->trst << TRST);
+
+ for (i = 0; i < n; i++) {
+ ep9307_gpio_write( cable, (0 << TCK) | bit_mask );
+ cable_wait( cable );
+ ep9307_gpio_write( cable, (1 << TCK) | bit_mask );
+ cable_wait( cable );
+ }
+}
+
+/**
+ * NOTE: This also lowers the TDI and TMS lines; is this intended?
+ */
+static int
+ep9307_get_tdo( cable_t *cable )
+{
+ ep9307_params_t *p = cable->params;
+
+ ep9307_gpio_write( cable, (0 << TCK) | (p->trst << TRST) );
+ cable_wait( cable );
+
+ return (ep9307_gpio_read( cable ) >> TDO) & 1;
+}
+
+static int
+ep9307_current_signals( cable_t *cable )
+{
+ ep9307_params_t *p = cable->params;
+
+ int sigs = p->signals & ~(CS_TMS | CS_TDI | CS_TCK | CS_TRST);
+ if (p->lastout & (1 << TCK)) sigs |= CS_TCK;
+ if (p->lastout & (1 << TDI)) sigs |= CS_TDI;
+ if (p->lastout & (1 << TMS)) sigs |= CS_TMS;
+ if (p->lastout & (1 << TRST)) sigs |= CS_TRST;
+
+ return sigs;
+}
+
+static int
+ep9307_set_signal( cable_t *cable, int mask, int val )
+{
+ ep9307_params_t *p = cable->params;
+
+ int prev_sigs = ep9307_current_signals (cable);
+
+ int mask &= (CS_TMS | CS_TDI | CS_TCK | CS_TRST); // only these can be modified
+
+ if (mask != 0)
+ {
+ int sigs = (prev_sigs & ~mask) | (val & mask);
+ int tms = (sigs & CS_TMS) ? (1 << TMS) : 0;
+ int tdi = (sigs & CS_TDI) ? (1 << TDI) : 0;
+ int tck = (sigs & CS_TCK) ? (1 << TCK) : 0;
+ int trst = (sigs & CS_TRST) ? (1 << TRST) : 0;
+ ep9307_gpio_write( cable, tms | tdi | tck | trst );
+ }
+
+ return prev_sigs;
+}
+
+static int
+ep9307_get_signal( cable_t *cable, pod_sigsel_t sig )
+{
+ return (ep9307_current_signals( cable ) & sig) ? 1 : 0;
+}
+
+static void
+ep9307_help( const char *cablename )
+{
+ printf( _(
+ "Usage: cable %s\n"
+ "\n"
+ ), cablename );
+}
+
+cable_driver_t ep9307_cable_driver = {
+ "EP9307",
+ N_("Vision EP9307 SoM GPIO JTAG Cable"),
+ ep9307_connect,
+ generic_disconnect,
+ ep9307_cable_free,
+ ep9307_init,
+ ep9307_done,
+ generic_set_frequency,
+ ep9307_clock,
+ ep9307_get_tdo,
+ generic_transfer,
+ ep9307_set_trst,
+ ep9307_get_trst,
+ generic_flush_one_by_one,
+ ep9307_help
+};
--- /dev/null
+/*
+ * $Id$
+ *
+ * Macraigor Wiggler JTAG Cable Driver
+ * Copyright (C) 2002, 2003 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2002, 2003.
+ *
+ * Documentation:
+ * [1] http://www.ocdemon.net/
+ * [2] http://jtag-arm9.sourceforge.net/hardware.html
+ *
+ */
+
+#include "sysdep.h"
+
+#include <stdlib.h>
+#include <string.h>
+#include <ctype.h>
+
+#include "cable.h"
+#include "parport.h"
+#include "chain.h"
+
+#include "generic.h"
+#include "generic_parport.h"
+
+#include <cmd.h>
+
+/*
+ * Bit <-> pin mapping of an original Wiggler
+ * This is the default when no mapping is specified for wiggler_connect( )
+ *
+ * data D[7:0] (pins 9:2)
+ */
+#define nTRST 4 /* nTRST is not inverted in the cable */
+#define TDI 3
+#define TCK 2
+#define TMS 1
+#define nSRESET 0 /* sRESET is inverted in the cable */
+
+/*
+ * 7 - BUSY (pin 11)
+ * 6 - ACK (pin 10)
+ * 5 - PE (pin 12)
+ * 4 - SEL (pin 13)
+ * 3 - ERROR (pin 15)
+ */
+#define TDO 7
+
+
+/* macros used to stringify the defines above */
+#define xstr(s) str(s)
+#define str(s) #s
+static const
+char *std_wgl_map = xstr(TDO) ","
+ xstr(nTRST) ","
+ xstr(TDI) ","
+ xstr(TCK) ","
+ xstr(TMS) ","
+ "#" xstr(nSRESET);
+
+
+/* private parameters of this cable driver */
+typedef struct {
+ int signals;
+ int trst_lvl;
+ int srst_act, srst_inact;
+ int tms_act, tms_inact;
+ int tck_act, tck_inact;
+ int tdi_act, tdi_inact;
+ int tdo_act, tdo_inact;
+ int trst_act, trst_inact;
+ int unused_bits;
+} wiggler_params_t;
+
+
+/* access macros for the parameters */
+#define PRM_SIGNALS(cable) ((wiggler_params_t *) cable->params)->signals
+#define PRM_TRST_LVL(cable) ((wiggler_params_t *) cable->params)->trst_lvl
+#define PRM_SRST_ACT(cable) ((wiggler_params_t *) cable->params)->srst_act
+#define PRM_SRST_INACT(cable) ((wiggler_params_t *) cable->params)->srst_inact
+#define PRM_TMS_ACT(cable) ((wiggler_params_t *) cable->params)->tms_act
+#define PRM_TMS_INACT(cable) ((wiggler_params_t *) cable->params)->tms_inact
+#define PRM_TCK_ACT(cable) ((wiggler_params_t *) cable->params)->tck_act
+#define PRM_TCK_INACT(cable) ((wiggler_params_t *) cable->params)->tck_inact
+#define PRM_TDI_ACT(cable) ((wiggler_params_t *) cable->params)->tdi_act
+#define PRM_TDI_INACT(cable) ((wiggler_params_t *) cable->params)->tdi_inact
+#define PRM_TDO_ACT(cable) ((wiggler_params_t *) cable->params)->tdo_act
+#define PRM_TDO_INACT(cable) ((wiggler_params_t *) cable->params)->tdo_inact
+#define PRM_TRST_ACT(cable) ((wiggler_params_t *) cable->params)->trst_act
+#define PRM_TRST_INACT(cable) ((wiggler_params_t *) cable->params)->trst_inact
+#define PRM_UNUSED_BITS(cable) ((wiggler_params_t *) cable->params)->unused_bits
+
+
+
+static int
+map_pin( char *pin, int *act, int *inact )
+{
+ int bitnum;
+ int inverted = 0;
+
+ if ( *pin == '#' ) {
+ inverted = 1;
+ pin++;
+ }
+
+ if ( !isdigit( *pin ) )
+ return -1;
+
+ bitnum = atoi( pin ) % 8;
+
+ bitnum = 1 << bitnum;
+
+ *act = inverted ? 0 : bitnum;
+ *inact = inverted ? bitnum : 0;
+
+ return 0;
+}
+
+
+static int
+set_mapping( char *bitmap, cable_t *cable )
+{
+ const char delim = ',';
+ int syntax = 0;
+ char *tdo, *trst, *tdi, *tck, *tms, *srst;
+
+ /* assign mappings for each pin */
+ if ( ( tdo = bitmap ) )
+ if ( ( trst = strchr( tdo, delim ) ) ) {
+ trst++;
+ if ( ( tdi = strchr( trst, delim ) ) ) {
+ tdi++;
+ if ( ( tck = strchr( tdi, delim ) ) ) {
+ tck++;
+ if ( ( tms = strchr( tck, delim ) ) ) {
+ tms++;
+ if ( ( srst = strchr( tms, delim ) ) ) {
+ srst++;
+ syntax = 1;
+ } } } } }
+
+ if ( !syntax )
+ return -1;
+
+ if ( map_pin( tdo, &(PRM_TDO_ACT(cable)), &(PRM_TDO_INACT(cable)) ) != 0 ) return -1;
+ if ( map_pin( trst, &(PRM_TRST_ACT(cable)), &(PRM_TRST_INACT(cable)) ) != 0 ) return -1;
+ if ( map_pin( tdi, &(PRM_TDI_ACT(cable)), &(PRM_TDI_INACT(cable)) ) != 0 ) return -1;
+ if ( map_pin( tck, &(PRM_TCK_ACT(cable)), &(PRM_TCK_INACT(cable)) ) != 0 ) return -1;
+ if ( map_pin( tms, &(PRM_TMS_ACT(cable)), &(PRM_TMS_INACT(cable)) ) != 0 ) return -1;
+ if ( map_pin( srst, &(PRM_SRST_ACT(cable)), &(PRM_SRST_INACT(cable)) ) != 0 ) return -1;
+
+ return 0;
+}
+
+
+static int
+wiggler_connect( char *params[], cable_t *cable )
+{
+ int result;
+ char *param_bitmap = NULL;
+ wiggler_params_t *wiggler_params;
+
+ if ( cmd_params ( params ) == 4 ) {
+ /* acquire optional parameter for bit<->pin mapping */
+ param_bitmap = params[3];
+ /* generic_parport_connect() shouldn't see this parameter */
+ params[3] = NULL;
+ }
+
+ if ( ( result = generic_parport_connect( params, cable ) ) != 0)
+ return result;
+
+ if ( param_bitmap )
+ params[3] = param_bitmap;
+
+ wiggler_params = malloc( sizeof *wiggler_params );
+ if (!wiggler_params) {
+ printf( _("%s(%d) malloc failed!\n"), __FILE__, __LINE__);
+ /* NOTE:
+ * Call the underlying parport driver (*free) routine directly
+ * not generic_parconn_free() since it also free's cable->params
+ * (which is not established) and cable (which the caller will do)
+ */
+ cable->link.port->driver->parport_free( cable->link.port );
+ return 4;
+ }
+
+ /* set new wiggler-specific params */
+ free(cable->params);
+ cable->params = wiggler_params;
+
+ if ( ! param_bitmap )
+ param_bitmap = (char *)std_wgl_map;
+
+ if ( ( result = set_mapping( param_bitmap, cable ) ) != 0 ) {
+ printf( _("Pin mapping failed\n") );
+ /* NOTE:
+ * Call the underlying parport driver (*free) routine directly
+ * not generic_parconn_free() since it also free'scable (which
+ * the caller will do)
+ */
+ cable->link.port->driver->parport_free( cable->link.port );
+ free( cable->params );
+ return result;
+ }
+
+ /* Certain Macraigor Wigglers appear to use one of the unused data lines as a
+ power line so set all unused bits high. */
+ PRM_UNUSED_BITS(cable) = ~( PRM_SRST_ACT(cable) | PRM_SRST_INACT(cable) |
+ PRM_TMS_ACT(cable) | PRM_TMS_INACT(cable) |
+ PRM_TCK_ACT(cable) | PRM_TCK_INACT(cable) |
+ PRM_TDI_ACT(cable) | PRM_TDI_INACT(cable) |
+ PRM_TRST_ACT(cable) | PRM_TRST_INACT(cable) ) & 0xff;
+
+ return 0;
+}
+
+static int
+wiggler_init( cable_t *cable )
+{
+ int data;
+
+ if (parport_open( cable->link.port ))
+ return -1;
+
+ if ((data = parport_get_data( cable->link.port )) < 0) {
+ if (parport_set_data( cable->link.port, (PRM_TRST_ACT(cable) | PRM_TRST_INACT(cable)) | PRM_UNUSED_BITS(cable)))
+ return -1;
+ PRM_TRST_LVL(cable) = PRM_TRST_ACT(cable) | PRM_TRST_INACT(cable);
+ } else
+ PRM_TRST_LVL(cable) = data & (PRM_TRST_ACT(cable) | PRM_TRST_INACT(cable));
+
+ PRM_SIGNALS (cable) = (PRM_TRST_LVL(cable) == PRM_TRST_ACT(cable)) ? CS_TRST : 0;
+
+ return 0;
+}
+
+static void
+wiggler_clock( cable_t *cable, int tms, int tdi, int n )
+{
+ int i;
+
+ tms = tms ? 1 : 0;
+ tdi = tdi ? 1 : 0;
+
+ for (i = 0; i < n; i++) {
+ parport_set_data( cable->link.port, PRM_TRST_LVL(cable) |
+ PRM_TCK_INACT(cable) |
+ (tms ? PRM_TMS_ACT(cable) : PRM_TMS_INACT(cable)) |
+ (tdi ? PRM_TDI_ACT(cable) : PRM_TDI_INACT(cable)) |
+ PRM_UNUSED_BITS(cable) );
+ cable_wait( cable );
+ parport_set_data( cable->link.port, PRM_TRST_LVL(cable) |
+ PRM_TCK_ACT(cable) |
+ (tms ? PRM_TMS_ACT(cable) : PRM_TMS_INACT(cable)) |
+ (tdi ? PRM_TDI_ACT(cable) : PRM_TDI_INACT(cable)) |
+ PRM_UNUSED_BITS(cable) );
+ cable_wait( cable );
+ }
+
+ PRM_SIGNALS (cable) &= ~(CS_TDI | CS_TMS);
+ if (tms) PRM_SIGNALS(cable) |= CS_TMS;
+ if (tdi) PRM_SIGNALS(cable) |= CS_TDI;
+}
+
+static int
+wiggler_get_tdo( cable_t *cable )
+{
+ parport_set_data( cable->link.port, PRM_TRST_LVL(cable) |
+ PRM_TCK_INACT(cable) |
+ PRM_UNUSED_BITS(cable) );
+ cable_wait( cable );
+
+ return (parport_get_status( cable->link.port ) & (PRM_TDO_ACT(cable) | PRM_TDO_INACT(cable))) ^
+ PRM_TDO_ACT(cable) ? 0 : 1;
+}
+
+static int
+wiggler_set_signal( cable_t *cable, int mask, int val )
+{
+ int prev_sigs = PRM_SIGNALS(cable);
+
+ mask &= (CS_TMS | CS_TDI | CS_TCK | CS_TRST); // Only these can be modified
+
+ if (mask != 0)
+ {
+ int sigs = (prev_sigs & ~mask) | (val & mask);
+ PRM_TRST_LVL(cable) = ((sigs & CS_TRST) ? PRM_TRST_ACT(cable) : PRM_TRST_INACT(cable));
+ int data = PRM_UNUSED_BITS(cable) | PRM_TRST_LVL(cable);
+ data |= ((sigs & CS_TCK) ? PRM_TCK_ACT(cable) : PRM_TCK_INACT(cable));
+ data |= ((sigs & CS_TMS) ? PRM_TMS_ACT(cable) : PRM_TMS_INACT(cable));
+ data |= ((sigs & CS_TDI) ? PRM_TDI_ACT(cable) : PRM_TDI_INACT(cable));
+ parport_set_data( cable->link.port, data );
+ PRM_SIGNALS(cable) = sigs;
+ }
+
+ return prev_sigs;
+}
+
+static int
+wiggler_get_signal( cable_t *cable, pod_sigsel_t sig )
+{
+ return (PRM_SIGNALS(cable) & sig) ? 1 : 0;
+}
+
+static void
+wiggler_help( const char *cablename )
+{
+ printf( _(
+ "Usage: cable %s parallel PORTADDR [TDO,TRST,TDI,TCK,TMS,SRESET]\n"
+#if ENABLE_LOWLEVEL_PPDEV
+ " or: cable %s ppdev PPDEV [TDO,TRST,TDI,TCK,TMS,SRESET]\n"
+#endif
+#if HAVE_DEV_PPBUS_PPI_H
+ " or: cable %s ppi PPIDEV [TDO,TRST,TDI,TCK,TMS,SRESET]\n"
+#endif
+ "\n"
+ "PORTADDR parallel port address (e.g. 0x378)\n"
+#if ENABLE_LOWLEVEL_PPDEV
+ "PPDEV ppdev device (e.g. /dev/parport0)\n"
+#endif
+#if HAVE_DEV_PPBUS_PPI_H
+ "PPIDEF ppi device (e.g. /dev/ppi0)\n"
+#endif
+ "TDO, ... parallel port bit number, prepend '#' for inversion\n"
+ " default is '%s'\n"
+ "\n"
+ ),
+#if ENABLE_LOWLEVEL_PPDEV
+ cablename,
+#endif
+#if HAVE_DEV_PPBUS_PPI_H
+ cablename,
+#endif
+ cablename,
+ std_wgl_map
+ );
+}
+
+cable_driver_t wiggler_cable_driver = {
+ "WIGGLER",
+ N_("Macraigor Wiggler JTAG Cable"),
+ wiggler_connect,
+ generic_disconnect,
+ generic_parport_free,
+ wiggler_init,
+ generic_parport_done,
+ generic_set_frequency,
+ wiggler_clock,
+ wiggler_get_tdo,
+ generic_transfer,
+ wiggler_set_signal,
+ wiggler_get_signal,
+ generic_flush_one_by_one,
+ wiggler_help
+};
+
+cable_driver_t igloo_cable_driver = {
+ "IGLOO",
+ N_("Excelpoint IGLOO JTAG Cable"),
+ wiggler_connect,
+ generic_disconnect,
+ generic_parport_free,
+ wiggler_init,
+ generic_parport_done,
+ generic_set_frequency,
+ wiggler_clock,
+ wiggler_get_tdo,
+ generic_transfer,
+ wiggler_set_signal,
+ wiggler_get_signal,
+ generic_flush_one_by_one,
+ wiggler_help
+};
+
--- /dev/null
+/*
+ * $Id: wiggler2.c,v 1.8 2003/09/11 16:45:15 telka Exp $
+ *
+ * Modified WIGGLER JTAG Cable Driver
+ * Copyright (C) 2003 Ultra d.o.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2002, 2003.
+ *
+ * Documentation:
+ * [1] http://www.ocdemon.net/
+ * [2] http://jtag-arm9.sourceforge.net/hardware.html
+ *
+ * Base on the code for the Macraigor WIGGLER code written by Marcel Telka.
+ * Modified by Matej Kupljen <matej.kupljen@ultra.si> to support
+ * the Modified WIGGLER JTAG cable. This has an additional pin, that is
+ * used for CPU reset. The schematic is based on the source code for the
+ * open source JTAG debugger for the PXA250 (255) processor, called Jelie
+ * <www.jelie.org>.
+ *
+ */
+
+#include "sysdep.h"
+
+#include "cable.h"
+#include "parport.h"
+#include "chain.h"
+
+#include "generic.h"
+#include "generic_parport.h"
+
+/*
+ * data D[7:0] (pins 9:2)
+ */
+#define TDI 3
+#define TCK 2
+#define TMS 1
+#define TRST 4
+#define CPU_RESET 0
+
+/* Certain Macraigor Wigglers appear to use one of the unused data lines as a
+ power line so set all unused bits high. */
+#define UNUSED_BITS (~((1 << TDI) | (1 << TCK) | (1 << TMS) | (1 << TRST) | (1 << CPU_RESET)) & 0xff)
+
+/*
+ * 7 - BUSY (pin 11)
+ * 6 - ACK (pin 10)
+ * 5 - PE (pin 12)
+ * 4 - SEL (pin 13)
+ * 3 - ERROR (pin 15)
+ */
+#define TDO 7
+
+static int
+wiggler2_init( cable_t *cable )
+{
+ int data;
+
+ if (parport_open( cable->link.port ))
+ return -1;
+
+ // TODO: CPU_RESET bit is set to zero here and can't be changed afterwards
+ // If CPU_RESET=0 doesn't harm, it means it is an active high signal? - kawk
+
+ if ((data = parport_get_data( cable->link.port )) < 0) {
+ if (parport_set_data( cable->link.port, (1 << TRST) | UNUSED_BITS ))
+ return -1;
+ PARAM_SIGNALS(cable) = CS_TRST;
+ } else
+ PARAM_SIGNALS(cable) = ((data >> TRST) && 1) ? CS_TRST : 0;
+
+ return 0;
+}
+
+static void
+wiggler2_clock( cable_t *cable, int tms, int tdi, int n )
+{
+ int i;
+ int trst = (PARAM_SIGNALS(cable) & CS_TRST) ? 1 : 0;
+
+ tms = tms ? 1 : 0;
+ tdi = tdi ? 1 : 0;
+
+ for (i = 0; i < n; i++) {
+ parport_set_data( cable->link.port, (trst << TRST) | (0 << TCK) | (tms << TMS) | (tdi << TDI) | UNUSED_BITS );
+ cable_wait( cable );
+ parport_set_data( cable->link.port, (trst << TRST) | (1 << TCK) | (tms << TMS) | (tdi << TDI) | UNUSED_BITS );
+ cable_wait( cable );
+ }
+
+ PARAM_SIGNALS(cable) &= ~(CS_TMS | CS_TDI);
+ PARAM_SIGNALS(cable) |= CS_TCK;
+ PARAM_SIGNALS(cable) |= tms ? CS_TMS : 0;
+ PARAM_SIGNALS(cable) |= tdi ? CS_TDI : 0;
+}
+
+static int
+wiggler2_get_tdo( cable_t *cable )
+{
+ int trst = (PARAM_SIGNALS(cable) & CS_TRST) ? 1 : 0;
+
+ parport_set_data( cable->link.port, (trst << TRST) | (0 << TCK) | UNUSED_BITS );
+ PARAM_SIGNALS(cable) &= ~(CS_TDI | CS_TCK | CS_TMS);
+
+ cable_wait( cable );
+
+ return (parport_get_status( cable->link.port ) >> TDO) & 1;
+}
+
+static int
+wiggler2_set_signal( cable_t *cable, int mask, int val )
+{
+ int prev_sigs = PARAM_SIGNALS(cable);
+
+ mask &= (CS_TDI | CS_TCK | CS_TMS | CS_TRST); // only these can be modified
+
+ if (mask != 0)
+ {
+ int data = 0;
+ int sigs = (prev_sigs & ~mask) | (val & mask);
+ data |= (sigs & CS_TDI) ? (1 << TDI) : 0;
+ data |= (sigs & CS_TCK) ? (1 << TCK) : 0;
+ data |= (sigs & CS_TMS) ? (1 << TMS) : 0;
+ data |= (sigs & CS_TRST) ? (1 << TRST) : 0;
+ parport_set_data( cable->link.port, data | UNUSED_BITS );
+ PARAM_SIGNALS(cable) = sigs;
+ }
+
+ return prev_sigs;
+}
+
+cable_driver_t wiggler2_cable_driver = {
+ "WIGGLER2",
+ N_("Modified (with CPU Reset) WIGGLER JTAG Cable"),
+ generic_parport_connect,
+ generic_disconnect,
+ generic_parport_free,
+ wiggler2_init,
+ generic_parport_done,
+ generic_set_frequency,
+ wiggler2_clock,
+ wiggler2_get_tdo,
+ generic_transfer,
+ wiggler2_set_signal,
+ generic_get_signal,
+ generic_flush_one_by_one,
+ generic_parport_help
+};
--- /dev/null
+/*
+ * $Id: xpc.c,v 1.8 2003/08/19 08:42:20 telka Exp $
+ *
+ * Xilinx Platform Cable USB Driver (slow GPIO only)
+ * Copyright (C) 2008 Kolja Waschk
+ *
+ * Loosely based on Xilinx DLC5 JTAG Parallel Cable III Driver
+ * Copyright (C) 2002, 2003 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ */
+
+#include "sysdep.h"
+
+#include "cable.h"
+#include "chain.h"
+
+#include "generic.h"
+#include "generic_usbconn.h"
+
+#include "usbconn.h"
+#include "usbconn/libusb.h"
+
+#include <errno.h>
+#include <string.h>
+
+// #define VERBOSE 1
+#undef VERBOSE
+typedef struct
+{
+ int last_tdo;
+}
+xpc_cable_params_t;
+
+static int last_tdo;
+
+/* Connectivity on Spartan-3E starter kit:
+ *
+ * = FX2 Port A =
+ *
+ * IOA.0 => green LED (0=off)
+ * IOA.1 => red LED (0=off)
+ * IOA.2 is tied to VCC via R25 on my board
+ * IOA.3 isn't connected
+ * IOA.4 => CPLD pin 85 (reset?)
+ * IOA.5 => CPLD pin 86, eventually OE?
+ * IOA.6 => CPLD pin 83 (reset?)
+ * IOA.7 => CPLD pin 49 (reset?)
+ *
+ * = FX2 Port C =
+ *
+ * probably used as GPIFADR 0..7, to CPLD
+ *
+ * = FX2 Port E =
+ *
+ * IOE.3 => CPLD TCK
+ * IOE.4 => CPLD TMS
+ * IOE.5 => CPLD TDO
+ * IOE.6 => CPLD TDI
+ */
+
+/* ---------------------------------------------------------------------- */
+
+int xpcu_output_enable(struct usb_dev_handle *xpcu, int enable)
+{
+ if(usb_control_msg(xpcu, 0x40, 0xB0, enable ? 0x18 : 0x10, 0, NULL, 0, 1000)<0)
+ {
+ perror("usb_control_msg(0x10/0x18)");
+ return -1;
+ }
+
+ return 0;
+}
+
+/* ---------------------------------------------------------------------- */
+
+int xpcu_bit_reverse(struct usb_dev_handle *xpcu, uint8_t bits_in, uint8_t *bits_out)
+{
+ if(usb_control_msg(xpcu, 0xC0, 0xB0, 0x0020, bits_in, (char*)bits_out, 1, 1000)<0)
+ {
+ perror("usb_control_msg(0x20.x) (bit reverse)");
+ return -1;
+ }
+
+ return 0;
+}
+
+/* ----------------------------------------------------------------- */
+
+int xpcu_request_28(struct usb_dev_handle *xpcu, int value)
+{
+ /* Typical values seen during autodetection of chain configuration: 0x11, 0x12 */
+
+ if(usb_control_msg(xpcu, 0x40, 0xB0, 0x0028, value, NULL, 0, 1000)<0)
+ {
+ perror("usb_control_msg(0x28.x)");
+ return -1;
+ }
+
+ return 0;
+}
+
+/* ---------------------------------------------------------------------- */
+
+int xpcu_write_gpio(struct usb_dev_handle *xpcu, uint8_t bits)
+{
+ if(usb_control_msg(xpcu, 0x40, 0xB0, 0x0030, bits, NULL, 0, 1000)<0)
+ {
+ perror("usb_control_msg(0x30.0x00) (write port E)");
+ return -1;
+ }
+
+ return 0;
+}
+
+/* ---------------------------------------------------------------------- */
+
+int xpcu_read_gpio(struct usb_dev_handle *xpcu, uint8_t *bits)
+{
+ if(usb_control_msg(xpcu, 0xC0, 0xB0, 0x0038, 0, (char*)bits, 1, 1000)<0)
+ {
+ perror("usb_control_msg(0x38.0x00) (read port E)");
+ return -1;
+ }
+
+ return 0;
+}
+
+/* ---------------------------------------------------------------------- */
+
+
+int xpcu_read_cpld_version(struct usb_dev_handle *xpcu, uint16_t *buf)
+{
+ if(usb_control_msg(xpcu, 0xC0, 0xB0, 0x0050, 0x0001, (char*)buf, 2, 1000)<0)
+ {
+ perror("usb_control_msg(0x50.1) (read_cpld_version)");
+ return -1;
+ }
+ return 0;
+}
+
+/* ---------------------------------------------------------------------- */
+
+int xpcu_read_firmware_version(struct usb_dev_handle *xpcu, uint16_t *buf)
+{
+ if(usb_control_msg(xpcu, 0xC0, 0xB0, 0x0050, 0x0000, (char*)buf, 2, 1000)<0)
+ {
+ perror("usb_control_msg(0x50.0) (read_firmware_version)");
+ return -1;
+ }
+
+ return 0;
+}
+
+/* ----------------------------------------------------------------- */
+
+int xpcu_select_gpio(struct usb_dev_handle *xpcu, int int_or_ext )
+{
+ if(usb_control_msg(xpcu, 0x40, 0xB0, 0x0052, int_or_ext, NULL, 0, 1000)<0)
+ {
+ perror("usb_control_msg(0x52.x) (select gpio)");
+ return -1;
+ }
+
+ return 0;
+}
+
+/* ---------------------------------------------------------------------- */
+
+/* === A6 transfer (TDI/TMS/TCK/RDO) ===
+ *
+ * Vendor request 0xA6 initiates a quite universal shift operation. The data
+ * is passed directly to the CPLD as 16-bit words.
+ *
+ * The argument N in the request specifies the number of state changes/bits.
+ *
+ * State changes are described by the following bulk write. It consists
+ * of ceil(N/4) little-endian 16-bit words, each describing up to 4 changes:
+ *
+ * Care has to be taken that N is NOT a multiple of 4.
+ * The CPLD doesn't seem to handle that well.
+ *
+ * Bit 0: Value for first TDI to shift out.
+ * Bit 1: Second TDI.
+ * Bit 2: Third TDI.
+ * Bit 3: Fourth TDI.
+ *
+ * Bit 4: Value for first TMS to shift out.
+ * Bit 5: Second TMS.
+ * Bit 6: Third TMS.
+ * Bit 7: Fourth TMS.
+ *
+ * Bit 8: Whether to raise/lower TCK for first bit.
+ * Bit 9: Same for second bit.
+ * Bit 10: Third bit.
+ * Bit 11: Fourth bit.
+ *
+ * Bit 12: Whether to read TDO for first bit
+ * Bit 13: Same for second bit.
+ * Bit 14: Third bit.
+ * Bit 15: Fourth bit.
+ *
+ * After the bulk write, if any of the bits 12..15 was set in any word, a
+ * bulk_read shall follow to collect the TDO data.
+ *
+ * TDO data is shifted in from MSB. In a "full" word with 16 TDO bits, the
+ * earliest one reached bit 0. The earliest of 15 bits however would be bit 0,
+ * and if there's only one TDO bit, it arrives as the MSB of the word.
+ */
+
+static int
+xpcu_shift(struct usb_dev_handle *xpcu, int reqno, int bits, int in_len, uint8_t *in, int out_len, uint8_t *out )
+{
+ if(usb_control_msg(xpcu, 0x40, 0xB0, reqno, bits, NULL, 0, 1000)<0)
+ {
+ perror("usb_control_msg(x.x) (shift)");
+ return -1;
+ }
+
+#if VERBOSE
+ {
+ int i;
+ printf("###\n");
+ printf("reqno = %02X\n", reqno);
+ printf("bits = %d\n", bits);
+ printf("in_len = %d, in_len*2 = %d\n", in_len, in_len * 2);
+ printf("out_len = %d, out_len*8 = %d\n", out_len, out_len * 8);
+
+ printf("a6_display(\"%02X\", \"", bits);
+ for(i=0;i<in_len;i++) printf("%02X%s", in[i], (i+1<in_len)?",":"");
+ printf("\", ");
+ }
+#endif
+
+ if(usb_bulk_write(xpcu, 0x02, (char*)in, in_len, 1000)<0)
+ {
+ printf("\nusb_bulk_write error(shift): %s\n", strerror(errno));
+ return -1;
+ }
+
+ if(out_len > 0 && out != NULL)
+ {
+ if(usb_bulk_read(xpcu, 0x86, (char*)out, out_len, 1000)<0)
+ {
+ printf("\nusb_bulk_read error(shift): %s\n", strerror(errno));
+ return -1;
+ }
+ }
+
+#if VERBOSE
+ {
+ int i;
+ printf("\"");
+ for(i=0;i<out_len;i++) printf("%02X%s", out[i], (i+1<out_len)?",":"");
+ printf("\")\n");
+ }
+#endif
+
+ return 0;
+}
+
+/* ---------------------------------------------------------------------- */
+
+static int
+xpcu_common_init( cable_t *cable )
+{
+ int r;
+ uint16_t buf;
+ struct usb_dev_handle *xpcu;
+
+ if (usbconn_open( cable->link.usb )) return -1;
+
+ xpcu = ((libusb_param_t*)(cable->link.usb->params))->handle;
+
+ r = xpcu_request_28(xpcu, 0x11);
+ if (r>=0) r = xpcu_write_gpio(xpcu, 8);
+
+ /* Read firmware version (constant embedded in firmware) */
+
+ if (r>=0) r = xpcu_read_firmware_version(xpcu, &buf);
+ if (r>=0)
+ {
+ printf("firmware version = 0x%04X (%u)\n", buf, buf);
+ }
+
+ /* Read CPLD version (via GPIF) */
+
+ if (r>=0) xpcu_read_cpld_version(xpcu, &buf);
+ if (r>=0)
+ {
+ printf("cable CPLD version = 0x%04X (%u)\n", buf, buf);
+ if(buf == 0)
+ {
+ printf("Warning: version '0' can't be correct. Please try resetting the cable\n");
+ r = -1;
+ }
+ }
+
+ if (r<0)
+ {
+ usb_close(xpcu);
+ }
+
+ return r;
+}
+
+static int
+xpc_int_init( cable_t *cable )
+{
+ struct usb_dev_handle *xpcu;
+
+ if (xpcu_common_init( cable )<0) return -1;
+
+ xpcu = ((libusb_param_t*)(cable->link.usb->params))->handle;
+ if (xpcu_select_gpio(xpcu, 0)<0) return -1;
+
+ return 0;
+}
+
+static int
+xpc_ext_init( cable_t *cable )
+{
+ struct usb_dev_handle *xpcu;
+ uint8_t zero[2] = {0,0};
+ int r;
+
+ free(cable->params);
+ cable->params = NULL;
+
+ r = xpcu_common_init( cable );
+
+ if (r<0) return r;
+
+ cable->params = malloc(sizeof(xpc_cable_params_t));
+ if(cable->params == NULL) r = -1;
+
+ xpcu = ((libusb_param_t*)(cable->link.usb->params))->handle;
+
+ if (r>=0) r = xpcu_request_28(xpcu, 0x11);
+ if (r>=0) r = xpcu_output_enable(xpcu, 1);
+ if (r>=0) r = xpcu_shift(xpcu, 0xA6, 2, 2, zero, 0, NULL);
+ if (r>=0) r = xpcu_request_28(xpcu, 0x12);
+
+ if (r<0)
+ {
+ usb_close(xpcu);
+
+ free(cable->params);
+ cable->params = NULL;
+ }
+
+ return r;
+}
+
+/* ---------------------------------------------------------------------- */
+
+static void
+xpc_ext_done( cable_t *cable )
+{
+ struct usb_dev_handle *xpcu;
+ xpcu = ((libusb_param_t*)(cable->link.usb->params))->handle;
+ xpcu_output_enable(xpcu, 0);
+ generic_usbconn_done( cable );
+}
+
+/* ---------------------------------------------------------------------- */
+
+static void
+xpc_ext_free( cable_t *cable )
+{
+ if(cable->params)
+ {
+ free(cable->params);
+ cable->params = NULL;
+ }
+ generic_usbconn_free( cable );
+}
+
+/* ---------------------------------------------------------------------- */
+
+#define PROG 3
+#define TCK 2
+#define TMS 1
+#define TDI 0
+#define TDO 0
+
+static void
+xpc_clock( cable_t *cable, int tms, int tdi, int n )
+{
+ int i;
+ struct usb_dev_handle *xpcu;
+ xpcu = ((libusb_param_t*)(cable->link.usb->params))->handle;
+
+ tms = tms ? (1<<TMS) : 0;
+ tdi = tdi ? (1<<TDI) : 0;
+
+ if( xpcu_write_gpio(xpcu, (1<<PROG) | (0<<TCK) | tms | tdi)>=0)
+ {
+ cable_wait( cable );
+ for (i = 0; i < n; i++)
+ {
+ xpcu_write_gpio(xpcu, (1<<PROG) | (1<<TCK) | tms | tdi);
+ cable_wait( cable );
+ xpcu_write_gpio(xpcu, (1<<PROG) | (0<<TCK) | tms | tdi);
+ cable_wait( cable );
+ }
+ }
+}
+
+/* ---------------------------------------------------------------------- */
+
+static int
+xpc_get_tdo( cable_t *cable )
+{
+ unsigned char d;
+ struct usb_dev_handle *xpcu;
+ xpcu = ((libusb_param_t*)(cable->link.usb->params))->handle;
+
+ xpcu_read_gpio(xpcu, &d);
+ return (d&(1<<TDO))?1:0;
+}
+
+/* ---------------------------------------------------------------------- */
+
+static int
+xpc_set_signal( cable_t *cable, int mask, int val )
+{
+ return 1;
+}
+
+/* ---------------------------------------------------------------------- */
+
+static void
+xpc_ext_clock( cable_t *cable, int tms, int tdi, int n )
+{
+ int i;
+ uint8_t tdo[2];
+ uint8_t clock[2];
+ struct usb_dev_handle *xpcu;
+
+ clock[0] = (tms?0x10:0) | (tdi?0x01:0);
+ clock[1] = 0x11; /* clock'n read */
+
+ xpcu = ((libusb_param_t*)(cable->link.usb->params))->handle;
+
+ for(i=0;i<n;i++) xpcu_shift(xpcu, 0xA6, 1, 2, clock, 2, tdo);
+
+ last_tdo = tdo[1] ? 1:0;
+ // ((xpc_cable_params_t*)(cable->params))->last_tdo = tdo[1] ? 1:0;
+}
+
+/* ---------------------------------------------------------------------- */
+
+static int
+xpc_ext_get_tdo( cable_t *cable )
+{
+ return last_tdo;
+ // return ((xpc_cable_params_t*)(cable->params))->last_tdo;
+}
+
+/* ---------------------------------------------------------------------- */
+
+/* 16-bit words. More than 4 currently leads to bit errors; 13 to serious problems */
+#define XPC_A6_CHUNKSIZE 4
+
+typedef struct
+{
+ cable_t *cable;
+ struct usb_dev_handle *xpcu;
+ int in_bits;
+ int out_bits;
+ int out_done;
+ uint8_t *out;
+ uint8_t buf[XPC_A6_CHUNKSIZE*2];
+}
+xpc_ext_transfer_state_t;
+
+/* ---------------------------------------------------------------------- */
+
+static int
+xpcu_do_ext_transfer( xpc_ext_transfer_state_t *xts )
+{
+ int r;
+ int in_len, out_len;
+ // int last_tdo;
+
+ in_len = 2 * (xts->in_bits >> 2);
+ if ((xts->in_bits & 3) != 0) in_len += 2;
+
+ out_len = 2 * (xts->out_bits >> 4);
+ if ((xts->out_bits & 15) != 0) out_len += 2;
+
+ if(xts->out != NULL)
+ {
+ r = xpcu_shift (xts->xpcu, 0xA6, xts->in_bits, in_len, xts->buf, out_len, xts->buf);
+ }
+ else
+ {
+ r = xpcu_shift (xts->xpcu, 0xA6, xts->in_bits, in_len, xts->buf, 0, NULL);
+ }
+
+ if(r >= 0 && xts->out_bits > 0)
+ {
+ int out_idx = 0;
+ int out_rem = xts->out_bits;
+
+ while (out_rem > 0)
+ {
+ uint32_t mask, rxw;
+
+ rxw = (xts->buf[out_idx+1]<<8) | xts->buf[out_idx];
+
+ /* In the last (incomplete) word, the data isn't shifted completely to LSB */
+
+ mask = (out_rem >= 16) ? 1 : (1<<(16 - out_rem));
+
+ while(mask <= 32768 && out_rem > 0)
+ {
+ last_tdo = (rxw & mask) ? 1 : 0;
+ xts->out[xts->out_done] = last_tdo;
+ xts->out_done++;
+ mask <<= 1;
+ out_rem--;
+ }
+
+ out_idx += 2;
+ }
+ }
+
+ xts->in_bits = 0;
+ xts->out_bits = 0;
+
+ // ((xpc_cable_params_t*)(xts->cable->params))->last_tdo = last_tdo;
+
+ return r;
+}
+
+/* ---------------------------------------------------------------------- */
+
+static void
+xpcu_add_bit_for_ext_transfer( xpc_ext_transfer_state_t *xts, char in, char is_real )
+{
+ int bit_idx = (xts->in_bits & 3);
+ int buf_idx = (xts->in_bits - bit_idx) >> 1;
+
+ if(bit_idx == 0)
+ {
+ xts->buf[buf_idx] = 0;
+ xts->buf[buf_idx+1] = 0;
+ }
+
+ xts->in_bits++;
+
+ if(is_real)
+ {
+ if(in) xts->buf[buf_idx] |= (0x01<<bit_idx);
+
+ if(xts->out)
+ {
+ xts->buf[buf_idx+1] |= (0x11<<bit_idx);
+ xts->out_bits++;
+ }
+ else
+ {
+ xts->buf[buf_idx+1] |= (0x01<<bit_idx);
+ }
+ }
+}
+
+/* ---------------------------------------------------------------------- */
+
+static int
+xpc_ext_transfer( cable_t *cable, int len, char *in, char *out )
+{
+ int i,j;
+ xpc_ext_transfer_state_t xts;
+
+#if VERBOSE
+ printf("---\n");
+ printf("transfer size %d, %s output\n", len, (out!=NULL) ? "with" : "without");
+ printf("tdi: ");
+ for(i=0;i<len;i++) printf("%c", in[i]?'1':'0');
+ printf("\n");
+#endif
+
+ xts.xpcu = ((libusb_param_t*)(cable->link.usb->params))->handle;
+ xts.out = (uint8_t*)out;
+ xts.in_bits = 0;
+ xts.out_bits = 0;
+ xts.out_done = 0;
+ xts.cable = cable;
+
+ for(i=0,j=0; i<len && j>=0; i++)
+ {
+ xpcu_add_bit_for_ext_transfer( &xts, in[i], 1 );
+ if(xts.in_bits == (4*XPC_A6_CHUNKSIZE - 1))
+ {
+ j = xpcu_do_ext_transfer( &xts );
+ }
+ }
+
+ if(xts.in_bits > 0 && j>=0)
+ {
+ /* CPLD doesn't like multiples of 4; add one dummy bit */
+ if((xts.in_bits & 3) == 0)
+ {
+ xpcu_add_bit_for_ext_transfer( &xts, 0, 0 );
+ }
+ j = xpcu_do_ext_transfer( &xts );
+ }
+
+ return j;
+}
+
+/* ---------------------------------------------------------------------- */
+
+
+cable_driver_t xpc_int_cable_driver = {
+ "xpc_int",
+ N_("Xilinx Platform Cable USB internal chain"),
+ generic_usbconn_connect,
+ generic_disconnect,
+ generic_usbconn_free,
+ xpc_int_init,
+ generic_usbconn_done,
+ generic_set_frequency,
+ xpc_clock,
+ xpc_get_tdo,
+ generic_transfer,
+ xpc_set_signal,
+ generic_get_signal,
+ generic_flush_using_transfer,
+ generic_usbconn_help
+};
+
+usbconn_cable_t usbconn_cable_xpc_int = {
+ "xpc_int", /* cable name */
+ NULL, /* string pattern, not used */
+ "libusb", /* usbconn driver */
+ 0x03FD, /* VID (Xilinx) */
+ 0x0008 /* PID (8) */
+};
+
+cable_driver_t xpc_ext_cable_driver = {
+ "xpc_ext",
+ N_("Xilinx Platform Cable USB external chain"),
+ generic_usbconn_connect,
+ generic_disconnect,
+ xpc_ext_free,
+ xpc_ext_init,
+ xpc_ext_done,
+ generic_set_frequency,
+ xpc_ext_clock,
+ xpc_ext_get_tdo,
+ xpc_ext_transfer,
+ xpc_set_signal,
+ generic_get_signal,
+ generic_flush_using_transfer,
+ generic_usbconn_help
+};
+
+usbconn_cable_t usbconn_cable_xpc_ext = {
+ "xpc_ext", /* cable name */
+ NULL, /* string pattern, not used */
+ "libusb", /* usbconn driver */
+ 0x03FD, /* VID (Xilinx) */
+ 0x0008 /* PID (8) */
+};
+
+
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2003 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2003.
+ *
+ */
+
+#include "sysdep.h"
+
+#include <stdlib.h>
+#include <string.h>
+
+#include "chain.h"
+#include "state.h"
+#include "tap.h"
+
+#include "bsdl.h"
+
+chain_t *
+chain_alloc( void )
+{
+ chain_t *chain = malloc( sizeof (chain_t) );
+ if (!chain)
+ return NULL;
+
+ chain->cable = NULL;
+ chain->parts = NULL;
+ chain->total_instr_len = 0;
+ chain->active_part = 0;
+ BSDL_GLOBS_INIT(chain->bsdl);
+ tap_state_init( chain );
+
+ return chain;
+}
+
+void
+chain_free( chain_t *chain )
+{
+ if (!chain)
+ return;
+
+ chain_disconnect( chain );
+
+ parts_free( chain->parts );
+ free( chain );
+}
+
+void
+chain_disconnect( chain_t *chain )
+{
+ if (!chain->cable)
+ return;
+
+ tap_state_done( chain );
+ cable_done( chain->cable );
+ cable_free( chain->cable );
+ chain->cable = NULL;
+}
+
+void
+chain_clock( chain_t *chain, int tms, int tdi, int n )
+{
+ int i;
+
+ if (!chain || !chain->cable)
+ return;
+
+ cable_clock( chain->cable, tms, tdi, n );
+
+ for (i = 0; i < n; i++)
+ tap_state_clock( chain, tms );
+}
+
+void
+chain_defer_clock( chain_t *chain, int tms, int tdi, int n )
+{
+ int i;
+
+ if (!chain || !chain->cable)
+ return;
+
+ cable_defer_clock( chain->cable, tms, tdi, n );
+
+ for (i = 0; i < n; i++)
+ tap_state_clock( chain, tms );
+}
+
+int
+chain_set_trst( chain_t *chain, int trst )
+{
+ int old_val = cable_set_signal( chain->cable, CS_TRST, trst ? CS_TRST : 0 );
+ int old_trst = (old_val & CS_TRST) ? 1 : 0;
+ tap_state_set_trst( chain, old_trst, trst );
+ return trst;
+}
+
+int
+chain_get_trst( chain_t *chain )
+{
+ return (cable_get_signal( chain->cable, CS_TRST ));
+}
+
+int
+chain_set_pod_signal( chain_t *chain, int mask, int val )
+{
+ int old_val = cable_set_signal( chain->cable, mask, val );
+ int old_trst = (old_val & CS_TRST) ? 1 : 0;
+ int new_trst = (((old_val & ~mask) | (val & mask)) & CS_TRST) ? 1 : 0;
+ tap_state_set_trst( chain, old_trst, new_trst );
+ return old_val;
+}
+
+int
+chain_get_pod_signal( chain_t *chain, pod_sigsel_t sig )
+{
+ return (cable_get_signal( chain->cable, sig ));
+}
+
+void
+chain_shift_instructions_mode( chain_t *chain, int capture_output, int capture, int chain_exit )
+{
+ int i;
+ parts_t *ps;
+
+ if (!chain || !chain->parts)
+ return;
+
+ ps = chain->parts;
+
+ for (i = 0; i < ps->len; i++) {
+ if (ps->parts[i]->active_instruction == NULL) {
+ printf( _("%s(%d) Part %d without active instruction\n"), __FILE__, __LINE__, i );
+ return;
+ }
+ }
+
+ if (capture)
+ tap_capture_ir( chain );
+
+ /* new implementation: split into defer + retrieve part
+ shift the data register of each part in the chain one by one */
+
+ for (i = 0; i < ps->len; i++) {
+ tap_defer_shift_register( chain, ps->parts[i]->active_instruction->value,
+ capture_output ? ps->parts[i]->active_instruction->out : NULL,
+ (i + 1) == ps->len ? chain_exit : EXITMODE_SHIFT );
+ }
+
+ if(capture_output)
+ {
+ for (i = 0; i < ps->len; i++) {
+ tap_shift_register_output( chain, ps->parts[i]->active_instruction->value,
+ ps->parts[i]->active_instruction->out,
+ (i + 1) == ps->len ? chain_exit : EXITMODE_SHIFT );
+ }
+ }
+ else
+ {
+ /* give the cable driver a chance to flush if it's considered useful */
+ cable_flush( chain->cable, TO_OUTPUT );
+ }
+}
+
+void
+chain_shift_instructions( chain_t *chain )
+{
+ chain_shift_instructions_mode( chain, 0, 1, EXITMODE_IDLE );
+}
+
+void
+chain_shift_data_registers_mode( chain_t *chain, int capture_output, int capture, int chain_exit )
+{
+ int i;
+ parts_t *ps;
+
+ if (!chain || !chain->parts)
+ return;
+
+ ps = chain->parts;
+
+ for (i = 0; i < ps->len; i++) {
+ if (ps->parts[i]->active_instruction == NULL) {
+ printf( _("%s(%d) Part %d without active instruction\n"), __FILE__, __LINE__, i );
+ return;
+ }
+ if (ps->parts[i]->active_instruction->data_register == NULL) {
+ printf( _("%s(%d) Part %d without data register\n"), __FILE__, __LINE__, i );
+ return;
+ }
+ }
+
+ if (capture)
+ tap_capture_dr( chain );
+
+ /* new implementation: split into defer + retrieve part
+ shift the data register of each part in the chain one by one */
+
+ for (i = 0; i < ps->len; i++) {
+ tap_defer_shift_register( chain, ps->parts[i]->active_instruction->data_register->in,
+ capture_output ? ps->parts[i]->active_instruction->data_register->out : NULL,
+ (i + 1) == ps->len ? chain_exit : EXITMODE_SHIFT );
+ }
+
+ if(capture_output)
+ {
+ for (i = 0; i < ps->len; i++) {
+ tap_shift_register_output( chain, ps->parts[i]->active_instruction->data_register->in,
+ ps->parts[i]->active_instruction->data_register->out,
+ (i + 1) == ps->len ? chain_exit : EXITMODE_SHIFT );
+ }
+ }
+ else
+ {
+ /* give the cable driver a chance to flush if it's considered useful */
+ cable_flush( chain->cable, TO_OUTPUT );
+ }
+}
+
+void
+chain_shift_data_registers( chain_t *chain, int capture_output )
+{
+ chain_shift_data_registers_mode( chain, capture_output, 1, EXITMODE_IDLE );
+}
+
+void
+chain_flush( chain_t *chain )
+{
+ if( chain->cable != NULL)
+ cable_flush( chain->cable, COMPLETELY );
+}
+
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2002 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2002.
+ *
+ */
+
+#include "sysdep.h"
+
+#include <inttypes.h>
+#include <stdio.h>
+#include <stdlib.h>
+#include <ctype.h>
+#include <string.h>
+
+#include <cmd.h>
+
+#include <bsdl.h>
+
+#include "register.h"
+#include "tap.h"
+#include "cable.h"
+#include "part.h"
+#include "chain.h"
+
+#include "jtag.h"
+
+struct id_record {
+ char name[20];
+ char fullname[100];
+};
+
+static int
+find_record( char *filename, tap_register *key, struct id_record *idr )
+{
+ FILE *file;
+ tap_register *tr;
+ int r = 0;
+
+ file = fopen( filename, "r" );
+ if (!file) {
+ printf( _("Cannot open %s\n"), filename );
+ return 0;
+ }
+
+ tr = register_alloc( key->len );
+
+ for (;;) {
+ char *p;
+ char *s;
+ char line[1024];
+
+ if (fgets( line, 1024, file ) == NULL)
+ break;
+
+ /* remove comment and nl from the line */
+ p = strpbrk( line, "#\n" );
+ if (p)
+ *p = '\0';
+
+ p = line;
+
+ /* skip whitespace */
+ while (*p && isspace(*p))
+ p++;
+
+ /* remove ending whitespace */
+ s = strchr( p, '\0' );
+ while (s != p) {
+ if (!isspace(*--s))
+ break;
+ *s = '\0';
+ }
+
+ /* line is empty? */
+ if (!*p)
+ continue;
+
+ /* find end of field */
+ s = p;
+ while (*s && !isspace(*s))
+ s++;
+ if (*s)
+ *s++ = '\0';
+
+ /* test field length */
+ if (strlen( p ) != key->len)
+ continue;
+
+ /* match */
+ register_init( tr, p );
+ if (register_compare( tr, key ))
+ continue;
+
+ /* next field */
+ p = s;
+
+ /* skip whitespace */
+ while (*p && isspace(*p))
+ p++;
+
+ /* line is empty? */
+ if (!*p)
+ continue;
+
+ /* find end of field */
+ s = p;
+ while (*s && !isspace(*s))
+ s++;
+ if (*s)
+ *s++ = '\0';
+
+ /* test field length */
+ if (strlen( p ) >= sizeof idr->name)
+ continue;
+
+ /* copy name */
+ strcpy( idr->name, p );
+
+ /* next field */
+ p = s;
+
+ /* skip whitespace */
+ while (*p && isspace(*p))
+ p++;
+
+ /* line is empty? */
+ if (!*p)
+ continue;
+
+ /* test field length */
+ if (strlen( p ) >= sizeof idr->fullname)
+ continue;
+
+ /* copy fullname */
+ strcpy( idr->fullname, p );
+
+ r = 1;
+ break;
+ }
+
+ fclose( file );
+
+ register_free( tr );
+
+ return r;
+}
+
+uint64_t bits_to_uint64(tap_register *t)
+{
+ int i;
+ uint64_t l,b;
+
+ l = 0; b=1;
+ for(i=0;i < t->len ;i++) {
+ if(t->data[i] & 1)l |= b;
+ b <<= 1;
+ }
+ return l;
+}
+
+
+int
+detect_parts( chain_t *chain, const char *db_path )
+{
+ int irlen;
+ tap_register *ir;
+ int chlen;
+ tap_register *one;
+ tap_register *ones;
+ tap_register *br;
+ tap_register *id;
+ parts_t *ps;
+ int i;
+
+ char data_path[1024];
+ char *cmd[3] = {"include", data_path, NULL};
+ char manufacturer[MAXLEN_MANUFACTURER + 1];
+ char partname[MAXLEN_PART + 1];
+ char stepping[MAXLEN_STEPPING + 1];
+
+ /* Detect IR length */
+ tap_reset( chain );
+ tap_capture_ir( chain );
+ irlen = detect_register_size( chain );
+ if (irlen < 1)
+ return 0;
+
+ printf( _("IR length: %d\n"), irlen );
+ chain->total_instr_len = irlen;
+
+ /* Allocate IR */
+ ir = register_fill( register_alloc( irlen ), 1 );
+ if (ir == NULL) {
+ printf( _("out of memory\n") );
+ return 0;
+ }
+
+ tap_shift_register( chain, ir, NULL, EXITMODE_IDLE );
+ register_free( ir );
+
+ /* Detect chain length */
+ tap_capture_dr( chain );
+ chlen = detect_register_size( chain );
+ if (chlen < 1) {
+ printf( _("Unable to detect JTAG chain length\n") );
+ return 0;
+ }
+ printf( _("Chain length: %d\n"), chlen );
+
+ /* Allocate registers and parts */
+ one = register_fill( register_alloc( 1 ), 1 );
+ ones = register_fill( register_alloc( 31 ), 1 );
+ br = register_alloc( 1 );
+ id = register_alloc( 32 );
+ ps = parts_alloc();
+ if (!one || !ones || !br || !id || !ps) {
+ printf( _("out of memory\n") );
+
+ register_free( one );
+ register_free( ones );
+ register_free( br );
+ register_free( id );
+ parts_free( ps );
+ return 0;
+ }
+ chain->parts = ps;
+ chain->active_part = 0;
+
+ /* Detect parts */
+ tap_reset( chain );
+ tap_capture_dr( chain );
+
+ for (i = 0; i < chlen; i++) {
+ part_t *part;
+ tap_register *did = br; /* detected id (length is 1 or 32) */
+ tap_register *key;
+ struct id_record idr;
+ char *p;
+
+ tap_shift_register( chain, one, br, EXITMODE_SHIFT );
+ if (register_compare( one, br ) == 0) {
+ /* part with id */
+ tap_shift_register( chain, ones, id, EXITMODE_SHIFT );
+ register_shift_left( id, 1 );
+ id->data[0] = 1;
+ did = id;
+ }
+
+ printf( _("Device Id: %s (0x%016"PRIX64")\n"), register_get_string( did ), bits_to_uint64(did) );
+
+ part = part_alloc( did );
+ if (part == NULL) {
+ printf( _("Out of memory\n") );
+ break;
+ }
+ parts_add_part( ps, part );
+
+ if (did == br)
+ continue;
+
+ chain->active_part = ps->len - 1;
+
+#ifdef ENABLE_BSDL
+ if (bsdl_scan_files( chain, register_get_string( did ),
+ BSDL_MODE_DETECT ) <= 0) {
+#endif
+
+ /* find JTAG declarations for a part with id */
+
+ strcpy( data_path, db_path ); /* FIXME: Buffer overrun */
+
+ /* manufacturers */
+ strcat( data_path, "/MANUFACTURERS" );
+
+ key = register_alloc( 11 );
+ memcpy( key->data, &id->data[1], key->len );
+ if (!find_record( data_path, key, &idr )) {
+ printf( _(" Unknown manufacturer!\n") );
+ register_free( key );
+ continue;
+ }
+ register_free( key );
+
+ printf( _(" Manufacturer: %s\n"), idr.fullname );
+ if (strlen( idr.fullname ) > MAXLEN_MANUFACTURER)
+ printf( _("Warning: Manufacturer too long\n") );
+ strncpy( manufacturer, idr.fullname, MAXLEN_MANUFACTURER );
+ manufacturer[MAXLEN_MANUFACTURER] = '\0';
+
+ /* parts */
+ p = strrchr( data_path, '/' );
+ if (p)
+ p[1] = '\0';
+ else
+ data_path[0] = '\0';
+ strcat( data_path, idr.name );
+ strcat( data_path, "/PARTS" );
+
+ key = register_alloc( 16 );
+ memcpy( key->data, &id->data[12], key->len );
+ if (!find_record( data_path, key, &idr )) {
+ printf( _(" Unknown part!\n") );
+ register_free( key );
+ continue;
+ }
+ register_free( key );
+
+ printf( _(" Part(%d): %s\n"), chain->active_part, idr.fullname );
+ if (strlen( idr.fullname ) > MAXLEN_PART)
+ printf( _("Warning: Part too long\n") );
+ strncpy( partname, idr.fullname, MAXLEN_PART );
+ partname[MAXLEN_PART] = '\0';
+
+ /* steppings */
+ p = strrchr( data_path, '/' );
+ if (p)
+ p[1] = '\0';
+ else
+ data_path[0] = '\0';
+ strcat( data_path, idr.name );
+ strcat( data_path, "/STEPPINGS" );
+
+ key = register_alloc( 4 );
+ memcpy( key->data, &id->data[28], key->len );
+ if (!find_record( data_path, key, &idr )) {
+ printf( _(" Unknown stepping!\n") );
+ register_free( key );
+ continue;
+ }
+ register_free( key );
+
+ printf( _(" Stepping: %s\n"), idr.fullname );
+ if (strlen( idr.fullname ) > MAXLEN_STEPPING)
+ printf( _("Warning: Stepping too long\n") );
+ strncpy( stepping, idr.fullname, MAXLEN_STEPPING );
+ stepping[MAXLEN_STEPPING] = '\0';
+
+ /* part definition file */
+ p = strrchr( data_path, '/' );
+ if (p)
+ p[1] = '\0';
+ else
+ data_path[0] = '\0';
+ strcat( data_path, idr.name );
+
+ printf( _(" Filename: %s\n"), data_path );
+
+ /* run JTAG declarations */
+ strcpy( part->manufacturer, manufacturer );
+ strcpy( part->part, partname );
+ strcpy( part->stepping, stepping );
+ cmd_run( chain, cmd );
+#ifdef ENABLE_BSDL
+ }
+#endif
+
+ if (part->active_instruction == NULL)
+ part->active_instruction = part_find_instruction( part, "IDCODE" );
+ }
+
+ for (i = 0; i < 32; i++) {
+ tap_shift_register( chain, one, br, EXITMODE_SHIFT );
+ if (register_compare( one, br ) != 0) {
+ printf( _("Error: Unable to detect JTAG chain end!\n") );
+ break;
+ }
+ }
+ tap_shift_register( chain, one, NULL, EXITMODE_IDLE );
+
+ register_free( one );
+ register_free( ones );
+ register_free( br );
+ register_free( id );
+
+ return ps->len;
+}
+
+
+/* In case we do not want to detect, we can add parts manually */
+
+int manual_add(chain_t *chain, int instr_len)
+{
+ tap_register *id;
+ part_t *part;
+ char *cmd[] = {NULL, NULL, NULL, NULL, NULL};
+ char *str;
+ int result;
+
+ id = register_alloc( 1 );
+ if (id == NULL) {
+ printf( _("Error: Unable to allocate a register!\n") );
+ return 0;
+ }
+
+ /* if there are no parts, create the parts list */
+ if (chain->parts == NULL) {
+ chain->parts = parts_alloc();
+ if (chain->parts == NULL) {
+ printf( _("Error: Unable to allocate space for parts!\n") );
+ return 0;
+ }
+ }
+
+ part = part_alloc(id);
+ if (part == NULL) {
+ printf( _("Error: Unable to allocate space for a part!\n") );
+ return 0;
+ }
+
+ strncpy(part->part, "unknown", MAXLEN_PART);
+ part->instruction_length = instr_len;
+
+ parts_add_part(chain->parts, part);
+ chain->active_part = chain->parts->len - 1;
+
+ /* make the BR register available */
+ cmd[0] = "register";
+ cmd[1] = "BR";
+ cmd[2] = "1";
+ cmd[3] = NULL;
+ if (cmd_run(chain, cmd) < 1) {
+ printf( _("Error: could not set BR register") );
+ return 0;
+ }
+
+ /* create a string of 1's for BYPASS instruction */
+ cmd[0] = "instruction";
+ cmd[1] = "BYPASS";
+ cmd[3] = "BR";
+ cmd[4] = NULL;
+ str = (char *)calloc(instr_len + 1, sizeof(char));
+ if (str == NULL) {
+ printf( _("Out of memory!\n") );
+ return 0;
+ }
+
+ memset(str, '1', instr_len);
+ str[instr_len] = '\0';
+ cmd[2] = str;
+ result = cmd_run(chain, cmd);
+ free(str);
+
+ if (result < 1) {
+ printf( _("Error: could not set BYPASS instruction") );
+ return 0;
+ }
+
+ /* update total instruction register length of chain */
+ chain->total_instr_len += instr_len;
+
+ return chain->parts->len;
+}
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2003 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2003.
+ *
+ */
+
+#include "sysdep.h"
+
+#include <stdio.h>
+#include <stdlib.h>
+
+#include "cable.h"
+#include "tap.h"
+#include "chain.h"
+
+#include "jtag.h"
+
+#define DETECT_PATTERN_SIZE 8
+#define MAX_REGISTER_LENGTH 1024
+#define TEST_COUNT 1
+#define TEST_THRESHOLD 100 /* in % */
+
+#undef VERY_LOW_LEVEL_DEBUG
+
+int
+detect_register_size( chain_t *chain )
+{
+ int len;
+ tap_register *rz;
+ tap_register *rout;
+ tap_register *rpat;
+
+ /* This seems to be a good place to check if TDO changes at all */
+ int tdo, tdo_stuck = -2;
+
+ for (len = 1; len <= MAX_REGISTER_LENGTH; len++) {
+ int p;
+ int ok = 0;
+
+ rz = register_fill( register_alloc( len ), 0 );
+ rout = register_alloc( DETECT_PATTERN_SIZE + len );
+ rpat = register_inc( register_fill( register_alloc( DETECT_PATTERN_SIZE + len ), 0 ) );
+
+ for (p = 1; p < (1 << DETECT_PATTERN_SIZE); p++) {
+ int i;
+ const char *s;
+ ok = 0;
+
+ s = register_get_string( rpat );
+ while (*s)
+ s++;
+
+ for (i = 0; i < TEST_COUNT; i++) {
+ tap_shift_register( chain, rz, NULL, 0 );
+ tap_shift_register( chain, rpat, rout, 0 );
+
+#ifdef VERY_LOW_LEVEL_DEBUG
+ printf(">>> %s\n", register_get_string(rz));
+ printf(" + %s\n", register_get_string(rpat));
+#endif
+ tdo = register_all_bits_same_value(rout);
+ if(tdo_stuck == -2) tdo_stuck = tdo;
+ if(tdo_stuck != tdo) tdo_stuck = -1;
+
+ register_shift_right( rout, len );
+ if (register_compare( rpat, rout ) == 0)
+ ok++;
+#ifdef VERY_LOW_LEVEL_DEBUG
+ printf(" = %s => %d\n", register_get_string(rout), ok);
+#endif
+ }
+ if (100 * ok / TEST_COUNT < TEST_THRESHOLD) {
+ ok = 0;
+ break;
+ }
+
+ register_inc( rpat );
+ }
+
+ register_free( rz );
+ register_free( rout );
+ register_free( rpat );
+
+ if (ok)
+ return len;
+ }
+
+ if(tdo_stuck >= 0)
+ {
+ printf(_("Warning: TDO seems to be stuck at %d\n"), tdo_stuck);
+ }
+
+ return -1;
+}
+
+void
+jtag_reset( chain_t *chain )
+{
+ chain_set_trst( chain, 0 );
+ chain_set_trst( chain, 1 );
+
+ tap_reset( chain );
+}
+
+void
+discovery( chain_t *chain )
+{
+ int irlen;
+ tap_register *ir;
+ tap_register *irz;
+
+ /* detecting IR size */
+ jtag_reset( chain );
+
+ printf( _("Detecting IR length ... ") );
+ fflush( stdout );
+
+ tap_capture_ir( chain );
+ irlen = detect_register_size( chain );
+
+ printf( _("%d\n"), irlen );
+
+ if (irlen < 1) {
+ printf( _("Error: Invalid IR length!\n") );
+ return;
+ }
+
+ /* all 1 is BYPASS in all parts, so DR length gives number of parts */
+ ir = register_fill( register_alloc( irlen ), 1 );
+ irz = register_duplicate( ir );
+
+ if (!ir || !irz) {
+ register_free( ir );
+ register_free( irz );
+ printf( _("Error: Out of memory!\n") );
+ return;
+ }
+
+ for (;;) {
+ int rs;
+
+ jtag_reset( chain );
+
+ tap_capture_ir( chain );
+ tap_shift_register( chain, ir, NULL, 1 );
+
+ printf( _("Detecting DR length for IR %s ... "), register_get_string( ir ) );
+ fflush( stdout );
+
+ tap_capture_dr( chain );
+ rs = detect_register_size( chain );
+
+ printf( _("%d\n"), rs );
+
+ register_inc( ir );
+ if (register_compare( ir, irz ) == 0)
+ break;
+ }
+ register_free( ir );
+ register_free( irz );
+}
--- /dev/null
+/*
+ * $Id: idcode.c 1120 2008-03-15 02:27:13Z jiez $
+ *
+ * Copyright (C) 2003 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Uwe Bonnes <bon@elektron.ikp.physik.tu-darmstadt.de>, 2008.
+ *
+ */
+#include "sysdep.h"
+
+#include <stdio.h>
+#include <stdlib.h>
+
+#include "cable.h"
+#include "tap.h"
+#include "chain.h"
+
+#include "jtag.h"
+
+void
+idcode( chain_t *chain , unsigned int bytes)
+{
+ int i;
+ int hit = 0;
+ tap_register *rz;
+ tap_register *rout;
+ tap_register *rnull;
+
+ chain_set_trst( chain, 0 );
+ chain_set_trst( chain, 1 );
+
+ tap_reset( chain );
+ tap_capture_dr( chain );
+
+ /* read in chunks of 8 bytes */
+ rz = register_fill( register_alloc( 8 ), 0);
+ rnull = register_fill( register_alloc( 8 ), 0 );
+ rout = register_alloc( 8 );
+
+ if (!rz || !rout || !rnull)
+ {
+ printf(_("Allocation failed\n"));
+ }
+ printf(_("Read"));
+ for (i=0; i<((bytes)?bytes:1000); i++)
+ {
+ tap_shift_register( chain, rz, rout, 0 );
+ printf(_(" %s"), register_get_string(rout));
+ if (!bytes)
+ {
+ /* Abort Reading when a null IDCODE has been read */
+ if (!register_compare(rout, rnull))
+ hit++;
+ else
+ hit = 0;
+ if (hit >3)
+ break;
+ }
+ }
+ register_free( rz );
+ register_free( rnull );
+ register_free( rout );
+ printf(_("\n"));
+}
+
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2003 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2003.
+ *
+ */
+
+#include "sysdep.h"
+
+#include "parport.h"
+
+extern parport_driver_t direct_parport_driver;
+extern parport_driver_t ppdev_parport_driver;
+extern parport_driver_t ppi_parport_driver;
+
+parport_driver_t *parport_drivers[] = {
+#ifdef ENABLE_LOWLEVEL_DIRECT
+ &direct_parport_driver,
+#endif /* ENABLE_LOWLEVEL_DIRECT */
+
+#ifdef ENABLE_LOWLEVEL_PPDEV
+ &ppdev_parport_driver,
+#endif /* ENABLE_LOWLEVEL_PPDEV */
+
+#ifdef ENABLE_LOWLEVEL_PPI
+ &ppi_parport_driver,
+#endif /* ENABLE_LOWLEVEL_PPI */
+ NULL /* last must be NULL */
+};
+
+
+int
+parport_open( parport_t *port )
+{
+ return port->driver->open( port );
+}
+
+int
+parport_close( parport_t *port )
+{
+ return port->driver->close( port );
+}
+
+int
+parport_set_data( parport_t *port, uint8_t data )
+{
+ return port->driver->set_data( port, data );
+}
+
+int
+parport_get_data( parport_t *port )
+{
+ return port->driver->get_data( port );
+}
+
+int
+parport_get_status( parport_t *port )
+{
+ return port->driver->get_status( port );
+}
+
+int
+parport_set_control( parport_t *port, uint8_t data )
+{
+ return port->driver->set_control( port, data );
+}
--- /dev/null
+/*
+ * $Id$
+ *
+ * Direct Parallel Port Connection Driver
+ * Copyright (C) 2003 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2003.
+ * Ported to NetBSD/i386 by Jachym Holecek <freza@psi.cz>, 2003.
+ *
+ */
+
+#include "sysdep.h"
+
+#ifdef ENABLE_LOWLEVEL_DIRECT
+
+#include <stdlib.h>
+#include <string.h>
+
+#include "parport.h"
+#include "cable.h"
+
+#if defined(HAVE_INPOUTXX)
+
+HINSTANCE inpout32_dll_handle = NULL;
+
+typedef short _stdcall (*inpfuncPtr)(short p);
+typedef void _stdcall (*outfuncPtr)(short p, short d);
+
+inpfuncPtr Inp32;
+outfuncPtr Out32;
+
+#define inb(p) (Inp32)(p)
+#define outb(d,p) (Out32)(p,d)
+
+#elif defined(HAVE_IOPERM)
+
+#include <sys/io.h>
+
+#elif defined(HAVE_I386_SET_IOPERM)
+
+#include <sys/types.h>
+#include <machine/sysarch.h>
+#include <err.h>
+
+static __inline int
+ioperm( unsigned long from, unsigned long num, int permit )
+{
+#ifdef __FreeBSD__
+ if (i386_set_ioperm( from, num, permit ) == -1)
+ return -1;
+#else
+ u_long ports[32];
+ u_long i;
+
+ if (i386_get_ioperm( ports ) == -1)
+ return -1;
+
+ for (i = from; i < (from + num); i++)
+ if (permit)
+ ports[i / 32] &= ~(1 << (i % 32));
+ else
+ ports[i / 32] |= (1 << (i % 32));
+
+ if (i386_set_ioperm( ports ) == -1)
+ return -1;
+#endif
+ return 0;
+}
+
+static __inline int
+iopl( int level )
+{
+#ifndef __FreeBSD__
+ return i386_iopl( level );
+#endif
+ return 0;
+}
+
+static __inline unsigned char
+inb( unsigned short int port )
+{
+ unsigned char _v;
+
+ __asm__ __volatile__ ("inb %w1,%0":"=a" (_v):"Nd" (port));
+ return _v;
+}
+
+static __inline void
+outb( unsigned char value, unsigned short int port )
+{
+ __asm__ __volatile__ ("outb %b0,%w1": :"a" (value), "Nd" (port));
+}
+#endif /* HAVE_I386_SET_IOPERM */
+
+parport_driver_t direct_parport_driver;
+
+typedef struct port_node_t port_node_t;
+
+struct port_node_t {
+ parport_t *port;
+ port_node_t *next;
+};
+
+static port_node_t *ports = NULL; /* direct parallel ports */
+
+typedef struct {
+ unsigned int port;
+} direct_params_t;
+
+static parport_t *
+direct_parport_alloc( unsigned int port )
+{
+ direct_params_t *params = malloc( sizeof *params );
+ parport_t *parport = malloc( sizeof *parport );
+ port_node_t *node = malloc( sizeof *node );
+
+#if defined(HAVE_INPOUTXX)
+ if (inpout32_dll_handle == NULL)
+ {
+ inpout32_dll_handle = LoadLibrary("inpout32.dll");
+ }
+ if (inpout32_dll_handle == NULL)
+ {
+ fprintf(stderr, _("Couldn't load InpOut32.dll; maybe not installed?\n"));
+ }
+ else
+ {
+ Inp32 = (inpfuncPtr) GetProcAddress(inpout32_dll_handle, "Inp32");
+ Out32 = (outfuncPtr) GetProcAddress(inpout32_dll_handle, "Out32");
+ }
+
+ if (!node || !parport || !params || !inpout32_dll_handle)
+#else
+ if (!node || !parport || !params)
+#endif
+ {
+
+ free( node );
+ free( parport );
+ free( params );
+ return NULL;
+ }
+
+ params->port = port;
+
+ parport->params = params;
+ parport->driver = &direct_parport_driver;
+ parport->cable = NULL;
+
+ node->port = parport;
+ node->next = ports;
+
+ ports = node;
+
+ return parport;
+}
+
+static void
+direct_parport_free( parport_t *port )
+{
+ port_node_t **prev;
+
+ for (prev = &ports; *prev; prev = &((*prev)->next))
+ if ((*prev)->port == port)
+ break;
+
+ if (*prev) {
+ port_node_t *pn = *prev;
+ *prev = pn->next;
+ free( pn );
+ }
+
+ free( port->params );
+ free( port );
+
+#if defined(HAVE_INPOUTXX)
+ if (inpout32_dll_handle != NULL)
+ FreeLibrary(inpout32_dll_handle);
+#endif
+}
+
+parport_t *
+direct_connect( const char **par, int parnum )
+{
+ long int port_scan_val;
+ unsigned int port;
+ port_node_t *pn = ports;
+ parport_t *parport;
+
+ if (parnum != 1) {
+ printf( _("Syntax error!\n") );
+ return NULL;
+ }
+
+ port_scan_val = strtol(par[0], NULL, 0);
+
+ if (port_scan_val < 0 || (port_scan_val + 3) > 0xffff) {
+ printf( _("Invalid port address!\n") );
+ return NULL;
+ }
+
+ port = (unsigned int )port_scan_val;
+
+ while (pn)
+ for (pn = ports; pn; pn = pn->next) {
+ unsigned int aport;
+
+ aport = ((direct_params_t*) pn->port->params)->port;
+ if (abs( aport - port ) < 3) {
+ printf( _("Disconnecting %s from parallel port at 0x%x\n"), _(pn->port->cable->driver->description), aport );
+ pn->port->cable->driver->disconnect( pn->port->cable );
+ break;
+ }
+ }
+
+ printf( _("Initializing parallel port at 0x%x\n"), port );
+
+ parport = direct_parport_alloc( port );
+ if (!parport) {
+ printf( _("%s(%d) Out of memory.\n"), __FILE__, __LINE__ );
+ return NULL;
+ }
+
+ return parport;
+}
+
+static int
+direct_open( parport_t *parport )
+{
+#ifdef HAVE_INPOUTXX
+ return 0;
+#else
+ unsigned int port = ((direct_params_t *) parport->params)->port;
+ return ((port + 3 <= 0x400) && ioperm( port, 3, 1 )) || ((port + 3 > 0x400) && iopl( 3 ));
+#endif
+}
+
+static int
+direct_close( parport_t *parport )
+{
+#if defined(HAVE_INPOUTXX)
+ return 0;
+#else
+ unsigned int port = ((direct_params_t *) parport->params)->port;
+ return (port + 3 <= 0x400) ? ioperm( port, 3, 0 ) : iopl( 0 );
+#endif
+}
+
+static int
+direct_set_data( parport_t *parport, uint8_t data )
+{
+ unsigned int port = ((direct_params_t *) parport->params)->port;
+ outb( data, port );
+ return 0;
+}
+
+static int
+direct_get_data( parport_t *parport )
+{
+ unsigned int port = ((direct_params_t *) parport->params)->port;
+ return inb( port );
+}
+
+static int
+direct_get_status( parport_t *parport )
+{
+ unsigned int port = ((direct_params_t *) parport->params)->port;
+ return inb( port + 1 ) ^ 0x80; /* BUSY is inverted */
+}
+
+static int
+direct_set_control( parport_t *parport, uint8_t data )
+{
+ unsigned int port = ((direct_params_t *) parport->params)->port;
+ outb( data ^ 0x0B, port + 2 ); /* SELECT, AUTOFD, and STROBE are inverted */
+ return 0;
+}
+
+parport_driver_t direct_parport_driver = {
+ "parallel",
+ direct_connect,
+ direct_parport_free,
+ direct_open,
+ direct_close,
+ direct_set_data,
+ direct_get_data,
+ direct_get_status,
+ direct_set_control
+};
+
+#endif /* ENABLE_LOWLEVEL_DIRECT */
--- /dev/null
+/*
+ * $Id$
+ *
+ * Linux ppdev Driver
+ * Copyright (C) 2003 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2003.
+ *
+ */
+
+#include "sysdep.h"
+
+#ifdef ENABLE_LOWLEVEL_PPDEV
+
+#include <fcntl.h>
+#ifdef HAVE_STROPTS_H
+#include <stropts.h>
+#endif
+#include <unistd.h>
+#include <linux/ppdev.h>
+#include <linux/ioctl.h>
+
+#include <stdlib.h>
+#include <errno.h>
+#include <string.h>
+
+#include "parport.h"
+#include "cable.h"
+
+parport_driver_t ppdev_parport_driver;
+
+typedef struct port_node_t port_node_t;
+
+struct port_node_t {
+ parport_t *port;
+ port_node_t *next;
+};
+
+static port_node_t *ports = NULL; /* ppdev parallel ports */
+
+typedef struct {
+ char *portname;
+ int fd;
+} ppdev_params_t;
+
+static parport_t *
+ppdev_parport_alloc( const char *port )
+{
+ ppdev_params_t *params = malloc( sizeof *params );
+ char *portname = strdup( port );
+ parport_t *parport = malloc( sizeof *parport );
+ port_node_t *node = malloc( sizeof *node );
+
+ if (!node || !parport || !params || !portname) {
+ free( node );
+ free( parport );
+ free( params );
+ free( portname );
+ return NULL;
+ }
+
+ params->portname = portname;
+ params->fd = -1;
+
+ parport->params = params;
+ parport->driver = &ppdev_parport_driver;
+ parport->cable = NULL;
+
+ node->port = parport;
+ node->next = ports;
+
+ ports = node;
+
+ return parport;
+}
+
+static void
+ppdev_parport_free( parport_t *port )
+{
+ port_node_t **prev;
+
+ for (prev = &ports; *prev; prev = &((*prev)->next))
+ if ((*prev)->port == port)
+ break;
+
+ if (*prev) {
+ port_node_t *pn = *prev;
+ *prev = pn->next;
+ free( pn );
+ }
+
+ free( ((ppdev_params_t *) port->params)->portname );
+ free( port->params );
+ free( port );
+}
+
+parport_t *
+ppdev_connect( const char **par, int parnum )
+{
+ port_node_t *pn;
+ parport_t *parport;
+
+ if (parnum != 1) {
+ printf( _("Syntax error!\n") );
+ return NULL;
+ }
+
+ for (pn = ports; pn; pn = pn->next)
+ if (strcmp( pn->port->params, par[0] ) == 0) {
+ printf( _("Disconnecting %s from ppdev port %s\n"), _(pn->port->cable->driver->description), par[0] );
+ pn->port->cable->driver->disconnect( pn->port->cable );
+ break;
+ }
+
+ printf( _("Initializing ppdev port %s\n"), par[0] );
+
+ parport = ppdev_parport_alloc( par[0] );
+ if (!parport) {
+ printf( _("%s(%d) Out of memory.\n"), __FILE__, __LINE__ );
+ return NULL;
+ }
+
+ return parport;
+}
+
+static int
+ppdev_open( parport_t *parport )
+{
+ ppdev_params_t *p = parport->params;
+
+ p->fd = open( p->portname, O_RDWR );
+ if (p->fd < 0) {
+ printf( _("Could not open port %s: %s\n"), p->portname, strerror(errno) );
+ return -1;
+ }
+
+ if (/*(ioctl( p->fd, PPEXCL ) == -1) ||*/ (ioctl( p->fd, PPCLAIM ) == -1)) {
+ printf( _("Could not claim ppdev device: %s\n"), strerror(errno) );
+ close( p->fd );
+ p->fd = -1;
+ return -1;
+ }
+
+ return 0;
+}
+
+static int
+ppdev_close( parport_t *parport )
+{
+ int r = 0;
+ ppdev_params_t *p = parport->params;
+
+ if (ioctl( p->fd, PPRELEASE ) == -1)
+ r = -1;
+
+ if (close( p->fd ) != 0)
+ return -1;
+
+ p->fd = -1;
+ return r;
+}
+
+static int
+ppdev_set_data( parport_t *parport, uint8_t data )
+{
+ ppdev_params_t *p = parport->params;
+
+ if (ioctl( p->fd, PPWDATA, &data ) == -1)
+ return -1;
+
+ return 0;
+}
+
+static int
+ppdev_get_data( parport_t *parport )
+{
+ unsigned char d;
+ ppdev_params_t *p = parport->params;
+
+ if (ioctl( p->fd, PPRDATA, &d ) == -1)
+ return -1;
+
+ return d;
+}
+
+static int
+ppdev_get_status( parport_t *parport )
+{
+ unsigned char d;
+ ppdev_params_t *p = parport->params;
+
+ if (ioctl( p->fd, PPRSTATUS, &d ) == -1)
+ return -1;
+
+ return d ^ 0x80; /* BUSY is inverted */
+}
+
+static int
+ppdev_set_control( parport_t *parport, uint8_t data )
+{
+ ppdev_params_t *p = parport->params;
+
+ data ^= 0x0B; /* SELECT, AUTOFD, and STROBE are inverted */
+
+ if (ioctl( p->fd, PPWCONTROL, &data ) == -1)
+ return -1;
+
+ return 0;
+}
+
+parport_driver_t ppdev_parport_driver = {
+ "ppdev",
+ ppdev_connect,
+ ppdev_parport_free,
+ ppdev_open,
+ ppdev_close,
+ ppdev_set_data,
+ ppdev_get_data,
+ ppdev_get_status,
+ ppdev_set_control
+};
+
+#endif /* ENABLE_LOWLEVEL_PPDEV */
--- /dev/null
+/*
+ * $Id$
+ *
+ * FreeBSD ppi Driver
+ * Copyright (C) 2005 Daniel O'Connor
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Daniel O'Connor <doconnor@gsoft.com.au> July 2005.
+ *
+ */
+
+#include "sysdep.h"
+
+#ifdef HAVE_DEV_PPBUS_PPI_H
+
+#include <fcntl.h>
+#include <unistd.h>
+#include <dev/ppbus/ppi.h>
+#include <dev/ppbus/ppbconf.h>
+
+#include <stdlib.h>
+#include <string.h>
+
+#include "parport.h"
+#include "cable.h"
+
+parport_driver_t ppi_parport_driver;
+
+typedef struct port_node_t port_node_t;
+
+struct port_node_t {
+ parport_t *port;
+ port_node_t *next;
+};
+
+static port_node_t *ports = NULL; /* ppi parallel ports */
+
+typedef struct {
+ char *portname;
+ int fd;
+} ppi_params_t;
+
+static parport_t *
+ppi_parport_alloc( const char *port )
+{
+ ppi_params_t *params = malloc( sizeof *params );
+ char *portname = strdup( port );
+ parport_t *parport = malloc( sizeof *parport );
+ port_node_t *node = malloc( sizeof *node );
+
+ if (!node || !parport || !params || !portname) {
+ free( node );
+ free( parport );
+ free( params );
+ free( portname );
+ return NULL;
+ }
+
+ params->portname = portname;
+ params->fd = -1;
+
+ parport->params = params;
+ parport->driver = &ppi_parport_driver;
+ parport->cable = NULL;
+
+ node->port = parport;
+ node->next = ports;
+
+ ports = node;
+
+ return parport;
+}
+
+static void
+ppi_parport_free( parport_t *port )
+{
+ port_node_t **prev;
+
+ for (prev = &ports; *prev; prev = &((*prev)->next))
+ if ((*prev)->port == port)
+ break;
+
+ if (*prev) {
+ port_node_t *pn = *prev;
+ *prev = pn->next;
+ free( pn );
+ }
+
+ free( ((ppi_params_t *) port->params)->portname );
+ free( port->params );
+ free( port );
+}
+
+static cable_t *
+ppi_connect( const char **par, int parnum )
+{
+ port_node_t *pn;
+ parport_t *parport;
+
+ if (parnum != 1) {
+ printf( _("Syntax error!\n") );
+ return NULL;
+ }
+
+ for (pn = ports; pn; pn = pn->next)
+ if (strcmp( pn->port->params, par[0] ) == 0) {
+ printf( _("Disconnecting %s from ppi port %s\n"), _(pn->port->cable->driver->description), par[0] );
+ pn->port->cable->driver->disconnect( pn->port->cable );
+ break;
+ }
+
+ printf( _("Initializing on ppi port %s\n"), par[0] );
+
+ parport = ppi_parport_alloc( par[0] );
+ if (!parport) {
+ printf( _("%s(%d) Out of memory.\n"), __FILE__, __LINE__ );
+ return NULL;
+ }
+
+ return parport;
+}
+
+static int
+ppi_open( parport_t *parport )
+{
+ ppi_params_t *p = parport->params;
+
+ p->fd = open( p->portname, O_RDWR );
+ if (p->fd < 0)
+ return -1;
+
+ return 0;
+}
+
+static int
+ppi_close( parport_t *parport )
+{
+ int r = 0;
+ ppi_params_t *p = parport->params;
+
+ if (close( p->fd ) != 0)
+ return -1;
+
+ p->fd = -1;
+ return r;
+}
+
+static int
+ppi_set_data( parport_t *parport, uint8_t data )
+{
+ ppi_params_t *p = parport->params;
+
+ if (ioctl( p->fd, PPISDATA, &data ) == -1)
+ return -1;
+
+ return 0;
+}
+
+static int
+ppi_get_data( parport_t *parport )
+{
+ unsigned char d;
+ ppi_params_t *p = parport->params;
+
+ if (ioctl( p->fd, PPIGDATA, &d ) == -1)
+ return -1;
+
+ return d;
+}
+
+static int
+ppi_get_status( parport_t *parport )
+{
+ unsigned char d;
+ ppi_params_t *p = parport->params;
+
+ if (ioctl( p->fd, PPIGSTATUS, &d ) == -1)
+ return -1;
+
+ return d ^ 0x80; /* BUSY is inverted */
+}
+
+static int
+ppi_set_control( parport_t *parport, uint8_t data )
+{
+ ppi_params_t *p = parport->params;
+
+ data ^= 0x0B; /* SELECT, AUTOFD, and STROBE are inverted */
+
+ if (ioctl( p->fd, PPIGCTRL, &data ) == -1)
+ return -1;
+
+ return 0;
+}
+
+parport_driver_t ppi_parport_driver = {
+ "ppi",
+ ppi_connect,
+ ppi_parport_free,
+ ppi_open,
+ ppi_close,
+ ppi_set_data,
+ ppi_get_data,
+ ppi_get_status,
+ ppi_set_control
+};
+
+#endif /* HAVE_DEV_PPBUS_PPI_H */
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2002, 2003 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2002, 2003.
+ *
+ */
+
+#include <stdlib.h>
+#include <string.h>
+
+#include "register.h"
+
+tap_register *
+register_alloc( int len )
+{
+ tap_register *tr;
+
+ if (len < 1)
+ return NULL;
+
+ tr = malloc( sizeof (tap_register) );
+ if (!tr)
+ return NULL;
+
+ tr->data = malloc( len );
+ if (!tr->data) {
+ free( tr );
+ return NULL;
+ }
+
+ memset(tr->data, 0, len);
+
+ tr->string = malloc( len + 1 );
+ if (!tr->string) {
+ free( tr->data );
+ free( tr );
+ return NULL;
+ }
+
+ tr->len = len;
+ tr->string[len] = '\0';
+
+ return tr;
+}
+
+tap_register *
+register_duplicate( const tap_register *tr )
+{
+ if (!tr)
+ return NULL;
+
+ return register_init( register_alloc( tr->len ), register_get_string( tr ) );
+}
+
+void
+register_free( tap_register *tr )
+{
+ if (tr) {
+ free( tr->data );
+ free( tr->string );
+ }
+ free( tr );
+}
+
+tap_register *
+register_fill( tap_register *tr, int val )
+{
+ if (tr)
+ memset( tr->data, val & 1, tr->len );
+
+ return tr;
+}
+
+const char *
+register_get_string( const tap_register *tr )
+{
+ int i;
+
+ if (!tr)
+ return NULL;
+
+ for (i = 0; i < tr->len; i++)
+ tr->string[tr->len - 1 - i] = (tr->data[i] & 1) ? '1' : '0';
+
+ return tr->string;
+}
+
+int
+register_all_bits_same_value ( const tap_register *tr )
+{
+ int i, value;
+ if (!tr) return -1;
+ if (tr->len < 0) return -1;
+
+ /* Return -1 if any of the bits in the register
+ * differs from the others; the value otherwise. */
+
+ value = tr->data[0] & 1;
+
+ for(i=1; i<tr->len; i++)
+ {
+ if((tr->data[i] & 1) != value) return -1;
+ }
+ return value;
+}
+
+tap_register *
+register_init( tap_register *tr, const char *value )
+{
+ int i;
+
+ const char *p;
+
+ if (!value || !tr)
+ return tr;
+
+ p = strchr( value, '\0' );
+
+ for (i = 0; i < tr->len; i++) {
+ if (p == value)
+ tr->data[i] = 0;
+ else {
+ p--;
+ tr->data[i] = (*p == '0') ? 0 : 1;
+ }
+ }
+
+ return tr;
+}
+
+int
+register_compare( const tap_register *tr, const tap_register *tr2 )
+{
+ int i;
+
+ if (!tr && !tr2)
+ return 0;
+
+ if (!tr || !tr2)
+ return 1;
+
+ if (tr->len != tr2->len)
+ return 1;
+
+ for (i = 0; i < tr->len; i++)
+ if (tr->data[i] != tr2->data[i])
+ return 1;
+
+ return 0;
+}
+
+int
+register_match( const tap_register *tr, const char *expr )
+{
+ int i;
+ const char *s;
+
+ if (!tr || !expr || (tr->len != strlen( expr )))
+ return 0;
+
+ s = register_get_string( tr );
+
+ for (i = 0; i < tr->len; i++)
+ if ((expr[i] != '?') && (expr[i] != s[i]))
+ return 0;
+
+ return 1;
+}
+
+tap_register *
+register_inc( tap_register *tr )
+{
+ int i;
+
+ if (!tr)
+ return NULL;
+
+ for (i = 0; i < tr->len; i++) {
+ tr->data[i] ^= 1;
+
+ if (tr->data[i] == 1)
+ break;
+ }
+
+ return tr;
+}
+
+tap_register *
+register_dec( tap_register *tr )
+{
+ int i;
+
+ if (!tr)
+ return NULL;
+
+ for (i = 0; i < tr->len; i++) {
+ tr->data[i] ^= 1;
+
+ if (tr->data[i] == 0)
+ break;
+ }
+
+ return tr;
+}
+
+tap_register *
+register_shift_right( tap_register *tr, int shift )
+{
+ int i;
+
+ if (!tr)
+ return NULL;
+
+ if (shift < 1)
+ return tr;
+
+ for (i = 0; i < tr->len; i++) {
+ if (i + shift < tr->len)
+ tr->data[i] = tr->data[i + shift];
+ else
+ tr->data[i] = 0;
+ }
+
+ return tr;
+}
+
+tap_register *
+register_shift_left( tap_register *tr, int shift )
+{
+ int i;
+
+ if (!tr)
+ return NULL;
+
+ if (shift < 1)
+ return tr;
+
+ for (i = tr->len - 1; i >= 0; i--) {
+ if (i - shift >= 0)
+ tr->data[i] = tr->data[i - shift];
+ else
+ tr->data[i] = 0;
+ }
+
+ return tr;
+}
--- /dev/null
+/*
+ * $Id$
+ *
+ * TAP state handling
+ * Copyright (C) 2002 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2002.
+ *
+ */
+
+#include "state.h"
+#include "chain.h"
+
+int
+tap_state( chain_t *chain )
+{
+ return chain->state;
+}
+
+int
+tap_state_init( chain_t *chain )
+{
+ return chain->state = Unknown_State;
+}
+
+int
+tap_state_done( chain_t *chain )
+{
+ return chain->state = Unknown_State;
+}
+
+int
+tap_state_reset( chain_t *chain )
+{
+ return chain->state = Test_Logic_Reset;
+}
+
+int
+tap_state_set_trst( chain_t *chain, int old_trst, int new_trst )
+{
+ old_trst = old_trst ? 1 : 0;
+ new_trst = new_trst ? 1 : 0;
+
+ if (old_trst != new_trst) {
+ if (new_trst)
+ chain->state = Test_Logic_Reset;
+ else
+ chain->state = Unknown_State;
+ }
+
+ return chain->state;
+}
+
+int
+tap_state_clock( chain_t *chain, int tms )
+{
+ if (tms) {
+ switch (chain->state) {
+ case Test_Logic_Reset:
+ break;
+ case Run_Test_Idle:
+ case Update_DR:
+ case Update_IR:
+ chain->state = Select_DR_Scan;
+ break;
+ case Select_DR_Scan:
+ chain->state = Select_IR_Scan;
+ break;
+ case Capture_DR:
+ case Shift_DR:
+ chain->state = Exit1_DR;
+ break;
+ case Exit1_DR:
+ case Exit2_DR:
+ chain->state = Update_DR;
+ break;
+ case Pause_DR:
+ chain->state = Exit2_DR;
+ break;
+ case Select_IR_Scan:
+ chain->state = Test_Logic_Reset;
+ break;
+ case Capture_IR:
+ case Shift_IR:
+ chain->state = Exit1_IR;
+ break;
+ case Exit1_IR:
+ case Exit2_IR:
+ chain->state = Update_IR;
+ break;
+ case Pause_IR:
+ chain->state = Exit2_IR;
+ break;
+ default:
+ chain->state = Unknown_State;
+ break;
+ }
+ } else {
+ switch (chain->state) {
+ case Test_Logic_Reset:
+ case Run_Test_Idle:
+ case Update_DR:
+ case Update_IR:
+ chain->state = Run_Test_Idle;
+ break;
+ case Select_DR_Scan:
+ chain->state = Capture_DR;
+ break;
+ case Capture_DR:
+ case Shift_DR:
+ case Exit2_DR:
+ chain->state = Shift_DR;
+ break;
+ case Exit1_DR:
+ case Pause_DR:
+ chain->state = Pause_DR;
+ break;
+ case Select_IR_Scan:
+ chain->state = Capture_IR;
+ break;
+ case Capture_IR:
+ case Shift_IR:
+ case Exit2_IR:
+ chain->state = Shift_IR;
+ break;
+ case Exit1_IR:
+ case Pause_IR:
+ chain->state = Pause_IR;
+ break;
+ default:
+ chain->state = Unknown_State;
+ break;
+ }
+ }
+
+ return chain->state;
+}
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2002 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2002.
+ *
+ */
+
+#include "sysdep.h"
+
+#include <stdio.h>
+
+#include "register.h"
+#include "tap.h"
+#include "state.h"
+#include "chain.h"
+
+void
+tap_reset( chain_t *chain )
+{
+ tap_state_reset( chain );
+
+ chain_clock( chain, 1, 0, 5 ); /* Test-Logic-Reset */
+ chain_clock( chain, 0, 0, 1 ); /* Run-Test/Idle */
+}
+
+void
+tap_reset_bypass( chain_t *chain )
+{
+ tap_reset( chain );
+
+ /* set all parts in the chain to BYPASS instruction if the total
+ instruction register length of the chain is already known */
+ if (chain->total_instr_len > 0) {
+ tap_register *ir = register_fill( register_alloc( chain->total_instr_len ), 1 );
+ if (!ir) {
+ printf( _("out of memory\n") );
+ return;
+ }
+
+ tap_capture_ir( chain );
+ tap_shift_register( chain, ir, NULL, EXITMODE_IDLE );
+ register_free( ir );
+
+ parts_set_instruction( chain->parts, "BYPASS" );
+ }
+}
+
+void
+tap_defer_shift_register( chain_t *chain, const tap_register *in, tap_register *out, int tap_exit )
+{
+ int i;
+
+ if (!(tap_state( chain ) & TAPSTAT_SHIFT))
+ printf( _("%s: Invalid state: %2X\n"), "tap_shift_register", tap_state( chain ) );
+
+ /* Capture-DR, Capture-IR, Shift-DR, Shift-IR, Exit2-DR or Exit2-IR state */
+ if (tap_state( chain ) & TAPSTAT_CAPTURE)
+ chain_defer_clock( chain, 0, 0, 1 ); /* save last TDO bit :-) */
+
+ i = in->len;
+ if (tap_exit) i--;
+ if(out && out->len < i) i = out->len;
+
+ if(out)
+ cable_defer_transfer( chain->cable, i, in->data, out->data );
+ else
+ cable_defer_transfer( chain->cable, i, in->data, NULL );
+
+ for (; i < in->len; i++) {
+ if (out != NULL && (i < out->len))
+ out->data[i] = cable_defer_get_tdo( chain->cable );
+ chain_defer_clock( chain, (tap_exit != EXITMODE_SHIFT && ((i + 1) == in->len)) ? 1 : 0, in->data[i], 1 ); /* Shift (& Exit1) */
+ }
+
+ /* Shift-DR, Shift-IR, Exit1-DR or Exit1-IR state */
+ if (tap_exit == EXITMODE_IDLE) {
+ chain_defer_clock( chain, 1, 0, 1 ); /* Update-DR or Update-IR */
+ chain_defer_clock( chain, 0, 0, 1 ); /* Run-Test/Idle */
+ } else if (tap_exit == EXITMODE_UPDATE)
+ chain_defer_clock( chain, 1, 0, 1 ); /* Update-DR or Update-IR */
+}
+
+void
+tap_shift_register_output( chain_t *chain, const tap_register *in, tap_register *out, int tap_exit )
+{
+ if(out != NULL)
+ {
+ int j;
+
+ j = in->len;
+ if (tap_exit) j--;
+ if(out && out->len < j) j = out->len;
+
+ /* Asking for the result of the cable transfer
+ * actually flushes the queue */
+
+ (void)cable_transfer_late( chain->cable, out->data );
+ for (; j < in->len && j < out->len; j++)
+ out->data[j] = cable_get_tdo_late( chain->cable );
+ }
+}
+
+void
+tap_shift_register( chain_t *chain, const tap_register *in, tap_register *out, int tap_exit )
+{
+ tap_defer_shift_register( chain, in, out, tap_exit );
+ tap_shift_register_output( chain, in, out, tap_exit );
+}
+
+void
+tap_capture_dr( chain_t *chain )
+{
+ if ((tap_state( chain ) & (TAPSTAT_RESET | TAPSTAT_IDLE)) != TAPSTAT_IDLE)
+ printf( _("%s: Invalid state: %2X\n"), "tap_capture_dr", tap_state( chain ) );
+
+ /* Run-Test/Idle or Update-DR or Update-IR state */
+ chain_defer_clock( chain, 1, 0, 1 ); /* Select-DR-Scan */
+ chain_defer_clock( chain, 0, 0, 1 ); /* Capture-DR */
+}
+
+void
+tap_capture_ir( chain_t *chain )
+{
+ if ((tap_state( chain ) & (TAPSTAT_RESET | TAPSTAT_IDLE)) != TAPSTAT_IDLE)
+ printf( _("%s: Invalid state: %2X\n"), "tap_capture_ir", tap_state( chain ) );
+
+ /* Run-Test/Idle or Update-DR or Update-IR state */
+ chain_defer_clock( chain, 1, 0, 2 ); /* Select-DR-Scan, then Select-IR-Scan */
+ chain_defer_clock( chain, 0, 0, 1 ); /* Capture-IR */
+}
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2008 K. Waschk
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Kolja Waschk <kawk>, 2008
+ *
+ */
+
+#include "sysdep.h"
+
+#include <strings.h>
+
+#include "usbconn.h"
+
+#ifdef HAVE_LIBUSB
+extern usbconn_driver_t usbconn_libusb_driver;
+#endif /* HAVE_LIBUSB */
+#ifdef ENABLE_LOWLEVEL_FTD2XX
+extern usbconn_driver_t usbconn_ftd2xx_driver;
+extern usbconn_driver_t usbconn_ftd2xx_mpsse_driver;
+#endif /* ENABLE_LOWLEVEL_FTD2XX */
+#ifdef ENABLE_LOWLEVEL_FTDI
+extern usbconn_driver_t usbconn_ftdi_driver;
+extern usbconn_driver_t usbconn_ftdi_mpsse_driver;
+#endif /* ENABLE_LOWLEVEL_FTDI */
+
+usbconn_driver_t *usbconn_drivers[] = {
+#ifdef HAVE_LIBUSB
+ &usbconn_libusb_driver,
+#endif /* HAVE_LIBUSB */
+#ifdef ENABLE_LOWLEVEL_FTD2XX
+ &usbconn_ftd2xx_driver,
+ &usbconn_ftd2xx_mpsse_driver,
+#endif /* ENABLE_LOWLEVEL_FTD2XX */
+#ifdef ENABLE_LOWLEVEL_FTDI
+ &usbconn_ftdi_driver,
+ &usbconn_ftdi_mpsse_driver,
+#endif /* ENABLE_LOWLEVEL_FTDI */
+ NULL /* last must be NULL */
+};
+
+int
+usbconn_open( usbconn_t *conn )
+{
+ return conn->driver->open( conn );
+}
+
+int
+usbconn_close( usbconn_t *conn )
+{
+ return conn->driver->close( conn );
+}
+
+int
+usbconn_read( usbconn_t *conn, uint8_t *buf, int len )
+{
+ if (conn->driver->read)
+ return conn->driver->read( conn, buf, len );
+ else
+ return 0;
+}
+
+int
+usbconn_write( usbconn_t *conn, uint8_t *buf, int len, int recv )
+{
+ if (conn->driver->write)
+ return conn->driver->write( conn, buf, len, recv );
+ else
+ return 0;
+}
--- /dev/null
+/*
+ * $Id$
+ *
+ * Link driver for accessing FTDI devices via libftd2xx
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Arnim Laeuger, 2008
+ *
+ */
+
+#include "sysdep.h"
+
+#include <fcntl.h>
+#if __CYGWIN__ || __MINGW32__
+#include <windows.h>
+#endif
+#include <stdio.h>
+#include <string.h>
+#ifdef HAVE_STROPTS_H
+#include <stropts.h>
+#endif
+#include <stdlib.h>
+#include <stdint.h>
+#include <unistd.h>
+
+#include <ftd2xx.h>
+
+#include "cable.h"
+#include "usbconn.h"
+#include "usbconn/libftdx.h"
+
+
+/* enables debug output */
+#undef DEBUG
+#ifdef DEBUG
+static const char *module = "usbconn_ftd2xx_";
+#endif
+
+
+typedef struct {
+ /* USB device information */
+ unsigned int vid;
+ unsigned int pid;
+ FT_HANDLE fc;
+ char *serial;
+ /* send and receive buffer handling */
+ uint32_t send_buf_len;
+ uint32_t send_buffered;
+ uint8_t *send_buf;
+ uint32_t recv_buf_len;
+ uint32_t to_recv;
+ uint32_t recv_write_idx;
+ uint32_t recv_read_idx;
+ uint8_t *recv_buf;
+} ftd2xx_param_t;
+
+usbconn_driver_t usbconn_ftd2xx_driver;
+usbconn_driver_t usbconn_ftd2xx_mpsse_driver;
+
+static int usbconn_ftd2xx_common_open( usbconn_t *conn, int printerr );
+static void usbconn_ftd2xx_free( usbconn_t *conn );
+
+/* ---------------------------------------------------------------------- */
+
+static int
+usbconn_ftd2xx_flush( ftd2xx_param_t *p )
+{
+ FT_STATUS status;
+ DWORD xferred;
+ DWORD recvd = 0;
+
+ if (!p->fc)
+ return -1;
+
+#ifdef DEBUG
+ printf( "%sflush begin:\n", module );
+ printf( " send_buf_len %d, send_buffered %d\n", p->send_buf_len, p->send_buffered );
+ printf( " recv_buf_len %d, to_recv %d\n", p->recv_buf_len, p->to_recv );
+ printf( " recv_write_idx %d, recv_read_idx %d\n", p->recv_write_idx, p->recv_read_idx );
+#endif
+
+ if (p->send_buffered == 0)
+ return 0;
+
+ if ((status = FT_Write( p->fc, p->send_buf, p->send_buffered, &xferred )) != FT_OK)
+ printf( _("%s(): FT_Write() failed.\n"), __FUNCTION__ );
+
+ if (xferred < p->send_buffered)
+ {
+ printf( _("%s(): Written fewer bytes than requested.\n"), __FUNCTION__ );
+ return -1;
+ }
+
+ p->send_buffered = 0;
+
+ /* now read all scheduled receive bytes */
+ if (p->to_recv)
+ {
+ if (p->recv_write_idx + p->to_recv > p->recv_buf_len)
+ {
+ /* extend receive buffer */
+ p->recv_buf_len = p->recv_write_idx + p->to_recv;
+ if (p->recv_buf)
+ p->recv_buf = (uint8_t *)realloc( p->recv_buf, p->recv_buf_len );
+ }
+
+ if (!p->recv_buf)
+ {
+ printf( _("%s(): Receive buffer does not exist.\n"), __FUNCTION__ );
+ return -1;
+ }
+
+ while (recvd == 0)
+ if ((status = FT_Read( p->fc, &(p->recv_buf[p->recv_write_idx]),
+ p->to_recv, &recvd )) != FT_OK)
+ printf( _("%s(): Error from FT_Read(): %d\n"),
+ __FUNCTION__, (int)status );
+
+ if (recvd < p->to_recv)
+ printf( _("%s(): Received less bytes than requested.\n"), __FUNCTION__ );
+
+ p->to_recv -= recvd;
+ p->recv_write_idx += recvd;
+ }
+
+#ifdef DEBUG
+ printf( "%sflush end: status %ld, xferred %ld, recvd %ld\n", module, status, xferred, recvd );
+#endif
+ return status != FT_OK ? -1 : xferred;
+}
+
+/* ---------------------------------------------------------------------- */
+
+static int
+usbconn_ftd2xx_read( usbconn_t *conn, uint8_t *buf, int len )
+{
+ ftd2xx_param_t *p = conn->params;
+ int cpy_len;
+ FT_STATUS status = FT_OK;
+ DWORD recvd = 0;
+
+#ifdef DEBUG
+ printf( "%sread begin: len %d\n", module, len );
+#endif
+
+ if (!p->fc)
+ return -1;
+
+ /* flush send buffer to get all scheduled receive bytes */
+ if (usbconn_ftd2xx_flush( p ) < 0)
+ return -1;
+
+ if (len == 0)
+ return 0;
+
+ /* check for number of remaining bytes in receive buffer */
+ cpy_len = p->recv_write_idx - p->recv_read_idx;
+ if (cpy_len > len)
+ cpy_len = len;
+ len -= cpy_len;
+
+ if (cpy_len > 0)
+ {
+ /* get data from the receive buffer */
+ memcpy( buf, &(p->recv_buf[p->recv_read_idx]), cpy_len );
+ p->recv_read_idx += cpy_len;
+ if (p->recv_read_idx == p->recv_write_idx)
+ p->recv_read_idx = p->recv_write_idx = 0;
+ }
+
+ if (len > 0)
+ {
+ /* need to get more data directly from the device */
+ while (recvd == 0)
+ if ((status = FT_Read( p->fc, &(buf[cpy_len]), len, &recvd )) != FT_OK)
+ printf( _("%s(): Error from FT_Read(): %d\n"), __FUNCTION__,
+ (int)status );
+ }
+
+#ifdef DEBUG
+ printf( "%sread end : status %ld, length %d\n", module, status, cpy_len+len );
+#endif
+ return status != FT_OK ? -1 : cpy_len + len;
+}
+
+/* ---------------------------------------------------------------------- */
+
+static int
+usbconn_ftd2xx_write( usbconn_t *conn, uint8_t *buf, int len, int recv )
+{
+ ftd2xx_param_t *p = conn->params;
+ int xferred = 0;
+
+ if (!p->fc)
+ return -1;
+
+#ifdef DEBUG
+ printf( "%swrite begin: len %d, recv %d\n", module, len, recv );
+#endif
+
+ /* this write function will try to buffer write data
+ buffering will be ceased and a flush triggered in two cases. */
+
+ /* Case A: max number of scheduled receive bytes will be exceeded
+ with this write
+ Case B: max number of scheduled send bytes has been reached */
+ if ((p->to_recv + recv > FTD2XX_MAXRECV)
+ || ((p->send_buffered > FTDX_MAXSEND) && (p->to_recv == 0)))
+ xferred = usbconn_ftd2xx_flush( p );
+
+ if (xferred < 0)
+ return -1;
+
+ /* now buffer this write */
+ if (p->send_buffered + len > p->send_buf_len)
+ {
+ p->send_buf_len = p->send_buffered + len;
+ if (p->send_buf)
+ p->send_buf = (uint8_t *)realloc( p->send_buf, p->send_buf_len);
+ }
+
+ if (p->send_buf)
+ {
+ memcpy( &(p->send_buf[p->send_buffered]), buf, len );
+ p->send_buffered += len;
+ if (recv > 0)
+ p->to_recv += recv;
+
+ if (recv < 0)
+ {
+ /* immediate write requested, so flush the buffered data */
+ xferred = usbconn_ftd2xx_flush( p );
+ }
+
+#ifdef DEBUG
+ printf( "%swrite end: xferred %d\n", module, xferred );
+#endif
+ return xferred < 0 ? -1 : len;
+ }
+ else
+ {
+ printf( _("%s(): Send buffer does not exist.\n"), __FUNCTION__ );
+ return -1;
+ }
+}
+
+/* ---------------------------------------------------------------------- */
+
+usbconn_t *
+usbconn_ftd2xx_connect( const char **param, int paramc, usbconn_cable_t *template )
+{
+ usbconn_t *c = malloc( sizeof( usbconn_t ) );
+ ftd2xx_param_t *p = malloc( sizeof( ftd2xx_param_t ) );
+
+ if (p)
+ {
+ p->send_buf_len = FTDX_MAXSEND;
+ p->send_buffered = 0;
+ p->send_buf = (uint8_t *)malloc( p->send_buf_len );
+ p->recv_buf_len = FTD2XX_MAXRECV;
+ p->to_recv = 0;
+ p->recv_write_idx = 0;
+ p->recv_read_idx = 0;
+ p->recv_buf = (uint8_t *)malloc( p->recv_buf_len );
+ }
+
+ if (!p || !c || !p->send_buf || !p->recv_buf)
+ {
+ printf( _("Out of memory\n") );
+ if (p->send_buf)
+ free( p->send_buf );
+ if (p->recv_buf)
+ free( p->recv_buf );
+ if (p)
+ free( p );
+ if (c)
+ free( c );
+ return NULL;
+ }
+
+ p->fc = NULL;
+ p->pid = template->pid;
+ p->vid = template->vid;
+ p->serial = template->desc ? strdup( template->desc ) : NULL;
+
+ c->params = p;
+ c->driver = &usbconn_ftd2xx_driver;
+ c->cable = NULL;
+
+ /* do a test open with the specified cable paramters,
+ there's no other way to detect the presence of the specified
+ USB device */
+ if (usbconn_ftd2xx_common_open( c, 0 ) != 0)
+ {
+ usbconn_ftd2xx_free( c );
+ return NULL;
+ }
+ FT_Close( p->fc );
+
+ printf( _("Connected to libftd2xx driver.\n") );
+
+ return c;
+}
+
+
+usbconn_t *
+usbconn_ftd2xx_mpsse_connect( const char **param, int paramc, usbconn_cable_t *template )
+{
+ usbconn_t *conn = usbconn_ftd2xx_connect( param, paramc, template );
+
+ if (conn)
+ conn->driver = &usbconn_ftd2xx_mpsse_driver;
+
+ return conn;
+}
+
+
+/* ---------------------------------------------------------------------- */
+
+static int
+usbconn_ftd2xx_common_open( usbconn_t *conn, int printerr )
+{
+ ftd2xx_param_t *p = conn->params;
+ FT_STATUS status;
+
+#if !__CYGWIN__ && !__MINGW32__
+ /* Add non-standard Vid/Pid to the linux driver */
+ if ((status = FT_SetVIDPID( p->vid, p->pid )) != FT_OK)
+ fprintf( stderr, "Warning: couldn't add %4.4x:%4.4x", p->vid, p->pid );
+#endif
+
+ /* try various methods to open a FTDI device */
+ if (p->serial)
+ {
+ /* serial number/description is specified */
+
+ /* first try to match against the serial string */
+ status = FT_OpenEx( p->serial, FT_OPEN_BY_SERIAL_NUMBER, &(p->fc) );
+
+ if (status != FT_OK)
+ /* then try to match against the description string */
+ status = FT_OpenEx( p->serial, FT_OPEN_BY_DESCRIPTION, &(p->fc) );
+ }
+ else
+ /* give it a plain try */
+ status = FT_Open( 0, &(p->fc) );
+
+ if (status != FT_OK)
+ {
+ if (printerr)
+ printf( "Unable to open FTDI device.\n" );
+ /* mark ftd2xx layer as not initialized */
+ p->fc = NULL;
+ return -1;
+ }
+
+ return 0;
+}
+
+/* ---------------------------------------------------------------------- */
+
+static int
+usbconn_ftd2xx_open( usbconn_t *conn )
+{
+ ftd2xx_param_t *p = conn->params;
+ FT_HANDLE fc;
+ FT_STATUS status;
+
+ if (usbconn_ftd2xx_common_open( conn, 1 ) < 0)
+ return -1;
+
+ fc = p->fc;
+
+ if ((status = FT_ResetDevice( fc )) != FT_OK)
+ printf( _("%s(): Can't reset device.\n"), __FUNCTION__ );
+ if (status == FT_OK) if ((status = FT_Purge( fc, FT_PURGE_RX )) != FT_OK)
+ printf( _("%s(): Can't purge RX buffer.\n"), __FUNCTION__ );
+
+ if (status == FT_OK) if ((status = FT_SetLatencyTimer(fc, 2)) != FT_OK)
+ printf( _("%s(): Can't set latency timer.\n"), __FUNCTION__ );
+
+ if (status == FT_OK) if ((status = FT_SetBaudRate(fc, 3E6)) != FT_OK)
+ printf( _("%s(): Can't set baudrate.\n"), __FUNCTION__ );
+
+ if (status != FT_OK)
+ {
+ FT_Close( fc );
+ /* mark ftdi layer as not initialized */
+ p->fc = NULL;
+ }
+
+ return status != FT_OK ? -1 : 0;
+}
+
+/* ---------------------------------------------------------------------- */
+
+static int
+usbconn_ftd2xx_mpsse_open( usbconn_t *conn )
+{
+ ftd2xx_param_t *p = conn->params;
+ FT_HANDLE fc;
+ FT_STATUS status;
+
+ if (usbconn_ftd2xx_common_open( conn, 1 ) < 0)
+ return -1;
+
+ fc = p->fc;
+
+ /* This sequence might seem weird and containing superfluous stuff.
+ However, it's built after the description of JTAG_InitDevice
+ Ref. FTCJTAGPG10.pdf
+ Intermittent problems will occur when certain steps are skipped. */
+ if ((status = FT_ResetDevice( fc )) != FT_OK)
+ printf( _("%s(): Can't reset device.\n"), __FUNCTION__ );
+ if (status == FT_OK) if ((status = FT_Purge( fc, FT_PURGE_RX )) != FT_OK)
+ printf( _("%s(): Can't purge RX buffer.\n"), __FUNCTION__ );
+
+ if (status == FT_OK) if ((status = FT_SetUSBParameters( fc, FTDX_MAXSEND_MPSSE, FTDX_MAXSEND_MPSSE )) != FT_OK)
+ printf( _("%s(): Can't set USB parameters.\n"), __FUNCTION__ );
+
+ if (status == FT_OK) if ((status = FT_SetChars( fc, 0, 0, 0, 0 )) != FT_OK)
+ printf( _("%s(): Can't set special characters.\n"), __FUNCTION__ );
+
+ /* set a reasonable latency timer value
+ if this value is too low then the chip will send intermediate result data
+ in short packets (suboptimal performance) */
+ if (status == FT_OK) if ((status = FT_SetLatencyTimer( fc, 16 )) != FT_OK)
+ printf( _("%s(): Can't set target latency timer.\n"), __FUNCTION__ );
+
+ if (status == FT_OK) if ((status = FT_SetBitMode( fc, 0x0b, 0x02 /* BITMODE_MPSSE */ )) != FT_OK)
+ printf( _("%s(): Can't set MPSSE bitmode.\n"), __FUNCTION__ );
+
+ if (status == FT_OK) if ((status = FT_ResetDevice( fc )) != FT_OK)
+ printf( _("%s(): Can't reset device.\n"), __FUNCTION__ );
+ if (status == FT_OK) if ((status = FT_Purge( fc, FT_PURGE_RX )) != FT_OK)
+ printf( _("%s(): Can't purge RX buffer.\n"), __FUNCTION__ );
+
+ /* set TCK Divisor */
+ if (status == FT_OK)
+ {
+ uint8_t buf[3] = {0x86, 0x00, 0x00};
+ if (usbconn_ftd2xx_write( conn, buf, 3, 0 ) < 0)
+ status = FT_OTHER_ERROR;
+ }
+ /* switch off loopback */
+ if (status == FT_OK)
+ {
+ uint8_t buf[1] = {0x85};
+ if (usbconn_ftd2xx_write( conn, buf, 1, 0 ) < 0)
+ status = FT_OTHER_ERROR;
+ }
+ if (status == FT_OK)
+ if (usbconn_ftd2xx_read( conn, NULL, 0 ) < 0)
+ status = FT_OTHER_ERROR;
+
+ if (status == FT_OK) if ((status = FT_ResetDevice( fc )) != FT_OK)
+ printf( _("%s(): Can't reset device.\n"), __FUNCTION__ );
+ if (status == FT_OK) if ((status = FT_Purge( fc, FT_PURGE_RX )) != FT_OK)
+ printf( _("%s(): Can't purge RX buffer.\n"), __FUNCTION__ );
+
+ if (status != FT_OK)
+ {
+ FT_Close( fc );
+ /* mark ftdi layer as not initialized */
+ p->fc = NULL;
+ }
+
+ return status != FT_OK ? -1 : 0;
+}
+
+/* ---------------------------------------------------------------------- */
+
+static int
+usbconn_ftd2xx_close( usbconn_t *conn )
+{
+ ftd2xx_param_t *p = conn->params;
+
+ if (p->fc)
+ {
+ FT_Close( p->fc );
+ p->fc = NULL;
+ }
+
+ return 0;
+}
+
+/* ---------------------------------------------------------------------- */
+
+static void
+usbconn_ftd2xx_free( usbconn_t *conn )
+{
+ ftd2xx_param_t *p = conn->params;
+
+ if (p->send_buf)
+ free( p->send_buf );
+ if (p->recv_buf)
+ free( p->recv_buf );
+ if (p->serial)
+ free( p->serial );
+
+ free( conn->params );
+ free( conn );
+}
+
+/* ---------------------------------------------------------------------- */
+
+usbconn_driver_t usbconn_ftd2xx_driver = {
+ "ftd2xx",
+ usbconn_ftd2xx_connect,
+ usbconn_ftd2xx_free,
+ usbconn_ftd2xx_open,
+ usbconn_ftd2xx_close,
+ usbconn_ftd2xx_read,
+ usbconn_ftd2xx_write
+};
+
+usbconn_driver_t usbconn_ftd2xx_mpsse_driver = {
+ "ftd2xx-mpsse",
+ usbconn_ftd2xx_mpsse_connect,
+ usbconn_ftd2xx_free,
+ usbconn_ftd2xx_mpsse_open,
+ usbconn_ftd2xx_close,
+ usbconn_ftd2xx_read,
+ usbconn_ftd2xx_write
+};
+
+
+/*
+ Local Variables:
+ mode:C
+ c-default-style:gnu
+ indent-tabs-mode:nil
+ End:
+*/
--- /dev/null
+/*
+ * $Id$
+ *
+ * Link driver for accessing FTDI devices via libftdi
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Arnim Laeuger, 2008
+ *
+ */
+
+#include "sysdep.h"
+
+#include <fcntl.h>
+#if __CYGWIN__ || __MINGW32__
+#include <windows.h>
+#endif
+#include <stdio.h>
+#include <string.h>
+#ifdef HAVE_STROPTS_H
+#include <stropts.h>
+#endif
+#include <stdlib.h>
+#include <stdint.h>
+#include <unistd.h>
+
+#include <ftdi.h>
+
+#include "cable.h"
+#include "usbconn.h"
+#include "usbconn/libftdx.h"
+
+typedef struct {
+ /* USB device information */
+ unsigned int vid;
+ unsigned int pid;
+ struct ftdi_context *fc;
+ char *serial;
+ /* send and receive buffer handling */
+ uint32_t send_buf_len;
+ uint32_t send_buffered;
+ uint8_t *send_buf;
+ uint32_t recv_buf_len;
+ uint32_t to_recv;
+ uint32_t recv_write_idx;
+ uint32_t recv_read_idx;
+ uint8_t *recv_buf;
+} ftdi_param_t;
+
+usbconn_driver_t usbconn_ftdi_driver;
+usbconn_driver_t usbconn_ftdi_mpsse_driver;
+
+static int usbconn_ftdi_common_open( usbconn_t *conn, int printerr );
+static void usbconn_ftdi_free( usbconn_t *conn );
+
+/* ---------------------------------------------------------------------- */
+
+static int
+usbconn_ftdi_flush( ftdi_param_t *p )
+{
+ int xferred;
+ int recvd = 0;
+
+ if (!p->fc)
+ return -1;
+
+ if (p->send_buffered == 0)
+ return 0;
+
+ if ((xferred = ftdi_write_data( p->fc, p->send_buf, p->send_buffered )) < 0)
+ printf( _("%s(): ftdi_write_data() failed: %s\n"),
+ __FUNCTION__, ftdi_get_error_string( p->fc ) );
+
+ if (xferred < p->send_buffered)
+ {
+ printf( _("%s(): Written fewer bytes than requested.\n"), __FUNCTION__ );
+ return -1;
+ }
+
+ p->send_buffered = 0;
+
+ /* now read all scheduled receive bytes */
+ if (p->to_recv)
+ {
+ if (p->recv_write_idx + p->to_recv > p->recv_buf_len)
+ {
+ /* extend receive buffer */
+ p->recv_buf_len = p->recv_write_idx + p->to_recv;
+ if (p->recv_buf)
+ p->recv_buf = (uint8_t *)realloc( p->recv_buf, p->recv_buf_len );
+ }
+
+ if (!p->recv_buf)
+ {
+ printf( _("%s(): Receive buffer does not exist.\n"), __FUNCTION__ );
+ return -1;
+ }
+
+ while (recvd == 0)
+ if ((recvd = ftdi_read_data( p->fc, &(p->recv_buf[p->recv_write_idx]),
+ p->to_recv )) < 0)
+ printf( _("%s(): Error from ftdi_read_data(): %s\n"),
+ __FUNCTION__, ftdi_get_error_string( p->fc ) );
+
+ if (recvd < p->to_recv)
+ printf( _("%s(): Received less bytes than requested.\n"),
+ __FUNCTION__ );
+
+ p->to_recv -= recvd;
+ p->recv_write_idx += recvd;
+ }
+
+ return xferred < 0 ? -1 : xferred;
+}
+
+/* ---------------------------------------------------------------------- */
+
+static int
+usbconn_ftdi_read( usbconn_t *conn, uint8_t *buf, int len )
+{
+ ftdi_param_t *p = conn->params;
+ int cpy_len;
+ int recvd = 0;
+
+ if (!p->fc)
+ return -1;
+
+ /* flush send buffer to get all scheduled receive bytes */
+ if (usbconn_ftdi_flush( p ) < 0)
+ return -1;
+
+ if (len == 0)
+ return 0;
+
+ /* check for number of remaining bytes in receive buffer */
+ cpy_len = p->recv_write_idx - p->recv_read_idx;
+ if (cpy_len > len)
+ cpy_len = len;
+ len -= cpy_len;
+
+ if (cpy_len > 0)
+ {
+ /* get data from the receive buffer */
+ memcpy( buf, &(p->recv_buf[p->recv_read_idx]), cpy_len );
+ p->recv_read_idx += cpy_len;
+ if (p->recv_read_idx == p->recv_write_idx)
+ p->recv_read_idx = p->recv_write_idx = 0;
+ }
+
+ if (len > 0)
+ {
+ /* need to get more data directly from the device */
+ while (recvd == 0)
+ if ((recvd = ftdi_read_data( p->fc, &(buf[cpy_len]), len )) < 0)
+ printf( _("%s(): Error from ftdi_read_data(): %s\n"),
+ __FUNCTION__, ftdi_get_error_string( p->fc ) );
+ }
+
+ return recvd < 0 ? -1 : cpy_len + len;
+}
+
+/* ---------------------------------------------------------------------- */
+
+static int
+usbconn_ftdi_write( usbconn_t *conn, uint8_t *buf, int len, int recv )
+{
+ ftdi_param_t *p = conn->params;
+ int xferred = 0;
+
+ if (!p->fc)
+ return -1;
+
+ /* this write function will try to buffer write data
+ buffering will be ceased and a flush triggered in two cases. */
+
+ /* Case A: max number of scheduled receive bytes will be exceeded
+ with this write
+ Case B: max number of scheduled send bytes has been reached */
+ if ((p->to_recv + recv > FTDI_MAXRECV)
+ || ((p->send_buffered > FTDX_MAXSEND) && (p->to_recv == 0)))
+ xferred = usbconn_ftdi_flush( p );
+
+ if (xferred < 0)
+ return -1;
+
+ /* now buffer this write */
+ if (p->send_buffered + len > p->send_buf_len)
+ {
+ p->send_buf_len = p->send_buffered + len;
+ if (p->send_buf)
+ p->send_buf = (uint8_t *)realloc( p->send_buf, p->send_buf_len);
+ }
+
+ if (p->send_buf)
+ {
+ memcpy( &(p->send_buf[p->send_buffered]), buf, len );
+ p->send_buffered += len;
+ if (recv > 0)
+ p->to_recv += recv;
+
+ if (recv < 0)
+ {
+ /* immediate write requested, so flush the buffered data */
+ xferred = usbconn_ftdi_flush( p );
+ }
+
+ return xferred < 0 ? -1 : len;
+ }
+ else
+ {
+ printf( _("%s(): Send buffer does not exist.\n"), __FUNCTION__ );
+ return -1;
+ }
+}
+
+/* ---------------------------------------------------------------------- */
+
+usbconn_t *
+usbconn_ftdi_connect( const char **param, int paramc, usbconn_cable_t *template )
+{
+ usbconn_t *c = malloc( sizeof( usbconn_t ) );
+ ftdi_param_t *p = malloc( sizeof( ftdi_param_t ) );
+ struct ftdi_context *fc = malloc( sizeof( struct ftdi_context ) );
+
+ if (p)
+ {
+ p->send_buf_len = FTDX_MAXSEND;
+ p->send_buffered = 0;
+ p->send_buf = (uint8_t *)malloc( p->send_buf_len );
+ p->recv_buf_len = FTDI_MAXRECV;
+ p->to_recv = 0;
+ p->recv_write_idx = 0;
+ p->recv_read_idx = 0;
+ p->recv_buf = (uint8_t *)malloc( p->recv_buf_len );
+ }
+
+ if (!p || !c || !fc || !p->send_buf || !p->recv_buf)
+ {
+ printf( _("Out of memory\n") );
+ if (p->send_buf)
+ free( p->send_buf );
+ if (p->recv_buf)
+ free( p->recv_buf );
+ if (p)
+ free( p );
+ if (c)
+ free( c );
+ if (fc)
+ free( fc );
+ return NULL;
+ }
+
+ ftdi_init( fc );
+ p->fc = fc;
+ p->pid = template->pid;
+ p->vid = template->vid;
+ p->serial = template->desc ? strdup( template->desc ) : NULL;
+
+ c->params = p;
+ c->driver = &usbconn_ftdi_driver;
+ c->cable = NULL;
+
+ /* do a test open with the specified cable paramters,
+ alternatively we could use libusb to detect the presence of the
+ specified USB device */
+ if (usbconn_ftdi_common_open( c, 0 ) != 0)
+ {
+ usbconn_ftdi_free( c );
+ return NULL;
+ }
+ ftdi_usb_close( fc );
+
+ printf( _("Connected to libftdi driver.\n") );
+
+ return c;
+}
+
+
+usbconn_t *
+usbconn_ftdi_mpsse_connect( const char **param, int paramc, usbconn_cable_t *template )
+{
+ usbconn_t *conn = usbconn_ftdi_connect( param, paramc, template );
+
+ if (conn)
+ conn->driver = &usbconn_ftdi_mpsse_driver;
+
+ return conn;
+}
+
+
+/* ---------------------------------------------------------------------- */
+
+static int
+usbconn_ftdi_common_open( usbconn_t *conn, int printerr )
+{
+ ftdi_param_t *p = conn->params;
+ struct ftdi_context *fc = p->fc;
+ int status;
+
+ /* use command line string for desc= as serial number and try to
+ open a matching device */
+ status = ftdi_usb_open_desc( fc, p->vid, p->pid, NULL, p->serial );
+ if (status < 0)
+ /* try again with matching the string against the description */
+ status = ftdi_usb_open_desc( fc, p->vid, p->pid, p->serial, NULL );
+
+ if (status < 0)
+ {
+ /* device not found == -3 */
+ if (printerr || (status != -3))
+ printf( _("%s() failed: %s\n"), __FUNCTION__,
+ ftdi_get_error_string( fc ) );
+ ftdi_deinit( fc );
+ /* mark ftdi layer as not initialized */
+ p->fc = NULL;
+
+ /* TODO: disconnect? */
+ return -1;
+ }
+
+ return 0;
+}
+
+/* ---------------------------------------------------------------------- */
+
+#undef LIBFTDI_UNIMPLEMENTED
+
+static int
+seq_purge( struct ftdi_context *fc, int purge_rx, int purge_tx )
+{
+ int r;
+ unsigned char buf;
+
+#ifndef LIBFTDI_UNIMPLEMENTED
+ if ((r = ftdi_usb_purge_buffers( fc )) < 0)
+ printf( _("%s(): ftdi_usb_purge_buffers() failed: %s\n"),
+ __FUNCTION__, ftdi_get_error_string( fc ) );
+ if (r >= 0) if ((r = ftdi_read_data( fc, &buf, 1 )) < 0)
+ printf( _("%s(): ftdi_read_data() failed: %s\n"),
+ __FUNCTION__, ftdi_get_error_string( fc ) );
+#else /* not yet available */
+ {
+ int rx_loop;
+
+ if (purge_rx)
+ for (rx_loop = 0; (rx_loop < 6) && (r >= 0); rx_loop++)
+ if ((r = ftdi_usb_purge_rx_buffer( fc )) < 0)
+ printf( _("%s(): ftdi_usb_purge_rx_buffer() failed: %s\n"),
+ __FUNCTION__, ftdi_get_error_string( fc ) );
+
+ if (purge_tx)
+ if (r >= 0) if ((r = ftdi_usb_purge_tx_buffer( fc )) < 0)
+ printf( _("%s(): ftdi_usb_purge_tx_buffer() failed: %s\n"),
+ __FUNCTION__, ftdi_get_error_string( fc ) );
+ if (r >= 0) if ((r = ftdi_read_data( fc, &buf, 1 )) < 0)
+ printf( _("%s(): ftdi_read_data() failed: %s\n"),
+ __FUNCTION__, ftdi_get_error_string( fc ) );
+ }
+#endif
+
+ return r < 0 ? -1 : 0;
+}
+
+static int
+seq_reset( struct ftdi_context *fc )
+{
+ int r;
+
+#ifdef LIBFTDI_UNIMPLEMENTED /* not yet available */
+ {
+ unsigned short status;
+ if ((r = ftdi_poll_status( fc, &status )) < 0)
+ printf( _("%s(): ftdi_poll_status() failed: %s\n"),
+ __FUNCTION__, ftdi_get_error_string( fc ) );
+ }
+#endif
+ if ((r = ftdi_usb_reset( fc )) < 0)
+ printf( _("%s(): ftdi_usb_reset() failed: %s\n"),
+ __FUNCTION__, ftdi_get_error_string( fc ) );
+
+ if (r >= 0) r = seq_purge( fc, 1, 1 );
+ return r < 0 ? -1 : 0;
+}
+
+/* ---------------------------------------------------------------------- */
+
+static int
+usbconn_ftdi_open( usbconn_t *conn )
+{
+ ftdi_param_t *p = conn->params;
+ struct ftdi_context *fc = p->fc;
+ int r;
+
+ if (usbconn_ftdi_common_open( conn, 1 ) < 0)
+ return -1;
+
+ r = seq_reset( fc );
+ if (r >= 0) r = seq_purge( fc, 1, 0 );
+
+ if (r >= 0) if ((r = ftdi_set_latency_timer( fc, 2 )) < 0)
+ printf( _("%s(): ftdi_set_latency_timer() failed: %s\n"),
+ __FUNCTION__, ftdi_get_error_string( fc ) );
+
+#if 0
+ /* libftdi 0.6 doesn't allow high baudrates, so we send the control
+ message outselves */
+ if (r >= 0) if (usb_control_msg( fc->usb_dev, 0x40, 3, 1, 0, NULL, 0, fc->usb_write_timeout ) != 0)
+ {
+ printf( "Can't set max baud rate.\n" );
+ r = -1;
+ }
+#else
+ if (r >= 0) if ((r = ftdi_set_baudrate( fc, 3E6 )) < 0)
+ printf( _("%s(): ftdi_set_baudrate() failed: %s\n"),
+ __FUNCTION__, ftdi_get_error_string( fc ) );
+#endif
+
+ if (r < 0)
+ {
+ ftdi_usb_close( fc );
+ ftdi_deinit( fc );
+ /* mark ftdi layer as not initialized */
+ p->fc = NULL;
+ }
+
+ return r < 0 ? -1 : 0;
+}
+
+/* ---------------------------------------------------------------------- */
+
+static int
+usbconn_ftdi_mpsse_open( usbconn_t *conn )
+{
+ ftdi_param_t *p = conn->params;
+ struct ftdi_context *fc = p->fc;
+ int r;
+
+ if (usbconn_ftdi_common_open( conn, 1 ) < 0)
+ return -1;
+
+ /* This sequence might seem weird and containing superfluous stuff.
+ However, it's built after the description of JTAG_InitDevice
+ Ref. FTCJTAGPG10.pdf
+ Intermittent problems will occur when certain steps are skipped. */
+ r = seq_reset( fc );
+ if (r >= 0) r = seq_purge( fc, 1, 0 );
+
+ if (r >= 0) if ((r = ftdi_write_data_set_chunksize( fc, FTDX_MAXSEND_MPSSE )) < 0)
+ puts( ftdi_get_error_string( fc ) );
+ if (r >= 0) if ((r = ftdi_read_data_set_chunksize( fc, FTDX_MAXSEND_MPSSE )) < 0)
+ puts( ftdi_get_error_string( fc ) );
+
+#ifdef LIBFTDI_UNIMPLEMENTED
+ if (r >= 0) if ((r = ftdi_set_event_char( fc, 0, 0 )) < 0)
+ puts( ftdi_get_error_string( fc ) );
+ if (r >= 0) if ((r = ftdi_set_error_char( fc, 0, 0 )) < 0)
+ puts( ftdi_get_error_string( fc ) );
+#endif
+
+ /* set a reasonable latency timer value
+ if this value is too low then the chip will send intermediate result data
+ in short packets (suboptimal performance) */
+ if (r >= 0) if ((r = ftdi_set_latency_timer( fc, 16 )) < 0)
+ printf( _("%s(): ftdi_set_latency_timer() failed: %s\n"),
+ __FUNCTION__, ftdi_get_error_string( fc ) );
+
+ if (r >= 0) if ((r = ftdi_set_bitmode( fc, 0x0b, BITMODE_MPSSE )) < 0)
+ printf( _("%s(): ftdi_set_bitmode() failed: %s\n"),
+ __FUNCTION__, ftdi_get_error_string( fc ) );
+
+ if (r >= 0) if ((r = ftdi_usb_reset( fc )) < 0)
+ printf( _("%s(): ftdi_usb_reset() failed: %s\n"),
+ __FUNCTION__, ftdi_get_error_string( fc ) );
+ if (r >= 0) r = seq_purge( fc, 1, 0 );
+
+ /* set TCK Divisor */
+ if (r >= 0)
+ {
+ uint8_t buf[3] = {TCK_DIVISOR, 0x00, 0x00};
+ r = usbconn_ftdi_write( conn, buf, 3, 0 );
+ }
+ /* switch off loopback */
+ if (r >= 0)
+ {
+ uint8_t buf[1] = {LOOPBACK_END};
+ r = usbconn_ftdi_write( conn, buf, 1, 0 );
+ }
+ if (r >= 0) r = usbconn_ftdi_read( conn, NULL, 0 );
+
+ if (r >= 0) if ((r = ftdi_usb_reset( fc )) < 0)
+ printf( _("%s(): ftdi_usb_reset() failed: %s\n"),
+ __FUNCTION__, ftdi_get_error_string( fc ) );
+ if (r >= 0) r = seq_purge( fc, 1, 0 );
+
+ if (r < 0)
+ {
+ ftdi_usb_close( fc );
+ ftdi_deinit( fc );
+ /* mark ftdi layer as not initialized */
+ p->fc = NULL;
+ }
+
+ return r < 0 ? -1 : 0;
+}
+
+/* ---------------------------------------------------------------------- */
+
+static int
+usbconn_ftdi_close( usbconn_t *conn )
+{
+ ftdi_param_t *p = conn->params;
+
+ if (p->fc)
+ {
+ ftdi_usb_close( p->fc );
+ ftdi_deinit( p->fc );
+ p->fc = NULL;
+ }
+
+ return 0;
+}
+
+/* ---------------------------------------------------------------------- */
+
+static void
+usbconn_ftdi_free( usbconn_t *conn )
+{
+ ftdi_param_t *p = conn->params;
+
+ if (p->send_buf)
+ free( p->send_buf );
+ if (p->recv_buf)
+ free( p->recv_buf );
+ if (p->fc)
+ free( p->fc );
+ if (p->serial)
+ free( p->serial );
+
+ free( conn->params );
+ free( conn );
+}
+
+/* ---------------------------------------------------------------------- */
+
+usbconn_driver_t usbconn_ftdi_driver = {
+ "ftdi",
+ usbconn_ftdi_connect,
+ usbconn_ftdi_free,
+ usbconn_ftdi_open,
+ usbconn_ftdi_close,
+ usbconn_ftdi_read,
+ usbconn_ftdi_write
+};
+
+usbconn_driver_t usbconn_ftdi_mpsse_driver = {
+ "ftdi-mpsse",
+ usbconn_ftdi_mpsse_connect,
+ usbconn_ftdi_free,
+ usbconn_ftdi_mpsse_open,
+ usbconn_ftdi_close,
+ usbconn_ftdi_read,
+ usbconn_ftdi_write
+};
+
+
+/*
+ Local Variables:
+ mode:C
+ c-default-style:gnu
+ indent-tabs-mode:nil
+ End:
+*/
--- /dev/null
+/*
+ * $Id$
+ *
+ * Link driver for accessing USB devices via libusb
+ *
+ * Copyright (C) 2008 K. Waschk
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Kolja Waschk, 2008
+ *
+ */
+
+#include "sysdep.h"
+
+#ifdef HAVE_LIBUSB
+
+#include <fcntl.h>
+#if __CYGWIN__ || __MINGW32__
+#include <windows.h>
+#endif
+#include <stdio.h>
+#include <string.h>
+#ifdef HAVE_STROPTS_H
+#include <stropts.h>
+#endif
+#include <stdlib.h>
+#include <stdint.h>
+#include <unistd.h>
+#include <usb.h>
+
+#include "parport.h"
+#include "cable.h"
+#include "usbconn.h"
+
+typedef struct {
+ struct usb_device *dev;
+ struct usb_dev_handle *handle;
+} libusb_param_t;
+
+usbconn_driver_t usbconn_libusb_driver;
+
+/* ---------------------------------------------------------------------- */
+
+static int
+libusb_match_desc(struct usb_device *dev, char *desc)
+{
+ int r = 0;
+ char buf[256];
+ usb_dev_handle *handle;
+
+ if(desc == NULL) return 1;
+
+ handle = usb_open(dev);
+ if(handle == NULL)
+ {
+ perror("libusb: usb_open() failed");
+ return 0;
+ }
+ if(dev->descriptor.iManufacturer)
+ {
+ r = usb_get_string_simple(handle, dev->descriptor.iManufacturer, buf, sizeof(buf));
+ if(r > 0)
+ {
+ if(strstr(buf, desc) == NULL) r = 0;
+ }
+ }
+ if(r <= 0 && dev->descriptor.iProduct)
+ {
+ r = usb_get_string_simple(handle, dev->descriptor.iProduct, buf, sizeof(buf));
+ if(r > 0)
+ {
+ if(strstr(buf, desc) == NULL) r = 0;
+ }
+ }
+ if(r <= 0 && dev->descriptor.iSerialNumber)
+ {
+ r = usb_get_string_simple(handle, dev->descriptor.iSerialNumber, buf, sizeof(buf));
+ if(r > 0)
+ {
+ if(strstr(buf, desc) == NULL) r = 0;
+ }
+ }
+ usb_close(handle);
+ return r > 0 ? 1 : 0;
+}
+
+
+/* ---------------------------------------------------------------------- */
+
+usbconn_t *
+usbconn_libusb_connect( const char **param, int paramc, usbconn_cable_t *template )
+{
+ struct usb_bus *bus;
+ struct usb_device *found_dev = NULL;
+ usbconn_t *libusb_conn;
+ libusb_param_t *libusb_params;
+
+ usb_init();
+ if(usb_find_busses()<0)
+ {
+ perror("libusb: usb_find_busses failed");
+ return NULL;
+ }
+ if(usb_find_devices()<0)
+ {
+ perror("libusb: usb_find_devices failed");
+ return NULL;
+ }
+
+ for (bus = usb_get_busses(); bus && !found_dev; bus = bus->next)
+ {
+ struct usb_device *dev;
+
+ for (dev = bus->devices; dev && !found_dev; dev = dev->next)
+ {
+ if(((template->vid<0)||(dev->descriptor.idVendor == template->vid))
+ &&((template->pid<0)||(dev->descriptor.idProduct == template->pid)))
+ {
+ if(libusb_match_desc(dev, template->desc))
+ {
+ found_dev = dev;
+ }
+ }
+ }
+ }
+
+ if(!found_dev)
+ {
+ return NULL;
+ }
+
+ libusb_conn = malloc( sizeof(usbconn_t) );
+ libusb_params = malloc(sizeof(libusb_param_t));
+ if(libusb_params == NULL || libusb_conn == NULL)
+ {
+ printf(_("Out of memory\n"));
+ if (libusb_params)
+ free(libusb_params);
+ if (libusb_conn)
+ free(libusb_conn);
+ return NULL;
+ }
+
+ libusb_params->dev = found_dev;
+ libusb_params->handle = NULL;
+ libusb_conn->params = libusb_params;
+ libusb_conn->driver = &usbconn_libusb_driver;
+ libusb_conn->cable = NULL;
+
+ return libusb_conn;
+}
+
+
+/* ---------------------------------------------------------------------- */
+
+static int
+usbconn_libusb_open( usbconn_t *conn )
+{
+ libusb_param_t *p = conn->params;
+
+ p->handle = usb_open(p->dev);
+ if(p->handle == NULL)
+ {
+ perror("libusb: usb_open() failed");
+ }
+ else
+ {
+#if 1
+ usb_set_configuration(p->handle,
+ p->dev->config[0].bConfigurationValue);
+#endif
+ if(usb_claim_interface(p->handle, 0) != 0)
+ {
+ perror("libusb: usb_claim_interface failed");
+ usb_close(p->handle);
+ p->handle = NULL;
+ }
+#if 1
+ else
+ {
+ usb_set_altinterface(p->handle, 0);
+ }
+#endif
+ }
+
+ if(p->handle == NULL)
+ {
+ /* TODO: disconnect? */
+ return -1;
+ }
+
+ return 0;
+}
+
+/* ---------------------------------------------------------------------- */
+
+static int
+usbconn_libusb_close( usbconn_t *conn )
+{
+ libusb_param_t *p = conn->params;
+ if(p->handle != NULL)
+ {
+ usb_release_interface(p->handle, 0);
+ usb_close(p->handle);
+ }
+ p->handle = NULL;
+ return 0;
+}
+
+/* ---------------------------------------------------------------------- */
+
+static void
+usbconn_libusb_free( usbconn_t *conn )
+{
+ free( conn->params );
+ free( conn );
+}
+
+/* ---------------------------------------------------------------------- */
+
+usbconn_driver_t usbconn_libusb_driver = {
+ "libusb",
+ usbconn_libusb_connect,
+ usbconn_libusb_free,
+ usbconn_libusb_open,
+ usbconn_libusb_close,
+ NULL,
+ NULL
+};
+
+#endif /* HAVE_LIBUSB */
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2003 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2003.
+ *
+ */
+
+#ifndef SYSDEP_H
+#define SYSDEP_H
+
+#ifdef HAVE_CONFIG_H
+#include "config.h"
+#endif
+
+#include "gettext.h"
+#define _(s) gettext(s)
+#define N_(s) gettext_noop(s)
+#define P_(s,p,n) ngettext(s,p,n)
+
+#ifdef S_SPLINT_S
+#undef gettext
+#define gettext(s) s
+#undef gettext_noop
+#define gettext_noop(s) s
+#undef ngettext
+#define ngettext(s,p,n) s
+#endif
+
+#ifdef __MINGW32__
+#define _NO_W32_PSEUDO_MODIFIERS
+#include <windows.h>
+#define geteuid() 0
+#define getuid() 0
+/* Microsoft uses a different swprintf() than ISO C requires */
+#include <stdio.h>
+#define swprintf _snwprintf
+#endif
+
+#endif /* SYSDEP_H */
--- /dev/null
+config.rpath
+mkinstalldirs
--- /dev/null
+autom4te*.cache
+aclocal.m4
+config.log
+config.status
+configure
+configure.lineno
+Makefile.in
+Makefile
+COPYING
+INSTALL
+ABOUT-NLS
+m4
+config.h
+config.h.in
+stamp-h1
+libtool
--- /dev/null
+#
+# general globs
+#
+*~
+*.o
+*.lo
+*.la
+
+#
+# debugging files
+#
+core
+.gdb_history
+.gbdinit
+
+#
+# patch related files
+#
+*.orig
+*.rej
+*.patch
+
+#
+# general autotool files
+#
+.deps
+.libs
+Makefile
+Makefile.in
+
+#
+# specific autotool files
+#
+/ABOUT-NLS
+/aclocal.m4
+/autom4te.cache
+/config.h
+/config.h.in
+/config.log
+/config.status
+/configure
+/INSTALL
+/libtool
+/m4
+/stamp-h1
+/tools
+/include/urjtag/stamp-h2
+
+#
+# gettext (po) files
+#
+/po/Makefile.in.in
+/po/Makevars.template
+/po/POTFILES
+/po/Rules-quot
+/po/stamp-po
+/po/*.gmo
+/po/*.header
+/po/*.pot
+/po/*.sed
+/po/*.sin
+
+#
+# urjtag generated files
+#
+/include/urjtag/urjtag.h
+/src/apps/bsdl2jtag/bsdl2jtag
+/src/apps/jtag/jtag
+/src/bsdl/bsdl_bison.c
+/src/bsdl/bsdl_bison.h
+/src/bsdl/bsdl_config.h
+/src/bsdl/bsdl_flex.c
+/src/bsdl/vhdl_bison.c
+/src/bsdl/vhdl_bison.h
+/src/bsdl/vhdl_flex.c
+/src/svf/svf_bison.c
+/src/svf/svf_bison.h
+/src/svf/svf_flex.c
--- /dev/null
+Arnim Läuger <arniml@users.sourceforge.net>, Kolja Waschk <kawk>
+
+A major part of the of UrJTAG 0.6 originally comes from the openwince JTAG
+Tools which are written by Marcel Telka <marcel@telka.sk>. Many lines of
+code have been contributed by further numerous developers, see THANKS.
+
+
+
--- /dev/null
+ GNU GENERAL PUBLIC LICENSE
+ Version 2, June 1991
+
+ Copyright (C) 1989, 1991 Free Software Foundation, Inc.,
+ 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
+ Everyone is permitted to copy and distribute verbatim copies
+ of this license document, but changing it is not allowed.
+
+ Preamble
+
+ The licenses for most software are designed to take away your
+freedom to share and change it. By contrast, the GNU General Public
+License is intended to guarantee your freedom to share and change free
+software--to make sure the software is free for all its users. This
+General Public License applies to most of the Free Software
+Foundation's software and to any other program whose authors commit to
+using it. (Some other Free Software Foundation software is covered by
+the GNU Lesser General Public License instead.) You can apply it to
+your programs, too.
+
+ When we speak of free software, we are referring to freedom, not
+price. Our General Public Licenses are designed to make sure that you
+have the freedom to distribute copies of free software (and charge for
+this service if you wish), that you receive source code or can get it
+if you want it, that you can change the software or use pieces of it
+in new free programs; and that you know you can do these things.
+
+ To protect your rights, we need to make restrictions that forbid
+anyone to deny you these rights or to ask you to surrender the rights.
+These restrictions translate to certain responsibilities for you if you
+distribute copies of the software, or if you modify it.
+
+ For example, if you distribute copies of such a program, whether
+gratis or for a fee, you must give the recipients all the rights that
+you have. You must make sure that they, too, receive or can get the
+source code. And you must show them these terms so they know their
+rights.
+
+ We protect your rights with two steps: (1) copyright the software, and
+(2) offer you this license which gives you legal permission to copy,
+distribute and/or modify the software.
+
+ Also, for each author's protection and ours, we want to make certain
+that everyone understands that there is no warranty for this free
+software. If the software is modified by someone else and passed on, we
+want its recipients to know that what they have is not the original, so
+that any problems introduced by others will not reflect on the original
+authors' reputations.
+
+ Finally, any free program is threatened constantly by software
+patents. We wish to avoid the danger that redistributors of a free
+program will individually obtain patent licenses, in effect making the
+program proprietary. To prevent this, we have made it clear that any
+patent must be licensed for everyone's free use or not licensed at all.
+
+ The precise terms and conditions for copying, distribution and
+modification follow.
+
+ GNU GENERAL PUBLIC LICENSE
+ TERMS AND CONDITIONS FOR COPYING, DISTRIBUTION AND MODIFICATION
+
+ 0. This License applies to any program or other work which contains
+a notice placed by the copyright holder saying it may be distributed
+under the terms of this General Public License. The "Program", below,
+refers to any such program or work, and a "work based on the Program"
+means either the Program or any derivative work under copyright law:
+that is to say, a work containing the Program or a portion of it,
+either verbatim or with modifications and/or translated into another
+language. (Hereinafter, translation is included without limitation in
+the term "modification".) Each licensee is addressed as "you".
+
+Activities other than copying, distribution and modification are not
+covered by this License; they are outside its scope. The act of
+running the Program is not restricted, and the output from the Program
+is covered only if its contents constitute a work based on the
+Program (independent of having been made by running the Program).
+Whether that is true depends on what the Program does.
+
+ 1. You may copy and distribute verbatim copies of the Program's
+source code as you receive it, in any medium, provided that you
+conspicuously and appropriately publish on each copy an appropriate
+copyright notice and disclaimer of warranty; keep intact all the
+notices that refer to this License and to the absence of any warranty;
+and give any other recipients of the Program a copy of this License
+along with the Program.
+
+You may charge a fee for the physical act of transferring a copy, and
+you may at your option offer warranty protection in exchange for a fee.
+
+ 2. You may modify your copy or copies of the Program or any portion
+of it, thus forming a work based on the Program, and copy and
+distribute such modifications or work under the terms of Section 1
+above, provided that you also meet all of these conditions:
+
+ a) You must cause the modified files to carry prominent notices
+ stating that you changed the files and the date of any change.
+
+ b) You must cause any work that you distribute or publish, that in
+ whole or in part contains or is derived from the Program or any
+ part thereof, to be licensed as a whole at no charge to all third
+ parties under the terms of this License.
+
+ c) If the modified program normally reads commands interactively
+ when run, you must cause it, when started running for such
+ interactive use in the most ordinary way, to print or display an
+ announcement including an appropriate copyright notice and a
+ notice that there is no warranty (or else, saying that you provide
+ a warranty) and that users may redistribute the program under
+ these conditions, and telling the user how to view a copy of this
+ License. (Exception: if the Program itself is interactive but
+ does not normally print such an announcement, your work based on
+ the Program is not required to print an announcement.)
+
+These requirements apply to the modified work as a whole. If
+identifiable sections of that work are not derived from the Program,
+and can be reasonably considered independent and separate works in
+themselves, then this License, and its terms, do not apply to those
+sections when you distribute them as separate works. But when you
+distribute the same sections as part of a whole which is a work based
+on the Program, the distribution of the whole must be on the terms of
+this License, whose permissions for other licensees extend to the
+entire whole, and thus to each and every part regardless of who wrote it.
+
+Thus, it is not the intent of this section to claim rights or contest
+your rights to work written entirely by you; rather, the intent is to
+exercise the right to control the distribution of derivative or
+collective works based on the Program.
+
+In addition, mere aggregation of another work not based on the Program
+with the Program (or with a work based on the Program) on a volume of
+a storage or distribution medium does not bring the other work under
+the scope of this License.
+
+ 3. You may copy and distribute the Program (or a work based on it,
+under Section 2) in object code or executable form under the terms of
+Sections 1 and 2 above provided that you also do one of the following:
+
+ a) Accompany it with the complete corresponding machine-readable
+ source code, which must be distributed under the terms of Sections
+ 1 and 2 above on a medium customarily used for software interchange; or,
+
+ b) Accompany it with a written offer, valid for at least three
+ years, to give any third party, for a charge no more than your
+ cost of physically performing source distribution, a complete
+ machine-readable copy of the corresponding source code, to be
+ distributed under the terms of Sections 1 and 2 above on a medium
+ customarily used for software interchange; or,
+
+ c) Accompany it with the information you received as to the offer
+ to distribute corresponding source code. (This alternative is
+ allowed only for noncommercial distribution and only if you
+ received the program in object code or executable form with such
+ an offer, in accord with Subsection b above.)
+
+The source code for a work means the preferred form of the work for
+making modifications to it. For an executable work, complete source
+code means all the source code for all modules it contains, plus any
+associated interface definition files, plus the scripts used to
+control compilation and installation of the executable. However, as a
+special exception, the source code distributed need not include
+anything that is normally distributed (in either source or binary
+form) with the major components (compiler, kernel, and so on) of the
+operating system on which the executable runs, unless that component
+itself accompanies the executable.
+
+If distribution of executable or object code is made by offering
+access to copy from a designated place, then offering equivalent
+access to copy the source code from the same place counts as
+distribution of the source code, even though third parties are not
+compelled to copy the source along with the object code.
+
+ 4. You may not copy, modify, sublicense, or distribute the Program
+except as expressly provided under this License. Any attempt
+otherwise to copy, modify, sublicense or distribute the Program is
+void, and will automatically terminate your rights under this License.
+However, parties who have received copies, or rights, from you under
+this License will not have their licenses terminated so long as such
+parties remain in full compliance.
+
+ 5. You are not required to accept this License, since you have not
+signed it. However, nothing else grants you permission to modify or
+distribute the Program or its derivative works. These actions are
+prohibited by law if you do not accept this License. Therefore, by
+modifying or distributing the Program (or any work based on the
+Program), you indicate your acceptance of this License to do so, and
+all its terms and conditions for copying, distributing or modifying
+the Program or works based on it.
+
+ 6. Each time you redistribute the Program (or any work based on the
+Program), the recipient automatically receives a license from the
+original licensor to copy, distribute or modify the Program subject to
+these terms and conditions. You may not impose any further
+restrictions on the recipients' exercise of the rights granted herein.
+You are not responsible for enforcing compliance by third parties to
+this License.
+
+ 7. If, as a consequence of a court judgment or allegation of patent
+infringement or for any other reason (not limited to patent issues),
+conditions are imposed on you (whether by court order, agreement or
+otherwise) that contradict the conditions of this License, they do not
+excuse you from the conditions of this License. If you cannot
+distribute so as to satisfy simultaneously your obligations under this
+License and any other pertinent obligations, then as a consequence you
+may not distribute the Program at all. For example, if a patent
+license would not permit royalty-free redistribution of the Program by
+all those who receive copies directly or indirectly through you, then
+the only way you could satisfy both it and this License would be to
+refrain entirely from distribution of the Program.
+
+If any portion of this section is held invalid or unenforceable under
+any particular circumstance, the balance of the section is intended to
+apply and the section as a whole is intended to apply in other
+circumstances.
+
+It is not the purpose of this section to induce you to infringe any
+patents or other property right claims or to contest validity of any
+such claims; this section has the sole purpose of protecting the
+integrity of the free software distribution system, which is
+implemented by public license practices. Many people have made
+generous contributions to the wide range of software distributed
+through that system in reliance on consistent application of that
+system; it is up to the author/donor to decide if he or she is willing
+to distribute software through any other system and a licensee cannot
+impose that choice.
+
+This section is intended to make thoroughly clear what is believed to
+be a consequence of the rest of this License.
+
+ 8. If the distribution and/or use of the Program is restricted in
+certain countries either by patents or by copyrighted interfaces, the
+original copyright holder who places the Program under this License
+may add an explicit geographical distribution limitation excluding
+those countries, so that distribution is permitted only in or among
+countries not thus excluded. In such case, this License incorporates
+the limitation as if written in the body of this License.
+
+ 9. The Free Software Foundation may publish revised and/or new versions
+of the General Public License from time to time. Such new versions will
+be similar in spirit to the present version, but may differ in detail to
+address new problems or concerns.
+
+Each version is given a distinguishing version number. If the Program
+specifies a version number of this License which applies to it and "any
+later version", you have the option of following the terms and conditions
+either of that version or of any later version published by the Free
+Software Foundation. If the Program does not specify a version number of
+this License, you may choose any version ever published by the Free Software
+Foundation.
+
+ 10. If you wish to incorporate parts of the Program into other free
+programs whose distribution conditions are different, write to the author
+to ask for permission. For software which is copyrighted by the Free
+Software Foundation, write to the Free Software Foundation; we sometimes
+make exceptions for this. Our decision will be guided by the two goals
+of preserving the free status of all derivatives of our free software and
+of promoting the sharing and reuse of software generally.
+
+ NO WARRANTY
+
+ 11. BECAUSE THE PROGRAM IS LICENSED FREE OF CHARGE, THERE IS NO WARRANTY
+FOR THE PROGRAM, TO THE EXTENT PERMITTED BY APPLICABLE LAW. EXCEPT WHEN
+OTHERWISE STATED IN WRITING THE COPYRIGHT HOLDERS AND/OR OTHER PARTIES
+PROVIDE THE PROGRAM "AS IS" WITHOUT WARRANTY OF ANY KIND, EITHER EXPRESSED
+OR IMPLIED, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. THE ENTIRE RISK AS
+TO THE QUALITY AND PERFORMANCE OF THE PROGRAM IS WITH YOU. SHOULD THE
+PROGRAM PROVE DEFECTIVE, YOU ASSUME THE COST OF ALL NECESSARY SERVICING,
+REPAIR OR CORRECTION.
+
+ 12. IN NO EVENT UNLESS REQUIRED BY APPLICABLE LAW OR AGREED TO IN WRITING
+WILL ANY COPYRIGHT HOLDER, OR ANY OTHER PARTY WHO MAY MODIFY AND/OR
+REDISTRIBUTE THE PROGRAM AS PERMITTED ABOVE, BE LIABLE TO YOU FOR DAMAGES,
+INCLUDING ANY GENERAL, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES ARISING
+OUT OF THE USE OR INABILITY TO USE THE PROGRAM (INCLUDING BUT NOT LIMITED
+TO LOSS OF DATA OR DATA BEING RENDERED INACCURATE OR LOSSES SUSTAINED BY
+YOU OR THIRD PARTIES OR A FAILURE OF THE PROGRAM TO OPERATE WITH ANY OTHER
+PROGRAMS), EVEN IF SUCH HOLDER OR OTHER PARTY HAS BEEN ADVISED OF THE
+POSSIBILITY OF SUCH DAMAGES.
+
+ END OF TERMS AND CONDITIONS
+
+ How to Apply These Terms to Your New Programs
+
+ If you develop a new program, and you want it to be of the greatest
+possible use to the public, the best way to achieve this is to make it
+free software which everyone can redistribute and change under these terms.
+
+ To do so, attach the following notices to the program. It is safest
+to attach them to the start of each source file to most effectively
+convey the exclusion of warranty; and each file should have at least
+the "copyright" line and a pointer to where the full notice is found.
+
+ <one line to give the program's name and a brief idea of what it does.>
+ Copyright (C) <year> <name of author>
+
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 2 of the License, or
+ (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License along
+ with this program; if not, write to the Free Software Foundation, Inc.,
+ 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
+
+Also add information on how to contact you by electronic and paper mail.
+
+If the program is interactive, make it output a short notice like this
+when it starts in an interactive mode:
+
+ Gnomovision version 69, Copyright (C) year name of author
+ Gnomovision comes with ABSOLUTELY NO WARRANTY; for details type `show w'.
+ This is free software, and you are welcome to redistribute it
+ under certain conditions; type `show c' for details.
+
+The hypothetical commands `show w' and `show c' should show the appropriate
+parts of the General Public License. Of course, the commands you use may
+be called something other than `show w' and `show c'; they could even be
+mouse-clicks or menu items--whatever suits your program.
+
+You should also get your employer (if you work as a programmer) or your
+school, if any, to sign a "copyright disclaimer" for the program, if
+necessary. Here is a sample; alter the names:
+
+ Yoyodyne, Inc., hereby disclaims all copyright interest in the program
+ `Gnomovision' (which makes passes at compilers) written by James Hacker.
+
+ <signature of Ty Coon>, 1 April 1989
+ Ty Coon, President of Vice
+
+This General Public License does not permit incorporating your program into
+proprietary programs. If your program is a subroutine library, you may
+consider it more useful to permit linking proprietary applications with the
+library. If this is what you want to do, use the GNU Lesser General
+Public License instead of this License.
--- /dev/null
+2009-06-15 Arnim Laeuger <arniml>
+
+ * src/bus/mpc824x.c: experimental support for x16 mode, including help
+
+2009-06-13 Rutger Hofman <rfhh>
+
+ * include/urjtag/*.h: change all struct/enum definitions from
+ typedef struct urj_bla urj_bla_t into typedef struct URJ_BLA urj_bla_t
+ because swig otherwise generates name collisions
+ * Makefile.am, urjtag.i: add the dumbest possible swig target that generates
+ swig for everything referenced include/urjtag/urjtag.h. This might even
+ turn out to be useful once the API has been cleaned up.
+
+2009-06-11 Arnim Laeuger <arniml>
+
+ * src/bus/bf533_stamp.c: [ 2804509 ] bf533_stamp bus driver enchancement
+ (MURANAKA Masaki)
+
+2009-06-05 Rutger Hofman <rfhh>
+
+ * src/tap/cable.c: sanity check on driver device type at connect time
+ * have only /* style comments in the public includes, since that allows
+ a client app to compile with -ansi
+
+2009-06-08 Arnim Laeuger <arniml>
+
+ * src/tap/cable.c, src/tap/cable/minimal.c, src/tap/Makefile.am:
+ [ 2798198 ] The Minimal Parallel Port JTAG Cable (Yen Rui)
+
+ * data/MANUFACTURERS: commented manufacturer ARM
+ [ 2778313 ] Failed to detect ARM cores.
+
+ * MAINTAINERS: new
+
+2009-06-05 Rutger Hofman <rfhh>
+
+ * src/tap/cable/ts7800.c, src/tap/cable/vision_ep9307.c: make them compile
+ again
+
+2009-06-04 Arnim Laeuger <arniml>
+
+ * src/bsdl/bsdl_flex.l: force Base = DECIMAL for BOUNDARY_LENGTH attribute
+
+2009-06-04 Rutger Hofman <rfhh>
+
+ * src/tap/cable/*.c, src/tap/parport/*.c, src/tap/usbconn/*.c: return/handle
+ URJ_STATUS_OK/FAIL more correctly
+
+2009-06-02 Arnim Laeuger <arniml>
+
+ * src/cmd/cmd_initbus.c: use separate index variable for driver selection
+
+2009-06-01 Arnim Laeuger <arniml>
+
+ * src/bsdl/bsdl_sem.c, THANKS: Fix bsdl bit order and safe bit
+ (Jean-Christian de Rivaz)
+
+2009-06-01 Mike Frysinger <vapier@gentoo.org>
+
+ * src/bsdl/bsdl_sem.c: add missing "length" in display (Jean-Christian de
+ Rivaz)
+
+2009-05-28 Rutger Hofman <rfhh>
+
+ * include/urjtag/cmd.h, src/cmd/cmd.h: move defitions from public to private
+ include file because these parameter utilities are no longer used outside
+ cmd
+
+ * include/urjtag/usbconn/*.h: move to src/tap/usbconn/ because these are
+ actually internal include files
+
+2009-05-28 Rutger Hofman <rfhh>
+
+ * src/global/urjtag.c, src/global/Makefile.am: rename urjtag.c to
+ src/global/log-error.c
+
+ * src/global/params.c, src/global/Makefile.am, include/urjtag/params.h,
+ include/urjtag/Makefile.am: data structure for key/value pairs
+
+ * src/bus/*, include/urjtag/bus_driver.h, include/urjtag/bus.h,
+ src/cmd/cmd_initbus.c: have an API call initbus() that uses key/value
+ pairs to pass in options
+
+ * src/tap/cable.c, src/tap/parport.c, src/tap/usbconn.c, src/tap/cable/*,
+ src/tap/parport/*, src/tap/usbconn/*, include/urjtag/cable.h: have API
+ calls urj_tap_cable_parport_connect(), urj_tap_cable_usb_connect(),
+ urj_tap_cable_other_connect(); have a tagged union in the cable driver
+ that offers driver-specific connect() calls.
+
+ * src/cmd/cmd_cable.c, src/tap/cable/wiggler.c: the 4th wiggler argument,
+ the pin bitmap, is now a key/value parameter with key 'bitmap='.
+
+2009-05-28 Mike Frysinger <vapier@gentoo.org>
+
+ * configure.ac: improve svn rev look up by ignoring errors, unifying
+ duplicated code, and support git-svn tree
+
+ * src/tap/detect.c: if the part could not be found because the data file
+ could not be opened, then log an obvious error message
+
+ * src/cmd/cmd_debug.c: display current log level if no arguments specified
+
+2009-05-24 Rutger Hofman <rfhh>
+
+ * src/bus/avr32.c: fix uninitialized warning (Florian Fainelli)
+
+2009-05-26 Mike Frysinger <vapier@gentoo.org>
+
+ * src/tap/cable/xpc.c: fix crash when USB device is busy (Florian Fainelli)
+
+2009-05-26 Arnim Laeuger <arniml>
+
+ * src/bus/bf561_ezkit.c, src/bus/sharc21065l.c, src/bus/bf537_stamp.c,
+ src/bus/bf533_ezkit.c, src/bus/bf533_stamp.c, src/bus/ppc405ep.c,
+ src/bus/bf548_ezkit.c: keywords
+
+ * src/bus/bf533_stamp.c: manual fix of [ 2793104 ]
+
+2009-05-25 Arnim Laeuger <arniml>
+
+ * src/bus/bf533_stamp.c: [ 2793104 ] hidden bug? in bf533-stamp.c
+ (MURANAKA Masaki)
+
+2009-05-24 Rutger Hofman <rfhh>
+
+ * src/bus/readmem.c, src/bus/writemem.c, include/urjtag/bus.h,
+ src/cmd/cmd_readmem.c, src/cmd/cmd_writemem.c: readmem() and
+ writemem() now return an error condition. Patch up error handling
+ in readmem() and writemem().
+
+2009-05-23 Arnim Laeuger <arniml>
+
+ * src/bsdl/bsdl_msg.h, src/bsdl/vhdl_flex.l, src/bsdl/vhdl_bison.y,
+ src/bsdl/bsdl_flex.l, src/bsdl/bsdl_bison.y:
+ change some errors to fatals
+
+ * include/urjtag/error.h, src/global/urjtag.c,
+ src/apps/bsdl2jtag/bsdl2jtag.c,
+ src/bsdl/bsdl_msg.h, src/bsdl/bsdl.c, src/bsdl/bsdl_sem.c,
+ src/bsdl/vhdl_flex.l, src/bsdl/vhdl_bison.y,
+ src/bsdl/bsdl_flex.l, src/bsdl/bsdl_bison.y: port BSDL message system to
+ urj_log/urj_err_set functionality
+
+2009-05-23 Rutger Hofman <rfhh>
+
+ * configure.ac, Makefile.am: add an option (--disable-apps) to build only
+ the library, not the application main programs
+
+2009-05-23 Arnim Laeuger <arniml>
+
+ * src/bsdl2jtag, configure.ac, Makefile.am, src/Makefile.am,
+ src/apps/bsdl2jtag/Makefile.am, src/apps/bsdl2jtag/bsdl2jtag.c:
+ replace wrapper shell script with application that links to liburjtag
+
+2009-05-22 Arnim Laeuger <arniml>
+
+ * src/bsdl/bsdl_sem.c: replace remaining printf invocations with urj_log
+
+ * src/flash/flash.c: verify speed-up: use URJ_BUS_READ_START, _NEXT,
+ and _END instead of monolithic URJ_BUS_READ
+
+ * src/flash/jedec.c: rework autoselect probing, better support of
+ x8/x16 capable flash chips
+
+ * src/bsdl/bsdl.c, src/bsdl/bsdl_bison.y, src/bsdl/bsdl_sem.c,
+ src/bsdl/bsdl_flex.l, src/bsdl/bsdl_types.h: use URJ_STATUS_ return
+ codes except on toplevel interface, this needs to be revisited
+
+2009-05-21 Mike Frysinger <vapier@gentoo.org>
+
+ * data/xilinx/PARTS: added xc3s1200e_fg320 and xc2vp30-ffg896 (Florian
+ Fainelli)
+
+ * configure.ac: enable -Werror by default only when building out of an scm,
+ and add an explicit --enable-werror option to control it
+
+ * src/tap/detect.c: if the idcode failed to parse, don't print it out like it
+ actually worked but only returned zero's as this is confusing -- be clear
+ in that we didn't even attempt to read the idcode
+
+ * src/cmd/cmd_idcode.c: update usage to reflect reality
+
+ * include/urjtag/tap_register.h, src/tap/detect.c, src/tap/register.c:
+ convert the local bits_to_uint64() to a proper urj_tap_register_get_value()
+ so everyone can use it
+
+ * src/tap/idcode.c: decode the bit stream into hex values so people don't
+ have to do this manually
+
+2009-05-19 Arnim Laeuger <arniml>
+
+ * data/Makefile.am, data/broadcom/bcm6348/bcm6348,
+ data/broadcom/bcm6348/STEPPINGS, data/broadcom/bcm6358/bcm6358,
+ data/broadcom/PARTS: added bcm6348 (Julien Aube)
+
+2009-05-19 Rutger Hofman <rfhh>
+
+ * include/urjtag/error.h: make urj_log into a macro. Principal reason: if
+ urj_log won't print, it also won't evaluate the arguments so there is no
+ performance penalty in having gazillion disabled low-level prints
+ * src/bus/*, include/urjtag/bus_driver.h: refactor src/bus to use urj_log
+ i.s.o. printf, set urj_error wherever appropriate, return FAIL/OK state
+ where appropriate. read_start() now returns status.
+
+2009-05-18 Rutger Hofman <rfhh>
+
+ * src/cmd/cmd_debug.c, include/urjtag/jtag.h, src/global/urjtag.c: change
+ to set log level; remove unused global variable urj_debug_mode
+
+2009-05-18 Rutger Hofman <rfhh>
+
+ Make it compile for my eCos BlackFin checkout.
+ - numerous casts because "%zd" ever requires a size_t, even for a manifest
+ constant; and because a uint32_t should be cast to a long unsigned to be
+ printed with "%lu" (long unsigned is at least 32-bit)
+ * include/urjtag/urjtag.h, include/urjtag/urjtag.h.in: rename to only
+ export .h files for modules actually configured: USB, SVF, BSDL are
+ only conditionally exported
+
+2009-05-18 Arnim Laeuger <arniml>
+
+ * src/flash/amd.c: added Winbond W19B320AT/B flash chip
+
+2009-05-16 Arnim Laeuger <arniml>
+
+ * src/bus/ixp435.c, src/bus/buses.c, src/bus/buses.h,
+ src/bus/Makefile.am, configure.ac, THANKS:
+ [ 2770421 ] Patch: Support for IXP43x (Florian Boor)
+ without jtag description files
+
+ * include/urjtag/parport.h, src/tap/parport/ppdev.c, src/tap/parport/ppi.c,
+ src/tap/parport/direct.c, src/tap/parport.c: [ 2782584 ] PPWDATA and PPWCONTROL
+ ioclts take unsigned char not uint8_t (Yen Rui)
+
+2009-05-14 Arnim Laeuger <arniml>
+
+ * src/svf/svf_bison.y, src/svf/svf.c, src/cmd/cmd_svf.c,
+ include/urjtag/svf.h:
+ implement pass/fail return values with URJ_STATUS_*
+
+2009-05-14 Rutger Hofman <rfhh>
+
+ * src/tap/cable/*.c: convert return values, error handling, printfs
+ * src/**: globally remove \n or !\n from error detail msgs; sanitize
+ error prints a tiny bit
+ * include/urjtag/sysdep.h, include/urjtag/Makefile.am: sysdep.h should most
+ certainly not be in the directory of exported header files. Move it back
+ to the root dir in expectation of an include dir that is private to the
+ src tree
+
+2009-05-12 Rutger Hofman <rfhh>
+
+ * src/cmd/*.c, many more files: have the commands in src/cmd/ return
+ URJ_STATUS_OK on success, URJ_STATUS_FAIL on error, URJ_STATUS_MUST_QUIT
+ at a 'quit' command. The command implementations themselves do not print
+ on error; that is left to the caller, i.e. the application or a file
+ parser.
+ Library commands that produce output (print routines) are equipped with
+ a urj_log_level_t parameter to control their verbosity.
+ * include/urjtag/error.h, many more files: introduce error values
+ URJ_ERROR_FTD, URJ_ERROR_USB. Handle URJ_ERROR_IO specially through macro
+ urj_error_IO_set that handles errno/strerror().
+
+2009-05-11 Arnim Laeuger <arniml>
+
+ * src/bus/ejtag_dma.c (ejtag_dma_bus_init): invert abort condition for break
+ timeout
+
+2009-05-10 Arnim Laeuger <arniml>
+
+ * doc/UrJTAG.txt: hint for non-standard flash commands
+
+2009-05-09 Rutger Hofman <rfhh>
+
+ * configure.ac, **/Makefile.am: Add automake magic to have -Werror except
+ in the flex-generated files. See the automake FAQ:
+ http://www.gnu.org/software/automake/manual/html_node/Flag-Variables-Ordering.html#Flag-Variables-Ordering
+ Only setting -Wno-error=unused-function doesn't work for some gcc-s.
+
+2009-05-09 Arnim Laeuger <arniml>
+
+ * src/bsdl/Makefile.am, src/svf/Makefile.am: avoid -Werror to bail out because
+ of unused input() functions in flex-generated files
+
+ * include/urjtag/svf.h, src/cmd/cmd_svf.c, src/svf/svf.c,
+ src/svf/svf_bison.y, src/svf/svf.h, src/svf/svf_flex.l:
+ replace print_progress with DETAIL log level
+
+2009-05-07 Rutger Hofman <rfhh>
+
+ * src/flash/, src/svf/, src/tap/*.c, src/tap/parallel/, src/tap/usbconn:
+ replace calls to printf() with calls to urj_log() and urj_error_set()
+
+2009-05-07 Arnim Laeuger <arniml>
+
+ * src/tap/cable/wiggler2.c: [ 2782581 ] TRST, TMS and TDI incorrectly marked
+ in wiggler2 cable
+
+ * po/POTFILES.in: src/jim/tap.c renamed to jim_tap.c, removed getdelim.c
+ and getline.c
+
+ * src/cmd/cmd_test.c: [ 2776954 ] typo? on 'help test'
+
+2009-05-06 Arnim Laeuger <arniml>
+
+ * src/flash/amd.c: fix typo in S29GLxxxN, twice
+
+2009-05-05 Rutger Hofman <rfhh>
+
+ * src/svf/svf.c, src/svf/svf_bison.y, src/svf/svf_flex.y: replace calls to
+ printf() with calls to urj_log() and urj_error_set()
+
+ * src/lib/getline.c, src/lib/getdelim.c: remove because unused
+
+ * src/global/parse.c: replace calls to printf() with calls to urj_log() and
+ urj_error_set()
+
+ * include/urjtag/jim.h, include/urjtag/jim/some_cpu.h, src/jim/tap.c,
+ src/jim/jim_tap.c, src/jim/some_cpu.c, src/jim/intel_28f800b3.c: replace
+ calls to printf() with calls to urj_log() and urj_error_set()
+
+ * include/urjtag/part.h, src/cmd/cmd_bus.c, src/cmd/cmd_detect.c,
+ src/cmd/cmd_signal.c, src/bsdl/bsdl_bison.y, src/part/instruction.c,
+ src/part/bsbit.c, src/part/part.c, src/part/signal.c: start replacing
+ calls to printf() with calls to urj_log(), for starters with src/part.
+ Sometimes that means fixing a function to return an error status where
+ it previously printed and returned void
+
+ * include/urjtag/data_register.h, include/urjtag/error.h,
+ include/urjtag/log.h, src/global/*.c, src/cmd/cmd_register.c,
+ src/cmd/cmd_instruction.c, src/bsdl/bsdl_sem.c, src/tap/detect.c,
+ src/part/data_register.c, src/svf/svf_flex.l, src/svf/svf.c,
+ src/flash/detectflash.c: transform a number of urj_cmd_run() calls into
+ API calls
+
+2009-05-04 Rutger Hofman <rfhh>
+
+ * src/cmd/cmd_bus.c, src/bus/buses.c, include/urjtag/bus.h: transform the
+ bus cmd implementation into an API call
+ * src/cmd/cmd_detect.c, src/tap/detect.c, include/urjtag/tap.h: transform the
+ detect cmd implementation into an API call
+
+2009-05-02 Rutger Hofman <rfhh>
+
+ Refactor the autoconf stuff a bit so make install actually creates
+ include/urjtag/*.h
+
+2009-05-01 Rutger Hofman <rfhh>
+
+ Global variables for liburjtag should not reside in the shell app
+ * src/jtag.c: split into src/global/urjtag.c and src/apps/jtag/jtag.c
+
+2009-05-01 Rutger Hofman <rfhh>
+
+ Move all include/* to include/urjtag/* to lower collision chance on #include.
+ Start lifting commands from cmd/ into the library modules. Begun work on:
+ * src/cmd/cmd_bit.c
+ * src/cmd/cmd_instruction.c
+ * src/cmd/cmd_signal.c
+
+2009-04-24 Mike Frysinger <vapier@gentoo.org>
+
+ * data/analog/bf518/bf518: Update with public BSDL file.
+
+ * data/analog/bf527/bf527, data/analog/bf533/bf533, data/analog/bf537/bf537,
+ data/analog/bf538/bf538, data/analog/bf548/bf548, data/analog/bf561/bf561:
+ Add more register/instruction JTAG encodings.
+
+2009-04-23 Rutger Hofman <rfhh>
+
+ Use the changes by Przemyslaw Iskra, published as
+ $ svn co http://labserver.uv.es/svn_FPGA/trunk/source/urjtag urjtag-lib
+ to use libtool from now on. He based on r1427.
+ * configure.ac, **/Makefile.am: use libtool to create one shared liburjtag.la
+
+2009-04-23 Rutger Hofman <rfhh>
+
+ Expand tabs also in #defines -- indent skips them.
+ Run indent again. Since many identifiers have changed, line wraps have to
+ be redone.
+ Public typedefs of enums follow the same naming scheme as structs:
+ typedef enum urj_bla { ... } urj_bla_t;
+ * affects the complete code base.
+
+2009-04-23 Rutger Hofman <rfhh>
+
+ Mechanically replace all global function/variable names w/ a prefix
+ urj_(<module>_)*. Investigated with
+ ctags -R -x --c-kinds=f --file-scope=no | grep function
+ ctags -R -x --c-kinds=v --file-scope=no | grep variable
+ ctags -R -x --c-kinds=t --file-scope=no | grep typedef
+ ctags -R -x --c-kinds=e --file-scope=no | grep enum
+ then (sed-wise or manually) repair what doesn't fit automatically:
+ - imported files from src/lib
+ - duplicate modules like urj_cmd_cmd_detect that becomes urj_cmd_detect
+ - stuff where prefix escalation has a mismatch w/ existing name escalation
+ because of different order:
+ usbconn_cable_usbblaster_ftdi
+ becomes
+ urj_tap_cable_usbconn_usbblaster_ftdi
+ not
+ urj_tap_cable_usbconn_cable_usbblaster_ftdi
+ - typedefs only (or mostly) under include. Typedefs under src/ are left
+ unmodified, since they will be invisible outside liburjtag.
+ and then some.
+ The identifier names in .y and .l files have been changed by hand.
+ Some type names happen to be identical to variable/parameter names. These
+ were changed too by the automatic replace. Undo a number of them by hand.
+ * affects the complete code base.
+
+2009-04-22 Rutger Hofman <rfhh>
+
+ A very few typedef'ed types do NOT have an _t prefix. Orthogonize this by
+ adding _t to typedefs: instruction, data_register, tap_register.
+ * include/part.h, include/data_register.h, include/instruction.h,
+ include/register.h, include/tap.h, src/cmd/instruction.c,
+ src/cmd/register.c, src/cmd/dr.c, src/cmd/bit.c, src/cmd/scan.c,
+ src/cmd/print.c, src/tap/discovery.c, src/tap/detect.c, src/tap/register.c,
+ src/tap/tap.c, src/tap/idcode.c, src/part/instruction.c, src/part/part.c,
+ src/part/data_register.c, src/bus/fjmem.c, src/bus/ejtag_dma.c,
+ src/bus/avr32.c, src/bus/ejtag.c, src/svf/svf.c, src/svf/svf.h
+
+2009-04-22 Rutger Hofman <rfhh>
+
+ Check suspicious-looking public symbols whether they shouldn't be in fact
+ static:
+ * src/jim/tap.c: make some variables static
+ * src/jim/intel_28f800b3.c: make some variables static
+ * src/jim/some_cpu.c
+ * src/tap/parport/direct.c
+ * src/bus/ejtag_dma.c
+ * src/bus/mpc824x.c
+ * src/bus/bcm1250.c
+ * src/bus/slsup3.c
+ * src/flash/amd_flash.c
+
+2009-04-21 Rutger Hofman <rfhh>
+
+ Run indent over the code base: all '*.[ch]' files except evidently imported
+ ones, like the libiberty imports in lib.
+ * xargs indent -npro -nut -bli0 -i4 {-T typedef}* < indent-files
+ where indent-files is `find . -name '*.[ch]' -print` except:
+ src/lib/ansidecl.h
+ src/lib/filenames.h
+ src/lib/lbasename.c
+ src/lib/libiberty.h
+ src/lib/lrealpath.c
+ src/lib/make-relative-prefix.c
+ src/lib/safe-ctype.c
+ src/lib/safe-ctype.h
+ include/gettext.h
+ * README: add a warning as to the status of the urjtag/ branch AKA the
+ Librarification branch
+
+2009-04-17 Kolja Waschk <kawk>
+
+ * Makefile.am: Distribute UrJTAG.nsi in source tarball next time
+
+2009-04-17 Arnim Laeuger <arniml>
+
+ Version 0.10 released.
+
+2009-04-17 Arnim Laeuger <arniml>
+
+ * configure.ac, NEWS: set release version 0.10
+
+ * src/jtag.c: Update copyright year at both instances
+
+2009-04-17 Kolja Waschk <kawk>
+
+ * configure.ac: Last minute fix for USBCFLAGS for libusb
+ * doc/UrJTAG.txt: Info about installing precompiled version on Win
+ * src/flash/jedec.c: Add license info
+ * UrJTAG.nsi: Create links to EXE and UrJTAG.txt in Start Menu
+
+2009-04-16 Arnim Laeuger <arniml>
+
+ * THANKS: added contributors
+
+2009-04-16 Kolja Waschk <kawk>
+
+ * include/xpcu.h, src/flash/jedec_exp.c: Add license info
+ * doc/UrJTAG.txt: Info about source for 64bit/Vista inpout32.dll
+ * UrJTAG.nsi: Include inpout32.dll (needs some manual work)
+
+2009-04-16 Arnim <arniml>
+
+ * doc/UrJTAG.txt: Documentation fixes (Uwe Hermann)
+
+2009-04-13 Arnim <arniml>
+
+ * configure.ac: follow version info in NEWS
+
+2009-04-12 Arnim <arniml>
+
+ * src/tap/cable/ft2232.c: flyswatter description update
+
+ * NEWS: prepare for 0.10 release, still requires version update
+
+2009-04-10 Arnim Laeuger <arniml>
+
+ * src/flash/flash.c (flasherase): fix missing base address for block_no calculation,
+ re-use find_block() from flashmem() to align block_no calculation
+
+2009-04-08 Arnim Laeuger <arniml>
+
+ * couple of files: enable Id keyword substitution
+
+ * po/fr.po, po/rw.po, po/sk.po: update to latest status
+
+ * src/bus/bscoach.c: use english text per default
+
+ * po/POTFILES.in: update to current file list
+
+ * data/Makefile.am: added missing files for install
+
+ * doc/UrJTAG.txt: describe bus command
+
+ * doc/bsdl2jtag.1, doc/jtag.1, THANKS: Various manpage updates (Uwe Hermann)
+
+2009-04-06 Arnim Laeuger <arniml>
+
+ * src/Makefile.am, po/POTFILES.in: fix two build issues (Uwe Hermann)
+
+ * src/tap/usbconn/libftdi.c: Better errors from ftdi (Jon Smirl)
+
+ * src/flash/jedec.c: Author added.
+
+2009-04-05 Arnim Laeuger <arniml>
+
+ * configure.ac: turn feature options that are enabled by default into
+ --disable-*
+
+ * src/tap/cable/ft2232.c: check target status for UsbScarab2 (Tomek Cedro)
+
+2009-04-04 Arnim Laeuger <arniml>
+
+ * src/tap/cable/ft2232.c, src/tap/cable.c, src/tap/cable/generic_usbconn.c,
+ THANKS, doc/UrJTAG.txt: usbscarab2 cable driver added (Tomek Cedro)
+
+2009-03-30 Arnim Laeuger <arniml>
+
+ * doc/UrJTAG.txt: multi-byte description
+
+ * configure.ac: better description for flash-multi-byte
+
+2009-03-29 Arnim Laeuger <arniml>
+
+ * UrJTAG.txt: Update supported pod and device lists
+
+2009-03-28 Arnim Laeuger <arniml>
+
+ * src/tap/chain.c (chain_set_pod_signal) : keep old value of trst in
+ case trst isn't modified by mask/val
+
+ * src/tap/chain.c: [ 2610857 ] chain_set_pod_signal() looks funky
+
+ * UrJTAG.txt: typo
+
+2009-03-28 Arnim Laeuger <arniml>
+
+ * src/bsdl2jtag, src/Makefile.am, doc/UrJTAG.txt: implement bsdl2jtag
+ as a wrapper script that calls jtag shell with 'bsdl dump ...'
+
+ * src/Makefile.am, src/bsdl2jtag.c: removed bsdl2jtag
+
+2009-03-27 Arnim Laeuger <arniml>
+
+ * src/jtag.c: more than one optional file can be specified
+
+ * src/flash/jedec.c: fix memory corruption from jedec code (Jon Smirl)
+
+2009-03-26 Arnim Laeuger <arniml>
+
+ * src/cmd/initbus.c: Notify which bus is active when a new bus is initialized
+ (Jon Smirl)
+
+ * src/bus/mpc5200.c, THANKS: Support the MUX parameter on the mpc5200
+ local bus for hardware (Jon Smirl)
+
+2009-03-23 Arnim Laeuger <arniml>
+
+ * src/cmd/pod.c: show signal names for TRST and RESET
+
+2009-03-18 Arnim Laeuger <arniml>
+
+ * acinclude.m4: add libtinfo, fix for
+ [ 2691154 ] Configure fails to detect libtinfo
+
+ * src/flash/intel.c, src/flash/amd.c: activate multi byte write mode
+ for > 1, not > 0
+ [ 2690857 ] Can't write flashes
+
+2009-03-12 Arnim Laeuger <arniml>
+
+ * data/atheros/ar2312/ar2312: AR2313 flash access patch
+ (snowweihua)
+
+2009-03-08 Arnim Laeuger <arniml>
+
+ * src/svf/svf.c, src/svf/svf_bison.y, src/svf/svf.h:
+ [ 2666261 ] Add pass/fail report to SVF player
+
+ * src/svf/svf.c: avoid double free for SIR/SDR parameter strings in case
+ of a consistency check error
+
+ * src/bsdl/bsdl_sem.c: avoid leading space when printing commands
+
+2009-03-07 Arnim Laeuger <arniml>
+
+ * data/ti/tnetv1060/tnetv1060, data/ti/tnetv1061/tnetv1061:
+ init EJTAG bus automatically
+
+2009-03-05 Arnim Laeuger <arniml>
+
+ * src/tap/print_queue.c, src/bus/bscoach.c, src/bus/ejtag_dma.c,
+ src/bus/pxa2x0.c, src/bus/zefant-xs3.c, src/bus/jopcyc.c,
+ src/bus/s3c4510x.c, src/bus/ejtag.c: skip operations of *_bus_init()
+ if TAP is not in RUNTEST/IDLE state
+ [ 2658604 ] Errors when part description contains commands accessing TAP
+
+2009-03-04 Arnim Laeuger <arniml>
+
+ * src/bus/mpc5200.c: add additional address decoding to mpc5200 bus driver
+ (Jeff Wittrock)
+
+2009-03-02 Arnim Laeuger <arniml>
+
+ * data/freescale/PARTS: add stepping for MPC5200B (Jeff Wittrock)
+
+2009-03-01 Arnim Laeuger <arniml>
+
+ * data/ti/PARTS, data/ti/tnetv1060/tnetv1060, data/ti/tnetv1060/STEPPINGS,
+ data/Makefile.am:
+ TI tnetv1060 (Kenny)
+
+2009-02-27 Arnim Laeuger <arniml>
+
+ * doc/UrJTAG.txt: Warning about FTD2XX driver, USB FAQ.
+
+ * src/cmd/flashmem.c, src/flash/flash.c, include/flash.h:
+ [ 2645787 ] Bypass verify stage of flashmem cmd (Jeff Wittrock)
+
+2009-02-26 Arnim Laeuger <arniml>
+
+ * data/Makefile.am, data/MANUFACTURERS, data/ti/PARTS,
+ data/ti/tnetv1061/STEPPINGS, data/ti/tnetv1061/tnetv1061:
+ TI tnetv1061 (Kenny)
+
+ * src/svf/svf_flex.l:
+ [ 2638083 ] SVF progress indicator not visible for some .svf files
+ (William)
+
+2009-02-25 Arnim Laeuger <arniml>
+
+ * src/svf/svf_flex.l: [ 2635979 ] Replace index() to strchr()
+ (MURANAKA Masaki)
+
+2009-02-23 Arnim Laeuger <arniml>
+
+ * src/tap/usbconn/libftdi.c, src/tap/usbconn/libftd2xx.c:
+ keep JTAG dongle in current mode (Holger Schurig)
+
+ * data/atmel/at32ap7000/at32ap7000: clarifications for AVR32 data
+ (Holger Schurig)
+
+2009-02-17 Mike Frysinger <vapier@gentoo.org>
+
+ * src/bus/mpc824x.c (setup_address): Return on unhandled sizes to avoid
+ compiler warnings.
+
+ * src/bsdl2jtag.c, src/bus/mpc824x.c, src/cmd/include.c, src/cmd/scan.c,
+ src/cmd/shell.c, src/jim/intel_28f800b3.c, src/jim/some_cpu.c,
+ src/jim/tap.c, src/part/data_register.c, src/tap/cable.c,
+ src/tap/cable/generic.c, src/tap/cable/jim.c, src/tap/cable/jlink.c,
+ src/tap/cable/xpc.c, src/tap/usbconn/libusb.c: Remove spurious semicolons
+ from places they do not belong (like at the end of braces).
+
+2009-02-16 Arnim Laeuger <arniml>
+
+ * doc/UrJTAG.txt: some FAQs
+
+2009-02-13 Mike Frysinger <vapier@gentoo.org>
+
+ * include/chain.h, include/tap.h, src/tap/chain.c, src/tap/tap.c: Add a
+ prefix to all local variables named "exit" to avoid shadowing the system
+ exit() function.
+
+ * src/cmd/print.c (cmd_print_run): Use puts() to display the formatted buffer
+ rather than printf() to avoid security issues with dynamically generated
+ format strings, and to avoid warnings generated by such compilers:
+ print.c:111: warning: format not a string literal and no format arguments
+
+ * configure.ac: Put our local -I paths into CPPFLAGS before anything coming
+ from the user as we want to make sure our local paths take precedence.
+ Reported by Steve Franks from a FreeBSD report.
+
+2009-02-11 Arnim Laeuger <arniml>
+
+ * src/bsdl/bsdl_sem.c: return proper error code to upper level
+
+2009-02-07 Arnim Laeuger <arniml>
+
+ * doc/UrJTAG.txt: turn http links into real hyperlinks
+
+ * doc/UrJTAG.txt: libftdi URL changed
+
+2009-02-06 Arnim Laeuger <arniml>
+
+ * src/tap/cable/ft2232.c: fix nSRST for flyswatter (Kees Jongenburger)
+
+2009-01-26 Kolja Waschk <kawk>
+
+ * UrJTAG.nsi: Script to create Windows installer using NSIS.
+
+2009-01-22 Mike Frysinger <vapier@gentoo.org>
+
+ * src/cmd/include.c: Include ctype.h for isalpha().
+
+ * src/bsdl/bsdl_sem.c (create_register): Use %zu for size_t with printf().
+
+ * src/tap/detect.c (detect_parts): Use the PRIX64 format string for 64bit
+ types with printf().
+
+ * src/part/part.c (part_print): Use const markings with const strings.
+ * src/cmd/include.c (cmd_include_or_script_run): Likewise.
+
+ * sysdep.h: Redirect swprintf() calls to _snwprintf() for Windows as they
+ implemented a different function from ISO C (theirs does not take a count).
+
+2009-01-19 Kolja Waschk <kawk>
+
+ * doc/UrJTAG.txt,
+ include/cable.h, include/chain.h, include/pod.h, include/Makefile.am,
+ src/cmd/cmd.c, src/cmd/pod.c, src/cmd/Makefile.am, src/tap/cable.c,
+ src/tap/chain.c, src/tap/cable/wiggler.c, src/tap/cable/arcom.c,
+ src/tap/cable/mpcbdm.c, src/tap/cable/ts7800.c,
+ src/tap/cable/usbblaster.c, src/tap/cable/jlink.c,
+ src/tap/cable/generic.c, src/tap/cable/vision_ep9307.c,
+ src/tap/cable/ea253.c, src/tap/cable/triton.c, src/tap/cable/ei012.c,
+ src/tap/cable/byteblaster.c, src/tap/cable/generic.h,
+ src/tap/cable/ft2232.c, src/tap/cable/wiggler2.c,
+ src/tap/cable/keithkoep.c, src/tap/cable/lattice.c,
+ src/tap/cable/dlc5.c, src/tap/cable/xpc.c, src/svf/svf.c:
+ [ 2187351 ] Direct JTAG signal access, get/set_trst extension;
+ Integrated changes from getset_pod branch, substituting the
+ get/set_trst cable functions with more mighty get/set_signal
+ functions. Finally, this gives low level access to cable signals
+ as Sebastian Hesselbarth suggested and implemented first (thanks).
+ Arnim implemented it for the FTDI cable drivers, while I worked
+ on the parport cable drivers and new "pod" command.
+
+2009-01-16 Arnim Laeuger <arniml>
+
+ * src/cmd/parse.c: flush_chain() between commands read from file
+ [ 2499176 ] No chain_flush() when executing commands from file
+
+2009-01-03 Arnim Laeuger <arniml>
+
+ * configure.ac, src/bus/bscoach.c, src/bus/buses.c,
+ src/bus/buses.h, src/bus/Makefile.am:
+ [ 2187115 ] Bus driver for Goepel Boundary Scan Coach
+ (by Markus Schneider)
+
+2008-12-23 Arnim Laeuger <arniml>
+
+ * src/svf/svf.c: added debug output for svf_compare_tdo()
+
+2008-12-23 Kolja Waschk <kawk>
+
+ * src/tap/parport/direct.c, configure.ac, doc/UrJTAG.txt:
+ Dynamically load the InpOut32.dll for parallel port access. Tested
+ in MinGW environment (Cygwin GCC with -mno-cygwin flag), and
+ documented how to compile it. Could build a distributable EXE now.
+
+ * src/cmd/usleep.c, sysdep.h: usleep() is declared in
+ unistd.h, also present in modern MinGW environments.
+ Defining it in sysdep.h collides with unistd.h.
+
+2008-12-22 Arnim Laeuger <arniml>
+
+ * src/tap/cable/usbblaster.c:
+ limit maximum number of bytes queued, equivalent for
+ Bug 2456024 - FTD2XX fails with certain SVF file
+
+ * src/tap/cable/ft2232.c:
+ set cable frequency to real FT2232 frequency
+
+ * src/tap/usbconn/libftdi.c, src/tap/usbconn/libftd2xx.c,
+ include/usbconn/libftdx.h, src/tap/cable/ft2232.c:
+ increased MPSSE buffer size from 4k to 64k
+ mitigates performance decrease for mid-sized clock operations
+
+2008-12-21 Kolja Waschk <kawk>
+
+ * src/svf/svf.c: Fix 2456021 - SVF compare_tdo flaw
+
+ * src/tap/cable/ft2232.c, src/tap/cable/cmd_xfer.c,
+ src/tap/cable/cmd_xfer.h: limit maximum number of bytes queued
+ into one cmd buffer. Should fix problems with high clocks count for
+ SVF runtest execution (Bug 2456024 - FTD2XX fails with certain SVF file)
+
+ * configure.ac, src/tap/parport/direct.c: added detection of InpOut32
+ library and support for using it for I/O port access even under Vista
+
+2008-12-17 Kolja Waschk <kawk>
+
+ * src/tap/discovery.c: Optional (#ifdef) printf for discovery debugging
+
+2008-12-16 Kolja Waschk <kawk>
+
+ * data/Makefile.am: Added bcm6358 files, thanks Anselmo Luginbuehl
+
+2008-12-09 Kolja Waschk <kawk>
+
+ * data/broadcom/bcm6358, data/broadcom/bcm6358/bcm6358,
+ data/broadcom/bcm6358/STEPPINGS, data/broadcom/PARTS:
+ [ 2412479 ] neufbox4 support. BCM6358 data files (by
+ Julien Aube, slightly modified)
+
+ * src/flash/amd.c: [ 2412481 ] neufbox4 support: MX29LV640B
+ recognition (by Julien Aube)
+
+2008-12-08 Julien Aube <obconseil@gmail.com>
+
+ * src/bus/ejtag_dma.c, src/bus/Makefile.am, src/bus/buses.c,
+ src/bus/buses.h, configure.ac: [ 2412486 ] Support for ejtag in DMA mode.
+
+2008-12-07 Mike Frysinger <vapier@gentoo.org>
+
+ * data/analog/bf518/bf518, data/analog/bf518/STEPPINGS, data/analog/PARTS,
+ data/Makefile.am: Initial support for BF518 processors.
+
+ * data/analog/bf548/STEPPINGS: Add 0.3 silicon revision.
+
+ * data/analog/PARTS: Add BF534 and BF548M ids.
+
+2008-12-03 Arnim Laeuger <arniml>
+
+ * src/tap/cable/ft2232.c, src/tap/cable/generic_usbconn.c,
+ src/tap/cable.c, doc/UrJTAG.txt:
+ [ 2382324 ] Patch to add support for TinCanTools Flyswatter JTAG cable
+ (Mark Norman)
+
+ * include/flash.h, src/flash/amd_flash.c, src/flash/amd.c,
+ src/flash/intel.c, src/flash/flash.c, configure.ac:
+ restructure multi-byte flash programming support
+ flashmem no longer needs to know about the capabilities of
+ the flash chip to handle multi-byte programming
+
+2008-12-02 Arnim Laeuger <arniml>
+
+ * include/flash/intel.h, src/flash/intel.c:
+ support for multi-byte write mode
+ chips must match the following criteria to qualify
+ - CFI data specifies multi-byte write mode supported
+ - handled by intel.c
+ - 8 or 16 bit interface
+
+2008-12-01 Arnim Laeuger <arniml>
+ * include/flash.h, src/flash/amd_flash.c, src/flash/amd.c,
+ src/flash/intel.c, src/flash/flash.c, configure.ac:
+ support multi-byte write mode
+ chips must match the following criteria to qualify
+ - CFI data specifies multi-byte write mode supported
+ - handled by amd.c
+ - 8 or 16 bit interface
+
+ * src/bus/prototype.c (prototype_bus_new): consider amode parameter properly
+ when specified on the command line. pervious version didn't set ASHIFT in
+ this case.
+
+ * src/flash/amd.c (amd_flash_print_info): added Spansion S92GL chips
+
+2008-11-16 Kolja Waschk <kawk>
+
+ * src/bus/ejtag.c: Support BCM6348/EJTAG 3.1 (by Andy Potter/livebox)
+
+2008-10-30 Arnim Laeuger <arniml>
+
+ * src/svf/svf_bison.y, src/svf/svf.c, src/svf/svf.h:
+ removed obsolete parameter
+
+ * include/svf.h, src/cmd/svf.c, src/svf/svf.c,
+ src/svf/svf_bison.y, src/svf/svf.h, doc/UrJTAG.txt:
+ add the ref_freq option to svf command
+
+2008-10-28 Arnim Laeuger <arniml>
+
+ * src/cmd/parse.c (jtag_parse_stream): avoid clipping message when
+ reading comments (Hartley)
+
+ * renamed data/lattice/lfec2-12e/lfec2_12e to lfec2-12e
+
+ * data/MANUFACTURERS, data/lattice/lfec2-12e, data/lattice/lfec2-12e/lfec2_12e,
+ data/lattice/lfec2-12e/STEPPINGS, data/lattice/PARTS, data/lattice/lc4064zc,
+ data/lattice/lc4064zc/lc4064zc, data/lattice/lc4064zc/STEPPINGS, data/marvell/88e1118,
+ data/marvell/88e1118/88e1118, data/marvell/88e1118/STEPPINGS, data/marvell/88f5182,
+ data/marvell/88f5182/88f5182-a2, data/marvell/88f5182/STEPPINGS, data/marvell/PARTS,
+ data/Makefile.am:
+ [ 2187342 ] Technologic Systems TS-7800 JTAG support
+ (Catalin Ionescu)
+ part description files
+
+2008-10-26 Arnim Laeuger <arniml>
+
+ * configure.ac, doc/UrJTAG.txt, src/tap/Makefile.am,
+ src/tap/cable/ts7800.c, src/tap/cable.c, THANKS:
+ [ 2187342 ] Technologic Systems TS-7800 JTAG support
+ (Catalin Ionescu, Stanislav Sinyagin)
+ cable driver only
+
+ * src/cmd/print.c, doc/UrJTAG.txt:
+ [ 1964834 ] Add 'print instruction' support to print command
+ (Hartley Sweeten)
+
+2008-10-23 Arnim Laeuger <arniml>
+
+ * src/svf/svf_bison.y: initialize max_time to 0.0 if
+ the optional MAXIMUM is missing for RUNTEST commands
+
+2008-10-22 Arnim Laeuger <arniml>
+
+ * src/tap/cable/generic.c: make calibration loop more tolerant for
+ less accurate OS timers
+
+2008-10-18 Kolja Waschk <kawk
+
+ * src/cmd/usleep.c, src/cmd/cmd.c, src/cmd/Makefile.am:
+ Add usleep command (Stanislav Sinyagin)
+
+2008-10-18 Kolja Waschk <kawk>
+
+ * src/tap/cable/ft2232.c, src/tap/cable/generic_usbconn.c:
+ Add support for ARM-USB-OCD TINY (Sebastian Hesselbarth)
+
+2008-10-13 Jie Zhang <jie.zhang@analog.com>
+
+ * src/tap/cable/ft2232.c (ft2232_transfer_schedule): Don't
+ access memory out of bounds.
+
+2008-10-11 Arnim Laeuger <arniml>
+
+ * src/bus/ejtag.c (ejtag_bus_init): added remaining return values
+ (Stanislav Sinyagin)
+
+2008-09-27 Arnim Laeuger <arniml>
+
+ * include/jtag.h, src/cmd/detect.c, src/cmd/initbus.c,
+ src/cmd/print.c, src/bus/bf548_ezkit.c, src/bus/fjmem.c,
+ src/bus/ppc405ep.c, src/bus/sh7727.c, src/bus/prototype.c,
+ src/bus/sa1110.c, src/bus/ppc440gx_ebc8.c, src/bus/tx4925.c,
+ src/bus/sh7750r.c, src/bus/pxa2x0.c, src/bus/bf533_stamp.c,
+ src/bus/bf533_ezkit.c, src/bus/bf537_stamp.c, src/bus/ixp425.c,
+ src/bus/avr32.c, src/bus/h7202.c, src/bus/zefant-xs3.c,
+ src/bus/mpc824x.c, src/bus/bcm1250.c, src/bus/sharc21065l.c,
+ src/bus/readmem.c, src/bus/au1500.c, src/bus/lh7a400.c,
+ src/bus/sh7751r.c, src/bus/generic_bus.c, src/bus/mpc5200.c,
+ src/bus/jopcyc.c, src/bus/bf561_ezkit.c, src/bus/slsup3.c,
+ src/bus/writemem.c, src/bus/s3c4510x.c, src/bus/ejtag.c,
+ src/flash/amd_flash.c, src/flash/cfi.c, src/flash/jedec_exp.c,
+ src/flash/jedec.c, src/flash/intel.c:
+ [ 2102453 ] Use macros for std return values instead of literals
+
+2008-09-16 Mike Frysinger <vapier@gentoo.org>
+
+ * data/analog/bf527/STEPPINGS: Add bf527 0.2.
+ * data/analog/bf533/STEPPINGS: Add bf533 0.5 and 0.6.
+ * data/analog/bf548/STEPPINGS: Add bf548 0.2.
+
+2008-09-15 Arnim Laeuger <arniml>
+
+ * src/svf/svf.h, src/svf/svf_flex.l: SVF player fix for
+ [ 2112823 ] Conversion with strtod and similar influenced by locale
+
+2008-09-14 Kolja Waschk <kawk>
+
+ Version 0.9 released.
+
+2008-09-14 Kolja Waschk <kawk>
+
+ * configure.ac, NEWS, po/fr.po, po/rw.po, po/sk.po: Preparation
+ for release of UrJTAG 0.9 tarball
+ * include/Makefile.am, src/bsdl/Makefile.am: list new header
+ files here so they get included in distribution
+
+2008-09-09 Arnim Laeuger <arniml>
+
+ * src/cmd/detect.c: test correct return value of bus->driver->init()
+
+ * src/bsdl2jtag.c: fix from and to for downto vectors
+
+2008-09-06 Arnim Laeuger <arniml>
+
+ * src/tap/usbconn/libftdi.c, src/tap/usbconn/libftd2xx.c:
+ [ 2091744 ] Automatic detection of alternative VID/PID cables broken
+
+ * src/tap/cable/usbblaster.c: set fixed frequency and print warning
+ if a different frequency is requested
+
+ * src/tap/cable/generic.c: fixed calibration loop
+
+ * src/svf/svf.c: require frequency setting from cable for
+ RUNTEST MIN SEC command, fixes
+ [ 2090432 ] SVF programming problem with "x SEC" arg to runtest
+ also restore previous frequency setting at end of SVF execution
+
+2008-09-04 Arnim Laeuger <arniml>
+
+ * configure.ac, src/tap/usbconn/libftd2xx.c,
+ src/tap/usbconn/libftdi.c: forward and use the desc= paramter
+ [ 2085244 ] Wrong device chosen by ftd2xx driver
+
+2008-09-03 Arnim Laeuger <arniml>
+
+ * src/tap/usbconn/libftd2xx.c, src/tap/usbconn/libftdi.c:
+ use puts() and printf() instead of perror()
+
+2008-09-03 Mike Frysinger <vapier@gentoo.org>
+
+ * src/tap/parport/ppdev.c, src/tap/cable/wiggler.c,
+ src/tap/cable/generic_parport.c: Change HAVE_LINUX_PPDEV_H to
+ ENABLE_LOWLEVEL_PPDEV.
+
+ * src/tap/cable/generic_parport.c, src/tap/cable/wiggler.c:
+ Fix typo: PPDEF -> PPDEV.
+
+2008-08-27 Arnim Laeuger <arniml>
+
+ * include/Makefile.am, include/bsdl.h, include/bsdl_mode.h,
+ src/cmd/include.c, src/cmd/bsdl.c, src/bsdl/vhdl_parser.h,
+ src/bsdl/bsdl_msg.h, src/bsdl/bsdl.c, src/bsdl/bsdl_bison.y,
+ src/bsdl/vhdl_flex.l, src/bsdl/bsdl_parser.h, src/bsdl/bsdl_sem.c,
+ src/bsdl/bsdl_flex.l, src/bsdl/bsdl_types.h, src/bsdl/vhdl_bison.y,
+ src/tap/detect.c: cleaned-up bsdl subsystem, avoid double reading
+ during detect, commenting
+
+2008-08-24 Arnim Laeuger <arniml>
+
+ * src/bsdl/bsdl_sem.c (bsdl_process_cell_info): fix error with
+ repeated usage of cmd[]
+
+2008-08-22 Arnim Laeuger <arniml>
+
+ * src/bsdl/vhdl_bison.y: enhanced error reporting
+
+ * configure.ac, data/Makefile.am, src/Makefile.am,
+ src/bsdl/Makefile.am, src/bsdl/bsdl.c, src/bsdl/bsdl_bison.y,
+ src/bsdl/bsdl_flex.l, src/bsdl/bsdl_sem.c, src/bsdl/bsdl_sysdep.h,
+ data/bsdl/STD_1532_2001, data/bsdl/STD_1532_2002, src/bsdl/bsdl_msg.h,
+ src/bsdl/bsdl_parser.h, src/bsdl/bsdl_types.h, src/bsdl/vhdl_bison.y,
+ src/bsdl/vhdl_flex.l, src/bsdl/vhdl_parser.h, src/bsdl/bsdl_local.h:
+ merged from branches/bsdl 1304:1340
+ rewrite of BSDL parser
+
+2008-07-15 Arnim Laeuger <arniml>
+
+ * doc/UrJTAG.txt, src/cmd/dr.c (cmd_dr_help):
+ document feature to set active data register with dr
+
+2008-07-14 Arnim Laeuger <arniml>
+
+ * include/chain.h, include/tap.h, src/cmd/reset.c, src/tap/detect.c,
+ src/tap/chain.c, src/tap/tap.c, src/bus/fjmem.c, src/bus/avr32.c:
+ [ 1873260 ] Command 'reset' does not reset internal states
+ next round to fix this one
+
+2008-07-10 Arnim Laeuger <arniml>
+
+ * src/tap/usbconn/libftd2xx.c (usbconn_ftd2xx_open): perform device reset
+ and RX purge
+
+2008-07-09 Arnim Laeuger <arniml>
+
+ * src/tap/usbconn/libftd2xx.c: added some debugging messages
+
+ * src/tap/usbconn/libftd2xx.c (usbconn_ftd2xx_write),
+ src/tap/usbconn/libftdi.c (usbconn_ftdi_write): don't subtract from
+ p->to_recv
+
+2008-07-03 Mike Frysinger <vapier@gentoo.org>
+
+ * src/lib/ansidecl.h, src/lib/libiberty.h: Import headers from binutils
+ that the local src/lib/ files need for relocatable support.
+ * src/lib/Makefile.am (libiberty_sources): Add local headers to the list.
+
+2008-07-03 Jie Zhang <jie.zhang@analog.com>
+
+ * src/bsdl/bsdl.c: Remove trailing whitespaces.
+ * src/lib/make-relative-prefix.c: Likewise.
+ * src/lib/lbasename.c: Likewise.
+ * src/lib/lrealpath.c: Likewise.
+ * doc/UrJTAG.txt: Likewise.
+ * data/atmel/PARTS: Likewise.
+
+ * src/bus/bf537_stamp.c (bus_driver_t bf538f_ezkit_bus): New.
+ (bus_driver_t bf526_ezkit_bus): New.
+ * src/bus/buses.c (bus_drivers[]): Add bf526_ezkit_bus and
+ bf538f_ezkit_bus.
+ * src/bus/buses.h (bf526_ezkit_bus): Declare.
+ (bf538f_ezkit_bus): Declare.
+ * src/bus/Makefile.am (libbus_a_SOURCES): Add bf537_stamp.c
+ for bf526 ezkit and bf538f ezkit.
+ * configure.ac: Add bf526_ezkit and bf538f_ezkit.
+ * data/analog/PARTS: Add bf538.
+ * analog/bf538/STEPPINGS: New file.
+ * analog/bf538/bf538: New file.
+ * data/Makefile.am (nobase_dist_pkgdata_DATA): Add
+ analog/bf538/STEPPINGS and analog/bf538/bf538.
+
+ * src/tap/cable/ft2232.c: Make the gnICE comment a little more specific.
+
+2008-07-02 Jie Zhang <jie.zhang@analog.com>
+
+ * include/bus_driver.h (struct bus_driver): Add driver argument
+ to new_bus.
+ * src/cmd/initbus.c (cmd_initbus_run): Pass driver to new_bus.
+ * src/bus/bf548_ezkit.c (bf548_ezkit_bus_new): Add driver
+ argument and use it.
+ * src/bus/fjmem.c (fjmem_bus_new): Likewise.
+ * src/bus/ppc405ep.c (ppc405ep_bus_new): Likewise.
+ * src/bus/sh7727.c (sh7727_bus_new): Likewise.
+ * src/bus/prototype.c (prototype_bus_new): Likewise.
+ * src/bus/sa1110.c (sa1110_bus_new): Likewise.
+ * src/bus/ppc440gx_ebc8.c (ppc440gx_ebc8_bus_new): Likewise.
+ * src/bus/sh7750r.c (sh7750r_bus_new): Likewise.
+ * src/bus/tx4925.c (tx4925_bus_new): Likewise.
+ * src/bus/bf533_stamp.c (bf533_stamp_bus_new): Likewise.
+ * src/bus/bf533_ezkit.c (bf533_ezkit_bus_new): Likewise.
+ * src/bus/ixp425.c (ixp425_bus_new): Likewise.
+ * src/bus/avr32.c (avr32_bus_new): Likewise.
+ * src/bus/zefant-xs3.c (zefant_xs3_bus_new): Likewise.
+ * src/bus/h7202.c (h7202_bus_new): Likewise.
+ * src/bus/mpc824x.c (mpc824x_bus_new): Likewise.
+ * src/bus/bcm1250.c (bcm1250_bus_new): Likewise.
+ * src/bus/sharc21065l.c (sharc_21065L_bus_new): Likewise.
+ * src/bus/au1500.c (au1500_bus_new): Likewise.
+ * src/bus/lh7a400.c (lh7a400_bus_new): Likewise.
+ * src/bus/sh7751r.c (sh7751r_bus_new): Likewise.
+ * src/bus/mpc5200.c (mpc5200_bus_new): Likewise.
+ * src/bus/jopcyc.c (jopcyc_bus_new): Likewise.
+ * src/bus/bf561_ezkit.c (bf561_ezkit_bus_new): Likewise.
+ * src/bus/slsup3.c (slsup3_bus_new): Likewise.
+ * src/bus/s3c4510x.c (s3c4510_bus_new): Likewise.
+ * src/bus/ejtag.c (ejtag_bus_new): Likewise.
+ * src/bus/pxa2x0.c (pxa2xx_bus_new_common): Remove.
+ (pxa2xx_bus_new): New.
+ (pxa2x0_bus_new): Remove.
+ (pxa27x_bus_new): Remove.
+ (pxa2xx_bus_printinfo): New.
+ (pxa2x0_bus_printinfo): Remove.
+ (pxa27x_bus_printinfo): Remove.
+ (bus_driver_t pxa2x0_bus): Replace pxa2x0_bus_new with
+ pxa2xx_bus_new. Replace pxa2x0_bus_printinfo with
+ pxa2xx_bus_printinfo.
+ (bus_driver_t pxa27x_bus): Replace pxa27x_bus_new with
+ pxa2xx_bus_new. Replace pxa27x_bus_printinfo with
+ pxa2xx_bus_printinfo.
+ * src/bus/bf537_stamp.c (bf537_stamp_bus_new_1): Rename
+ to ...
+ (bf537_stamp_bus_new): ... this. And use the new driver
+ argument.
+ (bf537_ezkit_bus_new): Remove.
+ (bf527_ezkit_bus_new): Remove.
+ (bf537_stamp_bus_printinfo): Use description in bus driver.
+ (bf537_ezkit_bus_printinfo): Remove.
+ (bf527_ezkit_bus_printinfo): Remove.
+ (BF537_STAMP_BUS_FUNCTIONS): Define.
+ (bus_driver_t bf537_stamp_bus): Use BF537_STAMP_BUS_FUNCTIONS.
+ (bus_driver_t bf537_ezkit_bus): Likewise.
+ (bus_driver_t bf527_ezkit_bus): Likewise.
+
+2008-06-28 Kolja Waschk <kawk>
+
+ * data/sigma/smp8634/smp8634, data/sigma/smp8634/STEPPINGS,
+ data/sigma/PARTS, data/Makefile.am: Added Sigma SMP8634 (andi2k)
+ * doc/UrJTAG.txt: FAQ about CVS needed for autogen.sh and superuser
+ rights being needed for running "make install" (frankvh)
+
+2008-06-27 Arnim Laeuger <arniml>
+
+ * UrJTAG.txt: JTAGkey-Tiny
+
+ * UrJTAG.txt: update of bus driver init() function
+ * include/bus_driver.h, src/cmd/initbus.c, src/bus/bf548_ezkit.c,
+ src/bus/fjmem.c, src/bus/ppc405ep.c, src/bus/sh7727.c,
+ src/bus/prototype.c, src/bus/sa1110.c, src/bus/ppc440gx_ebc8.c,
+ src/bus/tx4925.c, src/bus/sh7750r.c, src/bus/pxa2x0.c,
+ src/bus/bf533_stamp.c, src/bus/bf533_ezkit.c, src/bus/bf537_stamp.c,
+ src/bus/ixp425.c, src/bus/avr32.c, src/bus/h7202.c,
+ src/bus/zefant-xs3.c, src/bus/mpc824x.c, src/bus/bcm1250.c,
+ src/bus/sharc21065l.c, src/bus/au1500.c, src/bus/lh7a400.c,
+ src/bus/sh7751r.c, src/bus/generic_bus.c, src/bus/mpc5200.c,
+ src/bus/jopcyc.c, src/bus/bf561_ezkit.c, src/bus/slsup3.c,
+ src/bus/s3c4510x.c, src/bus/ejtag.c, src/bus/generic_bus.h:
+ [ 1984813 ] Bus driver cleanup, separate (*init) and (*prepare)
+ functions (Hartley Sweeten)
+
+2008-06-24 Jie Zhang <jie.zhang@analog.com>
+
+ From Michael Hennerich <michael.hennerich@analog.com>
+ * src/tap/cable.c (ft2232_bfin_ujtag_cable_driver): Rename to ...
+ (ft2232_gnice_cable_driver): ... this.
+ (cable_drivers[]): Change accordingly.
+ * src/tap/cable/generic_usbconn.c
+ (usbconn_cable_bfin_ujtag_ftd2xx): Rename to ...
+ (usbconn_cable_gnice_ftd2xx): ... this.
+ (usbconn_cable_bfin_ujtag_ftdi): Rename to ...
+ (usbconn_cable_gnice_ftdi): ... this.
+ * src/tap/cable/ft2232.c (BIT_BFIN_UJTAG_nTRST): Rename to ...
+ (BIT_GNICE_nTRST): ... this.
+ (BIT_BFIN_UJTAG_nLED): Rename to ...
+ (BIT_GNICE_nLED): ... this.
+ (BITMASK_BFIN_UJTAG_nTRST): Rename to ...
+ (BITMASK_GNICE_nTRST): ... this.
+ (BITMASK_BFIN_nLED): Rename to ...
+ (BITMASK_GNICE_nLED): ... this.
+ (ft2232_bfin_urjtag_init): Rename to ...
+ (ft2232_gnice_init): ... this.
+ (ft2232_bfin_urjtag_done): Rename to ...
+ (ft2232_gnice_done): ... this.
+ (usbconn_cable_bfin_ujtag_ftdi): Rename to ...
+ (usbconn_cable_gnice_ftdi): ... this.
+ (ft2232_usbcable_help): Change accordingly.
+ (ft2232_bfin_ujtag_cable_driver): Rename to ...
+ (ft2232_gnice_cable_driver): ... this.
+ (usbconn_cable_bfin_ujtag_ftdi): Rename to ...
+ (usbconn_cable_gnice_ftdi): ... this.
+ (usbconn_cable_bfin_ujtag_ftd2xx): Rename to ...
+ (usbconn_cable_gnice_ftd2xx): ... this.
+ * po/fr.po: Update.
+ * po/rw.po: Update.
+ * po/sk.po: Update.
+
+2008-06-21 Arnim Laeuger <arniml>
+
+ * src/bus/bf548_ezkit.c, src/bus/fjmem.c, src/bus/ppc405ep.c,
+ src/bus/sh7727.c, src/bus/prototype.c, src/bus/sa1110.c,
+ src/bus/ppc440gx_ebc8.c, src/bus/tx4925.c, src/bus/sh7750r.c,
+ src/bus/pxa2x0.c, src/bus/bf533_stamp.c, src/bus/bf533_ezkit.c,
+ src/bus/bf537_stamp.c, src/bus/ixp425.c, src/bus/h7202.c,
+ src/bus/mpc824x.c, src/bus/bcm1250.c, src/bus/sharc21065l.c,
+ src/bus/au1500.c, src/bus/lh7a400.c, src/bus/sh7751r.c,
+ src/bus/generic_bus.c, src/bus/mpc5200.c, src/bus/bf561_ezkit.c,
+ src/bus/slsup3.c, src/bus/generic_bus.h:
+ [ 1984813 ] Bus driver cleanup, generic_bus_prepare function for
+ all bus drivers that just load the EXTEST instruction
+ (Hartley Sweeten)
+
+2008-06-18 Arnim Laeuger <arniml>
+
+ * include/bus_driver.h, src/bus/bf548_ezkit.c, src/bus/fjmem.c,
+ src/bus/ppc405ep.c, src/bus/sh7727.c, src/bus/prototype.c,
+ src/bus/sa1110.c, src/bus/ppc440gx_ebc8.c, src/bus/tx4925.c,
+ src/bus/sh7750r.c, src/bus/pxa2x0.c, src/bus/bf533_stamp.c,
+ src/bus/bf533_ezkit.c, src/bus/bf537_stamp.c, src/bus/ixp425.c,
+ src/bus/avr32.c, src/bus/h7202.c, src/bus/zefant-xs3.c,
+ src/bus/mpc824x.c, src/bus/bcm1250.c, src/bus/sharc21065l.c,
+ src/bus/au1500.c, src/bus/lh7a400.c, src/bus/sh7751r.c,
+ src/bus/mpc5200.c, src/bus/jopcyc.c, src/bus/bf561_ezkit.c,
+ src/bus/slsup3.c, src/bus/s3c4510x.c, src/bus/ejtag.c:
+ [ 1984813 ] Bus driver cleanup, uniquify chain and part in
+ bus_t struct (Hartley Sweeten)
+
+2008-06-16 Arnim Laeuger <arniml>
+
+ * src/cmd/initbus.c (cmd_initbus_run),
+ src/cmd/initbus.c, src/bus/bf548_ezkit.c, src/bus/fjmem.c,
+ src/bus/ppc405ep.c, src/bus/sh7727.c, src/bus/prototype.c,
+ src/bus/sa1110.c, src/bus/ppc440gx_ebc8.c, src/bus/tx4925.c,
+ src/bus/sh7750r.c, src/bus/pxa2x0.c, src/bus/bf533_stamp.c,
+ src/bus/bf533_ezkit.c, src/bus/bf537_stamp.c, src/bus/ixp425.c,
+ src/bus/avr32.c, src/bus/h7202.c, src/bus/zefant-xs3.c,
+ src/bus/mpc824x.c, src/bus/bcm1250.c, src/bus/sharc21065l.c,
+ src/bus/au1500.c, src/bus/lh7a400.c, src/bus/sh7751r.c,
+ src/bus/mpc5200.c, src/bus/jopcyc.c, src/bus/bf561_ezkit.c,
+ src/bus/slsup3.c, src/bus/s3c4510x.c, src/bus/ejtag.c:
+ [ 1984813 ] Bus driver cleanup, remove unnecessary sanity checking
+ (Hartley Sweeten)
+
+2008-06-11 Arnim Laeuger <arniml>
+
+ * po/fr.po, po/rw.po, po/sk.po: updated
+
+ * src/tap/cable/generic.c (fmax): define fallback in case libm doesn't
+ provide fmax()
+ * configure.ac: detect availability of fmax() in libm
+
+ * src/bus/bf548_ezkit.c, src/bus/ppc405ep.c, src/bus/sh7727.c,
+ src/bus/sa1110.c, src/bus/ppc440gx_ebc8.c, src/bus/tx4925.c,
+ src/bus/sh7750r.c, src/bus/pxa2x0.c, src/bus/bf533_stamp.c,
+ src/bus/bf533_ezkit.c, src/bus/bf537_stamp.c, src/bus/ixp425.c,
+ src/bus/h7202.c, src/bus/mpc824x.c, src/bus/bcm1250.c,
+ src/bus/sharc21065l.c, src/bus/au1500.c, src/bus/lh7a400.c,
+ src/bus/sh7751r.c, src/bus/mpc5200.c, src/bus/jopcyc.c,
+ src/bus/bf561_ezkit.c, src/bus/slsup3.c, src/bus/s3c4510x.c:
+ [ 1984813 ] Bus driver cleanup, second step of part 2) (Hartley Sweeten)
+ use generic_bus_attach_sig() in all bus drivers
+
+2008-06-10 Arnim Laeuger <arniml>
+
+ * src/bus/generic_bus.c, src/bus/generic_bus.h, src/bus/zefant-xs3.c:
+ [ 1984813 ] Bus driver cleanup, first step of part 2) (Hartley Sweeten)
+ generic_bus_attach_sig() added
+
+ * src/bus/au1500.c, src/bus/avr32.c, src/bus/bcm1250.c,
+ src/bus/bf533_ezkit.c, src/bus/bf533_stamp.c, src/bus/bf537_stamp.c,
+ src/bus/bf548_ezkit.c, src/bus/bf561_ezkit.c, src/bus/ejtag.c,
+ src/bus/fjmem.c, src/bus/generic_bus.c, src/bus/generic_bus.h,
+ src/bus/h7202.c, src/bus/ixp425.c, src/bus/jopcyc.c,
+ src/bus/lh7a400.c, src/bus/mpc5200.c, src/bus/mpc824x.c,
+ src/bus/ppc405ep.c, src/bus/ppc440gx_ebc8.c, src/bus/prototype.c,
+ src/bus/pxa2x0.c, src/bus/s3c4510x.c, src/bus/sa1110.c,
+ src/bus/sh7727.c, src/bus/sh7750r.c, src/bus/sh7751r.c,
+ src/bus/sharc21065l.c, src/bus/slsup3.c, src/bus/tx4925.c,
+ src/bus/zefant-xs3.c:
+ [ 1984813 ] Bus driver cleanup, second step of part 4) (Hartley Sweeten)
+ generic_bus_read() added
+
+2008-06-09 Arnim Laeuger <arniml>
+
+ * src/bus/bf548_ezkit.c, src/bus/fjmem.c, src/bus/ppc405ep.c,
+ src/bus/sh7727.c, src/bus/prototype.c, src/bus/sa1110.c,
+ src/bus/ppc440gx_ebc8.c, src/bus/tx4925.c, src/bus/sh7750r.c,
+ src/bus/pxa2x0.c, src/bus/bf533_stamp.c, src/bus/bf533_ezkit.c,
+ src/bus/bf537_stamp.c, src/bus/ixp425.c, src/bus/avr32.c,
+ src/bus/h7202.c, src/bus/zefant-xs3.c, src/bus/mpc824x.c,
+ src/bus/bcm1250.c, src/bus/sharc21065l.c, src/bus/au1500.c,
+ src/bus/lh7a400.c, src/bus/sh7751r.c, src/bus/mpc5200.c,
+ src/bus/jopcyc.c, src/bus/bf561_ezkit.c, src/bus/slsup3.c,
+ src/bus/s3c4510x.c, src/bus/ejtag.c:
+ [ 1984813 ] Bus driver cleanup, first step of part 4) (Hartley Sweeten)
+
+ * src/svf/svf_flex.l, src/flash/flash.c (flashmem):
+ avoid '\r' in i18n strings (Hartley Sweeten)
+ * po/fr.po, po/rw.po, po/sk.po: remove '\r'
+
+2008-06-06 Kolja Waschk <kawk>
+
+ * src/bus/bcm1250.c: Allow for 8 IO_CS_L signals, not just 7
+ (Hartley Sweeten)
+
+ * src/bus/bf548_ezkit.c, src/bus/fjmem.c, src/bus/ppc405ep.c,
+ src/bus/sh7727.c, src/bus/prototype.c, src/bus/sa1110.c,
+ src/bus/ppc440gx_ebc8.c, src/bus/sh7750r.c, src/bus/tx4925.c,
+ src/bus/pxa2x0.c, src/bus/bf533_stamp.c, src/bus/bf533_ezkit.c,
+ src/bus/bf537_stamp.c, src/bus/ixp425.c, src/bus/avr32.c,
+ src/bus/zefant-xs3.c, src/bus/h7202.c, src/bus/mpc824x.c,
+ src/bus/bcm1250.c, src/bus/sharc21065l.c, src/bus/au1500.c,
+ src/bus/lh7a400.c, src/bus/sh7751r.c, src/bus/generic_bus.c,
+ src/bus/mpc5200.c, src/bus/jopcyc.c, src/bus/Makefile.am,
+ src/bus/slsup3.c, src/bus/bf561_ezkit.c, src/bus/s3c4510x.c,
+ src/bus/ejtag.c, src/bus/generic_bus.h: [ 1984813 ] Bus driver
+ cleanup: Unified *bus_free functions and moved them to new
+ src/bus/generic_bus.c/h (Hartley Sweeten)
+
+2008-06-05 Arnim Laeuger <arniml>
+
+ * src/tap/usbconn/libftdi.c: issue device reset in usbconn_ftdi_open(), fixes
+ hang of FT245 chip when initializing the cable more than once
+ * src/tap/cable/usbblaster.c: split get_tdo and transfer functions into schedule
+ finish parts for deeper queueing with extended flush function
+
+2008-06-05 Kolja Waschk <kawk>
+
+ * src/bus/bf548_ezkit.c, src/bus/fjmem.c, src/bus/ppc405ep.c,
+ src/bus/sh7727.c, src/bus/prototype.c, src/bus/sa1110.c,
+ src/bus/ppc440gx_ebc8.c, src/bus/sh7750r.c, src/bus/tx4925.c,
+ src/bus/pxa2x0.c, src/bus/bf533_stamp.c, src/bus/bf533_ezkit.c,
+ src/bus/bf537_stamp.c, src/bus/ixp425.c, src/bus/avr32.c,
+ src/bus/zefant-xs3.c, src/bus/h7202.c, src/bus/mpc824x.c,
+ src/bus/bcm1250.c, src/bus/sharc21065l.c, src/bus/au1500.c,
+ src/bus/lh7a400.c, src/bus/sh7751r.c, src/bus/mpc5200.c,
+ src/bus/jopcyc.c, src/bus/slsup3.c, src/bus/bf561_ezkit.c,
+ src/bus/s3c4510x.c, src/bus/ejtag.c: Partial [ 1984813 ]
+ Bus driver cleanup: Changed mallocs to callocs, added (NULL) pointer
+ for *init to the drivers where it was missing (Hartley Sweeten)
+
+2008-05-29 Kolja Waschk <kawk>
+
+ * src/tap/cable/wiggler.c src/tap/cable/generic_usbconn.c,
+ src/tap/cable/usbblaster.c, src/tap/cable/vision_ep9307.c,
+ src/tap/cable/jim.c, src/tap/cable/ft2232.c,
+ src/tap/cable/generic_parport.c: More malloc/free cleanup
+ in cable drivers (Hartley Sweeten)
+
+2008-05-28 Kolja Waschk <kawk>
+
+ * src/cmd/cable.c, src/tap/cable/wiggler.c,
+ src/tap/cable/generic_usbconn.c, src/tap/cable/vision_ep9307.c,
+ src/tap/cable/jim.c, src/tap/cable/ft2232.c,
+ src/tap/cable/usbblaster.c, src/tap/cable/generic_parport.c: Cable
+ connect/disconnect cleanup, fix malloc/free issues (Hartley Sweeten)
+
+2008-05-27 Arnim Laeuger <arniml>
+
+ * UrJTAG.txt: document progress option of svf command
+ * src/cmd/svf.c (cmd_svf_run): new command option 'progress'
+ * src/svf/svf.c (svf_run), include/svf.h (svf_run): new parameter
+ print_progress
+ * src/svf/svf_flex.l (fix_yylloc_nl): report line / total number
+
+2008-05-26 Arnim Laeuger <arniml>
+
+ [adding svf progress output] (Steve Franks)
+ * src/svf/svf_bison.y (svf_bison_init): hand down parameters for scanner
+ initialization
+ * src/svf/svf_flex.l: output progress indicator upon newline detection
+ * src/svf/svf.c (svf_run): caluclate number of lines and pass result
+ to scanner initialization
+ * src/svf/svf.h: added "extra" data type for scanner
+
+2008-05-26 Kolja Waschk <kawk>
+
+ * src/bus/avr32.c, src/bus/buses.c, src/bus/buses.h,
+ src/bus/Makefile.am, src/flash/amd.c, THANKS, configure.ac,
+ doc/UrJTAG.txt, data/atmel/at32ap7000, data/atmel/at32ap7000/at32ap7000,
+ data/atmel/at32ap7000/STEPPINGS, data/atmel/PARTS, data/Makefile.am:
+ add support for Atmel's AT32AP7000 (by Gabor Juhos)
+
+2008-05-24 Arnim Laeuger <arniml>
+
+ * src/tap/cable/usbblaster.c (usbblaster_connect): added missing
+ malloc for cable_params
+
+2008-05-23 Mike Frysinger <vapier@gentoo.org>
+
+ * data/analog/PARTS: Add BF526 id.
+
+2008-05-21 Jie Zhang <jie.zhang@analog.com>
+
+ [ 1951767 ] bsdl2jtag cannot parse some bsdl files
+ * src/bsdl2jtag.c (endline): Prevent `:' from being scanned in.
+
+2008-05-21 Jie Zhang <jie.zhang@analog.com>
+
+ [ 1968455 ] Enter UPDATE state after register shift
+ * include/chain.h (EXITMODE_UPDATE): Define.
+ * src/tap/tap.c (tap_defer_shift_register): Enter Update-DR
+ or Update-IR when requested.
+
+2008-05-20 Arnim Laeuger <arniml>
+
+ * src/tap/cable/ft2232.c, src/tap/cable/usbblaster.c:
+ typo in help string fixed
+ * src/tap/cable/ft2232.c, src/tap/cable/usbblaster.c:
+ run on top of usbconn drivers
+ * src/tap/cable/cmd_xfer.c, src/tap/cable/cmd_xfer.h:
+ provide command queueing functions to ft2232.c and usbblaster.c
+ * src/tap/usbconn/libftd2xx.c, src/tap/usbconn/libftdi.c,
+ include/usbconn/libftdx.h, src/tap/parport/ftdi.c,
+ src/tap/parport/ftd2xx.c, src/tap/parport.c, src/tap/Makefile.am,
+ src/tap/usbconn.c, src/tap/cable/generic_usbconn.c,
+ src/tap/cable/generic_usbconn.h, doc/UrJTAG.txt:
+ ftdi & ftd2xx drivers ported from parport to usbconn
+ * src/tap/usbconn/libusb.c, include/usbconn.h: added read and write
+ * configure.ac: --enable-parport renamed to --enable-lowlevel
+ respective renaming for Makefile and C macros
+
+2008-05-13 Kolja Waschk <kawk>
+
+ * src/tap/cable/generic_usbconn.c: Read VID/PID as hexadecimal, fixes
+ Bug [1962628] VID/PID for usbconn cables are parsed as decimal
+
+2008-05-12 Kolja Waschk <kawk>
+
+ * doc/jtag.1: Explanation of [file] argument, correct location
+ of rc file (thanks Steve Franks for noticing)
+
+2008-05-09 Mike Frysinger <vapier@gentoo.org>
+
+ * data/analog/PARTS, data/Makefile.am, data/analog/bf527/:
+ Rename BF527c to BF527 and relocate files as appropriate.
+ * data/analog/PARTS, data/Makefile.am, data/analog/bf548/:
+ Rename BF549 to BF548 and relocate files as appropriate.
+ * data/analog/bf527/STEPPINGS: Add support for bf527 0.1.
+
+2005-05-06 Kolja Waschk <kawk>
+
+ * acinclude.m4, src/cmd/cmd.c, src/jtag.c:
+ Update for [ 1940323 ] OS X support for UrJTAG (by Ville Voipio)
+
+2008-05-05 Mike Frysinger <vapier@gentoo.org>
+
+ * src/svf/svf.c: Fix __MINGW32__ typo.
+ * src/flash/amd.c: Remove _() around part names.
+ * src/flash/amd_flash.c: Likewise.
+ * src/lib/safe-ctype.c: Include from libiberty as it is needed on some
+ non-POSIX ports (like mingw).
+ * src/cmd/include.c (cmd_include_or_script_run): Add handling of absolute
+ paths under Windows that take the form <letter>:\.
+ * sysdep.h, src/flash/amd.c, src/flash/amd_flash.c, src/jtag.c: Move some
+ Windows stub functions to sysdep.h so we don't have to redeclare them in
+ every single file and so we don't trigger future bitrot.
+
+2008-05-04 Mike Frysinger <vapier@gentoo.org>
+
+ * src/flash/amd.c: Handle chipid 0x22ed M29W640DT.
+
+2008-05-02 Arnim Laeuger <arniml>
+
+ * src/tap/cable/generic_usbconn.c (generic_usbconn_connect):
+ fix user_specified.driver comparison
+
+2008-05-01 Mike Frysinger <vapier@gentoo.org>
+
+ * configure.ac: Check for libusb before libftdi since the latter needs
+ the former.
+ * configure.ac: Use AC_PATH_TOOL() instead of AC_PATH_PROG() so that we
+ handle cross-compiling sanely.
+ * configure.ac: Make LIBS/CPPFLAGS sane and consistent when checking for
+ libusb and libftdi.
+ * configure.ac: Use POSIX compliant tests for equality ("=", not "==").
+
+2008-04-26 Kolja Waschk <kawk>
+
+ * src/flash/amd.c: Separate Chip name by Manufacturer (Andrey F. Ilchuk)
+
+2008-04-24 Mike Frysinger <vapier@gentoo.org>
+
+ * src/tap/usbconn/libusb.c (usbconn_libusb_connect): Use the
+ usb_get_busses() function rather than the usb_busses global
+ variable due to portability issues (like with libusb-win32).
+ * src/jtag.c (jtag_readline_loop): [ 1950315 ] Fix quiting when
+ using the non readline version.
+ * configure.ac: [ 1950061 ] Look for the ChangeLog in $srcdir.
+
+2008-04-19 Kolja Waschk <kawk>
+
+ * src/tap/parport/ftd2xx.c: SetBaudRate to 3E6, not 48E6. Should
+ fix [ 1925509 ] ftd2xx: SetBaudRate fails with FT245
+ * src/flash/intel.c: Handle chips that support "Mitsubishi
+ standard/enhanced command set" just like Intel chips. Need
+ to do more research about the differences (if any) [1946559]
+ * src/tap/cable/usbblaster.c: clock() at highest possible rate
+ using the byte shift mode for n>=8 (Thanks M. Banditt)
+ * include/cmd.h, src/cmd/cmd.c, src/jtag.c: [ 1946331 ] command
+ completion support (by Mike Frysinger)
+ * configure.ac, acinclude.m4: [ 1946114 ] make AC_PROG_SED
+ workaround sane (Mike Frysinger)
+ * include/jtag.h, src/cmd/detect.c, src/tap/detect.c:
+ [ 1946119 ] fixup relocatable jtag in detection (M.Frysinger)
+ * src/cmd/frequency.c: ensure that cable is initialized. Fixes
+ [ 1933736 ] "frequency" command segfaults without args
+
+2008-04-19 Arnim Laeuger <arniml>
+
+ * src/bsdl/Makefile.am, src/svf/Makefile.am: ensure that
+ bsdl_bison.h is generated prior to compiling bsdl_flex.c and
+ bsdl_bison.c
+ [ 1943435 ] fixup bsdl parallel build issue (part2)
+
+2008-04-13 Kolja Waschk <kawk>
+
+ * src/tap/parport/ftd2xx.c, src/tap/usbconn/libusb.c, src/lib/fclock.c,
+ src/jtag.c, src/flash/amd_flash.c, src/flash/amd.c, src/flash/jedec.c,
+ src/svf/svf.c, configure.ac, doc/UrJTAG.txt: Provide variants of
+ usleep, frealtime, mkdir for [ 1838732 ] EXE built with MinGW
+
+2008-04-11 Kolja Waschk <kawk>
+
+ * src/bsdl/bsdl.c, src/tap/parport/ftd2xx.c, src/tap/parport/ftdi.c,
+ src/tap/usbconn/libusb.c, src/lib/fclock.c, src/jtag.c:
+ [ 1940323 ] OS X support for UrJTAG (by Ville Voipio)
+
+2008-04-11 Arnim Laeuger <arniml>
+
+ * src/tap/parport/ftdi.c (ftdi_flush_output): removed unused variables
+
+2008-04-11 Jie Zhang <jie.zhang@analog.com>
+
+ From Michael Hennerich <michael.hennerich@analog.com>
+ * src/tap/parport/ftdi.c (ftdi_generic_open): Detect
+ BFIN-UJTAG cable.
+ * src/tap/cable.c (ft2232_bfin_ujtag_cable_driver): Declare.
+ (cable_drivers): Add ft2232_bfin_ujtag_cable_driver.
+ * src/tap/cable/ft2232.c (BIT_BFIN_UJTAG_nTRST,
+ BIT_BFIN_UJTAG_nLED, BITMASK_BFIN_UJTAG_nTRST,
+ BITMASK_BFIN_UJTAG_nLED): Define.
+ (ft2232_bfin_ujtag_init): New.
+ (ft2232_bfin_ujtag_done): New.
+ (ft2232_bfin_ujtag_cable_driver): Define.
+
+2008-04-10 Jie Zhang <jie.zhang@analog.com>
+
+ * src/flash/flash.c (flashmem): Show the address when verifying.
+ Show the end address when program and verify complete.
+
+2008-04-10 Jie Zhang <jie.zhang@analog.com>
+
+ From Stefan Pledl <stefan.pledl@mesutronic.de>
+ * src/bsdl2jtag.c (endline): Set mode to 0 for INSTRUCTION_LENGTH
+ and BOUNDARY_LENGTH attributes.
+ * data/atmel/atf15xx/STEPPINGS: New file.
+ * data/atmel/atf15xx/atf1504asv: New file.
+ * data/atmel/PARTS: Add atf15xx.
+ * data/Makefile.am (nobase_dist_pkgdata_DATA): Add
+ atmel/atf15xx/STEPPINGS and atmel/atf15xx/atf1504asv.
+
+2008-04-09 Jie Zhang <jie.zhang@analog.com>
+
+ * src/bus/bf537_stamp.c (bf537_stamp_bus_new_1): Renamed
+ from bf537_stamp_bus_new, but don't set driver.
+ (bf537_stamp_bus_new): Call bf537_stamp_bus_new_1 and
+ set driver here.
+ (bf537_ezkit_bus_new): Likewise.
+ (bf527_ezkit_bus_new): Likewise.
+ (bf537_ezkit_bus): Replace bf537_stamp_bus_new with
+ bf537_ezkit_bus_new.
+ (bf527_ezkit_bus_printinfo): New.
+ (bf527_ezkit_bus): Define.
+ * src/bus/buses.c (bus_drivers[]): Add bf527_ezkit_bus.
+ * src/bus/buses.h (bf527_ezkit_bus): Declare.
+ * src/bus/Makefile.am (libbus_a_SOURCES): Add bf537_stamp.c
+ if ENABLE_BUS_BF527_EZKIT. Allow ENABLE_BUS_BF537_EZKIT
+ independent on ENABLE_BUS_BF537_STAMP.
+ * configure.ac: Add bf527_ezkit.
+ * data/Makefile.am (nobase_dist_pkgdata_DATA): Add
+ analog/bf527c/STEPPINGS and analog/bf527c/bf527c.
+ * data/analog/bf527c/bf527c: New file.
+ * data/analog/bf527c/STEPPINGS: New file.
+ * data/analog/PARTS: Add bf527c.
+
+2008-04-09 Michael Hennerich <michael.hennerich@analog.com>
+
+ * data/analog/bf537/STEPPINGS: Add stepping 3.
+
+2008-04-08 Arnim Laeuger <arniml>
+
+ * src/bsdl/bsdl_flex.l (bsdl_flex_deinit): close file if still open
+
+2008-04-08 Kolja Waschk <kawk>
+
+ * src/cmd/idcode.c: [ 1936543 ] Check for set-up cable in idcode (U.Bonnes)
+
+2008-04-05 Kolja Waschk <kawk>
+
+ * src/tap/cable/usbblaster.c: [ 1934843 ] Fix for USBBLASTER (U.Bonnes)
+ * src/jtag.c: [ 1933141 ] Don't add duplicate history lines (U.Bonnes)
+
+2008-04-03 Kolja Waschk <kawk>
+
+ * src/jtag.c: Optionally use JTAG_PROMPT environment setting for
+ prompt instead of "jtag>" (by Mike Frysinger)
+
+ * include/jtag.h, src/cmd/jtag_data_dir.c, src/cmd/include.c,
+ src/cmd/Makefile.am, src/bsdl/Makefile.am, src/bsdl/bsdl_flex.l,
+ src/lib/make-relative-prefix.c, src/lib/safe-ctype.h,
+ src/lib/lbasename.c, src/lib/Makefile.am, src/lib/filenames.h,
+ src/lib/lrealpath.c, src/jtag.c, configure.ac:
+ [ 1916428 ] support runtime-relocatable urjtag (by Mike Frysinger)
+
+ * include/jtag.h, src/cmd/cmd.c, src/cmd/idcode.c, src/cmd/Makefile.am,
+ src/tap/parport/ftdi.c, src/tap/idcode.c, src/tap/Makefile.am, THANKS:
+ [ 1933730 ] new "idcode" command (by Uwe Bonnes)
+
+2008-04-03 Arnim Laeuger <arniml>
+
+ [ 1929235 ] Use less global and static variables:
+ * src/bus/jopcyc.c, src/bus/zefant-xs3.c: made global variable
+ last_address local
+ * src/svf/svf.c, src/svf/svf.h: support reentrant parser and scanner
+ * src/svf/svf_bison.y: provisions for reentrant parser
+ * src/svf/svf_flex.l: made scanner reentrant
+ * src/svf/Makefile.am: removed command line options for
+ bison and flex
+ * configure.ac: require flex 2.5.33 also for SVF scanner
+ * doc/UrJTAG.txt: document flex version for SVF scanner
+
+2008-04-02 Arnim Laeuger <arniml>
+
+ [ 1929235 ] Use less global and static variables:
+ * src/bsdl/bsdl.c, src/cmd/bsdl.c: use globals from chain_t
+ * src/tap/chain.c (chain_alloc): init BSDL globals
+ * include/chain.h: added bsdl_globs_t to chain_t
+ * include/bsdl.h: defined structure for BSDL globals
+ * src/bsdl/Makefile.am, src/bsdl/bsdl_sem.c, src/bsdl/bsdl_flex.l,
+ src/bsdl/bsdl_bison.y, src/bsdl/bsdl.c, src/bsdl/bsdl_local.h:
+ renamed bsdl.h to bsdl_local.h
+
+2008-04-01 Arnim Laeuger <arniml>
+
+ [ 1887221 ] Add configure switch to disable all cable&parport drivers:
+ * doc/UrJTAG.txt: updates for new options and summary reporting
+ * src/tap/parport.c: reworked driver referencing based on
+ ENABLE_PARPORT_* macros
+ * src/tap/cable.c: reworked driver referencing based on
+ ENABLE_CABLE_* macros
+ * src/tap/Makefile.am (libtap_a_SOURCES): include sources based on
+ ENABLE_CABLE_* and ENABLE_PARPORT_* macros
+ * src/bus/buses.c: reference bus drivers based on ENABLE_BUS_* macros
+ * src/bus/buses.h: sorted sequence of extern declarations
+ * src/bus/Makefile.am (libbus_a_SOURCES): include sources based on
+ ENABLE_BUS_* macros
+ * src/Makefile.am (jtag_LDADD): moved -lcmd to top of list to prevent
+ linker error for --enable-cable=jim
+ * configure.ac: added switches --enable-bus, --enable-cable and enable-parport
+ removed (superseeded) --enable-jim and --enable-ep9307
+
+2008-03-26 Kolja Waschk <kawk>
+
+ * src/flash/amd.c: Fix address shift (Jeff Wittrock)
+
+2008-03-15 Jie Zhang <jie.zhang@analog.com>
+
+ * include/jtag.h (jtag_parse_line): Declare.
+ (jtag_parse_stream): Declare.
+ * src/discovery.c: Move ...
+ * src/tap/discovery.c: ... here.
+ * src/detect.c: Move ...
+ * src/tap/detect.c: ... here.
+ * src/tap/Makefile.am (libtap_a_SOURCES): Add detect.c and
+ discovery.c.
+ * src/readmem.c: Move ...
+ * src/bus/readmem.c: ... here.
+ * src/writemem.c: Move ...
+ * src/bus/writemem.c: ... here.
+ * src/bus/Makefile.am (libbus_a_SOURCES): Add readmem.c and
+ writemem.c.
+ * src/flash.c: Move ...
+ * src/flash/flash.c: ... here.
+ * src/flash/Makefile.am (libflash_a_SOURCES): Add flash.c.
+ * src/jtag.c (get_token, jtag_parse_line, jtag_parse_stream,
+ jtag_parse_file): Move to ...
+ * src/cmd/parse.c: ... here.
+ * src/cmd/Makefile.am (libbus_a_SOURCES): Add parse.c.
+ * src/Makefile.am (jtag_SOURCES): Remove detect.c, discovery.c,
+ readmem.c, writemem.c and flash.c.
+ (jtag_LDADD): Add -ltap and -lflash one more time to resolve
+ undefined references.
+
+ * po/POTFILES.in: Update according to the changes above.
+ * po/fr.po, po/rw.po, po/sk.po: Update.
+
+2008-03-14 Arnim Laeuger <arniml>
+
+ * configure.ac: format AC_ARG_ENABLE help with AS_HELP_STRING macro
+
+2008-03-13 Kolja Waschk <kawk>
+
+ * po/POTFILES.in: Sorted and updated to fix [1904952] Missing xpcu_pp.c
+ prevents "make urjtag.pot-update"
+ * po/fr.po, po/rw.po, po/sk.po: Updated
+
+2008-03-10 Arnim Laeuger <arniml>
+
+ [ 1911429 ] Read TDO data from instruction shift:
+ * doc/UrJTAG.txt: removed note about SIR deficiency
+ * src/svf/svf.c (svf_sxr): request TDO capture for SIR when command specifies TDO paramters
+ * src/tap/chain.c (chain_shift_instructions_mode): use defered shifting and capture TDO
+ output when requested
+ * src/part/instruction.c (instruction_alloc): allocate tap_register out
+ * include/chain.h: parameter capture_output added to chain_shift_instructions_mode()
+ * include/instruction.h: tap_register out added
+
+2008-03-03 Arnim Laeuger <arniml>
+
+ * src/tap/parport/ftd2xx.c (ftd2xx_mpsse_open): fix FT_SetChar() parameters
+ * doc/UrJTAG.txt: fix some typos
+
+2008-03-01 Arnim <arniml>
+
+ * src/tap/parport/ftdi.c (ftdi_mpsse_open): rework sequence to fix
+ a system that shows similar hangs as reported in
+ [ 1904970 ] JTAG operations hang with libftdi
+ * src/tap/parport/ftd2xx.c (ftd2xx_mpsse_open): align with ftdi.c
+
+2008-03-01 Kolja Waschk <kawk>
+
+ * src/tap/cable/jlink.c: Added VREF detection and a call to usb_reset()
+ when cable initialization failed
+ * src/tap/cable/xpc.c: Implemented much faster access method using GPIF
+ transfers via vendor request 0xA6. Reportedly works with DLC9 now.
+
+2008-02-28 Kolja Waschk <kawk>
+
+ * doc/UrJTAG.txt: Concretized list of supported USB cables.
+ * src/detect.c: Use "include" internally instead of "script", avoid errmsg
+
+2008-02-27 Kolja Waschk <kawk>
+
+ * src/tap/cable/generic.c (generic_flush_one_by_one): Always flush,
+ don't let the queue grow unnecessarily.
+
+2008-02-27 Jie Zhang <jie.zhang@analog.com>
+
+ * include/bus.h: Don't include chain.h.
+ * include/svf.h: Include chain.h.
+ (svf_run): Add a parameter to pass chain.
+ * include/cmd.h: Include chain.h.
+ (cmd_t): Add a parameter to pass chain for run.
+ (cmd_run, cmd_test_cable): Add a parameter to pass chain.
+ * include/bus_driver.h: Include chain.h.
+ (struct bus_driver): Add a parameter to pass chain for new_bus.
+ * include/bsdl.h: Include chain.h
+ (bsdl_read_file, bsdl_scan_files): Add a parameter to pass chain.
+ * include/jtag.h (chain): Don't declare.
+ (jtag_parse_file): Add a parameter to pass chain.
+ * src/bsdl/bsdl.c (bsdl_read_file): Add a parameter to pass chain.
+ Initialize parser_priv->jtag_ctrl.chain.
+ (bsdl_scan_files): Add a parameter to pass chain.
+ * src/bsdl/bsdl_sem.c (bsdl_set_instruction_length): Call cmd_run
+ with priv->jtag_ctrl.chain.
+ * src/bsdl/bsdl.h (struct jtag_ctrl): Add chain field.
+ * src/detect.c (detect_parts): Pass chain to bsdl_scan_files
+ and cmd_run.
+ * src/bus/bf548_ezkit.c (bf548_ezkit_bus_new): Add a parameter to
+ pass chain.
+ * src/bus/fjmem.c (fjmem_bus_new): Likewise.
+ * src/bus/ppc405ep.c (ppc405ep_bus_new): Likewise.
+ * src/bus/sh7727.c (sh7727_bus_new): Likewise.
+ * src/bus/prototype.c (prototype_bus_new): Likewise.
+ * src/bus/sa1110.c (sa1110_bus_new): Likewise.
+ * src/bus/ppc440gx_ebc8.c (ppc440gx_ebc8_bus_new): Likewise.
+ * src/bus/tx4925.c (tx4925_bus_new): Likewise.
+ * src/bus/sh7750r.c (sh7750r_bus_new): Likewise.
+ * src/bus/pxa2x0.c (pxa2x0_bus_new): Likewise.
+ (pxa27x_bus_new): Likewise.
+ * src/bus/bf533_stamp.c (bf533_stamp_bus_new): Likewise.
+ * src/bus/bf533_ezkit.c (bf533_ezkit_bus_new): Likewise.
+ * src/bus/bf537_stamp.c (bf537_stamp_bus_new): Likewise.
+ * src/bus/ixp425.c (ixp425_bus_new): Likewise.
+ * src/bus/h7202.c (h7202_bus_new): Likewise.
+ * src/bus/zefant-xs3.c (zefant_xs3_bus_new): Likewise.
+ * src/bus/bcm1250.c (bcm1250_bus_new): Likewise.
+ * src/bus/sharc21065l.c (sharc_21065L_bus_new): Likewise.
+ * src/bus/au1500.c (au1500_bus_new): Likewise.
+ * src/bus/lh7a400.c (lh7a400_bus_new): Likewise.
+ * src/bus/sh7751r.c (sh7751r_bus_new): Likewise.
+ * src/bus/mpc5200.c (mpc5200_bus_new): Likewise.
+ * src/bus/jopcyc.c (jopcyc_bus_new): Likewise.
+ * src/bus/slsup3.c (slsup3_bus_new): Likewise.
+ * src/bus/bf561_ezkit.c (bf561_ezkit_bus_new): Likewise.
+ * src/bus/s3c4510x.c (s3c4510_bus_new): Likewise.
+ * src/bus/ejtag.c (ejtag_bus_new): Likewise.
+ * src/bus/mpc824x.c (mpc824x_bus_new): Likewise.
+ (mpc824x_bus_write): Change chain to CHAIN.
+ * src/svf/svf.c (yyparse): Add a parameter to pass chain. And update
+ all call sites.
+ (svf_force_reset_state): Likewise.
+ (svf_goto_state): Likewise.
+ (svf_frequency): Likewise.
+ (svf_runtest): Likewise.
+ (svf_state): Likewise.
+ (svf_sxr): Likewise.
+ (svf_trst): Likewsie.
+ (svf_run): Likewise.
+ * src/svf/svf_bison.y (yyerror): Update declaration and call sites.
+ (chain): %parse-param.
+ * src/svf/svf.h: Include chain.h and update function declarations.
+ * src/cmd/endian.c (cmd_endian_run): Add a parameter to pass chain.
+ And update all call sites.
+ * src/cmd/frequency.c (cmd_frequency_run): Likewise.
+ * src/cmd/part.c (cmd_part_run): Likewise.
+ * src/cmd/salias.c (cmd_salias_run): Likewise.
+ * src/cmd/instruction.c (cmd_instruction_run): Likewise.
+ * src/cmd/quit.c (cmd_quit_run): Likewise.
+ * src/cmd/register.c (cmd_register_run): Likewise.
+ * src/cmd/debug.c (cmd_debug_run): Likewise.
+ * src/cmd/flashmem.c (cmd_flashmem_run): Likewise.
+ * src/cmd/svf.c (cmd_svf_run): Likewise.
+ * src/cmd/peekpoke.c (cmd_peek_run): Likewise.
+ (cmd_poke_run): Likewise.
+ * src/cmd/cmd.c (cmd_test_cable): Likewise.
+ (cmd_run): Likewise.
+ * src/cmd/dr.c (cmd_dr_run): Likewise.
+ * src/cmd/cable.c (cmd_cable_run): Likewise.
+ * src/cmd/shell.c (cmd_shell_run): Likewise.
+ * src/cmd/discovery.c (cmd_discovery_run): Likewise.
+ * src/cmd/detect.c (cmd_detect_run): Likewise.
+ * src/cmd/readmem.c (cmd_readmem_run): Likewise.
+ * src/cmd/signal.c (cmd_signal_run): Likewise.
+ * src/cmd/shift.c (cmd_shift_run): Likewise.
+ * src/cmd/initbus.c (cmd_initbus_run): Likewise.
+ * src/cmd/eraseflash.c (cmd_eraseflash_run): Likewise.
+ * src/cmd/bit.c (cmd_bit_run): Likewise.
+ * src/cmd/get.c (cmd_get_run): Likewise.
+ * src/cmd/test.c (cmd_test_run): Likewise.
+ * src/cmd/reset.c (cmd_reset_run): Likewise.
+ * src/cmd/include.c (cmd_include_or_script_run): Likewise.
+ (cmd_include_run): Likewise.
+ (cmd_script_run): Likewise.
+ * src/cmd/bsdl.c (cmd_bsdl_run): Likewise.
+ * src/cmd/scan.c (cmd_scan_run): Likewise.
+ * src/cmd/detectflash.c (cmd_detectflash_run): Likewise.
+ * src/cmd/help.c (cmd_help_run): Likewise.
+ * src/cmd/writemem.c (cmd_writemem_run): Likewise.
+ * src/cmd/bus.c (cmd_bus_run): Likewise.
+ * src/cmd/set.c (cmd_set_run): Likewise.
+ * src/cmd/print.c (cmd_print_run): Likewise.
+ * src/jtag.c (chain): Don't define.
+ (jtag_parse_line): Add a parameter to pass chain.
+ And update all call sites.
+ (jtag_readline_multiple_commands_support): Likewise.
+ (jtag_readline_loop): Likewise.
+ (jtag_parse_stream): Likewise.
+ (jtag_parse_file): Likewise.
+ (jtag_parse_rc): Likewise.
+ (cleanup): Likewise.
+ (main): Define a local chain.
+
+2008-02-26 Arnim Laeuger <arniml>
+
+ * src/tap/cable/ft2232.c (send_and_receive): loopback_off moved to ftdi.c/ftd2xx.c
+ * src/tap/parport/ftd2xx.c (ftd2xx_mpsse_open): set TCK, loopback_off, reset, purge
+ * src/tap/parport/ftdi.c (ftdi_mpsse_open): set TCK, loopback_off, reset, purge
+
+2008-02-24 Mike Frysinger <vapier>
+
+ * src/jtag.c: allow people to disable startup message (1901877),
+ quit upon EOF (1901880)
+
+2008-02-25 Arnim Laeuger <arniml>
+
+ * src/bus/fjmem.c (fjmem_bus_new): accept 'len' parameter to suppress
+ data register length detection
+
+2008-02-25 Kolja Waschk <kawk>
+
+ * include/usbconn/libusb.h, src/tap/cable/jlink.c: J-Link driver
+ doesn't use global variables anymore
+
+2008-02-25 Jie Zhang <jie.zhang@analog.com>
+
+ * src/bus/buses.c (bus_drivers): bf548_ezkit_bus.
+ * src/bus/buses.h: Declare bf548_ezkit_bus.
+
+ * include/flash/cfi.h (MAJOR_VERSION_OFFSET): New macro.
+ (MAJOR_VERSION_OFFSET): New macro.
+ (MINOR_VERSION_OFFSET): New macro.
+ (ADDRESS_SENSITIVE_UNLOCK_OFFSET): New macro.
+ (ERASE_SUSPEND_OFFSET): New macro.
+ (SECTOR_PROTECT_OFFSET): New macro.
+ (SECTOR_TEMPORARY_UNPROTECT_OFFSET): New macro.
+ (SECTOR_PROTECT_SCHEME_OFFSET): New macro.
+ (SIMULTANEOUS_OPERATION_OFFSET): New macro.
+ (BURST_MODE_TYPE_OFFSET): New macro.
+ (PAGE_MODE_TYPE_OFFSET): New macro.
+ (ACC_MIN_OFFSET): New macro.
+ (ACC_MAX_OFFSET): New macro.
+ (TOP_BOTTOM_SECTOR_FLAG_OFFSET): New macro.
+ (PROGRAM_SUSPEND_OFFSET): New macro.
+ (UNLOCK_BYPASS_OFFSET): New macro.
+ (SECSI_SECTOR_SIZE_OFFSET): New macro.
+ (EMBEDDED_HWRST_TIMEOUT_MAX_OFFSET): New macro.
+ (NON_EMBEDDED_HWRST_TIMEOUT_MAX_OFFSET): New macro.
+ (ERASE_SUSPEND_TIMEOUT_MAX_OFFSET): New macro.
+ (PROGRAM_SUSPEND_TIMEOUT_MAX_OFFSET): New macro.
+ (BANK_ORGANIZATION_OFFSET): New macro.
+ (BANK_REGION_INFO_OFFSET): New macro.
+ (struct amd_pri_extened_query_structure): Define.
+ (amd_pri_extened_query_structure_t): Typedef.
+ * src/flash/cfi.c (cfi_array_free): Free primary vendor table.
+ (cfi_detect): Detect AMD CFI primary vendor-specific extended
+ query table. Reverse the order of erase block region information
+ for top boot devices.
+ * src/flash/detectflash.c (detectflash): Print out information
+ of AMD CFI primary vendor-specific extended query table.
+
+2008-02-24 Kolja Waschk <kawk>
+
+ * include/cable.h, include/usbconn.h, include/usbconn/libusb.h,
+ src/tap/cable.c, src/tap/usbconn/libusb.c, src/tap/parport.c,
+ src/tap/usbconn.c, src/tap/Makefile.am: Merged code from usb_abstraction
+ branch, adding a "usbconn" link driver (similar to the existing
+ parport link driver) for USB cables.
+
+ * src/tap/cable/generic_parport.c, src/tap/cable/generic_parport.h,
+ src/tap/cable/generic_usbconn.h, src/tap/cable/generic_usbconn.c,
+ src/tap/cable/generic.c, src/tap/cable/generic.h: Separated link-specific
+ code from generic.c into addition source files for parport and usbconn
+
+ * src/tap/cable/wiggler.c, src/tap/cable/arcom.c, src/tap/cable/mpcbdm.c,
+ src/tap/cable/usbblaster.c, src/tap/cable/jlink.c, src/tap/cable/ea253.c,
+ src/tap/cable/vision_ep9307.c, src/tap/cable/triton.c, src/tap/cable/ei012.c,
+ src/tap/cable/byteblaster.c, src/tap/cable/wiggler2.c, src/tap/cable/dlc5.c,
+ src/tap/cable/ft2232.c, src/tap/cable/keithkoep.c, src/tap/cable/lattice.c:
+ Small modifications to adapt to the changes in cable.h and generic.h
+
+ * src/tap/cable/xpc.c, src/tap/parport/xpcu_pp.c, src/tap/parport/xpcu_common.c:
+ Xilinx Platform Cable USB driver now based on usbconn link driver
+
+ * src/tap/cable/jlink.c: New driver for Segger J-Link, Atmel SAM-ICE etc.
+ based on usbconn link driver
+
+ * doc/UrJTAG.txt: Added section about link drivers
+
+2008-02-24 Eugene Boldenkov <eugene_b>
+
+ * src/bus/mpc824x.c: Add 32-bit bus support (1900847)
+
+2008-02-24 Mike Frysinger <vapier>
+
+ * configure.ac: Fix building out of tree (1899908), only use libusb flags
+ as needed (1899930), provide flag about wchar.h presence (1899922)
+ * src/cmd/print.c: Fix dependency on wchar.h (1899922)
+
+2008-02-23 Arnim Laeuger <arniml>
+
+ * extra/fjmem/README: new file
+ * doc/UrJTAG.txt: mention fjmem driver, document bus driver internals
+ * src/svf/Makefile.am (svf_flex.o svf.o): fix dependencies to svf_bison.h
+ * src/bsdl/Makefile.am (bsdl_flex.o bsdl_sem.o): fix dependencies to bsdl_bison.h
+ -> resolves [ 1899911 ]
+ * src/tap/cable/ft2232.c (send_and_receive): only flush if not TO_OUTPUT
+ * src/tap/chain.c (chain_shift_data_registers_mode): flush TO_OUTPUT instead
+ of CONSERVATIVELY
+ * src/tap/cable.c (cable_flush), include/cable.h (enum): removed CONSERVATIVELY
+ * configure.ac: conservative-flush removed
+
+2008-02-21 Arnim Laeuger <arniml>
+
+ * src/tap/parport/ftdi.c (ftdi_mpsse_open): set latency timer to 16ms
+ * src/tap/parport/ftd2xx.c (ftd2xx_mpsse_open): set latency timer to 16ms
+ * src/tap/cable/ft2232.c (send_and_receive): issue SEND_IMMEDIATE command
+ when receive bytes were scheduled
+ * src/bsdl/bsdl_bison.y, src/bsdl/bsdl.h, src/bsdl/bsdl_flex.l, src/bsdl/bsdl.c:
+ push mode and debug through init tree to avoid error message from scanner
+ in simple test mode.
+ * src/bus/fjmem.c: merged branches/jmem to trunk
+ -> added fjmem bus driver
+
+2008-02-20 Arnim Laeuger <arniml>
+
+ * data/Makefile.am (nobase_dist_pkgdata_DATA): added bsdl/STD_1149_1_2001
+
+2008-02-20 Kolja Waschk <kawk>
+
+ Version 0.8 released.
+
+2008-02-20 Kolja Waschk <kawk>
+
+ * po/fr.po, po/sk.po, po/rw.po, POTFILES.in: Regenerated or updated
+
+2008-02-19 Arnim Laeuger <arniml>
+
+ * src/bsdl/bsdl_flex.l (bsdl_flex_set_bin_x), src/bsdl/bsdl.h,
+ src/bsdl/bsdl_bison.y (Init_Text): properly support COMPLIANCE_PATTERNS
+ -> fix for [ 1896382 ]
+
+2008-02-18 Arnim Laeuger <arniml>
+
+ * src/bsdl/bsdl.c, src/bsdl/bsdl_flex.l, src/bsdl/bsdl_bison.y,
+ src/bsdl/bsdl.h, src/bsdl/bsdl_sem.c: support quiet scanning of files
+ in include.c
+ * src/cmd/include.c (cmd_include_run): check and read file if it's BSDL
+ syntax -> [ 1895936 ]
+ * doc/UrJTAG.txt: add note about BSDL support in 'include'
+
+2008-02-18 Kolja Waschk <kawk>
+
+ * doc/UrJTAG.txt: How to use initbus (and ejtag/prototype bus driver)
+ and some other smaller updates in the "commands" section. Also
+ added note about unsupported spiflash* commands, and about now
+ obsolete script command (see below)
+ * Merged src/script.c into src/include.c. The command looks for the
+ specified file in the repository if it's neither an absolute path
+ nor begins with ./ or ../, otherwise it uses the filename as is.
+ When called as "script", the command behaves as before but emits
+ a warning that "include" should be used in future.
+
+2008-02-17 Arnim Laeuger <arniml>
+
+ * configure.ac: check for pre-generated src/svf/svf_flex.c
+ -> second part of [ 1895353 ]
+ * src/bsdl/Makefile.am (noinst_HEADERS): bsdl_sysdep.h added for proper
+ release packing -> first part of [ 1895353 ]
+
+2008-02-17 Kolja Waschk <kawk>
+
+ * doc/UrJTAG.txt: How to use USB cables. THANKS: some additions
+ * include/Makefile.am: Add jim.h and jim/some_cpu.h headers for distr.
+
+2008-02-16 Arnim Laeuger <arniml>
+
+ * src/tap/cable/ft2232.c (ft2232_flush): fix inconsistency of TDO caching
+ in ft2232_flush()
+ * THANKS: to the original SVF and BSDL parser programmers
+ * src/tap/cable/ft2232.c (ft2232_generic_init, ft2232_jtagkey_init, ft2232_armusbocd_init):
+ initialize mpsse frequency via ft2232_set_frequency()
+
+2008-02-16 Kolja Waschk <kawk>
+
+ * src/jtag.c, src/tap/chain.c, include/chain.h: Always flush immediately
+ after each command when used interactively
+ * src/cmd/scan.c, src/cmd/Makefile.am, src/cmd/cmd.c: Implemented basic
+ boundary "scan" command to detect changes on input pins; tested with
+ an (completely erased) Actel ProASIC3 A3P125
+ * src/svf/svf.c: Small fix for computation of run_count from min_time
+ * doc/UrJTAG.txt: Updated doc about building with FTD2XX in Cygwin
+ * src/tap/cable.c, include/cable.h, src/tap/cable/*.c (all drivers):
+ moved cable_set_frequency functionality from cable.c to the cable
+ drivers, to fix [ 1836319 ] Delay loop calibration takes ages
+ * src/tap/cable.c: Include ftdi-based cable drivers if either libftdi or
+ FTDI's FTD2XX (CDM) drivers are present (--with-ftd2xx)
+ * src/flash/Makefile.am, src/flash/jedec_exp.c, src/flash/detectflash.c,
+ configure.ac: Experimental new code for flash detection, to be enabled
+ during configuration with --enable-jedec-exp (disabled by default)
+ * src/bus/s3c4510x.c: disable debug output (was enabled in 929..), do a
+ chain_shift_data_registers before trying to read b0size (fixes the
+ old problem of B0SIZE unknown, needed for proper flash detection)
+ * include/register.h, src/tap/register.c, src/discovery.c: report if tdo
+ seems to be stuck during detect_register_size (ie. "detect").
+
+2008-02-14 Arnim Laeuger <arniml>
+
+ * src/tap/cable.c (cable_flush), src/tap/chain.c (chain_shift_data_registers_mode),
+ include/cable.h, configure.ac: follow conservative flush strategy for transfers
+ without output capture (if not disabled via configure --disable-conservative-flush)
+
+2008-02-14 Kolja Waschk <kawk>
+
+ * src/tap/chain.c: Enabled the new^2 implementation in tap_shift_register
+ (which was implemented 2008-02-03 but not proven (now it is...))
+
+2008-02-14 Jie Zhang <jie.zhang@analog.com>
+
+ * src/bus/bf537_stamp.c: New.
+ * src/bus/bf548_ezkit.c: New.
+ * src/bus/bf561_ezkit.c: New.
+ * src/bus/buses.c (bus_drivers): Add bf537_stamp_bus,
+ bf537_ezkit_bus, and bf561_ezkit_bus.
+ * src/bus/buses.h: Declare bf537_stamp_bus, bf537_ezkit_bus,
+ and bf561_ezkit_bus.
+ * src/bus/Makefile.am (libbus_a_SOURCES): Add bf537_stamp.c,
+ bf548_ezkit.c, and bf561_ezkit.c.
+ * data/analog/bf533/STEPPINGS: Add stepping 4.
+ * data/analog/bf537/bf537: New.
+ * data/analog/bf537/STEPPINGS: New.
+ * data/analog/bf549/bf549: New.
+ * data/analog/bf549/STEPPINGS: New.
+ * data/analog/bf561/bf561: New.
+ * data/analog/bf561/STEPPINGS: New.
+ * data/analog/PARTS: Add bf537, bf549, and bf561.
+ * data/Makefile.am (nobase_dist_pkgdata_DATA): Add
+ analog/bf537/STEPPINGS, analog/bf537/bf537,
+ analog/bf549/STEPPINGS, analog/bf549/bf549,
+ and analog/bf561/STEPPINGS, analog/bf561/bf561.
+
+2008-02-13 Arnim Laeuger <arniml>
+
+ * src/tap/cable/ft2232.c: implemented control of TRST
+ second step of
+ [ 1891845 ] Add support for TRST/SRST/LEDs to FT2232 cable driver
+
+2008-02-12 Arnim Laeuger <arniml>
+
+ * src/tap/cable/ft2232.c: statically set GPIO high byte with product-specific values
+ first step of
+ [ 1891845 ] Add support for TRST/SRST/LEDs to FT2232 cable driver
+
+2008-02-11 Arnim Laeuger <arniml>
+
+ * src/bsdl/bsdl_bison.y (Store_Text): removed function Make_String()
+ the QUOTED_STRING is directly copied to buffer_for_switch
+ * src/bsdl/bsdl.h: memeber String_Val of parser_priv obseleted
+
+2008-02-10 Arnim Laeuger <arniml>
+
+ * src/tap/cable/ft2232.c (ft2232_generic_init, ft2232_jtagkey_init)
+ (ft2232_armusbocd_init, ft2232_transfer_schedule): store low byte value and direction
+ information in param structure to enable "Set Data Bits Low Byte" commands in
+ non pod-specific functions.
+
+2008-02-10 Kolja Waschk <kawk>
+
+ * acinclude.m4, configure.ac: Use local copy of AC_PROG_SED macro (renamed
+ to ACI_PROG_SED) maintain compatibility with older autoconf; fixes
+ [1890192] - autogen.sh fails on AC_PROG_SED
+ * include/cable.h, src/tap/cable/usbblaster.c, src/tap/cable/generic.c,
+ src/tap/cable/generic.h, src/tap/cable/ft2232.c, src/tap/cable.c,
+ doc/UrJTAG.txt: Extended cable_flush() to take one extra argument
+ regarding the amount of items to flush (see UrJTAG.txt for doc),
+ * cable.c: possible fix and optional more verbose output (#ifdef VERBOSE)
+ for tracking down 1884952 Internal error (queue full)
+
+2008-02-09 Arnim Laeuger <arniml>
+
+ * src/tap/cable/ft2232.c (ft2232_transfer_schedule): ensure max number of bytes for
+ a single byte operation
+ * src/svf/svf.c (svf_sxr): avoid output capture in case TDO is not specified for SDR
+
+2008-02-07 Kolja Waschk <kawk>
+
+ * src/jtag.c, doc/jtag.1: Fix dropthrough to caller if -n was given
+ (fixes [1887179] reported by A.Dyer), add command line option "-i"
+ to run interactive mode even after executing commands from files
+
+2008-02-07 Arnim Laeuger <arniml>
+
+ * src/tap/cable/ft2232.c (ft2232_connect): check parport driver setting
+ and set maxrecv accordingly
+ (send_and_receive): fix problem with send suspend detection
+ * src/tap/parport/ftdi.c (ftdi_mpsse_open): decreased latency timer
+ (ftdi_flush_output): return error code from ftdi_write_data
+ * src/tap/parport/ftd2xx.c (ftd2xx_mpsse_open): decreased latency timer
+
+2008-02-05 Arnim Laeuger <arniml>
+
+ * src/tap/cable/ft2232.c: massive rewrite to support deferred transfers
+ initial version with clean queue handling
+
+2008-02-05 Kolja Waschk <kawk>
+
+ * src/tap/cable.c: cable_queue_add_item didn't always correct q->next_free,
+ and a memory leak in cable_defer_transfer was fixed [1884952].
+
+2008-02-04 Arnim Laeuger <arniml>
+
+ * src/tap/cable/ft2232.c (ft2232_flush): rework flush implementation to benefit from
+ queued deferred transfers
+
+2008-02-04 Kolja Waschk <kawk>
+
+ * configure.ac, src/tap/parport/xpcu_common.c, src/tap/parport_xpcu_pp.c,
+ doc/UrJTAG.txt: Minor fixes regarding bug [1875234] "Can't compile
+ UrJTAG with libusb on Cygwin"
+ * src/svf/svf.c: define SA_ONESHOT SA_RESETHAND, fixes bug [1875235]
+ (On older Cygwin, SA_ONESHOT isn't known)
+
+2008-02-03 Kolja Waschk <kawk>
+
+ * src/flash/amd.c: Not only bus width but also device geometry affects
+ the address shift ([1869650] Improve flash detection and support)
+ * src/tap/tap.c, src/tap/chain.c: Split tap_shift_register into two
+ halves, one that queues transfers, another that picks up the results.
+ ([1832990] Speed improvements for USB cables) esp. for long chains
+
+2008-02-02 Arnim Laeuger <arniml>
+
+ * src/bsdl/bsdl.h, src/bsdl/bsdl_flex.l: convert filename to uppercase
+ * src/bsdl/bsdl_sem.c (create_register): don't create a new register if it's already there
+ * data/bsdl/STD_1149_1_2001: dummy file for 2001 standard added
+ * src/cmd/print.c (cmd_print_run): accept longer data register name
+ * include/data_register.h (MAXLEN_DATA_REGISTER): increased to 32 for some BSDL files
+ * src/flash/amd.c (amdstatus): increase timeout count to address
+ [ 1882111 ] Timeout in amdstatus() too small
+
+2008-02-02 Kolja Waschk <kawk>
+
+ * src/tap/cable.c: Automatically resize JTAG activity queue if necessary
+ * doc/UrJTAG.txt: New section about current cable driver internals
+
+2008-02-01 Arnim Laeuger <arniml>
+
+ * src/tap/parport/ftd2xx.c (ftd2xx_pre_connect): fix compiler warning
+ * src/tap/cable/ft2232.c: cleanup
+ (ft2232_usbcable_help): mention ftd2xx-mpsse in cable help
+
+2008-02-01 Kolja Waschk <kawk>
+
+ * include/cable.h, include/chain.h, src/tap/chain.c, src/tap/tap.c,
+ src/tap/cable/wiggler.c, src/tap/cable/arcom.c, src/tap/cable/mpcbdm.c,
+ src/tap/cable/usbblaster.c, src/tap/cable/generic.c,
+ src/tap/cable/vision_ep9307.c, src/tap/cable/ea253.c,
+ src/tap/cable/triton.c, src/tap/cable/jim.c, src/tap/cable/byteblaster.c,
+ src/tap/cable/ei012.c, src/tap/cable/generic.h, src/tap/cable/ft2232.c,
+ src/tap/cable/wiggler2.c, src/tap/cable/keithkoep.c,
+ src/tap/cable/lattice.c, src/tap/cable/dlc5.c, src/tap/cable/xpc.c,
+ src/tap/cable.c: New functions to queue "deferred" JTAG activity.
+ New code in cable drivers to flush the activity queue, both generic
+ (for parport-based and new drivers) and optimized implementations
+ for FT2232-based cables (by Arnim Laeuger) and USB-Blaster (by me).
+ Result is a vast speed improvement at least for FT2232; this
+ implements [ 1832990 ] Speed improvements for USB cables
+
+2008-01-30 Arnim Laeuger <arniml>
+
+ * src/tap/tap.c (tap_reset): set instructions of all parts to BYPASS, fix
+ [ 1873260 ] Command 'reset' does not reset internal states
+ * src/part/part.c (parts_set_instruction): catch NULL pointer
+
+2008-01-25 Kolja Waschk <kawk>
+
+ * include/jim.h, src/jim/tap.c, intel_28f800b3.c, Makefile.am,
+ some_cpu.c: Code skeleton and alloc/free calls for actual parts
+ connected to JIM's some_cpu
+
+2008-01-24 Kolja Waschk <kawk>
+
+ * tap/cable/ft2232.c, tap/parport/ftdi.c, tap/cable.c: added support
+ for Amontec JTAGkey USB cable (submitted by Laurent Gauch - Amontec)
+
+2008-01-22 Arnim Laeuger <arniml>
+
+ * src/bsdl/bsdl_flex.l, src/bsdl/bsdl_bison.y,
+ data/bsdl/STD_1149_1_1990, data/bsdl/STD_1149_1_1994:
+ update header with link to source
+
+2008-01-21 Kolja Waschk <kawk>
+
+ * New JTAG declarations for MPC5241 (from kurobox.com, enh. 1869671)
+
+2008-01-21 Arnim Laeuger <arniml>
+
+ * src/bsdl/*: use gettext for message strings, removed trailing whitespace
+
+2008-01-20 Arnim Laeuger <arniml>
+
+ * src/bsdl/bsdl_bison.y, src/bsdl/bsdl_sem.c, src/bsdl/bsdl.h:
+ support multiple port names in one port definition
+ * src/bsdl/bsdl_bison.y, src/bsdl/bsdl_sem.c, src/bsdl/bsdl.h:
+ handle vectored ports correctly, part 1 of fix for
+ [ 1875737 ] Syntax errors/Port index warning parsing ATMEL BSDL files
+ * src/bsdl/bsdl_bison.y, src/bsdl/bsdl_sem.c, src/bsdl/bsdl_flex.l:
+ support OBSERVE_ONLY attribute in cell description (like input attribute)
+ part 2 of fix for
+ [ 1875737 ] Syntax errors/Port index warning parsing ATMEL BSDL files
+
+2008-01-20 Kolja Waschk <kawk>
+
+ * src/jim/some_cpu.c, src/jim/some_cpu.bsd: Added BSDL file for some_cpu
+ * src/jim/some_cpu.c, src/jim/some_cpu.bsd, README.jim: JIM can now be
+ accessed using the prototype bus driver and displays the given address,
+ data and enable signals; example script in README.jim
+ * src_jim/tap.c: Fixed TDI shift-in
+
+2008-01-19 Kolja Waschk <kawk>
+
+ * ChangeLog: whitespace cosmetics
+ * Makefile.am, configure.ac, jim/tap.c, jim/Makefile.am, jim/README.jim,
+ tap/cable/jim.c, tap/cable.c, tap/Makefile.am, jim/some_cpu.c,
+ include/jim.h, include/jim/some_cpu.h: JTAG target simulator "JIM"
+ and a "jim" cable driver to "connect" to it; detection already works.
+
+2008-01-18 Arnim Laeuger <arniml>
+
+ * configure.ac: restructured the test logic for bison error locations and
+ the BSDL subsystem [ 1873515 ] BSDL part doesn't compile under Cygwin
+
+2008-01-18 Kolja Waschk <kawk>
+
+ * Moved the code from libbrux/ subdirectory into appropriate locations in
+ our src/ subdirectory (Enhancement 1873220):
+
+ libbrux/cmd/help.c -> src/cmd/help.c
+ libbrux/cmd/quit.c -> src/cmd/quit.c
+ libbrux/cmd/cmd.c + src/cmd.c -> src/cmd/cmd.c
+ libbrux/cmd/cmd_detectflash.c -> src/cmd/detectflash.c
+ libbrux/flash + Makefile.am -> src/flash/
+
+ * Merged the header files from openwince "include" package, which were
+ previously moved in inclow/, into our final include/ directory, omitting
+ all the files that aren't actually used by UrJTAG (Enhancement 1873220):
+
+ common.h -> n/a (use bitmask.h!)
+ openwince.h (asm/C detection) -> n/a (use #ifdef __ASSEMBLY__)
+ openwince.h (bitmasks) -> bitmask.h
+ brux/cmd.h + cmd.h -> cmd.h
+ brux/cfi.h + brux/flash.h+flash.h -> flash.h
+ brux/bus.h -> bus_driver.h
+ std/mic.h -> flash/mic.h
+ device/flash/cfi.h -> flash/cfi.h
+ device/flash/intel.h -> flash/intel.h
+ arm/pxa2x0/mc.h -> src/bus/pxa2x0_mc.h
+
+2008-01-17 Kolja Waschk <kawk>
+
+ * UrJTAG.txt: Updates regarding Cygwin ioperm package and readline library
+ * src/jtag.c: Without readline library, informative output often
+ was printed after prompt, not before
+ * src/bus/s3c4510x.c: Address alignment on A0..Ax lines changes dynamically
+ with bus width
+
+2008-01-16 Arnim Laeuger <arniml>
+
+ * src/bus/prototype.c (prototype_bus_new): properly calculate the address
+ shift based on the current bus width
+
+2008-01-15 Arnim Laeuger <arniml>
+
+ * src/bus/prototype.c (prototype_bus_new): parameter amode added
+
+2008-01-11 Arnim Laeuger <arniml>
+
+ * src/bus/prototype.c: added
+
+2008-01-09 Arnim Laeuger <arniml>
+
+ * src/bus/h7202.c (h7202_bus_new): API extension
+
+2008-01-08 Arnim Laeuger <arniml>
+
+ * src/bus/prototype.c: new prototype bus driver (Detrick Martin)
+ * src/bus/zefant-xs3.c (zefant_xs3_bus_new): API extension: cmd_params for new_bus()
+ * src/bus/sharc21065l.c (sharc_21065L_bus_new): API extension
+ * src/bus/jopcyc.c (jopcyc_bus_new): API extension
+ * src/bus/tx4925.c (tx4925_bus_new): API extension
+ * src/bus/slsup3.c (slsup3_bus_new): API extension
+ * src/bus/sh7751r.c (sh7751r_bus_new): API extension
+ * src/bus/sh7750r.c (sh7750r_bus_new): API extension
+ * src/bus/sh7727.c (sh7727_bus_new): API extension
+ * src/bus/s3c4510x.c (s3c4510_bus_new): API extension
+ * src/bus/sa1110.c (sa1110_bus_new): API extension
+ * src/bus/pxa2x0.c (pxa2x0_bus_new): API extension
+ (pxa27x_bus_new): API extension
+ * src/bus/ppc405ep.c (ppc405ep_bus_new): API extension
+ * src/bus/ppc440gx_ebc8.c (ppc440gx_ebc8_bus_new): API extension
+ * src/bus/mpc5200.c (mpc5200_bus_new): API extension
+ * src/bus/mpc824x.c (mpc824x_bus_new): API extension
+ * src/bus/lh7a400.c (lh7a400_bus_new): API extension
+ * src/bus/ixp425.c (ixp425_bus_new): API extension
+ * src/bus/bf533_ezkit.c (bf533_ezkit_bus_new): API extension
+ * src/bus/bf533_stamp.c (bf533_stamp_bus_new): API extension
+ * src/bus/ejtag.c (ejtag_bus_new): API extension
+ * src/bus/bcm1250.c (bcm1250_bus_new): API extension
+ * src/bus/au1500.c (au1500_bus_new): API extension
+ * src/bus/Makefile.am (libbus_a_SOURCES): added prototype.c
+ * src/bus/buses.c: added prototype_bus (Detrick Martin)
+ * src/cmd/initbus.c (cmd_initbus_run): hand down command parameters to bus_new()
+
+2008-01-06 Arnim Laeuger <arniml>
+
+ * src/tap/cable/wiggler.c (wiggler_connect): enable bit<->pin mapping from parameter string
+ * src/tap/cable/wiggler.c: make std_wgl_map static
+
+2007-12-31 Arnim Laeuger <arniml>
+
+ * src/bsdl/Makefile.am (noinst_HEADERS): move headers to noinst_HEADERS
+ * include/Makefile.am (noinst_HEADERS): add bsdl.h to list of headers
+ * src/bsdl/Makefile.am (libbsdl_a_SOURCES): add bsdl.h to list of sources
+
+2007-12-30 Arnim Laeuger <arniml>
+
+ * src/detect.c (detect_parts): call bsdl_scan_file() if configure result indicates inclusion of BSDL subsystem
+ * src/cmd/cmd.c: include cmd_svf and cmd_bsdl based on configure result
+ * src/Makefile.am (jtag_DEPENDENCIES): link to libsvf.a and libbsdl.a based on configure result
+ * src/cmd/Makefile.am (libcmd_a_SOURCES): compile svf.c and bsdl.c based on configure result
+ * configure.ac: added --enable-svf and --enable-bsdl
+ * README.svf: contents moved to doc/UrJTAG.txt, file deleted
+ * data/Makefile.am (nobase_dist_pkgdata_DATA): fixed merge results
+ * many files: integration of BSDL parser
+ * data/xilinx/PARTS: added xc2v80-fg256,xc2v250-fg256,xc2v1000-fg256
+ '[ 1859678 ] jtag support for xilinx xc2v80-fg256, xc2v250, xc2v1000 FPGA' (Alexander Didebulidze)
+ * data/altera/ep1c12/ep1c12: CLAMP and HIGHZ instructions activated
+
+2007-12-29 Arnim Laeuger <arniml>
+
+ * data/altera/PARTS: ep2c8 added
+ '[ 1859032 ] jtag support for Altera EP2C8' (Hartley Sweeten)
+ * data/Makefile.am (nobase_dist_pkgdata_DATA): ep2c8 files added
+ '[ 1859032 ] jtag support for Altera EP2C8' (Hartley Sweeten)
+
+2007-12-27 Arnim Laeuger <arniml>
+
+ * src/cmd/print.c (cmd_print_run): applied patch:
+ '[ 1858985 ] possible fix to print the signal aliases' (Hartley Sweeten)
+
+2007-12-26 Kolja Waschk <kawk>
+
+ * tap/cable/vision_ep9307.c, tap/cable.c, tap/Makefile.am, configure.ac:
+ Integrated first modern (single-file w/o parport) cable driver
+ (1858709: EP9307 target specific cable driver, from Hartley Sweeten)
+
+2007-12-23 Kolja Waschk <kawk>
+
+ Version 0.7 released.
+
+2007-12-23 Kolja Waschk <kawk>
+
+ * NEWS: Summarized changes since fork from openwince CVS.
+ * configure.ac: Updated copyright information.
+
+2007-12-19 Kolja Waschk <kawk>
+
+ * tap/cable/*, tap/parport/xpcu_common.c, cmd/part.c, cmd/cable.c,
+ bus/pxa2x0.c, jtag.c: fix prototypes, include stdlib (thx Hartley)
+ * src/cmd/print.c: cast uint64_t to (long long unsigned) for %llu
+
+2007-12-18 Kolja Waschk <kawk
+
+ * configure.ac, src/tap/parport/*.c: include stropts.h only if
+ it's available (needed for uClinux and others; thanks Hartley)
+ * doc/UrJTAG.txt, src/jtag.txt: Cosmetics, Copyright
+ * src/tap/Makefile.am: include cable driver for USB Blaster and
+ FT2232-based cables if any of libftdi or ftd2xx is present
+
+2007-12-16 Kolja Waschk <kawk>
+
+ * jtag.c: Don't abort on invalid command line options
+ * configure.ac: Reorganized the libusb/libftdi detection.
+ * data/MANUFACTURERS: Change 11110000111 code to point to
+ "ARM" instead of Sharp to stop misdetection of other
+ (non-Sharp) chips which use ARM cores. See Bug 1837991.
+ * libbrux/amd/amd_flash.c: Fix for [1851777] segfault when
+ running detectflash
+ * include/setdevice.h, include/Makefile.am, src/detect.c,
+ src/cmd/setdevice.c, src/cmd/cmd.c, src/cmd/Makefile.am,
+ src/jtag.c, doc/UrJTAG.txt, libbrux/flash/amd_flash.c,
+ libbrux/setdevice.h, libbrux/Makefile.am: Removed code for
+ "setdevice" command and added some documentation how to get
+ along without it.
+
+2007-12-15 Kolja Waschk <kawk>
+
+ * configure.ac, tap/parport/parport.c, tap/parport/ppi.c,
+ tap/parport/direct.c: Adapted openwince patch by Daniel
+ O'Connor, [1235990] Add support for FreeBSD's ppi interface
+ (closes our copy of that tracker item, 1829585)
+ * src/cmd/cable.c, include/cable.h, src/tap/cable/*.c: Add
+ help function to every cable; temporarily allow old syntax
+ for cable command when used for parallel port cables
+ * data/intel/pxa270/STEPPINGS, src/bus/pxa2x0.c: Integrated two
+ patches from F. Rysanek, adding C5 stepping of PXA270 and a few
+ few functions that resolve the PXA270 address space into the 6
+ default nCS windows per 64MB. (Enhancement req. 1849493)
+ * cmd/part.c, cmd/setdevice.c, cmd/instruction.c, cmd/svf.c,
+ cmd/dr.c, cmd/initbus.c, cmd/test.c, part/part.c, libbrux/cmd/cmd.c,
+ libbrux/cmd/help.c: Make command string comparisons case-insensitive
+ (fixes 1845811 "Case sensitivity in shell")
+
+2007-12-14 Kolja Waschk <kawk>
+
+ * README, doc/UrJTAG.txt: pointer to http://www.urjtag.org
+ * configure.ac, src/Makefile.am, src/tap/parport/ftd2xx.c:
+ Changes to allow linking against FTDI FTD2XX in Cygwin, initial
+ support for --with-(libftdi|libusb|ftd2xx) configure options
+
+2007-12-13 Kolja Waschk <kawk>
+
+ * configure.ac: Run "svn info" with "-R" to get latest revision
+
+2007-12-12 Arnim Laeuger <arniml>
+
+ * data/Makefile.am (nobase_dist_pkgdata_DATA): add missing '\', fixes
+ [ 1849477 ] Missing \ in data/Makefile.ac
+
+2007-12-09 Kolja Waschk <kawk>
+
+ * configure.ac: Improve detection of flex version, get Subversion
+ revision from 1. svn info, or 2. ChangeLog, or 3. Revision tag,
+ auto-detect whether -lrt is needed
+ * src/svf/svf_flex.l: derive HAVE_MODERN_FLEX internally
+ * src/jtag.c: show version from config.h, compile without readline
+ * src/version.awk: not needed; SVN info now available in config.h
+ * src/Makefile.am: removed -lrt link and version.h target
+ * doc/UrJTAG.txt: Added info about libraries, ioperm, "setdevice" cmd
+
+2007-12-08 Kolja Waschk <kawk>
+
+ * include/Makefile.am, src/Makefile.am, src/svf/Makefile.am
+ configure.ac, libbrux/configure.ac: Mention more files to
+ ensure that dist tar.gz is complete; prevent installation
+ of inclow/ headers during "make install" on top level
+
+2007-12-07 Kolja Waschk <kawk>
+
+ * README: All info moved to doc/UrJTAG.txt
+ * README_21065L: Merged into doc/UrJTAG.txt
+ * doc/UrJTAG.xml, UrJTAG.txt: converted DocBook to asciidoc
+ * COPYING: GPLv2 added
+ * AUTHORS: Updated
+ * TODO: removed (we're using SourceForge trackers)
+
+2007-12-06 Kolja Waschk <kawk>
+
+ * ChangeLog: Import SVN commit messages from past month
+ * THANKS: Added all missing names (that I know of) of the people who
+ contributed the patches that have been integrated in the past weeks
+
+2007-12-05 Arnim Laeuger <arniml>
+
+ * src/jtag.c (main): Print build number based on version.h.
+ * src/Makefile.am (version.h): Added rules to generate version.h from ChangeLog's revision tag.
+
+2007-12-04 07:06 Kolja Waschk <kawk>
+
+ * include/cable.h, include/parport.h, src/cmd/cable.c,
+ src/tap/cable/generic.c, src/tap/cable/generic.h,
+ src/tap/parport/direct.c, src/tap/parport/ftd2xx.c,
+ src/tap/parport/ftdi.c, src/tap/parport/ppdev.c,
+ src/tap/parport/xpcu_pp.c: [1839040] Make "cable" command less
+ parport-centric. Changes "cable" command syntax!
+
+2007-12-03 12:18 Kolja Waschk <kawk>
+
+ * ChangeLog: added "Revision" keyword
+
+2007-12-02 17:56 Kolja Waschk <kawk>
+
+ * trunk/include, Makefile.am, configure.ac, inclow: openwince
+ "include" package moved into "jtag" (now named "inclow")
+
+2007-11-30 07:06 Kolja Waschk <kawk>
+
+ * README: update fixes [1837364] Install instructions wrong
+
+2007-11-28 22:42 Kolja Waschk <kawk>
+
+ * doc/bsdl2jtag.1, doc/jtag.1: Imported man pages from
+ openwince-jtag Debian package (w/permission from p2@debian)
+
+2007-11-28 20:20 Kolja Waschk <kawk>
+
+ * src/jtag.c: [ 1838018 ] "Forbid" to run JTAG tools with suid root
+
+2007-11-28 19:43 Kolja Waschk <kawk>
+
+ * src/jtag.c: [ 1839756 ] (openwince [972637]) add command line
+ options to jtag
+
+2007-11-28 00:13 Kolja Waschk <kawk>
+
+ * doc/UrJTAG.xml: Integrated text from Wiki pages from Ralf,
+ Incorporated README into UrJTAG.xml
+
+2007-11-27 22:06 Kolja Waschk <kawk>
+
+ * doc/UrJTAG.xml,doc-layout.txt: renamed top-level DocBook XML file
+
+2007-11-27 22:05 Kolja Waschk <kawk>
+
+ * doc/doc-layout.txt, doc/internals.xml: Include license text(s)
+ and internals.xml
+
+2007-11-27 21:01 Kolja Waschk <kawk>
+
+ * doc/gpl.dbk, doc/lgpl.dbk: Use version 2, not 3
+
+2007-11-27 20:56 Kolja Waschk <kawk>
+
+ * doc/fdl.xml, doc/gpl.dbk, doc/lgpl.dbk: Added license texts
+ (docbook) from www.gnu.org
+
+2007-11-26 14:01 Kolja Waschk <kawk>
+
+ * src/cmd/shell.c: Clean up fix for [1837985] "shell" command
+ causes segfault
+
+2007-11-25 22:49 Kolja Waschk <kawk>
+
+ * doc/doc-layout.txt: Converted to DocBook-XSL
+
+2007-11-25 14:45 Kolja Waschk <kawk>
+
+ * doc/doc-layout.txt: Layout draft for new, comprehensive
+ documentation...
+
+2007-11-25 13:08 Kolja Waschk <kawk>
+
+ * src/cmd/shell.c: Allow arbitrary number of arguments for "shell"
+ command (fix for [1837985] "shell" command causes segfault)
+
+2007-11-25 00:02 Arnim Laeuger <arniml>
+
+ * src/tap/parport/ftd2xx.c, src/tap/parport/ftdi.c: fix for '[
+ 1836616 ] Segfault/Memory corruption if USB device inaccessible'
+
+2007-11-23 19:52 Arnim Laeuger <arniml>
+
+ * configure.ac, src/svf/Makefile.am, src/svf/svf_bison.y,
+ src/svf/svf_flex.l: make SVF parser/lexer backwards compatible to
+ pre-2.5.31 flex
+ for those the error location feature is skipped in svf_flex.l
+
+2007-11-20 20:35 Arnim Laeuger <arniml>
+
+ * configure.ac, src/cmd/cable.c, src/tap/Makefile.am,
+ src/tap/cable/ft2232.c, src/tap/parport.c,
+ src/tap/parport/ftd2xx.c, src/tap/parport/ftdi.c: ftd2xx parport
+ driver added
+
+2007-11-18 13:38 Arnim Laeuger <arniml>
+
+ * configure.ac: add some messages to show configuration summary, to
+ be extended
+
+2007-11-17 21:39 Arnim Laeuger <arniml>
+
+ * src/cmd/cable.c: report cable usage for USB & FTDI based cables
+ only in case respective support is included
+
+2007-11-16 17:50 Arnim Laeuger <arniml>
+
+ * include/cable.h, include/chain.h, src/cmd/cable.c, src/svf/svf.c,
+ src/tap/Makefile.am, src/tap/cable.c, src/tap/cable/arcom.c,
+ src/tap/cable/byteblaster.c, src/tap/cable/dlc5.c,
+ src/tap/cable/ea253.c, src/tap/cable/ei012.c,
+ src/tap/cable/ft2232.c, src/tap/cable/generic.c,
+ src/tap/cable/keithkoep.c, src/tap/cable/lattice.c,
+ src/tap/cable/mpcbdm.c, src/tap/cable/triton.c,
+ src/tap/cable/usbblaster.c, src/tap/cable/wiggler.c,
+ src/tap/cable/wiggler2.c, src/tap/cable/xpc.c, src/tap/chain.c,
+ src/tap/parport.c, src/tap/parport/ftdi.c, src/tap/tap.c: merged
+ changes from /branches/ft2232_eval@770
+ this is the initial stable version of the ft2232 cable driver
+
+2007-11-13 23:09 Arnim Laeuger <arniml>
+
+ * src/flash.c: removed obsolete declaration of amd_detect()
+
+2007-11-13 08:07 Kolja Waschk <kawk>
+
+ * configure.ac, src/tap/Makefile.am, src/tap/cable.c: Fix [ 1828368 ]
+ Compilation fails without libusb/libftdi
+
+2007-11-10 17:17 Kolja Waschk <kawk>
+
+ * data/Makefile.am, data/lattice/PARTS,
+ data/lattice/lc4128c-tqfp100,
+ data/lattice/lc4128c-tqfp100/STEPPINGS,
+ data/lattice/lc4128c-tqfp100/lc4128c-tqfp100: [ 1105256 ] jtag
+ descriptor for Lattice LC4032V-TQFP100
+
+2007-11-10 16:22 Arnim Laeuger <arniml>
+
+ * README.svf: remove links to openwince
+
+2007-11-10 01:15 Arnim Laeuger <arniml>
+
+ * src/bus/Makefile.am, src/bus/buses.c, src/bus/buses.h,
+ src/bus/zefant-xs3.c: added Zefant-XS3 bus
+
+2007-11-10 00:31 Arnim Laeuger <arniml>
+
+ * data/xilinx/xc3s1000/fg320, data/xilinx/xc3s1000/fg456,
+ data/xilinx/xc3s1000/fg676, data/xilinx/xc3s1000/ft256,
+ data/xilinx/xc3s1000/xc3s1000: xc3s1000 kw
+
+2007-11-10 00:15 Arnim Laeuger <arniml>
+
+ * data/Makefile.am, data/xilinx/xc3s1000/STEPPINGS,
+ data/xilinx/xc3s1000/fg320, data/xilinx/xc3s1000/fg456,
+ data/xilinx/xc3s1000/fg676, data/xilinx/xc3s1000/ft256,
+ data/xilinx/xc3s1000/xc3s1000,
+ data/xilinx/xc3s1000/xc3s1000_fg320,
+ data/xilinx/xc3s1000/xc3s1000_fg456,
+ data/xilinx/xc3s1000/xc3s1000_fg676,
+ data/xilinx/xc3s1000/xc3s1000_ft256,
+ data/xilinx/xc3s1000/xc3s1000l,
+ data/xilinx/xc3s1000/xc3s1000l_fg320,
+ data/xilinx/xc3s1000/xc3s1000l_fg456,
+ data/xilinx/xc3s1000/xc3s1000l_fg676,
+ data/xilinx/xc3s1000/xc3s1000l_ft256: unification xc3s1000
+
+2007-11-09 22:44 Arnim Laeuger <arniml>
+
+ * src/cmd/bit.c: fixed [ 1828672 ] cmd/bit.c broken
+
+2007-11-08 09:44 Kolja Waschk <kawk>
+
+ * configure.ac, data/Makefile.am, data/xilinx/PARTS,
+ data/xilinx/xc2c256-vq100, data/xilinx/xc2c256-vq100/STEPPINGS,
+ data/xilinx/xc2c256-vq100/xc2c256-vq100,
+ data/xilinx/xc2c64a-vq44, data/xilinx/xc2c64a-vq44/STEPPINGS,
+ data/xilinx/xc2c64a-vq44/xc2c64a-vq44, include/Makefile.am,
+ include/cable.h, include/xpcu.h, src/cmd/cable.c,
+ src/part/data_register.c, src/tap/Makefile.am, src/tap/cable.c,
+ src/tap/cable/arcom.c, src/tap/cable/byteblaster.c,
+ src/tap/cable/dlc5.c, src/tap/cable/ea253.c,
+ src/tap/cable/ei012.c, src/tap/cable/generic.c,
+ src/tap/cable/generic.h, src/tap/cable/keithkoep.c,
+ src/tap/cable/lattice.c, src/tap/cable/mpcbdm.c,
+ src/tap/cable/triton.c, src/tap/cable/usbblaster.c,
+ src/tap/cable/wiggler.c, src/tap/cable/wiggler2.c,
+ src/tap/cable/xpc.c, src/tap/parport.c, src/tap/parport/ftdi.c,
+ src/tap/parport/xpcu_common.c, src/tap/parport/xpcu_pp.c,
+ src/tap/tap.c: [ 1479632, 1649637 ] Drivers for Altera USB
+ Blaster and Xilinx Platform Cable USB
+
+2007-11-08 09:13 Kolja Waschk <kawk>
+
+ * include/Makefile.am, README, README_21065L, THANKS,
+ data/Makefile.am, data/analog/PARTS, data/analog/sharc21065l,
+ data/analog/sharc21065l/STEPPINGS,
+ data/analog/sharc21065l/sharc21065l, include/setdevice.h,
+ libbrux/Makefile.am, libbrux/flash/amd_flash.c,
+ libbrux/flash/detectflash.c, libbrux/setdevice.h,
+ src/bus/Makefile.am, src/bus/buses.c, src/bus/buses.h,
+ src/bus/sharc21065l.c, src/cmd/Makefile.am, src/cmd/cmd.c,
+ src/cmd/setdevice.c, src/detect.c, src/flash.c, src/jtag.c:
+ [ 1605981 ] JTAG Support for ADSP-21065L Processor (with
+ modifications) (Girish G Pai, Lesly A. M, Tony K Nadackal, Shaju Abraham)
+
+2007-11-08 07:33 Kolja Waschk <kawk>
+
+ * data/MANUFACTURERS, data/Makefile.am, data/admtek,
+ data/admtek/adm5120, data/admtek/adm5120/adm5120, data/atheros,
+ data/atheros/ar2312, data/atheros/ar2312/ar2312, data/brecis,
+ data/brecis/PARTS, data/brecis/msp2006,
+ data/brecis/msp2006/STEPPINGS, data/brecis/msp2006/msp2006,
+ data/hitachi/PARTS, data/hitachi/ar7300,
+ data/hitachi/ar7300/STEPPINGS, data/hitachi/ar7300/ar7300,
+ data/lexra, data/lexra/PARTS, data/lexra/lx5280,
+ data/lexra/lx5280/STEPPINGS, data/lexra/lx5280/lx5280,
+ doc/README.ejtag: [ 1429825 ] EJTAG driver (new data files) (Oleg)
+
+2007-11-08 07:11 Kolja Waschk <kawk>
+
+ * src/bus/Makefile.am, src/bus/buses.c, src/bus/buses.h,
+ src/bus/ejtag.c, src/tap/parport/ppdev.c: [ 1429825 ] EJTAG
+ driver (partial patch - only the bus driver for now) (Oleg)
+
+2007-11-07 23:17 Arnim Laeuger <arniml>
+
+ * src/bus/Makefile.am, src/bus/buses.c, src/bus/buses.h,
+ src/bus/h7202.c: [ 1585617 ] support for the Magnachip h7202 cpu
+
+2007-11-07 22:43 Arnim Laeuger <arniml>
+
+ * README.svf: update README.svf
+
+2007-11-07 22:21 Arnim Laeuger <arniml>
+
+ * src/cmd/debug.c, src/cmd/eraseflash.c, src/cmd/peekpoke.c,
+ src/cmd/script.c, src/cmd/shell.c, src/cmd/signal.c,
+ src/cmd/test.c, src/detect.c, src/jtag.c, src/part/signal.c,
+ src/readmem.c, src/svf/svf_bison.y, src/svf/svf_flex.l,
+ src/writemem.c: get rid of (most) compiler warnings
+
+2007-11-07 09:56 Kolja Waschk <kawk>
+
+ * include/bssignal.h, include/jtag.h, include/part.h, src/jtag.c:
+ Remaining diffs from gumstix repository: Add debug, test and
+ shell command, aliases for parts, small fixes.
+
+2007-11-07 09:44 Kolja Waschk <kawk>
+
+ * src/bsdl2jtag.c, src/bus/ppc440gx_ebc8.c, src/cmd/Makefile.am,
+ src/cmd/cmd.c, src/cmd/debug.c, src/cmd/part.c, src/cmd/print.c,
+ src/cmd/script.c, src/cmd/shell.c, src/cmd/signal.c,
+ src/cmd/test.c, src/detect.c, src/part/part.c, src/part/signal.c:
+ Remaining diffs from gumstix repository: Add debug, test and
+ shell command, aliases for parts, small fixes.
+
+2007-11-07 09:09 Kolja Waschk <kawk>
+
+ * doc/howto_add_support_for_more_flash.txt: [ 1460563 ] How to add
+ Support more Flash chip???
+
+2007-11-07 09:07 Kolja Waschk <kawk>
+
+ * src/writemem.c: [ 1249554 ] Writemem command to write to SRAM
+ (compile fix)
+
+2007-11-07 09:04 Kolja Waschk <kawk>
+
+ * src/svf/svf_flex.l: [ 1194137 ] better SVF diagnostics (compile
+ fix)
+
+2007-11-07 09:03 Kolja Waschk <kawk>
+
+ * src/bus/ppc405ep.c, src/bus/Makefile.am: The 405ep support patch
+ _still_ wasn't completely integrated.
+
+2007-11-07 08:55 Kolja Waschk <kawk>
+
+ * Makefile.am: Remove additional lines left over from unsuccessful
+ patch before.
+
+2007-11-07 08:47 Kolja Waschk <kawk>
+
+ * data/Makefile.am, data/xilinx/PARTS, data/xilinx/xc2s300e,
+ data/xilinx/xc2s300e/STEPPINGS, data/xilinx/xc2s300e/fg456,
+ data/xilinx/xc2s300e/ft256, data/xilinx/xc2s300e/pq208,
+ data/xilinx/xc2s300e/xc2s300e: [ 1377859 ] Device description
+ files for Xilinx XC2S300E (Spartan-IIE) (Arnim Laeuger)
+
+2007-11-07 08:41 Kolja Waschk <kawk>
+
+ * data/Makefile.am: Added Xilinx parts XC3S*
+
+2007-11-07 08:31 Kolja Waschk <kawk>
+
+ * data/Makefile.am: Added Atmel AT91SAM7S files to Makefile.am
+
+2007-11-07 08:16 Kolja Waschk <kawk>
+
+ * data/xilinx/PARTS, data/xilinx/xc18v04pc44,
+ data/xilinx/xc18v04pc44/STEPPINGS,
+ data/xilinx/xc18v04pc44/xc18v04pc44, data/xilinx/xc2s200e-pq208,
+ data/xilinx/xc2s200e-pq208/STEPPINGS,
+ data/xilinx/xc2s200e-pq208/xc2s200e-pq208, data/xilinx/xc3s1000,
+ data/xilinx/xc3s1000/STEPPINGS, data/xilinx/xc3s1000/xc3s1000,
+ data/xilinx/xc3s1000/xc3s1000_fg320,
+ data/xilinx/xc3s1000/xc3s1000_fg456,
+ data/xilinx/xc3s1000/xc3s1000_fg676,
+ data/xilinx/xc3s1000/xc3s1000_ft256,
+ data/xilinx/xc3s1000/xc3s1000l,
+ data/xilinx/xc3s1000/xc3s1000l_fg320,
+ data/xilinx/xc3s1000/xc3s1000l_fg456,
+ data/xilinx/xc3s1000/xc3s1000l_fg676,
+ data/xilinx/xc3s1000/xc3s1000l_ft256, data/xilinx/xc3s100e_die,
+ data/xilinx/xc3s100e_die/STEPPINGS,
+ data/xilinx/xc3s100e_die/xc3s100e_die,
+ data/xilinx/xc3s100e_die/xc3s100e_pq208,
+ data/xilinx/xc3s100e_die/xc3s100e_tq144,
+ data/xilinx/xc3s100e_die/xc3s100e_vq100, data/xilinx/xc3s1500,
+ data/xilinx/xc3s1500/STEPPINGS, data/xilinx/xc3s1500/xc3s1500,
+ data/xilinx/xc3s1500/xc3s1500_fg320,
+ data/xilinx/xc3s1500/xc3s1500_fg456,
+ data/xilinx/xc3s1500/xc3s1500_fg676,
+ data/xilinx/xc3s1500/xc3s1500l,
+ data/xilinx/xc3s1500/xc3s1500l_fg320,
+ data/xilinx/xc3s1500/xc3s1500l_fg456,
+ data/xilinx/xc3s1500/xc3s1500l_fg676, data/xilinx/xc3s200,
+ data/xilinx/xc3s200/STEPPINGS, data/xilinx/xc3s200/xc3s200,
+ data/xilinx/xc3s200/xc3s200_ft256,
+ data/xilinx/xc3s200/xc3s200_pq208,
+ data/xilinx/xc3s200/xc3s200_tq144,
+ data/xilinx/xc3s200/xc3s200_vq100, data/xilinx/xc3s2000,
+ data/xilinx/xc3s2000/STEPPINGS, data/xilinx/xc3s2000/xc3s2000,
+ data/xilinx/xc3s2000/xc3s2000_fg456,
+ data/xilinx/xc3s2000/xc3s2000_fg676,
+ data/xilinx/xc3s2000/xc3s2000_fg900,
+ data/xilinx/xc3s2000/xc3s2000l,
+ data/xilinx/xc3s2000/xc3s2000l_fg676,
+ data/xilinx/xc3s2000/xc3s2000l_fg900, data/xilinx/xc3s400,
+ data/xilinx/xc3s400/STEPPINGS, data/xilinx/xc3s400/xc3s400,
+ data/xilinx/xc3s400/xc3s400_fg320,
+ data/xilinx/xc3s400/xc3s400_fg456,
+ data/xilinx/xc3s400/xc3s400_ft256,
+ data/xilinx/xc3s400/xc3s400_pq208,
+ data/xilinx/xc3s400/xc3s400_tq144, data/xilinx/xc3s4000,
+ data/xilinx/xc3s4000/STEPPINGS, data/xilinx/xc3s4000/xc3s4000,
+ data/xilinx/xc3s4000/xc3s4000_fg1156,
+ data/xilinx/xc3s4000/xc3s4000_fg676,
+ data/xilinx/xc3s4000/xc3s4000_fg900,
+ data/xilinx/xc3s4000/xc3s4000l,
+ data/xilinx/xc3s4000/xc3s4000l_fg1156,
+ data/xilinx/xc3s4000/xc3s4000l_fg900, data/xilinx/xc3s50,
+ data/xilinx/xc3s50/STEPPINGS, data/xilinx/xc3s50/xc3s50,
+ data/xilinx/xc3s50/xc3s50_cp132, data/xilinx/xc3s50/xc3s50_pq208,
+ data/xilinx/xc3s50/xc3s50_tq144, data/xilinx/xc3s50/xc3s50_vq100,
+ data/xilinx/xc3s5000, data/xilinx/xc3s5000/STEPPINGS,
+ data/xilinx/xc3s5000/xc3s5000,
+ data/xilinx/xc3s5000/xc3s5000_fg1156,
+ data/xilinx/xc3s5000/xc3s5000_fg900, data/xilinx/xc3s500e_fg320,
+ data/xilinx/xc3s500e_fg320/STEPPINGS,
+ data/xilinx/xc3s500e_fg320/xc3s500e_fg320,
+ data/xilinx/xc3s500e_fg320/xc3s500e_ft256,
+ data/xilinx/xc3s500e_fg320/xc3s500e_pq208,
+ data/xilinx/xc9572xl_vq44, data/xilinx/xc9572xl_vq44/STEPPINGS,
+ data/xilinx/xc9572xl_vq44/xc9572xl_vq44, data/xilinx/xcf04s,
+ data/xilinx/xcf04s/STEPPINGS, data/xilinx/xcf04s/xcf04s: Added
+ Xilinx XC3S* parts and others from gumstix repository
+
+2007-11-07 08:10 Kolja Waschk <kawk>
+
+ * data/atmel/PARTS, data/atmel/at91sam7s256,
+ data/atmel/at91sam7s256/STEPPINGS,
+ data/atmel/at91sam7s256/at91sam7s_tq48v0,
+ data/atmel/at91sam7s256/at91sam7s_tq64v0: Added AT91SAM7S256 data
+ from gumstix repository
+
+2007-11-06 21:39 Kolja Waschk <kawk>
+
+ * src/bus/Makefile.am, src/bus/au1500.c, src/bus/bcm1250.c,
+ src/bus/buses.c, src/bus/buses.h, src/bus/jopcyc.c,
+ src/bus/lh7a400.c, src/bus/mpc5200.c, src/bus/ppc440gx_ebc8.c,
+ src/bus/slsup3.c, src/bus/tx4925.c: some more fixes, eg. ppc405
+ support patch still wasn't completely applied
+
+2007-11-06 20:56 Kolja Waschk <kawk>
+
+ * data/ibm/PARTS: [ 1173994 ] IBM PPC405EP support (PARTS file
+ wasn't updated when I applied the patch)
+
+2007-11-06 20:53 Kolja Waschk <kawk>
+
+ * src/bus/Makefile.am, src/bus/buses.c, src/bus/buses.h,
+ src/bus/jopcyc.c: [ 1281749 ] Bus driver for JOP.design Cyclone
+ boards (jopcyc+serial patch) (Arnim Laeuger)
+
+2007-11-06 20:49 Kolja Waschk <kawk>
+
+ * data/Makefile.am, data/altera/PARTS, data/altera/ep1c12,
+ data/altera/ep1c12/STEPPINGS, data/altera/ep1c12/ep1c12,
+ data/altera/ep1c12/f256, data/altera/ep1c12/f324,
+ data/altera/ep1c12/q240, data/altera/epm3064a,
+ data/altera/epm3064a/STEPPINGS, data/altera/epm3064a/epm3064a,
+ data/altera/epm3064a/l44, data/altera/epm3064a/t100,
+ data/altera/epm3064a/t44: [ 1281673 ] Device description files
+ for Altera EP1C12 and EPM3064A (Arnim Laeuger)
+
+2007-11-06 20:32 Kolja Waschk <kawk>
+
+ * include/jtag.h, src/Makefile.am, src/cmd/Makefile.am,
+ src/cmd/cmd.c, src/cmd/writemem.c, src/writemem.c: [ 1249554 ]
+ Writemem command to write to SRAM (Kent Palmkvist)
+
+2007-11-06 20:29 Kolja Waschk <kawk>
+
+ * data/Makefile.am, data/altera/PARTS, data/altera/ep1c6q240,
+ data/altera/ep1c6q240/STEPPINGS, data/altera/ep1c6q240/ep1c6q240,
+ src/bus/Makefile.am, src/bus/buses.c, src/bus/buses.h,
+ src/bus/slsup3.c: [ 1249552 ] New bus type SLS UP3 (Altera FPGA
+ board) (Kent Palmkvist)
+
+2007-11-06 20:26 Kolja Waschk <kawk>
+
+ * src/tap/cable.c, src/tap/cable/wiggler.c: [ 1236272 ] Add support
+ for Analog Devices Blackfin Processor: IGLOO.patch (Robin Getz)
+
+2007-11-06 20:24 Kolja Waschk <kawk>
+
+ * src/bus/Makefile.am, src/bus/bf533_ezkit.c,
+ src/bus/bf533_stamp.c, src/bus/buses.c, src/bus/buses.h: [
+ 1236272 ] Add support for Analog Devices Blackfin Processor:
+ STAMP_EZKIT.patch (Robin Getz)
+
+2007-11-06 20:20 Kolja Waschk <kawk>
+
+ * data/MANUFACTURERS, data/Makefile.am, data/analog,
+ data/analog/PARTS, data/analog/bf533,
+ data/analog/bf533/STEPPINGS, data/analog/bf533/bf533: [ 1236272 ]
+ Add support for Analog Devices Blackfin Processor: Blackfin.patch
+
+2007-11-06 20:15 Kolja Waschk <kawk>
+
+ * src/tap/parport/ppdev.c: [ 1194141 ] better diagnostics for
+ opening ppdev device (Hein Roehrig)
+
+2007-11-06 20:14 Kolja Waschk <kawk>
+
+ * src/svf/svf.c, src/svf/svf.h, src/svf/svf_bison.y,
+ src/svf/svf_flex.l: [ 1194137 ] better SVF diagnostics (+ manual
+ integration with previous jtag-svf-vec-hexa fix) (Hein Roehrig)
+
+2007-11-06 19:59 Kolja Waschk <kawk>
+
+ * src/svf/svf.c: [ 1194140 ] SVF better RUNTEST timing (Hein Roehrig)
+
+2007-11-06 19:53 Kolja Waschk <kawk>
+
+ * include/Makefile.am, include/cable.h, include/fclock.h, src/Makefile.am,
+ src/cmd/frequency.c, src/lib/Makefile.am, src/lib/fclock.c,
+ src/tap/cable.c: [ 1194130 ] busy-loop waiting (breaks compilation of
+ svf.c... wait for next two patches) (Hein Roehrig)
+
+2007-11-06 19:34 Kolja Waschk <kawk>
+
+ * src/tap/register.c: [ 1174000 ] Miscellanous fixes (omitting the
+ speedup for flash.c, obsoleted by an earlier patch) (Wojtek Kaniewski)
+
+2007-11-06 19:31 Kolja Waschk <kawk>
+
+ * src/bsdl2jtag.c: [ 1173997 ] bsdl2jtag bidir support (Wojtek$ Kaniewski)
+
+2007-11-06 19:29 Kolja Waschk <kawk>
+
+ * data/Makefile.am, data/ibm/ppc405ep, data/ibm/ppc405ep/STEPPINGS,
+ data/ibm/ppc405ep/ppc405ep: [ 1173994 ] IBM PPC405EP support (Wojtek
+ Kaniewski)
+
+2007-11-06 19:25 Kolja Waschk <kawk>
+
+ * src/bsdl2jtag.c: [ 1169349 ] better error codes for bsdl2jtag (Hein
+ Roehrig)
+
+2007-11-06 19:23 Kolja Waschk <kawk>
+
+ * data/sharp/lh7a400/lh7a400: [ 1164111 ] FIX of the lh7a400 port (Marko
+ Roessler)
+
+2007-11-06 19:22 Kolja Waschk <kawk>
+
+ * data/Makefile.am, data/intel/PARTS, data/intel/pxa270,
+ data/intel/pxa270/STEPPINGS, data/intel/pxa270/pxa270,
+ libbrux/flash/intel.c, src/bus/buses.c, src/bus/buses.h,
+ src/bus/pxa2x0.c, src/flash.c: [ 1112022 ] PXA270 Support (Cliff Brake)
+
+2007-11-06 19:19 Kolja Waschk <kawk>
+
+ * README.svf, include/svf.h: [ 1074347 ] SVF Player (README and
+ include file) (Arnim Laeuger)
+
+2007-11-06 19:18 Kolja Waschk <kawk>
+
+ * data/freescale, data/freescale/PARTS, data/freescale/mpc5200,
+ data/freescale/mpc5200/STEPPINGS, data/freescale/mpc5200/mpc5200,
+ src/bus/mpc5200.c: [ 1079531 ] jtag mpc5200 support (added files)
+
+2007-11-06 19:06 Kolja Waschk <kawk>
+
+ * configure.ac, data/MANUFACTURERS, data/Makefile.am,
+ include/chain.h, src/bus/Makefile.am, src/bus/buses.c,
+ src/bus/buses.h: [ 1079531 ] jtag mpc5200 support (Asier Llano Palacios)
+
+2007-11-06 19:01 Kolja Waschk <kawk>
+
+ * src/Makefile.am: add -lm because SVF player uses floor()
+
+2007-11-06 18:58 Kolja Waschk <kawk>
+
+ * src/Makefile.am, src/cmd/Makefile.am, src/cmd/cmd.c,
+ src/cmd/svf.c, src/svf, src/svf/Makefile.am, src/svf/svf.c,
+ src/svf/svf.h, src/svf/svf_bison.y, src/svf/svf_flex.l,
+ src/tap/chain.c, src/tap/tap.c: [ 1074347 ] SVF Player (4
+ patches: jtag-svf, -inc1, -goto_state, -vec-hexa) (Arnim Laeuger)
+
+2007-11-06 18:47 Kolja Waschk <kawk>
+
+ * src/tap/cable/wiggler.c, src/tap/cable/wiggler2.c: [ 1060345 ]
+ Fix certain Wigglers. (David Vrabel)
+
+2007-11-06 18:37 Kolja Waschk <kawk>
+
+ * src/cmd/bit.c: fix error from merging 972649+1012149 in bit.c
+
+2007-11-06 18:32 Kolja Waschk <kawk>
+
+ * src/cmd/bit.c: [ 1012149 ] Error messages in src/cmd/bit.c file (Jerome
+ Debard)
+
+2007-11-06 18:21 Kolja Waschk <kawk>
+
+ * src/flash.c: [ 1012144 ] User messages printed during flashmem (Jerome
+ Debard)
+
+2007-11-06 18:14 Kolja Waschk <kawk>
+
+ * src/cmd/dr.c: [ 986415 ] Allow interactive loading of DR (Martin Buck)
+
+2007-11-06 18:09 Kolja Waschk <kawk>
+
+ * src/cmd/bit.c, src/cmd/cable.c, src/cmd/dr.c, src/cmd/endian.c,
+ src/cmd/flashmem.c, src/cmd/get.c, src/cmd/print.c,
+ src/cmd/register.c, src/cmd/set.c, src/cmd/shift.c,
+ src/part/part.c, src/tap/parport/direct.c,
+ src/tap/parport/ppdev.c: [ 972649 ] make jtag more tolerant of
+ case (Andrew Dyer)
+
+2007-11-06 18:04 Kolja Waschk <kawk>
+
+ * src/bus/ixp425.c, src/bus/mpc824x.c, src/bus/pxa2x0.c,
+ src/bus/s3c4510x.c, src/bus/sa1110.c, src/bus/sh7727.c,
+ src/bus/sh7750r.c, src/bus/sh7751r.c, src/cmd/detect.c,
+ src/tap/Makefile.am, src/tap/cable.c, src/tap/cable/wiggler2.c: [
+ 909598 ] Detect 16bit flash on PXA25x 1/2 (partially included for
+ compatibility with other patches and wiggler2 driver, but actual
+ new pxa2x0 patch omitted - another later patch will fix this) (Matej)
+
+2007-11-06 17:20 Kolja Waschk <kawk>
+
+ * src/bus/s3c4510x.c, src/cmd/peekpoke.c, src/jtag.c: [ 826404 ]
+ s3c4510 bus driver (without jedec.c fix) (Krzysztof Blaszkowski)
+
+2007-11-06 16:51 Kolja Waschk <kawk>
+
+ * include/flash.h: [ 1268229 ] gcc4 compilation fix (Asier Llano Palacios)
+
+2007-11-06 09:30 Kolja Waschk <kawk>
+
+ * libbrux, trunk/libbrux: moved libbrux subdir into jtag subdir. See
+ ChangeLog there too
+
+2007-11-02 Kolja Waschk <Kolja Waschk <kawk>>
+
+ * created "UrJTAG" project as fork of openwince jtag tools. All older
+ log entries in this ChangeLog describe the openwince development.
+
+2004-11-24 Marcel Telka <marcel@telka.sk>
+
+ * src/cmd/reset.c: New file.
+ * src/discovery.c (jtag_reset): Function changed to non-static.
+ * src/cmd/Makefile.am (libcmd_a_SOURCES): Added reset.c.
+ * src/cmd/cmd.c (cmds): Added cmd_reset.
+
+2004-11-21 Marcel Telka <marcel@telka.sk>
+
+ * src/jtag.c (jtag_parse_stream, cleanup): New function.
+ (jtag_parse_file): Replaced stream parsing algorithm with jtag_parse_stream() call. Removed support
+ for special filename '-'.
+ (main): Rewritten and improved startup sequence to distinguish between interactive invocation
+ and stdin input (fixed bug 858535, thanks to Andrew Dyer for an idea).
+
+2004-11-17 Marcel Telka <marcel@telka.sk>
+
+ * acinclude.m4: New file with VL_LIB_READLINE macro (removed dependency on ac-archive package).
+ * autogen.sh: Removed acinclude call (removed dependency on ac-archive package).
+
+2004-11-16 Marcel Telka <marcel@telka.sk>
+
+ * data/MANUFACTURERS: Added Lattice Semiconductors and IBM Semiconductors (patch 1012120, Jerome Debard).
+ * data/ibm/PARTS: New file (patch 1012120, Jerome Debard).
+ * data/ibm/ppc440gx/STEPPINGS: Ditto.
+ * data/ibm/ppc440gx/ppc440gx: Ditto.
+ * data/lattice/PARTS: Ditto.
+ * data/lattice/lc4032v-tqfp48/STEPPINGS: Ditto.
+ * data/lattice/lc4032v-tqfp48/lc4032v-tqfp48: Ditto.
+ * data/lattice/m4a3-256.192-fpbga256/STEPPINGS: Ditto.
+ * data/lattice/m4a3-256.192-fpbga256/m4a3-256.192-fpbga256: Ditto.
+ * data/lattice/m4a3-64.32-tqfp48/STEPPINGS: Ditto.
+ * data/lattice/m4a3-64.32-tqfp48/m4a3-64.32-tqfp48: Ditto.
+ * data/Makefile.am (nobase_dist_pkgdata_DATA): Added new files.
+
+2004-10-22 Marcel Telka <marcel@telka.sk>
+
+ * data/MANUFACTURERS: Added Sharp manufacturer (patch 886068, Marko Rößler).
+ * data/Makefile.am (nobase_dist_pkgdata_DATA): Added new files (patch 886068, Marko Rößler).
+ * data/sharp/PARTS: New file (patch 886068, Marko Rößler).
+ * data/sharp/lh7a400/STEPPINGS: Ditto.
+ * data/sharp/lh7a400/lh7a400: Ditto.
+ * src/bus/lh7a400.c: Ditto.
+ * src/bus/Makefile.am (libbus_a_SOURCES): Added lh7a400.c (patch 886068, Marko Rößler).
+ * src/bus/buses.c (bus_drivers): Added lh7a400_bus (patch 886068, Marko Rößler).
+ * src/bus/buses.h: Ditto.
+
+2004-10-17 Marcel Telka <marcel@telka.sk>
+
+ * configure.ac (AC_INIT): Changed version number to 0.6.
+ (AM_GNU_GETTEXT_VERSION): Changed version number for gettext to 0.14.1.
+
+2004-10-17 Marcel Telka <marcel@telka.sk>
+
+ * src/tap/cable/wiggler.c (nTRST): Changed pin value (patch 1040199, Andrew Dyer).
+ (nSRESET): New pin value (patch 1040199, Andrew Dyer).
+ (wiggler_init, wiggler_clock, wiggler_get_tdo, wiggler_set_trst): Changed nTRST to not inverted
+ signal (patch 1040199, Andrew Dyer).
+
+2004-09-21 Marcel Telka <marcel@telka.sk>
+
+ * data/intel/PARTS: Added support for different IXP425 frequency variants (patch 1030647, Trevor Man).
+
+2004-08-24 Marcel Telka <marcel@telka.sk>
+
+ * src/bus/Makefile.am (libbus_a_SOURCES): Added ppc440gx_ebc8.c.
+ * src/bus/buses.c (bus_drivers): Added ppc440gx_ebc8_bus (patch 1012154, Jerome Debard).
+ * src/bus/buses.h: Ditto.
+ * src/bus/ppc440gx_ebc8.c: New file (patch 1012154, Jerome Debard).
+
+2004-08-20 Marcel Telka <marcel@telka.sk>
+
+ * src/bus/pxa2x0.c (pxa2x0_bus_init): New function.
+ (pxa250_bus_prepare): Replaced bus initialization sequence with pxa2x0_bus_init() call.
+ (pxa2x0_bus_area): Added pxa2x0_bus_init() call.
+
+2004-08-20 Marcel Telka <marcel@telka.sk>
+
+ * src/tap/Makefile.am (libtap_a_SOURCES): Added cable/lattice.c.
+ * src/tap/cable.c (cable_drivers): Added lattice_cable_driver (patch 1012138, Jerome Debard).
+ * src/tap/cable/lattice.c: New file (patch 1012138, Jerome Debard).
+
+2004-08-19 Marcel Telka <marcel@telka.sk>
+
+ * src/bus/Makefile.am (libbus_a_SOURCES): Added tx4925.c (patch 972625, Andrew Dyer).
+ * src/bus/buses.c (bus_drivers): Added tx4925_bus (patch 972625, Andrew Dyer).
+ * src/bus/buses.h: Ditto.
+ * src/bus/tx4925.c: New file (patch 972625, Andrew Dyer).
+
+2004-08-17 Marcel Telka <marcel@telka.sk>
+
+ * data/MANUFACTURERS: Added Toshiba manufacturer (patch 972621, Andrew Dyer).
+ * data/Makefile.am (nobase_dist_pkgdata_DATA): Added new files (patch 972621, Andrew Dyer).
+ * data/xilinx/PARTS: Added XCR3032XL-VQ44 entry (patch 972621, Andrew Dyer).
+ * data/xilinx/xcr3032xl-vq44/STEPPINGS: New file (patch 972621, Andrew Dyer).
+ * data/xilinx/xcr3032xl-vq44/xcr3032xl-vq44: Ditto.
+ * data/toshiba/PARTS: Ditto.
+ * data/toshiba/tx4925/STEPPINGS: Ditto.
+ * data/toshiba/tx4925/tx4925: Ditto.
+ * data/toshiba/tx4926/STEPPINGS: Ditto.
+ * data/toshiba/tx4926/tx4926: Ditto.
+
+2004-08-17 Marcel Telka <marcel@telka.sk>
+
+ * data/Makefile.am (nobase_dist_pkgdata_DATA): Added new files.
+ * data/philips/PARTS: Added XCR3128XL-VQ100 entry (patch 1010714, Michael Lauer).
+ * data/xilinx/PARTS: Added directory for XCR3128XL-VQ100 entry (patch 1010714, Michael Lauer).
+ * data/philips/xcr3128xl-vq100/STEPPINGS: New file (patch 1010714, Michael Lauer).
+ * data/philips/xcr3128xl-vq100/xcr3128xl-vq100: Ditto.
+ * data/xilinx/xcr3128xl-vq100/xcr3128xl-vq100: Ditto.
+
+2004-08-16 Marcel Telka <marcel@telka.sk>
+
+ * src/bus/pxa2x0.c (bus_params_t): Added new member: inited.
+ (INITED): New macro.
+ (pxa2x0_bus_new): Removed BOOT_DEF initialization.
+ (pxa250_bus_prepare): Added BOOT_DEF initialization.
+
+2004-08-15 Marcel Telka <marcel@telka.sk>
+
+ * include/jtag.h (detect_parts): Changed return type.
+ * src/detect.c (detect_parts): Changed return value to return number of detected parts.
+ * src/cmd/detect.c (cmd_detect_run): Added reset of the chain->parts to NULL before
+ detect_parts() call. Ignored detect_parts() return value.
+
+2004-08-13 Marcel Telka <marcel@telka.sk>
+
+ * src/jtag.c: Added missing locale.h include (patch 986414, Martin Buck).
+
+2004-08-11 Marcel Telka <marcel@telka.sk>
+
+ * Makefile.rules (RECURSIVE_TARGETS, lint-recursive): Removed.
+ (lint): Added command to run recursive make.
+ (.PHONY): Removed lint-recursive.
+
+2004-06-13 Marcel Telka <marcel@telka.sk>
+
+ * data/broadcom/PARTS: Added BCM4712 entry (Alan Wallace).
+ * data/broadcom/bcm4712/STEPPINGS: New file (Alan Wallace).
+ * data/broadcom/bcm4712/bcm4712: Ditto.
+
+2004-01-20 Marcel Telka <marcel@telka.sk>
+
+ * acinclude.m4: File removed.
+ * autogen.sh: Added acinclude call.
+
+2003-12-20 Marcel Telka <marcel@telka.sk>
+
+ * src/bus/Makefile.am (libbus_a_SOURCES): Added au1500.c.
+ * src/bus/au1500.c: New file (patch 853883, Zhang Wei).
+ * src/bus/buses.c (bus_drivers): Added au1500_bus (patch 853883, Zhang Wei).
+ * src/bus/buses.h: Added au1500_bus.
+
+2003-11-02 Marcel Telka <marcel@telka.sk>
+
+ * configure.ac (AC_INIT): Changed version number to 0.5.2.
+
+ * data/Makefile.am (nobase_dist_pkgdata_DATA): Added motorola/mpc8245/1.2.
+ * data/motorola/mpc8245/1.2: New file.
+ * src/bus/mpc824x.c: Ditto.
+ * src/bus/Makefile.am (libbus_a_SOURCES): Added mpc824x.c.
+ * src/bus/buses.c (bus_drivers): Added mpc824x_bus.
+ * src/bus/buses.h (mpc824x_bus): Added bus declaration.
+
+ * include/bsbit.h (bsbit_alloc): Changed parameter name (signals -> signal).
+ * src/part/bsbit.c (bsbit_alloc): Changed parameter behaviour.
+ * src/cmd/bit.c (cmd_bit_run): Passed exact signal to bsbit_alloc() instead of list of signals.
+
+ * src/jtag.c (main): Added cfi_array deallocation.
+
+ * src/flash.c (set_flash_driver): Used global cfi_array variable to set flash driver.
+ (flashcheck): Function removed.
+ All function calls replaced by set_flash_driver().
+ (flashmsbin): Removed local cfi_array variable.
+ (flashmem): Removed local cfi_array variable. Fixed bug with one more block erase while programming
+ data at end of previous block.
+ (flasherase): Removed local cfi_array variable. Fixed block number calculation.
+ * src/readmem.c (readmem): Fixed bug while reading address near to end of 32 bit address range.
+ * src/bus/pxa2x0.c (pxa2x0_bus_new): Added BSR sampling before BOOT_DEF initialization (bugfix).
+
+2003-10-23 Marcel Telka <marcel@telka.sk>
+
+ * include/bssignal.h (salias_t): Added new type.
+ (salias_alloc, salias_free): Adde new function prototypes.
+ * include/part.h (struct part): Added new structure member 'saliases'.
+ * src/cmd/Makefile.am (libcmd_a_SOURCES): Added salias.c.
+ * src/cmd/cmd.c (cmds): Added cmd_salias.
+ * src/cmd/salias.c: New file.
+ * src/part/part.c (part_alloc): Added saliases initialization.
+ (part_free): Added saliases deallocation.
+ (part_find_signal): Added signal aliases searching.
+ * src/part/signal.c (salias_alloc, salias_free): New functions.
+
+2003-10-20 Marcel Telka <marcel@telka.sk>
+
+ * data/hitachi/hd64465/hd64465: Completed BSR bits declaration.
+
+2003-10-20 Marcel Telka <marcel@telka.sk>
+
+ * data/Makefile.am (nobase_dist_pkgdata_DATA): Added hitachi/sh7729/STEPPINGS and hitachi/sh7729/sh7729.
+ * data/hitachi/sh7729/STEPPINGS: New file (Beregnyei Balazs).
+ * data/hitachi/sh7729/sh7729: Ditto.
+
+2003-10-17 Marcel Telka <marcel@telka.sk>
+
+ * data/Makefile.am (nobase_dist_pkgdata_DATA): Added hitachi/hd64465/hd64465.
+ * data/hitachi/hd64465/hd64465: New file.
+
+2003-10-13 Marcel Telka <marcel@telka>
+
+ * data/intel/ixp425/STEPPINGS: Added B0 stepping.
+
+2003-10-11 Marcel Telka <marcel@telka>
+
+ Version 0.5.1 released.
+
+2003-09-23 Marcel Telka <marcel@telka.sk>
+
+ * src/flash.c (flash_drivers): Added amd_16_flash_driver (Bradley D. LaRonde).
+ (find_block): New function (Bradley D. LaRonde).
+ (flashmem): Added block calculations using exact CFI data (Bradley D. LaRonde).
+
+ * src/tap/cable/triton.c (triton_init): Removed unused variable 'data'.
+
+2003-09-15 Marcel Telka <marcel@telka.sk>
+
+ * configure.ac: Fixed spelling (patch 805108, Andreas Mohr).
+ * src/jtag.c (main): Ditto.
+ * src/cmd/discovery.c (cmd_discovery_help, cmd_discovery): Ditto.
+ * src/cmd/flashmem.c (cmd_flashmem_help): Ditto.
+
+ * src/tap/cable/ei012.c: Changed comment (patch 805108, Andreas Mohr).
+ * src/tap/cable/keithkoep.c: Ditto.
+ * src/tap/cable/mpcbdm.c: Ditto.
+
+2003-09-14 Marcel Telka <marcel@telka.sk>
+
+ * src/tap/cable/triton.c: New file (patch 805103, Andreas Mohr).
+ * src/tap/Makefile.am (libtap_a_SOURCES): Added cable/triton.c (patch 805103, Andreas Mohr).
+ * src/tap/cable.c (cable_drivers): Added triton_cable_driver member (patch 805103, Andreas Mohr).
+ * src/tap/cable/generic.h (PARAM_SRESET): New macro (patch 805103, Andreas Mohr).
+ (generic_params_t): New structure member 'sreset' (patch 805103, Andreas Mohr).
+
+ * configure.ac: Changed description for --with-include parameter (thanks to Andreas Mohr).
+
+2003-09-12 Marcel Telka <marcel@telka.sk>
+
+ * configure.ac (AC_CHECK_FUNCS): Added swprintf.
+ * src/cmd/print.c (cmd_print_run): Added alternative implementation of the header printing using
+ snprintf() for platforms without swprintf() function available.
+
+2003-09-12 Marcel Telka <marcel@telka.sk>
+
+ * configure.ac (AC_INIT): Changed version number to 0.5.1.
+
+2003-09-11 Marcel Telka <marcel@telka.sk>
+
+ * src/tap/cable/wiggler.c (wiggler_init, wiggler_clock, wiggler_get_tdo, wiggler_set_trst): Fixed
+ inverted TRST signal (see patch 799377 for more info, thanks to Mike Tesch for reporting).
+
+2003-09-11 Marcel Telka <marcel@telka.sk>
+
+ * src/cmd/dr.c (cmd_dr_run): Added test for missing active instruction and data register (thanks to
+ Mike Tesch for reporting).
+
+2003-09-10 Marcel Telka <marcel@telka.sk>
+
+ * src/bus/bcm1250.c (bcm1250_bus_printinfo, bcm1250_bus): Fixed typo (compatibile->compatible) in
+ output message (thanks to Andreas Mohr).
+ * src/bus/ixp425.c (ixp425_bus_printinfo, ixp425_bus): Ditto.
+ * src/bus/pxa2x0.c (pxa2x0_bus_printinfo, pxa2x0_bus): Ditto.
+ * src/bus/s3c4510x.c (s3c4510_bus_printinfo, s3c4510_bus): Ditto.
+ * src/bus/sa1110.c (sa1110_bus_printinfo, sa1110_bus): Ditto.
+ * src/bus/sh7727.c (sh7727_bus_printinfo, sh7727_bus): Ditto.
+ * src/bus/sh7750r.c (sh7750r_bus_printinfo, sh7750r_bus): Ditto.
+ * src/bus/sh7751r.c (sh7751r_bus_printinfo, sh7751r_bus): Ditto.
+
+2003-09-05 Marcel Telka <marcel@telka.sk>
+
+ * include/bus.h (bus_drivers): Added constant declaration.
+ (new_sa1110_bus, new_pxa250_bus, new_ixp425_bus, new_sh7727_bus, new_sh7750r_bus, new_sh7751r_bus)
+ (new_bcm1250_bus): Function declarations removed.
+ * src/bus/buses.c (bus_drivers): New constant definition.
+ * src/bus/buses.h: New file.
+ * src/bus/Makefile.am (libbus_a_SOURCES): Added buses.h.
+
+ * src/bus/bcm1250.c (bcm1250_bus_printinfo): Added new function parameter 'bus'.
+ (bcm1250_bus): Changed structure type to bus_driver_t. Changed members.
+ (new_bcm1250_bus): Function renamed ...
+ (bcm1250_bus_new): ... to this one. Changed parameter list to void (and function body updated).
+ * src/bus/ixp425.c (ixp425_bus_printinfo): Added new function parameter 'bus'.
+ (ixp425_bus): Changed structure type to bus_driver_t. Changed members.
+ (new_ixp425_bus): Function renamed ...
+ (ixp425_bus_new): ... to this one. Changed parameter list to void (and function body updated).
+ * src/bus/pxa2x0.c (pxa2x0_bus_printinfo): Added new function parameter 'bus'.
+ (pxa250_bus): Structure transformed ...
+ (pxa2x0_bus): ... to this constant (changed type to bus_driver_t, changed members).
+ (new_pxa250_bus): Function renamed ...
+ (pxa2x0_bus_new): ... to this one. Changed parameter list to void (and function body updated).
+ * src/bus/s3c4510x.c (s3c4510_bus_printinfo): Added new function parameter 'bus'.
+ (s3c4510_bus): Changed structure type to bus_driver_t. Changed members.
+ (new_s3c4510_bus): Function renamed ...
+ (s3c4510_bus_new): ... to this one. Changed parameter list to void (and function body updated).
+ * src/bus/sa1110.c (sa1110_bus_printinfo): Added new function parameter 'bus'.
+ (sa1110_bus): Changed structure type to bus_driver_t. Changed members.
+ (new_sa1110_bus): Function renamed ...
+ (sa1110_bus_new): ... to this one. Changed parameter list to void (and function body updated).
+ * src/bus/sh7727.c (sh7727_bus_printinfo): Added new function parameter 'bus'.
+ (sh7727_bus): Changed structure type to bus_driver_t. Changed members.
+ (new_sh7727_bus): Function renamed ...
+ (sh7727_bus_new): ... to this one. Changed parameter list to void (and function body updated).
+ * src/bus/sh7750r.c (sh7750r_bus_printinfo): Added new function parameter 'bus'.
+ (sh7750r_bus): Changed structure type to bus_driver_t. Changed members.
+ (new_sh7750r_bus): Function renamed ...
+ (sh7750r_bus_new): ... to this one. Changed parameter list to void (and function body updated).
+ * src/bus/sh7751r.c (sh7751r_bus_printinfo): Added new function parameter 'bus'.
+ (sh7751r_bus): Changed structure type to bus_driver_t. Changed members.
+ (new_sh7751r_bus): Function renamed ...
+ (sh7751r_bus_new): ... to this one. Changed parameter list to void (and function body updated).
+
+ * src/cmd/cable.c (cmd_cable_run): Replaced bus->free() call with bus_free().
+ * src/jtag.c (main): Ditto.
+
+ * src/cmd/cmd.c (cmds): Added cmd_initbus.
+ * src/cmd/detect.c (cmd_detect_run): Removed explicit bus driver detection.
+ * src/cmd/initbus.c: New file.
+ * src/cmd/Makefile.am (libcmd_a_SOURCES): Added initbus.c.
+
+ * data/broadcom/bcm1250/bcm1250: Added 'initbus' command call.
+ * data/hitachi/sh7727/sh7727: Ditto.
+ * data/intel/ixp425/ixp425: Ditto.
+ * data/intel/pxa250/pxa250: Ditto.
+ * data/intel/pxa250/pxa250c0: Ditto.
+ * data/intel/sa1110/sa1110: Ditto.
+ * data/samsung/s3c4510b/s3c4510b: Ditto.
+
+2003-09-04 Marcel Telka <marcel@telka.sk>
+
+ * configure.ac (CPPFLAGS): Added top_srcdir into include directory list.
+
+2003-09-03 Marcel Telka <marcel@telka.sk>
+
+ * src/bus/pxa2x0.c (set_data_in, setup_data): Added new 'adr' parameter. Used real data bus width
+ for data reading (based on patch 792591, thanks to Guennadi Liakhovetski).
+ All function callers updated.
+ (pxa250_bus_read_next, pxa250_bus_read_end): Used real data bus width for data reading (based on
+ patch 792591, thanks to Guennadi Liakhovetski).
+ * src/bus/sa1110.c (set_data_in, setup_data, sa1110_bus_read_next, sa1110_bus_read_end): Ditto.
+ * src/bus/sh7727.c (set_data_in, setup_data, sh7727_bus_read_next, sh7727_bus_read_end): Ditto.
+
+2003-08-28 Marcel Telka <marcel@telka.sk>
+
+ * src/bus/pxa2x0.c (pxa250_bus_read_next, pxa250_bus_read_end): Added support for BOOT_DEF register
+ emulation.
+ (pxa2x0_bus_area): Added Memory Mapped registers (Memory Ctl) area.
+
+2003-08-28 Marcel Telka <marcel@telka.sk>
+
+ * src/readmem.c (readmem): Replaced bus_width macro with new bus_area.
+ * src/bus/bcm1250.c (bcm1250_bus_width): Function removed.
+ (bcm1250_bus_area): New function.
+ * src/bus/ixp425.c (ixp425_bus_width): Function removed.
+ (ixp425_bus_area): New function.
+ * src/bus/pxa2x0.c (pxa250_bus_width): Function removed.
+ (pxa2x0_bus_area): New function.
+ * src/bus/s3c4510x.c (s3c4510_bus_width): Function removed.
+ (s3c4510_bus_area): New function.
+ * src/bus/sa1110.c (sa1110_bus_width: Function removed.
+ (sa1110_bus_area): New function.
+ * src/bus/sh7727.c (sh7727_bus_width): Function removed.
+ (sh7727_bus_area): New function.
+ * src/bus/sh7750r.c (sh7750r_bus_width): Function removed.
+ (sh7750r_bus_area): New function.
+ * src/bus/sh7751r.c (sh7751r_bus_width): Function removed.
+ (sh7751r_bus_area): New function.
+ * src/cmd/print.c (cmd_print_run): Added bus area printing.
+
+2003-08-27 Marcel Telka <marcel@telka.sk>
+
+ * include/flash.h: Removed CFI_INTEL_ERROR_* macros.
+
+2003-08-26 Marcel Telka <marcel@telka.sk>
+
+ * src/cmd/print.c (cmd_print_run): Fixed header print format.
+
+2003-08-25 Marcel Telka <marcel@telka.sk>
+
+ * configure.ac (AC_INIT): Changed package name.
+ * src/jtag.c (main): Added full package name to banner.
+
+2003-08-22 Marcel Telka <marcel@telka.sk>
+
+ * src/tap/cable/byteblaster.c (byteblaster_init): Added additional checks for valid ByteBlaster cable
+ connection and enabled all variants of the cable (patch 793313, Rojhalat Ibrahim).
+
+2003-08-22 Marcel Telka <marcel@telka.sk>
+
+ * MANUFACTURERS: Added Altera manufacturer (Rojhalat Ibrahim).
+ * altera/PARTS: New file (Rojhalat Ibrahim).
+ * altera/ep1c20f400/STEPPINGS: Ditto.
+ * altera/ep1c20f400/ep1c20f400: Ditto.
+ * altera/epm7128aetc100/STEPPINGS: Ditto.
+ * altera/epm7128aetc100/epm7128aetc100: Ditto.
+ * Makefile.am (nobase_dist_pkgdata_DATA): Added new Altera JTAG files.
+
+2003-08-19 Marcel Telka <marcel@telka.sk>
+
+ Version 0.5 released.
+
+2003-08-19 Marcel Telka <marcel@telka.sk>
+
+ * configure.ac (AM_GNU_GETTEXT_VERSION): Changed version number to 0.12.1.
+
+2003-08-19 Marcel Telka <marcel@telka.sk>
+
+ * src/bus/s3c4510x.c: Changed comment.
+
+2003-08-19 Marcel Telka <marcel@telka.sk>
+
+ * src/bus/Makefile.am (libbus_a_SOURCES): Added s3c4510x.c.
+ * src/bus/s3c4510x.c: New file (Jiun-Shian Ho).
+
+2003-08-19 Marcel Telka <marcel@telka.sk>
+
+ * src/tap/parport/direct.c (direct_connect): Marked two indirect strings for translation.
+ * src/tap/parport/ppdev.c (ppdev_connect): Ditto.
+
+2003-08-19 Marcel Telka <marcel@telka.sk>
+
+ * sysdep.h: Renamed pkgcfg.h to config.h.
+ * configure.ac (AM_CONFIG_HEADER): Ditto.
+
+2003-08-19 Marcel Telka <marcel@telka.sk>
+
+ * src/jtag.c (main): Fixed setlocale() call.
+ * Makefile.am (noinst_HEADERS): Renamed config.h -> sysdep.h.
+ * config.h: Renamed this file ...
+ * sysdep.h: ... to this one.
+ Changed config.h -> sysdep.h include in all source files.
+
+2003-08-18 Marcel Telka <marcel@telka.sk>
+
+ * data/samsung/s3c4510b/s3c4510b: Fixed some errors in instruction declarations (Jiun-Shian Ho).
+
+2003-08-18 Marcel Telka <marcel@telka.sk>
+
+ * src/detect.c (detect_parts): Marked one forgotten string for translation.
+ * src/cmd/bit.c (cmd_bit_run): Fixed control bit setup.
+ * src/cmd/eraseflash.c (cmd_eraseflash_run): Changed formatting.
+ (cmd_eraseflash_help): Updated help text.
+ * src/cmd/flashmem.c (cmd_flashmem_help): Ditto.
+ * src/cmd/readmem.c (cmd_readmem_help): Ditto.
+
+2003-08-14 Marcel Telka <marcel@telka.sk>
+
+ * include/jtag.h (flasherase): New function prototype (patch 772267, Thomas Fröhlich).
+ * src/flash.c (flasherase): New function (patch 772267, Thomas Fröhlich).
+ * src/cmd/Makefile.am (libcmd_a_SOURCES): Added eraseflash.c (patch 772267, Thomas Fröhlich).
+ * src/cmd/cmd.c (cmds): Added cmd_eraseflash (patch 772267, Thomas Fröhlich).
+ * src/cmd/eraseflash.c: New file (patch 772267, Thomas Fröhlich).
+
+2003-08-14 Marcel Telka <marcel@telka.sk>
+
+ * src/tap/chain.c (chain_shift_instructions): Moved test for parts without active instruction before
+ shifting process.
+ (chain_shift_data_registers): Moved test for parts without active instruction or data register before
+ shifting process.
+
+2003-08-14 Marcel Telka <marcel@telka.sk>
+
+ * data/Makefile.am (nobase_dist_pkgdata_DATA): Added samsung/s3c4510b/s3c4510b.
+ * data/samsung/s3c4510b/s3c4510b: New file (Jiun-Shian Ho).
+
+2003-08-14 Marcel Telka <marcel@telka.sk>
+
+ * data/MANUFACTURERS: Changed directory name for Philips.
+ * data/Makefile.am (nobase_dist_pkgdata_DATA): Added philips/PARTS, philips/xcr3128xl-cs144/STEPPINGS, and
+ philips/xcr3128xl-cs144/xcr3128xl-cs144.
+ * data/philips/PARTS: New file.
+ * data/philips/xcr3128xl-cs144/STEPPINGS: Ditto.
+ * data/philips/xcr3128xl-cs144/xcr3128xl-cs144: Ditto.
+ * include/part.h (MAXLEN_MANUFACTURER): Increased size to 25.
+
+2003-08-13 Marcel Telka <marcel@telka.sk>
+
+ * include/jtag.h (detect_register_size): Added function declaration.
+ * src/discovery.c (detect_register_size): Changed to non-static.
+ * src/detect.c (detect_parts): Added support for parts without IDCODE.
+
+2003-08-13 Marcel Telka <marcel@telka.sk>
+
+ * src/bus/sa1110.c (sa1110_bus_width): Removed bus width printing.
+ * src/bus/sh7751r.c (sh7751r_bus_printinfo): New function.
+
+2003-08-13 Marcel Telka <marcel@telka.sk>
+
+ * include/bus.h (new_sh7751r_bus): New function declaration (patch 773533, Matan Ziv-Av).
+ * src/bus/Makefile.am (libbus_a_SOURCES): Added sh7751r.c (patch 773533, Matan Ziv-Av).
+ * src/bus/sh7751r.c: New file (patch 773533, Matan Ziv-Av).
+
+2003-08-13 Marcel Telka <marcel@telka.sk>
+
+ * include/part.h (struct part): Added new member 'id'.
+ (part_alloc): Added new parameter 'id'.
+ * src/detect.c (detect_parts): Added execution JTAG declarations as script.
+ * src/jtag.c (get_token): Added support for in-line comments.
+ * src/cmd/Makefile.am (libcmd_a_SOURCES): Added signal.c, bit.c, and register.c.
+ * src/cmd/bit.c: New file.
+ * src/cmd/register.c: Ditto.
+ * src/cmd/signal.c: Ditto.
+ * src/cmd/cmd.c (cmds): Added cmd_signal, cmd_bit, and cmd_register.
+ * src/cmd/instruction.c (cmd_instruction_run, cmd_instruction_help, cmd_instruction): Added support
+ for new instruction declaration.
+ * src/part/parse.c: File removed.
+ * src/part/Makefile.am (libpart_a_SOURCES): Removed parse.c.
+ * src/cmd/detect.c (cmd_detect_run): Fixed possible NULL pointer dereference.
+ * src/part/part.c (part_alloc): Added new parameter 'id'.
+ (part_free): Addedd id deallocation.
+ (part_print): Added support for instructions without data register.
+ * src/tap/chain.c (chain_shift_data_registers): Ditto.
+
+2003-08-13 Marcel Telka <marcel@telka.sk>
+
+ * data/broadcom/bcm5421s/bcm5421s: Fixed bad pin -> signal changes.
+
+2003-08-13 Marcel Telka <marcel@telka.sk>
+
+ * data/broadcom/bcm1250/bcm1250: Changed pin -> signal keyword.
+ * data/broadcom/bcm5421s/bcm5421s: Ditto.
+ * data/hitachi/sh7727/sh7727: Ditto.
+ * data/intel/ixp425/ixp425: Ditto.
+ * data/intel/pxa250/pxa250: Ditto.
+ * data/intel/pxa250/pxa250c0: Ditto.
+ * data/intel/sa1110/sa1110: Ditto.
+ * data/xilinx/xc2c256-tq144/xc2c256-tq144: Ditto.
+ * data/xilinx/xcr3128xl-cs144/xcr3128xl-cs144: Ditto.
+ * data/xilinx/xcr3256xl-ft256/xcr3256xl-ft256: Ditto.
+
+2003-08-12 Marcel Telka <marcel@telka.sk>
+
+ * src/bsdl2jtag.c (endline): Added support for "downto" in bit vectors and "observe_only" (patch 787346,
+ Brad Parker).
+
+2003-08-11 Marcel Telka <marcel@telka.sk>
+
+ * src/cmd/Makefile.am (libcmd_a_SOURCES): Added include.c.
+ * src/cmd/include.c: New file.
+ * src/cmd/cmd.c (cmds): Added cmd_include.
+
+2003-08-11 Marcel Telka <marcel@telka.sk>
+
+ * src/flash.c (flash_drivers): Added amd_8_flash_driver.
+
+2003-08-11 Marcel Telka <marcel@telka.sk>
+
+ * include/bus.h (buses_t): Added new structure.
+ * src/jtag.c (bus): Removed global variable.
+ * src/bus/Makefile.am (libbus_a_SOURCES): Added buses.c.
+ * src/bus/buses.c: New file.
+ * src/bus/bcm1250.c (bcm1250_bus_printinfo): New function.
+ * src/bus/ixp425.c (ixp425_bus_printinfo): Ditto.
+ * src/bus/pxa2x0.c (pxa2x0_bus_printinfo): Ditto.
+ * src/bus/sa1110.c (sa1110_bus_printinfo): Ditto.
+ * src/bus/sh7727.c (sh7727_bus_printinfo): Ditto.
+ * src/bus/sh7750r.c (sh7750r_bus_printinfo): Ditto.
+ * src/cmd/Makefile.am (libcmd_a_SOURCES): Added bus.c.
+ * src/cmd/bus.c: New file.
+ * src/cmd/cmd.c (cmds): Added cmd_bus.
+ * src/cmd/detect.c (cmd_detect_run): Added support for multiple buses detection.
+ * src/cmd/print.c (cmd_print_run): Fixed header printing while syntax error. Added support for printing
+ list of active buses.
+ (cmd_print_help): Added new parameter 'bus'.
+
+2003-08-11 Marcel Telka <marcel@telka.sk>
+
+ * configure.ac (AC_INIT): Changed version number to 0.5.
+
+ * include/chain.h (chain_t): Added active_part.
+ * src/tap/chain.c (chain_alloc): Added active_part initialization.
+ * include/part.h (parts_print): Removed 'header' parameter.
+ * src/part/part.c (parts_print): Removed header printing.
+ * src/cmd/print.c (cmd_print_run): Added header printg. Added new parameter 'chain' for print command.
+ (cmd_print_help): Added new parameter 'chain'.
+ * src/cmd/dr.c (cmd_dr_run, cmd_dr_help): Removed PART parameter.
+ * src/cmd/get.c (cmd_get_run, cmd_get_help): Ditto.
+ * src/cmd/instruction.c (cmd_instruction_run, cmd_instruction_help): Ditto.
+ * src/cmd/set.c (cmd_set_run, cmd_set_help): Ditto.
+ * src/cmd/Makefile.am (libcmd_a_SOURCES): Adde part.c.
+ * src/cmd/part.c: New file.
+ * src/cmd/cmd.c (cmds): Added cmd_part.
+
+2003-07-25 Marcel Telka <marcel@telka.sk>
+
+ * data/Makefile.am (nobase_dist_pkgdata_DATA): Added broadcom/bcm3310/STEPPINGS and
+ broadcom/bcm3310/bcm3310.
+ * data/broadcom/PARTS: Added BCM3310.
+ * data/broadcom/bcm3310/STEPPINGS: New file.
+ * data/broadcom/bcm3310/bcm3310: Ditto.
+
+2003-07-24 Marcel Telka <marcel@telka.sk>
+
+ * po/POTFILES.in: Removed missing files.
+ * configure.ac: Removed VL_LIB_READLINE macro and moved it to ...
+ * acinclude.m4: ... this new file.
+
+2003-07-16 Marcel Telka <marcel@telka.sk>
+
+ * src/jtag.c (jtag_parse_line): Fixed invalid memory allocation size (core dump).
+
+2003-07-01 Marcel Telka <marcel@telka.sk>
+
+ * include/bus.h (new_sh7750r_bus, new_bcm1250_bus): New function declarations (patch 753300, Matan Ziv-Av).
+ * src/bus/Makefile.am (libbus_a_SOURCES): Added bcm1250.c and sh7750r.c (patch 753300, Matan Ziv-Av).
+ * src/bus/bcm1250.c: New file (patch 753300, Matan Ziv-Av).
+ * src/bus/sh7750r.c: Ditto.
+ * src/cmd/detect.c (cmd_detect_run): Added bus driver for SH7750R and BCM1250 (patch 753300, Matan Ziv-Av).
+
+2003-06-19 Marcel Telka <marcel@telka.sk>
+
+ * include/jtag.h (discovery): Removed 'filename' parameter.
+ * src/discovery.c (TEST_COUNT): Changed test repeat count from 5 to 1.
+ (detect_register_size): Removed 'f' parameter. Removed output messages.
+ (jtag_reset): Removed sleep() calls.
+ (discovery): Removed 'filename' parameter. Removed support for output to file. Simplified output
+ messages.
+ * src/cmd/discovery.c (cmd_discovery_run): Removed FILENAME parameter.
+ (cmd_discovery_help): Updated help text.
+
+2003-06-18 Marcel Telka <marcel@telka.sk>
+
+ * src/discovery.c (discovery): Removed explicit JTAG chain length detection. Changed starting of the DR
+ size detection from all 1 instead all 0 for IR (patch 753298, Matan Ziv-Av).
+
+2003-06-18 Marcel Telka <marcel@telka.sk>
+
+ * /src/flash.c (flash_drivers): Added 1 x 8 bit Intel Flash driver (patch 753295, Matan Ziv-Av).
+
+2003-06-12 Marcel Telka <marcel@telka.sk>
+
+ * include/flash.h (flash_driver_t): Structure removed.
+ (flash_erase_block, flash_unlock_block, flash_program, flash_readarray): Macro removed.
+ * src/flash.c (set_flash_driver, flashcheck, flashmsbin, flashmem): Updated for new
+ flash_driver_t declared in brux/flash.h in include module.
+
+2003-06-10 Marcel Telka <marcel@telka.sk>
+
+ * include/Makefile.am (noinst_HEADERS): Removed cfi.h.
+ * include/cfi.h: File removed.
+ * src/flash.c: Updated include header files.
+
+2003-06-10 Marcel Telka <marcel@telka.sk>
+
+ * src/bus/sh7727.c (bus_params_t): Added md3 and md4.
+ (sh7727_bus_width): Moved to implementation using MD3 and MD4 (thanks to Rainer Dörken).
+ (new_sh7727_bus): Added MD3 and MD4 signal searching (thanks to Rainer Dörken).
+
+2003-06-10 Marcel Telka <marcel@telka.sk>
+
+ * src/bus/ixp425.c (ixp425_bus_width): Changed return value type (int -> unsigned int).
+ * src/bus/pxa2x0.c (pxa250_bus_width): Ditto.
+ * src/bus/sa1110.c (sa1110_bus_width): Ditto.
+ * src/bus/sh7727.c (sh7727_bus_width): Ditto.
+
+2003-06-06 Marcel Telka <marcel@telka.sk>
+
+ * src/bus/sh7727.c (bus_params_t): Fixed cs array length.
+ (setup_address): Removed address shift by BASE.
+ (sh7727_bus_read_end): Simplified CS handling.
+ (new_sh7727_bus): Fixed CS signal searching (thanks to Rainer Dörken).
+
+2003-06-03 Marcel Telka <marcel@telka.sk>
+
+ * include/cfi.h (detect_cfi): Macro removed.
+ * src/flash.c (flashcheck): Renamed detect_cfi to cfi_detect.
+
+2003-06-03 Marcel Telka <marcel@telka.sk>
+
+ * src/Makefile.am (jtag_LDADD): Added libbrux twice to resolve dependencies.
+ * src/jtag.c: Fixed cmd.h include path.
+
+2003-06-03 Marcel Telka <marcel@telka.sk>
+
+ * src/cmd/Makefile.am (libcmd_a_SOURCES): Removed quit.c, help.c, and detectflash.c.
+ * src/cmd/cmd.c (cmd_run, cmd_params, cmd_get_number): Functions moved to module libbrux,
+ file cmd/cmd.c.
+ * src/cmd/detectflash.c: File moved to module libbrux, directory cmd.
+ * src/cmd/help.c: Ditto.
+ * src/cmd/quit.c: Ditto.
+
+2003-06-03 Marcel Telka <marcel@telka.sk>
+
+ * include/Makefile.am (noinst_HEADERS): Added cmd.h.
+ * include/cmd.h: New file.
+ * src/cmd/Makefile.am (libcmd_a_SOURCES): Removed cmd.h.
+ * src/cmd/cmd.h: File removed. Partially moved to include module (file brux/cmd.h).
+
+ * src/cmd/detectflash.c (cmd_detectflash_help): Changed help text.
+
+2003-06-03 Marcel Telka <marcel@telka.sk>
+
+ * src/readmem.c (detectflash): Function extracted to module libbrux, file flash/detectflash.c.
+
+2003-06-03 Marcel Telka <marcel@telka.sk>
+
+ * include/jtag.h (detectflash, flashmem, flashmsbin): Declarations moved to include module,
+ file brux/flash.h.
+
+2003-06-03 Marcel Telka <marcel@telka.sk>
+
+ * src/cmd/cable.c (cmd_cable_run): Added bus deallocation.
+ * src/cmd/detectflash.c (cmd_detectflash_run): Removed cable connection test.
+ * src/cmd/flashmem.c (cmd_flashmem_run): Ditto.
+ * src/cmd/peekpoke.c (cmd_peek_run, cmd_poke_run): Ditto.
+ * src/cmd/readmem.c (cmd_readmem_run): Ditto.
+
+2003-06-03 Marcel Telka <marcel@telka.sk>
+
+ * src/flash.c (flashmsbin, flashmem): Removed '\r' from translatable messages.
+ * src/readmem.c (readmem): Ditto.
+
+2003-06-03 Marcel Telka <marcel@telka.sk>
+
+ * src/cmd/Makefile.am (libcmd_a_SOURCES): Added peekpoke.c (patch 747447, Matan Ziv-Av).
+ * src/cmd/cmd.c (cmds): Added peek and poke commands (patch 747447, Matan Ziv-Av).
+ * src/cmd/peekpoke.c: New file (patch 747447, Matan Ziv-Av).
+ * po/POTFILES.in: Updated.
+
+ * include/bus.h (bus_t): Declaration moved to include module (brux/bus.h).
+ * include/cfi.h (cfi_chip_t, cfi_array_t, cfi_array_free, detect_cfi): Declarations moved
+ to include module (brux/cfi.h).
+
+2003-06-02 Marcel Telka <marcel@telka.sk>
+
+ * Makefile.am (SUBDIRS): Added libbrux.
+ * configure.ac (AC_CONFIG_FILES): Removed src/flash/Makefile.
+ (AC_CONFIG_SUBDIRS): Added libbrux.
+ * src/Makefile.am (SUBDIRS): Removed flash.
+ (jtag_DEPENDENCIES): Removed flash/libflash.a, added ../libbrux/libbrux.a.
+ (jtag_LDADD): Removed libflash, added libbrux.
+ * src/flash/Makefile.am: File removed.
+ * src/flash/amd.c: File moved to module libbrux, directory flash.
+ * src/flash/cfi.c: Ditto.
+ * src/flash/intel.c: Ditto.
+
+2003-05-30 Marcel Telka <marcel@telka.sk>
+
+ * src/tap/parport/direct.c (direct_set_control): Inverted SELECT, AUTOFD, and STROBE
+ signals (bug 745824).
+ * src/tap/parport/ppdev.c (ppdev_set_control): Ditto.
+ * src/tap/cable/mpcbdm.c (mpcbdm_init, mpcbdm_set_trst): Changed (inverted) TRST handling.
+ (mpcbdm_clock, mpcbdm_get_tdo): Removed TRST setting.
+
+2003-05-29 Marcel Telka <marcel@telka.sk>
+
+ Version 0.4 released.
+
+2003-05-29 Marcel Telka <marcel@telka.sk>
+
+ * src/bsdl2jtag.c (main): Renamed 'pin' keyword to 'signal'.
+ * src/part/parse.c (read_part): Added support for 'signal' keyword.
+
+ * data/Makefile.am (nobase_dist_pkgdata_DATA): Added new files.
+ * data/dec/PARTS: New file.
+ * data/dec/sa1100/STEPPINGS: New file (thanks to Jachym Holecek).
+ * data/dec/sa1100/sa1100: New file.
+
+2003-05-28 Marcel Telka <marcel@telka.sk>
+
+ * configure.ac (AC_INIT): Changed version number to 0.4.
+
+ * src/cmd/frequency.c (cmd_frequency_run): Added support for printing current TCK frequency.
+ (cmd_frequency_help): Updated help text.
+
+ * po/POTFILES.in: Updated.
+ * src/detect.c (find_record, detect_parts): Marked messages for translation.
+ * src/discovery.c (detect_register_size, discovery): Ditto.
+ * src/flash.c (set_flash_driver, flashcheck, flashmsbin, flashmem): Ditto.
+ * src/readmem.c (readmem): Ditto.
+ * src/flash/amd.c (amd_flash_print_info, amd_32_flash_driver): Ditto.
+ * src/flash/intel.c (_intel_flash_print_info, intel_flash_erase_block, intel_flash_unlock_block)
+ (intel_flash_program, intel_32_flash_driver, intel_16_flash_driver): Ditto.
+ * src/tap/cable/arcom.c (arcom_cable_driver): Ditto.
+ * src/tap/cable/byteblaster.c (byteblaster_cable_driver): Ditto.
+ * src/tap/cable/dlc5.c (dlc5_cable_driver): Ditto.
+ * src/tap/cable/ea253.c (ea253_cable_driver): Ditto.
+ * src/tap/cable/ei012.c (ei012_cable_driver): Ditto.
+ * src/tap/cable/keithkoep.c (keithkoep_cable_driver): Ditto.
+ * src/tap/cable/mpcbdm.c (mpcbdm_cable_driver): Ditto.
+ * src/tap/cable/wiggler.c (wiggler_cable_driver): Ditto.
+
+2003-05-27 Marcel Telka <marcel@telka.sk>
+
+ * src/part/part.c (part_set_signal, part_get_signal): Moved variable declarations to beginning
+ of a block (Matan Ziv-Av).
+
+2003-05-26 Marcel Telka <marcel@telka.sk>
+
+ * include/bus.h (new_sh7727_bus): Added function declaration.
+ * src/cmd/detect.c (cmd_detect_run): Added bus driver for Hitachi SH7727.
+ * src/bus/Makefile.am (libbus_a_SOURCES): Added sh7727.c (patch 743140, Matan Ziv-Av).
+ * src/bus/sh7727.c: New file (based on patch 743140, Matan Ziv-Av).
+
+2003-05-26 Marcel Telka <marcel@telka.sk>
+
+ * include/chain.h (chain_shift_data_registers): Added new parameter `capture_output' (idea from
+ patch 743146, Matan Ziv-Av).
+ * src/tap/chain.c (chain_shift_data_registers): Ditto.
+ All chain_shift_data_registers() function callers updated.
+
+2003-05-26 Marcel Telka <marcel@telka.sk>
+
+ * data/Makefile.am (nobase_dist_pkgdata_DATA): Added broadcom/bcm5421s/STEPPINGS
+ and broadcom/bcm5421s/bcm5421s.
+ * data/MANUFACTURERS: Added new manufacturer ID code for Boradcom (patch 743129, Matan Ziv-Av).
+ * data/broadcom/PARTS: Added entry for BC5421S (patch 743129, Matan Ziv-Av).
+ * data/broadcom/bcm5421s/STEPPINGS: New file (patch 743129, Matan Ziv-Av).
+ * data/broadcom/bcm5421s/bcm5421s: Ditto.
+
+2003-05-22 Marcel Telka <marcel@telka.sk>
+
+ * configure.ac (AM_CONFIG_HEADER): Renamed acconfig.h configuration header to pkgcfg.h.
+ * config.h: Ditto.
+
+2003-05-22 Marcel Telka <marcel@telka.sk>
+
+ * config.h: New file.
+ Changed all relevant source files to include this file unconditionaly.
+ * Makefile.am (noinst_HEADERS): Added config.h.
+ * configure.ac (AM_CONFIG_HEADER): Renamed generated configuration file
+ from config.h to acconfig.h.
+
+2003-05-22 Marcel Telka <marcel@telka.sk>
+
+ * src/jtag.c: Added new global variable 'big_endian'.
+ * include/jtag.h: Ditto.
+ * src/flash.c (flashmem): Added full support for little/big endian.
+ * src/readmem.c (readmem): Ditto.
+ * src/cmd/Makefile.am (libcmd_a_SOURCES): Added endian.c.
+ * src/cmd/cmd.c (cmds): Added new command 'endian'.
+ * src/cmd/endian.c: New file.
+
+2003-05-21 Marcel Telka <marcel@telka.sk>
+
+ * Makefile.rules: New file.
+ * Makefile.am: Added Makefile.rules include.
+ (EXTRA_DIST): Added Makefile.rules.
+ * data/Makefile.am: Added Makefile.rules include.
+ * doc/Makefile.am: Ditto.
+ * include/Makefile.am: Ditto.
+ * po/Makevars: Ditto.
+ * src/Makefile.am: Ditto.
+ * src/bus/Makefile.am: Ditto.
+ * src/cmd/Makefile.am: Ditto.
+ * src/flash/Makefile.am: Ditto.
+ * src/lib/Makefile.am: Ditto.
+ * src/part/Makefile.am: Ditto.
+ * src/tap/Makefile.am: Ditto.
+
+2003-05-21 Marcel Telka <marcel@telka.sk>
+
+ * include/signal.h: Renamed this file ...
+ * include/bssignal.h: ... to this one.
+ All includes changed.
+ * include/Makefile.am (noinst_HEADERS): Renamed signal.h to bssignal.h.
+
+ * include/data_register.h: Marked local include files with double quotes.
+ * include/instruction.h: Ditto.
+ * include/part.h: Ditto.
+
+2003-05-21 Marcel Telka <marcel@telka.sk>
+
+ * include/bsbit.h (bsbit, bsbit_t): Renamed typedef bsbit to bsbit_t.
+ All occurences of the bsbit type changed to bsbit_t.
+
+2003-05-21 Marcel Telka <marcel@telka.sk>
+
+ * include/part.h (part_find_signal): New function declaration.
+ (part_set_signal, part_get_signal): Changed parameter signal name to signal pointer.
+ * src/part/part.c (part_find_signal): New function.
+ (part_set_signal, part_get_signal): Removed signal searching, used supplied pointer to signal.
+ * po/POTFILES.in: Added src/bus/ixp425.c, src/bus/pxa2x0.c, and src/bus/sa1110.c.
+ * src/bus/ixp425.c (bus_params_t, select_flash, unselect_flash, setup_address, set_data_in)
+ (setup_data, ixp425_bus_read_start, ixp425_bus_read_next, ixp425_bus_read_end, ixp425_bus_write)
+ (new_ixp425_bus): Optimized signal searching to increase bus access speed.
+ * src/bus/pxa2x0.c (bus_params_t, setup_address, set_data_in, setup_data, pxa250_bus_read_start)
+ (pxa250_bus_read_next, pxa250_bus_read_end, pxa250_bus_write, new_pxa250_bus): Ditto.
+ * src/bus/sa1110.c (bus_params_t, setup_address, set_data_in, setup_data, sa1110_bus_read_start)
+ (sa1110_bus_read_next, sa1110_bus_read_end, sa1110_bus_write, new_sa1110_bus): Ditto.
+ (sa1110_bus_width): Updated part_get_signal() function call. Added explicit signal search.
+ * src/cmd/get.c (cmd_get_run): Ditto.
+ * src/cmd/set.c (cmd_set_run): Updated part_set_signal() function call. Added explicit signal search.
+
+2003-05-20 Marcel Telka <marcel@telka.sk>
+
+ * configure.ac (AC_CONFIG_FILES): Added src/cmd/Makefile.
+ * include/Makefile.am (noinst_HEADERS): Added jtag.h.
+ * include/jtag.h: New file.
+ * po/POTFILES.in: Updated.
+ * src/Makefile.am (SUBDIRS): Added cmd.
+ (jtag_SOURCES): Removed jtag.h and help.c.
+ (jtag_DEPENDENCIES): Added cmd/libcmd.a.
+ (jtag_LDADD): Added libcmd.
+ (INCLUDES): Removed JTAG_DATA_DIR.
+ * src/help.c: File removed.
+ * src/jtag.h: Ditto.
+ * src/jtag.c (jtag_parse_line): Removed command parsing and moved it to cmd directory.
+ (jtag_parse_file): Function is no longer static.
+ * src/cmd/Makefile.am: New file.
+ * src/cmd/cable.c: Ditto.
+ * src/cmd/cmd.c: Ditto.
+ * src/cmd/cmd.h: Ditto.
+ * src/cmd/detect.c: Ditto.
+ * src/cmd/detectflash.c: Ditto.
+ * src/cmd/discovery.c: Ditto.
+ * src/cmd/dr.c: Ditto.
+ * src/cmd/flashmem.c: Ditto.
+ * src/cmd/frequency.c: Ditto.
+ * src/cmd/get.c: Ditto.
+ * src/cmd/help.c: Ditto.
+ * src/cmd/instruction.c: Ditto.
+ * src/cmd/print.c: Ditto.
+ * src/cmd/quit.c: Ditto.
+ * src/cmd/readmem.c: Ditto.
+ * src/cmd/script.c: Ditto.
+ * src/cmd/set.c: Ditto.
+ * src/cmd/shift.c: Ditto.
+
+ * src/part/part.c (parts_print): Fixed header printing.
+
+2003-05-20 Marcel Telka <marcel@telka.sk>
+
+ * src/part/data_register.c: Added l10n support. Marked messages for translation.
+ * src/part/instruction.c: Ditto.
+ * src/part/parse.c: Ditto.
+ * po/POTFILES.in: Added above files.
+
+2003-05-19 Marcel Telka <marcel@telka.sk>
+
+ * src/tap/parport/ppdev.c (ppdev_get_status): Inverted BUSY signal value.
+
+ * include/cfi.h (cfi_chip_t, cfi_array_t): New typedefs.
+ (cfi_array_free): New function prototype.
+ (detect_cfi): Changed function prototype.
+ * include/flash.h (set_flash_driver): Removed function prototype.
+ * src/flash/cfi.c (BW16): Macro removed.
+ (read2): Function removed.
+ (cfi_array_free): New function.
+ (detect_cfi): Added code to detect all CFI chips on the data bus.
+ * src/flash.c (flashcheck): Removed bus width checking. Updated due changes in src/flash/cfi.c.
+ (flashmsbin): Updated due changes in src/flash/cfi.c. Removed memory leak.
+ * src/readmem.c: Added l10n support. Marked messages for translation.
+ (detectflash): Updated due changes in src/flash/cfi.c. Removed memory leak.
+ Removed flash driver setup.
+ * po/POTFILES.in: Added src/readmem.c.
+
+2003-05-16 Marcel Telka <marcel@telka.sk>
+
+ * include/part.h (part_print): New function declaration.
+ * src/part/part.c: Marked all user visible messages for translation.
+ (part_print): New function.
+ (parts_print): Simplified. Added part_print() call.
+ * po/POTFILES.in: Added src/part/part.c.
+
+ * src/Makefile.am (jtag_DEPENDENCIES): Added flash/libflash.a.
+
+2003-05-15 Marcel Telka <marcel@telka.sk>
+
+ * include/cfi.h (detect_cfi): Added new parameter `adr'.
+ All relevant functions and callers updated.
+
+2003-05-15 Marcel Telka <marcel@telka.sk>
+
+ * configure.ac (CPPFLAGS): Added path to the openwince include arm directory.
+ * include/bus.h (bus_width): Added new `adr' parameter for this macro.
+ All relevant functions and callers updated.
+
+ * src/bus/pxa2x0.c (bus_params_t): Added last_adr and MC_registers structure members.
+ (LAST_ADR, MC_pointer): New macros.
+ (pxa250_bus_read_start, pxa250_bus_read_next, pxa250_bus_read_end, pxa250_bus_write): Disabled
+ external bus cycles for addresses above 0x04000000.
+ (pxa250_bus_width): Removed some output messages. Implemented BOOT_DEF emulation.
+ (new_pxa250_bus): Implemented BOOT_DEF emulation.
+
+2003-05-14 Marcel Telka <marcel@telka.sk>
+
+ * include/Makefile.am (noinst_HEADERS): Added cfi.h.
+ * include/cfi.h: New file.
+ * src/jtag.h (detect_cfi): Removed function declaration.
+ * src/flash.c: Replaced jtag.h include with cfi.h.
+ * src/readmem.c: Ditto.
+
+ * src/flash/Makefile.am (libflash_a_SOURCES): Added cfi.c.
+ * src/Makefie.am (jtag_SOURCES): Removed cfi.c.
+ * src/cfi.c: Moved this file ...
+ * src/flash/cfi.c: ... here and replaced jtag.h include with cfi.h one.
+
+2003-05-14 Marcel Telka <marcel@telka.sk>
+
+ * include/part.h (part_t, parts_t): Macros removed.
+ * src/detect.c: Replaced obsolete types `parts' with `parts_t' and `part' with `part_t'.
+ * src/part/parse.c: Ditto.
+ * src/part/part.c: Ditto.
+
+2003-05-14 Marcel Telka <marcel@telka.sk>
+
+ * configure.ac (AC_CONFIG_FILES): Added src/flash/Makefile.
+ * include/Makefile.am (noinst_HEADERS): Added flash.h.
+ * src/Makefile.am (SUBDIRS): Added flash.
+ (jtag_SOURCES): Removed flash.h, flash-intel.c, and flash-amd.c.
+ (jtag_LDADD): Added libflash.
+ * src/flash-amd.c: Moved this file ...
+ * src/flash/amd.c: ... here.
+ * src/flash-intel.c: Moved this file ...
+ * src/flash/intel.c: ... here.
+ * src/flash.h: Moved this file ...
+ * include/flash.h: ...here.
+ * src/flash/Makefile.am: New file.
+
+2003-05-13 Marcel Telka <marcel@telka.sk>
+
+ * src/jtag.c (jtag_parse_file): Added support for command scripts from stdin.
+
+2003-04-29 Marcel Telka <marcel@telka.sk>
+
+ * data/MANUFACTURERS: Added new manufacturer: DEC.
+
+ * src/jtag.c (jtag_create_jtagdir): Changed permissions for jtag directory.
+
+ * include/part.h (part_alloc, read_part): Changed return type from `part *' to `part_t *'.
+ (struct parts): Changed parts member type from `part **' to `part_t **'.
+ (parts_alloc): Changed return type from `parts *' to `parts_t *'.
+ * src/bus/ixp425.c (select_flash, unselect_flash, setup_address, set_data_in, setup_data):
+ Changed first parameter type from `part *' to `part_t *'.
+ * src/bus/pxa250.c (setup_address, set_data_in, setup_data): Ditto.
+ * src/bus/sa1110.c (setup_address, set_data_in, setup_data): Ditto.
+
+ * include/bus.h: Replaced static bus_driver_t architecture with dynamic bus_t.
+ Removed direct chain_t dependency. Added `params' and `prepare' members.
+ All related functions' parameter types changed.
+ * src/bus/ixp425.c (bus_params_t): New structure typedef.
+ (CHAIN, PART): New macros.
+ (ixp425_bus_prepare, ixp425_bus_free, new_ixp425_bus): New functions.
+ (ixp425_bus_driver, ixp425_bus): Renamed `ixp425_bus_driver' to `ixp425_bus' and updated
+ for new bus driver architecture.
+ * src/bus/pxa250.c (bus_params_t): New structure typedef.
+ (CHAIN, PART): New macros.
+ (pxa250_bus_prepare, pxa250_bus_free, new_pxa250_bus): New functions.
+ (pxa250_bus_driver, pxa250_bus): Renamed `pxa250_bus_driver' to `pxa250_bus' and updated
+ for new bus driver architecture.
+ * src/bus/sa1110.c (bus_params_t): New structure typedef.
+ (CHAIN, PART): New macros.
+ (sa1110_bus_prepare, sa1110_bus_free, new_sa1110_bus): New functions.
+ (sa1110_bus_driver, sa1110_bus): Renamed `sa1110_bus_driver' to `sa1110_bus' and updated
+ for new bus driver architecture.
+ * src/readmem.c (detectflash, readmem): Moved JTAG chain initialization to bus->prepare().
+ * src/flash.c (flashcheck): Ditto.
+ (flashmsbin, flashmem): Removed BYPASS instruction setup.
+ * src/jtag.c (bus_driver, bus): Replaced `bus_driver' with `bus' global variable.
+ (jtag_parse_line, main): Added `bus' deallocation.
+ * src/flash.h (flash_driver_t): Changed parameter type for all function members from
+ `chain_t*' to `bus_t *'.
+ All function callers changed.
+
+2003-04-04 Marcel Telka <marcel@telka.sk>
+
+ Version 0.3.2 released.
+
+2003-04-04 Marcel Telka <marcel@telka.sk>
+
+ * data/xilinx/PARTS: Added XCR3256XL-FT256 (Jachym Holecek).
+ * data/xilinx/xcr3256xl-ft256/STEPPINGS: New file (Jachym Holecek).
+ * data/xilinx/xcr3256xl-ft256/xcr3256xl-ft256: Ditto.
+ * data/Makefile.am (nobase_dist_pkgdata_DATA): Added new files.
+
+2003-04-02 Marcel Telka <marcel@telka.sk>
+
+ * configure.ac (AC_INIT): Changed version number to 0.3.2.
+
+2003-04-02 Marcel Telka <marcel@telka.sk>
+
+ * include/signal.h: Changed signal typedef to signal_t (thanks to Jachym Holecek).
+ All `signal' instances renamed to `signal_t'.
+ * src/tap/parport.c: Ported to NetBSD/i386 (Jachym Holecek).
+ * src/tap/parport/direct.c (parport_drivers): Conditionally removed direct_parport_driver.
+ * configure.ac: Added test for i386_set_ioperm() function. Defined HAVE_IOPERM
+ and HAVE_I386_SET_IOPERM.
+
+2003-04-01 Marcel Telka <marcel@telka.sk>
+
+ * src/tap/cable/keithkoep.c: New file.
+ * src/tap/Makefile.am (libtap_a_SOURCES): Added cable/keithkoep.c.
+ * src/tap/cable.c (cable_drivers): Added keithkoep_cable_driver.
+
+2003-03-19 Marcel Telka <marcel@telka.sk>
+
+ Version 0.3.1 released.
+
+2003-03-19 Marcel Telka <marcel@telka.sk>
+
+ * configure.ac (AC_CONFIG_FILES): Added doc/Makefile.
+ * Makefile.am (SUBDIRS): Added doc.
+
+2003-03-18 Marcel Telka <marcel@telka.sk>
+
+ * src/tap/parport/direct.c (direct_connect): Fixed cable disconnecting loop.
+
+2003-03-18 Marcel Telka <marcel@telka.sk>
+
+ * src/jtag.c (jtag_parse_line) <script>: Added support for `quit' command in scripts.
+ (jtag_parse_rc): Ditto.
+ (jtag_parse_file): Added support for comments and `quit' command in scripts.
+ (main): Added command line parameter list execution as scripts.
+ * data/intel/pxa250/STEPPING: Added support for Intel PXA255 A0 (thanks to Mike Sprauve).
+ * configure.ac (AC_INIT): Changed version number to 0.3.1.
+
+2003-03-18 Marcel Telka <marcel@telka.sk>
+
+ * po/POTFILES.in: Added src/tap/parport/direct.c and src/tap/parport/ppdev.c.
+ * src/help.c (help) <cable>: Added help for `cable ppdev' command.
+ * src/tap/parport/ppdev.c (ppdev_open): Removed debug messages.
+ * src/jtag.c (jtag_parse_line) <cable>: Added chain_disconnect() call before
+ new cable connection.
+
+2003-03-18 Marcel Telka <marcel@telka.sk>
+
+ * configure.ac (AC_CHECK_HEADERS): Added test for linux/ppdev.h.
+ * src/tap/Makefile.am (libtap_a_SOURCES): Added parport/ppdev.c.
+ * src/tap/parport.c (parport_drivers): Added ppdev parport driver.
+ * src/tap/parport/ppdev.c: New file.
+
+2003-03-18 Marcel Telka <marcel@telka.sk>
+
+ * src/bsdl2jtag.c (endline): Removed compile warning.
+
+2003-03-18 Marcel Telka <marcel@telka.sk>
+
+ * include/parport.h: New file. Added parport driver support.
+ All cable drivers modified.
+ * src/tap/parport.c: Ditto.
+ * src/tap/parport/direct.c: Ditto.
+ * src/jtag.c (jtag_parse_line) <cable>: Added parport driver support.
+ * include/Makefile.am (noinst_HEADERS): Added parport.h.
+ * src/tap/cable/generic.c: New file withgGeneric functions for cable drivers.
+ All cable drivers modified.
+ * src/tap/cable/generic.h: Ditto.
+ * src/tap/Makefile.am (libtap_a_SOURCES): Added parport.c, parport/direct.c, cable/generic.h,
+ and cable/generic.c.
+
+ * include/cable.h: Added dynamic cable objects. Added cable interpose functions.
+ All callers changed.
+ * src/tap/cable.c: Ditto.
+
+ * include/chain.h (chain_connect): Function removed.
+ (chain_disconnect): New function.
+ * src/tap/chain.c (chain_free): Modified for chain_disconnect() call.
+ (chain_connect): Removed.
+ (chain_disconnect): New function.
+
+2003-03-17 Marcel Telka <marcel@telka.sk>
+
+ * src/Makefile.am (bin_PROGRAMS, bsdl2jtag_SOURCES): Added new bsdl2jtag conversion
+ tool (Matan Ziv-Av).
+ * src/bsdl2jtag.c: New file (Matan Ziv-Av).
+
+2003-03-14 Marcel Telka <marcel@telka.sk>
+
+ * configure.ac (CPPFLAGS): Added common include paths.
+ * src/Makefile.am (INCLUDES): Removed common include paths.
+ * src/bus/Makefile.am (INCLUDES): Ditto.
+ * src/part/Makefile.am (INCLUDES): Ditto.
+ * src/tap/Makefile.am (INCLUDES): Ditto.
+
+2003-03-13 Marcel Telka <marcel@telka.sk>
+
+ * configure.ac (AC_CONFIG_HEADERS): Replaced this `new' macro ...
+ (AM_CONFIG_HEADER): ... with this `old' one to make build compatible with automake-1.6.
+ (AM_GNU_GETTEXT_VERSION): Relaxed version number from 0.11.5 to 0.11.4.
+ * src/Makefile.am (jtag_LDADD): Added LIBINTL.
+ (LIBS): Removed LIBINTL.
+ (DEFS): Removed whole content ...
+ (INCLUDE): ... and added it here.
+
+2003-03-13 Marcel Telka <marcel@telka.sk>
+
+ * include/chain.h: New file.
+ * src/tap/chain.c: Ditto.
+ * src/tap/Makefile.am (libtap_a_SOURCES): Added chain.c.
+ * include/Makefile.am (noinst_HEADERS): Added chain.h.
+ * src/jtag.c: Encapsulated parts, cable and TAP state into one object - chain.
+ All relevant function parameters changed to `chain'.
+ * src/tap/state.c: `trst' state moved to cable drivers.
+ All cable drivers changed.
+ * include/cable.h (cable_driver_t) <set_trst>: Changed return value from void to int.
+ All cable drivers changed.
+ (cable_driver_t) <get_trst>: New function.
+ Implemented this function to all cable drivers.
+ * include/part.h (part_shift_instruction, part_shift_data_register)
+ (parts_shift_instructions, parts_shift_data_registers): Funcions removed.
+ * src/part/part.c (part_shift_instruction, part_shift_data_register)
+ (parts_shift_instructions, parts_shift_data_registers): Ditto.
+ * src/tap/cable/arcom.c: Removed dependency on state.h.
+ * src/tap/cable/byteblaster.c: Ditto.
+ * src/tap/cable/dlc5.c: Ditto.
+ * src/tap/cable/ea253.c: Ditto.
+ * src/tap/cable/ei012.c: Ditto.
+ * src/tap/cable/mpcbdm.c: Ditto.
+ * src/tap/cable/wiggler.c: Ditto.
+
+ * include/state.h (bit): Replaced with common.h include.
+ (Unknown_State, Run_Test_Idle, Select_DR_Scan, Select_IR_Scan): Removed parentheses.
+ * include/tap.h (write_command): Removed unused declaration.
+
+ * src/detect.h: Removed file.
+ * src/jtag.h: New file with common jtag function declarations.
+ * src/Makefile.am (jtag_SOURCES): Removed detect.h, added jtag.h.
+ * src/cfi.c: Added jtag.h include. Moved common function declarations to jtag.h file.
+ * src/detect.c: Ditto.
+ * src/discovery.c: Ditto.
+ * src/flash.c: Ditto.
+ * src/help.c: Ditto.
+ * src/jtag.c: Ditto.
+ * src/readmem.c: Ditto.
+
+ * src/jtag.c (jtag_create_jtagdir, jtag_load_history, jtag_save_history, jtag_parse_line)
+ (jtag_readline_loop, jtag_parse_file, jtag_parse_rc): Changed functions to `static'.
+
+ * src/tap/tap.c: Added l10n support.
+ * po/POTFILES.in: Added src/tap/chain.c and src/tap/tap.c.
+
+2003-03-13 Marcel Telka <marcel@telka.sk>
+
+ * include/part.h: Renamed types part to part_t, parts to parts_t,
+ tap_register to tap_register_t.
+ * include/register.h: Renamed tap_register type to tap_register_t.
+
+2003-03-11 Marcel Telka <marcel@telka.sk>
+
+ * configure.ac: Improved openwince include package detection.
+
+2003-03-07 Marcel Telka <marcel@telka.sk>
+
+ * src/lib/getdelim.c: Added unistd.h include for ssize_t.
+ * src/lib/getline.c: Ditto.
+
+2003-03-06 Marcel Telka <marcel@telka.sk>
+
+ * configure.ac: Added test for readline library.
+ * src/Makefile.am (jtag_LDADD): Removed readline and ncurses.
+
+2003-03-06 Marcel Telka <marcel@telka.sk>
+
+ * autogen.sh: Added test for autoreconf fail.
+
+2003-02-25 Marcel Telka <marcel@telka.sk>
+
+ Version 0.3 released.
+
+2003-02-25 Marcel Telka <marcel@telka.sk>
+
+ * src/tap/cable.c: Added config.h include.
+
+2003-02-25 Marcel Telka <marcel@telka.sk>
+
+ * data/MANUFACTURERS: Added Hitachi (Matan Ziv-Av).
+ * data/Makefile.am (nobase_dist_pkgdata_DATA): Added Hitachi SH7727
+ files (Matan Ziv-Av).
+ * data/hitachi/PARTS: New file (Matan Ziv-Av).
+ * data/hitachi/sh7727/STEPPINGS: Ditto.
+ * data/hitachi/sh7727/sh7727: Ditto.
+
+2003-02-25 Marcel Telka <marcel@telka.sk>
+
+ * data/MANUFACTURERS: Added Broadcom (Matan Ziv-Av).
+ * data/Makefile.am (nobase_dist_pkgdata_DATA): Added Broadcom BCM1250
+ files (Matan Ziv-Av).
+ * data/broadcom/PARTS: New file (Matan Ziv-Av).
+ * data/broadcom/bcm1250/STEPPINGS: Ditto.
+ * data/broadcom/bcm1250/bcm1250: Ditto.
+
+2003-02-21 Marcel Telka <marcel@telka.sk>
+
+ * src/help.c (help): Marked translatable strings.
+ * src/jtag.c (jtag_parse_line): Ditto.
+ (jtag_parse_file): Ditto.
+ (main): Ditto.
+ * po/POTFILES.in: Added src/help.c and src/jtag.c.
+
+2003-02-21 Marcel Telka <marcel@telka.sk>
+
+ * src/jtag.c (main): Added conditional compilation for l10n.
+
+2003-02-20 Marcel Telka <marcel@telka.sk>
+
+ * src/Makefile.am (jtag_SOURCES): Added missing flash.h.
+ * src/jtag.c: Added missing string.h include. Moved gettext.h include
+ to the top level of the include list.
+ * src/help.c: Moved gettext.h include to the top level of the include list.
+
+2003-02-20 Marcel Telka <marcel@telka.sk>
+
+ * Makefile.am (SUBDIRS): Removed intl.
+ * autogen.sh: Replaced subsequent call of auto* tools with autoreconf one.
+ * configure.ac (AC_CONFIG_FILES): Removed intl/Makefile.
+ (AM_GNU_GETTTEXT): Added 'external' parameter.
+
+2003-02-19 Marcel Telka <marcel@telka.sk>
+
+ * configure.ac (AC_CONFIG_HEADERS): Added new macro with config.h.
+ * autogen.sh: Added autoheader invocation.
+
+2003-02-18 Marcel Telka <marcel@telka.sk>
+
+ * include/Makefile.am (noinst_HEADERS): Added gettext.h.
+
+2003-02-18 Marcel Telka <marcel@telka.sk>
+
+ * autogen.sh: Added autopoint call. Added '-I m4' parameter for aclocal.
+ * Makefile.am (SUBDIRS): Added intl, include and po.
+ (DIST_SUBDIRS): Removed.
+ (ACLOCAL_AMFLAGS): Added '-I m4'.
+ * configure.ac (AC_INIT): Changed version number to 0.3.
+ (AC_CONFIG_FILES): Added intl/Makefile and po/Makefile.in.
+ (AM_GNU_GETTEXT): Added.
+ (AM_GNU_GETTEXT_VERSION): Added with version 0.11.5.
+ * include/gettext.h: Copied new file from gettext share.
+ * po/LINGUAS: Added new empty file.
+ * po/Makevars: Added new file.
+ * po/POTFILES.in: Added new empty file.
+ * src/Makefile.am (INCLUDES): Removed JTAG_DATA_DIR.
+ (localedir): Added path to locale directory.
+ (DEFS): Added JTAG_DATA_DIR and LOCALEDIR.
+ (LIBS): Added LIBINTL.
+ * src/help.c: Included gettext.h.
+ * src/jtag.c: Included gettext.h.
+ (main): Added l10n support.
+
+2003-02-18 Marcel Telka <marcel@telka.sk>
+
+ * src/flash.c (flashmsbin): Changed flash error message.
+ (flashmem): Changed output messages. Enabled verify for 2 x 16, not
+ for 1 x 16. Added better end of file test for verify.
+
+2003-02-18 Marcel Telka <marcel@telka.sk>
+
+ * configure.ac (AC_CONFIG_FILES): Added src/bus/Makefile.
+ * src/bus.h: Moved this file...
+ * include/bus.h: ...here.
+ * include/Makefile.am (noinst_HEADERS): Added bus.h.
+ * src/ixp425.c: Moved this file...
+ * src/bus/ixp425.c: ...here.
+ * src/pxa250.c: Moved this file...
+ * src/bus/pxa2x0.c: ...here.
+ * src/sa1110.c: Moved this file...
+ * src/bus/sa1110.c: ...here.
+ * src/bus/Makefile.am: New file.
+ * src/Makefile.am (SUBDIRS): Added bus.
+ (jtag_SOURCES): Removed bus.h, ixp425.c, pxa250.c, sa1110.c.
+ (jtag_DEPENDENCIES): Added libbus.a.
+ (jtag_LDADD): Ditto.
+
+2003-02-18 Marcel Telka <marcel@telka.sk>
+
+ * src/tap/cable.c: Added <sys/types.h> include for useconds_t on some systems.
+ * src/flash-amd.c (amdstatus29): Disabled unused function.
+ (amdisprotected): Ditto.
+
+2003-02-17 Marcel Telka <marcel@telka.sk>
+
+ * src/jtag.c (jtag_parse_line): Fixed segfault for 'set' command.
+
+2003-02-17 Marcel Telka <marcel@telka.sk>
+
+ * src/jtag.c (jtag_parse_line): Added new 'get signal' command.
+ * src/help.c (help): Added help for new 'get signal' command.
+
+2003-02-17 Marcel Telka <marcel@telka.sk>
+
+ * data/intel/pxa250/pxa250: Changed comment.
+ * data/intel/pxa250/pxa250c0: Ditto.
+
+2003-02-17 Marcel Telka <marcel@telka.sk>
+
+ * src/help.c (help): Added help for new command 'script'.
+
+2003-02-17 Marcel Telka <marcel@telka.sk>
+
+ * src/flash-intel.c (intel_flash_autodetect): Fixed Intel flash algorithm Id.
+ (intel_flash_autodetect32): Ditto.
+
+2003-02-17 Marcel Telka <marcel@telka.sk>
+
+ * configure.ac (AC_CHECK_FUNCS): Added getdelim and getline.
+ (AC_CONFIG_FILES): Added src/lib/Makefile.
+ * src/Makefile.am (SUBDIRS): Added lib.
+ (jtag_DEPENDENCIES): Added libjtaglib.a.
+ (jtag_LDADD): Ditto.
+ * src/jtag.c: Added portable getline() declaration.
+ * src/lib/Makefile.am: New file.
+ * src/lib/getdelim.c: Ditto.
+ * src/lib/getline.c: Ditto.
+
+2003-02-16 Marcel Telka <marcel@telka.sk>
+
+ * src/jtag.c (jtag_creae_jtagdir): New function (Alessandro Zummo).
+ (jtag_load_history): Ditto.
+ (jtag_save_history): Ditto.
+ (jtag_readline_loop): Ditto.
+ (jtag_parse_file): Ditto.
+ (jtag_parse_rc): Ditto.
+ (jtag_parse_line): New funcion, content extracted from main function, added new
+ 'script' command (Alessandro Zummo).
+ (main): Moved parsing capability to jtag_parse_line function (Alessandro Zummo).
+
+2003-02-16 Marcel Telka <marcel@telka.sk>
+
+ * src/flash.c (flash_drivers): Added missing 1 x 16 Intel flash driver.
+
+2003-02-16 Marcel Telka <marcel@telka.sk>
+
+ * src/jtag.c (main): Corrected error message for 'instruction' command and added
+ a notice when an instruction is unknown (Alessandro Zummo).
+
+2003-02-16 Marcel Telka <marcel@telka.sk>
+
+ * src/jtag.c (main): Fixed segfault in 'detectflash'. Thanks to August Hörandl
+ for reporting this issue.
+
+2003-02-16 Marcel Telka <marcel@telka.sk>
+
+ * src/Makefile.am (jtag_SOURCES): Added new flash files with flash driver
+ framework (August Hörandl).
+ * src/flash-amd.c: New file with AMD flash support (August Hörandl).
+ * src/flash-intel.c: New file. Extracted Intel flash support from src/flash.c
+ file (August Hörandl, me).
+ * src/flash.c (set_flash_driver): New function. Added support for flash
+ drivers (August Hörandl).
+ (flashceck): Ditto.
+ (flashmsbin): Added support for flash driver (August Hörandl).
+ (flashmem): Ditto.
+ (flash_erase_block): Function moved to src/flash-intel.c (August Hörandl).
+ (flash_unlock_block): Ditto.
+ (flash_program): Ditto.
+ (flash_erase_block32): Ditto.
+ (flash_unlock_block32): Ditto.
+ (flash_program32): Ditto.
+ * src/flash.h: New file. Interface for flash drivers (August Hörandl).
+ * src/help.c (help): Added list of supported flash drivers for 'flashmem'
+ command (August Hörandl).
+ * src/readmem.c (detectflash): Removed Intel specific code. Enhanced output
+ messages (August Hörandl).
+
+2003-02-14 Marcel Telka <marcel@telka.sk>
+
+ * src/jtag.c (jtag): Added command history load/save support (August Hörandl).
+
+2003-02-14 Marcel Telka <marcel@telka.sk>
+
+ * src/readmem.c (readmem): Added support for 1 x 16 bit memory configuration and
+ buffered file writes (Christian Pellegrin).
+ * src/flash.c (flashmem): Added support for 1 x 16 bit flash configuration and
+ buffered file reads (Christian Pellegrin).
+ (flash_erase_block): Added debug messages (Christian Pellegrin).
+ (flash_unlock_block): Added debug message (Christian Pellegrin).
+ (flash_program): Ditto.
+
+2003-02-14 Marcel Telka <marcel@telka.sk>
+
+ * src/cfi.c (detect_cfi): Added support for 1 x 16 bit flash configuration (Christian
+ Pellegrin).
+ * src/detect.c (find_record): Added error message if file cannot be opened (Christian
+ Pellegrin).
+
+2003-02-14 Marcel Telka <marcel@telka.sk>
+
+ * data/xilinx/xc2c256-tq144/xc2c256-tq144: Added JTAG declarations for Xilinx
+ XC2C256-TQ144 (Alessandro Zummo).
+ * data/xilinx/xc2c256-tq144/STEPPINGS: Ditto.
+ * data/xilinx/PARTS: Ditto.
+ * data/Makefile.am: Ditto.
+
+2003-02-14 Marcel Telka <marcel@telka.sk>
+
+ * src/ixp425.c (setup_address): Removed set_gpio() call.
+ (set_gpio): Removed unused function.
+
+2003-02-13 Marcel Telka <marcel@telka.sk>
+
+ * src/ixp425.c: Added bus driver for Intel IXP425 (Christian Pellegrin).
+ * src/bus.h: Ditto.
+ * src/jtag.c (main): Ditto.
+ * src/Makefile.am (jtag_SOURCES): Added ixp425.c (Christian Pellegrin).
+
+2003-02-13 Marcel Telka <marcel@telka.sk>
+
+ * data/intel/ixp425/ixp425: Added JTAG declarations for Intel IXP425 (Christian
+ Pellegrin).
+ * data/intel/ixp425/STEPPINGS: Ditto.
+ * data/intel/PARTS: Ditto.
+ * data/Makefile.am: Ditto.
+
+2003-02-13 Marcel Telka <marcel@telka.sk>
+
+ * include/bsbit.h (BSBIT_BIDIR): Added new macro (Christian Pellegrin).
+ * src/part/bsbit.c (bsbit_alloc): Added support for bidirectional pins (Christian
+ Pellegrin).
+ * src/part/parse.ci (read_part): Ditto.
+
+2003-02-10 Marcel Telka <marcel@telka.sk>
+
+ * src/sa1110.c (sa1110_bus_read_start): Added support for all six static memory banks.
+ The function is now 'static'.
+ (sa1110_bus_read_end): Ditto.
+ (sa1110_bus_read_next): The function is now 'static'.
+ (sa1110_bus_read): Ditto.
+ (sa1110_bus_width): Ditto.
+ (sa1110_bus_write): Added support for all six static memory banks (bug 682660).
+ The function is now 'static'.
+
+2003-02-07 Marcel Telka <marcel@telka.sk>
+
+ * src/tap/cable/arcom.c: Added support for Arcom JTAG Cable (patch 682310,
+ Ian Campbell).
+ * src/tap/cable.c: Ditto.
+ * src/tap/Makefile.am: Ditto.
+
+2003-02-07 Marcel Telka <marcel@telka.sk>
+
+ * src/tap/cable/mpcbdm.c (mpcbdm_clock): Fixed port address for TRST & TRST1.
+
+2003-02-07 Marcel Telka <marcel@telka.sk>
+
+ * src/tap/cable/mpcbdm.c: Added support for Mpcbdm JTAG Cable (Christian Pellegrin).
+ * src/tap/cable.c: Ditto.
+ * src/tap/Makefile.am: Ditto.
+
+2003-02-04 Marcel Telka <marcel@telka.sk>
+
+ * src/help.c (help): Added missing short help description for 'set' command.
+ * src/jtag.c (main): Added test for uninitialized ps for 'set' command.
+ * src/tap/tap.c (tap_shift_register): Changed final state to Run-Test/Idle
+ for immediately propagation of the new BSR values.
+
+2003-02-04 Marcel Telka <marcel@telka.sk>
+
+ * src/jtag.c (main): Added more checks for syntax errors. Added support for
+ printing input data registers - command 'dr'. Added 'set signal'
+ command.
+ * src/help.c (help): Updated help for 'dr' command, added help for 'set
+ signal.
+
+2003-02-04 Marcel Telka <marcel@telka.sk>
+
+ Version 0.2.2 released.
+
+2003-02-04 Marcel Telka <marcel@telka.sk>
+
+ * configure.ac: Changed version number to 0.2.2.
+
+2003-02-04 Marcel Telka <marcel@telka.sk>
+
+ * src/flash.c (flashmsbin): Changed instructions to BYPASS after successfull
+ flash.
+ (flashmem): Ditto.
+
+2003-01-30 Marcel Telka <marcel@telka.sk>
+
+ * src/tap/cable/byteblaster.c (byteblaster_init): Added support for
+ parallel ports with I/O addresses above 0x3FF.
+ (byteblaster_done): Ditto.
+ * src/tap/cable/dlc5.c (dlc5_init): Ditto.
+ (dlc5_done): Ditto.
+ * src/tap/cable/ea253.c (ea253_init): Ditto.
+ (ea253_done): Ditto.
+ * src/tap/cable/ei012.c (ei012_init): Ditto.
+ (ei012_done): Ditto.
+ * src/tap/cable/wiggler.c (wiggler_init): Ditto.
+ (wiggler_done): Ditto.
+
+2003-01-19 Marcel Telka <marcel@telka.sk>
+
+ * configure.ac: Added AC_GNU_SOURCE.
+
+2003-01-18 Marcel Telka <marcel@telka.sk>
+
+ * src/jtag.c (main): Added new 'frequency' command.
+ * src/help.c (help): Added help for 'frequency' command.
+ * include/cable.h (cable_wait): Added new function prototype.
+ * src/tap/cable.c (cable_wait): Added new function.
+ * src/tap/cable/byteblaster.c (byteblaster_clock): Added support for TCK
+ frequency limit.
+ (byteblaster_get_tdo): Ditto.
+ * src/tap/cable/dlc5.c (dlc5_clock): Ditto.
+ (dlc5_get_tdo): Ditto.
+ * src/tap/cable/ea253.c (ea253_clock): Ditto.
+ (ea253_get_tdo): Ditto.
+ * src/tap/cable/ei012.c (ei012_clock): Ditto.
+ (ei012_get_tdo): Ditto.
+ * src/tap/cable/wiggler.c (wiggler_clock): Ditto.
+ (wiggler_get_tdo): Ditto.
+
+2003-01-16 Marcel Telka <marcel@telka.sk>
+
+ * data/MANUFACTURERS: Added Cypress (patch 669157). Thanks to Chris Ellec.
+
+2003-01-13 Marcel Telka <marcel@telka.sk>
+
+ Version 0.2.1 released.
+
+2003-01-13 Marcel Telka <marcel@telka.sk>
+
+ * include/state.h: Added new function tap_state_reset().
+ * src/tap/state.c (tap_state_reset): Ditto.
+ * src/tap/tap.c (tap_reset): Added explicit TAP state reset.
+
+2003-01-13 Marcel Telka <marcel@telka.sk>
+
+ * configure.ac: Changed version number to 0.2.1.
+
+2003-01-11 Marcel Telka <marcel@telka.sk>
+
+ * src/tap/cable/bytebaster.c: Added support for Altera ByteBlaster family cables.
+ * src/tap/cable.c: Ditto.
+ * src/tap/Makefile.am: Ditto.
+ * src/help.c (help): Increased space for cable short name.
+
+2003-01-11 Marcel Telka <marcel@telka.sk>
+
+ * src/tap/cable/wiggler.c: Added support for Macraigor Wiggler JTAG Cable (Stas Khirman).
+ * src/tap/cable.c: Ditto.
+ * src/tap/Makefile.am: Ditto.
+
+2003-01-10 Marcel Telka <marcel@telka.sk>
+
+ * src/tap/cable.c: Added missing stdlib.h include (bug 665923). Thanks to Chris Ellec.
+
+2003-01-09 Marcel Telka <marcel@telka.sk>
+
+ * src/jtag.c (main): Fixed minor typo in 'cable' output message.
+
+2003-01-09 Marcel Telka <marcel@telka.sk>
+
+ * src/discovery.c (detect_register_size): Changed register length test iteration.
+ Now the test iterates to MAX_REGISTER_LENGTH, not to MAX_REGISTER_LENGTH - 1.
+
+2003-01-08 Marcel Telka <marcel@telka.sk>
+
+ Version 0.2 released.
+
+2003-01-08 Marcel Telka <marcel@telka.sk>
+
+ * include/cable.h: Unified and simplified cable driver handling, added driver name
+ and driver description into driver interface structure.
+ * src/help.c (help): Ditto.
+ * src/jtag.c (main): Ditto.
+ * src/tap/Makefile.am: Ditto.
+ * src/tap/cable.c: Ditto.
+ * src/tap/cable/dlc5.c: Ditto.
+ * src/tap/cable/ea253.c: Ditto.
+ * src/tap/cable/ei012.c: Ditto.
+
+2003-01-08 Marcel Telka <marcel@telka.sk>
+
+ * include/cable.h: Added cable driver for ETC EI012 JTAG Cable.
+ * src/help.c (help): Ditto.
+ * src/jtag.c (main): Ditto.
+ * src/tap/Makefile.am: Ditto.
+ * src/tap/cable/ei012.c: Ditto.
+
+2003-01-08 Marcel Telka <marcel@telka.sk>
+
+ * configure.ac: Bumped version number to 0.2, added check-new and dist-bzip2
+ parameters to AM_INIT_AUTOMAKE() invocation.
+ * src/jtag.c: Updated year in initial banner.
+
+2003-01-08 Marcel Telka <marcel@telka.sk>
+
+ * include/cable.h: Added cable driver for Xilinx DLC5 JTAG Parallel Cable III.
+ * src/help.c (help): Ditto.
+ * src/jtag.c (main): Ditto.
+ * src/tap/Makefile.am: Ditto.
+ * src/tap/cable/dlc5.c: Ditto.
+
+2003-01-08 Marcel Telka <marcel@telka.sk>
+
+ * include/Makefile.am: Removed ctrl.h, added cable.h.
+ * include/ctrl.h: Removed obsolete file.
+ * include/cable.h: Added common declarations for JTAG cable drivers.
+ * src/detect.c: Replaced ctrl.h include with cable.h (JTAG cable driver support).
+ * src/discovery.c: Ditto.
+ * src/tap/tap.c: Ditto.
+ * src/help.c (help): Added help for new command 'cable'.
+ * src/jtag.c (main): Added support for JTAG cable drivers, added new command 'cable'.
+ * src/tap/Makefile.am: Removed ctrl.c, added cable/ea253.c, updated includes.
+ * src/tap/ctrl.c: Removed obsolete file.
+ * src/tap/state.c: Changed default TRST state to 1.
+ * src/tap/cable/ea253.c: Added driver for EA253 JTAG cable.
+
+2003-01-06 Marcel Telka <marcel@telka.sk>
+
+ * src/discovery.c (discovery): Fixed memory leaks, added out of memory test,
+ added test for invalid IR length.
+
+2003-01-05 Marcel Telka <marcel@telka.sk>
+
+ * include/register.h (register_inc, register_dec, register_shift_right,
+ register_shift_left): Added new functions.
+ * src/tap/register.c (register_inc, register_dec, register_shift_right,
+ register_shift_left): Ditto.
+ * src/Makefile.am: Added discovery.c file.
+ * src/discovery.c: Added new file with discovery() implementation.
+ * src/help.c (help): Added help for 'discovery' command.
+ * src/jtag.c (main): Added 'discovery' command.
+ * src/tap/tap.c (write_command): Removed unused function.
+
+2002-12-16 Marcel Telka <marcel@telka.sk>
+
+ * data/Makefile.am: Renamed intel/pxa250/pxa260 to intel/pxa250/pxa250c0.
+
+2002-12-11 Marcel Telka <marcel@telka.sk>
+
+ * data/intel/pxa250/STEPPINGS: Renamed file pxa260 to pxa250c0.
+ * data/intel/pxa260: Ditto.
+ * data/intel/pxa250c0: Ditto.
+
+2002-11-29 Marcel Telka <marcel@telka.sk>
+
+ * src/flash.c (flashmsbin, flashmem): Fixed crash if flash memory is not detected.
+ * src/readmem.c (detectflash): Ditto.
+
+2002-11-27 Marcel Telka <marcel@telka.sk>
+
+ * data/xilinx/xcr3128xl-cs144/xcr3128xl-cs144: Added pins and BSR bits.
+
+2002-11-26 Marcel Telka <marcel@telka.sk>
+
+ * data/xilinx/xcr3128xl-cs144/xcr3128xl-cs144: Added user-defined
+ instructions.
+
+2002-11-25 Marcel Telka <marcel@telka.sk>
+
+ Version 0.1 released.
+
+
+$Revision$
--- /dev/null
+UrJTAG Maintainers List
+=======================
+
+$Id$
+
+Note: This list is meant to remain in alphabetical order.
+
+P: Person
+M: Their e-mail address
+W: Related website other than urjtag.org
+F: Files (in shell glob format)
+S: Status, one of the following:
+
+ Supported: Someone is actually paid to look after this.
+ Maintained: Someone actually looks after it.
+ Odd Fixes: It has a maintainer but they don't have time to do
+ much other than throw the odd patch in.
+ Tested: The person is able to test changes with his/her setup.
+ Orphan: No current maintainer [but maybe you could take the
+ role as you write your new code].
+ Obsolete: Old code. Something tagged obsolete generally means
+ it has been replaced by a better system and you
+ should be using that.
+
+
+ALTERA UP3 EDUCATION KIT BUS DRIVER
+F: src/bus/slsup3.c
+S: Orphan
+
+ANALOG DEVICES ADSP-BF537 STAMP/EZ-KIT LITE BUS DRIVER
+F: src/bus/bf537_stamp.c
+S: Orphan
+
+ANALOG DEVICES ADSP-BF548 EZ-KIT LITE BUS DRIVER
+F: src/bus/bf548_ezkit.c
+S: Orphan
+
+ANALOG DEVICES ADSP-BF561 EZ-KIT LITE BUS DRIVER
+F: src/bus/bf561_ezkit.c
+S: Orphan
+
+ANALOG DEVICES SHARC 21065L COMPATIBLE BUS DRIVER
+F: src/bus/sharc21065l.c
+S: Orphan
+
+ARCOM CABLE DRIVER
+F: src/tap/cable/arcom.c
+S: Orphan
+
+AU1500 BUS DRIVER
+F: src/bus/au1500.c
+S: Orphan
+
+AVR32 MULTI-MODE BUS DRIVER
+F: src/bus/avr32.c
+S: Orphan
+
+BLACKFIN BF533 BOARD BUS DRIVERS
+F: src/bus/bf533_*.c
+S: Orphan
+
+BROADCOM BCM1250 BUS DRIVER
+F: src/bus/bcm1250.c
+S: Orphan
+
+BYTEBLASTER CABLE DRIVER
+P: Arnim Läuger
+M: arniml at users.sourceforge.net
+F: src/tap/cable/byteblaster.c
+S: Tested
+
+BSDL PARSER
+P: Arnim Läuger
+M: arniml at users.sourceforge.net
+F: src/bsdl/*
+S: Maintained
+
+DLC5 CABLE DRIVER
+F: src/tap/cable/dlc5.c
+S: Orphan
+
+EJTAG COMPATIBLE BUS DRIVER VIA DMA
+F: src/bus/ejtag_dma.c
+S: Orphan
+
+EJTAG COMPATIBLE BUS DRIVER VIA PRACC
+F: src/bus/ejtag.c
+S: Orphan
+
+ETC EA253 CABLE DRIVER
+F: src/tap/cable/ea253.c
+S: Orphan
+
+ETC EI012 CABLE DRIVER
+F: src/tap/cable/ei012.c
+S: Orphan
+
+FJMEM FPGA JTAG MEMORY BUS DRIVER
+P: Arnim Läuger
+M: arniml at users.sourceforge.net
+F: src/bus/fjmem.c
+S: Maintained
+
+FLASH LAYER
+F: src/flash/*
+S: Orphan
+
+FREESCALE MPC5200 COMPATIBLE BUS DRIVER
+F: src/bus/mpc5200.c
+S: Orphan
+
+FT2232 CABLE DRIVER
+P: Arnim Läuger
+M: arniml at users.sourceforge.net
+F: src/tap/cable/ft2232.c
+S: Maintained
+
+GOEPEL "BOUNDARY SCAN COACH" TRAINING BOARD BUS DRIVER
+F: src/bus/bscoach.c
+S: Orphan
+
+H7202 COMPATIBLE BUS DRIVER
+F: src/bus/h7202.c
+S: Orphan
+
+HITACHI SH7727 COMPATIBLE BUS DRIVER
+F: src/bus/sh7727.c
+S: Orphan
+
+HITACHI SH7750R/SH7751R COMPATIBLE BUS DRIVER
+F: src/bus/sh775?r.c
+S: Orphan
+
+IBM POWERPC 405EP COMPATIBLE BUS DRIVER
+F: src/bus/ppc405ep.c
+S: Orphan
+
+IBM POWERPC 440GX 8-bit EBC COMPATIBLE BUS DRIVER
+F: src/bus/ppc440gx_ebc8.c
+S: Orphan
+
+INTEL IXP425 COMPATIBLE BUS DRIVER
+F: src/bus/ixp425.c
+S: Orphan
+
+INTEL IXP435 COMPATIBLE BUS DRIVER
+F: src/bus/ixp435.c
+S: Orphan
+
+INTEL PXA2X0 COMPATIBLE BUS DRIVER
+F: src/bus/pxa2x0.c
+S: Orphan
+
+INTEL SA-1110 COMPATIBLE BUS DRIVER
+F: src/bus/sa1110.c
+S: Orphan
+
+JIM CABLE DRIVER
+F: src/tap/cable/jim.c
+S: Orphan
+
+JOPCYC BUS DRIVER
+P: Arnim Läuger
+M: arniml at users.sourceforge.net
+F: src/bus/jopcyc.c
+S: Maintained
+
+KA-RO TRITON STARTERKIT II (PXA255/250) CABLE DRIVER
+F: src/tap/cable/triton.c
+S: Orphan
+
+KEITH & KOEP CABLE DRIVER
+F: src/tap/cable/keithkoep.c
+S: Orphan
+
+LATTICE PARALLEL PORT DOWNLOAD CABLE DRIVER
+F: src/tap/cable/lattice.c
+S: Orphan
+
+MACRAIGOR WIGGLER CABLE DRIVER
+F: src/tap/cable/wiggler*.c
+S: Orphan
+
+MOTOROLA MPC824X COMPATIBLE BUS DRIVER
+F: src/bus/mpc824x.c
+S: Orphan
+
+MPCBDM CABLE DRIVER
+F: src/tap/cable/mpcbdm.c
+S: Orphan
+
+PROTOTYPE BUS DRIVER
+F: src/bus/prototype.c
+S: Orphan
+
+SAMSUNG S3C4510B COMPATIBLE BUS DRIVER
+F: src/bus/s3c4510.c
+S: Orphan
+
+SHARP LH7A400 COMPATIBLE BUS DRIVER
+F: src/bus/lh7a400.c
+S: Orphan
+
+SVF PLAYER
+P: Arnim Läuger
+M: arniml at users.sourceforge.net
+F: src/svf/*
+S: Maintained
+
+TOSHIBA TX4925 COMPATIBLE BUS DRIVER
+F: src/bus/tx4925.c
+S: Orphan
+
+TS-7800 SOC GPIO CABLE DRIVER
+F: src/tap/cable/ts7800.c
+S: Orphan
+
+USB-BLASTER CABLE DRIVER
+P: Arnim Läuger
+M: arniml at users.sourceforge.net
+F: src/tap/cable/usbblaster.c
+S: Maintained
+
+VISION EP9307 SOM GPIO CABLE DRIVER
+F: src/tap/cable/vision_ep9307.c
+S: Orphan
+
+XILINX PLATFORM CABLE USB DRIVER
+F: src/tap/cable/xpc.c
+S: Orphan
+
+ZEFANT-XS3 BUS DRIVER
+P: Arnim Läuger
+M: arniml at users.sourceforge.net
+F: src/bus/zefant-xs3.c
+S: Maintained
--- /dev/null
+#
+# $Id$
+#
+# Copyright (C) 2002 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Marcel Telka <marcel@telka.sk>, 2002.
+#
+
+include $(top_srcdir)/Makefile.rules
+
+SUBDIRS = \
+ doc \
+ include/urjtag \
+ data \
+ src \
+ po
+
+if ENABLE_APPS
+SUBDIRS += \
+ src/apps/jtag \
+ src/apps/bsdl2jtag
+endif
+
+DIST_SUBDIRS = \
+ $(SUBDIRS)
+
+EXTRA_DIST = \
+ Makefile.rules \
+ UrJTAG.nsi \
+ tools/config.rpath
+
+ACLOCAL_AMFLAGS = -I m4
+
+swig:
+ swig \
+ -python \
+ -includeall -ignoremissing -Iinclude/urjtag \
+ -module urjtag \
+ urjtag.i
--- /dev/null
+#
+# $Id$
+#
+# Copyright (C) 2003 ETC s.r.o.
+# Copyright (C) 2004 Marcel Telka
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Marcel Telka <marcel@telka.sk>, 2003, 2004.
+#
+
+LINT_FLAGS =
+LINT_FLAGS += -warnposixheaders
+LINT_FLAGS += +boolint
+
+lint:
+ -test "$(SOURCES)" && splint $(LINT_FLAGS) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(SOURCES)
+ test -z "$(SUBDIRS)" || $(MAKE) RECURSIVE_TARGETS=lint-recursive $(AM_MAKEFLAGS) lint-recursive
+
+lint-am: Makefile @MAINTAINER_MODE_TRUE@ $(top_srcdir)/Makefile.rules
+
+.PHONY: lint lint-am
--- /dev/null
+$Id$
+
+urjtag-0.10
+
+ * Major internal improvements
+ - Flash write/program API function now operates on a buffer instead
+ of single bytes/words. Required for the multi-byte write mode.
+ (Arnim Laeuger)
+ - Limit maximum number of bytes queued for usbconn based cables.
+ Reduces the requested amount of memory for SVF runtest (Kolja Waschk)
+ - Command and methods to access JTAG signals directly, including
+ TRST and SRST (Sebastian Hesselbarth, Kolja Waschk, Arnim Laeuger)
+ * Improvements to the build system
+ - Several updates for Windows build compatability (Mike Frysinger)
+ - CPP include strategy sanitized (Mike Frysinger)
+ - Resolved formatting/printing mismatches (Mike Frysinger)
+ - bsdl2jtag program replaced by wrapper script (Arnim Laeuger)
+ - Man page updates (Uwe Hermann)
+ * Updates to the jtag command shell
+ - New usleep command (Stanislav Sinyagin)
+ - Added instruction parameter to the print command (Hartley Sweeten)
+ - Added ref_freq parameter to the svf command (Arnim Laeuger)
+ - New pod command (Kolja Waschk)
+ - Added noverify parameter to the flashmem command (Jeff Wittrock)
+ * Updates to the SVF player
+ - Optional reference frequency (Arnim Laeuger)
+ - Fix compare TDO flaw (Kolja Waschk)
+ - Fix progress indicator visibility (William)
+ - Add pass/fail report for progress reporting (Arnim Laeuger)
+ * New and updated bus drivers
+ - Support BCM6348/EJTAG 3.1 (by Andy Potter/livebox)
+ - Fixed address mode behvavior of prototype driver (Arnim Laeuger)
+ - Support foe EJTAG in DMA mode (Julien Aube)
+ - Added Goepel Boundary Scan Coach (Markus Schneider)
+ - Added additional address decoding for mpc5200 (Jeff Wittrock)
+ - General fix for part descriptions containing initbus (Arnim Laeuger)
+ - Support multiplexed bus operation for mpc5200 (Jon Smirl)
+ * New and updated cable drivers
+ - New FT2232 based cable ARM-USB-OCD TINY (Sebastian Hesselbarth)
+ - Parport calibration loop is more tolerant (Arnim Laeuger)
+ - Technology Systems TS-7800 support (Catalin Ionescu)
+ - New FT2232 based cable TinCanTools Flyswatter (Mark Norman)
+ - Added detection of InpOut32.dll and usage for I/O port access even
+ under Vista (Kolja Waschk)
+ - FT2232 MPSSE buffer increased to mitigate performance decrease (Arnim
+ Laeuger)
+ - Keep FTDI based JTAG dongles in current mode during initialization
+ (Holger Schurig)
+ - New FT2232 based cable UsbScarab2 (Tomek Cedro)
+ * Updated flash drivers
+ - Spansion S92GL chips added (Arnim Laeuger)
+ - Multi-byte write mode support for Intel and AMD chips (Arnim Laeuger)
+ - MX29LV640B recognition (Julien Aube)
+ - Fixed memory corruption from jedec code (Jon Smirl)
+ - Fix and polish flasherase implementation (Jeff Wittrock, Arnim Laeuger)
+ * Added new JTAG declarations for
+ - New steppings for BF527, BF533, BF548 (Mike Frysinger)
+ - New IDs for BF534 and BF548M (Mike Frysinger)
+ - Addes stepping for MPC5200B (Jeff Wittrock)
+ - Analog Devices Blackfin BF518 (Mike Frysinger)
+ - Atheros AR2313 flash access (snowwiehua)
+ - Atmel AVR32 clarifications (Holger Schurig)
+ - Broadcom BCM6358 / neufbox4 (Julien Aube)
+ - Lattice LC4064ZC (Catalin Ionescu)
+ - Lattice LFEC2-12E (Catalin Ionescu)
+ - Marvell 88E1118, 88F5182-A2 (Catalin Ionescu)
+ - Texas Instruments TNETV1060, TNETV1061 (Kenny)
+ * Updated documentation
+
+urjtag-0.9
+
+ * Completely rewritten BSDL parser, making it better maintainable,
+ extendable, and also adding support for IEEE 1532 extensions
+ (Arnim Laeuger)
+ * Major internal improvements
+ - Most if not all internal functions now take a pointer to the
+ chain configuration data as an argument, instead of using a
+ global "chain" variable. Needed for use as a library (Jie Zhang)
+ - Generally UrJTAG uses less global variables now (all)
+ - Added new "link driver" layer where previously only parport
+ was known; now there's a separate subsystem for USB cables,
+ named "usbconn". Due to the switch, some "cable" command
+ arguments for USB cables changed! (Arnim Laeuger, Kolja Waschk)
+ * Improvements to the build system
+ - Cable and link driver selection during ./configure (Arnim Laeuger)
+ - Fix building out of tree (Mike Frysinger)
+ - Support run-time relocatable UrJTAG (Mike Frysinger)
+ - Many improvements for building on Windows and generally on
+ other platforms (by Mike Frysinger)
+ - Support building under Mac OS X (Ville Voipio)
+ - Some initial work to support building in MinGW (Kolja Waschk)
+ * Updates to the jtag command shell
+ - Allow to disable startup message and quit upon EOF (Mike Frysinger)
+ - Allow customization of jtag prompt via env variable (Mike Frysinger)
+ - Don't add duplicate history lines (Uwe Bonnes)
+ - Fixes to handling of the "frequency" command (many contributors)
+ - Fix quitting when not using readline (Mike Frysinger)
+ - Fix some irritating warning messages even if there was nothing wrong
+ - New "idcode" command (Uwe Bonnes)
+ * Updates to the SVF player
+ - Added progress indicator (Steve Franks)
+ - Fix for RUNTEST command with SEC argument (Arnim Laeuger)
+ - Read TDO data from instruction shift (Arnim Laeuger)
+ * New and updated bus drivers
+ - General cleanup and malloc/free issues fixed (Hartley Sweeten)
+ - Added avr32 bus driver (Gabor Juhos)
+ - Added bf526,bf527,bf538 and bf548_ezkit bus driver (Jie Zhang)
+ - Added fjmem bus driver (A. Laeuger)
+ - Add 32 bit bus support for mpc824x (Eugene Boldenkov)
+ * New and updated cable drivers
+ - General cleanup and malloc/free issues fixed (Hartley Sweeten)
+ - Generic FT2232 driver improvements for performance and
+ stability (Arnim Laeuger)
+ - New FT2232 based cable BFIN-UJTAG/gnICE (Michael Hennerich)
+ - New Segger J-Link driver (not really functional yet) (Kolja Waschk)
+ - Xilinx XPCU cable driver now using fast GPIF transfers via vendor
+ request instead of bit banging (Kolja Waschk)
+ * Updated flash drivers
+ - Fix address shift (Jeff Wittrock)
+ - Fixes and better verbosity in flash drivers (Jie Zhang)
+ * Added new JTAG declarations for
+ - Analog Devices Blackfin BF527 (Jie Zhang)
+ - Atmel ATF1504ASV (Stefan Pledl)
+ - Atmel AT32AP7000 (Gabor Juhos)
+ * Updated documentation
+
+urjtag-0.8
+
+ * Integrated BSDL parser (Arnim Laeuger)
+ * Updates to the jtag command shell
+ - New "bsdl" command
+ - New "scan" command
+ - More flexible search algorithm for "include" and "script"
+ * New and updated bus drivers
+ - Added prototype bus driver (Detrick Martin)
+ - Added bus drivers for various Blackfin boards (Jie Zhang)
+ - Improvements in S3C4510B driver
+ * New and updated cable drivers (by A. Laeuger, unless noted otherwise)
+ - Wiggler driver with configurable pin mapping
+ - TRST/SRST and LED support in drivers for FT2232-based cables
+ - Vision EP9307 GPIO (Hartley Sweeten)
+ - Added new variants of FT2232-based cables
+ - Amontec JTAGkey (Laurent Gauch)
+ - OOCDLink-s
+ - Turtelizer 2
+ - USB to JTAG Interface
+ - Xverve DT-USB-ST Signalyzer Tool
+ * Numerous internal improvements
+ - activity queuing mechanism to speed up JTAG over USB
+ - simplified source directory layout; incorporated libbrux and inclow
+ - (hopefully) fixed problem with writing to dual-mode x8/x16 flash
+ - experimental (debug-only) new improved JEDEC flash detection
+ - improved linking with USB drivers in Cygwin environment
+ - several bug fixes and optimizations
+ * Added new JTAG declarations for
+ - Altera EP2C8 (Hartley Sweeten)
+ - Analog Devices Blackfin BF537, BF549, BF567 (Jie Zhang)
+ - Freescale MPC5241
+ - Xilinx XC2V80- XC2V250- and XC2V1000-FG256 (Alexander Didebulidze)
+ * Improved documentation
+ * Added JIM, a cable/part simulator for regression testing and demos
+
+urjtag-0.7 (2007-12-23)
+
+Also see libbrux/NEWS for more news, especially regarding the flash support.
+
+ * Integrated SVF player (Arnim Laeuger)
+ * Updates to the jtag command shell
+ - New writemem command to write to SRAM (Kent Palmkvist)
+ - New debug, test and shell commands, aliasing for parts
+ - Version output includes subversion revision number
+ - New command line options "version","help","norc"
+ - Improved diagnostics for bsdl2jtag, SVF player (Hein Roehrig)
+ - More error messages added to cmd/bit.c (Jerome Debard)
+ - More verbose output during flashmem (Jerome Debard)
+ - DR can be loaded interactively (Martin Buck)
+ - JTAG commands now parsed case insensitive (Andrew Dyer)
+ * New and updated bus drivers
+ - Added optional 'init' function to every bus driver
+ - Analog Devices Blackfin BF533 (Robin Getz)
+ - Analog Devices SHARC ADSP-21065L (Girish G.Pai,Lesly A.M,T.Nadackal,S.Abraham)
+ - Freescale MPC5200 (Asier Llano Palacios)
+ - IBM PPC405EP (Wojtek Kaniewski)
+ - Intel PXA2x0 (Cliff Brake, F.Rysanek)
+ - JOP.design Cyclone boards (Arnim Laeuger)
+ - Magnachip H7202 (Arnim Laeuger)
+ - Updated Samsung S3C4510 bus driver (Krysztof Blaszkowski)
+ - SLS Corp. UP3 (Kent Palmkvist)
+ - Zefant XS3 (Arnim Laeuger)
+ * New and updated cable drivers
+ - Cable command syntax changed to allow better integration of
+ non-parport-based cables (Laurent Pinchart)
+ - Added support for FreeBSD ppi interface
+ - Altera USB-Blaster and ixo.de usb_jtag (Kolja Waschk)
+ - EJTAG driver (Oleg)
+ - FT2232-based USB cables (Arnim Laeuger)
+ - IGLOO cable (Robin Getz)
+ - Xilinx Platform Cable USB (experimental) (Kolja Waschk)
+ - Fix for certain Wiggler cables (David Vrabel)
+ - Better diagnostics when opening ppdev (Hein Roehrig)
+ * Improved documentation:
+ - New doc/UrJTAG.txt
+ - Added man pages for jtag and bsdl2jtag
+ * Miscellaneous enhancements and fixes
+ - Improved timing and busy-loop waiting (Hein Roehrig)
+ - bidir support in bsdl2jtag (Wojtek Kaniewski)
+ - GCC4 Compilation fix (Asier Llano Palacios)
+ - Moved "libbrux" and "include" into jtag directory.
+ * Added new JTAG declarations for
+ - ADMtek ADM5120
+ - Altera EP1C6, EP1C12, EPM3064
+ - Analog Devices BF533, ADSP-21065L
+ - Atheros AR2312
+ - Atmel AT91SAM7S256
+ - Brecis MSP2006
+ - Freescale MPC5200
+ - Hitachi AR7300
+ - IBM PPC405EP
+ - Intel PXA270
+ - Lattice LC4128C
+ - Lexra LX5280
+ - Sharp LH7A400
+ - Xilinx XC18V04, XC2C256, XC2C64, xC2S200E, XC2S300E, XC3S..., XCF04S, XC9572XL
+
+jtag-0.6 (2007-11-02, never released officially; many derivatives in the wild)
+
+ * Created UrJTAG fork at http://www.urjtag.org
+ * Added new JTAG declarations for
+ - Hitachi HD64465
+ - Hitachi SH7729 (Beregnyei Balazs)
+ - Motorola MPC8245
+ - Broadcom BCM4712 (partial, Alan Wallace)
+ - Xilinx XCR3128XL-VQ100 (patch 1010714, Michael Lauer)
+ - Xilinx XCR3032XL-VQ44 (patch 972621, Andrew Dyer)
+ - Toshiba TX4925/TX4926 (patch 972621, Andrew Dyer)
+ - Sharp LH7A400 (patch 886068, Marko Rößler)
+ - IBM 440GX (patch 1012120, Jerome Debard)
+ - Lattice LC4032V (patch 1012120, Jerome Debard)
+ - Lattice M4A3-64/32 (patch 1012120, Jerome Debard)
+ - Lattice M4A3-256/192 (patch 1012120, Jerome Debard)
+ * Added new bus drivers:
+ - Motorola MPC824x
+ - AMD Alchemy Solutions Au1500 (patch 853883, Zhang Wei)
+ - Toshiba TX4925 (patch 972625, Andrew Dyer)
+ - IBM PowerPC 440GX (patch 1012154, Jerome Debard)
+ - Sharp LH7A400 (patch 886068, Marko Rößler)
+ * Added support for Lattice Parallel Port JTAG Cable (patch 1012138, Jerome Debard).
+ * Fixed pin assignment for Macraigor Wiggler JTAG Cable (patch 1040199, Andrew Dyer).
+ * Added new commands:
+ - 'salias' to define alias for a signal
+ - 'reset' to reset JTAG chain
+ * Explicit 'detectflash' command call is required before 'flashmem' command.
+ * Fixed minor bugs (including bug 857039).
+ * Fixed compiler error on Debian Woody (patch 986414, Martin Buck).
+ * Added support for different Intel IXP425 frequency variants (patch 1030647, Trevor Man).
+ * Rewritten and improved startup sequence to distinguish between interactive invocation
+ and stdin input (fixed bug 858535, thanks to Andrew Dyer for an idea).
+ * Removed support for parameter '-' (stdin).
+ * New translations:
+ - French (Michel Robitaille)
+ - Kinyarwanda (Steven Michael Murphy)
+
+jtag-0.5.1 (2003-10-11):
+
+ * Added new JTAG declarations for
+ - Altera EP1C20F400 (Rojhalat Ibrahim)
+ - Altera EPM7128AETC100 (Rojhalat Ibrahim)
+ * Added additional checks for valid ByteBlaster cable connection and enabled all variants
+ of the cable (patch 793313, Rojhalat Ibrahim).
+ * Used real data bus width for data reading in PXA2x0, SA1110, and SH7727 bus drivers
+ (based on patch 792591, thanks to Guennadi Liakhovetski).
+ * Added 'initbus' command to allow dynamic bus driver loading.
+ * Added support for flashes with multiple block erase regions for 'flashmem' (Bradley D. LaRonde).
+ * Added BOOT_DEF register emulation for PXA2x0 bus driver.
+ * Fixed inverted TRST signal for Macraigor Wiggler JTAG Cable see patch 799377 for more info,
+ thanks to Mike Tesch for reporting).
+ * Added Ka-Ro TRITON (PXA255/250) JTAG Cable driver (patch 805103, Andreas Mohr).
+ * Spelling and documentation fixes (patch 805108, Andreas Mohr).
+ * Fixed minor bugs.
+ * Updated translations:
+ - Slovak
+
+jtag-0.5 (2003-08-19):
+
+ * Fixed bug with SELECT, AUTOFD, and STROBE signals handling (bug 745824).
+ * Added new commands 'peek' and 'poke' (patch 747447, Matan Ziv-Av).
+ * Fixed bugs in SH7727 bus driver (thanks to Rainer Dörken).
+ * Added bus drivers for Hitachi SH7750R and Broadcom BCM1250 (patch 753300, Matan Ziv-Av).
+ * Added bus driver for Hitachi SH7751R (patch 773533, Matan Ziv-Av).
+ * Added bus width detection using MD3 and MD4 signals in SH7727 bus driver
+ (thanks to Rainer Dörken).
+ * Changes in 'discovery' command:
+ - removed explicit JTAG chain length detection (patch 753298, Matan Ziv-Av)
+ - simplified output messages
+ - removed support for report results to file
+ * Added new command 'part', syntax changes for 'set', 'get', 'dr', 'instruction', and
+ 'print' commands.
+ * Added support for multiple buses, added new 'bus' command to change active bus.
+ * Added initial JTAG declarations for Broadcom BCM3310 (see support request 770145 for
+ more info, thanks to Ramses VI).
+ * Added JTAG declarations for Samsung S3C4510B (Jiun-Shian Ho).
+ * Added bus driver for Samsung S3C4510X (Jiun-Shian Ho).
+ * Fixed invalid memory allocation size (core dump) in jtag_parse_line() function.
+ * Added new 'include' command.
+ * Added new commands 'signal', 'register', 'bit', and enhanced 'instruction' command
+ to allow create JTAG declarations from command line (or script).
+ * Added new 'eraseflash' command (patch 772267, Thomas Fröhlich).
+ * JTAG declarations are now executed as scripts.
+ * Added support for parts without IDCODE instruction.
+ * Added support for "downto" in bit vectors and "observe_only" into bsdl2jtag
+ (patch 787346, Brad Parker).
+ * Minor bugs fixed.
+ * New translations:
+ - Slovak
+
+jtag-0.4 (2003-05-29):
+
+ * Added support for executing scripts directly from stdin (parameter '-').
+ * Disabled external bus cycles for PXA250 for addresses above 0x04000000.
+ * Fixed bug in BUSY signal handling in Linux ppdev driver.
+ * Optimized bus drivers to increase bus access speed (readmem, flashmem, ...).
+ * Added new command 'endian' to configure access mode to external files.
+ * Added JTAG declarations for
+ - Broadcom BCM5421S (patch 743129, Matan Ziv-Av)
+ - DEC SA1100 (thanks to Jachym Holecek)
+ * Added bus driver for Hitachi SH7727 (based on patch 743140, Matan Ziv-Av).
+ * Added support for printing current JTAG frequency.
+ * Added support for 'signal' keyword (as alias for 'pin') into JTAG declarations.
+ * Minor bugs fixed.
+
+jtag-0.3.2 (2003-04-04):
+
+ * Added driver for Keith & Koep JTAG Cable.
+ * Ported to NetBSD/i386 (Jachym Holecek).
+ * Added JTAG declarations for Xilinx XCR3256XL-FT256 (Jachym Holecek).
+
+jtag-0.3.1 (2003-03-19):
+
+ * Added support for Intel PXA255 A0 (thanks to Mike Sprauve).
+ * Added support for running scripts specified as jtag command line parameters.
+ * Added support for comments in scripts. Lines started with `#' are treated as
+ comments.
+ * Added support for Linux ppdev parallel port driver. Non-root users can
+ use JTAG Tools now.
+ * Added new `bsdl2jtag' conversion tool (Matan Ziv-Av).
+
+jtag-0.3 (2003-02-25):
+
+ * Changes in interactive commands:
+ - enhanced 'dr' command functionality
+ - new 'set signal' command
+ - new 'get signal' command
+ - new 'script' command (Alessandro Zummo)
+ * Added support for JTAG cables:
+ - Mpcbdm JTAG Cable (Christian Pellegrin)
+ - Arcom JTAG Cable (patch 682310, Ian Campbell)
+ * Added JTAG declarations for
+ - Intel IXP425 (Christian Pellegrin)
+ - Xilinx XC2C256-TQ144 (Alessandro Zummo)
+ - Broadcom BCM1250 (Matan Ziv-Av)
+ - Hitachi SH7727 (Matan Ziv-Av)
+ * Added bus driver for Intel IXP425 (Christian Pellegrin).
+ * Added support for all 6 static memory banks for Intel SA1110 (bug 682660).
+ * Added support for bidirectional 'B' boundary scan bits (Christian Pellegrin).
+ * Added support for 1 x 16 bit memory configuration (Christian Pellegrin).
+ * Added buffered file reads/writes (Christian Pellegrin).
+ * Added support for flash drivers (August Hörandl).
+ * Added flash driver for AMD chips (August Hörandl).
+ * Added support for rc and history files (Alessandro Zummo).
+ * Added support for localization.
+ * Some bugs fixed.
+
+jtag-0.2.2 (2003-02-04):
+
+ * Added new manufacturer: Cypress. (patch 669157, Chris Ellec)
+ * Added new 'frequency' command to limit maximum TCK frequency
+ * Added support for parallel ports with I/O addresses above 0x3FF
+
+jtag-0.2.1 (2003-01-13):
+
+ * Fixed compile error (bug 665923, thanks to Chris Ellec).
+ * Added support for Macraigor Wiggler JTAG Cable (Stas Khirman).
+ * Added support for Altera ByteBlaster/ByteBlaster II/ByteBlasterMV
+ Parallel Port Download Cable.
+ * Fixed some other bugs.
+
+jtag-0.2 (2003-01-08):
+
+ * Completed JTAG declarations for Xilinx XCR3128XL-CS144.
+ * Fixed crash if flash memory is not detected.
+ * Added new 'discovery' command for discovery unknown JTAG chains.
+ * Added JTAG cable driver support and new 'cable' command.
+
+jtag-0.1 (2002-11-25):
+
+ * Initial public release.
--- /dev/null
+$Id$
+
+The subdirectory urjtag/ of the UrJTAG package contains a branch that is used
+for the conversion of UrJTAG to a library plus a separate command shell.
+Changes and commits to this branch will be frequent, and will affect nearly
+every aspect of the source tree, like file names, file locations, code layout,
+and identifier names.
+
+Until further notice this branch should be considered completely unstable, to
+the extent that execution or even compilation may be broken. If you want to
+use UrJTAG, please use the version contained in directory ../jtag/. It
+contains the version released as 0.10 plus bug fixes.
+
+================================================================================
+
+UrJTAG package is free software, covered by the GNU General Public License, and
+you are welcome to change it and/or distribute copies of it under certain
+conditions. There is absolutely no warranty for UrJTAG. Please read COPYING
+file for more info.
+
+All the information about installing and running UrJTAG is available in
+the document
+ << doc/UrJTAG.txt >>
+
+The very latest information and software updates are available at
+the project homepage
+ << http://www.urjtag.org >>
+
+
--- /dev/null
+$Id$
+
+Please complain if you find any typos, incorrect sorting,
+or someone is missing who should be listed there!
+
+Shaju Abraham
+Julien Aube
+Beregnyei Balazs
+Michael Banditt
+Krzysztof Blaszkowski
+Eugene Boldenkov
+Uwe Bonnes
+Florian Boor
+Cliff Brake
+Martin Buck
+Ian Campbell
+Jeff Carr
+Tomek Cedro
+Alex (d18c7db)
+Jerome Debard
+Kris Dickie
+Alexander Didebulidze
+Rainer Dörken
+Andrew Dyer
+Chris Ellec
+Ralf Engels
+Steve Franks
+Thomas Fröhlich
+Mike Frysinger
+Robin Getz
+Christophe Grenier
+Uwe Hermann
+Sebastian Hesselbarth
+Jiun-Shian Ho
+Jachym Holecek
+August Hörandl
+Rojhalat Ibrahim
+Andrey F. Ilchuk
+Catalin Ionescu
+Kees Jongenburger
+Gabor Juhos
+Wojtek Kaniewski
+Kenny
+Stas Khirman
+Matej Kupljen
+Arnim Läuger
+Bradley D. LaRonde
+Michael Lauer
+Guennadi Liakhovetski
+Anselmo Luginbühl
+Lesly A. M
+Raphael Mack
+Trevor Man
+Detrick Martin
+Andreas Mohr
+Jani Monoses
+Masaki Muranaka
+Tony K Nadackal
+Márton Németh
+Mark Norman
+Oleg <olegi>
+Daniel O'Connor
+Girish G Pai
+Asier Llano Palacios
+Kent Palmkvist
+Brad Parker
+Ken Parker
+Christian Pellegrin
+Laurent Pinchart
+Ramses VI
+Jean-Christian de Rivaz
+Michel Robitaille
+Hein Roehrig
+Marko Rößler
+Yen Rui
+Frantisek Rysanek
+Benedikt Sauter
+Markus Schneider
+Holger Schurig
+Robert Sedevici
+Stanislav Sinyagin
+Jon Smirl
+Snowel (snowweihua)
+Juergen Stuber
+Hartley Sweeten
+Marcel Telka
+Mike Tesch
+Ville Voipio
+David Vrabel
+Alan Wallace
+William (wmsfuan)
+Jeff Wittrock
+Zhang Wei
+Jie Zhang
+Matan Ziv-Av
+Alessandro Zummo
--- /dev/null
+;\r
+; $Id$\r
+;\r
+; Script to create Installer for Windows platforms using \r
+; "nullsoft scriptable install system" (NSIS)\r
+; (available from http://nsis.sourceforge.net)\r
+;\r
+; Copyright (C) 2009 K. Waschk\r
+;\r
+; This program is free software; you can redistribute it and/or\r
+; modify it under the terms of the GNU General Public License\r
+; as published by the Free Software Foundation; either version 2\r
+; of the License, or (at your option) any later version.\r
+;\r
+; This program is distributed in the hope that it will be useful,\r
+; but WITHOUT ANY WARRANTY; without even the implied warranty of\r
+; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the\r
+; GNU General Public License for more details.\r
+;\r
+; You should have received a copy of the GNU General Public License\r
+; along with this program; if not, write to the Free Software\r
+; Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA\r
+; 02111-1307, USA.\r
+;\r
+; Written by K. Waschk, 2009\r
+; Based on "Modern UI Basic Example Script" by Joost Verburg\r
+;\r
+; Last tested with NSIS version 2.42\r
+;\r
+; Run makensis.exe in the root of an UrJTAG source directory\r
+; extracted from a distributed archive of UrJTAG (make dist)\r
+; after configuring and compiling. Usually you want to compile\r
+; with --with-ftd2xx, --with-inpout32, --enable-relocatable and\r
+; the CFLAGS=-mno-cygwin setting. To make UrJTAG search for\r
+; its data files and BSDL declarations in the correct path,\r
+; add JTAG_BIN_DIR and JTAG_DATA_DIR as follows to the CFLAGS\r
+; on the same line together with ./configure and its options\r
+; (this is used for building the UrJTAG.exe distributable):\r
+;\r
+; CFLAGS="-mno-cygwin -O2 -DJTAG_BIN_DIR=\\\"/\\\" -DJTAG_DATA_DIR=\\\"/data\\\""\r
+; ./configure --enable-relocatable \\r
+; --with-ftd2xx=/tmp/FTDI_CDM_204 \\r
+; --with-libusb=/tmp/LibUSB-Win32_112 \\r
+; --with-inpout32\r
+;\r
+; This script now expects InpOut32.dll in the current directory\r
+; as well. You can get an InpOut32.dll that works on 32 bit AND\r
+; 64 bit Windows, including Vista, from \r
+; http://www.highrez.co.uk/Downloads/InpOut32/\r
+;\r
+; No drivers for FTDI cables are installed. FTD2XX.DLL must be\r
+; in your PATH somewhere. It usually is installed with the cable\r
+; drivers.\r
+;\r
+;--------------------------------\r
+;Include Modern UI\r
+\r
+ !include "MUI2.nsh"\r
+\r
+;--------------------------------\r
+;General\r
+\r
+ ;Name and file\r
+ Name "UrJTAG"\r
+ OutFile "UrJTAG.exe"\r
+\r
+ ;Default installation folder\r
+ InstallDir "$PROGRAMFILES\UrJTAG"\r
+ \r
+ ;Get installation folder from registry if available\r
+ InstallDirRegKey HKCU "Software\UrJTAG" ""\r
+\r
+ ;Request application privileges for Windows Vista\r
+ RequestExecutionLevel user\r
+\r
+;--------------------------------\r
+;Interface Settings\r
+\r
+ !define MUI_ABORTWARNING\r
+\r
+;--------------------------------\r
+;Variables\r
+\r
+ Var StartMenuFolder\r
+\r
+;--------------------------------\r
+;Pages\r
+\r
+ !insertmacro MUI_PAGE_LICENSE "COPYING"\r
+ !insertmacro MUI_PAGE_COMPONENTS\r
+ !insertmacro MUI_PAGE_DIRECTORY\r
+\r
+ ;Start Menu Folder Page Configuration\r
+ !define MUI_STARTMENUPAGE_REGISTRY_ROOT "HKCU" \r
+ !define MUI_STARTMENUPAGE_REGISTRY_KEY "Software\UrJTAG" \r
+ !define MUI_STARTMENUPAGE_REGISTRY_VALUENAME "Start Menu Folder"\r
+ !insertmacro MUI_PAGE_STARTMENU Application $StartMenuFolder\r
+\r
+ !insertmacro MUI_PAGE_INSTFILES\r
+ \r
+ !insertmacro MUI_UNPAGE_CONFIRM\r
+ !insertmacro MUI_UNPAGE_INSTFILES\r
+\r
+;--------------------------------\r
+;Languages\r
+ \r
+ !insertmacro MUI_LANGUAGE "English"\r
+\r
+;--------------------------------\r
+;Installer Sections\r
+\r
+Section "UrJTAG executable" SecExe\r
+\r
+ SetOutPath "$INSTDIR"\r
+ File src\jtag.exe\r
+ File inpout32.dll\r
+ WriteRegStr HKCU "Software\UrJTAG" "" $INSTDIR\r
+ WriteUninstaller "$INSTDIR\uninst.exe"\r
+\r
+SectionEnd\r
+\r
+Section "Documentation" SecDoc\r
+\r
+ SetOutPath "$INSTDIR\doc"\r
+ File doc\UrJTAG.txt\r
+ WriteRegStr HKCU "Software\UrJTAG" "" $INSTDIR\r
+ WriteUninstaller "$INSTDIR\uninst.exe"\r
+\r
+SectionEnd\r
+\r
+Section "Data files" SecData\r
+\r
+ SetOutPath "$INSTDIR\data"\r
+ File /r /x Makefile /x Makefile.am /x Makefile.in data\*\r
+ WriteRegStr HKCU "Software\UrJTAG" "" $INSTDIR\r
+ WriteUninstaller "$INSTDIR\uninst.exe"\r
+\r
+SectionEnd\r
+\r
+Section "Start Menu Entries" SecStartMenu\r
+\r
+ !insertmacro MUI_STARTMENU_WRITE_BEGIN Application\r
+ ;Create shortcuts\r
+ CreateDirectory "$SMPROGRAMS\$StartMenuFolder"\r
+ CreateShortCut "$SMPROGRAMS\$StartMenuFolder\JTAG Shell.lnk" "$INSTDIR\jtag.exe"\r
+ CreateShortCut "$SMPROGRAMS\$StartMenuFolder\Documentation.lnk" "$INSTDIR\doc\UrJTAG.txt"\r
+ CreateShortCut "$SMPROGRAMS\$StartMenuFolder\Uninstall.lnk" "$INSTDIR\Uninstall.exe"\r
+ !insertmacro MUI_STARTMENU_WRITE_END\r
+\r
+SectionEnd\r
+\r
+\r
+\r
+;--------------------------------\r
+;Descriptions\r
+\r
+!insertmacro MUI_FUNCTION_DESCRIPTION_BEGIN\r
+\r
+ !insertmacro MUI_DESCRIPTION_TEXT ${SecExe} \\r
+ "UrJTAG executable"\r
+\r
+ !insertmacro MUI_DESCRIPTION_TEXT ${SecDoc} \\r
+ "Documentation for UrJTAG"\r
+\r
+ !insertmacro MUI_DESCRIPTION_TEXT ${SecData} \\r
+ "BSDL include files and part descriptions for autodetection"\r
+\r
+ !insertmacro MUI_DESCRIPTION_TEXT ${SecStartMenu} \\r
+ "Links to UrJTAG in Start Menu"\r
+\r
+!insertmacro MUI_FUNCTION_DESCRIPTION_END\r
+\r
+;--------------------------------\r
+;Uninstaller Section\r
+\r
+Section "Uninstall"\r
+\r
+ RMDir /r "$INSTDIR\doc"\r
+ RMDir /r "$INSTDIR\data"\r
+ Delete "$INSTDIR\jtag.exe"\r
+ Delete "$INSTDIR\uninst.exe"\r
+ RMDir /r "$INSTDIR"\r
+\r
+ !insertmacro MUI_STARTMENU_GETFOLDER Application $StartMenuFolder\r
+ Delete "$SMPROGRAMS\$StartMenuFolder\Uninstall.lnk"\r
+ RMDir "$SMPROGRAMS\$StartMenuFolder"\r
+\r
+ DeleteRegKey /ifempty HKCU "Software\UrJTAG"\r
+\r
+SectionEnd\r
--- /dev/null
+dnl @synopsis VL_LIB_READLINE
+dnl
+dnl Searches for a readline compatible library. If found, defines
+dnl `HAVE_LIBREADLINE'. If the found library has the `add_history'
+dnl function, sets also `HAVE_READLINE_HISTORY'. Also checks for the
+dnl locations of the necessary include files and sets `HAVE_READLINE_H'
+dnl or `HAVE_READLINE_READLINE_H' and `HAVE_READLINE_HISTORY_H' or
+dnl 'HAVE_HISTORY_H' if the corresponding include files exists.
+dnl
+dnl The libraries that may be readline compatible are `libedit',
+dnl `libeditline' and `libreadline'. Sometimes we need to link a termcap
+dnl library for readline to work, this macro tests these cases too by
+dnl trying to link with `libtermcap', `libcurses', `libncurses' or
+dnl `libtinfo' before giving up.
+dnl
+dnl Here is an example of how to use the information provided by this
+dnl macro to perform the necessary includes or declarations in a C file:
+dnl
+dnl #ifdef HAVE_LIBREADLINE
+dnl # if defined(HAVE_READLINE_READLINE_H)
+dnl # include <readline/readline.h>
+dnl # elif defined(HAVE_READLINE_H)
+dnl # include <readline.h>
+dnl # else /* !defined(HAVE_READLINE_H) */
+dnl extern char *readline ();
+dnl # endif /* !defined(HAVE_READLINE_H) */
+dnl char *cmdline = NULL;
+dnl #else /* !defined(HAVE_READLINE_READLINE_H) */
+dnl /* no readline */
+dnl #endif /* HAVE_LIBREADLINE */
+dnl
+dnl #ifdef HAVE_READLINE_HISTORY
+dnl # if defined(HAVE_READLINE_HISTORY_H)
+dnl # include <readline/history.h>
+dnl # elif defined(HAVE_HISTORY_H)
+dnl # include <history.h>
+dnl # else /* !defined(HAVE_HISTORY_H) */
+dnl extern void add_history ();
+dnl extern int write_history ();
+dnl extern int read_history ();
+dnl # endif /* defined(HAVE_READLINE_HISTORY_H) */
+dnl /* no history */
+dnl #endif /* HAVE_READLINE_HISTORY */
+dnl
+dnl
+dnl @version 1.1
+dnl @author Ville Laurikari <vl@iki.fi>
+dnl @author Ville Voipio <vv@iki.fi>; check for readline completion (not available in, e.g. Leopard)
+
+AC_DEFUN([VL_LIB_READLINE], [
+ AC_CACHE_CHECK([for a readline compatible library],
+ vl_cv_lib_readline, [
+ ORIG_LIBS="$LIBS"
+ for readline_lib in readline edit editline; do
+ for termcap_lib in "" termcap curses ncurses tinfo; do
+ if test -z "$termcap_lib"; then
+ TRY_LIB="-l$readline_lib"
+ else
+ TRY_LIB="-l$readline_lib -l$termcap_lib"
+ fi
+ LIBS="$ORIG_LIBS $TRY_LIB"
+ AC_TRY_LINK_FUNC(readline, vl_cv_lib_readline="$TRY_LIB")
+ if test -n "$vl_cv_lib_readline"; then
+ break
+ fi
+ done
+ if test -n "$vl_cv_lib_readline"; then
+ break
+ fi
+ done
+ if test -z "$vl_cv_lib_readline"; then
+ vl_cv_lib_readline="no"
+ LIBS="$ORIG_LIBS"
+ fi
+ ])
+
+ if test "$vl_cv_lib_readline" != "no"; then
+ AC_DEFINE(HAVE_LIBREADLINE, 1,
+ [Define if you have a readline compatible library])
+ AC_CHECK_HEADERS(readline.h readline/readline.h)
+ AC_CACHE_CHECK([whether readline supports history],
+ vl_cv_lib_readline_history,
+ [vl_cv_lib_readline_history="no"
+ AC_TRY_LINK_FUNC(add_history, vl_cv_lib_readline_history="yes")])
+ if test "$vl_cv_lib_readline_history" = "yes"; then
+ AC_DEFINE(HAVE_READLINE_HISTORY, 1, [Define if your readline library has \`add_history'])
+ AC_CHECK_HEADERS(history.h readline/history.h)
+ fi
+
+ AC_CACHE_CHECK([whether readline supports completion],
+ vl_cv_lib_readline_completion,
+ [vl_cv_lib_readline_completion="no"
+ AC_TRY_LINK_FUNC(rl_completion_matches, vl_cv_lib_readline_completion="yes")])
+ if test "$vl_cv_lib_readline_completion" = "yes"; then
+ AC_DEFINE(HAVE_READLINE_COMPLETION, 1, [Define if your readline library has \`rl_completion_matches'])
+ fi
+ fi
+
+])dnl
+
+# ACI_PROG_SED
+# ------------
+# Check for a fully functional sed program that truncates
+# as few characters as possible. Prefer GNU sed if found.
+#
+# Copyright (C) Free Software Foundation
+#
+# Copied here from autoconf-2.60 programs.m4 (AC_PROG_SED) to maintain
+# compatibility with autoconf-2.59. Can be removed from acinclude.m4 if
+# autoconf-2.60 or newer is required for other reasons..
+#
+m4_ifndef([AC_PROG_SED],[dnl
+AC_DEFUN([AC_PROG_SED],
+[AC_CACHE_CHECK([for a sed that does not truncate output], ac_cv_path_SED,
+ [dnl ac_script should not contain more than 99 commands (for HP-UX sed),
+ dnl but more than about 7000 bytes, to catch a limit in Solaris 8 /usr/ucb/sed.
+ ac_script=s/aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa/bbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbb/
+ for ac_i in 1 2 3 4 5 6 7; do
+ ac_script="$ac_script$as_nl$ac_script"
+ done
+ echo "$ac_script" | sed 99q >conftest.sed
+ $as_unset ac_script || ac_script=
+ _AC_PATH_PROG_FEATURE_CHECK(SED, [sed gsed],
+ [_AC_FEATURE_CHECK_LENGTH([ac_path_SED], [ac_cv_path_SED],
+ ["$ac_path_SED" -f conftest.sed])])])
+ SED="$ac_cv_path_SED"
+ AC_SUBST([SED])dnl
+ rm -f conftest.sed
+])# ACI_PROG_SED
+])dnl
+
+
--- /dev/null
+#!/bin/sh
+#
+# $Id$
+#
+# Copyright (C) 2002, 2003 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Marcel Telka <marcel@telka.sk>, 2002, 2003.
+#
+
+if autoreconf -i -s -v -f ; then
+ echo
+ echo "autoreconf done."
+ echo
+else
+ echo
+ echo "autoreconf failed."
+ echo
+ exit 1
+fi
+
+./configure --enable-maintainer-mode "$@"
--- /dev/null
+#
+# $Id$
+#
+# Copyright (C) 2007, 2008 Kolja Waschk and other
+# UrJTAG.org developers, (C) 2002, 2003 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Marcel Telka <marcel@telka.sk>, 2002, 2003,
+# and other UrJTAG authors, 2007, 2008, ...
+#
+
+AC_INIT(UrJTAG,0.10,http://urjtag.org,urjtag)
+
+AC_PREREQ(2.54)
+AC_COPYRIGHT([Copyright (C) 2007/08 Kolja Waschk and other UrJTAG authors; 2002/03 ETC s.r.o.])
+AC_REVISION($Revision$)
+
+# Get SVN Revision - idea from xfce-power-manager (C) 2007 by B.Tarricone
+dnl get svn revision
+AC_MSG_CHECKING([code revision])
+SVN=`which svn`
+SVN_REVISION=0
+if test -n "$SVN" -a -x "$SVN"; then
+ SVN_REVISION=`LC_ALL=C svn info -R "$srcdir" 2>/dev/null | awk 'BEGIN { x=0 } /^Revision: / { if($2>x) x=$2; } END { printf "%d\n",x }'`
+ SVN_FROM="svn info"
+fi
+if test "$SVN_REVISION" -eq 0 -a -e "$srcdir/ChangeLog"; then
+ SVN_REVISION=`awk 'BEGIN { x=0 } /Revision: / { if($2>x) x=$2; } END { printf "%d\n",x }' "$srcdir/ChangeLog"`
+ SVN_FROM="ChangeLog"
+fi
+if test "$SVN_REVISION" -eq 0; then
+ SVN_REVISION=`git log -n1 --pretty=format:%b 2>/dev/null | sed -n '/^git-svn-id:/{s:.*@::;s: .*::;p}'`
+ SVN_FROM="git-svn log"
+fi
+if test "$SVN_REVISION" -eq "0" ; then
+ AC_MSG_RESULT([unknown, using 0])
+else
+ AC_MSG_RESULT([from $SVN_FROM: $SVN_REVISION])
+fi
+AC_DEFINE_UNQUOTED([SVN_REVISION], "$SVN_REVISION", [subversion revision number])
+AC_SUBST([SVN_REVISION])
+
+AC_CONFIG_AUX_DIR(tools)
+
+AM_INIT_AUTOMAKE([check-news dist-bzip2])
+
+AC_CONFIG_FILES(
+ Makefile
+ doc/Makefile
+ data/Makefile
+ include/urjtag/Makefile
+ src/Makefile
+ src/lib/Makefile
+ src/tap/Makefile
+ src/part/Makefile
+ src/bus/Makefile
+ src/flash/Makefile
+ src/cmd/Makefile
+ src/svf/Makefile
+ src/bsdl/Makefile
+ src/jim/Makefile
+ src/global/Makefile
+ src/apps/jtag/Makefile
+ src/apps/bsdl2jtag/Makefile
+ po/Makefile.in
+)
+
+AM_MAINTAINER_MODE
+
+AM_CONFIG_HEADER(config.h)
+AM_CONFIG_HEADER(include/urjtag/urjtag.h)
+
+AC_GNU_SOURCE
+
+AM_GNU_GETTEXT(external)
+AM_GNU_GETTEXT_VERSION(0.14.1)
+
+AC_PROG_CC
+AC_PROG_YACC
+AC_PROG_LIBTOOL
+AC_PROG_CC_C99
+
+
+AC_SEARCH_LIBS([ioperm], [ioperm])
+if test "$ac_cv_search_ioperm" != "no"; then
+ AC_DEFINE(HAVE_IOPERM, 1, [Define to 1 if you have the ioperm() function])
+ HAVE_IOPERM="yes"
+else
+ AC_SEARCH_LIBS([i386_set_ioperm], [i386])
+ if test "$ac_cv_search_i386_set_ioperm" != "no"; then
+ AC_DEFINE(HAVE_I386_SET_IOPERM, 1,
+ [Define to 1 if you have the i386_set_ioperm() function])
+ HAVE_I386_SET_IOPERM="yes"
+ fi
+fi
+
+AC_CHECK_FUNCS(swprintf)
+
+AC_CHECK_FUNC(clock_gettime, [], [ AC_CHECK_LIB(rt, clock_gettime) ])
+
+AC_CHECK_FUNCS(usleep)
+AC_CHECK_FUNCS(nanosleep)
+
+dnl check for sigaction with SA_ONESHOT or SA_RESETHAND
+AC_TRY_COMPILE([#include <signal.h>], [
+#ifndef SA_ONESHOT
+# define SA_ONESHOT SA_RESETHAND
+#endif
+int sa_flags = SA_ONESHOT;
+],
+[AC_DEFINE([HAVE_SIGACTION_SA_ONESHOT], [1], [Have a defined SA_ONESHOT])],
+[])
+
+AC_CHECK_HEADERS([linux/ppdev.h], [HAVE_LINUX_PPDEV_H="yes"])
+AC_CHECK_HEADERS([dev/ppbus/ppi.h], [HAVE_DEV_PPBUS_PPI_H="yes"])
+AC_CHECK_HEADERS(stropts.h)
+AC_CHECK_HEADERS(wchar.h)
+
+VL_LIB_READLINE
+
+
+dnl check for libusb-config
+
+AC_ARG_WITH([libusb],
+ [AS_HELP_STRING([--with-libusb],
+ [use libusb for some USB JTAG cables])],,
+ [with_libusb=check])
+
+AS_IF([test "x$with_libusb" != xno], [
+ save_LIBS=$LIBS
+ save_CPPFLAGS=$CPPFLAGS
+ AS_IF([test "x$with_libusb" != xyes -a "x$with_libusb" != xcheck], [
+ case $host in
+ *cygwin*)
+ USBLIBS="-L$with_libusb/lib/gcc -lusb"
+ USBCFLAGS="-I$with_libusb/include"
+ ;;
+ *)
+ USBLIBS="-Lwith_libusb -lusb"
+ USBCFLAGS="-I$with_libusb"
+ ;;
+ esac
+ ],[
+ AC_PATH_TOOL(LIBUSB_CONFIG, libusb-config, no)
+ AS_IF([test "$LIBUSB_CONFIG" != "no"],[
+ USBLIBS=`$LIBUSB_CONFIG --libs`
+ USBCFLAGS=`$LIBUSB_CONFIG --cflags`
+ ],)
+ ])
+ LIBS="$LIBS $USBLIBS"
+ CPPFLAGS="$CPPFLAGS $USBCFLAGS"
+ AC_CHECK_FUNC([usb_find_devices], [
+ AC_DEFINE(HAVE_LIBUSB, 1, [Define if you have libusb])
+ HAVELIBUSB=yes
+ ],[
+ AC_MSG_WARN([*** libusb not detected. No support for USB JTAG cables via libusb.])
+ LIBS=$save_LIBS
+ CPPFLAGS=$save_CPPFLAGS
+ ])
+],)
+
+AS_IF([test "x$HAVELIBUSB" = "xyes"],[
+ AM_CONDITIONAL(HAVE_LIBUSB, true)
+],[
+ AM_CONDITIONAL(HAVE_LIBUSB, false)
+])
+
+
+dnl Use FTDI library?
+
+AC_ARG_WITH([libftdi],
+ [AS_HELP_STRING([--with-libftdi],
+ [use libftdi for FTDI-based cables])],
+ [], [with_libftdi=check])
+
+AS_IF([test "x$with_libftdi" != xno], [
+ save_LIBS=$LIBS
+ save_CPPFLAGS=$CPPFLAGS
+ AS_IF([test "x$with_libftdi" != xyes -a "x$with_libftdi" != xcheck], [
+ FTDILIBS="-L$with_libftdi -lftdi"
+ FTDICFLAGS="-I$with_libftdi"
+ ],[
+ AC_PATH_TOOL(LIBFTDI_CONFIG, libftdi-config, no)
+ AS_IF([test "$LIBFTDI_CONFIG" != "no"],[
+ FTDILIBS=`$LIBFTDI_CONFIG --libs`
+ FTDICFLAGS=`$LIBFTDI_CONFIG --cflags`
+ ],)
+ ])
+ LIBS="$FTDILIBS $LIBS"
+ CPPFLAGS="$CPPFLAGS $FTDICFLAGS"
+ AC_CHECK_FUNC([ftdi_usb_open], [
+ AC_DEFINE(HAVE_LIBFTDI, 1, [Define if you have libftdi])
+ HAVELIBFTDI=yes
+ ],[
+ AC_MSG_WARN([*** libftdi not detected. No support for FTDI-based USB JTAG cables via libftdi.])
+ LIBS=$save_LIBS
+ CPPFLAGS=$save_CPPFLAGS
+ ])
+],)
+
+AS_IF([test "x$HAVELIBFTDI" = "xyes"],[
+ AM_CONDITIONAL(HAVE_LIBFTDI, true)
+],[
+ AM_CONDITIONAL(HAVE_LIBFTDI, false)
+])
+
+
+dnl Use FTDI ftd2xx library?
+
+AC_ARG_WITH([ftd2xx],
+ [AS_HELP_STRING([--with-ftd2xx],
+ [use ftd2xx library for FTDI-based cables])],
+ [], [with_ftd2xx=check])
+
+FTD2XXLIB=
+AS_IF([test "x$with_ftd2xx" = xyes -o "x$with_ftd2xx" = xcheck], [
+ AC_CHECK_LIB([ftd2xx], [FT_OpenEx], [
+ HAVELIBFTD2XX=yes
+ LIBS="-lftd2xx $LIBS"
+ ],[
+ AC_MSG_WARN([*** libftd2xx not found. No support for FTDI-based USB JTAG cables via libftd2xx.])
+ ])
+],[
+ AS_IF([test "x$with_ftd2xx" != xno], [
+ HAVELIBFTD2XX=yes
+ case $host in
+ *cygwin*|*mingw*)
+ CFLAGS="$CFLAGS -I$with_ftd2xx"
+ AS_IF([test -d "$with_ftd2xx/i386"], [
+ FTD2XXLIB="$with_ftd2xx/i386/ftd2xx.lib"
+ ],[
+ FTD2XXLIB="$with_ftd2xx/ftd2xx.lib"
+ ])
+ ;;
+ *)
+ CFLAGS="$CFLAGS -I$with_ftd2xx -L$with_ftd2xx"
+ LIBS="-lftd2xx $LIBS"
+ ;;
+ esac
+ ],)
+])
+AS_IF([test "x$HAVELIBFTD2XX" = xyes], [
+ AM_CONDITIONAL(HAVE_LIBFTD2XX, true)
+ AC_DEFINE(HAVE_LIBFTD2XX, 1, [define if you have libftd2xx])
+],[
+ AM_CONDITIONAL(HAVE_LIBFTD2XX, false)
+])
+AC_SUBST(FTD2XXLIB)
+
+
+dnl Use InpOut I/O library?
+dnl http://www.highrez.co.uk/Downloads/InpOut32/default.htm
+
+AC_ARG_WITH([inpout32],
+ [AS_HELP_STRING([--with-inpout32],
+ [use InpOut32.dll for parallel port access on Windows])],
+ [], [with_inpout32=no])
+
+case $host in
+ *cygwin*|*mingw*) ;;
+ *) with_inpout32=no ;;
+esac
+
+AS_IF([test "x$with_inpout32" = xyes], [
+ AM_CONDITIONAL(HAVE_INPOUTXX, true)
+ AC_DEFINE(HAVE_INPOUTXX, 1, [define if you have inpout32.dll])
+],[
+ AM_CONDITIONAL(HAVE_INPOUTXX, false)
+])
+
+
+WARNINGCFLAGS="-Wall -Wmissing-prototypes -Wstrict-prototypes -Wpointer-arith"
+AC_ARG_ENABLE([werror],
+ [AS_HELP_STRING([--enable-werror], [build with -Werror])],
+ [], [enable_werror=maybe])
+AS_IF([test "x$enable_werror" = xmaybe -a -d .svn], [
+ enable_werror=yes
+])
+AS_IF([test "x$enable_werror" = xyes], [
+ WARNINGCFLAGS="$WARNINGCFLAGS -Werror"
+])
+AC_SUBST(WARNINGCFLAGS)
+
+CPPFLAGS="-I\$(top_srcdir) -I\$(top_srcdir)/include $CPPFLAGS"
+
+AC_ARG_ENABLE([apps],
+ [AS_HELP_STRING([--disable-apps],
+ [disable building the jtag and bsdl2jtag main programs])],,
+ [enable_apps=yes])
+
+AS_IF([test "x$enable_apps" = xyes], [
+ AM_CONDITIONAL(ENABLE_APPS, true)
+ AC_DEFINE(ENABLE_APPS, 1, [define if you want to build the jtag and bsdl2jtag main programs])
+],[
+ AM_CONDITIONAL(ENABLE_APPS, false)
+])
+
+
+# check for lex/flex
+AC_PROG_LEX
+# check for modern version of flex
+AC_PROG_AWK
+AC_PROG_SED
+
+AS_IF([test "$LEX" = flex], [
+ ver_ge_ver () {
+ v1=$1
+ v2=$2
+ v3=$3
+ ref_v1=$4
+ ref_v2=$5
+ ref_v3=$6
+
+ AS_IF([test -n "$v1" -a "$v1" -gt "$ref_v1"], [
+ return 0
+ ])
+ AS_IF([test -n "$v1" -a "$v1" -eq "$ref_v1"], [
+ AS_IF([test "$v2" -gt "$ref_v2"], [
+ return 0
+ ])
+ AS_IF([test "$v2" -eq "$ref_v2"], [
+ AS_IF([test "$v3" -ge "$ref_v3"], [
+ return 0
+ ])
+ ])
+ ])
+
+ return 1
+ }
+
+ flex_version=`$LEX --version | $AWK '{print $2}'`
+ AS_IF([test "$flex_version" = "version"], [
+ flex_version=`$LEX --version | $AWK '{print $3}'`
+ ])
+
+ flex_v1=`echo $flex_version | $AWK -F . '{print $1}' | $SED -e 's/[a-zA-Z]//g'`
+ flex_v2=`echo $flex_version | $AWK -F . '{print $2}' | $SED -e 's/[a-zA-Z]//g'`
+ flex_v3=`echo $flex_version | $AWK -F . '{print $3}' | $SED -e 's/[a-zA-Z]//g'`
+
+ # svf and bsdl lexer require flex >= 2.5.33
+ flex_ref_v1=2
+ flex_ref_v2=5
+ flex_ref_v3=33
+ flex_ref_version="$flex_ref_v1.$flex_ref_v2.$flex_ref_v3"
+ AC_MSG_CHECKING([for flex >= $flex_ref_version, required for SVF and BSDL lexer])
+ #
+ AS_IF([ver_ge_ver $flex_v1 $flex_v2 $flex_v3 $flex_ref_v1 $flex_ref_v2 $flex_ref_v3], [
+ AC_MSG_RESULT([yes - flex $flex_version])
+ svf_lexer=true
+ bsdl_lexer=true
+ ], [
+ AC_MSG_RESULT([no - flex $flex_version])
+ svf_lexer=false
+ bsdl_lexer=false
+ ])
+], [
+ svf_lexer=false
+ bsdl_lexer=false
+])
+
+
+dnl If the transformed svf_flex.c is already existing, it doesn't matter
+dnl that flex is too old for building the lexer.
+AS_IF([test "x$svf_lexer" = xfalse], [
+ AS_IF([test -r src/svf/svf_flex.c], [
+ svf_lexer=true
+ ])
+])
+
+dnl Enable SVF player?
+AC_ARG_ENABLE(svf,
+[AS_HELP_STRING([--disable-svf], [Disable SVF player])],
+[case "${enableval}" in
+ yes) svf=true ;;
+ no) svf=false ;;
+ *) AC_MSG_ERROR(bad value ${enableval} for --enable-svf) ;;
+ esac],
+[svf=$svf_lexer])
+AS_IF([test "x$svf" = xtrue], [
+ AM_CONDITIONAL(ENABLE_SVF, true)
+ AC_DEFINE(ENABLE_SVF, 1, [define if SVF player is enabled])
+],[
+ AM_CONDITIONAL(ENABLE_SVF, false)
+])
+
+
+dnl If the transformed bsdl_flex.c is already existing, it doesn't matter
+dnl that flex is too old for building the lexer.
+AS_IF([test "x$bsdl_lexer" = xfalse], [
+ AS_IF([test -r src/bsdl/bsdl_flex.c], [
+ bsdl_lexer=true
+ ])
+])
+
+dnl Enable BSDL subsystem?
+AC_ARG_ENABLE(bsdl,
+[AS_HELP_STRING([--disable-bsdl], [Disable BSDL subsystem])],
+[case "${enableval}" in
+ yes) bsdl=true ;;
+ no) bsdl=false ;;
+ *) AC_MSG_ERROR(bad value ${enableval} for --enable-bsdl) ;;
+ esac],
+[bsdl=$bsdl_lexer])
+AS_IF([test "x$bsdl" = xtrue], [
+ AM_CONDITIONAL(ENABLE_BSDL, true)
+ AC_DEFINE(ENABLE_BSDL, 1, [define if BSDL subsystem is enabled])
+],[
+ AM_CONDITIONAL(ENABLE_BSDL, false)
+])
+
+dnl Enable experimental brute-force JEDEC flash autodetection?
+AC_ARG_ENABLE(jedec-exp,
+[AS_HELP_STRING([--enable-jedec-exp], [Enable experimental JEDEC flash detection])],
+[case "${enableval}" in
+ yes) jedecexp=true ;;
+ no) jedecexp=false ;;
+ *) AC_MSG_ERROR(bad value ${enableval} for --enable-jedec-exp) ;;
+ esac],
+[jedecexp=false])
+AS_IF([test "x$jedecexp" = xtrue], [
+ AM_CONDITIONAL(JEDEC_EXP, true)
+ AC_DEFINE(JEDEC_EXP, 1, [define if experimental JEDEC flash detection is enabled])
+],[
+ AM_CONDITIONAL(JEDEC_EXP, false)
+])
+
+
+# Macro for driver include check
+AC_DEFUN([CHECK_DRIVER], [
+ AS_IF([echo "$1" | $GREP -q $3], [
+ AC_DEFINE([$4], 1, [define if $3 is enabled])
+ AM_CONDITIONAL([$4], true)
+ $2="${$2}$3 "
+ ], [
+ AM_CONDITIONAL([$4], false)
+ ])
+])
+
+
+# Enable bus drivers
+AC_DEFUN([DEF_ENABLE_BUSDRIVERS], [\
+au1500 avr32 bcm1250 bf526_ezkit bf527_ezkit bf533_stamp bf533_ezkit bf537_stamp bf537_ezkit bf538f_ezkit bf548_ezkit bf561_ezkit bscoach ejtag ejtag_dma\
+fjmem ixp425 ixp435 jopcyc h7202 lh7a400 mpc5200 mpc824x ppc405ep ppc440gx_ebc8 prototype pxa2x0 pxa27x \
+s3c4510 sa1110 sh7727 sh7750r sh7751r sharc_21065L slsup3 tx4925 zefant_xs3])
+AC_ARG_ENABLE(bus,
+[AS_HELP_STRING([--enable-bus], [Enable default set or specific bus drivers:])]
+[AS_HELP_STRING([], ['default' enables:])]
+[AS_HELP_STRING([],DEF_ENABLE_BUSDRIVERS)]
+,
+[AS_CASE([${enableval}],
+ [yes], [busdrivers=default],
+ [no], [busdrivers=none],
+ [none], [busdrivers=none],
+ [busdrivers=`echo ${enableval} | $SED -e 's/,/ /g'`])],
+[busdrivers=default])
+# expand 'default' to default enabled busdrivers
+busdrivers=`echo ${busdrivers} | $SED -e "s/default/DEF_ENABLE_BUSDRIVERS/"`
+#
+enabled_bus_drivers=''
+CHECK_DRIVER([$busdrivers], [enabled_bus_drivers], [au1500], [ENABLE_BUS_AU1500])
+CHECK_DRIVER([$busdrivers], [enabled_bus_drivers], [avr32], [ENABLE_BUS_AVR32])
+CHECK_DRIVER([$busdrivers], [enabled_bus_drivers], [bcm1250], [ENABLE_BUS_BCM1250])
+CHECK_DRIVER([$busdrivers], [enabled_bus_drivers], [bf526_ezkit], [ENABLE_BUS_BF526_EZKIT])
+CHECK_DRIVER([$busdrivers], [enabled_bus_drivers], [bf527_ezkit], [ENABLE_BUS_BF527_EZKIT])
+CHECK_DRIVER([$busdrivers], [enabled_bus_drivers], [bf533_stamp], [ENABLE_BUS_BF533_STAMP])
+CHECK_DRIVER([$busdrivers], [enabled_bus_drivers], [bf533_ezkit], [ENABLE_BUS_BF533_EZKIT])
+CHECK_DRIVER([$busdrivers], [enabled_bus_drivers], [bf537_stamp], [ENABLE_BUS_BF537_STAMP])
+CHECK_DRIVER([$busdrivers], [enabled_bus_drivers], [bf537_ezkit], [ENABLE_BUS_BF537_EZKIT])
+CHECK_DRIVER([$busdrivers], [enabled_bus_drivers], [bf538f_ezkit], [ENABLE_BUS_BF538F_EZKIT])
+CHECK_DRIVER([$busdrivers], [enabled_bus_drivers], [bf548_ezkit], [ENABLE_BUS_BF548_EZKIT])
+CHECK_DRIVER([$busdrivers], [enabled_bus_drivers], [bf561_ezkit], [ENABLE_BUS_BF561_EZKIT])
+CHECK_DRIVER([$busdrivers], [enabled_bus_drivers], [bscoach], [ENABLE_BUS_BSCOACH])
+CHECK_DRIVER([$busdrivers], [enabled_bus_drivers], [ejtag], [ENABLE_BUS_EJTAG])
+CHECK_DRIVER([$busdrivers], [enabled_bus_drivers], [ejtag_dma], [ENABLE_BUS_EJTAG_DMA])
+CHECK_DRIVER([$busdrivers], [enabled_bus_drivers], [fjmem], [ENABLE_BUS_FJMEM])
+CHECK_DRIVER([$busdrivers], [enabled_bus_drivers], [ixp425], [ENABLE_BUS_IXP425])
+CHECK_DRIVER([$busdrivers], [enabled_bus_drivers], [ixp435], [ENABLE_BUS_IXP435])
+CHECK_DRIVER([$busdrivers], [enabled_bus_drivers], [jopcyc], [ENABLE_BUS_JOPCYC])
+CHECK_DRIVER([$busdrivers], [enabled_bus_drivers], [h7202], [ENABLE_BUS_H7202])
+CHECK_DRIVER([$busdrivers], [enabled_bus_drivers], [lh7a400], [ENABLE_BUS_LH7A400])
+CHECK_DRIVER([$busdrivers], [enabled_bus_drivers], [mpc5200], [ENABLE_BUS_MPC5200])
+CHECK_DRIVER([$busdrivers], [enabled_bus_drivers], [mpc824x], [ENABLE_BUS_MPC824X])
+CHECK_DRIVER([$busdrivers], [enabled_bus_drivers], [ppc405ep], [ENABLE_BUS_PPC405EP])
+CHECK_DRIVER([$busdrivers], [enabled_bus_drivers], [ppc440gx_ebc8], [ENABLE_BUS_PPC440GX_EBC8])
+CHECK_DRIVER([$busdrivers], [enabled_bus_drivers], [prototype], [ENABLE_BUS_PROTOTYPE])
+CHECK_DRIVER([$busdrivers], [enabled_bus_drivers], [pxa2x0], [ENABLE_BUS_PXA2X0])
+CHECK_DRIVER([$busdrivers], [enabled_bus_drivers], [pxa27x], [ENABLE_BUS_PXA27X])
+CHECK_DRIVER([$busdrivers], [enabled_bus_drivers], [s3c4510], [ENABLE_BUS_S3C4510])
+CHECK_DRIVER([$busdrivers], [enabled_bus_drivers], [sa1110], [ENABLE_BUS_SA1110])
+CHECK_DRIVER([$busdrivers], [enabled_bus_drivers], [sh7727], [ENABLE_BUS_SH7727])
+CHECK_DRIVER([$busdrivers], [enabled_bus_drivers], [sh7750r], [ENABLE_BUS_SH7750R])
+CHECK_DRIVER([$busdrivers], [enabled_bus_drivers], [sh7751r], [ENABLE_BUS_SH7751R])
+CHECK_DRIVER([$busdrivers], [enabled_bus_drivers], [sharc_21065L], [ENABLE_BUS_SHARC_21065L])
+CHECK_DRIVER([$busdrivers], [enabled_bus_drivers], [slsup3], [ENABLE_BUS_SLSUP3])
+CHECK_DRIVER([$busdrivers], [enabled_bus_drivers], [tx4925], [ENABLE_BUS_TX4925])
+CHECK_DRIVER([$busdrivers], [enabled_bus_drivers], [zefant_xs3], [ENABLE_BUS_ZEFANT_XS3])
+
+# Enable cable drivers
+AC_DEFUN([DEF_ENABLE_CABLEDRIVERS], [\
+arcom byteblaster dlc5 ea253 ei012 ft2232 igloo jlink keithkoep lattice mpcbdm triton usbblaster wiggler xpc])
+AC_DEFUN([DEF_DISABLE_CABLEDRIVERS], [ep9307 jim ts7800])
+AC_ARG_ENABLE(cable,
+[AS_HELP_STRING([--enable-cable], [Enable default set or specific cable drivers.])]
+[AS_HELP_STRING([], ['default' enables:])]
+[AS_HELP_STRING([],DEF_ENABLE_CABLEDRIVERS)]
+[AS_HELP_STRING([], [Disabled by default are:])]
+[AS_HELP_STRING([],DEF_DISABLE_CABLEDRIVERS)]
+,
+[AS_CASE([${enableval}],
+ [yes], [cabledrivers=default],
+ [no], [cabledrivers=none],
+ [none], [cabledrivers=none],
+ [cabledrivers=`echo ${enableval} | $SED -e 's/,/ /g'`])],
+[cabledrivers=default])
+# expand 'default' to default enabled cabledrivers
+cabledrivers=`echo ${cabledrivers} | $SED -e "s/default/DEF_ENABLE_CABLEDRIVERS/"`
+# automatically disable cable drivers when a required feature is not available
+AS_IF([test "x$HAVELIBFTDI" != "xyes" -a "x$HAVELIBFTD2XX" != "xyes"], [
+ cabledrivers=`echo ${cabledrivers} | $SED -e "s/ft2232//" -e "s/usbblaster//"`
+])
+AS_IF([test "x$HAVELIBUSB" != "xyes"], [
+ cabledrivers=`echo ${cabledrivers} | $SED -e "s/jlink//" -e "s/xpc//"`
+])
+#
+enabled_cable_drivers=''
+CHECK_DRIVER([$cabledrivers], [enabled_cable_drivers], [arcom], [ENABLE_CABLE_ARCOM])
+CHECK_DRIVER([$cabledrivers], [enabled_cable_drivers], [byteblaster], [ENABLE_CABLE_BYTEBLASTER])
+CHECK_DRIVER([$cabledrivers], [enabled_cable_drivers], [dlc5], [ENABLE_CABLE_DLC5])
+CHECK_DRIVER([$cabledrivers], [enabled_cable_drivers], [ea253], [ENABLE_CABLE_EA253])
+CHECK_DRIVER([$cabledrivers], [enabled_cable_drivers], [ei012], [ENABLE_CABLE_EI012])
+CHECK_DRIVER([$cabledrivers], [enabled_cable_drivers], [ep9307], [ENABLE_CABLE_EP9307])
+CHECK_DRIVER([$cabledrivers], [enabled_cable_drivers], [ft2232], [ENABLE_CABLE_FT2232])
+CHECK_DRIVER([$cabledrivers], [enabled_cable_drivers], [igloo], [ENABLE_CABLE_IGLOO])
+CHECK_DRIVER([$cabledrivers], [enabled_cable_drivers], [jim], [ENABLE_JIM])
+CHECK_DRIVER([$cabledrivers], [enabled_cable_drivers], [jlink], [ENABLE_CABLE_JLINK])
+CHECK_DRIVER([$cabledrivers], [enabled_cable_drivers], [keithkoep], [ENABLE_CABLE_KEITHKOEP])
+CHECK_DRIVER([$cabledrivers], [enabled_cable_drivers], [lattice], [ENABLE_CABLE_LATTICE])
+CHECK_DRIVER([$cabledrivers], [enabled_cable_drivers], [mpcbdm], [ENABLE_CABLE_MPCBDM])
+CHECK_DRIVER([$cabledrivers], [enabled_cable_drivers], [triton], [ENABLE_CABLE_TRITON])
+CHECK_DRIVER([$cabledrivers], [enabled_cable_drivers], [usbblaster], [ENABLE_CABLE_USBBLASTER])
+CHECK_DRIVER([$cabledrivers], [enabled_cable_drivers], [wiggler], [ENABLE_CABLE_WIGGLER])
+CHECK_DRIVER([$cabledrivers], [enabled_cable_drivers], [xpc], [ENABLE_CABLE_XPC])
+CHECK_DRIVER([$cabledrivers], [enabled_cable_drivers], [ts7800], [ENABLE_CABLE_TS7800])
+
+
+# Enable lowlevel drivers
+AC_DEFUN([DEF_ENABLE_LOWLEVELDRIVERS], [\
+direct ftdi ftd2xx ppdev ppi])
+AC_ARG_ENABLE(lowlevel,
+[AS_HELP_STRING([--enable-lowlevel], [Enable default set or specific lowlevel drivers:])]
+[AS_HELP_STRING([], ['default' enables:])]
+[AS_HELP_STRING([],DEF_ENABLE_LOWLEVELDRIVERS)]
+,
+[AS_CASE([${enableval}],
+ [yes], [lowleveldrivers=default],
+ [no], [lowleveldrivers=none],
+ [none], [lowleveldrivers=none],
+ [lowleveldrivers=`echo ${enableval} | $SED -e 's/,/ /g'`])],
+[lowleveldrivers=default])
+# expand 'default' to default enabled lowlevel drivers
+lowleveldrivers=`echo ${lowleveldrivers} | $SED -e "s/default/DEF_ENABLE_LOWLEVELDRIVERS/"`
+# automatically disable lowlevel drivers when a required feature is not available
+AS_IF([test "x$HAVELIBFTDI" != "xyes"], [
+ lowleveldrivers=`echo ${lowleveldrivers} | $SED -e "s/ftdi//"`
+])
+AS_IF([test "x$HAVELIBFTD2XX" != "xyes"], [
+ lowleveldrivers=`echo ${lowleveldrivers} | $SED -e "s/ftd2xx//"`
+])
+AS_IF([test "x$HAVE_LINUX_PPDEV_H" != "xyes"], [
+ lowleveldrivers=`echo ${lowleveldrivers} | $SED -e "s/ppdev//"`
+])
+AS_IF([test "x$HAVE_DEV_PPBUS_PPI_H" != "xyes"], [
+ lowleveldrivers=`echo ${lowleveldrivers} | $SED -e "s/ppi//"`
+])
+AS_IF([test "x$HAVE_IOPERM" != "xyes" -a "x$HAVE_I386_SET_IOPERM" != "xyes" -a "x$HAVE_INPOUTXX" != "xyes" ], [
+ lowleveldrivers=`echo ${lowleveldrivers} | $SED -e "s/direct//"`
+])
+#
+enabled_lowlevel_drivers=''
+CHECK_DRIVER([$lowleveldrivers], [enabled_lowlevel_drivers], [direct], [ENABLE_LOWLEVEL_DIRECT])
+CHECK_DRIVER([$lowleveldrivers], [enabled_lowlevel_drivers], [ftd2xx], [ENABLE_LOWLEVEL_FTD2XX])
+CHECK_DRIVER([$lowleveldrivers], [enabled_lowlevel_drivers], [ftdi], [ENABLE_LOWLEVEL_FTDI])
+CHECK_DRIVER([$lowleveldrivers], [enabled_lowlevel_drivers], [ppdev], [ENABLE_LOWLEVEL_PPDEV])
+CHECK_DRIVER([$lowleveldrivers], [enabled_lowlevel_drivers], [ppi], [ENABLE_LOWLEVEL_PPI])
+
+
+dnl Enable a relocatable jtag?
+AC_ARG_ENABLE(relocatable,
+[AS_HELP_STRING([--enable-relocatable], [Enable relocatable paths])],
+[relocatable=$enableval], [relocatable=no])
+AS_IF([test "x$relocatable" = xyes], [
+ AM_CONDITIONAL(JTAG_RELOCATABLE, true)
+ AC_DEFINE(JTAG_RELOCATABLE, 1, [define for relocatable paths])
+],[
+ AM_CONDITIONAL(JTAG_RELOCATABLE, false)
+])
+
+
+dnl Is fmax() provided by libm?
+AC_CHECK_LIB([m], [fmax], [
+ AC_DEFINE(HAVE_FMAX, 1, [Define if -lm provides fmax()])
+])
+
+
+dnl Enable use of DMALLOC library?
+AC_ARG_ENABLE(dmalloc,
+[AS_HELP_STRING([--enable-dmalloc], [Enable heap debugging with dmalloc library])],
+[dmalloc=$enableval], [dmalloc=no])
+AS_IF([test "x$dmalloc" = xyes], [
+ AM_CONDITIONAL(DMALLOC, true)
+ AC_DEFINE(DMALLOC, 1, [define for dmalloc library])
+],[
+ AM_CONDITIONAL(DMALLOC, false)
+])
+
+
+# Enable flash multi-byte write mode?
+AC_ARG_ENABLE(flash-multi-byte,
+[AS_HELP_STRING([--disable-flash-multi-byte], [Disable flash multi-byte write mode])],
+[flash_multi_byte=$enableval], [flash_multi_byte=yes])
+AS_IF([test "x$flash_multi_byte" = xyes], [
+ AC_DEFINE(FLASH_MULTI_BYTE, 1, [define for flash multi-byte write mode])
+])
+
+
+AC_OUTPUT
+
+dnl
+dnl Configuration summary
+dnl
+AS_IF([test ${HAVELIBFTDI:-no} != no], [
+ FLAG_HAVELIBFTDI=yes
+], [
+ FLAG_HAVELIBFTDI=no
+])
+AS_IF([test ${HAVELIBUSB:-no} != no], [
+ FLAG_HAVELIBUSB=yes
+], [
+ FLAG_HAVELIBUSB=no
+])
+AS_IF([test ${HAVELIBFTD2XX:-no} != no], [
+ FLAG_HAVELIBFTD2XX=yes
+], [
+ FLAG_HAVELIBFTD2XX=no
+])
+AS_IF([test ${HAVEINPOUTXX:-no} != no], [
+ FLAG_HAVEINPOUTXX=yes
+], [
+ FLAG_HAVEINPOUTXX=no
+])
+AS_IF([test ${svf:-false} != false], [
+ FLAG_SVF=yes
+], [
+ FLAG_SVF=no
+])
+AS_IF([test ${bsdl:-false} != false], [
+ FLAG_BSDL=yes
+], [
+ FLAG_BSDL=no
+])
+AC_MSG_NOTICE([
+
+jtag is now configured for
+
+ Detected libusb : $FLAG_HAVELIBUSB
+ Detected libftdi : $FLAG_HAVELIBFTDI
+ Detected libftd2xx : $FLAG_HAVELIBFTD2XX
+ Detected inpout32 : $FLAG_HAVEINPOUTXX
+ Build SVF player : $FLAG_SVF
+ Build BSDL subsystem : $FLAG_BSDL
+ Bus drivers : $enabled_bus_drivers
+ Cable drivers : $enabled_cable_drivers
+ Lowlevel drivers : $enabled_lowlevel_drivers
+])
--- /dev/null
+Makefile
+Makefile.in
--- /dev/null
+#
+# $Id$
+#
+# Manufacturer ID database
+# Copyright (C) 2002 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Marcel Telka <marcel@telka.sk>, 2002.
+#
+# Documentation:
+# [1] JEDEC Solid State Technology Association, "Standard Manufacturer's
+# Identification Code", September 2001, Order Number: JEP106-K
+#
+
+# bits 11-1 of the Device Identification Register
+00000000110 lexra Lexr
+00000000111 hitachi Hitachi
+00000001001 intel Intel
+00000001110 freescale Freescale (Motorola)
+00000010101 philips Philips Semi. (Signetics)
+00000010111 ti Texas Instruments
+00000011000 toshiba Toshiba
+00000011111 atmel Atmel
+00000100001 lattice Lattice Semiconductors
+00000100100 ibm IBM Semiconductors
+00000110100 cypress Cypress
+00000110101 dec DEC
+00001001001 xilinx Xilinx
+00001100101 analog Analog Devices
+00001101110 altera Altera
+00010101011 lattice Lattice Semiconductors
+00010111111 broadcom Broadcom
+00101010000 broadcom Broadcom # or "Sibyte, Incorporated" ?
+00101110000 brecis Brecis (PMC-Sierra)
+00111101001 marvell Marvell
+00110101011 marvell Marvell
+# collides with other ARM-based chips
+#11110000111 arm ARM
--- /dev/null
+#
+# $Id$
+#
+# Copyright (C) 2002 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Marcel Telka <marcel@telka.sk>, 2002.
+#
+
+include $(top_srcdir)/Makefile.rules
+
+nobase_dist_pkgdata_DATA = \
+ MANUFACTURERS \
+ admtek/adm5120/adm5120 \
+ altera/PARTS \
+ altera/ep1c20f400/STEPPINGS \
+ altera/ep1c20f400/ep1c20f400 \
+ altera/ep1c6q240/STEPPINGS \
+ altera/ep1c6q240/ep1c6q240 \
+ altera/epm7128aetc100/STEPPINGS \
+ altera/epm7128aetc100/epm7128aetc100 \
+ altera/ep1c12/STEPPINGS \
+ altera/ep1c12/ep1c12 \
+ altera/ep1c12/f256 \
+ altera/ep1c12/f324 \
+ altera/ep1c12/q240 \
+ altera/ep2c8/STEPPINGS \
+ altera/ep2c8/ep2c8 \
+ altera/ep2c8/f256 \
+ altera/ep2c8/q208 \
+ altera/ep2c8/t144 \
+ altera/epm3064a/STEPPINGS \
+ altera/epm3064a/epm3064a \
+ altera/epm3064a/l44 \
+ altera/epm3064a/t100 \
+ altera/epm3064a/t44 \
+ atheros/ar2312/ar2312 \
+ atmel/PARTS \
+ atmel/at32ap7000/STEPPINGS \
+ atmel/at32ap7000/at32ap7000 \
+ atmel/atmega128/STEPPINGS \
+ atmel/atmega128/atmega128 \
+ atmel/at91sam7s256/STEPPINGS \
+ atmel/at91sam7s256/at91sam7s_tq64v0 \
+ atmel/at91sam7s256/at91sam7s_tq48v0 \
+ atmel/atf15xx/STEPPINGS \
+ atmel/atf15xx/atf1504asv \
+ analog/PARTS \
+ analog/bf518/STEPPINGS \
+ analog/bf518/bf518 \
+ analog/bf527/STEPPINGS \
+ analog/bf527/bf527 \
+ analog/bf533/STEPPINGS \
+ analog/bf533/bf533 \
+ analog/bf537/STEPPINGS \
+ analog/bf537/bf537 \
+ analog/bf538/STEPPINGS \
+ analog/bf538/bf538 \
+ analog/bf548/STEPPINGS \
+ analog/bf548/bf548 \
+ analog/bf561/STEPPINGS \
+ analog/bf561/bf561 \
+ analog/PARTS \
+ analog/sharc21065l/STEPPINGS \
+ analog/sharc21065l/sharc21065l \
+ brecis/PARTS \
+ brecis/msp2006/STEPPINGS \
+ brecis/msp2006/msp2006 \
+ broadcom/PARTS \
+ broadcom/bcm1250/STEPPINGS \
+ broadcom/bcm1250/bcm1250 \
+ broadcom/bcm3310/STEPPINGS \
+ broadcom/bcm3310/bcm3310 \
+ broadcom/bcm4712/STEPPINGS \
+ broadcom/bcm4712/bcm4712 \
+ broadcom/bcm5421s/STEPPINGS \
+ broadcom/bcm5421s/bcm5421s \
+ broadcom/bcm6348/STEPPINGS \
+ broadcom/bcm6348/bcm6348 \
+ broadcom/bcm6358/STEPPINGS \
+ broadcom/bcm6358/bcm6358 \
+ bsdl/STD_1149_1_1990 \
+ bsdl/STD_1149_1_1994 \
+ bsdl/STD_1149_1_2001 \
+ bsdl/STD_1532_2001 \
+ bsdl/STD_1532_2002 \
+ dec/PARTS \
+ dec/sa1100/STEPPINGS \
+ dec/sa1100/sa1100 \
+ hitachi/PARTS \
+ hitachi/ar7300/STEPPINGS \
+ hitachi/ar7300/ar7300 \
+ hitachi/hd64465/hd64465 \
+ hitachi/sh7727/STEPPINGS \
+ hitachi/sh7727/sh7727 \
+ hitachi/sh7729/STEPPINGS \
+ hitachi/sh7729/sh7729 \
+ freescale/PARTS \
+ freescale/mpc5200/STEPPINGS \
+ freescale/mpc5200/mpc5200 \
+ ibm/PARTS \
+ ibm/ppc440gx/STEPPINGS \
+ ibm/ppc440gx/ppc440gx \
+ ibm/ppc405ep/STEPPINGS \
+ ibm/ppc405ep/ppc405ep \
+ intel/PARTS \
+ intel/pxa250/STEPPINGS \
+ intel/pxa250/pxa250 \
+ intel/pxa250/pxa250c0 \
+ intel/pxa270/STEPPINGS \
+ intel/pxa270/pxa270 \
+ intel/sa1110/STEPPINGS \
+ intel/sa1110/sa1110 \
+ intel/ixp425/STEPPINGS \
+ intel/ixp425/ixp425 \
+ lattice/PARTS \
+ lattice/lc4032v-tqfp48/STEPPINGS \
+ lattice/lc4032v-tqfp48/lc4032v-tqfp48 \
+ lattice/lc4064zc/STEPPINGS \
+ lattice/lc4064zc/lc4064zc \
+ lattice/lc4128c-tqfp100/STEPPINGS \
+ lattice/lc4128c-tqfp100/lc4128c-tqfp100 \
+ lattice/lfec2-12e/STEPPINGS \
+ lattice/lfec2-12e/lfec2-12e \
+ lattice/m4a3-256.192-fpbga256/STEPPINGS \
+ lattice/m4a3-256.192-fpbga256/m4a3-256.192-fpbga256 \
+ lattice/m4a3-64.32-tqfp48/STEPPINGS \
+ lattice/m4a3-64.32-tqfp48/m4a3-64.32-tqfp48 \
+ lexra/PARTS \
+ lexra/lx5280/STEPPINGS \
+ lexra/lx5280/lx5280 \
+ marvell/PARTS \
+ marvell/88e1118/STEPPINGS \
+ marvell/88e1118/88e1118 \
+ marvell/88f5182/STEPPINGS \
+ marvell/88f5182/88f5182-a2 \
+ motorola/mpc8241/1.2 \
+ motorola/mpc8245/1.2 \
+ philips/PARTS \
+ philips/xcr3128xl-cs144/STEPPINGS \
+ philips/xcr3128xl-cs144/xcr3128xl-cs144 \
+ philips/xcr3128xl-vq100/STEPPINGS \
+ philips/xcr3128xl-vq100/xcr3128xl-vq100 \
+ samsung/s3c4510b/s3c4510b \
+ sharp/PARTS \
+ sharp/lh7a400/STEPPINGS \
+ sharp/lh7a400/lh7a400 \
+ sigma/PARTS \
+ sigma/smp8634/STEPPINGS \
+ sigma/smp8634/smp8634 \
+ ti/PARTS \
+ ti/tnetv1060/STEPPINGS \
+ ti/tnetv1060/tnetv1060 \
+ ti/tnetv1061/STEPPINGS \
+ ti/tnetv1061/tnetv1061 \
+ toshiba/PARTS \
+ toshiba/tx4925/STEPPINGS \
+ toshiba/tx4925/tx4925 \
+ toshiba/tx4926/STEPPINGS \
+ toshiba/tx4926/tx4926 \
+ xilinx/PARTS \
+ xilinx/xc18v04pc44/xc18v04pc44 \
+ xilinx/xc18v04pc44/STEPPINGS \
+ xilinx/xc2c256-tq144/STEPPINGS \
+ xilinx/xc2c256-tq144/xc2c256-tq144 \
+ xilinx/xc2c256-vq100/STEPPINGS \
+ xilinx/xc2c256-vq100/xc2c256-vq100 \
+ xilinx/xc2c64a-vq44/STEPPINGS \
+ xilinx/xc2c64a-vq44/xc2c64a-vq44 \
+ xilinx/xc2s200e-pq208/STEPPINGS \
+ xilinx/xc2s200e-pq208/xc2s200e-pq208 \
+ xilinx/xc2s300e/STEPPINGS \
+ xilinx/xc2s300e/xc2s300e \
+ xilinx/xc2v80-fg256/STEPPINGS \
+ xilinx/xc2v80-fg256/xc2v80-fg256 \
+ xilinx/xc2v250-fg256/STEPPINGS \
+ xilinx/xc2v250-fg256/xc2v250-fg256 \
+ xilinx/xc2v1000-fg256/STEPPINGS \
+ xilinx/xc2v1000-fg256/xc2v1000-fg256 \
+ xilinx/xc2s300e/pq208 \
+ xilinx/xc2s300e/ft256 \
+ xilinx/xc2s300e/fg456 \
+ xilinx/xc3s1000/fg676 \
+ xilinx/xc3s1000/xc3s1000 \
+ xilinx/xc3s1000/fg320 \
+ xilinx/xc3s1000/ft256 \
+ xilinx/xc3s1000/STEPPINGS \
+ xilinx/xc3s1000/fg456 \
+ xilinx/xc3s100e_die/xc3s100e_pq208 \
+ xilinx/xc3s100e_die/xc3s100e_tq144 \
+ xilinx/xc3s100e_die/xc3s100e_die \
+ xilinx/xc3s100e_die/STEPPINGS \
+ xilinx/xc3s100e_die/xc3s100e_vq100 \
+ xilinx/xc3s1500/xc3s1500_fg456 \
+ xilinx/xc3s1500/xc3s1500l_fg676 \
+ xilinx/xc3s1500/xc3s1500l \
+ xilinx/xc3s1500/xc3s1500l_fg320 \
+ xilinx/xc3s1500/xc3s1500_fg676 \
+ xilinx/xc3s1500/xc3s1500 \
+ xilinx/xc3s1500/xc3s1500_fg320 \
+ xilinx/xc3s1500/STEPPINGS \
+ xilinx/xc3s1500/xc3s1500l_fg456 \
+ xilinx/xc3s200/xc3s200_tq144 \
+ xilinx/xc3s200/xc3s200 \
+ xilinx/xc3s200/xc3s200_ft256 \
+ xilinx/xc3s200/xc3s200_vq100 \
+ xilinx/xc3s200/STEPPINGS \
+ xilinx/xc3s200/xc3s200_pq208 \
+ xilinx/xc3s2000/xc3s2000_fg676 \
+ xilinx/xc3s2000/xc3s2000 \
+ xilinx/xc3s2000/xc3s2000l_fg900 \
+ xilinx/xc3s2000/xc3s2000_fg900 \
+ xilinx/xc3s2000/STEPPINGS \
+ xilinx/xc3s2000/xc3s2000_fg456 \
+ xilinx/xc3s2000/xc3s2000l_fg676 \
+ xilinx/xc3s2000/xc3s2000l \
+ xilinx/xc3s400/xc3s400_fg456 \
+ xilinx/xc3s400/xc3s400_tq144 \
+ xilinx/xc3s400/xc3s400 \
+ xilinx/xc3s400/xc3s400_fg320 \
+ xilinx/xc3s400/xc3s400_ft256 \
+ xilinx/xc3s400/STEPPINGS \
+ xilinx/xc3s400/xc3s400_pq208 \
+ xilinx/xc3s4000/xc3s4000l \
+ xilinx/xc3s4000/xc3s4000_fg676 \
+ xilinx/xc3s4000/xc3s4000 \
+ xilinx/xc3s4000/xc3s4000l_fg900 \
+ xilinx/xc3s4000/xc3s4000_fg900 \
+ xilinx/xc3s4000/xc3s4000l_fg1156 \
+ xilinx/xc3s4000/STEPPINGS \
+ xilinx/xc3s4000/xc3s4000_fg1156 \
+ xilinx/xc3s50/xc3s50_pq208 \
+ xilinx/xc3s50/xc3s50_tq144 \
+ xilinx/xc3s50/xc3s50 \
+ xilinx/xc3s50/STEPPINGS \
+ xilinx/xc3s50/xc3s50_vq100 \
+ xilinx/xc3s50/xc3s50_cp132 \
+ xilinx/xc3s5000/xc3s5000 \
+ xilinx/xc3s5000/xc3s5000_fg900 \
+ xilinx/xc3s5000/STEPPINGS \
+ xilinx/xc3s5000/xc3s5000_fg1156 \
+ xilinx/xc3s500e_fg320/xc3s500e_ft256 \
+ xilinx/xc3s500e_fg320/xc3s500e_pq208 \
+ xilinx/xc3s500e_fg320/xc3s500e_fg320 \
+ xilinx/xc3s500e_fg320/STEPPINGS \
+ xilinx/xc9572xl_vq44/xc9572xl_vq44 \
+ xilinx/xc9572xl_vq44/STEPPINGS \
+ xilinx/xcf04s/xcf04s \
+ xilinx/xcf04s/STEPPINGS \
+ xilinx/xcr3032xl-vq44/STEPPINGS \
+ xilinx/xcr3032xl-vq44/xcr3032xl-vq44 \
+ xilinx/xcr3128xl-cs144/STEPPINGS \
+ xilinx/xcr3128xl-cs144/xcr3128xl-cs144 \
+ xilinx/xcr3128xl-vq100/xcr3128xl-vq100 \
+ xilinx/xcr3256xl-ft256/STEPPINGS \
+ xilinx/xcr3256xl-ft256/xcr3256xl-ft256
--- /dev/null
+#
+# $Id$
+#
+# JTAG declarations for ADMtek/Infineon ADM5120
+# Copyright (C) 2005 Marek Michalkiewicz
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Marek Michalkiewicz <marekm@amelek.gda.pl>, 2005.
+#
+
+register BR 1
+register BSR 1
+register DIR 32
+register EJIMPCODE 32
+register EJADDRESS 32
+register EJDATA 32
+register EJCONTROL 32
+register EJALL 96
+register EJFASTDATA 33
+
+instruction length 5
+
+instruction BYPASS 11111 BR
+instruction SAMPLE/PRELOAD 00010 BSR
+instruction IDCODE 00001 DIR
+instruction EJTAG_IMPCODE 00011 EJIMPCODE
+instruction EJTAG_ADDRESS 01000 EJADDRESS
+instruction EJTAG_DATA 01001 EJDATA
+instruction EJTAG_CONTROL 01010 EJCONTROL
+instruction EJTAG_ALL 01011 EJALL
+instruction EJTAGBOOT 01100 BR
+instruction NORMALBOOT 01101 BR
+instruction EJTAG_FASTDATA 01110 EJFASTDATA
+
+initbus ejtag
+endian little
--- /dev/null
+#
+# $Id$
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Rojhalat Ibrahim <ibrahim@schenk.isar.de>
+#
+
+# bits 27-12 of the Device Identification Register
+0010000010000010 ep1c6q240 EP1C6Q240
+0010000010000011 ep1c12 EP1C12
+0010000010000100 ep1c20f400 EP1C20F400
+0111000100101000 epm7128aetc100 EPM7128AETC100
+0111000001100100 epm3064a EPM3064A
+0010000010110010 ep2c8 EP2C8
--- /dev/null
+#
+# $Id$
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Arnim Laeuger <arniml@users.sourceforge.net>
+#
+
+# bits 31-28 of the Device Identification Register
+0000 ep1c12 0
--- /dev/null
+#
+# $Id$
+#
+# JTAG declarations for EP1C12
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Arnim Laeuger <arniml@users.sourceforge.net>
+#
+# Note:
+# The signals defined in this file are generic for any EP1C12.
+# Signalnames according to Altera's package tables are set in the
+# package specific scripts.
+#
+# **Testing Differential Pin Pairs**
+# Refer to the note in the original bsd-files for issues related to
+# testing differential pin pairs!
+#
+
+register BYPASS 1
+register BSR 774
+register IOCSR 4454
+register DEVICE_ID 32
+register USERCODE 32
+
+instruction length 10
+instruction BYPASS 1111111111 BYPASS
+instruction IDCODE 0000000110 DEVICE_ID
+instruction USERCODE 0000000111 USERCODE
+instruction CLAMP 0000001010 BYPASS
+instruction SAMPLE/PRELOAD 0000000101 BSR
+instruction EXTEST 0000000000 BSR
+instruction CONFIG_IO 0000001101 IOCSR
+instruction HIGHZ 0000001011 BYPASS
+
+signal BSC0
+signal BSC1
+signal BSC10
+signal BSC100
+signal BSC101
+signal BSC102
+signal BSC103
+signal BSC104
+signal BSC105
+signal BSC106
+signal BSC107
+signal BSC108
+signal BSC109
+signal BSC11
+signal BSC110
+signal BSC111
+signal BSC112
+signal BSC113
+signal BSC114
+signal BSC115
+signal BSC116
+signal BSC117
+signal BSC118
+signal BSC119
+signal BSC12
+signal BSC120
+signal BSC121
+signal BSC122
+signal BSC123
+signal BSC124
+signal BSC125
+signal BSC126
+signal BSC127
+signal BSC128
+signal BSC129
+signal BSC13
+signal BSC130
+signal BSC131
+signal BSC132
+signal BSC133
+signal BSC134
+signal BSC135
+signal BSC136
+signal BSC137
+signal BSC138
+signal BSC139
+signal BSC14
+signal BSC140
+signal BSC141
+signal BSC142
+signal BSC143
+signal BSC144
+signal BSC145
+signal BSC146
+signal BSC147
+signal BSC148
+signal BSC149
+signal BSC15
+signal BSC150
+signal BSC151
+signal BSC152
+signal BSC153
+signal BSC154
+signal BSC155
+signal BSC156
+signal BSC157
+signal BSC158
+signal BSC159
+signal BSC16
+signal BSC160
+signal BSC161
+signal BSC162
+signal BSC163
+signal BSC164
+signal BSC165
+signal BSC166
+signal BSC167
+signal BSC168
+signal BSC169
+signal BSC17
+signal BSC170
+signal BSC171
+signal BSC172
+signal BSC173
+signal BSC174
+signal BSC175
+signal BSC176
+signal BSC177
+signal BSC178
+signal BSC179
+signal BSC18
+signal BSC180
+signal BSC181
+signal BSC182
+signal BSC183
+signal BSC184
+signal BSC185
+signal BSC186
+signal BSC187
+signal BSC188
+signal BSC189
+signal BSC19
+signal BSC190
+signal BSC191
+signal BSC192
+signal BSC193
+signal BSC194
+signal BSC195
+signal BSC196
+signal BSC197
+signal BSC198
+signal BSC199
+signal BSC2
+signal BSC20
+signal BSC200
+signal BSC201
+signal BSC202
+signal BSC203
+signal BSC204
+signal BSC205
+signal BSC206
+signal BSC207
+signal BSC208
+signal BSC209
+signal BSC21
+signal BSC210
+signal BSC211
+signal BSC212
+signal BSC213
+signal BSC214
+signal BSC215
+signal BSC216
+signal BSC217
+signal BSC218
+signal BSC22
+signal BSC228
+signal BSC229
+signal BSC23
+signal BSC230
+signal BSC231
+signal BSC232
+signal BSC233
+signal BSC234
+signal BSC235
+signal BSC236
+signal BSC237
+signal BSC238
+signal BSC239
+signal BSC24
+signal BSC240
+signal BSC241
+signal BSC242
+signal BSC243
+signal BSC244
+signal BSC245
+signal BSC246
+signal BSC247
+signal BSC248
+signal BSC249
+signal BSC25
+signal BSC250
+signal BSC251
+signal BSC252
+signal BSC253
+signal BSC254
+signal BSC255
+signal BSC256
+signal BSC257
+signal BSC26
+signal BSC27
+signal BSC28
+signal BSC29
+signal BSC3
+signal BSC30
+signal BSC31
+signal BSC32
+signal BSC33
+signal BSC34
+signal BSC35
+signal BSC36
+signal BSC37
+signal BSC38
+signal BSC39
+signal BSC4
+signal BSC40
+signal BSC41
+signal BSC42
+signal BSC43
+signal BSC44
+signal BSC45
+signal BSC46
+signal BSC47
+signal BSC48
+signal BSC49
+signal BSC5
+signal BSC50
+signal BSC51
+signal BSC52
+signal BSC53
+signal BSC54
+signal BSC55
+signal BSC56
+signal BSC57
+signal BSC58
+signal BSC59
+signal BSC6
+signal BSC60
+signal BSC61
+signal BSC62
+signal BSC63
+signal BSC64
+signal BSC65
+signal BSC66
+signal BSC67
+signal BSC68
+signal BSC69
+signal BSC7
+signal BSC70
+signal BSC71
+signal BSC72
+signal BSC73
+signal BSC74
+signal BSC75
+signal BSC76
+signal BSC77
+signal BSC78
+signal BSC79
+signal BSC8
+signal BSC80
+signal BSC81
+signal BSC82
+signal BSC83
+signal BSC84
+signal BSC85
+signal BSC86
+signal BSC87
+signal BSC88
+signal BSC89
+signal BSC9
+signal BSC90
+signal BSC91
+signal BSC96
+signal BSC97
+signal BSC98
+signal BSC99
+signal CLK0
+signal CLK2
+signal DATA0
+signal DCLK
+signal MSEL0
+signal MSEL1
+
+bit 0 I ? BSC0
+bit 1 C 1 *
+bit 2 O ? BSC0 1 1 Z
+bit 3 I ? BSC1
+bit 4 C 1 *
+bit 5 O ? BSC1 4 1 Z
+bit 6 I ? BSC2
+bit 7 C 1 *
+bit 8 O ? BSC2 7 1 Z
+bit 9 I ? BSC3
+bit 10 C 1 *
+bit 11 O ? BSC3 10 1 Z
+bit 12 I ? BSC4
+bit 13 C 1 *
+bit 14 O ? BSC4 13 1 Z
+bit 15 I ? BSC5
+bit 16 C 1 *
+bit 17 O ? BSC5 16 1 Z
+bit 18 I ? BSC6
+bit 19 C 1 *
+bit 20 O ? BSC6 19 1 Z
+bit 21 I ? BSC7
+bit 22 C 1 *
+bit 23 O ? BSC7 22 1 Z
+bit 24 I ? BSC8
+bit 25 C 1 *
+bit 26 O ? BSC8 25 1 Z
+bit 27 I ? BSC9
+bit 28 C 1 *
+bit 29 O ? BSC9 28 1 Z
+bit 30 I ? BSC10
+bit 31 C 1 *
+bit 32 O ? BSC10 31 1 Z
+bit 33 I ? BSC11
+bit 34 C 1 *
+bit 35 O ? BSC11 34 1 Z
+bit 36 I ? BSC12
+bit 37 C 1 *
+bit 38 O ? BSC12 37 1 Z
+bit 39 I ? BSC13
+bit 40 C 1 *
+bit 41 O ? BSC13 40 1 Z
+bit 42 I ? BSC14
+bit 43 C 1 *
+bit 44 O ? BSC14 43 1 Z
+bit 45 I ? BSC15
+bit 46 C 1 *
+bit 47 O ? BSC15 46 1 Z
+bit 48 I ? BSC16
+bit 49 C 1 *
+bit 50 O ? BSC16 49 1 Z
+bit 51 I ? BSC17
+bit 52 C 1 *
+bit 53 O ? BSC17 52 1 Z
+bit 54 I ? BSC18
+bit 55 C 1 *
+bit 56 O ? BSC18 55 1 Z
+bit 57 I ? BSC19
+bit 58 C 1 *
+bit 59 O ? BSC19 58 1 Z
+bit 60 I ? BSC20
+bit 61 C 1 *
+bit 62 O ? BSC20 61 1 Z
+bit 63 I ? BSC21
+bit 64 C 1 *
+bit 65 O ? BSC21 64 1 Z
+bit 66 I ? BSC22
+bit 67 C 1 *
+bit 68 O ? BSC22 67 1 Z
+bit 69 I ? BSC23
+bit 70 C 1 *
+bit 71 O ? BSC23 70 1 Z
+bit 72 I ? BSC24
+bit 73 C 1 *
+bit 74 O ? BSC24 73 1 Z
+bit 75 I ? BSC25
+bit 76 C 1 *
+bit 77 O ? BSC25 76 1 Z
+bit 78 I ? BSC26
+bit 79 C 1 *
+bit 80 O ? BSC26 79 1 Z
+bit 81 I ? BSC27
+bit 82 C 1 *
+bit 83 O ? BSC27 82 1 Z
+bit 84 I ? BSC28
+bit 85 C 1 *
+bit 86 O ? BSC28 85 1 Z
+bit 87 I ? BSC29
+bit 88 C 1 *
+bit 89 O ? BSC29 88 1 Z
+bit 90 I ? BSC30
+bit 91 C 1 *
+bit 92 O ? BSC30 91 1 Z
+bit 93 I ? BSC31
+bit 94 C 1 *
+bit 95 O ? BSC31 94 1 Z
+bit 96 I ? BSC32
+bit 97 C 1 *
+bit 98 O ? BSC32 97 1 Z
+bit 99 I ? BSC33
+bit 100 C 1 *
+bit 101 O ? BSC33 100 1 Z
+bit 102 I ? BSC34
+bit 103 C 1 *
+bit 104 O ? BSC34 103 1 Z
+bit 105 I ? BSC35
+bit 106 C 1 *
+bit 107 O ? BSC35 106 1 Z
+bit 108 I ? BSC36
+bit 109 C 1 *
+bit 110 O ? BSC36 109 1 Z
+bit 111 I ? BSC37
+bit 112 C 1 *
+bit 113 O ? BSC37 112 1 Z
+bit 114 I ? BSC38
+bit 115 C 1 *
+bit 116 O ? BSC38 115 1 Z
+bit 117 I ? BSC39
+bit 118 C 1 *
+bit 119 O ? BSC39 118 1 Z
+bit 120 I ? BSC40
+bit 121 C 1 *
+bit 122 O ? BSC40 121 1 Z
+bit 123 I ? BSC41
+bit 124 C 1 *
+bit 125 O ? BSC41 124 1 Z
+bit 126 I ? BSC42
+bit 127 C 1 *
+bit 128 O ? BSC42 127 1 Z
+bit 129 I ? BSC43
+bit 130 C 1 *
+bit 131 O ? BSC43 130 1 Z
+bit 132 I ? BSC44
+bit 133 C 1 *
+bit 134 O ? BSC44 133 1 Z
+bit 135 I ? BSC45
+bit 136 C 1 *
+bit 137 O ? BSC45 136 1 Z
+bit 138 I ? BSC46
+bit 139 C 1 *
+bit 140 O ? BSC46 139 1 Z
+bit 141 I ? BSC47
+bit 142 C 1 *
+bit 143 O ? BSC47 142 1 Z
+bit 144 I ? BSC48
+bit 145 C 1 *
+bit 146 O ? BSC48 145 1 Z
+bit 147 I ? BSC49
+bit 148 C 1 *
+bit 149 O ? BSC49 148 1 Z
+bit 150 I ? BSC50
+bit 151 C 1 *
+bit 152 O ? BSC50 151 1 Z
+bit 153 I ? BSC51
+bit 154 C 1 *
+bit 155 O ? BSC51 154 1 Z
+bit 156 I ? BSC52
+bit 157 C 1 *
+bit 158 O ? BSC52 157 1 Z
+bit 159 I ? BSC53
+bit 160 C 1 *
+bit 161 O ? BSC53 160 1 Z
+bit 162 I ? BSC54
+bit 163 C 1 *
+bit 164 O ? BSC54 163 1 Z
+bit 165 I ? BSC55
+bit 166 C 1 *
+bit 167 O ? BSC55 166 1 Z
+bit 168 I ? BSC56
+bit 169 C 1 *
+bit 170 O ? BSC56 169 1 Z
+bit 171 I ? BSC57
+bit 172 C 1 *
+bit 173 O ? BSC57 172 1 Z
+bit 174 I ? BSC58
+bit 175 C 1 *
+bit 176 O ? BSC58 175 1 Z
+bit 177 I ? BSC59
+bit 178 C 1 *
+bit 179 O ? BSC59 178 1 Z
+bit 180 I ? BSC60
+bit 181 C 1 *
+bit 182 O ? BSC60 181 1 Z
+bit 183 I ? BSC61
+bit 184 C 1 *
+bit 185 O ? BSC61 184 1 Z
+bit 186 I ? BSC62
+bit 187 C 1 *
+bit 188 O ? BSC62 187 1 Z
+bit 189 I ? BSC63
+bit 190 C 1 *
+bit 191 O ? BSC63 190 1 Z
+bit 192 I ? BSC64
+bit 193 C 1 *
+bit 194 O ? BSC64 193 1 Z
+bit 195 I ? BSC65
+bit 196 C 1 *
+bit 197 O ? BSC65 196 1 Z
+bit 198 I ? BSC66
+bit 199 C 1 *
+bit 200 O ? BSC66 199 1 Z
+bit 201 I ? BSC67
+bit 202 C 1 *
+bit 203 O ? BSC67 202 1 Z
+bit 204 I ? BSC68
+bit 205 C 1 *
+bit 206 O ? BSC68 205 1 Z
+bit 207 I ? BSC69
+bit 208 C 1 *
+bit 209 O ? BSC69 208 1 Z
+bit 210 I ? BSC70
+bit 211 C 1 *
+bit 212 O ? BSC70 211 1 Z
+bit 213 I ? BSC71
+bit 214 C 1 *
+bit 215 O ? BSC71 214 1 Z
+bit 216 I ? BSC72
+bit 217 C 1 *
+bit 218 O ? BSC72 217 1 Z
+bit 219 I ? BSC73
+bit 220 C 1 *
+bit 221 O ? BSC73 220 1 Z
+bit 222 I ? BSC74
+bit 223 C 1 *
+bit 224 O ? BSC74 223 1 Z
+bit 225 I ? BSC75
+bit 226 C 1 *
+bit 227 O ? BSC75 226 1 Z
+bit 228 I ? BSC76
+bit 229 C 1 *
+bit 230 O ? BSC76 229 1 Z
+bit 231 I ? BSC77
+bit 232 C 1 *
+bit 233 O ? BSC77 232 1 Z
+bit 234 I ? BSC78
+bit 235 C 1 *
+bit 236 O ? BSC78 235 1 Z
+bit 237 I ? BSC79
+bit 238 C 1 *
+bit 239 O ? BSC79 238 1 Z
+bit 240 I ? BSC80
+bit 241 C 1 *
+bit 242 O ? BSC80 241 1 Z
+bit 243 I ? BSC81
+bit 244 C 1 *
+bit 245 O ? BSC81 244 1 Z
+bit 246 I ? BSC82
+bit 247 C 1 *
+bit 248 O ? BSC82 247 1 Z
+bit 249 I ? BSC83
+bit 250 C 1 *
+bit 251 O ? BSC83 250 1 Z
+bit 252 I ? BSC84
+bit 253 C 1 *
+bit 254 O ? BSC84 253 1 Z
+bit 255 I ? BSC85
+bit 256 C 1 *
+bit 257 O ? BSC85 256 1 Z
+bit 258 I ? BSC86
+bit 259 C 1 *
+bit 260 O ? BSC86 259 1 Z
+bit 261 I ? BSC87
+bit 262 C 1 *
+bit 263 O ? BSC87 262 1 Z
+bit 264 I ? BSC88
+bit 265 C 1 *
+bit 266 O ? BSC88 265 1 Z
+bit 267 I ? BSC89
+bit 268 C 1 *
+bit 269 O ? BSC89 268 1 Z
+bit 270 I ? BSC90
+bit 271 C 1 *
+bit 272 O ? BSC90 271 1 Z
+bit 273 I ? BSC91
+bit 274 C 1 *
+bit 275 O ? BSC91 274 1 Z
+bit 276 I ? CLK2
+bit 277 X ? *
+bit 278 X ? *
+bit 279 X ? *
+bit 280 X 1 *
+bit 281 X ? *
+bit 282 X ? *
+bit 283 X 1 *
+bit 284 X ? *
+bit 285 X ? *
+bit 286 X 1 *
+bit 287 X ? *
+bit 288 I ? BSC96
+bit 289 C 1 *
+bit 290 O ? BSC96 289 1 Z
+bit 291 I ? BSC97
+bit 292 C 1 *
+bit 293 O ? BSC97 292 1 Z
+bit 294 I ? BSC98
+bit 295 C 1 *
+bit 296 O ? BSC98 295 1 Z
+bit 297 I ? BSC99
+bit 298 C 1 *
+bit 299 O ? BSC99 298 1 Z
+bit 300 I ? BSC100
+bit 301 C 1 *
+bit 302 O ? BSC100 301 1 Z
+bit 303 I ? BSC101
+bit 304 C 1 *
+bit 305 O ? BSC101 304 1 Z
+bit 306 I ? BSC102
+bit 307 C 1 *
+bit 308 O ? BSC102 307 1 Z
+bit 309 I ? BSC103
+bit 310 C 1 *
+bit 311 O ? BSC103 310 1 Z
+bit 312 I ? BSC104
+bit 313 C 1 *
+bit 314 O ? BSC104 313 1 Z
+bit 315 I ? BSC105
+bit 316 C 1 *
+bit 317 O ? BSC105 316 1 Z
+bit 318 I ? BSC106
+bit 319 C 1 *
+bit 320 O ? BSC106 319 1 Z
+bit 321 I ? BSC107
+bit 322 C 1 *
+bit 323 O ? BSC107 322 1 Z
+bit 324 I ? BSC108
+bit 325 C 1 *
+bit 326 O ? BSC108 325 1 Z
+bit 327 I ? BSC109
+bit 328 C 1 *
+bit 329 O ? BSC109 328 1 Z
+bit 330 I ? BSC110
+bit 331 C 1 *
+bit 332 O ? BSC110 331 1 Z
+bit 333 I ? BSC111
+bit 334 C 1 *
+bit 335 O ? BSC111 334 1 Z
+bit 336 I ? BSC112
+bit 337 C 1 *
+bit 338 O ? BSC112 337 1 Z
+bit 339 I ? BSC113
+bit 340 C 1 *
+bit 341 O ? BSC113 340 1 Z
+bit 342 I ? BSC114
+bit 343 C 1 *
+bit 344 O ? BSC114 343 1 Z
+bit 345 I ? BSC115
+bit 346 C 1 *
+bit 347 O ? BSC115 346 1 Z
+bit 348 I ? BSC116
+bit 349 C 1 *
+bit 350 O ? BSC116 349 1 Z
+bit 351 I ? BSC117
+bit 352 C 1 *
+bit 353 O ? BSC117 352 1 Z
+bit 354 I ? BSC118
+bit 355 C 1 *
+bit 356 O ? BSC118 355 1 Z
+bit 357 I ? BSC119
+bit 358 C 1 *
+bit 359 O ? BSC119 358 1 Z
+bit 360 I ? BSC120
+bit 361 C 1 *
+bit 362 O ? BSC120 361 1 Z
+bit 363 I ? BSC121
+bit 364 C 1 *
+bit 365 O ? BSC121 364 1 Z
+bit 366 I ? BSC122
+bit 367 C 1 *
+bit 368 O ? BSC122 367 1 Z
+bit 369 I ? BSC123
+bit 370 C 1 *
+bit 371 O ? BSC123 370 1 Z
+bit 372 I ? BSC124
+bit 373 C 1 *
+bit 374 O ? BSC124 373 1 Z
+bit 375 I ? BSC125
+bit 376 C 1 *
+bit 377 O ? BSC125 376 1 Z
+bit 378 I ? BSC126
+bit 379 C 1 *
+bit 380 O ? BSC126 379 1 Z
+bit 381 I ? BSC127
+bit 382 C 1 *
+bit 383 O ? BSC127 382 1 Z
+bit 384 I ? BSC128
+bit 385 C 1 *
+bit 386 O ? BSC128 385 1 Z
+bit 387 I ? BSC129
+bit 388 C 1 *
+bit 389 O ? BSC129 388 1 Z
+bit 390 I ? BSC130
+bit 391 C 1 *
+bit 392 O ? BSC130 391 1 Z
+bit 393 I ? BSC131
+bit 394 C 1 *
+bit 395 O ? BSC131 394 1 Z
+bit 396 I ? BSC132
+bit 397 C 1 *
+bit 398 O ? BSC132 397 1 Z
+bit 399 I ? BSC133
+bit 400 C 1 *
+bit 401 O ? BSC133 400 1 Z
+bit 402 I ? BSC134
+bit 403 C 1 *
+bit 404 O ? BSC134 403 1 Z
+bit 405 I ? BSC135
+bit 406 C 1 *
+bit 407 O ? BSC135 406 1 Z
+bit 408 I ? BSC136
+bit 409 C 1 *
+bit 410 O ? BSC136 409 1 Z
+bit 411 I ? BSC137
+bit 412 C 1 *
+bit 413 O ? BSC137 412 1 Z
+bit 414 I ? BSC138
+bit 415 C 1 *
+bit 416 O ? BSC138 415 1 Z
+bit 417 I ? BSC139
+bit 418 C 1 *
+bit 419 O ? BSC139 418 1 Z
+bit 420 I ? BSC140
+bit 421 C 1 *
+bit 422 O ? BSC140 421 1 Z
+bit 423 I ? BSC141
+bit 424 C 1 *
+bit 425 O ? BSC141 424 1 Z
+bit 426 I ? BSC142
+bit 427 C 1 *
+bit 428 O ? BSC142 427 1 Z
+bit 429 I ? BSC143
+bit 430 C 1 *
+bit 431 O ? BSC143 430 1 Z
+bit 432 I ? BSC144
+bit 433 C 1 *
+bit 434 O ? BSC144 433 1 Z
+bit 435 I ? BSC145
+bit 436 C 1 *
+bit 437 O ? BSC145 436 1 Z
+bit 438 I ? BSC146
+bit 439 C 1 *
+bit 440 O ? BSC146 439 1 Z
+bit 441 I ? BSC147
+bit 442 C 1 *
+bit 443 O ? BSC147 442 1 Z
+bit 444 I ? BSC148
+bit 445 C 1 *
+bit 446 O ? BSC148 445 1 Z
+bit 447 I ? BSC149
+bit 448 C 1 *
+bit 449 O ? BSC149 448 1 Z
+bit 450 I ? BSC150
+bit 451 C 1 *
+bit 452 O ? BSC150 451 1 Z
+bit 453 I ? BSC151
+bit 454 C 1 *
+bit 455 O ? BSC151 454 1 Z
+bit 456 I ? BSC152
+bit 457 C 1 *
+bit 458 O ? BSC152 457 1 Z
+bit 459 I ? BSC153
+bit 460 C 1 *
+bit 461 O ? BSC153 460 1 Z
+bit 462 I ? BSC154
+bit 463 C 1 *
+bit 464 O ? BSC154 463 1 Z
+bit 465 I ? BSC155
+bit 466 C 1 *
+bit 467 O ? BSC155 466 1 Z
+bit 468 I ? BSC156
+bit 469 C 1 *
+bit 470 O ? BSC156 469 1 Z
+bit 471 I ? BSC157
+bit 472 C 1 *
+bit 473 O ? BSC157 472 1 Z
+bit 474 I ? BSC158
+bit 475 C 1 *
+bit 476 O ? BSC158 475 1 Z
+bit 477 I ? BSC159
+bit 478 C 1 *
+bit 479 O ? BSC159 478 1 Z
+bit 480 I ? BSC160
+bit 481 C 1 *
+bit 482 O ? BSC160 481 1 Z
+bit 483 I ? BSC161
+bit 484 C 1 *
+bit 485 O ? BSC161 484 1 Z
+bit 486 I ? BSC162
+bit 487 C 1 *
+bit 488 O ? BSC162 487 1 Z
+bit 489 I ? BSC163
+bit 490 C 1 *
+bit 491 O ? BSC163 490 1 Z
+bit 492 I ? BSC164
+bit 493 C 1 *
+bit 494 O ? BSC164 493 1 Z
+bit 495 I ? BSC165
+bit 496 C 1 *
+bit 497 O ? BSC165 496 1 Z
+bit 498 I ? BSC166
+bit 499 C 1 *
+bit 500 O ? BSC166 499 1 Z
+bit 501 I ? BSC167
+bit 502 C 1 *
+bit 503 O ? BSC167 502 1 Z
+bit 504 I ? BSC168
+bit 505 C 1 *
+bit 506 O ? BSC168 505 1 Z
+bit 507 I ? BSC169
+bit 508 C 1 *
+bit 509 O ? BSC169 508 1 Z
+bit 510 I ? BSC170
+bit 511 C 1 *
+bit 512 O ? BSC170 511 1 Z
+bit 513 I ? BSC171
+bit 514 C 1 *
+bit 515 O ? BSC171 514 1 Z
+bit 516 I ? BSC172
+bit 517 C 1 *
+bit 518 O ? BSC172 517 1 Z
+bit 519 I ? BSC173
+bit 520 C 1 *
+bit 521 O ? BSC173 520 1 Z
+bit 522 I ? BSC174
+bit 523 C 1 *
+bit 524 O ? BSC174 523 1 Z
+bit 525 I ? BSC175
+bit 526 C 1 *
+bit 527 O ? BSC175 526 1 Z
+bit 528 I ? BSC176
+bit 529 C 1 *
+bit 530 O ? BSC176 529 1 Z
+bit 531 I ? BSC177
+bit 532 C 1 *
+bit 533 O ? BSC177 532 1 Z
+bit 534 I ? BSC178
+bit 535 C 1 *
+bit 536 O ? BSC178 535 1 Z
+bit 537 I ? BSC179
+bit 538 C 1 *
+bit 539 O ? BSC179 538 1 Z
+bit 540 I ? BSC180
+bit 541 C 1 *
+bit 542 O ? BSC180 541 1 Z
+bit 543 I ? BSC181
+bit 544 C 1 *
+bit 545 O ? BSC181 544 1 Z
+bit 546 I ? BSC182
+bit 547 C 1 *
+bit 548 O ? BSC182 547 1 Z
+bit 549 I ? BSC183
+bit 550 C 1 *
+bit 551 O ? BSC183 550 1 Z
+bit 552 I ? BSC184
+bit 553 C 1 *
+bit 554 O ? BSC184 553 1 Z
+bit 555 I ? BSC185
+bit 556 C 1 *
+bit 557 O ? BSC185 556 1 Z
+bit 558 I ? BSC186
+bit 559 C 1 *
+bit 560 O ? BSC186 559 1 Z
+bit 561 I ? BSC187
+bit 562 C 1 *
+bit 563 O ? BSC187 562 1 Z
+bit 564 I ? BSC188
+bit 565 C 1 *
+bit 566 O ? BSC188 565 1 Z
+bit 567 I ? BSC189
+bit 568 C 1 *
+bit 569 O ? BSC189 568 1 Z
+bit 570 I ? BSC190
+bit 571 C 1 *
+bit 572 O ? BSC190 571 1 Z
+bit 573 I ? BSC191
+bit 574 C 1 *
+bit 575 O ? BSC191 574 1 Z
+bit 576 I ? BSC192
+bit 577 C 1 *
+bit 578 O ? BSC192 577 1 Z
+bit 579 I ? BSC193
+bit 580 C 1 *
+bit 581 O ? BSC193 580 1 Z
+bit 582 I ? BSC194
+bit 583 C 1 *
+bit 584 O ? BSC194 583 1 Z
+bit 585 I ? BSC195
+bit 586 C 1 *
+bit 587 O ? BSC195 586 1 Z
+bit 588 I ? BSC196
+bit 589 C 1 *
+bit 590 O ? BSC196 589 1 Z
+bit 591 I ? BSC197
+bit 592 C 1 *
+bit 593 O ? BSC197 592 1 Z
+bit 594 I ? BSC198
+bit 595 C 1 *
+bit 596 O ? BSC198 595 1 Z
+bit 597 I ? BSC199
+bit 598 C 1 *
+bit 599 O ? BSC199 598 1 Z
+bit 600 I ? BSC200
+bit 601 C 1 *
+bit 602 O ? BSC200 601 1 Z
+bit 603 I ? BSC201
+bit 604 C 1 *
+bit 605 O ? BSC201 604 1 Z
+bit 606 I ? BSC202
+bit 607 C 1 *
+bit 608 O ? BSC202 607 1 Z
+bit 609 I ? BSC203
+bit 610 C 1 *
+bit 611 O ? BSC203 610 1 Z
+bit 612 I ? BSC204
+bit 613 C 1 *
+bit 614 O ? BSC204 613 1 Z
+bit 615 I ? BSC205
+bit 616 C 1 *
+bit 617 O ? BSC205 616 1 Z
+bit 618 I ? BSC206
+bit 619 C 1 *
+bit 620 O ? BSC206 619 1 Z
+bit 621 I ? BSC207
+bit 622 C 1 *
+bit 623 O ? BSC207 622 1 Z
+bit 624 I ? BSC208
+bit 625 C 1 *
+bit 626 O ? BSC208 625 1 Z
+bit 627 I ? BSC209
+bit 628 C 1 *
+bit 629 O ? BSC209 628 1 Z
+bit 630 I ? BSC210
+bit 631 C 1 *
+bit 632 O ? BSC210 631 1 Z
+bit 633 I ? BSC211
+bit 634 C 1 *
+bit 635 O ? BSC211 634 1 Z
+bit 636 I ? BSC212
+bit 637 C 1 *
+bit 638 O ? BSC212 637 1 Z
+bit 639 I ? BSC213
+bit 640 C 1 *
+bit 641 O ? BSC213 640 1 Z
+bit 642 I ? BSC214
+bit 643 C 1 *
+bit 644 O ? BSC214 643 1 Z
+bit 645 I ? BSC215
+bit 646 C 1 *
+bit 647 O ? BSC215 646 1 Z
+bit 648 I ? BSC216
+bit 649 C 1 *
+bit 650 O ? BSC216 649 1 Z
+bit 651 I ? BSC217
+bit 652 C 1 *
+bit 653 O ? BSC217 652 1 Z
+bit 654 I ? BSC218
+bit 655 C 1 *
+bit 656 O ? BSC218 655 1 Z
+bit 657 I ? DCLK
+bit 658 C 1 *
+bit 659 O ? DCLK 658 1 Z
+bit 660 I ? MSEL1
+bit 661 X ? *
+bit 662 X ? *
+bit 663 I ? MSEL0
+bit 664 X ? *
+bit 665 X ? *
+bit 666 X ? *
+bit 667 X 1 *
+bit 668 X ? *
+bit 669 X ? *
+bit 670 X 1 *
+bit 671 X ? *
+bit 672 X ? *
+bit 673 X 1 *
+bit 674 X ? *
+bit 675 I ? CLK0
+bit 676 X ? *
+bit 677 X ? *
+bit 678 X ? *
+bit 679 X 1 *
+bit 680 X ? *
+bit 681 I ? DATA0
+bit 682 X ? *
+bit 683 X ? *
+bit 684 I ? BSC228
+bit 685 C 1 *
+bit 686 O ? BSC228 685 1 Z
+bit 687 I ? BSC229
+bit 688 C 1 *
+bit 689 O ? BSC229 688 1 Z
+bit 690 I ? BSC230
+bit 691 C 1 *
+bit 692 O ? BSC230 691 1 Z
+bit 693 I ? BSC231
+bit 694 C 1 *
+bit 695 O ? BSC231 694 1 Z
+bit 696 I ? BSC232
+bit 697 C 1 *
+bit 698 O ? BSC232 697 1 Z
+bit 699 I ? BSC233
+bit 700 C 1 *
+bit 701 O ? BSC233 700 1 Z
+bit 702 I ? BSC234
+bit 703 C 1 *
+bit 704 O ? BSC234 703 1 Z
+bit 705 I ? BSC235
+bit 706 C 1 *
+bit 707 O ? BSC235 706 1 Z
+bit 708 I ? BSC236
+bit 709 C 1 *
+bit 710 O ? BSC236 709 1 Z
+bit 711 I ? BSC237
+bit 712 C 1 *
+bit 713 O ? BSC237 712 1 Z
+bit 714 I ? BSC238
+bit 715 C 1 *
+bit 716 O ? BSC238 715 1 Z
+bit 717 I ? BSC239
+bit 718 C 1 *
+bit 719 O ? BSC239 718 1 Z
+bit 720 I ? BSC240
+bit 721 C 1 *
+bit 722 O ? BSC240 721 1 Z
+bit 723 I ? BSC241
+bit 724 C 1 *
+bit 725 O ? BSC241 724 1 Z
+bit 726 I ? BSC242
+bit 727 C 1 *
+bit 728 O ? BSC242 727 1 Z
+bit 729 I ? BSC243
+bit 730 C 1 *
+bit 731 O ? BSC243 730 1 Z
+bit 732 I ? BSC244
+bit 733 C 1 *
+bit 734 O ? BSC244 733 1 Z
+bit 735 I ? BSC245
+bit 736 C 1 *
+bit 737 O ? BSC245 736 1 Z
+bit 738 I ? BSC246
+bit 739 C 1 *
+bit 740 O ? BSC246 739 1 Z
+bit 741 I ? BSC247
+bit 742 C 1 *
+bit 743 O ? BSC247 742 1 Z
+bit 744 I ? BSC248
+bit 745 C 1 *
+bit 746 O ? BSC248 745 1 Z
+bit 747 I ? BSC249
+bit 748 C 1 *
+bit 749 O ? BSC249 748 1 Z
+bit 750 I ? BSC250
+bit 751 C 1 *
+bit 752 O ? BSC250 751 1 Z
+bit 753 I ? BSC251
+bit 754 C 1 *
+bit 755 O ? BSC251 754 1 Z
+bit 756 I ? BSC252
+bit 757 C 1 *
+bit 758 O ? BSC252 757 1 Z
+bit 759 I ? BSC253
+bit 760 C 1 *
+bit 761 O ? BSC253 760 1 Z
+bit 762 I ? BSC254
+bit 763 C 1 *
+bit 764 O ? BSC254 763 1 Z
+bit 765 I ? BSC255
+bit 766 C 1 *
+bit 767 O ? BSC255 766 1 Z
+bit 768 I ? BSC256
+bit 769 C 1 *
+bit 770 O ? BSC256 769 1 Z
+bit 771 I ? BSC257
+bit 772 C 1 *
+bit 773 O ? BSC257 772 1 Z
--- /dev/null
+#
+# $Id$
+#
+# JTAG package script for EP1C12F256
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Arnim Laeuger <arniml@users.sourceforge.net>
+#
+
+salias IOB2 BSC0
+salias IOA2 BSC1
+salias IOB3 BSC2
+salias IOC4 BSC3
+salias IOB4 BSC4
+salias IOA4 BSC5
+salias IOB5 BSC6
+salias IOC5 BSC7
+salias IOE5 BSC8
+salias IOE6 BSC9
+salias IOD5 BSC10
+salias IOD6 BSC11
+salias IOC6 BSC12
+salias IOB6 BSC13
+salias IOE7 BSC14
+salias IOA6 BSC16
+salias IOB7 BSC17
+salias IOC7 BSC18
+salias IOD7 BSC19
+salias IOB8 BSC20
+salias IOA8 BSC21
+salias IOE8 BSC22
+salias IOD8 BSC26
+salias IOC8 BSC27
+salias IOE10 BSC30
+salias IOC9 BSC33
+salias IOD9 BSC34
+salias IOB9 BSC36
+salias IOA9 BSC37
+salias IOD10 BSC38
+salias IOC10 BSC39
+salias IOB10 BSC40
+salias IOA11 BSC41
+salias IOB11 BSC42
+salias IOC11 BSC43
+salias IOD11 BSC48
+salias IOD12 BSC49
+salias IOE9 BSC50
+salias IOE11 BSC51
+salias IOE12 BSC52
+salias IOC12 BSC53
+salias IOB12 BSC54
+salias IOA13 BSC55
+salias IOB13 BSC56
+salias IOC13 BSC57
+salias IOB14 BSC58
+salias IOA15 BSC59
+salias IOB15 BSC60
+salias IOD13 BSC61
+salias IOC14 BSC62
+salias IOC15 BSC63
+salias IOB16 BSC64
+salias IOG12 BSC65
+salias IOH13 BSC66
+salias IOD14 BSC67
+salias IOE13 BSC68
+salias IOF12 BSC69
+salias IOE14 BSC70
+salias IOD15 BSC71
+salias IOD16 BSC72
+salias IOE15 BSC73
+salias IOE16 BSC74
+salias IOF15 BSC75
+salias IOF13 BSC76
+salias IOF14 BSC77
+salias IOF16 BSC78
+salias IOG15 BSC79
+salias IOG13 BSC80
+salias IOG14 BSC81
+salias IOH12 BSC91
+salias IOJ16 BSC96
+salias IOK15 BSC97
+salias IOK16 BSC108
+salias IOL16 BSC109
+salias IOL15 BSC110
+salias IOL14 BSC111
+salias IOM16 BSC112
+salias IOM15 BSC113
+salias IOL13 BSC114
+salias IOM14 BSC115
+salias IOM13 BSC116
+salias ION14 BSC117
+salias IOL12 BSC118
+salias IOK14 BSC119
+salias IOK12 BSC120
+salias ION16 BSC121
+salias ION15 BSC122
+salias IOR16 BSC123
+salias IOP15 BSC124
+salias IOP14 BSC125
+salias ION13 BSC126
+salias IOR15 BSC127
+salias IOT15 BSC128
+salias IOP13 BSC129
+salias IOR14 BSC130
+salias IOR13 BSC131
+salias IOT13 BSC132
+salias IOR12 BSC133
+salias IOP12 BSC134
+salias IOM12 BSC135
+salias IOM11 BSC136
+salias IOM9 BSC137
+salias ION12 BSC138
+salias ION11 BSC139
+salias IOP11 BSC144
+salias IOR11 BSC145
+salias IOP10 BSC146
+salias ION10 BSC147
+salias IOT11 BSC148
+salias IOR10 BSC149
+salias ION9 BSC150
+salias IOP9 BSC151
+salias IOT9 BSC153
+salias IOR9 BSC154
+salias IOM10 BSC157
+salias IOP8 BSC160
+salias ION8 BSC161
+salias IOM8 BSC165
+salias IOT8 BSC166
+salias IOR8 BSC167
+salias ION7 BSC168
+salias IOP7 BSC169
+salias IOR7 BSC170
+salias IOT6 BSC171
+salias IOM7 BSC173
+salias IOR6 BSC174
+salias IOP6 BSC175
+salias ION6 BSC176
+salias ION5 BSC177
+salias IOM6 BSC178
+salias IOM5 BSC179
+salias IOP5 BSC180
+salias IOR5 BSC181
+salias IOT4 BSC182
+salias IOR4 BSC183
+salias IOP4 BSC184
+salias IOR3 BSC185
+salias IOT2 BSC186
+salias IOR2 BSC187
+salias ION4 BSC188
+salias IOP3 BSC189
+salias IOP2 BSC190
+salias IOR1 BSC191
+salias IOL4 BSC192
+salias IOK5 BSC193
+salias ION3 BSC194
+salias IOM4 BSC195
+salias IOL5 BSC196
+salias IOM3 BSC197
+salias ION2 BSC198
+salias IOM2 BSC199
+salias ION1 BSC200
+salias IOM1 BSC201
+salias IOL2 BSC202
+salias IOL1 BSC203
+salias IOK1 BSC204
+salias IOL3 BSC205
+salias IOK2 BSC216
+salias IOJ1 BSC217
+salias IOK3 BSC218
+salias IOG4 BSC228
+salias IOH5 BSC229
+salias IOF1 BSC239
+salias IOG2 BSC240
+salias IOE1 BSC241
+salias IOF2 BSC242
+salias IOG3 BSC243
+salias IOF3 BSC244
+salias IOD1 BSC245
+salias IOE2 BSC246
+salias IOD2 BSC247
+salias IOE3 BSC248
+salias IOF5 BSC249
+salias IOE4 BSC250
+salias IOD3 BSC251
+salias IOF4 BSC252
+salias IOG5 BSC253
+salias IOB1 BSC254
+salias IOC2 BSC255
+salias IOC3 BSC256
+salias IOD4 BSC257
--- /dev/null
+#
+# $Id$
+#
+# JTAG package script for EP1C12F324
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Arnim Laeuger <arniml@users.sourceforge.net>
+#
+
+salias IOC4 BSC0
+salias IOB3 BSC1
+salias IOG8 BSC2
+salias IOF8 BSC3
+salias IOB4 BSC4
+salias IOA4 BSC5
+salias IOD5 BSC6
+salias IOC5 BSC7
+salias IOB5 BSC8
+salias IOA6 BSC9
+salias IOC6 BSC10
+salias IOB6 BSC11
+salias IOD6 BSC12
+salias IOE6 BSC13
+salias IOC7 BSC14
+salias IOD7 BSC15
+salias IOB7 BSC16
+salias IOA7 BSC17
+salias IOE7 BSC18
+salias IOE8 BSC19
+salias IOB8 BSC20
+salias IOA8 BSC21
+salias IOC8 BSC22
+salias IOD8 BSC23
+salias IOB9 BSC24
+salias IOA9 BSC25
+salias IOC9 BSC26
+salias IOD9 BSC27
+salias IOF9 BSC28
+salias IOG9 BSC29
+salias IOE10 BSC30
+salias IOA10 BSC31
+salias IOB10 BSC32
+salias IOD10 BSC33
+salias IOC10 BSC34
+salias IOE11 BSC35
+salias IOA11 BSC36
+salias IOB11 BSC37
+salias IOD11 BSC38
+salias IOC11 BSC39
+salias IOA12 BSC40
+salias IOB12 BSC41
+salias IOC12 BSC42
+salias IOD12 BSC43
+salias IOC13 BSC44
+salias IOD13 BSC45
+salias IOA13 BSC46
+salias IOB13 BSC47
+salias IOF10 BSC48
+salias IOG10 BSC49
+salias IOE13 BSC50
+salias IOC14 BSC51
+salias IOB14 BSC52
+salias IOD14 BSC53
+salias IOC15 BSC54
+salias IOA15 BSC55
+salias IOB15 BSC56
+salias IOF11 BSC57
+salias IOG11 BSC58
+salias IOB16 BSC59
+salias IOC16 BSC60
+salias IOD17 BSC61
+salias IOC17 BSC62
+salias IOD15 BSC63
+salias IOD16 BSC64
+salias IOE14 BSC65
+salias IOD18 BSC66
+salias IOE15 BSC67
+salias IOE16 BSC68
+salias IOE17 BSC69
+salias IOF15 BSC70
+salias IOF16 BSC71
+salias IOF14 BSC72
+salias IOF13 BSC73
+salias IOF17 BSC74
+salias IOF18 BSC75
+salias IOF12 BSC76
+salias IOG12 BSC77
+salias IOG16 BSC78
+salias IOG15 BSC79
+salias IOG14 BSC80
+salias IOG13 BSC81
+salias IOG17 BSC82
+salias IOG18 BSC83
+salias IOH18 BSC84
+salias IOH17 BSC85
+salias IOH16 BSC86
+salias IOH15 BSC87
+salias IOH14 BSC88
+salias IOH13 BSC89
+salias IOJ13 BSC90
+salias IOJ14 BSC91
+salias IOK15 BSC96
+salias IOK16 BSC97
+salias IOL14 BSC98
+salias IOL15 BSC99
+salias IOL16 BSC100
+salias IOL13 BSC101
+salias IOM13 BSC102
+salias IOL17 BSC103
+salias IOL18 BSC104
+salias IOM16 BSC105
+salias IOM15 BSC106
+salias IOM14 BSC107
+salias IOM17 BSC108
+salias IOM18 BSC109
+salias ION15 BSC110
+salias ION16 BSC111
+salias ION12 BSC112
+salias ION13 BSC113
+salias ION17 BSC114
+salias ION18 BSC115
+salias ION14 BSC116
+salias IOP14 BSC117
+salias IOP15 BSC118
+salias IOP17 BSC119
+salias IOP16 BSC120
+salias IOR16 BSC121
+salias IOR15 BSC122
+salias IOR18 BSC123
+salias IOR17 BSC124
+salias IOT17 BSC125
+salias IOT16 BSC126
+salias IOT15 BSC127
+salias IOU16 BSC128
+salias IOM11 BSC129
+salias ION11 BSC130
+salias IOU15 BSC131
+salias IOV15 BSC132
+salias IOR14 BSC133
+salias IOT14 BSC134
+salias IOU14 BSC135
+salias IOP13 BSC136
+salias IOP12 BSC137
+salias IOM10 BSC138
+salias ION10 BSC139
+salias IOR13 BSC140
+salias IOT13 BSC141
+salias IOU13 BSC142
+salias IOV13 BSC143
+salias IOR12 BSC144
+salias IOT12 BSC145
+salias IOU12 BSC146
+salias IOV12 BSC147
+salias IOV11 BSC148
+salias IOU11 BSC149
+salias IOT11 BSC150
+salias IOR11 BSC151
+salias IOP10 BSC152
+salias IOR10 BSC153
+salias IOT10 BSC154
+salias IOV10 BSC155
+salias IOU10 BSC156
+salias IOP9 BSC157
+salias ION9 BSC158
+salias IOM9 BSC159
+salias IOT9 BSC160
+salias IOR9 BSC161
+salias IOV9 BSC162
+salias IOU9 BSC163
+salias IOR8 BSC164
+salias IOT8 BSC165
+salias IOV8 BSC166
+salias IOU8 BSC167
+salias IOR7 BSC168
+salias IOT7 BSC169
+salias IOV7 BSC170
+salias IOU7 BSC171
+salias IOR6 BSC172
+salias IOT6 BSC173
+salias IOP7 BSC174
+salias IOP6 BSC175
+salias IOU6 BSC176
+salias IOV6 BSC177
+salias IOR5 BSC178
+salias IOR4 BSC179
+salias IOU5 BSC180
+salias IOT5 BSC181
+salias IOU4 BSC182
+salias IOT4 BSC183
+salias ION8 BSC184
+salias IOM8 BSC185
+salias IOV4 BSC186
+salias IOU3 BSC187
+salias IOT3 BSC188
+salias IOT2 BSC189
+salias IOR3 BSC190
+salias IOR2 BSC191
+salias IOP4 BSC192
+salias IOR1 BSC193
+salias IOP3 BSC194
+salias IOP2 BSC195
+salias IOP5 BSC196
+salias ION4 BSC197
+salias ION3 BSC198
+salias ION6 BSC199
+salias ION5 BSC200
+salias ION7 BSC201
+salias IOM6 BSC202
+salias ION2 BSC203
+salias ION1 BSC204
+salias IOM4 BSC205
+salias IOM5 BSC206
+salias IOM2 BSC207
+salias IOM3 BSC208
+salias IOM1 BSC209
+salias IOL4 BSC210
+salias IOL5 BSC211
+salias IOL3 BSC212
+salias IOL2 BSC213
+salias IOL6 BSC214
+salias IOL7 BSC215
+salias IOK5 BSC216
+salias IOK4 BSC217
+salias IOK6 BSC218
+salias IOJ1 BSC228
+salias IOH6 BSC229
+salias IOH5 BSC230
+salias IOH4 BSC231
+salias IOH3 BSC232
+salias IOH2 BSC233
+salias IOH1 BSC234
+salias IOG6 BSC235
+salias IOG5 BSC236
+salias IOG4 BSC237
+salias IOG3 BSC238
+salias IOF7 BSC239
+salias IOF6 BSC240
+salias IOG2 BSC241
+salias IOG1 BSC242
+salias IOF5 BSC243
+salias IOF4 BSC244
+salias IOF3 BSC245
+salias IOF2 BSC246
+salias IOE5 BSC247
+salias IOE4 BSC248
+salias IOF1 BSC249
+salias IOE2 BSC250
+salias IOE3 BSC251
+salias IOD1 BSC252
+salias IOD4 BSC253
+salias IOD2 BSC254
+salias IOD3 BSC255
+salias IOC2 BSC256
+salias IOC3 BSC257
--- /dev/null
+#
+# $Id$
+#
+# JTAG package script for EP1C12Q240
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Arnim Laeuger <arniml@users.sourceforge.net>
+#
+
+salias IO240 BSC0
+salias IO239 BSC1
+salias IO238 BSC2
+salias IO237 BSC3
+salias IO236 BSC4
+salias IO235 BSC5
+salias IO234 BSC6
+salias IO233 BSC7
+salias IO228 BSC8
+salias IO227 BSC9
+salias IO226 BSC10
+salias IO225 BSC11
+salias IO224 BSC12
+salias IO223 BSC13
+salias IO222 BSC14
+salias IO219 BSC16
+salias IO218 BSC17
+salias IO217 BSC18
+salias IO216 BSC19
+salias IO215 BSC20
+salias IO214 BSC21
+salias IO213 BSC22
+salias IO208 BSC30
+salias IO207 BSC33
+salias IO206 BSC34
+salias IO203 BSC36
+salias IO202 BSC37
+salias IO201 BSC38
+salias IO200 BSC39
+salias IO197 BSC48
+salias IO196 BSC49
+salias IO195 BSC50
+salias IO194 BSC51
+salias IO193 BSC52
+salias IO188 BSC53
+salias IO187 BSC54
+salias IO186 BSC55
+salias IO185 BSC56
+salias IO184 BSC57
+salias IO183 BSC58
+salias IO182 BSC59
+salias IO181 BSC60
+salias IO180 BSC61
+salias IO179 BSC62
+salias IO178 BSC63
+salias IO177 BSC64
+salias IO176 BSC65
+salias IO175 BSC66
+salias IO174 BSC67
+salias IO173 BSC68
+salias IO170 BSC69
+salias IO169 BSC70
+salias IO168 BSC71
+salias IO167 BSC72
+salias IO166 BSC73
+salias IO165 BSC74
+salias IO164 BSC75
+salias IO163 BSC76
+salias IO162 BSC77
+salias IO161 BSC78
+salias IO160 BSC79
+salias IO159 BSC80
+salias IO158 BSC81
+salias IO156 BSC91
+salias IO144 BSC96
+salias IO143 BSC97
+salias IO141 BSC108
+salias IO140 BSC109
+salias IO139 BSC110
+salias IO138 BSC111
+salias IO137 BSC112
+salias IO136 BSC113
+salias IO135 BSC114
+salias IO134 BSC115
+salias IO133 BSC116
+salias IO132 BSC117
+salias IO131 BSC118
+salias IO128 BSC119
+salias IO127 BSC120
+salias IO126 BSC121
+salias IO125 BSC122
+salias IO124 BSC123
+salias IO123 BSC124
+salias IO122 BSC125
+salias IO121 BSC126
+salias IO120 BSC127
+salias IO119 BSC128
+salias IO118 BSC129
+salias IO117 BSC130
+salias IO116 BSC131
+salias IO115 BSC132
+salias IO114 BSC133
+salias IO113 BSC134
+salias IO108 BSC135
+salias IO107 BSC136
+salias IO106 BSC137
+salias IO105 BSC138
+salias IO104 BSC139
+salias IO101 BSC148
+salias IO100 BSC149
+salias IO99 BSC150
+salias IO98 BSC151
+salias IO95 BSC153
+salias IO94 BSC154
+salias IO93 BSC157
+salias IO88 BSC165
+salias IO87 BSC166
+salias IO86 BSC167
+salias IO85 BSC168
+salias IO84 BSC169
+salias IO83 BSC170
+salias IO82 BSC171
+salias IO79 BSC173
+salias IO78 BSC174
+salias IO77 BSC175
+salias IO76 BSC176
+salias IO75 BSC177
+salias IO74 BSC178
+salias IO73 BSC179
+salias IO68 BSC180
+salias IO67 BSC181
+salias IO66 BSC182
+salias IO65 BSC183
+salias IO64 BSC184
+salias IO63 BSC185
+salias IO62 BSC186
+salias IO61 BSC187
+salias IO60 BSC188
+salias IO59 BSC189
+salias IO58 BSC190
+salias IO57 BSC191
+salias IO56 BSC192
+salias IO55 BSC193
+salias IO54 BSC194
+salias IO53 BSC195
+salias IO50 BSC196
+salias IO49 BSC197
+salias IO48 BSC198
+salias IO47 BSC199
+salias IO46 BSC200
+salias IO45 BSC201
+salias IO44 BSC202
+salias IO43 BSC203
+salias IO42 BSC204
+salias IO41 BSC205
+salias IO39 BSC216
+salias IO38 BSC217
+salias IO37 BSC218
+salias IO24 BSC228
+salias IO23 BSC229
+salias IO21 BSC239
+salias IO20 BSC240
+salias IO19 BSC241
+salias IO18 BSC242
+salias IO17 BSC243
+salias IO16 BSC244
+salias IO15 BSC245
+salias IO14 BSC246
+salias IO13 BSC247
+salias IO12 BSC248
+salias IO11 BSC249
+salias IO8 BSC250
+salias IO7 BSC251
+salias IO6 BSC252
+salias IO5 BSC253
+salias IO4 BSC254
+salias IO3 BSC255
+salias IO2 BSC256
+salias IO1 BSC257
--- /dev/null
+#
+# $Id$
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Rojhalat Ibrahim <ibrahim@schenk.isar.de>
+#
+
+# bits 31-28 of the Device Identification Register
+0000 ep1c20f400 0
--- /dev/null
+#
+# $Id$
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Rojhalat Ibrahim <ibrahim@schenk.isar.de>
+#
+
+signal TDI
+signal TDO
+signal TMS
+signal TCK
+signal DATA0
+signal DCLK
+signal CONF_DONE
+signal CLK0
+signal CLK1
+signal CLK2
+signal CLK3
+signal IOC3
+signal IOC2
+signal IOD3
+signal IOD2
+signal IOD4
+signal IOD1
+signal IOE4
+signal IOE5
+signal IOF3
+signal IOE3
+signal IOE2
+signal IOF4
+signal IOF5
+signal IOF2
+signal IOF1
+signal IOF6
+signal IOG5
+signal IOG1
+signal IOG2
+signal IOG6
+signal IOG7
+signal IOG3
+signal IOG4
+signal IOH7
+signal IOH1
+signal IOH2
+signal IOH3
+signal IOH4
+signal IOJ1
+signal IOJ2
+signal IOH5
+signal IOH6
+signal IOJ3
+signal IOJ4
+signal IOJ5
+signal IOJ6
+signal IOJ7
+signal IOJ8
+signal IOK2
+signal IOL4
+signal IOL8
+signal IOM8
+signal IOM2
+signal IOM1
+signal IOM5
+signal IOM6
+signal IOM4
+signal IOM3
+signal IOM7
+signal ION6
+signal ION1
+signal ION2
+signal ION4
+signal ION3
+signal ION5
+signal ION7
+signal IOP7
+signal IOP2
+signal IOP1
+signal IOP6
+signal IOP5
+signal IOP3
+signal IOP4
+signal IOR1
+signal IOR2
+signal IOR6
+signal IOR5
+signal IOR3
+signal IOR4
+signal IOT4
+signal IOT2
+signal IOT3
+signal IOU1
+signal IOU4
+signal IOU2
+signal IOU3
+signal IOV2
+signal IOV3
+signal IOW3
+signal IOY4
+signal IOV4
+signal IOW4
+signal IOT5
+signal IOU5
+signal IOV5
+signal IOW5
+signal IOT6
+signal IOT7
+signal IOW6
+signal IOY6
+signal IOU6
+signal IOV6
+signal IOW7
+signal IOY7
+signal IOR7
+signal IOT8
+signal IOV7
+signal IOU7
+signal IOV8
+signal IOU8
+signal IOW8
+signal IOY8
+signal IOU9
+signal IOV9
+signal IOT9
+signal IOR9
+signal IOY9
+signal IOW9
+signal IOT10
+signal IOU10
+signal IOV10
+signal IOW10
+signal IOY10
+signal IOV11
+signal IOU11
+signal IOW11
+signal IOY11
+signal IOR11
+signal IOY12
+signal IOW12
+signal IOT11
+signal IOT12
+signal IOU12
+signal IOV12
+signal IOT13
+signal IOR13
+signal IOY13
+signal IOW13
+signal IOU13
+signal IOV13
+signal IOR14
+signal IOT14
+signal IOW14
+signal IOY14
+signal IOU14
+signal IOV14
+signal IOV15
+signal IOU15
+signal IOY15
+signal IOW15
+signal IOT15
+signal IOT16
+signal IOW16
+signal IOV16
+signal IOV17
+signal IOU16
+signal IOY17
+signal IOW17
+signal IOW18
+signal IOV18
+signal IOV19
+signal IOU20
+signal IOU18
+signal IOU19
+signal IOU17
+signal IOT18
+signal IOT19
+signal IOT17
+signal IOR16
+signal IOR19
+signal IOR20
+signal IOR17
+signal IOR18
+signal IOR15
+signal IOP14
+signal IOP18
+signal IOP17
+signal IOP16
+signal IOP15
+signal IOP19
+signal IOP20
+signal ION14
+signal ION18
+signal ION17
+signal ION19
+signal ION20
+signal ION16
+signal ION15
+signal IOM18
+signal IOM17
+signal IOM15
+signal IOM16
+signal IOM20
+signal IOM19
+signal IOM14
+signal IOM13
+signal IOL13
+signal IOK19
+signal IOJ13
+signal IOK16
+signal IOK15
+signal IOJ18
+signal IOJ17
+signal IOJ14
+signal IOH14
+signal IOJ20
+signal IOJ19
+signal IOJ15
+signal IOJ16
+signal IOH20
+signal IOH19
+signal IOH17
+signal IOH18
+signal IOH16
+signal IOG17
+signal IOG18
+signal IOH15
+signal IOG14
+signal IOG19
+signal IOG20
+signal IOG15
+signal IOG16
+signal IOF20
+signal IOF19
+signal IOF15
+signal IOF16
+signal IOE19
+signal IOE18
+signal IOF18
+signal IOF17
+signal IOE17
+signal IOD20
+signal IOD17
+signal IOD19
+signal IOD18
+signal IOC19
+signal IOC18
+signal IOC17
+signal IOB18
+signal IOB17
+signal IOA17
+signal IOC16
+signal IOB16
+signal IOD16
+signal IOE16
+signal IOC15
+signal IOD15
+signal IOB15
+signal IOA15
+signal IOE15
+signal IOF14
+signal IOA14
+signal IOB14
+signal IOE14
+signal IOE13
+signal IOC14
+signal IOD14
+signal IOA13
+signal IOB13
+signal IOC13
+signal IOD13
+signal IOE12
+signal IOF12
+signal IOA12
+signal IOB12
+signal IOD12
+signal IOC12
+signal IOE11
+signal IOA11
+signal IOB11
+signal IOD11
+signal IOC11
+signal IOD10
+signal IOC10
+signal IOF10
+signal IOA10
+signal IOB10
+signal IOE10
+signal IOE9
+signal IOC9
+signal IOD9
+signal IOA9
+signal IOB9
+signal IOC8
+signal IOD8
+signal IOA8
+signal IOB8
+signal IOE8
+signal IOF8
+signal IOC7
+signal IOD7
+signal IOA7
+signal IOB7
+signal IOE7
+signal IOF7
+signal IOA6
+signal IOB6
+signal IOE6
+signal IOC6
+signal IOB5
+signal IOC5
+signal IOD6
+signal IOD5
+signal IOA4
+signal IOB4
+signal IOB3
+signal IOC4
+
+
+register BSR 930
+register BR 1
+register DIR 32
+
+instruction length 10
+
+instruction BYPASS 1111111111 BR
+instruction EXTEST 0000000000 BSR
+instruction SAMPLE/PRELOAD 0000000101 BSR
+instruction IDCODE 0000000110 DIR
+
+bit 929 O 1 IOC3 928 1 Z
+bit 928 C 1 *
+bit 927 I 1 IOC3
+bit 926 O 1 IOC2 925 1 Z
+bit 925 C 1 *
+bit 924 I 1 IOC2
+bit 923 O 1 IOD3 922 1 Z
+bit 922 C 1 *
+bit 921 I 1 IOD3
+bit 920 O 1 IOD2 919 1 Z
+bit 919 C 1 *
+bit 918 I 1 IOD2
+bit 917 O 1 IOD4 916 1 Z
+bit 916 C 1 *
+bit 915 I 1 IOD4
+bit 914 O 1 IOD1 913 1 Z
+bit 913 C 1 *
+bit 912 I 1 IOD1
+bit 911 O 1 IOE4 910 1 Z
+bit 910 C 1 *
+bit 909 I 1 IOE4
+bit 908 O 1 IOE5 907 1 Z
+bit 907 C 1 *
+bit 906 I 1 IOE5
+bit 905 O 1 IOF3 904 1 Z
+bit 904 C 1 *
+bit 903 I 1 IOF3
+bit 902 O 1 IOE3 901 1 Z
+bit 901 C 1 *
+bit 900 I 1 IOE3
+bit 899 O 1 IOE2 898 1 Z
+bit 898 C 1 *
+bit 897 I 1 IOE2
+bit 896 O 1 IOF4 895 1 Z
+bit 895 C 1 *
+bit 894 I 1 IOF4
+bit 893 O 1 IOF5 892 1 Z
+bit 892 C 1 *
+bit 891 I 1 IOF5
+bit 890 O 1 IOF2 889 1 Z
+bit 889 C 1 *
+bit 888 I 1 IOF2
+bit 887 O 1 IOF1 886 1 Z
+bit 886 C 1 *
+bit 885 I 1 IOF1
+bit 884 O 1 IOF6 883 1 Z
+bit 883 C 1 *
+bit 882 I 1 IOF6
+bit 881 O 1 IOG5 880 1 Z
+bit 880 C 1 *
+bit 879 I 1 IOG5
+bit 878 O 1 IOG1 877 1 Z
+bit 877 C 1 *
+bit 876 I 1 IOG1
+bit 875 O 1 IOG2 874 1 Z
+bit 874 C 1 *
+bit 873 I 1 IOG2
+bit 872 O 1 IOG6 871 1 Z
+bit 871 C 1 *
+bit 870 I 1 IOG6
+bit 869 O 1 IOG7 868 1 Z
+bit 868 C 1 *
+bit 867 I 1 IOG7
+bit 866 O 1 IOG3 865 1 Z
+bit 865 C 1 *
+bit 864 I 1 IOG3
+bit 863 O 1 IOG4 862 1 Z
+bit 862 C 1 *
+bit 861 I 1 IOG4
+bit 860 O 1 IOH7 859 1 Z
+bit 859 C 1 *
+bit 858 I 1 IOH7
+bit 857 O 1 IOH1 856 1 Z
+bit 856 C 1 *
+bit 855 I 1 IOH1
+bit 854 O 1 IOH2 853 1 Z
+bit 853 C 1 *
+bit 852 I 1 IOH2
+bit 851 O 1 IOH3 850 1 Z
+bit 850 C 1 *
+bit 849 I 1 IOH3
+bit 848 O 1 IOH4 847 1 Z
+bit 847 C 1 *
+bit 846 I 1 IOH4
+bit 845 O 1 IOJ1 844 1 Z
+bit 844 C 1 *
+bit 843 I 1 IOJ1
+bit 842 O 1 IOJ2 841 1 Z
+bit 841 C 1 *
+bit 840 I 1 IOJ2
+bit 839 O 1 IOH5 838 1 Z
+bit 838 C 1 *
+bit 837 I 1 IOH5
+bit 836 O 1 IOH6 835 1 Z
+bit 835 C 1 *
+bit 834 I 1 IOH6
+bit 833 O 1 IOJ3 832 1 Z
+bit 832 C 1 *
+bit 831 I 1 IOJ3
+bit 830 O 1 IOJ4 829 1 Z
+bit 829 C 1 *
+bit 828 I 1 IOJ4
+bit 827 O 1 IOJ5 826 1 Z
+bit 826 C 1 *
+bit 825 I 1 IOJ5
+bit 824 O 1 IOJ6 823 1 Z
+bit 823 C 1 *
+bit 822 I 1 IOJ6
+bit 821 O 1 IOJ7 820 1 Z
+bit 820 C 1 *
+bit 819 I 1 IOJ7
+bit 818 O 1 IOJ8 817 1 Z
+bit 817 C 1 *
+bit 816 I 1 IOJ8
+bit 815 O 1 IOK2 814 1 Z
+bit 814 C 1 *
+bit 813 I 1 IOK2
+bit 812 O 1 *
+bit 811 O 1 *
+bit 810 I 1 DATA0
+bit 809 O 1 *
+bit 808 O 1 *
+bit 807 O 1 *
+bit 806 O 1 *
+bit 805 O 1 *
+bit 804 I 1 CLK0
+bit 803 O 1 *
+bit 802 O 1 *
+bit 801 I 1 CLK1
+bit 800 O 1 *
+bit 799 O 1 *
+bit 798 O 1 *
+bit 797 O 1 *
+bit 796 O 1 *
+bit 795 O 1 *
+bit 794 O 1 *
+bit 793 O 1 *
+bit 792 I 1 MSEL0
+bit 791 O 1 *
+bit 790 O 1 *
+bit 789 I 1 MSEL1
+bit 788 O 1 DCLK 787 1 Z
+bit 787 C 1 *
+bit 786 I 1 DCLK
+bit 785 O 1 IOL4 784 1 Z
+bit 784 C 1 *
+bit 783 I 1 IOL4
+bit 782 O 1 IOL8 781 1 Z
+bit 781 C 1 *
+bit 780 I 1 IOL8
+bit 779 O 1 IOM8 778 1 Z
+bit 778 C 1 *
+bit 777 I 1 IOM8
+bit 776 O 1 IOM2 775 1 Z
+bit 775 C 1 *
+bit 774 I 1 IOM2
+bit 773 O 1 IOM1 772 1 Z
+bit 772 C 1 *
+bit 771 I 1 IOM1
+bit 770 O 1 IOM5 769 1 Z
+bit 769 C 1 *
+bit 768 I 1 IOM5
+bit 767 O 1 IOM6 766 1 Z
+bit 766 C 1 *
+bit 765 I 1 IOM6
+bit 764 O 1 IOM4 763 1 Z
+bit 763 C 1 *
+bit 762 I 1 IOM4
+bit 761 O 1 IOM3 760 1 Z
+bit 760 C 1 *
+bit 759 I 1 IOM3
+bit 758 O 1 IOM7 757 1 Z
+bit 757 C 1 *
+bit 756 I 1 IOM7
+bit 755 O 1 ION6 754 1 Z
+bit 754 C 1 *
+bit 753 I 1 ION6
+bit 752 O 1 ION1 751 1 Z
+bit 751 C 1 *
+bit 750 I 1 ION1
+bit 749 O 1 ION2 748 1 Z
+bit 748 C 1 *
+bit 747 I 1 ION2
+bit 746 O 1 ION4 745 1 Z
+bit 745 C 1 *
+bit 744 I 1 ION4
+bit 743 O 1 ION3 742 1 Z
+bit 742 C 1 *
+bit 741 I 1 ION3
+bit 740 O 1 ION5 739 1 Z
+bit 739 C 1 *
+bit 738 I 1 ION5
+bit 737 O 1 ION7 736 1 Z
+bit 736 C 1 *
+bit 735 I 1 ION7
+bit 734 O 1 IOP7 733 1 Z
+bit 733 C 1 *
+bit 732 I 1 IOP7
+bit 731 O 1 IOP2 730 1 Z
+bit 730 C 1 *
+bit 729 I 1 IOP2
+bit 728 O 1 IOP1 727 1 Z
+bit 727 C 1 *
+bit 726 I 1 IOP1
+bit 725 O 1 IOP6 724 1 Z
+bit 724 C 1 *
+bit 723 I 1 IOP6
+bit 722 O 1 IOP5 721 1 Z
+bit 721 C 1 *
+bit 720 I 1 IOP5
+bit 719 O 1 IOP3 718 1 Z
+bit 718 C 1 *
+bit 717 I 1 IOP3
+bit 716 O 1 IOP4 715 1 Z
+bit 715 C 1 *
+bit 714 I 1 IOP4
+bit 713 O 1 IOR1 712 1 Z
+bit 712 C 1 *
+bit 711 I 1 IOR1
+bit 710 O 1 IOR2 709 1 Z
+bit 709 C 1 *
+bit 708 I 1 IOR2
+bit 707 O 1 IOR6 706 1 Z
+bit 706 C 1 *
+bit 705 I 1 IOR6
+bit 704 O 1 IOR5 703 1 Z
+bit 703 C 1 *
+bit 702 I 1 IOR5
+bit 701 O 1 IOR3 700 1 Z
+bit 700 C 1 *
+bit 699 I 1 IOR3
+bit 698 O 1 IOR4 697 1 Z
+bit 697 C 1 *
+bit 696 I 1 IOR4
+bit 695 O 1 IOT4 694 1 Z
+bit 694 C 1 *
+bit 693 I 1 IOT4
+bit 692 O 1 IOT2 691 1 Z
+bit 691 C 1 *
+bit 690 I 1 IOT2
+bit 689 O 1 IOT3 688 1 Z
+bit 688 C 1 *
+bit 687 I 1 IOT3
+bit 686 O 1 IOU1 685 1 Z
+bit 685 C 1 *
+bit 684 I 1 IOU1
+bit 683 O 1 IOU4 682 1 Z
+bit 682 C 1 *
+bit 681 I 1 IOU4
+bit 680 O 1 IOU2 679 1 Z
+bit 679 C 1 *
+bit 678 I 1 IOU2
+bit 677 O 1 IOU3 676 1 Z
+bit 676 C 1 *
+bit 675 I 1 IOU3
+bit 674 O 1 IOV2 673 1 Z
+bit 673 C 1 *
+bit 672 I 1 IOV2
+bit 671 O 1 IOV3 670 1 Z
+bit 670 C 1 *
+bit 669 I 1 IOV3
+bit 668 O 1 IOW3 667 1 Z
+bit 667 C 1 *
+bit 666 I 1 IOW3
+bit 665 O 1 IOY4 664 1 Z
+bit 664 C 1 *
+bit 663 I 1 IOY4
+bit 662 O 1 IOV4 661 1 Z
+bit 661 C 1 *
+bit 660 I 1 IOV4
+bit 659 O 1 IOW4 658 1 Z
+bit 658 C 1 *
+bit 657 I 1 IOW4
+bit 656 O 1 IOT5 655 1 Z
+bit 655 C 1 *
+bit 654 I 1 IOT5
+bit 653 O 1 IOU5 652 1 Z
+bit 652 C 1 *
+bit 651 I 1 IOU5
+bit 650 O 1 IOV5 649 1 Z
+bit 649 C 1 *
+bit 648 I 1 IOV5
+bit 647 O 1 IOW5 646 1 Z
+bit 646 C 1 *
+bit 645 I 1 IOW5
+bit 644 O 1 IOT6 643 1 Z
+bit 643 C 1 *
+bit 642 I 1 IOT6
+bit 641 O 1 IOT7 640 1 Z
+bit 640 C 1 *
+bit 639 I 1 IOT7
+bit 638 O 1 IOW6 637 1 Z
+bit 637 C 1 *
+bit 636 I 1 IOW6
+bit 635 O 1 IOY6 634 1 Z
+bit 634 C 1 *
+bit 633 I 1 IOY6
+bit 632 O 1 IOU6 631 1 Z
+bit 631 C 1 *
+bit 630 I 1 IOU6
+bit 629 O 1 IOV6 628 1 Z
+bit 628 C 1 *
+bit 627 I 1 IOV6
+bit 626 O 1 IOW7 625 1 Z
+bit 625 C 1 *
+bit 624 I 1 IOW7
+bit 623 O 1 IOY7 622 1 Z
+bit 622 C 1 *
+bit 621 I 1 IOY7
+bit 620 O 1 IOR7 619 1 Z
+bit 619 C 1 *
+bit 618 I 1 IOR7
+bit 617 O 1 IOT8 616 1 Z
+bit 616 C 1 *
+bit 615 I 1 IOT8
+bit 614 O 1 IOV7 613 1 Z
+bit 613 C 1 *
+bit 612 I 1 IOV7
+bit 611 O 1 IOU7 610 1 Z
+bit 610 C 1 *
+bit 609 I 1 IOU7
+bit 608 O 1 IOV8 607 1 Z
+bit 607 C 1 *
+bit 606 I 1 IOV8
+bit 605 O 1 IOU8 604 1 Z
+bit 604 C 1 *
+bit 603 I 1 IOU8
+bit 602 O 1 IOW8 601 1 Z
+bit 601 C 1 *
+bit 600 I 1 IOW8
+bit 599 O 1 IOY8 598 1 Z
+bit 598 C 1 *
+bit 597 I 1 IOY8
+bit 596 O 1 IOU9 595 1 Z
+bit 595 C 1 *
+bit 594 I 1 IOU9
+bit 593 O 1 IOV9 592 1 Z
+bit 592 C 1 *
+bit 591 I 1 IOV9
+bit 590 O 1 IOT9 589 1 Z
+bit 589 C 1 *
+bit 588 I 1 IOT9
+bit 587 O 1 IOR9 586 1 Z
+bit 586 C 1 *
+bit 585 I 1 IOR9
+bit 584 O 1 IOY9 583 1 Z
+bit 583 C 1 *
+bit 582 I 1 IOY9
+bit 581 O 1 IOW9 580 1 Z
+bit 580 C 1 *
+bit 579 I 1 IOW9
+bit 578 O 1 IOT10 577 1 Z
+bit 577 C 1 *
+bit 576 I 1 IOT10
+bit 575 O 1 IOU10 574 1 Z
+bit 574 C 1 *
+bit 573 I 1 IOU10
+bit 572 O 1 IOV10 571 1 Z
+bit 571 C 1 *
+bit 570 I 1 IOV10
+bit 569 O 1 IOW10 568 1 Z
+bit 568 C 1 *
+bit 567 I 1 IOW10
+bit 566 O 1 IOY10 565 1 Z
+bit 565 C 1 *
+bit 564 I 1 IOY10
+bit 563 O 1 IOV11 562 1 Z
+bit 562 C 1 *
+bit 561 I 1 IOV11
+bit 560 O 1 IOU11 559 1 Z
+bit 559 C 1 *
+bit 558 I 1 IOU11
+bit 557 O 1 IOW11 556 1 Z
+bit 556 C 1 *
+bit 555 I 1 IOW11
+bit 554 O 1 IOY11 553 1 Z
+bit 553 C 1 *
+bit 552 I 1 IOY11
+bit 551 O 1 IOR11 550 1 Z
+bit 550 C 1 *
+bit 549 I 1 IOR11
+bit 548 O 1 IOY12 547 1 Z
+bit 547 C 1 *
+bit 546 I 1 IOY12
+bit 545 O 1 IOW12 544 1 Z
+bit 544 C 1 *
+bit 543 I 1 IOW12
+bit 542 O 1 IOT11 541 1 Z
+bit 541 C 1 *
+bit 540 I 1 IOT11
+bit 539 O 1 IOT12 538 1 Z
+bit 538 C 1 *
+bit 537 I 1 IOT12
+bit 536 O 1 IOU12 535 1 Z
+bit 535 C 1 *
+bit 534 I 1 IOU12
+bit 533 O 1 IOV12 532 1 Z
+bit 532 C 1 *
+bit 531 I 1 IOV12
+bit 530 O 1 IOT13 529 1 Z
+bit 529 C 1 *
+bit 528 I 1 IOT13
+bit 527 O 1 IOR13 526 1 Z
+bit 526 C 1 *
+bit 525 I 1 IOR13
+bit 524 O 1 IOY13 523 1 Z
+bit 523 C 1 *
+bit 522 I 1 IOY13
+bit 521 O 1 IOW13 520 1 Z
+bit 520 C 1 *
+bit 519 I 1 IOW13
+bit 518 O 1 IOU13 517 1 Z
+bit 517 C 1 *
+bit 516 I 1 IOU13
+bit 515 O 1 IOV13 514 1 Z
+bit 514 C 1 *
+bit 513 I 1 IOV13
+bit 512 O 1 IOR14 511 1 Z
+bit 511 C 1 *
+bit 510 I 1 IOR14
+bit 509 O 1 IOT14 508 1 Z
+bit 508 C 1 *
+bit 507 I 1 IOT14
+bit 506 O 1 IOW14 505 1 Z
+bit 505 C 1 *
+bit 504 I 1 IOW14
+bit 503 O 1 IOY14 502 1 Z
+bit 502 C 1 *
+bit 501 I 1 IOY14
+bit 500 O 1 IOU14 499 1 Z
+bit 499 C 1 *
+bit 498 I 1 IOU14
+bit 497 O 1 IOV14 496 1 Z
+bit 496 C 1 *
+bit 495 I 1 IOV14
+bit 494 O 1 IOV15 493 1 Z
+bit 493 C 1 *
+bit 492 I 1 IOV15
+bit 491 O 1 IOU15 490 1 Z
+bit 490 C 1 *
+bit 489 I 1 IOU15
+bit 488 O 1 IOY15 487 1 Z
+bit 487 C 1 *
+bit 486 I 1 IOY15
+bit 485 O 1 IOW15 484 1 Z
+bit 484 C 1 *
+bit 483 I 1 IOW15
+bit 482 O 1 IOT15 481 1 Z
+bit 481 C 1 *
+bit 480 I 1 IOT15
+bit 479 O 1 IOT16 478 1 Z
+bit 478 C 1 *
+bit 477 I 1 IOT16
+bit 476 O 1 IOW16 475 1 Z
+bit 475 C 1 *
+bit 474 I 1 IOW16
+bit 473 O 1 IOV16 472 1 Z
+bit 472 C 1 *
+bit 471 I 1 IOV16
+bit 470 O 1 IOV17 469 1 Z
+bit 469 C 1 *
+bit 468 I 1 IOV17
+bit 467 O 1 IOU16 466 1 Z
+bit 466 C 1 *
+bit 465 I 1 IOU16
+bit 464 O 1 IOY17 463 1 Z
+bit 463 C 1 *
+bit 462 I 1 IOY17
+bit 461 O 1 IOW17 460 1 Z
+bit 460 C 1 *
+bit 459 I 1 IOW17
+bit 458 O 1 IOW18 457 1 Z
+bit 457 C 1 *
+bit 456 I 1 IOW18
+bit 455 O 1 IOV18 454 1 Z
+bit 454 C 1 *
+bit 453 I 1 IOV18
+bit 452 O 1 IOV19 451 1 Z
+bit 451 C 1 *
+bit 450 I 1 IOV19
+bit 449 O 1 IOU20 448 1 Z
+bit 448 C 1 *
+bit 447 I 1 IOU20
+bit 446 O 1 IOU18 445 1 Z
+bit 445 C 1 *
+bit 444 I 1 IOU18
+bit 443 O 1 IOU19 442 1 Z
+bit 442 C 1 *
+bit 441 I 1 IOU19
+bit 440 O 1 IOU17 439 1 Z
+bit 439 C 1 *
+bit 438 I 1 IOU17
+bit 437 O 1 IOT18 436 1 Z
+bit 436 C 1 *
+bit 435 I 1 IOT18
+bit 434 O 1 IOT19 433 1 Z
+bit 433 C 1 *
+bit 432 I 1 IOT19
+bit 431 O 1 IOT17 430 1 Z
+bit 430 C 1 *
+bit 429 I 1 IOT17
+bit 428 O 1 IOR16 427 1 Z
+bit 427 C 1 *
+bit 426 I 1 IOR16
+bit 425 O 1 IOR19 424 1 Z
+bit 424 C 1 *
+bit 423 I 1 IOR19
+bit 422 O 1 IOR20 421 1 Z
+bit 421 C 1 *
+bit 420 I 1 IOR20
+bit 419 O 1 IOR17 418 1 Z
+bit 418 C 1 *
+bit 417 I 1 IOR17
+bit 416 O 1 IOR18 415 1 Z
+bit 415 C 1 *
+bit 414 I 1 IOR18
+bit 413 O 1 IOR15 412 1 Z
+bit 412 C 1 *
+bit 411 I 1 IOR15
+bit 410 O 1 IOP14 409 1 Z
+bit 409 C 1 *
+bit 408 I 1 IOP14
+bit 407 O 1 IOP18 406 1 Z
+bit 406 C 1 *
+bit 405 I 1 IOP18
+bit 404 O 1 IOP17 403 1 Z
+bit 403 C 1 *
+bit 402 I 1 IOP17
+bit 401 O 1 IOP16 400 1 Z
+bit 400 C 1 *
+bit 399 I 1 IOP16
+bit 398 O 1 IOP15 397 1 Z
+bit 397 C 1 *
+bit 396 I 1 IOP15
+bit 395 O 1 IOP19 394 1 Z
+bit 394 C 1 *
+bit 393 I 1 IOP19
+bit 392 O 1 IOP20 391 1 Z
+bit 391 C 1 *
+bit 390 I 1 IOP20
+bit 389 O 1 ION14 388 1 Z
+bit 388 C 1 *
+bit 387 I 1 ION14
+bit 386 O 1 ION18 385 1 Z
+bit 385 C 1 *
+bit 384 I 1 ION18
+bit 383 O 1 ION17 382 1 Z
+bit 382 C 1 *
+bit 381 I 1 ION17
+bit 380 O 1 ION19 379 1 Z
+bit 379 C 1 *
+bit 378 I 1 ION19
+bit 377 O 1 ION20 376 1 Z
+bit 376 C 1 *
+bit 375 I 1 ION20
+bit 374 O 1 ION16 373 1 Z
+bit 373 C 1 *
+bit 372 I 1 ION16
+bit 371 O 1 ION15 370 1 Z
+bit 370 C 1 *
+bit 369 I 1 ION15
+bit 368 O 1 IOM18 367 1 Z
+bit 367 C 1 *
+bit 366 I 1 IOM18
+bit 365 O 1 IOM17 364 1 Z
+bit 364 C 1 *
+bit 363 I 1 IOM17
+bit 362 O 1 IOM15 361 1 Z
+bit 361 C 1 *
+bit 360 I 1 IOM15
+bit 359 O 1 IOM16 358 1 Z
+bit 358 C 1 *
+bit 357 I 1 IOM16
+bit 356 O 1 IOM20 355 1 Z
+bit 355 C 1 *
+bit 354 I 1 IOM20
+bit 353 O 1 IOM19 352 1 Z
+bit 352 C 1 *
+bit 351 I 1 IOM19
+bit 350 O 1 IOM14 349 1 Z
+bit 349 C 1 *
+bit 348 I 1 IOM14
+bit 347 O 1 IOM13 346 1 Z
+bit 346 C 1 *
+bit 345 I 1 IOM13
+bit 344 O 1 IOL13 343 1 Z
+bit 343 C 1 *
+bit 342 I 1 IOL13
+bit 341 O 1 *
+bit 340 O 1 *
+bit 339 O 1 *
+bit 338 O 1 *
+bit 337 O 1 *
+bit 336 O 1 *
+bit 335 O 1 *
+bit 334 O 1 *
+bit 333 I 1 CLK3
+bit 332 O 1 *
+bit 331 O 1 *
+bit 330 I 1 CLK2
+bit 329 O 1 IOK19 328 1 Z
+bit 328 C 1 *
+bit 327 I 1 IOK19
+bit 326 O 1 IOJ13 325 1 Z
+bit 325 C 1 *
+bit 324 I 1 IOJ13
+bit 323 O 1 IOK16 322 1 Z
+bit 322 C 1 *
+bit 321 I 1 IOK16
+bit 320 O 1 IOK15 319 1 Z
+bit 319 C 1 *
+bit 318 I 1 IOK15
+bit 317 O 1 IOJ18 316 1 Z
+bit 316 C 1 *
+bit 315 I 1 IOJ18
+bit 314 O 1 IOJ17 313 1 Z
+bit 313 C 1 *
+bit 312 I 1 IOJ17
+bit 311 O 1 IOJ14 310 1 Z
+bit 310 C 1 *
+bit 309 I 1 IOJ14
+bit 308 O 1 IOH14 307 1 Z
+bit 307 C 1 *
+bit 306 I 1 IOH14
+bit 305 O 1 IOJ20 304 1 Z
+bit 304 C 1 *
+bit 303 I 1 IOJ20
+bit 302 O 1 IOJ19 301 1 Z
+bit 301 C 1 *
+bit 300 I 1 IOJ19
+bit 299 O 1 IOJ15 298 1 Z
+bit 298 C 1 *
+bit 297 I 1 IOJ15
+bit 296 O 1 IOJ16 295 1 Z
+bit 295 C 1 *
+bit 294 I 1 IOJ16
+bit 293 O 1 IOH20 292 1 Z
+bit 292 C 1 *
+bit 291 I 1 IOH20
+bit 290 O 1 IOH19 289 1 Z
+bit 289 C 1 *
+bit 288 I 1 IOH19
+bit 287 O 1 IOH17 286 1 Z
+bit 286 C 1 *
+bit 285 I 1 IOH17
+bit 284 O 1 IOH18 283 1 Z
+bit 283 C 1 *
+bit 282 I 1 IOH18
+bit 281 O 1 IOH16 280 1 Z
+bit 280 C 1 *
+bit 279 I 1 IOH16
+bit 278 O 1 IOG17 277 1 Z
+bit 277 C 1 *
+bit 276 I 1 IOG17
+bit 275 O 1 IOG18 274 1 Z
+bit 274 C 1 *
+bit 273 I 1 IOG18
+bit 272 O 1 IOH15 271 1 Z
+bit 271 C 1 *
+bit 270 I 1 IOH15
+bit 269 O 1 IOG14 268 1 Z
+bit 268 C 1 *
+bit 267 I 1 IOG14
+bit 266 O 1 IOG19 265 1 Z
+bit 265 C 1 *
+bit 264 I 1 IOG19
+bit 263 O 1 IOG20 262 1 Z
+bit 262 C 1 *
+bit 261 I 1 IOG20
+bit 260 O 1 IOG15 259 1 Z
+bit 259 C 1 *
+bit 258 I 1 IOG15
+bit 257 O 1 IOG16 256 1 Z
+bit 256 C 1 *
+bit 255 I 1 IOG16
+bit 254 O 1 IOF20 253 1 Z
+bit 253 C 1 *
+bit 252 I 1 IOF20
+bit 251 O 1 IOF19 250 1 Z
+bit 250 C 1 *
+bit 249 I 1 IOF19
+bit 248 O 1 IOF15 247 1 Z
+bit 247 C 1 *
+bit 246 I 1 IOF15
+bit 245 O 1 IOF16 244 1 Z
+bit 244 C 1 *
+bit 243 I 1 IOF16
+bit 242 O 1 IOE19 241 1 Z
+bit 241 C 1 *
+bit 240 I 1 IOE19
+bit 239 O 1 IOE18 238 1 Z
+bit 238 C 1 *
+bit 237 I 1 IOE18
+bit 236 O 1 IOF18 235 1 Z
+bit 235 C 1 *
+bit 234 I 1 IOF18
+bit 233 O 1 IOF17 232 1 Z
+bit 232 C 1 *
+bit 231 I 1 IOF17
+bit 230 O 1 IOE17 229 1 Z
+bit 229 C 1 *
+bit 228 I 1 IOE17
+bit 227 O 1 IOD20 226 1 Z
+bit 226 C 1 *
+bit 225 I 1 IOD20
+bit 224 O 1 IOD17 223 1 Z
+bit 223 C 1 *
+bit 222 I 1 IOD17
+bit 221 O 1 IOD19 220 1 Z
+bit 220 C 1 *
+bit 219 I 1 IOD19
+bit 218 O 1 IOD18 217 1 Z
+bit 217 C 1 *
+bit 216 I 1 IOD18
+bit 215 O 1 IOC19 214 1 Z
+bit 214 C 1 *
+bit 213 I 1 IOC19
+bit 212 O 1 IOC18 211 1 Z
+bit 211 C 1 *
+bit 210 I 1 IOC18
+bit 209 O 1 IOC17 208 1 Z
+bit 208 C 1 *
+bit 207 I 1 IOC17
+bit 206 O 1 IOB18 205 1 Z
+bit 205 C 1 *
+bit 204 I 1 IOB18
+bit 203 O 1 IOB17 202 1 Z
+bit 202 C 1 *
+bit 201 I 1 IOB17
+bit 200 O 1 IOA17 199 1 Z
+bit 199 C 1 *
+bit 198 I 1 IOA17
+bit 197 O 1 IOC16 196 1 Z
+bit 196 C 1 *
+bit 195 I 1 IOC16
+bit 194 O 1 IOB16 193 1 Z
+bit 193 C 1 *
+bit 192 I 1 IOB16
+bit 191 O 1 IOD16 190 1 Z
+bit 190 C 1 *
+bit 189 I 1 IOD16
+bit 188 O 1 IOE16 187 1 Z
+bit 187 C 1 *
+bit 186 I 1 IOE16
+bit 185 O 1 IOC15 184 1 Z
+bit 184 C 1 *
+bit 183 I 1 IOC15
+bit 182 O 1 IOD15 181 1 Z
+bit 181 C 1 *
+bit 180 I 1 IOD15
+bit 179 O 1 IOB15 178 1 Z
+bit 178 C 1 *
+bit 177 I 1 IOB15
+bit 176 O 1 IOA15 175 1 Z
+bit 175 C 1 *
+bit 174 I 1 IOA15
+bit 173 O 1 IOE15 172 1 Z
+bit 172 C 1 *
+bit 171 I 1 IOE15
+bit 170 O 1 IOF14 169 1 Z
+bit 169 C 1 *
+bit 168 I 1 IOF14
+bit 167 O 1 IOA14 166 1 Z
+bit 166 C 1 *
+bit 165 I 1 IOA14
+bit 164 O 1 IOB14 163 1 Z
+bit 163 C 1 *
+bit 162 I 1 IOB14
+bit 161 O 1 IOE14 160 1 Z
+bit 160 C 1 *
+bit 159 I 1 IOE14
+bit 158 O 1 IOE13 157 1 Z
+bit 157 C 1 *
+bit 156 I 1 IOE13
+bit 155 O 1 IOC14 154 1 Z
+bit 154 C 1 *
+bit 153 I 1 IOC14
+bit 152 O 1 IOD14 151 1 Z
+bit 151 C 1 *
+bit 150 I 1 IOD14
+bit 149 O 1 IOA13 148 1 Z
+bit 148 C 1 *
+bit 147 I 1 IOA13
+bit 146 O 1 IOB13 145 1 Z
+bit 145 C 1 *
+bit 144 I 1 IOB13
+bit 143 O 1 IOC13 142 1 Z
+bit 142 C 1 *
+bit 141 I 1 IOC13
+bit 140 O 1 IOD13 139 1 Z
+bit 139 C 1 *
+bit 138 I 1 IOD13
+bit 137 O 1 IOE12 136 1 Z
+bit 136 C 1 *
+bit 135 I 1 IOE12
+bit 134 O 1 IOF12 133 1 Z
+bit 133 C 1 *
+bit 132 I 1 IOF12
+bit 131 O 1 IOA12 130 1 Z
+bit 130 C 1 *
+bit 129 I 1 IOA12
+bit 128 O 1 IOB12 127 1 Z
+bit 127 C 1 *
+bit 126 I 1 IOB12
+bit 125 O 1 IOD12 124 1 Z
+bit 124 C 1 *
+bit 123 I 1 IOD12
+bit 122 O 1 IOC12 121 1 Z
+bit 121 C 1 *
+bit 120 I 1 IOC12
+bit 119 O 1 IOE11 118 1 Z
+bit 118 C 1 *
+bit 117 I 1 IOE11
+bit 116 O 1 IOA11 115 1 Z
+bit 115 C 1 *
+bit 114 I 1 IOA11
+bit 113 O 1 IOB11 112 1 Z
+bit 112 C 1 *
+bit 111 I 1 IOB11
+bit 110 O 1 IOD11 109 1 Z
+bit 109 C 1 *
+bit 108 I 1 IOD11
+bit 107 O 1 IOC11 106 1 Z
+bit 106 C 1 *
+bit 105 I 1 IOC11
+bit 104 O 1 IOD10 103 1 Z
+bit 103 C 1 *
+bit 102 I 1 IOD10
+bit 101 O 1 IOC10 100 1 Z
+bit 100 C 1 *
+bit 99 I 1 IOC10
+bit 98 O 1 IOF10 97 1 Z
+bit 97 C 1 *
+bit 96 I 1 IOF10
+bit 95 O 1 IOA10 94 1 Z
+bit 94 C 1 *
+bit 93 I 1 IOA10
+bit 92 O 1 IOB10 91 1 Z
+bit 91 C 1 *
+bit 90 I 1 IOB10
+bit 89 O 1 IOE10 88 1 Z
+bit 88 C 1 *
+bit 87 I 1 IOE10
+bit 86 O 1 IOE9 85 1 Z
+bit 85 C 1 *
+bit 84 I 1 IOE9
+bit 83 O 1 IOC9 82 1 Z
+bit 82 C 1 *
+bit 81 I 1 IOC9
+bit 80 O 1 IOD9 79 1 Z
+bit 79 C 1 *
+bit 78 I 1 IOD9
+bit 77 O 1 IOA9 76 1 Z
+bit 76 C 1 *
+bit 75 I 1 IOA9
+bit 74 O 1 IOB9 73 1 Z
+bit 73 C 1 *
+bit 72 I 1 IOB9
+bit 71 O 1 IOC8 70 1 Z
+bit 70 C 1 *
+bit 69 I 1 IOC8
+bit 68 O 1 IOD8 67 1 Z
+bit 67 C 1 *
+bit 66 I 1 IOD8
+bit 65 O 1 IOA8 64 1 Z
+bit 64 C 1 *
+bit 63 I 1 IOA8
+bit 62 O 1 IOB8 61 1 Z
+bit 61 C 1 *
+bit 60 I 1 IOB8
+bit 59 O 1 IOE8 58 1 Z
+bit 58 C 1 *
+bit 57 I 1 IOE8
+bit 56 O 1 IOF8 55 1 Z
+bit 55 C 1 *
+bit 54 I 1 IOF8
+bit 53 O 1 IOC7 52 1 Z
+bit 52 C 1 *
+bit 51 I 1 IOC7
+bit 50 O 1 IOD7 49 1 Z
+bit 49 C 1 *
+bit 48 I 1 IOD7
+bit 47 O 1 IOA7 46 1 Z
+bit 46 C 1 *
+bit 45 I 1 IOA7
+bit 44 O 1 IOB7 43 1 Z
+bit 43 C 1 *
+bit 42 I 1 IOB7
+bit 41 O 1 IOE7 40 1 Z
+bit 40 C 1 *
+bit 39 I 1 IOE7
+bit 38 O 1 IOF7 37 1 Z
+bit 37 C 1 *
+bit 36 I 1 IOF7
+bit 35 O 1 IOA6 34 1 Z
+bit 34 C 1 *
+bit 33 I 1 IOA6
+bit 32 O 1 IOB6 31 1 Z
+bit 31 C 1 *
+bit 30 I 1 IOB6
+bit 29 O 1 IOE6 28 1 Z
+bit 28 C 1 *
+bit 27 I 1 IOE6
+bit 26 O 1 IOC6 25 1 Z
+bit 25 C 1 *
+bit 24 I 1 IOC6
+bit 23 O 1 IOB5 22 1 Z
+bit 22 C 1 *
+bit 21 I 1 IOB5
+bit 20 O 1 IOC5 19 1 Z
+bit 19 C 1 *
+bit 18 I 1 IOC5
+bit 17 O 1 IOD6 16 1 Z
+bit 16 C 1 *
+bit 15 I 1 IOD6
+bit 14 O 1 IOD5 13 1 Z
+bit 13 C 1 *
+bit 12 I 1 IOD5
+bit 11 O 1 IOA4 10 1 Z
+bit 10 C 1 *
+bit 9 I 1 IOA4
+bit 8 O 1 IOB4 7 1 Z
+bit 7 C 1 *
+bit 6 I 1 IOB4
+bit 5 O 1 IOB3 4 1 Z
+bit 4 C 1 *
+bit 3 I 1 IOB3
+bit 2 O 1 IOC4 1 1 Z
+bit 1 C 1 *
+bit 0 I 1 IOC4
--- /dev/null
+#
+# $Id$
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Kent Palmkvist <kentp@isy.liu.se>
+#
+
+# bits 31-28 of the Device Identification Register
+0000 ep1c6q240 0
--- /dev/null
+#
+# $Id$
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Kent Palmkvist <kentp@isy.liu.se>
+#
+
+# JTAG declarations for EP1C6Q240 idcode 00000010000010000010000011011101
+# generated on Thu Jun 30 23:25:36 2005 by /home/tde/kentp/bsdl2jtag_kp.pl 0.1 from /home/tde/kentp/ep1c6q240_kp.bsd
+signal IO13
+signal IO93
+signal IO113
+signal IO203
+signal IO174
+signal IO41
+signal IO38
+signal IO127
+signal IO73
+signal IO64
+signal TMS
+signal IO83
+signal IO7
+signal IO85
+signal IO107
+signal IO118
+signal IO2
+signal IO234
+signal IO239
+signal IO135
+signal IO218
+signal IO98
+signal IO167
+signal IO137
+signal IO236
+signal IO14
+signal MSEL0
+signal IO221
+signal IO58
+signal IO184
+signal IO49
+signal IO18
+signal IO97
+signal TCK
+signal IO143
+signal IO186
+signal CLK2
+signal IO81
+signal IO63
+signal IO177
+signal IO123
+signal IO100
+signal IO144
+signal IO162
+signal IO185
+signal IO20
+signal IO198
+signal IO74
+signal IO104
+signal IO21
+signal DCLK
+signal IO217
+signal IO68
+signal IO164
+signal IO139
+signal IO45
+signal IO228
+signal IO238
+signal IO114
+signal IO188
+signal IO205
+signal IO116
+signal IO102
+signal GND
+signal IO222
+signal IO176
+signal IO56
+signal IO179
+signal IO165
+signal IO240
+signal IO1
+signal IO76
+signal IO182
+signal IO53
+signal IO200
+signal DATA0
+signal IO161
+signal IO24
+signal IO78
+signal IO94
+signal IO43
+signal IO4
+signal IO195
+signal IO16
+signal CLK0
+signal IO214
+signal IO121
+signal VCC
+signal IO47
+signal IO61
+signal IO160
+signal IO11
+signal IO82
+signal IO187
+signal IO65
+signal IO180
+signal IO213
+signal IO15
+signal IO88
+signal IO220
+signal IO156
+signal IO226
+signal IO158
+signal TDO
+signal IO126
+signal IO215
+signal IO134
+signal IO206
+signal IO23
+signal IO122
+signal IO169
+signal IO99
+signal IO54
+signal IO119
+signal IO80
+signal IO95
+signal IO128
+signal IO17
+signal IO106
+signal IO59
+signal IO202
+signal IO67
+signal IO124
+signal IO168
+signal IO132
+signal IO108
+signal IO235
+signal IO12
+signal NCONFIG
+signal NCE
+signal IO224
+signal IO233
+signal IO199
+signal IO183
+signal NCEO
+signal IO48
+signal IO19
+signal IO131
+signal IO136
+signal IO39
+signal IO96
+signal MSEL1
+signal IO6
+signal IO178
+signal IO101
+signal IO87
+signal IO175
+signal IO138
+signal TDI
+signal IO196
+signal IO193
+signal IO159
+signal IO237
+signal IO125
+signal IO105
+signal IO86
+signal IO117
+signal IO163
+signal CLK3
+signal IO140
+signal IO194
+signal IO5
+signal IO75
+signal IO50
+signal IO84
+signal IO181
+signal IO225
+signal IO170
+signal NSTATUS
+signal IO141
+signal IO207
+signal IO103
+signal IO120
+signal IO8
+signal IO166
+signal IO208
+signal CONF_DONE
+signal IO216
+signal IO79
+signal IO66
+signal IO57
+signal IO62
+signal IO77
+signal IO133
+signal IO223
+signal IO3
+signal IO55
+signal IO173
+signal IO219
+signal IO227
+signal IO60
+signal IO46
+signal IO44
+signal IO197
+signal IO204
+signal CLK1
+signal IO42
+signal IO115
+signal IO37
+signal IO201
+register BYPASS 1
+register BSR 582
+register IOCSR 3366
+register DEVICE_ID 32
+instruction length 10
+instruction BYPASS 1111111111 BYPASS
+instruction IDCODE 0000000110 DEVICE_ID
+# instruction USERCODE 0000000111 <unspecified>
+instruction SAMPLE/PRELOAD 0000000101 BSR
+instruction EXTEST 0000000000 BSR
+# instruction CLAMP 0000001010 <unspecified>
+# instruction HIGHZ 0000001011 <unspecified>
+instruction CONFIG_IO 0000001101 IOCSR
+bit 0 I ? IO240
+bit 1 C 1 *
+bit 2 O ? IO240 1 1 Z
+bit 3 I ? IO239
+bit 4 C 1 *
+bit 5 O ? IO239 4 1 Z
+bit 6 I ? IO238
+bit 7 C 1 *
+bit 8 O ? IO238 7 1 Z
+bit 9 I ? IO237
+bit 10 C 1 *
+bit 11 O ? IO237 10 1 Z
+bit 12 I ? IO236
+bit 13 C 1 *
+bit 14 O ? IO236 13 1 Z
+bit 15 I ? IO235
+bit 16 C 1 *
+bit 17 O ? IO235 16 1 Z
+bit 18 I ? IO234
+bit 19 C 1 *
+bit 20 O ? IO234 19 1 Z
+bit 21 I ? IO233
+bit 22 C 1 *
+bit 23 O ? IO233 22 1 Z
+bit 24 I ? IO228
+bit 25 C 1 *
+bit 26 O ? IO228 25 1 Z
+bit 27 I ? IO227
+bit 28 C 1 *
+bit 29 O ? IO227 28 1 Z
+bit 30 I ? IO226
+bit 31 C 1 *
+bit 32 O ? IO226 31 1 Z
+bit 33 I ? IO225
+bit 34 C 1 *
+bit 35 O ? IO225 34 1 Z
+bit 36 I ? IO224
+bit 37 C 1 *
+bit 38 O ? IO224 37 1 Z
+bit 39 I ? IO223
+bit 40 C 1 *
+bit 41 O ? IO223 40 1 Z
+bit 42 I ? IO222
+bit 43 C 1 *
+bit 44 O ? IO222 43 1 Z
+bit 45 I ? IO221
+bit 46 C 1 *
+bit 47 O ? IO221 46 1 Z
+bit 48 I ? IO220
+bit 49 C 1 *
+bit 50 O ? IO220 49 1 Z
+bit 51 I ? IO219
+bit 52 C 1 *
+bit 53 O ? IO219 52 1 Z
+bit 54 I ? IO218
+bit 55 C 1 *
+bit 56 O ? IO218 55 1 Z
+bit 57 I ? IO217
+bit 58 C 1 *
+bit 59 O ? IO217 58 1 Z
+bit 60 I ? IO216
+bit 61 C 1 *
+bit 62 O ? IO216 61 1 Z
+bit 63 I ? IO215
+bit 64 C 1 *
+bit 65 O ? IO215 64 1 Z
+bit 66 I ? IO214
+bit 67 C 1 *
+bit 68 O ? IO214 67 1 Z
+bit 69 I ? IO213
+bit 70 C 1 *
+bit 71 O ? IO213 70 1 Z
+bit 72 I ? IO208
+bit 73 C 1 *
+bit 74 O ? IO208 73 1 Z
+bit 75 I ? IO207
+bit 76 C 1 *
+bit 77 O ? IO207 76 1 Z
+bit 78 I ? IO206
+bit 79 C 1 *
+bit 80 O ? IO206 79 1 Z
+bit 81 I ? IO205
+bit 82 C 1 *
+bit 83 O ? IO205 82 1 Z
+bit 84 I ? IO204
+bit 85 C 1 *
+bit 86 O ? IO204 85 1 Z
+bit 87 I ? IO203
+bit 88 C 1 *
+bit 89 O ? IO203 88 1 Z
+bit 90 I ? IO202
+bit 91 C 1 *
+bit 92 O ? IO202 91 1 Z
+bit 93 I ? IO201
+bit 94 C 1 *
+bit 95 O ? IO201 94 1 Z
+bit 96 I ? IO200
+bit 97 C 1 *
+bit 98 O ? IO200 97 1 Z
+bit 99 I ? IO199
+bit 100 C 1 *
+bit 101 O ? IO199 100 1 Z
+bit 102 I ? IO198
+bit 103 C 1 *
+bit 104 O ? IO198 103 1 Z
+bit 105 I ? IO197
+bit 106 C 1 *
+bit 107 O ? IO197 106 1 Z
+bit 108 I ? IO196
+bit 109 C 1 *
+bit 110 O ? IO196 109 1 Z
+bit 111 I ? IO195
+bit 112 C 1 *
+bit 113 O ? IO195 112 1 Z
+bit 114 I ? IO194
+bit 115 C 1 *
+bit 116 O ? IO194 115 1 Z
+bit 117 I ? IO193
+bit 118 C 1 *
+bit 119 O ? IO193 118 1 Z
+bit 120 I ? IO188
+bit 121 C 1 *
+bit 122 O ? IO188 121 1 Z
+bit 123 I ? IO187
+bit 124 C 1 *
+bit 125 O ? IO187 124 1 Z
+bit 126 I ? IO186
+bit 127 C 1 *
+bit 128 O ? IO186 127 1 Z
+bit 129 I ? IO185
+bit 130 C 1 *
+bit 131 O ? IO185 130 1 Z
+bit 132 I ? IO184
+bit 133 C 1 *
+bit 134 O ? IO184 133 1 Z
+bit 135 I ? IO183
+bit 136 C 1 *
+bit 137 O ? IO183 136 1 Z
+bit 138 I ? IO182
+bit 139 C 1 *
+bit 140 O ? IO182 139 1 Z
+bit 141 I ? IO181
+bit 142 C 1 *
+bit 143 O ? IO181 142 1 Z
+bit 144 I ? IO180
+bit 145 C 1 *
+bit 146 O ? IO180 145 1 Z
+bit 147 I ? IO179
+bit 148 C 1 *
+bit 149 O ? IO179 148 1 Z
+bit 150 I ? IO178
+bit 151 C 1 *
+bit 152 O ? IO178 151 1 Z
+bit 153 I ? IO177
+bit 154 C 1 *
+bit 155 O ? IO177 154 1 Z
+bit 156 I ? IO176
+bit 157 C 1 *
+bit 158 O ? IO176 157 1 Z
+bit 159 I ? IO175
+bit 160 C 1 *
+bit 161 O ? IO175 160 1 Z
+bit 162 I ? IO174
+bit 163 C 1 *
+bit 164 O ? IO174 163 1 Z
+bit 165 I ? IO173
+bit 166 C 1 *
+bit 167 O ? IO173 166 1 Z
+bit 168 I ? IO170
+bit 169 C 1 *
+bit 170 O ? IO170 169 1 Z
+bit 171 I ? IO169
+bit 172 C 1 *
+bit 173 O ? IO169 172 1 Z
+bit 174 I ? IO168
+bit 175 C 1 *
+bit 176 O ? IO168 175 1 Z
+bit 177 I ? IO167
+bit 178 C 1 *
+bit 179 O ? IO167 178 1 Z
+bit 180 I ? IO166
+bit 181 C 1 *
+bit 182 O ? IO166 181 1 Z
+bit 183 I ? IO165
+bit 184 C 1 *
+bit 185 O ? IO165 184 1 Z
+bit 186 I ? IO164
+bit 187 C 1 *
+bit 188 O ? IO164 187 1 Z
+bit 189 I ? IO163
+bit 190 C 1 *
+bit 191 O ? IO163 190 1 Z
+bit 192 I ? IO162
+bit 193 C 1 *
+bit 194 O ? IO162 193 1 Z
+bit 195 I ? IO161
+bit 196 C 1 *
+bit 197 O ? IO161 196 1 Z
+bit 198 I ? IO160
+bit 199 C 1 *
+bit 200 O ? IO160 199 1 Z
+bit 201 I ? IO159
+bit 202 C 1 *
+bit 203 O ? IO159 202 1 Z
+bit 204 I ? IO158
+bit 205 C 1 *
+bit 206 O ? IO158 205 1 Z
+bit 207 I ? IO156
+bit 208 C 1 *
+bit 209 O ? IO156 208 1 Z
+bit 210 I ? CLK2
+bit 211 X ? *
+bit 212 X ? *
+bit 213 X ? *
+bit 214 X 1 *
+bit 215 X ? *
+bit 216 X ? *
+bit 217 X 1 *
+bit 218 X ? *
+bit 219 X ? *
+bit 220 X 1 *
+bit 221 X ? *
+bit 222 I ? IO144
+bit 223 C 1 *
+bit 224 O ? IO144 223 1 Z
+bit 225 I ? IO143
+bit 226 C 1 *
+bit 227 O ? IO143 226 1 Z
+bit 228 I ? IO141
+bit 229 C 1 *
+bit 230 O ? IO141 229 1 Z
+bit 231 I ? IO140
+bit 232 C 1 *
+bit 233 O ? IO140 232 1 Z
+bit 234 I ? IO139
+bit 235 C 1 *
+bit 236 O ? IO139 235 1 Z
+bit 237 I ? IO138
+bit 238 C 1 *
+bit 239 O ? IO138 238 1 Z
+bit 240 I ? IO137
+bit 241 C 1 *
+bit 242 O ? IO137 241 1 Z
+bit 243 I ? IO136
+bit 244 C 1 *
+bit 245 O ? IO136 244 1 Z
+bit 246 I ? IO135
+bit 247 C 1 *
+bit 248 O ? IO135 247 1 Z
+bit 249 I ? IO134
+bit 250 C 1 *
+bit 251 O ? IO134 250 1 Z
+bit 252 I ? IO133
+bit 253 C 1 *
+bit 254 O ? IO133 253 1 Z
+bit 255 I ? IO132
+bit 256 C 1 *
+bit 257 O ? IO132 256 1 Z
+bit 258 I ? IO131
+bit 259 C 1 *
+bit 260 O ? IO131 259 1 Z
+bit 261 I ? IO128
+bit 262 C 1 *
+bit 263 O ? IO128 262 1 Z
+bit 264 I ? IO127
+bit 265 C 1 *
+bit 266 O ? IO127 265 1 Z
+bit 267 I ? IO126
+bit 268 C 1 *
+bit 269 O ? IO126 268 1 Z
+bit 270 I ? IO125
+bit 271 C 1 *
+bit 272 O ? IO125 271 1 Z
+bit 273 I ? IO124
+bit 274 C 1 *
+bit 275 O ? IO124 274 1 Z
+bit 276 I ? IO123
+bit 277 C 1 *
+bit 278 O ? IO123 277 1 Z
+bit 279 I ? IO122
+bit 280 C 1 *
+bit 281 O ? IO122 280 1 Z
+bit 282 I ? IO121
+bit 283 C 1 *
+bit 284 O ? IO121 283 1 Z
+bit 285 I ? IO120
+bit 286 C 1 *
+bit 287 O ? IO120 286 1 Z
+bit 288 I ? IO119
+bit 289 C 1 *
+bit 290 O ? IO119 289 1 Z
+bit 291 I ? IO118
+bit 292 C 1 *
+bit 293 O ? IO118 292 1 Z
+bit 294 I ? IO117
+bit 295 C 1 *
+bit 296 O ? IO117 295 1 Z
+bit 297 I ? IO116
+bit 298 C 1 *
+bit 299 O ? IO116 298 1 Z
+bit 300 I ? IO115
+bit 301 C 1 *
+bit 302 O ? IO115 301 1 Z
+bit 303 I ? IO114
+bit 304 C 1 *
+bit 305 O ? IO114 304 1 Z
+bit 306 I ? IO113
+bit 307 C 1 *
+bit 308 O ? IO113 307 1 Z
+bit 309 I ? IO108
+bit 310 C 1 *
+bit 311 O ? IO108 310 1 Z
+bit 312 I ? IO107
+bit 313 C 1 *
+bit 314 O ? IO107 313 1 Z
+bit 315 I ? IO106
+bit 316 C 1 *
+bit 317 O ? IO106 316 1 Z
+bit 318 I ? IO105
+bit 319 C 1 *
+bit 320 O ? IO105 319 1 Z
+bit 321 I ? IO104
+bit 322 C 1 *
+bit 323 O ? IO104 322 1 Z
+bit 324 I ? IO103
+bit 325 C 1 *
+bit 326 O ? IO103 325 1 Z
+bit 327 I ? IO102
+bit 328 C 1 *
+bit 329 O ? IO102 328 1 Z
+bit 330 I ? IO101
+bit 331 C 1 *
+bit 332 O ? IO101 331 1 Z
+bit 333 I ? IO100
+bit 334 C 1 *
+bit 335 O ? IO100 334 1 Z
+bit 336 I ? IO99
+bit 337 C 1 *
+bit 338 O ? IO99 337 1 Z
+bit 339 I ? IO98
+bit 340 C 1 *
+bit 341 O ? IO98 340 1 Z
+bit 342 I ? IO97
+bit 343 C 1 *
+bit 344 O ? IO97 343 1 Z
+bit 345 I ? IO96
+bit 346 C 1 *
+bit 347 O ? IO96 346 1 Z
+bit 348 I ? IO95
+bit 349 C 1 *
+bit 350 O ? IO95 349 1 Z
+bit 351 I ? IO94
+bit 352 C 1 *
+bit 353 O ? IO94 352 1 Z
+bit 354 I ? IO93
+bit 355 C 1 *
+bit 356 O ? IO93 355 1 Z
+bit 357 I ? IO88
+bit 358 C 1 *
+bit 359 O ? IO88 358 1 Z
+bit 360 I ? IO87
+bit 361 C 1 *
+bit 362 O ? IO87 361 1 Z
+bit 363 I ? IO86
+bit 364 C 1 *
+bit 365 O ? IO86 364 1 Z
+bit 366 I ? IO85
+bit 367 C 1 *
+bit 368 O ? IO85 367 1 Z
+bit 369 I ? IO84
+bit 370 C 1 *
+bit 371 O ? IO84 370 1 Z
+bit 372 I ? IO83
+bit 373 C 1 *
+bit 374 O ? IO83 373 1 Z
+bit 375 I ? IO82
+bit 376 C 1 *
+bit 377 O ? IO82 376 1 Z
+bit 378 I ? IO81
+bit 379 C 1 *
+bit 380 O ? IO81 379 1 Z
+bit 381 I ? IO80
+bit 382 C 1 *
+bit 383 O ? IO80 382 1 Z
+bit 384 I ? IO79
+bit 385 C 1 *
+bit 386 O ? IO79 385 1 Z
+bit 387 I ? IO78
+bit 388 C 1 *
+bit 389 O ? IO78 388 1 Z
+bit 390 I ? IO77
+bit 391 C 1 *
+bit 392 O ? IO77 391 1 Z
+bit 393 I ? IO76
+bit 394 C 1 *
+bit 395 O ? IO76 394 1 Z
+bit 396 I ? IO75
+bit 397 C 1 *
+bit 398 O ? IO75 397 1 Z
+bit 399 I ? IO74
+bit 400 C 1 *
+bit 401 O ? IO74 400 1 Z
+bit 402 I ? IO73
+bit 403 C 1 *
+bit 404 O ? IO73 403 1 Z
+bit 405 I ? IO68
+bit 406 C 1 *
+bit 407 O ? IO68 406 1 Z
+bit 408 I ? IO67
+bit 409 C 1 *
+bit 410 O ? IO67 409 1 Z
+bit 411 I ? IO66
+bit 412 C 1 *
+bit 413 O ? IO66 412 1 Z
+bit 414 I ? IO65
+bit 415 C 1 *
+bit 416 O ? IO65 415 1 Z
+bit 417 I ? IO64
+bit 418 C 1 *
+bit 419 O ? IO64 418 1 Z
+bit 420 I ? IO63
+bit 421 C 1 *
+bit 422 O ? IO63 421 1 Z
+bit 423 I ? IO62
+bit 424 C 1 *
+bit 425 O ? IO62 424 1 Z
+bit 426 I ? IO61
+bit 427 C 1 *
+bit 428 O ? IO61 427 1 Z
+bit 429 I ? IO60
+bit 430 C 1 *
+bit 431 O ? IO60 430 1 Z
+bit 432 I ? IO59
+bit 433 C 1 *
+bit 434 O ? IO59 433 1 Z
+bit 435 I ? IO58
+bit 436 C 1 *
+bit 437 O ? IO58 436 1 Z
+bit 438 I ? IO57
+bit 439 C 1 *
+bit 440 O ? IO57 439 1 Z
+bit 441 I ? IO56
+bit 442 C 1 *
+bit 443 O ? IO56 442 1 Z
+bit 444 I ? IO55
+bit 445 C 1 *
+bit 446 O ? IO55 445 1 Z
+bit 447 I ? IO54
+bit 448 C 1 *
+bit 449 O ? IO54 448 1 Z
+bit 450 I ? IO53
+bit 451 C 1 *
+bit 452 O ? IO53 451 1 Z
+bit 453 I ? IO50
+bit 454 C 1 *
+bit 455 O ? IO50 454 1 Z
+bit 456 I ? IO49
+bit 457 C 1 *
+bit 458 O ? IO49 457 1 Z
+bit 459 I ? IO48
+bit 460 C 1 *
+bit 461 O ? IO48 460 1 Z
+bit 462 I ? IO47
+bit 463 C 1 *
+bit 464 O ? IO47 463 1 Z
+bit 465 I ? IO46
+bit 466 C 1 *
+bit 467 O ? IO46 466 1 Z
+bit 468 I ? IO45
+bit 469 C 1 *
+bit 470 O ? IO45 469 1 Z
+bit 471 I ? IO44
+bit 472 C 1 *
+bit 473 O ? IO44 472 1 Z
+bit 474 I ? IO43
+bit 475 C 1 *
+bit 476 O ? IO43 475 1 Z
+bit 477 I ? IO42
+bit 478 C 1 *
+bit 479 O ? IO42 478 1 Z
+bit 480 I ? IO41
+bit 481 C 1 *
+bit 482 O ? IO41 481 1 Z
+bit 483 I ? IO39
+bit 484 C 1 *
+bit 485 O ? IO39 484 1 Z
+bit 486 I ? IO38
+bit 487 C 1 *
+bit 488 O ? IO38 487 1 Z
+bit 489 I ? IO37
+bit 490 C 1 *
+bit 491 O ? IO37 490 1 Z
+bit 492 I ? DCLK
+bit 493 C 1 *
+bit 494 O ? DCLK 493 1 Z
+bit 495 I ? MSEL1
+bit 496 X ? *
+bit 497 X ? *
+bit 498 I ? MSEL0
+bit 499 X ? *
+bit 500 X ? *
+bit 501 X ? *
+bit 502 X 1 *
+bit 503 X ? *
+bit 504 X ? *
+bit 505 X 1 *
+bit 506 X ? *
+bit 507 X ? *
+bit 508 X 1 *
+bit 509 X ? *
+bit 510 I ? CLK0
+bit 511 X ? *
+bit 512 X ? *
+bit 513 X ? *
+bit 514 X 1 *
+bit 515 X ? *
+bit 516 I ? DATA0
+bit 517 X ? *
+bit 518 X ? *
+bit 519 I ? IO24
+bit 520 C 1 *
+bit 521 O ? IO24 520 1 Z
+bit 522 I ? IO23
+bit 523 C 1 *
+bit 524 O ? IO23 523 1 Z
+bit 525 I ? IO21
+bit 526 C 1 *
+bit 527 O ? IO21 526 1 Z
+bit 528 I ? IO20
+bit 529 C 1 *
+bit 530 O ? IO20 529 1 Z
+bit 531 I ? IO19
+bit 532 C 1 *
+bit 533 O ? IO19 532 1 Z
+bit 534 I ? IO18
+bit 535 C 1 *
+bit 536 O ? IO18 535 1 Z
+bit 537 I ? IO17
+bit 538 C 1 *
+bit 539 O ? IO17 538 1 Z
+bit 540 I ? IO16
+bit 541 C 1 *
+bit 542 O ? IO16 541 1 Z
+bit 543 I ? IO15
+bit 544 C 1 *
+bit 545 O ? IO15 544 1 Z
+bit 546 I ? IO14
+bit 547 C 1 *
+bit 548 O ? IO14 547 1 Z
+bit 549 I ? IO13
+bit 550 C 1 *
+bit 551 O ? IO13 550 1 Z
+bit 552 I ? IO12
+bit 553 C 1 *
+bit 554 O ? IO12 553 1 Z
+bit 555 I ? IO11
+bit 556 C 1 *
+bit 557 O ? IO11 556 1 Z
+bit 558 I ? IO8
+bit 559 C 1 *
+bit 560 O ? IO8 559 1 Z
+bit 561 I ? IO7
+bit 562 C 1 *
+bit 563 O ? IO7 562 1 Z
+bit 564 I ? IO6
+bit 565 C 1 *
+bit 566 O ? IO6 565 1 Z
+bit 567 I ? IO5
+bit 568 C 1 *
+bit 569 O ? IO5 568 1 Z
+bit 570 I ? IO4
+bit 571 C 1 *
+bit 572 O ? IO4 571 1 Z
+bit 573 I ? IO3
+bit 574 C 1 *
+bit 575 O ? IO3 574 1 Z
+bit 576 I ? IO2
+bit 577 C 1 *
+bit 578 O ? IO2 577 1 Z
+bit 579 I ? IO1
+bit 580 C 1 *
+bit 581 O ? IO1 580 1 Z
--- /dev/null
+#
+# $Id$
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by H Hartley Sweeten <hsweeten@visionengravers.com>
+#
+
+# bits 31-28 of the Device Identification Register
+0000 ep2c8 0
--- /dev/null
+#
+# $Id$
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by H Hartley Sweeten <hsweeten@visionengravers.com>
+#
+# Note:
+# The signals defined in this file are generic for any EP2C8/EP2C8A.
+# Signalnames according to Altera's package tables are set in the
+# package specific scripts.
+#
+# **Testing Differential Pin Pairs**
+# Refer to the note in the original bsd-files for issues related to
+# testing differential pin pairs!
+#
+# Pins T144-1/Q208-1/F256-C3 (BSC198) and T144-2/Q208-2/F256-F4 (BSC197)
+# are dedicated output pins (ASDO and nCSO respectively) when the MSEL
+# pins are connected to set the device in Active Serial programming mode.
+# This configuration file assumes that that mode is not used. Therefore,
+# they are specified as I/O pins.
+#
+# | Version (4 bits) | Part number (16 bits) | Manufacturer Id (11 bits) | LSB (1 bit) |
+# IDCODE: | 0000 | 0010 0000 1011 0010 | 000 0110 1110 | 1 |
+#
+# Documentation:
+# [1] Altera Corporation, "Cyclone II Device Handbook", CII5V1-3.2
+# [2] Altera Corporation, "Pin Information for the Cyclone(r) II EP2C8 & EP2C8A Devices", Version 1.8
+# [3] Altera Corporation, "EP2C8F256.BSD", Revision 1.03, 11/10/2006
+# [4] Altera Corporation, "EP2C8Q208.BSD", Revision 1.03, 11/10/2006
+# [5] Altera Corporation, "EP2C8T144.BSD", Revision 1.03, 11/10/2006
+
+register BYPASS 1
+register BSR 597
+register IOCSR 5640
+register DEVICE_ID 32
+register USERCODE 32
+
+instruction length 10
+instruction BYPASS 1111111111 BYPASS
+instruction IDCODE 0000000110 DEVICE_ID
+instruction USERCODE 0000000111 USERCODE
+instruction CLAMP 0000001010 BYPASS
+instruction SAMPLE/PRELOAD 0000000101 BSR
+instruction EXTEST 0000001111 BSR
+instruction CONFIG_IO 0000001101 IOCSR
+instruction HIGHZ 0000001011 BYPASS
+
+
+ # Bank VREFB Group Pin Name Optional Function(s) Configuration Function T144 Q208 F256
+ # ---- ----------- -------- -------------------- ---------------------- ---- ---- ----
+signal BSC198 # B1 VREFB1N0 IO ASDO ASDO 1 1 C3
+signal BSC197 # B1 VREFB1N0 IO nCSO nCSO 2 2 F4
+signal BSC196 # B1 VREFB1N0 IO LVDS15p CRC_ERROR 3 3 C1
+signal BSC195 # B1 VREFB1N0 IO LVDS15n CLKUSR 4 4 C2
+signal BSC194 # B1 VREFB1N0 IO LVDS14p 5 D5
+signal BSC193 # B1 VREFB1N0 IO LVDS14n 6 E5
+ # B1 VREFB1N0 VCCIO1 5 7
+signal BSC192 # B1 VREFB1N0 IO LVDS13p 8 F5
+ # B1 VREFB1N0 GND 6 9
+signal BSC191 # B1 VREFB1N0 IO LVDS13n 10
+signal BSC190 # B1 VREFB1N0 IO LVDS12p 11 D3
+signal BSC189 # B1 VREFB1N0 IO LVDS12n 12 D4
+ # B1 VREFB1N0 VCCIO1
+signal BSC188 # B1 VREFB1N0 IO VREFB1N0 7 13 F3
+signal BSC187 # B1 VREFB1N0 IO LVDS11p D2
+signal BSC186 # B1 VREFB1N0 IO LVDS11n D1
+signal BSC185 # B1 VREFB1N0 IO LVDS10p E3
+signal BSC184 # B1 VREFB1N0 IO LVDS10n E4
+ # B1 VREFB1N0 GND
+signal BSC183 # B1 VREFB1N0 IO G4
+signal BSC182 # B1 VREFB1N0 IO LVDS9p J6
+signal BSC181 # B1 VREFB1N0 IO LVDS9n H6
+signal BSC180 # B1 VREFB1N0 IO LVDS8p 8 14 E1
+signal BSC179 # B1 VREFB1N0 IO LVDS8n 9 15 E2
+ # B1 VREFB1N0 VCCIO1
+signal TDO # B1 VREFB1N0 TDO TDO 10 16 G2
+signal TMS # B1 VREFB1N0 TMS TMS 11 17 G1
+signal TCK # B1 VREFB1N0 TCK TCK 12 18 F2
+signal TDI # B1 VREFB1N0 TDI TDI 13 19 F5
+signal BSC178 # B1 VREFB1N0 DATA0 DATA0 DATA0 14 20 F1
+signal BSC177 # B1 VREFB1N0 DCLK DCLK DCLK 15 21 H4
+signal BSC176 # B1 VREFB1N0 nCE nCE 16 22 G5
+signal BSC175 # B1 VREFB1N0 CLK0 LVDSCLK0p/input(3) 17 23 H2
+signal BSC174 # B1 VREFB1N0 CLK1 LVDSCLK0n/input(3) 18 24 H1
+ # B1 VREFB1N0 GND 19 25
+signal BSC173 # B1 VREFB1N0 nCONFIG nCONFIG 20 26 J5
+signal BSC172 # B1 VREFB1N1 CLK2 LVDSCLK1p/input(3) 21 27 J2
+signal BSC171 # B1 VREFB1N1 CLK3 LVDSCLK1n/input(3) 22 28 J1
+ # B1 VREFB1N1 VCCIO1 23 29
+signal BSC170 # B1 VREFB1N1 IO LVDS7p 24 30 K2
+signal BSC169 # B1 VREFB1N1 IO LVDS7n 25 31 K1
+signal BSC168 # B1 VREFB1N1 IO LVDS6p K4
+ # B1 VREFB1N1 VCCINT 26 32
+signal BSC167 # B1 VREFB1N1 IO LVDS6n 33 K5
+signal BSC166 # B1 VREFB1N1 IO 34
+signal BSC165 # B1 VREFB1N1 IO LVDS5p 35 L1
+ # B1 VREFB1N1 GND 27 36
+signal BSC164 # B1 VREFB1N1 IO LVDS5n L2
+ # B1 VREFB1N1 GND
+signal BSC163 # B1 VREFB1N1 IO VREFB1N1 28 37 J4
+ # B1 VREFB1N1 VCCIO1
+signal BSC162 # B1 VREFB1N1 IO LVDS4p M1
+signal BSC161 # B1 VREFB1N1 IO LVDS4n M2
+signal BSC160 # B1 VREFB1N1 IO LVDS3p M3
+ # B1 VREFB1N1 GND 38
+signal BSC159 # B1 VREFB1N1 IO LVDS3n 39 L3
+signal BSC158 # B1 VREFB1N1 IO LVDS2p 40 N1
+signal BSC157 # B1 VREFB1N1 IO LVDS2n 41 N2
+signal BSC156 # B1 VREFB1N1 IO LVDS1p P1
+signal BSC155 # B1 VREFB1N1 IO LVDS1n P2
+ # B1 VREFB1N1 VCCIO1 29 42
+signal BSC154 # B1 VREFB1N1 IO 43
+signal BSC153 # B1 VREFB1N1 IO LVDS0p 44 N3
+signal BSC152 # B1 VREFB1N1 IO LVDS0n 45 N4
+signal BSC151 # B1 VREFB1N1 IO 30 46 P3
+signal BSC150 # B1 VREFB1N1 IO PLL1_OUTp 31 47 L4
+signal BSC149 # B1 VREFB1N1 IO PLL1_OUTn 32 48 M4
+ # B1 VREFB1N1 GND 33 49
+ # B1 VREFB1N1 GND_PLL1 34 50 L5
+ # B1 VREFB1N1 VCCD_PLL1 35 51 L6
+ # B1 VREFB1N1 GND_PLL1 36 52 N5
+ # B4 VREFB4N1 VCCA_PLL1 37 53 M5
+ # B4 VREFB4N1 GNDA_PLL1 38 54 M6
+ # B4 VREFB4N1 GND 39 55
+signal BSC148 # B4 VREFB4N1 IO LVDS77n DEV_OE 40 56 R3
+signal BSC147 # B4 VREFB4N1 IO LVDS77p 41 57 T3
+signal BSC146 # B4 VREFB4N1 IO LVDS76p 42 58 P5
+signal BSC145 # B4 VREFB4N1 IO LVDS76n 43 59 P4
+signal BSC144 # B4 VREFB4N1 IO LVDS75p 44 60 T4
+signal BSC143 # B4 VREFB4N1 IO LVDS75n 45 61 R4
+ # B4 VREFB4N1 VCCIO4 46 62
+signal BSC142 # B4 VREFB4N1 IO LVDS74p 47 63 T5
+ # B4 VREFB4N1 GND
+signal BSC141 # B4 VREFB4N1 IO LVDS74n 48 64 R5
+signal BSC140 # B4 VREFB4N1 IO N7
+signal BSC139 # B4 VREFB4N1 IO LVDS73p K7
+signal BSC138 # B4 VREFB4N1 IO LVDS73n K6
+ # B4 VREFB4N1 VCCIO4
+ # B4 VREFB4N1 GND
+signal BSC137 # B4 VREFB4N1 IO LVDS72p T6
+ # B4 VREFB4N1 GND 49 65
+signal BSC136 # B4 VREFB4N1 IO LVDS72n R6
+signal BSC135 # B4 VREFB4N1 IO LVDS71p P6
+signal BSC134 # B4 VREFB4N1 IO LVDS71n N6
+ # B4 VREFB4N1 VCCINT 50 66
+signal BSC133 # B4 VREFB4N1 IO VREFB4N1 51 67 N8
+ # B4 VREFB4N1 VCCIO4
+ # B4 VREFB4N1 GND
+signal BSC132 # B4 VREFB4N1 IO LVDS70p 52 68 T7
+signal BSC131 # B4 VREFB4N1 IO LVDS70n 69 R7
+signal BSC130 # B4 VREFB4N1 IO LVDS69p L7
+signal BSC129 # B4 VREFB4N1 IO LVDS69n L8
+signal BSC128 # B4 VREFB4N1 IO LVDS68p 53 70 T8
+ # B4 VREFB4N1 VCCIO4 54 71
+signal BSC127 # B4 VREFB4N1 IO LVDS68n 55 72 R8
+ # B4 VREFB4N1 GND 56 73
+signal BSC126 # B4 VREFB4N1 IO LVDS67p 57 74 T9
+signal BSC125 # B4 VREFB4N1 IO LVDS67n 58 75 R9
+signal BSC124 # B4 VREFB4N0 IO LVDS66p 59 76 N9
+signal BSC123 # B4 VREFB4N0 IO LVDS66n 60 77 N10
+ # B4 VREFB4N1 GND 61 78
+signal BSC122 # B4 VREFB4N0 IO LVDS65p T11
+ # B4 VREFB4N1 VCCINT 62 79
+signal BSC121 # B4 VREFB4N0 IO LVDS65n R11
+ # B4 VREFB4N1 VCCIO4
+signal BSC120 # B4 VREFB4N0 IO 80 P11
+ # B4 VREFB4N0 GND
+signal BSC119 # B4 VREFB4N0 IO LVDS64p 81 L9
+signal BSC118 # B4 VREFB4N0 IO LVDS64n 82 L10
+ # B4 VREFB4N0 VCCIO4 83
+signal BSC117 # B4 VREFB4N0 IO LVDS63p 84 R10
+ # B4 VREFB4N0 GND 85
+signal BSC116 # B4 VREFB4N0 IO LVDS63n 86 T10
+signal BSC115 # B4 VREFB4N0 IO LVDS62p 87 K11
+signal BSC114 # B4 VREFB4N0 IO LVDS62n 88 K10
+signal BSC113 # B4 VREFB4N0 IO VREFB4N0 63 89 N11
+signal BSC112 # B4 VREFB4N0 IO LVDS61p 90 P12
+ # B4 VREFB4N0 VCCIO4 91
+signal BSC111 # B4 VREFB4N0 IO LVDS61n 92 P13
+ # B4 VREFB4N0 GND 93
+signal BSC110 # B4 VREFB4N0 IO LVDS60p 64 94 T12
+signal BSC109 # B4 VREFB4N0 IO LVDS60n 65 95 R12
+signal BSC108 # B4 VREFB4N0 IO 96
+signal BSC107 # B4 VREFB4N0 IO LVDS59p 97 T13
+ # B4 VREFB4N0 VCCIO4 66 98
+signal BSC106 # B4 VREFB4N0 IO LVDS59n 67 99 R13
+ # B4 VREFB4N0 GND 68 100
+signal BSC105 # B4 VREFB4N0 IO LVDS58p 69 101 T14
+signal BSC104 # B4 VREFB4N0 IO LVDS58n 70 102 R14
+signal BSC103 # B4 VREFB4N0 IO LVDS57p 71 103 M11
+signal BSC102 # B4 VREFB4N0 IO LVDS57n 72 104 L11
+signal BSC101 # B3 VREFB3N1 IO LVDS56n 73 105 N12
+signal BSC100 # B3 VREFB3N1 IO LVDS56p 74 106 M12
+signal BSC099 # B3 VREFB3N1 IO LVDS55n L12
+signal BSC098 # B3 VREFB3N1 IO LVDS55p K13
+signal BSC097 # B3 VREFB3N1 IO LVDS54n INIT_DONE 75 107 N13
+signal BSC096 # B3 VREFB3N1 IO LVDS54p nCEO 76 108 N14
+ # B3 VREFB3N1 VCCIO3 77 109
+signal BSC095 # B3 VREFB3N1 IO LVDS53n 110 P15
+ # B3 VREFB3N1 GND 78 111
+signal BSC094 # B3 VREFB3N1 IO LVDS53p 112 P16
+signal BSC093 # B3 VREFB3N1 IO LVDS52n 113 N15
+signal BSC092 # B3 VREFB3N1 IO LVDS52p 114 N16
+signal BSC091 # B3 VREFB3N1 IO P14
+signal BSC090 # B3 VREFB3N1 IO LVDS51n 115
+signal BSC089 # B3 VREFB3N1 IO LVDS51p 116
+signal BSC088 # B3 VREFB3N1 IO VREFB3N1 79 117 M14
+signal BSC087 # B3 VREFB3N1 IO LVDS50n M15
+ # B3 VREFB3N1 VCCIO3
+signal BSC086 # B3 VREFB3N1 IO LVDS50p M16
+ # B3 VREFB3N1 GND
+signal BSC085 # B3 VREFB3N1 IO 118
+ # B3 VREFB3N1 GND 80 119
+signal BSC084 # B3 VREFB3N1 IO L14
+signal BSC083 # B3 VREFB3N1 IO LVDS49n L15
+signal BSC082 # B3 VREFB3N1 IO LVDS49p L16
+ # B3 VREFB3N1 VCCINT 81 120
+signal BSC081 # B3 VREFB3N1 nSTATUS nSTATUS 82 121 M13
+ # B3 VREFB3N1 VCCIO3 122
+signal BSC080 # B3 VREFB3N1 CONF_DONE CONF_DONE 83 123 L13
+ # B3 VREFB3N1 GND 124
+signal BSC079 # B3 VREFB3N1 MSEL1 MSEL1 84 125 K12
+signal BSC078 # B3 VREFB3N1 MSEL0 MSEL0 85 126 J13
+signal BSC077 # B3 VREFB3N1 IO LVDS48n 86 127 K16
+signal BSC076 # B3 VREFB3N1 IO LVDS48p 87 128 K15
+signal BSC075 # B3 VREFB3N1 CLK7 LVDSCLK3n/input(3) 88 129 J16
+signal BSC074 # B3 VREFB3N1 CLK6 LVDSCLK3p/input(3) 89 130 J15
+signal BSC073 # B3 VREFB3N0 CLK5 LVDSCLK2n/input(3) 90 131 H15
+signal BSC072 # B3 VREFB3N0 CLK4 LVDSCLK2p/input(3) 91 132 H16
+signal BSC071 # B3 VREFB3N0 IO LVDS47n 92 133 H12
+signal BSC070 # B3 VREFB3N0 IO LVDS47p 93 134 J12
+signal BSC069 # B3 VREFB3N0 IO LVDS46n 94 135 G16
+ # B3 VREFB3N0 VCCIO3 95 136
+signal BSC068 # B3 VREFB3N0 IO LVDS46p 96 137 G15
+signal BSC067 # B3 VREFB3N0 IO LVDS46n 97 138 F15
+signal BSC066 # B3 VREFB3N0 IO LVDS45p 139 F16
+ # B3 VREFB3N0 GND 98 140
+signal BSC065 # B3 VREFB3N0 IO LVDS44n 141 J11
+signal BSC064 # B3 VREFB3N0 IO LVDS44p 142 H11
+signal BSC063 # B3 VREFB3N0 IO LVDS43n G12
+signal BSC062 # B3 VREFB3N0 IO LVDS43p G13
+signal BSC061 # B3 VREFB3N0 IO LVDS32n 143 E13
+signal BSC060 # B3 VREFB3N0 IO LVDS42p 144 F13
+signal BSC059 # B3 VREFB3N0 IO VREFB3N0 99 145 H13
+ # B3 VREFB3N0 VCCIO3
+signal BSC058 # B3 VREFB3N0 IO LVDS41n D15
+signal BSC057 # B3 VREFB3N0 IO LVDS41p D16
+signal BSC056 # B3 VREFB3N0 IO LVDS40n E15
+ # B3 VREFB3N0 GND
+signal BSC055 # B3 VREFB3N0 IO LVDS40p E16
+signal BSC054 # B3 VREFB3N0 IO F14
+signal BSC053 # B3 VREFB3N0 IO LVDS39n 100 146 C15
+signal BSC052 # B3 VREFB3N0 IO LVDS39p 101 147 C16
+ # B3 VREFB3N0 VCCIO3 102 148
+signal BSC051 # B3 VREFB3N0 IO LVDS38n 149 C14
+signal BSC050 # B3 VREFB3N0 IO LVDS38p 150 D13
+signal BSC049 # B3 VREFB3N0 IO PLL2_OUTp 103 151 E14
+signal BSC048 # B3 VREFB3N0 IO PLL2_OUTn 104 152 D14
+ # B3 VREFB3N0 GND 105 153
+ # B3 VREFB3N0 GND_PLL2 106 154 F12
+ # B3 VREFB3N0 VCCD_PLL2 107 155 F11
+ # B3 VREFB3N0 GND_PLL2 108 156 D12
+ # B2 VREFB2N0 VCCA_PLL2 109 157 E12
+ # B2 VREFB2N0 GNDA_PLL2 110 158 E11
+ # B2 VREFB2N0 GND 111 159
+signal BSC047 # B2 VREFB2N0 IO LVDS37n 112 160 B14
+signal BSC046 # B2 VREFB2N0 IO LVDS37p 113 161 A14
+signal BSC045 # B2 VREFB2N0 IO LVDS36n 114 162 C13
+signal BSC044 # B2 VREFB2N0 IO LVDS36p 115 163 C12
+signal BSC043 # B2 VREFB2N0 IO LVDS35n 164 B13
+signal BSC042 # B2 VREFB2N0 IO LVDS35p 165 A13
+ # B2 VREFB2N0 VCCIO2 116 166
+ # B2 VREFB2N0 GND 117 167
+signal BSC041 # B2 VREFB2N0 IO LVDS34n 118 168 B12
+signal BSC040 # B2 VREFB2N0 IO LVDS34p 119 169 A12
+signal BSC039 # B2 VREFB2N0 IO VREFB2N0 120 170 C11
+signal BSC038 # B2 VREFB2N0 IO LVDS33n 121 171 B11
+ # B2 VREFB2N0 VCCIO2 172
+signal BSC037 # B2 VREFB2N0 IO LVDS33p 122 173 A11
+ # B2 VREFB2N0 GND 174
+signal BSC036 # B2 VREFB2N0 IO LVDS32n G10
+signal BSC035 # B2 VREFB2N0 IO LVDS32p G11
+signal BSC034 # B2 VREFB2N0 IO LVDS31n 175 B10
+ # B2 VREFB2N0 VCCIO2
+signal BSC033 # B2 VREFB2N0 IO LVDS21p 176 A10
+ # B2 VREFB2N0 GND
+signal BSC032 # B2 VREFB2N0 IO LVDS30n F10
+signal BSC031 # B2 VREFB2N0 IO LVDS30p F9
+signal BSC030 # B2 VREFB2N0 IO D9
+ # B2 VREFB2N0 GND 123 177
+ # B2 VREFB2N0 VCCINT 124 178
+signal BSC029 # B2 VREFB2N0 IO LVDS29n 125 179 D11
+ # B2 VREFB2N0 VCCIO2
+signal BSC028 # B2 VREFB2N0 IO LVDS29p 126 180 D10
+ # B2 VREFB2N0 GND
+signal BSC027 # B2 VREFB2N0 IO LVDS28n 181 A9
+signal BSC026 # B2 VREFB2N0 IO LVDS28p 182 B9
+signal BSC025 # B2 VREFB2N1 IO LVDS27n A8
+signal BSC024 # B2 VREFB2N1 IO LVDS27p B8
+ # B2 VREFB2N1 VCCIO2 127 183
+signal BSC023 # B2 VREFB2N1 IO LVDS26n A7
+ # B2 VREFB2N1 GND 128 184
+signal BSC022 # B2 VREFB2N1 IO LVDS26p 129 185 B7
+ # B2 VREFB2N1 GND 130 186
+signal BSC021 # B2 VREFB2N1 IO LVDS25n 187 F7
+signal BSC020 # B2 VREFB2N1 IO LVDS25p 188 F8
+signal BSC019 # B2 VREFB2N1 IO LVDS24n 189
+ # B2 VREFB2N1 VCCINT 131 190
+signal BSC018 # B2 VREFB2N1 IO LVDS24p 191
+signal BSC017 # B2 VREFB2N1 IO VREFB2N1 132 192 D8
+signal BSC016 # B2 VREFB2N1 IO LVDS23n 133 193 B6
+ # B2 VREFB2N1 VCCIO2 194
+signal BSC015 # B2 VREFB2N1 IO LVDS23p 134 195 A6
+ # B2 VREFB2N1 GND 196
+signal BSC014 # B2 VREFB2N1 IO LVDS22n G6
+signal BSC013 # B2 VREFB2N1 IO LVDS22p G7
+signal BSC012 # B2 VREFB2N1 IO D7
+signal BSC011 # B2 VREFB2N1 IO LVDS21n 197 D6
+ # B2 VREFB2N1 VCCIO2
+signal BSC010 # B2 VREFB2N1 IO LVDS21p 198 C6
+ # B2 VREFB2N1 GND
+signal BSC009 # B2 VREFB2N1 IO LVDS20n C5
+signal BSC008 # B2 VREFB2N1 IO LVDS20p C4
+signal BSC007 # B2 VREFB2N1 IO LVDS19n 135 199 B5
+signal BSC006 # B2 VREFB2N1 IO LVDS19p 136 200 A5
+signal BSC005 # B2 VREFB2N1 IO LVDS18n 137 201 B4
+ # B2 VREFB2N1 VCCIO2 138 202
+signal BSC004 # B2 VREFB2N1 IO LVDS18p 139 203 A4
+ # B2 VREFB2N1 GND 140 204
+signal BSC003 # B2 VREFB2N1 IO LVDS17p 141 205 A3
+signal BSC002 # B2 VREFB2N1 IO LVDS17n DEV_CLRn 142 206 B3
+signal BSC001 # B2 VREFB2N1 IO LVDS16p 143 207 E6
+signal BSC000 # B2 VREFB2N1 IO LVDS16n 144 208 F6
+ # VCCINT G9
+ # VCCINT H7
+ # VCCINT H10
+ # VCCINT J7
+ # VCCINT J10
+ # VCCINT K8
+ # VCCIO1 B1
+ # VCCIO1 G3
+ # VCCIO1 K3
+ # VCCIO1 R1
+ # VCCIO4 M7
+ # VCCIO4 M10
+ # VCCIO4 P7
+ # VCCIO4 P10
+ # VCCIO4 T2
+ # VCCIO4 T15
+ # VCCIO3 B16
+ # VCCIO3 G14
+ # VCCIO3 K14
+ # VCCIO3 R16
+ # VCCIO2 A2
+ # VCCIO2 A15
+ # VCCIO2 C7
+ # VCCIO2 C10
+ # VCCIO2 E7
+ # VCCIO2 E10
+ # GND G8
+ # GND H8
+ # GND H9
+ # GND J8
+ # GND J9
+ # GND K9
+ # GND A1
+ # GND A16
+ # GND B2
+ # GND B15
+ # GND C8
+ # GND C9
+ # GND E8
+ # GND E9
+ # GND H3
+ # GND H14
+ # GND J3
+ # GND J14
+ # GND M8
+ # GND M9
+ # GND P8
+ # GND P9
+ # GND R2
+ # GND R15
+ # GND T1
+ # GND T16
+
+#
+# BSC group 198
+# T144 - I/O pin 1 (dedicated output pin in AS mode)
+# Q208 - I/O pin 1 (dedicated output pin in AS mode)
+# F256 - I/O pin C3 (dedicated output pin in AS mode)
+#
+bit 596 O 1 BSC198 595 1 Z
+bit 595 C 1 *
+bit 594 I 1 BSC198
+#
+# BSC group 197
+# T144 - I/O pin 2 (dedicated output pin in AS mode)
+# Q208 - I/O pin 2 (dedicated output pin in AS mode)
+# F256 - I/O pin F4 (dedicated output pin in AS mode)
+#
+bit 593 O 1 BSC197 592 1 Z
+bit 592 C 1 *
+bit 591 I 1 BSC197
+#
+# BSC group 196
+# T144 - I/O pin 3
+# Q208 - I/O pin 3
+# F256 - I/O pin C1
+#
+bit 590 O 1 BSC196 589 1 Z
+bit 589 C 1 *
+bit 588 I 1 BSC196
+#
+# BSC group 195
+# T144 - I/O pin 4
+# Q208 - I/O pin 4
+# F256 - I/O pin C2
+#
+bit 587 O 1 BSC195 586 1 Z
+bit 586 C 1 *
+bit 585 I 1 BSC195
+#
+# BSC group 194 for
+# T144 - unused pad
+# Q208 - I/O pin 5
+# F256 - I/O pin D5
+#
+bit 584 O 1 BSC194 583 1 Z
+bit 583 C 1 *
+bit 582 I 1 BSC194
+#
+# BSC group 193 for
+# T144 - unused pad
+# Q208 - I/O pin 6
+# F256 - I/O pin E5
+#
+bit 581 O 1 BSC193 580 1 Z
+bit 580 C 1 *
+bit 579 I 1 BSC193
+#
+# BSC group 192
+# T144 - unused pad
+# Q208 - I/O pin 8
+# F256 - I/O pin F5
+#
+bit 578 O 1 BSC192 577 1 Z
+bit 577 C 1 *
+bit 576 I 1 BSC192
+#
+# BSC group 191
+# T144 - unused pad
+# Q208 - I/O pin 10
+# F256 - unused pad
+#
+bit 575 O 1 BSC191 574 1 Z
+bit 574 C 1 *
+bit 573 I 1 BSC191
+#
+# BSC group 190
+# T144 - unused pad
+# Q208 - I/O pin 11
+# F256 - I/O pin D3
+#
+bit 572 O 1 BSC190 571 1 Z
+bit 571 C 1 *
+bit 570 I 1 BSC190
+#
+# BSC group 189
+# T144 - unused pad
+# Q208 - I/O pin 12
+# F256 - I/O pin D4
+#
+bit 569 O 1 BSC189 568 1 Z
+bit 568 C 1 *
+bit 567 I 1 BSC189
+#
+# BSC group 188
+# T144 - I/O pin 7
+# Q208 - I/O pin 13
+# F256 - I/O pin F3
+#
+bit 566 O 1 BSC188 565 1 Z
+bit 565 C 1 *
+bit 564 I 1 BSC188
+#
+# BSC group 187
+# T144 - unused pad
+# Q208 - unused pad
+# F256 - I/O pin D2
+#
+bit 563 O 1 BSC187 562 1 Z
+bit 562 C 1 *
+bit 561 I 1 BSC187
+#
+# BSC group 186
+# T144 - unused pad
+# Q208 - unused pad
+# F256 - I/O pin D1
+#
+bit 560 O 1 BSC186 559 1 Z
+bit 559 C 1 *
+bit 558 I 1 BSC186
+#
+# BSC group 185
+# T144 - unused pad
+# Q208 - unused pad
+# F256 - I/O pin E3
+#
+bit 557 O 1 BSC185 556 1 Z
+bit 556 C 1 *
+bit 555 I 1 BSC185
+#
+# BSC group 184
+# T144 - unused pad
+# Q208 - unused pad
+# F256 - I/O pin E4
+#
+bit 554 O 1 BSC184 553 1 Z
+bit 553 C 1 *
+bit 552 I 1 BSC184
+#
+# BSC group 183
+# T144 - unused pad
+# Q208 - unused pad
+# F256 - I/O pin G4
+#
+bit 551 O 1 BSC183 550 1 Z
+bit 550 C 1 *
+bit 549 I 1 BSC183
+#
+# BSC group 182
+# T144 - unused pad
+# Q208 - unused pad
+# F256 - I/O pin J6
+#
+bit 548 O 1 BSC182 547 1 Z
+bit 547 C 1 *
+bit 546 I 1 BSC182
+#
+# BSC group 181
+# T144 - unused pad
+# Q208 - unused pad
+# F256 - I/O pin H6
+#
+bit 545 O 1 BSC181 544 1 Z
+bit 544 C 1 *
+bit 543 I 1 BSC181
+#
+# BSC group 180
+# T144 - I/O pin 8
+# Q208 - I/O pin 14
+# F256 - I/O pin E1
+#
+bit 542 O 1 BSC180 541 1 Z
+bit 541 C 1 *
+bit 540 I 1 BSC180
+#
+# BSC group 179
+# T144 - I/O pin 9
+# Q208 - I/O pin 15
+# F256 - I/O pin E2
+#
+bit 539 O 1 BSC179 538 1 Z
+bit 538 C 1 *
+bit 537 I 1 BSC179
+#
+# BSC group 178 (DATA0)
+# T144 - Family-specific input pin 14
+# Q208 - Family-specific input pin 20
+# F256 - Family-specific input pin F1
+#
+bit 536 O 1 *
+bit 535 O 1 *
+bit 534 I 1 BSC178
+#
+# BSC group 177 (DCLK)
+# T144 - Family-specific input pin 15
+# Q208 - Family-specific input pin 21
+# F256 - Family-specific input pin H4
+#
+bit 533 O 1 BSC177 532 1 Z
+bit 532 C 1 *
+bit 531 I 1 BSC177
+#
+# BSC group 176 (nCE)
+# T144 - untestable Family-specific pin 16
+# Q208 - untestable Family-specific pin 22
+# F256 - untestable Family-specific pin G5
+#
+bit 530 O 1 *
+bit 529 O 1 *
+bit 528 O 1 *
+#
+# BSC group 175 (CLK0)
+# T144 - Family-specific input pin 17
+# Q208 - Family-specific input pin 23
+# F256 - Family-specific input pin H2
+#
+bit 527 O 1 *
+bit 526 O 1 *
+bit 525 I 1 BSC175
+#
+# BSC group 174 (CLK1)
+# T144 - Family-specific input pin 18
+# Q208 - Family-specific input pin 24
+# F256 - Family-specific input pin H1
+#
+bit 524 O 1 *
+bit 523 O 1 *
+bit 522 I 1 BSC174
+#
+# BSC group 173 (nCONFIG)
+# T144 - untestable Family-specific pin 20
+# Q208 - untestable Family-specific pin 26
+# F256 - untestable Family-specific pin J5
+#
+bit 521 O 1 *
+bit 520 O 1 *
+bit 519 O 1 *
+#
+# BSC group 172 (CLK2)
+# T144 - Family-specific input pin 21
+# Q208 - Family-specific input pin 27
+# F256 - Family-specific input pin J2
+#
+bit 518 O 1 *
+bit 517 O 1 *
+bit 516 I 1 BSC172
+#
+# BSC group 171 (CLK3)
+# T144 - Family-specific input pin 22
+# Q208 - Family-specific input pin 28
+# F256 - Family-specific input pin J1
+#
+bit 515 O 1 *
+bit 514 O 1 *
+bit 513 I 1 BSC171
+#
+# BSC group 170
+# T144 - I/O pin 24
+# Q208 - I/O pin 30
+# F256 - I/O pin K2
+#
+bit 512 O 1 BSC170 511 1 Z
+bit 511 C 1 *
+bit 510 I 1 BSC170
+#
+# BSC group 169
+# T144 - I/O pin 25
+# Q208 - I/O pin 31
+# F256 - I/O pin K1
+#
+bit 509 O 1 BSC169 508 1 Z
+bit 508 C 1 *
+bit 507 I 1 BSC169
+#
+# BSC group 168
+# T144 - unused pad
+# Q208 - unused pad
+# F256 - I/O pin K4
+#
+bit 506 O 1 BSC168 505 1 Z
+bit 505 C 1 *
+bit 504 I 1 BSC168
+#
+# BSC group 167
+# T144 - unused pad
+# Q208 - I/O pin 33
+# F256 - I/O pin K5
+#
+bit 503 O 1 BSC167 502 1 Z
+bit 502 C 1 *
+bit 501 I 1 BSC167
+#
+# BSC group 166
+# T144 - unused pad
+# Q208 - I/O pin 34
+# F256 - unused pad
+#
+bit 500 O 1 BSC166 499 1 Z
+bit 499 C 1 *
+bit 498 I 1 BSC166
+#
+# BSC group 165
+# T144 - unused pad
+# Q208 - I/O pin 35
+# F256 - I/O pin L1
+#
+bit 497 O 1 BSC165 496 1 Z
+bit 496 C 1 *
+bit 495 I 1 BSC165
+#
+# BSC group 164
+# T144 - unused pad
+# Q208 - unused pad
+# F256 - I/O pin L2
+#
+bit 494 O 1 BSC164 493 1 Z
+bit 493 C 1 *
+bit 492 I 1 BSC164
+#
+# BSC group 163
+# T144 - I/O pin 28
+# Q208 - I/O pin 37
+# F256 - I/O pin J4
+#
+bit 491 O 1 BSC163 490 1 Z
+bit 490 C 1 *
+bit 489 I 1 BSC163
+#
+# BSC group 162
+# T144 - unused pad
+# Q208 - unused pad
+# F256 - I/O pin M1
+#
+bit 488 O 1 BSC162 487 1 Z
+bit 487 C 1 *
+bit 486 I 1 BSC162
+#
+# BSC group 161
+# T144 - unused pad
+# Q208 - unused pad
+# F256 - I/O pin M2
+#
+bit 485 O 1 BSC161 484 1 Z
+bit 484 C 1 *
+bit 483 I 1 BSC161
+#
+# BSC group 160
+# T144 - unused pad
+# Q208 - unused pad
+# F256 - I/O pin M3
+#
+bit 482 O 1 BSC160 481 1 Z
+bit 481 C 1 *
+bit 480 I 1 BSC160
+#
+# BSC group 159
+# T144 - unused pad
+# Q208 - I/O pin 39
+# F256 - I/O pin L3
+#
+bit 479 O 1 BSC159 478 1 Z
+bit 478 C 1 *
+bit 477 I 1 BSC159
+#
+# BSC group 158
+# T144 - unused pad
+# Q208 - I/O pin 40
+# F256 - I/O pin N1
+#
+bit 476 O 1 BSC158 475 1 Z
+bit 475 C 1 *
+bit 474 I 1 BSC158
+#
+# BSC group 157
+# T144 - unused pad
+# Q208 - I/O pin 41
+# F256 - I/O pin N2
+#
+bit 473 O 1 BSC157 472 1 Z
+bit 472 C 1 *
+bit 471 I 1 BSC157
+#
+# BSC group 156
+# T144 - unused pad
+# Q208 - unused pad
+# F256 - I/O pin P1
+#
+bit 470 O 1 BSC156 469 1 Z
+bit 469 C 1 *
+bit 468 I 1 BSC156
+#
+# BSC group 155
+# T144 - unused pad
+# Q208 - unused pad
+# F256 - I/O pin P2
+#
+bit 467 O 1 BSC155 466 1 Z
+bit 466 C 1 *
+bit 465 I 1 BSC155
+#
+# BSC group 154
+# T144 - unused pad
+# Q208 - I/O pin 43
+# F256 - unused pad
+#
+bit 464 O 1 BSC154 463 1 Z
+bit 463 C 1 *
+bit 462 I 1 BSC154
+#
+# BSC group 153
+# T144 - unused pad
+# Q208 - I/O pin 44
+# F256 - I/O pin N3
+#
+bit 461 O 1 BSC153 460 1 Z
+bit 460 C 1 *
+bit 459 I 1 BSC153
+#
+# BSC group 152
+# T144 - unused pad
+# Q208 - I/O pin 45
+# F256 - I/O pin N4
+#
+bit 458 O 1 BSC152 457 1 Z
+bit 457 C 1 *
+bit 456 I 1 BSC152
+#
+# BSC group 151
+# T144 - I/O pin 30
+# Q208 - I/O pin 46
+# F256 - I/O pin P3
+#
+bit 455 O 1 BSC151 454 1 Z
+bit 454 C 1 *
+bit 453 I 1 BSC151
+#
+# BSC group 150
+# T144 - I/O pin 31
+# Q208 - I/O pin 47
+# F256 - I/O pin L4
+#
+bit 452 O 1 BSC150 451 1 Z
+bit 451 C 1 *
+bit 450 I 1 BSC150
+#
+# BSC group 149
+# T144 - I/O pin 32
+# Q208 - I/O pin 48
+# F256 - I/O pin M4
+#
+bit 449 O 1 BSC149 448 1 Z
+bit 448 C 1 *
+bit 447 I 1 BSC149
+#
+# BSC group 148
+# T144 - I/O pin 40
+# Q208 - I/O pin 56
+# F256 - I/O pin R3
+#
+bit 446 O 1 BSC148 445 1 Z
+bit 445 C 1 *
+bit 444 I 1 BSC148
+#
+# BSC group 147
+# T144 - I/O pin 41
+# Q208 - I/O pin 57
+# F256 - I/O pin T3
+#
+bit 443 O 1 BSC147 442 1 Z
+bit 442 C 1 *
+bit 441 I 1 BSC147
+#
+# BSC group 146
+# T144 - I/O pin 42
+# Q208 - I/O pin 58
+# F256 - I/O pin P5
+#
+bit 440 O 1 BSC146 439 1 Z
+bit 439 C 1 *
+bit 438 I 1 BSC146
+#
+# BSC group 145
+# T144 - I/O pin 43
+# Q208 - I/O pin 59
+# F256 - I/O pin P4
+#
+bit 437 O 1 BSC145 436 1 Z
+bit 436 C 1 *
+bit 435 I 1 BSC145
+#
+# BSC group 144
+# T144 - I/O pin 44
+# Q208 - I/O pin 60
+# F256 - I/O pin T4
+#
+bit 434 O 1 BSC144 433 1 Z
+bit 433 C 1 *
+bit 432 I 1 BSC144
+#
+# BSC group 143
+# T144 - I/O pin 45
+# Q208 - I/O pin 61
+# F256 - I/O pin R4
+#
+bit 431 O 1 BSC143 430 1 Z
+bit 430 C 1 *
+bit 429 I 1 BSC143
+#
+# BSC group 142
+# T144 - I/O pin 47
+# Q208 - I/O pin 63
+# F256 - I/O pin T5
+#
+bit 428 O 1 BSC142 427 1 Z
+bit 427 C 1 *
+bit 426 I 1 BSC142
+#
+# BSC group 141
+# T144 - I/O pin 48
+# Q208 - I/O pin 64
+# F256 - I/O pin R5
+#
+bit 425 O 1 BSC141 424 1 Z
+bit 424 C 1 *
+bit 423 I 1 BSC141
+#
+# BSC group 140
+# T144 - unused pad
+# Q208 - unused pad
+# F256 - I/O pin N7
+#
+bit 422 O 1 BSC140 421 1 Z
+bit 421 C 1 *
+bit 420 I 1 BSC140
+#
+# BSC group 139
+# T144 - unused pad
+# Q208 - unused pad
+# F256 - I/O pin K7
+#
+bit 419 O 1 BSC139 418 1 Z
+bit 418 C 1 *
+bit 417 I 1 BSC139
+#
+# BSC group 138
+# T144 - unused pad
+# Q208 - unused pad
+# F256 - I/O pin K6
+#
+bit 416 O 1 BSC138 415 1 Z
+bit 415 C 1 *
+bit 414 I 1 BSC138
+#
+# BSC group 137
+# T144 - unused pad
+# Q208 - unused pad
+# F256 - I/O pin T6
+#
+bit 413 O 1 BSC137 412 1 Z
+bit 412 C 1 *
+bit 411 I 1 BSC137
+#
+# BSC group 136
+# T144 - unused pad
+# Q208 - unused pad
+# F256 - I/O pin R6
+#
+bit 410 O 1 BSC136 409 1 Z
+bit 409 C 1 *
+bit 408 I 1 BSC136
+#
+# BSC group 135
+# T144 - unused pad
+# Q208 - unused pad
+# F256 - I/O pin P6
+#
+bit 407 O 1 BSC135 406 1 Z
+bit 406 C 1 *
+bit 405 I 1 BSC135
+#
+# BSC group 134
+# T144 - unused pad
+# Q208 - unused pad
+# F256 - I/O pin N6
+#
+bit 404 O 1 BSC134 403 1 Z
+bit 403 C 1 *
+bit 402 I 1 BSC134
+#
+# BSC group 133
+# T144 - I/O pin 51
+# Q208 - I/O pin 67
+# F256 - I/O pin N8
+#
+bit 401 O 1 BSC133 400 1 Z
+bit 400 C 1 *
+bit 399 I 1 BSC133
+#
+# BSC group 132
+# T144 - I/O pin 52
+# Q208 - I/O pin 68
+# F256 - I/O pin T7
+#
+bit 398 O 1 BSC132 397 1 Z
+bit 397 C 1 *
+bit 396 I 1 BSC132
+#
+# BSC group 131
+# T144 - unused pad
+# Q208 - I/O pin 69
+# F256 - I/O pin R7
+#
+bit 395 O 1 BSC131 394 1 Z
+bit 394 C 1 *
+bit 393 I 1 BSC131
+#
+# BSC group 130
+# T144 - unused pad
+# Q208 - unused pad
+# F256 - I/O pin L7
+#
+bit 392 O 1 BSC130 391 1 Z
+bit 391 C 1 *
+bit 390 I 1 BSC130
+#
+# BSC group 129
+# T144 - unused pad
+# Q208 - unused pad
+# F256 - I/O pin L8
+#
+bit 389 O 1 BSC129 388 1 Z
+bit 388 C 1 *
+bit 387 I 1 BSC129
+#
+# BSC group 128
+# T144 - I/O pin 53
+# Q208 - I/O pin 70
+# F256 - I/O pin T8
+#
+bit 386 O 1 BSC128 385 1 Z
+bit 385 C 1 *
+bit 384 I 1 BSC128
+#
+# BSC group 127
+# T144 - I/O pin 55
+# Q208 - I/O pin 72
+# F256 - I/O pin R8
+#
+bit 383 O 1 BSC127 382 1 Z
+bit 382 C 1 *
+bit 381 I 1 BSC127
+#
+# BSC group 126
+# T144 - I/O pin 57
+# Q208 - I/O pin 74
+# F256 - I/O pin T9
+#
+bit 380 O 1 BSC126 379 1 Z
+bit 379 C 1 *
+bit 378 I 1 BSC126
+#
+# BSC group 125
+# T144 - I/O pin 58
+# Q208 - I/O pin 75
+# F256 - I/O pin R9
+#
+bit 377 O 1 BSC125 376 1 Z
+bit 376 C 1 *
+bit 375 I 1 BSC125
+#
+# BSC group 124
+# T144 - I/O pin 59
+# Q208 - I/O pin 76
+# F256 - I/O pin N9
+#
+bit 374 O 1 BSC124 373 1 Z
+bit 373 C 1 *
+bit 372 I 1 BSC124
+#
+# BSC group 123
+# T144 - I/O pin 60
+# Q208 - I/O pin 77
+# F256 - I/O pin N10
+#
+bit 371 O 1 BSC123 370 1 Z
+bit 370 C 1 *
+bit 369 I 1 BSC123
+#
+# BSC group 122
+# T144 - unused pad
+# Q208 - unused pad
+# F256 - I/O pin T11
+#
+bit 368 O 1 BSC122 367 1 Z
+bit 367 C 1 *
+bit 366 I 1 BSC122
+#
+# BSC group 121
+# T144 - unused pad
+# Q208 - unused pad
+# F256 - I/O pin R11
+#
+bit 365 O 1 BSC121 364 1 Z
+bit 364 C 1 *
+bit 363 I 1 BSC121
+#
+# BSC group 120
+# T144 - unused pad
+# Q208 - I/O pin 80
+# F256 - I/O pin P11
+#
+bit 362 O 1 BSC120 361 1 Z
+bit 361 C 1 *
+bit 360 I 1 BSC120
+#
+# BSC group 119
+# T144 - unused pad
+# Q208 - I/O pin 81
+# F256 - I/O pin L9
+#
+bit 359 O 1 BSC119 358 1 Z
+bit 358 C 1 *
+bit 357 I 1 BSC119
+#
+# BSC group 118
+# T144 - unused pad
+# Q208 - I/O pin 82
+# F256 - I/O pin L10
+#
+bit 356 O 1 BSC118 355 1 Z
+bit 355 C 1 *
+bit 354 I 1 BSC118
+#
+# BSC group 117
+# T144 - unused pad
+# Q208 - I/O pin 84
+# F256 - I/O pin R10
+#
+bit 353 O 1 BSC117 352 1 Z
+bit 352 C 1 *
+bit 351 I 1 BSC117
+#
+# BSC group 116
+# T144 - unused pad
+# Q208 - I/O pin 86
+# F256 - I/O pin T10
+#
+bit 350 O 1 BSC116 349 1 Z
+bit 349 C 1 *
+bit 348 I 1 BSC116
+#
+# BSC group 115
+# T144 - unused pad
+# Q208 - I/O pin 87
+# F256 - I/O pin K11
+#
+bit 347 O 1 BSC115 346 1 Z
+bit 346 C 1 *
+bit 345 I 1 BSC115
+#
+# BSC group 114
+# T144 - unused pad
+# Q208 - I/O pin 88
+# F256 - I/O pin K10
+#
+bit 344 O 1 BSC114 343 1 Z
+bit 343 C 1 *
+bit 342 I 1 BSC114
+#
+# BSC group 113
+# T144 - I/O pin 63
+# Q208 - I/O pin 89
+# F256 - I/O pin N11
+#
+bit 341 O 1 BSC113 340 1 Z
+bit 340 C 1 *
+bit 339 I 1 BSC113
+#
+# BSC group 112
+# T144 - unused pad
+# Q208 - I/O pin 90
+# F256 - I/O pin P12
+#
+bit 338 O 1 BSC112 337 1 Z
+bit 337 C 1 *
+bit 336 I 1 BSC112
+#
+# BSC group 111
+# T144 - unused pad
+# Q208 - I/O pin 92
+# F256 - I/O pin P13
+#
+bit 335 O 1 BSC111 334 1 Z
+bit 334 C 1 *
+bit 333 I 1 BSC111
+#
+# BSC group 110
+# T144 - I/O pin 64
+# Q208 - I/O pin 94
+# F256 - I/O pin T12
+#
+bit 332 O 1 BSC110 331 1 Z
+bit 331 C 1 *
+bit 330 I 1 BSC110
+#
+# BSC group 109
+# T144 - I/O pin 65
+# Q208 - I/O pin 95
+# F256 - I/O pin R12
+#
+bit 329 O 1 BSC109 328 1 Z
+bit 328 C 1 *
+bit 327 I 1 BSC109
+#
+# BSC group 108
+# T144 - unused pad
+# Q208 - I/O pin 96
+# F256 - unused pad
+#
+bit 326 O 1 BSC108 325 1 Z
+bit 325 C 1 *
+bit 324 I 1 BSC108
+#
+# BSC group 107
+# T144 - unused pad
+# Q208 - I/O pin 97
+# F256 - I/O pin T13
+#
+bit 323 O 1 BSC107 322 1 Z
+bit 322 C 1 *
+bit 321 I 1 BSC107
+#
+# BSC group 106
+# T144 - I/O pin 67
+# Q208 - I/O pin 99
+# F256 - I/O pin R13
+#
+bit 320 O 1 BSC106 319 1 Z
+bit 319 C 1 *
+bit 318 I 1 BSC106
+#
+# BSC group 105
+# T144 - I/O pin 69
+# Q208 - I/O pin 101
+# F256 - I/O pin T14
+#
+bit 317 O 1 BSC105 316 1 Z
+bit 316 C 1 *
+bit 315 I 1 BSC105
+#
+# BSC group 104
+# T144 - I/O pin 70
+# Q208 - I/O pin 102
+# F256 - I/O pin R14
+#
+bit 314 O 1 BSC104 313 1 Z
+bit 313 C 1 *
+bit 312 I 1 BSC104
+#
+# BSC group 103
+# T144 - I/O pin 71
+# Q208 - I/O pin 103
+# F256 - I/O pin M11
+#
+bit 311 O 1 BSC103 310 1 Z
+bit 310 C 1 *
+bit 309 I 1 BSC103
+#
+# BSC group 102
+# T144 - I/O pin 72
+# Q208 - I/O pin 104
+# F256 - I/O pin L11
+#
+bit 308 O 1 BSC102 307 1 Z
+bit 307 C 1 *
+bit 306 I 1 BSC102
+#
+# BSC group 101
+# T144 - I/O pin 73
+# Q208 - I/O pin 105
+# F256 - I/O pin N12
+#
+bit 305 O 1 BSC101 304 1 Z
+bit 304 C 1 *
+bit 303 I 1 BSC101
+#
+# BSC group 100
+# T144 - I/O pin 74
+# Q208 - I/O pin 106
+# F256 - I/O pin M12
+#
+bit 302 O 1 BSC100 301 1 Z
+bit 301 C 1 *
+bit 300 I 1 BSC100
+#
+# BSC group 99
+# T144 - unused pad
+# Q208 - unused pad
+# F256 - I/O pin L12
+#
+bit 299 O 1 BSC099 298 1 Z
+bit 298 C 1 *
+bit 297 I 1 BSC099
+#
+# BSC group 98
+# T144 - unused pad
+# Q208 - unused pad
+# F256 - I/O pin K13
+#
+bit 296 O 1 BSC098 295 1 Z
+bit 295 C 1 *
+bit 294 I 1 BSC098
+#
+# BSC group 97
+# T144 - I/O pin 75
+# Q208 - I/O pin 107
+# F256 - I/O pin N13
+#
+bit 293 O 1 BSC097 292 1 Z
+bit 292 C 1 *
+bit 291 I 1 BSC097
+#
+# BSC group 96
+# T144 - I/O pin 76
+# Q208 - I/O pin 108
+# F256 - I/O pin N14
+#
+bit 290 O 1 BSC096 289 1 Z
+bit 289 C 1 *
+bit 288 I 1 BSC096
+#
+# BSC group 95
+# T144 - unused pad
+# Q208 - I/O pin 110
+# F256 - I/O pin P15
+#
+bit 287 O 1 BSC095 286 1 Z
+bit 286 C 1 *
+bit 285 I 1 BSC095
+#
+# BSC group 94
+# T144 - unused pad
+# Q208 - I/O pin 112
+# F256 - I/O pin P16
+#
+bit 284 O 1 BSC094 283 1 Z
+bit 283 C 1 *
+bit 282 I 1 BSC094
+#
+# BSC group 93
+# T144 - unused pad
+# Q208 - I/O pin 113
+# F256 - I/O pin N15
+#
+bit 281 O 1 BSC093 280 1 Z
+bit 280 C 1 *
+bit 279 I 1 BSC093
+#
+# BSC group 92
+# T144 - unused pad
+# Q208 - I/O pin 114
+# F256 - I/O pin N16
+#
+bit 278 O 1 BSC092 277 1 Z
+bit 277 C 1 *
+bit 276 I 1 BSC092
+#
+# BSC group 91
+# T144 - unused pad
+# Q208 - unused pad
+# F256 - I/O pin P14
+#
+bit 275 O 1 BSC091 274 1 Z
+bit 274 C 1 *
+bit 273 I 1 BSC091
+#
+# BSC group 90
+# T144 - unused pad
+# Q208 - I/O pin 115
+# F256 - unused pad
+#
+bit 272 O 1 BSC090 271 1 Z
+bit 271 C 1 *
+bit 270 I 1 BSC090
+#
+# BSC group 89
+# T144 - unused pad
+# Q208 - I/O pin 116
+# F256 - unused pad
+#
+bit 269 O 1 BSC089 268 1 Z
+bit 268 C 1 *
+bit 267 I 1 BSC089
+#
+# BSC group 88
+# T144 - I/O pin 79
+# Q208 - I/O pin 117
+# F256 - I/O pin M14
+#
+bit 266 O 1 BSC088 265 1 Z
+bit 265 C 1 *
+bit 264 I 1 BSC088
+#
+# BSC group 87
+# T144 - unused pad
+# Q208 - unused pad
+# F256 - I/O pin M15
+#
+bit 263 O 1 BSC087 262 1 Z
+bit 262 C 1 *
+bit 261 I 1 BSC087
+#
+# BSC group 86
+# T144 - unused pad
+# Q208 - unused pad
+# F256 - I/O pin M16
+#
+bit 260 O 1 BSC086 259 1 Z
+bit 259 C 1 *
+bit 258 I 1 BSC086
+#
+# BSC group 85
+# T144 - unused pad
+# Q208 - I/O pin 118
+# F256 - unused pad
+#
+bit 257 O 1 BSC085 256 1 Z
+bit 256 C 1 *
+bit 255 I 1 BSC085
+#
+# BSC group 84
+# T144 - unused pad
+# Q208 - unused pad
+# F256 - I/O pin L14
+#
+bit 254 O 1 BSC084 253 1 Z
+bit 253 C 1 *
+bit 252 I 1 BSC084
+#
+# BSC group 83
+# T144 - unused pad
+# Q208 - unused pad
+# F256 - I/O pin L15
+#
+bit 251 O 1 BSC083 250 1 Z
+bit 250 C 1 *
+bit 249 I 1 BSC083
+#
+# BSC group 82
+# T144 - unused pad
+# Q208 - unused pad
+# F256 - I/O pin L16
+#
+bit 248 O 1 BSC082 247 1 Z
+bit 247 C 1 *
+bit 246 I 1 BSC082
+#
+# BSC group 81 (nSTATUS)
+# T144 - untestable Family-specific pin 82
+# Q208 - untestable Family-specific pin 121
+# F256 - untestable Family-specific pin M13
+#
+bit 245 O 1 *
+bit 244 O 1 *
+bit 243 O 1 *
+#
+# BSC group 80 (CONF_DONE)
+# T144 - untestable Family-specific pin 83
+# Q208 - untestable Family-specific pin 123
+# F256 - untestable Family-specific pin L13
+#
+bit 242 O 1 *
+bit 241 O 1 *
+bit 240 O 1 *
+#
+# BSC group 79 (MSEL1)
+# T144 - Family-specific input pin 84
+# Q208 - Family-specific input pin 125
+# F256 - Family-specific input pin K12
+#
+bit 239 O 1 *
+bit 238 O 1 *
+bit 237 I 1 BSC079
+#
+# BSC group 78 (MSEL0)
+# T144 - Family-specific input pin 85
+# Q208 - Family-specific input pin 126
+# F256 - Family-specific input pin J13
+#
+bit 236 O 1 *
+bit 235 O 1 *
+bit 234 I 1 BSC078
+#
+# BSC group 77
+# T144 - I/O pin 86
+# Q208 - I/O pin 127
+# F256 - I/O pin K16
+#
+bit 233 O 1 BSC077 232 1 Z
+bit 232 C 1 *
+bit 231 I 1 BSC077
+#
+# BSC group 76
+# T144 - I/O pin 87
+# Q208 - I/O pin 128
+# F256 - I/O pin K15
+#
+bit 230 O 1 BSC076 229 1 Z
+bit 229 C 1 *
+bit 228 I 1 BSC076
+#
+# BSC group 75 (CLK7)
+# T144 - Family-specific input pin 88
+# Q208 - Family-specific input pin 129
+# F256 - Family-specific input pin J16
+#
+bit 227 O 1 *
+bit 226 O 1 *
+bit 225 I 1 BSC075
+#
+# BSC group 74 (CLK6)
+# T144 - Family-specific input pin 89
+# Q208 - Family-specific input pin 130
+# F256 - Family-specific input pin J15
+#
+bit 224 O 1 *
+bit 223 O 1 *
+bit 222 I 1 BSC074
+#
+# BSC group 73 (CLK5)
+# T144 - Family-specific input pin 90
+# Q208 - Family-specific input pin 131
+# F256 - Family-specific input pin H15
+#
+bit 221 O 1 *
+bit 220 O 1 *
+bit 219 I 1 BSC073
+#
+# BSC group 72 (CLK4)
+# T144 - Family-specific input pin 91
+# Q208 - Family-specific input pin 132
+# F256 - Family-specific input pin H16
+#
+bit 218 O 1 *
+bit 217 O 1 *
+bit 216 I 1 BSC072
+#
+# BSC group 71
+# T144 - I/O pin 92
+# Q208 - I/O pin 133
+# F256 - I/O pin H12
+#
+bit 215 O 1 BSC071 214 1 Z
+bit 214 C 1 *
+bit 213 I 1 BSC071
+#
+# BSC group 70
+# T144 - I/O pin 93
+# Q208 - I/O pin 134
+# F256 - I/O pin J12
+#
+bit 212 O 1 BSC070 211 1 Z
+bit 211 C 1 *
+bit 210 I 1 BSC070
+#
+# BSC group 69
+# T144 - I/O pin 94
+# Q208 - I/O pin 135
+# F256 - I/O pin G16
+#
+bit 209 O 1 BSC069 208 1 Z
+bit 208 C 1 *
+bit 207 I 1 BSC069
+#
+# BSC group 68
+# T144 - I/O pin 96
+# Q208 - I/O pin 137
+# F256 - I/O pin G15
+#
+bit 206 O 1 BSC068 205 1 Z
+bit 205 C 1 *
+bit 204 I 1 BSC068
+#
+# BSC group 67
+# T144 - I/O pin 97
+# Q208 - I/O pin 138
+# F256 - I/O pin F15
+#
+bit 203 O 1 BSC067 202 1 Z
+bit 202 C 1 *
+bit 201 I 1 BSC067
+#
+# BSC group 66
+# T144 - unused pad
+# Q208 - I/O pin 139
+# F256 - I/O pin F16
+#
+bit 200 O 1 BSC066 199 1 Z
+bit 199 C 1 *
+bit 198 I 1 BSC066
+#
+# BSC group 65
+# T144 - unused pad
+# Q208 - I/O pin 141
+# F256 - I/O pin J11
+#
+bit 197 O 1 BSC065 196 1 Z
+bit 196 C 1 *
+bit 195 I 1 BSC065
+#
+# BSC group 64
+# T144 - unused pad
+# Q208 - I/O pin 142
+# F256 - I/O pin H11
+#
+bit 194 O 1 BSC064 193 1 Z
+bit 193 C 1 *
+bit 192 I 1 BSC064
+#
+# BSC group 63
+# T144 - unused pad
+# Q208 - unused pad
+# F256 - I/O pin G12
+#
+bit 191 O 1 BSC063 190 1 Z
+bit 190 C 1 *
+bit 189 I 1 BSC063
+#
+# BSC group 62
+# T144 - unused pad
+# Q208 - unused pad
+# F256 - I/O pin G13
+#
+bit 188 O 1 BSC062 187 1 Z
+bit 187 C 1 *
+bit 186 I 1 BSC062
+#
+# BSC group 61
+# T144 - unused pad
+# Q208 - I/O pin 143
+# F256 - I/O pin E13
+#
+bit 185 O 1 BSC061 184 1 Z
+bit 184 C 1 *
+bit 183 I 1 BSC061
+#
+# BSC group 60
+# T144 - unused pad
+# Q208 - I/O pin 144
+# F256 - I/O pin F13
+#
+bit 182 O 1 BSC060 181 1 Z
+bit 181 C 1 *
+bit 180 I 1 BSC060
+#
+# BSC group 59
+# T144 - I/O pin 99
+# Q208 - I/O pin 145
+# F256 - I/O pin H13
+#
+bit 179 O 1 BSC059 178 1 Z
+bit 178 C 1 *
+bit 177 I 1 BSC059
+#
+# BSC group 58
+# T144 - unused pad
+# Q208 - unused pad
+# F256 - I/O pin D15
+#
+bit 176 O 1 BSC058 175 1 Z
+bit 175 C 1 *
+bit 174 I 1 BSC058
+#
+# BSC group 57
+# T144 - unused pad
+# Q208 - unused pad
+# F256 - I/O pin D16
+#
+bit 173 O 1 BSC057 172 1 Z
+bit 172 C 1 *
+bit 171 I 1 BSC057
+#
+# BSC group 56
+# T144 - unused pad
+# Q208 - unused pad
+# F256 - I/O pin E15
+#
+bit 170 O 1 BSC056 169 1 Z
+bit 169 C 1 *
+bit 168 I 1 BSC056
+#
+# BSC group 55
+# T144 - unused pad
+# Q208 - unused pad
+# F256 - I/O pin E16
+#
+bit 167 O 1 BSC055 166 1 Z
+bit 166 C 1 *
+bit 165 I 1 BSC055
+#
+# BSC group 54
+# T144 - unused pad
+# Q208 - unused pad
+# F256 - I/O pin F14
+#
+bit 164 O 1 BSC054 163 1 Z
+bit 163 C 1 *
+bit 162 I 1 BSC054
+#
+# BSC group 53
+# T144 - I/O pin 100
+# Q208 - I/O pin 146
+# F256 - I/O pin C15
+#
+bit 161 O 1 BSC053 160 1 Z
+bit 160 C 1 *
+bit 159 I 1 BSC053
+#
+# BSC group 52
+# T144 - I/O pin 101
+# Q208 - I/O pin 147
+# F256 - I/O pin C16
+#
+bit 158 O 1 BSC052 157 1 Z
+bit 157 C 1 *
+bit 156 I 1 BSC052
+#
+# BSC group 51
+# T144 - unused pad
+# Q208 - I/O pin 149
+# F256 - I/O pin C14
+#
+bit 155 O 1 BSC051 154 1 Z
+bit 154 C 1 *
+bit 153 I 1 BSC051
+#
+# BSC group 50
+# T144 - unused pad
+# Q208 - I/O pin 150
+# F256 - I/O pin D13
+#
+bit 152 O 1 BSC050 151 1 Z
+bit 151 C 1 *
+bit 150 I 1 BSC050
+#
+# BSC group 49
+# T144 - I/O pin 103
+# Q208 - I/O pin 151
+# F256 - I/O pin E14
+#
+bit 149 O 1 BSC049 148 1 Z
+bit 148 C 1 *
+bit 147 I 1 BSC049
+#
+# BSC group 48
+# T144 - I/O pin 104
+# Q208 - I/O pin 152
+# F256 - I/O pin D14
+#
+bit 146 O 1 BSC048 145 1 Z
+bit 145 C 1 *
+bit 144 I 1 BSC048
+#
+# BSC group 47
+# T144 - I/O pin 112
+# Q208 - I/O pin 160
+# F256 - I/O pin B14
+#
+bit 143 O 1 BSC047 142 1 Z
+bit 142 C 1 *
+bit 141 I 1 BSC047
+#
+# BSC group 46
+# T144 - I/O pin 113
+# Q208 - I/O pin 161
+# F256 - I/O pin A14
+#
+bit 140 O 1 BSC046 139 1 Z
+bit 139 C 1 *
+bit 138 I 1 BSC046
+#
+# BSC group 45
+# T144 - I/O pin 114
+# Q208 - I/O pin 162
+# F256 - I/O pin C13
+#
+bit 137 O 1 BSC045 136 1 Z
+bit 136 C 1 *
+bit 135 I 1 BSC045
+#
+# BSC group 44
+# T144 - I/O pin 115
+# Q208 - I/O pin 163
+# F256 - I/O pin C12
+#
+bit 134 O 1 BSC044 133 1 Z
+bit 133 C 1 *
+bit 132 I 1 BSC044
+#
+# BSC group 43
+# T144 - unused pad
+# Q208 - I/O pin 164
+# F256 - I/O pin B13
+#
+bit 131 O 1 BSC043 130 1 Z
+bit 130 C 1 *
+bit 129 I 1 BSC043
+#
+# BSC group 42
+# T144 - unused pad
+# Q208 - I/O pin 165
+# F256 - I/O pin A13
+#
+bit 128 O 1 BSC042 127 1 Z
+bit 127 C 1 *
+bit 126 I 1 BSC042
+#
+# BSC group 41
+# T144 - I/O pin 118
+# Q208 - I/O pin 168
+# F256 - I/O pin B12
+#
+bit 125 O 1 BSC041 124 1 Z
+bit 124 C 1 *
+bit 123 I 1 BSC041
+#
+# BSC group 40
+# T144 - I/O pin 119
+# Q208 - I/O pin 169
+# F256 - I/O pin A12
+#
+bit 122 O 1 BSC040 121 1 Z
+bit 121 C 1 *
+bit 120 I 1 BSC040
+#
+# BSC group 39
+# T144 - I/O pin 120
+# Q208 - I/O pin 170
+# F256 - I/O pin C11
+#
+bit 119 O 1 BSC039 118 1 Z
+bit 118 C 1 *
+bit 117 I 1 BSC039
+#
+# BSC group 38
+# T144 - I/O pin 121
+# Q208 - I/O pin 171
+# F256 - I/O pin B11
+#
+bit 116 O 1 BSC038 115 1 Z
+bit 115 C 1 *
+bit 114 I 1 BSC038
+#
+# BSC group 37
+# T144 - I/O pin 122
+# Q208 - I/O pin 173
+# F256 - I/O pin A11
+#
+bit 113 O 1 BSC037 112 1 Z
+bit 112 C 1 *
+bit 111 I 1 BSC037
+#
+# BSC group 36
+# T144 - unused pad
+# Q208 - unused pad
+# F256 - I/O pin G10
+#
+bit 110 O 1 BSC036 109 1 Z
+bit 109 C 1 *
+bit 108 I 1 BSC036
+#
+# BSC group 35
+# T144 - unused pad
+# Q208 - unused pad
+# F256 - I/O pin G11
+#
+bit 107 O 1 BSC035 106 1 Z
+bit 106 C 1 *
+bit 105 I 1 BSC035
+#
+# BSC group 34
+# T144 - unused pad
+# Q208 - I/O pin 175
+# F256 - I/O pin B10
+#
+bit 104 O 1 BSC034 103 1 Z
+bit 103 C 1 *
+bit 102 I 1 BSC034
+#
+# BSC group 33
+# T144 - unused pad
+# Q208 - I/O pin 176
+# F256 - I/O pin A10
+#
+bit 101 O 1 BSC033 100 1 Z
+bit 100 C 1 *
+bit 99 I 1 BSC033
+#
+# BSC group 32
+# T144 - unused pad
+# Q208 - unused pad
+# F256 - I/O pin F10
+#
+bit 98 O 1 BSC032 97 1 Z
+bit 97 C 1 *
+bit 96 I 1 BSC032
+#
+# BSC group 31
+# T144 - unused pad
+# Q208 - unused pad
+# F256 - I/O pin F9
+#
+bit 95 O 1 BSC031 94 1 Z
+bit 94 C 1 *
+bit 93 I 1 BSC031
+#
+# BSC group 30
+# T144 - unused pad
+# Q208 - unused pad
+# F256 - I/O pin D9
+#
+bit 92 O 1 BSC030 91 1 Z
+bit 91 C 1 *
+bit 90 I 1 BSC030
+#
+# BSC group 29
+# T144 - I/O pin 125
+# Q208 - I/O pin 179
+# F256 - I/O pin D11
+#
+bit 89 O 1 BSC029 88 1 Z
+bit 88 C 1 *
+bit 87 I 1 BSC029
+#
+# BSC group 28
+# T144 - I/O pin 126
+# Q208 - I/O pin 180
+# F256 - I/O pin D10
+#
+bit 86 O 1 BSC028 85 1 Z
+bit 85 C 1 *
+bit 84 I 1 BSC028
+#
+# BSC group 27
+# T144 - unused pad
+# Q208 - I/O pin 181
+# F256 - I/O pin A9
+#
+bit 83 O 1 BSC027 82 1 Z
+bit 82 C 1 *
+bit 81 I 1 BSC027
+#
+# BSC group 26
+# T144 - unused pad
+# Q208 - I/O pin 182
+# F256 - I/O pin B9
+#
+bit 80 O 1 BSC026 79 1 Z
+bit 79 C 1 *
+bit 78 I 1 BSC026
+#
+# BSC group 25
+# T144 - unused pad
+# Q208 - unused pad
+# F256 - I/O pin A8
+#
+bit 77 O 1 BSC025 76 1 Z
+bit 76 C 1 *
+bit 75 I 1 BSC025
+#
+# BSC group 24
+# T144 - unused pad
+# Q208 - unused pad
+# F256 - I/O pin B8
+#
+bit 74 O 1 BSC024 73 1 Z
+bit 73 C 1 *
+bit 72 I 1 BSC024
+#
+# BSC group 23
+# T144 - unused pad
+# Q208 - unused pad
+# F256 - I/O pin A7
+#
+bit 71 O 1 BSC023 70 1 Z
+bit 70 C 1 *
+bit 69 I 1 BSC023
+#
+# BSC group 22
+# T144 - I/O pin 129
+# Q208 - I/O pin 185
+# F256 - I/O pin B7
+#
+bit 68 O 1 BSC022 67 1 Z
+bit 67 C 1 *
+bit 66 I 1 BSC022
+#
+# BSC group 21
+# T144 - unused pad
+# Q208 - I/O pin 187
+# F256 - I/O pin F7
+#
+bit 65 O 1 BSC021 64 1 Z
+bit 64 C 1 *
+bit 63 I 1 BSC021
+#
+# BSC group 20
+# T144 - unused pad
+# Q208 - I/O pin 188
+# F256 - F8
+#
+bit 62 O 1 BSC020 61 1 Z
+bit 61 C 1 *
+bit 60 I 1 BSC020
+#
+# BSC group 19
+# T144 - unused pad
+# Q208 - I/O pin 189
+# F256 - unused pad
+#
+bit 59 O 1 BSC019 58 1 Z
+bit 58 C 1 *
+bit 57 I 1 BSC019
+#
+# BSC group 18
+# T144 - unused pad
+# Q208 - I/O pad 191
+# F256 - unused pad
+#
+bit 56 O 1 BSC018 55 1 Z
+bit 55 C 1 *
+bit 54 I 1 BSC018
+#
+# BSC group 17
+# T144 - I/O pin 132
+# Q208 - I/O pin 192
+# F256 - I/O pin D8
+#
+bit 53 O 1 BSC017 52 1 Z
+bit 52 C 1 *
+bit 51 I 1 BSC017
+#
+# BSC group 16
+# T144 - I/O pin 133
+# Q208 - I/O pin 193
+# F256 - I/O pin B6
+#
+bit 50 O 1 BSC016 49 1 Z
+bit 49 C 1 *
+bit 48 I 1 BSC016
+#
+# BSC group 15
+# T144 - I/O pin 134
+# Q208 - I/O pin 195
+# F256 - I/O pin A6
+#
+bit 47 O 1 BSC015 46 1 Z
+bit 46 C 1 *
+bit 45 I 1 BSC015
+#
+# BSC group 14
+# T144 - unused pad
+# Q208 - unused pad
+# F256 - I/O pin G6
+#
+bit 44 O 1 BSC014 43 1 Z
+bit 43 C 1 *
+bit 42 I 1 BSC014
+#
+# BSC group 13
+# T144 - unused pad
+# Q208 - unused pad
+# F256 - I/O pin G7
+#
+bit 41 O 1 BSC013 40 1 Z
+bit 40 C 1 *
+bit 39 I 1 BSC013
+#
+# BSC group 12
+# T144 - unused pad
+# Q208 - unused pad
+# F256 - I/O pin D7
+#
+bit 38 O 1 BSC012 37 1 Z
+bit 37 C 1 *
+bit 36 I 1 BSC012
+#
+# BSC group 11
+# T144 - unused pad
+# Q208 - I/O pin 197
+# F256 - I/O pin D6
+#
+bit 35 O 1 BSC011 34 1 Z
+bit 34 C 1 *
+bit 33 I 1 BSC011
+#
+# BSC group 10
+# T144 - unused pad
+# Q208 - I/O pin 198
+# F256 - I/O pin C6
+#
+bit 32 O 1 BSC010 31 1 Z
+bit 31 C 1 *
+bit 30 I 1 BSC010
+#
+# BSC group 9
+# T144 - unused pad
+# Q208 - unused pad
+# F256 - I/O pin C5
+#
+bit 29 O 1 BSC009 28 1 Z
+bit 28 C 1 *
+bit 27 I 1 BSC009
+#
+# BSC group 8
+# T144 - unused pad
+# Q208 - unused pad
+# F256 - I/O pin C4
+#
+bit 26 O 1 BSC008 25 1 Z
+bit 25 C 1 *
+bit 24 I 1 BSC008
+#
+# BSC group 7
+# T144 - I/O pin 135
+# Q208 - I/O pin 199
+# F256 - I/O pin B5
+#
+bit 23 O 1 BSC007 22 1 Z
+bit 22 C 1 *
+bit 21 I 1 BSC007
+#
+# BSC group 6
+# T144 - I/O pin 136
+# Q208 - I/O pin 200
+# F256 - I/O pin A5
+#
+bit 20 O 1 BSC006 19 1 Z
+bit 19 C 1 *
+bit 18 I 1 BSC006
+#
+# BSC group 5
+# T144 - I/O pin 137
+# Q208 - I/O pin 201
+# F256 - I/O pin B4
+#
+bit 17 O 1 BSC005 16 1 Z
+bit 16 C 1 *
+bit 15 I 1 BSC005
+#
+# BSC group 4
+# T144 - I/O pin 139
+# Q208 - I/O pin 203
+# F256 - I/O pin A4
+#
+bit 14 O 1 BSC004 13 1 Z
+bit 13 C 1 *
+bit 12 I 1 BSC004
+#
+# BSC group 3
+# T144 - I/O pin 141
+# Q208 - I/O pin 205
+# F256 - I/O pin A3
+#
+bit 11 O 1 BSC003 10 1 Z
+bit 10 C 1 *
+bit 9 I 1 BSC003
+#
+# BSC group 2
+# T144 - I/O pin 142
+# Q208 - I/O pin 206
+# F256 - I/O pin B3
+#
+bit 8 O 1 BSC002 7 1 Z
+bit 7 C 1 *
+bit 6 I 1 BSC002
+#
+# BSC group 1
+# T144 - I/O pin 143
+# Q208 - I/O pin 207
+# F256 - I/O pin E6
+#
+bit 5 O 1 BSC001 4 1 Z
+bit 4 C 1 *
+bit 3 I 1 BSC001
+#
+# BSC group 0
+# T144 - I/O pin 144
+# Q208 - I/O pin 208
+# F256 - I/O pin F6
+#
+bit 2 O 1 BSC000 1 1 Z
+bit 1 C 1 *
+bit 0 I 1 BSC000
--- /dev/null
+#
+# $Id$
+#
+# JTAG package script for EP2C8F256
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by H Hartley Sweeten <hsweeten@visionengravers.com>
+#
+# Note:
+# The signals defined in this file as unused pad are specified as
+# I/O pins in the main configuration file ep2c8.
+#
+
+salias IOC3 BSC198 # Note: this pin is specified as I/O. If AS mode is specified by MSEL it is output only (ASDO)
+salias IOF4 BSC197 # Note: this pin is specified as I/O. If AS mode is specified by MSEL it is output only (nCSO)
+salias IOC1 BSC196
+salias IOC2 BSC195
+salias IOD5 BSC194
+salias IOE5 BSC193
+salias IOF5 BSC192
+# BSC191 # unused pad
+salias IOD3 BSC190
+salias IOD4 BSC189
+salias IOF3 BSC188
+salias IOD2 BSC187
+salias IOD1 BSC186
+salias IOE3 BSC185
+salias IOE4 BSC184
+salias IOG4 BSC183
+salias IOJ6 BSC182
+salias IOH6 BSC181
+salias IOE1 BSC180
+salias IOE2 BSC179
+salias DATA0 BSC178 # Family-specific input pin F1
+salias DCLK BSC177 # Family-specific input pin H4
+# nCE BSC176 # untestable Family-specific pin G5
+salias CLK0 BSC175 # Family-specific input pin H2
+salias CLK1 BSC174 # Family-specific input pin H1
+# nCONFIG BSC173 # untestable Family-specific pin J5
+salias CLK2 BSC172 # Family-specific input pin J2
+salias CLK3 BSC171 # Family-specific input pin J1
+salias IOK2 BSC170
+salias IOK1 BSC169
+salias IOK4 BSC168
+salias IOK5 BSC167
+# BSC166 # unused pad
+salias IOL1 BSC165
+salias IOL2 BSC164
+salias IOJ4 BSC163
+salias IOM1 BSC162
+salias IOM2 BSC161
+salias IOM3 BSC160
+salias IOL3 BSC159
+salias ION1 BSC158
+salias ION2 BSC157
+salias IOP1 BSC156
+salias IOP2 BSC155
+# BSC154 # unused pad
+salias ION3 BSC153
+salias ION4 BSC152
+salias IOP3 BSC151
+salias IOL4 BSC150
+salias IOM4 BSC149
+salias IOR3 BSC148
+salias IOT3 BSC147
+salias IOP5 BSC146
+salias IOP4 BSC145
+salias IOT4 BSC144
+salias IOR4 BSC143
+salias IOT5 BSC142
+salias IOR5 BSC141
+salias ION7 BSC140
+salias IOK7 BSC139
+salias IOK6 BSC138
+salias IOT6 BSC137
+salias IOR6 BSC136
+salias IOP6 BSC135
+salias ION6 BSC134
+salias ION8 BSC133
+salias IOT7 BSC132
+salias IOR7 BSC131
+salias IOL7 BSC130
+salias IOL8 BSC129
+salias IOT8 BSC128
+salias IOR8 BSC127
+salias IOT9 BSC126
+salias IOR9 BSC125
+salias ION9 BSC124
+salias ION10 BSC123
+salias IOT11 BSC122
+salias IOR11 BSC121
+salias IOP11 BSC120
+salias IOL9 BSC119
+salias IOL10 BSC118
+salias IOR10 BSC117
+salias IOT10 BSC116
+salias IOK11 BSC115
+salias IOK10 BSC114
+salias ION11 BSC113
+salias IOP12 BSC112
+salias IOP13 BSC111
+salias IOT12 BSC110
+salias IOR12 BSC109
+# BSC108 # unused pad
+salias IOT13 BSC107
+salias IOR13 BSC106
+salias IOT14 BSC105
+salias IOR14 BSC104
+salias IOM11 BSC103
+salias IOL11 BSC102
+salias ION12 BSC101
+salias IOM12 BSC100
+salias IOL12 BSC099
+salias IOK13 BSC098
+salias ION13 BSC097
+salias ION14 BSC096
+salias IOP15 BSC095
+salias IOP16 BSC094
+salias ION15 BSC093
+salias ION16 BSC092
+salias IOP14 BSC091
+# BSC090 # unused pad
+# BSC089 # unused pad
+salias IOM14 BSC088
+salias IOM15 BSC087
+salias IOM16 BSC086
+# BSC085 # unused pad
+salias IOL14 BSC084
+salias IOL15 BSC083
+salias IOL16 BSC082
+# nSTATUS BSC081 # untestable Family-specific pin M13
+# CONF_DONE BSC080 # untestable Family-specific pin L13
+salias MSEL1 BSC079 # Family-specific input pin K12
+salias MSEL0 BSC078 # Family-specific input pin J13
+salias IOK16 BSC077
+salias IOK15 BSC076
+salias CLK7 BSC075 # Family-specific input pin J16
+salias CLK6 BSC074 # Family-specific input pin J15
+salias CLK5 BSC073 # Family-specific input pin H15
+salias CLK4 BSC072 # Family-specific input pin H16
+salias IOH12 BSC071
+salias IOJ12 BSC070
+salias IOG16 BSC069
+salias IOG15 BSC068
+salias IOF15 BSC067
+salias IOF16 BSC066
+salias IOJ11 BSC065
+salias IOH11 BSC064
+salias IOG12 BSC063
+salias IOG13 BSC062
+salias IOE13 BSC061
+salias IOF13 BSC060
+salias IOH13 BSC059
+salias IOD15 BSC058
+salias IOD16 BSC057
+salias IOE15 BSC056
+salias IOE16 BSC055
+salias IOF14 BSC054
+salias IOC15 BSC053
+salias IOC16 BSC052
+salias IOC14 BSC051
+salias IOD13 BSC050
+salias IOE14 BSC049
+salias IOD14 BSC048
+salias IOB14 BSC047
+salias IOA14 BSC046
+salias IOC13 BSC045
+salias IOC12 BSC044
+salias IOB13 BSC043
+salias IOA13 BSC042
+salias IOB12 BSC041
+salias IOA12 BSC040
+salias IOC11 BSC039
+salias IOB11 BSC038
+salias IOA11 BSC037
+salias IOG10 BSC036
+salias IOG11 BSC035
+salias IOB10 BSC034
+salias IOA10 BSC033
+salias IOF10 BSC032
+salias IOF9 BSC031
+salias IOD9 BSC030
+salias IOD11 BSC029
+salias IOD10 BSC028
+salias IOA9 BSC027
+salias IOB9 BSC026
+salias IOA8 BSC025
+salias IOB8 BSC024
+salias IOA7 BSC023
+salias IOB7 BSC022
+salias IOF7 BSC021
+salias IOF8 BSC020
+# BSC019 # unused pad
+# BSC018 # unused pad
+salias IOD8 BSC017
+salias IOB6 BSC016
+salias IOA6 BSC015
+salias IOG6 BSC014
+salias IOG7 BSC013
+salias IOD7 BSC012
+salias IOD6 BSC011
+salias IOC6 BSC010
+salias IOC5 BSC009
+salias IOC4 BSC008
+salias IOB5 BSC007
+salias IOA5 BSC006
+salias IOB4 BSC005
+salias IOA4 BSC004
+salias IOA3 BSC003
+salias IOB3 BSC002
+salias IOE6 BSC001
+salias IOF6 BSC000
--- /dev/null
+#
+# $Id$
+#
+# JTAG package script for EP2C8Q208
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by H Hartley Sweeten <hsweeten@visionengravers.com>
+#
+# Note:
+# The signals defined in this file as unused pad are specified as
+# I/O pins in the main configuration file ep2c8.
+#
+
+salias IO1 BSC198 # Note: this pin is specified as I/O. If AS mode is specified by MSEL it is output only (ASDO)
+salias IO2 BSC197 # Note: this pin is specified as I/O. If AS mode is specified by MSEL it is output only (nCSO)
+salias IO3 BSC196
+salias IO4 BSC195
+salias IO5 BSC194
+salias IO6 BSC193
+salias IO8 BSC192
+salias IO10 BSC191
+salias IO11 BSC190
+salias IO12 BSC189
+salias IO13 BSC188
+# BSC187 # unused pad
+# BSC186 # unused pad
+# BSC185 # unused pad
+# BSC184 # unused pad
+# BSC183 # unused pad
+# BSC182 # unused pad
+# BSC181 # unused pad
+salias IO14 BSC180
+salias IO15 BSC179
+salias DATA0 BSC178 # Family-specific input pin 20
+salias DCLK BSC177 # Family-specific input pin 21
+# nCE BSC176 # untestable Family-specific pin 22
+salias CLK0 BSC175 # Family-specific input pin 23
+salias CLK1 BSC174 # Family-specific input pin 24
+# nCONFIG BSC173 # untestable Family-specific pin 26
+salias CLK2 BSC172 # Family-specific input pin 27
+salias CLK3 BSC171 # Family-specific input pin 28
+salias IO30 BSC170
+salias IO31 BSC169
+# BSC168 # unused pad
+salias IO33 BSC167
+salias IO34 BSC166
+salias IO35 BSC165
+# BSC164 # unused pad
+salias IO37 BSC163
+# BSC162 # unused pad
+# BSC161 # unused pad
+# BSC160 # unused pad
+salias IO39 BSC159
+salias IO40 BSC158
+salias IO41 BSC157
+# BSC156 # unused pad
+# BSC155 # unused pad
+salias IO43 BSC154
+salias IO44 BSC153
+salias IO45 BSC152
+salias IO46 BSC151
+salias IO47 BSC150
+salias IO48 BSC149
+salias IO56 BSC148
+salias IO57 BSC147
+salias IO58 BSC146
+salias IO59 BSC145
+salias IO60 BSC144
+salias IO61 BSC143
+salias IO63 BSC142
+salias IO64 BSC141
+# BSC140 # unused pad
+# BSC139 # unused pad
+# BSC138 # unused pad
+# BSC137 # unused pad
+# BSC136 # unused pad
+# BSC135 # unused pad
+# BSC134 # unused pad
+salias IO67 BSC133
+salias IO68 BSC132
+salias IO69 BSC131
+# BSC130 # unused pad
+# BSC129 # unused pad
+salias IO70 BSC128
+salias IO72 BSC127
+salias IO74 BSC126
+salias IO75 BSC125
+salias IO76 BSC124
+salias IO77 BSC123
+# BSC122 # unused pad
+# BSC121 # unused pad
+salias IO80 BSC120
+salias IO81 BSC119
+salias IO82 BSC118
+salias IO84 BSC117
+salias IO86 BSC116
+salias IO87 BSC115
+salias IO88 BSC114
+salias IO89 BSC113
+salias IO90 BSC112
+salias IO92 BSC111
+salias IO94 BSC110
+salias IO95 BSC109
+salias IO96 BSC108
+salias IO97 BSC107
+salias IO99 BSC106
+salias IO101 BSC105
+salias IO102 BSC104
+salias IO103 BSC103
+salias IO104 BSC102
+salias IO105 BSC101
+salias IO106 BSC100
+# BSC099 # unused pad
+# BSC098 # unused pad
+salias IO107 BSC097
+salias IO108 BSC096
+salias IO110 BSC095
+salias IO112 BSC094
+salias IO113 BSC093
+salias IO114 BSC092
+# BSC091 # unused pad
+salias IO115 BSC090
+salias IO116 BSC089
+salias IO117 BSC088
+# BSC087 # unused pad
+# BSC086 # unused pad
+salias IO118 BSC085
+# BSC084 # unused pad
+# BSC083 # unused pad
+# BSC082 # unused pad
+# nSTATUS BSC081 # untestable Family-specific pin 121
+# CONF_DONE BSC080 # untestable Family-specific pin 123
+salias MSEL1 BSC079 # Family-specific input pin 125
+salias MSEL0 BSC078 # Family-specific input pin 126
+salias IO127 BSC077
+salias IO128 BSC076
+salias CLK7 BSC075 # Family-specific input pin 129
+salias CLK6 BSC074 # Family-specific input pin 130
+salias CLK5 BSC073 # Family-specific input pin 131
+salias CLK4 BSC072 # Family-specific input pin 132
+salias IO133 BSC071
+salias IO134 BSC070
+salias IO135 BSC069
+salias IO137 BSC068
+salias IO138 BSC067
+salias IO139 BSC066
+salias IO141 BSC065
+salias IO142 BSC064
+# BSC063 # unused pad
+# BSC062 # unused pad
+salias IO143 BSC061
+salias IO144 BSC060
+salias IO145 BSC059
+# BSC058 # unused pad
+# BSC057 # unused pad
+# BSC056 # unused pad
+# BSC055 # unused pad
+# BSC054 # unused pad
+salias IO146 BSC053
+salias IO147 BSC052
+salias IO149 BSC051
+salias IO150 BSC050
+salias IO151 BSC049
+salias IO152 BSC048
+salias IO160 BSC047
+salias IO161 BSC046
+salias IO162 BSC045
+salias IO163 BSC044
+salias IO164 BSC043
+salias IO165 BSC042
+salias IO168 BSC041
+salias IO169 BSC040
+salias IO170 BSC039
+salias IO171 BSC038
+salias IO173 BSC037
+# BSC036 # unused pad
+# BSC035 # unused pad
+salias IO175 BSC034
+salias IO176 BSC033
+# BSC032 # unused pad
+# BSC031 # unused pad
+# BSC030 # unused pad
+salias IO179 BSC029
+salias IO180 BSC028
+salias IO181 BSC027
+salias IO182 BSC026
+# BSC025 # unused pad
+# BSC024 # unused pad
+# BSC023 # unused pad
+salias IO185 BSC022
+salias IO187 BSC021
+salias IO188 BSC020
+salias IO189 BSC019
+salias IO191 BSC018
+salias IO192 BSC017
+salias IO193 BSC016
+salias IO195 BSC015
+# BSC014 # unused pad
+# BSC013 # unused pad
+# BSC012 # unused pad
+salias IO197 BSC011
+salias IO198 BSC010
+# BSC009 # unused pad
+# BSC008 # unused pad
+salias IO199 BSC007
+salias IO200 BSC006
+salias IO201 BSC005
+salias IO203 BSC004
+salias IO205 BSC003
+salias IO206 BSC002
+salias IO207 BSC001
+salias IO208 BSC000
--- /dev/null
+#
+# $Id$
+#
+# JTAG package script for EP2C8T144
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by H Hartley Sweeten <hsweeten@visionengravers.com>
+#
+# Note:
+# The signals defined in this file as unused pad are specified as
+# I/O pins in the main configuration file ep2c8.
+#
+
+salias IO1 BSC198 # Note: this pin is specified as I/O. If AS mode is specified by MSEL it is output only (ASDO)
+salias IO2 BSC197 # Note: this pin is specified as I/O. If AS mode is specified by MSEL it is output only (nCSO)
+salias IO3 BSC196
+salias IO4 BSC195
+# BSC194 # unused pad
+# BSC193 # unused pad
+# BSC192 # unused pad
+# BSC191 # unused pad
+# BSC190 # unused pad
+# BSC189 # unused pad
+salias IO7 BSC188
+# BSC187 # unused pad
+# BSC186 # unused pad
+# BSC185 # unused pad
+# BSC184 # unused pad
+# BSC183 # unused pad
+# BSC182 # unused pad
+# BSC181 # unused pad
+salias IO8 BSC180
+salias IO9 BSC179
+salias DATA0 BSC178 # Family-specific input pin 14
+salias DCLK BSC177 # Family-specific input pin 15
+# nCE BSC176 # untestable Family-specific pin 16
+salias CLK0 BSC175 # Family-specific input pin 17
+salias CLK1 BSC174 # Family-specific input pin 18
+# nCONFIG BSC173 # untestable Family-specific pin 20
+salias CLK2 BSC172 # Family-specific input pin 21
+salias CLK3 BSC171 # Family-specific input pin 22
+salias IO24 BSC170
+salias IO25 BSC169
+# BSC168 # unused pad
+# BSC167 # unused pad
+# BSC166 # unused pad
+# BSC165 # unused pad
+# BSC164 # unused pad
+salias IO28 BSC163
+# BSC162 # unused pad
+# BSC161 # unused pad
+# BSC160 # unused pad
+# BSC159 # unused pad
+# BSC158 # unused pad
+# BSC157 # unused pad
+# BSC156 # unused pad
+# BSC155 # unused pad
+# BSC154 # unused pad
+# BSC153 # unused pad
+# BSC152 # unused pad
+salias IO30 BSC151
+salias IO31 BSC150
+salias IO32 BSC149
+salias IO40 BSC148
+salias IO41 BSC147
+salias IO42 BSC146
+salias IO43 BSC145
+salias IO44 BSC144
+salias IO45 BSC143
+salias IO47 BSC142
+salias IO48 BSC141
+# BSC140 # unused pad
+# BSC139 # unused pad
+# BSC138 # unused pad
+# BSC137 # unused pad
+# BSC136 # unused pad
+# BSC135 # unused pad
+# BSC134 # unused pad
+salias IO51 BSC133
+salias IO52 BSC132
+# BSC131 # unused pad
+# BSC130 # unused pad
+# BSC129 # unused pad
+salias IO53 BSC128
+salias IO55 BSC127
+salias IO57 BSC126
+salias IO58 BSC125
+salias IO59 BSC124
+salias IO60 BSC123
+# BSC122 # unused pad
+# BSC121 # unused pad
+# BSC120 # unused pad
+# BSC119 # unused pad
+# BSC118 # unused pad
+# BSC117 # unused pad
+# BSC116 # unused pad
+# BSC115 # unused pad
+# BSC114 # unused pad
+salias IO63 BSC113
+# BSC112 # unused pad
+# BSC111 # unused pad
+salias IO64 BSC110
+salias IO65 BSC109
+# BSC108 # unused pad
+# BSC107 # unused pad
+salias IO67 BSC106
+salias IO69 BSC105
+salias IO70 BSC104
+salias IO71 BSC103
+salias IO72 BSC102
+salias IO73 BSC101
+salias IO74 BSC100
+# BSC099 # unused pad
+# BSC098 # unused pad
+salias IO75 BSC097
+salias IO76 BSC096
+# BSC095 # unused pad
+# BSC094 # unused pad
+# BSC093 # unused pad
+# BSC092 # unused pad
+# BSC091 # unused pad
+# BSC090 # unused pad
+# BSC089 # unused pad
+salias IO79 BSC088
+# BSC087 # unused pad
+# BSC086 # unused pad
+# BSC085 # unused pad
+# BSC084 # unused pad
+# BSC083 # unused pad
+# BSC082 # unused pad
+# nSTATUS BSC081 # untestable Family-specific pin 82
+# CONF_DONE BSC080 # untestable Family-specific pin 83
+salias MSEL1 BSC079 # Family-specific input pin 84
+salias MSEL0 BSC078 # Family-specific input pin 85
+salias IO86 BSC077
+salias IO87 BSC076
+salias CLK7 BSC075 # Family-specific input pin 88
+salias CLK6 BSC074 # Family-specific input pin 89
+salias CLK5 BSC073 # Family-specific input pin 90
+salias CLK4 BSC072 # Family-specific input pin 91
+salias IO92 BSC071
+salias IO93 BSC070
+salias IO94 BSC069
+salias IO96 BSC068
+salias IO97 BSC067
+# BSC066 # unused pad
+# BSC065 # unused pad
+# BSC064 # unused pad
+# BSC063 # unused pad
+# BSC062 # unused pad
+# BSC061 # unused pad
+# BSC060 # unused pad
+salias IO99 BSC059
+# BSC058 # unused pad
+# BSC057 # unused pad
+# BSC056 # unused pad
+# BSC055 # unused pad
+# BSC054 # unused pad
+salias IO100 BSC053
+salias IO101 BSC052
+# BSC051 # unused pad
+# BSC050 # unused pad
+salias IO103 BSC049
+salias IO104 BSC048
+salias IO112 BSC047
+salias IO113 BSC046
+salias IO114 BSC045
+salias IO115 BSC044
+# BSC043 # unused pad
+# BSC042 # unused pad
+salias IO118 BSC041
+salias IO119 BSC040
+salias IO120 BSC039
+salias IO121 BSC038
+salias IO122 BSC037
+# BSC036 # unused pad
+# BSC035 # unused pad
+# BSC034 # unused pad
+# BSC033 # unused pad
+# BSC032 # unused pad
+# BSC031 # unused pad
+# BSC030 # unused pad
+salias IO125 BSC029
+salias IO126 BSC028
+# BSC027 # unused pad
+# BSC026 # unused pad
+# BSC025 # unused pad
+# BSC024 # unused pad
+# BSC023 # unused pad
+salias IO129 BSC022
+# BSC021 # unused pad
+# BSC020 # unused pad
+# BSC019 # unused pad
+# BSC018 # unused pad
+salias IO132 BSC017
+salias IO133 BSC016
+salias IO134 BSC015
+# BSC014 # unused pad
+# BSC013 # unused pad
+# BSC012 # unused pad
+# BSC011 # unused pad
+# BSC010 # unused pad
+# BSC009 # unused pad
+# BSC008 # unused pad
+salias IO135 BSC007
+salias IO136 BSC006
+salias IO137 BSC005
+salias IO139 BSC004
+salias IO141 BSC003
+salias IO142 BSC002
+salias IO143 BSC001
+salias IO144 BSC000
--- /dev/null
+#
+# $Id$
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Arnim Laeuger <arniml@users.sourceforge.net>
+#
+
+# bits 31-28 of the Device Identification Register
+0001 epm3064a 1
--- /dev/null
+#
+# $Id$
+#
+# JTAG declarations for EPM3064A
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Arnim Laeuger <arniml@users.sourceforge.net>
+#
+# Note:
+# The signals defined in this file are generic for any EPM3064A.
+# Signalnames according to Altera's package tables are set in the
+# package specific scripts.
+#
+
+register BYPASS 1
+register BSR 192
+register DEVICE_ID 32
+register USERCODE 32
+
+instruction length 10
+instruction BYPASS 1111111111 BYPASS
+instruction IDCODE 0001011001 DEVICE_ID
+instruction USERCODE 0000000111 USERCODE
+instruction SAMPLE/PRELOAD 0001010101 BSR
+instruction EXTEST 0000000000 BSR
+
+signal BSC0
+signal BSC1
+signal BSC10
+signal BSC11
+signal BSC12
+signal BSC13
+signal BSC14
+signal BSC15
+signal BSC16
+signal BSC17
+signal BSC18
+signal BSC19
+signal BSC2
+signal BSC20
+signal BSC21
+signal BSC22
+signal BSC23
+signal BSC24
+signal BSC25
+signal BSC26
+signal BSC27
+signal BSC28
+signal BSC29
+signal BSC3
+signal BSC30
+signal BSC31
+signal BSC32
+signal BSC33
+signal BSC34
+signal BSC35
+signal BSC36
+signal BSC37
+signal BSC38
+signal BSC39
+signal BSC4
+signal BSC40
+signal BSC41
+signal BSC42
+signal BSC43
+signal BSC44
+signal BSC45
+signal BSC46
+signal BSC47
+signal BSC48
+signal BSC49
+signal BSC5
+signal BSC50
+signal BSC51
+signal BSC52
+signal BSC53
+signal BSC54
+signal BSC55
+signal BSC56
+signal BSC57
+signal BSC58
+signal BSC59
+signal BSC6
+signal BSC60
+signal BSC61
+signal BSC62
+signal BSC63
+signal BSC7
+signal BSC8
+signal BSC9
+
+bit 0 I ? BSC0
+bit 1 X ? *
+bit 2 X ? *
+bit 3 I ? BSC1
+bit 4 X ? *
+bit 5 X ? *
+bit 6 I ? BSC2
+bit 7 C 0 *
+bit 8 O ? BSC2 7 0 Z
+bit 9 I ? BSC3
+bit 10 C 0 *
+bit 11 O ? BSC3 10 0 Z
+bit 12 I ? BSC4
+bit 13 C 0 *
+bit 14 O ? BSC4 13 0 Z
+bit 15 I ? BSC5
+bit 16 C 0 *
+bit 17 O ? BSC5 16 0 Z
+bit 18 I ? BSC6
+bit 19 C 0 *
+bit 20 O ? BSC6 19 0 Z
+bit 21 I ? BSC7
+bit 22 C 0 *
+bit 23 O ? BSC7 22 0 Z
+bit 24 I ? BSC8
+bit 25 C 0 *
+bit 26 O ? BSC8 25 0 Z
+bit 27 I ? BSC9
+bit 28 C 0 *
+bit 29 O ? BSC9 28 0 Z
+bit 30 I ? BSC10
+bit 31 C 0 *
+bit 32 O ? BSC10 31 0 Z
+bit 33 I ? BSC11
+bit 34 C 0 *
+bit 35 O ? BSC11 34 0 Z
+bit 36 I ? BSC12
+bit 37 C 0 *
+bit 38 O ? BSC12 37 0 Z
+bit 39 I ? BSC13
+bit 40 C 0 *
+bit 41 O ? BSC13 40 0 Z
+bit 42 I ? BSC14
+bit 43 C 0 *
+bit 44 O ? BSC14 43 0 Z
+bit 45 I ? BSC15
+bit 46 C 0 *
+bit 47 O ? BSC15 46 0 Z
+bit 48 I ? BSC16
+bit 49 C 0 *
+bit 50 O ? BSC16 49 0 Z
+bit 51 I ? BSC17
+bit 52 C 0 *
+bit 53 O ? BSC17 52 0 Z
+bit 54 I ? BSC18
+bit 55 C 0 *
+bit 56 O ? BSC18 55 0 Z
+bit 57 I ? BSC19
+bit 58 C 0 *
+bit 59 O ? BSC19 58 0 Z
+bit 60 I ? BSC20
+bit 61 C 0 *
+bit 62 O ? BSC20 61 0 Z
+bit 63 I ? BSC21
+bit 64 C 0 *
+bit 65 O ? BSC21 64 0 Z
+bit 66 I ? BSC22
+bit 67 C 0 *
+bit 68 O ? BSC22 67 0 Z
+bit 69 I ? BSC23
+bit 70 C 0 *
+bit 71 O ? BSC23 70 0 Z
+bit 72 I ? BSC24
+bit 73 C 0 *
+bit 74 O ? BSC24 73 0 Z
+bit 75 I ? BSC25
+bit 76 C 0 *
+bit 77 O ? BSC25 76 0 Z
+bit 78 I ? BSC26
+bit 79 C 0 *
+bit 80 O ? BSC26 79 0 Z
+bit 81 I ? BSC27
+bit 82 C 0 *
+bit 83 O ? BSC27 82 0 Z
+bit 84 I ? BSC28
+bit 85 C 0 *
+bit 86 O ? BSC28 85 0 Z
+bit 87 I ? BSC29
+bit 88 C 0 *
+bit 89 O ? BSC29 88 0 Z
+bit 90 I ? BSC30
+bit 91 C 0 *
+bit 92 O ? BSC30 91 0 Z
+bit 93 I ? BSC31
+bit 94 C 0 *
+bit 95 O ? BSC31 94 0 Z
+bit 96 I ? BSC32
+bit 97 C 0 *
+bit 98 O ? BSC32 97 0 Z
+bit 99 I ? BSC33
+bit 100 C 0 *
+bit 101 O ? BSC33 100 0 Z
+bit 102 I ? BSC34
+bit 103 C 0 *
+bit 104 O ? BSC34 103 0 Z
+bit 105 I ? BSC35
+bit 106 C 0 *
+bit 107 O ? BSC35 106 0 Z
+bit 108 I ? BSC36
+bit 109 C 0 *
+bit 110 O ? BSC36 109 0 Z
+bit 111 I ? BSC37
+bit 112 C 0 *
+bit 113 O ? BSC37 112 0 Z
+bit 114 I ? BSC38
+bit 115 C 0 *
+bit 116 O ? BSC38 115 0 Z
+bit 117 I ? BSC39
+bit 118 C 0 *
+bit 119 O ? BSC39 118 0 Z
+bit 120 I ? BSC40
+bit 121 C 0 *
+bit 122 O ? BSC40 121 0 Z
+bit 123 I ? BSC41
+bit 124 C 0 *
+bit 125 O ? BSC41 124 0 Z
+bit 126 I ? BSC42
+bit 127 C 0 *
+bit 128 O ? BSC42 127 0 Z
+bit 129 I ? BSC43
+bit 130 C 0 *
+bit 131 O ? BSC43 130 0 Z
+bit 132 I ? BSC44
+bit 133 C 0 *
+bit 134 O ? BSC44 133 0 Z
+bit 135 I ? BSC45
+bit 136 C 0 *
+bit 137 O ? BSC45 136 0 Z
+bit 138 I ? BSC46
+bit 139 C 0 *
+bit 140 O ? BSC46 139 0 Z
+bit 141 I ? BSC47
+bit 142 C 0 *
+bit 143 O ? BSC47 142 0 Z
+bit 144 I ? BSC48
+bit 145 C 0 *
+bit 146 O ? BSC48 145 0 Z
+bit 147 I ? BSC49
+bit 148 C 0 *
+bit 149 O ? BSC49 148 0 Z
+bit 150 I ? BSC50
+bit 151 C 0 *
+bit 152 O ? BSC50 151 0 Z
+bit 153 I ? BSC51
+bit 154 C 0 *
+bit 155 O ? BSC51 154 0 Z
+bit 156 I ? BSC52
+bit 157 C 0 *
+bit 158 O ? BCS52 157 0 Z
+bit 159 I ? BSC53
+bit 160 C 0 *
+bit 161 O ? BSC53 160 0 Z
+bit 162 I ? BSC54
+bit 163 C 0 *
+bit 164 O ? BSC54 163 0 Z
+bit 165 I ? BSC55
+bit 166 C 0 *
+bit 167 O ? BSC55 166 0 Z
+bit 168 I ? BSC56
+bit 169 C 0 *
+bit 170 O ? BSC56 169 0 Z
+bit 171 I ? BSC57
+bit 172 C 0 *
+bit 173 O ? BSC57 172 0 Z
+bit 174 I ? BSC58
+bit 175 C 0 *
+bit 176 O ? BSC58 175 0 Z
+bit 177 I ? BSC59
+bit 178 C 0 *
+bit 179 O ? BSC59 178 0 Z
+bit 180 I ? BSC60
+bit 181 C 0 *
+bit 182 O ? BSC60 181 0 Z
+bit 183 I ? BSC61
+bit 184 C 0 *
+bit 185 O ? BSC61 184 0 Z
+bit 186 I ? BSC62
+bit 187 X ? *
+bit 188 X ? *
+bit 189 I ? BSC63
+bit 190 X ? *
+bit 191 X ? *
--- /dev/null
+#
+# $Id$
+#
+# JTAG package script for EPM3064AL44
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Arnim Laeuger <arniml@users.sourceforge.net>
+#
+
+salias IN44 BSC0
+salias IN43 BSC1
+salias IO41 BSC2
+salias IO40 BSC4
+salias IO39 BSC9
+salias IO37 BSC12
+salias IO34 BSC14
+salias IO33 BSC16
+salias IO31 BSC18
+salias IO29 BSC23
+salias IO28 BSC24
+salias IO27 BSC27
+salias IO26 BSC28
+salias IO25 BSC29
+salias IO24 BSC31
+salias IO21 BSC32
+salias IO20 BSC34
+salias IO19 BSC35
+salias IO18 BSC36
+salias IO16 BSC40
+salias IO14 BSC45
+salias IO12 BSC47
+salias IO11 BSC49
+salias IO9 BSC50
+salias IO8 BSC51
+salias IO6 BSC56
+salias IO5 BSC59
+salias IO4 BSC61
+salias IN2 BSC62
+salias IN1 BSC63
--- /dev/null
+#
+# $Id$
+#
+# JTAG package script for EPM3064AT100
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Arnim Laeuger <arniml@users.sourceforge.net>
+#
+
+salias IN88 BSC0
+salias IN87 BSC1
+salias IO85 BSC2
+salias IO84 BSC3
+salias IO83 BSC4
+salias IO81 BSC5
+salias IO80 BSC6
+salias IO79 BSC7
+salias IO76 BSC8
+salias IO75 BSC9
+salias IO71 BSC10
+salias IO69 BSC11
+salias IO68 BSC12
+salias IO67 BSC13
+salias IO64 BSC15
+salias IO63 BSC16
+salias IO61 BSC17
+salias IO60 BSC18
+salias IO58 BSC19
+salias IO57 BSC20
+salias IO56 BSC21
+salias IO54 BSC22
+salias IO52 BSC23
+salias IO48 BSC24
+salias IO47 BSC25
+salias IO46 BSC26
+salias IO45 BSC27
+salias IO44 BSC28
+salias IO42 BSC29
+salias IO41 BSC30
+salias IO40 BSC31
+salias IO37 BSC32
+salias IO36 BSC33
+salias IO35 BSC34
+salias IO32 BSC36
+salias IO31 BSC37
+salias IO30 BSC38
+salias IO29 BSC39
+salias IO25 BSC40
+salias IO23 BSC41
+salias IO21 BSC42
+salias IO20 BSC43
+salias IO19 BSC44
+salias IO17 BSC45
+salias IO16 BSC46
+salias IO14 BSC47
+salias IO13 BSC48
+salias IO12 BSC49
+salias IO10 BSC50
+salias IO9 BSC51
+salias IO8 BSC52
+salias IO6 BSC53
+salias IO100 BSC54
+salias IO99 BSC55
+salias IO98 BSC56
+salias IO97 BSC57
+salias IO96 BSC58
+salias IO94 BSC59
+salias IO93 BSC60
+salias IO92 BSC61
+salias IN90 BSC62
+salias IN89 BSC63
--- /dev/null
+#
+# $Id$
+#
+# JTAG package script for EPM3064AT44
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Arnim Laeuger <arniml@users.sourceforge.net>
+#
+
+salias IN38 BSC0
+salias IN37 BSC1
+salias IO35 BSC2
+salias IO34 BSC4
+salias IO33 BSC9
+salias IO31 BSC12
+salias IO28 BSC14
+salias IO27 BSC16
+salias IO25 BSC18
+salias IO23 BSC23
+salias IO22 BSC24
+salias IO21 BSC27
+salias IO20 BSC28
+salias IO19 BSC29
+salias IO18 BSC31
+salias IO15 BSC32
+salias IO14 BSC34
+salias IO13 BSC35
+salias IO12 BSC36
+salias IO10 BSC40
+salias IO8 BSC45
+salias IO6 BSC47
+salias IO5 BSC49
+salias IO3 BSC50
+salias IO2 BSC51
+salias IO44 BSC56
+salias IO43 BSC59
+salias IO42 BSC61
+salias IN40 BSC62
+salias IN39 BSC63
--- /dev/null
+#
+# $Id$
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Rojhalat Ibrahim <ibrahim@schenk.isar.de>
+#
+
+# bits 31-28 of the Device Identification Register
+0001 epm7128aetc100 1
--- /dev/null
+#
+# $Id$
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Rojhalat Ibrahim <ibrahim@schenk.isar.de>
+#
+
+signal tdi
+signal tck
+signal tms
+signal tdo
+signal IO1
+signal IO2
+signal IO5
+signal IO6
+signal IO7
+signal IO8
+signal IO9
+signal IO10
+signal IO12
+signal IO13
+signal IO14
+signal IO16
+signal IO17
+signal IO19
+signal IO20
+signal IO21
+signal IO22
+signal IO23
+signal IO24
+signal IO25
+signal IO27
+signal IO28
+signal IO29
+signal IO30
+signal IO31
+signal IO32
+signal IO33
+signal IO35
+signal IO36
+signal IO37
+signal IO40
+signal IO41
+signal IO42
+signal IO44
+signal IO45
+signal IO46
+signal IO47
+signal IO48
+signal IO49
+signal IO50
+signal IO52
+signal IO53
+signal IO54
+signal IO55
+signal IO56
+signal IO57
+signal IO58
+signal IO60
+signal IO61
+signal IO63
+signal IO64
+signal IO65
+signal IO67
+signal IO68
+signal IO69
+signal IO70
+signal IO71
+signal IO72
+signal IO75
+signal IO76
+signal IO77
+signal IO78
+signal IO79
+signal IO80
+signal IO81
+signal IO83
+signal IO84
+signal IO85
+signal IN87
+signal IN88
+signal IN89
+signal IN90
+signal IO92
+signal IO93
+signal IO94
+signal IO96
+signal IO97
+signal IO98
+signal IO99
+signal IO100
+
+
+# mandatory data registers
+register BSR 288
+register BR 1
+
+# optional data registers
+register DIR 32
+
+# instructions
+instruction length 10
+
+# mandatory instructions
+instruction EXTEST 0000000000 BSR
+instruction SAMPLE/PRELOAD 0001010101 BSR
+instruction BYPASS 1111111111 BR
+instruction IDCODE 0001011001 DIR
+instruction USERCODE 0000000111 DIR
+
+
+bit 287 O 1 *
+bit 286 O 1 *
+bit 285 I 1 IN89
+bit 284 O 1 *
+bit 283 O 1 *
+bit 282 I 1 IN90
+bit 281 O 1 IO92 280 0 Z
+bit 280 C 0 *
+bit 279 I 1 IO92
+bit 278 O 1 IO93 277 0 Z
+bit 277 C 0 *
+bit 276 I 1 IO93
+bit 275 O 1 IO94 274 0 Z
+bit 274 C 0 *
+bit 273 I 1 IO94
+bit 272 O 1 *
+bit 271 O 0 *
+bit 270 O 1 *
+bit 269 O 1 IO96 268 0 Z
+bit 268 C 0 *
+bit 267 I 1 IO96
+bit 266 O 1 IO97 265 0 Z
+bit 265 C 0 *
+bit 264 I 1 IO97
+bit 263 O 1 IO98 262 0 Z
+bit 262 C 0 *
+bit 261 I 1 IO98
+bit 260 O 1 IO99 259 0 Z
+bit 259 C 0 *
+bit 258 I 1 IO99
+bit 257 O 1 IO100 256 0 Z
+bit 256 C 0 *
+bit 255 I 1 IO100
+bit 254 O 1 *
+bit 253 O 0 *
+bit 252 O 1 *
+bit 251 O 1 IO1 250 0 Z
+bit 250 C 0 *
+bit 249 I 1 IO1
+bit 248 O 1 IO2 247 0 Z
+bit 247 C 0 *
+bit 246 I 1 IO2
+bit 245 O 1 IO5 244 0 Z
+bit 244 C 0 *
+bit 243 I 1 IO5
+bit 242 O 1 IO6 241 0 Z
+bit 241 C 0 *
+bit 240 I 1 IO6
+bit 239 O 1 *
+bit 238 O 0 *
+bit 237 O 1 *
+bit 236 O 1 IO7 235 0 Z
+bit 235 C 0 *
+bit 234 I 1 IO7
+bit 233 O 1 IO8 232 0 Z
+bit 232 C 0 *
+bit 231 I 1 IO8
+bit 230 O 1 IO9 229 0 Z
+bit 229 C 0 *
+bit 228 I 1 IO9
+bit 227 O 1 IO10 226 0 Z
+bit 226 C 0 *
+bit 225 I 1 IO10
+bit 224 O 1 IO12 223 0 Z
+bit 223 C 0 *
+bit 222 I 1 IO12
+bit 221 O 1 *
+bit 220 O 0 *
+bit 219 O 1 *
+bit 218 O 1 IO13 217 0 Z
+bit 217 C 0 *
+bit 216 I 1 IO13
+bit 215 O 1 IO14 214 0 Z
+bit 214 C 0 *
+bit 213 I 1 IO14
+bit 212 O 1 IO16 211 0 Z
+bit 211 C 0 *
+bit 210 I 1 IO16
+bit 209 O 1 IO17 208 0 Z
+bit 208 C 0 *
+bit 207 I 1 IO17
+bit 206 O 1 *
+bit 205 O 0 *
+bit 204 O 1 *
+bit 203 O 1 IO19 202 0 Z
+bit 202 C 0 *
+bit 201 I 1 IO19
+bit 200 O 1 IO20 199 0 Z
+bit 199 C 0 *
+bit 198 I 1 IO20
+bit 197 O 1 IO21 196 0 Z
+bit 196 C 0 *
+bit 195 I 1 IO21
+bit 194 O 1 IO22 193 0 Z
+bit 193 C 0 *
+bit 192 I 1 IO22
+bit 191 O 1 IO23 190 0 Z
+bit 190 C 0 *
+bit 189 I 1 IO23
+bit 188 O 1 *
+bit 187 O 0 *
+bit 186 O 1 *
+bit 185 O 1 IO24 184 0 Z
+bit 184 C 0 *
+bit 183 I 1 IO24
+bit 182 O 1 IO25 181 0 Z
+bit 181 C 0 *
+bit 180 I 1 IO25
+bit 179 O 1 IO27 178 0 Z
+bit 178 C 0 *
+bit 177 I 1 IO27
+bit 176 O 1 IO28 175 0 Z
+bit 175 C 0 *
+bit 174 I 1 IO28
+bit 173 O 1 IO29 172 0 Z
+bit 172 C 0 *
+bit 171 I 1 IO29
+bit 170 O 1 *
+bit 169 O 0 *
+bit 168 O 1 *
+bit 167 O 1 IO30 166 0 Z
+bit 166 C 0 *
+bit 165 I 1 IO30
+bit 164 O 1 IO31 163 0 Z
+bit 163 C 0 *
+bit 162 I 1 IO31
+bit 161 O 1 IO32 160 0 Z
+bit 160 C 0 *
+bit 159 I 1 IO32
+bit 158 O 1 IO33 157 0 Z
+bit 157 C 0 *
+bit 156 I 1 IO33
+bit 155 O 1 IO35 154 0 Z
+bit 154 C 0 *
+bit 153 I 1 IO35
+bit 152 O 1 *
+bit 151 O 0 *
+bit 150 O 1 *
+bit 149 O 1 IO36 148 0 Z
+bit 148 C 0 *
+bit 147 I 1 IO36
+bit 146 O 1 IO37 145 0 Z
+bit 145 C 0 *
+bit 144 I 1 IO37
+bit 143 O 1 IO40 142 0 Z
+bit 142 C 0 *
+bit 141 I 1 IO40
+bit 140 O 1 IO41 139 0 Z
+bit 139 C 0 *
+bit 138 I 1 IO41
+bit 137 O 1 *
+bit 136 O 0 *
+bit 135 O 1 *
+bit 134 O 1 IO42 133 0 Z
+bit 133 C 0 *
+bit 132 I 1 IO42
+bit 131 O 1 IO44 130 0 Z
+bit 130 C 0 *
+bit 129 I 1 IO44
+bit 128 O 1 IO45 127 0 Z
+bit 127 C 0 *
+bit 126 I 1 IO45
+bit 125 O 1 IO46 124 0 Z
+bit 124 C 0 *
+bit 123 I 1 IO46
+bit 122 O 1 IO47 121 0 Z
+bit 121 C 0 *
+bit 120 I 1 IO47
+bit 119 O 1 *
+bit 118 O 0 *
+bit 117 O 1 *
+bit 116 O 1 IO48 115 0 Z
+bit 115 C 0 *
+bit 114 I 1 IO48
+bit 113 O 1 IO49 112 0 Z
+bit 112 C 0 *
+bit 111 I 1 IO49
+bit 110 O 1 IO50 109 0 Z
+bit 109 C 0 *
+bit 108 I 1 IO50
+bit 107 O 1 IO52 106 0 Z
+bit 106 C 0 *
+bit 105 I 1 IO52
+bit 104 O 1 IO53 103 0 Z
+bit 103 C 0 *
+bit 102 I 1 IO53
+bit 101 O 1 *
+bit 100 O 0 *
+bit 99 O 1 *
+bit 98 O 1 IO54 97 0 Z
+bit 97 C 0 *
+bit 96 I 1 IO54
+bit 95 O 1 IO55 94 0 Z
+bit 94 C 0 *
+bit 93 I 1 IO55
+bit 92 O 1 IO56 91 0 Z
+bit 91 C 0 *
+bit 90 I 1 IO56
+bit 89 O 1 IO57 88 0 Z
+bit 88 C 0 *
+bit 87 I 1 IO57
+bit 86 O 1 IO58 85 0 Z
+bit 85 C 0 *
+bit 84 I 1 IO58
+bit 83 O 1 *
+bit 82 O 0 *
+bit 81 O 1 *
+bit 80 O 1 IO60 79 0 Z
+bit 79 C 0 *
+bit 78 I 1 IO60
+bit 77 O 1 IO61 76 0 Z
+bit 76 C 0 *
+bit 75 I 1 IO61
+bit 74 O 1 IO63 73 0 Z
+bit 73 C 0 *
+bit 72 I 1 IO63
+bit 71 O 1 IO64 70 0 Z
+bit 70 C 0 *
+bit 69 I 1 IO64
+bit 68 O 1 *
+bit 67 O 0 *
+bit 66 O 1 *
+bit 65 O 1 IO65 64 0 Z
+bit 64 C 0 *
+bit 63 I 1 IO65
+bit 62 O 1 IO67 61 0 Z
+bit 61 C 0 *
+bit 60 I 1 IO67
+bit 59 O 1 IO68 58 0 Z
+bit 58 C 0 *
+bit 57 I 1 IO68
+bit 56 O 1 IO69 55 0 Z
+bit 55 C 0 *
+bit 54 I 1 IO69
+bit 53 O 1 IO70 52 0 Z
+bit 52 C 0 *
+bit 51 I 1 IO70
+bit 50 O 1 *
+bit 49 O 0 *
+bit 48 O 1 *
+bit 47 O 1 IO71 46 0 Z
+bit 46 C 0 *
+bit 45 I 1 IO71
+bit 44 O 1 IO72 43 0 Z
+bit 43 C 0 *
+bit 42 I 1 IO72
+bit 41 O 1 IO75 40 0 Z
+bit 40 C 0 *
+bit 39 I 1 IO75
+bit 38 O 1 IO76 37 0 Z
+bit 37 C 0 *
+bit 36 I 1 IO76
+bit 35 O 1 *
+bit 34 O 0 *
+bit 33 O 1 *
+bit 32 O 1 IO77 31 0 Z
+bit 31 C 0 *
+bit 30 I 1 IO77
+bit 29 O 1 IO78 28 0 Z
+bit 28 C 0 *
+bit 27 I 1 IO78
+bit 26 O 1 IO79 25 0 Z
+bit 25 C 0 *
+bit 24 I 1 IO79
+bit 23 O 1 IO80 22 0 Z
+bit 22 C 0 *
+bit 21 I 1 IO80
+bit 20 O 1 IO81 19 0 Z
+bit 19 C 0 *
+bit 18 I 1 IO81
+bit 17 O 1 *
+bit 16 O 0 *
+bit 15 O 1 *
+bit 14 O 1 IO83 13 0 Z
+bit 13 C 0 *
+bit 12 I 1 IO83
+bit 11 O 1 IO84 10 0 Z
+bit 10 C 0 *
+bit 9 I 1 IO84
+bit 8 O 1 IO85 7 0 Z
+bit 7 C 0 *
+bit 6 I 1 IO85
+bit 5 O 1 *
+bit 4 O 1 *
+bit 3 I 1 IN87
+bit 2 O 1 *
+bit 1 O 1 *
+bit 0 I 1 IN88
+
--- /dev/null
+#
+# $Id: PARTS,v 1.1.1.1 2005/03/18 15:02:50 klingler Exp $
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Richard Klingler <richard@klingler.net>
+#
+
+# bits 27-12 of the Device Identification Register
+0010011110100111 sharc21065l SHARC
+0010011111101000 bf518 BF518
+0010011111100100 bf527 BF526
+0010011111100000 bf527 BF527
+0010011110100101 bf533 BF533
+0010011111000110 bf537 BF534
+0010011111001000 bf537 BF537
+0010011111000100 bf538 BF538
+0010011111011110 bf548 BF548
+0010011111101010 bf548 BF548M
+0010011110111011 bf561 BF561
--- /dev/null
+#
+# $Id: STEPPINGS 75 2005-11-11 09:12:34Z jiez $
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+#
+
+# bits 31-28 of the Device Identification Register
+0000 bf518 0
--- /dev/null
+signal NMI
+signal CLKIN
+signal TEST
+signal TRST
+signal TMS
+signal CLKBUF
+signal PG_n
+signal BMODE0
+signal RTXI
+signal BMODE1
+signal TCK
+signal BMODE2
+signal TDI
+signal RESET
+signal PH0
+signal PH1
+signal PH2
+signal PH7
+signal PH3
+signal PH4
+signal PH5
+signal PF10
+signal PF11
+signal PF12
+signal PF13
+signal PF14
+signal PF15
+signal PG0
+signal PG1
+signal PG2
+signal PG3
+signal PG4
+signal PH6
+signal PG5
+signal PG6
+signal DATA11
+signal PG7
+signal PG8
+signal PG9
+signal DATA10
+signal SCL
+signal DATA15
+signal DATA12
+signal DATA13
+signal SDA
+signal DATA14
+signal PG10
+signal PG11
+signal DATA0
+signal PG12
+signal DATA1
+signal PG13
+signal DATA2
+signal PG14
+signal PF0
+signal DATA3
+signal PG15
+signal PF1
+signal DATA4
+signal PF2
+signal DATA5
+signal PF3
+signal DATA6
+signal PF4
+signal DATA7
+signal PF5
+signal DATA8
+signal PF6
+signal DATA9
+signal PF7
+signal PF8
+signal PF9
+signal XTAL
+signal ADDR5
+signal CLKOUT
+signal ADDR6
+signal TDO
+signal ADDR7
+signal SA10
+signal SMS_n
+signal AWE_n
+signal ADDR8
+signal ADDR9
+signal ARE_n
+signal SCAS_n
+signal ABE_n0
+signal ABE_n1
+signal SRAS_n
+signal SCKE
+signal ADDR10
+signal ADDR11
+signal ADDR12
+signal ADDR13
+signal ADDR14
+signal SWE_n
+signal ADDR15
+signal ADDR16
+signal ADDR17
+signal ADDR18
+signal ADDR19
+signal AMS_n0
+signal AMS_n1
+signal RTXO
+signal ADDR1
+signal ADDR2
+signal ADDR3
+signal EXT_WAKE
+signal ADDR4
+signal EMU
+signal VDDINT0
+signal VDDINT1
+signal VDDINT2
+signal VDDINT3
+signal VDDINT4
+signal VDDINT5
+signal VDDINT6
+signal VDDINT7
+signal VDDINT8
+signal VDDINT9
+signal VDDINT10
+signal GND0
+signal GND1
+signal GND2
+signal GND3
+signal GND4
+signal GND5
+signal GND6
+signal GND7
+signal GND8
+signal GND9
+signal GND10
+signal GND11
+signal GND12
+signal GND13
+signal GND14
+signal GND15
+signal GND16
+signal GND17
+signal GND18
+signal GND19
+signal GND20
+signal GND21
+signal GND22
+signal GND23
+signal GND24
+signal GND25
+signal GND26
+signal GND27
+signal GND28
+signal VDDEXT0
+signal VDDEXT1
+signal VDDEXT2
+signal VDDEXT3
+signal VDDEXT4
+signal VDDEXT5
+signal VDDEXT6
+signal VDDEXT7
+signal VDDEXT8
+signal VDDEXT9
+signal VDDEXT10
+signal VDDFLASH0
+signal VDDFLASH1
+signal VDDFLASH2
+signal VDDFLASH3
+signal VDDOTP
+signal VDDRTC
+signal VDDMEM0
+signal VDDMEM1
+signal VDDMEM2
+signal VDDMEM3
+signal VDDMEM4
+signal VDDMEM5
+signal VDDMEM6
+signal VDDMEM7
+
+register BSR 200
+register BR 1
+register DIR 32
+register DBGSTAT 16
+register DBGCTL 16
+register EMUIR 32
+register EMUIR64 64
+register EMUDAT 32
+register EMUDAT40 40
+register EMUPC 32
+
+instruction length 5
+
+instruction BYPASS 11111 BR
+instruction EXTEST 00000 BSR
+instruction SAMPLE/PRELOAD 10000 BSR
+instruction IDCODE 00010 DIR
+instruction DBGSTAT_SCAN 01100 DBGSTAT
+instruction DBGCTL_SCAN 00100 DBGCTL
+instruction EMUIR_SCAN 01000 EMUIR
+instruction EMUIR64_SCAN 01000 EMUIR64
+instruction EMUDAT_SCAN 10100 EMUDAT
+instruction EMUDAT40_SCAN 10100 EMUDAT40
+instruction EMUPC_SCAN 11110 EMUPC
+
+bit 199 C 0 *
+bit 198 O 1 ADDR13 7 0 Z
+bit 197 O 1 ADDR14 7 0 Z
+bit 196 O 1 ADDR15 7 0 Z
+bit 195 O 1 ADDR16 7 0 Z
+bit 194 O 1 ADDR17 7 0 Z
+bit 193 O 1 ADDR18 7 0 Z
+bit 192 O 1 ADDR19 7 0 Z
+bit 191 O 1 DATA0 199 0 Z
+bit 190 I 1 DATA0
+bit 189 O 1 DATA1 199 0 Z
+bit 188 I 1 DATA1
+bit 187 O 1 DATA2 199 0 Z
+bit 186 I 1 DATA2
+bit 185 O 1 DATA3 199 0 Z
+bit 184 I 1 DATA3
+bit 183 O 1 DATA4 199 0 Z
+bit 182 I 1 DATA4
+bit 181 O 1 DATA5 199 0 Z
+bit 180 I 1 DATA5
+bit 179 O 1 DATA6 199 0 Z
+bit 178 I 1 DATA6
+bit 177 O 1 DATA7 199 0 Z
+bit 176 I 1 DATA7
+bit 175 O 1 DATA8 199 0 Z
+bit 174 I 1 DATA8
+bit 173 O 1 DATA9 199 0 Z
+bit 172 I 1 DATA9
+bit 171 O 1 DATA10 199 0 Z
+bit 170 I 1 DATA10
+bit 169 O 1 DATA11 199 0 Z
+bit 168 I 1 DATA11
+bit 167 O 1 DATA12 199 0 Z
+bit 166 I 1 DATA12
+bit 165 O 1 DATA13 199 0 Z
+bit 164 I 1 DATA13
+bit 163 O 1 DATA14 199 0 Z
+bit 162 I 1 DATA14
+bit 161 O 1 DATA15 199 0 Z
+bit 160 I 1 DATA15
+bit 159 C 0 *
+bit 158 O 1 PG0 159 0 Z
+bit 157 I 1 PG0
+bit 156 C 0 *
+bit 155 O 1 PG1 156 0 Z
+bit 154 I 1 PG1
+bit 153 I 1 BMODE0
+bit 152 I 1 BMODE1
+bit 151 I 1 BMODE2
+bit 150 C 0 *
+bit 149 O 1 PG2 150 0 Z
+bit 148 I 1 PG2
+bit 147 C 0 *
+bit 146 O 1 PG3 147 0 Z
+bit 145 I 1 PG3
+bit 144 C 0 *
+bit 143 O 1 PG4 144 0 Z
+bit 142 I 1 PG4
+bit 141 C 0 *
+bit 140 O 1 PG5 141 0 Z
+bit 139 I 1 PG5
+bit 138 C 0 *
+bit 137 O 1 PG6 138 0 Z
+bit 136 I 1 PG6
+bit 135 C 0 *
+bit 134 O 1 PG7 135 0 Z
+bit 133 I 1 PG7
+bit 132 C 0 *
+bit 131 O 1 PG8 132 0 Z
+bit 130 I 1 PG8
+bit 129 C 0 *
+bit 128 O 1 PG9 129 0 Z
+bit 127 I 1 PG9
+bit 126 C 0 *
+bit 125 O 1 PG10 126 0 Z
+bit 124 I 1 PG10
+bit 123 C 0 *
+bit 122 O 1 PG11 123 0 Z
+bit 121 I 1 PG11
+bit 120 C 0 *
+bit 119 O 1 PG12 120 0 Z
+bit 118 I 1 PG12
+bit 117 C 0 *
+bit 116 O 1 PG13 117 0 Z
+bit 115 I 1 PG13
+bit 114 C 0 *
+bit 113 O 1 PG14 114 0 Z
+bit 112 I 1 PG14
+bit 111 C 0 *
+bit 110 O 1 PG15 111 0 Z
+bit 109 I 1 PG15
+bit 108 C 0 *
+bit 107 O 1 PF0 108 0 Z
+bit 106 I 1 PF0
+bit 105 C 0 *
+bit 104 O 1 PF1 105 0 Z
+bit 103 I 1 PF1
+bit 102 C 0 *
+bit 101 O 1 PF2 102 0 Z
+bit 100 I 1 PF2
+bit 99 C 0 *
+bit 98 O 1 PF3 99 0 Z
+bit 97 I 1 PF3
+bit 96 C 0 *
+bit 95 O 1 PF4 96 0 Z
+bit 94 I 1 PF4
+bit 93 C 0 *
+bit 92 O 1 PF5 93 0 Z
+bit 91 I 1 PF5
+bit 90 C 0 *
+bit 89 O 1 PF6 90 0 Z
+bit 88 I 1 PF6
+bit 87 C 0 *
+bit 86 O 1 PF7 87 0 Z
+bit 85 I 1 PF7
+bit 84 C 0 *
+bit 83 O 1 PF8 84 0 Z
+bit 82 I 1 PF8
+bit 81 C 0 *
+bit 80 O 1 PF9 81 0 Z
+bit 79 I 1 PF9
+bit 78 C 0 *
+bit 77 O 1 PF10 78 0 Z
+bit 76 I 1 PF10
+bit 75 C 0 *
+bit 74 O 1 SCL 75 0 Z
+bit 73 I 1 SCL
+bit 72 C 0 *
+bit 71 O 1 SDA 72 0 Z
+bit 70 I 1 SDA
+bit 69 C 0 *
+bit 68 O 1 PF11 69 0 Z
+bit 67 I 1 PF11
+bit 66 C 0 *
+bit 65 O 1 PF12 66 0 Z
+bit 64 I 1 PF12
+bit 63 C 0 *
+bit 62 O 1 PF13 63 0 Z
+bit 61 I 1 PF13
+bit 60 C 0 *
+bit 59 O 1 PF14 60 0 Z
+bit 58 I 1 PF14
+bit 57 C 0 *
+bit 56 O 1 PF15 57 0 Z
+bit 55 I 1 PF15
+bit 54 C 0 *
+bit 53 O 1 PH0 54 0 Z
+bit 52 I 1 PH0
+bit 51 C 0 *
+bit 50 O 1 PH1 51 0 Z
+bit 49 I 1 PH1
+bit 48 C 0 *
+bit 47 O 1 PH2 48 0 Z
+bit 46 I 1 PH2
+bit 45 C 0 *
+bit 44 O 1 PH3 45 0 Z
+bit 43 I 1 PH3
+bit 42 C 0 *
+bit 41 O 1 PH4 42 0 Z
+bit 40 I 1 PH4
+bit 39 C 0 *
+bit 38 O 1 PH5 39 0 Z
+bit 37 I 1 PH5
+bit 36 C 0 *
+bit 35 O 1 PH6 36 0 Z
+bit 34 I 1 PH6
+bit 33 C 0 *
+bit 32 O 1 PH7 33 0 Z
+bit 31 I 1 PH7
+bit 30 I 1 NMI
+bit 29 I 1 RESET
+bit 28 C 0 *
+bit 27 O 1 CLKOUT 28 0 Z
+bit 26 O 1 AMS_n0 24 0 Z
+bit 25 O 1 AWE_n 24 0 Z
+bit 24 C 0 *
+bit 23 O 1 ARE_n 24 0 Z
+bit 22 O 1 AMS_n1 24 0 Z
+bit 21 O 1 SCKE 28 0 Z
+bit 20 O 1 SMS_n 28 0 Z
+bit 19 I 1 TEST
+bit 18 O 1 SRAS_n 28 0 Z
+bit 17 O 1 SCAS_n 28 0 Z
+bit 16 O 1 SWE_n 28 0 Z
+bit 15 O 1 SA10 28 0 Z
+bit 14 O 1 ABE_n0 7 0 Z
+bit 13 O 1 ABE_n1 7 0 Z
+bit 12 O 1 ADDR1 7 0 Z
+bit 11 O 1 ADDR2 7 0 Z
+bit 10 O 1 ADDR3 7 0 Z
+bit 9 O 1 ADDR4 7 0 Z
+bit 8 O 1 ADDR5 7 0 Z
+bit 7 C 0 *
+bit 6 O 1 ADDR6 7 0 Z
+bit 5 O 1 ADDR7 7 0 Z
+bit 4 O 1 ADDR8 7 0 Z
+bit 3 O 1 ADDR9 7 0 Z
+bit 2 O 1 ADDR10 7 0 Z
+bit 1 O 1 ADDR11 7 0 Z
+bit 0 O 1 ADDR12 7 0 Z
--- /dev/null
+#
+# $Id: STEPPINGS 75 2005-11-11 09:12:34Z jiez $
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+#
+
+# bits 31-28 of the Device Identification Register
+0000 bf527 0
+0001 bf527 1
+0010 bf527 2
--- /dev/null
+signal ADDR1
+signal ADDR2
+signal ADDR3
+signal ADDR4
+signal ADDR5
+signal ADDR6
+signal ADDR7
+signal ADDR8
+signal ADDR9
+signal ADDR10
+signal ADDR11
+signal ADDR12
+signal ADDR13
+signal ADDR14
+signal ADDR15
+signal ADDR16
+signal ADDR17
+signal ADDR18
+signal ADDR19
+signal DATA0
+signal DATA1
+signal DATA2
+signal DATA3
+signal DATA4
+signal DATA5
+signal DATA6
+signal DATA7
+signal DATA8
+signal DATA9
+signal DATA10
+signal DATA11
+signal DATA12
+signal DATA13
+signal DATA14
+signal DATA15
+signal PF0
+signal PF1
+signal PF2
+signal PF3
+signal PF4
+signal PF5
+signal PF6
+signal PF7
+signal PF8
+signal PF9
+signal PF10
+signal PF11
+signal PF12
+signal PF13
+signal PF14
+signal PF15
+signal PG0
+signal PG1
+signal PG2
+signal PG3
+signal PG4
+signal PG5
+signal PG6
+signal PG7
+signal PG8
+signal PG9
+signal PG10
+signal PG11
+signal PG12
+signal PG13
+signal PG14
+signal PG15
+signal PH0
+signal PH1
+signal PH2
+signal PH3
+signal PH4
+signal PH5
+signal PH6
+signal PH7
+signal PH8
+signal PH9
+signal PH10
+signal PH11
+signal PH12
+signal PH13
+signal PH14
+signal PH15
+signal BMODE0
+signal BMODE1
+signal BMODE2
+signal BMODE3
+signal PJ1
+signal PJ0
+signal PJ2
+signal PJ3
+signal NMI_B
+signal RESET_B
+signal CLKOUT
+signal AMS_B0
+signal AMS_B1
+signal AMS_B2
+signal AMS_B3
+signal AOE_B
+signal ARE_B
+signal AWE_B
+signal ARDY
+signal SCKE
+signal SMS_B
+signal SRAS_B
+signal SCAS_B
+signal SWE_B
+signal SA10
+signal ABE_B0
+signal ABE_B1
+signal TCK
+signal TDI
+signal TDO
+signal TMS
+signal TRST_B
+signal GND0
+signal GND1
+signal GND2
+signal GND3
+signal GND4
+signal GND5
+signal GND6
+signal GND7
+signal GND8
+signal GND9
+signal GND10
+signal GND11
+signal GND12
+signal GND13
+signal GND14
+signal GND15
+signal GND16
+signal GND17
+signal GND18
+signal GND19
+signal GND20
+signal GND21
+signal GND22
+signal GND23
+signal GND24
+signal GND25
+signal GND26
+signal GND27
+signal GND28
+signal GND29
+signal GND30
+signal GND31
+signal GND32
+signal GND33
+signal GND34
+signal GND35
+signal GND36
+signal GND37
+signal GND38
+signal GND39
+signal GND40
+signal GND41
+signal GND42
+signal GND43
+signal GND44
+signal GND45
+signal GND46
+signal GND47
+signal GND48
+signal GND49
+signal GND50
+signal GND51
+signal GND52
+signal GND53
+signal GND54
+signal VDDOTP
+signal OTPVPP
+signal USB_ID
+signal USB_RSET
+signal VDDUSB0
+signal VDDUSB1
+signal USB_VREF
+signal USB_XTALIN
+signal USB_XTALOUT
+signal VDDEXT0
+signal VDDEXT1
+signal VDDEXT2
+signal VDDEXT3
+signal VDDEXT4
+signal VDDEXT5
+signal VDDEXT6
+signal VDDEXT7
+signal VDDEXT8
+signal VDDEXT9
+signal VDDEXT10
+signal VDDEXT11
+signal VDDEXT12
+signal VDDEXT13
+signal VDDEXT14
+signal VDDEXT15
+signal VDDEXT16
+signal VDDEXT17
+signal VDDEXT18
+signal VDDEXT19
+signal RTXI
+signal RTXO
+signal SSPG
+signal CLKIN
+signal VROUT
+signal EXT_WAKE
+signal USB_DM
+signal USB_DP
+signal USB_VBUS
+signal CLKBUF
+signal VDDRTC
+signal VDDMEM0
+signal VDDMEM1
+signal VDDMEM2
+signal VDDMEM3
+signal VDDMEM4
+signal VDDMEM5
+signal VDDMEM6
+signal VDDMEM7
+signal VDDMEM8
+signal VDDMEM9
+signal VDDMEM10
+signal VDDMEM11
+signal VDDMEM12
+signal VDDMEM13
+signal VDDMEM14
+signal VDDMEM15
+signal VDDMEM16
+signal VDDMEM17
+signal VDDINT0
+signal VDDINT1
+signal VDDINT2
+signal VDDINT3
+signal VDDINT4
+signal VDDINT5
+signal VDDINT6
+signal VDDINT7
+signal VDDINT8
+signal VDDINT9
+signal VDDINT10
+signal VDDINT11
+signal VDDINT12
+signal VDDINT13
+signal VDDINT14
+signal VDDINT15
+signal VDDINT16
+signal VDDINT17
+signal VDDINT18
+signal VDDINT19
+signal VDDINT20
+signal VDDINT21
+signal VDDINT22
+signal VDDINT23
+signal VDDINT24
+signal VDDINT25
+signal VDDINT26
+signal VDDINT27
+signal VDDINT28
+signal VDDINT29
+signal VDDINT30
+signal VDDINT31
+signal VDDINT32
+signal VRSEL
+signal XTAL
+signal ADCLRC
+signal ADCDAT
+signal DACLRC
+signal DACDAT
+signal BCLK
+signal XTO
+signal XTI_MCLK
+signal LHPOUT
+signal RHPOUT
+signal CSCL
+signal CSDA
+signal CCLKOUT
+signal CSB
+signal CMODE
+signal LLINEIN
+signal LOUT
+signal RLINEIN
+signal ROUT
+signal VMID
+signal MICBIAS
+signal MICIN
+signal AVDD0
+signal AVDD1
+signal AGND0
+signal AGND1
+
+register BSR 233
+register BR 1
+register DIR 32
+register DBGSTAT 16
+register DBGCTL 16
+register EMUIR 32
+register EMUIR64 64
+register EMUDAT 32
+register EMUDAT40 40
+register EMUPC 32
+
+instruction length 5
+
+instruction EXTEST 00000 BSR
+instruction SAMPLE/PRELOAD 10000 BSR
+instruction IDCODE 00010 DIR
+instruction BYPASS 11111 BR
+instruction DBGSTAT_SCAN 01100 DBGSTAT
+instruction DBGCTL_SCAN 00100 DBGCTL
+instruction EMUIR_SCAN 01000 EMUIR
+instruction EMUIR64_SCAN 01000 EMUIR64
+instruction EMUDAT_SCAN 10100 EMUDAT
+instruction EMUDAT40_SCAN 10100 EMUDAT40
+instruction EMUPC_SCAN 11110 EMUPC
+
+bit 232 C 0 *
+bit 231 O 1 ADDR14 8 0 Z
+bit 230 O 1 ADDR15 8 0 Z
+bit 229 O 1 ADDR16 8 0 Z
+bit 228 O 1 ADDR17 8 0 Z
+bit 227 O 1 ADDR18 8 0 Z
+bit 226 O 1 ADDR19 8 0 Z
+bit 225 O 1 DATA0 232 0 Z
+bit 224 I 1 DATA0
+bit 223 O 1 DATA1 232 0 Z
+bit 222 I 1 DATA1
+bit 221 O 1 DATA2 232 0 Z
+bit 220 I 1 DATA2
+bit 219 O 1 DATA3 232 0 Z
+bit 218 I 1 DATA3
+bit 217 O 1 DATA4 232 0 Z
+bit 216 I 1 DATA4
+bit 215 O 1 DATA5 232 0 Z
+bit 214 I 1 DATA5
+bit 213 O 1 DATA6 232 0 Z
+bit 212 I 1 DATA6
+bit 211 O 1 DATA7 232 0 Z
+bit 210 I 1 DATA7
+bit 209 O 1 DATA8 232 0 Z
+bit 208 I 1 DATA8
+bit 207 O 1 DATA9 232 0 Z
+bit 206 I 1 DATA9
+bit 205 O 1 DATA10 232 0 Z
+bit 204 I 1 DATA10
+bit 203 O 1 DATA11 232 0 Z
+bit 202 I 1 DATA11
+bit 201 O 1 DATA12 232 0 Z
+bit 200 I 1 DATA12
+bit 199 O 1 DATA13 232 0 Z
+bit 198 I 1 DATA13
+bit 197 O 1 DATA14 232 0 Z
+bit 196 I 1 DATA14
+bit 195 O 1 DATA15 232 0 Z
+bit 194 I 1 DATA15
+bit 193 C 0 *
+bit 192 O 1 PG0 193 0 Z
+bit 191 I 1 PG0
+bit 190 C 0 *
+bit 189 O 1 PG1 190 0 Z
+bit 188 I 1 PG1
+bit 187 C 0 *
+bit 186 O 1 PG2 187 0 Z
+bit 185 I 1 PG2
+bit 184 C 0 *
+bit 183 O 1 PG3 184 0 Z
+bit 182 I 1 PG3
+bit 181 I 1 BMODE0
+bit 180 I 1 BMODE1
+bit 179 I 1 BMODE2
+bit 178 I 1 BMODE3
+bit 177 C 0 *
+bit 176 O 1 PG4 177 0 Z
+bit 175 I 1 PG4
+bit 174 C 0 *
+bit 173 O 1 PG5 174 0 Z
+bit 172 I 1 PG5
+bit 171 C 0 *
+bit 170 O 1 PG6 171 0 Z
+bit 169 I 1 PG6
+bit 168 C 0 *
+bit 167 O 1 PG7 168 0 Z
+bit 166 I 1 PG7
+bit 165 C 0 *
+bit 164 O 1 PG8 165 0 Z
+bit 163 I 1 PG8
+bit 162 C 0 *
+bit 161 O 1 PG9 162 0 Z
+bit 160 I 1 PG9
+bit 159 C 0 *
+bit 158 O 1 PG10 159 0 Z
+bit 157 I 1 PG10
+bit 156 C 0 *
+bit 155 O 1 PG11 156 0 Z
+bit 154 I 1 PG11
+bit 153 C 0 *
+bit 152 O 1 PG12 153 0 Z
+bit 151 I 1 PG12
+bit 150 C 0 *
+bit 149 O 1 PG13 150 0 Z
+bit 148 I 1 PG13
+bit 147 C 0 *
+bit 146 O 1 PG14 147 0 Z
+bit 145 I 1 PG14
+bit 144 C 0 *
+bit 143 O 1 PG15 144 0 Z
+bit 142 I 1 PG15
+bit 141 I 1 PJ1
+bit 140 C 0 *
+bit 139 O 1 PJ0 140 0 Z
+bit 138 I 1 PJ0
+bit 137 C 0 *
+bit 136 O 1 PF0 137 0 Z
+bit 135 I 1 PF0
+bit 134 C 0 *
+bit 133 O 1 PF1 134 0 Z
+bit 132 I 1 PF1
+bit 131 C 0 *
+bit 130 O 1 PF2 131 0 Z
+bit 129 I 1 PF2
+bit 128 C 0 *
+bit 127 O 1 PF3 128 0 Z
+bit 126 I 1 PF3
+bit 125 C 0 *
+bit 124 O 1 PF4 125 0 Z
+bit 123 I 1 PF4
+bit 122 C 0 *
+bit 121 O 1 PF5 122 0 Z
+bit 120 I 1 PF5
+bit 119 C 0 *
+bit 118 O 1 PF6 119 0 Z
+bit 117 I 1 PF6
+bit 116 C 0 *
+bit 115 O 1 PF7 116 0 Z
+bit 114 I 1 PF7
+bit 113 C 0 *
+bit 112 O 1 PF8 113 0 Z
+bit 111 I 1 PF8
+bit 110 C 0 *
+bit 109 O 1 PF9 110 0 Z
+bit 108 I 1 PF9
+bit 107 C 0 *
+bit 106 O 1 PF10 107 0 Z
+bit 105 I 1 PF10
+bit 104 C 0 *
+bit 103 O 1 PF11 104 0 Z
+bit 102 I 1 PF11
+bit 101 O 1 *
+bit 100 O 1 PJ2 100 1 Z
+bit 99 I 1 PJ2
+bit 98 O 1 *
+bit 97 O 1 PJ3 97 1 Z
+bit 96 I 1 PJ3
+bit 95 C 0 *
+bit 94 O 1 PF12 95 0 Z
+bit 93 I 1 PF12
+bit 92 C 0 *
+bit 91 O 1 PF13 92 0 Z
+bit 90 I 1 PF13
+bit 89 C 0 *
+bit 88 O 1 PF14 89 0 Z
+bit 87 I 1 PF14
+bit 86 C 0 *
+bit 85 O 1 PF15 86 0 Z
+bit 84 I 1 PF15
+bit 83 C 0 *
+bit 82 O 1 PH0 83 0 Z
+bit 81 I 1 PH0
+bit 80 C 0 *
+bit 79 O 1 PH1 80 0 Z
+bit 78 I 1 PH1
+bit 77 C 0 *
+bit 76 O 1 PH2 77 0 Z
+bit 75 I 1 PH2
+bit 74 C 0 *
+bit 73 O 1 PH3 74 0 Z
+bit 72 I 1 PH3
+bit 71 C 0 *
+bit 70 O 1 PH4 71 0 Z
+bit 69 I 1 PH4
+bit 68 C 0 *
+bit 67 O 1 PH5 68 0 Z
+bit 66 I 1 PH5
+bit 65 C 0 *
+bit 64 O 1 PH6 65 0 Z
+bit 63 I 1 PH6
+bit 62 C 0 *
+bit 61 O 1 PH7 62 0 Z
+bit 60 I 1 PH7
+bit 59 C 0 *
+bit 58 O 1 PH8 59 0 Z
+bit 57 I 1 PH8
+bit 56 O 0 *
+bit 55 C 0 *
+bit 54 O 1 PH9 55 0 Z
+bit 53 I 1 PH9
+bit 52 C 0 *
+bit 51 O 1 PH10 52 0 Z
+bit 50 I 1 PH10
+bit 49 C 0 *
+bit 48 O 1 PH11 49 0 Z
+bit 47 I 1 PH11
+bit 46 C 0 *
+bit 45 O 1 PH12 46 0 Z
+bit 44 I 1 PH12
+bit 43 C 0 *
+bit 42 O 1 PH13 43 0 Z
+bit 41 I 1 PH13
+bit 40 C 0 *
+bit 39 O 1 PH14 40 0 Z
+bit 38 I 1 PH14
+bit 37 C 0 *
+bit 36 O 1 PH15 37 0 Z
+bit 35 I 1 PH15
+bit 34 I 1 NMI_B
+bit 33 I 1 RESET_B
+bit 32 C 0 *
+bit 31 O 1 CLKOUT 32 0 Z
+bit 30 O 1 AMS_B0 25 0 Z
+bit 29 O 1 AMS_B1 25 0 Z
+bit 28 O 1 AMS_B2 25 0 Z
+bit 27 O 1 AMS_B3 25 0 Z
+bit 26 O 1 AOE_B 25 0 Z
+bit 25 C 0 *
+bit 24 O 1 ARE_B 25 0 Z
+bit 23 O 1 AWE_B 25 0 Z
+bit 22 I 1 ARDY
+bit 21 O 1 SCKE 32 0 Z
+bit 20 O 1 SMS_B 32 0 Z
+bit 19 O 1 SRAS_B 32 0 Z
+bit 18 O 1 SCAS_B 32 0 Z
+bit 17 O 1 SWE_B 32 0 Z
+bit 16 O 1 SA10 32 0 Z
+bit 15 O 1 ABE_B0 8 0 Z
+bit 14 O 1 ABE_B1 8 0 Z
+bit 13 O 1 ADDR1 8 0 Z
+bit 12 O 1 ADDR2 8 0 Z
+bit 11 O 1 ADDR3 8 0 Z
+bit 10 O 1 ADDR4 8 0 Z
+bit 9 O 1 ADDR5 8 0 Z
+bit 8 C 0 *
+bit 7 O 1 ADDR6 8 0 Z
+bit 6 O 1 ADDR7 8 0 Z
+bit 5 O 1 ADDR8 8 0 Z
+bit 4 O 1 ADDR9 8 0 Z
+bit 3 O 1 ADDR10 8 0 Z
+bit 2 O 1 ADDR11 8 0 Z
+bit 1 O 1 ADDR12 8 0 Z
+bit 0 O 1 ADDR13 8 0 Z
--- /dev/null
+#
+# $Id: STEPPINGS,v 1.3 2005/07/08 15:05:41 rgetz Exp $
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Richard Klingler <richard@klingler.net>
+#
+
+# bits 31-28 of the Device Identification Register
+0000 bf533 0
+0001 bf533 1
+0010 bf533 2
+0011 bf533 3
+0100 bf533 4
+0101 bf533 5
+0110 bf533 6
--- /dev/null
+signal ADDR[1]
+signal ADDR[2]
+signal ADDR[3]
+signal ADDR[4]
+signal ADDR[5]
+signal ADDR[6]
+signal ADDR[7]
+signal ADDR[8]
+signal ADDR[9]
+signal ADDR[10]
+signal ADDR[11]
+signal ADDR[12]
+signal ADDR[13]
+signal ADDR[14]
+signal ADDR[15]
+signal ADDR[16]
+signal ADDR[17]
+signal ADDR[18]
+signal ADDR[19]
+signal AMS_B0
+signal AMS_B1
+signal AMS_B2
+signal AMS_B3
+signal AOE_B
+signal ARDY
+signal ARE_B
+signal AWE_B
+signal ABE_B0
+signal ABE_B1
+signal BG_B
+signal BGH_B
+signal BMODE0
+signal BMODE1
+signal BR_B
+signal DATA[0]
+signal DATA[1]
+signal DATA[2]
+signal DATA[3]
+signal DATA[4]
+signal DATA[5]
+signal DATA[6]
+signal DATA[7]
+signal DATA[8]
+signal DATA[9]
+signal DATA[10]
+signal DATA[11]
+signal DATA[12]
+signal DATA[13]
+signal DATA[14]
+signal DATA[15]
+signal DR0PRI
+signal DR0SEC
+signal DR1PRI
+signal DR1SEC
+signal DT0PRI
+signal DT0SEC
+signal DT1PRI
+signal DT1SEC
+signal MISO
+signal MOSI
+signal NMI
+signal PF0
+signal PF1
+signal PF2
+signal PF3
+signal PF4
+signal PF5
+signal PF6
+signal PF7
+signal PF8
+signal PF9
+signal PF10
+signal PF11
+signal PF12
+signal PF13
+signal PF14
+signal PF15
+signal PP_CLK
+signal PP0
+signal PP1
+signal PP2
+signal PP3
+signal RESET_B
+signal RFS0
+signal RFS1
+signal RSCLK0
+signal RSCLK1
+signal TSCLK0
+signal TSCLK1
+signal CLKOUT
+signal RX
+signal TX
+signal SA10
+signal SCAS_B
+signal SCK
+signal SCKE
+signal SMS_B
+signal SRAS_B
+signal SWE_B
+signal TCK
+signal TDI
+signal TDO
+signal TMS
+signal TRST_B
+signal EMU_B
+signal TEST
+signal TFS0
+signal TFS1
+signal TMR0
+signal TMR1
+signal TMR2
+signal RTXI
+signal RTXO
+signal VDD_INT0
+signal VDD_INT1
+signal VDD_INT2
+signal VDD_INT3
+signal VDD_INT4
+signal VDD_INT5
+signal VDD_EXT0
+signal VDD_EXT1
+signal VDD_EXT2
+signal VDD_EXT3
+signal VDD_EXT4
+signal VDD_EXT5
+signal VDD_EXT6
+signal VDD_EXT7
+signal VDD_EXT8
+signal VDD_EXT9
+signal VDD_EXT10
+signal VDD_EXT11
+signal GND0
+signal GND1
+signal GND2
+signal GND3
+signal GND4
+signal GND5
+signal GND6
+signal GND7
+signal GND8
+signal GND9
+signal GND10
+signal GND11
+signal GND12
+signal GND13
+signal GND14
+signal GND15
+signal GND16
+signal GND17
+signal GND18
+signal GND19
+signal GND20
+signal GND21
+signal GND22
+signal GND23
+signal VDD_RTC
+signal CLKIN
+signal XTAL
+signal VROUT0
+
+register BSR 197
+register BR 1
+register DIR 32
+register DBGSTAT 16
+register DBGCTL 16
+register EMUIR 32
+register EMUIR64 64
+register EMUDAT 32
+register EMUDAT40 40
+register EMUPC 32
+
+instruction length 5
+
+instruction EXTEST 00000 BSR
+instruction SAMPLE/PRELOAD 10000 BSR
+instruction IDCODE 00010 DIR
+instruction BYPASS 11111 BR
+instruction DBGSTAT_SCAN 01100 DBGSTAT
+instruction DBGCTL_SCAN 00100 DBGCTL
+instruction EMUIR_SCAN 01000 EMUIR
+instruction EMUIR64_SCAN 01000 EMUIR64
+instruction EMUDAT_SCAN 10100 EMUDAT
+instruction EMUDAT40_SCAN 10100 EMUDAT40
+instruction EMUPC_SCAN 11110 EMUPC
+
+bit 196 C 0 *
+bit 195 O 1 DATA[0] 196 0 Z
+bit 194 I 1 DATA[0]
+bit 193 O 1 DATA[1] 196 0 Z
+bit 192 I 1 DATA[1]
+bit 191 O 1 DATA[2] 196 0 Z
+bit 190 I 1 DATA[2]
+bit 189 O 1 DATA[3] 196 0 Z
+bit 188 I 1 DATA[3]
+bit 187 O 1 DATA[4] 196 0 Z
+bit 186 I 1 DATA[4]
+bit 185 O 1 DATA[5] 196 0 Z
+bit 184 I 1 DATA[5]
+bit 183 O 1 DATA[6] 196 0 Z
+bit 182 I 1 DATA[6]
+bit 181 O 1 DATA[7] 196 0 Z
+bit 180 I 1 DATA[7]
+bit 179 O 1 DATA[8] 196 0 Z
+bit 178 I 1 DATA[8]
+bit 177 O 1 DATA[9] 196 0 Z
+bit 176 I 1 DATA[9]
+bit 175 O 1 DATA[10] 196 0 Z
+bit 174 I 1 DATA[10]
+bit 173 O 1 DATA[11] 196 0 Z
+bit 172 I 1 DATA[11]
+bit 171 O 1 DATA[12] 196 0 Z
+bit 170 I 1 DATA[12]
+bit 169 O 1 DATA[13] 196 0 Z
+bit 168 I 1 DATA[13]
+bit 167 O 1 DATA[14] 196 0 Z
+bit 166 I 1 DATA[14]
+bit 165 O 1 DATA[15] 196 0 Z
+bit 164 I 1 DATA[15]
+bit 163 I 1 TEST
+bit 162 I 1 BMODE0
+bit 161 I 1 BMODE1
+bit 160 I 1 RX
+bit 159 O 1 TX
+bit 158 C 0 *
+bit 157 O 1 TMR0 158 0 Z
+bit 156 I 1 TMR0
+bit 155 C 0 *
+bit 154 O 1 TMR1 155 0 Z
+bit 153 I 1 TMR1
+bit 152 C 0 *
+bit 151 O 1 TMR2 152 0 Z
+bit 150 I 1 TMR2
+bit 149 C 0 *
+bit 148 O 1 RSCLK0 149 0 Z
+bit 147 I 1 RSCLK0
+bit 146 C 0 *
+bit 145 O 1 RFS0 146 0 Z
+bit 144 I 1 RFS0
+bit 143 I 1 DR0PRI
+bit 142 I 1 DR0SEC
+bit 141 C 0 *
+bit 140 O 1 TSCLK0 141 0 Z
+bit 139 I 1 TSCLK0
+bit 138 C 0 *
+bit 137 O 1 TFS0 138 0 Z
+bit 136 I 1 TFS0
+bit 135 C 0 *
+bit 134 O 1 DT0PRI 135 0 Z
+bit 133 C 0 *
+bit 132 O 1 DT0SEC 133 0 Z
+bit 131 C 0 *
+bit 130 O 1 RSCLK1 131 0 Z
+bit 129 I 1 RSCLK1
+bit 128 C 0 *
+bit 127 O 1 RFS1 128 0 Z
+bit 126 I 1 RFS1
+bit 125 I 1 DR1PRI
+bit 124 I 1 DR1SEC
+bit 123 C 0 *
+bit 122 O 1 TSCLK1 123 0 Z
+bit 121 I 1 TSCLK1
+bit 120 C 0 *
+bit 119 O 1 TFS1 120 0 Z
+bit 118 I 1 TFS1
+bit 117 C 0 *
+bit 116 O 1 DT1PRI 117 0 Z
+bit 115 C 0 *
+bit 114 O 1 DT1SEC 115 0 Z
+bit 113 C 0 *
+bit 112 O 1 MOSI 113 0 Z
+bit 111 I 1 MOSI
+bit 110 C 0 *
+bit 109 O 1 MISO 110 0 Z
+bit 108 I 1 MISO
+bit 107 C 0 *
+bit 106 O 1 SCK 107 0 Z
+bit 105 I 1 SCK
+bit 104 C 0 *
+bit 103 O 1 PF0 104 0 Z
+bit 102 I 1 PF0
+bit 101 C 0 *
+bit 100 O 1 PF1 101 0 Z
+bit 99 I 1 PF1
+bit 98 C 0 *
+bit 97 O 1 PF2 98 0 Z
+bit 96 I 1 PF2
+bit 95 C 0 *
+bit 94 O 1 PF3 95 0 Z
+bit 93 I 1 PF3
+bit 92 C 0 *
+bit 91 O 1 PF4 92 0 Z
+bit 90 I 1 PF4
+bit 89 C 0 *
+bit 88 O 1 PF5 89 0 Z
+bit 87 I 1 PF5
+bit 86 C 0 *
+bit 85 O 1 PF6 86 0 Z
+bit 84 I 1 PF6
+bit 83 C 0 *
+bit 82 O 1 PF7 83 0 Z
+bit 81 I 1 PF7
+bit 80 C 0 *
+bit 79 O 1 PF8 80 0 Z
+bit 78 I 1 PF8
+bit 77 C 0 *
+bit 76 O 1 PF9 77 0 Z
+bit 75 I 1 PF9
+bit 74 C 0 *
+bit 73 O 1 PF10 74 0 Z
+bit 72 I 1 PF10
+bit 71 C 0 *
+bit 70 O 1 PF11 71 0 Z
+bit 69 I 1 PF11
+bit 68 C 0 *
+bit 67 O 1 PF12 68 0 Z
+bit 66 I 1 PF12
+bit 65 C 0 *
+bit 64 O 1 PF13 65 0 Z
+bit 63 I 1 PF13
+bit 62 C 0 *
+bit 61 O 1 PF14 62 0 Z
+bit 60 I 1 PF14
+bit 59 C 0 *
+bit 58 O 1 PF15 59 0 Z
+bit 57 I 1 PF15
+bit 56 C 0 *
+bit 55 O 1 PP3 56 0 Z
+bit 54 I 1 PP3
+bit 53 C 0 *
+bit 52 O 1 PP2 53 0 Z
+bit 51 I 1 PP2
+bit 50 C 0 *
+bit 49 O 1 PP1 50 0 Z
+bit 48 I 1 PP1
+bit 47 C 0 *
+bit 46 O 1 PP0 47 0 Z
+bit 45 I 1 PP0
+bit 44 I 1 PP_CLK
+bit 43 I 1 NMI
+bit 42 I 1 RESET_B
+bit 41 O 1 SCKE 39 0 Z
+bit 40 O 1 SMS_B 39 0 Z
+bit 39 C 0 *
+bit 38 O 1 CLKOUT 39 0 Z
+bit 37 O 1 SRAS_B 39 0 Z
+bit 36 O 1 SCAS_B 39 0 Z
+bit 35 O 1 SWE_B 39 0 Z
+bit 34 O 1 SA10 39 0 Z
+bit 33 I 1 BR_B
+bit 32 I 1 ARDY
+bit 31 O 1 AMS_B0 27 0 Z
+bit 30 O 1 AMS_B1 27 0 Z
+bit 29 O 1 AMS_B2 27 0 Z
+bit 28 O 1 AMS_B3 27 0 Z
+bit 27 C 0 *
+bit 26 O 1 AOE_B 27 0 Z
+bit 25 O 1 ARE_B 27 0 Z
+bit 24 O 1 AWE_B 27 0 Z
+bit 23 O 1 ABE_B0 17 0 Z
+bit 22 O 1 ABE_B1 17 0 Z
+bit 21 O 1 ADDR[1] 17 0 Z
+bit 20 O 1 ADDR[2] 17 0 Z
+bit 19 O 1 ADDR[3] 17 0 Z
+bit 18 O 1 ADDR[4] 17 0 Z
+bit 17 C 0 *
+bit 16 O 1 ADDR[5] 17 0 Z
+bit 15 O 1 ADDR[6] 17 0 Z
+bit 14 O 1 ADDR[7] 17 0 Z
+bit 13 O 1 ADDR[8] 17 0 Z
+bit 12 O 1 ADDR[9] 17 0 Z
+bit 11 O 1 ADDR[10] 17 0 Z
+bit 10 O 1 ADDR[11] 17 0 Z
+bit 9 O 1 ADDR[12] 17 0 Z
+bit 8 O 1 ADDR[13] 17 0 Z
+bit 7 O 1 ADDR[14] 17 0 Z
+bit 6 O 1 ADDR[15] 17 0 Z
+bit 5 O 1 ADDR[16] 17 0 Z
+bit 4 O 1 ADDR[17] 17 0 Z
+bit 3 O 1 ADDR[18] 17 0 Z
+bit 2 O 1 ADDR[19] 17 0 Z
+bit 1 O 1 BGH_B
+bit 0 O 1 BG_B
--- /dev/null
+#
+# $Id: STEPPINGS 75 2005-11-11 09:12:34Z jiez $
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Richard Klingler <richard@klingler.net>
+#
+
+# bits 31-28 of the Device Identification Register
+0000 bf537 0
+0001 bf537 1
+0010 bf537 2
+0011 bf537 3
--- /dev/null
+signal ADDR1
+signal ADDR2
+signal ADDR3
+signal ADDR4
+signal ADDR5
+signal ADDR6
+signal ADDR7
+signal ADDR8
+signal ADDR9
+signal ADDR10
+signal ADDR11
+signal ADDR12
+signal ADDR13
+signal ADDR14
+signal ADDR15
+signal ADDR16
+signal ADDR17
+signal ADDR18
+signal ADDR19
+signal AMS_B0
+signal AMS_B1
+signal AMS_B2
+signal AMS_B3
+signal AOE_B
+signal ARDY
+signal ARE_B
+signal AWE_B
+signal ABE_B0
+signal ABE_B1
+signal BG_B
+signal BGH_B
+signal BMODE0
+signal BMODE1
+signal BMODE2
+signal BR_B
+signal DATA0
+signal DATA1
+signal DATA2
+signal DATA3
+signal DATA4
+signal DATA5
+signal DATA6
+signal DATA7
+signal DATA8
+signal DATA9
+signal DATA10
+signal DATA11
+signal DATA12
+signal DATA13
+signal DATA14
+signal DATA15
+signal NMI
+signal PF0
+signal PF1
+signal PF2
+signal PF3
+signal PF4
+signal PF5
+signal PF6
+signal PF7
+signal PF8
+signal PF9
+signal PF10
+signal PF11
+signal PF12
+signal PF13
+signal PF14
+signal PF15
+signal PG0
+signal PG1
+signal PG2
+signal PG3
+signal PG4
+signal PG5
+signal PG6
+signal PG7
+signal PG8
+signal PG9
+signal PG10
+signal PG11
+signal PG12
+signal PG13
+signal PG14
+signal PG15
+signal PH0
+signal PH1
+signal PH2
+signal PH3
+signal PH4
+signal PH5
+signal PH6
+signal PH7
+signal PH8
+signal PH9
+signal PH10
+signal PH11
+signal PH12
+signal PH13
+signal PH14
+signal PH15
+signal PJ0
+signal PJ1
+signal PJ2
+signal PJ3
+signal PJ4
+signal PJ5
+signal PJ6
+signal PJ7
+signal PJ8
+signal PJ9
+signal PJ10
+signal PJ11
+signal RESET_B
+signal CLKOUT
+signal SA10
+signal SCAS_B
+signal SCKE
+signal SMS_B
+signal SRAS_B
+signal SWE_B
+signal TDI
+signal TDO
+signal TCK
+signal TMS
+signal TRST_B
+signal TEST
+signal EMU_B
+signal RTXI
+signal RTXO
+signal VDD_INT0
+signal VDD_INT1
+signal VDD_INT2
+signal VDD_INT3
+signal VDD_INT4
+signal VDD_INT5
+signal VDD_INT6
+signal VDD_EXT0
+signal VDD_EXT1
+signal VDD_EXT2
+signal VDD_EXT3
+signal VDD_EXT4
+signal VDD_EXT5
+signal VDD_EXT6
+signal VDD_EXT7
+signal VDD_EXT8
+signal VDD_EXT9
+signal VDD_EXT10
+signal VDD_EXT11
+signal VDD_EXT12
+signal VDD_EXT13
+signal VDD_EXT14
+signal VDD_EXT15
+signal GND0
+signal GND1
+signal GND2
+signal GND3
+signal GND4
+signal GND5
+signal GND6
+signal GND7
+signal GND8
+signal GND9
+signal GND10
+signal GND11
+signal GND12
+signal GND13
+signal GND14
+signal GND15
+signal GND16
+signal GND17
+signal GND18
+signal GND19
+signal GND20
+signal GND21
+signal GND22
+signal GND23
+signal VDD_RTC
+signal CLKIN
+signal XTAL
+signal CLKBUF
+signal VROUT0
+
+register BSR 261
+register BR 1
+register DIR 32
+register DBGSTAT 16
+register DBGCTL 16
+register EMUIR 32
+register EMUIR64 64
+register EMUDAT 32
+register EMUDAT40 40
+register EMUPC 32
+
+instruction length 5
+
+instruction BYPASS 11111 BR
+instruction EXTEST 00000 BSR
+instruction SAMPLE/PRELOAD 10000 BSR
+instruction IDCODE 00010 DIR
+instruction DBGSTAT_SCAN 01100 DBGSTAT
+instruction DBGCTL_SCAN 00100 DBGCTL
+instruction EMUIR_SCAN 01000 EMUIR
+instruction EMUIR64_SCAN 01000 EMUIR64
+instruction EMUDAT_SCAN 10100 EMUDAT
+instruction EMUDAT40_SCAN 10100 EMUDAT40
+instruction EMUPC_SCAN 11110 EMUPC
+
+bit 260 C 0 *
+bit 259 O 1 DATA0 260 0 Z
+bit 258 I 1 DATA0
+bit 257 O 1 DATA1 260 0 Z
+bit 256 I 1 DATA1
+bit 255 O 1 DATA2 260 0 Z
+bit 254 I 1 DATA2
+bit 253 O 1 DATA3 260 0 Z
+bit 252 I 1 DATA3
+bit 251 O 1 DATA4 260 0 Z
+bit 250 I 1 DATA4
+bit 249 O 1 DATA5 260 0 Z
+bit 248 I 1 DATA5
+bit 247 O 1 DATA6 260 0 Z
+bit 246 I 1 DATA6
+bit 245 O 1 DATA7 260 0 Z
+bit 244 I 1 DATA7
+bit 243 O 1 DATA8 260 0 Z
+bit 242 I 1 DATA8
+bit 241 O 1 DATA9 260 0 Z
+bit 240 I 1 DATA9
+bit 239 O 1 DATA10 260 0 Z
+bit 238 I 1 DATA10
+bit 237 O 1 DATA11 260 0 Z
+bit 236 I 1 DATA11
+bit 235 O 1 DATA12 260 0 Z
+bit 234 I 1 DATA12
+bit 233 O 1 DATA13 260 0 Z
+bit 232 I 1 DATA13
+bit 231 O 1 DATA14 260 0 Z
+bit 230 I 1 DATA14
+bit 229 O 1 DATA15 260 0 Z
+bit 228 I 1 DATA15
+bit 227 I 1 TEST
+bit 226 I 1 BMODE0
+bit 225 I 1 BMODE1
+bit 224 I 1 BMODE2
+bit 223 C 0 *
+bit 222 O 1 PF0 223 0 Z
+bit 221 I 1 PF0
+bit 220 C 0 *
+bit 219 O 1 PF1 220 0 Z
+bit 218 I 1 PF1
+bit 217 C 0 *
+bit 216 O 1 PF2 217 0 Z
+bit 215 I 1 PF2
+bit 214 C 0 *
+bit 213 O 1 PF3 214 0 Z
+bit 212 I 1 PF3
+bit 211 C 0 *
+bit 210 O 1 PF4 211 0 Z
+bit 209 I 1 PF4
+bit 208 C 0 *
+bit 207 O 1 PF5 208 0 Z
+bit 206 I 1 PF5
+bit 205 C 0 *
+bit 204 O 1 PF6 205 0 Z
+bit 203 I 1 PF6
+bit 202 C 0 *
+bit 201 O 1 PF7 202 0 Z
+bit 200 I 1 PF7
+bit 199 C 0 *
+bit 198 O 1 PF8 199 0 Z
+bit 197 I 1 PF8
+bit 196 C 0 *
+bit 195 O 1 PF9 196 0 Z
+bit 194 I 1 PF9
+bit 193 C 0 *
+bit 192 O 1 PF10 193 0 Z
+bit 191 I 1 PF10
+bit 190 C 0 *
+bit 189 O 1 PF11 190 0 Z
+bit 188 I 1 PF11
+bit 187 C 0 *
+bit 186 O 1 PF12 187 0 Z
+bit 185 I 1 PF12
+bit 184 C 0 *
+bit 183 O 1 PF13 184 0 Z
+bit 182 I 1 PF13
+bit 181 C 0 *
+bit 180 O 1 PF14 181 0 Z
+bit 179 I 1 PF14
+bit 178 C 0 *
+bit 177 O 1 PF15 178 0 Z
+bit 176 I 1 PF15
+bit 175 C 0 *
+bit 174 O 1 PG0 175 0 Z
+bit 173 I 1 PG0
+bit 172 C 0 *
+bit 171 O 1 PG1 172 0 Z
+bit 170 I 1 PG1
+bit 169 C 0 *
+bit 168 O 1 PG2 169 0 Z
+bit 167 I 1 PG2
+bit 166 C 0 *
+bit 165 O 1 PG3 166 0 Z
+bit 164 I 1 PG3
+bit 163 C 0 *
+bit 162 O 1 PG4 163 0 Z
+bit 161 I 1 PG4
+bit 160 C 0 *
+bit 159 O 1 PG5 160 0 Z
+bit 158 I 1 PG5
+bit 157 C 0 *
+bit 156 O 1 PG6 157 0 Z
+bit 155 I 1 PG6
+bit 154 C 0 *
+bit 153 O 1 PG7 154 0 Z
+bit 152 I 1 PG7
+bit 151 C 0 *
+bit 150 O 1 PG10 151 0 Z
+bit 149 I 1 PG10
+bit 148 C 0 *
+bit 147 O 1 PG11 148 0 Z
+bit 146 I 1 PG11
+bit 145 C 0 *
+bit 144 O 1 PG12 145 0 Z
+bit 143 I 1 PG12
+bit 142 C 0 *
+bit 141 O 1 PG8 142 0 Z
+bit 140 I 1 PG8
+bit 139 C 0 *
+bit 138 O 1 PG9 139 0 Z
+bit 137 I 1 PG9
+bit 136 C 0 *
+bit 135 O 1 PG13 136 0 Z
+bit 134 I 1 PG13
+bit 133 C 0 *
+bit 132 O 1 PG14 133 0 Z
+bit 131 I 1 PG14
+bit 130 C 0 *
+bit 129 O 1 PG15 130 0 Z
+bit 128 I 1 PG15
+bit 127 C 0 *
+bit 126 O 1 PH0 127 0 Z
+bit 125 I 1 PH0
+bit 124 C 0 *
+bit 123 O 1 PH1 124 0 Z
+bit 122 I 1 PH1
+bit 121 C 0 *
+bit 120 O 1 PH2 121 0 Z
+bit 119 I 1 PH2
+bit 118 C 0 *
+bit 117 O 1 PH3 118 0 Z
+bit 116 I 1 PH3
+bit 115 C 0 *
+bit 114 O 1 PH4 115 0 Z
+bit 113 I 1 PH4
+bit 112 C 0 *
+bit 111 O 1 PH5 112 0 Z
+bit 110 I 1 PH5
+bit 109 C 0 *
+bit 108 O 1 PH6 109 0 Z
+bit 107 I 1 PH6
+bit 106 C 0 *
+bit 105 O 1 PH7 106 0 Z
+bit 104 I 1 PH7
+bit 103 C 0 *
+bit 102 O 1 PH8 103 0 Z
+bit 101 I 1 PH8
+bit 100 C 0 *
+bit 99 O 1 PH9 100 0 Z
+bit 98 I 1 PH9
+bit 97 C 0 *
+bit 96 O 1 PH10 97 0 Z
+bit 95 I 1 PH10
+bit 94 C 0 *
+bit 93 O 1 PH11 94 0 Z
+bit 92 I 1 PH11
+bit 91 C 0 *
+bit 90 O 1 PH12 91 0 Z
+bit 89 I 1 PH12
+bit 88 C 0 *
+bit 87 O 1 PH13 88 0 Z
+bit 86 I 1 PH13
+bit 85 C 0 *
+bit 84 O 1 PH14 85 0 Z
+bit 83 I 1 PH14
+bit 82 C 0 *
+bit 81 O 1 PH15 82 0 Z
+bit 80 I 1 PH15
+bit 79 C 0 *
+bit 78 O 1 PJ0 79 0 Z
+bit 77 I 1 PJ0
+bit 76 C 0 *
+bit 75 O 1 PJ1 76 0 Z
+bit 74 I 1 PJ1
+bit 73 C 0 *
+bit 72 O 1 PJ6 73 0 Z
+bit 71 I 1 PJ6
+bit 70 C 0 *
+bit 69 O 1 PJ7 70 0 Z
+bit 68 I 1 PJ7
+bit 67 C 0 *
+bit 66 O 1 PJ8 67 0 Z
+bit 65 I 1 PJ8
+bit 64 C 0 *
+bit 63 O 1 PJ4 64 0 Z
+bit 62 I 1 PJ4
+bit 61 C 0 *
+bit 60 O 1 PJ5 61 0 Z
+bit 59 I 1 PJ5
+bit 58 C 0 *
+bit 57 O 1 PJ9 58 0 Z
+bit 56 I 1 PJ9
+bit 55 C 0 *
+bit 54 O 1 PJ10 55 0 Z
+bit 53 I 1 PJ10
+bit 52 C 0 *
+bit 51 O 1 PJ11 52 0 Z
+bit 50 I 1 PJ11
+bit 49 C 0 *
+bit 48 O 1 PJ2 49 0 Z
+bit 47 I 1 PJ2
+bit 46 C 0 *
+bit 45 O 1 PJ3 46 0 Z
+bit 44 I 1 PJ3
+bit 43 I 1 NMI
+bit 42 I 1 RESET_B
+bit 41 O 1 SCKE 39 0 Z
+bit 40 O 1 SMS_B 39 0 Z
+bit 39 C 0 *
+bit 38 O 1 CLKOUT 39 0 Z
+bit 37 O 1 SRAS_B 39 0 Z
+bit 36 O 1 SCAS_B 39 0 Z
+bit 35 O 1 SWE_B 39 0 Z
+bit 34 O 1 SA10 39 0 Z
+bit 33 I 1 BR_B
+bit 32 I 1 ARDY
+bit 31 O 1 AMS_B0 27 0 Z
+bit 30 O 1 AMS_B1 27 0 Z
+bit 29 O 1 AMS_B2 27 0 Z
+bit 28 O 1 AMS_B3 27 0 Z
+bit 27 C 0 *
+bit 26 O 1 AOE_B 27 0 Z
+bit 25 O 1 ARE_B 27 0 Z
+bit 24 O 1 AWE_B 27 0 Z
+bit 23 O 1 ABE_B0 17 0 Z
+bit 22 O 1 ABE_B1 17 0 Z
+bit 21 O 1 ADDR1 17 0 Z
+bit 20 O 1 ADDR2 17 0 Z
+bit 19 O 1 ADDR3 17 0 Z
+bit 18 O 1 ADDR4 17 0 Z
+bit 17 C 0 *
+bit 16 O 1 ADDR5 17 0 Z
+bit 15 O 1 ADDR6 17 0 Z
+bit 14 O 1 ADDR7 17 0 Z
+bit 13 O 1 ADDR8 17 0 Z
+bit 12 O 1 ADDR9 17 0 Z
+bit 11 O 1 ADDR10 17 0 Z
+bit 10 O 1 ADDR11 17 0 Z
+bit 9 O 1 ADDR12 17 0 Z
+bit 8 O 1 ADDR13 17 0 Z
+bit 7 O 1 ADDR14 17 0 Z
+bit 6 O 1 ADDR15 17 0 Z
+bit 5 O 1 ADDR16 17 0 Z
+bit 4 O 1 ADDR17 17 0 Z
+bit 3 O 1 ADDR18 17 0 Z
+bit 2 O 1 ADDR19 17 0 Z
+bit 1 O 1 BGH_B
+bit 0 O 1 BG_B
--- /dev/null
+#
+# $Id: STEPPINGS 75 2005-11-11 09:12:34Z jiez $
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Richard Klingler <richard@klingler.net>
+#
+
+# bits 31-28 of the Device Identification Register
+0000 bf538 0
+0001 bf538 1
+0010 bf538 2
+0011 bf538 3
+0100 bf538 4
+0101 bf538 5
--- /dev/null
+signal ABE_B0
+signal ABE_B1
+signal ADDR1
+signal ADDR2
+signal ADDR3
+signal ADDR4
+signal ADDR5
+signal ADDR6
+signal ADDR7
+signal ADDR8
+signal ADDR9
+signal ADDR10
+signal ADDR11
+signal ADDR12
+signal ADDR13
+signal ADDR14
+signal ADDR15
+signal ADDR16
+signal ADDR17
+signal ADDR18
+signal ADDR19
+signal AMS_B0
+signal AMS_B1
+signal AMS_B2
+signal AMS_B3
+signal AOE_B
+signal ARDY
+signal ARE_B
+signal AWE_B
+signal BG_B
+signal BGH_B
+signal BMODE0
+signal BMODE1
+signal BR_B
+signal CANRX
+signal CANTX
+signal CLKIN
+signal CLKOUT
+signal DATA0
+signal DATA1
+signal DATA2
+signal DATA3
+signal DATA4
+signal DATA5
+signal DATA6
+signal DATA7
+signal DATA8
+signal DATA9
+signal DATA10
+signal DATA11
+signal DATA12
+signal DATA13
+signal DATA14
+signal DATA15
+signal DR0PRI
+signal DR0SEC
+signal DR1PRI
+signal DR1SEC
+signal DR2PRI
+signal DR2SEC
+signal DR3PRI
+signal DR3SEC
+signal DT0PRI
+signal DT0SEC
+signal DT1PRI
+signal DT1SEC
+signal DT2PRI
+signal DT2SEC
+signal DT3PRI
+signal DT3SEC
+signal EMU_B
+signal FCE_B
+signal FRESET_B
+signal GND0
+signal GND1
+signal GND2
+signal GND3
+signal GND4
+signal GND5
+signal GND6
+signal GND7
+signal GND8
+signal GND9
+signal GND10
+signal GND11
+signal GND12
+signal GND13
+signal GND14
+signal GND15
+signal GND16
+signal GND17
+signal GND18
+signal GND19
+signal GND20
+signal GND21
+signal GND22
+signal GND23
+signal GND24
+signal GND25
+signal GND26
+signal GND27
+signal GND28
+signal GND29
+signal GND30
+signal GND31
+signal GND32
+signal GND33
+signal GND34
+signal GND35
+signal GND36
+signal GND37
+signal GND38
+signal GND39
+signal GND40
+signal GND41
+signal GND42
+signal GND43
+signal GND44
+signal GND45
+signal GND46
+signal GND47
+signal GND48
+signal GND49
+signal GND50
+signal GND51
+signal GND52
+signal GND53
+signal GND54
+signal GND55
+signal GND56
+signal GND57
+signal GND58
+signal GND59
+signal GND60
+signal GND61
+signal GND62
+signal GND63
+signal GND64
+signal GND65
+signal GND66
+signal GND67
+signal GND68
+signal GND69
+signal GND70
+signal GND71
+signal GND72
+signal GND73
+signal GND74
+signal GND75
+signal GND76
+signal GND77
+signal GND78
+signal GND79
+signal GND80
+signal GND81
+signal GND82
+signal GND83
+signal GND84
+signal GND85
+signal GND86
+signal GND87
+signal GND88
+signal GND89
+signal GND90
+signal GND91
+signal GND92
+signal GND93
+signal GND94
+signal GND95
+signal GND96
+signal GND97
+signal GND98
+signal GND99
+signal GND100
+signal GND101
+signal GND102
+signal GND103
+signal GND104
+signal GND105
+signal GND106
+signal GND107
+signal GND108
+signal GND109
+signal GND110
+signal GND111
+signal GND112
+signal GND113
+signal GND114
+signal GND115
+signal GND116
+signal GND117
+signal GND118
+signal GP
+signal GPW_B
+signal MISO0
+signal MISO1
+signal MISO2
+signal MOSI0
+signal MOSI1
+signal MOSI2
+signal PC4
+signal PC6
+signal PC7
+signal PC8
+signal PC5
+signal NC
+signal NMI_B
+signal PC9
+signal PF0
+signal PF1
+signal PF2
+signal PF3
+signal PF4
+signal PF5
+signal PF6
+signal PF7
+signal PF8
+signal PF9
+signal PF10
+signal PF11
+signal PF12
+signal PF13
+signal PF14
+signal PF15
+signal PPI_CLK
+signal PPI0
+signal PPI1
+signal PPI2
+signal PPI3
+signal RESET_B
+signal RFS0
+signal RFS1
+signal RFS2
+signal RFS3
+signal RSCLK0
+signal RSCLK1
+signal RSCLK2
+signal RSCLK3
+signal RTXI
+signal RTXO
+signal RX0
+signal RX1
+signal RX2
+signal SA10
+signal SCAS_B
+signal SCK0
+signal SCK1
+signal SCK2
+signal SCKE
+signal SCL0
+signal SCL1
+signal SDA0
+signal SDA1
+signal SMS_B
+signal SPI1SS_B
+signal SPI1SEL1_B
+signal SPI2SS_B
+signal SPI2SEL1_B
+signal SRAS_B
+signal SWE_B
+signal TCK
+signal TDI
+signal TDO
+signal TFS0
+signal TFS1
+signal TFS2
+signal TFS3
+signal TMR0
+signal TMR1
+signal TMR2
+signal TMS
+signal TRST_B
+signal TSCLK0
+signal TSCLK1
+signal TSCLK2
+signal TSCLK3
+signal TX0
+signal TX1
+signal TX2
+signal VDDEXT0
+signal VDDEXT1
+signal VDDEXT2
+signal VDDEXT3
+signal VDDEXT4
+signal VDDEXT5
+signal VDDEXT6
+signal VDDEXT7
+signal VDDEXT8
+signal VDDEXT9
+signal VDDEXT10
+signal VDDEXT11
+signal VDDEXT12
+signal VDDEXT13
+signal VDDEXT14
+signal VDDEXT15
+signal VDDEXT16
+signal VDDEXT17
+signal VDDEXT18
+signal VDDEXT19
+signal VDDINT0
+signal VDDINT1
+signal VDDINT2
+signal VDDINT3
+signal VDDINT4
+signal VDDINT5
+signal VDDINT6
+signal VDDINT7
+signal VDDINT8
+signal VDDINT9
+signal VDDINT10
+signal VDDINT11
+signal VDDRTC
+signal VROUT0
+signal VROUT1
+
+register BSR 325
+register BR 1
+register DIR 32
+register DBGSTAT 16
+register DBGCTL 16
+register EMUIR 32
+register EMUIR64 64
+register EMUDAT 32
+register EMUDAT40 40
+register EMUPC 32
+
+instruction length 5
+
+instruction BYPASS 11111 BR
+instruction EXTEST 00000 BSR
+instruction SAMPLE/PRELOAD 10000 BSR
+instruction IDCODE 00010 DIR
+instruction DBGSTAT_SCAN 01100 DBGSTAT
+instruction DBGCTL_SCAN 00100 DBGCTL
+instruction EMUIR_SCAN 01000 EMUIR
+instruction EMUIR64_SCAN 01000 EMUIR64
+instruction EMUDAT_SCAN 10100 EMUDAT
+instruction EMUDAT40_SCAN 10100 EMUDAT40
+instruction EMUPC_SCAN 11110 EMUPC
+
+bit 324 C 0 *
+bit 323 O 1 DATA0 324 0 Z
+bit 322 I 1 DATA0
+bit 321 O 1 DATA1 324 0 Z
+bit 320 I 1 DATA1
+bit 319 O 1 DATA2 324 0 Z
+bit 318 I 1 DATA2
+bit 317 C 0 *
+bit 316 O 1 TSCLK2 317 0 Z
+bit 315 I 1 TSCLK2
+bit 314 C 0 *
+bit 313 O 1 DR2SEC 314 0 Z
+bit 312 I 1 DR2SEC
+bit 311 C 0 *
+bit 310 O 1 DR2PRI 311 0 Z
+bit 309 I 1 DR2PRI
+bit 308 O 1 DATA3 324 0 Z
+bit 307 I 1 DATA3
+bit 306 O 1 DATA4 324 0 Z
+bit 305 I 1 DATA4
+bit 304 O 1 DATA5 324 0 Z
+bit 303 I 1 DATA5
+bit 302 O 1 DATA6 324 0 Z
+bit 301 I 1 DATA6
+bit 300 C 0 *
+bit 299 O 1 RFS2 300 0 Z
+bit 298 I 1 RFS2
+bit 297 O 1 DATA7 324 0 Z
+bit 296 I 1 DATA7
+bit 295 O 1 DATA8 324 0 Z
+bit 294 I 1 DATA8
+bit 293 O 1 DATA9 324 0 Z
+bit 292 I 1 DATA9
+bit 291 O 1 DATA10 324 0 Z
+bit 290 I 1 DATA10
+bit 289 O 1 DATA11 324 0 Z
+bit 288 I 1 DATA11
+bit 287 C 0 *
+bit 286 O 1 RSCLK2 287 0 Z
+bit 285 I 1 RSCLK2
+bit 284 C 0 *
+bit 283 O 1 RX2 284 0 Z
+bit 282 I 1 RX2
+bit 281 O 1 DATA12 324 0 Z
+bit 280 I 1 DATA12
+bit 279 O 1 DATA13 324 0 Z
+bit 278 I 1 DATA13
+bit 277 O 1 DATA14 324 0 Z
+bit 276 I 1 DATA14
+bit 275 O 1 DATA15 324 0 Z
+bit 274 I 1 DATA15
+bit 273 I 1 BMODE0
+bit 272 I 1 BMODE1
+bit 271 I 1 RX0
+bit 270 O 1 TX0
+bit 269 C 0 *
+bit 268 O 1 RSCLK1 269 0 Z
+bit 267 I 1 RSCLK1
+bit 266 C 0 *
+bit 265 O 1 TMR0 266 0 Z
+bit 264 I 1 TMR0
+bit 263 C 0 *
+bit 262 O 1 TMR1 263 0 Z
+bit 261 I 1 TMR1
+bit 260 C 0 *
+bit 259 O 1 TMR2 260 0 Z
+bit 258 I 1 TMR2
+bit 257 C 0 *
+bit 256 O 1 RSCLK0 257 0 Z
+bit 255 I 1 RSCLK0
+bit 254 C 0 *
+bit 253 O 1 RFS0 254 0 Z
+bit 252 I 1 RFS0
+bit 251 I 1 DR0PRI
+bit 250 I 1 DR0SEC
+bit 249 C 0 *
+bit 248 O 1 RFS1 249 0 Z
+bit 247 I 1 RFS1
+bit 246 I 1 DR1PRI
+bit 245 I 1 DR1SEC
+bit 244 C 0 *
+bit 243 O 1 TSCLK0 244 0 Z
+bit 242 I 1 TSCLK0
+bit 241 C 0 *
+bit 240 O 1 TFS0 241 0 Z
+bit 239 I 1 TFS0
+bit 238 C 0 *
+bit 237 O 1 DT0PRI 238 0 Z
+bit 236 C 0 *
+bit 235 O 1 DT0SEC 236 0 Z
+bit 234 C 0 *
+bit 233 O 1 PF0 234 0 Z
+bit 232 I 1 PF0
+bit 231 C 0 *
+bit 230 O 1 PF1 231 0 Z
+bit 229 I 1 PF1
+bit 228 C 0 *
+bit 227 O 1 PF2 228 0 Z
+bit 226 I 1 PF2
+bit 225 C 0 *
+bit 224 O 1 PF3 225 0 Z
+bit 223 I 1 PF3
+bit 222 C 0 *
+bit 221 O 1 PF4 222 0 Z
+bit 220 I 1 PF4
+bit 219 C 0 *
+bit 218 O 1 PF5 219 0 Z
+bit 217 I 1 PF5
+bit 216 C 0 *
+bit 215 O 1 TSCLK1 216 0 Z
+bit 214 I 1 TSCLK1
+bit 213 C 0 *
+bit 212 O 1 TFS1 213 0 Z
+bit 211 I 1 TFS1
+bit 210 C 0 *
+bit 209 O 1 DT1PRI 210 0 Z
+bit 208 C 0 *
+bit 207 O 1 PF6 208 0 Z
+bit 206 I 1 PF6
+bit 205 C 0 *
+bit 204 O 1 MOSI0 205 0 Z
+bit 203 I 1 MOSI0
+bit 202 C 0 *
+bit 201 O 1 MISO0 202 0 Z
+bit 200 I 1 MISO0
+bit 199 C 0 *
+bit 198 O 1 DT1SEC 199 0 Z
+bit 197 C 0 *
+bit 196 O 1 SCK0 197 0 Z
+bit 195 I 1 SCK0
+bit 194 C 0 *
+bit 193 O 1 PF7 194 0 Z
+bit 192 I 1 PF7
+bit 191 C 0 *
+bit 190 O 1 PF8 191 0 Z
+bit 189 I 1 PF8
+bit 188 C 0 *
+bit 187 O 1 PF9 188 0 Z
+bit 186 I 1 PF9
+bit 185 C 0 *
+bit 184 O 1 PF10 185 0 Z
+bit 183 I 1 PF10
+bit 182 C 0 *
+bit 181 O 1 PF11 182 0 Z
+bit 180 I 1 PF11
+bit 179 C 0 *
+bit 178 O 1 PF12 179 0 Z
+bit 177 I 1 PF12
+bit 176 C 0 *
+bit 175 O 1 PF13 176 0 Z
+bit 174 I 1 PF13
+bit 173 C 0 *
+bit 172 O 1 PF14 173 0 Z
+bit 171 I 1 PF14
+bit 170 C 0 *
+bit 169 O 1 PF15 170 0 Z
+bit 168 I 1 PF15
+bit 167 C 0 *
+bit 166 O 1 PPI3 167 0 Z
+bit 165 I 1 PPI3
+bit 164 C 0 *
+bit 163 O 1 PPI2 164 0 Z
+bit 162 I 1 PPI2
+bit 161 C 0 *
+bit 160 O 1 PPI1 161 0 Z
+bit 159 I 1 PPI1
+bit 158 C 0 *
+bit 157 O 1 PPI0 158 0 Z
+bit 156 I 1 PPI0
+bit 155 C 0 *
+bit 154 O 1 RX1 155 0 Z
+bit 153 I 1 RX1
+bit 152 C 0 *
+bit 151 O 1 TX1 152 0 Z
+bit 150 I 1 TX1
+bit 149 I 1 PPI_CLK
+bit 148 C 0 *
+bit 147 O 1 SCL0 148 0 Z
+bit 146 I 1 SCL0
+bit 145 C 0 *
+bit 144 O 1 SDA0 145 0 Z
+bit 143 I 1 SDA0
+bit 142 O 0 *
+bit 141 O 0 *
+bit 140 I 1 CANRX
+bit 139 C 0 *
+bit 138 O 1 CANTX 139 0 Z
+bit 137 I 1 CANTX
+bit 136 C 0 *
+bit 135 O 1 SPI2SEL1_B 136 0 Z
+bit 134 I 1 SPI2SEL1_B
+bit 133 C 0 *
+bit 132 O 1 SPI2SS_B 133 0 Z
+bit 131 I 1 SPI2SS_B
+bit 130 C 0 *
+bit 129 O 1 MOSI2 130 0 Z
+bit 128 I 1 MOSI2
+bit 127 C 0 *
+bit 126 O 1 MISO2 127 0 Z
+bit 125 I 1 MISO2
+bit 124 I 1 NMI_B
+bit 123 I 1 RESET_B
+bit 122 C 0 *
+bit 121 O 1 SCK2 122 0 Z
+bit 120 I 1 SCK2
+bit 119 C 0 *
+bit 118 O 1 SPI1SEL1_B 119 0 Z
+bit 117 I 1 SPI1SEL1_B
+bit 116 C 0 *
+bit 115 O 1 SPI1SS_B 116 0 Z
+bit 114 I 1 SPI1SS_B
+bit 113 C 0 *
+bit 112 O 1 MOSI1 113 0 Z
+bit 111 I 1 MOSI1
+bit 110 C 0 *
+bit 109 O 1 MISO1 110 0 Z
+bit 108 I 1 MISO1
+bit 107 C 0 *
+bit 106 O 1 SCK1 107 0 Z
+bit 105 I 1 SCK1
+bit 104 C 0 *
+bit 103 O 1 SCL1 104 0 Z
+bit 102 I 1 SCL1
+bit 101 C 0 *
+bit 100 O 1 SDA1 101 0 Z
+bit 99 I 1 SDA1
+bit 98 C 0 *
+bit 97 O 1 PC9 98 0 Z
+bit 96 I 1 PC9
+bit 95 O 0 *
+bit 94 O 0 *
+bit 93 I 1 GPW_B
+bit 92 O 1 SCKE 84 0 Z
+bit 91 O 1 SMS_B 84 0 Z
+bit 90 C 0 *
+bit 89 O 1 PC6 90 0 Z
+bit 88 I 1 PC6
+bit 87 C 0 *
+bit 86 O 1 PC7 87 0 Z
+bit 85 I 1 PC7
+bit 84 C 0 *
+bit 83 O 1 CLKOUT 84 0 Z
+bit 82 I 1 ARDY
+bit 81 I 1 BR_B
+bit 80 C 0 *
+bit 79 O 1 DT3SEC 80 0 Z
+bit 78 I 1 DT3SEC
+bit 77 C 0 *
+bit 76 O 1 DT3PRI 77 0 Z
+bit 75 I 1 DT3PRI
+bit 74 C 0 *
+bit 73 O 1 TFS3 74 0 Z
+bit 72 I 1 TFS3
+bit 71 O 1 SRAS_B 84 0 Z
+bit 70 O 1 SCAS_B 84 0 Z
+bit 69 O 1 SWE_B 84 0 Z
+bit 68 O 1 SA10 84 0 Z
+bit 67 C 0 *
+bit 66 O 1 PC8 67 0 Z
+bit 65 I 1 PC8
+bit 64 C 0 *
+bit 63 O 1 PC5 64 0 Z
+bit 62 I 1 PC5
+bit 61 O 0 *
+bit 60 O 0 *
+bit 59 I 1 PC4
+bit 58 O 1 AMS_B0 45 0 Z
+bit 57 C 0 *
+bit 56 O 1 TSCLK3 57 0 Z
+bit 55 I 1 TSCLK3
+bit 54 C 0 *
+bit 53 O 1 DR3SEC 54 0 Z
+bit 52 I 1 DR3SEC
+bit 51 C 0 *
+bit 50 O 1 DR3PRI 51 0 Z
+bit 49 I 1 DR3PRI
+bit 48 O 1 AMS_B1 45 0 Z
+bit 47 O 1 AMS_B2 45 0 Z
+bit 46 O 1 AMS_B3 45 0 Z
+bit 45 C 0 *
+bit 44 O 1 AOE_B 45 0 Z
+bit 43 O 1 ARE_B 45 0 Z
+bit 42 O 1 AWE_B 45 0 Z
+bit 41 O 1 ABE_B0 26 0 Z
+bit 40 O 1 ABE_B1 26 0 Z
+bit 39 C 0 *
+bit 38 O 1 RFS3 39 0 Z
+bit 37 I 1 RFS3
+bit 36 C 0 *
+bit 35 O 1 RSCLK3 36 0 Z
+bit 34 I 1 RSCLK3
+bit 33 C 0 *
+bit 32 O 1 TX2 33 0 Z
+bit 31 I 1 TX2
+bit 30 O 1 ADDR1 26 0 Z
+bit 29 O 1 ADDR2 26 0 Z
+bit 28 O 1 ADDR3 26 0 Z
+bit 27 O 1 ADDR4 26 0 Z
+bit 26 C 0 *
+bit 25 O 1 ADDR5 26 0 Z
+bit 24 O 1 ADDR6 26 0 Z
+bit 23 O 1 ADDR7 26 0 Z
+bit 22 O 1 ADDR8 26 0 Z
+bit 21 O 1 ADDR9 26 0 Z
+bit 20 O 1 ADDR10 26 0 Z
+bit 19 O 1 ADDR11 26 0 Z
+bit 18 O 1 ADDR12 26 0 Z
+bit 17 O 1 ADDR13 26 0 Z
+bit 16 O 1 ADDR14 26 0 Z
+bit 15 C 0 *
+bit 14 O 1 DT2SEC 15 0 Z
+bit 13 I 1 DT2SEC
+bit 12 C 0 *
+bit 11 O 1 DT2PRI 12 0 Z
+bit 10 I 1 DT2PRI
+bit 9 O 1 ADDR15 26 0 Z
+bit 8 O 1 ADDR16 26 0 Z
+bit 7 O 1 ADDR17 26 0 Z
+bit 6 O 1 ADDR18 26 0 Z
+bit 5 O 1 ADDR19 26 0 Z
+bit 4 C 0 *
+bit 3 O 1 TFS2 4 0 Z
+bit 2 I 1 TFS2
+bit 1 O 1 BGH_B
+bit 0 O 1 BG_B
--- /dev/null
+#
+# $Id: STEPPINGS 75 2005-11-11 09:12:34Z jiez $
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Richard Klingler <richard@klingler.net>
+#
+
+# bits 31-28 of the Device Identification Register
+0000 bf548 0
+0001 bf548 1
+0010 bf548 2
+0011 bf548 3
--- /dev/null
+signal PORTA_0
+signal PORTA_1
+signal PORTA_2
+signal PORTA_3
+signal PORTA_4
+signal PORTA_5
+signal PORTA_6
+signal PORTA_7
+signal PORTA_8
+signal PORTA_9
+signal PORTA_10
+signal PORTA_11
+signal PORTA_12
+signal PORTA_13
+signal PORTA_14
+signal PORTA_15
+signal PORTB_0
+signal PORTB_1
+signal PORTB_2
+signal PORTB_3
+signal PORTB_4
+signal PORTB_5
+signal PORTB_6
+signal PORTB_7
+signal PORTB_8
+signal PORTB_9
+signal PORTB_10
+signal PORTB_11
+signal PORTB_12
+signal PORTB_13
+signal PORTB_14
+signal PORTC_0
+signal PORTC_1
+signal PORTC_2
+signal PORTC_3
+signal PORTC_4
+signal PORTC_5
+signal PORTC_6
+signal PORTC_7
+signal PORTC_8
+signal PORTC_9
+signal PORTC_10
+signal PORTC_11
+signal PORTC_12
+signal PORTC_13
+signal PORTD_0
+signal PORTD_1
+signal PORTD_2
+signal PORTD_3
+signal PORTD_4
+signal PORTD_5
+signal PORTD_6
+signal PORTD_7
+signal PORTD_8
+signal PORTD_9
+signal PORTD_10
+signal PORTD_11
+signal PORTD_12
+signal PORTD_13
+signal PORTD_14
+signal PORTD_15
+signal PORTE_0
+signal PORTE_1
+signal PORTE_2
+signal PORTE_3
+signal PORTE_4
+signal PORTE_5
+signal PORTE_6
+signal PORTE_7
+signal PORTE_8
+signal PORTE_9
+signal PORTE_10
+signal PORTE_11
+signal PORTE_12
+signal PORTE_13
+signal PORTE_14
+signal PORTE_15
+signal PORTF_0
+signal PORTF_1
+signal PORTF_2
+signal PORTF_3
+signal PORTF_4
+signal PORTF_5
+signal PORTF_6
+signal PORTF_7
+signal PORTF_8
+signal PORTF_9
+signal PORTF_10
+signal PORTF_11
+signal PORTF_12
+signal PORTF_13
+signal PORTF_14
+signal PORTF_15
+signal PORTG_0
+signal PORTG_1
+signal PORTG_2
+signal PORTG_3
+signal PORTG_4
+signal PORTG_5
+signal PORTG_6
+signal PORTG_7
+signal PORTG_8
+signal PORTG_9
+signal PORTG_10
+signal PORTG_11
+signal PORTG_12
+signal PORTG_13
+signal PORTG_14
+signal PORTG_15
+signal PORTH_0
+signal PORTH_1
+signal PORTH_2
+signal PORTH_3
+signal PORTH_4
+signal PORTH_5
+signal PORTH_6
+signal PORTH_7
+signal PORTH_8
+signal PORTH_9
+signal PORTH_10
+signal PORTH_11
+signal PORTH_12
+signal PORTH_13
+signal PORTI_0
+signal PORTI_1
+signal PORTI_2
+signal PORTI_3
+signal PORTI_4
+signal PORTI_5
+signal PORTI_6
+signal PORTI_7
+signal PORTI_8
+signal PORTI_9
+signal PORTI_10
+signal PORTI_11
+signal PORTI_12
+signal PORTI_13
+signal PORTI_14
+signal PORTI_15
+signal PORTJ_0
+signal PORTJ_1
+signal PORTJ_2
+signal PORTJ_3
+signal PORTJ_4
+signal PORTJ_5
+signal PORTJ_6
+signal PORTJ_7
+signal PORTJ_8
+signal PORTJ_9
+signal PORTJ_10
+signal PORTJ_11
+signal PORTJ_12
+signal PORTJ_13
+signal ATAPI_PDIAG
+signal ABE0B
+signal ABE1B
+signal CLKOUT
+signal DQ0
+signal DQ1
+signal DQ2
+signal DQ3
+signal DQ4
+signal DQ5
+signal DQ6
+signal DQ7
+signal DQ8
+signal DQ9
+signal DQ10
+signal DQ11
+signal DQ12
+signal DQ13
+signal DQ14
+signal DQ15
+signal LDM
+signal UDM
+signal LDQS
+signal UDQS
+signal BA0
+signal BA1
+signal A0
+signal A1
+signal A2
+signal A3
+signal A4
+signal A5
+signal A6
+signal A7
+signal A8
+signal A9
+signal A10
+signal A11
+signal A12
+signal WE_B
+signal CAS_B
+signal RAS_B
+signal CS0_B
+signal CS1_B
+signal CKE
+signal CK2_B
+signal CK2
+signal CK1_B
+signal CK1
+signal DATA15
+signal DATA14
+signal DATA13
+signal DATA12
+signal DATA11
+signal DATA10
+signal DATA9
+signal DATA8
+signal DATA7
+signal DATA6
+signal DATA5
+signal DATA4
+signal DATA3
+signal DATA2
+signal DATA1
+signal DATA0
+signal AWEB
+signal AREB
+signal RESETB
+signal NMIB
+signal AOEB
+signal AMS3B
+signal AMS2B
+signal AMS1B
+signal AMS0B
+signal ADDR3
+signal ADDR2
+signal ADDR1
+signal MFS
+signal BMODE0
+signal BMODE1
+signal BMODE2
+signal BMODE3
+signal TCK
+signal TDI
+signal TDO
+signal TMS
+signal TRSTB
+signal EMU_B
+signal IVDD0
+signal IVDD1
+signal IVDD2
+signal IVDD3
+signal IVDD4
+signal IVDD5
+signal IVDD6
+signal IVDD7
+signal IVDD8
+signal IVDD9
+signal IVDD10
+signal IVDD11
+signal IVDD12
+signal IVDD13
+signal IVDD14
+signal EVDD0
+signal EVDD1
+signal EVDD2
+signal EVDD3
+signal EVDD4
+signal EVDD5
+signal EVDD6
+signal EVDD7
+signal EVDD8
+signal EVDD9
+signal EVDD10
+signal EVDD11
+signal EVDD12
+signal EVDD13
+signal EVDD14
+signal EVDD15
+signal EVDD16
+signal EVDD17
+signal EVDD18
+signal EVDD19
+signal EVDD20
+signal EVDD21
+signal EVDD22
+signal EVDD23
+signal EVDD24
+signal EVDD25
+signal EVDD26
+signal EVDD27
+signal EVDD28
+signal EVDD29
+signal EVDD30
+signal EVDD31
+signal DVDD0
+signal DVDD1
+signal DVDD2
+signal DVDD3
+signal DVDD4
+signal DVDD5
+signal DVDD6
+signal DVDD7
+signal DVDD8
+signal DVDD9
+signal DVDD10
+signal GND0
+signal GND1
+signal GND2
+signal GND3
+signal GND4
+signal GND5
+signal GND6
+signal GND7
+signal GND8
+signal GND9
+signal GND10
+signal GND11
+signal GND12
+signal GND13
+signal GND14
+signal GND15
+signal GND16
+signal GND17
+signal GND18
+signal GND19
+signal GND20
+signal GND21
+signal GND22
+signal GND23
+signal GND24
+signal GND25
+signal GND26
+signal GND27
+signal GND28
+signal GND29
+signal GND30
+signal GND31
+signal GND32
+signal GND33
+signal GND34
+signal GND35
+signal GND36
+signal GND37
+signal GND38
+signal GND39
+signal GND40
+signal GND41
+signal GND42
+signal GND43
+signal GND44
+signal GND45
+signal GND46
+signal GND47
+signal GND48
+signal GND49
+signal GND50
+signal GND51
+signal GND52
+signal GND53
+signal GND54
+signal GND55
+signal GND56
+signal GND57
+signal GND58
+signal GND59
+signal GND60
+signal GND61
+signal GND62
+signal GND63
+signal GND64
+signal GND65
+signal GND66
+signal GND67
+signal GND68
+signal GND69
+signal EGND_MC
+signal EGND_MX
+signal EVDD_MC
+signal EVDD_MX
+signal IVDD_MP
+signal IGND_MP
+signal RTCVDD
+signal EXT_WAKE
+signal DDR_VREF
+signal DDR_VSSR
+signal CLKIN
+signal XTAL
+signal RTXI
+signal RTXO
+signal PHYCLK
+signal MLF_M
+signal MLF_P
+signal MXI
+signal MXO
+signal VROUT_A
+signal VROUT_B
+signal USB_DP
+signal USB_DM
+signal USB_ID
+signal USB_RSET
+signal USB_VBUS
+signal USB_VDDA
+signal USB_VDDB
+signal USB_VREF
+signal USB_XI
+
+register BSR 636
+register BR 1
+register DIR 32
+register DBGSTAT 16
+register DBGCTL 16
+register EMUIR 32
+register EMUIR64 64
+register EMUDAT 32
+register EMUDAT40 40
+register EMUPC 32
+
+instruction length 5
+
+instruction EXTEST 00000 BSR
+instruction SAMPLE/PRELOAD 10000 BSR
+instruction IDCODE 00010 DIR
+instruction BYPASS 11111 BR
+instruction DBGSTAT_SCAN 01100 DBGSTAT
+instruction DBGCTL_SCAN 00100 DBGCTL
+instruction EMUIR_SCAN 01000 EMUIR
+instruction EMUIR64_SCAN 01000 EMUIR64
+instruction EMUDAT_SCAN 10100 EMUDAT
+instruction EMUDAT40_SCAN 10100 EMUDAT40
+instruction EMUPC_SCAN 11110 EMUPC
+
+bit 635 C 0 *
+bit 634 O 1 PORTA_10 635 0 Z
+bit 633 I 1 PORTA_10
+bit 632 C 0 *
+bit 631 O 1 PORTA_11 632 0 Z
+bit 630 I 1 PORTA_11
+bit 629 C 0 *
+bit 628 O 1 PORTA_12 629 0 Z
+bit 627 I 1 PORTA_12
+bit 626 C 0 *
+bit 625 O 1 PORTA_13 626 0 Z
+bit 624 I 1 PORTA_13
+bit 623 C 0 *
+bit 622 O 1 PORTA_14 623 0 Z
+bit 621 I 1 PORTA_14
+bit 620 C 0 *
+bit 619 O 1 PORTA_15 620 0 Z
+bit 618 I 1 PORTA_15
+bit 617 C 0 *
+bit 616 O 1 PORTB_12 617 0 Z
+bit 615 I 1 PORTB_12
+bit 614 C 0 *
+bit 613 O 1 PORTB_13 614 0 Z
+bit 612 I 1 PORTB_13
+bit 611 C 0 *
+bit 610 O 1 PORTB_14 611 0 Z
+bit 609 I 1 PORTB_14
+bit 608 C 0 *
+bit 607 O 1 PORTB_8 608 0 Z
+bit 606 I 1 PORTB_8
+bit 605 C 0 *
+bit 604 O 1 PORTB_9 605 0 Z
+bit 603 I 1 PORTB_9
+bit 602 C 0 *
+bit 601 O 1 PORTB_10 602 0 Z
+bit 600 I 1 PORTB_10
+bit 599 C 0 *
+bit 598 O 1 PORTB_11 599 0 Z
+bit 597 I 1 PORTB_11
+bit 596 C 0 *
+bit 595 O 1 PORTB_4 596 0 Z
+bit 594 I 1 PORTB_4
+bit 593 C 0 *
+bit 592 O 1 PORTB_5 593 0 Z
+bit 591 I 1 PORTB_5
+bit 590 C 0 *
+bit 589 O 1 PORTB_6 590 0 Z
+bit 588 I 1 PORTB_6
+bit 587 C 0 *
+bit 586 O 1 PORTB_7 587 0 Z
+bit 585 I 1 PORTB_7
+bit 584 O 1 *
+bit 583 O 1 PORTB_1 583 1 Z
+bit 582 I 1 PORTB_1
+bit 581 O 1 *
+bit 580 O 1 PORTB_0 580 1 Z
+bit 579 I 1 PORTB_0
+bit 578 C 0 *
+bit 577 O 1 PORTB_2 578 0 Z
+bit 576 I 1 PORTB_2
+bit 575 C 0 *
+bit 574 O 1 PORTB_3 575 0 Z
+bit 573 I 1 PORTB_3
+bit 572 O 0 *
+bit 571 I 1 BMODE3
+bit 570 I 1 BMODE2
+bit 569 I 1 BMODE1
+bit 568 I 1 BMODE0
+bit 567 C 0 *
+bit 566 O 1 PORTD_14 567 0 Z
+bit 565 I 1 PORTD_14
+bit 564 C 0 *
+bit 563 O 1 PORTD_15 564 0 Z
+bit 562 I 1 PORTD_15
+bit 561 C 0 *
+bit 560 O 1 PORTD_13 561 0 Z
+bit 559 I 1 PORTD_13
+bit 558 C 0 *
+bit 557 O 1 PORTD_12 558 0 Z
+bit 556 I 1 PORTD_12
+bit 555 C 0 *
+bit 554 O 1 PORTD_11 555 0 Z
+bit 553 I 1 PORTD_11
+bit 552 C 0 *
+bit 551 O 1 PORTD_10 552 0 Z
+bit 550 I 1 PORTD_10
+bit 549 C 0 *
+bit 548 O 1 PORTD_9 549 0 Z
+bit 547 I 1 PORTD_9
+bit 546 C 0 *
+bit 545 O 1 PORTD_8 546 0 Z
+bit 544 I 1 PORTD_8
+bit 543 C 0 *
+bit 542 O 1 PORTD_7 543 0 Z
+bit 541 I 1 PORTD_7
+bit 540 C 0 *
+bit 539 O 1 PORTD_6 540 0 Z
+bit 538 I 1 PORTD_6
+bit 537 C 0 *
+bit 536 O 1 PORTD_5 537 0 Z
+bit 535 I 1 PORTD_5
+bit 534 C 0 *
+bit 533 O 1 PORTD_4 534 0 Z
+bit 532 I 1 PORTD_4
+bit 531 C 0 *
+bit 530 O 1 PORTD_3 531 0 Z
+bit 529 I 1 PORTD_3
+bit 528 C 0 *
+bit 527 O 1 PORTD_2 528 0 Z
+bit 526 I 1 PORTD_2
+bit 525 C 0 *
+bit 524 O 1 PORTD_1 525 0 Z
+bit 523 I 1 PORTD_1
+bit 522 C 0 *
+bit 521 O 1 PORTD_0 522 0 Z
+bit 520 I 1 PORTD_0
+bit 519 C 0 *
+bit 518 O 1 PORTE_13 519 0 Z
+bit 517 I 1 PORTE_13
+bit 516 C 0 *
+bit 515 O 1 PORTE_12 516 0 Z
+bit 514 I 1 PORTE_12
+bit 513 C 0 *
+bit 512 O 1 PORTE_11 513 0 Z
+bit 511 I 1 PORTE_11
+bit 510 C 0 *
+bit 509 O 1 PORTG_4 510 0 Z
+bit 508 I 1 PORTG_4
+bit 507 C 0 *
+bit 506 O 1 PORTG_3 507 0 Z
+bit 505 I 1 PORTG_3
+bit 504 C 0 *
+bit 503 O 1 PORTF_15 504 0 Z
+bit 502 I 1 PORTF_15
+bit 501 C 0 *
+bit 500 O 1 PORTF_14 501 0 Z
+bit 499 I 1 PORTF_14
+bit 498 C 0 *
+bit 497 O 1 PORTF_13 498 0 Z
+bit 496 I 1 PORTF_13
+bit 495 C 0 *
+bit 494 O 1 PORTF_12 495 0 Z
+bit 493 I 1 PORTF_12
+bit 492 C 0 *
+bit 491 O 1 PORTF_11 492 0 Z
+bit 490 I 1 PORTF_11
+bit 489 C 0 *
+bit 488 O 1 PORTF_10 489 0 Z
+bit 487 I 1 PORTF_10
+bit 486 C 0 *
+bit 485 O 1 PORTF_9 486 0 Z
+bit 484 I 1 PORTF_9
+bit 483 C 0 *
+bit 482 O 1 PORTF_8 483 0 Z
+bit 481 I 1 PORTF_8
+bit 480 C 0 *
+bit 479 O 1 PORTF_7 480 0 Z
+bit 478 I 1 PORTF_7
+bit 477 C 0 *
+bit 476 O 1 PORTF_6 477 0 Z
+bit 475 I 1 PORTF_6
+bit 474 C 0 *
+bit 473 O 1 PORTF_5 474 0 Z
+bit 472 I 1 PORTF_5
+bit 471 C 0 *
+bit 470 O 1 PORTF_4 471 0 Z
+bit 469 I 1 PORTF_4
+bit 468 C 0 *
+bit 467 O 1 PORTF_3 468 0 Z
+bit 466 I 1 PORTF_3
+bit 465 C 0 *
+bit 464 O 1 PORTF_2 465 0 Z
+bit 463 I 1 PORTF_2
+bit 462 C 0 *
+bit 461 O 1 PORTF_1 462 0 Z
+bit 460 I 1 PORTF_1
+bit 459 C 0 *
+bit 458 O 1 PORTF_0 459 0 Z
+bit 457 I 1 PORTF_0
+bit 456 C 0 *
+bit 455 O 1 PORTG_2 456 0 Z
+bit 454 I 1 PORTG_2
+bit 453 C 0 *
+bit 452 O 1 PORTG_1 453 0 Z
+bit 451 I 1 PORTG_1
+bit 450 C 0 *
+bit 449 O 1 PORTG_0 450 0 Z
+bit 448 I 1 PORTG_0
+bit 447 C 0 *
+bit 446 O 1 PORTC_3 447 0 Z
+bit 445 I 1 PORTC_3
+bit 444 C 0 *
+bit 443 O 1 PORTC_2 444 0 Z
+bit 442 I 1 PORTC_2
+bit 441 C 0 *
+bit 440 O 1 PORTC_1 441 0 Z
+bit 439 I 1 PORTC_1
+bit 438 C 0 *
+bit 437 O 1 PORTC_0 438 0 Z
+bit 436 I 1 PORTC_0
+bit 435 C 0 *
+bit 434 O 1 PORTC_7 435 0 Z
+bit 433 I 1 PORTC_7
+bit 432 C 0 *
+bit 431 O 1 PORTC_6 432 0 Z
+bit 430 I 1 PORTC_6
+bit 429 C 0 *
+bit 428 O 1 PORTC_5 429 0 Z
+bit 427 I 1 PORTC_5
+bit 426 C 0 *
+bit 425 O 1 PORTC_4 426 0 Z
+bit 424 I 1 PORTC_4
+bit 423 C 0 *
+bit 422 O 1 PORTH_7 423 0 Z
+bit 421 I 1 PORTH_7
+bit 420 C 0 *
+bit 419 O 1 PORTH_5 420 0 Z
+bit 418 I 1 PORTH_5
+bit 417 C 0 *
+bit 416 O 1 MFS 417 0 Z
+bit 415 I 1 MFS
+bit 414 C 0 *
+bit 413 O 1 PORTH_6 414 0 Z
+bit 412 I 1 PORTH_6
+bit 411 C 0 *
+bit 410 O 1 ADDR1 411 0 Z
+bit 409 I 1 ADDR1
+bit 408 C 0 *
+bit 407 O 1 ADDR2 408 0 Z
+bit 406 I 1 ADDR2
+bit 405 C 0 *
+bit 404 O 1 ADDR3 405 0 Z
+bit 403 I 1 ADDR3
+bit 402 C 0 *
+bit 401 O 1 PORTH_8 402 0 Z
+bit 400 I 1 PORTH_8
+bit 399 C 0 *
+bit 398 O 1 PORTH_9 399 0 Z
+bit 397 I 1 PORTH_9
+bit 396 C 0 *
+bit 395 O 1 PORTH_10 396 0 Z
+bit 394 I 1 PORTH_10
+bit 393 C 0 *
+bit 392 O 1 PORTH_11 393 0 Z
+bit 391 I 1 PORTH_11
+bit 390 C 0 *
+bit 389 O 1 PORTH_12 390 0 Z
+bit 388 I 1 PORTH_12
+bit 387 C 0 *
+bit 386 O 1 PORTH_13 387 0 Z
+bit 385 I 1 PORTH_13
+bit 384 C 0 *
+bit 383 O 1 PORTI_0 384 0 Z
+bit 382 I 1 PORTI_0
+bit 381 C 0 *
+bit 380 O 1 PORTI_1 381 0 Z
+bit 379 I 1 PORTI_1
+bit 378 C 0 *
+bit 377 O 1 PORTI_2 378 0 Z
+bit 376 I 1 PORTI_2
+bit 375 C 0 *
+bit 374 O 1 PORTI_3 375 0 Z
+bit 373 I 1 PORTI_3
+bit 372 C 0 *
+bit 371 O 1 PORTI_4 372 0 Z
+bit 370 I 1 PORTI_4
+bit 369 C 0 *
+bit 368 O 1 PORTI_5 369 0 Z
+bit 367 I 1 PORTI_5
+bit 366 C 0 *
+bit 365 O 1 PORTI_6 366 0 Z
+bit 364 I 1 PORTI_6
+bit 363 C 0 *
+bit 362 O 1 PORTI_7 363 0 Z
+bit 361 I 1 PORTI_7
+bit 360 C 0 *
+bit 359 O 1 PORTI_8 360 0 Z
+bit 358 I 1 PORTI_8
+bit 357 C 0 *
+bit 356 O 1 PORTI_9 357 0 Z
+bit 355 I 1 PORTI_9
+bit 354 C 0 *
+bit 353 O 1 PORTI_10 354 0 Z
+bit 352 I 1 PORTI_10
+bit 351 C 0 *
+bit 350 O 1 PORTI_11 351 0 Z
+bit 349 I 1 PORTI_11
+bit 348 C 0 *
+bit 347 O 1 PORTI_12 348 0 Z
+bit 346 I 1 PORTI_12
+bit 345 C 0 *
+bit 344 O 1 PORTI_13 345 0 Z
+bit 343 I 1 PORTI_13
+bit 342 C 0 *
+bit 341 O 1 PORTI_14 342 0 Z
+bit 340 I 1 PORTI_14
+bit 339 C 0 *
+bit 338 O 1 PORTI_15 339 0 Z
+bit 337 I 1 PORTI_15
+bit 336 C 0 *
+bit 335 O 1 AMS0B 336 0 Z
+bit 334 I 1 AMS0B
+bit 333 C 0 *
+bit 332 O 1 AMS1B 333 0 Z
+bit 331 I 1 AMS1B
+bit 330 C 0 *
+bit 329 O 1 AMS2B 330 0 Z
+bit 328 I 1 AMS2B
+bit 327 C 0 *
+bit 326 O 1 AMS3B 327 0 Z
+bit 325 I 1 AMS3B
+bit 324 C 0 *
+bit 323 O 1 AOEB 324 0 Z
+bit 322 I 1 AOEB
+bit 321 I 1 NMIB
+bit 320 I 1 RESETB
+bit 319 C 0 *
+bit 318 O 1 AREB 319 0 Z
+bit 317 I 1 AREB
+bit 316 C 0 *
+bit 315 O 1 AWEB 316 0 Z
+bit 314 I 1 AWEB
+bit 313 C 0 *
+bit 312 O 1 DATA0 313 0 Z
+bit 311 I 1 DATA0
+bit 310 C 0 *
+bit 309 O 1 DATA1 310 0 Z
+bit 308 I 1 DATA1
+bit 307 C 0 *
+bit 306 O 1 DATA2 307 0 Z
+bit 305 I 1 DATA2
+bit 304 C 0 *
+bit 303 O 1 DATA3 304 0 Z
+bit 302 I 1 DATA3
+bit 301 C 0 *
+bit 300 O 1 DATA4 301 0 Z
+bit 299 I 1 DATA4
+bit 298 C 0 *
+bit 297 O 1 DATA5 298 0 Z
+bit 296 I 1 DATA5
+bit 295 C 0 *
+bit 294 O 1 DATA6 295 0 Z
+bit 293 I 1 DATA6
+bit 292 C 0 *
+bit 291 O 1 DATA7 292 0 Z
+bit 290 I 1 DATA7
+bit 289 C 0 *
+bit 288 O 1 DATA8 289 0 Z
+bit 287 I 1 DATA8
+bit 286 C 0 *
+bit 285 O 1 DATA9 286 0 Z
+bit 284 I 1 DATA9
+bit 283 C 0 *
+bit 282 O 1 DATA10 283 0 Z
+bit 281 I 1 DATA10
+bit 280 C 0 *
+bit 279 O 1 DATA11 280 0 Z
+bit 278 I 1 DATA11
+bit 277 C 0 *
+bit 276 O 1 DATA12 277 0 Z
+bit 275 I 1 DATA12
+bit 274 C 0 *
+bit 273 O 1 DATA13 274 0 Z
+bit 272 I 1 DATA13
+bit 271 C 0 *
+bit 270 O 1 DATA14 271 0 Z
+bit 269 I 1 DATA14
+bit 268 C 0 *
+bit 267 O 1 DATA15 268 0 Z
+bit 266 I 1 DATA15
+bit 265 C 0 *
+bit 264 O 1 ABE1B 265 0 Z
+bit 263 I 1 ABE1B
+bit 262 C 0 *
+bit 261 O 1 ABE0B 262 0 Z
+bit 260 I 1 ABE0B
+bit 259 O 1 CK1
+bit 258 O 1 CK1_B
+bit 257 O 1 CK2
+bit 256 O 1 CK2_B
+bit 255 O 1 CKE
+bit 254 O 1 CS1_B
+bit 253 O 1 CS0_B
+bit 252 O 1 RAS_B
+bit 251 O 1 CAS_B
+bit 250 O 1 WE_B
+bit 249 O 1 A12
+bit 248 O 1 A11
+bit 247 O 1 A10
+bit 246 O 1 A9
+bit 245 O 1 A8
+bit 244 O 1 A7
+bit 243 O 1 A6
+bit 242 O 1 A5
+bit 241 O 1 A4
+bit 240 O 1 A3
+bit 239 O 1 A2
+bit 238 O 1 A1
+bit 237 O 1 A0
+bit 236 O 1 BA1
+bit 235 O 1 BA0
+bit 234 C 0 *
+bit 233 O 1 UDQS 234 0 Z
+bit 232 I 1 UDQS
+bit 231 C 0 *
+bit 230 O 1 LDQS 231 0 Z
+bit 229 I 1 LDQS
+bit 228 O 1 UDM
+bit 227 O 1 LDM
+bit 226 C 0 *
+bit 225 O 1 DQ15 226 0 Z
+bit 224 I 1 DQ15
+bit 223 C 0 *
+bit 222 O 1 DQ14 223 0 Z
+bit 221 I 1 DQ14
+bit 220 C 0 *
+bit 219 O 1 DQ13 220 0 Z
+bit 218 I 1 DQ13
+bit 217 C 0 *
+bit 216 O 1 DQ12 217 0 Z
+bit 215 I 1 DQ12
+bit 214 C 0 *
+bit 213 O 1 DQ11 214 0 Z
+bit 212 I 1 DQ11
+bit 211 C 0 *
+bit 210 O 1 DQ10 211 0 Z
+bit 209 I 1 DQ10
+bit 208 C 0 *
+bit 207 O 1 DQ9 208 0 Z
+bit 206 I 1 DQ9
+bit 205 C 0 *
+bit 204 O 1 DQ8 205 0 Z
+bit 203 I 1 DQ8
+bit 202 C 0 *
+bit 201 O 1 DQ7 202 0 Z
+bit 200 I 1 DQ7
+bit 199 C 0 *
+bit 198 O 1 DQ6 199 0 Z
+bit 197 I 1 DQ6
+bit 196 C 0 *
+bit 195 O 1 DQ5 196 0 Z
+bit 194 I 1 DQ5
+bit 193 C 0 *
+bit 192 O 1 DQ4 193 0 Z
+bit 191 I 1 DQ4
+bit 190 C 0 *
+bit 189 O 1 DQ3 190 0 Z
+bit 188 I 1 DQ3
+bit 187 C 0 *
+bit 186 O 1 DQ2 187 0 Z
+bit 185 I 1 DQ2
+bit 184 C 0 *
+bit 183 O 1 DQ1 184 0 Z
+bit 182 I 1 DQ1
+bit 181 C 0 *
+bit 180 O 1 DQ0 181 0 Z
+bit 179 I 1 DQ0
+bit 178 O 1 CLKOUT
+bit 177 C 0 *
+bit 176 O 1 PORTJ_11 177 0 Z
+bit 175 I 1 PORTJ_11
+bit 174 C 0 *
+bit 173 O 1 PORTJ_12 174 0 Z
+bit 172 I 1 PORTJ_12
+bit 171 C 0 *
+bit 170 O 1 PORTJ_13 171 0 Z
+bit 169 I 1 PORTJ_13
+bit 168 C 0 *
+bit 167 O 1 PORTJ_0 168 0 Z
+bit 166 I 1 PORTJ_0
+bit 165 C 0 *
+bit 164 O 1 PORTJ_1 165 0 Z
+bit 163 I 1 PORTJ_1
+bit 162 C 0 *
+bit 161 O 1 PORTJ_2 162 0 Z
+bit 160 I 1 PORTJ_2
+bit 159 C 0 *
+bit 158 O 1 PORTJ_3 159 0 Z
+bit 157 I 1 PORTJ_3
+bit 156 C 0 *
+bit 155 O 1 PORTJ_4 156 0 Z
+bit 154 I 1 PORTJ_4
+bit 153 I 1 ATAPI_PDIAG
+bit 152 C 0 *
+bit 151 O 1 PORTJ_5 152 0 Z
+bit 150 I 1 PORTJ_5
+bit 149 C 0 *
+bit 148 O 1 PORTJ_6 149 0 Z
+bit 147 I 1 PORTJ_6
+bit 146 C 0 *
+bit 145 O 1 PORTJ_7 146 0 Z
+bit 144 I 1 PORTJ_7
+bit 143 C 0 *
+bit 142 O 1 PORTJ_8 143 0 Z
+bit 141 I 1 PORTJ_8
+bit 140 C 0 *
+bit 139 O 1 PORTJ_9 140 0 Z
+bit 138 I 1 PORTJ_9
+bit 137 C 0 *
+bit 136 O 1 PORTJ_10 137 0 Z
+bit 135 I 1 PORTJ_10
+bit 134 C 0 *
+bit 133 O 1 PORTG_13 134 0 Z
+bit 132 I 1 PORTG_13
+bit 131 C 0 *
+bit 130 O 1 PORTG_12 131 0 Z
+bit 129 I 1 PORTG_12
+bit 128 C 0 *
+bit 127 O 1 PORTE_7 128 0 Z
+bit 126 I 1 PORTE_7
+bit 125 C 0 *
+bit 124 O 1 PORTE_8 125 0 Z
+bit 123 I 1 PORTE_8
+bit 122 C 0 *
+bit 121 O 1 PORTE_9 122 0 Z
+bit 120 I 1 PORTE_9
+bit 119 C 0 *
+bit 118 O 1 PORTE_10 119 0 Z
+bit 117 I 1 PORTE_10
+bit 116 C 0 *
+bit 115 O 1 PORTE_0 116 0 Z
+bit 114 I 1 PORTE_0
+bit 113 C 0 *
+bit 112 O 1 PORTE_1 113 0 Z
+bit 111 I 1 PORTE_1
+bit 110 C 0 *
+bit 109 O 1 PORTE_2 110 0 Z
+bit 108 I 1 PORTE_2
+bit 107 C 0 *
+bit 106 O 1 PORTE_4 107 0 Z
+bit 105 I 1 PORTE_4
+bit 104 C 0 *
+bit 103 O 1 PORTE_5 104 0 Z
+bit 102 I 1 PORTE_5
+bit 101 C 0 *
+bit 100 O 1 PORTE_6 101 0 Z
+bit 99 I 1 PORTE_6
+bit 98 C 0 *
+bit 97 O 1 PORTH_4 98 0 Z
+bit 96 I 1 PORTH_4
+bit 95 C 0 *
+bit 94 O 1 PORTH_3 95 0 Z
+bit 93 I 1 PORTH_3
+bit 92 C 0 *
+bit 91 O 1 PORTH_2 92 0 Z
+bit 90 I 1 PORTH_2
+bit 89 C 0 *
+bit 88 O 1 PORTH_0 89 0 Z
+bit 87 I 1 PORTH_0
+bit 86 O 1 *
+bit 85 O 1 PORTE_15 85 1 Z
+bit 84 I 1 PORTE_15
+bit 83 O 1 *
+bit 82 O 1 PORTE_14 82 1 Z
+bit 81 I 1 PORTE_14
+bit 80 C 0 *
+bit 79 O 1 PORTG_8 80 0 Z
+bit 78 I 1 PORTG_8
+bit 77 C 0 *
+bit 76 O 1 PORTG_9 77 0 Z
+bit 75 I 1 PORTG_9
+bit 74 C 0 *
+bit 73 O 1 PORTG_10 74 0 Z
+bit 72 I 1 PORTG_10
+bit 71 C 0 *
+bit 70 O 1 PORTG_11 71 0 Z
+bit 69 I 1 PORTG_11
+bit 68 C 0 *
+bit 67 O 1 PORTG_5 68 0 Z
+bit 66 I 1 PORTG_5
+bit 65 C 0 *
+bit 64 O 1 PORTG_6 65 0 Z
+bit 63 I 1 PORTG_6
+bit 62 C 0 *
+bit 61 O 1 PORTG_7 62 0 Z
+bit 60 I 1 PORTG_7
+bit 59 C 0 *
+bit 58 O 1 PORTE_3 59 0 Z
+bit 57 I 1 PORTE_3
+bit 56 C 0 *
+bit 55 O 1 PORTH_1 56 0 Z
+bit 54 I 1 PORTH_1
+bit 53 C 0 *
+bit 52 O 1 PORTC_13 53 0 Z
+bit 51 I 1 PORTC_13
+bit 50 C 0 *
+bit 49 O 1 PORTC_12 50 0 Z
+bit 48 I 1 PORTC_12
+bit 47 C 0 *
+bit 46 O 1 PORTC_11 47 0 Z
+bit 45 I 1 PORTC_11
+bit 44 C 0 *
+bit 43 O 1 PORTC_10 44 0 Z
+bit 42 I 1 PORTC_10
+bit 41 C 0 *
+bit 40 O 1 PORTC_9 41 0 Z
+bit 39 I 1 PORTC_9
+bit 38 C 0 *
+bit 37 O 1 PORTC_8 38 0 Z
+bit 36 I 1 PORTC_8
+bit 35 C 0 *
+bit 34 O 1 PORTG_15 35 0 Z
+bit 33 I 1 PORTG_15
+bit 32 C 0 *
+bit 31 O 1 PORTG_14 32 0 Z
+bit 30 I 1 PORTG_14
+bit 29 C 0 *
+bit 28 O 1 PORTA_0 29 0 Z
+bit 27 I 1 PORTA_0
+bit 26 C 0 *
+bit 25 O 1 PORTA_1 26 0 Z
+bit 24 I 1 PORTA_1
+bit 23 C 0 *
+bit 22 O 1 PORTA_2 23 0 Z
+bit 21 I 1 PORTA_2
+bit 20 C 0 *
+bit 19 O 1 PORTA_3 20 0 Z
+bit 18 I 1 PORTA_3
+bit 17 C 0 *
+bit 16 O 1 PORTA_4 17 0 Z
+bit 15 I 1 PORTA_4
+bit 14 C 0 *
+bit 13 O 1 PORTA_5 14 0 Z
+bit 12 I 1 PORTA_5
+bit 11 C 0 *
+bit 10 O 1 PORTA_6 11 0 Z
+bit 9 I 1 PORTA_6
+bit 8 C 0 *
+bit 7 O 1 PORTA_7 8 0 Z
+bit 6 I 1 PORTA_7
+bit 5 C 0 *
+bit 4 O 1 PORTA_8 5 0 Z
+bit 3 I 1 PORTA_8
+bit 2 C 0 *
+bit 1 O 1 PORTA_9 2 0 Z
+bit 0 I 1 PORTA_9
--- /dev/null
+#
+# $Id: STEPPINGS 82 2006-11-06 04:22:52Z jiez $
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Richard Klingler <richard@klingler.net>
+#
+
+# bits 31-28 of the Device Identification Register
+0010 bf561 2
+0011 bf561 3
+0101 bf561 5
--- /dev/null
+signal ADDR2
+signal ADDR3
+signal ADDR4
+signal ADDR5
+signal ADDR6
+signal ADDR7
+signal ADDR8
+signal ADDR9
+signal ADDR10
+signal ADDR11
+signal ADDR12
+signal ADDR13
+signal ADDR14
+signal ADDR15
+signal ADDR16
+signal ADDR17
+signal ADDR18
+signal ADDR19
+signal ADDR20
+signal ADDR21
+signal ADDR22
+signal ADDR23
+signal ADDR24
+signal ADDR25
+signal DATA0
+signal DATA1
+signal DATA2
+signal DATA3
+signal DATA4
+signal DATA5
+signal DATA6
+signal DATA7
+signal DATA8
+signal DATA9
+signal DATA10
+signal DATA11
+signal DATA12
+signal DATA13
+signal DATA14
+signal DATA15
+signal DATA16
+signal DATA17
+signal DATA18
+signal DATA19
+signal DATA20
+signal DATA21
+signal DATA22
+signal DATA23
+signal DATA24
+signal DATA25
+signal DATA26
+signal DATA27
+signal DATA28
+signal DATA29
+signal DATA30
+signal DATA31
+signal AMS_B0
+signal AMS_B1
+signal AMS_B2
+signal AMS_B3
+signal AOE_B
+signal ARDY
+signal ARE_B
+signal AWE_B
+signal ABE_B0
+signal ABE_B1
+signal ABE_B2
+signal ABE_B3
+signal BG_B
+signal BGH_B
+signal BMODE0
+signal BMODE1
+signal BR_B
+signal BY_PASS
+signal PPI1_DATA0
+signal PPI1_DATA1
+signal PPI1_DATA2
+signal PPI1_DATA3
+signal PPI1_DATA4
+signal PPI1_DATA5
+signal PPI1_DATA6
+signal PPI1_DATA7
+signal PPI1_DATA8
+signal PPI1_DATA9
+signal PPI1_DATA10
+signal PPI1_DATA11
+signal PPI1_DATA12
+signal PPI1_DATA13
+signal PPI1_DATA14
+signal PPI1_DATA15
+signal PPI2_DATA0
+signal PPI2_DATA1
+signal PPI2_DATA2
+signal PPI2_DATA3
+signal PPI2_DATA4
+signal PPI2_DATA5
+signal PPI2_DATA6
+signal PPI2_DATA7
+signal PPI2_DATA8
+signal PPI2_DATA9
+signal PPI2_DATA10
+signal PPI2_DATA11
+signal PPI2_DATA12
+signal PPI2_DATA13
+signal PPI2_DATA14
+signal PPI2_DATA15
+signal DR0PRI
+signal DR0SEC
+signal DR1PRI
+signal DR1SEC
+signal DT0PRI
+signal DT0SEC
+signal DT1PRI
+signal DT1SEC
+signal MISO
+signal MOSI
+signal NMI_0
+signal NMI_1
+signal PF0
+signal PF1
+signal PF2
+signal PF3
+signal PF4
+signal PF5
+signal PF6
+signal PF7
+signal PF8
+signal PF9
+signal PF10
+signal PF11
+signal PF12
+signal PF13
+signal PF14
+signal PF15
+signal RESET_B
+signal RFS0
+signal RFS1
+signal RSCLK0
+signal RSCLK1
+signal TSCLK0
+signal TSCLK1
+signal RX
+signal TX
+signal SA10
+signal SCAS_B
+signal SCK
+signal SCKE
+signal SLEEP
+signal SMS_B0
+signal SMS_B1
+signal SMS_B2
+signal SMS_B3
+signal SRAS_B
+signal SWE_B
+signal SCLK0
+signal SCLK1
+signal TCK
+signal TDI
+signal TDO
+signal TMS
+signal TRST_B
+signal EMU_B
+signal TEST
+signal TFS0
+signal TFS1
+signal PPI1_CLK
+signal PPI2_CLK
+signal PPI1_SYNC1
+signal PPI1_SYNC2
+signal PPI1_SYNC3
+signal PPI2_SYNC1
+signal PPI2_SYNC2
+signal PPI2_SYNC3
+signal VDD_INT0
+signal VDD_INT1
+signal VDD_INT2
+signal VDD_INT3
+signal VDD_INT4
+signal VDD_INT5
+signal VDD_INT6
+signal VDD_INT7
+signal VDD_INT8
+signal GND_INT0
+signal GND_INT1
+signal GND_INT2
+signal GND_INT3
+signal GND_INT4
+signal GND_INT5
+signal GND_INT6
+signal VDD_EXT0
+signal VDD_EXT1
+signal VDD_EXT2
+signal VDD_EXT3
+signal VDD_EXT4
+signal VDD_EXT5
+signal VDD_EXT6
+signal VDD_EXT7
+signal VDD_EXT8
+signal VDD_EXT9
+signal VDD_EXT10
+signal VDD_EXT11
+signal VDD_EXT12
+signal VDD_EXT13
+signal VDD_EXT14
+signal VDD_EXT15
+signal VDD_EXT16
+signal VDD_EXT17
+signal VDD_EXT18
+signal CLKIN
+signal XTAL
+signal VREF_FLT
+signal VREG
+signal PSMON_VDD
+signal PSMON_GND
+signal GND_EXT0
+signal GND_EXT1
+signal GND_EXT2
+signal GND_EXT3
+signal GND_EXT4
+signal GND_EXT5
+signal GND_EXT6
+signal GND_EXT7
+signal GND_EXT8
+signal GND_EXT9
+signal GND_EXT10
+signal GND_EXT11
+signal GND_EXT12
+signal GND_EXT13
+signal GND_EXT14
+signal GND_EXT15
+signal GND_EXT16
+signal GND_EXT17
+signal GND_EXT18
+
+register BSR 355
+register BR 1
+register DIR 32
+register DBGSTAT 16
+register DBGCTL 16
+register EMUIR 32
+register EMUIR64 64
+register EMUDAT 32
+register EMUDAT40 40
+register EMUPC 32
+
+instruction length 5
+
+instruction BYPASS 11111 BR
+instruction EXTEST 00000 BSR
+instruction SAMPLE/PRELOAD 10000 BSR
+instruction IDCODE 00010 DIR
+instruction DBGSTAT_SCAN 01100 DBGSTAT
+instruction DBGCTL_SCAN 00100 DBGCTL
+instruction EMUIR_SCAN 01000 EMUIR
+instruction EMUIR64_SCAN 01000 EMUIR64
+instruction EMUDAT_SCAN 10100 EMUDAT
+instruction EMUDAT40_SCAN 10100 EMUDAT40
+instruction EMUPC_SCAN 11110 EMUPC
+
+bit 354 I 1 TEST
+bit 353 I 1 BMODE1
+bit 352 I 1 BMODE0
+bit 351 O 1 SLEEP
+bit 350 I 1 NMI_0
+bit 349 C 0 *
+bit 348 O 1 MISO 349 0 Z
+bit 347 I 1 MISO
+bit 346 C 0 *
+bit 345 O 1 MOSI 346 0 Z
+bit 344 I 1 MOSI
+bit 343 C 0 *
+bit 342 O 1 SCK 343 0 Z
+bit 341 I 1 SCK
+bit 340 C 0 *
+bit 339 O 1 RX 340 0 Z
+bit 338 I 1 RX
+bit 337 C 0 *
+bit 336 O 1 TX 337 0 Z
+bit 335 I 1 TX
+bit 334 C 0 *
+bit 333 O 1 RSCLK1 334 0 Z
+bit 332 I 1 RSCLK1
+bit 331 C 0 *
+bit 330 O 1 RFS1 331 0 Z
+bit 329 I 1 RFS1
+bit 328 C 0 *
+bit 327 O 1 DR1SEC 328 0 Z
+bit 326 I 1 DR1SEC
+bit 325 C 0 *
+bit 324 O 1 DR1PRI 325 0 Z
+bit 323 I 1 DR1PRI
+bit 322 C 0 *
+bit 321 O 1 TSCLK1 322 0 Z
+bit 320 I 1 TSCLK1
+bit 319 C 0 *
+bit 318 O 1 TFS1 319 0 Z
+bit 317 I 1 TFS1
+bit 316 C 0 *
+bit 315 O 1 DT1SEC 316 0 Z
+bit 314 I 1 DT1SEC
+bit 313 C 0 *
+bit 312 O 1 DT1PRI 313 0 Z
+bit 311 I 1 DT1PRI
+bit 310 C 0 *
+bit 309 O 1 RSCLK0 310 0 Z
+bit 308 I 1 RSCLK0
+bit 307 C 0 *
+bit 306 O 1 RFS0 307 0 Z
+bit 305 I 1 RFS0
+bit 304 C 0 *
+bit 303 O 1 DR0SEC 304 0 Z
+bit 302 I 1 DR0SEC
+bit 301 C 0 *
+bit 300 O 1 DR0PRI 301 0 Z
+bit 299 I 1 DR0PRI
+bit 298 C 0 *
+bit 297 O 1 TSCLK0 298 0 Z
+bit 296 I 1 TSCLK0
+bit 295 C 0 *
+bit 294 O 1 TFS0 295 0 Z
+bit 293 I 1 TFS0
+bit 292 C 0 *
+bit 291 O 1 DT0SEC 292 0 Z
+bit 290 I 1 DT0SEC
+bit 289 C 0 *
+bit 288 O 1 DT0PRI 289 0 Z
+bit 287 I 1 DT0PRI
+bit 286 O 1 DATA31 254 0 Z
+bit 285 I 1 DATA31
+bit 284 O 1 DATA30 254 0 Z
+bit 283 I 1 DATA30
+bit 282 O 1 DATA29 254 0 Z
+bit 281 I 1 DATA29
+bit 280 O 1 DATA28 254 0 Z
+bit 279 I 1 DATA28
+bit 278 O 1 DATA27 254 0 Z
+bit 277 I 1 DATA27
+bit 276 O 1 DATA26 254 0 Z
+bit 275 I 1 DATA26
+bit 274 O 1 DATA25 254 0 Z
+bit 273 I 1 DATA25
+bit 272 O 1 DATA24 254 0 Z
+bit 271 I 1 DATA24
+bit 270 O 1 DATA23 254 0 Z
+bit 269 I 1 DATA23
+bit 268 O 1 DATA22 254 0 Z
+bit 267 I 1 DATA22
+bit 266 O 1 DATA21 254 0 Z
+bit 265 I 1 DATA21
+bit 264 O 1 DATA20 254 0 Z
+bit 263 I 1 DATA20
+bit 262 O 1 DATA19 254 0 Z
+bit 261 I 1 DATA19
+bit 260 O 1 DATA18 254 0 Z
+bit 259 I 1 DATA18
+bit 258 O 1 DATA17 254 0 Z
+bit 257 I 1 DATA17
+bit 256 O 1 DATA16 254 0 Z
+bit 255 I 1 DATA16
+bit 254 C 0 *
+bit 253 O 1 DATA15 221 0 Z
+bit 252 I 1 DATA15
+bit 251 O 1 DATA14 221 0 Z
+bit 250 I 1 DATA14
+bit 249 O 1 DATA13 221 0 Z
+bit 248 I 1 DATA13
+bit 247 O 1 DATA12 221 0 Z
+bit 246 I 1 DATA12
+bit 245 O 1 DATA11 221 0 Z
+bit 244 I 1 DATA11
+bit 243 O 1 DATA10 221 0 Z
+bit 242 I 1 DATA10
+bit 241 O 1 DATA9 221 0 Z
+bit 240 I 1 DATA9
+bit 239 O 1 DATA8 221 0 Z
+bit 238 I 1 DATA8
+bit 237 O 1 DATA7 221 0 Z
+bit 236 I 1 DATA7
+bit 235 O 1 DATA6 221 0 Z
+bit 234 I 1 DATA6
+bit 233 O 1 DATA5 221 0 Z
+bit 232 I 1 DATA5
+bit 231 O 1 DATA4 221 0 Z
+bit 230 I 1 DATA4
+bit 229 O 1 DATA3 221 0 Z
+bit 228 I 1 DATA3
+bit 227 O 1 DATA2 221 0 Z
+bit 226 I 1 DATA2
+bit 225 O 1 DATA1 221 0 Z
+bit 224 I 1 DATA1
+bit 223 O 1 DATA0 221 0 Z
+bit 222 I 1 DATA0
+bit 221 C 0 *
+bit 220 O 1 ADDR2 219 0 Z
+bit 219 C 0 *
+bit 218 O 1 ADDR3 219 0 Z
+bit 217 O 1 ADDR4 219 0 Z
+bit 216 O 1 ADDR5 219 0 Z
+bit 215 O 1 ADDR6 219 0 Z
+bit 214 O 1 ADDR7 219 0 Z
+bit 213 O 1 ADDR8 219 0 Z
+bit 212 O 1 ABE_B3 219 0 Z
+bit 211 O 1 ABE_B2 219 0 Z
+bit 210 O 1 ABE_B1 219 0 Z
+bit 209 O 1 ABE_B0 219 0 Z
+bit 208 O 1 BGH_B
+bit 207 O 1 BG_B
+bit 206 I 1 BR_B
+bit 205 O 1 SA10 194 0 Z
+bit 204 O 1 SCLK1 194 0 Z
+bit 203 O 1 SCLK0 194 0 Z
+bit 202 O 1 SWE_B 194 0 Z
+bit 201 O 1 SCAS_B 194 0 Z
+bit 200 O 1 SCKE 194 0 Z
+bit 199 O 1 SRAS_B 194 0 Z
+bit 198 O 1 SMS_B3 194 0 Z
+bit 197 O 1 SMS_B2 194 0 Z
+bit 196 O 1 SMS_B1 194 0 Z
+bit 195 O 1 SMS_B0 194 0 Z
+bit 194 C 0 *
+bit 193 I 1 ARDY
+bit 192 O 1 ARE_B 189 0 Z
+bit 191 O 1 AOE_B 189 0 Z
+bit 190 O 1 AWE_B 189 0 Z
+bit 189 C 0 *
+bit 188 O 1 AMS_B0 189 0 Z
+bit 187 O 1 AMS_B1 189 0 Z
+bit 186 O 1 AMS_B2 189 0 Z
+bit 185 O 1 AMS_B3 189 0 Z
+bit 184 O 1 ADDR9 175 0 Z
+bit 183 O 1 ADDR10 175 0 Z
+bit 182 O 1 ADDR11 175 0 Z
+bit 181 O 1 ADDR12 175 0 Z
+bit 180 O 1 ADDR13 175 0 Z
+bit 179 O 1 ADDR14 175 0 Z
+bit 178 O 1 ADDR15 175 0 Z
+bit 177 O 1 ADDR16 175 0 Z
+bit 176 O 1 ADDR17 175 0 Z
+bit 175 C 0 *
+bit 174 O 1 ADDR18 175 0 Z
+bit 173 O 1 ADDR19 175 0 Z
+bit 172 O 1 ADDR20 175 0 Z
+bit 171 O 1 ADDR21 175 0 Z
+bit 170 O 1 ADDR22 175 0 Z
+bit 169 O 1 ADDR23 175 0 Z
+bit 168 O 1 ADDR24 175 0 Z
+bit 167 O 1 ADDR25 175 0 Z
+bit 166 I 1 PPI2_CLK
+bit 165 I 1 PPI1_CLK
+bit 164 C 0 *
+bit 163 O 1 PPI1_SYNC3 164 0 Z
+bit 162 I 1 PPI1_SYNC3
+bit 161 C 0 *
+bit 160 O 1 PPI1_SYNC2 161 0 Z
+bit 159 I 1 PPI1_SYNC2
+bit 158 C 0 *
+bit 157 O 1 PPI1_SYNC1 158 0 Z
+bit 156 I 1 PPI1_SYNC1
+bit 155 C 0 *
+bit 154 O 1 PPI1_DATA15 155 0 Z
+bit 153 I 1 PPI1_DATA15
+bit 152 C 0 *
+bit 151 O 1 PPI1_DATA14 152 0 Z
+bit 150 I 1 PPI1_DATA14
+bit 149 C 0 *
+bit 148 O 1 PPI1_DATA13 149 0 Z
+bit 147 I 1 PPI1_DATA13
+bit 146 C 0 *
+bit 145 O 1 PPI1_DATA12 146 0 Z
+bit 144 I 1 PPI1_DATA12
+bit 143 C 0 *
+bit 142 O 1 PPI1_DATA11 143 0 Z
+bit 141 I 1 PPI1_DATA11
+bit 140 C 0 *
+bit 139 O 1 PPI1_DATA10 140 0 Z
+bit 138 I 1 PPI1_DATA10
+bit 137 I 1 RESET_B
+bit 136 I 1 BY_PASS
+bit 135 C 0 *
+bit 134 O 1 PPI1_DATA9 135 0 Z
+bit 133 I 1 PPI1_DATA9
+bit 132 C 0 *
+bit 131 O 1 PPI1_DATA8 132 0 Z
+bit 130 I 1 PPI1_DATA8
+bit 129 C 0 *
+bit 128 O 1 PPI1_DATA7 129 0 Z
+bit 127 I 1 PPI1_DATA7
+bit 126 C 0 *
+bit 125 O 1 PPI1_DATA6 126 0 Z
+bit 124 I 1 PPI1_DATA6
+bit 123 C 0 *
+bit 122 O 1 PPI1_DATA5 123 0 Z
+bit 121 I 1 PPI1_DATA5
+bit 120 C 0 *
+bit 119 O 1 PPI1_DATA4 120 0 Z
+bit 118 I 1 PPI1_DATA4
+bit 117 C 0 *
+bit 116 O 1 PPI1_DATA3 117 0 Z
+bit 115 I 1 PPI1_DATA3
+bit 114 C 0 *
+bit 113 O 1 PPI1_DATA2 114 0 Z
+bit 112 I 1 PPI1_DATA2
+bit 111 C 0 *
+bit 110 O 1 PPI1_DATA1 111 0 Z
+bit 109 I 1 PPI1_DATA1
+bit 108 C 0 *
+bit 107 O 1 PPI1_DATA0 108 0 Z
+bit 106 I 1 PPI1_DATA0
+bit 105 C 0 *
+bit 104 O 1 PPI2_SYNC3 105 0 Z
+bit 103 I 1 PPI2_SYNC3
+bit 102 C 0 *
+bit 101 O 1 PPI2_SYNC2 102 0 Z
+bit 100 I 1 PPI2_SYNC2
+bit 99 C 0 *
+bit 98 O 1 PPI2_SYNC1 99 0 Z
+bit 97 I 1 PPI2_SYNC1
+bit 96 C 0 *
+bit 95 O 1 PPI2_DATA15 96 0 Z
+bit 94 I 1 PPI2_DATA15
+bit 93 C 0 *
+bit 92 O 1 PPI2_DATA14 93 0 Z
+bit 91 I 1 PPI2_DATA14
+bit 90 C 0 *
+bit 89 O 1 PPI2_DATA13 90 0 Z
+bit 88 I 1 PPI2_DATA13
+bit 87 C 0 *
+bit 86 O 1 PPI2_DATA12 87 0 Z
+bit 85 I 1 PPI2_DATA12
+bit 84 C 0 *
+bit 83 O 1 PPI2_DATA11 84 0 Z
+bit 82 I 1 PPI2_DATA11
+bit 81 C 0 *
+bit 80 O 1 PPI2_DATA10 81 0 Z
+bit 79 I 1 PPI2_DATA10
+bit 78 C 0 *
+bit 77 O 1 PPI2_DATA9 78 0 Z
+bit 76 I 1 PPI2_DATA9
+bit 75 C 0 *
+bit 74 O 1 PPI2_DATA8 75 0 Z
+bit 73 I 1 PPI2_DATA8
+bit 72 C 0 *
+bit 71 O 1 PPI2_DATA7 72 0 Z
+bit 70 I 1 PPI2_DATA7
+bit 69 C 0 *
+bit 68 O 1 PPI2_DATA6 69 0 Z
+bit 67 I 1 PPI2_DATA6
+bit 66 C 0 *
+bit 65 O 1 PPI2_DATA5 66 0 Z
+bit 64 I 1 PPI2_DATA5
+bit 63 C 0 *
+bit 62 O 1 PPI2_DATA4 63 0 Z
+bit 61 I 1 PPI2_DATA4
+bit 60 C 0 *
+bit 59 O 1 PPI2_DATA3 60 0 Z
+bit 58 I 1 PPI2_DATA3
+bit 57 C 0 *
+bit 56 O 1 PPI2_DATA2 57 0 Z
+bit 55 I 1 PPI2_DATA2
+bit 54 C 0 *
+bit 53 O 1 PPI2_DATA1 54 0 Z
+bit 52 I 1 PPI2_DATA1
+bit 51 C 0 *
+bit 50 O 1 PPI2_DATA0 51 0 Z
+bit 49 I 1 PPI2_DATA0
+bit 48 C 0 *
+bit 47 O 1 PF0 48 0 Z
+bit 46 I 1 PF0
+bit 45 C 0 *
+bit 44 O 1 PF1 45 0 Z
+bit 43 I 1 PF1
+bit 42 C 0 *
+bit 41 O 1 PF2 42 0 Z
+bit 40 I 1 PF2
+bit 39 C 0 *
+bit 38 O 1 PF3 39 0 Z
+bit 37 I 1 PF3
+bit 36 C 0 *
+bit 35 O 1 PF4 36 0 Z
+bit 34 I 1 PF4
+bit 33 C 0 *
+bit 32 O 1 PF5 33 0 Z
+bit 31 I 1 PF5
+bit 30 C 0 *
+bit 29 O 1 PF6 30 0 Z
+bit 28 I 1 PF6
+bit 27 C 0 *
+bit 26 O 1 PF7 27 0 Z
+bit 25 I 1 PF7
+bit 24 C 0 *
+bit 23 O 1 PF8 24 0 Z
+bit 22 I 1 PF8
+bit 21 C 0 *
+bit 20 O 1 PF9 21 0 Z
+bit 19 I 1 PF9
+bit 18 C 0 *
+bit 17 O 1 PF10 18 0 Z
+bit 16 I 1 PF10
+bit 15 C 0 *
+bit 14 O 1 PF11 15 0 Z
+bit 13 I 1 PF11
+bit 12 C 0 *
+bit 11 O 1 PF12 12 0 Z
+bit 10 I 1 PF12
+bit 9 C 0 *
+bit 8 O 1 PF13 9 0 Z
+bit 7 I 1 PF13
+bit 6 C 0 *
+bit 5 O 1 PF14 6 0 Z
+bit 4 I 1 PF14
+bit 3 C 0 *
+bit 2 O 1 PF15 3 0 Z
+bit 1 I 1 PF15
+bit 0 I 1 NMI_1
--- /dev/null
+#\r
+# $Id: STEPPINGS v 1.0 20/09/2006 $\r
+#\r
+# Copyright (C) 2006 Kila Medical Systems.\r
+#\r
+# This program is free software; you can redistribute it and/or\r
+# modify it under the terms of the GNU General Public License\r
+# as published by the Free Software Foundation; either version 2\r
+# of the License, or (at your option) any later version.\r
+#\r
+# This program is distributed in the hope that it will be useful,\r
+# but WITHOUT ANY WARRANTY; without even the implied warranty of\r
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the\r
+# GNU General Public License for more details.\r
+#\r
+# You should have received a copy of the GNU General Public License\r
+# along with this program; if not, write to the Free Software\r
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA\r
+# 02111-1307, USA.\r
+#\r
+# Written by Lesly A.M <leslyam@kila.com>, 2006\r
+#\r
+# Documentation:\r
+# [1] Analog Devices Inc.,"ADSP-21065L SHARC Technical Reference", September 1998\r
+#\r
+#\r
+# bits 31-28 of the Device Identification Register\r
+0000 sharc21065l 0\r
+0001 sharc21065l 1\r
+0010 sharc21065l 2\r
+0011 sharc21065l 3\r
+\r
--- /dev/null
+#
+# $Id: sharc21065l,v 1.0 20/09/2006 $
+#
+# JTAG declarations for ADSP SHARC 21065L
+# Copyright (C) 2006 Kila Medical Systems.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Lesly A.M <leslyam@kila.com>, 2006
+#
+# Documentation:
+# [1] Analog Devices Inc.,"ADSP-21065L SHARC Technical Reference", September 1998
+# [2] Analog Devices Inc.,"BSDL Description for ADSP-21065L: MBGA Package", BSDL rev 1.1
+# http://www.analog.com/UploadedFiles/BSDL_Files/435954194035486111591903bsdl_21065l_bga.txt
+#
+#
+
+
+signal ADDR0
+signal ADDR1
+signal ADDR2
+signal ADDR3
+signal ADDR4
+signal ADDR5
+signal ADDR6
+signal ADDR7
+signal ADDR8
+signal ADDR9
+signal ADDR10
+signal ADDR11
+signal ADDR12
+signal ADDR13
+signal ADDR14
+signal ADDR15
+signal ADDR16
+signal ADDR17
+signal ADDR18
+signal ADDR19
+signal ADDR20
+signal ADDR21
+signal ADDR22
+signal ADDR23
+signal DATA0
+signal DATA1
+signal DATA2
+signal DATA3
+signal DATA4
+signal DATA5
+signal DATA6
+signal DATA7
+signal DATA8
+signal DATA9
+signal DATA10
+signal DATA11
+signal DATA12
+signal DATA13
+signal DATA14
+signal DATA15
+signal DATA16
+signal DATA17
+signal DATA18
+signal DATA19
+signal DATA20
+signal DATA21
+signal DATA22
+signal DATA23
+signal DATA24
+signal DATA25
+signal DATA26
+signal DATA27
+signal DATA28
+signal DATA29
+signal DATA30
+signal DATA31
+signal MS0
+signal MS1
+signal MS2
+signal MS3
+signal RD_B
+signal WR_B
+signal SW_B
+signal ACK
+signal TS_B
+signal IRQ0_B
+signal IRQ1_B
+signal IRQ2_B
+signal FLAG0
+signal FLAG1
+signal FLAG2
+signal FLAG3
+signal FLAG4
+signal FLAG5
+signal FLAG6
+signal FLAG7
+signal FLAG8
+signal FLAG9
+signal FLAG10
+signal FLAG11
+signal HBR_B
+signal HBG_B
+signal CS_B
+signal REDY
+signal DMAR1_B
+signal DMAR2_B
+signal DMAG1_B
+signal DMAG2_B
+signal BR1
+signal BR2
+signal ID0
+signal ID1
+signal CPA_B
+signal DT0A
+signal DT0B
+signal DR0A
+signal DR0B
+signal TCLK0
+signal RCLK0
+signal TFS0
+signal RFS0
+signal DT1A
+signal DT1B
+signal DR1A
+signal DR1B
+signal TCLK1
+signal RCLK1
+signal TFS1
+signal RFS1
+signal BSEL
+signal BMS_B
+signal CLKIN
+signal RESET_B
+signal TCK
+signal TMS
+signal TDI
+signal TDO
+signal TRST
+signal EMU
+signal BMSTR
+signal SDWE_B
+signal SDA10
+signal CAS_B
+signal RAS_B
+signal DQM
+signal SDCKE
+signal SDCLK0
+signal SDCLK1
+signal PWM_EVENT0
+signal PWM_EVENT1
+signal VDD0
+signal VDD1
+signal VDD2
+signal VDD3
+signal VDD4
+signal VDD5
+signal VDD6
+signal VDD7
+signal VDD8
+signal VDD9
+signal VDD10
+signal VDD11
+signal VDD12
+signal VDD13
+signal VDD14
+signal VDD15
+signal VDD16
+signal VDD17
+signal VDD18
+signal VDD19
+signal VDD20
+signal VDD21
+signal GND0
+signal GND1
+signal GND2
+signal GND3
+signal GND4
+signal GND5
+signal GND6
+signal GND7
+signal GND8
+signal GND9
+signal GND10
+signal GND11
+signal GND12
+signal GND13
+signal GND14
+signal GND15
+signal GND16
+signal GND17
+signal GND18
+signal GND19
+signal GND20
+signal GND21
+signal GND22
+signal GND23
+signal GND24
+signal GND25
+signal GND26
+signal GND27
+signal GND28
+signal GND29
+signal GND30
+signal GND31
+signal GND32
+signal GND33
+
+register BSR 285
+register BR 1
+register DIR 32
+
+instruction length 5
+
+instruction BYPASS 11111 BR
+instruction EXTEST 00000 BSR
+instruction SAMPLE/PRELOAD 10000 BSR
+
+bit 284 O 1 EMU 278 0 Z
+bit 283 I 1 ID0
+bit 282 I 1 ID1
+bit 281 O 1 *
+bit 280 O 1 *
+bit 279 O 1 *
+bit 278 C 0 *
+bit 277 C 0 *
+bit 276 I 1 FLAG4
+bit 275 O 1 FLAG4 277 0 Z
+bit 274 I 1 FLAG5
+bit 273 O 1 FLAG5 270 0 Z
+bit 272 I 1 FLAG6
+bit 271 O 1 FLAG6 269 0 Z
+bit 270 C 0 *
+bit 269 C 0 *
+bit 268 C 0 *
+bit 267 I 1 FLAG7
+bit 266 O 1 FLAG7 268 0 Z
+bit 265 I 1 DATA31
+bit 264 O 1 DATA31 243 0 Z
+bit 263 I 1 DATA30
+bit 262 O 1 DATA30 243 0 Z
+bit 261 I 1 DATA29
+bit 260 O 1 DATA29 243 0 Z
+bit 259 I 1 DATA28
+bit 258 O 1 DATA28 243 0 Z
+bit 257 I 1 DATA27
+bit 256 O 1 DATA27 243 0 Z
+bit 255 I 1 DATA26
+bit 254 O 1 DATA26 243 0 Z
+bit 253 I 1 DATA25
+bit 252 O 1 DATA25 243 0 Z
+bit 251 I 1 DATA24
+bit 250 O 1 DATA24 243 0 Z
+bit 249 I 1 DATA23
+bit 248 O 1 DATA23 243 0 Z
+bit 247 I 1 DATA22
+bit 246 O 1 DATA22 243 0 Z
+bit 245 I 1 DATA21
+bit 244 O 1 DATA21 243 0 Z
+bit 243 C 0 *
+bit 242 O 1 *
+bit 241 O 1 *
+bit 240 O 1 *
+bit 239 I 1 DATA20
+bit 238 O 1 DATA20 243 0 Z
+bit 237 I 1 DATA19
+bit 236 O 1 DATA19 243 0 Z
+bit 235 I 1 DATA18
+bit 234 O 1 DATA18 243 0 Z
+bit 233 I 1 DATA17
+bit 232 O 1 DATA17 243 0 Z
+bit 231 I 1 DATA16
+bit 230 O 1 DATA16 243 0 Z
+bit 229 I 1 DATA15
+bit 228 O 1 DATA15 243 0 Z
+bit 227 I 1 DATA14
+bit 226 O 1 DATA14 243 0 Z
+bit 225 O 1 *
+bit 224 O 1 *
+bit 223 O 1 *
+bit 222 O 1 *
+bit 221 O 1 *
+bit 220 O 1 *
+bit 219 I 1 DATA13
+bit 218 O 1 DATA13 209 0 Z
+bit 217 I 1 DATA12
+bit 216 O 1 DATA12 209 0 Z
+bit 215 I 1 DATA11
+bit 214 O 1 DATA11 209 0 Z
+bit 213 I 1 DATA10
+bit 212 O 1 DATA10 209 0 Z
+bit 211 I 1 DATA9
+bit 210 O 1 DATA9 209 0 Z
+bit 209 C 0 *
+bit 208 I 1 DATA8
+bit 207 O 1 DATA8 209 0 Z
+bit 206 I 1 DATA7
+bit 205 O 1 DATA7 209 0 Z
+bit 204 I 1 DATA6
+bit 203 O 1 DATA6 209 0 Z
+bit 202 I 1 DATA5
+bit 201 O 1 DATA5 209 0 Z
+bit 200 I 1 DATA4
+bit 199 O 1 DATA4 209 0 Z
+bit 198 I 1 DATA3
+bit 197 O 1 DATA3 209 0 Z
+bit 196 I 1 DATA2
+bit 195 O 1 DATA2 209 0 Z
+bit 194 I 1 DATA1
+bit 193 O 1 DATA1 209 0 Z
+bit 192 I 1 DATA0
+bit 191 O 1 DATA0 209 0 Z
+bit 190 C 0 *
+bit 189 I 1 FLAG8
+bit 188 O 1 FLAG8 190 0 Z
+bit 187 I 1 FLAG9
+bit 186 O 1 FLAG9 183 0 Z
+bit 185 I 1 FLAG10
+bit 184 O 1 FLAG10 182 0 Z
+bit 183 C 0 *
+bit 182 C 0 *
+bit 181 C 0 *
+bit 180 I 1 FLAG11
+bit 179 O 1 FLAG11 181 0 Z
+bit 178 I 1 MS3
+bit 177 O 1 MS3 153 0 Z
+bit 176 I 1 MS2
+bit 175 O 1 MS2 153 0 Z
+bit 174 I 1 MS1
+bit 173 O 1 MS1 153 0 Z
+bit 172 I 1 MS0
+bit 171 O 1 MS0 153 0 Z
+bit 170 I 1 ACK
+bit 169 O 1 ACK 167 0 Z
+bit 168 O 1 *
+bit 167 C 0 *
+bit 166 I 1 CPA_B
+bit 165 O 1 CPA_B 165 1 Z
+bit 164 I 1 SW_B
+bit 163 O 1 SW_B 153 0 Z
+bit 162 O 1 REDY 161 0 Z
+bit 161 C 0 *
+bit 160 I 1 RD_B
+bit 159 O 1 RD_B 153 0 Z
+bit 158 I 1 WR_B
+bit 157 O 1 WR_B 153 0 Z
+bit 156 O 1 *
+bit 155 I 1 TS_B
+bit 154 I 1 CS_B
+bit 153 C 0 *
+bit 152 O 1 BMSTR
+bit 151 I 1 HBG_B
+bit 150 O 1 HBG_B 147 0 Z
+bit 149 O 1 DMAG2_B 153 0 Z
+bit 148 O 1 DMAG1_B 153 0 Z
+bit 147 C 0 *
+bit 146 O 1 SDA10 131 0 Z
+bit 145 I 1 SDCKE
+bit 144 O 1 SDCKE 131 0 Z
+bit 143 O 1 DQM 131 0 Z
+bit 142 I 1 SDWE_B
+bit 141 O 1 SDWE_B 131 0 Z
+bit 140 I 1 CAS_B
+bit 139 O 1 CAS_B 131 0 Z
+bit 138 I 1 RAS_B
+bit 137 O 1 RAS_B 131 0 Z
+bit 136 I 1 HBR_B
+bit 135 I 1 DMAR2_B
+bit 134 I 1 DMAR1_B
+bit 133 I 1 SDCLK0
+bit 132 O 1 SDCLK0 131 0 Z
+bit 131 C 0 *
+bit 130 I 1 SDCLK1
+bit 129 O 1 SDCLK1 128 0 Z
+bit 128 C 0 *
+bit 127 I 1 CLKIN
+bit 126 I 1 BR2
+bit 125 O 1 BR2 120 0 Z
+bit 124 I 1 BR1
+bit 123 O 1 BR1 119 0 Z
+bit 122 I 1 PWM_EVENT0
+bit 121 O 1 PWM_EVENT0 118 0 Z
+bit 120 C 0 *
+bit 119 C 0 *
+bit 118 C 0 *
+bit 117 C 0 *
+bit 116 I 1 PWM_EVENT1
+bit 115 O 1 PWM_EVENT1 117 0 Z
+bit 114 O 1 DT1B 112 0 Z
+bit 113 O 1 DT1A 111 0 Z
+bit 112 C 0 *
+bit 111 C 0 *
+bit 110 C 0 *
+bit 109 I 1 TCLK1
+bit 108 O 1 TCLK1 110 0 Z
+bit 107 I 1 TFS1
+bit 106 O 1 TFS1 101 0 Z
+bit 105 I 1 DR1B
+bit 104 I 1 DR1A
+bit 103 I 1 RCLK1
+bit 102 O 1 RCLK1 100 0 Z
+bit 101 C 0 *
+bit 100 C 0 *
+bit 99 C 0 *
+bit 98 I 1 RFS1
+bit 97 O 1 RFS1 99 0 Z
+bit 96 O 1 DT0B 94 0 Z
+bit 95 O 1 DT0A 93 0 Z
+bit 94 C 0 *
+bit 93 C 0 *
+bit 92 C 0 *
+bit 91 I 1 TCLK0
+bit 90 O 1 TCLK0 92 0 Z
+bit 89 I 1 TFS0
+bit 88 O 1 TFS0 83 0 Z
+bit 87 I 1 DR0B
+bit 86 I 1 DR0A
+bit 85 I 1 RCLK0
+bit 84 O 1 RCLK0 82 0 Z
+bit 83 C 0 *
+bit 82 C 0 *
+bit 81 C 0 *
+bit 80 I 1 RFS0
+bit 79 O 1 RFS0 81 0 Z
+bit 78 O 1 *
+bit 77 O 1 *
+bit 76 O 1 *
+bit 75 I 1 IRQ2_B
+bit 74 I 1 IRQ1_B
+bit 73 I 1 IRQ0_B
+bit 72 O 1 *
+bit 71 O 1 *
+bit 70 O 1 *
+bit 69 O 1 *
+bit 68 O 1 *
+bit 67 O 1 *
+bit 66 I 1 FLAG3
+bit 65 O 1 FLAG3 64 0 Z
+bit 64 C 0 *
+bit 63 C 0 *
+bit 62 I 1 FLAG2
+bit 61 O 1 FLAG2 63 0 Z
+bit 60 I 1 FLAG1
+bit 59 O 1 FLAG1 56 0 Z
+bit 58 I 1 FLAG0
+bit 57 O 1 FLAG0 55 0 Z
+bit 56 C 0 *
+bit 55 C 0 *
+bit 54 I 1 ADDR0
+bit 53 O 1 ADDR0 36 0 Z
+bit 52 I 1 ADDR1
+bit 51 O 1 ADDR1 36 0 Z
+bit 50 I 1 ADDR2
+bit 49 O 1 ADDR2 36 0 Z
+bit 48 I 1 ADDR3
+bit 47 O 1 ADDR3 36 0 Z
+bit 46 I 1 ADDR4
+bit 45 O 1 ADDR4 36 0 Z
+bit 44 I 1 ADDR5
+bit 43 O 1 ADDR5 36 0 Z
+bit 42 I 1 ADDR6
+bit 41 O 1 ADDR6 36 0 Z
+bit 40 I 1 ADDR7
+bit 39 O 1 ADDR7 36 0 Z
+bit 38 I 1 ADDR8
+bit 37 O 1 ADDR8 36 0 Z
+bit 36 C 0 *
+bit 35 I 1 ADDR9
+bit 34 O 1 ADDR9 36 0 Z
+bit 33 I 1 ADDR10
+bit 32 O 1 ADDR10 36 0 Z
+bit 31 I 1 ADDR11
+bit 30 O 1 ADDR11 36 0 Z
+bit 29 I 1 ADDR12
+bit 28 O 1 ADDR12 36 0 Z
+bit 27 I 1 ADDR13
+bit 26 O 1 ADDR13 36 0 Z
+bit 25 I 1 ADDR14
+bit 24 O 1 ADDR14 36 0 Z
+bit 23 I 1 ADDR15
+bit 22 O 1 ADDR15 36 0 Z
+bit 21 I 1 ADDR16
+bit 20 O 1 ADDR16 36 0 Z
+bit 19 I 1 ADDR17
+bit 18 O 1 ADDR17 36 0 Z
+bit 17 I 1 ADDR18
+bit 16 O 1 ADDR18 36 0 Z
+bit 15 I 1 ADDR19
+bit 14 O 1 ADDR19 36 0 Z
+bit 13 I 1 ADDR20
+bit 12 O 1 ADDR20 36 0 Z
+bit 11 I 1 ADDR21
+bit 10 O 1 ADDR21 36 0 Z
+bit 9 I 1 ADDR22
+bit 8 O 1 ADDR22 36 0 Z
+bit 7 I 1 ADDR23
+bit 6 O 1 ADDR23 36 0 Z
+bit 5 I 1 RESET_B
+bit 4 C 0 *
+bit 3 O 1 *
+bit 2 I 1 BMS_B
+bit 1 O 1 BMS_B 4 0 Z
+bit 0 I 1 BSEL
+
+initbus SHARC_21065L
--- /dev/null
+#
+# $Id$
+#
+# JTAG declarations for Atheros AR2312
+# Copyright (C) 2005 Marek Michalkiewicz
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Marek Michalkiewicz <marekm@amelek.gda.pl>, 2005.
+#
+
+register BR 1
+register BSR 1
+register DIR 32
+register EJIMPCODE 32
+register EJADDRESS 32
+register EJDATA 32
+register EJCONTROL 32
+register EJALL 96
+register EJFASTDATA 33
+
+instruction length 5
+
+instruction BYPASS 11111 BR
+instruction SAMPLE/PRELOAD 00010 BSR
+instruction IDCODE 00001 DIR
+instruction EJTAG_IMPCODE 00011 EJIMPCODE
+instruction EJTAG_ADDRESS 01000 EJADDRESS
+instruction EJTAG_DATA 01001 EJDATA
+instruction EJTAG_CONTROL 01010 EJCONTROL
+instruction EJTAG_ALL 01011 EJALL
+instruction EJTAGBOOT 01100 BR
+instruction NORMALBOOT 01101 BR
+instruction EJTAG_FASTDATA 01110 EJFASTDATA
+
+initbus ejtag
+endian big
+#Enable flash read/write
+poke 0x58400000 0x100e3ce1
--- /dev/null
+#
+# $Id$
+#
+# Copyright (C) 2002 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Marcel Telka <marcel@telka.sk>, 2002.
+# Modified by Stefan Pledl <stefan.pledl@mesutronic.de>, 2007.
+#
+# Documentation:
+# [1] Atmel Corporation, "ATmega128(L) - 8-bit AVR Microcontroller with
+# 128K Bytes In-System Programmable Flash", 2002, Rev. 2467E-AVR-05/02
+#
+# [2] Atmel Corporation, 1504BSDL.ZIP - BSDL files for ATF1504AS/ASL and
+# ATF1504ASV/ASVL
+#
+# [3] Atmel Corporation, "AT32AP7000 - High Performance, Low Power
+# AVR(R)32 32-Bit Microcontroller", Rev. 32003K-AVR32-10/07
+#
+
+# bits 27-12 of the Device Identification Register
+1001011100000010 atmega128 ATmega128 # see Table 100 in [1]
+0101101100000110 at91sam7s64 AT91SAM7S64
+0101101100000111 at91sam7s32 AT91SAM7S32
+0101101100001001 at91sam7s256 AT91SAM7S256
+0101101100001010 at91sam7s128 AT91SAM7S128
+0101101100001100 at91sam7s321 AT91SAM7S321
+0001010100010100 atf15xx ATF1504ASV # see 1504ASV_J44.bsd
+ # in [2]
+0001111010000010 at32ap7000 AT32AP7000 # see Table 38-11 in [3]
+
--- /dev/null
+#
+# $Id$
+#
+# Copyright (c) 2008 Gabor Juhos <juhosg@openwrt.org>
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Documentation:
+# [1] Atmel Corporation, "AT32AP7000 - High Performance, Low Power
+# AVR(R)32 32-Bit Microcontroller", Rev. 32003K-AVR32-10/07
+#
+
+# bits 31-28 of the Device Identification Register
+# see Table 38-11 in [1]
+0000 at32ap7000 A
+0001 at32ap7000 B
+0010 at32ap7000 C
--- /dev/null
+#
+# $Id$
+#
+# Copyright (c) 2008 Gabor Juhos <juhosg@openwrt.org>
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Documentation:
+# [1] Atmel Corporation, "AT32AP7000 - High Performance, Low Power
+# AVR(R)32 32-Bit Microcontroller", Rev. 32003K-AVR32-10/07
+# http://www.atmel.com/dyn/resources/prod_documents/doc32003.pdf
+#
+
+# mandatory data registers
+register BSR 388 # Boundary Scan Register
+register BR 1 # Bypass Register
+# optional data registers
+register DIR 32 # Device Identification Register
+# user-defined registers
+register ARR 5 # AVR Reset Register
+register NAR 34 # Nexus Access Register
+register MWAR 35 # Memory Word Access Register
+register MBAR 34 # Memory Block Access Register
+register CAR 1 # Cancel Access Register
+register SYR 16 # Sync Register
+
+# see page 909 in [1]
+instruction length 5
+
+# mandatory instructions
+instruction EXTEST 00000 BSR # see page 914 in [1]
+instruction IDCODE 00001 DIR # see page 914 in [1]
+instruction SAMPLE/PRELOAD 00010 BSR # see page 914 in [1]
+instruction BYPASS 01111 BR # see page 915 in [1]
+
+# optional instructions
+instruction INTEST 00100 BSR # see page 914 in [1]
+instruction CLAMP 00110 BR # see page 915 in [1]
+
+# user-defined instructions
+instruction AVR_RESET 01100 ARR # see page 919 in [1]
+instruction NEXUS_ACCESS 10000 NAR # see page 916 in [1]
+instruction MEMORY_WORD_ACCESS 10001 MWAR # see page 917 in [1]
+instruction MEMORY_BLOCK_ACCESS 10010 MBAR # see page 918 in [1]
+instruction CANCEL_ACCESS 10011 CAR # see page 918 in [1]
+instruction SYNC 10111 SYR # see page 919 in [1]
+
+# undocumented instructions, detected by the "discovery" command:
+#Detecting DR length for IR 11000 ... 35
+#Detecting DR length for IR 11001 ... 32
+#Detecting DR length for IR 11010 ... 35
+#Detecting DR length for IR 11011 ... 64
+#Detecting DR length for IR 11111 ... 1 # probably BYPASS
+
+signal AGNDOSC
+signal AGNDPLL
+signal AGNDUSB
+signal AVDDOSC
+signal AVDDPLL
+signal AVDDUSB
+signal EVTI_N
+signal FSDM
+signal FSDP
+signal GNDCORE_0
+signal GNDCORE_1
+signal GNDCORE_2
+signal GNDCORE_3
+signal GNDCORE_4
+signal GNDCORE_5
+signal GNDIOP_CBL
+signal GNDIOP_CBR
+signal GNDIOP_CUL
+signal GNDIOP_CUR
+signal GNDIOP_0
+signal GNDIOP_1
+signal GNDIOP_2
+signal GNDIOP_3
+signal GNDIOP_4a
+signal GNDIOP_4b
+signal GNDIOP_6a
+signal GNDIOP_6b
+signal GNDIOP_7
+signal GNDIOP_8a
+signal GNDIOP_8b
+signal GNDIOP_9a
+signal GNDIOP_9b
+signal GNDIOP_10
+signal HSDM
+signal HSDP
+signal OSCEN_N
+signal PA00
+signal PA01
+signal PA02
+signal PA03
+signal PA04
+signal PA05
+signal PA06
+signal PA07
+signal PA08
+signal PA09
+signal PA10
+signal PA11
+signal PA12
+signal PA13
+signal PA14
+signal PA15
+signal PA16
+signal PA17
+signal PA18
+signal PA19
+signal PA20
+signal PA21
+signal PA22
+signal PA23
+signal PA24
+signal PA25
+signal PA26
+signal PA27
+signal PA28
+signal PA29
+signal PA30
+signal PA31
+signal PB00
+signal PB01
+signal PB02
+signal PB03
+signal PB04
+signal PB05
+signal PB06
+signal PB07
+signal PB08
+signal PB09
+signal PB10
+signal PB11
+signal PB12
+signal PB13
+signal PB14
+signal PB15
+signal PB16
+signal PB17
+signal PB18
+signal PB19
+signal PB20
+signal PB21
+signal PB22
+signal PB23
+signal PB24
+signal PB25
+signal PB26
+signal PB27
+signal PB28
+signal PB29
+signal PB30
+signal PC00
+signal PC01
+signal PC02
+signal PC03
+signal PC04
+signal PC05
+signal PC06
+signal PC07
+signal PC08
+signal PC09
+signal PC10
+signal PC11
+signal PC12
+signal PC13
+signal PC14
+signal PC15
+signal PC16
+signal PC17
+signal PC18
+signal PC19
+signal PC20
+signal PC21
+signal PC22
+signal PC23
+signal PC24
+signal PC25
+signal PC26
+signal PC27
+signal PC28
+signal PC29
+signal PC30
+signal PC31
+signal PD00
+signal PD01
+signal PD02
+signal PD03
+signal PD04
+signal PD05
+signal PD06
+signal PD07
+signal PD08
+signal PD09
+signal PD10
+signal PD11
+signal PD12
+signal PD13
+signal PD14
+signal PD15
+signal PD16
+signal PD17
+signal PE00
+signal PE01
+signal PE02
+signal PE03
+signal PE04
+signal PE05
+signal PE06
+signal PE07
+signal PE08
+signal PE09
+signal PE10
+signal PE11
+signal PE12
+signal PE13
+signal PE14
+signal PE15
+signal PE16
+signal PE17
+signal PE18
+signal PE19
+signal PE20
+signal PE21
+signal PE22
+signal PE23
+signal PE24
+signal PE25
+signal PE26
+signal PLL0
+signal PLL1
+signal PX00
+signal PX01
+signal PX02
+signal PX03
+signal PX04
+signal PX05
+signal PX06
+signal PX07
+signal PX08
+signal PX09
+signal PX10
+signal PX11
+signal PX12
+signal PX13
+signal PX14
+signal PX15
+signal PX16
+signal PX17
+signal PX18
+signal PX19
+signal PX20
+signal PX21
+signal PX22
+signal PX23
+signal PX24
+signal PX25
+signal PX26
+signal PX27
+signal PX28
+signal PX29
+signal PX30
+signal PX31
+signal PX32
+signal PX33
+signal PX34
+signal PX35
+signal PX36
+signal PX37
+signal PX38
+signal PX39
+signal PX40
+signal PX41
+signal PX42
+signal PX43
+signal PX44
+signal PX45
+signal PX46
+signal PX47
+signal PX48
+signal PX49
+signal PX50
+signal PX51
+signal PX52
+signal PX53
+signal RESET_N
+signal TCK
+signal TDI
+signal TDO
+signal TMS
+signal TRST_N
+signal VBG
+signal VDDCORE_0
+signal VDDCORE_1
+signal VDDCORE_2
+signal VDDCORE_3
+signal VDDCORE_4
+signal VDDIOP_CBL
+signal VDDIOP_CBR
+signal VDDIOP_CUL
+signal VDDIOP_CUR
+signal VDDIOP_0a
+signal VDDIOP_0b
+signal VDDIOP_1
+signal VDDIOP_2a
+signal VDDIOP_2b
+signal VDDIOP_3
+signal VDDIOP_4a
+signal VDDIOP_4b
+signal VDDIOP_6a
+signal VDDIOP_6b
+signal VDDIOP_7
+signal VDDIOP_8a
+signal VDDIOP_8b
+signal VDDIOP_9a
+signal VDDIOP_9b
+signal VDDIOP_10a
+signal VDDIOP_10b
+signal VDDIOP_11
+signal WAKE_N
+signal XIN0
+signal XIN1
+signal XIN32
+signal XOUT0
+signal XOUT1
+
+# Boundary Scan Register bits
+
+bit 387 C 1 *
+bit 386 B 1 PD00 387 1 Z
+bit 385 C 1 *
+bit 384 B 1 PD01 385 1 Z
+bit 383 C 1 *
+bit 382 B 1 PD02 383 1 Z
+bit 381 C 1 *
+bit 380 B 1 PE17 381 1 Z
+bit 379 C 1 *
+bit 378 B 1 PE18 379 1 Z
+bit 377 C 1 *
+bit 376 B 1 PX47 377 1 Z
+bit 375 C 1 *
+bit 374 B 1 PX48 375 1 Z
+bit 373 C 1 *
+bit 372 B 1 PX49 373 1 Z
+bit 371 C 1 *
+bit 370 B 1 PX50 371 1 Z
+bit 369 C 1 *
+bit 368 B 1 PX51 369 1 Z
+bit 367 C 1 *
+bit 366 B 1 PX32 367 1 Z
+bit 365 C 1 *
+bit 364 B 1 PX33 365 1 Z
+bit 363 C 1 *
+bit 362 B 1 PX00 363 1 Z
+bit 361 C 1 *
+bit 360 B 1 PX01 361 1 Z
+bit 359 C 1 *
+bit 358 B 1 PX02 359 1 Z
+bit 357 C 1 *
+bit 356 B 1 PX03 357 1 Z
+bit 355 C 1 *
+bit 354 B 1 PX04 355 1 Z
+bit 353 C 1 *
+bit 352 B 1 PX05 353 1 Z
+bit 351 C 1 *
+bit 350 B 1 PD03 351 1 Z
+bit 349 C 1 *
+bit 348 B 1 PD04 349 1 Z
+bit 347 C 1 *
+bit 346 B 1 PD05 347 1 Z
+bit 345 C 1 *
+bit 344 B 1 PD06 345 1 Z
+bit 343 C 1 *
+bit 342 B 1 PD07 343 1 Z
+bit 341 C 1 *
+bit 340 B 1 PD08 341 1 Z
+bit 339 C 1 *
+bit 338 B 1 PD09 339 1 Z
+bit 337 C 1 *
+bit 336 B 1 PA00 337 1 Z
+bit 335 C 1 *
+bit 334 B 1 PA01 335 1 Z
+bit 333 C 1 *
+bit 332 B 1 PA02 333 1 Z
+bit 331 C 1 *
+bit 330 B 1 PA03 331 1 Z
+bit 329 C 1 *
+bit 328 B 1 PA04 329 1 Z
+bit 327 C 1 *
+bit 326 B 1 PA05 327 1 Z
+bit 325 C 1 *
+bit 324 B 1 PB24 325 1 Z
+bit 323 C 1 *
+bit 322 B 1 PB25 323 1 Z
+bit 321 C 1 *
+bit 320 B 1 PA08 321 1 Z
+bit 319 C 1 *
+bit 318 B 1 PA09 319 1 Z
+bit 317 C 1 *
+bit 316 B 1 PA10 317 1 Z
+bit 315 C 1 *
+bit 314 B 1 PA11 315 1 Z
+bit 313 C 1 *
+bit 312 B 1 PA12 313 1 Z
+bit 311 C 1 *
+bit 310 B 1 PA13 311 1 Z
+bit 309 C 1 *
+bit 308 B 1 PA14 309 1 Z
+bit 307 C 1 *
+bit 306 B 1 PA15 307 1 Z
+bit 305 C 1 *
+bit 304 B 1 PA16 305 1 Z
+bit 303 C 1 *
+bit 302 B 1 PA17 303 1 Z
+bit 301 C 1 *
+bit 300 B 1 PA18 301 1 Z
+bit 299 C 1 *
+bit 298 B 1 PA19 299 1 Z
+bit 297 C 1 *
+bit 296 B 1 PA20 297 1 Z
+bit 295 C 1 *
+bit 294 B 1 PA21 295 1 Z
+bit 293 C 1 *
+bit 292 B 1 PA22 293 1 Z
+bit 291 C 1 *
+bit 290 B 1 PD10 291 1 Z
+bit 289 C 1 *
+bit 288 B 1 PA23 289 1 Z
+bit 287 C 1 *
+bit 286 B 1 PA24 287 1 Z
+bit 285 C 1 *
+bit 284 B 1 PD11 285 1 Z
+bit 283 C 1 *
+bit 282 B 1 PD12 283 1 Z
+bit 281 C 1 *
+bit 280 B 1 PD13 281 1 Z
+bit 279 C 1 *
+bit 278 B 1 PD14 279 1 Z
+bit 277 C 1 *
+bit 276 B 1 PD15 277 1 Z
+bit 275 C 1 *
+bit 274 B 1 PD16 275 1 Z
+bit 273 C 1 *
+bit 272 B 1 PD17 273 1 Z
+bit 271 C 1 *
+bit 270 B 1 PA25 271 1 Z
+bit 269 C 1 *
+bit 268 B 1 PA26 269 1 Z
+bit 267 C 1 *
+bit 266 B 1 PA27 267 1 Z
+bit 265 C 1 *
+bit 264 B 1 PA28 265 1 Z
+bit 263 C 1 *
+bit 262 B 1 PA29 263 1 Z
+bit 261 C 1 *
+bit 260 B 1 PA30 261 1 Z
+bit 259 C 1 *
+bit 258 B 1 PA31 259 1 Z
+bit 257 C 1 *
+bit 256 B 1 PB26 257 1 Z
+bit 255 C 1 *
+bit 254 B 1 PB27 255 1 Z
+bit 253 C 1 *
+bit 252 B 1 PB28 253 1 Z
+bit 251 C 1 *
+bit 250 B 1 PX53 251 1 Z
+bit 249 C 1 *
+bit 248 B 1 PX52 249 1 Z
+bit 247 C 1 *
+bit 246 B 1 PX41 247 1 Z
+bit 245 C 1 *
+bit 244 B 1 PE25 245 1 Z
+bit 243 C 1 *
+bit 242 B 1 PE24 243 1 Z
+bit 241 C 1 *
+bit 240 B 1 PE23 241 1 Z
+bit 239 C 1 *
+bit 238 B 1 PE22 239 1 Z
+bit 237 C 1 *
+bit 236 B 1 PE21 237 1 Z
+bit 235 C 1 *
+bit 234 B 1 PE20 235 1 Z
+bit 233 C 1 *
+bit 232 B 1 PE19 233 1 Z
+bit 231 C 1 *
+bit 230 B 1 PX06 231 1 Z
+bit 229 C 1 *
+bit 228 B 1 PX07 229 1 Z
+bit 227 C 1 *
+bit 226 B 1 PX08 227 1 Z
+bit 225 C 1 *
+bit 224 B 1 PX09 225 1 Z
+bit 223 C 1 *
+bit 222 B 1 PX10 223 1 Z
+bit 221 C 1 *
+bit 220 B 1 PX11 221 1 Z
+bit 219 C 1 *
+bit 218 B 1 PB29 219 1 Z
+bit 217 C 1 *
+bit 216 B 1 PB30 217 1 Z
+bit 215 C 1 *
+bit 214 B 1 PX12 215 1 Z
+bit 213 C 1 *
+bit 212 B 1 PX13 213 1 Z
+bit 211 C 1 *
+bit 210 B 1 PC01 211 1 Z
+bit 209 C 1 *
+bit 208 B 1 PC02 209 1 Z
+bit 207 C 1 *
+bit 206 B 1 PC03 207 1 Z
+bit 205 C 1 *
+bit 204 B 1 PC04 205 1 Z
+bit 203 C 1 *
+bit 202 B 1 PC00 203 1 Z
+bit 201 C 1 *
+bit 200 B 1 PX14 201 1 Z
+bit 199 C 1 *
+bit 198 B 1 PX15 199 1 Z
+bit 197 C 1 *
+bit 196 B 1 PX16 197 1 Z
+bit 195 C 1 *
+bit 194 B 1 PX17 195 1 Z
+bit 193 C 1 *
+bit 192 B 1 PX34 193 1 Z
+bit 191 C 1 *
+bit 190 B 1 PX35 191 1 Z
+bit 189 C 1 *
+bit 188 B 1 PX36 189 1 Z
+bit 187 C 1 *
+bit 186 B 1 PX37 187 1 Z
+bit 185 C 1 *
+bit 184 B 1 PX38 185 1 Z
+bit 183 C 1 *
+bit 182 B 1 PX18 183 1 Z
+bit 181 C 1 *
+bit 180 B 1 PX19 181 1 Z
+bit 179 C 1 *
+bit 178 B 1 PX20 179 1 Z
+bit 177 C 1 *
+bit 176 B 1 PX21 177 1 Z
+bit 175 C 1 *
+bit 174 B 1 PX22 175 1 Z
+bit 173 C 1 *
+bit 172 B 1 PX23 173 1 Z
+bit 171 C 1 *
+bit 170 B 1 PX24 171 1 Z
+bit 169 C 1 *
+bit 168 B 1 PX25 169 1 Z
+bit 167 C 1 *
+bit 166 B 1 PX26 167 1 Z
+bit 165 C 1 *
+bit 164 B 1 PX27 165 1 Z
+bit 163 C 1 *
+bit 162 B 1 PX28 163 1 Z
+bit 161 C 1 *
+bit 160 B 1 PX29 161 1 Z
+bit 159 C 1 *
+bit 158 B 1 PX30 159 1 Z
+bit 157 C 1 *
+bit 156 B 1 PX31 157 1 Z
+bit 155 C 1 *
+bit 154 B 1 PC05 155 1 Z
+bit 153 C 1 *
+bit 152 B 1 PC06 153 1 Z
+bit 151 C 1 *
+bit 150 B 1 PE26 151 1 Z
+bit 149 C 1 *
+bit 148 B 1 PX39 149 1 Z
+bit 147 C 1 *
+bit 146 B 1 PC07 147 1 Z
+bit 145 C 1 *
+bit 144 B 1 PC08 145 1 Z
+bit 143 C 1 *
+bit 142 B 1 PC09 143 1 Z
+bit 141 C 1 *
+bit 140 B 1 PC10 141 1 Z
+bit 139 C 1 *
+bit 138 B 1 PC11 139 1 Z
+bit 137 C 1 *
+bit 136 B 1 PC12 137 1 Z
+bit 135 C 1 *
+bit 134 B 1 PC13 135 1 Z
+bit 133 C 1 *
+bit 132 B 1 PC14 133 1 Z
+bit 131 C 1 *
+bit 130 B 1 PC15 131 1 Z
+bit 129 C 1 *
+bit 128 B 1 PX40 129 1 Z
+bit 127 C 1 *
+bit 126 B 1 PX42 127 1 Z
+bit 125 C 1 *
+bit 124 B 1 PX43 125 1 Z
+bit 123 C 1 *
+bit 122 B 1 PX44 123 1 Z
+bit 121 C 1 *
+bit 120 B 1 PX45 121 1 Z
+bit 119 C 1 *
+bit 118 B 1 PX46 119 1 Z
+bit 117 C 1 *
+bit 116 B 1 PB00 117 1 Z
+bit 115 C 1 *
+bit 114 B 1 PB01 115 1 Z
+bit 113 C 1 *
+bit 112 B 1 PB02 113 1 Z
+bit 111 C 1 *
+bit 110 B 1 PB03 111 1 Z
+bit 109 C 1 *
+bit 108 B 1 PB04 109 1 Z
+bit 107 C 1 *
+bit 106 B 1 PB05 107 1 Z
+bit 105 C 1 *
+bit 104 B 1 PB06 105 1 Z
+bit 103 C 1 *
+bit 102 B 1 PB07 103 1 Z
+bit 101 C 1 *
+bit 100 B 1 PB08 101 1 Z
+bit 99 C 1 *
+bit 98 B 1 PB09 99 1 Z
+bit 97 C 1 *
+bit 96 B 1 PC16 97 1 Z
+bit 95 C 1 *
+bit 94 B 1 PC17 95 1 Z
+bit 93 C 1 *
+bit 92 B 1 PB10 93 1 Z
+bit 91 C 1 *
+bit 90 B 1 PB11 91 1 Z
+bit 89 C 1 *
+bit 88 B 1 PB12 89 1 Z
+bit 87 C 1 *
+bit 86 B 1 PB13 87 1 Z
+bit 85 C 1 *
+bit 84 B 1 PB14 85 1 Z
+bit 83 C 1 *
+bit 82 B 1 PB15 83 1 Z
+bit 81 C 1 *
+bit 80 B 1 PB16 81 1 Z
+bit 79 C 1 *
+bit 78 B 1 PB17 79 1 Z
+bit 77 C 1 *
+bit 76 B 1 PB18 77 1 Z
+bit 75 C 1 *
+bit 74 B 1 PB19 75 1 Z
+bit 73 C 1 *
+bit 72 B 1 PB20 73 1 Z
+bit 71 C 1 *
+bit 70 B 1 PB21 71 1 Z
+bit 69 C 1 *
+bit 68 B 1 PB22 69 1 Z
+bit 67 C 1 *
+bit 66 B 1 PB23 67 1 Z
+bit 65 C 1 *
+bit 64 B 1 PC18 65 1 Z
+bit 63 C 1 *
+bit 62 B 1 PA06 63 1 Z
+bit 61 C 1 *
+bit 60 B 1 PA07 61 1 Z
+bit 59 C 1 *
+bit 58 B 1 PC19 59 1 Z
+bit 57 C 1 *
+bit 56 B 1 PC20 57 1 Z
+bit 55 C 1 *
+bit 54 B 1 PC21 55 1 Z
+bit 53 C 1 *
+bit 52 B 1 PC22 53 1 Z
+bit 51 C 1 *
+bit 50 B 1 PC23 51 1 Z
+bit 49 C 1 *
+bit 48 B 1 PC24 49 1 Z
+bit 47 C 1 *
+bit 46 B 1 PC25 47 1 Z
+bit 45 C 1 *
+bit 44 B 1 PC26 45 1 Z
+bit 43 C 1 *
+bit 42 B 1 PC27 43 1 Z
+bit 41 C 1 *
+bit 40 B 1 PC28 41 1 Z
+bit 39 C 1 *
+bit 38 B 1 PC29 39 1 Z
+bit 37 C 1 *
+bit 36 B 1 PC30 37 1 Z
+bit 35 C 1 *
+bit 34 B 1 PC31 35 1 Z
+bit 33 C 1 *
+bit 32 B 1 PE00 33 1 Z
+bit 31 C 1 *
+bit 30 B 1 PE01 31 1 Z
+bit 29 C 1 *
+bit 28 B 1 PE02 29 1 Z
+bit 27 C 1 *
+bit 26 B 1 PE03 27 1 Z
+bit 25 C 1 *
+bit 24 B 1 PE04 25 1 Z
+bit 23 C 1 *
+bit 22 B 1 PE05 23 1 Z
+bit 21 C 1 *
+bit 20 B 1 PE06 21 1 Z
+bit 19 C 1 *
+bit 18 B 1 PE07 19 1 Z
+bit 17 C 1 *
+bit 16 B 1 PE08 17 1 Z
+bit 15 C 1 *
+bit 14 B 1 PE09 15 1 Z
+bit 13 C 1 *
+bit 12 B 1 PE10 13 1 Z
+bit 11 C 1 *
+bit 10 B 1 PE11 11 1 Z
+bit 9 C 1 *
+bit 8 B 1 PE12 9 1 Z
+bit 7 C 1 *
+bit 6 B 1 PE13 7 1 Z
+bit 5 C 1 *
+bit 4 B 1 PE14 5 1 Z
+bit 3 C 1 *
+bit 2 B 1 PE15 3 1 Z
+bit 1 C 1 *
+bit 0 B 1 PE16 1 1 Z
+
+endian big
--- /dev/null
+#
+# $Id: STEPPINGS,v 1.1 2002/08/23 14:08:33 telka Exp $
+#
+# Copyright (C) 2002 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Marcel Telka <marcel@telka.sk>, 2002.
+#
+# Documentation:
+# [1] Atmel Corporation, "ATmega128(L) - 8-bit AVR Microcontroller with
+# 128K Bytes In-System Programmable Flash", 2002, Rev. 2467E-AVR-05/02
+#
+
+# bits 31-28 of the Device Identification Register
+# see Table 99 in [1]
+0000 at91sam7s_tq64v0 0
--- /dev/null
+signal erase
+signal icetck
+signal icetdi
+signal icetms
+signal jtagsel
+signal selv32
+signal test
+signal nrst
+signal pa0
+signal pa1
+signal pa10
+signal pa11
+signal pa12
+signal pa13
+signal pa14
+signal pa15
+signal pa16
+signal pa17
+signal pa18
+signal pa19
+signal pa2
+signal pa20
+signal pa3
+signal pa4
+signal pa5
+signal pa6
+signal pa7
+signal pa8
+signal pa9
+
+register BSR 97
+register BR 1
+register DIR 32
+
+instruction length 3
+
+instruction BYPASS 111 BR
+instruction EXTEST 000 BSR
+instruction SAMPLE/PRELOAD 001 BSR
+instruction IDCODE 010 DIR
+
+bit 96 I 1 pa17
+bit 95 O 1 pa17 94 1 Z
+bit 94 C 1 *
+bit 93 I 1 pa18
+bit 92 O 1 pa18 91 1 Z
+bit 91 C 1 *
+bit 90 O 1 *
+bit 89 O 1 *
+bit 88 O 1 *
+bit 87 I 1 pa19
+bit 86 O 1 pa19 85 1 Z
+bit 85 C 1 *
+bit 84 I 1 pa20
+bit 83 O 1 pa20 82 1 Z
+bit 82 C 1 *
+bit 81 I 1 pa16
+bit 80 O 1 pa16 79 1 Z
+bit 79 C 1 *
+bit 78 I 1 pa15
+bit 77 O 1 pa15 76 1 Z
+bit 76 C 1 *
+bit 75 I 1 pa14
+bit 74 O 1 pa14 73 1 Z
+bit 73 C 1 *
+bit 72 I 1 pa13
+bit 71 O 1 pa13 70 1 Z
+bit 70 C 1 *
+bit 69 O 1 *
+bit 68 O 1 *
+bit 67 O 1 *
+bit 66 O 1 *
+bit 65 O 1 *
+bit 64 O 1 *
+bit 63 O 1 *
+bit 62 O 1 *
+bit 61 O 1 *
+bit 60 I 1 pa12
+bit 59 O 1 pa12 58 1 Z
+bit 58 C 1 *
+bit 57 I 1 pa11
+bit 56 O 1 pa11 55 1 Z
+bit 55 C 1 *
+bit 54 I 1 pa10
+bit 53 O 1 pa10 52 1 Z
+bit 52 C 1 *
+bit 51 I 1 pa9
+bit 50 O 1 pa9 49 1 Z
+bit 49 C 1 *
+bit 48 I 1 pa8
+bit 47 O 1 pa8 46 1 Z
+bit 46 C 1 *
+bit 45 I 1 pa7
+bit 44 O 1 pa7 43 1 Z
+bit 43 C 1 *
+bit 42 I 1 pa6
+bit 41 O 1 pa6 40 1 Z
+bit 40 C 1 *
+bit 39 I 1 pa5
+bit 38 O 1 pa5 37 1 Z
+bit 37 C 1 *
+bit 36 I 1 pa4
+bit 35 O 1 pa4 34 1 Z
+bit 34 C 1 *
+bit 33 O 1 *
+bit 32 O 1 *
+bit 31 O 1 *
+bit 30 O 1 *
+bit 29 O 1 *
+bit 28 O 1 *
+bit 27 O 1 *
+bit 26 O 1 *
+bit 25 O 1 *
+bit 24 O 1 *
+bit 23 O 1 *
+bit 22 O 1 *
+bit 21 I 1 pa3
+bit 20 O 1 pa3 19 1 Z
+bit 19 C 1 *
+bit 18 I 1 pa2
+bit 17 O 1 pa2 16 1 Z
+bit 16 C 1 *
+bit 15 I 1 pa1
+bit 14 O 1 pa1 13 1 Z
+bit 13 C 1 *
+bit 12 I 1 pa0
+bit 11 O 1 pa0 10 1 Z
+bit 10 C 1 *
+bit 9 O 1 *
+bit 8 O 1 *
+bit 7 O 1 *
+bit 6 O 1 *
+bit 5 O 1 *
+bit 4 O 1 *
+bit 3 O 1 *
+bit 2 O 1 *
+bit 1 O 1 *
+bit 0 I 1 erase
--- /dev/null
+signal erase 55
+signal icetck 53
+signal icetdi 33
+signal icetms 51
+signal jtagsel 50
+signal selv32 61
+signal test 40
+signal nrst 39
+signal pa0 48
+signal pa1 47
+signal pa10 29
+signal pa11 28
+signal pa12 27
+signal pa13 22
+signal pa14 21
+signal pa15 20
+signal pa16 19
+signal pa17 9
+signal pa18 10
+signal pa19 13
+signal pa2 44
+signal pa20 16
+signal pa3 43
+signal pa4 36
+signal pa5 35
+signal pa6 34
+signal pa7 32
+signal pa8 31
+signal pa9 30
+
+register BSR 97
+register BR 1
+register DIR 32
+
+instruction length 3
+
+instruction BYPASS 111 BR
+instruction EXTEST 000 BSR
+instruction SAMPLE/PRELOAD 001 BSR
+instruction IDCODE 010 DIR
+
+bit 96 I 1 pa17
+bit 95 O 1 pa17 94 1 Z
+bit 94 C 1 *
+bit 93 I 1 pa18
+bit 92 O 1 pa18 91 1 Z
+bit 91 C 1 *
+bit 90 O 1 *
+bit 89 O 1 *
+bit 88 O 1 *
+bit 87 I 1 pa19
+bit 86 O 1 pa19 85 1 Z
+bit 85 C 1 *
+bit 84 I 1 pa20
+bit 83 O 1 pa20 82 1 Z
+bit 82 C 1 *
+bit 81 I 1 pa16
+bit 80 O 1 pa16 79 1 Z
+bit 79 C 1 *
+bit 78 I 1 pa15
+bit 77 O 1 pa15 76 1 Z
+bit 76 C 1 *
+bit 75 I 1 pa14
+bit 74 O 1 pa14 73 1 Z
+bit 73 C 1 *
+bit 72 I 1 pa13
+bit 71 O 1 pa13 70 1 Z
+bit 70 C 1 *
+bit 69 O 1 *
+bit 68 O 1 *
+bit 67 O 1 *
+bit 66 O 1 *
+bit 65 O 1 *
+bit 64 O 1 *
+bit 63 O 1 *
+bit 62 O 1 *
+bit 61 O 1 *
+bit 60 I 1 pa12
+bit 59 O 1 pa12 58 1 Z
+bit 58 C 1 *
+bit 57 I 1 pa11
+bit 56 O 1 pa11 55 1 Z
+bit 55 C 1 *
+bit 54 I 1 pa10
+bit 53 O 1 pa10 52 1 Z
+bit 52 C 1 *
+bit 51 I 1 pa9
+bit 50 O 1 pa9 49 1 Z
+bit 49 C 1 *
+bit 48 I 1 pa8
+bit 47 O 1 pa8 46 1 Z
+bit 46 C 1 *
+bit 45 I 1 pa7
+bit 44 O 1 pa7 43 1 Z
+bit 43 C 1 *
+bit 42 I 1 pa6
+bit 41 O 1 pa6 40 1 Z
+bit 40 C 1 *
+bit 39 I 1 pa5
+bit 38 O 1 pa5 37 1 Z
+bit 37 C 1 *
+bit 36 I 1 pa4
+bit 35 O 1 pa4 34 1 Z
+bit 34 C 1 *
+bit 33 O 1 *
+bit 32 O 1 *
+bit 31 O 1 *
+bit 30 O 1 *
+bit 29 O 1 *
+bit 28 O 1 *
+bit 27 O 1 *
+bit 26 O 1 *
+bit 25 O 1 *
+bit 24 O 1 *
+bit 23 O 1 *
+bit 22 O 1 *
+bit 21 I 1 pa3
+bit 20 O 1 pa3 19 1 Z
+bit 19 C 1 *
+bit 18 I 1 pa2
+bit 17 O 1 pa2 16 1 Z
+bit 16 C 1 *
+bit 15 I 1 pa1
+bit 14 O 1 pa1 13 1 Z
+bit 13 C 1 *
+bit 12 I 1 pa0
+bit 11 O 1 pa0 10 1 Z
+bit 10 C 1 *
+bit 9 O 1 *
+bit 8 O 1 *
+bit 7 O 1 *
+bit 6 O 1 *
+bit 5 O 1 *
+bit 4 O 1 *
+bit 3 O 1 *
+bit 2 O 1 *
+bit 1 O 1 *
+bit 0 I 1 erase
--- /dev/null
+#
+# $Id: STEPPINGS 20 2005-05-24 02:39:42Z philwil $
+#
+# Copyright (C) 2002 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Marcel Telka <marcel@telka.sk>, 2002.
+# Modified by Stefan Pledl <stefan.pledl@mesutronic.de>, 2007
+#
+# Documentation:
+# [1] Atmel Corporation, 1504BSDL.ZIP - BSDL files for ATF1504AS/ASL and
+# ATF1504ASV/ASVL
+#
+
+# bits 31-28 of the Device Identification Register
+0000 atf1504asv A
--- /dev/null
+#
+# $Id: STEPPINGS 20 2005-05-24 02:39:42Z philwil $
+#
+# Copyright (C) 2002 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Generated by Stefan Pledl <stefan.pledl@mesutronic.de>, 2007
+# with bsdl2jtag
+#
+# Documentation:
+# [1] Atmel Corporation, 1504BSDL.ZIP - BSDL files for ATF1504AS/ASL and
+# ATF1504ASV/ASVL
+#
+
+signal IO4
+signal IO5
+signal IO6
+signal IO8
+signal IO9
+signal IO11
+signal IO12
+signal IO14
+signal IO16
+signal IO17
+signal IO18
+signal IO19
+signal IO20
+signal IO21
+signal IO24
+signal IO25
+signal IO26
+signal IO27
+signal IO28
+signal IO29
+signal IO31
+signal IO33
+signal IO34
+signal IO36
+signal IO37
+signal IO39
+signal IO40
+signal IO41
+signal TCK
+signal TDI
+signal TDO
+signal TMS
+signal DIN1
+signal DIN2
+signal DIN3
+signal DIN4
+signal VCC1
+signal VCC2
+signal VCC3
+signal VCC4
+signal GND1
+signal GND2
+signal GND3
+
+register BSR 192
+register BR 1
+register DIR 32
+
+instruction length 10
+
+instruction EXTEST 0000000000 BSR
+instruction BYPASS 1111111111 BR
+instruction SAMPLE/PRELOAD 0001010101 BSR
+instruction IDCODE 0001011001 DIR
+
+bit 191 O 1 IO4 190 0 Z
+bit 190 C 0 *
+bit 189 O 1 *
+bit 188 O 0 *
+bit 187 O 1 IO5 186 0 Z
+bit 186 C 0 *
+bit 185 O 1 *
+bit 184 O 0 *
+bit 183 O 1 *
+bit 182 O 0 *
+bit 181 O 1 IO6 180 0 Z
+bit 180 C 0 *
+bit 179 O 1 *
+bit 178 O 0 *
+bit 177 O 1 *
+bit 176 O 0 *
+bit 175 O 1 *
+bit 174 O 0 *
+bit 173 O 1 *
+bit 172 O 0 *
+bit 171 O 1 *
+bit 170 O 0 *
+bit 169 O 1 IO8 168 0 Z
+bit 168 C 0 *
+bit 167 O 1 IO9 166 0 Z
+bit 166 C 0 *
+bit 165 O 1 IO11 164 0 Z
+bit 164 C 0 *
+bit 163 O 1 *
+bit 162 O 0 *
+bit 161 O 1 IO12 160 0 Z
+bit 160 C 0 *
+bit 159 O 1 *
+bit 158 O 0 *
+bit 157 O 1 *
+bit 156 O 0 *
+bit 155 O 1 IO14 154 0 Z
+bit 154 C 0 *
+bit 153 O 1 *
+bit 152 O 0 *
+bit 151 O 1 *
+bit 150 O 0 *
+bit 149 O 1 *
+bit 148 O 0 *
+bit 147 O 1 *
+bit 146 O 0 *
+bit 145 O 1 IO16 144 0 Z
+bit 144 C 0 *
+bit 143 O 1 IO17 142 0 Z
+bit 142 C 0 *
+bit 141 O 1 *
+bit 140 O 0 *
+bit 139 O 1 *
+bit 138 O 0 *
+bit 137 O 1 IO18 136 0 Z
+bit 136 C 0 *
+bit 135 O 1 IO19 134 0 Z
+bit 134 C 0 *
+bit 133 O 1 IO20 132 0 Z
+bit 132 C 0 *
+bit 131 O 1 *
+bit 130 O 0 *
+bit 129 O 1 IO21 128 0 Z
+bit 128 C 0 *
+bit 127 O 1 IO24 126 0 Z
+bit 126 C 0 *
+bit 125 O 1 *
+bit 124 O 0 *
+bit 123 O 1 IO25 122 0 Z
+bit 122 C 0 *
+bit 121 O 1 IO26 120 0 Z
+bit 120 C 0 *
+bit 119 O 1 IO27 118 0 Z
+bit 118 C 0 *
+bit 117 O 1 *
+bit 116 O 0 *
+bit 115 O 1 *
+bit 114 O 0 *
+bit 113 O 1 IO28 112 0 Z
+bit 112 C 0 *
+bit 111 O 1 IO29 110 0 Z
+bit 110 C 0 *
+bit 109 O 1 *
+bit 108 O 0 *
+bit 107 O 1 *
+bit 106 O 0 *
+bit 105 O 1 *
+bit 104 O 0 *
+bit 103 O 1 *
+bit 102 O 0 *
+bit 101 O 1 IO31 100 0 Z
+bit 100 C 0 *
+bit 99 O 1 *
+bit 98 O 0 *
+bit 97 O 1 *
+bit 96 O 0 *
+bit 95 O 1 IO33 94 0 Z
+bit 94 C 0 *
+bit 93 O 1 *
+bit 92 O 0 *
+bit 91 O 1 IO34 90 0 Z
+bit 90 C 0 *
+bit 89 O 1 IO36 88 0 Z
+bit 88 C 0 *
+bit 87 O 1 IO37 86 0 Z
+bit 86 C 0 *
+bit 85 O 1 *
+bit 84 O 0 *
+bit 83 O 1 *
+bit 82 O 0 *
+bit 81 O 1 *
+bit 80 O 0 *
+bit 79 O 1 IO39 78 0 Z
+bit 78 C 0 *
+bit 77 O 1 *
+bit 76 O 0 *
+bit 75 O 1 *
+bit 74 O 0 *
+bit 73 O 1 *
+bit 72 O 0 *
+bit 71 O 1 *
+bit 70 O 0 *
+bit 69 O 1 IO40 68 0 Z
+bit 68 C 0 *
+bit 67 O 1 *
+bit 66 O 0 *
+bit 65 O 1 IO41 64 0 Z
+bit 64 C 0 *
+bit 63 I 1 DIN1
+bit 62 I 1 DIN2
+bit 61 I 1 IO4
+bit 60 O 1 *
+bit 59 I 1 IO5
+bit 58 O 1 *
+bit 57 O 1 *
+bit 56 I 1 IO6
+bit 55 O 1 *
+bit 54 O 1 *
+bit 53 O 1 *
+bit 52 O 1 *
+bit 51 I 1 IO8
+bit 50 I 1 IO9
+bit 49 I 1 IO11
+bit 48 O 1 *
+bit 47 I 1 IO12
+bit 46 O 1 *
+bit 45 I 1 IO14
+bit 44 O 1 *
+bit 43 O 1 *
+bit 42 O 1 *
+bit 41 O 1 *
+bit 40 I 1 IO16
+bit 39 I 1 IO17
+bit 38 O 1 *
+bit 37 O 1 *
+bit 36 I 1 IO18
+bit 35 I 1 IO19
+bit 34 I 1 IO20
+bit 33 O 1 *
+bit 32 I 1 IO21
+bit 31 I 1 IO24
+bit 30 O 1 *
+bit 29 I 1 IO25
+bit 28 I 1 IO26
+bit 27 I 1 IO27
+bit 26 O 1 *
+bit 25 O 1 *
+bit 24 I 1 IO28
+bit 23 I 1 IO29
+bit 22 O 1 *
+bit 21 O 1 *
+bit 20 O 1 *
+bit 19 O 1 *
+bit 18 I 1 IO31
+bit 17 O 1 *
+bit 16 I 1 IO33
+bit 15 O 1 *
+bit 14 I 1 IO34
+bit 13 I 1 IO36
+bit 12 I 1 IO37
+bit 11 O 1 *
+bit 10 O 1 *
+bit 9 I 1 IO39
+bit 8 O 1 *
+bit 7 O 1 *
+bit 6 O 1 *
+bit 5 O 1 *
+bit 4 I 1 IO40
+bit 3 O 1 *
+bit 2 I 1 IO41
+bit 1 I 1 DIN3
+bit 0 I 1 DIN4
--- /dev/null
+#
+# $Id$
+#
+# Copyright (C) 2002 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Marcel Telka <marcel@telka.sk>, 2002.
+#
+# Documentation:
+# [1] Atmel Corporation, "ATmega128(L) - 8-bit AVR Microcontroller with
+# 128K Bytes In-System Programmable Flash", 2002, Rev. 2467E-AVR-05/02
+#
+
+# bits 31-28 of the Device Identification Register
+# see Table 99 in [1]
+0011 atmega128 C
+0101 atmega128 F
+0110 atmega128 G
--- /dev/null
+#
+# $Id$
+#
+# JTAG declarations for ATmega128
+# Copyright (C) 2002 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Marcel Telka <marcel@telka.sk>, 2002.
+#
+# Documentation:
+# [1] Atmel Corporation, "ATmega128(L) - 8-bit AVR Microcontroller with
+# 128K Bytes In-System Programmable Flash", 2002, Rev. 2467E-AVR-05/02
+#
+
+# mandatory data registers
+register BSR 205 # see Table 106 in [1]
+register BR 1
+# optional data registers
+register DIR 32
+# user-defined registers
+register RR 1 # Reset Register
+register PER 16 # Programming Enable Register
+register PCR 15 # Programming Command Register
+register VFPLR 2048 # Virtual Flash Page Load Register
+register VFPRR 2056 # Virtual Flash Page Read Register
+
+# see page 250 in [1]
+instruction length 4
+# mandatory instructions
+instruction EXTEST 0000 BSR # see page 250 in [1]
+instruction SAMPLE/PRELOAD 0010 BSR # see page 251 in [1]
+instruction BYPASS 1111 BR # see page 251 in [1]
+# optional instructions
+instruction IDCODE 0001 DIR # see page 250 in [1]
+# user-defined instructions
+instruction AVR_RESET 1100 RR # see page 251 and page 303 in [1]
+# unknown data registers for PRIVATE? instructions
+#instruction PRIVATE0 1000 # see page 246 in [1]
+#instruction PRIVATE1 1001 # see page 246 in [1]
+#instruction PRIVATE2 1010 # see page 246 in [1]
+#instruction PRIVATE3 1011 # see page 246 in [1]
+instruction PROG_ENABLE 0100 PER # see page 303 in [1]
+instruction PROG_COMMANDS 0101 PCR # see page 304 in [1]
+instruction PROG_PAGELOAD 0110 VFPLR # see page 304 in [1]
+instruction PROG_PAGEREAD 0111 VFPRR # see page 304 in [1]
--- /dev/null
+#
+# $Id$
+#
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+#
+
+# bits 27-12 of the Device Identification Register
+0000001000000010 msp2006 MSP2006
--- /dev/null
+#
+# $Id$
+#
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+#
+
+# bits 31-28 of the Device Identification Register
+0001 msp2006 1
--- /dev/null
+#
+# $Id$
+
+register BR 1
+register BSR 1
+register DIR 32
+register EJIMPCODE 32
+register EJADDRESS 32
+register EJDATA 32
+register EJCONTROL 32
+register EJALL 96
+register EJFASTDATA 33
+
+instruction length 5
+
+instruction BYPASS 11111 BR
+instruction SAMPLE/PRELOAD 00010 BSR
+instruction IDCODE 00001 DIR
+instruction EJTAG_IMPCODE 00011 EJIMPCODE
+instruction EJTAG_ADDRESS 01000 EJADDRESS
+instruction EJTAG_DATA 01001 EJDATA
+instruction EJTAG_CONTROL 01010 EJCONTROL
+instruction EJTAG_ALL 01011 EJALL
+instruction EJTAGBOOT 01100 BR
+instruction NORMALBOOT 01101 BR
+instruction EJTAG_FASTDATA 01110 EJFASTDATA
+
+initbus ejtag
+endian big
--- /dev/null
+#
+# $Id$
+#
+# Copyright (C) 2003 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Matan Ziv-Av <matan@svgalib.org>, 2003.
+#
+
+# bits 27-12 of the Device Identification Register
+0001001001010000 bcm1250 BCM1250
+0011001100010000 bcm3310 BCM3310
+0101010000100001 bcm5421s BCM5421S
+0100011100010010 bcm4712 BCM4712
+0110001101011000 bcm6358 BCM6358
+0110001101001000 bcm6348 BCM6348
--- /dev/null
+#
+# $Id$
+#
+# Copyright (C) 2003 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Matan Ziv-Av <matan@svgalib.org>, 2003.
+#
+
+# bits 31-28 of the Device Identification Register
+0011 bcm1250 Ver 3
+1011 bcm1250 Ver 11
--- /dev/null
+#
+# $Id$
+#
+# JTAG declarations for BCM1250
+# Copyright (C) 2003 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Matan Ziv-Av <matan@svgalib.org>, 2003.
+#
+
+signal TRST_L
+signal TMS
+signal TDO
+signal TDI
+signal TCK
+signal SPARE2
+signal SPARE3
+signal SPARE4
+signal SPARE5
+signal SDA0
+signal SDA1
+signal SCL0
+signal SCL1
+signal S1_TIN
+signal S1_RTS_TSTROBE
+signal S1_RIN
+signal S1_DOUT
+signal S1_DIN
+signal S1_CTS_TCLKIN
+signal S1_COUT
+signal S1_CIN_RCLKIN
+signal S0_TIN
+signal S0_RTS_TSTROBE
+signal S0_RIN
+signal S0_DOUT
+signal S0_DIN
+signal S0_CTS_TCLKIN
+signal S0_COUT
+signal S0_CIN_RCLKIN
+signal RESET_L
+signal RESETOUT_L
+signal REFCLK2
+signal REFCLK01
+signal P_TRDY_L
+signal P_STOP_L
+signal P_SERR_L
+signal P_RST_L
+signal P_REQ_l0
+signal P_REQ_L1
+signal P_REQ_L2
+signal P_REQ_L3
+signal P_PERR_L
+signal P_PAR
+signal P_IRDY_L
+signal P_INTD_L
+signal P_INTC_L
+signal P_INTB_L
+signal P_INTA_L
+signal P_GNT_l0
+signal P_GNT_L1
+signal P_GNT_L2
+signal P_GNT_L3
+signal P_FRAME_L
+signal P_DEVSEL_L
+signal P_CLK
+signal P_CBE_L0
+signal P_CBE_L1
+signal P_CBE_L2
+signal P_CBE_L3
+signal P_AD0
+signal P_AD1
+signal P_AD2
+signal P_AD3
+signal P_AD4
+signal P_AD5
+signal P_AD6
+signal P_AD7
+signal P_AD8
+signal P_AD9
+signal P_AD10
+signal P_AD11
+signal P_AD12
+signal P_AD13
+signal P_AD14
+signal P_AD15
+signal P_AD16
+signal P_AD17
+signal P_AD18
+signal P_AD19
+signal P_AD20
+signal P_AD21
+signal P_AD22
+signal P_AD23
+signal P_AD24
+signal P_AD25
+signal P_AD26
+signal P_AD27
+signal P_AD28
+signal P_AD29
+signal P_AD30
+signal P_AD31
+signal PLLBYP
+signal PC_ENVPP
+signal PC_ENV5V
+signal PC_ENV3V
+signal M1_WE_L
+signal M1_RAS_L
+signal M1_ECC0
+signal M1_ECC1
+signal M1_ECC2
+signal M1_ECC3
+signal M1_ECC4
+signal M1_ECC5
+signal M1_ECC6
+signal M1_ECC7
+signal M1_DQS0
+signal M1_DQS1
+signal M1_DQS2
+signal M1_DQS3
+signal M1_DQS4
+signal M1_DQS5
+signal M1_DQS6
+signal M1_DQS7
+signal M1_DQS8
+signal M1_DQ0
+signal M1_DQ1
+signal M1_DQ2
+signal M1_DQ3
+signal M1_DQ4
+signal M1_DQ5
+signal M1_DQ6
+signal M1_DQ7
+signal M1_DQ8
+signal M1_DQ9
+signal M1_DQ10
+signal M1_DQ11
+signal M1_DQ12
+signal M1_DQ13
+signal M1_DQ14
+signal M1_DQ15
+signal M1_DQ16
+signal M1_DQ17
+signal M1_DQ18
+signal M1_DQ19
+signal M1_DQ20
+signal M1_DQ21
+signal M1_DQ22
+signal M1_DQ23
+signal M1_DQ24
+signal M1_DQ25
+signal M1_DQ26
+signal M1_DQ27
+signal M1_DQ28
+signal M1_DQ29
+signal M1_DQ30
+signal M1_DQ31
+signal M1_DQ32
+signal M1_DQ33
+signal M1_DQ34
+signal M1_DQ35
+signal M1_DQ36
+signal M1_DQ37
+signal M1_DQ38
+signal M1_DQ39
+signal M1_DQ40
+signal M1_DQ41
+signal M1_DQ42
+signal M1_DQ43
+signal M1_DQ44
+signal M1_DQ45
+signal M1_DQ46
+signal M1_DQ47
+signal M1_DQ48
+signal M1_DQ49
+signal M1_DQ50
+signal M1_DQ51
+signal M1_DQ52
+signal M1_DQ53
+signal M1_DQ54
+signal M1_DQ55
+signal M1_DQ56
+signal M1_DQ57
+signal M1_DQ58
+signal M1_DQ59
+signal M1_DQ60
+signal M1_DQ61
+signal M1_DQ62
+signal M1_DQ63
+signal M1_CS_L0
+signal M1_CS_L1
+signal M1_CS_L2
+signal M1_CS_L3
+signal M1_CLK_L
+signal M1_CLK
+signal M1_CKE
+signal M1_CAS_L
+signal M1_BA0
+signal M1_BA1
+signal M1_A0
+signal M1_A1
+signal M1_A2
+signal M1_A3
+signal M1_A4
+signal M1_A5
+signal M1_A6
+signal M1_A7
+signal M1_A8
+signal M1_A9
+signal M1_A10
+signal M1_A11
+signal M1_A12
+signal M0_WE_L
+signal M0_RAS_L
+signal M0_ECC0
+signal M0_ECC1
+signal M0_ECC2
+signal M0_ECC3
+signal M0_ECC4
+signal M0_ECC5
+signal M0_ECC6
+signal M0_ECC7
+signal M0_DQS0
+signal M0_DQS1
+signal M0_DQS2
+signal M0_DQS3
+signal M0_DQS4
+signal M0_DQS5
+signal M0_DQS6
+signal M0_DQS7
+signal M0_DQS8
+signal M0_DQ0
+signal M0_DQ1
+signal M0_DQ2
+signal M0_DQ3
+signal M0_DQ4
+signal M0_DQ5
+signal M0_DQ6
+signal M0_DQ7
+signal M0_DQ8
+signal M0_DQ9
+signal M0_DQ10
+signal M0_DQ11
+signal M0_DQ12
+signal M0_DQ13
+signal M0_DQ14
+signal M0_DQ15
+signal M0_DQ16
+signal M0_DQ17
+signal M0_DQ18
+signal M0_DQ19
+signal M0_DQ20
+signal M0_DQ21
+signal M0_DQ22
+signal M0_DQ23
+signal M0_DQ24
+signal M0_DQ25
+signal M0_DQ26
+signal M0_DQ27
+signal M0_DQ28
+signal M0_DQ29
+signal M0_DQ30
+signal M0_DQ31
+signal M0_DQ32
+signal M0_DQ33
+signal M0_DQ34
+signal M0_DQ35
+signal M0_DQ36
+signal M0_DQ37
+signal M0_DQ38
+signal M0_DQ39
+signal M0_DQ40
+signal M0_DQ41
+signal M0_DQ42
+signal M0_DQ43
+signal M0_DQ44
+signal M0_DQ45
+signal M0_DQ46
+signal M0_DQ47
+signal M0_DQ48
+signal M0_DQ49
+signal M0_DQ50
+signal M0_DQ51
+signal M0_DQ52
+signal M0_DQ53
+signal M0_DQ54
+signal M0_DQ55
+signal M0_DQ56
+signal M0_DQ57
+signal M0_DQ58
+signal M0_DQ59
+signal M0_DQ60
+signal M0_DQ61
+signal M0_DQ62
+signal M0_DQ63
+signal M0_CS_L0
+signal M0_CS_L1
+signal M0_CS_L2
+signal M0_CS_L3
+signal M0_CLK_L
+signal M0_CLK
+signal M0_CKE
+signal M0_CAS_L
+signal M0_BA0
+signal M0_BA1
+signal M0_A0
+signal M0_A1
+signal M0_A2
+signal M0_A3
+signal M0_A4
+signal M0_A5
+signal M0_A6
+signal M0_A7
+signal M0_A8
+signal M0_A9
+signal M0_A10
+signal M0_A11
+signal M0_A12
+signal LDT_TX_CTLP
+signal LDT_TX_CTLN
+signal LDT_TX_CLKP
+signal LDT_TX_CLKN
+signal LDT_TX_CADP0
+signal LDT_TX_CADP1
+signal LDT_TX_CADP2
+signal LDT_TX_CADP3
+signal LDT_TX_CADP4
+signal LDT_TX_CADP5
+signal LDT_TX_CADP6
+signal LDT_TX_CADP7
+signal LDT_TX_CADN0
+signal LDT_TX_CADN1
+signal LDT_TX_CADN2
+signal LDT_TX_CADN3
+signal LDT_TX_CADN4
+signal LDT_TX_CADN5
+signal LDT_TX_CADN6
+signal LDT_TX_CADN7
+signal LDT_RX_CTLP
+signal LDT_RX_CTLN
+signal LDT_RX_CADP0
+signal LDT_RX_CADP1
+signal LDT_RX_CADP2
+signal LDT_RX_CADP3
+signal LDT_RX_CADP4
+signal LDT_RX_CADP5
+signal LDT_RX_CADP6
+signal LDT_RX_CADP7
+signal LDT_RX_CADN0
+signal LDT_RX_CADN1
+signal LDT_RX_CADN2
+signal LDT_RX_CADN3
+signal LDT_RX_CADN4
+signal LDT_RX_CADN5
+signal LDT_RX_CADN6
+signal LDT_RX_CADN7
+signal LDT_RESET_L
+signal LDT_PWROK
+signal IO_WR_L
+signal IO_RW
+signal IO_RDY
+signal IO_OE_L
+signal IO_CS_L0
+signal IO_CS_L1
+signal IO_CS_L2
+signal IO_CS_L3
+signal IO_CS_L4
+signal IO_CS_L5
+signal IO_CS_L6
+signal IO_CS_L7
+signal IO_CLK100
+signal IO_ALE
+signal IO_AD0
+signal IO_AD1
+signal IO_AD2
+signal IO_AD3
+signal IO_AD4
+signal IO_AD5
+signal IO_AD6
+signal IO_AD7
+signal IO_AD8
+signal IO_AD9
+signal IO_AD10
+signal IO_AD11
+signal IO_AD12
+signal IO_AD13
+signal IO_AD14
+signal IO_AD15
+signal IO_AD16
+signal IO_AD17
+signal IO_AD18
+signal IO_AD19
+signal IO_AD20
+signal IO_AD21
+signal IO_AD22
+signal IO_AD23
+signal IO_AD24
+signal IO_AD25
+signal IO_AD26
+signal IO_AD27
+signal IO_AD28
+signal IO_AD29
+signal IO_AD30
+signal IO_AD31
+signal GPIO0
+signal GPIO1
+signal GPIO2
+signal GPIO3
+signal GPIO4
+signal GPIO5
+signal GPIO6
+signal GPIO7
+signal GPIO8
+signal GPIO9
+signal GPIO10
+signal GPIO11
+signal GPIO12
+signal GPIO13
+signal GPIO14
+signal GPIO15
+signal E2_TXER
+signal E2_TXEN
+signal E2_TXD0
+signal E2_TXD1
+signal E2_TXD2
+signal E2_TXD3
+signal E2_TXD4
+signal E2_TXD5
+signal E2_TXD6
+signal E2_TXD7
+signal E2_TCLKO
+signal E2_TCLKI
+signal E2_RXER
+signal E2_RXDV
+signal E2_RXD0
+signal E2_RXD1
+signal E2_RXD2
+signal E2_RXD3
+signal E2_RXD4
+signal E2_RXD5
+signal E2_RXD6
+signal E2_RXD7
+signal E2_RCLK
+signal E2_MDIO
+signal E2_MDC
+signal E2_GENO
+signal E2_CRS
+signal E2_COL
+signal E1_TXER
+signal E1_TXEN
+signal E1_TXD0
+signal E1_TXD1
+signal E1_TXD2
+signal E1_TXD3
+signal E1_TXD4
+signal E1_TXD5
+signal E1_TXD6
+signal E1_TXD7
+signal E1_TCLKO
+signal E1_TCLKI
+signal E1_RXER
+signal E1_RXDV
+signal E1_RXD0
+signal E1_RXD1
+signal E1_RXD2
+signal E1_RXD3
+signal E1_RXD4
+signal E1_RXD5
+signal E1_RXD6
+signal E1_RXD7
+signal E1_RCLK
+signal E1_MDIO
+signal E1_MDC
+signal E1_GENO
+signal E1_CRS
+signal E1_COL
+signal E0_TXER
+signal E0_TXEN
+signal E0_TXD0
+signal E0_TXD1
+signal E0_TXD2
+signal E0_TXD3
+signal E0_TXD4
+signal E0_TXD5
+signal E0_TXD6
+signal E0_TXD7
+signal E0_TCLKO
+signal E0_TCLKI
+signal E0_RXER
+signal E0_RXDV
+signal E0_RXD0
+signal E0_RXD1
+signal E0_RXD2
+signal E0_RXD3
+signal E0_RXD4
+signal E0_RXD5
+signal E0_RXD6
+signal E0_RXD7
+signal E0_RCLK
+signal E0_MDIO
+signal E0_MDC
+signal E0_GENO
+signal E0_CRS
+signal E0_COL
+signal DEBUG_L
+signal COLDRES_L
+signal CLK100P
+signal CLK100N
+signal GND0
+signal GND1
+signal GND2
+signal GND3
+signal GND4
+signal GND5
+signal GND6
+signal GND7
+signal GND8
+signal GND9
+signal GND10
+signal GND11
+signal GND12
+signal GND13
+signal GND14
+signal GND15
+signal GND16
+signal GND17
+signal GND18
+signal GND19
+signal GND20
+signal GND21
+signal GND22
+signal GND23
+signal GND24
+signal GND25
+signal GND26
+signal GND27
+signal GND28
+signal GND29
+signal GND30
+signal GND31
+signal GND32
+signal GND33
+signal GND34
+signal GND35
+signal GND36
+signal GND37
+signal GND38
+signal GND39
+signal GND40
+signal GND41
+signal GND42
+signal GND43
+signal GND44
+signal GND45
+signal GND46
+signal GND47
+signal GND48
+signal GND49
+signal GND50
+signal GND51
+signal GND52
+signal GND53
+signal GND54
+signal GND55
+signal GND56
+signal GND57
+signal GND58
+signal GND59
+signal GND60
+signal GND61
+signal GND62
+signal GND63
+signal GND64
+signal GND65
+signal GND66
+signal GND67
+signal GND68
+signal GND69
+signal GND70
+signal GND71
+signal GND72
+signal GND73
+signal GND74
+signal GND75
+signal GND76
+signal GND77
+signal GND78
+signal GND79
+signal GND80
+signal GND81
+signal GND82
+signal GND83
+signal GND84
+signal GND85
+signal GND86
+signal GND87
+signal GND88
+signal GND89
+signal GND90
+signal GND91
+signal GND92
+signal GND93
+signal GND94
+signal GND95
+signal GND96
+signal GND97
+signal GND98
+signal GND99
+signal GND100
+signal GND101
+signal GND102
+signal GND103
+signal GND104
+signal GND105
+signal GND106
+signal GND107
+signal GND108
+signal GND109
+signal GND110
+signal GND111
+signal GND112
+signal GND113
+signal GND114
+signal GND115
+signal GND116
+signal GND117
+signal GND118
+signal GND119
+signal GND120
+signal GND121
+signal GND122
+signal GND123
+signal GND124
+signal GND125
+signal GND126
+signal GND127
+signal GND128
+signal GND129
+signal GND130
+signal GND131
+signal GND132
+signal GND133
+signal GND134
+signal GND135
+signal GND136
+signal GND137
+signal GND138
+signal GND139
+signal GND140
+signal GND141
+signal GND142
+signal GND143
+signal GND144
+signal GND145
+signal GND146
+signal GND147
+signal GND148
+signal GND149
+signal GND150
+signal GND151
+signal GND152
+signal GND153
+signal GND154
+signal GND155
+signal GND156
+signal GND157
+signal GND158
+signal GND159
+signal GND160
+signal GND161
+signal GND162
+signal GND163
+signal GND164
+signal GND165
+signal GND166
+signal GND167
+signal GND168
+signal GND169
+signal GND170
+signal GND171
+signal GND172
+signal GND173
+signal GND174
+signal GND175
+signal GND176
+signal GND177
+signal GND178
+signal GND179
+signal GND180
+signal LDT_RX_CAL0
+signal LDT_RX_CAL1
+signal LDT_RX_CLKN
+signal LDT_RX_CLKP
+signal LDT_TX_CAL0
+signal LDT_TX_CAL1
+signal M0_VREF
+signal M1_VREF
+signal TEMPN
+signal TEMPP
+signal VDDCORE0
+signal VDDCORE1
+signal VDDCORE2
+signal VDDCORE3
+signal VDDCORE4
+signal VDDCORE5
+signal VDDCORE6
+signal VDDCORE7
+signal VDDCORE8
+signal VDDCORE9
+signal VDDCORE10
+signal VDDCORE11
+signal VDDCORE12
+signal VDDCORE13
+signal VDDCORE14
+signal VDDCORE15
+signal VDDCORE16
+signal VDDCORE17
+signal VDDCORE18
+signal VDDCORE19
+signal VDDCORE20
+signal VDDCORE21
+signal VDDCORE22
+signal VDDCORE23
+signal VDDCORE24
+signal VDDCORE25
+signal VDDCORE26
+signal VDDCORE27
+signal VDDCORE28
+signal VDDCORE29
+signal VDDCORE30
+signal VDDCORE31
+signal VDDCORE32
+signal VDDCORE33
+signal VDDCORE34
+signal VDDCORE35
+signal VDDCORE36
+signal VDDCORE37
+signal VDDCORE38
+signal VDDCORE39
+signal VDDCORE40
+signal VDDCORE41
+signal VDDCORE42
+signal VDDCORE43
+signal VDDCORE44
+signal VDDCORE45
+signal VDDCORE46
+signal VDDIO0
+signal VDDIO1
+signal VDDIO2
+signal VDDIO3
+signal VDDIO4
+signal VDDIO5
+signal VDDIO6
+signal VDDIO7
+signal VDDIO8
+signal VDDIO9
+signal VDDIO10
+signal VDDIO11
+signal VDDIO12
+signal VDDIO13
+signal VDDIO14
+signal VDDIO15
+signal VDDIO16
+signal VDDIO17
+signal VDDIO18
+signal VDDIO19
+signal VDDIO20
+signal VDDIO21
+signal VDDIO22
+signal VDDIO23
+signal VDDIO24
+signal VDDIO25
+signal VDDIO26
+signal VDDIO27
+signal VDDIO28
+signal VDDIO29
+signal VDDIO30
+signal VDDIO31
+signal VDDIO32
+signal VDDIO33
+signal VDDIO34
+signal VDDIO35
+signal VDDIO36
+signal VDDIO37
+signal VDDIO38
+signal VDDIO39
+signal VDDIO40
+signal VDDIO41
+signal VDDIO42
+signal VDDIO43
+signal VDDIO44
+signal VDDIO45
+signal VDDIO46
+signal VDDIO47
+signal VDDIO48
+signal VDDIO49
+signal VDDIO50
+signal VDDIO51
+signal VDDIO52
+signal VDDIO53
+signal VDDIO54
+signal VDDIO55
+signal VDDLDT0
+signal VDDLDT1
+signal VDDLDT2
+signal VDDLDT3
+signal VDDLDT4
+signal VDDLDT5
+signal VDDLDT6
+signal VDDLDT7
+signal VDDLDT8
+signal VDDLDT9
+signal VDDLDT10
+signal VDDLDT11
+signal VDDLDT12
+signal VDDLDT13
+signal VDDLDT14
+signal VDDLDT15
+signal VDDLDT16
+signal VDDLDT17
+signal VDDLDT18
+signal VDDMEM0
+signal VDDMEM1
+signal VDDMEM2
+signal VDDMEM3
+signal VDDMEM4
+signal VDDMEM5
+signal VDDMEM6
+signal VDDMEM7
+signal VDDMEM8
+signal VDDMEM9
+signal VDDMEM10
+signal VDDMEM11
+signal VDDMEM12
+signal VDDMEM13
+signal VDDMEM14
+signal VDDMEM15
+signal VDDMEM16
+signal VDDMEM17
+signal VDDMEM18
+signal VDDMEM19
+signal VDDMEM20
+signal VDDMEM21
+signal VDDMEM22
+signal VDDMEM23
+signal VDDMEM24
+signal VDDMEM25
+signal VDDMEM26
+signal VDDMEM27
+signal VDDMEM28
+signal VDDMEM29
+signal VDDMEM30
+signal VDDMEM31
+signal VDDMEM32
+signal VDDMEM33
+signal VDDMEM34
+signal VDDMEM35
+signal VDDMEM36
+signal VDDMEM37
+signal VDDMEM38
+signal VDDMEM39
+signal VDDMEM40
+signal VDDMEM41
+signal VDDMEM42
+signal VDDMEM43
+signal VDDMEM44
+signal VDDMEM45
+signal VDDMEM46
+signal VDDMEM47
+signal VDDMEM48
+
+register BSR 1434
+register BR 1
+register DIR 32
+register CTRL 12
+register DATAR 277
+register ADDRR 77
+register SCD 64
+register IMP 32
+
+
+instruction length 6
+
+instruction EXTEST 000000 BSR
+instruction IDCODE 000001 DIR
+instruction SAMPLE/PRELOAD 111101 BSR
+instruction BYPASS 111111 BR
+instruction CONTROLL 001010 CTRL
+instruction DATA 001001 DATAR
+instruction ADDR 001000 ADDRR
+instruction SCANSCD 110110 SCD
+instruction IMPCODE 000011 IMP
+
+bit 1433 O 0 *
+bit 1432 O 0 *
+bit 1431 O 0 *
+bit 1430 O 0 *
+bit 1429 O 0 *
+bit 1428 O 0 *
+bit 1427 O 0 *
+bit 1426 O 0 *
+bit 1425 O 0 *
+bit 1424 O 0 *
+bit 1423 O 0 *
+bit 1422 O 0 *
+bit 1421 O 0 *
+bit 1420 O 0 *
+bit 1419 O 0 *
+bit 1418 O 0 *
+bit 1417 C 0 *
+bit 1416 O 0 *
+bit 1415 O 0 *
+bit 1414 I 1 LDT_RX_CTLP
+bit 1413 I 1 LDT_RX_CTLN
+bit 1412 O 1 LDT_TX_CADP0 1417 0 Z
+bit 1411 O 1 LDT_TX_CADN0 1417 0 Z
+bit 1410 I 1 LDT_RX_CADP7
+bit 1409 I 1 LDT_RX_CADN7
+bit 1408 O 1 LDT_TX_CADP1 1417 0 Z
+bit 1407 O 1 LDT_TX_CADN1 1417 0 Z
+bit 1406 I 1 LDT_RX_CADP6
+bit 1405 I 1 LDT_RX_CADN6
+bit 1404 O 1 LDT_TX_CADP2 1417 0 Z
+bit 1403 O 1 LDT_TX_CADN2 1417 0 Z
+bit 1402 I 1 LDT_RX_CADP5
+bit 1401 I 1 LDT_RX_CADN5
+bit 1400 O 1 LDT_TX_CADP3 1417 0 Z
+bit 1399 O 1 LDT_TX_CADN3 1417 0 Z
+bit 1398 I 1 LDT_RX_CADP4
+bit 1397 I 1 LDT_RX_CADN4
+bit 1396 O 1 LDT_TX_CLKP 1417 0 Z
+bit 1395 O 1 LDT_TX_CLKN 1417 0 Z
+bit 1394 O 1 LDT_TX_CADP4 1417 0 Z
+bit 1393 O 1 LDT_TX_CADN4 1417 0 Z
+bit 1392 I 1 LDT_RX_CADP3
+bit 1391 I 1 LDT_RX_CADN3
+bit 1390 O 1 LDT_TX_CADP5 1417 0 Z
+bit 1389 O 1 LDT_TX_CADN5 1417 0 Z
+bit 1388 I 1 LDT_RX_CADP2
+bit 1387 I 1 LDT_RX_CADN2
+bit 1386 O 1 LDT_TX_CADP6 1417 0 Z
+bit 1385 O 1 LDT_TX_CADN6 1417 0 Z
+bit 1384 I 1 LDT_RX_CADP1
+bit 1383 I 1 LDT_RX_CADN1
+bit 1382 O 1 LDT_TX_CADP7 1417 0 Z
+bit 1381 O 1 LDT_TX_CADN7 1417 0 Z
+bit 1380 I 1 LDT_RX_CADP0
+bit 1379 I 1 LDT_RX_CADN0
+bit 1378 O 1 LDT_TX_CTLP 1417 0 Z
+bit 1377 O 1 LDT_TX_CTLN 1417 0 Z
+bit 1376 O 1 LDT_PWROK 1375 0 Z
+bit 1375 C 0 *
+bit 1374 I 1 LDT_PWROK
+bit 1373 O 1 LDT_RESET_L 1372 0 Z
+bit 1372 C 0 *
+bit 1371 I 1 LDT_RESET_L
+bit 1370 O 1 M1_DQ0 1369 0 Z
+bit 1369 C 0 *
+bit 1368 I 1 M1_DQ0
+bit 1367 O 1 M1_DQ1 1366 0 Z
+bit 1366 C 0 *
+bit 1365 I 1 M1_DQ1
+bit 1364 O 1 M1_DQ2 1363 0 Z
+bit 1363 C 0 *
+bit 1362 I 1 M1_DQ2
+bit 1361 O 1 M1_DQ3 1360 0 Z
+bit 1360 C 0 *
+bit 1359 I 1 M1_DQ3
+bit 1358 O 1 M1_DQS0 1357 0 Z
+bit 1357 C 0 *
+bit 1356 I 1 M1_DQS0
+bit 1355 O 1 M1_DQ4 1354 0 Z
+bit 1354 C 0 *
+bit 1353 I 1 M1_DQ4
+bit 1352 O 1 M1_DQ5 1351 0 Z
+bit 1351 C 0 *
+bit 1350 I 1 M1_DQ5
+bit 1349 O 1 M1_DQ6 1348 0 Z
+bit 1348 C 0 *
+bit 1347 I 1 M1_DQ6
+bit 1346 O 1 M1_DQ7 1345 0 Z
+bit 1345 C 0 *
+bit 1344 I 1 M1_DQ7
+bit 1343 O 1 M1_DQ8 1342 0 Z
+bit 1342 C 0 *
+bit 1341 I 1 M1_DQ8
+bit 1340 O 1 M1_DQ9 1339 0 Z
+bit 1339 C 0 *
+bit 1338 I 1 M1_DQ9
+bit 1337 O 1 M1_DQ10 1336 0 Z
+bit 1336 C 0 *
+bit 1335 I 1 M1_DQ10
+bit 1334 O 1 M1_DQ11 1333 0 Z
+bit 1333 C 0 *
+bit 1332 I 1 M1_DQ11
+bit 1331 O 1 M1_DQS1 1330 0 Z
+bit 1330 C 0 *
+bit 1329 I 1 M1_DQS1
+bit 1328 O 1 M1_DQ12 1327 0 Z
+bit 1327 C 0 *
+bit 1326 I 1 M1_DQ12
+bit 1325 O 1 M1_DQ13 1324 0 Z
+bit 1324 C 0 *
+bit 1323 I 1 M1_DQ13
+bit 1322 O 1 M1_DQ14 1321 0 Z
+bit 1321 C 0 *
+bit 1320 I 1 M1_DQ14
+bit 1319 O 1 M1_DQ15 1318 0 Z
+bit 1318 C 0 *
+bit 1317 I 1 M1_DQ15
+bit 1316 O 1 M1_DQ16 1315 0 Z
+bit 1315 C 0 *
+bit 1314 I 1 M1_DQ16
+bit 1313 O 1 M1_DQ17 1312 0 Z
+bit 1312 C 0 *
+bit 1311 I 1 M1_DQ17
+bit 1310 O 1 M1_DQ18 1309 0 Z
+bit 1309 C 0 *
+bit 1308 I 1 M1_DQ18
+bit 1307 O 1 M1_DQ19 1306 0 Z
+bit 1306 C 0 *
+bit 1305 I 1 M1_DQ19
+bit 1304 O 1 M1_DQS2 1303 0 Z
+bit 1303 C 0 *
+bit 1302 I 1 M1_DQS2
+bit 1301 O 1 M1_DQ20 1300 0 Z
+bit 1300 C 0 *
+bit 1299 I 1 M1_DQ20
+bit 1298 O 1 M1_DQ21 1297 0 Z
+bit 1297 C 0 *
+bit 1296 I 1 M1_DQ21
+bit 1295 O 1 M1_DQ22 1294 0 Z
+bit 1294 C 0 *
+bit 1293 I 1 M1_DQ22
+bit 1292 O 1 M1_DQ23 1291 0 Z
+bit 1291 C 0 *
+bit 1290 I 1 M1_DQ23
+bit 1289 O 1 M1_DQ24 1288 0 Z
+bit 1288 C 0 *
+bit 1287 I 1 M1_DQ24
+bit 1286 O 1 M1_DQ25 1285 0 Z
+bit 1285 C 0 *
+bit 1284 I 1 M1_DQ25
+bit 1283 O 1 M1_DQ26 1282 0 Z
+bit 1282 C 0 *
+bit 1281 I 1 M1_DQ26
+bit 1280 O 1 M1_DQ27 1279 0 Z
+bit 1279 C 0 *
+bit 1278 I 1 M1_DQ27
+bit 1277 O 1 M1_DQS3 1276 0 Z
+bit 1276 C 0 *
+bit 1275 I 1 M1_DQS3
+bit 1274 O 1 M1_DQ28 1273 0 Z
+bit 1273 C 0 *
+bit 1272 I 1 M1_DQ28
+bit 1271 O 1 M1_DQ29 1270 0 Z
+bit 1270 C 0 *
+bit 1269 I 1 M1_DQ29
+bit 1268 O 1 M1_DQ30 1267 0 Z
+bit 1267 C 0 *
+bit 1266 I 1 M1_DQ30
+bit 1265 O 1 M1_DQ31 1264 0 Z
+bit 1264 C 0 *
+bit 1263 I 1 M1_DQ31
+bit 1262 O 1 M1_A12 1261 0 Z
+bit 1261 C 0 *
+bit 1260 O 0 *
+bit 1259 O 1 M1_A8 1258 0 Z
+bit 1258 C 0 *
+bit 1257 O 0 *
+bit 1256 O 1 M1_A11 1255 0 Z
+bit 1255 C 0 *
+bit 1254 O 0 *
+bit 1253 O 1 M1_A5 1252 0 Z
+bit 1252 C 0 *
+bit 1251 O 0 *
+bit 1250 O 1 M1_A9 1249 0 Z
+bit 1249 C 0 *
+bit 1248 O 0 *
+bit 1247 O 1 M1_A6 1246 0 Z
+bit 1246 C 0 *
+bit 1245 O 0 *
+bit 1244 O 1 M1_A7 1243 0 Z
+bit 1243 C 0 *
+bit 1242 O 0 *
+bit 1241 O 1 M1_A2 1240 0 Z
+bit 1240 C 0 *
+bit 1239 O 0 *
+bit 1238 O 1 M1_A4 1237 0 Z
+bit 1237 C 0 *
+bit 1236 O 0 *
+bit 1235 O 1 M1_A1 1234 0 Z
+bit 1234 C 0 *
+bit 1233 O 0 *
+bit 1232 O 1 M1_A3 1231 0 Z
+bit 1231 C 0 *
+bit 1230 O 0 *
+bit 1229 O 1 M1_BA1 1228 0 Z
+bit 1228 C 0 *
+bit 1227 O 0 *
+bit 1226 O 1 M1_A0 1225 0 Z
+bit 1225 C 0 *
+bit 1224 O 0 *
+bit 1223 O 1 M1_WE_L 1222 0 Z
+bit 1222 C 0 *
+bit 1221 O 0 *
+bit 1220 O 1 M1_A10 1219 0 Z
+bit 1219 C 0 *
+bit 1218 O 0 *
+bit 1217 O 1 M1_CAS_L 1216 0 Z
+bit 1216 C 0 *
+bit 1215 O 0 *
+bit 1214 O 1 M1_BA0 1213 0 Z
+bit 1213 C 0 *
+bit 1212 O 0 *
+bit 1211 O 1 M1_CS_L1 1210 0 Z
+bit 1210 C 0 *
+bit 1209 O 0 *
+bit 1208 O 1 M1_CS_L0 1207 0 Z
+bit 1207 C 0 *
+bit 1206 O 0 *
+bit 1205 O 1 M1_CS_L2 1204 0 Z
+bit 1204 C 0 *
+bit 1203 O 0 *
+bit 1202 O 1 M1_RAS_L 1201 0 Z
+bit 1201 C 0 *
+bit 1200 O 0 *
+bit 1199 O 1 M1_CS_L3 1198 0 Z
+bit 1198 C 0 *
+bit 1197 O 0 *
+bit 1196 O 1 M1_CLK 1195 0 Z
+bit 1195 C 0 *
+bit 1194 O 0 *
+bit 1193 O 1 M1_CKE 1192 0 Z
+bit 1192 C 0 *
+bit 1191 O 0 *
+bit 1190 O 1 M1_CLK_L 1189 0 Z
+bit 1189 C 0 *
+bit 1188 O 0 *
+bit 1187 O 1 M1_ECC0 1186 0 Z
+bit 1186 C 0 *
+bit 1185 I 1 M1_ECC0
+bit 1184 O 1 M1_ECC1 1183 0 Z
+bit 1183 C 0 *
+bit 1182 I 1 M1_ECC1
+bit 1181 O 1 M1_ECC2 1180 0 Z
+bit 1180 C 0 *
+bit 1179 I 1 M1_ECC2
+bit 1178 O 1 M1_ECC3 1177 0 Z
+bit 1177 C 0 *
+bit 1176 I 1 M1_ECC3
+bit 1175 O 1 M1_DQS8 1174 0 Z
+bit 1174 C 0 *
+bit 1173 I 1 M1_DQS8
+bit 1172 O 1 M1_ECC4 1171 0 Z
+bit 1171 C 0 *
+bit 1170 I 1 M1_ECC4
+bit 1169 O 1 M1_ECC5 1168 0 Z
+bit 1168 C 0 *
+bit 1167 I 1 M1_ECC5
+bit 1166 O 1 M1_ECC6 1165 0 Z
+bit 1165 C 0 *
+bit 1164 I 1 M1_ECC6
+bit 1163 O 1 M1_ECC7 1162 0 Z
+bit 1162 C 0 *
+bit 1161 I 1 M1_ECC7
+bit 1160 O 1 M1_DQ32 1159 0 Z
+bit 1159 C 0 *
+bit 1158 I 1 M1_DQ32
+bit 1157 O 1 M1_DQ33 1156 0 Z
+bit 1156 C 0 *
+bit 1155 I 1 M1_DQ33
+bit 1154 O 1 M1_DQ34 1153 0 Z
+bit 1153 C 0 *
+bit 1152 I 1 M1_DQ34
+bit 1151 O 1 M1_DQ35 1150 0 Z
+bit 1150 C 0 *
+bit 1149 I 1 M1_DQ35
+bit 1148 O 1 M1_DQS4 1147 0 Z
+bit 1147 C 0 *
+bit 1146 I 1 M1_DQS4
+bit 1145 O 1 M1_DQ36 1144 0 Z
+bit 1144 C 0 *
+bit 1143 I 1 M1_DQ36
+bit 1142 O 1 M1_DQ37 1141 0 Z
+bit 1141 C 0 *
+bit 1140 I 1 M1_DQ37
+bit 1139 O 1 M1_DQ38 1138 0 Z
+bit 1138 C 0 *
+bit 1137 I 1 M1_DQ38
+bit 1136 O 1 M1_DQ39 1135 0 Z
+bit 1135 C 0 *
+bit 1134 I 1 M1_DQ39
+bit 1133 O 1 M1_DQ40 1132 0 Z
+bit 1132 C 0 *
+bit 1131 I 1 M1_DQ40
+bit 1130 O 1 M1_DQ41 1129 0 Z
+bit 1129 C 0 *
+bit 1128 I 1 M1_DQ41
+bit 1127 O 1 M1_DQ42 1126 0 Z
+bit 1126 C 0 *
+bit 1125 I 1 M1_DQ42
+bit 1124 O 1 M1_DQ43 1123 0 Z
+bit 1123 C 0 *
+bit 1122 I 1 M1_DQ43
+bit 1121 O 1 M1_DQS5 1120 0 Z
+bit 1120 C 0 *
+bit 1119 I 1 M1_DQS5
+bit 1118 O 1 M1_DQ44 1117 0 Z
+bit 1117 C 0 *
+bit 1116 I 1 M1_DQ44
+bit 1115 O 1 M1_DQ45 1114 0 Z
+bit 1114 C 0 *
+bit 1113 I 1 M1_DQ45
+bit 1112 O 1 M1_DQ46 1111 0 Z
+bit 1111 C 0 *
+bit 1110 I 1 M1_DQ46
+bit 1109 O 1 M1_DQ47 1108 0 Z
+bit 1108 C 0 *
+bit 1107 I 1 M1_DQ47
+bit 1106 O 1 M1_DQ48 1105 0 Z
+bit 1105 C 0 *
+bit 1104 I 1 M1_DQ48
+bit 1103 O 1 M1_DQ49 1102 0 Z
+bit 1102 C 0 *
+bit 1101 I 1 M1_DQ49
+bit 1100 O 1 M1_DQ50 1099 0 Z
+bit 1099 C 0 *
+bit 1098 I 1 M1_DQ50
+bit 1097 O 1 M1_DQ51 1096 0 Z
+bit 1096 C 0 *
+bit 1095 I 1 M1_DQ51
+bit 1094 O 1 M1_DQS6 1093 0 Z
+bit 1093 C 0 *
+bit 1092 I 1 M1_DQS6
+bit 1091 O 1 M1_DQ52 1090 0 Z
+bit 1090 C 0 *
+bit 1089 I 1 M1_DQ52
+bit 1088 O 1 M1_DQ53 1087 0 Z
+bit 1087 C 0 *
+bit 1086 I 1 M1_DQ53
+bit 1085 O 1 M1_DQ54 1084 0 Z
+bit 1084 C 0 *
+bit 1083 I 1 M1_DQ54
+bit 1082 O 1 M1_DQ55 1081 0 Z
+bit 1081 C 0 *
+bit 1080 I 1 M1_DQ55
+bit 1079 O 1 M1_DQ56 1078 0 Z
+bit 1078 C 0 *
+bit 1077 I 1 M1_DQ56
+bit 1076 O 1 M1_DQ57 1075 0 Z
+bit 1075 C 0 *
+bit 1074 I 1 M1_DQ57
+bit 1073 O 1 M1_DQ58 1072 0 Z
+bit 1072 C 0 *
+bit 1071 I 1 M1_DQ58
+bit 1070 O 1 M1_DQ59 1069 0 Z
+bit 1069 C 0 *
+bit 1068 I 1 M1_DQ59
+bit 1067 O 1 M1_DQS7 1066 0 Z
+bit 1066 C 0 *
+bit 1065 I 1 M1_DQS7
+bit 1064 O 1 M1_DQ60 1063 0 Z
+bit 1063 C 0 *
+bit 1062 I 1 M1_DQ60
+bit 1061 O 1 M1_DQ61 1060 0 Z
+bit 1060 C 0 *
+bit 1059 I 1 M1_DQ61
+bit 1058 O 1 M1_DQ62 1057 0 Z
+bit 1057 C 0 *
+bit 1056 I 1 M1_DQ62
+bit 1055 O 1 M1_DQ63 1054 0 Z
+bit 1054 C 0 *
+bit 1053 I 1 M1_DQ63
+bit 1052 O 1 M0_DQ63 1051 0 Z
+bit 1051 C 0 *
+bit 1050 I 1 M0_DQ63
+bit 1049 O 1 M0_DQ62 1048 0 Z
+bit 1048 C 0 *
+bit 1047 I 1 M0_DQ62
+bit 1046 O 1 M0_DQ61 1045 0 Z
+bit 1045 C 0 *
+bit 1044 I 1 M0_DQ61
+bit 1043 O 1 M0_DQ60 1042 0 Z
+bit 1042 C 0 *
+bit 1041 I 1 M0_DQ60
+bit 1040 O 1 M0_DQS7 1039 0 Z
+bit 1039 C 0 *
+bit 1038 I 1 M0_DQS7
+bit 1037 O 1 M0_DQ59 1036 0 Z
+bit 1036 C 0 *
+bit 1035 I 1 M0_DQ59
+bit 1034 O 1 M0_DQ58 1033 0 Z
+bit 1033 C 0 *
+bit 1032 I 1 M0_DQ58
+bit 1031 O 1 M0_DQ57 1030 0 Z
+bit 1030 C 0 *
+bit 1029 I 1 M0_DQ57
+bit 1028 O 1 M0_DQ56 1027 0 Z
+bit 1027 C 0 *
+bit 1026 I 1 M0_DQ56
+bit 1025 O 1 M0_DQ55 1024 0 Z
+bit 1024 C 0 *
+bit 1023 I 1 M0_DQ55
+bit 1022 O 1 M0_DQ54 1021 0 Z
+bit 1021 C 0 *
+bit 1020 I 1 M0_DQ54
+bit 1019 O 1 M0_DQ53 1018 0 Z
+bit 1018 C 0 *
+bit 1017 I 1 M0_DQ53
+bit 1016 O 1 M0_DQ52 1015 0 Z
+bit 1015 C 0 *
+bit 1014 I 1 M0_DQ52
+bit 1013 O 1 M0_DQS6 1012 0 Z
+bit 1012 C 0 *
+bit 1011 I 1 M0_DQS6
+bit 1010 O 1 M0_DQ51 1009 0 Z
+bit 1009 C 0 *
+bit 1008 I 1 M0_DQ51
+bit 1007 O 1 M0_DQ50 1006 0 Z
+bit 1006 C 0 *
+bit 1005 I 1 M0_DQ50
+bit 1004 O 1 M0_DQ49 1003 0 Z
+bit 1003 C 0 *
+bit 1002 I 1 M0_DQ49
+bit 1001 O 1 M0_DQ48 1000 0 Z
+bit 1000 C 0 *
+bit 999 I 1 M0_DQ48
+bit 998 O 1 M0_DQ47 997 0 Z
+bit 997 C 0 *
+bit 996 I 1 M0_DQ47
+bit 995 O 1 M0_DQ46 994 0 Z
+bit 994 C 0 *
+bit 993 I 1 M0_DQ46
+bit 992 O 1 M0_DQ45 991 0 Z
+bit 991 C 0 *
+bit 990 I 1 M0_DQ45
+bit 989 O 1 M0_DQ44 988 0 Z
+bit 988 C 0 *
+bit 987 I 1 M0_DQ44
+bit 986 O 1 M0_DQS5 985 0 Z
+bit 985 C 0 *
+bit 984 I 1 M0_DQS5
+bit 983 O 1 M0_DQ43 982 0 Z
+bit 982 C 0 *
+bit 981 I 1 M0_DQ43
+bit 980 O 1 M0_DQ42 979 0 Z
+bit 979 C 0 *
+bit 978 I 1 M0_DQ42
+bit 977 O 1 M0_DQ41 976 0 Z
+bit 976 C 0 *
+bit 975 I 1 M0_DQ41
+bit 974 O 1 M0_DQ40 973 0 Z
+bit 973 C 0 *
+bit 972 I 1 M0_DQ40
+bit 971 O 1 M0_DQ39 970 0 Z
+bit 970 C 0 *
+bit 969 I 1 M0_DQ39
+bit 968 O 1 M0_DQ38 967 0 Z
+bit 967 C 0 *
+bit 966 I 1 M0_DQ38
+bit 965 O 1 M0_DQ37 964 0 Z
+bit 964 C 0 *
+bit 963 I 1 M0_DQ37
+bit 962 O 1 M0_DQ36 961 0 Z
+bit 961 C 0 *
+bit 960 I 1 M0_DQ36
+bit 959 O 1 M0_DQS4 958 0 Z
+bit 958 C 0 *
+bit 957 I 1 M0_DQS4
+bit 956 O 1 M0_DQ35 955 0 Z
+bit 955 C 0 *
+bit 954 I 1 M0_DQ35
+bit 953 O 1 M0_DQ34 952 0 Z
+bit 952 C 0 *
+bit 951 I 1 M0_DQ34
+bit 950 O 1 M0_DQ33 949 0 Z
+bit 949 C 0 *
+bit 948 I 1 M0_DQ33
+bit 947 O 1 M0_DQ32 946 0 Z
+bit 946 C 0 *
+bit 945 I 1 M0_DQ32
+bit 944 O 1 M0_ECC7 943 0 Z
+bit 943 C 0 *
+bit 942 I 1 M0_ECC7
+bit 941 O 1 M0_ECC6 940 0 Z
+bit 940 C 0 *
+bit 939 I 1 M0_ECC6
+bit 938 O 1 M0_ECC5 937 0 Z
+bit 937 C 0 *
+bit 936 I 1 M0_ECC5
+bit 935 O 1 M0_ECC4 934 0 Z
+bit 934 C 0 *
+bit 933 I 1 M0_ECC4
+bit 932 O 1 M0_DQS8 931 0 Z
+bit 931 C 0 *
+bit 930 I 1 M0_DQS8
+bit 929 O 1 M0_ECC3 928 0 Z
+bit 928 C 0 *
+bit 927 I 1 M0_ECC3
+bit 926 O 1 M0_ECC2 925 0 Z
+bit 925 C 0 *
+bit 924 I 1 M0_ECC2
+bit 923 O 1 M0_ECC1 922 0 Z
+bit 922 C 0 *
+bit 921 I 1 M0_ECC1
+bit 920 O 1 M0_ECC0 919 0 Z
+bit 919 C 0 *
+bit 918 I 1 M0_ECC0
+bit 917 O 1 M0_CS_L3 916 0 Z
+bit 916 C 0 *
+bit 915 O 0 *
+bit 914 O 1 M0_CLK_L 913 0 Z
+bit 913 C 0 *
+bit 912 O 0 *
+bit 911 O 1 M0_CKE 910 0 Z
+bit 910 C 0 *
+bit 909 O 0 *
+bit 908 O 1 M0_CLK 907 0 Z
+bit 907 C 0 *
+bit 906 O 0 *
+bit 905 O 1 M0_CS_L2 904 0 Z
+bit 904 C 0 *
+bit 903 O 0 *
+bit 902 O 1 M0_RAS_L 901 0 Z
+bit 901 C 0 *
+bit 900 O 0 *
+bit 899 O 1 M0_CS_L1 898 0 Z
+bit 898 C 0 *
+bit 897 O 0 *
+bit 896 O 1 M0_CS_L0 895 0 Z
+bit 895 C 0 *
+bit 894 O 0 *
+bit 893 O 1 M0_CAS_L 892 0 Z
+bit 892 C 0 *
+bit 891 O 0 *
+bit 890 O 1 M0_BA0 889 0 Z
+bit 889 C 0 *
+bit 888 O 0 *
+bit 887 O 1 M0_WE_L 886 0 Z
+bit 886 C 0 *
+bit 885 O 0 *
+bit 884 O 1 M0_A10 883 0 Z
+bit 883 C 0 *
+bit 882 O 0 *
+bit 881 O 1 M0_BA1 880 0 Z
+bit 880 C 0 *
+bit 879 O 0 *
+bit 878 O 1 M0_A2 877 0 Z
+bit 877 C 0 *
+bit 876 O 0 *
+bit 875 O 1 M0_A0 874 0 Z
+bit 874 C 0 *
+bit 873 O 0 *
+bit 872 O 1 M0_A4 871 0 Z
+bit 871 C 0 *
+bit 870 O 0 *
+bit 869 O 1 M0_A1 868 0 Z
+bit 868 C 0 *
+bit 867 O 0 *
+bit 866 O 1 M0_A3 865 0 Z
+bit 865 C 0 *
+bit 864 O 0 *
+bit 863 O 1 M0_A9 862 0 Z
+bit 862 C 0 *
+bit 861 O 0 *
+bit 860 O 1 M0_A6 859 0 Z
+bit 859 C 0 *
+bit 858 O 0 *
+bit 857 O 1 M0_A11 856 0 Z
+bit 856 C 0 *
+bit 855 O 0 *
+bit 854 O 1 M0_A5 853 0 Z
+bit 853 C 0 *
+bit 852 O 0 *
+bit 851 O 1 M0_A7 850 0 Z
+bit 850 C 0 *
+bit 849 O 0 *
+bit 848 O 1 M0_A12 847 0 Z
+bit 847 C 0 *
+bit 846 O 0 *
+bit 845 O 1 M0_A8 844 0 Z
+bit 844 C 0 *
+bit 843 O 0 *
+bit 842 O 1 M0_DQ31 841 0 Z
+bit 841 C 0 *
+bit 840 I 1 M0_DQ31
+bit 839 O 1 M0_DQ30 838 0 Z
+bit 838 C 0 *
+bit 837 I 1 M0_DQ30
+bit 836 O 1 M0_DQ29 835 0 Z
+bit 835 C 0 *
+bit 834 I 1 M0_DQ29
+bit 833 O 1 M0_DQ28 832 0 Z
+bit 832 C 0 *
+bit 831 I 1 M0_DQ28
+bit 830 O 1 M0_DQS3 829 0 Z
+bit 829 C 0 *
+bit 828 I 1 M0_DQS3
+bit 827 O 1 M0_DQ27 826 0 Z
+bit 826 C 0 *
+bit 825 I 1 M0_DQ27
+bit 824 O 1 M0_DQ26 823 0 Z
+bit 823 C 0 *
+bit 822 I 1 M0_DQ26
+bit 821 O 1 M0_DQ25 820 0 Z
+bit 820 C 0 *
+bit 819 I 1 M0_DQ25
+bit 818 O 1 M0_DQ24 817 0 Z
+bit 817 C 0 *
+bit 816 I 1 M0_DQ24
+bit 815 O 1 M0_DQ23 814 0 Z
+bit 814 C 0 *
+bit 813 I 1 M0_DQ23
+bit 812 O 1 M0_DQ22 811 0 Z
+bit 811 C 0 *
+bit 810 I 1 M0_DQ22
+bit 809 O 1 M0_DQ21 808 0 Z
+bit 808 C 0 *
+bit 807 I 1 M0_DQ21
+bit 806 O 1 M0_DQ20 805 0 Z
+bit 805 C 0 *
+bit 804 I 1 M0_DQ20
+bit 803 O 1 M0_DQS2 802 0 Z
+bit 802 C 0 *
+bit 801 I 1 M0_DQS2
+bit 800 O 1 M0_DQ19 799 0 Z
+bit 799 C 0 *
+bit 798 I 1 M0_DQ19
+bit 797 O 1 M0_DQ18 796 0 Z
+bit 796 C 0 *
+bit 795 I 1 M0_DQ18
+bit 794 O 1 M0_DQ17 793 0 Z
+bit 793 C 0 *
+bit 792 I 1 M0_DQ17
+bit 791 O 1 M0_DQ16 790 0 Z
+bit 790 C 0 *
+bit 789 I 1 M0_DQ16
+bit 788 O 1 M0_DQ15 787 0 Z
+bit 787 C 0 *
+bit 786 I 1 M0_DQ15
+bit 785 O 1 M0_DQ14 784 0 Z
+bit 784 C 0 *
+bit 783 I 1 M0_DQ14
+bit 782 O 1 M0_DQ13 781 0 Z
+bit 781 C 0 *
+bit 780 I 1 M0_DQ13
+bit 779 O 1 M0_DQ12 778 0 Z
+bit 778 C 0 *
+bit 777 I 1 M0_DQ12
+bit 776 O 1 M0_DQS1 775 0 Z
+bit 775 C 0 *
+bit 774 I 1 M0_DQS1
+bit 773 O 1 M0_DQ11 772 0 Z
+bit 772 C 0 *
+bit 771 I 1 M0_DQ11
+bit 770 O 1 M0_DQ10 769 0 Z
+bit 769 C 0 *
+bit 768 I 1 M0_DQ10
+bit 767 O 1 M0_DQ9 766 0 Z
+bit 766 C 0 *
+bit 765 I 1 M0_DQ9
+bit 764 O 1 M0_DQ8 763 0 Z
+bit 763 C 0 *
+bit 762 I 1 M0_DQ8
+bit 761 O 1 M0_DQ7 760 0 Z
+bit 760 C 0 *
+bit 759 I 1 M0_DQ7
+bit 758 O 1 M0_DQ6 757 0 Z
+bit 757 C 0 *
+bit 756 I 1 M0_DQ6
+bit 755 O 1 M0_DQ5 754 0 Z
+bit 754 C 0 *
+bit 753 I 1 M0_DQ5
+bit 752 O 1 M0_DQ4 751 0 Z
+bit 751 C 0 *
+bit 750 I 1 M0_DQ4
+bit 749 O 1 M0_DQS0 748 0 Z
+bit 748 C 0 *
+bit 747 I 1 M0_DQS0
+bit 746 O 1 M0_DQ3 745 0 Z
+bit 745 C 0 *
+bit 744 I 1 M0_DQ3
+bit 743 O 1 M0_DQ2 742 0 Z
+bit 742 C 0 *
+bit 741 I 1 M0_DQ2
+bit 740 O 1 M0_DQ1 739 0 Z
+bit 739 C 0 *
+bit 738 I 1 M0_DQ1
+bit 737 O 1 M0_DQ0 736 0 Z
+bit 736 C 0 *
+bit 735 I 1 M0_DQ0
+bit 734 O 0 *
+bit 733 O 0 *
+bit 732 I 1 E0_RXDV
+bit 731 O 1 E0_MDIO 730 0 Z
+bit 730 C 0 *
+bit 729 I 1 E0_MDIO
+bit 728 O 0 *
+bit 727 O 0 *
+bit 726 I 1 E0_RXER
+bit 725 O 1 E0_MDC 724 0 Z
+bit 724 C 0 *
+bit 723 O 0 *
+bit 722 O 0 *
+bit 721 O 0 *
+bit 720 I 1 E0_TCLKI
+bit 719 O 1 E0_TXD0 718 0 Z
+bit 718 C 0 *
+bit 717 O 0 *
+bit 716 O 0 *
+bit 715 O 0 *
+bit 714 I 1 E0_RXD7
+bit 713 O 1 E0_TXD1 712 0 Z
+bit 712 C 0 *
+bit 711 O 0 *
+bit 710 O 0 *
+bit 709 O 0 *
+bit 708 I 1 E0_RXD6
+bit 707 O 1 E0_TXD2 706 0 Z
+bit 706 C 0 *
+bit 705 O 0 *
+bit 704 O 0 *
+bit 703 O 0 *
+bit 702 I 1 E0_RXD5
+bit 701 O 1 E0_TXD3 700 0 Z
+bit 700 C 0 *
+bit 699 O 0 *
+bit 698 O 0 *
+bit 697 O 0 *
+bit 696 I 1 E0_RXD4
+bit 695 O 1 E0_TCLKO 694 0 Z
+bit 694 C 0 *
+bit 693 O 0 *
+bit 692 O 0 *
+bit 691 O 0 *
+bit 690 I 1 E0_RXD3
+bit 689 O 1 E0_TXD4 688 0 Z
+bit 688 C 0 *
+bit 687 O 0 *
+bit 686 O 0 *
+bit 685 O 0 *
+bit 684 I 1 E0_RXD2
+bit 683 O 1 E0_TXD5 682 0 Z
+bit 682 C 0 *
+bit 681 O 0 *
+bit 680 O 0 *
+bit 679 O 0 *
+bit 678 I 1 E0_RXD1
+bit 677 O 1 E0_TXD6 676 0 Z
+bit 676 C 0 *
+bit 675 O 0 *
+bit 674 O 0 *
+bit 673 O 0 *
+bit 672 I 1 E0_RXD0
+bit 671 O 1 E0_TXD7 670 0 Z
+bit 670 C 0 *
+bit 669 O 0 *
+bit 668 O 0 *
+bit 667 O 0 *
+bit 666 I 1 E0_RCLK
+bit 665 O 1 E0_TXER 664 0 Z
+bit 664 C 0 *
+bit 663 O 0 *
+bit 662 O 0 *
+bit 661 O 0 *
+bit 660 I 1 E0_CRS
+bit 659 O 1 E0_GENO 658 0 Z
+bit 658 C 0 *
+bit 657 O 0 *
+bit 656 O 0 *
+bit 655 O 0 *
+bit 654 I 1 E0_COL
+bit 653 O 1 E0_TXEN 652 0 Z
+bit 652 C 0 *
+bit 651 O 0 *
+bit 650 O 0 *
+bit 649 O 0 *
+bit 648 I 1 REFCLK01
+bit 647 O 1 E1_MDC 646 0 Z
+bit 646 C 0 *
+bit 645 O 0 *
+bit 644 O 0 *
+bit 643 O 0 *
+bit 642 I 1 E1_RCLK
+bit 641 O 1 E1_MDIO 640 0 Z
+bit 640 C 0 *
+bit 639 I 1 E1_MDIO
+bit 638 O 0 *
+bit 637 O 0 *
+bit 636 I 1 E1_RXER
+bit 635 O 1 E1_TXD0 634 0 Z
+bit 634 C 0 *
+bit 633 O 0 *
+bit 632 O 0 *
+bit 631 O 0 *
+bit 630 I 1 E1_RXDV
+bit 629 O 1 E1_TXD1 628 0 Z
+bit 628 C 0 *
+bit 627 O 0 *
+bit 626 O 0 *
+bit 625 O 0 *
+bit 624 I 1 E1_RXD7
+bit 623 O 1 E1_TXD2 622 0 Z
+bit 622 C 0 *
+bit 621 O 0 *
+bit 620 O 0 *
+bit 619 O 0 *
+bit 618 I 1 E1_RXD6
+bit 617 O 1 E1_TXD3 616 0 Z
+bit 616 C 0 *
+bit 615 O 0 *
+bit 614 O 0 *
+bit 613 O 0 *
+bit 612 I 1 E1_RXD5
+bit 611 O 1 E1_TCLKO 610 0 Z
+bit 610 C 0 *
+bit 609 O 0 *
+bit 608 O 0 *
+bit 607 O 0 *
+bit 606 I 1 E1_RXD4
+bit 605 O 1 E1_TXD4 604 0 Z
+bit 604 C 0 *
+bit 603 O 0 *
+bit 602 O 0 *
+bit 601 O 0 *
+bit 600 I 1 E1_RXD3
+bit 599 O 1 E1_TXD5 598 0 Z
+bit 598 C 0 *
+bit 597 O 0 *
+bit 596 O 0 *
+bit 595 O 0 *
+bit 594 I 1 E1_RXD2
+bit 593 O 1 E1_TXD6 592 0 Z
+bit 592 C 0 *
+bit 591 O 0 *
+bit 590 O 0 *
+bit 589 O 0 *
+bit 588 I 1 E1_RXD1
+bit 587 O 1 E1_TXD7 586 0 Z
+bit 586 C 0 *
+bit 585 O 0 *
+bit 584 O 0 *
+bit 583 O 0 *
+bit 582 I 1 E1_RXD0
+bit 581 O 1 E1_TXEN 580 0 Z
+bit 580 C 0 *
+bit 579 O 0 *
+bit 578 O 0 *
+bit 577 O 0 *
+bit 576 I 1 E1_TCLKI
+bit 575 O 1 E1_TXER 574 0 Z
+bit 574 C 0 *
+bit 573 O 0 *
+bit 572 O 0 *
+bit 571 O 0 *
+bit 570 I 1 E1_CRS
+bit 569 O 1 E1_GENO 568 0 Z
+bit 568 C 0 *
+bit 567 O 0 *
+bit 566 O 0 *
+bit 565 O 0 *
+bit 564 I 1 E1_COL
+bit 563 O 1 E2_MDC 562 0 Z
+bit 562 C 0 *
+bit 561 O 0 *
+bit 560 O 0 *
+bit 559 O 0 *
+bit 558 I 1 E2_RCLK
+bit 557 O 1 E2_MDIO 556 0 Z
+bit 556 C 0 *
+bit 555 I 1 E2_MDIO
+bit 554 O 0 *
+bit 553 O 0 *
+bit 552 I 1 REFCLK2
+bit 551 O 1 E2_TXD0 550 0 Z
+bit 550 C 0 *
+bit 549 O 0 *
+bit 548 O 0 *
+bit 547 O 0 *
+bit 546 I 1 E2_RXDV
+bit 545 O 1 E2_TXD1 544 0 Z
+bit 544 C 0 *
+bit 543 O 0 *
+bit 542 O 0 *
+bit 541 O 0 *
+bit 540 I 1 E2_RXER
+bit 539 O 1 E2_TXD2 538 0 Z
+bit 538 C 0 *
+bit 537 O 0 *
+bit 536 O 0 *
+bit 535 O 0 *
+bit 534 I 1 E2_RXD7
+bit 533 O 1 E2_TXD3 532 0 Z
+bit 532 C 0 *
+bit 531 O 0 *
+bit 530 O 0 *
+bit 529 O 0 *
+bit 528 I 1 E2_RXD6
+bit 527 O 1 E2_TCLKO 526 0 Z
+bit 526 C 0 *
+bit 525 O 0 *
+bit 524 O 0 *
+bit 523 O 0 *
+bit 522 I 1 E2_RXD5
+bit 521 O 1 E2_TXD4 520 0 Z
+bit 520 C 0 *
+bit 519 O 0 *
+bit 518 O 0 *
+bit 517 O 0 *
+bit 516 I 1 E2_RXD4
+bit 515 O 1 E2_TXD5 514 0 Z
+bit 514 C 0 *
+bit 513 O 0 *
+bit 512 O 0 *
+bit 511 O 0 *
+bit 510 I 1 E2_RXD3
+bit 509 O 1 E2_TXD6 508 0 Z
+bit 508 C 0 *
+bit 507 O 0 *
+bit 506 O 0 *
+bit 505 O 0 *
+bit 504 I 1 E2_RXD2
+bit 503 O 1 E2_TXD7 502 0 Z
+bit 502 C 0 *
+bit 501 O 0 *
+bit 500 O 0 *
+bit 499 O 0 *
+bit 498 I 1 E2_RXD1
+bit 497 O 1 E2_TXER 496 0 Z
+bit 496 C 0 *
+bit 495 O 0 *
+bit 494 O 0 *
+bit 493 O 0 *
+bit 492 I 1 E2_RXD0
+bit 491 O 1 E2_TXEN 490 0 Z
+bit 490 C 0 *
+bit 489 O 0 *
+bit 488 O 0 *
+bit 487 O 0 *
+bit 486 I 1 E2_TCLKI
+bit 485 O 1 E2_GENO 484 0 Z
+bit 484 C 0 *
+bit 483 O 0 *
+bit 482 O 0 *
+bit 481 O 0 *
+bit 480 I 1 E2_CRS
+bit 479 O 0 *
+bit 478 O 0 *
+bit 477 I 1 E2_COL
+bit 476 O 1 IO_RW 475 0 Z
+bit 475 C 0 *
+bit 474 O 0 *
+bit 473 O 0 *
+bit 472 O 0 *
+bit 471 I 1 SPARE2
+bit 470 O 0 *
+bit 469 O 0 *
+bit 468 I 1 SPARE4
+bit 467 O 0 *
+bit 466 O 0 *
+bit 465 I 1 SPARE3
+bit 464 O 1 S1_COUT 463 0 Z
+bit 463 C 0 *
+bit 462 O 0 *
+bit 461 O 0 *
+bit 460 O 0 *
+bit 459 I 1 S1_DIN
+bit 458 O 0 *
+bit 457 O 0 *
+bit 456 I 1 S1_RIN
+bit 455 O 0 *
+bit 454 O 0 *
+bit 453 I 1 S1_CIN_RCLKIN
+bit 452 O 1 S1_RTS_TSTROBE 451 0 Z
+bit 451 C 0 *
+bit 450 O 0 *
+bit 449 O 0 *
+bit 448 O 0 *
+bit 447 I 1 S1_TIN
+bit 446 O 0 *
+bit 445 O 0 *
+bit 444 I 1 S1_CTS_TCLKIN
+bit 443 O 1 GPIO1 442 0 Z
+bit 442 C 0 *
+bit 441 I 1 GPIO1
+bit 440 O 1 S1_DOUT 439 0 Z
+bit 439 C 0 *
+bit 438 O 0 *
+bit 437 O 0 *
+bit 436 O 0 *
+bit 435 I 1 S0_DIN
+bit 434 O 1 S0_RTS_TSTROBE 433 0 Z
+bit 433 C 0 *
+bit 432 O 0 *
+bit 431 O 0 *
+bit 430 O 0 *
+bit 429 I 1 S0_RIN
+bit 428 O 1 S0_COUT 427 0 Z
+bit 427 C 0 *
+bit 426 O 0 *
+bit 425 O 0 *
+bit 424 O 0 *
+bit 423 I 1 S0_CIN_RCLKIN
+bit 422 O 0 *
+bit 421 O 0 *
+bit 420 I 1 S0_CTS_TCLKIN
+bit 419 O 0 *
+bit 418 O 0 *
+bit 417 I 1 S0_TIN
+bit 416 O 1 S0_DOUT 415 0 Z
+bit 415 C 0 *
+bit 414 O 0 *
+bit 413 O 1 GPIO5 412 0 Z
+bit 412 C 0 *
+bit 411 I 1 GPIO5
+bit 410 O 1 GPIO0 409 0 Z
+bit 409 C 0 *
+bit 408 I 1 GPIO0
+bit 407 O 1 GPIO4 406 0 Z
+bit 406 C 0 *
+bit 405 I 1 GPIO4
+bit 404 O 1 GPIO3 403 0 Z
+bit 403 C 0 *
+bit 402 I 1 GPIO3
+bit 401 O 1 GPIO2 400 0 Z
+bit 400 C 0 *
+bit 399 I 1 GPIO2
+bit 398 O 0 *
+bit 397 O 0 *
+bit 396 I 1 IO_RDY
+bit 395 O 1 IO_OE_L 394 0 Z
+bit 394 C 0 *
+bit 393 O 0 *
+bit 392 O 1 IO_WR_L 391 0 Z
+bit 391 C 0 *
+bit 390 O 0 *
+bit 389 O 1 IO_ALE 388 0 Z
+bit 388 C 0 *
+bit 387 O 0 *
+bit 386 O 1 IO_CS_L7 385 0 Z
+bit 385 C 0 *
+bit 384 O 0 *
+bit 383 O 1 IO_CS_L6 382 0 Z
+bit 382 C 0 *
+bit 381 O 0 *
+bit 380 O 1 IO_CS_L5 379 0 Z
+bit 379 C 0 *
+bit 378 O 0 *
+bit 377 O 1 IO_CS_L4 376 0 Z
+bit 376 C 0 *
+bit 375 O 0 *
+bit 374 O 1 IO_CS_L3 373 0 Z
+bit 373 C 0 *
+bit 372 O 0 *
+bit 371 O 1 IO_CS_L2 370 0 Z
+bit 370 C 0 *
+bit 369 O 0 *
+bit 368 O 1 IO_CS_L1 367 0 Z
+bit 367 C 0 *
+bit 366 O 0 *
+bit 365 O 1 IO_CS_L0 364 0 Z
+bit 364 C 0 *
+bit 363 O 0 *
+bit 362 O 1 IO_AD31 361 0 Z
+bit 361 C 0 *
+bit 360 I 1 IO_AD31
+bit 359 O 1 IO_AD30 358 0 Z
+bit 358 C 0 *
+bit 357 I 1 IO_AD30
+bit 356 O 1 IO_AD28 355 0 Z
+bit 355 C 0 *
+bit 354 I 1 IO_AD28
+bit 353 O 1 IO_AD29 352 0 Z
+bit 352 C 0 *
+bit 351 I 1 IO_AD29
+bit 350 O 1 IO_AD27 349 0 Z
+bit 349 C 0 *
+bit 348 I 1 IO_AD27
+bit 347 O 1 IO_AD26 346 0 Z
+bit 346 C 0 *
+bit 345 I 1 IO_AD26
+bit 344 O 1 IO_AD25 343 0 Z
+bit 343 C 0 *
+bit 342 I 1 IO_AD25
+bit 341 O 1 IO_AD24 340 0 Z
+bit 340 C 0 *
+bit 339 I 1 IO_AD24
+bit 338 O 1 IO_AD23 337 0 Z
+bit 337 C 0 *
+bit 336 I 1 IO_AD23
+bit 335 O 1 IO_AD22 334 0 Z
+bit 334 C 0 *
+bit 333 I 1 IO_AD22
+bit 332 O 1 IO_AD21 331 0 Z
+bit 331 C 0 *
+bit 330 I 1 IO_AD21
+bit 329 O 1 IO_AD20 328 0 Z
+bit 328 C 0 *
+bit 327 I 1 IO_AD20
+bit 326 O 1 IO_AD19 325 0 Z
+bit 325 C 0 *
+bit 324 I 1 IO_AD19
+bit 323 O 1 IO_AD18 322 0 Z
+bit 322 C 0 *
+bit 321 I 1 IO_AD18
+bit 320 O 1 IO_AD17 319 0 Z
+bit 319 C 0 *
+bit 318 I 1 IO_AD17
+bit 317 O 1 IO_AD15 316 0 Z
+bit 316 C 0 *
+bit 315 I 1 IO_AD15
+bit 314 O 1 IO_AD16 313 0 Z
+bit 313 C 0 *
+bit 312 I 1 IO_AD16
+bit 311 O 1 IO_AD11 310 0 Z
+bit 310 C 0 *
+bit 309 I 1 IO_AD11
+bit 308 O 1 IO_AD14 307 0 Z
+bit 307 C 0 *
+bit 306 I 1 IO_AD14
+bit 305 O 1 IO_AD12 304 0 Z
+bit 304 C 0 *
+bit 303 I 1 IO_AD12
+bit 302 O 1 IO_AD13 301 0 Z
+bit 301 C 0 *
+bit 300 I 1 IO_AD13
+bit 299 O 1 IO_AD10 298 0 Z
+bit 298 C 0 *
+bit 297 I 1 IO_AD10
+bit 296 O 1 IO_AD9 295 0 Z
+bit 295 C 0 *
+bit 294 I 1 IO_AD9
+bit 293 O 0 *
+bit 292 O 0 *
+bit 291 I 1 SPARE5
+bit 290 O 0 *
+bit 289 O 0 *
+bit 288 O 0 *
+bit 287 O 0 *
+bit 286 O 0 *
+bit 285 I 1 CLK100N
+bit 284 O 0 *
+bit 283 O 0 *
+bit 282 I 1 PLLBYP
+bit 281 O 0 *
+bit 280 O 0 *
+bit 279 I 1 CLK100P
+bit 278 O 0 *
+bit 277 O 0 *
+bit 276 O 0 *
+bit 275 O 1 RESETOUT_L 274 0 Z
+bit 274 C 0 *
+bit 273 O 0 *
+bit 272 O 1 IO_AD8 271 0 Z
+bit 271 C 0 *
+bit 270 I 1 IO_AD8
+bit 269 O 1 IO_AD7 268 0 Z
+bit 268 C 0 *
+bit 267 I 1 IO_AD7
+bit 266 O 1 DEBUG_L 265 0 Z
+bit 265 C 0 *
+bit 264 I 1 DEBUG_L
+bit 263 O 1 IO_AD6 262 0 Z
+bit 262 C 0 *
+bit 261 I 1 IO_AD6
+bit 260 O 1 IO_AD5 259 0 Z
+bit 259 C 0 *
+bit 258 I 1 IO_AD5
+bit 257 O 1 IO_AD3 256 0 Z
+bit 256 C 0 *
+bit 255 I 1 IO_AD3
+bit 254 O 1 IO_AD4 253 0 Z
+bit 253 C 0 *
+bit 252 I 1 IO_AD4
+bit 251 O 1 IO_AD2 250 0 Z
+bit 250 C 0 *
+bit 249 I 1 IO_AD2
+bit 248 O 1 IO_AD1 247 0 Z
+bit 247 C 0 *
+bit 246 I 1 IO_AD1
+bit 245 O 1 IO_AD0 244 0 Z
+bit 244 C 0 *
+bit 243 I 1 IO_AD0
+bit 242 O 1 GPIO6 241 0 Z
+bit 241 C 0 *
+bit 240 I 1 GPIO6
+bit 239 O 1 GPIO7 238 0 Z
+bit 238 C 0 *
+bit 237 I 1 GPIO7
+bit 236 O 1 GPIO8 235 0 Z
+bit 235 C 0 *
+bit 234 I 1 GPIO8
+bit 233 O 1 GPIO9 232 0 Z
+bit 232 C 0 *
+bit 231 I 1 GPIO9
+bit 230 O 1 GPIO10 229 0 Z
+bit 229 C 0 *
+bit 228 I 1 GPIO10
+bit 227 O 1 IO_CLK100 226 0 Z
+bit 226 C 0 *
+bit 225 O 0 *
+bit 224 O 1 GPIO11 223 0 Z
+bit 223 C 0 *
+bit 222 I 1 GPIO11
+bit 221 O 1 GPIO12 220 0 Z
+bit 220 C 0 *
+bit 219 I 1 GPIO12
+bit 218 O 1 GPIO13 217 0 Z
+bit 217 C 0 *
+bit 216 I 1 GPIO13
+bit 215 O 1 PC_ENVPP 214 0 Z
+bit 214 C 0 *
+bit 213 O 0 *
+bit 212 O 1 GPIO14 211 0 Z
+bit 211 C 0 *
+bit 210 I 1 GPIO14
+bit 209 O 1 PC_ENV5V 208 0 Z
+bit 208 C 0 *
+bit 207 O 0 *
+bit 206 O 1 GPIO15 205 0 Z
+bit 205 C 0 *
+bit 204 I 1 GPIO15
+bit 203 O 1 SCL1 202 0 Z
+bit 202 C 0 *
+bit 201 I 1 SCL1
+bit 200 O 1 PC_ENV3V 199 0 Z
+bit 199 C 0 *
+bit 198 O 0 *
+bit 197 O 1 P_GNT_L3 196 0 Z
+bit 196 C 0 *
+bit 195 O 0 *
+bit 194 O 1 SDA1 193 0 Z
+bit 193 C 0 *
+bit 192 I 1 SDA1
+bit 191 O 1 SCL0 190 0 Z
+bit 190 C 0 *
+bit 189 I 1 SCL0
+bit 188 O 1 SDA0 187 0 Z
+bit 187 C 0 *
+bit 186 I 1 SDA0
+bit 185 O 1 P_GNT_L2 184 0 Z
+bit 184 C 0 *
+bit 183 O 0 *
+bit 182 O 0 *
+bit 181 O 0 *
+bit 180 I 1 P_CLK
+bit 179 O 1 P_REQ_l0 178 0 Z
+bit 178 C 0 *
+bit 177 I 1 P_REQ_l0
+bit 176 O 0 *
+bit 175 O 0 *
+bit 174 I 1 P_REQ_L3
+bit 173 O 1 P_GNT_L1 172 0 Z
+bit 172 C 0 *
+bit 171 O 0 *
+bit 170 O 0 *
+bit 169 O 0 *
+bit 168 I 1 P_REQ_L1
+bit 167 O 1 P_GNT_l0 166 0 Z
+bit 166 C 0 *
+bit 165 I 1 P_GNT_l0
+bit 164 O 0 *
+bit 163 O 0 *
+bit 162 I 1 P_REQ_L2
+bit 161 O 1 P_IRDY_L 160 0 Z
+bit 160 C 0 *
+bit 159 I 1 P_IRDY_L
+bit 158 O 1 P_FRAME_L 157 0 Z
+bit 157 C 0 *
+bit 156 I 1 P_FRAME_L
+bit 155 O 1 P_TRDY_L 154 0 Z
+bit 154 C 0 *
+bit 153 I 1 P_TRDY_L
+bit 152 O 1 P_DEVSEL_L 151 0 Z
+bit 151 C 0 *
+bit 150 I 1 P_DEVSEL_L
+bit 149 O 1 P_PERR_L 148 0 Z
+bit 148 C 0 *
+bit 147 I 1 P_PERR_L
+bit 146 O 1 P_STOP_L 145 0 Z
+bit 145 C 0 *
+bit 144 I 1 P_STOP_L
+bit 143 O 1 P_PAR 142 0 Z
+bit 142 C 0 *
+bit 141 I 1 P_PAR
+bit 140 O 1 P_SERR_L 139 0 Z
+bit 139 C 0 *
+bit 138 I 1 P_SERR_L
+bit 137 O 1 P_INTA_L 136 0 Z
+bit 136 C 0 *
+bit 135 I 1 P_INTA_L
+bit 134 O 1 P_CBE_L3 133 0 Z
+bit 133 C 0 *
+bit 132 I 1 P_CBE_L3
+bit 131 O 0 *
+bit 130 O 0 *
+bit 129 I 1 P_INTB_L
+bit 128 O 1 P_CBE_L2 127 0 Z
+bit 127 C 0 *
+bit 126 I 1 P_CBE_L2
+bit 125 O 0 *
+bit 124 O 0 *
+bit 123 I 1 P_INTC_L
+bit 122 O 1 P_CBE_L1 121 0 Z
+bit 121 C 0 *
+bit 120 I 1 P_CBE_L1
+bit 119 O 0 *
+bit 118 O 0 *
+bit 117 I 1 P_INTD_L
+bit 116 O 1 P_CBE_L0 115 0 Z
+bit 115 C 0 *
+bit 114 I 1 P_CBE_L0
+bit 113 O 1 P_RST_L 112 0 Z
+bit 112 C 0 *
+bit 111 O 0 *
+bit 110 O 0 *
+bit 109 O 0 *
+bit 108 O 0 *
+bit 107 O 0 *
+bit 106 O 0 *
+bit 105 O 0 *
+bit 104 O 0 *
+bit 103 O 0 *
+bit 102 O 0 *
+bit 101 O 0 *
+bit 100 O 0 *
+bit 99 O 0 *
+bit 98 O 1 P_AD0 97 0 Z
+bit 97 C 0 *
+bit 96 I 1 P_AD0
+bit 95 O 0 *
+bit 94 O 0 *
+bit 93 O 0 *
+bit 92 O 1 P_AD1 91 0 Z
+bit 91 C 0 *
+bit 90 I 1 P_AD1
+bit 89 O 1 P_AD2 88 0 Z
+bit 88 C 0 *
+bit 87 I 1 P_AD2
+bit 86 O 1 P_AD7 85 0 Z
+bit 85 C 0 *
+bit 84 I 1 P_AD7
+bit 83 O 1 P_AD3 82 0 Z
+bit 82 C 0 *
+bit 81 I 1 P_AD3
+bit 80 O 1 P_AD8 79 0 Z
+bit 79 C 0 *
+bit 78 I 1 P_AD8
+bit 77 O 1 P_AD4 76 0 Z
+bit 76 C 0 *
+bit 75 I 1 P_AD4
+bit 74 O 1 P_AD9 73 0 Z
+bit 73 C 0 *
+bit 72 I 1 P_AD9
+bit 71 O 1 P_AD5 70 0 Z
+bit 70 C 0 *
+bit 69 I 1 P_AD5
+bit 68 O 1 P_AD10 67 0 Z
+bit 67 C 0 *
+bit 66 I 1 P_AD10
+bit 65 O 1 P_AD6 64 0 Z
+bit 64 C 0 *
+bit 63 I 1 P_AD6
+bit 62 O 1 P_AD13 61 0 Z
+bit 61 C 0 *
+bit 60 I 1 P_AD13
+bit 59 O 1 P_AD11 58 0 Z
+bit 58 C 0 *
+bit 57 I 1 P_AD11
+bit 56 O 1 P_AD16 55 0 Z
+bit 55 C 0 *
+bit 54 I 1 P_AD16
+bit 53 O 1 P_AD12 52 0 Z
+bit 52 C 0 *
+bit 51 I 1 P_AD12
+bit 50 O 1 P_AD17 49 0 Z
+bit 49 C 0 *
+bit 48 I 1 P_AD17
+bit 47 O 1 P_AD15 46 0 Z
+bit 46 C 0 *
+bit 45 I 1 P_AD15
+bit 44 O 1 P_AD18 43 0 Z
+bit 43 C 0 *
+bit 42 I 1 P_AD18
+bit 41 O 1 P_AD14 40 0 Z
+bit 40 C 0 *
+bit 39 I 1 P_AD14
+bit 38 O 1 P_AD21 37 0 Z
+bit 37 C 0 *
+bit 36 I 1 P_AD21
+bit 35 O 1 P_AD19 34 0 Z
+bit 34 C 0 *
+bit 33 I 1 P_AD19
+bit 32 O 1 P_AD24 31 0 Z
+bit 31 C 0 *
+bit 30 I 1 P_AD24
+bit 29 O 1 P_AD22 28 0 Z
+bit 28 C 0 *
+bit 27 I 1 P_AD22
+bit 26 O 1 P_AD25 25 0 Z
+bit 25 C 0 *
+bit 24 I 1 P_AD25
+bit 23 O 1 P_AD23 22 0 Z
+bit 22 C 0 *
+bit 21 I 1 P_AD23
+bit 20 O 1 P_AD28 19 0 Z
+bit 19 C 0 *
+bit 18 I 1 P_AD28
+bit 17 O 1 P_AD20 16 0 Z
+bit 16 C 0 *
+bit 15 I 1 P_AD20
+bit 14 O 1 P_AD27 13 0 Z
+bit 13 C 0 *
+bit 12 I 1 P_AD27
+bit 11 O 1 P_AD26 10 0 Z
+bit 10 C 0 *
+bit 9 I 1 P_AD26
+bit 8 O 1 P_AD30 7 0 Z
+bit 7 C 0 *
+bit 6 I 1 P_AD30
+bit 5 O 1 P_AD29 4 0 Z
+bit 4 C 0 *
+bit 3 I 1 P_AD29
+bit 2 O 1 P_AD31 1 0 Z
+bit 1 C 0 *
+bit 0 I 1 P_AD31
+
+initbus bcm1250
--- /dev/null
+#
+# $Id$
+#
+# Copyright (C) 2003 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Marcel Telka <marcel@telka.sk>, 2003.
+#
+
+# bits 31-28 of the Device Identification Register
+0000 bcm3310 0
--- /dev/null
+#
+# $Id$
+#
+# JTAG declarations for Broadcom BCM3310
+# Copyright (C) 2003 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Marcel Telka <marcel@telka.sk>, 2003.
+#
+
+# mandatory data registers
+register BSR 397
+register BR 1
+# optional data registers
+register DIR 32
+
+instruction length 5
+# mandatory instructions
+instruction EXTEST 00000 BSR # TODO: EXTEST instruction value not verified
+instruction SAMPLE/PRELOAD 00010 BSR # TODO: SAMPLE/PRELOAD instruction value not verified
+instruction BYPASS 11111 BR
+# optional instructions
+instruction IDCODE 00001 DIR # TODO: IDCODE instruction value not verified
--- /dev/null
+#
+# $Id$
+#
+# Copyright (C) 2004 Alan Wallace <aww@adelphia.net>
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Alan Wallace <aww@adelphia.net>, 2004.
+#
+
+# bits 31-28 of the Device Identification Register
+0001 bcm4712 Ver 1
--- /dev/null
+#
+# $Id$
+#
+# JTAG declarations for Broadcom BCM4712
+# Copyright (C) 2004 Alan Wallace <aww@adelphia.net>
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Alan Wallace <aww@adelphia.net>, 2004.
+#
+
+# mandatory data registers
+register BSR 594
+register BR 1
+
+# optional data registers
+register DIR 32
+
+instruction length 8
+# mandatory instructions
+instruction EXTEST 00000000 BSR
+instruction SAMPLE/PRELOAD 00000010 BSR
+instruction BYPASS 11111111 BR
+
+# optional instructions
+instruction IDCODE 00000001 DIR
--- /dev/null
+#
+# $Id$
+#
+# Copyright (C) 2003 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Matan Ziv-Av <matan@svgalib.org>, 2003.
+#
+
+0001 bcm5421s V1
--- /dev/null
+#
+# $Id$
+#
+# JTAG declarations for BCM5421S
+# Copyright (C) 2003 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Matan Ziv-Av <matan@svgalib.org>, 2003.
+#
+
+signal PAD_gtx_clk
+signal PAD_txd10
+signal PAD_txd11
+signal PAD_txd12
+signal PAD_txd13
+signal PAD_txd14
+signal PAD_txd15
+signal PAD_txd16
+signal PAD_txd17
+signal PAD_tx_en
+signal PAD_tx_er
+signal PAD_clk125
+signal PAD_col
+signal PAD_crs
+signal PAD_rbc0
+signal PAD_rbc1
+signal PAD_rxc
+signal PAD_rxd10
+signal PAD_rxd11
+signal PAD_rxd12
+signal PAD_rxd13
+signal PAD_rxd14
+signal PAD_rxd15
+signal PAD_rxd16
+signal PAD_rxd17
+signal PAD_rx_dv
+signal PAD_rx_er
+signal PAD_txc
+signal PAD_bcm5421s_en
+signal PAD_edgerate
+signal PAD_mdc
+signal PAD_ovdd_2_5v_enPAD_reset_n
+signal PAD_reset_n
+signal PAD_tck
+signal PAD_tdi
+signal PAD_test0
+signal PAD_test1
+signal PAD_tms
+signal PAD_tpin0
+signal PAD_tpin1
+signal PAD_tpin2
+signal PAD_tpin3
+signal PAD_tpin4
+signal PAD_tpin5
+signal PAD_tpin6
+signal PAD_tpin7
+signal PAD_tpin8
+signal PAD_trstb
+signal PAD_en10b
+signal PAD_f1000
+signal PAD_fdxled_n
+signal PAD_intr_n
+signal PAD_link_n1
+signal PAD_link_n2
+signal PAD_mdio
+signal PAD_phya0
+signal PAD_phya1
+signal PAD_phya2
+signal PAD_phya3
+signal PAD_phya4
+signal PAD_rcvled_n
+signal PAD_slave_n
+signal PAD_spd0
+signal PAD_xmtled_n
+signal PAD_tdo
+signal PAD_srxdn
+signal PAD_srxdp
+signal PAD_stxdn
+signal PAD_stxdp
+signal PAD_stxcn
+signal PAD_stxcp
+signal PAD_sergnd
+signal PAD_serpllavdd
+signal PAD_serpllavss
+signal PAD_serplldvdd
+signal PAD_serplldvss
+signal PAD_servdd11
+signal PAD_servdd25
+signal PAD_reg_cntl0
+signal PAD_reg_cntl1
+signal PAD_reg_sense1
+signal PAD_reg_sense2
+signal PAD_reg_supply1
+signal PAD_reg_supply2
+signal PAD_trimdac10
+signal PAD_trimdac11
+signal PAD_trimdac12
+signal PAD_trimdac13
+signal PAD_trimhyb10
+signal PAD_trimhyb11
+signal PAD_trimhyb12
+signal PAD_trimhyb13
+signal PAD_trimhpf10
+signal PAD_trimhpf11
+signal PAD_xtali
+signal PAD_xtali2
+signal PAD_xtalo
+signal PAD_xtalo2
+signal PAD_xtalgnd1
+signal PAD_xtalgnd2
+signal PAD_xtalvdd1
+signal PAD_xtalvdd2
+signal PAD_xtalvdd3
+signal PAD_xtalvdd2
+signal PAD_plldgnd
+signal PAD_plldvdd
+signal PAD_pllgnd
+signal PAD_pllvdd
+signal PAD_tvcoi
+signal CORE_VDD
+signal CORE_VSS
+signal OVDD
+signal OGND
+signal PVDD
+signal PAD_rdac1
+signal PAD_extvref1
+signal PAD_bagnd_0
+signal PAD_bavdd_0
+signal PAD_bavdd_1
+signal PAD_rxavdd0_0
+signal PAD_rxavdd1_0
+signal PAD_rxavdd2_0
+signal PAD_rxavdd3_0
+signal PAD_txavdd0_0
+signal PAD_txavdd1_0
+signal PAD_txavdd2_0
+signal PAD_txavdd3_0
+signal PAD_rxagnd0_0
+signal PAD_rxagnd1_0
+signal PAD_rxagnd2_0
+signal PAD_rxagnd3_0
+signal PAD_txagnd0_0
+signal PAD_txagnd1_0
+signal PAD_txagnd2_0
+signal PAD_txagnd3_0
+signal PAD_tdp1_0
+signal PAD_tdn1_0
+signal PAD_tdn1_1
+signal PAD_tdp1_1
+signal PAD_tdp1_2
+signal PAD_tdn1_2
+signal PAD_tdn1_3
+
+register BSR 150
+register BR 1
+register DIR 32
+
+instruction length 3
+
+instruction BYPASS 111 BR
+instruction EXTEST 000 BSR
+instruction SAMPLE/PRELOAD 010 BSR
+instruction IDCODE 101 DIR
+
+bit 149 I 1 PAD_rxd13
+bit 148 O 1 PAD_rxd13 147 1 Z
+bit 147 C 1 *
+bit 146 I 1 PAD_rxd12
+bit 145 O 1 PAD_rxd12 144 1 Z
+bit 144 C 1 *
+bit 143 I 1 PAD_rxd11
+bit 142 O 1 PAD_rxd11 141 1 Z
+bit 141 C 1 *
+bit 140 I 1 PAD_rxd10
+bit 139 O 1 PAD_rxd10 138 1 Z
+bit 138 C 1 *
+bit 137 I 1 PAD_col
+bit 136 O 1 PAD_col 135 1 Z
+bit 135 C 1 *
+bit 134 I 1 PAD_crs
+bit 133 O 1 PAD_crs 132 1 Z
+bit 132 C 1 *
+bit 131 I 1 PAD_clk125
+bit 130 O 1 PAD_clk125 129 1 Z
+bit 129 C 1 *
+bit 128 I 1 PAD_reset_n
+bit 127 I 1 PAD_mdc
+bit 126 I 1 PAD_mdio
+bit 125 O 1 PAD_mdio 124 1 Z
+bit 124 C 1 *
+bit 123 I 1 PAD_tpin8
+bit 122 I 1 PAD_en10b
+bit 121 O 1 PAD_en10b 120 1 Z
+bit 120 C 1 *
+bit 119 I 1 PAD_f1000
+bit 118 O 1 PAD_f1000 117 1 Z
+bit 117 C 1 *
+bit 116 I 1 PAD_spd0
+bit 115 O 1 PAD_spd0 114 1 Z
+bit 114 C 1 *
+bit 113 O 1 *
+bit 112 O 1 *
+bit 111 I 1 PAD_phya4
+bit 110 O 1 PAD_phya4 109 1 Z
+bit 109 C 1 *
+bit 108 I 1 PAD_phya3
+bit 107 O 1 PAD_phya3 106 1 Z
+bit 106 C 1 *
+bit 105 I 1 PAD_phya2
+bit 104 O 1 PAD_phya2 103 1 Z
+bit 103 C 1 *
+bit 102 I 1 PAD_phya1
+bit 101 O 1 PAD_phya1 100 1 Z
+bit 100 C 1 *
+bit 99 I 1 PAD_phya0
+bit 98 O 1 PAD_phya0 97 1 Z
+bit 97 C 1 *
+bit 96 I 1 PAD_test1
+bit 95 I 1 PAD_test0
+bit 94 I 1 PAD_xmtled_n
+bit 93 O 1 PAD_xmtled_n 92 1 Z
+bit 92 C 1 *
+bit 91 I 1 PAD_rcvled_n
+bit 90 O 1 PAD_rcvled_n 89 1 Z
+bit 89 C 1 *
+bit 88 I 1 PAD_link_n2
+bit 87 O 1 PAD_link_n2 86 1 Z
+bit 86 C 1 *
+bit 85 I 1 PAD_link_n1
+bit 84 O 1 PAD_link_n1 83 1 Z
+bit 83 C 1 *
+bit 82 I 1 PAD_fdxled_n
+bit 81 O 1 PAD_fdxled_n 80 1 Z
+bit 80 C 1 *
+bit 79 I 1 PAD_slave_n
+bit 78 O 1 PAD_slave_n 77 1 Z
+bit 77 C 1 *
+bit 76 I 1 PAD_intr_n
+bit 75 O 1 PAD_intr_n 74 1 Z
+bit 74 C 1 *
+bit 73 I 1 PAD_tpin0
+bit 72 I 1 PAD_tpin1
+bit 71 I 1 PAD_tpin2
+bit 70 I 1 PAD_tpin3
+bit 69 I 1 PAD_tpin4
+bit 68 I 1 PAD_tpin5
+bit 67 O 1 PAD_tpin5 66 1 Z
+bit 66 C 1 *
+bit 65 I 1 PAD_tpin6
+bit 64 I 1 PAD_tpin7
+bit 63 I 1 PAD_txc
+bit 62 O 1 PAD_txc 61 1 Z
+bit 61 C 1 *
+bit 60 I 1 PAD_txd10
+bit 59 O 1 *
+bit 58 C 1 *
+bit 57 I 1 PAD_txd11
+bit 56 O 1 *
+bit 55 C 1 *
+bit 54 I 1 PAD_txd12
+bit 53 O 1 *
+bit 52 C 1 *
+bit 51 I 1 PAD_txd13
+bit 50 O 1 *
+bit 49 C 1 *
+bit 48 I 1 PAD_txd14
+bit 47 O 1 *
+bit 46 C 1 *
+bit 45 I 1 PAD_txd15
+bit 44 O 1 *
+bit 43 C 1 *
+bit 42 I 1 PAD_txd16
+bit 41 O 1 *
+bit 40 C 1 *
+bit 39 I 1 PAD_txd17
+bit 38 O 1 *
+bit 37 C 1 *
+bit 36 I 1 PAD_tx_er
+bit 35 O 1 *
+bit 34 C 1 *
+bit 33 I 1 PAD_tx_en
+bit 32 O 1 *
+bit 31 C 1 *
+bit 30 I 1 PAD_gtx_clk
+bit 29 O 1 *
+bit 28 C 1 *
+bit 27 I 1 PAD_rbc0
+bit 26 O 1 PAD_rbc0 25 1 Z
+bit 25 C 1 *
+bit 24 I 1 PAD_rbc1
+bit 23 O 1 PAD_rbc1 22 1 Z
+bit 22 C 1 *
+bit 21 I 1 PAD_rxc
+bit 20 O 1 PAD_rxc 19 1 Z
+bit 19 C 1 *
+bit 18 I 1 PAD_rx_er
+bit 17 O 1 PAD_rx_er 16 1 Z
+bit 16 C 1 *
+bit 15 I 1 PAD_rx_dv
+bit 14 O 1 PAD_rx_dv 13 1 Z
+bit 13 C 1 *
+bit 12 I 1 PAD_rxd17
+bit 11 O 1 PAD_rxd17 10 1 Z
+bit 10 C 1 *
+bit 9 I 1 PAD_rxd16
+bit 8 O 1 PAD_rxd16 7 1 Z
+bit 7 C 1 *
+bit 6 I 1 PAD_rxd15
+bit 5 O 1 PAD_rxd15 4 1 Z
+bit 4 C 1 *
+bit 3 I 1 PAD_edgerate
+bit 2 I 1 PAD_rxd14
+bit 1 O 1 PAD_rxd14 0 1 Z
+bit 0 C 1 *
--- /dev/null
+#
+# $Id$
+#
+# Copyright (C) 2008 Julien Aube
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+
+0000 bcm6348 V1
--- /dev/null
+#
+# $Id$
+#
+# JTAG declarations for Atheros AR2312
+# Also valid for Broadcom BCM6348 (obconseil@gmail.com)
+#
+# Copyright (C) 2005 Marek Michalkiewicz
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Marek Michalkiewicz <marekm@amelek.gda.pl>, 2005.
+#
+
+register BR 1
+register BSR 480
+register DIR 32
+register EJIMPCODE 32
+register EJADDRESS 32
+register EJDATA 32
+register EJCONTROL 32
+register EJALL 96
+
+instruction length 5
+
+instruction BYPASS 11111 BR
+instruction SAMPLE/PRELOAD 00010 BSR
+instruction IDCODE 00001 DIR
+instruction EJTAG_IMPCODE 00011 EJIMPCODE
+instruction EJTAG_ADDRESS 01000 EJADDRESS
+instruction EJTAG_DATA 01001 EJDATA
+instruction EJTAG_CONTROL 01010 EJCONTROL
+instruction EJTAG_ALL 01011 EJALL
+instruction EJTAGBOOT 01100 BR
+instruction NORMALBOOT 01101 BR
--- /dev/null
+#
+# $Id: STEPPINGS 442 2003-05-26 09:04:38Z telka $
+#
+# Copyright (C) 2008 Julien Aube
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+
+0000 bcm6358 V1
+
--- /dev/null
+#
+# $Id$
+#
+# JTAG declarations for Atheros AR2312
+# Also valid for Broadcom BCM6358 (obconseil@gmail.com)
+#
+# Copyright (C) 2005 Marek Michalkiewicz
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Marek Michalkiewicz <marekm@amelek.gda.pl>, 2005.
+#
+
+register BR 1
+register BSR 1
+register DIR 32
+register EJIMPCODE 32
+register EJADDRESS 32
+register EJDATA 32
+register EJCONTROL 32
+register EJALL 96
+
+instruction length 5
+
+instruction BYPASS 11111 BR
+instruction SAMPLE/PRELOAD 00010 BSR
+instruction IDCODE 00001 DIR
+instruction EJTAG_IMPCODE 00011 EJIMPCODE
+instruction EJTAG_ADDRESS 01000 EJADDRESS
+instruction EJTAG_DATA 01001 EJDATA
+instruction EJTAG_CONTROL 01010 EJCONTROL
+instruction EJTAG_ALL 01011 EJALL
+instruction EJTAGBOOT 01100 BR
+instruction NORMALBOOT 01101 BR
+
--- /dev/null
+--
+-- $Id$
+--
+-- Email header accompanying the original Yacc code:
+-- http://www.eda.org/vug_bbs/bsdl.parser
+--
+-- -----------------------------------8<--------------------------------------
+--
+-- Hello All,
+--
+-- This is this first mailing of the BSDL* Version 0.0 parser specifications
+-- we are sending to people who request it from our publicized E-Mail address;
+--
+-- bsdl%hpmtlx@hplabs.HP.com
+--
+-- You are free to redistribute this at will, but we feel that it would be
+-- better if respondents asked for it directly so that their addresses can
+-- be entered into our list for future mailings and updates.
+--
+-- It would be helpful if you could confirm receipt of this transmission.
+-- We also would be very interested to hear about your experiences with this
+-- information and what you are planning to do with BSDL.
+--
+-- Regards,
+--
+-- Ken Parker
+-- Hewlett-Packard Company
+--
+--
+-- *Boundary-Scan Description Language - as documented in:
+--
+-- "A Language for Describing Boundary-Scan Devices", K.P. Parker
+-- and S. Oresjo, Proceedings 1990 International Test Conference,
+-- Washington DC, pp 222-234
+--
+--
+-- - -----------------cut here---------------------------------------------------
+--
+--
+-- 901004.0721 Hewlett-Packard Company
+-- 901016.1049 Manufacturing Test Division
+-- P.O. Box 301
+-- Loveland, Colorado 80537
+-- USA
+--
+-- October 1990
+-- Hello BSDL Parser Requestor,
+--
+-- This Electronic Mail reply contains the computer specifications for
+-- Hewlett-Packard's Version 0.0 BSDL parser. This section of the reply
+-- explains the contents of the rest of this file.
+--
+-- This file is composed of seven (7) parts:
+--
+-- 1) How to use this file
+--
+-- 2) UNIX* Lex source (lexicographical tokenizing rules)
+--
+-- 3) UNIX* Yacc source (BNF-like syntax description)
+--
+-- 4) A sample main program to recognize BSDL.
+--
+-- 5) A BSDL description of the Texas Instruments 74bct8374 that is
+-- recognized by the parser, for testing purposes.
+--
+-- 6) The VHDL package STD_1149_1_1990 needed by this parser.
+--
+-- 7) [added 901016] Porting experiences to other systems.
+--
+--
+-- RECOMMENDATION: Save a copy of this file in archival storage before
+-- processing it via the instructions below. This will
+-- allow you to recover from errors, and allow you to
+-- compare subsequently released data for changes.
+--
+-- DISCLAIMERS:
+--
+-- 1. The IEEE 1149.1 Working Group has not endorsed BSDL Version 0.0 and
+-- therefore no person may represent it as an IEEE standard or imply that
+-- a resulting IEEE standard will be identical to it.
+--
+-- 2. The IEEE 1149.1 Working Group recognizes that BSDL Version 0.0 is a
+-- well-conceived initiative that is likely to excelerate the creation
+-- of tools that support the 1149.1 standard. As such, changes and
+-- enhancements will be carefully considered so as not to needlessly
+-- disrupt these development efforts. The overriding goal is the
+-- ultimate success of the 1149.1 standard.
+--
+-- LEGAL NOTICES:
+--
+-- Hewlett-Packard Company makes no warranty of any kind with regard to
+-- this information, including, but not limited to, the implied
+-- waranties of merchantability and fitness for a particular purpose.
+--
+-- Hewlett-Packard Company shall not be liable for errors contained
+-- herein or direct, indirect, special, incidental, or consequential
+-- damages in connection with the furnishing, performance, or use of
+-- this material.
+--
+--
+-- *UNIX is a trademark of AT&T in the USA and other countries.
+--
+
+-- STD_1149_1_1990 VHDL Package and Package Body in support of
+-- BSDL Version 0.0
+--
+
+ package STD_1149_1_1990 is -- Created 900525
+
+ -- Give pin mapping declarations
+
+ attribute PIN_MAP : string;
+ subtype PIN_MAP_STRING is string;
+
+ -- Give TAP control declarations
+
+ type CLOCK_LEVEL is (LOW, BOTH);
+ type CLOCK_INFO is record
+ FREQ : real;
+ LEVEL: CLOCK_LEVEL;
+ end record;
+
+ attribute TAP_SCAN_IN : boolean;
+ attribute TAP_SCAN_OUT : boolean;
+ attribute TAP_SCAN_CLOCK: CLOCK_INFO;
+ attribute TAP_SCAN_MODE : boolean;
+ attribute TAP_SCAN_RESET: boolean;
+
+ -- Give instruction register declarations
+
+ attribute INSTRUCTION_LENGTH : integer;
+ attribute INSTRUCTION_OPCODE : string;
+ attribute INSTRUCTION_CAPTURE : string;
+ attribute INSTRUCTION_DISABLE : string;
+ attribute INSTRUCTION_GUARD : string;
+ attribute INSTRUCTION_PRIVATE : string;
+ attribute INSTRUCTION_USAGE : string;
+ attribute INSTRUCTION_SEQUENCE : string;
+
+ -- Give ID and USER code declarations
+
+ type ID_BITS is ('0', '1', 'x', 'X');
+ type ID_STRING is array (31 downto 0) of ID_BITS;
+ attribute IDCODE_REGISTER : ID_STRING;
+ attribute USERCODE_REGISTER: ID_STRING;
+
+ -- Give register declarations
+
+ attribute REGISTER_ACCESS : string;
+
+ -- Give boundary cell declarations
+
+ type BSCAN_INST is (EXTEST, SAMPLE, INTEST, RUNBIST);
+ type CELL_TYPE is (INPUT, INTERNAL, CLOCK,
+ CONTROL, CONTROLR, OUTPUT2,
+ OUTPUT3, BIDIR_IN, BIDIR_OUT);
+ type CAP_DATA is (PI, PO, UPD, CAP, X, ZERO, ONE);
+ type CELL_DATA is record
+ CT : CELL_TYPE;
+ I : BSCAN_INST;
+ CD : CAP_DATA;
+ end record;
+ type CELL_INFO is array (positive range <>) of CELL_DATA;
+
+ -- Boundary Cell defered constants (see package body)
+
+ constant BC_1 : CELL_INFO;
+ constant BC_2 : CELL_INFO;
+ constant BC_3 : CELL_INFO;
+ constant BC_4 : CELL_INFO;
+ constant BC_5 : CELL_INFO;
+ constant BC_6 : CELL_INFO;
+
+ -- Boundary Register declarations
+
+ attribute BOUNDARY_CELLS : string;
+ attribute BOUNDARY_LENGTH : integer;
+ attribute BOUNDARY_REGISTER : string;
+
+ -- Miscellaneous
+
+ attribute DESIGN_WARNING : string;
+end STD_1149_1_1990; -- End of 1149.1-1990 Package
+
+
+package body STD_1149_1_1990 is -- Standard Boundary Cells
+ -- Written 900525
+
+-- Description for f10-12, f10-16, f10-18c, f10-18d, f10-21c
+
+constant BC_1 : CELL_INFO :=
+ ((INPUT, EXTEST, PI), (OUTPUT2, EXTEST, PI),
+ (INPUT, SAMPLE, PI), (OUTPUT2, SAMPLE, PI),
+ (INPUT, INTEST, PI), (OUTPUT2, INTEST, PI),
+ (INPUT, RUNBIST, PI), (OUTPUT2, RUNBIST, PI),
+ (OUTPUT3, EXTEST, PI), (INTERNAL, EXTEST, PI),
+ (OUTPUT3, SAMPLE, PI), (INTERNAL, SAMPLE, PI),
+ (OUTPUT3, INTEST, PI), (INTERNAL, INTEST, PI),
+ (OUTPUT3, RUNBIST, PI), (INTERNAL, RUNBIST, PI),
+ (CONTROL, EXTEST, PI), (CONTROLR, EXTEST, PI),
+ (CONTROL, SAMPLE, PI), (CONTROLR, SAMPLE, PI),
+ (CONTROL, INTEST, PI), (CONTROLR, INTEST, PI),
+ (CONTROL, RUNBIST, PI), (CONTROLR, RUNBIST, PI) );
+
+-- Description for f10-8, f10-17, f10-19c, f10-19d, f10-22c
+
+constant BC_2 : CELL_INFO :=
+ ((INPUT, EXTEST, PI), (OUTPUT2, EXTEST, UPD),
+ (INPUT, SAMPLE, PI), (OUTPUT2, SAMPLE, PI),
+ (INPUT, INTEST, UPD), -- Intest on output2 not supported
+ (INPUT, RUNBIST, UPD), (OUTPUT2, RUNBIST, UPD),
+ (OUTPUT3, EXTEST, UPD), (INTERNAL, EXTEST, PI),
+ (OUTPUT3, SAMPLE, PI), (INTERNAL, SAMPLE, PI),
+ (OUTPUT3, INTEST, PI), (INTERNAL, INTEST, UPD),
+ (OUTPUT3, RUNBIST, PI), (INTERNAL, RUNBIST, UPD),
+ (CONTROL, EXTEST, UPD), (CONTROLR, EXTEST, UPD),
+ (CONTROL, SAMPLE, PI), (CONTROLR, SAMPLE, PI),
+ (CONTROL, INTEST, PI), (CONTROLR, INTEST, PI),
+ (CONTROL, RUNBIST, PI), (CONTROLR, RUNBIST, PI) );
+
+-- Description for f10-9
+
+constant BC_3 : CELL_INFO :=
+ ((INPUT, EXTEST, PI), (INTERNAL, EXTEST, PI),
+ (INPUT, SAMPLE, PI), (INTERNAL, SAMPLE, PI),
+ (INPUT, INTEST, PI), (INTERNAL, INTEST, PI),
+ (INPUT, RUNBIST, PI), (INTERNAL, RUNBIST, PI) );
+
+-- Description for f10-10, f10-11
+
+constant BC_4 : CELL_INFO :=
+ ((INPUT, EXTEST, PI), -- Intest on input not supported
+ (INPUT, SAMPLE, PI), -- Runbist on input not supported
+ (CLOCK, EXTEST, PI), (INTERNAL, EXTEST, PI),
+ (CLOCK, SAMPLE, PI), (INTERNAL, SAMPLE, PI),
+ (CLOCK, INTEST, PI), (INTERNAL, INTEST, PI),
+ (CLOCK, RUNBIST, PI), (INTERNAL, RUNBIST, PI) );
+
+-- Description for f10-20c, a combined Input/Control
+
+constant BC_5 : CELL_INFO :=
+ ((INPUT, EXTEST, PI), (CONTROL, EXTEST, PI),
+ (INPUT, SAMPLE, PI), (CONTROL, SAMPLE, PI),
+ (INPUT, INTEST, UPD), (CONTROL, INTEST, UPD),
+ (INPUT, RUNBIST, PI), (CONTROL, RUNBIST, PI) );
+
+-- Description for f10-22d, a reversible cell
+
+constant BC_6 : CELL_INFO :=
+ ((BIDIR_IN, EXTEST, PI), (BIDIR_OUT, EXTEST, UPD),
+ (BIDIR_IN, SAMPLE, PI), (BIDIR_OUT, SAMPLE, PI),
+ (BIDIR_IN, INTEST, UPD), (BIDIR_OUT, INTEST, PI),
+ (BIDIR_IN, RUNBIST, UPD), (BIDIR_OUT, RUNBIST, PI) );
+
+end STD_1149_1_1990; -- End of 1149.1-1990 Package Body
--- /dev/null
+--
+-- $Id$
+--
+-- Email header accompanying the original Yacc code:
+-- http://www.eda.org/vug_bbs/bsdl.parser
+--
+-- -----------------------------------8<--------------------------------------
+--
+-- Hello All,
+--
+-- This is this first mailing of the BSDL* Version 0.0 parser specifications
+-- we are sending to people who request it from our publicized E-Mail address;
+--
+-- bsdl%hpmtlx@hplabs.HP.com
+--
+-- You are free to redistribute this at will, but we feel that it would be
+-- better if respondents asked for it directly so that their addresses can
+-- be entered into our list for future mailings and updates.
+--
+-- It would be helpful if you could confirm receipt of this transmission.
+-- We also would be very interested to hear about your experiences with this
+-- information and what you are planning to do with BSDL.
+--
+-- Regards,
+--
+-- Ken Parker
+-- Hewlett-Packard Company
+--
+--
+-- *Boundary-Scan Description Language - as documented in:
+--
+-- "A Language for Describing Boundary-Scan Devices", K.P. Parker
+-- and S. Oresjo, Proceedings 1990 International Test Conference,
+-- Washington DC, pp 222-234
+--
+--
+-- - -----------------cut here---------------------------------------------------
+--
+--
+-- 901004.0721 Hewlett-Packard Company
+-- 901016.1049 Manufacturing Test Division
+-- P.O. Box 301
+-- Loveland, Colorado 80537
+-- USA
+--
+-- October 1990
+-- Hello BSDL Parser Requestor,
+--
+-- This Electronic Mail reply contains the computer specifications for
+-- Hewlett-Packard's Version 0.0 BSDL parser. This section of the reply
+-- explains the contents of the rest of this file.
+--
+-- This file is composed of seven (7) parts:
+--
+-- 1) How to use this file
+--
+-- 2) UNIX* Lex source (lexicographical tokenizing rules)
+--
+-- 3) UNIX* Yacc source (BNF-like syntax description)
+--
+-- 4) A sample main program to recognize BSDL.
+--
+-- 5) A BSDL description of the Texas Instruments 74bct8374 that is
+-- recognized by the parser, for testing purposes.
+--
+-- 6) The VHDL package STD_1149_1_1990 needed by this parser.
+--
+-- 7) [added 901016] Porting experiences to other systems.
+--
+--
+-- RECOMMENDATION: Save a copy of this file in archival storage before
+-- processing it via the instructions below. This will
+-- allow you to recover from errors, and allow you to
+-- compare subsequently released data for changes.
+--
+-- DISCLAIMERS:
+--
+-- 1. The IEEE 1149.1 Working Group has not endorsed BSDL Version 0.0 and
+-- therefore no person may represent it as an IEEE standard or imply that
+-- a resulting IEEE standard will be identical to it.
+--
+-- 2. The IEEE 1149.1 Working Group recognizes that BSDL Version 0.0 is a
+-- well-conceived initiative that is likely to excelerate the creation
+-- of tools that support the 1149.1 standard. As such, changes and
+-- enhancements will be carefully considered so as not to needlessly
+-- disrupt these development efforts. The overriding goal is the
+-- ultimate success of the 1149.1 standard.
+--
+-- LEGAL NOTICES:
+--
+-- Hewlett-Packard Company makes no warranty of any kind with regard to
+-- this information, including, but not limited to, the implied
+-- waranties of merchantability and fitness for a particular purpose.
+--
+-- Hewlett-Packard Company shall not be liable for errors contained
+-- herein or direct, indirect, special, incidental, or consequential
+-- damages in connection with the furnishing, performance, or use of
+-- this material.
+--
+--
+-- *UNIX is a trademark of AT&T in the USA and other countries.
+--
+
+-- STD_1149_1_1990 VHDL Package and Package Body in support of
+-- BSDL Version 0.0
+--
+
+-- package STD_1149_1_1990 is -- Created 900525
+ package STD_1149_1_1994 is
+
+ -- Give pin mapping declarations
+
+ attribute PIN_MAP : string;
+ subtype PIN_MAP_STRING is string;
+
+ -- Give TAP control declarations
+
+ type CLOCK_LEVEL is (LOW, BOTH);
+ type CLOCK_INFO is record
+ FREQ : real;
+ LEVEL: CLOCK_LEVEL;
+ end record;
+
+ attribute TAP_SCAN_IN : boolean;
+ attribute TAP_SCAN_OUT : boolean;
+ attribute TAP_SCAN_CLOCK: CLOCK_INFO;
+ attribute TAP_SCAN_MODE : boolean;
+ attribute TAP_SCAN_RESET: boolean;
+
+ -- Give instruction register declarations
+
+ attribute INSTRUCTION_LENGTH : integer;
+ attribute INSTRUCTION_OPCODE : string;
+ attribute INSTRUCTION_CAPTURE : string;
+ attribute INSTRUCTION_DISABLE : string;
+ attribute INSTRUCTION_GUARD : string;
+ attribute INSTRUCTION_PRIVATE : string;
+ attribute INSTRUCTION_USAGE : string;
+ attribute INSTRUCTION_SEQUENCE : string;
+
+ -- Give ID and USER code declarations
+
+ type ID_BITS is ('0', '1', 'x', 'X');
+ type ID_STRING is array (31 downto 0) of ID_BITS;
+ attribute IDCODE_REGISTER : ID_STRING;
+ attribute USERCODE_REGISTER: ID_STRING;
+
+ -- Give register declarations
+
+ attribute REGISTER_ACCESS : string;
+
+ -- Give boundary cell declarations
+
+ type BSCAN_INST is (EXTEST, SAMPLE, INTEST, RUNBIST);
+ type CELL_TYPE is (INPUT, INTERNAL, CLOCK,
+ CONTROL, CONTROLR, OUTPUT2,
+ OUTPUT3, BIDIR_IN, BIDIR_OUT);
+ type CAP_DATA is (PI, PO, UPD, CAP, X, ZERO, ONE);
+ type CELL_DATA is record
+ CT : CELL_TYPE;
+ I : BSCAN_INST;
+ CD : CAP_DATA;
+ end record;
+ type CELL_INFO is array (positive range <>) of CELL_DATA;
+
+ -- Boundary Cell defered constants (see package body)
+
+ constant BC_1 : CELL_INFO;
+ constant BC_2 : CELL_INFO;
+ constant BC_3 : CELL_INFO;
+ constant BC_4 : CELL_INFO;
+ constant BC_5 : CELL_INFO;
+ constant BC_6 : CELL_INFO;
+
+ -- Boundary Register declarations
+
+ attribute BOUNDARY_CELLS : string;
+ attribute BOUNDARY_LENGTH : integer;
+ attribute BOUNDARY_REGISTER : string;
+
+ -- Miscellaneous
+
+ attribute DESIGN_WARNING : string;
+--end STD_1149_1_1990; -- End of 1149.1-1990 Package
+end STD_1149_1_1994;
+
+
+--package body STD_1149_1_1990 is -- Standard Boundary Cells
+ -- Written 900525
+package body STD_1149_1_1994 is
+
+-- Description for f10-12, f10-16, f10-18c, f10-18d, f10-21c
+
+constant BC_1 : CELL_INFO :=
+ ((INPUT, EXTEST, PI), (OUTPUT2, EXTEST, PI),
+ (INPUT, SAMPLE, PI), (OUTPUT2, SAMPLE, PI),
+ (INPUT, INTEST, PI), (OUTPUT2, INTEST, PI),
+ (INPUT, RUNBIST, PI), (OUTPUT2, RUNBIST, PI),
+ (OUTPUT3, EXTEST, PI), (INTERNAL, EXTEST, PI),
+ (OUTPUT3, SAMPLE, PI), (INTERNAL, SAMPLE, PI),
+ (OUTPUT3, INTEST, PI), (INTERNAL, INTEST, PI),
+ (OUTPUT3, RUNBIST, PI), (INTERNAL, RUNBIST, PI),
+ (CONTROL, EXTEST, PI), (CONTROLR, EXTEST, PI),
+ (CONTROL, SAMPLE, PI), (CONTROLR, SAMPLE, PI),
+ (CONTROL, INTEST, PI), (CONTROLR, INTEST, PI),
+ (CONTROL, RUNBIST, PI), (CONTROLR, RUNBIST, PI) );
+
+-- Description for f10-8, f10-17, f10-19c, f10-19d, f10-22c
+
+constant BC_2 : CELL_INFO :=
+ ((INPUT, EXTEST, PI), (OUTPUT2, EXTEST, UPD),
+ (INPUT, SAMPLE, PI), (OUTPUT2, SAMPLE, PI),
+ (INPUT, INTEST, UPD), -- Intest on output2 not supported
+ (INPUT, RUNBIST, UPD), (OUTPUT2, RUNBIST, UPD),
+ (OUTPUT3, EXTEST, UPD), (INTERNAL, EXTEST, PI),
+ (OUTPUT3, SAMPLE, PI), (INTERNAL, SAMPLE, PI),
+ (OUTPUT3, INTEST, PI), (INTERNAL, INTEST, UPD),
+ (OUTPUT3, RUNBIST, PI), (INTERNAL, RUNBIST, UPD),
+ (CONTROL, EXTEST, UPD), (CONTROLR, EXTEST, UPD),
+ (CONTROL, SAMPLE, PI), (CONTROLR, SAMPLE, PI),
+ (CONTROL, INTEST, PI), (CONTROLR, INTEST, PI),
+ (CONTROL, RUNBIST, PI), (CONTROLR, RUNBIST, PI) );
+
+-- Description for f10-9
+
+constant BC_3 : CELL_INFO :=
+ ((INPUT, EXTEST, PI), (INTERNAL, EXTEST, PI),
+ (INPUT, SAMPLE, PI), (INTERNAL, SAMPLE, PI),
+ (INPUT, INTEST, PI), (INTERNAL, INTEST, PI),
+ (INPUT, RUNBIST, PI), (INTERNAL, RUNBIST, PI) );
+
+-- Description for f10-10, f10-11
+
+constant BC_4 : CELL_INFO :=
+ ((INPUT, EXTEST, PI), -- Intest on input not supported
+ (INPUT, SAMPLE, PI), -- Runbist on input not supported
+ (CLOCK, EXTEST, PI), (INTERNAL, EXTEST, PI),
+ (CLOCK, SAMPLE, PI), (INTERNAL, SAMPLE, PI),
+ (CLOCK, INTEST, PI), (INTERNAL, INTEST, PI),
+ (CLOCK, RUNBIST, PI), (INTERNAL, RUNBIST, PI) );
+
+-- Description for f10-20c, a combined Input/Control
+
+constant BC_5 : CELL_INFO :=
+ ((INPUT, EXTEST, PI), (CONTROL, EXTEST, PI),
+ (INPUT, SAMPLE, PI), (CONTROL, SAMPLE, PI),
+ (INPUT, INTEST, UPD), (CONTROL, INTEST, UPD),
+ (INPUT, RUNBIST, PI), (CONTROL, RUNBIST, PI) );
+
+-- Description for f10-22d, a reversible cell
+
+constant BC_6 : CELL_INFO :=
+ ((BIDIR_IN, EXTEST, PI), (BIDIR_OUT, EXTEST, UPD),
+ (BIDIR_IN, SAMPLE, PI), (BIDIR_OUT, SAMPLE, PI),
+ (BIDIR_IN, INTEST, UPD), (BIDIR_OUT, INTEST, PI),
+ (BIDIR_IN, RUNBIST, UPD), (BIDIR_OUT, RUNBIST, PI) );
+
+--end STD_1149_1_1990; -- End of 1149.1-1990 Package Body
+end STD_1149_1_1994;
--- /dev/null
+--
+-- $Id$
+--
+-- Email header accompanying the original Yacc code:
+-- http://www.eda.org/vug_bbs/bsdl.parser
+--
+-- -----------------------------------8<--------------------------------------
+--
+-- Hello All,
+--
+-- This is this first mailing of the BSDL* Version 0.0 parser specifications
+-- we are sending to people who request it from our publicized E-Mail address;
+--
+-- bsdl%hpmtlx@hplabs.HP.com
+--
+-- You are free to redistribute this at will, but we feel that it would be
+-- better if respondents asked for it directly so that their addresses can
+-- be entered into our list for future mailings and updates.
+--
+-- It would be helpful if you could confirm receipt of this transmission.
+-- We also would be very interested to hear about your experiences with this
+-- information and what you are planning to do with BSDL.
+--
+-- Regards,
+--
+-- Ken Parker
+-- Hewlett-Packard Company
+--
+--
+-- *Boundary-Scan Description Language - as documented in:
+--
+-- "A Language for Describing Boundary-Scan Devices", K.P. Parker
+-- and S. Oresjo, Proceedings 1990 International Test Conference,
+-- Washington DC, pp 222-234
+--
+--
+-- - -----------------cut here---------------------------------------------------
+--
+--
+-- 901004.0721 Hewlett-Packard Company
+-- 901016.1049 Manufacturing Test Division
+-- P.O. Box 301
+-- Loveland, Colorado 80537
+-- USA
+--
+-- October 1990
+-- Hello BSDL Parser Requestor,
+--
+-- This Electronic Mail reply contains the computer specifications for
+-- Hewlett-Packard's Version 0.0 BSDL parser. This section of the reply
+-- explains the contents of the rest of this file.
+--
+-- This file is composed of seven (7) parts:
+--
+-- 1) How to use this file
+--
+-- 2) UNIX* Lex source (lexicographical tokenizing rules)
+--
+-- 3) UNIX* Yacc source (BNF-like syntax description)
+--
+-- 4) A sample main program to recognize BSDL.
+--
+-- 5) A BSDL description of the Texas Instruments 74bct8374 that is
+-- recognized by the parser, for testing purposes.
+--
+-- 6) The VHDL package STD_1149_1_1990 needed by this parser.
+--
+-- 7) [added 901016] Porting experiences to other systems.
+--
+--
+-- RECOMMENDATION: Save a copy of this file in archival storage before
+-- processing it via the instructions below. This will
+-- allow you to recover from errors, and allow you to
+-- compare subsequently released data for changes.
+--
+-- DISCLAIMERS:
+--
+-- 1. The IEEE 1149.1 Working Group has not endorsed BSDL Version 0.0 and
+-- therefore no person may represent it as an IEEE standard or imply that
+-- a resulting IEEE standard will be identical to it.
+--
+-- 2. The IEEE 1149.1 Working Group recognizes that BSDL Version 0.0 is a
+-- well-conceived initiative that is likely to excelerate the creation
+-- of tools that support the 1149.1 standard. As such, changes and
+-- enhancements will be carefully considered so as not to needlessly
+-- disrupt these development efforts. The overriding goal is the
+-- ultimate success of the 1149.1 standard.
+--
+-- LEGAL NOTICES:
+--
+-- Hewlett-Packard Company makes no warranty of any kind with regard to
+-- this information, including, but not limited to, the implied
+-- waranties of merchantability and fitness for a particular purpose.
+--
+-- Hewlett-Packard Company shall not be liable for errors contained
+-- herein or direct, indirect, special, incidental, or consequential
+-- damages in connection with the furnishing, performance, or use of
+-- this material.
+--
+--
+-- *UNIX is a trademark of AT&T in the USA and other countries.
+--
+
+-- STD_1149_1_1990 VHDL Package and Package Body in support of
+-- BSDL Version 0.0
+--
+
+-- package STD_1149_1_1990 is -- Created 900525
+ package STD_1149_1_2001 is
+
+ -- Give pin mapping declarations
+
+ attribute PIN_MAP : string;
+ subtype PIN_MAP_STRING is string;
+
+ -- Give TAP control declarations
+
+ type CLOCK_LEVEL is (LOW, BOTH);
+ type CLOCK_INFO is record
+ FREQ : real;
+ LEVEL: CLOCK_LEVEL;
+ end record;
+
+ attribute TAP_SCAN_IN : boolean;
+ attribute TAP_SCAN_OUT : boolean;
+ attribute TAP_SCAN_CLOCK: CLOCK_INFO;
+ attribute TAP_SCAN_MODE : boolean;
+ attribute TAP_SCAN_RESET: boolean;
+
+ -- Give instruction register declarations
+
+ attribute INSTRUCTION_LENGTH : integer;
+ attribute INSTRUCTION_OPCODE : string;
+ attribute INSTRUCTION_CAPTURE : string;
+ attribute INSTRUCTION_DISABLE : string;
+ attribute INSTRUCTION_GUARD : string;
+ attribute INSTRUCTION_PRIVATE : string;
+ attribute INSTRUCTION_USAGE : string;
+ attribute INSTRUCTION_SEQUENCE : string;
+
+ -- Give ID and USER code declarations
+
+ type ID_BITS is ('0', '1', 'x', 'X');
+ type ID_STRING is array (31 downto 0) of ID_BITS;
+ attribute IDCODE_REGISTER : ID_STRING;
+ attribute USERCODE_REGISTER: ID_STRING;
+
+ -- Give register declarations
+
+ attribute REGISTER_ACCESS : string;
+
+ -- Give boundary cell declarations
+
+ type BSCAN_INST is (EXTEST, SAMPLE, INTEST, RUNBIST);
+ type CELL_TYPE is (INPUT, INTERNAL, CLOCK,
+ CONTROL, CONTROLR, OUTPUT2,
+ OUTPUT3, BIDIR_IN, BIDIR_OUT);
+ type CAP_DATA is (PI, PO, UPD, CAP, X, ZERO, ONE);
+ type CELL_DATA is record
+ CT : CELL_TYPE;
+ I : BSCAN_INST;
+ CD : CAP_DATA;
+ end record;
+ type CELL_INFO is array (positive range <>) of CELL_DATA;
+
+ -- Boundary Cell defered constants (see package body)
+
+ constant BC_1 : CELL_INFO;
+ constant BC_2 : CELL_INFO;
+ constant BC_3 : CELL_INFO;
+ constant BC_4 : CELL_INFO;
+ constant BC_5 : CELL_INFO;
+ constant BC_6 : CELL_INFO;
+
+ -- Boundary Register declarations
+
+ attribute BOUNDARY_CELLS : string;
+ attribute BOUNDARY_LENGTH : integer;
+ attribute BOUNDARY_REGISTER : string;
+
+ -- Miscellaneous
+
+ attribute DESIGN_WARNING : string;
+--end STD_1149_1_1990; -- End of 1149.1-1990 Package
+end STD_1149_1_2001;
+
+
+--package body STD_1149_1_1990 is -- Standard Boundary Cells
+ -- Written 900525
+package body STD_1149_1_2001 is
+
+-- Description for f10-12, f10-16, f10-18c, f10-18d, f10-21c
+
+constant BC_1 : CELL_INFO :=
+ ((INPUT, EXTEST, PI), (OUTPUT2, EXTEST, PI),
+ (INPUT, SAMPLE, PI), (OUTPUT2, SAMPLE, PI),
+ (INPUT, INTEST, PI), (OUTPUT2, INTEST, PI),
+ (INPUT, RUNBIST, PI), (OUTPUT2, RUNBIST, PI),
+ (OUTPUT3, EXTEST, PI), (INTERNAL, EXTEST, PI),
+ (OUTPUT3, SAMPLE, PI), (INTERNAL, SAMPLE, PI),
+ (OUTPUT3, INTEST, PI), (INTERNAL, INTEST, PI),
+ (OUTPUT3, RUNBIST, PI), (INTERNAL, RUNBIST, PI),
+ (CONTROL, EXTEST, PI), (CONTROLR, EXTEST, PI),
+ (CONTROL, SAMPLE, PI), (CONTROLR, SAMPLE, PI),
+ (CONTROL, INTEST, PI), (CONTROLR, INTEST, PI),
+ (CONTROL, RUNBIST, PI), (CONTROLR, RUNBIST, PI) );
+
+-- Description for f10-8, f10-17, f10-19c, f10-19d, f10-22c
+
+constant BC_2 : CELL_INFO :=
+ ((INPUT, EXTEST, PI), (OUTPUT2, EXTEST, UPD),
+ (INPUT, SAMPLE, PI), (OUTPUT2, SAMPLE, PI),
+ (INPUT, INTEST, UPD), -- Intest on output2 not supported
+ (INPUT, RUNBIST, UPD), (OUTPUT2, RUNBIST, UPD),
+ (OUTPUT3, EXTEST, UPD), (INTERNAL, EXTEST, PI),
+ (OUTPUT3, SAMPLE, PI), (INTERNAL, SAMPLE, PI),
+ (OUTPUT3, INTEST, PI), (INTERNAL, INTEST, UPD),
+ (OUTPUT3, RUNBIST, PI), (INTERNAL, RUNBIST, UPD),
+ (CONTROL, EXTEST, UPD), (CONTROLR, EXTEST, UPD),
+ (CONTROL, SAMPLE, PI), (CONTROLR, SAMPLE, PI),
+ (CONTROL, INTEST, PI), (CONTROLR, INTEST, PI),
+ (CONTROL, RUNBIST, PI), (CONTROLR, RUNBIST, PI) );
+
+-- Description for f10-9
+
+constant BC_3 : CELL_INFO :=
+ ((INPUT, EXTEST, PI), (INTERNAL, EXTEST, PI),
+ (INPUT, SAMPLE, PI), (INTERNAL, SAMPLE, PI),
+ (INPUT, INTEST, PI), (INTERNAL, INTEST, PI),
+ (INPUT, RUNBIST, PI), (INTERNAL, RUNBIST, PI) );
+
+-- Description for f10-10, f10-11
+
+constant BC_4 : CELL_INFO :=
+ ((INPUT, EXTEST, PI), -- Intest on input not supported
+ (INPUT, SAMPLE, PI), -- Runbist on input not supported
+ (CLOCK, EXTEST, PI), (INTERNAL, EXTEST, PI),
+ (CLOCK, SAMPLE, PI), (INTERNAL, SAMPLE, PI),
+ (CLOCK, INTEST, PI), (INTERNAL, INTEST, PI),
+ (CLOCK, RUNBIST, PI), (INTERNAL, RUNBIST, PI) );
+
+-- Description for f10-20c, a combined Input/Control
+
+constant BC_5 : CELL_INFO :=
+ ((INPUT, EXTEST, PI), (CONTROL, EXTEST, PI),
+ (INPUT, SAMPLE, PI), (CONTROL, SAMPLE, PI),
+ (INPUT, INTEST, UPD), (CONTROL, INTEST, UPD),
+ (INPUT, RUNBIST, PI), (CONTROL, RUNBIST, PI) );
+
+-- Description for f10-22d, a reversible cell
+
+constant BC_6 : CELL_INFO :=
+ ((BIDIR_IN, EXTEST, PI), (BIDIR_OUT, EXTEST, UPD),
+ (BIDIR_IN, SAMPLE, PI), (BIDIR_OUT, SAMPLE, PI),
+ (BIDIR_IN, INTEST, UPD), (BIDIR_OUT, INTEST, PI),
+ (BIDIR_IN, RUNBIST, UPD), (BIDIR_OUT, RUNBIST, PI) );
+
+--end STD_1149_1_1990; -- End of 1149.1-1990 Package Body
+end STD_1149_1_2001;
--- /dev/null
+Package STD_1532_2001 is -- Attribute definitions for ISC description
+ use STD_1149_1_2001.all; -- Refer to BSDL definitions
+
+ attribute ISC_Conformance: BSDL_Extension;
+ attribute ISC_Pin_Behavior: BSDL_Extension;
+ attribute ISC_Fixed_System_Pins: BSDL_Extension; -- Optional
+ attribute ISC_Status: BSDL_Extension;
+ attribute ISC_Blank_Usercode: BSDL_Extension;
+ attribute ISC_Security: BSDL_Extension; -- Optional
+ attribute ISC_Flow: BSDL_Extension;
+ attribute ISC_Procedure: BSDL_Extension;
+ attribute ISC_Action: BSDL_Extension;
+ attribute ISC_Illegal_Exit: BSDL_Extension; -- Optional
+ attribute ISC_Design_Warning: BSDL_Extension; -- Optional
+end STD_1532_2001;
+
+Package Body STD_1532_2001 is
+ -- No content, this package body is required by BSDL syntax
+end STD_1532_2001;
--- /dev/null
+Package STD_1532_2002 is -- Attribute definitions for ISC description
+ use STD_1149_1_2001.all; -- Refer to BSDL definitions
+
+ attribute ISC_Conformance: BSDL_Extension;
+ attribute ISC_Pin_Behavior: BSDL_Extension;
+ attribute ISC_Fixed_System_Pins: BSDL_Extension; -- Optional
+ attribute ISC_Status: BSDL_Extension;
+ attribute ISC_Blank_Usercode: BSDL_Extension;
+ attribute ISC_Security: BSDL_Extension; -- Optional
+ attribute ISC_Flow: BSDL_Extension;
+ attribute ISC_Procedure: BSDL_Extension;
+ attribute ISC_Action: BSDL_Extension;
+ attribute ISC_Illegal_Exit: BSDL_Extension; -- Optional
+ attribute ISC_Design_Warning: BSDL_Extension; -- Optional
+end STD_1532_2002;
+
+Package Body STD_1532_2002 is
+ -- No content, this package body is required by BSDL syntax
+end STD_1532_2002;
--- /dev/null
+#
+# $Id$
+#
+# Copyright (C) 2003 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Marcel Telka <marcel@telka.sk>, 2003.
+#
+
+# bits 27-12 of the Device Identification Register
+0001000010000100 sa1100 SA1100
--- /dev/null
+#
+# $Id$
+#
+# Copyright (C) 2003 Jachym Holecek <freza@psi.cz>
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Jachym Holecek <freza@psi.cz>, 2003.
+#
+
+# bits 31-28 of the Device Identification Register
+1011 sa1100 rev11
--- /dev/null
+#
+# $Id$
+#
+# JTAG declarations for SA-1100
+# Copyright (C) 2003 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Marcel Telka <marcel@telka.sk>, 2003.
+#
+
+signal A(0)
+signal A(1)
+signal A(2)
+signal A(3)
+signal A(4)
+signal A(5)
+signal A(6)
+signal A(7)
+signal A(8)
+signal A(9)
+signal A(10)
+signal A(11)
+signal A(12)
+signal A(13)
+signal A(14)
+signal A(15)
+signal A(16)
+signal A(17)
+signal A(18)
+signal A(19)
+signal A(20)
+signal A(21)
+signal A(22)
+signal A(23)
+signal A(24)
+signal A(25)
+signal BATTF
+signal CAS(0)
+signal CAS(1)
+signal CAS(2)
+signal CAS(3)
+signal CS(0)
+signal CS(1)
+signal CS(2)
+signal CS(3)
+signal D(0)
+signal D(1)
+signal D(2)
+signal D(3)
+signal D(4)
+signal D(5)
+signal D(6)
+signal D(7)
+signal D(8)
+signal D(9)
+signal D(10)
+signal D(11)
+signal D(12)
+signal D(13)
+signal D(14)
+signal D(15)
+signal D(16)
+signal D(17)
+signal D(18)
+signal D(19)
+signal D(20)
+signal D(21)
+signal D(22)
+signal D(23)
+signal D(24)
+signal D(25)
+signal D(26)
+signal D(27)
+signal D(28)
+signal D(29)
+signal D(30)
+signal D(31)
+signal GP(0)
+signal GP(1)
+signal GP(2)
+signal GP(3)
+signal GP(4)
+signal GP(5)
+signal GP(6)
+signal GP(7)
+signal GP(8)
+signal GP(9)
+signal GP(10)
+signal GP(11)
+signal GP(12)
+signal GP(13)
+signal GP(14)
+signal GP(15)
+signal GP(16)
+signal GP(17)
+signal GP(18)
+signal GP(19)
+signal GP(20)
+signal GP(21)
+signal GP(22)
+signal GP(23)
+signal GP(24)
+signal GP(25)
+signal GP(26)
+signal GP(27)
+signal IOIS16
+signal LBIAS
+signal LDD(0)
+signal LDD(1)
+signal LDD(2)
+signal LDD(3)
+signal LDD(4)
+signal LDD(5)
+signal LDD(6)
+signal LDD(7)
+signal LFCLK
+signal LLCLK
+signal LPCLK
+signal OE
+signal PCE1
+signal PCE2
+signal PIOR
+signal PIOW
+signal POE
+signal PREG
+signal PSKTSEL
+signal PWAIT
+signal PWE
+signal RAS(0)
+signal RAS(1)
+signal RAS(2)
+signal RAS(3)
+signal RESET
+signal RESETO
+signal ROMSEL
+signal RXD1
+signal RXD2
+signal RXD3
+signal RXDC
+signal SCLKC
+signal SFRMC
+signal TXD1
+signal TXD2
+signal TXD3
+signal TXDC
+signal UDCN
+signal UDCP
+signal VDDFA
+signal WE
+
+# mandatory data registers
+register BSR 279 # Boundary Scan Register
+register BR 1 # Bypass Register
+# optional data registers
+register DIR 32 # Device Identification Register
+
+instruction length 5
+
+# mandatory instructions
+instruction EXTEST 00000 BSR
+instruction SAMPLE/PRELOAD 00001 BSR
+instruction BYPASS 11111 BR
+
+# optional instructions
+instruction CLAMP 00100 BR
+instruction HIGHZ 00101 BR
+instruction IDCODE 00110 DIR
+
+# BSR bits
+bit 278 I ? BATTF
+bit 277 I ? VDDFA
+bit 276 X ? .
+bit 275 C 0 .
+bit 274 O ? SFRMC 275 0 Z
+bit 273 I ? SFRMC
+bit 272 C 0 .
+bit 271 O ? SCLKC 272 0 Z
+bit 270 I ? SCLKC
+bit 269 C 0 .
+bit 268 O ? RXDC 269 0 Z
+bit 267 I ? RXDC
+bit 266 C ? .
+bit 265 O ? TXDC 266 0 Z
+bit 264 I ? TXDC
+bit 263 O ? D(0) 199 1 Z
+bit 262 I ? D(0)
+bit 261 O ? D(8) 199 1 Z
+bit 260 I ? D(8)
+bit 259 O ? D(16) 199 1 Z
+bit 258 I ? D(16)
+bit 257 O ? D(24) 199 1 Z
+bit 256 I ? D(24)
+bit 255 O ? D(1) 199 1 Z
+bit 254 I ? D(1)
+bit 253 O ? D(9) 199 1 Z
+bit 252 I ? D(9)
+bit 251 O ? D(17) 199 1 Z
+bit 250 I ? D(17)
+bit 249 O ? D(25) 199 1 Z
+bit 248 I ? D(25)
+bit 247 O ? D(2) 199 1 Z
+bit 246 I ? D(2)
+bit 245 O ? D(10) 199 1 Z
+bit 244 I ? D(10)
+bit 243 O ? D(18) 199 1 Z
+bit 242 I ? D(18)
+bit 241 O ? D(26) 199 1 Z
+bit 240 I ? D(26)
+bit 239 O ? D(3) 199 1 Z
+bit 238 I ? D(3)
+bit 237 O ? D(11) 199 1 Z
+bit 236 I ? D(11)
+bit 235 O ? D(19) 199 1 Z
+bit 234 I ? D(19)
+bit 233 O ? D(27) 199 1 Z
+bit 232 I ? D(27)
+bit 231 O ? D(4) 199 1 Z
+bit 230 I ? D(4)
+bit 229 O ? D(12) 199 1 Z
+bit 228 I ? D(12)
+bit 227 O ? D(20) 199 1 Z
+bit 226 I ? D(20)
+bit 225 O ? D(28) 199 1 Z
+bit 224 I ? D(28)
+bit 223 O ? D(5) 199 1 Z
+bit 222 I ? D(5)
+bit 221 O ? D(13) 199 1 Z
+bit 220 I ? D(13)
+bit 219 O ? D(21) 199 1 Z
+bit 218 I ? D(21)
+bit 217 O ? D(29) 199 1 Z
+bit 216 I ? D(29)
+bit 215 O ? D(6) 199 1 Z
+bit 214 I ? D(6)
+bit 213 O ? D(14) 199 1 Z
+bit 212 I ? D(14)
+bit 211 O ? D(22) 199 1 Z
+bit 210 I ? D(22)
+bit 209 O ? D(30) 199 1 Z
+bit 208 I ? D(30)
+bit 207 O ? D(7) 199 1 Z
+bit 206 I ? D(7)
+bit 205 O ? D(15) 199 1 Z
+bit 204 I ? D(15)
+bit 203 O ? D(23) 199 1 Z
+bit 202 I ? D(23)
+bit 201 O ? D(31) 199 1 Z
+bit 200 I ? D(31)
+bit 199 C 1 .
+bit 198 C 0 .
+bit 197 O ? GP(27) 198 0 Z
+bit 196 I ? GP(27)
+bit 195 C 0 .
+bit 194 O ? GP(26) 195 0 Z
+bit 193 I ? GP(26)
+bit 192 C 0 .
+bit 191 O ? GP(25) 192 0 Z
+bit 190 I ? GP(25)
+bit 189 C 0 .
+bit 188 O ? GP(24) 189 0 Z
+bit 187 I ? GP(24)
+bit 186 C 0 .
+bit 185 O ? GP(23) 186 0 Z
+bit 184 I ? GP(23)
+bit 183 C 0 .
+bit 182 O ? GP(22) 183 0 Z
+bit 181 I ? GP(22)
+bit 180 C 0 .
+bit 179 O ? GP(21) 180 0 Z
+bit 178 I ? GP(21)
+bit 177 C 0 .
+bit 176 O ? GP(20) 177 0 Z
+bit 175 I ? GP(20)
+bit 174 C 0 .
+bit 173 O ? GP(19) 174 0 Z
+bit 172 I ? GP(19)
+bit 171 C 0 .
+bit 170 O ? GP(18) 171 0 Z
+bit 169 I ? GP(18)
+bit 168 C 0 .
+bit 167 O ? GP(17) 168 0 Z
+bit 166 I ? GP(17)
+bit 165 C 0 .
+bit 164 O ? GP(16) 165 0 Z
+bit 163 I ? GP(16)
+bit 162 C 0 .
+bit 161 O ? GP(15) 162 0 Z
+bit 160 I ? GP(15)
+bit 159 C 0 .
+bit 158 O ? GP(14) 159 0 Z
+bit 157 I ? GP(14)
+bit 156 C 0 .
+bit 155 O ? GP(13) 156 0 Z
+bit 154 I ? GP(13)
+bit 153 C 0 .
+bit 152 O ? GP(12) 153 0 Z
+bit 151 I ? GP(12)
+bit 150 C 0 .
+bit 149 O ? GP(11) 150 0 Z
+bit 148 I ? GP(11)
+bit 147 C 0 .
+bit 146 O ? GP(10) 147 0 Z
+bit 145 I ? GP(10)
+bit 144 C 0 .
+bit 143 O ? GP(9) 144 0 Z
+bit 142 I ? GP(9)
+bit 141 C 0 .
+bit 140 O ? GP(8) 141 0 Z
+bit 139 I ? GP(8)
+bit 138 C 0 .
+bit 137 O ? GP(7) 138 0 Z
+bit 136 I ? GP(7)
+bit 135 C 0 .
+bit 134 O ? GP(6) 135 0 Z
+bit 133 I ? GP(6)
+bit 132 C 0 .
+bit 131 O ? GP(5) 132 0 Z
+bit 130 I ? GP(5)
+bit 129 C 0 .
+bit 128 O ? GP(4) 129 0 Z
+bit 127 I ? GP(4)
+bit 126 C 0 .
+bit 125 O ? GP(3) 126 0 Z
+bit 124 I ? GP(3)
+bit 123 C 0 .
+bit 122 O ? GP(2) 123 0 Z
+bit 121 I ? GP(2)
+bit 120 C 0 .
+bit 119 O ? GP(1) 120 0 Z
+bit 118 I ? GP(1)
+bit 117 C 0 .
+bit 116 O ? GP(0) 117 0 Z
+bit 115 I ? GP(0)
+bit 114 C 0 .
+bit 113 O ? LBIAS 114 0 Z
+bit 112 I ? LBIAS
+bit 111 C 0 .
+bit 110 O ? LPCLK 111 0 Z
+bit 109 I ? LPCLK
+bit 108 C 0 .
+bit 107 O ? LDD(0) 108 0 Z
+bit 106 I ? LDD(0)
+bit 105 C 0 .
+bit 104 O ? LDD(1) 105 0 Z
+bit 103 I ? LDD(1)
+bit 102 C 0 .
+bit 101 O ? LDD(2) 102 0 Z
+bit 100 I ? LDD(2)
+bit 99 C 0 .
+bit 98 O ? LDD(3) 99 0 Z
+bit 97 I ? LDD(3)
+bit 96 C 0 .
+bit 95 O ? LDD(4) 96 0 Z
+bit 94 I ? LDD(4)
+bit 93 C 0 .
+bit 92 O ? LDD(5) 93 0 Z
+bit 91 I ? LDD(5)
+bit 90 C 0 .
+bit 89 O ? LDD(6) 90 0 Z
+bit 88 I ? LDD(6)
+bit 87 C 0 .
+bit 86 O ? LDD(7) 87 0 Z
+bit 85 I ? LDD(7)
+bit 84 C 0 .
+bit 83 O ? LLCLK 84 0 Z
+bit 82 I ? LLCLK
+bit 81 C 0 .
+bit 80 O ? LFCLK 81 0 Z
+bit 79 I ? LFCLK
+bit 78 O ? POE
+bit 77 O ? PWE
+bit 76 O ? PIOR
+bit 75 O ? PIOW
+bit 74 O ? PSKTSEL
+bit 73 I ? IOIS16
+bit 72 I ? PWAIT
+bit 71 O ? PREG
+bit 70 O ? PCE2
+bit 69 O ? PCE1
+bit 68 C 1 .
+bit 67 O ? WE 68 1 Z
+bit 66 O ? OE 68 1 Z
+bit 65 O ? RAS(3) 68 1 Z
+bit 64 O ? RAS(2) 68 1 Z
+bit 63 O ? RAS(1) 68 1 Z
+bit 62 O ? RAS(0) 68 1 Z
+bit 61 O ? CAS(3) 68 1 Z
+bit 60 O ? CAS(2) 68 1 Z
+bit 59 O ? CAS(1) 68 1 Z
+bit 58 O ? CAS(0) 68 1 Z
+bit 57 O ? CS(3) 68 1 Z
+bit 56 O ? CS(2) 68 1 Z
+bit 55 O ? CS(1) 68 1 Z
+bit 54 O ? CS(0) 68 1 Z
+bit 53 O ? A(25) 68 1 Z
+bit 52 O ? A(24) 68 1 Z
+bit 51 O ? A(23) 68 1 Z
+bit 50 O ? A(22) 68 1 Z
+bit 49 O ? A(21) 68 1 Z
+bit 48 O ? A(20) 68 1 Z
+bit 47 O ? A(19) 68 1 Z
+bit 46 O ? A(18) 68 1 Z
+bit 45 O ? A(17) 68 1 Z
+bit 44 O ? A(16) 68 1 Z
+bit 43 O ? A(15) 68 1 Z
+bit 42 O ? A(14) 68 1 Z
+bit 41 O ? A(13) 68 1 Z
+bit 40 O ? A(12) 68 1 Z
+bit 39 O ? A(11) 68 1 Z
+bit 38 O ? A(10) 68 1 Z
+bit 37 O ? A(9) 68 1 Z
+bit 36 O ? A(8) 68 1 Z
+bit 35 O ? A(7) 68 1 Z
+bit 34 O ? A(6) 68 1 Z
+bit 33 O ? A(5) 68 1 Z
+bit 32 O ? A(4) 68 1 Z
+bit 31 O ? A(3) 68 1 Z
+bit 30 O ? A(2) 68 1 Z
+bit 29 O ? A(1) 68 1 Z
+bit 28 O ? A(0) 68 1 Z
+bit 27 C 1 .
+bit 26 O ? UDCN 27 1 Z
+bit 25 I ? UDCN
+bit 24 X ? .
+bit 23 C 1 .
+bit 22 O ? UDCP 23 1 Z
+bit 21 I ? UDCP
+bit 20 C 0 .
+bit 19 O ? RXD1 20 0 Z
+bit 18 I ? RXD1
+bit 17 C 0 .
+bit 16 O ? TXD1 17 0 Z
+bit 15 I ? TXD1
+bit 14 C 0 .
+bit 13 O ? RXD2 14 0 Z
+bit 12 I ? RXD2
+bit 11 C 0 .
+bit 10 O ? TXD2 11 0 Z
+bit 9 I ? TXD2
+bit 8 C 0 .
+bit 7 O ? RXD3 8 0 Z
+bit 6 I ? RXD3
+bit 5 C 0 .
+bit 4 O ? TXD3 5 0 Z
+bit 3 I ? TXD3
+bit 2 I ? RESET
+bit 1 O ? RESETO
+bit 0 I ? ROMSEL
--- /dev/null
+#
+# $Id$
+#
+# Copyright (C) 2002 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Asier Llano <a.llano@usyscom.com>, 2004.
+#
+# Documentation:
+# [1] Freescale, "Freescale MPC5200 Users Guide", Rev. 2, 08/2004
+# Order Number: MPC5200UG
+#
+
+# bits 27-12 of the Device Identification Register
+0000000000010001 mpc5200 mpc5200 # see 21.8.1.1 in [1]
--- /dev/null
+#
+# $Id$
+#
+# Copyright (C) 2002 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Asier Llano <a.llano@usyscom.com>, 2004.
+#
+# Documentation:
+# [1] Freescale, "Freescale MPC5200 Users Guide", Rev. 2, 08/2004
+# Order Number: MPC5200UG
+#
+
+# bits 31-28 of the Device Identification Register
+# see 21.8.1.1 in [1]
+0000 mpc5200 0
+0001 mpc5200 B
--- /dev/null
+#
+# $Id$
+#
+# Copyright (C) 2002 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Asier Llano <a.llano@usyscom.com>, 2004.
+#
+# Documentation:
+# [1] Freescale, "Freescale MPC5200 Users Guide", Rev. 2, 08/2004
+# Order Number: MPC5200UG
+# [2] Freescale, "MPC5200BSDL", Rev. 1.2,
+# Order Number: MPC5200BSDL
+#
+
+# see Table 2-1 in [1]
+signal TEST_MODE_0 B02
+signal TEST_MODE_1 A01
+signal TEST_SEL_0 B01
+signal TEST_SEL_1 C03
+signal RTC_XTAL_IN C02
+signal RTC_XTAL_OUT C01
+signal TIMER_2 D03
+signal TIMER_3 D02
+signal TIMER_4 D01
+signal TIMER_5 E03
+signal TIMER_6 E02
+signal TIMER_7 E01
+signal USB_9 F03
+signal USB_8 F02
+signal USB_7 F01
+signal USB_6 G04
+signal USB_5 G03
+signal USB_4 G02
+signal USB_3 G01
+signal USB_2 H03
+signal USB_1 H02
+signal USB_0 H01
+signal ETH_17 J04
+signal ETH_10 J03
+signal ETH_4 J02
+signal ETH_3 J01
+signal ETH_2 K03
+signal ETH_1 K02
+signal ETH_0 K01
+signal ETH_11 L04
+signal ETH_5 L03
+signal ETH_16 L02
+signal ETH_9 L01
+signal ETH_8 M03
+signal ETH_12 M02
+signal ETH_13 M01
+signal ETH_14 N04
+signal ETH_15 N03
+signal ETH_6 N02
+signal ETH_7 N01
+signal IRQ0 P03
+signal IRQ2 P02
+signal IRQ1 P01
+signal PCI_GNT_B R04
+signal EXT_AD_30 R03
+signal PCI_RESET_B R02
+signal IRQ3 R01
+signal EXT_AD_28 T03
+signal EXT_AD_26 T02
+signal PCI_CLOCK T01
+signal EXT_AD_24 U03
+signal PCI_IDSEL U02
+signal PCI_REQ_B U01
+signal EXT_AD_20 V02
+signal EXT_AD_31 V01
+signal EXT_AD_29 W01
+signal EXT_AD_27 Y01
+signal EXT_AD_25 W02
+signal PCI_CBE_3_B Y02
+signal EXT_AD_22 V03
+signal EXT_AD_23 W03
+signal EXT_AD_21 Y03
+signal EXT_AD_18 V04
+signal EXT_AD_16 W04
+signal EXT_AD_19 Y04
+signal PCI_FRAME_B V05
+signal PCI_TRDY_B W05
+signal EXT_AD_17 Y05
+signal PCI_STOP_B V06
+signal PCI_CBE_2_B W06
+signal PCI_IRDY_B Y06
+signal PCI_PAR V07
+signal PCI_DEVSEL_B W07
+signal PCI_PERR_B Y07
+signal EXT_AD_15 U08
+signal EXT_AD_13 V08
+signal PCI_SERR_B W08
+signal PCI_CBE_1_B Y08
+signal EXT_AD_11 V09
+signal EXT_AD_14 W09
+signal EXT_AD_12 Y09
+signal EXT_AD_9 V10
+signal PCI_CBE_0_B W10
+signal EXT_AD_10 Y10
+signal EXT_AD_6 U11
+signal EXT_AD_4 V11
+signal EXT_AD_8 W11
+signal EXT_AD_7 Y11
+signal EXT_AD_2 V12
+signal EXT_AD_5 W12
+signal EXT_AD_3 Y12
+signal EXT_AD_0 V13
+signal EXT_AD_1 W13
+signal LP_TS_B Y13
+signal LP_ACK U14
+signal LP_ALE_B V14
+signal LP_CS0_B W14
+signal LP_CS1_B Y14
+signal LP_CS2_B V15
+signal LP_CS3_B W15
+signal LP_CS4_B Y15
+signal LP_CS5_B V16
+signal LP_RW W16
+signal ATA_ISOLATION Y16
+signal ATA_DRQ V17
+signal ATA_IOW_B W17
+signal ATA_IOR_B Y17
+signal ATA_IOCHRDY W18
+signal ATA_DACK_B Y18
+signal ATA_INTRQ Y19
+signal TIMER_0 Y20
+signal I2C_1 W19
+signal I2C_3 W20
+signal TIMER_1 V18
+signal I2C_0 V19
+signal I2C_2 V20
+signal MEM_MDQ_31 U18
+signal MEM_MDQ_1 U19
+signal MEM_MDQ_0 U20
+signal MEM_MDQ_30 T18
+signal MEM_MDQ_3 T19
+signal MEM_MDQ_2 T20
+signal MEM_MDQ_28 R17
+signal MEM_MDQ_29 R18
+signal MEM_MDQ_5 R19
+signal MEM_MDQ_4 R20
+signal MEM_MDQ_27 P18
+signal MEM_MDQ_7 P19
+signal MEM_MDQ_6 P20
+signal MEM_MDQ_25 N17
+signal MEM_MDQ_26 N18
+signal MEM_DQM_0 N19
+signal MEM_MDQS_0 N20
+signal MEM_MDQ_24 M18
+signal MEM_MDQ_14 M19
+signal MEM_MDQ_15 M20
+signal MEM_DQM_3 L17
+signal MEM_MDQS_3 L18
+signal MEM_MDQ_12 L19
+signal MEM_MDQ_13 L20
+signal MEM_MDQ_23 K18
+signal MEM_MDQ_10 K19
+signal MEM_MDQ_11 K20
+signal MEM_MDQ_22 J17
+signal MEM_MDQ_21 J18
+signal MEM_MDQ_8 J19
+signal MEM_MDQ_9 J20
+signal MEM_MDQ_20 H18
+signal MEM_DQM_1 H19
+signal MEM_MDQS_1 H20
+signal MEM_MDQ_18 G17
+signal MEM_MDQ_19 G18
+signal MEM_CLK G19
+signal MEM_CLK_B G20 G19
+signal MEM_MDQ_17 F18
+signal MEM_MA_12 F19
+signal MEM_CLK_EN F20
+signal MEM_MDQ_16 E18
+signal MEM_MA_9 E19
+signal MEM_MA_11 E20
+signal MEM_MDQS_2 D18
+signal MEM_MA_7 D19
+signal MEM_MA_8 D20
+signal MEM_MA_6 C20
+signal MEM_MA_5 C19
+signal MEM_MA_4 B20
+signal MEM_DQM_2 A20
+signal MEM_CAS_B B19
+signal MEM_WE_B A19
+signal MEM_MBA_0 C18
+signal MEM_CS_0_B B18
+signal MEM_RAS_B A18
+signal MEM_MA_0 C17
+signal MEM_MA_10 B17
+signal MEM_MBA_1 A17
+signal MEM_MA_3 C16
+signal MEM_MA_2 B16
+signal MEM_MA_1 A16
+signal GPIO_WKUP_6 C15
+signal SYS_PLL_TPA B15
+signal SYS_XTAL_IN A15
+signal SYS_XTAL_OUT D14
+signal SYS_PLL_AVSS C14
+signal SYS_PLL_AVDD B14
+signal SRESET_B A14
+signal PSC6_3 C13
+signal HRESET_B B13
+signal PORRESET_B A13
+signal GPIO_WKUP_7 C12
+signal PSC6_0 B12
+signal PSC6_2 A12
+signal PSC6_1 C11
+signal PSC1_0 B11
+signal PSC1_1 A11
+signal PSC1_2 C10
+signal PSC1_3 B10
+signal PSC1_4 A10
+signal PSC2_0 C09
+signal PSC2_1 B09
+signal PSC2_2 A09
+signal LP_OE D08
+signal CORE_PLL_AVDD C08
+signal PSC2_3 B08
+signal PSC2_4 A08
+signal PSC3_0 C07
+signal PSC3_1 B07
+signal PSC3_2 A07
+signal PSC3_3 C06
+signal PSC3_4 B06
+signal PSC3_5 A06
+signal PSC3_6 C05
+signal PSC3_7 B05
+signal PSC3_8 A05
+signal PSC3_9 C04
+signal JTAG_TCK B04
+signal JTAG_TMS A04
+signal JTAG_TDI A03
+signal JTAG_TRST_B B03
+signal JTAG_TDO A02
+signal VDD_MEM_IO P17 M17 T17 K17 F17 E17 H17 D17 D15 D13 D12
+signal VDD_IO U16 U13 U10 U09 U06 U05 T04 F04 E04 H04 D09 D06
+signal VDD_CORE U15 U12 U07 P04 K04 M04 D10 D07 D05 D11
+signal VSS_IO_CORE D16
+
+
+register BSR 615
+register BR 1
+register DIR 32
+
+instruction length 6
+
+# see Table 21-2 in [1]
+
+# Mandatory instructions
+instruction IDCODE 011101 DIR
+instruction BYPASS 111111 BR
+instruction SAMPLE/PRELOAD 100000 BSR
+instruction EXTEST 000000 BSR
+
+# Optional instructions
+instruction CLAMP 100001 BR
+instruction HIGHZ 011111 BR
+
+
+# see [2]
+bit 614 I 1 PSC3_9
+bit 613 O 1 PSC3_9 612 1 Z
+bit 612 C 1 *
+bit 611 I 1 PSC3_8
+bit 610 O 1 PSC3_8 609 1 Z
+bit 609 C 1 *
+bit 608 I 1 PSC3_7
+bit 607 O 1 PSC3_7 606 1 Z
+bit 606 C 1 *
+bit 605 I 1 PSC3_6
+bit 604 O 1 PSC3_6 603 1 Z
+bit 603 C 1 *
+bit 602 I 1 PSC3_5
+bit 601 O 1 PSC3_5 600 1 Z
+bit 600 C 1 *
+bit 599 I 1 PSC3_4
+bit 598 O 1 PSC3_4 597 1 Z
+bit 597 C 1 *
+bit 596 I 1 PSC3_3
+bit 595 O 1 PSC3_3 594 1 Z
+bit 594 C 1 *
+bit 593 I 1 PSC3_2
+bit 592 O 1 PSC3_2 591 1 Z
+bit 591 C 1 *
+bit 590 I 1 PSC3_1
+bit 589 O 1 PSC3_1 588 1 Z
+bit 588 C 1 *
+bit 587 I 1 PSC3_0
+bit 586 O 1 PSC3_0 585 1 Z
+bit 585 C 1 *
+bit 584 I 1 PSC2_4
+bit 583 O 1 PSC2_4 582 1 Z
+bit 582 C 1 *
+bit 581 I 1 PSC2_3
+bit 580 O 1 PSC2_3 579 1 Z
+bit 579 C 1 *
+bit 578 I 1 LP_OE
+bit 577 O 1 LP_OE 576 1 Z
+bit 576 C 1 *
+bit 575 I 1 PSC2_2
+bit 574 O 1 PSC2_2 573 1 Z
+bit 573 C 1 *
+bit 572 I 1 PSC2_1
+bit 571 O 1 PSC2_1 570 1 Z
+bit 570 C 1 *
+bit 569 I 1 PSC2_0
+bit 568 O 1 PSC2_0 567 1 Z
+bit 567 C 1 *
+bit 566 I 1 PSC1_4
+bit 565 O 1 PSC1_4 564 1 Z
+bit 564 C 1 *
+bit 563 I 1 PSC1_3
+bit 562 O 1 PSC1_3 561 1 Z
+bit 561 C 1 *
+bit 560 I 1 PSC1_2
+bit 559 O 1 PSC1_2 558 1 Z
+bit 558 C 1 *
+bit 557 I 1 PSC1_1
+bit 556 O 1 PSC1_1 555 1 Z
+bit 555 C 1 *
+bit 554 I 1 PSC1_0
+bit 553 O 1 PSC1_0 552 1 Z
+bit 552 C 1 *
+bit 551 I 1 PSC6_1
+bit 550 O 1 PSC6_1 549 1 Z
+bit 549 C 1 *
+bit 548 I 1 PSC6_2
+bit 547 O 1 PSC6_2 546 1 Z
+bit 546 C 1 *
+bit 545 I 1 PSC6_0
+bit 544 O 1 PSC6_0 543 1 Z
+bit 543 C 1 *
+bit 542 I 1 GPIO_WKUP_7
+bit 541 O 1 GPIO_WKUP_7 540 1 Z
+bit 540 C 1 *
+bit 539 I 1 PORRESET_B
+bit 538 O 0 *
+bit 537 O 0 *
+bit 536 I 1 HRESET_B
+bit 535 O 1 HRESET_B 534 1 Z
+bit 534 C 1 *
+bit 533 I 1 PSC6_3
+bit 532 O 1 PSC6_3 531 1 Z
+bit 531 C 1 *
+bit 530 I 1 SRESET_B
+bit 529 O 1 SRESET_B 528 1 Z
+bit 528 C 1 *
+bit 527 I 1 SYS_PLL_TPA
+bit 526 O 1 SYS_PLL_TPA 525 1 Z
+bit 525 C 1 *
+bit 524 I 1 GPIO_WKUP_6
+bit 523 O 1 GPIO_WKUP_6 522 1 Z
+bit 522 C 1 *
+bit 521 I 1 MEM_MA_1
+bit 520 O 1 MEM_MA_1 519 1 Z
+bit 519 C 1 *
+bit 518 I 1 MEM_MA_2
+bit 517 O 1 MEM_MA_2 516 1 Z
+bit 516 C 1 *
+bit 515 I 1 MEM_MA_3
+bit 514 O 1 MEM_MA_3 513 1 Z
+bit 513 C 1 *
+bit 512 I 1 MEM_MBA_1
+bit 511 O 1 MEM_MBA_1 510 1 Z
+bit 510 C 1 *
+bit 509 I 1 MEM_MA_10
+bit 508 O 1 MEM_MA_10 507 1 Z
+bit 507 C 1 *
+bit 506 I 1 MEM_MA_0
+bit 505 O 1 MEM_MA_0 504 1 Z
+bit 504 C 1 *
+bit 503 I 1 MEM_RAS_B
+bit 502 O 1 MEM_RAS_B 501 1 Z
+bit 501 C 1 *
+bit 500 I 1 MEM_CS_0_B
+bit 499 O 1 MEM_CS_0_B 498 1 Z
+bit 498 C 1 *
+bit 497 I 1 MEM_MBA_0
+bit 496 O 1 MEM_MBA_0 495 1 Z
+bit 495 C 1 *
+bit 494 I 1 MEM_WE_B
+bit 493 O 1 MEM_WE_B 492 1 Z
+bit 492 C 1 *
+bit 491 I 1 MEM_CAS_B
+bit 490 O 1 MEM_CAS_B 489 1 Z
+bit 489 C 1 *
+bit 488 I 1 MEM_DQM_2
+bit 487 O 1 MEM_DQM_2 486 1 Z
+bit 486 C 1 *
+bit 485 I 1 MEM_MA_4
+bit 484 O 1 MEM_MA_4 483 1 Z
+bit 483 C 1 *
+bit 482 I 1 MEM_MA_5
+bit 481 O 1 MEM_MA_5 480 1 Z
+bit 480 C 1 *
+bit 479 I 1 MEM_MA_6
+bit 478 O 1 MEM_MA_6 477 1 Z
+bit 477 C 1 *
+bit 476 I 1 MEM_MA_8
+bit 475 O 1 MEM_MA_8 474 1 Z
+bit 474 C 1 *
+bit 473 I 1 MEM_MA_7
+bit 472 O 1 MEM_MA_7 471 1 Z
+bit 471 C 1 *
+bit 470 I 1 MEM_MDQS_2
+bit 469 O 1 MEM_MDQS_2 468 1 Z
+bit 468 C 1 *
+bit 467 I 1 MEM_MA_11
+bit 466 O 1 MEM_MA_11 465 1 Z
+bit 465 C 1 *
+bit 464 I 1 MEM_MA_9
+bit 463 O 1 MEM_MA_9 462 1 Z
+bit 462 C 1 *
+bit 461 I 1 MEM_MDQ_16
+bit 460 O 1 MEM_MDQ_16 459 1 Z
+bit 459 C 1 *
+bit 458 I 1 MEM_CLK_EN
+bit 457 O 1 MEM_CLK_EN 456 1 Z
+bit 456 C 1 *
+bit 455 I 1 MEM_MA_12
+bit 454 O 1 MEM_MA_12 453 1 Z
+bit 453 C 1 *
+bit 452 I 1 MEM_MDQ_17
+bit 451 O 1 MEM_MDQ_17 450 1 Z
+bit 450 C 1 *
+bit 449 I 1 MEM_CLK_B
+bit 448 O 1 MEM_CLK_B 447 1 Z
+bit 447 C 1 *
+bit 446 I 1 MEM_CLK
+bit 445 O 1 MEM_CLK 444 1 Z
+bit 444 C 1 *
+bit 443 I 1 MEM_MDQ_19
+bit 442 O 1 MEM_MDQ_19 441 1 Z
+bit 441 C 1 *
+bit 440 I 1 MEM_MDQ_18
+bit 439 O 1 MEM_MDQ_18 438 1 Z
+bit 438 C 1 *
+bit 437 I 1 MEM_MDQS_1
+bit 436 O 1 MEM_MDQS_1 435 1 Z
+bit 435 C 1 *
+bit 434 I 1 MEM_DQM_1
+bit 433 O 1 MEM_DQM_1 432 1 Z
+bit 432 C 1 *
+bit 431 I 1 MEM_MDQ_20
+bit 430 O 1 MEM_MDQ_20 429 1 Z
+bit 429 C 1 *
+bit 428 I 1 MEM_MDQ_9
+bit 427 O 1 MEM_MDQ_9 426 1 Z
+bit 426 C 1 *
+bit 425 I 1 MEM_MDQ_8
+bit 424 O 1 MEM_MDQ_8 423 1 Z
+bit 423 C 1 *
+bit 422 I 1 MEM_MDQ_21
+bit 421 O 1 MEM_MDQ_21 420 1 Z
+bit 420 C 1 *
+bit 419 I 1 MEM_MDQ_22
+bit 418 O 1 MEM_MDQ_22 417 1 Z
+bit 417 C 1 *
+bit 416 I 1 MEM_MDQ_11
+bit 415 O 1 MEM_MDQ_11 414 1 Z
+bit 414 C 1 *
+bit 413 I 1 MEM_MDQ_10
+bit 412 O 1 MEM_MDQ_10 411 1 Z
+bit 411 C 1 *
+bit 410 I 1 MEM_MDQ_23
+bit 409 O 1 MEM_MDQ_23 408 1 Z
+bit 408 C 1 *
+bit 407 I 1 MEM_MDQ_13
+bit 406 O 1 MEM_MDQ_13 405 1 Z
+bit 405 C 1 *
+bit 404 I 1 MEM_MDQ_12
+bit 403 O 1 MEM_MDQ_12 402 1 Z
+bit 402 C 1 *
+bit 401 I 1 MEM_MDQS_3
+bit 400 O 1 MEM_MDQS_3 399 1 Z
+bit 399 C 1 *
+bit 398 I 1 MEM_DQM_3
+bit 397 O 1 MEM_DQM_3 396 1 Z
+bit 396 C 1 *
+bit 395 I 1 MEM_MDQ_15
+bit 394 O 1 MEM_MDQ_15 393 1 Z
+bit 393 C 1 *
+bit 392 I 1 MEM_MDQ_14
+bit 391 O 1 MEM_MDQ_14 390 1 Z
+bit 390 C 1 *
+bit 389 I 1 MEM_MDQ_24
+bit 388 O 1 MEM_MDQ_24 387 1 Z
+bit 387 C 1 *
+bit 386 I 1 MEM_MDQS_0
+bit 385 O 1 MEM_MDQS_0 384 1 Z
+bit 384 C 1 *
+bit 383 I 1 MEM_DQM_0
+bit 382 O 1 MEM_DQM_0 381 1 Z
+bit 381 C 1 *
+bit 380 I 1 MEM_MDQ_26
+bit 379 O 1 MEM_MDQ_26 378 1 Z
+bit 378 C 1 *
+bit 377 I 1 MEM_MDQ_25
+bit 376 O 1 MEM_MDQ_25 375 1 Z
+bit 375 C 1 *
+bit 374 I 1 MEM_MDQ_6
+bit 373 O 1 MEM_MDQ_6 372 1 Z
+bit 372 C 1 *
+bit 371 I 1 MEM_MDQ_7
+bit 370 O 1 MEM_MDQ_7 369 1 Z
+bit 369 C 1 *
+bit 368 I 1 MEM_MDQ_27
+bit 367 O 1 MEM_MDQ_27 366 1 Z
+bit 366 C 1 *
+bit 365 I 1 MEM_MDQ_4
+bit 364 O 1 MEM_MDQ_4 363 1 Z
+bit 363 C 1 *
+bit 362 I 1 MEM_MDQ_5
+bit 361 O 1 MEM_MDQ_5 360 1 Z
+bit 360 C 1 *
+bit 359 I 1 MEM_MDQ_29
+bit 358 O 1 MEM_MDQ_29 357 1 Z
+bit 357 C 1 *
+bit 356 I 1 MEM_MDQ_28
+bit 355 O 1 MEM_MDQ_28 354 1 Z
+bit 354 C 1 *
+bit 353 I 1 MEM_MDQ_2
+bit 352 O 1 MEM_MDQ_2 351 1 Z
+bit 351 C 1 *
+bit 350 I 1 MEM_MDQ_3
+bit 349 O 1 MEM_MDQ_3 348 1 Z
+bit 348 C 1 *
+bit 347 I 1 MEM_MDQ_30
+bit 346 O 1 MEM_MDQ_30 345 1 Z
+bit 345 C 1 *
+bit 344 I 1 MEM_MDQ_0
+bit 343 O 1 MEM_MDQ_0 342 1 Z
+bit 342 C 1 *
+bit 341 I 1 MEM_MDQ_1
+bit 340 O 1 MEM_MDQ_1 339 1 Z
+bit 339 C 1 *
+bit 338 I 1 MEM_MDQ_31
+bit 337 O 1 MEM_MDQ_31 336 1 Z
+bit 336 C 1 *
+bit 335 I 1 I2C_2
+bit 334 O 1 I2C_2 333 1 Z
+bit 333 C 1 *
+bit 332 I 1 I2C_0
+bit 331 O 1 I2C_0 330 1 Z
+bit 330 C 1 *
+bit 329 I 1 TIMER_1
+bit 328 O 1 TIMER_1 327 1 Z
+bit 327 C 1 *
+bit 326 I 1 I2C_3
+bit 325 O 1 I2C_3 324 1 Z
+bit 324 C 1 *
+bit 323 I 1 I2C_1
+bit 322 O 1 I2C_1 321 1 Z
+bit 321 C 1 *
+bit 320 I 1 TIMER_0
+bit 319 O 1 TIMER_0 318 1 Z
+bit 318 C 1 *
+bit 317 I 1 ATA_INTRQ
+bit 316 O 1 ATA_INTRQ 315 1 Z
+bit 315 C 1 *
+bit 314 I 1 ATA_DACK_B
+bit 313 O 1 ATA_DACK_B 312 1 Z
+bit 312 C 1 *
+bit 311 I 1 ATA_IOCHRDY
+bit 310 O 1 ATA_IOCHRDY 309 1 Z
+bit 309 C 1 *
+bit 308 I 1 ATA_IOR_B
+bit 307 O 1 ATA_IOR_B 306 1 Z
+bit 306 C 1 *
+bit 305 I 1 ATA_IOW_B
+bit 304 O 1 ATA_IOW_B 303 1 Z
+bit 303 C 1 *
+bit 302 I 1 ATA_DRQ
+bit 301 O 1 ATA_DRQ 300 1 Z
+bit 300 C 1 *
+bit 299 I 1 ATA_ISOLATION
+bit 298 O 1 ATA_ISOLATION 297 1 Z
+bit 297 C 1 *
+bit 296 I 1 LP_RW
+bit 295 O 1 LP_RW 294 1 Z
+bit 294 C 1 *
+bit 293 I 1 LP_CS5_B
+bit 292 O 1 LP_CS5_B 291 1 Z
+bit 291 C 1 *
+bit 290 I 1 LP_CS4_B
+bit 289 O 1 LP_CS4_B 288 1 Z
+bit 288 C 1 *
+bit 287 I 1 LP_CS3_B
+bit 286 O 1 LP_CS3_B 285 1 Z
+bit 285 C 1 *
+bit 284 I 1 LP_CS2_B
+bit 283 O 1 LP_CS2_B 282 1 Z
+bit 282 C 1 *
+bit 281 I 1 LP_CS1_B
+bit 280 O 1 LP_CS1_B 279 1 Z
+bit 279 C 1 *
+bit 278 I 1 LP_CS0_B
+bit 277 O 1 LP_CS0_B 276 1 Z
+bit 276 C 1 *
+bit 275 I 1 LP_ALE_B
+bit 274 O 1 LP_ALE_B 273 1 Z
+bit 273 C 1 *
+bit 272 I 1 LP_ACK
+bit 271 O 1 LP_ACK 270 1 Z
+bit 270 C 1 *
+bit 269 I 1 LP_TS_B
+bit 268 O 1 LP_TS_B 267 1 Z
+bit 267 C 1 *
+bit 266 I 1 EXT_AD_1
+bit 265 O 1 EXT_AD_1 264 1 Z
+bit 264 C 1 *
+bit 263 I 1 EXT_AD_0
+bit 262 O 1 EXT_AD_0 261 1 Z
+bit 261 C 1 *
+bit 260 I 1 EXT_AD_3
+bit 259 O 1 EXT_AD_3 258 1 Z
+bit 258 C 1 *
+bit 257 I 1 EXT_AD_5
+bit 256 O 1 EXT_AD_5 255 1 Z
+bit 255 C 1 *
+bit 254 I 1 EXT_AD_2
+bit 253 O 1 EXT_AD_2 252 1 Z
+bit 252 C 1 *
+bit 251 I 1 EXT_AD_7
+bit 250 O 1 EXT_AD_7 249 1 Z
+bit 249 C 1 *
+bit 248 I 1 EXT_AD_8
+bit 247 O 1 EXT_AD_8 246 1 Z
+bit 246 C 1 *
+bit 245 I 1 EXT_AD_4
+bit 244 O 1 EXT_AD_4 243 1 Z
+bit 243 C 1 *
+bit 242 I 1 EXT_AD_6
+bit 241 O 1 EXT_AD_6 240 1 Z
+bit 240 C 1 *
+bit 239 I 1 EXT_AD_10
+bit 238 O 1 EXT_AD_10 237 1 Z
+bit 237 C 1 *
+bit 236 I 1 PCI_CBE_0_B
+bit 235 O 1 PCI_CBE_0_B 234 1 Z
+bit 234 C 1 *
+bit 233 I 1 EXT_AD_9
+bit 232 O 1 EXT_AD_9 231 1 Z
+bit 231 C 1 *
+bit 230 I 1 EXT_AD_12
+bit 229 O 1 EXT_AD_12 228 1 Z
+bit 228 C 1 *
+bit 227 I 1 EXT_AD_14
+bit 226 O 1 EXT_AD_14 225 1 Z
+bit 225 C 1 *
+bit 224 I 1 EXT_AD_11
+bit 223 O 1 EXT_AD_11 222 1 Z
+bit 222 C 1 *
+bit 221 I 1 PCI_CBE_1_B
+bit 220 O 1 PCI_CBE_1_B 219 1 Z
+bit 219 C 1 *
+bit 218 I 1 PCI_SERR_B
+bit 217 O 1 PCI_SERR_B 216 1 Z
+bit 216 C 1 *
+bit 215 I 1 EXT_AD_13
+bit 214 O 1 EXT_AD_13 213 1 Z
+bit 213 C 1 *
+bit 212 I 1 EXT_AD_15
+bit 211 O 1 EXT_AD_15 210 1 Z
+bit 210 C 1 *
+bit 209 I 1 PCI_PERR_B
+bit 208 O 1 PCI_PERR_B 207 1 Z
+bit 207 C 1 *
+bit 206 I 1 PCI_DEVSEL_B
+bit 205 O 1 PCI_DEVSEL_B 204 1 Z
+bit 204 C 1 *
+bit 203 I 1 PCI_PAR
+bit 202 O 1 PCI_PAR 201 1 Z
+bit 201 C 1 *
+bit 200 I 1 PCI_IRDY_B
+bit 199 O 1 PCI_IRDY_B 198 1 Z
+bit 198 C 1 *
+bit 197 I 1 PCI_CBE_2_B
+bit 196 O 1 PCI_CBE_2_B 195 1 Z
+bit 195 C 1 *
+bit 194 I 1 PCI_STOP_B
+bit 193 O 1 PCI_STOP_B 192 1 Z
+bit 192 C 1 *
+bit 191 I 1 EXT_AD_17
+bit 190 O 1 EXT_AD_17 189 1 Z
+bit 189 C 1 *
+bit 188 I 1 PCI_TRDY_B
+bit 187 O 1 PCI_TRDY_B 186 1 Z
+bit 186 C 1 *
+bit 185 I 1 PCI_FRAME_B
+bit 184 O 1 PCI_FRAME_B 183 1 Z
+bit 183 C 1 *
+bit 182 I 1 EXT_AD_19
+bit 181 O 1 EXT_AD_19 180 1 Z
+bit 180 C 1 *
+bit 179 I 1 EXT_AD_16
+bit 178 O 1 EXT_AD_16 177 1 Z
+bit 177 C 1 *
+bit 176 I 1 EXT_AD_18
+bit 175 O 1 EXT_AD_18 174 1 Z
+bit 174 C 1 *
+bit 173 I 1 EXT_AD_21
+bit 172 O 1 EXT_AD_21 171 1 Z
+bit 171 C 1 *
+bit 170 I 1 EXT_AD_23
+bit 169 O 1 EXT_AD_23 168 1 Z
+bit 168 C 1 *
+bit 167 I 1 EXT_AD_22
+bit 166 O 1 EXT_AD_22 165 1 Z
+bit 165 C 1 *
+bit 164 I 1 PCI_CBE_3_B
+bit 163 O 1 PCI_CBE_3_B 162 1 Z
+bit 162 C 1 *
+bit 161 I 1 EXT_AD_25
+bit 160 O 1 EXT_AD_25 159 1 Z
+bit 159 C 1 *
+bit 158 I 1 EXT_AD_27
+bit 157 O 1 EXT_AD_27 156 1 Z
+bit 156 C 1 *
+bit 155 I 1 EXT_AD_29
+bit 154 O 1 EXT_AD_29 153 1 Z
+bit 153 C 1 *
+bit 152 I 1 EXT_AD_31
+bit 151 O 1 EXT_AD_31 150 1 Z
+bit 150 C 1 *
+bit 149 I 1 EXT_AD_20
+bit 148 O 1 EXT_AD_20 147 1 Z
+bit 147 C 1 *
+bit 146 I 1 PCI_REQ_B
+bit 145 O 1 PCI_REQ_B 144 1 Z
+bit 144 C 1 *
+bit 143 I 1 PCI_IDSEL
+bit 142 O 1 PCI_IDSEL 141 1 Z
+bit 141 C 1 *
+bit 140 I 1 EXT_AD_24
+bit 139 O 1 EXT_AD_24 138 1 Z
+bit 138 C 1 *
+bit 137 I 1 PCI_CLOCK
+bit 136 O 1 PCI_CLOCK 135 1 Z
+bit 135 C 1 *
+bit 134 I 1 EXT_AD_26
+bit 133 O 1 EXT_AD_26 132 1 Z
+bit 132 C 1 *
+bit 131 I 1 EXT_AD_28
+bit 130 O 1 EXT_AD_28 129 1 Z
+bit 129 C 1 *
+bit 128 I 1 IRQ3
+bit 127 O 1 IRQ3 126 1 Z
+bit 126 C 1 *
+bit 125 I 1 PCI_RESET_B
+bit 124 O 1 PCI_RESET_B 123 1 Z
+bit 123 C 1 *
+bit 122 I 1 EXT_AD_30
+bit 121 O 1 EXT_AD_30 120 1 Z
+bit 120 C 1 *
+bit 119 I 1 PCI_GNT_B
+bit 118 O 1 PCI_GNT_B 117 1 Z
+bit 117 C 1 *
+bit 116 I 1 IRQ1
+bit 115 O 1 IRQ1 114 1 Z
+bit 114 C 1 *
+bit 113 I 1 IRQ2
+bit 112 O 1 IRQ2 111 1 Z
+bit 111 C 1 *
+bit 110 I 1 IRQ0
+bit 109 O 1 IRQ0 108 1 Z
+bit 108 C 1 *
+bit 107 I 1 ETH_7
+bit 106 O 1 ETH_7 105 1 Z
+bit 105 C 1 *
+bit 104 I 1 ETH_6
+bit 103 O 1 ETH_6 102 1 Z
+bit 102 C 1 *
+bit 101 I 1 ETH_15
+bit 100 O 1 ETH_15 99 1 Z
+bit 99 C 1 *
+bit 98 I 1 ETH_14
+bit 97 O 1 ETH_14 96 1 Z
+bit 96 C 1 *
+bit 95 I 1 ETH_13
+bit 94 O 1 ETH_13 93 1 Z
+bit 93 C 1 *
+bit 92 I 1 ETH_12
+bit 91 O 1 ETH_12 90 1 Z
+bit 90 C 1 *
+bit 89 I 1 ETH_8
+bit 88 O 1 ETH_8 87 1 Z
+bit 87 C 1 *
+bit 86 I 1 ETH_9
+bit 85 O 1 ETH_9 84 1 Z
+bit 84 C 1 *
+bit 83 I 1 ETH_16
+bit 82 O 1 ETH_16 81 1 Z
+bit 81 C 1 *
+bit 80 I 1 ETH_5
+bit 79 O 1 ETH_5 78 1 Z
+bit 78 C 1 *
+bit 77 I 1 ETH_11
+bit 76 O 1 ETH_11 75 1 Z
+bit 75 C 1 *
+bit 74 I 1 ETH_0
+bit 73 O 1 ETH_0 72 1 Z
+bit 72 C 1 *
+bit 71 I 1 ETH_1
+bit 70 O 1 ETH_1 69 1 Z
+bit 69 C 1 *
+bit 68 I 1 ETH_2
+bit 67 O 1 ETH_2 66 1 Z
+bit 66 C 1 *
+bit 65 I 1 ETH_3
+bit 64 O 1 ETH_3 63 1 Z
+bit 63 C 1 *
+bit 62 I 1 ETH_4
+bit 61 O 1 ETH_4 60 1 Z
+bit 60 C 1 *
+bit 59 I 1 ETH_10
+bit 58 O 1 ETH_10 57 1 Z
+bit 57 C 1 *
+bit 56 I 1 ETH_17
+bit 55 O 1 ETH_17 54 1 Z
+bit 54 C 1 *
+bit 53 I 1 USB_0
+bit 52 O 1 USB_0 51 1 Z
+bit 51 C 1 *
+bit 50 I 1 USB_1
+bit 49 O 1 USB_1 48 1 Z
+bit 48 C 1 *
+bit 47 I 1 USB_2
+bit 46 O 1 USB_2 45 1 Z
+bit 45 C 1 *
+bit 44 I 1 USB_3
+bit 43 O 1 USB_3 42 1 Z
+bit 42 C 1 *
+bit 41 I 1 USB_4
+bit 40 O 1 USB_4 39 1 Z
+bit 39 C 1 *
+bit 38 I 1 USB_5
+bit 37 O 1 USB_5 36 1 Z
+bit 36 C 1 *
+bit 35 I 1 USB_6
+bit 34 O 1 USB_6 33 1 Z
+bit 33 C 1 *
+bit 32 I 1 USB_7
+bit 31 O 1 USB_7 30 1 Z
+bit 30 C 1 *
+bit 29 I 1 USB_8
+bit 28 O 1 USB_8 27 1 Z
+bit 27 C 1 *
+bit 26 I 1 USB_9
+bit 25 O 1 USB_9 24 1 Z
+bit 24 C 1 *
+bit 23 I 1 TIMER_7
+bit 22 O 1 TIMER_7 21 1 Z
+bit 21 C 1 *
+bit 20 I 1 TIMER_6
+bit 19 O 1 TIMER_6 18 1 Z
+bit 18 C 1 *
+bit 17 I 1 TIMER_5
+bit 16 O 1 TIMER_5 15 1 Z
+bit 15 C 1 *
+bit 14 I 1 TIMER_4
+bit 13 O 1 TIMER_4 12 1 Z
+bit 12 C 1 *
+bit 11 I 1 TIMER_3
+bit 10 O 1 TIMER_3 9 1 Z
+bit 9 C 1 *
+bit 8 I 1 TIMER_2
+bit 7 O 1 TIMER_2 6 1 Z
+bit 6 C 1 *
+bit 5 I 1 TEST_SEL_1
+bit 4 O 1 TEST_SEL_1 3 1 Z
+bit 3 C 1 *
+bit 2 I 1 TEST_SEL_0
+bit 1 O 1 TEST_SEL_0 0 1 Z
+bit 0 C 1 *
+
+initbus mpc5200
--- /dev/null
+#
+# $Id$
+#
+# Copyright (C) 2003 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Matan Ziv-Av <matan@svgalib.org>, 2003.
+#
+
+# bits 27-12 of the Device Identification Register
+0000000000000001 ar7300 AR7300
+0000000001000010 sh7727 SH7727
+0111010101101110 sh7727 SH7727
--- /dev/null
+#
+# $Id$
+#
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+#
+
+# bits 31-28 of the Device Identification Register
+0000 ar7300 0
--- /dev/null
+#
+# $Id$
+
+register BR 1
+register BSR 1
+register DIR 32
+register EJIMPCODE 32
+register EJADDRESS 32
+register EJDATA 32
+register EJCONTROL 32
+register EJALL 96
+register EJFASTDATA 33
+
+instruction length 5
+
+instruction BYPASS 11111 BR
+instruction SAMPLE/PRELOAD 00010 BSR
+instruction IDCODE 00001 DIR
+instruction EJTAG_IMPCODE 00011 EJIMPCODE
+instruction EJTAG_ADDRESS 01000 EJADDRESS
+instruction EJTAG_DATA 01001 EJDATA
+instruction EJTAG_CONTROL 01010 EJCONTROL
+instruction EJTAG_ALL 01011 EJALL
+instruction EJTAGBOOT 01100 BR
+instruction NORMALBOOT 01101 BR
+instruction EJTAG_FASTDATA 01110 EJFASTDATA
+
+initbus ejtag
+endian big
--- /dev/null
+#
+# $Id$
+#
+# JTAG declarations for Hitachi HD64465BP/HD64465BQ
+# Copyright (C) 2003 Elcom s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Marcel Telka <marcel@telka.sk>, 2003.
+#
+# Documentation:
+# [1] Hitachi Ltd., "Windows CE Intelligent Peripheral Controller
+# HD64465 User's Manual", 03/08/01, Rev. 3.0, ADE-602-168B
+#
+
+# Test Mode (see Table 4.3 in [1])
+signal TST
+signal TDI
+signal TDO
+signal TMS
+signal TCK
+signal TRST
+
+# CPU interface (see Table 4.4 in [1])
+signal CKIO
+signal A0
+signal A1
+signal A2
+signal A3
+signal A4
+signal A5
+signal A6
+signal A7
+signal A8
+signal A9
+signal A10
+signal A11
+signal A12
+signal A13
+signal A14
+signal A15
+signal A16
+signal A17
+signal A18
+signal A19
+signal A20
+signal A21
+signal A22
+signal A23
+signal A24
+signal A25
+signal D0
+signal D1
+signal D2
+signal D3
+signal D4
+signal D5
+signal D6
+signal D7
+signal D8
+signal D9
+signal D10
+signal D11
+signal D12
+signal D13
+signal D14
+signal D15
+signal D16
+signal D17
+signal D18
+signal D19
+signal D20
+signal D21
+signal D22
+signal D23
+signal D24
+signal D25
+signal D26
+signal D27
+signal D28
+signal D29
+signal D30
+signal D31
+signal nCS4
+signal nWE0
+signal nWE1
+signal nWE2
+signal nWE3
+signal nRDWR
+signal nRD
+signal nRDY
+signal nBS
+signal nDREQ0
+signal nDREQ1
+signal DRAK0
+signal DRAK1
+signal nIRQ0
+signal SH_MODE
+signal nCE1B
+signal nCE2B
+signal nCE1A
+signal nCE2A
+signal nIOIS16
+
+# PCMCIA 0 (see Table 4.5 in [1])
+signal PCC0A0
+signal PCC0A1
+signal PCC0A2
+signal PCC0A3
+signal PCC0A4
+signal PCC0A5
+signal PCC0A6
+signal PCC0A7
+signal PCC0A8
+signal PCC0A9
+signal PCC0A10
+signal PCC0A11
+signal PCC0A12
+signal PCC0A13
+signal PCC0A14
+signal PCC0A15
+signal PCC0A16
+signal PCC0A17
+signal PCC0A18
+signal PCC0A19
+signal PCC0A20
+signal PCC0A21
+signal PCC0A22
+signal PCC0A23
+signal PCC0A24
+signal PCC0A25
+signal PCC0D0
+signal PCC0D1
+signal PCC0D2
+signal PCC0D3
+signal PCC0D4
+signal PCC0D5
+signal PCC0D6
+signal PCC0D7
+signal PCC0D8
+signal PCC0D9
+signal PCC0D10
+signal PCC0D11
+signal PCC0D12
+signal PCC0D13
+signal PCC0D14
+signal PCC0D15
+signal nPCC0CE1B
+signal nPCC0CE2B
+signal nRDB
+signal nWEB
+signal nPCC0ICIORDB
+signal nPCC0ICIOWRB
+signal PCC0RESET
+signal nPCC0WAIT
+signal nPCC0WP
+signal PCC0RDY
+signal PCC0BVD1
+signal PCC0BVD2
+signal nPCC0CD1
+signal nPCC0CD2
+signal nPCC0VS1
+signal nPCC0VS2
+signal nPCC0REG
+signal VCC0SEL1
+signal VCC0SEL0
+signal VCC0VPP1
+signal VCC0VPP0
+
+# PCMCIA 1 (see Table 4.6 in [1])
+signal PCC1A0
+signal PCC1A1
+signal PCC1A2
+signal PCC1A3
+signal PCC1A4
+signal PCC1A5
+signal PCC1A6
+signal PCC1A7
+signal PCC1A8
+signal PCC1A9
+signal PCC1A10
+signal PCC1A11
+signal PCC1A12
+signal PCC1A13
+signal PCC1A14
+signal PCC1A15
+signal PCC1A16
+signal PCC1A17
+signal PCC1A18
+signal PCC1A19
+signal PCC1A20
+signal PCC1A21
+signal PCC1A22
+signal PCC1A23
+signal PCC1A24
+signal PCC1A25
+signal PCC1D0
+signal PCC1D1
+signal PCC1D2
+signal PCC1D3
+signal PCC1D4
+signal PCC1D5
+signal PCC1D6
+signal PCC1D7
+signal PCC1D8
+signal PCC1D9
+signal PCC1D10
+signal PCC1D11
+signal PCC1D12
+signal PCC1D13
+signal PCC1D14
+signal PCC1D15
+signal nPCC1CE1A
+signal nPCC1CE2A
+signal nRDA
+signal nWEA
+signal nPCC1ICIORDA
+signal nPCC1ICIOWRA
+signal PCC1RESET
+signal nPCC1WAIT
+signal nPCC1WP
+signal PCC1RDY
+signal PCC1BVD1
+signal PCC1BVD2
+signal nPCC1CD1
+signal nPCC1CD2
+signal nPCC1VS1
+signal nPCC1VS2
+signal nPCC1REG
+signal VCC1SEL1
+signal VCC1SEL0
+signal VCC1VPP1
+signal VCC1VPP0
+
+# UART 0 (see Table 4.7 in [1])
+signal TXD0
+signal RXD0
+signal nRTS0
+signal nCTS0
+signal nDTR0
+signal nDSR0
+signal nDCD0
+signal nRI0
+
+# IrDA (see Table 4.8 in [1])
+signal MODSEL
+signal TXD
+signal nRX
+
+# Printer Interface (see Table 4.9 in [1])
+signal nSTB
+signal nAFD
+signal nERR
+signal nINIT
+signal nSLIN
+signal nACK
+signal BUSY
+signal PE
+signal SLCT
+signal PPD0
+signal PPD1
+signal PPD2
+signal PPD3
+signal PPD4
+signal PPD5
+signal PPD6
+signal PPD7
+
+# AFE Interface (see Table 4.10 in [1])
+signal DOUT
+signal DIN
+signal SCLK
+signal HC1
+signal FS
+signal nAFERST
+signal nAFEPDN
+signal MCLKO
+signal OFFHOOK
+signal RING
+
+# CODEC Interface (see Table 4.11 in [1])
+signal ACCLK
+signal nACRST
+signal nACPD
+signal SIBDIN
+signal SIBCLK
+signal SIBDOUT
+signal SIBSYNC
+
+# USB Interface (see Table 4.12 in [1])
+signal nUSBPEN
+signal nUSBOVR
+signal USBD1P
+signal USBD1M
+signal USBD2P
+signal USBD2M
+
+# Keyboard Interface (see Table 4.13 in [1])
+signal nKBCS
+signal nXIOW
+signal nXIOR
+signal KBIRQ0
+signal KBIRQ1
+
+# IO Port A (see Table 4.14 in [1])
+signal PA0
+signal PA1
+signal PA2
+signal PA3
+signal PA4
+signal PA5
+signal PA6
+signal PA7
+
+# IO Port B (see Table 4.15 in [1])
+signal PB0
+signal PB1
+signal PB2
+signal PB3
+signal PB4
+signal PB5
+signal PB6
+signal PB7
+
+# IO Port C (see Table 4.16 in [1])
+signal PC0
+signal PC1
+signal PC2
+signal PC3
+signal PC4
+signal PC5
+signal PC6
+signal PC7
+
+# IO Port D (see Table 4.17 in [1])
+signal PD0
+signal PD1
+signal PD2
+signal PD3
+signal PD4
+signal PD5
+signal PD6
+signal PD7
+
+# IO Port E (see Table 4.18 in [1])
+signal PE0
+signal PE1
+signal PE2
+signal PE3
+signal PE4
+signal PE5
+signal PE6
+signal PE7
+
+# 10-bit ADC Interface (see Table 4.19 in [1])
+signal TSMX
+signal TSMY
+signal TSPX
+signal TSPY
+
+# PS/2 Interface (see Table 4.20 in [1])
+signal KBCK
+signal KBDATA
+signal MSCK
+signal MSDATA
+
+# System Reset Interface (see Table 4.21 in [1])
+signal nRESETPI
+signal nRESETMI
+signal nRESETPO
+signal nRESETMO
+
+# Crystal Interface (see Table 4.22 in [1])
+signal AFECK
+signal AFECKE
+signal UCK
+signal UCKE
+
+# Miscellaneous Interface (see Table 4.23 in [1])
+signal PWM0
+signal PWM1
+signal P80LE
+
+# No Connected Pins (see Table 4.24 in [1])
+signal NC(1)
+signal NC(2)
+signal NC(3)
+signal NC(4)
+signal NC(5)
+signal NC(6)
+signal NC(7)
+signal NC(8)
+signal NC(9)
+signal NC(10)
+signal NC(11)
+signal NC(12)
+signal NC(13)
+signal NC(14)
+
+# Power/Ground (see Tabe 4.25 in [1])
+signal VSS
+signal VCC
+signal VCC5
+signal VCCA
+signal VCCB
+signal AVCC1
+signal AVSS1
+signal AVCC2
+signal AVSS2
+signal AVCC3
+signal AVSS3
+signal AVCC4
+signal AVSS4
+signal AVCC5
+signal AVCC6
+signal AVSS6
+
+# mandatory data registers
+register BSR 550
+register BR 1
+
+# instructions
+instruction length 3
+# mandatory instructions
+instruction BYPASS 111 BR
+instruction EXTEST 000 BSR
+instruction SAMPLE/PRELOAD 001 BSR
+
+# boundary scan register
+bit 549 I ? nBS
+bit 548 I ? RING
+bit 547 I ? FS
+bit 546 I ? SCLK
+bit 545 I ? DIN
+bit 544 O ? nAFERST
+bit 543 O ? nAFEPDN
+bit 542 O ? HC1 541 0 Z
+bit 541 C 0 .
+bit 540 O ? OFFHOOK 541 0 Z
+bit 539 O ? MCLKO 541 0 Z
+bit 538 O ? DOUT 541 0 Z
+bit 537 O ? PA0 535 0 Z
+bit 536 I ? PA0
+bit 535 C 0 .
+bit 534 O ? PA1 532 0 Z
+bit 533 I ? PA1
+bit 532 C 0 .
+bit 531 O ? PA2 529 0 Z
+bit 530 I ? PA2
+bit 529 C 0 .
+bit 528 O ? PA3 526 0 Z
+bit 527 I ? PA3
+bit 526 C 0 .
+bit 525 O ? PA4 523 0 Z
+bit 524 I ? PA4
+bit 523 C 0 .
+bit 522 O ? PA5 520 0 Z
+bit 521 I ? PA5
+bit 520 C 0 .
+bit 519 O ? PA6 517 0 Z
+bit 518 I ? PA6
+bit 517 C 0 .
+bit 516 O ? PA7 514 0 Z
+bit 515 I ? PA7
+bit 514 C 0 .
+bit 513 O ? nXIOW
+bit 512 O ? nXIOR
+bit 511 O ? nKBCS
+bit 510 I ? KBIRQ0
+bit 509 I ? KBIRQ1
+bit 508 O ? P80LE
+bit 507 I ? CKIO
+bit 506 I ? nRESETPI
+bit 505 I ? SH_MODE
+bit 504 I ? A12
+bit 503 I ? A11
+bit 502 I ? A10
+bit 501 I ? A9
+bit 500 I ? A8
+bit 499 I ? A7
+bit 498 I ? A6
+bit 497 I ? A5
+bit 496 I ? A4
+bit 495 I ? A3
+bit 494 I ? A2
+bit 493 I ? A1
+bit 492 I ? A0
+bit 491 O ? D31 489 0 Z
+bit 490 I ? D31
+bit 489 C 0 .
+bit 488 O ? D30 489 0 Z
+bit 487 I ? D30
+bit 486 O ? D29 489 0 Z
+bit 485 I ? D29
+bit 484 O ? D28 489 0 Z
+bit 483 I ? D28
+bit 482 O ? D27 489 0 Z
+bit 481 I ? D27
+bit 480 O ? D26 489 0 Z
+bit 479 I ? D26
+bit 478 O ? D25 489 0 Z
+bit 477 I ? D25
+bit 476 O ? D24 489 0 Z
+bit 475 I ? D24
+bit 474 O ? D15 472 0 Z
+bit 473 I ? D15
+bit 472 C 0 .
+bit 471 O ? D14 472 0 Z
+bit 470 I ? D14
+bit 469 O ? D13 472 0 Z
+bit 468 I ? D13
+bit 467 O ? D12 472 0 Z
+bit 466 I ? D12
+bit 465 O ? D11 472 0 Z
+bit 464 I ? D11
+bit 463 O ? D10 472 0 Z
+bit 462 I ? D10
+bit 461 O ? D9 472 0 Z
+bit 460 I ? D9
+bit 459 O ? D8 472 0 Z
+bit 458 I ? D8
+bit 457 O ? D23 455 0 Z
+bit 456 I ? D23
+bit 455 C 0 .
+bit 454 O ? D22 455 0 Z
+bit 453 I ? D22
+bit 452 O ? D21 455 0 Z
+bit 451 I ? D21
+bit 450 O ? D20 455 0 Z
+bit 449 I ? D20
+bit 448 O ? D19 455 0 Z
+bit 447 I ? D19
+bit 446 O ? D18 455 0 Z
+bit 445 I ? D18
+bit 444 O ? D17 455 0 Z
+bit 443 I ? D17
+bit 442 O ? D16 455 0 Z
+bit 441 I ? D16
+bit 440 O ? D7 438 0 Z
+bit 439 I ? D7
+bit 438 C 0 .
+bit 437 O ? D6 438 0 Z
+bit 436 I ? D6
+bit 435 O ? D5 438 0 Z
+bit 434 I ? D5
+bit 433 O ? D4 438 0 Z
+bit 432 I ? D4
+bit 431 O ? D3 438 0 Z
+bit 430 I ? D3
+bit 429 O ? D2 438 0 Z
+bit 428 I ? D2
+bit 427 O ? D1 438 0 Z
+bit 426 I ? D1
+bit 425 O ? D0 438 0 Z
+bit 424 I ? D0
+bit 423 O ? nIRQ0
+bit 422 O ? nRDY 421 0 Z
+bit 421 C 0 .
+bit 420 I ? DRAK1
+bit 419 O ? nDREQ1
+bit 418 I ? DRAK0
+bit 417 O ? nDREQ0
+bit 416 I ? A13
+bit 415 I ? A14
+bit 414 I ? A15
+bit 413 I ? A16
+bit 412 I ? A17
+bit 411 I ? A18
+bit 410 I ? A19
+bit 409 I ? A20
+bit 408 I ? A21
+bit 407 I ? A22
+bit 406 I ? A23
+bit 405 I ? A24
+bit 404 I ? A25
+bit 403 I ? nCS4
+bit 402 I ? nRDWR
+bit 401 I ? nRD
+bit 400 I ? nWE0
+bit 399 I ? nWE1
+bit 398 I ? nWE2
+bit 397 I ? nWE3
+bit 396 I ? nCE2A
+bit 395 I ? nCE1A
+bit 394 I ? nCE2B
+bit 393 I ? nCE1B
+bit 392 O ? nIOIS16 391 0 Z
+bit 391 C 0 .
+bit 390 O ? VCC0SEL1
+bit 389 O ? VCC0SEL0
+bit 388 O ? VCC0VPP1
+bit 387 O ? VCC0VPP0
+bit 386 I ? nPCC0CD2
+bit 385 I ? nPCC0CD1
+bit 384 I ? nPCC0VS2
+bit 383 I ? nPCC0VS1
+bit 382 I ? PCC0BVD2
+bit 381 I ? PCC0BVD1
+bit 380 I ? PCC0RDY
+bit 379 I ? nPCC0WP
+bit 378 I ? nPCC0WAIT
+bit 377 O ? PCC0D0 375 0 Z
+bit 376 I ? PCC0D0
+bit 375 C 0 .
+bit 374 O ? PCC0D8 372 0 Z
+bit 373 I ? PCC0D8
+bit 372 C 0 .
+bit 371 O ? PCC0D1 375 0 Z
+bit 370 I ? PCC0D1
+bit 369 O ? PCC0D9 372 0 Z
+bit 368 I ? PCC0D9
+bit 367 O ? PCC0D2 375 0 Z
+bit 366 I ? PCC0D2
+bit 365 O ? PCC0D10 372 0 Z
+bit 364 I ? PCC0D10
+bit 363 O ? PCC0D3 375 0 Z
+bit 362 I ? PCC0D3
+bit 361 O ? PCC0D11 372 0 Z
+bit 360 I ? PCC0D11
+bit 359 O ? PCC0A25 358 0 Z
+bit 358 C 0 .
+bit 357 O ? PCC0A24 358 0 Z
+bit 356 O ? PCC0A23 358 0 Z
+bit 355 O ? PCC0A22 358 0 Z
+bit 354 O ? PCC0A21 358 0 Z
+bit 353 O ? PCC0A20 358 0 Z
+bit 352 O ? PCC0A19 358 0 Z
+bit 351 O ? PCC0A18 358 0 Z
+bit 350 O ? PCC0A17 358 0 Z
+bit 349 O ? PCC0A16 358 0 Z
+bit 348 O ? PCC0A15 358 0 Z
+bit 347 O ? PCC0A14 358 0 Z
+bit 346 O ? PCC0A13 358 0 Z
+bit 345 O ? PCC0RESET 358 0 Z
+bit 344 O ? nPCC0ICIORDB 358 0 Z
+bit 343 O ? nPCC0ICIOWRB 358 0 Z
+bit 342 O ? nWEB 358 0 Z
+bit 341 O ? nRDB 358 0 Z
+bit 340 O ? nPCC0CE1B 358 0 Z
+bit 339 O ? nPCC0CE2B 358 0 Z
+bit 338 O ? nPCC0REG 358 0 Z
+bit 337 O ? PCC0A12 358 0 Z
+bit 336 O ? PCC0A11 358 0 Z
+bit 335 O ? PCC0A10 358 0 Z
+bit 334 O ? PCC0A9 358 0 Z
+bit 333 O ? PCC0A8 358 0 Z
+bit 332 O ? PCC0A7 358 0 Z
+bit 331 O ? PCC0A6 358 0 Z
+bit 330 O ? PCC0A5 358 0 Z
+bit 329 O ? PCC0A4 358 0 Z
+bit 328 O ? PCC0A3 358 0 Z
+bit 327 O ? PCC0A2 358 0 Z
+bit 326 O ? PCC0A1 358 0 Z
+bit 325 O ? PCC0A0 358 0 Z
+bit 324 O ? PCC0D12 372 0 Z
+bit 323 I ? PCC0D12
+bit 322 O ? PCC0D4 375 0 Z
+bit 321 I ? PCC0D4
+bit 320 O ? PCC0D13 372 0 Z
+bit 319 I ? PCC0D13
+bit 318 O ? PCC0D5 375 0 Z
+bit 317 I ? PCC0D5
+bit 316 O ? PCC0D14 372 0 Z
+bit 315 I ? PCC0D14
+bit 314 O ? PCC0D6 375 0 Z
+bit 313 I ? PCC0D6
+bit 312 O ? PCC0D15 372 0 Z
+bit 311 I ? PCC0D15
+bit 310 O ? PCC0D7 375 0 Z
+bit 309 I ? PCC0D7
+bit 308 O ? PCC1A15 307 0 Z
+bit 307 C 0 .
+bit 306 O ? PCC1A14 307 0 Z
+bit 305 O ? PCC1A13 307 0 Z
+bit 304 O ? PCC1A12 307 0 Z
+bit 303 O ? PCC1A11 307 0 Z
+bit 302 O ? PCC1A10 307 0 Z
+bit 301 O ? PCC1A9 307 0 Z
+bit 300 O ? PCC1A8 307 0 Z
+bit 299 O ? PCC1A7 307 0 Z
+bit 298 O ? PCC1A6 307 0 Z
+bit 297 O ? PCC1A5 307 0 Z
+bit 296 O ? PCC1A4 307 0 Z
+bit 295 O ? PCC1A3 307 0 Z
+bit 294 O ? PCC1A2 307 0 Z
+bit 293 O ? PCC1A1 307 0 Z
+bit 292 O ? PCC1A0 307 0 Z
+bit 291 O ? PCC1D7 289 0 Z
+bit 290 I ? PCC1D7
+bit 289 C 0 .
+bit 288 O ? PCC1D15 286 0 Z
+bit 287 I ? PCC1D15
+bit 286 C 0 .
+bit 285 O ? PCC1D6 289 0 Z
+bit 284 I ? PCC1D6
+bit 283 O ? PCC1D14 286 0 Z
+bit 282 I ? PCC1D14
+bit 281 O ? PCC1D5 289 0 Z
+bit 280 I ? PCC1D5
+bit 279 O ? PCC1D13 286 0 Z
+bit 278 I ? PCC1D13
+bit 277 O ? PCC1D4 289 0 Z
+bit 276 I ? PCC1D4
+bit 275 O ? PCC1D12 286 0 Z
+bit 274 I ? PCC1D12
+bit 273 O ? PCC1D3 289 0 Z
+bit 272 I ? PCC1D3
+bit 271 O ? PCC1D11 286 0 Z
+bit 270 I ? PCC1D11
+bit 269 O ? PCC1D2 289 0 Z
+bit 268 I ? PCC1D2
+bit 267 O ? PCC1D10 286 0 Z
+bit 266 I ? PCC1D10
+bit 265 O ? PCC1D1 289 0 Z
+bit 264 I ? PCC1D1
+bit 263 O ? PCC1D9 286 0 Z
+bit 262 I ? PCC1D9
+bit 261 O ? PCC1D0 289 0 Z
+bit 260 I ? PCC1D0
+bit 259 O ? PCC1D8 286 0 Z
+bit 258 I ? PCC1D8
+bit 257 O ? PCC1A16 307 0 Z
+bit 256 O ? PCC1A17 307 0 Z
+bit 255 O ? PCC1A18 307 0 Z
+bit 254 O ? PCC1A19 307 0 Z
+bit 253 O ? PCC1A20 307 0 Z
+bit 252 O ? PCC1A21 307 0 Z
+bit 251 O ? PCC1A22 307 0 Z
+bit 250 O ? PCC1A23 307 0 Z
+bit 249 O ? PCC1A24 307 0 Z
+bit 248 O ? PCC1A25 307 0 Z
+bit 247 O ? nPCC1REG 307 0 Z
+bit 246 O ? nPCC1CE2A 307 0 Z
+bit 245 O ? nPCC1CE1A 307 0 Z
+bit 244 O ? nRDA 307 0 Z
+bit 243 O ? nWEA 307 0 Z
+bit 242 O ? nPCC1ICIORDA 307 0 Z
+bit 241 O ? nPCC1ICIOWRA 307 0 Z
+bit 240 O ? PCC1RESET 307 0 Z
+bit 239 I ? nPCC1WAIT
+bit 238 I ? nPCC1WP
+bit 237 I ? PCC1RDY
+bit 236 I ? PCC1BVD1
+bit 235 I ? PCC1BVD2
+bit 234 I ? nPCC1VS1
+bit 233 I ? nPCC1VS2
+bit 232 I ? nPCC1CD1
+bit 231 I ? nPCC1CD2
+bit 230 O ? VCC1VPP0
+bit 229 O ? VCC1VPP1
+bit 228 O ? VCC1SEL0
+bit 227 O ? VCC1SEL1
+bit 226 O ? NC(14) 224 0 Z
+bit 225 I ? NC(14)
+bit 224 C 0 .
+bit 223 O ? NC(13) 221 0 Z
+bit 222 I ? NC(13)
+bit 221 C 0 .
+bit 220 O ? NC(12) 218 0 Z
+bit 219 I ? NC(12)
+bit 218 C 0 .
+bit 217 O ? NC(11) 215 0 Z
+bit 216 I ? NC(11)
+bit 215 C 0 .
+bit 214 O ? NC(10) 212 0 Z
+bit 213 I ? NC(10)
+bit 212 C 0 .
+bit 211 O ? NC(9) 209 0 Z
+bit 210 I ? NC(9)
+bit 209 C 0 .
+bit 208 O ? NC(8) 206 0 Z
+bit 207 I ? NC(8)
+bit 206 C 0 .
+bit 205 O ? NC(7) 203 0 Z
+bit 204 I ? NC(7)
+bit 203 C 0 .
+bit 202 O ? NC(6) 200 0 Z
+bit 201 I ? NC(6)
+bit 200 C 0 .
+bit 199 O ? NC(5) 197 0 Z
+bit 198 I ? NC(5)
+bit 197 C 0 .
+bit 196 O ? NC(4) 194 0 Z
+bit 195 I ? NC(4)
+bit 194 C 0 .
+bit 193 O ? NC(3) 191 0 Z
+bit 192 I ? NC(3)
+bit 191 C 0 .
+bit 190 O ? NC(2) 188 0 Z
+bit 189 I ? NC(2)
+bit 188 C 0 .
+bit 187 O ? NC(1) 185 0 Z
+bit 186 I ? NC(1)
+bit 185 C 0 .
+bit 184 O ? PWM0 182 0 Z
+bit 183 I ? PWM0
+bit 182 C 0 .
+bit 181 O ? nRESETMI 179 0 Z
+bit 180 I ? nRESETMI
+bit 179 C 0 .
+bit 178 O ? nRESETPO 176 0 Z
+bit 177 I ? nRESETPO
+bit 176 C 0 .
+bit 175 O ? nRESETMO 173 0 Z
+bit 174 I ? nRESETMO
+bit 173 C 0 .
+bit 172 O ? PWM1 170 0 Z
+bit 171 I ? PWM1
+bit 170 C 0 .
+bit 169 O ? KBCK 167 0 Z
+bit 168 I ? KBCK
+bit 167 C 0 .
+bit 166 O ? KBDATA 164 0 Z
+bit 165 I ? KBDATA
+bit 164 C 0 .
+bit 163 O ? MSCK 161 0 Z
+bit 162 I ? MSCK
+bit 161 C 0 .
+bit 160 O ? MSDATA 158 0 Z
+bit 159 I ? MSDATA
+bit 158 C 0 .
+bit 157 O ? PE7 155 0 Z
+bit 156 I ? PE7
+bit 155 C 0 .
+bit 154 O ? PE6 152 0 Z
+bit 153 I ? PE6
+bit 152 C 0 .
+bit 151 O ? PE5 149 0 Z
+bit 150 I ? PE5
+bit 149 C 0 .
+bit 148 O ? PE4 146 0 Z
+bit 147 I ? PE4
+bit 146 C 0 .
+bit 145 O ? PE3 143 0 Z
+bit 144 I ? PE3
+bit 143 C 0 .
+bit 142 O ? PE2 140 0 Z
+bit 141 I ? PE2
+bit 140 C 0 .
+bit 139 O ? PE1 137 0 Z
+bit 138 I ? PE1
+bit 137 C 0 .
+bit 136 O ? PE0 134 0 Z
+bit 135 I ? PE0
+bit 134 C 0 .
+bit 133 O ? PD7 131 0 Z
+bit 132 I ? PD7
+bit 131 C 0 .
+bit 130 O ? PD6 128 0 Z
+bit 129 I ? PD6
+bit 128 C 0 .
+bit 127 O ? PD5 125 0 Z
+bit 126 I ? PD5
+bit 125 C 0 .
+bit 124 O ? PD4 122 0 Z
+bit 123 I ? PD4
+bit 122 C 0 .
+bit 121 O ? PD3 119 0 Z
+bit 120 I ? PD3
+bit 119 C 0 .
+bit 118 O ? PD2 116 0 Z
+bit 117 I ? PD2
+bit 116 C 0 .
+bit 115 O ? PD1 113 0 Z
+bit 114 I ? PD1
+bit 113 C 0 .
+bit 112 O ? PD0 110 0 Z
+bit 111 I ? PD0
+bit 110 C 0 .
+bit 109 O ? PC7 107 0 Z
+bit 108 I ? PC7
+bit 107 C 0 .
+bit 106 O ? PC6 104 0 Z
+bit 105 I ? PC6
+bit 104 C 0 .
+bit 103 O ? PC5 101 0 Z
+bit 102 I ? PC5
+bit 101 C 0 .
+bit 100 O ? PC4 98 0 Z
+bit 99 I ? PC4
+bit 98 C 0 .
+bit 97 I ? RXD0
+bit 96 I ? nCTS0
+bit 95 I ? nDSR0
+bit 94 I ? nDCD0
+bit 93 I ? nRI0
+bit 92 O ? TXD0
+bit 91 O ? nRTS0
+bit 90 O ? nDTR0
+bit 89 O ? PC3 87 0 Z
+bit 88 I ? PC3
+bit 87 C 0 .
+bit 86 O ? PC2 84 0 Z
+bit 85 I ? PC2
+bit 84 C 0 .
+bit 83 O ? PC1 81 0 Z
+bit 82 I ? PC1
+bit 81 C 0 .
+bit 80 O ? PC0 78 0 Z
+bit 79 I ? PC0
+bit 78 C 0 .
+bit 77 O ? nUSBPEN 75 0 Z
+bit 76 I ? nUSBPEN
+bit 75 C 0 .
+bit 74 I ? nUSBOVR
+bit 73 O ? MODSEL 71 0 Z
+bit 72 I ? MODSEL
+bit 71 C 0 .
+bit 70 O ? TXD
+bit 69 O ? nRX 67 0 Z
+bit 68 I ? nRX
+bit 67 C 0 .
+bit 66 O ? PPD0 64 0 Z
+bit 65 I ? PPD0
+bit 64 C 0 .
+bit 63 O ? PPD1 64 0 Z
+bit 62 I ? PPD1
+bit 61 O ? PPD2 64 0 Z
+bit 60 I ? PPD2
+bit 59 O ? PPD3 64 0 Z
+bit 58 I ? PPD3
+bit 57 O ? nINIT 56 0 Z
+bit 56 C 0 .
+bit 55 I ? nERR
+bit 54 O ? nAFD 56 0 Z
+bit 53 O ? nSTB 56 0 Z
+bit 52 I ? SLCT
+bit 51 I ? PE
+bit 50 I ? BUSY
+bit 49 I ? nACK
+bit 48 O ? nSLIN 56 0 Z
+bit 47 O ? PPD4 64 0 Z
+bit 46 I ? PPD4
+bit 45 O ? PPD5 64 0 Z
+bit 44 I ? PPD5
+bit 43 O ? PPD6 64 0 Z
+bit 42 I ? PPD6
+bit 41 O ? PPD7 64 0 Z
+bit 40 I ? PPD7
+bit 39 O ? PB0 37 0 Z
+bit 38 I ? PB0
+bit 37 C 0 .
+bit 36 O ? PB1 34 0 Z
+bit 35 I ? PB1
+bit 34 C 0 .
+bit 33 O ? PB2 31 0 Z
+bit 32 I ? PB2
+bit 31 C 0 .
+bit 30 O ? PB3 28 0 Z
+bit 29 I ? PB3
+bit 28 C 0 .
+bit 27 O ? PB4 25 0 Z
+bit 26 I ? PB4
+bit 25 C 0 .
+bit 24 O ? PB5 22 0 Z
+bit 23 I ? PB5
+bit 22 C 0 .
+bit 21 O ? PB6 19 0 Z
+bit 20 I ? PB6
+bit 19 C 0 .
+bit 18 O ? PB7 16 0 Z
+bit 17 I ? PB7
+bit 16 C 0 .
+bit 15 O ? nACPD 13 0 Z
+bit 14 I ? nACPD
+bit 13 C 0 .
+bit 12 O ? ACCLK 11 0 Z
+bit 11 C 0 .
+bit 10 I ? SIBDIN
+bit 9 O ? SIBCLK 7 0 Z
+bit 8 I ? SIBCLK
+bit 7 C 0 .
+bit 6 O ? SIBDOUT 5 0 Z
+bit 5 C 0 .
+bit 4 O ? SIBSYNC 2 0 Z
+bit 3 I ? SIBSYNC
+bit 2 C 0 .
+bit 1 O ? nACRST 0 0 Z
+bit 0 C 0 .
--- /dev/null
+#
+# $Id$
+#
+# Copyright (C) 2003 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Matan Ziv-Av <matan@svgalib.org>, 2003.
+#
+
+# bits 31-28 of the Device Identification Register
+0000 sh7727 V0
--- /dev/null
+#
+# $Id$
+#
+# JTAG declarations for SH7727
+# Copyright (C) 2003 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Matan Ziv-Av <matan@svgalib.org>, 2003.
+#
+# Documentation:
+# [1] Hitachi, Ltd., "Hitachi SuperH RISC Engine SH7727 Hardware Manual",
+# 2003-01-31, ADE-602-209C Rev. 4.0
+#
+
+signal VCC1
+signal XTAL2
+signal EXTAL2
+signal VSS1
+signal MD1
+signal MD2
+signal NMI
+signal IRQ0
+signal IRQ1
+signal IRQ2
+signal IRQ3
+signal IRQ4
+signal VEPWC
+signal VCPWC
+signal MD5
+signal BREQ
+signal BACK
+signal VSS2
+signal CKIO2
+signal VCC2
+signal D31
+signal D30
+signal D29
+signal D28
+signal D27
+signal D26
+signal D25
+signal D24
+signal VSS3
+signal D23
+signal VCC3
+signal D22
+signal D21
+signal D20
+signal VSS4
+signal D19
+signal VCC4
+signal D18
+signal D17
+signal D16
+signal D15
+signal VSS5
+signal D14
+signal VCC5
+signal D13
+signal D12
+signal D11
+signal D10
+signal D9
+signal D8
+signal D7
+signal D6
+signal VSS6
+signal D5
+signal VCC6
+signal D4
+signal D3
+signal D2
+signal D1
+signal D0
+signal A0
+signal A1
+signal A2
+signal VSS7
+signal A3
+signal VCC7
+signal A4
+signal A5
+signal A6
+signal A7
+signal A8
+signal A9
+signal A10
+signal A11
+signal VSS8
+signal A12
+signal VCC8
+signal A13
+signal A14
+signal A15
+signal A16
+signal A17
+signal A18
+signal A19
+signal A20
+signal VSS9
+signal A21
+signal VCC9
+signal A22
+signal A23
+signal VSS10
+signal A24
+signal VCC10
+signal A25
+signal BS
+signal RD
+signal WE0
+signal WE1
+signal WE2
+signal VSS11
+signal WE3
+signal VCC11
+signal RDWR
+signal PTE7
+signal CS0
+signal CS2
+signal CS3
+signal CS4
+signal CS5
+signal CS6
+signal CE2A
+signal CE2B
+signal AFE_HC1
+signal AFE_RLYCNT
+signal VSS12
+signal AFE_SCLK
+signal VCC12
+signal AFE_FS
+signal AFE_RXIN
+signal AFE_TXOUT
+signal AFE_RDET
+signal USB1D_SUSPEND
+signal USB1_OVR_CRNT
+signal USB2_OVR_CRNT
+signal RTS2
+signal USB1_PWR_EN
+signal USB2_PWR_EN
+signal CKE
+signal RAS
+signal PTJ1
+signal CAS
+signal VSS13
+signal PTJ3
+signal VCC13
+signal PTJ4
+signal PTJ5
+signal VSS14
+signal CL1
+signal VCC14
+signal DON
+signal M_DISP
+signal FLM
+signal TDO
+signal DRAK0
+signal DACK0
+signal WAPIN
+signal RESETM
+signal ADTRG
+signal IOIS16
+signal ASEMDO
+signal PTG5
+signal PTG4
+signal PTG3
+signal PTG2
+signal VSS15
+signal PTG1
+signal VCC15
+signal PTG0
+signal VSS16
+signal TRST
+signal VCC16
+signal TMS
+signal TDI
+signal TCK
+signal PTF3
+signal PTF2
+signal PTF1
+signal PTF0
+signal MD0
+signal VCC17
+signal CAP1
+signal VSS17
+signal VSS18
+signal CAP2
+signal VCC18
+signal PTH6
+signal VSS19
+signal VCC19
+signal XTAL
+signal EXTAL
+signal LCD15
+signal LCD14
+signal LCD13
+signal LCD12
+signal STATUS0
+signal STATUS1
+signal CL2
+signal VSS20
+signal CKIO
+signal VCC20
+signal TXD0
+signal SCK0
+signal TXD_SIO
+signal SIOMCLK
+signal TXD2
+signal SCK_SIO
+signal SIOFSYNC
+signal RXD0
+signal RXD_SIO
+signal VSS21
+signal RXD2
+signal VCC21
+signal CTS2
+signal LCD11
+signal LCD10
+signal LCD9
+signal VSS22
+signal LCD8
+signal VCC22
+signal LCD7
+signal LCD6
+signal LCD5
+signal LCD4
+signal LCD3
+signal LCD2
+signal LCD1
+signal LCD0
+signal DREQ0
+signal LCK
+signal RESETP
+signal CA
+signal MD3
+signal MD4
+signal VCC23
+signal AVCC1
+signal USB1_P
+signal USB1_M
+signal AVSS1
+signal USB2_P
+signal USB2_M
+signal AVCC2
+signal AVSS2
+signal AN2
+signal AN3
+signal AN4
+signal AN5
+signal AVCC3
+signal AN6
+signal AN7
+
+register BSR 392
+register BR 1
+register DIR 32
+
+instruction length 16
+
+instruction EXTEST 0000111111111111 BSR
+instruction SAMPLE/PRELOAD 0100111111111111 BSR
+instruction IDCODE 1110111111111111 DIR
+instruction BYPASS 1111111111111111 BR
+
+bit 391 I 1 D31
+bit 390 I 1 D30
+bit 389 I 1 D29
+bit 388 I 1 D28
+bit 387 I 1 D27
+bit 386 I 1 D26
+bit 385 I 1 D25
+bit 384 I 1 D24
+bit 383 I 1 D23
+bit 382 I 1 D22
+bit 381 I 1 D21
+bit 380 I 1 D20
+bit 379 I 1 D19
+bit 378 I 1 D18
+bit 377 I 1 D17
+bit 376 I 1 D16
+bit 375 I 1 D15
+bit 374 I 1 D14
+bit 373 I 1 D13
+bit 372 I 1 D12
+bit 371 I 1 D11
+bit 370 I 1 D10
+bit 369 I 1 D9
+bit 368 I 1 D8
+bit 367 I 1 D7
+bit 366 I 1 D6
+bit 365 I 1 D5
+bit 364 I 1 D4
+bit 363 I 1 D3
+bit 362 I 1 D2
+bit 361 I 1 D1
+bit 360 I 1 D0
+bit 359 I 1 MD1
+bit 358 I 1 MD2
+bit 357 I 1 NMI
+bit 356 I 1 IRQ0
+bit 355 I 1 IRQ1
+bit 354 I 1 IRQ2
+bit 353 I 1 IRQ3
+bit 352 I 1 IRQ4
+bit 351 I 1 MD5
+bit 350 I 1 BREQ
+bit 349 O 1 VEPWC 314 1 Z
+bit 348 O 1 VCPWC 313 1 Z
+bit 347 O 1 BACK 312 1 Z
+bit 346 O 1 D31 311 1 Z
+bit 345 O 1 D30 310 1 Z
+bit 344 O 1 D29 309 1 Z
+bit 343 O 1 D28 308 1 Z
+bit 342 O 1 D27 307 1 Z
+bit 341 O 1 D26 306 1 Z
+bit 340 O 1 D25 305 1 Z
+bit 339 O 1 D24 304 1 Z
+bit 338 O 1 D23 303 1 Z
+bit 337 O 1 D22 302 1 Z
+bit 336 O 1 D21 301 1 Z
+bit 335 O 1 D20 300 1 Z
+bit 334 O 1 D19 299 1 Z
+bit 333 O 1 D18 298 1 Z
+bit 332 O 1 D17 297 1 Z
+bit 331 O 1 D16 296 1 Z
+bit 330 O 1 D15 295 1 Z
+bit 329 O 1 D14 294 1 Z
+bit 328 O 1 D13 293 1 Z
+bit 327 O 1 D12 292 1 Z
+bit 326 O 1 D11 291 1 Z
+bit 325 O 1 D10 290 1 Z
+bit 324 O 1 D9 289 1 Z
+bit 323 O 1 D8 288 1 Z
+bit 322 O 1 D7 287 1 Z
+bit 321 O 1 D6 286 1 Z
+bit 320 O 1 D5 285 1 Z
+bit 319 O 1 D4 284 1 Z
+bit 318 O 1 D3 283 1 Z
+bit 317 O 1 D2 282 1 Z
+bit 316 O 1 D1 281 1 Z
+bit 315 O 1 D0 280 1 Z
+bit 314 C 1 *
+bit 313 C 1 *
+bit 312 C 1 *
+bit 311 C 1 *
+bit 310 C 1 *
+bit 309 C 1 *
+bit 308 C 1 *
+bit 307 C 1 *
+bit 306 C 1 *
+bit 305 C 1 *
+bit 304 C 1 *
+bit 303 C 1 *
+bit 302 C 1 *
+bit 301 C 1 *
+bit 300 C 1 *
+bit 299 C 1 *
+bit 298 C 1 *
+bit 297 C 1 *
+bit 296 C 1 *
+bit 295 C 1 *
+bit 294 C 1 *
+bit 293 C 1 *
+bit 292 C 1 *
+bit 291 C 1 *
+bit 290 C 1 *
+bit 289 C 1 *
+bit 288 C 1 *
+bit 287 C 1 *
+bit 286 C 1 *
+bit 285 C 1 *
+bit 284 C 1 *
+bit 283 C 1 *
+bit 282 C 1 *
+bit 281 C 1 *
+bit 280 C 1 *
+bit 279 I 1 BS
+bit 278 I 1 WE2
+bit 277 I 1 WE3
+bit 276 I 1 PTE7
+bit 275 I 1 CS4
+bit 274 I 1 CS5
+bit 273 I 1 CE2A
+bit 272 I 1 CE2B
+bit 271 I 1 AFE_HC1
+bit 270 I 1 AFE_RLYCNT
+bit 269 I 1 AFE_SCLK
+bit 268 I 1 AFE_FS
+bit 267 I 1 AFE_RXIN
+bit 266 I 1 AFE_TXOUT
+bit 265 O 1 A0 217 1 Z
+bit 264 O 1 A1 216 1 Z
+bit 263 O 1 A2 215 1 Z
+bit 262 O 1 A3 214 1 Z
+bit 261 O 1 A4 213 1 Z
+bit 260 O 1 A5 212 1 Z
+bit 259 O 1 A6 211 1 Z
+bit 258 O 1 A7 210 1 Z
+bit 257 O 1 A8 209 1 Z
+bit 256 O 1 A9 208 1 Z
+bit 255 O 1 A10 207 1 Z
+bit 254 O 1 A11 206 1 Z
+bit 253 O 1 A12 205 1 Z
+bit 252 O 1 A13 204 1 Z
+bit 251 O 1 A14 203 1 Z
+bit 250 O 1 A15 202 1 Z
+bit 249 O 1 A16 201 1 Z
+bit 248 O 1 A17 200 1 Z
+bit 247 O 1 A18 199 1 Z
+bit 246 O 1 A19 198 1 Z
+bit 245 O 1 A20 197 1 Z
+bit 244 O 1 A21 196 1 Z
+bit 243 O 1 A22 195 1 Z
+bit 242 O 1 A23 194 1 Z
+bit 241 O 1 A24 193 1 Z
+bit 240 O 1 A25 192 1 Z
+bit 239 O 1 BS 191 1 Z
+bit 238 O 1 RD 190 1 Z
+bit 237 O 1 WE0 189 1 Z
+bit 236 O 1 WE1 188 1 Z
+bit 235 O 1 WE2 187 1 Z
+bit 234 O 1 WE3 186 1 Z
+bit 233 O 1 RDWR 185 1 Z
+bit 232 O 1 PTE7 184 1 Z
+bit 231 O 1 CS0 183 1 Z
+bit 230 O 1 CS2 182 1 Z
+bit 229 O 1 CS3 181 1 Z
+bit 228 O 1 CS4 180 1 Z
+bit 227 O 1 CS5 179 1 Z
+bit 226 O 1 CS6 178 1 Z
+bit 225 O 1 CE2A 177 1 Z
+bit 224 O 1 CE2B 176 1 Z
+bit 223 O 1 AFE_HC1 175 1 Z
+bit 222 O 1 AFE_RLYCNT 174 1 Z
+bit 221 O 1 AFE_SCLK 173 1 Z
+bit 220 O 1 AFE_FS 172 1 Z
+bit 219 O 1 AFE_RXIN 171 1 Z
+bit 218 O 1 AFE_TXOUT 170 1 Z
+bit 217 C 1 *
+bit 216 C 1 *
+bit 215 C 1 *
+bit 214 C 1 *
+bit 213 C 1 *
+bit 212 C 1 *
+bit 211 C 1 *
+bit 210 C 1 *
+bit 209 C 1 *
+bit 208 C 1 *
+bit 207 C 1 *
+bit 206 C 1 *
+bit 205 C 1 *
+bit 204 C 1 *
+bit 203 C 1 *
+bit 202 C 1 *
+bit 201 C 1 *
+bit 200 C 1 *
+bit 199 C 1 *
+bit 198 C 1 *
+bit 197 C 1 *
+bit 196 C 1 *
+bit 195 C 1 *
+bit 194 C 1 *
+bit 193 C 1 *
+bit 192 C 1 *
+bit 191 C 1 *
+bit 190 C 1 *
+bit 189 C 1 *
+bit 188 C 1 *
+bit 187 C 1 *
+bit 186 C 1 *
+bit 185 C 1 *
+bit 184 C 1 *
+bit 183 C 1 *
+bit 182 C 1 *
+bit 181 C 1 *
+bit 180 C 1 *
+bit 179 C 1 *
+bit 178 C 1 *
+bit 177 C 1 *
+bit 176 C 1 *
+bit 175 C 1 *
+bit 174 C 1 *
+bit 173 C 1 *
+bit 172 C 1 *
+bit 171 C 1 *
+bit 170 C 1 *
+bit 169 I 1 AFE_RDET
+bit 168 I 1 USB1D_SUSPEND
+bit 167 I 1 USB1_OVR_CRNT
+bit 166 I 1 USB2_OVR_CRNT
+bit 165 I 1 RTS2
+bit 164 I 1 USB1_PWR_EN
+bit 163 I 1 USB2_PWR_EN
+bit 162 I 1 CKE
+bit 161 I 1 RAS
+bit 160 I 1 PTJ1
+bit 159 I 1 CAS
+bit 158 I 1 PTJ0
+bit 157 I 1 PTJ4
+bit 156 I 1 PTJ5
+bit 155 I 1 CL1
+bit 154 I 1 DON
+bit 153 I 1 M_DISP
+bit 152 I 1 FLM
+bit 151 I 1 WAPIN
+bit 150 I 1 PTH6
+bit 149 I 1 IOIS16
+bit 148 I 1 PTG5
+bit 147 I 1 PTG4
+bit 146 I 1 PTG3
+bit 145 I 1 PTG2
+bit 144 I 1 PTG1
+bit 143 I 1 PTG0
+bit 142 I 1 ADTRG
+bit 141 I 1 PTF3
+bit 140 I 1 PTF2
+bit 139 I 1 PTF1
+bit 138 I 1 PTF0
+bit 137 I 1 MD0
+bit 136 O 1 AFE_RDET 109 1 Z
+bit 135 O 1 USB1D_SUSPEND 108 1 Z
+bit 134 O 1 RTS2 107 1 Z
+bit 133 O 1 USB1_PWR_EN 106 1 Z
+bit 132 O 1 USB2_PWR_EN 105 1 Z
+bit 131 O 1 CKE 104 1 Z
+bit 130 O 1 RAS 103 1 Z
+bit 129 O 1 PTJ1 102 1 Z
+bit 128 O 1 CAS 101 1 Z
+bit 127 O 1 PTJ3 100 1 Z
+bit 126 O 1 PTJ4 99 1 Z
+bit 125 O 1 PTJ5 98 1 Z
+bit 124 O 1 CL1 97 1 Z
+bit 123 O 1 DON 96 1 Z
+bit 122 O 1 M_DISP 95 1 Z
+bit 121 O 1 FLM 94 1 Z
+bit 120 O 1 DRAK0 93 1 Z
+bit 119 O 1 DACK0 92 1 Z
+bit 118 O 1 PTG5 91 1 Z
+bit 117 O 1 PTG3 90 1 Z
+bit 116 O 1 PTG2 89 1 Z
+bit 115 O 1 PTG1 88 1 Z
+bit 114 O 1 PTG0 87 1 Z
+bit 113 O 1 PTF3 86 1 Z
+bit 112 O 1 PTF2 85 1 Z
+bit 111 O 1 PTF1 84 1 Z
+bit 110 O 1 PTF0 83 1 Z
+bit 109 C 1 *
+bit 108 C 1 *
+bit 107 C 1 *
+bit 106 C 1 *
+bit 105 C 1 *
+bit 104 C 1 *
+bit 103 C 1 *
+bit 102 C 1 *
+bit 101 C 1 *
+bit 100 C 1 *
+bit 99 C 1 *
+bit 98 C 1 *
+bit 97 C 1 *
+bit 96 C 1 *
+bit 95 C 1 *
+bit 94 C 1 *
+bit 93 C 1 *
+bit 92 C 1 *
+bit 91 C 1 *
+bit 90 C 1 *
+bit 89 C 1 *
+bit 88 C 1 *
+bit 87 C 1 *
+bit 86 C 1 *
+bit 85 C 1 *
+bit 84 C 1 *
+bit 83 C 1 *
+bit 82 I 1 LCD15
+bit 81 I 1 LCD14
+bit 80 I 1 LCD13
+bit 79 I 1 LCD12
+bit 78 I 1 STATUS0
+bit 77 I 1 STATUS1
+bit 76 I 1 CL2
+bit 75 I 1 SCK0
+bit 74 I 1 SIOMCLK
+bit 73 I 1 SCK_SIO
+bit 72 I 1 SIOFSYNC
+bit 71 I 1 RXD0
+bit 70 I 1 RXD2
+bit 69 I 1 LCD7
+bit 68 I 1 LCD6
+bit 67 I 1 LCD1
+bit 66 I 1 LCD0
+bit 65 I 1 DREQ0
+bit 64 I 1 LCK
+bit 63 I 1 RXD_SIO
+bit 62 I 1 CTS2
+bit 61 I 1 LCD11
+bit 60 I 1 LCD10
+bit 59 I 1 LCD9
+bit 58 I 1 LCD8
+bit 57 I 1 LCD5
+bit 56 I 1 LCD4
+bit 55 I 1 LCD3
+bit 54 I 1 LCD2
+bit 53 I 1 MD3
+bit 52 I 1 MD4
+bit 51 O 1 LCD15 25 1 Z
+bit 50 O 1 LCD14 24 1 Z
+bit 49 O 1 LCD13 23 1 Z
+bit 48 O 1 LCD12 22 1 Z
+bit 47 O 1 STATUS0 21 1 Z
+bit 46 O 1 STATUS1 20 1 Z
+bit 45 O 1 CL2 19 1 Z
+bit 44 O 1 TXD0 18 1 Z
+bit 43 O 1 SCK0 17 1 Z
+bit 42 O 1 TXD_SIO 16 1 Z
+bit 41 O 1 SIOMCLK 15 1 Z
+bit 40 O 1 TXD2 14 1 Z
+bit 39 O 1 SCK_SIO 13 1 Z
+bit 38 O 1 SIOFSYNC 12 1 Z
+bit 37 O 1 LCD11 11 1 Z
+bit 36 O 1 LCD10 10 1 Z
+bit 35 O 1 LCD9 9 1 Z
+bit 34 O 1 LCD8 8 1 Z
+bit 33 O 1 LCD7 7 1 Z
+bit 32 O 1 LCD6 6 1 Z
+bit 31 O 1 LCD5 5 1 Z
+bit 30 O 1 LCD4 4 1 Z
+bit 29 O 1 LCD3 3 1 Z
+bit 28 O 1 LCD2 2 1 Z
+bit 27 O 1 LCD1 1 1 Z
+bit 26 O 1 LCD0 0 1 Z
+bit 25 C 1 *
+bit 24 C 1 *
+bit 23 C 1 *
+bit 22 C 1 *
+bit 21 C 1 *
+bit 20 C 1 *
+bit 19 C 1 *
+bit 18 C 1 *
+bit 17 C 1 *
+bit 16 C 1 *
+bit 15 C 1 *
+bit 14 C 1 *
+bit 13 C 1 *
+bit 12 C 1 *
+bit 11 C 1 *
+bit 10 C 1 *
+bit 9 C 1 *
+bit 8 C 1 *
+bit 7 C 1 *
+bit 6 C 1 *
+bit 5 C 1 *
+bit 4 C 1 *
+bit 3 C 1 *
+bit 2 C 1 *
+bit 1 C 1 *
+bit 0 C 1 *
+
+initbus sh7727
--- /dev/null
+#
+# $Id$
+#
+# Copyright (C) 2003 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Matan Ziv-Av <matan@svgalib.org>, 2003.
+#
+
+# bits 31-28 of the Device Identification Register
+0000 sh7729 V0
--- /dev/null
+#
+# $Id: sh7729,v 1.0 2003/18/10 21:09:11
+#
+# JTAG declarations for SH7729
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Balazs Beregnyei <bereg@impulzus.sch.bme.hu>, 2003.
+#
+# Documentation:
+# [1] Hitachi, Ltd., "Hitachi SuperH RISC Engine SH7729 Hardware Manual"
+#
+
+signal MD1
+signal MD2
+signal VCC0
+signal XTAL2
+signal EXTAL2
+signal VSS0
+signal NMI
+signal IRQ0
+signal IRQ1
+signal IRQ2
+signal IRQ3
+signal IRQ4
+signal D31
+signal D30
+signal D29
+signal D28
+signal D27
+signal D26
+signal VSS1
+signal D25
+signal VCC1
+signal D24
+signal D23
+signal D22
+signal D21
+signal D20
+signal VSS2
+signal D19
+signal VCC2
+signal D18
+signal D17
+signal D16
+signal VSS3
+signal D15
+signal VCC3
+signal D14
+signal D13
+signal D12
+signal D11
+signal D10
+signal D9
+signal D8
+signal D7
+signal D6
+signal VSS4
+signal D5
+signal VCC4
+signal D4
+signal D3
+signal D2
+signal D1
+signal D0
+signal A0
+signal A1
+signal A2
+signal A3
+signal VSS5
+signal A4
+signal VCC5
+signal A5
+signal A6
+signal A7
+signal A8
+signal A9
+signal A10
+signal A11
+signal A12
+signal A13
+signal VSS6
+signal A14
+signal VCC6
+signal A15
+signal A16
+signal A17
+signal A18
+signal A19
+signal A20
+signal A21
+signal VSS7
+signal A22
+signal VCC7
+signal A23
+signal VSS8
+signal A24
+signal VCC8
+signal A25
+signal BS
+signal RD
+signal WE0
+signal WE1
+signal WE2
+signal WE3
+signal RDWR
+signal AUDSYNC
+signal VSS9
+signal CS0
+signal VCC9
+signal CS2
+signal CS3
+signal CS4
+signal CS5
+signal CS6
+signal CE2A
+signal CE2B
+signal CKE
+signal RAS3L
+signal PTJ1
+signal CASL
+signal VSS10
+signal CASU
+signal VCC10
+signal PTJ4
+signal PTJ5
+signal DACK0
+signal DACK1
+signal PTE6
+signal PTE3
+signal RAS3U
+signal PTE1
+signal TDO
+signal BACK
+signal BREQ
+signal WAIT
+signal RESETM
+signal ADTRG
+signal IOIS16
+signal ASEMD0
+signal ASEBRKAK
+signal CKIO2
+signal AUDATA3
+signal AUDATA2
+signal VSS11
+signal AUDATA1
+signal VCC11
+signal AUDATA0
+signal TRST
+signal TMS
+signal TDI
+signal TCK
+signal IRLS3
+signal IRLS2
+signal IRLS1
+signal IRLS0
+signal MD0
+signal VCC12
+signal CAP1
+signal VSS12
+signal VSS13
+signal CAP2
+signal VCC13
+signal AUDCK
+signal VSS14
+signal VSS15
+signal VCC15
+signal XTAL
+signal EXTAL
+signal STATUS0
+signal STATUS1
+signal TCLK
+signal IRQOUT
+signal VSS16
+signal CKIO
+signal VCC16
+signal TXD0
+signal SCK0
+signal TXD1
+signal SCK1
+signal TXD2
+signal SCK2
+signal RTS2
+signal RXD0
+signal RXD1
+signal VSS17
+signal RXD2
+signal VCC17
+signal CTS2
+signal MCS7
+signal MCS6
+signal MCS5
+signal MCS4
+signal VSS18
+signal WAKEUP
+signal VCC18
+signal RESETOUT
+signal MCS3
+signal MCS2
+signal MCS1
+signal MCS0
+signal DRAK0
+signal DRAK1
+signal DREQ0
+signal DREQ1
+signal RESETP
+signal CA
+signal MD3
+signal MD4
+signal MD5
+signal VSS19
+signal AN0
+signal AN1
+signal AN2
+signal AN3
+signal AN4
+signal AN5
+signal VCC19
+signal AN6
+signal AN7
+signal VSS20
+
+register BSR 339
+register BR 1
+register DIR 32
+
+instruction length 16
+
+instruction EXTEST 0000111111111111 BSR
+instruction SAMPLE/PRELOAD 0100111111111111 BSR
+instruction IDCODE 1110111111111111 DIR
+instruction BYPASS 1111111111111111 BR
+
+bit 338 I 1 D31
+bit 337 I 1 D30
+bit 336 I 1 D29
+bit 335 I 1 D28
+bit 334 I 1 D27
+bit 333 I 1 D26
+bit 332 I 1 D25
+bit 331 I 1 D24
+bit 330 I 1 D23
+bit 329 I 1 D22
+bit 328 I 1 D21
+bit 327 I 1 D20
+bit 326 I 1 D19
+bit 325 I 1 D18
+bit 324 I 1 D17
+bit 323 I 1 D16
+bit 322 I 1 D15
+bit 321 I 1 D14
+bit 320 I 1 D13
+bit 319 I 1 D12
+bit 318 I 1 D11
+bit 317 I 1 D10
+bit 316 I 1 D9
+bit 315 I 1 D8
+bit 314 I 1 D7
+bit 313 I 1 D6
+bit 312 I 1 D5
+bit 311 I 1 D4
+bit 310 I 1 D3
+bit 309 I 1 D2
+bit 308 I 1 D1
+bit 307 I 1 D0
+bit 306 I 1 MD1
+bit 305 I 1 MD2
+bit 304 I 1 NMI
+bit 303 I 1 IRQ0
+bit 302 I 1 IRQ1
+bit 301 I 1 IRQ2
+bit 300 I 1 IRQ3
+bit 299 I 1 IRQ4
+bit 298 O 1 D31 266 1 Z
+bit 297 O 1 D30 265 1 Z
+bit 296 O 1 D29 264 1 Z
+bit 295 O 1 D28 263 1 Z
+bit 294 O 1 D27 262 1 Z
+bit 293 O 1 D26 261 1 Z
+bit 292 O 1 D25 260 1 Z
+bit 291 O 1 D24 259 1 Z
+bit 290 O 1 D23 258 1 Z
+bit 289 O 1 D22 257 1 Z
+bit 288 O 1 D21 256 1 Z
+bit 287 O 1 D20 255 1 Z
+bit 286 O 1 D19 254 1 Z
+bit 285 O 1 D18 253 1 Z
+bit 284 O 1 D17 252 1 Z
+bit 283 O 1 D16 251 1 Z
+bit 282 O 1 D15 250 1 Z
+bit 281 O 1 D14 249 1 Z
+bit 280 O 1 D13 248 1 Z
+bit 279 O 1 D12 247 1 Z
+bit 278 O 1 D11 246 1 Z
+bit 277 O 1 D10 245 1 Z
+bit 276 O 1 D9 244 1 Z
+bit 275 O 1 D8 243 1 Z
+bit 274 O 1 D7 242 1 Z
+bit 273 O 1 D6 241 1 Z
+bit 272 O 1 D5 240 1 Z
+bit 271 O 1 D4 239 1 Z
+bit 270 O 1 D3 238 1 Z
+bit 269 O 1 D2 237 1 Z
+bit 268 O 1 D1 236 1 Z
+bit 267 O 1 D0 235 1 Z
+bit 266 C 1 *
+bit 265 C 1 *
+bit 264 C 1 *
+bit 263 C 1 *
+bit 262 C 1 *
+bit 261 C 1 *
+bit 260 C 1 *
+bit 259 C 1 *
+bit 258 C 1 *
+bit 257 C 1 *
+bit 256 C 1 *
+bit 255 C 1 *
+bit 254 C 1 *
+bit 253 C 1 *
+bit 252 C 1 *
+bit 251 C 1 *
+bit 250 C 1 *
+bit 249 C 1 *
+bit 248 C 1 *
+bit 247 C 1 *
+bit 246 C 1 *
+bit 245 C 1 *
+bit 244 C 1 *
+bit 243 C 1 *
+bit 242 C 1 *
+bit 241 C 1 *
+bit 240 C 1 *
+bit 239 C 1 *
+bit 238 C 1 *
+bit 237 C 1 *
+bit 236 C 1 *
+bit 235 C 1 *
+bit 234 I 1 BS
+bit 233 I 1 WE2
+bit 232 I 1 WE3
+bit 231 I 1 AUDSYNC
+bit 230 I 1 CS2
+bit 229 I 1 CS3
+bit 228 I 1 CS4
+bit 227 I 1 CS5
+bit 226 I 1 CE2A
+bit 225 I 1 CE2B
+bit 224 O 1 A0 182 1 Z
+bit 223 O 1 A1 181 1 Z
+bit 222 O 1 A2 180 1 Z
+bit 221 O 1 A3 179 1 Z
+bit 220 O 1 A4 178 1 Z
+bit 219 O 1 A5 177 1 Z
+bit 218 O 1 A6 176 1 Z
+bit 217 O 1 A7 175 1 Z
+bit 216 O 1 A8 174 1 Z
+bit 215 O 1 A9 173 1 Z
+bit 214 O 1 A10 172 1 Z
+bit 213 O 1 A11 171 1 Z
+bit 212 O 1 A12 170 1 Z
+bit 211 O 1 A13 169 1 Z
+bit 210 O 1 A14 168 1 Z
+bit 209 O 1 A15 167 1 Z
+bit 208 O 1 A16 166 1 Z
+bit 207 O 1 A17 165 1 Z
+bit 206 O 1 A18 164 1 Z
+bit 205 O 1 A19 163 1 Z
+bit 204 O 1 A20 162 1 Z
+bit 203 O 1 A21 161 1 Z
+bit 202 O 1 A22 160 1 Z
+bit 201 O 1 A23 159 1 Z
+bit 200 O 1 A24 158 1 Z
+bit 199 O 1 A25 157 1 Z
+bit 198 O 1 BS 156 1 Z
+bit 197 O 1 RD 155 1 Z
+bit 196 O 1 WE0 154 1 Z
+bit 195 O 1 WE1 153 1 Z
+bit 194 O 1 WE2 152 1 Z
+bit 193 O 1 WE3 151 1 Z
+bit 192 O 1 RDWR 150 1 Z
+bit 191 O 1 AUDSYNC 149 1 Z
+bit 190 O 1 CS0 148 1 Z
+bit 189 O 1 CS2 147 1 Z
+bit 188 O 1 CS3 146 1 Z
+bit 187 O 1 CS4 145 1 Z
+bit 186 O 1 CS5 144 1 Z
+bit 185 O 1 CS6 143 1 Z
+bit 184 O 1 CE2A 142 1 Z
+bit 183 O 1 CE2B 141 1 Z
+bit 182 C 1 *
+bit 181 C 1 *
+bit 180 C 1 *
+bit 179 C 1 *
+bit 178 C 1 *
+bit 177 C 1 *
+bit 176 C 1 *
+bit 175 C 1 *
+bit 174 C 1 *
+bit 173 C 1 *
+bit 172 C 1 *
+bit 171 C 1 *
+bit 170 C 1 *
+bit 169 C 1 *
+bit 168 C 1 *
+bit 167 C 1 *
+bit 166 C 1 *
+bit 165 C 1 *
+bit 164 C 1 *
+bit 163 C 1 *
+bit 162 C 1 *
+bit 161 C 1 *
+bit 160 C 1 *
+bit 159 C 1 *
+bit 158 C 1 *
+bit 157 C 1 *
+bit 156 C 1 *
+bit 155 C 1 *
+bit 154 C 1 *
+bit 153 C 1 *
+bit 152 C 1 *
+bit 151 C 1 *
+bit 150 C 1 *
+bit 149 C 1 *
+bit 148 C 1 *
+bit 147 C 1 *
+bit 146 C 1 *
+bit 145 C 1 *
+bit 144 C 1 *
+bit 143 C 1 *
+bit 142 C 1 *
+bit 141 C 1 *
+bit 140 I 1 CKE
+bit 139 I 1 RAS3L
+bit 138 I 1 RAS2L
+bit 137 I 1 CASLL
+bit 136 I 1 CASLH
+bit 135 I 1 CASHL
+bit 134 I 1 CASHH
+bit 133 I 1 DACK0
+bit 132 I 1 DACK1
+bit 131 I 1 CAS2L
+bit 130 I 1 CAS2H
+bit 129 I 1 RAS3U
+bit 128 I 1 RAS2U
+bit 127 I 1 BREQ
+bit 126 I 1 WAIT
+bit 125 I 1 AUDCK
+bit 124 I 1 IOIS16
+bit 123 I 1 ASEBRKAK
+bit 122 I 1 PTG4
+bit 121 I 1 AUDATA3
+bit 120 I 1 AUDATA2
+bit 119 I 1 AUDATA1
+bit 118 I 1 AUDATA0
+bit 117 I 1 ADTRG
+bit 116 I 1 IRLS3
+bit 115 I 1 IRLS2
+bit 114 I 1 IRLS1
+bit 113 I 1 IRLS0
+bit 112 I 1 MD0
+bit 111 O 1 CKE 92 1 Z
+bit 110 O 1 RAS3L 91 1 Z
+bit 109 O 1 RAS2L 90 1 Z
+bit 108 O 1 CASLL 89 1 Z
+bit 107 O 1 CASLH 88 1 Z
+bit 106 O 1 CASHL 87 1 Z
+bit 105 O 1 CASHH 86 1 Z
+bit 104 O 1 DACK0 85 1 Z
+bit 103 O 1 DACK1 84 1 Z
+bit 102 O 1 CAS2L 83 1 Z
+bit 101 O 1 CAS2H 82 1 Z
+bit 100 O 1 RAS3U 81 1 Z
+bit 99 O 1 RAS2U 80 1 Z
+bit 98 O 1 BACK 79 1 Z
+bit 97 O 1 ASEBRKAK 78 1 Z
+bit 96 O 1 AUDATA3 77 1 Z
+bit 95 O 1 AUDATA2 76 1 Z
+bit 94 O 1 AUDATA1 75 1 Z
+bit 93 O 1 AUDATA0 74 1 Z
+bit 92 C 1 *
+bit 91 C 1 *
+bit 90 C 1 *
+bit 89 C 1 *
+bit 88 C 1 *
+bit 87 C 1 *
+bit 86 C 1 *
+bit 85 C 1 *
+bit 84 C 1 *
+bit 83 C 1 *
+bit 82 C 1 *
+bit 81 C 1 *
+bit 80 C 1 *
+bit 79 C 1 *
+bit 78 C 1 *
+bit 77 C 1 *
+bit 76 C 1 *
+bit 75 C 1 *
+bit 74 C 1 *
+bit 73 I 1 STATUS0
+bit 72 I 1 STATUS1
+bit 71 I 1 TCLK
+bit 70 I 1 SCK0
+bit 69 I 1 SCK1
+bit 68 I 1 SCK2
+bit 67 I 1 RTS2
+bit 66 I 1 RXD0
+bit 65 I 1 RXD2
+bit 64 I 1 WAKEUP
+bit 63 I 1 RESETOUT
+bit 62 I 1 DRAK0
+bit 61 I 1 DRAK1
+bit 60 I 1 DREQ0
+bit 59 I 1 DREQ1
+bit 58 I 1 RXD1
+bit 57 I 1 CTS2
+bit 56 I 1 MCS7
+bit 55 I 1 MCS6
+bit 54 I 1 MCS5
+bit 53 I 1 MCS4
+bit 52 I 1 MCS3
+bit 51 I 1 MCS2
+bit 50 I 1 MCS1
+bit 49 I 1 MCS0
+bit 48 I 1 MD3
+bit 47 I 1 MD4
+bit 46 I 1 MD5
+bit 45 O 1 STATUS0 22 1 Z
+bit 44 O 1 STATUS1 21 1 Z
+bit 43 O 1 TCLK 20 1 Z
+bit 42 O 1 IRQOUT 19 1 Z
+bit 41 O 1 TXD0 18 1 Z
+bit 40 O 1 SCK0 17 1 Z
+bit 39 O 1 TXD1 16 1 Z
+bit 38 O 1 SCK1 15 1 Z
+bit 37 O 1 TXD2 14 1 Z
+bit 36 O 1 SCK2 13 1 Z
+bit 35 O 1 RTS2 12 1 Z
+bit 34 O 1 MCS7 11 1 Z
+bit 33 O 1 MCS6 10 1 Z
+bit 32 O 1 MCS5 9 1 Z
+bit 31 O 1 MCS4 8 1 Z
+bit 30 O 1 WAKEUP 7 1 Z
+bit 29 O 1 RESETOUT 6 1 Z
+bit 28 O 1 MCS3 5 1 Z
+bit 27 O 1 MCS2 4 1 Z
+bit 26 O 1 MCS1 3 1 Z
+bit 25 O 1 MCS0 2 1 Z
+bit 24 O 1 DRAK0 1 1 Z
+bit 23 O 1 DRAK1 0 1 Z
+bit 22 C 1 *
+bit 21 C 1 *
+bit 20 C 1 *
+bit 19 C 1 *
+bit 18 C 1 *
+bit 17 C 1 *
+bit 16 C 1 *
+bit 15 C 1 *
+bit 14 C 1 *
+bit 13 C 1 *
+bit 12 C 1 *
+bit 11 C 1 *
+bit 10 C 1 *
+bit 9 C 1 *
+bit 8 C 1 *
+bit 7 C 1 *
+bit 6 C 1 *
+bit 5 C 1 *
+bit 4 C 1 *
+bit 3 C 1 *
+bit 2 C 1 *
+bit 1 C 1 *
+bit 0 C 1 *
+
+initbus sh7727
--- /dev/null
+#
+# $Id$
+#
+# Copyright (C) 2002 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Marcel Telka <marcel@telka.sk>, 2002.
+#
+
+# bits 27-12 of the Device Identification Register
+0010000001010100 ppc440gx IBM440GX
+0000001001100111 ppc405ep PowerPC 405EP
--- /dev/null
+0001 ppc405ep A
+0010 ppc405ep B
+0011 ppc405ep C
--- /dev/null
+signal TDI
+signal TMS
+signal TRST
+signal TCK
+signal TDO
+signal SysClk
+signal AVDD
+signal AGND
+signal SysReset
+signal TesetEn
+signal Halt
+signal SysErr
+signal MemData0
+signal MemData1
+signal MemData2
+signal MemData3
+signal MemData4
+signal MemData5
+signal MemData6
+signal MemData7
+signal MemData8
+signal MemData9
+signal MemData10
+signal MemData11
+signal MemData12
+signal MemData13
+signal MemData14
+signal MemData15
+signal MemData16
+signal MemData17
+signal MemData18
+signal MemData19
+signal MemData20
+signal MemData21
+signal MemData22
+signal MemData23
+signal MemData24
+signal MemData25
+signal MemData26
+signal MemData27
+signal MemData28
+signal MemData29
+signal MemData30
+signal MemData31
+signal MemAddr0
+signal MemAddr1
+signal MemAddr2
+signal MemAddr3
+signal MemAddr4
+signal MemAddr5
+signal MemAddr6
+signal MemAddr7
+signal MemAddr8
+signal MemAddr9
+signal MemAddr10
+signal MemAddr11
+signal MemAddr12
+signal BA0
+signal BA1
+signal RAS
+signal CAS
+signal DQM0
+signal DQM1
+signal DQM2
+signal DQM3
+signal BankSel0
+signal BankSel1
+signal WE
+signal ClkEn0
+signal ClkEn1
+signal MemClkOut0
+signal MemClkOut1
+signal PerData0
+signal PerData1
+signal PerData2
+signal PerData3
+signal PerData4
+signal PerData5
+signal PerData6
+signal PerData7
+signal PerData8
+signal PerData9
+signal PerData10
+signal PerData11
+signal PerData12
+signal PerData13
+signal PerData14
+signal PerData15
+signal PerAddr6
+signal PerAddr7
+signal PerAddr8
+signal PerAddr9
+signal PerAddr10
+signal PerAddr11
+signal PerAddr12
+signal PerAddr13
+signal PerAddr14
+signal PerAddr15
+signal PerAddr16
+signal PerAddr17
+signal PerAddr18
+signal PerAddr19
+signal PerAddr20
+signal PerAddr21
+signal PerAddr22
+signal PerAddr23
+signal PerAddr24
+signal PerAddr25
+signal PerAddr26
+signal PerAddr27
+signal PerAddr28
+signal PerAddr29
+signal PerAddr30
+signal PerAddr31
+signal PerWBE0
+signal PerWBE1
+signal PerCS0
+signal PerOE
+signal PerRnW
+signal PerReady
+signal PerClk
+signal ExtReset
+signal PCIAD0
+signal PCIAD1
+signal PCIAD2
+signal PCIAD3
+signal PCIAD4
+signal PCIAD5
+signal PCIAD6
+signal PCIAD7
+signal PCIAD8
+signal PCIAD9
+signal PCIAD10
+signal PCIAD11
+signal PCIAD12
+signal PCIAD13
+signal PCIAD14
+signal PCIAD15
+signal PCIAD16
+signal PCIAD17
+signal PCIAD18
+signal PCIAD19
+signal PCIAD20
+signal PCIAD21
+signal PCIAD22
+signal PCIAD23
+signal PCIAD24
+signal PCIAD25
+signal PCIAD26
+signal PCIAD27
+signal PCIAD28
+signal PCIAD29
+signal PCIAD30
+signal PCIAD31
+signal PCIC0_BE0
+signal PCIC0_BE1
+signal PCIC0_BE2
+signal PCIC0_BE3
+signal PCIParity
+signal PCIFrame
+signal PCIIRDY
+signal PCITRDY
+signal PCIStop
+signal PCIDevSel
+signal PCIIDSel
+signal PCISErr
+signal PCIPErr
+signal PCIClk
+signal PCIReset
+signal PCIINT_PerWE
+signal PCIReq0_Gnt
+signal PCIReq1
+signal PCIReq2
+signal PCIGnt0_Req
+signal PCIGnt1
+signal PCIGnt2
+signal UART0_Rx
+signal UART0_Tx
+signal UART0_CTS
+signal UART0_RTS
+signal IICSCL
+signal IICSDA
+signal PerBlast_GPIO0
+signal GPIO1_TS1E
+signal GPIO2_TS2E
+signal GPIO3_TS1O
+signal GPIO4_TS2O
+signal GPIO5_TS3
+signal GPIO6_TS4
+signal GPIO7_TS5
+signal GPIO8_TS6
+signal GPIO9_TrcClk
+signal PerCS1_GPIO10
+signal PerCS2_GPIO11
+signal PerCS3_GPIO12
+signal PerCS4_GPIO13
+signal PerAddr3_GPIO14
+signal PerAddr4_GPIO15
+signal PerAddr5_GPIO16
+signal IRQ0_GPIO17
+signal IRQ1_GPIO18
+signal IRQ2_GPIO19
+signal IRQ3_GPIO20
+signal IRQ4_GPIO21
+signal IRQ5_GPIO22
+signal IRQ6_GPIO23
+signal UART0_DCD_GPIO24UART0_DSR_GPIO25UART0_RI_GPIO26
+signal UART0_DSR_GPIO25UART0_RI_GPIO26
+signal UART0_RI_GPIO26
+signal UART0_DTR_GPIO27UART1_Rx_GPIO28
+signal UART1_Rx_GPIO28
+signal UART1_Tx_GPIO29
+signal RejectPkt0_GPIO3RejectPkt1_GPIO3PHY0Rx0D0
+signal RejectPkt1_GPIO3PHY0Rx0D0
+signal PHY0Rx0D0
+signal PHY0Rx0D1
+signal PHY0Rx0D2
+signal PHY0Rx0D3
+signal EMC0Tx0D0
+signal EMC0Tx0D1
+signal EMC0Tx0D2
+signal EMC0Tx0D3
+signal PHY0RxErr
+signal PHY0Rx0Clk
+signal PHY0Rx0DV
+signal PHY0CrS0
+signal EMC0Tx0Err
+signal EMC0Tx0En
+signal PHY0Tx0Clk
+signal PHY0Col0
+signal EMCMDIO
+signal EMCMDClk
+signal PHY0Rx1D0
+signal PHY0Rx1D1
+signal PHY0Rx1D2
+signal PHY0Rx1D3
+signal EMC0Tx1D0
+signal EMC0Tx1D1
+signal EMC0Tx1D2
+signal EMC0Tx1D3
+signal PHY0Rx1Err
+signal PHY0Rx1Clk
+signal PHY0Rx1DV
+signal PHY0Col1
+signal EMC0Tx1Err
+signal EMC0Tx1En
+signal PHY0Tx1Clk
+signal PHY0CrS1
+signal GND1
+signal GND2
+signal GND3
+signal GND4
+signal GND5
+signal GND6
+signal GND7
+signal GND8
+signal GND9
+signal GND10
+signal GND11
+signal GND12
+signal GND13
+signal GND14
+signal GND15
+signal GND16
+signal GND17
+signal GND18
+signal GND19
+signal GND20
+signal GND21
+signal GND22
+signal GND23
+signal GND24
+signal GND25
+signal GND26
+signal GND27
+signal GND28
+signal GND29
+signal GND30
+signal GND31
+signal GND32
+signal GND33
+signal GND34
+signal GND35
+signal GND36
+signal GND37
+signal GND38
+signal GND39
+signal GND40
+signal GND41
+signal GND42
+signal GND43
+signal GND44
+signal GND45
+signal GND46
+signal GND47
+signal GND48
+signal GND49
+signal GND50
+signal GND51
+signal GND52
+signal GND53
+signal GND54
+signal GND55
+signal GND56
+signal GND57
+signal GND58
+signal GND59
+signal GND60
+signal GND61
+signal GND62
+signal GND63
+signal GND64
+signal GND65
+signal GND66
+signal GND67
+signal GND68
+signal GND69
+signal GND70
+signal GND71
+signal GND72
+signal GND73
+signal GND74
+signal GND75
+signal GND76
+signal GND77
+signal GND78
+signal VDD1
+signal VDD2
+signal VDD3
+signal VDD4
+signal VDD5
+signal VDD6
+signal VDD7
+signal VDD8
+signal VDD9
+signal VDD10
+signal VDD11
+signal VDD12
+signal VDD13
+signal VDD14
+signal VDD15
+signal VDD16
+signal VDD17
+signal VDD18
+signal VDD19
+signal VDD20
+signal VDD21
+signal VDD22
+signal VDD23
+signal VDD24
+signal VDD25
+signal VDD26
+signal VDD27
+signal VDD28
+signal VDD29
+signal VDD30
+signal VDD31
+signal VDD32
+signal VDD33
+signal VDD34
+signal VDD35
+signal VDD36
+signal VDD37
+signal VDD38
+signal VDD39
+signal VDD40
+signal OVDD1
+signal OVDD2
+signal OVDD3
+signal OVDD4
+signal OVDD5
+signal OVDD6
+signal OVDD7
+signal OVDD8
+signal OVDD9
+signal OVDD10
+signal OVDD11
+signal OVDD12
+signal OVDD13
+signal OVDD14
+signal OVDD15
+signal OVDD16
+signal OVDD17
+signal OVDD18
+
+register BSR 300
+register BR 1
+register DIR 32
+
+instruction length 7
+
+instruction EXTEST 0000000 BSR
+instruction SAMPLE/PRELOAD 1111010 BSR
+instruction IDCODE 1111011 DIR
+instruction BYPASS 1111100 BR
+
+bit 299 B 1 MemData20 290 0 Z
+bit 298 B 1 MemData18 290 0 Z
+bit 297 B 1 MemData19 290 0 Z
+bit 296 C 0 *
+bit 295 B 1 IICSCL 296 0 Z
+bit 294 B 1 MemData17 290 0 Z
+bit 293 C 0 *
+bit 292 B 1 EMCMDIO 293 0 Z
+bit 291 O 1 EMCMDClk
+bit 290 C 0 *
+bit 289 B 1 MemData16 290 0 Z
+bit 288 B 1 MemData15 278 0 Z
+bit 287 B 1 MemData14 278 0 Z
+bit 286 B 1 MemData13 278 0 Z
+bit 285 B 1 MemData12 278 0 Z
+bit 284 I 1 PHY0Tx0Clk
+bit 283 O 1 DQM1
+bit 282 B 1 MemData11 278 0 Z
+bit 281 B 1 MemData10 278 0 Z
+bit 280 I 1 PHY0Col0
+bit 279 B 1 MemData9 278 0 Z
+bit 278 C 0 *
+bit 277 B 1 MemData8 278 0 Z
+bit 276 I 1 PHY0CrS0
+bit 275 B 1 MemData7 264 0 Z
+bit 274 I 1 PHY0Rx0DV
+bit 273 B 1 MemData6 264 0 Z
+bit 272 B 1 MemData5 264 0 Z
+bit 271 I 1 PHY0Rx0Clk
+bit 270 B 1 MemData4 264 0 Z
+bit 269 O 1 DQM0
+bit 268 B 1 MemData3 264 0 Z
+bit 267 I 1 PHY0RxErr
+bit 266 B 1 MemData2 264 0 Z
+bit 265 B 1 MemData1 264 0 Z
+bit 264 C 0 *
+bit 263 B 1 MemData0 264 0 Z
+bit 262 O 1 BankSel1
+bit 261 O 1 BankSel0
+bit 260 I 1 PHY0Rx0D3
+bit 259 O 1 ClkEn1
+bit 258 O 1 MemClkOut1
+bit 257 O 1 ClkEn0
+bit 256 O 1 MemClkOut0
+bit 255 O 1 WE
+bit 254 O 1 CAS
+bit 253 O 1 MemAddr0
+bit 252 O 1 RAS
+bit 251 O 1 BA1
+bit 250 O 1 BA0
+bit 249 O 1 MemAddr1
+bit 248 I 1 PHY0Rx0D2
+bit 247 O 1 MemAddr2
+bit 246 O 1 MemAddr3
+bit 245 I 1 PHY0Rx0D0
+bit 244 O 1 MemAddr4
+bit 243 O 1 SysClk
+bit 242 B 1 SysErr 229 0 Z
+bit 241 O 1 MemAddr5
+bit 240 O 1 MemAddr6
+bit 239 O 1 MemAddr7
+bit 238 O 1 MemAddr8
+bit 237 O 1 MemAddr9
+bit 236 C 0 *
+bit 235 B 1 SysReset 236 0 Z
+bit 234 O 1 MemAddr11
+bit 233 O 1 MemAddr10
+bit 232 O 1 MemAddr12
+bit 231 C 0 *
+bit 230 B 1 GPIO1_TS1E 231 0 Z
+bit 229 C 0 *
+bit 228 I 1 PHY0Rx0D1
+bit 227 C 0 *
+bit 226 B 1 RejectPkt0_GPIO30 227 0 Z
+bit 225 C 0 *
+bit 224 B 1 RejectPkt1_GPIO31 225 0 Z
+bit 223 C 0 *
+bit 222 B 1 GPIO2_TS2E 223 0 Z
+bit 221 C 0 *
+bit 220 B 1 GPIO3_TS1O 221 0 Z
+bit 219 C 0 *
+bit 218 B 1 GPIO4_TS2O 219 0 Z
+bit 217 C 0 *
+bit 216 B 1 IRQ0_GPIO17 217 0 Z
+bit 215 C 0 *
+bit 214 B 1 IRQ1_GPIO18 215 0 Z
+bit 213 C 0 *
+bit 212 B 1 IRQ2_GPIO19 213 0 Z
+bit 211 C 0 *
+bit 210 B 1 GPIO5_TS3 211 0 Z
+bit 209 C 0 *
+bit 208 B 1 IRQ3_GPIO20 209 0 Z
+bit 207 C 0 *
+bit 206 B 1 GPIO6_TS4 207 0 Z
+bit 205 C 0 *
+bit 204 B 1 GPIO7_TS5 205 0 Z
+bit 203 C 0 *
+bit 202 B 1 GPIO8_TS6 203 0 Z
+bit 201 C 0 *
+bit 200 B 1 GPIO9_TrcClk 201 0 Z
+bit 199 C 0 *
+bit 198 B 1 IRQ4_GPIO21 199 0 Z
+bit 197 C 0 *
+bit 196 B 1 IRQ5_GPIO22 197 0 Z
+bit 195 C 0 *
+bit 194 B 1 IRQ6_GPIO23 195 0 Z
+bit 193 B 1 PCIAD31 190 0 Z
+bit 192 B 1 PCIAD30 190 0 Z
+bit 191 B 1 PCIAD29 190 0 Z
+bit 190 C 0 *
+bit 189 B 1 PCIAD28 190 0 Z
+bit 188 B 1 PCIAD27 184 0 Z
+bit 187 B 1 PCIC0_BE3 130 0 Z
+bit 186 B 1 PCIAD26 184 0 Z
+bit 185 B 1 PCIAD25 184 0 Z
+bit 184 C 0 *
+bit 183 B 1 PCIAD24 184 0 Z
+bit 182 B 1 PCIAD23 179 0 Z
+bit 181 B 1 PCIAD22 179 0 Z
+bit 180 B 1 PCIAD21 179 0 Z
+bit 179 C 0 *
+bit 178 B 1 PCIAD20 179 0 Z
+bit 177 B 1 PCIC0_BE2 130 0 Z
+bit 176 B 1 PCIAD19 173 0 Z
+bit 175 B 1 PCIAD18 173 0 Z
+bit 174 B 1 PCIAD17 173 0 Z
+bit 173 C 0 *
+bit 172 B 1 PCIAD16 173 0 Z
+bit 171 C 0 *
+bit 170 B 1 PCIParity 171 0 Z
+bit 169 C 0 *
+bit 168 B 1 PCIPErr 169 0 Z
+bit 167 C 0 *
+bit 166 B 1 PCISErr 167 0 Z
+bit 165 B 1 PCIDevSel 163 0 Z
+bit 164 B 1 PCIStop 163 0 Z
+bit 163 C 0 *
+bit 162 B 1 PCITRDY 163 0 Z
+bit 161 C 0 *
+bit 160 B 1 PCIIRDY 161 0 Z
+bit 159 C 0 *
+bit 158 B 1 PCIFrame 159 0 Z
+bit 157 O 1 PCIReset
+bit 156 O 1 PCIGnt2 152 0 Z
+bit 155 O 1 PCIGnt1 152 0 Z
+bit 154 I 1 PCIReq2
+bit 153 I 1 PCIReq1
+bit 152 C 0 *
+bit 151 O 1 PCIGnt0_Req 152 0 Z
+bit 150 B 1 PCIAD15 142 0 Z
+bit 149 B 1 PCIAD14 142 0 Z
+bit 148 I 1 PCIReq0_Gnt
+bit 147 I 1 Halt
+bit 146 B 1 PCIAD13 142 0 Z
+bit 145 I 1 PCIIDSel
+bit 144 I 1 PCIClk
+bit 143 B 1 PCIC0_BE1 130 0 Z
+bit 142 C 0 *
+bit 141 B 1 PCIAD12 142 0 Z
+bit 140 B 1 PCIAD11 137 0 Z
+bit 139 B 1 PCIAD10 137 0 Z
+bit 138 B 1 PCIAD9 137 0 Z
+bit 137 C 0 *
+bit 136 B 1 PCIAD8 137 0 Z
+bit 135 B 1 PCIAD7 132 0 Z
+bit 134 B 1 PCIAD6 132 0 Z
+bit 133 B 1 PCIAD5 132 0 Z
+bit 132 C 0 *
+bit 131 B 1 PCIAD4 132 0 Z
+bit 130 C 0 *
+bit 129 B 1 PCIC0_BE0 130 0 Z
+bit 128 B 1 PCIAD3 125 0 Z
+bit 127 B 1 PCIAD2 125 0 Z
+bit 126 B 1 PCIAD1 125 0 Z
+bit 125 C 0 *
+bit 124 B 1 PCIAD0 125 0 Z
+bit 123 C 0 *
+bit 122 O 1 PCIINT_PerWE 123 0 Z
+bit 121 O 1 EMC0Tx1En
+bit 120 O 1 EMC0Tx1Err
+bit 119 O 1 EMC0Tx1D0
+bit 118 O 1 EMC0Tx1D3
+bit 117 O 1 EMC0Tx1D2
+bit 116 O 1 EMC0Tx1D1
+bit 115 O 1 PerAddr31
+bit 114 O 1 PerAddr30
+bit 113 O 1 PerAddr29
+bit 112 O 1 PerAddr28
+bit 111 O 1 PerAddr27
+bit 110 O 1 PerAddr26
+bit 109 O 1 PerAddr25
+bit 108 O 1 PerAddr24
+bit 107 O 1 PerAddr23
+bit 106 O 1 PerAddr22
+bit 105 O 1 PerAddr21
+bit 104 O 1 PerAddr20
+bit 103 O 1 PerAddr19
+bit 102 O 1 PerAddr18
+bit 101 C 0 *
+bit 100 B 1 PerBlast_GPIO0 101 0 Z
+bit 99 O 1 PerAddr17
+bit 98 O 1 PerAddr16
+bit 97 O 1 PerAddr15
+bit 96 O 1 PerAddr14
+bit 95 O 1 PerAddr13
+bit 94 O 1 PerAddr12
+bit 93 O 1 PerAddr11
+bit 92 O 1 PerAddr10
+bit 91 O 1 PerAddr9
+bit 90 O 1 PerAddr8
+bit 89 O 1 PerAddr7
+bit 88 O 1 PerAddr6
+bit 87 I 1 PHY0Tx1Clk
+bit 86 C 0 *
+bit 85 B 1 PerAddr5_GPIO16 86 0 Z
+bit 84 I 1 PHY0CrS1
+bit 83 I 1 PHY0Rx1DV
+bit 82 I 1 PHY0Col1
+bit 81 C 0 *
+bit 80 B 1 PerAddr4_GPIO15 81 0 Z
+bit 79 C 0 *
+bit 78 B 1 PerAddr3_GPIO14 79 0 Z
+bit 77 O 1 PerClk
+bit 76 C 0 *
+bit 75 B 1 PerCS4_GPIO13 76 0 Z
+bit 74 I 1 PerReady
+bit 73 O 1 ExtReset
+bit 72 I 1 PHY0Rx1Err
+bit 71 C 0 *
+bit 70 B 1 PerCS1_GPIO10 71 0 Z
+bit 69 O 1 PerCS0
+bit 68 C 0 *
+bit 67 B 1 PerCS3_GPIO12 68 0 Z
+bit 66 O 1 PerRnW
+bit 65 C 0 *
+bit 64 B 1 PerData15 43 0 Z
+bit 63 B 1 PerCS2_GPIO11 65 0 Z
+bit 62 O 1 PerOE
+bit 61 I 1 PHY0Rx1Clk
+bit 60 O 1 PerWBE1
+bit 59 O 1 PerWBE0
+bit 58 B 1 PerData12 43 0 Z
+bit 57 I 1 PHY0Rx1D3
+bit 56 B 1 PerData14 43 0 Z
+bit 55 B 1 PerData13 43 0 Z
+bit 54 I 1 PHY0Rx1D2
+bit 53 B 1 PerData11 43 0 Z
+bit 52 I 1 PHY0Rx1D1
+bit 51 B 1 PerData10 43 0 Z
+bit 50 B 1 PerData9 43 0 Z
+bit 49 C 0 *
+bit 48 B 1 UART1_Tx_GPIO29 49 0 Z
+bit 47 C 0 *
+bit 46 B 1 UART1_Rx_GPIO28 47 0 Z
+bit 45 C 0 *
+bit 44 B 1 UART0_DTR_GPIO27 45 0 Z
+bit 43 C 0 *
+bit 42 B 1 PerData8 43 0 Z
+bit 41 B 1 PerData7 25 0 Z
+bit 40 C 0 *
+bit 39 B 1 UART0_RI_GPIO26 40 0 Z
+bit 38 C 0 *
+bit 37 B 1 UART0_DSR_GPIO25 38 0 Z
+bit 36 B 1 PerData6 25 0 Z
+bit 35 B 1 PerData5 25 0 Z
+bit 34 O 1 EMC0Tx0D2
+bit 33 B 1 PerData4 25 0 Z
+bit 32 B 1 PerData3 25 0 Z
+bit 31 C 0 *
+bit 30 B 1 UART0_DCD_GPIO24 31 0 Z
+bit 29 B 1 UART0_RTS 229 0 Z
+bit 28 O 1 EMC0Tx0D1
+bit 27 B 1 PerData2 25 0 Z
+bit 26 B 1 PerData1 25 0 Z
+bit 25 C 0 *
+bit 24 B 1 PerData0 25 0 Z
+bit 23 O 1 EMC0Tx0D3
+bit 22 I 1 PHY0Rx1D0
+bit 21 B 1 UART0_Tx 229 0 Z
+bit 20 B 1 MemData31 7 0 Z
+bit 19 B 1 MemData30 7 0 Z
+bit 18 I 1 UART0_Rx
+bit 17 B 1 MemData29 7 0 Z
+bit 16 B 1 MemData28 7 0 Z
+bit 15 I 1 UART0_CTS
+bit 14 O 1 DQM3
+bit 13 O 1 EMC0Tx0D0
+bit 12 B 1 MemData27 7 0 Z
+bit 11 B 1 MemData26 7 0 Z
+bit 10 B 1 MemData25 7 0 Z
+bit 9 O 1 EMC0Tx0Err
+bit 8 O 1 EMC0Tx0En
+bit 7 C 0 *
+bit 6 B 1 MemData24 7 0 Z
+bit 5 B 1 MemData23 290 0 Z
+bit 4 B 1 MemData22 290 0 Z
+bit 3 C 0 *
+bit 2 B 1 IICSDA 3 0 Z
+bit 1 B 1 MemData21 290 0 Z
+bit 0 O 1 DQM2
+
+initbus ppc405ep
+endian big
--- /dev/null
+#
+# $Id$
+#
+# Copyright (C) 2002 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Marcel Telka <marcel@telka.sk>, 2002.
+#
+
+# bits 31-28 of the Device Identification Register
+
+0001 ppc440gx A
+0010 ppc440gx B
+0011 ppc440gx C
--- /dev/null
+#
+# $Id$
+#
+# JTAG declarations for IBM PPC440GX
+# Copyright (C) 2002 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Marcel Telka <marcel@telka.sk>, 2002.
+#
+
+
+signal DMAACK0 N05
+signal DMAACK1 P07
+signal DMAACK2 P06
+signal DMAACK3 P11
+signal DMAEOT0 R16
+signal DMAEOT1 P15
+signal DMAEOT2 P16
+signal DMAEOT3 M16
+signal DMAREQ0 R03
+signal DMAREQ1 M11
+signal DMAREQ2 N11
+signal DMAREQ3 P01
+signal EBCADR0 D11
+signal EBCADR1 C11
+signal EBCADR10 C20
+signal EBCADR11 A16
+signal EBCADR12 A13
+signal EBCADR13 B14
+signal EBCADR14 C14
+signal EBCADR15 D14
+signal EBCADR16 B20
+signal EBCADR17 L15
+signal EBCADR18 L21
+signal EBCADR19 L22
+signal EBCADR2 B11
+signal EBCADR20 M22
+signal EBCADR21 M01
+signal EBCADR22 L24
+signal EBCADR23 P24
+signal EBCADR24 T19
+signal EBCADR25 R24
+signal EBCADR26 U22
+signal EBCADR27 U24
+signal EBCADR28 N03
+signal EBCADR29 V20
+signal EBCADR3 A12
+signal EBCADR30 V23
+signal EBCADR31 V21
+signal EBCADR4 A19
+signal EBCADR5 D18
+signal EBCADR6 E11
+signal EBCADR7 M03
+signal EBCADR8 N01
+signal EBCADR9 E14
+signal EBCBE0_N T18
+signal EBCBE1_N V19
+signal EBCBE2_N W22
+signal EBCBE3_N W24
+signal EBCBLAST_N C07
+signal EBCCS0_N E17
+signal EBCCS1_N L10
+signal EBCCS2_N V04
+signal EBCCS3_N T24
+signal EBCCS4_N L03
+signal EBCCS5_N T03
+signal EBCCS6_N L13
+signal EBCCS7_N U03
+signal EBCDATA0 H24
+signal EBCDATA1 H22
+signal EBCDATA10 J19
+signal EBCDATA11 J18
+signal EBCDATA12 J17
+signal EBCDATA13 J15
+signal EBCDATA14 J14
+signal EBCDATA15 J13
+signal EBCDATA16 J12
+signal EBCDATA17 J11
+signal EBCDATA18 J10
+signal EBCDATA19 J09
+signal EBCDATA2 H20
+signal EBCDATA20 L14
+signal EBCDATA21 K24
+signal EBCDATA22 K22
+signal EBCDATA23 K20
+signal EBCDATA24 K18
+signal EBCDATA25 K16
+signal EBCDATA26 K14
+signal EBCDATA27 K11
+signal EBCDATA28 K09
+signal EBCDATA29 L19
+signal EBCDATA3 G20
+signal EBCDATA30 L17
+signal EBCDATA31 L16
+signal EBCDATA4 G19
+signal EBCDATA5 H18
+signal EBCDATA6 J23
+signal EBCDATA7 J22
+signal EBCDATA8 J21
+signal EBCDATA9 J20
+signal EBCOE_N M09
+signal EBCPAR0 T23
+signal EBCPAR1 T22
+signal EBCPAR2 W20
+signal EBCPAR3 U20
+signal EBCREADY N07
+signal EBCRNW P05
+signal EBCWE_N P02
+signal EBMIBUSREQ AA24
+signal EBMICK U18
+signal EBMIERR P21
+signal EBMIEXTACK_N AA22
+signal EBMIEXTREQ_N AB23
+signal EBMIHOLDACK Y21
+signal EBMIHOLDREQ Y23
+signal EBMIRESET_N T17
+signal ENETCOL J07
+signal ENETCRS K07
+signal ENETMDCK J08
+signal ENETMDIO L05
+signal ENETRXCK J02
+signal ENETRXD0 G03
+signal ENETRXD1 E01
+signal ENETRXD2 A07
+signal ENETRXD3 H09
+signal ENETRXDV K01
+signal ENETRXER K03
+signal ENETTXCK J06
+signal ENETTXD0 L09
+signal ENETTXD1 K05
+signal ENETTXD2 J04
+signal ENETTXD3 J03
+signal ENETTXEN L06
+signal ENETTXER C05
+signal GMC1RXCTL P04
+signal GMC1TXCTL L07
+signal GMCREFCLK L01
+signal IIC0SCK G11
+signal IIC0SDATA G13
+signal IIC1SCK_GPIO16 H11
+signal IIC1SDATA_GPIO17 H14
+signal IRQ0_GPIO0 N18
+signal IRQ10_GPIO10 V18
+signal IRQ1_GPIO1 L20
+signal IRQ2_GPIO2 P20
+signal IRQ3_GPIO3 L18
+signal IRQ4_GPIO4 N14
+signal IRQ5_GPIO5 M20
+signal IRQ6_GPIO6 M14
+signal IRQ7_GPIO7 P18
+signal IRQ8_GPIO8 N20
+signal IRQ9_GPIO9 P22
+signal JTAGTCK V22
+signal JTAGTDI Y24
+signal JTAGTDO Y22
+signal JTAGTMS AB22
+signal JTAGTRST_N N24
+signal LSSD_RE L02
+signal LTIDRINH2 A05
+signal LTITESTEN M05
+signal MEMADR0 Y19
+signal MEMADR1 AD20
+signal MEMADR10 W16
+signal MEMADR11 Y11
+signal MEMADR12 V10
+signal MEMADR2 Y20
+signal MEMADR3 AB20
+signal MEMADR4 AD18
+signal MEMADR5 AD16
+signal MEMADR6 AB18
+signal MEMADR7 Y14
+signal MEMADR8 V13
+signal MEMADR9 V11
+signal MEMBA0 AA16
+signal MEMBA1 AD09
+signal MEMBSEL0_N AB15
+signal MEMBSEL1_N W14
+signal MEMBSEL2_N AD11
+signal MEMBSEL3_N AD05
+signal MEMCAS_N AB05
+signal MEMCKE0 AD17
+signal MEMCKE1 AB10
+signal MEMCKE2 Y09
+signal MEMCKE3 W09
+signal MEMDATA0 AD21
+signal MEMDATA1 AB21
+signal MEMDATA10 Y17
+signal MEMDATA11 AB16
+signal MEMDATA12 AC18
+signal MEMDATA13 Y18
+signal MEMDATA14 R14
+signal MEMDATA15 AB17
+signal MEMDATA16 AA14
+signal MEMDATA17 AD15
+signal MEMDATA18 T15
+signal MEMDATA19 V15
+signal MEMDATA2 AC22
+signal MEMDATA20 Y16
+signal MEMDATA21 U14
+signal MEMDATA22 T13
+signal MEMDATA23 Y15
+signal MEMDATA24 AD13
+signal MEMDATA25 AD14
+signal MEMDATA26 V14
+signal MEMDATA27 Y13
+signal MEMDATA28 P12
+signal MEMDATA29 AB12
+signal MEMDATA3 AA20
+signal MEMDATA30 Y12
+signal MEMDATA31 V12
+signal MEMDATA32 W11
+signal MEMDATA33 AD12
+signal MEMDATA34 Y10
+signal MEMDATA35 T12
+signal MEMDATA36 U11
+signal MEMDATA37 T11
+signal MEMDATA38 T10
+signal MEMDATA39 AD10
+signal MEMDATA4 U16
+signal MEMDATA40 AB08
+signal MEMDATA41 AD08
+signal MEMDATA42 R11
+signal MEMDATA43 Y07
+signal MEMDATA44 AC07
+signal MEMDATA45 AB09
+signal MEMDATA46 Y06
+signal MEMDATA47 Y08
+signal MEMDATA48 AA01
+signal MEMDATA49 AA03
+signal MEMDATA5 V17
+signal MEMDATA50 AB02
+signal MEMDATA51 Y01
+signal MEMDATA52 AB03
+signal MEMDATA53 Y02
+signal MEMDATA54 V07
+signal MEMDATA55 V01
+signal MEMDATA56 T08
+signal MEMDATA57 U07
+signal MEMDATA58 W01
+signal MEMDATA59 W03
+signal MEMDATA6 AD19
+signal MEMDATA60 V06
+signal MEMDATA61 T07
+signal MEMDATA62 W05
+signal MEMDATA63 U05
+signal MEMDATA7 AB19
+signal MEMDATA8 W18
+signal MEMDATA9 V16
+signal MEMDM0 T16
+signal MEMDM1 AA18
+signal MEMDM2 AB14
+signal MEMDM3 P13
+signal MEMDM4 AA09
+signal MEMDM5 AA07
+signal MEMDM6 Y03
+signal MEMDM7 V03
+signal MEMDM8 AC05
+signal MEMDQS0 AC20
+signal MEMDQS1 AC16
+signal MEMDQS2 AC14
+signal MEMDQS3 AB13
+signal MEMDQS4 AC11
+signal MEMDQS5 AC09
+signal MEMDQS6 Y04
+signal MEMDQS7 T01
+signal MEMDQS8 AA05
+signal MEMECC0 AB07
+signal MEMECC1 AB06
+signal MEMECC2 AD06
+signal MEMECC3 W07
+signal MEMECC4 U09
+signal MEMECC5 AC03
+signal MEMECC6 AB04
+signal MEMECC7 AD04
+signal MEMRAS_N AD07
+signal MEMSYSCK V09
+signal MEMSYSCK_N V08
+signal MEMVREFR1 T14
+signal MEMVREFR2 T09
+signal MEMWE_N Y05
+signal PCIACK64_N D09
+signal PCIAD0 C17
+signal PCIAD1 B09
+signal PCIAD10 C15
+signal PCIAD11 E15
+signal PCIAD12 G15
+signal PCIAD13 B16
+signal PCIAD14 C16
+signal PCIAD15 D16
+signal PCIAD16 E18
+signal PCIAD17 E19
+signal PCIAD18 F18
+signal PCIAD19 G18
+signal PCIAD2 G10
+signal PCIAD20 D20
+signal PCIAD21 A20
+signal PCIAD22 A21
+signal PCIAD23 C21
+signal PCIAD24 F22
+signal PCIAD25 B22
+signal PCIAD26 G21
+signal PCIAD27 E23
+signal PCIAD28 C23
+signal PCIAD29 F24
+signal PCIAD3 E10
+signal PCIAD30 D22
+signal PCIAD31 D24
+signal PCIAD32 H03
+signal PCIAD33 H01
+signal PCIAD34 L08
+signal PCIAD35 F01
+signal PCIAD36 D01
+signal PCIAD37 J05
+signal PCIAD38 H05
+signal PCIAD39 G02
+signal PCIAD4 C10
+signal PCIAD40 E02
+signal PCIAD41 C02
+signal PCIAD42 A08
+signal PCIAD43 G05
+signal PCIAD44 F03
+signal PCIAD45 D03
+signal PCIAD46 B03
+signal PCIAD47 H07
+signal PCIAD48 G04
+signal PCIAD49 E04
+signal PCIAD5 A10
+signal PCIAD50 C04
+signal PCIAD51 A04
+signal PCIAD52 F05
+signal PCIAD53 D05
+signal PCIAD54 B05
+signal PCIAD55 C09
+signal PCIAD56 E06
+signal PCIAD57 C06
+signal PCIAD58 A06
+signal PCIAD59 F07
+signal PCIAD6 F11
+signal PCIAD60 E07
+signal PCIAD61 D07
+signal PCIAD62 B07
+signal PCIAD63 E08
+signal PCIAD7 G12
+signal PCIAD8 G14
+signal PCIAD9 A15
+signal PCICLK E03
+signal PCIC_BE0_N F14
+signal PCIC_BE1_N E16
+signal PCIC_BE2_N C19
+signal PCIC_BE3_N F20
+signal PCIC_BE4_N C08
+signal PCIC_BE5_N C03
+signal PCIC_BE6_N G09
+signal PCIC_BE7_N F09
+signal PCIDEVSEL_N E13
+signal PCIFRAME_N A11
+signal PCIGNT0_N E22
+signal PCIGNT1_N_IRQ12 C22
+signal PCIGNT2_N N22
+signal PCIGNT3_N M18
+signal PCIGNT4_N R22
+signal PCIGNT5_N P19
+signal PCIIDSEL G07
+signal PCIINTA_N M07
+signal PCIIRDY_N E12
+signal PCIM66EN A14
+signal PCIPAR F16
+signal PCIPAR64 L04
+signal PCIPERR_N A17
+signal PCIREQ0_N E24
+signal PCIREQ1_N_IRQ11 E21
+signal PCIREQ2_N E20
+signal PCIREQ3_N R20
+signal PCIREQ4_N G23
+signal PCIREQ5_N R18
+signal PCIREQ64_N E09
+signal PCIRST_N M24
+signal PCISERR_N A18
+signal PCISTOP_N L12
+signal PCITRDY_N C12
+signal PCIX133UP G08
+signal PCIXCAP L23
+signal SYSCKTK U01
+signal SYSCLK G22
+signal SYSERROR T02
+signal SYSHALT_N V05
+signal SYSMEMPLLG AA11
+signal SYSMEMPLLV AB11
+signal SYSPCIPLLG J01
+signal SYSPCIPLLV G01
+signal SYSPLLG J24
+signal SYSPLLV G24
+signal SYSRESET_N P10
+signal TRACEBR0_GPIO18 N16
+signal TRACEBR1_GPIO19 P17
+signal TRACEBR2_GPIO20 T20
+signal TRACECK R05
+signal TRACEES0_GPIO21 T21
+signal TRACEES1_GPIO22 P23
+signal TRACEES2_GPIO23 N09
+signal TRACEES3_GPIO24 P08
+signal TRACEES4_GPIO25 T05
+signal TRACETE1_GPIO11 P14
+signal TRACETS0_GPIO26 T04
+signal TRACETS1_GPIO27 P03
+signal TRACETS2_GPIO28 R07
+signal TRACETS3_GPIO29 P09
+signal TRACETS4_GPIO30 R09
+signal TRACETS5_GPIO31 T06
+signal TRACETS6 R01
+signal UART0CTS_N C13
+signal UART0DCD_N V24
+signal UART0DSR_N V02
+signal UART0DTR_N B18
+signal UART0RI_N H16
+signal UART0RTS_N G16
+signal UART0RX G17
+signal UART0TX L11
+signal UART1DSR_CTS_GPIO14_N G06
+signal UART1RTS_DTR_GPIO15_N E05
+signal UART1RX_GPIO12 C18
+signal UART1TX_GPIO13 J16
+signal UARTSERCK A09
+signal P_GND B06 B10 B13 B17 B21 D04 D08 D12 D15 D19 D23 F02 F10 F13 F17 F21 H04 H08 H12 H15 H23 K02 K06 K10 K13 K17 K21 M04 M08 M12 M15 M19 M23 N02 N06 N10 N13 N17 N21 R04 R08 R12 R15 R19 R23 U02 U10 U13 U17 U21 W04 W08 W12 W15 W23 AA02 AA06 AA10 AA13 AA17 AA21 AC04 AC08 AC12 AC15 AC19
+signal P_VDD B08 B15 D06 D13 D21 F04 F12 F19 H02 H17 K12 K15 K23 M06 M10 M13 M21 N04 N12 N15 N19 R02 R10 R13 U08 U23 W06 W13 W21 AA04 AA12 AA19 AC10 AC17
+signal P_VDD2 B04 B12 B19 D02 D10 D17 F08 F15 F23 H06 H10 H13 H21 K04 K08 K19 M02 M17 N08 N23 R06 R17 R21 U04 U19 W02 AA23
+signal P_VDD3 U12 U15 W10 W17 AA08 AA15 AC06 AC13 AC21
+
+
+# mandatory data registers
+register BSR 769 # Boundary Scan Register
+register BR 1 # Bypass Register
+
+# optional data registers
+register DIR 32 # Device Identification Register
+
+instruction length 8
+
+# mandatory instructions
+instruction EXTEST 00000000 BSR
+instruction SAMPLE/PRELOAD 11110010 BSR
+instruction BYPASS 11111111 BR
+
+# optional instructions
+instruction CLAMP 11110110 BR
+instruction HIGHZ 11110101 BR
+instruction IDCODE 11110011 DIR
+
+
+
+# Boundary Scan Register bit definition
+bit 0 B ? PCIAD31 1 0 Z
+bit 1 C 0 PCIAD31
+bit 2 B ? PCIAD30 3 0 Z
+bit 3 C 0 PCIAD30
+bit 4 B ? PCIAD28 5 0 Z
+bit 5 C 0 PCIAD28
+bit 6 B ? PCIREQ0_N 7 0 Z
+bit 7 C 0 PCIREQ0_N
+bit 8 I ? PCIREQ1_N_IRQ11
+bit 9 B ? PCIGNT1_N_IRQ12 10 0 Z
+bit 10 C 0 PCIGNT1_N_IRQ12
+bit 11 B ? PCIAD27 12 0 Z
+bit 12 C 0 PCIAD27
+bit 13 B ? PCIAD19 14 0 Z
+bit 14 C 0 PCIAD19
+bit 15 B ? PCIGNT0_N 16 0 Z
+bit 16 C 0 PCIGNT0_N
+bit 17 B ? PCIAD29 18 0 Z
+bit 18 C 0 PCIAD29
+bit 19 B ? PCIAD24 20 0 Z
+bit 20 C 0 PCIAD24
+bit 21 I ? SYSCLK
+bit 22 B ? PCIC_BE3_N 23 0 Z
+bit 23 C 0 PCIC_BE3_N
+bit 24 B ? PCIAD26 25 0 Z
+bit 25 C 0 PCIAD26
+bit 26 B ? PCIREQ4_N 27 0 Z
+bit 27 C 0 PCIREQ4_N
+bit 28 I ? PCIXCAP
+bit 29 B ? DMAEOT3 30 0 Z
+bit 30 C 0 DMAEOT3
+bit 31 O ? PCIRST_N 32 0 Z
+bit 32 C 0 PCIRST_N
+bit 33 O ? PCIGNT3_N 34 0 Z
+bit 34 C 0 PCIGNT3_N
+bit 35 B ? IRQ5_GPIO5 36 0 Z
+bit 36 C 0 IRQ5_GPIO5
+bit 37 B ? IRQ1_GPIO1 38 0 Z
+bit 38 C 0 IRQ1_GPIO1
+bit 39 B ? IRQ3_GPIO3 40 0 Z
+bit 40 C 0 IRQ3_GPIO3
+bit 41 B ? IRQ6_GPIO6 42 0 Z
+bit 42 C 0 IRQ6_GPIO6
+bit 43 B ? IRQ4_GPIO4 44 0 Z
+bit 44 C 0 IRQ4_GPIO4
+bit 45 B ? IRQ0_GPIO0 46 0 Z
+bit 46 C 0 IRQ0_GPIO0
+bit 47 B ? IRQ2_GPIO2 48 0 Z
+bit 48 C 0 IRQ2_GPIO2
+bit 49 O ? PCIGNT2_N 50 0 Z
+bit 50 C 0 PCIGNT2_N
+bit 51 B ? IRQ8_GPIO8 52 0 Z
+bit 52 C 0 IRQ8_GPIO8
+bit 53 B ? IRQ7_GPIO7 54 0 Z
+bit 54 C 0 IRQ7_GPIO7
+bit 55 O ? PCIGNT5_N 56 0 Z
+bit 56 C 0 PCIGNT5_N
+bit 57 B ? TRACETE1_GPIO11 58 0 Z
+bit 58 C 0 TRACETE1_GPIO11
+bit 59 O ? PCIGNT4_N 60 0 Z
+bit 60 C 0 PCIGNT4_N
+bit 61 B ? PCIREQ3_N 62 0 Z
+bit 62 C 0 PCIREQ3_N
+bit 63 B ? TRACEBR0_GPIO18 64 0 Z
+bit 64 C 0 TRACEBR0_GPIO18
+bit 65 B ? TRACEBR1_GPIO19 66 0 Z
+bit 66 C 0 TRACEBR1_GPIO19
+bit 67 B ? TRACEBR2_GPIO20 68 0 Z
+bit 68 C 0 TRACEBR2_GPIO20
+bit 69 B ? TRACEES0_GPIO21 70 0 Z
+bit 70 C 0 TRACEES0_GPIO21
+bit 71 B ? TRACEES1_GPIO22 72 0 Z
+bit 72 C 0 TRACEES1_GPIO22
+bit 73 B ? IRQ9_GPIO9 74 0 Z
+bit 74 C 0 IRQ9_GPIO9
+bit 75 B ? PCIREQ5_N 76 0 Z
+bit 76 C 0 PCIREQ5_N
+bit 77 B ? DMAEOT2 78 0 Z
+bit 78 C 0 DMAEOT2
+bit 79 B ? DMAEOT0 80 0 Z
+bit 80 C 0 DMAEOT0
+bit 81 B ? EBMIERR 82 0 Z
+bit 82 C 0 EBMIERR
+bit 83 B ? DMAEOT1 84 0 Z
+bit 84 C 0 DMAEOT1
+bit 85 O ? EBMICK 86 0 Z
+bit 86 C 0 EBMICK
+bit 87 O ? EBMIRESET_N 88 0 Z
+bit 88 C 0 EBMIRESET_N
+bit 89 I ? UART0DCD_N
+bit 90 B ? IRQ10_GPIO10 91 0 Z
+bit 91 C 0 IRQ10_GPIO10
+bit 92 B ? EBMIHOLDREQ 93 0 Z
+bit 93 C 0 EBMIHOLDREQ
+bit 94 O ? EBMIHOLDACK 95 0 Z
+bit 95 C 0 EBMIHOLDACK
+bit 96 B ? EBMIEXTREQ_N 97 0 Z
+bit 97 C 0 EBMIEXTREQ_N
+bit 98 O ? EBMIEXTACK_N 99 0 Z
+bit 99 C 0 EBMIEXTACK_N
+bit 100 O ? EBMIBUSREQ 101 0 Z
+bit 101 C 0 EBMIBUSREQ
+bit 102 B ? PCIAD51 103 0 Z
+bit 103 C 0 PCIAD51
+bit 104 B ? PCIAD50 105 0 Z
+bit 105 C 0 PCIAD50
+bit 106 B ? PCIAD46 107 0 Z
+bit 107 C 0 PCIAD46
+bit 108 B ? PCIAD53 109 0 Z
+bit 109 C 0 PCIAD53
+bit 110 B ? UART1RTS_DTR_GPIO15_N 111 0 Z
+bit 111 C 0 UART1RTS_DTR_GPIO15_N
+bit 112 B ? PCIAD54 113 0 Z
+bit 113 C 0 PCIAD54
+bit 114 B ? ENETTXER 115 0 Z
+bit 115 C 0 ENETTXER
+bit 116 B ? ENETRXD2 117 0 Z
+bit 117 C 0 ENETRXD2
+bit 118 B ? ENETRXD3 119 0 Z
+bit 119 C 0 ENETRXD3
+bit 120 O ? PCIX133UP 121 0 Z
+bit 121 C 0 PCIX133UP
+bit 122 B ? PCIAD58 123 0 Z
+bit 123 C 0 PCIAD58
+bit 124 B ? PCIAD57 125 0 Z
+bit 125 C 0 PCIAD57
+bit 126 I ? UARTSERCK
+bit 127 B ? PCIAD59 128 0 Z
+bit 128 C 0 PCIAD59
+bit 129 B ? PCIC_BE6_N 130 0 Z
+bit 130 C 0 PCIC_BE6_N
+bit 131 B ? PCIAD63 132 0 Z
+bit 132 C 0 PCIAD63
+bit 133 B ? PCIAD56 134 0 Z
+bit 134 C 0 PCIAD56
+bit 135 B ? PCIAD55 136 0 Z
+bit 136 C 0 PCIAD55
+bit 137 B ? PCIAD1 138 0 Z
+bit 138 C 0 PCIAD1
+bit 139 B ? PCIAD61 140 0 Z
+bit 140 C 0 PCIAD61
+bit 141 B ? PCIAD62 142 0 Z
+bit 142 C 0 PCIAD62
+bit 143 B ? PCIAD60 144 0 Z
+bit 144 C 0 PCIAD60
+bit 145 B ? PCIAD42 146 0 Z
+bit 146 C 0 PCIAD42
+bit 147 B ? PCIC_BE4_N 148 0 Z
+bit 148 C 0 PCIC_BE4_N
+bit 149 B ? PCIAD5 150 0 Z
+bit 150 C 0 PCIAD5
+bit 151 B ? PCIC_BE7_N 152 0 Z
+bit 152 C 0 PCIC_BE7_N
+bit 153 B ? PCIAD2 154 0 Z
+bit 154 C 0 PCIAD2
+bit 155 B ? PCIACK64_N 156 0 Z
+bit 156 C 0 PCIACK64_N
+bit 157 B ? PCIREQ64_N 158 0 Z
+bit 158 C 0 PCIREQ64_N
+bit 159 B ? PCIAD3 160 0 Z
+bit 160 C 0 PCIAD3
+bit 161 B ? PCIAD4 162 0 Z
+bit 162 C 0 PCIAD4
+bit 163 B ? PCIFRAME_N 164 0 Z
+bit 164 C 0 PCIFRAME_N
+bit 165 B ? PCIAD6 166 0 Z
+bit 166 C 0 PCIAD6
+bit 167 B ? PCIAD7 168 0 Z
+bit 168 C 0 PCIAD7
+bit 169 B ? PCIIRDY_N 170 0 Z
+bit 170 C 0 PCIIRDY_N
+bit 171 B ? PCITRDY_N 172 0 Z
+bit 172 C 0 PCITRDY_N
+bit 173 B ? PCISTOP_N 174 0 Z
+bit 174 C 0 PCISTOP_N
+bit 175 I ? UART0CTS_N
+bit 176 B ? PCIDEVSEL_N 177 0 Z
+bit 177 C 0 PCIDEVSEL_N
+bit 178 B ? PCIAD8 179 0 Z
+bit 179 C 0 PCIAD8
+bit 180 B ? PCIC_BE0_N 181 0 Z
+bit 181 C 0 PCIC_BE0_N
+bit 182 I ? PCIM66EN
+bit 183 B ? PCIAD10 184 0 Z
+bit 184 C 0 PCIAD10
+bit 185 B ? PCIAD11 186 0 Z
+bit 186 C 0 PCIAD11
+bit 187 B ? PCIC_BE1_N 188 0 Z
+bit 188 C 0 PCIC_BE1_N
+bit 189 B ? PCIAD15 190 0 Z
+bit 190 C 0 PCIAD15
+bit 191 B ? PCIAD12 192 0 Z
+bit 192 C 0 PCIAD12
+bit 193 B ? PCIPAR 194 0 Z
+bit 194 C 0 PCIPAR
+bit 195 B ? PCIAD9 196 0 Z
+bit 196 C 0 PCIAD9
+bit 197 B ? PCIAD0 198 0 Z
+bit 198 C 0 PCIAD0
+bit 199 B ? PCIPERR_N 200 0 Z
+bit 200 C 0 PCIPERR_N
+bit 201 B ? PCIAD16 202 0 Z
+bit 202 C 0 PCIAD16
+bit 203 O ? UART0DTR_N 204 0 Z
+bit 204 C 0 UART0DTR_N
+bit 205 B ? PCIAD13 206 0 Z
+bit 206 C 0 PCIAD13
+bit 207 B ? PCIAD14 208 0 Z
+bit 208 C 0 PCIAD14
+bit 209 B ? PCIAD17 210 0 Z
+bit 210 C 0 PCIAD17
+bit 211 O ? UART0RTS_N 212 0 Z
+bit 212 C 0 UART0RTS_N
+bit 213 B ? PCIAD18 214 0 Z
+bit 214 C 0 PCIAD18
+bit 215 B ? UART1RX_GPIO12 216 0 Z
+bit 216 C 0 UART1RX_GPIO12
+bit 217 B ? PCIC_BE2_N 218 0 Z
+bit 218 C 0 PCIC_BE2_N
+bit 219 I ? UART0RX
+bit 220 I ? UART0RI_N
+bit 221 B ? PCISERR_N 222 0 Z
+bit 222 C 0 PCISERR_N
+bit 223 B ? UART1TX_GPIO13 224 0 Z
+bit 224 C 0 UART1TX_GPIO13
+bit 225 B ? PCIREQ2_N 226 0 Z
+bit 226 C 0 PCIREQ2_N
+bit 227 B ? PCIAD20 228 0 Z
+bit 228 C 0 PCIAD20
+bit 229 B ? PCIAD21 230 0 Z
+bit 230 C 0 PCIAD21
+bit 231 B ? PCIAD25 232 0 Z
+bit 232 C 0 PCIAD25
+bit 233 B ? PCIAD23 234 0 Z
+bit 234 C 0 PCIAD23
+bit 235 B ? PCIAD22 236 0 Z
+bit 236 C 0 PCIAD22
+bit 237 B ? MEMDATA48 238 0 Z
+bit 238 C 0 MEMDATA48
+bit 239 B ? MEMDATA49 240 0 Z
+bit 240 C 0 MEMDATA49
+bit 241 B ? MEMDATA50 242 0 Z
+bit 242 C 0 MEMDATA50
+bit 243 B ? MEMDATA51 244 0 Z
+bit 244 C 0 MEMDATA51
+bit 245 B ? MEMDQS6 246 0 Z
+bit 246 C 0 MEMDQS6
+bit 247 B ? MEMDATA52 248 0 Z
+bit 248 C 0 MEMDATA52
+bit 249 B ? MEMDATA53 250 0 Z
+bit 250 C 0 MEMDATA53
+bit 251 B ? MEMDATA54 252 0 Z
+bit 252 C 0 MEMDATA54
+bit 253 O ? MEMDM6 254 0 Z
+bit 254 C 0 MEMDM6
+bit 255 B ? MEMDATA55 256 0 Z
+bit 256 C 0 MEMDATA55
+bit 257 B ? MEMDATA56 258 0 Z
+bit 258 C 0 MEMDATA56
+bit 259 B ? MEMDATA57 260 0 Z
+bit 260 C 0 MEMDATA57
+bit 261 B ? MEMDATA58 262 0 Z
+bit 262 C 0 MEMDATA58
+bit 263 B ? MEMDATA59 264 0 Z
+bit 264 C 0 MEMDATA59
+bit 265 B ? MEMDQS7 266 0 Z
+bit 266 C 0 MEMDQS7
+bit 267 I ? MEMDM7 268 0 Z
+bit 268 C 0 MEMDM7
+bit 269 B ? MEMDATA60 270 0 Z
+bit 270 C 0 MEMDATA60
+bit 271 B ? MEMDATA61 272 0 Z
+bit 272 C 0 MEMDATA61
+bit 273 B ? MEMDATA63 274 0 Z
+bit 274 C 0 MEMDATA63
+bit 275 B ? MEMDATA62 276 0 Z
+bit 276 C 0 MEMDATA62
+bit 277 O ? SYSERROR 278 0 Z
+bit 278 C 0 SYSERROR
+bit 279 I ? UART0DSR_N
+bit 280 I ? SYSHALT_N
+bit 281 B ? SYSRESET_N 282 0 Z
+bit 282 C 0 SYSRESET_N
+bit 283 I ? SYSCKTK
+bit 284 I ? GMC1RXCTL
+bit 285 B ? TRACETS6 286 0 Z
+bit 286 C 0 TRACETS6
+bit 287 B ? TRACETS5_GPIO31 288 0 Z
+bit 288 C 0 TRACETS5_GPIO31
+bit 289 B ? TRACETS4_GPIO30 290 0 Z
+bit 290 C 0 TRACETS4_GPIO30
+bit 291 B ? TRACETS3_GPIO29 292 0 Z
+bit 292 C 0 TRACETS3_GPIO29
+bit 293 B ? TRACETS2_GPIO28 294 0 Z
+bit 294 C 0 TRACETS2_GPIO28
+bit 295 B ? TRACETS1_GPIO27 296 0 Z
+bit 296 C 0 TRACETS1_GPIO27
+bit 297 B ? TRACETS0_GPIO26 298 0 Z
+bit 298 C 0 TRACETS0_GPIO26
+bit 299 B ? TRACEES4_GPIO25 300 0 Z
+bit 300 C 0 TRACEES4_GPIO25
+bit 301 B ? TRACEES3_GPIO24 302 0 Z
+bit 302 C 0 TRACEES3_GPIO24
+bit 303 B ? TRACEES2_GPIO23 304 0 Z
+bit 304 C 0 TRACEES2_GPIO23
+bit 305 O ? TRACECK 306 0 Z
+bit 306 C 0 TRACECK
+bit 307 I ? DMAREQ0
+bit 308 B ? DMAREQ3 309 0 Z
+bit 309 C 0 DMAREQ3
+bit 310 B ? DMAACK3 311 0 Z
+bit 311 C 0 DMAACK3
+bit 312 B ? DMAACK2 313 0 Z
+bit 313 C 0 DMAACK2
+bit 314 O ? DMAACK1 315 0 Z
+bit 315 C 0 DMAACK1
+bit 316 O ? DMAACK0 317 0 Z
+bit 317 C 0 DMAACK0
+bit 318 I ? DMAREQ2
+bit 319 I ? DMAREQ1
+bit 320 B ? GMC1TXCTL 321 0 Z
+bit 321 C 0 GMC1TXCTL
+bit 322 B ? ENETMDIO 323 0 Z
+bit 323 C 0 ENETMDIO
+bit 324 O ? PCIINTA_N 325 0 Z
+bit 325 C 0 PCIINTA_N
+bit 326 O ? ENETTXEN 327 0 Z
+bit 327 C 0 ENETTXEN
+bit 328 O ? UART0TX 329 0 Z
+bit 329 C 0 UART0TX
+bit 330 I ? GMCREFCLK
+bit 331 B ? ENETRXER 332 0 Z
+bit 332 C 0 ENETRXER
+bit 333 O ? ENETTXD1 334 0 Z
+bit 334 C 0 ENETTXD1
+bit 335 B ? PCIAD34 336 0 Z
+bit 336 C 0 PCIAD34
+bit 337 B ? PCIAD37 338 0 Z
+bit 338 C 0 PCIAD37
+bit 339 O ? ENETTXD2 340 0 Z
+bit 340 C 0 ENETTXD2
+bit 341 B ? ENETCRS 342 0 Z
+bit 342 C 0 ENETCRS
+bit 343 O ? ENETTXD0 344 0 Z
+bit 344 C 0 ENETTXD0
+bit 345 I ? ENETTXCK
+bit 346 B ? ENETRXDV 347 0 Z
+bit 347 C 0 ENETRXDV
+bit 348 B ? PCIPAR64 349 0 Z
+bit 349 C 0 PCIPAR64
+bit 350 B ? PCIAD32 351 0 Z
+bit 351 C 0 PCIAD32
+bit 352 B ? PCIAD33 353 0 Z
+bit 353 C 0 PCIAD33
+bit 354 B ? PCIAD43 355 0 Z
+bit 355 C 0 PCIAD43
+bit 356 B ? PCIAD39 357 0 Z
+bit 357 C 0 PCIAD39
+bit 358 B ? PCIAD48 359 0 Z
+bit 359 C 0 PCIAD48
+bit 360 B ? ENETRXCK 361 0 Z
+bit 361 C 0 ENETRXCK
+bit 362 O ? ENETTXD3 363 0 Z
+bit 363 C 0 ENETTXD3
+bit 364 B ? PCIAD52 365 0 Z
+bit 365 C 0 PCIAD52
+bit 366 B ? PCIAD38 367 0 Z
+bit 367 C 0 PCIAD38
+bit 368 B ? ENETCOL 369 0 Z
+bit 369 C 0 ENETCOL
+bit 370 B ? UART1DSR_CTS_GPIO14_N 371 0 Z
+bit 371 C 0 UART1DSR_CTS_GPIO14_N
+bit 372 B ? ENETRXD0 373 0 Z
+bit 373 C 0 ENETRXD0
+bit 374 B ? PCIAD44 375 0 Z
+bit 375 C 0 PCIAD44
+bit 376 B ? PCIAD35 377 0 Z
+bit 377 C 0 PCIAD35
+bit 378 B ? PCIAD47 379 0 Z
+bit 379 C 0 PCIAD47
+bit 380 O ? ENETMDCK 381 0 Z
+bit 381 C 0 ENETMDCK
+bit 382 I ? PCICLK
+bit 383 I ? PCIIDSEL
+bit 384 B ? PCIAD40 385 0 Z
+bit 385 C 0 PCIAD40
+bit 386 B ? PCIC_BE5_N 387 0 Z
+bit 387 C 0 PCIC_BE5_N
+bit 388 B ? PCIAD49 389 0 Z
+bit 389 C 0 PCIAD49
+bit 390 B ? ENETRXD1 391 0 Z
+bit 391 C 0 ENETRXD1
+bit 392 B ? PCIAD41 393 0 Z
+bit 393 C 0 PCIAD41
+bit 394 B ? PCIAD45 395 0 Z
+bit 395 C 0 PCIAD45
+bit 396 B ? PCIAD36 397 0 Z
+bit 397 C 0 PCIAD36
+bit 398 B ? MEMDATA0 399 0 Z
+bit 399 C 0 MEMDATA0
+bit 400 B ? MEMDATA1 401 0 Z
+bit 401 C 0 MEMDATA1
+bit 402 B ? MEMDATA2 403 0 Z
+bit 403 C 0 MEMDATA2
+bit 404 O ? MEMADR1 405 0 Z
+bit 405 C 0 MEMADR1
+bit 406 B ? MEMDATA3 407 0 Z
+bit 407 C 0 MEMDATA3
+bit 408 O ? MEMADR2 409 0 Z
+bit 409 C 0 MEMADR2
+bit 410 B ? MEMDQS0 411 0 Z
+bit 411 C 0 MEMDQS0
+bit 412 O ? MEMDM0 413 0 Z
+bit 413 C 0 MEMDM0
+bit 414 O ? MEMADR3 415 0 Z
+bit 415 C 0 MEMADR3
+bit 416 O ? MEMADR4 417 0 Z
+bit 417 C 0 MEMADR4
+bit 418 B ? MEMDATA4 419 0 Z
+bit 419 C 0 MEMDATA4
+bit 420 B ? MEMDATA5 421 0 Z
+bit 421 C 0 MEMDATA5
+bit 422 B ? MEMDATA6 423 0 Z
+bit 423 C 0 MEMDATA6
+bit 424 B ? MEMDATA7 425 0 Z
+bit 425 C 0 MEMDATA7
+bit 426 O ? MEMADR5 427 0 Z
+bit 427 C 0 MEMADR5
+bit 428 O ? MEMADR6 429 0 Z
+bit 429 C 0 MEMADR6
+bit 430 B ? MEMDATA8 431 0 Z
+bit 431 C 0 MEMDATA8
+bit 432 B ? MEMDATA9 433 0 Z
+bit 433 C 0 MEMDATA9
+bit 434 B ? MEMDATA10 435 0 Z
+bit 435 C 0 MEMDATA10
+bit 436 O ? MEMADR0 437 0 Z
+bit 437 C 0 MEMADR0
+bit 438 B ? MEMDATA11 439 0 Z
+bit 439 C 0 MEMDATA11
+bit 440 B ? MEMDQS1 441 0 Z
+bit 441 C 0 MEMDQS1
+bit 442 O ? MEMDM1 443 0 Z
+bit 443 C 0 MEMDM1
+bit 444 B ? MEMDATA12 445 0 Z
+bit 445 C 0 MEMDATA12
+bit 446 B ? MEMDATA13 447 0 Z
+bit 447 C 0 MEMDATA13
+bit 448 B ? MEMDATA14 449 0 Z
+bit 449 C 0 MEMDATA14
+bit 450 O ? MEMCKE0 451 0 Z
+bit 451 C 0 MEMCKE0
+bit 452 B ? MEMDATA15 453 0 Z
+bit 453 C 0 MEMDATA15
+bit 454 B ? MEMDATA16 455 0 Z
+bit 455 C 0 MEMDATA16
+bit 456 B ? MEMDATA17 457 0 Z
+bit 457 C 0 MEMDATA17
+bit 458 O ? MEMADR10 459 0 Z
+bit 459 C 0 MEMADR10
+bit 460 B ? MEMDATA18 461 0 Z
+bit 461 C 0 MEMDATA18
+bit 462 B ? MEMDATA19 463 0 Z
+bit 463 C 0 MEMDATA19
+bit 464 O ? MEMDM2 465 0 Z
+bit 465 C 0 MEMDM2
+bit 466 B ? MEMDQS2 467 0 Z
+bit 467 C 0 MEMDQS2
+bit 468 O ? MEMBA0 469 0 Z
+bit 469 C 0 MEMBA0
+bit 470 B ? MEMDATA20 471 0 Z
+bit 471 C 0 MEMDATA20
+bit 472 B ? MEMDATA21 473 0 Z
+bit 473 C 0 MEMDATA21
+bit 474 B ? MEMDATA22 475 0 Z
+bit 475 C 0 MEMDATA22
+bit 476 B ? MEMDATA23 477 0 Z
+bit 477 C 0 MEMDATA23
+bit 478 O ? MEMBSEL0_N 479 0 Z
+bit 479 C 0 MEMBSEL0_N
+bit 480 B ? MEMDATA24 481 0 Z
+bit 481 C 0 MEMDATA24
+bit 482 B ? MEMDATA25 483 0 Z
+bit 483 C 0 MEMDATA25
+bit 484 O ? MEMBSEL1_N 485 0 Z
+bit 485 C 0 MEMBSEL1_N
+bit 486 B ? MEMDATA26 487 0 Z
+bit 487 C 0 MEMDATA26
+bit 488 B ? MEMDATA27 489 0 Z
+bit 489 C 0 MEMDATA27
+bit 490 B ? MEMDQS3 491 0 Z
+bit 491 C 0 MEMDQS3
+bit 492 O ? MEMADR7 493 0 Z
+bit 493 C 0 MEMADR7
+bit 494 O ? MEMADR8 495 0 Z
+bit 495 C 0 MEMADR8
+bit 496 O ? MEMDM3 497 0 Z
+bit 497 C 0 MEMDM3
+bit 498 B ? MEMDATA28 499 0 Z
+bit 499 C 0 MEMDATA28
+bit 500 O ? MEMADR9 501 0 Z
+bit 501 C 0 MEMADR9
+bit 502 O ? MEMADR11 503 0 Z
+bit 503 C 0 MEMADR11
+bit 504 B ? MEMDATA29 505 0 Z
+bit 505 C 0 MEMDATA29
+bit 506 B ? MEMDATA30 507 0 Z
+bit 507 C 0 MEMDATA30
+bit 508 B ? MEMDATA31 509 0 Z
+bit 509 C 0 MEMDATA31
+bit 510 B ? MEMDATA32 511 0 Z
+bit 511 C 0 MEMDATA32
+bit 512 O ? MEMBSEL2_N 513 0 Z
+bit 513 C 0 MEMBSEL2_N
+bit 514 B ? MEMDATA33 515 0 Z
+bit 515 C 0 MEMDATA33
+bit 516 O ? MEMCKE1 517 0 Z
+bit 517 C 0 MEMCKE1
+bit 518 B ? MEMDATA34 519 0 Z
+bit 519 C 0 MEMDATA34
+bit 520 B ? MEMDATA35 521 0 Z
+bit 521 C 0 MEMDATA35
+bit 522 B ? MEMDATA36 523 0 Z
+bit 523 C 0 MEMDATA36
+bit 524 O ? MEMCKE2 525 0 Z
+bit 525 C 0 MEMCKE2
+bit 526 O ? MEMDM4 527 0 Z
+bit 527 C 0 MEMDM4
+bit 528 B ? MEMDQS4 529 0 Z
+bit 529 C 0 MEMDQS4
+bit 530 O ? MEMADR12 531 0 Z
+bit 531 C 0 MEMADR12
+bit 532 B ? MEMDATA37 533 0 Z
+bit 533 C 0 MEMDATA37
+bit 534 B ? MEMDATA38 535 0 Z
+bit 535 C 0 MEMDATA38
+bit 536 O ? MEMCKE3 537 0 Z
+bit 537 C 0 MEMCKE3
+bit 538 B ? MEMDATA39 539 0 Z
+bit 539 C 0 MEMDATA39
+bit 540 B ? MEMDATA40 541 0 Z
+bit 541 C 0 MEMDATA40
+bit 542 B ? MEMDATA41 543 0 Z
+bit 543 C 0 MEMDATA41
+bit 544 B ? MEMDATA42 545 0 Z
+bit 545 C 0 MEMDATA42
+bit 546 B ? MEMDATA43 547 0 Z
+bit 547 C 0 MEMDATA43
+bit 548 B ? MEMDATA44 549 0 Z
+bit 549 C 0 MEMDATA44
+bit 550 O ? MEMDM5 551 0 Z
+bit 551 C 0 MEMDM5
+bit 552 B ? MEMDQS5 553 0 Z
+bit 553 C 0 MEMDQS5
+bit 554 B ? MEMDATA45 555 0 Z
+bit 555 C 0 MEMDATA45
+bit 556 B ? MEMDATA46 557 0 Z
+bit 557 C 0 MEMDATA46
+bit 558 B ? MEMDATA47 559 0 Z
+bit 559 C 0 MEMDATA47
+bit 560 O ? MEMSYSCK 561 0 Z
+bit 561 C 0 MEMSYSCK
+bit 562 B ? MEMECC0 563 0 Z
+bit 563 C 0 MEMECC0
+bit 564 O ? MEMBA1 565 0 Z
+bit 565 C 0 MEMBA1
+bit 566 B ? MEMECC1 567 0 Z
+bit 567 C 0 MEMECC1
+bit 568 B ? MEMECC2 569 0 Z
+bit 569 C 0 MEMECC2
+bit 570 B ? MEMECC3 571 0 Z
+bit 571 C 0 MEMECC3
+bit 572 B ? MEMECC4 573 0 Z
+bit 573 C 0 MEMECC4
+bit 574 O ? MEMRAS_N 575 0 Z
+bit 575 C 0 MEMRAS_N
+bit 576 O ? MEMCAS_N 577 0 Z
+bit 577 C 0 MEMCAS_N
+bit 578 O ? MEMDM8 579 0 Z
+bit 579 C 0 MEMDM8
+bit 580 O ? MEMWE_N 581 0 Z
+bit 581 C 0 MEMWE_N
+bit 582 B ? MEMDQS8 583 0 Z
+bit 583 C 0 MEMDQS8
+bit 584 O ? MEMBSEL3_N 585 0 Z
+bit 585 C 0 MEMBSEL3_N
+bit 586 B ? MEMECC5 587 0 Z
+bit 587 C 0 MEMECC5
+bit 588 B ? MEMECC6 589 0 Z
+bit 589 C 0 MEMECC6
+bit 590 B ? MEMECC7 591 0 Z
+bit 591 C 0 MEMECC7
+bit 592 B ? EBCDATA12 593 0 Z
+bit 593 C 0 EBCDATA12
+bit 594 B ? EBCDATA5 595 0 Z
+bit 595 C 0 EBCDATA5
+bit 596 B ? EBCDATA4 597 0 Z
+bit 597 C 0 EBCDATA4
+bit 598 B ? EBCDATA11 599 0 Z
+bit 599 C 0 EBCDATA11
+bit 600 B ? EBCDATA2 601 0 Z
+bit 601 C 0 EBCDATA2
+bit 602 B ? EBCDATA7 603 0 Z
+bit 603 C 0 EBCDATA7
+bit 604 B ? EBCDATA6 605 0 Z
+bit 605 C 0 EBCDATA6
+bit 606 B ? EBCDATA3 607 0 Z
+bit 607 C 0 EBCDATA3
+bit 608 B ? EBCADR17 609 0 Z
+bit 609 C 0 EBCADR17
+bit 610 B ? EBCDATA0 611 0 Z
+bit 611 C 0 EBCDATA0
+bit 612 B ? EBCDATA1 613 0 Z
+bit 613 C 0 EBCDATA1
+bit 614 B ? EBCADR18 615 0 Z
+bit 615 C 0 EBCADR18
+bit 616 B ? EBCDATA21 617 0 Z
+bit 617 C 0 EBCDATA21
+bit 618 B ? EBCDATA10 619 0 Z
+bit 619 C 0 EBCDATA10
+bit 620 B ? EBCDATA25 621 0 Z
+bit 621 C 0 EBCDATA25
+bit 622 B ? EBCDATA31 623 0 Z
+bit 623 C 0 EBCDATA31
+bit 624 B ? EBCDATA24 625 0 Z
+bit 625 C 0 EBCDATA24
+bit 626 B ? EBCADR19 627 0 Z
+bit 627 C 0 EBCADR19
+bit 628 B ? EBCDATA8 629 0 Z
+bit 629 C 0 EBCDATA8
+bit 630 B ? EBCDATA9 631 0 Z
+bit 631 C 0 EBCDATA9
+bit 632 B ? EBCDATA30 633 0 Z
+bit 633 C 0 EBCDATA30
+bit 634 B ? EBCDATA23 635 0 Z
+bit 635 C 0 EBCDATA23
+bit 636 B ? EBCDATA22 637 0 Z
+bit 637 C 0 EBCDATA22
+bit 638 B ? EBCADR22 639 0 Z
+bit 639 C 0 EBCADR22
+bit 640 B ? EBCDATA20 641 0 Z
+bit 641 C 0 EBCDATA20
+bit 642 B ? EBCDATA29 643 0 Z
+bit 643 C 0 EBCDATA29
+bit 644 B ? EBCADR20 645 0 Z
+bit 645 C 0 EBCADR20
+bit 646 B ? EBCADR23 647 0 Z
+bit 647 C 0 EBCADR23
+bit 648 B ? EBCADR24 649 0 Z
+bit 649 C 0 EBCADR24
+bit 650 B ? EBCADR25 651 0 Z
+bit 651 C 0 EBCADR25
+bit 652 B ? EBCADR26 653 0 Z
+bit 653 C 0 EBCADR26
+bit 654 B ? EBCADR27 655 0 Z
+bit 655 C 0 EBCADR27
+bit 656 B ? EBCADR29 657 0 Z
+bit 657 C 0 EBCADR29
+bit 658 B ? EBCADR30 659 0 Z
+bit 659 C 0 EBCADR30
+bit 660 B ? EBCADR31 661 0 Z
+bit 661 C 0 EBCADR31
+bit 662 B ? EBCPAR0 663 0 Z
+bit 663 C 0 EBCPAR0
+bit 664 B ? EBCPAR1 665 0 Z
+bit 665 C 0 EBCPAR1
+bit 666 B ? EBCPAR2 667 0 Z
+bit 667 C 0 EBCPAR2
+bit 668 B ? EBCPAR3 669 0 Z
+bit 669 C 0 EBCPAR3
+bit 670 B ? EBCBE0_N 671 0 Z
+bit 671 C 0 EBCBE0_N
+bit 672 B ? EBCBE1_N 673 0 Z
+bit 673 C 0 EBCBE1_N
+bit 674 O ? EBCCS3_N 675 0 Z
+bit 675 C 0 EBCCS3_N
+bit 676 B ? EBCBE2_N 677 0 Z
+bit 677 C 0 EBCBE2_N
+bit 678 B ? EBCBE3_N 679 0 Z
+bit 679 C 0 EBCBE3_N
+bit 680 B ? EBCDATA19 681 0 Z
+bit 681 C 0 EBCDATA19
+bit 682 B ? EBCBLAST_N 683 0 Z
+bit 683 C 0 EBCBLAST_N
+bit 684 B ? EBCDATA27 685 0 Z
+bit 685 C 0 EBCDATA27
+bit 686 B ? EBCADR0 687 0 Z
+bit 687 C 0 EBCADR0
+bit 688 B ? EBCDATA18 689 0 Z
+bit 689 C 0 EBCDATA18
+bit 690 B ? EBCDATA17 691 0 Z
+bit 691 C 0 EBCDATA17
+bit 692 B ? EBCADR1 693 0 Z
+bit 693 C 0 EBCADR1
+bit 694 B ? EBCADR2 695 0 Z
+bit 695 C 0 EBCADR2
+bit 696 B ? IIC1SCK_GPIO16 697 0 Z
+bit 697 C 0 IIC1SCK_GPIO16
+bit 698 B ? EBCDATA16 699 0 Z
+bit 699 C 0 EBCDATA16
+bit 700 B ? EBCADR3 701 0 Z
+bit 701 C 0 EBCADR3
+bit 702 B ? EBCADR6 703 0 Z
+bit 703 C 0 EBCADR6
+bit 704 B ? IIC0SCK 705 0 Z
+bit 705 C 0 IIC0SCK
+bit 706 O ? EBCCS6_N 707 0 Z
+bit 707 C 0 EBCCS6_N
+bit 708 B ? IIC0SDATA 709 0 Z
+bit 709 C 0 IIC0SDATA
+bit 710 B ? EBCADR9 711 0 Z
+bit 711 C 0 EBCADR9
+bit 712 B ? EBCADR12 713 0 Z
+bit 713 C 0 EBCADR12
+bit 714 B ? EBCDATA15 715 0 Z
+bit 715 C 0 EBCDATA15
+bit 716 B ? IIC1SDATA_GPIO17 717 0 Z
+bit 717 C 0 IIC1SDATA_GPIO17
+bit 718 B ? EBCADR13 719 0 Z
+bit 719 C 0 EBCADR13
+bit 720 B ? EBCADR14 721 0 Z
+bit 721 C 0 EBCADR14
+bit 722 B ? EBCDATA14 723 0 Z
+bit 723 C 0 EBCDATA14
+bit 724 B ? EBCDATA13 725 0 Z
+bit 725 C 0 EBCDATA13
+bit 726 B ? EBCADR15 727 0 Z
+bit 727 C 0 EBCADR15
+bit 728 B ? EBCDATA26 729 0 Z
+bit 729 C 0 EBCDATA26
+bit 730 B ? EBCADR5 731 0 Z
+bit 731 C 0 EBCADR5
+bit 732 O ? EBCCS0_N 733 0 Z
+bit 733 C 0 EBCCS0_N
+bit 734 B ? EBCADR11 735 0 Z
+bit 735 C 0 EBCADR11
+bit 736 B ? EBCADR4 737 0 Z
+bit 737 C 0 EBCADR4
+bit 738 B ? EBCADR10 739 0 Z
+bit 739 C 0 EBCADR10
+bit 740 B ? EBCADR16 741 0 Z
+bit 741 C 0 EBCADR16
+bit 742 O ? EBCCS5_N 743 0 Z
+bit 743 C 0 EBCCS5_N
+bit 744 O ? EBCCS2_N 745 0 Z
+bit 745 C 0 EBCCS2_N
+bit 746 O ? EBCCS7_N 747 0 Z
+bit 747 C 0 EBCCS7_N
+bit 748 O ? EBCWE_N 749 0 Z
+bit 749 C 0 EBCWE_N
+bit 750 B ? EBCADR8 751 0 Z
+bit 751 C 0 EBCADR8
+bit 752 B ? EBCADR28 753 0 Z
+bit 753 C 0 EBCADR28
+bit 754 B ? EBCRNW 755 0 Z
+bit 755 C 0 EBCRNW
+bit 756 I ? EBCREADY
+bit 757 B ? EBCADR7 758 0 Z
+bit 758 C 0 EBCADR7
+bit 759 B ? EBCADR21 760 0 Z
+bit 760 C 0 EBCADR21
+bit 761 O ? EBCOE_N 762 0 Z
+bit 762 C 0 EBCOE_N
+bit 763 O ? EBCCS4_N 764 0 Z
+bit 764 C 0 EBCCS4_N
+bit 765 B ? EBCDATA28 766 0 Z
+bit 766 C 0 EBCDATA28
+bit 767 O ? EBCCS1_N 768 0 Z
+bit 768 C 0 EBCCS1_N
--- /dev/null
+#
+# $Id$
+#
+# Copyright (C) 2002 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Marcel Telka <marcel@telka.sk>, 2002.
+#
+# Documentation:
+# [1] Intel Corporation, "Intel StrongARM SA-1110 Microprocessor
+# Developer's Manual", October 2001, Order Number: 278240-004
+# [2] Intel Corporation, "Intel XScale Microarchitecture for the PXA250
+# and PXA210 Applications Processors User's Manual", February 2002,
+# Order Number: 278525-001
+#
+
+# bits 27-12 of the Device Identification Register
+1001001001100001 sa1110 SA1110 # see 16.6.2 in [1]
+1001001001100100 pxa250 PXA250 # see 9.4.3 in [2]
+1001001001101100 pxa210 PXA210 # see 9.4.3 in [2]
+1001001001110100 ixp425 IXP425-533MHz # see IXP425 bdsl file from the devel CD
+1001001001110101 ixp425 IXP425-400MHz # see IXP425 bdsl file from the devel CD
+1001001001110111 ixp425 IXP425-266MHz # see IXP425 bdsl file from the devel CD
+1001001001100101 pxa270 PXA270 # see bulbcx.dat from Intel Jflash source code
+
--- /dev/null
+#
+# $Id$
+#
+# Copyright (C) 2002 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Christian Pellegrin <chri@ascensit.com>, 2003.
+#
+
+# bits 31-28 of the Device Identification Register
+0000 ixp425 A0
+0001 ixp425 B0
--- /dev/null
+#
+# $Id$
+#
+# JTAG declarations for IXP425
+# Copyright (C) 2002 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Christian Pellegrin <chri@ascensit.com>, 2003.
+#
+
+signal EX_CS[0] K26
+signal EX_CS[1] L24
+signal EX_CS[2] M22
+signal EX_CS[3] J26
+signal EX_CS[4] K24
+signal EX_CS[5] J25
+signal EX_CS[6] H26
+signal EX_CS[7] K23
+signal EX_WR F22
+signal EX_RD A23
+signal EX_RDY[0] V26
+signal EX_RDY[1] U24
+signal EX_RDY[2] U23
+signal EX_RDY[3] T22
+signal EX_IOWAIT B23
+signal EX_CLK M23
+signal EX_ALE D22
+signal EX_ADDR[0] G1
+signal EX_ADDR[1] H2
+signal EX_ADDR[2] H1
+signal EX_ADDR[3] H6
+signal EX_ADDR[4] J6
+signal EX_ADDR[5] J5
+signal EX_ADDR[6] J3
+signal EX_ADDR[7] J1
+signal EX_ADDR[8] K1
+signal EX_ADDR[9] K2
+signal EX_ADDR[10] K5
+signal EX_ADDR[11] K6
+signal EX_ADDR[12] L1
+signal EX_ADDR[13] L3
+signal EX_ADDR[14] M1
+signal EX_ADDR[15] M3
+signal EX_ADDR[16] N3
+signal EX_ADDR[17] P1
+signal EX_ADDR[18] R1
+signal EX_ADDR[19] P2
+signal EX_ADDR[20] R3
+signal EX_ADDR[21] T4
+signal EX_ADDR[22] R5
+signal EX_ADDR[23] P5
+signal EX_ADDR[24] T5
+signal EX_ADDR[25] P4
+signal EX_DATA[0] N4
+signal EX_DATA[1] M5
+signal EX_DATA[2] L5
+signal EX_DATA[3] T6
+signal EX_DATA[4] N6
+signal EX_DATA[5] T7
+signal EX_DATA[6] M6
+signal EX_DATA[7] M7
+signal EX_DATA[8] M9
+signal EX_DATA[9] T10
+signal EX_DATA[10] R9
+signal EX_DATA[11] T11
+signal EX_DATA[12] P11
+signal EX_DATA[13] N10
+signal EX_DATA[14] T12
+signal EX_DATA[15] M10
+signal EX_DATA[16] H3
+signal EX_DATA[17] H5
+signal EX_DATA[18] J4
+signal EX_DATA[19] K3
+signal EX_DATA[20] L4
+signal EX_DATA[21] M2
+signal EX_DATA[22] N1
+signal EX_DATA[23] T3
+signal EX_DATA[24] P6
+signal EX_DATA[25] R7
+signal EX_DATA[26] P7
+signal EX_DATA[27] P8
+signal EX_DATA[28] L8
+signal EX_DATA[29] P10
+signal EX_DATA[30] R11
+signal EX_DATA[31] P12
+signal GPIO[0] U25
+signal GPIO[1] U22
+signal GPIO[2] V24
+signal GPIO[3] W26
+signal GPIO[4] W25
+signal GPIO[5] Y26
+signal GPIO[6] V22
+signal GPIO[7] W23
+signal GPIO[8] AA26
+signal GPIO[9] V21
+signal GPIO[10] Y24
+signal GPIO[11] AB26
+signal GPIO[12] AA24
+signal GPIO[13] AC26
+signal GPIO[14] W21
+signal GPIO[15] Y22
+
+# mandatory data registers
+register BSR 498 # Boundary Scan Register
+register BR 1 # Bypass Register
+# optional data registers
+register DIR 32 # Device Identification Register
+
+instruction length 7
+# mandatory instructions
+instruction EXTEST 0000000 BSR
+instruction SAMPLE/PRELOAD 0000001 BSR
+instruction BYPASS 1111111 BR
+# optional instructions
+instruction CLAMP 1001001 BR
+instruction HIGHZ 1001010 BR
+instruction IDCODE 1111110 DIR
+
+# boundary scan register
+
+bit 497 C ? .
+bit 496 C ? .
+bit 495 C ? .
+bit 494 C ? .
+bit 493 C ? .
+bit 492 C ? .
+bit 491 C ? .
+bit 490 C ? .
+bit 489 C ? .
+bit 488 C ? .
+bit 487 C ? .
+bit 486 C ? .
+bit 485 C ? .
+bit 484 C ? .
+bit 483 C ? .
+bit 482 C ? .
+bit 481 C ? .
+bit 480 C ? .
+bit 479 C ? .
+bit 478 C ? .
+bit 477 C ? .
+bit 476 C ? .
+bit 475 C ? .
+bit 474 C ? .
+bit 473 C ? .
+bit 472 C ? .
+bit 471 C ? .
+bit 470 C ? .
+bit 469 C ? .
+bit 468 C ? .
+bit 467 C ? .
+bit 466 C ? .
+bit 465 C ? .
+bit 464 C ? .
+bit 463 C ? .
+bit 462 C ? .
+bit 461 C ? .
+bit 460 C ? .
+bit 459 C ? .
+bit 458 C ? .
+bit 457 C ? .
+bit 456 C ? .
+bit 455 C ? .
+bit 454 C ? .
+bit 453 C ? .
+bit 452 C ? .
+bit 451 C ? .
+bit 450 C ? .
+bit 449 C ? .
+bit 448 C ? .
+bit 447 C ? .
+bit 446 C ? .
+bit 445 C ? .
+bit 444 C ? .
+bit 443 C ? .
+bit 442 C ? .
+bit 441 C ? .
+bit 440 C ? .
+bit 439 C ? .
+bit 438 C ? .
+bit 437 C ? .
+bit 436 C ? .
+bit 435 C ? .
+bit 434 C ? .
+bit 433 C ? .
+bit 432 C ? .
+bit 431 C ? .
+bit 430 C ? .
+bit 429 C ? .
+bit 428 C ? .
+bit 427 C ? .
+bit 426 C ? .
+bit 425 C ? .
+bit 424 C ? .
+bit 423 C ? .
+bit 422 C ? .
+bit 421 C ? .
+bit 420 C ? .
+bit 419 C ? .
+bit 418 C ? .
+bit 417 C ? .
+bit 416 C ? .
+bit 415 C ? .
+bit 414 C ? .
+bit 413 C ? .
+bit 412 C ? .
+bit 411 C ? .
+bit 410 C ? .
+bit 409 C ? .
+bit 408 C ? .
+bit 407 C ? .
+bit 406 C ? .
+bit 405 C ? .
+bit 404 C ? .
+bit 403 C ? .
+bit 402 C ? .
+bit 401 C ? .
+bit 400 C ? .
+bit 399 C ? .
+bit 398 C ? .
+bit 397 C ? .
+bit 396 C ? .
+bit 395 C ? .
+bit 394 C ? .
+bit 393 C ? .
+bit 392 C ? .
+bit 391 C ? .
+bit 390 C ? .
+bit 389 C ? .
+bit 388 C ? .
+bit 387 C ? .
+bit 386 C ? .
+bit 385 C ? .
+bit 384 B ? GPIO[1] 369 1 Z
+bit 383 B ? GPIO[2] 368 1 Z
+bit 382 B ? GPIO[3] 367 1 Z
+bit 381 B ? GPIO[4] 366 1 Z
+bit 380 B ? GPIO[5] 365 1 Z
+bit 379 B ? GPIO[6] 364 1 Z
+bit 378 B ? GPIO[7] 363 1 Z
+bit 377 B ? GPIO[8] 362 1 Z
+bit 376 B ? GPIO[9] 361 1 Z
+bit 375 B ? GPIO[10] 360 1 Z
+bit 374 B ? GPIO[11] 359 1 Z
+bit 373 B ? GPIO[12] 358 1 Z
+bit 372 B ? GPIO[13] 357 1 Z
+bit 371 B ? GPIO[14] 356 1 Z
+bit 370 B ? GPIO[15] 355 1 Z
+bit 369 C ? .
+bit 368 C ? .
+bit 367 C ? .
+bit 366 C ? .
+bit 365 C ? .
+bit 364 C ? .
+bit 363 C ? .
+bit 362 C ? .
+bit 361 C ? .
+bit 360 C ? .
+bit 359 C ? .
+bit 358 C ? .
+bit 357 C ? .
+bit 356 C ? .
+bit 355 C ? .
+bit 354 I ? EX_IOWAIT
+bit 353 I ? EX_CLK
+bit 352 O ? EX_ALE 297 1 Z
+bit 351 O ? EX_ADDR[0] 296 1 Z
+bit 350 O ? EX_ADDR[1] 295 1 Z
+bit 349 O ? EX_ADDR[2] 294 1 Z
+bit 348 O ? EX_ADDR[3] 293 1 Z
+bit 347 O ? EX_ADDR[4] 292 1 Z
+bit 346 O ? EX_ADDR[5] 291 1 Z
+bit 345 O ? EX_ADDR[6] 290 1 Z
+bit 344 O ? EX_ADDR[7] 289 1 Z
+bit 343 O ? EX_ADDR[8] 288 1 Z
+bit 342 O ? EX_ADDR[9] 287 1 Z
+bit 341 O ? EX_ADDR[10] 286 1 Z
+bit 340 O ? EX_ADDR[11] 285 1 Z
+bit 339 O ? EX_ADDR[12] 284 1 Z
+bit 338 O ? EX_ADDR[13] 283 1 Z
+bit 337 O ? EX_ADDR[14] 282 1 Z
+bit 336 O ? EX_ADDR[15] 281 1 Z
+bit 335 O ? EX_ADDR[16] 280 1 Z
+bit 334 O ? EX_ADDR[17] 279 1 Z
+bit 333 O ? EX_ADDR[18] 278 1 Z
+bit 332 O ? EX_ADDR[19] 277 1 Z
+bit 331 O ? EX_ADDR[20] 276 1 Z
+bit 330 O ? EX_ADDR[21] 275 1 Z
+bit 329 O ? EX_ADDR[22] 274 1 Z
+bit 328 O ? EX_ADDR[23] 273 1 Z
+bit 327 O ? EX_WR 272 1 Z
+bit 326 O ? EX_RD 271 1 Z
+bit 325 O ? EX_CS[0] 270 1 Z
+bit 324 O ? EX_CS[1] 269 1 Z
+bit 323 O ? EX_CS[2] 268 1 Z
+bit 322 O ? EX_CS[3] 267 1 Z
+bit 321 O ? EX_CS[4] 266 1 Z
+bit 320 O ? EX_CS[5] 265 1 Z
+bit 319 O ? EX_CS[6] 264 1 Z
+bit 318 O ? EX_CS[7] 263 1 Z
+bit 317 B ? EX_DATA[0] 262 1 Z
+bit 316 B ? EX_DATA[1] 261 1 Z
+bit 315 B ? EX_DATA[2] 260 1 Z
+bit 314 B ? EX_DATA[3] 259 1 Z
+bit 313 B ? EX_DATA[4] 258 1 Z
+bit 312 B ? EX_DATA[5] 257 1 Z
+bit 311 B ? EX_DATA[6] 256 1 Z
+bit 310 B ? EX_DATA[7] 255 1 Z
+bit 309 B ? EX_DATA[8] 254 1 Z
+bit 308 B ? EX_DATA[9] 253 1 Z
+bit 307 B ? EX_DATA[10] 252 1 Z
+bit 306 B ? EX_DATA[11] 251 1 Z
+bit 305 B ? EX_DATA[12] 250 1 Z
+bit 304 B ? EX_DATA[13] 249 1 Z
+bit 303 B ? EX_DATA[14] 248 1 Z
+bit 302 B ? EX_DATA[15] 247 1 Z
+bit 301 I ? EX_RDY[0]
+bit 300 I ? EX_RDY[1]
+bit 299 I ? EX_RDY[2]
+bit 298 I ? EX_RDY[3]
+bit 297 C ? .
+bit 296 C ? .
+bit 295 C ? .
+bit 294 C ? .
+bit 293 C ? .
+bit 292 C ? .
+bit 291 C ? .
+bit 290 C ? .
+bit 289 C ? .
+bit 288 C ? .
+bit 287 C ? .
+bit 286 C ? .
+bit 285 C ? .
+bit 284 C ? .
+bit 283 C ? .
+bit 282 C ? .
+bit 281 C ? .
+bit 280 C ? .
+bit 279 C ? .
+bit 278 C ? .
+bit 277 C ? .
+bit 276 C ? .
+bit 275 C ? .
+bit 274 C ? .
+bit 273 C ? .
+bit 272 C ? .
+bit 271 C ? .
+bit 270 C ? .
+bit 269 C ? .
+bit 268 C ? .
+bit 267 C ? .
+bit 266 C ? .
+bit 265 C ? .
+bit 264 C ? .
+bit 263 C ? .
+bit 262 C ? .
+bit 261 C ? .
+bit 260 C ? .
+bit 259 C ? .
+bit 258 C ? .
+bit 257 C ? .
+bit 256 C ? .
+bit 255 C ? .
+bit 254 C ? .
+bit 253 C ? .
+bit 252 C ? .
+bit 251 C ? .
+bit 250 C ? .
+bit 249 C ? .
+bit 248 C ? .
+bit 247 C ? .
+bit 246 C ? .
+bit 245 C ? .
+bit 244 C ? .
+bit 243 C ? .
+bit 242 C ? .
+bit 241 C ? .
+bit 240 C ? .
+bit 239 C ? .
+bit 238 C ? .
+bit 237 C ? .
+bit 236 C ? .
+bit 235 C ? .
+bit 234 C ? .
+bit 233 C ? .
+bit 232 C ? .
+bit 231 C ? .
+bit 230 C ? .
+bit 229 C ? .
+bit 228 C ? .
+bit 227 C ? .
+bit 226 C ? .
+bit 225 C ? .
+bit 224 C ? .
+bit 223 C ? .
+bit 222 C ? .
+bit 221 C ? .
+bit 220 C ? .
+bit 219 C ? .
+bit 218 C ? .
+bit 217 C ? .
+bit 216 C ? .
+bit 215 C ? .
+bit 214 C ? .
+bit 213 C ? .
+bit 212 C ? .
+bit 211 C ? .
+bit 210 C ? .
+bit 209 C ? .
+bit 208 C ? .
+bit 207 C ? .
+bit 206 C ? .
+bit 205 C ? .
+bit 204 C ? .
+bit 203 C ? .
+bit 202 C ? .
+bit 201 C ? .
+bit 200 C ? .
+bit 199 C ? .
+bit 198 C ? .
+bit 197 C ? .
+bit 196 C ? .
+bit 195 C ? .
+bit 194 C ? .
+bit 193 C ? .
+bit 192 C ? .
+bit 191 C ? .
+bit 190 C ? .
+bit 189 C ? .
+bit 188 C ? .
+bit 187 C ? .
+bit 186 C ? .
+bit 185 C ? .
+bit 184 C ? .
+bit 183 C ? .
+bit 182 C ? .
+bit 181 C ? .
+bit 180 C ? .
+bit 179 C ? .
+bit 178 C ? .
+bit 177 C ? .
+bit 176 C ? .
+bit 175 C ? .
+bit 174 C ? .
+bit 173 C ? .
+bit 172 C ? .
+bit 171 C ? .
+bit 170 C ? .
+bit 169 C ? .
+bit 168 C ? .
+bit 167 C ? .
+bit 166 C ? .
+bit 165 C ? .
+bit 164 C ? .
+bit 163 C ? .
+bit 162 C ? .
+bit 161 C ? .
+bit 160 C ? .
+bit 159 C ? .
+bit 158 C ? .
+bit 157 C ? .
+bit 156 C ? .
+bit 155 C ? .
+bit 154 C ? .
+bit 153 C ? .
+bit 152 C ? .
+bit 151 C ? .
+bit 150 C ? .
+bit 149 C ? .
+bit 148 C ? .
+bit 147 C ? .
+bit 146 C ? .
+bit 145 C ? .
+bit 144 C ? .
+bit 143 C ? .
+bit 142 C ? .
+bit 141 C ? .
+bit 140 C ? .
+bit 139 C ? .
+bit 138 C ? .
+bit 137 C ? .
+bit 136 C ? .
+bit 135 C ? .
+bit 134 C ? .
+bit 133 C ? .
+bit 132 C ? .
+bit 131 C ? .
+bit 130 C ? .
+bit 129 C ? .
+bit 128 C ? .
+bit 127 C ? .
+bit 126 C ? .
+bit 125 C ? .
+bit 124 C ? .
+bit 123 C ? .
+bit 122 C ? .
+bit 121 C ? .
+bit 120 C ? .
+bit 119 C ? .
+bit 118 C ? .
+bit 117 C ? .
+bit 116 C ? .
+bit 115 C ? .
+bit 114 C ? .
+bit 113 C ? .
+bit 112 C ? .
+bit 111 C ? .
+bit 110 C ? .
+bit 109 C ? .
+bit 108 C ? .
+bit 107 C ? .
+bit 106 C ? .
+bit 105 C ? .
+bit 104 C ? .
+bit 103 C ? .
+bit 102 C ? .
+bit 101 C ? .
+bit 100 C ? .
+bit 99 C ? .
+bit 98 C ? .
+bit 97 C ? .
+bit 96 C ? .
+bit 95 C ? .
+bit 94 C ? .
+bit 93 C ? .
+bit 92 C ? .
+bit 91 C ? .
+bit 90 C ? .
+bit 89 C ? .
+bit 88 C ? .
+bit 87 C ? .
+bit 86 C ? .
+bit 85 C ? .
+bit 84 C ? .
+bit 83 C ? .
+bit 82 C ? .
+bit 81 C ? .
+bit 80 C ? .
+bit 79 C ? .
+bit 78 C ? .
+bit 77 C ? .
+bit 76 C ? .
+bit 75 C ? .
+bit 74 C ? .
+bit 73 C ? .
+bit 72 C ? .
+bit 71 C ? .
+bit 70 C ? .
+bit 69 C ? .
+bit 68 C ? .
+bit 67 C ? .
+bit 66 C ? .
+bit 65 C ? .
+bit 64 C ? .
+bit 63 C ? .
+bit 62 C ? .
+bit 61 C ? .
+bit 60 C ? .
+bit 59 C ? .
+bit 58 C ? .
+bit 57 C ? .
+bit 56 C ? .
+bit 55 C ? .
+bit 54 C ? .
+bit 53 C ? .
+bit 52 C ? .
+bit 51 C ? .
+bit 50 C ? .
+bit 49 C ? .
+bit 48 C ? .
+bit 47 C ? .
+bit 46 C ? .
+bit 45 C ? .
+bit 44 C ? .
+bit 43 C ? .
+bit 42 C ? .
+bit 41 C ? .
+bit 40 C ? .
+bit 39 C ? .
+bit 38 C ? .
+bit 37 C ? .
+bit 36 C ? .
+bit 35 C ? .
+bit 34 C ? .
+bit 33 C ? .
+bit 32 C ? .
+bit 31 C ? .
+bit 30 C ? .
+bit 29 C ? .
+bit 28 C ? .
+bit 27 C ? .
+bit 26 C ? .
+bit 25 C ? .
+bit 24 C ? .
+bit 23 C ? .
+bit 22 C ? .
+bit 21 C ? .
+bit 20 C ? .
+bit 19 C ? .
+bit 18 C ? .
+bit 17 C ? .
+bit 16 C ? .
+bit 15 C ? .
+bit 14 C ? .
+bit 13 C ? .
+bit 12 C ? .
+bit 11 C ? .
+bit 10 C ? .
+bit 9 C ? .
+bit 8 C ? .
+bit 7 C ? .
+bit 6 C ? .
+bit 5 C ? .
+bit 4 C ? .
+bit 3 C ? .
+bit 2 C ? .
+bit 1 C ? .
+bit 0 C ? .
+
+initbus ixp425
--- /dev/null
+#
+# $Id$
+#
+# Copyright (C) 2002 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Marcel Telka <marcel@telka.sk>, 2002.
+#
+# Documentation:
+# [1] Intel Corporation, "Intel PXA250 and PXA210 Application Processors
+# Specification Update", February 2003, Order Number: 278534-012
+#
+
+# bits 31-28 of the Device Identification Register
+# see D55. in [1]
+0000 pxa250 A0
+0001 pxa250 A1
+0010 pxa250 B0
+0011 pxa250 B1
+0100 pxa250 B2
+0101 pxa250c0 C0
+0110 pxa250c0 PXA255A0
--- /dev/null
+#
+# $Id$
+#
+# JTAG declarations for PXA250
+# Copyright (C) 2002 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Marcel Telka <marcel@telka.sk>, 2002.
+#
+# Documentation:
+# [1] Intel Corporation, "Intel PXA250 and PXA210 Application Processors
+# Design Guide", February 2002, Order Number: 278523-001
+# [2] Intel Corporation, "Intel XScale Microarchitecture for the PXA250
+# and PXA210 Application Processors User's Manual", February 2002,
+# Order Number: 278525-001
+# [3] Intel Corporation, "BSDL description for top level entity pxa250_jtag", 2002-03-06,
+# http://developer.intel.com/design/pca/applicationsprocessors/bsdl/PXA250_bsdl_bga.txt
+# [4] Intel Corporation, "Intel PXA250 and PXA210 Application Processors
+# Specification Update", January 2003, Order Number: 278534-011
+#
+
+# see Table 1-4 in [1] and D29. in [4]
+signal nACRESET D10
+signal nBATT_FAULT K12
+signal BOOT_SEL[0] G16
+signal BOOT_SEL[1] G13
+signal BOOT_SEL[2] F13
+signal nCS[0] N8
+signal DQM[0] M8
+signal DQM[1] B1
+signal DQM[2] B2
+signal DQM[3] L7
+signal GPIO[0] L10
+signal GPIO[1] L12
+signal GPIO[2] L13
+signal GPIO[3] K14
+signal GPIO[4] J12
+signal GPIO[5] J11
+signal GPIO[6] H14
+signal GPIO[7] G15
+signal GPIO[8] F14
+signal GPIO[9] F12
+signal GPIO[10] F7
+signal GPIO[11] A7
+signal GPIO[12] B6
+signal GPIO[13] B5
+signal GPIO[14] B4
+signal GPIO[15] T8
+signal GPIO[16] E12
+signal GPIO[17] D12
+signal GPIO[18] C1
+signal GPIO[19] N14
+signal GPIO[20] N12
+signal GPIO[21] N15
+signal GPIO[22] M12
+signal GPIO[23] F9
+signal GPIO[24] E9
+signal GPIO[25] D9
+signal GPIO[26] A9
+signal GPIO[27] B9
+signal GPIO[28] C9
+signal GPIO[29] E10
+signal GPIO[30] A10
+signal GPIO[31] E11
+signal GPIO[32] A16
+signal GPIO[33] T13
+signal GPIO[34] A13
+signal GPIO[35] A14
+signal GPIO[36] A12
+signal GPIO[37] B11
+signal GPIO[38] B10
+signal GPIO[39] E13
+signal GPIO[40] F10
+signal GPIO[41] F8
+signal GPIO[42] B13
+signal GPIO[43] D13
+signal GPIO[44] A15
+signal GPIO[45] B14
+signal GPIO[46] B15
+signal GPIO[47] C15
+signal GPIO[48] P13
+signal GPIO[49] T14
+signal GPIO[50] T15
+signal GPIO[51] R15
+signal GPIO[52] P14
+signal GPIO[53] R16
+signal GPIO[54] P16
+signal GPIO[55] M13
+signal GPIO[56] N16
+signal GPIO[57] M16
+signal GPIO[58] E7
+signal GPIO[59] D7
+signal GPIO[60] C7
+signal GPIO[61] B7
+signal GPIO[62] E6
+signal GPIO[63] D6
+signal GPIO[64] E5
+signal GPIO[65] A6
+signal GPIO[66] C5
+signal GPIO[67] A5
+signal GPIO[68] D5
+signal GPIO[69] A4
+signal GPIO[70] A3
+signal GPIO[71] A2
+signal GPIO[72] C3
+signal GPIO[73] B3
+signal GPIO[74] E8
+signal GPIO[75] D8
+signal GPIO[76] B8
+signal GPIO[77] A8
+signal GPIO[78] P9
+signal GPIO[79] T9
+signal GPIO[80] R13
+signal MA[0] G1
+signal MA[1] H2
+signal MA[2] H1
+signal MA[3] H6
+signal MA[4] J6
+signal MA[5] J5
+signal MA[6] J3
+signal MA[7] J1
+signal MA[8] K1
+signal MA[9] K2
+signal MA[10] K5
+signal MA[11] K6
+signal MA[12] L1
+signal MA[13] L3
+signal MA[14] M1
+signal MA[15] M3
+signal MA[16] N3
+signal MA[17] P1
+signal MA[18] R1
+signal MA[19] P2
+signal MA[20] R3
+signal MA[21] T4
+signal MA[22] R5
+signal MA[23] P5
+signal MA[24] T5
+signal MA[25] P4
+signal MD[0] N4
+signal MD[1] M5
+signal MD[2] L5
+signal MD[3] T6
+signal MD[4] N6
+signal MD[5] T7
+signal MD[6] M6
+signal MD[7] M7
+signal MD[8] M9
+signal MD[9] T10
+signal MD[10] R9
+signal MD[11] T11
+signal MD[12] P11
+signal MD[13] N10
+signal MD[14] T12
+signal MD[15] M10
+signal MD[16] H3
+signal MD[17] H5
+signal MD[18] J4
+signal MD[19] K3
+signal MD[20] L4
+signal MD[21] M2
+signal MD[22] N1
+signal MD[23] T3
+signal MD[24] P6
+signal MD[25] R7
+signal MD[26] P7
+signal MD[27] P8
+signal MD[28] L8
+signal MD[29] P10
+signal MD[30] R11
+signal MD[31] P12
+signal MMCMD D14
+signal MMDAT B16
+signal nOE G5
+signal PEXTAL K16
+signal PLL_VCC J15
+signal PLL_VSS J16
+signal PWR_EN L11
+signal PXTAL K15
+signal RDnWR D3
+signal nRESET J13
+signal nRESET_OUT K11
+signal SCL D11
+signal SDA A11
+signal nSDCAS F3
+signal SDCKE[0] E4
+signal SDCKE[1] E3
+signal SDCLK[0] D2
+signal SDCLK[1] F5
+signal SDCLK[2] D1
+signal nSDCS[0] F1
+signal nSDCS[1] G6
+signal nSDCS[2] G3
+signal nSDCS[3] F2
+signal nSDRAS E1
+signal TCK H12
+signal TDI H15
+signal TDO H16
+signal TEST G12
+signal TESTCLK G11
+signal TEXTAL L15
+signal TXTAL L16
+signal TMS H13
+signal nTRST H11
+signal USB_N B12
+signal USB_P C12
+signal VCC F11 G7 G9 H10 J7 K8 K10 L6 L9
+signal VCCN A1 D4 F4 H4 K4 M4 M14 N5 N7 N9 N11 N13 P3 T2 T16
+signal VCCQ C6 C10 C13 D15 E14 G14 M11
+signal nVDD_FAULT K13
+signal VSS C16 H8 H9 J8 J9 T1
+signal VSSN C2 E2 G2 J2 L2 M15 N2 P15 R2 R4 R6 R8 R10 R12 R14
+signal VSSQ C4 C8 C11 C14 D16 E15 E16 F6 F15 F16 G8 G10 H7 J10 J14 K7 K9 L14
+signal nWE G4
+
+# mandatory data registers
+register BSR 385 # Boundary Scan Register (see [3])
+register BR 1 # Bypass Register
+# optional data registers
+register DIR 32 # Device Identification Register
+# user defined registers
+register DBG_SR 36 # see 10.10 in [2]
+register LDIC_SR1 33 # see 10.13.2 in [2]
+
+# see 9.3.1 in [2]
+instruction length 5
+# mandatory instructions
+instruction EXTEST 00000 BSR
+instruction SAMPLE/PRELOAD 00001 BSR
+instruction BYPASS 11111 BR
+# optional instructions
+instruction CLAMP 00100 BR
+instruction HIGHZ 01000 BR
+instruction IDCODE 11110 DIR
+# user-defined instructions
+instruction DBGRX 00010 DBG_SR
+instruction LDIC 00111 LDIC_SR1
+instruction SELDCSR 01001 DBG_SR # see 10.10.1 in [2]
+instruction DBGTX 10000 DBG_SR
+
+# see [3]
+bit 384 I ? nRESET
+bit 383 I ? BOOT_SEL[2]
+bit 382 I ? BOOT_SEL[1]
+bit 381 I ? BOOT_SEL[0]
+bit 380 I ? nBATT_FAULT
+bit 379 I ? nVDD_FAULT
+bit 378 I ? TESTCLK
+bit 377 I ? TEST
+bit 376 X ? .
+bit 375 I ? MD[31]
+bit 374 I ? MD[30]
+bit 373 I ? MD[29]
+bit 372 I ? MD[28]
+bit 371 I ? MD[27]
+bit 370 I ? MD[26]
+bit 369 I ? MD[25]
+bit 368 I ? MD[24]
+bit 367 I ? MD[23]
+bit 366 I ? MD[22]
+bit 365 I ? MD[21]
+bit 364 I ? MD[20]
+bit 363 I ? MD[19]
+bit 362 I ? MD[18]
+bit 361 I ? MD[17]
+bit 360 I ? MD[16]
+bit 359 I ? MD[15]
+bit 358 I ? MD[14]
+bit 357 I ? MD[13]
+bit 356 I ? MD[12]
+bit 355 I ? MD[11]
+bit 354 I ? MD[10]
+bit 353 I ? MD[9]
+bit 352 I ? MD[8]
+bit 351 I ? MD[7]
+bit 350 I ? MD[6]
+bit 349 I ? MD[5]
+bit 348 I ? MD[4]
+bit 347 I ? MD[3]
+bit 346 I ? MD[2]
+bit 345 I ? MD[1]
+bit 344 I ? MD[0]
+bit 343 I ? MMCMD
+bit 342 I ? MMDAT
+bit 341 I ? USB_P
+bit 340 I ? USB_N
+bit 339 I ? SDA
+bit 338 I ? SCL
+bit 337 I ? GPIO[80]
+bit 336 I ? GPIO[79]
+bit 335 I ? GPIO[78]
+bit 334 I ? GPIO[77]
+bit 333 I ? GPIO[76]
+bit 332 I ? GPIO[75]
+bit 331 I ? GPIO[74]
+bit 330 I ? GPIO[73]
+bit 329 I ? GPIO[72]
+bit 328 I ? GPIO[71]
+bit 327 I ? GPIO[70]
+bit 326 I ? GPIO[69]
+bit 325 I ? GPIO[68]
+bit 324 I ? GPIO[67]
+bit 323 I ? GPIO[66]
+bit 322 I ? GPIO[65]
+bit 321 I ? GPIO[64]
+bit 320 I ? GPIO[63]
+bit 319 I ? GPIO[62]
+bit 318 I ? GPIO[61]
+bit 317 I ? GPIO[60]
+bit 316 I ? GPIO[59]
+bit 315 I ? GPIO[58]
+bit 314 I ? GPIO[57]
+bit 313 I ? GPIO[56]
+bit 312 I ? GPIO[55]
+bit 311 I ? GPIO[54]
+bit 310 I ? GPIO[53]
+bit 309 I ? GPIO[52]
+bit 308 I ? GPIO[51]
+bit 307 I ? GPIO[50]
+bit 306 I ? GPIO[49]
+bit 305 I ? GPIO[48]
+bit 304 I ? GPIO[47]
+bit 303 I ? GPIO[46]
+bit 302 I ? GPIO[45]
+bit 301 I ? GPIO[44]
+bit 300 I ? GPIO[43]
+bit 299 I ? GPIO[42]
+bit 298 I ? GPIO[41]
+bit 297 I ? GPIO[40]
+bit 296 I ? GPIO[39]
+bit 295 I ? GPIO[38]
+bit 294 I ? GPIO[37]
+bit 293 I ? GPIO[36]
+bit 292 I ? GPIO[35]
+bit 291 I ? GPIO[34]
+bit 290 I ? GPIO[33]
+bit 289 I ? GPIO[32]
+bit 288 I ? GPIO[31]
+bit 287 I ? GPIO[30]
+bit 286 I ? GPIO[29]
+bit 285 I ? GPIO[28]
+bit 284 I ? GPIO[27]
+bit 283 I ? GPIO[26]
+bit 282 I ? GPIO[25]
+bit 281 I ? GPIO[24]
+bit 280 I ? GPIO[23]
+bit 279 I ? GPIO[22]
+bit 278 I ? GPIO[21]
+bit 277 I ? GPIO[20]
+bit 276 I ? GPIO[19]
+bit 275 I ? GPIO[18]
+bit 274 I ? GPIO[17]
+bit 273 I ? GPIO[16]
+bit 272 I ? GPIO[15]
+bit 271 I ? GPIO[14]
+bit 270 I ? GPIO[13]
+bit 269 I ? GPIO[12]
+bit 268 I ? GPIO[11]
+bit 267 I ? GPIO[10]
+bit 266 I ? GPIO[9]
+bit 265 I ? GPIO[8]
+bit 264 I ? GPIO[7]
+bit 263 I ? GPIO[6]
+bit 262 I ? GPIO[5]
+bit 261 I ? GPIO[4]
+bit 260 I ? GPIO[3]
+bit 259 I ? GPIO[2]
+bit 258 I ? GPIO[1]
+bit 257 I ? GPIO[0]
+bit 256 O ? MA[25] 208 0 Z
+bit 255 O ? MA[24] 208 0 Z
+bit 254 O ? MA[23] 208 0 Z
+bit 253 O ? MA[22] 208 0 Z
+bit 252 O ? MA[21] 208 0 Z
+bit 251 O ? MA[20] 208 0 Z
+bit 250 O ? MA[19] 208 0 Z
+bit 249 O ? MA[18] 208 0 Z
+bit 248 O ? MA[17] 208 0 Z
+bit 247 O ? MA[16] 208 0 Z
+bit 246 O ? MA[15] 208 0 Z
+bit 245 O ? MA[14] 208 0 Z
+bit 244 O ? MA[13] 208 0 Z
+bit 243 O ? MA[12] 208 0 Z
+bit 242 O ? MA[11] 208 0 Z
+bit 241 O ? MA[10] 208 0 Z
+bit 240 O ? MA[9] 208 0 Z
+bit 239 O ? MA[8] 208 0 Z
+bit 238 O ? MA[7] 208 0 Z
+bit 237 O ? MA[6] 208 0 Z
+bit 236 O ? MA[5] 208 0 Z
+bit 235 O ? MA[4] 208 0 Z
+bit 234 O ? MA[3] 208 0 Z
+bit 233 O ? MA[2] 208 0 Z
+bit 232 O ? MA[1] 208 0 Z
+bit 231 O ? MA[0] 208 0 Z
+bit 230 O ? nCS[0] 206 0 Z
+bit 229 O ? nOE 207 0 Z
+bit 228 O ? nWE 207 0 Z
+bit 227 O ? nSDRAS 208 0 Z
+bit 226 O ? nSDCAS 208 0 Z
+bit 225 O ? DQM[3] 205 0 Z
+bit 224 O ? DQM[2] 205 0 Z
+bit 223 O ? DQM[1] 208 0 Z
+bit 222 O ? DQM[0] 208 0 Z
+bit 221 O ? nSDCS[3]
+bit 220 O ? nSDCS[2]
+bit 219 O ? nSDCS[1]
+bit 218 O ? nSDCS[0] 208 0 Z
+bit 217 O ? SDCKE[1]
+bit 216 O ? SDCKE[0]
+bit 215 O ? SDCLK[2]
+bit 214 O ? SDCLK[1] 208 0 Z
+bit 213 O ? SDCLK[0]
+bit 212 O ? RDnWR 205 0 Z
+bit 211 O ? nACRESET
+bit 210 O ? nRESET_OUT
+bit 209 O ? PWR_EN
+bit 208 C ? .
+bit 207 C ? .
+bit 206 C ? .
+bit 205 C ? .
+bit 204 O ? MD[31] 84 0 Z
+bit 203 O ? MD[30] 84 0 Z
+bit 202 O ? MD[29] 84 0 Z
+bit 201 O ? MD[28] 84 0 Z
+bit 200 O ? MD[27] 84 0 Z
+bit 199 O ? MD[26] 84 0 Z
+bit 198 O ? MD[25] 84 0 Z
+bit 197 O ? MD[24] 84 0 Z
+bit 196 O ? MD[23] 84 0 Z
+bit 195 O ? MD[22] 84 0 Z
+bit 194 O ? MD[21] 84 0 Z
+bit 193 O ? MD[20] 84 0 Z
+bit 192 O ? MD[19] 84 0 Z
+bit 191 O ? MD[18] 84 0 Z
+bit 190 O ? MD[17] 84 0 Z
+bit 189 O ? MD[16] 84 0 Z
+bit 188 O ? MD[15] 85 0 Z
+bit 187 O ? MD[14] 85 0 Z
+bit 186 O ? MD[13] 85 0 Z
+bit 185 O ? MD[12] 85 0 Z
+bit 184 O ? MD[11] 85 0 Z
+bit 183 O ? MD[10] 85 0 Z
+bit 182 O ? MD[9] 85 0 Z
+bit 181 O ? MD[8] 85 0 Z
+bit 180 O ? MD[7] 85 0 Z
+bit 179 O ? MD[6] 85 0 Z
+bit 178 O ? MD[5] 85 0 Z
+bit 177 O ? MD[4] 85 0 Z
+bit 176 O ? MD[3] 85 0 Z
+bit 175 O ? MD[2] 85 0 Z
+bit 174 O ? MD[1] 85 0 Z
+bit 173 O ? MD[0] 85 0 Z
+bit 172 O ? MMCMD 83 0 Z
+bit 171 O ? MMDAT 82 0 Z
+bit 170 O ? USB_P 81 0 Z
+bit 169 O ? USB_N 81 0 Z
+bit 168 O ? SDA # FIXME: see WEAK1 in [3]
+bit 167 O ? SCL # FIXME: see WEAK1 in [3]
+bit 166 O ? GPIO[80] 80 0 Z
+bit 165 O ? GPIO[79] 79 0 Z
+bit 164 O ? GPIO[78] 78 0 Z
+bit 163 O ? GPIO[77] 77 0 Z
+bit 162 O ? GPIO[76] 76 0 Z
+bit 161 O ? GPIO[75] 75 0 Z
+bit 160 O ? GPIO[74] 74 0 Z
+bit 159 O ? GPIO[73] 73 0 Z
+bit 158 O ? GPIO[72] 72 0 Z
+bit 157 O ? GPIO[71] 71 0 Z
+bit 156 O ? GPIO[70] 70 0 Z
+bit 155 O ? GPIO[69] 69 0 Z
+bit 154 O ? GPIO[68] 68 0 Z
+bit 153 O ? GPIO[67] 67 0 Z
+bit 152 O ? GPIO[66] 66 0 Z
+bit 151 O ? GPIO[65] 65 0 Z
+bit 150 O ? GPIO[64] 64 0 Z
+bit 149 O ? GPIO[63] 63 0 Z
+bit 148 O ? GPIO[62] 62 0 Z
+bit 147 O ? GPIO[61] 61 0 Z
+bit 146 O ? GPIO[60] 60 0 Z
+bit 145 O ? GPIO[59] 59 0 Z
+bit 144 O ? GPIO[58] 58 0 Z
+bit 143 O ? GPIO[57] 57 0 Z
+bit 142 O ? GPIO[56] 56 0 Z
+bit 141 O ? GPIO[55] 55 0 Z
+bit 140 O ? GPIO[54] 54 0 Z
+bit 139 O ? GPIO[53] 53 0 Z
+bit 138 O ? GPIO[52] 52 0 Z
+bit 137 O ? GPIO[51] 51 0 Z
+bit 136 O ? GPIO[50] 50 0 Z
+bit 135 O ? GPIO[49] 49 0 Z
+bit 134 O ? GPIO[48] 48 0 Z
+bit 133 O ? GPIO[47] 47 0 Z
+bit 132 O ? GPIO[46] 46 0 Z
+bit 131 O ? GPIO[45] 45 0 Z
+bit 130 O ? GPIO[44] 44 0 Z
+bit 129 O ? GPIO[43] 43 0 Z
+bit 128 O ? GPIO[42] 42 0 Z
+bit 127 O ? GPIO[41] 41 0 Z
+bit 126 O ? GPIO[40] 40 0 Z
+bit 125 O ? GPIO[39] 39 0 Z
+bit 124 O ? GPIO[38] 38 0 Z
+bit 123 O ? GPIO[37] 37 0 Z
+bit 122 O ? GPIO[36] 36 0 Z
+bit 121 O ? GPIO[35] 35 0 Z
+bit 120 O ? GPIO[34] 34 0 Z
+bit 119 O ? GPIO[33] 33 0 Z
+bit 118 O ? GPIO[32] 32 0 Z
+bit 117 O ? GPIO[31] 31 0 Z
+bit 116 O ? GPIO[30] 30 0 Z
+bit 115 O ? GPIO[29] 29 0 Z
+bit 114 O ? GPIO[28] 28 0 Z
+bit 113 O ? GPIO[27] 27 0 Z
+bit 112 O ? GPIO[26] 26 0 Z
+bit 111 O ? GPIO[25] 25 0 Z
+bit 110 O ? GPIO[24] 24 0 Z
+bit 109 O ? GPIO[23] 23 0 Z
+bit 108 O ? GPIO[22] 22 0 Z
+bit 107 O ? GPIO[21] 21 0 Z
+bit 106 O ? GPIO[20] 20 0 Z
+bit 105 O ? GPIO[19] 19 0 Z
+bit 104 O ? GPIO[18] 18 0 Z
+bit 103 O ? GPIO[17] 17 0 Z
+bit 102 O ? GPIO[16] 16 0 Z
+bit 101 O ? GPIO[15] 15 0 Z
+bit 100 O ? GPIO[14] 14 0 Z
+bit 99 O ? GPIO[13] 13 0 Z
+bit 98 O ? GPIO[12] 12 0 Z
+bit 97 O ? GPIO[11] 11 0 Z
+bit 96 O ? GPIO[10] 10 0 Z
+bit 95 O ? GPIO[9] 9 0 Z
+bit 94 O ? GPIO[8] 8 0 Z
+bit 93 O ? GPIO[7] 7 0 Z
+bit 92 O ? GPIO[6] 6 0 Z
+bit 91 O ? GPIO[5] 5 0 Z
+bit 90 O ? GPIO[4] 4 0 Z
+bit 89 O ? GPIO[3] 3 0 Z
+bit 88 O ? GPIO[2] 2 0 Z
+bit 87 O ? GPIO[1] 1 0 Z
+bit 86 O ? GPIO[0] 0 0 Z
+bit 85 C ? .
+bit 84 C ? .
+bit 83 C ? .
+bit 82 C ? .
+bit 81 C ? .
+bit 80 C ? .
+bit 79 C ? .
+bit 78 C ? .
+bit 77 C ? .
+bit 76 C ? .
+bit 75 C ? .
+bit 74 C ? .
+bit 73 C ? .
+bit 72 C ? .
+bit 71 C ? .
+bit 70 C ? .
+bit 69 C ? .
+bit 68 C ? .
+bit 67 C ? .
+bit 66 C ? .
+bit 65 C ? .
+bit 64 C ? .
+bit 63 C ? .
+bit 62 C ? .
+bit 61 C ? .
+bit 60 C ? .
+bit 59 C ? .
+bit 58 C ? .
+bit 57 C ? .
+bit 56 C ? .
+bit 55 C ? .
+bit 54 C ? .
+bit 53 C ? .
+bit 52 C ? .
+bit 51 C ? .
+bit 50 C ? .
+bit 49 C ? .
+bit 48 C ? .
+bit 47 C ? .
+bit 46 C ? .
+bit 45 C ? .
+bit 44 C ? .
+bit 43 C ? .
+bit 42 C ? .
+bit 41 C ? .
+bit 40 C ? .
+bit 39 C ? .
+bit 38 C ? .
+bit 37 C ? .
+bit 36 C ? .
+bit 35 C ? .
+bit 34 C ? .
+bit 33 C ? .
+bit 32 C ? .
+bit 31 C ? .
+bit 30 C ? .
+bit 29 C ? .
+bit 28 C ? .
+bit 27 C ? .
+bit 26 C ? .
+bit 25 C ? .
+bit 24 C ? .
+bit 23 C ? .
+bit 22 C ? .
+bit 21 C ? .
+bit 20 C ? .
+bit 19 C ? .
+bit 18 C ? .
+bit 17 C ? .
+bit 16 C ? .
+bit 15 C ? .
+bit 14 C ? .
+bit 13 C ? .
+bit 12 C ? .
+bit 11 C ? .
+bit 10 C ? .
+bit 9 C ? .
+bit 8 C ? .
+bit 7 C ? .
+bit 6 C ? .
+bit 5 C ? .
+bit 4 C ? .
+bit 3 C ? .
+bit 2 C ? .
+bit 1 C ? .
+bit 0 C ? .
+
+initbus pxa2x0
--- /dev/null
+#
+# $Id$
+#
+# JTAG declarations for PXA250C0
+# Copyright (C) 2002 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Marcel Telka <marcel@telka.sk>, 2002.
+#
+# Documentation:
+# [1] Intel Corporation, "Intel PXA250 and PXA210 Application Processors
+# Design Guide", February 2002, Order Number: 278523-001
+# [2] Intel Corporation, "Intel XScale Microarchitecture for the PXA250
+# and PXA210 Application Processors User's Manual", February 2002,
+# Order Number: 278525-001
+# [3] Intel Corporation, "BSDL Description for Top-Level Entity pxa26x_jtag_B0 Revision: C0 v1_6",
+# http://developer.intel.com/design/pca/applicationsprocessors/bsdl/PXA26x_bsdl_B0_v1_6.bsdl
+# [4] Intel Corporation, "Intel PXA250 and PXA210 Application Processors
+# Specification Update", January 2003, Order Number: 278534-011
+# [5] Intel Corporation, "Intel PXA26x Processor Family Developer's Manual",
+# October 2002, Order Number: 278638-001
+#
+
+# see Table 1-4 in [1] and D29. in [4]
+signal nACRESET D10
+signal nBATT_FAULT K12
+signal BOOT_SEL[0] G16
+signal BOOT_SEL[1] G13
+signal BOOT_SEL[2] F13
+signal nCS[0] N8
+signal DQM[0] M8
+signal DQM[1] B1
+signal DQM[2] B2
+signal DQM[3] L7
+signal GPIO[0] L10
+signal GPIO[1] L12
+signal GPIO[2] L13
+signal GPIO[3] K14
+signal GPIO[4] J12
+signal GPIO[5] J11
+signal GPIO[6] H14
+signal GPIO[7] G15
+signal GPIO[8] F14
+signal GPIO[9] F12
+signal GPIO[10] F7
+signal GPIO[11] A7
+signal GPIO[12] B6
+signal GPIO[13] B5
+signal GPIO[14] B4
+signal GPIO[15] T8
+signal GPIO[16] E12
+signal GPIO[17] D12
+signal GPIO[18] C1
+signal GPIO[19] N14
+signal GPIO[20] N12
+signal GPIO[21] N15
+signal GPIO[22] M12
+signal GPIO[23] F9
+signal GPIO[24] E9
+signal GPIO[25] D9
+signal GPIO[26] A9
+signal GPIO[27] B9
+signal GPIO[28] C9
+signal GPIO[29] E10
+signal GPIO[30] A10
+signal GPIO[31] E11
+signal GPIO[32] A16
+signal GPIO[33] T13
+signal GPIO[34] A13
+signal GPIO[35] A14
+signal GPIO[36] A12
+signal GPIO[37] B11
+signal GPIO[38] B10
+signal GPIO[39] E13
+signal GPIO[40] F10
+signal GPIO[41] F8
+signal GPIO[42] B13
+signal GPIO[43] D13
+signal GPIO[44] A15
+signal GPIO[45] B14
+signal GPIO[46] B15
+signal GPIO[47] C15
+signal GPIO[48] P13
+signal GPIO[49] T14
+signal GPIO[50] T15
+signal GPIO[51] R15
+signal GPIO[52] P14
+signal GPIO[53] R16
+signal GPIO[54] P16
+signal GPIO[55] M13
+signal GPIO[56] N16
+signal GPIO[57] M16
+signal GPIO[58] E7
+signal GPIO[59] D7
+signal GPIO[60] C7
+signal GPIO[61] B7
+signal GPIO[62] E6
+signal GPIO[63] D6
+signal GPIO[64] E5
+signal GPIO[65] A6
+signal GPIO[66] C5
+signal GPIO[67] A5
+signal GPIO[68] D5
+signal GPIO[69] A4
+signal GPIO[70] A3
+signal GPIO[71] A2
+signal GPIO[72] C3
+signal GPIO[73] B3
+signal GPIO[74] E8
+signal GPIO[75] D8
+signal GPIO[76] B8
+signal GPIO[77] A8
+signal GPIO[78] P9
+signal GPIO[79] T9
+signal GPIO[80] R13
+signal MA[0] G1
+signal MA[1] H2
+signal MA[2] H1
+signal MA[3] H6
+signal MA[4] J6
+signal MA[5] J5
+signal MA[6] J3
+signal MA[7] J1
+signal MA[8] K1
+signal MA[9] K2
+signal MA[10] K5
+signal MA[11] K6
+signal MA[12] L1
+signal MA[13] L3
+signal MA[14] M1
+signal MA[15] M3
+signal MA[16] N3
+signal MA[17] P1
+signal MA[18] R1
+signal MA[19] P2
+signal MA[20] R3
+signal MA[21] T4
+signal MA[22] R5
+signal MA[23] P5
+signal MA[24] T5
+signal MA[25] P4
+signal MD[0] N4
+signal MD[1] M5
+signal MD[2] L5
+signal MD[3] T6
+signal MD[4] N6
+signal MD[5] T7
+signal MD[6] M6
+signal MD[7] M7
+signal MD[8] M9
+signal MD[9] T10
+signal MD[10] R9
+signal MD[11] T11
+signal MD[12] P11
+signal MD[13] N10
+signal MD[14] T12
+signal MD[15] M10
+signal MD[16] H3
+signal MD[17] H5
+signal MD[18] J4
+signal MD[19] K3
+signal MD[20] L4
+signal MD[21] M2
+signal MD[22] N1
+signal MD[23] T3
+signal MD[24] P6
+signal MD[25] R7
+signal MD[26] P7
+signal MD[27] P8
+signal MD[28] L8
+signal MD[29] P10
+signal MD[30] R11
+signal MD[31] P12
+signal MMCMD D14
+signal MMDAT B16
+signal nOE G5
+signal PEXTAL K16
+signal PLL_VCC J15
+signal PLL_VSS J16
+signal PWR_EN L11
+signal PXTAL K15
+signal RDnWR D3
+signal nRESET J13
+signal nRESET_OUT K11
+signal SCL D11
+signal SDA A11
+signal nSDCAS F3
+signal SDCKE[0] E4
+signal SDCKE[1] E3
+signal SDCLK[0] D2
+signal SDCLK[1] F5
+signal SDCLK[2] D1
+signal nSDCS[0] F1
+signal nSDCS[1] G6
+signal nSDCS[2] G3
+signal nSDCS[3] F2
+signal nSDRAS E1
+signal TCK H12
+signal TDI H15
+signal TDO H16
+signal TEST G12
+signal TESTCLK G11
+signal TEXTAL L15
+signal TXTAL L16
+signal TMS H13
+signal nTRST H11
+signal USB_N B12
+signal USB_P C12
+signal VCC F11 G7 G9 H10 J7 K8 K10 L6 L9
+signal VCCN A1 D4 F4 H4 K4 M4 M14 N5 N7 N9 N11 N13 P3 T2 T16
+signal VCCQ C6 C10 C13 D15 E14 G14 M11
+signal nVDD_FAULT K13
+signal VSS C16 H8 H9 J8 J9 T1
+signal VSSN C2 E2 G2 J2 L2 M15 N2 P15 R2 R4 R6 R8 R10 R12 R14
+signal VSSQ C4 C8 C11 C14 D16 E15 E16 F6 F15 F16 G8 G10 H7 J10 J14 K7 K9 L14
+signal nWE G4
+
+# mandatory data registers
+register BSR 410 # Boundary Scan Register (see [3])
+register BR 1 # Bypass Register
+# optional data registers
+register DIR 32 # Device Identification Register
+# user defined registers
+register DBG_SR 36 # see 10.10 in [2]
+register LDIC_SR1 33 # see 10.13.2 in [2]
+
+# see 9.3.1 in [2]
+instruction length 5
+# mandatory instructions
+instruction EXTEST 00000 BSR
+instruction SAMPLE/PRELOAD 00001 BSR
+instruction BYPASS 11111 BR
+# optional instructions
+instruction CLAMP 00100 BR
+instruction HIGHZ 01000 BR
+instruction IDCODE 11110 DIR
+# user-defined instructions
+instruction DBGRX 00010 DBG_SR
+instruction LDIC 00111 LDIC_SR1
+instruction SELDCSR 01001 DBG_SR # see 10.10.1 in [2]
+instruction DBGTX 10000 DBG_SR
+
+# see [3]
+bit 409 I ? nRESET
+bit 408 I ? BOOT_SEL[2]
+bit 407 I ? BOOT_SEL[1]
+bit 406 I ? BOOT_SEL[0]
+bit 405 I ? nBATT_FAULT
+bit 404 I ? nVDD_FAULT
+bit 403 I ? TESTCLK
+bit 402 I ? TEST
+bit 401 X ? .
+bit 400 I ? MD[31]
+bit 399 I ? MD[30]
+bit 398 I ? MD[29]
+bit 397 I ? MD[28]
+bit 396 I ? MD[27]
+bit 395 I ? MD[26]
+bit 394 I ? MD[25]
+bit 393 I ? MD[24]
+bit 392 I ? MD[23]
+bit 391 I ? MD[22]
+bit 390 I ? MD[21]
+bit 389 I ? MD[20]
+bit 388 I ? MD[19]
+bit 387 I ? MD[18]
+bit 386 I ? MD[17]
+bit 385 I ? MD[16]
+bit 384 I ? MD[15]
+bit 383 I ? MD[14]
+bit 382 I ? MD[13]
+bit 381 I ? MD[12]
+bit 380 I ? MD[11]
+bit 379 I ? MD[10]
+bit 378 I ? MD[9]
+bit 377 I ? MD[8]
+bit 376 I ? MD[7]
+bit 375 I ? MD[6]
+bit 374 I ? MD[5]
+bit 373 I ? MD[4]
+bit 372 I ? MD[3]
+bit 371 I ? MD[2]
+bit 370 I ? MD[1]
+bit 369 I ? MD[0]
+bit 368 I ? MMCMD
+bit 367 I ? MMDAT
+bit 366 I ? USB_P
+bit 365 I ? USB_N
+bit 364 I ? SDA
+bit 363 I ? SCL
+bit 362 I ? nACRESET # see Table 2-7. in [5]
+bit 361 I ? RDnWR # see Table 2-7. in [5]
+bit 360 I ? nSDCS[3] # see Table 2-7. in [5]
+bit 359 I ? nSDCS[2] # see Table 2-7. in [5]
+bit 358 I ? GPIO[85]
+bit 357 I ? GPIO[84]
+bit 356 I ? GPIO[83]
+bit 355 I ? GPIO[82]
+bit 354 I ? GPIO[81]
+bit 353 I ? GPIO[80]
+bit 352 I ? GPIO[79]
+bit 351 I ? GPIO[78]
+bit 350 I ? GPIO[77]
+bit 349 I ? GPIO[76]
+bit 348 I ? GPIO[75]
+bit 347 I ? GPIO[74]
+bit 346 I ? GPIO[73]
+bit 345 I ? GPIO[72]
+bit 344 I ? GPIO[71]
+bit 343 I ? GPIO[70]
+bit 342 I ? GPIO[69]
+bit 341 I ? GPIO[68]
+bit 340 I ? GPIO[67]
+bit 339 I ? GPIO[66]
+bit 338 I ? GPIO[65]
+bit 337 I ? GPIO[64]
+bit 336 I ? GPIO[63]
+bit 335 I ? GPIO[62]
+bit 334 I ? GPIO[61]
+bit 333 I ? GPIO[60]
+bit 332 I ? GPIO[59]
+bit 331 I ? GPIO[58]
+bit 330 I ? GPIO[57]
+bit 329 I ? GPIO[56]
+bit 328 I ? GPIO[55]
+bit 327 I ? GPIO[54]
+bit 326 I ? GPIO[53]
+bit 325 I ? GPIO[52]
+bit 324 I ? GPIO[51]
+bit 323 I ? GPIO[50]
+bit 322 I ? GPIO[49]
+bit 321 I ? GPIO[48]
+bit 320 I ? GPIO[47]
+bit 319 I ? GPIO[46]
+bit 318 I ? GPIO[45]
+bit 317 I ? GPIO[44]
+bit 316 I ? GPIO[43]
+bit 315 I ? GPIO[42]
+bit 314 I ? GPIO[41]
+bit 313 I ? GPIO[40]
+bit 312 I ? GPIO[39]
+bit 311 I ? GPIO[38]
+bit 310 I ? GPIO[37]
+bit 309 I ? GPIO[36]
+bit 308 I ? GPIO[35]
+bit 307 I ? GPIO[34]
+bit 306 I ? GPIO[33]
+bit 305 I ? GPIO[32]
+bit 304 I ? GPIO[31]
+bit 303 I ? GPIO[30]
+bit 302 I ? GPIO[29]
+bit 301 I ? GPIO[28]
+bit 300 I ? GPIO[27]
+bit 299 I ? GPIO[26]
+bit 298 I ? GPIO[25]
+bit 297 I ? GPIO[24]
+bit 296 I ? GPIO[23]
+bit 295 I ? GPIO[22]
+bit 294 I ? GPIO[21]
+bit 293 I ? GPIO[20]
+bit 292 I ? GPIO[19]
+bit 291 I ? GPIO[18]
+bit 290 I ? GPIO[17]
+bit 289 I ? GPIO[16]
+bit 288 I ? GPIO[15]
+bit 287 I ? GPIO[14]
+bit 286 I ? GPIO[13]
+bit 285 I ? GPIO[12]
+bit 284 I ? GPIO[11]
+bit 283 I ? GPIO[10]
+bit 282 I ? GPIO[9]
+bit 281 I ? GPIO[8]
+bit 280 I ? GPIO[7]
+bit 279 I ? GPIO[6]
+bit 278 I ? GPIO[5]
+bit 277 I ? GPIO[4]
+bit 276 I ? GPIO[3]
+bit 275 I ? GPIO[2]
+bit 274 I ? GPIO[1]
+bit 273 I ? GPIO[0]
+bit 272 O ? MA[25] 226 0 Z
+bit 271 O ? MA[24] 226 0 Z
+bit 270 O ? MA[23] 226 0 Z
+bit 269 O ? MA[22] 226 0 Z
+bit 268 O ? MA[21] 226 0 Z
+bit 267 O ? MA[20] 226 0 Z
+bit 266 O ? MA[19] 226 0 Z
+bit 265 O ? MA[18] 226 0 Z
+bit 264 O ? MA[17] 226 0 Z
+bit 263 O ? MA[16] 226 0 Z
+bit 262 O ? MA[15] 226 0 Z
+bit 261 O ? MA[14] 226 0 Z
+bit 260 O ? MA[13] 226 0 Z
+bit 259 O ? MA[12] 226 0 Z
+bit 258 O ? MA[11] 226 0 Z
+bit 257 O ? MA[10] 226 0 Z
+bit 256 O ? MA[9] 226 0 Z
+bit 255 O ? MA[8] 226 0 Z
+bit 254 O ? MA[7] 226 0 Z
+bit 253 O ? MA[6] 226 0 Z
+bit 252 O ? MA[5] 226 0 Z
+bit 251 O ? MA[4] 226 0 Z
+bit 250 O ? MA[3] 226 0 Z
+bit 249 O ? MA[2] 226 0 Z
+bit 248 O ? MA[1] 226 0 Z
+bit 247 O ? MA[0] 226 0 Z
+bit 246 O ? nCS[0] 224 0 Z
+bit 245 O ? nOE 225 0 Z
+bit 244 O ? nWE 225 0 Z
+bit 243 O ? nSDRAS 226 0 Z
+bit 242 O ? nSDCAS 226 0 Z
+bit 241 O ? DQM[3] 223 0 Z
+bit 240 O ? DQM[2] 223 0 Z
+bit 239 O ? DQM[1] 226 0 Z
+bit 238 O ? DQM[0] 226 0 Z
+bit 237 C ? .
+bit 236 C ? .
+bit 235 O ? nSDCS[1]
+bit 234 O ? nSDCS[0] 226 0 Z
+bit 233 O ? SDCKE[1]
+bit 232 O ? SDCKE[0]
+bit 231 O ? SDCLK[2]
+bit 230 O ? SDCLK[1] 226 0 Z
+bit 229 O ? SDCLK[0]
+bit 228 O ? nRESET_OUT
+bit 227 O ? PWR_EN
+bit 226 C ? .
+bit 225 C ? .
+bit 224 C ? .
+bit 223 C ? .
+bit 222 O ? MD[31] 93 0 Z
+bit 221 O ? MD[30] 93 0 Z
+bit 220 O ? MD[29] 93 0 Z
+bit 219 O ? MD[28] 93 0 Z
+bit 218 O ? MD[27] 93 0 Z
+bit 217 O ? MD[26] 93 0 Z
+bit 216 O ? MD[25] 93 0 Z
+bit 215 O ? MD[24] 93 0 Z
+bit 214 O ? MD[23] 93 0 Z
+bit 213 O ? MD[22] 93 0 Z
+bit 212 O ? MD[21] 93 0 Z
+bit 211 O ? MD[20] 93 0 Z
+bit 210 O ? MD[19] 93 0 Z
+bit 209 O ? MD[18] 93 0 Z
+bit 208 O ? MD[17] 93 0 Z
+bit 207 O ? MD[16] 93 0 Z
+bit 206 O ? MD[15] 94 0 Z
+bit 205 O ? MD[14] 94 0 Z
+bit 204 O ? MD[13] 94 0 Z
+bit 203 O ? MD[12] 94 0 Z
+bit 202 O ? MD[11] 94 0 Z
+bit 201 O ? MD[10] 94 0 Z
+bit 200 O ? MD[9] 94 0 Z
+bit 199 O ? MD[8] 94 0 Z
+bit 198 O ? MD[7] 94 0 Z
+bit 197 O ? MD[6] 94 0 Z
+bit 196 O ? MD[5] 94 0 Z
+bit 195 O ? MD[4] 94 0 Z
+bit 194 O ? MD[3] 94 0 Z
+bit 193 O ? MD[2] 94 0 Z
+bit 192 O ? MD[1] 94 0 Z
+bit 191 O ? MD[0] 94 0 Z
+bit 190 O ? MMCMD 92 0 Z
+bit 189 O ? MMDAT 91 0 Z
+bit 188 O ? USB_P 90 0 Z
+bit 187 O ? USB_N 90 0 Z
+bit 186 O ? SDA 237 0 Z
+bit 185 O ? SCL 236 0 Z
+bit 184 O ? nACRESET 89 0 Z # see Table 2-7. in [5]
+bit 183 O ? RDnWR 88 0 Z # see Table 2-7. in [5]
+bit 182 O ? nSDCS[3] 87 0 Z # see Table 2-7. in [5]
+bit 181 O ? nSDCS[2] 86 0 Z # see Table 2-7. in [5]
+bit 180 O ? GPIO[85] 85 0 Z
+bit 179 O ? GPIO[84] 84 0 Z
+bit 178 O ? GPIO[83] 83 0 Z
+bit 177 O ? GPIO[82] 82 0 Z
+bit 176 O ? GPIO[81] 81 0 Z
+bit 175 O ? GPIO[80] 80 0 Z
+bit 174 O ? GPIO[79] 79 0 Z
+bit 173 O ? GPIO[78] 78 0 Z
+bit 172 O ? GPIO[77] 77 0 Z
+bit 171 O ? GPIO[76] 76 0 Z
+bit 170 O ? GPIO[75] 75 0 Z
+bit 169 O ? GPIO[74] 74 0 Z
+bit 168 O ? GPIO[73] 73 0 Z
+bit 167 O ? GPIO[72] 72 0 Z
+bit 166 O ? GPIO[71] 71 0 Z
+bit 165 O ? GPIO[70] 70 0 Z
+bit 164 O ? GPIO[69] 69 0 Z
+bit 163 O ? GPIO[68] 68 0 Z
+bit 162 O ? GPIO[67] 67 0 Z
+bit 161 O ? GPIO[66] 66 0 Z
+bit 160 O ? GPIO[65] 65 0 Z
+bit 159 O ? GPIO[64] 64 0 Z
+bit 158 O ? GPIO[63] 63 0 Z
+bit 157 O ? GPIO[62] 62 0 Z
+bit 156 O ? GPIO[61] 61 0 Z
+bit 155 O ? GPIO[60] 60 0 Z
+bit 154 O ? GPIO[59] 59 0 Z
+bit 153 O ? GPIO[58] 58 0 Z
+bit 152 O ? GPIO[57] 57 0 Z
+bit 151 O ? GPIO[56] 56 0 Z
+bit 150 O ? GPIO[55] 55 0 Z
+bit 149 O ? GPIO[54] 54 0 Z
+bit 148 O ? GPIO[53] 53 0 Z
+bit 147 O ? GPIO[52] 52 0 Z
+bit 146 O ? GPIO[51] 51 0 Z
+bit 145 O ? GPIO[50] 50 0 Z
+bit 144 O ? GPIO[49] 49 0 Z
+bit 143 O ? GPIO[48] 48 0 Z
+bit 142 O ? GPIO[47] 47 0 Z
+bit 141 O ? GPIO[46] 46 0 Z
+bit 140 O ? GPIO[45] 45 0 Z
+bit 139 O ? GPIO[44] 44 0 Z
+bit 138 O ? GPIO[43] 43 0 Z
+bit 137 O ? GPIO[42] 42 0 Z
+bit 136 O ? GPIO[41] 41 0 Z
+bit 135 O ? GPIO[40] 40 0 Z
+bit 134 O ? GPIO[39] 39 0 Z
+bit 133 O ? GPIO[38] 38 0 Z
+bit 132 O ? GPIO[37] 37 0 Z
+bit 131 O ? GPIO[36] 36 0 Z
+bit 130 O ? GPIO[35] 35 0 Z
+bit 129 O ? GPIO[34] 34 0 Z
+bit 128 O ? GPIO[33] 33 0 Z
+bit 127 O ? GPIO[32] 32 0 Z
+bit 126 O ? GPIO[31] 31 0 Z
+bit 125 O ? GPIO[30] 30 0 Z
+bit 124 O ? GPIO[29] 29 0 Z
+bit 123 O ? GPIO[28] 28 0 Z
+bit 122 O ? GPIO[27] 27 0 Z
+bit 121 O ? GPIO[26] 26 0 Z
+bit 120 O ? GPIO[25] 25 0 Z
+bit 119 O ? GPIO[24] 24 0 Z
+bit 118 O ? GPIO[23] 23 0 Z
+bit 117 O ? GPIO[22] 22 0 Z
+bit 116 O ? GPIO[21] 21 0 Z
+bit 115 O ? GPIO[20] 20 0 Z
+bit 114 O ? GPIO[19] 19 0 Z
+bit 113 O ? GPIO[18] 18 0 Z
+bit 112 O ? GPIO[17] 17 0 Z
+bit 111 O ? GPIO[16] 16 0 Z
+bit 110 O ? GPIO[15] 15 0 Z
+bit 109 O ? GPIO[14] 14 0 Z
+bit 108 O ? GPIO[13] 13 0 Z
+bit 107 O ? GPIO[12] 12 0 Z
+bit 106 O ? GPIO[11] 11 0 Z
+bit 105 O ? GPIO[10] 10 0 Z
+bit 104 O ? GPIO[9] 9 0 Z
+bit 103 O ? GPIO[8] 8 0 Z
+bit 102 O ? GPIO[7] 7 0 Z
+bit 101 O ? GPIO[6] 6 0 Z
+bit 100 O ? GPIO[5] 5 0 Z
+bit 99 O ? GPIO[4] 4 0 Z
+bit 98 O ? GPIO[3] 3 0 Z
+bit 97 O ? GPIO[2] 2 0 Z
+bit 96 O ? GPIO[1] 1 0 Z
+bit 95 O ? GPIO[0] 0 0 Z
+bit 94 C ? .
+bit 93 C ? .
+bit 92 C ? .
+bit 91 C ? .
+bit 90 C ? .
+bit 89 C ? .
+bit 88 C ? .
+bit 87 C ? .
+bit 86 C ? .
+bit 85 C ? .
+bit 84 C ? .
+bit 83 C ? .
+bit 82 C ? .
+bit 81 C ? .
+bit 80 C ? .
+bit 79 C ? .
+bit 78 C ? .
+bit 77 C ? .
+bit 76 C ? .
+bit 75 C ? .
+bit 74 C ? .
+bit 73 C ? .
+bit 72 C ? .
+bit 71 C ? .
+bit 70 C ? .
+bit 69 C ? .
+bit 68 C ? .
+bit 67 C ? .
+bit 66 C ? .
+bit 65 C ? .
+bit 64 C ? .
+bit 63 C ? .
+bit 62 C ? .
+bit 61 C ? .
+bit 60 C ? .
+bit 59 C ? .
+bit 58 C ? .
+bit 57 C ? .
+bit 56 C ? .
+bit 55 C ? .
+bit 54 C ? .
+bit 53 C ? .
+bit 52 C ? .
+bit 51 C ? .
+bit 50 C ? .
+bit 49 C ? .
+bit 48 C ? .
+bit 47 C ? .
+bit 46 C ? .
+bit 45 C ? .
+bit 44 C ? .
+bit 43 C ? .
+bit 42 C ? .
+bit 41 C ? .
+bit 40 C ? .
+bit 39 C ? .
+bit 38 C ? .
+bit 37 C ? .
+bit 36 C ? .
+bit 35 C ? .
+bit 34 C ? .
+bit 33 C ? .
+bit 32 C ? .
+bit 31 C ? .
+bit 30 C ? .
+bit 29 C ? .
+bit 28 C ? .
+bit 27 C ? .
+bit 26 C ? .
+bit 25 C ? .
+bit 24 C ? .
+bit 23 C ? .
+bit 22 C ? .
+bit 21 C ? .
+bit 20 C ? .
+bit 19 C ? .
+bit 18 C ? .
+bit 17 C ? .
+bit 16 C ? .
+bit 15 C ? .
+bit 14 C ? .
+bit 13 C ? .
+bit 12 C ? .
+bit 11 C ? .
+bit 10 C ? .
+bit 9 C ? .
+bit 8 C ? .
+bit 7 C ? .
+bit 6 C ? .
+bit 5 C ? .
+bit 4 C ? .
+bit 3 C ? .
+bit 2 C ? .
+bit 1 C ? .
+bit 0 C ? .
+
+initbus pxa2x0
--- /dev/null
+#
+# $Id: STEPPINGS,v 1.7 2003/03/18 22:54:45 telka Exp $
+#
+# Copyright (C) 2004 BEC Systems <http://bec-systems.com>
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Cliff Brake <cliff.brake@gmail.com>
+#
+# Documentation:
+# [1] Intel Corporation, "Intel PXA270 Developers Manual"
+# February 2003, Order Number: 278534-012
+#
+
+# bits 31-28 of the Device Identification Register
+# see D55. in [1]
+0000 pxa270 A0
+0001 pxa270 A1
+0010 pxa270 B0
+0011 pxa270 B1
+0100 pxa270 C0
+0111 pxa270 C5
+
--- /dev/null
+#
+# $Id: pxa250c0,v 1.4 2003/09/05 21:09:11 telka Exp $
+#
+# JTAG declarations for PXA250C0
+# Copyright (C) 2002 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Marcel Telka <marcel@telka.sk>, 2002.
+#
+# 2005-01-03: Cliff Brake <cliff.brake@gmail.com> <http://bec-systems.com>
+# - Modified for PXA270 (from PXA255)
+#
+# Documentation:
+# [1] Intel Corporation, "Jflash source code",
+#
+# [2] Intel Corporation, "Intel PAX270 Processor Electrical, Mechanical,
+# and Thermal Specification", December 2004, Order Number: 280002-004
+
+# signals -- see "bulbcx.dat" file in [1] and Table 4-1 in [2]
+
+signal nBATT_FAULT AB24
+signal BOOT_SEL AB23
+signal CLK_REQ W24
+signal nCS[0] B3
+signal DQM[0] AB9
+signal DQM[1] AB10
+signal DQM[2] AC9
+signal DQM[3] AC10
+signal GPIO[0] V22
+signal GPIO[1] Y24
+signal SYS_EN AA24 # dedicated
+signal GPIO[3] W21
+signal GPIO[4] W23
+signal PWR_CAP[0] AB21
+signal PWR_CAP[1] AD22
+signal PWR_CAP[2] AC22
+signal PWR_CAP[3] AA20
+signal GPIO[9] U22
+signal GPIO[10] V23
+signal GPIO[11] C11
+signal GPIO[12] B10
+signal GPIO[13] C10
+signal GPIO[14] T24
+signal GPIO[15] A3
+signal GPIO[16] A18
+signal GPIO[17] C16
+signal GPIO[18] B9
+signal GPIO[19] R22
+signal GPIO[20] AB6
+signal GPIO[21] AD5
+signal GPIO[22] D13
+signal GPIO[23] B16
+signal GPIO[24] A17
+signal GPIO[25] D16
+signal GPIO[26] B15
+signal GPIO[27] C15
+signal GPIO[28] A14
+signal GPIO[29] B13
+signal GPIO[30] C13
+signal GPIO[31] C12
+signal GPIO[32] A20
+signal GPIO[33] B6
+signal GPIO[34] A21
+signal GPIO[35] B19
+signal GPIO[36] C14
+signal GPIO[37] A15
+signal GPIO[38] B14
+signal GPIO[39] D19
+signal GPIO[40] D14
+signal GPIO[41] C18
+signal GPIO[42] C21
+signal GPIO[43] C22
+signal GPIO[44] B20
+signal GPIO[45] C19
+signal GPIO[46] B11
+signal GPIO[47] A11
+signal GPIO[48] AC13
+signal GPIO[49] A10
+signal GPIO[50] AB13
+signal GPIO[51] AD13
+signal GPIO[52] AC14
+signal GPIO[53] AB14
+signal GPIO[54] AA14
+signal GPIO[55] AA10
+signal GPIO[56] AB11
+signal GPIO[57] AC11
+signal GPIO[58] G24
+signal GPIO[59] G22
+signal GPIO[60] G23
+signal GPIO[61] H24
+signal GPIO[62] H22
+signal GPIO[63] H23
+signal GPIO[64] J22
+signal GPIO[65] K24
+signal GPIO[66] K22
+signal GPIO[67] K23
+signal GPIO[68] L21
+signal GPIO[69] L23
+signal GPIO[70] M24
+signal GPIO[71] L22
+signal GPIO[72] N24
+signal GPIO[73] M22
+signal GPIO[74] R23
+signal GPIO[75] P23
+signal GPIO[76] P22
+signal GPIO[77] R21
+signal GPIO[78] B7
+signal GPIO[79] C8
+signal GPIO[80] C7
+signal GPIO[81] AB12
+signal GPIO[82] AD9
+signal GPIO[83] AD10
+signal GPIO[84] AA11
+signal GPIO[85] AC12
+signal GPIO[86] N22
+signal GPIO[87] N23
+signal GPIO[88] C23
+signal GPIO[89] D22
+signal GPIO[90] F22
+signal GPIO[91] F23
+signal GPIO[92] A19
+signal GPIO[93] AB19
+signal GPIO[94] AD19
+signal GPIO[95] AA18
+signal GPIO[96] AC19
+signal GPIO[97] AA17
+signal GPIO[98] AD18
+signal GPIO[99] AB18
+signal GPIO[100] AC18
+signal GPIO[101] AC17
+signal GPIO[102] AB17
+signal GPIO[103] AC16
+signal GPIO[104] AD15
+signal GPIO[105] AB16
+signal GPIO[106] AB15
+signal GPIO[107] AC15
+signal GPIO[108] AD14
+signal GPIO[109] D17
+signal GPIO[110] B17
+signal GPIO[111] C17
+signal GPIO[112] B18
+signal GPIO[113] A13
+signal GPIO[114] D24
+signal GPIO[115] E21
+signal GPIO[116] C24
+signal GPIO[117] D20
+signal GPIO[118] A22
+signal MA[0] C6
+signal MA[1] A6
+signal MA[2] K4
+signal MA[3] J1
+signal MA[4] K2
+signal MA[5] K3
+signal MA[6] J2
+signal MA[7] J3
+signal MA[8] G1
+signal MA[9] H2
+signal MA[10] H3
+signal MA[11] G2
+signal MA[12] G3
+signal MA[13] E1
+signal MA[14] F2
+signal MA[15] G4
+signal MA[16] F3
+signal MA[17] D1
+signal MA[18] C1
+signal MA[19] E3
+signal MA[20] E4
+signal MA[21] D2
+signal MA[22] C2
+signal MA[23] D4
+signal MA[24] C4
+signal MA[25] D6
+signal MD[0] AB4
+signal MD[1] AB1
+signal MD[2] AA3
+signal MD[3] Y3
+signal MD[4] Y2
+signal MD[5] U4
+signal MD[6] V3
+signal MD[7] U1
+signal MD[8] T3
+signal MD[9] R4
+signal MD[10] P4
+signal MD[11] P2
+signal MD[12] N3
+signal MD[13] M4
+signal MD[14] L1
+signal MD[15] K1
+signal MD[16] AA4
+signal MD[17] AB3
+signal MD[18] AA1
+signal MD[19] Y1
+signal MD[20] W1
+signal MD[21] V1
+signal MD[22] V2
+signal MD[23] T1
+signal MD[24] R1
+signal MD[25] R3
+signal MD[26] P3
+signal MD[27] N1
+signal MD[28] N2
+signal MD[29] M3
+signal MD[30] M2
+signal MD[31] L2
+signal nOE AC5
+signal PWR_EN Y23
+signal PWR_OUT AB22
+signal PXTAL_IN AC21
+signal PXTAL_OUT AD21
+signal nRESET Y22
+signal nRESET_OUT Y21
+signal RDnWR C9
+signal nSDCAS AA6
+signal nSDCS[0] AB7
+signal nSDCS[1] AB8
+signal SDCKE[1] AD6
+signal SDCLK[0] AC4
+signal SDCLK[1] AD7
+signal SDCLK[2] AD3
+signal nSDRAS AC7
+signal TEST U24
+signal TESTCLK T23
+signal TXTAL_IN AA22
+signal TXTAL_OUT AA23
+signal TDI U23
+signal TMS T21
+signal TCK T22
+signal TDO V24
+signal nTRST U21
+signal UIO E23
+signal USBC_N C20
+signal USBC_P B22
+signal USBH_N_0 D23
+signal USBH_P_0 E22
+signal VCC_BATT AB20
+signal VCC_BB AD12
+signal VCC_CORE AD11 T2 AD4 W3 B21 M23 R24 AD16 F24 L24 J23 D3 A7 B12
+signal VCC_IO AD17 A12 A16
+signal VCC_LCD J24 P24
+signal VCC_MEM W2 AC6 A4 B8 AC8 AA2 U2 AD8 F1 H1 M1 AD1 AC1 AC2 AD2 L3 E2 C3 P1
+signal VCC_PLL AC20
+signal VCC_RAM B4 A5 A8 A9
+signal VCC_USB A23 A24 B23 B24
+signal VCC_USIM E24
+signal VSS_BB AA13
+signal VSS_CORE AA12 W4 D8 D12 D21 G21 K21 P21 AA7 U3 M21 AA15 D10 J21 A1 B1 A2 B2 D7 B5
+signal VSS_IO D11 D15 D18 F21 H21 N21 AA19 AA16
+signal VSS_MEM Y4 C5 R2 N4 D9 AA9 AA8 AA5 V4 T4 L4 AB2 AC3 J4 H4 F4 D5
+signal VSS_PAD V21 AD23 AC23 AD24 AC24 AA21
+signal VSS_PLL AD20
+signal nVDD_FAULT W22
+signal nWE AB5
+
+# mandatory data registers
+register BSR 504 # Boundary Scan Register (see [3])
+register BR 1 # Bypass Register
+# optional data registers
+register DIR 32 # Device Identification Register
+# user defined registers
+#register DBG_SR 36 # see 10.10 in [2]
+#register LDIC_SR1 33 # see 10.13.2 in [2]
+
+# see 9.3.1 in [2]
+instruction length 7
+# mandatory instructions
+instruction EXTEST 0000000 BSR
+instruction SAMPLE/PRELOAD 0000001 BSR
+instruction BYPASS 1111111 BR
+# optional instructions
+instruction CLAMP 0000100 BR
+instruction HIGHZ 0001000 BR
+instruction IDCODE 1111110 DIR
+# user-defined instructions
+#instruction DBGRX 00010 DBG_SR
+#instruction LDIC 00111 LDIC_SR1
+#instruction SELDCSR 01001 DBG_SR # see 10.10.1 in [2]
+#instruction DBGTX 10000 DBG_SR
+
+#========================================================================
+
+bit 503 O 0 *
+bit 502 I 1 USBH_P_0
+bit 501 O 0 *
+bit 500 I 1 USBH_N_0
+bit 499 I 1 USBC_P
+bit 498 I 1 USBC_N
+bit 497 I 1 UIO
+bit 496 I 1 TESTCLK
+bit 495 I 1 TEST
+bit 494 I 1 NVDD_FAULT
+bit 493 I 1 NRESET
+bit 492 I 1 NBATT_FAULT
+bit 491 I 1 MD[0]
+bit 490 I 1 MD[1]
+bit 489 I 1 MD[2]
+bit 488 I 1 MD[3]
+bit 487 I 1 MD[4]
+bit 486 I 1 MD[5]
+bit 485 I 1 MD[6]
+bit 484 I 1 MD[7]
+bit 483 I 1 MD[8]
+bit 482 I 1 MD[9]
+bit 481 I 1 MD[10]
+bit 480 I 1 MD[11]
+bit 479 I 1 MD[12]
+bit 478 I 1 MD[13]
+bit 477 I 1 MD[14]
+bit 476 I 1 MD[15]
+bit 475 I 1 MD[16]
+bit 474 I 1 MD[17]
+bit 473 I 1 MD[18]
+bit 472 I 1 MD[19]
+bit 471 I 1 MD[20]
+bit 470 I 1 MD[21]
+bit 469 I 1 MD[22]
+bit 468 I 1 MD[23]
+bit 467 I 1 MD[24]
+bit 466 I 1 MD[25]
+bit 465 I 1 MD[26]
+bit 464 I 1 MD[27]
+bit 463 I 1 MD[28]
+bit 462 I 1 MD[29]
+bit 461 I 1 MD[30]
+bit 460 I 1 MD[31]
+bit 459 I 1 GPIO[0]
+bit 458 I 1 GPIO[1]
+bit 457 I 1 GPIO[2]
+bit 456 I 1 GPIO[3]
+bit 455 I 1 GPIO[4]
+bit 454 I 1 GPIO[5]
+bit 453 I 1 GPIO[6]
+bit 452 I 1 GPIO[7]
+bit 451 I 1 GPIO[8]
+bit 450 I 1 GPIO[9]
+bit 449 I 1 GPIO[10]
+bit 448 I 1 GPIO[11]
+bit 447 I 1 GPIO[12]
+bit 446 I 1 GPIO[13]
+bit 445 I 1 GPIO[14]
+bit 444 I 1 GPIO[15]
+bit 443 I 1 GPIO[16]
+bit 442 I 1 GPIO[17]
+bit 441 I 1 GPIO[18]
+bit 440 I 1 GPIO[19]
+bit 439 I 1 GPIO[20]
+bit 438 I 1 GPIO[21]
+bit 437 I 1 GPIO[22]
+bit 436 I 1 GPIO[23]
+bit 435 I 1 GPIO[24]
+bit 434 I 1 GPIO[25]
+bit 433 I 1 GPIO[26]
+bit 432 I 1 GPIO[27]
+bit 431 I 1 GPIO[28]
+bit 430 I 1 GPIO[29]
+bit 429 I 1 GPIO[30]
+bit 428 I 1 GPIO[31]
+bit 427 I 1 GPIO[32]
+bit 426 I 1 GPIO[33]
+bit 425 I 1 GPIO[34]
+bit 424 I 1 GPIO[35]
+bit 423 I 1 GPIO[36]
+bit 422 I 1 GPIO[37]
+bit 421 I 1 GPIO[38]
+bit 420 I 1 GPIO[39]
+bit 419 I 1 GPIO[40]
+bit 418 I 1 GPIO[41]
+bit 417 I 1 GPIO[42]
+bit 416 I 1 GPIO[43]
+bit 415 I 1 GPIO[44]
+bit 414 I 1 GPIO[45]
+bit 413 I 1 GPIO[46]
+bit 412 I 1 GPIO[47]
+bit 411 I 1 GPIO[48]
+bit 410 I 1 GPIO[49]
+bit 409 I 1 GPIO[50]
+bit 408 I 1 GPIO[51]
+bit 407 I 1 GPIO[52]
+bit 406 I 1 GPIO[53]
+bit 405 I 1 GPIO[54]
+bit 404 I 1 GPIO[55]
+bit 403 I 1 GPIO[56]
+bit 402 I 1 GPIO[57]
+bit 401 I 1 GPIO[58]
+bit 400 I 1 GPIO[59]
+bit 399 I 1 GPIO[60]
+bit 398 I 1 GPIO[61]
+bit 397 I 1 GPIO[62]
+bit 396 I 1 GPIO[63]
+bit 395 I 1 GPIO[64]
+bit 394 I 1 GPIO[65]
+bit 393 I 1 GPIO[66]
+bit 392 I 1 GPIO[67]
+bit 391 I 1 GPIO[68]
+bit 390 I 1 GPIO[69]
+bit 389 I 1 GPIO[70]
+bit 388 I 1 GPIO[71]
+bit 387 I 1 GPIO[72]
+bit 386 I 1 GPIO[73]
+bit 385 I 1 GPIO[74]
+bit 384 I 1 GPIO[75]
+bit 383 I 1 GPIO[76]
+bit 382 I 1 GPIO[77]
+bit 381 I 1 GPIO[78]
+bit 380 I 1 GPIO[79]
+bit 379 I 1 GPIO[80]
+bit 378 I 1 GPIO[81]
+bit 377 I 1 GPIO[82]
+bit 376 I 1 GPIO[83]
+bit 375 I 1 GPIO[84]
+bit 374 I 1 GPIO[85]
+bit 373 I 1 GPIO[86]
+bit 372 I 1 GPIO[87]
+bit 371 I 1 GPIO[88]
+bit 370 I 1 GPIO[89]
+bit 369 I 1 GPIO[90]
+bit 368 I 1 GPIO[91]
+bit 367 I 1 GPIO[92]
+bit 366 I 1 GPIO[93]
+bit 365 I 1 GPIO[94]
+bit 364 I 1 GPIO[95]
+bit 363 I 1 GPIO[96]
+bit 362 I 1 GPIO[97]
+bit 361 I 1 GPIO[98]
+bit 360 I 1 GPIO[99]
+bit 359 I 1 GPIO[100]
+bit 358 I 1 GPIO[101]
+bit 357 I 1 GPIO[102]
+bit 356 I 1 GPIO[103]
+bit 355 I 1 GPIO[104]
+bit 354 I 1 GPIO[105]
+bit 353 I 1 GPIO[106]
+bit 352 I 1 GPIO[107]
+bit 351 I 1 GPIO[108]
+bit 350 I 1 GPIO[109]
+bit 349 I 1 GPIO[110]
+bit 348 I 1 GPIO[111]
+bit 347 I 1 GPIO[112]
+bit 346 I 1 GPIO[113]
+bit 345 I 1 GPIO[114]
+bit 344 I 1 GPIO[115]
+bit 343 I 1 GPIO[116]
+bit 342 I 1 GPIO[117]
+bit 341 I 1 GPIO[118]
+bit 340 O 0 *
+bit 339 O 0 *
+bit 338 I 1 CLK_REQ
+bit 337 I 1 BOOT_SEL
+bit 336 O 0 *
+bit 335 O 1 USBH_P_0 331 1 Z
+bit 334 O 0 *
+bit 333 O 1 USBH_N_0 331 1 Z
+bit 332 O 1 *
+bit 331 C 1 *
+bit 330 O 1 USBC_P 328 0 Z
+bit 329 O 1 USBC_N 328 0 Z
+bit 328 C 0 *
+bit 327 C 0 *
+bit 326 O 1 UIO 327 0 Z
+bit 325 C 0 *
+bit 324 O 1 SDCLK[2] 75 0 Z
+bit 323 O 1 SDCLK[1] 69 0 Z
+bit 322 O 1 SDCKE[1] 75 0 Z
+bit 321 O 1 nSDRAS 69 0 Z
+bit 320 O 1 nSDCS[1] 75 0 Z
+bit 319 O 1 nSDCS[0] 69 0 Z
+bit 318 O 1 GPIO[0] 197 0 Z
+bit 317 O 1 GPIO[1] 196 0 Z
+bit 316 O 1 GPIO[2] 195 0 Z
+bit 315 O 1 GPIO[3] 194 0 Z
+bit 314 O 1 GPIO[4] 193 0 Z
+bit 313 O 1 GPIO[5] 192 0 Z
+bit 312 O 1 GPIO[6] 191 0 Z
+bit 311 O 1 GPIO[7] 190 0 Z
+bit 310 O 1 GPIO[8] 189 0 Z
+bit 309 O 1 GPIO[9] 188 0 Z
+bit 308 O 1 GPIO[10] 187 0 Z
+bit 307 O 1 GPIO[11] 186 0 Z
+bit 306 O 1 GPIO[12] 185 0 Z
+bit 305 O 1 GPIO[13] 184 0 Z
+bit 304 O 1 GPIO[14] 183 0 Z
+bit 303 O 1 GPIO[15] 182 0 Z
+bit 302 O 1 GPIO[16] 181 0 Z
+bit 301 O 1 GPIO[17] 180 0 Z
+bit 300 O 1 GPIO[18] 179 0 Z
+bit 299 O 1 GPIO[19] 178 0 Z
+bit 298 O 1 GPIO[20] 177 0 Z
+bit 297 O 1 GPIO[21] 176 0 Z
+bit 296 O 1 GPIO[22] 175 0 Z
+bit 295 O 1 GPIO[23] 174 0 Z
+bit 294 O 1 GPIO[24] 173 0 Z
+bit 293 O 1 GPIO[25] 172 0 Z
+bit 292 O 1 GPIO[26] 171 0 Z
+bit 291 O 1 GPIO[27] 170 0 Z
+bit 290 O 1 GPIO[28] 169 0 Z
+bit 289 O 1 GPIO[29] 168 0 Z
+bit 288 O 1 GPIO[30] 167 0 Z
+bit 287 O 1 GPIO[31] 166 0 Z
+bit 286 O 1 GPIO[32] 165 0 Z
+bit 285 O 1 GPIO[33] 164 0 Z
+bit 284 O 1 GPIO[34] 163 0 Z
+bit 283 O 1 GPIO[35] 162 0 Z
+bit 282 O 1 GPIO[36] 161 0 Z
+bit 281 O 1 GPIO[37] 160 0 Z
+bit 280 O 1 GPIO[38] 159 0 Z
+bit 279 O 1 GPIO[39] 158 0 Z
+bit 278 O 1 GPIO[40] 157 0 Z
+bit 277 O 1 GPIO[41] 156 0 Z
+bit 276 O 1 GPIO[42] 155 0 Z
+bit 275 O 1 GPIO[43] 154 0 Z
+bit 274 O 1 GPIO[44] 153 0 Z
+bit 273 O 1 GPIO[45] 152 0 Z
+bit 272 O 1 GPIO[46] 151 0 Z
+bit 271 O 1 GPIO[47] 150 0 Z
+bit 270 O 1 GPIO[48] 149 0 Z
+bit 269 O 1 GPIO[49] 148 0 Z
+bit 268 O 1 GPIO[50] 147 0 Z
+bit 267 O 1 GPIO[51] 146 0 Z
+bit 266 O 1 GPIO[52] 145 0 Z
+bit 265 O 1 GPIO[53] 144 0 Z
+bit 264 O 1 GPIO[54] 143 0 Z
+bit 263 O 1 GPIO[55] 142 0 Z
+bit 262 O 1 GPIO[56] 141 0 Z
+bit 261 O 1 GPIO[57] 140 0 Z
+bit 260 O 1 GPIO[58] 139 0 Z
+bit 259 O 1 GPIO[59] 138 0 Z
+bit 258 O 1 GPIO[60] 137 0 Z
+bit 257 O 1 GPIO[61] 136 0 Z
+bit 256 O 1 GPIO[62] 135 0 Z
+bit 255 O 1 GPIO[63] 134 0 Z
+bit 254 O 1 GPIO[64] 133 0 Z
+bit 253 O 1 GPIO[65] 132 0 Z
+bit 252 O 1 GPIO[66] 131 0 Z
+bit 251 O 1 GPIO[67] 130 0 Z
+bit 250 O 1 GPIO[68] 129 0 Z
+bit 249 O 1 GPIO[69] 128 0 Z
+bit 248 O 1 GPIO[70] 127 0 Z
+bit 247 O 1 GPIO[71] 126 0 Z
+bit 246 O 1 GPIO[72] 125 0 Z
+bit 245 O 1 GPIO[73] 124 0 Z
+bit 244 O 1 GPIO[74] 123 0 Z
+bit 243 O 1 GPIO[75] 122 0 Z
+bit 242 O 1 GPIO[76] 121 0 Z
+bit 241 O 1 GPIO[77] 120 0 Z
+bit 240 O 1 GPIO[78] 119 0 Z
+bit 239 O 1 GPIO[79] 118 0 Z
+bit 238 O 1 GPIO[80] 117 0 Z
+bit 237 O 1 GPIO[81] 116 0 Z
+bit 236 O 1 GPIO[82] 115 0 Z
+bit 235 O 1 GPIO[83] 114 0 Z
+bit 234 O 1 GPIO[84] 113 0 Z
+bit 233 O 1 GPIO[85] 112 0 Z
+bit 232 O 1 GPIO[86] 111 0 Z
+bit 231 O 1 GPIO[87] 110 0 Z
+bit 230 O 1 GPIO[88] 109 0 Z
+bit 229 O 1 GPIO[89] 108 0 Z
+bit 228 O 1 GPIO[90] 107 0 Z
+bit 227 O 1 GPIO[91] 106 0 Z
+bit 226 O 1 GPIO[92] 105 0 Z
+bit 225 O 1 GPIO[93] 104 0 Z
+bit 224 O 1 GPIO[94] 103 0 Z
+bit 223 O 1 GPIO[95] 102 0 Z
+bit 222 O 1 GPIO[96] 101 0 Z
+bit 221 O 1 GPIO[97] 100 0 Z
+bit 220 O 1 GPIO[98] 99 0 Z
+bit 219 O 1 GPIO[99] 98 0 Z
+bit 218 O 1 GPIO[100] 97 0 Z
+bit 217 O 1 GPIO[101] 96 0 Z
+bit 216 O 1 GPIO[102] 95 0 Z
+bit 215 O 1 GPIO[103] 94 0 Z
+bit 214 O 1 GPIO[104] 93 0 Z
+bit 213 O 1 GPIO[105] 92 0 Z
+bit 212 O 1 GPIO[106] 91 0 Z
+bit 211 O 1 GPIO[107] 90 0 Z
+bit 210 O 1 GPIO[108] 89 0 Z
+bit 209 O 1 GPIO[109] 88 0 Z
+bit 208 O 1 GPIO[110] 87 0 Z
+bit 207 O 1 GPIO[111] 86 0 Z
+bit 206 O 1 GPIO[112] 85 0 Z
+bit 205 O 1 GPIO[113] 84 0 Z
+bit 204 O 1 GPIO[114] 83 0 Z
+bit 203 O 1 GPIO[115] 82 0 Z
+bit 202 O 1 GPIO[116] 81 0 Z
+bit 201 O 1 GPIO[117] 80 0 Z
+bit 200 O 1 GPIO[118] 79 0 Z
+bit 199 O 0 *
+bit 198 O 0 *
+bit 197 C 0 *
+bit 196 C 0 *
+bit 195 C 0 *
+bit 194 C 0 *
+bit 193 C 0 *
+bit 192 C 0 *
+bit 191 C 0 *
+bit 190 C 0 *
+bit 189 C 0 *
+bit 188 C 0 *
+bit 187 C 0 *
+bit 186 C 0 *
+bit 185 C 0 *
+bit 184 C 0 *
+bit 183 C 0 *
+bit 182 C 0 *
+bit 181 C 0 *
+bit 180 C 0 *
+bit 179 C 0 *
+bit 178 C 0 *
+bit 177 C 0 *
+bit 176 C 0 *
+bit 175 C 0 *
+bit 174 C 0 *
+bit 173 C 0 *
+bit 172 C 0 *
+bit 171 C 0 *
+bit 170 C 0 *
+bit 169 C 0 *
+bit 168 C 0 *
+bit 167 C 0 *
+bit 166 C 0 *
+bit 165 C 0 *
+bit 164 C 0 *
+bit 163 C 0 *
+bit 162 C 0 *
+bit 161 C 0 *
+bit 160 C 0 *
+bit 159 C 0 *
+bit 158 C 0 *
+bit 157 C 0 *
+bit 156 C 0 *
+bit 155 C 0 *
+bit 154 C 0 *
+bit 153 C 0 *
+bit 152 C 0 *
+bit 151 C 0 *
+bit 150 C 0 *
+bit 149 C 0 *
+bit 148 C 0 *
+bit 147 C 0 *
+bit 146 C 0 *
+bit 145 C 0 *
+bit 144 C 0 *
+bit 143 C 0 *
+bit 142 C 0 *
+bit 141 C 0 *
+bit 140 C 0 *
+bit 139 C 0 *
+bit 138 C 0 *
+bit 137 C 0 *
+bit 136 C 0 *
+bit 135 C 0 *
+bit 134 C 0 *
+bit 133 C 0 *
+bit 132 C 0 *
+bit 131 C 0 *
+bit 130 C 0 *
+bit 129 C 0 *
+bit 128 C 0 *
+bit 127 C 0 *
+bit 126 C 0 *
+bit 125 C 0 *
+bit 124 C 0 *
+bit 123 C 0 *
+bit 122 C 0 *
+bit 121 C 0 *
+bit 120 C 0 *
+bit 119 C 0 *
+bit 118 C 0 *
+bit 117 C 0 *
+bit 116 C 0 *
+bit 115 C 0 *
+bit 114 C 0 *
+bit 113 C 0 *
+bit 112 C 0 *
+bit 111 C 0 *
+bit 110 C 0 *
+bit 109 C 0 *
+bit 108 C 0 *
+bit 107 C 0 *
+bit 106 C 0 *
+bit 105 C 0 *
+bit 104 C 0 *
+bit 103 C 0 *
+bit 102 C 0 *
+bit 101 C 0 *
+bit 100 C 0 *
+bit 99 C 0 *
+bit 98 C 0 *
+bit 97 C 0 *
+bit 96 C 0 *
+bit 95 C 0 *
+bit 94 C 0 *
+bit 93 C 0 *
+bit 92 C 0 *
+bit 91 C 0 *
+bit 90 C 0 *
+bit 89 C 0 *
+bit 88 C 0 *
+bit 87 C 0 *
+bit 86 C 0 *
+bit 85 C 0 *
+bit 84 C 0 *
+bit 83 C 0 *
+bit 82 C 0 *
+bit 81 C 0 *
+bit 80 C 0 *
+bit 79 C 0 *
+bit 78 O 0 *
+bit 77 O 0 *
+bit 76 O 1 CLK_REQ 325 0 Z
+bit 75 C 0 *
+bit 74 C 0 *
+bit 73 C 0 *
+bit 72 C 0 *
+bit 71 C 0 *
+bit 70 C 0 *
+bit 69 C 0 *
+bit 68 O 1 RDnWR 69 0 Z
+bit 67 O 1 DQM[0] 69 0 Z
+bit 66 O 1 DQM[1] 69 0 Z
+bit 65 O 1 DQM[2] 70 0 Z
+bit 64 O 1 DQM[3] 70 0 Z
+bit 63 O 0 *
+bit 62 O 1 SDCLK[0] 75 0 Z
+bit 61 O 1 nCS[0] 74 0 Z
+bit 60 O 1 nOE 74 0 Z
+bit 59 O 1 nWE 73 0 Z
+bit 58 O 1 nSDCAS 69 0 Z
+bit 57 O 1 MD[0] 71 0 Z
+bit 56 O 1 MD[1] 71 0 Z
+bit 55 O 1 MD[2] 71 0 Z
+bit 54 O 1 MD[3] 71 0 Z
+bit 53 O 1 MD[4] 71 0 Z
+bit 52 O 1 MD[5] 71 0 Z
+bit 51 O 1 MD[6] 71 0 Z
+bit 50 O 1 MD[7] 71 0 Z
+bit 49 O 1 MD[8] 71 0 Z
+bit 48 O 1 MD[9] 71 0 Z
+bit 47 O 1 MD[10] 71 0 Z
+bit 46 O 1 MD[11] 71 0 Z
+bit 45 O 1 MD[12] 71 0 Z
+bit 44 O 1 MD[13] 71 0 Z
+bit 43 O 1 MD[14] 71 0 Z
+bit 42 O 1 MD[15] 71 0 Z
+bit 41 O 1 MD[16] 72 0 Z
+bit 40 O 1 MD[17] 72 0 Z
+bit 39 O 1 MD[18] 72 0 Z
+bit 38 O 1 MD[19] 72 0 Z
+bit 37 O 1 MD[20] 72 0 Z
+bit 36 O 1 MD[21] 72 0 Z
+bit 35 O 1 MD[22] 72 0 Z
+bit 34 O 1 MD[23] 72 0 Z
+bit 33 O 1 MD[24] 72 0 Z
+bit 32 O 1 MD[25] 72 0 Z
+bit 31 O 1 MD[26] 72 0 Z
+bit 30 O 1 MD[27] 72 0 Z
+bit 29 O 1 MD[28] 72 0 Z
+bit 28 O 1 MD[29] 72 0 Z
+bit 27 O 1 MD[30] 72 0 Z
+bit 26 O 1 MD[31] 72 0 Z
+bit 25 O 1 MA[0] 69 0 Z
+bit 24 O 1 MA[1] 69 0 Z
+bit 23 O 1 MA[2] 69 0 Z
+bit 22 O 1 MA[3] 69 0 Z
+bit 21 O 1 MA[4] 69 0 Z
+bit 20 O 1 MA[5] 69 0 Z
+bit 19 O 1 MA[6] 69 0 Z
+bit 18 O 1 MA[7] 69 0 Z
+bit 17 O 1 MA[8] 69 0 Z
+bit 16 O 1 MA[9] 69 0 Z
+bit 15 O 1 MA[10] 69 0 Z
+bit 14 O 1 MA[11] 69 0 Z
+bit 13 O 1 MA[12] 69 0 Z
+bit 12 O 1 MA[13] 69 0 Z
+bit 11 O 1 MA[14] 69 0 Z
+bit 10 O 1 MA[15] 69 0 Z
+bit 9 O 1 MA[16] 69 0 Z
+bit 8 O 1 MA[17] 69 0 Z
+bit 7 O 1 MA[18] 69 0 Z
+bit 6 O 1 MA[19] 69 0 Z
+bit 5 O 1 MA[20] 69 0 Z
+bit 4 O 1 MA[21] 69 0 Z
+bit 3 O 1 MA[22] 69 0 Z
+bit 2 O 1 MA[23] 69 0 Z
+bit 1 O 1 MA[24] 69 0 Z
+bit 0 O 1 MA[25] 69 0 Z
+
+initbus pxa27x
+
--- /dev/null
+#
+# $Id$
+#
+# Copyright (C) 2002 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Marcel Telka <marcel@telka.sk>, 2002.
+#
+# Documentation:
+# [1] Intel Corporation, "Intel StrongARM SA-1110 Microprocessor
+# Developer's Manual", October 2001, Order Number: 278240-004
+#
+
+# bits 31-28 of the Device Identification Register
+# see 16.6.2 in [1]
+0000 sa1110 A0
+0100 sa1110 B0
+0101 sa1110 B1
+0110 sa1110 B2
+1000 sa1110 B4
+1001 sa1110 B5
--- /dev/null
+#
+# $Id$
+#
+# JTAG declarations for SA-1110
+# Copyright (C) 2002 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Marcel Telka <marcel@telka.sk>, 2002.
+#
+# Documentation:
+# [1] Intel Corporation, "Intel StrongARM SA-1110 Microprocessor
+# Developer's Manual", October 2001, Order Number: 278240-004
+# [2] Intel Corporation, "Intel StrongARM SA-1110 Microprocessor
+# Specification Update", December 2001, Order Number: 278259-023
+#
+
+# see Table 14-2 in [1]
+signal A0 D12
+signal A1 C12
+signal A2 B12
+signal A3 A13
+signal A4 C13
+signal A5 B13
+signal A6 A14
+signal A7 A15
+signal A8 A16
+signal A9 B15
+signal A10 B14
+signal A11 C14
+signal A12 B16
+signal A13 D13
+signal A14 E13
+signal A15 C16
+signal A16 D15
+signal A17 E14
+signal A18 D16
+signal A19 E15
+signal A20 F14
+signal A21 E16
+signal A22 F15
+signal A23 F13
+signal A24 G13
+signal A25 F16
+signal BATT_FAULT A4
+signal nCAS0 J14
+signal nCAS1 J15
+signal nCAS2 K15
+signal nCAS3 K13
+signal nCS0 G14
+signal nCS1 G15
+signal nCS2 G16
+signal nCS3 H14
+signal nCS4 H15
+signal nCS5 H16
+signal D0 E4
+signal D1 F4
+signal D2 F2
+signal D3 G2
+signal D4 H1
+signal D5 J4
+signal D6 K1
+signal D7 L1
+signal D8 D2
+signal D9 E2
+signal D10 F1
+signal D11 H6
+signal D12 J6
+signal D13 J1
+signal D14 K4
+signal D15 L4
+signal D16 D1
+signal D17 E1
+signal D18 G4
+signal D19 G1
+signal D20 J2
+signal D21 K2
+signal D22 L3
+signal D23 M2
+signal D24 E3
+signal D25 F3
+signal D26 G3
+signal D27 H4
+signal D28 J3
+signal D29 K3
+signal D30 L2
+signal D31 M1
+signal GP0 T10
+signal GP1 P10
+signal GP2 R10
+signal GP3 N10
+signal GP4 T9
+signal GP5 P9
+signal GP6 R8
+signal GP7 N8
+signal GP8 P8
+signal GP9 T7
+signal GP10 P7
+signal GP11 T6
+signal GP12 R7
+signal GP13 R6
+signal GP14 P6
+signal GP15 N6
+signal GP16 T5
+signal GP17 R5
+signal GP18 P5
+signal GP19 T4
+signal GP20 R4
+signal GP21 T3
+signal GP22 R3
+signal GP23 T2
+signal GP24 P4
+signal GP25 R2
+signal GP26 T1
+signal GP27 R1
+signal nIOIS16 N13
+signal L_BIAS R11
+signal L_FCLK T14
+signal L_LCLK R14
+signal L_PCLK P11
+signal LDD0 N12
+signal LDD1 T11
+signal LDD2 R12
+signal LDD3 P12
+signal LDD4 T12
+signal LDD5 R13
+signal LDD6 T13
+signal LDD7 P13
+signal nOE M15
+signal nPCE1 M16
+signal nPCE2 N15
+signal PEXTAL A8
+signal nPIOR T16
+signal nPIOW R16
+signal nPOE R15
+signal nPREG N14
+signal PSKTSEL P16
+signal nPWAIT N16
+signal nPWE T16
+signal PWR_EN A3
+signal PXTAL B8
+signal nRAS0 K16
+signal nRAS1 L13
+signal nRAS2 L14
+signal nRAS3 L15
+signal RD_nWR J13
+signal RDY H13
+signal nRESET B7
+signal nRESET_OUT C7
+signal ROM_SEL D6 # typo in Table 14-2 in [1] ('ROMSEL' is bad pin name)
+signal RXD_1 B11
+signal RXD_2 B10
+signal RXD_3 C10
+signal RXD_C B1
+signal SCLK_C A2
+signal nSDCAS L16
+signal SDCKE0 N1
+signal SDCKE1 N2
+signal SDCLK0 P1
+signal SDCLK1 N3
+signal SDCLK2 M3
+signal nSDRAS M14
+signal SFRM_C B3
+signal SMROM_EN M4
+signal TCK C5
+signal TCK_BYP A6
+signal TDI A5
+signal TDO B5
+signal TESTCLK B6
+signal TEXTAL C9
+signal TMS C6
+signal nTRST B4
+signal TXTAL B9
+signal TXD_1 A11
+signal TXD_2 D10
+signal TXD_3 A10
+signal TXD_C C2
+signal UDC- A12
+signal UDC+ C11
+signal VDD A7 C1 C15 H3 J16 P3 P15 T8
+signal VDD_FAULT C4
+signal VDDP C8
+signal VDDX1 D5 D9 D11 E6 E7 E8 E9 E10 E11 K10 K11 L10 L11 M6 M7 M8 M9 M10 M11 N7 N9 N11
+signal VDDX2 E12 F5 F12 G5 G12 H5 H12 J5 J12 K5 K12 L5 L12 M5 M12 N4 N5
+signal VDDX3 D7
+signal VSS A8 D3 D8 D14 H2 K14 P2 P14 R9
+signal VSSX A1 B2 C3 D4 E5 F6 F7 F8 F9 F10 F11 G6 G7 G8 G9 G10 G11 H7 H8 H9 H10 H11 J7 J8 J9 J10 J11 K6 K7 K8 K9 L6 L7 L8 L9
+signal nWE M13
+
+# mandatory data registers
+register BSR 292 # Boundary Scan Register (see Table 16-2 in [1])
+register BR 1 # Bypass Register
+# optional data registers
+register DIR 32 # Device Identification Register
+
+# see 16.5 in [1]
+instruction length 5
+
+# mandatory instructions
+instruction EXTEST 00000 BSR
+instruction SAMPLE/PRELOAD 00001 BSR
+instruction BYPASS 11111 BR
+
+# optional instructions
+instruction CLAMP 00100 BR
+instruction HIGHZ 00101 BR
+instruction IDCODE 00110 DIR
+
+# see Table 16-2 in [1]
+bit 291 I ? BATT_FAULT
+bit 290 I ? VDD_FAULT
+bit 289 O 1 PWR_EN
+bit 288 C 0 SFRM_C
+bit 287 O ? SFRM_C 288 0 Z
+bit 286 I ? SFRM_C
+bit 285 C 0 SCLK_C
+bit 284 O ? SCLK_C 285 0 Z
+bit 283 I ? SCLK_C
+bit 282 C 0 RXD_C
+bit 281 O ? RXD_C 282 0 Z
+bit 280 I ? RXD_C
+bit 279 C 0 TXD_C
+bit 278 O ? TXD_C 279 0 Z
+bit 277 I ? TXD_C
+bit 276 O ? D0 212 1 Z
+bit 275 I ? D0
+bit 274 O ? D8 212 1 Z
+bit 273 I ? D8
+bit 272 O ? D16 212 1 Z
+bit 271 I ? D16
+bit 270 O ? D24 212 1 Z
+bit 269 I ? D24
+bit 268 O ? D1 212 1 Z
+bit 267 I ? D1
+bit 266 O ? D9 212 1 Z
+bit 265 I ? D9
+bit 264 O ? D17 212 1 Z
+bit 263 I ? D17
+bit 262 O ? D25 212 1 Z
+bit 261 I ? D25
+bit 260 O ? D2 212 1 Z
+bit 259 I ? D2
+bit 258 O ? D10 212 1 Z
+bit 257 I ? D10
+bit 256 O ? D18 212 1 Z
+bit 255 I ? D18
+bit 254 O ? D26 212 1 Z
+bit 253 I ? D26
+bit 252 O ? D3 212 1 Z
+bit 251 I ? D3
+bit 250 O ? D11 212 1 Z
+bit 249 I ? D11
+bit 248 O ? D19 212 1 Z
+bit 247 I ? D19
+bit 246 O ? D27 212 1 Z
+bit 245 I ? D27
+bit 244 O ? D4 212 1 Z
+bit 243 I ? D4
+bit 242 O ? D12 212 1 Z
+bit 241 I ? D12
+bit 240 O ? D20 212 1 Z
+bit 239 I ? D20
+bit 238 O ? D28 212 1 Z
+bit 237 I ? D28
+bit 236 O ? D5 212 1 Z
+bit 235 I ? D5
+bit 234 O ? D13 212 1 Z
+bit 233 I ? D13
+bit 232 O ? D21 212 1 Z
+bit 231 I ? D21
+bit 230 O ? D29 212 1 Z
+bit 229 I ? D29
+bit 228 O ? D6 212 1 Z
+bit 227 I ? D6
+bit 226 O ? D14 212 1 Z
+bit 225 I ? D14
+bit 224 O ? D22 212 1 Z
+bit 223 I ? D22
+bit 222 O ? D30 212 1 Z
+bit 221 I ? D30
+bit 220 O ? D7 212 1 Z
+bit 219 I ? D7
+bit 218 O ? D15 212 1 Z
+bit 217 I ? D15
+bit 216 O ? D23 212 1 Z
+bit 215 I ? D23
+bit 214 O ? D31 212 1 Z
+bit 213 I ? D31
+bit 212 C 1 D[31:0]
+bit 211 O 0 SDCLK2
+bit 210 O 1 SDCKE1
+bit 209 C 1 SDCLK1
+bit 208 O ? SDCLK1 209 1 Z # error (bad name) in Table 16-2 in [1]
+bit 207 O 0 SDCLK0
+bit 206 O 0 SDCKE0
+bit 205 I ? SMROM_EN
+bit 204 C 0 GP27
+bit 203 O ? GP27 204 0 Z
+bit 202 I ? GP27
+bit 201 C 0 GP26
+bit 200 O ? GP26 201 0 Z
+bit 199 I ? GP26
+bit 198 C 0 GP25
+bit 197 O ? GP25 198 0 Z
+bit 196 I ? GP25
+bit 195 C 0 GP24
+bit 194 O ? GP24 195 0 Z
+bit 193 I ? GP24
+bit 192 C 0 GP23
+bit 191 O ? GP23 192 0 Z
+bit 190 I ? GP23
+bit 189 C 0 GP22
+bit 188 O ? GP22 189 0 Z
+bit 187 I ? GP22
+bit 186 C 0 GP21
+bit 185 O ? GP21 186 0 Z
+bit 184 I ? GP21
+bit 183 C 0 GP20
+bit 182 O ? GP20 183 0 Z
+bit 181 I ? GP20
+bit 180 C 0 GP19
+bit 179 O ? GP19 180 0 Z
+bit 178 I ? GP19
+bit 177 C 0 GP18
+bit 176 O ? GP18 177 0 Z
+bit 175 I ? GP18
+bit 174 C 0 GP17
+bit 173 O ? GP17 174 0 Z
+bit 172 I ? GP17
+bit 171 C 0 GP16
+bit 170 O ? GP16 171 0 Z
+bit 169 I ? GP16
+bit 168 C 0 GP15
+bit 167 O ? GP15 168 0 Z
+bit 166 I ? GP15
+bit 165 C 0 GP14
+bit 164 O ? GP14 165 0 Z
+bit 163 I ? GP14
+bit 162 C 0 GP13
+bit 161 O ? GP13 162 0 Z
+bit 160 I ? GP13
+bit 159 C 0 GP12
+bit 158 O ? GP12 159 0 Z
+bit 157 I ? GP12
+bit 156 C 0 GP11
+bit 155 O ? GP11 156 0 Z
+bit 154 I ? GP11
+bit 153 C 0 GP10
+bit 152 O ? GP10 153 0 Z
+bit 151 I ? GP10
+bit 150 C 0 GP9
+bit 149 O ? GP9 150 0 Z
+bit 148 I ? GP9
+bit 147 C 0 GP8
+bit 146 O ? GP8 147 0 Z
+bit 145 I ? GP8
+bit 144 C 0 GP7
+bit 143 O ? GP7 144 0 Z
+bit 142 I ? GP7
+bit 141 C 0 GP6
+bit 140 O ? GP6 141 0 Z
+bit 139 I ? GP6
+bit 138 C 0 GP5
+bit 137 O ? GP5 138 0 Z
+bit 136 I ? GP5
+bit 135 C 0 GP4
+bit 134 O ? GP4 135 0 Z
+bit 133 I ? GP4
+bit 132 C 0 GP3
+bit 131 O ? GP3 132 0 Z
+bit 130 I ? GP3
+bit 129 C 0 GP2
+bit 128 O ? GP2 129 0 Z
+bit 127 I ? GP2
+bit 126 C 0 GP1
+bit 125 O ? GP1 126 0 Z
+bit 124 I ? GP1
+bit 123 C 0 GP0
+bit 122 O ? GP0 123 0 Z
+bit 121 I ? GP0
+bit 120 C 0 L_BIAS
+bit 119 O ? L_BIAS 120 0 Z
+bit 118 I ? L_BIAS
+bit 117 C 0 L_PCLK
+bit 116 O ? L_PCLK 117 0 Z
+bit 115 I ? L_PCLK
+bit 114 C 0 LDD0
+bit 113 O ? LDD0 114 0 Z
+bit 112 I ? LDD0
+bit 111 C 0 LDD1
+bit 110 O ? LDD1 111 0 Z
+bit 109 I ? LDD1
+bit 108 C 0 LDD2
+bit 107 O ? LDD2 108 0 Z
+bit 106 I ? LDD2
+bit 105 C 0 LDD3
+bit 104 O ? LDD3 105 0 Z
+bit 103 I ? LDD3
+bit 102 C 0 LDD4
+bit 101 O ? LDD4 102 0 Z
+bit 100 I ? LDD4
+bit 99 C 0 LDD5
+bit 98 O ? LDD5 99 0 Z
+bit 97 I ? LDD5
+bit 96 C 0 LDD6
+bit 95 O ? LDD6 96 0 Z
+bit 94 I ? LDD6
+bit 93 C 0 LDD7
+bit 92 O ? LDD7 93 0 Z
+bit 91 I ? LDD7
+bit 90 C 0 L_LCLK
+bit 89 O ? L_LCLK 90 0 Z
+bit 88 I ? L_LCLK
+bit 87 C 0 L_FCLK
+bit 86 O ? L_FCLK 87 0 Z
+bit 85 I ? L_FCLK
+bit 84 O 0 nPOE
+bit 83 O 0 nPWE
+bit 82 O 0 nPIOR
+bit 81 O 0 nPIOW
+bit 80 O 0 PSKTSEL
+bit 79 I ? nIOIS16
+bit 78 I ? nPWAIT
+bit 77 O 0 nPREG
+bit 76 O 1 nPCE2
+bit 75 O 1 nPCE1
+bit 74 O 1 .
+bit 73 O 1 nWE 74 1 Z
+bit 72 O 0 nOE 74 1 Z
+bit 71 O 0 nSDRAS 74 1 Z
+bit 70 O 0 nSDCAS 74 1 Z
+bit 69 O 0 nRAS3
+bit 68 O 0 nRAS2
+bit 67 O 0 nRAS1
+bit 66 O 1 nRAS0 74 1 Z
+bit 65 O 1 nCAS3 74 1 Z
+bit 64 O 1 nCAS2 74 1 Z
+bit 63 O 1 nCAS1 74 1 Z
+bit 62 O 1 nCAS0 74 1 Z
+bit 61 O 0 RD_nWR
+bit 60 I ? RDY
+bit 59 O 1 nCS5
+bit 58 O 1 nCS4
+bit 57 O 1 nCS3
+bit 56 O 1 nCS2
+bit 55 O 1 nCS1
+bit 54 O 1 nCS0
+bit 53 O 0 A25 74 1 Z
+bit 52 O 0 A24 74 1 Z
+bit 51 O 0 A23 74 1 Z
+bit 50 O 0 A22 74 1 Z
+bit 49 O 0 A21 74 1 Z
+bit 48 O 0 A20 74 1 Z
+bit 47 O 0 A19 74 1 Z
+bit 46 O 0 A18 74 1 Z
+bit 45 O 0 A17 74 1 Z
+bit 44 O 0 A16 74 1 Z
+bit 43 O 0 A15 74 1 Z
+bit 42 O 0 A14 74 1 Z
+bit 41 O 0 A13 74 1 Z
+bit 40 O 0 A12 74 1 Z
+bit 39 O 0 A11 74 1 Z
+bit 38 O 0 A10 74 1 Z
+bit 37 O 0 A9 74 1 Z
+bit 36 O 0 A8 74 1 Z
+bit 35 O 0 A7 74 1 Z
+bit 34 O 0 A6 74 1 Z
+bit 33 O 0 A5 74 1 Z
+bit 32 O 0 A4 74 1 Z
+bit 31 O 0 A3 74 1 Z
+bit 30 O 0 A2 74 1 Z
+bit 29 O 0 A1 74 1 Z
+bit 28 O 0 A0 74 1 Z
+bit 27 C 1 UDC-
+bit 26 O ? UDC- 27 1 Z
+bit 25 I ? UDC-
+bit 24 X ? UDC-/UDC+
+bit 23 C 1 UDC+
+bit 22 O ? UDC+ 23 1 Z
+bit 21 I ? UDC+
+bit 20 C 0 RXD_1
+bit 19 O ? RXD_1 20 0 Z
+bit 18 I ? RXD_1
+bit 17 C 0 TXD_1
+bit 16 O ? TXD_1 17 0 Z
+bit 15 I ? TXD_1
+bit 14 C 0 RXD_2
+bit 13 O ? RXD_2 14 0 Z
+bit 12 I ? RXD_2
+bit 11 C 0 TXD_2
+bit 10 O ? TXD_2 11 0 Z
+bit 9 I ? TXD_2
+bit 8 C 0 RXD_3
+bit 7 O ? RXD_3 8 0 Z
+bit 6 I ? RXD_3
+bit 5 C 0 TXD_3
+bit 4 O ? TXD_3 5 0 Z
+bit 3 I ? TXD_3
+bit 2 I ? nRESET
+bit 1 O 1 nRESET_OUT
+bit 0 I ? ROM_SEL
+
+initbus sa1110
--- /dev/null
+#
+# $Id$
+#
+# Copyright (C) 2002 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Marcel Telka <marcel@telka.sk>, 2002.
+#
+
+# bits 27-12 of the Device Identification Register
+0111010010000110 m4a3-64.32-tqfp48 M4A3-64/32-TQFP48
+0001100000000101 lc4032v-tqfp48 LC4032V-TQFP48
+0000011000001111 m4a3-256.192-fpbga256 M4A3-256/192-fpBGA256
+0001100000010000 lc4128c-tqfp100 LC4128C-TQFP100
+0001001001110001 lfec2-12e LFE2-12E
+0001100000001100 lc4064zc LC4064ZC
--- /dev/null
+#
+# $Id$
+#
+# Copyright (C) 2002 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Marcel Telka <marcel@telka.sk>, 2002.
+#
+
+# bits 31-28 of the Device Identification Register
+
+0000 lc4032v-tqfp48 0
+0001 lc4032v-tqfp48 1
--- /dev/null
+#
+# $Id$
+#
+# JTAG declarations for Lattice LC4032V (48-pin TQFP)
+# Copyright (C) 2002 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Marcel Telka <marcel@telka.sk>, 2002.
+#
+
+signal IOA0 44
+signal IOA1 45
+signal IOA2 46
+signal IOA3 47
+signal IOA4 48
+signal IOA5 2
+signal IOA6 3
+signal IOA7 4
+signal IOA8 7
+signal IOA9 8
+signal IOA10 9
+signal IOA11 10
+signal IOA12 14
+signal IOA13 15
+signal IOA14 16
+signal IOA15 17
+signal IOB0 20
+signal IOB1 21
+signal IOB2 22
+signal IOB3 23
+signal IOB4 24
+signal IOB5 26
+signal IOB6 27
+signal IOB7 28
+signal IOB8 31
+signal IOB9 32
+signal IOB10 33
+signal IOB11 34
+signal IOB12 38
+signal IOB13 39
+signal IOB14 40
+signal IOB15 41
+signal CLK0 43
+signal CLK1 18
+signal CLK2 19
+signal CLK3 42
+signal TDI 1
+signal TCK 11
+signal TMS 25
+signal TDO 35
+signal GND0 5
+signal GND1 29
+signal GND 13 37
+signal VCCO0 6
+signal VCCO1 30
+signal VCC 12 36
+
+
+# mandatory data registers
+register BSR 68 # Boundary Scan Register
+register BR 1 # Bypass Register
+
+# optional data registers
+register DIR 32 # Device Identification Register
+
+instruction length 8
+
+# mandatory instructions
+instruction EXTEST 00000000 BSR
+instruction SAMPLE/PRELOAD 00011100 BSR
+instruction BYPASS 11111111 BR
+
+# optional instructions
+instruction IDCODE 00010110 DIR
+instruction USERCODE 00010111 DIR
+instruction HIGHZ 00011000 BR
+instruction CLAMP 00100000 BR
+
+# ISC instructions
+#instruction ISC_ENABLE 00010101
+#instruction ISC_DISABLE 00011110
+#instruction ISC_NOOP 00110000
+#instruction ISC_ADDRESS_SHIFT 00000001
+#instruction ISC_DATA_SHIFT 00000010
+#instruction ISC_ERASE 00000011
+#instruction ISC_DISCHARGE 00010100
+#instruction ISC_PROGRAM_INCR 00100111
+#instruction ISC_READ_INCR 00101010
+#instruction ISC_PROGRAM_SECURITY 00001001
+#instruction ISC_PROGRAM_DONE 00101111
+#instruction ISC_ERASE_DONE 00100100
+#instruction ISC_PROGRAM_USERCODE 00011010
+#instruction LSC_ADDRESS_INIT 00100001
+
+
+# Boundary Scan Register bit definition
+
+bit 67 I ? CLK0
+bit 66 B ? IOA0 65 0 Z
+bit 65 C 0 IOA0
+bit 64 B ? IOA1 63 0 Z
+bit 63 C 0 IOA1
+bit 62 B ? IOA2 61 0 Z
+bit 61 C 0 IOA2
+bit 60 B ? IOA3 59 0 Z
+bit 59 C 0 IOA3
+bit 58 B ? IOA4 57 0 Z
+bit 57 C 0 IOA4
+bit 56 B ? IOA5 55 0 Z
+bit 55 C 0 IOA5
+bit 54 B ? IOA6 53 0 Z
+bit 53 C 0 IOA6
+bit 52 B ? IOA7 51 0 Z
+bit 51 C 0 IOA7
+bit 50 B ? IOA8 49 0 Z
+bit 49 C 0 IOA8
+bit 48 B ? IOA9 47 0 Z
+bit 47 C 0 IOA9
+bit 46 B ? IOA10 45 0 Z
+bit 45 C 0 IOA10
+bit 44 B ? IOA11 43 0 Z
+bit 43 C 0 IOA11
+bit 42 B ? IOA12 41 0 Z
+bit 41 C 0 IOA12
+bit 40 B ? IOA13 39 0 Z
+bit 39 C 0 IOA13
+bit 38 B ? IOA14 37 0 Z
+bit 37 C 0 IOA14
+bit 36 B ? IOA15 35 0 Z
+bit 35 C 0 IOA15
+bit 34 I ? CLK1
+bit 33 I ? CLK2
+bit 32 B ? IOB0 31 0 Z
+bit 31 C 0 IOB0
+bit 30 B ? IOB1 29 0 Z
+bit 29 C 0 IOB1
+bit 28 B ? IOB2 27 0 Z
+bit 27 C 0 IOB2
+bit 26 B ? IOB3 25 0 Z
+bit 25 C 0 IOB3
+bit 24 B ? IOB4 23 0 Z
+bit 23 C 0 IOB4
+bit 22 B ? IOB5 21 0 Z
+bit 21 C 0 IOB5
+bit 20 B ? IOB6 19 0 Z
+bit 19 C 0 IOB6
+bit 18 B ? IOB7 17 0 Z
+bit 17 C 0 IOB7
+bit 16 B ? IOB8 15 0 Z
+bit 15 C 0 IOB8
+bit 14 B ? IOB9 13 0 Z
+bit 13 C 0 IOB9
+bit 12 B ? IOB10 11 0 Z
+bit 11 C 0 IOB10
+bit 10 B ? IOB11 9 0 Z
+bit 9 C 0 IOB11
+bit 8 B ? IOB12 7 0 Z
+bit 7 C 0 IOB12
+bit 6 B ? IOB13 5 0 Z
+bit 5 C 0 IOB13
+bit 4 B ? IOB14 3 0 Z
+bit 3 C 0 IOB14
+bit 2 B ? IOB15 1 0 Z
+bit 1 C 0 IOB15
+bit 0 I ? CLK3
--- /dev/null
+#
+# $Id$
+#
+# Copyright (C) 2002 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Marcel Telka <marcel@telka.sk>, 2002.
+#
+
+# bits 31-28 of the Device Identification Register
+
+0001 lc4064zc 0
+0011 lc4064zc 1
+0101 lc4064zc 2
+0111 lc4064zc 3
+1001 lc4064zc 4
+1011 lc4064zc 5
+1101 lc4064zc 6
+1111 lc4064zc 7
--- /dev/null
+##############################################################################
+#
+# Lattice LC4064ZC part description file
+#
+# This file represents the superset of the following packages:
+# * TQFP 48
+# * csBGA 56
+# * TQFP 100
+# * csBGA 132
+#
+##############################################################################
+
+signal IOA8
+signal IOA9
+signal IOA10
+signal IOA11
+signal IOA12
+signal IOA13
+signal IOA14
+signal IOA15
+signal I0
+signal I1
+signal I2
+signal I3
+signal I4
+signal I5
+signal IOB15
+signal IOB14
+signal IOB13
+signal IOB12
+signal IOB11
+signal IOB10
+signal IOB9
+signal IOB8
+signal IOB7
+signal IOB6
+signal IOB5
+signal IOB4
+signal IOB3
+signal IOB2
+signal IOB1
+signal IOB0
+signal CLK1
+signal CLK2
+signal IOC0
+signal IOC1
+signal IOC2
+signal IOC3
+signal IOC4
+signal IOC5
+signal IOC6
+signal IOC7
+signal IOC8
+signal IOC9
+signal IOC10
+signal IOC11
+signal IOC12
+signal IOC13
+signal IOC14
+signal IOC15
+signal IOD15
+signal IOD14
+signal IOD13
+signal IOD12
+signal IOD11
+signal IOD10
+signal IOD9
+signal IOD8
+signal IOD7
+signal IOD6
+signal IOD5
+signal IOD4
+signal IOD3
+signal IOD2
+signal IOD1
+signal IOD0
+signal CLK3
+signal CLK0
+signal IOA0
+signal IOA1
+signal IOA2
+signal IOA3
+signal IOA4
+signal IOA5
+signal IOA6
+
+register BSR 138
+register BR 1
+register DIR 32
+
+instruction length 8
+
+instruction BYPASS 11111111 BR
+instruction SAMPLE/PRELOAD 00011100 BSR
+instruction EXTEST 00000000 BSR
+instruction IDCODE 00010110 DIR
+instruction USERCODE 00010111 DIR
+instruction HIGHZ 00011000 BR
+instruction CLAMP 00100000 BR
+
+bit 137 I 1 CLK0
+bit 136 B 1 IOA0 135 0 Z
+bit 135 C 0 *
+bit 134 B 1 IOA1 133 0 Z
+bit 133 C 0 *
+bit 132 B 1 IOA2 131 0 Z
+bit 131 C 0 *
+bit 130 B 1 IOA3 129 0 Z
+bit 129 C 0 *
+bit 128 B 1 IOA4 127 0 Z
+bit 127 C 0 *
+bit 126 B 1 IOA5 125 0 Z
+bit 125 C 0 *
+bit 124 B 1 IOA6 123 0 Z
+bit 123 C 0 *
+bit 122 B 1 IOA7 121 0 Z
+bit 121 C 0 *
+bit 120 B 1 IOA8 119 0 Z
+bit 119 C 0 *
+bit 118 B 1 IOA9 117 0 Z
+bit 117 C 0 *
+bit 116 B 1 IOA10 115 0 Z
+bit 115 C 0 *
+bit 114 B 1 IOA11 113 0 Z
+bit 113 C 0 *
+bit 112 B 1 IOA12 111 0 Z
+bit 111 C 0 *
+bit 110 B 1 IOA13 109 0 Z
+bit 109 C 0 *
+bit 108 B 1 IOA14 107 0 Z
+bit 107 C 0 *
+bit 106 B 1 IOA15 105 0 Z
+bit 105 C 0 *
+bit 104 I 1 I0
+bit 103 I 1 I1
+bit 102 I 1 I2
+bit 101 B 1 IOB0 100 0 Z
+bit 100 C 0 *
+bit 99 B 1 IOB1 98 0 Z
+bit 98 C 0 *
+bit 97 B 1 IOB2 96 0 Z
+bit 96 C 0 *
+bit 95 B 1 IOB3 94 0 Z
+bit 94 C 0 *
+bit 93 B 1 IOB4 92 0 Z
+bit 92 C 0 *
+bit 91 B 1 IOB5 90 0 Z
+bit 90 C 0 *
+bit 89 B 1 IOB6 88 0 Z
+bit 88 C 0 *
+bit 87 B 1 IOB7 86 0 Z
+bit 86 C 0 *
+bit 85 B 1 IOB8 84 0 Z
+bit 84 C 0 *
+bit 83 B 1 IOB9 82 0 Z
+bit 82 C 0 *
+bit 81 B 1 IOB10 80 0 Z
+bit 80 C 0 *
+bit 79 B 1 IOB11 78 0 Z
+bit 78 C 0 *
+bit 77 B 1 IOB12 76 0 Z
+bit 76 C 0 *
+bit 75 B 1 IOB13 74 0 Z
+bit 74 C 0 *
+bit 73 B 1 IOB14 72 0 Z
+bit 72 C 0 *
+bit 71 B 1 IOB15 70 0 Z
+bit 70 C 0 *
+bit 69 I 1 CLK1
+bit 68 I 1 CLK2
+bit 67 B 1 IOC0 66 0 Z
+bit 66 C 0 *
+bit 65 B 1 IOC1 64 0 Z
+bit 64 C 0 *
+bit 63 B 1 IOC2 62 0 Z
+bit 62 C 0 *
+bit 61 B 1 IOC3 60 0 Z
+bit 60 C 0 *
+bit 59 B 1 IOC4 58 0 Z
+bit 58 C 0 *
+bit 57 B 1 IOC5 56 0 Z
+bit 56 C 0 *
+bit 55 B 1 IOC6 54 0 Z
+bit 54 C 0 *
+bit 53 B 1 IOC7 52 0 Z
+bit 52 C 0 *
+bit 51 B 1 IOC8 50 0 Z
+bit 50 C 0 *
+bit 49 B 1 IOC9 48 0 Z
+bit 48 C 0 *
+bit 47 B 1 IOC10 46 0 Z
+bit 46 C 0 *
+bit 45 B 1 IOC11 44 0 Z
+bit 44 C 0 *
+bit 43 B 1 IOC12 42 0 Z
+bit 42 C 0 *
+bit 41 B 1 IOC13 40 0 Z
+bit 40 C 0 *
+bit 39 B 1 IOC14 38 0 Z
+bit 38 C 0 *
+bit 37 B 1 IOC15 36 0 Z
+bit 36 C 0 *
+bit 35 I 1 I3
+bit 34 I 1 I4
+bit 33 I 1 I5
+bit 32 B 1 IOD0 31 0 Z
+bit 31 C 0 *
+bit 30 B 1 IOD1 29 0 Z
+bit 29 C 0 *
+bit 28 B 1 IOD2 27 0 Z
+bit 27 C 0 *
+bit 26 B 1 IOD3 25 0 Z
+bit 25 C 0 *
+bit 24 B 1 IOD4 23 0 Z
+bit 23 C 0 *
+bit 22 B 1 IOD5 21 0 Z
+bit 21 C 0 *
+bit 20 B 1 IOD6 19 0 Z
+bit 19 C 0 *
+bit 18 B 1 IOD7 17 0 Z
+bit 17 C 0 *
+bit 16 B 1 IOD8 15 0 Z
+bit 15 C 0 *
+bit 14 B 1 IOD9 13 0 Z
+bit 13 C 0 *
+bit 12 B 1 IOD10 11 0 Z
+bit 11 C 0 *
+bit 10 B 1 IOD11 9 0 Z
+bit 9 C 0 *
+bit 8 B 1 IOD12 7 0 Z
+bit 7 C 0 *
+bit 6 B 1 IOD13 5 0 Z
+bit 5 C 0 *
+bit 4 B 1 IOD14 3 0 Z
+bit 3 C 0 *
+bit 2 B 1 IOD15 1 0 Z
+bit 1 C 0 *
+bit 0 I 1 CLK3
--- /dev/null
+#
+# $Id$
+#
+# Copyright (C) 2004 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Ian Campbell <icampbell@arcom.com>, 2004
+#
+
+# bits 31-28 of the Device Identification Register
+0000 lc4128c-tqfp100 0
--- /dev/null
+#
+# $Id$
+#
+# JTAG declarations for Lattice LC4128C (100-pin TQFP)
+# Copyright (C) 2004 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Generated from lc4128ct100_isc.bsm using bsdl2jtag by
+# Ian Campbell <icampbell@arcom.com>, 2004.
+#
+# lc4128ct100_isc.bsm had the following copyright:
+# Copyright 2000 - 2003 Lattice Semiconductor Corporation
+# 5555 NE Moore Ct., Hillsboro, OR 97124
+# All rights reserved. No part of this program or publication
+# may be reproduced, transmitted, transcribed, stored in a
+# retrieval system, or translated into any language or
+# computer language, in any form or by any means without this
+# notice appearing within.
+
+signal GND0 1
+signal GND1 2
+signal GND2 3
+signal GND3 4
+signal TDI 5
+signal IOB0 6
+signal IOB2 7
+signal IOB4 8
+signal IOB6 9
+signal GNDO00 10
+signal GNDO01 11
+signal GNDO02 12
+signal GNDO03 13
+signal IOB8 14
+signal IOB10 15
+signal IOB12 16
+signal IOB13 17
+signal I0 18
+signal I1 19
+signal I2 20
+signal I3 21
+signal I4 22
+signal I5 23
+signal VCCO00 24
+signal VCCO01 25
+signal VCCO02 26
+signal IOC14 27
+signal IOC12 28
+signal IOC10 29
+signal IOC8 30
+signal IOC6 31
+signal IOC5 32
+signal IOC4 33
+signal IOC2 34
+signal TCK 35
+signal VCC0 36
+signal VCC1 37
+signal VCC2 38
+signal VCC3 39
+signal IOD13 40
+signal IOD12 41
+signal IOD10 42
+signal IOD8 43
+signal IOD6 44
+signal IOD4 45
+signal IOD2 46
+signal IOD0 47
+signal CLK1 48
+signal CLK2 49
+signal IOE0 50
+signal IOE2 51
+signal IOE4 52
+signal IOE6 53
+signal VCCO10 54
+signal VCCO11 55
+signal VCCO12 56
+signal GNDO10 57
+signal GNDO11 58
+signal GNDO12 59
+signal GNDO13 60
+signal IOE8 61
+signal IOE10 62
+signal IOE12 63
+signal IOE14 64
+signal TMS 65
+signal IOF0 66
+signal IOF2 67
+signal IOF4 68
+signal IOF6 69
+signal IOF8 70
+signal IOF10 71
+signal IOF12 72
+signal IOF13 73
+signal IOG14 74
+signal IOG12 75
+signal IOG10 76
+signal IOG8 77
+signal IOG6 78
+signal IOG5 79
+signal IOG4 80
+signal IOG2 81
+signal TDO 82
+signal IOH13 83
+signal IOH12 84
+signal IOH10 85
+signal IOH8 86
+signal IOH6 87
+signal IOH4 88
+signal IOH2 89
+signal IOH0 90
+signal CLK3 91
+signal CLK0 92
+signal IOA0 93
+signal IOA2 94
+signal IOA4 95
+signal IOA6 96
+signal IOA8 97
+signal IOA10 98
+signal IOA12 99
+
+register BSR 196
+register BR 1
+register DIR 32
+
+instruction length 8
+
+instruction BYPASS 11111111 BR
+instruction SAMPLE/PRELOAD 00011100 BSR
+instruction EXTEST 00000000 BSR
+instruction IDCODE 00010110 DIR
+
+bit 195 I 1 CLK0
+bit 194 O 1 IOA0 193 0 Z
+bit 193 C 0 *
+bit 192 O 0 *
+bit 191 O 0 *
+bit 190 O 1 IOA2 189 0 Z
+bit 189 C 0 *
+bit 188 O 1 IOA4 187 0 Z
+bit 187 C 0 *
+bit 186 O 0 *
+bit 185 O 0 *
+bit 184 O 1 IOA6 183 0 Z
+bit 183 C 0 *
+bit 182 O 1 IOA8 181 0 Z
+bit 181 C 0 *
+bit 180 O 0 *
+bit 179 O 0 *
+bit 178 O 1 IOA10 177 0 Z
+bit 177 C 0 *
+bit 176 O 1 IOA12 175 0 Z
+bit 175 C 0 *
+bit 174 O 0 *
+bit 173 O 0 *
+bit 172 O 1 IOA14 171 0 Z
+bit 171 C 0 *
+bit 170 O 1 IOB0 169 0 Z
+bit 169 C 0 *
+bit 168 O 0 *
+bit 167 O 0 *
+bit 166 O 1 IOB2 165 0 Z
+bit 165 C 0 *
+bit 164 O 1 IOB4 163 0 Z
+bit 163 C 0 *
+bit 162 O 0 *
+bit 161 O 0 *
+bit 160 O 1 IOB6 159 0 Z
+bit 159 C 0 *
+bit 158 O 1 IOB8 157 0 Z
+bit 157 C 0 *
+bit 156 O 0 *
+bit 155 O 0 *
+bit 154 O 1 IOB10 153 0 Z
+bit 153 C 0 *
+bit 152 O 1 IOB12 151 0 Z
+bit 151 C 0 *
+bit 150 O 1 IOB13 149 0 Z
+bit 149 C 0 *
+bit 148 O 1 I0 147 0 Z
+bit 147 C 0 *
+bit 146 O 1 IOD0 145 0 Z
+bit 145 C 0 *
+bit 144 O 0 *
+bit 143 O 0 *
+bit 142 O 1 IOD2 141 0 Z
+bit 141 C 0 *
+bit 140 O 1 IOD4 139 0 Z
+bit 139 C 0 *
+bit 138 O 0 *
+bit 137 O 0 *
+bit 136 O 1 IOD6 135 0 Z
+bit 135 C 0 *
+bit 134 O 1 IOD8 133 0 Z
+bit 133 C 0 *
+bit 132 O 0 *
+bit 131 O 0 *
+bit 130 O 1 IOD10 129 0 Z
+bit 129 C 0 *
+bit 128 O 1 IOD12 127 0 Z
+bit 127 C 0 *
+bit 126 O 1 IOD13 125 0 Z
+bit 125 C 0 *
+bit 124 O 1 I2 123 0 Z
+bit 123 C 0 *
+bit 122 O 1 I1 121 0 Z
+bit 121 C 0 *
+bit 120 O 0 *
+bit 119 O 0 *
+bit 118 O 1 IOC2 117 0 Z
+bit 117 C 0 *
+bit 116 O 1 IOC4 115 0 Z
+bit 115 C 0 *
+bit 114 O 1 IOC5 113 0 Z
+bit 113 C 0 *
+bit 112 O 1 IOC6 111 0 Z
+bit 111 C 0 *
+bit 110 O 1 IOC8 109 0 Z
+bit 109 C 0 *
+bit 108 O 0 *
+bit 107 O 0 *
+bit 106 O 1 IOC10 105 0 Z
+bit 105 C 0 *
+bit 104 O 1 IOC12 103 0 Z
+bit 103 C 0 *
+bit 102 O 0 *
+bit 101 O 0 *
+bit 100 O 1 IOC14 99 0 Z
+bit 99 C 0 *
+bit 98 I 1 CLK1
+bit 97 I 1 CLK2
+bit 96 O 1 IOE0 95 0 Z
+bit 95 C 0 *
+bit 94 O 0 *
+bit 93 O 0 *
+bit 92 O 1 IOE2 91 0 Z
+bit 91 C 0 *
+bit 90 O 1 IOE4 89 0 Z
+bit 89 C 0 *
+bit 88 O 0 *
+bit 87 O 0 *
+bit 86 O 1 IOE6 85 0 Z
+bit 85 C 0 *
+bit 84 O 1 IOE8 83 0 Z
+bit 83 C 0 *
+bit 82 O 0 *
+bit 81 O 0 *
+bit 80 O 1 IOE10 79 0 Z
+bit 79 C 0 *
+bit 78 O 1 IOE12 77 0 Z
+bit 77 C 0 *
+bit 76 O 0 *
+bit 75 O 0 *
+bit 74 O 1 IOE14 73 0 Z
+bit 73 C 0 *
+bit 72 O 1 IOF0 71 0 Z
+bit 71 C 0 *
+bit 70 O 0 *
+bit 69 O 0 *
+bit 68 O 1 IOF2 67 0 Z
+bit 67 C 0 *
+bit 66 O 1 IOF4 65 0 Z
+bit 65 C 0 *
+bit 64 O 0 *
+bit 63 O 0 *
+bit 62 O 1 IOF6 61 0 Z
+bit 61 C 0 *
+bit 60 O 1 IOF8 59 0 Z
+bit 59 C 0 *
+bit 58 O 0 *
+bit 57 O 0 *
+bit 56 O 1 IOF10 55 0 Z
+bit 55 C 0 *
+bit 54 O 1 IOF12 53 0 Z
+bit 53 C 0 *
+bit 52 O 1 IOF13 51 0 Z
+bit 51 C 0 *
+bit 50 O 1 I3 49 0 Z
+bit 49 C 0 *
+bit 48 O 1 IOH0 47 0 Z
+bit 47 C 0 *
+bit 46 O 0 *
+bit 45 O 0 *
+bit 44 O 1 IOH2 43 0 Z
+bit 43 C 0 *
+bit 42 O 1 IOH4 41 0 Z
+bit 41 C 0 *
+bit 40 O 0 *
+bit 39 O 0 *
+bit 38 O 1 IOH6 37 0 Z
+bit 37 C 0 *
+bit 36 O 1 IOH8 35 0 Z
+bit 35 C 0 *
+bit 34 O 0 *
+bit 33 O 0 *
+bit 32 O 1 IOH10 31 0 Z
+bit 31 C 0 *
+bit 30 O 1 IOH12 29 0 Z
+bit 29 C 0 *
+bit 28 O 1 IOH13 27 0 Z
+bit 27 C 0 *
+bit 26 O 1 I5 25 0 Z
+bit 25 C 0 *
+bit 24 O 1 I4 23 0 Z
+bit 23 C 0 *
+bit 22 O 0 *
+bit 21 O 0 *
+bit 20 O 1 IOG2 19 0 Z
+bit 19 C 0 *
+bit 18 O 1 IOG4 17 0 Z
+bit 17 C 0 *
+bit 16 O 1 IOG5 15 0 Z
+bit 15 C 0 *
+bit 14 O 1 IOG6 13 0 Z
+bit 13 C 0 *
+bit 12 O 1 IOG8 11 0 Z
+bit 11 C 0 *
+bit 10 O 0 *
+bit 9 O 0 *
+bit 8 O 1 IOG10 7 0 Z
+bit 7 C 0 *
+bit 6 O 1 IOG12 5 0 Z
+bit 5 C 0 *
+bit 4 O 0 *
+bit 3 O 0 *
+bit 2 O 1 IOG14 1 0 Z
+bit 1 C 0 *
+bit 0 I 1 CLK3
--- /dev/null
+#
+# $Id$
+#
+# Copyright (C) 2002 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Marcel Telka <marcel@telka.sk>, 2002.
+#
+
+# bits 31-28 of the Device Identification Register
+
+0000 lfec2-12e 0
--- /dev/null
+##############################################################################
+#
+# Lattice LFEC2_12E part description file
+#
+# This file represents the superset of the following packages:
+# * TQFP 144
+# * PQFP 208
+# * FPBGA 256
+# * FPBGA 484
+#
+##############################################################################
+
+signal PT2A
+signal PT2B
+signal PT3A
+signal PT3B
+signal PT4A
+signal PT5A
+signal PT4B
+signal PT5B
+signal PT6A
+signal PT7A
+signal PT6B
+signal PT7B
+signal PT8A
+signal PT9A
+signal PT8B
+signal PT9B
+signal PT10A
+signal PT10B
+signal PT11A
+signal PT12A
+signal PT11B
+signal PT12B
+signal PT13A
+signal PT14A
+signal PT13B
+signal PT14B
+signal PT15A
+signal PT16A
+signal PT15B
+signal PT16B
+signal PT17A
+signal PT18A
+signal PT17B
+signal PT18B
+signal PT20A
+signal PT21A
+signal PT20B
+signal PT21B
+signal PT22A
+signal PT22B
+signal PT23A
+signal PT23B
+signal PT24A
+signal PT25A
+signal PT24B
+signal PT25B
+signal PT26A
+signal PT27A
+signal PT26B
+signal PT27B
+signal PT28A
+signal PT28B
+signal PT30A
+signal PT30B
+signal PT31A
+signal PT31B
+signal PT32A
+signal PT32B
+signal PT33A
+signal PT34A
+signal PT33B
+signal PT34B
+signal PT35A
+signal PT36A
+signal PT35B
+signal PT36B
+signal PT37A
+signal PT37B
+signal PT39A
+signal PT39B
+signal PT40A
+signal PT40B
+signal PT42A
+signal PT43A
+signal PT42B
+signal PT43B
+signal PT44A
+signal PT45A
+signal PT44B
+signal PT45B
+signal PT46A
+signal PT46B
+signal PT47A
+signal PT48A
+signal PT47B
+signal PT48B
+signal PT49A
+signal PT50A
+signal PT49B
+signal PT50B
+signal PT51A
+signal PT52A
+signal PT51B
+signal PT52B
+signal PT53A
+signal PT54A
+signal PT53B
+signal PT54B
+signal PT55A
+signal PT55B
+signal PR3A
+signal PR2A
+signal PR3B
+signal PR2B
+signal PR5A
+signal PR4A
+signal PR5B
+signal PR4B
+signal PR7A
+signal PR6A
+signal PR7B
+signal PR6B
+signal PR9A
+signal PR8A
+signal PR9B
+signal PR8B
+signal PR10A
+signal PR10B
+signal PR12A
+signal PR11A
+signal PR12B
+signal PR11B
+signal PR13A
+signal PR13B
+signal PR15A
+signal PR15B
+signal PR16A
+signal PR16B
+signal PR17A
+signal PR17B
+signal PR18A
+signal PR18B
+signal PR20A
+signal PR20B
+signal PR22A
+signal PR22B
+signal PR21A
+signal PR21B
+signal PR23B
+signal PR23A
+signal PR24A
+signal PR24B
+signal PR25A
+signal PR26B
+signal PR25B
+signal PR27A
+signal PR26A
+signal PR27B
+signal PR28A
+signal PR29A
+signal PR28B
+signal DONE
+signal PR30A
+signal CCLK
+signal PR29B
+signal INITN
+signal PR30B
+signal CFG0
+signal PROGRAMN
+signal CFG1
+signal CFG2
+signal PB55B
+signal PB55A
+signal PB54B
+signal PB53B
+signal PB54A
+signal PB53A
+signal PB52B
+signal PB51B
+signal PB52A
+signal PB51A
+signal PB50B
+signal PB49B
+signal PB50A
+signal PB49A
+signal PB48B
+signal PB48A
+signal PB47B
+signal PB47A
+signal PB46B
+signal PB46A
+signal PB45B
+signal PB44B
+signal PB45A
+signal PB44A
+signal PB43B
+signal PB42B
+signal PB43A
+signal PB42A
+signal PB41B
+signal PB40B
+signal PB41A
+signal PB40A
+signal PB39B
+signal PB39A
+signal PB37B
+signal PB37A
+signal PB36B
+signal PB35B
+signal PB36A
+signal PB35A
+signal PB34B
+signal PB33B
+signal PB34A
+signal PB33A
+signal PB32B
+signal PB32A
+signal PB31B
+signal PB31A
+signal PB26B
+signal PB26A
+signal PB25B
+signal PB24B
+signal PB25A
+signal PB24A
+signal PB23B
+signal PB22B
+signal PB23A
+signal PB22A
+signal PB21B
+signal PB20B
+signal PB21A
+signal PB20A
+signal PB18B
+signal PB17B
+signal PB18A
+signal PB17A
+signal PB16B
+signal PB15B
+signal PB16A
+signal PB15A
+signal PB14B
+signal PB13B
+signal PB14A
+signal PB13A
+signal PB12B
+signal PB11B
+signal PB12A
+signal PB11A
+signal PB9B
+signal PB8B
+signal PB9A
+signal PB8A
+signal PB7B
+signal PB6B
+signal PB7A
+signal PB6A
+signal PB5B
+signal PB4B
+signal PB5A
+signal PB4A
+signal PB3B
+signal PB2B
+signal PB3A
+signal PB2A
+signal PL30B
+signal PL31B
+signal PL30A
+signal PL31A
+signal PL28B
+signal PL29B
+signal PL28A
+signal PL29A
+signal PL27B
+signal PL26B
+signal PL27A
+signal PL26A
+signal PL25B
+signal PL24B
+signal PL25A
+signal PL24A
+signal PL23B
+signal PL22B
+signal PL21B
+signal PL23A
+signal PL22A
+signal PL20B
+signal PL21A
+signal PL20A
+signal PL18B
+signal PL18A
+signal PL17B
+signal PL17A
+signal PL16B
+signal PL16A
+signal PL15B
+signal PL15A
+signal PL13B
+signal PL13A
+signal PL12B
+signal PL12A
+signal PL11B
+signal PL11A
+signal PL10B
+signal PL10A
+signal PL8B
+signal PL9B
+signal PL8A
+signal PL9A
+signal PL7B
+signal PL6B
+signal PL6A
+signal PL7A
+signal PL4B
+signal PL5B
+signal PL4A
+signal PL5A
+signal PL2B
+signal PL3B
+signal PL2A
+signal PL3A
+
+register BSR 643
+register BR 1
+register DIR 32
+
+instruction length 8
+
+instruction IDCODE 00011001 DIR
+instruction SAMPLE/PRELOAD 00011100 BSR
+instruction BYPASS 11111111 BR
+instruction EXTEST 11010101 BSR
+instruction USERCODE 00010111 DIR
+instruction HIGHZ 00011000 BYPASS
+instruction CLAMP 00100000 BYPASS
+
+bit 642 B 1 PB26B 641 1 Z
+bit 641 C 1 *
+bit 640 B 1 PB26A 639 1 Z
+bit 639 C 1 *
+bit 638 B 1 PB25B 637 1 Z
+bit 637 C 1 *
+bit 636 B 1 PB25A 635 1 Z
+bit 635 C 1 *
+bit 634 B 1 PB24B 633 1 Z
+bit 633 C 1 *
+bit 632 B 1 PB24A 631 1 Z
+bit 631 C 1 *
+bit 630 B 1 PB23B 629 1 Z
+bit 629 C 1 *
+bit 628 B 1 PB23A 627 1 Z
+bit 627 C 1 *
+bit 626 B 1 PB22B 625 1 Z
+bit 625 C 1 *
+bit 624 B 1 PB22A 623 1 Z
+bit 623 C 1 *
+bit 622 B 1 PB21B 621 1 Z
+bit 621 C 1 *
+bit 620 B 1 PB21A 619 1 Z
+bit 619 C 1 *
+bit 618 B 1 PB20B 617 1 Z
+bit 617 C 1 *
+bit 616 B 1 PB20A 615 1 Z
+bit 615 C 1 *
+bit 614 O 1 *
+bit 613 O 1 *
+bit 612 O 1 *
+bit 611 O 1 *
+bit 610 B 1 PB18B 609 1 Z
+bit 609 C 1 *
+bit 608 B 1 PB18A 607 1 Z
+bit 607 C 1 *
+bit 606 B 1 PB17B 605 1 Z
+bit 605 C 1 *
+bit 604 B 1 PB17A 603 1 Z
+bit 603 C 1 *
+bit 602 B 1 PB16B 601 1 Z
+bit 601 C 1 *
+bit 600 B 1 PB16A 599 1 Z
+bit 599 C 1 *
+bit 598 B 1 PB15B 597 1 Z
+bit 597 C 1 *
+bit 596 B 1 PB15A 595 1 Z
+bit 595 C 1 *
+bit 594 B 1 PB14B 593 1 Z
+bit 593 C 1 *
+bit 592 B 1 PB14A 591 1 Z
+bit 591 C 1 *
+bit 590 B 1 PB13B 589 1 Z
+bit 589 C 1 *
+bit 588 B 1 PB13A 587 1 Z
+bit 587 C 1 *
+bit 586 B 1 PB12B 585 1 Z
+bit 585 C 1 *
+bit 584 B 1 PB12A 583 1 Z
+bit 583 C 1 *
+bit 582 B 1 PB11B 581 1 Z
+bit 581 C 1 *
+bit 580 B 1 PB11A 579 1 Z
+bit 579 C 1 *
+bit 578 O 1 *
+bit 577 O 1 *
+bit 576 O 1 *
+bit 575 O 1 *
+bit 574 B 1 PB9B 573 1 Z
+bit 573 C 1 *
+bit 572 B 1 PB9A 571 1 Z
+bit 571 C 1 *
+bit 570 B 1 PB8B 569 1 Z
+bit 569 C 1 *
+bit 568 B 1 PB8A 567 1 Z
+bit 567 C 1 *
+bit 566 B 1 PB7B 565 1 Z
+bit 565 C 1 *
+bit 564 B 1 PB7A 563 1 Z
+bit 563 C 1 *
+bit 562 B 1 PB6B 561 1 Z
+bit 561 C 1 *
+bit 560 B 1 PB6A 559 1 Z
+bit 559 C 1 *
+bit 558 B 1 PB5B 557 1 Z
+bit 557 C 1 *
+bit 556 B 1 PB5A 555 1 Z
+bit 555 C 1 *
+bit 554 B 1 PB4B 553 1 Z
+bit 553 C 1 *
+bit 552 B 1 PB4A 551 1 Z
+bit 551 C 1 *
+bit 550 B 1 PB3B 549 1 Z
+bit 549 C 1 *
+bit 548 B 1 PB3A 547 1 Z
+bit 547 C 1 *
+bit 546 B 1 PB2B 545 1 Z
+bit 545 C 1 *
+bit 544 B 1 PB2A 543 1 Z
+bit 543 C 1 *
+bit 542 O 1 *
+bit 541 B 1 PL31B 540 1 Z
+bit 540 C 1 *
+bit 539 B 1 PL31A 538 1 Z
+bit 538 C 1 *
+bit 537 B 1 PL30B 536 1 Z
+bit 536 C 1 *
+bit 535 B 1 PL30A 534 1 Z
+bit 534 C 1 *
+bit 533 B 1 PL29B 532 1 Z
+bit 532 C 1 *
+bit 531 B 1 PL29A 530 1 Z
+bit 530 C 1 *
+bit 529 B 1 PL28B 528 1 Z
+bit 528 C 1 *
+bit 527 B 1 PL28A 526 1 Z
+bit 526 C 1 *
+bit 525 B 1 PL27B 524 1 Z
+bit 524 C 1 *
+bit 523 B 1 PL27A 522 1 Z
+bit 522 C 1 *
+bit 521 B 1 PL26B 520 1 Z
+bit 520 C 1 *
+bit 519 B 1 PL26A 518 1 Z
+bit 518 C 1 *
+bit 517 B 1 PL25B 516 1 Z
+bit 516 C 1 *
+bit 515 B 1 PL25A 514 1 Z
+bit 514 C 1 *
+bit 513 B 1 PL24B 512 1 Z
+bit 512 C 1 *
+bit 511 B 1 PL24A 510 1 Z
+bit 510 C 1 *
+bit 509 B 1 PL23B 508 1 Z
+bit 508 C 1 *
+bit 507 B 1 PL23A 506 1 Z
+bit 506 C 1 *
+bit 505 B 1 PL22B 504 1 Z
+bit 504 C 1 *
+bit 503 B 1 PL22A 502 1 Z
+bit 502 C 1 *
+bit 501 B 1 PL21B 500 1 Z
+bit 500 C 1 *
+bit 499 B 1 PL21A 498 1 Z
+bit 498 C 1 *
+bit 497 B 1 PL20B 496 1 Z
+bit 496 C 1 *
+bit 495 B 1 PL20A 494 1 Z
+bit 494 C 1 *
+bit 493 B 1 PL18B 492 1 Z
+bit 492 C 1 *
+bit 491 B 1 PL18A 490 1 Z
+bit 490 C 1 *
+bit 489 B 1 PL17B 488 1 Z
+bit 488 C 1 *
+bit 487 B 1 PL17A 486 1 Z
+bit 486 C 1 *
+bit 485 B 1 PL16B 484 1 Z
+bit 484 C 1 *
+bit 483 B 1 PL16A 482 1 Z
+bit 482 C 1 *
+bit 481 B 1 PL15B 480 1 Z
+bit 480 C 1 *
+bit 479 B 1 PL15A 478 1 Z
+bit 478 C 1 *
+bit 477 B 1 PL13B 476 1 Z
+bit 476 C 1 *
+bit 475 B 1 PL13A 474 1 Z
+bit 474 C 1 *
+bit 473 B 1 PL12B 472 1 Z
+bit 472 C 1 *
+bit 471 B 1 PL12A 470 1 Z
+bit 470 C 1 *
+bit 469 B 1 PL11B 468 1 Z
+bit 468 C 1 *
+bit 467 B 1 PL11A 466 1 Z
+bit 466 C 1 *
+bit 465 B 1 PL10B 464 1 Z
+bit 464 C 1 *
+bit 463 B 1 PL10A 462 1 Z
+bit 462 C 1 *
+bit 461 B 1 PL9B 460 1 Z
+bit 460 C 1 *
+bit 459 B 1 PL9A 458 1 Z
+bit 458 C 1 *
+bit 457 B 1 PL8B 456 1 Z
+bit 456 C 1 *
+bit 455 B 1 PL8A 454 1 Z
+bit 454 C 1 *
+bit 453 B 1 PL7B 452 1 Z
+bit 452 C 1 *
+bit 451 B 1 PL7A 450 1 Z
+bit 450 C 1 *
+bit 449 B 1 PL6B 448 1 Z
+bit 448 C 1 *
+bit 447 B 1 PL6A 446 1 Z
+bit 446 C 1 *
+bit 445 B 1 PL5B 444 1 Z
+bit 444 C 1 *
+bit 443 B 1 PL5A 442 1 Z
+bit 442 C 1 *
+bit 441 B 1 PL4B 440 1 Z
+bit 440 C 1 *
+bit 439 B 1 PL4A 438 1 Z
+bit 438 C 1 *
+bit 437 B 1 PL3B 436 1 Z
+bit 436 C 1 *
+bit 435 B 1 PL3A 434 1 Z
+bit 434 C 1 *
+bit 433 B 1 PL2B 432 1 Z
+bit 432 C 1 *
+bit 431 B 1 PL2A 430 1 Z
+bit 430 C 1 *
+bit 429 B 1 PT2A 428 1 Z
+bit 428 C 1 *
+bit 427 B 1 PT2B 426 1 Z
+bit 426 C 1 *
+bit 425 B 1 PT3A 424 1 Z
+bit 424 C 1 *
+bit 423 B 1 PT3B 422 1 Z
+bit 422 C 1 *
+bit 421 B 1 PT4A 420 1 Z
+bit 420 C 1 *
+bit 419 B 1 PT4B 418 1 Z
+bit 418 C 1 *
+bit 417 B 1 PT5A 416 1 Z
+bit 416 C 1 *
+bit 415 B 1 PT5B 414 1 Z
+bit 414 C 1 *
+bit 413 B 1 PT6A 412 1 Z
+bit 412 C 1 *
+bit 411 B 1 PT6B 410 1 Z
+bit 410 C 1 *
+bit 409 B 1 PT7A 408 1 Z
+bit 408 C 1 *
+bit 407 B 1 PT7B 406 1 Z
+bit 406 C 1 *
+bit 405 B 1 PT8A 404 1 Z
+bit 404 C 1 *
+bit 403 B 1 PT8B 402 1 Z
+bit 402 C 1 *
+bit 401 B 1 PT9A 400 1 Z
+bit 400 C 1 *
+bit 399 B 1 PT9B 398 1 Z
+bit 398 C 1 *
+bit 397 B 1 PT10A 396 1 Z
+bit 396 C 1 *
+bit 395 B 1 PT10B 394 1 Z
+bit 394 C 1 *
+bit 393 B 1 PT11A 392 1 Z
+bit 392 C 1 *
+bit 391 B 1 PT11B 390 1 Z
+bit 390 C 1 *
+bit 389 B 1 PT12A 388 1 Z
+bit 388 C 1 *
+bit 387 B 1 PT12B 386 1 Z
+bit 386 C 1 *
+bit 385 B 1 PT13A 384 1 Z
+bit 384 C 1 *
+bit 383 B 1 PT13B 382 1 Z
+bit 382 C 1 *
+bit 381 B 1 PT14A 380 1 Z
+bit 380 C 1 *
+bit 379 B 1 PT14B 378 1 Z
+bit 378 C 1 *
+bit 377 B 1 PT15A 376 1 Z
+bit 376 C 1 *
+bit 375 B 1 PT15B 374 1 Z
+bit 374 C 1 *
+bit 373 B 1 PT16A 372 1 Z
+bit 372 C 1 *
+bit 371 B 1 PT16B 370 1 Z
+bit 370 C 1 *
+bit 369 B 1 PT17A 368 1 Z
+bit 368 C 1 *
+bit 367 B 1 PT17B 366 1 Z
+bit 366 C 1 *
+bit 365 B 1 PT18A 364 1 Z
+bit 364 C 1 *
+bit 363 B 1 PT18B 362 1 Z
+bit 362 C 1 *
+bit 361 O 1 *
+bit 360 O 1 *
+bit 359 O 1 *
+bit 358 O 1 *
+bit 357 B 1 PT20A 356 1 Z
+bit 356 C 1 *
+bit 355 B 1 PT20B 354 1 Z
+bit 354 C 1 *
+bit 353 B 1 PT21A 352 1 Z
+bit 352 C 1 *
+bit 351 B 1 PT21B 350 1 Z
+bit 350 C 1 *
+bit 349 B 1 PT22A 348 1 Z
+bit 348 C 1 *
+bit 347 B 1 PT22B 346 1 Z
+bit 346 C 1 *
+bit 345 B 1 PT23A 344 1 Z
+bit 344 C 1 *
+bit 343 B 1 PT23B 342 1 Z
+bit 342 C 1 *
+bit 341 B 1 PT24A 340 1 Z
+bit 340 C 1 *
+bit 339 B 1 PT24B 338 1 Z
+bit 338 C 1 *
+bit 337 B 1 PT25A 336 1 Z
+bit 336 C 1 *
+bit 335 B 1 PT25B 334 1 Z
+bit 334 C 1 *
+bit 333 B 1 PT26A 332 1 Z
+bit 332 C 1 *
+bit 331 B 1 PT26B 330 1 Z
+bit 330 C 1 *
+bit 329 B 1 PT27A 328 1 Z
+bit 328 C 1 *
+bit 327 B 1 PT27B 326 1 Z
+bit 326 C 1 *
+bit 325 B 1 PT28A 324 1 Z
+bit 324 C 1 *
+bit 323 B 1 PT28B 322 1 Z
+bit 322 C 1 *
+bit 321 B 1 PT30A 320 1 Z
+bit 320 C 1 *
+bit 319 B 1 PT30B 318 1 Z
+bit 318 C 1 *
+bit 317 B 1 PT31A 316 1 Z
+bit 316 C 1 *
+bit 315 B 1 PT31B 314 1 Z
+bit 314 C 1 *
+bit 313 B 1 PT32A 312 1 Z
+bit 312 C 1 *
+bit 311 B 1 PT32B 310 1 Z
+bit 310 C 1 *
+bit 309 B 1 PT33A 308 1 Z
+bit 308 C 1 *
+bit 307 B 1 PT33B 306 1 Z
+bit 306 C 1 *
+bit 305 B 1 PT34A 304 1 Z
+bit 304 C 1 *
+bit 303 B 1 PT34B 302 1 Z
+bit 302 C 1 *
+bit 301 B 1 PT35A 300 1 Z
+bit 300 C 1 *
+bit 299 B 1 PT35B 298 1 Z
+bit 298 C 1 *
+bit 297 B 1 PT36A 296 1 Z
+bit 296 C 1 *
+bit 295 B 1 PT36B 294 1 Z
+bit 294 C 1 *
+bit 293 B 1 PT37A 292 1 Z
+bit 292 C 1 *
+bit 291 B 1 PT37B 290 1 Z
+bit 290 C 1 *
+bit 289 O 1 *
+bit 288 O 1 *
+bit 287 O 1 *
+bit 286 O 1 *
+bit 285 B 1 PT39A 284 1 Z
+bit 284 C 1 *
+bit 283 B 1 PT39B 282 1 Z
+bit 282 C 1 *
+bit 281 B 1 PT40A 280 1 Z
+bit 280 C 1 *
+bit 279 B 1 PT40B 278 1 Z
+bit 278 C 1 *
+bit 277 O 1 *
+bit 276 O 1 *
+bit 275 O 1 *
+bit 274 O 1 *
+bit 273 B 1 PT42A 272 1 Z
+bit 272 C 1 *
+bit 271 B 1 PT42B 270 1 Z
+bit 270 C 1 *
+bit 269 B 1 PT43A 268 1 Z
+bit 268 C 1 *
+bit 267 B 1 PT43B 266 1 Z
+bit 266 C 1 *
+bit 265 B 1 PT44A 264 1 Z
+bit 264 C 1 *
+bit 263 B 1 PT44B 262 1 Z
+bit 262 C 1 *
+bit 261 B 1 PT45A 260 1 Z
+bit 260 C 1 *
+bit 259 B 1 PT45B 258 1 Z
+bit 258 C 1 *
+bit 257 B 1 PT46A 256 1 Z
+bit 256 C 1 *
+bit 255 B 1 PT46B 254 1 Z
+bit 254 C 1 *
+bit 253 B 1 PT47A 252 1 Z
+bit 252 C 1 *
+bit 251 B 1 PT47B 250 1 Z
+bit 250 C 1 *
+bit 249 B 1 PT48A 248 1 Z
+bit 248 C 1 *
+bit 247 B 1 PT48B 246 1 Z
+bit 246 C 1 *
+bit 245 B 1 PT49A 244 1 Z
+bit 244 C 1 *
+bit 243 B 1 PT49B 242 1 Z
+bit 242 C 1 *
+bit 241 B 1 PT50A 240 1 Z
+bit 240 C 1 *
+bit 239 B 1 PT50B 238 1 Z
+bit 238 C 1 *
+bit 237 B 1 PT51A 236 1 Z
+bit 236 C 1 *
+bit 235 B 1 PT51B 234 1 Z
+bit 234 C 1 *
+bit 233 B 1 PT52A 232 1 Z
+bit 232 C 1 *
+bit 231 B 1 PT52B 230 1 Z
+bit 230 C 1 *
+bit 229 B 1 PT53A 228 1 Z
+bit 228 C 1 *
+bit 227 B 1 PT53B 226 1 Z
+bit 226 C 1 *
+bit 225 B 1 PT54A 224 1 Z
+bit 224 C 1 *
+bit 223 B 1 PT54B 222 1 Z
+bit 222 C 1 *
+bit 221 B 1 PT55A 220 1 Z
+bit 220 C 1 *
+bit 219 B 1 PT55B 218 1 Z
+bit 218 C 1 *
+bit 217 B 1 PR2A 216 1 Z
+bit 216 C 1 *
+bit 215 B 1 PR2B 214 1 Z
+bit 214 C 1 *
+bit 213 B 1 PR3A 212 1 Z
+bit 212 C 1 *
+bit 211 B 1 PR3B 210 1 Z
+bit 210 C 1 *
+bit 209 B 1 PR4A 208 1 Z
+bit 208 C 1 *
+bit 207 B 1 PR4B 206 1 Z
+bit 206 C 1 *
+bit 205 B 1 PR5A 204 1 Z
+bit 204 C 1 *
+bit 203 B 1 PR5B 202 1 Z
+bit 202 C 1 *
+bit 201 B 1 PR6A 200 1 Z
+bit 200 C 1 *
+bit 199 B 1 PR6B 198 1 Z
+bit 198 C 1 *
+bit 197 B 1 PR7A 196 1 Z
+bit 196 C 1 *
+bit 195 B 1 PR7B 194 1 Z
+bit 194 C 1 *
+bit 193 B 1 PR8A 192 1 Z
+bit 192 C 1 *
+bit 191 B 1 PR8B 190 1 Z
+bit 190 C 1 *
+bit 189 B 1 PR9A 188 1 Z
+bit 188 C 1 *
+bit 187 B 1 PR9B 186 1 Z
+bit 186 C 1 *
+bit 185 B 1 PR10A 184 1 Z
+bit 184 C 1 *
+bit 183 B 1 PR10B 182 1 Z
+bit 182 C 1 *
+bit 181 B 1 PR11A 180 1 Z
+bit 180 C 1 *
+bit 179 B 1 PR11B 178 1 Z
+bit 178 C 1 *
+bit 177 B 1 PR12A 176 1 Z
+bit 176 C 1 *
+bit 175 B 1 PR12B 174 1 Z
+bit 174 C 1 *
+bit 173 B 1 PR13A 172 1 Z
+bit 172 C 1 *
+bit 171 B 1 PR13B 170 1 Z
+bit 170 C 1 *
+bit 169 B 1 PR15A 168 1 Z
+bit 168 C 1 *
+bit 167 B 1 PR15B 166 1 Z
+bit 166 C 1 *
+bit 165 B 1 PR16A 164 1 Z
+bit 164 C 1 *
+bit 163 B 1 PR16B 162 1 Z
+bit 162 C 1 *
+bit 161 B 1 PR17A 160 1 Z
+bit 160 C 1 *
+bit 159 B 1 PR17B 158 1 Z
+bit 158 C 1 *
+bit 157 B 1 PR18A 156 1 Z
+bit 156 C 1 *
+bit 155 B 1 PR18B 154 1 Z
+bit 154 C 1 *
+bit 153 B 1 PR20A 152 1 Z
+bit 152 C 1 *
+bit 151 B 1 PR20B 150 1 Z
+bit 150 C 1 *
+bit 149 B 1 PR21A 148 1 Z
+bit 148 C 1 *
+bit 147 B 1 PR21B 146 1 Z
+bit 146 C 1 *
+bit 145 B 1 PR22A 144 1 Z
+bit 144 C 1 *
+bit 143 B 1 PR22B 142 1 Z
+bit 142 C 1 *
+bit 141 B 1 PR23A 140 1 Z
+bit 140 C 1 *
+bit 139 B 1 PR23B 138 1 Z
+bit 138 C 1 *
+bit 137 B 1 PR24A 136 1 Z
+bit 136 C 1 *
+bit 135 B 1 PR24B 134 1 Z
+bit 134 C 1 *
+bit 133 B 1 PR25A 132 1 Z
+bit 132 C 1 *
+bit 131 B 1 PR25B 130 1 Z
+bit 130 C 1 *
+bit 129 B 1 PR26A 128 1 Z
+bit 128 C 1 *
+bit 127 B 1 PR26B 126 1 Z
+bit 126 C 1 *
+bit 125 B 1 PR27A 124 1 Z
+bit 124 C 1 *
+bit 123 B 1 PR27B 122 1 Z
+bit 122 C 1 *
+bit 121 B 1 PR28A 120 1 Z
+bit 120 C 1 *
+bit 119 B 1 PR28B 118 1 Z
+bit 118 C 1 *
+bit 117 B 1 PR29A 116 1 Z
+bit 116 C 1 *
+bit 115 B 1 PR29B 114 1 Z
+bit 114 C 1 *
+bit 113 B 1 PR30A 112 1 Z
+bit 112 C 1 *
+bit 111 B 1 PR30B 110 1 Z
+bit 110 C 1 *
+bit 109 B 1 DONE 108 1 Z
+bit 108 C 1 *
+bit 107 B 1 INITN 106 1 Z
+bit 106 C 1 *
+bit 105 B 1 CCLK 104 1 Z
+bit 104 C 1 *
+bit 103 I 1 PROGRAMN
+bit 102 I 1 CFG0
+bit 101 I 1 CFG1
+bit 100 I 1 CFG2
+bit 99 B 1 PB55B 98 1 Z
+bit 98 C 1 *
+bit 97 B 1 PB55A 96 1 Z
+bit 96 C 1 *
+bit 95 B 1 PB54B 94 1 Z
+bit 94 C 1 *
+bit 93 B 1 PB54A 92 1 Z
+bit 92 C 1 *
+bit 91 B 1 PB53B 90 1 Z
+bit 90 C 1 *
+bit 89 B 1 PB53A 88 1 Z
+bit 88 C 1 *
+bit 87 B 1 PB52B 86 1 Z
+bit 86 C 1 *
+bit 85 B 1 PB52A 84 1 Z
+bit 84 C 1 *
+bit 83 B 1 PB51B 82 1 Z
+bit 82 C 1 *
+bit 81 B 1 PB51A 80 1 Z
+bit 80 C 1 *
+bit 79 B 1 PB50B 78 1 Z
+bit 78 C 1 *
+bit 77 B 1 PB50A 76 1 Z
+bit 76 C 1 *
+bit 75 B 1 PB49B 74 1 Z
+bit 74 C 1 *
+bit 73 B 1 PB49A 72 1 Z
+bit 72 C 1 *
+bit 71 B 1 PB48B 70 1 Z
+bit 70 C 1 *
+bit 69 B 1 PB48A 68 1 Z
+bit 68 C 1 *
+bit 67 B 1 PB47B 66 1 Z
+bit 66 C 1 *
+bit 65 B 1 PB47A 64 1 Z
+bit 64 C 1 *
+bit 63 B 1 PB46B 62 1 Z
+bit 62 C 1 *
+bit 61 B 1 PB46A 60 1 Z
+bit 60 C 1 *
+bit 59 B 1 PB45B 58 1 Z
+bit 58 C 1 *
+bit 57 B 1 PB45A 56 1 Z
+bit 56 C 1 *
+bit 55 B 1 PB44B 54 1 Z
+bit 54 C 1 *
+bit 53 B 1 PB44A 52 1 Z
+bit 52 C 1 *
+bit 51 B 1 PB43B 50 1 Z
+bit 50 C 1 *
+bit 49 B 1 PB43A 48 1 Z
+bit 48 C 1 *
+bit 47 B 1 PB42B 46 1 Z
+bit 46 C 1 *
+bit 45 B 1 PB42A 44 1 Z
+bit 44 C 1 *
+bit 43 B 1 PB41B 42 1 Z
+bit 42 C 1 *
+bit 41 B 1 PB41A 40 1 Z
+bit 40 C 1 *
+bit 39 B 1 PB40B 38 1 Z
+bit 38 C 1 *
+bit 37 B 1 PB40A 36 1 Z
+bit 36 C 1 *
+bit 35 B 1 PB39B 34 1 Z
+bit 34 C 1 *
+bit 33 B 1 PB39A 32 1 Z
+bit 32 C 1 *
+bit 31 O 1 *
+bit 30 O 1 *
+bit 29 O 1 *
+bit 28 O 1 *
+bit 27 B 1 PB37B 26 1 Z
+bit 26 C 1 *
+bit 25 B 1 PB37A 24 1 Z
+bit 24 C 1 *
+bit 23 B 1 PB36B 22 1 Z
+bit 22 C 1 *
+bit 21 B 1 PB36A 20 1 Z
+bit 20 C 1 *
+bit 19 B 1 PB35B 18 1 Z
+bit 18 C 1 *
+bit 17 B 1 PB35A 16 1 Z
+bit 16 C 1 *
+bit 15 B 1 PB34B 14 1 Z
+bit 14 C 1 *
+bit 13 B 1 PB34A 12 1 Z
+bit 12 C 1 *
+bit 11 B 1 PB33B 10 1 Z
+bit 10 C 1 *
+bit 9 B 1 PB33A 8 1 Z
+bit 8 C 1 *
+bit 7 B 1 PB32B 6 1 Z
+bit 6 C 1 *
+bit 5 B 1 PB32A 4 1 Z
+bit 4 C 1 *
+bit 3 B 1 PB31B 2 1 Z
+bit 2 C 1 *
+bit 1 B 1 PB31A 0 1 Z
+bit 0 C 1 *
--- /dev/null
+#
+# $Id$
+#
+# Copyright (C) 2002 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Marcel Telka <marcel@telka.sk>, 2002.
+#
+
+# bits 31-28 of the Device Identification Register
+
+0000 m4a3-256.192-fpbga256 0
--- /dev/null
+#
+# $Id$
+#
+# JTAG declarations for Lattice M4A3-256/192 (256-pin fpBGA)
+# Copyright (C) 2002 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Marcel Telka <marcel@telka.sk>, 2002.
+#
+
+
+signal CLK0 A6
+signal CLK1 T8
+signal CLK2 T11
+signal CLK3 E9
+signal TDI C2
+signal TMS P3
+signal TCK N3
+signal TDO D14
+signal NC B1 E5 C14 E15
+signal VCC E13 G13 K13 N13 D11 N11 G10 K10 D9 H9 J9 N9 H8 J8 G7 K7 D6 N6 D4 F4 H4 K4 M4
+signal GND D13 F13 H13 J13 L13 M13 D12 N12 D10 H10 J10 N10 G9 K9 D8 G8 K8 N8 D7 H7 J7 N7 D5 N5 E4 G4 J4 L4 N4
+signal IO_A0 B8
+signal IO_A2 A8
+signal IO_A4 E7
+signal IO_A6 A7
+signal IO_A8 F7
+signal IO_A10 B7
+signal IO_A12 C7
+signal IO_A14 B6
+signal IO_B0 E6
+signal IO_B1 A5
+signal IO_B2 B5
+signal IO_B3 F6
+signal IO_B4 C6
+signal IO_B5 A4
+signal IO_B6 C5
+signal IO_B7 A3
+signal IO_B8 B4
+signal IO_B9 D3
+signal IO_B10 A2
+signal IO_B11 B3
+signal IO_B12 A1
+signal IO_B13 B2
+signal IO_B14 C3
+signal IO_B15 C4
+signal IO_C0 H5
+signal IO_C1 G2
+signal IO_C2 G3
+signal IO_C3 H6
+signal IO_C4 G5
+signal IO_C5 F1
+signal IO_C6 F2
+signal IO_C7 E1
+signal IO_C8 F3
+signal IO_C9 G6
+signal IO_C10 F5
+signal IO_C11 E2
+signal IO_C12 E3
+signal IO_C13 D1
+signal IO_C14 D2
+signal IO_C15 C1
+signal IO_D0 K5
+signal IO_D2 K6
+signal IO_D4 H1
+signal IO_D6 H2
+signal IO_D8 H3
+signal IO_D10 J5
+signal IO_D12 J6
+signal IO_D14 G1
+signal IO_E0 J2
+signal IO_E2 J3
+signal IO_E4 J1
+signal IO_E6 L5
+signal IO_E8 L6
+signal IO_E10 M5
+signal IO_E12 K2
+signal IO_E14 K3
+signal IO_F0 K1
+signal IO_F1 L1
+signal IO_F2 M1
+signal IO_F3 L3
+signal IO_F4 L2
+signal IO_F5 N1
+signal IO_F6 P1
+signal IO_F7 M2
+signal IO_F8 N2
+signal IO_F9 P2
+signal IO_F10 R1
+signal IO_F11 R2
+signal IO_F12 M3
+signal IO_F13 T1
+signal IO_F14 T2
+signal IO_F15 R3
+signal IO_G0 R7
+signal IO_G1 T6
+signal IO_G2 M8
+signal IO_G3 L8
+signal IO_G4 R6
+signal IO_G5 L7
+signal IO_G6 T5
+signal IO_G7 P6
+signal IO_G8 M7
+signal IO_G9 R5
+signal IO_G10 T4
+signal IO_G11 M6
+signal IO_G12 P5
+signal IO_G13 R4
+signal IO_G14 T3
+signal IO_G15 P4
+signal IO_H0 T9
+signal IO_H2 P9
+signal IO_H4 M9
+signal IO_H6 L9
+signal IO_H8 R8
+signal IO_H10 P8
+signal IO_H12 P7
+signal IO_H14 T7
+signal IO_I0 R9
+signal IO_I2 T10
+signal IO_I4 L10
+signal IO_I6 R10
+signal IO_I8 M10
+signal IO_I10 P10
+signal IO_I12 R11
+signal IO_I14 T12
+signal IO_J0 R12
+signal IO_J1 M11
+signal IO_J2 P11
+signal IO_J3 M12
+signal IO_J4 P12
+signal IO_J5 T13
+signal IO_J6 T14
+signal IO_J7 R13
+signal IO_J8 R14
+signal IO_J9 T15
+signal IO_J10 T16
+signal IO_J11 R15
+signal IO_J12 R16
+signal IO_J13 P15
+signal IO_J14 P14
+signal IO_J15 P13
+signal IO_K0 K15
+signal IO_K1 K14
+signal IO_K2 K11
+signal IO_K3 K12
+signal IO_K4 L16
+signal IO_K5 L15
+signal IO_K6 L11
+signal IO_K7 L14
+signal IO_K8 M16
+signal IO_K9 M15
+signal IO_K10 L12
+signal IO_K11 M14
+signal IO_K12 N16
+signal IO_K13 N15
+signal IO_K14 P16
+signal IO_K15 N14
+signal IO_L0 H12
+signal IO_L2 H11
+signal IO_L4 J16
+signal IO_L6 J15
+signal IO_L8 J14
+signal IO_L10 J11
+signal IO_L12 J12
+signal IO_L14 K16
+signal IO_M0 H16
+signal IO_M2 H14
+signal IO_M4 H15
+signal IO_M6 G16
+signal IO_M8 G12
+signal IO_M10 G14
+signal IO_M12 G15
+signal IO_M14 G11
+signal IO_N0 F16
+signal IO_N1 F11
+signal IO_N2 F12
+signal IO_N3 F14
+signal IO_N4 E16
+signal IO_N5 F15
+signal IO_N6 D16
+signal IO_N7 D15
+signal IO_N8 E12
+signal IO_N9 E11
+signal IO_N10 E14
+signal IO_N11 C16
+signal IO_N12 C15
+signal IO_N13 B16
+signal IO_N14 B15
+signal IO_N15 A16
+signal IO_O0 B10
+signal IO_O1 F9
+signal IO_O2 C11
+signal IO_O3 C10
+signal IO_O4 A11
+signal IO_O5 B11
+signal IO_O6 A12
+signal IO_O7 B12
+signal IO_O8 F10
+signal IO_O9 A13
+signal IO_O10 C12
+signal IO_O11 B13
+signal IO_O12 A14
+signal IO_O13 A15
+signal IO_O14 B14
+signal IO_O15 C13
+signal IO_P0 C8
+signal IO_P2 F8
+signal IO_P4 A9
+signal IO_P6 B9
+signal IO_P8 E8
+signal IO_P10 C9
+signal IO_P12 E10
+signal IO_P14 A10
+
+
+# mandatory data registers
+register BSR 772 # Boundary Scan Register
+register BR 1 # Bypass Register
+
+# optional data registers
+register DIR 32 # Device Identification Register
+
+instruction length 6
+
+# mandatory instructions
+instruction EXTEST 000000 BSR
+instruction SAMPLE/PRELOAD 000010 BSR
+instruction BYPASS 111111 BR
+
+# optional instructions
+instruction IDCODE 000001 DIR
+instruction USERCODE 010000 DIR
+instruction HIGHZ 010001 BR
+
+
+# Boundary Scan Register bit definition
+
+
+# 1. The order of the I/O cell is INPUT - OUTPUT - OE
+# 2. The output is disabled when a 0 is shifted into the
+# OE cell.
+# 3. The pictoral representation of the Boundary scan
+# register is found in the JEDEC specification for M4A3-256/192 160.
+#
+# -------------------------------------- CLK0 ------------------------------------
+bit 771 I ? CLK0
+
+# ----------------------------- A0,A2,A4,A8,A10,A12,A14 --------------------------
+
+bit 770 I ? IO_A0 # A0
+bit 769 O ? IO_A0 768 0 Z
+bit 768 C 0 IO_A0
+
+bit 767 O 1 * # A1
+bit 766 O 1 *
+bit 765 O 1 *
+
+bit 764 I ? IO_A1 # A2
+bit 763 O ? IO_A1 762 0 Z
+bit 762 C 0 IO_A1
+
+bit 761 O 1 * # A3
+bit 760 O 1 *
+bit 759 O 1 *
+
+bit 758 I ? IO_A2 # A4
+bit 757 O ? IO_A2 756 0 Z
+bit 756 C 0 IO_A2
+
+bit 755 O 1 * # A5
+bit 754 O 1 *
+bit 753 O 1 *
+
+bit 752 I ? IO_A3 # A6
+bit 751 O ? IO_A3 750 0 Z
+bit 750 C 0 IO_A3
+
+bit 749 O 1 * # A7
+bit 748 O 1 *
+bit 747 O 1 *
+
+bit 746 I ? IO_A4 # A8
+bit 745 O ? IO_A4 744 0 Z
+bit 744 C 0 IO_A4
+
+bit 743 O 1 * # A9
+bit 742 O 1 *
+bit 741 O 1 *
+
+bit 740 I ? IO_A5 # A10
+bit 739 O ? IO_A5 738 0 Z
+bit 738 C 0 IO_A5
+
+bit 737 O 1 * # A11
+bit 736 O 1 *
+bit 735 O 1 *
+
+bit 734 I ? IO_A6 # A12
+bit 733 O ? IO_A6 732 0 Z
+bit 732 C 0 IO_A6
+
+bit 731 O 1 * # A13
+bit 730 O 1 *
+bit 729 O 1 *
+
+bit 728 I ? IO_A7 # A14
+bit 727 O ? IO_A7 726 0 Z
+bit 726 C 0 IO_A7
+
+bit 725 O 1 * # A15
+bit 724 O 1 *
+bit 723 O 1 *
+
+# ------------------------------------ B0 - B15 ----------------------------------
+
+bit 722 I ? IO_B0 # B0
+bit 721 O ? IO_B0 720 0 Z
+bit 720 C 0 IO_B0
+
+bit 719 I ? IO_B1 # B1
+bit 718 O ? IO_B1 717 0 Z
+bit 717 C 0 IO_B1
+
+bit 716 I ? IO_B2 # B2
+bit 715 O ? IO_B2 714 0 Z
+bit 714 C 0 IO_B2
+
+bit 713 I ? IO_B3 # B3
+bit 712 O ? IO_B3 711 0 Z
+bit 711 C 0 IO_B3
+
+bit 710 I ? IO_B4 # B4
+bit 709 O ? IO_B4 708 0 Z
+bit 708 C 0 IO_B4
+
+bit 707 I ? IO_B5 # B5
+bit 706 O ? IO_B5 705 0 Z
+bit 705 C 0 IO_B5
+
+bit 704 I ? IO_B6 # B6
+bit 703 O ? IO_B6 702 0 Z
+bit 702 C 0 IO_B6
+
+bit 701 I ? IO_B7 # B7
+bit 700 O ? IO_B7 699 0 Z
+bit 699 C 0 IO_B7
+
+bit 698 I ? IO_B8 # B8
+bit 697 O ? IO_B8 696 0 Z
+bit 696 C 0 IO_B8
+
+bit 695 I ? IO_B9 # B9
+bit 694 O ? IO_B9 693 0 Z
+bit 693 C 0 IO_B9
+
+bit 692 I ? IO_B10 # B10
+bit 691 O ? IO_B10 690 0 Z
+bit 690 C 0 IO_B10
+
+bit 689 I ? IO_B11 # B11
+bit 688 O ? IO_B11 687 0 Z
+bit 687 C 0 IO_B11
+
+bit 686 I ? IO_B12 # B12
+bit 685 O ? IO_B12 684 0 Z
+bit 684 C 0 IO_B12
+
+bit 683 I ? IO_B13 # B13
+bit 682 O ? IO_B13 681 0 Z
+bit 681 C 0 IO_B13
+
+bit 680 I ? IO_B14 # B14
+bit 679 O ? IO_B14 678 0 Z
+bit 678 C 0 IO_B14
+
+bit 677 I ? IO_B15 # B15
+bit 676 O ? IO_B15 675 0 Z
+bit 675 C 0 IO_B15
+
+# ----------------------------- D0D2D4D8D10D12D14 --------------------------
+
+bit 674 I ? IO_D0 # D0
+bit 673 O ? IO_D0 672 0 Z
+bit 672 C 0 IO_D0
+
+bit 671 O 1 * # D1
+bit 670 O 1 *
+bit 669 O 1 *
+
+bit 668 I ? IO_D1 # D2
+bit 667 O ? IO_D1 666 0 Z
+bit 666 C 0 IO_D1
+
+bit 665 O 1 * # D3
+bit 664 O 1 *
+bit 663 O 1 *
+
+bit 662 I ? IO_D2 # D4
+bit 661 O ? IO_D2 660 0 Z
+bit 660 C 0 IO_D2
+
+bit 659 O 1 * # D5
+bit 658 O 1 *
+bit 657 O 1 *
+
+bit 656 I ? IO_D3 # D6
+bit 655 O ? IO_D3 654 0 Z
+bit 654 C 0 IO_D3
+
+bit 653 O 1 * # D7
+bit 652 O 1 *
+bit 651 O 1 *
+
+bit 650 I ? IO_D4 # D8
+bit 649 O ? IO_D4 648 0 Z
+bit 648 C 0 IO_D4
+
+bit 647 O 1 * # D9
+bit 646 O 1 *
+bit 645 O 1 *
+
+bit 644 I ? IO_D5 # D10
+bit 643 O ? IO_D5 642 0 Z
+bit 642 C 0 IO_D5
+
+bit 641 O 1 * # D11
+bit 640 O 1 *
+bit 639 O 1 *
+
+bit 638 I ? IO_D6 # D12
+bit 637 O ? IO_D6 636 0 Z
+bit 636 C 0 IO_D6
+
+bit 635 O 1 * # D13
+bit 634 O 1 *
+bit 633 O 1 *
+
+bit 632 I ? IO_D7 # D14
+bit 631 O ? IO_D7 630 0 Z
+bit 630 C 0 IO_D7
+
+bit 629 O 1 * # D15
+bit 628 O 1 *
+bit 627 O 1 *
+
+# ------------------------------------ C0 - C15 ----------------------------------
+
+bit 626 I ? IO_C0 # C0
+bit 625 O ? IO_C0 624 0 Z
+bit 624 C 0 IO_C0
+
+bit 623 I ? IO_C1 # C1
+bit 622 O ? IO_C1 621 0 Z
+bit 621 C 0 IO_C1
+
+bit 620 I ? IO_C2 # C2
+bit 619 O ? IO_C2 618 0 Z
+bit 618 C 0 IO_C2
+
+bit 617 I ? IO_C3 # C3
+bit 616 O ? IO_C3 615 0 Z
+bit 615 C 0 IO_C3
+
+bit 614 I ? IO_C4 # C4
+bit 613 O ? IO_C4 612 0 Z
+bit 612 C 0 IO_C4
+
+bit 611 I ? IO_C5 # C5
+bit 610 O ? IO_C5 609 0 Z
+bit 609 C 0 IO_C5
+
+bit 608 I ? IO_C6 # C6
+bit 607 O ? IO_C6 606 0 Z
+bit 606 C 0 IO_C6
+
+bit 605 I ? IO_C7 # C7
+bit 604 O ? IO_C7 603 0 Z
+bit 603 C 0 IO_C7
+
+bit 602 I ? IO_C8 # C8
+bit 601 O ? IO_C8 600 0 Z
+bit 600 C 0 IO_C8
+
+bit 599 I ? IO_C9 # C9
+bit 598 O ? IO_C9 597 0 Z
+bit 597 C 0 IO_C9
+
+bit 596 I ? IO_C10 # C10
+bit 595 O ? IO_C10 594 0 Z
+bit 594 C 0 IO_C10
+
+bit 593 I ? IO_C11 # C11
+bit 592 O ? IO_C11 591 0 Z
+bit 591 C 0 IO_C11
+
+bit 590 I ? IO_C12 # C12
+bit 589 O ? IO_C12 588 0 Z
+bit 588 C 0 IO_C12
+
+bit 587 I ? IO_C13 # C13
+bit 586 O ? IO_C13 585 0 Z
+bit 585 C 0 IO_C13
+
+bit 584 I ? IO_C14 # C14
+bit 583 O ? IO_C14 582 0 Z
+bit 582 C 0 IO_C14
+
+bit 581 I ? IO_C15 # C15
+bit 580 O ? IO_C15 579 0 Z
+bit 579 C 0 IO_C15
+
+# ----------------------------- E0E2E4E8E10E12E14 --------------------------
+
+bit 578 I ? IO_E0 # E0
+bit 577 O ? IO_E0 576 0 Z
+bit 576 C 0 IO_E0
+
+bit 575 O 1 * # E1
+bit 574 O 1 *
+bit 573 O 1 *
+
+bit 572 I ? IO_E1 # E2
+bit 571 O ? IO_E1 570 0 Z
+bit 570 C 0 IO_E1
+
+bit 569 O 1 * # E3
+bit 568 O 1 *
+bit 567 O 1 *
+
+bit 566 I ? IO_E2 # E4
+bit 565 O ? IO_E2 564 0 Z
+bit 564 C 0 IO_E2
+
+bit 563 O 1 * # E5
+bit 562 O 1 *
+bit 561 O 1 *
+
+bit 560 I ? IO_E3 # E6
+bit 559 O ? IO_E3 558 0 Z
+bit 558 C 0 IO_E3
+
+bit 557 O 1 * # E7
+bit 556 O 1 *
+bit 555 O 1 *
+
+bit 554 I ? IO_E4 # E8
+bit 553 O ? IO_E4 552 0 Z
+bit 552 C 0 IO_E4
+
+bit 551 O 1 * # E9
+bit 550 O 1 *
+bit 549 O 1 *
+
+bit 548 I ? IO_E5 # E10
+bit 547 O ? IO_E5 546 0 Z
+bit 546 C 0 IO_E5
+
+bit 545 O 1 * # E11
+bit 544 O 1 *
+bit 543 O 1 *
+
+bit 542 I ? IO_E6 # E12
+bit 541 O ? IO_E6 540 0 Z
+bit 540 C 0 IO_E6
+
+bit 539 O 1 * # E13
+bit 538 O 1 *
+bit 537 O 1 *
+
+bit 536 I ? IO_E7 # E14
+bit 535 O ? IO_E7 534 0 Z
+bit 534 C 0 IO_E7
+
+bit 533 O 1 * # E15
+bit 532 O 1 *
+bit 531 O 1 *
+
+# ------------------------------------ F0 - F15 ----------------------------------
+
+bit 530 I ? IO_F0 # F0
+bit 529 O ? IO_F0 528 0 Z
+bit 528 C 0 IO_F0
+
+bit 527 I ? IO_F1 # F1
+bit 526 O ? IO_F1 525 0 Z
+bit 525 C 0 IO_F1
+
+bit 524 I ? IO_F2 # F2
+bit 523 O ? IO_F2 522 0 Z
+bit 522 C 0 IO_F2
+
+bit 521 I ? IO_F3 # F3
+bit 520 O ? IO_F3 519 0 Z
+bit 519 C 0 IO_F3
+
+bit 518 I ? IO_F4 # F4
+bit 517 O ? IO_F4 516 0 Z
+bit 516 C 0 IO_F4
+
+bit 515 I ? IO_F5 # F5
+bit 514 O ? IO_F5 513 0 Z
+bit 513 C 0 IO_F5
+
+bit 512 I ? IO_F6 # F6
+bit 511 O ? IO_F6 510 0 Z
+bit 510 C 0 IO_F6
+
+bit 509 I ? IO_F7 # F7
+bit 508 O ? IO_F7 507 0 Z
+bit 507 C 0 IO_F7
+
+bit 506 I ? IO_F8 # F8
+bit 505 O ? IO_F8 504 0 Z
+bit 504 C 0 IO_F8
+
+bit 503 I ? IO_F9 # F9
+bit 502 O ? IO_F9 501 0 Z
+bit 501 C 0 IO_F9
+
+bit 500 I ? IO_F10 # F10
+bit 499 O ? IO_F10 498 0 Z
+bit 498 C 0 IO_F10
+
+bit 497 I ? IO_F11 # F11
+bit 496 O ? IO_F11 495 0 Z
+bit 495 C 0 IO_F11
+
+bit 494 I ? IO_F12 # F12
+bit 493 O ? IO_F12 492 0 Z
+bit 492 C 0 IO_F12
+
+bit 491 I ? IO_F13 # F13
+bit 490 O ? IO_F13 489 0 Z
+bit 489 C 0 IO_F13
+
+bit 488 I ? IO_F14 # F14
+bit 487 O ? IO_F14 486 0 Z
+bit 486 C 0 IO_F14
+
+bit 485 I ? IO_F15 # F15
+bit 484 O ? IO_F15 483 0 Z
+bit 483 C 0 IO_F15
+
+# ----------------------------- H0H2H4H8H10H12H14 --------------------------
+
+bit 482 I ? IO_H0 # H0
+bit 481 O ? IO_H0 480 0 Z
+bit 480 C 0 IO_H0
+
+bit 479 O 1 * # H1
+bit 478 O 1 *
+bit 477 O 1 *
+
+bit 476 I ? IO_H1 # H2
+bit 475 O ? IO_H1 474 0 Z
+bit 474 C 0 IO_H1
+
+bit 473 O 1 * # H3
+bit 472 O 1 *
+bit 471 O 1 *
+
+bit 470 I ? IO_H2 # H4
+bit 469 O ? IO_H2 468 0 Z
+bit 468 C 0 IO_H2
+
+bit 467 O 1 * # H5
+bit 466 O 1 *
+bit 465 O 1 *
+
+bit 464 I ? IO_H3 # H6
+bit 463 O ? IO_H3 462 0 Z
+bit 462 C 0 IO_H3
+
+bit 461 O 1 * # H7
+bit 460 O 1 *
+bit 459 O 1 *
+
+bit 458 I ? IO_H4 # H8
+bit 457 O ? IO_H4 456 0 Z
+bit 456 C 0 IO_H4
+
+bit 455 O 1 * # H9
+bit 454 O 1 *
+bit 453 O 1 *
+
+bit 452 I ? IO_H5 # H10
+bit 451 O ? IO_H5 450 0 Z
+bit 450 C 0 IO_H5
+
+bit 449 O 1 * # H11
+bit 448 O 1 *
+bit 447 O 1 *
+
+bit 446 I ? IO_H6 # H12
+bit 445 O ? IO_H6 444 0 Z
+bit 444 C 0 IO_H6
+
+bit 443 O 1 * # H13
+bit 442 O 1 *
+bit 441 O 1 *
+
+bit 440 I ? IO_H7 # H14
+bit 439 O ? IO_H7 438 0 Z
+bit 438 C 0 IO_H7
+
+bit 437 O 1 * # H15
+bit 436 O 1 *
+bit 435 O 1 *
+
+# ------------------------------------ G0 - G15 ----------------------------------
+
+bit 434 I ? IO_G0 # G0
+bit 433 O ? IO_G0 432 0 Z
+bit 432 C 0 IO_G0
+
+bit 431 I ? IO_G1 # G1
+bit 430 O ? IO_G1 429 0 Z
+bit 429 C 0 IO_G1
+
+bit 428 I ? IO_G2 # G2
+bit 427 O ? IO_G2 426 0 Z
+bit 426 C 0 IO_G2
+
+bit 425 I ? IO_G3 # G3
+bit 424 O ? IO_G3 423 0 Z
+bit 423 C 0 IO_G3
+
+bit 422 I ? IO_G4 # G4
+bit 421 O ? IO_G4 420 0 Z
+bit 420 C 0 IO_G4
+
+bit 419 I ? IO_G5 # G5
+bit 418 O ? IO_G5 417 0 Z
+bit 417 C 0 IO_G5
+
+bit 416 I ? IO_G6 # G6
+bit 415 O ? IO_G6 414 0 Z
+bit 414 C 0 IO_G6
+
+bit 413 I ? IO_G7 # G7
+bit 412 O ? IO_G7 411 0 Z
+bit 411 C 0 IO_G7
+
+bit 410 I ? IO_G8 # G8
+bit 409 O ? IO_G8 408 0 Z
+bit 408 C 0 IO_G8
+
+bit 407 I ? IO_G9 # G9
+bit 406 O ? IO_G9 405 0 Z
+bit 405 C 0 IO_G9
+
+bit 404 I ? IO_G10 # G10
+bit 403 O ? IO_G10 402 0 Z
+bit 402 C 0 IO_G10
+
+bit 401 I ? IO_G11 # G11
+bit 400 O ? IO_G11 399 0 Z
+bit 399 C 0 IO_G11
+
+bit 398 I ? IO_G12 # G12
+bit 397 O ? IO_G12 396 0 Z
+bit 396 C 0 IO_G12
+
+bit 395 I ? IO_G13 # G13
+bit 394 O ? IO_G13 393 0 Z
+bit 393 C 0 IO_G13
+
+bit 392 I ? IO_G14 # G14
+bit 391 O ? IO_G14 390 0 Z
+bit 390 C 0 IO_G14
+
+bit 389 I ? IO_G15 # G15
+bit 388 O ? IO_G15 387 0 Z
+bit 387 C 0 IO_G15
+
+# ---------------------------------- CLK1 - CLK2 --------------------------------
+
+bit 386 I ? CLK1
+bit 385 I ? CLK2
+
+# ----------------------------- I0I2I4I8I10I12I14 --------------------------
+
+bit 384 I ? IO_I0 # I0
+bit 383 O ? IO_I0 382 0 Z
+bit 382 C 0 IO_I0
+
+bit 381 O 1 * # I1
+bit 380 O 1 *
+bit 379 O 1 *
+
+bit 378 I ? IO_I1 # I2
+bit 377 O ? IO_I1 376 0 Z
+bit 376 C 0 IO_I1
+
+bit 375 O 1 * # I3
+bit 374 O 1 *
+bit 373 O 1 *
+
+bit 372 I ? IO_I2 # I4
+bit 371 O ? IO_I2 370 0 Z
+bit 370 C 0 IO_I2
+
+bit 369 O 1 * # I5
+bit 368 O 1 *
+bit 367 O 1 *
+
+bit 366 I ? IO_I3 # I6
+bit 365 O ? IO_I3 364 0 Z
+bit 364 C 0 IO_I3
+
+bit 363 O 1 * # I7
+bit 362 O 1 *
+bit 361 O 1 *
+
+bit 360 I ? IO_I4 # I8
+bit 359 O ? IO_I4 358 0 Z
+bit 358 C 0 IO_I4
+
+bit 357 O 1 * # I9
+bit 356 O 1 *
+bit 355 O 1 *
+
+bit 354 I ? IO_I5 # I10
+bit 353 O ? IO_I5 352 0 Z
+bit 352 C 0 IO_I5
+
+bit 351 O 1 * # I11
+bit 350 O 1 *
+bit 349 O 1 *
+
+bit 348 I ? IO_I6 # I12
+bit 347 O ? IO_I6 346 0 Z
+bit 346 C 0 IO_I6
+
+bit 345 O 1 * # I13
+bit 344 O 1 *
+bit 343 O 1 *
+
+bit 342 I ? IO_I7 # I14
+bit 341 O ? IO_I7 340 0 Z
+bit 340 C 0 IO_I7
+
+bit 339 O 1 * # I15
+bit 338 O 1 *
+bit 337 O 1 *
+
+# ---------------------------------- J0 - J15 --------------------------------
+
+bit 336 I ? IO_J0 # J0
+bit 335 O ? IO_J0 334 0 Z
+bit 334 C 0 IO_J0
+
+bit 333 I ? IO_J1 # J1
+bit 332 O ? IO_J1 331 0 Z
+bit 331 C 0 IO_J1
+
+bit 330 I ? IO_J2 # J2
+bit 329 O ? IO_J2 328 0 Z
+bit 328 C 0 IO_J2
+
+bit 327 I ? IO_J3 # J3
+bit 326 O ? IO_J3 325 0 Z
+bit 325 C 0 IO_J3
+
+bit 324 I ? IO_J4 # J4
+bit 323 O ? IO_J4 322 0 Z
+bit 322 C 0 IO_J4
+
+bit 321 I ? IO_J5 # J5
+bit 320 O ? IO_J5 319 0 Z
+bit 319 C 0 IO_J5
+
+bit 318 I ? IO_J6 # J6
+bit 317 O ? IO_J6 316 0 Z
+bit 316 C 0 IO_J6
+
+bit 315 I ? IO_J7 # J7
+bit 314 O ? IO_J7 313 0 Z
+bit 313 C 0 IO_J7
+
+bit 312 I ? IO_J8 # J8
+bit 311 O ? IO_J8 310 0 Z
+bit 310 C 0 IO_J8
+
+bit 309 I ? IO_J9 # J9
+bit 308 O ? IO_J9 307 0 Z
+bit 307 C 0 IO_J9
+
+bit 306 I ? IO_J10 # J10
+bit 305 O ? IO_J10 304 0 Z
+bit 304 C 0 IO_J10
+
+bit 303 I ? IO_J11 # J11
+bit 302 O ? IO_J11 301 0 Z
+bit 301 C 0 IO_J11
+
+bit 300 I ? IO_J12 # J12
+bit 299 O ? IO_J12 298 0 Z
+bit 298 C 0 IO_J12
+
+bit 297 I ? IO_J13 # J13
+bit 296 O ? IO_J13 295 0 Z
+bit 295 C 0 IO_J13
+
+bit 294 I ? IO_J14 # J14
+bit 293 O ? IO_J14 292 0 Z
+bit 292 C 0 IO_J14
+
+bit 291 I ? IO_J15 # J15
+bit 290 O ? IO_J15 289 0 Z
+bit 289 C 0 IO_J15
+
+# ----------------------------- L0L2L4L8L10L12L14 --------------------------
+
+bit 288 I ? IO_L0 # L0
+bit 287 O ? IO_L0 286 0 Z
+bit 286 C 0 IO_L0
+
+bit 285 O 1 * # L1
+bit 284 O 1 *
+bit 283 O 1 *
+
+bit 282 I ? IO_L1 # L2
+bit 281 O ? IO_L1 280 0 Z
+bit 280 C 0 IO_L1
+
+bit 279 O 1 * # L3
+bit 278 O 1 *
+bit 277 O 1 *
+
+bit 276 I ? IO_L2 # L4
+bit 275 O ? IO_L2 274 0 Z
+bit 274 C 0 IO_L2
+
+bit 273 O 1 * # L5
+bit 272 O 1 *
+bit 271 O 1 *
+
+bit 270 I ? IO_L3 # L6
+bit 269 O ? IO_L3 268 0 Z
+bit 268 C 0 IO_L3
+
+bit 267 O 1 * # L7
+bit 266 O 1 *
+bit 265 O 1 *
+
+bit 264 I ? IO_L4 # L8
+bit 263 O ? IO_L4 262 0 Z
+bit 262 C 0 IO_L4
+
+bit 261 O 1 * # L9
+bit 260 O 1 *
+bit 259 O 1 *
+
+bit 258 I ? IO_L5 # L10
+bit 257 O ? IO_L5 256 0 Z
+bit 256 C 0 IO_L5
+
+bit 255 O 1 * # L11
+bit 254 O 1 *
+bit 253 O 1 *
+
+bit 252 I ? IO_L6 # L12
+bit 251 O ? IO_L6 250 0 Z
+bit 250 C 0 IO_L6
+
+bit 249 O 1 * # L13
+bit 248 O 1 *
+bit 247 O 1 *
+
+bit 246 I ? IO_L7 # L14
+bit 245 O ? IO_L7 244 0 Z
+bit 244 C 0 IO_L7
+
+bit 243 O 1 * # L15
+bit 242 O 1 *
+bit 241 O 1 *
+
+# ----------------------------------- K0 - K15 ---------------------------------
+
+bit 240 I ? IO_K0 # K0
+bit 239 O ? IO_K0 238 0 Z
+bit 238 C 0 IO_K0
+
+bit 237 I ? IO_K1 # K1
+bit 236 O ? IO_K1 235 0 Z
+bit 235 C 0 IO_K1
+
+bit 234 I ? IO_K2 # K2
+bit 233 O ? IO_K2 232 0 Z
+bit 232 C 0 IO_K2
+
+bit 231 I ? IO_K3 # K3
+bit 230 O ? IO_K3 229 0 Z
+bit 229 C 0 IO_K3
+
+bit 228 I ? IO_K4 # K4
+bit 227 O ? IO_K4 226 0 Z
+bit 226 C 0 IO_K4
+
+bit 225 I ? IO_K5 # K5
+bit 224 O ? IO_K5 223 0 Z
+bit 223 C 0 IO_K5
+
+bit 222 I ? IO_K6 # K6
+bit 221 O ? IO_K6 220 0 Z
+bit 220 C 0 IO_K6
+
+bit 219 I ? IO_K7 # K7
+bit 218 O ? IO_K7 217 0 Z
+bit 217 C 0 IO_K7
+
+bit 216 I ? IO_K8 # K8
+bit 215 O ? IO_K8 214 0 Z
+bit 214 C 0 IO_K8
+
+bit 213 I ? IO_K9 # K9
+bit 212 O ? IO_K9 211 0 Z
+bit 211 C 0 IO_K9
+
+bit 210 I ? IO_K10 # K10
+bit 209 O ? IO_K10 208 0 Z
+bit 208 C 0 IO_K10
+
+bit 207 I ? IO_K11 # K11
+bit 206 O ? IO_K11 205 0 Z
+bit 205 C 0 IO_K11
+
+bit 204 I ? IO_K12 # K12
+bit 203 O ? IO_K12 202 0 Z
+bit 202 C 0 IO_K12
+
+bit 201 I ? IO_K13 # K13
+bit 200 O ? IO_K13 199 0 Z
+bit 199 C 0 IO_K13
+
+bit 198 I ? IO_K14 # K14
+bit 197 O ? IO_K14 196 0 Z
+bit 196 C 0 IO_K14
+
+bit 195 I ? IO_K15 # K15
+bit 194 O ? IO_K15 193 0 Z
+bit 193 C 0 IO_K15
+
+# ----------------------------- M0M2M4M8M10M12M14 --------------------------
+
+bit 192 I ? IO_M0 # M0
+bit 191 O ? IO_M0 190 0 Z
+bit 190 C 0 IO_M0
+
+bit 189 O 1 * # M1
+bit 188 O 1 *
+bit 187 O 1 *
+
+bit 186 I ? IO_M1 # M2
+bit 185 O ? IO_M1 184 0 Z
+bit 184 C 0 IO_M1
+
+bit 183 O 1 * # M3
+bit 182 O 1 *
+bit 181 O 1 *
+
+bit 180 I ? IO_M2 # M4
+bit 179 O ? IO_M2 178 0 Z
+bit 178 C 0 IO_M2
+
+bit 177 O 1 * # M5
+bit 176 O 1 *
+bit 175 O 1 *
+
+bit 174 I ? IO_M3 # M6
+bit 173 O ? IO_M3 172 0 Z
+bit 172 C 0 IO_M3
+
+bit 171 O 1 * # M7
+bit 170 O 1 *
+bit 169 O 1 *
+
+bit 168 I ? IO_M4 # M8
+bit 167 O ? IO_M4 166 0 Z
+bit 166 C 0 IO_M4
+
+bit 165 O 1 * # M9
+bit 164 O 1 *
+bit 163 O 1 *
+
+bit 162 I ? IO_M5 # M10
+bit 161 O ? IO_M5 160 0 Z
+bit 160 C 0 IO_M5
+
+bit 159 O 1 * # M11
+bit 158 O 1 *
+bit 157 O 1 *
+
+bit 156 I ? IO_M6 # M12
+bit 155 O ? IO_M6 154 0 Z
+bit 154 C 0 IO_M6
+
+bit 153 O 1 * # M13
+bit 152 O 1 *
+bit 151 O 1 *
+
+bit 150 I ? IO_M7 # M14
+bit 149 O ? IO_M7 148 0 Z
+bit 148 C 0 IO_M7
+
+bit 147 O 1 * # M15
+bit 146 O 1 *
+bit 145 O 1 *
+
+# ------------------------------------ N0 - N15 ----------------------------------
+
+bit 144 I ? IO_N0 # N0
+bit 143 O ? IO_N0 142 0 Z
+bit 142 C 0 IO_N0
+
+bit 141 I ? IO_N1 # N1
+bit 140 O ? IO_N1 139 0 Z
+bit 139 C 0 IO_N1
+
+bit 138 I ? IO_N2 # N2
+bit 137 O ? IO_N2 136 0 Z
+bit 136 C 0 IO_N2
+
+bit 135 I ? IO_N3 # N3
+bit 134 O ? IO_N3 133 0 Z
+bit 133 C 0 IO_N3
+
+bit 132 I ? IO_N4 # N4
+bit 131 O ? IO_N4 130 0 Z
+bit 130 C 0 IO_N4
+
+bit 129 I ? IO_N5 # N5
+bit 128 O ? IO_N5 127 0 Z
+bit 127 C 0 IO_N5
+
+bit 126 I ? IO_N6 # N6
+bit 125 O ? IO_N6 124 0 Z
+bit 124 C 0 IO_N6
+
+bit 123 I ? IO_N7 # N7
+bit 122 O ? IO_N7 121 0 Z
+bit 121 C 0 IO_N7
+
+bit 120 I ? IO_N8 # N8
+bit 119 O ? IO_N8 118 0 Z
+bit 118 C 0 IO_N8
+
+bit 117 I ? IO_N9 # N9
+bit 116 O ? IO_N9 115 0 Z
+bit 115 C 0 IO_N9
+
+bit 114 I ? IO_N10 # N10
+bit 113 O ? IO_N10 112 0 Z
+bit 112 C 0 IO_N10
+
+bit 111 I ? IO_N11 # N11
+bit 110 O ? IO_N11 109 0 Z
+bit 109 C 0 IO_N11
+
+bit 108 I ? IO_N12 # N12
+bit 107 O ? IO_N12 106 0 Z
+bit 106 C 0 IO_N12
+
+bit 105 I ? IO_N13 # N13
+bit 104 O ? IO_N13 103 0 Z
+bit 103 C 0 IO_N13
+
+bit 102 I ? IO_N14 # N14
+bit 101 O ? IO_N14 100 0 Z
+bit 100 C 0 IO_N14
+
+bit 99 I ? IO_N15 # N15
+bit 98 O ? IO_N15 97 0 Z
+bit 97 C 0 IO_N15
+
+# ----------------------------- P0P2P4P8P10P12P14 --------------------------
+
+bit 96 I ? IO_P0 # P0
+bit 95 O ? IO_P0 94 0 Z
+bit 94 C 0 IO_P0
+
+bit 93 O 1 * # P1
+bit 92 O 1 *
+bit 91 O 1 *
+
+bit 90 I ? IO_P1 # P2
+bit 89 O ? IO_P1 88 0 Z
+bit 88 C 0 IO_P1
+
+bit 87 O 1 * # P3
+bit 86 O 1 *
+bit 85 O 1 *
+
+bit 84 I ? IO_P2 # P4
+bit 83 O ? IO_P2 82 0 Z
+bit 82 C 0 IO_P2
+
+bit 81 O 1 * # P5
+bit 80 O 1 *
+bit 79 O 1 *
+
+bit 78 I ? IO_P3 # P6
+bit 77 O ? IO_P3 76 0 Z
+bit 76 C 0 IO_P3
+
+bit 75 O 1 * # P7
+bit 74 O 1 *
+bit 73 O 1 *
+
+bit 72 I ? IO_P4 # P8
+bit 71 O ? IO_P4 70 0 Z
+bit 70 C 0 IO_P4
+
+bit 69 O 1 * # P9
+bit 68 O 1 *
+bit 67 O 1 *
+
+bit 66 I ? IO_P5 # P10
+bit 65 O ? IO_P5 64 0 Z
+bit 64 C 0 IO_P5
+
+bit 63 O 1 * # P11
+bit 62 O 1 *
+bit 61 O 1 *
+
+bit 60 I ? IO_P6 # P12
+bit 59 O ? IO_P6 58 0 Z
+bit 58 C 0 IO_P6
+
+bit 57 O 1 * # P13
+bit 56 O 1 *
+bit 55 O 1 *
+
+bit 54 I ? IO_P7 # P14
+bit 53 O ? IO_P7 52 0 Z
+bit 52 C 0 IO_P7
+
+bit 51 O 1 * # P15
+bit 50 O 1 *
+bit 49 O 1 *
+
+# ------------------------------------ O0 - O15 ----------------------------------
+
+bit 48 I ? IO_O0 # O0
+bit 47 O ? IO_O0 46 0 Z
+bit 46 C 0 IO_O0
+
+bit 45 I ? IO_O1 # O1
+bit 44 O ? IO_O1 43 0 Z
+bit 43 C 0 IO_O1
+
+bit 42 I ? IO_O2 # O2
+bit 41 O ? IO_O2 40 0 Z
+bit 40 C 0 IO_O2
+
+bit 39 I ? IO_O3 # O3
+bit 38 O ? IO_O3 37 0 Z
+bit 37 C 0 IO_O3
+
+bit 36 I ? IO_O4 # O4
+bit 35 O ? IO_O4 34 0 Z
+bit 34 C 0 IO_O4
+
+bit 33 I ? IO_O5 # O5
+bit 32 O ? IO_O5 31 0 Z
+bit 31 C 0 IO_O5
+
+bit 30 I ? IO_O6 # O6
+bit 29 O ? IO_O6 28 0 Z
+bit 28 C 0 IO_O6
+
+bit 27 I ? IO_O7 # O7
+bit 26 O ? IO_O7 25 0 Z
+bit 25 C 0 IO_O7
+
+bit 24 I ? IO_O8 # O8
+bit 23 O ? IO_O8 22 0 Z
+bit 22 C 0 IO_O8
+
+bit 21 I ? IO_O9 # O9
+bit 20 O ? IO_O9 19 0 Z
+bit 19 C 0 IO_O9
+
+bit 18 I ? IO_O10 # O10
+bit 17 O ? IO_O10 16 0 Z
+bit 16 C 0 IO_O10
+
+bit 15 I ? IO_O11 # O11
+bit 14 O ? IO_O11 13 0 Z
+bit 13 C 0 IO_O11
+
+bit 12 I ? IO_O12 # O12
+bit 11 O ? IO_O12 10 0 Z
+bit 10 C 0 IO_O12
+
+bit 9 I ? IO_O13 # O13
+bit 8 O ? IO_O13 7 0 Z
+bit 7 C 0 IO_O13
+
+bit 6 I ? IO_O14 # O14
+bit 5 O ? IO_O14 4 0 Z
+bit 4 C 0 IO_O14
+
+bit 3 I ? IO_O15 # O15
+bit 2 O ? IO_O15 1 0 Z
+bit 1 C 0 IO_O15
+
+# -------------------------------------- CLK3 ------------------------------------
+
+bit 0 I ? CLK3
--- /dev/null
+#
+# $Id$
+#
+# Copyright (C) 2002 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Marcel Telka <marcel@telka.sk>, 2002.
+#
+
+# bits 31-28 of the Device Identification Register
+
+0001 m4a3-64.32-tqfp48 1
--- /dev/null
+#
+# $Id$
+#
+# JTAG declarations for Lattice M4A3-64/32 (48-pin TQFP)
+# Copyright (C) 2002 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Marcel Telka <marcel@telka.sk>, 2002.
+#
+
+signal IOA0 44
+signal IOA1 45
+signal IOA2 46
+signal IOA3 47
+signal IOA4 48
+signal IOA5 1
+signal IOA6 2
+signal IOA7 3
+signal IOB0 9
+signal IOB1 10
+signal IOB2 11
+signal IOB3 12
+signal IOB4 13
+signal IOB5 14
+signal IOB6 15
+signal IOB7 16
+signal IOC0 20
+signal IOC1 21
+signal IOC2 22
+signal IOC3 23
+signal IOC4 24
+signal IOC5 25
+signal IOC6 26
+signal IOC7 27
+signal IOD0 33
+signal IOD1 34
+signal IOD2 35
+signal IOD3 36
+signal IOD4 37
+signal IOD5 38
+signal IOD6 39
+signal IOD7 40
+signal CLK0 5
+signal CLK1 29
+signal TDI 4
+signal TCK 8
+signal TMS 28
+signal TDO 32
+signal GND 7 19 31 43
+signal NC 6 18 30 42
+signal VCC 17 41
+
+# mandatory data registers
+register BSR 98 # Boundary Scan Register
+register BR 1 # Bypass Register
+
+# optional data registers
+register DIR 32 # Device Identification Register
+
+instruction length 6
+
+# mandatory instructions
+instruction EXTEST 000000 BSR
+instruction SAMPLE/PRELOAD 000100 BSR
+instruction BYPASS 111111 BR
+
+# optional instructions
+instruction IDCODE 000001 DIR
+instruction USERCODE 010000 DIR
+instruction HIGHZ 010001 BR
+instruction CLAMP 100000 BR
+
+
+# Boundary Scan Register bit definition
+
+bit 97 I ? IOA0
+bit 96 O ? IOA0 95 0 Z
+bit 95 C 0 IOA0
+bit 94 I ? IOA1
+bit 93 O ? IOA1 92 0 Z
+bit 92 C 0 IOA1
+bit 91 I ? IOA2
+bit 90 O ? IOA2 89 0 Z
+bit 89 C 0 IOA2
+bit 88 I ? IOA3
+bit 87 O ? IOA3 86 0 Z
+bit 86 C 0 IOA3
+bit 85 I ? IOA4
+bit 84 O ? IOA4 83 0 Z
+bit 83 C 0 IOA4
+bit 82 I ? IOA5
+bit 81 O ? IOA5 80 0 Z
+bit 80 C 0 IOA5
+bit 79 I ? IOA6
+bit 78 O ? IOA6 77 0 Z
+bit 77 C 0 IOA6
+bit 76 I ? IOA7
+bit 75 O ? IOA7 74 0 Z
+bit 74 C 0 IOA7
+bit 73 I ? CLK0
+bit 72 I ? IOB0
+bit 71 O ? IOB0 70 0 Z
+bit 70 C 0 IOB0
+bit 69 I ? IOB1
+bit 68 O ? IOB1 67 0 Z
+bit 67 C 0 IOB1
+bit 66 I ? IOB2
+bit 65 O ? IOB2 64 0 Z
+bit 64 C 0 IOB2
+bit 63 I ? IOB3
+bit 62 O ? IOB3 61 0 Z
+bit 61 C 0 IOB3
+bit 60 I ? IOB4
+bit 59 O ? IOB4 58 0 Z
+bit 58 C 0 IOB4
+bit 57 I ? IOB5
+bit 56 O ? IOB5 55 0 Z
+bit 55 C 0 IOB5
+bit 54 I ? IOB6
+bit 53 O ? IOB6 52 0 Z
+bit 52 C 0 IOB6
+bit 51 I ? IOB7
+bit 50 O ? IOB7 49 0 Z
+bit 49 C 0 IOB7
+bit 48 I ? IOC0
+bit 47 O ? IOC0 46 0 Z
+bit 46 C 0 IOC0
+bit 45 I ? IOC1
+bit 44 O ? IOC1 43 0 Z
+bit 43 C 0 IOC1
+bit 42 I ? IOC2
+bit 41 O ? IOC2 40 0 Z
+bit 40 C 0 IOC2
+bit 39 I ? IOC3
+bit 38 O ? IOC3 37 0 Z
+bit 37 C 0 IOC3
+bit 36 I ? IOC4
+bit 35 O ? IOC4 34 0 Z
+bit 34 C 0 IOC4
+bit 33 I ? IOC5
+bit 32 O ? IOC5 31 0 Z
+bit 31 C 0 IOC5
+bit 30 I ? IOC6
+bit 29 O ? IOC6 28 0 Z
+bit 28 C 0 IOC6
+bit 27 I ? IOC7
+bit 26 O ? IOC7 25 0 Z
+bit 25 C 0 IOC7
+bit 24 I ? CLK1
+bit 23 I ? IOD0
+bit 22 O ? IOD0 21 0 Z
+bit 21 C 0 IOD0
+bit 20 I ? IOD1
+bit 19 O ? IOD1 18 0 Z
+bit 18 C 0 IOD1
+bit 17 I ? IOD2
+bit 16 O ? IOD2 15 0 Z
+bit 15 C 0 IOD2
+bit 14 I ? IOD3
+bit 13 O ? IOD3 12 0 Z
+bit 12 C 0 IOD3
+bit 11 I ? IOD4
+bit 10 O ? IOD4 9 0 Z
+bit 9 C 0 IOD4
+bit 8 I ? IOD5
+bit 7 O ? IOD5 6 0 Z
+bit 6 C 0 IOD5
+bit 5 I ? IOD6
+bit 4 O ? IOD6 3 0 Z
+bit 3 C 0 IOD6
+bit 2 I ? IOD7
+bit 1 O ? IOD7 0 0 Z
+bit 0 C 0 IOD7
--- /dev/null
+#
+# $Id$
+#
+# Copyright (C) 2005 Marek Michalkiewicz
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Marek Michalkiewicz <marekm@amelek.gda.pl>, 2005.
+#
+
+# bits 27-12 of the Device Identification Register
+0101001010000000 lx5280 LX5280
--- /dev/null
+#
+# $Id$
+#
+# Copyright (C) 2005 Marek Michalkiewicz
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Marek Michalkiewicz <marekm@amelek.gda.pl>, 2005.
+#
+
+# bits 31-28 of the Device Identification Register
+0001 lx5280 1
--- /dev/null
+#
+# $Id$
+#
+# JTAG declarations for Lexra LX5280 (Realtek RTL8181, RTL8186)
+# Copyright (C) 2005 Marek Michalkiewicz
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Marek Michalkiewicz <marekm@amelek.gda.pl>, 2005.
+#
+
+register BR 1
+register DIR 32
+register EJIMPCODE 32
+register EJADDRESS 32
+register EJDATA 32
+register EJCONTROL 32
+register EJALL 96
+
+instruction length 5
+
+instruction BYPASS 11111 BR
+instruction IDCODE 00001 DIR
+instruction EJTAG_IMPCODE 00011 EJIMPCODE
+instruction EJTAG_ADDRESS 01000 EJADDRESS
+instruction EJTAG_DATA 01001 EJDATA
+instruction EJTAG_CONTROL 01010 EJCONTROL
+instruction EJTAG_ALL 01011 EJALL
+
+initbus ejtag
+endian big
--- /dev/null
+#
+# $Id$
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+
+# mandatory data registers
+register BR 1 # Bypass Register
+
+# optional data registers
+register DIR 32 # Device Identification Register
+
+instruction length 8
+
+# mandatory instructions
+instruction BYPASS 11111111 BR
--- /dev/null
+#
+# $Id$
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+
+# bits 31-28 of the Device Identification Register
+
+0000 88e1118 0
--- /dev/null
+#
+# $Id$
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+
+# mandatory data registers
+register BR 1 # Bypass Register
+
+# optional data registers
+register DIR 32 # Device Identification Register
+
+instruction length 4
+
+# mandatory instructions
+instruction BYPASS 1111 BR
--- /dev/null
+#
+# $Id$
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+
+# bits 31-28 of the Device Identification Register
+
+0020 88f5182-a2 A2
--- /dev/null
+#
+# $Id$
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+
+# bits 27-12 of the Device Identification Register
+0000000000001010 88e1118 MV88E1118
+0101000110000010 88f5182 MV88F5182
--- /dev/null
+#
+# $Id: 1.2,v 1.1 2003/11/02 23:13:01 telka Exp $
+#
+# JTAG declarations for Motorola MPC8241 rev. 1.2 (or higher)
+# Copyright (C) 2003 Marcel Telka
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Documentation:
+# [1] Motorola, Inc., "MPC8241 Integrated Processor Hardware Specifications",
+# MPC8241EC/D, Rev. 3, 7/2003
+# [2] Motorola, Inc., "Motorola PowerPC MPC8241 (TM) 603/PCI Bridge/Memory
+# Controller Boundary Scan Description Language - MPC8241 Revision
+# 1.2 (or higher)", Oct 29, 2002
+#
+
+# signal list (see Table 17 in [1])
+
+# PCI Interface Signals
+signal nC/BE3 V11
+signal nC/BE2 V7
+signal nC/BE1 W3
+signal nC/BE0 R3
+signal nDEVSEL U6
+signal nFRAME T8
+signal nIRDY U7
+signal nLOCK V6
+signal AD31 U13
+signal AD30 V13
+signal AD29 U11
+signal AD28 W14
+signal AD27 V14
+signal AD26 U12
+signal AD25 W10
+signal AD24 T10
+signal AD23 V10
+signal AD22 U9
+signal AD21 V9
+signal AD20 W9
+signal AD19 W8
+signal AD18 T9
+signal AD17 W7
+signal AD16 V8
+signal AD15 V4
+signal AD14 W4
+signal AD13 V3
+signal AD12 V2
+signal AD11 T5
+signal AD10 R6
+signal AD9 V1
+signal AD8 T2
+signal AD7 U3
+signal AD6 P3
+signal AD5 T4
+signal AD4 R1
+signal AD3 T3
+signal AD2 R4
+signal AD1 U2
+signal AD0 U1
+signal PAR R7
+signal nGNT3 W15
+signal nGNT2 U15
+signal nGNT1 W17
+signal nGNT0 V12
+signal nGNT4 T11
+signal nREQ3 V16
+signal nREQ2 U14
+signal nREQ1 T15
+signal nREQ0 V15
+signal nREQ4 W13
+signal nPERR T7
+signal nSERR U5
+signal nSTOP W5
+signal nTRDY W6
+signal nINTA T12
+signal IDSEL U10
+
+# Memory Interface Signals
+signal MDL0 M19
+signal MDL1 M17
+signal MDL2 L16
+signal MDL3 L17
+signal MDL4 K18
+signal MDL5 J18
+signal MDL6 K17
+signal MDL7 K16
+signal MDL8 J15
+signal MDL9 J17
+signal MDL10 H18
+signal MDL11 F16
+signal MDL12 H16
+signal MDL13 H15
+signal MDL14 G17
+signal MDL15 D19
+signal MDL16 B3
+signal MDL17 C4
+signal MDL18 C2
+signal MDL19 D3
+signal MDL20 G5
+signal MDL21 E1
+signal MDL22 H5
+signal MDL23 E2
+signal MDL24 F1
+signal MDL25 F2
+signal MDL26 G2
+signal MDL27 J5
+signal MDL28 H1
+signal MDL29 H4
+signal MDL30 J4
+signal MDL31 J1
+signal MDH0 M18
+signal MDH1 L18
+signal MDH2 L15
+signal MDH3 K19
+signal MDH4 K15
+signal MDH5 J19
+signal MDH6 J16
+signal MDH7 H17
+signal MDH8 G19
+signal MDH9 G18
+signal MDH10 G16
+signal MDH11 D18
+signal MDH12 F18
+signal MDH13 E18
+signal MDH14 G15
+signal MDH15 E15
+signal MDH16 C3
+signal MDH17 D4
+signal MDH18 E5
+signal MDH19 F5
+signal MDH20 D1
+signal MDH21 E4
+signal MDH22 D2
+signal MDH23 E3
+signal MDH24 F4
+signal MDH25 G3
+signal MDH26 G4
+signal MDH27 G1
+signal MDH28 H2
+signal MDH29 J3
+signal MDH30 J2
+signal MDH31 K5
+signal DQM0 A18
+signal DQM1 B18
+signal DQM2 A6
+signal DQM3 C7
+signal DQM4 D15
+signal DQM5 D14
+signal DQM6 A9
+signal DQM7 B8
+signal nCS0 A17
+signal nCS1 B17
+signal nCS2 C16
+signal nCS3 C17
+signal nCS4 C9
+signal nCS5 C8
+signal nCS6 A10
+signal nCS7 B10
+signal nFOE A7
+signal nRCS0 C10
+signal nRCS1 B9
+signal nRCS2 P18
+signal nRCS3 N18
+signal SDMA1 A15
+signal SDMA0 B15
+signal SDMA11 A11
+signal SDMA10 B12
+signal SDMA9 A12
+signal SDMA8 C12
+signal SDMA7 B13
+signal SDMA6 C13
+signal SDMA5 D12
+signal SDMA4 A14
+signal SDMA3 C14
+signal SDMA2 B14
+signal nDRDY P1
+signal SDMA12 L3
+signal SDMA13 K3
+signal SDMA14 K2
+signal SDBA1 C11
+signal SDBA0 B11
+signal PAR0 E19
+signal PAR1 C19
+signal PAR2 D5
+signal PAR3 D6
+signal PAR4 E16
+signal PAR5 F17
+signal PAR6 B2
+signal PAR7 C1
+signal nSDRAS B19
+signal nSDCAS D16
+signal CKE C6
+signal nWE B16
+signal nAS A16
+
+# PIC Control Signals
+signal IRQ0 P4
+signal IRQ1 R2
+signal IRQ2 U19
+signal IRQ3 P15
+signal IRQ4 P2
+
+# I2C Control Signals
+signal SDA R17
+signal SCL R19
+
+# DUART Control Signals
+signal SOUT1 T16
+signal SIN1 U16
+signal SOUT2 W18
+signal SIN2 V19
+
+# Clock-Out Signals
+salias PCI_CLK0 SOUT1
+salias PCI_CLK1 SIN1
+salias PCI_CLK2 SOUT2
+salias PCI_CLK3 SIN2
+signal PCI_CLK4 V17
+signal PCI_SYNC_OUT U17
+signal PCI_SYNC_IN V18
+signal SDRAM_CLK0 D7
+signal SDRAM_CLK1 B7
+signal SDRAM_CLK2 C5
+signal SDRAM_CLK3 A5
+signal SDRAM_SYNC_OUT B4
+signal SDRAM_SYNC_IN A4
+signal CKO L1
+signal OSC_IN R17
+
+# Miscellaneous Signals
+signal nHRST_CTRL M2
+signal nHRST_CPU L4
+signal nMCP K4
+signal NMI M1
+signal nSMI L2
+salias nSRESET SDMA12
+salias TBEN SDMA13
+signal nQACK A3
+salias nCHKSTOP_IN SDMA14
+salias TRIG_IN nRCS2
+salias TRIG_OUT nRCS3
+signal MAA0 E17
+signal MAA1 D17
+signal MAA2 C18
+signal nMIV K1
+signal PMAA0 N19
+signal PMAA1 N17
+signal PMAA2 M15
+
+# Test/Configuration Signals
+signal PLL_CFG0 N3
+signal PLL_CFG1 N2
+signal PLL_CFG2 N1
+signal PLL_CFG3 M4
+signal PLL_CFG4 M3
+signal nTEST0 P16
+# nDRDY
+signal RTC D13
+signal TCK T19
+signal TDI N15
+signal TDO T17
+signal TMS T18
+signal nTRST R16
+
+# Power and Ground Signals
+signal GND F07 F08 F09 F11 F12 F13 G07 G08 G09 G10 G11 G12 G13 H07 H08 H09 H10 H11 H12 H13 J07 J08 J09 J10 J11 J12 J13 K07 K08 K09 K10 K11 K12 K13 L07 L08 L09 L10 L11 L12 L13 M07 M08 M09 M10 M11 M12 M13 N07 N08 N09 N10 N11 N12 N13 P08 P09 P10 P11 P12 P13 R15
+signal LVDD R18 U18 T1 U4 T6 W11 T14
+signal GVDD D09 D10 D11 E06 E07 E08 E09 E10 E11 E12 E13 E14 F06 F14 G06 G14 H06 H14 J06 J14 K06 K14 L06 L14 M06 M14 N06 N14 P06 P07 P14 R08 R09 R10 R11 R12
+signal OVDD GVDD
+signal VDD F03 H3 L5 N4 P5 V5 U8 W12 W16 R13 P19 L19 H19 F19 F15 C15 A13 A8 B5 A2
+signal NC N5 W2 B1
+signal AVDD M5
+signal AVDD2 R14
+
+# Debug/Manufacturing Pins
+salias DA0 nQACK
+salias DA1 CKO
+signal DA2 R5
+salias DA3 PCI_CLK4
+salias DA4 nREQ4
+salias DA5 nGNT4
+salias DA10 PLL_CFG0
+salias DA9 PLL_CFG1
+salias DA8 PLL_CFG2
+salias DA7 PLL_CFG3
+salias DA6 PLL_CFG4
+signal DA11 T13
+signal DA12 M16
+signal DA13 N16
+signal DA14 B6
+signal DA15 D8
+
+# see [2]
+# mandatory data registers
+register BSR 507
+register BR 1
+
+# see [2]
+instruction length 8
+# mandatory instructions
+instruction EXTEST 00000000 BSR
+instruction SAMPLE/PRELOAD 11000000 BSR
+instruction BYPASS 11111111 BR
+# optional instructions
+instruction HIGHZ 11110000 BR
+instruction CLAMP 11110001 BR
+
+# see [2]
+bit 506 B 0 nC/BE0 298 0 Z
+bit 505 B 0 nIRQ1 504 0 Z
+bit 504 C 0 .
+bit 503 I ? nIRQ0
+bit 502 B 0 nIRQ4 501 0 Z
+bit 501 C 0 .
+bit 500 I ? nDRDY
+bit 499 B 0 PLL_CFG0 132 0 Z
+bit 498 B 0 PLL_CFG1 132 0 Z
+bit 497 B 0 PLL_CFG2 132 0 Z
+bit 496 B 0 PLL_CFG3 132 0 Z
+bit 495 B 0 PLL_CFG4 132 0 Z
+bit 494 I ? nHRST_CTRL
+bit 493 I ? nHRST_CPU
+bit 492 O 0 SDRAM_SYNC_OUT 133 0 Z
+bit 491 I ? SDRAM_SYNC_IN
+bit 490 B 0 nMCP 251 0 Z
+bit 489 X ? .
+bit 488 I ? NMI
+bit 487 O 0 nMIV 222 0 Z
+bit 486 B 0 PAR0 188 0 Z
+bit 485 B 0 PAR1 188 0 Z
+bit 484 B 0 PAR2 188 0 Z
+bit 483 B 0 PAR3 188 0 Z
+bit 482 B 0 PAR4 189 0 Z
+bit 481 B 0 PAR5 189 0 Z
+bit 480 B 0 PAR6 189 0 Z
+bit 479 B 0 PAR7 189 0 Z
+bit 478 X ? .
+bit 477 X ? .
+bit 476 X ? .
+bit 475 X ? .
+bit 474 X ? .
+bit 473 X ? .
+bit 472 X ? .
+bit 471 X ? .
+bit 470 X ? .
+bit 469 X ? .
+bit 468 X ? .
+bit 467 X ? .
+bit 466 X ? .
+bit 465 X ? .
+bit 464 X ? .
+bit 463 X ? .
+bit 462 X ? .
+bit 461 X ? .
+bit 460 X ? .
+bit 459 X ? .
+bit 458 X ? .
+bit 457 X ? .
+bit 456 X ? .
+bit 455 X ? .
+bit 454 X ? .
+bit 453 X ? .
+bit 452 X ? .
+bit 451 X ? .
+bit 450 X ? .
+bit 449 X ? .
+bit 448 X ? .
+bit 447 X ? .
+bit 446 X ? .
+bit 445 X ? .
+bit 444 X ? .
+bit 443 X ? .
+bit 442 X ? .
+bit 441 X ? .
+bit 440 X ? .
+bit 439 X ? .
+bit 438 X ? .
+bit 437 X ? .
+bit 436 C 0 .
+bit 435 X ? .
+bit 434 B 0 MDH0 436 0 Z
+bit 433 B 0 MDH1 436 0 Z
+bit 432 B 0 MDH2 436 0 Z
+bit 431 B 0 MDH3 436 0 Z
+bit 430 B 0 MDH4 436 0 Z
+bit 429 B 0 MDH5 436 0 Z
+bit 428 B 0 MDH6 436 0 Z
+bit 427 B 0 MDH7 436 0 Z
+bit 426 B 0 MDH8 436 0 Z
+bit 425 B 0 MDH9 436 0 Z
+bit 424 B 0 MDH10 436 0 Z
+bit 423 B 0 MDH11 436 0 Z
+bit 422 B 0 MDH12 436 0 Z
+bit 421 B 0 MDH13 436 0 Z
+bit 420 B 0 MDH14 436 0 Z
+bit 419 B 0 MDH15 436 0 Z
+bit 418 B 0 MDH16 436 0 Z
+bit 417 B 0 MDH17 436 0 Z
+bit 416 B 0 MDH18 436 0 Z
+bit 415 B 0 MDH19 436 0 Z
+bit 414 B 0 MDH20 436 0 Z
+bit 413 B 0 MDH21 436 0 Z
+bit 412 B 0 MDH22 436 0 Z
+bit 411 B 0 MDH23 436 0 Z
+bit 410 B 0 MDH24 436 0 Z
+bit 409 B 0 MDH25 436 0 Z
+bit 408 B 0 MDH26 436 0 Z
+bit 407 B 0 MDH27 436 0 Z
+bit 406 B 0 MDH28 436 0 Z
+bit 405 B 0 MDH29 436 0 Z
+bit 404 B 0 MDH30 436 0 Z
+bit 403 B 0 MDH31 436 0 Z
+bit 402 B 0 nFOE 223 0 Z
+bit 401 C 0 .
+bit 400 O 0 nRCS1 224 0 Z
+bit 399 B 0 nRCS0 223 0 Z
+bit 398 O 0 SDRAM_CLK0 397 0 Z
+bit 397 C 0 .
+bit 396 O 0 SDRAM_CLK2 395 0 Z
+bit 395 C 0 .
+bit 394 O 0 SDRAM_CLK3 393 0 Z
+bit 393 C 0 .
+bit 392 B 0 CKE 401 0 Z
+bit 391 O 0 SDBA0 224 0 Z
+bit 390 X ? .
+bit 389 X ? .
+bit 388 X ? .
+bit 387 X ? .
+bit 386 X ? .
+bit 385 X ? .
+bit 384 X ? .
+bit 383 X ? .
+bit 382 X ? .
+bit 381 X ? .
+bit 380 X ? .
+bit 379 X ? .
+bit 378 X ? .
+bit 377 X ? .
+bit 376 X ? .
+bit 375 X ? .
+bit 374 X ? .
+bit 373 X ? .
+bit 372 X ? .
+bit 371 X ? .
+bit 370 X ? .
+bit 369 X ? .
+bit 368 X ? .
+bit 367 X ? .
+bit 366 X ? .
+bit 365 X ? .
+bit 364 X ? .
+bit 363 X ? .
+bit 362 X ? .
+bit 361 X ? .
+bit 360 X ? .
+bit 359 X ? .
+bit 358 C 0 .
+bit 357 B 0 MDL0 358 0 Z
+bit 356 B 0 MDL1 358 0 Z
+bit 355 B 0 MDL2 358 0 Z
+bit 354 B 0 MDL3 358 0 Z
+bit 353 B 0 MDL4 358 0 Z
+bit 352 B 0 MDL5 358 0 Z
+bit 351 B 0 MDL6 358 0 Z
+bit 350 B 0 MDL7 358 0 Z
+bit 349 B 0 MDL8 358 0 Z
+bit 348 B 0 MDL9 358 0 Z
+bit 347 B 0 MDL10 358 0 Z
+bit 346 B 0 MDL11 358 0 Z
+bit 345 B 0 MDL12 358 0 Z
+bit 344 B 0 MDL13 358 0 Z
+bit 343 B 0 MDL14 358 0 Z
+bit 342 B 0 MDL15 358 0 Z
+bit 341 B 0 MDL16 358 0 Z
+bit 340 B 0 MDL17 358 0 Z
+bit 339 B 0 MDL18 358 0 Z
+bit 338 B 0 MDL19 358 0 Z
+bit 337 B 0 MDL20 358 0 Z
+bit 336 B 0 MDL21 358 0 Z
+bit 335 B 0 MDL22 358 0 Z
+bit 334 B 0 MDL23 358 0 Z
+bit 333 B 0 MDL24 358 0 Z
+bit 332 B 0 MDL25 358 0 Z
+bit 331 B 0 MDL26 358 0 Z
+bit 330 B 0 MDL27 358 0 Z
+bit 329 B 0 MDL28 358 0 Z
+bit 328 B 0 MDL29 358 0 Z
+bit 327 B 0 MDL30 358 0 Z
+bit 326 B 0 MDL31 358 0 Z
+bit 325 B 0 SDMA0 223 0 Z
+bit 324 B 0 SDMA1 223 0 Z
+bit 323 O 0 SDMA2 224 0 Z
+bit 322 O 0 SDMA3 224 0 Z
+bit 321 O 0 SDMA4 224 0 Z
+bit 320 O 0 SDMA5 224 0 Z
+bit 319 O 0 SDMA6 224 0 Z
+bit 318 O 0 SDMA7 224 0 Z
+bit 317 O 0 SDMA8 224 0 Z
+bit 316 O 0 SDMA9 224 0 Z
+bit 315 O 0 SDMA10 224 0 Z
+bit 314 O 0 SDMA11 224 0 Z
+bit 313 X ? .
+bit 312 X ? .
+bit 311 X ? .
+bit 310 O 0 SDBA1 224 0 Z
+bit 309 B 0 PAR 299 0 Z
+bit 308 C 0 .
+bit 307 O 0 SDRAM_CLK1 308 0 Z
+bit 306 X ? .
+bit 305 X ? .
+bit 304 O 0 DQM2 224 0 Z
+bit 303 O 0 DQM5 224 0 Z
+bit 302 O 0 DQM4 224 0 Z
+bit 301 O 0 DQM3 224 0 Z
+bit 300 X ? .
+bit 299 C 0 .
+bit 298 C 0 .
+bit 297 C 0 .
+bit 296 C 0 .
+bit 295 X ? .
+bit 294 X ? .
+bit 293 X ? .
+bit 292 X ? .
+bit 291 B 0 nTRDY 296 0 Z
+bit 290 X ? .
+bit 289 B 0 nGNT4 223 0 Z
+bit 288 O 0 nGNT2 223 0 Z
+bit 287 X ? .
+bit 286 X ? .
+bit 285 X ? .
+bit 284 X ? .
+bit 283 X ? .
+bit 282 O 0 nCS2 224 0 Z
+bit 281 O 0 nCS0 224 0 Z
+bit 280 O 0 nCS1 224 0 Z
+bit 279 X ? .
+bit 278 X ? .
+bit 277 X ? .
+bit 276 C 0 .
+bit 275 B 0 nINTA 276 0 Z
+bit 274 X ? .
+bit 273 B 0 nSRESET 131 0 Z
+bit 272 B 0 nQACK 223 0 Z
+bit 271 X ? .
+bit 270 X ? .
+bit 269 X ? .
+bit 268 X ? .
+bit 267 X ? .
+bit 266 X ? .
+bit 265 X ? .
+bit 264 X ? .
+bit 263 X ? .
+bit 262 X ? .
+bit 261 X ? .
+bit 260 X ? .
+bit 259 X ? .
+bit 258 X ? .
+bit 257 X ? .
+bit 256 X ? .
+bit 255 X ? .
+bit 254 X ? .
+bit 253 X ? .
+bit 252 X ? .
+bit 251 C 0 .
+bit 250 X ? .
+bit 249 C 0 .
+bit 248 X ? .
+bit 247 X ? .
+bit 246 X ? .
+bit 245 X ? .
+bit 244 X ? .
+bit 243 X ? .
+bit 242 X ? .
+bit 241 X ? .
+bit 240 X ? .
+bit 239 X ? .
+bit 238 X ? .
+bit 237 X ? .
+bit 236 X ? .
+bit 235 O 0 nCS4 224 0 Z
+bit 234 O 0 nCS5 224 0 Z
+bit 233 O 0 DQM0 224 0 Z
+bit 232 O 0 DQM6 224 0 Z
+bit 231 O 0 DQM1 224 0 Z
+bit 230 O 0 DQM7 224 0 Z
+bit 229 X ? .
+bit 228 X ? .
+bit 227 X ? .
+bit 226 X ? .
+bit 225 X ? .
+bit 224 C 0 .
+bit 223 C 0 .
+bit 222 C 0 .
+bit 221 O 0 nGNT1 223 0 Z
+bit 220 X ? .
+bit 219 C 0 .
+bit 218 O 0 nCS6 224 0 Z
+bit 217 O 0 nCS7 224 0 Z
+bit 216 O 0 nSDRAS 224 0 Z
+bit 215 O 0 nCS3 224 0 Z
+bit 214 O 0 nAS 223 0 Z
+bit 213 X ? .
+bit 212 I ? RTC
+bit 211 O 0 TRIG_OUT 219 0 Z
+bit 210 B 0 TBEN 130 0 Z
+bit 209 X ? .
+bit 208 X ? .
+bit 207 O 0 nGNT3 223 0 Z
+bit 206 O 0 nGNT0 223 0 Z
+bit 205 O 0 CKO 249 0 Z
+bit 204 O 0 nWE 224 0 Z
+bit 203 C 0 .
+bit 202 C 0 .
+bit 201 C 0 .
+bit 200 C 0 .
+bit 199 C 0 .
+bit 198 C 0 .
+bit 197 O 0 PCI_CLK4 203 0 Z
+bit 196 O 0 PCI_SYNC_OUT 202 0 Z
+bit 195 B 0 PCI_CLK3 200 0 Z
+bit 194 O 0 PCI_CLK2 201 0 Z
+bit 193 B 0 PCI_CLK1 198 0 Z
+bit 192 O 0 PCI_CLK0 199 0 Z
+bit 191 C 0 .
+bit 190 X ? .
+bit 189 C 0 .
+bit 188 C 0 .
+bit 187 C 0 .
+bit 186 C 0 .
+bit 185 B 0 TRIG_IN 130 0 Z
+bit 184 B 0 nCHKSTOP_IN 131 0 Z
+bit 183 X ? .
+bit 182 X ? .
+bit 181 X ? .
+bit 180 X ? .
+bit 179 X ? .
+bit 178 X ? .
+bit 177 X ? .
+bit 176 X ? .
+bit 175 X ? .
+bit 174 X ? .
+bit 173 X ? .
+bit 172 X ? .
+bit 171 X ? .
+bit 170 X ? .
+bit 169 X ? .
+bit 168 O 0 nSDCAS 224 0 Z
+bit 167 X ? .
+bit 166 X ? .
+bit 165 X ? .
+bit 164 X ? .
+bit 163 X ? .
+bit 162 B 0 MAA2 223 0 Z
+bit 161 X ? .
+bit 160 X ? .
+bit 159 X ? .
+bit 158 X ? .
+bit 157 X ? .
+bit 156 X ? .
+bit 155 O 0 DA15 223 0 Z
+bit 154 X ? .
+bit 153 O 0 DA14 223 0 Z
+bit 152 O 0 DA11 223 0 Z
+bit 151 O 0 DA13 223 0 Z
+bit 150 O 0 DA2 223 0 Z
+bit 149 O 0 DA12 223 0 Z
+bit 148 X ? .
+bit 147 X ? .
+bit 146 X ? .
+bit 145 X ? .
+bit 144 X ? .
+bit 143 X ? .
+bit 142 X ? .
+bit 141 X ? .
+bit 140 X ? .
+bit 139 X ? .
+bit 138 X ? .
+bit 137 X ? .
+bit 136 X ? .
+bit 135 X ? .
+bit 134 X ? .
+bit 133 C 0 .
+bit 132 C 0 .
+bit 131 C 0 .
+bit 130 C 0 .
+bit 129 X ? .
+bit 128 X ? .
+bit 127 X ? .
+bit 126 X ? .
+bit 125 X ? .
+bit 124 X ? .
+bit 123 X ? .
+bit 122 X ? .
+bit 121 X ? .
+bit 120 X ? .
+bit 119 X ? .
+bit 118 X ? .
+bit 117 X ? .
+bit 116 X ? .
+bit 115 X ? .
+bit 114 X ? .
+bit 113 X ? .
+bit 112 X ? .
+bit 111 X ? .
+bit 110 B 0 AD11 21 0 Z
+bit 109 B 0 AD10 21 0 Z
+bit 108 B 0 AD9 21 0 Z
+bit 107 B 0 AD8 21 0 Z
+bit 106 B 0 AD7 21 0 Z
+bit 105 B 0 AD6 21 0 Z
+bit 104 B 0 AD5 21 0 Z
+bit 103 B 0 AD4 21 0 Z
+bit 102 B 0 AD3 21 0 Z
+bit 101 B 0 AD2 21 0 Z
+bit 100 B 0 AD1 21 0 Z
+bit 99 B 0 AD0 21 0 Z
+bit 98 X ? .
+bit 97 X ? .
+bit 96 X ? .
+bit 95 X ? .
+bit 94 X ? .
+bit 93 X ? .
+bit 92 X ? .
+bit 91 X ? .
+bit 90 X ? .
+bit 89 X ? .
+bit 88 X ? .
+bit 87 X ? .
+bit 86 X ? .
+bit 85 X ? .
+bit 84 X ? .
+bit 83 X ? .
+bit 82 X ? .
+bit 81 X ? .
+bit 80 X ? .
+bit 79 X ? .
+bit 78 X ? .
+bit 77 X ? .
+bit 76 X ? .
+bit 75 X ? .
+bit 74 X ? .
+bit 73 X ? .
+bit 72 X ? .
+bit 71 X ? .
+bit 70 X ? .
+bit 69 X ? .
+bit 68 X ? .
+bit 67 X ? .
+bit 66 X ? .
+bit 65 B 0 nFRAME 297 0 Z
+bit 64 B 0 nC/BE3 298 0 Z
+bit 63 B 0 nC/BE2 298 0 Z
+bit 62 B 0 nC/BE1 298 0 Z
+bit 61 B 0 nDEVSEL 186 0 Z
+bit 60 B 0 nPERR 187 0 Z
+bit 59 B 0 nSTOP 54 0 Z
+bit 58 I ? nLOCK
+bit 57 X ? .
+bit 56 C 0 .
+bit 55 B 0 nIRDY 56 0 Z
+bit 54 C 0 .
+bit 53 X ? .
+bit 52 X ? .
+bit 51 B 0 MAA1 223 0 Z
+bit 50 B 0 PMAA0 223 0 Z
+bit 49 B 0 PMAA1 223 0 Z
+bit 48 B 0 PMAA2 223 0 Z
+bit 47 B 0 MAA0 223 0 Z
+bit 46 X ? .
+bit 45 I ? OSC_IN
+bit 44 C 0 .
+bit 43 C 0 .
+bit 42 B 0 SCL 44 0 Z
+bit 41 B 0 SDA 43 0 Z
+bit 40 B 0 IRQ2 39 0 Z
+bit 39 C 0 .
+bit 38 C 0 .
+bit 37 B 0 IRQ3 38 0 Z
+bit 36 I ? PCI_SYNC_IN
+bit 35 X ? .
+bit 34 X ? .
+bit 33 X ? .
+bit 32 I ? nSMI
+bit 31 X ? .
+bit 30 X ? .
+bit 29 X ? .
+bit 28 I ? IDSEL
+bit 27 I ? nREQ0
+bit 26 I ? nREQ1
+bit 25 I ? nREQ2
+bit 24 I ? nREQ3
+bit 23 B 0 nREQ4 132 0 Z
+bit 22 B 0 nSERR 191 0 Z
+bit 21 C 0 .
+bit 20 X ? .
+bit 19 B 0 AD16 21 0 Z
+bit 18 B 0 AD17 21 0 Z
+bit 17 B 0 AD18 21 0 Z
+bit 16 B 0 AD19 21 0 Z
+bit 15 B 0 AD20 21 0 Z
+bit 14 B 0 AD21 21 0 Z
+bit 13 B 0 AD22 21 0 Z
+bit 12 B 0 AD23 21 0 Z
+bit 11 B 0 AD24 21 0 Z
+bit 10 B 0 AD25 21 0 Z
+bit 9 B 0 AD26 21 0 Z
+bit 8 B 0 AD27 21 0 Z
+bit 7 B 0 AD28 21 0 Z
+bit 6 B 0 AD29 21 0 Z
+bit 5 B 0 AD30 21 0 Z
+bit 4 B 0 AD31 21 0 Z
+bit 3 B 0 AD15 21 0 Z
+bit 2 B 0 AD14 21 0 Z
+bit 1 B 0 AD13 21 0 Z
+bit 0 B 0 AD12 21 0 Z
+
+initbus mpc824x
--- /dev/null
+#
+# $Id$
+#
+# JTAG declarations for Motorola MPC8245 rev. 1.2 (or higher)
+# Copyright (C) 2003 Marcel Telka
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Documentation:
+# [1] Motorola, Inc., "MPC8245 Integrated Processor Hardware Specifications",
+# MPC8245EC/D, Rev. 3, 7/2003
+# [2] Motorola, Inc., "Motorola PowerPC MPC8245 (TM) 603/PCI Bridge/Memory
+# Controller Boundary Scan Description Language - MPC8245 Revision
+# 1.2 (or higher)", Oct 29, 2002
+#
+
+# signal list (see Table 17 in [1])
+
+# PCI Interface Signals
+signal nC/BE3 P25
+signal nC/BE2 K23
+signal nC/BE1 F23
+signal nC/BE0 A25
+signal nDEVSEL H26
+signal nFRAME J24
+signal nIRDY K25
+signal nLOCK J26
+signal AD31 V25
+signal AD30 U25
+signal AD29 U26
+signal AD28 U24
+signal AD27 U23
+signal AD26 T25
+signal AD25 T26
+signal AD24 R25
+signal AD23 R26
+signal AD22 N26
+signal AD21 N25
+signal AD20 N23
+signal AD19 M26
+signal AD18 M25
+signal AD17 L25
+signal AD16 L26
+signal AD15 F24
+signal AD14 E26
+signal AD13 E25
+signal AD12 E23
+signal AD11 D26
+signal AD10 D25
+signal AD9 C26
+signal AD8 A26
+signal AD7 B26
+signal AD6 A24
+signal AD5 B24
+signal AD4 D19
+signal AD3 B23
+signal AD2 B22
+signal AD1 D22
+signal AD0 C22
+signal PAR G25
+signal nGNT3 W25
+signal nGNT2 W24
+signal nGNT1 W23
+signal nGNT0 V26
+signal nGNT4 W26
+signal nREQ3 Y25
+signal nREQ2 AA26
+signal nREQ1 AA25
+signal nREQ0 AB26
+signal nREQ4 Y26
+signal nPERR G26
+signal nSERR F26
+signal nSTOP H25
+signal nTRDY K26
+signal nINTA AC26
+signal IDSEL P26
+
+# Memory Interface Signals
+signal MDL0 AD17
+signal MDL1 AE17
+signal MDL2 AE15
+signal MDL3 AF15
+signal MDL4 AC14
+signal MDL5 AE13
+signal MDL6 AF13
+signal MDL7 AF12
+signal MDL8 AF11
+signal MDL9 AF10
+signal MDL10 AF9
+signal MDL11 AD8
+signal MDL12 AF8
+signal MDL13 AF7
+signal MDL14 AF6
+signal MDL15 AE5
+signal MDL16 B1
+signal MDL17 A1
+signal MDL18 A3
+signal MDL19 A4
+signal MDL20 A5
+signal MDL21 A6
+signal MDL22 A7
+signal MDL23 D7
+signal MDL24 A8
+signal MDL25 B8
+signal MDL26 A10
+signal MDL27 D10
+signal MDL28 A12
+signal MDL29 B11
+signal MDL30 B12
+signal MDL31 A14
+signal MDH0 AC17
+signal MDH1 AF16
+signal MDH2 AE16
+signal MDH3 AE14
+signal MDH4 AF14
+signal MDH5 AC13
+signal MDH6 AE12
+signal MDH7 AE11
+signal MDH8 AE10
+signal MDH9 AE9
+signal MDH10 AE8
+signal MDH11 AC7
+signal MDH12 AE7
+signal MDH13 AE6
+signal MDH14 AF5
+signal MDH15 AC5
+signal MDH16 E4
+signal MDH17 A2
+signal MDH18 B3
+signal MDH19 D4
+signal MDH20 B4
+signal MDH21 B5
+signal MDH22 D6
+signal MDH23 C6
+signal MDH24 B7
+signal MDH25 C9
+signal MDH26 A9
+signal MDH27 B10
+signal MDH28 A11
+signal MDH29 A13
+signal MDH30 B13
+signal MDH31 A15
+signal DQM0 AB1
+signal DQM1 AB2
+signal DQM2 K3
+signal DQM3 K2
+signal DQM4 AC1
+signal DQM5 AC2
+signal DQM6 K1
+signal DQM7 J1
+signal nCS0 Y4
+signal nCS1 AA3
+signal nCS2 AA4
+signal nCS3 AC4
+signal nCS4 M2
+signal nCS5 L2
+signal nCS6 M1
+signal nCS7 L1
+signal nFOE H1
+signal nRCS0 N4
+signal nRCS1 N2
+signal nRCS2 AF20
+signal nRCS3 AC18
+signal SDMA1 W1
+signal SDMA0 W2
+signal SDMA11 N1
+signal SDMA10 R1
+signal SDMA9 R2
+signal SDMA8 T1
+signal SDMA7 T2
+signal SDMA6 U4
+signal SDMA5 U2
+signal SDMA4 U1
+signal SDMA3 V1
+signal SDMA2 V3
+signal nDRDY B20
+signal SDMA12 B16
+signal SDMA13 B14
+signal SDMA14 D14
+signal SDBA1 P1
+signal SDBA0 P2
+signal PAR0 AF3
+signal PAR1 AE3
+signal PAR2 G4
+signal PAR3 E2
+signal PAR4 AE4
+signal PAR5 AF4
+signal PAR6 D2
+signal PAR7 C2
+signal nSDRAS AD1
+signal nSDCAS AD2
+signal CKE H2
+signal nWE AA1
+signal nAS Y1
+
+# PIC Control Signals
+signal IRQ0 C19
+signal IRQ1 B21
+signal IRQ2 AC22
+signal IRQ3 AE24
+signal IRQ4 A23
+
+# I2C Control Signals
+signal SDA AE20
+signal SCL AF21
+
+# DUART Control Signals
+signal SOUT1 AC25
+signal SIN1 AB25
+signal SOUT2 AE26
+signal SIN2 AF25
+
+# Clock-Out Signals
+salias PCI_CLK0 SOUT1
+salias PCI_CLK1 SIN1
+salias PCI_CLK2 SOUT2
+salias PCI_CLK3 SIN2
+signal PCI_CLK4 AF26
+signal PCI_SYNC_OUT AD25
+signal PCI_SYNC_IN AB23
+signal SDRAM_CLK0 D1
+signal SDRAM_CLK1 G1
+signal SDRAM_CLK2 G2
+signal SDRAM_CLK3 E1
+signal SDRAM_SYNC_OUT C1
+signal SDRAM_SYNC_IN H3
+signal CKO B15
+signal OSC_IN AD21
+
+# Miscellaneous Signals
+signal nHRST_CTRL A20
+signal nHRST_CPU A19
+signal nMCP A17
+signal NMI D16
+signal nSMI A18
+salias nSRESET SDMA12
+salias TBEN SDMA13
+signal nQACK F2
+salias nCHKSTOP_IN SDMA14
+salias TRIG_IN nRCS2
+salias TRIG_OUT nRCS3
+signal MAA0 AF2
+signal MAA1 AF1
+signal MAA2 AE1
+signal nMIV A16
+signal PMAA0 AD18
+signal PMAA1 AF18
+signal PMAA2 AE19
+
+# Test/Configuration Signals
+signal PLL_CFG0 A22
+signal PLL_CFG1 B19
+signal PLL_CFG2 A21
+signal PLL_CFG3 B18
+signal PLL_CFG4 B17
+signal nTEST0 AD22
+# nDRDY
+signal RTC Y2
+signal TCK AF22
+signal TDI AF23
+signal TDO AC21
+signal TMS AE22
+signal nTRST AE23
+
+# Power and Ground Signals
+signal GND AA2 AA23 AC12 AC15 AC24 AC3 AC6 AC9 AD11 AD14 AD16 AD19 AD23 AD4 AE18 AE2 AE21 AE25 B2 B25 B6 B9 C11 C13 C16 C23 C4 C8 D12 D15 D18 D21 D24 D3 F25 F4 H24 J25 J4 L24 L3 M23 M4 N24 P3 R23 R4 T24 T3 V2 V23 W3
+signal LVDD AC20 AC23 D20 D23 G23 P23 Y23
+signal GVDD AB3 AB4 AC10 AC11 AC8 AD10 AD13 AD15 AD3 AD5 AD7 C10 C12 C3 C5 C7 D13 D5 D9 E3 G3 H4 K4 L4 N3 P4 R3 U3 V4 Y3
+signal OVDD AB24 AD20 AD24 C14 C20 C24 E24 G24 J23 K24 M24 P24 T23 Y24
+signal VDD AA24 AC16 AC19 AD12 AD6 AD9 C15 C18 C21 D11 D8 F3 H23 J3 L23 M3 R24 T4 V24 W4
+signal NC D17
+signal AVDD C17
+signal AVDD2 AF24
+
+# Debug/Manufacturing Pins
+salias DA0 nQACK
+salias DA1 CKO
+signal DA2 C25
+salias DA3 PCI_CLK4
+salias DA4 nREQ4
+salias DA5 nGNT4
+salias DA10 PLL_CFG0
+salias DA9 PLL_CFG1
+salias DA8 PLL_CFG2
+salias DA7 PLL_CFG3
+salias DA6 PLL_CFG4
+signal DA11 AD26
+signal DA12 AF17
+signal DA13 AF19
+signal DA14 F1
+signal DA15 J2
+
+# see [2]
+# mandatory data registers
+register BSR 507
+register BR 1
+
+# see [2]
+instruction length 8
+# mandatory instructions
+instruction EXTEST 00000000 BSR
+instruction SAMPLE/PRELOAD 11000000 BSR
+instruction BYPASS 11111111 BR
+# optional instructions
+instruction HIGHZ 11110000 BR
+instruction CLAMP 11110001 BR
+
+# see [2]
+bit 506 B 0 nC/BE0 298 0 Z
+bit 505 B 0 nIRQ1 504 0 Z
+bit 504 C 0 .
+bit 503 I ? nIRQ0
+bit 502 B 0 nIRQ4 501 0 Z
+bit 501 C 0 .
+bit 500 I ? nDRDY
+bit 499 B 0 PLL_CFG0 132 0 Z
+bit 498 B 0 PLL_CFG1 132 0 Z
+bit 497 B 0 PLL_CFG2 132 0 Z
+bit 496 B 0 PLL_CFG3 132 0 Z
+bit 495 B 0 PLL_CFG4 132 0 Z
+bit 494 I ? nHRST_CTRL
+bit 493 I ? nHRST_CPU
+bit 492 O 0 SDRAM_SYNC_OUT 133 0 Z
+bit 491 I ? SDRAM_SYNC_IN
+bit 490 B 0 nMCP 251 0 Z
+bit 489 X ? .
+bit 488 I ? NMI
+bit 487 O 0 nMIV 222 0 Z
+bit 486 B 0 PAR0 188 0 Z
+bit 485 B 0 PAR1 188 0 Z
+bit 484 B 0 PAR2 188 0 Z
+bit 483 B 0 PAR3 188 0 Z
+bit 482 B 0 PAR4 189 0 Z
+bit 481 B 0 PAR5 189 0 Z
+bit 480 B 0 PAR6 189 0 Z
+bit 479 B 0 PAR7 189 0 Z
+bit 478 X ? .
+bit 477 X ? .
+bit 476 X ? .
+bit 475 X ? .
+bit 474 X ? .
+bit 473 X ? .
+bit 472 X ? .
+bit 471 X ? .
+bit 470 X ? .
+bit 469 X ? .
+bit 468 X ? .
+bit 467 X ? .
+bit 466 X ? .
+bit 465 X ? .
+bit 464 X ? .
+bit 463 X ? .
+bit 462 X ? .
+bit 461 X ? .
+bit 460 X ? .
+bit 459 X ? .
+bit 458 X ? .
+bit 457 X ? .
+bit 456 X ? .
+bit 455 X ? .
+bit 454 X ? .
+bit 453 X ? .
+bit 452 X ? .
+bit 451 X ? .
+bit 450 X ? .
+bit 449 X ? .
+bit 448 X ? .
+bit 447 X ? .
+bit 446 X ? .
+bit 445 X ? .
+bit 444 X ? .
+bit 443 X ? .
+bit 442 X ? .
+bit 441 X ? .
+bit 440 X ? .
+bit 439 X ? .
+bit 438 X ? .
+bit 437 X ? .
+bit 436 C 0 .
+bit 435 X ? .
+bit 434 B 0 MDH0 436 0 Z
+bit 433 B 0 MDH1 436 0 Z
+bit 432 B 0 MDH2 436 0 Z
+bit 431 B 0 MDH3 436 0 Z
+bit 430 B 0 MDH4 436 0 Z
+bit 429 B 0 MDH5 436 0 Z
+bit 428 B 0 MDH6 436 0 Z
+bit 427 B 0 MDH7 436 0 Z
+bit 426 B 0 MDH8 436 0 Z
+bit 425 B 0 MDH9 436 0 Z
+bit 424 B 0 MDH10 436 0 Z
+bit 423 B 0 MDH11 436 0 Z
+bit 422 B 0 MDH12 436 0 Z
+bit 421 B 0 MDH13 436 0 Z
+bit 420 B 0 MDH14 436 0 Z
+bit 419 B 0 MDH15 436 0 Z
+bit 418 B 0 MDH16 436 0 Z
+bit 417 B 0 MDH17 436 0 Z
+bit 416 B 0 MDH18 436 0 Z
+bit 415 B 0 MDH19 436 0 Z
+bit 414 B 0 MDH20 436 0 Z
+bit 413 B 0 MDH21 436 0 Z
+bit 412 B 0 MDH22 436 0 Z
+bit 411 B 0 MDH23 436 0 Z
+bit 410 B 0 MDH24 436 0 Z
+bit 409 B 0 MDH25 436 0 Z
+bit 408 B 0 MDH26 436 0 Z
+bit 407 B 0 MDH27 436 0 Z
+bit 406 B 0 MDH28 436 0 Z
+bit 405 B 0 MDH29 436 0 Z
+bit 404 B 0 MDH30 436 0 Z
+bit 403 B 0 MDH31 436 0 Z
+bit 402 B 0 nFOE 223 0 Z
+bit 401 C 0 .
+bit 400 O 0 nRCS1 224 0 Z
+bit 399 B 0 nRCS0 223 0 Z
+bit 398 O 0 SDRAM_CLK0 397 0 Z
+bit 397 C 0 .
+bit 396 O 0 SDRAM_CLK2 395 0 Z
+bit 395 C 0 .
+bit 394 O 0 SDRAM_CLK3 393 0 Z
+bit 393 C 0 .
+bit 392 B 0 CKE 401 0 Z
+bit 391 O 0 SDBA0 224 0 Z
+bit 390 X ? .
+bit 389 X ? .
+bit 388 X ? .
+bit 387 X ? .
+bit 386 X ? .
+bit 385 X ? .
+bit 384 X ? .
+bit 383 X ? .
+bit 382 X ? .
+bit 381 X ? .
+bit 380 X ? .
+bit 379 X ? .
+bit 378 X ? .
+bit 377 X ? .
+bit 376 X ? .
+bit 375 X ? .
+bit 374 X ? .
+bit 373 X ? .
+bit 372 X ? .
+bit 371 X ? .
+bit 370 X ? .
+bit 369 X ? .
+bit 368 X ? .
+bit 367 X ? .
+bit 366 X ? .
+bit 365 X ? .
+bit 364 X ? .
+bit 363 X ? .
+bit 362 X ? .
+bit 361 X ? .
+bit 360 X ? .
+bit 359 X ? .
+bit 358 C 0 .
+bit 357 B 0 MDL0 358 0 Z
+bit 356 B 0 MDL1 358 0 Z
+bit 355 B 0 MDL2 358 0 Z
+bit 354 B 0 MDL3 358 0 Z
+bit 353 B 0 MDL4 358 0 Z
+bit 352 B 0 MDL5 358 0 Z
+bit 351 B 0 MDL6 358 0 Z
+bit 350 B 0 MDL7 358 0 Z
+bit 349 B 0 MDL8 358 0 Z
+bit 348 B 0 MDL9 358 0 Z
+bit 347 B 0 MDL10 358 0 Z
+bit 346 B 0 MDL11 358 0 Z
+bit 345 B 0 MDL12 358 0 Z
+bit 344 B 0 MDL13 358 0 Z
+bit 343 B 0 MDL14 358 0 Z
+bit 342 B 0 MDL15 358 0 Z
+bit 341 B 0 MDL16 358 0 Z
+bit 340 B 0 MDL17 358 0 Z
+bit 339 B 0 MDL18 358 0 Z
+bit 338 B 0 MDL19 358 0 Z
+bit 337 B 0 MDL20 358 0 Z
+bit 336 B 0 MDL21 358 0 Z
+bit 335 B 0 MDL22 358 0 Z
+bit 334 B 0 MDL23 358 0 Z
+bit 333 B 0 MDL24 358 0 Z
+bit 332 B 0 MDL25 358 0 Z
+bit 331 B 0 MDL26 358 0 Z
+bit 330 B 0 MDL27 358 0 Z
+bit 329 B 0 MDL28 358 0 Z
+bit 328 B 0 MDL29 358 0 Z
+bit 327 B 0 MDL30 358 0 Z
+bit 326 B 0 MDL31 358 0 Z
+bit 325 B 0 SDMA0 223 0 Z
+bit 324 B 0 SDMA1 223 0 Z
+bit 323 O 0 SDMA2 224 0 Z
+bit 322 O 0 SDMA3 224 0 Z
+bit 321 O 0 SDMA4 224 0 Z
+bit 320 O 0 SDMA5 224 0 Z
+bit 319 O 0 SDMA6 224 0 Z
+bit 318 O 0 SDMA7 224 0 Z
+bit 317 O 0 SDMA8 224 0 Z
+bit 316 O 0 SDMA9 224 0 Z
+bit 315 O 0 SDMA10 224 0 Z
+bit 314 O 0 SDMA11 224 0 Z
+bit 313 X ? .
+bit 312 X ? .
+bit 311 X ? .
+bit 310 O 0 SDBA1 224 0 Z
+bit 309 B 0 PAR 299 0 Z
+bit 308 C 0 .
+bit 307 O 0 SDRAM_CLK1 308 0 Z
+bit 306 X ? .
+bit 305 X ? .
+bit 304 O 0 DQM2 224 0 Z
+bit 303 O 0 DQM5 224 0 Z
+bit 302 O 0 DQM4 224 0 Z
+bit 301 O 0 DQM3 224 0 Z
+bit 300 X ? .
+bit 299 C 0 .
+bit 298 C 0 .
+bit 297 C 0 .
+bit 296 C 0 .
+bit 295 X ? .
+bit 294 X ? .
+bit 293 X ? .
+bit 292 X ? .
+bit 291 B 0 nTRDY 296 0 Z
+bit 290 X ? .
+bit 289 B 0 nGNT4 223 0 Z
+bit 288 O 0 nGNT2 223 0 Z
+bit 287 X ? .
+bit 286 X ? .
+bit 285 X ? .
+bit 284 X ? .
+bit 283 X ? .
+bit 282 O 0 nCS2 224 0 Z
+bit 281 O 0 nCS0 224 0 Z
+bit 280 O 0 nCS1 224 0 Z
+bit 279 X ? .
+bit 278 X ? .
+bit 277 X ? .
+bit 276 C 0 .
+bit 275 B 0 nINTA 276 0 Z
+bit 274 X ? .
+bit 273 B 0 nSRESET 131 0 Z
+bit 272 B 0 nQACK 223 0 Z
+bit 271 X ? .
+bit 270 X ? .
+bit 269 X ? .
+bit 268 X ? .
+bit 267 X ? .
+bit 266 X ? .
+bit 265 X ? .
+bit 264 X ? .
+bit 263 X ? .
+bit 262 X ? .
+bit 261 X ? .
+bit 260 X ? .
+bit 259 X ? .
+bit 258 X ? .
+bit 257 X ? .
+bit 256 X ? .
+bit 255 X ? .
+bit 254 X ? .
+bit 253 X ? .
+bit 252 X ? .
+bit 251 C 0 .
+bit 250 X ? .
+bit 249 C 0 .
+bit 248 X ? .
+bit 247 X ? .
+bit 246 X ? .
+bit 245 X ? .
+bit 244 X ? .
+bit 243 X ? .
+bit 242 X ? .
+bit 241 X ? .
+bit 240 X ? .
+bit 239 X ? .
+bit 238 X ? .
+bit 237 X ? .
+bit 236 X ? .
+bit 235 O 0 nCS4 224 0 Z
+bit 234 O 0 nCS5 224 0 Z
+bit 233 O 0 DQM0 224 0 Z
+bit 232 O 0 DQM6 224 0 Z
+bit 231 O 0 DQM1 224 0 Z
+bit 230 O 0 DQM7 224 0 Z
+bit 229 X ? .
+bit 228 X ? .
+bit 227 X ? .
+bit 226 X ? .
+bit 225 X ? .
+bit 224 C 0 .
+bit 223 C 0 .
+bit 222 C 0 .
+bit 221 O 0 nGNT1 223 0 Z
+bit 220 X ? .
+bit 219 C 0 .
+bit 218 O 0 nCS6 224 0 Z
+bit 217 O 0 nCS7 224 0 Z
+bit 216 O 0 nSDRAS 224 0 Z
+bit 215 O 0 nCS3 224 0 Z
+bit 214 O 0 nAS 223 0 Z
+bit 213 X ? .
+bit 212 I ? RTC
+bit 211 O 0 TRIG_OUT 219 0 Z
+bit 210 B 0 TBEN 130 0 Z
+bit 209 X ? .
+bit 208 X ? .
+bit 207 O 0 nGNT3 223 0 Z
+bit 206 O 0 nGNT0 223 0 Z
+bit 205 O 0 CKO 249 0 Z
+bit 204 O 0 nWE 224 0 Z
+bit 203 C 0 .
+bit 202 C 0 .
+bit 201 C 0 .
+bit 200 C 0 .
+bit 199 C 0 .
+bit 198 C 0 .
+bit 197 O 0 PCI_CLK4 203 0 Z
+bit 196 O 0 PCI_SYNC_OUT 202 0 Z
+bit 195 B 0 PCI_CLK3 200 0 Z
+bit 194 O 0 PCI_CLK2 201 0 Z
+bit 193 B 0 PCI_CLK1 198 0 Z
+bit 192 O 0 PCI_CLK0 199 0 Z
+bit 191 C 0 .
+bit 190 X ? .
+bit 189 C 0 .
+bit 188 C 0 .
+bit 187 C 0 .
+bit 186 C 0 .
+bit 185 B 0 TRIG_IN 130 0 Z
+bit 184 B 0 nCHKSTOP_IN 131 0 Z
+bit 183 X ? .
+bit 182 X ? .
+bit 181 X ? .
+bit 180 X ? .
+bit 179 X ? .
+bit 178 X ? .
+bit 177 X ? .
+bit 176 X ? .
+bit 175 X ? .
+bit 174 X ? .
+bit 173 X ? .
+bit 172 X ? .
+bit 171 X ? .
+bit 170 X ? .
+bit 169 X ? .
+bit 168 O 0 nSDCAS 224 0 Z
+bit 167 X ? .
+bit 166 X ? .
+bit 165 X ? .
+bit 164 X ? .
+bit 163 X ? .
+bit 162 B 0 MAA2 223 0 Z
+bit 161 X ? .
+bit 160 X ? .
+bit 159 X ? .
+bit 158 X ? .
+bit 157 X ? .
+bit 156 X ? .
+bit 155 O 0 DA15 223 0 Z
+bit 154 X ? .
+bit 153 O 0 DA14 223 0 Z
+bit 152 O 0 DA11 223 0 Z
+bit 151 O 0 DA13 223 0 Z
+bit 150 O 0 DA2 223 0 Z
+bit 149 O 0 DA12 223 0 Z
+bit 148 X ? .
+bit 147 X ? .
+bit 146 X ? .
+bit 145 X ? .
+bit 144 X ? .
+bit 143 X ? .
+bit 142 X ? .
+bit 141 X ? .
+bit 140 X ? .
+bit 139 X ? .
+bit 138 X ? .
+bit 137 X ? .
+bit 136 X ? .
+bit 135 X ? .
+bit 134 X ? .
+bit 133 C 0 .
+bit 132 C 0 .
+bit 131 C 0 .
+bit 130 C 0 .
+bit 129 X ? .
+bit 128 X ? .
+bit 127 X ? .
+bit 126 X ? .
+bit 125 X ? .
+bit 124 X ? .
+bit 123 X ? .
+bit 122 X ? .
+bit 121 X ? .
+bit 120 X ? .
+bit 119 X ? .
+bit 118 X ? .
+bit 117 X ? .
+bit 116 X ? .
+bit 115 X ? .
+bit 114 X ? .
+bit 113 X ? .
+bit 112 X ? .
+bit 111 X ? .
+bit 110 B 0 AD11 21 0 Z
+bit 109 B 0 AD10 21 0 Z
+bit 108 B 0 AD9 21 0 Z
+bit 107 B 0 AD8 21 0 Z
+bit 106 B 0 AD7 21 0 Z
+bit 105 B 0 AD6 21 0 Z
+bit 104 B 0 AD5 21 0 Z
+bit 103 B 0 AD4 21 0 Z
+bit 102 B 0 AD3 21 0 Z
+bit 101 B 0 AD2 21 0 Z
+bit 100 B 0 AD1 21 0 Z
+bit 99 B 0 AD0 21 0 Z
+bit 98 X ? .
+bit 97 X ? .
+bit 96 X ? .
+bit 95 X ? .
+bit 94 X ? .
+bit 93 X ? .
+bit 92 X ? .
+bit 91 X ? .
+bit 90 X ? .
+bit 89 X ? .
+bit 88 X ? .
+bit 87 X ? .
+bit 86 X ? .
+bit 85 X ? .
+bit 84 X ? .
+bit 83 X ? .
+bit 82 X ? .
+bit 81 X ? .
+bit 80 X ? .
+bit 79 X ? .
+bit 78 X ? .
+bit 77 X ? .
+bit 76 X ? .
+bit 75 X ? .
+bit 74 X ? .
+bit 73 X ? .
+bit 72 X ? .
+bit 71 X ? .
+bit 70 X ? .
+bit 69 X ? .
+bit 68 X ? .
+bit 67 X ? .
+bit 66 X ? .
+bit 65 B 0 nFRAME 297 0 Z
+bit 64 B 0 nC/BE3 298 0 Z
+bit 63 B 0 nC/BE2 298 0 Z
+bit 62 B 0 nC/BE1 298 0 Z
+bit 61 B 0 nDEVSEL 186 0 Z
+bit 60 B 0 nPERR 187 0 Z
+bit 59 B 0 nSTOP 54 0 Z
+bit 58 I ? nLOCK
+bit 57 X ? .
+bit 56 C 0 .
+bit 55 B 0 nIRDY 56 0 Z
+bit 54 C 0 .
+bit 53 X ? .
+bit 52 X ? .
+bit 51 B 0 MAA1 223 0 Z
+bit 50 B 0 PMAA0 223 0 Z
+bit 49 B 0 PMAA1 223 0 Z
+bit 48 B 0 PMAA2 223 0 Z
+bit 47 B 0 MAA0 223 0 Z
+bit 46 X ? .
+bit 45 I ? OSC_IN
+bit 44 C 0 .
+bit 43 C 0 .
+bit 42 B 0 SCL 44 0 Z
+bit 41 B 0 SDA 43 0 Z
+bit 40 B 0 IRQ2 39 0 Z
+bit 39 C 0 .
+bit 38 C 0 .
+bit 37 B 0 IRQ3 38 0 Z
+bit 36 I ? PCI_SYNC_IN
+bit 35 X ? .
+bit 34 X ? .
+bit 33 X ? .
+bit 32 I ? nSMI
+bit 31 X ? .
+bit 30 X ? .
+bit 29 X ? .
+bit 28 I ? IDSEL
+bit 27 I ? nREQ0
+bit 26 I ? nREQ1
+bit 25 I ? nREQ2
+bit 24 I ? nREQ3
+bit 23 B 0 nREQ4 132 0 Z
+bit 22 B 0 nSERR 191 0 Z
+bit 21 C 0 .
+bit 20 X ? .
+bit 19 B 0 AD16 21 0 Z
+bit 18 B 0 AD17 21 0 Z
+bit 17 B 0 AD18 21 0 Z
+bit 16 B 0 AD19 21 0 Z
+bit 15 B 0 AD20 21 0 Z
+bit 14 B 0 AD21 21 0 Z
+bit 13 B 0 AD22 21 0 Z
+bit 12 B 0 AD23 21 0 Z
+bit 11 B 0 AD24 21 0 Z
+bit 10 B 0 AD25 21 0 Z
+bit 9 B 0 AD26 21 0 Z
+bit 8 B 0 AD27 21 0 Z
+bit 7 B 0 AD28 21 0 Z
+bit 6 B 0 AD29 21 0 Z
+bit 5 B 0 AD30 21 0 Z
+bit 4 B 0 AD31 21 0 Z
+bit 3 B 0 AD15 21 0 Z
+bit 2 B 0 AD14 21 0 Z
+bit 1 B 0 AD13 21 0 Z
+bit 0 B 0 AD12 21 0 Z
+
+initbus mpc824x
--- /dev/null
+#
+# $Id$
+#
+# Copyright (C) 2002 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Marcel Telka <marcel@telka.sk>, 2002.
+#
+
+# bits 27-12 of the Device Identification Register
+0100100010001001 xcr3128xl-vq100 XCR3128XL-VQ100
+0100100010001100 xcr3128xl-cs144 XCR3128XL-CS144
--- /dev/null
+#
+# $Id$
+#
+# Copyright (C) 2002 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Marcel Telka <marcel@telka.sk>, 2002.
+#
+
+# bits 31-28 of the Device Identification Register
+0000 xcr3128xl-cs144 0
--- /dev/null
+#
+# $Id$
+#
+# Copyright (C) 2003 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Marcel Telka <marcel@telka.sk>, 2003.
+#
+
+# This part is same as Xilinx XCR3128XL-CS144
+include xilinx/xcr3128xl-cs144/xcr3128xl-cs144
--- /dev/null
+#
+# $Id$
+#
+# Copyright (C) 2002 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Marcel Telka <marcel@telka.sk>, 2002.
+#
+
+# bits 31-28 of the Device Identification Register
+0000 xcr3128xl-vq100 0
--- /dev/null
+#
+# $Id$
+#
+# Copyright (C) 2003 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Marcel Telka <marcel@telka.sk>, 2003.
+#
+
+# This part is same as Xilinx XCR3128XL-VQ100
+include xilinx/xcr3128xl-vq100/xcr3128xl-vq100
--- /dev/null
+#
+# $Id$
+#
+# JTAG declarations for Samsung S3C4510B
+# Copyright (C) 2003 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Jiun-Shian Ho <asky@syncom.com.tw>, 2003.
+#
+# Documentation:
+# [1] Samsung Electronics Co., Ltd., "S3C4510B 32-Bit RISC Microcontroller
+# User's Manual", Revision 1, August 2000,
+# Order Number: 21-S3-C4510B-082000
+#
+
+# see Table A-2 or BSDL file (Page: A-13 ~ A-15) in [1]
+signal nUADTR1 3
+signal UATXD1 4
+signal nUADSR1 5
+signal nDTRA 6
+signal RXDA 7
+signal nRTSA 8
+signal TXDA 9
+signal nCTSA 10
+signal nDCDA 13
+signal RXCA 14
+signal nSYNCA 15
+signal TXCA 16
+signal nDTRB 17
+signal RXDB 18
+signal nRTSB 19
+signal TXDB 20
+signal nCTSB 23
+signal nDCDB 24
+signal RXCB 25
+signal nSYNCB 26
+signal TXCB 27
+signal CRS_CRS_10M 28
+signal RX_DV_LINK10 29
+signal RXD0_RXD_10M 30
+signal RXD1 33
+signal RXD2 34
+signal RXD3 35
+signal RX_ERR 36
+signal RX_CLK_RXCLK_10M 37
+signal COL_COL_10M 38
+signal TXD0_TXD_10M 39
+signal TXD1_LOOP10 40
+signal TXD2 43
+signal TXD3 44
+signal TX_ERR_PCOMP_10M 45
+signal TX_CLK_TXCLK_10M 46
+signal TX_EN_TXEN_10M 47
+signal MDIO 48
+signal LITTLE 49
+signal MDC 50
+signal TCK 58
+signal TMS 59
+signal TDI 60
+signal TDO 61
+signal nTRST 62
+signal TMODE 63
+signal UCLK 64
+signal nECS0 67
+signal nECS1 68
+signal nECS2 69
+signal nECS3 70
+signal nEWAIT 71
+signal nOE 72
+signal B0SIZE0 73
+signal B0SIZE1 74
+signal CLKOEN 76
+signal MCLK 80
+signal nRESET 82
+signal CLKSEL 83 # PCLKSEL vs. CLKSEL ?
+signal nRCS0 75
+signal nRCS1 84
+signal nRCS2 85
+signal nRCS3 86
+signal nRCS4 87
+signal nRCS5 88
+signal nRAS0 89
+signal nRAS1 90
+signal nRAS2 91
+signal nRAS3 94
+signal nCAS0 95
+signal nCAS1 96
+signal nCAS2 97
+signal nCAS3 98
+signal nDWE 99
+signal nWBE0 100
+signal nWBE1 101
+signal nWBE2 102
+signal nWBE3 107
+signal ExtMREQ 108
+signal ExtMACK 109
+signal ADDR0 110
+signal ADDR1 111
+signal ADDR2 112
+signal ADDR3 113
+signal ADDR4 114
+signal ADDR5 115
+signal ADDR6 116
+signal ADDR7 117
+signal ADDR8 120
+signal ADDR9 121
+signal ADDR10 122
+signal ADDR11 123
+signal ADDR12 124
+signal ADDR13 125
+signal ADDR14 126
+signal ADDR15 127
+signal ADDR16 128
+signal ADDR17 129
+signal ADDR18 132
+signal ADDR19 133
+signal ADDR20 134
+signal ADDR21 135
+signal XDATA0 136
+signal XDATA1 137
+signal XDATA2 138
+signal XDATA3 139
+signal XDATA4 140
+signal XDATA5 141
+signal XDATA6 144
+signal XDATA7 145
+signal XDATA8 146
+signal XDATA9 147
+signal XDATA10 148
+signal XDATA11 149
+signal XDATA12 150
+signal XDATA13 151
+signal XDATA14 152
+signal XDATA15 153
+signal XDATA16 154
+signal XDATA17 159
+signal XDATA18 160
+signal XDATA19 161
+signal XDATA20 162
+signal XDATA21 163
+signal XDATA22 164
+signal XDATA23 165
+signal XDATA24 166
+signal XDATA25 169
+signal XDATA26 170
+signal XDATA27 171
+signal XDATA28 172
+signal XDATA29 173
+signal XDATA30 174
+signal XDATA31 175
+signal P0 176
+signal P1 179
+signal P2 180
+signal P3 181
+signal P4 182
+signal P5 183
+signal P6 184
+signal P7 185
+signal P8 186
+signal P9 189
+signal P10 190
+signal P11 191
+signal P12 192
+signal P13 193
+signal P14 194
+signal P15 195
+signal P16 196
+signal P17 199
+signal SCL 200
+signal SDA 201
+signal UARXD0 202
+signal nUADTR0 203
+signal UATXD0 204
+signal nUADSR0 205
+signal UARXD1 206
+signal VDDP 1 21 41 53 78 103 118 142 157 177 197
+signal VDDI 11 31 51 65 92 105 130 155 167 187 207
+signal VSSP 2 22 42 54 79 93 106 131 156 168 188 208
+signal VSSI 12 32 52 66 81 104 119 143 158 178 198
+
+# mandatory data registers
+register BSR 233 # Boundary Scan Register (see Appendix-A (Page A-16) in [1])
+register BR 1 # Bypass Register
+# optional data registers
+register DIR 32 # Device Identification Register
+
+register SCAN 4 # Select scan channel for ARM
+
+# Appendix-A (Page A-16) in [1]
+instruction length 4
+
+# see Table A-6 in [1]
+# mandatory instructions
+instruction EXTEST 0000 BSR
+instruction SAMPLE/PRELOAD 0011 BSR
+instruction BYPASS 1111 BR
+
+# optional instructions
+instruction HIGHZ 0111 BR
+instruction IDCODE 1110 DIR
+instruction INTEST 1100 BSR
+instruction CLAMP 0101 BR
+
+instruction CLAMPZ 1001 BR
+instruction RESTART 0100 BR
+instruction SCAN_N 0010 SCAN
+
+# see Table A-2 or BSDL file (Page: A-16 ~ A-23) in [1]
+bit 232 I ? nUADTR1
+bit 231 O ? UATXD1
+bit 230 O ? nUADSR1
+bit 229 O ? nDTRA
+bit 228 I ? RXDA
+bit 227 O ? nRTSA
+bit 226 O ? TXDA
+bit 225 I ? nCTSA
+bit 224 I ? nDCDA
+bit 223 I ? RXCA
+bit 222 O ? nSYNCA
+bit 221 I ? TXCA
+bit 220 O ? TXCA 219 1 Z
+bit 219 C 1 TXCA
+bit 218 O ? nDTRB
+bit 217 I ? RXDB
+bit 216 O ? nRTSB
+bit 215 O ? TXDB
+bit 214 I ? nCTSB
+bit 213 I ? nDCDB
+bit 212 I ? RXCB
+bit 211 O ? nSYNCB
+bit 210 I ? TXCB
+bit 209 O ? TXCB 208 1 Z
+bit 208 C 1 TXCB
+bit 207 I ? CRS_CRS_10M
+bit 206 I ? RX_DV_LINK10
+bit 205 I ? RXD0_RXD_10M
+bit 204 I ? RXD1
+bit 203 I ? RXD2
+bit 202 I ? RXD3
+bit 201 I ? RX_ERR
+bit 200 I ? RX_CLK_RXCLK_10M
+bit 199 I ? COL_COL_10M
+bit 198 O ? TXD0_TXD_10M
+bit 197 O ? TXD1_LOOP10
+bit 196 O ? TXD2
+bit 195 O ? TXD3
+bit 194 O ? TX_ERR_PCOMP_10M
+bit 193 I ? TX_CLK_TXCLK_10M
+bit 192 O ? TX_EN_TXEN_10M
+bit 191 I ? MDIO
+bit 190 O ? MDIO 189 1 Z
+bit 189 C 1 MDIO
+bit 188 I ? LITTLE
+bit 187 O ? MDC
+bit 186 I ? TMODE
+bit 185 I ? UCLK
+bit 184 C 1 .
+bit 183 O ? nECS0 184 1 Z
+bit 182 O ? nECS1 184 1 Z
+bit 181 O ? nECS2 184 1 Z
+bit 180 O ? nECS3 184 1 Z
+bit 179 I ? nEWAIT
+bit 178 O ? nOE 184 1 Z
+bit 177 I ? B0SIZE0
+bit 176 I ? B0SIZE1
+bit 175 O ? nRCS0 184 1 Z
+bit 174 I ? CLKOEN
+bit 173 O ? MCLKO
+bit 172 I ? MCLK
+bit 171 I ? nRESET
+bit 170 I ? CLKSEL
+bit 169 O ? nRCS1 184 1 Z
+bit 168 O ? nRCS2 184 1 Z
+bit 167 O ? nRCS3 184 1 Z
+bit 166 O ? nRCS4 184 1 Z
+bit 165 O ? nRCS5 184 1 Z
+bit 164 O ? nRAS0 184 1 Z
+bit 163 O ? nRAS1 184 1 Z
+bit 162 O ? nRAS2 184 1 Z
+bit 161 O ? nRAS3 184 1 Z
+bit 160 O ? nCAS0 184 1 Z
+bit 159 O ? nCAS1 184 1 Z
+bit 158 O ? nCAS2 184 1 Z
+bit 157 O ? nCAS3 184 1 Z
+bit 156 O ? nDWE 184 1 Z
+bit 155 O ? nWBE0 184 1 Z
+bit 154 O ? nWBE1 184 1 Z
+bit 153 O ? nWBE2 184 1 Z
+bit 152 O ? nWBE3 184 1 Z
+bit 151 I ? ExtMREQ
+bit 150 O ? ExtMACK
+bit 149 O ? ADDR0 184 1 Z
+bit 148 O ? ADDR1 184 1 Z
+bit 147 O ? ADDR2 184 1 Z
+bit 146 O ? ADDR3 184 1 Z
+bit 145 O ? ADDR4 184 1 Z
+bit 144 O ? ADDR5 184 1 Z
+bit 143 O ? ADDR6 184 1 Z
+bit 142 O ? ADDR7 184 1 Z
+bit 141 O ? ADDR8 184 1 Z
+bit 140 O ? ADDR9 184 1 Z
+bit 139 O ? ADDR10 184 1 Z
+bit 138 O ? ADDR11 184 1 Z
+bit 137 O ? ADDR12 184 1 Z
+bit 136 O ? ADDR13 184 1 Z
+bit 135 O ? ADDR14 184 1 Z
+bit 134 O ? ADDR15 184 1 Z
+bit 133 O ? ADDR16 184 1 Z
+bit 132 O ? ADDR17 184 1 Z
+bit 131 O ? ADDR18 184 1 Z
+bit 130 O ? ADDR19 184 1 Z
+bit 129 O ? ADDR20 184 1 Z
+bit 128 O ? ADDR21 184 1 Z
+bit 127 C 1 .
+bit 126 I ? XDATA0
+bit 125 O ? XDATA0 127 1 Z
+bit 124 I ? XDATA1
+bit 123 O ? XDATA1 127 1 Z
+bit 122 I ? XDATA2
+bit 121 O ? XDATA2 127 1 Z
+bit 120 I ? XDATA3
+bit 119 O ? XDATA3 127 1 Z
+bit 118 I ? XDATA4
+bit 117 O ? XDATA4 127 1 Z
+bit 116 I ? XDATA5
+bit 115 O ? XDATA5 127 1 Z
+bit 114 I ? XDATA6
+bit 113 O ? XDATA6 127 1 Z
+bit 112 I ? XDATA7
+bit 111 O ? XDATA7 127 1 Z
+bit 110 I ? XDATA8
+bit 109 O ? XDATA8 127 1 Z
+bit 108 I ? XDATA9
+bit 107 O ? XDATA9 127 1 Z
+bit 106 I ? XDATA10
+bit 105 O ? XDATA10 127 1 Z
+bit 104 I ? XDATA11
+bit 103 O ? XDATA11 127 1 Z
+bit 102 I ? XDATA12
+bit 101 O ? XDATA12 127 1 Z
+bit 100 I ? XDATA13
+bit 99 O ? XDATA13 127 1 Z
+bit 98 I ? XDATA14
+bit 97 O ? XDATA14 127 1 Z
+bit 96 I ? XDATA15
+bit 95 O ? XDATA15 127 1 Z
+bit 94 I ? XDATA16
+bit 93 O ? XDATA16 127 1 Z
+bit 92 I ? XDATA17
+bit 91 O ? XDATA17 127 1 Z
+bit 90 I ? XDATA18
+bit 89 O ? XDATA18 127 1 Z
+bit 88 I ? XDATA19
+bit 87 O ? XDATA19 127 1 Z
+bit 86 I ? XDATA20
+bit 85 O ? XDATA20 127 1 Z
+bit 84 I ? XDATA21
+bit 83 O ? XDATA21 127 1 Z
+bit 82 I ? XDATA22
+bit 81 O ? XDATA22 127 1 Z
+bit 80 I ? XDATA23
+bit 79 O ? XDATA23 127 1 Z
+bit 78 I ? XDATA24
+bit 77 O ? XDATA24 127 1 Z
+bit 76 I ? XDATA25
+bit 75 O ? XDATA25 127 1 Z
+bit 74 I ? XDATA26
+bit 73 O ? XDATA26 127 1 Z
+bit 72 I ? XDATA27
+bit 71 O ? XDATA27 127 1 Z
+bit 70 I ? XDATA28
+bit 69 O ? XDATA28 127 1 Z
+bit 68 I ? XDATA29
+bit 67 O ? XDATA29 127 1 Z
+bit 66 I ? XDATA30
+bit 65 O ? XDATA30 127 1 Z
+bit 64 I ? XDATA31
+bit 63 O ? XDATA31 127 1 Z
+bit 62 I ? P0
+bit 61 O ? P0 60 1 Z
+bit 60 C 1 P0
+bit 59 I ? P1
+bit 58 O ? P1 57 1 Z
+bit 57 C 1 P1
+bit 56 I ? P2
+bit 55 O ? P2 54 1 Z
+bit 54 C 1 P2
+bit 53 I ? P3
+bit 52 O ? P3 51 1 Z
+bit 51 C 1 P3
+bit 50 I ? P4
+bit 49 O ? P4 48 1 Z
+bit 48 C 1 P4
+bit 47 I ? P5
+bit 46 O ? P5 45 1 Z
+bit 45 C 1 P5
+bit 44 I ? P6
+bit 43 O ? P6 42 1 Z
+bit 42 C 1 P6
+bit 41 I ? P7
+bit 40 O ? P7 39 1 Z
+bit 39 C 1 P7
+bit 38 I ? P8
+bit 37 O ? P8 36 1 Z
+bit 36 C 1 P8
+bit 35 I ? P9
+bit 34 O ? P9 33 1 Z
+bit 33 C 1 P9
+bit 32 I ? P10
+bit 31 O ? P10 30 1 Z
+bit 30 C 1 P10
+bit 29 I ? P11
+bit 28 O ? P11 27 1 Z
+bit 27 C 1 P11
+bit 26 I ? P12
+bit 25 O ? P12 24 1 Z
+bit 24 C 1 P12
+bit 23 I ? P13
+bit 22 O ? P13 21 1 Z
+bit 21 C 1 P13
+bit 20 I ? P14
+bit 19 O ? P14 18 1 Z
+bit 18 C 1 P14
+bit 17 I ? P15
+bit 16 O ? P15 15 1 Z
+bit 15 C 1 P15
+bit 14 I ? P16
+bit 13 O ? P16 12 1 Z
+bit 12 C 1 P16
+bit 11 I ? P17
+bit 10 O ? P17 9 1 Z
+bit 9 C 1 P17
+bit 8 I 0 SCL
+bit 7 O 1 SCL 7 1 Z
+bit 6 I ? SDA
+bit 5 O 1 SDA 5 1 Z
+bit 4 I ? UARXD0
+bit 3 I ? nUADTR0
+bit 2 O ? UATXD0
+bit 1 O ? nUADSR0
+bit 0 I ? UARXD1
+
+initbus s3c4510x
--- /dev/null
+#
+# $Id$
+#
+# Copyright (C) 2004 IDK Chemnitz GmbH
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Marko Roessler <marko.roessler@indakom.de> , 2004.
+#
+# bits 27-12 of the Device Identification Register
+0000100100100010 lh7a400 LH7A400
--- /dev/null
+#
+# $Id$
+#
+# Copyright (C) 2004 IDK Chemnitz GmbH
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Marko Roessler <marko.roessler@indakom.de>, 2004.
+#
+# bits 31-28 of the Device Identification Register
+0000 lh7a400 A
--- /dev/null
+#
+# $Id$
+#
+# Copyright (C) 2004 IDK Chemnitz GmbH
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Marko Roessler <marko.roessler@indakom.de> , 2004.
+#
+
+# mandatory data registers
+register BSR 507
+register BR 1
+register IR 4
+register DIR 32
+
+# see page 250 in [1]
+instruction length 4
+# mandatory instructions
+instruction EXTEST 0000 BSR #
+instruction SCAN_N 0010 BSR # choose chain
+instruction INTEST 1100 BSR #
+instruction IDCODE 1110 DIR #
+instruction BYPASS 1111 BR #
+instruction CLAMP 0101 BSR #
+instruction HIGHZ 0111 BSR #
+instruction CLAMPZ 1001 BSR #
+instruction SAMPLE/PRELOAD 0011 BSR #
+
+
+
+signal CS6 B10
+signal CS7 C10
+signal nCS3 M12
+signal nCS2 P13
+signal nCS1 K10
+signal nCS0 K11
+signal nWE3 D10
+signal OSCEN P14
+signal PA7 L3
+signal PA6 L2
+signal PA5 L1
+signal PA4 K5
+signal PA3 K3
+signal PA2 K2
+signal PA1 K1
+signal PA0 J5
+signal PB7 N3
+signal PB6 N2
+signal PB5 N1
+signal PB4 M4
+signal PB3 M2
+signal PB2 L7
+signal PB1 L5
+signal PB0 L4
+signal PC7 R2
+signal PC6 T2
+signal PC5 T1
+signal PC4 L8
+signal PC3 K6
+signal PC2 R1
+signal PC1 P2
+signal PC0 P1
+signal PD7 R10
+signal PD6 P10
+signal PD5 T9
+signal PD4 R9
+signal PD3 N11
+signal PD2 K8
+signal PD1 L11
+signal PD0 M11
+signal PE3 M10
+signal PE2 M9
+signal PE1 N10
+signal PE0 L10
+signal PF7 C5
+signal PF6 E6
+signal PF5 D6
+signal PF4 B5
+signal PF3 H8
+signal PF2 C6
+signal PF1 B6
+signal PF0 A6
+signal PG7 N4
+signal PG6 M8
+signal PG5 M7
+signal PG4 N6
+signal PG3 M6
+signal PG2 L6
+signal PG1 T3
+signal PG0 R3
+signal PH7 T5
+signal PH6 R5
+signal PH5 P5
+signal PH4 P8
+signal PH3 N7
+signal PH2 T4
+signal PH1 R4
+signal PH0 P4
+signal IRTX2 F2
+signal IRRX2 F3
+signal UARTTXD2 F4
+signal UARTRXD2 J7
+signal UARTCTS2 E2
+signal UARTDCD2 E3
+signal UARTDSR2 E5
+signal XTAL32OUT P15
+signal XTAL32IN P16
+signal AC97IN A4
+signal AC97CLK C4
+signal AC97OUT D5
+signal AC97SYNC B4
+signal SSPRX J1
+signal SSPFRM J3
+signal SSPTX J2
+signal SSPCLK H4
+signal PGMCLK J6
+signal PWM1 B7
+signal PWM0 C7
+signal PWMEN1 D7
+signal PWMEN0 E7
+signal COL7 H2
+signal COL6 H1
+signal COL5 G5
+signal COL4 G4
+signal COL3 G2
+signal COL2 G1
+signal COL1 F5
+signal COL0 F6
+signal BUZ H3
+signal D31 D11
+signal D30 B11
+signal D29 B12
+signal D28 G10
+signal D27 E12
+signal D26 C13
+signal D25 B13
+signal D24 A14
+signal D23 A16
+signal D22 F10
+signal D21 D14
+signal D20 H10
+signal D19 D16
+signal D18 E14
+signal D17 F12
+signal D16 F15
+signal D15 G12
+signal D14 G11
+signal D13 G15
+signal D12 H13
+signal D11 H15
+signal D10 J10
+signal D9 J13
+signal D8 J15
+signal D7 K12
+signal D6 H11
+signal D5 L14
+signal D4 L15
+signal D3 L16
+signal D2 N13
+signal D1 M15
+signal D0 L12
+signal A27 A8
+signal A26 F8
+signal A25 G8
+signal A24 A13
+signal A23 A15
+signal A22 B16
+signal A21 C16
+signal A20 D15
+signal A19 F11
+signal A18 E13
+signal A17 E16
+signal A16 F14
+signal A15 F16
+signal A14 G13
+signal A13 G14
+signal A12 G16
+signal A11 H14
+signal A10 H16
+signal A9 J9
+signal A8 J14
+signal A7 J16
+signal A6 J8
+signal A5 K14
+signal A4 K15
+signal A3 K16
+signal A2 M13
+signal A1 N14
+signal A0 M16
+signal nBATCHG D2
+signal nEXTPWR C2
+signal BATOK D1
+signal nPOR D3
+signal MEDCHG C3
+signal XTALIN R13
+signal XTALOUT T13
+signal nURESET H6
+signal WAKEUP D4
+signal nPWRFL E4
+signal LCDLP R8
+signal LCDDCLK N9
+signal LCDFP R6
+signal LCDM P9
+signal LCDVD3 N8
+signal LCDVD2 T7
+signal LCDVD1 R7
+signal LCDVD0 P7
+signal nRAS F9
+signal nCAS C11
+signal nSWE C12
+signal nSCS3 A12
+signal nSCS2 E11
+signal nSCS1 D13
+signal nSCS0 C14
+signal SCLK A10
+signal SCKEN3 G9
+signal DQM0 A9
+signal DQM1 B9
+signal DQM2 D9
+signal DQM3 E9
+signal nWE0 C8
+signal nOE D8
+signal MMCCLK A3
+signal MMCCMD B3
+signal MMCDATA A2
+signal nTEST1 R15
+signal nTEST0 T12
+signal WIDTH1 R12
+signal WIDTH0 P11
+signal USBDP T15
+signal USBDN T16
+signal TDI A1
+signal TDO B2
+signal TMST C1
+signal TCLK B1
+signal VDD G17 F1 K7 M1 M5 T6 R14 M14 J11 J12 F13 E10 B8
+signal VSS H7 G3 K4 N5 P6 T14 R16 N16 K13 H9 C15 A11 E8 A5 F7
+signal VDDC E1 J4 P3 T8 K9 L13 E15 D12 A7
+signal VSSC C9 M3 L9 T10 N15 H12 B15 G6
+signal VDDA1 R11
+signal VSSA1 T11
+signal VDDA2 N12
+signal VSSA2 P12
+
+
+
+bit 506 I 1 nEXTPWR
+bit 505 I 1 MEDCHG
+bit 504 I 1 BATOK
+bit 503 I 1 nBATCHG
+bit 502 I 1 WAKEUP
+bit 501 I 1 UARTCTS2
+bit 500 C 0 UARTCTS2
+bit 499 O 1 UARTCTS2 500 0 Z
+bit 498 I 1 UARTDCD2
+bit 497 C 0 UARTDCD2
+bit 496 O 1 UARTDCD2 497 0 Z
+bit 495 I 1 nPWRFL
+bit 494 I 1 UARTDSR2
+bit 493 C 0 UARTDSR2
+bit 492 O 1 UARTDSR2 493 0 Z
+bit 491 I 1 IRTX2
+bit 490 C 0 IRTX2
+bit 489 O 1 IRTX2 490 0 Z
+bit 488 I 1 IRRX2
+bit 487 C 0 IRRX2
+bit 486 O 1 IRRX2 487 0 Z
+bit 485 I 1 UARTTXD2
+bit 484 C 0 UARTTXD2
+bit 483 O 1 UARTTXD2 484 0 Z
+bit 482 I 1 UARTRXD2
+bit 481 C 0 UARTRXD2
+bit 480 O 1 UARTRXD2 481 0 Z
+bit 479 I 1 COL0
+bit 478 C 0 COL0
+bit 477 O 1 COL0 478 0 Z
+bit 476 I 1 COL1
+bit 475 C 0 COL1
+bit 474 O 1 COL1 475 0 Z
+bit 473 I 1 COL2
+bit 472 C 0 COL2
+bit 471 O 1 COL2 472 0 Z
+bit 470 I 1 COL3
+bit 469 C 0 COL3
+bit 468 O 1 COL3 469 0 Z
+bit 467 I 1 COL4
+bit 466 C 0 COL4
+bit 465 O 1 COL4 466 0 Z
+bit 464 I 1 COL5
+bit 463 C 0 COL5
+bit 462 O 1 COL5 463 0 Z
+bit 461 I 1 COL6
+bit 460 C 0 COL6
+bit 459 O 1 COL6 460 0 Z
+bit 458 I 1 COL7
+bit 457 C 0 COL7
+bit 456 O 1 COL7 457 0 Z
+bit 455 I 1 BUZ
+bit 454 C 0 BUZ
+bit 453 O 1 BUZ 454 0 Z
+bit 452 C 0 SSPCLK
+bit 451 O 1 SSPCLK 452 0 Z
+bit 450 C 0 PGMCLK
+bit 449 O 1 PGMCLK 450 0 Z
+bit 448 I 1 SSPRX
+bit 447 C 0 SSPRX
+bit 446 O 1 SSPRX 447 0 Z
+bit 445 C 0 SSPTX
+bit 444 O 1 SSPTX 445 0 Z
+bit 443 C 0 SSPFRM
+bit 442 O 1 SSPFRM 443 0 Z
+bit 441 I 1 PA0
+bit 440 C 0 PA0
+bit 439 O 1 PA0 440 0 Z
+bit 438 I 1 PA1
+bit 437 C 0 PA1
+bit 436 O 1 PA1 437 0 Z
+bit 435 I 1 PA2
+bit 434 C 0 PA2
+bit 433 O 1 PA2 434 0 Z
+bit 432 I 1 PA3
+bit 431 C 0 PA3
+bit 430 O 1 PA3 431 0 Z
+bit 429 I 1 PA4
+bit 428 C 0 PA4
+bit 427 O 1 PA4 428 0 Z
+bit 426 I 1 PA5
+bit 425 C 0 PA5
+bit 424 O 1 PA5 425 0 Z
+bit 423 I 1 PA6
+bit 422 C 0 PA6
+bit 421 O 1 PA6 422 0 Z
+bit 420 I 1 PA7
+bit 419 C 0 PA7
+bit 418 O 1 PA7 419 0 Z
+bit 417 I 1 PB0
+bit 416 C 0 PB0
+bit 415 O 1 PB0 416 0 Z
+bit 414 I 1 PB1
+bit 413 C 0 PB1
+bit 412 O 1 PB1 413 0 Z
+bit 411 I 1 PB2
+bit 410 C 0 PB2
+bit 409 O 1 PB2 410 0 Z
+bit 408 I 1 PB3
+bit 407 C 0 PB3
+bit 406 O 1 PB3 407 0 Z
+bit 405 I 1 PB4
+bit 404 C 0 PB4
+bit 403 O 1 PB4 404 0 Z
+bit 402 I 1 PB5
+bit 401 C 0 PB5
+bit 400 O 1 PB5 401 0 Z
+bit 399 I 1 PB6
+bit 398 C 0 PB6
+bit 397 O 1 PB6 398 0 Z
+bit 396 I 1 PB7
+bit 395 C 0 PB7
+bit 394 O 1 PB7 395 0 Z
+bit 393 I 1 PC0
+bit 392 C 0 PC0
+bit 391 O 1 PC0 392 0 Z
+bit 390 I 1 PC1
+bit 389 C 0 PC1
+bit 388 O 1 PC1 389 0 Z
+bit 387 I 1 PC2
+bit 386 C 0 PC2
+bit 385 O 1 PC2 386 0 Z
+bit 384 I 1 PC3
+bit 383 C 0 PC3
+bit 382 O 1 PC3 383 0 Z
+bit 381 I 1 PC4
+bit 380 C 0 PC4
+bit 379 O 1 PC4 380 0 Z
+bit 378 I 1 PC5
+bit 377 C 0 PC5
+bit 376 O 1 PC5 377 0 Z
+bit 375 I 1 PC6
+bit 374 C 0 PC6
+bit 373 O 1 PC6 374 0 Z
+bit 372 I 1 PC7
+bit 371 C 0 PC7
+bit 370 O 1 PC7 371 0 Z
+bit 369 I 1 PG0
+bit 368 C 0 PG0
+bit 367 O 1 PG0 368 0 Z
+bit 366 I 1 PG1
+bit 365 C 0 PG1
+bit 364 O 1 PG1 365 0 Z
+bit 363 I 1 PG2
+bit 362 C 0 PG2
+bit 361 O 1 PG2 362 0 Z
+bit 360 I 1 PG3
+bit 359 C 0 PG3
+bit 358 O 1 PG3 359 0 Z
+bit 357 I 1 PG4
+bit 356 C 0 PG4
+bit 355 O 1 PG4 356 0 Z
+bit 354 I 1 PG5
+bit 353 C 0 PG5
+bit 352 O 1 PG5 353 0 Z
+bit 351 I 1 PG6
+bit 350 C 0 PG6
+bit 349 O 1 PG6 350 0 Z
+bit 348 I 1 PG7
+bit 347 C 0 PG7
+bit 346 O 1 PG7 347 0 Z
+bit 345 I 1 PH0
+bit 344 C 0 PH0
+bit 343 O 1 PH0 344 0 Z
+bit 342 I 1 PH1
+bit 341 C 0 PH1
+bit 340 O 1 PH1 341 0 Z
+bit 339 I 1 PH2
+bit 338 C 0 PH2
+bit 337 O 1 PH2 338 0 Z
+bit 336 I 1 PH3
+bit 335 C 0 PH3
+bit 334 O 1 PH3 335 0 Z
+bit 333 I 1 PH4
+bit 332 C 0 PH4
+bit 331 O 1 PH4 332 0 Z
+bit 330 I 1 PH5
+bit 329 C 0 PH5
+bit 328 O 1 PH5 329 0 Z
+bit 327 I 1 PH6
+bit 326 C 0 PH6
+bit 325 O 1 PH6 326 0 Z
+bit 324 I 1 PH7
+bit 323 C 0 PH7
+bit 322 O 1 PH7 323 0 Z
+bit 321 C 0 LCDFP
+bit 320 O 1 LCDFP 321 0 Z
+bit 319 C 0 LCDVD0
+bit 318 O 1 LCDVD0 319 0 Z
+bit 317 C 0 LCDVD1
+bit 316 O 1 LCDVD1 317 0 Z
+bit 315 C 0 LCDVD2
+bit 314 O 1 LCDVD2 315 0 Z
+bit 313 C 0 LCDVD3
+bit 312 O 1 LCDVD3 313 0 Z
+bit 311 I 1 PE0
+bit 310 C 0 PE0
+bit 309 O 1 PE0 310 0 Z
+bit 308 C 0 LCDLP
+bit 307 O 1 LCDLP 308 0 Z
+bit 306 C 0 LCDM
+bit 305 O 1 LCDM 306 0 Z
+bit 304 C 0 LCDDCLK
+bit 303 O 1 LCDDCLK 304 0 Z
+bit 302 I 1 PE1
+bit 301 C 0 PE1
+bit 300 O 1 PE1 301 0 Z
+bit 299 I 1 PE2
+bit 298 C 0 PE2
+bit 297 O 1 PE2 298 0 Z
+bit 296 I 1 PE3
+bit 295 C 0 PE3
+bit 294 O 1 PE3 295 0 Z
+bit 293 I 1 PD0
+bit 292 C 0 PD0
+bit 291 O 1 PD0 292 0 Z
+bit 290 I 1 PD1
+bit 289 C 0 PD1
+bit 288 O 1 PD1 289 0 Z
+bit 287 I 1 PD2
+bit 286 C 0 PD2
+bit 285 O 1 PD2 286 0 Z
+bit 284 I 1 PD3
+bit 283 C 0 PD3
+bit 282 O 1 PD3 283 0 Z
+bit 281 I 1 PD4
+bit 280 C 0 PD4
+bit 279 O 1 PD4 280 0 Z
+bit 278 I 1 PD5
+bit 277 C 0 PD5
+bit 276 O 1 PD5 277 0 Z
+bit 275 I 1 PD6
+bit 274 C 0 PD6
+bit 273 O 1 PD6 274 0 Z
+bit 272 I 1 PD7
+bit 271 C 0 PD7
+bit 270 O 1 PD7 271 0 Z
+bit 269 I 1 WIDTH0
+bit 268 I 1 WIDTH1
+bit 267 C 0 nCS0
+bit 266 O 1 nCS0 267 0 Z
+bit 265 C 0 nCS1
+bit 264 O 1 nCS1 265 0 Z
+bit 263 I 1 OSCEN
+bit 262 C 0 OSCEN
+bit 261 O 1 OSCEN 262 0 Z
+bit 260 C 0 nCS2
+bit 259 O 1 nCS2 260 0 Z
+bit 258 C 0 nCS3
+bit 257 O 1 nCS3 258 0 Z
+bit 256 I 1 D0
+bit 255 C 0 D0
+bit 254 O 1 D0 255 0 Z
+bit 253 C 0 A0
+bit 252 O 1 A0 253 0 Z
+bit 251 I 1 D1
+bit 250 C 0 D1
+bit 249 O 1 D1 250 0 Z
+bit 248 C 0 A1
+bit 247 O 1 A1 248 0 Z
+bit 246 I 1 D2
+bit 245 C 0 D2
+bit 244 O 1 D2 245 0 Z
+bit 243 C 0 A2
+bit 242 O 1 A2 243 0 Z
+bit 241 I 1 D3
+bit 240 C 0 D3
+bit 239 O 1 D3 240 0 Z
+bit 238 C 0 A3
+bit 237 O 1 A3 238 0 Z
+bit 236 I 1 D4
+bit 235 C 0 D4
+bit 234 O 1 D4 235 0 Z
+bit 233 C 0 A4
+bit 232 O 1 A4 233 0 Z
+bit 231 I 1 D5
+bit 230 C 0 D5
+bit 229 O 1 D5 230 0 Z
+bit 228 C 0 A5
+bit 227 O 1 A5 228 0 Z
+bit 226 I 1 D6
+bit 225 C 0 D6
+bit 224 O 1 D6 225 0 Z
+bit 223 C 0 A6
+bit 222 O 1 A6 223 0 Z
+bit 221 I 1 D7
+bit 220 C 0 D7
+bit 219 O 1 D7 220 0 Z
+bit 218 C 0 A7
+bit 217 O 1 A7 218 0 Z
+bit 216 I 1 D8
+bit 215 C 0 D8
+bit 214 O 1 D8 215 0 Z
+bit 213 C 0 A8
+bit 212 O 1 A8 213 0 Z
+bit 211 I 1 D9
+bit 210 C 0 D9
+bit 209 O 1 D9 210 0 Z
+bit 208 C 0 A9
+bit 207 O 1 A9 208 0 Z
+bit 206 I 1 D10
+bit 205 C 0 D10
+bit 204 O 1 D10 205 0 Z
+bit 203 C 0 A10
+bit 202 O 1 A10 203 0 Z
+bit 201 I 1 D11
+bit 200 C 0 D11
+bit 199 O 1 D11 200 0 Z
+bit 198 C 0 A11
+bit 197 O 1 A11 198 0 Z
+bit 196 I 1 D12
+bit 195 C 0 D12
+bit 194 O 1 D12 195 0 Z
+bit 193 C 0 A12
+bit 192 O 1 A12 193 0 Z
+bit 191 I 1 D13
+bit 190 C 0 D13
+bit 189 O 1 D13 190 0 Z
+bit 188 C 0 A13
+bit 187 O 1 A13 188 0 Z
+bit 186 I 1 D14
+bit 185 C 0 D14
+bit 184 O 1 D14 185 0 Z
+bit 183 C 0 A14
+bit 182 O 1 A14 183 0 Z
+bit 181 I 1 D15
+bit 180 C 0 D15
+bit 179 O 1 D15 180 0 Z
+bit 178 C 0 A15
+bit 177 O 1 A15 178 0 Z
+bit 176 I 1 D16
+bit 175 C 0 D16
+bit 174 O 1 D16 175 0 Z
+bit 173 C 0 A16
+bit 172 O 1 A16 173 0 Z
+bit 171 I 1 D17
+bit 170 C 0 D17
+bit 169 O 1 D17 170 0 Z
+bit 168 C 0 A17
+bit 167 O 1 A17 168 0 Z
+bit 166 I 1 D18
+bit 165 C 0 D18
+bit 164 O 1 D18 165 0 Z
+bit 163 C 0 A18
+bit 162 O 1 A18 163 0 Z
+bit 161 I 1 D19
+bit 160 C 0 D19
+bit 159 O 1 D19 160 0 Z
+bit 158 C 0 A19
+bit 157 O 1 A19 158 0 Z
+bit 156 I 1 D20
+bit 155 C 0 D20
+bit 154 O 1 D20 155 0 Z
+bit 153 C 0 A20
+bit 152 O 1 A20 153 0 Z
+bit 151 I 1 D21
+bit 150 C 0 D21
+bit 149 O 1 D21 150 0 Z
+bit 148 C 0 A21
+bit 147 O 1 A21 148 0 Z
+bit 146 I 1 D22
+bit 145 C 0 D22
+bit 144 O 1 D22 145 0 Z
+bit 143 C 0 A22
+bit 142 O 1 A22 143 0 Z
+bit 141 I 1 D23
+bit 140 C 0 D23
+bit 139 O 1 D23 140 0 Z
+bit 138 C 0 A23
+bit 137 O 1 A23 138 0 Z
+bit 136 I 1 D24
+bit 135 C 0 D24
+bit 134 O 1 D24 135 0 Z
+bit 133 C 0 A24
+bit 132 O 1 A24 133 0 Z
+bit 131 I 1 D25
+bit 130 C 0 D25
+bit 129 O 1 D25 130 0 Z
+bit 128 I 1 nSCS0
+bit 127 C 0 nSCS0
+bit 126 O 1 nSCS0 127 0 Z
+bit 125 I 1 D26
+bit 124 C 0 D26
+bit 123 O 1 D26 124 0 Z
+bit 122 I 1 nSCS1
+bit 121 C 0 nSCS1
+bit 120 O 1 nSCS1 121 0 Z
+bit 119 I 1 D27
+bit 118 C 0 D27
+bit 117 O 1 D27 118 0 Z
+bit 116 I 1 nSCS2
+bit 115 C 0 nSCS2
+bit 114 O 1 nSCS2 115 0 Z
+bit 113 I 1 D28
+bit 112 C 0 D28
+bit 111 O 1 D28 112 0 Z
+bit 110 I 1 nSCS3
+bit 109 C 0 nSCS3
+bit 108 O 1 nSCS3 109 0 Z
+bit 107 I 1 D29
+bit 106 C 0 D29
+bit 105 O 1 D29 106 0 Z
+bit 104 C 0 nSWE
+bit 103 O 1 nSWE 104 0 Z
+bit 102 I 1 D30
+bit 101 C 0 D30
+bit 100 O 1 D30 101 0 Z
+bit 99 I 1 nCAS
+bit 98 C 0 nCAS
+bit 97 O 1 nCAS 98 0 Z
+bit 96 I 1 D31
+bit 95 C 0 D31
+bit 94 O 1 D31 95 0 Z
+bit 93 I 1 nRAS
+bit 92 C 0 nRAS
+bit 91 O 1 nRAS 92 0 Z
+bit 90 I 1 SCKEN3
+bit 89 C 0 SCKEN3
+bit 88 O 1 SCKEN3 89 0 Z
+bit 87 I 1 SCLK
+bit 86 C 0 SCLK
+bit 85 O 1 SCLK 86 0 Z
+bit 84 C 0 CS6
+bit 83 O 1 CS6 84 0 Z
+bit 82 C 0 CS7
+bit 81 O 1 CS7 82 0 Z
+bit 80 C 0 nWE3
+bit 79 O 1 nWE3 80 0 Z
+bit 78 I 1 DQM0
+bit 77 C 0 DQM0
+bit 76 O 1 DQM0 77 0 Z
+bit 75 I 1 DQM1
+bit 74 C 0 DQM1
+bit 73 O 1 DQM1 74 0 Z
+bit 72 I 1 DQM2
+bit 71 C 0 DQM2
+bit 70 O 1 DQM2 71 0 Z
+bit 69 C 0 DQM3
+bit 68 O 1 DQM3 69 0 Z
+bit 67 C 0 nOE
+bit 66 O 1 nOE 67 0 Z
+bit 65 I 1 nWE0
+bit 64 C 0 nWE0
+bit 63 O 1 nWE0 64 0 Z
+bit 62 I 1 A25
+bit 61 C 0 A25
+bit 60 O 1 A25 61 0 Z
+bit 59 I 1 A26
+bit 58 C 0 A26
+bit 57 O 1 A26 58 0 Z
+bit 56 C 0 A27
+bit 55 O 1 A27 56 0 Z
+bit 54 I 1 PWMEN0
+bit 53 C 0 PWMEN0
+bit 52 O 1 PWMEN0 53 0 Z
+bit 51 I 1 PWMEN1
+bit 50 C 0 PWMEN1
+bit 49 O 1 PWMEN1 50 0 Z
+bit 48 I 1 PWM0
+bit 47 C 0 PWM0
+bit 46 O 1 PWM0 47 0 Z
+bit 45 I 1 PWM1
+bit 44 C 0 PWM1
+bit 43 O 1 PWM1 44 0 Z
+bit 42 I 1 PF0
+bit 41 C 0 PF0
+bit 40 O 1 PF0 41 0 Z
+bit 39 I 1 PF1
+bit 38 C 0 PF1
+bit 37 O 1 PF1 38 0 Z
+bit 36 I 1 PF2
+bit 35 C 0 PF2
+bit 34 O 1 PF2 35 0 Z
+bit 33 I 1 PF4
+bit 32 C 0 PF4
+bit 31 O 1 PF4 32 0 Z
+bit 30 I 1 PF5
+bit 29 C 0 PF5
+bit 28 O 1 PF5 29 0 Z
+bit 27 I 1 PF6
+bit 26 C 0 PF6
+bit 25 O 1 PF6 26 0 Z
+bit 24 I 1 PF7
+bit 23 C 0 PF7
+bit 22 O 1 PF7 23 0 Z
+bit 21 I 1 AC97CLK
+bit 20 C 0 AC97CLK
+bit 19 O 1 AC97CLK 20 0 Z
+bit 18 I 1 PF3
+bit 17 C 0 PF3
+bit 16 O 1 PF3 17 0 Z
+bit 15 C 0 AC97OUT
+bit 14 O 1 AC97OUT 15 0 Z
+bit 13 C 0 AC97SYNC
+bit 12 O 1 AC97SYNC 13 0 Z
+bit 11 I 1 AC97IN
+bit 10 C 0 AC97IN
+bit 9 O 1 AC97IN 10 0 Z
+bit 8 I 1 MMCCLK
+bit 7 C 0 MMCCLK
+bit 6 O 1 MMCCLK 7 0 Z
+bit 5 I 1 MMCCMD
+bit 4 C 0 MMCCMD
+bit 3 O 1 MMCCMD 4 0 Z
+bit 2 I 1 MMCDATA
+bit 1 C 0 MMCDATA
+bit 0 O 1 MMCDATA 1 0 Z
--- /dev/null
+#
+# $Id: PARTS 599 2004-06-13 18:16:43Z telka $
+#
+# Copyright (C) 2008 andi2k (sf.net)
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# bits 27-12 of the Device Identification Register
+1000011000110000 smp8634 SMP8634
--- /dev/null
+#
+# $Id: STEPPINGS 380 2003-02-25 08:26:15Z telka $
+#
+# Copyright (C) 2008 andi2k (sf.net)
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# bits 31-28 of the Device Identification Register
+0000 smp8634 1
--- /dev/null
+#
+# $Id: smp8634 599 2004-06-13 18:16:43Z telka $
+#
+# Copyright (C) 2008 andi2k (sf.net)
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+
+register BR 1
+register BSR 1
+register DIR 32
+register EJIMPCODE 32
+register EJADDRESS 32
+register EJDATA 32
+register EJCONTROL 32
+register EJALL 96
+register EJFASTDATA 33
+
+instruction length 5
+
+instruction BYPASS 11111 BR
+instruction SAMPLE/PRELOAD 00010 BSR
+instruction IDCODE 00001 DIR
+instruction EJTAG_IMPCODE 00011 EJIMPCODE
+instruction EJTAG_ADDRESS 01000 EJADDRESS
+instruction EJTAG_DATA 01001 EJDATA
+instruction EJTAG_CONTROL 01010 EJCONTROL
+instruction EJTAG_ALL 01011 EJALL
+instruction EJTAGBOOT 01100 BR
+instruction NORMALBOOT 01101 BR
+instruction EJTAG_FASTDATA 01110 EJFASTDATA
+
+initbus ejtag
+endian little
+
+
--- /dev/null
+#
+# $Id$
+#
+# Copyright (C) 2009 aSmig (sf.net)
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+#
+# Documentation:
+#
+
+# bits 27-12 of the Device Identification Register
+1011010100101101 tnetv1060 TNETV1060
+1011011011000110 tnetv1061 TNETV1061
--- /dev/null
+#
+# $Id$
+#
+# Copyright (C) 2009 aSmig (sf.net)
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+#
+# Documentation:
+#
+
+# bits 31-28 of the Device Identification Register
+0000 tnetv1060 NoDoc
--- /dev/null
+#
+# $Id$
+#
+# JTAG declarations for TNETV1060
+# Copyright (C) 2009 aSmig (sf.net)
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+#
+# Documentation:
+# [1] Texas Instruments, "TNETV1060 Communications Processor
+# for VoIP Gateway Applications Data Manual", June 2004,
+# Literature Number SPRS255
+# [2] MIPS Technologies, "MIPS32 4KETM Processor Core Family
+# Software User’s Manual", January 2004, Document Number:
+# MD00103
+# [3] MIPS Technologies, "MIPS® EJTAG Specification", November
+# 2008, Document Number: MD00047
+#
+
+# see Table 3-2 in [1]
+signal AIC_CLK_I R1
+signal AIC_CLK_O T1
+signal ALT_CLK_I P21
+signal EJTAG_DINT E3
+signal EJTAG_SYSRST E2
+signal EJTAG_TCK F2
+signal EJTAG_TDI G3
+signal EJTAG_TDO F1
+signal EJTAG_TMS G2
+signal EJTAG_TRST0 F3
+signal EJTAG_TRST1 E1
+signal EM_A0 J21
+signal EM_A1 J20
+signal EM_A2 H22
+signal EM_A3 H21
+signal EM_A4 H20
+signal EM_A5 G22
+signal EM_A6 G21
+signal EM_A7 G20
+signal EM_A8 F22
+signal EM_A9 F21
+signal EM_A10 F20
+signal EM_A11 F19
+signal EM_A12 E22
+signal EM_A13 E21
+signal EM_A14 E20
+signal EM_A15 E19
+signal EM_A16 D22
+signal EM_A17 D21
+signal EM_A18 D20
+signal EM_A19 C22
+signal EM_A20 C21
+signal EM_A21 C19
+signal EM_A22 B20
+signal EM_A23 A20
+signal EM_CAS A5
+signal EM_CKE D5
+signal EM_CLK D6
+signal EM_CS0 C8
+signal EM_CS1 B8
+signal EM_CS2 A8
+signal EM_CS3 C7
+signal EM_CS4 B7
+signal EM_CS5 A7
+signal EM_D0 B10
+signal EM_D1 A10
+signal EM_D2 B11
+signal EM_D3 A11
+signal EM_D4 C11
+signal EM_D5 D11
+signal EM_D6 B12
+signal EM_D7 A12
+signal EM_D8 C12
+signal EM_D9 D12
+signal EM_D10 B13
+signal EM_D11 A13
+signal EM_D12 C13
+signal EM_D13 B14
+signal EM_D14 A14
+signal EM_D15 C14
+signal EM_D16 B15
+signal EM_D17 A15
+signal EM_D18 C15
+signal EM_D19 B16
+signal EM_D20 A16
+signal EM_D21 C16
+signal EM_D22 B17
+signal EM_D23 A17
+signal EM_D24 C17
+signal EM_D25 D17
+signal EM_D26 B18
+signal EM_D27 A18
+signal EM_D28 C18
+signal EM_D29 D18
+signal EM_D30 A19
+signal EM_D31 B19
+signal EM_HIZ C6
+signal EM_OE B5
+signal EM_RAS A6
+signal EM_RW C5
+signal EM_WAIT B6
+signal EM_WE_DQM0 C10
+signal EM_WE_DQM1 C9
+signal EM_WE_DQM2 B9
+signal EM_WE_DQM3 A9
+signal EM_WE A4
+signal GPIO0 R3
+signal GPIO1 T3
+signal GPIO2 U3
+signal GPIO3 T2
+signal GPIO4 U2
+signal GPIO5 V2
+signal GPIO6 U1
+signal GPIO7 V1
+signal JTAG_EMU0 H3
+signal JTAG_EMU1 G1
+signal JTAG_TCK J3
+signal JTAG_TDI H1
+signal JTAG_TDO J2
+signal JTAG_TMS J1
+signal JTAG_TRST H2
+signal KEYPAD0 AB7
+signal KEYPAD1 AA7
+signal KEYPAD2 AB8
+signal KEYPAD3 AA8
+signal KEYPAD4 Y8
+signal KEYPAD5 AB9
+signal KEYPAD6 AA9
+signal KEYPAD7 Y9
+signal KEYPAD8 AB10
+signal KEYPAD9 AA10
+signal KEYPAD10 Y10
+signal KEYPAD11 AB11
+signal KEYPAD12 AA11
+signal KEYPAD13 W11
+signal KEYPAD14 Y11
+signal KEYPAD15 AB12
+signal LCD_BIAS_E0 AA12
+signal LCD_D0 Y13
+signal LCD_D1 AB14
+signal LCD_D2 AA14
+signal LCD_D3 Y14
+signal LCD_D4 AB15
+signal LCD_D5 AA15
+signal LCD_D6 Y15
+signal LCD_D7 AB16
+signal LCD_D8 AA16
+signal LCD_D9 Y16
+signal LCD_D10 AB17
+signal LCD_D11 AA17
+signal LCD_D12 Y17
+signal LCD_D13 W17
+signal LCD_D14 AB18
+signal LCD_D15 AA18
+signal LCD_E1 AB13
+signal LCD_HSYNC_W W12
+signal LCD_PIXEL_STRB Y12
+signal LCD_VSYNC_A AA13
+signal McBSP_CLK_RX M3
+signal McBSP_CLK_TX N2
+signal McBSP_D_RX N3
+signal McBSP_D_TX P1
+signal McBSP_FS_RX P2
+signal McBSP_FS_TX P3
+signal P0_100MB AB19
+signal P0_ACTIVITY AB20
+signal P0_FDUPLEX AA20
+signal P0_LINK AA19
+signal P0_RX_M W19
+signal P0_RX_P Y19
+signal P0_TX_M V22
+signal P0_TX_P W22
+signal P1_100MB AB21
+signal P1_ACTIVITY AB22
+signal P1_FDUPLEX AA22
+signal P1_LINK AA21
+signal P1_RX_M R19
+signal P1_RX_P P19
+signal P1_TX_M T22
+signal P1_TX_P R22
+signal PHY_REF W18
+signal PHY_REF_RTN Y18
+signal PHY_TEST Y21
+signal REF_CLK_I P22
+signal REF_CLK_O N22
+signal RESET_I C1
+signal RESET_O C0
+signal SSP0 D3
+signal SSP1 D1
+signal SSP2 D2
+signal SSP3 E4
+signal TELE_CLK_I L19
+signal TELE_CLK_O J22
+signal TELE_CS K20
+signal TELE_DCLK M19
+signal TELE_DI N20
+signal TELE_DO M20
+signal TELE_FS L20
+signal TELE_INT K21
+signal TELE_RESET K22
+signal TELE_RINGIN1 M21
+signal TELE_RINGIN2 M22
+signal TELE_RINGIN3 L21
+signal TELE_RINGIN4 L22
+signal TEST F4
+signal UART_CTS B3
+signal UART_RTS A3
+signal UART_RX B4
+signal UART_TX C4
+signal VLYNQ5_CLK K3
+signal VLYNQ5_RX_D0 K2
+signal VLYNQ5_RX_D1 K1
+signal VLYNQ5_TX_D0 L2
+signal VLYNQ5_TX_D1 L1
+signal VR_BASE1 AB6
+signal VR_BASE2 R2
+signal VR_BASE3 Y22
+signal VR_ENBL AA6
+signal VDD J10 J11 J12 J13 K9 K14 L9 L14 M9 M14 N9 N14 P10 P11 P12 P13
+signal VDDS D7 D8 D9 D10 D13 D14 D15 D16 G4 G19 H4 H19 J4 J19 K4 K19 N4 P4 W9 W10 W13 W14 W15 W16
+signal VDDA N19 P20 R4 T4 U19 U20 U21 U22 W7 W8 Y20
+signal VSS A1 A2 A21 A22 B1 B2 B21 B22 C3 C20 D4 D19 J9 J14 K10 K11
+# VSS line was too long
+signal VSS2 K12 K13 L10 L11 L12 L13 M10 M11 M12 M13 N10 N11 N12 N13
+signal VSS_AIC AA1 AA2 AB1 AB2 P9 N21 P14 R20 R21 T19 T20 T21 V19 V20 V21 W4 W20 W21
+signal NC A3 AA4 AA5 AB3 AB4 AB5 L3 L4 M1 M2 M4 N1 U4 V3 V4 W1 W2 W3 W5 W6 Y1 Y2 Y4 Y5 Y6 Y7
+
+# see [2] 9.3.3.2 - 9.3.3.7
+# see also discovery output
+register BSR 1
+register BR 1
+register DIR 32
+register EJIMPCODE 32
+register EJADDRESS 32
+register EJDATA 32
+register EJCONTROL 32
+register EJALL 96
+register EJFASTDATA 33
+
+# see [2] 9.3.3 Test Access Port (TAP) Instructions
+# see also discovery output
+instruction length 5
+
+# see [2] Table 9-20 Implemented EJTAG Instructions
+# see also [3] Table 7.1 TAP Instruction Overview
+instruction BYPASS 11111 BR
+instruction SAMPLE/PRELOAD 00010 BSR # not in datasheets
+instruction IDCODE 00001 DIR
+instruction EJTAG_IMPCODE 00011 EJIMPCODE
+instruction EJTAG_ADDRESS 01000 EJADDRESS
+instruction EJTAG_DATA 01001 EJDATA
+instruction EJTAG_CONTROL 01010 EJCONTROL
+instruction EJTAG_ALL 01011 EJALL
+instruction EJTAGBOOT 01100 BR
+instruction NORMALBOOT 01101 BR
+instruction EJTAG_FASTDATA 01110 EJFASTDATA
+instruction TCBCONTROLA 10000 BR
+instruction TCBCONTROLB 10001 BR
+instruction TCBDATA 10010 BR
+
+initbus ejtag
+endian little
--- /dev/null
+#
+# $Id$
+#
+# Copyright (C) 2009 aSmig (sf.net)
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+#
+# Documentation:
+#
+
+# bits 31-28 of the Device Identification Register
+0001 tnetv1061 NoDoc
--- /dev/null
+#
+# $Id$
+#
+# JTAG declarations for TNETV1061
+# Copyright (C) 2009 aSmig (sf.net)
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+#
+# Documentation:
+# [1] MIPS Technologies, "MIPS32 4KETM Processor Core Family
+# Software User’s Manual", January 2004, Document Number:
+# MD00103
+# [2] MIPS Technologies, "MIPS® EJTAG Specification", November
+# 2008, Document Number: MD00047
+#
+
+# see [1] 9.3.3.2 - 9.3.3.7
+# see also discovery output
+register BSR 1
+register BR 1
+register DIR 32
+register EJIMPCODE 32
+register EJADDRESS 32
+register EJDATA 32
+register EJCONTROL 32
+register EJALL 96
+register EJFASTDATA 33
+
+# see [1] 9.3.3 Test Access Port (TAP) Instructions
+# see also discovery output
+instruction length 5
+
+# see [1] Table 9-20 Implemented EJTAG Instructions
+# see also [2] Table 7.1 TAP Instruction Overview
+instruction BYPASS 11111 BR
+instruction SAMPLE/PRELOAD 00010 BSR # not in datasheets
+instruction IDCODE 00001 DIR
+instruction EJTAG_IMPCODE 00011 EJIMPCODE
+instruction EJTAG_ADDRESS 01000 EJADDRESS
+instruction EJTAG_DATA 01001 EJDATA
+instruction EJTAG_CONTROL 01010 EJCONTROL
+instruction EJTAG_ALL 01011 EJALL
+instruction EJTAGBOOT 01100 BR
+instruction NORMALBOOT 01101 BR
+instruction EJTAG_FASTDATA 01110 EJFASTDATA
+instruction TCBCONTROLA 10000 BR
+instruction TCBCONTROLB 10001 BR
+instruction TCBDATA 10010 BR
+
+initbus ejtag
+endian little
--- /dev/null
+#
+# $Id$
+#
+# Copyright (C) 2003 RightHand Technologies, Inc.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Andrew Dyer <adyer@righthandtech.com>, 2003.
+#
+
+# bits 27-12 of the Device Identification Register
+0000000000011110 tx4925 TX4925
+0000000000011111 tx4926 TX4926
--- /dev/null
+#
+# $Id$
+#
+# Copyright (C) 2003 RightHand Technologies, Inc.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Andrew Dyer <adyer@righthandtech.com>, 2003.
+#
+
+# bits 31-28 of the Device Identification Register
+0000 tx4925 0
--- /dev/null
+#
+# $Id$
+#
+# JTAG declarations for Toshiba TX4925
+# Copyright (C) 2004 RightHand Technologies, Inc.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Andrew Dyer <adyer@righthandtech.com>, 2004.
+#
+# Documentation:
+# [1] Toshiba Corporation,
+# "64-Bit TX System RISC TX49 Family TMPR4925 Rev. 2.0"
+# [2] Toshiba Corporation, "BSDL file for TMPR4925"
+#
+signal VDDC0
+signal VDDC1
+signal VDDC2
+signal VDDC3
+signal VDDC4
+signal VDDC5
+signal VDDC6
+signal VDDC7
+signal VDDC8
+signal VDDC9
+signal VDDC10
+signal VDDC11
+signal VDDC12
+signal VDDC13
+signal VDDC14
+signal VDDC15
+signal VDDC16
+signal VDDC17
+signal VDDS0
+signal VDDS1
+signal VDDS2
+signal VDDS3
+signal VDDS4
+signal VDDS5
+signal VDDS6
+signal VDDS7
+signal VDDS8
+signal VDDS9
+signal VDDS10
+signal VDDS11
+signal VDDS12
+signal VDDS13
+signal VDDS14
+signal VDDS15
+signal VDDS16
+signal VDDS17
+signal VDDS18
+signal VDDS19
+signal VDDS20
+signal VSS0
+signal VSS1
+signal VSS2
+signal VSS3
+signal VSS4
+signal VSS5
+signal VSS6
+signal VSS7
+signal VSS8
+signal VSS9
+signal VSS10
+signal VSS11
+signal VSS12
+signal VSS13
+signal VSS14
+signal VSS15
+signal VSS16
+signal VSS17
+signal VSS18
+signal VSS19
+signal VSS20
+signal VSS21
+signal VSS22
+signal VSS23
+signal VSS24
+signal VSS25
+signal VSS26
+signal VSS27
+signal VSS28
+signal VSS29
+signal COLDRESET
+signal PON
+signal MSTRCLK
+signal TEST
+signal PLLVDD
+signal PLLVSS
+signal NMI
+signal SCANENB
+signal C32KIN
+signal SYSCLK
+signal BWE_3
+signal BWE_2
+signal BWE_1
+signal BWE_0
+signal SDCLK_1
+signal SDCLK_0
+signal SDCLKIN
+signal GNT_3
+signal GNT_2
+signal GNT_1
+signal GNT_0
+signal REQ_3
+signal REQ_2
+signal REQ_1
+signal REQ_0
+signal PERR
+signal SERR
+signal PCIAD_31
+signal PCIAD_30
+signal PCIAD_29
+signal PCIAD_28
+signal PCIAD_27
+signal PCIAD_26
+signal PCIAD_25
+signal PCIAD_24
+signal PCIAD_23
+signal PCIAD_22
+signal PCIAD_21
+signal PCIAD_20
+signal PCIAD_19
+signal PCIAD_18
+signal PCIAD_17
+signal PCIAD_16
+signal PCIAD_15
+signal PCIAD_14
+signal PCIAD_13
+signal PCIAD_12
+signal PCIAD_11
+signal PCIAD_10
+signal PCIAD_9
+signal PCIAD_8
+signal PCIAD_7
+signal PCIAD_6
+signal PCIAD_5
+signal PCIAD_4
+signal PCIAD_3
+signal PCIAD_2
+signal PCIAD_1
+signal PCIAD_0
+signal C_BE_3
+signal C_BE_2
+signal C_BE_1
+signal C_BE_0
+signal PAR
+signal FRAME
+signal TRDY
+signal IRDY
+signal IDSEL
+signal STOP
+signal DEVSEL
+signal PCICLK_2
+signal PCICLK_1
+signal PCICLKIO
+signal TDI
+signal TMS
+signal TCK
+signal TRST
+signal BC32K
+signal DATA_31
+signal DATA_30
+signal DATA_29
+signal DATA_28
+signal DATA_27
+signal DATA_26
+signal DATA_25
+signal DATA_24
+signal DATA_23
+signal DATA_22
+signal DATA_21
+signal DATA_20
+signal DATA_19
+signal DATA_18
+signal DATA_17
+signal DATA_16
+signal DATA_15
+signal DATA_14
+signal DATA_13
+signal DATA_12
+signal DATA_11
+signal DATA_10
+signal DATA_9
+signal DATA_8
+signal DATA_7
+signal DATA_6
+signal DATA_5
+signal DATA_4
+signal DATA_3
+signal DATA_2
+signal DATA_1
+signal DATA_0
+signal ADDR_19
+signal ADDR_18
+signal ADDR_17
+signal ADDR_16
+signal ADDR_15
+signal ADDR_14
+signal ADDR_13
+signal ADDR_12
+signal ADDR_11
+signal ADDR_10
+signal ADDR_9
+signal ADDR_8
+signal ADDR_7
+signal ADDR_6
+signal ADDR_5
+signal ADDR_4
+signal ADDR_3
+signal ADDR_2
+signal ADDR_1
+signal ADDR_0
+signal ACK
+signal ROMCE_3
+signal ROMCE_2
+signal ROMCE_1
+signal ROMCE_0
+signal PIO_31
+signal PIO_30
+signal PIO_29
+signal PIO_28
+signal PIO_27
+signal PIO_26
+signal PIO_25
+signal PIO_24
+signal PIO_23
+signal PIO_22
+signal PIO_21
+signal PIO_20
+signal PIO_19
+signal PIO_18
+signal PIO_17
+signal PIO_16
+signal PIO_15
+signal PIO_14
+signal PIO_13
+signal PIO_12
+signal PIO_11
+signal PIO_10
+signal PIO_9
+signal PIO_8
+signal PIO_7
+signal PIO_6
+signal PIO_5
+signal PIO_4
+signal PIO_3
+signal PIO_2
+signal PIO_1
+signal PIO_0
+signal BUSSPRT
+signal UAE
+signal SWE
+signal OE
+signal SDCS_3
+signal SDCS_2
+signal SDCS_1
+signal SDCS_0
+signal RAS
+signal CAS
+signal DQM_3
+signal DQM_2
+signal DQM_1
+signal DQM_0
+signal WE
+signal CKE
+signal DA10
+signal RP
+signal C32KOUT
+
+register BSR 356
+register BR 1
+register DIR 32
+register EJIMPCODE 32
+register EJADDRESS 36
+register EJDATA 64
+register EJCONTROL 32
+register EJALL 132
+
+instruction length 8
+
+instruction BYPASS 11111111 BR
+instruction SAMPLE/PRELOAD 00000001 BSR
+instruction EXTEST 00000000 BSR
+instruction IDCODE 00000011 DIR
+instruction EJTAG_IMPCODE 10000011 EJIMPCODE
+instruction EJTAG_ADDRESS 10001000 EJADDRESS
+instruction EJTAG_DATA 10001001 EJDATA
+instruction EJTAG_CONTROL 10001010 EJCONTROL
+instruction EJATG_ALL 10001011 EJALL
+# instruction PCTRACE 10010000 # docs are unclear about what this does
+
+bit 355 O 1 GNT_0 354 1 Z
+bit 354 C 1 *
+bit 353 O 0 PCICLKIO 352 1 Z
+bit 352 C 1 *
+bit 351 O 0 PCICLK_1 350 1 Z
+bit 350 C 1 *
+bit 349 O 0 PCICLK_2 348 1 Z
+bit 348 C 1 *
+bit 347 O 1 REQ_0 346 1 Z
+bit 346 C 1 *
+bit 345 O 1 GNT_1 344 1 Z
+bit 344 C 1 *
+bit 343 O 1 REQ_1 342 1 Z
+bit 342 C 1 *
+bit 341 O 1 GNT_2 340 1 Z
+bit 340 C 1 *
+bit 339 O 1 REQ_2 338 1 Z
+bit 338 C 1 *
+bit 337 O 1 GNT_3 336 1 Z
+bit 336 C 1 *
+bit 335 O 1 REQ_3 334 1 Z
+bit 334 C 1 *
+bit 333 O 1 PCIAD_31 332 1 Z
+bit 332 C 1 *
+bit 331 O 1 PCIAD_30 330 1 Z
+bit 330 C 1 *
+bit 329 O 1 PCIAD_29 328 1 Z
+bit 328 C 1 *
+bit 327 O 1 PCIAD_28 326 1 Z
+bit 326 C 1 *
+bit 325 O 1 PCIAD_27 324 1 Z
+bit 324 C 1 *
+bit 323 O 1 PCIAD_26 322 1 Z
+bit 322 C 1 *
+bit 321 O 1 PCIAD_25 320 1 Z
+bit 320 C 1 *
+bit 319 O 1 PCIAD_24 318 1 Z
+bit 318 C 1 *
+bit 317 O 1 C_BE_3 316 1 Z
+bit 316 C 1 *
+bit 315 O 1 IDSEL 314 1 Z
+bit 314 C 1 *
+bit 313 O 1 PCIAD_23 312 1 Z
+bit 312 C 1 *
+bit 311 O 1 PCIAD_22 310 1 Z
+bit 310 C 1 *
+bit 309 O 1 PCIAD_21 308 1 Z
+bit 308 C 1 *
+bit 307 O 1 PCIAD_20 306 1 Z
+bit 306 C 1 *
+bit 305 O 1 PCIAD_19 304 1 Z
+bit 304 C 1 *
+bit 303 O 1 PCIAD_17 302 1 Z
+bit 302 C 1 *
+bit 301 O 1 PCIAD_18 300 1 Z
+bit 300 C 1 *
+bit 299 O 1 FRAME 298 1 Z
+bit 298 C 1 *
+bit 297 O 1 C_BE_2 296 1 Z
+bit 296 C 1 *
+bit 295 O 1 PCIAD_16 294 1 Z
+bit 294 C 1 *
+bit 293 O 1 STOP 292 1 Z
+bit 292 C 1 *
+bit 291 O 1 DEVSEL 290 1 Z
+bit 290 C 1 *
+bit 289 O 1 TRDY 288 1 Z
+bit 288 C 1 *
+bit 287 O 1 IRDY 286 1 Z
+bit 286 C 1 *
+bit 285 O 1 SERR 284 1 Z
+bit 284 C 1 *
+bit 283 O 1 PERR 282 1 Z
+bit 282 C 1 *
+bit 281 O 1 PCIAD_15 280 1 Z
+bit 280 C 1 *
+bit 279 O 1 C_BE_1 278 1 Z
+bit 278 C 1 *
+bit 277 O 1 PAR 276 1 Z
+bit 276 C 1 *
+bit 275 O 1 PCIAD_12 274 1 Z
+bit 274 C 1 *
+bit 273 O 1 PCIAD_13 272 1 Z
+bit 272 C 1 *
+bit 271 O 1 PCIAD_14 270 1 Z
+bit 270 C 1 *
+bit 269 O 1 PCIAD_9 268 1 Z
+bit 268 C 1 *
+bit 267 O 1 PCIAD_10 266 1 Z
+bit 266 C 1 *
+bit 265 O 1 PCIAD_11 264 1 Z
+bit 264 C 1 *
+bit 263 O 1 C_BE_0 262 1 Z
+bit 262 C 1 *
+bit 261 O 1 PCIAD_8 260 1 Z
+bit 260 C 1 *
+bit 259 O 1 PCIAD_4 258 1 Z
+bit 258 C 1 *
+bit 257 O 1 PCIAD_0 256 1 Z
+bit 256 C 1 *
+bit 255 O 1 PCIAD_5 254 1 Z
+bit 254 C 1 *
+bit 253 O 1 PCIAD_1 252 1 Z
+bit 252 C 1 *
+bit 251 O 1 PCIAD_6 250 1 Z
+bit 250 C 1 *
+bit 249 O 1 PCIAD_2 248 1 Z
+bit 248 C 1 *
+bit 247 O 1 PCIAD_7 246 1 Z
+bit 246 C 1 *
+bit 245 O 1 PCIAD_3 244 1 Z
+bit 244 C 1 *
+bit 243 O 1 BWE_0 242 1 Z
+bit 242 C 1 *
+bit 241 O 1 BWE_1 240 1 Z
+bit 240 C 1 *
+bit 239 O 1 SYSCLK 238 1 Z
+bit 238 C 1 *
+bit 237 O 1 BWE_2 236 1 Z
+bit 236 C 1 *
+bit 235 O 1 BWE_3 234 1 Z
+bit 234 C 1 *
+bit 233 O 1 UAE 232 1 Z
+bit 232 C 1 *
+bit 231 O 1 SWE 230 1 Z
+bit 230 C 1 *
+bit 229 O 1 ADDR_0 228 1 Z
+bit 228 C 1 *
+bit 227 O 1 ADDR_1 226 1 Z
+bit 226 C 1 *
+bit 225 O 1 ADDR_2 224 1 Z
+bit 224 C 1 *
+bit 223 O 1 ADDR_3 222 1 Z
+bit 222 C 1 *
+bit 221 O 1 ADDR_4 220 1 Z
+bit 220 C 1 *
+bit 219 O 1 ROMCE_3 218 1 Z
+bit 218 C 1 *
+bit 217 O 1 ROMCE_2 216 1 Z
+bit 216 C 1 *
+bit 215 O 1 ADDR_15 214 1 Z
+bit 214 C 1 *
+bit 213 O 1 OE 212 1 Z
+bit 212 C 1 *
+bit 211 O 1 PIO_0 210 1 Z
+bit 210 C 1 *
+bit 209 O 1 PIO_2 208 1 Z
+bit 208 C 1 *
+bit 207 O 1 ROMCE_1 206 1 Z
+bit 206 C 1 *
+bit 205 O 1 ROMCE_0 204 1 Z
+bit 204 C 1 *
+bit 203 O 1 BUSSPRT 202 1 Z
+bit 202 C 1 *
+bit 201 O 1 PIO_4 200 1 Z
+bit 200 C 1 *
+bit 199 O 1 ACK 198 1 Z
+bit 198 C 1 *
+bit 197 O 1 PIO_3 196 1 Z
+bit 196 C 1 *
+bit 195 O 1 PIO_1 194 1 Z
+bit 194 C 1 *
+bit 193 O 1 PIO_11 192 1 Z
+bit 192 C 1 *
+bit 191 O 1 PIO_10 190 1 Z
+bit 190 C 1 *
+bit 189 O 1 PIO_5 188 1 Z
+bit 188 C 1 *
+bit 187 O 1 PIO_6 186 1 Z
+bit 186 C 1 *
+bit 185 O 1 PIO_8 184 1 Z
+bit 184 C 1 *
+bit 183 O 1 PIO_9 182 1 Z
+bit 182 C 1 *
+bit 181 O 1 PIO_12 180 1 Z
+bit 180 C 1 *
+bit 179 O 1 PIO_17 178 1 Z
+bit 178 C 1 *
+bit 177 O 1 PIO_13 176 1 Z
+bit 176 C 1 *
+bit 175 O 1 PIO_7 174 1 Z
+bit 174 C 1 *
+bit 173 O 1 PIO_14 172 1 Z
+bit 172 C 1 *
+bit 171 O 1 PIO_15 170 1 Z
+bit 170 C 1 *
+bit 169 O 1 PIO_16 168 1 Z
+bit 168 C 1 *
+bit 167 O 1 BC32K 166 1 Z
+bit 166 C 1 *
+bit 165 O 1 *
+bit 164 O 1 *
+bit 163 O 1 *
+bit 162 O 1 *
+bit 161 O 1 *
+bit 160 O 1 *
+bit 159 B 1 DATA_0 158 1 Z
+bit 158 C 1 *
+bit 157 B 1 DATA_16 156 1 Z
+bit 156 C 1 *
+bit 155 B 1 DATA_1 154 1 Z
+bit 154 C 1 *
+bit 153 B 1 DATA_17 152 1 Z
+bit 152 C 1 *
+bit 151 B 1 DATA_2 150 1 Z
+bit 150 C 1 *
+bit 149 B 1 DATA_18 148 1 Z
+bit 148 C 1 *
+bit 147 B 1 DATA_3 146 1 Z
+bit 146 C 1 *
+bit 145 B 1 DATA_19 144 1 Z
+bit 144 C 1 *
+bit 143 B 1 DATA_4 142 1 Z
+bit 142 C 1 *
+bit 141 B 1 DATA_20 140 1 Z
+bit 140 C 1 *
+bit 139 B 1 DATA_5 138 1 Z
+bit 138 C 1 *
+bit 137 B 1 DATA_21 136 1 Z
+bit 136 C 1 *
+bit 135 B 1 DATA_6 134 1 Z
+bit 134 C 1 *
+bit 133 B 1 DATA_22 132 1 Z
+bit 132 C 1 *
+bit 131 B 1 DATA_23 130 1 Z
+bit 130 C 1 *
+bit 129 B 1 DATA_8 128 1 Z
+bit 128 C 1 *
+bit 127 B 1 DATA_7 126 1 Z
+bit 126 C 1 *
+bit 125 B 1 DATA_24 124 1 Z
+bit 124 C 1 *
+bit 123 B 1 DATA_9 122 1 Z
+bit 122 C 1 *
+bit 121 B 1 DATA_25 120 1 Z
+bit 120 C 1 *
+bit 119 B 1 DATA_26 118 1 Z
+bit 118 C 1 *
+bit 117 B 1 DATA_10 116 1 Z
+bit 116 C 1 *
+bit 115 B 1 DATA_27 114 1 Z
+bit 114 C 1 *
+bit 113 B 1 DATA_11 112 1 Z
+bit 112 C 1 *
+bit 111 B 1 DATA_28 110 1 Z
+bit 110 C 1 *
+bit 109 B 1 DATA_12 108 1 Z
+bit 108 C 1 *
+bit 107 B 1 DATA_29 106 1 Z
+bit 106 C 1 *
+bit 105 B 1 DATA_13 104 1 Z
+bit 104 C 1 *
+bit 103 B 1 DATA_15 102 1 Z
+bit 102 C 1 *
+bit 101 B 1 DATA_30 100 1 Z
+bit 100 C 1 *
+bit 99 B 1 DATA_14 98 1 Z
+bit 98 C 1 *
+bit 97 O 1 RP 96 1 Z
+bit 96 C 1 *
+bit 95 B 1 DATA_31 94 1 Z
+bit 94 C 1 *
+bit 93 O 1 DQM_0 92 1 Z
+bit 92 C 1 *
+bit 91 O 1 CAS 90 1 Z
+bit 90 C 1 *
+bit 89 O 1 WE 88 1 Z
+bit 88 C 1 *
+bit 87 O 1 DQM_1 86 1 Z
+bit 86 C 1 *
+bit 85 O 1 SDCS_0 84 1 Z
+bit 84 C 1 *
+bit 83 O 1 DQM_2 82 1 Z
+bit 82 C 1 *
+bit 81 O 1 DQM_3 80 1 Z
+bit 80 C 1 *
+bit 79 O 1 ADDR_5 78 1 Z
+bit 78 C 1 *
+bit 77 O 1 RAS 76 1 Z
+bit 76 C 1 *
+bit 75 O 1 SDCS_1 74 1 Z
+bit 74 C 1 *
+bit 73 O 1 ADDR_6 72 1 Z
+bit 72 C 1 *
+bit 71 O 1 ADDR_7 70 1 Z
+bit 70 C 1 *
+bit 69 O 1 ADDR_8 68 1 Z
+bit 68 C 1 *
+bit 67 O 1 ADDR_9 66 1 Z
+bit 66 C 1 *
+bit 65 O 1 ADDR_10 64 1 Z
+bit 64 C 1 *
+bit 63 O 1 ADDR_11 62 1 Z
+bit 62 C 1 *
+bit 61 O 1 ADDR_12 60 1 Z
+bit 60 C 1 *
+bit 59 O 1 ADDR_13 58 1 Z
+bit 58 C 1 *
+bit 57 O 1 ADDR_14 56 1 Z
+bit 56 C 1 *
+bit 55 O 1 DA10 54 1 Z
+bit 54 C 1 *
+bit 53 O 1 ADDR_16 52 1 Z
+bit 52 C 1 *
+bit 51 O 1 ADDR_19 50 1 Z
+bit 50 C 1 *
+bit 49 O 1 ADDR_18 48 1 Z
+bit 48 C 1 *
+bit 47 O 1 ADDR_17 46 1 Z
+bit 46 C 1 *
+bit 45 O 1 CKE 44 1 Z
+bit 44 C 1 *
+bit 43 O 1 SDCS_2 42 1 Z
+bit 42 C 1 *
+bit 41 O 1 *
+bit 40 O 1 *
+bit 39 O 1 SDCS_3 38 1 Z
+bit 38 C 1 *
+bit 37 O 1 SDCLK_0 36 1 Z
+bit 36 C 1 *
+bit 35 O 1 SDCLK_1 34 1 Z
+bit 34 C 1 *
+bit 33 O 1 *
+bit 32 O 1 *
+bit 31 O 1 SDCLKIN 30 1 Z
+bit 30 C 1 *
+bit 29 O 1 PIO_20 28 1 Z
+bit 28 C 1 *
+bit 27 O 1 *
+bit 26 O 1 *
+bit 25 O 1 PIO_19 24 1 Z
+bit 24 C 1 *
+bit 23 O 1 PIO_18 22 1 Z
+bit 22 C 1 *
+bit 21 O 1 PIO_23 20 1 Z
+bit 20 C 1 *
+bit 19 O 1 PIO_22 18 1 Z
+bit 18 C 1 *
+bit 17 O 1 PIO_21 16 1 Z
+bit 16 C 1 *
+bit 15 O 1 PIO_27 14 1 Z
+bit 14 C 1 *
+bit 13 O 1 PIO_29 12 1 Z
+bit 12 C 1 *
+bit 11 O 1 PIO_28 10 1 Z
+bit 10 C 1 *
+bit 9 O 1 PIO_30 8 1 Z
+bit 8 C 1 *
+bit 7 O 1 PIO_24 6 1 Z
+bit 6 C 1 *
+bit 5 O 1 PIO_31 4 1 Z
+bit 4 C 1 *
+bit 3 O 1 PIO_25 2 1 Z
+bit 2 C 1 *
+bit 1 O 1 PIO_26 0 1 Z
+bit 0 C 1 *
--- /dev/null
+#
+# $Id$
+#
+# Copyright (C) 2003 RightHand Technologies, Inc.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Andrew Dyer <adyer@righthandtech.com>, 2003.
+#
+
+# bits 31-28 of the Device Identification Register
+0000 tx4926 0
--- /dev/null
+#
+# $Id$
+#
+# JTAG declarations for Toshiba TX4926
+# Copyright (C) 2004 RightHand Technologies, Inc.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Andrew Dyer <adyer@righthandtech.com>, 2004.
+#
+# Documentation:
+# [1] Toshiba Corporation,
+# "64-Bit TX System RISC TX49 Family TMPR4926 Rev. 2.0"
+# [2] Toshiba Corporation, "BSDL file for TMPR4925"
+#
+signal VDDC0
+signal VDDC1
+signal VDDC2
+signal VDDC3
+signal VDDC4
+signal VDDC5
+signal VDDC6
+signal VDDC7
+signal VDDC8
+signal VDDC9
+signal VDDC10
+signal VDDC11
+signal VDDC12
+signal VDDC13
+signal VDDC14
+signal VDDC15
+signal VDDC16
+signal VDDC17
+signal VDDS0
+signal VDDS1
+signal VDDS2
+signal VDDS3
+signal VDDS4
+signal VDDS5
+signal VDDS6
+signal VDDS7
+signal VDDS8
+signal VDDS9
+signal VDDS10
+signal VDDS11
+signal VDDS12
+signal VDDS13
+signal VDDS14
+signal VDDS15
+signal VDDS16
+signal VDDS17
+signal VDDS18
+signal VDDS19
+signal VDDS20
+signal VSS0
+signal VSS1
+signal VSS2
+signal VSS3
+signal VSS4
+signal VSS5
+signal VSS6
+signal VSS7
+signal VSS8
+signal VSS9
+signal VSS10
+signal VSS11
+signal VSS12
+signal VSS13
+signal VSS14
+signal VSS15
+signal VSS16
+signal VSS17
+signal VSS18
+signal VSS19
+signal VSS20
+signal VSS21
+signal VSS22
+signal VSS23
+signal VSS24
+signal VSS25
+signal VSS26
+signal VSS27
+signal VSS28
+signal VSS29
+signal COLDRESET
+signal PON
+signal MSTRCLK
+signal TEST
+signal PLLVDD
+signal PLLVSS
+signal NMI
+signal SCANENB
+signal C32KIN
+signal SYSCLK
+signal BWE_3
+signal BWE_2
+signal BWE_1
+signal BWE_0
+signal SDCLK_1
+signal SDCLK_0
+signal SDCLKIN
+signal GNT_3
+signal GNT_2
+signal GNT_1
+signal GNT_0
+signal REQ_3
+signal REQ_2
+signal REQ_1
+signal REQ_0
+signal PERR
+signal SERR
+signal PCIAD_31
+signal PCIAD_30
+signal PCIAD_29
+signal PCIAD_28
+signal PCIAD_27
+signal PCIAD_26
+signal PCIAD_25
+signal PCIAD_24
+signal PCIAD_23
+signal PCIAD_22
+signal PCIAD_21
+signal PCIAD_20
+signal PCIAD_19
+signal PCIAD_18
+signal PCIAD_17
+signal PCIAD_16
+signal PCIAD_15
+signal PCIAD_14
+signal PCIAD_13
+signal PCIAD_12
+signal PCIAD_11
+signal PCIAD_10
+signal PCIAD_9
+signal PCIAD_8
+signal PCIAD_7
+signal PCIAD_6
+signal PCIAD_5
+signal PCIAD_4
+signal PCIAD_3
+signal PCIAD_2
+signal PCIAD_1
+signal PCIAD_0
+signal C_BE_3
+signal C_BE_2
+signal C_BE_1
+signal C_BE_0
+signal PAR
+signal FRAME
+signal TRDY
+signal IRDY
+signal IDSEL
+signal STOP
+signal DEVSEL
+signal PCICLK_2
+signal PCICLK_1
+signal PCICLKIO
+signal TDI
+signal TMS
+signal TCK
+signal TRST
+signal BC32K
+signal DATA_31
+signal DATA_30
+signal DATA_29
+signal DATA_28
+signal DATA_27
+signal DATA_26
+signal DATA_25
+signal DATA_24
+signal DATA_23
+signal DATA_22
+signal DATA_21
+signal DATA_20
+signal DATA_19
+signal DATA_18
+signal DATA_17
+signal DATA_16
+signal DATA_15
+signal DATA_14
+signal DATA_13
+signal DATA_12
+signal DATA_11
+signal DATA_10
+signal DATA_9
+signal DATA_8
+signal DATA_7
+signal DATA_6
+signal DATA_5
+signal DATA_4
+signal DATA_3
+signal DATA_2
+signal DATA_1
+signal DATA_0
+signal ADDR_19
+signal ADDR_18
+signal ADDR_17
+signal ADDR_16
+signal ADDR_15
+signal ADDR_14
+signal ADDR_13
+signal ADDR_12
+signal ADDR_11
+signal ADDR_10
+signal ADDR_9
+signal ADDR_8
+signal ADDR_7
+signal ADDR_6
+signal ADDR_5
+signal ADDR_4
+signal ADDR_3
+signal ADDR_2
+signal ADDR_1
+signal ADDR_0
+signal ACK
+signal ROMCE_3
+signal ROMCE_2
+signal ROMCE_1
+signal ROMCE_0
+signal PIO_31
+signal PIO_30
+signal PIO_29
+signal PIO_28
+signal PIO_27
+signal PIO_26
+signal PIO_25
+signal PIO_24
+signal PIO_23
+signal PIO_22
+signal PIO_21
+signal PIO_20
+signal PIO_19
+signal PIO_18
+signal PIO_17
+signal PIO_16
+signal PIO_15
+signal PIO_14
+signal PIO_13
+signal PIO_12
+signal PIO_11
+signal PIO_10
+signal PIO_9
+signal PIO_8
+signal PIO_7
+signal PIO_6
+signal PIO_5
+signal PIO_4
+signal PIO_3
+signal PIO_2
+signal PIO_1
+signal PIO_0
+signal BUSSPRT
+signal UAE
+signal SWE
+signal OE
+signal SDCS_3
+signal SDCS_2
+signal SDCS_1
+signal SDCS_0
+signal RAS
+signal CAS
+signal DQM_3
+signal DQM_2
+signal DQM_1
+signal DQM_0
+signal WE
+signal CKE
+signal DA10
+signal RP
+signal C32KOUT
+
+register BSR 356
+register BR 1
+register DIR 32
+register EJIMPCODE 32
+register EJADDRESS 36
+register EJDATA 64
+register EJCONTROL 32
+register EJALL 132
+
+instruction length 8
+
+instruction BYPASS 11111111 BR
+instruction SAMPLE/PRELOAD 00000001 BSR
+instruction EXTEST 00000000 BSR
+instruction IDCODE 00000011 DIR
+instruction EJTAG_IMPCODE 10000011 EJIMPCODE
+instruction EJTAG_ADDRESS 10001000 EJADDRESS
+instruction EJTAG_DATA 10001001 EJDATA
+instruction EJTAG_CONTROL 10001010 EJCONTROL
+instruction EJATG_ALL 10001011 EJALL
+# instruction PCTRACE 10010000 # docs are unclear about what this does
+
+bit 355 O 1 GNT_0 354 1 Z
+bit 354 C 1 *
+bit 353 O 0 PCICLKIO 352 1 Z
+bit 352 C 1 *
+bit 351 O 0 PCICLK_1 350 1 Z
+bit 350 C 1 *
+bit 349 O 0 PCICLK_2 348 1 Z
+bit 348 C 1 *
+bit 347 O 1 REQ_0 346 1 Z
+bit 346 C 1 *
+bit 345 O 1 GNT_1 344 1 Z
+bit 344 C 1 *
+bit 343 O 1 REQ_1 342 1 Z
+bit 342 C 1 *
+bit 341 O 1 GNT_2 340 1 Z
+bit 340 C 1 *
+bit 339 O 1 REQ_2 338 1 Z
+bit 338 C 1 *
+bit 337 O 1 GNT_3 336 1 Z
+bit 336 C 1 *
+bit 335 O 1 REQ_3 334 1 Z
+bit 334 C 1 *
+bit 333 O 1 PCIAD_31 332 1 Z
+bit 332 C 1 *
+bit 331 O 1 PCIAD_30 330 1 Z
+bit 330 C 1 *
+bit 329 O 1 PCIAD_29 328 1 Z
+bit 328 C 1 *
+bit 327 O 1 PCIAD_28 326 1 Z
+bit 326 C 1 *
+bit 325 O 1 PCIAD_27 324 1 Z
+bit 324 C 1 *
+bit 323 O 1 PCIAD_26 322 1 Z
+bit 322 C 1 *
+bit 321 O 1 PCIAD_25 320 1 Z
+bit 320 C 1 *
+bit 319 O 1 PCIAD_24 318 1 Z
+bit 318 C 1 *
+bit 317 O 1 C_BE_3 316 1 Z
+bit 316 C 1 *
+bit 315 O 1 IDSEL 314 1 Z
+bit 314 C 1 *
+bit 313 O 1 PCIAD_23 312 1 Z
+bit 312 C 1 *
+bit 311 O 1 PCIAD_22 310 1 Z
+bit 310 C 1 *
+bit 309 O 1 PCIAD_21 308 1 Z
+bit 308 C 1 *
+bit 307 O 1 PCIAD_20 306 1 Z
+bit 306 C 1 *
+bit 305 O 1 PCIAD_19 304 1 Z
+bit 304 C 1 *
+bit 303 O 1 PCIAD_17 302 1 Z
+bit 302 C 1 *
+bit 301 O 1 PCIAD_18 300 1 Z
+bit 300 C 1 *
+bit 299 O 1 FRAME 298 1 Z
+bit 298 C 1 *
+bit 297 O 1 C_BE_2 296 1 Z
+bit 296 C 1 *
+bit 295 O 1 PCIAD_16 294 1 Z
+bit 294 C 1 *
+bit 293 O 1 STOP 292 1 Z
+bit 292 C 1 *
+bit 291 O 1 DEVSEL 290 1 Z
+bit 290 C 1 *
+bit 289 O 1 TRDY 288 1 Z
+bit 288 C 1 *
+bit 287 O 1 IRDY 286 1 Z
+bit 286 C 1 *
+bit 285 O 1 SERR 284 1 Z
+bit 284 C 1 *
+bit 283 O 1 PERR 282 1 Z
+bit 282 C 1 *
+bit 281 O 1 PCIAD_15 280 1 Z
+bit 280 C 1 *
+bit 279 O 1 C_BE_1 278 1 Z
+bit 278 C 1 *
+bit 277 O 1 PAR 276 1 Z
+bit 276 C 1 *
+bit 275 O 1 PCIAD_12 274 1 Z
+bit 274 C 1 *
+bit 273 O 1 PCIAD_13 272 1 Z
+bit 272 C 1 *
+bit 271 O 1 PCIAD_14 270 1 Z
+bit 270 C 1 *
+bit 269 O 1 PCIAD_9 268 1 Z
+bit 268 C 1 *
+bit 267 O 1 PCIAD_10 266 1 Z
+bit 266 C 1 *
+bit 265 O 1 PCIAD_11 264 1 Z
+bit 264 C 1 *
+bit 263 O 1 C_BE_0 262 1 Z
+bit 262 C 1 *
+bit 261 O 1 PCIAD_8 260 1 Z
+bit 260 C 1 *
+bit 259 O 1 PCIAD_4 258 1 Z
+bit 258 C 1 *
+bit 257 O 1 PCIAD_0 256 1 Z
+bit 256 C 1 *
+bit 255 O 1 PCIAD_5 254 1 Z
+bit 254 C 1 *
+bit 253 O 1 PCIAD_1 252 1 Z
+bit 252 C 1 *
+bit 251 O 1 PCIAD_6 250 1 Z
+bit 250 C 1 *
+bit 249 O 1 PCIAD_2 248 1 Z
+bit 248 C 1 *
+bit 247 O 1 PCIAD_7 246 1 Z
+bit 246 C 1 *
+bit 245 O 1 PCIAD_3 244 1 Z
+bit 244 C 1 *
+bit 243 O 1 BWE_0 242 1 Z
+bit 242 C 1 *
+bit 241 O 1 BWE_1 240 1 Z
+bit 240 C 1 *
+bit 239 O 1 SYSCLK 238 1 Z
+bit 238 C 1 *
+bit 237 O 1 BWE_2 236 1 Z
+bit 236 C 1 *
+bit 235 O 1 BWE_3 234 1 Z
+bit 234 C 1 *
+bit 233 O 1 UAE 232 1 Z
+bit 232 C 1 *
+bit 231 O 1 SWE 230 1 Z
+bit 230 C 1 *
+bit 229 O 1 ADDR_0 228 1 Z
+bit 228 C 1 *
+bit 227 O 1 ADDR_1 226 1 Z
+bit 226 C 1 *
+bit 225 O 1 ADDR_2 224 1 Z
+bit 224 C 1 *
+bit 223 O 1 ADDR_3 222 1 Z
+bit 222 C 1 *
+bit 221 O 1 ADDR_4 220 1 Z
+bit 220 C 1 *
+bit 219 O 1 ROMCE_3 218 1 Z
+bit 218 C 1 *
+bit 217 O 1 ROMCE_2 216 1 Z
+bit 216 C 1 *
+bit 215 O 1 ADDR_15 214 1 Z
+bit 214 C 1 *
+bit 213 O 1 OE 212 1 Z
+bit 212 C 1 *
+bit 211 O 1 PIO_0 210 1 Z
+bit 210 C 1 *
+bit 209 O 1 PIO_2 208 1 Z
+bit 208 C 1 *
+bit 207 O 1 ROMCE_1 206 1 Z
+bit 206 C 1 *
+bit 205 O 1 ROMCE_0 204 1 Z
+bit 204 C 1 *
+bit 203 O 1 BUSSPRT 202 1 Z
+bit 202 C 1 *
+bit 201 O 1 PIO_4 200 1 Z
+bit 200 C 1 *
+bit 199 O 1 ACK 198 1 Z
+bit 198 C 1 *
+bit 197 O 1 PIO_3 196 1 Z
+bit 196 C 1 *
+bit 195 O 1 PIO_1 194 1 Z
+bit 194 C 1 *
+bit 193 O 1 PIO_11 192 1 Z
+bit 192 C 1 *
+bit 191 O 1 PIO_10 190 1 Z
+bit 190 C 1 *
+bit 189 O 1 PIO_5 188 1 Z
+bit 188 C 1 *
+bit 187 O 1 PIO_6 186 1 Z
+bit 186 C 1 *
+bit 185 O 1 PIO_8 184 1 Z
+bit 184 C 1 *
+bit 183 O 1 PIO_9 182 1 Z
+bit 182 C 1 *
+bit 181 O 1 PIO_12 180 1 Z
+bit 180 C 1 *
+bit 179 O 1 PIO_17 178 1 Z
+bit 178 C 1 *
+bit 177 O 1 PIO_13 176 1 Z
+bit 176 C 1 *
+bit 175 O 1 PIO_7 174 1 Z
+bit 174 C 1 *
+bit 173 O 1 PIO_14 172 1 Z
+bit 172 C 1 *
+bit 171 O 1 PIO_15 170 1 Z
+bit 170 C 1 *
+bit 169 O 1 PIO_16 168 1 Z
+bit 168 C 1 *
+bit 167 O 1 BC32K 166 1 Z
+bit 166 C 1 *
+bit 165 O 1 *
+bit 164 O 1 *
+bit 163 O 1 *
+bit 162 O 1 *
+bit 161 O 1 *
+bit 160 O 1 *
+bit 159 B 1 DATA_0 158 1 Z
+bit 158 C 1 *
+bit 157 B 1 DATA_16 156 1 Z
+bit 156 C 1 *
+bit 155 B 1 DATA_1 154 1 Z
+bit 154 C 1 *
+bit 153 B 1 DATA_17 152 1 Z
+bit 152 C 1 *
+bit 151 B 1 DATA_2 150 1 Z
+bit 150 C 1 *
+bit 149 B 1 DATA_18 148 1 Z
+bit 148 C 1 *
+bit 147 B 1 DATA_3 146 1 Z
+bit 146 C 1 *
+bit 145 B 1 DATA_19 144 1 Z
+bit 144 C 1 *
+bit 143 B 1 DATA_4 142 1 Z
+bit 142 C 1 *
+bit 141 B 1 DATA_20 140 1 Z
+bit 140 C 1 *
+bit 139 B 1 DATA_5 138 1 Z
+bit 138 C 1 *
+bit 137 B 1 DATA_21 136 1 Z
+bit 136 C 1 *
+bit 135 B 1 DATA_6 134 1 Z
+bit 134 C 1 *
+bit 133 B 1 DATA_22 132 1 Z
+bit 132 C 1 *
+bit 131 B 1 DATA_23 130 1 Z
+bit 130 C 1 *
+bit 129 B 1 DATA_8 128 1 Z
+bit 128 C 1 *
+bit 127 B 1 DATA_7 126 1 Z
+bit 126 C 1 *
+bit 125 B 1 DATA_24 124 1 Z
+bit 124 C 1 *
+bit 123 B 1 DATA_9 122 1 Z
+bit 122 C 1 *
+bit 121 B 1 DATA_25 120 1 Z
+bit 120 C 1 *
+bit 119 B 1 DATA_26 118 1 Z
+bit 118 C 1 *
+bit 117 B 1 DATA_10 116 1 Z
+bit 116 C 1 *
+bit 115 B 1 DATA_27 114 1 Z
+bit 114 C 1 *
+bit 113 B 1 DATA_11 112 1 Z
+bit 112 C 1 *
+bit 111 B 1 DATA_28 110 1 Z
+bit 110 C 1 *
+bit 109 B 1 DATA_12 108 1 Z
+bit 108 C 1 *
+bit 107 B 1 DATA_29 106 1 Z
+bit 106 C 1 *
+bit 105 B 1 DATA_13 104 1 Z
+bit 104 C 1 *
+bit 103 B 1 DATA_15 102 1 Z
+bit 102 C 1 *
+bit 101 B 1 DATA_30 100 1 Z
+bit 100 C 1 *
+bit 99 B 1 DATA_14 98 1 Z
+bit 98 C 1 *
+bit 97 O 1 RP 96 1 Z
+bit 96 C 1 *
+bit 95 B 1 DATA_31 94 1 Z
+bit 94 C 1 *
+bit 93 O 1 DQM_0 92 1 Z
+bit 92 C 1 *
+bit 91 O 1 CAS 90 1 Z
+bit 90 C 1 *
+bit 89 O 1 WE 88 1 Z
+bit 88 C 1 *
+bit 87 O 1 DQM_1 86 1 Z
+bit 86 C 1 *
+bit 85 O 1 SDCS_0 84 1 Z
+bit 84 C 1 *
+bit 83 O 1 DQM_2 82 1 Z
+bit 82 C 1 *
+bit 81 O 1 DQM_3 80 1 Z
+bit 80 C 1 *
+bit 79 O 1 ADDR_5 78 1 Z
+bit 78 C 1 *
+bit 77 O 1 RAS 76 1 Z
+bit 76 C 1 *
+bit 75 O 1 SDCS_1 74 1 Z
+bit 74 C 1 *
+bit 73 O 1 ADDR_6 72 1 Z
+bit 72 C 1 *
+bit 71 O 1 ADDR_7 70 1 Z
+bit 70 C 1 *
+bit 69 O 1 ADDR_8 68 1 Z
+bit 68 C 1 *
+bit 67 O 1 ADDR_9 66 1 Z
+bit 66 C 1 *
+bit 65 O 1 ADDR_10 64 1 Z
+bit 64 C 1 *
+bit 63 O 1 ADDR_11 62 1 Z
+bit 62 C 1 *
+bit 61 O 1 ADDR_12 60 1 Z
+bit 60 C 1 *
+bit 59 O 1 ADDR_13 58 1 Z
+bit 58 C 1 *
+bit 57 O 1 ADDR_14 56 1 Z
+bit 56 C 1 *
+bit 55 O 1 DA10 54 1 Z
+bit 54 C 1 *
+bit 53 O 1 ADDR_16 52 1 Z
+bit 52 C 1 *
+bit 51 O 1 ADDR_19 50 1 Z
+bit 50 C 1 *
+bit 49 O 1 ADDR_18 48 1 Z
+bit 48 C 1 *
+bit 47 O 1 ADDR_17 46 1 Z
+bit 46 C 1 *
+bit 45 O 1 CKE 44 1 Z
+bit 44 C 1 *
+bit 43 O 1 SDCS_2 42 1 Z
+bit 42 C 1 *
+bit 41 O 1 *
+bit 40 O 1 *
+bit 39 O 1 SDCS_3 38 1 Z
+bit 38 C 1 *
+bit 37 O 1 SDCLK_0 36 1 Z
+bit 36 C 1 *
+bit 35 O 1 SDCLK_1 34 1 Z
+bit 34 C 1 *
+bit 33 O 1 *
+bit 32 O 1 *
+bit 31 O 1 SDCLKIN 30 1 Z
+bit 30 C 1 *
+bit 29 O 1 PIO_20 28 1 Z
+bit 28 C 1 *
+bit 27 O 1 *
+bit 26 O 1 *
+bit 25 O 1 PIO_19 24 1 Z
+bit 24 C 1 *
+bit 23 O 1 PIO_18 22 1 Z
+bit 22 C 1 *
+bit 21 O 1 PIO_23 20 1 Z
+bit 20 C 1 *
+bit 19 O 1 PIO_22 18 1 Z
+bit 18 C 1 *
+bit 17 O 1 PIO_21 16 1 Z
+bit 16 C 1 *
+bit 15 O 1 PIO_27 14 1 Z
+bit 14 C 1 *
+bit 13 O 1 PIO_29 12 1 Z
+bit 12 C 1 *
+bit 11 O 1 PIO_28 10 1 Z
+bit 10 C 1 *
+bit 9 O 1 PIO_30 8 1 Z
+bit 8 C 1 *
+bit 7 O 1 PIO_24 6 1 Z
+bit 6 C 1 *
+bit 5 O 1 PIO_31 4 1 Z
+bit 4 C 1 *
+bit 3 O 1 PIO_25 2 1 Z
+bit 2 C 1 *
+bit 1 O 1 PIO_26 0 1 Z
+bit 0 C 1 *
--- /dev/null
+#
+# $Id$
+#
+# Copyright (C) 2002 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Marcel Telka <marcel@telka.sk>, 2002.
+#
+
+# bits 27-12 of the Device Identification Register
+0100100000001110 xcr3032xl-vq44 XCR3032XL-VQ44
+0100100010001001 xcr3128xl-vq100 XCR3128XL-VQ100
+0100100010001011 . XCR3128XL-TQ144
+0100100010001100 xcr3128xl-cs144 XCR3128XL-CS144
+0100100101001110 xcr3256xl-ft256 XCR3256XL-FT256
+0110110101001010 xc2c256-vq100 XC2C256-VQ100
+0110110101001100 xc2c256-tq144 XC2C256-TQ144
+0110111001011110 xc2c64a-vq44 XC2C64-VQ44
+0000101000100000 xc2s300e XC2S300E
+0001010000001101 xc3s50 xc3s50
+0001010000010100 xc3s200 xc3s200
+0001010000011100 xc3s400 xc3s400
+0001010000101000 xc3s1000 xc3s1000
+0001010000110100 xc3s1500 xc3s1500
+0001010001000000 xc3s2000 xc3s2000
+0001010001001000 xc3s4000 xc3s4000
+0001010001010000 xc3s5000 xc3s5000
+0001110000010000 xc3s100e_die xc3s100e_die
+0001110000100010 xc3s500e_fg320 xc3s500e_fg320
+0001110000101110 xc3s1200e_fg320 xc3s1200e_fg320
+0101000001000100 xcf01s xcf01s
+0101000001000101 xcf02s xcf02s
+0101000001000110 xcf04s xcf04s
+0101000001010111 xcf08p xcf08p
+0101000001011000 xcf16p xcf16p
+0101000001011001 xcf32p xcf32p
+0001011001011000 xc4vlx15 xc4vlx15
+0001011001111100 xc4vlx25 xc4vlx25
+0001011010100100 xc4vlx40 xc4vlx40
+0001011010110100 xc4vlx60 xc4vlx60
+0001011011011000 xc4vlx80 xc4vlx80
+0001011100000000 xc4vlx100 xc4vlx100
+0001011100011000 xc4vlx160 xc4vlx160
+0001011100110100 xc4vlx200 xc4vlx200
+0001111001011000 xc4vfx12 xc4vfx12
+0001111001100100 xc4vfx20 xc4vfx20
+0001111010110100 xc4vfx60 xc4vfx60
+0010000001101000 xc4vsx25 xc4vsx25
+0010000010001000 xc4vsx35 xc4vsx35
+0010000010110000 xc4vsx55 xc4vsx55
+0000101000011100 xc2s200e-pq208 XC2S200E-PQ208
+0001001001111110 xc2vp30-ffg896 XC2VP30-FFG896
+1001011000000100 xc9572xl_vq44 XC9572XL_VQ44
+0101000000100110 xc18v04pc44 XC18V04_PC44
+0001000000010000 xc2v80-fg256 XC2V80-FG256
+0001000000011000 xc2v250-fg256 XC2V250-FG256
+0001000000101000 xc2v1000-fg256 XC2V1000-FG256
--- /dev/null
+#
+# $Id: STEPPINGS,v 1.1 2003/02/14 11:14:56 telka Exp $
+#
+# Copyright (C) 2003 Tower Technologies s.r.l.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Alessandro Zummo <azummo@towertech.it>, 2003.
+# DJF:w
+
+# bits 31-28 of the Device Identification Register
+0000 xc18v04pc44 0
--- /dev/null
+signal TDI 9
+signal TMS 11
+signal Gnd_2 12
+signal TCK 13
+signal Vcco_1 14
+signal D4 15
+signal CF 16
+signal Reset_OE 19
+signal D6 31
+signal CE 21
+signal Vcco_2 22
+signal Vcc_1 23
+signal Gnd_3 24
+signal D7 25
+signal CEO 27
+signal D5 31
+signal Vcco_3 32
+signal D3 33
+signal Gnd_4 34
+signal D1 35
+signal TDO 37
+signal Vpp
+signal Vcco_4 42
+signal Vcc_2 41
+signal D0 2
+signal Gnd_1 3
+signal D2 4
+signal CLK 5
+
+register BSR 25
+register BR 1
+register DIR 32
+
+instruction length 8
+
+instruction BYPASS 11111111 BR
+instruction SAMPLE/PRELOAD 00000001 BSR
+instruction EXTEST 00000000 BSR
+instruction IDCODE 11111110 DIR
+
+bit 24 O 1 D4 23 0 Z
+bit 23 C 0 *
+bit 22 O 1 CF 21 0 Z
+bit 21 C 0 *
+bit 20 I 1 Reset_OE
+bit 19 O 1 Reset_OE 18 0 Z
+bit 18 C 0 *
+bit 17 O 1 D6 16 0 Z
+bit 16 C 0 *
+bit 15 I 1 CE
+bit 14 O 1 D7 13 0 Z
+bit 13 C 0 *
+bit 12 O 1 CEO 11 0 Z
+bit 11 C 0 *
+bit 10 O 1 D5 9 0 Z
+bit 9 C 0 *
+bit 8 O 1 D3 7 0 Z
+bit 7 C 0 *
+bit 6 O 1 D1 5 0 Z
+bit 5 C 0 *
+bit 4 O 1 D0 3 0 Z
+bit 3 C 0 *
+bit 2 O 1 D2 1 0 Z
+bit 1 C 0 *
+bit 0 I 1 CLK
--- /dev/null
+#
+# $Id$
+#
+# Copyright (C) 2003 Tower Technologies s.r.l.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Alessandro Zummo <azummo@towertech.it>, 2003.
+#
+
+# bits 31-28 of the Device Identification Register
+0000 xc2c256-tq144 0
--- /dev/null
+#
+# $Id$
+#
+# JTAG declarations for XC2C256-TQ144
+# Copyright (C) 2003 Tower Technologies s.r.l.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Alessandro Zummo <azummo@towertech.it>, 2003.
+#
+# Documentation:
+# [1] Xilinx Inc., "CoolRunner-II CPLD Family Advance Product Specification",
+# DS090 (v1.3) September 24, 2002
+# [2] Xilinx Inc., "BSDL file for device XC2C256, package TQ144
+# Revision: 1.5", 2002-10-08
+# [3] Xilinx Inc., "XC2C256 CoolRunner-II CPLD Advance Product Specification",
+# DS094 (v1.2) November 20, 2002
+
+# see [2]
+
+signal tdi 63
+signal tck 67
+signal tms 65
+signal tdo 122
+signal IO_2 143
+signal IO_3 142
+signal IO_5 140
+signal IO_6 139
+signal IO_7 138
+signal IO_8 137
+signal IO_11 2
+signal IO_13 3
+signal IO_14 4
+signal IO_15 5
+signal IO_17 6
+signal IO_18 7
+signal IO_19 9
+signal IO_20 10
+signal IO_22 136
+signal IO_23 135
+signal IO_24 134
+signal IO_26 133
+signal IO_30 132
+signal IO_32 131
+signal IO_33 11
+signal IO_34 12
+signal IO_35 13
+signal IO_36 14
+signal IO_37 15
+signal IO_38 16
+signal IO_39 17
+signal IO_41 18
+signal IO_45 33
+signal IO_47 32
+signal IO_48 31
+signal IO_49 30
+signal IO_52 28
+signal IO_55 34
+signal IO_56 35
+signal IO_58 38
+signal IO_61 39
+signal IO_62 40
+signal IO_63 41
+signal IO_64 42
+signal IO_65 43
+signal IO_70 26
+signal IO_71 25
+signal IO_72 24
+signal IO_73 23
+signal IO_74 22
+signal IO_75 21
+signal IO_76 20
+signal IO_77 19
+signal IO_78 44
+signal IO_79 45
+signal IO_80 46
+signal IO_82 48
+signal IO_83 49
+signal IO_84 50
+signal IO_85 51
+signal IO_86 52
+signal IO_90 112
+signal IO_91 113
+signal IO_93 114
+signal IO_95 115
+signal IO_97 116
+signal IO_98 117
+signal IO_99 118
+signal IO_100 119
+signal IO_102 111
+signal IO_103 110
+signal IO_104 107
+signal IO_105 106
+signal IO_106 105
+signal IO_107 104
+signal IO_109 103
+signal IO_111 102
+signal IO_113 101
+signal IO_118 120
+signal IO_119 121
+signal IO_120 124
+signal IO_121 125
+signal IO_122 126
+signal IO_123 128
+signal IO_124 129
+signal IO_125 130
+signal IO_127 100
+signal IO_132 98
+signal IO_133 97
+signal IO_134 96
+signal IO_135 95
+signal IO_136 94
+signal IO_138 75
+signal IO_139 76
+signal IO_140 77
+signal IO_142 78
+signal IO_143 79
+signal IO_144 80
+signal IO_145 81
+signal IO_146 82
+signal IO_149 74
+signal IO_150 71
+signal IO_151 70
+signal IO_152 69
+signal IO_154 68
+signal IO_156 66
+signal IO_157 64
+signal IO_159 61
+signal IO_161 83
+signal IO_166 85
+signal IO_167 86
+signal IO_168 87
+signal IO_169 88
+signal IO_170 91
+signal IO_171 92
+signal IO_176 60
+signal IO_177 59
+signal IO_178 58
+signal IO_179 57
+signal IO_180 56
+signal IO_182 54
+signal IO_183 53
+
+# mandatory data registers
+register BSR 552 # see [2]
+register BR 1
+
+# optional data registers
+register DIR 32
+
+# user-defined registers
+register ISPSR 274 # ISP (In-System Programming) Shift Register, see [2]
+
+
+# instructions - see [2]
+instruction length 8
+
+# mandatory instructions - see [2]
+instruction EXTEST 00000000 BSR
+instruction SAMPLE/PRELOAD 00000011 BSR
+instruction BYPASS 11111111 BR
+instruction INTEST 00000010 BSR
+instruction IDCODE 00000001 DIR
+instruction USERCODE 11111101 DIR
+instruction HIGHZ 11111100 BR
+instruction CLAMP 11111010 BR
+
+# user-defined instructions - see [2]
+instruction ISC_ENABLE_CLAMP 11101001 BR
+instruction ISC_ENABLEOTF 11100100 ISPSR
+instruction ISC_ENABLE 11101000 ISPSR
+instruction ISC_SRAM_READ 11100111 ISPSR
+instruction ISC_SRAM_WRITE 11100110 ISPSR
+instruction ISC_ERASE 11101101 ISPSR
+instruction ISC_PROGRAM 11101010 ISPSR
+instruction ISC_READ 11101110 ISPSR
+instruction ISC_INIT 11110000 ISPSR
+instruction ISC_DISABLE 11000000 ISPSR
+instruction TEST_ENABLE 00010001 ISPSR
+instruction BULKPROG 00010010 ISPSR
+instruction ERASE_ALL 00010100 ISPSR
+instruction MVERIFY 00010011 ISPSR
+instruction TEST_DISABLE 00010101 ISPSR
+instruction ISC_NOOP 11100000 BR
+
+
+# see [2]
+bit 551 X ? .
+bit 550 X ? .
+bit 549 X ? .
+bit 548 X ? .
+bit 547 X ? .
+bit 546 X ? .
+bit 545 I ? IO_2
+bit 544 O ? IO_2 543 0 Z
+bit 543 C ? .
+bit 542 I ? IO_3
+bit 541 O ? IO_3 540 0 Z
+bit 540 C ? .
+bit 539 X ? .
+bit 538 X ? .
+bit 537 X ? .
+bit 536 I ? IO_5
+bit 535 O ? IO_5 534 0 Z
+bit 534 C ? .
+bit 533 I ? IO_6
+bit 532 O ? IO_6 531 0 Z
+bit 531 C ? .
+bit 530 I ? IO_7
+bit 529 O ? IO_7 528 0 Z
+bit 528 C ? .
+bit 527 I ? IO_8
+bit 526 O ? IO_8 525 0 Z
+bit 525 C ? .
+bit 524 X ? .
+bit 523 X ? .
+bit 522 X ? .
+bit 521 X ? .
+bit 520 X ? .
+bit 519 X ? .
+bit 518 I ? IO_22
+bit 517 O ? IO_22 516 0 Z
+bit 516 C ? .
+bit 515 I ? IO_23
+bit 514 O ? IO_23 513 0 Z
+bit 513 C ? .
+bit 512 I ? IO_24
+bit 511 O ? IO_24 510 0 Z
+bit 510 C ? .
+bit 509 X ? .
+bit 508 X ? .
+bit 507 X ? .
+bit 506 I ? IO_26
+bit 505 O ? IO_26 504 0 Z
+bit 504 C ? .
+bit 503 X ? .
+bit 502 X ? .
+bit 501 X ? .
+bit 500 X ? .
+bit 499 X ? .
+bit 498 X ? .
+bit 497 X ? .
+bit 496 X ? .
+bit 495 X ? .
+bit 494 I ? IO_30
+bit 493 O ? IO_30 492 0 Z
+bit 492 C ? .
+bit 491 X ? .
+bit 490 X ? .
+bit 489 X ? .
+bit 488 I ? IO_32
+bit 487 O ? IO_32 486 0 Z
+bit 486 C ? .
+bit 485 I ? IO_11
+bit 484 O ? IO_11 483 0 Z
+bit 483 C ? .
+bit 482 X ? .
+bit 481 X ? .
+bit 480 X ? .
+bit 479 I ? IO_13
+bit 478 O ? IO_13 477 0 Z
+bit 477 C ? .
+bit 476 I ? IO_14
+bit 475 O ? IO_14 474 0 Z
+bit 474 C ? .
+bit 473 I ? IO_15
+bit 472 O ? IO_15 471 0 Z
+bit 471 C ? .
+bit 470 X ? .
+bit 469 X ? .
+bit 468 X ? .
+bit 467 I ? IO_17
+bit 466 O ? IO_17 465 0 Z
+bit 465 C ? .
+bit 464 I ? IO_18
+bit 463 O ? IO_18 462 0 Z
+bit 462 C ? .
+bit 461 I ? IO_19
+bit 460 O ? IO_19 459 0 Z
+bit 459 C ? .
+bit 458 I ? IO_20
+bit 457 O ? IO_20 456 0 Z
+bit 456 C ? .
+bit 455 X ? .
+bit 454 X ? .
+bit 453 X ? .
+bit 452 I ? IO_33
+bit 451 O ? IO_33 450 0 Z
+bit 450 C ? .
+bit 449 I ? IO_34
+bit 448 O ? IO_34 447 0 Z
+bit 447 C ? .
+bit 446 I ? IO_35
+bit 445 O ? IO_35 444 0 Z
+bit 444 C ? .
+bit 443 I ? IO_36
+bit 442 O ? IO_36 441 0 Z
+bit 441 C ? .
+bit 440 I ? IO_37
+bit 439 O ? IO_37 438 0 Z
+bit 438 C ? .
+bit 437 I ? IO_38
+bit 436 O ? IO_38 435 0 Z
+bit 435 C ? .
+bit 434 I ? IO_39
+bit 433 O ? IO_39 432 0 Z
+bit 432 C ? .
+bit 431 X ? .
+bit 430 X ? .
+bit 429 X ? .
+bit 428 I ? IO_41
+bit 427 O ? IO_41 426 0 Z
+bit 426 C ? .
+bit 425 X ? .
+bit 424 X ? .
+bit 423 X ? .
+bit 422 X ? .
+bit 421 X ? .
+bit 420 X ? .
+bit 419 X ? .
+bit 418 X ? .
+bit 417 X ? .
+bit 416 I ? IO_45
+bit 415 O ? IO_45 414 0 Z
+bit 414 C ? .
+bit 413 X ? .
+bit 412 X ? .
+bit 411 X ? .
+bit 410 I ? IO_47
+bit 409 O ? IO_47 408 0 Z
+bit 408 C ? .
+bit 407 I ? IO_48
+bit 406 O ? IO_48 405 0 Z
+bit 405 C ? .
+bit 404 I ? IO_49
+bit 403 O ? IO_49 402 0 Z
+bit 402 C ? .
+bit 401 X ? .
+bit 400 X ? .
+bit 399 X ? .
+bit 398 X ? .
+bit 397 X ? .
+bit 396 X ? .
+bit 395 I ? IO_52
+bit 394 O ? IO_52 393 0 Z
+bit 393 C ? .
+bit 392 X ? .
+bit 391 X ? .
+bit 390 X ? .
+bit 389 X ? .
+bit 388 X ? .
+bit 387 X ? .
+bit 386 X ? .
+bit 385 X ? .
+bit 384 X ? .
+bit 383 X ? .
+bit 382 X ? .
+bit 381 X ? .
+bit 380 X ? .
+bit 379 X ? .
+bit 378 X ? .
+bit 377 X ? .
+bit 376 X ? .
+bit 375 X ? .
+bit 374 I ? IO_70
+bit 373 O ? IO_70 372 0 Z
+bit 372 C ? .
+bit 371 I ? IO_71
+bit 370 O ? IO_71 369 0 Z
+bit 369 C ? .
+bit 368 I ? IO_72
+bit 367 O ? IO_72 366 0 Z
+bit 366 C ? .
+bit 365 I ? IO_73
+bit 364 O ? IO_73 363 0 Z
+bit 363 C ? .
+bit 362 I ? IO_74
+bit 361 O ? IO_74 360 0 Z
+bit 360 C ? .
+bit 359 I ? IO_75
+bit 358 O ? IO_75 357 0 Z
+bit 357 C ? .
+bit 356 I ? IO_76
+bit 355 O ? IO_76 354 0 Z
+bit 354 C ? .
+bit 353 I ? IO_77
+bit 352 O ? IO_77 351 0 Z
+bit 351 C ? .
+bit 350 I ? IO_55
+bit 349 O ? IO_55 348 0 Z
+bit 348 C ? .
+bit 347 I ? IO_56
+bit 346 O ? IO_56 345 0 Z
+bit 345 C ? .
+bit 344 X ? .
+bit 343 X ? .
+bit 342 X ? .
+bit 341 I ? IO_58
+bit 340 O ? IO_58 339 0 Z
+bit 339 C ? .
+bit 338 X ? .
+bit 337 X ? .
+bit 336 X ? .
+bit 335 X ? .
+bit 334 X ? .
+bit 333 X ? .
+bit 332 I ? IO_61
+bit 331 O ? IO_61 330 0 Z
+bit 330 C ? .
+bit 329 I ? IO_62
+bit 328 O ? IO_62 327 0 Z
+bit 327 C ? .
+bit 326 I ? IO_63
+bit 325 O ? IO_63 324 0 Z
+bit 324 C ? .
+bit 323 I ? IO_64
+bit 322 O ? IO_64 321 0 Z
+bit 321 C ? .
+bit 320 I ? IO_65
+bit 319 O ? IO_65 318 0 Z
+bit 318 C ? .
+bit 317 I ? IO_78
+bit 316 O ? IO_78 315 0 Z
+bit 315 C ? .
+bit 314 I ? IO_79
+bit 313 O ? IO_79 312 0 Z
+bit 312 C ? .
+bit 311 I ? IO_80
+bit 310 O ? IO_80 309 0 Z
+bit 309 C ? .
+bit 308 X ? .
+bit 307 X ? .
+bit 306 X ? .
+bit 305 I ? IO_82
+bit 304 O ? IO_82 303 0 Z
+bit 303 C ? .
+bit 302 I ? IO_83
+bit 301 O ? IO_83 300 0 Z
+bit 300 C ? .
+bit 299 I ? IO_84
+bit 298 O ? IO_84 297 0 Z
+bit 297 C ? .
+bit 296 I ? IO_85
+bit 295 O ? IO_85 294 0 Z
+bit 294 C ? .
+bit 293 I ? IO_86
+bit 292 O ? IO_86 291 0 Z
+bit 291 C ? .
+bit 290 X ? .
+bit 289 X ? .
+bit 288 X ? .
+bit 287 X ? .
+bit 286 X ? .
+bit 285 X ? .
+bit 284 X ? .
+bit 283 X ? .
+bit 282 X ? .
+bit 281 I ? IO_90
+bit 280 O ? IO_90 279 0 Z
+bit 279 C ? .
+bit 278 I ? IO_91
+bit 277 O ? IO_91 276 0 Z
+bit 276 C ? .
+bit 275 X ? .
+bit 274 X ? .
+bit 273 X ? .
+bit 272 I ? IO_93
+bit 271 O ? IO_93 270 0 Z
+bit 270 C ? .
+bit 269 X ? .
+bit 268 X ? .
+bit 267 X ? .
+bit 266 I ? IO_95
+bit 265 O ? IO_95 264 0 Z
+bit 264 C ? .
+bit 263 X ? .
+bit 262 X ? .
+bit 261 X ? .
+bit 260 I ? IO_97
+bit 259 O ? IO_97 258 0 Z
+bit 258 C ? .
+bit 257 I ? IO_98
+bit 256 O ? IO_98 255 0 Z
+bit 255 C ? .
+bit 254 I ? IO_99
+bit 253 O ? IO_99 252 0 Z
+bit 252 C ? .
+bit 251 I ? IO_100
+bit 250 O ? IO_100 249 0 Z
+bit 249 C ? .
+bit 248 X ? .
+bit 247 X ? .
+bit 246 X ? .
+bit 245 X ? .
+bit 244 X ? .
+bit 243 X ? .
+bit 242 X ? .
+bit 241 X ? .
+bit 240 X ? .
+bit 239 X ? .
+bit 238 X ? .
+bit 237 X ? .
+bit 236 X ? .
+bit 235 X ? .
+bit 234 X ? .
+bit 233 I ? IO_118
+bit 232 O ? IO_118 231 0 Z
+bit 231 C ? .
+bit 230 I ? IO_119
+bit 229 O ? IO_119 228 0 Z
+bit 228 C ? .
+bit 227 I ? IO_120
+bit 226 O ? IO_120 225 0 Z
+bit 225 C ? .
+bit 224 I ? IO_121
+bit 223 O ? IO_121 222 0 Z
+bit 222 C ? .
+bit 221 I ? IO_122
+bit 220 O ? IO_122 219 0 Z
+bit 219 C ? .
+bit 218 I ? IO_123
+bit 217 O ? IO_123 216 0 Z
+bit 216 C ? .
+bit 215 I ? IO_124
+bit 214 O ? IO_124 213 0 Z
+bit 213 C ? .
+bit 212 I ? IO_125
+bit 211 O ? IO_125 210 0 Z
+bit 210 C ? .
+bit 209 I ? IO_102
+bit 208 O ? IO_102 207 0 Z
+bit 207 C ? .
+bit 206 I ? IO_103
+bit 205 O ? IO_103 204 0 Z
+bit 204 C ? .
+bit 203 I ? IO_104
+bit 202 O ? IO_104 201 0 Z
+bit 201 C ? .
+bit 200 I ? IO_105
+bit 199 O ? IO_105 198 0 Z
+bit 198 C ? .
+bit 197 I ? IO_106
+bit 196 O ? IO_106 195 0 Z
+bit 195 C ? .
+bit 194 I ? IO_107
+bit 193 O ? IO_107 192 0 Z
+bit 192 C ? .
+bit 191 X ? .
+bit 190 X ? .
+bit 189 X ? .
+bit 188 I ? IO_109
+bit 187 O ? IO_109 186 0 Z
+bit 186 C ? .
+bit 185 X ? .
+bit 184 X ? .
+bit 183 X ? .
+bit 182 I ? IO_111
+bit 181 O ? IO_111 180 0 Z
+bit 180 C ? .
+bit 179 X ? .
+bit 178 X ? .
+bit 177 X ? .
+bit 176 I ? IO_113
+bit 175 O ? IO_113 174 0 Z
+bit 174 C ? .
+bit 173 X ? .
+bit 172 X ? .
+bit 171 X ? .
+bit 170 I ? IO_127
+bit 169 O ? IO_127 168 0 Z
+bit 168 C ? .
+bit 167 X ? .
+bit 166 X ? .
+bit 165 X ? .
+bit 164 X ? .
+bit 163 X ? .
+bit 162 X ? .
+bit 161 X ? .
+bit 160 X ? .
+bit 159 X ? .
+bit 158 X ? .
+bit 157 X ? .
+bit 156 X ? .
+bit 155 I ? IO_132
+bit 154 O ? IO_132 153 0 Z
+bit 153 C ? .
+bit 152 I ? IO_133
+bit 151 O ? IO_133 150 0 Z
+bit 150 C ? .
+bit 149 I ? IO_134
+bit 148 O ? IO_134 147 0 Z
+bit 147 C ? .
+bit 146 I ? IO_135
+bit 145 O ? IO_135 144 0 Z
+bit 144 C ? .
+bit 143 I ? IO_136
+bit 142 O ? IO_136 141 0 Z
+bit 141 C ? .
+bit 140 X ? .
+bit 139 X ? .
+bit 138 X ? .
+bit 137 I ? IO_138
+bit 136 O ? IO_138 135 0 Z
+bit 135 C ? .
+bit 134 I ? IO_139
+bit 133 O ? IO_139 132 0 Z
+bit 132 C ? .
+bit 131 I ? IO_140
+bit 130 O ? IO_140 129 0 Z
+bit 129 C ? .
+bit 128 X ? .
+bit 127 X ? .
+bit 126 X ? .
+bit 125 I ? IO_142
+bit 124 O ? IO_142 123 0 Z
+bit 123 C ? .
+bit 122 I ? IO_143
+bit 121 O ? IO_143 120 0 Z
+bit 120 C ? .
+bit 119 I ? IO_144
+bit 118 O ? IO_144 117 0 Z
+bit 117 C ? .
+bit 116 I ? IO_145
+bit 115 O ? IO_145 114 0 Z
+bit 114 C ? .
+bit 113 I ? IO_146
+bit 112 O ? IO_146 111 0 Z
+bit 111 C ? .
+bit 110 X ? .
+bit 109 X ? .
+bit 108 X ? .
+bit 107 X ? .
+bit 106 X ? .
+bit 105 X ? .
+bit 104 X ? .
+bit 103 X ? .
+bit 102 X ? .
+bit 101 I ? IO_161
+bit 100 O ? IO_161 99 0 Z
+bit 99 C ? .
+bit 98 X ? .
+bit 97 X ? .
+bit 96 X ? .
+bit 95 X ? .
+bit 94 X ? .
+bit 93 X ? .
+bit 92 X ? .
+bit 91 X ? .
+bit 90 X ? .
+bit 89 X ? .
+bit 88 X ? .
+bit 87 X ? .
+bit 86 I ? IO_166
+bit 85 O ? IO_166 84 0 Z
+bit 84 C ? .
+bit 83 I ? IO_167
+bit 82 O ? IO_167 81 0 Z
+bit 81 C ? .
+bit 80 I ? IO_168
+bit 79 O ? IO_168 78 0 Z
+bit 78 C ? .
+bit 77 I ? IO_169
+bit 76 O ? IO_169 75 0 Z
+bit 75 C ? .
+bit 74 I ? IO_170
+bit 73 O ? IO_170 72 0 Z
+bit 72 C ? .
+bit 71 I ? IO_171
+bit 70 O ? IO_171 69 0 Z
+bit 69 C ? .
+bit 68 I ? IO_149
+bit 67 O ? IO_149 66 0 Z
+bit 66 C ? .
+bit 65 I ? IO_150
+bit 64 O ? IO_150 63 0 Z
+bit 63 C ? .
+bit 62 I ? IO_151
+bit 61 O ? IO_151 60 0 Z
+bit 60 C ? .
+bit 59 I ? IO_152
+bit 58 O ? IO_152 57 0 Z
+bit 57 C ? .
+bit 56 X ? .
+bit 55 X ? .
+bit 54 X ? .
+bit 53 I ? IO_154
+bit 52 O ? IO_154 51 0 Z
+bit 51 C ? .
+bit 50 X ? .
+bit 49 X ? .
+bit 48 X ? .
+bit 47 I ? IO_156
+bit 46 O ? IO_156 45 0 Z
+bit 45 C ? .
+bit 44 I ? IO_157
+bit 43 O ? IO_157 42 0 Z
+bit 42 C ? .
+bit 41 X ? .
+bit 40 X ? .
+bit 39 X ? .
+bit 38 I ? IO_159
+bit 37 O ? IO_159 36 0 Z
+bit 36 C ? .
+bit 35 X ? .
+bit 34 X ? .
+bit 33 X ? .
+bit 32 X ? .
+bit 31 X ? .
+bit 30 X ? .
+bit 29 X ? .
+bit 28 X ? .
+bit 27 X ? .
+bit 26 X ? .
+bit 25 X ? .
+bit 24 X ? .
+bit 23 I ? IO_176
+bit 22 O ? IO_176 21 0 Z
+bit 21 C ? .
+bit 20 I ? IO_177
+bit 19 O ? IO_177 18 0 Z
+bit 18 C ? .
+bit 17 I ? IO_178
+bit 16 O ? IO_178 15 0 Z
+bit 15 C ? .
+bit 14 I ? IO_179
+bit 13 O ? IO_179 12 0 Z
+bit 12 C ? .
+bit 11 I ? IO_180
+bit 10 O ? IO_180 9 0 Z
+bit 9 C ? .
+bit 8 X ? .
+bit 7 X ? .
+bit 6 X ? .
+bit 5 I ? IO_182
+bit 4 O ? IO_182 3 0 Z
+bit 3 C ? .
+bit 2 I ? IO_183
+bit 1 O ? IO_183 0 0 Z
+bit 0 C ? .
--- /dev/null
+#
+# $Id: STEPPINGS,v 1.1 2003/02/14 11:14:56 telka Exp $
+#
+# Copyright (C) 2003 Tower Technologies s.r.l.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Kolja Waschk, ixo.de, 2007
+#
+
+# bits 31-28 of the Device Identification Register
+0000 xc2c256-vq100 0
+0001 xc2c256-vq100 1
--- /dev/null
+#
+# $Id: xc2c256-tq144,v 1.2 2003/08/13 09:24:36 telka Exp $
+#
+# JTAG declarations for XC2C256-VQ100
+#
+# Based on the declarations for XC2C256-TQ144,
+# Written by Alessandro Zummo <azummo@towertech.it>, 2003.
+# Copyright (C) 2003 Tower Technologies s.r.l.,
+# and bsdl2jtag output with Xilinx file [2] as input.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Documentation:
+# [1] Xilinx Inc., "CoolRunner-II CPLD Family Advance Product Specification",
+# DS090 (v1.3) September 24, 2002
+# [2] Xilinx Inc., "BSDL file for device XC2C256, package VQ144
+# Revision: 1.11", 2006-10-17
+# [3] Xilinx Inc., "XC2C256 CoolRunner-II CPLD Advance Product Specification",
+# DS094 (v1.2) November 20, 2002
+
+# mandatory data registers
+register BSR 552 # see [2]
+register BR 1
+
+# optional data registers
+register DIR 32
+
+# user-defined registers
+register ISPSR 274 # ISP (In-System Programming) Shift Register, see [2]
+
+# instructions - see [2]
+instruction length 8
+
+# mandatory instructions - see [2]
+instruction EXTEST 00000000 BSR
+instruction SAMPLE/PRELOAD 00000011 BSR
+instruction BYPASS 11111111 BR
+instruction INTEST 00000010 BSR
+instruction IDCODE 00000001 DIR
+instruction USERCODE 11111101 DIR
+instruction HIGHZ 11111100 BR
+instruction CLAMP 11111010 BR
+
+# user-defined instructions - see [2]
+instruction ISC_ENABLE_CLAMP 11101001 BR
+instruction ISC_ENABLEOTF 11100100 ISPSR
+instruction ISC_ENABLE 11101000 ISPSR
+instruction ISC_SRAM_READ 11100111 ISPSR
+instruction ISC_SRAM_WRITE 11100110 ISPSR
+instruction ISC_ERASE 11101101 ISPSR
+instruction ISC_PROGRAM 11101010 ISPSR
+instruction ISC_READ 11101110 ISPSR
+instruction ISC_INIT 11110000 ISPSR
+instruction ISC_DISABLE 11000000 ISPSR
+instruction TEST_ENABLE 00010001 ISPSR
+instruction BULKPROG 00010010 ISPSR
+instruction ERASE_ALL 00010100 ISPSR
+instruction MVERIFY 00010011 ISPSR
+instruction TEST_DISABLE 00010101 ISPSR
+instruction ISC_NOOP 11100000 BR
+
+# signals - derived from [2] using bsdl2jtag
+signal tdi
+signal tck
+signal tms
+signal tdo
+signal IO_2
+signal IO_5
+signal IO_6
+signal IO_7
+signal IO_8
+signal IO_11
+signal IO_13
+signal IO_15
+signal IO_17
+signal IO_19
+signal IO_20
+signal IO_26
+signal IO_28
+signal IO_30
+signal IO_32
+signal IO_33
+signal IO_34
+signal IO_35
+signal IO_37
+signal IO_38
+signal IO_40
+signal IO_47
+signal IO_49
+signal IO_56
+signal IO_58
+signal IO_61
+signal IO_63
+signal IO_65
+signal IO_70
+signal IO_71
+signal IO_72
+signal IO_73
+signal IO_74
+signal IO_75
+signal IO_83
+signal IO_84
+signal IO_85
+signal IO_86
+signal IO_87
+signal IO_88
+signal IO_90
+signal IO_91
+signal IO_93
+signal IO_95
+signal IO_97
+signal IO_102
+signal IO_103
+signal IO_104
+signal IO_105
+signal IO_106
+signal IO_107
+signal IO_109
+signal IO_120
+signal IO_121
+signal IO_122
+signal IO_123
+signal IO_132
+signal IO_134
+signal IO_135
+signal IO_136
+signal IO_139
+signal IO_141
+signal IO_143
+signal IO_145
+signal IO_149
+signal IO_151
+signal IO_153
+signal IO_157
+signal IO_158
+signal IO_166
+signal IO_167
+signal IO_168
+signal IO_169
+signal IO_170
+signal IO_171
+signal IO_176
+signal IO_177
+signal IO_178
+signal IO_179
+signal IO_180
+signal vdd1
+signal vdd2
+signal vdd3
+signal vdd4
+signal vdd5
+signal vdd6
+signal vdd7
+signal gnd1
+signal gnd2
+signal gnd3
+signal gnd4
+signal gnd5
+signal gnd6
+signal gnd7
+
+# bits - derived from [2] using bsdl2jtag
+bit 551 O 1 *
+bit 550 O 1 *
+bit 549 O 1 *
+bit 548 O 1 *
+bit 547 O 1 *
+bit 546 O 1 *
+bit 545 I 1 IO_2
+bit 544 O 1 IO_2 543 0 Z
+bit 543 C 0 *
+bit 542 O 1 *
+bit 541 O 1 *
+bit 540 O 1 *
+bit 539 O 1 *
+bit 538 O 1 *
+bit 537 O 1 *
+bit 536 I 1 IO_5
+bit 535 O 1 IO_5 534 0 Z
+bit 534 C 0 *
+bit 533 I 1 IO_6
+bit 532 O 1 IO_6 531 0 Z
+bit 531 C 0 *
+bit 530 I 1 IO_7
+bit 529 O 1 IO_7 528 0 Z
+bit 528 C 0 *
+bit 527 I 1 IO_8
+bit 526 O 1 IO_8 525 0 Z
+bit 525 C 0 *
+bit 524 O 1 *
+bit 523 O 1 *
+bit 522 O 1 *
+bit 521 O 1 *
+bit 520 O 1 *
+bit 519 O 1 *
+bit 518 O 1 *
+bit 517 O 1 *
+bit 516 O 1 *
+bit 515 O 1 *
+bit 514 O 1 *
+bit 513 O 1 *
+bit 512 O 1 *
+bit 511 O 1 *
+bit 510 O 1 *
+bit 509 O 1 *
+bit 508 O 1 *
+bit 507 O 1 *
+bit 506 I 1 IO_26
+bit 505 O 1 IO_26 504 0 Z
+bit 504 C 0 *
+bit 503 O 1 *
+bit 502 O 1 *
+bit 501 O 1 *
+bit 500 I 1 IO_28
+bit 499 O 1 IO_28 498 0 Z
+bit 498 C 0 *
+bit 497 O 1 *
+bit 496 O 1 *
+bit 495 O 1 *
+bit 494 I 1 IO_30
+bit 493 O 1 IO_30 492 0 Z
+bit 492 C 0 *
+bit 491 O 1 *
+bit 490 O 1 *
+bit 489 O 1 *
+bit 488 I 1 IO_32
+bit 487 O 1 IO_32 486 0 Z
+bit 486 C 0 *
+bit 485 I 1 IO_11
+bit 484 O 1 IO_11 483 0 Z
+bit 483 C 0 *
+bit 482 O 1 *
+bit 481 O 1 *
+bit 480 O 1 *
+bit 479 I 1 IO_13
+bit 478 O 1 IO_13 477 0 Z
+bit 477 C 0 *
+bit 476 O 1 *
+bit 475 O 1 *
+bit 474 O 1 *
+bit 473 I 1 IO_15
+bit 472 O 1 IO_15 471 0 Z
+bit 471 C 0 *
+bit 470 O 1 *
+bit 469 O 1 *
+bit 468 O 1 *
+bit 467 I 1 IO_17
+bit 466 O 1 IO_17 465 0 Z
+bit 465 C 0 *
+bit 464 O 1 *
+bit 463 O 1 *
+bit 462 O 1 *
+bit 461 I 1 IO_19
+bit 460 O 1 IO_19 459 0 Z
+bit 459 C 0 *
+bit 458 I 1 IO_20
+bit 457 O 1 IO_20 456 0 Z
+bit 456 C 0 *
+bit 455 O 1 *
+bit 454 O 1 *
+bit 453 O 1 *
+bit 452 I 1 IO_33
+bit 451 O 1 IO_33 450 0 Z
+bit 450 C 0 *
+bit 449 I 1 IO_34
+bit 448 O 1 IO_34 447 0 Z
+bit 447 C 0 *
+bit 446 I 1 IO_35
+bit 445 O 1 IO_35 444 0 Z
+bit 444 C 0 *
+bit 443 O 1 *
+bit 442 O 1 *
+bit 441 O 1 *
+bit 440 I 1 IO_37
+bit 439 O 1 IO_37 438 0 Z
+bit 438 C 0 *
+bit 437 I 1 IO_38
+bit 436 O 1 IO_38 435 0 Z
+bit 435 C 0 *
+bit 434 O 1 *
+bit 433 O 1 *
+bit 432 O 1 *
+bit 431 I 1 IO_40
+bit 430 O 1 IO_40 429 0 Z
+bit 429 C 0 *
+bit 428 O 1 *
+bit 427 O 1 *
+bit 426 O 1 *
+bit 425 O 1 *
+bit 424 O 1 *
+bit 423 O 1 *
+bit 422 O 1 *
+bit 421 O 1 *
+bit 420 O 1 *
+bit 419 O 1 *
+bit 418 O 1 *
+bit 417 O 1 *
+bit 416 O 1 *
+bit 415 O 1 *
+bit 414 O 1 *
+bit 413 O 1 *
+bit 412 O 1 *
+bit 411 O 1 *
+bit 410 I 1 IO_47
+bit 409 O 1 IO_47 408 0 Z
+bit 408 C 0 *
+bit 407 O 1 *
+bit 406 O 1 *
+bit 405 O 1 *
+bit 404 I 1 IO_49
+bit 403 O 1 IO_49 402 0 Z
+bit 402 C 0 *
+bit 401 O 1 *
+bit 400 O 1 *
+bit 399 O 1 *
+bit 398 O 1 *
+bit 397 O 1 *
+bit 396 O 1 *
+bit 395 O 1 *
+bit 394 O 1 *
+bit 393 O 1 *
+bit 392 O 1 *
+bit 391 O 1 *
+bit 390 O 1 *
+bit 389 O 1 *
+bit 388 O 1 *
+bit 387 O 1 *
+bit 386 O 1 *
+bit 385 O 1 *
+bit 384 O 1 *
+bit 383 O 1 *
+bit 382 O 1 *
+bit 381 O 1 *
+bit 380 O 1 *
+bit 379 O 1 *
+bit 378 O 1 *
+bit 377 O 1 *
+bit 376 O 1 *
+bit 375 O 1 *
+bit 374 I 1 IO_70
+bit 373 O 1 IO_70 372 0 Z
+bit 372 C 0 *
+bit 371 I 1 IO_71
+bit 370 O 1 IO_71 369 0 Z
+bit 369 C 0 *
+bit 368 I 1 IO_72
+bit 367 O 1 IO_72 366 0 Z
+bit 366 C 0 *
+bit 365 I 1 IO_73
+bit 364 O 1 IO_73 363 0 Z
+bit 363 C 0 *
+bit 362 I 1 IO_74
+bit 361 O 1 IO_74 360 0 Z
+bit 360 C 0 *
+bit 359 I 1 IO_75
+bit 358 O 1 IO_75 357 0 Z
+bit 357 C 0 *
+bit 356 O 1 *
+bit 355 O 1 *
+bit 354 O 1 *
+bit 353 O 1 *
+bit 352 O 1 *
+bit 351 O 1 *
+bit 350 O 1 *
+bit 349 O 1 *
+bit 348 O 1 *
+bit 347 I 1 IO_56
+bit 346 O 1 IO_56 345 0 Z
+bit 345 C 0 *
+bit 344 O 1 *
+bit 343 O 1 *
+bit 342 O 1 *
+bit 341 I 1 IO_58
+bit 340 O 1 IO_58 339 0 Z
+bit 339 C 0 *
+bit 338 O 1 *
+bit 337 O 1 *
+bit 336 O 1 *
+bit 335 O 1 *
+bit 334 O 1 *
+bit 333 O 1 *
+bit 332 I 1 IO_61
+bit 331 O 1 IO_61 330 0 Z
+bit 330 C 0 *
+bit 329 O 1 *
+bit 328 O 1 *
+bit 327 O 1 *
+bit 326 I 1 IO_63
+bit 325 O 1 IO_63 324 0 Z
+bit 324 C 0 *
+bit 323 O 1 *
+bit 322 O 1 *
+bit 321 O 1 *
+bit 320 I 1 IO_65
+bit 319 O 1 IO_65 318 0 Z
+bit 318 C 0 *
+bit 317 O 1 *
+bit 316 O 1 *
+bit 315 O 1 *
+bit 314 O 1 *
+bit 313 O 1 *
+bit 312 O 1 *
+bit 311 O 1 *
+bit 310 O 1 *
+bit 309 O 1 *
+bit 308 O 1 *
+bit 307 O 1 *
+bit 306 O 1 *
+bit 305 O 1 *
+bit 304 O 1 *
+bit 303 O 1 *
+bit 302 I 1 IO_83
+bit 301 O 1 IO_83 300 0 Z
+bit 300 C 0 *
+bit 299 I 1 IO_84
+bit 298 O 1 IO_84 297 0 Z
+bit 297 C 0 *
+bit 296 I 1 IO_85
+bit 295 O 1 IO_85 294 0 Z
+bit 294 C 0 *
+bit 293 I 1 IO_86
+bit 292 O 1 IO_86 291 0 Z
+bit 291 C 0 *
+bit 290 I 1 IO_87
+bit 289 O 1 IO_87 288 0 Z
+bit 288 C 0 *
+bit 287 I 1 IO_88
+bit 286 O 1 IO_88 285 0 Z
+bit 285 C 0 *
+bit 284 O 1 *
+bit 283 O 1 *
+bit 282 O 1 *
+bit 281 I 1 IO_90
+bit 280 O 1 IO_90 279 0 Z
+bit 279 C 0 *
+bit 278 I 1 IO_91
+bit 277 O 1 IO_91 276 0 Z
+bit 276 C 0 *
+bit 275 O 1 *
+bit 274 O 1 *
+bit 273 O 1 *
+bit 272 I 1 IO_93
+bit 271 O 1 IO_93 270 0 Z
+bit 270 C 0 *
+bit 269 O 1 *
+bit 268 O 1 *
+bit 267 O 1 *
+bit 266 I 1 IO_95
+bit 265 O 1 IO_95 264 0 Z
+bit 264 C 0 *
+bit 263 O 1 *
+bit 262 O 1 *
+bit 261 O 1 *
+bit 260 I 1 IO_97
+bit 259 O 1 IO_97 258 0 Z
+bit 258 C 0 *
+bit 257 O 1 *
+bit 256 O 1 *
+bit 255 O 1 *
+bit 254 O 1 *
+bit 253 O 1 *
+bit 252 O 1 *
+bit 251 O 1 *
+bit 250 O 1 *
+bit 249 O 1 *
+bit 248 O 1 *
+bit 247 O 1 *
+bit 246 O 1 *
+bit 245 O 1 *
+bit 244 O 1 *
+bit 243 O 1 *
+bit 242 O 1 *
+bit 241 O 1 *
+bit 240 O 1 *
+bit 239 O 1 *
+bit 238 O 1 *
+bit 237 O 1 *
+bit 236 O 1 *
+bit 235 O 1 *
+bit 234 O 1 *
+bit 233 O 1 *
+bit 232 O 1 *
+bit 231 O 1 *
+bit 230 O 1 *
+bit 229 O 1 *
+bit 228 O 1 *
+bit 227 I 1 IO_120
+bit 226 O 1 IO_120 225 0 Z
+bit 225 C 0 *
+bit 224 I 1 IO_121
+bit 223 O 1 IO_121 222 0 Z
+bit 222 C 0 *
+bit 221 I 1 IO_122
+bit 220 O 1 IO_122 219 0 Z
+bit 219 C 0 *
+bit 218 I 1 IO_123
+bit 217 O 1 IO_123 216 0 Z
+bit 216 C 0 *
+bit 215 O 1 *
+bit 214 O 1 *
+bit 213 O 1 *
+bit 212 O 1 *
+bit 211 O 1 *
+bit 210 O 1 *
+bit 209 I 1 IO_102
+bit 208 O 1 IO_102 207 0 Z
+bit 207 C 0 *
+bit 206 I 1 IO_103
+bit 205 O 1 IO_103 204 0 Z
+bit 204 C 0 *
+bit 203 I 1 IO_104
+bit 202 O 1 IO_104 201 0 Z
+bit 201 C 0 *
+bit 200 I 1 IO_105
+bit 199 O 1 IO_105 198 0 Z
+bit 198 C 0 *
+bit 197 I 1 IO_106
+bit 196 O 1 IO_106 195 0 Z
+bit 195 C 0 *
+bit 194 I 1 IO_107
+bit 193 O 1 IO_107 192 0 Z
+bit 192 C 0 *
+bit 191 O 1 *
+bit 190 O 1 *
+bit 189 O 1 *
+bit 188 I 1 IO_109
+bit 187 O 1 IO_109 186 0 Z
+bit 186 C 0 *
+bit 185 O 1 *
+bit 184 O 1 *
+bit 183 O 1 *
+bit 182 O 1 *
+bit 181 O 1 *
+bit 180 O 1 *
+bit 179 O 1 *
+bit 178 O 1 *
+bit 177 O 1 *
+bit 176 O 1 *
+bit 175 O 1 *
+bit 174 O 1 *
+bit 173 O 1 *
+bit 172 O 1 *
+bit 171 O 1 *
+bit 170 O 1 *
+bit 169 O 1 *
+bit 168 O 1 *
+bit 167 O 1 *
+bit 166 O 1 *
+bit 165 O 1 *
+bit 164 O 1 *
+bit 163 O 1 *
+bit 162 O 1 *
+bit 161 O 1 *
+bit 160 O 1 *
+bit 159 O 1 *
+bit 158 O 1 *
+bit 157 O 1 *
+bit 156 O 1 *
+bit 155 I 1 IO_132
+bit 154 O 1 IO_132 153 0 Z
+bit 153 C 0 *
+bit 152 O 1 *
+bit 151 O 1 *
+bit 150 O 1 *
+bit 149 I 1 IO_134
+bit 148 O 1 IO_134 147 0 Z
+bit 147 C 0 *
+bit 146 I 1 IO_135
+bit 145 O 1 IO_135 144 0 Z
+bit 144 C 0 *
+bit 143 I 1 IO_136
+bit 142 O 1 IO_136 141 0 Z
+bit 141 C 0 *
+bit 140 O 1 *
+bit 139 O 1 *
+bit 138 O 1 *
+bit 137 O 1 *
+bit 136 O 1 *
+bit 135 O 1 *
+bit 134 I 1 IO_139
+bit 133 O 1 IO_139 132 0 Z
+bit 132 C 0 *
+bit 131 O 1 *
+bit 130 O 1 *
+bit 129 O 1 *
+bit 128 I 1 IO_141
+bit 127 O 1 IO_141 126 0 Z
+bit 126 C 0 *
+bit 125 O 1 *
+bit 124 O 1 *
+bit 123 O 1 *
+bit 122 I 1 IO_143
+bit 121 O 1 IO_143 120 0 Z
+bit 120 C 0 *
+bit 119 O 1 *
+bit 118 O 1 *
+bit 117 O 1 *
+bit 116 I 1 IO_145
+bit 115 O 1 IO_145 114 0 Z
+bit 114 C 0 *
+bit 113 O 1 *
+bit 112 O 1 *
+bit 111 O 1 *
+bit 110 O 1 *
+bit 109 O 1 *
+bit 108 O 1 *
+bit 107 O 1 *
+bit 106 O 1 *
+bit 105 O 1 *
+bit 104 O 1 *
+bit 103 O 1 *
+bit 102 O 1 *
+bit 101 O 1 *
+bit 100 O 1 *
+bit 99 O 1 *
+bit 98 O 1 *
+bit 97 O 1 *
+bit 96 O 1 *
+bit 95 O 1 *
+bit 94 O 1 *
+bit 93 O 1 *
+bit 92 O 1 *
+bit 91 O 1 *
+bit 90 O 1 *
+bit 89 O 1 *
+bit 88 O 1 *
+bit 87 O 1 *
+bit 86 I 1 IO_166
+bit 85 O 1 IO_166 84 0 Z
+bit 84 C 0 *
+bit 83 I 1 IO_167
+bit 82 O 1 IO_167 81 0 Z
+bit 81 C 0 *
+bit 80 I 1 IO_168
+bit 79 O 1 IO_168 78 0 Z
+bit 78 C 0 *
+bit 77 I 1 IO_169
+bit 76 O 1 IO_169 75 0 Z
+bit 75 C 0 *
+bit 74 I 1 IO_170
+bit 73 O 1 IO_170 72 0 Z
+bit 72 C 0 *
+bit 71 I 1 IO_171
+bit 70 O 1 IO_171 69 0 Z
+bit 69 C 0 *
+bit 68 I 1 IO_149
+bit 67 O 1 IO_149 66 0 Z
+bit 66 C 0 *
+bit 65 O 1 *
+bit 64 O 1 *
+bit 63 O 1 *
+bit 62 I 1 IO_151
+bit 61 O 1 IO_151 60 0 Z
+bit 60 C 0 *
+bit 59 O 1 *
+bit 58 O 1 *
+bit 57 O 1 *
+bit 56 I 1 IO_153
+bit 55 O 1 IO_153 54 0 Z
+bit 54 C 0 *
+bit 53 O 1 *
+bit 52 O 1 *
+bit 51 O 1 *
+bit 50 O 1 *
+bit 49 O 1 *
+bit 48 O 1 *
+bit 47 O 1 *
+bit 46 O 1 *
+bit 45 O 1 *
+bit 44 I 1 IO_157
+bit 43 O 1 IO_157 42 0 Z
+bit 42 C 0 *
+bit 41 I 1 IO_158
+bit 40 O 1 IO_158 39 0 Z
+bit 39 C 0 *
+bit 38 O 1 *
+bit 37 O 1 *
+bit 36 O 1 *
+bit 35 O 1 *
+bit 34 O 1 *
+bit 33 O 1 *
+bit 32 O 1 *
+bit 31 O 1 *
+bit 30 O 1 *
+bit 29 O 1 *
+bit 28 O 1 *
+bit 27 O 1 *
+bit 26 O 1 *
+bit 25 O 1 *
+bit 24 O 1 *
+bit 23 I 1 IO_176
+bit 22 O 1 IO_176 21 0 Z
+bit 21 C 0 *
+bit 20 I 1 IO_177
+bit 19 O 1 IO_177 18 0 Z
+bit 18 C 0 *
+bit 17 I 1 IO_178
+bit 16 O 1 IO_178 15 0 Z
+bit 15 C 0 *
+bit 14 I 1 IO_179
+bit 13 O 1 IO_179 12 0 Z
+bit 12 C 0 *
+bit 11 I 1 IO_180
+bit 10 O 1 IO_180 9 0 Z
+bit 9 C 0 *
+bit 8 O 1 *
+bit 7 O 1 *
+bit 6 O 1 *
+bit 5 O 1 *
+bit 4 O 1 *
+bit 3 O 1 *
+bit 2 O 1 *
+bit 1 O 1 *
+bit 0 O 1 *
--- /dev/null
+#
+# $Id: STEPPINGS,v 1.1 2003/02/14 11:14:56 telka Exp $
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+
+# bits 31-28 of the Device Identification Register
+0000 xc2c64a-vq44 0
--- /dev/null
+signal tdi
+signal tck
+signal tms
+signal tdo
+signal IO_0
+signal IO_1
+signal IO_2
+signal IO_8
+signal IO_9
+signal IO_10
+signal IO_11
+signal IO_12
+signal IO_16
+signal IO_17
+signal IO_20
+signal IO_21
+signal IO_22
+signal IO_23
+signal IO_25
+signal IO_27
+signal IO_28
+signal IO_32
+signal IO_33
+signal IO_34
+signal IO_37
+signal IO_41
+signal IO_42
+signal IO_43
+signal IO_45
+signal IO_46
+signal IO_48
+signal IO_49
+signal IO_54
+signal IO_58
+signal IO_60
+signal IO_61
+signal vdd1
+signal vdd2
+signal vdd3
+signal gnd1
+signal gnd2
+signal gnd3
+
+register BSR 192
+register BR 1
+register DIR 32
+
+instruction length 8
+
+instruction BYPASS 11111111 BR
+instruction SAMPLE/PRELOAD 00000011 BSR
+instruction EXTEST 00000000 BSR
+instruction IDCODE 00000001 DIR
+
+bit 191 I 1 IO_0
+bit 190 O 1 IO_0 189 0 Z
+bit 189 C 0 *
+bit 188 I 1 IO_1
+bit 187 O 1 IO_1 186 0 Z
+bit 186 C 0 *
+bit 185 I 1 IO_2
+bit 184 O 1 IO_2 183 0 Z
+bit 183 C 0 *
+bit 182 O 1 *
+bit 181 O 1 *
+bit 180 O 1 *
+bit 179 O 1 *
+bit 178 O 1 *
+bit 177 O 1 *
+bit 176 O 1 *
+bit 175 O 1 *
+bit 174 O 1 *
+bit 173 O 1 *
+bit 172 O 1 *
+bit 171 O 1 *
+bit 170 O 1 *
+bit 169 O 1 *
+bit 168 O 1 *
+bit 167 I 1 IO_8
+bit 166 O 1 IO_8 165 0 Z
+bit 165 C 0 *
+bit 164 I 1 IO_9
+bit 163 O 1 IO_9 162 0 Z
+bit 162 C 0 *
+bit 161 I 1 IO_10
+bit 160 O 1 IO_10 159 0 Z
+bit 159 C 0 *
+bit 158 I 1 IO_11
+bit 157 O 1 IO_11 156 0 Z
+bit 156 C 0 *
+bit 155 I 1 IO_12
+bit 154 O 1 IO_12 153 0 Z
+bit 153 C 0 *
+bit 152 O 1 *
+bit 151 O 1 *
+bit 150 O 1 *
+bit 149 O 1 *
+bit 148 O 1 *
+bit 147 O 1 *
+bit 146 O 1 *
+bit 145 O 1 *
+bit 144 O 1 *
+bit 143 I 1 IO_32
+bit 142 O 1 IO_32 141 0 Z
+bit 141 C 0 *
+bit 140 I 1 IO_33
+bit 139 O 1 IO_33 138 0 Z
+bit 138 C 0 *
+bit 137 I 1 IO_34
+bit 136 O 1 IO_34 135 0 Z
+bit 135 C 0 *
+bit 134 O 1 *
+bit 133 O 1 *
+bit 132 O 1 *
+bit 131 O 1 *
+bit 130 O 1 *
+bit 129 O 1 *
+bit 128 I 1 IO_37
+bit 127 O 1 IO_37 126 0 Z
+bit 126 C 0 *
+bit 125 O 1 *
+bit 124 O 1 *
+bit 123 O 1 *
+bit 122 O 1 *
+bit 121 O 1 *
+bit 120 O 1 *
+bit 119 O 1 *
+bit 118 O 1 *
+bit 117 O 1 *
+bit 116 I 1 IO_41
+bit 115 O 1 IO_41 114 0 Z
+bit 114 C 0 *
+bit 113 I 1 IO_42
+bit 112 O 1 IO_42 111 0 Z
+bit 111 C 0 *
+bit 110 I 1 IO_43
+bit 109 O 1 IO_43 108 0 Z
+bit 108 C 0 *
+bit 107 O 1 *
+bit 106 O 1 *
+bit 105 O 1 *
+bit 104 I 1 IO_45
+bit 103 O 1 IO_45 102 0 Z
+bit 102 C 0 *
+bit 101 I 1 IO_46
+bit 100 O 1 IO_46 99 0 Z
+bit 99 C 0 *
+bit 98 O 1 *
+bit 97 O 1 *
+bit 96 O 1 *
+bit 95 I 1 IO_16
+bit 94 O 1 IO_16 93 0 Z
+bit 93 C 0 *
+bit 92 I 1 IO_17
+bit 91 O 1 IO_17 90 0 Z
+bit 90 C 0 *
+bit 89 O 1 *
+bit 88 O 1 *
+bit 87 O 1 *
+bit 86 O 1 *
+bit 85 O 1 *
+bit 84 O 1 *
+bit 83 I 1 IO_20
+bit 82 O 1 IO_20 81 0 Z
+bit 81 C 0 *
+bit 80 I 1 IO_21
+bit 79 O 1 IO_21 78 0 Z
+bit 78 C 0 *
+bit 77 I 1 IO_22
+bit 76 O 1 IO_22 75 0 Z
+bit 75 C 0 *
+bit 74 I 1 IO_23
+bit 73 O 1 IO_23 72 0 Z
+bit 72 C 0 *
+bit 71 O 1 *
+bit 70 O 1 *
+bit 69 O 1 *
+bit 68 I 1 IO_25
+bit 67 O 1 IO_25 66 0 Z
+bit 66 C 0 *
+bit 65 O 1 *
+bit 64 O 1 *
+bit 63 O 1 *
+bit 62 I 1 IO_27
+bit 61 O 1 IO_27 60 0 Z
+bit 60 C 0 *
+bit 59 I 1 IO_28
+bit 58 O 1 IO_28 57 0 Z
+bit 57 C 0 *
+bit 56 O 1 *
+bit 55 O 1 *
+bit 54 O 1 *
+bit 53 O 1 *
+bit 52 O 1 *
+bit 51 O 1 *
+bit 50 O 1 *
+bit 49 O 1 *
+bit 48 O 1 *
+bit 47 I 1 IO_48
+bit 46 O 1 IO_48 45 0 Z
+bit 45 C 0 *
+bit 44 I 1 IO_49
+bit 43 O 1 IO_49 42 0 Z
+bit 42 C 0 *
+bit 41 O 1 *
+bit 40 O 1 *
+bit 39 O 1 *
+bit 38 O 1 *
+bit 37 O 1 *
+bit 36 O 1 *
+bit 35 O 1 *
+bit 34 O 1 *
+bit 33 O 1 *
+bit 32 O 1 *
+bit 31 O 1 *
+bit 30 O 1 *
+bit 29 I 1 IO_54
+bit 28 O 1 IO_54 27 0 Z
+bit 27 C 0 *
+bit 26 O 1 *
+bit 25 O 1 *
+bit 24 O 1 *
+bit 23 O 1 *
+bit 22 O 1 *
+bit 21 O 1 *
+bit 20 O 1 *
+bit 19 O 1 *
+bit 18 O 1 *
+bit 17 I 1 IO_58
+bit 16 O 1 IO_58 15 0 Z
+bit 15 C 0 *
+bit 14 O 1 *
+bit 13 O 1 *
+bit 12 O 1 *
+bit 11 I 1 IO_60
+bit 10 O 1 IO_60 9 0 Z
+bit 9 C 0 *
+bit 8 I 1 IO_61
+bit 7 O 1 IO_61 6 0 Z
+bit 6 C 0 *
+bit 5 I 1 IO_62
+bit 4 O 1 IO_62 3 0 Z
+bit 3 C 0 *
+bit 2 O 1 *
+bit 1 O 1 *
+bit 0 O 1 *
--- /dev/null
+#
+# $Id: STEPPINGS,v 1.1 2003/02/14 11:14:56 telka Exp $
+#
+# Copyright (C) 2003 Tower Technologies s.r.l.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Alessandro Zummo <azummo@towertech.it>, 2003.
+# DJF:w
+
+# bits 31-28 of the Device Identification Register
+0010 xc2s200e-pq208 0
--- /dev/null
+signal CCLK_P155
+signal DONE_P104
+signal GCK0_P80
+signal GCK1_P77
+signal GCK2_P182
+signal GCK3_P185
+signal GND1
+signal GND2
+signal GND3
+signal GND4
+signal GND5
+signal GND6
+signal GND7
+signal GND8
+signal GND9
+signal GND10
+signal GND11
+signal GND12
+signal GND13
+signal GND14
+signal GND15
+signal GND16
+signal GND17
+signal GND18
+signal GND19
+signal GND20
+signal GND21
+signal GND22
+signal GND23
+signal GND24
+signal INIT_P107
+signal M0_P52
+signal M1_P50
+signal M2_P54
+signal PROGRAM
+signal TCK
+signal TDI
+signal TDO
+signal TMS
+signal VCCINT1
+signal VCCINT2
+signal VCCINT3
+signal VCCINT4
+signal VCCINT5
+signal VCCINT6
+signal VCCINT7
+signal VCCINT8
+signal VCCINT9
+signal VCCINT10
+signal VCCINT11
+signal VCCINT12
+signal VCCO1
+signal VCCO2
+signal VCCO3
+signal VCCO4
+signal VCCO5
+signal VCCO6
+signal VCCO7
+signal VCCO8
+signal VCCO9
+signal VCCO10
+signal VCCO11
+signal VCCO12
+signal VCCO13
+signal VCCO14
+signal VCCO15
+signal VCCO16
+signal IO_P3
+signal IO_P4
+signal IO_P5
+signal IO_P6
+signal IO_P7
+signal IO_P8
+signal IO_P9
+signal IO_P10
+signal IO_P11
+signal IO_P15
+signal IO_P16
+signal IO_P17
+signal IO_P18
+signal IO_P20
+signal IO_P21
+signal IO_P22
+signal IO_P23
+signal IO_P24
+signal IO_P27
+signal IO_P29
+signal IO_P30
+signal IO_P31
+signal IO_P33
+signal IO_P34
+signal IO_P35
+signal IO_P36
+signal IO_P40
+signal IO_P41
+signal IO_P42
+signal IO_P43
+signal IO_P44
+signal IO_P45
+signal IO_P46
+signal IO_P47
+signal IO_P48
+signal IO_P49
+signal IO_P55
+signal IO_P56
+signal IO_P57
+signal IO_P58
+signal IO_P59
+signal IO_P60
+signal IO_P61
+signal IO_P62
+signal IO_P63
+signal IO_P64
+signal IO_P68
+signal IO_P69
+signal IO_P70
+signal IO_P71
+signal IO_P73
+signal IO_P74
+signal IO_P75
+signal IO_P81
+signal IO_P82
+signal IO_P83
+signal IO_P84
+signal IO_P86
+signal IO_P87
+signal IO_P88
+signal IO_P89
+signal IO_P93
+signal IO_P94
+signal IO_P95
+signal IO_P96
+signal IO_P97
+signal IO_P98
+signal IO_P99
+signal IO_P100
+signal IO_P101
+signal IO_P102
+signal IO_P108
+signal IO_P109
+signal IO_P110
+signal IO_P111
+signal IO_P112
+signal IO_P113
+signal IO_P114
+signal IO_P115
+signal IO_P116
+signal IO_P120
+signal IO_P121
+signal IO_P122
+signal IO_P123
+signal IO_P125
+signal IO_P126
+signal IO_P127
+signal IO_P129
+signal IO_P132
+signal IO_P133
+signal IO_P134
+signal IO_P135
+signal IO_P136
+signal IO_P138
+signal IO_P139
+signal IO_P140
+signal IO_P141
+signal IO_P145
+signal IO_P146
+signal IO_P147
+signal IO_P148
+signal IO_P149
+signal IO_P150
+signal IO_P151
+signal IO_P152
+signal IO_P153
+signal IO_P154
+signal IO_P160
+signal IO_P161
+signal IO_P162
+signal IO_P163
+signal IO_P164
+signal IO_P165
+signal IO_P166
+signal IO_P167
+signal IO_P168
+signal IO_P169
+signal IO_P173
+signal IO_P174
+signal IO_P175
+signal IO_P176
+signal IO_P178
+signal IO_P179
+signal IO_P180
+signal IO_P181
+signal IO_P187
+signal IO_P188
+signal IO_P189
+signal IO_P191
+signal IO_P192
+signal IO_P193
+signal IO_P194
+signal IO_P198
+signal IO_P199
+signal IO_P200
+signal IO_P201
+signal IO_P202
+signal IO_P203
+signal IO_P204
+signal IO_P205
+
+register BSR 1022
+register BR 1
+register DIR 32
+
+instruction length 5
+
+instruction SAMPLE/PRELOAD 00001 BSR
+instruction IDCODE 01001 DIR
+instruction EXTEST 00000 BSR
+instruction BYPASS 11111 BR
+
+bit 1021 I 1 CCLK_P155
+bit 1020 O 1 CCLK_P155 1019 1 Z
+bit 1019 C 1 *
+bit 1018 I 1 IO_P154
+bit 1017 O 1 IO_P154 1016 1 Z
+bit 1016 C 1 *
+bit 1015 I 1 IO_P153
+bit 1014 O 1 IO_P153 1013 1 Z
+bit 1013 C 1 *
+bit 1012 O 1 *
+bit 1011 O 1 *
+bit 1010 O 1 *
+bit 1009 O 1 *
+bit 1008 O 1 *
+bit 1007 O 1 *
+bit 1006 O 1 *
+bit 1005 O 1 *
+bit 1004 O 1 *
+bit 1003 O 1 *
+bit 1002 O 1 *
+bit 1001 O 1 *
+bit 1000 I 1 IO_P152
+bit 999 O 1 IO_P152 998 1 Z
+bit 998 C 1 *
+bit 997 O 1 *
+bit 996 O 1 *
+bit 995 O 1 *
+bit 994 O 1 *
+bit 993 O 1 *
+bit 992 O 1 *
+bit 991 O 1 *
+bit 990 O 1 *
+bit 989 O 1 *
+bit 988 O 1 *
+bit 987 O 1 *
+bit 986 O 1 *
+bit 985 I 1 IO_P151
+bit 984 O 1 IO_P151 983 1 Z
+bit 983 C 1 *
+bit 982 I 1 IO_P150
+bit 981 O 1 IO_P150 980 1 Z
+bit 980 C 1 *
+bit 979 I 1 IO_P149
+bit 978 O 1 IO_P149 977 1 Z
+bit 977 C 1 *
+bit 976 O 1 *
+bit 975 O 1 *
+bit 974 O 1 *
+bit 973 O 1 *
+bit 972 O 1 *
+bit 971 O 1 *
+bit 970 O 1 *
+bit 969 O 1 *
+bit 968 O 1 *
+bit 967 I 1 IO_P148
+bit 966 O 1 IO_P148 965 1 Z
+bit 965 C 1 *
+bit 964 I 1 IO_P147
+bit 963 O 1 IO_P147 962 1 Z
+bit 962 C 1 *
+bit 961 O 1 *
+bit 960 O 1 *
+bit 959 O 1 *
+bit 958 I 1 IO_P146
+bit 957 O 1 IO_P146 956 1 Z
+bit 956 C 1 *
+bit 955 I 1 IO_P145
+bit 954 O 1 IO_P145 953 1 Z
+bit 953 C 1 *
+bit 952 I 1 IO_P141
+bit 951 O 1 IO_P141 950 1 Z
+bit 950 C 1 *
+bit 949 I 1 IO_P140
+bit 948 O 1 IO_P140 947 1 Z
+bit 947 C 1 *
+bit 946 O 1 *
+bit 945 O 1 *
+bit 944 O 1 *
+bit 943 O 1 *
+bit 942 O 1 *
+bit 941 O 1 *
+bit 940 O 1 *
+bit 939 O 1 *
+bit 938 O 1 *
+bit 937 O 1 *
+bit 936 O 1 *
+bit 935 O 1 *
+bit 934 O 1 *
+bit 933 O 1 *
+bit 932 O 1 *
+bit 931 O 1 *
+bit 930 O 1 *
+bit 929 O 1 *
+bit 928 I 1 IO_P139
+bit 927 O 1 IO_P139 926 1 Z
+bit 926 C 1 *
+bit 925 I 1 IO_P138
+bit 924 O 1 IO_P138 923 1 Z
+bit 923 C 1 *
+bit 922 I 1 IO_P136
+bit 921 O 1 IO_P136 920 1 Z
+bit 920 C 1 *
+bit 919 I 1 IO_P135
+bit 918 O 1 IO_P135 917 1 Z
+bit 917 C 1 *
+bit 916 O 1 *
+bit 915 O 1 *
+bit 914 O 1 *
+bit 913 O 1 *
+bit 912 O 1 *
+bit 911 O 1 *
+bit 910 O 1 *
+bit 909 O 1 *
+bit 908 O 1 *
+bit 907 I 1 IO_P134
+bit 906 O 1 IO_P134 905 1 Z
+bit 905 C 1 *
+bit 904 O 1 *
+bit 903 O 1 *
+bit 902 O 1 *
+bit 901 O 1 *
+bit 900 O 1 *
+bit 899 O 1 *
+bit 898 I 1 IO_P133
+bit 897 O 1 IO_P133 896 1 Z
+bit 896 C 1 *
+bit 895 I 1 IO_P132
+bit 894 O 1 IO_P132 893 1 Z
+bit 893 C 1 *
+bit 892 I 1 IO_P129
+bit 891 O 1 IO_P129 890 1 Z
+bit 890 C 1 *
+bit 889 O 1 *
+bit 888 O 1 *
+bit 887 O 1 *
+bit 886 O 1 *
+bit 885 O 1 *
+bit 884 O 1 *
+bit 883 O 1 *
+bit 882 O 1 *
+bit 881 O 1 *
+bit 880 I 1 IO_P127
+bit 879 O 1 IO_P127 878 1 Z
+bit 878 C 1 *
+bit 877 O 1 *
+bit 876 O 1 *
+bit 875 O 1 *
+bit 874 O 1 *
+bit 873 O 1 *
+bit 872 O 1 *
+bit 871 O 1 *
+bit 870 O 1 *
+bit 869 O 1 *
+bit 868 I 1 IO_P126
+bit 867 O 1 IO_P126 866 1 Z
+bit 866 C 1 *
+bit 865 I 1 IO_P125
+bit 864 O 1 IO_P125 863 1 Z
+bit 863 C 1 *
+bit 862 I 1 IO_P123
+bit 861 O 1 IO_P123 860 1 Z
+bit 860 C 1 *
+bit 859 I 1 IO_P122
+bit 858 O 1 IO_P122 857 1 Z
+bit 857 C 1 *
+bit 856 O 1 *
+bit 855 O 1 *
+bit 854 O 1 *
+bit 853 O 1 *
+bit 852 O 1 *
+bit 851 O 1 *
+bit 850 O 1 *
+bit 849 O 1 *
+bit 848 O 1 *
+bit 847 O 1 *
+bit 846 O 1 *
+bit 845 O 1 *
+bit 844 O 1 *
+bit 843 O 1 *
+bit 842 O 1 *
+bit 841 O 1 *
+bit 840 O 1 *
+bit 839 O 1 *
+bit 838 I 1 IO_P121
+bit 837 O 1 IO_P121 836 1 Z
+bit 836 C 1 *
+bit 835 I 1 IO_P120
+bit 834 O 1 IO_P120 833 1 Z
+bit 833 C 1 *
+bit 832 I 1 IO_P116
+bit 831 O 1 IO_P116 830 1 Z
+bit 830 C 1 *
+bit 829 I 1 IO_P115
+bit 828 O 1 IO_P115 827 1 Z
+bit 827 C 1 *
+bit 826 O 1 *
+bit 825 O 1 *
+bit 824 O 1 *
+bit 823 I 1 IO_P114
+bit 822 O 1 IO_P114 821 1 Z
+bit 821 C 1 *
+bit 820 I 1 IO_P113
+bit 819 O 1 IO_P113 818 1 Z
+bit 818 C 1 *
+bit 817 O 1 *
+bit 816 O 1 *
+bit 815 O 1 *
+bit 814 O 1 *
+bit 813 O 1 *
+bit 812 O 1 *
+bit 811 O 1 *
+bit 810 O 1 *
+bit 809 O 1 *
+bit 808 I 1 IO_P112
+bit 807 O 1 IO_P112 806 1 Z
+bit 806 C 1 *
+bit 805 I 1 IO_P111
+bit 804 O 1 IO_P111 803 1 Z
+bit 803 C 1 *
+bit 802 I 1 IO_P110
+bit 801 O 1 IO_P110 800 1 Z
+bit 800 C 1 *
+bit 799 O 1 *
+bit 798 O 1 *
+bit 797 O 1 *
+bit 796 O 1 *
+bit 795 O 1 *
+bit 794 O 1 *
+bit 793 O 1 *
+bit 792 O 1 *
+bit 791 O 1 *
+bit 790 O 1 *
+bit 789 O 1 *
+bit 788 O 1 *
+bit 787 I 1 IO_P109
+bit 786 O 1 IO_P109 785 1 Z
+bit 785 C 1 *
+bit 784 O 1 *
+bit 783 O 1 *
+bit 782 O 1 *
+bit 781 O 1 *
+bit 780 O 1 *
+bit 779 O 1 *
+bit 778 O 1 *
+bit 777 O 1 *
+bit 776 O 1 *
+bit 775 O 1 *
+bit 774 O 1 *
+bit 773 O 1 *
+bit 772 I 1 IO_P108
+bit 771 O 1 IO_P108 770 1 Z
+bit 770 C 1 *
+bit 769 I 1 INIT_P107
+bit 768 O 1 INIT_P107 767 1 Z
+bit 767 C 1 *
+bit 766 O 1 *
+bit 765 I 1 DONE_P104
+bit 764 O 1 DONE_P104 763 1 Z
+bit 763 C 1 *
+bit 762 I 1 IO_P102
+bit 761 O 1 IO_P102 760 1 Z
+bit 760 C 1 *
+bit 759 I 1 IO_P101
+bit 758 O 1 IO_P101 757 1 Z
+bit 757 C 1 *
+bit 756 O 1 *
+bit 755 O 1 *
+bit 754 O 1 *
+bit 753 O 1 *
+bit 752 O 1 *
+bit 751 O 1 *
+bit 750 O 1 *
+bit 749 O 1 *
+bit 748 O 1 *
+bit 747 O 1 *
+bit 746 O 1 *
+bit 745 O 1 *
+bit 744 I 1 IO_P100
+bit 743 O 1 IO_P100 742 1 Z
+bit 742 C 1 *
+bit 741 O 1 *
+bit 740 O 1 *
+bit 739 O 1 *
+bit 738 O 1 *
+bit 737 O 1 *
+bit 736 O 1 *
+bit 735 O 1 *
+bit 734 O 1 *
+bit 733 O 1 *
+bit 732 O 1 *
+bit 731 O 1 *
+bit 730 O 1 *
+bit 729 I 1 IO_P99
+bit 728 O 1 IO_P99 727 1 Z
+bit 727 C 1 *
+bit 726 I 1 IO_P98
+bit 725 O 1 IO_P98 724 1 Z
+bit 724 C 1 *
+bit 723 I 1 IO_P97
+bit 722 O 1 IO_P97 721 1 Z
+bit 721 C 1 *
+bit 720 O 1 *
+bit 719 O 1 *
+bit 718 O 1 *
+bit 717 O 1 *
+bit 716 O 1 *
+bit 715 O 1 *
+bit 714 O 1 *
+bit 713 O 1 *
+bit 712 O 1 *
+bit 711 I 1 IO_P96
+bit 710 O 1 IO_P96 709 1 Z
+bit 709 C 1 *
+bit 708 I 1 IO_P95
+bit 707 O 1 IO_P95 706 1 Z
+bit 706 C 1 *
+bit 705 O 1 *
+bit 704 O 1 *
+bit 703 O 1 *
+bit 702 I 1 IO_P94
+bit 701 O 1 IO_P94 700 1 Z
+bit 700 C 1 *
+bit 699 I 1 IO_P93
+bit 698 O 1 IO_P93 697 1 Z
+bit 697 C 1 *
+bit 696 I 1 IO_P89
+bit 695 O 1 IO_P89 694 1 Z
+bit 694 C 1 *
+bit 693 I 1 IO_P88
+bit 692 O 1 IO_P88 691 1 Z
+bit 691 C 1 *
+bit 690 O 1 *
+bit 689 O 1 *
+bit 688 O 1 *
+bit 687 O 1 *
+bit 686 O 1 *
+bit 685 O 1 *
+bit 684 O 1 *
+bit 683 O 1 *
+bit 682 O 1 *
+bit 681 O 1 *
+bit 680 O 1 *
+bit 679 O 1 *
+bit 678 O 1 *
+bit 677 O 1 *
+bit 676 O 1 *
+bit 675 O 1 *
+bit 674 O 1 *
+bit 673 O 1 *
+bit 672 I 1 IO_P87
+bit 671 O 1 IO_P87 670 1 Z
+bit 670 C 1 *
+bit 669 I 1 IO_P86
+bit 668 O 1 IO_P86 667 1 Z
+bit 667 C 1 *
+bit 666 I 1 IO_P84
+bit 665 O 1 IO_P84 664 1 Z
+bit 664 C 1 *
+bit 663 I 1 IO_P83
+bit 662 O 1 IO_P83 661 1 Z
+bit 661 C 1 *
+bit 660 O 1 *
+bit 659 O 1 *
+bit 658 O 1 *
+bit 657 O 1 *
+bit 656 O 1 *
+bit 655 O 1 *
+bit 654 O 1 *
+bit 653 O 1 *
+bit 652 O 1 *
+bit 651 I 1 IO_P82
+bit 650 O 1 IO_P82 649 1 Z
+bit 649 C 1 *
+bit 648 O 1 *
+bit 647 O 1 *
+bit 646 O 1 *
+bit 645 O 1 *
+bit 644 O 1 *
+bit 643 O 1 *
+bit 642 O 1 *
+bit 641 O 1 *
+bit 640 O 1 *
+bit 639 I 1 IO_P81
+bit 638 O 1 IO_P81 637 1 Z
+bit 637 C 1 *
+bit 636 I 1 GCK0_P80
+bit 635 I 1 GCK1_P77
+bit 634 I 1 IO_P75
+bit 633 O 1 IO_P75 632 1 Z
+bit 632 C 1 *
+bit 631 O 1 *
+bit 630 O 1 *
+bit 629 O 1 *
+bit 628 O 1 *
+bit 627 O 1 *
+bit 626 O 1 *
+bit 625 O 1 *
+bit 624 O 1 *
+bit 623 O 1 *
+bit 622 O 1 *
+bit 621 O 1 *
+bit 620 O 1 *
+bit 619 O 1 *
+bit 618 O 1 *
+bit 617 O 1 *
+bit 616 O 1 *
+bit 615 O 1 *
+bit 614 O 1 *
+bit 613 O 1 *
+bit 612 O 1 *
+bit 611 O 1 *
+bit 610 I 1 IO_P74
+bit 609 O 1 IO_P74 608 1 Z
+bit 608 C 1 *
+bit 607 I 1 IO_P73
+bit 606 O 1 IO_P73 605 1 Z
+bit 605 C 1 *
+bit 604 I 1 IO_P71
+bit 603 O 1 IO_P71 602 1 Z
+bit 602 C 1 *
+bit 601 I 1 IO_P70
+bit 600 O 1 IO_P70 599 1 Z
+bit 599 C 1 *
+bit 598 O 1 *
+bit 597 O 1 *
+bit 596 O 1 *
+bit 595 O 1 *
+bit 594 O 1 *
+bit 593 O 1 *
+bit 592 O 1 *
+bit 591 O 1 *
+bit 590 O 1 *
+bit 589 O 1 *
+bit 588 O 1 *
+bit 587 O 1 *
+bit 586 O 1 *
+bit 585 O 1 *
+bit 584 O 1 *
+bit 583 O 1 *
+bit 582 O 1 *
+bit 581 O 1 *
+bit 580 I 1 IO_P69
+bit 579 O 1 IO_P69 578 1 Z
+bit 578 C 1 *
+bit 577 I 1 IO_P68
+bit 576 O 1 IO_P68 575 1 Z
+bit 575 C 1 *
+bit 574 I 1 IO_P64
+bit 573 O 1 IO_P64 572 1 Z
+bit 572 C 1 *
+bit 571 I 1 IO_P63
+bit 570 O 1 IO_P63 569 1 Z
+bit 569 C 1 *
+bit 568 O 1 *
+bit 567 O 1 *
+bit 566 O 1 *
+bit 565 I 1 IO_P62
+bit 564 O 1 IO_P62 563 1 Z
+bit 563 C 1 *
+bit 562 I 1 IO_P61
+bit 561 O 1 IO_P61 560 1 Z
+bit 560 C 1 *
+bit 559 O 1 *
+bit 558 O 1 *
+bit 557 O 1 *
+bit 556 O 1 *
+bit 555 O 1 *
+bit 554 O 1 *
+bit 553 O 1 *
+bit 552 O 1 *
+bit 551 O 1 *
+bit 550 I 1 IO_P60
+bit 549 O 1 IO_P60 548 1 Z
+bit 548 C 1 *
+bit 547 I 1 IO_P59
+bit 546 O 1 IO_P59 545 1 Z
+bit 545 C 1 *
+bit 544 I 1 IO_P58
+bit 543 O 1 IO_P58 542 1 Z
+bit 542 C 1 *
+bit 541 O 1 *
+bit 540 O 1 *
+bit 539 O 1 *
+bit 538 O 1 *
+bit 537 O 1 *
+bit 536 O 1 *
+bit 535 O 1 *
+bit 534 O 1 *
+bit 533 O 1 *
+bit 532 O 1 *
+bit 531 O 1 *
+bit 530 O 1 *
+bit 529 I 1 IO_P57
+bit 528 O 1 IO_P57 527 1 Z
+bit 527 C 1 *
+bit 526 O 1 *
+bit 525 O 1 *
+bit 524 O 1 *
+bit 523 O 1 *
+bit 522 O 1 *
+bit 521 O 1 *
+bit 520 O 1 *
+bit 519 O 1 *
+bit 518 O 1 *
+bit 517 O 1 *
+bit 516 O 1 *
+bit 515 O 1 *
+bit 514 I 1 IO_P56
+bit 513 O 1 IO_P56 512 1 Z
+bit 512 C 1 *
+bit 511 I 1 IO_P55
+bit 510 O 1 IO_P55 509 1 Z
+bit 509 C 1 *
+bit 508 I 1 M2_P54
+bit 507 I 1 M0_P52
+bit 506 I 1 M1_P50
+bit 505 I 1 IO_P49
+bit 504 O 1 IO_P49 503 1 Z
+bit 503 C 1 *
+bit 502 I 1 IO_P48
+bit 501 O 1 IO_P48 500 1 Z
+bit 500 C 1 *
+bit 499 O 1 *
+bit 498 O 1 *
+bit 497 O 1 *
+bit 496 O 1 *
+bit 495 O 1 *
+bit 494 O 1 *
+bit 493 O 1 *
+bit 492 O 1 *
+bit 491 O 1 *
+bit 490 O 1 *
+bit 489 O 1 *
+bit 488 O 1 *
+bit 487 I 1 IO_P47
+bit 486 O 1 IO_P47 485 1 Z
+bit 485 C 1 *
+bit 484 O 1 *
+bit 483 O 1 *
+bit 482 O 1 *
+bit 481 O 1 *
+bit 480 O 1 *
+bit 479 O 1 *
+bit 478 O 1 *
+bit 477 O 1 *
+bit 476 O 1 *
+bit 475 O 1 *
+bit 474 O 1 *
+bit 473 O 1 *
+bit 472 I 1 IO_P46
+bit 471 O 1 IO_P46 470 1 Z
+bit 470 C 1 *
+bit 469 I 1 IO_P45
+bit 468 O 1 IO_P45 467 1 Z
+bit 467 C 1 *
+bit 466 I 1 IO_P44
+bit 465 O 1 IO_P44 464 1 Z
+bit 464 C 1 *
+bit 463 O 1 *
+bit 462 O 1 *
+bit 461 O 1 *
+bit 460 O 1 *
+bit 459 O 1 *
+bit 458 O 1 *
+bit 457 O 1 *
+bit 456 O 1 *
+bit 455 O 1 *
+bit 454 I 1 IO_P43
+bit 453 O 1 IO_P43 452 1 Z
+bit 452 C 1 *
+bit 451 I 1 IO_P42
+bit 450 O 1 IO_P42 449 1 Z
+bit 449 C 1 *
+bit 448 O 1 *
+bit 447 O 1 *
+bit 446 O 1 *
+bit 445 I 1 IO_P41
+bit 444 O 1 IO_P41 443 1 Z
+bit 443 C 1 *
+bit 442 I 1 IO_P40
+bit 441 O 1 IO_P40 440 1 Z
+bit 440 C 1 *
+bit 439 I 1 IO_P36
+bit 438 O 1 IO_P36 437 1 Z
+bit 437 C 1 *
+bit 436 I 1 IO_P35
+bit 435 O 1 IO_P35 434 1 Z
+bit 434 C 1 *
+bit 433 O 1 *
+bit 432 O 1 *
+bit 431 O 1 *
+bit 430 O 1 *
+bit 429 O 1 *
+bit 428 O 1 *
+bit 427 O 1 *
+bit 426 O 1 *
+bit 425 O 1 *
+bit 424 O 1 *
+bit 423 O 1 *
+bit 422 O 1 *
+bit 421 O 1 *
+bit 420 O 1 *
+bit 419 O 1 *
+bit 418 O 1 *
+bit 417 O 1 *
+bit 416 O 1 *
+bit 415 I 1 IO_P34
+bit 414 O 1 IO_P34 413 1 Z
+bit 413 C 1 *
+bit 412 I 1 IO_P33
+bit 411 O 1 IO_P33 410 1 Z
+bit 410 C 1 *
+bit 409 I 1 IO_P31
+bit 408 O 1 IO_P31 407 1 Z
+bit 407 C 1 *
+bit 406 I 1 IO_P30
+bit 405 O 1 IO_P30 404 1 Z
+bit 404 C 1 *
+bit 403 O 1 *
+bit 402 O 1 *
+bit 401 O 1 *
+bit 400 O 1 *
+bit 399 O 1 *
+bit 398 O 1 *
+bit 397 O 1 *
+bit 396 O 1 *
+bit 395 O 1 *
+bit 394 I 1 IO_P29
+bit 393 O 1 IO_P29 392 1 Z
+bit 392 C 1 *
+bit 391 O 1 *
+bit 390 O 1 *
+bit 389 O 1 *
+bit 388 O 1 *
+bit 387 O 1 *
+bit 386 O 1 *
+bit 385 O 1 *
+bit 384 O 1 *
+bit 383 O 1 *
+bit 382 I 1 IO_P27
+bit 381 O 1 IO_P27 380 1 Z
+bit 380 C 1 *
+bit 379 I 1 IO_P24
+bit 378 O 1 IO_P24 377 1 Z
+bit 377 C 1 *
+bit 376 I 1 IO_P23
+bit 375 O 1 IO_P23 374 1 Z
+bit 374 C 1 *
+bit 373 O 1 *
+bit 372 O 1 *
+bit 371 O 1 *
+bit 370 O 1 *
+bit 369 O 1 *
+bit 368 O 1 *
+bit 367 I 1 IO_P22
+bit 366 O 1 IO_P22 365 1 Z
+bit 365 C 1 *
+bit 364 O 1 *
+bit 363 O 1 *
+bit 362 O 1 *
+bit 361 O 1 *
+bit 360 O 1 *
+bit 359 O 1 *
+bit 358 O 1 *
+bit 357 O 1 *
+bit 356 O 1 *
+bit 355 I 1 IO_P21
+bit 354 O 1 IO_P21 353 1 Z
+bit 353 C 1 *
+bit 352 I 1 IO_P20
+bit 351 O 1 IO_P20 350 1 Z
+bit 350 C 1 *
+bit 349 I 1 IO_P18
+bit 348 O 1 IO_P18 347 1 Z
+bit 347 C 1 *
+bit 346 I 1 IO_P17
+bit 345 O 1 IO_P17 344 1 Z
+bit 344 C 1 *
+bit 343 O 1 *
+bit 342 O 1 *
+bit 341 O 1 *
+bit 340 O 1 *
+bit 339 O 1 *
+bit 338 O 1 *
+bit 337 O 1 *
+bit 336 O 1 *
+bit 335 O 1 *
+bit 334 O 1 *
+bit 333 O 1 *
+bit 332 O 1 *
+bit 331 O 1 *
+bit 330 O 1 *
+bit 329 O 1 *
+bit 328 O 1 *
+bit 327 O 1 *
+bit 326 O 1 *
+bit 325 I 1 IO_P16
+bit 324 O 1 IO_P16 323 1 Z
+bit 323 C 1 *
+bit 322 I 1 IO_P15
+bit 321 O 1 IO_P15 320 1 Z
+bit 320 C 1 *
+bit 319 I 1 IO_P11
+bit 318 O 1 IO_P11 317 1 Z
+bit 317 C 1 *
+bit 316 I 1 IO_P10
+bit 315 O 1 IO_P10 314 1 Z
+bit 314 C 1 *
+bit 313 O 1 *
+bit 312 O 1 *
+bit 311 O 1 *
+bit 310 I 1 IO_P9
+bit 309 O 1 IO_P9 308 1 Z
+bit 308 C 1 *
+bit 307 I 1 IO_P8
+bit 306 O 1 IO_P8 305 1 Z
+bit 305 C 1 *
+bit 304 O 1 *
+bit 303 O 1 *
+bit 302 O 1 *
+bit 301 O 1 *
+bit 300 O 1 *
+bit 299 O 1 *
+bit 298 O 1 *
+bit 297 O 1 *
+bit 296 O 1 *
+bit 295 I 1 IO_P7
+bit 294 O 1 IO_P7 293 1 Z
+bit 293 C 1 *
+bit 292 I 1 IO_P6
+bit 291 O 1 IO_P6 290 1 Z
+bit 290 C 1 *
+bit 289 I 1 IO_P5
+bit 288 O 1 IO_P5 287 1 Z
+bit 287 C 1 *
+bit 286 O 1 *
+bit 285 O 1 *
+bit 284 O 1 *
+bit 283 O 1 *
+bit 282 O 1 *
+bit 281 O 1 *
+bit 280 O 1 *
+bit 279 O 1 *
+bit 278 O 1 *
+bit 277 O 1 *
+bit 276 O 1 *
+bit 275 O 1 *
+bit 274 I 1 IO_P4
+bit 273 O 1 IO_P4 272 1 Z
+bit 272 C 1 *
+bit 271 O 1 *
+bit 270 O 1 *
+bit 269 O 1 *
+bit 268 O 1 *
+bit 267 O 1 *
+bit 266 O 1 *
+bit 265 O 1 *
+bit 264 O 1 *
+bit 263 O 1 *
+bit 262 O 1 *
+bit 261 O 1 *
+bit 260 O 1 *
+bit 259 I 1 IO_P3
+bit 258 O 1 IO_P3 257 1 Z
+bit 257 C 1 *
+bit 256 O 1 *
+bit 255 O 1 *
+bit 254 O 1 *
+bit 253 O 1 *
+bit 252 O 1 *
+bit 251 O 1 *
+bit 250 I 1 IO_P206
+bit 249 O 1 IO_P206 248 1 Z
+bit 248 C 1 *
+bit 247 O 1 *
+bit 246 O 1 *
+bit 245 O 1 *
+bit 244 O 1 *
+bit 243 O 1 *
+bit 242 O 1 *
+bit 241 O 1 *
+bit 240 O 1 *
+bit 239 O 1 *
+bit 238 O 1 *
+bit 237 O 1 *
+bit 236 O 1 *
+bit 235 I 1 IO_P205
+bit 234 O 1 IO_P205 233 1 Z
+bit 233 C 1 *
+bit 232 O 1 *
+bit 231 O 1 *
+bit 230 O 1 *
+bit 229 O 1 *
+bit 228 O 1 *
+bit 227 O 1 *
+bit 226 O 1 *
+bit 225 O 1 *
+bit 224 O 1 *
+bit 223 O 1 *
+bit 222 O 1 *
+bit 221 O 1 *
+bit 220 I 1 IO_P204
+bit 219 O 1 IO_P204 218 1 Z
+bit 218 C 1 *
+bit 217 I 1 IO_P203
+bit 216 O 1 IO_P203 215 1 Z
+bit 215 C 1 *
+bit 214 I 1 IO_P202
+bit 213 O 1 IO_P202 212 1 Z
+bit 212 C 1 *
+bit 211 O 1 *
+bit 210 O 1 *
+bit 209 O 1 *
+bit 208 O 1 *
+bit 207 O 1 *
+bit 206 O 1 *
+bit 205 O 1 *
+bit 204 O 1 *
+bit 203 O 1 *
+bit 202 I 1 IO_P201
+bit 201 O 1 IO_P201 200 1 Z
+bit 200 C 1 *
+bit 199 I 1 IO_P200
+bit 198 O 1 IO_P200 197 1 Z
+bit 197 C 1 *
+bit 196 O 1 *
+bit 195 O 1 *
+bit 194 O 1 *
+bit 193 I 1 IO_P199
+bit 192 O 1 IO_P199 191 1 Z
+bit 191 C 1 *
+bit 190 I 1 IO_P198
+bit 189 O 1 IO_P198 188 1 Z
+bit 188 C 1 *
+bit 187 I 1 IO_P194
+bit 186 O 1 IO_P194 185 1 Z
+bit 185 C 1 *
+bit 184 I 1 IO_P193
+bit 183 O 1 IO_P193 182 1 Z
+bit 182 C 1 *
+bit 181 O 1 *
+bit 180 O 1 *
+bit 179 O 1 *
+bit 178 O 1 *
+bit 177 O 1 *
+bit 176 O 1 *
+bit 175 O 1 *
+bit 174 O 1 *
+bit 173 O 1 *
+bit 172 O 1 *
+bit 171 O 1 *
+bit 170 O 1 *
+bit 169 O 1 *
+bit 168 O 1 *
+bit 167 O 1 *
+bit 166 O 1 *
+bit 165 O 1 *
+bit 164 O 1 *
+bit 163 I 1 IO_P192
+bit 162 O 1 IO_P192 161 1 Z
+bit 161 C 1 *
+bit 160 I 1 IO_P191
+bit 159 O 1 IO_P191 158 1 Z
+bit 158 C 1 *
+bit 157 I 1 IO_P189
+bit 156 O 1 IO_P189 155 1 Z
+bit 155 C 1 *
+bit 154 I 1 IO_P188
+bit 153 O 1 IO_P188 152 1 Z
+bit 152 C 1 *
+bit 151 O 1 *
+bit 150 O 1 *
+bit 149 O 1 *
+bit 148 O 1 *
+bit 147 O 1 *
+bit 146 O 1 *
+bit 145 O 1 *
+bit 144 O 1 *
+bit 143 O 1 *
+bit 142 O 1 *
+bit 141 O 1 *
+bit 140 O 1 *
+bit 139 O 1 *
+bit 138 O 1 *
+bit 137 O 1 *
+bit 136 O 1 *
+bit 135 O 1 *
+bit 134 O 1 *
+bit 133 O 1 *
+bit 132 O 1 *
+bit 131 O 1 *
+bit 130 I 1 IO_P187
+bit 129 O 1 IO_P187 128 1 Z
+bit 128 C 1 *
+bit 127 I 1 GCK3_P185
+bit 126 I 1 GCK2_P182
+bit 125 I 1 IO_P181
+bit 124 O 1 IO_P181 123 1 Z
+bit 123 C 1 *
+bit 122 O 1 *
+bit 121 O 1 *
+bit 120 O 1 *
+bit 119 O 1 *
+bit 118 O 1 *
+bit 117 O 1 *
+bit 116 O 1 *
+bit 115 O 1 *
+bit 114 O 1 *
+bit 113 I 1 IO_P180
+bit 112 O 1 IO_P180 111 1 Z
+bit 111 C 1 *
+bit 110 O 1 *
+bit 109 O 1 *
+bit 108 O 1 *
+bit 107 O 1 *
+bit 106 O 1 *
+bit 105 O 1 *
+bit 104 O 1 *
+bit 103 O 1 *
+bit 102 O 1 *
+bit 101 I 1 IO_P179
+bit 100 O 1 IO_P179 99 1 Z
+bit 99 C 1 *
+bit 98 I 1 IO_P178
+bit 97 O 1 IO_P178 96 1 Z
+bit 96 C 1 *
+bit 95 I 1 IO_P176
+bit 94 O 1 IO_P176 93 1 Z
+bit 93 C 1 *
+bit 92 I 1 IO_P175
+bit 91 O 1 IO_P175 90 1 Z
+bit 90 C 1 *
+bit 89 O 1 *
+bit 88 O 1 *
+bit 87 O 1 *
+bit 86 O 1 *
+bit 85 O 1 *
+bit 84 O 1 *
+bit 83 O 1 *
+bit 82 O 1 *
+bit 81 O 1 *
+bit 80 O 1 *
+bit 79 O 1 *
+bit 78 O 1 *
+bit 77 O 1 *
+bit 76 O 1 *
+bit 75 O 1 *
+bit 74 O 1 *
+bit 73 O 1 *
+bit 72 O 1 *
+bit 71 I 1 IO_P174
+bit 70 O 1 IO_P174 69 1 Z
+bit 69 C 1 *
+bit 68 I 1 IO_P173
+bit 67 O 1 IO_P173 66 1 Z
+bit 66 C 1 *
+bit 65 I 1 IO_P169
+bit 64 O 1 IO_P169 63 1 Z
+bit 63 C 1 *
+bit 62 I 1 IO_P168
+bit 61 O 1 IO_P168 60 1 Z
+bit 60 C 1 *
+bit 59 O 1 *
+bit 58 O 1 *
+bit 57 O 1 *
+bit 56 I 1 IO_P167
+bit 55 O 1 IO_P167 54 1 Z
+bit 54 C 1 *
+bit 53 I 1 IO_P166
+bit 52 O 1 IO_P166 51 1 Z
+bit 51 C 1 *
+bit 50 O 1 *
+bit 49 O 1 *
+bit 48 O 1 *
+bit 47 O 1 *
+bit 46 O 1 *
+bit 45 O 1 *
+bit 44 O 1 *
+bit 43 O 1 *
+bit 42 O 1 *
+bit 41 I 1 IO_P165
+bit 40 O 1 IO_P165 39 1 Z
+bit 39 C 1 *
+bit 38 I 1 IO_P164
+bit 37 O 1 IO_P164 36 1 Z
+bit 36 C 1 *
+bit 35 I 1 IO_P163
+bit 34 O 1 IO_P163 33 1 Z
+bit 33 C 1 *
+bit 32 O 1 *
+bit 31 O 1 *
+bit 30 O 1 *
+bit 29 O 1 *
+bit 28 O 1 *
+bit 27 O 1 *
+bit 26 O 1 *
+bit 25 O 1 *
+bit 24 O 1 *
+bit 23 O 1 *
+bit 22 O 1 *
+bit 21 O 1 *
+bit 20 I 1 IO_P162
+bit 19 O 1 IO_P162 18 1 Z
+bit 18 C 1 *
+bit 17 O 1 *
+bit 16 O 1 *
+bit 15 O 1 *
+bit 14 O 1 *
+bit 13 O 1 *
+bit 12 O 1 *
+bit 11 O 1 *
+bit 10 O 1 *
+bit 9 O 1 *
+bit 8 O 1 *
+bit 7 O 1 *
+bit 6 O 1 *
+bit 5 I 1 IO_P161
+bit 4 O 1 IO_P161 3 1 Z
+bit 3 C 1 *
+bit 2 I 1 IO_P160
+bit 1 O 1 IO_P160 0 1 Z
+bit 0 C 1 *
--- /dev/null
+#
+# $Id$
+#
+# Copyright (C) 2003 Tower Technologies s.r.l.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Arnim Laeuger <arniml@users.sourceforge.net>, 2005.
+#
+
+# bits 31-28 of the Device Identification Register
+1001 xc2s300e 9
--- /dev/null
+#
+# $Id$
+#
+# JTAG package script for XC2S300E-FG456
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Arnim Laeuger <arniml@users.sourceforge.net>
+#
+
+salias CCLK_B22 CCLK_PAD437
+salias DONE_W20 DONE_PAD313
+salias GCK0_AA12 GCK0_PAD254
+salias GCK1_AB12 GCK1_PAD250
+salias GCK2_A11 GCK2_PAD500
+salias GCK3_C11 GCK3_PAD2
+salias INIT_W21 INIT_PAD317
+salias IO_A10 IO_PAD9
+salias IO_A12 IO_PAD499
+salias IO_A13 IO_PAD490
+salias IO_A14 IO_PAD481
+salias IO_A15 IO_PAD475
+salias IO_A16 IO_PAD466
+salias IO_A17 IO_PAD456
+salias IO_A18 IO_PAD452
+salias IO_A19 IO_PAD449
+salias IO_A20 IO_PAD445
+salias IO_A3 IO_PAD54
+salias IO_A4 IO_PAD53
+salias IO_A5 IO_PAD47
+salias IO_A6 IO_PAD42
+salias IO_A7 IO_PAD35
+salias IO_A8 IO_PAD27
+salias IO_A9 IO_PAD19
+salias IO_AA10 IO_PAD231
+salias IO_AA11 IO_PAD246
+salias IO_AA13 IO_PAD261
+salias IO_AA14 IO_PAD271
+salias IO_AA15 IO_PAD278
+salias IO_AA16 IO_PAD288
+salias IO_AA17 IO_PAD293
+salias IO_AA18 IO_PAD300
+salias IO_AA19 IO_PAD305
+salias IO_AA20 IO_PAD310
+salias IO_AA3 IO_PAD193
+salias IO_AA5 IO_PAD196
+salias IO_AA6 IO_PAD203
+salias IO_AA7 IO_PAD209
+salias IO_AA8 IO_PAD215
+salias IO_AA9 IO_PAD224
+salias IO_AB10 IO_PAD225
+salias IO_AB11 IO_PAD247
+salias IO_AB13 IO_PAD260
+salias IO_AB14 IO_PAD270
+salias IO_AB15 IO_PAD272
+salias IO_AB16 IO_PAD286
+salias IO_AB17 IO_PAD287
+salias IO_AB18 IO_PAD297
+salias IO_AB19 IO_PAD304
+salias IO_AB20 IO_PAD309
+salias IO_AB21 IO_PAD307
+salias IO_AB3 IO_PAD194
+salias IO_AB4 IO_PAD195
+salias IO_AB5 IO_PAD200
+salias IO_AB6 IO_PAD201
+salias IO_AB7 IO_PAD208
+salias IO_AB8 IO_PAD214
+salias IO_AB9 IO_PAD223
+salias IO_B10 IO_PAD10
+salias IO_B11 IO_PAD5
+salias IO_B12 IO_PAD494
+salias IO_B13 IO_PAD489
+salias IO_B14 IO_PAD480
+salias IO_B15 IO_PAD474
+salias IO_B16 IO_PAD465
+salias IO_B17 IO_PAD455
+salias IO_B18 IO_PAD451
+salias IO_B19 IO_PAD448
+salias IO_B20 IO_PAD444
+salias IO_B3 IO_PAD55
+salias IO_B4 IO_PAD50
+salias IO_B5 IO_PAD48
+salias IO_B6 IO_PAD43
+salias IO_B7 IO_PAD36
+salias IO_B8 IO_PAD28
+salias IO_B9 IO_PAD20
+salias IO_C10 IO_PAD12
+salias IO_C12 IO_PAD493
+salias IO_C13 IO_PAD484
+salias IO_C14 IO_PAD478
+salias IO_C15 IO_PAD469
+salias IO_C16 IO_PAD463
+salias IO_C17 IO_PAD454
+salias IO_C18 IO_PAD447
+salias IO_C1 IO_PAD67
+salias IO_C21 IO_PAD436
+salias IO_C22 IO_PAD435
+salias IO_C2 IO_PAD66
+salias IO_C4 IO_PAD56
+salias IO_C5 IO_PAD51
+salias IO_C6 IO_PAD46
+salias IO_C7 IO_PAD37
+salias IO_C8 IO_PAD33
+salias IO_C9 IO_PAD22
+salias IO_D10 IO_PAD13
+salias IO_D11 IO_PAD6
+salias IO_D12 IO_PAD496
+salias IO_D13 IO_PAD483
+salias IO_D14 IO_PAD477
+salias IO_D15 IO_PAD468
+salias IO_D16 IO_PAD462
+salias IO_D17 IO_PAD453
+salias IO_D18 IO_PAD446
+salias IO_D1 IO_PAD69
+salias IO_D20 IO_PAD433
+salias IO_D21 IO_PAD428
+salias IO_D22 IO_PAD427
+salias IO_D2 IO_PAD68
+salias IO_D3 IO_PAD65
+salias IO_D5 IO_PAD58
+salias IO_D6 IO_PAD49
+salias IO_D7 IO_PAD39
+salias IO_D8 IO_PAD34
+salias IO_D9 IO_PAD24
+salias IO_E10 IO_PAD21
+salias IO_E11 IO_PAD11
+salias IO_E12 IO_PAD497
+salias IO_E13 IO_PAD482
+salias IO_E14 IO_PAD476
+salias IO_E15 IO_PAD461
+salias IO_E16 IO_PAD459
+salias IO_E17 IO_PAD460
+salias IO_E19 IO_PAD432
+salias IO_E1 IO_PAD73
+salias IO_E20 IO_PAD431
+salias IO_E21 IO_PAD422
+salias IO_E22 IO_PAD418
+salias IO_E2 IO_PAD71
+salias IO_E3 IO_PAD72
+salias IO_E7 IO_PAD41
+salias IO_E8 IO_PAD40
+salias IO_E9 IO_PAD26
+salias IO_F10 IO_PAD18
+salias IO_F11 IO_PAD7
+salias IO_F12 IO_PAD498
+salias IO_F13 IO_PAD491
+salias IO_F14 IO_PAD467
+salias IO_F18 IO_PAD426
+salias IO_F19 IO_PAD425
+salias IO_F1 IO_PAD81
+salias IO_F20 IO_PAD423
+salias IO_F21 IO_PAD419
+salias IO_F22 IO_PAD412
+salias IO_F2 IO_PAD80
+salias IO_F3 IO_PAD77
+salias IO_F4 IO_PAD76
+salias IO_F5 IO_PAD74
+salias IO_F9 IO_PAD25
+salias IO_G18 IO_PAD417
+salias IO_G19 IO_PAD416
+salias IO_G1 IO_PAD87
+salias IO_G20 IO_PAD415
+salias IO_G21 IO_PAD413
+salias IO_G22 IO_PAD411
+salias IO_G2 IO_PAD86
+salias IO_G3 IO_PAD84
+salias IO_G4 IO_PAD83
+salias IO_G5 IO_PAD82
+salias IO_H18 IO_PAD410
+salias IO_H19 IO_PAD409
+salias IO_H1 IO_PAD96
+salias IO_H20 IO_PAD404
+salias IO_H21 IO_PAD403
+salias IO_H22 IO_PAD400
+salias IO_H2 IO_PAD95
+salias IO_H3 IO_PAD89
+salias IO_H4 IO_PAD90
+salias IO_H5 IO_PAD88
+salias IO_J17 IO_PAD402
+salias IO_J18 IO_PAD401
+salias IO_J19 IO_PAD398
+salias IO_J1 IO_PAD103
+salias IO_J20 IO_PAD397
+salias IO_J21 IO_PAD396
+salias IO_J22 IO_PAD395
+salias IO_J2 IO_PAD102
+salias IO_J3 IO_PAD101
+salias IO_J4 IO_PAD98
+salias IO_J5 IO_PAD99
+salias IO_J6 IO_PAD97
+salias IO_K17 IO_PAD394
+salias IO_K18 IO_PAD389
+salias IO_K19 IO_PAD388
+salias IO_K1 IO_PAD114
+salias IO_K20 IO_PAD387
+salias IO_K21 IO_PAD386
+salias IO_K22 IO_PAD385
+salias IO_K2 IO_PAD112
+salias IO_K3 IO_PAD110
+salias IO_K4 IO_PAD111
+salias IO_K5 IO_PAD104
+salias IO_K6 IO_PAD105
+salias IO_L17 IO_PAD383
+salias IO_L18 IO_PAD382
+salias IO_L19 IO_PAD381
+salias IO_L1 IO_PAD115
+salias IO_L20 IO_PAD380
+salias IO_L21 IO_PAD379
+salias IO_L22 IO_PAD375
+salias IO_L2 IO_PAD118
+salias IO_L3 IO_PAD117
+salias IO_L4 IO_PAD119
+salias IO_L5 IO_PAD120
+salias IO_L6 IO_PAD121
+salias IO_M17 IO_PAD372
+salias IO_M18 IO_PAD370
+salias IO_M19 IO_PAD371
+salias IO_M1 IO_PAD125
+salias IO_M20 IO_PAD367
+salias IO_M21 IO_PAD368
+salias IO_M22 IO_PAD365
+salias IO_M2 IO_PAD128
+salias IO_M3 IO_PAD129
+salias IO_M4 IO_PAD130
+salias IO_M5 IO_PAD132
+salias IO_M6 IO_PAD133
+salias IO_N17 IO_PAD364
+salias IO_N18 IO_PAD363
+salias IO_N19 IO_PAD357
+salias IO_N1 IO_PAD134
+salias IO_N20 IO_PAD358
+salias IO_N21 IO_PAD355
+salias IO_N22 IO_PAD354
+salias IO_N2 IO_PAD135
+salias IO_N3 IO_PAD136
+salias IO_N4 IO_PAD141
+salias IO_N5 IO_PAD142
+salias IO_N6 IO_PAD143
+salias IO_P17 IO_PAD356
+salias IO_P18 IO_PAD351
+salias IO_P19 IO_PAD352
+salias IO_P1 IO_PAD144
+salias IO_P20 IO_PAD350
+salias IO_P21 IO_PAD349
+salias IO_P22 IO_PAD348
+salias IO_P2 IO_PAD145
+salias IO_P3 IO_PAD148
+salias IO_P4 IO_PAD149
+salias IO_P5 IO_PAD150
+salias IO_P6 IO_PAD151
+salias IO_R18 IO_PAD342
+salias IO_R19 IO_PAD343
+salias IO_R1 IO_PAD147
+salias IO_R20 IO_PAD341
+salias IO_R21 IO_PAD339
+salias IO_R22 IO_PAD340
+salias IO_R2 IO_PAD156
+salias IO_R3 IO_PAD157
+salias IO_R4 IO_PAD158
+salias IO_R5 IO_PAD159
+salias IO_T18 IO_PAD336
+salias IO_T19 IO_PAD337
+salias IO_T1 IO_PAD165
+salias IO_T20 IO_PAD335
+salias IO_T21 IO_PAD333
+salias IO_T22 IO_PAD334
+salias IO_T2 IO_PAD160
+salias IO_T3 IO_PAD162
+salias IO_T4 IO_PAD163
+salias IO_T5 IO_PAD164
+salias IO_U10 IO_PAD239
+salias IO_U11 IO_PAD240
+salias IO_U12 IO_PAD258
+salias IO_U13 IO_PAD269
+salias IO_U14 IO_PAD276
+salias IO_U18 IO_PAD329
+salias IO_U19 IO_PAD330
+salias IO_U1 IO_PAD166
+salias IO_U20 IO_PAD327
+salias IO_U21 IO_PAD326
+salias IO_U22 IO_PAD325
+salias IO_U2 IO_PAD169
+salias IO_U3 IO_PAD170
+salias IO_U4 IO_PAD172
+salias IO_U9 IO_PAD230
+salias IO_V10 IO_PAD238
+salias IO_V11 IO_PAD242
+salias IO_V12 IO_PAD257
+salias IO_V13 IO_PAD264
+salias IO_V14 IO_PAD277
+salias IO_V15 IO_PAD285
+salias IO_V16 IO_PAD292
+salias IO_V17 IO_PAD299
+salias IO_V19 IO_PAD321
+salias IO_V1 IO_PAD173
+salias IO_V20 IO_PAD322
+salias IO_V21 IO_PAD320
+salias IO_V22 IO_PAD324
+salias IO_V2 IO_PAD175
+salias IO_V3 IO_PAD178
+salias IO_V4 IO_PAD179
+salias IO_V6 IO_PAD204
+salias IO_V7 IO_PAD211
+salias IO_V8 IO_PAD217
+salias IO_V9 IO_PAD229
+salias IO_W10 IO_PAD232
+salias IO_W11 IO_PAD243
+salias IO_W12 IO_PAD256
+salias IO_W13 IO_PAD263
+salias IO_W14 IO_PAD275
+salias IO_W15 IO_PAD284
+salias IO_W16 IO_PAD291
+salias IO_W17 IO_PAD298
+salias IO_W18 IO_PAD302
+salias IO_W1 IO_PAD174
+salias IO_W22 IO_PAD319
+salias IO_W2 IO_PAD177
+salias IO_W3 IO_PAD183
+salias IO_W5 IO_PAD197
+salias IO_W6 IO_PAD205
+salias IO_W7 IO_PAD212
+salias IO_W8 IO_PAD218
+salias IO_W9 IO_PAD226
+salias IO_Y10 IO_PAD233
+salias IO_Y11 IO_PAD245
+salias IO_Y12 IO_PAD255
+salias IO_Y13 IO_PAD262
+salias IO_Y14 IO_PAD273
+salias IO_Y15 IO_PAD279
+salias IO_Y16 IO_PAD290
+salias IO_Y17 IO_PAD294
+salias IO_Y18 IO_PAD301
+salias IO_Y19 IO_PAD306
+salias IO_Y1 IO_PAD180
+salias IO_Y22 IO_PAD318
+salias IO_Y2 IO_PAD182
+salias IO_Y5 IO_PAD198
+salias IO_Y6 IO_PAD202
+salias IO_Y7 IO_PAD210
+salias IO_Y8 IO_PAD216
+salias IO_Y9 IO_PAD227
+salias M0_AA1 M0_PAD187
+salias M1_U5 M1_PAD184
+salias M2_AB2 M2_PAD190
--- /dev/null
+#
+# $Id$
+#
+# JTAG package script for XC2S300E-FT256
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Arnim Laeuger <arniml@users.sourceforge.net>
+#
+
+salias CCLK_A15 CCLK_PAD437
+salias DONE_T15 DONE_PAD313
+salias GCK0_T9 GCK0_PAD254
+salias GCK1_T8 GCK1_PAD250
+salias GCK2_B8 GCK2_PAD500
+salias GCK3_C8 GCK3_PAD2
+salias INIT_P15 INIT_PAD317
+salias IO_A10 IO_PAD484
+salias IO_A11 IO_PAD469
+salias IO_A12 IO_PAD456
+salias IO_A13 IO_PAD445
+salias IO_A14 IO_PAD444
+salias IO_A3 IO_PAD51
+salias IO_A4 IO_PAD50
+salias IO_A5 IO_PAD33
+salias IO_A6 IO_PAD22
+salias IO_A7 IO_PAD9
+salias IO_A8 IO_PAD499
+salias IO_A9 IO_PAD496
+salias IO_B10 IO_PAD483
+salias IO_B11 IO_PAD468
+salias IO_B12 IO_PAD455
+salias IO_B13 IO_PAD451
+salias IO_B16 IO_PAD435
+salias IO_B3 IO_PAD58
+salias IO_B4 IO_PAD46
+salias IO_B5 IO_PAD34
+salias IO_B6 IO_PAD27
+salias IO_B7 IO_PAD19
+salias IO_B9 IO_PAD494
+salias IO_C10 IO_PAD480
+salias IO_C11 IO_PAD466
+salias IO_C12 IO_PAD452
+salias IO_C15 IO_PAD436
+salias IO_C16 IO_PAD419
+salias IO_C1 IO_PAD71
+salias IO_C2 IO_PAD69
+salias IO_C4 IO_PAD47
+salias IO_C5 IO_PAD43
+salias IO_C6 IO_PAD28
+salias IO_C7 IO_PAD18
+salias IO_C9 IO_PAD490
+salias IO_D10 IO_PAD475
+salias IO_D11 IO_PAD465
+salias IO_D12 IO_PAD459
+salias IO_D14 IO_PAD428
+salias IO_D15 IO_PAD418
+salias IO_D16 IO_PAD410
+salias IO_D1 IO_PAD77
+salias IO_D2 IO_PAD76
+salias IO_D3 IO_PAD65
+salias IO_D5 IO_PAD42
+salias IO_D6 IO_PAD36
+salias IO_D7 IO_PAD13
+salias IO_D8 IO_PAD5
+salias IO_D9 IO_PAD489
+salias IO_E10 IO_PAD474
+salias IO_E11 IO_PAD460
+salias IO_E13 IO_PAD427
+salias IO_E14 IO_PAD415
+salias IO_E15 IO_PAD409
+salias IO_E16 IO_PAD400
+salias IO_E1 IO_PAD86
+salias IO_E2 IO_PAD84
+salias IO_E3 IO_PAD80
+salias IO_E4 IO_PAD81
+salias IO_E6 IO_PAD37
+salias IO_E7 IO_PAD12
+salias IO_F12 IO_PAD423
+salias IO_F13 IO_PAD413
+salias IO_F14 IO_PAD404
+salias IO_F15 IO_PAD398
+salias IO_F16 IO_PAD389
+salias IO_F1 IO_PAD96
+salias IO_F2 IO_PAD95
+salias IO_F3 IO_PAD90
+salias IO_F4 IO_PAD89
+salias IO_F5 IO_PAD99
+salias IO_G12 IO_PAD422
+salias IO_G13 IO_PAD403
+salias IO_G14 IO_PAD395
+salias IO_G15 IO_PAD388
+salias IO_G16 IO_PAD380
+salias IO_G1 IO_PAD111
+salias IO_G2 IO_PAD110
+salias IO_G3 IO_PAD104
+salias IO_G4 IO_PAD105
+salias IO_G5 IO_PAD101
+salias IO_H13 IO_PAD394
+salias IO_H14 IO_PAD383
+salias IO_H15 IO_PAD385
+salias IO_H16 IO_PAD379
+salias IO_H1 IO_PAD121
+salias IO_H2 IO_PAD120
+salias IO_H3 IO_PAD117
+salias IO_H4 IO_PAD115
+salias IO_J13 IO_PAD375
+salias IO_J14 IO_PAD364
+salias IO_J15 IO_PAD368
+salias IO_J16 IO_PAD370
+salias IO_J1 IO_PAD135
+salias IO_J2 IO_PAD130
+salias IO_J3 IO_PAD132
+salias IO_J4 IO_PAD125
+salias IO_K12 IO_PAD358
+salias IO_K13 IO_PAD363
+salias IO_K14 IO_PAD349
+salias IO_K15 IO_PAD352
+salias IO_K16 IO_PAD354
+salias IO_K1 IO_PAD136
+salias IO_K2 IO_PAD141
+salias IO_K3 IO_PAD142
+salias IO_K4 IO_PAD150
+salias IO_K5 IO_PAD151
+salias IO_L12 IO_PAD357
+salias IO_L13 IO_PAD348
+salias IO_L14 IO_PAD340
+salias IO_L15 IO_PAD342
+salias IO_L16 IO_PAD343
+salias IO_L1 IO_PAD145
+salias IO_L2 IO_PAD147
+salias IO_L3 IO_PAD156
+salias IO_L4 IO_PAD165
+salias IO_L5 IO_PAD166
+salias IO_M10 IO_PAD279
+salias IO_M11 IO_PAD294
+salias IO_M13 IO_PAD337
+salias IO_M14 IO_PAD330
+salias IO_M15 IO_PAD333
+salias IO_M16 IO_PAD334
+salias IO_M1 IO_PAD160
+salias IO_M2 IO_PAD157
+salias IO_M3 IO_PAD169
+salias IO_M4 IO_PAD170
+salias IO_M6 IO_PAD223
+salias IO_M7 IO_PAD238
+salias IO_N10 IO_PAD278
+salias IO_N11 IO_PAD293
+salias IO_N12 IO_PAD298
+salias IO_N14 IO_PAD329
+salias IO_N15 IO_PAD322
+salias IO_N16 IO_PAD324
+salias IO_N1 IO_PAD162
+salias IO_N2 IO_PAD174
+salias IO_N3 IO_PAD175
+salias IO_N5 IO_PAD204
+salias IO_N6 IO_PAD214
+salias IO_N7 IO_PAD224
+salias IO_N8 IO_PAD239
+salias IO_N9 IO_PAD260
+salias IO_P10 IO_PAD269
+salias IO_P11 IO_PAD284
+salias IO_P12 IO_PAD297
+salias IO_P13 IO_PAD304
+salias IO_P16 IO_PAD318
+salias IO_P1 IO_PAD182
+salias IO_P2 IO_PAD183
+salias IO_P4 IO_PAD193
+salias IO_P5 IO_PAD205
+salias IO_P6 IO_PAD215
+salias IO_P7 IO_PAD229
+salias IO_P8 IO_PAD243
+salias IO_P9 IO_PAD258
+salias IO_R10 IO_PAD264
+salias IO_R11 IO_PAD270
+salias IO_R12 IO_PAD285
+salias IO_R13 IO_PAD302
+salias IO_R14 IO_PAD310
+salias IO_R4 IO_PAD194
+salias IO_R5 IO_PAD208
+salias IO_R6 IO_PAD217
+salias IO_R7 IO_PAD232
+salias IO_R8 IO_PAD247
+salias IO_R9 IO_PAD255
+salias IO_T10 IO_PAD263
+salias IO_T11 IO_PAD273
+salias IO_T12 IO_PAD287
+salias IO_T13 IO_PAD288
+salias IO_T14 IO_PAD309
+salias IO_T3 IO_PAD200
+salias IO_T4 IO_PAD201
+salias IO_T5 IO_PAD209
+salias IO_T6 IO_PAD218
+salias IO_T7 IO_PAD233
+salias M0_T2 M0_PAD187
+salias M1_R1 M1_PAD184
+salias M2_R3 M2_PAD190
--- /dev/null
+#
+# $Id$
+#
+# JTAG package script for XC2S300E-PQ240
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Arnim Laeuger <arniml@users.sourceforge.net>
+#
+
+salias CCLK_P155 CCLK_PAD437
+salias DONE_P104 DONE_PAD313
+salias GCK0_P80 GCK0_PAD254
+salias GCK1_P77 GCK1_PAD250
+salias GCK2_P182 GCK2_PAD500
+salias GCK3_P185 GCK3_PAD2
+salias INIT_P107 INIT_PAD317
+salias IO_P100 IO_PAD302
+salias IO_P101 IO_PAD309
+salias IO_P102 IO_PAD310
+salias IO_P108 IO_PAD318
+salias IO_P109 IO_PAD324
+salias IO_P10 IO_PAD89
+salias IO_P110 IO_PAD330
+salias IO_P111 IO_PAD333
+salias IO_P112 IO_PAD334
+salias IO_P113 IO_PAD339
+salias IO_P114 IO_PAD341
+salias IO_P115 IO_PAD342
+salias IO_P116 IO_PAD343
+salias IO_P11 IO_PAD90
+salias IO_P120 IO_PAD348
+salias IO_P121 IO_PAD349
+salias IO_P122 IO_PAD354
+salias IO_P123 IO_PAD355
+salias IO_P125 IO_PAD363
+salias IO_P126 IO_PAD364
+salias IO_P127 IO_PAD370
+salias IO_P129 IO_PAD375
+salias IO_P132 IO_PAD379
+salias IO_P133 IO_PAD380
+salias IO_P134 IO_PAD383
+salias IO_P135 IO_PAD388
+salias IO_P136 IO_PAD389
+salias IO_P138 IO_PAD394
+salias IO_P139 IO_PAD395
+salias IO_P140 IO_PAD403
+salias IO_P141 IO_PAD404
+salias IO_P145 IO_PAD409
+salias IO_P146 IO_PAD410
+salias IO_P147 IO_PAD411
+salias IO_P148 IO_PAD413
+salias IO_P149 IO_PAD418
+salias IO_P150 IO_PAD419
+salias IO_P151 IO_PAD422
+salias IO_P152 IO_PAD428
+salias IO_P153 IO_PAD435
+salias IO_P154 IO_PAD436
+salias IO_P15 IO_PAD95
+salias IO_P160 IO_PAD444
+salias IO_P161 IO_PAD445
+salias IO_P162 IO_PAD451
+salias IO_P163 IO_PAD456
+salias IO_P164 IO_PAD459
+salias IO_P165 IO_PAD460
+salias IO_P166 IO_PAD465
+salias IO_P167 IO_PAD467
+salias IO_P168 IO_PAD468
+salias IO_P169 IO_PAD469
+salias IO_P16 IO_PAD96
+salias IO_P173 IO_PAD474
+salias IO_P174 IO_PAD475
+salias IO_P175 IO_PAD483
+salias IO_P176 IO_PAD484
+salias IO_P178 IO_PAD489
+salias IO_P179 IO_PAD490
+salias IO_P17 IO_PAD104
+salias IO_P180 IO_PAD496
+salias IO_P181 IO_PAD499
+salias IO_P187 IO_PAD5
+salias IO_P188 IO_PAD12
+salias IO_P189 IO_PAD13
+salias IO_P18 IO_PAD105
+salias IO_P191 IO_PAD18
+salias IO_P192 IO_PAD19
+salias IO_P193 IO_PAD27
+salias IO_P194 IO_PAD28
+salias IO_P198 IO_PAD33
+salias IO_P199 IO_PAD34
+salias IO_P200 IO_PAD35
+salias IO_P201 IO_PAD37
+salias IO_P202 IO_PAD42
+salias IO_P203 IO_PAD43
+salias IO_P204 IO_PAD46
+salias IO_P205 IO_PAD51
+salias IO_P206 IO_PAD58
+salias IO_P20 IO_PAD110
+salias IO_P21 IO_PAD111
+salias IO_P22 IO_PAD117
+salias IO_P23 IO_PAD120
+salias IO_P24 IO_PAD121
+salias IO_P27 IO_PAD125
+salias IO_P29 IO_PAD130
+salias IO_P30 IO_PAD135
+salias IO_P31 IO_PAD136
+salias IO_P33 IO_PAD144
+salias IO_P34 IO_PAD145
+salias IO_P35 IO_PAD150
+salias IO_P36 IO_PAD151
+salias IO_P3 IO_PAD65
+salias IO_P40 IO_PAD156
+salias IO_P41 IO_PAD157
+salias IO_P42 IO_PAD158
+salias IO_P43 IO_PAD160
+salias IO_P44 IO_PAD165
+salias IO_P45 IO_PAD166
+salias IO_P46 IO_PAD169
+salias IO_P47 IO_PAD175
+salias IO_P48 IO_PAD182
+salias IO_P49 IO_PAD183
+salias IO_P4 IO_PAD71
+salias IO_P55 IO_PAD193
+salias IO_P56 IO_PAD194
+salias IO_P57 IO_PAD200
+salias IO_P58 IO_PAD205
+salias IO_P59 IO_PAD208
+salias IO_P5 IO_PAD77
+salias IO_P60 IO_PAD209
+salias IO_P61 IO_PAD214
+salias IO_P62 IO_PAD215
+salias IO_P63 IO_PAD217
+salias IO_P64 IO_PAD218
+salias IO_P68 IO_PAD223
+salias IO_P69 IO_PAD224
+salias IO_P6 IO_PAD80
+salias IO_P70 IO_PAD232
+salias IO_P71 IO_PAD233
+salias IO_P73 IO_PAD238
+salias IO_P74 IO_PAD239
+salias IO_P75 IO_PAD247
+salias IO_P7 IO_PAD81
+salias IO_P81 IO_PAD255
+salias IO_P82 IO_PAD258
+salias IO_P83 IO_PAD263
+salias IO_P84 IO_PAD264
+salias IO_P86 IO_PAD269
+salias IO_P87 IO_PAD270
+salias IO_P88 IO_PAD278
+salias IO_P89 IO_PAD279
+salias IO_P8 IO_PAD86
+salias IO_P93 IO_PAD284
+salias IO_P94 IO_PAD285
+salias IO_P95 IO_PAD286
+salias IO_P96 IO_PAD288
+salias IO_P97 IO_PAD293
+salias IO_P98 IO_PAD294
+salias IO_P99 IO_PAD297
+salias IO_P9 IO_PAD88
+salias M0_P52 M0_PAD187
+salias M1_P50 M1_PAD184
+salias M2_P54 M2_PAD190
--- /dev/null
+#
+# $Id$
+#
+# JTAG declarations for XC2S300E
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Arnim Laeuger <arniml@users.sourceforge.net>
+#
+# Note:
+# The signals defined in this file are generic for any XC2S300E.
+# Signalnames according to Altera's package tables are set in the
+# package specific scripts.
+#
+
+
+signal CCLK_PAD437
+signal DONE_PAD313
+signal DXN_PAD192
+signal DXP_PAD191
+signal GCK0_PAD254
+signal GCK1_PAD250
+signal GCK2_PAD500
+signal GCK3_PAD2
+signal INIT_PAD317
+signal M0_PAD187
+signal M1_PAD184
+signal M2_PAD190
+signal PROGRAM
+signal IO_PAD5
+signal IO_PAD6
+signal IO_PAD7
+signal IO_PAD9
+signal IO_PAD10
+signal IO_PAD11
+signal IO_PAD12
+signal IO_PAD13
+signal IO_PAD18
+signal IO_PAD19
+signal IO_PAD20
+signal IO_PAD21
+signal IO_PAD22
+signal IO_PAD24
+signal IO_PAD25
+signal IO_PAD26
+signal IO_PAD27
+signal IO_PAD28
+signal IO_PAD33
+signal IO_PAD34
+signal IO_PAD35
+signal IO_PAD36
+signal IO_PAD37
+signal IO_PAD39
+signal IO_PAD40
+signal IO_PAD41
+signal IO_PAD42
+signal IO_PAD43
+signal IO_PAD46
+signal IO_PAD47
+signal IO_PAD48
+signal IO_PAD49
+signal IO_PAD50
+signal IO_PAD51
+signal IO_PAD53
+signal IO_PAD54
+signal IO_PAD55
+signal IO_PAD56
+signal IO_PAD58
+signal IO_PAD65
+signal IO_PAD66
+signal IO_PAD67
+signal IO_PAD68
+signal IO_PAD69
+signal IO_PAD71
+signal IO_PAD72
+signal IO_PAD73
+signal IO_PAD74
+signal IO_PAD76
+signal IO_PAD77
+signal IO_PAD80
+signal IO_PAD81
+signal IO_PAD82
+signal IO_PAD83
+signal IO_PAD84
+signal IO_PAD86
+signal IO_PAD87
+signal IO_PAD88
+signal IO_PAD89
+signal IO_PAD90
+signal IO_PAD95
+signal IO_PAD96
+signal IO_PAD97
+signal IO_PAD98
+signal IO_PAD99
+signal IO_PAD101
+signal IO_PAD102
+signal IO_PAD103
+signal IO_PAD104
+signal IO_PAD105
+signal IO_PAD110
+signal IO_PAD111
+signal IO_PAD112
+signal IO_PAD114
+signal IO_PAD115
+signal IO_PAD117
+signal IO_PAD118
+signal IO_PAD119
+signal IO_PAD120
+signal IO_PAD121
+signal IO_PAD125
+signal IO_PAD128
+signal IO_PAD129
+signal IO_PAD130
+signal IO_PAD132
+signal IO_PAD133
+signal IO_PAD134
+signal IO_PAD135
+signal IO_PAD136
+signal IO_PAD141
+signal IO_PAD142
+signal IO_PAD143
+signal IO_PAD144
+signal IO_PAD145
+signal IO_PAD147
+signal IO_PAD148
+signal IO_PAD149
+signal IO_PAD150
+signal IO_PAD151
+signal IO_PAD156
+signal IO_PAD157
+signal IO_PAD158
+signal IO_PAD159
+signal IO_PAD160
+signal IO_PAD162
+signal IO_PAD163
+signal IO_PAD164
+signal IO_PAD165
+signal IO_PAD166
+signal IO_PAD169
+signal IO_PAD170
+signal IO_PAD172
+signal IO_PAD173
+signal IO_PAD174
+signal IO_PAD175
+signal IO_PAD177
+signal IO_PAD178
+signal IO_PAD179
+signal IO_PAD180
+signal IO_PAD182
+signal IO_PAD183
+signal IO_PAD193
+signal IO_PAD194
+signal IO_PAD195
+signal IO_PAD196
+signal IO_PAD197
+signal IO_PAD198
+signal IO_PAD200
+signal IO_PAD201
+signal IO_PAD202
+signal IO_PAD203
+signal IO_PAD204
+signal IO_PAD205
+signal IO_PAD208
+signal IO_PAD209
+signal IO_PAD210
+signal IO_PAD211
+signal IO_PAD212
+signal IO_PAD214
+signal IO_PAD215
+signal IO_PAD216
+signal IO_PAD217
+signal IO_PAD218
+signal IO_PAD223
+signal IO_PAD224
+signal IO_PAD225
+signal IO_PAD226
+signal IO_PAD227
+signal IO_PAD229
+signal IO_PAD230
+signal IO_PAD231
+signal IO_PAD232
+signal IO_PAD233
+signal IO_PAD238
+signal IO_PAD239
+signal IO_PAD240
+signal IO_PAD242
+signal IO_PAD243
+signal IO_PAD245
+signal IO_PAD246
+signal IO_PAD247
+signal IO_PAD255
+signal IO_PAD256
+signal IO_PAD257
+signal IO_PAD258
+signal IO_PAD260
+signal IO_PAD261
+signal IO_PAD262
+signal IO_PAD263
+signal IO_PAD264
+signal IO_PAD269
+signal IO_PAD270
+signal IO_PAD271
+signal IO_PAD272
+signal IO_PAD273
+signal IO_PAD275
+signal IO_PAD276
+signal IO_PAD277
+signal IO_PAD278
+signal IO_PAD279
+signal IO_PAD284
+signal IO_PAD285
+signal IO_PAD286
+signal IO_PAD287
+signal IO_PAD288
+signal IO_PAD290
+signal IO_PAD291
+signal IO_PAD292
+signal IO_PAD293
+signal IO_PAD294
+signal IO_PAD297
+signal IO_PAD298
+signal IO_PAD299
+signal IO_PAD300
+signal IO_PAD301
+signal IO_PAD302
+signal IO_PAD304
+signal IO_PAD305
+signal IO_PAD306
+signal IO_PAD307
+signal IO_PAD309
+signal IO_PAD310
+signal IO_PAD318
+signal IO_PAD319
+signal IO_PAD320
+signal IO_PAD321
+signal IO_PAD322
+signal IO_PAD324
+signal IO_PAD325
+signal IO_PAD326
+signal IO_PAD327
+signal IO_PAD329
+signal IO_PAD330
+signal IO_PAD333
+signal IO_PAD334
+signal IO_PAD335
+signal IO_PAD336
+signal IO_PAD337
+signal IO_PAD339
+signal IO_PAD340
+signal IO_PAD341
+signal IO_PAD342
+signal IO_PAD343
+signal IO_PAD348
+signal IO_PAD349
+signal IO_PAD350
+signal IO_PAD351
+signal IO_PAD352
+signal IO_PAD354
+signal IO_PAD355
+signal IO_PAD356
+signal IO_PAD357
+signal IO_PAD358
+signal IO_PAD363
+signal IO_PAD364
+signal IO_PAD365
+signal IO_PAD367
+signal IO_PAD368
+signal IO_PAD370
+signal IO_PAD371
+signal IO_PAD372
+signal IO_PAD375
+signal IO_PAD379
+signal IO_PAD380
+signal IO_PAD381
+signal IO_PAD382
+signal IO_PAD383
+signal IO_PAD385
+signal IO_PAD386
+signal IO_PAD387
+signal IO_PAD388
+signal IO_PAD389
+signal IO_PAD394
+signal IO_PAD395
+signal IO_PAD396
+signal IO_PAD397
+signal IO_PAD398
+signal IO_PAD400
+signal IO_PAD401
+signal IO_PAD402
+signal IO_PAD403
+signal IO_PAD404
+signal IO_PAD409
+signal IO_PAD410
+signal IO_PAD411
+signal IO_PAD412
+signal IO_PAD413
+signal IO_PAD415
+signal IO_PAD416
+signal IO_PAD417
+signal IO_PAD418
+signal IO_PAD419
+signal IO_PAD422
+signal IO_PAD423
+signal IO_PAD425
+signal IO_PAD426
+signal IO_PAD427
+signal IO_PAD428
+signal IO_PAD430
+signal IO_PAD431
+signal IO_PAD432
+signal IO_PAD433
+signal IO_PAD435
+signal IO_PAD436
+signal IO_PAD444
+signal IO_PAD445
+signal IO_PAD446
+signal IO_PAD447
+signal IO_PAD448
+signal IO_PAD449
+signal IO_PAD451
+signal IO_PAD452
+signal IO_PAD453
+signal IO_PAD454
+signal IO_PAD455
+signal IO_PAD456
+signal IO_PAD459
+signal IO_PAD460
+signal IO_PAD461
+signal IO_PAD462
+signal IO_PAD463
+signal IO_PAD465
+signal IO_PAD466
+signal IO_PAD467
+signal IO_PAD468
+signal IO_PAD469
+signal IO_PAD474
+signal IO_PAD475
+signal IO_PAD476
+signal IO_PAD477
+signal IO_PAD478
+signal IO_PAD480
+signal IO_PAD481
+signal IO_PAD482
+signal IO_PAD483
+signal IO_PAD484
+signal IO_PAD489
+signal IO_PAD490
+signal IO_PAD491
+signal IO_PAD493
+signal IO_PAD494
+signal IO_PAD496
+signal IO_PAD497
+signal IO_PAD498
+
+register BSR 1166
+register BR 1
+register DIR 32
+
+instruction length 5
+
+instruction SAMPLE/PRELOAD 00001 BSR
+instruction IDCODE 01001 DIR
+instruction EXTEST 00000 BSR
+instruction BYPASS 11111 BR
+
+bit 1165 I 1 CCLK_PAD437
+bit 1164 O 1 CCLK_PAD437 1163 1 Z
+bit 1163 C 1 *
+bit 1162 I 1 IO_PAD436
+bit 1161 O 1 IO_PAD436 1160 1 Z
+bit 1160 C 1 *
+bit 1159 I 1 IO_PAD435
+bit 1158 O 1 IO_PAD435 1157 1 Z
+bit 1157 C 1 *
+bit 1156 I 1 IO_PAD433
+bit 1155 O 1 IO_PAD433 1154 1 Z
+bit 1154 C 1 *
+bit 1153 I 1 IO_PAD432
+bit 1152 O 1 IO_PAD432 1151 1 Z
+bit 1151 C 1 *
+bit 1150 I 1 IO_PAD431
+bit 1149 O 1 IO_PAD431 1148 1 Z
+bit 1148 C 1 *
+bit 1147 I 1 IO_PAD430
+bit 1146 O 1 IO_PAD430 1145 1 Z
+bit 1145 C 1 *
+bit 1144 I 1 IO_PAD428
+bit 1143 O 1 IO_PAD428 1142 1 Z
+bit 1142 C 1 *
+bit 1141 I 1 IO_PAD427
+bit 1140 O 1 IO_PAD427 1139 1 Z
+bit 1139 C 1 *
+bit 1138 I 1 IO_PAD426
+bit 1137 O 1 IO_PAD426 1136 1 Z
+bit 1136 C 1 *
+bit 1135 I 1 IO_PAD425
+bit 1134 O 1 IO_PAD425 1133 1 Z
+bit 1133 C 1 *
+bit 1132 I 1 IO_PAD423
+bit 1131 O 1 IO_PAD423 1130 1 Z
+bit 1130 C 1 *
+bit 1129 I 1 IO_PAD422
+bit 1128 O 1 IO_PAD422 1127 1 Z
+bit 1127 C 1 *
+bit 1126 I 1 IO_PAD419
+bit 1125 O 1 IO_PAD419 1124 1 Z
+bit 1124 C 1 *
+bit 1123 I 1 IO_PAD418
+bit 1122 O 1 IO_PAD418 1121 1 Z
+bit 1121 C 1 *
+bit 1120 O 1 *
+bit 1119 O 1 *
+bit 1118 O 1 *
+bit 1117 I 1 IO_PAD417
+bit 1116 O 1 IO_PAD417 1115 1 Z
+bit 1115 C 1 *
+bit 1114 I 1 IO_PAD416
+bit 1113 O 1 IO_PAD416 1112 1 Z
+bit 1112 C 1 *
+bit 1111 I 1 IO_PAD415
+bit 1110 O 1 IO_PAD415 1109 1 Z
+bit 1109 C 1 *
+bit 1108 I 1 IO_PAD413
+bit 1107 O 1 IO_PAD413 1106 1 Z
+bit 1106 C 1 *
+bit 1105 I 1 IO_PAD412
+bit 1104 O 1 IO_PAD412 1103 1 Z
+bit 1103 C 1 *
+bit 1102 O 1 *
+bit 1101 O 1 *
+bit 1100 O 1 *
+bit 1099 I 1 IO_PAD411
+bit 1098 O 1 IO_PAD411 1097 1 Z
+bit 1097 C 1 *
+bit 1096 I 1 IO_PAD410
+bit 1095 O 1 IO_PAD410 1094 1 Z
+bit 1094 C 1 *
+bit 1093 I 1 IO_PAD409
+bit 1092 O 1 IO_PAD409 1091 1 Z
+bit 1091 C 1 *
+bit 1090 I 1 IO_PAD404
+bit 1089 O 1 IO_PAD404 1088 1 Z
+bit 1088 C 1 *
+bit 1087 I 1 IO_PAD403
+bit 1086 O 1 IO_PAD403 1085 1 Z
+bit 1085 C 1 *
+bit 1084 O 1 *
+bit 1083 O 1 *
+bit 1082 O 1 *
+bit 1081 I 1 IO_PAD402
+bit 1080 O 1 IO_PAD402 1079 1 Z
+bit 1079 C 1 *
+bit 1078 I 1 IO_PAD401
+bit 1077 O 1 IO_PAD401 1076 1 Z
+bit 1076 C 1 *
+bit 1075 I 1 IO_PAD400
+bit 1074 O 1 IO_PAD400 1073 1 Z
+bit 1073 C 1 *
+bit 1072 I 1 IO_PAD398
+bit 1071 O 1 IO_PAD398 1070 1 Z
+bit 1070 C 1 *
+bit 1069 I 1 IO_PAD397
+bit 1068 O 1 IO_PAD397 1067 1 Z
+bit 1067 C 1 *
+bit 1066 O 1 *
+bit 1065 O 1 *
+bit 1064 O 1 *
+bit 1063 I 1 IO_PAD396
+bit 1062 O 1 IO_PAD396 1061 1 Z
+bit 1061 C 1 *
+bit 1060 I 1 IO_PAD395
+bit 1059 O 1 IO_PAD395 1058 1 Z
+bit 1058 C 1 *
+bit 1057 I 1 IO_PAD394
+bit 1056 O 1 IO_PAD394 1055 1 Z
+bit 1055 C 1 *
+bit 1054 I 1 IO_PAD389
+bit 1053 O 1 IO_PAD389 1052 1 Z
+bit 1052 C 1 *
+bit 1051 I 1 IO_PAD388
+bit 1050 O 1 IO_PAD388 1049 1 Z
+bit 1049 C 1 *
+bit 1048 O 1 *
+bit 1047 O 1 *
+bit 1046 O 1 *
+bit 1045 I 1 IO_PAD387
+bit 1044 O 1 IO_PAD387 1043 1 Z
+bit 1043 C 1 *
+bit 1042 I 1 IO_PAD386
+bit 1041 O 1 IO_PAD386 1040 1 Z
+bit 1040 C 1 *
+bit 1039 I 1 IO_PAD385
+bit 1038 O 1 IO_PAD385 1037 1 Z
+bit 1037 C 1 *
+bit 1036 I 1 IO_PAD383
+bit 1035 O 1 IO_PAD383 1034 1 Z
+bit 1034 C 1 *
+bit 1033 I 1 IO_PAD382
+bit 1032 O 1 IO_PAD382 1031 1 Z
+bit 1031 C 1 *
+bit 1030 O 1 *
+bit 1029 O 1 *
+bit 1028 O 1 *
+bit 1027 I 1 IO_PAD381
+bit 1026 O 1 IO_PAD381 1025 1 Z
+bit 1025 C 1 *
+bit 1024 I 1 IO_PAD380
+bit 1023 O 1 IO_PAD380 1022 1 Z
+bit 1022 C 1 *
+bit 1021 I 1 IO_PAD379
+bit 1020 O 1 IO_PAD379 1019 1 Z
+bit 1019 C 1 *
+bit 1018 I 1 IO_PAD375
+bit 1017 O 1 IO_PAD375 1016 1 Z
+bit 1016 C 1 *
+bit 1015 O 1 *
+bit 1014 O 1 *
+bit 1013 O 1 *
+bit 1012 I 1 IO_PAD372
+bit 1011 O 1 IO_PAD372 1010 1 Z
+bit 1010 C 1 *
+bit 1009 O 1 *
+bit 1008 O 1 *
+bit 1007 O 1 *
+bit 1006 I 1 IO_PAD371
+bit 1005 O 1 IO_PAD371 1004 1 Z
+bit 1004 C 1 *
+bit 1003 I 1 IO_PAD370
+bit 1002 O 1 IO_PAD370 1001 1 Z
+bit 1001 C 1 *
+bit 1000 I 1 IO_PAD368
+bit 999 O 1 IO_PAD368 998 1 Z
+bit 998 C 1 *
+bit 997 I 1 IO_PAD367
+bit 996 O 1 IO_PAD367 995 1 Z
+bit 995 C 1 *
+bit 994 I 1 IO_PAD365
+bit 993 O 1 IO_PAD365 992 1 Z
+bit 992 C 1 *
+bit 991 O 1 *
+bit 990 O 1 *
+bit 989 O 1 *
+bit 988 I 1 IO_PAD364
+bit 987 O 1 IO_PAD364 986 1 Z
+bit 986 C 1 *
+bit 985 I 1 IO_PAD363
+bit 984 O 1 IO_PAD363 983 1 Z
+bit 983 C 1 *
+bit 982 I 1 IO_PAD358
+bit 981 O 1 IO_PAD358 980 1 Z
+bit 980 C 1 *
+bit 979 I 1 IO_PAD357
+bit 978 O 1 IO_PAD357 977 1 Z
+bit 977 C 1 *
+bit 976 I 1 IO_PAD356
+bit 975 O 1 IO_PAD356 974 1 Z
+bit 974 C 1 *
+bit 973 O 1 *
+bit 972 O 1 *
+bit 971 O 1 *
+bit 970 I 1 IO_PAD355
+bit 969 O 1 IO_PAD355 968 1 Z
+bit 968 C 1 *
+bit 967 I 1 IO_PAD354
+bit 966 O 1 IO_PAD354 965 1 Z
+bit 965 C 1 *
+bit 964 I 1 IO_PAD352
+bit 963 O 1 IO_PAD352 962 1 Z
+bit 962 C 1 *
+bit 961 I 1 IO_PAD351
+bit 960 O 1 IO_PAD351 959 1 Z
+bit 959 C 1 *
+bit 958 I 1 IO_PAD350
+bit 957 O 1 IO_PAD350 956 1 Z
+bit 956 C 1 *
+bit 955 O 1 *
+bit 954 O 1 *
+bit 953 O 1 *
+bit 952 I 1 IO_PAD349
+bit 951 O 1 IO_PAD349 950 1 Z
+bit 950 C 1 *
+bit 949 I 1 IO_PAD348
+bit 948 O 1 IO_PAD348 947 1 Z
+bit 947 C 1 *
+bit 946 I 1 IO_PAD343
+bit 945 O 1 IO_PAD343 944 1 Z
+bit 944 C 1 *
+bit 943 I 1 IO_PAD342
+bit 942 O 1 IO_PAD342 941 1 Z
+bit 941 C 1 *
+bit 940 I 1 IO_PAD341
+bit 939 O 1 IO_PAD341 938 1 Z
+bit 938 C 1 *
+bit 937 O 1 *
+bit 936 O 1 *
+bit 935 O 1 *
+bit 934 I 1 IO_PAD340
+bit 933 O 1 IO_PAD340 932 1 Z
+bit 932 C 1 *
+bit 931 I 1 IO_PAD339
+bit 930 O 1 IO_PAD339 929 1 Z
+bit 929 C 1 *
+bit 928 I 1 IO_PAD337
+bit 927 O 1 IO_PAD337 926 1 Z
+bit 926 C 1 *
+bit 925 I 1 IO_PAD336
+bit 924 O 1 IO_PAD336 923 1 Z
+bit 923 C 1 *
+bit 922 I 1 IO_PAD335
+bit 921 O 1 IO_PAD335 920 1 Z
+bit 920 C 1 *
+bit 919 O 1 *
+bit 918 O 1 *
+bit 917 O 1 *
+bit 916 I 1 IO_PAD334
+bit 915 O 1 IO_PAD334 914 1 Z
+bit 914 C 1 *
+bit 913 I 1 IO_PAD333
+bit 912 O 1 IO_PAD333 911 1 Z
+bit 911 C 1 *
+bit 910 I 1 IO_PAD330
+bit 909 O 1 IO_PAD330 908 1 Z
+bit 908 C 1 *
+bit 907 I 1 IO_PAD329
+bit 906 O 1 IO_PAD329 905 1 Z
+bit 905 C 1 *
+bit 904 I 1 IO_PAD327
+bit 903 O 1 IO_PAD327 902 1 Z
+bit 902 C 1 *
+bit 901 I 1 IO_PAD326
+bit 900 O 1 IO_PAD326 899 1 Z
+bit 899 C 1 *
+bit 898 I 1 IO_PAD325
+bit 897 O 1 IO_PAD325 896 1 Z
+bit 896 C 1 *
+bit 895 I 1 IO_PAD324
+bit 894 O 1 IO_PAD324 893 1 Z
+bit 893 C 1 *
+bit 892 I 1 IO_PAD322
+bit 891 O 1 IO_PAD322 890 1 Z
+bit 890 C 1 *
+bit 889 I 1 IO_PAD321
+bit 888 O 1 IO_PAD321 887 1 Z
+bit 887 C 1 *
+bit 886 I 1 IO_PAD320
+bit 885 O 1 IO_PAD320 884 1 Z
+bit 884 C 1 *
+bit 883 I 1 IO_PAD319
+bit 882 O 1 IO_PAD319 881 1 Z
+bit 881 C 1 *
+bit 880 I 1 IO_PAD318
+bit 879 O 1 IO_PAD318 878 1 Z
+bit 878 C 1 *
+bit 877 I 1 INIT_PAD317
+bit 876 O 1 INIT_PAD317 875 1 Z
+bit 875 C 1 *
+bit 874 O 1 *
+bit 873 I 1 DONE_PAD313
+bit 872 O 1 DONE_PAD313 871 1 Z
+bit 871 C 1 *
+bit 870 I 1 IO_PAD310
+bit 869 O 1 IO_PAD310 868 1 Z
+bit 868 C 1 *
+bit 867 I 1 IO_PAD309
+bit 866 O 1 IO_PAD309 865 1 Z
+bit 865 C 1 *
+bit 864 I 1 IO_PAD307
+bit 863 O 1 IO_PAD307 862 1 Z
+bit 862 C 1 *
+bit 861 I 1 IO_PAD306
+bit 860 O 1 IO_PAD306 859 1 Z
+bit 859 C 1 *
+bit 858 I 1 IO_PAD305
+bit 857 O 1 IO_PAD305 856 1 Z
+bit 856 C 1 *
+bit 855 I 1 IO_PAD304
+bit 854 O 1 IO_PAD304 853 1 Z
+bit 853 C 1 *
+bit 852 I 1 IO_PAD302
+bit 851 O 1 IO_PAD302 850 1 Z
+bit 850 C 1 *
+bit 849 I 1 IO_PAD301
+bit 848 O 1 IO_PAD301 847 1 Z
+bit 847 C 1 *
+bit 846 I 1 IO_PAD300
+bit 845 O 1 IO_PAD300 844 1 Z
+bit 844 C 1 *
+bit 843 I 1 IO_PAD299
+bit 842 O 1 IO_PAD299 841 1 Z
+bit 841 C 1 *
+bit 840 I 1 IO_PAD298
+bit 839 O 1 IO_PAD298 838 1 Z
+bit 838 C 1 *
+bit 837 I 1 IO_PAD297
+bit 836 O 1 IO_PAD297 835 1 Z
+bit 835 C 1 *
+bit 834 I 1 IO_PAD294
+bit 833 O 1 IO_PAD294 832 1 Z
+bit 832 C 1 *
+bit 831 I 1 IO_PAD293
+bit 830 O 1 IO_PAD293 829 1 Z
+bit 829 C 1 *
+bit 828 O 1 *
+bit 827 O 1 *
+bit 826 O 1 *
+bit 825 I 1 IO_PAD292
+bit 824 O 1 IO_PAD292 823 1 Z
+bit 823 C 1 *
+bit 822 I 1 IO_PAD291
+bit 821 O 1 IO_PAD291 820 1 Z
+bit 820 C 1 *
+bit 819 I 1 IO_PAD290
+bit 818 O 1 IO_PAD290 817 1 Z
+bit 817 C 1 *
+bit 816 I 1 IO_PAD288
+bit 815 O 1 IO_PAD288 814 1 Z
+bit 814 C 1 *
+bit 813 I 1 IO_PAD287
+bit 812 O 1 IO_PAD287 811 1 Z
+bit 811 C 1 *
+bit 810 O 1 *
+bit 809 O 1 *
+bit 808 O 1 *
+bit 807 I 1 IO_PAD286
+bit 806 O 1 IO_PAD286 805 1 Z
+bit 805 C 1 *
+bit 804 I 1 IO_PAD285
+bit 803 O 1 IO_PAD285 802 1 Z
+bit 802 C 1 *
+bit 801 I 1 IO_PAD284
+bit 800 O 1 IO_PAD284 799 1 Z
+bit 799 C 1 *
+bit 798 I 1 IO_PAD279
+bit 797 O 1 IO_PAD279 796 1 Z
+bit 796 C 1 *
+bit 795 I 1 IO_PAD278
+bit 794 O 1 IO_PAD278 793 1 Z
+bit 793 C 1 *
+bit 792 O 1 *
+bit 791 O 1 *
+bit 790 O 1 *
+bit 789 I 1 IO_PAD277
+bit 788 O 1 IO_PAD277 787 1 Z
+bit 787 C 1 *
+bit 786 I 1 IO_PAD276
+bit 785 O 1 IO_PAD276 784 1 Z
+bit 784 C 1 *
+bit 783 I 1 IO_PAD275
+bit 782 O 1 IO_PAD275 781 1 Z
+bit 781 C 1 *
+bit 780 I 1 IO_PAD273
+bit 779 O 1 IO_PAD273 778 1 Z
+bit 778 C 1 *
+bit 777 I 1 IO_PAD272
+bit 776 O 1 IO_PAD272 775 1 Z
+bit 775 C 1 *
+bit 774 O 1 *
+bit 773 O 1 *
+bit 772 O 1 *
+bit 771 I 1 IO_PAD271
+bit 770 O 1 IO_PAD271 769 1 Z
+bit 769 C 1 *
+bit 768 I 1 IO_PAD270
+bit 767 O 1 IO_PAD270 766 1 Z
+bit 766 C 1 *
+bit 765 I 1 IO_PAD269
+bit 764 O 1 IO_PAD269 763 1 Z
+bit 763 C 1 *
+bit 762 I 1 IO_PAD264
+bit 761 O 1 IO_PAD264 760 1 Z
+bit 760 C 1 *
+bit 759 I 1 IO_PAD263
+bit 758 O 1 IO_PAD263 757 1 Z
+bit 757 C 1 *
+bit 756 O 1 *
+bit 755 O 1 *
+bit 754 O 1 *
+bit 753 I 1 IO_PAD262
+bit 752 O 1 IO_PAD262 751 1 Z
+bit 751 C 1 *
+bit 750 I 1 IO_PAD261
+bit 749 O 1 IO_PAD261 748 1 Z
+bit 748 C 1 *
+bit 747 I 1 IO_PAD260
+bit 746 O 1 IO_PAD260 745 1 Z
+bit 745 C 1 *
+bit 744 I 1 IO_PAD258
+bit 743 O 1 IO_PAD258 742 1 Z
+bit 742 C 1 *
+bit 741 I 1 IO_PAD257
+bit 740 O 1 IO_PAD257 739 1 Z
+bit 739 C 1 *
+bit 738 O 1 *
+bit 737 O 1 *
+bit 736 O 1 *
+bit 735 I 1 IO_PAD256
+bit 734 O 1 IO_PAD256 733 1 Z
+bit 733 C 1 *
+bit 732 O 1 *
+bit 731 O 1 *
+bit 730 O 1 *
+bit 729 I 1 IO_PAD255
+bit 728 O 1 IO_PAD255 727 1 Z
+bit 727 C 1 *
+bit 726 I 1 GCK0_PAD254
+bit 725 I 1 GCK1_PAD250
+bit 724 I 1 IO_PAD247
+bit 723 O 1 IO_PAD247 722 1 Z
+bit 722 C 1 *
+bit 721 O 1 *
+bit 720 O 1 *
+bit 719 O 1 *
+bit 718 O 1 *
+bit 717 O 1 *
+bit 716 O 1 *
+bit 715 O 1 *
+bit 714 O 1 *
+bit 713 O 1 *
+bit 712 I 1 IO_PAD246
+bit 711 O 1 IO_PAD246 710 1 Z
+bit 710 C 1 *
+bit 709 I 1 IO_PAD245
+bit 708 O 1 IO_PAD245 707 1 Z
+bit 707 C 1 *
+bit 706 I 1 IO_PAD243
+bit 705 O 1 IO_PAD243 704 1 Z
+bit 704 C 1 *
+bit 703 I 1 IO_PAD242
+bit 702 O 1 IO_PAD242 701 1 Z
+bit 701 C 1 *
+bit 700 I 1 IO_PAD240
+bit 699 O 1 IO_PAD240 698 1 Z
+bit 698 C 1 *
+bit 697 O 1 *
+bit 696 O 1 *
+bit 695 O 1 *
+bit 694 I 1 IO_PAD239
+bit 693 O 1 IO_PAD239 692 1 Z
+bit 692 C 1 *
+bit 691 I 1 IO_PAD238
+bit 690 O 1 IO_PAD238 689 1 Z
+bit 689 C 1 *
+bit 688 I 1 IO_PAD233
+bit 687 O 1 IO_PAD233 686 1 Z
+bit 686 C 1 *
+bit 685 I 1 IO_PAD232
+bit 684 O 1 IO_PAD232 683 1 Z
+bit 683 C 1 *
+bit 682 I 1 IO_PAD231
+bit 681 O 1 IO_PAD231 680 1 Z
+bit 680 C 1 *
+bit 679 O 1 *
+bit 678 O 1 *
+bit 677 O 1 *
+bit 676 I 1 IO_PAD230
+bit 675 O 1 IO_PAD230 674 1 Z
+bit 674 C 1 *
+bit 673 I 1 IO_PAD229
+bit 672 O 1 IO_PAD229 671 1 Z
+bit 671 C 1 *
+bit 670 I 1 IO_PAD227
+bit 669 O 1 IO_PAD227 668 1 Z
+bit 668 C 1 *
+bit 667 I 1 IO_PAD226
+bit 666 O 1 IO_PAD226 665 1 Z
+bit 665 C 1 *
+bit 664 I 1 IO_PAD225
+bit 663 O 1 IO_PAD225 662 1 Z
+bit 662 C 1 *
+bit 661 O 1 *
+bit 660 O 1 *
+bit 659 O 1 *
+bit 658 I 1 IO_PAD224
+bit 657 O 1 IO_PAD224 656 1 Z
+bit 656 C 1 *
+bit 655 I 1 IO_PAD223
+bit 654 O 1 IO_PAD223 653 1 Z
+bit 653 C 1 *
+bit 652 I 1 IO_PAD218
+bit 651 O 1 IO_PAD218 650 1 Z
+bit 650 C 1 *
+bit 649 I 1 IO_PAD217
+bit 648 O 1 IO_PAD217 647 1 Z
+bit 647 C 1 *
+bit 646 I 1 IO_PAD216
+bit 645 O 1 IO_PAD216 644 1 Z
+bit 644 C 1 *
+bit 643 O 1 *
+bit 642 O 1 *
+bit 641 O 1 *
+bit 640 I 1 IO_PAD215
+bit 639 O 1 IO_PAD215 638 1 Z
+bit 638 C 1 *
+bit 637 I 1 IO_PAD214
+bit 636 O 1 IO_PAD214 635 1 Z
+bit 635 C 1 *
+bit 634 I 1 IO_PAD212
+bit 633 O 1 IO_PAD212 632 1 Z
+bit 632 C 1 *
+bit 631 I 1 IO_PAD211
+bit 630 O 1 IO_PAD211 629 1 Z
+bit 629 C 1 *
+bit 628 I 1 IO_PAD210
+bit 627 O 1 IO_PAD210 626 1 Z
+bit 626 C 1 *
+bit 625 O 1 *
+bit 624 O 1 *
+bit 623 O 1 *
+bit 622 I 1 IO_PAD209
+bit 621 O 1 IO_PAD209 620 1 Z
+bit 620 C 1 *
+bit 619 I 1 IO_PAD208
+bit 618 O 1 IO_PAD208 617 1 Z
+bit 617 C 1 *
+bit 616 I 1 IO_PAD205
+bit 615 O 1 IO_PAD205 614 1 Z
+bit 614 C 1 *
+bit 613 I 1 IO_PAD204
+bit 612 O 1 IO_PAD204 611 1 Z
+bit 611 C 1 *
+bit 610 I 1 IO_PAD203
+bit 609 O 1 IO_PAD203 608 1 Z
+bit 608 C 1 *
+bit 607 I 1 IO_PAD202
+bit 606 O 1 IO_PAD202 605 1 Z
+bit 605 C 1 *
+bit 604 I 1 IO_PAD201
+bit 603 O 1 IO_PAD201 602 1 Z
+bit 602 C 1 *
+bit 601 I 1 IO_PAD200
+bit 600 O 1 IO_PAD200 599 1 Z
+bit 599 C 1 *
+bit 598 I 1 IO_PAD198
+bit 597 O 1 IO_PAD198 596 1 Z
+bit 596 C 1 *
+bit 595 I 1 IO_PAD197
+bit 594 O 1 IO_PAD197 593 1 Z
+bit 593 C 1 *
+bit 592 I 1 IO_PAD196
+bit 591 O 1 IO_PAD196 590 1 Z
+bit 590 C 1 *
+bit 589 I 1 IO_PAD195
+bit 588 O 1 IO_PAD195 587 1 Z
+bit 587 C 1 *
+bit 586 I 1 IO_PAD194
+bit 585 O 1 IO_PAD194 584 1 Z
+bit 584 C 1 *
+bit 583 I 1 IO_PAD193
+bit 582 O 1 IO_PAD193 581 1 Z
+bit 581 C 1 *
+bit 580 I 1 M2_PAD190
+bit 579 I 1 M0_PAD187
+bit 578 I 1 M1_PAD184
+bit 577 I 1 IO_PAD183
+bit 576 O 1 IO_PAD183 575 1 Z
+bit 575 C 1 *
+bit 574 I 1 IO_PAD182
+bit 573 O 1 IO_PAD182 572 1 Z
+bit 572 C 1 *
+bit 571 I 1 IO_PAD180
+bit 570 O 1 IO_PAD180 569 1 Z
+bit 569 C 1 *
+bit 568 I 1 IO_PAD179
+bit 567 O 1 IO_PAD179 566 1 Z
+bit 566 C 1 *
+bit 565 I 1 IO_PAD178
+bit 564 O 1 IO_PAD178 563 1 Z
+bit 563 C 1 *
+bit 562 I 1 IO_PAD177
+bit 561 O 1 IO_PAD177 560 1 Z
+bit 560 C 1 *
+bit 559 I 1 IO_PAD175
+bit 558 O 1 IO_PAD175 557 1 Z
+bit 557 C 1 *
+bit 556 I 1 IO_PAD174
+bit 555 O 1 IO_PAD174 554 1 Z
+bit 554 C 1 *
+bit 553 I 1 IO_PAD173
+bit 552 O 1 IO_PAD173 551 1 Z
+bit 551 C 1 *
+bit 550 I 1 IO_PAD172
+bit 549 O 1 IO_PAD172 548 1 Z
+bit 548 C 1 *
+bit 547 I 1 IO_PAD170
+bit 546 O 1 IO_PAD170 545 1 Z
+bit 545 C 1 *
+bit 544 I 1 IO_PAD169
+bit 543 O 1 IO_PAD169 542 1 Z
+bit 542 C 1 *
+bit 541 I 1 IO_PAD166
+bit 540 O 1 IO_PAD166 539 1 Z
+bit 539 C 1 *
+bit 538 I 1 IO_PAD165
+bit 537 O 1 IO_PAD165 536 1 Z
+bit 536 C 1 *
+bit 535 O 1 *
+bit 534 O 1 *
+bit 533 O 1 *
+bit 532 I 1 IO_PAD164
+bit 531 O 1 IO_PAD164 530 1 Z
+bit 530 C 1 *
+bit 529 I 1 IO_PAD163
+bit 528 O 1 IO_PAD163 527 1 Z
+bit 527 C 1 *
+bit 526 I 1 IO_PAD162
+bit 525 O 1 IO_PAD162 524 1 Z
+bit 524 C 1 *
+bit 523 I 1 IO_PAD160
+bit 522 O 1 IO_PAD160 521 1 Z
+bit 521 C 1 *
+bit 520 I 1 IO_PAD159
+bit 519 O 1 IO_PAD159 518 1 Z
+bit 518 C 1 *
+bit 517 O 1 *
+bit 516 O 1 *
+bit 515 O 1 *
+bit 514 I 1 IO_PAD158
+bit 513 O 1 IO_PAD158 512 1 Z
+bit 512 C 1 *
+bit 511 I 1 IO_PAD157
+bit 510 O 1 IO_PAD157 509 1 Z
+bit 509 C 1 *
+bit 508 I 1 IO_PAD156
+bit 507 O 1 IO_PAD156 506 1 Z
+bit 506 C 1 *
+bit 505 I 1 IO_PAD151
+bit 504 O 1 IO_PAD151 503 1 Z
+bit 503 C 1 *
+bit 502 I 1 IO_PAD150
+bit 501 O 1 IO_PAD150 500 1 Z
+bit 500 C 1 *
+bit 499 O 1 *
+bit 498 O 1 *
+bit 497 O 1 *
+bit 496 I 1 IO_PAD149
+bit 495 O 1 IO_PAD149 494 1 Z
+bit 494 C 1 *
+bit 493 I 1 IO_PAD148
+bit 492 O 1 IO_PAD148 491 1 Z
+bit 491 C 1 *
+bit 490 I 1 IO_PAD147
+bit 489 O 1 IO_PAD147 488 1 Z
+bit 488 C 1 *
+bit 487 I 1 IO_PAD145
+bit 486 O 1 IO_PAD145 485 1 Z
+bit 485 C 1 *
+bit 484 I 1 IO_PAD144
+bit 483 O 1 IO_PAD144 482 1 Z
+bit 482 C 1 *
+bit 481 O 1 *
+bit 480 O 1 *
+bit 479 O 1 *
+bit 478 I 1 IO_PAD143
+bit 477 O 1 IO_PAD143 476 1 Z
+bit 476 C 1 *
+bit 475 I 1 IO_PAD142
+bit 474 O 1 IO_PAD142 473 1 Z
+bit 473 C 1 *
+bit 472 I 1 IO_PAD141
+bit 471 O 1 IO_PAD141 470 1 Z
+bit 470 C 1 *
+bit 469 I 1 IO_PAD136
+bit 468 O 1 IO_PAD136 467 1 Z
+bit 467 C 1 *
+bit 466 I 1 IO_PAD135
+bit 465 O 1 IO_PAD135 464 1 Z
+bit 464 C 1 *
+bit 463 O 1 *
+bit 462 O 1 *
+bit 461 O 1 *
+bit 460 I 1 IO_PAD134
+bit 459 O 1 IO_PAD134 458 1 Z
+bit 458 C 1 *
+bit 457 I 1 IO_PAD133
+bit 456 O 1 IO_PAD133 455 1 Z
+bit 455 C 1 *
+bit 454 I 1 IO_PAD132
+bit 453 O 1 IO_PAD132 452 1 Z
+bit 452 C 1 *
+bit 451 I 1 IO_PAD130
+bit 450 O 1 IO_PAD130 449 1 Z
+bit 449 C 1 *
+bit 448 I 1 IO_PAD129
+bit 447 O 1 IO_PAD129 446 1 Z
+bit 446 C 1 *
+bit 445 O 1 *
+bit 444 O 1 *
+bit 443 O 1 *
+bit 442 I 1 IO_PAD128
+bit 441 O 1 IO_PAD128 440 1 Z
+bit 440 C 1 *
+bit 439 O 1 *
+bit 438 O 1 *
+bit 437 O 1 *
+bit 436 I 1 IO_PAD125
+bit 435 O 1 IO_PAD125 434 1 Z
+bit 434 C 1 *
+bit 433 I 1 IO_PAD121
+bit 432 O 1 IO_PAD121 431 1 Z
+bit 431 C 1 *
+bit 430 I 1 IO_PAD120
+bit 429 O 1 IO_PAD120 428 1 Z
+bit 428 C 1 *
+bit 427 I 1 IO_PAD119
+bit 426 O 1 IO_PAD119 425 1 Z
+bit 425 C 1 *
+bit 424 O 1 *
+bit 423 O 1 *
+bit 422 O 1 *
+bit 421 I 1 IO_PAD118
+bit 420 O 1 IO_PAD118 419 1 Z
+bit 419 C 1 *
+bit 418 I 1 IO_PAD117
+bit 417 O 1 IO_PAD117 416 1 Z
+bit 416 C 1 *
+bit 415 I 1 IO_PAD115
+bit 414 O 1 IO_PAD115 413 1 Z
+bit 413 C 1 *
+bit 412 I 1 IO_PAD114
+bit 411 O 1 IO_PAD114 410 1 Z
+bit 410 C 1 *
+bit 409 I 1 IO_PAD112
+bit 408 O 1 IO_PAD112 407 1 Z
+bit 407 C 1 *
+bit 406 O 1 *
+bit 405 O 1 *
+bit 404 O 1 *
+bit 403 I 1 IO_PAD111
+bit 402 O 1 IO_PAD111 401 1 Z
+bit 401 C 1 *
+bit 400 I 1 IO_PAD110
+bit 399 O 1 IO_PAD110 398 1 Z
+bit 398 C 1 *
+bit 397 I 1 IO_PAD105
+bit 396 O 1 IO_PAD105 395 1 Z
+bit 395 C 1 *
+bit 394 I 1 IO_PAD104
+bit 393 O 1 IO_PAD104 392 1 Z
+bit 392 C 1 *
+bit 391 I 1 IO_PAD103
+bit 390 O 1 IO_PAD103 389 1 Z
+bit 389 C 1 *
+bit 388 O 1 *
+bit 387 O 1 *
+bit 386 O 1 *
+bit 385 I 1 IO_PAD102
+bit 384 O 1 IO_PAD102 383 1 Z
+bit 383 C 1 *
+bit 382 I 1 IO_PAD101
+bit 381 O 1 IO_PAD101 380 1 Z
+bit 380 C 1 *
+bit 379 I 1 IO_PAD99
+bit 378 O 1 IO_PAD99 377 1 Z
+bit 377 C 1 *
+bit 376 I 1 IO_PAD98
+bit 375 O 1 IO_PAD98 374 1 Z
+bit 374 C 1 *
+bit 373 I 1 IO_PAD97
+bit 372 O 1 IO_PAD97 371 1 Z
+bit 371 C 1 *
+bit 370 O 1 *
+bit 369 O 1 *
+bit 368 O 1 *
+bit 367 I 1 IO_PAD96
+bit 366 O 1 IO_PAD96 365 1 Z
+bit 365 C 1 *
+bit 364 I 1 IO_PAD95
+bit 363 O 1 IO_PAD95 362 1 Z
+bit 362 C 1 *
+bit 361 I 1 IO_PAD90
+bit 360 O 1 IO_PAD90 359 1 Z
+bit 359 C 1 *
+bit 358 I 1 IO_PAD89
+bit 357 O 1 IO_PAD89 356 1 Z
+bit 356 C 1 *
+bit 355 I 1 IO_PAD88
+bit 354 O 1 IO_PAD88 353 1 Z
+bit 353 C 1 *
+bit 352 O 1 *
+bit 351 O 1 *
+bit 350 O 1 *
+bit 349 I 1 IO_PAD87
+bit 348 O 1 IO_PAD87 347 1 Z
+bit 347 C 1 *
+bit 346 I 1 IO_PAD86
+bit 345 O 1 IO_PAD86 344 1 Z
+bit 344 C 1 *
+bit 343 I 1 IO_PAD84
+bit 342 O 1 IO_PAD84 341 1 Z
+bit 341 C 1 *
+bit 340 I 1 IO_PAD83
+bit 339 O 1 IO_PAD83 338 1 Z
+bit 338 C 1 *
+bit 337 I 1 IO_PAD82
+bit 336 O 1 IO_PAD82 335 1 Z
+bit 335 C 1 *
+bit 334 O 1 *
+bit 333 O 1 *
+bit 332 O 1 *
+bit 331 I 1 IO_PAD81
+bit 330 O 1 IO_PAD81 329 1 Z
+bit 329 C 1 *
+bit 328 I 1 IO_PAD80
+bit 327 O 1 IO_PAD80 326 1 Z
+bit 326 C 1 *
+bit 325 I 1 IO_PAD77
+bit 324 O 1 IO_PAD77 323 1 Z
+bit 323 C 1 *
+bit 322 I 1 IO_PAD76
+bit 321 O 1 IO_PAD76 320 1 Z
+bit 320 C 1 *
+bit 319 I 1 IO_PAD74
+bit 318 O 1 IO_PAD74 317 1 Z
+bit 317 C 1 *
+bit 316 I 1 IO_PAD73
+bit 315 O 1 IO_PAD73 314 1 Z
+bit 314 C 1 *
+bit 313 I 1 IO_PAD72
+bit 312 O 1 IO_PAD72 311 1 Z
+bit 311 C 1 *
+bit 310 I 1 IO_PAD71
+bit 309 O 1 IO_PAD71 308 1 Z
+bit 308 C 1 *
+bit 307 I 1 IO_PAD69
+bit 306 O 1 IO_PAD69 305 1 Z
+bit 305 C 1 *
+bit 304 I 1 IO_PAD68
+bit 303 O 1 IO_PAD68 302 1 Z
+bit 302 C 1 *
+bit 301 I 1 IO_PAD67
+bit 300 O 1 IO_PAD67 299 1 Z
+bit 299 C 1 *
+bit 298 I 1 IO_PAD66
+bit 297 O 1 IO_PAD66 296 1 Z
+bit 296 C 1 *
+bit 295 I 1 IO_PAD65
+bit 294 O 1 IO_PAD65 293 1 Z
+bit 293 C 1 *
+bit 292 O 1 *
+bit 291 O 1 *
+bit 290 O 1 *
+bit 289 O 1 *
+bit 288 O 1 *
+bit 287 O 1 *
+bit 286 I 1 IO_PAD58
+bit 285 O 1 IO_PAD58 284 1 Z
+bit 284 C 1 *
+bit 283 I 1 IO_PAD56
+bit 282 O 1 IO_PAD56 281 1 Z
+bit 281 C 1 *
+bit 280 I 1 IO_PAD55
+bit 279 O 1 IO_PAD55 278 1 Z
+bit 278 C 1 *
+bit 277 I 1 IO_PAD54
+bit 276 O 1 IO_PAD54 275 1 Z
+bit 275 C 1 *
+bit 274 I 1 IO_PAD53
+bit 273 O 1 IO_PAD53 272 1 Z
+bit 272 C 1 *
+bit 271 I 1 IO_PAD51
+bit 270 O 1 IO_PAD51 269 1 Z
+bit 269 C 1 *
+bit 268 I 1 IO_PAD50
+bit 267 O 1 IO_PAD50 266 1 Z
+bit 266 C 1 *
+bit 265 I 1 IO_PAD49
+bit 264 O 1 IO_PAD49 263 1 Z
+bit 263 C 1 *
+bit 262 I 1 IO_PAD48
+bit 261 O 1 IO_PAD48 260 1 Z
+bit 260 C 1 *
+bit 259 I 1 IO_PAD47
+bit 258 O 1 IO_PAD47 257 1 Z
+bit 257 C 1 *
+bit 256 I 1 IO_PAD46
+bit 255 O 1 IO_PAD46 254 1 Z
+bit 254 C 1 *
+bit 253 I 1 IO_PAD43
+bit 252 O 1 IO_PAD43 251 1 Z
+bit 251 C 1 *
+bit 250 I 1 IO_PAD42
+bit 249 O 1 IO_PAD42 248 1 Z
+bit 248 C 1 *
+bit 247 O 1 *
+bit 246 O 1 *
+bit 245 O 1 *
+bit 244 I 1 IO_PAD41
+bit 243 O 1 IO_PAD41 242 1 Z
+bit 242 C 1 *
+bit 241 I 1 IO_PAD40
+bit 240 O 1 IO_PAD40 239 1 Z
+bit 239 C 1 *
+bit 238 I 1 IO_PAD39
+bit 237 O 1 IO_PAD39 236 1 Z
+bit 236 C 1 *
+bit 235 I 1 IO_PAD37
+bit 234 O 1 IO_PAD37 233 1 Z
+bit 233 C 1 *
+bit 232 I 1 IO_PAD36
+bit 231 O 1 IO_PAD36 230 1 Z
+bit 230 C 1 *
+bit 229 O 1 *
+bit 228 O 1 *
+bit 227 O 1 *
+bit 226 I 1 IO_PAD35
+bit 225 O 1 IO_PAD35 224 1 Z
+bit 224 C 1 *
+bit 223 I 1 IO_PAD34
+bit 222 O 1 IO_PAD34 221 1 Z
+bit 221 C 1 *
+bit 220 I 1 IO_PAD33
+bit 219 O 1 IO_PAD33 218 1 Z
+bit 218 C 1 *
+bit 217 I 1 IO_PAD28
+bit 216 O 1 IO_PAD28 215 1 Z
+bit 215 C 1 *
+bit 214 I 1 IO_PAD27
+bit 213 O 1 IO_PAD27 212 1 Z
+bit 212 C 1 *
+bit 211 O 1 *
+bit 210 O 1 *
+bit 209 O 1 *
+bit 208 I 1 IO_PAD26
+bit 207 O 1 IO_PAD26 206 1 Z
+bit 206 C 1 *
+bit 205 I 1 IO_PAD25
+bit 204 O 1 IO_PAD25 203 1 Z
+bit 203 C 1 *
+bit 202 I 1 IO_PAD24
+bit 201 O 1 IO_PAD24 200 1 Z
+bit 200 C 1 *
+bit 199 I 1 IO_PAD22
+bit 198 O 1 IO_PAD22 197 1 Z
+bit 197 C 1 *
+bit 196 I 1 IO_PAD21
+bit 195 O 1 IO_PAD21 194 1 Z
+bit 194 C 1 *
+bit 193 O 1 *
+bit 192 O 1 *
+bit 191 O 1 *
+bit 190 I 1 IO_PAD20
+bit 189 O 1 IO_PAD20 188 1 Z
+bit 188 C 1 *
+bit 187 I 1 IO_PAD19
+bit 186 O 1 IO_PAD19 185 1 Z
+bit 185 C 1 *
+bit 184 I 1 IO_PAD18
+bit 183 O 1 IO_PAD18 182 1 Z
+bit 182 C 1 *
+bit 181 I 1 IO_PAD13
+bit 180 O 1 IO_PAD13 179 1 Z
+bit 179 C 1 *
+bit 178 I 1 IO_PAD12
+bit 177 O 1 IO_PAD12 176 1 Z
+bit 176 C 1 *
+bit 175 O 1 *
+bit 174 O 1 *
+bit 173 O 1 *
+bit 172 I 1 IO_PAD11
+bit 171 O 1 IO_PAD11 170 1 Z
+bit 170 C 1 *
+bit 169 I 1 IO_PAD10
+bit 168 O 1 IO_PAD10 167 1 Z
+bit 167 C 1 *
+bit 166 I 1 IO_PAD9
+bit 165 O 1 IO_PAD9 164 1 Z
+bit 164 C 1 *
+bit 163 I 1 IO_PAD7
+bit 162 O 1 IO_PAD7 161 1 Z
+bit 161 C 1 *
+bit 160 I 1 IO_PAD6
+bit 159 O 1 IO_PAD6 158 1 Z
+bit 158 C 1 *
+bit 157 O 1 *
+bit 156 O 1 *
+bit 155 O 1 *
+bit 154 O 1 *
+bit 153 O 1 *
+bit 152 O 1 *
+bit 151 O 1 *
+bit 150 O 1 *
+bit 149 O 1 *
+bit 148 I 1 IO_PAD5
+bit 147 O 1 IO_PAD5 146 1 Z
+bit 146 C 1 *
+bit 145 I 1 GCK3_PAD2
+bit 144 I 1 GCK2_PAD500
+bit 143 I 1 IO_PAD499
+bit 142 O 1 IO_PAD499 141 1 Z
+bit 141 C 1 *
+bit 140 O 1 *
+bit 139 O 1 *
+bit 138 O 1 *
+bit 137 I 1 IO_PAD498
+bit 136 O 1 IO_PAD498 135 1 Z
+bit 135 C 1 *
+bit 134 O 1 *
+bit 133 O 1 *
+bit 132 O 1 *
+bit 131 I 1 IO_PAD497
+bit 130 O 1 IO_PAD497 129 1 Z
+bit 129 C 1 *
+bit 128 I 1 IO_PAD496
+bit 127 O 1 IO_PAD496 126 1 Z
+bit 126 C 1 *
+bit 125 I 1 IO_PAD494
+bit 124 O 1 IO_PAD494 123 1 Z
+bit 123 C 1 *
+bit 122 I 1 IO_PAD493
+bit 121 O 1 IO_PAD493 120 1 Z
+bit 120 C 1 *
+bit 119 I 1 IO_PAD491
+bit 118 O 1 IO_PAD491 117 1 Z
+bit 117 C 1 *
+bit 116 O 1 *
+bit 115 O 1 *
+bit 114 O 1 *
+bit 113 I 1 IO_PAD490
+bit 112 O 1 IO_PAD490 111 1 Z
+bit 111 C 1 *
+bit 110 I 1 IO_PAD489
+bit 109 O 1 IO_PAD489 108 1 Z
+bit 108 C 1 *
+bit 107 I 1 IO_PAD484
+bit 106 O 1 IO_PAD484 105 1 Z
+bit 105 C 1 *
+bit 104 I 1 IO_PAD483
+bit 103 O 1 IO_PAD483 102 1 Z
+bit 102 C 1 *
+bit 101 I 1 IO_PAD482
+bit 100 O 1 IO_PAD482 99 1 Z
+bit 99 C 1 *
+bit 98 O 1 *
+bit 97 O 1 *
+bit 96 O 1 *
+bit 95 I 1 IO_PAD481
+bit 94 O 1 IO_PAD481 93 1 Z
+bit 93 C 1 *
+bit 92 I 1 IO_PAD480
+bit 91 O 1 IO_PAD480 90 1 Z
+bit 90 C 1 *
+bit 89 I 1 IO_PAD478
+bit 88 O 1 IO_PAD478 87 1 Z
+bit 87 C 1 *
+bit 86 I 1 IO_PAD477
+bit 85 O 1 IO_PAD477 84 1 Z
+bit 84 C 1 *
+bit 83 I 1 IO_PAD476
+bit 82 O 1 IO_PAD476 81 1 Z
+bit 81 C 1 *
+bit 80 O 1 *
+bit 79 O 1 *
+bit 78 O 1 *
+bit 77 I 1 IO_PAD475
+bit 76 O 1 IO_PAD475 75 1 Z
+bit 75 C 1 *
+bit 74 I 1 IO_PAD474
+bit 73 O 1 IO_PAD474 72 1 Z
+bit 72 C 1 *
+bit 71 I 1 IO_PAD469
+bit 70 O 1 IO_PAD469 69 1 Z
+bit 69 C 1 *
+bit 68 I 1 IO_PAD468
+bit 67 O 1 IO_PAD468 66 1 Z
+bit 66 C 1 *
+bit 65 I 1 IO_PAD467
+bit 64 O 1 IO_PAD467 63 1 Z
+bit 63 C 1 *
+bit 62 O 1 *
+bit 61 O 1 *
+bit 60 O 1 *
+bit 59 I 1 IO_PAD466
+bit 58 O 1 IO_PAD466 57 1 Z
+bit 57 C 1 *
+bit 56 I 1 IO_PAD465
+bit 55 O 1 IO_PAD465 54 1 Z
+bit 54 C 1 *
+bit 53 I 1 IO_PAD463
+bit 52 O 1 IO_PAD463 51 1 Z
+bit 51 C 1 *
+bit 50 I 1 IO_PAD462
+bit 49 O 1 IO_PAD462 48 1 Z
+bit 48 C 1 *
+bit 47 I 1 IO_PAD461
+bit 46 O 1 IO_PAD461 45 1 Z
+bit 45 C 1 *
+bit 44 O 1 *
+bit 43 O 1 *
+bit 42 O 1 *
+bit 41 I 1 IO_PAD460
+bit 40 O 1 IO_PAD460 39 1 Z
+bit 39 C 1 *
+bit 38 I 1 IO_PAD459
+bit 37 O 1 IO_PAD459 36 1 Z
+bit 36 C 1 *
+bit 35 I 1 IO_PAD456
+bit 34 O 1 IO_PAD456 33 1 Z
+bit 33 C 1 *
+bit 32 I 1 IO_PAD455
+bit 31 O 1 IO_PAD455 30 1 Z
+bit 30 C 1 *
+bit 29 I 1 IO_PAD454
+bit 28 O 1 IO_PAD454 27 1 Z
+bit 27 C 1 *
+bit 26 I 1 IO_PAD453
+bit 25 O 1 IO_PAD453 24 1 Z
+bit 24 C 1 *
+bit 23 I 1 IO_PAD452
+bit 22 O 1 IO_PAD452 21 1 Z
+bit 21 C 1 *
+bit 20 I 1 IO_PAD451
+bit 19 O 1 IO_PAD451 18 1 Z
+bit 18 C 1 *
+bit 17 I 1 IO_PAD449
+bit 16 O 1 IO_PAD449 15 1 Z
+bit 15 C 1 *
+bit 14 I 1 IO_PAD448
+bit 13 O 1 IO_PAD448 12 1 Z
+bit 12 C 1 *
+bit 11 I 1 IO_PAD447
+bit 10 O 1 IO_PAD447 9 1 Z
+bit 9 C 1 *
+bit 8 I 1 IO_PAD446
+bit 7 O 1 IO_PAD446 6 1 Z
+bit 6 C 1 *
+bit 5 I 1 IO_PAD445
+bit 4 O 1 IO_PAD445 3 1 Z
+bit 3 C 1 *
+bit 2 I 1 IO_PAD444
+bit 1 O 1 IO_PAD444 0 1 Z
+bit 0 C 1 *
--- /dev/null
+#
+# $Id$
+#
+# Copyright (C) 2002 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Marcel Telka <marcel@telka.sk>, 2002.
+#
+
+# bits 31-28 of the Device Identification Register
+#0010 xc2v1000-fg256 0
+0011 xc2v1000-fg256 0
--- /dev/null
+signal CCLK_P15
+signal DONE_R14
+signal GND1
+signal GND2
+signal GND3
+signal GND4
+signal GND5
+signal GND6
+signal GND7
+signal GND8
+signal GND9
+signal GND10
+signal GND11
+signal GND12
+signal GND13
+signal GND14
+signal GND15
+signal GND16
+signal GND17
+signal GND18
+signal GND19
+signal GND20
+signal GND21
+signal GND22
+signal GND23
+signal GND24
+signal GND25
+signal GND26
+signal GND27
+signal GND28
+signal GND29
+signal GND30
+signal GND31
+signal GND32
+signal HSWAP_EN_B3
+signal M0_T2
+signal M1_P2
+signal M2_R3
+signal PROG_B
+signal PWRDWN_B
+signal RSVD1
+signal RSVD2
+signal RSVD3
+signal TCK
+signal TDI
+signal TDO
+signal TMS
+signal VBATT
+signal VCCAUX1
+signal VCCAUX2
+signal VCCAUX3
+signal VCCAUX4
+signal VCCINT1
+signal VCCINT2
+signal VCCINT3
+signal VCCINT4
+signal VCCINT5
+signal VCCINT6
+signal VCCINT7
+signal VCCINT8
+signal VCCO01
+signal VCCO02
+signal VCCO03
+signal VCCO11
+signal VCCO12
+signal VCCO13
+signal VCCO21
+signal VCCO22
+signal VCCO23
+signal VCCO31
+signal VCCO32
+signal VCCO33
+signal VCCO41
+signal VCCO42
+signal VCCO43
+signal VCCO51
+signal VCCO52
+signal VCCO53
+signal VCCO61
+signal VCCO62
+signal VCCO63
+signal VCCO71
+signal VCCO72
+signal VCCO73
+signal IO_A5
+signal IO_A6
+signal IO_A7
+signal IO_A8
+signal IO_A9
+signal IO_A10
+signal IO_A11
+signal IO_A12
+signal IO_B4
+signal IO_B5
+signal IO_B6
+signal IO_B7
+signal IO_B8
+signal IO_B9
+signal IO_B10
+signal IO_B11
+signal IO_B12
+signal IO_B13
+signal IO_C1
+signal IO_C4
+signal IO_C5
+signal IO_C6
+signal IO_C7
+signal IO_C8
+signal IO_C9
+signal IO_C10
+signal IO_C11
+signal IO_C12
+signal IO_C13
+signal IO_C16
+signal IO_D1
+signal IO_D2
+signal IO_D3
+signal IO_D5
+signal IO_D6
+signal IO_D7
+signal IO_D8
+signal IO_D9
+signal IO_D10
+signal IO_D11
+signal IO_D12
+signal IO_D14
+signal IO_D15
+signal IO_D16
+signal IO_E1
+signal IO_E2
+signal IO_E3
+signal IO_E4
+signal IO_E6
+signal IO_E7
+signal IO_E10
+signal IO_E11
+signal IO_E13
+signal IO_E14
+signal IO_E15
+signal IO_E16
+signal IO_F1
+signal IO_F2
+signal IO_F3
+signal IO_F4
+signal IO_F5
+signal IO_F12
+signal IO_F13
+signal IO_F14
+signal IO_F15
+signal IO_F16
+signal IO_G1
+signal IO_G2
+signal IO_G3
+signal IO_G4
+signal IO_G5
+signal IO_G12
+signal IO_G13
+signal IO_G14
+signal IO_G15
+signal IO_G16
+signal IO_H1
+signal IO_H2
+signal IO_H3
+signal IO_H4
+signal IO_H13
+signal IO_H14
+signal IO_H15
+signal IO_H16
+signal IO_J1
+signal IO_J2
+signal IO_J3
+signal IO_J4
+signal IO_J13
+signal IO_J14
+signal IO_J15
+signal IO_J16
+signal IO_K1
+signal IO_K2
+signal IO_K3
+signal IO_K4
+signal IO_K5
+signal IO_K12
+signal IO_K13
+signal IO_K14
+signal IO_K15
+signal IO_K16
+signal IO_L1
+signal IO_L2
+signal IO_L3
+signal IO_L4
+signal IO_L5
+signal IO_L12
+signal IO_L13
+signal IO_L14
+signal IO_L15
+signal IO_L16
+signal IO_M1
+signal IO_M2
+signal IO_M3
+signal IO_M4
+signal IO_M6
+signal IO_M7
+signal IO_M10
+signal IO_M11
+signal IO_M13
+signal IO_M14
+signal IO_M15
+signal IO_M16
+signal IO_N1
+signal IO_N2
+signal IO_N3
+signal IO_N5
+signal IO_N6
+signal IO_N7
+signal IO_N8
+signal IO_N9
+signal IO_N10
+signal IO_N11
+signal IO_N12
+signal IO_N14
+signal IO_N15
+signal IO_N16
+signal IO_P1
+signal IO_P4
+signal IO_P5
+signal IO_P6
+signal IO_P7
+signal IO_P8
+signal IO_P9
+signal IO_P10
+signal IO_P11
+signal IO_P12
+signal IO_P13
+signal IO_P16
+signal IO_R4
+signal IO_R5
+signal IO_R6
+signal IO_R7
+signal IO_R8
+signal IO_R9
+signal IO_R10
+signal IO_R11
+signal IO_R12
+signal IO_R13
+signal IO_T3
+signal IO_T4
+signal IO_T5
+signal IO_T6
+signal IO_T7
+signal IO_T8
+signal IO_T9
+signal IO_T10
+signal IO_T11
+signal IO_T12
+signal IO_T13
+
+register BSR 1308
+register BR 1
+register DIR 32
+
+instruction length 6
+
+instruction EXTEST 000000 BSR
+instruction SAMPLE/PRELOAD 000001 BSR
+instruction IDCODE 001001 DIR
+instruction BYPASS 111111 BR
+
+bit 1307 I 1 IO_C16
+bit 1306 O 1 IO_C16 1305 1 Z
+bit 1305 C 1 *
+bit 1304 I 1 IO_D16
+bit 1303 O 1 IO_D16 1302 1 Z
+bit 1302 C 1 *
+bit 1301 I 1 IO_D14
+bit 1300 O 1 IO_D14 1299 1 Z
+bit 1299 C 1 *
+bit 1298 I 1 IO_D15
+bit 1297 O 1 IO_D15 1296 1 Z
+bit 1296 C 1 *
+bit 1295 I 1 IO_E13
+bit 1294 O 1 IO_E13 1293 1 Z
+bit 1293 C 1 *
+bit 1292 I 1 IO_E14
+bit 1291 O 1 IO_E14 1290 1 Z
+bit 1290 C 1 *
+bit 1289 I 1 IO_E15
+bit 1288 O 1 IO_E15 1287 1 Z
+bit 1287 C 1 *
+bit 1286 I 1 IO_E16
+bit 1285 O 1 IO_E16 1284 1 Z
+bit 1284 C 1 *
+bit 1283 O 1 *
+bit 1282 O 1 *
+bit 1281 O 1 *
+bit 1280 O 1 *
+bit 1279 O 1 *
+bit 1278 O 1 *
+bit 1277 I 1 IO_F13
+bit 1276 O 1 IO_F13 1275 1 Z
+bit 1275 C 1 *
+bit 1274 I 1 IO_F14
+bit 1273 O 1 IO_F14 1272 1 Z
+bit 1272 C 1 *
+bit 1271 O 1 *
+bit 1270 O 1 *
+bit 1269 O 1 *
+bit 1268 O 1 *
+bit 1267 O 1 *
+bit 1266 O 1 *
+bit 1265 O 1 *
+bit 1264 O 1 *
+bit 1263 O 1 *
+bit 1262 O 1 *
+bit 1261 O 1 *
+bit 1260 O 1 *
+bit 1259 O 1 *
+bit 1258 O 1 *
+bit 1257 O 1 *
+bit 1256 O 1 *
+bit 1255 O 1 *
+bit 1254 O 1 *
+bit 1253 O 1 *
+bit 1252 O 1 *
+bit 1251 O 1 *
+bit 1250 O 1 *
+bit 1249 O 1 *
+bit 1248 O 1 *
+bit 1247 O 1 *
+bit 1246 O 1 *
+bit 1245 O 1 *
+bit 1244 O 1 *
+bit 1243 O 1 *
+bit 1242 O 1 *
+bit 1241 O 1 *
+bit 1240 O 1 *
+bit 1239 O 1 *
+bit 1238 O 1 *
+bit 1237 O 1 *
+bit 1236 O 1 *
+bit 1235 I 1 IO_F15
+bit 1234 O 1 IO_F15 1233 1 Z
+bit 1233 C 1 *
+bit 1232 I 1 IO_F16
+bit 1231 O 1 IO_F16 1230 1 Z
+bit 1230 C 1 *
+bit 1229 O 1 *
+bit 1228 O 1 *
+bit 1227 O 1 *
+bit 1226 O 1 *
+bit 1225 O 1 *
+bit 1224 O 1 *
+bit 1223 I 1 IO_F12
+bit 1222 O 1 IO_F12 1221 1 Z
+bit 1221 C 1 *
+bit 1220 I 1 IO_G12
+bit 1219 O 1 IO_G12 1218 1 Z
+bit 1218 C 1 *
+bit 1217 O 1 *
+bit 1216 O 1 *
+bit 1215 O 1 *
+bit 1214 O 1 *
+bit 1213 O 1 *
+bit 1212 O 1 *
+bit 1211 O 1 *
+bit 1210 O 1 *
+bit 1209 O 1 *
+bit 1208 O 1 *
+bit 1207 O 1 *
+bit 1206 O 1 *
+bit 1205 O 1 *
+bit 1204 O 1 *
+bit 1203 O 1 *
+bit 1202 O 1 *
+bit 1201 O 1 *
+bit 1200 O 1 *
+bit 1199 O 1 *
+bit 1198 O 1 *
+bit 1197 O 1 *
+bit 1196 O 1 *
+bit 1195 O 1 *
+bit 1194 O 1 *
+bit 1193 O 1 *
+bit 1192 O 1 *
+bit 1191 O 1 *
+bit 1190 O 1 *
+bit 1189 O 1 *
+bit 1188 O 1 *
+bit 1187 O 1 *
+bit 1186 O 1 *
+bit 1185 O 1 *
+bit 1184 O 1 *
+bit 1183 O 1 *
+bit 1182 O 1 *
+bit 1181 O 1 *
+bit 1180 O 1 *
+bit 1179 O 1 *
+bit 1178 O 1 *
+bit 1177 O 1 *
+bit 1176 O 1 *
+bit 1175 O 1 *
+bit 1174 O 1 *
+bit 1173 O 1 *
+bit 1172 O 1 *
+bit 1171 O 1 *
+bit 1170 O 1 *
+bit 1169 O 1 *
+bit 1168 O 1 *
+bit 1167 O 1 *
+bit 1166 O 1 *
+bit 1165 O 1 *
+bit 1164 O 1 *
+bit 1163 I 1 IO_G13
+bit 1162 O 1 IO_G13 1161 1 Z
+bit 1161 C 1 *
+bit 1160 I 1 IO_G14
+bit 1159 O 1 IO_G14 1158 1 Z
+bit 1158 C 1 *
+bit 1157 O 1 *
+bit 1156 O 1 *
+bit 1155 O 1 *
+bit 1154 O 1 *
+bit 1153 O 1 *
+bit 1152 O 1 *
+bit 1151 I 1 IO_G15
+bit 1150 O 1 IO_G15 1149 1 Z
+bit 1149 C 1 *
+bit 1148 I 1 IO_G16
+bit 1147 O 1 IO_G16 1146 1 Z
+bit 1146 C 1 *
+bit 1145 I 1 IO_H13
+bit 1144 O 1 IO_H13 1143 1 Z
+bit 1143 C 1 *
+bit 1142 I 1 IO_H14
+bit 1141 O 1 IO_H14 1140 1 Z
+bit 1140 C 1 *
+bit 1139 O 1 *
+bit 1138 O 1 *
+bit 1137 O 1 *
+bit 1136 O 1 *
+bit 1135 O 1 *
+bit 1134 O 1 *
+bit 1133 I 1 IO_H15
+bit 1132 O 1 IO_H15 1131 1 Z
+bit 1131 C 1 *
+bit 1130 I 1 IO_H16
+bit 1129 O 1 IO_H16 1128 1 Z
+bit 1128 C 1 *
+bit 1127 I 1 IO_J16
+bit 1126 O 1 IO_J16 1125 1 Z
+bit 1125 C 1 *
+bit 1124 I 1 IO_J15
+bit 1123 O 1 IO_J15 1122 1 Z
+bit 1122 C 1 *
+bit 1121 O 1 *
+bit 1120 O 1 *
+bit 1119 O 1 *
+bit 1118 O 1 *
+bit 1117 O 1 *
+bit 1116 O 1 *
+bit 1115 I 1 IO_J14
+bit 1114 O 1 IO_J14 1113 1 Z
+bit 1113 C 1 *
+bit 1112 I 1 IO_J13
+bit 1111 O 1 IO_J13 1110 1 Z
+bit 1110 C 1 *
+bit 1109 I 1 IO_K16
+bit 1108 O 1 IO_K16 1107 1 Z
+bit 1107 C 1 *
+bit 1106 I 1 IO_K15
+bit 1105 O 1 IO_K15 1104 1 Z
+bit 1104 C 1 *
+bit 1103 O 1 *
+bit 1102 O 1 *
+bit 1101 O 1 *
+bit 1100 O 1 *
+bit 1099 O 1 *
+bit 1098 O 1 *
+bit 1097 I 1 IO_K14
+bit 1096 O 1 IO_K14 1095 1 Z
+bit 1095 C 1 *
+bit 1094 I 1 IO_K13
+bit 1093 O 1 IO_K13 1092 1 Z
+bit 1092 C 1 *
+bit 1091 O 1 *
+bit 1090 O 1 *
+bit 1089 O 1 *
+bit 1088 O 1 *
+bit 1087 O 1 *
+bit 1086 O 1 *
+bit 1085 O 1 *
+bit 1084 O 1 *
+bit 1083 O 1 *
+bit 1082 O 1 *
+bit 1081 O 1 *
+bit 1080 O 1 *
+bit 1079 O 1 *
+bit 1078 O 1 *
+bit 1077 O 1 *
+bit 1076 O 1 *
+bit 1075 O 1 *
+bit 1074 O 1 *
+bit 1073 O 1 *
+bit 1072 O 1 *
+bit 1071 O 1 *
+bit 1070 O 1 *
+bit 1069 O 1 *
+bit 1068 O 1 *
+bit 1067 O 1 *
+bit 1066 O 1 *
+bit 1065 O 1 *
+bit 1064 O 1 *
+bit 1063 O 1 *
+bit 1062 O 1 *
+bit 1061 O 1 *
+bit 1060 O 1 *
+bit 1059 O 1 *
+bit 1058 O 1 *
+bit 1057 O 1 *
+bit 1056 O 1 *
+bit 1055 O 1 *
+bit 1054 O 1 *
+bit 1053 O 1 *
+bit 1052 O 1 *
+bit 1051 O 1 *
+bit 1050 O 1 *
+bit 1049 O 1 *
+bit 1048 O 1 *
+bit 1047 O 1 *
+bit 1046 O 1 *
+bit 1045 O 1 *
+bit 1044 O 1 *
+bit 1043 O 1 *
+bit 1042 O 1 *
+bit 1041 O 1 *
+bit 1040 O 1 *
+bit 1039 O 1 *
+bit 1038 O 1 *
+bit 1037 I 1 IO_K12
+bit 1036 O 1 IO_K12 1035 1 Z
+bit 1035 C 1 *
+bit 1034 I 1 IO_L12
+bit 1033 O 1 IO_L12 1032 1 Z
+bit 1032 C 1 *
+bit 1031 O 1 *
+bit 1030 O 1 *
+bit 1029 O 1 *
+bit 1028 O 1 *
+bit 1027 O 1 *
+bit 1026 O 1 *
+bit 1025 I 1 IO_L16
+bit 1024 O 1 IO_L16 1023 1 Z
+bit 1023 C 1 *
+bit 1022 I 1 IO_L15
+bit 1021 O 1 IO_L15 1020 1 Z
+bit 1020 C 1 *
+bit 1019 O 1 *
+bit 1018 O 1 *
+bit 1017 O 1 *
+bit 1016 O 1 *
+bit 1015 O 1 *
+bit 1014 O 1 *
+bit 1013 O 1 *
+bit 1012 O 1 *
+bit 1011 O 1 *
+bit 1010 O 1 *
+bit 1009 O 1 *
+bit 1008 O 1 *
+bit 1007 O 1 *
+bit 1006 O 1 *
+bit 1005 O 1 *
+bit 1004 O 1 *
+bit 1003 O 1 *
+bit 1002 O 1 *
+bit 1001 O 1 *
+bit 1000 O 1 *
+bit 999 O 1 *
+bit 998 O 1 *
+bit 997 O 1 *
+bit 996 O 1 *
+bit 995 O 1 *
+bit 994 O 1 *
+bit 993 O 1 *
+bit 992 O 1 *
+bit 991 O 1 *
+bit 990 O 1 *
+bit 989 O 1 *
+bit 988 O 1 *
+bit 987 O 1 *
+bit 986 O 1 *
+bit 985 O 1 *
+bit 984 O 1 *
+bit 983 I 1 IO_L14
+bit 982 O 1 IO_L14 981 1 Z
+bit 981 C 1 *
+bit 980 I 1 IO_L13
+bit 979 O 1 IO_L13 978 1 Z
+bit 978 C 1 *
+bit 977 O 1 *
+bit 976 O 1 *
+bit 975 O 1 *
+bit 974 O 1 *
+bit 973 O 1 *
+bit 972 O 1 *
+bit 971 I 1 IO_M16
+bit 970 O 1 IO_M16 969 1 Z
+bit 969 C 1 *
+bit 968 I 1 IO_M15
+bit 967 O 1 IO_M15 966 1 Z
+bit 966 C 1 *
+bit 965 I 1 IO_M14
+bit 964 O 1 IO_M14 963 1 Z
+bit 963 C 1 *
+bit 962 I 1 IO_M13
+bit 961 O 1 IO_M13 960 1 Z
+bit 960 C 1 *
+bit 959 I 1 IO_N15
+bit 958 O 1 IO_N15 957 1 Z
+bit 957 C 1 *
+bit 956 I 1 IO_N14
+bit 955 O 1 IO_N14 954 1 Z
+bit 954 C 1 *
+bit 953 I 1 IO_N16
+bit 952 O 1 IO_N16 951 1 Z
+bit 951 C 1 *
+bit 950 I 1 IO_P16
+bit 949 O 1 IO_P16 948 1 Z
+bit 948 C 1 *
+bit 947 I 1 CCLK_P15
+bit 946 O 1 CCLK_P15 945 1 Z
+bit 945 C 1 *
+bit 944 O 1 *
+bit 943 I 1 DONE_R14
+bit 942 O 1 DONE_R14 941 1 Z
+bit 941 C 1 *
+bit 940 I 1 IO_T14
+bit 939 O 1 IO_T14 938 1 Z
+bit 938 C 1 *
+bit 937 I 1 IO_T13
+bit 936 O 1 IO_T13 935 1 Z
+bit 935 C 1 *
+bit 934 I 1 IO_P13
+bit 933 O 1 IO_P13 932 1 Z
+bit 932 C 1 *
+bit 931 I 1 IO_R13
+bit 930 O 1 IO_R13 929 1 Z
+bit 929 C 1 *
+bit 928 I 1 IO_N12
+bit 927 O 1 IO_N12 926 1 Z
+bit 926 C 1 *
+bit 925 I 1 IO_P12
+bit 924 O 1 IO_P12 923 1 Z
+bit 923 C 1 *
+bit 922 I 1 IO_R12
+bit 921 O 1 IO_R12 920 1 Z
+bit 920 C 1 *
+bit 919 I 1 IO_T12
+bit 918 O 1 IO_T12 917 1 Z
+bit 917 C 1 *
+bit 916 I 1 IO_N11
+bit 915 O 1 IO_N11 914 1 Z
+bit 914 C 1 *
+bit 913 I 1 IO_P11
+bit 912 O 1 IO_P11 911 1 Z
+bit 911 C 1 *
+bit 910 O 1 *
+bit 909 O 1 *
+bit 908 O 1 *
+bit 907 O 1 *
+bit 906 O 1 *
+bit 905 O 1 *
+bit 904 O 1 *
+bit 903 O 1 *
+bit 902 O 1 *
+bit 901 O 1 *
+bit 900 O 1 *
+bit 899 O 1 *
+bit 898 O 1 *
+bit 897 O 1 *
+bit 896 O 1 *
+bit 895 O 1 *
+bit 894 O 1 *
+bit 893 O 1 *
+bit 892 O 1 *
+bit 891 O 1 *
+bit 890 O 1 *
+bit 889 O 1 *
+bit 888 O 1 *
+bit 887 O 1 *
+bit 886 O 1 *
+bit 885 O 1 *
+bit 884 O 1 *
+bit 883 O 1 *
+bit 882 O 1 *
+bit 881 O 1 *
+bit 880 O 1 *
+bit 879 O 1 *
+bit 878 O 1 *
+bit 877 O 1 *
+bit 876 O 1 *
+bit 875 O 1 *
+bit 874 O 1 *
+bit 873 O 1 *
+bit 872 O 1 *
+bit 871 O 1 *
+bit 870 O 1 *
+bit 869 O 1 *
+bit 868 O 1 *
+bit 867 O 1 *
+bit 866 O 1 *
+bit 865 O 1 *
+bit 864 O 1 *
+bit 863 O 1 *
+bit 862 O 1 *
+bit 861 O 1 *
+bit 860 O 1 *
+bit 859 O 1 *
+bit 858 O 1 *
+bit 857 O 1 *
+bit 856 O 1 *
+bit 855 O 1 *
+bit 854 O 1 *
+bit 853 O 1 *
+bit 852 O 1 *
+bit 851 O 1 *
+bit 850 O 1 *
+bit 849 O 1 *
+bit 848 O 1 *
+bit 847 O 1 *
+bit 846 O 1 *
+bit 845 O 1 *
+bit 844 O 1 *
+bit 843 O 1 *
+bit 842 O 1 *
+bit 841 O 1 *
+bit 840 O 1 *
+bit 839 O 1 *
+bit 838 O 1 *
+bit 837 O 1 *
+bit 836 O 1 *
+bit 835 O 1 *
+bit 834 O 1 *
+bit 833 O 1 *
+bit 832 I 1 IO_R11
+bit 831 O 1 IO_R11 830 1 Z
+bit 830 C 1 *
+bit 829 I 1 IO_T11
+bit 828 O 1 IO_T11 827 1 Z
+bit 827 C 1 *
+bit 826 I 1 IO_M11
+bit 825 O 1 IO_M11 824 1 Z
+bit 824 C 1 *
+bit 823 I 1 IO_M10
+bit 822 O 1 IO_M10 821 1 Z
+bit 821 C 1 *
+bit 820 I 1 IO_N10
+bit 819 O 1 IO_N10 818 1 Z
+bit 818 C 1 *
+bit 817 I 1 IO_P10
+bit 816 O 1 IO_P10 815 1 Z
+bit 815 C 1 *
+bit 814 I 1 IO_R10
+bit 813 O 1 IO_R10 812 1 Z
+bit 812 C 1 *
+bit 811 I 1 IO_T10
+bit 810 O 1 IO_T10 809 1 Z
+bit 809 C 1 *
+bit 808 I 1 IO_N9
+bit 807 O 1 IO_N9 806 1 Z
+bit 806 C 1 *
+bit 805 I 1 IO_P9
+bit 804 O 1 IO_P9 803 1 Z
+bit 803 C 1 *
+bit 802 I 1 IO_R9
+bit 801 O 1 IO_R9 800 1 Z
+bit 800 C 1 *
+bit 799 I 1 IO_T9
+bit 798 O 1 IO_T9 797 1 Z
+bit 797 C 1 *
+bit 796 I 1 IO_T8
+bit 795 O 1 IO_T8 794 1 Z
+bit 794 C 1 *
+bit 793 I 1 IO_R8
+bit 792 O 1 IO_R8 791 1 Z
+bit 791 C 1 *
+bit 790 I 1 IO_P8
+bit 789 O 1 IO_P8 788 1 Z
+bit 788 C 1 *
+bit 787 I 1 IO_N8
+bit 786 O 1 IO_N8 785 1 Z
+bit 785 C 1 *
+bit 784 I 1 IO_T7
+bit 783 O 1 IO_T7 782 1 Z
+bit 782 C 1 *
+bit 781 I 1 IO_R7
+bit 780 O 1 IO_R7 779 1 Z
+bit 779 C 1 *
+bit 778 I 1 IO_P7
+bit 777 O 1 IO_P7 776 1 Z
+bit 776 C 1 *
+bit 775 I 1 IO_N7
+bit 774 O 1 IO_N7 773 1 Z
+bit 773 C 1 *
+bit 772 I 1 IO_M7
+bit 771 O 1 IO_M7 770 1 Z
+bit 770 C 1 *
+bit 769 I 1 IO_M6
+bit 768 O 1 IO_M6 767 1 Z
+bit 767 C 1 *
+bit 766 I 1 IO_T6
+bit 765 O 1 IO_T6 764 1 Z
+bit 764 C 1 *
+bit 763 I 1 IO_R6
+bit 762 O 1 IO_R6 761 1 Z
+bit 761 C 1 *
+bit 760 O 1 *
+bit 759 O 1 *
+bit 758 O 1 *
+bit 757 O 1 *
+bit 756 O 1 *
+bit 755 O 1 *
+bit 754 O 1 *
+bit 753 O 1 *
+bit 752 O 1 *
+bit 751 O 1 *
+bit 750 O 1 *
+bit 749 O 1 *
+bit 748 O 1 *
+bit 747 O 1 *
+bit 746 O 1 *
+bit 745 O 1 *
+bit 744 O 1 *
+bit 743 O 1 *
+bit 742 O 1 *
+bit 741 O 1 *
+bit 740 O 1 *
+bit 739 O 1 *
+bit 738 O 1 *
+bit 737 O 1 *
+bit 736 O 1 *
+bit 735 O 1 *
+bit 734 O 1 *
+bit 733 O 1 *
+bit 732 O 1 *
+bit 731 O 1 *
+bit 730 O 1 *
+bit 729 O 1 *
+bit 728 O 1 *
+bit 727 O 1 *
+bit 726 O 1 *
+bit 725 O 1 *
+bit 724 O 1 *
+bit 723 O 1 *
+bit 722 O 1 *
+bit 721 O 1 *
+bit 720 O 1 *
+bit 719 O 1 *
+bit 718 O 1 *
+bit 717 O 1 *
+bit 716 O 1 *
+bit 715 O 1 *
+bit 714 O 1 *
+bit 713 O 1 *
+bit 712 O 1 *
+bit 711 O 1 *
+bit 710 O 1 *
+bit 709 O 1 *
+bit 708 O 1 *
+bit 707 O 1 *
+bit 706 O 1 *
+bit 705 O 1 *
+bit 704 O 1 *
+bit 703 O 1 *
+bit 702 O 1 *
+bit 701 O 1 *
+bit 700 O 1 *
+bit 699 O 1 *
+bit 698 O 1 *
+bit 697 O 1 *
+bit 696 O 1 *
+bit 695 O 1 *
+bit 694 O 1 *
+bit 693 O 1 *
+bit 692 O 1 *
+bit 691 O 1 *
+bit 690 O 1 *
+bit 689 O 1 *
+bit 688 O 1 *
+bit 687 O 1 *
+bit 686 O 1 *
+bit 685 O 1 *
+bit 684 O 1 *
+bit 683 O 1 *
+bit 682 I 1 IO_P6
+bit 681 O 1 IO_P6 680 1 Z
+bit 680 C 1 *
+bit 679 I 1 IO_N6
+bit 678 O 1 IO_N6 677 1 Z
+bit 677 C 1 *
+bit 676 I 1 IO_T5
+bit 675 O 1 IO_T5 674 1 Z
+bit 674 C 1 *
+bit 673 I 1 IO_R5
+bit 672 O 1 IO_R5 671 1 Z
+bit 671 C 1 *
+bit 670 I 1 IO_P5
+bit 669 O 1 IO_P5 668 1 Z
+bit 668 C 1 *
+bit 667 I 1 IO_N5
+bit 666 O 1 IO_N5 665 1 Z
+bit 665 C 1 *
+bit 664 I 1 IO_R4
+bit 663 O 1 IO_R4 662 1 Z
+bit 662 C 1 *
+bit 661 I 1 IO_P4
+bit 660 O 1 IO_P4 659 1 Z
+bit 659 C 1 *
+bit 658 I 1 IO_T4
+bit 657 O 1 IO_T4 656 1 Z
+bit 656 C 1 *
+bit 655 I 1 IO_T3
+bit 654 O 1 IO_T3 653 1 Z
+bit 653 C 1 *
+bit 652 I 1 M2_R3
+bit 651 I 1 M0_T2
+bit 650 I 1 M1_P2
+bit 649 I 1 IO_P1
+bit 648 O 1 IO_P1 647 1 Z
+bit 647 C 1 *
+bit 646 I 1 IO_N1
+bit 645 O 1 IO_N1 644 1 Z
+bit 644 C 1 *
+bit 643 I 1 IO_N3
+bit 642 O 1 IO_N3 641 1 Z
+bit 641 C 1 *
+bit 640 I 1 IO_N2
+bit 639 O 1 IO_N2 638 1 Z
+bit 638 C 1 *
+bit 637 I 1 IO_M4
+bit 636 O 1 IO_M4 635 1 Z
+bit 635 C 1 *
+bit 634 I 1 IO_M3
+bit 633 O 1 IO_M3 632 1 Z
+bit 632 C 1 *
+bit 631 I 1 IO_M2
+bit 630 O 1 IO_M2 629 1 Z
+bit 629 C 1 *
+bit 628 I 1 IO_M1
+bit 627 O 1 IO_M1 626 1 Z
+bit 626 C 1 *
+bit 625 O 1 *
+bit 624 O 1 *
+bit 623 O 1 *
+bit 622 O 1 *
+bit 621 O 1 *
+bit 620 O 1 *
+bit 619 I 1 IO_L4
+bit 618 O 1 IO_L4 617 1 Z
+bit 617 C 1 *
+bit 616 I 1 IO_L3
+bit 615 O 1 IO_L3 614 1 Z
+bit 614 C 1 *
+bit 613 O 1 *
+bit 612 O 1 *
+bit 611 O 1 *
+bit 610 O 1 *
+bit 609 O 1 *
+bit 608 O 1 *
+bit 607 O 1 *
+bit 606 O 1 *
+bit 605 O 1 *
+bit 604 O 1 *
+bit 603 O 1 *
+bit 602 O 1 *
+bit 601 O 1 *
+bit 600 O 1 *
+bit 599 O 1 *
+bit 598 O 1 *
+bit 597 O 1 *
+bit 596 O 1 *
+bit 595 O 1 *
+bit 594 O 1 *
+bit 593 O 1 *
+bit 592 O 1 *
+bit 591 O 1 *
+bit 590 O 1 *
+bit 589 O 1 *
+bit 588 O 1 *
+bit 587 O 1 *
+bit 586 O 1 *
+bit 585 O 1 *
+bit 584 O 1 *
+bit 583 O 1 *
+bit 582 O 1 *
+bit 581 O 1 *
+bit 580 O 1 *
+bit 579 O 1 *
+bit 578 O 1 *
+bit 577 I 1 IO_L2
+bit 576 O 1 IO_L2 575 1 Z
+bit 575 C 1 *
+bit 574 I 1 IO_L1
+bit 573 O 1 IO_L1 572 1 Z
+bit 572 C 1 *
+bit 571 O 1 *
+bit 570 O 1 *
+bit 569 O 1 *
+bit 568 O 1 *
+bit 567 O 1 *
+bit 566 O 1 *
+bit 565 I 1 IO_L5
+bit 564 O 1 IO_L5 563 1 Z
+bit 563 C 1 *
+bit 562 I 1 IO_K5
+bit 561 O 1 IO_K5 560 1 Z
+bit 560 C 1 *
+bit 559 O 1 *
+bit 558 O 1 *
+bit 557 O 1 *
+bit 556 O 1 *
+bit 555 O 1 *
+bit 554 O 1 *
+bit 553 O 1 *
+bit 552 O 1 *
+bit 551 O 1 *
+bit 550 O 1 *
+bit 549 O 1 *
+bit 548 O 1 *
+bit 547 O 1 *
+bit 546 O 1 *
+bit 545 O 1 *
+bit 544 O 1 *
+bit 543 O 1 *
+bit 542 O 1 *
+bit 541 O 1 *
+bit 540 O 1 *
+bit 539 O 1 *
+bit 538 O 1 *
+bit 537 O 1 *
+bit 536 O 1 *
+bit 535 O 1 *
+bit 534 O 1 *
+bit 533 O 1 *
+bit 532 O 1 *
+bit 531 O 1 *
+bit 530 O 1 *
+bit 529 O 1 *
+bit 528 O 1 *
+bit 527 O 1 *
+bit 526 O 1 *
+bit 525 O 1 *
+bit 524 O 1 *
+bit 523 O 1 *
+bit 522 O 1 *
+bit 521 O 1 *
+bit 520 O 1 *
+bit 519 O 1 *
+bit 518 O 1 *
+bit 517 O 1 *
+bit 516 O 1 *
+bit 515 O 1 *
+bit 514 O 1 *
+bit 513 O 1 *
+bit 512 O 1 *
+bit 511 O 1 *
+bit 510 O 1 *
+bit 509 O 1 *
+bit 508 O 1 *
+bit 507 O 1 *
+bit 506 O 1 *
+bit 505 I 1 IO_K4
+bit 504 O 1 IO_K4 503 1 Z
+bit 503 C 1 *
+bit 502 I 1 IO_K3
+bit 501 O 1 IO_K3 500 1 Z
+bit 500 C 1 *
+bit 499 O 1 *
+bit 498 O 1 *
+bit 497 O 1 *
+bit 496 O 1 *
+bit 495 O 1 *
+bit 494 O 1 *
+bit 493 I 1 IO_K2
+bit 492 O 1 IO_K2 491 1 Z
+bit 491 C 1 *
+bit 490 I 1 IO_K1
+bit 489 O 1 IO_K1 488 1 Z
+bit 488 C 1 *
+bit 487 I 1 IO_J4
+bit 486 O 1 IO_J4 485 1 Z
+bit 485 C 1 *
+bit 484 I 1 IO_J3
+bit 483 O 1 IO_J3 482 1 Z
+bit 482 C 1 *
+bit 481 O 1 *
+bit 480 O 1 *
+bit 479 O 1 *
+bit 478 O 1 *
+bit 477 O 1 *
+bit 476 O 1 *
+bit 475 I 1 IO_J2
+bit 474 O 1 IO_J2 473 1 Z
+bit 473 C 1 *
+bit 472 I 1 IO_J1
+bit 471 O 1 IO_J1 470 1 Z
+bit 470 C 1 *
+bit 469 I 1 IO_H1
+bit 468 O 1 IO_H1 467 1 Z
+bit 467 C 1 *
+bit 466 I 1 IO_H2
+bit 465 O 1 IO_H2 464 1 Z
+bit 464 C 1 *
+bit 463 O 1 *
+bit 462 O 1 *
+bit 461 O 1 *
+bit 460 O 1 *
+bit 459 O 1 *
+bit 458 O 1 *
+bit 457 I 1 IO_H3
+bit 456 O 1 IO_H3 455 1 Z
+bit 455 C 1 *
+bit 454 I 1 IO_H4
+bit 453 O 1 IO_H4 452 1 Z
+bit 452 C 1 *
+bit 451 I 1 IO_G1
+bit 450 O 1 IO_G1 449 1 Z
+bit 449 C 1 *
+bit 448 I 1 IO_G2
+bit 447 O 1 IO_G2 446 1 Z
+bit 446 C 1 *
+bit 445 O 1 *
+bit 444 O 1 *
+bit 443 O 1 *
+bit 442 O 1 *
+bit 441 O 1 *
+bit 440 O 1 *
+bit 439 I 1 IO_G3
+bit 438 O 1 IO_G3 437 1 Z
+bit 437 C 1 *
+bit 436 I 1 IO_G4
+bit 435 O 1 IO_G4 434 1 Z
+bit 434 C 1 *
+bit 433 O 1 *
+bit 432 O 1 *
+bit 431 O 1 *
+bit 430 O 1 *
+bit 429 O 1 *
+bit 428 O 1 *
+bit 427 O 1 *
+bit 426 O 1 *
+bit 425 O 1 *
+bit 424 O 1 *
+bit 423 O 1 *
+bit 422 O 1 *
+bit 421 O 1 *
+bit 420 O 1 *
+bit 419 O 1 *
+bit 418 O 1 *
+bit 417 O 1 *
+bit 416 O 1 *
+bit 415 O 1 *
+bit 414 O 1 *
+bit 413 O 1 *
+bit 412 O 1 *
+bit 411 O 1 *
+bit 410 O 1 *
+bit 409 O 1 *
+bit 408 O 1 *
+bit 407 O 1 *
+bit 406 O 1 *
+bit 405 O 1 *
+bit 404 O 1 *
+bit 403 O 1 *
+bit 402 O 1 *
+bit 401 O 1 *
+bit 400 O 1 *
+bit 399 O 1 *
+bit 398 O 1 *
+bit 397 O 1 *
+bit 396 O 1 *
+bit 395 O 1 *
+bit 394 O 1 *
+bit 393 O 1 *
+bit 392 O 1 *
+bit 391 O 1 *
+bit 390 O 1 *
+bit 389 O 1 *
+bit 388 O 1 *
+bit 387 O 1 *
+bit 386 O 1 *
+bit 385 O 1 *
+bit 384 O 1 *
+bit 383 O 1 *
+bit 382 O 1 *
+bit 381 O 1 *
+bit 380 O 1 *
+bit 379 I 1 IO_G5
+bit 378 O 1 IO_G5 377 1 Z
+bit 377 C 1 *
+bit 376 I 1 IO_F5
+bit 375 O 1 IO_F5 374 1 Z
+bit 374 C 1 *
+bit 373 O 1 *
+bit 372 O 1 *
+bit 371 O 1 *
+bit 370 O 1 *
+bit 369 O 1 *
+bit 368 O 1 *
+bit 367 I 1 IO_F1
+bit 366 O 1 IO_F1 365 1 Z
+bit 365 C 1 *
+bit 364 I 1 IO_F2
+bit 363 O 1 IO_F2 362 1 Z
+bit 362 C 1 *
+bit 361 O 1 *
+bit 360 O 1 *
+bit 359 O 1 *
+bit 358 O 1 *
+bit 357 O 1 *
+bit 356 O 1 *
+bit 355 O 1 *
+bit 354 O 1 *
+bit 353 O 1 *
+bit 352 O 1 *
+bit 351 O 1 *
+bit 350 O 1 *
+bit 349 O 1 *
+bit 348 O 1 *
+bit 347 O 1 *
+bit 346 O 1 *
+bit 345 O 1 *
+bit 344 O 1 *
+bit 343 O 1 *
+bit 342 O 1 *
+bit 341 O 1 *
+bit 340 O 1 *
+bit 339 O 1 *
+bit 338 O 1 *
+bit 337 O 1 *
+bit 336 O 1 *
+bit 335 O 1 *
+bit 334 O 1 *
+bit 333 O 1 *
+bit 332 O 1 *
+bit 331 O 1 *
+bit 330 O 1 *
+bit 329 O 1 *
+bit 328 O 1 *
+bit 327 O 1 *
+bit 326 O 1 *
+bit 325 I 1 IO_F3
+bit 324 O 1 IO_F3 323 1 Z
+bit 323 C 1 *
+bit 322 I 1 IO_F4
+bit 321 O 1 IO_F4 320 1 Z
+bit 320 C 1 *
+bit 319 O 1 *
+bit 318 O 1 *
+bit 317 O 1 *
+bit 316 O 1 *
+bit 315 O 1 *
+bit 314 O 1 *
+bit 313 I 1 IO_E1
+bit 312 O 1 IO_E1 311 1 Z
+bit 311 C 1 *
+bit 310 I 1 IO_E2
+bit 309 O 1 IO_E2 308 1 Z
+bit 308 C 1 *
+bit 307 I 1 IO_E3
+bit 306 O 1 IO_E3 305 1 Z
+bit 305 C 1 *
+bit 304 I 1 IO_E4
+bit 303 O 1 IO_E4 302 1 Z
+bit 302 C 1 *
+bit 301 I 1 IO_D2
+bit 300 O 1 IO_D2 299 1 Z
+bit 299 C 1 *
+bit 298 I 1 IO_D3
+bit 297 O 1 IO_D3 296 1 Z
+bit 296 C 1 *
+bit 295 I 1 IO_D1
+bit 294 O 1 IO_D1 293 1 Z
+bit 293 C 1 *
+bit 292 I 1 IO_C1
+bit 291 O 1 IO_C1 290 1 Z
+bit 290 C 1 *
+bit 289 O 1 *
+bit 288 I 1 HSWAP_EN_B3
+bit 287 I 1 IO_C4
+bit 286 O 1 IO_C4 285 1 Z
+bit 285 C 1 *
+bit 284 I 1 IO_B4
+bit 283 O 1 IO_B4 282 1 Z
+bit 282 C 1 *
+bit 281 I 1 IO_D5
+bit 280 O 1 IO_D5 279 1 Z
+bit 279 C 1 *
+bit 278 I 1 IO_C5
+bit 277 O 1 IO_C5 276 1 Z
+bit 276 C 1 *
+bit 275 I 1 IO_B5
+bit 274 O 1 IO_B5 273 1 Z
+bit 273 C 1 *
+bit 272 I 1 IO_A5
+bit 271 O 1 IO_A5 270 1 Z
+bit 270 C 1 *
+bit 269 I 1 IO_D6
+bit 268 O 1 IO_D6 267 1 Z
+bit 267 C 1 *
+bit 266 I 1 IO_C6
+bit 265 O 1 IO_C6 264 1 Z
+bit 264 C 1 *
+bit 263 I 1 IO_B6
+bit 262 O 1 IO_B6 261 1 Z
+bit 261 C 1 *
+bit 260 I 1 IO_A6
+bit 259 O 1 IO_A6 258 1 Z
+bit 258 C 1 *
+bit 257 O 1 *
+bit 256 O 1 *
+bit 255 O 1 *
+bit 254 O 1 *
+bit 253 O 1 *
+bit 252 O 1 *
+bit 251 O 1 *
+bit 250 O 1 *
+bit 249 O 1 *
+bit 248 O 1 *
+bit 247 O 1 *
+bit 246 O 1 *
+bit 245 O 1 *
+bit 244 O 1 *
+bit 243 O 1 *
+bit 242 O 1 *
+bit 241 O 1 *
+bit 240 O 1 *
+bit 239 O 1 *
+bit 238 O 1 *
+bit 237 O 1 *
+bit 236 O 1 *
+bit 235 O 1 *
+bit 234 O 1 *
+bit 233 O 1 *
+bit 232 O 1 *
+bit 231 O 1 *
+bit 230 O 1 *
+bit 229 O 1 *
+bit 228 O 1 *
+bit 227 O 1 *
+bit 226 O 1 *
+bit 225 O 1 *
+bit 224 O 1 *
+bit 223 O 1 *
+bit 222 O 1 *
+bit 221 O 1 *
+bit 220 O 1 *
+bit 219 O 1 *
+bit 218 O 1 *
+bit 217 O 1 *
+bit 216 O 1 *
+bit 215 O 1 *
+bit 214 O 1 *
+bit 213 O 1 *
+bit 212 O 1 *
+bit 211 O 1 *
+bit 210 O 1 *
+bit 209 O 1 *
+bit 208 O 1 *
+bit 207 O 1 *
+bit 206 O 1 *
+bit 205 O 1 *
+bit 204 O 1 *
+bit 203 O 1 *
+bit 202 O 1 *
+bit 201 O 1 *
+bit 200 O 1 *
+bit 199 O 1 *
+bit 198 O 1 *
+bit 197 O 1 *
+bit 196 O 1 *
+bit 195 O 1 *
+bit 194 O 1 *
+bit 193 O 1 *
+bit 192 O 1 *
+bit 191 O 1 *
+bit 190 O 1 *
+bit 189 O 1 *
+bit 188 O 1 *
+bit 187 O 1 *
+bit 186 O 1 *
+bit 185 O 1 *
+bit 184 O 1 *
+bit 183 O 1 *
+bit 182 O 1 *
+bit 181 O 1 *
+bit 180 O 1 *
+bit 179 O 1 *
+bit 178 O 1 *
+bit 177 O 1 *
+bit 176 O 1 *
+bit 175 O 1 *
+bit 174 O 1 *
+bit 173 I 1 IO_E6
+bit 172 O 1 IO_E6 171 1 Z
+bit 171 C 1 *
+bit 170 I 1 IO_E7
+bit 169 O 1 IO_E7 168 1 Z
+bit 168 C 1 *
+bit 167 I 1 IO_D7
+bit 166 O 1 IO_D7 165 1 Z
+bit 165 C 1 *
+bit 164 I 1 IO_C7
+bit 163 O 1 IO_C7 162 1 Z
+bit 162 C 1 *
+bit 161 I 1 IO_B7
+bit 160 O 1 IO_B7 159 1 Z
+bit 159 C 1 *
+bit 158 I 1 IO_A7
+bit 157 O 1 IO_A7 156 1 Z
+bit 156 C 1 *
+bit 155 I 1 IO_D8
+bit 154 O 1 IO_D8 153 1 Z
+bit 153 C 1 *
+bit 152 I 1 IO_C8
+bit 151 O 1 IO_C8 150 1 Z
+bit 150 C 1 *
+bit 149 I 1 IO_B8
+bit 148 O 1 IO_B8 147 1 Z
+bit 147 C 1 *
+bit 146 I 1 IO_A8
+bit 145 O 1 IO_A8 144 1 Z
+bit 144 C 1 *
+bit 143 I 1 IO_A9
+bit 142 O 1 IO_A9 141 1 Z
+bit 141 C 1 *
+bit 140 I 1 IO_B9
+bit 139 O 1 IO_B9 138 1 Z
+bit 138 C 1 *
+bit 137 I 1 IO_C9
+bit 136 O 1 IO_C9 135 1 Z
+bit 135 C 1 *
+bit 134 I 1 IO_D9
+bit 133 O 1 IO_D9 132 1 Z
+bit 132 C 1 *
+bit 131 I 1 IO_A10
+bit 130 O 1 IO_A10 129 1 Z
+bit 129 C 1 *
+bit 128 I 1 IO_B10
+bit 127 O 1 IO_B10 126 1 Z
+bit 126 C 1 *
+bit 125 I 1 IO_C10
+bit 124 O 1 IO_C10 123 1 Z
+bit 123 C 1 *
+bit 122 I 1 IO_D10
+bit 121 O 1 IO_D10 120 1 Z
+bit 120 C 1 *
+bit 119 I 1 IO_E10
+bit 118 O 1 IO_E10 117 1 Z
+bit 117 C 1 *
+bit 116 I 1 IO_E11
+bit 115 O 1 IO_E11 114 1 Z
+bit 114 C 1 *
+bit 113 O 1 *
+bit 112 O 1 *
+bit 111 O 1 *
+bit 110 O 1 *
+bit 109 O 1 *
+bit 108 O 1 *
+bit 107 O 1 *
+bit 106 O 1 *
+bit 105 O 1 *
+bit 104 O 1 *
+bit 103 O 1 *
+bit 102 O 1 *
+bit 101 O 1 *
+bit 100 O 1 *
+bit 99 O 1 *
+bit 98 O 1 *
+bit 97 O 1 *
+bit 96 O 1 *
+bit 95 O 1 *
+bit 94 O 1 *
+bit 93 O 1 *
+bit 92 O 1 *
+bit 91 O 1 *
+bit 90 O 1 *
+bit 89 O 1 *
+bit 88 O 1 *
+bit 87 O 1 *
+bit 86 O 1 *
+bit 85 O 1 *
+bit 84 O 1 *
+bit 83 O 1 *
+bit 82 O 1 *
+bit 81 O 1 *
+bit 80 O 1 *
+bit 79 O 1 *
+bit 78 O 1 *
+bit 77 O 1 *
+bit 76 O 1 *
+bit 75 O 1 *
+bit 74 O 1 *
+bit 73 O 1 *
+bit 72 O 1 *
+bit 71 O 1 *
+bit 70 O 1 *
+bit 69 O 1 *
+bit 68 O 1 *
+bit 67 O 1 *
+bit 66 O 1 *
+bit 65 O 1 *
+bit 64 O 1 *
+bit 63 O 1 *
+bit 62 O 1 *
+bit 61 O 1 *
+bit 60 O 1 *
+bit 59 O 1 *
+bit 58 O 1 *
+bit 57 O 1 *
+bit 56 O 1 *
+bit 55 O 1 *
+bit 54 O 1 *
+bit 53 O 1 *
+bit 52 O 1 *
+bit 51 O 1 *
+bit 50 O 1 *
+bit 49 O 1 *
+bit 48 O 1 *
+bit 47 O 1 *
+bit 46 O 1 *
+bit 45 O 1 *
+bit 44 O 1 *
+bit 43 O 1 *
+bit 42 O 1 *
+bit 41 O 1 *
+bit 40 O 1 *
+bit 39 O 1 *
+bit 38 O 1 *
+bit 37 O 1 *
+bit 36 O 1 *
+bit 35 O 1 *
+bit 34 O 1 *
+bit 33 O 1 *
+bit 32 O 1 *
+bit 31 O 1 *
+bit 30 O 1 *
+bit 29 I 1 IO_A11
+bit 28 O 1 IO_A11 27 1 Z
+bit 27 C 1 *
+bit 26 I 1 IO_B11
+bit 25 O 1 IO_B11 24 1 Z
+bit 24 C 1 *
+bit 23 I 1 IO_C11
+bit 22 O 1 IO_C11 21 1 Z
+bit 21 C 1 *
+bit 20 I 1 IO_D11
+bit 19 O 1 IO_D11 18 1 Z
+bit 18 C 1 *
+bit 17 I 1 IO_A12
+bit 16 O 1 IO_A12 15 1 Z
+bit 15 C 1 *
+bit 14 I 1 IO_B12
+bit 13 O 1 IO_B12 12 1 Z
+bit 12 C 1 *
+bit 11 I 1 IO_C12
+bit 10 O 1 IO_C12 9 1 Z
+bit 9 C 1 *
+bit 8 I 1 IO_D12
+bit 7 O 1 IO_D12 6 1 Z
+bit 6 C 1 *
+bit 5 I 1 IO_B13
+bit 4 O 1 IO_B13 3 1 Z
+bit 3 C 1 *
+bit 2 I 1 IO_C13
+bit 1 O 1 IO_C13 0 1 Z
+bit 0 C 1 *
--- /dev/null
+#
+# $Id$
+#
+# Copyright (C) 2002 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Marcel Telka <marcel@telka.sk>, 2002.
+#
+
+# bits 31-28 of the Device Identification Register
+0000 xc2v250-fg256 0
--- /dev/null
+signal CCLK_P15
+signal DONE_R14
+signal GND1
+signal GND2
+signal GND3
+signal GND4
+signal GND5
+signal GND6
+signal GND7
+signal GND8
+signal GND9
+signal GND10
+signal GND11
+signal GND12
+signal GND13
+signal GND14
+signal GND15
+signal GND16
+signal GND17
+signal GND18
+signal GND19
+signal GND20
+signal GND21
+signal GND22
+signal GND23
+signal GND24
+signal GND25
+signal GND26
+signal GND27
+signal GND28
+signal GND29
+signal GND30
+signal GND31
+signal GND32
+signal HSWAP_EN_B3
+signal M0_T2
+signal M1_P2
+signal M2_R3
+signal PROG_B
+signal PWRDWN_B
+signal RSVD1
+signal RSVD2
+signal RSVD3
+signal TCK
+signal TDI
+signal TDO
+signal TMS
+signal VBATT
+signal VCCAUX1
+signal VCCAUX2
+signal VCCAUX3
+signal VCCAUX4
+signal VCCINT1
+signal VCCINT2
+signal VCCINT3
+signal VCCINT4
+signal VCCINT5
+signal VCCINT6
+signal VCCINT7
+signal VCCINT8
+signal VCCO01
+signal VCCO02
+signal VCCO03
+signal VCCO11
+signal VCCO12
+signal VCCO13
+signal VCCO21
+signal VCCO22
+signal VCCO23
+signal VCCO31
+signal VCCO32
+signal VCCO33
+signal VCCO41
+signal VCCO42
+signal VCCO43
+signal VCCO51
+signal VCCO52
+signal VCCO53
+signal VCCO61
+signal VCCO62
+signal VCCO63
+signal VCCO71
+signal VCCO72
+signal VCCO73
+signal IO_A5
+signal IO_A6
+signal IO_A7
+signal IO_A8
+signal IO_A9
+signal IO_A10
+signal IO_A11
+signal IO_A12
+signal IO_B4
+signal IO_B5
+signal IO_B6
+signal IO_B7
+signal IO_B8
+signal IO_B9
+signal IO_B10
+signal IO_B11
+signal IO_B12
+signal IO_B13
+signal IO_C1
+signal IO_C4
+signal IO_C5
+signal IO_C6
+signal IO_C7
+signal IO_C8
+signal IO_C9
+signal IO_C10
+signal IO_C11
+signal IO_C12
+signal IO_C13
+signal IO_C16
+signal IO_D1
+signal IO_D2
+signal IO_D3
+signal IO_D5
+signal IO_D6
+signal IO_D7
+signal IO_D8
+signal IO_D9
+signal IO_D10
+signal IO_D11
+signal IO_D12
+signal IO_D14
+signal IO_D15
+signal IO_D16
+signal IO_E1
+signal IO_E2
+signal IO_E3
+signal IO_E4
+signal IO_E6
+signal IO_E7
+signal IO_E10
+signal IO_E11
+signal IO_E13
+signal IO_E14
+signal IO_E15
+signal IO_E16
+signal IO_F1
+signal IO_F2
+signal IO_F3
+signal IO_F4
+signal IO_F5
+signal IO_F12
+signal IO_F13
+signal IO_F14
+signal IO_F15
+signal IO_F16
+signal IO_G1
+signal IO_G2
+signal IO_G3
+signal IO_G4
+signal IO_G5
+signal IO_G12
+signal IO_G13
+signal IO_G14
+signal IO_G15
+signal IO_G16
+signal IO_H1
+signal IO_H2
+signal IO_H3
+signal IO_H4
+signal IO_H13
+signal IO_H14
+signal IO_H15
+signal IO_H16
+signal IO_J1
+signal IO_J2
+signal IO_J3
+signal IO_J4
+signal IO_J13
+signal IO_J14
+signal IO_J15
+signal IO_J16
+signal IO_K1
+signal IO_K2
+signal IO_K3
+signal IO_K4
+signal IO_K5
+signal IO_K12
+signal IO_K13
+signal IO_K14
+signal IO_K15
+signal IO_K16
+signal IO_L1
+signal IO_L2
+signal IO_L3
+signal IO_L4
+signal IO_L5
+signal IO_L12
+signal IO_L13
+signal IO_L14
+signal IO_L15
+signal IO_L16
+signal IO_M1
+signal IO_M2
+signal IO_M3
+signal IO_M4
+signal IO_M6
+signal IO_M7
+signal IO_M10
+signal IO_M11
+signal IO_M13
+signal IO_M14
+signal IO_M15
+signal IO_M16
+signal IO_N1
+signal IO_N2
+signal IO_N3
+signal IO_N5
+signal IO_N6
+signal IO_N7
+signal IO_N8
+signal IO_N9
+signal IO_N10
+signal IO_N11
+signal IO_N12
+signal IO_N14
+signal IO_N15
+signal IO_N16
+signal IO_P1
+signal IO_P4
+signal IO_P5
+signal IO_P6
+signal IO_P7
+signal IO_P8
+signal IO_P9
+signal IO_P10
+signal IO_P11
+signal IO_P12
+signal IO_P13
+signal IO_P16
+signal IO_R4
+signal IO_R5
+signal IO_R6
+signal IO_R7
+signal IO_R8
+signal IO_R9
+signal IO_R10
+signal IO_R11
+signal IO_R12
+signal IO_R13
+signal IO_T3
+signal IO_T4
+signal IO_T5
+signal IO_T6
+signal IO_T7
+signal IO_T8
+signal IO_T9
+signal IO_T10
+signal IO_T11
+signal IO_T12
+signal IO_T13
+
+register BSR 732
+register BR 1
+register DIR 32
+
+instruction length 6
+
+instruction EXTEST 000000 BSR
+instruction SAMPLE/PRELOAD 000001 BSR
+instruction IDCODE 001001 DIR
+instruction BYPASS 111111 BR
+
+bit 731 I 1 IO_C16
+bit 730 O 1 IO_C16 729 1 Z
+bit 729 C 1 *
+bit 728 I 1 IO_D16
+bit 727 O 1 IO_D16 726 1 Z
+bit 726 C 1 *
+bit 725 I 1 IO_D14
+bit 724 O 1 IO_D14 723 1 Z
+bit 723 C 1 *
+bit 722 I 1 IO_D15
+bit 721 O 1 IO_D15 720 1 Z
+bit 720 C 1 *
+bit 719 I 1 IO_E13
+bit 718 O 1 IO_E13 717 1 Z
+bit 717 C 1 *
+bit 716 I 1 IO_E14
+bit 715 O 1 IO_E14 714 1 Z
+bit 714 C 1 *
+bit 713 I 1 IO_E15
+bit 712 O 1 IO_E15 711 1 Z
+bit 711 C 1 *
+bit 710 I 1 IO_E16
+bit 709 O 1 IO_E16 708 1 Z
+bit 708 C 1 *
+bit 707 O 1 *
+bit 706 O 1 *
+bit 705 O 1 *
+bit 704 O 1 *
+bit 703 O 1 *
+bit 702 O 1 *
+bit 701 I 1 IO_F13
+bit 700 O 1 IO_F13 699 1 Z
+bit 699 C 1 *
+bit 698 I 1 IO_F14
+bit 697 O 1 IO_F14 696 1 Z
+bit 696 C 1 *
+bit 695 I 1 IO_F15
+bit 694 O 1 IO_F15 693 1 Z
+bit 693 C 1 *
+bit 692 I 1 IO_F16
+bit 691 O 1 IO_F16 690 1 Z
+bit 690 C 1 *
+bit 689 O 1 *
+bit 688 O 1 *
+bit 687 O 1 *
+bit 686 O 1 *
+bit 685 O 1 *
+bit 684 O 1 *
+bit 683 I 1 IO_F12
+bit 682 O 1 IO_F12 681 1 Z
+bit 681 C 1 *
+bit 680 I 1 IO_G12
+bit 679 O 1 IO_G12 678 1 Z
+bit 678 C 1 *
+bit 677 O 1 *
+bit 676 O 1 *
+bit 675 O 1 *
+bit 674 O 1 *
+bit 673 O 1 *
+bit 672 O 1 *
+bit 671 O 1 *
+bit 670 O 1 *
+bit 669 O 1 *
+bit 668 O 1 *
+bit 667 O 1 *
+bit 666 O 1 *
+bit 665 O 1 *
+bit 664 O 1 *
+bit 663 O 1 *
+bit 662 O 1 *
+bit 661 O 1 *
+bit 660 O 1 *
+bit 659 I 1 IO_G13
+bit 658 O 1 IO_G13 657 1 Z
+bit 657 C 1 *
+bit 656 I 1 IO_G14
+bit 655 O 1 IO_G14 654 1 Z
+bit 654 C 1 *
+bit 653 O 1 *
+bit 652 O 1 *
+bit 651 O 1 *
+bit 650 O 1 *
+bit 649 O 1 *
+bit 648 O 1 *
+bit 647 I 1 IO_G15
+bit 646 O 1 IO_G15 645 1 Z
+bit 645 C 1 *
+bit 644 I 1 IO_G16
+bit 643 O 1 IO_G16 642 1 Z
+bit 642 C 1 *
+bit 641 I 1 IO_H13
+bit 640 O 1 IO_H13 639 1 Z
+bit 639 C 1 *
+bit 638 I 1 IO_H14
+bit 637 O 1 IO_H14 636 1 Z
+bit 636 C 1 *
+bit 635 O 1 *
+bit 634 O 1 *
+bit 633 O 1 *
+bit 632 O 1 *
+bit 631 O 1 *
+bit 630 O 1 *
+bit 629 I 1 IO_H15
+bit 628 O 1 IO_H15 627 1 Z
+bit 627 C 1 *
+bit 626 I 1 IO_H16
+bit 625 O 1 IO_H16 624 1 Z
+bit 624 C 1 *
+bit 623 I 1 IO_J16
+bit 622 O 1 IO_J16 621 1 Z
+bit 621 C 1 *
+bit 620 I 1 IO_J15
+bit 619 O 1 IO_J15 618 1 Z
+bit 618 C 1 *
+bit 617 O 1 *
+bit 616 O 1 *
+bit 615 O 1 *
+bit 614 O 1 *
+bit 613 O 1 *
+bit 612 O 1 *
+bit 611 I 1 IO_J14
+bit 610 O 1 IO_J14 609 1 Z
+bit 609 C 1 *
+bit 608 I 1 IO_J13
+bit 607 O 1 IO_J13 606 1 Z
+bit 606 C 1 *
+bit 605 I 1 IO_K16
+bit 604 O 1 IO_K16 603 1 Z
+bit 603 C 1 *
+bit 602 I 1 IO_K15
+bit 601 O 1 IO_K15 600 1 Z
+bit 600 C 1 *
+bit 599 O 1 *
+bit 598 O 1 *
+bit 597 O 1 *
+bit 596 O 1 *
+bit 595 O 1 *
+bit 594 O 1 *
+bit 593 I 1 IO_K14
+bit 592 O 1 IO_K14 591 1 Z
+bit 591 C 1 *
+bit 590 I 1 IO_K13
+bit 589 O 1 IO_K13 588 1 Z
+bit 588 C 1 *
+bit 587 O 1 *
+bit 586 O 1 *
+bit 585 O 1 *
+bit 584 O 1 *
+bit 583 O 1 *
+bit 582 O 1 *
+bit 581 O 1 *
+bit 580 O 1 *
+bit 579 O 1 *
+bit 578 O 1 *
+bit 577 O 1 *
+bit 576 O 1 *
+bit 575 O 1 *
+bit 574 O 1 *
+bit 573 O 1 *
+bit 572 O 1 *
+bit 571 O 1 *
+bit 570 O 1 *
+bit 569 I 1 IO_K12
+bit 568 O 1 IO_K12 567 1 Z
+bit 567 C 1 *
+bit 566 I 1 IO_L12
+bit 565 O 1 IO_L12 564 1 Z
+bit 564 C 1 *
+bit 563 O 1 *
+bit 562 O 1 *
+bit 561 O 1 *
+bit 560 O 1 *
+bit 559 O 1 *
+bit 558 O 1 *
+bit 557 I 1 IO_L16
+bit 556 O 1 IO_L16 555 1 Z
+bit 555 C 1 *
+bit 554 I 1 IO_L15
+bit 553 O 1 IO_L15 552 1 Z
+bit 552 C 1 *
+bit 551 I 1 IO_L14
+bit 550 O 1 IO_L14 549 1 Z
+bit 549 C 1 *
+bit 548 I 1 IO_L13
+bit 547 O 1 IO_L13 546 1 Z
+bit 546 C 1 *
+bit 545 O 1 *
+bit 544 O 1 *
+bit 543 O 1 *
+bit 542 O 1 *
+bit 541 O 1 *
+bit 540 O 1 *
+bit 539 I 1 IO_M16
+bit 538 O 1 IO_M16 537 1 Z
+bit 537 C 1 *
+bit 536 I 1 IO_M15
+bit 535 O 1 IO_M15 534 1 Z
+bit 534 C 1 *
+bit 533 I 1 IO_M14
+bit 532 O 1 IO_M14 531 1 Z
+bit 531 C 1 *
+bit 530 I 1 IO_M13
+bit 529 O 1 IO_M13 528 1 Z
+bit 528 C 1 *
+bit 527 I 1 IO_N15
+bit 526 O 1 IO_N15 525 1 Z
+bit 525 C 1 *
+bit 524 I 1 IO_N14
+bit 523 O 1 IO_N14 522 1 Z
+bit 522 C 1 *
+bit 521 I 1 IO_N16
+bit 520 O 1 IO_N16 519 1 Z
+bit 519 C 1 *
+bit 518 I 1 IO_P16
+bit 517 O 1 IO_P16 516 1 Z
+bit 516 C 1 *
+bit 515 I 1 CCLK_P15
+bit 514 O 1 CCLK_P15 513 1 Z
+bit 513 C 1 *
+bit 512 O 1 *
+bit 511 I 1 DONE_R14
+bit 510 O 1 DONE_R14 509 1 Z
+bit 509 C 1 *
+bit 508 I 1 IO_T14
+bit 507 O 1 IO_T14 506 1 Z
+bit 506 C 1 *
+bit 505 I 1 IO_T13
+bit 504 O 1 IO_T13 503 1 Z
+bit 503 C 1 *
+bit 502 I 1 IO_P13
+bit 501 O 1 IO_P13 500 1 Z
+bit 500 C 1 *
+bit 499 I 1 IO_R13
+bit 498 O 1 IO_R13 497 1 Z
+bit 497 C 1 *
+bit 496 I 1 IO_N12
+bit 495 O 1 IO_N12 494 1 Z
+bit 494 C 1 *
+bit 493 I 1 IO_P12
+bit 492 O 1 IO_P12 491 1 Z
+bit 491 C 1 *
+bit 490 I 1 IO_R12
+bit 489 O 1 IO_R12 488 1 Z
+bit 488 C 1 *
+bit 487 I 1 IO_T12
+bit 486 O 1 IO_T12 485 1 Z
+bit 485 C 1 *
+bit 484 I 1 IO_N11
+bit 483 O 1 IO_N11 482 1 Z
+bit 482 C 1 *
+bit 481 I 1 IO_P11
+bit 480 O 1 IO_P11 479 1 Z
+bit 479 C 1 *
+bit 478 O 1 *
+bit 477 O 1 *
+bit 476 O 1 *
+bit 475 O 1 *
+bit 474 O 1 *
+bit 473 O 1 *
+bit 472 I 1 IO_R11
+bit 471 O 1 IO_R11 470 1 Z
+bit 470 C 1 *
+bit 469 I 1 IO_T11
+bit 468 O 1 IO_T11 467 1 Z
+bit 467 C 1 *
+bit 466 I 1 IO_M11
+bit 465 O 1 IO_M11 464 1 Z
+bit 464 C 1 *
+bit 463 I 1 IO_M10
+bit 462 O 1 IO_M10 461 1 Z
+bit 461 C 1 *
+bit 460 I 1 IO_N10
+bit 459 O 1 IO_N10 458 1 Z
+bit 458 C 1 *
+bit 457 I 1 IO_P10
+bit 456 O 1 IO_P10 455 1 Z
+bit 455 C 1 *
+bit 454 I 1 IO_R10
+bit 453 O 1 IO_R10 452 1 Z
+bit 452 C 1 *
+bit 451 I 1 IO_T10
+bit 450 O 1 IO_T10 449 1 Z
+bit 449 C 1 *
+bit 448 I 1 IO_N9
+bit 447 O 1 IO_N9 446 1 Z
+bit 446 C 1 *
+bit 445 I 1 IO_P9
+bit 444 O 1 IO_P9 443 1 Z
+bit 443 C 1 *
+bit 442 I 1 IO_R9
+bit 441 O 1 IO_R9 440 1 Z
+bit 440 C 1 *
+bit 439 I 1 IO_T9
+bit 438 O 1 IO_T9 437 1 Z
+bit 437 C 1 *
+bit 436 I 1 IO_T8
+bit 435 O 1 IO_T8 434 1 Z
+bit 434 C 1 *
+bit 433 I 1 IO_R8
+bit 432 O 1 IO_R8 431 1 Z
+bit 431 C 1 *
+bit 430 I 1 IO_P8
+bit 429 O 1 IO_P8 428 1 Z
+bit 428 C 1 *
+bit 427 I 1 IO_N8
+bit 426 O 1 IO_N8 425 1 Z
+bit 425 C 1 *
+bit 424 I 1 IO_T7
+bit 423 O 1 IO_T7 422 1 Z
+bit 422 C 1 *
+bit 421 I 1 IO_R7
+bit 420 O 1 IO_R7 419 1 Z
+bit 419 C 1 *
+bit 418 I 1 IO_P7
+bit 417 O 1 IO_P7 416 1 Z
+bit 416 C 1 *
+bit 415 I 1 IO_N7
+bit 414 O 1 IO_N7 413 1 Z
+bit 413 C 1 *
+bit 412 I 1 IO_M7
+bit 411 O 1 IO_M7 410 1 Z
+bit 410 C 1 *
+bit 409 I 1 IO_M6
+bit 408 O 1 IO_M6 407 1 Z
+bit 407 C 1 *
+bit 406 I 1 IO_T6
+bit 405 O 1 IO_T6 404 1 Z
+bit 404 C 1 *
+bit 403 I 1 IO_R6
+bit 402 O 1 IO_R6 401 1 Z
+bit 401 C 1 *
+bit 400 O 1 *
+bit 399 O 1 *
+bit 398 O 1 *
+bit 397 O 1 *
+bit 396 O 1 *
+bit 395 O 1 *
+bit 394 I 1 IO_P6
+bit 393 O 1 IO_P6 392 1 Z
+bit 392 C 1 *
+bit 391 I 1 IO_N6
+bit 390 O 1 IO_N6 389 1 Z
+bit 389 C 1 *
+bit 388 I 1 IO_T5
+bit 387 O 1 IO_T5 386 1 Z
+bit 386 C 1 *
+bit 385 I 1 IO_R5
+bit 384 O 1 IO_R5 383 1 Z
+bit 383 C 1 *
+bit 382 I 1 IO_P5
+bit 381 O 1 IO_P5 380 1 Z
+bit 380 C 1 *
+bit 379 I 1 IO_N5
+bit 378 O 1 IO_N5 377 1 Z
+bit 377 C 1 *
+bit 376 I 1 IO_R4
+bit 375 O 1 IO_R4 374 1 Z
+bit 374 C 1 *
+bit 373 I 1 IO_P4
+bit 372 O 1 IO_P4 371 1 Z
+bit 371 C 1 *
+bit 370 I 1 IO_T4
+bit 369 O 1 IO_T4 368 1 Z
+bit 368 C 1 *
+bit 367 I 1 IO_T3
+bit 366 O 1 IO_T3 365 1 Z
+bit 365 C 1 *
+bit 364 I 1 M2_R3
+bit 363 I 1 M0_T2
+bit 362 I 1 M1_P2
+bit 361 I 1 IO_P1
+bit 360 O 1 IO_P1 359 1 Z
+bit 359 C 1 *
+bit 358 I 1 IO_N1
+bit 357 O 1 IO_N1 356 1 Z
+bit 356 C 1 *
+bit 355 I 1 IO_N3
+bit 354 O 1 IO_N3 353 1 Z
+bit 353 C 1 *
+bit 352 I 1 IO_N2
+bit 351 O 1 IO_N2 350 1 Z
+bit 350 C 1 *
+bit 349 I 1 IO_M4
+bit 348 O 1 IO_M4 347 1 Z
+bit 347 C 1 *
+bit 346 I 1 IO_M3
+bit 345 O 1 IO_M3 344 1 Z
+bit 344 C 1 *
+bit 343 I 1 IO_M2
+bit 342 O 1 IO_M2 341 1 Z
+bit 341 C 1 *
+bit 340 I 1 IO_M1
+bit 339 O 1 IO_M1 338 1 Z
+bit 338 C 1 *
+bit 337 O 1 *
+bit 336 O 1 *
+bit 335 O 1 *
+bit 334 O 1 *
+bit 333 O 1 *
+bit 332 O 1 *
+bit 331 I 1 IO_L4
+bit 330 O 1 IO_L4 329 1 Z
+bit 329 C 1 *
+bit 328 I 1 IO_L3
+bit 327 O 1 IO_L3 326 1 Z
+bit 326 C 1 *
+bit 325 I 1 IO_L2
+bit 324 O 1 IO_L2 323 1 Z
+bit 323 C 1 *
+bit 322 I 1 IO_L1
+bit 321 O 1 IO_L1 320 1 Z
+bit 320 C 1 *
+bit 319 O 1 *
+bit 318 O 1 *
+bit 317 O 1 *
+bit 316 O 1 *
+bit 315 O 1 *
+bit 314 O 1 *
+bit 313 I 1 IO_L5
+bit 312 O 1 IO_L5 311 1 Z
+bit 311 C 1 *
+bit 310 I 1 IO_K5
+bit 309 O 1 IO_K5 308 1 Z
+bit 308 C 1 *
+bit 307 O 1 *
+bit 306 O 1 *
+bit 305 O 1 *
+bit 304 O 1 *
+bit 303 O 1 *
+bit 302 O 1 *
+bit 301 O 1 *
+bit 300 O 1 *
+bit 299 O 1 *
+bit 298 O 1 *
+bit 297 O 1 *
+bit 296 O 1 *
+bit 295 O 1 *
+bit 294 O 1 *
+bit 293 O 1 *
+bit 292 O 1 *
+bit 291 O 1 *
+bit 290 O 1 *
+bit 289 I 1 IO_K4
+bit 288 O 1 IO_K4 287 1 Z
+bit 287 C 1 *
+bit 286 I 1 IO_K3
+bit 285 O 1 IO_K3 284 1 Z
+bit 284 C 1 *
+bit 283 O 1 *
+bit 282 O 1 *
+bit 281 O 1 *
+bit 280 O 1 *
+bit 279 O 1 *
+bit 278 O 1 *
+bit 277 I 1 IO_K2
+bit 276 O 1 IO_K2 275 1 Z
+bit 275 C 1 *
+bit 274 I 1 IO_K1
+bit 273 O 1 IO_K1 272 1 Z
+bit 272 C 1 *
+bit 271 I 1 IO_J4
+bit 270 O 1 IO_J4 269 1 Z
+bit 269 C 1 *
+bit 268 I 1 IO_J3
+bit 267 O 1 IO_J3 266 1 Z
+bit 266 C 1 *
+bit 265 O 1 *
+bit 264 O 1 *
+bit 263 O 1 *
+bit 262 O 1 *
+bit 261 O 1 *
+bit 260 O 1 *
+bit 259 I 1 IO_J2
+bit 258 O 1 IO_J2 257 1 Z
+bit 257 C 1 *
+bit 256 I 1 IO_J1
+bit 255 O 1 IO_J1 254 1 Z
+bit 254 C 1 *
+bit 253 I 1 IO_H1
+bit 252 O 1 IO_H1 251 1 Z
+bit 251 C 1 *
+bit 250 I 1 IO_H2
+bit 249 O 1 IO_H2 248 1 Z
+bit 248 C 1 *
+bit 247 O 1 *
+bit 246 O 1 *
+bit 245 O 1 *
+bit 244 O 1 *
+bit 243 O 1 *
+bit 242 O 1 *
+bit 241 I 1 IO_H3
+bit 240 O 1 IO_H3 239 1 Z
+bit 239 C 1 *
+bit 238 I 1 IO_H4
+bit 237 O 1 IO_H4 236 1 Z
+bit 236 C 1 *
+bit 235 I 1 IO_G1
+bit 234 O 1 IO_G1 233 1 Z
+bit 233 C 1 *
+bit 232 I 1 IO_G2
+bit 231 O 1 IO_G2 230 1 Z
+bit 230 C 1 *
+bit 229 O 1 *
+bit 228 O 1 *
+bit 227 O 1 *
+bit 226 O 1 *
+bit 225 O 1 *
+bit 224 O 1 *
+bit 223 I 1 IO_G3
+bit 222 O 1 IO_G3 221 1 Z
+bit 221 C 1 *
+bit 220 I 1 IO_G4
+bit 219 O 1 IO_G4 218 1 Z
+bit 218 C 1 *
+bit 217 O 1 *
+bit 216 O 1 *
+bit 215 O 1 *
+bit 214 O 1 *
+bit 213 O 1 *
+bit 212 O 1 *
+bit 211 O 1 *
+bit 210 O 1 *
+bit 209 O 1 *
+bit 208 O 1 *
+bit 207 O 1 *
+bit 206 O 1 *
+bit 205 O 1 *
+bit 204 O 1 *
+bit 203 O 1 *
+bit 202 O 1 *
+bit 201 O 1 *
+bit 200 O 1 *
+bit 199 I 1 IO_G5
+bit 198 O 1 IO_G5 197 1 Z
+bit 197 C 1 *
+bit 196 I 1 IO_F5
+bit 195 O 1 IO_F5 194 1 Z
+bit 194 C 1 *
+bit 193 O 1 *
+bit 192 O 1 *
+bit 191 O 1 *
+bit 190 O 1 *
+bit 189 O 1 *
+bit 188 O 1 *
+bit 187 I 1 IO_F1
+bit 186 O 1 IO_F1 185 1 Z
+bit 185 C 1 *
+bit 184 I 1 IO_F2
+bit 183 O 1 IO_F2 182 1 Z
+bit 182 C 1 *
+bit 181 I 1 IO_F3
+bit 180 O 1 IO_F3 179 1 Z
+bit 179 C 1 *
+bit 178 I 1 IO_F4
+bit 177 O 1 IO_F4 176 1 Z
+bit 176 C 1 *
+bit 175 O 1 *
+bit 174 O 1 *
+bit 173 O 1 *
+bit 172 O 1 *
+bit 171 O 1 *
+bit 170 O 1 *
+bit 169 I 1 IO_E1
+bit 168 O 1 IO_E1 167 1 Z
+bit 167 C 1 *
+bit 166 I 1 IO_E2
+bit 165 O 1 IO_E2 164 1 Z
+bit 164 C 1 *
+bit 163 I 1 IO_E3
+bit 162 O 1 IO_E3 161 1 Z
+bit 161 C 1 *
+bit 160 I 1 IO_E4
+bit 159 O 1 IO_E4 158 1 Z
+bit 158 C 1 *
+bit 157 I 1 IO_D2
+bit 156 O 1 IO_D2 155 1 Z
+bit 155 C 1 *
+bit 154 I 1 IO_D3
+bit 153 O 1 IO_D3 152 1 Z
+bit 152 C 1 *
+bit 151 I 1 IO_D1
+bit 150 O 1 IO_D1 149 1 Z
+bit 149 C 1 *
+bit 148 I 1 IO_C1
+bit 147 O 1 IO_C1 146 1 Z
+bit 146 C 1 *
+bit 145 O 1 *
+bit 144 I 1 HSWAP_EN_B3
+bit 143 I 1 IO_C4
+bit 142 O 1 IO_C4 141 1 Z
+bit 141 C 1 *
+bit 140 I 1 IO_B4
+bit 139 O 1 IO_B4 138 1 Z
+bit 138 C 1 *
+bit 137 I 1 IO_D5
+bit 136 O 1 IO_D5 135 1 Z
+bit 135 C 1 *
+bit 134 I 1 IO_C5
+bit 133 O 1 IO_C5 132 1 Z
+bit 132 C 1 *
+bit 131 I 1 IO_B5
+bit 130 O 1 IO_B5 129 1 Z
+bit 129 C 1 *
+bit 128 I 1 IO_A5
+bit 127 O 1 IO_A5 126 1 Z
+bit 126 C 1 *
+bit 125 I 1 IO_D6
+bit 124 O 1 IO_D6 123 1 Z
+bit 123 C 1 *
+bit 122 I 1 IO_C6
+bit 121 O 1 IO_C6 120 1 Z
+bit 120 C 1 *
+bit 119 I 1 IO_B6
+bit 118 O 1 IO_B6 117 1 Z
+bit 117 C 1 *
+bit 116 I 1 IO_A6
+bit 115 O 1 IO_A6 114 1 Z
+bit 114 C 1 *
+bit 113 O 1 *
+bit 112 O 1 *
+bit 111 O 1 *
+bit 110 O 1 *
+bit 109 O 1 *
+bit 108 O 1 *
+bit 107 O 1 *
+bit 106 O 1 *
+bit 105 O 1 *
+bit 104 O 1 *
+bit 103 O 1 *
+bit 102 O 1 *
+bit 101 I 1 IO_E6
+bit 100 O 1 IO_E6 99 1 Z
+bit 99 C 1 *
+bit 98 I 1 IO_E7
+bit 97 O 1 IO_E7 96 1 Z
+bit 96 C 1 *
+bit 95 I 1 IO_D7
+bit 94 O 1 IO_D7 93 1 Z
+bit 93 C 1 *
+bit 92 I 1 IO_C7
+bit 91 O 1 IO_C7 90 1 Z
+bit 90 C 1 *
+bit 89 I 1 IO_B7
+bit 88 O 1 IO_B7 87 1 Z
+bit 87 C 1 *
+bit 86 I 1 IO_A7
+bit 85 O 1 IO_A7 84 1 Z
+bit 84 C 1 *
+bit 83 I 1 IO_D8
+bit 82 O 1 IO_D8 81 1 Z
+bit 81 C 1 *
+bit 80 I 1 IO_C8
+bit 79 O 1 IO_C8 78 1 Z
+bit 78 C 1 *
+bit 77 I 1 IO_B8
+bit 76 O 1 IO_B8 75 1 Z
+bit 75 C 1 *
+bit 74 I 1 IO_A8
+bit 73 O 1 IO_A8 72 1 Z
+bit 72 C 1 *
+bit 71 I 1 IO_A9
+bit 70 O 1 IO_A9 69 1 Z
+bit 69 C 1 *
+bit 68 I 1 IO_B9
+bit 67 O 1 IO_B9 66 1 Z
+bit 66 C 1 *
+bit 65 I 1 IO_C9
+bit 64 O 1 IO_C9 63 1 Z
+bit 63 C 1 *
+bit 62 I 1 IO_D9
+bit 61 O 1 IO_D9 60 1 Z
+bit 60 C 1 *
+bit 59 I 1 IO_A10
+bit 58 O 1 IO_A10 57 1 Z
+bit 57 C 1 *
+bit 56 I 1 IO_B10
+bit 55 O 1 IO_B10 54 1 Z
+bit 54 C 1 *
+bit 53 I 1 IO_C10
+bit 52 O 1 IO_C10 51 1 Z
+bit 51 C 1 *
+bit 50 I 1 IO_D10
+bit 49 O 1 IO_D10 48 1 Z
+bit 48 C 1 *
+bit 47 I 1 IO_E10
+bit 46 O 1 IO_E10 45 1 Z
+bit 45 C 1 *
+bit 44 I 1 IO_E11
+bit 43 O 1 IO_E11 42 1 Z
+bit 42 C 1 *
+bit 41 O 1 *
+bit 40 O 1 *
+bit 39 O 1 *
+bit 38 O 1 *
+bit 37 O 1 *
+bit 36 O 1 *
+bit 35 O 1 *
+bit 34 O 1 *
+bit 33 O 1 *
+bit 32 O 1 *
+bit 31 O 1 *
+bit 30 O 1 *
+bit 29 I 1 IO_A11
+bit 28 O 1 IO_A11 27 1 Z
+bit 27 C 1 *
+bit 26 I 1 IO_B11
+bit 25 O 1 IO_B11 24 1 Z
+bit 24 C 1 *
+bit 23 I 1 IO_C11
+bit 22 O 1 IO_C11 21 1 Z
+bit 21 C 1 *
+bit 20 I 1 IO_D11
+bit 19 O 1 IO_D11 18 1 Z
+bit 18 C 1 *
+bit 17 I 1 IO_A12
+bit 16 O 1 IO_A12 15 1 Z
+bit 15 C 1 *
+bit 14 I 1 IO_B12
+bit 13 O 1 IO_B12 12 1 Z
+bit 12 C 1 *
+bit 11 I 1 IO_C12
+bit 10 O 1 IO_C12 9 1 Z
+bit 9 C 1 *
+bit 8 I 1 IO_D12
+bit 7 O 1 IO_D12 6 1 Z
+bit 6 C 1 *
+bit 5 I 1 IO_B13
+bit 4 O 1 IO_B13 3 1 Z
+bit 3 C 1 *
+bit 2 I 1 IO_C13
+bit 1 O 1 IO_C13 0 1 Z
+bit 0 C 1 *
--- /dev/null
+#
+# $Id$
+#
+# Copyright (C) 2002 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Marcel Telka <marcel@telka.sk>, 2002.
+#
+
+# bits 31-28 of the Device Identification Register
+0000 xc2v80-fg256 0
--- /dev/null
+signal CCLK_P15
+signal DONE_R14
+signal GND1
+signal GND2
+signal GND3
+signal GND4
+signal GND5
+signal GND6
+signal GND7
+signal GND8
+signal GND9
+signal GND10
+signal GND11
+signal GND12
+signal GND13
+signal GND14
+signal GND15
+signal GND16
+signal GND17
+signal GND18
+signal GND19
+signal GND20
+signal GND21
+signal GND22
+signal GND23
+signal GND24
+signal GND25
+signal GND26
+signal GND27
+signal GND28
+signal GND29
+signal GND30
+signal GND31
+signal GND32
+signal HSWAP_EN_B3
+signal M0_T2
+signal M1_P2
+signal M2_R3
+signal NOCONNECT1
+signal NOCONNECT2
+signal NOCONNECT3
+signal NOCONNECT4
+signal NOCONNECT5
+signal NOCONNECT6
+signal NOCONNECT7
+signal NOCONNECT8
+signal NOCONNECT9
+signal NOCONNECT10
+signal NOCONNECT11
+signal NOCONNECT12
+signal NOCONNECT13
+signal NOCONNECT14
+signal NOCONNECT15
+signal NOCONNECT16
+signal NOCONNECT17
+signal NOCONNECT18
+signal NOCONNECT19
+signal NOCONNECT20
+signal NOCONNECT21
+signal NOCONNECT22
+signal NOCONNECT23
+signal NOCONNECT24
+signal NOCONNECT25
+signal NOCONNECT26
+signal NOCONNECT27
+signal NOCONNECT28
+signal NOCONNECT29
+signal NOCONNECT30
+signal NOCONNECT31
+signal NOCONNECT32
+signal NOCONNECT33
+signal NOCONNECT34
+signal NOCONNECT35
+signal NOCONNECT36
+signal NOCONNECT37
+signal NOCONNECT38
+signal NOCONNECT39
+signal NOCONNECT40
+signal NOCONNECT41
+signal NOCONNECT42
+signal NOCONNECT43
+signal NOCONNECT44
+signal NOCONNECT45
+signal NOCONNECT46
+signal NOCONNECT47
+signal NOCONNECT48
+signal NOCONNECT49
+signal NOCONNECT50
+signal NOCONNECT51
+signal NOCONNECT52
+signal PROG_B
+signal PWRDWN_B
+signal RSVD1
+signal RSVD2
+signal RSVD3
+signal TCK
+signal TDI
+signal TDO
+signal TMS
+signal VBATT
+signal VCCAUX1
+signal VCCAUX2
+signal VCCAUX3
+signal VCCAUX4
+signal VCCINT1
+signal VCCINT2
+signal VCCINT3
+signal VCCINT4
+signal VCCINT5
+signal VCCINT6
+signal VCCINT7
+signal VCCINT8
+signal VCCO01
+signal VCCO02
+signal VCCO03
+signal VCCO11
+signal VCCO12
+signal VCCO13
+signal VCCO21
+signal VCCO22
+signal VCCO23
+signal VCCO31
+signal VCCO32
+signal VCCO33
+signal VCCO41
+signal VCCO42
+signal VCCO43
+signal VCCO51
+signal VCCO52
+signal VCCO53
+signal VCCO61
+signal VCCO62
+signal VCCO63
+signal VCCO71
+signal VCCO72
+signal VCCO73
+signal IO_A5
+signal IO_A7
+signal IO_A8
+signal IO_A9
+signal IO_A10
+signal IO_A12
+signal IO_B4
+signal IO_B5
+signal IO_B7
+signal IO_B8
+signal IO_B9
+signal IO_B10
+signal IO_B12
+signal IO_B13
+signal IO_C1
+signal IO_C4
+signal IO_C5
+signal IO_C8
+signal IO_C9
+signal IO_C12
+signal IO_C13
+signal IO_C16
+signal IO_D1
+signal IO_D2
+signal IO_D3
+signal IO_D5
+signal IO_D8
+signal IO_D9
+signal IO_D12
+signal IO_D14
+signal IO_D15
+signal IO_D16
+signal IO_E1
+signal IO_E2
+signal IO_E3
+signal IO_E4
+signal IO_E13
+signal IO_E14
+signal IO_E15
+signal IO_E16
+signal IO_F3
+signal IO_F4
+signal IO_F13
+signal IO_F14
+signal IO_G1
+signal IO_G2
+signal IO_G3
+signal IO_G4
+signal IO_G13
+signal IO_G14
+signal IO_G15
+signal IO_G16
+signal IO_H1
+signal IO_H2
+signal IO_H3
+signal IO_H4
+signal IO_H13
+signal IO_H14
+signal IO_H15
+signal IO_H16
+signal IO_J1
+signal IO_J2
+signal IO_J3
+signal IO_J4
+signal IO_J13
+signal IO_J14
+signal IO_J15
+signal IO_J16
+signal IO_K1
+signal IO_K2
+signal IO_K3
+signal IO_K4
+signal IO_K13
+signal IO_K14
+signal IO_K15
+signal IO_K16
+signal IO_L3
+signal IO_L4
+signal IO_L13
+signal IO_L14
+signal IO_M1
+signal IO_M2
+signal IO_M3
+signal IO_M4
+signal IO_M13
+signal IO_M14
+signal IO_M15
+signal IO_M16
+signal IO_N1
+signal IO_N2
+signal IO_N3
+signal IO_N5
+signal IO_N8
+signal IO_N9
+signal IO_N12
+signal IO_N14
+signal IO_N15
+signal IO_N16
+signal IO_P1
+signal IO_P4
+signal IO_P5
+signal IO_P8
+signal IO_P9
+signal IO_P12
+signal IO_P13
+signal IO_P16
+signal IO_R4
+signal IO_R7
+signal IO_R8
+signal IO_R9
+signal IO_R10
+signal IO_R13
+signal IO_T3
+signal IO_T4
+signal IO_T7
+signal IO_T8
+signal IO_T9
+signal IO_T10
+signal IO_T13
+
+register BSR 444
+register BR 1
+register DIR 32
+
+instruction length 6
+
+instruction EXTEST 000000 BSR
+instruction SAMPLE/PRELOAD 000001 BSR
+instruction IDCODE 001001 DIR
+instruction BYPASS 111111 BR
+
+bit 443 I 1 IO_C16
+bit 442 O 1 IO_C16 441 1 Z
+bit 441 C 1 *
+bit 440 I 1 IO_D16
+bit 439 O 1 IO_D16 438 1 Z
+bit 438 C 1 *
+bit 437 I 1 IO_D14
+bit 436 O 1 IO_D14 435 1 Z
+bit 435 C 1 *
+bit 434 I 1 IO_D15
+bit 433 O 1 IO_D15 432 1 Z
+bit 432 C 1 *
+bit 431 I 1 IO_E13
+bit 430 O 1 IO_E13 429 1 Z
+bit 429 C 1 *
+bit 428 I 1 IO_E14
+bit 427 O 1 IO_E14 426 1 Z
+bit 426 C 1 *
+bit 425 I 1 IO_E15
+bit 424 O 1 IO_E15 423 1 Z
+bit 423 C 1 *
+bit 422 I 1 IO_E16
+bit 421 O 1 IO_E16 420 1 Z
+bit 420 C 1 *
+bit 419 O 1 *
+bit 418 O 1 *
+bit 417 O 1 *
+bit 416 O 1 *
+bit 415 O 1 *
+bit 414 O 1 *
+bit 413 I 1 IO_F13
+bit 412 O 1 IO_F13 411 1 Z
+bit 411 C 1 *
+bit 410 I 1 IO_F14
+bit 409 O 1 IO_F14 408 1 Z
+bit 408 C 1 *
+bit 407 I 1 IO_G13
+bit 406 O 1 IO_G13 405 1 Z
+bit 405 C 1 *
+bit 404 I 1 IO_G14
+bit 403 O 1 IO_G14 402 1 Z
+bit 402 C 1 *
+bit 401 O 1 *
+bit 400 O 1 *
+bit 399 O 1 *
+bit 398 O 1 *
+bit 397 O 1 *
+bit 396 O 1 *
+bit 395 I 1 IO_G15
+bit 394 O 1 IO_G15 393 1 Z
+bit 393 C 1 *
+bit 392 I 1 IO_G16
+bit 391 O 1 IO_G16 390 1 Z
+bit 390 C 1 *
+bit 389 I 1 IO_H13
+bit 388 O 1 IO_H13 387 1 Z
+bit 387 C 1 *
+bit 386 I 1 IO_H14
+bit 385 O 1 IO_H14 384 1 Z
+bit 384 C 1 *
+bit 383 O 1 *
+bit 382 O 1 *
+bit 381 O 1 *
+bit 380 O 1 *
+bit 379 O 1 *
+bit 378 O 1 *
+bit 377 I 1 IO_H15
+bit 376 O 1 IO_H15 375 1 Z
+bit 375 C 1 *
+bit 374 I 1 IO_H16
+bit 373 O 1 IO_H16 372 1 Z
+bit 372 C 1 *
+bit 371 I 1 IO_J16
+bit 370 O 1 IO_J16 369 1 Z
+bit 369 C 1 *
+bit 368 I 1 IO_J15
+bit 367 O 1 IO_J15 366 1 Z
+bit 366 C 1 *
+bit 365 O 1 *
+bit 364 O 1 *
+bit 363 O 1 *
+bit 362 O 1 *
+bit 361 O 1 *
+bit 360 O 1 *
+bit 359 I 1 IO_J14
+bit 358 O 1 IO_J14 357 1 Z
+bit 357 C 1 *
+bit 356 I 1 IO_J13
+bit 355 O 1 IO_J13 354 1 Z
+bit 354 C 1 *
+bit 353 I 1 IO_K16
+bit 352 O 1 IO_K16 351 1 Z
+bit 351 C 1 *
+bit 350 I 1 IO_K15
+bit 349 O 1 IO_K15 348 1 Z
+bit 348 C 1 *
+bit 347 O 1 *
+bit 346 O 1 *
+bit 345 O 1 *
+bit 344 O 1 *
+bit 343 O 1 *
+bit 342 O 1 *
+bit 341 I 1 IO_K14
+bit 340 O 1 IO_K14 339 1 Z
+bit 339 C 1 *
+bit 338 I 1 IO_K13
+bit 337 O 1 IO_K13 336 1 Z
+bit 336 C 1 *
+bit 335 I 1 IO_L14
+bit 334 O 1 IO_L14 333 1 Z
+bit 333 C 1 *
+bit 332 I 1 IO_L13
+bit 331 O 1 IO_L13 330 1 Z
+bit 330 C 1 *
+bit 329 O 1 *
+bit 328 O 1 *
+bit 327 O 1 *
+bit 326 O 1 *
+bit 325 O 1 *
+bit 324 O 1 *
+bit 323 I 1 IO_M16
+bit 322 O 1 IO_M16 321 1 Z
+bit 321 C 1 *
+bit 320 I 1 IO_M15
+bit 319 O 1 IO_M15 318 1 Z
+bit 318 C 1 *
+bit 317 I 1 IO_M14
+bit 316 O 1 IO_M14 315 1 Z
+bit 315 C 1 *
+bit 314 I 1 IO_M13
+bit 313 O 1 IO_M13 312 1 Z
+bit 312 C 1 *
+bit 311 I 1 IO_N15
+bit 310 O 1 IO_N15 309 1 Z
+bit 309 C 1 *
+bit 308 I 1 IO_N14
+bit 307 O 1 IO_N14 306 1 Z
+bit 306 C 1 *
+bit 305 I 1 IO_N16
+bit 304 O 1 IO_N16 303 1 Z
+bit 303 C 1 *
+bit 302 I 1 IO_P16
+bit 301 O 1 IO_P16 300 1 Z
+bit 300 C 1 *
+bit 299 I 1 CCLK_P15
+bit 298 O 1 CCLK_P15 297 1 Z
+bit 297 C 1 *
+bit 296 O 1 *
+bit 295 I 1 DONE_R14
+bit 294 O 1 DONE_R14 293 1 Z
+bit 293 C 1 *
+bit 292 I 1 IO_T14
+bit 291 O 1 IO_T14 290 1 Z
+bit 290 C 1 *
+bit 289 I 1 IO_T13
+bit 288 O 1 IO_T13 287 1 Z
+bit 287 C 1 *
+bit 286 I 1 IO_P13
+bit 285 O 1 IO_P13 284 1 Z
+bit 284 C 1 *
+bit 283 I 1 IO_R13
+bit 282 O 1 IO_R13 281 1 Z
+bit 281 C 1 *
+bit 280 I 1 IO_N12
+bit 279 O 1 IO_N12 278 1 Z
+bit 278 C 1 *
+bit 277 I 1 IO_P12
+bit 276 O 1 IO_P12 275 1 Z
+bit 275 C 1 *
+bit 274 I 1 IO_R10
+bit 273 O 1 IO_R10 272 1 Z
+bit 272 C 1 *
+bit 271 I 1 IO_T10
+bit 270 O 1 IO_T10 269 1 Z
+bit 269 C 1 *
+bit 268 I 1 IO_N9
+bit 267 O 1 IO_N9 266 1 Z
+bit 266 C 1 *
+bit 265 I 1 IO_P9
+bit 264 O 1 IO_P9 263 1 Z
+bit 263 C 1 *
+bit 262 I 1 IO_R9
+bit 261 O 1 IO_R9 260 1 Z
+bit 260 C 1 *
+bit 259 I 1 IO_T9
+bit 258 O 1 IO_T9 257 1 Z
+bit 257 C 1 *
+bit 256 I 1 IO_T8
+bit 255 O 1 IO_T8 254 1 Z
+bit 254 C 1 *
+bit 253 I 1 IO_R8
+bit 252 O 1 IO_R8 251 1 Z
+bit 251 C 1 *
+bit 250 I 1 IO_P8
+bit 249 O 1 IO_P8 248 1 Z
+bit 248 C 1 *
+bit 247 I 1 IO_N8
+bit 246 O 1 IO_N8 245 1 Z
+bit 245 C 1 *
+bit 244 I 1 IO_T7
+bit 243 O 1 IO_T7 242 1 Z
+bit 242 C 1 *
+bit 241 I 1 IO_R7
+bit 240 O 1 IO_R7 239 1 Z
+bit 239 C 1 *
+bit 238 I 1 IO_P5
+bit 237 O 1 IO_P5 236 1 Z
+bit 236 C 1 *
+bit 235 I 1 IO_N5
+bit 234 O 1 IO_N5 233 1 Z
+bit 233 C 1 *
+bit 232 I 1 IO_R4
+bit 231 O 1 IO_R4 230 1 Z
+bit 230 C 1 *
+bit 229 I 1 IO_P4
+bit 228 O 1 IO_P4 227 1 Z
+bit 227 C 1 *
+bit 226 I 1 IO_T4
+bit 225 O 1 IO_T4 224 1 Z
+bit 224 C 1 *
+bit 223 I 1 IO_T3
+bit 222 O 1 IO_T3 221 1 Z
+bit 221 C 1 *
+bit 220 I 1 M2_R3
+bit 219 I 1 M0_T2
+bit 218 I 1 M1_P2
+bit 217 I 1 IO_P1
+bit 216 O 1 IO_P1 215 1 Z
+bit 215 C 1 *
+bit 214 I 1 IO_N1
+bit 213 O 1 IO_N1 212 1 Z
+bit 212 C 1 *
+bit 211 I 1 IO_N3
+bit 210 O 1 IO_N3 209 1 Z
+bit 209 C 1 *
+bit 208 I 1 IO_N2
+bit 207 O 1 IO_N2 206 1 Z
+bit 206 C 1 *
+bit 205 I 1 IO_M4
+bit 204 O 1 IO_M4 203 1 Z
+bit 203 C 1 *
+bit 202 I 1 IO_M3
+bit 201 O 1 IO_M3 200 1 Z
+bit 200 C 1 *
+bit 199 I 1 IO_M2
+bit 198 O 1 IO_M2 197 1 Z
+bit 197 C 1 *
+bit 196 I 1 IO_M1
+bit 195 O 1 IO_M1 194 1 Z
+bit 194 C 1 *
+bit 193 O 1 *
+bit 192 O 1 *
+bit 191 O 1 *
+bit 190 O 1 *
+bit 189 O 1 *
+bit 188 O 1 *
+bit 187 I 1 IO_L4
+bit 186 O 1 IO_L4 185 1 Z
+bit 185 C 1 *
+bit 184 I 1 IO_L3
+bit 183 O 1 IO_L3 182 1 Z
+bit 182 C 1 *
+bit 181 I 1 IO_K4
+bit 180 O 1 IO_K4 179 1 Z
+bit 179 C 1 *
+bit 178 I 1 IO_K3
+bit 177 O 1 IO_K3 176 1 Z
+bit 176 C 1 *
+bit 175 O 1 *
+bit 174 O 1 *
+bit 173 O 1 *
+bit 172 O 1 *
+bit 171 O 1 *
+bit 170 O 1 *
+bit 169 I 1 IO_K2
+bit 168 O 1 IO_K2 167 1 Z
+bit 167 C 1 *
+bit 166 I 1 IO_K1
+bit 165 O 1 IO_K1 164 1 Z
+bit 164 C 1 *
+bit 163 I 1 IO_J4
+bit 162 O 1 IO_J4 161 1 Z
+bit 161 C 1 *
+bit 160 I 1 IO_J3
+bit 159 O 1 IO_J3 158 1 Z
+bit 158 C 1 *
+bit 157 O 1 *
+bit 156 O 1 *
+bit 155 O 1 *
+bit 154 O 1 *
+bit 153 O 1 *
+bit 152 O 1 *
+bit 151 I 1 IO_J2
+bit 150 O 1 IO_J2 149 1 Z
+bit 149 C 1 *
+bit 148 I 1 IO_J1
+bit 147 O 1 IO_J1 146 1 Z
+bit 146 C 1 *
+bit 145 I 1 IO_H1
+bit 144 O 1 IO_H1 143 1 Z
+bit 143 C 1 *
+bit 142 I 1 IO_H2
+bit 141 O 1 IO_H2 140 1 Z
+bit 140 C 1 *
+bit 139 O 1 *
+bit 138 O 1 *
+bit 137 O 1 *
+bit 136 O 1 *
+bit 135 O 1 *
+bit 134 O 1 *
+bit 133 I 1 IO_H3
+bit 132 O 1 IO_H3 131 1 Z
+bit 131 C 1 *
+bit 130 I 1 IO_H4
+bit 129 O 1 IO_H4 128 1 Z
+bit 128 C 1 *
+bit 127 I 1 IO_G1
+bit 126 O 1 IO_G1 125 1 Z
+bit 125 C 1 *
+bit 124 I 1 IO_G2
+bit 123 O 1 IO_G2 122 1 Z
+bit 122 C 1 *
+bit 121 O 1 *
+bit 120 O 1 *
+bit 119 O 1 *
+bit 118 O 1 *
+bit 117 O 1 *
+bit 116 O 1 *
+bit 115 I 1 IO_G3
+bit 114 O 1 IO_G3 113 1 Z
+bit 113 C 1 *
+bit 112 I 1 IO_G4
+bit 111 O 1 IO_G4 110 1 Z
+bit 110 C 1 *
+bit 109 I 1 IO_F3
+bit 108 O 1 IO_F3 107 1 Z
+bit 107 C 1 *
+bit 106 I 1 IO_F4
+bit 105 O 1 IO_F4 104 1 Z
+bit 104 C 1 *
+bit 103 O 1 *
+bit 102 O 1 *
+bit 101 O 1 *
+bit 100 O 1 *
+bit 99 O 1 *
+bit 98 O 1 *
+bit 97 I 1 IO_E1
+bit 96 O 1 IO_E1 95 1 Z
+bit 95 C 1 *
+bit 94 I 1 IO_E2
+bit 93 O 1 IO_E2 92 1 Z
+bit 92 C 1 *
+bit 91 I 1 IO_E3
+bit 90 O 1 IO_E3 89 1 Z
+bit 89 C 1 *
+bit 88 I 1 IO_E4
+bit 87 O 1 IO_E4 86 1 Z
+bit 86 C 1 *
+bit 85 I 1 IO_D2
+bit 84 O 1 IO_D2 83 1 Z
+bit 83 C 1 *
+bit 82 I 1 IO_D3
+bit 81 O 1 IO_D3 80 1 Z
+bit 80 C 1 *
+bit 79 I 1 IO_D1
+bit 78 O 1 IO_D1 77 1 Z
+bit 77 C 1 *
+bit 76 I 1 IO_C1
+bit 75 O 1 IO_C1 74 1 Z
+bit 74 C 1 *
+bit 73 O 1 *
+bit 72 I 1 HSWAP_EN_B3
+bit 71 I 1 IO_C4
+bit 70 O 1 IO_C4 69 1 Z
+bit 69 C 1 *
+bit 68 I 1 IO_B4
+bit 67 O 1 IO_B4 66 1 Z
+bit 66 C 1 *
+bit 65 I 1 IO_D5
+bit 64 O 1 IO_D5 63 1 Z
+bit 63 C 1 *
+bit 62 I 1 IO_C5
+bit 61 O 1 IO_C5 60 1 Z
+bit 60 C 1 *
+bit 59 I 1 IO_B5
+bit 58 O 1 IO_B5 57 1 Z
+bit 57 C 1 *
+bit 56 I 1 IO_A5
+bit 55 O 1 IO_A5 54 1 Z
+bit 54 C 1 *
+bit 53 I 1 IO_B7
+bit 52 O 1 IO_B7 51 1 Z
+bit 51 C 1 *
+bit 50 I 1 IO_A7
+bit 49 O 1 IO_A7 48 1 Z
+bit 48 C 1 *
+bit 47 I 1 IO_D8
+bit 46 O 1 IO_D8 45 1 Z
+bit 45 C 1 *
+bit 44 I 1 IO_C8
+bit 43 O 1 IO_C8 42 1 Z
+bit 42 C 1 *
+bit 41 I 1 IO_B8
+bit 40 O 1 IO_B8 39 1 Z
+bit 39 C 1 *
+bit 38 I 1 IO_A8
+bit 37 O 1 IO_A8 36 1 Z
+bit 36 C 1 *
+bit 35 I 1 IO_A9
+bit 34 O 1 IO_A9 33 1 Z
+bit 33 C 1 *
+bit 32 I 1 IO_B9
+bit 31 O 1 IO_B9 30 1 Z
+bit 30 C 1 *
+bit 29 I 1 IO_C9
+bit 28 O 1 IO_C9 27 1 Z
+bit 27 C 1 *
+bit 26 I 1 IO_D9
+bit 25 O 1 IO_D9 24 1 Z
+bit 24 C 1 *
+bit 23 I 1 IO_A10
+bit 22 O 1 IO_A10 21 1 Z
+bit 21 C 1 *
+bit 20 I 1 IO_B10
+bit 19 O 1 IO_B10 18 1 Z
+bit 18 C 1 *
+bit 17 I 1 IO_A12
+bit 16 O 1 IO_A12 15 1 Z
+bit 15 C 1 *
+bit 14 I 1 IO_B12
+bit 13 O 1 IO_B12 12 1 Z
+bit 12 C 1 *
+bit 11 I 1 IO_C12
+bit 10 O 1 IO_C12 9 1 Z
+bit 9 C 1 *
+bit 8 I 1 IO_D12
+bit 7 O 1 IO_D12 6 1 Z
+bit 6 C 1 *
+bit 5 I 1 IO_B13
+bit 4 O 1 IO_B13 3 1 Z
+bit 3 C 1 *
+bit 2 I 1 IO_C13
+bit 1 O 1 IO_C13 0 1 Z
+bit 0 C 1 *
--- /dev/null
+0000 xc3s1000 0
+0001 xc3s1000 1
--- /dev/null
+#
+# $Id$
+#
+# JTAG package script for XC3S1000-FG320
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Arnim Laeuger <arniml@users.sourceforge.net>
+#
+
+salias CCLK_T15 CCLK_PAD349
+salias DONE_R15 DONE_PAD348
+salias HSWAP_EN_E6 HSWAP_EN_PAD70
+salias IO_B3 IO_PAD69
+salias IO_A17 IO_PAD488
+salias IO_C16 IO_PAD482
+salias IO_C17 IO_PAD481
+salias IO_B18 IO_PAD473
+salias IO_C18 IO_PAD471
+salias IO_D17 IO_PAD470
+salias IO_D18 IO_PAD469
+salias IO_D16 IO_PAD467
+salias IO_E16 IO_PAD465
+salias IO_E17 IO_PAD464
+salias IO_E18 IO_PAD463
+salias IO_F15 IO_PAD462
+salias IO_E15 IO_PAD461
+salias IO_F14 IO_PAD459
+salias IO_G14 IO_PAD457
+salias IO_G18 IO_PAD455
+salias IO_F17 IO_PAD453
+salias IO_G15 IO_PAD452
+salias IO_G16 IO_PAD451
+salias IO_H13 IO_PAD446
+salias IO_H14 IO_PAD445
+salias IO_H16 IO_PAD433
+salias IO_H15 IO_PAD431
+salias IO_H17 IO_PAD429
+salias IO_H18 IO_PAD427
+salias IO_J13 IO_PAD424
+salias IO_J18 IO_PAD423
+salias IO_J17 IO_PAD421
+salias IO_J15 IO_PAD419
+salias IO_J14 IO_PAD418
+salias IO_K17 IO_PAD417
+salias IO_K18 IO_PAD416
+salias IO_K13 IO_PAD414
+salias IO_K14 IO_PAD412
+salias IO_K15 IO_PAD411
+salias IO_L18 IO_PAD408
+salias IO_L17 IO_PAD406
+salias IO_L15 IO_PAD404
+salias IO_L16 IO_PAD402
+salias IO_L14 IO_PAD390
+salias IO_B4 IO_PAD48
+salias IO_L13 IO_PAD389
+salias IO_M18 IO_PAD384
+salias IO_N17 IO_PAD383
+salias IO_M15 IO_PAD382
+salias IO_M16 IO_PAD380
+salias IO_M14 IO_PAD378
+salias IO_N14 IO_PAD376
+salias IO_P15 IO_PAD374
+salias IO_C4 IO_PAD46
+salias IO_N15 IO_PAD373
+salias IO_P18 IO_PAD372
+salias IO_P17 IO_PAD371
+salias IO_R17 IO_PAD370
+salias IO_R18 IO_PAD368
+salias IO_P16 IO_PAD366
+salias IO_R16 IO_PAD365
+salias IO_T18 IO_PAD364
+salias IO_U18 IO_PAD362
+salias IO_C5 IO_PAD44
+salias IO_T17 IO_PAD354
+salias IO_T16 IO_PAD353
+salias IO_V17 IO_PAD347
+salias IO_U16 IO_PAD346
+salias IO_V16 IO_PAD345
+salias IO_A2 IO_PAD68
+salias IO_D5 IO_PAD42
+salias IO_P14 IO_PAD337
+salias IO_R14 IO_PAD336
+salias IO_U15 IO_PAD326
+salias IO_V15 IO_PAD324
+salias IO_T14 IO_PAD322
+salias IO_U14 IO_PAD320
+salias IO_A4 IO_PAD40
+salias IO_V14 IO_PAD316
+salias IO_U13 IO_PAD314
+salias IO_A5 IO_PAD39
+salias IO_R13 IO_PAD304
+salias IO_P13 IO_PAD302
+salias IO_P12 IO_PAD301
+salias IO_T12 IO_PAD300
+salias IO_R12 IO_PAD298
+salias IO_V12 IO_PAD296
+salias IO_V11 IO_PAD294
+salias IO_R11 IO_PAD291
+salias IO_T11 IO_PAD290
+salias IO_N11 IO_PAD288
+salias IO_P11 IO_PAD287
+salias IO_R10 IO_PAD286
+salias IO_U10 IO_PAD284
+salias IO_V10 IO_PAD282
+salias IO_N10 IO_PAD281
+salias IO_P10 IO_PAD280
+salias IO_R9 IO_PAD278
+salias IO_N9 IO_PAD277
+salias IO_P9 IO_PAD276
+salias IO_U9 IO_PAD274
+salias IO_V9 IO_PAD272
+salias IO_N8 IO_PAD271
+salias IO_R8 IO_PAD270
+salias IO_T8 IO_PAD268
+salias IO_V8 IO_PAD267
+salias IO_V7 IO_PAD266
+salias IO_P8 IO_PAD264
+salias IO_R7 IO_PAD262
+salias IO_T7 IO_PAD260
+salias IO_D6 IO_PAD36
+salias IO_P6 IO_PAD258
+salias IO_P7 IO_PAD257
+salias IO_U6 IO_PAD256
+salias IO_V5 IO_PAD242
+salias IO_U5 IO_PAD241
+salias IO_R6 IO_PAD240
+salias IO_R5 IO_PAD239
+salias IO_V4 IO_PAD236
+salias IO_U4 IO_PAD234
+salias IO_T5 IO_PAD221
+salias IO_T4 IO_PAD220
+salias IO_V3 IO_PAD211
+salias IO_V2 IO_PAD210
+salias IO_T3 IO_PAD204
+salias IO_T2 IO_PAD203
+salias IO_A3 IO_PAD67
+salias IO_U1 IO_PAD195
+salias IO_T1 IO_PAD193
+salias IO_R2 IO_PAD192
+salias IO_R1 IO_PAD191
+salias IO_R3 IO_PAD189
+salias IO_P3 IO_PAD187
+salias IO_P2 IO_PAD186
+salias IO_P1 IO_PAD185
+salias IO_N4 IO_PAD184
+salias IO_P4 IO_PAD183
+salias IO_N5 IO_PAD181
+salias IO_M5 IO_PAD179
+salias IO_M3 IO_PAD177
+salias IO_M4 IO_PAD175
+salias IO_N2 IO_PAD174
+salias IO_M1 IO_PAD173
+salias IO_L6 IO_PAD168
+salias IO_L5 IO_PAD167
+salias IO_L3 IO_PAD155
+salias IO_L4 IO_PAD153
+salias IO_L2 IO_PAD151
+salias IO_L1 IO_PAD149
+salias IO_B5 IO_PAD26
+salias IO_K6 IO_PAD146
+salias IO_K5 IO_PAD145
+salias IO_K4 IO_PAD143
+salias IO_K1 IO_PAD141
+salias IO_K2 IO_PAD140
+salias IO_J5 IO_PAD139
+salias IO_J4 IO_PAD138
+salias IO_J1 IO_PAD136
+salias IO_J2 IO_PAD134
+salias IO_J6 IO_PAD133
+salias IO_B6 IO_PAD24
+salias IO_H1 IO_PAD130
+salias IO_H2 IO_PAD128
+salias IO_H4 IO_PAD126
+salias IO_H3 IO_PAD124
+salias IO_E7 IO_PAD23
+salias IO_H5 IO_PAD112
+salias IO_H6 IO_PAD111
+salias IO_G4 IO_PAD106
+salias IO_C7 IO_PAD22
+salias IO_G3 IO_PAD105
+salias IO_G1 IO_PAD104
+salias IO_F2 IO_PAD102
+salias IO_G5 IO_PAD100
+salias IO_F5 IO_PAD98
+salias IO_E4 IO_PAD96
+salias IO_F4 IO_PAD95
+salias IO_E2 IO_PAD94
+salias IO_E1 IO_PAD93
+salias IO_E3 IO_PAD92
+salias IO_D7 IO_PAD20
+salias IO_D3 IO_PAD90
+salias IO_D1 IO_PAD88
+salias IO_D2 IO_PAD87
+salias IO_C1 IO_PAD86
+salias IO_B1 IO_PAD84
+salias IO_C8 IO_PAD18
+salias IO_C3 IO_PAD76
+salias IO_C2 IO_PAD75
+salias IO_D8 IO_PAD16
+salias IO_E8 IO_PAD13
+salias IO_F8 IO_PAD12
+salias IO_A7 IO_PAD10
+salias IO_A8 IO_PAD9
+salias IO_D9 IO_PAD8
+salias IO_B9 IO_PAD6
+salias IO_A9 IO_PAD4
+salias IO_E9 IO_PAD3
+salias IO_F9 IO_PAD2
+salias IO_D10 IO_PAD555
+salias IO_E10 IO_PAD554
+salias IO_F10 IO_PAD553
+salias IO_A10 IO_PAD551
+salias IO_B10 IO_PAD549
+salias IO_A11 IO_PAD548
+salias IO_C11 IO_PAD547
+salias IO_D11 IO_PAD545
+salias IO_F11 IO_PAD544
+salias IO_E11 IO_PAD543
+salias IO_A12 IO_PAD541
+salias IO_C12 IO_PAD539
+salias IO_D12 IO_PAD537
+salias IO_E13 IO_PAD535
+salias IO_E12 IO_PAD534
+salias IO_B13 IO_PAD533
+salias IO_D14 IO_PAD528
+salias IO_D13 IO_PAD527
+salias IO_A14 IO_PAD519
+salias IO_B14 IO_PAD518
+salias IO_C14 IO_PAD517
+salias IO_C15 IO_PAD516
+salias IO_A15 IO_PAD513
+salias IO_B15 IO_PAD511
+salias IO_A16 IO_PAD489
+salias M0_P5 M0_PAD412
+salias M1_U3 M1_PAD411
+salias M2_R4 M2_PAD413
--- /dev/null
+#
+# $Id$
+#
+# JTAG package script for XC3S1000-FG456
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Arnim Laeuger <arniml@users.sourceforge.net>
+#
+
+salias CCLK_AA22 CCLK_PAD349
+salias DONE_AB21 DONE_PAD348
+salias HSWAP_EN_B3 HSWAP_EN_PAD70
+salias IO_A3 IO_PAD69
+salias IO_C5 IO_PAD58
+salias IO_B20 IO_PAD488
+salias IO_C20 IO_PAD482
+salias IO_C21 IO_PAD481
+salias IO_C22 IO_PAD474
+salias IO_D20 IO_PAD473
+salias IO_D19 IO_PAD471
+salias IO_D21 IO_PAD470
+salias IO_D22 IO_PAD469
+salias IO_E18 IO_PAD467
+salias IO_F18 IO_PAD465
+salias IO_E19 IO_PAD464
+salias IO_E20 IO_PAD463
+salias IO_E21 IO_PAD462
+salias IO_E22 IO_PAD461
+salias IO_G17 IO_PAD459
+salias IO_G18 IO_PAD457
+salias IO_F19 IO_PAD455
+salias IO_G19 IO_PAD453
+salias IO_F20 IO_PAD452
+salias IO_F21 IO_PAD451
+salias IO_G20 IO_PAD449
+salias IO_H19 IO_PAD447
+salias IO_G21 IO_PAD446
+salias IO_G22 IO_PAD445
+salias IO_H18 IO_PAD444
+salias IO_J17 IO_PAD443
+salias IO_H21 IO_PAD442
+salias IO_H22 IO_PAD441
+salias IO_J18 IO_PAD440
+salias IO_J19 IO_PAD439
+salias IO_J21 IO_PAD438
+salias IO_J22 IO_PAD437
+salias IO_K17 IO_PAD436
+salias IO_K18 IO_PAD435
+salias IO_K19 IO_PAD433
+salias IO_K20 IO_PAD431
+salias IO_K21 IO_PAD429
+salias IO_K22 IO_PAD427
+salias IO_L17 IO_PAD425
+salias IO_L18 IO_PAD424
+salias IO_L19 IO_PAD423
+salias IO_L20 IO_PAD421
+salias IO_L21 IO_PAD419
+salias IO_L22 IO_PAD418
+salias IO_M22 IO_PAD417
+salias IO_M21 IO_PAD416
+salias IO_M20 IO_PAD414
+salias IO_M19 IO_PAD412
+salias IO_M18 IO_PAD411
+salias IO_M17 IO_PAD410
+salias IO_N22 IO_PAD408
+salias IO_N21 IO_PAD406
+salias IO_N20 IO_PAD404
+salias IO_N19 IO_PAD402
+salias IO_N18 IO_PAD400
+salias IO_F6 IO_PAD50
+salias IO_N17 IO_PAD399
+salias IO_P22 IO_PAD398
+salias IO_P21 IO_PAD397
+salias IO_P18 IO_PAD396
+salias IO_P17 IO_PAD395
+salias IO_P19 IO_PAD394
+salias IO_R19 IO_PAD393
+salias IO_R22 IO_PAD392
+salias IO_R21 IO_PAD391
+salias IO_T22 IO_PAD390
+salias IO_B5 IO_PAD48
+salias IO_T21 IO_PAD389
+salias IO_T20 IO_PAD388
+salias IO_T19 IO_PAD386
+salias IO_R18 IO_PAD384
+salias IO_T18 IO_PAD383
+salias IO_U21 IO_PAD382
+salias IO_U20 IO_PAD380
+salias IO_T17 IO_PAD378
+salias IO_U18 IO_PAD376
+salias IO_V22 IO_PAD374
+salias IO_A5 IO_PAD46
+salias IO_V21 IO_PAD373
+salias IO_U19 IO_PAD372
+salias IO_V20 IO_PAD371
+salias IO_W21 IO_PAD370
+salias IO_W20 IO_PAD368
+salias IO_V19 IO_PAD366
+salias IO_W19 IO_PAD365
+salias IO_W22 IO_PAD364
+salias IO_Y22 IO_PAD362
+salias IO_Y21 IO_PAD361
+salias IO_E6 IO_PAD44
+salias IO_Y20 IO_PAD354
+salias IO_Y19 IO_PAD353
+salias IO_V18 IO_PAD347
+salias IO_AA20 IO_PAD346
+salias IO_AB20 IO_PAD345
+salias IO_B4 IO_PAD68
+salias IO_D6 IO_PAD42
+salias IO_AA19 IO_PAD339
+salias IO_AB19 IO_PAD338
+salias IO_W18 IO_PAD337
+salias IO_Y18 IO_PAD336
+salias IO_F7 IO_PAD41
+salias IO_U17 IO_PAD328
+salias IO_AA18 IO_PAD326
+salias IO_AB18 IO_PAD324
+salias IO_V17 IO_PAD322
+salias IO_W17 IO_PAD320
+salias IO_U16 IO_PAD319
+salias IO_Y17 IO_PAD318
+salias IO_AA17 IO_PAD317
+salias IO_C6 IO_PAD40
+salias IO_V16 IO_PAD316
+salias IO_W16 IO_PAD315
+salias IO_Y16 IO_PAD314
+salias IO_AA16 IO_PAD313
+salias IO_AB16 IO_PAD312
+salias IO_V15 IO_PAD310
+salias IO_W15 IO_PAD309
+salias IO_AA15 IO_PAD307
+salias IO_AB15 IO_PAD306
+salias IO_B6 IO_PAD39
+salias IO_U14 IO_PAD304
+salias IO_V14 IO_PAD302
+salias IO_W14 IO_PAD301
+salias IO_AA14 IO_PAD300
+salias IO_AB14 IO_PAD298
+salias IO_U13 IO_PAD296
+salias IO_V13 IO_PAD294
+salias IO_W13 IO_PAD292
+salias IO_Y13 IO_PAD291
+salias IO_AA13 IO_PAD290
+salias IO_E7 IO_PAD38
+salias IO_U12 IO_PAD288
+salias IO_V12 IO_PAD287
+salias IO_AB13 IO_PAD286
+salias IO_W12 IO_PAD284
+salias IO_Y12 IO_PAD282
+salias IO_AA12 IO_PAD281
+salias IO_AB12 IO_PAD280
+salias IO_AB11 IO_PAD278
+salias IO_AA11 IO_PAD277
+salias IO_Y11 IO_PAD276
+salias IO_D7 IO_PAD37
+salias IO_W11 IO_PAD274
+salias IO_V11 IO_PAD272
+salias IO_U11 IO_PAD271
+salias IO_AB10 IO_PAD270
+salias IO_AA10 IO_PAD268
+salias IO_Y10 IO_PAD267
+salias IO_W10 IO_PAD266
+salias IO_V10 IO_PAD264
+salias IO_AB9 IO_PAD262
+salias IO_AA9 IO_PAD260
+salias IO_C7 IO_PAD36
+salias IO_W9 IO_PAD258
+salias IO_V9 IO_PAD257
+salias IO_U10 IO_PAD256
+salias IO_AB8 IO_PAD254
+salias IO_AA8 IO_PAD252
+salias IO_W8 IO_PAD251
+salias IO_V8 IO_PAD250
+salias IO_U9 IO_PAD249
+salias IO_AB7 IO_PAD248
+salias IO_AA7 IO_PAD246
+salias IO_B7 IO_PAD35
+salias IO_Y7 IO_PAD245
+salias IO_W7 IO_PAD244
+salias IO_V7 IO_PAD243
+salias IO_AA6 IO_PAD242
+salias IO_Y6 IO_PAD241
+salias IO_W6 IO_PAD240
+salias IO_V6 IO_PAD239
+salias IO_U7 IO_PAD238
+salias IO_AB5 IO_PAD236
+salias IO_AA5 IO_PAD234
+salias IO_A7 IO_PAD34
+salias IO_Y5 IO_PAD232
+salias IO_W5 IO_PAD230
+salias IO_U6 IO_PAD222
+salias IO_AB4 IO_PAD221
+salias IO_AA4 IO_PAD220
+salias IO_E8 IO_PAD32
+salias IO_Y4 IO_PAD211
+salias IO_AA3 IO_PAD210
+salias IO_Y3 IO_PAD204
+salias IO_Y2 IO_PAD203
+salias IO_A4 IO_PAD67
+salias IO_D8 IO_PAD31
+salias IO_Y1 IO_PAD196
+salias IO_W4 IO_PAD195
+salias IO_W3 IO_PAD193
+salias IO_W2 IO_PAD192
+salias IO_W1 IO_PAD191
+salias IO_V5 IO_PAD189
+salias IO_U5 IO_PAD187
+salias IO_V4 IO_PAD186
+salias IO_V3 IO_PAD185
+salias IO_V2 IO_PAD184
+salias IO_V1 IO_PAD183
+salias IO_T6 IO_PAD181
+salias IO_T5 IO_PAD179
+salias IO_U4 IO_PAD177
+salias IO_T4 IO_PAD175
+salias IO_U3 IO_PAD174
+salias IO_B8 IO_PAD29
+salias IO_U2 IO_PAD173
+salias IO_T3 IO_PAD171
+salias IO_R4 IO_PAD169
+salias IO_T2 IO_PAD168
+salias IO_T1 IO_PAD167
+salias IO_R5 IO_PAD166
+salias IO_P6 IO_PAD165
+salias IO_R2 IO_PAD164
+salias IO_R1 IO_PAD163
+salias IO_P5 IO_PAD162
+salias IO_A8 IO_PAD28
+salias IO_P4 IO_PAD161
+salias IO_P2 IO_PAD160
+salias IO_P1 IO_PAD159
+salias IO_N6 IO_PAD158
+salias IO_N5 IO_PAD157
+salias IO_N4 IO_PAD155
+salias IO_N3 IO_PAD153
+salias IO_N2 IO_PAD151
+salias IO_N1 IO_PAD149
+salias IO_M6 IO_PAD147
+salias IO_F9 IO_PAD26
+salias IO_M5 IO_PAD146
+salias IO_M4 IO_PAD145
+salias IO_M3 IO_PAD143
+salias IO_M2 IO_PAD141
+salias IO_M1 IO_PAD140
+salias IO_L1 IO_PAD139
+salias IO_L2 IO_PAD138
+salias IO_L3 IO_PAD136
+salias IO_L4 IO_PAD134
+salias IO_L5 IO_PAD133
+salias IO_E9 IO_PAD24
+salias IO_L6 IO_PAD132
+salias IO_K1 IO_PAD130
+salias IO_K2 IO_PAD128
+salias IO_K3 IO_PAD126
+salias IO_K4 IO_PAD124
+salias IO_K5 IO_PAD122
+salias IO_K6 IO_PAD121
+salias IO_J1 IO_PAD120
+salias IO_J2 IO_PAD119
+salias IO_J5 IO_PAD118
+salias IO_D9 IO_PAD23
+salias IO_J6 IO_PAD117
+salias IO_J4 IO_PAD116
+salias IO_H4 IO_PAD115
+salias IO_H1 IO_PAD114
+salias IO_H2 IO_PAD113
+salias IO_G1 IO_PAD112
+salias IO_G2 IO_PAD111
+salias IO_G3 IO_PAD110
+salias IO_G4 IO_PAD108
+salias IO_H5 IO_PAD106
+salias IO_B9 IO_PAD22
+salias IO_G5 IO_PAD105
+salias IO_F2 IO_PAD104
+salias IO_F3 IO_PAD102
+salias IO_G6 IO_PAD100
+salias IO_F5 IO_PAD98
+salias IO_E1 IO_PAD96
+salias IO_E2 IO_PAD95
+salias IO_F4 IO_PAD94
+salias IO_E3 IO_PAD93
+salias IO_D3 IO_PAD92
+salias IO_A9 IO_PAD20
+salias IO_D2 IO_PAD90
+salias IO_E4 IO_PAD88
+salias IO_D4 IO_PAD87
+salias IO_D1 IO_PAD86
+salias IO_C1 IO_PAD84
+salias IO_C2 IO_PAD83
+salias IO_F10 IO_PAD18
+salias IO_C3 IO_PAD76
+salias IO_C4 IO_PAD75
+salias IO_E10 IO_PAD16
+salias IO_D10 IO_PAD14
+salias IO_C10 IO_PAD13
+salias IO_B10 IO_PAD12
+salias IO_F11 IO_PAD10
+salias IO_E11 IO_PAD9
+salias IO_A10 IO_PAD8
+salias IO_D11 IO_PAD6
+salias IO_C11 IO_PAD4
+salias IO_B11 IO_PAD3
+salias IO_A11 IO_PAD2
+salias IO_A12 IO_PAD555
+salias IO_B12 IO_PAD554
+salias IO_C12 IO_PAD553
+salias IO_D12 IO_PAD551
+salias IO_E12 IO_PAD549
+salias IO_F12 IO_PAD548
+salias IO_A13 IO_PAD547
+salias IO_B13 IO_PAD545
+salias IO_C13 IO_PAD544
+salias IO_D13 IO_PAD543
+salias IO_E13 IO_PAD541
+salias IO_A14 IO_PAD539
+salias IO_B14 IO_PAD537
+salias IO_D14 IO_PAD535
+salias IO_E14 IO_PAD534
+salias IO_F13 IO_PAD533
+salias IO_B15 IO_PAD531
+salias IO_A15 IO_PAD529
+salias IO_D15 IO_PAD528
+salias IO_E15 IO_PAD527
+salias IO_F14 IO_PAD526
+salias IO_A16 IO_PAD525
+salias IO_B16 IO_PAD523
+salias IO_C16 IO_PAD522
+salias IO_D16 IO_PAD521
+salias IO_E16 IO_PAD520
+salias IO_B17 IO_PAD519
+salias IO_C17 IO_PAD518
+salias IO_D17 IO_PAD517
+salias IO_E5 IO_PAD60
+salias IO_E17 IO_PAD516
+salias IO_F16 IO_PAD515
+salias IO_A18 IO_PAD513
+salias IO_B18 IO_PAD511
+salias IO_C18 IO_PAD509
+salias IO_D18 IO_PAD507
+salias IO_D5 IO_PAD59
+salias IO_F17 IO_PAD499
+salias IO_A19 IO_PAD498
+salias IO_B19 IO_PAD497
+salias IO_C19 IO_PAD489
+salias M0_AB2 M0_PAD412
+salias M1_AA1 M1_PAD411
+salias M2_AB3 M2_PAD413
--- /dev/null
+#
+# $Id$
+#
+# JTAG package script for XC3S1000-FG676
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Arnim Laeuger <arniml@users.sourceforge.net>
+#
+
+salias CCLK_AD26 CCLK_PAD349
+salias DONE_AC24 DONE_PAD348
+salias HSWAP_EN_C2 HSWAP_EN_PAD70
+salias IO_B3 IO_PAD69
+salias IO_B5 IO_PAD58
+salias IO_E22 IO_PAD488
+salias IO_C25 IO_PAD482
+salias IO_C26 IO_PAD481
+salias IO_E23 IO_PAD480
+salias IO_E24 IO_PAD479
+salias IO_D25 IO_PAD478
+salias IO_D26 IO_PAD477
+salias IO_H20 IO_PAD475
+salias IO_H21 IO_PAD474
+salias IO_H22 IO_PAD473
+salias IO_A5 IO_PAD56
+salias IO_J21 IO_PAD471
+salias IO_H23 IO_PAD470
+salias IO_H24 IO_PAD469
+salias IO_H25 IO_PAD467
+salias IO_H26 IO_PAD465
+salias IO_J20 IO_PAD464
+salias IO_K20 IO_PAD463
+salias IO_J22 IO_PAD462
+salias IO_J23 IO_PAD461
+salias IO_J24 IO_PAD459
+salias IO_E6 IO_PAD54
+salias IO_J25 IO_PAD457
+salias IO_K21 IO_PAD455
+salias IO_K22 IO_PAD453
+salias IO_K23 IO_PAD452
+salias IO_K24 IO_PAD451
+salias IO_K25 IO_PAD449
+salias IO_K26 IO_PAD447
+salias IO_L19 IO_PAD446
+salias IO_L20 IO_PAD445
+salias IO_L21 IO_PAD444
+salias IO_D6 IO_PAD53
+salias IO_L22 IO_PAD443
+salias IO_L25 IO_PAD442
+salias IO_L26 IO_PAD441
+salias IO_M19 IO_PAD440
+salias IO_M20 IO_PAD439
+salias IO_M21 IO_PAD438
+salias IO_M22 IO_PAD437
+salias IO_L23 IO_PAD436
+salias IO_M24 IO_PAD435
+salias IO_M25 IO_PAD433
+salias IO_C6 IO_PAD52
+salias IO_M26 IO_PAD431
+salias IO_N19 IO_PAD429
+salias IO_N20 IO_PAD427
+salias IO_N21 IO_PAD425
+salias IO_N22 IO_PAD424
+salias IO_N23 IO_PAD423
+salias IO_N24 IO_PAD421
+salias IO_N25 IO_PAD419
+salias IO_N26 IO_PAD418
+salias IO_P26 IO_PAD417
+salias IO_B6 IO_PAD51
+salias IO_P25 IO_PAD416
+salias IO_P24 IO_PAD414
+salias IO_P23 IO_PAD412
+salias IO_P22 IO_PAD411
+salias IO_P21 IO_PAD410
+salias IO_P20 IO_PAD408
+salias IO_P19 IO_PAD406
+salias IO_R26 IO_PAD404
+salias IO_R25 IO_PAD402
+salias IO_R24 IO_PAD400
+salias IO_A6 IO_PAD50
+salias IO_T23 IO_PAD399
+salias IO_R22 IO_PAD398
+salias IO_R21 IO_PAD397
+salias IO_R20 IO_PAD396
+salias IO_R19 IO_PAD395
+salias IO_T26 IO_PAD394
+salias IO_T25 IO_PAD393
+salias IO_T22 IO_PAD392
+salias IO_T21 IO_PAD391
+salias IO_T20 IO_PAD390
+salias IO_E7 IO_PAD48
+salias IO_T19 IO_PAD389
+salias IO_U26 IO_PAD388
+salias IO_U25 IO_PAD386
+salias IO_U24 IO_PAD384
+salias IO_U23 IO_PAD383
+salias IO_U22 IO_PAD382
+salias IO_U21 IO_PAD380
+salias IO_V25 IO_PAD378
+salias IO_V24 IO_PAD376
+salias IO_V23 IO_PAD374
+salias IO_D7 IO_PAD46
+salias IO_V22 IO_PAD373
+salias IO_U20 IO_PAD372
+salias IO_V20 IO_PAD371
+salias IO_W26 IO_PAD370
+salias IO_W25 IO_PAD368
+salias IO_W24 IO_PAD366
+salias IO_W23 IO_PAD365
+salias IO_V21 IO_PAD364
+salias IO_W22 IO_PAD362
+salias IO_Y26 IO_PAD361
+salias IO_B7 IO_PAD44
+salias IO_Y25 IO_PAD360
+salias IO_AC26 IO_PAD358
+salias IO_AC25 IO_PAD357
+salias IO_AB24 IO_PAD356
+salias IO_AB23 IO_PAD355
+salias IO_AA22 IO_PAD354
+salias IO_AA21 IO_PAD353
+salias IO_AD25 IO_PAD347
+salias IO_AB22 IO_PAD346
+salias IO_AC22 IO_PAD345
+salias IO_E5 IO_PAD68
+salias IO_A7 IO_PAD42
+salias IO_AE24 IO_PAD343
+salias IO_AF24 IO_PAD342
+salias IO_AD23 IO_PAD340
+salias IO_AE23 IO_PAD339
+salias IO_AF23 IO_PAD338
+salias IO_AD22 IO_PAD337
+salias IO_AE22 IO_PAD336
+salias IO_AF22 IO_PAD334
+salias IO_AB21 IO_PAD332
+salias IO_AC21 IO_PAD331
+salias IO_F7 IO_PAD41
+salias IO_AD21 IO_PAD330
+salias IO_AE21 IO_PAD329
+salias IO_AF21 IO_PAD328
+salias IO_AB20 IO_PAD326
+salias IO_AC20 IO_PAD324
+salias IO_AE20 IO_PAD322
+salias IO_AF20 IO_PAD320
+salias IO_AA20 IO_PAD319
+salias IO_AE19 IO_PAD318
+salias IO_AF19 IO_PAD317
+salias IO_B8 IO_PAD40
+salias IO_Y18 IO_PAD316
+salias IO_AA18 IO_PAD315
+salias IO_Y17 IO_PAD314
+salias IO_AC17 IO_PAD313
+salias IO_AA17 IO_PAD312
+salias IO_AD17 IO_PAD310
+salias IO_AB17 IO_PAD309
+salias IO_W16 IO_PAD308
+salias IO_Y16 IO_PAD307
+salias IO_AA16 IO_PAD306
+salias IO_A8 IO_PAD39
+salias IO_AB16 IO_PAD304
+salias IO_AC16 IO_PAD302
+salias IO_W15 IO_PAD301
+salias IO_Y15 IO_PAD300
+salias IO_W14 IO_PAD298
+salias IO_AA15 IO_PAD296
+salias IO_AB15 IO_PAD294
+salias IO_AD15 IO_PAD292
+salias IO_AE15 IO_PAD291
+salias IO_AF15 IO_PAD290
+salias IO_G9 IO_PAD38
+salias IO_Y14 IO_PAD288
+salias IO_AA14 IO_PAD287
+salias IO_AB14 IO_PAD286
+salias IO_AC14 IO_PAD284
+salias IO_AD14 IO_PAD282
+salias IO_AE14 IO_PAD281
+salias IO_AF14 IO_PAD280
+salias IO_AF13 IO_PAD278
+salias IO_AE13 IO_PAD277
+salias IO_AD13 IO_PAD276
+salias IO_F9 IO_PAD37
+salias IO_AC13 IO_PAD274
+salias IO_AB13 IO_PAD272
+salias IO_AA13 IO_PAD271
+salias IO_Y13 IO_PAD270
+salias IO_W13 IO_PAD268
+salias IO_AF12 IO_PAD267
+salias IO_AE12 IO_PAD266
+salias IO_AD12 IO_PAD264
+salias IO_AB12 IO_PAD262
+salias IO_AA12 IO_PAD260
+salias IO_G10 IO_PAD36
+salias IO_Y12 IO_PAD258
+salias IO_W12 IO_PAD257
+salias IO_AC11 IO_PAD256
+salias IO_AB11 IO_PAD254
+salias IO_AA11 IO_PAD252
+salias IO_Y11 IO_PAD251
+salias IO_W11 IO_PAD250
+salias IO_AD10 IO_PAD249
+salias IO_AC10 IO_PAD248
+salias IO_AB10 IO_PAD246
+salias IO_F10 IO_PAD35
+salias IO_AA10 IO_PAD245
+salias IO_Y10 IO_PAD244
+salias IO_AB9 IO_PAD243
+salias IO_AA9 IO_PAD242
+salias IO_Y9 IO_PAD241
+salias IO_AF8 IO_PAD240
+salias IO_AE8 IO_PAD239
+salias IO_Y8 IO_PAD238
+salias IO_AF7 IO_PAD236
+salias IO_AE7 IO_PAD234
+salias IO_E10 IO_PAD34
+salias IO_AC7 IO_PAD232
+salias IO_AB7 IO_PAD230
+salias IO_AA7 IO_PAD229
+salias IO_AF6 IO_PAD228
+salias IO_AE6 IO_PAD227
+salias IO_AD6 IO_PAD226
+salias IO_AC6 IO_PAD224
+salias IO_AF5 IO_PAD222
+salias IO_AE5 IO_PAD221
+salias IO_AD5 IO_PAD220
+salias IO_D10 IO_PAD32
+salias IO_AB6 IO_PAD219
+salias IO_AA6 IO_PAD218
+salias IO_AF4 IO_PAD216
+salias IO_AE4 IO_PAD215
+salias IO_AD4 IO_PAD214
+salias IO_AC5 IO_PAD211
+salias IO_AB5 IO_PAD210
+salias IO_AD2 IO_PAD204
+salias IO_AD1 IO_PAD203
+salias IO_AB4 IO_PAD202
+salias IO_D5 IO_PAD67
+salias IO_C10 IO_PAD31
+salias IO_AB3 IO_PAD201
+salias IO_AC2 IO_PAD200
+salias IO_AC1 IO_PAD199
+salias IO_W7 IO_PAD197
+salias IO_W6 IO_PAD196
+salias IO_V6 IO_PAD195
+salias IO_W5 IO_PAD193
+salias IO_W4 IO_PAD192
+salias IO_W3 IO_PAD191
+salias IO_W2 IO_PAD189
+salias IO_H11 IO_PAD30
+salias IO_W1 IO_PAD187
+salias IO_V7 IO_PAD186
+salias IO_U7 IO_PAD185
+salias IO_V5 IO_PAD184
+salias IO_V4 IO_PAD183
+salias IO_V3 IO_PAD181
+salias IO_V2 IO_PAD179
+salias IO_U6 IO_PAD177
+salias IO_U5 IO_PAD175
+salias IO_U4 IO_PAD174
+salias IO_G11 IO_PAD29
+salias IO_U3 IO_PAD173
+salias IO_U2 IO_PAD171
+salias IO_U1 IO_PAD169
+salias IO_T8 IO_PAD168
+salias IO_T7 IO_PAD167
+salias IO_T6 IO_PAD166
+salias IO_T5 IO_PAD165
+salias IO_T2 IO_PAD164
+salias IO_T1 IO_PAD163
+salias IO_R8 IO_PAD162
+salias IO_F11 IO_PAD28
+salias IO_R7 IO_PAD161
+salias IO_R6 IO_PAD160
+salias IO_R5 IO_PAD159
+salias IO_T4 IO_PAD158
+salias IO_R3 IO_PAD157
+salias IO_R2 IO_PAD155
+salias IO_R1 IO_PAD153
+salias IO_P8 IO_PAD151
+salias IO_P7 IO_PAD149
+salias IO_P6 IO_PAD147
+salias IO_E11 IO_PAD26
+salias IO_P5 IO_PAD146
+salias IO_P4 IO_PAD145
+salias IO_P3 IO_PAD143
+salias IO_P2 IO_PAD141
+salias IO_P1 IO_PAD140
+salias IO_N1 IO_PAD139
+salias IO_N2 IO_PAD138
+salias IO_N3 IO_PAD136
+salias IO_N4 IO_PAD134
+salias IO_N5 IO_PAD133
+salias IO_D11 IO_PAD24
+salias IO_N6 IO_PAD132
+salias IO_N7 IO_PAD130
+salias IO_N8 IO_PAD128
+salias IO_M1 IO_PAD126
+salias IO_M2 IO_PAD124
+salias IO_M3 IO_PAD122
+salias IO_L4 IO_PAD121
+salias IO_M6 IO_PAD120
+salias IO_M5 IO_PAD119
+salias IO_M7 IO_PAD118
+salias IO_H12 IO_PAD23
+salias IO_M8 IO_PAD117
+salias IO_L1 IO_PAD116
+salias IO_L2 IO_PAD115
+salias IO_L5 IO_PAD114
+salias IO_L6 IO_PAD113
+salias IO_L7 IO_PAD112
+salias IO_L8 IO_PAD111
+salias IO_K1 IO_PAD110
+salias IO_K2 IO_PAD108
+salias IO_K3 IO_PAD106
+salias IO_G12 IO_PAD22
+salias IO_K4 IO_PAD105
+salias IO_K5 IO_PAD104
+salias IO_K6 IO_PAD102
+salias IO_J2 IO_PAD100
+salias IO_J3 IO_PAD98
+salias IO_J4 IO_PAD96
+salias IO_J5 IO_PAD95
+salias IO_K7 IO_PAD94
+salias IO_J7 IO_PAD93
+salias IO_H1 IO_PAD92
+salias IO_H13 IO_PAD20
+salias IO_H2 IO_PAD90
+salias IO_H3 IO_PAD88
+salias IO_H4 IO_PAD87
+salias IO_J6 IO_PAD86
+salias IO_H5 IO_PAD84
+salias IO_G1 IO_PAD83
+salias IO_G2 IO_PAD82
+salias IO_D1 IO_PAD80
+salias IO_D2 IO_PAD79
+salias IO_E3 IO_PAD78
+salias IO_F12 IO_PAD18
+salias IO_E4 IO_PAD77
+salias IO_F5 IO_PAD76
+salias IO_F6 IO_PAD75
+salias IO_E12 IO_PAD16
+salias IO_C12 IO_PAD14
+salias IO_B12 IO_PAD13
+salias IO_A12 IO_PAD12
+salias IO_G13 IO_PAD10
+salias IO_F13 IO_PAD9
+salias IO_E13 IO_PAD8
+salias IO_D13 IO_PAD6
+salias IO_C13 IO_PAD4
+salias IO_B13 IO_PAD3
+salias IO_A3 IO_PAD64
+salias IO_A13 IO_PAD2
+salias IO_A14 IO_PAD555
+salias IO_B14 IO_PAD554
+salias IO_C14 IO_PAD553
+salias IO_D14 IO_PAD551
+salias IO_E14 IO_PAD549
+salias IO_F14 IO_PAD548
+salias IO_G14 IO_PAD547
+salias IO_H14 IO_PAD545
+salias IO_A15 IO_PAD544
+salias IO_C4 IO_PAD62
+salias IO_B15 IO_PAD543
+salias IO_C15 IO_PAD541
+salias IO_E15 IO_PAD539
+salias IO_F15 IO_PAD537
+salias IO_G15 IO_PAD535
+salias IO_H15 IO_PAD534
+salias IO_D16 IO_PAD533
+salias IO_E16 IO_PAD531
+salias IO_F16 IO_PAD529
+salias IO_G16 IO_PAD528
+salias IO_B4 IO_PAD61
+salias IO_H16 IO_PAD527
+salias IO_C17 IO_PAD526
+salias IO_D17 IO_PAD525
+salias IO_E17 IO_PAD523
+salias IO_F17 IO_PAD522
+salias IO_G17 IO_PAD521
+salias IO_E18 IO_PAD520
+salias IO_F18 IO_PAD519
+salias IO_G18 IO_PAD518
+salias IO_A19 IO_PAD517
+salias IO_A4 IO_PAD60
+salias IO_B19 IO_PAD516
+salias IO_G19 IO_PAD515
+salias IO_A20 IO_PAD513
+salias IO_B20 IO_PAD511
+salias IO_D20 IO_PAD509
+salias IO_E20 IO_PAD507
+salias IO_F20 IO_PAD506
+salias IO_A21 IO_PAD505
+salias IO_B21 IO_PAD504
+salias IO_C21 IO_PAD503
+salias IO_C5 IO_PAD59
+salias IO_D21 IO_PAD501
+salias IO_A22 IO_PAD499
+salias IO_B22 IO_PAD498
+salias IO_C22 IO_PAD497
+salias IO_E21 IO_PAD496
+salias IO_F21 IO_PAD495
+salias IO_A23 IO_PAD493
+salias IO_B23 IO_PAD492
+salias IO_C23 IO_PAD491
+salias IO_D22 IO_PAD489
+salias M0_AE3 M0_PAD412
+salias M1_AC3 M1_PAD411
+salias M2_AF3 M2_PAD413
--- /dev/null
+#
+# $Id$
+#
+# JTAG package script for XC3S1000-FT256
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Arnim Laeuger <arniml@users.sourceforge.net>
+#
+
+salias CCLK_T15 CCLK_PAD349
+salias DONE_R14 DONE_PAD348
+salias HSWAP_EN_C4 HSWAP_EN_PAD70
+salias IO_A3 IO_PAD69
+salias IO_B14 IO_PAD488
+salias IO_B16 IO_PAD482
+salias IO_C16 IO_PAD481
+salias IO_C15 IO_PAD473
+salias IO_D14 IO_PAD471
+salias IO_D15 IO_PAD470
+salias IO_D16 IO_PAD469
+salias IO_E13 IO_PAD467
+salias IO_E14 IO_PAD465
+salias IO_E15 IO_PAD464
+salias IO_E16 IO_PAD463
+salias IO_F12 IO_PAD462
+salias IO_F13 IO_PAD461
+salias IO_F14 IO_PAD459
+salias IO_F15 IO_PAD457
+salias IO_G12 IO_PAD455
+salias IO_G13 IO_PAD453
+salias IO_G14 IO_PAD452
+salias IO_G15 IO_PAD451
+salias IO_G16 IO_PAD424
+salias IO_H13 IO_PAD423
+salias IO_H14 IO_PAD421
+salias IO_H15 IO_PAD419
+salias IO_H16 IO_PAD418
+salias IO_J16 IO_PAD417
+salias IO_K16 IO_PAD416
+salias IO_J14 IO_PAD414
+salias IO_J13 IO_PAD412
+salias IO_K15 IO_PAD411
+salias IO_K14 IO_PAD384
+salias IO_K13 IO_PAD383
+salias IO_K12 IO_PAD382
+salias IO_L12 IO_PAD380
+salias IO_L15 IO_PAD378
+salias IO_L14 IO_PAD376
+salias IO_L13 IO_PAD374
+salias IO_M13 IO_PAD373
+salias IO_M16 IO_PAD372
+salias IO_M15 IO_PAD371
+salias IO_M14 IO_PAD370
+salias IO_N14 IO_PAD368
+salias IO_N16 IO_PAD366
+salias IO_N15 IO_PAD365
+salias IO_P15 IO_PAD364
+salias IO_P14 IO_PAD362
+salias IO_P16 IO_PAD354
+salias IO_R16 IO_PAD353
+salias IO_P13 IO_PAD347
+salias IO_R13 IO_PAD346
+salias IO_T13 IO_PAD345
+salias IO_B4 IO_PAD68
+salias IO_T14 IO_PAD316
+salias IO_N12 IO_PAD314
+salias IO_P12 IO_PAD304
+salias IO_R12 IO_PAD302
+salias IO_T12 IO_PAD301
+salias IO_M11 IO_PAD300
+salias IO_N11 IO_PAD298
+salias IO_P11 IO_PAD296
+salias IO_R11 IO_PAD294
+salias IO_M10 IO_PAD291
+salias IO_N10 IO_PAD290
+salias IO_P10 IO_PAD288
+salias IO_R10 IO_PAD287
+salias IO_T10 IO_PAD286
+salias IO_N9 IO_PAD284
+salias IO_P9 IO_PAD282
+salias IO_R9 IO_PAD281
+salias IO_T9 IO_PAD280
+salias IO_T8 IO_PAD278
+salias IO_P8 IO_PAD277
+salias IO_N8 IO_PAD276
+salias IO_T7 IO_PAD274
+salias IO_R7 IO_PAD272
+salias IO_P7 IO_PAD271
+salias IO_N7 IO_PAD270
+salias IO_M7 IO_PAD268
+salias IO_R6 IO_PAD267
+salias IO_P6 IO_PAD266
+salias IO_N5 IO_PAD264
+salias IO_N6 IO_PAD262
+salias IO_M6 IO_PAD260
+salias IO_D5 IO_PAD36
+salias IO_R5 IO_PAD258
+salias IO_P5 IO_PAD257
+salias IO_T5 IO_PAD256
+salias IO_T4 IO_PAD236
+salias IO_R4 IO_PAD234
+salias IO_T3 IO_PAD211
+salias IO_R3 IO_PAD210
+salias IO_R1 IO_PAD204
+salias IO_P1 IO_PAD203
+salias IO_A4 IO_PAD67
+salias IO_P2 IO_PAD195
+salias IO_N3 IO_PAD193
+salias IO_N2 IO_PAD192
+salias IO_N1 IO_PAD191
+salias IO_M4 IO_PAD189
+salias IO_M3 IO_PAD187
+salias IO_M2 IO_PAD186
+salias IO_M1 IO_PAD185
+salias IO_L5 IO_PAD184
+salias IO_L4 IO_PAD183
+salias IO_L3 IO_PAD181
+salias IO_L2 IO_PAD179
+salias IO_K5 IO_PAD177
+salias IO_K4 IO_PAD175
+salias IO_K3 IO_PAD174
+salias IO_K2 IO_PAD173
+salias IO_C5 IO_PAD26
+salias IO_K1 IO_PAD146
+salias IO_J4 IO_PAD145
+salias IO_J3 IO_PAD143
+salias IO_J2 IO_PAD141
+salias IO_J1 IO_PAD140
+salias IO_H1 IO_PAD139
+salias IO_G1 IO_PAD138
+salias IO_H3 IO_PAD136
+salias IO_H4 IO_PAD134
+salias IO_G2 IO_PAD133
+salias IO_B5 IO_PAD24
+salias IO_A5 IO_PAD23
+salias IO_G3 IO_PAD106
+salias IO_E6 IO_PAD22
+salias IO_G4 IO_PAD105
+salias IO_G5 IO_PAD104
+salias IO_F5 IO_PAD102
+salias IO_F2 IO_PAD100
+salias IO_F3 IO_PAD98
+salias IO_F4 IO_PAD96
+salias IO_E4 IO_PAD95
+salias IO_E1 IO_PAD94
+salias IO_E2 IO_PAD93
+salias IO_E3 IO_PAD92
+salias IO_D6 IO_PAD20
+salias IO_D3 IO_PAD90
+salias IO_D1 IO_PAD88
+salias IO_D2 IO_PAD87
+salias IO_C2 IO_PAD86
+salias IO_C3 IO_PAD84
+salias IO_C6 IO_PAD18
+salias IO_C1 IO_PAD76
+salias IO_B1 IO_PAD75
+salias IO_B6 IO_PAD16
+salias IO_E7 IO_PAD13
+salias IO_D7 IO_PAD12
+salias IO_C7 IO_PAD10
+salias IO_B7 IO_PAD9
+salias IO_A7 IO_PAD8
+salias IO_D8 IO_PAD6
+salias IO_C8 IO_PAD4
+salias IO_B8 IO_PAD3
+salias IO_A8 IO_PAD2
+salias IO_A9 IO_PAD555
+salias IO_C9 IO_PAD554
+salias IO_D9 IO_PAD553
+salias IO_A10 IO_PAD551
+salias IO_B10 IO_PAD549
+salias IO_C10 IO_PAD548
+salias IO_D10 IO_PAD547
+salias IO_E10 IO_PAD545
+salias IO_B11 IO_PAD544
+salias IO_C11 IO_PAD543
+salias IO_D12 IO_PAD541
+salias IO_D11 IO_PAD539
+salias IO_E11 IO_PAD537
+salias IO_B12 IO_PAD535
+salias IO_C12 IO_PAD534
+salias IO_A12 IO_PAD533
+salias IO_A13 IO_PAD513
+salias IO_B13 IO_PAD511
+salias IO_A14 IO_PAD489
+salias M0_P3 M0_PAD412
+salias M1_T2 M1_PAD411
+salias M2_P4 M2_PAD413
--- /dev/null
+#
+# $Id$
+#
+# JTAG declarations for XC3S1000
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Arnim Laeuger <arniml@users.sourceforge.net>
+#
+# Note:
+# The signals defined in this file are generic for any XC3S1000.
+# Signalnames according to Xilinx' package tables are set in the
+# package specific scripts.
+#
+
+signal CCLK_PAD349
+signal DONE_PAD348
+signal HSWAP_EN_PAD70
+signal IO_PAD10
+signal IO_PAD100
+signal IO_PAD102
+signal IO_PAD104
+signal IO_PAD105
+signal IO_PAD106
+signal IO_PAD108
+signal IO_PAD110
+signal IO_PAD111
+signal IO_PAD112
+signal IO_PAD113
+signal IO_PAD114
+signal IO_PAD115
+signal IO_PAD116
+signal IO_PAD117
+signal IO_PAD118
+signal IO_PAD119
+signal IO_PAD12
+signal IO_PAD120
+signal IO_PAD121
+signal IO_PAD122
+signal IO_PAD124
+signal IO_PAD126
+signal IO_PAD128
+signal IO_PAD13
+signal IO_PAD130
+signal IO_PAD132
+signal IO_PAD133
+signal IO_PAD134
+signal IO_PAD136
+signal IO_PAD138
+signal IO_PAD139
+signal IO_PAD14
+signal IO_PAD140
+signal IO_PAD141
+signal IO_PAD143
+signal IO_PAD145
+signal IO_PAD146
+signal IO_PAD147
+signal IO_PAD149
+signal IO_PAD151
+signal IO_PAD153
+signal IO_PAD155
+signal IO_PAD157
+signal IO_PAD158
+signal IO_PAD159
+signal IO_PAD16
+signal IO_PAD160
+signal IO_PAD161
+signal IO_PAD162
+signal IO_PAD163
+signal IO_PAD164
+signal IO_PAD165
+signal IO_PAD166
+signal IO_PAD167
+signal IO_PAD168
+signal IO_PAD169
+signal IO_PAD171
+signal IO_PAD173
+signal IO_PAD174
+signal IO_PAD175
+signal IO_PAD177
+signal IO_PAD179
+signal IO_PAD18
+signal IO_PAD181
+signal IO_PAD183
+signal IO_PAD184
+signal IO_PAD185
+signal IO_PAD186
+signal IO_PAD187
+signal IO_PAD189
+signal IO_PAD191
+signal IO_PAD192
+signal IO_PAD193
+signal IO_PAD195
+signal IO_PAD196
+signal IO_PAD197
+signal IO_PAD199
+signal IO_PAD2
+signal IO_PAD20
+signal IO_PAD200
+signal IO_PAD201
+signal IO_PAD202
+signal IO_PAD203
+signal IO_PAD204
+signal IO_PAD210
+signal IO_PAD211
+signal IO_PAD214
+signal IO_PAD215
+signal IO_PAD216
+signal IO_PAD218
+signal IO_PAD219
+signal IO_PAD22
+signal IO_PAD220
+signal IO_PAD221
+signal IO_PAD222
+signal IO_PAD224
+signal IO_PAD226
+signal IO_PAD227
+signal IO_PAD228
+signal IO_PAD229
+signal IO_PAD23
+signal IO_PAD230
+signal IO_PAD232
+signal IO_PAD234
+signal IO_PAD236
+signal IO_PAD238
+signal IO_PAD239
+signal IO_PAD24
+signal IO_PAD240
+signal IO_PAD241
+signal IO_PAD242
+signal IO_PAD243
+signal IO_PAD244
+signal IO_PAD245
+signal IO_PAD246
+signal IO_PAD248
+signal IO_PAD249
+signal IO_PAD250
+signal IO_PAD251
+signal IO_PAD252
+signal IO_PAD254
+signal IO_PAD256
+signal IO_PAD257
+signal IO_PAD258
+signal IO_PAD26
+signal IO_PAD260
+signal IO_PAD262
+signal IO_PAD264
+signal IO_PAD266
+signal IO_PAD267
+signal IO_PAD268
+signal IO_PAD270
+signal IO_PAD271
+signal IO_PAD272
+signal IO_PAD274
+signal IO_PAD276
+signal IO_PAD277
+signal IO_PAD278
+signal IO_PAD28
+signal IO_PAD280
+signal IO_PAD281
+signal IO_PAD282
+signal IO_PAD284
+signal IO_PAD286
+signal IO_PAD287
+signal IO_PAD288
+signal IO_PAD29
+signal IO_PAD290
+signal IO_PAD291
+signal IO_PAD292
+signal IO_PAD294
+signal IO_PAD296
+signal IO_PAD298
+signal IO_PAD3
+signal IO_PAD30
+signal IO_PAD300
+signal IO_PAD301
+signal IO_PAD302
+signal IO_PAD304
+signal IO_PAD306
+signal IO_PAD307
+signal IO_PAD308
+signal IO_PAD309
+signal IO_PAD31
+signal IO_PAD310
+signal IO_PAD312
+signal IO_PAD313
+signal IO_PAD314
+signal IO_PAD315
+signal IO_PAD316
+signal IO_PAD317
+signal IO_PAD318
+signal IO_PAD319
+signal IO_PAD32
+signal IO_PAD320
+signal IO_PAD322
+signal IO_PAD324
+signal IO_PAD326
+signal IO_PAD328
+signal IO_PAD329
+signal IO_PAD330
+signal IO_PAD331
+signal IO_PAD332
+signal IO_PAD334
+signal IO_PAD336
+signal IO_PAD337
+signal IO_PAD338
+signal IO_PAD339
+signal IO_PAD34
+signal IO_PAD340
+signal IO_PAD342
+signal IO_PAD343
+signal IO_PAD345
+signal IO_PAD346
+signal IO_PAD347
+signal IO_PAD35
+signal IO_PAD353
+signal IO_PAD354
+signal IO_PAD355
+signal IO_PAD356
+signal IO_PAD357
+signal IO_PAD358
+signal IO_PAD36
+signal IO_PAD360
+signal IO_PAD361
+signal IO_PAD362
+signal IO_PAD364
+signal IO_PAD365
+signal IO_PAD366
+signal IO_PAD368
+signal IO_PAD37
+signal IO_PAD370
+signal IO_PAD371
+signal IO_PAD372
+signal IO_PAD373
+signal IO_PAD374
+signal IO_PAD376
+signal IO_PAD378
+signal IO_PAD38
+signal IO_PAD380
+signal IO_PAD382
+signal IO_PAD383
+signal IO_PAD384
+signal IO_PAD386
+signal IO_PAD388
+signal IO_PAD389
+signal IO_PAD39
+signal IO_PAD390
+signal IO_PAD391
+signal IO_PAD392
+signal IO_PAD393
+signal IO_PAD394
+signal IO_PAD395
+signal IO_PAD396
+signal IO_PAD397
+signal IO_PAD398
+signal IO_PAD399
+signal IO_PAD4
+signal IO_PAD40
+signal IO_PAD400
+signal IO_PAD402
+signal IO_PAD404
+signal IO_PAD406
+signal IO_PAD408
+signal IO_PAD41
+signal IO_PAD410
+signal IO_PAD411
+signal IO_PAD412
+signal IO_PAD414
+signal IO_PAD416
+signal IO_PAD417
+signal IO_PAD418
+signal IO_PAD419
+signal IO_PAD42
+signal IO_PAD421
+signal IO_PAD423
+signal IO_PAD424
+signal IO_PAD425
+signal IO_PAD427
+signal IO_PAD429
+signal IO_PAD431
+signal IO_PAD433
+signal IO_PAD435
+signal IO_PAD436
+signal IO_PAD437
+signal IO_PAD438
+signal IO_PAD439
+signal IO_PAD44
+signal IO_PAD440
+signal IO_PAD441
+signal IO_PAD442
+signal IO_PAD443
+signal IO_PAD444
+signal IO_PAD445
+signal IO_PAD446
+signal IO_PAD447
+signal IO_PAD449
+signal IO_PAD451
+signal IO_PAD452
+signal IO_PAD453
+signal IO_PAD455
+signal IO_PAD457
+signal IO_PAD459
+signal IO_PAD46
+signal IO_PAD461
+signal IO_PAD462
+signal IO_PAD463
+signal IO_PAD464
+signal IO_PAD465
+signal IO_PAD467
+signal IO_PAD469
+signal IO_PAD470
+signal IO_PAD471
+signal IO_PAD473
+signal IO_PAD474
+signal IO_PAD475
+signal IO_PAD477
+signal IO_PAD478
+signal IO_PAD479
+signal IO_PAD48
+signal IO_PAD480
+signal IO_PAD481
+signal IO_PAD482
+signal IO_PAD488
+signal IO_PAD489
+signal IO_PAD491
+signal IO_PAD492
+signal IO_PAD493
+signal IO_PAD495
+signal IO_PAD496
+signal IO_PAD497
+signal IO_PAD498
+signal IO_PAD499
+signal IO_PAD50
+signal IO_PAD501
+signal IO_PAD503
+signal IO_PAD504
+signal IO_PAD505
+signal IO_PAD506
+signal IO_PAD507
+signal IO_PAD509
+signal IO_PAD51
+signal IO_PAD511
+signal IO_PAD513
+signal IO_PAD515
+signal IO_PAD516
+signal IO_PAD517
+signal IO_PAD518
+signal IO_PAD519
+signal IO_PAD52
+signal IO_PAD520
+signal IO_PAD521
+signal IO_PAD522
+signal IO_PAD523
+signal IO_PAD525
+signal IO_PAD526
+signal IO_PAD527
+signal IO_PAD528
+signal IO_PAD529
+signal IO_PAD53
+signal IO_PAD531
+signal IO_PAD533
+signal IO_PAD534
+signal IO_PAD535
+signal IO_PAD537
+signal IO_PAD539
+signal IO_PAD54
+signal IO_PAD541
+signal IO_PAD543
+signal IO_PAD544
+signal IO_PAD545
+signal IO_PAD547
+signal IO_PAD548
+signal IO_PAD549
+signal IO_PAD551
+signal IO_PAD553
+signal IO_PAD554
+signal IO_PAD555
+signal IO_PAD56
+signal IO_PAD58
+signal IO_PAD59
+signal IO_PAD6
+signal IO_PAD60
+signal IO_PAD61
+signal IO_PAD62
+signal IO_PAD64
+signal IO_PAD65
+signal IO_PAD67
+signal IO_PAD68
+signal IO_PAD69
+signal IO_PAD75
+signal IO_PAD76
+signal IO_PAD77
+signal IO_PAD78
+signal IO_PAD79
+signal IO_PAD8
+signal IO_PAD80
+signal IO_PAD82
+signal IO_PAD83
+signal IO_PAD84
+signal IO_PAD86
+signal IO_PAD87
+signal IO_PAD88
+signal IO_PAD9
+signal IO_PAD90
+signal IO_PAD92
+signal IO_PAD93
+signal IO_PAD94
+signal IO_PAD95
+signal IO_PAD96
+signal IO_PAD98
+signal M0_PAD412
+signal M1_PAD411
+signal M2_PAD413
+
+
+register BYPASS 1
+register BSR 1187
+register DEVICE_ID 32
+
+instruction length 6
+
+instruction IDCODE 001001 DEVICE_ID
+instruction SAMPLE/PRELOAD 000001 BSR
+instruction INTEST 000111 BSR
+instruction HIGHZ 001010 BYPASS
+instruction BYPASS 111111 BYPASS
+instruction USERCODE 001000 DEVICE_ID
+instruction EXTEST 000000 BSR
+
+bit 0 C 1 *
+bit 1 O ? IO_PAD488 0 1 Z
+bit 2 I ? IO_PAD488
+bit 3 C 1 *
+bit 4 O ? IO_PAD489 3 1 Z
+bit 5 I ? IO_PAD489
+bit 6 C 1 *
+bit 7 O ? IO_PAD491 6 1 Z
+bit 8 I ? IO_PAD491
+bit 9 C 1 *
+bit 10 O ? IO_PAD492 9 1 Z
+bit 11 I ? IO_PAD492
+bit 12 C 1 *
+bit 13 O ? IO_PAD493 12 1 Z
+bit 14 I ? IO_PAD493
+bit 15 C 1 *
+bit 16 O ? IO_PAD495 15 1 Z
+bit 17 I ? IO_PAD495
+bit 18 C 1 *
+bit 19 O ? IO_PAD496 18 1 Z
+bit 20 I ? IO_PAD496
+bit 21 C 1 *
+bit 22 O ? IO_PAD497 21 1 Z
+bit 23 I ? IO_PAD497
+bit 24 C 1 *
+bit 25 O ? IO_PAD498 24 1 Z
+bit 26 I ? IO_PAD498
+bit 27 C 1 *
+bit 28 O ? IO_PAD499 27 1 Z
+bit 29 I ? IO_PAD499
+bit 30 C 1 *
+bit 31 O ? IO_PAD501 30 1 Z
+bit 32 I ? IO_PAD501
+bit 33 C 1 *
+bit 34 O ? IO_PAD503 33 1 Z
+bit 35 I ? IO_PAD503
+bit 36 C 1 *
+bit 37 O ? IO_PAD504 36 1 Z
+bit 38 I ? IO_PAD504
+bit 39 C 1 *
+bit 40 O ? IO_PAD505 39 1 Z
+bit 41 I ? IO_PAD505
+bit 42 C 1 *
+bit 43 O ? IO_PAD506 42 1 Z
+bit 44 I ? IO_PAD506
+bit 45 C 1 *
+bit 46 O ? IO_PAD507 45 1 Z
+bit 47 I ? IO_PAD507
+bit 48 C 1 *
+bit 49 O ? IO_PAD509 48 1 Z
+bit 50 I ? IO_PAD509
+bit 51 C 1 *
+bit 52 O ? IO_PAD511 51 1 Z
+bit 53 I ? IO_PAD511
+bit 54 C 1 *
+bit 55 O ? IO_PAD513 54 1 Z
+bit 56 I ? IO_PAD513
+bit 57 C 1 *
+bit 58 O ? IO_PAD515 57 1 Z
+bit 59 I ? IO_PAD515
+bit 60 C 1 *
+bit 61 O ? IO_PAD516 60 1 Z
+bit 62 I ? IO_PAD516
+bit 63 C 1 *
+bit 64 O ? IO_PAD517 63 1 Z
+bit 65 I ? IO_PAD517
+bit 66 C 1 *
+bit 67 O ? IO_PAD518 66 1 Z
+bit 68 I ? IO_PAD518
+bit 69 C 1 *
+bit 70 O ? IO_PAD519 69 1 Z
+bit 71 I ? IO_PAD519
+bit 72 C 1 *
+bit 73 O ? IO_PAD520 72 1 Z
+bit 74 I ? IO_PAD520
+bit 75 C 1 *
+bit 76 O ? IO_PAD521 75 1 Z
+bit 77 I ? IO_PAD521
+bit 78 C 1 *
+bit 79 O ? IO_PAD522 78 1 Z
+bit 80 I ? IO_PAD522
+bit 81 C 1 *
+bit 82 O ? IO_PAD523 81 1 Z
+bit 83 I ? IO_PAD523
+bit 84 C 1 *
+bit 85 O ? IO_PAD525 84 1 Z
+bit 86 I ? IO_PAD525
+bit 87 C 1 *
+bit 88 O ? IO_PAD526 87 1 Z
+bit 89 I ? IO_PAD526
+bit 90 C 1 *
+bit 91 O ? IO_PAD527 90 1 Z
+bit 92 I ? IO_PAD527
+bit 93 C 1 *
+bit 94 O ? IO_PAD528 93 1 Z
+bit 95 I ? IO_PAD528
+bit 96 C 1 *
+bit 97 O ? IO_PAD529 96 1 Z
+bit 98 I ? IO_PAD529
+bit 99 C 1 *
+bit 100 O ? IO_PAD531 99 1 Z
+bit 101 I ? IO_PAD531
+bit 102 C 1 *
+bit 103 O ? IO_PAD533 102 1 Z
+bit 104 I ? IO_PAD533
+bit 105 C 1 *
+bit 106 O ? IO_PAD534 105 1 Z
+bit 107 I ? IO_PAD534
+bit 108 C 1 *
+bit 109 O ? IO_PAD535 108 1 Z
+bit 110 I ? IO_PAD535
+bit 111 C 1 *
+bit 112 O ? IO_PAD537 111 1 Z
+bit 113 I ? IO_PAD537
+bit 114 C 1 *
+bit 115 O ? IO_PAD539 114 1 Z
+bit 116 I ? IO_PAD539
+bit 117 C 1 *
+bit 118 O ? IO_PAD541 117 1 Z
+bit 119 I ? IO_PAD541
+bit 120 C 1 *
+bit 121 O ? IO_PAD543 120 1 Z
+bit 122 I ? IO_PAD543
+bit 123 C 1 *
+bit 124 O ? IO_PAD544 123 1 Z
+bit 125 I ? IO_PAD544
+bit 126 C 1 *
+bit 127 O ? IO_PAD545 126 1 Z
+bit 128 I ? IO_PAD545
+bit 129 C 1 *
+bit 130 O ? IO_PAD547 129 1 Z
+bit 131 I ? IO_PAD547
+bit 132 C 1 *
+bit 133 O ? IO_PAD548 132 1 Z
+bit 134 I ? IO_PAD548
+bit 135 C 1 *
+bit 136 O ? IO_PAD549 135 1 Z
+bit 137 I ? IO_PAD549
+bit 138 C 1 *
+bit 139 O ? IO_PAD551 138 1 Z
+bit 140 I ? IO_PAD551
+bit 141 C 1 *
+bit 142 O ? IO_PAD553 141 1 Z
+bit 143 I ? IO_PAD553
+bit 144 C 1 *
+bit 145 O ? IO_PAD554 144 1 Z
+bit 146 I ? IO_PAD554
+bit 147 C 1 *
+bit 148 O ? IO_PAD555 147 1 Z
+bit 149 I ? IO_PAD555
+bit 150 C 1 *
+bit 151 O ? IO_PAD2 150 1 Z
+bit 152 I ? IO_PAD2
+bit 153 C 1 *
+bit 154 O ? IO_PAD3 153 1 Z
+bit 155 I ? IO_PAD3
+bit 156 C 1 *
+bit 157 O ? IO_PAD4 156 1 Z
+bit 158 I ? IO_PAD4
+bit 159 C 1 *
+bit 160 O ? IO_PAD6 159 1 Z
+bit 161 I ? IO_PAD6
+bit 162 C 1 *
+bit 163 O ? IO_PAD8 162 1 Z
+bit 164 I ? IO_PAD8
+bit 165 C 1 *
+bit 166 O ? IO_PAD9 165 1 Z
+bit 167 I ? IO_PAD9
+bit 168 C 1 *
+bit 169 O ? IO_PAD10 168 1 Z
+bit 170 I ? IO_PAD10
+bit 171 C 1 *
+bit 172 O ? IO_PAD12 171 1 Z
+bit 173 I ? IO_PAD12
+bit 174 C 1 *
+bit 175 O ? IO_PAD13 174 1 Z
+bit 176 I ? IO_PAD13
+bit 177 C 1 *
+bit 178 O ? IO_PAD14 177 1 Z
+bit 179 I ? IO_PAD14
+bit 180 C 1 *
+bit 181 O ? IO_PAD16 180 1 Z
+bit 182 I ? IO_PAD16
+bit 183 C 1 *
+bit 184 O ? IO_PAD18 183 1 Z
+bit 185 I ? IO_PAD18
+bit 186 C 1 *
+bit 187 O ? IO_PAD20 186 1 Z
+bit 188 I ? IO_PAD20
+bit 189 C 1 *
+bit 190 O ? IO_PAD22 189 1 Z
+bit 191 I ? IO_PAD22
+bit 192 C 1 *
+bit 193 O ? IO_PAD23 192 1 Z
+bit 194 I ? IO_PAD23
+bit 195 C 1 *
+bit 196 O ? IO_PAD24 195 1 Z
+bit 197 I ? IO_PAD24
+bit 198 C 1 *
+bit 199 O ? IO_PAD26 198 1 Z
+bit 200 I ? IO_PAD26
+bit 201 C 1 *
+bit 202 O ? IO_PAD28 201 1 Z
+bit 203 I ? IO_PAD28
+bit 204 C 1 *
+bit 205 O ? IO_PAD29 204 1 Z
+bit 206 I ? IO_PAD29
+bit 207 C 1 *
+bit 208 O ? IO_PAD30 207 1 Z
+bit 209 I ? IO_PAD30
+bit 210 C 1 *
+bit 211 O ? IO_PAD31 210 1 Z
+bit 212 I ? IO_PAD31
+bit 213 C 1 *
+bit 214 O ? IO_PAD32 213 1 Z
+bit 215 I ? IO_PAD32
+bit 216 C 1 *
+bit 217 O ? IO_PAD34 216 1 Z
+bit 218 I ? IO_PAD34
+bit 219 C 1 *
+bit 220 O ? IO_PAD35 219 1 Z
+bit 221 I ? IO_PAD35
+bit 222 C 1 *
+bit 223 O ? IO_PAD36 222 1 Z
+bit 224 I ? IO_PAD36
+bit 225 C 1 *
+bit 226 O ? IO_PAD37 225 1 Z
+bit 227 I ? IO_PAD37
+bit 228 C 1 *
+bit 229 O ? IO_PAD38 228 1 Z
+bit 230 I ? IO_PAD38
+bit 231 C 1 *
+bit 232 O ? IO_PAD39 231 1 Z
+bit 233 I ? IO_PAD39
+bit 234 C 1 *
+bit 235 O ? IO_PAD40 234 1 Z
+bit 236 I ? IO_PAD40
+bit 237 C 1 *
+bit 238 O ? IO_PAD41 237 1 Z
+bit 239 I ? IO_PAD41
+bit 240 C 1 *
+bit 241 O ? IO_PAD42 240 1 Z
+bit 242 I ? IO_PAD42
+bit 243 C 1 *
+bit 244 O ? IO_PAD44 243 1 Z
+bit 245 I ? IO_PAD44
+bit 246 C 1 *
+bit 247 O ? IO_PAD46 246 1 Z
+bit 248 I ? IO_PAD46
+bit 249 C 1 *
+bit 250 O ? IO_PAD48 249 1 Z
+bit 251 I ? IO_PAD48
+bit 252 C 1 *
+bit 253 O ? IO_PAD50 252 1 Z
+bit 254 I ? IO_PAD50
+bit 255 C 1 *
+bit 256 O ? IO_PAD51 255 1 Z
+bit 257 I ? IO_PAD51
+bit 258 C 1 *
+bit 259 O ? IO_PAD52 258 1 Z
+bit 260 I ? IO_PAD52
+bit 261 C 1 *
+bit 262 O ? IO_PAD53 261 1 Z
+bit 263 I ? IO_PAD53
+bit 264 C 1 *
+bit 265 O ? IO_PAD54 264 1 Z
+bit 266 I ? IO_PAD54
+bit 267 C 1 *
+bit 268 O ? IO_PAD56 267 1 Z
+bit 269 I ? IO_PAD56
+bit 270 C 1 *
+bit 271 O ? IO_PAD58 270 1 Z
+bit 272 I ? IO_PAD58
+bit 273 C 1 *
+bit 274 O ? IO_PAD59 273 1 Z
+bit 275 I ? IO_PAD59
+bit 276 C 1 *
+bit 277 O ? IO_PAD60 276 1 Z
+bit 278 I ? IO_PAD60
+bit 279 C 1 *
+bit 280 O ? IO_PAD61 279 1 Z
+bit 281 I ? IO_PAD61
+bit 282 C 1 *
+bit 283 O ? IO_PAD62 282 1 Z
+bit 284 I ? IO_PAD62
+bit 285 C 1 *
+bit 286 O ? IO_PAD64 285 1 Z
+bit 287 I ? IO_PAD64
+bit 288 C 1 *
+bit 289 O ? IO_PAD65 288 1 Z
+bit 290 I ? IO_PAD65
+bit 291 C 1 *
+bit 292 O ? IO_PAD67 291 1 Z
+bit 293 I ? IO_PAD67
+bit 294 C 1 *
+bit 295 O ? IO_PAD68 294 1 Z
+bit 296 I ? IO_PAD68
+bit 297 C 1 *
+bit 298 O ? IO_PAD69 297 1 Z
+bit 299 I ? IO_PAD69
+bit 300 I ? HSWAP_EN_PAD70
+bit 301 X 1 *
+bit 302 C 1 *
+bit 303 O ? IO_PAD75 302 1 Z
+bit 304 I ? IO_PAD75
+bit 305 C 1 *
+bit 306 O ? IO_PAD76 305 1 Z
+bit 307 I ? IO_PAD76
+bit 308 C 1 *
+bit 309 O ? IO_PAD77 308 1 Z
+bit 310 I ? IO_PAD77
+bit 311 C 1 *
+bit 312 O ? IO_PAD78 311 1 Z
+bit 313 I ? IO_PAD78
+bit 314 C 1 *
+bit 315 O ? IO_PAD79 314 1 Z
+bit 316 I ? IO_PAD79
+bit 317 C 1 *
+bit 318 O ? IO_PAD80 317 1 Z
+bit 319 I ? IO_PAD80
+bit 320 C 1 *
+bit 321 O ? IO_PAD82 320 1 Z
+bit 322 I ? IO_PAD82
+bit 323 C 1 *
+bit 324 O ? IO_PAD83 323 1 Z
+bit 325 I ? IO_PAD83
+bit 326 C 1 *
+bit 327 O ? IO_PAD84 326 1 Z
+bit 328 I ? IO_PAD84
+bit 329 C 1 *
+bit 330 O ? IO_PAD86 329 1 Z
+bit 331 I ? IO_PAD86
+bit 332 C 1 *
+bit 333 O ? IO_PAD87 332 1 Z
+bit 334 I ? IO_PAD87
+bit 335 C 1 *
+bit 336 O ? IO_PAD88 335 1 Z
+bit 337 I ? IO_PAD88
+bit 338 C 1 *
+bit 339 O ? IO_PAD90 338 1 Z
+bit 340 I ? IO_PAD90
+bit 341 C 1 *
+bit 342 O ? IO_PAD92 341 1 Z
+bit 343 I ? IO_PAD92
+bit 344 C 1 *
+bit 345 O ? IO_PAD93 344 1 Z
+bit 346 I ? IO_PAD93
+bit 347 C 1 *
+bit 348 O ? IO_PAD94 347 1 Z
+bit 349 I ? IO_PAD94
+bit 350 C 1 *
+bit 351 O ? IO_PAD95 350 1 Z
+bit 352 I ? IO_PAD95
+bit 353 C 1 *
+bit 354 O ? IO_PAD96 353 1 Z
+bit 355 I ? IO_PAD96
+bit 356 C 1 *
+bit 357 O ? IO_PAD98 356 1 Z
+bit 358 I ? IO_PAD98
+bit 359 C 1 *
+bit 360 O ? IO_PAD100 359 1 Z
+bit 361 I ? IO_PAD100
+bit 362 C 1 *
+bit 363 O ? IO_PAD102 362 1 Z
+bit 364 I ? IO_PAD102
+bit 365 C 1 *
+bit 366 O ? IO_PAD104 365 1 Z
+bit 367 I ? IO_PAD104
+bit 368 C 1 *
+bit 369 O ? IO_PAD105 368 1 Z
+bit 370 I ? IO_PAD105
+bit 371 C 1 *
+bit 372 O ? IO_PAD106 371 1 Z
+bit 373 I ? IO_PAD106
+bit 374 C 1 *
+bit 375 O ? IO_PAD108 374 1 Z
+bit 376 I ? IO_PAD108
+bit 377 C 1 *
+bit 378 O ? IO_PAD110 377 1 Z
+bit 379 I ? IO_PAD110
+bit 380 C 1 *
+bit 381 O ? IO_PAD111 380 1 Z
+bit 382 I ? IO_PAD111
+bit 383 C 1 *
+bit 384 O ? IO_PAD112 383 1 Z
+bit 385 I ? IO_PAD112
+bit 386 C 1 *
+bit 387 O ? IO_PAD113 386 1 Z
+bit 388 I ? IO_PAD113
+bit 389 C 1 *
+bit 390 O ? IO_PAD114 389 1 Z
+bit 391 I ? IO_PAD114
+bit 392 C 1 *
+bit 393 O ? IO_PAD115 392 1 Z
+bit 394 I ? IO_PAD115
+bit 395 C 1 *
+bit 396 O ? IO_PAD116 395 1 Z
+bit 397 I ? IO_PAD116
+bit 398 C 1 *
+bit 399 O ? IO_PAD117 398 1 Z
+bit 400 I ? IO_PAD117
+bit 401 C 1 *
+bit 402 O ? IO_PAD118 401 1 Z
+bit 403 I ? IO_PAD118
+bit 404 C 1 *
+bit 405 O ? IO_PAD119 404 1 Z
+bit 406 I ? IO_PAD119
+bit 407 C 1 *
+bit 408 O ? IO_PAD120 407 1 Z
+bit 409 I ? IO_PAD120
+bit 410 C 1 *
+bit 411 O ? IO_PAD121 410 1 Z
+bit 412 I ? IO_PAD121
+bit 413 C 1 *
+bit 414 O ? IO_PAD122 413 1 Z
+bit 415 I ? IO_PAD122
+bit 416 C 1 *
+bit 417 O ? IO_PAD124 416 1 Z
+bit 418 I ? IO_PAD124
+bit 419 C 1 *
+bit 420 O ? IO_PAD126 419 1 Z
+bit 421 I ? IO_PAD126
+bit 422 C 1 *
+bit 423 O ? IO_PAD128 422 1 Z
+bit 424 I ? IO_PAD128
+bit 425 C 1 *
+bit 426 O ? IO_PAD130 425 1 Z
+bit 427 I ? IO_PAD130
+bit 428 C 1 *
+bit 429 O ? IO_PAD132 428 1 Z
+bit 430 I ? IO_PAD132
+bit 431 C 1 *
+bit 432 O ? IO_PAD133 431 1 Z
+bit 433 I ? IO_PAD133
+bit 434 C 1 *
+bit 435 O ? IO_PAD134 434 1 Z
+bit 436 I ? IO_PAD134
+bit 437 C 1 *
+bit 438 O ? IO_PAD136 437 1 Z
+bit 439 I ? IO_PAD136
+bit 440 C 1 *
+bit 441 O ? IO_PAD138 440 1 Z
+bit 442 I ? IO_PAD138
+bit 443 C 1 *
+bit 444 O ? IO_PAD139 443 1 Z
+bit 445 I ? IO_PAD139
+bit 446 C 1 *
+bit 447 O ? IO_PAD140 446 1 Z
+bit 448 I ? IO_PAD140
+bit 449 C 1 *
+bit 450 O ? IO_PAD141 449 1 Z
+bit 451 I ? IO_PAD141
+bit 452 C 1 *
+bit 453 O ? IO_PAD143 452 1 Z
+bit 454 I ? IO_PAD143
+bit 455 C 1 *
+bit 456 O ? IO_PAD145 455 1 Z
+bit 457 I ? IO_PAD145
+bit 458 C 1 *
+bit 459 O ? IO_PAD146 458 1 Z
+bit 460 I ? IO_PAD146
+bit 461 C 1 *
+bit 462 O ? IO_PAD147 461 1 Z
+bit 463 I ? IO_PAD147
+bit 464 C 1 *
+bit 465 O ? IO_PAD149 464 1 Z
+bit 466 I ? IO_PAD149
+bit 467 C 1 *
+bit 468 O ? IO_PAD151 467 1 Z
+bit 469 I ? IO_PAD151
+bit 470 C 1 *
+bit 471 O ? IO_PAD153 470 1 Z
+bit 472 I ? IO_PAD153
+bit 473 C 1 *
+bit 474 O ? IO_PAD155 473 1 Z
+bit 475 I ? IO_PAD155
+bit 476 C 1 *
+bit 477 O ? IO_PAD157 476 1 Z
+bit 478 I ? IO_PAD157
+bit 479 C 1 *
+bit 480 O ? IO_PAD158 479 1 Z
+bit 481 I ? IO_PAD158
+bit 482 C 1 *
+bit 483 O ? IO_PAD159 482 1 Z
+bit 484 I ? IO_PAD159
+bit 485 C 1 *
+bit 486 O ? IO_PAD160 485 1 Z
+bit 487 I ? IO_PAD160
+bit 488 C 1 *
+bit 489 O ? IO_PAD161 488 1 Z
+bit 490 I ? IO_PAD161
+bit 491 C 1 *
+bit 492 O ? IO_PAD162 491 1 Z
+bit 493 I ? IO_PAD162
+bit 494 C 1 *
+bit 495 O ? IO_PAD163 494 1 Z
+bit 496 I ? IO_PAD163
+bit 497 C 1 *
+bit 498 O ? IO_PAD164 497 1 Z
+bit 499 I ? IO_PAD164
+bit 500 C 1 *
+bit 501 O ? IO_PAD165 500 1 Z
+bit 502 I ? IO_PAD165
+bit 503 C 1 *
+bit 504 O ? IO_PAD166 503 1 Z
+bit 505 I ? IO_PAD166
+bit 506 C 1 *
+bit 507 O ? IO_PAD167 506 1 Z
+bit 508 I ? IO_PAD167
+bit 509 C 1 *
+bit 510 O ? IO_PAD168 509 1 Z
+bit 511 I ? IO_PAD168
+bit 512 C 1 *
+bit 513 O ? IO_PAD169 512 1 Z
+bit 514 I ? IO_PAD169
+bit 515 C 1 *
+bit 516 O ? IO_PAD171 515 1 Z
+bit 517 I ? IO_PAD171
+bit 518 C 1 *
+bit 519 O ? IO_PAD173 518 1 Z
+bit 520 I ? IO_PAD173
+bit 521 C 1 *
+bit 522 O ? IO_PAD174 521 1 Z
+bit 523 I ? IO_PAD174
+bit 524 C 1 *
+bit 525 O ? IO_PAD175 524 1 Z
+bit 526 I ? IO_PAD175
+bit 527 C 1 *
+bit 528 O ? IO_PAD177 527 1 Z
+bit 529 I ? IO_PAD177
+bit 530 C 1 *
+bit 531 O ? IO_PAD179 530 1 Z
+bit 532 I ? IO_PAD179
+bit 533 C 1 *
+bit 534 O ? IO_PAD181 533 1 Z
+bit 535 I ? IO_PAD181
+bit 536 C 1 *
+bit 537 O ? IO_PAD183 536 1 Z
+bit 538 I ? IO_PAD183
+bit 539 C 1 *
+bit 540 O ? IO_PAD184 539 1 Z
+bit 541 I ? IO_PAD184
+bit 542 C 1 *
+bit 543 O ? IO_PAD185 542 1 Z
+bit 544 I ? IO_PAD185
+bit 545 C 1 *
+bit 546 O ? IO_PAD186 545 1 Z
+bit 547 I ? IO_PAD186
+bit 548 C 1 *
+bit 549 O ? IO_PAD187 548 1 Z
+bit 550 I ? IO_PAD187
+bit 551 C 1 *
+bit 552 O ? IO_PAD189 551 1 Z
+bit 553 I ? IO_PAD189
+bit 554 C 1 *
+bit 555 O ? IO_PAD191 554 1 Z
+bit 556 I ? IO_PAD191
+bit 557 C 1 *
+bit 558 O ? IO_PAD192 557 1 Z
+bit 559 I ? IO_PAD192
+bit 560 C 1 *
+bit 561 O ? IO_PAD193 560 1 Z
+bit 562 I ? IO_PAD193
+bit 563 C 1 *
+bit 564 O ? IO_PAD195 563 1 Z
+bit 565 I ? IO_PAD195
+bit 566 C 1 *
+bit 567 O ? IO_PAD196 566 1 Z
+bit 568 I ? IO_PAD196
+bit 569 C 1 *
+bit 570 O ? IO_PAD197 569 1 Z
+bit 571 I ? IO_PAD197
+bit 572 C 1 *
+bit 573 O ? IO_PAD199 572 1 Z
+bit 574 I ? IO_PAD199
+bit 575 C 1 *
+bit 576 O ? IO_PAD200 575 1 Z
+bit 577 I ? IO_PAD200
+bit 578 C 1 *
+bit 579 O ? IO_PAD201 578 1 Z
+bit 580 I ? IO_PAD201
+bit 581 C 1 *
+bit 582 O ? IO_PAD202 581 1 Z
+bit 583 I ? IO_PAD202
+bit 584 C 1 *
+bit 585 O ? IO_PAD203 584 1 Z
+bit 586 I ? IO_PAD203
+bit 587 C 1 *
+bit 588 O ? IO_PAD204 587 1 Z
+bit 589 I ? IO_PAD204
+bit 590 I ? M1_PAD207
+bit 591 I ? M0_PAD208
+bit 592 I ? M2_PAD209
+bit 593 C 1 *
+bit 594 O ? IO_PAD210 593 1 Z
+bit 595 I ? IO_PAD210
+bit 596 C 1 *
+bit 597 O ? IO_PAD211 596 1 Z
+bit 598 I ? IO_PAD211
+bit 599 C 1 *
+bit 600 O ? IO_PAD214 599 1 Z
+bit 601 I ? IO_PAD214
+bit 602 C 1 *
+bit 603 O ? IO_PAD215 602 1 Z
+bit 604 I ? IO_PAD215
+bit 605 C 1 *
+bit 606 O ? IO_PAD216 605 1 Z
+bit 607 I ? IO_PAD216
+bit 608 C 1 *
+bit 609 O ? IO_PAD218 608 1 Z
+bit 610 I ? IO_PAD218
+bit 611 C 1 *
+bit 612 O ? IO_PAD219 611 1 Z
+bit 613 I ? IO_PAD219
+bit 614 C 1 *
+bit 615 O ? IO_PAD220 614 1 Z
+bit 616 I ? IO_PAD220
+bit 617 C 1 *
+bit 618 O ? IO_PAD221 617 1 Z
+bit 619 I ? IO_PAD221
+bit 620 C 1 *
+bit 621 O ? IO_PAD222 620 1 Z
+bit 622 I ? IO_PAD222
+bit 623 C 1 *
+bit 624 O ? IO_PAD224 623 1 Z
+bit 625 I ? IO_PAD224
+bit 626 C 1 *
+bit 627 O ? IO_PAD226 626 1 Z
+bit 628 I ? IO_PAD226
+bit 629 C 1 *
+bit 630 O ? IO_PAD227 629 1 Z
+bit 631 I ? IO_PAD227
+bit 632 C 1 *
+bit 633 O ? IO_PAD228 632 1 Z
+bit 634 I ? IO_PAD228
+bit 635 C 1 *
+bit 636 O ? IO_PAD229 635 1 Z
+bit 637 I ? IO_PAD229
+bit 638 C 1 *
+bit 639 O ? IO_PAD230 638 1 Z
+bit 640 I ? IO_PAD230
+bit 641 C 1 *
+bit 642 O ? IO_PAD232 641 1 Z
+bit 643 I ? IO_PAD232
+bit 644 C 1 *
+bit 645 O ? IO_PAD234 644 1 Z
+bit 646 I ? IO_PAD234
+bit 647 C 1 *
+bit 648 O ? IO_PAD236 647 1 Z
+bit 649 I ? IO_PAD236
+bit 650 C 1 *
+bit 651 O ? IO_PAD238 650 1 Z
+bit 652 I ? IO_PAD238
+bit 653 C 1 *
+bit 654 O ? IO_PAD239 653 1 Z
+bit 655 I ? IO_PAD239
+bit 656 C 1 *
+bit 657 O ? IO_PAD240 656 1 Z
+bit 658 I ? IO_PAD240
+bit 659 C 1 *
+bit 660 O ? IO_PAD241 659 1 Z
+bit 661 I ? IO_PAD241
+bit 662 C 1 *
+bit 663 O ? IO_PAD242 662 1 Z
+bit 664 I ? IO_PAD242
+bit 665 C 1 *
+bit 666 O ? IO_PAD243 665 1 Z
+bit 667 I ? IO_PAD243
+bit 668 C 1 *
+bit 669 O ? IO_PAD244 668 1 Z
+bit 670 I ? IO_PAD244
+bit 671 C 1 *
+bit 672 O ? IO_PAD245 671 1 Z
+bit 673 I ? IO_PAD245
+bit 674 C 1 *
+bit 675 O ? IO_PAD246 674 1 Z
+bit 676 I ? IO_PAD246
+bit 677 C 1 *
+bit 678 O ? IO_PAD248 677 1 Z
+bit 679 I ? IO_PAD248
+bit 680 C 1 *
+bit 681 O ? IO_PAD249 680 1 Z
+bit 682 I ? IO_PAD249
+bit 683 C 1 *
+bit 684 O ? IO_PAD250 683 1 Z
+bit 685 I ? IO_PAD250
+bit 686 C 1 *
+bit 687 O ? IO_PAD251 686 1 Z
+bit 688 I ? IO_PAD251
+bit 689 C 1 *
+bit 690 O ? IO_PAD252 689 1 Z
+bit 691 I ? IO_PAD252
+bit 692 C 1 *
+bit 693 O ? IO_PAD254 692 1 Z
+bit 694 I ? IO_PAD254
+bit 695 C 1 *
+bit 696 O ? IO_PAD256 695 1 Z
+bit 697 I ? IO_PAD256
+bit 698 C 1 *
+bit 699 O ? IO_PAD257 698 1 Z
+bit 700 I ? IO_PAD257
+bit 701 C 1 *
+bit 702 O ? IO_PAD258 701 1 Z
+bit 703 I ? IO_PAD258
+bit 704 C 1 *
+bit 705 O ? IO_PAD260 704 1 Z
+bit 706 I ? IO_PAD260
+bit 707 C 1 *
+bit 708 O ? IO_PAD262 707 1 Z
+bit 709 I ? IO_PAD262
+bit 710 C 1 *
+bit 711 O ? IO_PAD264 710 1 Z
+bit 712 I ? IO_PAD264
+bit 713 C 1 *
+bit 714 O ? IO_PAD266 713 1 Z
+bit 715 I ? IO_PAD266
+bit 716 C 1 *
+bit 717 O ? IO_PAD267 716 1 Z
+bit 718 I ? IO_PAD267
+bit 719 C 1 *
+bit 720 O ? IO_PAD268 719 1 Z
+bit 721 I ? IO_PAD268
+bit 722 C 1 *
+bit 723 O ? IO_PAD270 722 1 Z
+bit 724 I ? IO_PAD270
+bit 725 C 1 *
+bit 726 O ? IO_PAD271 725 1 Z
+bit 727 I ? IO_PAD271
+bit 728 C 1 *
+bit 729 O ? IO_PAD272 728 1 Z
+bit 730 I ? IO_PAD272
+bit 731 C 1 *
+bit 732 O ? IO_PAD274 731 1 Z
+bit 733 I ? IO_PAD274
+bit 734 C 1 *
+bit 735 O ? IO_PAD276 734 1 Z
+bit 736 I ? IO_PAD276
+bit 737 C 1 *
+bit 738 O ? IO_PAD277 737 1 Z
+bit 739 I ? IO_PAD277
+bit 740 C 1 *
+bit 741 O ? IO_PAD278 740 1 Z
+bit 742 I ? IO_PAD278
+bit 743 C 1 *
+bit 744 O ? IO_PAD280 743 1 Z
+bit 745 I ? IO_PAD280
+bit 746 C 1 *
+bit 747 O ? IO_PAD281 746 1 Z
+bit 748 I ? IO_PAD281
+bit 749 C 1 *
+bit 750 O ? IO_PAD282 749 1 Z
+bit 751 I ? IO_PAD282
+bit 752 C 1 *
+bit 753 O ? IO_PAD284 752 1 Z
+bit 754 I ? IO_PAD284
+bit 755 C 1 *
+bit 756 O ? IO_PAD286 755 1 Z
+bit 757 I ? IO_PAD286
+bit 758 C 1 *
+bit 759 O ? IO_PAD287 758 1 Z
+bit 760 I ? IO_PAD287
+bit 761 C 1 *
+bit 762 O ? IO_PAD288 761 1 Z
+bit 763 I ? IO_PAD288
+bit 764 C 1 *
+bit 765 O ? IO_PAD290 764 1 Z
+bit 766 I ? IO_PAD290
+bit 767 C 1 *
+bit 768 O ? IO_PAD291 767 1 Z
+bit 769 I ? IO_PAD291
+bit 770 C 1 *
+bit 771 O ? IO_PAD292 770 1 Z
+bit 772 I ? IO_PAD292
+bit 773 C 1 *
+bit 774 O ? IO_PAD294 773 1 Z
+bit 775 I ? IO_PAD294
+bit 776 C 1 *
+bit 777 O ? IO_PAD296 776 1 Z
+bit 778 I ? IO_PAD296
+bit 779 C 1 *
+bit 780 O ? IO_PAD298 779 1 Z
+bit 781 I ? IO_PAD298
+bit 782 C 1 *
+bit 783 O ? IO_PAD300 782 1 Z
+bit 784 I ? IO_PAD300
+bit 785 C 1 *
+bit 786 O ? IO_PAD301 785 1 Z
+bit 787 I ? IO_PAD301
+bit 788 C 1 *
+bit 789 O ? IO_PAD302 788 1 Z
+bit 790 I ? IO_PAD302
+bit 791 C 1 *
+bit 792 O ? IO_PAD304 791 1 Z
+bit 793 I ? IO_PAD304
+bit 794 C 1 *
+bit 795 O ? IO_PAD306 794 1 Z
+bit 796 I ? IO_PAD306
+bit 797 C 1 *
+bit 798 O ? IO_PAD307 797 1 Z
+bit 799 I ? IO_PAD307
+bit 800 C 1 *
+bit 801 O ? IO_PAD308 800 1 Z
+bit 802 I ? IO_PAD308
+bit 803 C 1 *
+bit 804 O ? IO_PAD309 803 1 Z
+bit 805 I ? IO_PAD309
+bit 806 C 1 *
+bit 807 O ? IO_PAD310 806 1 Z
+bit 808 I ? IO_PAD310
+bit 809 C 1 *
+bit 810 O ? IO_PAD312 809 1 Z
+bit 811 I ? IO_PAD312
+bit 812 C 1 *
+bit 813 O ? IO_PAD313 812 1 Z
+bit 814 I ? IO_PAD313
+bit 815 C 1 *
+bit 816 O ? IO_PAD314 815 1 Z
+bit 817 I ? IO_PAD314
+bit 818 C 1 *
+bit 819 O ? IO_PAD315 818 1 Z
+bit 820 I ? IO_PAD315
+bit 821 C 1 *
+bit 822 O ? IO_PAD316 821 1 Z
+bit 823 I ? IO_PAD316
+bit 824 C 1 *
+bit 825 O ? IO_PAD317 824 1 Z
+bit 826 I ? IO_PAD317
+bit 827 C 1 *
+bit 828 O ? IO_PAD318 827 1 Z
+bit 829 I ? IO_PAD318
+bit 830 C 1 *
+bit 831 O ? IO_PAD319 830 1 Z
+bit 832 I ? IO_PAD319
+bit 833 C 1 *
+bit 834 O ? IO_PAD320 833 1 Z
+bit 835 I ? IO_PAD320
+bit 836 C 1 *
+bit 837 O ? IO_PAD322 836 1 Z
+bit 838 I ? IO_PAD322
+bit 839 C 1 *
+bit 840 O ? IO_PAD324 839 1 Z
+bit 841 I ? IO_PAD324
+bit 842 C 1 *
+bit 843 O ? IO_PAD326 842 1 Z
+bit 844 I ? IO_PAD326
+bit 845 C 1 *
+bit 846 O ? IO_PAD328 845 1 Z
+bit 847 I ? IO_PAD328
+bit 848 C 1 *
+bit 849 O ? IO_PAD329 848 1 Z
+bit 850 I ? IO_PAD329
+bit 851 C 1 *
+bit 852 O ? IO_PAD330 851 1 Z
+bit 853 I ? IO_PAD330
+bit 854 C 1 *
+bit 855 O ? IO_PAD331 854 1 Z
+bit 856 I ? IO_PAD331
+bit 857 C 1 *
+bit 858 O ? IO_PAD332 857 1 Z
+bit 859 I ? IO_PAD332
+bit 860 C 1 *
+bit 861 O ? IO_PAD334 860 1 Z
+bit 862 I ? IO_PAD334
+bit 863 C 1 *
+bit 864 O ? IO_PAD336 863 1 Z
+bit 865 I ? IO_PAD336
+bit 866 C 1 *
+bit 867 O ? IO_PAD337 866 1 Z
+bit 868 I ? IO_PAD337
+bit 869 C 1 *
+bit 870 O ? IO_PAD338 869 1 Z
+bit 871 I ? IO_PAD338
+bit 872 C 1 *
+bit 873 O ? IO_PAD339 872 1 Z
+bit 874 I ? IO_PAD339
+bit 875 C 1 *
+bit 876 O ? IO_PAD340 875 1 Z
+bit 877 I ? IO_PAD340
+bit 878 C 1 *
+bit 879 O ? IO_PAD342 878 1 Z
+bit 880 I ? IO_PAD342
+bit 881 C 1 *
+bit 882 O ? IO_PAD343 881 1 Z
+bit 883 I ? IO_PAD343
+bit 884 C 1 *
+bit 885 O ? IO_PAD345 884 1 Z
+bit 886 I ? IO_PAD345
+bit 887 C 1 *
+bit 888 O ? IO_PAD346 887 1 Z
+bit 889 I ? IO_PAD346
+bit 890 C 1 *
+bit 891 O ? IO_PAD347 890 1 Z
+bit 892 I ? IO_PAD347
+bit 893 C 1 *
+bit 894 O ? DONE_PAD348 893 1 Z
+bit 895 I ? DONE_PAD348
+bit 896 C 1 *
+bit 897 O ? CCLK_PAD349 896 1 Z
+bit 898 I ? CCLK_PAD349
+bit 899 C 1 *
+bit 900 O ? IO_PAD353 899 1 Z
+bit 901 I ? IO_PAD353
+bit 902 C 1 *
+bit 903 O ? IO_PAD354 902 1 Z
+bit 904 I ? IO_PAD354
+bit 905 C 1 *
+bit 906 O ? IO_PAD355 905 1 Z
+bit 907 I ? IO_PAD355
+bit 908 C 1 *
+bit 909 O ? IO_PAD356 908 1 Z
+bit 910 I ? IO_PAD356
+bit 911 C 1 *
+bit 912 O ? IO_PAD357 911 1 Z
+bit 913 I ? IO_PAD357
+bit 914 C 1 *
+bit 915 O ? IO_PAD358 914 1 Z
+bit 916 I ? IO_PAD358
+bit 917 C 1 *
+bit 918 O ? IO_PAD360 917 1 Z
+bit 919 I ? IO_PAD360
+bit 920 C 1 *
+bit 921 O ? IO_PAD361 920 1 Z
+bit 922 I ? IO_PAD361
+bit 923 C 1 *
+bit 924 O ? IO_PAD362 923 1 Z
+bit 925 I ? IO_PAD362
+bit 926 C 1 *
+bit 927 O ? IO_PAD364 926 1 Z
+bit 928 I ? IO_PAD364
+bit 929 C 1 *
+bit 930 O ? IO_PAD365 929 1 Z
+bit 931 I ? IO_PAD365
+bit 932 C 1 *
+bit 933 O ? IO_PAD366 932 1 Z
+bit 934 I ? IO_PAD366
+bit 935 C 1 *
+bit 936 O ? IO_PAD368 935 1 Z
+bit 937 I ? IO_PAD368
+bit 938 C 1 *
+bit 939 O ? IO_PAD370 938 1 Z
+bit 940 I ? IO_PAD370
+bit 941 C 1 *
+bit 942 O ? IO_PAD371 941 1 Z
+bit 943 I ? IO_PAD371
+bit 944 C 1 *
+bit 945 O ? IO_PAD372 944 1 Z
+bit 946 I ? IO_PAD372
+bit 947 C 1 *
+bit 948 O ? IO_PAD373 947 1 Z
+bit 949 I ? IO_PAD373
+bit 950 C 1 *
+bit 951 O ? IO_PAD374 950 1 Z
+bit 952 I ? IO_PAD374
+bit 953 C 1 *
+bit 954 O ? IO_PAD376 953 1 Z
+bit 955 I ? IO_PAD376
+bit 956 C 1 *
+bit 957 O ? IO_PAD378 956 1 Z
+bit 958 I ? IO_PAD378
+bit 959 C 1 *
+bit 960 O ? IO_PAD380 959 1 Z
+bit 961 I ? IO_PAD380
+bit 962 C 1 *
+bit 963 O ? IO_PAD382 962 1 Z
+bit 964 I ? IO_PAD382
+bit 965 C 1 *
+bit 966 O ? IO_PAD383 965 1 Z
+bit 967 I ? IO_PAD383
+bit 968 C 1 *
+bit 969 O ? IO_PAD384 968 1 Z
+bit 970 I ? IO_PAD384
+bit 971 C 1 *
+bit 972 O ? IO_PAD386 971 1 Z
+bit 973 I ? IO_PAD386
+bit 974 C 1 *
+bit 975 O ? IO_PAD388 974 1 Z
+bit 976 I ? IO_PAD388
+bit 977 C 1 *
+bit 978 O ? IO_PAD389 977 1 Z
+bit 979 I ? IO_PAD389
+bit 980 C 1 *
+bit 981 O ? IO_PAD390 980 1 Z
+bit 982 I ? IO_PAD390
+bit 983 C 1 *
+bit 984 O ? IO_PAD391 983 1 Z
+bit 985 I ? IO_PAD391
+bit 986 C 1 *
+bit 987 O ? IO_PAD392 986 1 Z
+bit 988 I ? IO_PAD392
+bit 989 C 1 *
+bit 990 O ? IO_PAD393 989 1 Z
+bit 991 I ? IO_PAD393
+bit 992 C 1 *
+bit 993 O ? IO_PAD394 992 1 Z
+bit 994 I ? IO_PAD394
+bit 995 C 1 *
+bit 996 O ? IO_PAD395 995 1 Z
+bit 997 I ? IO_PAD395
+bit 998 C 1 *
+bit 999 O ? IO_PAD396 998 1 Z
+bit 1000 I ? IO_PAD396
+bit 1001 C 1 *
+bit 1002 O ? IO_PAD397 1001 1 Z
+bit 1003 I ? IO_PAD397
+bit 1004 C 1 *
+bit 1005 O ? IO_PAD398 1004 1 Z
+bit 1006 I ? IO_PAD398
+bit 1007 C 1 *
+bit 1008 O ? IO_PAD399 1007 1 Z
+bit 1009 I ? IO_PAD399
+bit 1010 C 1 *
+bit 1011 O ? IO_PAD400 1010 1 Z
+bit 1012 I ? IO_PAD400
+bit 1013 C 1 *
+bit 1014 O ? IO_PAD402 1013 1 Z
+bit 1015 I ? IO_PAD402
+bit 1016 C 1 *
+bit 1017 O ? IO_PAD404 1016 1 Z
+bit 1018 I ? IO_PAD404
+bit 1019 C 1 *
+bit 1020 O ? IO_PAD406 1019 1 Z
+bit 1021 I ? IO_PAD406
+bit 1022 C 1 *
+bit 1023 O ? IO_PAD408 1022 1 Z
+bit 1024 I ? IO_PAD408
+bit 1025 C 1 *
+bit 1026 O ? IO_PAD410 1025 1 Z
+bit 1027 I ? IO_PAD410
+bit 1028 C 1 *
+bit 1029 O ? IO_PAD411 1028 1 Z
+bit 1030 I ? IO_PAD411
+bit 1031 C 1 *
+bit 1032 O ? IO_PAD412 1031 1 Z
+bit 1033 I ? IO_PAD412
+bit 1034 C 1 *
+bit 1035 O ? IO_PAD414 1034 1 Z
+bit 1036 I ? IO_PAD414
+bit 1037 C 1 *
+bit 1038 O ? IO_PAD416 1037 1 Z
+bit 1039 I ? IO_PAD416
+bit 1040 C 1 *
+bit 1041 O ? IO_PAD417 1040 1 Z
+bit 1042 I ? IO_PAD417
+bit 1043 C 1 *
+bit 1044 O ? IO_PAD418 1043 1 Z
+bit 1045 I ? IO_PAD418
+bit 1046 C 1 *
+bit 1047 O ? IO_PAD419 1046 1 Z
+bit 1048 I ? IO_PAD419
+bit 1049 C 1 *
+bit 1050 O ? IO_PAD421 1049 1 Z
+bit 1051 I ? IO_PAD421
+bit 1052 C 1 *
+bit 1053 O ? IO_PAD423 1052 1 Z
+bit 1054 I ? IO_PAD423
+bit 1055 C 1 *
+bit 1056 O ? IO_PAD424 1055 1 Z
+bit 1057 I ? IO_PAD424
+bit 1058 C 1 *
+bit 1059 O ? IO_PAD425 1058 1 Z
+bit 1060 I ? IO_PAD425
+bit 1061 C 1 *
+bit 1062 O ? IO_PAD427 1061 1 Z
+bit 1063 I ? IO_PAD427
+bit 1064 C 1 *
+bit 1065 O ? IO_PAD429 1064 1 Z
+bit 1066 I ? IO_PAD429
+bit 1067 C 1 *
+bit 1068 O ? IO_PAD431 1067 1 Z
+bit 1069 I ? IO_PAD431
+bit 1070 C 1 *
+bit 1071 O ? IO_PAD433 1070 1 Z
+bit 1072 I ? IO_PAD433
+bit 1073 C 1 *
+bit 1074 O ? IO_PAD435 1073 1 Z
+bit 1075 I ? IO_PAD435
+bit 1076 C 1 *
+bit 1077 O ? IO_PAD436 1076 1 Z
+bit 1078 I ? IO_PAD436
+bit 1079 C 1 *
+bit 1080 O ? IO_PAD437 1079 1 Z
+bit 1081 I ? IO_PAD437
+bit 1082 C 1 *
+bit 1083 O ? IO_PAD438 1082 1 Z
+bit 1084 I ? IO_PAD438
+bit 1085 C 1 *
+bit 1086 O ? IO_PAD439 1085 1 Z
+bit 1087 I ? IO_PAD439
+bit 1088 C 1 *
+bit 1089 O ? IO_PAD440 1088 1 Z
+bit 1090 I ? IO_PAD440
+bit 1091 C 1 *
+bit 1092 O ? IO_PAD441 1091 1 Z
+bit 1093 I ? IO_PAD441
+bit 1094 C 1 *
+bit 1095 O ? IO_PAD442 1094 1 Z
+bit 1096 I ? IO_PAD442
+bit 1097 C 1 *
+bit 1098 O ? IO_PAD443 1097 1 Z
+bit 1099 I ? IO_PAD443
+bit 1100 C 1 *
+bit 1101 O ? IO_PAD444 1100 1 Z
+bit 1102 I ? IO_PAD444
+bit 1103 C 1 *
+bit 1104 O ? IO_PAD445 1103 1 Z
+bit 1105 I ? IO_PAD445
+bit 1106 C 1 *
+bit 1107 O ? IO_PAD446 1106 1 Z
+bit 1108 I ? IO_PAD446
+bit 1109 C 1 *
+bit 1110 O ? IO_PAD447 1109 1 Z
+bit 1111 I ? IO_PAD447
+bit 1112 C 1 *
+bit 1113 O ? IO_PAD449 1112 1 Z
+bit 1114 I ? IO_PAD449
+bit 1115 C 1 *
+bit 1116 O ? IO_PAD451 1115 1 Z
+bit 1117 I ? IO_PAD451
+bit 1118 C 1 *
+bit 1119 O ? IO_PAD452 1118 1 Z
+bit 1120 I ? IO_PAD452
+bit 1121 C 1 *
+bit 1122 O ? IO_PAD453 1121 1 Z
+bit 1123 I ? IO_PAD453
+bit 1124 C 1 *
+bit 1125 O ? IO_PAD455 1124 1 Z
+bit 1126 I ? IO_PAD455
+bit 1127 C 1 *
+bit 1128 O ? IO_PAD457 1127 1 Z
+bit 1129 I ? IO_PAD457
+bit 1130 C 1 *
+bit 1131 O ? IO_PAD459 1130 1 Z
+bit 1132 I ? IO_PAD459
+bit 1133 C 1 *
+bit 1134 O ? IO_PAD461 1133 1 Z
+bit 1135 I ? IO_PAD461
+bit 1136 C 1 *
+bit 1137 O ? IO_PAD462 1136 1 Z
+bit 1138 I ? IO_PAD462
+bit 1139 C 1 *
+bit 1140 O ? IO_PAD463 1139 1 Z
+bit 1141 I ? IO_PAD463
+bit 1142 C 1 *
+bit 1143 O ? IO_PAD464 1142 1 Z
+bit 1144 I ? IO_PAD464
+bit 1145 C 1 *
+bit 1146 O ? IO_PAD465 1145 1 Z
+bit 1147 I ? IO_PAD465
+bit 1148 C 1 *
+bit 1149 O ? IO_PAD467 1148 1 Z
+bit 1150 I ? IO_PAD467
+bit 1151 C 1 *
+bit 1152 O ? IO_PAD469 1151 1 Z
+bit 1153 I ? IO_PAD469
+bit 1154 C 1 *
+bit 1155 O ? IO_PAD470 1154 1 Z
+bit 1156 I ? IO_PAD470
+bit 1157 C 1 *
+bit 1158 O ? IO_PAD471 1157 1 Z
+bit 1159 I ? IO_PAD471
+bit 1160 C 1 *
+bit 1161 O ? IO_PAD473 1160 1 Z
+bit 1162 I ? IO_PAD473
+bit 1163 C 1 *
+bit 1164 O ? IO_PAD474 1163 1 Z
+bit 1165 I ? IO_PAD474
+bit 1166 C 1 *
+bit 1167 O ? IO_PAD475 1166 1 Z
+bit 1168 I ? IO_PAD475
+bit 1169 C 1 *
+bit 1170 O ? IO_PAD477 1169 1 Z
+bit 1171 I ? IO_PAD477
+bit 1172 C 1 *
+bit 1173 O ? IO_PAD478 1172 1 Z
+bit 1174 I ? IO_PAD478
+bit 1175 C 1 *
+bit 1176 O ? IO_PAD479 1175 1 Z
+bit 1177 I ? IO_PAD479
+bit 1178 C 1 *
+bit 1179 O ? IO_PAD480 1178 1 Z
+bit 1180 I ? IO_PAD480
+bit 1181 C 1 *
+bit 1182 O ? IO_PAD481 1181 1 Z
+bit 1183 I ? IO_PAD481
+bit 1184 C 1 *
+bit 1185 O ? IO_PAD482 1184 1 Z
+bit 1186 I ? IO_PAD482
--- /dev/null
+0000 xc3s100e_die 0
--- /dev/null
+signal TCK
+signal TDI
+signal TDO
+signal TMS
+signal PAD38
+signal PAD75
+signal PAD39
+signal PAD76
+signal IPAD41
+signal PAD78
+signal PAD79
+signal IPAD80
+signal IPAD81
+signal IPAD46
+signal IPAD86
+signal IPAD3
+signal IPAD6
+signal PAD40
+signal PROG_B
+signal PAD42
+signal PAD43
+signal PAD44
+signal PAD45
+signal PAD82
+signal PAD47
+signal PAD83
+signal IPAD12
+signal PAD48
+signal PAD84
+signal IPAD13
+signal PAD49
+signal PAD85
+signal IPAD50
+signal PAD87
+signal PAD88
+signal DONE
+signal PAD89
+signal PAD101
+signal IPAD90
+signal IPAD19
+signal PAD102
+signal PAD103
+signal IPAD57
+signal PAD105
+signal IPAD95
+signal PAD106
+signal PAD107
+signal PAD108
+signal IPAD100
+signal IPAD104
+signal PAD10
+signal PAD11
+signal PAD14
+signal PAD51
+signal PAD15
+signal PAD52
+signal PAD16
+signal PAD53
+signal PAD17
+signal PAD54
+signal PAD18
+signal PAD91
+signal PAD55
+signal IPAD20
+signal PAD92
+signal PAD56
+signal PAD93
+signal PAD94
+signal PAD58
+signal IPAD23
+signal PAD59
+signal PAD96
+signal IPAD60
+signal PAD97
+signal PAD1
+signal IPAD26
+signal PAD98
+signal PAD2
+signal IPAD27
+signal PAD99
+signal PAD4
+signal IPAD66
+signal PAD5
+signal IPAD67
+signal PAD7
+signal PAD8
+signal PAD9
+signal PAD21
+signal PAD22
+signal PAD24
+signal PAD61
+signal PAD25
+signal PAD62
+signal PAD63
+signal PAD64
+signal PAD28
+signal PAD65
+signal PAD29
+signal PAD68
+signal IPAD32
+signal PAD69
+signal IPAD36
+signal IPAD73
+signal IPAD74
+signal IPAD77
+signal PAD30
+signal PAD31
+signal PAD33
+signal PAD70
+signal PAD34
+signal PAD71
+signal PAD35
+signal PAD72
+signal PAD37
+signal GND0
+signal GND1
+signal GND2
+signal GND3
+signal GND4
+signal GND5
+signal GND6
+signal GND7
+signal GND8
+signal GND9
+signal GND10
+signal GND11
+signal GND12
+signal GND13
+signal VDD0
+signal VDD1
+signal VDD2
+signal VDD3
+signal VDD4
+signal VDD5
+signal VDD6
+signal VDD7
+signal VDD8
+signal VDD9
+signal VDD10
+signal VDD11
+signal VDD12
+signal VDD13
+signal Vaux0
+signal Vaux1
+signal Vaux2
+
+register BSR 272
+register BR 1
+register DIR 32
+
+instruction length 6
+
+instruction SAMPLE/PRELOAD 100000 BSR
+instruction IDCODE 100100 DIR
+instruction EXTEST 111100 BSR
+instruction BYPASS 111111 BR
+
+bit 271 I 1 IPAD27
+bit 270 I 1 PAD28
+bit 269 O 1 PAD28 268 0 Z
+bit 268 C 0 *
+bit 267 I 1 PAD29
+bit 266 O 1 PAD29 265 0 Z
+bit 265 C 0 *
+bit 264 I 1 PAD30
+bit 263 O 1 PAD30 262 0 Z
+bit 262 C 0 *
+bit 261 I 1 PAD31
+bit 260 O 1 PAD31 259 0 Z
+bit 259 C 0 *
+bit 258 I 1 IPAD32
+bit 257 I 1 PAD33
+bit 256 O 1 PAD33 255 0 Z
+bit 255 C 0 *
+bit 254 I 1 PAD34
+bit 253 O 1 PAD34 252 0 Z
+bit 252 C 0 *
+bit 251 I 1 PAD35
+bit 250 O 1 PAD35 249 0 Z
+bit 249 C 0 *
+bit 248 I 1 IPAD36
+bit 247 I 1 PAD37
+bit 246 O 1 PAD37 245 0 Z
+bit 245 C 0 *
+bit 244 I 1 PAD38
+bit 243 O 1 PAD38 242 0 Z
+bit 242 C 0 *
+bit 241 I 1 PAD39
+bit 240 O 1 PAD39 239 0 Z
+bit 239 C 0 *
+bit 238 I 1 PAD40
+bit 237 O 1 PAD40 236 0 Z
+bit 236 C 0 *
+bit 235 I 1 IPAD41
+bit 234 I 1 PAD42
+bit 233 O 1 PAD42 232 0 Z
+bit 232 C 0 *
+bit 231 I 1 PAD43
+bit 230 O 1 PAD43 229 0 Z
+bit 229 C 0 *
+bit 228 I 1 PAD44
+bit 227 O 1 PAD44 226 0 Z
+bit 226 C 0 *
+bit 225 I 1 PAD45
+bit 224 O 1 PAD45 223 0 Z
+bit 223 C 0 *
+bit 222 I 1 IPAD46
+bit 221 I 1 PAD47
+bit 220 O 1 PAD47 219 0 Z
+bit 219 C 0 *
+bit 218 I 1 PAD48
+bit 217 O 1 PAD48 216 0 Z
+bit 216 C 0 *
+bit 215 I 1 PAD49
+bit 214 O 1 PAD49 213 0 Z
+bit 213 C 0 *
+bit 212 I 1 IPAD50
+bit 211 I 1 PAD51
+bit 210 O 1 PAD51 209 0 Z
+bit 209 C 0 *
+bit 208 I 1 PAD52
+bit 207 O 1 PAD52 206 0 Z
+bit 206 C 0 *
+bit 205 I 1 PAD53
+bit 204 O 1 PAD53 203 0 Z
+bit 203 C 0 *
+bit 202 I 1 PAD54
+bit 201 O 1 PAD54 200 0 Z
+bit 200 C 0 *
+bit 199 I 1 DONE
+bit 198 O 1 *
+bit 197 O 1 *
+bit 196 I 1 PAD55
+bit 195 O 1 PAD55 194 0 Z
+bit 194 C 0 *
+bit 193 I 1 PAD56
+bit 192 O 1 PAD56 191 0 Z
+bit 191 C 0 *
+bit 190 I 1 IPAD57
+bit 189 I 1 PAD58
+bit 188 O 1 PAD58 187 0 Z
+bit 187 C 0 *
+bit 186 I 1 PAD59
+bit 185 O 1 PAD59 184 0 Z
+bit 184 C 0 *
+bit 183 I 1 IPAD60
+bit 182 I 1 PAD61
+bit 181 O 1 PAD61 180 0 Z
+bit 180 C 0 *
+bit 179 I 1 PAD62
+bit 178 O 1 PAD62 177 0 Z
+bit 177 C 0 *
+bit 176 I 1 PAD63
+bit 175 O 1 PAD63 174 0 Z
+bit 174 C 0 *
+bit 173 I 1 PAD64
+bit 172 O 1 PAD64 171 0 Z
+bit 171 C 0 *
+bit 170 I 1 PAD65
+bit 169 O 1 PAD65 168 0 Z
+bit 168 C 0 *
+bit 167 I 1 IPAD66
+bit 166 I 1 IPAD67
+bit 165 I 1 PAD68
+bit 164 O 1 PAD68 163 0 Z
+bit 163 C 0 *
+bit 162 I 1 PAD69
+bit 161 O 1 PAD69 160 0 Z
+bit 160 C 0 *
+bit 159 I 1 PAD70
+bit 158 O 1 PAD70 157 0 Z
+bit 157 C 0 *
+bit 156 I 1 PAD71
+bit 155 O 1 PAD71 154 0 Z
+bit 154 C 0 *
+bit 153 I 1 PAD72
+bit 152 O 1 PAD72 151 0 Z
+bit 151 C 0 *
+bit 150 I 1 IPAD73
+bit 149 I 1 IPAD74
+bit 148 I 1 PAD75
+bit 147 O 1 PAD75 146 0 Z
+bit 146 C 0 *
+bit 145 I 1 PAD76
+bit 144 O 1 PAD76 143 0 Z
+bit 143 C 0 *
+bit 142 I 1 IPAD77
+bit 141 I 1 PAD78
+bit 140 O 1 PAD78 139 0 Z
+bit 139 C 0 *
+bit 138 I 1 PAD79
+bit 137 O 1 PAD79 136 0 Z
+bit 136 C 0 *
+bit 135 I 1 IPAD80
+bit 134 I 1 IPAD81
+bit 133 I 1 PAD82
+bit 132 O 1 PAD82 131 0 Z
+bit 131 C 0 *
+bit 130 I 1 PAD83
+bit 129 O 1 PAD83 128 0 Z
+bit 128 C 0 *
+bit 127 I 1 PAD84
+bit 126 O 1 PAD84 125 0 Z
+bit 125 C 0 *
+bit 124 I 1 PAD85
+bit 123 O 1 PAD85 122 0 Z
+bit 122 C 0 *
+bit 121 I 1 IPAD86
+bit 120 I 1 PAD87
+bit 119 O 1 PAD87 118 0 Z
+bit 118 C 0 *
+bit 117 I 1 PAD88
+bit 116 O 1 PAD88 115 0 Z
+bit 115 C 0 *
+bit 114 I 1 PAD89
+bit 113 O 1 PAD89 112 0 Z
+bit 112 C 0 *
+bit 111 I 1 IPAD90
+bit 110 I 1 PAD91
+bit 109 O 1 PAD91 108 0 Z
+bit 108 C 0 *
+bit 107 I 1 PAD92
+bit 106 O 1 PAD92 105 0 Z
+bit 105 C 0 *
+bit 104 I 1 PAD93
+bit 103 O 1 PAD93 102 0 Z
+bit 102 C 0 *
+bit 101 I 1 PAD94
+bit 100 O 1 PAD94 99 0 Z
+bit 99 C 0 *
+bit 98 I 1 IPAD95
+bit 97 I 1 PAD96
+bit 96 O 1 PAD96 95 0 Z
+bit 95 C 0 *
+bit 94 I 1 PAD97
+bit 93 O 1 PAD97 92 0 Z
+bit 92 C 0 *
+bit 91 I 1 PAD98
+bit 90 O 1 PAD98 89 0 Z
+bit 89 C 0 *
+bit 88 I 1 PAD99
+bit 87 O 1 PAD99 86 0 Z
+bit 86 C 0 *
+bit 85 I 1 IPAD100
+bit 84 I 1 PAD101
+bit 83 O 1 PAD101 82 0 Z
+bit 82 C 0 *
+bit 81 I 1 PAD102
+bit 80 O 1 PAD102 79 0 Z
+bit 79 C 0 *
+bit 78 I 1 PAD103
+bit 77 O 1 PAD103 76 0 Z
+bit 76 C 0 *
+bit 75 I 1 IPAD104
+bit 74 I 1 PAD105
+bit 73 O 1 PAD105 72 0 Z
+bit 72 C 0 *
+bit 71 I 1 PAD106
+bit 70 O 1 PAD106 69 0 Z
+bit 69 C 0 *
+bit 68 I 1 PAD107
+bit 67 O 1 PAD107 66 0 Z
+bit 66 C 0 *
+bit 65 I 1 PAD108
+bit 64 O 1 PAD108 63 0 Z
+bit 63 C 0 *
+bit 62 I 1 PROG_B
+bit 61 I 1 PAD1
+bit 60 O 1 PAD1 59 0 Z
+bit 59 C 0 *
+bit 58 I 1 PAD2
+bit 57 O 1 PAD2 56 0 Z
+bit 56 C 0 *
+bit 55 I 1 IPAD3
+bit 54 I 1 PAD4
+bit 53 O 1 PAD4 52 0 Z
+bit 52 C 0 *
+bit 51 I 1 PAD5
+bit 50 O 1 PAD5 49 0 Z
+bit 49 C 0 *
+bit 48 I 1 IPAD6
+bit 47 I 1 PAD7
+bit 46 O 1 PAD7 45 0 Z
+bit 45 C 0 *
+bit 44 I 1 PAD8
+bit 43 O 1 PAD8 42 0 Z
+bit 42 C 0 *
+bit 41 I 1 PAD9
+bit 40 O 1 PAD9 39 0 Z
+bit 39 C 0 *
+bit 38 I 1 PAD10
+bit 37 O 1 PAD10 36 0 Z
+bit 36 C 0 *
+bit 35 I 1 PAD11
+bit 34 O 1 PAD11 33 0 Z
+bit 33 C 0 *
+bit 32 I 1 IPAD12
+bit 31 I 1 IPAD13
+bit 30 I 1 PAD14
+bit 29 O 1 PAD14 28 0 Z
+bit 28 C 0 *
+bit 27 I 1 PAD15
+bit 26 O 1 PAD15 25 0 Z
+bit 25 C 0 *
+bit 24 I 1 PAD16
+bit 23 O 1 PAD16 22 0 Z
+bit 22 C 0 *
+bit 21 I 1 PAD17
+bit 20 O 1 PAD17 19 0 Z
+bit 19 C 0 *
+bit 18 I 1 PAD18
+bit 17 O 1 PAD18 16 0 Z
+bit 16 C 0 *
+bit 15 I 1 IPAD19
+bit 14 I 1 IPAD20
+bit 13 I 1 PAD21
+bit 12 O 1 PAD21 11 0 Z
+bit 11 C 0 *
+bit 10 I 1 PAD22
+bit 9 O 1 PAD22 8 0 Z
+bit 8 C 0 *
+bit 7 I 1 IPAD23
+bit 6 I 1 PAD24
+bit 5 O 1 PAD24 4 0 Z
+bit 4 C 0 *
+bit 3 I 1 PAD25
+bit 2 O 1 PAD25 1 0 Z
+bit 1 C 0 *
+bit 0 I 1 IPAD26
--- /dev/null
+signal TCK
+signal TDI
+signal TDO
+signal TMS
+signal PAD38
+signal PAD75
+signal PAD39
+signal PAD76
+signal IPAD41
+signal PAD78
+signal PAD79
+signal IPAD80
+signal IPAD81
+signal IPAD46
+signal IPAD86
+signal IPAD3
+signal IPAD6
+signal PAD40
+signal PROG_B
+signal PAD42
+signal PAD43
+signal PAD44
+signal PAD45
+signal PAD82
+signal PAD47
+signal PAD83
+signal IPAD12
+signal PAD48
+signal PAD84
+signal IPAD13
+signal PAD49
+signal PAD85
+signal IPAD50
+signal PAD87
+signal PAD88
+signal DONE
+signal PAD89
+signal PAD101
+signal IPAD90
+signal IPAD19
+signal PAD102
+signal PAD103
+signal IPAD57
+signal PAD105
+signal IPAD95
+signal PAD106
+signal PAD107
+signal PAD108
+signal IPAD100
+signal IPAD104
+signal PAD10
+signal PAD11
+signal PAD14
+signal PAD51
+signal PAD15
+signal PAD52
+signal PAD16
+signal PAD53
+signal PAD17
+signal PAD54
+signal PAD18
+signal PAD91
+signal PAD55
+signal IPAD20
+signal PAD92
+signal PAD56
+signal PAD93
+signal PAD94
+signal PAD58
+signal IPAD23
+signal PAD59
+signal PAD96
+signal IPAD60
+signal PAD97
+signal PAD1
+signal IPAD26
+signal PAD98
+signal PAD2
+signal IPAD27
+signal PAD99
+signal PAD4
+signal IPAD66
+signal PAD5
+signal IPAD67
+signal PAD7
+signal PAD8
+signal PAD9
+signal PAD21
+signal PAD22
+signal PAD24
+signal PAD61
+signal PAD25
+signal PAD62
+signal PAD63
+signal PAD64
+signal PAD28
+signal PAD65
+signal PAD29
+signal PAD68
+signal IPAD32
+signal PAD69
+signal IPAD36
+signal IPAD73
+signal IPAD74
+signal IPAD77
+signal PAD30
+signal PAD31
+signal PAD33
+signal PAD70
+signal PAD34
+signal PAD71
+signal PAD35
+signal PAD72
+signal PAD37
+signal GND0
+signal GND1
+signal GND2
+signal GND3
+signal GND4
+signal GND5
+signal GND6
+signal GND7
+signal GND8
+signal GND9
+signal GND10
+signal GND11
+signal GND12
+signal GND13
+signal VDD0
+signal VDD1
+signal VDD2
+signal VDD3
+signal VDD4
+signal VDD5
+signal VDD6
+signal VDD7
+signal VDD8
+signal VDD9
+signal VDD10
+signal VDD11
+signal VDD12
+signal VDD13
+signal Vaux0
+signal Vaux1
+signal Vaux2
+
+register BSR 272
+register BR 1
+register DIR 32
+
+instruction length 6
+
+instruction SAMPLE/PRELOAD 100000 BSR
+instruction IDCODE 100100 DIR
+instruction EXTEST 111100 BSR
+instruction BYPASS 111111 BR
+
+bit 271 I 1 IPAD27
+bit 270 I 1 PAD28
+bit 269 O 1 PAD28 268 0 Z
+bit 268 C 0 *
+bit 267 I 1 PAD29
+bit 266 O 1 PAD29 265 0 Z
+bit 265 C 0 *
+bit 264 I 1 PAD30
+bit 263 O 1 PAD30 262 0 Z
+bit 262 C 0 *
+bit 261 I 1 PAD31
+bit 260 O 1 PAD31 259 0 Z
+bit 259 C 0 *
+bit 258 I 1 IPAD32
+bit 257 I 1 PAD33
+bit 256 O 1 PAD33 255 0 Z
+bit 255 C 0 *
+bit 254 I 1 PAD34
+bit 253 O 1 PAD34 252 0 Z
+bit 252 C 0 *
+bit 251 I 1 PAD35
+bit 250 O 1 PAD35 249 0 Z
+bit 249 C 0 *
+bit 248 I 1 IPAD36
+bit 247 I 1 PAD37
+bit 246 O 1 PAD37 245 0 Z
+bit 245 C 0 *
+bit 244 I 1 PAD38
+bit 243 O 1 PAD38 242 0 Z
+bit 242 C 0 *
+bit 241 I 1 PAD39
+bit 240 O 1 PAD39 239 0 Z
+bit 239 C 0 *
+bit 238 I 1 PAD40
+bit 237 O 1 PAD40 236 0 Z
+bit 236 C 0 *
+bit 235 I 1 IPAD41
+bit 234 I 1 PAD42
+bit 233 O 1 PAD42 232 0 Z
+bit 232 C 0 *
+bit 231 I 1 PAD43
+bit 230 O 1 PAD43 229 0 Z
+bit 229 C 0 *
+bit 228 I 1 PAD44
+bit 227 O 1 PAD44 226 0 Z
+bit 226 C 0 *
+bit 225 I 1 PAD45
+bit 224 O 1 PAD45 223 0 Z
+bit 223 C 0 *
+bit 222 I 1 IPAD46
+bit 221 I 1 PAD47
+bit 220 O 1 PAD47 219 0 Z
+bit 219 C 0 *
+bit 218 I 1 PAD48
+bit 217 O 1 PAD48 216 0 Z
+bit 216 C 0 *
+bit 215 I 1 PAD49
+bit 214 O 1 PAD49 213 0 Z
+bit 213 C 0 *
+bit 212 I 1 IPAD50
+bit 211 I 1 PAD51
+bit 210 O 1 PAD51 209 0 Z
+bit 209 C 0 *
+bit 208 I 1 PAD52
+bit 207 O 1 PAD52 206 0 Z
+bit 206 C 0 *
+bit 205 I 1 PAD53
+bit 204 O 1 PAD53 203 0 Z
+bit 203 C 0 *
+bit 202 I 1 PAD54
+bit 201 O 1 PAD54 200 0 Z
+bit 200 C 0 *
+bit 199 I 1 DONE
+bit 198 O 1 *
+bit 197 O 1 *
+bit 196 I 1 PAD55
+bit 195 O 1 PAD55 194 0 Z
+bit 194 C 0 *
+bit 193 I 1 PAD56
+bit 192 O 1 PAD56 191 0 Z
+bit 191 C 0 *
+bit 190 I 1 IPAD57
+bit 189 I 1 PAD58
+bit 188 O 1 PAD58 187 0 Z
+bit 187 C 0 *
+bit 186 I 1 PAD59
+bit 185 O 1 PAD59 184 0 Z
+bit 184 C 0 *
+bit 183 I 1 IPAD60
+bit 182 I 1 PAD61
+bit 181 O 1 PAD61 180 0 Z
+bit 180 C 0 *
+bit 179 I 1 PAD62
+bit 178 O 1 PAD62 177 0 Z
+bit 177 C 0 *
+bit 176 I 1 PAD63
+bit 175 O 1 PAD63 174 0 Z
+bit 174 C 0 *
+bit 173 I 1 PAD64
+bit 172 O 1 PAD64 171 0 Z
+bit 171 C 0 *
+bit 170 I 1 PAD65
+bit 169 O 1 PAD65 168 0 Z
+bit 168 C 0 *
+bit 167 I 1 IPAD66
+bit 166 I 1 IPAD67
+bit 165 I 1 PAD68
+bit 164 O 1 PAD68 163 0 Z
+bit 163 C 0 *
+bit 162 I 1 PAD69
+bit 161 O 1 PAD69 160 0 Z
+bit 160 C 0 *
+bit 159 I 1 PAD70
+bit 158 O 1 PAD70 157 0 Z
+bit 157 C 0 *
+bit 156 I 1 PAD71
+bit 155 O 1 PAD71 154 0 Z
+bit 154 C 0 *
+bit 153 I 1 PAD72
+bit 152 O 1 PAD72 151 0 Z
+bit 151 C 0 *
+bit 150 I 1 IPAD73
+bit 149 I 1 IPAD74
+bit 148 I 1 PAD75
+bit 147 O 1 PAD75 146 0 Z
+bit 146 C 0 *
+bit 145 I 1 PAD76
+bit 144 O 1 PAD76 143 0 Z
+bit 143 C 0 *
+bit 142 I 1 IPAD77
+bit 141 I 1 PAD78
+bit 140 O 1 PAD78 139 0 Z
+bit 139 C 0 *
+bit 138 I 1 PAD79
+bit 137 O 1 PAD79 136 0 Z
+bit 136 C 0 *
+bit 135 I 1 IPAD80
+bit 134 I 1 IPAD81
+bit 133 I 1 PAD82
+bit 132 O 1 PAD82 131 0 Z
+bit 131 C 0 *
+bit 130 I 1 PAD83
+bit 129 O 1 PAD83 128 0 Z
+bit 128 C 0 *
+bit 127 I 1 PAD84
+bit 126 O 1 PAD84 125 0 Z
+bit 125 C 0 *
+bit 124 I 1 PAD85
+bit 123 O 1 PAD85 122 0 Z
+bit 122 C 0 *
+bit 121 I 1 IPAD86
+bit 120 I 1 PAD87
+bit 119 O 1 PAD87 118 0 Z
+bit 118 C 0 *
+bit 117 I 1 PAD88
+bit 116 O 1 PAD88 115 0 Z
+bit 115 C 0 *
+bit 114 I 1 PAD89
+bit 113 O 1 PAD89 112 0 Z
+bit 112 C 0 *
+bit 111 I 1 IPAD90
+bit 110 I 1 PAD91
+bit 109 O 1 PAD91 108 0 Z
+bit 108 C 0 *
+bit 107 I 1 PAD92
+bit 106 O 1 PAD92 105 0 Z
+bit 105 C 0 *
+bit 104 I 1 PAD93
+bit 103 O 1 PAD93 102 0 Z
+bit 102 C 0 *
+bit 101 I 1 PAD94
+bit 100 O 1 PAD94 99 0 Z
+bit 99 C 0 *
+bit 98 I 1 IPAD95
+bit 97 I 1 PAD96
+bit 96 O 1 PAD96 95 0 Z
+bit 95 C 0 *
+bit 94 I 1 PAD97
+bit 93 O 1 PAD97 92 0 Z
+bit 92 C 0 *
+bit 91 I 1 PAD98
+bit 90 O 1 PAD98 89 0 Z
+bit 89 C 0 *
+bit 88 I 1 PAD99
+bit 87 O 1 PAD99 86 0 Z
+bit 86 C 0 *
+bit 85 I 1 IPAD100
+bit 84 I 1 PAD101
+bit 83 O 1 PAD101 82 0 Z
+bit 82 C 0 *
+bit 81 I 1 PAD102
+bit 80 O 1 PAD102 79 0 Z
+bit 79 C 0 *
+bit 78 I 1 PAD103
+bit 77 O 1 PAD103 76 0 Z
+bit 76 C 0 *
+bit 75 I 1 IPAD104
+bit 74 I 1 PAD105
+bit 73 O 1 PAD105 72 0 Z
+bit 72 C 0 *
+bit 71 I 1 PAD106
+bit 70 O 1 PAD106 69 0 Z
+bit 69 C 0 *
+bit 68 I 1 PAD107
+bit 67 O 1 PAD107 66 0 Z
+bit 66 C 0 *
+bit 65 I 1 PAD108
+bit 64 O 1 PAD108 63 0 Z
+bit 63 C 0 *
+bit 62 I 1 PROG_B
+bit 61 I 1 PAD1
+bit 60 O 1 PAD1 59 0 Z
+bit 59 C 0 *
+bit 58 I 1 PAD2
+bit 57 O 1 PAD2 56 0 Z
+bit 56 C 0 *
+bit 55 I 1 IPAD3
+bit 54 I 1 PAD4
+bit 53 O 1 PAD4 52 0 Z
+bit 52 C 0 *
+bit 51 I 1 PAD5
+bit 50 O 1 PAD5 49 0 Z
+bit 49 C 0 *
+bit 48 I 1 IPAD6
+bit 47 I 1 PAD7
+bit 46 O 1 PAD7 45 0 Z
+bit 45 C 0 *
+bit 44 I 1 PAD8
+bit 43 O 1 PAD8 42 0 Z
+bit 42 C 0 *
+bit 41 I 1 PAD9
+bit 40 O 1 PAD9 39 0 Z
+bit 39 C 0 *
+bit 38 I 1 PAD10
+bit 37 O 1 PAD10 36 0 Z
+bit 36 C 0 *
+bit 35 I 1 PAD11
+bit 34 O 1 PAD11 33 0 Z
+bit 33 C 0 *
+bit 32 I 1 IPAD12
+bit 31 I 1 IPAD13
+bit 30 I 1 PAD14
+bit 29 O 1 PAD14 28 0 Z
+bit 28 C 0 *
+bit 27 I 1 PAD15
+bit 26 O 1 PAD15 25 0 Z
+bit 25 C 0 *
+bit 24 I 1 PAD16
+bit 23 O 1 PAD16 22 0 Z
+bit 22 C 0 *
+bit 21 I 1 PAD17
+bit 20 O 1 PAD17 19 0 Z
+bit 19 C 0 *
+bit 18 I 1 PAD18
+bit 17 O 1 PAD18 16 0 Z
+bit 16 C 0 *
+bit 15 I 1 IPAD19
+bit 14 I 1 IPAD20
+bit 13 I 1 PAD21
+bit 12 O 1 PAD21 11 0 Z
+bit 11 C 0 *
+bit 10 I 1 PAD22
+bit 9 O 1 PAD22 8 0 Z
+bit 8 C 0 *
+bit 7 I 1 IPAD23
+bit 6 I 1 PAD24
+bit 5 O 1 PAD24 4 0 Z
+bit 4 C 0 *
+bit 3 I 1 PAD25
+bit 2 O 1 PAD25 1 0 Z
+bit 1 C 0 *
+bit 0 I 1 IPAD26
--- /dev/null
+signal TCK
+signal TDI
+signal TDO
+signal TMS
+signal PAD38
+signal PAD75
+signal PAD39
+signal PAD76
+signal IPAD41
+signal PAD78
+signal PAD79
+signal IPAD80
+signal IPAD81
+signal IPAD46
+signal IPAD86
+signal IPAD3
+signal IPAD6
+signal PAD40
+signal PROG_B
+signal PAD42
+signal PAD43
+signal PAD44
+signal PAD45
+signal PAD82
+signal PAD47
+signal PAD83
+signal IPAD12
+signal PAD48
+signal PAD84
+signal IPAD13
+signal PAD49
+signal PAD85
+signal IPAD50
+signal PAD87
+signal PAD88
+signal DONE
+signal PAD89
+signal PAD101
+signal IPAD90
+signal IPAD19
+signal PAD102
+signal PAD103
+signal IPAD57
+signal PAD105
+signal IPAD95
+signal PAD106
+signal PAD107
+signal PAD108
+signal IPAD100
+signal IPAD104
+signal PAD10
+signal PAD11
+signal PAD14
+signal PAD51
+signal PAD15
+signal PAD52
+signal PAD16
+signal PAD53
+signal PAD17
+signal PAD54
+signal PAD18
+signal PAD91
+signal PAD55
+signal IPAD20
+signal PAD92
+signal PAD56
+signal PAD93
+signal PAD94
+signal PAD58
+signal IPAD23
+signal PAD59
+signal PAD96
+signal IPAD60
+signal PAD97
+signal PAD1
+signal IPAD26
+signal PAD98
+signal PAD2
+signal IPAD27
+signal PAD99
+signal PAD4
+signal IPAD66
+signal PAD5
+signal IPAD67
+signal PAD7
+signal PAD8
+signal PAD9
+signal PAD21
+signal PAD22
+signal PAD24
+signal PAD61
+signal PAD25
+signal PAD62
+signal PAD63
+signal PAD64
+signal PAD28
+signal PAD65
+signal PAD29
+signal PAD68
+signal IPAD32
+signal PAD69
+signal IPAD36
+signal IPAD73
+signal IPAD74
+signal IPAD77
+signal PAD30
+signal PAD31
+signal PAD33
+signal PAD70
+signal PAD34
+signal PAD71
+signal PAD35
+signal PAD72
+signal PAD37
+signal GND0
+signal GND1
+signal GND2
+signal GND3
+signal GND4
+signal GND5
+signal GND6
+signal GND7
+signal GND8
+signal GND9
+signal GND10
+signal GND11
+signal GND12
+signal VDD0
+signal VDD1
+signal VDD2
+signal VDD3
+signal VDD4
+signal VDD5
+signal VDD6
+signal VDD7
+signal VDD8
+signal VDD9
+signal VDD10
+signal VDD11
+signal VDD12
+signal Vaux0
+signal Vaux1
+signal Vaux2
+
+register BSR 272
+register BR 1
+register DIR 32
+
+instruction length 6
+
+instruction SAMPLE/PRELOAD 100000 BSR
+instruction IDCODE 100100 DIR
+instruction EXTEST 111100 BSR
+instruction BYPASS 111111 BR
+
+bit 271 I 1 IPAD27
+bit 270 I 1 PAD28
+bit 269 O 1 PAD28 268 0 Z
+bit 268 C 0 *
+bit 267 I 1 PAD29
+bit 266 O 1 PAD29 265 0 Z
+bit 265 C 0 *
+bit 264 I 1 PAD30
+bit 263 O 1 PAD30 262 0 Z
+bit 262 C 0 *
+bit 261 I 1 PAD31
+bit 260 O 1 PAD31 259 0 Z
+bit 259 C 0 *
+bit 258 I 1 IPAD32
+bit 257 I 1 PAD33
+bit 256 O 1 PAD33 255 0 Z
+bit 255 C 0 *
+bit 254 I 1 PAD34
+bit 253 O 1 PAD34 252 0 Z
+bit 252 C 0 *
+bit 251 I 1 PAD35
+bit 250 O 1 PAD35 249 0 Z
+bit 249 C 0 *
+bit 248 I 1 IPAD36
+bit 247 I 1 PAD37
+bit 246 O 1 PAD37 245 0 Z
+bit 245 C 0 *
+bit 244 I 1 PAD38
+bit 243 O 1 PAD38 242 0 Z
+bit 242 C 0 *
+bit 241 I 1 PAD39
+bit 240 O 1 PAD39 239 0 Z
+bit 239 C 0 *
+bit 238 I 1 PAD40
+bit 237 O 1 PAD40 236 0 Z
+bit 236 C 0 *
+bit 235 I 1 IPAD41
+bit 234 I 1 PAD42
+bit 233 O 1 PAD42 232 0 Z
+bit 232 C 0 *
+bit 231 I 1 PAD43
+bit 230 O 1 PAD43 229 0 Z
+bit 229 C 0 *
+bit 228 I 1 PAD44
+bit 227 O 1 PAD44 226 0 Z
+bit 226 C 0 *
+bit 225 I 1 PAD45
+bit 224 O 1 PAD45 223 0 Z
+bit 223 C 0 *
+bit 222 I 1 IPAD46
+bit 221 I 1 PAD47
+bit 220 O 1 PAD47 219 0 Z
+bit 219 C 0 *
+bit 218 I 1 PAD48
+bit 217 O 1 PAD48 216 0 Z
+bit 216 C 0 *
+bit 215 I 1 PAD49
+bit 214 O 1 PAD49 213 0 Z
+bit 213 C 0 *
+bit 212 I 1 IPAD50
+bit 211 I 1 PAD51
+bit 210 O 1 PAD51 209 0 Z
+bit 209 C 0 *
+bit 208 I 1 PAD52
+bit 207 O 1 PAD52 206 0 Z
+bit 206 C 0 *
+bit 205 I 1 PAD53
+bit 204 O 1 PAD53 203 0 Z
+bit 203 C 0 *
+bit 202 I 1 PAD54
+bit 201 O 1 PAD54 200 0 Z
+bit 200 C 0 *
+bit 199 I 1 DONE
+bit 198 O 1 *
+bit 197 O 1 *
+bit 196 I 1 PAD55
+bit 195 O 1 PAD55 194 0 Z
+bit 194 C 0 *
+bit 193 I 1 PAD56
+bit 192 O 1 PAD56 191 0 Z
+bit 191 C 0 *
+bit 190 I 1 IPAD57
+bit 189 I 1 PAD58
+bit 188 O 1 PAD58 187 0 Z
+bit 187 C 0 *
+bit 186 I 1 PAD59
+bit 185 O 1 PAD59 184 0 Z
+bit 184 C 0 *
+bit 183 I 1 IPAD60
+bit 182 I 1 PAD61
+bit 181 O 1 PAD61 180 0 Z
+bit 180 C 0 *
+bit 179 I 1 PAD62
+bit 178 O 1 PAD62 177 0 Z
+bit 177 C 0 *
+bit 176 I 1 PAD63
+bit 175 O 1 PAD63 174 0 Z
+bit 174 C 0 *
+bit 173 I 1 PAD64
+bit 172 O 1 PAD64 171 0 Z
+bit 171 C 0 *
+bit 170 I 1 PAD65
+bit 169 O 1 PAD65 168 0 Z
+bit 168 C 0 *
+bit 167 I 1 IPAD66
+bit 166 I 1 IPAD67
+bit 165 I 1 PAD68
+bit 164 O 1 PAD68 163 0 Z
+bit 163 C 0 *
+bit 162 I 1 PAD69
+bit 161 O 1 PAD69 160 0 Z
+bit 160 C 0 *
+bit 159 I 1 PAD70
+bit 158 O 1 PAD70 157 0 Z
+bit 157 C 0 *
+bit 156 I 1 PAD71
+bit 155 O 1 PAD71 154 0 Z
+bit 154 C 0 *
+bit 153 I 1 PAD72
+bit 152 O 1 PAD72 151 0 Z
+bit 151 C 0 *
+bit 150 I 1 IPAD73
+bit 149 I 1 IPAD74
+bit 148 I 1 PAD75
+bit 147 O 1 PAD75 146 0 Z
+bit 146 C 0 *
+bit 145 I 1 PAD76
+bit 144 O 1 PAD76 143 0 Z
+bit 143 C 0 *
+bit 142 I 1 IPAD77
+bit 141 I 1 PAD78
+bit 140 O 1 PAD78 139 0 Z
+bit 139 C 0 *
+bit 138 I 1 PAD79
+bit 137 O 1 PAD79 136 0 Z
+bit 136 C 0 *
+bit 135 I 1 IPAD80
+bit 134 I 1 IPAD81
+bit 133 I 1 PAD82
+bit 132 O 1 PAD82 131 0 Z
+bit 131 C 0 *
+bit 130 I 1 PAD83
+bit 129 O 1 PAD83 128 0 Z
+bit 128 C 0 *
+bit 127 I 1 PAD84
+bit 126 O 1 PAD84 125 0 Z
+bit 125 C 0 *
+bit 124 I 1 PAD85
+bit 123 O 1 PAD85 122 0 Z
+bit 122 C 0 *
+bit 121 I 1 IPAD86
+bit 120 I 1 PAD87
+bit 119 O 1 PAD87 118 0 Z
+bit 118 C 0 *
+bit 117 I 1 PAD88
+bit 116 O 1 PAD88 115 0 Z
+bit 115 C 0 *
+bit 114 I 1 PAD89
+bit 113 O 1 PAD89 112 0 Z
+bit 112 C 0 *
+bit 111 I 1 IPAD90
+bit 110 I 1 PAD91
+bit 109 O 1 PAD91 108 0 Z
+bit 108 C 0 *
+bit 107 I 1 PAD92
+bit 106 O 1 PAD92 105 0 Z
+bit 105 C 0 *
+bit 104 I 1 PAD93
+bit 103 O 1 PAD93 102 0 Z
+bit 102 C 0 *
+bit 101 I 1 PAD94
+bit 100 O 1 PAD94 99 0 Z
+bit 99 C 0 *
+bit 98 I 1 IPAD95
+bit 97 I 1 PAD96
+bit 96 O 1 PAD96 95 0 Z
+bit 95 C 0 *
+bit 94 I 1 PAD97
+bit 93 O 1 PAD97 92 0 Z
+bit 92 C 0 *
+bit 91 I 1 PAD98
+bit 90 O 1 PAD98 89 0 Z
+bit 89 C 0 *
+bit 88 I 1 PAD99
+bit 87 O 1 PAD99 86 0 Z
+bit 86 C 0 *
+bit 85 I 1 IPAD100
+bit 84 I 1 PAD101
+bit 83 O 1 PAD101 82 0 Z
+bit 82 C 0 *
+bit 81 I 1 PAD102
+bit 80 O 1 PAD102 79 0 Z
+bit 79 C 0 *
+bit 78 I 1 PAD103
+bit 77 O 1 PAD103 76 0 Z
+bit 76 C 0 *
+bit 75 I 1 IPAD104
+bit 74 I 1 PAD105
+bit 73 O 1 PAD105 72 0 Z
+bit 72 C 0 *
+bit 71 I 1 PAD106
+bit 70 O 1 PAD106 69 0 Z
+bit 69 C 0 *
+bit 68 I 1 PAD107
+bit 67 O 1 PAD107 66 0 Z
+bit 66 C 0 *
+bit 65 I 1 PAD108
+bit 64 O 1 PAD108 63 0 Z
+bit 63 C 0 *
+bit 62 I 1 PROG_B
+bit 61 I 1 PAD1
+bit 60 O 1 PAD1 59 0 Z
+bit 59 C 0 *
+bit 58 I 1 PAD2
+bit 57 O 1 PAD2 56 0 Z
+bit 56 C 0 *
+bit 55 I 1 IPAD3
+bit 54 I 1 PAD4
+bit 53 O 1 PAD4 52 0 Z
+bit 52 C 0 *
+bit 51 I 1 PAD5
+bit 50 O 1 PAD5 49 0 Z
+bit 49 C 0 *
+bit 48 I 1 IPAD6
+bit 47 I 1 PAD7
+bit 46 O 1 PAD7 45 0 Z
+bit 45 C 0 *
+bit 44 I 1 PAD8
+bit 43 O 1 PAD8 42 0 Z
+bit 42 C 0 *
+bit 41 I 1 PAD9
+bit 40 O 1 PAD9 39 0 Z
+bit 39 C 0 *
+bit 38 I 1 PAD10
+bit 37 O 1 PAD10 36 0 Z
+bit 36 C 0 *
+bit 35 I 1 PAD11
+bit 34 O 1 PAD11 33 0 Z
+bit 33 C 0 *
+bit 32 I 1 IPAD12
+bit 31 I 1 IPAD13
+bit 30 I 1 PAD14
+bit 29 O 1 PAD14 28 0 Z
+bit 28 C 0 *
+bit 27 I 1 PAD15
+bit 26 O 1 PAD15 25 0 Z
+bit 25 C 0 *
+bit 24 I 1 PAD16
+bit 23 O 1 PAD16 22 0 Z
+bit 22 C 0 *
+bit 21 I 1 PAD17
+bit 20 O 1 PAD17 19 0 Z
+bit 19 C 0 *
+bit 18 I 1 PAD18
+bit 17 O 1 PAD18 16 0 Z
+bit 16 C 0 *
+bit 15 I 1 IPAD19
+bit 14 I 1 IPAD20
+bit 13 I 1 PAD21
+bit 12 O 1 PAD21 11 0 Z
+bit 11 C 0 *
+bit 10 I 1 PAD22
+bit 9 O 1 PAD22 8 0 Z
+bit 8 C 0 *
+bit 7 I 1 IPAD23
+bit 6 I 1 PAD24
+bit 5 O 1 PAD24 4 0 Z
+bit 4 C 0 *
+bit 3 I 1 PAD25
+bit 2 O 1 PAD25 1 0 Z
+bit 1 C 0 *
+bit 0 I 1 IPAD26
--- /dev/null
+signal TCK
+signal TDI
+signal TDO
+signal TMS
+signal PAD56
+signal PAD92
+signal PAD38
+signal PAD93
+signal PAD75
+signal PAD39
+signal PAD58
+signal PAD94
+signal PAD76
+signal PAD59
+signal PAD96
+signal PAD78
+signal PAD97
+signal PAD79
+signal PAD98
+signal PAD1
+signal PAD99
+signal PAD2
+signal IPAD66
+signal IPAD67
+signal PAD7
+signal PAD8
+signal PAD9
+signal PROG_B
+signal PAD40
+signal PAD24
+signal PAD42
+signal PAD25
+signal PAD61
+signal PAD43
+signal PAD62
+signal PAD44
+signal PAD63
+signal PAD45
+signal PAD64
+signal PAD82
+signal PAD65
+signal PAD83
+signal PAD48
+signal IPAD12
+signal PAD49
+signal IPAD13
+signal PAD68
+signal PAD69
+signal DONE
+signal IPAD36
+signal IPAD73
+signal PAD105
+signal PAD106
+signal IPAD95
+signal PAD107
+signal PAD108
+signal PAD10
+signal PAD11
+signal PAD14
+signal PAD15
+signal PAD34
+signal PAD70
+signal PAD35
+signal PAD71
+signal PAD53
+signal PAD17
+signal PAD72
+signal PAD54
+signal PAD18
+signal PAD37
+signal PAD55
+signal PAD91
+signal GND0
+signal GND1
+signal GND2
+signal GND3
+signal GND4
+signal GND5
+signal GND6
+signal GND7
+signal GND8
+signal GND9
+signal GND10
+signal GND11
+signal VDD0
+signal VDD1
+signal VDD2
+signal VDD3
+signal VDD4
+signal VDD5
+signal VDD6
+signal VDD7
+signal VDD8
+signal VDD9
+signal VDD10
+signal VDD11
+signal Vaux0
+signal Vaux1
+signal Vaux2
+
+register BSR 272
+register BR 1
+register DIR 32
+
+instruction length 6
+
+instruction SAMPLE/PRELOAD 100000 BSR
+instruction IDCODE 100100 DIR
+instruction EXTEST 111100 BSR
+instruction BYPASS 111111 BR
+
+bit 271 O 1 *
+bit 270 O 1 *
+bit 269 O 1 *
+bit 268 O 1 *
+bit 267 O 1 *
+bit 266 O 1 *
+bit 265 O 1 *
+bit 264 O 1 *
+bit 263 O 1 *
+bit 262 O 1 *
+bit 261 O 1 *
+bit 260 O 1 *
+bit 259 O 1 *
+bit 258 O 1 *
+bit 257 O 1 *
+bit 256 O 1 *
+bit 255 O 1 *
+bit 254 I 1 PAD34
+bit 253 O 1 PAD34 252 0 Z
+bit 252 C 0 *
+bit 251 I 1 PAD35
+bit 250 O 1 PAD35 249 0 Z
+bit 249 C 0 *
+bit 248 I 1 IPAD36
+bit 247 I 1 PAD37
+bit 246 O 1 PAD37 245 0 Z
+bit 245 C 0 *
+bit 244 I 1 PAD38
+bit 243 O 1 PAD38 242 0 Z
+bit 242 C 0 *
+bit 241 I 1 PAD39
+bit 240 O 1 PAD39 239 0 Z
+bit 239 C 0 *
+bit 238 I 1 PAD40
+bit 237 O 1 PAD40 236 0 Z
+bit 236 C 0 *
+bit 235 O 1 *
+bit 234 I 1 PAD42
+bit 233 O 1 PAD42 232 0 Z
+bit 232 C 0 *
+bit 231 I 1 PAD43
+bit 230 O 1 PAD43 229 0 Z
+bit 229 C 0 *
+bit 228 I 1 PAD44
+bit 227 O 1 PAD44 226 0 Z
+bit 226 C 0 *
+bit 225 I 1 PAD45
+bit 224 O 1 PAD45 223 0 Z
+bit 223 C 0 *
+bit 222 O 1 *
+bit 221 O 1 *
+bit 220 O 1 *
+bit 219 O 1 *
+bit 218 I 1 PAD48
+bit 217 O 1 PAD48 216 0 Z
+bit 216 C 0 *
+bit 215 I 1 PAD49
+bit 214 O 1 PAD49 213 0 Z
+bit 213 C 0 *
+bit 212 O 1 *
+bit 211 O 1 *
+bit 210 O 1 *
+bit 209 O 1 *
+bit 208 O 1 *
+bit 207 O 1 *
+bit 206 O 1 *
+bit 205 I 1 PAD53
+bit 204 O 1 PAD53 203 0 Z
+bit 203 C 0 *
+bit 202 I 1 PAD54
+bit 201 O 1 PAD54 200 0 Z
+bit 200 C 0 *
+bit 199 I 1 DONE
+bit 198 O 1 *
+bit 197 O 1 *
+bit 196 I 1 PAD55
+bit 195 O 1 PAD55 194 0 Z
+bit 194 C 0 *
+bit 193 I 1 PAD56
+bit 192 O 1 PAD56 191 0 Z
+bit 191 C 0 *
+bit 190 O 1 *
+bit 189 I 1 PAD58
+bit 188 O 1 PAD58 187 0 Z
+bit 187 C 0 *
+bit 186 I 1 PAD59
+bit 185 O 1 PAD59 184 0 Z
+bit 184 C 0 *
+bit 183 O 1 *
+bit 182 I 1 PAD61
+bit 181 O 1 PAD61 180 0 Z
+bit 180 C 0 *
+bit 179 I 1 PAD62
+bit 178 O 1 PAD62 177 0 Z
+bit 177 C 0 *
+bit 176 I 1 PAD63
+bit 175 O 1 PAD63 174 0 Z
+bit 174 C 0 *
+bit 173 I 1 PAD64
+bit 172 O 1 PAD64 171 0 Z
+bit 171 C 0 *
+bit 170 I 1 PAD65
+bit 169 O 1 PAD65 168 0 Z
+bit 168 C 0 *
+bit 167 I 1 IPAD66
+bit 166 I 1 IPAD67
+bit 165 I 1 PAD68
+bit 164 O 1 PAD68 163 0 Z
+bit 163 C 0 *
+bit 162 I 1 PAD69
+bit 161 O 1 PAD69 160 0 Z
+bit 160 C 0 *
+bit 159 I 1 PAD70
+bit 158 O 1 PAD70 157 0 Z
+bit 157 C 0 *
+bit 156 I 1 PAD71
+bit 155 O 1 PAD71 154 0 Z
+bit 154 C 0 *
+bit 153 I 1 PAD72
+bit 152 O 1 PAD72 151 0 Z
+bit 151 C 0 *
+bit 150 I 1 IPAD73
+bit 149 O 1 *
+bit 148 I 1 PAD75
+bit 147 O 1 PAD75 146 0 Z
+bit 146 C 0 *
+bit 145 I 1 PAD76
+bit 144 O 1 PAD76 143 0 Z
+bit 143 C 0 *
+bit 142 O 1 *
+bit 141 I 1 PAD78
+bit 140 O 1 PAD78 139 0 Z
+bit 139 C 0 *
+bit 138 I 1 PAD79
+bit 137 O 1 PAD79 136 0 Z
+bit 136 C 0 *
+bit 135 O 1 *
+bit 134 O 1 *
+bit 133 I 1 PAD82
+bit 132 O 1 PAD82 131 0 Z
+bit 131 C 0 *
+bit 130 I 1 PAD83
+bit 129 O 1 PAD83 128 0 Z
+bit 128 C 0 *
+bit 127 O 1 *
+bit 126 O 1 *
+bit 125 O 1 *
+bit 124 O 1 *
+bit 123 O 1 *
+bit 122 O 1 *
+bit 121 O 1 *
+bit 120 O 1 *
+bit 119 O 1 *
+bit 118 O 1 *
+bit 117 O 1 *
+bit 116 O 1 *
+bit 115 O 1 *
+bit 114 O 1 *
+bit 113 O 1 *
+bit 112 O 1 *
+bit 111 O 1 *
+bit 110 I 1 PAD91
+bit 109 O 1 PAD91 108 0 Z
+bit 108 C 0 *
+bit 107 I 1 PAD92
+bit 106 O 1 PAD92 105 0 Z
+bit 105 C 0 *
+bit 104 I 1 PAD93
+bit 103 O 1 PAD93 102 0 Z
+bit 102 C 0 *
+bit 101 I 1 PAD94
+bit 100 O 1 PAD94 99 0 Z
+bit 99 C 0 *
+bit 98 I 1 IPAD95
+bit 97 I 1 PAD96
+bit 96 O 1 PAD96 95 0 Z
+bit 95 C 0 *
+bit 94 I 1 PAD97
+bit 93 O 1 PAD97 92 0 Z
+bit 92 C 0 *
+bit 91 I 1 PAD98
+bit 90 O 1 PAD98 89 0 Z
+bit 89 C 0 *
+bit 88 I 1 PAD99
+bit 87 O 1 PAD99 86 0 Z
+bit 86 C 0 *
+bit 85 O 1 *
+bit 84 O 1 *
+bit 83 O 1 *
+bit 82 O 1 *
+bit 81 O 1 *
+bit 80 O 1 *
+bit 79 O 1 *
+bit 78 O 1 *
+bit 77 O 1 *
+bit 76 O 1 *
+bit 75 O 1 *
+bit 74 I 1 PAD105
+bit 73 O 1 PAD105 72 0 Z
+bit 72 C 0 *
+bit 71 I 1 PAD106
+bit 70 O 1 PAD106 69 0 Z
+bit 69 C 0 *
+bit 68 I 1 PAD107
+bit 67 O 1 PAD107 66 0 Z
+bit 66 C 0 *
+bit 65 I 1 PAD108
+bit 64 O 1 PAD108 63 0 Z
+bit 63 C 0 *
+bit 62 I 1 PROG_B
+bit 61 I 1 PAD1
+bit 60 O 1 PAD1 59 0 Z
+bit 59 C 0 *
+bit 58 I 1 PAD2
+bit 57 O 1 PAD2 56 0 Z
+bit 56 C 0 *
+bit 55 O 1 *
+bit 54 O 1 *
+bit 53 O 1 *
+bit 52 O 1 *
+bit 51 O 1 *
+bit 50 O 1 *
+bit 49 O 1 *
+bit 48 O 1 *
+bit 47 I 1 PAD7
+bit 46 O 1 PAD7 45 0 Z
+bit 45 C 0 *
+bit 44 I 1 PAD8
+bit 43 O 1 PAD8 42 0 Z
+bit 42 C 0 *
+bit 41 I 1 PAD9
+bit 40 O 1 PAD9 39 0 Z
+bit 39 C 0 *
+bit 38 I 1 PAD10
+bit 37 O 1 PAD10 36 0 Z
+bit 36 C 0 *
+bit 35 I 1 PAD11
+bit 34 O 1 PAD11 33 0 Z
+bit 33 C 0 *
+bit 32 I 1 IPAD12
+bit 31 I 1 IPAD13
+bit 30 I 1 PAD14
+bit 29 O 1 PAD14 28 0 Z
+bit 28 C 0 *
+bit 27 I 1 PAD15
+bit 26 O 1 PAD15 25 0 Z
+bit 25 C 0 *
+bit 24 O 1 *
+bit 23 O 1 *
+bit 22 O 1 *
+bit 21 I 1 PAD17
+bit 20 O 1 PAD17 19 0 Z
+bit 19 C 0 *
+bit 18 I 1 PAD18
+bit 17 O 1 PAD18 16 0 Z
+bit 16 C 0 *
+bit 15 O 1 *
+bit 14 O 1 *
+bit 13 O 1 *
+bit 12 O 1 *
+bit 11 O 1 *
+bit 10 O 1 *
+bit 9 O 1 *
+bit 8 O 1 *
+bit 7 O 1 *
+bit 6 I 1 PAD24
+bit 5 O 1 PAD24 4 0 Z
+bit 4 C 0 *
+bit 3 I 1 PAD25
+bit 2 O 1 PAD25 1 0 Z
+bit 1 C 0 *
+bit 0 O 1 *
--- /dev/null
+0000 xc3s1500 0
--- /dev/null
+signal GND1
+signal GND2
+signal GND3
+signal GND4
+signal GND5
+signal GND6
+signal GND7
+signal GND8
+signal GND9
+signal GND10
+signal GND11
+signal GND12
+signal GND13
+signal GND14
+signal GND15
+signal GND16
+signal GND17
+signal GND18
+signal GND19
+signal GND20
+signal GND21
+signal GND22
+signal GND23
+signal GND24
+signal GND25
+signal GND26
+signal GND27
+signal GND28
+signal GND29
+signal GND30
+signal GND31
+signal GND32
+signal GND33
+signal GND34
+signal GND35
+signal GND36
+signal GND37
+signal GND38
+signal GND39
+signal GND40
+signal GND41
+signal GND42
+signal GND43
+signal GND44
+signal GND45
+signal GND46
+signal GND47
+signal GND48
+signal GND49
+signal GND50
+signal GND51
+signal GND52
+signal GND53
+signal GND54
+signal GND55
+signal GND56
+signal GND57
+signal GND58
+signal GND59
+signal GND60
+signal GND61
+signal GND62
+signal GND63
+signal GND64
+signal GND65
+signal GND66
+signal GND67
+signal GND68
+signal GND69
+signal GND70
+signal GND71
+signal GND72
+signal GND73
+signal GND74
+signal GND75
+signal GND76
+signal GND77
+signal GND78
+signal GND79
+signal GND80
+signal GND81
+signal GND82
+signal GND83
+signal GND84
+signal GND85
+signal CCLK_PAD458
+signal DONE_PAD457
+signal HSWAP_EN_PAD96
+signal M0_PAD267
+signal M1_PAD266
+signal M2_PAD268
+signal PROG_B
+signal TCK
+signal TDI
+signal TDO
+signal TMS
+signal VCCAUX1
+signal VCCAUX2
+signal VCCAUX3
+signal VCCAUX4
+signal VCCAUX5
+signal VCCAUX6
+signal VCCAUX7
+signal VCCAUX8
+signal VCCAUX9
+signal VCCAUX10
+signal VCCAUX11
+signal VCCAUX12
+signal VCCAUX13
+signal VCCAUX14
+signal VCCAUX15
+signal VCCAUX16
+signal VCCAUX17
+signal VCCAUX18
+signal VCCAUX19
+signal VCCAUX20
+signal VCCAUX21
+signal VCCAUX22
+signal VCCAUX23
+signal VCCAUX24
+signal VCCINT1
+signal VCCINT2
+signal VCCINT3
+signal VCCINT4
+signal VCCINT5
+signal VCCINT6
+signal VCCINT7
+signal VCCINT8
+signal VCCINT9
+signal VCCINT10
+signal VCCINT11
+signal VCCINT12
+signal VCCINT13
+signal VCCINT14
+signal VCCINT15
+signal VCCINT16
+signal VCCINT17
+signal VCCINT18
+signal VCCINT19
+signal VCCINT20
+signal VCCINT21
+signal VCCINT22
+signal VCCINT23
+signal VCCINT24
+signal VCCO01
+signal VCCO02
+signal VCCO03
+signal VCCO04
+signal VCCO05
+signal VCCO06
+signal VCCO07
+signal VCCO08
+signal VCCO09
+signal VCCO010
+signal VCCO11
+signal VCCO12
+signal VCCO13
+signal VCCO14
+signal VCCO15
+signal VCCO16
+signal VCCO17
+signal VCCO18
+signal VCCO19
+signal VCCO110
+signal VCCO21
+signal VCCO22
+signal VCCO23
+signal VCCO24
+signal VCCO25
+signal VCCO26
+signal VCCO27
+signal VCCO31
+signal VCCO32
+signal VCCO33
+signal VCCO34
+signal VCCO35
+signal VCCO36
+signal VCCO37
+signal VCCO41
+signal VCCO42
+signal VCCO43
+signal VCCO44
+signal VCCO45
+signal VCCO46
+signal VCCO47
+signal VCCO48
+signal VCCO49
+signal VCCO410
+signal VCCO51
+signal VCCO52
+signal VCCO53
+signal VCCO54
+signal VCCO55
+signal VCCO56
+signal VCCO57
+signal VCCO58
+signal VCCO59
+signal VCCO510
+signal VCCO61
+signal VCCO62
+signal VCCO63
+signal VCCO64
+signal VCCO65
+signal VCCO66
+signal VCCO67
+signal VCCO71
+signal VCCO72
+signal VCCO73
+signal VCCO74
+signal VCCO75
+signal VCCO76
+signal VCCO77
+signal IO_PAD2
+signal IO_PAD3
+signal IO_PAD4
+signal IO_PAD6
+signal IO_PAD8
+signal IO_PAD9
+signal IO_PAD10
+signal IO_PAD12
+signal IO_PAD13
+signal IO_PAD14
+signal IO_PAD16
+signal IO_PAD18
+signal IO_PAD20
+signal IO_PAD22
+signal IO_PAD23
+signal IO_PAD24
+signal IO_PAD25
+signal IO_PAD26
+signal IO_PAD28
+signal IO_PAD30
+signal IO_PAD31
+signal IO_PAD32
+signal IO_PAD33
+signal IO_PAD34
+signal IO_PAD35
+signal IO_PAD36
+signal IO_PAD38
+signal IO_PAD40
+signal IO_PAD42
+signal IO_PAD44
+signal IO_PAD46
+signal IO_PAD48
+signal IO_PAD49
+signal IO_PAD50
+signal IO_PAD51
+signal IO_PAD52
+signal IO_PAD54
+signal IO_PAD56
+signal IO_PAD57
+signal IO_PAD58
+signal IO_PAD60
+signal IO_PAD61
+signal IO_PAD62
+signal IO_PAD64
+signal IO_PAD65
+signal IO_PAD66
+signal IO_PAD68
+signal IO_PAD70
+signal IO_PAD72
+signal IO_PAD74
+signal IO_PAD75
+signal IO_PAD76
+signal IO_PAD77
+signal IO_PAD78
+signal IO_PAD80
+signal IO_PAD82
+signal IO_PAD83
+signal IO_PAD84
+signal IO_PAD85
+signal IO_PAD86
+signal IO_PAD88
+signal IO_PAD89
+signal IO_PAD93
+signal IO_PAD94
+signal IO_PAD95
+signal IO_PAD100
+signal IO_PAD101
+signal IO_PAD102
+signal IO_PAD103
+signal IO_PAD104
+signal IO_PAD105
+signal IO_PAD106
+signal IO_PAD108
+signal IO_PAD109
+signal IO_PAD110
+signal IO_PAD111
+signal IO_PAD112
+signal IO_PAD114
+signal IO_PAD116
+signal IO_PAD118
+signal IO_PAD120
+signal IO_PAD121
+signal IO_PAD122
+signal IO_PAD124
+signal IO_PAD125
+signal IO_PAD126
+signal IO_PAD128
+signal IO_PAD129
+signal IO_PAD130
+signal IO_PAD132
+signal IO_PAD134
+signal IO_PAD135
+signal IO_PAD136
+signal IO_PAD137
+signal IO_PAD138
+signal IO_PAD140
+signal IO_PAD142
+signal IO_PAD144
+signal IO_PAD146
+signal IO_PAD147
+signal IO_PAD148
+signal IO_PAD150
+signal IO_PAD152
+signal IO_PAD153
+signal IO_PAD154
+signal IO_PAD155
+signal IO_PAD156
+signal IO_PAD157
+signal IO_PAD158
+signal IO_PAD159
+signal IO_PAD160
+signal IO_PAD161
+signal IO_PAD162
+signal IO_PAD163
+signal IO_PAD164
+signal IO_PAD166
+signal IO_PAD168
+signal IO_PAD170
+signal IO_PAD172
+signal IO_PAD174
+signal IO_PAD175
+signal IO_PAD176
+signal IO_PAD178
+signal IO_PAD180
+signal IO_PAD181
+signal IO_PAD183
+signal IO_PAD184
+signal IO_PAD186
+signal IO_PAD188
+signal IO_PAD189
+signal IO_PAD190
+signal IO_PAD192
+signal IO_PAD194
+signal IO_PAD196
+signal IO_PAD198
+signal IO_PAD200
+signal IO_PAD201
+signal IO_PAD202
+signal IO_PAD203
+signal IO_PAD204
+signal IO_PAD205
+signal IO_PAD206
+signal IO_PAD207
+signal IO_PAD208
+signal IO_PAD209
+signal IO_PAD210
+signal IO_PAD211
+signal IO_PAD212
+signal IO_PAD214
+signal IO_PAD216
+signal IO_PAD217
+signal IO_PAD218
+signal IO_PAD220
+signal IO_PAD222
+signal IO_PAD224
+signal IO_PAD226
+signal IO_PAD227
+signal IO_PAD228
+signal IO_PAD229
+signal IO_PAD230
+signal IO_PAD232
+signal IO_PAD234
+signal IO_PAD235
+signal IO_PAD236
+signal IO_PAD238
+signal IO_PAD239
+signal IO_PAD240
+signal IO_PAD242
+signal IO_PAD243
+signal IO_PAD244
+signal IO_PAD246
+signal IO_PAD248
+signal IO_PAD250
+signal IO_PAD252
+signal IO_PAD253
+signal IO_PAD254
+signal IO_PAD255
+signal IO_PAD256
+signal IO_PAD258
+signal IO_PAD259
+signal IO_PAD260
+signal IO_PAD261
+signal IO_PAD262
+signal IO_PAD263
+signal IO_PAD264
+signal IO_PAD269
+signal IO_PAD270
+signal IO_PAD274
+signal IO_PAD275
+signal IO_PAD276
+signal IO_PAD278
+signal IO_PAD279
+signal IO_PAD280
+signal IO_PAD281
+signal IO_PAD282
+signal IO_PAD284
+signal IO_PAD286
+signal IO_PAD287
+signal IO_PAD288
+signal IO_PAD289
+signal IO_PAD290
+signal IO_PAD292
+signal IO_PAD294
+signal IO_PAD296
+signal IO_PAD298
+signal IO_PAD299
+signal IO_PAD300
+signal IO_PAD302
+signal IO_PAD303
+signal IO_PAD304
+signal IO_PAD306
+signal IO_PAD307
+signal IO_PAD308
+signal IO_PAD310
+signal IO_PAD312
+signal IO_PAD313
+signal IO_PAD314
+signal IO_PAD315
+signal IO_PAD316
+signal IO_PAD318
+signal IO_PAD320
+signal IO_PAD322
+signal IO_PAD324
+signal IO_PAD326
+signal IO_PAD328
+signal IO_PAD329
+signal IO_PAD330
+signal IO_PAD331
+signal IO_PAD332
+signal IO_PAD333
+signal IO_PAD334
+signal IO_PAD336
+signal IO_PAD338
+signal IO_PAD339
+signal IO_PAD340
+signal IO_PAD341
+signal IO_PAD342
+signal IO_PAD344
+signal IO_PAD346
+signal IO_PAD348
+signal IO_PAD350
+signal IO_PAD351
+signal IO_PAD352
+signal IO_PAD354
+signal IO_PAD355
+signal IO_PAD356
+signal IO_PAD358
+signal IO_PAD360
+signal IO_PAD361
+signal IO_PAD362
+signal IO_PAD364
+signal IO_PAD365
+signal IO_PAD366
+signal IO_PAD368
+signal IO_PAD370
+signal IO_PAD371
+signal IO_PAD372
+signal IO_PAD374
+signal IO_PAD375
+signal IO_PAD376
+signal IO_PAD378
+signal IO_PAD380
+signal IO_PAD382
+signal IO_PAD384
+signal IO_PAD385
+signal IO_PAD386
+signal IO_PAD387
+signal IO_PAD388
+signal IO_PAD390
+signal IO_PAD392
+signal IO_PAD393
+signal IO_PAD394
+signal IO_PAD395
+signal IO_PAD396
+signal IO_PAD397
+signal IO_PAD398
+signal IO_PAD400
+signal IO_PAD402
+signal IO_PAD404
+signal IO_PAD406
+signal IO_PAD408
+signal IO_PAD410
+signal IO_PAD411
+signal IO_PAD412
+signal IO_PAD413
+signal IO_PAD414
+signal IO_PAD416
+signal IO_PAD418
+signal IO_PAD419
+signal IO_PAD420
+signal IO_PAD422
+signal IO_PAD423
+signal IO_PAD424
+signal IO_PAD426
+signal IO_PAD427
+signal IO_PAD428
+signal IO_PAD430
+signal IO_PAD432
+signal IO_PAD434
+signal IO_PAD436
+signal IO_PAD437
+signal IO_PAD438
+signal IO_PAD439
+signal IO_PAD440
+signal IO_PAD442
+signal IO_PAD444
+signal IO_PAD445
+signal IO_PAD446
+signal IO_PAD447
+signal IO_PAD448
+signal IO_PAD450
+signal IO_PAD451
+signal IO_PAD454
+signal IO_PAD455
+signal IO_PAD456
+signal IO_PAD461
+signal IO_PAD462
+signal IO_PAD463
+signal IO_PAD464
+signal IO_PAD465
+signal IO_PAD466
+signal IO_PAD467
+signal IO_PAD469
+signal IO_PAD470
+signal IO_PAD471
+signal IO_PAD472
+signal IO_PAD473
+signal IO_PAD475
+signal IO_PAD477
+signal IO_PAD479
+signal IO_PAD481
+signal IO_PAD482
+signal IO_PAD483
+signal IO_PAD485
+signal IO_PAD486
+signal IO_PAD487
+signal IO_PAD489
+signal IO_PAD490
+signal IO_PAD491
+signal IO_PAD493
+signal IO_PAD495
+signal IO_PAD496
+signal IO_PAD497
+signal IO_PAD498
+signal IO_PAD499
+signal IO_PAD501
+signal IO_PAD503
+signal IO_PAD505
+signal IO_PAD507
+signal IO_PAD508
+signal IO_PAD509
+signal IO_PAD511
+signal IO_PAD513
+signal IO_PAD514
+signal IO_PAD515
+signal IO_PAD516
+signal IO_PAD517
+signal IO_PAD518
+signal IO_PAD519
+signal IO_PAD520
+signal IO_PAD521
+signal IO_PAD522
+signal IO_PAD523
+signal IO_PAD524
+signal IO_PAD525
+signal IO_PAD527
+signal IO_PAD529
+signal IO_PAD531
+signal IO_PAD533
+signal IO_PAD535
+signal IO_PAD536
+signal IO_PAD537
+signal IO_PAD539
+signal IO_PAD541
+signal IO_PAD542
+signal IO_PAD544
+signal IO_PAD545
+signal IO_PAD547
+signal IO_PAD549
+signal IO_PAD550
+signal IO_PAD551
+signal IO_PAD553
+signal IO_PAD555
+signal IO_PAD557
+signal IO_PAD559
+signal IO_PAD561
+signal IO_PAD562
+signal IO_PAD563
+signal IO_PAD564
+signal IO_PAD565
+signal IO_PAD566
+signal IO_PAD567
+signal IO_PAD568
+signal IO_PAD569
+signal IO_PAD570
+signal IO_PAD571
+signal IO_PAD572
+signal IO_PAD573
+signal IO_PAD575
+signal IO_PAD577
+signal IO_PAD578
+signal IO_PAD579
+signal IO_PAD581
+signal IO_PAD583
+signal IO_PAD585
+signal IO_PAD587
+signal IO_PAD588
+signal IO_PAD589
+signal IO_PAD590
+signal IO_PAD591
+signal IO_PAD593
+signal IO_PAD595
+signal IO_PAD596
+signal IO_PAD597
+signal IO_PAD599
+signal IO_PAD600
+signal IO_PAD601
+signal IO_PAD603
+signal IO_PAD604
+signal IO_PAD605
+signal IO_PAD607
+signal IO_PAD609
+signal IO_PAD611
+signal IO_PAD613
+signal IO_PAD614
+signal IO_PAD615
+signal IO_PAD616
+signal IO_PAD617
+signal IO_PAD619
+signal IO_PAD620
+signal IO_PAD621
+signal IO_PAD622
+signal IO_PAD623
+signal IO_PAD624
+signal IO_PAD625
+signal IO_PAD630
+signal IO_PAD631
+signal IO_PAD633
+signal IO_PAD634
+signal IO_PAD635
+signal IO_PAD637
+signal IO_PAD638
+signal IO_PAD639
+signal IO_PAD640
+signal IO_PAD641
+signal IO_PAD643
+signal IO_PAD645
+signal IO_PAD646
+signal IO_PAD647
+signal IO_PAD648
+signal IO_PAD649
+signal IO_PAD651
+signal IO_PAD653
+signal IO_PAD655
+signal IO_PAD657
+signal IO_PAD658
+signal IO_PAD659
+signal IO_PAD661
+signal IO_PAD662
+signal IO_PAD663
+signal IO_PAD665
+signal IO_PAD666
+signal IO_PAD667
+signal IO_PAD669
+signal IO_PAD671
+signal IO_PAD672
+signal IO_PAD673
+signal IO_PAD674
+signal IO_PAD675
+signal IO_PAD677
+signal IO_PAD679
+signal IO_PAD681
+signal IO_PAD683
+signal IO_PAD685
+signal IO_PAD687
+signal IO_PAD688
+signal IO_PAD689
+signal IO_PAD690
+signal IO_PAD691
+signal IO_PAD692
+signal IO_PAD693
+signal IO_PAD695
+signal IO_PAD697
+signal IO_PAD698
+signal IO_PAD699
+signal IO_PAD700
+signal IO_PAD701
+signal IO_PAD703
+signal IO_PAD705
+signal IO_PAD707
+signal IO_PAD709
+signal IO_PAD710
+signal IO_PAD711
+signal IO_PAD713
+signal IO_PAD714
+signal IO_PAD715
+signal IO_PAD717
+signal IO_PAD719
+signal IO_PAD720
+
+register BSR 1559
+register BR 1
+register DIR 32
+
+instruction length 6
+
+instruction EXTEST 000000 BSR
+instruction SAMPLE/PRELOAD 000001 BSR
+instruction IDCODE 001001 DIR
+instruction BYPASS 111111 BR
+
+bit 1558 I 1 IO_PAD625
+bit 1557 O 1 IO_PAD625 1556 1 Z
+bit 1556 C 1 *
+bit 1555 I 1 IO_PAD624
+bit 1554 O 1 IO_PAD624 1553 1 Z
+bit 1553 C 1 *
+bit 1552 I 1 IO_PAD623
+bit 1551 O 1 IO_PAD623 1550 1 Z
+bit 1550 C 1 *
+bit 1549 I 1 IO_PAD622
+bit 1548 O 1 IO_PAD622 1547 1 Z
+bit 1547 C 1 *
+bit 1546 I 1 IO_PAD621
+bit 1545 O 1 IO_PAD621 1544 1 Z
+bit 1544 C 1 *
+bit 1543 I 1 IO_PAD620
+bit 1542 O 1 IO_PAD620 1541 1 Z
+bit 1541 C 1 *
+bit 1540 I 1 IO_PAD619
+bit 1539 O 1 IO_PAD619 1538 1 Z
+bit 1538 C 1 *
+bit 1537 I 1 IO_PAD617
+bit 1536 O 1 IO_PAD617 1535 1 Z
+bit 1535 C 1 *
+bit 1534 I 1 IO_PAD616
+bit 1533 O 1 IO_PAD616 1532 1 Z
+bit 1532 C 1 *
+bit 1531 I 1 IO_PAD615
+bit 1530 O 1 IO_PAD615 1529 1 Z
+bit 1529 C 1 *
+bit 1528 I 1 IO_PAD614
+bit 1527 O 1 IO_PAD614 1526 1 Z
+bit 1526 C 1 *
+bit 1525 I 1 IO_PAD613
+bit 1524 O 1 IO_PAD613 1523 1 Z
+bit 1523 C 1 *
+bit 1522 I 1 IO_PAD611
+bit 1521 O 1 IO_PAD611 1520 1 Z
+bit 1520 C 1 *
+bit 1519 I 1 IO_PAD609
+bit 1518 O 1 IO_PAD609 1517 1 Z
+bit 1517 C 1 *
+bit 1516 I 1 IO_PAD607
+bit 1515 O 1 IO_PAD607 1514 1 Z
+bit 1514 C 1 *
+bit 1513 I 1 IO_PAD605
+bit 1512 O 1 IO_PAD605 1511 1 Z
+bit 1511 C 1 *
+bit 1510 I 1 IO_PAD604
+bit 1509 O 1 IO_PAD604 1508 1 Z
+bit 1508 C 1 *
+bit 1507 I 1 IO_PAD603
+bit 1506 O 1 IO_PAD603 1505 1 Z
+bit 1505 C 1 *
+bit 1504 I 1 IO_PAD601
+bit 1503 O 1 IO_PAD601 1502 1 Z
+bit 1502 C 1 *
+bit 1501 I 1 IO_PAD600
+bit 1500 O 1 IO_PAD600 1499 1 Z
+bit 1499 C 1 *
+bit 1498 I 1 IO_PAD599
+bit 1497 O 1 IO_PAD599 1496 1 Z
+bit 1496 C 1 *
+bit 1495 I 1 IO_PAD597
+bit 1494 O 1 IO_PAD597 1493 1 Z
+bit 1493 C 1 *
+bit 1492 I 1 IO_PAD596
+bit 1491 O 1 IO_PAD596 1490 1 Z
+bit 1490 C 1 *
+bit 1489 I 1 IO_PAD595
+bit 1488 O 1 IO_PAD595 1487 1 Z
+bit 1487 C 1 *
+bit 1486 I 1 IO_PAD593
+bit 1485 O 1 IO_PAD593 1484 1 Z
+bit 1484 C 1 *
+bit 1483 I 1 IO_PAD591
+bit 1482 O 1 IO_PAD591 1481 1 Z
+bit 1481 C 1 *
+bit 1480 I 1 IO_PAD590
+bit 1479 O 1 IO_PAD590 1478 1 Z
+bit 1478 C 1 *
+bit 1477 I 1 IO_PAD589
+bit 1476 O 1 IO_PAD589 1475 1 Z
+bit 1475 C 1 *
+bit 1474 I 1 IO_PAD588
+bit 1473 O 1 IO_PAD588 1472 1 Z
+bit 1472 C 1 *
+bit 1471 I 1 IO_PAD587
+bit 1470 O 1 IO_PAD587 1469 1 Z
+bit 1469 C 1 *
+bit 1468 I 1 IO_PAD585
+bit 1467 O 1 IO_PAD585 1466 1 Z
+bit 1466 C 1 *
+bit 1465 I 1 IO_PAD583
+bit 1464 O 1 IO_PAD583 1463 1 Z
+bit 1463 C 1 *
+bit 1462 I 1 IO_PAD581
+bit 1461 O 1 IO_PAD581 1460 1 Z
+bit 1460 C 1 *
+bit 1459 I 1 IO_PAD579
+bit 1458 O 1 IO_PAD579 1457 1 Z
+bit 1457 C 1 *
+bit 1456 I 1 IO_PAD578
+bit 1455 O 1 IO_PAD578 1454 1 Z
+bit 1454 C 1 *
+bit 1453 I 1 IO_PAD577
+bit 1452 O 1 IO_PAD577 1451 1 Z
+bit 1451 C 1 *
+bit 1450 I 1 IO_PAD575
+bit 1449 O 1 IO_PAD575 1448 1 Z
+bit 1448 C 1 *
+bit 1447 I 1 IO_PAD573
+bit 1446 O 1 IO_PAD573 1445 1 Z
+bit 1445 C 1 *
+bit 1444 I 1 IO_PAD572
+bit 1443 O 1 IO_PAD572 1442 1 Z
+bit 1442 C 1 *
+bit 1441 I 1 IO_PAD571
+bit 1440 O 1 IO_PAD571 1439 1 Z
+bit 1439 C 1 *
+bit 1438 I 1 IO_PAD570
+bit 1437 O 1 IO_PAD570 1436 1 Z
+bit 1436 C 1 *
+bit 1435 I 1 IO_PAD569
+bit 1434 O 1 IO_PAD569 1433 1 Z
+bit 1433 C 1 *
+bit 1432 I 1 IO_PAD568
+bit 1431 O 1 IO_PAD568 1430 1 Z
+bit 1430 C 1 *
+bit 1429 I 1 IO_PAD567
+bit 1428 O 1 IO_PAD567 1427 1 Z
+bit 1427 C 1 *
+bit 1426 O 1 *
+bit 1425 O 1 *
+bit 1424 O 1 *
+bit 1423 O 1 *
+bit 1422 O 1 *
+bit 1421 O 1 *
+bit 1420 I 1 IO_PAD566
+bit 1419 O 1 IO_PAD566 1418 1 Z
+bit 1418 C 1 *
+bit 1417 I 1 IO_PAD565
+bit 1416 O 1 IO_PAD565 1415 1 Z
+bit 1415 C 1 *
+bit 1414 I 1 IO_PAD564
+bit 1413 O 1 IO_PAD564 1412 1 Z
+bit 1412 C 1 *
+bit 1411 I 1 IO_PAD563
+bit 1410 O 1 IO_PAD563 1409 1 Z
+bit 1409 C 1 *
+bit 1408 I 1 IO_PAD562
+bit 1407 O 1 IO_PAD562 1406 1 Z
+bit 1406 C 1 *
+bit 1405 I 1 IO_PAD561
+bit 1404 O 1 IO_PAD561 1403 1 Z
+bit 1403 C 1 *
+bit 1402 I 1 IO_PAD559
+bit 1401 O 1 IO_PAD559 1400 1 Z
+bit 1400 C 1 *
+bit 1399 I 1 IO_PAD557
+bit 1398 O 1 IO_PAD557 1397 1 Z
+bit 1397 C 1 *
+bit 1396 I 1 IO_PAD555
+bit 1395 O 1 IO_PAD555 1394 1 Z
+bit 1394 C 1 *
+bit 1393 I 1 IO_PAD553
+bit 1392 O 1 IO_PAD553 1391 1 Z
+bit 1391 C 1 *
+bit 1390 O 1 *
+bit 1389 O 1 *
+bit 1388 O 1 *
+bit 1387 O 1 *
+bit 1386 O 1 *
+bit 1385 O 1 *
+bit 1384 I 1 IO_PAD551
+bit 1383 O 1 IO_PAD551 1382 1 Z
+bit 1382 C 1 *
+bit 1381 I 1 IO_PAD550
+bit 1380 O 1 IO_PAD550 1379 1 Z
+bit 1379 C 1 *
+bit 1378 I 1 IO_PAD549
+bit 1377 O 1 IO_PAD549 1376 1 Z
+bit 1376 C 1 *
+bit 1375 I 1 IO_PAD547
+bit 1374 O 1 IO_PAD547 1373 1 Z
+bit 1373 C 1 *
+bit 1372 I 1 IO_PAD545
+bit 1371 O 1 IO_PAD545 1370 1 Z
+bit 1370 C 1 *
+bit 1369 I 1 IO_PAD544
+bit 1368 O 1 IO_PAD544 1367 1 Z
+bit 1367 C 1 *
+bit 1366 I 1 IO_PAD542
+bit 1365 O 1 IO_PAD542 1364 1 Z
+bit 1364 C 1 *
+bit 1363 I 1 IO_PAD541
+bit 1362 O 1 IO_PAD541 1361 1 Z
+bit 1361 C 1 *
+bit 1360 I 1 IO_PAD539
+bit 1359 O 1 IO_PAD539 1358 1 Z
+bit 1358 C 1 *
+bit 1357 I 1 IO_PAD537
+bit 1356 O 1 IO_PAD537 1355 1 Z
+bit 1355 C 1 *
+bit 1354 I 1 IO_PAD536
+bit 1353 O 1 IO_PAD536 1352 1 Z
+bit 1352 C 1 *
+bit 1351 I 1 IO_PAD535
+bit 1350 O 1 IO_PAD535 1349 1 Z
+bit 1349 C 1 *
+bit 1348 O 1 *
+bit 1347 O 1 *
+bit 1346 O 1 *
+bit 1345 O 1 *
+bit 1344 O 1 *
+bit 1343 O 1 *
+bit 1342 I 1 IO_PAD533
+bit 1341 O 1 IO_PAD533 1340 1 Z
+bit 1340 C 1 *
+bit 1339 I 1 IO_PAD531
+bit 1338 O 1 IO_PAD531 1337 1 Z
+bit 1337 C 1 *
+bit 1336 I 1 IO_PAD529
+bit 1335 O 1 IO_PAD529 1334 1 Z
+bit 1334 C 1 *
+bit 1333 I 1 IO_PAD527
+bit 1332 O 1 IO_PAD527 1331 1 Z
+bit 1331 C 1 *
+bit 1330 I 1 IO_PAD525
+bit 1329 O 1 IO_PAD525 1328 1 Z
+bit 1328 C 1 *
+bit 1327 I 1 IO_PAD524
+bit 1326 O 1 IO_PAD524 1325 1 Z
+bit 1325 C 1 *
+bit 1324 I 1 IO_PAD523
+bit 1323 O 1 IO_PAD523 1322 1 Z
+bit 1322 C 1 *
+bit 1321 I 1 IO_PAD522
+bit 1320 O 1 IO_PAD522 1319 1 Z
+bit 1319 C 1 *
+bit 1318 I 1 IO_PAD521
+bit 1317 O 1 IO_PAD521 1316 1 Z
+bit 1316 C 1 *
+bit 1315 I 1 IO_PAD520
+bit 1314 O 1 IO_PAD520 1313 1 Z
+bit 1313 C 1 *
+bit 1312 O 1 *
+bit 1311 O 1 *
+bit 1310 O 1 *
+bit 1309 O 1 *
+bit 1308 O 1 *
+bit 1307 O 1 *
+bit 1306 I 1 IO_PAD519
+bit 1305 O 1 IO_PAD519 1304 1 Z
+bit 1304 C 1 *
+bit 1303 I 1 IO_PAD518
+bit 1302 O 1 IO_PAD518 1301 1 Z
+bit 1301 C 1 *
+bit 1300 I 1 IO_PAD517
+bit 1299 O 1 IO_PAD517 1298 1 Z
+bit 1298 C 1 *
+bit 1297 I 1 IO_PAD516
+bit 1296 O 1 IO_PAD516 1295 1 Z
+bit 1295 C 1 *
+bit 1294 I 1 IO_PAD515
+bit 1293 O 1 IO_PAD515 1292 1 Z
+bit 1292 C 1 *
+bit 1291 I 1 IO_PAD514
+bit 1290 O 1 IO_PAD514 1289 1 Z
+bit 1289 C 1 *
+bit 1288 I 1 IO_PAD513
+bit 1287 O 1 IO_PAD513 1286 1 Z
+bit 1286 C 1 *
+bit 1285 I 1 IO_PAD511
+bit 1284 O 1 IO_PAD511 1283 1 Z
+bit 1283 C 1 *
+bit 1282 I 1 IO_PAD509
+bit 1281 O 1 IO_PAD509 1280 1 Z
+bit 1280 C 1 *
+bit 1279 I 1 IO_PAD508
+bit 1278 O 1 IO_PAD508 1277 1 Z
+bit 1277 C 1 *
+bit 1276 I 1 IO_PAD507
+bit 1275 O 1 IO_PAD507 1274 1 Z
+bit 1274 C 1 *
+bit 1273 I 1 IO_PAD505
+bit 1272 O 1 IO_PAD505 1271 1 Z
+bit 1271 C 1 *
+bit 1270 I 1 IO_PAD503
+bit 1269 O 1 IO_PAD503 1268 1 Z
+bit 1268 C 1 *
+bit 1267 I 1 IO_PAD501
+bit 1266 O 1 IO_PAD501 1265 1 Z
+bit 1265 C 1 *
+bit 1264 I 1 IO_PAD499
+bit 1263 O 1 IO_PAD499 1262 1 Z
+bit 1262 C 1 *
+bit 1261 I 1 IO_PAD498
+bit 1260 O 1 IO_PAD498 1259 1 Z
+bit 1259 C 1 *
+bit 1258 I 1 IO_PAD497
+bit 1257 O 1 IO_PAD497 1256 1 Z
+bit 1256 C 1 *
+bit 1255 I 1 IO_PAD496
+bit 1254 O 1 IO_PAD496 1253 1 Z
+bit 1253 C 1 *
+bit 1252 I 1 IO_PAD495
+bit 1251 O 1 IO_PAD495 1250 1 Z
+bit 1250 C 1 *
+bit 1249 I 1 IO_PAD493
+bit 1248 O 1 IO_PAD493 1247 1 Z
+bit 1247 C 1 *
+bit 1246 I 1 IO_PAD491
+bit 1245 O 1 IO_PAD491 1244 1 Z
+bit 1244 C 1 *
+bit 1243 I 1 IO_PAD490
+bit 1242 O 1 IO_PAD490 1241 1 Z
+bit 1241 C 1 *
+bit 1240 I 1 IO_PAD489
+bit 1239 O 1 IO_PAD489 1238 1 Z
+bit 1238 C 1 *
+bit 1237 I 1 IO_PAD487
+bit 1236 O 1 IO_PAD487 1235 1 Z
+bit 1235 C 1 *
+bit 1234 I 1 IO_PAD486
+bit 1233 O 1 IO_PAD486 1232 1 Z
+bit 1232 C 1 *
+bit 1231 I 1 IO_PAD485
+bit 1230 O 1 IO_PAD485 1229 1 Z
+bit 1229 C 1 *
+bit 1228 I 1 IO_PAD483
+bit 1227 O 1 IO_PAD483 1226 1 Z
+bit 1226 C 1 *
+bit 1225 I 1 IO_PAD482
+bit 1224 O 1 IO_PAD482 1223 1 Z
+bit 1223 C 1 *
+bit 1222 I 1 IO_PAD481
+bit 1221 O 1 IO_PAD481 1220 1 Z
+bit 1220 C 1 *
+bit 1219 I 1 IO_PAD479
+bit 1218 O 1 IO_PAD479 1217 1 Z
+bit 1217 C 1 *
+bit 1216 I 1 IO_PAD477
+bit 1215 O 1 IO_PAD477 1214 1 Z
+bit 1214 C 1 *
+bit 1213 I 1 IO_PAD475
+bit 1212 O 1 IO_PAD475 1211 1 Z
+bit 1211 C 1 *
+bit 1210 I 1 IO_PAD473
+bit 1209 O 1 IO_PAD473 1208 1 Z
+bit 1208 C 1 *
+bit 1207 I 1 IO_PAD472
+bit 1206 O 1 IO_PAD472 1205 1 Z
+bit 1205 C 1 *
+bit 1204 I 1 IO_PAD471
+bit 1203 O 1 IO_PAD471 1202 1 Z
+bit 1202 C 1 *
+bit 1201 I 1 IO_PAD470
+bit 1200 O 1 IO_PAD470 1199 1 Z
+bit 1199 C 1 *
+bit 1198 I 1 IO_PAD469
+bit 1197 O 1 IO_PAD469 1196 1 Z
+bit 1196 C 1 *
+bit 1195 I 1 IO_PAD467
+bit 1194 O 1 IO_PAD467 1193 1 Z
+bit 1193 C 1 *
+bit 1192 I 1 IO_PAD466
+bit 1191 O 1 IO_PAD466 1190 1 Z
+bit 1190 C 1 *
+bit 1189 I 1 IO_PAD465
+bit 1188 O 1 IO_PAD465 1187 1 Z
+bit 1187 C 1 *
+bit 1186 I 1 IO_PAD464
+bit 1185 O 1 IO_PAD464 1184 1 Z
+bit 1184 C 1 *
+bit 1183 I 1 IO_PAD463
+bit 1182 O 1 IO_PAD463 1181 1 Z
+bit 1181 C 1 *
+bit 1180 I 1 IO_PAD462
+bit 1179 O 1 IO_PAD462 1178 1 Z
+bit 1178 C 1 *
+bit 1177 I 1 IO_PAD461
+bit 1176 O 1 IO_PAD461 1175 1 Z
+bit 1175 C 1 *
+bit 1174 I 1 CCLK_PAD458
+bit 1173 O 1 CCLK_PAD458 1172 1 Z
+bit 1172 C 1 *
+bit 1171 I 1 DONE_PAD457
+bit 1170 O 1 DONE_PAD457 1169 1 Z
+bit 1169 C 1 *
+bit 1168 I 1 IO_PAD456
+bit 1167 O 1 IO_PAD456 1166 1 Z
+bit 1166 C 1 *
+bit 1165 I 1 IO_PAD455
+bit 1164 O 1 IO_PAD455 1163 1 Z
+bit 1163 C 1 *
+bit 1162 I 1 IO_PAD454
+bit 1161 O 1 IO_PAD454 1160 1 Z
+bit 1160 C 1 *
+bit 1159 I 1 IO_PAD451
+bit 1158 O 1 IO_PAD451 1157 1 Z
+bit 1157 C 1 *
+bit 1156 I 1 IO_PAD450
+bit 1155 O 1 IO_PAD450 1154 1 Z
+bit 1154 C 1 *
+bit 1153 I 1 IO_PAD448
+bit 1152 O 1 IO_PAD448 1151 1 Z
+bit 1151 C 1 *
+bit 1150 I 1 IO_PAD447
+bit 1149 O 1 IO_PAD447 1148 1 Z
+bit 1148 C 1 *
+bit 1147 I 1 IO_PAD446
+bit 1146 O 1 IO_PAD446 1145 1 Z
+bit 1145 C 1 *
+bit 1144 I 1 IO_PAD445
+bit 1143 O 1 IO_PAD445 1142 1 Z
+bit 1142 C 1 *
+bit 1141 I 1 IO_PAD444
+bit 1140 O 1 IO_PAD444 1139 1 Z
+bit 1139 C 1 *
+bit 1138 I 1 IO_PAD442
+bit 1137 O 1 IO_PAD442 1136 1 Z
+bit 1136 C 1 *
+bit 1135 I 1 IO_PAD440
+bit 1134 O 1 IO_PAD440 1133 1 Z
+bit 1133 C 1 *
+bit 1132 I 1 IO_PAD439
+bit 1131 O 1 IO_PAD439 1130 1 Z
+bit 1130 C 1 *
+bit 1129 I 1 IO_PAD438
+bit 1128 O 1 IO_PAD438 1127 1 Z
+bit 1127 C 1 *
+bit 1126 I 1 IO_PAD437
+bit 1125 O 1 IO_PAD437 1124 1 Z
+bit 1124 C 1 *
+bit 1123 I 1 IO_PAD436
+bit 1122 O 1 IO_PAD436 1121 1 Z
+bit 1121 C 1 *
+bit 1120 I 1 IO_PAD434
+bit 1119 O 1 IO_PAD434 1118 1 Z
+bit 1118 C 1 *
+bit 1117 I 1 IO_PAD432
+bit 1116 O 1 IO_PAD432 1115 1 Z
+bit 1115 C 1 *
+bit 1114 I 1 IO_PAD430
+bit 1113 O 1 IO_PAD430 1112 1 Z
+bit 1112 C 1 *
+bit 1111 I 1 IO_PAD428
+bit 1110 O 1 IO_PAD428 1109 1 Z
+bit 1109 C 1 *
+bit 1108 I 1 IO_PAD427
+bit 1107 O 1 IO_PAD427 1106 1 Z
+bit 1106 C 1 *
+bit 1105 I 1 IO_PAD426
+bit 1104 O 1 IO_PAD426 1103 1 Z
+bit 1103 C 1 *
+bit 1102 I 1 IO_PAD424
+bit 1101 O 1 IO_PAD424 1100 1 Z
+bit 1100 C 1 *
+bit 1099 I 1 IO_PAD423
+bit 1098 O 1 IO_PAD423 1097 1 Z
+bit 1097 C 1 *
+bit 1096 I 1 IO_PAD422
+bit 1095 O 1 IO_PAD422 1094 1 Z
+bit 1094 C 1 *
+bit 1093 I 1 IO_PAD420
+bit 1092 O 1 IO_PAD420 1091 1 Z
+bit 1091 C 1 *
+bit 1090 I 1 IO_PAD419
+bit 1089 O 1 IO_PAD419 1088 1 Z
+bit 1088 C 1 *
+bit 1087 I 1 IO_PAD418
+bit 1086 O 1 IO_PAD418 1085 1 Z
+bit 1085 C 1 *
+bit 1084 I 1 IO_PAD416
+bit 1083 O 1 IO_PAD416 1082 1 Z
+bit 1082 C 1 *
+bit 1081 I 1 IO_PAD414
+bit 1080 O 1 IO_PAD414 1079 1 Z
+bit 1079 C 1 *
+bit 1078 I 1 IO_PAD413
+bit 1077 O 1 IO_PAD413 1076 1 Z
+bit 1076 C 1 *
+bit 1075 I 1 IO_PAD412
+bit 1074 O 1 IO_PAD412 1073 1 Z
+bit 1073 C 1 *
+bit 1072 I 1 IO_PAD411
+bit 1071 O 1 IO_PAD411 1070 1 Z
+bit 1070 C 1 *
+bit 1069 I 1 IO_PAD410
+bit 1068 O 1 IO_PAD410 1067 1 Z
+bit 1067 C 1 *
+bit 1066 I 1 IO_PAD408
+bit 1065 O 1 IO_PAD408 1064 1 Z
+bit 1064 C 1 *
+bit 1063 I 1 IO_PAD406
+bit 1062 O 1 IO_PAD406 1061 1 Z
+bit 1061 C 1 *
+bit 1060 I 1 IO_PAD404
+bit 1059 O 1 IO_PAD404 1058 1 Z
+bit 1058 C 1 *
+bit 1057 I 1 IO_PAD402
+bit 1056 O 1 IO_PAD402 1055 1 Z
+bit 1055 C 1 *
+bit 1054 I 1 IO_PAD400
+bit 1053 O 1 IO_PAD400 1052 1 Z
+bit 1052 C 1 *
+bit 1051 I 1 IO_PAD398
+bit 1050 O 1 IO_PAD398 1049 1 Z
+bit 1049 C 1 *
+bit 1048 I 1 IO_PAD397
+bit 1047 O 1 IO_PAD397 1046 1 Z
+bit 1046 C 1 *
+bit 1045 I 1 IO_PAD396
+bit 1044 O 1 IO_PAD396 1043 1 Z
+bit 1043 C 1 *
+bit 1042 I 1 IO_PAD395
+bit 1041 O 1 IO_PAD395 1040 1 Z
+bit 1040 C 1 *
+bit 1039 I 1 IO_PAD394
+bit 1038 O 1 IO_PAD394 1037 1 Z
+bit 1037 C 1 *
+bit 1036 I 1 IO_PAD393
+bit 1035 O 1 IO_PAD393 1034 1 Z
+bit 1034 C 1 *
+bit 1033 I 1 IO_PAD392
+bit 1032 O 1 IO_PAD392 1031 1 Z
+bit 1031 C 1 *
+bit 1030 I 1 IO_PAD390
+bit 1029 O 1 IO_PAD390 1028 1 Z
+bit 1028 C 1 *
+bit 1027 I 1 IO_PAD388
+bit 1026 O 1 IO_PAD388 1025 1 Z
+bit 1025 C 1 *
+bit 1024 I 1 IO_PAD387
+bit 1023 O 1 IO_PAD387 1022 1 Z
+bit 1022 C 1 *
+bit 1021 I 1 IO_PAD386
+bit 1020 O 1 IO_PAD386 1019 1 Z
+bit 1019 C 1 *
+bit 1018 I 1 IO_PAD385
+bit 1017 O 1 IO_PAD385 1016 1 Z
+bit 1016 C 1 *
+bit 1015 I 1 IO_PAD384
+bit 1014 O 1 IO_PAD384 1013 1 Z
+bit 1013 C 1 *
+bit 1012 I 1 IO_PAD382
+bit 1011 O 1 IO_PAD382 1010 1 Z
+bit 1010 C 1 *
+bit 1009 I 1 IO_PAD380
+bit 1008 O 1 IO_PAD380 1007 1 Z
+bit 1007 C 1 *
+bit 1006 I 1 IO_PAD378
+bit 1005 O 1 IO_PAD378 1004 1 Z
+bit 1004 C 1 *
+bit 1003 I 1 IO_PAD376
+bit 1002 O 1 IO_PAD376 1001 1 Z
+bit 1001 C 1 *
+bit 1000 I 1 IO_PAD375
+bit 999 O 1 IO_PAD375 998 1 Z
+bit 998 C 1 *
+bit 997 I 1 IO_PAD374
+bit 996 O 1 IO_PAD374 995 1 Z
+bit 995 C 1 *
+bit 994 I 1 IO_PAD372
+bit 993 O 1 IO_PAD372 992 1 Z
+bit 992 C 1 *
+bit 991 I 1 IO_PAD371
+bit 990 O 1 IO_PAD371 989 1 Z
+bit 989 C 1 *
+bit 988 I 1 IO_PAD370
+bit 987 O 1 IO_PAD370 986 1 Z
+bit 986 C 1 *
+bit 985 I 1 IO_PAD368
+bit 984 O 1 IO_PAD368 983 1 Z
+bit 983 C 1 *
+bit 982 I 1 IO_PAD366
+bit 981 O 1 IO_PAD366 980 1 Z
+bit 980 C 1 *
+bit 979 I 1 IO_PAD365
+bit 978 O 1 IO_PAD365 977 1 Z
+bit 977 C 1 *
+bit 976 I 1 IO_PAD364
+bit 975 O 1 IO_PAD364 974 1 Z
+bit 974 C 1 *
+bit 973 I 1 IO_PAD362
+bit 972 O 1 IO_PAD362 971 1 Z
+bit 971 C 1 *
+bit 970 I 1 IO_PAD361
+bit 969 O 1 IO_PAD361 968 1 Z
+bit 968 C 1 *
+bit 967 I 1 IO_PAD360
+bit 966 O 1 IO_PAD360 965 1 Z
+bit 965 C 1 *
+bit 964 I 1 IO_PAD358
+bit 963 O 1 IO_PAD358 962 1 Z
+bit 962 C 1 *
+bit 961 I 1 IO_PAD356
+bit 960 O 1 IO_PAD356 959 1 Z
+bit 959 C 1 *
+bit 958 I 1 IO_PAD355
+bit 957 O 1 IO_PAD355 956 1 Z
+bit 956 C 1 *
+bit 955 I 1 IO_PAD354
+bit 954 O 1 IO_PAD354 953 1 Z
+bit 953 C 1 *
+bit 952 I 1 IO_PAD352
+bit 951 O 1 IO_PAD352 950 1 Z
+bit 950 C 1 *
+bit 949 I 1 IO_PAD351
+bit 948 O 1 IO_PAD351 947 1 Z
+bit 947 C 1 *
+bit 946 I 1 IO_PAD350
+bit 945 O 1 IO_PAD350 944 1 Z
+bit 944 C 1 *
+bit 943 I 1 IO_PAD348
+bit 942 O 1 IO_PAD348 941 1 Z
+bit 941 C 1 *
+bit 940 I 1 IO_PAD346
+bit 939 O 1 IO_PAD346 938 1 Z
+bit 938 C 1 *
+bit 937 I 1 IO_PAD344
+bit 936 O 1 IO_PAD344 935 1 Z
+bit 935 C 1 *
+bit 934 I 1 IO_PAD342
+bit 933 O 1 IO_PAD342 932 1 Z
+bit 932 C 1 *
+bit 931 I 1 IO_PAD341
+bit 930 O 1 IO_PAD341 929 1 Z
+bit 929 C 1 *
+bit 928 I 1 IO_PAD340
+bit 927 O 1 IO_PAD340 926 1 Z
+bit 926 C 1 *
+bit 925 I 1 IO_PAD339
+bit 924 O 1 IO_PAD339 923 1 Z
+bit 923 C 1 *
+bit 922 I 1 IO_PAD338
+bit 921 O 1 IO_PAD338 920 1 Z
+bit 920 C 1 *
+bit 919 I 1 IO_PAD336
+bit 918 O 1 IO_PAD336 917 1 Z
+bit 917 C 1 *
+bit 916 I 1 IO_PAD334
+bit 915 O 1 IO_PAD334 914 1 Z
+bit 914 C 1 *
+bit 913 I 1 IO_PAD333
+bit 912 O 1 IO_PAD333 911 1 Z
+bit 911 C 1 *
+bit 910 I 1 IO_PAD332
+bit 909 O 1 IO_PAD332 908 1 Z
+bit 908 C 1 *
+bit 907 I 1 IO_PAD331
+bit 906 O 1 IO_PAD331 905 1 Z
+bit 905 C 1 *
+bit 904 I 1 IO_PAD330
+bit 903 O 1 IO_PAD330 902 1 Z
+bit 902 C 1 *
+bit 901 I 1 IO_PAD329
+bit 900 O 1 IO_PAD329 899 1 Z
+bit 899 C 1 *
+bit 898 I 1 IO_PAD328
+bit 897 O 1 IO_PAD328 896 1 Z
+bit 896 C 1 *
+bit 895 I 1 IO_PAD326
+bit 894 O 1 IO_PAD326 893 1 Z
+bit 893 C 1 *
+bit 892 I 1 IO_PAD324
+bit 891 O 1 IO_PAD324 890 1 Z
+bit 890 C 1 *
+bit 889 I 1 IO_PAD322
+bit 888 O 1 IO_PAD322 887 1 Z
+bit 887 C 1 *
+bit 886 I 1 IO_PAD320
+bit 885 O 1 IO_PAD320 884 1 Z
+bit 884 C 1 *
+bit 883 I 1 IO_PAD318
+bit 882 O 1 IO_PAD318 881 1 Z
+bit 881 C 1 *
+bit 880 I 1 IO_PAD316
+bit 879 O 1 IO_PAD316 878 1 Z
+bit 878 C 1 *
+bit 877 I 1 IO_PAD315
+bit 876 O 1 IO_PAD315 875 1 Z
+bit 875 C 1 *
+bit 874 I 1 IO_PAD314
+bit 873 O 1 IO_PAD314 872 1 Z
+bit 872 C 1 *
+bit 871 I 1 IO_PAD313
+bit 870 O 1 IO_PAD313 869 1 Z
+bit 869 C 1 *
+bit 868 I 1 IO_PAD312
+bit 867 O 1 IO_PAD312 866 1 Z
+bit 866 C 1 *
+bit 865 I 1 IO_PAD310
+bit 864 O 1 IO_PAD310 863 1 Z
+bit 863 C 1 *
+bit 862 I 1 IO_PAD308
+bit 861 O 1 IO_PAD308 860 1 Z
+bit 860 C 1 *
+bit 859 I 1 IO_PAD307
+bit 858 O 1 IO_PAD307 857 1 Z
+bit 857 C 1 *
+bit 856 I 1 IO_PAD306
+bit 855 O 1 IO_PAD306 854 1 Z
+bit 854 C 1 *
+bit 853 I 1 IO_PAD304
+bit 852 O 1 IO_PAD304 851 1 Z
+bit 851 C 1 *
+bit 850 I 1 IO_PAD303
+bit 849 O 1 IO_PAD303 848 1 Z
+bit 848 C 1 *
+bit 847 I 1 IO_PAD302
+bit 846 O 1 IO_PAD302 845 1 Z
+bit 845 C 1 *
+bit 844 I 1 IO_PAD300
+bit 843 O 1 IO_PAD300 842 1 Z
+bit 842 C 1 *
+bit 841 I 1 IO_PAD299
+bit 840 O 1 IO_PAD299 839 1 Z
+bit 839 C 1 *
+bit 838 I 1 IO_PAD298
+bit 837 O 1 IO_PAD298 836 1 Z
+bit 836 C 1 *
+bit 835 I 1 IO_PAD296
+bit 834 O 1 IO_PAD296 833 1 Z
+bit 833 C 1 *
+bit 832 I 1 IO_PAD294
+bit 831 O 1 IO_PAD294 830 1 Z
+bit 830 C 1 *
+bit 829 I 1 IO_PAD292
+bit 828 O 1 IO_PAD292 827 1 Z
+bit 827 C 1 *
+bit 826 I 1 IO_PAD290
+bit 825 O 1 IO_PAD290 824 1 Z
+bit 824 C 1 *
+bit 823 I 1 IO_PAD289
+bit 822 O 1 IO_PAD289 821 1 Z
+bit 821 C 1 *
+bit 820 I 1 IO_PAD288
+bit 819 O 1 IO_PAD288 818 1 Z
+bit 818 C 1 *
+bit 817 I 1 IO_PAD287
+bit 816 O 1 IO_PAD287 815 1 Z
+bit 815 C 1 *
+bit 814 I 1 IO_PAD286
+bit 813 O 1 IO_PAD286 812 1 Z
+bit 812 C 1 *
+bit 811 I 1 IO_PAD284
+bit 810 O 1 IO_PAD284 809 1 Z
+bit 809 C 1 *
+bit 808 I 1 IO_PAD282
+bit 807 O 1 IO_PAD282 806 1 Z
+bit 806 C 1 *
+bit 805 I 1 IO_PAD281
+bit 804 O 1 IO_PAD281 803 1 Z
+bit 803 C 1 *
+bit 802 I 1 IO_PAD280
+bit 801 O 1 IO_PAD280 800 1 Z
+bit 800 C 1 *
+bit 799 I 1 IO_PAD279
+bit 798 O 1 IO_PAD279 797 1 Z
+bit 797 C 1 *
+bit 796 I 1 IO_PAD278
+bit 795 O 1 IO_PAD278 794 1 Z
+bit 794 C 1 *
+bit 793 I 1 IO_PAD276
+bit 792 O 1 IO_PAD276 791 1 Z
+bit 791 C 1 *
+bit 790 I 1 IO_PAD275
+bit 789 O 1 IO_PAD275 788 1 Z
+bit 788 C 1 *
+bit 787 I 1 IO_PAD274
+bit 786 O 1 IO_PAD274 785 1 Z
+bit 785 C 1 *
+bit 784 I 1 IO_PAD270
+bit 783 O 1 IO_PAD270 782 1 Z
+bit 782 C 1 *
+bit 781 I 1 IO_PAD269
+bit 780 O 1 IO_PAD269 779 1 Z
+bit 779 C 1 *
+bit 778 I 1 M2_PAD268
+bit 777 I 1 M0_PAD267
+bit 776 I 1 M1_PAD266
+bit 775 I 1 IO_PAD264
+bit 774 O 1 IO_PAD264 773 1 Z
+bit 773 C 1 *
+bit 772 I 1 IO_PAD263
+bit 771 O 1 IO_PAD263 770 1 Z
+bit 770 C 1 *
+bit 769 I 1 IO_PAD262
+bit 768 O 1 IO_PAD262 767 1 Z
+bit 767 C 1 *
+bit 766 I 1 IO_PAD261
+bit 765 O 1 IO_PAD261 764 1 Z
+bit 764 C 1 *
+bit 763 I 1 IO_PAD260
+bit 762 O 1 IO_PAD260 761 1 Z
+bit 761 C 1 *
+bit 760 I 1 IO_PAD259
+bit 759 O 1 IO_PAD259 758 1 Z
+bit 758 C 1 *
+bit 757 I 1 IO_PAD258
+bit 756 O 1 IO_PAD258 755 1 Z
+bit 755 C 1 *
+bit 754 I 1 IO_PAD256
+bit 753 O 1 IO_PAD256 752 1 Z
+bit 752 C 1 *
+bit 751 I 1 IO_PAD255
+bit 750 O 1 IO_PAD255 749 1 Z
+bit 749 C 1 *
+bit 748 I 1 IO_PAD254
+bit 747 O 1 IO_PAD254 746 1 Z
+bit 746 C 1 *
+bit 745 I 1 IO_PAD253
+bit 744 O 1 IO_PAD253 743 1 Z
+bit 743 C 1 *
+bit 742 I 1 IO_PAD252
+bit 741 O 1 IO_PAD252 740 1 Z
+bit 740 C 1 *
+bit 739 I 1 IO_PAD250
+bit 738 O 1 IO_PAD250 737 1 Z
+bit 737 C 1 *
+bit 736 I 1 IO_PAD248
+bit 735 O 1 IO_PAD248 734 1 Z
+bit 734 C 1 *
+bit 733 I 1 IO_PAD246
+bit 732 O 1 IO_PAD246 731 1 Z
+bit 731 C 1 *
+bit 730 I 1 IO_PAD244
+bit 729 O 1 IO_PAD244 728 1 Z
+bit 728 C 1 *
+bit 727 I 1 IO_PAD243
+bit 726 O 1 IO_PAD243 725 1 Z
+bit 725 C 1 *
+bit 724 I 1 IO_PAD242
+bit 723 O 1 IO_PAD242 722 1 Z
+bit 722 C 1 *
+bit 721 I 1 IO_PAD240
+bit 720 O 1 IO_PAD240 719 1 Z
+bit 719 C 1 *
+bit 718 I 1 IO_PAD239
+bit 717 O 1 IO_PAD239 716 1 Z
+bit 716 C 1 *
+bit 715 I 1 IO_PAD238
+bit 714 O 1 IO_PAD238 713 1 Z
+bit 713 C 1 *
+bit 712 I 1 IO_PAD236
+bit 711 O 1 IO_PAD236 710 1 Z
+bit 710 C 1 *
+bit 709 I 1 IO_PAD235
+bit 708 O 1 IO_PAD235 707 1 Z
+bit 707 C 1 *
+bit 706 I 1 IO_PAD234
+bit 705 O 1 IO_PAD234 704 1 Z
+bit 704 C 1 *
+bit 703 I 1 IO_PAD232
+bit 702 O 1 IO_PAD232 701 1 Z
+bit 701 C 1 *
+bit 700 I 1 IO_PAD230
+bit 699 O 1 IO_PAD230 698 1 Z
+bit 698 C 1 *
+bit 697 I 1 IO_PAD229
+bit 696 O 1 IO_PAD229 695 1 Z
+bit 695 C 1 *
+bit 694 I 1 IO_PAD228
+bit 693 O 1 IO_PAD228 692 1 Z
+bit 692 C 1 *
+bit 691 I 1 IO_PAD227
+bit 690 O 1 IO_PAD227 689 1 Z
+bit 689 C 1 *
+bit 688 I 1 IO_PAD226
+bit 687 O 1 IO_PAD226 686 1 Z
+bit 686 C 1 *
+bit 685 I 1 IO_PAD224
+bit 684 O 1 IO_PAD224 683 1 Z
+bit 683 C 1 *
+bit 682 I 1 IO_PAD222
+bit 681 O 1 IO_PAD222 680 1 Z
+bit 680 C 1 *
+bit 679 I 1 IO_PAD220
+bit 678 O 1 IO_PAD220 677 1 Z
+bit 677 C 1 *
+bit 676 I 1 IO_PAD218
+bit 675 O 1 IO_PAD218 674 1 Z
+bit 674 C 1 *
+bit 673 I 1 IO_PAD217
+bit 672 O 1 IO_PAD217 671 1 Z
+bit 671 C 1 *
+bit 670 I 1 IO_PAD216
+bit 669 O 1 IO_PAD216 668 1 Z
+bit 668 C 1 *
+bit 667 I 1 IO_PAD214
+bit 666 O 1 IO_PAD214 665 1 Z
+bit 665 C 1 *
+bit 664 I 1 IO_PAD212
+bit 663 O 1 IO_PAD212 662 1 Z
+bit 662 C 1 *
+bit 661 I 1 IO_PAD211
+bit 660 O 1 IO_PAD211 659 1 Z
+bit 659 C 1 *
+bit 658 I 1 IO_PAD210
+bit 657 O 1 IO_PAD210 656 1 Z
+bit 656 C 1 *
+bit 655 I 1 IO_PAD209
+bit 654 O 1 IO_PAD209 653 1 Z
+bit 653 C 1 *
+bit 652 I 1 IO_PAD208
+bit 651 O 1 IO_PAD208 650 1 Z
+bit 650 C 1 *
+bit 649 I 1 IO_PAD207
+bit 648 O 1 IO_PAD207 647 1 Z
+bit 647 C 1 *
+bit 646 I 1 IO_PAD206
+bit 645 O 1 IO_PAD206 644 1 Z
+bit 644 C 1 *
+bit 643 O 1 *
+bit 642 O 1 *
+bit 641 O 1 *
+bit 640 O 1 *
+bit 639 O 1 *
+bit 638 O 1 *
+bit 637 I 1 IO_PAD205
+bit 636 O 1 IO_PAD205 635 1 Z
+bit 635 C 1 *
+bit 634 I 1 IO_PAD204
+bit 633 O 1 IO_PAD204 632 1 Z
+bit 632 C 1 *
+bit 631 I 1 IO_PAD203
+bit 630 O 1 IO_PAD203 629 1 Z
+bit 629 C 1 *
+bit 628 I 1 IO_PAD202
+bit 627 O 1 IO_PAD202 626 1 Z
+bit 626 C 1 *
+bit 625 I 1 IO_PAD201
+bit 624 O 1 IO_PAD201 623 1 Z
+bit 623 C 1 *
+bit 622 I 1 IO_PAD200
+bit 621 O 1 IO_PAD200 620 1 Z
+bit 620 C 1 *
+bit 619 I 1 IO_PAD198
+bit 618 O 1 IO_PAD198 617 1 Z
+bit 617 C 1 *
+bit 616 I 1 IO_PAD196
+bit 615 O 1 IO_PAD196 614 1 Z
+bit 614 C 1 *
+bit 613 I 1 IO_PAD194
+bit 612 O 1 IO_PAD194 611 1 Z
+bit 611 C 1 *
+bit 610 I 1 IO_PAD192
+bit 609 O 1 IO_PAD192 608 1 Z
+bit 608 C 1 *
+bit 607 O 1 *
+bit 606 O 1 *
+bit 605 O 1 *
+bit 604 O 1 *
+bit 603 O 1 *
+bit 602 O 1 *
+bit 601 I 1 IO_PAD190
+bit 600 O 1 IO_PAD190 599 1 Z
+bit 599 C 1 *
+bit 598 I 1 IO_PAD189
+bit 597 O 1 IO_PAD189 596 1 Z
+bit 596 C 1 *
+bit 595 I 1 IO_PAD188
+bit 594 O 1 IO_PAD188 593 1 Z
+bit 593 C 1 *
+bit 592 I 1 IO_PAD186
+bit 591 O 1 IO_PAD186 590 1 Z
+bit 590 C 1 *
+bit 589 I 1 IO_PAD184
+bit 588 O 1 IO_PAD184 587 1 Z
+bit 587 C 1 *
+bit 586 I 1 IO_PAD183
+bit 585 O 1 IO_PAD183 584 1 Z
+bit 584 C 1 *
+bit 583 I 1 IO_PAD181
+bit 582 O 1 IO_PAD181 581 1 Z
+bit 581 C 1 *
+bit 580 I 1 IO_PAD180
+bit 579 O 1 IO_PAD180 578 1 Z
+bit 578 C 1 *
+bit 577 I 1 IO_PAD178
+bit 576 O 1 IO_PAD178 575 1 Z
+bit 575 C 1 *
+bit 574 I 1 IO_PAD176
+bit 573 O 1 IO_PAD176 572 1 Z
+bit 572 C 1 *
+bit 571 I 1 IO_PAD175
+bit 570 O 1 IO_PAD175 569 1 Z
+bit 569 C 1 *
+bit 568 I 1 IO_PAD174
+bit 567 O 1 IO_PAD174 566 1 Z
+bit 566 C 1 *
+bit 565 O 1 *
+bit 564 O 1 *
+bit 563 O 1 *
+bit 562 O 1 *
+bit 561 O 1 *
+bit 560 O 1 *
+bit 559 I 1 IO_PAD172
+bit 558 O 1 IO_PAD172 557 1 Z
+bit 557 C 1 *
+bit 556 I 1 IO_PAD170
+bit 555 O 1 IO_PAD170 554 1 Z
+bit 554 C 1 *
+bit 553 I 1 IO_PAD168
+bit 552 O 1 IO_PAD168 551 1 Z
+bit 551 C 1 *
+bit 550 I 1 IO_PAD166
+bit 549 O 1 IO_PAD166 548 1 Z
+bit 548 C 1 *
+bit 547 I 1 IO_PAD164
+bit 546 O 1 IO_PAD164 545 1 Z
+bit 545 C 1 *
+bit 544 I 1 IO_PAD163
+bit 543 O 1 IO_PAD163 542 1 Z
+bit 542 C 1 *
+bit 541 I 1 IO_PAD162
+bit 540 O 1 IO_PAD162 539 1 Z
+bit 539 C 1 *
+bit 538 I 1 IO_PAD161
+bit 537 O 1 IO_PAD161 536 1 Z
+bit 536 C 1 *
+bit 535 I 1 IO_PAD160
+bit 534 O 1 IO_PAD160 533 1 Z
+bit 533 C 1 *
+bit 532 I 1 IO_PAD159
+bit 531 O 1 IO_PAD159 530 1 Z
+bit 530 C 1 *
+bit 529 O 1 *
+bit 528 O 1 *
+bit 527 O 1 *
+bit 526 O 1 *
+bit 525 O 1 *
+bit 524 O 1 *
+bit 523 I 1 IO_PAD158
+bit 522 O 1 IO_PAD158 521 1 Z
+bit 521 C 1 *
+bit 520 I 1 IO_PAD157
+bit 519 O 1 IO_PAD157 518 1 Z
+bit 518 C 1 *
+bit 517 I 1 IO_PAD156
+bit 516 O 1 IO_PAD156 515 1 Z
+bit 515 C 1 *
+bit 514 I 1 IO_PAD155
+bit 513 O 1 IO_PAD155 512 1 Z
+bit 512 C 1 *
+bit 511 I 1 IO_PAD154
+bit 510 O 1 IO_PAD154 509 1 Z
+bit 509 C 1 *
+bit 508 I 1 IO_PAD153
+bit 507 O 1 IO_PAD153 506 1 Z
+bit 506 C 1 *
+bit 505 I 1 IO_PAD152
+bit 504 O 1 IO_PAD152 503 1 Z
+bit 503 C 1 *
+bit 502 I 1 IO_PAD150
+bit 501 O 1 IO_PAD150 500 1 Z
+bit 500 C 1 *
+bit 499 I 1 IO_PAD148
+bit 498 O 1 IO_PAD148 497 1 Z
+bit 497 C 1 *
+bit 496 I 1 IO_PAD147
+bit 495 O 1 IO_PAD147 494 1 Z
+bit 494 C 1 *
+bit 493 I 1 IO_PAD146
+bit 492 O 1 IO_PAD146 491 1 Z
+bit 491 C 1 *
+bit 490 I 1 IO_PAD144
+bit 489 O 1 IO_PAD144 488 1 Z
+bit 488 C 1 *
+bit 487 I 1 IO_PAD142
+bit 486 O 1 IO_PAD142 485 1 Z
+bit 485 C 1 *
+bit 484 I 1 IO_PAD140
+bit 483 O 1 IO_PAD140 482 1 Z
+bit 482 C 1 *
+bit 481 I 1 IO_PAD138
+bit 480 O 1 IO_PAD138 479 1 Z
+bit 479 C 1 *
+bit 478 I 1 IO_PAD137
+bit 477 O 1 IO_PAD137 476 1 Z
+bit 476 C 1 *
+bit 475 I 1 IO_PAD136
+bit 474 O 1 IO_PAD136 473 1 Z
+bit 473 C 1 *
+bit 472 I 1 IO_PAD135
+bit 471 O 1 IO_PAD135 470 1 Z
+bit 470 C 1 *
+bit 469 I 1 IO_PAD134
+bit 468 O 1 IO_PAD134 467 1 Z
+bit 467 C 1 *
+bit 466 I 1 IO_PAD132
+bit 465 O 1 IO_PAD132 464 1 Z
+bit 464 C 1 *
+bit 463 I 1 IO_PAD130
+bit 462 O 1 IO_PAD130 461 1 Z
+bit 461 C 1 *
+bit 460 I 1 IO_PAD129
+bit 459 O 1 IO_PAD129 458 1 Z
+bit 458 C 1 *
+bit 457 I 1 IO_PAD128
+bit 456 O 1 IO_PAD128 455 1 Z
+bit 455 C 1 *
+bit 454 I 1 IO_PAD126
+bit 453 O 1 IO_PAD126 452 1 Z
+bit 452 C 1 *
+bit 451 I 1 IO_PAD125
+bit 450 O 1 IO_PAD125 449 1 Z
+bit 449 C 1 *
+bit 448 I 1 IO_PAD124
+bit 447 O 1 IO_PAD124 446 1 Z
+bit 446 C 1 *
+bit 445 I 1 IO_PAD122
+bit 444 O 1 IO_PAD122 443 1 Z
+bit 443 C 1 *
+bit 442 I 1 IO_PAD121
+bit 441 O 1 IO_PAD121 440 1 Z
+bit 440 C 1 *
+bit 439 I 1 IO_PAD120
+bit 438 O 1 IO_PAD120 437 1 Z
+bit 437 C 1 *
+bit 436 I 1 IO_PAD118
+bit 435 O 1 IO_PAD118 434 1 Z
+bit 434 C 1 *
+bit 433 I 1 IO_PAD116
+bit 432 O 1 IO_PAD116 431 1 Z
+bit 431 C 1 *
+bit 430 I 1 IO_PAD114
+bit 429 O 1 IO_PAD114 428 1 Z
+bit 428 C 1 *
+bit 427 I 1 IO_PAD112
+bit 426 O 1 IO_PAD112 425 1 Z
+bit 425 C 1 *
+bit 424 I 1 IO_PAD111
+bit 423 O 1 IO_PAD111 422 1 Z
+bit 422 C 1 *
+bit 421 I 1 IO_PAD110
+bit 420 O 1 IO_PAD110 419 1 Z
+bit 419 C 1 *
+bit 418 I 1 IO_PAD109
+bit 417 O 1 IO_PAD109 416 1 Z
+bit 416 C 1 *
+bit 415 I 1 IO_PAD108
+bit 414 O 1 IO_PAD108 413 1 Z
+bit 413 C 1 *
+bit 412 I 1 IO_PAD106
+bit 411 O 1 IO_PAD106 410 1 Z
+bit 410 C 1 *
+bit 409 I 1 IO_PAD105
+bit 408 O 1 IO_PAD105 407 1 Z
+bit 407 C 1 *
+bit 406 I 1 IO_PAD104
+bit 405 O 1 IO_PAD104 404 1 Z
+bit 404 C 1 *
+bit 403 I 1 IO_PAD103
+bit 402 O 1 IO_PAD103 401 1 Z
+bit 401 C 1 *
+bit 400 I 1 IO_PAD102
+bit 399 O 1 IO_PAD102 398 1 Z
+bit 398 C 1 *
+bit 397 I 1 IO_PAD101
+bit 396 O 1 IO_PAD101 395 1 Z
+bit 395 C 1 *
+bit 394 I 1 IO_PAD100
+bit 393 O 1 IO_PAD100 392 1 Z
+bit 392 C 1 *
+bit 391 O 1 *
+bit 390 I 1 HSWAP_EN_PAD96
+bit 389 I 1 IO_PAD95
+bit 388 O 1 IO_PAD95 387 1 Z
+bit 387 C 1 *
+bit 386 I 1 IO_PAD94
+bit 385 O 1 IO_PAD94 384 1 Z
+bit 384 C 1 *
+bit 383 I 1 IO_PAD93
+bit 382 O 1 IO_PAD93 381 1 Z
+bit 381 C 1 *
+bit 380 I 1 IO_PAD89
+bit 379 O 1 IO_PAD89 378 1 Z
+bit 378 C 1 *
+bit 377 I 1 IO_PAD88
+bit 376 O 1 IO_PAD88 375 1 Z
+bit 375 C 1 *
+bit 374 I 1 IO_PAD86
+bit 373 O 1 IO_PAD86 372 1 Z
+bit 372 C 1 *
+bit 371 I 1 IO_PAD85
+bit 370 O 1 IO_PAD85 369 1 Z
+bit 369 C 1 *
+bit 368 I 1 IO_PAD84
+bit 367 O 1 IO_PAD84 366 1 Z
+bit 366 C 1 *
+bit 365 I 1 IO_PAD83
+bit 364 O 1 IO_PAD83 363 1 Z
+bit 363 C 1 *
+bit 362 I 1 IO_PAD82
+bit 361 O 1 IO_PAD82 360 1 Z
+bit 360 C 1 *
+bit 359 I 1 IO_PAD80
+bit 358 O 1 IO_PAD80 357 1 Z
+bit 357 C 1 *
+bit 356 I 1 IO_PAD78
+bit 355 O 1 IO_PAD78 354 1 Z
+bit 354 C 1 *
+bit 353 I 1 IO_PAD77
+bit 352 O 1 IO_PAD77 351 1 Z
+bit 351 C 1 *
+bit 350 I 1 IO_PAD76
+bit 349 O 1 IO_PAD76 348 1 Z
+bit 348 C 1 *
+bit 347 I 1 IO_PAD75
+bit 346 O 1 IO_PAD75 345 1 Z
+bit 345 C 1 *
+bit 344 I 1 IO_PAD74
+bit 343 O 1 IO_PAD74 342 1 Z
+bit 342 C 1 *
+bit 341 I 1 IO_PAD72
+bit 340 O 1 IO_PAD72 339 1 Z
+bit 339 C 1 *
+bit 338 I 1 IO_PAD70
+bit 337 O 1 IO_PAD70 336 1 Z
+bit 336 C 1 *
+bit 335 I 1 IO_PAD68
+bit 334 O 1 IO_PAD68 333 1 Z
+bit 333 C 1 *
+bit 332 I 1 IO_PAD66
+bit 331 O 1 IO_PAD66 330 1 Z
+bit 330 C 1 *
+bit 329 I 1 IO_PAD65
+bit 328 O 1 IO_PAD65 327 1 Z
+bit 327 C 1 *
+bit 326 I 1 IO_PAD64
+bit 325 O 1 IO_PAD64 324 1 Z
+bit 324 C 1 *
+bit 323 I 1 IO_PAD62
+bit 322 O 1 IO_PAD62 321 1 Z
+bit 321 C 1 *
+bit 320 I 1 IO_PAD61
+bit 319 O 1 IO_PAD61 318 1 Z
+bit 318 C 1 *
+bit 317 I 1 IO_PAD60
+bit 316 O 1 IO_PAD60 315 1 Z
+bit 315 C 1 *
+bit 314 I 1 IO_PAD58
+bit 313 O 1 IO_PAD58 312 1 Z
+bit 312 C 1 *
+bit 311 I 1 IO_PAD57
+bit 310 O 1 IO_PAD57 309 1 Z
+bit 309 C 1 *
+bit 308 I 1 IO_PAD56
+bit 307 O 1 IO_PAD56 306 1 Z
+bit 306 C 1 *
+bit 305 I 1 IO_PAD54
+bit 304 O 1 IO_PAD54 303 1 Z
+bit 303 C 1 *
+bit 302 I 1 IO_PAD52
+bit 301 O 1 IO_PAD52 300 1 Z
+bit 300 C 1 *
+bit 299 I 1 IO_PAD51
+bit 298 O 1 IO_PAD51 297 1 Z
+bit 297 C 1 *
+bit 296 I 1 IO_PAD50
+bit 295 O 1 IO_PAD50 294 1 Z
+bit 294 C 1 *
+bit 293 I 1 IO_PAD49
+bit 292 O 1 IO_PAD49 291 1 Z
+bit 291 C 1 *
+bit 290 I 1 IO_PAD48
+bit 289 O 1 IO_PAD48 288 1 Z
+bit 288 C 1 *
+bit 287 I 1 IO_PAD46
+bit 286 O 1 IO_PAD46 285 1 Z
+bit 285 C 1 *
+bit 284 I 1 IO_PAD44
+bit 283 O 1 IO_PAD44 282 1 Z
+bit 282 C 1 *
+bit 281 I 1 IO_PAD42
+bit 280 O 1 IO_PAD42 279 1 Z
+bit 279 C 1 *
+bit 278 I 1 IO_PAD40
+bit 277 O 1 IO_PAD40 276 1 Z
+bit 276 C 1 *
+bit 275 I 1 IO_PAD38
+bit 274 O 1 IO_PAD38 273 1 Z
+bit 273 C 1 *
+bit 272 I 1 IO_PAD36
+bit 271 O 1 IO_PAD36 270 1 Z
+bit 270 C 1 *
+bit 269 I 1 IO_PAD35
+bit 268 O 1 IO_PAD35 267 1 Z
+bit 267 C 1 *
+bit 266 I 1 IO_PAD34
+bit 265 O 1 IO_PAD34 264 1 Z
+bit 264 C 1 *
+bit 263 I 1 IO_PAD33
+bit 262 O 1 IO_PAD33 261 1 Z
+bit 261 C 1 *
+bit 260 I 1 IO_PAD32
+bit 259 O 1 IO_PAD32 258 1 Z
+bit 258 C 1 *
+bit 257 I 1 IO_PAD31
+bit 256 O 1 IO_PAD31 255 1 Z
+bit 255 C 1 *
+bit 254 I 1 IO_PAD30
+bit 253 O 1 IO_PAD30 252 1 Z
+bit 252 C 1 *
+bit 251 I 1 IO_PAD28
+bit 250 O 1 IO_PAD28 249 1 Z
+bit 249 C 1 *
+bit 248 I 1 IO_PAD26
+bit 247 O 1 IO_PAD26 246 1 Z
+bit 246 C 1 *
+bit 245 I 1 IO_PAD25
+bit 244 O 1 IO_PAD25 243 1 Z
+bit 243 C 1 *
+bit 242 I 1 IO_PAD24
+bit 241 O 1 IO_PAD24 240 1 Z
+bit 240 C 1 *
+bit 239 I 1 IO_PAD23
+bit 238 O 1 IO_PAD23 237 1 Z
+bit 237 C 1 *
+bit 236 I 1 IO_PAD22
+bit 235 O 1 IO_PAD22 234 1 Z
+bit 234 C 1 *
+bit 233 I 1 IO_PAD20
+bit 232 O 1 IO_PAD20 231 1 Z
+bit 231 C 1 *
+bit 230 I 1 IO_PAD18
+bit 229 O 1 IO_PAD18 228 1 Z
+bit 228 C 1 *
+bit 227 I 1 IO_PAD16
+bit 226 O 1 IO_PAD16 225 1 Z
+bit 225 C 1 *
+bit 224 I 1 IO_PAD14
+bit 223 O 1 IO_PAD14 222 1 Z
+bit 222 C 1 *
+bit 221 I 1 IO_PAD13
+bit 220 O 1 IO_PAD13 219 1 Z
+bit 219 C 1 *
+bit 218 I 1 IO_PAD12
+bit 217 O 1 IO_PAD12 216 1 Z
+bit 216 C 1 *
+bit 215 I 1 IO_PAD10
+bit 214 O 1 IO_PAD10 213 1 Z
+bit 213 C 1 *
+bit 212 I 1 IO_PAD9
+bit 211 O 1 IO_PAD9 210 1 Z
+bit 210 C 1 *
+bit 209 I 1 IO_PAD8
+bit 208 O 1 IO_PAD8 207 1 Z
+bit 207 C 1 *
+bit 206 I 1 IO_PAD6
+bit 205 O 1 IO_PAD6 204 1 Z
+bit 204 C 1 *
+bit 203 I 1 IO_PAD4
+bit 202 O 1 IO_PAD4 201 1 Z
+bit 201 C 1 *
+bit 200 I 1 IO_PAD3
+bit 199 O 1 IO_PAD3 198 1 Z
+bit 198 C 1 *
+bit 197 I 1 IO_PAD2
+bit 196 O 1 IO_PAD2 195 1 Z
+bit 195 C 1 *
+bit 194 I 1 IO_PAD721
+bit 193 O 1 IO_PAD721 192 1 Z
+bit 192 C 1 *
+bit 191 I 1 IO_PAD720
+bit 190 O 1 IO_PAD720 189 1 Z
+bit 189 C 1 *
+bit 188 I 1 IO_PAD719
+bit 187 O 1 IO_PAD719 186 1 Z
+bit 186 C 1 *
+bit 185 I 1 IO_PAD717
+bit 184 O 1 IO_PAD717 183 1 Z
+bit 183 C 1 *
+bit 182 I 1 IO_PAD715
+bit 181 O 1 IO_PAD715 180 1 Z
+bit 180 C 1 *
+bit 179 I 1 IO_PAD714
+bit 178 O 1 IO_PAD714 177 1 Z
+bit 177 C 1 *
+bit 176 I 1 IO_PAD713
+bit 175 O 1 IO_PAD713 174 1 Z
+bit 174 C 1 *
+bit 173 I 1 IO_PAD711
+bit 172 O 1 IO_PAD711 171 1 Z
+bit 171 C 1 *
+bit 170 I 1 IO_PAD710
+bit 169 O 1 IO_PAD710 168 1 Z
+bit 168 C 1 *
+bit 167 I 1 IO_PAD709
+bit 166 O 1 IO_PAD709 165 1 Z
+bit 165 C 1 *
+bit 164 I 1 IO_PAD707
+bit 163 O 1 IO_PAD707 162 1 Z
+bit 162 C 1 *
+bit 161 I 1 IO_PAD705
+bit 160 O 1 IO_PAD705 159 1 Z
+bit 159 C 1 *
+bit 158 I 1 IO_PAD703
+bit 157 O 1 IO_PAD703 156 1 Z
+bit 156 C 1 *
+bit 155 I 1 IO_PAD701
+bit 154 O 1 IO_PAD701 153 1 Z
+bit 153 C 1 *
+bit 152 I 1 IO_PAD700
+bit 151 O 1 IO_PAD700 150 1 Z
+bit 150 C 1 *
+bit 149 I 1 IO_PAD699
+bit 148 O 1 IO_PAD699 147 1 Z
+bit 147 C 1 *
+bit 146 I 1 IO_PAD698
+bit 145 O 1 IO_PAD698 144 1 Z
+bit 144 C 1 *
+bit 143 I 1 IO_PAD697
+bit 142 O 1 IO_PAD697 141 1 Z
+bit 141 C 1 *
+bit 140 I 1 IO_PAD695
+bit 139 O 1 IO_PAD695 138 1 Z
+bit 138 C 1 *
+bit 137 I 1 IO_PAD693
+bit 136 O 1 IO_PAD693 135 1 Z
+bit 135 C 1 *
+bit 134 I 1 IO_PAD692
+bit 133 O 1 IO_PAD692 132 1 Z
+bit 132 C 1 *
+bit 131 I 1 IO_PAD691
+bit 130 O 1 IO_PAD691 129 1 Z
+bit 129 C 1 *
+bit 128 I 1 IO_PAD690
+bit 127 O 1 IO_PAD690 126 1 Z
+bit 126 C 1 *
+bit 125 I 1 IO_PAD689
+bit 124 O 1 IO_PAD689 123 1 Z
+bit 123 C 1 *
+bit 122 I 1 IO_PAD688
+bit 121 O 1 IO_PAD688 120 1 Z
+bit 120 C 1 *
+bit 119 I 1 IO_PAD687
+bit 118 O 1 IO_PAD687 117 1 Z
+bit 117 C 1 *
+bit 116 I 1 IO_PAD685
+bit 115 O 1 IO_PAD685 114 1 Z
+bit 114 C 1 *
+bit 113 I 1 IO_PAD683
+bit 112 O 1 IO_PAD683 111 1 Z
+bit 111 C 1 *
+bit 110 I 1 IO_PAD681
+bit 109 O 1 IO_PAD681 108 1 Z
+bit 108 C 1 *
+bit 107 I 1 IO_PAD679
+bit 106 O 1 IO_PAD679 105 1 Z
+bit 105 C 1 *
+bit 104 I 1 IO_PAD677
+bit 103 O 1 IO_PAD677 102 1 Z
+bit 102 C 1 *
+bit 101 I 1 IO_PAD675
+bit 100 O 1 IO_PAD675 99 1 Z
+bit 99 C 1 *
+bit 98 I 1 IO_PAD674
+bit 97 O 1 IO_PAD674 96 1 Z
+bit 96 C 1 *
+bit 95 I 1 IO_PAD673
+bit 94 O 1 IO_PAD673 93 1 Z
+bit 93 C 1 *
+bit 92 I 1 IO_PAD672
+bit 91 O 1 IO_PAD672 90 1 Z
+bit 90 C 1 *
+bit 89 I 1 IO_PAD671
+bit 88 O 1 IO_PAD671 87 1 Z
+bit 87 C 1 *
+bit 86 I 1 IO_PAD669
+bit 85 O 1 IO_PAD669 84 1 Z
+bit 84 C 1 *
+bit 83 I 1 IO_PAD667
+bit 82 O 1 IO_PAD667 81 1 Z
+bit 81 C 1 *
+bit 80 I 1 IO_PAD666
+bit 79 O 1 IO_PAD666 78 1 Z
+bit 78 C 1 *
+bit 77 I 1 IO_PAD665
+bit 76 O 1 IO_PAD665 75 1 Z
+bit 75 C 1 *
+bit 74 I 1 IO_PAD663
+bit 73 O 1 IO_PAD663 72 1 Z
+bit 72 C 1 *
+bit 71 I 1 IO_PAD662
+bit 70 O 1 IO_PAD662 69 1 Z
+bit 69 C 1 *
+bit 68 I 1 IO_PAD661
+bit 67 O 1 IO_PAD661 66 1 Z
+bit 66 C 1 *
+bit 65 I 1 IO_PAD659
+bit 64 O 1 IO_PAD659 63 1 Z
+bit 63 C 1 *
+bit 62 I 1 IO_PAD658
+bit 61 O 1 IO_PAD658 60 1 Z
+bit 60 C 1 *
+bit 59 I 1 IO_PAD657
+bit 58 O 1 IO_PAD657 57 1 Z
+bit 57 C 1 *
+bit 56 I 1 IO_PAD655
+bit 55 O 1 IO_PAD655 54 1 Z
+bit 54 C 1 *
+bit 53 I 1 IO_PAD653
+bit 52 O 1 IO_PAD653 51 1 Z
+bit 51 C 1 *
+bit 50 I 1 IO_PAD651
+bit 49 O 1 IO_PAD651 48 1 Z
+bit 48 C 1 *
+bit 47 I 1 IO_PAD649
+bit 46 O 1 IO_PAD649 45 1 Z
+bit 45 C 1 *
+bit 44 I 1 IO_PAD648
+bit 43 O 1 IO_PAD648 42 1 Z
+bit 42 C 1 *
+bit 41 I 1 IO_PAD647
+bit 40 O 1 IO_PAD647 39 1 Z
+bit 39 C 1 *
+bit 38 I 1 IO_PAD646
+bit 37 O 1 IO_PAD646 36 1 Z
+bit 36 C 1 *
+bit 35 I 1 IO_PAD645
+bit 34 O 1 IO_PAD645 33 1 Z
+bit 33 C 1 *
+bit 32 I 1 IO_PAD643
+bit 31 O 1 IO_PAD643 30 1 Z
+bit 30 C 1 *
+bit 29 I 1 IO_PAD641
+bit 28 O 1 IO_PAD641 27 1 Z
+bit 27 C 1 *
+bit 26 I 1 IO_PAD640
+bit 25 O 1 IO_PAD640 24 1 Z
+bit 24 C 1 *
+bit 23 I 1 IO_PAD639
+bit 22 O 1 IO_PAD639 21 1 Z
+bit 21 C 1 *
+bit 20 I 1 IO_PAD638
+bit 19 O 1 IO_PAD638 18 1 Z
+bit 18 C 1 *
+bit 17 I 1 IO_PAD637
+bit 16 O 1 IO_PAD637 15 1 Z
+bit 15 C 1 *
+bit 14 I 1 IO_PAD635
+bit 13 O 1 IO_PAD635 12 1 Z
+bit 12 C 1 *
+bit 11 I 1 IO_PAD634
+bit 10 O 1 IO_PAD634 9 1 Z
+bit 9 C 1 *
+bit 8 I 1 IO_PAD633
+bit 7 O 1 IO_PAD633 6 1 Z
+bit 6 C 1 *
+bit 5 I 1 IO_PAD631
+bit 4 O 1 IO_PAD631 3 1 Z
+bit 3 C 1 *
+bit 2 I 1 IO_PAD630
+bit 1 O 1 IO_PAD630 0 1 Z
+bit 0 C 1 *
--- /dev/null
+signal GND1
+signal GND2
+signal GND3
+signal GND4
+signal GND5
+signal GND6
+signal GND7
+signal GND8
+signal GND9
+signal GND10
+signal GND11
+signal GND12
+signal GND13
+signal GND14
+signal GND15
+signal GND16
+signal GND17
+signal GND18
+signal GND19
+signal GND20
+signal GND21
+signal GND22
+signal GND23
+signal GND24
+signal GND25
+signal GND26
+signal GND27
+signal GND28
+signal GND29
+signal GND30
+signal GND31
+signal GND32
+signal GND33
+signal GND34
+signal GND35
+signal GND36
+signal GND37
+signal GND38
+signal GND39
+signal GND40
+signal CCLK_T15
+signal DONE_R15
+signal HSWAP_EN_E6
+signal M0_P5
+signal M1_U3
+signal M2_R4
+signal PROG_B
+signal TCK
+signal TDI
+signal TDO
+signal TMS
+signal VCCAUX1
+signal VCCAUX2
+signal VCCAUX3
+signal VCCAUX4
+signal VCCAUX5
+signal VCCAUX6
+signal VCCAUX7
+signal VCCAUX8
+signal VCCINT1
+signal VCCINT2
+signal VCCINT3
+signal VCCINT4
+signal VCCINT5
+signal VCCINT6
+signal VCCINT7
+signal VCCINT8
+signal VCCINT9
+signal VCCINT10
+signal VCCINT11
+signal VCCINT12
+signal VCCO01
+signal VCCO02
+signal VCCO03
+signal VCCO04
+signal VCCO11
+signal VCCO12
+signal VCCO13
+signal VCCO14
+signal VCCO21
+signal VCCO22
+signal VCCO23
+signal VCCO31
+signal VCCO32
+signal VCCO33
+signal VCCO41
+signal VCCO42
+signal VCCO43
+signal VCCO44
+signal VCCO51
+signal VCCO52
+signal VCCO53
+signal VCCO54
+signal VCCO61
+signal VCCO62
+signal VCCO63
+signal VCCO71
+signal VCCO72
+signal VCCO73
+signal IO_A2
+signal IO_A3
+signal IO_A4
+signal IO_A5
+signal IO_A7
+signal IO_A8
+signal IO_A9
+signal IO_A10
+signal IO_A11
+signal IO_A12
+signal IO_A14
+signal IO_A15
+signal IO_A16
+signal IO_A17
+signal IO_B1
+signal IO_B3
+signal IO_B4
+signal IO_B5
+signal IO_B6
+signal IO_B9
+signal IO_B10
+signal IO_B13
+signal IO_B14
+signal IO_B15
+signal IO_B18
+signal IO_C1
+signal IO_C2
+signal IO_C3
+signal IO_C4
+signal IO_C5
+signal IO_C7
+signal IO_C8
+signal IO_C11
+signal IO_C12
+signal IO_C14
+signal IO_C15
+signal IO_C16
+signal IO_C17
+signal IO_C18
+signal IO_D1
+signal IO_D2
+signal IO_D3
+signal IO_D5
+signal IO_D6
+signal IO_D7
+signal IO_D8
+signal IO_D9
+signal IO_D10
+signal IO_D11
+signal IO_D12
+signal IO_D13
+signal IO_D14
+signal IO_D16
+signal IO_D17
+signal IO_D18
+signal IO_E1
+signal IO_E2
+signal IO_E3
+signal IO_E4
+signal IO_E7
+signal IO_E8
+signal IO_E9
+signal IO_E10
+signal IO_E11
+signal IO_E12
+signal IO_E13
+signal IO_E15
+signal IO_E16
+signal IO_E17
+signal IO_E18
+signal IO_F2
+signal IO_F4
+signal IO_F5
+signal IO_F8
+signal IO_F9
+signal IO_F10
+signal IO_F11
+signal IO_F14
+signal IO_F15
+signal IO_F17
+signal IO_G1
+signal IO_G3
+signal IO_G4
+signal IO_G5
+signal IO_G14
+signal IO_G15
+signal IO_G16
+signal IO_G18
+signal IO_H1
+signal IO_H2
+signal IO_H3
+signal IO_H4
+signal IO_H5
+signal IO_H6
+signal IO_H13
+signal IO_H14
+signal IO_H15
+signal IO_H16
+signal IO_H17
+signal IO_H18
+signal IO_J1
+signal IO_J2
+signal IO_J4
+signal IO_J5
+signal IO_J6
+signal IO_J13
+signal IO_J14
+signal IO_J15
+signal IO_J17
+signal IO_J18
+signal IO_K1
+signal IO_K2
+signal IO_K4
+signal IO_K5
+signal IO_K6
+signal IO_K13
+signal IO_K14
+signal IO_K15
+signal IO_K17
+signal IO_K18
+signal IO_L1
+signal IO_L2
+signal IO_L3
+signal IO_L4
+signal IO_L5
+signal IO_L6
+signal IO_L13
+signal IO_L14
+signal IO_L15
+signal IO_L16
+signal IO_L17
+signal IO_L18
+signal IO_M1
+signal IO_M3
+signal IO_M4
+signal IO_M5
+signal IO_M14
+signal IO_M15
+signal IO_M16
+signal IO_M18
+signal IO_N2
+signal IO_N4
+signal IO_N5
+signal IO_N8
+signal IO_N9
+signal IO_N10
+signal IO_N11
+signal IO_N14
+signal IO_N15
+signal IO_N17
+signal IO_P1
+signal IO_P2
+signal IO_P3
+signal IO_P4
+signal IO_P6
+signal IO_P7
+signal IO_P8
+signal IO_P9
+signal IO_P10
+signal IO_P11
+signal IO_P12
+signal IO_P13
+signal IO_P14
+signal IO_P15
+signal IO_P16
+signal IO_P17
+signal IO_P18
+signal IO_R1
+signal IO_R2
+signal IO_R3
+signal IO_R5
+signal IO_R6
+signal IO_R7
+signal IO_R8
+signal IO_R9
+signal IO_R10
+signal IO_R11
+signal IO_R12
+signal IO_R13
+signal IO_R14
+signal IO_R16
+signal IO_R17
+signal IO_R18
+signal IO_T1
+signal IO_T2
+signal IO_T3
+signal IO_T4
+signal IO_T5
+signal IO_T7
+signal IO_T8
+signal IO_T11
+signal IO_T12
+signal IO_T14
+signal IO_T16
+signal IO_T17
+signal IO_T18
+signal IO_U1
+signal IO_U4
+signal IO_U5
+signal IO_U6
+signal IO_U9
+signal IO_U10
+signal IO_U13
+signal IO_U14
+signal IO_U15
+signal IO_U16
+signal IO_U18
+signal IO_V2
+signal IO_V3
+signal IO_V4
+signal IO_V5
+signal IO_V7
+signal IO_V8
+signal IO_V9
+signal IO_V10
+signal IO_V11
+signal IO_V12
+signal IO_V14
+signal IO_V15
+signal IO_V16
+
+register BSR 1559
+register BR 1
+register DIR 32
+
+instruction length 6
+
+instruction EXTEST 000000 BSR
+instruction SAMPLE/PRELOAD 000001 BSR
+instruction IDCODE 001001 DIR
+instruction BYPASS 111111 BR
+
+bit 1558 I 1 IO_C16
+bit 1557 O 1 IO_C16 1556 1 Z
+bit 1556 C 1 *
+bit 1555 I 1 IO_C17
+bit 1554 O 1 IO_C17 1553 1 Z
+bit 1553 C 1 *
+bit 1552 O 1 *
+bit 1551 O 1 *
+bit 1550 O 1 *
+bit 1549 O 1 *
+bit 1548 O 1 *
+bit 1547 O 1 *
+bit 1546 O 1 *
+bit 1545 O 1 *
+bit 1544 O 1 *
+bit 1543 O 1 *
+bit 1542 O 1 *
+bit 1541 O 1 *
+bit 1540 O 1 *
+bit 1539 O 1 *
+bit 1538 O 1 *
+bit 1537 O 1 *
+bit 1536 O 1 *
+bit 1535 O 1 *
+bit 1534 O 1 *
+bit 1533 O 1 *
+bit 1532 O 1 *
+bit 1531 O 1 *
+bit 1530 O 1 *
+bit 1529 O 1 *
+bit 1528 O 1 *
+bit 1527 O 1 *
+bit 1526 O 1 *
+bit 1525 O 1 *
+bit 1524 O 1 *
+bit 1523 O 1 *
+bit 1522 O 1 *
+bit 1521 O 1 *
+bit 1520 O 1 *
+bit 1519 O 1 *
+bit 1518 O 1 *
+bit 1517 O 1 *
+bit 1516 O 1 *
+bit 1515 O 1 *
+bit 1514 O 1 *
+bit 1513 O 1 *
+bit 1512 O 1 *
+bit 1511 O 1 *
+bit 1510 O 1 *
+bit 1509 O 1 *
+bit 1508 O 1 *
+bit 1507 O 1 *
+bit 1506 O 1 *
+bit 1505 O 1 *
+bit 1504 O 1 *
+bit 1503 O 1 *
+bit 1502 O 1 *
+bit 1501 O 1 *
+bit 1500 O 1 *
+bit 1499 O 1 *
+bit 1498 I 1 IO_B18
+bit 1497 O 1 IO_B18 1496 1 Z
+bit 1496 C 1 *
+bit 1495 I 1 IO_C18
+bit 1494 O 1 IO_C18 1493 1 Z
+bit 1493 C 1 *
+bit 1492 I 1 IO_D17
+bit 1491 O 1 IO_D17 1490 1 Z
+bit 1490 C 1 *
+bit 1489 I 1 IO_D18
+bit 1488 O 1 IO_D18 1487 1 Z
+bit 1487 C 1 *
+bit 1486 I 1 IO_D16
+bit 1485 O 1 IO_D16 1484 1 Z
+bit 1484 C 1 *
+bit 1483 I 1 IO_E16
+bit 1482 O 1 IO_E16 1481 1 Z
+bit 1481 C 1 *
+bit 1480 I 1 IO_E17
+bit 1479 O 1 IO_E17 1478 1 Z
+bit 1478 C 1 *
+bit 1477 I 1 IO_E18
+bit 1476 O 1 IO_E18 1475 1 Z
+bit 1475 C 1 *
+bit 1474 I 1 IO_F15
+bit 1473 O 1 IO_F15 1472 1 Z
+bit 1472 C 1 *
+bit 1471 I 1 IO_E15
+bit 1470 O 1 IO_E15 1469 1 Z
+bit 1469 C 1 *
+bit 1468 I 1 IO_F14
+bit 1467 O 1 IO_F14 1466 1 Z
+bit 1466 C 1 *
+bit 1465 I 1 IO_G14
+bit 1464 O 1 IO_G14 1463 1 Z
+bit 1463 C 1 *
+bit 1462 I 1 IO_G18
+bit 1461 O 1 IO_G18 1460 1 Z
+bit 1460 C 1 *
+bit 1459 I 1 IO_F17
+bit 1458 O 1 IO_F17 1457 1 Z
+bit 1457 C 1 *
+bit 1456 I 1 IO_G15
+bit 1455 O 1 IO_G15 1454 1 Z
+bit 1454 C 1 *
+bit 1453 I 1 IO_G16
+bit 1452 O 1 IO_G16 1451 1 Z
+bit 1451 C 1 *
+bit 1450 O 1 *
+bit 1449 O 1 *
+bit 1448 O 1 *
+bit 1447 O 1 *
+bit 1446 O 1 *
+bit 1445 O 1 *
+bit 1444 I 1 IO_H13
+bit 1443 O 1 IO_H13 1442 1 Z
+bit 1442 C 1 *
+bit 1441 I 1 IO_H14
+bit 1440 O 1 IO_H14 1439 1 Z
+bit 1439 C 1 *
+bit 1438 O 1 *
+bit 1437 O 1 *
+bit 1436 O 1 *
+bit 1435 O 1 *
+bit 1434 O 1 *
+bit 1433 O 1 *
+bit 1432 O 1 *
+bit 1431 O 1 *
+bit 1430 O 1 *
+bit 1429 O 1 *
+bit 1428 O 1 *
+bit 1427 O 1 *
+bit 1426 O 1 *
+bit 1425 O 1 *
+bit 1424 O 1 *
+bit 1423 O 1 *
+bit 1422 O 1 *
+bit 1421 O 1 *
+bit 1420 O 1 *
+bit 1419 O 1 *
+bit 1418 O 1 *
+bit 1417 O 1 *
+bit 1416 O 1 *
+bit 1415 O 1 *
+bit 1414 O 1 *
+bit 1413 O 1 *
+bit 1412 O 1 *
+bit 1411 O 1 *
+bit 1410 O 1 *
+bit 1409 O 1 *
+bit 1408 O 1 *
+bit 1407 O 1 *
+bit 1406 O 1 *
+bit 1405 O 1 *
+bit 1404 O 1 *
+bit 1403 O 1 *
+bit 1402 I 1 IO_H16
+bit 1401 O 1 IO_H16 1400 1 Z
+bit 1400 C 1 *
+bit 1399 I 1 IO_H15
+bit 1398 O 1 IO_H15 1397 1 Z
+bit 1397 C 1 *
+bit 1396 I 1 IO_H17
+bit 1395 O 1 IO_H17 1394 1 Z
+bit 1394 C 1 *
+bit 1393 I 1 IO_H18
+bit 1392 O 1 IO_H18 1391 1 Z
+bit 1391 C 1 *
+bit 1390 O 1 *
+bit 1389 O 1 *
+bit 1388 O 1 *
+bit 1387 O 1 *
+bit 1386 O 1 *
+bit 1385 O 1 *
+bit 1384 O 1 *
+bit 1383 O 1 *
+bit 1382 O 1 *
+bit 1381 I 1 IO_J13
+bit 1380 O 1 IO_J13 1379 1 Z
+bit 1379 C 1 *
+bit 1378 I 1 IO_J18
+bit 1377 O 1 IO_J18 1376 1 Z
+bit 1376 C 1 *
+bit 1375 I 1 IO_J17
+bit 1374 O 1 IO_J17 1373 1 Z
+bit 1373 C 1 *
+bit 1372 I 1 IO_J15
+bit 1371 O 1 IO_J15 1370 1 Z
+bit 1370 C 1 *
+bit 1369 I 1 IO_J14
+bit 1368 O 1 IO_J14 1367 1 Z
+bit 1367 C 1 *
+bit 1366 I 1 IO_K17
+bit 1365 O 1 IO_K17 1364 1 Z
+bit 1364 C 1 *
+bit 1363 I 1 IO_K18
+bit 1362 O 1 IO_K18 1361 1 Z
+bit 1361 C 1 *
+bit 1360 I 1 IO_K13
+bit 1359 O 1 IO_K13 1358 1 Z
+bit 1358 C 1 *
+bit 1357 I 1 IO_K14
+bit 1356 O 1 IO_K14 1355 1 Z
+bit 1355 C 1 *
+bit 1354 I 1 IO_K15
+bit 1353 O 1 IO_K15 1352 1 Z
+bit 1352 C 1 *
+bit 1351 O 1 *
+bit 1350 O 1 *
+bit 1349 O 1 *
+bit 1348 O 1 *
+bit 1347 O 1 *
+bit 1346 O 1 *
+bit 1345 O 1 *
+bit 1344 O 1 *
+bit 1343 O 1 *
+bit 1342 I 1 IO_L18
+bit 1341 O 1 IO_L18 1340 1 Z
+bit 1340 C 1 *
+bit 1339 I 1 IO_L17
+bit 1338 O 1 IO_L17 1337 1 Z
+bit 1337 C 1 *
+bit 1336 I 1 IO_L15
+bit 1335 O 1 IO_L15 1334 1 Z
+bit 1334 C 1 *
+bit 1333 I 1 IO_L16
+bit 1332 O 1 IO_L16 1331 1 Z
+bit 1331 C 1 *
+bit 1330 O 1 *
+bit 1329 O 1 *
+bit 1328 O 1 *
+bit 1327 O 1 *
+bit 1326 O 1 *
+bit 1325 O 1 *
+bit 1324 O 1 *
+bit 1323 O 1 *
+bit 1322 O 1 *
+bit 1321 O 1 *
+bit 1320 O 1 *
+bit 1319 O 1 *
+bit 1318 O 1 *
+bit 1317 O 1 *
+bit 1316 O 1 *
+bit 1315 O 1 *
+bit 1314 O 1 *
+bit 1313 O 1 *
+bit 1312 O 1 *
+bit 1311 O 1 *
+bit 1310 O 1 *
+bit 1309 O 1 *
+bit 1308 O 1 *
+bit 1307 O 1 *
+bit 1306 O 1 *
+bit 1305 O 1 *
+bit 1304 O 1 *
+bit 1303 O 1 *
+bit 1302 O 1 *
+bit 1301 O 1 *
+bit 1300 O 1 *
+bit 1299 O 1 *
+bit 1298 O 1 *
+bit 1297 O 1 *
+bit 1296 O 1 *
+bit 1295 O 1 *
+bit 1294 I 1 IO_L14
+bit 1293 O 1 IO_L14 1292 1 Z
+bit 1292 C 1 *
+bit 1291 I 1 IO_L13
+bit 1290 O 1 IO_L13 1289 1 Z
+bit 1289 C 1 *
+bit 1288 O 1 *
+bit 1287 O 1 *
+bit 1286 O 1 *
+bit 1285 O 1 *
+bit 1284 O 1 *
+bit 1283 O 1 *
+bit 1282 I 1 IO_M18
+bit 1281 O 1 IO_M18 1280 1 Z
+bit 1280 C 1 *
+bit 1279 I 1 IO_N17
+bit 1278 O 1 IO_N17 1277 1 Z
+bit 1277 C 1 *
+bit 1276 I 1 IO_M15
+bit 1275 O 1 IO_M15 1274 1 Z
+bit 1274 C 1 *
+bit 1273 I 1 IO_M16
+bit 1272 O 1 IO_M16 1271 1 Z
+bit 1271 C 1 *
+bit 1270 I 1 IO_M14
+bit 1269 O 1 IO_M14 1268 1 Z
+bit 1268 C 1 *
+bit 1267 I 1 IO_N14
+bit 1266 O 1 IO_N14 1265 1 Z
+bit 1265 C 1 *
+bit 1264 I 1 IO_P15
+bit 1263 O 1 IO_P15 1262 1 Z
+bit 1262 C 1 *
+bit 1261 I 1 IO_N15
+bit 1260 O 1 IO_N15 1259 1 Z
+bit 1259 C 1 *
+bit 1258 I 1 IO_P18
+bit 1257 O 1 IO_P18 1256 1 Z
+bit 1256 C 1 *
+bit 1255 I 1 IO_P17
+bit 1254 O 1 IO_P17 1253 1 Z
+bit 1253 C 1 *
+bit 1252 I 1 IO_R17
+bit 1251 O 1 IO_R17 1250 1 Z
+bit 1250 C 1 *
+bit 1249 I 1 IO_R18
+bit 1248 O 1 IO_R18 1247 1 Z
+bit 1247 C 1 *
+bit 1246 I 1 IO_P16
+bit 1245 O 1 IO_P16 1244 1 Z
+bit 1244 C 1 *
+bit 1243 I 1 IO_R16
+bit 1242 O 1 IO_R16 1241 1 Z
+bit 1241 C 1 *
+bit 1240 I 1 IO_T18
+bit 1239 O 1 IO_T18 1238 1 Z
+bit 1238 C 1 *
+bit 1237 I 1 IO_U18
+bit 1236 O 1 IO_U18 1235 1 Z
+bit 1235 C 1 *
+bit 1234 O 1 *
+bit 1233 O 1 *
+bit 1232 O 1 *
+bit 1231 O 1 *
+bit 1230 O 1 *
+bit 1229 O 1 *
+bit 1228 O 1 *
+bit 1227 O 1 *
+bit 1226 O 1 *
+bit 1225 O 1 *
+bit 1224 O 1 *
+bit 1223 O 1 *
+bit 1222 O 1 *
+bit 1221 O 1 *
+bit 1220 O 1 *
+bit 1219 O 1 *
+bit 1218 O 1 *
+bit 1217 O 1 *
+bit 1216 O 1 *
+bit 1215 O 1 *
+bit 1214 O 1 *
+bit 1213 O 1 *
+bit 1212 O 1 *
+bit 1211 O 1 *
+bit 1210 O 1 *
+bit 1209 O 1 *
+bit 1208 O 1 *
+bit 1207 O 1 *
+bit 1206 O 1 *
+bit 1205 O 1 *
+bit 1204 O 1 *
+bit 1203 O 1 *
+bit 1202 O 1 *
+bit 1201 O 1 *
+bit 1200 O 1 *
+bit 1199 O 1 *
+bit 1198 O 1 *
+bit 1197 O 1 *
+bit 1196 O 1 *
+bit 1195 O 1 *
+bit 1194 O 1 *
+bit 1193 O 1 *
+bit 1192 O 1 *
+bit 1191 O 1 *
+bit 1190 O 1 *
+bit 1189 O 1 *
+bit 1188 O 1 *
+bit 1187 O 1 *
+bit 1186 O 1 *
+bit 1185 O 1 *
+bit 1184 O 1 *
+bit 1183 O 1 *
+bit 1182 O 1 *
+bit 1181 O 1 *
+bit 1180 I 1 IO_T17
+bit 1179 O 1 IO_T17 1178 1 Z
+bit 1178 C 1 *
+bit 1177 I 1 IO_T16
+bit 1176 O 1 IO_T16 1175 1 Z
+bit 1175 C 1 *
+bit 1174 I 1 CCLK_T15
+bit 1173 O 1 CCLK_T15 1172 1 Z
+bit 1172 C 1 *
+bit 1171 I 1 DONE_R15
+bit 1170 O 1 DONE_R15 1169 1 Z
+bit 1169 C 1 *
+bit 1168 I 1 IO_V17
+bit 1167 O 1 IO_V17 1166 1 Z
+bit 1166 C 1 *
+bit 1165 I 1 IO_U16
+bit 1164 O 1 IO_U16 1163 1 Z
+bit 1163 C 1 *
+bit 1162 I 1 IO_V16
+bit 1161 O 1 IO_V16 1160 1 Z
+bit 1160 C 1 *
+bit 1159 O 1 *
+bit 1158 O 1 *
+bit 1157 O 1 *
+bit 1156 O 1 *
+bit 1155 O 1 *
+bit 1154 O 1 *
+bit 1153 O 1 *
+bit 1152 O 1 *
+bit 1151 O 1 *
+bit 1150 O 1 *
+bit 1149 O 1 *
+bit 1148 O 1 *
+bit 1147 O 1 *
+bit 1146 O 1 *
+bit 1145 O 1 *
+bit 1144 I 1 IO_P14
+bit 1143 O 1 IO_P14 1142 1 Z
+bit 1142 C 1 *
+bit 1141 I 1 IO_R14
+bit 1140 O 1 IO_R14 1139 1 Z
+bit 1139 C 1 *
+bit 1138 O 1 *
+bit 1137 O 1 *
+bit 1136 O 1 *
+bit 1135 O 1 *
+bit 1134 O 1 *
+bit 1133 O 1 *
+bit 1132 O 1 *
+bit 1131 O 1 *
+bit 1130 O 1 *
+bit 1129 O 1 *
+bit 1128 O 1 *
+bit 1127 O 1 *
+bit 1126 O 1 *
+bit 1125 O 1 *
+bit 1124 O 1 *
+bit 1123 O 1 *
+bit 1122 O 1 *
+bit 1121 O 1 *
+bit 1120 I 1 IO_U15
+bit 1119 O 1 IO_U15 1118 1 Z
+bit 1118 C 1 *
+bit 1117 I 1 IO_V15
+bit 1116 O 1 IO_V15 1115 1 Z
+bit 1115 C 1 *
+bit 1114 I 1 IO_T14
+bit 1113 O 1 IO_T14 1112 1 Z
+bit 1112 C 1 *
+bit 1111 I 1 IO_U14
+bit 1110 O 1 IO_U14 1109 1 Z
+bit 1109 C 1 *
+bit 1108 O 1 *
+bit 1107 O 1 *
+bit 1106 O 1 *
+bit 1105 O 1 *
+bit 1104 O 1 *
+bit 1103 O 1 *
+bit 1102 O 1 *
+bit 1101 O 1 *
+bit 1100 O 1 *
+bit 1099 O 1 *
+bit 1098 O 1 *
+bit 1097 O 1 *
+bit 1096 O 1 *
+bit 1095 O 1 *
+bit 1094 O 1 *
+bit 1093 O 1 *
+bit 1092 O 1 *
+bit 1091 O 1 *
+bit 1090 O 1 *
+bit 1089 O 1 *
+bit 1088 O 1 *
+bit 1087 O 1 *
+bit 1086 O 1 *
+bit 1085 O 1 *
+bit 1084 I 1 IO_V14
+bit 1083 O 1 IO_V14 1082 1 Z
+bit 1082 C 1 *
+bit 1081 O 1 *
+bit 1080 O 1 *
+bit 1079 O 1 *
+bit 1078 O 1 *
+bit 1077 O 1 *
+bit 1076 O 1 *
+bit 1075 O 1 *
+bit 1074 O 1 *
+bit 1073 O 1 *
+bit 1072 O 1 *
+bit 1071 O 1 *
+bit 1070 O 1 *
+bit 1069 O 1 *
+bit 1068 O 1 *
+bit 1067 O 1 *
+bit 1066 O 1 *
+bit 1065 O 1 *
+bit 1064 O 1 *
+bit 1063 I 1 IO_U13
+bit 1062 O 1 IO_U13 1061 1 Z
+bit 1061 C 1 *
+bit 1060 O 1 *
+bit 1059 O 1 *
+bit 1058 O 1 *
+bit 1057 O 1 *
+bit 1056 O 1 *
+bit 1055 O 1 *
+bit 1054 O 1 *
+bit 1053 O 1 *
+bit 1052 O 1 *
+bit 1051 O 1 *
+bit 1050 O 1 *
+bit 1049 O 1 *
+bit 1048 O 1 *
+bit 1047 O 1 *
+bit 1046 O 1 *
+bit 1045 O 1 *
+bit 1044 O 1 *
+bit 1043 O 1 *
+bit 1042 O 1 *
+bit 1041 O 1 *
+bit 1040 O 1 *
+bit 1039 O 1 *
+bit 1038 O 1 *
+bit 1037 O 1 *
+bit 1036 O 1 *
+bit 1035 O 1 *
+bit 1034 O 1 *
+bit 1033 O 1 *
+bit 1032 O 1 *
+bit 1031 O 1 *
+bit 1030 I 1 IO_R13
+bit 1029 O 1 IO_R13 1028 1 Z
+bit 1028 C 1 *
+bit 1027 I 1 IO_P13
+bit 1026 O 1 IO_P13 1025 1 Z
+bit 1025 C 1 *
+bit 1024 O 1 *
+bit 1023 O 1 *
+bit 1022 O 1 *
+bit 1021 O 1 *
+bit 1020 O 1 *
+bit 1019 O 1 *
+bit 1018 I 1 IO_P12
+bit 1017 O 1 IO_P12 1016 1 Z
+bit 1016 C 1 *
+bit 1015 I 1 IO_T12
+bit 1014 O 1 IO_T12 1013 1 Z
+bit 1013 C 1 *
+bit 1012 I 1 IO_R12
+bit 1011 O 1 IO_R12 1010 1 Z
+bit 1010 C 1 *
+bit 1009 I 1 IO_V12
+bit 1008 O 1 IO_V12 1007 1 Z
+bit 1007 C 1 *
+bit 1006 I 1 IO_V11
+bit 1005 O 1 IO_V11 1004 1 Z
+bit 1004 C 1 *
+bit 1003 O 1 *
+bit 1002 O 1 *
+bit 1001 O 1 *
+bit 1000 I 1 IO_R11
+bit 999 O 1 IO_R11 998 1 Z
+bit 998 C 1 *
+bit 997 I 1 IO_T11
+bit 996 O 1 IO_T11 995 1 Z
+bit 995 C 1 *
+bit 994 I 1 IO_N11
+bit 993 O 1 IO_N11 992 1 Z
+bit 992 C 1 *
+bit 991 I 1 IO_P11
+bit 990 O 1 IO_P11 989 1 Z
+bit 989 C 1 *
+bit 988 I 1 IO_R10
+bit 987 O 1 IO_R10 986 1 Z
+bit 986 C 1 *
+bit 985 I 1 IO_U10
+bit 984 O 1 IO_U10 983 1 Z
+bit 983 C 1 *
+bit 982 I 1 IO_V10
+bit 981 O 1 IO_V10 980 1 Z
+bit 980 C 1 *
+bit 979 I 1 IO_N10
+bit 978 O 1 IO_N10 977 1 Z
+bit 977 C 1 *
+bit 976 I 1 IO_P10
+bit 975 O 1 IO_P10 974 1 Z
+bit 974 C 1 *
+bit 973 I 1 IO_R9
+bit 972 O 1 IO_R9 971 1 Z
+bit 971 C 1 *
+bit 970 I 1 IO_N9
+bit 969 O 1 IO_N9 968 1 Z
+bit 968 C 1 *
+bit 967 I 1 IO_P9
+bit 966 O 1 IO_P9 965 1 Z
+bit 965 C 1 *
+bit 964 I 1 IO_U9
+bit 963 O 1 IO_U9 962 1 Z
+bit 962 C 1 *
+bit 961 I 1 IO_V9
+bit 960 O 1 IO_V9 959 1 Z
+bit 959 C 1 *
+bit 958 I 1 IO_N8
+bit 957 O 1 IO_N8 956 1 Z
+bit 956 C 1 *
+bit 955 I 1 IO_R8
+bit 954 O 1 IO_R8 953 1 Z
+bit 953 C 1 *
+bit 952 I 1 IO_T8
+bit 951 O 1 IO_T8 950 1 Z
+bit 950 C 1 *
+bit 949 I 1 IO_V8
+bit 948 O 1 IO_V8 947 1 Z
+bit 947 C 1 *
+bit 946 I 1 IO_V7
+bit 945 O 1 IO_V7 944 1 Z
+bit 944 C 1 *
+bit 943 I 1 IO_P8
+bit 942 O 1 IO_P8 941 1 Z
+bit 941 C 1 *
+bit 940 I 1 IO_R7
+bit 939 O 1 IO_R7 938 1 Z
+bit 938 C 1 *
+bit 937 I 1 IO_T7
+bit 936 O 1 IO_T7 935 1 Z
+bit 935 C 1 *
+bit 934 I 1 IO_P6
+bit 933 O 1 IO_P6 932 1 Z
+bit 932 C 1 *
+bit 931 I 1 IO_P7
+bit 930 O 1 IO_P7 929 1 Z
+bit 929 C 1 *
+bit 928 I 1 IO_U6
+bit 927 O 1 IO_U6 926 1 Z
+bit 926 C 1 *
+bit 925 O 1 *
+bit 924 O 1 *
+bit 923 O 1 *
+bit 922 O 1 *
+bit 921 O 1 *
+bit 920 O 1 *
+bit 919 O 1 *
+bit 918 O 1 *
+bit 917 O 1 *
+bit 916 O 1 *
+bit 915 O 1 *
+bit 914 O 1 *
+bit 913 O 1 *
+bit 912 O 1 *
+bit 911 O 1 *
+bit 910 O 1 *
+bit 909 O 1 *
+bit 908 O 1 *
+bit 907 O 1 *
+bit 906 O 1 *
+bit 905 O 1 *
+bit 904 O 1 *
+bit 903 O 1 *
+bit 902 O 1 *
+bit 901 O 1 *
+bit 900 O 1 *
+bit 899 O 1 *
+bit 898 O 1 *
+bit 897 O 1 *
+bit 896 O 1 *
+bit 895 O 1 *
+bit 894 O 1 *
+bit 893 O 1 *
+bit 892 O 1 *
+bit 891 O 1 *
+bit 890 O 1 *
+bit 889 O 1 *
+bit 888 O 1 *
+bit 887 O 1 *
+bit 886 O 1 *
+bit 885 O 1 *
+bit 884 O 1 *
+bit 883 O 1 *
+bit 882 O 1 *
+bit 881 O 1 *
+bit 880 O 1 *
+bit 879 O 1 *
+bit 878 O 1 *
+bit 877 O 1 *
+bit 876 O 1 *
+bit 875 O 1 *
+bit 874 O 1 *
+bit 873 O 1 *
+bit 872 O 1 *
+bit 871 O 1 *
+bit 870 O 1 *
+bit 869 O 1 *
+bit 868 O 1 *
+bit 867 O 1 *
+bit 866 O 1 *
+bit 865 I 1 IO_V5
+bit 864 O 1 IO_V5 863 1 Z
+bit 863 C 1 *
+bit 862 I 1 IO_U5
+bit 861 O 1 IO_U5 860 1 Z
+bit 860 C 1 *
+bit 859 I 1 IO_R6
+bit 858 O 1 IO_R6 857 1 Z
+bit 857 C 1 *
+bit 856 I 1 IO_R5
+bit 855 O 1 IO_R5 854 1 Z
+bit 854 C 1 *
+bit 853 O 1 *
+bit 852 O 1 *
+bit 851 O 1 *
+bit 850 O 1 *
+bit 849 O 1 *
+bit 848 O 1 *
+bit 847 O 1 *
+bit 846 O 1 *
+bit 845 O 1 *
+bit 844 O 1 *
+bit 843 O 1 *
+bit 842 O 1 *
+bit 841 O 1 *
+bit 840 O 1 *
+bit 839 O 1 *
+bit 838 O 1 *
+bit 837 O 1 *
+bit 836 O 1 *
+bit 835 I 1 IO_V4
+bit 834 O 1 IO_V4 833 1 Z
+bit 833 C 1 *
+bit 832 I 1 IO_U4
+bit 831 O 1 IO_U4 830 1 Z
+bit 830 C 1 *
+bit 829 O 1 *
+bit 828 O 1 *
+bit 827 O 1 *
+bit 826 O 1 *
+bit 825 O 1 *
+bit 824 O 1 *
+bit 823 O 1 *
+bit 822 O 1 *
+bit 821 O 1 *
+bit 820 O 1 *
+bit 819 O 1 *
+bit 818 O 1 *
+bit 817 O 1 *
+bit 816 O 1 *
+bit 815 O 1 *
+bit 814 O 1 *
+bit 813 O 1 *
+bit 812 O 1 *
+bit 811 O 1 *
+bit 810 O 1 *
+bit 809 O 1 *
+bit 808 O 1 *
+bit 807 O 1 *
+bit 806 O 1 *
+bit 805 I 1 IO_T5
+bit 804 O 1 IO_T5 803 1 Z
+bit 803 C 1 *
+bit 802 I 1 IO_T4
+bit 801 O 1 IO_T4 800 1 Z
+bit 800 C 1 *
+bit 799 O 1 *
+bit 798 O 1 *
+bit 797 O 1 *
+bit 796 O 1 *
+bit 795 O 1 *
+bit 794 O 1 *
+bit 793 O 1 *
+bit 792 O 1 *
+bit 791 O 1 *
+bit 790 O 1 *
+bit 789 O 1 *
+bit 788 O 1 *
+bit 787 O 1 *
+bit 786 O 1 *
+bit 785 O 1 *
+bit 784 I 1 IO_V3
+bit 783 O 1 IO_V3 782 1 Z
+bit 782 C 1 *
+bit 781 I 1 IO_V2
+bit 780 O 1 IO_V2 779 1 Z
+bit 779 C 1 *
+bit 778 I 1 M2_R4
+bit 777 I 1 M0_P5
+bit 776 I 1 M1_U3
+bit 775 I 1 IO_T3
+bit 774 O 1 IO_T3 773 1 Z
+bit 773 C 1 *
+bit 772 I 1 IO_T2
+bit 771 O 1 IO_T2 770 1 Z
+bit 770 C 1 *
+bit 769 O 1 *
+bit 768 O 1 *
+bit 767 O 1 *
+bit 766 O 1 *
+bit 765 O 1 *
+bit 764 O 1 *
+bit 763 O 1 *
+bit 762 O 1 *
+bit 761 O 1 *
+bit 760 O 1 *
+bit 759 O 1 *
+bit 758 O 1 *
+bit 757 O 1 *
+bit 756 O 1 *
+bit 755 O 1 *
+bit 754 O 1 *
+bit 753 O 1 *
+bit 752 O 1 *
+bit 751 O 1 *
+bit 750 O 1 *
+bit 749 O 1 *
+bit 748 O 1 *
+bit 747 O 1 *
+bit 746 O 1 *
+bit 745 O 1 *
+bit 744 O 1 *
+bit 743 O 1 *
+bit 742 O 1 *
+bit 741 O 1 *
+bit 740 O 1 *
+bit 739 O 1 *
+bit 738 O 1 *
+bit 737 O 1 *
+bit 736 O 1 *
+bit 735 O 1 *
+bit 734 O 1 *
+bit 733 O 1 *
+bit 732 O 1 *
+bit 731 O 1 *
+bit 730 O 1 *
+bit 729 O 1 *
+bit 728 O 1 *
+bit 727 O 1 *
+bit 726 O 1 *
+bit 725 O 1 *
+bit 724 O 1 *
+bit 723 O 1 *
+bit 722 O 1 *
+bit 721 O 1 *
+bit 720 O 1 *
+bit 719 O 1 *
+bit 718 O 1 *
+bit 717 O 1 *
+bit 716 O 1 *
+bit 715 I 1 IO_U1
+bit 714 O 1 IO_U1 713 1 Z
+bit 713 C 1 *
+bit 712 I 1 IO_T1
+bit 711 O 1 IO_T1 710 1 Z
+bit 710 C 1 *
+bit 709 I 1 IO_R2
+bit 708 O 1 IO_R2 707 1 Z
+bit 707 C 1 *
+bit 706 I 1 IO_R1
+bit 705 O 1 IO_R1 704 1 Z
+bit 704 C 1 *
+bit 703 I 1 IO_R3
+bit 702 O 1 IO_R3 701 1 Z
+bit 701 C 1 *
+bit 700 I 1 IO_P3
+bit 699 O 1 IO_P3 698 1 Z
+bit 698 C 1 *
+bit 697 I 1 IO_P2
+bit 696 O 1 IO_P2 695 1 Z
+bit 695 C 1 *
+bit 694 I 1 IO_P1
+bit 693 O 1 IO_P1 692 1 Z
+bit 692 C 1 *
+bit 691 I 1 IO_N4
+bit 690 O 1 IO_N4 689 1 Z
+bit 689 C 1 *
+bit 688 I 1 IO_P4
+bit 687 O 1 IO_P4 686 1 Z
+bit 686 C 1 *
+bit 685 I 1 IO_N5
+bit 684 O 1 IO_N5 683 1 Z
+bit 683 C 1 *
+bit 682 I 1 IO_M5
+bit 681 O 1 IO_M5 680 1 Z
+bit 680 C 1 *
+bit 679 I 1 IO_M3
+bit 678 O 1 IO_M3 677 1 Z
+bit 677 C 1 *
+bit 676 I 1 IO_M4
+bit 675 O 1 IO_M4 674 1 Z
+bit 674 C 1 *
+bit 673 I 1 IO_N2
+bit 672 O 1 IO_N2 671 1 Z
+bit 671 C 1 *
+bit 670 I 1 IO_M1
+bit 669 O 1 IO_M1 668 1 Z
+bit 668 C 1 *
+bit 667 O 1 *
+bit 666 O 1 *
+bit 665 O 1 *
+bit 664 O 1 *
+bit 663 O 1 *
+bit 662 O 1 *
+bit 661 I 1 IO_L6
+bit 660 O 1 IO_L6 659 1 Z
+bit 659 C 1 *
+bit 658 I 1 IO_L5
+bit 657 O 1 IO_L5 656 1 Z
+bit 656 C 1 *
+bit 655 O 1 *
+bit 654 O 1 *
+bit 653 O 1 *
+bit 652 O 1 *
+bit 651 O 1 *
+bit 650 O 1 *
+bit 649 O 1 *
+bit 648 O 1 *
+bit 647 O 1 *
+bit 646 O 1 *
+bit 645 O 1 *
+bit 644 O 1 *
+bit 643 O 1 *
+bit 642 O 1 *
+bit 641 O 1 *
+bit 640 O 1 *
+bit 639 O 1 *
+bit 638 O 1 *
+bit 637 O 1 *
+bit 636 O 1 *
+bit 635 O 1 *
+bit 634 O 1 *
+bit 633 O 1 *
+bit 632 O 1 *
+bit 631 O 1 *
+bit 630 O 1 *
+bit 629 O 1 *
+bit 628 O 1 *
+bit 627 O 1 *
+bit 626 O 1 *
+bit 625 O 1 *
+bit 624 O 1 *
+bit 623 O 1 *
+bit 622 O 1 *
+bit 621 O 1 *
+bit 620 O 1 *
+bit 619 I 1 IO_L3
+bit 618 O 1 IO_L3 617 1 Z
+bit 617 C 1 *
+bit 616 I 1 IO_L4
+bit 615 O 1 IO_L4 614 1 Z
+bit 614 C 1 *
+bit 613 I 1 IO_L2
+bit 612 O 1 IO_L2 611 1 Z
+bit 611 C 1 *
+bit 610 I 1 IO_L1
+bit 609 O 1 IO_L1 608 1 Z
+bit 608 C 1 *
+bit 607 O 1 *
+bit 606 O 1 *
+bit 605 O 1 *
+bit 604 O 1 *
+bit 603 O 1 *
+bit 602 O 1 *
+bit 601 O 1 *
+bit 600 O 1 *
+bit 599 O 1 *
+bit 598 I 1 IO_K6
+bit 597 O 1 IO_K6 596 1 Z
+bit 596 C 1 *
+bit 595 I 1 IO_K5
+bit 594 O 1 IO_K5 593 1 Z
+bit 593 C 1 *
+bit 592 I 1 IO_K4
+bit 591 O 1 IO_K4 590 1 Z
+bit 590 C 1 *
+bit 589 I 1 IO_K1
+bit 588 O 1 IO_K1 587 1 Z
+bit 587 C 1 *
+bit 586 I 1 IO_K2
+bit 585 O 1 IO_K2 584 1 Z
+bit 584 C 1 *
+bit 583 I 1 IO_J5
+bit 582 O 1 IO_J5 581 1 Z
+bit 581 C 1 *
+bit 580 I 1 IO_J4
+bit 579 O 1 IO_J4 578 1 Z
+bit 578 C 1 *
+bit 577 I 1 IO_J1
+bit 576 O 1 IO_J1 575 1 Z
+bit 575 C 1 *
+bit 574 I 1 IO_J2
+bit 573 O 1 IO_J2 572 1 Z
+bit 572 C 1 *
+bit 571 I 1 IO_J6
+bit 570 O 1 IO_J6 569 1 Z
+bit 569 C 1 *
+bit 568 O 1 *
+bit 567 O 1 *
+bit 566 O 1 *
+bit 565 O 1 *
+bit 564 O 1 *
+bit 563 O 1 *
+bit 562 O 1 *
+bit 561 O 1 *
+bit 560 O 1 *
+bit 559 I 1 IO_H1
+bit 558 O 1 IO_H1 557 1 Z
+bit 557 C 1 *
+bit 556 I 1 IO_H2
+bit 555 O 1 IO_H2 554 1 Z
+bit 554 C 1 *
+bit 553 I 1 IO_H4
+bit 552 O 1 IO_H4 551 1 Z
+bit 551 C 1 *
+bit 550 I 1 IO_H3
+bit 549 O 1 IO_H3 548 1 Z
+bit 548 C 1 *
+bit 547 O 1 *
+bit 546 O 1 *
+bit 545 O 1 *
+bit 544 O 1 *
+bit 543 O 1 *
+bit 542 O 1 *
+bit 541 O 1 *
+bit 540 O 1 *
+bit 539 O 1 *
+bit 538 O 1 *
+bit 537 O 1 *
+bit 536 O 1 *
+bit 535 O 1 *
+bit 534 O 1 *
+bit 533 O 1 *
+bit 532 O 1 *
+bit 531 O 1 *
+bit 530 O 1 *
+bit 529 O 1 *
+bit 528 O 1 *
+bit 527 O 1 *
+bit 526 O 1 *
+bit 525 O 1 *
+bit 524 O 1 *
+bit 523 O 1 *
+bit 522 O 1 *
+bit 521 O 1 *
+bit 520 O 1 *
+bit 519 O 1 *
+bit 518 O 1 *
+bit 517 O 1 *
+bit 516 O 1 *
+bit 515 O 1 *
+bit 514 O 1 *
+bit 513 O 1 *
+bit 512 O 1 *
+bit 511 I 1 IO_H5
+bit 510 O 1 IO_H5 509 1 Z
+bit 509 C 1 *
+bit 508 I 1 IO_H6
+bit 507 O 1 IO_H6 506 1 Z
+bit 506 C 1 *
+bit 505 O 1 *
+bit 504 O 1 *
+bit 503 O 1 *
+bit 502 O 1 *
+bit 501 O 1 *
+bit 500 O 1 *
+bit 499 I 1 IO_G4
+bit 498 O 1 IO_G4 497 1 Z
+bit 497 C 1 *
+bit 496 I 1 IO_G3
+bit 495 O 1 IO_G3 494 1 Z
+bit 494 C 1 *
+bit 493 I 1 IO_G1
+bit 492 O 1 IO_G1 491 1 Z
+bit 491 C 1 *
+bit 490 I 1 IO_F2
+bit 489 O 1 IO_F2 488 1 Z
+bit 488 C 1 *
+bit 487 I 1 IO_G5
+bit 486 O 1 IO_G5 485 1 Z
+bit 485 C 1 *
+bit 484 I 1 IO_F5
+bit 483 O 1 IO_F5 482 1 Z
+bit 482 C 1 *
+bit 481 I 1 IO_E4
+bit 480 O 1 IO_E4 479 1 Z
+bit 479 C 1 *
+bit 478 I 1 IO_F4
+bit 477 O 1 IO_F4 476 1 Z
+bit 476 C 1 *
+bit 475 I 1 IO_E2
+bit 474 O 1 IO_E2 473 1 Z
+bit 473 C 1 *
+bit 472 I 1 IO_E1
+bit 471 O 1 IO_E1 470 1 Z
+bit 470 C 1 *
+bit 469 I 1 IO_E3
+bit 468 O 1 IO_E3 467 1 Z
+bit 467 C 1 *
+bit 466 I 1 IO_D3
+bit 465 O 1 IO_D3 464 1 Z
+bit 464 C 1 *
+bit 463 I 1 IO_D1
+bit 462 O 1 IO_D1 461 1 Z
+bit 461 C 1 *
+bit 460 I 1 IO_D2
+bit 459 O 1 IO_D2 458 1 Z
+bit 458 C 1 *
+bit 457 I 1 IO_C1
+bit 456 O 1 IO_C1 455 1 Z
+bit 455 C 1 *
+bit 454 I 1 IO_B1
+bit 453 O 1 IO_B1 452 1 Z
+bit 452 C 1 *
+bit 451 O 1 *
+bit 450 O 1 *
+bit 449 O 1 *
+bit 448 O 1 *
+bit 447 O 1 *
+bit 446 O 1 *
+bit 445 O 1 *
+bit 444 O 1 *
+bit 443 O 1 *
+bit 442 O 1 *
+bit 441 O 1 *
+bit 440 O 1 *
+bit 439 O 1 *
+bit 438 O 1 *
+bit 437 O 1 *
+bit 436 O 1 *
+bit 435 O 1 *
+bit 434 O 1 *
+bit 433 O 1 *
+bit 432 O 1 *
+bit 431 O 1 *
+bit 430 O 1 *
+bit 429 O 1 *
+bit 428 O 1 *
+bit 427 O 1 *
+bit 426 O 1 *
+bit 425 O 1 *
+bit 424 O 1 *
+bit 423 O 1 *
+bit 422 O 1 *
+bit 421 O 1 *
+bit 420 O 1 *
+bit 419 O 1 *
+bit 418 O 1 *
+bit 417 O 1 *
+bit 416 O 1 *
+bit 415 O 1 *
+bit 414 O 1 *
+bit 413 O 1 *
+bit 412 O 1 *
+bit 411 O 1 *
+bit 410 O 1 *
+bit 409 O 1 *
+bit 408 O 1 *
+bit 407 O 1 *
+bit 406 O 1 *
+bit 405 O 1 *
+bit 404 O 1 *
+bit 403 O 1 *
+bit 402 O 1 *
+bit 401 O 1 *
+bit 400 O 1 *
+bit 399 O 1 *
+bit 398 O 1 *
+bit 397 I 1 IO_C3
+bit 396 O 1 IO_C3 395 1 Z
+bit 395 C 1 *
+bit 394 I 1 IO_C2
+bit 393 O 1 IO_C2 392 1 Z
+bit 392 C 1 *
+bit 391 O 1 *
+bit 390 I 1 HSWAP_EN_E6
+bit 389 I 1 IO_B3
+bit 388 O 1 IO_B3 387 1 Z
+bit 387 C 1 *
+bit 386 I 1 IO_A2
+bit 385 O 1 IO_A2 384 1 Z
+bit 384 C 1 *
+bit 383 I 1 IO_A3
+bit 382 O 1 IO_A3 381 1 Z
+bit 381 C 1 *
+bit 380 O 1 *
+bit 379 O 1 *
+bit 378 O 1 *
+bit 377 O 1 *
+bit 376 O 1 *
+bit 375 O 1 *
+bit 374 O 1 *
+bit 373 O 1 *
+bit 372 O 1 *
+bit 371 O 1 *
+bit 370 O 1 *
+bit 369 O 1 *
+bit 368 O 1 *
+bit 367 O 1 *
+bit 366 O 1 *
+bit 365 O 1 *
+bit 364 O 1 *
+bit 363 O 1 *
+bit 362 O 1 *
+bit 361 O 1 *
+bit 360 O 1 *
+bit 359 O 1 *
+bit 358 O 1 *
+bit 357 O 1 *
+bit 356 O 1 *
+bit 355 O 1 *
+bit 354 O 1 *
+bit 353 O 1 *
+bit 352 O 1 *
+bit 351 O 1 *
+bit 350 O 1 *
+bit 349 O 1 *
+bit 348 O 1 *
+bit 347 O 1 *
+bit 346 O 1 *
+bit 345 O 1 *
+bit 344 O 1 *
+bit 343 O 1 *
+bit 342 O 1 *
+bit 341 I 1 IO_B4
+bit 340 O 1 IO_B4 339 1 Z
+bit 339 C 1 *
+bit 338 I 1 IO_C4
+bit 337 O 1 IO_C4 336 1 Z
+bit 336 C 1 *
+bit 335 I 1 IO_C5
+bit 334 O 1 IO_C5 333 1 Z
+bit 333 C 1 *
+bit 332 I 1 IO_D5
+bit 331 O 1 IO_D5 330 1 Z
+bit 330 C 1 *
+bit 329 O 1 *
+bit 328 O 1 *
+bit 327 O 1 *
+bit 326 O 1 *
+bit 325 O 1 *
+bit 324 O 1 *
+bit 323 O 1 *
+bit 322 O 1 *
+bit 321 O 1 *
+bit 320 O 1 *
+bit 319 O 1 *
+bit 318 O 1 *
+bit 317 O 1 *
+bit 316 O 1 *
+bit 315 O 1 *
+bit 314 O 1 *
+bit 313 O 1 *
+bit 312 O 1 *
+bit 311 I 1 IO_A4
+bit 310 O 1 IO_A4 309 1 Z
+bit 309 C 1 *
+bit 308 I 1 IO_A5
+bit 307 O 1 IO_A5 306 1 Z
+bit 306 C 1 *
+bit 305 O 1 *
+bit 304 O 1 *
+bit 303 O 1 *
+bit 302 O 1 *
+bit 301 O 1 *
+bit 300 O 1 *
+bit 299 O 1 *
+bit 298 O 1 *
+bit 297 O 1 *
+bit 296 O 1 *
+bit 295 O 1 *
+bit 294 O 1 *
+bit 293 O 1 *
+bit 292 O 1 *
+bit 291 O 1 *
+bit 290 O 1 *
+bit 289 O 1 *
+bit 288 O 1 *
+bit 287 O 1 *
+bit 286 O 1 *
+bit 285 O 1 *
+bit 284 I 1 IO_D6
+bit 283 O 1 IO_D6 282 1 Z
+bit 282 C 1 *
+bit 281 O 1 *
+bit 280 O 1 *
+bit 279 O 1 *
+bit 278 O 1 *
+bit 277 O 1 *
+bit 276 O 1 *
+bit 275 O 1 *
+bit 274 O 1 *
+bit 273 O 1 *
+bit 272 O 1 *
+bit 271 O 1 *
+bit 270 O 1 *
+bit 269 O 1 *
+bit 268 O 1 *
+bit 267 O 1 *
+bit 266 O 1 *
+bit 265 O 1 *
+bit 264 O 1 *
+bit 263 O 1 *
+bit 262 O 1 *
+bit 261 O 1 *
+bit 260 O 1 *
+bit 259 O 1 *
+bit 258 O 1 *
+bit 257 O 1 *
+bit 256 O 1 *
+bit 255 O 1 *
+bit 254 O 1 *
+bit 253 O 1 *
+bit 252 O 1 *
+bit 251 I 1 IO_B5
+bit 250 O 1 IO_B5 249 1 Z
+bit 249 C 1 *
+bit 248 I 1 IO_B6
+bit 247 O 1 IO_B6 246 1 Z
+bit 246 C 1 *
+bit 245 O 1 *
+bit 244 O 1 *
+bit 243 O 1 *
+bit 242 O 1 *
+bit 241 O 1 *
+bit 240 O 1 *
+bit 239 I 1 IO_E7
+bit 238 O 1 IO_E7 237 1 Z
+bit 237 C 1 *
+bit 236 I 1 IO_C7
+bit 235 O 1 IO_C7 234 1 Z
+bit 234 C 1 *
+bit 233 I 1 IO_D7
+bit 232 O 1 IO_D7 231 1 Z
+bit 231 C 1 *
+bit 230 I 1 IO_C8
+bit 229 O 1 IO_C8 228 1 Z
+bit 228 C 1 *
+bit 227 I 1 IO_D8
+bit 226 O 1 IO_D8 225 1 Z
+bit 225 C 1 *
+bit 224 O 1 *
+bit 223 O 1 *
+bit 222 O 1 *
+bit 221 I 1 IO_E8
+bit 220 O 1 IO_E8 219 1 Z
+bit 219 C 1 *
+bit 218 I 1 IO_F8
+bit 217 O 1 IO_F8 216 1 Z
+bit 216 C 1 *
+bit 215 I 1 IO_A7
+bit 214 O 1 IO_A7 213 1 Z
+bit 213 C 1 *
+bit 212 I 1 IO_A8
+bit 211 O 1 IO_A8 210 1 Z
+bit 210 C 1 *
+bit 209 I 1 IO_D9
+bit 208 O 1 IO_D9 207 1 Z
+bit 207 C 1 *
+bit 206 I 1 IO_B9
+bit 205 O 1 IO_B9 204 1 Z
+bit 204 C 1 *
+bit 203 I 1 IO_A9
+bit 202 O 1 IO_A9 201 1 Z
+bit 201 C 1 *
+bit 200 I 1 IO_E9
+bit 199 O 1 IO_E9 198 1 Z
+bit 198 C 1 *
+bit 197 I 1 IO_F9
+bit 196 O 1 IO_F9 195 1 Z
+bit 195 C 1 *
+bit 194 I 1 IO_D10
+bit 193 O 1 IO_D10 192 1 Z
+bit 192 C 1 *
+bit 191 I 1 IO_E10
+bit 190 O 1 IO_E10 189 1 Z
+bit 189 C 1 *
+bit 188 I 1 IO_F10
+bit 187 O 1 IO_F10 186 1 Z
+bit 186 C 1 *
+bit 185 I 1 IO_A10
+bit 184 O 1 IO_A10 183 1 Z
+bit 183 C 1 *
+bit 182 I 1 IO_B10
+bit 181 O 1 IO_B10 180 1 Z
+bit 180 C 1 *
+bit 179 I 1 IO_A11
+bit 178 O 1 IO_A11 177 1 Z
+bit 177 C 1 *
+bit 176 I 1 IO_C11
+bit 175 O 1 IO_C11 174 1 Z
+bit 174 C 1 *
+bit 173 I 1 IO_D11
+bit 172 O 1 IO_D11 171 1 Z
+bit 171 C 1 *
+bit 170 I 1 IO_F11
+bit 169 O 1 IO_F11 168 1 Z
+bit 168 C 1 *
+bit 167 I 1 IO_E11
+bit 166 O 1 IO_E11 165 1 Z
+bit 165 C 1 *
+bit 164 I 1 IO_A12
+bit 163 O 1 IO_A12 162 1 Z
+bit 162 C 1 *
+bit 161 I 1 IO_C12
+bit 160 O 1 IO_C12 159 1 Z
+bit 159 C 1 *
+bit 158 I 1 IO_D12
+bit 157 O 1 IO_D12 156 1 Z
+bit 156 C 1 *
+bit 155 I 1 IO_E13
+bit 154 O 1 IO_E13 153 1 Z
+bit 153 C 1 *
+bit 152 I 1 IO_E12
+bit 151 O 1 IO_E12 150 1 Z
+bit 150 C 1 *
+bit 149 I 1 IO_B13
+bit 148 O 1 IO_B13 147 1 Z
+bit 147 C 1 *
+bit 146 O 1 *
+bit 145 O 1 *
+bit 144 O 1 *
+bit 143 O 1 *
+bit 142 O 1 *
+bit 141 O 1 *
+bit 140 O 1 *
+bit 139 O 1 *
+bit 138 O 1 *
+bit 137 O 1 *
+bit 136 O 1 *
+bit 135 O 1 *
+bit 134 O 1 *
+bit 133 O 1 *
+bit 132 O 1 *
+bit 131 I 1 IO_D14
+bit 130 O 1 IO_D14 129 1 Z
+bit 129 C 1 *
+bit 128 I 1 IO_D13
+bit 127 O 1 IO_D13 126 1 Z
+bit 126 C 1 *
+bit 125 O 1 *
+bit 124 O 1 *
+bit 123 O 1 *
+bit 122 O 1 *
+bit 121 O 1 *
+bit 120 O 1 *
+bit 119 O 1 *
+bit 118 O 1 *
+bit 117 O 1 *
+bit 116 O 1 *
+bit 115 O 1 *
+bit 114 O 1 *
+bit 113 O 1 *
+bit 112 O 1 *
+bit 111 O 1 *
+bit 110 O 1 *
+bit 109 O 1 *
+bit 108 O 1 *
+bit 107 O 1 *
+bit 106 O 1 *
+bit 105 O 1 *
+bit 104 O 1 *
+bit 103 O 1 *
+bit 102 O 1 *
+bit 101 O 1 *
+bit 100 O 1 *
+bit 99 O 1 *
+bit 98 O 1 *
+bit 97 O 1 *
+bit 96 O 1 *
+bit 95 O 1 *
+bit 94 O 1 *
+bit 93 O 1 *
+bit 92 O 1 *
+bit 91 O 1 *
+bit 90 O 1 *
+bit 89 O 1 *
+bit 88 O 1 *
+bit 87 O 1 *
+bit 86 I 1 IO_A14
+bit 85 O 1 IO_A14 84 1 Z
+bit 84 C 1 *
+bit 83 I 1 IO_B14
+bit 82 O 1 IO_B14 81 1 Z
+bit 81 C 1 *
+bit 80 I 1 IO_C14
+bit 79 O 1 IO_C14 78 1 Z
+bit 78 C 1 *
+bit 77 I 1 IO_C15
+bit 76 O 1 IO_C15 75 1 Z
+bit 75 C 1 *
+bit 74 O 1 *
+bit 73 O 1 *
+bit 72 O 1 *
+bit 71 O 1 *
+bit 70 O 1 *
+bit 69 O 1 *
+bit 68 O 1 *
+bit 67 O 1 *
+bit 66 O 1 *
+bit 65 O 1 *
+bit 64 O 1 *
+bit 63 O 1 *
+bit 62 O 1 *
+bit 61 O 1 *
+bit 60 O 1 *
+bit 59 O 1 *
+bit 58 O 1 *
+bit 57 O 1 *
+bit 56 I 1 IO_A15
+bit 55 O 1 IO_A15 54 1 Z
+bit 54 C 1 *
+bit 53 I 1 IO_B15
+bit 52 O 1 IO_B15 51 1 Z
+bit 51 C 1 *
+bit 50 O 1 *
+bit 49 O 1 *
+bit 48 O 1 *
+bit 47 O 1 *
+bit 46 O 1 *
+bit 45 O 1 *
+bit 44 O 1 *
+bit 43 O 1 *
+bit 42 O 1 *
+bit 41 O 1 *
+bit 40 O 1 *
+bit 39 O 1 *
+bit 38 O 1 *
+bit 37 O 1 *
+bit 36 O 1 *
+bit 35 O 1 *
+bit 34 O 1 *
+bit 33 O 1 *
+bit 32 O 1 *
+bit 31 O 1 *
+bit 30 O 1 *
+bit 29 O 1 *
+bit 28 O 1 *
+bit 27 O 1 *
+bit 26 O 1 *
+bit 25 O 1 *
+bit 24 O 1 *
+bit 23 O 1 *
+bit 22 O 1 *
+bit 21 O 1 *
+bit 20 O 1 *
+bit 19 O 1 *
+bit 18 O 1 *
+bit 17 O 1 *
+bit 16 O 1 *
+bit 15 O 1 *
+bit 14 O 1 *
+bit 13 O 1 *
+bit 12 O 1 *
+bit 11 O 1 *
+bit 10 O 1 *
+bit 9 O 1 *
+bit 8 O 1 *
+bit 7 O 1 *
+bit 6 O 1 *
+bit 5 I 1 IO_A16
+bit 4 O 1 IO_A16 3 1 Z
+bit 3 C 1 *
+bit 2 I 1 IO_A17
+bit 1 O 1 IO_A17 0 1 Z
+bit 0 C 1 *
--- /dev/null
+signal GND1
+signal GND2
+signal GND3
+signal GND4
+signal GND5
+signal GND6
+signal GND7
+signal GND8
+signal GND9
+signal GND10
+signal GND11
+signal GND12
+signal GND13
+signal GND14
+signal GND15
+signal GND16
+signal GND17
+signal GND18
+signal GND19
+signal GND20
+signal GND21
+signal GND22
+signal GND23
+signal GND24
+signal GND25
+signal GND26
+signal GND27
+signal GND28
+signal GND29
+signal GND30
+signal GND31
+signal GND32
+signal GND33
+signal GND34
+signal GND35
+signal GND36
+signal GND37
+signal GND38
+signal GND39
+signal GND40
+signal GND41
+signal GND42
+signal GND43
+signal GND44
+signal GND45
+signal GND46
+signal GND47
+signal GND48
+signal GND49
+signal GND50
+signal GND51
+signal GND52
+signal CCLK_AA22
+signal DONE_AB21
+signal HSWAP_EN_B3
+signal M0_AB2
+signal M1_AA1
+signal M2_AB3
+signal PROG_B
+signal TCK
+signal TDI
+signal TDO
+signal TMS
+signal VCCAUX1
+signal VCCAUX2
+signal VCCAUX3
+signal VCCAUX4
+signal VCCAUX5
+signal VCCAUX6
+signal VCCAUX7
+signal VCCAUX8
+signal VCCINT1
+signal VCCINT2
+signal VCCINT3
+signal VCCINT4
+signal VCCINT5
+signal VCCINT6
+signal VCCINT7
+signal VCCINT8
+signal VCCINT9
+signal VCCINT10
+signal VCCINT11
+signal VCCINT12
+signal VCCO01
+signal VCCO02
+signal VCCO03
+signal VCCO04
+signal VCCO05
+signal VCCO11
+signal VCCO12
+signal VCCO13
+signal VCCO14
+signal VCCO15
+signal VCCO21
+signal VCCO22
+signal VCCO23
+signal VCCO24
+signal VCCO25
+signal VCCO31
+signal VCCO32
+signal VCCO33
+signal VCCO34
+signal VCCO35
+signal VCCO41
+signal VCCO42
+signal VCCO43
+signal VCCO44
+signal VCCO45
+signal VCCO51
+signal VCCO52
+signal VCCO53
+signal VCCO54
+signal VCCO55
+signal VCCO61
+signal VCCO62
+signal VCCO63
+signal VCCO64
+signal VCCO65
+signal VCCO71
+signal VCCO72
+signal VCCO73
+signal VCCO74
+signal VCCO75
+signal IO_A3
+signal IO_A4
+signal IO_A5
+signal IO_A7
+signal IO_A8
+signal IO_A9
+signal IO_A10
+signal IO_A11
+signal IO_A12
+signal IO_A13
+signal IO_A14
+signal IO_A15
+signal IO_A16
+signal IO_A18
+signal IO_A19
+signal IO_B4
+signal IO_B5
+signal IO_B6
+signal IO_B7
+signal IO_B8
+signal IO_B9
+signal IO_B10
+signal IO_B11
+signal IO_B12
+signal IO_B13
+signal IO_B14
+signal IO_B15
+signal IO_B16
+signal IO_B17
+signal IO_B18
+signal IO_B19
+signal IO_B20
+signal IO_C1
+signal IO_C2
+signal IO_C3
+signal IO_C4
+signal IO_C5
+signal IO_C6
+signal IO_C7
+signal IO_C10
+signal IO_C11
+signal IO_C12
+signal IO_C13
+signal IO_C16
+signal IO_C17
+signal IO_C18
+signal IO_C19
+signal IO_C20
+signal IO_C21
+signal IO_C22
+signal IO_D1
+signal IO_D2
+signal IO_D3
+signal IO_D4
+signal IO_D5
+signal IO_D6
+signal IO_D7
+signal IO_D8
+signal IO_D9
+signal IO_D10
+signal IO_D11
+signal IO_D12
+signal IO_D13
+signal IO_D14
+signal IO_D15
+signal IO_D16
+signal IO_D17
+signal IO_D18
+signal IO_D19
+signal IO_D20
+signal IO_D21
+signal IO_D22
+signal IO_E1
+signal IO_E2
+signal IO_E3
+signal IO_E4
+signal IO_E5
+signal IO_E6
+signal IO_E7
+signal IO_E8
+signal IO_E9
+signal IO_E10
+signal IO_E11
+signal IO_E12
+signal IO_E13
+signal IO_E14
+signal IO_E15
+signal IO_E16
+signal IO_E17
+signal IO_E18
+signal IO_E19
+signal IO_E20
+signal IO_E21
+signal IO_E22
+signal IO_F2
+signal IO_F3
+signal IO_F4
+signal IO_F5
+signal IO_F6
+signal IO_F7
+signal IO_F9
+signal IO_F10
+signal IO_F11
+signal IO_F12
+signal IO_F13
+signal IO_F14
+signal IO_F16
+signal IO_F17
+signal IO_F18
+signal IO_F19
+signal IO_F20
+signal IO_F21
+signal IO_G1
+signal IO_G2
+signal IO_G3
+signal IO_G4
+signal IO_G5
+signal IO_G6
+signal IO_G17
+signal IO_G18
+signal IO_G19
+signal IO_G20
+signal IO_G21
+signal IO_G22
+signal IO_H1
+signal IO_H2
+signal IO_H4
+signal IO_H5
+signal IO_H18
+signal IO_H19
+signal IO_H21
+signal IO_H22
+signal IO_J1
+signal IO_J2
+signal IO_J4
+signal IO_J5
+signal IO_J6
+signal IO_J17
+signal IO_J18
+signal IO_J19
+signal IO_J21
+signal IO_J22
+signal IO_K1
+signal IO_K2
+signal IO_K3
+signal IO_K4
+signal IO_K5
+signal IO_K6
+signal IO_K17
+signal IO_K18
+signal IO_K19
+signal IO_K20
+signal IO_K21
+signal IO_K22
+signal IO_L1
+signal IO_L2
+signal IO_L3
+signal IO_L4
+signal IO_L5
+signal IO_L6
+signal IO_L17
+signal IO_L18
+signal IO_L19
+signal IO_L20
+signal IO_L21
+signal IO_L22
+signal IO_M1
+signal IO_M2
+signal IO_M3
+signal IO_M4
+signal IO_M5
+signal IO_M6
+signal IO_M17
+signal IO_M18
+signal IO_M19
+signal IO_M20
+signal IO_M21
+signal IO_M22
+signal IO_N1
+signal IO_N2
+signal IO_N3
+signal IO_N4
+signal IO_N5
+signal IO_N6
+signal IO_N17
+signal IO_N18
+signal IO_N19
+signal IO_N20
+signal IO_N21
+signal IO_N22
+signal IO_P1
+signal IO_P2
+signal IO_P4
+signal IO_P5
+signal IO_P6
+signal IO_P17
+signal IO_P18
+signal IO_P19
+signal IO_P21
+signal IO_P22
+signal IO_R1
+signal IO_R2
+signal IO_R4
+signal IO_R5
+signal IO_R18
+signal IO_R19
+signal IO_R21
+signal IO_R22
+signal IO_T1
+signal IO_T2
+signal IO_T3
+signal IO_T4
+signal IO_T5
+signal IO_T6
+signal IO_T17
+signal IO_T18
+signal IO_T19
+signal IO_T20
+signal IO_T21
+signal IO_T22
+signal IO_U2
+signal IO_U3
+signal IO_U4
+signal IO_U5
+signal IO_U6
+signal IO_U7
+signal IO_U9
+signal IO_U10
+signal IO_U11
+signal IO_U12
+signal IO_U13
+signal IO_U14
+signal IO_U16
+signal IO_U17
+signal IO_U18
+signal IO_U19
+signal IO_U20
+signal IO_U21
+signal IO_V1
+signal IO_V2
+signal IO_V3
+signal IO_V4
+signal IO_V5
+signal IO_V6
+signal IO_V7
+signal IO_V8
+signal IO_V9
+signal IO_V10
+signal IO_V11
+signal IO_V12
+signal IO_V13
+signal IO_V14
+signal IO_V15
+signal IO_V16
+signal IO_V17
+signal IO_V18
+signal IO_V19
+signal IO_V20
+signal IO_V21
+signal IO_V22
+signal IO_W1
+signal IO_W2
+signal IO_W3
+signal IO_W4
+signal IO_W5
+signal IO_W6
+signal IO_W7
+signal IO_W8
+signal IO_W9
+signal IO_W10
+signal IO_W11
+signal IO_W12
+signal IO_W13
+signal IO_W14
+signal IO_W15
+signal IO_W16
+signal IO_W17
+signal IO_W18
+signal IO_W19
+signal IO_W20
+signal IO_W21
+signal IO_W22
+signal IO_Y1
+signal IO_Y2
+signal IO_Y3
+signal IO_Y4
+signal IO_Y5
+signal IO_Y6
+signal IO_Y7
+signal IO_Y10
+signal IO_Y11
+signal IO_Y12
+signal IO_Y13
+signal IO_Y16
+signal IO_Y17
+signal IO_Y18
+signal IO_Y19
+signal IO_Y20
+signal IO_Y21
+signal IO_Y22
+signal IO_AA3
+signal IO_AA4
+signal IO_AA5
+signal IO_AA6
+signal IO_AA7
+signal IO_AA8
+signal IO_AA9
+signal IO_AA10
+signal IO_AA11
+signal IO_AA12
+signal IO_AA13
+signal IO_AA14
+signal IO_AA15
+signal IO_AA16
+signal IO_AA17
+signal IO_AA18
+signal IO_AA19
+signal IO_AA20
+signal IO_AB4
+signal IO_AB5
+signal IO_AB7
+signal IO_AB8
+signal IO_AB9
+signal IO_AB10
+signal IO_AB11
+signal IO_AB12
+signal IO_AB13
+signal IO_AB14
+signal IO_AB15
+signal IO_AB16
+signal IO_AB18
+signal IO_AB19
+
+register BSR 1559
+register BR 1
+register DIR 32
+
+instruction length 6
+
+instruction EXTEST 000000 BSR
+instruction SAMPLE/PRELOAD 000001 BSR
+instruction IDCODE 001001 DIR
+instruction BYPASS 111111 BR
+
+bit 1558 I 1 IO_C20
+bit 1557 O 1 IO_C20 1556 1 Z
+bit 1556 C 1 *
+bit 1555 I 1 IO_C21
+bit 1554 O 1 IO_C21 1553 1 Z
+bit 1553 C 1 *
+bit 1552 O 1 *
+bit 1551 O 1 *
+bit 1550 O 1 *
+bit 1549 O 1 *
+bit 1548 O 1 *
+bit 1547 O 1 *
+bit 1546 O 1 *
+bit 1545 O 1 *
+bit 1544 O 1 *
+bit 1543 O 1 *
+bit 1542 O 1 *
+bit 1541 O 1 *
+bit 1540 O 1 *
+bit 1539 O 1 *
+bit 1538 O 1 *
+bit 1537 O 1 *
+bit 1536 O 1 *
+bit 1535 O 1 *
+bit 1534 O 1 *
+bit 1533 O 1 *
+bit 1532 O 1 *
+bit 1531 O 1 *
+bit 1530 O 1 *
+bit 1529 O 1 *
+bit 1528 O 1 *
+bit 1527 O 1 *
+bit 1526 O 1 *
+bit 1525 O 1 *
+bit 1524 O 1 *
+bit 1523 O 1 *
+bit 1522 O 1 *
+bit 1521 O 1 *
+bit 1520 O 1 *
+bit 1519 O 1 *
+bit 1518 O 1 *
+bit 1517 O 1 *
+bit 1516 O 1 *
+bit 1515 O 1 *
+bit 1514 O 1 *
+bit 1513 O 1 *
+bit 1512 O 1 *
+bit 1511 O 1 *
+bit 1510 O 1 *
+bit 1509 O 1 *
+bit 1508 O 1 *
+bit 1507 O 1 *
+bit 1506 O 1 *
+bit 1505 O 1 *
+bit 1504 O 1 *
+bit 1503 O 1 *
+bit 1502 O 1 *
+bit 1501 I 1 IO_C22
+bit 1500 O 1 IO_C22 1499 1 Z
+bit 1499 C 1 *
+bit 1498 I 1 IO_D20
+bit 1497 O 1 IO_D20 1496 1 Z
+bit 1496 C 1 *
+bit 1495 I 1 IO_D19
+bit 1494 O 1 IO_D19 1493 1 Z
+bit 1493 C 1 *
+bit 1492 I 1 IO_D21
+bit 1491 O 1 IO_D21 1490 1 Z
+bit 1490 C 1 *
+bit 1489 I 1 IO_D22
+bit 1488 O 1 IO_D22 1487 1 Z
+bit 1487 C 1 *
+bit 1486 I 1 IO_E18
+bit 1485 O 1 IO_E18 1484 1 Z
+bit 1484 C 1 *
+bit 1483 I 1 IO_F18
+bit 1482 O 1 IO_F18 1481 1 Z
+bit 1481 C 1 *
+bit 1480 I 1 IO_E19
+bit 1479 O 1 IO_E19 1478 1 Z
+bit 1478 C 1 *
+bit 1477 I 1 IO_E20
+bit 1476 O 1 IO_E20 1475 1 Z
+bit 1475 C 1 *
+bit 1474 I 1 IO_E21
+bit 1473 O 1 IO_E21 1472 1 Z
+bit 1472 C 1 *
+bit 1471 I 1 IO_E22
+bit 1470 O 1 IO_E22 1469 1 Z
+bit 1469 C 1 *
+bit 1468 I 1 IO_G17
+bit 1467 O 1 IO_G17 1466 1 Z
+bit 1466 C 1 *
+bit 1465 I 1 IO_G18
+bit 1464 O 1 IO_G18 1463 1 Z
+bit 1463 C 1 *
+bit 1462 I 1 IO_F19
+bit 1461 O 1 IO_F19 1460 1 Z
+bit 1460 C 1 *
+bit 1459 I 1 IO_G19
+bit 1458 O 1 IO_G19 1457 1 Z
+bit 1457 C 1 *
+bit 1456 I 1 IO_F20
+bit 1455 O 1 IO_F20 1454 1 Z
+bit 1454 C 1 *
+bit 1453 I 1 IO_F21
+bit 1452 O 1 IO_F21 1451 1 Z
+bit 1451 C 1 *
+bit 1450 I 1 IO_G20
+bit 1449 O 1 IO_G20 1448 1 Z
+bit 1448 C 1 *
+bit 1447 I 1 IO_H19
+bit 1446 O 1 IO_H19 1445 1 Z
+bit 1445 C 1 *
+bit 1444 I 1 IO_G21
+bit 1443 O 1 IO_G21 1442 1 Z
+bit 1442 C 1 *
+bit 1441 I 1 IO_G22
+bit 1440 O 1 IO_G22 1439 1 Z
+bit 1439 C 1 *
+bit 1438 I 1 IO_H18
+bit 1437 O 1 IO_H18 1436 1 Z
+bit 1436 C 1 *
+bit 1435 I 1 IO_J17
+bit 1434 O 1 IO_J17 1433 1 Z
+bit 1433 C 1 *
+bit 1432 I 1 IO_H21
+bit 1431 O 1 IO_H21 1430 1 Z
+bit 1430 C 1 *
+bit 1429 I 1 IO_H22
+bit 1428 O 1 IO_H22 1427 1 Z
+bit 1427 C 1 *
+bit 1426 O 1 *
+bit 1425 O 1 *
+bit 1424 O 1 *
+bit 1423 O 1 *
+bit 1422 O 1 *
+bit 1421 O 1 *
+bit 1420 I 1 IO_J18
+bit 1419 O 1 IO_J18 1418 1 Z
+bit 1418 C 1 *
+bit 1417 I 1 IO_J19
+bit 1416 O 1 IO_J19 1415 1 Z
+bit 1415 C 1 *
+bit 1414 I 1 IO_J21
+bit 1413 O 1 IO_J21 1412 1 Z
+bit 1412 C 1 *
+bit 1411 I 1 IO_J22
+bit 1410 O 1 IO_J22 1409 1 Z
+bit 1409 C 1 *
+bit 1408 I 1 IO_K17
+bit 1407 O 1 IO_K17 1406 1 Z
+bit 1406 C 1 *
+bit 1405 I 1 IO_K18
+bit 1404 O 1 IO_K18 1403 1 Z
+bit 1403 C 1 *
+bit 1402 I 1 IO_K19
+bit 1401 O 1 IO_K19 1400 1 Z
+bit 1400 C 1 *
+bit 1399 I 1 IO_K20
+bit 1398 O 1 IO_K20 1397 1 Z
+bit 1397 C 1 *
+bit 1396 I 1 IO_K21
+bit 1395 O 1 IO_K21 1394 1 Z
+bit 1394 C 1 *
+bit 1393 I 1 IO_K22
+bit 1392 O 1 IO_K22 1391 1 Z
+bit 1391 C 1 *
+bit 1390 O 1 *
+bit 1389 O 1 *
+bit 1388 O 1 *
+bit 1387 O 1 *
+bit 1386 O 1 *
+bit 1385 O 1 *
+bit 1384 I 1 IO_L17
+bit 1383 O 1 IO_L17 1382 1 Z
+bit 1382 C 1 *
+bit 1381 I 1 IO_L18
+bit 1380 O 1 IO_L18 1379 1 Z
+bit 1379 C 1 *
+bit 1378 I 1 IO_L19
+bit 1377 O 1 IO_L19 1376 1 Z
+bit 1376 C 1 *
+bit 1375 I 1 IO_L20
+bit 1374 O 1 IO_L20 1373 1 Z
+bit 1373 C 1 *
+bit 1372 I 1 IO_L21
+bit 1371 O 1 IO_L21 1370 1 Z
+bit 1370 C 1 *
+bit 1369 I 1 IO_L22
+bit 1368 O 1 IO_L22 1367 1 Z
+bit 1367 C 1 *
+bit 1366 I 1 IO_M22
+bit 1365 O 1 IO_M22 1364 1 Z
+bit 1364 C 1 *
+bit 1363 I 1 IO_M21
+bit 1362 O 1 IO_M21 1361 1 Z
+bit 1361 C 1 *
+bit 1360 I 1 IO_M20
+bit 1359 O 1 IO_M20 1358 1 Z
+bit 1358 C 1 *
+bit 1357 I 1 IO_M19
+bit 1356 O 1 IO_M19 1355 1 Z
+bit 1355 C 1 *
+bit 1354 I 1 IO_M18
+bit 1353 O 1 IO_M18 1352 1 Z
+bit 1352 C 1 *
+bit 1351 I 1 IO_M17
+bit 1350 O 1 IO_M17 1349 1 Z
+bit 1349 C 1 *
+bit 1348 O 1 *
+bit 1347 O 1 *
+bit 1346 O 1 *
+bit 1345 O 1 *
+bit 1344 O 1 *
+bit 1343 O 1 *
+bit 1342 I 1 IO_N22
+bit 1341 O 1 IO_N22 1340 1 Z
+bit 1340 C 1 *
+bit 1339 I 1 IO_N21
+bit 1338 O 1 IO_N21 1337 1 Z
+bit 1337 C 1 *
+bit 1336 I 1 IO_N20
+bit 1335 O 1 IO_N20 1334 1 Z
+bit 1334 C 1 *
+bit 1333 I 1 IO_N19
+bit 1332 O 1 IO_N19 1331 1 Z
+bit 1331 C 1 *
+bit 1330 I 1 IO_N18
+bit 1329 O 1 IO_N18 1328 1 Z
+bit 1328 C 1 *
+bit 1327 I 1 IO_N17
+bit 1326 O 1 IO_N17 1325 1 Z
+bit 1325 C 1 *
+bit 1324 I 1 IO_P22
+bit 1323 O 1 IO_P22 1322 1 Z
+bit 1322 C 1 *
+bit 1321 I 1 IO_P21
+bit 1320 O 1 IO_P21 1319 1 Z
+bit 1319 C 1 *
+bit 1318 I 1 IO_P18
+bit 1317 O 1 IO_P18 1316 1 Z
+bit 1316 C 1 *
+bit 1315 I 1 IO_P17
+bit 1314 O 1 IO_P17 1313 1 Z
+bit 1313 C 1 *
+bit 1312 O 1 *
+bit 1311 O 1 *
+bit 1310 O 1 *
+bit 1309 O 1 *
+bit 1308 O 1 *
+bit 1307 O 1 *
+bit 1306 I 1 IO_P19
+bit 1305 O 1 IO_P19 1304 1 Z
+bit 1304 C 1 *
+bit 1303 I 1 IO_R19
+bit 1302 O 1 IO_R19 1301 1 Z
+bit 1301 C 1 *
+bit 1300 I 1 IO_R22
+bit 1299 O 1 IO_R22 1298 1 Z
+bit 1298 C 1 *
+bit 1297 I 1 IO_R21
+bit 1296 O 1 IO_R21 1295 1 Z
+bit 1295 C 1 *
+bit 1294 I 1 IO_T22
+bit 1293 O 1 IO_T22 1292 1 Z
+bit 1292 C 1 *
+bit 1291 I 1 IO_T21
+bit 1290 O 1 IO_T21 1289 1 Z
+bit 1289 C 1 *
+bit 1288 I 1 IO_T20
+bit 1287 O 1 IO_T20 1286 1 Z
+bit 1286 C 1 *
+bit 1285 I 1 IO_T19
+bit 1284 O 1 IO_T19 1283 1 Z
+bit 1283 C 1 *
+bit 1282 I 1 IO_R18
+bit 1281 O 1 IO_R18 1280 1 Z
+bit 1280 C 1 *
+bit 1279 I 1 IO_T18
+bit 1278 O 1 IO_T18 1277 1 Z
+bit 1277 C 1 *
+bit 1276 I 1 IO_U21
+bit 1275 O 1 IO_U21 1274 1 Z
+bit 1274 C 1 *
+bit 1273 I 1 IO_U20
+bit 1272 O 1 IO_U20 1271 1 Z
+bit 1271 C 1 *
+bit 1270 I 1 IO_T17
+bit 1269 O 1 IO_T17 1268 1 Z
+bit 1268 C 1 *
+bit 1267 I 1 IO_U18
+bit 1266 O 1 IO_U18 1265 1 Z
+bit 1265 C 1 *
+bit 1264 I 1 IO_V22
+bit 1263 O 1 IO_V22 1262 1 Z
+bit 1262 C 1 *
+bit 1261 I 1 IO_V21
+bit 1260 O 1 IO_V21 1259 1 Z
+bit 1259 C 1 *
+bit 1258 I 1 IO_U19
+bit 1257 O 1 IO_U19 1256 1 Z
+bit 1256 C 1 *
+bit 1255 I 1 IO_V20
+bit 1254 O 1 IO_V20 1253 1 Z
+bit 1253 C 1 *
+bit 1252 I 1 IO_W21
+bit 1251 O 1 IO_W21 1250 1 Z
+bit 1250 C 1 *
+bit 1249 I 1 IO_W20
+bit 1248 O 1 IO_W20 1247 1 Z
+bit 1247 C 1 *
+bit 1246 I 1 IO_V19
+bit 1245 O 1 IO_V19 1244 1 Z
+bit 1244 C 1 *
+bit 1243 I 1 IO_W19
+bit 1242 O 1 IO_W19 1241 1 Z
+bit 1241 C 1 *
+bit 1240 I 1 IO_W22
+bit 1239 O 1 IO_W22 1238 1 Z
+bit 1238 C 1 *
+bit 1237 I 1 IO_Y22
+bit 1236 O 1 IO_Y22 1235 1 Z
+bit 1235 C 1 *
+bit 1234 I 1 IO_Y21
+bit 1233 O 1 IO_Y21 1232 1 Z
+bit 1232 C 1 *
+bit 1231 O 1 *
+bit 1230 O 1 *
+bit 1229 O 1 *
+bit 1228 O 1 *
+bit 1227 O 1 *
+bit 1226 O 1 *
+bit 1225 O 1 *
+bit 1224 O 1 *
+bit 1223 O 1 *
+bit 1222 O 1 *
+bit 1221 O 1 *
+bit 1220 O 1 *
+bit 1219 O 1 *
+bit 1218 O 1 *
+bit 1217 O 1 *
+bit 1216 O 1 *
+bit 1215 O 1 *
+bit 1214 O 1 *
+bit 1213 O 1 *
+bit 1212 O 1 *
+bit 1211 O 1 *
+bit 1210 O 1 *
+bit 1209 O 1 *
+bit 1208 O 1 *
+bit 1207 O 1 *
+bit 1206 O 1 *
+bit 1205 O 1 *
+bit 1204 O 1 *
+bit 1203 O 1 *
+bit 1202 O 1 *
+bit 1201 O 1 *
+bit 1200 O 1 *
+bit 1199 O 1 *
+bit 1198 O 1 *
+bit 1197 O 1 *
+bit 1196 O 1 *
+bit 1195 O 1 *
+bit 1194 O 1 *
+bit 1193 O 1 *
+bit 1192 O 1 *
+bit 1191 O 1 *
+bit 1190 O 1 *
+bit 1189 O 1 *
+bit 1188 O 1 *
+bit 1187 O 1 *
+bit 1186 O 1 *
+bit 1185 O 1 *
+bit 1184 O 1 *
+bit 1183 O 1 *
+bit 1182 O 1 *
+bit 1181 O 1 *
+bit 1180 I 1 IO_Y20
+bit 1179 O 1 IO_Y20 1178 1 Z
+bit 1178 C 1 *
+bit 1177 I 1 IO_Y19
+bit 1176 O 1 IO_Y19 1175 1 Z
+bit 1175 C 1 *
+bit 1174 I 1 CCLK_AA22
+bit 1173 O 1 CCLK_AA22 1172 1 Z
+bit 1172 C 1 *
+bit 1171 I 1 DONE_AB21
+bit 1170 O 1 DONE_AB21 1169 1 Z
+bit 1169 C 1 *
+bit 1168 I 1 IO_V18
+bit 1167 O 1 IO_V18 1166 1 Z
+bit 1166 C 1 *
+bit 1165 I 1 IO_AA20
+bit 1164 O 1 IO_AA20 1163 1 Z
+bit 1163 C 1 *
+bit 1162 I 1 IO_AB20
+bit 1161 O 1 IO_AB20 1160 1 Z
+bit 1160 C 1 *
+bit 1159 O 1 *
+bit 1158 O 1 *
+bit 1157 O 1 *
+bit 1156 O 1 *
+bit 1155 O 1 *
+bit 1154 O 1 *
+bit 1153 O 1 *
+bit 1152 O 1 *
+bit 1151 O 1 *
+bit 1150 I 1 IO_AA19
+bit 1149 O 1 IO_AA19 1148 1 Z
+bit 1148 C 1 *
+bit 1147 I 1 IO_AB19
+bit 1146 O 1 IO_AB19 1145 1 Z
+bit 1145 C 1 *
+bit 1144 I 1 IO_W18
+bit 1143 O 1 IO_W18 1142 1 Z
+bit 1142 C 1 *
+bit 1141 I 1 IO_Y18
+bit 1140 O 1 IO_Y18 1139 1 Z
+bit 1139 C 1 *
+bit 1138 O 1 *
+bit 1137 O 1 *
+bit 1136 O 1 *
+bit 1135 O 1 *
+bit 1134 O 1 *
+bit 1133 O 1 *
+bit 1132 O 1 *
+bit 1131 O 1 *
+bit 1130 O 1 *
+bit 1129 O 1 *
+bit 1128 O 1 *
+bit 1127 O 1 *
+bit 1126 O 1 *
+bit 1125 O 1 *
+bit 1124 O 1 *
+bit 1123 I 1 IO_U17
+bit 1122 O 1 IO_U17 1121 1 Z
+bit 1121 C 1 *
+bit 1120 I 1 IO_AA18
+bit 1119 O 1 IO_AA18 1118 1 Z
+bit 1118 C 1 *
+bit 1117 I 1 IO_AB18
+bit 1116 O 1 IO_AB18 1115 1 Z
+bit 1115 C 1 *
+bit 1114 I 1 IO_V17
+bit 1113 O 1 IO_V17 1112 1 Z
+bit 1112 C 1 *
+bit 1111 I 1 IO_W17
+bit 1110 O 1 IO_W17 1109 1 Z
+bit 1109 C 1 *
+bit 1108 I 1 IO_U16
+bit 1107 O 1 IO_U16 1106 1 Z
+bit 1106 C 1 *
+bit 1105 O 1 *
+bit 1104 O 1 *
+bit 1103 O 1 *
+bit 1102 O 1 *
+bit 1101 O 1 *
+bit 1100 O 1 *
+bit 1099 O 1 *
+bit 1098 O 1 *
+bit 1097 O 1 *
+bit 1096 O 1 *
+bit 1095 O 1 *
+bit 1094 O 1 *
+bit 1093 O 1 *
+bit 1092 O 1 *
+bit 1091 O 1 *
+bit 1090 I 1 IO_Y17
+bit 1089 O 1 IO_Y17 1088 1 Z
+bit 1088 C 1 *
+bit 1087 I 1 IO_AA17
+bit 1086 O 1 IO_AA17 1085 1 Z
+bit 1085 C 1 *
+bit 1084 I 1 IO_V16
+bit 1083 O 1 IO_V16 1082 1 Z
+bit 1082 C 1 *
+bit 1081 I 1 IO_W16
+bit 1080 O 1 IO_W16 1079 1 Z
+bit 1079 C 1 *
+bit 1078 O 1 *
+bit 1077 O 1 *
+bit 1076 O 1 *
+bit 1075 O 1 *
+bit 1074 O 1 *
+bit 1073 O 1 *
+bit 1072 O 1 *
+bit 1071 O 1 *
+bit 1070 O 1 *
+bit 1069 O 1 *
+bit 1068 O 1 *
+bit 1067 O 1 *
+bit 1066 O 1 *
+bit 1065 O 1 *
+bit 1064 O 1 *
+bit 1063 I 1 IO_Y16
+bit 1062 O 1 IO_Y16 1061 1 Z
+bit 1061 C 1 *
+bit 1060 I 1 IO_AA16
+bit 1059 O 1 IO_AA16 1058 1 Z
+bit 1058 C 1 *
+bit 1057 I 1 IO_AB16
+bit 1056 O 1 IO_AB16 1055 1 Z
+bit 1055 C 1 *
+bit 1054 I 1 IO_V15
+bit 1053 O 1 IO_V15 1052 1 Z
+bit 1052 C 1 *
+bit 1051 I 1 IO_W15
+bit 1050 O 1 IO_W15 1049 1 Z
+bit 1049 C 1 *
+bit 1048 O 1 *
+bit 1047 O 1 *
+bit 1046 O 1 *
+bit 1045 O 1 *
+bit 1044 O 1 *
+bit 1043 O 1 *
+bit 1042 O 1 *
+bit 1041 O 1 *
+bit 1040 O 1 *
+bit 1039 I 1 IO_AA15
+bit 1038 O 1 IO_AA15 1037 1 Z
+bit 1037 C 1 *
+bit 1036 I 1 IO_AB15
+bit 1035 O 1 IO_AB15 1034 1 Z
+bit 1034 C 1 *
+bit 1033 O 1 *
+bit 1032 O 1 *
+bit 1031 O 1 *
+bit 1030 I 1 IO_U14
+bit 1029 O 1 IO_U14 1028 1 Z
+bit 1028 C 1 *
+bit 1027 I 1 IO_V14
+bit 1026 O 1 IO_V14 1025 1 Z
+bit 1025 C 1 *
+bit 1024 O 1 *
+bit 1023 O 1 *
+bit 1022 O 1 *
+bit 1021 O 1 *
+bit 1020 O 1 *
+bit 1019 O 1 *
+bit 1018 I 1 IO_W14
+bit 1017 O 1 IO_W14 1016 1 Z
+bit 1016 C 1 *
+bit 1015 I 1 IO_AA14
+bit 1014 O 1 IO_AA14 1013 1 Z
+bit 1013 C 1 *
+bit 1012 I 1 IO_AB14
+bit 1011 O 1 IO_AB14 1010 1 Z
+bit 1010 C 1 *
+bit 1009 I 1 IO_U13
+bit 1008 O 1 IO_U13 1007 1 Z
+bit 1007 C 1 *
+bit 1006 I 1 IO_V13
+bit 1005 O 1 IO_V13 1004 1 Z
+bit 1004 C 1 *
+bit 1003 I 1 IO_W13
+bit 1002 O 1 IO_W13 1001 1 Z
+bit 1001 C 1 *
+bit 1000 I 1 IO_Y13
+bit 999 O 1 IO_Y13 998 1 Z
+bit 998 C 1 *
+bit 997 I 1 IO_AA13
+bit 996 O 1 IO_AA13 995 1 Z
+bit 995 C 1 *
+bit 994 I 1 IO_U12
+bit 993 O 1 IO_U12 992 1 Z
+bit 992 C 1 *
+bit 991 I 1 IO_V12
+bit 990 O 1 IO_V12 989 1 Z
+bit 989 C 1 *
+bit 988 I 1 IO_AB13
+bit 987 O 1 IO_AB13 986 1 Z
+bit 986 C 1 *
+bit 985 I 1 IO_W12
+bit 984 O 1 IO_W12 983 1 Z
+bit 983 C 1 *
+bit 982 I 1 IO_Y12
+bit 981 O 1 IO_Y12 980 1 Z
+bit 980 C 1 *
+bit 979 I 1 IO_AA12
+bit 978 O 1 IO_AA12 977 1 Z
+bit 977 C 1 *
+bit 976 I 1 IO_AB12
+bit 975 O 1 IO_AB12 974 1 Z
+bit 974 C 1 *
+bit 973 I 1 IO_AB11
+bit 972 O 1 IO_AB11 971 1 Z
+bit 971 C 1 *
+bit 970 I 1 IO_AA11
+bit 969 O 1 IO_AA11 968 1 Z
+bit 968 C 1 *
+bit 967 I 1 IO_Y11
+bit 966 O 1 IO_Y11 965 1 Z
+bit 965 C 1 *
+bit 964 I 1 IO_W11
+bit 963 O 1 IO_W11 962 1 Z
+bit 962 C 1 *
+bit 961 I 1 IO_V11
+bit 960 O 1 IO_V11 959 1 Z
+bit 959 C 1 *
+bit 958 I 1 IO_U11
+bit 957 O 1 IO_U11 956 1 Z
+bit 956 C 1 *
+bit 955 I 1 IO_AB10
+bit 954 O 1 IO_AB10 953 1 Z
+bit 953 C 1 *
+bit 952 I 1 IO_AA10
+bit 951 O 1 IO_AA10 950 1 Z
+bit 950 C 1 *
+bit 949 I 1 IO_Y10
+bit 948 O 1 IO_Y10 947 1 Z
+bit 947 C 1 *
+bit 946 I 1 IO_W10
+bit 945 O 1 IO_W10 944 1 Z
+bit 944 C 1 *
+bit 943 I 1 IO_V10
+bit 942 O 1 IO_V10 941 1 Z
+bit 941 C 1 *
+bit 940 I 1 IO_AB9
+bit 939 O 1 IO_AB9 938 1 Z
+bit 938 C 1 *
+bit 937 I 1 IO_AA9
+bit 936 O 1 IO_AA9 935 1 Z
+bit 935 C 1 *
+bit 934 I 1 IO_W9
+bit 933 O 1 IO_W9 932 1 Z
+bit 932 C 1 *
+bit 931 I 1 IO_V9
+bit 930 O 1 IO_V9 929 1 Z
+bit 929 C 1 *
+bit 928 I 1 IO_U10
+bit 927 O 1 IO_U10 926 1 Z
+bit 926 C 1 *
+bit 925 O 1 *
+bit 924 O 1 *
+bit 923 O 1 *
+bit 922 O 1 *
+bit 921 O 1 *
+bit 920 O 1 *
+bit 919 I 1 IO_AB8
+bit 918 O 1 IO_AB8 917 1 Z
+bit 917 C 1 *
+bit 916 I 1 IO_AA8
+bit 915 O 1 IO_AA8 914 1 Z
+bit 914 C 1 *
+bit 913 O 1 *
+bit 912 O 1 *
+bit 911 O 1 *
+bit 910 I 1 IO_W8
+bit 909 O 1 IO_W8 908 1 Z
+bit 908 C 1 *
+bit 907 I 1 IO_V8
+bit 906 O 1 IO_V8 905 1 Z
+bit 905 C 1 *
+bit 904 O 1 *
+bit 903 O 1 *
+bit 902 O 1 *
+bit 901 O 1 *
+bit 900 O 1 *
+bit 899 O 1 *
+bit 898 I 1 IO_U9
+bit 897 O 1 IO_U9 896 1 Z
+bit 896 C 1 *
+bit 895 I 1 IO_AB7
+bit 894 O 1 IO_AB7 893 1 Z
+bit 893 C 1 *
+bit 892 I 1 IO_AA7
+bit 891 O 1 IO_AA7 890 1 Z
+bit 890 C 1 *
+bit 889 I 1 IO_Y7
+bit 888 O 1 IO_Y7 887 1 Z
+bit 887 C 1 *
+bit 886 I 1 IO_W7
+bit 885 O 1 IO_W7 884 1 Z
+bit 884 C 1 *
+bit 883 O 1 *
+bit 882 O 1 *
+bit 881 O 1 *
+bit 880 O 1 *
+bit 879 O 1 *
+bit 878 O 1 *
+bit 877 O 1 *
+bit 876 O 1 *
+bit 875 O 1 *
+bit 874 O 1 *
+bit 873 O 1 *
+bit 872 O 1 *
+bit 871 O 1 *
+bit 870 O 1 *
+bit 869 O 1 *
+bit 868 I 1 IO_V7
+bit 867 O 1 IO_V7 866 1 Z
+bit 866 C 1 *
+bit 865 I 1 IO_AA6
+bit 864 O 1 IO_AA6 863 1 Z
+bit 863 C 1 *
+bit 862 I 1 IO_Y6
+bit 861 O 1 IO_Y6 860 1 Z
+bit 860 C 1 *
+bit 859 I 1 IO_W6
+bit 858 O 1 IO_W6 857 1 Z
+bit 857 C 1 *
+bit 856 I 1 IO_V6
+bit 855 O 1 IO_V6 854 1 Z
+bit 854 C 1 *
+bit 853 O 1 *
+bit 852 O 1 *
+bit 851 O 1 *
+bit 850 O 1 *
+bit 849 O 1 *
+bit 848 O 1 *
+bit 847 O 1 *
+bit 846 O 1 *
+bit 845 O 1 *
+bit 844 O 1 *
+bit 843 O 1 *
+bit 842 O 1 *
+bit 841 O 1 *
+bit 840 O 1 *
+bit 839 O 1 *
+bit 838 I 1 IO_U7
+bit 837 O 1 IO_U7 836 1 Z
+bit 836 C 1 *
+bit 835 I 1 IO_AB5
+bit 834 O 1 IO_AB5 833 1 Z
+bit 833 C 1 *
+bit 832 I 1 IO_AA5
+bit 831 O 1 IO_AA5 830 1 Z
+bit 830 C 1 *
+bit 829 I 1 IO_Y5
+bit 828 O 1 IO_Y5 827 1 Z
+bit 827 C 1 *
+bit 826 I 1 IO_W5
+bit 825 O 1 IO_W5 824 1 Z
+bit 824 C 1 *
+bit 823 O 1 *
+bit 822 O 1 *
+bit 821 O 1 *
+bit 820 O 1 *
+bit 819 O 1 *
+bit 818 O 1 *
+bit 817 O 1 *
+bit 816 O 1 *
+bit 815 O 1 *
+bit 814 O 1 *
+bit 813 O 1 *
+bit 812 O 1 *
+bit 811 O 1 *
+bit 810 O 1 *
+bit 809 O 1 *
+bit 808 I 1 IO_U6
+bit 807 O 1 IO_U6 806 1 Z
+bit 806 C 1 *
+bit 805 I 1 IO_AB4
+bit 804 O 1 IO_AB4 803 1 Z
+bit 803 C 1 *
+bit 802 I 1 IO_AA4
+bit 801 O 1 IO_AA4 800 1 Z
+bit 800 C 1 *
+bit 799 O 1 *
+bit 798 O 1 *
+bit 797 O 1 *
+bit 796 O 1 *
+bit 795 O 1 *
+bit 794 O 1 *
+bit 793 O 1 *
+bit 792 O 1 *
+bit 791 O 1 *
+bit 790 O 1 *
+bit 789 O 1 *
+bit 788 O 1 *
+bit 787 O 1 *
+bit 786 O 1 *
+bit 785 O 1 *
+bit 784 I 1 IO_Y4
+bit 783 O 1 IO_Y4 782 1 Z
+bit 782 C 1 *
+bit 781 I 1 IO_AA3
+bit 780 O 1 IO_AA3 779 1 Z
+bit 779 C 1 *
+bit 778 I 1 M2_AB3
+bit 777 I 1 M0_AB2
+bit 776 I 1 M1_AA1
+bit 775 I 1 IO_Y3
+bit 774 O 1 IO_Y3 773 1 Z
+bit 773 C 1 *
+bit 772 I 1 IO_Y2
+bit 771 O 1 IO_Y2 770 1 Z
+bit 770 C 1 *
+bit 769 O 1 *
+bit 768 O 1 *
+bit 767 O 1 *
+bit 766 O 1 *
+bit 765 O 1 *
+bit 764 O 1 *
+bit 763 O 1 *
+bit 762 O 1 *
+bit 761 O 1 *
+bit 760 O 1 *
+bit 759 O 1 *
+bit 758 O 1 *
+bit 757 O 1 *
+bit 756 O 1 *
+bit 755 O 1 *
+bit 754 O 1 *
+bit 753 O 1 *
+bit 752 O 1 *
+bit 751 O 1 *
+bit 750 O 1 *
+bit 749 O 1 *
+bit 748 O 1 *
+bit 747 O 1 *
+bit 746 O 1 *
+bit 745 O 1 *
+bit 744 O 1 *
+bit 743 O 1 *
+bit 742 O 1 *
+bit 741 O 1 *
+bit 740 O 1 *
+bit 739 O 1 *
+bit 738 O 1 *
+bit 737 O 1 *
+bit 736 O 1 *
+bit 735 O 1 *
+bit 734 O 1 *
+bit 733 O 1 *
+bit 732 O 1 *
+bit 731 O 1 *
+bit 730 O 1 *
+bit 729 O 1 *
+bit 728 O 1 *
+bit 727 O 1 *
+bit 726 O 1 *
+bit 725 O 1 *
+bit 724 O 1 *
+bit 723 O 1 *
+bit 722 O 1 *
+bit 721 O 1 *
+bit 720 O 1 *
+bit 719 O 1 *
+bit 718 I 1 IO_Y1
+bit 717 O 1 IO_Y1 716 1 Z
+bit 716 C 1 *
+bit 715 I 1 IO_W4
+bit 714 O 1 IO_W4 713 1 Z
+bit 713 C 1 *
+bit 712 I 1 IO_W3
+bit 711 O 1 IO_W3 710 1 Z
+bit 710 C 1 *
+bit 709 I 1 IO_W2
+bit 708 O 1 IO_W2 707 1 Z
+bit 707 C 1 *
+bit 706 I 1 IO_W1
+bit 705 O 1 IO_W1 704 1 Z
+bit 704 C 1 *
+bit 703 I 1 IO_V5
+bit 702 O 1 IO_V5 701 1 Z
+bit 701 C 1 *
+bit 700 I 1 IO_U5
+bit 699 O 1 IO_U5 698 1 Z
+bit 698 C 1 *
+bit 697 I 1 IO_V4
+bit 696 O 1 IO_V4 695 1 Z
+bit 695 C 1 *
+bit 694 I 1 IO_V3
+bit 693 O 1 IO_V3 692 1 Z
+bit 692 C 1 *
+bit 691 I 1 IO_V2
+bit 690 O 1 IO_V2 689 1 Z
+bit 689 C 1 *
+bit 688 I 1 IO_V1
+bit 687 O 1 IO_V1 686 1 Z
+bit 686 C 1 *
+bit 685 I 1 IO_T6
+bit 684 O 1 IO_T6 683 1 Z
+bit 683 C 1 *
+bit 682 I 1 IO_T5
+bit 681 O 1 IO_T5 680 1 Z
+bit 680 C 1 *
+bit 679 I 1 IO_U4
+bit 678 O 1 IO_U4 677 1 Z
+bit 677 C 1 *
+bit 676 I 1 IO_T4
+bit 675 O 1 IO_T4 674 1 Z
+bit 674 C 1 *
+bit 673 I 1 IO_U3
+bit 672 O 1 IO_U3 671 1 Z
+bit 671 C 1 *
+bit 670 I 1 IO_U2
+bit 669 O 1 IO_U2 668 1 Z
+bit 668 C 1 *
+bit 667 I 1 IO_T3
+bit 666 O 1 IO_T3 665 1 Z
+bit 665 C 1 *
+bit 664 I 1 IO_R4
+bit 663 O 1 IO_R4 662 1 Z
+bit 662 C 1 *
+bit 661 I 1 IO_T2
+bit 660 O 1 IO_T2 659 1 Z
+bit 659 C 1 *
+bit 658 I 1 IO_T1
+bit 657 O 1 IO_T1 656 1 Z
+bit 656 C 1 *
+bit 655 I 1 IO_R5
+bit 654 O 1 IO_R5 653 1 Z
+bit 653 C 1 *
+bit 652 I 1 IO_P6
+bit 651 O 1 IO_P6 650 1 Z
+bit 650 C 1 *
+bit 649 I 1 IO_R2
+bit 648 O 1 IO_R2 647 1 Z
+bit 647 C 1 *
+bit 646 I 1 IO_R1
+bit 645 O 1 IO_R1 644 1 Z
+bit 644 C 1 *
+bit 643 O 1 *
+bit 642 O 1 *
+bit 641 O 1 *
+bit 640 O 1 *
+bit 639 O 1 *
+bit 638 O 1 *
+bit 637 I 1 IO_P5
+bit 636 O 1 IO_P5 635 1 Z
+bit 635 C 1 *
+bit 634 I 1 IO_P4
+bit 633 O 1 IO_P4 632 1 Z
+bit 632 C 1 *
+bit 631 I 1 IO_P2
+bit 630 O 1 IO_P2 629 1 Z
+bit 629 C 1 *
+bit 628 I 1 IO_P1
+bit 627 O 1 IO_P1 626 1 Z
+bit 626 C 1 *
+bit 625 I 1 IO_N6
+bit 624 O 1 IO_N6 623 1 Z
+bit 623 C 1 *
+bit 622 I 1 IO_N5
+bit 621 O 1 IO_N5 620 1 Z
+bit 620 C 1 *
+bit 619 I 1 IO_N4
+bit 618 O 1 IO_N4 617 1 Z
+bit 617 C 1 *
+bit 616 I 1 IO_N3
+bit 615 O 1 IO_N3 614 1 Z
+bit 614 C 1 *
+bit 613 I 1 IO_N2
+bit 612 O 1 IO_N2 611 1 Z
+bit 611 C 1 *
+bit 610 I 1 IO_N1
+bit 609 O 1 IO_N1 608 1 Z
+bit 608 C 1 *
+bit 607 O 1 *
+bit 606 O 1 *
+bit 605 O 1 *
+bit 604 O 1 *
+bit 603 O 1 *
+bit 602 O 1 *
+bit 601 I 1 IO_M6
+bit 600 O 1 IO_M6 599 1 Z
+bit 599 C 1 *
+bit 598 I 1 IO_M5
+bit 597 O 1 IO_M5 596 1 Z
+bit 596 C 1 *
+bit 595 I 1 IO_M4
+bit 594 O 1 IO_M4 593 1 Z
+bit 593 C 1 *
+bit 592 I 1 IO_M3
+bit 591 O 1 IO_M3 590 1 Z
+bit 590 C 1 *
+bit 589 I 1 IO_M2
+bit 588 O 1 IO_M2 587 1 Z
+bit 587 C 1 *
+bit 586 I 1 IO_M1
+bit 585 O 1 IO_M1 584 1 Z
+bit 584 C 1 *
+bit 583 I 1 IO_L1
+bit 582 O 1 IO_L1 581 1 Z
+bit 581 C 1 *
+bit 580 I 1 IO_L2
+bit 579 O 1 IO_L2 578 1 Z
+bit 578 C 1 *
+bit 577 I 1 IO_L3
+bit 576 O 1 IO_L3 575 1 Z
+bit 575 C 1 *
+bit 574 I 1 IO_L4
+bit 573 O 1 IO_L4 572 1 Z
+bit 572 C 1 *
+bit 571 I 1 IO_L5
+bit 570 O 1 IO_L5 569 1 Z
+bit 569 C 1 *
+bit 568 I 1 IO_L6
+bit 567 O 1 IO_L6 566 1 Z
+bit 566 C 1 *
+bit 565 O 1 *
+bit 564 O 1 *
+bit 563 O 1 *
+bit 562 O 1 *
+bit 561 O 1 *
+bit 560 O 1 *
+bit 559 I 1 IO_K1
+bit 558 O 1 IO_K1 557 1 Z
+bit 557 C 1 *
+bit 556 I 1 IO_K2
+bit 555 O 1 IO_K2 554 1 Z
+bit 554 C 1 *
+bit 553 I 1 IO_K3
+bit 552 O 1 IO_K3 551 1 Z
+bit 551 C 1 *
+bit 550 I 1 IO_K4
+bit 549 O 1 IO_K4 548 1 Z
+bit 548 C 1 *
+bit 547 I 1 IO_K5
+bit 546 O 1 IO_K5 545 1 Z
+bit 545 C 1 *
+bit 544 I 1 IO_K6
+bit 543 O 1 IO_K6 542 1 Z
+bit 542 C 1 *
+bit 541 I 1 IO_J1
+bit 540 O 1 IO_J1 539 1 Z
+bit 539 C 1 *
+bit 538 I 1 IO_J2
+bit 537 O 1 IO_J2 536 1 Z
+bit 536 C 1 *
+bit 535 I 1 IO_J5
+bit 534 O 1 IO_J5 533 1 Z
+bit 533 C 1 *
+bit 532 I 1 IO_J6
+bit 531 O 1 IO_J6 530 1 Z
+bit 530 C 1 *
+bit 529 O 1 *
+bit 528 O 1 *
+bit 527 O 1 *
+bit 526 O 1 *
+bit 525 O 1 *
+bit 524 O 1 *
+bit 523 I 1 IO_J4
+bit 522 O 1 IO_J4 521 1 Z
+bit 521 C 1 *
+bit 520 I 1 IO_H4
+bit 519 O 1 IO_H4 518 1 Z
+bit 518 C 1 *
+bit 517 I 1 IO_H1
+bit 516 O 1 IO_H1 515 1 Z
+bit 515 C 1 *
+bit 514 I 1 IO_H2
+bit 513 O 1 IO_H2 512 1 Z
+bit 512 C 1 *
+bit 511 I 1 IO_G1
+bit 510 O 1 IO_G1 509 1 Z
+bit 509 C 1 *
+bit 508 I 1 IO_G2
+bit 507 O 1 IO_G2 506 1 Z
+bit 506 C 1 *
+bit 505 I 1 IO_G3
+bit 504 O 1 IO_G3 503 1 Z
+bit 503 C 1 *
+bit 502 I 1 IO_G4
+bit 501 O 1 IO_G4 500 1 Z
+bit 500 C 1 *
+bit 499 I 1 IO_H5
+bit 498 O 1 IO_H5 497 1 Z
+bit 497 C 1 *
+bit 496 I 1 IO_G5
+bit 495 O 1 IO_G5 494 1 Z
+bit 494 C 1 *
+bit 493 I 1 IO_F2
+bit 492 O 1 IO_F2 491 1 Z
+bit 491 C 1 *
+bit 490 I 1 IO_F3
+bit 489 O 1 IO_F3 488 1 Z
+bit 488 C 1 *
+bit 487 I 1 IO_G6
+bit 486 O 1 IO_G6 485 1 Z
+bit 485 C 1 *
+bit 484 I 1 IO_F5
+bit 483 O 1 IO_F5 482 1 Z
+bit 482 C 1 *
+bit 481 I 1 IO_E1
+bit 480 O 1 IO_E1 479 1 Z
+bit 479 C 1 *
+bit 478 I 1 IO_E2
+bit 477 O 1 IO_E2 476 1 Z
+bit 476 C 1 *
+bit 475 I 1 IO_F4
+bit 474 O 1 IO_F4 473 1 Z
+bit 473 C 1 *
+bit 472 I 1 IO_E3
+bit 471 O 1 IO_E3 470 1 Z
+bit 470 C 1 *
+bit 469 I 1 IO_D3
+bit 468 O 1 IO_D3 467 1 Z
+bit 467 C 1 *
+bit 466 I 1 IO_D2
+bit 465 O 1 IO_D2 464 1 Z
+bit 464 C 1 *
+bit 463 I 1 IO_E4
+bit 462 O 1 IO_E4 461 1 Z
+bit 461 C 1 *
+bit 460 I 1 IO_D4
+bit 459 O 1 IO_D4 458 1 Z
+bit 458 C 1 *
+bit 457 I 1 IO_D1
+bit 456 O 1 IO_D1 455 1 Z
+bit 455 C 1 *
+bit 454 I 1 IO_C1
+bit 453 O 1 IO_C1 452 1 Z
+bit 452 C 1 *
+bit 451 I 1 IO_C2
+bit 450 O 1 IO_C2 449 1 Z
+bit 449 C 1 *
+bit 448 O 1 *
+bit 447 O 1 *
+bit 446 O 1 *
+bit 445 O 1 *
+bit 444 O 1 *
+bit 443 O 1 *
+bit 442 O 1 *
+bit 441 O 1 *
+bit 440 O 1 *
+bit 439 O 1 *
+bit 438 O 1 *
+bit 437 O 1 *
+bit 436 O 1 *
+bit 435 O 1 *
+bit 434 O 1 *
+bit 433 O 1 *
+bit 432 O 1 *
+bit 431 O 1 *
+bit 430 O 1 *
+bit 429 O 1 *
+bit 428 O 1 *
+bit 427 O 1 *
+bit 426 O 1 *
+bit 425 O 1 *
+bit 424 O 1 *
+bit 423 O 1 *
+bit 422 O 1 *
+bit 421 O 1 *
+bit 420 O 1 *
+bit 419 O 1 *
+bit 418 O 1 *
+bit 417 O 1 *
+bit 416 O 1 *
+bit 415 O 1 *
+bit 414 O 1 *
+bit 413 O 1 *
+bit 412 O 1 *
+bit 411 O 1 *
+bit 410 O 1 *
+bit 409 O 1 *
+bit 408 O 1 *
+bit 407 O 1 *
+bit 406 O 1 *
+bit 405 O 1 *
+bit 404 O 1 *
+bit 403 O 1 *
+bit 402 O 1 *
+bit 401 O 1 *
+bit 400 O 1 *
+bit 399 O 1 *
+bit 398 O 1 *
+bit 397 I 1 IO_C3
+bit 396 O 1 IO_C3 395 1 Z
+bit 395 C 1 *
+bit 394 I 1 IO_C4
+bit 393 O 1 IO_C4 392 1 Z
+bit 392 C 1 *
+bit 391 O 1 *
+bit 390 I 1 HSWAP_EN_B3
+bit 389 I 1 IO_A3
+bit 388 O 1 IO_A3 387 1 Z
+bit 387 C 1 *
+bit 386 I 1 IO_B4
+bit 385 O 1 IO_B4 384 1 Z
+bit 384 C 1 *
+bit 383 I 1 IO_A4
+bit 382 O 1 IO_A4 381 1 Z
+bit 381 C 1 *
+bit 380 O 1 *
+bit 379 O 1 *
+bit 378 O 1 *
+bit 377 O 1 *
+bit 376 O 1 *
+bit 375 O 1 *
+bit 374 O 1 *
+bit 373 O 1 *
+bit 372 O 1 *
+bit 371 O 1 *
+bit 370 O 1 *
+bit 369 O 1 *
+bit 368 I 1 IO_E5
+bit 367 O 1 IO_E5 366 1 Z
+bit 366 C 1 *
+bit 365 I 1 IO_D5
+bit 364 O 1 IO_D5 363 1 Z
+bit 363 C 1 *
+bit 362 I 1 IO_C5
+bit 361 O 1 IO_C5 360 1 Z
+bit 360 C 1 *
+bit 359 O 1 *
+bit 358 O 1 *
+bit 357 O 1 *
+bit 356 O 1 *
+bit 355 O 1 *
+bit 354 O 1 *
+bit 353 O 1 *
+bit 352 O 1 *
+bit 351 O 1 *
+bit 350 O 1 *
+bit 349 O 1 *
+bit 348 O 1 *
+bit 347 O 1 *
+bit 346 O 1 *
+bit 345 O 1 *
+bit 344 I 1 IO_F6
+bit 343 O 1 IO_F6 342 1 Z
+bit 342 C 1 *
+bit 341 I 1 IO_B5
+bit 340 O 1 IO_B5 339 1 Z
+bit 339 C 1 *
+bit 338 I 1 IO_A5
+bit 337 O 1 IO_A5 336 1 Z
+bit 336 C 1 *
+bit 335 I 1 IO_E6
+bit 334 O 1 IO_E6 333 1 Z
+bit 333 C 1 *
+bit 332 I 1 IO_D6
+bit 331 O 1 IO_D6 330 1 Z
+bit 330 C 1 *
+bit 329 I 1 IO_F7
+bit 328 O 1 IO_F7 327 1 Z
+bit 327 C 1 *
+bit 326 O 1 *
+bit 325 O 1 *
+bit 324 O 1 *
+bit 323 O 1 *
+bit 322 O 1 *
+bit 321 O 1 *
+bit 320 O 1 *
+bit 319 O 1 *
+bit 318 O 1 *
+bit 317 O 1 *
+bit 316 O 1 *
+bit 315 O 1 *
+bit 314 O 1 *
+bit 313 O 1 *
+bit 312 O 1 *
+bit 311 I 1 IO_C6
+bit 310 O 1 IO_C6 309 1 Z
+bit 309 C 1 *
+bit 308 I 1 IO_B6
+bit 307 O 1 IO_B6 306 1 Z
+bit 306 C 1 *
+bit 305 I 1 IO_E7
+bit 304 O 1 IO_E7 303 1 Z
+bit 303 C 1 *
+bit 302 I 1 IO_D7
+bit 301 O 1 IO_D7 300 1 Z
+bit 300 C 1 *
+bit 299 O 1 *
+bit 298 O 1 *
+bit 297 O 1 *
+bit 296 O 1 *
+bit 295 O 1 *
+bit 294 O 1 *
+bit 293 O 1 *
+bit 292 O 1 *
+bit 291 O 1 *
+bit 290 O 1 *
+bit 289 O 1 *
+bit 288 O 1 *
+bit 287 O 1 *
+bit 286 O 1 *
+bit 285 O 1 *
+bit 284 I 1 IO_C7
+bit 283 O 1 IO_C7 282 1 Z
+bit 282 C 1 *
+bit 281 I 1 IO_B7
+bit 280 O 1 IO_B7 279 1 Z
+bit 279 C 1 *
+bit 278 I 1 IO_A7
+bit 277 O 1 IO_A7 276 1 Z
+bit 276 C 1 *
+bit 275 I 1 IO_E8
+bit 274 O 1 IO_E8 273 1 Z
+bit 273 C 1 *
+bit 272 I 1 IO_D8
+bit 271 O 1 IO_D8 270 1 Z
+bit 270 C 1 *
+bit 269 O 1 *
+bit 268 O 1 *
+bit 267 O 1 *
+bit 266 O 1 *
+bit 265 O 1 *
+bit 264 O 1 *
+bit 263 O 1 *
+bit 262 O 1 *
+bit 261 O 1 *
+bit 260 I 1 IO_B8
+bit 259 O 1 IO_B8 258 1 Z
+bit 258 C 1 *
+bit 257 I 1 IO_A8
+bit 256 O 1 IO_A8 255 1 Z
+bit 255 C 1 *
+bit 254 O 1 *
+bit 253 O 1 *
+bit 252 O 1 *
+bit 251 I 1 IO_F9
+bit 250 O 1 IO_F9 249 1 Z
+bit 249 C 1 *
+bit 248 I 1 IO_E9
+bit 247 O 1 IO_E9 246 1 Z
+bit 246 C 1 *
+bit 245 O 1 *
+bit 244 O 1 *
+bit 243 O 1 *
+bit 242 O 1 *
+bit 241 O 1 *
+bit 240 O 1 *
+bit 239 I 1 IO_D9
+bit 238 O 1 IO_D9 237 1 Z
+bit 237 C 1 *
+bit 236 I 1 IO_B9
+bit 235 O 1 IO_B9 234 1 Z
+bit 234 C 1 *
+bit 233 I 1 IO_A9
+bit 232 O 1 IO_A9 231 1 Z
+bit 231 C 1 *
+bit 230 I 1 IO_F10
+bit 229 O 1 IO_F10 228 1 Z
+bit 228 C 1 *
+bit 227 I 1 IO_E10
+bit 226 O 1 IO_E10 225 1 Z
+bit 225 C 1 *
+bit 224 I 1 IO_D10
+bit 223 O 1 IO_D10 222 1 Z
+bit 222 C 1 *
+bit 221 I 1 IO_C10
+bit 220 O 1 IO_C10 219 1 Z
+bit 219 C 1 *
+bit 218 I 1 IO_B10
+bit 217 O 1 IO_B10 216 1 Z
+bit 216 C 1 *
+bit 215 I 1 IO_F11
+bit 214 O 1 IO_F11 213 1 Z
+bit 213 C 1 *
+bit 212 I 1 IO_E11
+bit 211 O 1 IO_E11 210 1 Z
+bit 210 C 1 *
+bit 209 I 1 IO_A10
+bit 208 O 1 IO_A10 207 1 Z
+bit 207 C 1 *
+bit 206 I 1 IO_D11
+bit 205 O 1 IO_D11 204 1 Z
+bit 204 C 1 *
+bit 203 I 1 IO_C11
+bit 202 O 1 IO_C11 201 1 Z
+bit 201 C 1 *
+bit 200 I 1 IO_B11
+bit 199 O 1 IO_B11 198 1 Z
+bit 198 C 1 *
+bit 197 I 1 IO_A11
+bit 196 O 1 IO_A11 195 1 Z
+bit 195 C 1 *
+bit 194 I 1 IO_A12
+bit 193 O 1 IO_A12 192 1 Z
+bit 192 C 1 *
+bit 191 I 1 IO_B12
+bit 190 O 1 IO_B12 189 1 Z
+bit 189 C 1 *
+bit 188 I 1 IO_C12
+bit 187 O 1 IO_C12 186 1 Z
+bit 186 C 1 *
+bit 185 I 1 IO_D12
+bit 184 O 1 IO_D12 183 1 Z
+bit 183 C 1 *
+bit 182 I 1 IO_E12
+bit 181 O 1 IO_E12 180 1 Z
+bit 180 C 1 *
+bit 179 I 1 IO_F12
+bit 178 O 1 IO_F12 177 1 Z
+bit 177 C 1 *
+bit 176 I 1 IO_A13
+bit 175 O 1 IO_A13 174 1 Z
+bit 174 C 1 *
+bit 173 I 1 IO_B13
+bit 172 O 1 IO_B13 171 1 Z
+bit 171 C 1 *
+bit 170 I 1 IO_C13
+bit 169 O 1 IO_C13 168 1 Z
+bit 168 C 1 *
+bit 167 I 1 IO_D13
+bit 166 O 1 IO_D13 165 1 Z
+bit 165 C 1 *
+bit 164 I 1 IO_E13
+bit 163 O 1 IO_E13 162 1 Z
+bit 162 C 1 *
+bit 161 I 1 IO_A14
+bit 160 O 1 IO_A14 159 1 Z
+bit 159 C 1 *
+bit 158 I 1 IO_B14
+bit 157 O 1 IO_B14 156 1 Z
+bit 156 C 1 *
+bit 155 I 1 IO_D14
+bit 154 O 1 IO_D14 153 1 Z
+bit 153 C 1 *
+bit 152 I 1 IO_E14
+bit 151 O 1 IO_E14 150 1 Z
+bit 150 C 1 *
+bit 149 I 1 IO_F13
+bit 148 O 1 IO_F13 147 1 Z
+bit 147 C 1 *
+bit 146 O 1 *
+bit 145 O 1 *
+bit 144 O 1 *
+bit 143 O 1 *
+bit 142 O 1 *
+bit 141 O 1 *
+bit 140 I 1 IO_B15
+bit 139 O 1 IO_B15 138 1 Z
+bit 138 C 1 *
+bit 137 I 1 IO_A15
+bit 136 O 1 IO_A15 135 1 Z
+bit 135 C 1 *
+bit 134 O 1 *
+bit 133 O 1 *
+bit 132 O 1 *
+bit 131 I 1 IO_D15
+bit 130 O 1 IO_D15 129 1 Z
+bit 129 C 1 *
+bit 128 I 1 IO_E15
+bit 127 O 1 IO_E15 126 1 Z
+bit 126 C 1 *
+bit 125 O 1 *
+bit 124 O 1 *
+bit 123 O 1 *
+bit 122 O 1 *
+bit 121 O 1 *
+bit 120 O 1 *
+bit 119 I 1 IO_F14
+bit 118 O 1 IO_F14 117 1 Z
+bit 117 C 1 *
+bit 116 I 1 IO_A16
+bit 115 O 1 IO_A16 114 1 Z
+bit 114 C 1 *
+bit 113 I 1 IO_B16
+bit 112 O 1 IO_B16 111 1 Z
+bit 111 C 1 *
+bit 110 I 1 IO_C16
+bit 109 O 1 IO_C16 108 1 Z
+bit 108 C 1 *
+bit 107 I 1 IO_D16
+bit 106 O 1 IO_D16 105 1 Z
+bit 105 C 1 *
+bit 104 O 1 *
+bit 103 O 1 *
+bit 102 O 1 *
+bit 101 O 1 *
+bit 100 O 1 *
+bit 99 O 1 *
+bit 98 O 1 *
+bit 97 O 1 *
+bit 96 O 1 *
+bit 95 O 1 *
+bit 94 O 1 *
+bit 93 O 1 *
+bit 92 O 1 *
+bit 91 O 1 *
+bit 90 O 1 *
+bit 89 I 1 IO_E16
+bit 88 O 1 IO_E16 87 1 Z
+bit 87 C 1 *
+bit 86 I 1 IO_B17
+bit 85 O 1 IO_B17 84 1 Z
+bit 84 C 1 *
+bit 83 I 1 IO_C17
+bit 82 O 1 IO_C17 81 1 Z
+bit 81 C 1 *
+bit 80 I 1 IO_D17
+bit 79 O 1 IO_D17 78 1 Z
+bit 78 C 1 *
+bit 77 I 1 IO_E17
+bit 76 O 1 IO_E17 75 1 Z
+bit 75 C 1 *
+bit 74 O 1 *
+bit 73 O 1 *
+bit 72 O 1 *
+bit 71 O 1 *
+bit 70 O 1 *
+bit 69 O 1 *
+bit 68 O 1 *
+bit 67 O 1 *
+bit 66 O 1 *
+bit 65 O 1 *
+bit 64 O 1 *
+bit 63 O 1 *
+bit 62 O 1 *
+bit 61 O 1 *
+bit 60 O 1 *
+bit 59 I 1 IO_F16
+bit 58 O 1 IO_F16 57 1 Z
+bit 57 C 1 *
+bit 56 I 1 IO_A18
+bit 55 O 1 IO_A18 54 1 Z
+bit 54 C 1 *
+bit 53 I 1 IO_B18
+bit 52 O 1 IO_B18 51 1 Z
+bit 51 C 1 *
+bit 50 I 1 IO_C18
+bit 49 O 1 IO_C18 48 1 Z
+bit 48 C 1 *
+bit 47 I 1 IO_D18
+bit 46 O 1 IO_D18 45 1 Z
+bit 45 C 1 *
+bit 44 O 1 *
+bit 43 O 1 *
+bit 42 O 1 *
+bit 41 O 1 *
+bit 40 O 1 *
+bit 39 O 1 *
+bit 38 O 1 *
+bit 37 O 1 *
+bit 36 O 1 *
+bit 35 O 1 *
+bit 34 O 1 *
+bit 33 O 1 *
+bit 32 O 1 *
+bit 31 O 1 *
+bit 30 O 1 *
+bit 29 I 1 IO_F17
+bit 28 O 1 IO_F17 27 1 Z
+bit 27 C 1 *
+bit 26 I 1 IO_A19
+bit 25 O 1 IO_A19 24 1 Z
+bit 24 C 1 *
+bit 23 I 1 IO_B19
+bit 22 O 1 IO_B19 21 1 Z
+bit 21 C 1 *
+bit 20 O 1 *
+bit 19 O 1 *
+bit 18 O 1 *
+bit 17 O 1 *
+bit 16 O 1 *
+bit 15 O 1 *
+bit 14 O 1 *
+bit 13 O 1 *
+bit 12 O 1 *
+bit 11 O 1 *
+bit 10 O 1 *
+bit 9 O 1 *
+bit 8 O 1 *
+bit 7 O 1 *
+bit 6 O 1 *
+bit 5 I 1 IO_C19
+bit 4 O 1 IO_C19 3 1 Z
+bit 3 C 1 *
+bit 2 I 1 IO_B20
+bit 1 O 1 IO_B20 0 1 Z
+bit 0 C 1 *
--- /dev/null
+signal GND1
+signal GND2
+signal GND3
+signal GND4
+signal GND5
+signal GND6
+signal GND7
+signal GND8
+signal GND9
+signal GND10
+signal GND11
+signal GND12
+signal GND13
+signal GND14
+signal GND15
+signal GND16
+signal GND17
+signal GND18
+signal GND19
+signal GND20
+signal GND21
+signal GND22
+signal GND23
+signal GND24
+signal GND25
+signal GND26
+signal GND27
+signal GND28
+signal GND29
+signal GND30
+signal GND31
+signal GND32
+signal GND33
+signal GND34
+signal GND35
+signal GND36
+signal GND37
+signal GND38
+signal GND39
+signal GND40
+signal GND41
+signal GND42
+signal GND43
+signal GND44
+signal GND45
+signal GND46
+signal GND47
+signal GND48
+signal GND49
+signal GND50
+signal GND51
+signal GND52
+signal GND53
+signal GND54
+signal GND55
+signal GND56
+signal GND57
+signal GND58
+signal GND59
+signal GND60
+signal GND61
+signal GND62
+signal GND63
+signal GND64
+signal GND65
+signal GND66
+signal GND67
+signal GND68
+signal GND69
+signal GND70
+signal GND71
+signal GND72
+signal GND73
+signal GND74
+signal GND75
+signal GND76
+signal CCLK_AD26
+signal DONE_AC24
+signal HSWAP_EN_C2
+signal M0_AE3
+signal M1_AC3
+signal M2_AF3
+signal PROG_B
+signal TCK
+signal TDI
+signal TDO
+signal TMS
+signal VCCAUX1
+signal VCCAUX2
+signal VCCAUX3
+signal VCCAUX4
+signal VCCAUX5
+signal VCCAUX6
+signal VCCAUX7
+signal VCCAUX8
+signal VCCAUX9
+signal VCCAUX10
+signal VCCAUX11
+signal VCCAUX12
+signal VCCAUX13
+signal VCCAUX14
+signal VCCAUX15
+signal VCCAUX16
+signal VCCINT1
+signal VCCINT2
+signal VCCINT3
+signal VCCINT4
+signal VCCINT5
+signal VCCINT6
+signal VCCINT7
+signal VCCINT8
+signal VCCINT9
+signal VCCINT10
+signal VCCINT11
+signal VCCINT12
+signal VCCINT13
+signal VCCINT14
+signal VCCINT15
+signal VCCINT16
+signal VCCINT17
+signal VCCINT18
+signal VCCINT19
+signal VCCINT20
+signal VCCO01
+signal VCCO02
+signal VCCO03
+signal VCCO04
+signal VCCO05
+signal VCCO06
+signal VCCO07
+signal VCCO08
+signal VCCO11
+signal VCCO12
+signal VCCO13
+signal VCCO14
+signal VCCO15
+signal VCCO16
+signal VCCO17
+signal VCCO18
+signal VCCO21
+signal VCCO22
+signal VCCO23
+signal VCCO24
+signal VCCO25
+signal VCCO26
+signal VCCO27
+signal VCCO28
+signal VCCO31
+signal VCCO32
+signal VCCO33
+signal VCCO34
+signal VCCO35
+signal VCCO36
+signal VCCO37
+signal VCCO38
+signal VCCO41
+signal VCCO42
+signal VCCO43
+signal VCCO44
+signal VCCO45
+signal VCCO46
+signal VCCO47
+signal VCCO48
+signal VCCO51
+signal VCCO52
+signal VCCO53
+signal VCCO54
+signal VCCO55
+signal VCCO56
+signal VCCO57
+signal VCCO58
+signal VCCO61
+signal VCCO62
+signal VCCO63
+signal VCCO64
+signal VCCO65
+signal VCCO66
+signal VCCO67
+signal VCCO68
+signal VCCO71
+signal VCCO72
+signal VCCO73
+signal VCCO74
+signal VCCO75
+signal VCCO76
+signal VCCO77
+signal VCCO78
+signal IO_A3
+signal IO_A4
+signal IO_A5
+signal IO_A6
+signal IO_A7
+signal IO_A8
+signal IO_A10
+signal IO_A11
+signal IO_A12
+signal IO_A13
+signal IO_A14
+signal IO_A15
+signal IO_A16
+signal IO_A17
+signal IO_A19
+signal IO_A20
+signal IO_A21
+signal IO_A22
+signal IO_A23
+signal IO_B3
+signal IO_B4
+signal IO_B5
+signal IO_B6
+signal IO_B7
+signal IO_B8
+signal IO_B9
+signal IO_B10
+signal IO_B11
+signal IO_B12
+signal IO_B13
+signal IO_B14
+signal IO_B15
+signal IO_B16
+signal IO_B17
+signal IO_B18
+signal IO_B19
+signal IO_B20
+signal IO_B21
+signal IO_B22
+signal IO_B23
+signal IO_C4
+signal IO_C5
+signal IO_C6
+signal IO_C8
+signal IO_C9
+signal IO_C10
+signal IO_C12
+signal IO_C13
+signal IO_C14
+signal IO_C15
+signal IO_C17
+signal IO_C18
+signal IO_C19
+signal IO_C21
+signal IO_C22
+signal IO_C23
+signal IO_C25
+signal IO_C26
+signal IO_D1
+signal IO_D2
+signal IO_D5
+signal IO_D6
+signal IO_D7
+signal IO_D8
+signal IO_D9
+signal IO_D10
+signal IO_D11
+signal IO_D13
+signal IO_D14
+signal IO_D16
+signal IO_D17
+signal IO_D18
+signal IO_D19
+signal IO_D20
+signal IO_D21
+signal IO_D22
+signal IO_D25
+signal IO_D26
+signal IO_E1
+signal IO_E2
+signal IO_E3
+signal IO_E4
+signal IO_E5
+signal IO_E6
+signal IO_E7
+signal IO_E8
+signal IO_E9
+signal IO_E10
+signal IO_E11
+signal IO_E12
+signal IO_E13
+signal IO_E14
+signal IO_E15
+signal IO_E16
+signal IO_E17
+signal IO_E18
+signal IO_E19
+signal IO_E20
+signal IO_E21
+signal IO_E22
+signal IO_E23
+signal IO_E24
+signal IO_E25
+signal IO_E26
+signal IO_F1
+signal IO_F2
+signal IO_F3
+signal IO_F4
+signal IO_F5
+signal IO_F6
+signal IO_F7
+signal IO_F8
+signal IO_F9
+signal IO_F10
+signal IO_F11
+signal IO_F12
+signal IO_F13
+signal IO_F14
+signal IO_F15
+signal IO_F16
+signal IO_F17
+signal IO_F18
+signal IO_F19
+signal IO_F20
+signal IO_F21
+signal IO_F23
+signal IO_F24
+signal IO_F25
+signal IO_F26
+signal IO_G1
+signal IO_G2
+signal IO_G4
+signal IO_G5
+signal IO_G6
+signal IO_G7
+signal IO_G8
+signal IO_G9
+signal IO_G10
+signal IO_G11
+signal IO_G12
+signal IO_G13
+signal IO_G14
+signal IO_G15
+signal IO_G16
+signal IO_G17
+signal IO_G18
+signal IO_G19
+signal IO_G20
+signal IO_G21
+signal IO_G22
+signal IO_G23
+signal IO_G25
+signal IO_G26
+signal IO_H1
+signal IO_H2
+signal IO_H3
+signal IO_H4
+signal IO_H5
+signal IO_H6
+signal IO_H7
+signal IO_H11
+signal IO_H12
+signal IO_H13
+signal IO_H14
+signal IO_H15
+signal IO_H16
+signal IO_H20
+signal IO_H21
+signal IO_H22
+signal IO_H23
+signal IO_H24
+signal IO_H25
+signal IO_H26
+signal IO_J2
+signal IO_J3
+signal IO_J4
+signal IO_J5
+signal IO_J6
+signal IO_J7
+signal IO_J20
+signal IO_J21
+signal IO_J22
+signal IO_J23
+signal IO_J24
+signal IO_J25
+signal IO_K1
+signal IO_K2
+signal IO_K3
+signal IO_K4
+signal IO_K5
+signal IO_K6
+signal IO_K7
+signal IO_K20
+signal IO_K21
+signal IO_K22
+signal IO_K23
+signal IO_K24
+signal IO_K25
+signal IO_K26
+signal IO_L1
+signal IO_L2
+signal IO_L4
+signal IO_L5
+signal IO_L6
+signal IO_L7
+signal IO_L8
+signal IO_L19
+signal IO_L20
+signal IO_L21
+signal IO_L22
+signal IO_L23
+signal IO_L25
+signal IO_L26
+signal IO_M1
+signal IO_M2
+signal IO_M3
+signal IO_M5
+signal IO_M6
+signal IO_M7
+signal IO_M8
+signal IO_M19
+signal IO_M20
+signal IO_M21
+signal IO_M22
+signal IO_M24
+signal IO_M25
+signal IO_M26
+signal IO_N1
+signal IO_N2
+signal IO_N3
+signal IO_N4
+signal IO_N5
+signal IO_N6
+signal IO_N7
+signal IO_N8
+signal IO_N19
+signal IO_N20
+signal IO_N21
+signal IO_N22
+signal IO_N23
+signal IO_N24
+signal IO_N25
+signal IO_N26
+signal IO_P1
+signal IO_P2
+signal IO_P3
+signal IO_P4
+signal IO_P5
+signal IO_P6
+signal IO_P7
+signal IO_P8
+signal IO_P19
+signal IO_P20
+signal IO_P21
+signal IO_P22
+signal IO_P23
+signal IO_P24
+signal IO_P25
+signal IO_P26
+signal IO_R1
+signal IO_R2
+signal IO_R3
+signal IO_R5
+signal IO_R6
+signal IO_R7
+signal IO_R8
+signal IO_R19
+signal IO_R20
+signal IO_R21
+signal IO_R22
+signal IO_R24
+signal IO_R25
+signal IO_R26
+signal IO_T1
+signal IO_T2
+signal IO_T4
+signal IO_T5
+signal IO_T6
+signal IO_T7
+signal IO_T8
+signal IO_T19
+signal IO_T20
+signal IO_T21
+signal IO_T22
+signal IO_T23
+signal IO_T25
+signal IO_T26
+signal IO_U1
+signal IO_U2
+signal IO_U3
+signal IO_U4
+signal IO_U5
+signal IO_U6
+signal IO_U7
+signal IO_U20
+signal IO_U21
+signal IO_U22
+signal IO_U23
+signal IO_U24
+signal IO_U25
+signal IO_U26
+signal IO_V2
+signal IO_V3
+signal IO_V4
+signal IO_V5
+signal IO_V6
+signal IO_V7
+signal IO_V20
+signal IO_V21
+signal IO_V22
+signal IO_V23
+signal IO_V24
+signal IO_V25
+signal IO_W1
+signal IO_W2
+signal IO_W3
+signal IO_W4
+signal IO_W5
+signal IO_W6
+signal IO_W7
+signal IO_W11
+signal IO_W12
+signal IO_W13
+signal IO_W14
+signal IO_W15
+signal IO_W16
+signal IO_W20
+signal IO_W21
+signal IO_W22
+signal IO_W23
+signal IO_W24
+signal IO_W25
+signal IO_W26
+signal IO_Y1
+signal IO_Y2
+signal IO_Y4
+signal IO_Y5
+signal IO_Y6
+signal IO_Y7
+signal IO_Y8
+signal IO_Y9
+signal IO_Y10
+signal IO_Y11
+signal IO_Y12
+signal IO_Y13
+signal IO_Y14
+signal IO_Y15
+signal IO_Y16
+signal IO_Y17
+signal IO_Y18
+signal IO_Y19
+signal IO_Y20
+signal IO_Y21
+signal IO_Y22
+signal IO_Y23
+signal IO_Y25
+signal IO_Y26
+signal IO_AA1
+signal IO_AA2
+signal IO_AA3
+signal IO_AA4
+signal IO_AA6
+signal IO_AA7
+signal IO_AA8
+signal IO_AA9
+signal IO_AA10
+signal IO_AA11
+signal IO_AA12
+signal IO_AA13
+signal IO_AA14
+signal IO_AA15
+signal IO_AA16
+signal IO_AA17
+signal IO_AA18
+signal IO_AA19
+signal IO_AA20
+signal IO_AA21
+signal IO_AA22
+signal IO_AA23
+signal IO_AA24
+signal IO_AA25
+signal IO_AA26
+signal IO_AB1
+signal IO_AB2
+signal IO_AB3
+signal IO_AB4
+signal IO_AB5
+signal IO_AB6
+signal IO_AB7
+signal IO_AB8
+signal IO_AB9
+signal IO_AB10
+signal IO_AB11
+signal IO_AB12
+signal IO_AB13
+signal IO_AB14
+signal IO_AB15
+signal IO_AB16
+signal IO_AB17
+signal IO_AB18
+signal IO_AB19
+signal IO_AB20
+signal IO_AB21
+signal IO_AB22
+signal IO_AB23
+signal IO_AB24
+signal IO_AB25
+signal IO_AB26
+signal IO_AC1
+signal IO_AC2
+signal IO_AC5
+signal IO_AC6
+signal IO_AC7
+signal IO_AC8
+signal IO_AC9
+signal IO_AC10
+signal IO_AC11
+signal IO_AC13
+signal IO_AC14
+signal IO_AC16
+signal IO_AC17
+signal IO_AC18
+signal IO_AC19
+signal IO_AC20
+signal IO_AC21
+signal IO_AC22
+signal IO_AC25
+signal IO_AC26
+signal IO_AD1
+signal IO_AD2
+signal IO_AD4
+signal IO_AD5
+signal IO_AD6
+signal IO_AD8
+signal IO_AD9
+signal IO_AD10
+signal IO_AD12
+signal IO_AD13
+signal IO_AD14
+signal IO_AD15
+signal IO_AD17
+signal IO_AD18
+signal IO_AD19
+signal IO_AD21
+signal IO_AD22
+signal IO_AD23
+signal IO_AD25
+signal IO_AE4
+signal IO_AE5
+signal IO_AE6
+signal IO_AE7
+signal IO_AE8
+signal IO_AE9
+signal IO_AE10
+signal IO_AE11
+signal IO_AE12
+signal IO_AE13
+signal IO_AE14
+signal IO_AE15
+signal IO_AE16
+signal IO_AE17
+signal IO_AE18
+signal IO_AE19
+signal IO_AE20
+signal IO_AE21
+signal IO_AE22
+signal IO_AE23
+signal IO_AE24
+signal IO_AF4
+signal IO_AF5
+signal IO_AF6
+signal IO_AF7
+signal IO_AF8
+signal IO_AF10
+signal IO_AF11
+signal IO_AF12
+signal IO_AF13
+signal IO_AF14
+signal IO_AF15
+signal IO_AF16
+signal IO_AF17
+signal IO_AF19
+signal IO_AF20
+signal IO_AF21
+signal IO_AF22
+signal IO_AF23
+
+register BSR 1559
+register BR 1
+register DIR 32
+
+instruction length 6
+
+instruction EXTEST 000000 BSR
+instruction SAMPLE/PRELOAD 000001 BSR
+instruction IDCODE 001001 DIR
+instruction BYPASS 111111 BR
+
+bit 1558 I 1 IO_C25
+bit 1557 O 1 IO_C25 1556 1 Z
+bit 1556 C 1 *
+bit 1555 I 1 IO_C26
+bit 1554 O 1 IO_C26 1553 1 Z
+bit 1553 C 1 *
+bit 1552 I 1 IO_E23
+bit 1551 O 1 IO_E23 1550 1 Z
+bit 1550 C 1 *
+bit 1549 I 1 IO_E24
+bit 1548 O 1 IO_E24 1547 1 Z
+bit 1547 C 1 *
+bit 1546 I 1 IO_D25
+bit 1545 O 1 IO_D25 1544 1 Z
+bit 1544 C 1 *
+bit 1543 I 1 IO_D26
+bit 1542 O 1 IO_D26 1541 1 Z
+bit 1541 C 1 *
+bit 1540 I 1 IO_E25
+bit 1539 O 1 IO_E25 1538 1 Z
+bit 1538 C 1 *
+bit 1537 I 1 IO_E26
+bit 1536 O 1 IO_E26 1535 1 Z
+bit 1535 C 1 *
+bit 1534 I 1 IO_G20
+bit 1533 O 1 IO_G20 1532 1 Z
+bit 1532 C 1 *
+bit 1531 I 1 IO_G21
+bit 1530 O 1 IO_G21 1529 1 Z
+bit 1529 C 1 *
+bit 1528 I 1 IO_F23
+bit 1527 O 1 IO_F23 1526 1 Z
+bit 1526 C 1 *
+bit 1525 I 1 IO_F24
+bit 1524 O 1 IO_F24 1523 1 Z
+bit 1523 C 1 *
+bit 1522 I 1 IO_G22
+bit 1521 O 1 IO_G22 1520 1 Z
+bit 1520 C 1 *
+bit 1519 I 1 IO_G23
+bit 1518 O 1 IO_G23 1517 1 Z
+bit 1517 C 1 *
+bit 1516 I 1 IO_F25
+bit 1515 O 1 IO_F25 1514 1 Z
+bit 1514 C 1 *
+bit 1513 I 1 IO_F26
+bit 1512 O 1 IO_F26 1511 1 Z
+bit 1511 C 1 *
+bit 1510 I 1 IO_G25
+bit 1509 O 1 IO_G25 1508 1 Z
+bit 1508 C 1 *
+bit 1507 I 1 IO_G26
+bit 1506 O 1 IO_G26 1505 1 Z
+bit 1505 C 1 *
+bit 1504 I 1 IO_H20
+bit 1503 O 1 IO_H20 1502 1 Z
+bit 1502 C 1 *
+bit 1501 I 1 IO_H21
+bit 1500 O 1 IO_H21 1499 1 Z
+bit 1499 C 1 *
+bit 1498 I 1 IO_H22
+bit 1497 O 1 IO_H22 1496 1 Z
+bit 1496 C 1 *
+bit 1495 I 1 IO_J21
+bit 1494 O 1 IO_J21 1493 1 Z
+bit 1493 C 1 *
+bit 1492 I 1 IO_H23
+bit 1491 O 1 IO_H23 1490 1 Z
+bit 1490 C 1 *
+bit 1489 I 1 IO_H24
+bit 1488 O 1 IO_H24 1487 1 Z
+bit 1487 C 1 *
+bit 1486 I 1 IO_H25
+bit 1485 O 1 IO_H25 1484 1 Z
+bit 1484 C 1 *
+bit 1483 I 1 IO_H26
+bit 1482 O 1 IO_H26 1481 1 Z
+bit 1481 C 1 *
+bit 1480 I 1 IO_J20
+bit 1479 O 1 IO_J20 1478 1 Z
+bit 1478 C 1 *
+bit 1477 I 1 IO_K20
+bit 1476 O 1 IO_K20 1475 1 Z
+bit 1475 C 1 *
+bit 1474 I 1 IO_J22
+bit 1473 O 1 IO_J22 1472 1 Z
+bit 1472 C 1 *
+bit 1471 I 1 IO_J23
+bit 1470 O 1 IO_J23 1469 1 Z
+bit 1469 C 1 *
+bit 1468 I 1 IO_J24
+bit 1467 O 1 IO_J24 1466 1 Z
+bit 1466 C 1 *
+bit 1465 I 1 IO_J25
+bit 1464 O 1 IO_J25 1463 1 Z
+bit 1463 C 1 *
+bit 1462 I 1 IO_K21
+bit 1461 O 1 IO_K21 1460 1 Z
+bit 1460 C 1 *
+bit 1459 I 1 IO_K22
+bit 1458 O 1 IO_K22 1457 1 Z
+bit 1457 C 1 *
+bit 1456 I 1 IO_K23
+bit 1455 O 1 IO_K23 1454 1 Z
+bit 1454 C 1 *
+bit 1453 I 1 IO_K24
+bit 1452 O 1 IO_K24 1451 1 Z
+bit 1451 C 1 *
+bit 1450 I 1 IO_K25
+bit 1449 O 1 IO_K25 1448 1 Z
+bit 1448 C 1 *
+bit 1447 I 1 IO_K26
+bit 1446 O 1 IO_K26 1445 1 Z
+bit 1445 C 1 *
+bit 1444 I 1 IO_L19
+bit 1443 O 1 IO_L19 1442 1 Z
+bit 1442 C 1 *
+bit 1441 I 1 IO_L20
+bit 1440 O 1 IO_L20 1439 1 Z
+bit 1439 C 1 *
+bit 1438 I 1 IO_L21
+bit 1437 O 1 IO_L21 1436 1 Z
+bit 1436 C 1 *
+bit 1435 I 1 IO_L22
+bit 1434 O 1 IO_L22 1433 1 Z
+bit 1433 C 1 *
+bit 1432 I 1 IO_L25
+bit 1431 O 1 IO_L25 1430 1 Z
+bit 1430 C 1 *
+bit 1429 I 1 IO_L26
+bit 1428 O 1 IO_L26 1427 1 Z
+bit 1427 C 1 *
+bit 1426 O 1 *
+bit 1425 O 1 *
+bit 1424 O 1 *
+bit 1423 O 1 *
+bit 1422 O 1 *
+bit 1421 O 1 *
+bit 1420 I 1 IO_M19
+bit 1419 O 1 IO_M19 1418 1 Z
+bit 1418 C 1 *
+bit 1417 I 1 IO_M20
+bit 1416 O 1 IO_M20 1415 1 Z
+bit 1415 C 1 *
+bit 1414 I 1 IO_M21
+bit 1413 O 1 IO_M21 1412 1 Z
+bit 1412 C 1 *
+bit 1411 I 1 IO_M22
+bit 1410 O 1 IO_M22 1409 1 Z
+bit 1409 C 1 *
+bit 1408 I 1 IO_L23
+bit 1407 O 1 IO_L23 1406 1 Z
+bit 1406 C 1 *
+bit 1405 I 1 IO_M24
+bit 1404 O 1 IO_M24 1403 1 Z
+bit 1403 C 1 *
+bit 1402 I 1 IO_M25
+bit 1401 O 1 IO_M25 1400 1 Z
+bit 1400 C 1 *
+bit 1399 I 1 IO_M26
+bit 1398 O 1 IO_M26 1397 1 Z
+bit 1397 C 1 *
+bit 1396 I 1 IO_N19
+bit 1395 O 1 IO_N19 1394 1 Z
+bit 1394 C 1 *
+bit 1393 I 1 IO_N20
+bit 1392 O 1 IO_N20 1391 1 Z
+bit 1391 C 1 *
+bit 1390 O 1 *
+bit 1389 O 1 *
+bit 1388 O 1 *
+bit 1387 O 1 *
+bit 1386 O 1 *
+bit 1385 O 1 *
+bit 1384 I 1 IO_N21
+bit 1383 O 1 IO_N21 1382 1 Z
+bit 1382 C 1 *
+bit 1381 I 1 IO_N22
+bit 1380 O 1 IO_N22 1379 1 Z
+bit 1379 C 1 *
+bit 1378 I 1 IO_N23
+bit 1377 O 1 IO_N23 1376 1 Z
+bit 1376 C 1 *
+bit 1375 I 1 IO_N24
+bit 1374 O 1 IO_N24 1373 1 Z
+bit 1373 C 1 *
+bit 1372 I 1 IO_N25
+bit 1371 O 1 IO_N25 1370 1 Z
+bit 1370 C 1 *
+bit 1369 I 1 IO_N26
+bit 1368 O 1 IO_N26 1367 1 Z
+bit 1367 C 1 *
+bit 1366 I 1 IO_P26
+bit 1365 O 1 IO_P26 1364 1 Z
+bit 1364 C 1 *
+bit 1363 I 1 IO_P25
+bit 1362 O 1 IO_P25 1361 1 Z
+bit 1361 C 1 *
+bit 1360 I 1 IO_P24
+bit 1359 O 1 IO_P24 1358 1 Z
+bit 1358 C 1 *
+bit 1357 I 1 IO_P23
+bit 1356 O 1 IO_P23 1355 1 Z
+bit 1355 C 1 *
+bit 1354 I 1 IO_P22
+bit 1353 O 1 IO_P22 1352 1 Z
+bit 1352 C 1 *
+bit 1351 I 1 IO_P21
+bit 1350 O 1 IO_P21 1349 1 Z
+bit 1349 C 1 *
+bit 1348 O 1 *
+bit 1347 O 1 *
+bit 1346 O 1 *
+bit 1345 O 1 *
+bit 1344 O 1 *
+bit 1343 O 1 *
+bit 1342 I 1 IO_P20
+bit 1341 O 1 IO_P20 1340 1 Z
+bit 1340 C 1 *
+bit 1339 I 1 IO_P19
+bit 1338 O 1 IO_P19 1337 1 Z
+bit 1337 C 1 *
+bit 1336 I 1 IO_R26
+bit 1335 O 1 IO_R26 1334 1 Z
+bit 1334 C 1 *
+bit 1333 I 1 IO_R25
+bit 1332 O 1 IO_R25 1331 1 Z
+bit 1331 C 1 *
+bit 1330 I 1 IO_R24
+bit 1329 O 1 IO_R24 1328 1 Z
+bit 1328 C 1 *
+bit 1327 I 1 IO_T23
+bit 1326 O 1 IO_T23 1325 1 Z
+bit 1325 C 1 *
+bit 1324 I 1 IO_R22
+bit 1323 O 1 IO_R22 1322 1 Z
+bit 1322 C 1 *
+bit 1321 I 1 IO_R21
+bit 1320 O 1 IO_R21 1319 1 Z
+bit 1319 C 1 *
+bit 1318 I 1 IO_R20
+bit 1317 O 1 IO_R20 1316 1 Z
+bit 1316 C 1 *
+bit 1315 I 1 IO_R19
+bit 1314 O 1 IO_R19 1313 1 Z
+bit 1313 C 1 *
+bit 1312 O 1 *
+bit 1311 O 1 *
+bit 1310 O 1 *
+bit 1309 O 1 *
+bit 1308 O 1 *
+bit 1307 O 1 *
+bit 1306 I 1 IO_T26
+bit 1305 O 1 IO_T26 1304 1 Z
+bit 1304 C 1 *
+bit 1303 I 1 IO_T25
+bit 1302 O 1 IO_T25 1301 1 Z
+bit 1301 C 1 *
+bit 1300 I 1 IO_T22
+bit 1299 O 1 IO_T22 1298 1 Z
+bit 1298 C 1 *
+bit 1297 I 1 IO_T21
+bit 1296 O 1 IO_T21 1295 1 Z
+bit 1295 C 1 *
+bit 1294 I 1 IO_T20
+bit 1293 O 1 IO_T20 1292 1 Z
+bit 1292 C 1 *
+bit 1291 I 1 IO_T19
+bit 1290 O 1 IO_T19 1289 1 Z
+bit 1289 C 1 *
+bit 1288 I 1 IO_U26
+bit 1287 O 1 IO_U26 1286 1 Z
+bit 1286 C 1 *
+bit 1285 I 1 IO_U25
+bit 1284 O 1 IO_U25 1283 1 Z
+bit 1283 C 1 *
+bit 1282 I 1 IO_U24
+bit 1281 O 1 IO_U24 1280 1 Z
+bit 1280 C 1 *
+bit 1279 I 1 IO_U23
+bit 1278 O 1 IO_U23 1277 1 Z
+bit 1277 C 1 *
+bit 1276 I 1 IO_U22
+bit 1275 O 1 IO_U22 1274 1 Z
+bit 1274 C 1 *
+bit 1273 I 1 IO_U21
+bit 1272 O 1 IO_U21 1271 1 Z
+bit 1271 C 1 *
+bit 1270 I 1 IO_V25
+bit 1269 O 1 IO_V25 1268 1 Z
+bit 1268 C 1 *
+bit 1267 I 1 IO_V24
+bit 1266 O 1 IO_V24 1265 1 Z
+bit 1265 C 1 *
+bit 1264 I 1 IO_V23
+bit 1263 O 1 IO_V23 1262 1 Z
+bit 1262 C 1 *
+bit 1261 I 1 IO_V22
+bit 1260 O 1 IO_V22 1259 1 Z
+bit 1259 C 1 *
+bit 1258 I 1 IO_U20
+bit 1257 O 1 IO_U20 1256 1 Z
+bit 1256 C 1 *
+bit 1255 I 1 IO_V20
+bit 1254 O 1 IO_V20 1253 1 Z
+bit 1253 C 1 *
+bit 1252 I 1 IO_W26
+bit 1251 O 1 IO_W26 1250 1 Z
+bit 1250 C 1 *
+bit 1249 I 1 IO_W25
+bit 1248 O 1 IO_W25 1247 1 Z
+bit 1247 C 1 *
+bit 1246 I 1 IO_W24
+bit 1245 O 1 IO_W24 1244 1 Z
+bit 1244 C 1 *
+bit 1243 I 1 IO_W23
+bit 1242 O 1 IO_W23 1241 1 Z
+bit 1241 C 1 *
+bit 1240 I 1 IO_V21
+bit 1239 O 1 IO_V21 1238 1 Z
+bit 1238 C 1 *
+bit 1237 I 1 IO_W22
+bit 1236 O 1 IO_W22 1235 1 Z
+bit 1235 C 1 *
+bit 1234 I 1 IO_Y26
+bit 1233 O 1 IO_Y26 1232 1 Z
+bit 1232 C 1 *
+bit 1231 I 1 IO_Y25
+bit 1230 O 1 IO_Y25 1229 1 Z
+bit 1229 C 1 *
+bit 1228 I 1 IO_W21
+bit 1227 O 1 IO_W21 1226 1 Z
+bit 1226 C 1 *
+bit 1225 I 1 IO_W20
+bit 1224 O 1 IO_W20 1223 1 Z
+bit 1223 C 1 *
+bit 1222 I 1 IO_AA26
+bit 1221 O 1 IO_AA26 1220 1 Z
+bit 1220 C 1 *
+bit 1219 I 1 IO_AA25
+bit 1218 O 1 IO_AA25 1217 1 Z
+bit 1217 C 1 *
+bit 1216 I 1 IO_Y23
+bit 1215 O 1 IO_Y23 1214 1 Z
+bit 1214 C 1 *
+bit 1213 I 1 IO_Y22
+bit 1212 O 1 IO_Y22 1211 1 Z
+bit 1211 C 1 *
+bit 1210 I 1 IO_AA24
+bit 1209 O 1 IO_AA24 1208 1 Z
+bit 1208 C 1 *
+bit 1207 I 1 IO_AA23
+bit 1206 O 1 IO_AA23 1205 1 Z
+bit 1205 C 1 *
+bit 1204 I 1 IO_AB26
+bit 1203 O 1 IO_AB26 1202 1 Z
+bit 1202 C 1 *
+bit 1201 I 1 IO_AB25
+bit 1200 O 1 IO_AB25 1199 1 Z
+bit 1199 C 1 *
+bit 1198 I 1 IO_Y21
+bit 1197 O 1 IO_Y21 1196 1 Z
+bit 1196 C 1 *
+bit 1195 I 1 IO_Y20
+bit 1194 O 1 IO_Y20 1193 1 Z
+bit 1193 C 1 *
+bit 1192 I 1 IO_AC26
+bit 1191 O 1 IO_AC26 1190 1 Z
+bit 1190 C 1 *
+bit 1189 I 1 IO_AC25
+bit 1188 O 1 IO_AC25 1187 1 Z
+bit 1187 C 1 *
+bit 1186 I 1 IO_AB24
+bit 1185 O 1 IO_AB24 1184 1 Z
+bit 1184 C 1 *
+bit 1183 I 1 IO_AB23
+bit 1182 O 1 IO_AB23 1181 1 Z
+bit 1181 C 1 *
+bit 1180 I 1 IO_AA22
+bit 1179 O 1 IO_AA22 1178 1 Z
+bit 1178 C 1 *
+bit 1177 I 1 IO_AA21
+bit 1176 O 1 IO_AA21 1175 1 Z
+bit 1175 C 1 *
+bit 1174 I 1 CCLK_AD26
+bit 1173 O 1 CCLK_AD26 1172 1 Z
+bit 1172 C 1 *
+bit 1171 I 1 DONE_AC24
+bit 1170 O 1 DONE_AC24 1169 1 Z
+bit 1169 C 1 *
+bit 1168 I 1 IO_AD25
+bit 1167 O 1 IO_AD25 1166 1 Z
+bit 1166 C 1 *
+bit 1165 I 1 IO_AB22
+bit 1164 O 1 IO_AB22 1163 1 Z
+bit 1163 C 1 *
+bit 1162 I 1 IO_AC22
+bit 1161 O 1 IO_AC22 1160 1 Z
+bit 1160 C 1 *
+bit 1159 I 1 IO_AE24
+bit 1158 O 1 IO_AE24 1157 1 Z
+bit 1157 C 1 *
+bit 1156 I 1 IO_AF24
+bit 1155 O 1 IO_AF24 1154 1 Z
+bit 1154 C 1 *
+bit 1153 I 1 IO_AD23
+bit 1152 O 1 IO_AD23 1151 1 Z
+bit 1151 C 1 *
+bit 1150 I 1 IO_AE23
+bit 1149 O 1 IO_AE23 1148 1 Z
+bit 1148 C 1 *
+bit 1147 I 1 IO_AF23
+bit 1146 O 1 IO_AF23 1145 1 Z
+bit 1145 C 1 *
+bit 1144 I 1 IO_AD22
+bit 1143 O 1 IO_AD22 1142 1 Z
+bit 1142 C 1 *
+bit 1141 I 1 IO_AE22
+bit 1140 O 1 IO_AE22 1139 1 Z
+bit 1139 C 1 *
+bit 1138 I 1 IO_AF22
+bit 1137 O 1 IO_AF22 1136 1 Z
+bit 1136 C 1 *
+bit 1135 I 1 IO_AB21
+bit 1134 O 1 IO_AB21 1133 1 Z
+bit 1133 C 1 *
+bit 1132 I 1 IO_AC21
+bit 1131 O 1 IO_AC21 1130 1 Z
+bit 1130 C 1 *
+bit 1129 I 1 IO_AD21
+bit 1128 O 1 IO_AD21 1127 1 Z
+bit 1127 C 1 *
+bit 1126 I 1 IO_AE21
+bit 1125 O 1 IO_AE21 1124 1 Z
+bit 1124 C 1 *
+bit 1123 I 1 IO_AF21
+bit 1122 O 1 IO_AF21 1121 1 Z
+bit 1121 C 1 *
+bit 1120 I 1 IO_AB20
+bit 1119 O 1 IO_AB20 1118 1 Z
+bit 1118 C 1 *
+bit 1117 I 1 IO_AC20
+bit 1116 O 1 IO_AC20 1115 1 Z
+bit 1115 C 1 *
+bit 1114 I 1 IO_AE20
+bit 1113 O 1 IO_AE20 1112 1 Z
+bit 1112 C 1 *
+bit 1111 I 1 IO_AF20
+bit 1110 O 1 IO_AF20 1109 1 Z
+bit 1109 C 1 *
+bit 1108 I 1 IO_AA20
+bit 1107 O 1 IO_AA20 1106 1 Z
+bit 1106 C 1 *
+bit 1105 I 1 IO_Y19
+bit 1104 O 1 IO_Y19 1103 1 Z
+bit 1103 C 1 *
+bit 1102 I 1 IO_AA19
+bit 1101 O 1 IO_AA19 1100 1 Z
+bit 1100 C 1 *
+bit 1099 I 1 IO_AB19
+bit 1098 O 1 IO_AB19 1097 1 Z
+bit 1097 C 1 *
+bit 1096 I 1 IO_AC19
+bit 1095 O 1 IO_AC19 1094 1 Z
+bit 1094 C 1 *
+bit 1093 I 1 IO_AD19
+bit 1092 O 1 IO_AD19 1091 1 Z
+bit 1091 C 1 *
+bit 1090 I 1 IO_AE19
+bit 1089 O 1 IO_AE19 1088 1 Z
+bit 1088 C 1 *
+bit 1087 I 1 IO_AF19
+bit 1086 O 1 IO_AF19 1085 1 Z
+bit 1085 C 1 *
+bit 1084 I 1 IO_Y18
+bit 1083 O 1 IO_Y18 1082 1 Z
+bit 1082 C 1 *
+bit 1081 I 1 IO_AA18
+bit 1080 O 1 IO_AA18 1079 1 Z
+bit 1079 C 1 *
+bit 1078 O 1 *
+bit 1077 O 1 *
+bit 1076 O 1 *
+bit 1075 I 1 IO_AB18
+bit 1074 O 1 IO_AB18 1073 1 Z
+bit 1073 C 1 *
+bit 1072 I 1 IO_AC18
+bit 1071 O 1 IO_AC18 1070 1 Z
+bit 1070 C 1 *
+bit 1069 I 1 IO_AD18
+bit 1068 O 1 IO_AD18 1067 1 Z
+bit 1067 C 1 *
+bit 1066 I 1 IO_AE18
+bit 1065 O 1 IO_AE18 1064 1 Z
+bit 1064 C 1 *
+bit 1063 I 1 IO_Y17
+bit 1062 O 1 IO_Y17 1061 1 Z
+bit 1061 C 1 *
+bit 1060 I 1 IO_AC17
+bit 1059 O 1 IO_AC17 1058 1 Z
+bit 1058 C 1 *
+bit 1057 I 1 IO_AA17
+bit 1056 O 1 IO_AA17 1055 1 Z
+bit 1055 C 1 *
+bit 1054 I 1 IO_AD17
+bit 1053 O 1 IO_AD17 1052 1 Z
+bit 1052 C 1 *
+bit 1051 I 1 IO_AB17
+bit 1050 O 1 IO_AB17 1049 1 Z
+bit 1049 C 1 *
+bit 1048 I 1 IO_W16
+bit 1047 O 1 IO_W16 1046 1 Z
+bit 1046 C 1 *
+bit 1045 I 1 IO_AE17
+bit 1044 O 1 IO_AE17 1043 1 Z
+bit 1043 C 1 *
+bit 1042 I 1 IO_AF17
+bit 1041 O 1 IO_AF17 1040 1 Z
+bit 1040 C 1 *
+bit 1039 I 1 IO_Y16
+bit 1038 O 1 IO_Y16 1037 1 Z
+bit 1037 C 1 *
+bit 1036 I 1 IO_AA16
+bit 1035 O 1 IO_AA16 1034 1 Z
+bit 1034 C 1 *
+bit 1033 O 1 *
+bit 1032 O 1 *
+bit 1031 O 1 *
+bit 1030 I 1 IO_AB16
+bit 1029 O 1 IO_AB16 1028 1 Z
+bit 1028 C 1 *
+bit 1027 I 1 IO_AC16
+bit 1026 O 1 IO_AC16 1025 1 Z
+bit 1025 C 1 *
+bit 1024 I 1 IO_AE16
+bit 1023 O 1 IO_AE16 1022 1 Z
+bit 1022 C 1 *
+bit 1021 I 1 IO_AF16
+bit 1020 O 1 IO_AF16 1019 1 Z
+bit 1019 C 1 *
+bit 1018 I 1 IO_W15
+bit 1017 O 1 IO_W15 1016 1 Z
+bit 1016 C 1 *
+bit 1015 I 1 IO_Y15
+bit 1014 O 1 IO_Y15 1013 1 Z
+bit 1013 C 1 *
+bit 1012 I 1 IO_W14
+bit 1011 O 1 IO_W14 1010 1 Z
+bit 1010 C 1 *
+bit 1009 I 1 IO_AA15
+bit 1008 O 1 IO_AA15 1007 1 Z
+bit 1007 C 1 *
+bit 1006 I 1 IO_AB15
+bit 1005 O 1 IO_AB15 1004 1 Z
+bit 1004 C 1 *
+bit 1003 I 1 IO_AD15
+bit 1002 O 1 IO_AD15 1001 1 Z
+bit 1001 C 1 *
+bit 1000 I 1 IO_AE15
+bit 999 O 1 IO_AE15 998 1 Z
+bit 998 C 1 *
+bit 997 I 1 IO_AF15
+bit 996 O 1 IO_AF15 995 1 Z
+bit 995 C 1 *
+bit 994 I 1 IO_Y14
+bit 993 O 1 IO_Y14 992 1 Z
+bit 992 C 1 *
+bit 991 I 1 IO_AA14
+bit 990 O 1 IO_AA14 989 1 Z
+bit 989 C 1 *
+bit 988 I 1 IO_AB14
+bit 987 O 1 IO_AB14 986 1 Z
+bit 986 C 1 *
+bit 985 I 1 IO_AC14
+bit 984 O 1 IO_AC14 983 1 Z
+bit 983 C 1 *
+bit 982 I 1 IO_AD14
+bit 981 O 1 IO_AD14 980 1 Z
+bit 980 C 1 *
+bit 979 I 1 IO_AE14
+bit 978 O 1 IO_AE14 977 1 Z
+bit 977 C 1 *
+bit 976 I 1 IO_AF14
+bit 975 O 1 IO_AF14 974 1 Z
+bit 974 C 1 *
+bit 973 I 1 IO_AF13
+bit 972 O 1 IO_AF13 971 1 Z
+bit 971 C 1 *
+bit 970 I 1 IO_AE13
+bit 969 O 1 IO_AE13 968 1 Z
+bit 968 C 1 *
+bit 967 I 1 IO_AD13
+bit 966 O 1 IO_AD13 965 1 Z
+bit 965 C 1 *
+bit 964 I 1 IO_AC13
+bit 963 O 1 IO_AC13 962 1 Z
+bit 962 C 1 *
+bit 961 I 1 IO_AB13
+bit 960 O 1 IO_AB13 959 1 Z
+bit 959 C 1 *
+bit 958 I 1 IO_AA13
+bit 957 O 1 IO_AA13 956 1 Z
+bit 956 C 1 *
+bit 955 I 1 IO_Y13
+bit 954 O 1 IO_Y13 953 1 Z
+bit 953 C 1 *
+bit 952 I 1 IO_W13
+bit 951 O 1 IO_W13 950 1 Z
+bit 950 C 1 *
+bit 949 I 1 IO_AF12
+bit 948 O 1 IO_AF12 947 1 Z
+bit 947 C 1 *
+bit 946 I 1 IO_AE12
+bit 945 O 1 IO_AE12 944 1 Z
+bit 944 C 1 *
+bit 943 I 1 IO_AD12
+bit 942 O 1 IO_AD12 941 1 Z
+bit 941 C 1 *
+bit 940 I 1 IO_AB12
+bit 939 O 1 IO_AB12 938 1 Z
+bit 938 C 1 *
+bit 937 I 1 IO_AA12
+bit 936 O 1 IO_AA12 935 1 Z
+bit 935 C 1 *
+bit 934 I 1 IO_Y12
+bit 933 O 1 IO_Y12 932 1 Z
+bit 932 C 1 *
+bit 931 I 1 IO_W12
+bit 930 O 1 IO_W12 929 1 Z
+bit 929 C 1 *
+bit 928 I 1 IO_AC11
+bit 927 O 1 IO_AC11 926 1 Z
+bit 926 C 1 *
+bit 925 I 1 IO_AF11
+bit 924 O 1 IO_AF11 923 1 Z
+bit 923 C 1 *
+bit 922 I 1 IO_AE11
+bit 921 O 1 IO_AE11 920 1 Z
+bit 920 C 1 *
+bit 919 I 1 IO_AB11
+bit 918 O 1 IO_AB11 917 1 Z
+bit 917 C 1 *
+bit 916 I 1 IO_AA11
+bit 915 O 1 IO_AA11 914 1 Z
+bit 914 C 1 *
+bit 913 O 1 *
+bit 912 O 1 *
+bit 911 O 1 *
+bit 910 I 1 IO_Y11
+bit 909 O 1 IO_Y11 908 1 Z
+bit 908 C 1 *
+bit 907 I 1 IO_W11
+bit 906 O 1 IO_W11 905 1 Z
+bit 905 C 1 *
+bit 904 I 1 IO_AF10
+bit 903 O 1 IO_AF10 902 1 Z
+bit 902 C 1 *
+bit 901 I 1 IO_AE10
+bit 900 O 1 IO_AE10 899 1 Z
+bit 899 C 1 *
+bit 898 I 1 IO_AD10
+bit 897 O 1 IO_AD10 896 1 Z
+bit 896 C 1 *
+bit 895 I 1 IO_AC10
+bit 894 O 1 IO_AC10 893 1 Z
+bit 893 C 1 *
+bit 892 I 1 IO_AB10
+bit 891 O 1 IO_AB10 890 1 Z
+bit 890 C 1 *
+bit 889 I 1 IO_AA10
+bit 888 O 1 IO_AA10 887 1 Z
+bit 887 C 1 *
+bit 886 I 1 IO_Y10
+bit 885 O 1 IO_Y10 884 1 Z
+bit 884 C 1 *
+bit 883 O 1 *
+bit 882 O 1 *
+bit 881 O 1 *
+bit 880 I 1 IO_AE9
+bit 879 O 1 IO_AE9 878 1 Z
+bit 878 C 1 *
+bit 877 I 1 IO_AD9
+bit 876 O 1 IO_AD9 875 1 Z
+bit 875 C 1 *
+bit 874 I 1 IO_AC9
+bit 873 O 1 IO_AC9 872 1 Z
+bit 872 C 1 *
+bit 871 O 1 *
+bit 870 O 1 *
+bit 869 O 1 *
+bit 868 I 1 IO_AB9
+bit 867 O 1 IO_AB9 866 1 Z
+bit 866 C 1 *
+bit 865 I 1 IO_AA9
+bit 864 O 1 IO_AA9 863 1 Z
+bit 863 C 1 *
+bit 862 I 1 IO_Y9
+bit 861 O 1 IO_Y9 860 1 Z
+bit 860 C 1 *
+bit 859 I 1 IO_AF8
+bit 858 O 1 IO_AF8 857 1 Z
+bit 857 C 1 *
+bit 856 I 1 IO_AE8
+bit 855 O 1 IO_AE8 854 1 Z
+bit 854 C 1 *
+bit 853 O 1 *
+bit 852 O 1 *
+bit 851 O 1 *
+bit 850 I 1 IO_AD8
+bit 849 O 1 IO_AD8 848 1 Z
+bit 848 C 1 *
+bit 847 I 1 IO_AC8
+bit 846 O 1 IO_AC8 845 1 Z
+bit 845 C 1 *
+bit 844 I 1 IO_AB8
+bit 843 O 1 IO_AB8 842 1 Z
+bit 842 C 1 *
+bit 841 I 1 IO_AA8
+bit 840 O 1 IO_AA8 839 1 Z
+bit 839 C 1 *
+bit 838 I 1 IO_Y8
+bit 837 O 1 IO_Y8 836 1 Z
+bit 836 C 1 *
+bit 835 I 1 IO_AF7
+bit 834 O 1 IO_AF7 833 1 Z
+bit 833 C 1 *
+bit 832 I 1 IO_AE7
+bit 831 O 1 IO_AE7 830 1 Z
+bit 830 C 1 *
+bit 829 I 1 IO_AC7
+bit 828 O 1 IO_AC7 827 1 Z
+bit 827 C 1 *
+bit 826 I 1 IO_AB7
+bit 825 O 1 IO_AB7 824 1 Z
+bit 824 C 1 *
+bit 823 I 1 IO_AA7
+bit 822 O 1 IO_AA7 821 1 Z
+bit 821 C 1 *
+bit 820 I 1 IO_AF6
+bit 819 O 1 IO_AF6 818 1 Z
+bit 818 C 1 *
+bit 817 I 1 IO_AE6
+bit 816 O 1 IO_AE6 815 1 Z
+bit 815 C 1 *
+bit 814 I 1 IO_AD6
+bit 813 O 1 IO_AD6 812 1 Z
+bit 812 C 1 *
+bit 811 I 1 IO_AC6
+bit 810 O 1 IO_AC6 809 1 Z
+bit 809 C 1 *
+bit 808 I 1 IO_AF5
+bit 807 O 1 IO_AF5 806 1 Z
+bit 806 C 1 *
+bit 805 I 1 IO_AE5
+bit 804 O 1 IO_AE5 803 1 Z
+bit 803 C 1 *
+bit 802 I 1 IO_AD5
+bit 801 O 1 IO_AD5 800 1 Z
+bit 800 C 1 *
+bit 799 I 1 IO_AB6
+bit 798 O 1 IO_AB6 797 1 Z
+bit 797 C 1 *
+bit 796 I 1 IO_AA6
+bit 795 O 1 IO_AA6 794 1 Z
+bit 794 C 1 *
+bit 793 I 1 IO_AF4
+bit 792 O 1 IO_AF4 791 1 Z
+bit 791 C 1 *
+bit 790 I 1 IO_AE4
+bit 789 O 1 IO_AE4 788 1 Z
+bit 788 C 1 *
+bit 787 I 1 IO_AD4
+bit 786 O 1 IO_AD4 785 1 Z
+bit 785 C 1 *
+bit 784 I 1 IO_AC5
+bit 783 O 1 IO_AC5 782 1 Z
+bit 782 C 1 *
+bit 781 I 1 IO_AB5
+bit 780 O 1 IO_AB5 779 1 Z
+bit 779 C 1 *
+bit 778 I 1 M2_AF3
+bit 777 I 1 M0_AE3
+bit 776 I 1 M1_AC3
+bit 775 I 1 IO_AD2
+bit 774 O 1 IO_AD2 773 1 Z
+bit 773 C 1 *
+bit 772 I 1 IO_AD1
+bit 771 O 1 IO_AD1 770 1 Z
+bit 770 C 1 *
+bit 769 I 1 IO_AB4
+bit 768 O 1 IO_AB4 767 1 Z
+bit 767 C 1 *
+bit 766 I 1 IO_AB3
+bit 765 O 1 IO_AB3 764 1 Z
+bit 764 C 1 *
+bit 763 I 1 IO_AC2
+bit 762 O 1 IO_AC2 761 1 Z
+bit 761 C 1 *
+bit 760 I 1 IO_AC1
+bit 759 O 1 IO_AC1 758 1 Z
+bit 758 C 1 *
+bit 757 I 1 IO_AB2
+bit 756 O 1 IO_AB2 755 1 Z
+bit 755 C 1 *
+bit 754 I 1 IO_AB1
+bit 753 O 1 IO_AB1 752 1 Z
+bit 752 C 1 *
+bit 751 I 1 IO_Y7
+bit 750 O 1 IO_Y7 749 1 Z
+bit 749 C 1 *
+bit 748 I 1 IO_Y6
+bit 747 O 1 IO_Y6 746 1 Z
+bit 746 C 1 *
+bit 745 I 1 IO_AA4
+bit 744 O 1 IO_AA4 743 1 Z
+bit 743 C 1 *
+bit 742 I 1 IO_AA3
+bit 741 O 1 IO_AA3 740 1 Z
+bit 740 C 1 *
+bit 739 I 1 IO_Y5
+bit 738 O 1 IO_Y5 737 1 Z
+bit 737 C 1 *
+bit 736 I 1 IO_Y4
+bit 735 O 1 IO_Y4 734 1 Z
+bit 734 C 1 *
+bit 733 I 1 IO_AA2
+bit 732 O 1 IO_AA2 731 1 Z
+bit 731 C 1 *
+bit 730 I 1 IO_AA1
+bit 729 O 1 IO_AA1 728 1 Z
+bit 728 C 1 *
+bit 727 I 1 IO_Y2
+bit 726 O 1 IO_Y2 725 1 Z
+bit 725 C 1 *
+bit 724 I 1 IO_Y1
+bit 723 O 1 IO_Y1 722 1 Z
+bit 722 C 1 *
+bit 721 I 1 IO_W7
+bit 720 O 1 IO_W7 719 1 Z
+bit 719 C 1 *
+bit 718 I 1 IO_W6
+bit 717 O 1 IO_W6 716 1 Z
+bit 716 C 1 *
+bit 715 I 1 IO_V6
+bit 714 O 1 IO_V6 713 1 Z
+bit 713 C 1 *
+bit 712 I 1 IO_W5
+bit 711 O 1 IO_W5 710 1 Z
+bit 710 C 1 *
+bit 709 I 1 IO_W4
+bit 708 O 1 IO_W4 707 1 Z
+bit 707 C 1 *
+bit 706 I 1 IO_W3
+bit 705 O 1 IO_W3 704 1 Z
+bit 704 C 1 *
+bit 703 I 1 IO_W2
+bit 702 O 1 IO_W2 701 1 Z
+bit 701 C 1 *
+bit 700 I 1 IO_W1
+bit 699 O 1 IO_W1 698 1 Z
+bit 698 C 1 *
+bit 697 I 1 IO_V7
+bit 696 O 1 IO_V7 695 1 Z
+bit 695 C 1 *
+bit 694 I 1 IO_U7
+bit 693 O 1 IO_U7 692 1 Z
+bit 692 C 1 *
+bit 691 I 1 IO_V5
+bit 690 O 1 IO_V5 689 1 Z
+bit 689 C 1 *
+bit 688 I 1 IO_V4
+bit 687 O 1 IO_V4 686 1 Z
+bit 686 C 1 *
+bit 685 I 1 IO_V3
+bit 684 O 1 IO_V3 683 1 Z
+bit 683 C 1 *
+bit 682 I 1 IO_V2
+bit 681 O 1 IO_V2 680 1 Z
+bit 680 C 1 *
+bit 679 I 1 IO_U6
+bit 678 O 1 IO_U6 677 1 Z
+bit 677 C 1 *
+bit 676 I 1 IO_U5
+bit 675 O 1 IO_U5 674 1 Z
+bit 674 C 1 *
+bit 673 I 1 IO_U4
+bit 672 O 1 IO_U4 671 1 Z
+bit 671 C 1 *
+bit 670 I 1 IO_U3
+bit 669 O 1 IO_U3 668 1 Z
+bit 668 C 1 *
+bit 667 I 1 IO_U2
+bit 666 O 1 IO_U2 665 1 Z
+bit 665 C 1 *
+bit 664 I 1 IO_U1
+bit 663 O 1 IO_U1 662 1 Z
+bit 662 C 1 *
+bit 661 I 1 IO_T8
+bit 660 O 1 IO_T8 659 1 Z
+bit 659 C 1 *
+bit 658 I 1 IO_T7
+bit 657 O 1 IO_T7 656 1 Z
+bit 656 C 1 *
+bit 655 I 1 IO_T6
+bit 654 O 1 IO_T6 653 1 Z
+bit 653 C 1 *
+bit 652 I 1 IO_T5
+bit 651 O 1 IO_T5 650 1 Z
+bit 650 C 1 *
+bit 649 I 1 IO_T2
+bit 648 O 1 IO_T2 647 1 Z
+bit 647 C 1 *
+bit 646 I 1 IO_T1
+bit 645 O 1 IO_T1 644 1 Z
+bit 644 C 1 *
+bit 643 O 1 *
+bit 642 O 1 *
+bit 641 O 1 *
+bit 640 O 1 *
+bit 639 O 1 *
+bit 638 O 1 *
+bit 637 I 1 IO_R8
+bit 636 O 1 IO_R8 635 1 Z
+bit 635 C 1 *
+bit 634 I 1 IO_R7
+bit 633 O 1 IO_R7 632 1 Z
+bit 632 C 1 *
+bit 631 I 1 IO_R6
+bit 630 O 1 IO_R6 629 1 Z
+bit 629 C 1 *
+bit 628 I 1 IO_R5
+bit 627 O 1 IO_R5 626 1 Z
+bit 626 C 1 *
+bit 625 I 1 IO_T4
+bit 624 O 1 IO_T4 623 1 Z
+bit 623 C 1 *
+bit 622 I 1 IO_R3
+bit 621 O 1 IO_R3 620 1 Z
+bit 620 C 1 *
+bit 619 I 1 IO_R2
+bit 618 O 1 IO_R2 617 1 Z
+bit 617 C 1 *
+bit 616 I 1 IO_R1
+bit 615 O 1 IO_R1 614 1 Z
+bit 614 C 1 *
+bit 613 I 1 IO_P8
+bit 612 O 1 IO_P8 611 1 Z
+bit 611 C 1 *
+bit 610 I 1 IO_P7
+bit 609 O 1 IO_P7 608 1 Z
+bit 608 C 1 *
+bit 607 O 1 *
+bit 606 O 1 *
+bit 605 O 1 *
+bit 604 O 1 *
+bit 603 O 1 *
+bit 602 O 1 *
+bit 601 I 1 IO_P6
+bit 600 O 1 IO_P6 599 1 Z
+bit 599 C 1 *
+bit 598 I 1 IO_P5
+bit 597 O 1 IO_P5 596 1 Z
+bit 596 C 1 *
+bit 595 I 1 IO_P4
+bit 594 O 1 IO_P4 593 1 Z
+bit 593 C 1 *
+bit 592 I 1 IO_P3
+bit 591 O 1 IO_P3 590 1 Z
+bit 590 C 1 *
+bit 589 I 1 IO_P2
+bit 588 O 1 IO_P2 587 1 Z
+bit 587 C 1 *
+bit 586 I 1 IO_P1
+bit 585 O 1 IO_P1 584 1 Z
+bit 584 C 1 *
+bit 583 I 1 IO_N1
+bit 582 O 1 IO_N1 581 1 Z
+bit 581 C 1 *
+bit 580 I 1 IO_N2
+bit 579 O 1 IO_N2 578 1 Z
+bit 578 C 1 *
+bit 577 I 1 IO_N3
+bit 576 O 1 IO_N3 575 1 Z
+bit 575 C 1 *
+bit 574 I 1 IO_N4
+bit 573 O 1 IO_N4 572 1 Z
+bit 572 C 1 *
+bit 571 I 1 IO_N5
+bit 570 O 1 IO_N5 569 1 Z
+bit 569 C 1 *
+bit 568 I 1 IO_N6
+bit 567 O 1 IO_N6 566 1 Z
+bit 566 C 1 *
+bit 565 O 1 *
+bit 564 O 1 *
+bit 563 O 1 *
+bit 562 O 1 *
+bit 561 O 1 *
+bit 560 O 1 *
+bit 559 I 1 IO_N7
+bit 558 O 1 IO_N7 557 1 Z
+bit 557 C 1 *
+bit 556 I 1 IO_N8
+bit 555 O 1 IO_N8 554 1 Z
+bit 554 C 1 *
+bit 553 I 1 IO_M1
+bit 552 O 1 IO_M1 551 1 Z
+bit 551 C 1 *
+bit 550 I 1 IO_M2
+bit 549 O 1 IO_M2 548 1 Z
+bit 548 C 1 *
+bit 547 I 1 IO_M3
+bit 546 O 1 IO_M3 545 1 Z
+bit 545 C 1 *
+bit 544 I 1 IO_L4
+bit 543 O 1 IO_L4 542 1 Z
+bit 542 C 1 *
+bit 541 I 1 IO_M6
+bit 540 O 1 IO_M6 539 1 Z
+bit 539 C 1 *
+bit 538 I 1 IO_M5
+bit 537 O 1 IO_M5 536 1 Z
+bit 536 C 1 *
+bit 535 I 1 IO_M7
+bit 534 O 1 IO_M7 533 1 Z
+bit 533 C 1 *
+bit 532 I 1 IO_M8
+bit 531 O 1 IO_M8 530 1 Z
+bit 530 C 1 *
+bit 529 O 1 *
+bit 528 O 1 *
+bit 527 O 1 *
+bit 526 O 1 *
+bit 525 O 1 *
+bit 524 O 1 *
+bit 523 I 1 IO_L1
+bit 522 O 1 IO_L1 521 1 Z
+bit 521 C 1 *
+bit 520 I 1 IO_L2
+bit 519 O 1 IO_L2 518 1 Z
+bit 518 C 1 *
+bit 517 I 1 IO_L5
+bit 516 O 1 IO_L5 515 1 Z
+bit 515 C 1 *
+bit 514 I 1 IO_L6
+bit 513 O 1 IO_L6 512 1 Z
+bit 512 C 1 *
+bit 511 I 1 IO_L7
+bit 510 O 1 IO_L7 509 1 Z
+bit 509 C 1 *
+bit 508 I 1 IO_L8
+bit 507 O 1 IO_L8 506 1 Z
+bit 506 C 1 *
+bit 505 I 1 IO_K1
+bit 504 O 1 IO_K1 503 1 Z
+bit 503 C 1 *
+bit 502 I 1 IO_K2
+bit 501 O 1 IO_K2 500 1 Z
+bit 500 C 1 *
+bit 499 I 1 IO_K3
+bit 498 O 1 IO_K3 497 1 Z
+bit 497 C 1 *
+bit 496 I 1 IO_K4
+bit 495 O 1 IO_K4 494 1 Z
+bit 494 C 1 *
+bit 493 I 1 IO_K5
+bit 492 O 1 IO_K5 491 1 Z
+bit 491 C 1 *
+bit 490 I 1 IO_K6
+bit 489 O 1 IO_K6 488 1 Z
+bit 488 C 1 *
+bit 487 I 1 IO_J2
+bit 486 O 1 IO_J2 485 1 Z
+bit 485 C 1 *
+bit 484 I 1 IO_J3
+bit 483 O 1 IO_J3 482 1 Z
+bit 482 C 1 *
+bit 481 I 1 IO_J4
+bit 480 O 1 IO_J4 479 1 Z
+bit 479 C 1 *
+bit 478 I 1 IO_J5
+bit 477 O 1 IO_J5 476 1 Z
+bit 476 C 1 *
+bit 475 I 1 IO_K7
+bit 474 O 1 IO_K7 473 1 Z
+bit 473 C 1 *
+bit 472 I 1 IO_J7
+bit 471 O 1 IO_J7 470 1 Z
+bit 470 C 1 *
+bit 469 I 1 IO_H1
+bit 468 O 1 IO_H1 467 1 Z
+bit 467 C 1 *
+bit 466 I 1 IO_H2
+bit 465 O 1 IO_H2 464 1 Z
+bit 464 C 1 *
+bit 463 I 1 IO_H3
+bit 462 O 1 IO_H3 461 1 Z
+bit 461 C 1 *
+bit 460 I 1 IO_H4
+bit 459 O 1 IO_H4 458 1 Z
+bit 458 C 1 *
+bit 457 I 1 IO_J6
+bit 456 O 1 IO_J6 455 1 Z
+bit 455 C 1 *
+bit 454 I 1 IO_H5
+bit 453 O 1 IO_H5 452 1 Z
+bit 452 C 1 *
+bit 451 I 1 IO_G1
+bit 450 O 1 IO_G1 449 1 Z
+bit 449 C 1 *
+bit 448 I 1 IO_G2
+bit 447 O 1 IO_G2 446 1 Z
+bit 446 C 1 *
+bit 445 I 1 IO_H6
+bit 444 O 1 IO_H6 443 1 Z
+bit 443 C 1 *
+bit 442 I 1 IO_H7
+bit 441 O 1 IO_H7 440 1 Z
+bit 440 C 1 *
+bit 439 I 1 IO_F1
+bit 438 O 1 IO_F1 437 1 Z
+bit 437 C 1 *
+bit 436 I 1 IO_F2
+bit 435 O 1 IO_F2 434 1 Z
+bit 434 C 1 *
+bit 433 I 1 IO_G4
+bit 432 O 1 IO_G4 431 1 Z
+bit 431 C 1 *
+bit 430 I 1 IO_G5
+bit 429 O 1 IO_G5 428 1 Z
+bit 428 C 1 *
+bit 427 I 1 IO_F3
+bit 426 O 1 IO_F3 425 1 Z
+bit 425 C 1 *
+bit 424 I 1 IO_F4
+bit 423 O 1 IO_F4 422 1 Z
+bit 422 C 1 *
+bit 421 I 1 IO_E1
+bit 420 O 1 IO_E1 419 1 Z
+bit 419 C 1 *
+bit 418 I 1 IO_E2
+bit 417 O 1 IO_E2 416 1 Z
+bit 416 C 1 *
+bit 415 I 1 IO_G6
+bit 414 O 1 IO_G6 413 1 Z
+bit 413 C 1 *
+bit 412 I 1 IO_G7
+bit 411 O 1 IO_G7 410 1 Z
+bit 410 C 1 *
+bit 409 I 1 IO_D1
+bit 408 O 1 IO_D1 407 1 Z
+bit 407 C 1 *
+bit 406 I 1 IO_D2
+bit 405 O 1 IO_D2 404 1 Z
+bit 404 C 1 *
+bit 403 I 1 IO_E3
+bit 402 O 1 IO_E3 401 1 Z
+bit 401 C 1 *
+bit 400 I 1 IO_E4
+bit 399 O 1 IO_E4 398 1 Z
+bit 398 C 1 *
+bit 397 I 1 IO_F5
+bit 396 O 1 IO_F5 395 1 Z
+bit 395 C 1 *
+bit 394 I 1 IO_F6
+bit 393 O 1 IO_F6 392 1 Z
+bit 392 C 1 *
+bit 391 O 1 *
+bit 390 I 1 HSWAP_EN_C2
+bit 389 I 1 IO_B3
+bit 388 O 1 IO_B3 387 1 Z
+bit 387 C 1 *
+bit 386 I 1 IO_E5
+bit 385 O 1 IO_E5 384 1 Z
+bit 384 C 1 *
+bit 383 I 1 IO_D5
+bit 382 O 1 IO_D5 381 1 Z
+bit 381 C 1 *
+bit 380 O 1 *
+bit 379 O 1 *
+bit 378 O 1 *
+bit 377 I 1 IO_A3
+bit 376 O 1 IO_A3 375 1 Z
+bit 375 C 1 *
+bit 374 I 1 IO_C4
+bit 373 O 1 IO_C4 372 1 Z
+bit 372 C 1 *
+bit 371 I 1 IO_B4
+bit 370 O 1 IO_B4 369 1 Z
+bit 369 C 1 *
+bit 368 I 1 IO_A4
+bit 367 O 1 IO_A4 366 1 Z
+bit 366 C 1 *
+bit 365 I 1 IO_C5
+bit 364 O 1 IO_C5 363 1 Z
+bit 363 C 1 *
+bit 362 I 1 IO_B5
+bit 361 O 1 IO_B5 360 1 Z
+bit 360 C 1 *
+bit 359 I 1 IO_A5
+bit 358 O 1 IO_A5 357 1 Z
+bit 357 C 1 *
+bit 356 I 1 IO_E6
+bit 355 O 1 IO_E6 354 1 Z
+bit 354 C 1 *
+bit 353 I 1 IO_D6
+bit 352 O 1 IO_D6 351 1 Z
+bit 351 C 1 *
+bit 350 I 1 IO_C6
+bit 349 O 1 IO_C6 348 1 Z
+bit 348 C 1 *
+bit 347 I 1 IO_B6
+bit 346 O 1 IO_B6 345 1 Z
+bit 345 C 1 *
+bit 344 I 1 IO_A6
+bit 343 O 1 IO_A6 342 1 Z
+bit 342 C 1 *
+bit 341 I 1 IO_E7
+bit 340 O 1 IO_E7 339 1 Z
+bit 339 C 1 *
+bit 338 I 1 IO_D7
+bit 337 O 1 IO_D7 336 1 Z
+bit 336 C 1 *
+bit 335 I 1 IO_B7
+bit 334 O 1 IO_B7 333 1 Z
+bit 333 C 1 *
+bit 332 I 1 IO_A7
+bit 331 O 1 IO_A7 330 1 Z
+bit 330 C 1 *
+bit 329 I 1 IO_F7
+bit 328 O 1 IO_F7 327 1 Z
+bit 327 C 1 *
+bit 326 I 1 IO_G8
+bit 325 O 1 IO_G8 324 1 Z
+bit 324 C 1 *
+bit 323 I 1 IO_F8
+bit 322 O 1 IO_F8 321 1 Z
+bit 321 C 1 *
+bit 320 I 1 IO_E8
+bit 319 O 1 IO_E8 318 1 Z
+bit 318 C 1 *
+bit 317 I 1 IO_D8
+bit 316 O 1 IO_D8 315 1 Z
+bit 315 C 1 *
+bit 314 I 1 IO_C8
+bit 313 O 1 IO_C8 312 1 Z
+bit 312 C 1 *
+bit 311 I 1 IO_B8
+bit 310 O 1 IO_B8 309 1 Z
+bit 309 C 1 *
+bit 308 I 1 IO_A8
+bit 307 O 1 IO_A8 306 1 Z
+bit 306 C 1 *
+bit 305 I 1 IO_G9
+bit 304 O 1 IO_G9 303 1 Z
+bit 303 C 1 *
+bit 302 I 1 IO_F9
+bit 301 O 1 IO_F9 300 1 Z
+bit 300 C 1 *
+bit 299 O 1 *
+bit 298 O 1 *
+bit 297 O 1 *
+bit 296 I 1 IO_E9
+bit 295 O 1 IO_E9 294 1 Z
+bit 294 C 1 *
+bit 293 I 1 IO_D9
+bit 292 O 1 IO_D9 291 1 Z
+bit 291 C 1 *
+bit 290 I 1 IO_C9
+bit 289 O 1 IO_C9 288 1 Z
+bit 288 C 1 *
+bit 287 I 1 IO_B9
+bit 286 O 1 IO_B9 285 1 Z
+bit 285 C 1 *
+bit 284 I 1 IO_G10
+bit 283 O 1 IO_G10 282 1 Z
+bit 282 C 1 *
+bit 281 I 1 IO_F10
+bit 280 O 1 IO_F10 279 1 Z
+bit 279 C 1 *
+bit 278 I 1 IO_E10
+bit 277 O 1 IO_E10 276 1 Z
+bit 276 C 1 *
+bit 275 I 1 IO_D10
+bit 274 O 1 IO_D10 273 1 Z
+bit 273 C 1 *
+bit 272 I 1 IO_C10
+bit 271 O 1 IO_C10 270 1 Z
+bit 270 C 1 *
+bit 269 I 1 IO_H11
+bit 268 O 1 IO_H11 267 1 Z
+bit 267 C 1 *
+bit 266 I 1 IO_B10
+bit 265 O 1 IO_B10 264 1 Z
+bit 264 C 1 *
+bit 263 I 1 IO_A10
+bit 262 O 1 IO_A10 261 1 Z
+bit 261 C 1 *
+bit 260 I 1 IO_G11
+bit 259 O 1 IO_G11 258 1 Z
+bit 258 C 1 *
+bit 257 I 1 IO_F11
+bit 256 O 1 IO_F11 255 1 Z
+bit 255 C 1 *
+bit 254 O 1 *
+bit 253 O 1 *
+bit 252 O 1 *
+bit 251 I 1 IO_E11
+bit 250 O 1 IO_E11 249 1 Z
+bit 249 C 1 *
+bit 248 I 1 IO_D11
+bit 247 O 1 IO_D11 246 1 Z
+bit 246 C 1 *
+bit 245 I 1 IO_B11
+bit 244 O 1 IO_B11 243 1 Z
+bit 243 C 1 *
+bit 242 I 1 IO_A11
+bit 241 O 1 IO_A11 240 1 Z
+bit 240 C 1 *
+bit 239 I 1 IO_H12
+bit 238 O 1 IO_H12 237 1 Z
+bit 237 C 1 *
+bit 236 I 1 IO_G12
+bit 235 O 1 IO_G12 234 1 Z
+bit 234 C 1 *
+bit 233 I 1 IO_H13
+bit 232 O 1 IO_H13 231 1 Z
+bit 231 C 1 *
+bit 230 I 1 IO_F12
+bit 229 O 1 IO_F12 228 1 Z
+bit 228 C 1 *
+bit 227 I 1 IO_E12
+bit 226 O 1 IO_E12 225 1 Z
+bit 225 C 1 *
+bit 224 I 1 IO_C12
+bit 223 O 1 IO_C12 222 1 Z
+bit 222 C 1 *
+bit 221 I 1 IO_B12
+bit 220 O 1 IO_B12 219 1 Z
+bit 219 C 1 *
+bit 218 I 1 IO_A12
+bit 217 O 1 IO_A12 216 1 Z
+bit 216 C 1 *
+bit 215 I 1 IO_G13
+bit 214 O 1 IO_G13 213 1 Z
+bit 213 C 1 *
+bit 212 I 1 IO_F13
+bit 211 O 1 IO_F13 210 1 Z
+bit 210 C 1 *
+bit 209 I 1 IO_E13
+bit 208 O 1 IO_E13 207 1 Z
+bit 207 C 1 *
+bit 206 I 1 IO_D13
+bit 205 O 1 IO_D13 204 1 Z
+bit 204 C 1 *
+bit 203 I 1 IO_C13
+bit 202 O 1 IO_C13 201 1 Z
+bit 201 C 1 *
+bit 200 I 1 IO_B13
+bit 199 O 1 IO_B13 198 1 Z
+bit 198 C 1 *
+bit 197 I 1 IO_A13
+bit 196 O 1 IO_A13 195 1 Z
+bit 195 C 1 *
+bit 194 I 1 IO_A14
+bit 193 O 1 IO_A14 192 1 Z
+bit 192 C 1 *
+bit 191 I 1 IO_B14
+bit 190 O 1 IO_B14 189 1 Z
+bit 189 C 1 *
+bit 188 I 1 IO_C14
+bit 187 O 1 IO_C14 186 1 Z
+bit 186 C 1 *
+bit 185 I 1 IO_D14
+bit 184 O 1 IO_D14 183 1 Z
+bit 183 C 1 *
+bit 182 I 1 IO_E14
+bit 181 O 1 IO_E14 180 1 Z
+bit 180 C 1 *
+bit 179 I 1 IO_F14
+bit 178 O 1 IO_F14 177 1 Z
+bit 177 C 1 *
+bit 176 I 1 IO_G14
+bit 175 O 1 IO_G14 174 1 Z
+bit 174 C 1 *
+bit 173 I 1 IO_H14
+bit 172 O 1 IO_H14 171 1 Z
+bit 171 C 1 *
+bit 170 I 1 IO_A15
+bit 169 O 1 IO_A15 168 1 Z
+bit 168 C 1 *
+bit 167 I 1 IO_B15
+bit 166 O 1 IO_B15 165 1 Z
+bit 165 C 1 *
+bit 164 I 1 IO_C15
+bit 163 O 1 IO_C15 162 1 Z
+bit 162 C 1 *
+bit 161 I 1 IO_E15
+bit 160 O 1 IO_E15 159 1 Z
+bit 159 C 1 *
+bit 158 I 1 IO_F15
+bit 157 O 1 IO_F15 156 1 Z
+bit 156 C 1 *
+bit 155 I 1 IO_G15
+bit 154 O 1 IO_G15 153 1 Z
+bit 153 C 1 *
+bit 152 I 1 IO_H15
+bit 151 O 1 IO_H15 150 1 Z
+bit 150 C 1 *
+bit 149 I 1 IO_D16
+bit 148 O 1 IO_D16 147 1 Z
+bit 147 C 1 *
+bit 146 I 1 IO_A16
+bit 145 O 1 IO_A16 144 1 Z
+bit 144 C 1 *
+bit 143 I 1 IO_B16
+bit 142 O 1 IO_B16 141 1 Z
+bit 141 C 1 *
+bit 140 I 1 IO_E16
+bit 139 O 1 IO_E16 138 1 Z
+bit 138 C 1 *
+bit 137 I 1 IO_F16
+bit 136 O 1 IO_F16 135 1 Z
+bit 135 C 1 *
+bit 134 O 1 *
+bit 133 O 1 *
+bit 132 O 1 *
+bit 131 I 1 IO_G16
+bit 130 O 1 IO_G16 129 1 Z
+bit 129 C 1 *
+bit 128 I 1 IO_H16
+bit 127 O 1 IO_H16 126 1 Z
+bit 126 C 1 *
+bit 125 I 1 IO_A17
+bit 124 O 1 IO_A17 123 1 Z
+bit 123 C 1 *
+bit 122 I 1 IO_B17
+bit 121 O 1 IO_B17 120 1 Z
+bit 120 C 1 *
+bit 119 I 1 IO_C17
+bit 118 O 1 IO_C17 117 1 Z
+bit 117 C 1 *
+bit 116 I 1 IO_D17
+bit 115 O 1 IO_D17 114 1 Z
+bit 114 C 1 *
+bit 113 I 1 IO_E17
+bit 112 O 1 IO_E17 111 1 Z
+bit 111 C 1 *
+bit 110 I 1 IO_F17
+bit 109 O 1 IO_F17 108 1 Z
+bit 108 C 1 *
+bit 107 I 1 IO_G17
+bit 106 O 1 IO_G17 105 1 Z
+bit 105 C 1 *
+bit 104 O 1 *
+bit 103 O 1 *
+bit 102 O 1 *
+bit 101 I 1 IO_B18
+bit 100 O 1 IO_B18 99 1 Z
+bit 99 C 1 *
+bit 98 I 1 IO_C18
+bit 97 O 1 IO_C18 96 1 Z
+bit 96 C 1 *
+bit 95 I 1 IO_D18
+bit 94 O 1 IO_D18 93 1 Z
+bit 93 C 1 *
+bit 92 O 1 *
+bit 91 O 1 *
+bit 90 O 1 *
+bit 89 I 1 IO_E18
+bit 88 O 1 IO_E18 87 1 Z
+bit 87 C 1 *
+bit 86 I 1 IO_F18
+bit 85 O 1 IO_F18 84 1 Z
+bit 84 C 1 *
+bit 83 I 1 IO_G18
+bit 82 O 1 IO_G18 81 1 Z
+bit 81 C 1 *
+bit 80 I 1 IO_A19
+bit 79 O 1 IO_A19 78 1 Z
+bit 78 C 1 *
+bit 77 I 1 IO_B19
+bit 76 O 1 IO_B19 75 1 Z
+bit 75 C 1 *
+bit 74 O 1 *
+bit 73 O 1 *
+bit 72 O 1 *
+bit 71 I 1 IO_C19
+bit 70 O 1 IO_C19 69 1 Z
+bit 69 C 1 *
+bit 68 I 1 IO_D19
+bit 67 O 1 IO_D19 66 1 Z
+bit 66 C 1 *
+bit 65 I 1 IO_E19
+bit 64 O 1 IO_E19 63 1 Z
+bit 63 C 1 *
+bit 62 I 1 IO_F19
+bit 61 O 1 IO_F19 60 1 Z
+bit 60 C 1 *
+bit 59 I 1 IO_G19
+bit 58 O 1 IO_G19 57 1 Z
+bit 57 C 1 *
+bit 56 I 1 IO_A20
+bit 55 O 1 IO_A20 54 1 Z
+bit 54 C 1 *
+bit 53 I 1 IO_B20
+bit 52 O 1 IO_B20 51 1 Z
+bit 51 C 1 *
+bit 50 I 1 IO_D20
+bit 49 O 1 IO_D20 48 1 Z
+bit 48 C 1 *
+bit 47 I 1 IO_E20
+bit 46 O 1 IO_E20 45 1 Z
+bit 45 C 1 *
+bit 44 I 1 IO_F20
+bit 43 O 1 IO_F20 42 1 Z
+bit 42 C 1 *
+bit 41 I 1 IO_A21
+bit 40 O 1 IO_A21 39 1 Z
+bit 39 C 1 *
+bit 38 I 1 IO_B21
+bit 37 O 1 IO_B21 36 1 Z
+bit 36 C 1 *
+bit 35 I 1 IO_C21
+bit 34 O 1 IO_C21 33 1 Z
+bit 33 C 1 *
+bit 32 I 1 IO_D21
+bit 31 O 1 IO_D21 30 1 Z
+bit 30 C 1 *
+bit 29 I 1 IO_A22
+bit 28 O 1 IO_A22 27 1 Z
+bit 27 C 1 *
+bit 26 I 1 IO_B22
+bit 25 O 1 IO_B22 24 1 Z
+bit 24 C 1 *
+bit 23 I 1 IO_C22
+bit 22 O 1 IO_C22 21 1 Z
+bit 21 C 1 *
+bit 20 I 1 IO_E21
+bit 19 O 1 IO_E21 18 1 Z
+bit 18 C 1 *
+bit 17 I 1 IO_F21
+bit 16 O 1 IO_F21 15 1 Z
+bit 15 C 1 *
+bit 14 I 1 IO_A23
+bit 13 O 1 IO_A23 12 1 Z
+bit 12 C 1 *
+bit 11 I 1 IO_B23
+bit 10 O 1 IO_B23 9 1 Z
+bit 9 C 1 *
+bit 8 I 1 IO_C23
+bit 7 O 1 IO_C23 6 1 Z
+bit 6 C 1 *
+bit 5 I 1 IO_D22
+bit 4 O 1 IO_D22 3 1 Z
+bit 3 C 1 *
+bit 2 I 1 IO_E22
+bit 1 O 1 IO_E22 0 1 Z
+bit 0 C 1 *
--- /dev/null
+signal GND1
+signal GND2
+signal GND3
+signal GND4
+signal GND5
+signal GND6
+signal GND7
+signal GND8
+signal GND9
+signal GND10
+signal GND11
+signal GND12
+signal GND13
+signal GND14
+signal GND15
+signal GND16
+signal GND17
+signal GND18
+signal GND19
+signal GND20
+signal GND21
+signal GND22
+signal GND23
+signal GND24
+signal GND25
+signal GND26
+signal GND27
+signal GND28
+signal GND29
+signal GND30
+signal GND31
+signal GND32
+signal GND33
+signal GND34
+signal GND35
+signal GND36
+signal GND37
+signal GND38
+signal GND39
+signal GND40
+signal GND41
+signal GND42
+signal GND43
+signal GND44
+signal GND45
+signal GND46
+signal GND47
+signal GND48
+signal GND49
+signal GND50
+signal GND51
+signal GND52
+signal GND53
+signal GND54
+signal GND55
+signal GND56
+signal GND57
+signal GND58
+signal GND59
+signal GND60
+signal GND61
+signal GND62
+signal GND63
+signal GND64
+signal GND65
+signal GND66
+signal GND67
+signal GND68
+signal GND69
+signal GND70
+signal GND71
+signal GND72
+signal GND73
+signal GND74
+signal GND75
+signal GND76
+signal GND77
+signal GND78
+signal GND79
+signal GND80
+signal GND81
+signal GND82
+signal GND83
+signal GND84
+signal GND85
+signal CCLK_PAD458
+signal DONE_PAD457
+signal HSWAP_EN_PAD96
+signal M0_PAD267
+signal M1_PAD266
+signal M2_PAD268
+signal PROG_B
+signal TCK
+signal TDI
+signal TDO
+signal TMS
+signal VCCAUX1
+signal VCCAUX2
+signal VCCAUX3
+signal VCCAUX4
+signal VCCAUX5
+signal VCCAUX6
+signal VCCAUX7
+signal VCCAUX8
+signal VCCAUX9
+signal VCCAUX10
+signal VCCAUX11
+signal VCCAUX12
+signal VCCAUX13
+signal VCCAUX14
+signal VCCAUX15
+signal VCCAUX16
+signal VCCAUX17
+signal VCCAUX18
+signal VCCAUX19
+signal VCCAUX20
+signal VCCAUX21
+signal VCCAUX22
+signal VCCAUX23
+signal VCCAUX24
+signal VCCINT1
+signal VCCINT2
+signal VCCINT3
+signal VCCINT4
+signal VCCINT5
+signal VCCINT6
+signal VCCINT7
+signal VCCINT8
+signal VCCINT9
+signal VCCINT10
+signal VCCINT11
+signal VCCINT12
+signal VCCINT13
+signal VCCINT14
+signal VCCINT15
+signal VCCINT16
+signal VCCINT17
+signal VCCINT18
+signal VCCINT19
+signal VCCINT20
+signal VCCINT21
+signal VCCINT22
+signal VCCINT23
+signal VCCINT24
+signal VCCO01
+signal VCCO02
+signal VCCO03
+signal VCCO04
+signal VCCO05
+signal VCCO06
+signal VCCO07
+signal VCCO08
+signal VCCO09
+signal VCCO010
+signal VCCO11
+signal VCCO12
+signal VCCO13
+signal VCCO14
+signal VCCO15
+signal VCCO16
+signal VCCO17
+signal VCCO18
+signal VCCO19
+signal VCCO110
+signal VCCO21
+signal VCCO22
+signal VCCO23
+signal VCCO24
+signal VCCO25
+signal VCCO26
+signal VCCO27
+signal VCCO31
+signal VCCO32
+signal VCCO33
+signal VCCO34
+signal VCCO35
+signal VCCO36
+signal VCCO37
+signal VCCO41
+signal VCCO42
+signal VCCO43
+signal VCCO44
+signal VCCO45
+signal VCCO46
+signal VCCO47
+signal VCCO48
+signal VCCO49
+signal VCCO410
+signal VCCO51
+signal VCCO52
+signal VCCO53
+signal VCCO54
+signal VCCO55
+signal VCCO56
+signal VCCO57
+signal VCCO58
+signal VCCO59
+signal VCCO510
+signal VCCO61
+signal VCCO62
+signal VCCO63
+signal VCCO64
+signal VCCO65
+signal VCCO66
+signal VCCO67
+signal VCCO71
+signal VCCO72
+signal VCCO73
+signal VCCO74
+signal VCCO75
+signal VCCO76
+signal VCCO77
+signal IO_PAD2
+signal IO_PAD3
+signal IO_PAD4
+signal IO_PAD6
+signal IO_PAD8
+signal IO_PAD9
+signal IO_PAD10
+signal IO_PAD12
+signal IO_PAD13
+signal IO_PAD14
+signal IO_PAD16
+signal IO_PAD18
+signal IO_PAD20
+signal IO_PAD22
+signal IO_PAD23
+signal IO_PAD24
+signal IO_PAD25
+signal IO_PAD26
+signal IO_PAD28
+signal IO_PAD30
+signal IO_PAD31
+signal IO_PAD32
+signal IO_PAD33
+signal IO_PAD34
+signal IO_PAD35
+signal IO_PAD36
+signal IO_PAD38
+signal IO_PAD40
+signal IO_PAD42
+signal IO_PAD44
+signal IO_PAD46
+signal IO_PAD48
+signal IO_PAD49
+signal IO_PAD50
+signal IO_PAD51
+signal IO_PAD52
+signal IO_PAD54
+signal IO_PAD56
+signal IO_PAD57
+signal IO_PAD58
+signal IO_PAD60
+signal IO_PAD61
+signal IO_PAD62
+signal IO_PAD64
+signal IO_PAD65
+signal IO_PAD66
+signal IO_PAD68
+signal IO_PAD70
+signal IO_PAD72
+signal IO_PAD74
+signal IO_PAD75
+signal IO_PAD76
+signal IO_PAD77
+signal IO_PAD78
+signal IO_PAD80
+signal IO_PAD82
+signal IO_PAD83
+signal IO_PAD84
+signal IO_PAD85
+signal IO_PAD86
+signal IO_PAD88
+signal IO_PAD89
+signal IO_PAD93
+signal IO_PAD94
+signal IO_PAD95
+signal IO_PAD100
+signal IO_PAD101
+signal IO_PAD102
+signal IO_PAD103
+signal IO_PAD104
+signal IO_PAD105
+signal IO_PAD106
+signal IO_PAD108
+signal IO_PAD109
+signal IO_PAD110
+signal IO_PAD111
+signal IO_PAD112
+signal IO_PAD114
+signal IO_PAD116
+signal IO_PAD118
+signal IO_PAD120
+signal IO_PAD121
+signal IO_PAD122
+signal IO_PAD124
+signal IO_PAD125
+signal IO_PAD126
+signal IO_PAD128
+signal IO_PAD129
+signal IO_PAD130
+signal IO_PAD132
+signal IO_PAD134
+signal IO_PAD135
+signal IO_PAD136
+signal IO_PAD137
+signal IO_PAD138
+signal IO_PAD140
+signal IO_PAD142
+signal IO_PAD144
+signal IO_PAD146
+signal IO_PAD147
+signal IO_PAD148
+signal IO_PAD150
+signal IO_PAD152
+signal IO_PAD153
+signal IO_PAD154
+signal IO_PAD155
+signal IO_PAD156
+signal IO_PAD157
+signal IO_PAD158
+signal IO_PAD159
+signal IO_PAD160
+signal IO_PAD161
+signal IO_PAD162
+signal IO_PAD163
+signal IO_PAD164
+signal IO_PAD166
+signal IO_PAD168
+signal IO_PAD170
+signal IO_PAD172
+signal IO_PAD174
+signal IO_PAD175
+signal IO_PAD176
+signal IO_PAD178
+signal IO_PAD180
+signal IO_PAD181
+signal IO_PAD183
+signal IO_PAD184
+signal IO_PAD186
+signal IO_PAD188
+signal IO_PAD189
+signal IO_PAD190
+signal IO_PAD192
+signal IO_PAD194
+signal IO_PAD196
+signal IO_PAD198
+signal IO_PAD200
+signal IO_PAD201
+signal IO_PAD202
+signal IO_PAD203
+signal IO_PAD204
+signal IO_PAD205
+signal IO_PAD206
+signal IO_PAD207
+signal IO_PAD208
+signal IO_PAD209
+signal IO_PAD210
+signal IO_PAD211
+signal IO_PAD212
+signal IO_PAD214
+signal IO_PAD216
+signal IO_PAD217
+signal IO_PAD218
+signal IO_PAD220
+signal IO_PAD222
+signal IO_PAD224
+signal IO_PAD226
+signal IO_PAD227
+signal IO_PAD228
+signal IO_PAD229
+signal IO_PAD230
+signal IO_PAD232
+signal IO_PAD234
+signal IO_PAD235
+signal IO_PAD236
+signal IO_PAD238
+signal IO_PAD239
+signal IO_PAD240
+signal IO_PAD242
+signal IO_PAD243
+signal IO_PAD244
+signal IO_PAD246
+signal IO_PAD248
+signal IO_PAD250
+signal IO_PAD252
+signal IO_PAD253
+signal IO_PAD254
+signal IO_PAD255
+signal IO_PAD256
+signal IO_PAD258
+signal IO_PAD259
+signal IO_PAD260
+signal IO_PAD261
+signal IO_PAD262
+signal IO_PAD263
+signal IO_PAD264
+signal IO_PAD269
+signal IO_PAD270
+signal IO_PAD274
+signal IO_PAD275
+signal IO_PAD276
+signal IO_PAD278
+signal IO_PAD279
+signal IO_PAD280
+signal IO_PAD281
+signal IO_PAD282
+signal IO_PAD284
+signal IO_PAD286
+signal IO_PAD287
+signal IO_PAD288
+signal IO_PAD289
+signal IO_PAD290
+signal IO_PAD292
+signal IO_PAD294
+signal IO_PAD296
+signal IO_PAD298
+signal IO_PAD299
+signal IO_PAD300
+signal IO_PAD302
+signal IO_PAD303
+signal IO_PAD304
+signal IO_PAD306
+signal IO_PAD307
+signal IO_PAD308
+signal IO_PAD310
+signal IO_PAD312
+signal IO_PAD313
+signal IO_PAD314
+signal IO_PAD315
+signal IO_PAD316
+signal IO_PAD318
+signal IO_PAD320
+signal IO_PAD322
+signal IO_PAD324
+signal IO_PAD326
+signal IO_PAD328
+signal IO_PAD329
+signal IO_PAD330
+signal IO_PAD331
+signal IO_PAD332
+signal IO_PAD333
+signal IO_PAD334
+signal IO_PAD336
+signal IO_PAD338
+signal IO_PAD339
+signal IO_PAD340
+signal IO_PAD341
+signal IO_PAD342
+signal IO_PAD344
+signal IO_PAD346
+signal IO_PAD348
+signal IO_PAD350
+signal IO_PAD351
+signal IO_PAD352
+signal IO_PAD354
+signal IO_PAD355
+signal IO_PAD356
+signal IO_PAD358
+signal IO_PAD360
+signal IO_PAD361
+signal IO_PAD362
+signal IO_PAD364
+signal IO_PAD365
+signal IO_PAD366
+signal IO_PAD368
+signal IO_PAD370
+signal IO_PAD371
+signal IO_PAD372
+signal IO_PAD374
+signal IO_PAD375
+signal IO_PAD376
+signal IO_PAD378
+signal IO_PAD380
+signal IO_PAD382
+signal IO_PAD384
+signal IO_PAD385
+signal IO_PAD386
+signal IO_PAD387
+signal IO_PAD388
+signal IO_PAD390
+signal IO_PAD392
+signal IO_PAD393
+signal IO_PAD394
+signal IO_PAD395
+signal IO_PAD396
+signal IO_PAD397
+signal IO_PAD398
+signal IO_PAD400
+signal IO_PAD402
+signal IO_PAD404
+signal IO_PAD406
+signal IO_PAD408
+signal IO_PAD410
+signal IO_PAD411
+signal IO_PAD412
+signal IO_PAD413
+signal IO_PAD414
+signal IO_PAD416
+signal IO_PAD418
+signal IO_PAD419
+signal IO_PAD420
+signal IO_PAD422
+signal IO_PAD423
+signal IO_PAD424
+signal IO_PAD426
+signal IO_PAD427
+signal IO_PAD428
+signal IO_PAD430
+signal IO_PAD432
+signal IO_PAD434
+signal IO_PAD436
+signal IO_PAD437
+signal IO_PAD438
+signal IO_PAD439
+signal IO_PAD440
+signal IO_PAD442
+signal IO_PAD444
+signal IO_PAD445
+signal IO_PAD446
+signal IO_PAD447
+signal IO_PAD448
+signal IO_PAD450
+signal IO_PAD451
+signal IO_PAD454
+signal IO_PAD455
+signal IO_PAD456
+signal IO_PAD461
+signal IO_PAD462
+signal IO_PAD463
+signal IO_PAD464
+signal IO_PAD465
+signal IO_PAD466
+signal IO_PAD467
+signal IO_PAD469
+signal IO_PAD470
+signal IO_PAD471
+signal IO_PAD472
+signal IO_PAD473
+signal IO_PAD475
+signal IO_PAD477
+signal IO_PAD479
+signal IO_PAD481
+signal IO_PAD482
+signal IO_PAD483
+signal IO_PAD485
+signal IO_PAD486
+signal IO_PAD487
+signal IO_PAD489
+signal IO_PAD490
+signal IO_PAD491
+signal IO_PAD493
+signal IO_PAD495
+signal IO_PAD496
+signal IO_PAD497
+signal IO_PAD498
+signal IO_PAD499
+signal IO_PAD501
+signal IO_PAD503
+signal IO_PAD505
+signal IO_PAD507
+signal IO_PAD508
+signal IO_PAD509
+signal IO_PAD511
+signal IO_PAD513
+signal IO_PAD514
+signal IO_PAD515
+signal IO_PAD516
+signal IO_PAD517
+signal IO_PAD518
+signal IO_PAD519
+signal IO_PAD520
+signal IO_PAD521
+signal IO_PAD522
+signal IO_PAD523
+signal IO_PAD524
+signal IO_PAD525
+signal IO_PAD527
+signal IO_PAD529
+signal IO_PAD531
+signal IO_PAD533
+signal IO_PAD535
+signal IO_PAD536
+signal IO_PAD537
+signal IO_PAD539
+signal IO_PAD541
+signal IO_PAD542
+signal IO_PAD544
+signal IO_PAD545
+signal IO_PAD547
+signal IO_PAD549
+signal IO_PAD550
+signal IO_PAD551
+signal IO_PAD553
+signal IO_PAD555
+signal IO_PAD557
+signal IO_PAD559
+signal IO_PAD561
+signal IO_PAD562
+signal IO_PAD563
+signal IO_PAD564
+signal IO_PAD565
+signal IO_PAD566
+signal IO_PAD567
+signal IO_PAD568
+signal IO_PAD569
+signal IO_PAD570
+signal IO_PAD571
+signal IO_PAD572
+signal IO_PAD573
+signal IO_PAD575
+signal IO_PAD577
+signal IO_PAD578
+signal IO_PAD579
+signal IO_PAD581
+signal IO_PAD583
+signal IO_PAD585
+signal IO_PAD587
+signal IO_PAD588
+signal IO_PAD589
+signal IO_PAD590
+signal IO_PAD591
+signal IO_PAD593
+signal IO_PAD595
+signal IO_PAD596
+signal IO_PAD597
+signal IO_PAD599
+signal IO_PAD600
+signal IO_PAD601
+signal IO_PAD603
+signal IO_PAD604
+signal IO_PAD605
+signal IO_PAD607
+signal IO_PAD609
+signal IO_PAD611
+signal IO_PAD613
+signal IO_PAD614
+signal IO_PAD615
+signal IO_PAD616
+signal IO_PAD617
+signal IO_PAD619
+signal IO_PAD620
+signal IO_PAD621
+signal IO_PAD622
+signal IO_PAD623
+signal IO_PAD624
+signal IO_PAD625
+signal IO_PAD630
+signal IO_PAD631
+signal IO_PAD633
+signal IO_PAD634
+signal IO_PAD635
+signal IO_PAD637
+signal IO_PAD638
+signal IO_PAD639
+signal IO_PAD640
+signal IO_PAD641
+signal IO_PAD643
+signal IO_PAD645
+signal IO_PAD646
+signal IO_PAD647
+signal IO_PAD648
+signal IO_PAD649
+signal IO_PAD651
+signal IO_PAD653
+signal IO_PAD655
+signal IO_PAD657
+signal IO_PAD658
+signal IO_PAD659
+signal IO_PAD661
+signal IO_PAD662
+signal IO_PAD663
+signal IO_PAD665
+signal IO_PAD666
+signal IO_PAD667
+signal IO_PAD669
+signal IO_PAD671
+signal IO_PAD672
+signal IO_PAD673
+signal IO_PAD674
+signal IO_PAD675
+signal IO_PAD677
+signal IO_PAD679
+signal IO_PAD681
+signal IO_PAD683
+signal IO_PAD685
+signal IO_PAD687
+signal IO_PAD688
+signal IO_PAD689
+signal IO_PAD690
+signal IO_PAD691
+signal IO_PAD692
+signal IO_PAD693
+signal IO_PAD695
+signal IO_PAD697
+signal IO_PAD698
+signal IO_PAD699
+signal IO_PAD700
+signal IO_PAD701
+signal IO_PAD703
+signal IO_PAD705
+signal IO_PAD707
+signal IO_PAD709
+signal IO_PAD710
+signal IO_PAD711
+signal IO_PAD713
+signal IO_PAD714
+signal IO_PAD715
+signal IO_PAD717
+signal IO_PAD719
+signal IO_PAD720
+
+register BSR 1559
+register BR 1
+register DIR 32
+
+instruction length 6
+
+instruction EXTEST 000000 BSR
+instruction SAMPLE/PRELOAD 000001 BSR
+instruction IDCODE 001001 DIR
+instruction BYPASS 111111 BR
+
+bit 1558 I 1 IO_PAD625
+bit 1557 O 1 IO_PAD625 1556 1 Z
+bit 1556 C 1 *
+bit 1555 I 1 IO_PAD624
+bit 1554 O 1 IO_PAD624 1553 1 Z
+bit 1553 C 1 *
+bit 1552 I 1 IO_PAD623
+bit 1551 O 1 IO_PAD623 1550 1 Z
+bit 1550 C 1 *
+bit 1549 I 1 IO_PAD622
+bit 1548 O 1 IO_PAD622 1547 1 Z
+bit 1547 C 1 *
+bit 1546 I 1 IO_PAD621
+bit 1545 O 1 IO_PAD621 1544 1 Z
+bit 1544 C 1 *
+bit 1543 I 1 IO_PAD620
+bit 1542 O 1 IO_PAD620 1541 1 Z
+bit 1541 C 1 *
+bit 1540 I 1 IO_PAD619
+bit 1539 O 1 IO_PAD619 1538 1 Z
+bit 1538 C 1 *
+bit 1537 I 1 IO_PAD617
+bit 1536 O 1 IO_PAD617 1535 1 Z
+bit 1535 C 1 *
+bit 1534 I 1 IO_PAD616
+bit 1533 O 1 IO_PAD616 1532 1 Z
+bit 1532 C 1 *
+bit 1531 I 1 IO_PAD615
+bit 1530 O 1 IO_PAD615 1529 1 Z
+bit 1529 C 1 *
+bit 1528 I 1 IO_PAD614
+bit 1527 O 1 IO_PAD614 1526 1 Z
+bit 1526 C 1 *
+bit 1525 I 1 IO_PAD613
+bit 1524 O 1 IO_PAD613 1523 1 Z
+bit 1523 C 1 *
+bit 1522 I 1 IO_PAD611
+bit 1521 O 1 IO_PAD611 1520 1 Z
+bit 1520 C 1 *
+bit 1519 I 1 IO_PAD609
+bit 1518 O 1 IO_PAD609 1517 1 Z
+bit 1517 C 1 *
+bit 1516 I 1 IO_PAD607
+bit 1515 O 1 IO_PAD607 1514 1 Z
+bit 1514 C 1 *
+bit 1513 I 1 IO_PAD605
+bit 1512 O 1 IO_PAD605 1511 1 Z
+bit 1511 C 1 *
+bit 1510 I 1 IO_PAD604
+bit 1509 O 1 IO_PAD604 1508 1 Z
+bit 1508 C 1 *
+bit 1507 I 1 IO_PAD603
+bit 1506 O 1 IO_PAD603 1505 1 Z
+bit 1505 C 1 *
+bit 1504 I 1 IO_PAD601
+bit 1503 O 1 IO_PAD601 1502 1 Z
+bit 1502 C 1 *
+bit 1501 I 1 IO_PAD600
+bit 1500 O 1 IO_PAD600 1499 1 Z
+bit 1499 C 1 *
+bit 1498 I 1 IO_PAD599
+bit 1497 O 1 IO_PAD599 1496 1 Z
+bit 1496 C 1 *
+bit 1495 I 1 IO_PAD597
+bit 1494 O 1 IO_PAD597 1493 1 Z
+bit 1493 C 1 *
+bit 1492 I 1 IO_PAD596
+bit 1491 O 1 IO_PAD596 1490 1 Z
+bit 1490 C 1 *
+bit 1489 I 1 IO_PAD595
+bit 1488 O 1 IO_PAD595 1487 1 Z
+bit 1487 C 1 *
+bit 1486 I 1 IO_PAD593
+bit 1485 O 1 IO_PAD593 1484 1 Z
+bit 1484 C 1 *
+bit 1483 I 1 IO_PAD591
+bit 1482 O 1 IO_PAD591 1481 1 Z
+bit 1481 C 1 *
+bit 1480 I 1 IO_PAD590
+bit 1479 O 1 IO_PAD590 1478 1 Z
+bit 1478 C 1 *
+bit 1477 I 1 IO_PAD589
+bit 1476 O 1 IO_PAD589 1475 1 Z
+bit 1475 C 1 *
+bit 1474 I 1 IO_PAD588
+bit 1473 O 1 IO_PAD588 1472 1 Z
+bit 1472 C 1 *
+bit 1471 I 1 IO_PAD587
+bit 1470 O 1 IO_PAD587 1469 1 Z
+bit 1469 C 1 *
+bit 1468 I 1 IO_PAD585
+bit 1467 O 1 IO_PAD585 1466 1 Z
+bit 1466 C 1 *
+bit 1465 I 1 IO_PAD583
+bit 1464 O 1 IO_PAD583 1463 1 Z
+bit 1463 C 1 *
+bit 1462 I 1 IO_PAD581
+bit 1461 O 1 IO_PAD581 1460 1 Z
+bit 1460 C 1 *
+bit 1459 I 1 IO_PAD579
+bit 1458 O 1 IO_PAD579 1457 1 Z
+bit 1457 C 1 *
+bit 1456 I 1 IO_PAD578
+bit 1455 O 1 IO_PAD578 1454 1 Z
+bit 1454 C 1 *
+bit 1453 I 1 IO_PAD577
+bit 1452 O 1 IO_PAD577 1451 1 Z
+bit 1451 C 1 *
+bit 1450 I 1 IO_PAD575
+bit 1449 O 1 IO_PAD575 1448 1 Z
+bit 1448 C 1 *
+bit 1447 I 1 IO_PAD573
+bit 1446 O 1 IO_PAD573 1445 1 Z
+bit 1445 C 1 *
+bit 1444 I 1 IO_PAD572
+bit 1443 O 1 IO_PAD572 1442 1 Z
+bit 1442 C 1 *
+bit 1441 I 1 IO_PAD571
+bit 1440 O 1 IO_PAD571 1439 1 Z
+bit 1439 C 1 *
+bit 1438 I 1 IO_PAD570
+bit 1437 O 1 IO_PAD570 1436 1 Z
+bit 1436 C 1 *
+bit 1435 I 1 IO_PAD569
+bit 1434 O 1 IO_PAD569 1433 1 Z
+bit 1433 C 1 *
+bit 1432 I 1 IO_PAD568
+bit 1431 O 1 IO_PAD568 1430 1 Z
+bit 1430 C 1 *
+bit 1429 I 1 IO_PAD567
+bit 1428 O 1 IO_PAD567 1427 1 Z
+bit 1427 C 1 *
+bit 1426 O 1 *
+bit 1425 O 1 *
+bit 1424 O 1 *
+bit 1423 O 1 *
+bit 1422 O 1 *
+bit 1421 O 1 *
+bit 1420 I 1 IO_PAD566
+bit 1419 O 1 IO_PAD566 1418 1 Z
+bit 1418 C 1 *
+bit 1417 I 1 IO_PAD565
+bit 1416 O 1 IO_PAD565 1415 1 Z
+bit 1415 C 1 *
+bit 1414 I 1 IO_PAD564
+bit 1413 O 1 IO_PAD564 1412 1 Z
+bit 1412 C 1 *
+bit 1411 I 1 IO_PAD563
+bit 1410 O 1 IO_PAD563 1409 1 Z
+bit 1409 C 1 *
+bit 1408 I 1 IO_PAD562
+bit 1407 O 1 IO_PAD562 1406 1 Z
+bit 1406 C 1 *
+bit 1405 I 1 IO_PAD561
+bit 1404 O 1 IO_PAD561 1403 1 Z
+bit 1403 C 1 *
+bit 1402 I 1 IO_PAD559
+bit 1401 O 1 IO_PAD559 1400 1 Z
+bit 1400 C 1 *
+bit 1399 I 1 IO_PAD557
+bit 1398 O 1 IO_PAD557 1397 1 Z
+bit 1397 C 1 *
+bit 1396 I 1 IO_PAD555
+bit 1395 O 1 IO_PAD555 1394 1 Z
+bit 1394 C 1 *
+bit 1393 I 1 IO_PAD553
+bit 1392 O 1 IO_PAD553 1391 1 Z
+bit 1391 C 1 *
+bit 1390 O 1 *
+bit 1389 O 1 *
+bit 1388 O 1 *
+bit 1387 O 1 *
+bit 1386 O 1 *
+bit 1385 O 1 *
+bit 1384 I 1 IO_PAD551
+bit 1383 O 1 IO_PAD551 1382 1 Z
+bit 1382 C 1 *
+bit 1381 I 1 IO_PAD550
+bit 1380 O 1 IO_PAD550 1379 1 Z
+bit 1379 C 1 *
+bit 1378 I 1 IO_PAD549
+bit 1377 O 1 IO_PAD549 1376 1 Z
+bit 1376 C 1 *
+bit 1375 I 1 IO_PAD547
+bit 1374 O 1 IO_PAD547 1373 1 Z
+bit 1373 C 1 *
+bit 1372 I 1 IO_PAD545
+bit 1371 O 1 IO_PAD545 1370 1 Z
+bit 1370 C 1 *
+bit 1369 I 1 IO_PAD544
+bit 1368 O 1 IO_PAD544 1367 1 Z
+bit 1367 C 1 *
+bit 1366 I 1 IO_PAD542
+bit 1365 O 1 IO_PAD542 1364 1 Z
+bit 1364 C 1 *
+bit 1363 I 1 IO_PAD541
+bit 1362 O 1 IO_PAD541 1361 1 Z
+bit 1361 C 1 *
+bit 1360 I 1 IO_PAD539
+bit 1359 O 1 IO_PAD539 1358 1 Z
+bit 1358 C 1 *
+bit 1357 I 1 IO_PAD537
+bit 1356 O 1 IO_PAD537 1355 1 Z
+bit 1355 C 1 *
+bit 1354 I 1 IO_PAD536
+bit 1353 O 1 IO_PAD536 1352 1 Z
+bit 1352 C 1 *
+bit 1351 I 1 IO_PAD535
+bit 1350 O 1 IO_PAD535 1349 1 Z
+bit 1349 C 1 *
+bit 1348 O 1 *
+bit 1347 O 1 *
+bit 1346 O 1 *
+bit 1345 O 1 *
+bit 1344 O 1 *
+bit 1343 O 1 *
+bit 1342 I 1 IO_PAD533
+bit 1341 O 1 IO_PAD533 1340 1 Z
+bit 1340 C 1 *
+bit 1339 I 1 IO_PAD531
+bit 1338 O 1 IO_PAD531 1337 1 Z
+bit 1337 C 1 *
+bit 1336 I 1 IO_PAD529
+bit 1335 O 1 IO_PAD529 1334 1 Z
+bit 1334 C 1 *
+bit 1333 I 1 IO_PAD527
+bit 1332 O 1 IO_PAD527 1331 1 Z
+bit 1331 C 1 *
+bit 1330 I 1 IO_PAD525
+bit 1329 O 1 IO_PAD525 1328 1 Z
+bit 1328 C 1 *
+bit 1327 I 1 IO_PAD524
+bit 1326 O 1 IO_PAD524 1325 1 Z
+bit 1325 C 1 *
+bit 1324 I 1 IO_PAD523
+bit 1323 O 1 IO_PAD523 1322 1 Z
+bit 1322 C 1 *
+bit 1321 I 1 IO_PAD522
+bit 1320 O 1 IO_PAD522 1319 1 Z
+bit 1319 C 1 *
+bit 1318 I 1 IO_PAD521
+bit 1317 O 1 IO_PAD521 1316 1 Z
+bit 1316 C 1 *
+bit 1315 I 1 IO_PAD520
+bit 1314 O 1 IO_PAD520 1313 1 Z
+bit 1313 C 1 *
+bit 1312 O 1 *
+bit 1311 O 1 *
+bit 1310 O 1 *
+bit 1309 O 1 *
+bit 1308 O 1 *
+bit 1307 O 1 *
+bit 1306 I 1 IO_PAD519
+bit 1305 O 1 IO_PAD519 1304 1 Z
+bit 1304 C 1 *
+bit 1303 I 1 IO_PAD518
+bit 1302 O 1 IO_PAD518 1301 1 Z
+bit 1301 C 1 *
+bit 1300 I 1 IO_PAD517
+bit 1299 O 1 IO_PAD517 1298 1 Z
+bit 1298 C 1 *
+bit 1297 I 1 IO_PAD516
+bit 1296 O 1 IO_PAD516 1295 1 Z
+bit 1295 C 1 *
+bit 1294 I 1 IO_PAD515
+bit 1293 O 1 IO_PAD515 1292 1 Z
+bit 1292 C 1 *
+bit 1291 I 1 IO_PAD514
+bit 1290 O 1 IO_PAD514 1289 1 Z
+bit 1289 C 1 *
+bit 1288 I 1 IO_PAD513
+bit 1287 O 1 IO_PAD513 1286 1 Z
+bit 1286 C 1 *
+bit 1285 I 1 IO_PAD511
+bit 1284 O 1 IO_PAD511 1283 1 Z
+bit 1283 C 1 *
+bit 1282 I 1 IO_PAD509
+bit 1281 O 1 IO_PAD509 1280 1 Z
+bit 1280 C 1 *
+bit 1279 I 1 IO_PAD508
+bit 1278 O 1 IO_PAD508 1277 1 Z
+bit 1277 C 1 *
+bit 1276 I 1 IO_PAD507
+bit 1275 O 1 IO_PAD507 1274 1 Z
+bit 1274 C 1 *
+bit 1273 I 1 IO_PAD505
+bit 1272 O 1 IO_PAD505 1271 1 Z
+bit 1271 C 1 *
+bit 1270 I 1 IO_PAD503
+bit 1269 O 1 IO_PAD503 1268 1 Z
+bit 1268 C 1 *
+bit 1267 I 1 IO_PAD501
+bit 1266 O 1 IO_PAD501 1265 1 Z
+bit 1265 C 1 *
+bit 1264 I 1 IO_PAD499
+bit 1263 O 1 IO_PAD499 1262 1 Z
+bit 1262 C 1 *
+bit 1261 I 1 IO_PAD498
+bit 1260 O 1 IO_PAD498 1259 1 Z
+bit 1259 C 1 *
+bit 1258 I 1 IO_PAD497
+bit 1257 O 1 IO_PAD497 1256 1 Z
+bit 1256 C 1 *
+bit 1255 I 1 IO_PAD496
+bit 1254 O 1 IO_PAD496 1253 1 Z
+bit 1253 C 1 *
+bit 1252 I 1 IO_PAD495
+bit 1251 O 1 IO_PAD495 1250 1 Z
+bit 1250 C 1 *
+bit 1249 I 1 IO_PAD493
+bit 1248 O 1 IO_PAD493 1247 1 Z
+bit 1247 C 1 *
+bit 1246 I 1 IO_PAD491
+bit 1245 O 1 IO_PAD491 1244 1 Z
+bit 1244 C 1 *
+bit 1243 I 1 IO_PAD490
+bit 1242 O 1 IO_PAD490 1241 1 Z
+bit 1241 C 1 *
+bit 1240 I 1 IO_PAD489
+bit 1239 O 1 IO_PAD489 1238 1 Z
+bit 1238 C 1 *
+bit 1237 I 1 IO_PAD487
+bit 1236 O 1 IO_PAD487 1235 1 Z
+bit 1235 C 1 *
+bit 1234 I 1 IO_PAD486
+bit 1233 O 1 IO_PAD486 1232 1 Z
+bit 1232 C 1 *
+bit 1231 I 1 IO_PAD485
+bit 1230 O 1 IO_PAD485 1229 1 Z
+bit 1229 C 1 *
+bit 1228 I 1 IO_PAD483
+bit 1227 O 1 IO_PAD483 1226 1 Z
+bit 1226 C 1 *
+bit 1225 I 1 IO_PAD482
+bit 1224 O 1 IO_PAD482 1223 1 Z
+bit 1223 C 1 *
+bit 1222 I 1 IO_PAD481
+bit 1221 O 1 IO_PAD481 1220 1 Z
+bit 1220 C 1 *
+bit 1219 I 1 IO_PAD479
+bit 1218 O 1 IO_PAD479 1217 1 Z
+bit 1217 C 1 *
+bit 1216 I 1 IO_PAD477
+bit 1215 O 1 IO_PAD477 1214 1 Z
+bit 1214 C 1 *
+bit 1213 I 1 IO_PAD475
+bit 1212 O 1 IO_PAD475 1211 1 Z
+bit 1211 C 1 *
+bit 1210 I 1 IO_PAD473
+bit 1209 O 1 IO_PAD473 1208 1 Z
+bit 1208 C 1 *
+bit 1207 I 1 IO_PAD472
+bit 1206 O 1 IO_PAD472 1205 1 Z
+bit 1205 C 1 *
+bit 1204 I 1 IO_PAD471
+bit 1203 O 1 IO_PAD471 1202 1 Z
+bit 1202 C 1 *
+bit 1201 I 1 IO_PAD470
+bit 1200 O 1 IO_PAD470 1199 1 Z
+bit 1199 C 1 *
+bit 1198 I 1 IO_PAD469
+bit 1197 O 1 IO_PAD469 1196 1 Z
+bit 1196 C 1 *
+bit 1195 I 1 IO_PAD467
+bit 1194 O 1 IO_PAD467 1193 1 Z
+bit 1193 C 1 *
+bit 1192 I 1 IO_PAD466
+bit 1191 O 1 IO_PAD466 1190 1 Z
+bit 1190 C 1 *
+bit 1189 I 1 IO_PAD465
+bit 1188 O 1 IO_PAD465 1187 1 Z
+bit 1187 C 1 *
+bit 1186 I 1 IO_PAD464
+bit 1185 O 1 IO_PAD464 1184 1 Z
+bit 1184 C 1 *
+bit 1183 I 1 IO_PAD463
+bit 1182 O 1 IO_PAD463 1181 1 Z
+bit 1181 C 1 *
+bit 1180 I 1 IO_PAD462
+bit 1179 O 1 IO_PAD462 1178 1 Z
+bit 1178 C 1 *
+bit 1177 I 1 IO_PAD461
+bit 1176 O 1 IO_PAD461 1175 1 Z
+bit 1175 C 1 *
+bit 1174 I 1 CCLK_PAD458
+bit 1173 O 1 CCLK_PAD458 1172 1 Z
+bit 1172 C 1 *
+bit 1171 I 1 DONE_PAD457
+bit 1170 O 1 DONE_PAD457 1169 1 Z
+bit 1169 C 1 *
+bit 1168 I 1 IO_PAD456
+bit 1167 O 1 IO_PAD456 1166 1 Z
+bit 1166 C 1 *
+bit 1165 I 1 IO_PAD455
+bit 1164 O 1 IO_PAD455 1163 1 Z
+bit 1163 C 1 *
+bit 1162 I 1 IO_PAD454
+bit 1161 O 1 IO_PAD454 1160 1 Z
+bit 1160 C 1 *
+bit 1159 I 1 IO_PAD451
+bit 1158 O 1 IO_PAD451 1157 1 Z
+bit 1157 C 1 *
+bit 1156 I 1 IO_PAD450
+bit 1155 O 1 IO_PAD450 1154 1 Z
+bit 1154 C 1 *
+bit 1153 I 1 IO_PAD448
+bit 1152 O 1 IO_PAD448 1151 1 Z
+bit 1151 C 1 *
+bit 1150 I 1 IO_PAD447
+bit 1149 O 1 IO_PAD447 1148 1 Z
+bit 1148 C 1 *
+bit 1147 I 1 IO_PAD446
+bit 1146 O 1 IO_PAD446 1145 1 Z
+bit 1145 C 1 *
+bit 1144 I 1 IO_PAD445
+bit 1143 O 1 IO_PAD445 1142 1 Z
+bit 1142 C 1 *
+bit 1141 I 1 IO_PAD444
+bit 1140 O 1 IO_PAD444 1139 1 Z
+bit 1139 C 1 *
+bit 1138 I 1 IO_PAD442
+bit 1137 O 1 IO_PAD442 1136 1 Z
+bit 1136 C 1 *
+bit 1135 I 1 IO_PAD440
+bit 1134 O 1 IO_PAD440 1133 1 Z
+bit 1133 C 1 *
+bit 1132 I 1 IO_PAD439
+bit 1131 O 1 IO_PAD439 1130 1 Z
+bit 1130 C 1 *
+bit 1129 I 1 IO_PAD438
+bit 1128 O 1 IO_PAD438 1127 1 Z
+bit 1127 C 1 *
+bit 1126 I 1 IO_PAD437
+bit 1125 O 1 IO_PAD437 1124 1 Z
+bit 1124 C 1 *
+bit 1123 I 1 IO_PAD436
+bit 1122 O 1 IO_PAD436 1121 1 Z
+bit 1121 C 1 *
+bit 1120 I 1 IO_PAD434
+bit 1119 O 1 IO_PAD434 1118 1 Z
+bit 1118 C 1 *
+bit 1117 I 1 IO_PAD432
+bit 1116 O 1 IO_PAD432 1115 1 Z
+bit 1115 C 1 *
+bit 1114 I 1 IO_PAD430
+bit 1113 O 1 IO_PAD430 1112 1 Z
+bit 1112 C 1 *
+bit 1111 I 1 IO_PAD428
+bit 1110 O 1 IO_PAD428 1109 1 Z
+bit 1109 C 1 *
+bit 1108 I 1 IO_PAD427
+bit 1107 O 1 IO_PAD427 1106 1 Z
+bit 1106 C 1 *
+bit 1105 I 1 IO_PAD426
+bit 1104 O 1 IO_PAD426 1103 1 Z
+bit 1103 C 1 *
+bit 1102 I 1 IO_PAD424
+bit 1101 O 1 IO_PAD424 1100 1 Z
+bit 1100 C 1 *
+bit 1099 I 1 IO_PAD423
+bit 1098 O 1 IO_PAD423 1097 1 Z
+bit 1097 C 1 *
+bit 1096 I 1 IO_PAD422
+bit 1095 O 1 IO_PAD422 1094 1 Z
+bit 1094 C 1 *
+bit 1093 I 1 IO_PAD420
+bit 1092 O 1 IO_PAD420 1091 1 Z
+bit 1091 C 1 *
+bit 1090 I 1 IO_PAD419
+bit 1089 O 1 IO_PAD419 1088 1 Z
+bit 1088 C 1 *
+bit 1087 I 1 IO_PAD418
+bit 1086 O 1 IO_PAD418 1085 1 Z
+bit 1085 C 1 *
+bit 1084 I 1 IO_PAD416
+bit 1083 O 1 IO_PAD416 1082 1 Z
+bit 1082 C 1 *
+bit 1081 I 1 IO_PAD414
+bit 1080 O 1 IO_PAD414 1079 1 Z
+bit 1079 C 1 *
+bit 1078 I 1 IO_PAD413
+bit 1077 O 1 IO_PAD413 1076 1 Z
+bit 1076 C 1 *
+bit 1075 I 1 IO_PAD412
+bit 1074 O 1 IO_PAD412 1073 1 Z
+bit 1073 C 1 *
+bit 1072 I 1 IO_PAD411
+bit 1071 O 1 IO_PAD411 1070 1 Z
+bit 1070 C 1 *
+bit 1069 I 1 IO_PAD410
+bit 1068 O 1 IO_PAD410 1067 1 Z
+bit 1067 C 1 *
+bit 1066 I 1 IO_PAD408
+bit 1065 O 1 IO_PAD408 1064 1 Z
+bit 1064 C 1 *
+bit 1063 I 1 IO_PAD406
+bit 1062 O 1 IO_PAD406 1061 1 Z
+bit 1061 C 1 *
+bit 1060 I 1 IO_PAD404
+bit 1059 O 1 IO_PAD404 1058 1 Z
+bit 1058 C 1 *
+bit 1057 I 1 IO_PAD402
+bit 1056 O 1 IO_PAD402 1055 1 Z
+bit 1055 C 1 *
+bit 1054 I 1 IO_PAD400
+bit 1053 O 1 IO_PAD400 1052 1 Z
+bit 1052 C 1 *
+bit 1051 I 1 IO_PAD398
+bit 1050 O 1 IO_PAD398 1049 1 Z
+bit 1049 C 1 *
+bit 1048 I 1 IO_PAD397
+bit 1047 O 1 IO_PAD397 1046 1 Z
+bit 1046 C 1 *
+bit 1045 I 1 IO_PAD396
+bit 1044 O 1 IO_PAD396 1043 1 Z
+bit 1043 C 1 *
+bit 1042 I 1 IO_PAD395
+bit 1041 O 1 IO_PAD395 1040 1 Z
+bit 1040 C 1 *
+bit 1039 I 1 IO_PAD394
+bit 1038 O 1 IO_PAD394 1037 1 Z
+bit 1037 C 1 *
+bit 1036 I 1 IO_PAD393
+bit 1035 O 1 IO_PAD393 1034 1 Z
+bit 1034 C 1 *
+bit 1033 I 1 IO_PAD392
+bit 1032 O 1 IO_PAD392 1031 1 Z
+bit 1031 C 1 *
+bit 1030 I 1 IO_PAD390
+bit 1029 O 1 IO_PAD390 1028 1 Z
+bit 1028 C 1 *
+bit 1027 I 1 IO_PAD388
+bit 1026 O 1 IO_PAD388 1025 1 Z
+bit 1025 C 1 *
+bit 1024 I 1 IO_PAD387
+bit 1023 O 1 IO_PAD387 1022 1 Z
+bit 1022 C 1 *
+bit 1021 I 1 IO_PAD386
+bit 1020 O 1 IO_PAD386 1019 1 Z
+bit 1019 C 1 *
+bit 1018 I 1 IO_PAD385
+bit 1017 O 1 IO_PAD385 1016 1 Z
+bit 1016 C 1 *
+bit 1015 I 1 IO_PAD384
+bit 1014 O 1 IO_PAD384 1013 1 Z
+bit 1013 C 1 *
+bit 1012 I 1 IO_PAD382
+bit 1011 O 1 IO_PAD382 1010 1 Z
+bit 1010 C 1 *
+bit 1009 I 1 IO_PAD380
+bit 1008 O 1 IO_PAD380 1007 1 Z
+bit 1007 C 1 *
+bit 1006 I 1 IO_PAD378
+bit 1005 O 1 IO_PAD378 1004 1 Z
+bit 1004 C 1 *
+bit 1003 I 1 IO_PAD376
+bit 1002 O 1 IO_PAD376 1001 1 Z
+bit 1001 C 1 *
+bit 1000 I 1 IO_PAD375
+bit 999 O 1 IO_PAD375 998 1 Z
+bit 998 C 1 *
+bit 997 I 1 IO_PAD374
+bit 996 O 1 IO_PAD374 995 1 Z
+bit 995 C 1 *
+bit 994 I 1 IO_PAD372
+bit 993 O 1 IO_PAD372 992 1 Z
+bit 992 C 1 *
+bit 991 I 1 IO_PAD371
+bit 990 O 1 IO_PAD371 989 1 Z
+bit 989 C 1 *
+bit 988 I 1 IO_PAD370
+bit 987 O 1 IO_PAD370 986 1 Z
+bit 986 C 1 *
+bit 985 I 1 IO_PAD368
+bit 984 O 1 IO_PAD368 983 1 Z
+bit 983 C 1 *
+bit 982 I 1 IO_PAD366
+bit 981 O 1 IO_PAD366 980 1 Z
+bit 980 C 1 *
+bit 979 I 1 IO_PAD365
+bit 978 O 1 IO_PAD365 977 1 Z
+bit 977 C 1 *
+bit 976 I 1 IO_PAD364
+bit 975 O 1 IO_PAD364 974 1 Z
+bit 974 C 1 *
+bit 973 I 1 IO_PAD362
+bit 972 O 1 IO_PAD362 971 1 Z
+bit 971 C 1 *
+bit 970 I 1 IO_PAD361
+bit 969 O 1 IO_PAD361 968 1 Z
+bit 968 C 1 *
+bit 967 I 1 IO_PAD360
+bit 966 O 1 IO_PAD360 965 1 Z
+bit 965 C 1 *
+bit 964 I 1 IO_PAD358
+bit 963 O 1 IO_PAD358 962 1 Z
+bit 962 C 1 *
+bit 961 I 1 IO_PAD356
+bit 960 O 1 IO_PAD356 959 1 Z
+bit 959 C 1 *
+bit 958 I 1 IO_PAD355
+bit 957 O 1 IO_PAD355 956 1 Z
+bit 956 C 1 *
+bit 955 I 1 IO_PAD354
+bit 954 O 1 IO_PAD354 953 1 Z
+bit 953 C 1 *
+bit 952 I 1 IO_PAD352
+bit 951 O 1 IO_PAD352 950 1 Z
+bit 950 C 1 *
+bit 949 I 1 IO_PAD351
+bit 948 O 1 IO_PAD351 947 1 Z
+bit 947 C 1 *
+bit 946 I 1 IO_PAD350
+bit 945 O 1 IO_PAD350 944 1 Z
+bit 944 C 1 *
+bit 943 I 1 IO_PAD348
+bit 942 O 1 IO_PAD348 941 1 Z
+bit 941 C 1 *
+bit 940 I 1 IO_PAD346
+bit 939 O 1 IO_PAD346 938 1 Z
+bit 938 C 1 *
+bit 937 I 1 IO_PAD344
+bit 936 O 1 IO_PAD344 935 1 Z
+bit 935 C 1 *
+bit 934 I 1 IO_PAD342
+bit 933 O 1 IO_PAD342 932 1 Z
+bit 932 C 1 *
+bit 931 I 1 IO_PAD341
+bit 930 O 1 IO_PAD341 929 1 Z
+bit 929 C 1 *
+bit 928 I 1 IO_PAD340
+bit 927 O 1 IO_PAD340 926 1 Z
+bit 926 C 1 *
+bit 925 I 1 IO_PAD339
+bit 924 O 1 IO_PAD339 923 1 Z
+bit 923 C 1 *
+bit 922 I 1 IO_PAD338
+bit 921 O 1 IO_PAD338 920 1 Z
+bit 920 C 1 *
+bit 919 I 1 IO_PAD336
+bit 918 O 1 IO_PAD336 917 1 Z
+bit 917 C 1 *
+bit 916 I 1 IO_PAD334
+bit 915 O 1 IO_PAD334 914 1 Z
+bit 914 C 1 *
+bit 913 I 1 IO_PAD333
+bit 912 O 1 IO_PAD333 911 1 Z
+bit 911 C 1 *
+bit 910 I 1 IO_PAD332
+bit 909 O 1 IO_PAD332 908 1 Z
+bit 908 C 1 *
+bit 907 I 1 IO_PAD331
+bit 906 O 1 IO_PAD331 905 1 Z
+bit 905 C 1 *
+bit 904 I 1 IO_PAD330
+bit 903 O 1 IO_PAD330 902 1 Z
+bit 902 C 1 *
+bit 901 I 1 IO_PAD329
+bit 900 O 1 IO_PAD329 899 1 Z
+bit 899 C 1 *
+bit 898 I 1 IO_PAD328
+bit 897 O 1 IO_PAD328 896 1 Z
+bit 896 C 1 *
+bit 895 I 1 IO_PAD326
+bit 894 O 1 IO_PAD326 893 1 Z
+bit 893 C 1 *
+bit 892 I 1 IO_PAD324
+bit 891 O 1 IO_PAD324 890 1 Z
+bit 890 C 1 *
+bit 889 I 1 IO_PAD322
+bit 888 O 1 IO_PAD322 887 1 Z
+bit 887 C 1 *
+bit 886 I 1 IO_PAD320
+bit 885 O 1 IO_PAD320 884 1 Z
+bit 884 C 1 *
+bit 883 I 1 IO_PAD318
+bit 882 O 1 IO_PAD318 881 1 Z
+bit 881 C 1 *
+bit 880 I 1 IO_PAD316
+bit 879 O 1 IO_PAD316 878 1 Z
+bit 878 C 1 *
+bit 877 I 1 IO_PAD315
+bit 876 O 1 IO_PAD315 875 1 Z
+bit 875 C 1 *
+bit 874 I 1 IO_PAD314
+bit 873 O 1 IO_PAD314 872 1 Z
+bit 872 C 1 *
+bit 871 I 1 IO_PAD313
+bit 870 O 1 IO_PAD313 869 1 Z
+bit 869 C 1 *
+bit 868 I 1 IO_PAD312
+bit 867 O 1 IO_PAD312 866 1 Z
+bit 866 C 1 *
+bit 865 I 1 IO_PAD310
+bit 864 O 1 IO_PAD310 863 1 Z
+bit 863 C 1 *
+bit 862 I 1 IO_PAD308
+bit 861 O 1 IO_PAD308 860 1 Z
+bit 860 C 1 *
+bit 859 I 1 IO_PAD307
+bit 858 O 1 IO_PAD307 857 1 Z
+bit 857 C 1 *
+bit 856 I 1 IO_PAD306
+bit 855 O 1 IO_PAD306 854 1 Z
+bit 854 C 1 *
+bit 853 I 1 IO_PAD304
+bit 852 O 1 IO_PAD304 851 1 Z
+bit 851 C 1 *
+bit 850 I 1 IO_PAD303
+bit 849 O 1 IO_PAD303 848 1 Z
+bit 848 C 1 *
+bit 847 I 1 IO_PAD302
+bit 846 O 1 IO_PAD302 845 1 Z
+bit 845 C 1 *
+bit 844 I 1 IO_PAD300
+bit 843 O 1 IO_PAD300 842 1 Z
+bit 842 C 1 *
+bit 841 I 1 IO_PAD299
+bit 840 O 1 IO_PAD299 839 1 Z
+bit 839 C 1 *
+bit 838 I 1 IO_PAD298
+bit 837 O 1 IO_PAD298 836 1 Z
+bit 836 C 1 *
+bit 835 I 1 IO_PAD296
+bit 834 O 1 IO_PAD296 833 1 Z
+bit 833 C 1 *
+bit 832 I 1 IO_PAD294
+bit 831 O 1 IO_PAD294 830 1 Z
+bit 830 C 1 *
+bit 829 I 1 IO_PAD292
+bit 828 O 1 IO_PAD292 827 1 Z
+bit 827 C 1 *
+bit 826 I 1 IO_PAD290
+bit 825 O 1 IO_PAD290 824 1 Z
+bit 824 C 1 *
+bit 823 I 1 IO_PAD289
+bit 822 O 1 IO_PAD289 821 1 Z
+bit 821 C 1 *
+bit 820 I 1 IO_PAD288
+bit 819 O 1 IO_PAD288 818 1 Z
+bit 818 C 1 *
+bit 817 I 1 IO_PAD287
+bit 816 O 1 IO_PAD287 815 1 Z
+bit 815 C 1 *
+bit 814 I 1 IO_PAD286
+bit 813 O 1 IO_PAD286 812 1 Z
+bit 812 C 1 *
+bit 811 I 1 IO_PAD284
+bit 810 O 1 IO_PAD284 809 1 Z
+bit 809 C 1 *
+bit 808 I 1 IO_PAD282
+bit 807 O 1 IO_PAD282 806 1 Z
+bit 806 C 1 *
+bit 805 I 1 IO_PAD281
+bit 804 O 1 IO_PAD281 803 1 Z
+bit 803 C 1 *
+bit 802 I 1 IO_PAD280
+bit 801 O 1 IO_PAD280 800 1 Z
+bit 800 C 1 *
+bit 799 I 1 IO_PAD279
+bit 798 O 1 IO_PAD279 797 1 Z
+bit 797 C 1 *
+bit 796 I 1 IO_PAD278
+bit 795 O 1 IO_PAD278 794 1 Z
+bit 794 C 1 *
+bit 793 I 1 IO_PAD276
+bit 792 O 1 IO_PAD276 791 1 Z
+bit 791 C 1 *
+bit 790 I 1 IO_PAD275
+bit 789 O 1 IO_PAD275 788 1 Z
+bit 788 C 1 *
+bit 787 I 1 IO_PAD274
+bit 786 O 1 IO_PAD274 785 1 Z
+bit 785 C 1 *
+bit 784 I 1 IO_PAD270
+bit 783 O 1 IO_PAD270 782 1 Z
+bit 782 C 1 *
+bit 781 I 1 IO_PAD269
+bit 780 O 1 IO_PAD269 779 1 Z
+bit 779 C 1 *
+bit 778 I 1 M2_PAD268
+bit 777 I 1 M0_PAD267
+bit 776 I 1 M1_PAD266
+bit 775 I 1 IO_PAD264
+bit 774 O 1 IO_PAD264 773 1 Z
+bit 773 C 1 *
+bit 772 I 1 IO_PAD263
+bit 771 O 1 IO_PAD263 770 1 Z
+bit 770 C 1 *
+bit 769 I 1 IO_PAD262
+bit 768 O 1 IO_PAD262 767 1 Z
+bit 767 C 1 *
+bit 766 I 1 IO_PAD261
+bit 765 O 1 IO_PAD261 764 1 Z
+bit 764 C 1 *
+bit 763 I 1 IO_PAD260
+bit 762 O 1 IO_PAD260 761 1 Z
+bit 761 C 1 *
+bit 760 I 1 IO_PAD259
+bit 759 O 1 IO_PAD259 758 1 Z
+bit 758 C 1 *
+bit 757 I 1 IO_PAD258
+bit 756 O 1 IO_PAD258 755 1 Z
+bit 755 C 1 *
+bit 754 I 1 IO_PAD256
+bit 753 O 1 IO_PAD256 752 1 Z
+bit 752 C 1 *
+bit 751 I 1 IO_PAD255
+bit 750 O 1 IO_PAD255 749 1 Z
+bit 749 C 1 *
+bit 748 I 1 IO_PAD254
+bit 747 O 1 IO_PAD254 746 1 Z
+bit 746 C 1 *
+bit 745 I 1 IO_PAD253
+bit 744 O 1 IO_PAD253 743 1 Z
+bit 743 C 1 *
+bit 742 I 1 IO_PAD252
+bit 741 O 1 IO_PAD252 740 1 Z
+bit 740 C 1 *
+bit 739 I 1 IO_PAD250
+bit 738 O 1 IO_PAD250 737 1 Z
+bit 737 C 1 *
+bit 736 I 1 IO_PAD248
+bit 735 O 1 IO_PAD248 734 1 Z
+bit 734 C 1 *
+bit 733 I 1 IO_PAD246
+bit 732 O 1 IO_PAD246 731 1 Z
+bit 731 C 1 *
+bit 730 I 1 IO_PAD244
+bit 729 O 1 IO_PAD244 728 1 Z
+bit 728 C 1 *
+bit 727 I 1 IO_PAD243
+bit 726 O 1 IO_PAD243 725 1 Z
+bit 725 C 1 *
+bit 724 I 1 IO_PAD242
+bit 723 O 1 IO_PAD242 722 1 Z
+bit 722 C 1 *
+bit 721 I 1 IO_PAD240
+bit 720 O 1 IO_PAD240 719 1 Z
+bit 719 C 1 *
+bit 718 I 1 IO_PAD239
+bit 717 O 1 IO_PAD239 716 1 Z
+bit 716 C 1 *
+bit 715 I 1 IO_PAD238
+bit 714 O 1 IO_PAD238 713 1 Z
+bit 713 C 1 *
+bit 712 I 1 IO_PAD236
+bit 711 O 1 IO_PAD236 710 1 Z
+bit 710 C 1 *
+bit 709 I 1 IO_PAD235
+bit 708 O 1 IO_PAD235 707 1 Z
+bit 707 C 1 *
+bit 706 I 1 IO_PAD234
+bit 705 O 1 IO_PAD234 704 1 Z
+bit 704 C 1 *
+bit 703 I 1 IO_PAD232
+bit 702 O 1 IO_PAD232 701 1 Z
+bit 701 C 1 *
+bit 700 I 1 IO_PAD230
+bit 699 O 1 IO_PAD230 698 1 Z
+bit 698 C 1 *
+bit 697 I 1 IO_PAD229
+bit 696 O 1 IO_PAD229 695 1 Z
+bit 695 C 1 *
+bit 694 I 1 IO_PAD228
+bit 693 O 1 IO_PAD228 692 1 Z
+bit 692 C 1 *
+bit 691 I 1 IO_PAD227
+bit 690 O 1 IO_PAD227 689 1 Z
+bit 689 C 1 *
+bit 688 I 1 IO_PAD226
+bit 687 O 1 IO_PAD226 686 1 Z
+bit 686 C 1 *
+bit 685 I 1 IO_PAD224
+bit 684 O 1 IO_PAD224 683 1 Z
+bit 683 C 1 *
+bit 682 I 1 IO_PAD222
+bit 681 O 1 IO_PAD222 680 1 Z
+bit 680 C 1 *
+bit 679 I 1 IO_PAD220
+bit 678 O 1 IO_PAD220 677 1 Z
+bit 677 C 1 *
+bit 676 I 1 IO_PAD218
+bit 675 O 1 IO_PAD218 674 1 Z
+bit 674 C 1 *
+bit 673 I 1 IO_PAD217
+bit 672 O 1 IO_PAD217 671 1 Z
+bit 671 C 1 *
+bit 670 I 1 IO_PAD216
+bit 669 O 1 IO_PAD216 668 1 Z
+bit 668 C 1 *
+bit 667 I 1 IO_PAD214
+bit 666 O 1 IO_PAD214 665 1 Z
+bit 665 C 1 *
+bit 664 I 1 IO_PAD212
+bit 663 O 1 IO_PAD212 662 1 Z
+bit 662 C 1 *
+bit 661 I 1 IO_PAD211
+bit 660 O 1 IO_PAD211 659 1 Z
+bit 659 C 1 *
+bit 658 I 1 IO_PAD210
+bit 657 O 1 IO_PAD210 656 1 Z
+bit 656 C 1 *
+bit 655 I 1 IO_PAD209
+bit 654 O 1 IO_PAD209 653 1 Z
+bit 653 C 1 *
+bit 652 I 1 IO_PAD208
+bit 651 O 1 IO_PAD208 650 1 Z
+bit 650 C 1 *
+bit 649 I 1 IO_PAD207
+bit 648 O 1 IO_PAD207 647 1 Z
+bit 647 C 1 *
+bit 646 I 1 IO_PAD206
+bit 645 O 1 IO_PAD206 644 1 Z
+bit 644 C 1 *
+bit 643 O 1 *
+bit 642 O 1 *
+bit 641 O 1 *
+bit 640 O 1 *
+bit 639 O 1 *
+bit 638 O 1 *
+bit 637 I 1 IO_PAD205
+bit 636 O 1 IO_PAD205 635 1 Z
+bit 635 C 1 *
+bit 634 I 1 IO_PAD204
+bit 633 O 1 IO_PAD204 632 1 Z
+bit 632 C 1 *
+bit 631 I 1 IO_PAD203
+bit 630 O 1 IO_PAD203 629 1 Z
+bit 629 C 1 *
+bit 628 I 1 IO_PAD202
+bit 627 O 1 IO_PAD202 626 1 Z
+bit 626 C 1 *
+bit 625 I 1 IO_PAD201
+bit 624 O 1 IO_PAD201 623 1 Z
+bit 623 C 1 *
+bit 622 I 1 IO_PAD200
+bit 621 O 1 IO_PAD200 620 1 Z
+bit 620 C 1 *
+bit 619 I 1 IO_PAD198
+bit 618 O 1 IO_PAD198 617 1 Z
+bit 617 C 1 *
+bit 616 I 1 IO_PAD196
+bit 615 O 1 IO_PAD196 614 1 Z
+bit 614 C 1 *
+bit 613 I 1 IO_PAD194
+bit 612 O 1 IO_PAD194 611 1 Z
+bit 611 C 1 *
+bit 610 I 1 IO_PAD192
+bit 609 O 1 IO_PAD192 608 1 Z
+bit 608 C 1 *
+bit 607 O 1 *
+bit 606 O 1 *
+bit 605 O 1 *
+bit 604 O 1 *
+bit 603 O 1 *
+bit 602 O 1 *
+bit 601 I 1 IO_PAD190
+bit 600 O 1 IO_PAD190 599 1 Z
+bit 599 C 1 *
+bit 598 I 1 IO_PAD189
+bit 597 O 1 IO_PAD189 596 1 Z
+bit 596 C 1 *
+bit 595 I 1 IO_PAD188
+bit 594 O 1 IO_PAD188 593 1 Z
+bit 593 C 1 *
+bit 592 I 1 IO_PAD186
+bit 591 O 1 IO_PAD186 590 1 Z
+bit 590 C 1 *
+bit 589 I 1 IO_PAD184
+bit 588 O 1 IO_PAD184 587 1 Z
+bit 587 C 1 *
+bit 586 I 1 IO_PAD183
+bit 585 O 1 IO_PAD183 584 1 Z
+bit 584 C 1 *
+bit 583 I 1 IO_PAD181
+bit 582 O 1 IO_PAD181 581 1 Z
+bit 581 C 1 *
+bit 580 I 1 IO_PAD180
+bit 579 O 1 IO_PAD180 578 1 Z
+bit 578 C 1 *
+bit 577 I 1 IO_PAD178
+bit 576 O 1 IO_PAD178 575 1 Z
+bit 575 C 1 *
+bit 574 I 1 IO_PAD176
+bit 573 O 1 IO_PAD176 572 1 Z
+bit 572 C 1 *
+bit 571 I 1 IO_PAD175
+bit 570 O 1 IO_PAD175 569 1 Z
+bit 569 C 1 *
+bit 568 I 1 IO_PAD174
+bit 567 O 1 IO_PAD174 566 1 Z
+bit 566 C 1 *
+bit 565 O 1 *
+bit 564 O 1 *
+bit 563 O 1 *
+bit 562 O 1 *
+bit 561 O 1 *
+bit 560 O 1 *
+bit 559 I 1 IO_PAD172
+bit 558 O 1 IO_PAD172 557 1 Z
+bit 557 C 1 *
+bit 556 I 1 IO_PAD170
+bit 555 O 1 IO_PAD170 554 1 Z
+bit 554 C 1 *
+bit 553 I 1 IO_PAD168
+bit 552 O 1 IO_PAD168 551 1 Z
+bit 551 C 1 *
+bit 550 I 1 IO_PAD166
+bit 549 O 1 IO_PAD166 548 1 Z
+bit 548 C 1 *
+bit 547 I 1 IO_PAD164
+bit 546 O 1 IO_PAD164 545 1 Z
+bit 545 C 1 *
+bit 544 I 1 IO_PAD163
+bit 543 O 1 IO_PAD163 542 1 Z
+bit 542 C 1 *
+bit 541 I 1 IO_PAD162
+bit 540 O 1 IO_PAD162 539 1 Z
+bit 539 C 1 *
+bit 538 I 1 IO_PAD161
+bit 537 O 1 IO_PAD161 536 1 Z
+bit 536 C 1 *
+bit 535 I 1 IO_PAD160
+bit 534 O 1 IO_PAD160 533 1 Z
+bit 533 C 1 *
+bit 532 I 1 IO_PAD159
+bit 531 O 1 IO_PAD159 530 1 Z
+bit 530 C 1 *
+bit 529 O 1 *
+bit 528 O 1 *
+bit 527 O 1 *
+bit 526 O 1 *
+bit 525 O 1 *
+bit 524 O 1 *
+bit 523 I 1 IO_PAD158
+bit 522 O 1 IO_PAD158 521 1 Z
+bit 521 C 1 *
+bit 520 I 1 IO_PAD157
+bit 519 O 1 IO_PAD157 518 1 Z
+bit 518 C 1 *
+bit 517 I 1 IO_PAD156
+bit 516 O 1 IO_PAD156 515 1 Z
+bit 515 C 1 *
+bit 514 I 1 IO_PAD155
+bit 513 O 1 IO_PAD155 512 1 Z
+bit 512 C 1 *
+bit 511 I 1 IO_PAD154
+bit 510 O 1 IO_PAD154 509 1 Z
+bit 509 C 1 *
+bit 508 I 1 IO_PAD153
+bit 507 O 1 IO_PAD153 506 1 Z
+bit 506 C 1 *
+bit 505 I 1 IO_PAD152
+bit 504 O 1 IO_PAD152 503 1 Z
+bit 503 C 1 *
+bit 502 I 1 IO_PAD150
+bit 501 O 1 IO_PAD150 500 1 Z
+bit 500 C 1 *
+bit 499 I 1 IO_PAD148
+bit 498 O 1 IO_PAD148 497 1 Z
+bit 497 C 1 *
+bit 496 I 1 IO_PAD147
+bit 495 O 1 IO_PAD147 494 1 Z
+bit 494 C 1 *
+bit 493 I 1 IO_PAD146
+bit 492 O 1 IO_PAD146 491 1 Z
+bit 491 C 1 *
+bit 490 I 1 IO_PAD144
+bit 489 O 1 IO_PAD144 488 1 Z
+bit 488 C 1 *
+bit 487 I 1 IO_PAD142
+bit 486 O 1 IO_PAD142 485 1 Z
+bit 485 C 1 *
+bit 484 I 1 IO_PAD140
+bit 483 O 1 IO_PAD140 482 1 Z
+bit 482 C 1 *
+bit 481 I 1 IO_PAD138
+bit 480 O 1 IO_PAD138 479 1 Z
+bit 479 C 1 *
+bit 478 I 1 IO_PAD137
+bit 477 O 1 IO_PAD137 476 1 Z
+bit 476 C 1 *
+bit 475 I 1 IO_PAD136
+bit 474 O 1 IO_PAD136 473 1 Z
+bit 473 C 1 *
+bit 472 I 1 IO_PAD135
+bit 471 O 1 IO_PAD135 470 1 Z
+bit 470 C 1 *
+bit 469 I 1 IO_PAD134
+bit 468 O 1 IO_PAD134 467 1 Z
+bit 467 C 1 *
+bit 466 I 1 IO_PAD132
+bit 465 O 1 IO_PAD132 464 1 Z
+bit 464 C 1 *
+bit 463 I 1 IO_PAD130
+bit 462 O 1 IO_PAD130 461 1 Z
+bit 461 C 1 *
+bit 460 I 1 IO_PAD129
+bit 459 O 1 IO_PAD129 458 1 Z
+bit 458 C 1 *
+bit 457 I 1 IO_PAD128
+bit 456 O 1 IO_PAD128 455 1 Z
+bit 455 C 1 *
+bit 454 I 1 IO_PAD126
+bit 453 O 1 IO_PAD126 452 1 Z
+bit 452 C 1 *
+bit 451 I 1 IO_PAD125
+bit 450 O 1 IO_PAD125 449 1 Z
+bit 449 C 1 *
+bit 448 I 1 IO_PAD124
+bit 447 O 1 IO_PAD124 446 1 Z
+bit 446 C 1 *
+bit 445 I 1 IO_PAD122
+bit 444 O 1 IO_PAD122 443 1 Z
+bit 443 C 1 *
+bit 442 I 1 IO_PAD121
+bit 441 O 1 IO_PAD121 440 1 Z
+bit 440 C 1 *
+bit 439 I 1 IO_PAD120
+bit 438 O 1 IO_PAD120 437 1 Z
+bit 437 C 1 *
+bit 436 I 1 IO_PAD118
+bit 435 O 1 IO_PAD118 434 1 Z
+bit 434 C 1 *
+bit 433 I 1 IO_PAD116
+bit 432 O 1 IO_PAD116 431 1 Z
+bit 431 C 1 *
+bit 430 I 1 IO_PAD114
+bit 429 O 1 IO_PAD114 428 1 Z
+bit 428 C 1 *
+bit 427 I 1 IO_PAD112
+bit 426 O 1 IO_PAD112 425 1 Z
+bit 425 C 1 *
+bit 424 I 1 IO_PAD111
+bit 423 O 1 IO_PAD111 422 1 Z
+bit 422 C 1 *
+bit 421 I 1 IO_PAD110
+bit 420 O 1 IO_PAD110 419 1 Z
+bit 419 C 1 *
+bit 418 I 1 IO_PAD109
+bit 417 O 1 IO_PAD109 416 1 Z
+bit 416 C 1 *
+bit 415 I 1 IO_PAD108
+bit 414 O 1 IO_PAD108 413 1 Z
+bit 413 C 1 *
+bit 412 I 1 IO_PAD106
+bit 411 O 1 IO_PAD106 410 1 Z
+bit 410 C 1 *
+bit 409 I 1 IO_PAD105
+bit 408 O 1 IO_PAD105 407 1 Z
+bit 407 C 1 *
+bit 406 I 1 IO_PAD104
+bit 405 O 1 IO_PAD104 404 1 Z
+bit 404 C 1 *
+bit 403 I 1 IO_PAD103
+bit 402 O 1 IO_PAD103 401 1 Z
+bit 401 C 1 *
+bit 400 I 1 IO_PAD102
+bit 399 O 1 IO_PAD102 398 1 Z
+bit 398 C 1 *
+bit 397 I 1 IO_PAD101
+bit 396 O 1 IO_PAD101 395 1 Z
+bit 395 C 1 *
+bit 394 I 1 IO_PAD100
+bit 393 O 1 IO_PAD100 392 1 Z
+bit 392 C 1 *
+bit 391 O 1 *
+bit 390 I 1 HSWAP_EN_PAD96
+bit 389 I 1 IO_PAD95
+bit 388 O 1 IO_PAD95 387 1 Z
+bit 387 C 1 *
+bit 386 I 1 IO_PAD94
+bit 385 O 1 IO_PAD94 384 1 Z
+bit 384 C 1 *
+bit 383 I 1 IO_PAD93
+bit 382 O 1 IO_PAD93 381 1 Z
+bit 381 C 1 *
+bit 380 I 1 IO_PAD89
+bit 379 O 1 IO_PAD89 378 1 Z
+bit 378 C 1 *
+bit 377 I 1 IO_PAD88
+bit 376 O 1 IO_PAD88 375 1 Z
+bit 375 C 1 *
+bit 374 I 1 IO_PAD86
+bit 373 O 1 IO_PAD86 372 1 Z
+bit 372 C 1 *
+bit 371 I 1 IO_PAD85
+bit 370 O 1 IO_PAD85 369 1 Z
+bit 369 C 1 *
+bit 368 I 1 IO_PAD84
+bit 367 O 1 IO_PAD84 366 1 Z
+bit 366 C 1 *
+bit 365 I 1 IO_PAD83
+bit 364 O 1 IO_PAD83 363 1 Z
+bit 363 C 1 *
+bit 362 I 1 IO_PAD82
+bit 361 O 1 IO_PAD82 360 1 Z
+bit 360 C 1 *
+bit 359 I 1 IO_PAD80
+bit 358 O 1 IO_PAD80 357 1 Z
+bit 357 C 1 *
+bit 356 I 1 IO_PAD78
+bit 355 O 1 IO_PAD78 354 1 Z
+bit 354 C 1 *
+bit 353 I 1 IO_PAD77
+bit 352 O 1 IO_PAD77 351 1 Z
+bit 351 C 1 *
+bit 350 I 1 IO_PAD76
+bit 349 O 1 IO_PAD76 348 1 Z
+bit 348 C 1 *
+bit 347 I 1 IO_PAD75
+bit 346 O 1 IO_PAD75 345 1 Z
+bit 345 C 1 *
+bit 344 I 1 IO_PAD74
+bit 343 O 1 IO_PAD74 342 1 Z
+bit 342 C 1 *
+bit 341 I 1 IO_PAD72
+bit 340 O 1 IO_PAD72 339 1 Z
+bit 339 C 1 *
+bit 338 I 1 IO_PAD70
+bit 337 O 1 IO_PAD70 336 1 Z
+bit 336 C 1 *
+bit 335 I 1 IO_PAD68
+bit 334 O 1 IO_PAD68 333 1 Z
+bit 333 C 1 *
+bit 332 I 1 IO_PAD66
+bit 331 O 1 IO_PAD66 330 1 Z
+bit 330 C 1 *
+bit 329 I 1 IO_PAD65
+bit 328 O 1 IO_PAD65 327 1 Z
+bit 327 C 1 *
+bit 326 I 1 IO_PAD64
+bit 325 O 1 IO_PAD64 324 1 Z
+bit 324 C 1 *
+bit 323 I 1 IO_PAD62
+bit 322 O 1 IO_PAD62 321 1 Z
+bit 321 C 1 *
+bit 320 I 1 IO_PAD61
+bit 319 O 1 IO_PAD61 318 1 Z
+bit 318 C 1 *
+bit 317 I 1 IO_PAD60
+bit 316 O 1 IO_PAD60 315 1 Z
+bit 315 C 1 *
+bit 314 I 1 IO_PAD58
+bit 313 O 1 IO_PAD58 312 1 Z
+bit 312 C 1 *
+bit 311 I 1 IO_PAD57
+bit 310 O 1 IO_PAD57 309 1 Z
+bit 309 C 1 *
+bit 308 I 1 IO_PAD56
+bit 307 O 1 IO_PAD56 306 1 Z
+bit 306 C 1 *
+bit 305 I 1 IO_PAD54
+bit 304 O 1 IO_PAD54 303 1 Z
+bit 303 C 1 *
+bit 302 I 1 IO_PAD52
+bit 301 O 1 IO_PAD52 300 1 Z
+bit 300 C 1 *
+bit 299 I 1 IO_PAD51
+bit 298 O 1 IO_PAD51 297 1 Z
+bit 297 C 1 *
+bit 296 I 1 IO_PAD50
+bit 295 O 1 IO_PAD50 294 1 Z
+bit 294 C 1 *
+bit 293 I 1 IO_PAD49
+bit 292 O 1 IO_PAD49 291 1 Z
+bit 291 C 1 *
+bit 290 I 1 IO_PAD48
+bit 289 O 1 IO_PAD48 288 1 Z
+bit 288 C 1 *
+bit 287 I 1 IO_PAD46
+bit 286 O 1 IO_PAD46 285 1 Z
+bit 285 C 1 *
+bit 284 I 1 IO_PAD44
+bit 283 O 1 IO_PAD44 282 1 Z
+bit 282 C 1 *
+bit 281 I 1 IO_PAD42
+bit 280 O 1 IO_PAD42 279 1 Z
+bit 279 C 1 *
+bit 278 I 1 IO_PAD40
+bit 277 O 1 IO_PAD40 276 1 Z
+bit 276 C 1 *
+bit 275 I 1 IO_PAD38
+bit 274 O 1 IO_PAD38 273 1 Z
+bit 273 C 1 *
+bit 272 I 1 IO_PAD36
+bit 271 O 1 IO_PAD36 270 1 Z
+bit 270 C 1 *
+bit 269 I 1 IO_PAD35
+bit 268 O 1 IO_PAD35 267 1 Z
+bit 267 C 1 *
+bit 266 I 1 IO_PAD34
+bit 265 O 1 IO_PAD34 264 1 Z
+bit 264 C 1 *
+bit 263 I 1 IO_PAD33
+bit 262 O 1 IO_PAD33 261 1 Z
+bit 261 C 1 *
+bit 260 I 1 IO_PAD32
+bit 259 O 1 IO_PAD32 258 1 Z
+bit 258 C 1 *
+bit 257 I 1 IO_PAD31
+bit 256 O 1 IO_PAD31 255 1 Z
+bit 255 C 1 *
+bit 254 I 1 IO_PAD30
+bit 253 O 1 IO_PAD30 252 1 Z
+bit 252 C 1 *
+bit 251 I 1 IO_PAD28
+bit 250 O 1 IO_PAD28 249 1 Z
+bit 249 C 1 *
+bit 248 I 1 IO_PAD26
+bit 247 O 1 IO_PAD26 246 1 Z
+bit 246 C 1 *
+bit 245 I 1 IO_PAD25
+bit 244 O 1 IO_PAD25 243 1 Z
+bit 243 C 1 *
+bit 242 I 1 IO_PAD24
+bit 241 O 1 IO_PAD24 240 1 Z
+bit 240 C 1 *
+bit 239 I 1 IO_PAD23
+bit 238 O 1 IO_PAD23 237 1 Z
+bit 237 C 1 *
+bit 236 I 1 IO_PAD22
+bit 235 O 1 IO_PAD22 234 1 Z
+bit 234 C 1 *
+bit 233 I 1 IO_PAD20
+bit 232 O 1 IO_PAD20 231 1 Z
+bit 231 C 1 *
+bit 230 I 1 IO_PAD18
+bit 229 O 1 IO_PAD18 228 1 Z
+bit 228 C 1 *
+bit 227 I 1 IO_PAD16
+bit 226 O 1 IO_PAD16 225 1 Z
+bit 225 C 1 *
+bit 224 I 1 IO_PAD14
+bit 223 O 1 IO_PAD14 222 1 Z
+bit 222 C 1 *
+bit 221 I 1 IO_PAD13
+bit 220 O 1 IO_PAD13 219 1 Z
+bit 219 C 1 *
+bit 218 I 1 IO_PAD12
+bit 217 O 1 IO_PAD12 216 1 Z
+bit 216 C 1 *
+bit 215 I 1 IO_PAD10
+bit 214 O 1 IO_PAD10 213 1 Z
+bit 213 C 1 *
+bit 212 I 1 IO_PAD9
+bit 211 O 1 IO_PAD9 210 1 Z
+bit 210 C 1 *
+bit 209 I 1 IO_PAD8
+bit 208 O 1 IO_PAD8 207 1 Z
+bit 207 C 1 *
+bit 206 I 1 IO_PAD6
+bit 205 O 1 IO_PAD6 204 1 Z
+bit 204 C 1 *
+bit 203 I 1 IO_PAD4
+bit 202 O 1 IO_PAD4 201 1 Z
+bit 201 C 1 *
+bit 200 I 1 IO_PAD3
+bit 199 O 1 IO_PAD3 198 1 Z
+bit 198 C 1 *
+bit 197 I 1 IO_PAD2
+bit 196 O 1 IO_PAD2 195 1 Z
+bit 195 C 1 *
+bit 194 I 1 IO_PAD721
+bit 193 O 1 IO_PAD721 192 1 Z
+bit 192 C 1 *
+bit 191 I 1 IO_PAD720
+bit 190 O 1 IO_PAD720 189 1 Z
+bit 189 C 1 *
+bit 188 I 1 IO_PAD719
+bit 187 O 1 IO_PAD719 186 1 Z
+bit 186 C 1 *
+bit 185 I 1 IO_PAD717
+bit 184 O 1 IO_PAD717 183 1 Z
+bit 183 C 1 *
+bit 182 I 1 IO_PAD715
+bit 181 O 1 IO_PAD715 180 1 Z
+bit 180 C 1 *
+bit 179 I 1 IO_PAD714
+bit 178 O 1 IO_PAD714 177 1 Z
+bit 177 C 1 *
+bit 176 I 1 IO_PAD713
+bit 175 O 1 IO_PAD713 174 1 Z
+bit 174 C 1 *
+bit 173 I 1 IO_PAD711
+bit 172 O 1 IO_PAD711 171 1 Z
+bit 171 C 1 *
+bit 170 I 1 IO_PAD710
+bit 169 O 1 IO_PAD710 168 1 Z
+bit 168 C 1 *
+bit 167 I 1 IO_PAD709
+bit 166 O 1 IO_PAD709 165 1 Z
+bit 165 C 1 *
+bit 164 I 1 IO_PAD707
+bit 163 O 1 IO_PAD707 162 1 Z
+bit 162 C 1 *
+bit 161 I 1 IO_PAD705
+bit 160 O 1 IO_PAD705 159 1 Z
+bit 159 C 1 *
+bit 158 I 1 IO_PAD703
+bit 157 O 1 IO_PAD703 156 1 Z
+bit 156 C 1 *
+bit 155 I 1 IO_PAD701
+bit 154 O 1 IO_PAD701 153 1 Z
+bit 153 C 1 *
+bit 152 I 1 IO_PAD700
+bit 151 O 1 IO_PAD700 150 1 Z
+bit 150 C 1 *
+bit 149 I 1 IO_PAD699
+bit 148 O 1 IO_PAD699 147 1 Z
+bit 147 C 1 *
+bit 146 I 1 IO_PAD698
+bit 145 O 1 IO_PAD698 144 1 Z
+bit 144 C 1 *
+bit 143 I 1 IO_PAD697
+bit 142 O 1 IO_PAD697 141 1 Z
+bit 141 C 1 *
+bit 140 I 1 IO_PAD695
+bit 139 O 1 IO_PAD695 138 1 Z
+bit 138 C 1 *
+bit 137 I 1 IO_PAD693
+bit 136 O 1 IO_PAD693 135 1 Z
+bit 135 C 1 *
+bit 134 I 1 IO_PAD692
+bit 133 O 1 IO_PAD692 132 1 Z
+bit 132 C 1 *
+bit 131 I 1 IO_PAD691
+bit 130 O 1 IO_PAD691 129 1 Z
+bit 129 C 1 *
+bit 128 I 1 IO_PAD690
+bit 127 O 1 IO_PAD690 126 1 Z
+bit 126 C 1 *
+bit 125 I 1 IO_PAD689
+bit 124 O 1 IO_PAD689 123 1 Z
+bit 123 C 1 *
+bit 122 I 1 IO_PAD688
+bit 121 O 1 IO_PAD688 120 1 Z
+bit 120 C 1 *
+bit 119 I 1 IO_PAD687
+bit 118 O 1 IO_PAD687 117 1 Z
+bit 117 C 1 *
+bit 116 I 1 IO_PAD685
+bit 115 O 1 IO_PAD685 114 1 Z
+bit 114 C 1 *
+bit 113 I 1 IO_PAD683
+bit 112 O 1 IO_PAD683 111 1 Z
+bit 111 C 1 *
+bit 110 I 1 IO_PAD681
+bit 109 O 1 IO_PAD681 108 1 Z
+bit 108 C 1 *
+bit 107 I 1 IO_PAD679
+bit 106 O 1 IO_PAD679 105 1 Z
+bit 105 C 1 *
+bit 104 I 1 IO_PAD677
+bit 103 O 1 IO_PAD677 102 1 Z
+bit 102 C 1 *
+bit 101 I 1 IO_PAD675
+bit 100 O 1 IO_PAD675 99 1 Z
+bit 99 C 1 *
+bit 98 I 1 IO_PAD674
+bit 97 O 1 IO_PAD674 96 1 Z
+bit 96 C 1 *
+bit 95 I 1 IO_PAD673
+bit 94 O 1 IO_PAD673 93 1 Z
+bit 93 C 1 *
+bit 92 I 1 IO_PAD672
+bit 91 O 1 IO_PAD672 90 1 Z
+bit 90 C 1 *
+bit 89 I 1 IO_PAD671
+bit 88 O 1 IO_PAD671 87 1 Z
+bit 87 C 1 *
+bit 86 I 1 IO_PAD669
+bit 85 O 1 IO_PAD669 84 1 Z
+bit 84 C 1 *
+bit 83 I 1 IO_PAD667
+bit 82 O 1 IO_PAD667 81 1 Z
+bit 81 C 1 *
+bit 80 I 1 IO_PAD666
+bit 79 O 1 IO_PAD666 78 1 Z
+bit 78 C 1 *
+bit 77 I 1 IO_PAD665
+bit 76 O 1 IO_PAD665 75 1 Z
+bit 75 C 1 *
+bit 74 I 1 IO_PAD663
+bit 73 O 1 IO_PAD663 72 1 Z
+bit 72 C 1 *
+bit 71 I 1 IO_PAD662
+bit 70 O 1 IO_PAD662 69 1 Z
+bit 69 C 1 *
+bit 68 I 1 IO_PAD661
+bit 67 O 1 IO_PAD661 66 1 Z
+bit 66 C 1 *
+bit 65 I 1 IO_PAD659
+bit 64 O 1 IO_PAD659 63 1 Z
+bit 63 C 1 *
+bit 62 I 1 IO_PAD658
+bit 61 O 1 IO_PAD658 60 1 Z
+bit 60 C 1 *
+bit 59 I 1 IO_PAD657
+bit 58 O 1 IO_PAD657 57 1 Z
+bit 57 C 1 *
+bit 56 I 1 IO_PAD655
+bit 55 O 1 IO_PAD655 54 1 Z
+bit 54 C 1 *
+bit 53 I 1 IO_PAD653
+bit 52 O 1 IO_PAD653 51 1 Z
+bit 51 C 1 *
+bit 50 I 1 IO_PAD651
+bit 49 O 1 IO_PAD651 48 1 Z
+bit 48 C 1 *
+bit 47 I 1 IO_PAD649
+bit 46 O 1 IO_PAD649 45 1 Z
+bit 45 C 1 *
+bit 44 I 1 IO_PAD648
+bit 43 O 1 IO_PAD648 42 1 Z
+bit 42 C 1 *
+bit 41 I 1 IO_PAD647
+bit 40 O 1 IO_PAD647 39 1 Z
+bit 39 C 1 *
+bit 38 I 1 IO_PAD646
+bit 37 O 1 IO_PAD646 36 1 Z
+bit 36 C 1 *
+bit 35 I 1 IO_PAD645
+bit 34 O 1 IO_PAD645 33 1 Z
+bit 33 C 1 *
+bit 32 I 1 IO_PAD643
+bit 31 O 1 IO_PAD643 30 1 Z
+bit 30 C 1 *
+bit 29 I 1 IO_PAD641
+bit 28 O 1 IO_PAD641 27 1 Z
+bit 27 C 1 *
+bit 26 I 1 IO_PAD640
+bit 25 O 1 IO_PAD640 24 1 Z
+bit 24 C 1 *
+bit 23 I 1 IO_PAD639
+bit 22 O 1 IO_PAD639 21 1 Z
+bit 21 C 1 *
+bit 20 I 1 IO_PAD638
+bit 19 O 1 IO_PAD638 18 1 Z
+bit 18 C 1 *
+bit 17 I 1 IO_PAD637
+bit 16 O 1 IO_PAD637 15 1 Z
+bit 15 C 1 *
+bit 14 I 1 IO_PAD635
+bit 13 O 1 IO_PAD635 12 1 Z
+bit 12 C 1 *
+bit 11 I 1 IO_PAD634
+bit 10 O 1 IO_PAD634 9 1 Z
+bit 9 C 1 *
+bit 8 I 1 IO_PAD633
+bit 7 O 1 IO_PAD633 6 1 Z
+bit 6 C 1 *
+bit 5 I 1 IO_PAD631
+bit 4 O 1 IO_PAD631 3 1 Z
+bit 3 C 1 *
+bit 2 I 1 IO_PAD630
+bit 1 O 1 IO_PAD630 0 1 Z
+bit 0 C 1 *
--- /dev/null
+signal GND1
+signal GND2
+signal GND3
+signal GND4
+signal GND5
+signal GND6
+signal GND7
+signal GND8
+signal GND9
+signal GND10
+signal GND11
+signal GND12
+signal GND13
+signal GND14
+signal GND15
+signal GND16
+signal GND17
+signal GND18
+signal GND19
+signal GND20
+signal GND21
+signal GND22
+signal GND23
+signal GND24
+signal GND25
+signal GND26
+signal GND27
+signal GND28
+signal GND29
+signal GND30
+signal GND31
+signal GND32
+signal GND33
+signal GND34
+signal GND35
+signal GND36
+signal GND37
+signal GND38
+signal GND39
+signal GND40
+signal CCLK_T15
+signal DONE_R15
+signal HSWAP_EN_E6
+signal M0_P5
+signal M1_U3
+signal M2_R4
+signal PROG_B
+signal TCK
+signal TDI
+signal TDO
+signal TMS
+signal VCCAUX1
+signal VCCAUX2
+signal VCCAUX3
+signal VCCAUX4
+signal VCCAUX5
+signal VCCAUX6
+signal VCCAUX7
+signal VCCAUX8
+signal VCCINT1
+signal VCCINT2
+signal VCCINT3
+signal VCCINT4
+signal VCCINT5
+signal VCCINT6
+signal VCCINT7
+signal VCCINT8
+signal VCCINT9
+signal VCCINT10
+signal VCCINT11
+signal VCCINT12
+signal VCCO01
+signal VCCO02
+signal VCCO03
+signal VCCO04
+signal VCCO11
+signal VCCO12
+signal VCCO13
+signal VCCO14
+signal VCCO21
+signal VCCO22
+signal VCCO23
+signal VCCO31
+signal VCCO32
+signal VCCO33
+signal VCCO41
+signal VCCO42
+signal VCCO43
+signal VCCO44
+signal VCCO51
+signal VCCO52
+signal VCCO53
+signal VCCO54
+signal VCCO61
+signal VCCO62
+signal VCCO63
+signal VCCO71
+signal VCCO72
+signal VCCO73
+signal IO_A2
+signal IO_A3
+signal IO_A4
+signal IO_A5
+signal IO_A7
+signal IO_A8
+signal IO_A9
+signal IO_A10
+signal IO_A11
+signal IO_A12
+signal IO_A14
+signal IO_A15
+signal IO_A16
+signal IO_A17
+signal IO_B1
+signal IO_B3
+signal IO_B4
+signal IO_B5
+signal IO_B6
+signal IO_B9
+signal IO_B10
+signal IO_B13
+signal IO_B14
+signal IO_B15
+signal IO_B18
+signal IO_C1
+signal IO_C2
+signal IO_C3
+signal IO_C4
+signal IO_C5
+signal IO_C7
+signal IO_C8
+signal IO_C11
+signal IO_C12
+signal IO_C14
+signal IO_C15
+signal IO_C16
+signal IO_C17
+signal IO_C18
+signal IO_D1
+signal IO_D2
+signal IO_D3
+signal IO_D5
+signal IO_D6
+signal IO_D7
+signal IO_D8
+signal IO_D9
+signal IO_D10
+signal IO_D11
+signal IO_D12
+signal IO_D13
+signal IO_D14
+signal IO_D16
+signal IO_D17
+signal IO_D18
+signal IO_E1
+signal IO_E2
+signal IO_E3
+signal IO_E4
+signal IO_E7
+signal IO_E8
+signal IO_E9
+signal IO_E10
+signal IO_E11
+signal IO_E12
+signal IO_E13
+signal IO_E15
+signal IO_E16
+signal IO_E17
+signal IO_E18
+signal IO_F2
+signal IO_F4
+signal IO_F5
+signal IO_F8
+signal IO_F9
+signal IO_F10
+signal IO_F11
+signal IO_F14
+signal IO_F15
+signal IO_F17
+signal IO_G1
+signal IO_G3
+signal IO_G4
+signal IO_G5
+signal IO_G14
+signal IO_G15
+signal IO_G16
+signal IO_G18
+signal IO_H1
+signal IO_H2
+signal IO_H3
+signal IO_H4
+signal IO_H5
+signal IO_H6
+signal IO_H13
+signal IO_H14
+signal IO_H15
+signal IO_H16
+signal IO_H17
+signal IO_H18
+signal IO_J1
+signal IO_J2
+signal IO_J4
+signal IO_J5
+signal IO_J6
+signal IO_J13
+signal IO_J14
+signal IO_J15
+signal IO_J17
+signal IO_J18
+signal IO_K1
+signal IO_K2
+signal IO_K4
+signal IO_K5
+signal IO_K6
+signal IO_K13
+signal IO_K14
+signal IO_K15
+signal IO_K17
+signal IO_K18
+signal IO_L1
+signal IO_L2
+signal IO_L3
+signal IO_L4
+signal IO_L5
+signal IO_L6
+signal IO_L13
+signal IO_L14
+signal IO_L15
+signal IO_L16
+signal IO_L17
+signal IO_L18
+signal IO_M1
+signal IO_M3
+signal IO_M4
+signal IO_M5
+signal IO_M14
+signal IO_M15
+signal IO_M16
+signal IO_M18
+signal IO_N2
+signal IO_N4
+signal IO_N5
+signal IO_N8
+signal IO_N9
+signal IO_N10
+signal IO_N11
+signal IO_N14
+signal IO_N15
+signal IO_N17
+signal IO_P1
+signal IO_P2
+signal IO_P3
+signal IO_P4
+signal IO_P6
+signal IO_P7
+signal IO_P8
+signal IO_P9
+signal IO_P10
+signal IO_P11
+signal IO_P12
+signal IO_P13
+signal IO_P14
+signal IO_P15
+signal IO_P16
+signal IO_P17
+signal IO_P18
+signal IO_R1
+signal IO_R2
+signal IO_R3
+signal IO_R5
+signal IO_R6
+signal IO_R7
+signal IO_R8
+signal IO_R9
+signal IO_R10
+signal IO_R11
+signal IO_R12
+signal IO_R13
+signal IO_R14
+signal IO_R16
+signal IO_R17
+signal IO_R18
+signal IO_T1
+signal IO_T2
+signal IO_T3
+signal IO_T4
+signal IO_T5
+signal IO_T7
+signal IO_T8
+signal IO_T11
+signal IO_T12
+signal IO_T14
+signal IO_T16
+signal IO_T17
+signal IO_T18
+signal IO_U1
+signal IO_U4
+signal IO_U5
+signal IO_U6
+signal IO_U9
+signal IO_U10
+signal IO_U13
+signal IO_U14
+signal IO_U15
+signal IO_U16
+signal IO_U18
+signal IO_V2
+signal IO_V3
+signal IO_V4
+signal IO_V5
+signal IO_V7
+signal IO_V8
+signal IO_V9
+signal IO_V10
+signal IO_V11
+signal IO_V12
+signal IO_V14
+signal IO_V15
+signal IO_V16
+
+register BSR 1559
+register BR 1
+register DIR 32
+
+instruction length 6
+
+instruction EXTEST 000000 BSR
+instruction SAMPLE/PRELOAD 000001 BSR
+instruction IDCODE 001001 DIR
+instruction BYPASS 111111 BR
+
+bit 1558 I 1 IO_C16
+bit 1557 O 1 IO_C16 1556 1 Z
+bit 1556 C 1 *
+bit 1555 I 1 IO_C17
+bit 1554 O 1 IO_C17 1553 1 Z
+bit 1553 C 1 *
+bit 1552 O 1 *
+bit 1551 O 1 *
+bit 1550 O 1 *
+bit 1549 O 1 *
+bit 1548 O 1 *
+bit 1547 O 1 *
+bit 1546 O 1 *
+bit 1545 O 1 *
+bit 1544 O 1 *
+bit 1543 O 1 *
+bit 1542 O 1 *
+bit 1541 O 1 *
+bit 1540 O 1 *
+bit 1539 O 1 *
+bit 1538 O 1 *
+bit 1537 O 1 *
+bit 1536 O 1 *
+bit 1535 O 1 *
+bit 1534 O 1 *
+bit 1533 O 1 *
+bit 1532 O 1 *
+bit 1531 O 1 *
+bit 1530 O 1 *
+bit 1529 O 1 *
+bit 1528 O 1 *
+bit 1527 O 1 *
+bit 1526 O 1 *
+bit 1525 O 1 *
+bit 1524 O 1 *
+bit 1523 O 1 *
+bit 1522 O 1 *
+bit 1521 O 1 *
+bit 1520 O 1 *
+bit 1519 O 1 *
+bit 1518 O 1 *
+bit 1517 O 1 *
+bit 1516 O 1 *
+bit 1515 O 1 *
+bit 1514 O 1 *
+bit 1513 O 1 *
+bit 1512 O 1 *
+bit 1511 O 1 *
+bit 1510 O 1 *
+bit 1509 O 1 *
+bit 1508 O 1 *
+bit 1507 O 1 *
+bit 1506 O 1 *
+bit 1505 O 1 *
+bit 1504 O 1 *
+bit 1503 O 1 *
+bit 1502 O 1 *
+bit 1501 O 1 *
+bit 1500 O 1 *
+bit 1499 O 1 *
+bit 1498 I 1 IO_B18
+bit 1497 O 1 IO_B18 1496 1 Z
+bit 1496 C 1 *
+bit 1495 I 1 IO_C18
+bit 1494 O 1 IO_C18 1493 1 Z
+bit 1493 C 1 *
+bit 1492 I 1 IO_D17
+bit 1491 O 1 IO_D17 1490 1 Z
+bit 1490 C 1 *
+bit 1489 I 1 IO_D18
+bit 1488 O 1 IO_D18 1487 1 Z
+bit 1487 C 1 *
+bit 1486 I 1 IO_D16
+bit 1485 O 1 IO_D16 1484 1 Z
+bit 1484 C 1 *
+bit 1483 I 1 IO_E16
+bit 1482 O 1 IO_E16 1481 1 Z
+bit 1481 C 1 *
+bit 1480 I 1 IO_E17
+bit 1479 O 1 IO_E17 1478 1 Z
+bit 1478 C 1 *
+bit 1477 I 1 IO_E18
+bit 1476 O 1 IO_E18 1475 1 Z
+bit 1475 C 1 *
+bit 1474 I 1 IO_F15
+bit 1473 O 1 IO_F15 1472 1 Z
+bit 1472 C 1 *
+bit 1471 I 1 IO_E15
+bit 1470 O 1 IO_E15 1469 1 Z
+bit 1469 C 1 *
+bit 1468 I 1 IO_F14
+bit 1467 O 1 IO_F14 1466 1 Z
+bit 1466 C 1 *
+bit 1465 I 1 IO_G14
+bit 1464 O 1 IO_G14 1463 1 Z
+bit 1463 C 1 *
+bit 1462 I 1 IO_G18
+bit 1461 O 1 IO_G18 1460 1 Z
+bit 1460 C 1 *
+bit 1459 I 1 IO_F17
+bit 1458 O 1 IO_F17 1457 1 Z
+bit 1457 C 1 *
+bit 1456 I 1 IO_G15
+bit 1455 O 1 IO_G15 1454 1 Z
+bit 1454 C 1 *
+bit 1453 I 1 IO_G16
+bit 1452 O 1 IO_G16 1451 1 Z
+bit 1451 C 1 *
+bit 1450 O 1 *
+bit 1449 O 1 *
+bit 1448 O 1 *
+bit 1447 O 1 *
+bit 1446 O 1 *
+bit 1445 O 1 *
+bit 1444 I 1 IO_H13
+bit 1443 O 1 IO_H13 1442 1 Z
+bit 1442 C 1 *
+bit 1441 I 1 IO_H14
+bit 1440 O 1 IO_H14 1439 1 Z
+bit 1439 C 1 *
+bit 1438 O 1 *
+bit 1437 O 1 *
+bit 1436 O 1 *
+bit 1435 O 1 *
+bit 1434 O 1 *
+bit 1433 O 1 *
+bit 1432 O 1 *
+bit 1431 O 1 *
+bit 1430 O 1 *
+bit 1429 O 1 *
+bit 1428 O 1 *
+bit 1427 O 1 *
+bit 1426 O 1 *
+bit 1425 O 1 *
+bit 1424 O 1 *
+bit 1423 O 1 *
+bit 1422 O 1 *
+bit 1421 O 1 *
+bit 1420 O 1 *
+bit 1419 O 1 *
+bit 1418 O 1 *
+bit 1417 O 1 *
+bit 1416 O 1 *
+bit 1415 O 1 *
+bit 1414 O 1 *
+bit 1413 O 1 *
+bit 1412 O 1 *
+bit 1411 O 1 *
+bit 1410 O 1 *
+bit 1409 O 1 *
+bit 1408 O 1 *
+bit 1407 O 1 *
+bit 1406 O 1 *
+bit 1405 O 1 *
+bit 1404 O 1 *
+bit 1403 O 1 *
+bit 1402 I 1 IO_H16
+bit 1401 O 1 IO_H16 1400 1 Z
+bit 1400 C 1 *
+bit 1399 I 1 IO_H15
+bit 1398 O 1 IO_H15 1397 1 Z
+bit 1397 C 1 *
+bit 1396 I 1 IO_H17
+bit 1395 O 1 IO_H17 1394 1 Z
+bit 1394 C 1 *
+bit 1393 I 1 IO_H18
+bit 1392 O 1 IO_H18 1391 1 Z
+bit 1391 C 1 *
+bit 1390 O 1 *
+bit 1389 O 1 *
+bit 1388 O 1 *
+bit 1387 O 1 *
+bit 1386 O 1 *
+bit 1385 O 1 *
+bit 1384 O 1 *
+bit 1383 O 1 *
+bit 1382 O 1 *
+bit 1381 I 1 IO_J13
+bit 1380 O 1 IO_J13 1379 1 Z
+bit 1379 C 1 *
+bit 1378 I 1 IO_J18
+bit 1377 O 1 IO_J18 1376 1 Z
+bit 1376 C 1 *
+bit 1375 I 1 IO_J17
+bit 1374 O 1 IO_J17 1373 1 Z
+bit 1373 C 1 *
+bit 1372 I 1 IO_J15
+bit 1371 O 1 IO_J15 1370 1 Z
+bit 1370 C 1 *
+bit 1369 I 1 IO_J14
+bit 1368 O 1 IO_J14 1367 1 Z
+bit 1367 C 1 *
+bit 1366 I 1 IO_K17
+bit 1365 O 1 IO_K17 1364 1 Z
+bit 1364 C 1 *
+bit 1363 I 1 IO_K18
+bit 1362 O 1 IO_K18 1361 1 Z
+bit 1361 C 1 *
+bit 1360 I 1 IO_K13
+bit 1359 O 1 IO_K13 1358 1 Z
+bit 1358 C 1 *
+bit 1357 I 1 IO_K14
+bit 1356 O 1 IO_K14 1355 1 Z
+bit 1355 C 1 *
+bit 1354 I 1 IO_K15
+bit 1353 O 1 IO_K15 1352 1 Z
+bit 1352 C 1 *
+bit 1351 O 1 *
+bit 1350 O 1 *
+bit 1349 O 1 *
+bit 1348 O 1 *
+bit 1347 O 1 *
+bit 1346 O 1 *
+bit 1345 O 1 *
+bit 1344 O 1 *
+bit 1343 O 1 *
+bit 1342 I 1 IO_L18
+bit 1341 O 1 IO_L18 1340 1 Z
+bit 1340 C 1 *
+bit 1339 I 1 IO_L17
+bit 1338 O 1 IO_L17 1337 1 Z
+bit 1337 C 1 *
+bit 1336 I 1 IO_L15
+bit 1335 O 1 IO_L15 1334 1 Z
+bit 1334 C 1 *
+bit 1333 I 1 IO_L16
+bit 1332 O 1 IO_L16 1331 1 Z
+bit 1331 C 1 *
+bit 1330 O 1 *
+bit 1329 O 1 *
+bit 1328 O 1 *
+bit 1327 O 1 *
+bit 1326 O 1 *
+bit 1325 O 1 *
+bit 1324 O 1 *
+bit 1323 O 1 *
+bit 1322 O 1 *
+bit 1321 O 1 *
+bit 1320 O 1 *
+bit 1319 O 1 *
+bit 1318 O 1 *
+bit 1317 O 1 *
+bit 1316 O 1 *
+bit 1315 O 1 *
+bit 1314 O 1 *
+bit 1313 O 1 *
+bit 1312 O 1 *
+bit 1311 O 1 *
+bit 1310 O 1 *
+bit 1309 O 1 *
+bit 1308 O 1 *
+bit 1307 O 1 *
+bit 1306 O 1 *
+bit 1305 O 1 *
+bit 1304 O 1 *
+bit 1303 O 1 *
+bit 1302 O 1 *
+bit 1301 O 1 *
+bit 1300 O 1 *
+bit 1299 O 1 *
+bit 1298 O 1 *
+bit 1297 O 1 *
+bit 1296 O 1 *
+bit 1295 O 1 *
+bit 1294 I 1 IO_L14
+bit 1293 O 1 IO_L14 1292 1 Z
+bit 1292 C 1 *
+bit 1291 I 1 IO_L13
+bit 1290 O 1 IO_L13 1289 1 Z
+bit 1289 C 1 *
+bit 1288 O 1 *
+bit 1287 O 1 *
+bit 1286 O 1 *
+bit 1285 O 1 *
+bit 1284 O 1 *
+bit 1283 O 1 *
+bit 1282 I 1 IO_M18
+bit 1281 O 1 IO_M18 1280 1 Z
+bit 1280 C 1 *
+bit 1279 I 1 IO_N17
+bit 1278 O 1 IO_N17 1277 1 Z
+bit 1277 C 1 *
+bit 1276 I 1 IO_M15
+bit 1275 O 1 IO_M15 1274 1 Z
+bit 1274 C 1 *
+bit 1273 I 1 IO_M16
+bit 1272 O 1 IO_M16 1271 1 Z
+bit 1271 C 1 *
+bit 1270 I 1 IO_M14
+bit 1269 O 1 IO_M14 1268 1 Z
+bit 1268 C 1 *
+bit 1267 I 1 IO_N14
+bit 1266 O 1 IO_N14 1265 1 Z
+bit 1265 C 1 *
+bit 1264 I 1 IO_P15
+bit 1263 O 1 IO_P15 1262 1 Z
+bit 1262 C 1 *
+bit 1261 I 1 IO_N15
+bit 1260 O 1 IO_N15 1259 1 Z
+bit 1259 C 1 *
+bit 1258 I 1 IO_P18
+bit 1257 O 1 IO_P18 1256 1 Z
+bit 1256 C 1 *
+bit 1255 I 1 IO_P17
+bit 1254 O 1 IO_P17 1253 1 Z
+bit 1253 C 1 *
+bit 1252 I 1 IO_R17
+bit 1251 O 1 IO_R17 1250 1 Z
+bit 1250 C 1 *
+bit 1249 I 1 IO_R18
+bit 1248 O 1 IO_R18 1247 1 Z
+bit 1247 C 1 *
+bit 1246 I 1 IO_P16
+bit 1245 O 1 IO_P16 1244 1 Z
+bit 1244 C 1 *
+bit 1243 I 1 IO_R16
+bit 1242 O 1 IO_R16 1241 1 Z
+bit 1241 C 1 *
+bit 1240 I 1 IO_T18
+bit 1239 O 1 IO_T18 1238 1 Z
+bit 1238 C 1 *
+bit 1237 I 1 IO_U18
+bit 1236 O 1 IO_U18 1235 1 Z
+bit 1235 C 1 *
+bit 1234 O 1 *
+bit 1233 O 1 *
+bit 1232 O 1 *
+bit 1231 O 1 *
+bit 1230 O 1 *
+bit 1229 O 1 *
+bit 1228 O 1 *
+bit 1227 O 1 *
+bit 1226 O 1 *
+bit 1225 O 1 *
+bit 1224 O 1 *
+bit 1223 O 1 *
+bit 1222 O 1 *
+bit 1221 O 1 *
+bit 1220 O 1 *
+bit 1219 O 1 *
+bit 1218 O 1 *
+bit 1217 O 1 *
+bit 1216 O 1 *
+bit 1215 O 1 *
+bit 1214 O 1 *
+bit 1213 O 1 *
+bit 1212 O 1 *
+bit 1211 O 1 *
+bit 1210 O 1 *
+bit 1209 O 1 *
+bit 1208 O 1 *
+bit 1207 O 1 *
+bit 1206 O 1 *
+bit 1205 O 1 *
+bit 1204 O 1 *
+bit 1203 O 1 *
+bit 1202 O 1 *
+bit 1201 O 1 *
+bit 1200 O 1 *
+bit 1199 O 1 *
+bit 1198 O 1 *
+bit 1197 O 1 *
+bit 1196 O 1 *
+bit 1195 O 1 *
+bit 1194 O 1 *
+bit 1193 O 1 *
+bit 1192 O 1 *
+bit 1191 O 1 *
+bit 1190 O 1 *
+bit 1189 O 1 *
+bit 1188 O 1 *
+bit 1187 O 1 *
+bit 1186 O 1 *
+bit 1185 O 1 *
+bit 1184 O 1 *
+bit 1183 O 1 *
+bit 1182 O 1 *
+bit 1181 O 1 *
+bit 1180 I 1 IO_T17
+bit 1179 O 1 IO_T17 1178 1 Z
+bit 1178 C 1 *
+bit 1177 I 1 IO_T16
+bit 1176 O 1 IO_T16 1175 1 Z
+bit 1175 C 1 *
+bit 1174 I 1 CCLK_T15
+bit 1173 O 1 CCLK_T15 1172 1 Z
+bit 1172 C 1 *
+bit 1171 I 1 DONE_R15
+bit 1170 O 1 DONE_R15 1169 1 Z
+bit 1169 C 1 *
+bit 1168 I 1 IO_V17
+bit 1167 O 1 IO_V17 1166 1 Z
+bit 1166 C 1 *
+bit 1165 I 1 IO_U16
+bit 1164 O 1 IO_U16 1163 1 Z
+bit 1163 C 1 *
+bit 1162 I 1 IO_V16
+bit 1161 O 1 IO_V16 1160 1 Z
+bit 1160 C 1 *
+bit 1159 O 1 *
+bit 1158 O 1 *
+bit 1157 O 1 *
+bit 1156 O 1 *
+bit 1155 O 1 *
+bit 1154 O 1 *
+bit 1153 O 1 *
+bit 1152 O 1 *
+bit 1151 O 1 *
+bit 1150 O 1 *
+bit 1149 O 1 *
+bit 1148 O 1 *
+bit 1147 O 1 *
+bit 1146 O 1 *
+bit 1145 O 1 *
+bit 1144 I 1 IO_P14
+bit 1143 O 1 IO_P14 1142 1 Z
+bit 1142 C 1 *
+bit 1141 I 1 IO_R14
+bit 1140 O 1 IO_R14 1139 1 Z
+bit 1139 C 1 *
+bit 1138 O 1 *
+bit 1137 O 1 *
+bit 1136 O 1 *
+bit 1135 O 1 *
+bit 1134 O 1 *
+bit 1133 O 1 *
+bit 1132 O 1 *
+bit 1131 O 1 *
+bit 1130 O 1 *
+bit 1129 O 1 *
+bit 1128 O 1 *
+bit 1127 O 1 *
+bit 1126 O 1 *
+bit 1125 O 1 *
+bit 1124 O 1 *
+bit 1123 O 1 *
+bit 1122 O 1 *
+bit 1121 O 1 *
+bit 1120 I 1 IO_U15
+bit 1119 O 1 IO_U15 1118 1 Z
+bit 1118 C 1 *
+bit 1117 I 1 IO_V15
+bit 1116 O 1 IO_V15 1115 1 Z
+bit 1115 C 1 *
+bit 1114 I 1 IO_T14
+bit 1113 O 1 IO_T14 1112 1 Z
+bit 1112 C 1 *
+bit 1111 I 1 IO_U14
+bit 1110 O 1 IO_U14 1109 1 Z
+bit 1109 C 1 *
+bit 1108 O 1 *
+bit 1107 O 1 *
+bit 1106 O 1 *
+bit 1105 O 1 *
+bit 1104 O 1 *
+bit 1103 O 1 *
+bit 1102 O 1 *
+bit 1101 O 1 *
+bit 1100 O 1 *
+bit 1099 O 1 *
+bit 1098 O 1 *
+bit 1097 O 1 *
+bit 1096 O 1 *
+bit 1095 O 1 *
+bit 1094 O 1 *
+bit 1093 O 1 *
+bit 1092 O 1 *
+bit 1091 O 1 *
+bit 1090 O 1 *
+bit 1089 O 1 *
+bit 1088 O 1 *
+bit 1087 O 1 *
+bit 1086 O 1 *
+bit 1085 O 1 *
+bit 1084 I 1 IO_V14
+bit 1083 O 1 IO_V14 1082 1 Z
+bit 1082 C 1 *
+bit 1081 O 1 *
+bit 1080 O 1 *
+bit 1079 O 1 *
+bit 1078 O 1 *
+bit 1077 O 1 *
+bit 1076 O 1 *
+bit 1075 O 1 *
+bit 1074 O 1 *
+bit 1073 O 1 *
+bit 1072 O 1 *
+bit 1071 O 1 *
+bit 1070 O 1 *
+bit 1069 O 1 *
+bit 1068 O 1 *
+bit 1067 O 1 *
+bit 1066 O 1 *
+bit 1065 O 1 *
+bit 1064 O 1 *
+bit 1063 I 1 IO_U13
+bit 1062 O 1 IO_U13 1061 1 Z
+bit 1061 C 1 *
+bit 1060 O 1 *
+bit 1059 O 1 *
+bit 1058 O 1 *
+bit 1057 O 1 *
+bit 1056 O 1 *
+bit 1055 O 1 *
+bit 1054 O 1 *
+bit 1053 O 1 *
+bit 1052 O 1 *
+bit 1051 O 1 *
+bit 1050 O 1 *
+bit 1049 O 1 *
+bit 1048 O 1 *
+bit 1047 O 1 *
+bit 1046 O 1 *
+bit 1045 O 1 *
+bit 1044 O 1 *
+bit 1043 O 1 *
+bit 1042 O 1 *
+bit 1041 O 1 *
+bit 1040 O 1 *
+bit 1039 O 1 *
+bit 1038 O 1 *
+bit 1037 O 1 *
+bit 1036 O 1 *
+bit 1035 O 1 *
+bit 1034 O 1 *
+bit 1033 O 1 *
+bit 1032 O 1 *
+bit 1031 O 1 *
+bit 1030 I 1 IO_R13
+bit 1029 O 1 IO_R13 1028 1 Z
+bit 1028 C 1 *
+bit 1027 I 1 IO_P13
+bit 1026 O 1 IO_P13 1025 1 Z
+bit 1025 C 1 *
+bit 1024 O 1 *
+bit 1023 O 1 *
+bit 1022 O 1 *
+bit 1021 O 1 *
+bit 1020 O 1 *
+bit 1019 O 1 *
+bit 1018 I 1 IO_P12
+bit 1017 O 1 IO_P12 1016 1 Z
+bit 1016 C 1 *
+bit 1015 I 1 IO_T12
+bit 1014 O 1 IO_T12 1013 1 Z
+bit 1013 C 1 *
+bit 1012 I 1 IO_R12
+bit 1011 O 1 IO_R12 1010 1 Z
+bit 1010 C 1 *
+bit 1009 I 1 IO_V12
+bit 1008 O 1 IO_V12 1007 1 Z
+bit 1007 C 1 *
+bit 1006 I 1 IO_V11
+bit 1005 O 1 IO_V11 1004 1 Z
+bit 1004 C 1 *
+bit 1003 O 1 *
+bit 1002 O 1 *
+bit 1001 O 1 *
+bit 1000 I 1 IO_R11
+bit 999 O 1 IO_R11 998 1 Z
+bit 998 C 1 *
+bit 997 I 1 IO_T11
+bit 996 O 1 IO_T11 995 1 Z
+bit 995 C 1 *
+bit 994 I 1 IO_N11
+bit 993 O 1 IO_N11 992 1 Z
+bit 992 C 1 *
+bit 991 I 1 IO_P11
+bit 990 O 1 IO_P11 989 1 Z
+bit 989 C 1 *
+bit 988 I 1 IO_R10
+bit 987 O 1 IO_R10 986 1 Z
+bit 986 C 1 *
+bit 985 I 1 IO_U10
+bit 984 O 1 IO_U10 983 1 Z
+bit 983 C 1 *
+bit 982 I 1 IO_V10
+bit 981 O 1 IO_V10 980 1 Z
+bit 980 C 1 *
+bit 979 I 1 IO_N10
+bit 978 O 1 IO_N10 977 1 Z
+bit 977 C 1 *
+bit 976 I 1 IO_P10
+bit 975 O 1 IO_P10 974 1 Z
+bit 974 C 1 *
+bit 973 I 1 IO_R9
+bit 972 O 1 IO_R9 971 1 Z
+bit 971 C 1 *
+bit 970 I 1 IO_N9
+bit 969 O 1 IO_N9 968 1 Z
+bit 968 C 1 *
+bit 967 I 1 IO_P9
+bit 966 O 1 IO_P9 965 1 Z
+bit 965 C 1 *
+bit 964 I 1 IO_U9
+bit 963 O 1 IO_U9 962 1 Z
+bit 962 C 1 *
+bit 961 I 1 IO_V9
+bit 960 O 1 IO_V9 959 1 Z
+bit 959 C 1 *
+bit 958 I 1 IO_N8
+bit 957 O 1 IO_N8 956 1 Z
+bit 956 C 1 *
+bit 955 I 1 IO_R8
+bit 954 O 1 IO_R8 953 1 Z
+bit 953 C 1 *
+bit 952 I 1 IO_T8
+bit 951 O 1 IO_T8 950 1 Z
+bit 950 C 1 *
+bit 949 I 1 IO_V8
+bit 948 O 1 IO_V8 947 1 Z
+bit 947 C 1 *
+bit 946 I 1 IO_V7
+bit 945 O 1 IO_V7 944 1 Z
+bit 944 C 1 *
+bit 943 I 1 IO_P8
+bit 942 O 1 IO_P8 941 1 Z
+bit 941 C 1 *
+bit 940 I 1 IO_R7
+bit 939 O 1 IO_R7 938 1 Z
+bit 938 C 1 *
+bit 937 I 1 IO_T7
+bit 936 O 1 IO_T7 935 1 Z
+bit 935 C 1 *
+bit 934 I 1 IO_P6
+bit 933 O 1 IO_P6 932 1 Z
+bit 932 C 1 *
+bit 931 I 1 IO_P7
+bit 930 O 1 IO_P7 929 1 Z
+bit 929 C 1 *
+bit 928 I 1 IO_U6
+bit 927 O 1 IO_U6 926 1 Z
+bit 926 C 1 *
+bit 925 O 1 *
+bit 924 O 1 *
+bit 923 O 1 *
+bit 922 O 1 *
+bit 921 O 1 *
+bit 920 O 1 *
+bit 919 O 1 *
+bit 918 O 1 *
+bit 917 O 1 *
+bit 916 O 1 *
+bit 915 O 1 *
+bit 914 O 1 *
+bit 913 O 1 *
+bit 912 O 1 *
+bit 911 O 1 *
+bit 910 O 1 *
+bit 909 O 1 *
+bit 908 O 1 *
+bit 907 O 1 *
+bit 906 O 1 *
+bit 905 O 1 *
+bit 904 O 1 *
+bit 903 O 1 *
+bit 902 O 1 *
+bit 901 O 1 *
+bit 900 O 1 *
+bit 899 O 1 *
+bit 898 O 1 *
+bit 897 O 1 *
+bit 896 O 1 *
+bit 895 O 1 *
+bit 894 O 1 *
+bit 893 O 1 *
+bit 892 O 1 *
+bit 891 O 1 *
+bit 890 O 1 *
+bit 889 O 1 *
+bit 888 O 1 *
+bit 887 O 1 *
+bit 886 O 1 *
+bit 885 O 1 *
+bit 884 O 1 *
+bit 883 O 1 *
+bit 882 O 1 *
+bit 881 O 1 *
+bit 880 O 1 *
+bit 879 O 1 *
+bit 878 O 1 *
+bit 877 O 1 *
+bit 876 O 1 *
+bit 875 O 1 *
+bit 874 O 1 *
+bit 873 O 1 *
+bit 872 O 1 *
+bit 871 O 1 *
+bit 870 O 1 *
+bit 869 O 1 *
+bit 868 O 1 *
+bit 867 O 1 *
+bit 866 O 1 *
+bit 865 I 1 IO_V5
+bit 864 O 1 IO_V5 863 1 Z
+bit 863 C 1 *
+bit 862 I 1 IO_U5
+bit 861 O 1 IO_U5 860 1 Z
+bit 860 C 1 *
+bit 859 I 1 IO_R6
+bit 858 O 1 IO_R6 857 1 Z
+bit 857 C 1 *
+bit 856 I 1 IO_R5
+bit 855 O 1 IO_R5 854 1 Z
+bit 854 C 1 *
+bit 853 O 1 *
+bit 852 O 1 *
+bit 851 O 1 *
+bit 850 O 1 *
+bit 849 O 1 *
+bit 848 O 1 *
+bit 847 O 1 *
+bit 846 O 1 *
+bit 845 O 1 *
+bit 844 O 1 *
+bit 843 O 1 *
+bit 842 O 1 *
+bit 841 O 1 *
+bit 840 O 1 *
+bit 839 O 1 *
+bit 838 O 1 *
+bit 837 O 1 *
+bit 836 O 1 *
+bit 835 I 1 IO_V4
+bit 834 O 1 IO_V4 833 1 Z
+bit 833 C 1 *
+bit 832 I 1 IO_U4
+bit 831 O 1 IO_U4 830 1 Z
+bit 830 C 1 *
+bit 829 O 1 *
+bit 828 O 1 *
+bit 827 O 1 *
+bit 826 O 1 *
+bit 825 O 1 *
+bit 824 O 1 *
+bit 823 O 1 *
+bit 822 O 1 *
+bit 821 O 1 *
+bit 820 O 1 *
+bit 819 O 1 *
+bit 818 O 1 *
+bit 817 O 1 *
+bit 816 O 1 *
+bit 815 O 1 *
+bit 814 O 1 *
+bit 813 O 1 *
+bit 812 O 1 *
+bit 811 O 1 *
+bit 810 O 1 *
+bit 809 O 1 *
+bit 808 O 1 *
+bit 807 O 1 *
+bit 806 O 1 *
+bit 805 I 1 IO_T5
+bit 804 O 1 IO_T5 803 1 Z
+bit 803 C 1 *
+bit 802 I 1 IO_T4
+bit 801 O 1 IO_T4 800 1 Z
+bit 800 C 1 *
+bit 799 O 1 *
+bit 798 O 1 *
+bit 797 O 1 *
+bit 796 O 1 *
+bit 795 O 1 *
+bit 794 O 1 *
+bit 793 O 1 *
+bit 792 O 1 *
+bit 791 O 1 *
+bit 790 O 1 *
+bit 789 O 1 *
+bit 788 O 1 *
+bit 787 O 1 *
+bit 786 O 1 *
+bit 785 O 1 *
+bit 784 I 1 IO_V3
+bit 783 O 1 IO_V3 782 1 Z
+bit 782 C 1 *
+bit 781 I 1 IO_V2
+bit 780 O 1 IO_V2 779 1 Z
+bit 779 C 1 *
+bit 778 I 1 M2_R4
+bit 777 I 1 M0_P5
+bit 776 I 1 M1_U3
+bit 775 I 1 IO_T3
+bit 774 O 1 IO_T3 773 1 Z
+bit 773 C 1 *
+bit 772 I 1 IO_T2
+bit 771 O 1 IO_T2 770 1 Z
+bit 770 C 1 *
+bit 769 O 1 *
+bit 768 O 1 *
+bit 767 O 1 *
+bit 766 O 1 *
+bit 765 O 1 *
+bit 764 O 1 *
+bit 763 O 1 *
+bit 762 O 1 *
+bit 761 O 1 *
+bit 760 O 1 *
+bit 759 O 1 *
+bit 758 O 1 *
+bit 757 O 1 *
+bit 756 O 1 *
+bit 755 O 1 *
+bit 754 O 1 *
+bit 753 O 1 *
+bit 752 O 1 *
+bit 751 O 1 *
+bit 750 O 1 *
+bit 749 O 1 *
+bit 748 O 1 *
+bit 747 O 1 *
+bit 746 O 1 *
+bit 745 O 1 *
+bit 744 O 1 *
+bit 743 O 1 *
+bit 742 O 1 *
+bit 741 O 1 *
+bit 740 O 1 *
+bit 739 O 1 *
+bit 738 O 1 *
+bit 737 O 1 *
+bit 736 O 1 *
+bit 735 O 1 *
+bit 734 O 1 *
+bit 733 O 1 *
+bit 732 O 1 *
+bit 731 O 1 *
+bit 730 O 1 *
+bit 729 O 1 *
+bit 728 O 1 *
+bit 727 O 1 *
+bit 726 O 1 *
+bit 725 O 1 *
+bit 724 O 1 *
+bit 723 O 1 *
+bit 722 O 1 *
+bit 721 O 1 *
+bit 720 O 1 *
+bit 719 O 1 *
+bit 718 O 1 *
+bit 717 O 1 *
+bit 716 O 1 *
+bit 715 I 1 IO_U1
+bit 714 O 1 IO_U1 713 1 Z
+bit 713 C 1 *
+bit 712 I 1 IO_T1
+bit 711 O 1 IO_T1 710 1 Z
+bit 710 C 1 *
+bit 709 I 1 IO_R2
+bit 708 O 1 IO_R2 707 1 Z
+bit 707 C 1 *
+bit 706 I 1 IO_R1
+bit 705 O 1 IO_R1 704 1 Z
+bit 704 C 1 *
+bit 703 I 1 IO_R3
+bit 702 O 1 IO_R3 701 1 Z
+bit 701 C 1 *
+bit 700 I 1 IO_P3
+bit 699 O 1 IO_P3 698 1 Z
+bit 698 C 1 *
+bit 697 I 1 IO_P2
+bit 696 O 1 IO_P2 695 1 Z
+bit 695 C 1 *
+bit 694 I 1 IO_P1
+bit 693 O 1 IO_P1 692 1 Z
+bit 692 C 1 *
+bit 691 I 1 IO_N4
+bit 690 O 1 IO_N4 689 1 Z
+bit 689 C 1 *
+bit 688 I 1 IO_P4
+bit 687 O 1 IO_P4 686 1 Z
+bit 686 C 1 *
+bit 685 I 1 IO_N5
+bit 684 O 1 IO_N5 683 1 Z
+bit 683 C 1 *
+bit 682 I 1 IO_M5
+bit 681 O 1 IO_M5 680 1 Z
+bit 680 C 1 *
+bit 679 I 1 IO_M3
+bit 678 O 1 IO_M3 677 1 Z
+bit 677 C 1 *
+bit 676 I 1 IO_M4
+bit 675 O 1 IO_M4 674 1 Z
+bit 674 C 1 *
+bit 673 I 1 IO_N2
+bit 672 O 1 IO_N2 671 1 Z
+bit 671 C 1 *
+bit 670 I 1 IO_M1
+bit 669 O 1 IO_M1 668 1 Z
+bit 668 C 1 *
+bit 667 O 1 *
+bit 666 O 1 *
+bit 665 O 1 *
+bit 664 O 1 *
+bit 663 O 1 *
+bit 662 O 1 *
+bit 661 I 1 IO_L6
+bit 660 O 1 IO_L6 659 1 Z
+bit 659 C 1 *
+bit 658 I 1 IO_L5
+bit 657 O 1 IO_L5 656 1 Z
+bit 656 C 1 *
+bit 655 O 1 *
+bit 654 O 1 *
+bit 653 O 1 *
+bit 652 O 1 *
+bit 651 O 1 *
+bit 650 O 1 *
+bit 649 O 1 *
+bit 648 O 1 *
+bit 647 O 1 *
+bit 646 O 1 *
+bit 645 O 1 *
+bit 644 O 1 *
+bit 643 O 1 *
+bit 642 O 1 *
+bit 641 O 1 *
+bit 640 O 1 *
+bit 639 O 1 *
+bit 638 O 1 *
+bit 637 O 1 *
+bit 636 O 1 *
+bit 635 O 1 *
+bit 634 O 1 *
+bit 633 O 1 *
+bit 632 O 1 *
+bit 631 O 1 *
+bit 630 O 1 *
+bit 629 O 1 *
+bit 628 O 1 *
+bit 627 O 1 *
+bit 626 O 1 *
+bit 625 O 1 *
+bit 624 O 1 *
+bit 623 O 1 *
+bit 622 O 1 *
+bit 621 O 1 *
+bit 620 O 1 *
+bit 619 I 1 IO_L3
+bit 618 O 1 IO_L3 617 1 Z
+bit 617 C 1 *
+bit 616 I 1 IO_L4
+bit 615 O 1 IO_L4 614 1 Z
+bit 614 C 1 *
+bit 613 I 1 IO_L2
+bit 612 O 1 IO_L2 611 1 Z
+bit 611 C 1 *
+bit 610 I 1 IO_L1
+bit 609 O 1 IO_L1 608 1 Z
+bit 608 C 1 *
+bit 607 O 1 *
+bit 606 O 1 *
+bit 605 O 1 *
+bit 604 O 1 *
+bit 603 O 1 *
+bit 602 O 1 *
+bit 601 O 1 *
+bit 600 O 1 *
+bit 599 O 1 *
+bit 598 I 1 IO_K6
+bit 597 O 1 IO_K6 596 1 Z
+bit 596 C 1 *
+bit 595 I 1 IO_K5
+bit 594 O 1 IO_K5 593 1 Z
+bit 593 C 1 *
+bit 592 I 1 IO_K4
+bit 591 O 1 IO_K4 590 1 Z
+bit 590 C 1 *
+bit 589 I 1 IO_K1
+bit 588 O 1 IO_K1 587 1 Z
+bit 587 C 1 *
+bit 586 I 1 IO_K2
+bit 585 O 1 IO_K2 584 1 Z
+bit 584 C 1 *
+bit 583 I 1 IO_J5
+bit 582 O 1 IO_J5 581 1 Z
+bit 581 C 1 *
+bit 580 I 1 IO_J4
+bit 579 O 1 IO_J4 578 1 Z
+bit 578 C 1 *
+bit 577 I 1 IO_J1
+bit 576 O 1 IO_J1 575 1 Z
+bit 575 C 1 *
+bit 574 I 1 IO_J2
+bit 573 O 1 IO_J2 572 1 Z
+bit 572 C 1 *
+bit 571 I 1 IO_J6
+bit 570 O 1 IO_J6 569 1 Z
+bit 569 C 1 *
+bit 568 O 1 *
+bit 567 O 1 *
+bit 566 O 1 *
+bit 565 O 1 *
+bit 564 O 1 *
+bit 563 O 1 *
+bit 562 O 1 *
+bit 561 O 1 *
+bit 560 O 1 *
+bit 559 I 1 IO_H1
+bit 558 O 1 IO_H1 557 1 Z
+bit 557 C 1 *
+bit 556 I 1 IO_H2
+bit 555 O 1 IO_H2 554 1 Z
+bit 554 C 1 *
+bit 553 I 1 IO_H4
+bit 552 O 1 IO_H4 551 1 Z
+bit 551 C 1 *
+bit 550 I 1 IO_H3
+bit 549 O 1 IO_H3 548 1 Z
+bit 548 C 1 *
+bit 547 O 1 *
+bit 546 O 1 *
+bit 545 O 1 *
+bit 544 O 1 *
+bit 543 O 1 *
+bit 542 O 1 *
+bit 541 O 1 *
+bit 540 O 1 *
+bit 539 O 1 *
+bit 538 O 1 *
+bit 537 O 1 *
+bit 536 O 1 *
+bit 535 O 1 *
+bit 534 O 1 *
+bit 533 O 1 *
+bit 532 O 1 *
+bit 531 O 1 *
+bit 530 O 1 *
+bit 529 O 1 *
+bit 528 O 1 *
+bit 527 O 1 *
+bit 526 O 1 *
+bit 525 O 1 *
+bit 524 O 1 *
+bit 523 O 1 *
+bit 522 O 1 *
+bit 521 O 1 *
+bit 520 O 1 *
+bit 519 O 1 *
+bit 518 O 1 *
+bit 517 O 1 *
+bit 516 O 1 *
+bit 515 O 1 *
+bit 514 O 1 *
+bit 513 O 1 *
+bit 512 O 1 *
+bit 511 I 1 IO_H5
+bit 510 O 1 IO_H5 509 1 Z
+bit 509 C 1 *
+bit 508 I 1 IO_H6
+bit 507 O 1 IO_H6 506 1 Z
+bit 506 C 1 *
+bit 505 O 1 *
+bit 504 O 1 *
+bit 503 O 1 *
+bit 502 O 1 *
+bit 501 O 1 *
+bit 500 O 1 *
+bit 499 I 1 IO_G4
+bit 498 O 1 IO_G4 497 1 Z
+bit 497 C 1 *
+bit 496 I 1 IO_G3
+bit 495 O 1 IO_G3 494 1 Z
+bit 494 C 1 *
+bit 493 I 1 IO_G1
+bit 492 O 1 IO_G1 491 1 Z
+bit 491 C 1 *
+bit 490 I 1 IO_F2
+bit 489 O 1 IO_F2 488 1 Z
+bit 488 C 1 *
+bit 487 I 1 IO_G5
+bit 486 O 1 IO_G5 485 1 Z
+bit 485 C 1 *
+bit 484 I 1 IO_F5
+bit 483 O 1 IO_F5 482 1 Z
+bit 482 C 1 *
+bit 481 I 1 IO_E4
+bit 480 O 1 IO_E4 479 1 Z
+bit 479 C 1 *
+bit 478 I 1 IO_F4
+bit 477 O 1 IO_F4 476 1 Z
+bit 476 C 1 *
+bit 475 I 1 IO_E2
+bit 474 O 1 IO_E2 473 1 Z
+bit 473 C 1 *
+bit 472 I 1 IO_E1
+bit 471 O 1 IO_E1 470 1 Z
+bit 470 C 1 *
+bit 469 I 1 IO_E3
+bit 468 O 1 IO_E3 467 1 Z
+bit 467 C 1 *
+bit 466 I 1 IO_D3
+bit 465 O 1 IO_D3 464 1 Z
+bit 464 C 1 *
+bit 463 I 1 IO_D1
+bit 462 O 1 IO_D1 461 1 Z
+bit 461 C 1 *
+bit 460 I 1 IO_D2
+bit 459 O 1 IO_D2 458 1 Z
+bit 458 C 1 *
+bit 457 I 1 IO_C1
+bit 456 O 1 IO_C1 455 1 Z
+bit 455 C 1 *
+bit 454 I 1 IO_B1
+bit 453 O 1 IO_B1 452 1 Z
+bit 452 C 1 *
+bit 451 O 1 *
+bit 450 O 1 *
+bit 449 O 1 *
+bit 448 O 1 *
+bit 447 O 1 *
+bit 446 O 1 *
+bit 445 O 1 *
+bit 444 O 1 *
+bit 443 O 1 *
+bit 442 O 1 *
+bit 441 O 1 *
+bit 440 O 1 *
+bit 439 O 1 *
+bit 438 O 1 *
+bit 437 O 1 *
+bit 436 O 1 *
+bit 435 O 1 *
+bit 434 O 1 *
+bit 433 O 1 *
+bit 432 O 1 *
+bit 431 O 1 *
+bit 430 O 1 *
+bit 429 O 1 *
+bit 428 O 1 *
+bit 427 O 1 *
+bit 426 O 1 *
+bit 425 O 1 *
+bit 424 O 1 *
+bit 423 O 1 *
+bit 422 O 1 *
+bit 421 O 1 *
+bit 420 O 1 *
+bit 419 O 1 *
+bit 418 O 1 *
+bit 417 O 1 *
+bit 416 O 1 *
+bit 415 O 1 *
+bit 414 O 1 *
+bit 413 O 1 *
+bit 412 O 1 *
+bit 411 O 1 *
+bit 410 O 1 *
+bit 409 O 1 *
+bit 408 O 1 *
+bit 407 O 1 *
+bit 406 O 1 *
+bit 405 O 1 *
+bit 404 O 1 *
+bit 403 O 1 *
+bit 402 O 1 *
+bit 401 O 1 *
+bit 400 O 1 *
+bit 399 O 1 *
+bit 398 O 1 *
+bit 397 I 1 IO_C3
+bit 396 O 1 IO_C3 395 1 Z
+bit 395 C 1 *
+bit 394 I 1 IO_C2
+bit 393 O 1 IO_C2 392 1 Z
+bit 392 C 1 *
+bit 391 O 1 *
+bit 390 I 1 HSWAP_EN_E6
+bit 389 I 1 IO_B3
+bit 388 O 1 IO_B3 387 1 Z
+bit 387 C 1 *
+bit 386 I 1 IO_A2
+bit 385 O 1 IO_A2 384 1 Z
+bit 384 C 1 *
+bit 383 I 1 IO_A3
+bit 382 O 1 IO_A3 381 1 Z
+bit 381 C 1 *
+bit 380 O 1 *
+bit 379 O 1 *
+bit 378 O 1 *
+bit 377 O 1 *
+bit 376 O 1 *
+bit 375 O 1 *
+bit 374 O 1 *
+bit 373 O 1 *
+bit 372 O 1 *
+bit 371 O 1 *
+bit 370 O 1 *
+bit 369 O 1 *
+bit 368 O 1 *
+bit 367 O 1 *
+bit 366 O 1 *
+bit 365 O 1 *
+bit 364 O 1 *
+bit 363 O 1 *
+bit 362 O 1 *
+bit 361 O 1 *
+bit 360 O 1 *
+bit 359 O 1 *
+bit 358 O 1 *
+bit 357 O 1 *
+bit 356 O 1 *
+bit 355 O 1 *
+bit 354 O 1 *
+bit 353 O 1 *
+bit 352 O 1 *
+bit 351 O 1 *
+bit 350 O 1 *
+bit 349 O 1 *
+bit 348 O 1 *
+bit 347 O 1 *
+bit 346 O 1 *
+bit 345 O 1 *
+bit 344 O 1 *
+bit 343 O 1 *
+bit 342 O 1 *
+bit 341 I 1 IO_B4
+bit 340 O 1 IO_B4 339 1 Z
+bit 339 C 1 *
+bit 338 I 1 IO_C4
+bit 337 O 1 IO_C4 336 1 Z
+bit 336 C 1 *
+bit 335 I 1 IO_C5
+bit 334 O 1 IO_C5 333 1 Z
+bit 333 C 1 *
+bit 332 I 1 IO_D5
+bit 331 O 1 IO_D5 330 1 Z
+bit 330 C 1 *
+bit 329 O 1 *
+bit 328 O 1 *
+bit 327 O 1 *
+bit 326 O 1 *
+bit 325 O 1 *
+bit 324 O 1 *
+bit 323 O 1 *
+bit 322 O 1 *
+bit 321 O 1 *
+bit 320 O 1 *
+bit 319 O 1 *
+bit 318 O 1 *
+bit 317 O 1 *
+bit 316 O 1 *
+bit 315 O 1 *
+bit 314 O 1 *
+bit 313 O 1 *
+bit 312 O 1 *
+bit 311 I 1 IO_A4
+bit 310 O 1 IO_A4 309 1 Z
+bit 309 C 1 *
+bit 308 I 1 IO_A5
+bit 307 O 1 IO_A5 306 1 Z
+bit 306 C 1 *
+bit 305 O 1 *
+bit 304 O 1 *
+bit 303 O 1 *
+bit 302 O 1 *
+bit 301 O 1 *
+bit 300 O 1 *
+bit 299 O 1 *
+bit 298 O 1 *
+bit 297 O 1 *
+bit 296 O 1 *
+bit 295 O 1 *
+bit 294 O 1 *
+bit 293 O 1 *
+bit 292 O 1 *
+bit 291 O 1 *
+bit 290 O 1 *
+bit 289 O 1 *
+bit 288 O 1 *
+bit 287 O 1 *
+bit 286 O 1 *
+bit 285 O 1 *
+bit 284 I 1 IO_D6
+bit 283 O 1 IO_D6 282 1 Z
+bit 282 C 1 *
+bit 281 O 1 *
+bit 280 O 1 *
+bit 279 O 1 *
+bit 278 O 1 *
+bit 277 O 1 *
+bit 276 O 1 *
+bit 275 O 1 *
+bit 274 O 1 *
+bit 273 O 1 *
+bit 272 O 1 *
+bit 271 O 1 *
+bit 270 O 1 *
+bit 269 O 1 *
+bit 268 O 1 *
+bit 267 O 1 *
+bit 266 O 1 *
+bit 265 O 1 *
+bit 264 O 1 *
+bit 263 O 1 *
+bit 262 O 1 *
+bit 261 O 1 *
+bit 260 O 1 *
+bit 259 O 1 *
+bit 258 O 1 *
+bit 257 O 1 *
+bit 256 O 1 *
+bit 255 O 1 *
+bit 254 O 1 *
+bit 253 O 1 *
+bit 252 O 1 *
+bit 251 I 1 IO_B5
+bit 250 O 1 IO_B5 249 1 Z
+bit 249 C 1 *
+bit 248 I 1 IO_B6
+bit 247 O 1 IO_B6 246 1 Z
+bit 246 C 1 *
+bit 245 O 1 *
+bit 244 O 1 *
+bit 243 O 1 *
+bit 242 O 1 *
+bit 241 O 1 *
+bit 240 O 1 *
+bit 239 I 1 IO_E7
+bit 238 O 1 IO_E7 237 1 Z
+bit 237 C 1 *
+bit 236 I 1 IO_C7
+bit 235 O 1 IO_C7 234 1 Z
+bit 234 C 1 *
+bit 233 I 1 IO_D7
+bit 232 O 1 IO_D7 231 1 Z
+bit 231 C 1 *
+bit 230 I 1 IO_C8
+bit 229 O 1 IO_C8 228 1 Z
+bit 228 C 1 *
+bit 227 I 1 IO_D8
+bit 226 O 1 IO_D8 225 1 Z
+bit 225 C 1 *
+bit 224 O 1 *
+bit 223 O 1 *
+bit 222 O 1 *
+bit 221 I 1 IO_E8
+bit 220 O 1 IO_E8 219 1 Z
+bit 219 C 1 *
+bit 218 I 1 IO_F8
+bit 217 O 1 IO_F8 216 1 Z
+bit 216 C 1 *
+bit 215 I 1 IO_A7
+bit 214 O 1 IO_A7 213 1 Z
+bit 213 C 1 *
+bit 212 I 1 IO_A8
+bit 211 O 1 IO_A8 210 1 Z
+bit 210 C 1 *
+bit 209 I 1 IO_D9
+bit 208 O 1 IO_D9 207 1 Z
+bit 207 C 1 *
+bit 206 I 1 IO_B9
+bit 205 O 1 IO_B9 204 1 Z
+bit 204 C 1 *
+bit 203 I 1 IO_A9
+bit 202 O 1 IO_A9 201 1 Z
+bit 201 C 1 *
+bit 200 I 1 IO_E9
+bit 199 O 1 IO_E9 198 1 Z
+bit 198 C 1 *
+bit 197 I 1 IO_F9
+bit 196 O 1 IO_F9 195 1 Z
+bit 195 C 1 *
+bit 194 I 1 IO_D10
+bit 193 O 1 IO_D10 192 1 Z
+bit 192 C 1 *
+bit 191 I 1 IO_E10
+bit 190 O 1 IO_E10 189 1 Z
+bit 189 C 1 *
+bit 188 I 1 IO_F10
+bit 187 O 1 IO_F10 186 1 Z
+bit 186 C 1 *
+bit 185 I 1 IO_A10
+bit 184 O 1 IO_A10 183 1 Z
+bit 183 C 1 *
+bit 182 I 1 IO_B10
+bit 181 O 1 IO_B10 180 1 Z
+bit 180 C 1 *
+bit 179 I 1 IO_A11
+bit 178 O 1 IO_A11 177 1 Z
+bit 177 C 1 *
+bit 176 I 1 IO_C11
+bit 175 O 1 IO_C11 174 1 Z
+bit 174 C 1 *
+bit 173 I 1 IO_D11
+bit 172 O 1 IO_D11 171 1 Z
+bit 171 C 1 *
+bit 170 I 1 IO_F11
+bit 169 O 1 IO_F11 168 1 Z
+bit 168 C 1 *
+bit 167 I 1 IO_E11
+bit 166 O 1 IO_E11 165 1 Z
+bit 165 C 1 *
+bit 164 I 1 IO_A12
+bit 163 O 1 IO_A12 162 1 Z
+bit 162 C 1 *
+bit 161 I 1 IO_C12
+bit 160 O 1 IO_C12 159 1 Z
+bit 159 C 1 *
+bit 158 I 1 IO_D12
+bit 157 O 1 IO_D12 156 1 Z
+bit 156 C 1 *
+bit 155 I 1 IO_E13
+bit 154 O 1 IO_E13 153 1 Z
+bit 153 C 1 *
+bit 152 I 1 IO_E12
+bit 151 O 1 IO_E12 150 1 Z
+bit 150 C 1 *
+bit 149 I 1 IO_B13
+bit 148 O 1 IO_B13 147 1 Z
+bit 147 C 1 *
+bit 146 O 1 *
+bit 145 O 1 *
+bit 144 O 1 *
+bit 143 O 1 *
+bit 142 O 1 *
+bit 141 O 1 *
+bit 140 O 1 *
+bit 139 O 1 *
+bit 138 O 1 *
+bit 137 O 1 *
+bit 136 O 1 *
+bit 135 O 1 *
+bit 134 O 1 *
+bit 133 O 1 *
+bit 132 O 1 *
+bit 131 I 1 IO_D14
+bit 130 O 1 IO_D14 129 1 Z
+bit 129 C 1 *
+bit 128 I 1 IO_D13
+bit 127 O 1 IO_D13 126 1 Z
+bit 126 C 1 *
+bit 125 O 1 *
+bit 124 O 1 *
+bit 123 O 1 *
+bit 122 O 1 *
+bit 121 O 1 *
+bit 120 O 1 *
+bit 119 O 1 *
+bit 118 O 1 *
+bit 117 O 1 *
+bit 116 O 1 *
+bit 115 O 1 *
+bit 114 O 1 *
+bit 113 O 1 *
+bit 112 O 1 *
+bit 111 O 1 *
+bit 110 O 1 *
+bit 109 O 1 *
+bit 108 O 1 *
+bit 107 O 1 *
+bit 106 O 1 *
+bit 105 O 1 *
+bit 104 O 1 *
+bit 103 O 1 *
+bit 102 O 1 *
+bit 101 O 1 *
+bit 100 O 1 *
+bit 99 O 1 *
+bit 98 O 1 *
+bit 97 O 1 *
+bit 96 O 1 *
+bit 95 O 1 *
+bit 94 O 1 *
+bit 93 O 1 *
+bit 92 O 1 *
+bit 91 O 1 *
+bit 90 O 1 *
+bit 89 O 1 *
+bit 88 O 1 *
+bit 87 O 1 *
+bit 86 I 1 IO_A14
+bit 85 O 1 IO_A14 84 1 Z
+bit 84 C 1 *
+bit 83 I 1 IO_B14
+bit 82 O 1 IO_B14 81 1 Z
+bit 81 C 1 *
+bit 80 I 1 IO_C14
+bit 79 O 1 IO_C14 78 1 Z
+bit 78 C 1 *
+bit 77 I 1 IO_C15
+bit 76 O 1 IO_C15 75 1 Z
+bit 75 C 1 *
+bit 74 O 1 *
+bit 73 O 1 *
+bit 72 O 1 *
+bit 71 O 1 *
+bit 70 O 1 *
+bit 69 O 1 *
+bit 68 O 1 *
+bit 67 O 1 *
+bit 66 O 1 *
+bit 65 O 1 *
+bit 64 O 1 *
+bit 63 O 1 *
+bit 62 O 1 *
+bit 61 O 1 *
+bit 60 O 1 *
+bit 59 O 1 *
+bit 58 O 1 *
+bit 57 O 1 *
+bit 56 I 1 IO_A15
+bit 55 O 1 IO_A15 54 1 Z
+bit 54 C 1 *
+bit 53 I 1 IO_B15
+bit 52 O 1 IO_B15 51 1 Z
+bit 51 C 1 *
+bit 50 O 1 *
+bit 49 O 1 *
+bit 48 O 1 *
+bit 47 O 1 *
+bit 46 O 1 *
+bit 45 O 1 *
+bit 44 O 1 *
+bit 43 O 1 *
+bit 42 O 1 *
+bit 41 O 1 *
+bit 40 O 1 *
+bit 39 O 1 *
+bit 38 O 1 *
+bit 37 O 1 *
+bit 36 O 1 *
+bit 35 O 1 *
+bit 34 O 1 *
+bit 33 O 1 *
+bit 32 O 1 *
+bit 31 O 1 *
+bit 30 O 1 *
+bit 29 O 1 *
+bit 28 O 1 *
+bit 27 O 1 *
+bit 26 O 1 *
+bit 25 O 1 *
+bit 24 O 1 *
+bit 23 O 1 *
+bit 22 O 1 *
+bit 21 O 1 *
+bit 20 O 1 *
+bit 19 O 1 *
+bit 18 O 1 *
+bit 17 O 1 *
+bit 16 O 1 *
+bit 15 O 1 *
+bit 14 O 1 *
+bit 13 O 1 *
+bit 12 O 1 *
+bit 11 O 1 *
+bit 10 O 1 *
+bit 9 O 1 *
+bit 8 O 1 *
+bit 7 O 1 *
+bit 6 O 1 *
+bit 5 I 1 IO_A16
+bit 4 O 1 IO_A16 3 1 Z
+bit 3 C 1 *
+bit 2 I 1 IO_A17
+bit 1 O 1 IO_A17 0 1 Z
+bit 0 C 1 *
--- /dev/null
+signal GND1
+signal GND2
+signal GND3
+signal GND4
+signal GND5
+signal GND6
+signal GND7
+signal GND8
+signal GND9
+signal GND10
+signal GND11
+signal GND12
+signal GND13
+signal GND14
+signal GND15
+signal GND16
+signal GND17
+signal GND18
+signal GND19
+signal GND20
+signal GND21
+signal GND22
+signal GND23
+signal GND24
+signal GND25
+signal GND26
+signal GND27
+signal GND28
+signal GND29
+signal GND30
+signal GND31
+signal GND32
+signal GND33
+signal GND34
+signal GND35
+signal GND36
+signal GND37
+signal GND38
+signal GND39
+signal GND40
+signal GND41
+signal GND42
+signal GND43
+signal GND44
+signal GND45
+signal GND46
+signal GND47
+signal GND48
+signal GND49
+signal GND50
+signal GND51
+signal GND52
+signal CCLK_AA22
+signal DONE_AB21
+signal HSWAP_EN_B3
+signal M0_AB2
+signal M1_AA1
+signal M2_AB3
+signal PROG_B
+signal TCK
+signal TDI
+signal TDO
+signal TMS
+signal VCCAUX1
+signal VCCAUX2
+signal VCCAUX3
+signal VCCAUX4
+signal VCCAUX5
+signal VCCAUX6
+signal VCCAUX7
+signal VCCAUX8
+signal VCCINT1
+signal VCCINT2
+signal VCCINT3
+signal VCCINT4
+signal VCCINT5
+signal VCCINT6
+signal VCCINT7
+signal VCCINT8
+signal VCCINT9
+signal VCCINT10
+signal VCCINT11
+signal VCCINT12
+signal VCCO01
+signal VCCO02
+signal VCCO03
+signal VCCO04
+signal VCCO05
+signal VCCO11
+signal VCCO12
+signal VCCO13
+signal VCCO14
+signal VCCO15
+signal VCCO21
+signal VCCO22
+signal VCCO23
+signal VCCO24
+signal VCCO25
+signal VCCO31
+signal VCCO32
+signal VCCO33
+signal VCCO34
+signal VCCO35
+signal VCCO41
+signal VCCO42
+signal VCCO43
+signal VCCO44
+signal VCCO45
+signal VCCO51
+signal VCCO52
+signal VCCO53
+signal VCCO54
+signal VCCO55
+signal VCCO61
+signal VCCO62
+signal VCCO63
+signal VCCO64
+signal VCCO65
+signal VCCO71
+signal VCCO72
+signal VCCO73
+signal VCCO74
+signal VCCO75
+signal IO_A3
+signal IO_A4
+signal IO_A5
+signal IO_A7
+signal IO_A8
+signal IO_A9
+signal IO_A10
+signal IO_A11
+signal IO_A12
+signal IO_A13
+signal IO_A14
+signal IO_A15
+signal IO_A16
+signal IO_A18
+signal IO_A19
+signal IO_B4
+signal IO_B5
+signal IO_B6
+signal IO_B7
+signal IO_B8
+signal IO_B9
+signal IO_B10
+signal IO_B11
+signal IO_B12
+signal IO_B13
+signal IO_B14
+signal IO_B15
+signal IO_B16
+signal IO_B17
+signal IO_B18
+signal IO_B19
+signal IO_B20
+signal IO_C1
+signal IO_C2
+signal IO_C3
+signal IO_C4
+signal IO_C5
+signal IO_C6
+signal IO_C7
+signal IO_C10
+signal IO_C11
+signal IO_C12
+signal IO_C13
+signal IO_C16
+signal IO_C17
+signal IO_C18
+signal IO_C19
+signal IO_C20
+signal IO_C21
+signal IO_C22
+signal IO_D1
+signal IO_D2
+signal IO_D3
+signal IO_D4
+signal IO_D5
+signal IO_D6
+signal IO_D7
+signal IO_D8
+signal IO_D9
+signal IO_D10
+signal IO_D11
+signal IO_D12
+signal IO_D13
+signal IO_D14
+signal IO_D15
+signal IO_D16
+signal IO_D17
+signal IO_D18
+signal IO_D19
+signal IO_D20
+signal IO_D21
+signal IO_D22
+signal IO_E1
+signal IO_E2
+signal IO_E3
+signal IO_E4
+signal IO_E5
+signal IO_E6
+signal IO_E7
+signal IO_E8
+signal IO_E9
+signal IO_E10
+signal IO_E11
+signal IO_E12
+signal IO_E13
+signal IO_E14
+signal IO_E15
+signal IO_E16
+signal IO_E17
+signal IO_E18
+signal IO_E19
+signal IO_E20
+signal IO_E21
+signal IO_E22
+signal IO_F2
+signal IO_F3
+signal IO_F4
+signal IO_F5
+signal IO_F6
+signal IO_F7
+signal IO_F9
+signal IO_F10
+signal IO_F11
+signal IO_F12
+signal IO_F13
+signal IO_F14
+signal IO_F16
+signal IO_F17
+signal IO_F18
+signal IO_F19
+signal IO_F20
+signal IO_F21
+signal IO_G1
+signal IO_G2
+signal IO_G3
+signal IO_G4
+signal IO_G5
+signal IO_G6
+signal IO_G17
+signal IO_G18
+signal IO_G19
+signal IO_G20
+signal IO_G21
+signal IO_G22
+signal IO_H1
+signal IO_H2
+signal IO_H4
+signal IO_H5
+signal IO_H18
+signal IO_H19
+signal IO_H21
+signal IO_H22
+signal IO_J1
+signal IO_J2
+signal IO_J4
+signal IO_J5
+signal IO_J6
+signal IO_J17
+signal IO_J18
+signal IO_J19
+signal IO_J21
+signal IO_J22
+signal IO_K1
+signal IO_K2
+signal IO_K3
+signal IO_K4
+signal IO_K5
+signal IO_K6
+signal IO_K17
+signal IO_K18
+signal IO_K19
+signal IO_K20
+signal IO_K21
+signal IO_K22
+signal IO_L1
+signal IO_L2
+signal IO_L3
+signal IO_L4
+signal IO_L5
+signal IO_L6
+signal IO_L17
+signal IO_L18
+signal IO_L19
+signal IO_L20
+signal IO_L21
+signal IO_L22
+signal IO_M1
+signal IO_M2
+signal IO_M3
+signal IO_M4
+signal IO_M5
+signal IO_M6
+signal IO_M17
+signal IO_M18
+signal IO_M19
+signal IO_M20
+signal IO_M21
+signal IO_M22
+signal IO_N1
+signal IO_N2
+signal IO_N3
+signal IO_N4
+signal IO_N5
+signal IO_N6
+signal IO_N17
+signal IO_N18
+signal IO_N19
+signal IO_N20
+signal IO_N21
+signal IO_N22
+signal IO_P1
+signal IO_P2
+signal IO_P4
+signal IO_P5
+signal IO_P6
+signal IO_P17
+signal IO_P18
+signal IO_P19
+signal IO_P21
+signal IO_P22
+signal IO_R1
+signal IO_R2
+signal IO_R4
+signal IO_R5
+signal IO_R18
+signal IO_R19
+signal IO_R21
+signal IO_R22
+signal IO_T1
+signal IO_T2
+signal IO_T3
+signal IO_T4
+signal IO_T5
+signal IO_T6
+signal IO_T17
+signal IO_T18
+signal IO_T19
+signal IO_T20
+signal IO_T21
+signal IO_T22
+signal IO_U2
+signal IO_U3
+signal IO_U4
+signal IO_U5
+signal IO_U6
+signal IO_U7
+signal IO_U9
+signal IO_U10
+signal IO_U11
+signal IO_U12
+signal IO_U13
+signal IO_U14
+signal IO_U16
+signal IO_U17
+signal IO_U18
+signal IO_U19
+signal IO_U20
+signal IO_U21
+signal IO_V1
+signal IO_V2
+signal IO_V3
+signal IO_V4
+signal IO_V5
+signal IO_V6
+signal IO_V7
+signal IO_V8
+signal IO_V9
+signal IO_V10
+signal IO_V11
+signal IO_V12
+signal IO_V13
+signal IO_V14
+signal IO_V15
+signal IO_V16
+signal IO_V17
+signal IO_V18
+signal IO_V19
+signal IO_V20
+signal IO_V21
+signal IO_V22
+signal IO_W1
+signal IO_W2
+signal IO_W3
+signal IO_W4
+signal IO_W5
+signal IO_W6
+signal IO_W7
+signal IO_W8
+signal IO_W9
+signal IO_W10
+signal IO_W11
+signal IO_W12
+signal IO_W13
+signal IO_W14
+signal IO_W15
+signal IO_W16
+signal IO_W17
+signal IO_W18
+signal IO_W19
+signal IO_W20
+signal IO_W21
+signal IO_W22
+signal IO_Y1
+signal IO_Y2
+signal IO_Y3
+signal IO_Y4
+signal IO_Y5
+signal IO_Y6
+signal IO_Y7
+signal IO_Y10
+signal IO_Y11
+signal IO_Y12
+signal IO_Y13
+signal IO_Y16
+signal IO_Y17
+signal IO_Y18
+signal IO_Y19
+signal IO_Y20
+signal IO_Y21
+signal IO_Y22
+signal IO_AA3
+signal IO_AA4
+signal IO_AA5
+signal IO_AA6
+signal IO_AA7
+signal IO_AA8
+signal IO_AA9
+signal IO_AA10
+signal IO_AA11
+signal IO_AA12
+signal IO_AA13
+signal IO_AA14
+signal IO_AA15
+signal IO_AA16
+signal IO_AA17
+signal IO_AA18
+signal IO_AA19
+signal IO_AA20
+signal IO_AB4
+signal IO_AB5
+signal IO_AB7
+signal IO_AB8
+signal IO_AB9
+signal IO_AB10
+signal IO_AB11
+signal IO_AB12
+signal IO_AB13
+signal IO_AB14
+signal IO_AB15
+signal IO_AB16
+signal IO_AB18
+signal IO_AB19
+
+register BSR 1559
+register BR 1
+register DIR 32
+
+instruction length 6
+
+instruction EXTEST 000000 BSR
+instruction SAMPLE/PRELOAD 000001 BSR
+instruction IDCODE 001001 DIR
+instruction BYPASS 111111 BR
+
+bit 1558 I 1 IO_C20
+bit 1557 O 1 IO_C20 1556 1 Z
+bit 1556 C 1 *
+bit 1555 I 1 IO_C21
+bit 1554 O 1 IO_C21 1553 1 Z
+bit 1553 C 1 *
+bit 1552 O 1 *
+bit 1551 O 1 *
+bit 1550 O 1 *
+bit 1549 O 1 *
+bit 1548 O 1 *
+bit 1547 O 1 *
+bit 1546 O 1 *
+bit 1545 O 1 *
+bit 1544 O 1 *
+bit 1543 O 1 *
+bit 1542 O 1 *
+bit 1541 O 1 *
+bit 1540 O 1 *
+bit 1539 O 1 *
+bit 1538 O 1 *
+bit 1537 O 1 *
+bit 1536 O 1 *
+bit 1535 O 1 *
+bit 1534 O 1 *
+bit 1533 O 1 *
+bit 1532 O 1 *
+bit 1531 O 1 *
+bit 1530 O 1 *
+bit 1529 O 1 *
+bit 1528 O 1 *
+bit 1527 O 1 *
+bit 1526 O 1 *
+bit 1525 O 1 *
+bit 1524 O 1 *
+bit 1523 O 1 *
+bit 1522 O 1 *
+bit 1521 O 1 *
+bit 1520 O 1 *
+bit 1519 O 1 *
+bit 1518 O 1 *
+bit 1517 O 1 *
+bit 1516 O 1 *
+bit 1515 O 1 *
+bit 1514 O 1 *
+bit 1513 O 1 *
+bit 1512 O 1 *
+bit 1511 O 1 *
+bit 1510 O 1 *
+bit 1509 O 1 *
+bit 1508 O 1 *
+bit 1507 O 1 *
+bit 1506 O 1 *
+bit 1505 O 1 *
+bit 1504 O 1 *
+bit 1503 O 1 *
+bit 1502 O 1 *
+bit 1501 I 1 IO_C22
+bit 1500 O 1 IO_C22 1499 1 Z
+bit 1499 C 1 *
+bit 1498 I 1 IO_D20
+bit 1497 O 1 IO_D20 1496 1 Z
+bit 1496 C 1 *
+bit 1495 I 1 IO_D19
+bit 1494 O 1 IO_D19 1493 1 Z
+bit 1493 C 1 *
+bit 1492 I 1 IO_D21
+bit 1491 O 1 IO_D21 1490 1 Z
+bit 1490 C 1 *
+bit 1489 I 1 IO_D22
+bit 1488 O 1 IO_D22 1487 1 Z
+bit 1487 C 1 *
+bit 1486 I 1 IO_E18
+bit 1485 O 1 IO_E18 1484 1 Z
+bit 1484 C 1 *
+bit 1483 I 1 IO_F18
+bit 1482 O 1 IO_F18 1481 1 Z
+bit 1481 C 1 *
+bit 1480 I 1 IO_E19
+bit 1479 O 1 IO_E19 1478 1 Z
+bit 1478 C 1 *
+bit 1477 I 1 IO_E20
+bit 1476 O 1 IO_E20 1475 1 Z
+bit 1475 C 1 *
+bit 1474 I 1 IO_E21
+bit 1473 O 1 IO_E21 1472 1 Z
+bit 1472 C 1 *
+bit 1471 I 1 IO_E22
+bit 1470 O 1 IO_E22 1469 1 Z
+bit 1469 C 1 *
+bit 1468 I 1 IO_G17
+bit 1467 O 1 IO_G17 1466 1 Z
+bit 1466 C 1 *
+bit 1465 I 1 IO_G18
+bit 1464 O 1 IO_G18 1463 1 Z
+bit 1463 C 1 *
+bit 1462 I 1 IO_F19
+bit 1461 O 1 IO_F19 1460 1 Z
+bit 1460 C 1 *
+bit 1459 I 1 IO_G19
+bit 1458 O 1 IO_G19 1457 1 Z
+bit 1457 C 1 *
+bit 1456 I 1 IO_F20
+bit 1455 O 1 IO_F20 1454 1 Z
+bit 1454 C 1 *
+bit 1453 I 1 IO_F21
+bit 1452 O 1 IO_F21 1451 1 Z
+bit 1451 C 1 *
+bit 1450 I 1 IO_G20
+bit 1449 O 1 IO_G20 1448 1 Z
+bit 1448 C 1 *
+bit 1447 I 1 IO_H19
+bit 1446 O 1 IO_H19 1445 1 Z
+bit 1445 C 1 *
+bit 1444 I 1 IO_G21
+bit 1443 O 1 IO_G21 1442 1 Z
+bit 1442 C 1 *
+bit 1441 I 1 IO_G22
+bit 1440 O 1 IO_G22 1439 1 Z
+bit 1439 C 1 *
+bit 1438 I 1 IO_H18
+bit 1437 O 1 IO_H18 1436 1 Z
+bit 1436 C 1 *
+bit 1435 I 1 IO_J17
+bit 1434 O 1 IO_J17 1433 1 Z
+bit 1433 C 1 *
+bit 1432 I 1 IO_H21
+bit 1431 O 1 IO_H21 1430 1 Z
+bit 1430 C 1 *
+bit 1429 I 1 IO_H22
+bit 1428 O 1 IO_H22 1427 1 Z
+bit 1427 C 1 *
+bit 1426 O 1 *
+bit 1425 O 1 *
+bit 1424 O 1 *
+bit 1423 O 1 *
+bit 1422 O 1 *
+bit 1421 O 1 *
+bit 1420 I 1 IO_J18
+bit 1419 O 1 IO_J18 1418 1 Z
+bit 1418 C 1 *
+bit 1417 I 1 IO_J19
+bit 1416 O 1 IO_J19 1415 1 Z
+bit 1415 C 1 *
+bit 1414 I 1 IO_J21
+bit 1413 O 1 IO_J21 1412 1 Z
+bit 1412 C 1 *
+bit 1411 I 1 IO_J22
+bit 1410 O 1 IO_J22 1409 1 Z
+bit 1409 C 1 *
+bit 1408 I 1 IO_K17
+bit 1407 O 1 IO_K17 1406 1 Z
+bit 1406 C 1 *
+bit 1405 I 1 IO_K18
+bit 1404 O 1 IO_K18 1403 1 Z
+bit 1403 C 1 *
+bit 1402 I 1 IO_K19
+bit 1401 O 1 IO_K19 1400 1 Z
+bit 1400 C 1 *
+bit 1399 I 1 IO_K20
+bit 1398 O 1 IO_K20 1397 1 Z
+bit 1397 C 1 *
+bit 1396 I 1 IO_K21
+bit 1395 O 1 IO_K21 1394 1 Z
+bit 1394 C 1 *
+bit 1393 I 1 IO_K22
+bit 1392 O 1 IO_K22 1391 1 Z
+bit 1391 C 1 *
+bit 1390 O 1 *
+bit 1389 O 1 *
+bit 1388 O 1 *
+bit 1387 O 1 *
+bit 1386 O 1 *
+bit 1385 O 1 *
+bit 1384 I 1 IO_L17
+bit 1383 O 1 IO_L17 1382 1 Z
+bit 1382 C 1 *
+bit 1381 I 1 IO_L18
+bit 1380 O 1 IO_L18 1379 1 Z
+bit 1379 C 1 *
+bit 1378 I 1 IO_L19
+bit 1377 O 1 IO_L19 1376 1 Z
+bit 1376 C 1 *
+bit 1375 I 1 IO_L20
+bit 1374 O 1 IO_L20 1373 1 Z
+bit 1373 C 1 *
+bit 1372 I 1 IO_L21
+bit 1371 O 1 IO_L21 1370 1 Z
+bit 1370 C 1 *
+bit 1369 I 1 IO_L22
+bit 1368 O 1 IO_L22 1367 1 Z
+bit 1367 C 1 *
+bit 1366 I 1 IO_M22
+bit 1365 O 1 IO_M22 1364 1 Z
+bit 1364 C 1 *
+bit 1363 I 1 IO_M21
+bit 1362 O 1 IO_M21 1361 1 Z
+bit 1361 C 1 *
+bit 1360 I 1 IO_M20
+bit 1359 O 1 IO_M20 1358 1 Z
+bit 1358 C 1 *
+bit 1357 I 1 IO_M19
+bit 1356 O 1 IO_M19 1355 1 Z
+bit 1355 C 1 *
+bit 1354 I 1 IO_M18
+bit 1353 O 1 IO_M18 1352 1 Z
+bit 1352 C 1 *
+bit 1351 I 1 IO_M17
+bit 1350 O 1 IO_M17 1349 1 Z
+bit 1349 C 1 *
+bit 1348 O 1 *
+bit 1347 O 1 *
+bit 1346 O 1 *
+bit 1345 O 1 *
+bit 1344 O 1 *
+bit 1343 O 1 *
+bit 1342 I 1 IO_N22
+bit 1341 O 1 IO_N22 1340 1 Z
+bit 1340 C 1 *
+bit 1339 I 1 IO_N21
+bit 1338 O 1 IO_N21 1337 1 Z
+bit 1337 C 1 *
+bit 1336 I 1 IO_N20
+bit 1335 O 1 IO_N20 1334 1 Z
+bit 1334 C 1 *
+bit 1333 I 1 IO_N19
+bit 1332 O 1 IO_N19 1331 1 Z
+bit 1331 C 1 *
+bit 1330 I 1 IO_N18
+bit 1329 O 1 IO_N18 1328 1 Z
+bit 1328 C 1 *
+bit 1327 I 1 IO_N17
+bit 1326 O 1 IO_N17 1325 1 Z
+bit 1325 C 1 *
+bit 1324 I 1 IO_P22
+bit 1323 O 1 IO_P22 1322 1 Z
+bit 1322 C 1 *
+bit 1321 I 1 IO_P21
+bit 1320 O 1 IO_P21 1319 1 Z
+bit 1319 C 1 *
+bit 1318 I 1 IO_P18
+bit 1317 O 1 IO_P18 1316 1 Z
+bit 1316 C 1 *
+bit 1315 I 1 IO_P17
+bit 1314 O 1 IO_P17 1313 1 Z
+bit 1313 C 1 *
+bit 1312 O 1 *
+bit 1311 O 1 *
+bit 1310 O 1 *
+bit 1309 O 1 *
+bit 1308 O 1 *
+bit 1307 O 1 *
+bit 1306 I 1 IO_P19
+bit 1305 O 1 IO_P19 1304 1 Z
+bit 1304 C 1 *
+bit 1303 I 1 IO_R19
+bit 1302 O 1 IO_R19 1301 1 Z
+bit 1301 C 1 *
+bit 1300 I 1 IO_R22
+bit 1299 O 1 IO_R22 1298 1 Z
+bit 1298 C 1 *
+bit 1297 I 1 IO_R21
+bit 1296 O 1 IO_R21 1295 1 Z
+bit 1295 C 1 *
+bit 1294 I 1 IO_T22
+bit 1293 O 1 IO_T22 1292 1 Z
+bit 1292 C 1 *
+bit 1291 I 1 IO_T21
+bit 1290 O 1 IO_T21 1289 1 Z
+bit 1289 C 1 *
+bit 1288 I 1 IO_T20
+bit 1287 O 1 IO_T20 1286 1 Z
+bit 1286 C 1 *
+bit 1285 I 1 IO_T19
+bit 1284 O 1 IO_T19 1283 1 Z
+bit 1283 C 1 *
+bit 1282 I 1 IO_R18
+bit 1281 O 1 IO_R18 1280 1 Z
+bit 1280 C 1 *
+bit 1279 I 1 IO_T18
+bit 1278 O 1 IO_T18 1277 1 Z
+bit 1277 C 1 *
+bit 1276 I 1 IO_U21
+bit 1275 O 1 IO_U21 1274 1 Z
+bit 1274 C 1 *
+bit 1273 I 1 IO_U20
+bit 1272 O 1 IO_U20 1271 1 Z
+bit 1271 C 1 *
+bit 1270 I 1 IO_T17
+bit 1269 O 1 IO_T17 1268 1 Z
+bit 1268 C 1 *
+bit 1267 I 1 IO_U18
+bit 1266 O 1 IO_U18 1265 1 Z
+bit 1265 C 1 *
+bit 1264 I 1 IO_V22
+bit 1263 O 1 IO_V22 1262 1 Z
+bit 1262 C 1 *
+bit 1261 I 1 IO_V21
+bit 1260 O 1 IO_V21 1259 1 Z
+bit 1259 C 1 *
+bit 1258 I 1 IO_U19
+bit 1257 O 1 IO_U19 1256 1 Z
+bit 1256 C 1 *
+bit 1255 I 1 IO_V20
+bit 1254 O 1 IO_V20 1253 1 Z
+bit 1253 C 1 *
+bit 1252 I 1 IO_W21
+bit 1251 O 1 IO_W21 1250 1 Z
+bit 1250 C 1 *
+bit 1249 I 1 IO_W20
+bit 1248 O 1 IO_W20 1247 1 Z
+bit 1247 C 1 *
+bit 1246 I 1 IO_V19
+bit 1245 O 1 IO_V19 1244 1 Z
+bit 1244 C 1 *
+bit 1243 I 1 IO_W19
+bit 1242 O 1 IO_W19 1241 1 Z
+bit 1241 C 1 *
+bit 1240 I 1 IO_W22
+bit 1239 O 1 IO_W22 1238 1 Z
+bit 1238 C 1 *
+bit 1237 I 1 IO_Y22
+bit 1236 O 1 IO_Y22 1235 1 Z
+bit 1235 C 1 *
+bit 1234 I 1 IO_Y21
+bit 1233 O 1 IO_Y21 1232 1 Z
+bit 1232 C 1 *
+bit 1231 O 1 *
+bit 1230 O 1 *
+bit 1229 O 1 *
+bit 1228 O 1 *
+bit 1227 O 1 *
+bit 1226 O 1 *
+bit 1225 O 1 *
+bit 1224 O 1 *
+bit 1223 O 1 *
+bit 1222 O 1 *
+bit 1221 O 1 *
+bit 1220 O 1 *
+bit 1219 O 1 *
+bit 1218 O 1 *
+bit 1217 O 1 *
+bit 1216 O 1 *
+bit 1215 O 1 *
+bit 1214 O 1 *
+bit 1213 O 1 *
+bit 1212 O 1 *
+bit 1211 O 1 *
+bit 1210 O 1 *
+bit 1209 O 1 *
+bit 1208 O 1 *
+bit 1207 O 1 *
+bit 1206 O 1 *
+bit 1205 O 1 *
+bit 1204 O 1 *
+bit 1203 O 1 *
+bit 1202 O 1 *
+bit 1201 O 1 *
+bit 1200 O 1 *
+bit 1199 O 1 *
+bit 1198 O 1 *
+bit 1197 O 1 *
+bit 1196 O 1 *
+bit 1195 O 1 *
+bit 1194 O 1 *
+bit 1193 O 1 *
+bit 1192 O 1 *
+bit 1191 O 1 *
+bit 1190 O 1 *
+bit 1189 O 1 *
+bit 1188 O 1 *
+bit 1187 O 1 *
+bit 1186 O 1 *
+bit 1185 O 1 *
+bit 1184 O 1 *
+bit 1183 O 1 *
+bit 1182 O 1 *
+bit 1181 O 1 *
+bit 1180 I 1 IO_Y20
+bit 1179 O 1 IO_Y20 1178 1 Z
+bit 1178 C 1 *
+bit 1177 I 1 IO_Y19
+bit 1176 O 1 IO_Y19 1175 1 Z
+bit 1175 C 1 *
+bit 1174 I 1 CCLK_AA22
+bit 1173 O 1 CCLK_AA22 1172 1 Z
+bit 1172 C 1 *
+bit 1171 I 1 DONE_AB21
+bit 1170 O 1 DONE_AB21 1169 1 Z
+bit 1169 C 1 *
+bit 1168 I 1 IO_V18
+bit 1167 O 1 IO_V18 1166 1 Z
+bit 1166 C 1 *
+bit 1165 I 1 IO_AA20
+bit 1164 O 1 IO_AA20 1163 1 Z
+bit 1163 C 1 *
+bit 1162 I 1 IO_AB20
+bit 1161 O 1 IO_AB20 1160 1 Z
+bit 1160 C 1 *
+bit 1159 O 1 *
+bit 1158 O 1 *
+bit 1157 O 1 *
+bit 1156 O 1 *
+bit 1155 O 1 *
+bit 1154 O 1 *
+bit 1153 O 1 *
+bit 1152 O 1 *
+bit 1151 O 1 *
+bit 1150 I 1 IO_AA19
+bit 1149 O 1 IO_AA19 1148 1 Z
+bit 1148 C 1 *
+bit 1147 I 1 IO_AB19
+bit 1146 O 1 IO_AB19 1145 1 Z
+bit 1145 C 1 *
+bit 1144 I 1 IO_W18
+bit 1143 O 1 IO_W18 1142 1 Z
+bit 1142 C 1 *
+bit 1141 I 1 IO_Y18
+bit 1140 O 1 IO_Y18 1139 1 Z
+bit 1139 C 1 *
+bit 1138 O 1 *
+bit 1137 O 1 *
+bit 1136 O 1 *
+bit 1135 O 1 *
+bit 1134 O 1 *
+bit 1133 O 1 *
+bit 1132 O 1 *
+bit 1131 O 1 *
+bit 1130 O 1 *
+bit 1129 O 1 *
+bit 1128 O 1 *
+bit 1127 O 1 *
+bit 1126 O 1 *
+bit 1125 O 1 *
+bit 1124 O 1 *
+bit 1123 I 1 IO_U17
+bit 1122 O 1 IO_U17 1121 1 Z
+bit 1121 C 1 *
+bit 1120 I 1 IO_AA18
+bit 1119 O 1 IO_AA18 1118 1 Z
+bit 1118 C 1 *
+bit 1117 I 1 IO_AB18
+bit 1116 O 1 IO_AB18 1115 1 Z
+bit 1115 C 1 *
+bit 1114 I 1 IO_V17
+bit 1113 O 1 IO_V17 1112 1 Z
+bit 1112 C 1 *
+bit 1111 I 1 IO_W17
+bit 1110 O 1 IO_W17 1109 1 Z
+bit 1109 C 1 *
+bit 1108 I 1 IO_U16
+bit 1107 O 1 IO_U16 1106 1 Z
+bit 1106 C 1 *
+bit 1105 O 1 *
+bit 1104 O 1 *
+bit 1103 O 1 *
+bit 1102 O 1 *
+bit 1101 O 1 *
+bit 1100 O 1 *
+bit 1099 O 1 *
+bit 1098 O 1 *
+bit 1097 O 1 *
+bit 1096 O 1 *
+bit 1095 O 1 *
+bit 1094 O 1 *
+bit 1093 O 1 *
+bit 1092 O 1 *
+bit 1091 O 1 *
+bit 1090 I 1 IO_Y17
+bit 1089 O 1 IO_Y17 1088 1 Z
+bit 1088 C 1 *
+bit 1087 I 1 IO_AA17
+bit 1086 O 1 IO_AA17 1085 1 Z
+bit 1085 C 1 *
+bit 1084 I 1 IO_V16
+bit 1083 O 1 IO_V16 1082 1 Z
+bit 1082 C 1 *
+bit 1081 I 1 IO_W16
+bit 1080 O 1 IO_W16 1079 1 Z
+bit 1079 C 1 *
+bit 1078 O 1 *
+bit 1077 O 1 *
+bit 1076 O 1 *
+bit 1075 O 1 *
+bit 1074 O 1 *
+bit 1073 O 1 *
+bit 1072 O 1 *
+bit 1071 O 1 *
+bit 1070 O 1 *
+bit 1069 O 1 *
+bit 1068 O 1 *
+bit 1067 O 1 *
+bit 1066 O 1 *
+bit 1065 O 1 *
+bit 1064 O 1 *
+bit 1063 I 1 IO_Y16
+bit 1062 O 1 IO_Y16 1061 1 Z
+bit 1061 C 1 *
+bit 1060 I 1 IO_AA16
+bit 1059 O 1 IO_AA16 1058 1 Z
+bit 1058 C 1 *
+bit 1057 I 1 IO_AB16
+bit 1056 O 1 IO_AB16 1055 1 Z
+bit 1055 C 1 *
+bit 1054 I 1 IO_V15
+bit 1053 O 1 IO_V15 1052 1 Z
+bit 1052 C 1 *
+bit 1051 I 1 IO_W15
+bit 1050 O 1 IO_W15 1049 1 Z
+bit 1049 C 1 *
+bit 1048 O 1 *
+bit 1047 O 1 *
+bit 1046 O 1 *
+bit 1045 O 1 *
+bit 1044 O 1 *
+bit 1043 O 1 *
+bit 1042 O 1 *
+bit 1041 O 1 *
+bit 1040 O 1 *
+bit 1039 I 1 IO_AA15
+bit 1038 O 1 IO_AA15 1037 1 Z
+bit 1037 C 1 *
+bit 1036 I 1 IO_AB15
+bit 1035 O 1 IO_AB15 1034 1 Z
+bit 1034 C 1 *
+bit 1033 O 1 *
+bit 1032 O 1 *
+bit 1031 O 1 *
+bit 1030 I 1 IO_U14
+bit 1029 O 1 IO_U14 1028 1 Z
+bit 1028 C 1 *
+bit 1027 I 1 IO_V14
+bit 1026 O 1 IO_V14 1025 1 Z
+bit 1025 C 1 *
+bit 1024 O 1 *
+bit 1023 O 1 *
+bit 1022 O 1 *
+bit 1021 O 1 *
+bit 1020 O 1 *
+bit 1019 O 1 *
+bit 1018 I 1 IO_W14
+bit 1017 O 1 IO_W14 1016 1 Z
+bit 1016 C 1 *
+bit 1015 I 1 IO_AA14
+bit 1014 O 1 IO_AA14 1013 1 Z
+bit 1013 C 1 *
+bit 1012 I 1 IO_AB14
+bit 1011 O 1 IO_AB14 1010 1 Z
+bit 1010 C 1 *
+bit 1009 I 1 IO_U13
+bit 1008 O 1 IO_U13 1007 1 Z
+bit 1007 C 1 *
+bit 1006 I 1 IO_V13
+bit 1005 O 1 IO_V13 1004 1 Z
+bit 1004 C 1 *
+bit 1003 I 1 IO_W13
+bit 1002 O 1 IO_W13 1001 1 Z
+bit 1001 C 1 *
+bit 1000 I 1 IO_Y13
+bit 999 O 1 IO_Y13 998 1 Z
+bit 998 C 1 *
+bit 997 I 1 IO_AA13
+bit 996 O 1 IO_AA13 995 1 Z
+bit 995 C 1 *
+bit 994 I 1 IO_U12
+bit 993 O 1 IO_U12 992 1 Z
+bit 992 C 1 *
+bit 991 I 1 IO_V12
+bit 990 O 1 IO_V12 989 1 Z
+bit 989 C 1 *
+bit 988 I 1 IO_AB13
+bit 987 O 1 IO_AB13 986 1 Z
+bit 986 C 1 *
+bit 985 I 1 IO_W12
+bit 984 O 1 IO_W12 983 1 Z
+bit 983 C 1 *
+bit 982 I 1 IO_Y12
+bit 981 O 1 IO_Y12 980 1 Z
+bit 980 C 1 *
+bit 979 I 1 IO_AA12
+bit 978 O 1 IO_AA12 977 1 Z
+bit 977 C 1 *
+bit 976 I 1 IO_AB12
+bit 975 O 1 IO_AB12 974 1 Z
+bit 974 C 1 *
+bit 973 I 1 IO_AB11
+bit 972 O 1 IO_AB11 971 1 Z
+bit 971 C 1 *
+bit 970 I 1 IO_AA11
+bit 969 O 1 IO_AA11 968 1 Z
+bit 968 C 1 *
+bit 967 I 1 IO_Y11
+bit 966 O 1 IO_Y11 965 1 Z
+bit 965 C 1 *
+bit 964 I 1 IO_W11
+bit 963 O 1 IO_W11 962 1 Z
+bit 962 C 1 *
+bit 961 I 1 IO_V11
+bit 960 O 1 IO_V11 959 1 Z
+bit 959 C 1 *
+bit 958 I 1 IO_U11
+bit 957 O 1 IO_U11 956 1 Z
+bit 956 C 1 *
+bit 955 I 1 IO_AB10
+bit 954 O 1 IO_AB10 953 1 Z
+bit 953 C 1 *
+bit 952 I 1 IO_AA10
+bit 951 O 1 IO_AA10 950 1 Z
+bit 950 C 1 *
+bit 949 I 1 IO_Y10
+bit 948 O 1 IO_Y10 947 1 Z
+bit 947 C 1 *
+bit 946 I 1 IO_W10
+bit 945 O 1 IO_W10 944 1 Z
+bit 944 C 1 *
+bit 943 I 1 IO_V10
+bit 942 O 1 IO_V10 941 1 Z
+bit 941 C 1 *
+bit 940 I 1 IO_AB9
+bit 939 O 1 IO_AB9 938 1 Z
+bit 938 C 1 *
+bit 937 I 1 IO_AA9
+bit 936 O 1 IO_AA9 935 1 Z
+bit 935 C 1 *
+bit 934 I 1 IO_W9
+bit 933 O 1 IO_W9 932 1 Z
+bit 932 C 1 *
+bit 931 I 1 IO_V9
+bit 930 O 1 IO_V9 929 1 Z
+bit 929 C 1 *
+bit 928 I 1 IO_U10
+bit 927 O 1 IO_U10 926 1 Z
+bit 926 C 1 *
+bit 925 O 1 *
+bit 924 O 1 *
+bit 923 O 1 *
+bit 922 O 1 *
+bit 921 O 1 *
+bit 920 O 1 *
+bit 919 I 1 IO_AB8
+bit 918 O 1 IO_AB8 917 1 Z
+bit 917 C 1 *
+bit 916 I 1 IO_AA8
+bit 915 O 1 IO_AA8 914 1 Z
+bit 914 C 1 *
+bit 913 O 1 *
+bit 912 O 1 *
+bit 911 O 1 *
+bit 910 I 1 IO_W8
+bit 909 O 1 IO_W8 908 1 Z
+bit 908 C 1 *
+bit 907 I 1 IO_V8
+bit 906 O 1 IO_V8 905 1 Z
+bit 905 C 1 *
+bit 904 O 1 *
+bit 903 O 1 *
+bit 902 O 1 *
+bit 901 O 1 *
+bit 900 O 1 *
+bit 899 O 1 *
+bit 898 I 1 IO_U9
+bit 897 O 1 IO_U9 896 1 Z
+bit 896 C 1 *
+bit 895 I 1 IO_AB7
+bit 894 O 1 IO_AB7 893 1 Z
+bit 893 C 1 *
+bit 892 I 1 IO_AA7
+bit 891 O 1 IO_AA7 890 1 Z
+bit 890 C 1 *
+bit 889 I 1 IO_Y7
+bit 888 O 1 IO_Y7 887 1 Z
+bit 887 C 1 *
+bit 886 I 1 IO_W7
+bit 885 O 1 IO_W7 884 1 Z
+bit 884 C 1 *
+bit 883 O 1 *
+bit 882 O 1 *
+bit 881 O 1 *
+bit 880 O 1 *
+bit 879 O 1 *
+bit 878 O 1 *
+bit 877 O 1 *
+bit 876 O 1 *
+bit 875 O 1 *
+bit 874 O 1 *
+bit 873 O 1 *
+bit 872 O 1 *
+bit 871 O 1 *
+bit 870 O 1 *
+bit 869 O 1 *
+bit 868 I 1 IO_V7
+bit 867 O 1 IO_V7 866 1 Z
+bit 866 C 1 *
+bit 865 I 1 IO_AA6
+bit 864 O 1 IO_AA6 863 1 Z
+bit 863 C 1 *
+bit 862 I 1 IO_Y6
+bit 861 O 1 IO_Y6 860 1 Z
+bit 860 C 1 *
+bit 859 I 1 IO_W6
+bit 858 O 1 IO_W6 857 1 Z
+bit 857 C 1 *
+bit 856 I 1 IO_V6
+bit 855 O 1 IO_V6 854 1 Z
+bit 854 C 1 *
+bit 853 O 1 *
+bit 852 O 1 *
+bit 851 O 1 *
+bit 850 O 1 *
+bit 849 O 1 *
+bit 848 O 1 *
+bit 847 O 1 *
+bit 846 O 1 *
+bit 845 O 1 *
+bit 844 O 1 *
+bit 843 O 1 *
+bit 842 O 1 *
+bit 841 O 1 *
+bit 840 O 1 *
+bit 839 O 1 *
+bit 838 I 1 IO_U7
+bit 837 O 1 IO_U7 836 1 Z
+bit 836 C 1 *
+bit 835 I 1 IO_AB5
+bit 834 O 1 IO_AB5 833 1 Z
+bit 833 C 1 *
+bit 832 I 1 IO_AA5
+bit 831 O 1 IO_AA5 830 1 Z
+bit 830 C 1 *
+bit 829 I 1 IO_Y5
+bit 828 O 1 IO_Y5 827 1 Z
+bit 827 C 1 *
+bit 826 I 1 IO_W5
+bit 825 O 1 IO_W5 824 1 Z
+bit 824 C 1 *
+bit 823 O 1 *
+bit 822 O 1 *
+bit 821 O 1 *
+bit 820 O 1 *
+bit 819 O 1 *
+bit 818 O 1 *
+bit 817 O 1 *
+bit 816 O 1 *
+bit 815 O 1 *
+bit 814 O 1 *
+bit 813 O 1 *
+bit 812 O 1 *
+bit 811 O 1 *
+bit 810 O 1 *
+bit 809 O 1 *
+bit 808 I 1 IO_U6
+bit 807 O 1 IO_U6 806 1 Z
+bit 806 C 1 *
+bit 805 I 1 IO_AB4
+bit 804 O 1 IO_AB4 803 1 Z
+bit 803 C 1 *
+bit 802 I 1 IO_AA4
+bit 801 O 1 IO_AA4 800 1 Z
+bit 800 C 1 *
+bit 799 O 1 *
+bit 798 O 1 *
+bit 797 O 1 *
+bit 796 O 1 *
+bit 795 O 1 *
+bit 794 O 1 *
+bit 793 O 1 *
+bit 792 O 1 *
+bit 791 O 1 *
+bit 790 O 1 *
+bit 789 O 1 *
+bit 788 O 1 *
+bit 787 O 1 *
+bit 786 O 1 *
+bit 785 O 1 *
+bit 784 I 1 IO_Y4
+bit 783 O 1 IO_Y4 782 1 Z
+bit 782 C 1 *
+bit 781 I 1 IO_AA3
+bit 780 O 1 IO_AA3 779 1 Z
+bit 779 C 1 *
+bit 778 I 1 M2_AB3
+bit 777 I 1 M0_AB2
+bit 776 I 1 M1_AA1
+bit 775 I 1 IO_Y3
+bit 774 O 1 IO_Y3 773 1 Z
+bit 773 C 1 *
+bit 772 I 1 IO_Y2
+bit 771 O 1 IO_Y2 770 1 Z
+bit 770 C 1 *
+bit 769 O 1 *
+bit 768 O 1 *
+bit 767 O 1 *
+bit 766 O 1 *
+bit 765 O 1 *
+bit 764 O 1 *
+bit 763 O 1 *
+bit 762 O 1 *
+bit 761 O 1 *
+bit 760 O 1 *
+bit 759 O 1 *
+bit 758 O 1 *
+bit 757 O 1 *
+bit 756 O 1 *
+bit 755 O 1 *
+bit 754 O 1 *
+bit 753 O 1 *
+bit 752 O 1 *
+bit 751 O 1 *
+bit 750 O 1 *
+bit 749 O 1 *
+bit 748 O 1 *
+bit 747 O 1 *
+bit 746 O 1 *
+bit 745 O 1 *
+bit 744 O 1 *
+bit 743 O 1 *
+bit 742 O 1 *
+bit 741 O 1 *
+bit 740 O 1 *
+bit 739 O 1 *
+bit 738 O 1 *
+bit 737 O 1 *
+bit 736 O 1 *
+bit 735 O 1 *
+bit 734 O 1 *
+bit 733 O 1 *
+bit 732 O 1 *
+bit 731 O 1 *
+bit 730 O 1 *
+bit 729 O 1 *
+bit 728 O 1 *
+bit 727 O 1 *
+bit 726 O 1 *
+bit 725 O 1 *
+bit 724 O 1 *
+bit 723 O 1 *
+bit 722 O 1 *
+bit 721 O 1 *
+bit 720 O 1 *
+bit 719 O 1 *
+bit 718 I 1 IO_Y1
+bit 717 O 1 IO_Y1 716 1 Z
+bit 716 C 1 *
+bit 715 I 1 IO_W4
+bit 714 O 1 IO_W4 713 1 Z
+bit 713 C 1 *
+bit 712 I 1 IO_W3
+bit 711 O 1 IO_W3 710 1 Z
+bit 710 C 1 *
+bit 709 I 1 IO_W2
+bit 708 O 1 IO_W2 707 1 Z
+bit 707 C 1 *
+bit 706 I 1 IO_W1
+bit 705 O 1 IO_W1 704 1 Z
+bit 704 C 1 *
+bit 703 I 1 IO_V5
+bit 702 O 1 IO_V5 701 1 Z
+bit 701 C 1 *
+bit 700 I 1 IO_U5
+bit 699 O 1 IO_U5 698 1 Z
+bit 698 C 1 *
+bit 697 I 1 IO_V4
+bit 696 O 1 IO_V4 695 1 Z
+bit 695 C 1 *
+bit 694 I 1 IO_V3
+bit 693 O 1 IO_V3 692 1 Z
+bit 692 C 1 *
+bit 691 I 1 IO_V2
+bit 690 O 1 IO_V2 689 1 Z
+bit 689 C 1 *
+bit 688 I 1 IO_V1
+bit 687 O 1 IO_V1 686 1 Z
+bit 686 C 1 *
+bit 685 I 1 IO_T6
+bit 684 O 1 IO_T6 683 1 Z
+bit 683 C 1 *
+bit 682 I 1 IO_T5
+bit 681 O 1 IO_T5 680 1 Z
+bit 680 C 1 *
+bit 679 I 1 IO_U4
+bit 678 O 1 IO_U4 677 1 Z
+bit 677 C 1 *
+bit 676 I 1 IO_T4
+bit 675 O 1 IO_T4 674 1 Z
+bit 674 C 1 *
+bit 673 I 1 IO_U3
+bit 672 O 1 IO_U3 671 1 Z
+bit 671 C 1 *
+bit 670 I 1 IO_U2
+bit 669 O 1 IO_U2 668 1 Z
+bit 668 C 1 *
+bit 667 I 1 IO_T3
+bit 666 O 1 IO_T3 665 1 Z
+bit 665 C 1 *
+bit 664 I 1 IO_R4
+bit 663 O 1 IO_R4 662 1 Z
+bit 662 C 1 *
+bit 661 I 1 IO_T2
+bit 660 O 1 IO_T2 659 1 Z
+bit 659 C 1 *
+bit 658 I 1 IO_T1
+bit 657 O 1 IO_T1 656 1 Z
+bit 656 C 1 *
+bit 655 I 1 IO_R5
+bit 654 O 1 IO_R5 653 1 Z
+bit 653 C 1 *
+bit 652 I 1 IO_P6
+bit 651 O 1 IO_P6 650 1 Z
+bit 650 C 1 *
+bit 649 I 1 IO_R2
+bit 648 O 1 IO_R2 647 1 Z
+bit 647 C 1 *
+bit 646 I 1 IO_R1
+bit 645 O 1 IO_R1 644 1 Z
+bit 644 C 1 *
+bit 643 O 1 *
+bit 642 O 1 *
+bit 641 O 1 *
+bit 640 O 1 *
+bit 639 O 1 *
+bit 638 O 1 *
+bit 637 I 1 IO_P5
+bit 636 O 1 IO_P5 635 1 Z
+bit 635 C 1 *
+bit 634 I 1 IO_P4
+bit 633 O 1 IO_P4 632 1 Z
+bit 632 C 1 *
+bit 631 I 1 IO_P2
+bit 630 O 1 IO_P2 629 1 Z
+bit 629 C 1 *
+bit 628 I 1 IO_P1
+bit 627 O 1 IO_P1 626 1 Z
+bit 626 C 1 *
+bit 625 I 1 IO_N6
+bit 624 O 1 IO_N6 623 1 Z
+bit 623 C 1 *
+bit 622 I 1 IO_N5
+bit 621 O 1 IO_N5 620 1 Z
+bit 620 C 1 *
+bit 619 I 1 IO_N4
+bit 618 O 1 IO_N4 617 1 Z
+bit 617 C 1 *
+bit 616 I 1 IO_N3
+bit 615 O 1 IO_N3 614 1 Z
+bit 614 C 1 *
+bit 613 I 1 IO_N2
+bit 612 O 1 IO_N2 611 1 Z
+bit 611 C 1 *
+bit 610 I 1 IO_N1
+bit 609 O 1 IO_N1 608 1 Z
+bit 608 C 1 *
+bit 607 O 1 *
+bit 606 O 1 *
+bit 605 O 1 *
+bit 604 O 1 *
+bit 603 O 1 *
+bit 602 O 1 *
+bit 601 I 1 IO_M6
+bit 600 O 1 IO_M6 599 1 Z
+bit 599 C 1 *
+bit 598 I 1 IO_M5
+bit 597 O 1 IO_M5 596 1 Z
+bit 596 C 1 *
+bit 595 I 1 IO_M4
+bit 594 O 1 IO_M4 593 1 Z
+bit 593 C 1 *
+bit 592 I 1 IO_M3
+bit 591 O 1 IO_M3 590 1 Z
+bit 590 C 1 *
+bit 589 I 1 IO_M2
+bit 588 O 1 IO_M2 587 1 Z
+bit 587 C 1 *
+bit 586 I 1 IO_M1
+bit 585 O 1 IO_M1 584 1 Z
+bit 584 C 1 *
+bit 583 I 1 IO_L1
+bit 582 O 1 IO_L1 581 1 Z
+bit 581 C 1 *
+bit 580 I 1 IO_L2
+bit 579 O 1 IO_L2 578 1 Z
+bit 578 C 1 *
+bit 577 I 1 IO_L3
+bit 576 O 1 IO_L3 575 1 Z
+bit 575 C 1 *
+bit 574 I 1 IO_L4
+bit 573 O 1 IO_L4 572 1 Z
+bit 572 C 1 *
+bit 571 I 1 IO_L5
+bit 570 O 1 IO_L5 569 1 Z
+bit 569 C 1 *
+bit 568 I 1 IO_L6
+bit 567 O 1 IO_L6 566 1 Z
+bit 566 C 1 *
+bit 565 O 1 *
+bit 564 O 1 *
+bit 563 O 1 *
+bit 562 O 1 *
+bit 561 O 1 *
+bit 560 O 1 *
+bit 559 I 1 IO_K1
+bit 558 O 1 IO_K1 557 1 Z
+bit 557 C 1 *
+bit 556 I 1 IO_K2
+bit 555 O 1 IO_K2 554 1 Z
+bit 554 C 1 *
+bit 553 I 1 IO_K3
+bit 552 O 1 IO_K3 551 1 Z
+bit 551 C 1 *
+bit 550 I 1 IO_K4
+bit 549 O 1 IO_K4 548 1 Z
+bit 548 C 1 *
+bit 547 I 1 IO_K5
+bit 546 O 1 IO_K5 545 1 Z
+bit 545 C 1 *
+bit 544 I 1 IO_K6
+bit 543 O 1 IO_K6 542 1 Z
+bit 542 C 1 *
+bit 541 I 1 IO_J1
+bit 540 O 1 IO_J1 539 1 Z
+bit 539 C 1 *
+bit 538 I 1 IO_J2
+bit 537 O 1 IO_J2 536 1 Z
+bit 536 C 1 *
+bit 535 I 1 IO_J5
+bit 534 O 1 IO_J5 533 1 Z
+bit 533 C 1 *
+bit 532 I 1 IO_J6
+bit 531 O 1 IO_J6 530 1 Z
+bit 530 C 1 *
+bit 529 O 1 *
+bit 528 O 1 *
+bit 527 O 1 *
+bit 526 O 1 *
+bit 525 O 1 *
+bit 524 O 1 *
+bit 523 I 1 IO_J4
+bit 522 O 1 IO_J4 521 1 Z
+bit 521 C 1 *
+bit 520 I 1 IO_H4
+bit 519 O 1 IO_H4 518 1 Z
+bit 518 C 1 *
+bit 517 I 1 IO_H1
+bit 516 O 1 IO_H1 515 1 Z
+bit 515 C 1 *
+bit 514 I 1 IO_H2
+bit 513 O 1 IO_H2 512 1 Z
+bit 512 C 1 *
+bit 511 I 1 IO_G1
+bit 510 O 1 IO_G1 509 1 Z
+bit 509 C 1 *
+bit 508 I 1 IO_G2
+bit 507 O 1 IO_G2 506 1 Z
+bit 506 C 1 *
+bit 505 I 1 IO_G3
+bit 504 O 1 IO_G3 503 1 Z
+bit 503 C 1 *
+bit 502 I 1 IO_G4
+bit 501 O 1 IO_G4 500 1 Z
+bit 500 C 1 *
+bit 499 I 1 IO_H5
+bit 498 O 1 IO_H5 497 1 Z
+bit 497 C 1 *
+bit 496 I 1 IO_G5
+bit 495 O 1 IO_G5 494 1 Z
+bit 494 C 1 *
+bit 493 I 1 IO_F2
+bit 492 O 1 IO_F2 491 1 Z
+bit 491 C 1 *
+bit 490 I 1 IO_F3
+bit 489 O 1 IO_F3 488 1 Z
+bit 488 C 1 *
+bit 487 I 1 IO_G6
+bit 486 O 1 IO_G6 485 1 Z
+bit 485 C 1 *
+bit 484 I 1 IO_F5
+bit 483 O 1 IO_F5 482 1 Z
+bit 482 C 1 *
+bit 481 I 1 IO_E1
+bit 480 O 1 IO_E1 479 1 Z
+bit 479 C 1 *
+bit 478 I 1 IO_E2
+bit 477 O 1 IO_E2 476 1 Z
+bit 476 C 1 *
+bit 475 I 1 IO_F4
+bit 474 O 1 IO_F4 473 1 Z
+bit 473 C 1 *
+bit 472 I 1 IO_E3
+bit 471 O 1 IO_E3 470 1 Z
+bit 470 C 1 *
+bit 469 I 1 IO_D3
+bit 468 O 1 IO_D3 467 1 Z
+bit 467 C 1 *
+bit 466 I 1 IO_D2
+bit 465 O 1 IO_D2 464 1 Z
+bit 464 C 1 *
+bit 463 I 1 IO_E4
+bit 462 O 1 IO_E4 461 1 Z
+bit 461 C 1 *
+bit 460 I 1 IO_D4
+bit 459 O 1 IO_D4 458 1 Z
+bit 458 C 1 *
+bit 457 I 1 IO_D1
+bit 456 O 1 IO_D1 455 1 Z
+bit 455 C 1 *
+bit 454 I 1 IO_C1
+bit 453 O 1 IO_C1 452 1 Z
+bit 452 C 1 *
+bit 451 I 1 IO_C2
+bit 450 O 1 IO_C2 449 1 Z
+bit 449 C 1 *
+bit 448 O 1 *
+bit 447 O 1 *
+bit 446 O 1 *
+bit 445 O 1 *
+bit 444 O 1 *
+bit 443 O 1 *
+bit 442 O 1 *
+bit 441 O 1 *
+bit 440 O 1 *
+bit 439 O 1 *
+bit 438 O 1 *
+bit 437 O 1 *
+bit 436 O 1 *
+bit 435 O 1 *
+bit 434 O 1 *
+bit 433 O 1 *
+bit 432 O 1 *
+bit 431 O 1 *
+bit 430 O 1 *
+bit 429 O 1 *
+bit 428 O 1 *
+bit 427 O 1 *
+bit 426 O 1 *
+bit 425 O 1 *
+bit 424 O 1 *
+bit 423 O 1 *
+bit 422 O 1 *
+bit 421 O 1 *
+bit 420 O 1 *
+bit 419 O 1 *
+bit 418 O 1 *
+bit 417 O 1 *
+bit 416 O 1 *
+bit 415 O 1 *
+bit 414 O 1 *
+bit 413 O 1 *
+bit 412 O 1 *
+bit 411 O 1 *
+bit 410 O 1 *
+bit 409 O 1 *
+bit 408 O 1 *
+bit 407 O 1 *
+bit 406 O 1 *
+bit 405 O 1 *
+bit 404 O 1 *
+bit 403 O 1 *
+bit 402 O 1 *
+bit 401 O 1 *
+bit 400 O 1 *
+bit 399 O 1 *
+bit 398 O 1 *
+bit 397 I 1 IO_C3
+bit 396 O 1 IO_C3 395 1 Z
+bit 395 C 1 *
+bit 394 I 1 IO_C4
+bit 393 O 1 IO_C4 392 1 Z
+bit 392 C 1 *
+bit 391 O 1 *
+bit 390 I 1 HSWAP_EN_B3
+bit 389 I 1 IO_A3
+bit 388 O 1 IO_A3 387 1 Z
+bit 387 C 1 *
+bit 386 I 1 IO_B4
+bit 385 O 1 IO_B4 384 1 Z
+bit 384 C 1 *
+bit 383 I 1 IO_A4
+bit 382 O 1 IO_A4 381 1 Z
+bit 381 C 1 *
+bit 380 O 1 *
+bit 379 O 1 *
+bit 378 O 1 *
+bit 377 O 1 *
+bit 376 O 1 *
+bit 375 O 1 *
+bit 374 O 1 *
+bit 373 O 1 *
+bit 372 O 1 *
+bit 371 O 1 *
+bit 370 O 1 *
+bit 369 O 1 *
+bit 368 I 1 IO_E5
+bit 367 O 1 IO_E5 366 1 Z
+bit 366 C 1 *
+bit 365 I 1 IO_D5
+bit 364 O 1 IO_D5 363 1 Z
+bit 363 C 1 *
+bit 362 I 1 IO_C5
+bit 361 O 1 IO_C5 360 1 Z
+bit 360 C 1 *
+bit 359 O 1 *
+bit 358 O 1 *
+bit 357 O 1 *
+bit 356 O 1 *
+bit 355 O 1 *
+bit 354 O 1 *
+bit 353 O 1 *
+bit 352 O 1 *
+bit 351 O 1 *
+bit 350 O 1 *
+bit 349 O 1 *
+bit 348 O 1 *
+bit 347 O 1 *
+bit 346 O 1 *
+bit 345 O 1 *
+bit 344 I 1 IO_F6
+bit 343 O 1 IO_F6 342 1 Z
+bit 342 C 1 *
+bit 341 I 1 IO_B5
+bit 340 O 1 IO_B5 339 1 Z
+bit 339 C 1 *
+bit 338 I 1 IO_A5
+bit 337 O 1 IO_A5 336 1 Z
+bit 336 C 1 *
+bit 335 I 1 IO_E6
+bit 334 O 1 IO_E6 333 1 Z
+bit 333 C 1 *
+bit 332 I 1 IO_D6
+bit 331 O 1 IO_D6 330 1 Z
+bit 330 C 1 *
+bit 329 I 1 IO_F7
+bit 328 O 1 IO_F7 327 1 Z
+bit 327 C 1 *
+bit 326 O 1 *
+bit 325 O 1 *
+bit 324 O 1 *
+bit 323 O 1 *
+bit 322 O 1 *
+bit 321 O 1 *
+bit 320 O 1 *
+bit 319 O 1 *
+bit 318 O 1 *
+bit 317 O 1 *
+bit 316 O 1 *
+bit 315 O 1 *
+bit 314 O 1 *
+bit 313 O 1 *
+bit 312 O 1 *
+bit 311 I 1 IO_C6
+bit 310 O 1 IO_C6 309 1 Z
+bit 309 C 1 *
+bit 308 I 1 IO_B6
+bit 307 O 1 IO_B6 306 1 Z
+bit 306 C 1 *
+bit 305 I 1 IO_E7
+bit 304 O 1 IO_E7 303 1 Z
+bit 303 C 1 *
+bit 302 I 1 IO_D7
+bit 301 O 1 IO_D7 300 1 Z
+bit 300 C 1 *
+bit 299 O 1 *
+bit 298 O 1 *
+bit 297 O 1 *
+bit 296 O 1 *
+bit 295 O 1 *
+bit 294 O 1 *
+bit 293 O 1 *
+bit 292 O 1 *
+bit 291 O 1 *
+bit 290 O 1 *
+bit 289 O 1 *
+bit 288 O 1 *
+bit 287 O 1 *
+bit 286 O 1 *
+bit 285 O 1 *
+bit 284 I 1 IO_C7
+bit 283 O 1 IO_C7 282 1 Z
+bit 282 C 1 *
+bit 281 I 1 IO_B7
+bit 280 O 1 IO_B7 279 1 Z
+bit 279 C 1 *
+bit 278 I 1 IO_A7
+bit 277 O 1 IO_A7 276 1 Z
+bit 276 C 1 *
+bit 275 I 1 IO_E8
+bit 274 O 1 IO_E8 273 1 Z
+bit 273 C 1 *
+bit 272 I 1 IO_D8
+bit 271 O 1 IO_D8 270 1 Z
+bit 270 C 1 *
+bit 269 O 1 *
+bit 268 O 1 *
+bit 267 O 1 *
+bit 266 O 1 *
+bit 265 O 1 *
+bit 264 O 1 *
+bit 263 O 1 *
+bit 262 O 1 *
+bit 261 O 1 *
+bit 260 I 1 IO_B8
+bit 259 O 1 IO_B8 258 1 Z
+bit 258 C 1 *
+bit 257 I 1 IO_A8
+bit 256 O 1 IO_A8 255 1 Z
+bit 255 C 1 *
+bit 254 O 1 *
+bit 253 O 1 *
+bit 252 O 1 *
+bit 251 I 1 IO_F9
+bit 250 O 1 IO_F9 249 1 Z
+bit 249 C 1 *
+bit 248 I 1 IO_E9
+bit 247 O 1 IO_E9 246 1 Z
+bit 246 C 1 *
+bit 245 O 1 *
+bit 244 O 1 *
+bit 243 O 1 *
+bit 242 O 1 *
+bit 241 O 1 *
+bit 240 O 1 *
+bit 239 I 1 IO_D9
+bit 238 O 1 IO_D9 237 1 Z
+bit 237 C 1 *
+bit 236 I 1 IO_B9
+bit 235 O 1 IO_B9 234 1 Z
+bit 234 C 1 *
+bit 233 I 1 IO_A9
+bit 232 O 1 IO_A9 231 1 Z
+bit 231 C 1 *
+bit 230 I 1 IO_F10
+bit 229 O 1 IO_F10 228 1 Z
+bit 228 C 1 *
+bit 227 I 1 IO_E10
+bit 226 O 1 IO_E10 225 1 Z
+bit 225 C 1 *
+bit 224 I 1 IO_D10
+bit 223 O 1 IO_D10 222 1 Z
+bit 222 C 1 *
+bit 221 I 1 IO_C10
+bit 220 O 1 IO_C10 219 1 Z
+bit 219 C 1 *
+bit 218 I 1 IO_B10
+bit 217 O 1 IO_B10 216 1 Z
+bit 216 C 1 *
+bit 215 I 1 IO_F11
+bit 214 O 1 IO_F11 213 1 Z
+bit 213 C 1 *
+bit 212 I 1 IO_E11
+bit 211 O 1 IO_E11 210 1 Z
+bit 210 C 1 *
+bit 209 I 1 IO_A10
+bit 208 O 1 IO_A10 207 1 Z
+bit 207 C 1 *
+bit 206 I 1 IO_D11
+bit 205 O 1 IO_D11 204 1 Z
+bit 204 C 1 *
+bit 203 I 1 IO_C11
+bit 202 O 1 IO_C11 201 1 Z
+bit 201 C 1 *
+bit 200 I 1 IO_B11
+bit 199 O 1 IO_B11 198 1 Z
+bit 198 C 1 *
+bit 197 I 1 IO_A11
+bit 196 O 1 IO_A11 195 1 Z
+bit 195 C 1 *
+bit 194 I 1 IO_A12
+bit 193 O 1 IO_A12 192 1 Z
+bit 192 C 1 *
+bit 191 I 1 IO_B12
+bit 190 O 1 IO_B12 189 1 Z
+bit 189 C 1 *
+bit 188 I 1 IO_C12
+bit 187 O 1 IO_C12 186 1 Z
+bit 186 C 1 *
+bit 185 I 1 IO_D12
+bit 184 O 1 IO_D12 183 1 Z
+bit 183 C 1 *
+bit 182 I 1 IO_E12
+bit 181 O 1 IO_E12 180 1 Z
+bit 180 C 1 *
+bit 179 I 1 IO_F12
+bit 178 O 1 IO_F12 177 1 Z
+bit 177 C 1 *
+bit 176 I 1 IO_A13
+bit 175 O 1 IO_A13 174 1 Z
+bit 174 C 1 *
+bit 173 I 1 IO_B13
+bit 172 O 1 IO_B13 171 1 Z
+bit 171 C 1 *
+bit 170 I 1 IO_C13
+bit 169 O 1 IO_C13 168 1 Z
+bit 168 C 1 *
+bit 167 I 1 IO_D13
+bit 166 O 1 IO_D13 165 1 Z
+bit 165 C 1 *
+bit 164 I 1 IO_E13
+bit 163 O 1 IO_E13 162 1 Z
+bit 162 C 1 *
+bit 161 I 1 IO_A14
+bit 160 O 1 IO_A14 159 1 Z
+bit 159 C 1 *
+bit 158 I 1 IO_B14
+bit 157 O 1 IO_B14 156 1 Z
+bit 156 C 1 *
+bit 155 I 1 IO_D14
+bit 154 O 1 IO_D14 153 1 Z
+bit 153 C 1 *
+bit 152 I 1 IO_E14
+bit 151 O 1 IO_E14 150 1 Z
+bit 150 C 1 *
+bit 149 I 1 IO_F13
+bit 148 O 1 IO_F13 147 1 Z
+bit 147 C 1 *
+bit 146 O 1 *
+bit 145 O 1 *
+bit 144 O 1 *
+bit 143 O 1 *
+bit 142 O 1 *
+bit 141 O 1 *
+bit 140 I 1 IO_B15
+bit 139 O 1 IO_B15 138 1 Z
+bit 138 C 1 *
+bit 137 I 1 IO_A15
+bit 136 O 1 IO_A15 135 1 Z
+bit 135 C 1 *
+bit 134 O 1 *
+bit 133 O 1 *
+bit 132 O 1 *
+bit 131 I 1 IO_D15
+bit 130 O 1 IO_D15 129 1 Z
+bit 129 C 1 *
+bit 128 I 1 IO_E15
+bit 127 O 1 IO_E15 126 1 Z
+bit 126 C 1 *
+bit 125 O 1 *
+bit 124 O 1 *
+bit 123 O 1 *
+bit 122 O 1 *
+bit 121 O 1 *
+bit 120 O 1 *
+bit 119 I 1 IO_F14
+bit 118 O 1 IO_F14 117 1 Z
+bit 117 C 1 *
+bit 116 I 1 IO_A16
+bit 115 O 1 IO_A16 114 1 Z
+bit 114 C 1 *
+bit 113 I 1 IO_B16
+bit 112 O 1 IO_B16 111 1 Z
+bit 111 C 1 *
+bit 110 I 1 IO_C16
+bit 109 O 1 IO_C16 108 1 Z
+bit 108 C 1 *
+bit 107 I 1 IO_D16
+bit 106 O 1 IO_D16 105 1 Z
+bit 105 C 1 *
+bit 104 O 1 *
+bit 103 O 1 *
+bit 102 O 1 *
+bit 101 O 1 *
+bit 100 O 1 *
+bit 99 O 1 *
+bit 98 O 1 *
+bit 97 O 1 *
+bit 96 O 1 *
+bit 95 O 1 *
+bit 94 O 1 *
+bit 93 O 1 *
+bit 92 O 1 *
+bit 91 O 1 *
+bit 90 O 1 *
+bit 89 I 1 IO_E16
+bit 88 O 1 IO_E16 87 1 Z
+bit 87 C 1 *
+bit 86 I 1 IO_B17
+bit 85 O 1 IO_B17 84 1 Z
+bit 84 C 1 *
+bit 83 I 1 IO_C17
+bit 82 O 1 IO_C17 81 1 Z
+bit 81 C 1 *
+bit 80 I 1 IO_D17
+bit 79 O 1 IO_D17 78 1 Z
+bit 78 C 1 *
+bit 77 I 1 IO_E17
+bit 76 O 1 IO_E17 75 1 Z
+bit 75 C 1 *
+bit 74 O 1 *
+bit 73 O 1 *
+bit 72 O 1 *
+bit 71 O 1 *
+bit 70 O 1 *
+bit 69 O 1 *
+bit 68 O 1 *
+bit 67 O 1 *
+bit 66 O 1 *
+bit 65 O 1 *
+bit 64 O 1 *
+bit 63 O 1 *
+bit 62 O 1 *
+bit 61 O 1 *
+bit 60 O 1 *
+bit 59 I 1 IO_F16
+bit 58 O 1 IO_F16 57 1 Z
+bit 57 C 1 *
+bit 56 I 1 IO_A18
+bit 55 O 1 IO_A18 54 1 Z
+bit 54 C 1 *
+bit 53 I 1 IO_B18
+bit 52 O 1 IO_B18 51 1 Z
+bit 51 C 1 *
+bit 50 I 1 IO_C18
+bit 49 O 1 IO_C18 48 1 Z
+bit 48 C 1 *
+bit 47 I 1 IO_D18
+bit 46 O 1 IO_D18 45 1 Z
+bit 45 C 1 *
+bit 44 O 1 *
+bit 43 O 1 *
+bit 42 O 1 *
+bit 41 O 1 *
+bit 40 O 1 *
+bit 39 O 1 *
+bit 38 O 1 *
+bit 37 O 1 *
+bit 36 O 1 *
+bit 35 O 1 *
+bit 34 O 1 *
+bit 33 O 1 *
+bit 32 O 1 *
+bit 31 O 1 *
+bit 30 O 1 *
+bit 29 I 1 IO_F17
+bit 28 O 1 IO_F17 27 1 Z
+bit 27 C 1 *
+bit 26 I 1 IO_A19
+bit 25 O 1 IO_A19 24 1 Z
+bit 24 C 1 *
+bit 23 I 1 IO_B19
+bit 22 O 1 IO_B19 21 1 Z
+bit 21 C 1 *
+bit 20 O 1 *
+bit 19 O 1 *
+bit 18 O 1 *
+bit 17 O 1 *
+bit 16 O 1 *
+bit 15 O 1 *
+bit 14 O 1 *
+bit 13 O 1 *
+bit 12 O 1 *
+bit 11 O 1 *
+bit 10 O 1 *
+bit 9 O 1 *
+bit 8 O 1 *
+bit 7 O 1 *
+bit 6 O 1 *
+bit 5 I 1 IO_C19
+bit 4 O 1 IO_C19 3 1 Z
+bit 3 C 1 *
+bit 2 I 1 IO_B20
+bit 1 O 1 IO_B20 0 1 Z
+bit 0 C 1 *
--- /dev/null
+signal GND1
+signal GND2
+signal GND3
+signal GND4
+signal GND5
+signal GND6
+signal GND7
+signal GND8
+signal GND9
+signal GND10
+signal GND11
+signal GND12
+signal GND13
+signal GND14
+signal GND15
+signal GND16
+signal GND17
+signal GND18
+signal GND19
+signal GND20
+signal GND21
+signal GND22
+signal GND23
+signal GND24
+signal GND25
+signal GND26
+signal GND27
+signal GND28
+signal GND29
+signal GND30
+signal GND31
+signal GND32
+signal GND33
+signal GND34
+signal GND35
+signal GND36
+signal GND37
+signal GND38
+signal GND39
+signal GND40
+signal GND41
+signal GND42
+signal GND43
+signal GND44
+signal GND45
+signal GND46
+signal GND47
+signal GND48
+signal GND49
+signal GND50
+signal GND51
+signal GND52
+signal GND53
+signal GND54
+signal GND55
+signal GND56
+signal GND57
+signal GND58
+signal GND59
+signal GND60
+signal GND61
+signal GND62
+signal GND63
+signal GND64
+signal GND65
+signal GND66
+signal GND67
+signal GND68
+signal GND69
+signal GND70
+signal GND71
+signal GND72
+signal GND73
+signal GND74
+signal GND75
+signal GND76
+signal CCLK_AD26
+signal DONE_AC24
+signal HSWAP_EN_C2
+signal M0_AE3
+signal M1_AC3
+signal M2_AF3
+signal PROG_B
+signal TCK
+signal TDI
+signal TDO
+signal TMS
+signal VCCAUX1
+signal VCCAUX2
+signal VCCAUX3
+signal VCCAUX4
+signal VCCAUX5
+signal VCCAUX6
+signal VCCAUX7
+signal VCCAUX8
+signal VCCAUX9
+signal VCCAUX10
+signal VCCAUX11
+signal VCCAUX12
+signal VCCAUX13
+signal VCCAUX14
+signal VCCAUX15
+signal VCCAUX16
+signal VCCINT1
+signal VCCINT2
+signal VCCINT3
+signal VCCINT4
+signal VCCINT5
+signal VCCINT6
+signal VCCINT7
+signal VCCINT8
+signal VCCINT9
+signal VCCINT10
+signal VCCINT11
+signal VCCINT12
+signal VCCINT13
+signal VCCINT14
+signal VCCINT15
+signal VCCINT16
+signal VCCINT17
+signal VCCINT18
+signal VCCINT19
+signal VCCINT20
+signal VCCO01
+signal VCCO02
+signal VCCO03
+signal VCCO04
+signal VCCO05
+signal VCCO06
+signal VCCO07
+signal VCCO08
+signal VCCO11
+signal VCCO12
+signal VCCO13
+signal VCCO14
+signal VCCO15
+signal VCCO16
+signal VCCO17
+signal VCCO18
+signal VCCO21
+signal VCCO22
+signal VCCO23
+signal VCCO24
+signal VCCO25
+signal VCCO26
+signal VCCO27
+signal VCCO28
+signal VCCO31
+signal VCCO32
+signal VCCO33
+signal VCCO34
+signal VCCO35
+signal VCCO36
+signal VCCO37
+signal VCCO38
+signal VCCO41
+signal VCCO42
+signal VCCO43
+signal VCCO44
+signal VCCO45
+signal VCCO46
+signal VCCO47
+signal VCCO48
+signal VCCO51
+signal VCCO52
+signal VCCO53
+signal VCCO54
+signal VCCO55
+signal VCCO56
+signal VCCO57
+signal VCCO58
+signal VCCO61
+signal VCCO62
+signal VCCO63
+signal VCCO64
+signal VCCO65
+signal VCCO66
+signal VCCO67
+signal VCCO68
+signal VCCO71
+signal VCCO72
+signal VCCO73
+signal VCCO74
+signal VCCO75
+signal VCCO76
+signal VCCO77
+signal VCCO78
+signal IO_A3
+signal IO_A4
+signal IO_A5
+signal IO_A6
+signal IO_A7
+signal IO_A8
+signal IO_A10
+signal IO_A11
+signal IO_A12
+signal IO_A13
+signal IO_A14
+signal IO_A15
+signal IO_A16
+signal IO_A17
+signal IO_A19
+signal IO_A20
+signal IO_A21
+signal IO_A22
+signal IO_A23
+signal IO_B3
+signal IO_B4
+signal IO_B5
+signal IO_B6
+signal IO_B7
+signal IO_B8
+signal IO_B9
+signal IO_B10
+signal IO_B11
+signal IO_B12
+signal IO_B13
+signal IO_B14
+signal IO_B15
+signal IO_B16
+signal IO_B17
+signal IO_B18
+signal IO_B19
+signal IO_B20
+signal IO_B21
+signal IO_B22
+signal IO_B23
+signal IO_C4
+signal IO_C5
+signal IO_C6
+signal IO_C8
+signal IO_C9
+signal IO_C10
+signal IO_C12
+signal IO_C13
+signal IO_C14
+signal IO_C15
+signal IO_C17
+signal IO_C18
+signal IO_C19
+signal IO_C21
+signal IO_C22
+signal IO_C23
+signal IO_C25
+signal IO_C26
+signal IO_D1
+signal IO_D2
+signal IO_D5
+signal IO_D6
+signal IO_D7
+signal IO_D8
+signal IO_D9
+signal IO_D10
+signal IO_D11
+signal IO_D13
+signal IO_D14
+signal IO_D16
+signal IO_D17
+signal IO_D18
+signal IO_D19
+signal IO_D20
+signal IO_D21
+signal IO_D22
+signal IO_D25
+signal IO_D26
+signal IO_E1
+signal IO_E2
+signal IO_E3
+signal IO_E4
+signal IO_E5
+signal IO_E6
+signal IO_E7
+signal IO_E8
+signal IO_E9
+signal IO_E10
+signal IO_E11
+signal IO_E12
+signal IO_E13
+signal IO_E14
+signal IO_E15
+signal IO_E16
+signal IO_E17
+signal IO_E18
+signal IO_E19
+signal IO_E20
+signal IO_E21
+signal IO_E22
+signal IO_E23
+signal IO_E24
+signal IO_E25
+signal IO_E26
+signal IO_F1
+signal IO_F2
+signal IO_F3
+signal IO_F4
+signal IO_F5
+signal IO_F6
+signal IO_F7
+signal IO_F8
+signal IO_F9
+signal IO_F10
+signal IO_F11
+signal IO_F12
+signal IO_F13
+signal IO_F14
+signal IO_F15
+signal IO_F16
+signal IO_F17
+signal IO_F18
+signal IO_F19
+signal IO_F20
+signal IO_F21
+signal IO_F23
+signal IO_F24
+signal IO_F25
+signal IO_F26
+signal IO_G1
+signal IO_G2
+signal IO_G4
+signal IO_G5
+signal IO_G6
+signal IO_G7
+signal IO_G8
+signal IO_G9
+signal IO_G10
+signal IO_G11
+signal IO_G12
+signal IO_G13
+signal IO_G14
+signal IO_G15
+signal IO_G16
+signal IO_G17
+signal IO_G18
+signal IO_G19
+signal IO_G20
+signal IO_G21
+signal IO_G22
+signal IO_G23
+signal IO_G25
+signal IO_G26
+signal IO_H1
+signal IO_H2
+signal IO_H3
+signal IO_H4
+signal IO_H5
+signal IO_H6
+signal IO_H7
+signal IO_H11
+signal IO_H12
+signal IO_H13
+signal IO_H14
+signal IO_H15
+signal IO_H16
+signal IO_H20
+signal IO_H21
+signal IO_H22
+signal IO_H23
+signal IO_H24
+signal IO_H25
+signal IO_H26
+signal IO_J2
+signal IO_J3
+signal IO_J4
+signal IO_J5
+signal IO_J6
+signal IO_J7
+signal IO_J20
+signal IO_J21
+signal IO_J22
+signal IO_J23
+signal IO_J24
+signal IO_J25
+signal IO_K1
+signal IO_K2
+signal IO_K3
+signal IO_K4
+signal IO_K5
+signal IO_K6
+signal IO_K7
+signal IO_K20
+signal IO_K21
+signal IO_K22
+signal IO_K23
+signal IO_K24
+signal IO_K25
+signal IO_K26
+signal IO_L1
+signal IO_L2
+signal IO_L4
+signal IO_L5
+signal IO_L6
+signal IO_L7
+signal IO_L8
+signal IO_L19
+signal IO_L20
+signal IO_L21
+signal IO_L22
+signal IO_L23
+signal IO_L25
+signal IO_L26
+signal IO_M1
+signal IO_M2
+signal IO_M3
+signal IO_M5
+signal IO_M6
+signal IO_M7
+signal IO_M8
+signal IO_M19
+signal IO_M20
+signal IO_M21
+signal IO_M22
+signal IO_M24
+signal IO_M25
+signal IO_M26
+signal IO_N1
+signal IO_N2
+signal IO_N3
+signal IO_N4
+signal IO_N5
+signal IO_N6
+signal IO_N7
+signal IO_N8
+signal IO_N19
+signal IO_N20
+signal IO_N21
+signal IO_N22
+signal IO_N23
+signal IO_N24
+signal IO_N25
+signal IO_N26
+signal IO_P1
+signal IO_P2
+signal IO_P3
+signal IO_P4
+signal IO_P5
+signal IO_P6
+signal IO_P7
+signal IO_P8
+signal IO_P19
+signal IO_P20
+signal IO_P21
+signal IO_P22
+signal IO_P23
+signal IO_P24
+signal IO_P25
+signal IO_P26
+signal IO_R1
+signal IO_R2
+signal IO_R3
+signal IO_R5
+signal IO_R6
+signal IO_R7
+signal IO_R8
+signal IO_R19
+signal IO_R20
+signal IO_R21
+signal IO_R22
+signal IO_R24
+signal IO_R25
+signal IO_R26
+signal IO_T1
+signal IO_T2
+signal IO_T4
+signal IO_T5
+signal IO_T6
+signal IO_T7
+signal IO_T8
+signal IO_T19
+signal IO_T20
+signal IO_T21
+signal IO_T22
+signal IO_T23
+signal IO_T25
+signal IO_T26
+signal IO_U1
+signal IO_U2
+signal IO_U3
+signal IO_U4
+signal IO_U5
+signal IO_U6
+signal IO_U7
+signal IO_U20
+signal IO_U21
+signal IO_U22
+signal IO_U23
+signal IO_U24
+signal IO_U25
+signal IO_U26
+signal IO_V2
+signal IO_V3
+signal IO_V4
+signal IO_V5
+signal IO_V6
+signal IO_V7
+signal IO_V20
+signal IO_V21
+signal IO_V22
+signal IO_V23
+signal IO_V24
+signal IO_V25
+signal IO_W1
+signal IO_W2
+signal IO_W3
+signal IO_W4
+signal IO_W5
+signal IO_W6
+signal IO_W7
+signal IO_W11
+signal IO_W12
+signal IO_W13
+signal IO_W14
+signal IO_W15
+signal IO_W16
+signal IO_W20
+signal IO_W21
+signal IO_W22
+signal IO_W23
+signal IO_W24
+signal IO_W25
+signal IO_W26
+signal IO_Y1
+signal IO_Y2
+signal IO_Y4
+signal IO_Y5
+signal IO_Y6
+signal IO_Y7
+signal IO_Y8
+signal IO_Y9
+signal IO_Y10
+signal IO_Y11
+signal IO_Y12
+signal IO_Y13
+signal IO_Y14
+signal IO_Y15
+signal IO_Y16
+signal IO_Y17
+signal IO_Y18
+signal IO_Y19
+signal IO_Y20
+signal IO_Y21
+signal IO_Y22
+signal IO_Y23
+signal IO_Y25
+signal IO_Y26
+signal IO_AA1
+signal IO_AA2
+signal IO_AA3
+signal IO_AA4
+signal IO_AA6
+signal IO_AA7
+signal IO_AA8
+signal IO_AA9
+signal IO_AA10
+signal IO_AA11
+signal IO_AA12
+signal IO_AA13
+signal IO_AA14
+signal IO_AA15
+signal IO_AA16
+signal IO_AA17
+signal IO_AA18
+signal IO_AA19
+signal IO_AA20
+signal IO_AA21
+signal IO_AA22
+signal IO_AA23
+signal IO_AA24
+signal IO_AA25
+signal IO_AA26
+signal IO_AB1
+signal IO_AB2
+signal IO_AB3
+signal IO_AB4
+signal IO_AB5
+signal IO_AB6
+signal IO_AB7
+signal IO_AB8
+signal IO_AB9
+signal IO_AB10
+signal IO_AB11
+signal IO_AB12
+signal IO_AB13
+signal IO_AB14
+signal IO_AB15
+signal IO_AB16
+signal IO_AB17
+signal IO_AB18
+signal IO_AB19
+signal IO_AB20
+signal IO_AB21
+signal IO_AB22
+signal IO_AB23
+signal IO_AB24
+signal IO_AB25
+signal IO_AB26
+signal IO_AC1
+signal IO_AC2
+signal IO_AC5
+signal IO_AC6
+signal IO_AC7
+signal IO_AC8
+signal IO_AC9
+signal IO_AC10
+signal IO_AC11
+signal IO_AC13
+signal IO_AC14
+signal IO_AC16
+signal IO_AC17
+signal IO_AC18
+signal IO_AC19
+signal IO_AC20
+signal IO_AC21
+signal IO_AC22
+signal IO_AC25
+signal IO_AC26
+signal IO_AD1
+signal IO_AD2
+signal IO_AD4
+signal IO_AD5
+signal IO_AD6
+signal IO_AD8
+signal IO_AD9
+signal IO_AD10
+signal IO_AD12
+signal IO_AD13
+signal IO_AD14
+signal IO_AD15
+signal IO_AD17
+signal IO_AD18
+signal IO_AD19
+signal IO_AD21
+signal IO_AD22
+signal IO_AD23
+signal IO_AD25
+signal IO_AE4
+signal IO_AE5
+signal IO_AE6
+signal IO_AE7
+signal IO_AE8
+signal IO_AE9
+signal IO_AE10
+signal IO_AE11
+signal IO_AE12
+signal IO_AE13
+signal IO_AE14
+signal IO_AE15
+signal IO_AE16
+signal IO_AE17
+signal IO_AE18
+signal IO_AE19
+signal IO_AE20
+signal IO_AE21
+signal IO_AE22
+signal IO_AE23
+signal IO_AE24
+signal IO_AF4
+signal IO_AF5
+signal IO_AF6
+signal IO_AF7
+signal IO_AF8
+signal IO_AF10
+signal IO_AF11
+signal IO_AF12
+signal IO_AF13
+signal IO_AF14
+signal IO_AF15
+signal IO_AF16
+signal IO_AF17
+signal IO_AF19
+signal IO_AF20
+signal IO_AF21
+signal IO_AF22
+signal IO_AF23
+
+register BSR 1559
+register BR 1
+register DIR 32
+
+instruction length 6
+
+instruction EXTEST 000000 BSR
+instruction SAMPLE/PRELOAD 000001 BSR
+instruction IDCODE 001001 DIR
+instruction BYPASS 111111 BR
+
+bit 1558 I 1 IO_C25
+bit 1557 O 1 IO_C25 1556 1 Z
+bit 1556 C 1 *
+bit 1555 I 1 IO_C26
+bit 1554 O 1 IO_C26 1553 1 Z
+bit 1553 C 1 *
+bit 1552 I 1 IO_E23
+bit 1551 O 1 IO_E23 1550 1 Z
+bit 1550 C 1 *
+bit 1549 I 1 IO_E24
+bit 1548 O 1 IO_E24 1547 1 Z
+bit 1547 C 1 *
+bit 1546 I 1 IO_D25
+bit 1545 O 1 IO_D25 1544 1 Z
+bit 1544 C 1 *
+bit 1543 I 1 IO_D26
+bit 1542 O 1 IO_D26 1541 1 Z
+bit 1541 C 1 *
+bit 1540 I 1 IO_E25
+bit 1539 O 1 IO_E25 1538 1 Z
+bit 1538 C 1 *
+bit 1537 I 1 IO_E26
+bit 1536 O 1 IO_E26 1535 1 Z
+bit 1535 C 1 *
+bit 1534 I 1 IO_G20
+bit 1533 O 1 IO_G20 1532 1 Z
+bit 1532 C 1 *
+bit 1531 I 1 IO_G21
+bit 1530 O 1 IO_G21 1529 1 Z
+bit 1529 C 1 *
+bit 1528 I 1 IO_F23
+bit 1527 O 1 IO_F23 1526 1 Z
+bit 1526 C 1 *
+bit 1525 I 1 IO_F24
+bit 1524 O 1 IO_F24 1523 1 Z
+bit 1523 C 1 *
+bit 1522 I 1 IO_G22
+bit 1521 O 1 IO_G22 1520 1 Z
+bit 1520 C 1 *
+bit 1519 I 1 IO_G23
+bit 1518 O 1 IO_G23 1517 1 Z
+bit 1517 C 1 *
+bit 1516 I 1 IO_F25
+bit 1515 O 1 IO_F25 1514 1 Z
+bit 1514 C 1 *
+bit 1513 I 1 IO_F26
+bit 1512 O 1 IO_F26 1511 1 Z
+bit 1511 C 1 *
+bit 1510 I 1 IO_G25
+bit 1509 O 1 IO_G25 1508 1 Z
+bit 1508 C 1 *
+bit 1507 I 1 IO_G26
+bit 1506 O 1 IO_G26 1505 1 Z
+bit 1505 C 1 *
+bit 1504 I 1 IO_H20
+bit 1503 O 1 IO_H20 1502 1 Z
+bit 1502 C 1 *
+bit 1501 I 1 IO_H21
+bit 1500 O 1 IO_H21 1499 1 Z
+bit 1499 C 1 *
+bit 1498 I 1 IO_H22
+bit 1497 O 1 IO_H22 1496 1 Z
+bit 1496 C 1 *
+bit 1495 I 1 IO_J21
+bit 1494 O 1 IO_J21 1493 1 Z
+bit 1493 C 1 *
+bit 1492 I 1 IO_H23
+bit 1491 O 1 IO_H23 1490 1 Z
+bit 1490 C 1 *
+bit 1489 I 1 IO_H24
+bit 1488 O 1 IO_H24 1487 1 Z
+bit 1487 C 1 *
+bit 1486 I 1 IO_H25
+bit 1485 O 1 IO_H25 1484 1 Z
+bit 1484 C 1 *
+bit 1483 I 1 IO_H26
+bit 1482 O 1 IO_H26 1481 1 Z
+bit 1481 C 1 *
+bit 1480 I 1 IO_J20
+bit 1479 O 1 IO_J20 1478 1 Z
+bit 1478 C 1 *
+bit 1477 I 1 IO_K20
+bit 1476 O 1 IO_K20 1475 1 Z
+bit 1475 C 1 *
+bit 1474 I 1 IO_J22
+bit 1473 O 1 IO_J22 1472 1 Z
+bit 1472 C 1 *
+bit 1471 I 1 IO_J23
+bit 1470 O 1 IO_J23 1469 1 Z
+bit 1469 C 1 *
+bit 1468 I 1 IO_J24
+bit 1467 O 1 IO_J24 1466 1 Z
+bit 1466 C 1 *
+bit 1465 I 1 IO_J25
+bit 1464 O 1 IO_J25 1463 1 Z
+bit 1463 C 1 *
+bit 1462 I 1 IO_K21
+bit 1461 O 1 IO_K21 1460 1 Z
+bit 1460 C 1 *
+bit 1459 I 1 IO_K22
+bit 1458 O 1 IO_K22 1457 1 Z
+bit 1457 C 1 *
+bit 1456 I 1 IO_K23
+bit 1455 O 1 IO_K23 1454 1 Z
+bit 1454 C 1 *
+bit 1453 I 1 IO_K24
+bit 1452 O 1 IO_K24 1451 1 Z
+bit 1451 C 1 *
+bit 1450 I 1 IO_K25
+bit 1449 O 1 IO_K25 1448 1 Z
+bit 1448 C 1 *
+bit 1447 I 1 IO_K26
+bit 1446 O 1 IO_K26 1445 1 Z
+bit 1445 C 1 *
+bit 1444 I 1 IO_L19
+bit 1443 O 1 IO_L19 1442 1 Z
+bit 1442 C 1 *
+bit 1441 I 1 IO_L20
+bit 1440 O 1 IO_L20 1439 1 Z
+bit 1439 C 1 *
+bit 1438 I 1 IO_L21
+bit 1437 O 1 IO_L21 1436 1 Z
+bit 1436 C 1 *
+bit 1435 I 1 IO_L22
+bit 1434 O 1 IO_L22 1433 1 Z
+bit 1433 C 1 *
+bit 1432 I 1 IO_L25
+bit 1431 O 1 IO_L25 1430 1 Z
+bit 1430 C 1 *
+bit 1429 I 1 IO_L26
+bit 1428 O 1 IO_L26 1427 1 Z
+bit 1427 C 1 *
+bit 1426 O 1 *
+bit 1425 O 1 *
+bit 1424 O 1 *
+bit 1423 O 1 *
+bit 1422 O 1 *
+bit 1421 O 1 *
+bit 1420 I 1 IO_M19
+bit 1419 O 1 IO_M19 1418 1 Z
+bit 1418 C 1 *
+bit 1417 I 1 IO_M20
+bit 1416 O 1 IO_M20 1415 1 Z
+bit 1415 C 1 *
+bit 1414 I 1 IO_M21
+bit 1413 O 1 IO_M21 1412 1 Z
+bit 1412 C 1 *
+bit 1411 I 1 IO_M22
+bit 1410 O 1 IO_M22 1409 1 Z
+bit 1409 C 1 *
+bit 1408 I 1 IO_L23
+bit 1407 O 1 IO_L23 1406 1 Z
+bit 1406 C 1 *
+bit 1405 I 1 IO_M24
+bit 1404 O 1 IO_M24 1403 1 Z
+bit 1403 C 1 *
+bit 1402 I 1 IO_M25
+bit 1401 O 1 IO_M25 1400 1 Z
+bit 1400 C 1 *
+bit 1399 I 1 IO_M26
+bit 1398 O 1 IO_M26 1397 1 Z
+bit 1397 C 1 *
+bit 1396 I 1 IO_N19
+bit 1395 O 1 IO_N19 1394 1 Z
+bit 1394 C 1 *
+bit 1393 I 1 IO_N20
+bit 1392 O 1 IO_N20 1391 1 Z
+bit 1391 C 1 *
+bit 1390 O 1 *
+bit 1389 O 1 *
+bit 1388 O 1 *
+bit 1387 O 1 *
+bit 1386 O 1 *
+bit 1385 O 1 *
+bit 1384 I 1 IO_N21
+bit 1383 O 1 IO_N21 1382 1 Z
+bit 1382 C 1 *
+bit 1381 I 1 IO_N22
+bit 1380 O 1 IO_N22 1379 1 Z
+bit 1379 C 1 *
+bit 1378 I 1 IO_N23
+bit 1377 O 1 IO_N23 1376 1 Z
+bit 1376 C 1 *
+bit 1375 I 1 IO_N24
+bit 1374 O 1 IO_N24 1373 1 Z
+bit 1373 C 1 *
+bit 1372 I 1 IO_N25
+bit 1371 O 1 IO_N25 1370 1 Z
+bit 1370 C 1 *
+bit 1369 I 1 IO_N26
+bit 1368 O 1 IO_N26 1367 1 Z
+bit 1367 C 1 *
+bit 1366 I 1 IO_P26
+bit 1365 O 1 IO_P26 1364 1 Z
+bit 1364 C 1 *
+bit 1363 I 1 IO_P25
+bit 1362 O 1 IO_P25 1361 1 Z
+bit 1361 C 1 *
+bit 1360 I 1 IO_P24
+bit 1359 O 1 IO_P24 1358 1 Z
+bit 1358 C 1 *
+bit 1357 I 1 IO_P23
+bit 1356 O 1 IO_P23 1355 1 Z
+bit 1355 C 1 *
+bit 1354 I 1 IO_P22
+bit 1353 O 1 IO_P22 1352 1 Z
+bit 1352 C 1 *
+bit 1351 I 1 IO_P21
+bit 1350 O 1 IO_P21 1349 1 Z
+bit 1349 C 1 *
+bit 1348 O 1 *
+bit 1347 O 1 *
+bit 1346 O 1 *
+bit 1345 O 1 *
+bit 1344 O 1 *
+bit 1343 O 1 *
+bit 1342 I 1 IO_P20
+bit 1341 O 1 IO_P20 1340 1 Z
+bit 1340 C 1 *
+bit 1339 I 1 IO_P19
+bit 1338 O 1 IO_P19 1337 1 Z
+bit 1337 C 1 *
+bit 1336 I 1 IO_R26
+bit 1335 O 1 IO_R26 1334 1 Z
+bit 1334 C 1 *
+bit 1333 I 1 IO_R25
+bit 1332 O 1 IO_R25 1331 1 Z
+bit 1331 C 1 *
+bit 1330 I 1 IO_R24
+bit 1329 O 1 IO_R24 1328 1 Z
+bit 1328 C 1 *
+bit 1327 I 1 IO_T23
+bit 1326 O 1 IO_T23 1325 1 Z
+bit 1325 C 1 *
+bit 1324 I 1 IO_R22
+bit 1323 O 1 IO_R22 1322 1 Z
+bit 1322 C 1 *
+bit 1321 I 1 IO_R21
+bit 1320 O 1 IO_R21 1319 1 Z
+bit 1319 C 1 *
+bit 1318 I 1 IO_R20
+bit 1317 O 1 IO_R20 1316 1 Z
+bit 1316 C 1 *
+bit 1315 I 1 IO_R19
+bit 1314 O 1 IO_R19 1313 1 Z
+bit 1313 C 1 *
+bit 1312 O 1 *
+bit 1311 O 1 *
+bit 1310 O 1 *
+bit 1309 O 1 *
+bit 1308 O 1 *
+bit 1307 O 1 *
+bit 1306 I 1 IO_T26
+bit 1305 O 1 IO_T26 1304 1 Z
+bit 1304 C 1 *
+bit 1303 I 1 IO_T25
+bit 1302 O 1 IO_T25 1301 1 Z
+bit 1301 C 1 *
+bit 1300 I 1 IO_T22
+bit 1299 O 1 IO_T22 1298 1 Z
+bit 1298 C 1 *
+bit 1297 I 1 IO_T21
+bit 1296 O 1 IO_T21 1295 1 Z
+bit 1295 C 1 *
+bit 1294 I 1 IO_T20
+bit 1293 O 1 IO_T20 1292 1 Z
+bit 1292 C 1 *
+bit 1291 I 1 IO_T19
+bit 1290 O 1 IO_T19 1289 1 Z
+bit 1289 C 1 *
+bit 1288 I 1 IO_U26
+bit 1287 O 1 IO_U26 1286 1 Z
+bit 1286 C 1 *
+bit 1285 I 1 IO_U25
+bit 1284 O 1 IO_U25 1283 1 Z
+bit 1283 C 1 *
+bit 1282 I 1 IO_U24
+bit 1281 O 1 IO_U24 1280 1 Z
+bit 1280 C 1 *
+bit 1279 I 1 IO_U23
+bit 1278 O 1 IO_U23 1277 1 Z
+bit 1277 C 1 *
+bit 1276 I 1 IO_U22
+bit 1275 O 1 IO_U22 1274 1 Z
+bit 1274 C 1 *
+bit 1273 I 1 IO_U21
+bit 1272 O 1 IO_U21 1271 1 Z
+bit 1271 C 1 *
+bit 1270 I 1 IO_V25
+bit 1269 O 1 IO_V25 1268 1 Z
+bit 1268 C 1 *
+bit 1267 I 1 IO_V24
+bit 1266 O 1 IO_V24 1265 1 Z
+bit 1265 C 1 *
+bit 1264 I 1 IO_V23
+bit 1263 O 1 IO_V23 1262 1 Z
+bit 1262 C 1 *
+bit 1261 I 1 IO_V22
+bit 1260 O 1 IO_V22 1259 1 Z
+bit 1259 C 1 *
+bit 1258 I 1 IO_U20
+bit 1257 O 1 IO_U20 1256 1 Z
+bit 1256 C 1 *
+bit 1255 I 1 IO_V20
+bit 1254 O 1 IO_V20 1253 1 Z
+bit 1253 C 1 *
+bit 1252 I 1 IO_W26
+bit 1251 O 1 IO_W26 1250 1 Z
+bit 1250 C 1 *
+bit 1249 I 1 IO_W25
+bit 1248 O 1 IO_W25 1247 1 Z
+bit 1247 C 1 *
+bit 1246 I 1 IO_W24
+bit 1245 O 1 IO_W24 1244 1 Z
+bit 1244 C 1 *
+bit 1243 I 1 IO_W23
+bit 1242 O 1 IO_W23 1241 1 Z
+bit 1241 C 1 *
+bit 1240 I 1 IO_V21
+bit 1239 O 1 IO_V21 1238 1 Z
+bit 1238 C 1 *
+bit 1237 I 1 IO_W22
+bit 1236 O 1 IO_W22 1235 1 Z
+bit 1235 C 1 *
+bit 1234 I 1 IO_Y26
+bit 1233 O 1 IO_Y26 1232 1 Z
+bit 1232 C 1 *
+bit 1231 I 1 IO_Y25
+bit 1230 O 1 IO_Y25 1229 1 Z
+bit 1229 C 1 *
+bit 1228 I 1 IO_W21
+bit 1227 O 1 IO_W21 1226 1 Z
+bit 1226 C 1 *
+bit 1225 I 1 IO_W20
+bit 1224 O 1 IO_W20 1223 1 Z
+bit 1223 C 1 *
+bit 1222 I 1 IO_AA26
+bit 1221 O 1 IO_AA26 1220 1 Z
+bit 1220 C 1 *
+bit 1219 I 1 IO_AA25
+bit 1218 O 1 IO_AA25 1217 1 Z
+bit 1217 C 1 *
+bit 1216 I 1 IO_Y23
+bit 1215 O 1 IO_Y23 1214 1 Z
+bit 1214 C 1 *
+bit 1213 I 1 IO_Y22
+bit 1212 O 1 IO_Y22 1211 1 Z
+bit 1211 C 1 *
+bit 1210 I 1 IO_AA24
+bit 1209 O 1 IO_AA24 1208 1 Z
+bit 1208 C 1 *
+bit 1207 I 1 IO_AA23
+bit 1206 O 1 IO_AA23 1205 1 Z
+bit 1205 C 1 *
+bit 1204 I 1 IO_AB26
+bit 1203 O 1 IO_AB26 1202 1 Z
+bit 1202 C 1 *
+bit 1201 I 1 IO_AB25
+bit 1200 O 1 IO_AB25 1199 1 Z
+bit 1199 C 1 *
+bit 1198 I 1 IO_Y21
+bit 1197 O 1 IO_Y21 1196 1 Z
+bit 1196 C 1 *
+bit 1195 I 1 IO_Y20
+bit 1194 O 1 IO_Y20 1193 1 Z
+bit 1193 C 1 *
+bit 1192 I 1 IO_AC26
+bit 1191 O 1 IO_AC26 1190 1 Z
+bit 1190 C 1 *
+bit 1189 I 1 IO_AC25
+bit 1188 O 1 IO_AC25 1187 1 Z
+bit 1187 C 1 *
+bit 1186 I 1 IO_AB24
+bit 1185 O 1 IO_AB24 1184 1 Z
+bit 1184 C 1 *
+bit 1183 I 1 IO_AB23
+bit 1182 O 1 IO_AB23 1181 1 Z
+bit 1181 C 1 *
+bit 1180 I 1 IO_AA22
+bit 1179 O 1 IO_AA22 1178 1 Z
+bit 1178 C 1 *
+bit 1177 I 1 IO_AA21
+bit 1176 O 1 IO_AA21 1175 1 Z
+bit 1175 C 1 *
+bit 1174 I 1 CCLK_AD26
+bit 1173 O 1 CCLK_AD26 1172 1 Z
+bit 1172 C 1 *
+bit 1171 I 1 DONE_AC24
+bit 1170 O 1 DONE_AC24 1169 1 Z
+bit 1169 C 1 *
+bit 1168 I 1 IO_AD25
+bit 1167 O 1 IO_AD25 1166 1 Z
+bit 1166 C 1 *
+bit 1165 I 1 IO_AB22
+bit 1164 O 1 IO_AB22 1163 1 Z
+bit 1163 C 1 *
+bit 1162 I 1 IO_AC22
+bit 1161 O 1 IO_AC22 1160 1 Z
+bit 1160 C 1 *
+bit 1159 I 1 IO_AE24
+bit 1158 O 1 IO_AE24 1157 1 Z
+bit 1157 C 1 *
+bit 1156 I 1 IO_AF24
+bit 1155 O 1 IO_AF24 1154 1 Z
+bit 1154 C 1 *
+bit 1153 I 1 IO_AD23
+bit 1152 O 1 IO_AD23 1151 1 Z
+bit 1151 C 1 *
+bit 1150 I 1 IO_AE23
+bit 1149 O 1 IO_AE23 1148 1 Z
+bit 1148 C 1 *
+bit 1147 I 1 IO_AF23
+bit 1146 O 1 IO_AF23 1145 1 Z
+bit 1145 C 1 *
+bit 1144 I 1 IO_AD22
+bit 1143 O 1 IO_AD22 1142 1 Z
+bit 1142 C 1 *
+bit 1141 I 1 IO_AE22
+bit 1140 O 1 IO_AE22 1139 1 Z
+bit 1139 C 1 *
+bit 1138 I 1 IO_AF22
+bit 1137 O 1 IO_AF22 1136 1 Z
+bit 1136 C 1 *
+bit 1135 I 1 IO_AB21
+bit 1134 O 1 IO_AB21 1133 1 Z
+bit 1133 C 1 *
+bit 1132 I 1 IO_AC21
+bit 1131 O 1 IO_AC21 1130 1 Z
+bit 1130 C 1 *
+bit 1129 I 1 IO_AD21
+bit 1128 O 1 IO_AD21 1127 1 Z
+bit 1127 C 1 *
+bit 1126 I 1 IO_AE21
+bit 1125 O 1 IO_AE21 1124 1 Z
+bit 1124 C 1 *
+bit 1123 I 1 IO_AF21
+bit 1122 O 1 IO_AF21 1121 1 Z
+bit 1121 C 1 *
+bit 1120 I 1 IO_AB20
+bit 1119 O 1 IO_AB20 1118 1 Z
+bit 1118 C 1 *
+bit 1117 I 1 IO_AC20
+bit 1116 O 1 IO_AC20 1115 1 Z
+bit 1115 C 1 *
+bit 1114 I 1 IO_AE20
+bit 1113 O 1 IO_AE20 1112 1 Z
+bit 1112 C 1 *
+bit 1111 I 1 IO_AF20
+bit 1110 O 1 IO_AF20 1109 1 Z
+bit 1109 C 1 *
+bit 1108 I 1 IO_AA20
+bit 1107 O 1 IO_AA20 1106 1 Z
+bit 1106 C 1 *
+bit 1105 I 1 IO_Y19
+bit 1104 O 1 IO_Y19 1103 1 Z
+bit 1103 C 1 *
+bit 1102 I 1 IO_AA19
+bit 1101 O 1 IO_AA19 1100 1 Z
+bit 1100 C 1 *
+bit 1099 I 1 IO_AB19
+bit 1098 O 1 IO_AB19 1097 1 Z
+bit 1097 C 1 *
+bit 1096 I 1 IO_AC19
+bit 1095 O 1 IO_AC19 1094 1 Z
+bit 1094 C 1 *
+bit 1093 I 1 IO_AD19
+bit 1092 O 1 IO_AD19 1091 1 Z
+bit 1091 C 1 *
+bit 1090 I 1 IO_AE19
+bit 1089 O 1 IO_AE19 1088 1 Z
+bit 1088 C 1 *
+bit 1087 I 1 IO_AF19
+bit 1086 O 1 IO_AF19 1085 1 Z
+bit 1085 C 1 *
+bit 1084 I 1 IO_Y18
+bit 1083 O 1 IO_Y18 1082 1 Z
+bit 1082 C 1 *
+bit 1081 I 1 IO_AA18
+bit 1080 O 1 IO_AA18 1079 1 Z
+bit 1079 C 1 *
+bit 1078 O 1 *
+bit 1077 O 1 *
+bit 1076 O 1 *
+bit 1075 I 1 IO_AB18
+bit 1074 O 1 IO_AB18 1073 1 Z
+bit 1073 C 1 *
+bit 1072 I 1 IO_AC18
+bit 1071 O 1 IO_AC18 1070 1 Z
+bit 1070 C 1 *
+bit 1069 I 1 IO_AD18
+bit 1068 O 1 IO_AD18 1067 1 Z
+bit 1067 C 1 *
+bit 1066 I 1 IO_AE18
+bit 1065 O 1 IO_AE18 1064 1 Z
+bit 1064 C 1 *
+bit 1063 I 1 IO_Y17
+bit 1062 O 1 IO_Y17 1061 1 Z
+bit 1061 C 1 *
+bit 1060 I 1 IO_AC17
+bit 1059 O 1 IO_AC17 1058 1 Z
+bit 1058 C 1 *
+bit 1057 I 1 IO_AA17
+bit 1056 O 1 IO_AA17 1055 1 Z
+bit 1055 C 1 *
+bit 1054 I 1 IO_AD17
+bit 1053 O 1 IO_AD17 1052 1 Z
+bit 1052 C 1 *
+bit 1051 I 1 IO_AB17
+bit 1050 O 1 IO_AB17 1049 1 Z
+bit 1049 C 1 *
+bit 1048 I 1 IO_W16
+bit 1047 O 1 IO_W16 1046 1 Z
+bit 1046 C 1 *
+bit 1045 I 1 IO_AE17
+bit 1044 O 1 IO_AE17 1043 1 Z
+bit 1043 C 1 *
+bit 1042 I 1 IO_AF17
+bit 1041 O 1 IO_AF17 1040 1 Z
+bit 1040 C 1 *
+bit 1039 I 1 IO_Y16
+bit 1038 O 1 IO_Y16 1037 1 Z
+bit 1037 C 1 *
+bit 1036 I 1 IO_AA16
+bit 1035 O 1 IO_AA16 1034 1 Z
+bit 1034 C 1 *
+bit 1033 O 1 *
+bit 1032 O 1 *
+bit 1031 O 1 *
+bit 1030 I 1 IO_AB16
+bit 1029 O 1 IO_AB16 1028 1 Z
+bit 1028 C 1 *
+bit 1027 I 1 IO_AC16
+bit 1026 O 1 IO_AC16 1025 1 Z
+bit 1025 C 1 *
+bit 1024 I 1 IO_AE16
+bit 1023 O 1 IO_AE16 1022 1 Z
+bit 1022 C 1 *
+bit 1021 I 1 IO_AF16
+bit 1020 O 1 IO_AF16 1019 1 Z
+bit 1019 C 1 *
+bit 1018 I 1 IO_W15
+bit 1017 O 1 IO_W15 1016 1 Z
+bit 1016 C 1 *
+bit 1015 I 1 IO_Y15
+bit 1014 O 1 IO_Y15 1013 1 Z
+bit 1013 C 1 *
+bit 1012 I 1 IO_W14
+bit 1011 O 1 IO_W14 1010 1 Z
+bit 1010 C 1 *
+bit 1009 I 1 IO_AA15
+bit 1008 O 1 IO_AA15 1007 1 Z
+bit 1007 C 1 *
+bit 1006 I 1 IO_AB15
+bit 1005 O 1 IO_AB15 1004 1 Z
+bit 1004 C 1 *
+bit 1003 I 1 IO_AD15
+bit 1002 O 1 IO_AD15 1001 1 Z
+bit 1001 C 1 *
+bit 1000 I 1 IO_AE15
+bit 999 O 1 IO_AE15 998 1 Z
+bit 998 C 1 *
+bit 997 I 1 IO_AF15
+bit 996 O 1 IO_AF15 995 1 Z
+bit 995 C 1 *
+bit 994 I 1 IO_Y14
+bit 993 O 1 IO_Y14 992 1 Z
+bit 992 C 1 *
+bit 991 I 1 IO_AA14
+bit 990 O 1 IO_AA14 989 1 Z
+bit 989 C 1 *
+bit 988 I 1 IO_AB14
+bit 987 O 1 IO_AB14 986 1 Z
+bit 986 C 1 *
+bit 985 I 1 IO_AC14
+bit 984 O 1 IO_AC14 983 1 Z
+bit 983 C 1 *
+bit 982 I 1 IO_AD14
+bit 981 O 1 IO_AD14 980 1 Z
+bit 980 C 1 *
+bit 979 I 1 IO_AE14
+bit 978 O 1 IO_AE14 977 1 Z
+bit 977 C 1 *
+bit 976 I 1 IO_AF14
+bit 975 O 1 IO_AF14 974 1 Z
+bit 974 C 1 *
+bit 973 I 1 IO_AF13
+bit 972 O 1 IO_AF13 971 1 Z
+bit 971 C 1 *
+bit 970 I 1 IO_AE13
+bit 969 O 1 IO_AE13 968 1 Z
+bit 968 C 1 *
+bit 967 I 1 IO_AD13
+bit 966 O 1 IO_AD13 965 1 Z
+bit 965 C 1 *
+bit 964 I 1 IO_AC13
+bit 963 O 1 IO_AC13 962 1 Z
+bit 962 C 1 *
+bit 961 I 1 IO_AB13
+bit 960 O 1 IO_AB13 959 1 Z
+bit 959 C 1 *
+bit 958 I 1 IO_AA13
+bit 957 O 1 IO_AA13 956 1 Z
+bit 956 C 1 *
+bit 955 I 1 IO_Y13
+bit 954 O 1 IO_Y13 953 1 Z
+bit 953 C 1 *
+bit 952 I 1 IO_W13
+bit 951 O 1 IO_W13 950 1 Z
+bit 950 C 1 *
+bit 949 I 1 IO_AF12
+bit 948 O 1 IO_AF12 947 1 Z
+bit 947 C 1 *
+bit 946 I 1 IO_AE12
+bit 945 O 1 IO_AE12 944 1 Z
+bit 944 C 1 *
+bit 943 I 1 IO_AD12
+bit 942 O 1 IO_AD12 941 1 Z
+bit 941 C 1 *
+bit 940 I 1 IO_AB12
+bit 939 O 1 IO_AB12 938 1 Z
+bit 938 C 1 *
+bit 937 I 1 IO_AA12
+bit 936 O 1 IO_AA12 935 1 Z
+bit 935 C 1 *
+bit 934 I 1 IO_Y12
+bit 933 O 1 IO_Y12 932 1 Z
+bit 932 C 1 *
+bit 931 I 1 IO_W12
+bit 930 O 1 IO_W12 929 1 Z
+bit 929 C 1 *
+bit 928 I 1 IO_AC11
+bit 927 O 1 IO_AC11 926 1 Z
+bit 926 C 1 *
+bit 925 I 1 IO_AF11
+bit 924 O 1 IO_AF11 923 1 Z
+bit 923 C 1 *
+bit 922 I 1 IO_AE11
+bit 921 O 1 IO_AE11 920 1 Z
+bit 920 C 1 *
+bit 919 I 1 IO_AB11
+bit 918 O 1 IO_AB11 917 1 Z
+bit 917 C 1 *
+bit 916 I 1 IO_AA11
+bit 915 O 1 IO_AA11 914 1 Z
+bit 914 C 1 *
+bit 913 O 1 *
+bit 912 O 1 *
+bit 911 O 1 *
+bit 910 I 1 IO_Y11
+bit 909 O 1 IO_Y11 908 1 Z
+bit 908 C 1 *
+bit 907 I 1 IO_W11
+bit 906 O 1 IO_W11 905 1 Z
+bit 905 C 1 *
+bit 904 I 1 IO_AF10
+bit 903 O 1 IO_AF10 902 1 Z
+bit 902 C 1 *
+bit 901 I 1 IO_AE10
+bit 900 O 1 IO_AE10 899 1 Z
+bit 899 C 1 *
+bit 898 I 1 IO_AD10
+bit 897 O 1 IO_AD10 896 1 Z
+bit 896 C 1 *
+bit 895 I 1 IO_AC10
+bit 894 O 1 IO_AC10 893 1 Z
+bit 893 C 1 *
+bit 892 I 1 IO_AB10
+bit 891 O 1 IO_AB10 890 1 Z
+bit 890 C 1 *
+bit 889 I 1 IO_AA10
+bit 888 O 1 IO_AA10 887 1 Z
+bit 887 C 1 *
+bit 886 I 1 IO_Y10
+bit 885 O 1 IO_Y10 884 1 Z
+bit 884 C 1 *
+bit 883 O 1 *
+bit 882 O 1 *
+bit 881 O 1 *
+bit 880 I 1 IO_AE9
+bit 879 O 1 IO_AE9 878 1 Z
+bit 878 C 1 *
+bit 877 I 1 IO_AD9
+bit 876 O 1 IO_AD9 875 1 Z
+bit 875 C 1 *
+bit 874 I 1 IO_AC9
+bit 873 O 1 IO_AC9 872 1 Z
+bit 872 C 1 *
+bit 871 O 1 *
+bit 870 O 1 *
+bit 869 O 1 *
+bit 868 I 1 IO_AB9
+bit 867 O 1 IO_AB9 866 1 Z
+bit 866 C 1 *
+bit 865 I 1 IO_AA9
+bit 864 O 1 IO_AA9 863 1 Z
+bit 863 C 1 *
+bit 862 I 1 IO_Y9
+bit 861 O 1 IO_Y9 860 1 Z
+bit 860 C 1 *
+bit 859 I 1 IO_AF8
+bit 858 O 1 IO_AF8 857 1 Z
+bit 857 C 1 *
+bit 856 I 1 IO_AE8
+bit 855 O 1 IO_AE8 854 1 Z
+bit 854 C 1 *
+bit 853 O 1 *
+bit 852 O 1 *
+bit 851 O 1 *
+bit 850 I 1 IO_AD8
+bit 849 O 1 IO_AD8 848 1 Z
+bit 848 C 1 *
+bit 847 I 1 IO_AC8
+bit 846 O 1 IO_AC8 845 1 Z
+bit 845 C 1 *
+bit 844 I 1 IO_AB8
+bit 843 O 1 IO_AB8 842 1 Z
+bit 842 C 1 *
+bit 841 I 1 IO_AA8
+bit 840 O 1 IO_AA8 839 1 Z
+bit 839 C 1 *
+bit 838 I 1 IO_Y8
+bit 837 O 1 IO_Y8 836 1 Z
+bit 836 C 1 *
+bit 835 I 1 IO_AF7
+bit 834 O 1 IO_AF7 833 1 Z
+bit 833 C 1 *
+bit 832 I 1 IO_AE7
+bit 831 O 1 IO_AE7 830 1 Z
+bit 830 C 1 *
+bit 829 I 1 IO_AC7
+bit 828 O 1 IO_AC7 827 1 Z
+bit 827 C 1 *
+bit 826 I 1 IO_AB7
+bit 825 O 1 IO_AB7 824 1 Z
+bit 824 C 1 *
+bit 823 I 1 IO_AA7
+bit 822 O 1 IO_AA7 821 1 Z
+bit 821 C 1 *
+bit 820 I 1 IO_AF6
+bit 819 O 1 IO_AF6 818 1 Z
+bit 818 C 1 *
+bit 817 I 1 IO_AE6
+bit 816 O 1 IO_AE6 815 1 Z
+bit 815 C 1 *
+bit 814 I 1 IO_AD6
+bit 813 O 1 IO_AD6 812 1 Z
+bit 812 C 1 *
+bit 811 I 1 IO_AC6
+bit 810 O 1 IO_AC6 809 1 Z
+bit 809 C 1 *
+bit 808 I 1 IO_AF5
+bit 807 O 1 IO_AF5 806 1 Z
+bit 806 C 1 *
+bit 805 I 1 IO_AE5
+bit 804 O 1 IO_AE5 803 1 Z
+bit 803 C 1 *
+bit 802 I 1 IO_AD5
+bit 801 O 1 IO_AD5 800 1 Z
+bit 800 C 1 *
+bit 799 I 1 IO_AB6
+bit 798 O 1 IO_AB6 797 1 Z
+bit 797 C 1 *
+bit 796 I 1 IO_AA6
+bit 795 O 1 IO_AA6 794 1 Z
+bit 794 C 1 *
+bit 793 I 1 IO_AF4
+bit 792 O 1 IO_AF4 791 1 Z
+bit 791 C 1 *
+bit 790 I 1 IO_AE4
+bit 789 O 1 IO_AE4 788 1 Z
+bit 788 C 1 *
+bit 787 I 1 IO_AD4
+bit 786 O 1 IO_AD4 785 1 Z
+bit 785 C 1 *
+bit 784 I 1 IO_AC5
+bit 783 O 1 IO_AC5 782 1 Z
+bit 782 C 1 *
+bit 781 I 1 IO_AB5
+bit 780 O 1 IO_AB5 779 1 Z
+bit 779 C 1 *
+bit 778 I 1 M2_AF3
+bit 777 I 1 M0_AE3
+bit 776 I 1 M1_AC3
+bit 775 I 1 IO_AD2
+bit 774 O 1 IO_AD2 773 1 Z
+bit 773 C 1 *
+bit 772 I 1 IO_AD1
+bit 771 O 1 IO_AD1 770 1 Z
+bit 770 C 1 *
+bit 769 I 1 IO_AB4
+bit 768 O 1 IO_AB4 767 1 Z
+bit 767 C 1 *
+bit 766 I 1 IO_AB3
+bit 765 O 1 IO_AB3 764 1 Z
+bit 764 C 1 *
+bit 763 I 1 IO_AC2
+bit 762 O 1 IO_AC2 761 1 Z
+bit 761 C 1 *
+bit 760 I 1 IO_AC1
+bit 759 O 1 IO_AC1 758 1 Z
+bit 758 C 1 *
+bit 757 I 1 IO_AB2
+bit 756 O 1 IO_AB2 755 1 Z
+bit 755 C 1 *
+bit 754 I 1 IO_AB1
+bit 753 O 1 IO_AB1 752 1 Z
+bit 752 C 1 *
+bit 751 I 1 IO_Y7
+bit 750 O 1 IO_Y7 749 1 Z
+bit 749 C 1 *
+bit 748 I 1 IO_Y6
+bit 747 O 1 IO_Y6 746 1 Z
+bit 746 C 1 *
+bit 745 I 1 IO_AA4
+bit 744 O 1 IO_AA4 743 1 Z
+bit 743 C 1 *
+bit 742 I 1 IO_AA3
+bit 741 O 1 IO_AA3 740 1 Z
+bit 740 C 1 *
+bit 739 I 1 IO_Y5
+bit 738 O 1 IO_Y5 737 1 Z
+bit 737 C 1 *
+bit 736 I 1 IO_Y4
+bit 735 O 1 IO_Y4 734 1 Z
+bit 734 C 1 *
+bit 733 I 1 IO_AA2
+bit 732 O 1 IO_AA2 731 1 Z
+bit 731 C 1 *
+bit 730 I 1 IO_AA1
+bit 729 O 1 IO_AA1 728 1 Z
+bit 728 C 1 *
+bit 727 I 1 IO_Y2
+bit 726 O 1 IO_Y2 725 1 Z
+bit 725 C 1 *
+bit 724 I 1 IO_Y1
+bit 723 O 1 IO_Y1 722 1 Z
+bit 722 C 1 *
+bit 721 I 1 IO_W7
+bit 720 O 1 IO_W7 719 1 Z
+bit 719 C 1 *
+bit 718 I 1 IO_W6
+bit 717 O 1 IO_W6 716 1 Z
+bit 716 C 1 *
+bit 715 I 1 IO_V6
+bit 714 O 1 IO_V6 713 1 Z
+bit 713 C 1 *
+bit 712 I 1 IO_W5
+bit 711 O 1 IO_W5 710 1 Z
+bit 710 C 1 *
+bit 709 I 1 IO_W4
+bit 708 O 1 IO_W4 707 1 Z
+bit 707 C 1 *
+bit 706 I 1 IO_W3
+bit 705 O 1 IO_W3 704 1 Z
+bit 704 C 1 *
+bit 703 I 1 IO_W2
+bit 702 O 1 IO_W2 701 1 Z
+bit 701 C 1 *
+bit 700 I 1 IO_W1
+bit 699 O 1 IO_W1 698 1 Z
+bit 698 C 1 *
+bit 697 I 1 IO_V7
+bit 696 O 1 IO_V7 695 1 Z
+bit 695 C 1 *
+bit 694 I 1 IO_U7
+bit 693 O 1 IO_U7 692 1 Z
+bit 692 C 1 *
+bit 691 I 1 IO_V5
+bit 690 O 1 IO_V5 689 1 Z
+bit 689 C 1 *
+bit 688 I 1 IO_V4
+bit 687 O 1 IO_V4 686 1 Z
+bit 686 C 1 *
+bit 685 I 1 IO_V3
+bit 684 O 1 IO_V3 683 1 Z
+bit 683 C 1 *
+bit 682 I 1 IO_V2
+bit 681 O 1 IO_V2 680 1 Z
+bit 680 C 1 *
+bit 679 I 1 IO_U6
+bit 678 O 1 IO_U6 677 1 Z
+bit 677 C 1 *
+bit 676 I 1 IO_U5
+bit 675 O 1 IO_U5 674 1 Z
+bit 674 C 1 *
+bit 673 I 1 IO_U4
+bit 672 O 1 IO_U4 671 1 Z
+bit 671 C 1 *
+bit 670 I 1 IO_U3
+bit 669 O 1 IO_U3 668 1 Z
+bit 668 C 1 *
+bit 667 I 1 IO_U2
+bit 666 O 1 IO_U2 665 1 Z
+bit 665 C 1 *
+bit 664 I 1 IO_U1
+bit 663 O 1 IO_U1 662 1 Z
+bit 662 C 1 *
+bit 661 I 1 IO_T8
+bit 660 O 1 IO_T8 659 1 Z
+bit 659 C 1 *
+bit 658 I 1 IO_T7
+bit 657 O 1 IO_T7 656 1 Z
+bit 656 C 1 *
+bit 655 I 1 IO_T6
+bit 654 O 1 IO_T6 653 1 Z
+bit 653 C 1 *
+bit 652 I 1 IO_T5
+bit 651 O 1 IO_T5 650 1 Z
+bit 650 C 1 *
+bit 649 I 1 IO_T2
+bit 648 O 1 IO_T2 647 1 Z
+bit 647 C 1 *
+bit 646 I 1 IO_T1
+bit 645 O 1 IO_T1 644 1 Z
+bit 644 C 1 *
+bit 643 O 1 *
+bit 642 O 1 *
+bit 641 O 1 *
+bit 640 O 1 *
+bit 639 O 1 *
+bit 638 O 1 *
+bit 637 I 1 IO_R8
+bit 636 O 1 IO_R8 635 1 Z
+bit 635 C 1 *
+bit 634 I 1 IO_R7
+bit 633 O 1 IO_R7 632 1 Z
+bit 632 C 1 *
+bit 631 I 1 IO_R6
+bit 630 O 1 IO_R6 629 1 Z
+bit 629 C 1 *
+bit 628 I 1 IO_R5
+bit 627 O 1 IO_R5 626 1 Z
+bit 626 C 1 *
+bit 625 I 1 IO_T4
+bit 624 O 1 IO_T4 623 1 Z
+bit 623 C 1 *
+bit 622 I 1 IO_R3
+bit 621 O 1 IO_R3 620 1 Z
+bit 620 C 1 *
+bit 619 I 1 IO_R2
+bit 618 O 1 IO_R2 617 1 Z
+bit 617 C 1 *
+bit 616 I 1 IO_R1
+bit 615 O 1 IO_R1 614 1 Z
+bit 614 C 1 *
+bit 613 I 1 IO_P8
+bit 612 O 1 IO_P8 611 1 Z
+bit 611 C 1 *
+bit 610 I 1 IO_P7
+bit 609 O 1 IO_P7 608 1 Z
+bit 608 C 1 *
+bit 607 O 1 *
+bit 606 O 1 *
+bit 605 O 1 *
+bit 604 O 1 *
+bit 603 O 1 *
+bit 602 O 1 *
+bit 601 I 1 IO_P6
+bit 600 O 1 IO_P6 599 1 Z
+bit 599 C 1 *
+bit 598 I 1 IO_P5
+bit 597 O 1 IO_P5 596 1 Z
+bit 596 C 1 *
+bit 595 I 1 IO_P4
+bit 594 O 1 IO_P4 593 1 Z
+bit 593 C 1 *
+bit 592 I 1 IO_P3
+bit 591 O 1 IO_P3 590 1 Z
+bit 590 C 1 *
+bit 589 I 1 IO_P2
+bit 588 O 1 IO_P2 587 1 Z
+bit 587 C 1 *
+bit 586 I 1 IO_P1
+bit 585 O 1 IO_P1 584 1 Z
+bit 584 C 1 *
+bit 583 I 1 IO_N1
+bit 582 O 1 IO_N1 581 1 Z
+bit 581 C 1 *
+bit 580 I 1 IO_N2
+bit 579 O 1 IO_N2 578 1 Z
+bit 578 C 1 *
+bit 577 I 1 IO_N3
+bit 576 O 1 IO_N3 575 1 Z
+bit 575 C 1 *
+bit 574 I 1 IO_N4
+bit 573 O 1 IO_N4 572 1 Z
+bit 572 C 1 *
+bit 571 I 1 IO_N5
+bit 570 O 1 IO_N5 569 1 Z
+bit 569 C 1 *
+bit 568 I 1 IO_N6
+bit 567 O 1 IO_N6 566 1 Z
+bit 566 C 1 *
+bit 565 O 1 *
+bit 564 O 1 *
+bit 563 O 1 *
+bit 562 O 1 *
+bit 561 O 1 *
+bit 560 O 1 *
+bit 559 I 1 IO_N7
+bit 558 O 1 IO_N7 557 1 Z
+bit 557 C 1 *
+bit 556 I 1 IO_N8
+bit 555 O 1 IO_N8 554 1 Z
+bit 554 C 1 *
+bit 553 I 1 IO_M1
+bit 552 O 1 IO_M1 551 1 Z
+bit 551 C 1 *
+bit 550 I 1 IO_M2
+bit 549 O 1 IO_M2 548 1 Z
+bit 548 C 1 *
+bit 547 I 1 IO_M3
+bit 546 O 1 IO_M3 545 1 Z
+bit 545 C 1 *
+bit 544 I 1 IO_L4
+bit 543 O 1 IO_L4 542 1 Z
+bit 542 C 1 *
+bit 541 I 1 IO_M6
+bit 540 O 1 IO_M6 539 1 Z
+bit 539 C 1 *
+bit 538 I 1 IO_M5
+bit 537 O 1 IO_M5 536 1 Z
+bit 536 C 1 *
+bit 535 I 1 IO_M7
+bit 534 O 1 IO_M7 533 1 Z
+bit 533 C 1 *
+bit 532 I 1 IO_M8
+bit 531 O 1 IO_M8 530 1 Z
+bit 530 C 1 *
+bit 529 O 1 *
+bit 528 O 1 *
+bit 527 O 1 *
+bit 526 O 1 *
+bit 525 O 1 *
+bit 524 O 1 *
+bit 523 I 1 IO_L1
+bit 522 O 1 IO_L1 521 1 Z
+bit 521 C 1 *
+bit 520 I 1 IO_L2
+bit 519 O 1 IO_L2 518 1 Z
+bit 518 C 1 *
+bit 517 I 1 IO_L5
+bit 516 O 1 IO_L5 515 1 Z
+bit 515 C 1 *
+bit 514 I 1 IO_L6
+bit 513 O 1 IO_L6 512 1 Z
+bit 512 C 1 *
+bit 511 I 1 IO_L7
+bit 510 O 1 IO_L7 509 1 Z
+bit 509 C 1 *
+bit 508 I 1 IO_L8
+bit 507 O 1 IO_L8 506 1 Z
+bit 506 C 1 *
+bit 505 I 1 IO_K1
+bit 504 O 1 IO_K1 503 1 Z
+bit 503 C 1 *
+bit 502 I 1 IO_K2
+bit 501 O 1 IO_K2 500 1 Z
+bit 500 C 1 *
+bit 499 I 1 IO_K3
+bit 498 O 1 IO_K3 497 1 Z
+bit 497 C 1 *
+bit 496 I 1 IO_K4
+bit 495 O 1 IO_K4 494 1 Z
+bit 494 C 1 *
+bit 493 I 1 IO_K5
+bit 492 O 1 IO_K5 491 1 Z
+bit 491 C 1 *
+bit 490 I 1 IO_K6
+bit 489 O 1 IO_K6 488 1 Z
+bit 488 C 1 *
+bit 487 I 1 IO_J2
+bit 486 O 1 IO_J2 485 1 Z
+bit 485 C 1 *
+bit 484 I 1 IO_J3
+bit 483 O 1 IO_J3 482 1 Z
+bit 482 C 1 *
+bit 481 I 1 IO_J4
+bit 480 O 1 IO_J4 479 1 Z
+bit 479 C 1 *
+bit 478 I 1 IO_J5
+bit 477 O 1 IO_J5 476 1 Z
+bit 476 C 1 *
+bit 475 I 1 IO_K7
+bit 474 O 1 IO_K7 473 1 Z
+bit 473 C 1 *
+bit 472 I 1 IO_J7
+bit 471 O 1 IO_J7 470 1 Z
+bit 470 C 1 *
+bit 469 I 1 IO_H1
+bit 468 O 1 IO_H1 467 1 Z
+bit 467 C 1 *
+bit 466 I 1 IO_H2
+bit 465 O 1 IO_H2 464 1 Z
+bit 464 C 1 *
+bit 463 I 1 IO_H3
+bit 462 O 1 IO_H3 461 1 Z
+bit 461 C 1 *
+bit 460 I 1 IO_H4
+bit 459 O 1 IO_H4 458 1 Z
+bit 458 C 1 *
+bit 457 I 1 IO_J6
+bit 456 O 1 IO_J6 455 1 Z
+bit 455 C 1 *
+bit 454 I 1 IO_H5
+bit 453 O 1 IO_H5 452 1 Z
+bit 452 C 1 *
+bit 451 I 1 IO_G1
+bit 450 O 1 IO_G1 449 1 Z
+bit 449 C 1 *
+bit 448 I 1 IO_G2
+bit 447 O 1 IO_G2 446 1 Z
+bit 446 C 1 *
+bit 445 I 1 IO_H6
+bit 444 O 1 IO_H6 443 1 Z
+bit 443 C 1 *
+bit 442 I 1 IO_H7
+bit 441 O 1 IO_H7 440 1 Z
+bit 440 C 1 *
+bit 439 I 1 IO_F1
+bit 438 O 1 IO_F1 437 1 Z
+bit 437 C 1 *
+bit 436 I 1 IO_F2
+bit 435 O 1 IO_F2 434 1 Z
+bit 434 C 1 *
+bit 433 I 1 IO_G4
+bit 432 O 1 IO_G4 431 1 Z
+bit 431 C 1 *
+bit 430 I 1 IO_G5
+bit 429 O 1 IO_G5 428 1 Z
+bit 428 C 1 *
+bit 427 I 1 IO_F3
+bit 426 O 1 IO_F3 425 1 Z
+bit 425 C 1 *
+bit 424 I 1 IO_F4
+bit 423 O 1 IO_F4 422 1 Z
+bit 422 C 1 *
+bit 421 I 1 IO_E1
+bit 420 O 1 IO_E1 419 1 Z
+bit 419 C 1 *
+bit 418 I 1 IO_E2
+bit 417 O 1 IO_E2 416 1 Z
+bit 416 C 1 *
+bit 415 I 1 IO_G6
+bit 414 O 1 IO_G6 413 1 Z
+bit 413 C 1 *
+bit 412 I 1 IO_G7
+bit 411 O 1 IO_G7 410 1 Z
+bit 410 C 1 *
+bit 409 I 1 IO_D1
+bit 408 O 1 IO_D1 407 1 Z
+bit 407 C 1 *
+bit 406 I 1 IO_D2
+bit 405 O 1 IO_D2 404 1 Z
+bit 404 C 1 *
+bit 403 I 1 IO_E3
+bit 402 O 1 IO_E3 401 1 Z
+bit 401 C 1 *
+bit 400 I 1 IO_E4
+bit 399 O 1 IO_E4 398 1 Z
+bit 398 C 1 *
+bit 397 I 1 IO_F5
+bit 396 O 1 IO_F5 395 1 Z
+bit 395 C 1 *
+bit 394 I 1 IO_F6
+bit 393 O 1 IO_F6 392 1 Z
+bit 392 C 1 *
+bit 391 O 1 *
+bit 390 I 1 HSWAP_EN_C2
+bit 389 I 1 IO_B3
+bit 388 O 1 IO_B3 387 1 Z
+bit 387 C 1 *
+bit 386 I 1 IO_E5
+bit 385 O 1 IO_E5 384 1 Z
+bit 384 C 1 *
+bit 383 I 1 IO_D5
+bit 382 O 1 IO_D5 381 1 Z
+bit 381 C 1 *
+bit 380 O 1 *
+bit 379 O 1 *
+bit 378 O 1 *
+bit 377 I 1 IO_A3
+bit 376 O 1 IO_A3 375 1 Z
+bit 375 C 1 *
+bit 374 I 1 IO_C4
+bit 373 O 1 IO_C4 372 1 Z
+bit 372 C 1 *
+bit 371 I 1 IO_B4
+bit 370 O 1 IO_B4 369 1 Z
+bit 369 C 1 *
+bit 368 I 1 IO_A4
+bit 367 O 1 IO_A4 366 1 Z
+bit 366 C 1 *
+bit 365 I 1 IO_C5
+bit 364 O 1 IO_C5 363 1 Z
+bit 363 C 1 *
+bit 362 I 1 IO_B5
+bit 361 O 1 IO_B5 360 1 Z
+bit 360 C 1 *
+bit 359 I 1 IO_A5
+bit 358 O 1 IO_A5 357 1 Z
+bit 357 C 1 *
+bit 356 I 1 IO_E6
+bit 355 O 1 IO_E6 354 1 Z
+bit 354 C 1 *
+bit 353 I 1 IO_D6
+bit 352 O 1 IO_D6 351 1 Z
+bit 351 C 1 *
+bit 350 I 1 IO_C6
+bit 349 O 1 IO_C6 348 1 Z
+bit 348 C 1 *
+bit 347 I 1 IO_B6
+bit 346 O 1 IO_B6 345 1 Z
+bit 345 C 1 *
+bit 344 I 1 IO_A6
+bit 343 O 1 IO_A6 342 1 Z
+bit 342 C 1 *
+bit 341 I 1 IO_E7
+bit 340 O 1 IO_E7 339 1 Z
+bit 339 C 1 *
+bit 338 I 1 IO_D7
+bit 337 O 1 IO_D7 336 1 Z
+bit 336 C 1 *
+bit 335 I 1 IO_B7
+bit 334 O 1 IO_B7 333 1 Z
+bit 333 C 1 *
+bit 332 I 1 IO_A7
+bit 331 O 1 IO_A7 330 1 Z
+bit 330 C 1 *
+bit 329 I 1 IO_F7
+bit 328 O 1 IO_F7 327 1 Z
+bit 327 C 1 *
+bit 326 I 1 IO_G8
+bit 325 O 1 IO_G8 324 1 Z
+bit 324 C 1 *
+bit 323 I 1 IO_F8
+bit 322 O 1 IO_F8 321 1 Z
+bit 321 C 1 *
+bit 320 I 1 IO_E8
+bit 319 O 1 IO_E8 318 1 Z
+bit 318 C 1 *
+bit 317 I 1 IO_D8
+bit 316 O 1 IO_D8 315 1 Z
+bit 315 C 1 *
+bit 314 I 1 IO_C8
+bit 313 O 1 IO_C8 312 1 Z
+bit 312 C 1 *
+bit 311 I 1 IO_B8
+bit 310 O 1 IO_B8 309 1 Z
+bit 309 C 1 *
+bit 308 I 1 IO_A8
+bit 307 O 1 IO_A8 306 1 Z
+bit 306 C 1 *
+bit 305 I 1 IO_G9
+bit 304 O 1 IO_G9 303 1 Z
+bit 303 C 1 *
+bit 302 I 1 IO_F9
+bit 301 O 1 IO_F9 300 1 Z
+bit 300 C 1 *
+bit 299 O 1 *
+bit 298 O 1 *
+bit 297 O 1 *
+bit 296 I 1 IO_E9
+bit 295 O 1 IO_E9 294 1 Z
+bit 294 C 1 *
+bit 293 I 1 IO_D9
+bit 292 O 1 IO_D9 291 1 Z
+bit 291 C 1 *
+bit 290 I 1 IO_C9
+bit 289 O 1 IO_C9 288 1 Z
+bit 288 C 1 *
+bit 287 I 1 IO_B9
+bit 286 O 1 IO_B9 285 1 Z
+bit 285 C 1 *
+bit 284 I 1 IO_G10
+bit 283 O 1 IO_G10 282 1 Z
+bit 282 C 1 *
+bit 281 I 1 IO_F10
+bit 280 O 1 IO_F10 279 1 Z
+bit 279 C 1 *
+bit 278 I 1 IO_E10
+bit 277 O 1 IO_E10 276 1 Z
+bit 276 C 1 *
+bit 275 I 1 IO_D10
+bit 274 O 1 IO_D10 273 1 Z
+bit 273 C 1 *
+bit 272 I 1 IO_C10
+bit 271 O 1 IO_C10 270 1 Z
+bit 270 C 1 *
+bit 269 I 1 IO_H11
+bit 268 O 1 IO_H11 267 1 Z
+bit 267 C 1 *
+bit 266 I 1 IO_B10
+bit 265 O 1 IO_B10 264 1 Z
+bit 264 C 1 *
+bit 263 I 1 IO_A10
+bit 262 O 1 IO_A10 261 1 Z
+bit 261 C 1 *
+bit 260 I 1 IO_G11
+bit 259 O 1 IO_G11 258 1 Z
+bit 258 C 1 *
+bit 257 I 1 IO_F11
+bit 256 O 1 IO_F11 255 1 Z
+bit 255 C 1 *
+bit 254 O 1 *
+bit 253 O 1 *
+bit 252 O 1 *
+bit 251 I 1 IO_E11
+bit 250 O 1 IO_E11 249 1 Z
+bit 249 C 1 *
+bit 248 I 1 IO_D11
+bit 247 O 1 IO_D11 246 1 Z
+bit 246 C 1 *
+bit 245 I 1 IO_B11
+bit 244 O 1 IO_B11 243 1 Z
+bit 243 C 1 *
+bit 242 I 1 IO_A11
+bit 241 O 1 IO_A11 240 1 Z
+bit 240 C 1 *
+bit 239 I 1 IO_H12
+bit 238 O 1 IO_H12 237 1 Z
+bit 237 C 1 *
+bit 236 I 1 IO_G12
+bit 235 O 1 IO_G12 234 1 Z
+bit 234 C 1 *
+bit 233 I 1 IO_H13
+bit 232 O 1 IO_H13 231 1 Z
+bit 231 C 1 *
+bit 230 I 1 IO_F12
+bit 229 O 1 IO_F12 228 1 Z
+bit 228 C 1 *
+bit 227 I 1 IO_E12
+bit 226 O 1 IO_E12 225 1 Z
+bit 225 C 1 *
+bit 224 I 1 IO_C12
+bit 223 O 1 IO_C12 222 1 Z
+bit 222 C 1 *
+bit 221 I 1 IO_B12
+bit 220 O 1 IO_B12 219 1 Z
+bit 219 C 1 *
+bit 218 I 1 IO_A12
+bit 217 O 1 IO_A12 216 1 Z
+bit 216 C 1 *
+bit 215 I 1 IO_G13
+bit 214 O 1 IO_G13 213 1 Z
+bit 213 C 1 *
+bit 212 I 1 IO_F13
+bit 211 O 1 IO_F13 210 1 Z
+bit 210 C 1 *
+bit 209 I 1 IO_E13
+bit 208 O 1 IO_E13 207 1 Z
+bit 207 C 1 *
+bit 206 I 1 IO_D13
+bit 205 O 1 IO_D13 204 1 Z
+bit 204 C 1 *
+bit 203 I 1 IO_C13
+bit 202 O 1 IO_C13 201 1 Z
+bit 201 C 1 *
+bit 200 I 1 IO_B13
+bit 199 O 1 IO_B13 198 1 Z
+bit 198 C 1 *
+bit 197 I 1 IO_A13
+bit 196 O 1 IO_A13 195 1 Z
+bit 195 C 1 *
+bit 194 I 1 IO_A14
+bit 193 O 1 IO_A14 192 1 Z
+bit 192 C 1 *
+bit 191 I 1 IO_B14
+bit 190 O 1 IO_B14 189 1 Z
+bit 189 C 1 *
+bit 188 I 1 IO_C14
+bit 187 O 1 IO_C14 186 1 Z
+bit 186 C 1 *
+bit 185 I 1 IO_D14
+bit 184 O 1 IO_D14 183 1 Z
+bit 183 C 1 *
+bit 182 I 1 IO_E14
+bit 181 O 1 IO_E14 180 1 Z
+bit 180 C 1 *
+bit 179 I 1 IO_F14
+bit 178 O 1 IO_F14 177 1 Z
+bit 177 C 1 *
+bit 176 I 1 IO_G14
+bit 175 O 1 IO_G14 174 1 Z
+bit 174 C 1 *
+bit 173 I 1 IO_H14
+bit 172 O 1 IO_H14 171 1 Z
+bit 171 C 1 *
+bit 170 I 1 IO_A15
+bit 169 O 1 IO_A15 168 1 Z
+bit 168 C 1 *
+bit 167 I 1 IO_B15
+bit 166 O 1 IO_B15 165 1 Z
+bit 165 C 1 *
+bit 164 I 1 IO_C15
+bit 163 O 1 IO_C15 162 1 Z
+bit 162 C 1 *
+bit 161 I 1 IO_E15
+bit 160 O 1 IO_E15 159 1 Z
+bit 159 C 1 *
+bit 158 I 1 IO_F15
+bit 157 O 1 IO_F15 156 1 Z
+bit 156 C 1 *
+bit 155 I 1 IO_G15
+bit 154 O 1 IO_G15 153 1 Z
+bit 153 C 1 *
+bit 152 I 1 IO_H15
+bit 151 O 1 IO_H15 150 1 Z
+bit 150 C 1 *
+bit 149 I 1 IO_D16
+bit 148 O 1 IO_D16 147 1 Z
+bit 147 C 1 *
+bit 146 I 1 IO_A16
+bit 145 O 1 IO_A16 144 1 Z
+bit 144 C 1 *
+bit 143 I 1 IO_B16
+bit 142 O 1 IO_B16 141 1 Z
+bit 141 C 1 *
+bit 140 I 1 IO_E16
+bit 139 O 1 IO_E16 138 1 Z
+bit 138 C 1 *
+bit 137 I 1 IO_F16
+bit 136 O 1 IO_F16 135 1 Z
+bit 135 C 1 *
+bit 134 O 1 *
+bit 133 O 1 *
+bit 132 O 1 *
+bit 131 I 1 IO_G16
+bit 130 O 1 IO_G16 129 1 Z
+bit 129 C 1 *
+bit 128 I 1 IO_H16
+bit 127 O 1 IO_H16 126 1 Z
+bit 126 C 1 *
+bit 125 I 1 IO_A17
+bit 124 O 1 IO_A17 123 1 Z
+bit 123 C 1 *
+bit 122 I 1 IO_B17
+bit 121 O 1 IO_B17 120 1 Z
+bit 120 C 1 *
+bit 119 I 1 IO_C17
+bit 118 O 1 IO_C17 117 1 Z
+bit 117 C 1 *
+bit 116 I 1 IO_D17
+bit 115 O 1 IO_D17 114 1 Z
+bit 114 C 1 *
+bit 113 I 1 IO_E17
+bit 112 O 1 IO_E17 111 1 Z
+bit 111 C 1 *
+bit 110 I 1 IO_F17
+bit 109 O 1 IO_F17 108 1 Z
+bit 108 C 1 *
+bit 107 I 1 IO_G17
+bit 106 O 1 IO_G17 105 1 Z
+bit 105 C 1 *
+bit 104 O 1 *
+bit 103 O 1 *
+bit 102 O 1 *
+bit 101 I 1 IO_B18
+bit 100 O 1 IO_B18 99 1 Z
+bit 99 C 1 *
+bit 98 I 1 IO_C18
+bit 97 O 1 IO_C18 96 1 Z
+bit 96 C 1 *
+bit 95 I 1 IO_D18
+bit 94 O 1 IO_D18 93 1 Z
+bit 93 C 1 *
+bit 92 O 1 *
+bit 91 O 1 *
+bit 90 O 1 *
+bit 89 I 1 IO_E18
+bit 88 O 1 IO_E18 87 1 Z
+bit 87 C 1 *
+bit 86 I 1 IO_F18
+bit 85 O 1 IO_F18 84 1 Z
+bit 84 C 1 *
+bit 83 I 1 IO_G18
+bit 82 O 1 IO_G18 81 1 Z
+bit 81 C 1 *
+bit 80 I 1 IO_A19
+bit 79 O 1 IO_A19 78 1 Z
+bit 78 C 1 *
+bit 77 I 1 IO_B19
+bit 76 O 1 IO_B19 75 1 Z
+bit 75 C 1 *
+bit 74 O 1 *
+bit 73 O 1 *
+bit 72 O 1 *
+bit 71 I 1 IO_C19
+bit 70 O 1 IO_C19 69 1 Z
+bit 69 C 1 *
+bit 68 I 1 IO_D19
+bit 67 O 1 IO_D19 66 1 Z
+bit 66 C 1 *
+bit 65 I 1 IO_E19
+bit 64 O 1 IO_E19 63 1 Z
+bit 63 C 1 *
+bit 62 I 1 IO_F19
+bit 61 O 1 IO_F19 60 1 Z
+bit 60 C 1 *
+bit 59 I 1 IO_G19
+bit 58 O 1 IO_G19 57 1 Z
+bit 57 C 1 *
+bit 56 I 1 IO_A20
+bit 55 O 1 IO_A20 54 1 Z
+bit 54 C 1 *
+bit 53 I 1 IO_B20
+bit 52 O 1 IO_B20 51 1 Z
+bit 51 C 1 *
+bit 50 I 1 IO_D20
+bit 49 O 1 IO_D20 48 1 Z
+bit 48 C 1 *
+bit 47 I 1 IO_E20
+bit 46 O 1 IO_E20 45 1 Z
+bit 45 C 1 *
+bit 44 I 1 IO_F20
+bit 43 O 1 IO_F20 42 1 Z
+bit 42 C 1 *
+bit 41 I 1 IO_A21
+bit 40 O 1 IO_A21 39 1 Z
+bit 39 C 1 *
+bit 38 I 1 IO_B21
+bit 37 O 1 IO_B21 36 1 Z
+bit 36 C 1 *
+bit 35 I 1 IO_C21
+bit 34 O 1 IO_C21 33 1 Z
+bit 33 C 1 *
+bit 32 I 1 IO_D21
+bit 31 O 1 IO_D21 30 1 Z
+bit 30 C 1 *
+bit 29 I 1 IO_A22
+bit 28 O 1 IO_A22 27 1 Z
+bit 27 C 1 *
+bit 26 I 1 IO_B22
+bit 25 O 1 IO_B22 24 1 Z
+bit 24 C 1 *
+bit 23 I 1 IO_C22
+bit 22 O 1 IO_C22 21 1 Z
+bit 21 C 1 *
+bit 20 I 1 IO_E21
+bit 19 O 1 IO_E21 18 1 Z
+bit 18 C 1 *
+bit 17 I 1 IO_F21
+bit 16 O 1 IO_F21 15 1 Z
+bit 15 C 1 *
+bit 14 I 1 IO_A23
+bit 13 O 1 IO_A23 12 1 Z
+bit 12 C 1 *
+bit 11 I 1 IO_B23
+bit 10 O 1 IO_B23 9 1 Z
+bit 9 C 1 *
+bit 8 I 1 IO_C23
+bit 7 O 1 IO_C23 6 1 Z
+bit 6 C 1 *
+bit 5 I 1 IO_D22
+bit 4 O 1 IO_D22 3 1 Z
+bit 3 C 1 *
+bit 2 I 1 IO_E22
+bit 1 O 1 IO_E22 0 1 Z
+bit 0 C 1 *
--- /dev/null
+0000 xc3s200 0
--- /dev/null
+signal GND1
+signal GND2
+signal GND3
+signal GND4
+signal GND5
+signal GND6
+signal GND7
+signal GND8
+signal GND9
+signal GND10
+signal GND11
+signal GND12
+signal GND13
+signal GND14
+signal GND15
+signal GND16
+signal GND17
+signal GND18
+signal GND19
+signal GND20
+signal GND21
+signal GND22
+signal GND23
+signal GND24
+signal GND25
+signal GND26
+signal GND27
+signal GND28
+signal GND29
+signal GND30
+signal GND31
+signal GND32
+signal GND33
+signal GND34
+signal GND35
+signal GND36
+signal GND37
+signal GND38
+signal GND39
+signal GND40
+signal GND41
+signal GND42
+signal GND43
+signal GND44
+signal GND45
+signal GND46
+signal GND47
+signal GND48
+signal GND49
+signal GND50
+signal GND51
+signal GND52
+signal GND53
+signal GND54
+signal GND55
+signal GND56
+signal NC1
+signal NC2
+signal NC3
+signal NC4
+signal NC5
+signal NC6
+signal NC7
+signal NC8
+signal NC9
+signal NC10
+signal CCLK_PAD208
+signal DONE_PAD207
+signal HSWAP_EN_PAD41
+signal M0_PAD125
+signal M1_PAD124
+signal M2_PAD126
+signal PROG_B
+signal TCK
+signal TDI
+signal TDO
+signal TMS
+signal VCCAUX1
+signal VCCAUX2
+signal VCCAUX3
+signal VCCAUX4
+signal VCCAUX5
+signal VCCAUX6
+signal VCCAUX7
+signal VCCAUX8
+signal VCCINT1
+signal VCCINT2
+signal VCCINT3
+signal VCCINT4
+signal VCCINT5
+signal VCCINT6
+signal VCCINT7
+signal VCCINT8
+signal VCCO01
+signal VCCO02
+signal VCCO03
+signal VCCO04
+signal VCCO05
+signal VCCO11
+signal VCCO12
+signal VCCO13
+signal VCCO14
+signal VCCO15
+signal VCCO16
+signal VCCO21
+signal VCCO22
+signal VCCO23
+signal VCCO24
+signal VCCO25
+signal VCCO31
+signal VCCO32
+signal VCCO33
+signal VCCO34
+signal VCCO35
+signal VCCO41
+signal VCCO42
+signal VCCO43
+signal VCCO44
+signal VCCO45
+signal VCCO51
+signal VCCO52
+signal VCCO53
+signal VCCO54
+signal VCCO55
+signal VCCO56
+signal VCCO61
+signal VCCO62
+signal VCCO63
+signal VCCO64
+signal VCCO65
+signal VCCO71
+signal VCCO72
+signal VCCO73
+signal VCCO74
+signal VCCO75
+signal IO_PAD2
+signal IO_PAD3
+signal IO_PAD4
+signal IO_PAD6
+signal IO_PAD8
+signal IO_PAD9
+signal IO_PAD10
+signal IO_PAD12
+signal IO_PAD13
+signal IO_PAD14
+signal IO_PAD16
+signal IO_PAD18
+signal IO_PAD20
+signal IO_PAD22
+signal IO_PAD24
+signal IO_PAD25
+signal IO_PAD28
+signal IO_PAD30
+signal IO_PAD31
+signal IO_PAD32
+signal IO_PAD33
+signal IO_PAD34
+signal IO_PAD38
+signal IO_PAD39
+signal IO_PAD40
+signal IO_PAD47
+signal IO_PAD48
+signal IO_PAD50
+signal IO_PAD52
+signal IO_PAD53
+signal IO_PAD54
+signal IO_PAD56
+signal IO_PAD58
+signal IO_PAD59
+signal IO_PAD60
+signal IO_PAD61
+signal IO_PAD62
+signal IO_PAD64
+signal IO_PAD66
+signal IO_PAD68
+signal IO_PAD70
+signal IO_PAD71
+signal IO_PAD72
+signal IO_PAD74
+signal IO_PAD75
+signal IO_PAD76
+signal IO_PAD78
+signal IO_PAD80
+signal IO_PAD82
+signal IO_PAD85
+signal IO_PAD87
+signal IO_PAD89
+signal IO_PAD91
+signal IO_PAD92
+signal IO_PAD93
+signal IO_PAD95
+signal IO_PAD96
+signal IO_PAD97
+signal IO_PAD99
+signal IO_PAD101
+signal IO_PAD103
+signal IO_PAD105
+signal IO_PAD106
+signal IO_PAD107
+signal IO_PAD108
+signal IO_PAD109
+signal IO_PAD111
+signal IO_PAD113
+signal IO_PAD114
+signal IO_PAD115
+signal IO_PAD117
+signal IO_PAD119
+signal IO_PAD120
+signal IO_PAD127
+signal IO_PAD128
+signal IO_PAD131
+signal IO_PAD133
+signal IO_PAD134
+signal IO_PAD135
+signal IO_PAD136
+signal IO_PAD137
+signal IO_PAD139
+signal IO_PAD142
+signal IO_PAD143
+signal IO_PAD145
+signal IO_PAD147
+signal IO_PAD149
+signal IO_PAD151
+signal IO_PAD153
+signal IO_PAD154
+signal IO_PAD155
+signal IO_PAD157
+signal IO_PAD158
+signal IO_PAD159
+signal IO_PAD161
+signal IO_PAD163
+signal IO_PAD164
+signal IO_PAD165
+signal IO_PAD169
+signal IO_PAD170
+signal IO_PAD171
+signal IO_PAD173
+signal IO_PAD175
+signal IO_PAD176
+signal IO_PAD177
+signal IO_PAD179
+signal IO_PAD180
+signal IO_PAD181
+signal IO_PAD183
+signal IO_PAD185
+signal IO_PAD187
+signal IO_PAD189
+signal IO_PAD191
+signal IO_PAD192
+signal IO_PAD195
+signal IO_PAD197
+signal IO_PAD198
+signal IO_PAD199
+signal IO_PAD200
+signal IO_PAD201
+signal IO_PAD204
+signal IO_PAD205
+signal IO_PAD206
+signal IO_PAD212
+signal IO_PAD213
+signal IO_PAD215
+signal IO_PAD217
+signal IO_PAD218
+signal IO_PAD219
+signal IO_PAD221
+signal IO_PAD223
+signal IO_PAD224
+signal IO_PAD225
+signal IO_PAD226
+signal IO_PAD227
+signal IO_PAD229
+signal IO_PAD231
+signal IO_PAD233
+signal IO_PAD235
+signal IO_PAD236
+signal IO_PAD237
+signal IO_PAD239
+signal IO_PAD240
+signal IO_PAD241
+signal IO_PAD243
+signal IO_PAD245
+signal IO_PAD247
+signal IO_PAD250
+signal IO_PAD252
+signal IO_PAD254
+signal IO_PAD256
+signal IO_PAD257
+signal IO_PAD258
+signal IO_PAD260
+signal IO_PAD261
+signal IO_PAD262
+signal IO_PAD264
+signal IO_PAD266
+signal IO_PAD268
+signal IO_PAD270
+signal IO_PAD271
+signal IO_PAD272
+signal IO_PAD273
+signal IO_PAD274
+signal IO_PAD276
+signal IO_PAD278
+signal IO_PAD279
+signal IO_PAD280
+signal IO_PAD282
+signal IO_PAD284
+signal IO_PAD285
+signal IO_PAD292
+signal IO_PAD293
+signal IO_PAD296
+signal IO_PAD298
+signal IO_PAD299
+signal IO_PAD300
+signal IO_PAD301
+signal IO_PAD302
+signal IO_PAD304
+signal IO_PAD307
+signal IO_PAD308
+signal IO_PAD310
+signal IO_PAD312
+signal IO_PAD314
+signal IO_PAD316
+signal IO_PAD318
+signal IO_PAD319
+signal IO_PAD320
+signal IO_PAD322
+signal IO_PAD323
+signal IO_PAD324
+signal IO_PAD326
+signal IO_PAD328
+signal IO_PAD329
+
+register BSR 599
+register BR 1
+register DIR 32
+
+instruction length 6
+
+instruction EXTEST 000000 BSR
+instruction SAMPLE/PRELOAD 000001 BSR
+instruction IDCODE 001001 DIR
+instruction BYPASS 111111 BR
+
+bit 598 I 1 IO_PAD285
+bit 597 O 1 IO_PAD285 596 1 Z
+bit 596 C 1 *
+bit 595 I 1 IO_PAD284
+bit 594 O 1 IO_PAD284 593 1 Z
+bit 593 C 1 *
+bit 592 I 1 IO_PAD282
+bit 591 O 1 IO_PAD282 590 1 Z
+bit 590 C 1 *
+bit 589 I 1 IO_PAD280
+bit 588 O 1 IO_PAD280 587 1 Z
+bit 587 C 1 *
+bit 586 I 1 IO_PAD279
+bit 585 O 1 IO_PAD279 584 1 Z
+bit 584 C 1 *
+bit 583 I 1 IO_PAD278
+bit 582 O 1 IO_PAD278 581 1 Z
+bit 581 C 1 *
+bit 580 I 1 IO_PAD276
+bit 579 O 1 IO_PAD276 578 1 Z
+bit 578 C 1 *
+bit 577 I 1 IO_PAD274
+bit 576 O 1 IO_PAD274 575 1 Z
+bit 575 C 1 *
+bit 574 I 1 IO_PAD273
+bit 573 O 1 IO_PAD273 572 1 Z
+bit 572 C 1 *
+bit 571 I 1 IO_PAD272
+bit 570 O 1 IO_PAD272 569 1 Z
+bit 569 C 1 *
+bit 568 I 1 IO_PAD271
+bit 567 O 1 IO_PAD271 566 1 Z
+bit 566 C 1 *
+bit 565 I 1 IO_PAD270
+bit 564 O 1 IO_PAD270 563 1 Z
+bit 563 C 1 *
+bit 562 I 1 IO_PAD268
+bit 561 O 1 IO_PAD268 560 1 Z
+bit 560 C 1 *
+bit 559 I 1 IO_PAD266
+bit 558 O 1 IO_PAD266 557 1 Z
+bit 557 C 1 *
+bit 556 I 1 IO_PAD264
+bit 555 O 1 IO_PAD264 554 1 Z
+bit 554 C 1 *
+bit 553 I 1 IO_PAD262
+bit 552 O 1 IO_PAD262 551 1 Z
+bit 551 C 1 *
+bit 550 I 1 IO_PAD261
+bit 549 O 1 IO_PAD261 548 1 Z
+bit 548 C 1 *
+bit 547 I 1 IO_PAD260
+bit 546 O 1 IO_PAD260 545 1 Z
+bit 545 C 1 *
+bit 544 I 1 IO_PAD258
+bit 543 O 1 IO_PAD258 542 1 Z
+bit 542 C 1 *
+bit 541 I 1 IO_PAD257
+bit 540 O 1 IO_PAD257 539 1 Z
+bit 539 C 1 *
+bit 538 I 1 IO_PAD256
+bit 537 O 1 IO_PAD256 536 1 Z
+bit 536 C 1 *
+bit 535 I 1 IO_PAD254
+bit 534 O 1 IO_PAD254 533 1 Z
+bit 533 C 1 *
+bit 532 I 1 IO_PAD252
+bit 531 O 1 IO_PAD252 530 1 Z
+bit 530 C 1 *
+bit 529 I 1 IO_PAD250
+bit 528 O 1 IO_PAD250 527 1 Z
+bit 527 C 1 *
+bit 526 I 1 IO_PAD247
+bit 525 O 1 IO_PAD247 524 1 Z
+bit 524 C 1 *
+bit 523 I 1 IO_PAD245
+bit 522 O 1 IO_PAD245 521 1 Z
+bit 521 C 1 *
+bit 520 I 1 IO_PAD243
+bit 519 O 1 IO_PAD243 518 1 Z
+bit 518 C 1 *
+bit 517 I 1 IO_PAD241
+bit 516 O 1 IO_PAD241 515 1 Z
+bit 515 C 1 *
+bit 514 I 1 IO_PAD240
+bit 513 O 1 IO_PAD240 512 1 Z
+bit 512 C 1 *
+bit 511 I 1 IO_PAD239
+bit 510 O 1 IO_PAD239 509 1 Z
+bit 509 C 1 *
+bit 508 I 1 IO_PAD237
+bit 507 O 1 IO_PAD237 506 1 Z
+bit 506 C 1 *
+bit 505 I 1 IO_PAD236
+bit 504 O 1 IO_PAD236 503 1 Z
+bit 503 C 1 *
+bit 502 I 1 IO_PAD235
+bit 501 O 1 IO_PAD235 500 1 Z
+bit 500 C 1 *
+bit 499 I 1 IO_PAD233
+bit 498 O 1 IO_PAD233 497 1 Z
+bit 497 C 1 *
+bit 496 I 1 IO_PAD231
+bit 495 O 1 IO_PAD231 494 1 Z
+bit 494 C 1 *
+bit 493 I 1 IO_PAD229
+bit 492 O 1 IO_PAD229 491 1 Z
+bit 491 C 1 *
+bit 490 I 1 IO_PAD227
+bit 489 O 1 IO_PAD227 488 1 Z
+bit 488 C 1 *
+bit 487 I 1 IO_PAD226
+bit 486 O 1 IO_PAD226 485 1 Z
+bit 485 C 1 *
+bit 484 I 1 IO_PAD225
+bit 483 O 1 IO_PAD225 482 1 Z
+bit 482 C 1 *
+bit 481 I 1 IO_PAD224
+bit 480 O 1 IO_PAD224 479 1 Z
+bit 479 C 1 *
+bit 478 I 1 IO_PAD223
+bit 477 O 1 IO_PAD223 476 1 Z
+bit 476 C 1 *
+bit 475 I 1 IO_PAD221
+bit 474 O 1 IO_PAD221 473 1 Z
+bit 473 C 1 *
+bit 472 I 1 IO_PAD219
+bit 471 O 1 IO_PAD219 470 1 Z
+bit 470 C 1 *
+bit 469 I 1 IO_PAD218
+bit 468 O 1 IO_PAD218 467 1 Z
+bit 467 C 1 *
+bit 466 I 1 IO_PAD217
+bit 465 O 1 IO_PAD217 464 1 Z
+bit 464 C 1 *
+bit 463 I 1 IO_PAD215
+bit 462 O 1 IO_PAD215 461 1 Z
+bit 461 C 1 *
+bit 460 I 1 IO_PAD213
+bit 459 O 1 IO_PAD213 458 1 Z
+bit 458 C 1 *
+bit 457 I 1 IO_PAD212
+bit 456 O 1 IO_PAD212 455 1 Z
+bit 455 C 1 *
+bit 454 I 1 CCLK_PAD208
+bit 453 O 1 CCLK_PAD208 452 1 Z
+bit 452 C 1 *
+bit 451 I 1 DONE_PAD207
+bit 450 O 1 DONE_PAD207 449 1 Z
+bit 449 C 1 *
+bit 448 I 1 IO_PAD206
+bit 447 O 1 IO_PAD206 446 1 Z
+bit 446 C 1 *
+bit 445 I 1 IO_PAD205
+bit 444 O 1 IO_PAD205 443 1 Z
+bit 443 C 1 *
+bit 442 I 1 IO_PAD204
+bit 441 O 1 IO_PAD204 440 1 Z
+bit 440 C 1 *
+bit 439 I 1 IO_PAD201
+bit 438 O 1 IO_PAD201 437 1 Z
+bit 437 C 1 *
+bit 436 I 1 IO_PAD200
+bit 435 O 1 IO_PAD200 434 1 Z
+bit 434 C 1 *
+bit 433 I 1 IO_PAD199
+bit 432 O 1 IO_PAD199 431 1 Z
+bit 431 C 1 *
+bit 430 I 1 IO_PAD198
+bit 429 O 1 IO_PAD198 428 1 Z
+bit 428 C 1 *
+bit 427 I 1 IO_PAD197
+bit 426 O 1 IO_PAD197 425 1 Z
+bit 425 C 1 *
+bit 424 I 1 IO_PAD195
+bit 423 O 1 IO_PAD195 422 1 Z
+bit 422 C 1 *
+bit 421 I 1 IO_PAD192
+bit 420 O 1 IO_PAD192 419 1 Z
+bit 419 C 1 *
+bit 418 I 1 IO_PAD191
+bit 417 O 1 IO_PAD191 416 1 Z
+bit 416 C 1 *
+bit 415 I 1 IO_PAD189
+bit 414 O 1 IO_PAD189 413 1 Z
+bit 413 C 1 *
+bit 412 I 1 IO_PAD187
+bit 411 O 1 IO_PAD187 410 1 Z
+bit 410 C 1 *
+bit 409 I 1 IO_PAD185
+bit 408 O 1 IO_PAD185 407 1 Z
+bit 407 C 1 *
+bit 406 I 1 IO_PAD183
+bit 405 O 1 IO_PAD183 404 1 Z
+bit 404 C 1 *
+bit 403 I 1 IO_PAD181
+bit 402 O 1 IO_PAD181 401 1 Z
+bit 401 C 1 *
+bit 400 I 1 IO_PAD180
+bit 399 O 1 IO_PAD180 398 1 Z
+bit 398 C 1 *
+bit 397 I 1 IO_PAD179
+bit 396 O 1 IO_PAD179 395 1 Z
+bit 395 C 1 *
+bit 394 I 1 IO_PAD177
+bit 393 O 1 IO_PAD177 392 1 Z
+bit 392 C 1 *
+bit 391 I 1 IO_PAD176
+bit 390 O 1 IO_PAD176 389 1 Z
+bit 389 C 1 *
+bit 388 I 1 IO_PAD175
+bit 387 O 1 IO_PAD175 386 1 Z
+bit 386 C 1 *
+bit 385 I 1 IO_PAD173
+bit 384 O 1 IO_PAD173 383 1 Z
+bit 383 C 1 *
+bit 382 I 1 IO_PAD171
+bit 381 O 1 IO_PAD171 380 1 Z
+bit 380 C 1 *
+bit 379 I 1 IO_PAD170
+bit 378 O 1 IO_PAD170 377 1 Z
+bit 377 C 1 *
+bit 376 I 1 IO_PAD169
+bit 375 O 1 IO_PAD169 374 1 Z
+bit 374 C 1 *
+bit 373 I 1 IO_PAD165
+bit 372 O 1 IO_PAD165 371 1 Z
+bit 371 C 1 *
+bit 370 I 1 IO_PAD164
+bit 369 O 1 IO_PAD164 368 1 Z
+bit 368 C 1 *
+bit 367 I 1 IO_PAD163
+bit 366 O 1 IO_PAD163 365 1 Z
+bit 365 C 1 *
+bit 364 I 1 IO_PAD161
+bit 363 O 1 IO_PAD161 362 1 Z
+bit 362 C 1 *
+bit 361 I 1 IO_PAD159
+bit 360 O 1 IO_PAD159 359 1 Z
+bit 359 C 1 *
+bit 358 I 1 IO_PAD158
+bit 357 O 1 IO_PAD158 356 1 Z
+bit 356 C 1 *
+bit 355 I 1 IO_PAD157
+bit 354 O 1 IO_PAD157 353 1 Z
+bit 353 C 1 *
+bit 352 I 1 IO_PAD155
+bit 351 O 1 IO_PAD155 350 1 Z
+bit 350 C 1 *
+bit 349 I 1 IO_PAD154
+bit 348 O 1 IO_PAD154 347 1 Z
+bit 347 C 1 *
+bit 346 I 1 IO_PAD153
+bit 345 O 1 IO_PAD153 344 1 Z
+bit 344 C 1 *
+bit 343 I 1 IO_PAD151
+bit 342 O 1 IO_PAD151 341 1 Z
+bit 341 C 1 *
+bit 340 I 1 IO_PAD149
+bit 339 O 1 IO_PAD149 338 1 Z
+bit 338 C 1 *
+bit 337 I 1 IO_PAD147
+bit 336 O 1 IO_PAD147 335 1 Z
+bit 335 C 1 *
+bit 334 I 1 IO_PAD145
+bit 333 O 1 IO_PAD145 332 1 Z
+bit 332 C 1 *
+bit 331 I 1 IO_PAD143
+bit 330 O 1 IO_PAD143 329 1 Z
+bit 329 C 1 *
+bit 328 I 1 IO_PAD142
+bit 327 O 1 IO_PAD142 326 1 Z
+bit 326 C 1 *
+bit 325 I 1 IO_PAD139
+bit 324 O 1 IO_PAD139 323 1 Z
+bit 323 C 1 *
+bit 322 I 1 IO_PAD137
+bit 321 O 1 IO_PAD137 320 1 Z
+bit 320 C 1 *
+bit 319 I 1 IO_PAD136
+bit 318 O 1 IO_PAD136 317 1 Z
+bit 317 C 1 *
+bit 316 I 1 IO_PAD135
+bit 315 O 1 IO_PAD135 314 1 Z
+bit 314 C 1 *
+bit 313 I 1 IO_PAD134
+bit 312 O 1 IO_PAD134 311 1 Z
+bit 311 C 1 *
+bit 310 I 1 IO_PAD133
+bit 309 O 1 IO_PAD133 308 1 Z
+bit 308 C 1 *
+bit 307 I 1 IO_PAD131
+bit 306 O 1 IO_PAD131 305 1 Z
+bit 305 C 1 *
+bit 304 I 1 IO_PAD128
+bit 303 O 1 IO_PAD128 302 1 Z
+bit 302 C 1 *
+bit 301 I 1 IO_PAD127
+bit 300 O 1 IO_PAD127 299 1 Z
+bit 299 C 1 *
+bit 298 I 1 M2_PAD126
+bit 297 I 1 M0_PAD125
+bit 296 I 1 M1_PAD124
+bit 295 I 1 IO_PAD120
+bit 294 O 1 IO_PAD120 293 1 Z
+bit 293 C 1 *
+bit 292 I 1 IO_PAD119
+bit 291 O 1 IO_PAD119 290 1 Z
+bit 290 C 1 *
+bit 289 I 1 IO_PAD117
+bit 288 O 1 IO_PAD117 287 1 Z
+bit 287 C 1 *
+bit 286 I 1 IO_PAD115
+bit 285 O 1 IO_PAD115 284 1 Z
+bit 284 C 1 *
+bit 283 I 1 IO_PAD114
+bit 282 O 1 IO_PAD114 281 1 Z
+bit 281 C 1 *
+bit 280 I 1 IO_PAD113
+bit 279 O 1 IO_PAD113 278 1 Z
+bit 278 C 1 *
+bit 277 I 1 IO_PAD111
+bit 276 O 1 IO_PAD111 275 1 Z
+bit 275 C 1 *
+bit 274 I 1 IO_PAD109
+bit 273 O 1 IO_PAD109 272 1 Z
+bit 272 C 1 *
+bit 271 I 1 IO_PAD108
+bit 270 O 1 IO_PAD108 269 1 Z
+bit 269 C 1 *
+bit 268 I 1 IO_PAD107
+bit 267 O 1 IO_PAD107 266 1 Z
+bit 266 C 1 *
+bit 265 I 1 IO_PAD106
+bit 264 O 1 IO_PAD106 263 1 Z
+bit 263 C 1 *
+bit 262 I 1 IO_PAD105
+bit 261 O 1 IO_PAD105 260 1 Z
+bit 260 C 1 *
+bit 259 I 1 IO_PAD103
+bit 258 O 1 IO_PAD103 257 1 Z
+bit 257 C 1 *
+bit 256 I 1 IO_PAD101
+bit 255 O 1 IO_PAD101 254 1 Z
+bit 254 C 1 *
+bit 253 I 1 IO_PAD99
+bit 252 O 1 IO_PAD99 251 1 Z
+bit 251 C 1 *
+bit 250 I 1 IO_PAD97
+bit 249 O 1 IO_PAD97 248 1 Z
+bit 248 C 1 *
+bit 247 I 1 IO_PAD96
+bit 246 O 1 IO_PAD96 245 1 Z
+bit 245 C 1 *
+bit 244 I 1 IO_PAD95
+bit 243 O 1 IO_PAD95 242 1 Z
+bit 242 C 1 *
+bit 241 I 1 IO_PAD93
+bit 240 O 1 IO_PAD93 239 1 Z
+bit 239 C 1 *
+bit 238 I 1 IO_PAD92
+bit 237 O 1 IO_PAD92 236 1 Z
+bit 236 C 1 *
+bit 235 I 1 IO_PAD91
+bit 234 O 1 IO_PAD91 233 1 Z
+bit 233 C 1 *
+bit 232 I 1 IO_PAD89
+bit 231 O 1 IO_PAD89 230 1 Z
+bit 230 C 1 *
+bit 229 I 1 IO_PAD87
+bit 228 O 1 IO_PAD87 227 1 Z
+bit 227 C 1 *
+bit 226 I 1 IO_PAD85
+bit 225 O 1 IO_PAD85 224 1 Z
+bit 224 C 1 *
+bit 223 I 1 IO_PAD82
+bit 222 O 1 IO_PAD82 221 1 Z
+bit 221 C 1 *
+bit 220 I 1 IO_PAD80
+bit 219 O 1 IO_PAD80 218 1 Z
+bit 218 C 1 *
+bit 217 I 1 IO_PAD78
+bit 216 O 1 IO_PAD78 215 1 Z
+bit 215 C 1 *
+bit 214 I 1 IO_PAD76
+bit 213 O 1 IO_PAD76 212 1 Z
+bit 212 C 1 *
+bit 211 I 1 IO_PAD75
+bit 210 O 1 IO_PAD75 209 1 Z
+bit 209 C 1 *
+bit 208 I 1 IO_PAD74
+bit 207 O 1 IO_PAD74 206 1 Z
+bit 206 C 1 *
+bit 205 I 1 IO_PAD72
+bit 204 O 1 IO_PAD72 203 1 Z
+bit 203 C 1 *
+bit 202 I 1 IO_PAD71
+bit 201 O 1 IO_PAD71 200 1 Z
+bit 200 C 1 *
+bit 199 I 1 IO_PAD70
+bit 198 O 1 IO_PAD70 197 1 Z
+bit 197 C 1 *
+bit 196 I 1 IO_PAD68
+bit 195 O 1 IO_PAD68 194 1 Z
+bit 194 C 1 *
+bit 193 I 1 IO_PAD66
+bit 192 O 1 IO_PAD66 191 1 Z
+bit 191 C 1 *
+bit 190 I 1 IO_PAD64
+bit 189 O 1 IO_PAD64 188 1 Z
+bit 188 C 1 *
+bit 187 I 1 IO_PAD62
+bit 186 O 1 IO_PAD62 185 1 Z
+bit 185 C 1 *
+bit 184 I 1 IO_PAD61
+bit 183 O 1 IO_PAD61 182 1 Z
+bit 182 C 1 *
+bit 181 I 1 IO_PAD60
+bit 180 O 1 IO_PAD60 179 1 Z
+bit 179 C 1 *
+bit 178 I 1 IO_PAD59
+bit 177 O 1 IO_PAD59 176 1 Z
+bit 176 C 1 *
+bit 175 I 1 IO_PAD58
+bit 174 O 1 IO_PAD58 173 1 Z
+bit 173 C 1 *
+bit 172 I 1 IO_PAD56
+bit 171 O 1 IO_PAD56 170 1 Z
+bit 170 C 1 *
+bit 169 I 1 IO_PAD54
+bit 168 O 1 IO_PAD54 167 1 Z
+bit 167 C 1 *
+bit 166 I 1 IO_PAD53
+bit 165 O 1 IO_PAD53 164 1 Z
+bit 164 C 1 *
+bit 163 I 1 IO_PAD52
+bit 162 O 1 IO_PAD52 161 1 Z
+bit 161 C 1 *
+bit 160 I 1 IO_PAD50
+bit 159 O 1 IO_PAD50 158 1 Z
+bit 158 C 1 *
+bit 157 I 1 IO_PAD48
+bit 156 O 1 IO_PAD48 155 1 Z
+bit 155 C 1 *
+bit 154 I 1 IO_PAD47
+bit 153 O 1 IO_PAD47 152 1 Z
+bit 152 C 1 *
+bit 151 O 1 *
+bit 150 I 1 HSWAP_EN_PAD41
+bit 149 I 1 IO_PAD40
+bit 148 O 1 IO_PAD40 147 1 Z
+bit 147 C 1 *
+bit 146 I 1 IO_PAD39
+bit 145 O 1 IO_PAD39 144 1 Z
+bit 144 C 1 *
+bit 143 I 1 IO_PAD38
+bit 142 O 1 IO_PAD38 141 1 Z
+bit 141 C 1 *
+bit 140 I 1 IO_PAD34
+bit 139 O 1 IO_PAD34 138 1 Z
+bit 138 C 1 *
+bit 137 I 1 IO_PAD33
+bit 136 O 1 IO_PAD33 135 1 Z
+bit 135 C 1 *
+bit 134 I 1 IO_PAD32
+bit 133 O 1 IO_PAD32 132 1 Z
+bit 132 C 1 *
+bit 131 I 1 IO_PAD31
+bit 130 O 1 IO_PAD31 129 1 Z
+bit 129 C 1 *
+bit 128 I 1 IO_PAD30
+bit 127 O 1 IO_PAD30 126 1 Z
+bit 126 C 1 *
+bit 125 I 1 IO_PAD28
+bit 124 O 1 IO_PAD28 123 1 Z
+bit 123 C 1 *
+bit 122 I 1 IO_PAD25
+bit 121 O 1 IO_PAD25 120 1 Z
+bit 120 C 1 *
+bit 119 I 1 IO_PAD24
+bit 118 O 1 IO_PAD24 117 1 Z
+bit 117 C 1 *
+bit 116 I 1 IO_PAD22
+bit 115 O 1 IO_PAD22 114 1 Z
+bit 114 C 1 *
+bit 113 I 1 IO_PAD20
+bit 112 O 1 IO_PAD20 111 1 Z
+bit 111 C 1 *
+bit 110 I 1 IO_PAD18
+bit 109 O 1 IO_PAD18 108 1 Z
+bit 108 C 1 *
+bit 107 I 1 IO_PAD16
+bit 106 O 1 IO_PAD16 105 1 Z
+bit 105 C 1 *
+bit 104 I 1 IO_PAD14
+bit 103 O 1 IO_PAD14 102 1 Z
+bit 102 C 1 *
+bit 101 I 1 IO_PAD13
+bit 100 O 1 IO_PAD13 99 1 Z
+bit 99 C 1 *
+bit 98 I 1 IO_PAD12
+bit 97 O 1 IO_PAD12 96 1 Z
+bit 96 C 1 *
+bit 95 I 1 IO_PAD10
+bit 94 O 1 IO_PAD10 93 1 Z
+bit 93 C 1 *
+bit 92 I 1 IO_PAD9
+bit 91 O 1 IO_PAD9 90 1 Z
+bit 90 C 1 *
+bit 89 I 1 IO_PAD8
+bit 88 O 1 IO_PAD8 87 1 Z
+bit 87 C 1 *
+bit 86 I 1 IO_PAD6
+bit 85 O 1 IO_PAD6 84 1 Z
+bit 84 C 1 *
+bit 83 I 1 IO_PAD4
+bit 82 O 1 IO_PAD4 81 1 Z
+bit 81 C 1 *
+bit 80 I 1 IO_PAD3
+bit 79 O 1 IO_PAD3 78 1 Z
+bit 78 C 1 *
+bit 77 I 1 IO_PAD2
+bit 76 O 1 IO_PAD2 75 1 Z
+bit 75 C 1 *
+bit 74 I 1 IO_PAD330
+bit 73 O 1 IO_PAD330 72 1 Z
+bit 72 C 1 *
+bit 71 I 1 IO_PAD329
+bit 70 O 1 IO_PAD329 69 1 Z
+bit 69 C 1 *
+bit 68 I 1 IO_PAD328
+bit 67 O 1 IO_PAD328 66 1 Z
+bit 66 C 1 *
+bit 65 I 1 IO_PAD326
+bit 64 O 1 IO_PAD326 63 1 Z
+bit 63 C 1 *
+bit 62 I 1 IO_PAD324
+bit 61 O 1 IO_PAD324 60 1 Z
+bit 60 C 1 *
+bit 59 I 1 IO_PAD323
+bit 58 O 1 IO_PAD323 57 1 Z
+bit 57 C 1 *
+bit 56 I 1 IO_PAD322
+bit 55 O 1 IO_PAD322 54 1 Z
+bit 54 C 1 *
+bit 53 I 1 IO_PAD320
+bit 52 O 1 IO_PAD320 51 1 Z
+bit 51 C 1 *
+bit 50 I 1 IO_PAD319
+bit 49 O 1 IO_PAD319 48 1 Z
+bit 48 C 1 *
+bit 47 I 1 IO_PAD318
+bit 46 O 1 IO_PAD318 45 1 Z
+bit 45 C 1 *
+bit 44 I 1 IO_PAD316
+bit 43 O 1 IO_PAD316 42 1 Z
+bit 42 C 1 *
+bit 41 I 1 IO_PAD314
+bit 40 O 1 IO_PAD314 39 1 Z
+bit 39 C 1 *
+bit 38 I 1 IO_PAD312
+bit 37 O 1 IO_PAD312 36 1 Z
+bit 36 C 1 *
+bit 35 I 1 IO_PAD310
+bit 34 O 1 IO_PAD310 33 1 Z
+bit 33 C 1 *
+bit 32 I 1 IO_PAD308
+bit 31 O 1 IO_PAD308 30 1 Z
+bit 30 C 1 *
+bit 29 I 1 IO_PAD307
+bit 28 O 1 IO_PAD307 27 1 Z
+bit 27 C 1 *
+bit 26 I 1 IO_PAD304
+bit 25 O 1 IO_PAD304 24 1 Z
+bit 24 C 1 *
+bit 23 I 1 IO_PAD302
+bit 22 O 1 IO_PAD302 21 1 Z
+bit 21 C 1 *
+bit 20 I 1 IO_PAD301
+bit 19 O 1 IO_PAD301 18 1 Z
+bit 18 C 1 *
+bit 17 I 1 IO_PAD300
+bit 16 O 1 IO_PAD300 15 1 Z
+bit 15 C 1 *
+bit 14 I 1 IO_PAD299
+bit 13 O 1 IO_PAD299 12 1 Z
+bit 12 C 1 *
+bit 11 I 1 IO_PAD298
+bit 10 O 1 IO_PAD298 9 1 Z
+bit 9 C 1 *
+bit 8 I 1 IO_PAD296
+bit 7 O 1 IO_PAD296 6 1 Z
+bit 6 C 1 *
+bit 5 I 1 IO_PAD293
+bit 4 O 1 IO_PAD293 3 1 Z
+bit 3 C 1 *
+bit 2 I 1 IO_PAD292
+bit 1 O 1 IO_PAD292 0 1 Z
+bit 0 C 1 *
--- /dev/null
+signal GND1
+signal GND2
+signal GND3
+signal GND4
+signal GND5
+signal GND6
+signal GND7
+signal GND8
+signal GND9
+signal GND10
+signal GND11
+signal GND12
+signal GND13
+signal GND14
+signal GND15
+signal GND16
+signal GND17
+signal GND18
+signal GND19
+signal GND20
+signal GND21
+signal GND22
+signal GND23
+signal GND24
+signal GND25
+signal GND26
+signal GND27
+signal GND28
+signal GND29
+signal GND30
+signal GND31
+signal GND32
+signal CCLK_T15
+signal DONE_R14
+signal HSWAP_EN_C4
+signal M0_P3
+signal M1_T2
+signal M2_P4
+signal PROG_B
+signal TCK
+signal TDI
+signal TDO
+signal TMS
+signal VCCAUX1
+signal VCCAUX2
+signal VCCAUX3
+signal VCCAUX4
+signal VCCAUX5
+signal VCCAUX6
+signal VCCAUX7
+signal VCCAUX8
+signal VCCINT1
+signal VCCINT2
+signal VCCINT3
+signal VCCINT4
+signal VCCINT5
+signal VCCINT6
+signal VCCINT7
+signal VCCINT8
+signal VCCO01
+signal VCCO02
+signal VCCO03
+signal VCCO11
+signal VCCO12
+signal VCCO13
+signal VCCO21
+signal VCCO22
+signal VCCO23
+signal VCCO31
+signal VCCO32
+signal VCCO33
+signal VCCO41
+signal VCCO42
+signal VCCO43
+signal VCCO51
+signal VCCO52
+signal VCCO53
+signal VCCO61
+signal VCCO62
+signal VCCO63
+signal VCCO71
+signal VCCO72
+signal VCCO73
+signal IO_A3
+signal IO_A4
+signal IO_A5
+signal IO_A7
+signal IO_A8
+signal IO_A9
+signal IO_A10
+signal IO_A12
+signal IO_A13
+signal IO_A14
+signal IO_B1
+signal IO_B4
+signal IO_B5
+signal IO_B6
+signal IO_B7
+signal IO_B8
+signal IO_B10
+signal IO_B11
+signal IO_B12
+signal IO_B13
+signal IO_B14
+signal IO_B16
+signal IO_C1
+signal IO_C2
+signal IO_C3
+signal IO_C5
+signal IO_C6
+signal IO_C7
+signal IO_C8
+signal IO_C9
+signal IO_C10
+signal IO_C11
+signal IO_C12
+signal IO_C15
+signal IO_C16
+signal IO_D1
+signal IO_D2
+signal IO_D3
+signal IO_D5
+signal IO_D6
+signal IO_D7
+signal IO_D8
+signal IO_D9
+signal IO_D10
+signal IO_D11
+signal IO_D12
+signal IO_D14
+signal IO_D15
+signal IO_D16
+signal IO_E1
+signal IO_E2
+signal IO_E3
+signal IO_E4
+signal IO_E6
+signal IO_E7
+signal IO_E10
+signal IO_E11
+signal IO_E13
+signal IO_E14
+signal IO_E15
+signal IO_E16
+signal IO_F2
+signal IO_F3
+signal IO_F4
+signal IO_F5
+signal IO_F12
+signal IO_F13
+signal IO_F14
+signal IO_F15
+signal IO_G1
+signal IO_G2
+signal IO_G3
+signal IO_G4
+signal IO_G5
+signal IO_G12
+signal IO_G13
+signal IO_G14
+signal IO_G15
+signal IO_G16
+signal IO_H1
+signal IO_H3
+signal IO_H4
+signal IO_H13
+signal IO_H14
+signal IO_H15
+signal IO_H16
+signal IO_J1
+signal IO_J2
+signal IO_J3
+signal IO_J4
+signal IO_J13
+signal IO_J14
+signal IO_J16
+signal IO_K1
+signal IO_K2
+signal IO_K3
+signal IO_K4
+signal IO_K5
+signal IO_K12
+signal IO_K13
+signal IO_K14
+signal IO_K15
+signal IO_K16
+signal IO_L2
+signal IO_L3
+signal IO_L4
+signal IO_L5
+signal IO_L12
+signal IO_L13
+signal IO_L14
+signal IO_L15
+signal IO_M1
+signal IO_M2
+signal IO_M3
+signal IO_M4
+signal IO_M6
+signal IO_M7
+signal IO_M10
+signal IO_M11
+signal IO_M13
+signal IO_M14
+signal IO_M15
+signal IO_M16
+signal IO_N1
+signal IO_N2
+signal IO_N3
+signal IO_N5
+signal IO_N6
+signal IO_N7
+signal IO_N8
+signal IO_N9
+signal IO_N10
+signal IO_N11
+signal IO_N12
+signal IO_N14
+signal IO_N15
+signal IO_N16
+signal IO_P1
+signal IO_P2
+signal IO_P5
+signal IO_P6
+signal IO_P7
+signal IO_P8
+signal IO_P9
+signal IO_P10
+signal IO_P11
+signal IO_P12
+signal IO_P13
+signal IO_P14
+signal IO_P15
+signal IO_P16
+signal IO_R1
+signal IO_R3
+signal IO_R4
+signal IO_R5
+signal IO_R6
+signal IO_R7
+signal IO_R9
+signal IO_R10
+signal IO_R11
+signal IO_R12
+signal IO_R13
+signal IO_R16
+signal IO_T3
+signal IO_T4
+signal IO_T5
+signal IO_T7
+signal IO_T8
+signal IO_T9
+signal IO_T10
+signal IO_T12
+signal IO_T13
+
+register BSR 599
+register BR 1
+register DIR 32
+
+instruction length 6
+
+instruction EXTEST 000000 BSR
+instruction SAMPLE/PRELOAD 000001 BSR
+instruction IDCODE 001001 DIR
+instruction BYPASS 111111 BR
+
+bit 598 I 1 IO_B16
+bit 597 O 1 IO_B16 596 1 Z
+bit 596 C 1 *
+bit 595 I 1 IO_C16
+bit 594 O 1 IO_C16 593 1 Z
+bit 593 C 1 *
+bit 592 I 1 IO_C15
+bit 591 O 1 IO_C15 590 1 Z
+bit 590 C 1 *
+bit 589 I 1 IO_D14
+bit 588 O 1 IO_D14 587 1 Z
+bit 587 C 1 *
+bit 586 I 1 IO_D15
+bit 585 O 1 IO_D15 584 1 Z
+bit 584 C 1 *
+bit 583 I 1 IO_D16
+bit 582 O 1 IO_D16 581 1 Z
+bit 581 C 1 *
+bit 580 I 1 IO_E13
+bit 579 O 1 IO_E13 578 1 Z
+bit 578 C 1 *
+bit 577 I 1 IO_E14
+bit 576 O 1 IO_E14 575 1 Z
+bit 575 C 1 *
+bit 574 I 1 IO_E15
+bit 573 O 1 IO_E15 572 1 Z
+bit 572 C 1 *
+bit 571 I 1 IO_E16
+bit 570 O 1 IO_E16 569 1 Z
+bit 569 C 1 *
+bit 568 I 1 IO_F12
+bit 567 O 1 IO_F12 566 1 Z
+bit 566 C 1 *
+bit 565 I 1 IO_F13
+bit 564 O 1 IO_F13 563 1 Z
+bit 563 C 1 *
+bit 562 I 1 IO_F14
+bit 561 O 1 IO_F14 560 1 Z
+bit 560 C 1 *
+bit 559 I 1 IO_F15
+bit 558 O 1 IO_F15 557 1 Z
+bit 557 C 1 *
+bit 556 I 1 IO_G12
+bit 555 O 1 IO_G12 554 1 Z
+bit 554 C 1 *
+bit 553 I 1 IO_G13
+bit 552 O 1 IO_G13 551 1 Z
+bit 551 C 1 *
+bit 550 I 1 IO_G14
+bit 549 O 1 IO_G14 548 1 Z
+bit 548 C 1 *
+bit 547 I 1 IO_G15
+bit 546 O 1 IO_G15 545 1 Z
+bit 545 C 1 *
+bit 544 O 1 *
+bit 543 O 1 *
+bit 542 O 1 *
+bit 541 I 1 IO_G16
+bit 540 O 1 IO_G16 539 1 Z
+bit 539 C 1 *
+bit 538 I 1 IO_H13
+bit 537 O 1 IO_H13 536 1 Z
+bit 536 C 1 *
+bit 535 I 1 IO_H14
+bit 534 O 1 IO_H14 533 1 Z
+bit 533 C 1 *
+bit 532 I 1 IO_H15
+bit 531 O 1 IO_H15 530 1 Z
+bit 530 C 1 *
+bit 529 I 1 IO_H16
+bit 528 O 1 IO_H16 527 1 Z
+bit 527 C 1 *
+bit 526 I 1 IO_J16
+bit 525 O 1 IO_J16 524 1 Z
+bit 524 C 1 *
+bit 523 I 1 IO_K16
+bit 522 O 1 IO_K16 521 1 Z
+bit 521 C 1 *
+bit 520 I 1 IO_J14
+bit 519 O 1 IO_J14 518 1 Z
+bit 518 C 1 *
+bit 517 I 1 IO_J13
+bit 516 O 1 IO_J13 515 1 Z
+bit 515 C 1 *
+bit 514 I 1 IO_K15
+bit 513 O 1 IO_K15 512 1 Z
+bit 512 C 1 *
+bit 511 O 1 *
+bit 510 O 1 *
+bit 509 O 1 *
+bit 508 I 1 IO_K14
+bit 507 O 1 IO_K14 506 1 Z
+bit 506 C 1 *
+bit 505 I 1 IO_K13
+bit 504 O 1 IO_K13 503 1 Z
+bit 503 C 1 *
+bit 502 I 1 IO_K12
+bit 501 O 1 IO_K12 500 1 Z
+bit 500 C 1 *
+bit 499 I 1 IO_L12
+bit 498 O 1 IO_L12 497 1 Z
+bit 497 C 1 *
+bit 496 I 1 IO_L15
+bit 495 O 1 IO_L15 494 1 Z
+bit 494 C 1 *
+bit 493 I 1 IO_L14
+bit 492 O 1 IO_L14 491 1 Z
+bit 491 C 1 *
+bit 490 I 1 IO_L13
+bit 489 O 1 IO_L13 488 1 Z
+bit 488 C 1 *
+bit 487 I 1 IO_M13
+bit 486 O 1 IO_M13 485 1 Z
+bit 485 C 1 *
+bit 484 I 1 IO_M16
+bit 483 O 1 IO_M16 482 1 Z
+bit 482 C 1 *
+bit 481 I 1 IO_M15
+bit 480 O 1 IO_M15 479 1 Z
+bit 479 C 1 *
+bit 478 I 1 IO_M14
+bit 477 O 1 IO_M14 476 1 Z
+bit 476 C 1 *
+bit 475 I 1 IO_N14
+bit 474 O 1 IO_N14 473 1 Z
+bit 473 C 1 *
+bit 472 I 1 IO_N16
+bit 471 O 1 IO_N16 470 1 Z
+bit 470 C 1 *
+bit 469 I 1 IO_N15
+bit 468 O 1 IO_N15 467 1 Z
+bit 467 C 1 *
+bit 466 I 1 IO_P15
+bit 465 O 1 IO_P15 464 1 Z
+bit 464 C 1 *
+bit 463 I 1 IO_P14
+bit 462 O 1 IO_P14 461 1 Z
+bit 461 C 1 *
+bit 460 I 1 IO_P16
+bit 459 O 1 IO_P16 458 1 Z
+bit 458 C 1 *
+bit 457 I 1 IO_R16
+bit 456 O 1 IO_R16 455 1 Z
+bit 455 C 1 *
+bit 454 I 1 CCLK_T15
+bit 453 O 1 CCLK_T15 452 1 Z
+bit 452 C 1 *
+bit 451 I 1 DONE_R14
+bit 450 O 1 DONE_R14 449 1 Z
+bit 449 C 1 *
+bit 448 I 1 IO_P13
+bit 447 O 1 IO_P13 446 1 Z
+bit 446 C 1 *
+bit 445 I 1 IO_R13
+bit 444 O 1 IO_R13 443 1 Z
+bit 443 C 1 *
+bit 442 I 1 IO_T13
+bit 441 O 1 IO_T13 440 1 Z
+bit 440 C 1 *
+bit 439 I 1 IO_T14
+bit 438 O 1 IO_T14 437 1 Z
+bit 437 C 1 *
+bit 436 O 1 *
+bit 435 O 1 *
+bit 434 O 1 *
+bit 433 I 1 IO_N12
+bit 432 O 1 IO_N12 431 1 Z
+bit 431 C 1 *
+bit 430 O 1 *
+bit 429 O 1 *
+bit 428 O 1 *
+bit 427 O 1 *
+bit 426 O 1 *
+bit 425 O 1 *
+bit 424 I 1 IO_P12
+bit 423 O 1 IO_P12 422 1 Z
+bit 422 C 1 *
+bit 421 I 1 IO_R12
+bit 420 O 1 IO_R12 419 1 Z
+bit 419 C 1 *
+bit 418 I 1 IO_T12
+bit 417 O 1 IO_T12 416 1 Z
+bit 416 C 1 *
+bit 415 I 1 IO_M11
+bit 414 O 1 IO_M11 413 1 Z
+bit 413 C 1 *
+bit 412 I 1 IO_N11
+bit 411 O 1 IO_N11 410 1 Z
+bit 410 C 1 *
+bit 409 I 1 IO_P11
+bit 408 O 1 IO_P11 407 1 Z
+bit 407 C 1 *
+bit 406 I 1 IO_R11
+bit 405 O 1 IO_R11 404 1 Z
+bit 404 C 1 *
+bit 403 O 1 *
+bit 402 O 1 *
+bit 401 O 1 *
+bit 400 I 1 IO_M10
+bit 399 O 1 IO_M10 398 1 Z
+bit 398 C 1 *
+bit 397 I 1 IO_N10
+bit 396 O 1 IO_N10 395 1 Z
+bit 395 C 1 *
+bit 394 I 1 IO_P10
+bit 393 O 1 IO_P10 392 1 Z
+bit 392 C 1 *
+bit 391 I 1 IO_R10
+bit 390 O 1 IO_R10 389 1 Z
+bit 389 C 1 *
+bit 388 I 1 IO_T10
+bit 387 O 1 IO_T10 386 1 Z
+bit 386 C 1 *
+bit 385 I 1 IO_N9
+bit 384 O 1 IO_N9 383 1 Z
+bit 383 C 1 *
+bit 382 I 1 IO_P9
+bit 381 O 1 IO_P9 380 1 Z
+bit 380 C 1 *
+bit 379 I 1 IO_R9
+bit 378 O 1 IO_R9 377 1 Z
+bit 377 C 1 *
+bit 376 I 1 IO_T9
+bit 375 O 1 IO_T9 374 1 Z
+bit 374 C 1 *
+bit 373 I 1 IO_T8
+bit 372 O 1 IO_T8 371 1 Z
+bit 371 C 1 *
+bit 370 I 1 IO_P8
+bit 369 O 1 IO_P8 368 1 Z
+bit 368 C 1 *
+bit 367 I 1 IO_N8
+bit 366 O 1 IO_N8 365 1 Z
+bit 365 C 1 *
+bit 364 I 1 IO_T7
+bit 363 O 1 IO_T7 362 1 Z
+bit 362 C 1 *
+bit 361 I 1 IO_R7
+bit 360 O 1 IO_R7 359 1 Z
+bit 359 C 1 *
+bit 358 I 1 IO_P7
+bit 357 O 1 IO_P7 356 1 Z
+bit 356 C 1 *
+bit 355 I 1 IO_N7
+bit 354 O 1 IO_N7 353 1 Z
+bit 353 C 1 *
+bit 352 I 1 IO_M7
+bit 351 O 1 IO_M7 350 1 Z
+bit 350 C 1 *
+bit 349 I 1 IO_R6
+bit 348 O 1 IO_R6 347 1 Z
+bit 347 C 1 *
+bit 346 I 1 IO_P6
+bit 345 O 1 IO_P6 344 1 Z
+bit 344 C 1 *
+bit 343 I 1 IO_N5
+bit 342 O 1 IO_N5 341 1 Z
+bit 341 C 1 *
+bit 340 I 1 IO_N6
+bit 339 O 1 IO_N6 338 1 Z
+bit 338 C 1 *
+bit 337 I 1 IO_M6
+bit 336 O 1 IO_M6 335 1 Z
+bit 335 C 1 *
+bit 334 I 1 IO_R5
+bit 333 O 1 IO_R5 332 1 Z
+bit 332 C 1 *
+bit 331 I 1 IO_P5
+bit 330 O 1 IO_P5 329 1 Z
+bit 329 C 1 *
+bit 328 I 1 IO_T5
+bit 327 O 1 IO_T5 326 1 Z
+bit 326 C 1 *
+bit 325 O 1 *
+bit 324 O 1 *
+bit 323 O 1 *
+bit 322 O 1 *
+bit 321 O 1 *
+bit 320 O 1 *
+bit 319 O 1 *
+bit 318 O 1 *
+bit 317 O 1 *
+bit 316 O 1 *
+bit 315 O 1 *
+bit 314 O 1 *
+bit 313 O 1 *
+bit 312 O 1 *
+bit 311 O 1 *
+bit 310 I 1 IO_T4
+bit 309 O 1 IO_T4 308 1 Z
+bit 308 C 1 *
+bit 307 I 1 IO_R4
+bit 306 O 1 IO_R4 305 1 Z
+bit 305 C 1 *
+bit 304 I 1 IO_T3
+bit 303 O 1 IO_T3 302 1 Z
+bit 302 C 1 *
+bit 301 I 1 IO_R3
+bit 300 O 1 IO_R3 299 1 Z
+bit 299 C 1 *
+bit 298 I 1 M2_P4
+bit 297 I 1 M0_P3
+bit 296 I 1 M1_T2
+bit 295 I 1 IO_R1
+bit 294 O 1 IO_R1 293 1 Z
+bit 293 C 1 *
+bit 292 I 1 IO_P1
+bit 291 O 1 IO_P1 290 1 Z
+bit 290 C 1 *
+bit 289 I 1 IO_P2
+bit 288 O 1 IO_P2 287 1 Z
+bit 287 C 1 *
+bit 286 I 1 IO_N3
+bit 285 O 1 IO_N3 284 1 Z
+bit 284 C 1 *
+bit 283 I 1 IO_N2
+bit 282 O 1 IO_N2 281 1 Z
+bit 281 C 1 *
+bit 280 I 1 IO_N1
+bit 279 O 1 IO_N1 278 1 Z
+bit 278 C 1 *
+bit 277 I 1 IO_M4
+bit 276 O 1 IO_M4 275 1 Z
+bit 275 C 1 *
+bit 274 I 1 IO_M3
+bit 273 O 1 IO_M3 272 1 Z
+bit 272 C 1 *
+bit 271 I 1 IO_M2
+bit 270 O 1 IO_M2 269 1 Z
+bit 269 C 1 *
+bit 268 I 1 IO_M1
+bit 267 O 1 IO_M1 266 1 Z
+bit 266 C 1 *
+bit 265 I 1 IO_L5
+bit 264 O 1 IO_L5 263 1 Z
+bit 263 C 1 *
+bit 262 I 1 IO_L4
+bit 261 O 1 IO_L4 260 1 Z
+bit 260 C 1 *
+bit 259 I 1 IO_L3
+bit 258 O 1 IO_L3 257 1 Z
+bit 257 C 1 *
+bit 256 I 1 IO_L2
+bit 255 O 1 IO_L2 254 1 Z
+bit 254 C 1 *
+bit 253 I 1 IO_K5
+bit 252 O 1 IO_K5 251 1 Z
+bit 251 C 1 *
+bit 250 I 1 IO_K4
+bit 249 O 1 IO_K4 248 1 Z
+bit 248 C 1 *
+bit 247 I 1 IO_K3
+bit 246 O 1 IO_K3 245 1 Z
+bit 245 C 1 *
+bit 244 I 1 IO_K2
+bit 243 O 1 IO_K2 242 1 Z
+bit 242 C 1 *
+bit 241 O 1 *
+bit 240 O 1 *
+bit 239 O 1 *
+bit 238 I 1 IO_K1
+bit 237 O 1 IO_K1 236 1 Z
+bit 236 C 1 *
+bit 235 I 1 IO_J4
+bit 234 O 1 IO_J4 233 1 Z
+bit 233 C 1 *
+bit 232 I 1 IO_J3
+bit 231 O 1 IO_J3 230 1 Z
+bit 230 C 1 *
+bit 229 I 1 IO_J2
+bit 228 O 1 IO_J2 227 1 Z
+bit 227 C 1 *
+bit 226 I 1 IO_J1
+bit 225 O 1 IO_J1 224 1 Z
+bit 224 C 1 *
+bit 223 I 1 IO_H1
+bit 222 O 1 IO_H1 221 1 Z
+bit 221 C 1 *
+bit 220 I 1 IO_G1
+bit 219 O 1 IO_G1 218 1 Z
+bit 218 C 1 *
+bit 217 I 1 IO_H3
+bit 216 O 1 IO_H3 215 1 Z
+bit 215 C 1 *
+bit 214 I 1 IO_H4
+bit 213 O 1 IO_H4 212 1 Z
+bit 212 C 1 *
+bit 211 I 1 IO_G2
+bit 210 O 1 IO_G2 209 1 Z
+bit 209 C 1 *
+bit 208 O 1 *
+bit 207 O 1 *
+bit 206 O 1 *
+bit 205 I 1 IO_G3
+bit 204 O 1 IO_G3 203 1 Z
+bit 203 C 1 *
+bit 202 I 1 IO_G4
+bit 201 O 1 IO_G4 200 1 Z
+bit 200 C 1 *
+bit 199 I 1 IO_G5
+bit 198 O 1 IO_G5 197 1 Z
+bit 197 C 1 *
+bit 196 I 1 IO_F5
+bit 195 O 1 IO_F5 194 1 Z
+bit 194 C 1 *
+bit 193 I 1 IO_F2
+bit 192 O 1 IO_F2 191 1 Z
+bit 191 C 1 *
+bit 190 I 1 IO_F3
+bit 189 O 1 IO_F3 188 1 Z
+bit 188 C 1 *
+bit 187 I 1 IO_F4
+bit 186 O 1 IO_F4 185 1 Z
+bit 185 C 1 *
+bit 184 I 1 IO_E4
+bit 183 O 1 IO_E4 182 1 Z
+bit 182 C 1 *
+bit 181 I 1 IO_E1
+bit 180 O 1 IO_E1 179 1 Z
+bit 179 C 1 *
+bit 178 I 1 IO_E2
+bit 177 O 1 IO_E2 176 1 Z
+bit 176 C 1 *
+bit 175 I 1 IO_E3
+bit 174 O 1 IO_E3 173 1 Z
+bit 173 C 1 *
+bit 172 I 1 IO_D3
+bit 171 O 1 IO_D3 170 1 Z
+bit 170 C 1 *
+bit 169 I 1 IO_D1
+bit 168 O 1 IO_D1 167 1 Z
+bit 167 C 1 *
+bit 166 I 1 IO_D2
+bit 165 O 1 IO_D2 164 1 Z
+bit 164 C 1 *
+bit 163 I 1 IO_C2
+bit 162 O 1 IO_C2 161 1 Z
+bit 161 C 1 *
+bit 160 I 1 IO_C3
+bit 159 O 1 IO_C3 158 1 Z
+bit 158 C 1 *
+bit 157 I 1 IO_C1
+bit 156 O 1 IO_C1 155 1 Z
+bit 155 C 1 *
+bit 154 I 1 IO_B1
+bit 153 O 1 IO_B1 152 1 Z
+bit 152 C 1 *
+bit 151 O 1 *
+bit 150 I 1 HSWAP_EN_C4
+bit 149 I 1 IO_A3
+bit 148 O 1 IO_A3 147 1 Z
+bit 147 C 1 *
+bit 146 I 1 IO_B4
+bit 145 O 1 IO_B4 144 1 Z
+bit 144 C 1 *
+bit 143 I 1 IO_A4
+bit 142 O 1 IO_A4 141 1 Z
+bit 141 C 1 *
+bit 140 O 1 *
+bit 139 O 1 *
+bit 138 O 1 *
+bit 137 O 1 *
+bit 136 O 1 *
+bit 135 O 1 *
+bit 134 I 1 IO_D5
+bit 133 O 1 IO_D5 132 1 Z
+bit 132 C 1 *
+bit 131 O 1 *
+bit 130 O 1 *
+bit 129 O 1 *
+bit 128 O 1 *
+bit 127 O 1 *
+bit 126 O 1 *
+bit 125 I 1 IO_C5
+bit 124 O 1 IO_C5 123 1 Z
+bit 123 C 1 *
+bit 122 I 1 IO_B5
+bit 121 O 1 IO_B5 120 1 Z
+bit 120 C 1 *
+bit 119 I 1 IO_A5
+bit 118 O 1 IO_A5 117 1 Z
+bit 117 C 1 *
+bit 116 I 1 IO_E6
+bit 115 O 1 IO_E6 114 1 Z
+bit 114 C 1 *
+bit 113 I 1 IO_D6
+bit 112 O 1 IO_D6 111 1 Z
+bit 111 C 1 *
+bit 110 I 1 IO_C6
+bit 109 O 1 IO_C6 108 1 Z
+bit 108 C 1 *
+bit 107 I 1 IO_B6
+bit 106 O 1 IO_B6 105 1 Z
+bit 105 C 1 *
+bit 104 O 1 *
+bit 103 O 1 *
+bit 102 O 1 *
+bit 101 I 1 IO_E7
+bit 100 O 1 IO_E7 99 1 Z
+bit 99 C 1 *
+bit 98 I 1 IO_D7
+bit 97 O 1 IO_D7 96 1 Z
+bit 96 C 1 *
+bit 95 I 1 IO_C7
+bit 94 O 1 IO_C7 93 1 Z
+bit 93 C 1 *
+bit 92 I 1 IO_B7
+bit 91 O 1 IO_B7 90 1 Z
+bit 90 C 1 *
+bit 89 I 1 IO_A7
+bit 88 O 1 IO_A7 87 1 Z
+bit 87 C 1 *
+bit 86 I 1 IO_D8
+bit 85 O 1 IO_D8 84 1 Z
+bit 84 C 1 *
+bit 83 I 1 IO_C8
+bit 82 O 1 IO_C8 81 1 Z
+bit 81 C 1 *
+bit 80 I 1 IO_B8
+bit 79 O 1 IO_B8 78 1 Z
+bit 78 C 1 *
+bit 77 I 1 IO_A8
+bit 76 O 1 IO_A8 75 1 Z
+bit 75 C 1 *
+bit 74 I 1 IO_A9
+bit 73 O 1 IO_A9 72 1 Z
+bit 72 C 1 *
+bit 71 I 1 IO_C9
+bit 70 O 1 IO_C9 69 1 Z
+bit 69 C 1 *
+bit 68 I 1 IO_D9
+bit 67 O 1 IO_D9 66 1 Z
+bit 66 C 1 *
+bit 65 I 1 IO_A10
+bit 64 O 1 IO_A10 63 1 Z
+bit 63 C 1 *
+bit 62 I 1 IO_B10
+bit 61 O 1 IO_B10 60 1 Z
+bit 60 C 1 *
+bit 59 I 1 IO_C10
+bit 58 O 1 IO_C10 57 1 Z
+bit 57 C 1 *
+bit 56 I 1 IO_D10
+bit 55 O 1 IO_D10 54 1 Z
+bit 54 C 1 *
+bit 53 I 1 IO_E10
+bit 52 O 1 IO_E10 51 1 Z
+bit 51 C 1 *
+bit 50 I 1 IO_B11
+bit 49 O 1 IO_B11 48 1 Z
+bit 48 C 1 *
+bit 47 I 1 IO_C11
+bit 46 O 1 IO_C11 45 1 Z
+bit 45 C 1 *
+bit 44 I 1 IO_D12
+bit 43 O 1 IO_D12 42 1 Z
+bit 42 C 1 *
+bit 41 I 1 IO_D11
+bit 40 O 1 IO_D11 39 1 Z
+bit 39 C 1 *
+bit 38 I 1 IO_E11
+bit 37 O 1 IO_E11 36 1 Z
+bit 36 C 1 *
+bit 35 I 1 IO_B12
+bit 34 O 1 IO_B12 33 1 Z
+bit 33 C 1 *
+bit 32 I 1 IO_C12
+bit 31 O 1 IO_C12 30 1 Z
+bit 30 C 1 *
+bit 29 I 1 IO_A12
+bit 28 O 1 IO_A12 27 1 Z
+bit 27 C 1 *
+bit 26 O 1 *
+bit 25 O 1 *
+bit 24 O 1 *
+bit 23 O 1 *
+bit 22 O 1 *
+bit 21 O 1 *
+bit 20 O 1 *
+bit 19 O 1 *
+bit 18 O 1 *
+bit 17 O 1 *
+bit 16 O 1 *
+bit 15 O 1 *
+bit 14 O 1 *
+bit 13 O 1 *
+bit 12 O 1 *
+bit 11 I 1 IO_A13
+bit 10 O 1 IO_A13 9 1 Z
+bit 9 C 1 *
+bit 8 I 1 IO_B13
+bit 7 O 1 IO_B13 6 1 Z
+bit 6 C 1 *
+bit 5 I 1 IO_A14
+bit 4 O 1 IO_A14 3 1 Z
+bit 3 C 1 *
+bit 2 I 1 IO_B14
+bit 1 O 1 IO_B14 0 1 Z
+bit 0 C 1 *
--- /dev/null
+signal GND1
+signal GND2
+signal GND3
+signal GND4
+signal GND5
+signal GND6
+signal GND7
+signal GND8
+signal GND9
+signal GND10
+signal GND11
+signal GND12
+signal GND13
+signal GND14
+signal GND15
+signal GND16
+signal GND17
+signal GND18
+signal GND19
+signal GND20
+signal GND21
+signal GND22
+signal GND23
+signal GND24
+signal GND25
+signal GND26
+signal GND27
+signal GND28
+signal CCLK_P104
+signal DONE_P103
+signal HSWAP_EN_P206
+signal M0_P55
+signal M1_P54
+signal M2_P56
+signal PROG_B
+signal TCK
+signal TDI
+signal TDO
+signal TMS
+signal VCCAUX1
+signal VCCAUX2
+signal VCCAUX3
+signal VCCAUX4
+signal VCCAUX5
+signal VCCAUX6
+signal VCCAUX7
+signal VCCAUX8
+signal VCCINT1
+signal VCCINT2
+signal VCCINT3
+signal VCCINT4
+signal VCCO01
+signal VCCO02
+signal VCCO11
+signal VCCO12
+signal VCCO21
+signal VCCO22
+signal VCCO31
+signal VCCO32
+signal VCCO41
+signal VCCO42
+signal VCCO51
+signal VCCO52
+signal VCCO61
+signal VCCO62
+signal VCCO71
+signal VCCO72
+signal IO_P2
+signal IO_P3
+signal IO_P4
+signal IO_P5
+signal IO_P7
+signal IO_P9
+signal IO_P10
+signal IO_P11
+signal IO_P12
+signal IO_P13
+signal IO_P15
+signal IO_P16
+signal IO_P18
+signal IO_P19
+signal IO_P20
+signal IO_P21
+signal IO_P22
+signal IO_P24
+signal IO_P26
+signal IO_P27
+signal IO_P28
+signal IO_P29
+signal IO_P31
+signal IO_P33
+signal IO_P34
+signal IO_P35
+signal IO_P36
+signal IO_P37
+signal IO_P39
+signal IO_P40
+signal IO_P42
+signal IO_P43
+signal IO_P44
+signal IO_P45
+signal IO_P46
+signal IO_P48
+signal IO_P50
+signal IO_P51
+signal IO_P52
+signal IO_P57
+signal IO_P58
+signal IO_P61
+signal IO_P62
+signal IO_P63
+signal IO_P64
+signal IO_P65
+signal IO_P67
+signal IO_P68
+signal IO_P71
+signal IO_P72
+signal IO_P74
+signal IO_P76
+signal IO_P77
+signal IO_P78
+signal IO_P79
+signal IO_P80
+signal IO_P81
+signal IO_P83
+signal IO_P85
+signal IO_P86
+signal IO_P87
+signal IO_P90
+signal IO_P92
+signal IO_P93
+signal IO_P94
+signal IO_P95
+signal IO_P96
+signal IO_P97
+signal IO_P100
+signal IO_P101
+signal IO_P102
+signal IO_P106
+signal IO_P107
+signal IO_P108
+signal IO_P109
+signal IO_P111
+signal IO_P113
+signal IO_P114
+signal IO_P115
+signal IO_P116
+signal IO_P117
+signal IO_P119
+signal IO_P120
+signal IO_P122
+signal IO_P123
+signal IO_P124
+signal IO_P125
+signal IO_P126
+signal IO_P128
+signal IO_P130
+signal IO_P131
+signal IO_P132
+signal IO_P133
+signal IO_P135
+signal IO_P137
+signal IO_P138
+signal IO_P139
+signal IO_P140
+signal IO_P141
+signal IO_P143
+signal IO_P144
+signal IO_P146
+signal IO_P147
+signal IO_P148
+signal IO_P149
+signal IO_P150
+signal IO_P152
+signal IO_P154
+signal IO_P155
+signal IO_P156
+signal IO_P161
+signal IO_P162
+signal IO_P165
+signal IO_P166
+signal IO_P167
+signal IO_P168
+signal IO_P169
+signal IO_P171
+signal IO_P172
+signal IO_P175
+signal IO_P176
+signal IO_P178
+signal IO_P180
+signal IO_P181
+signal IO_P182
+signal IO_P183
+signal IO_P184
+signal IO_P185
+signal IO_P187
+signal IO_P189
+signal IO_P190
+signal IO_P191
+signal IO_P194
+signal IO_P196
+signal IO_P197
+signal IO_P198
+signal IO_P199
+signal IO_P200
+signal IO_P203
+signal IO_P204
+
+register BSR 599
+register BR 1
+register DIR 32
+
+instruction length 6
+
+instruction EXTEST 000000 BSR
+instruction SAMPLE/PRELOAD 000001 BSR
+instruction IDCODE 001001 DIR
+instruction BYPASS 111111 BR
+
+bit 598 I 1 IO_P156
+bit 597 O 1 IO_P156 596 1 Z
+bit 596 C 1 *
+bit 595 I 1 IO_P155
+bit 594 O 1 IO_P155 593 1 Z
+bit 593 C 1 *
+bit 592 O 1 *
+bit 591 O 1 *
+bit 590 O 1 *
+bit 589 O 1 *
+bit 588 O 1 *
+bit 587 O 1 *
+bit 586 O 1 *
+bit 585 O 1 *
+bit 584 O 1 *
+bit 583 I 1 IO_P154
+bit 582 O 1 IO_P154 581 1 Z
+bit 581 C 1 *
+bit 580 I 1 IO_P152
+bit 579 O 1 IO_P152 578 1 Z
+bit 578 C 1 *
+bit 577 I 1 IO_P150
+bit 576 O 1 IO_P150 575 1 Z
+bit 575 C 1 *
+bit 574 I 1 IO_P149
+bit 573 O 1 IO_P149 572 1 Z
+bit 572 C 1 *
+bit 571 I 1 IO_P148
+bit 570 O 1 IO_P148 569 1 Z
+bit 569 C 1 *
+bit 568 I 1 IO_P147
+bit 567 O 1 IO_P147 566 1 Z
+bit 566 C 1 *
+bit 565 I 1 IO_P146
+bit 564 O 1 IO_P146 563 1 Z
+bit 563 C 1 *
+bit 562 I 1 IO_P144
+bit 561 O 1 IO_P144 560 1 Z
+bit 560 C 1 *
+bit 559 I 1 IO_P143
+bit 558 O 1 IO_P143 557 1 Z
+bit 557 C 1 *
+bit 556 I 1 IO_P141
+bit 555 O 1 IO_P141 554 1 Z
+bit 554 C 1 *
+bit 553 I 1 IO_P140
+bit 552 O 1 IO_P140 551 1 Z
+bit 551 C 1 *
+bit 550 I 1 IO_P139
+bit 549 O 1 IO_P139 548 1 Z
+bit 548 C 1 *
+bit 547 I 1 IO_P138
+bit 546 O 1 IO_P138 545 1 Z
+bit 545 C 1 *
+bit 544 O 1 *
+bit 543 O 1 *
+bit 542 O 1 *
+bit 541 O 1 *
+bit 540 O 1 *
+bit 539 O 1 *
+bit 538 I 1 IO_P137
+bit 537 O 1 IO_P137 536 1 Z
+bit 536 C 1 *
+bit 535 I 1 IO_P135
+bit 534 O 1 IO_P135 533 1 Z
+bit 533 C 1 *
+bit 532 I 1 IO_P133
+bit 531 O 1 IO_P133 530 1 Z
+bit 530 C 1 *
+bit 529 I 1 IO_P132
+bit 528 O 1 IO_P132 527 1 Z
+bit 527 C 1 *
+bit 526 I 1 IO_P131
+bit 525 O 1 IO_P131 524 1 Z
+bit 524 C 1 *
+bit 523 I 1 IO_P130
+bit 522 O 1 IO_P130 521 1 Z
+bit 521 C 1 *
+bit 520 I 1 IO_P128
+bit 519 O 1 IO_P128 518 1 Z
+bit 518 C 1 *
+bit 517 I 1 IO_P126
+bit 516 O 1 IO_P126 515 1 Z
+bit 515 C 1 *
+bit 514 O 1 *
+bit 513 O 1 *
+bit 512 O 1 *
+bit 511 O 1 *
+bit 510 O 1 *
+bit 509 O 1 *
+bit 508 I 1 IO_P125
+bit 507 O 1 IO_P125 506 1 Z
+bit 506 C 1 *
+bit 505 I 1 IO_P124
+bit 504 O 1 IO_P124 503 1 Z
+bit 503 C 1 *
+bit 502 I 1 IO_P123
+bit 501 O 1 IO_P123 500 1 Z
+bit 500 C 1 *
+bit 499 I 1 IO_P122
+bit 498 O 1 IO_P122 497 1 Z
+bit 497 C 1 *
+bit 496 I 1 IO_P120
+bit 495 O 1 IO_P120 494 1 Z
+bit 494 C 1 *
+bit 493 I 1 IO_P119
+bit 492 O 1 IO_P119 491 1 Z
+bit 491 C 1 *
+bit 490 I 1 IO_P117
+bit 489 O 1 IO_P117 488 1 Z
+bit 488 C 1 *
+bit 487 I 1 IO_P116
+bit 486 O 1 IO_P116 485 1 Z
+bit 485 C 1 *
+bit 484 I 1 IO_P115
+bit 483 O 1 IO_P115 482 1 Z
+bit 482 C 1 *
+bit 481 I 1 IO_P114
+bit 480 O 1 IO_P114 479 1 Z
+bit 479 C 1 *
+bit 478 I 1 IO_P113
+bit 477 O 1 IO_P113 476 1 Z
+bit 476 C 1 *
+bit 475 I 1 IO_P111
+bit 474 O 1 IO_P111 473 1 Z
+bit 473 C 1 *
+bit 472 I 1 IO_P109
+bit 471 O 1 IO_P109 470 1 Z
+bit 470 C 1 *
+bit 469 I 1 IO_P108
+bit 468 O 1 IO_P108 467 1 Z
+bit 467 C 1 *
+bit 466 O 1 *
+bit 465 O 1 *
+bit 464 O 1 *
+bit 463 O 1 *
+bit 462 O 1 *
+bit 461 O 1 *
+bit 460 I 1 IO_P107
+bit 459 O 1 IO_P107 458 1 Z
+bit 458 C 1 *
+bit 457 I 1 IO_P106
+bit 456 O 1 IO_P106 455 1 Z
+bit 455 C 1 *
+bit 454 I 1 CCLK_P104
+bit 453 O 1 CCLK_P104 452 1 Z
+bit 452 C 1 *
+bit 451 I 1 DONE_P103
+bit 450 O 1 DONE_P103 449 1 Z
+bit 449 C 1 *
+bit 448 I 1 IO_P102
+bit 447 O 1 IO_P102 446 1 Z
+bit 446 C 1 *
+bit 445 I 1 IO_P101
+bit 444 O 1 IO_P101 443 1 Z
+bit 443 C 1 *
+bit 442 I 1 IO_P100
+bit 441 O 1 IO_P100 440 1 Z
+bit 440 C 1 *
+bit 439 I 1 IO_P97
+bit 438 O 1 IO_P97 437 1 Z
+bit 437 C 1 *
+bit 436 O 1 *
+bit 435 O 1 *
+bit 434 O 1 *
+bit 433 I 1 IO_P96
+bit 432 O 1 IO_P96 431 1 Z
+bit 431 C 1 *
+bit 430 O 1 *
+bit 429 O 1 *
+bit 428 O 1 *
+bit 427 O 1 *
+bit 426 O 1 *
+bit 425 O 1 *
+bit 424 I 1 IO_P95
+bit 423 O 1 IO_P95 422 1 Z
+bit 422 C 1 *
+bit 421 I 1 IO_P94
+bit 420 O 1 IO_P94 419 1 Z
+bit 419 C 1 *
+bit 418 I 1 IO_P93
+bit 417 O 1 IO_P93 416 1 Z
+bit 416 C 1 *
+bit 415 I 1 IO_P92
+bit 414 O 1 IO_P92 413 1 Z
+bit 413 C 1 *
+bit 412 I 1 IO_P90
+bit 411 O 1 IO_P90 410 1 Z
+bit 410 C 1 *
+bit 409 O 1 *
+bit 408 O 1 *
+bit 407 O 1 *
+bit 406 O 1 *
+bit 405 O 1 *
+bit 404 O 1 *
+bit 403 O 1 *
+bit 402 O 1 *
+bit 401 O 1 *
+bit 400 O 1 *
+bit 399 O 1 *
+bit 398 O 1 *
+bit 397 O 1 *
+bit 396 O 1 *
+bit 395 O 1 *
+bit 394 I 1 IO_P87
+bit 393 O 1 IO_P87 392 1 Z
+bit 392 C 1 *
+bit 391 I 1 IO_P86
+bit 390 O 1 IO_P86 389 1 Z
+bit 389 C 1 *
+bit 388 I 1 IO_P85
+bit 387 O 1 IO_P85 386 1 Z
+bit 386 C 1 *
+bit 385 I 1 IO_P83
+bit 384 O 1 IO_P83 383 1 Z
+bit 383 C 1 *
+bit 382 I 1 IO_P81
+bit 381 O 1 IO_P81 380 1 Z
+bit 380 C 1 *
+bit 379 I 1 IO_P80
+bit 378 O 1 IO_P80 377 1 Z
+bit 377 C 1 *
+bit 376 I 1 IO_P79
+bit 375 O 1 IO_P79 374 1 Z
+bit 374 C 1 *
+bit 373 I 1 IO_P78
+bit 372 O 1 IO_P78 371 1 Z
+bit 371 C 1 *
+bit 370 I 1 IO_P77
+bit 369 O 1 IO_P77 368 1 Z
+bit 368 C 1 *
+bit 367 I 1 IO_P76
+bit 366 O 1 IO_P76 365 1 Z
+bit 365 C 1 *
+bit 364 I 1 IO_P74
+bit 363 O 1 IO_P74 362 1 Z
+bit 362 C 1 *
+bit 361 I 1 IO_P72
+bit 360 O 1 IO_P72 359 1 Z
+bit 359 C 1 *
+bit 358 I 1 IO_P71
+bit 357 O 1 IO_P71 356 1 Z
+bit 356 C 1 *
+bit 355 O 1 *
+bit 354 O 1 *
+bit 353 O 1 *
+bit 352 O 1 *
+bit 351 O 1 *
+bit 350 O 1 *
+bit 349 O 1 *
+bit 348 O 1 *
+bit 347 O 1 *
+bit 346 O 1 *
+bit 345 O 1 *
+bit 344 O 1 *
+bit 343 O 1 *
+bit 342 O 1 *
+bit 341 O 1 *
+bit 340 I 1 IO_P68
+bit 339 O 1 IO_P68 338 1 Z
+bit 338 C 1 *
+bit 337 I 1 IO_P67
+bit 336 O 1 IO_P67 335 1 Z
+bit 335 C 1 *
+bit 334 I 1 IO_P65
+bit 333 O 1 IO_P65 332 1 Z
+bit 332 C 1 *
+bit 331 I 1 IO_P64
+bit 330 O 1 IO_P64 329 1 Z
+bit 329 C 1 *
+bit 328 I 1 IO_P63
+bit 327 O 1 IO_P63 326 1 Z
+bit 326 C 1 *
+bit 325 O 1 *
+bit 324 O 1 *
+bit 323 O 1 *
+bit 322 O 1 *
+bit 321 O 1 *
+bit 320 O 1 *
+bit 319 O 1 *
+bit 318 O 1 *
+bit 317 O 1 *
+bit 316 O 1 *
+bit 315 O 1 *
+bit 314 O 1 *
+bit 313 O 1 *
+bit 312 O 1 *
+bit 311 O 1 *
+bit 310 I 1 IO_P62
+bit 309 O 1 IO_P62 308 1 Z
+bit 308 C 1 *
+bit 307 I 1 IO_P61
+bit 306 O 1 IO_P61 305 1 Z
+bit 305 C 1 *
+bit 304 I 1 IO_P58
+bit 303 O 1 IO_P58 302 1 Z
+bit 302 C 1 *
+bit 301 I 1 IO_P57
+bit 300 O 1 IO_P57 299 1 Z
+bit 299 C 1 *
+bit 298 I 1 M2_P56
+bit 297 I 1 M0_P55
+bit 296 I 1 M1_P54
+bit 295 I 1 IO_P52
+bit 294 O 1 IO_P52 293 1 Z
+bit 293 C 1 *
+bit 292 I 1 IO_P51
+bit 291 O 1 IO_P51 290 1 Z
+bit 290 C 1 *
+bit 289 O 1 *
+bit 288 O 1 *
+bit 287 O 1 *
+bit 286 O 1 *
+bit 285 O 1 *
+bit 284 O 1 *
+bit 283 O 1 *
+bit 282 O 1 *
+bit 281 O 1 *
+bit 280 I 1 IO_P50
+bit 279 O 1 IO_P50 278 1 Z
+bit 278 C 1 *
+bit 277 I 1 IO_P48
+bit 276 O 1 IO_P48 275 1 Z
+bit 275 C 1 *
+bit 274 I 1 IO_P46
+bit 273 O 1 IO_P46 272 1 Z
+bit 272 C 1 *
+bit 271 I 1 IO_P45
+bit 270 O 1 IO_P45 269 1 Z
+bit 269 C 1 *
+bit 268 I 1 IO_P44
+bit 267 O 1 IO_P44 266 1 Z
+bit 266 C 1 *
+bit 265 I 1 IO_P43
+bit 264 O 1 IO_P43 263 1 Z
+bit 263 C 1 *
+bit 262 I 1 IO_P42
+bit 261 O 1 IO_P42 260 1 Z
+bit 260 C 1 *
+bit 259 I 1 IO_P40
+bit 258 O 1 IO_P40 257 1 Z
+bit 257 C 1 *
+bit 256 I 1 IO_P39
+bit 255 O 1 IO_P39 254 1 Z
+bit 254 C 1 *
+bit 253 I 1 IO_P37
+bit 252 O 1 IO_P37 251 1 Z
+bit 251 C 1 *
+bit 250 I 1 IO_P36
+bit 249 O 1 IO_P36 248 1 Z
+bit 248 C 1 *
+bit 247 I 1 IO_P35
+bit 246 O 1 IO_P35 245 1 Z
+bit 245 C 1 *
+bit 244 I 1 IO_P34
+bit 243 O 1 IO_P34 242 1 Z
+bit 242 C 1 *
+bit 241 O 1 *
+bit 240 O 1 *
+bit 239 O 1 *
+bit 238 O 1 *
+bit 237 O 1 *
+bit 236 O 1 *
+bit 235 I 1 IO_P33
+bit 234 O 1 IO_P33 233 1 Z
+bit 233 C 1 *
+bit 232 I 1 IO_P31
+bit 231 O 1 IO_P31 230 1 Z
+bit 230 C 1 *
+bit 229 I 1 IO_P29
+bit 228 O 1 IO_P29 227 1 Z
+bit 227 C 1 *
+bit 226 I 1 IO_P28
+bit 225 O 1 IO_P28 224 1 Z
+bit 224 C 1 *
+bit 223 I 1 IO_P27
+bit 222 O 1 IO_P27 221 1 Z
+bit 221 C 1 *
+bit 220 I 1 IO_P26
+bit 219 O 1 IO_P26 218 1 Z
+bit 218 C 1 *
+bit 217 I 1 IO_P24
+bit 216 O 1 IO_P24 215 1 Z
+bit 215 C 1 *
+bit 214 I 1 IO_P22
+bit 213 O 1 IO_P22 212 1 Z
+bit 212 C 1 *
+bit 211 O 1 *
+bit 210 O 1 *
+bit 209 O 1 *
+bit 208 O 1 *
+bit 207 O 1 *
+bit 206 O 1 *
+bit 205 I 1 IO_P21
+bit 204 O 1 IO_P21 203 1 Z
+bit 203 C 1 *
+bit 202 I 1 IO_P20
+bit 201 O 1 IO_P20 200 1 Z
+bit 200 C 1 *
+bit 199 I 1 IO_P19
+bit 198 O 1 IO_P19 197 1 Z
+bit 197 C 1 *
+bit 196 I 1 IO_P18
+bit 195 O 1 IO_P18 194 1 Z
+bit 194 C 1 *
+bit 193 I 1 IO_P16
+bit 192 O 1 IO_P16 191 1 Z
+bit 191 C 1 *
+bit 190 I 1 IO_P15
+bit 189 O 1 IO_P15 188 1 Z
+bit 188 C 1 *
+bit 187 I 1 IO_P13
+bit 186 O 1 IO_P13 185 1 Z
+bit 185 C 1 *
+bit 184 I 1 IO_P12
+bit 183 O 1 IO_P12 182 1 Z
+bit 182 C 1 *
+bit 181 I 1 IO_P11
+bit 180 O 1 IO_P11 179 1 Z
+bit 179 C 1 *
+bit 178 I 1 IO_P10
+bit 177 O 1 IO_P10 176 1 Z
+bit 176 C 1 *
+bit 175 I 1 IO_P9
+bit 174 O 1 IO_P9 173 1 Z
+bit 173 C 1 *
+bit 172 I 1 IO_P7
+bit 171 O 1 IO_P7 170 1 Z
+bit 170 C 1 *
+bit 169 O 1 *
+bit 168 O 1 *
+bit 167 O 1 *
+bit 166 O 1 *
+bit 165 O 1 *
+bit 164 O 1 *
+bit 163 I 1 IO_P5
+bit 162 O 1 IO_P5 161 1 Z
+bit 161 C 1 *
+bit 160 I 1 IO_P4
+bit 159 O 1 IO_P4 158 1 Z
+bit 158 C 1 *
+bit 157 I 1 IO_P3
+bit 156 O 1 IO_P3 155 1 Z
+bit 155 C 1 *
+bit 154 I 1 IO_P2
+bit 153 O 1 IO_P2 152 1 Z
+bit 152 C 1 *
+bit 151 O 1 *
+bit 150 I 1 HSWAP_EN_P206
+bit 149 I 1 IO_P205
+bit 148 O 1 IO_P205 147 1 Z
+bit 147 C 1 *
+bit 146 I 1 IO_P204
+bit 145 O 1 IO_P204 144 1 Z
+bit 144 C 1 *
+bit 143 I 1 IO_P203
+bit 142 O 1 IO_P203 141 1 Z
+bit 141 C 1 *
+bit 140 O 1 *
+bit 139 O 1 *
+bit 138 O 1 *
+bit 137 O 1 *
+bit 136 O 1 *
+bit 135 O 1 *
+bit 134 I 1 IO_P200
+bit 133 O 1 IO_P200 132 1 Z
+bit 132 C 1 *
+bit 131 O 1 *
+bit 130 O 1 *
+bit 129 O 1 *
+bit 128 O 1 *
+bit 127 O 1 *
+bit 126 O 1 *
+bit 125 I 1 IO_P199
+bit 124 O 1 IO_P199 123 1 Z
+bit 123 C 1 *
+bit 122 I 1 IO_P198
+bit 121 O 1 IO_P198 120 1 Z
+bit 120 C 1 *
+bit 119 I 1 IO_P197
+bit 118 O 1 IO_P197 117 1 Z
+bit 117 C 1 *
+bit 116 I 1 IO_P196
+bit 115 O 1 IO_P196 114 1 Z
+bit 114 C 1 *
+bit 113 I 1 IO_P194
+bit 112 O 1 IO_P194 111 1 Z
+bit 111 C 1 *
+bit 110 O 1 *
+bit 109 O 1 *
+bit 108 O 1 *
+bit 107 O 1 *
+bit 106 O 1 *
+bit 105 O 1 *
+bit 104 O 1 *
+bit 103 O 1 *
+bit 102 O 1 *
+bit 101 O 1 *
+bit 100 O 1 *
+bit 99 O 1 *
+bit 98 O 1 *
+bit 97 O 1 *
+bit 96 O 1 *
+bit 95 I 1 IO_P191
+bit 94 O 1 IO_P191 93 1 Z
+bit 93 C 1 *
+bit 92 I 1 IO_P190
+bit 91 O 1 IO_P190 90 1 Z
+bit 90 C 1 *
+bit 89 I 1 IO_P189
+bit 88 O 1 IO_P189 87 1 Z
+bit 87 C 1 *
+bit 86 I 1 IO_P187
+bit 85 O 1 IO_P187 84 1 Z
+bit 84 C 1 *
+bit 83 I 1 IO_P185
+bit 82 O 1 IO_P185 81 1 Z
+bit 81 C 1 *
+bit 80 I 1 IO_P184
+bit 79 O 1 IO_P184 78 1 Z
+bit 78 C 1 *
+bit 77 I 1 IO_P183
+bit 76 O 1 IO_P183 75 1 Z
+bit 75 C 1 *
+bit 74 I 1 IO_P182
+bit 73 O 1 IO_P182 72 1 Z
+bit 72 C 1 *
+bit 71 I 1 IO_P181
+bit 70 O 1 IO_P181 69 1 Z
+bit 69 C 1 *
+bit 68 I 1 IO_P180
+bit 67 O 1 IO_P180 66 1 Z
+bit 66 C 1 *
+bit 65 I 1 IO_P178
+bit 64 O 1 IO_P178 63 1 Z
+bit 63 C 1 *
+bit 62 I 1 IO_P176
+bit 61 O 1 IO_P176 60 1 Z
+bit 60 C 1 *
+bit 59 I 1 IO_P175
+bit 58 O 1 IO_P175 57 1 Z
+bit 57 C 1 *
+bit 56 O 1 *
+bit 55 O 1 *
+bit 54 O 1 *
+bit 53 O 1 *
+bit 52 O 1 *
+bit 51 O 1 *
+bit 50 O 1 *
+bit 49 O 1 *
+bit 48 O 1 *
+bit 47 O 1 *
+bit 46 O 1 *
+bit 45 O 1 *
+bit 44 O 1 *
+bit 43 O 1 *
+bit 42 O 1 *
+bit 41 I 1 IO_P172
+bit 40 O 1 IO_P172 39 1 Z
+bit 39 C 1 *
+bit 38 I 1 IO_P171
+bit 37 O 1 IO_P171 36 1 Z
+bit 36 C 1 *
+bit 35 I 1 IO_P169
+bit 34 O 1 IO_P169 33 1 Z
+bit 33 C 1 *
+bit 32 I 1 IO_P168
+bit 31 O 1 IO_P168 30 1 Z
+bit 30 C 1 *
+bit 29 I 1 IO_P167
+bit 28 O 1 IO_P167 27 1 Z
+bit 27 C 1 *
+bit 26 O 1 *
+bit 25 O 1 *
+bit 24 O 1 *
+bit 23 O 1 *
+bit 22 O 1 *
+bit 21 O 1 *
+bit 20 O 1 *
+bit 19 O 1 *
+bit 18 O 1 *
+bit 17 O 1 *
+bit 16 O 1 *
+bit 15 O 1 *
+bit 14 O 1 *
+bit 13 O 1 *
+bit 12 O 1 *
+bit 11 I 1 IO_P166
+bit 10 O 1 IO_P166 9 1 Z
+bit 9 C 1 *
+bit 8 I 1 IO_P165
+bit 7 O 1 IO_P165 6 1 Z
+bit 6 C 1 *
+bit 5 I 1 IO_P162
+bit 4 O 1 IO_P162 3 1 Z
+bit 3 C 1 *
+bit 2 I 1 IO_P161
+bit 1 O 1 IO_P161 0 1 Z
+bit 0 C 1 *
--- /dev/null
+signal GND1
+signal GND2
+signal GND3
+signal GND4
+signal GND5
+signal GND6
+signal GND7
+signal GND8
+signal GND9
+signal GND10
+signal GND11
+signal GND12
+signal GND13
+signal GND14
+signal GND15
+signal GND16
+signal CCLK_P72
+signal DONE_P71
+signal HSWAP_EN_P142
+signal M0_P38
+signal M1_P37
+signal M2_P39
+signal PROG_B
+signal TCK
+signal TDI
+signal TDO
+signal TMS
+signal VCCAUX1
+signal VCCAUX2
+signal VCCAUX3
+signal VCCAUX4
+signal VCCINT1
+signal VCCINT2
+signal VCCINT3
+signal VCCINT4
+signal VCCO011
+signal VCCO012
+signal VCCO013
+signal VCCO231
+signal VCCO232
+signal VCCO233
+signal VCCO451
+signal VCCO452
+signal VCCO453
+signal VCCO671
+signal VCCO672
+signal VCCO673
+signal IO_P1
+signal IO_P2
+signal IO_P4
+signal IO_P5
+signal IO_P6
+signal IO_P7
+signal IO_P8
+signal IO_P10
+signal IO_P11
+signal IO_P12
+signal IO_P13
+signal IO_P14
+signal IO_P15
+signal IO_P17
+signal IO_P18
+signal IO_P20
+signal IO_P21
+signal IO_P23
+signal IO_P24
+signal IO_P25
+signal IO_P26
+signal IO_P27
+signal IO_P28
+signal IO_P30
+signal IO_P31
+signal IO_P32
+signal IO_P33
+signal IO_P35
+signal IO_P36
+signal IO_P40
+signal IO_P41
+signal IO_P44
+signal IO_P46
+signal IO_P47
+signal IO_P50
+signal IO_P51
+signal IO_P52
+signal IO_P53
+signal IO_P55
+signal IO_P56
+signal IO_P57
+signal IO_P58
+signal IO_P59
+signal IO_P60
+signal IO_P63
+signal IO_P65
+signal IO_P68
+signal IO_P69
+signal IO_P70
+signal IO_P73
+signal IO_P74
+signal IO_P76
+signal IO_P77
+signal IO_P78
+signal IO_P79
+signal IO_P80
+signal IO_P82
+signal IO_P83
+signal IO_P84
+signal IO_P85
+signal IO_P86
+signal IO_P87
+signal IO_P89
+signal IO_P90
+signal IO_P92
+signal IO_P93
+signal IO_P95
+signal IO_P96
+signal IO_P97
+signal IO_P98
+signal IO_P99
+signal IO_P100
+signal IO_P102
+signal IO_P103
+signal IO_P104
+signal IO_P105
+signal IO_P107
+signal IO_P108
+signal IO_P112
+signal IO_P113
+signal IO_P116
+signal IO_P118
+signal IO_P119
+signal IO_P122
+signal IO_P123
+signal IO_P124
+signal IO_P125
+signal IO_P127
+signal IO_P128
+signal IO_P129
+signal IO_P130
+signal IO_P131
+signal IO_P132
+signal IO_P135
+signal IO_P137
+signal IO_P140
+
+register BSR 599
+register BR 1
+register DIR 32
+
+instruction length 6
+
+instruction EXTEST 000000 BSR
+instruction SAMPLE/PRELOAD 000001 BSR
+instruction IDCODE 001001 DIR
+instruction BYPASS 111111 BR
+
+bit 598 I 1 IO_P108
+bit 597 O 1 IO_P108 596 1 Z
+bit 596 C 1 *
+bit 595 I 1 IO_P107
+bit 594 O 1 IO_P107 593 1 Z
+bit 593 C 1 *
+bit 592 O 1 *
+bit 591 O 1 *
+bit 590 O 1 *
+bit 589 O 1 *
+bit 588 O 1 *
+bit 587 O 1 *
+bit 586 O 1 *
+bit 585 O 1 *
+bit 584 O 1 *
+bit 583 O 1 *
+bit 582 O 1 *
+bit 581 O 1 *
+bit 580 O 1 *
+bit 579 O 1 *
+bit 578 O 1 *
+bit 577 O 1 *
+bit 576 O 1 *
+bit 575 O 1 *
+bit 574 I 1 IO_P105
+bit 573 O 1 IO_P105 572 1 Z
+bit 572 C 1 *
+bit 571 I 1 IO_P104
+bit 570 O 1 IO_P104 569 1 Z
+bit 569 C 1 *
+bit 568 I 1 IO_P103
+bit 567 O 1 IO_P103 566 1 Z
+bit 566 C 1 *
+bit 565 I 1 IO_P102
+bit 564 O 1 IO_P102 563 1 Z
+bit 563 C 1 *
+bit 562 I 1 IO_P100
+bit 561 O 1 IO_P100 560 1 Z
+bit 560 C 1 *
+bit 559 I 1 IO_P99
+bit 558 O 1 IO_P99 557 1 Z
+bit 557 C 1 *
+bit 556 I 1 IO_P98
+bit 555 O 1 IO_P98 554 1 Z
+bit 554 C 1 *
+bit 553 I 1 IO_P97
+bit 552 O 1 IO_P97 551 1 Z
+bit 551 C 1 *
+bit 550 I 1 IO_P96
+bit 549 O 1 IO_P96 548 1 Z
+bit 548 C 1 *
+bit 547 I 1 IO_P95
+bit 546 O 1 IO_P95 545 1 Z
+bit 545 C 1 *
+bit 544 O 1 *
+bit 543 O 1 *
+bit 542 O 1 *
+bit 541 O 1 *
+bit 540 O 1 *
+bit 539 O 1 *
+bit 538 O 1 *
+bit 537 O 1 *
+bit 536 O 1 *
+bit 535 O 1 *
+bit 534 O 1 *
+bit 533 O 1 *
+bit 532 I 1 IO_P93
+bit 531 O 1 IO_P93 530 1 Z
+bit 530 C 1 *
+bit 529 I 1 IO_P92
+bit 528 O 1 IO_P92 527 1 Z
+bit 527 C 1 *
+bit 526 I 1 IO_P90
+bit 525 O 1 IO_P90 524 1 Z
+bit 524 C 1 *
+bit 523 I 1 IO_P89
+bit 522 O 1 IO_P89 521 1 Z
+bit 521 C 1 *
+bit 520 O 1 *
+bit 519 O 1 *
+bit 518 O 1 *
+bit 517 O 1 *
+bit 516 O 1 *
+bit 515 O 1 *
+bit 514 O 1 *
+bit 513 O 1 *
+bit 512 O 1 *
+bit 511 O 1 *
+bit 510 O 1 *
+bit 509 O 1 *
+bit 508 I 1 IO_P87
+bit 507 O 1 IO_P87 506 1 Z
+bit 506 C 1 *
+bit 505 I 1 IO_P86
+bit 504 O 1 IO_P86 503 1 Z
+bit 503 C 1 *
+bit 502 I 1 IO_P85
+bit 501 O 1 IO_P85 500 1 Z
+bit 500 C 1 *
+bit 499 I 1 IO_P84
+bit 498 O 1 IO_P84 497 1 Z
+bit 497 C 1 *
+bit 496 I 1 IO_P83
+bit 495 O 1 IO_P83 494 1 Z
+bit 494 C 1 *
+bit 493 I 1 IO_P82
+bit 492 O 1 IO_P82 491 1 Z
+bit 491 C 1 *
+bit 490 I 1 IO_P80
+bit 489 O 1 IO_P80 488 1 Z
+bit 488 C 1 *
+bit 487 I 1 IO_P79
+bit 486 O 1 IO_P79 485 1 Z
+bit 485 C 1 *
+bit 484 I 1 IO_P78
+bit 483 O 1 IO_P78 482 1 Z
+bit 482 C 1 *
+bit 481 I 1 IO_P77
+bit 480 O 1 IO_P77 479 1 Z
+bit 479 C 1 *
+bit 478 I 1 IO_P76
+bit 477 O 1 IO_P76 476 1 Z
+bit 476 C 1 *
+bit 475 O 1 *
+bit 474 O 1 *
+bit 473 O 1 *
+bit 472 O 1 *
+bit 471 O 1 *
+bit 470 O 1 *
+bit 469 O 1 *
+bit 468 O 1 *
+bit 467 O 1 *
+bit 466 O 1 *
+bit 465 O 1 *
+bit 464 O 1 *
+bit 463 O 1 *
+bit 462 O 1 *
+bit 461 O 1 *
+bit 460 I 1 IO_P74
+bit 459 O 1 IO_P74 458 1 Z
+bit 458 C 1 *
+bit 457 I 1 IO_P73
+bit 456 O 1 IO_P73 455 1 Z
+bit 455 C 1 *
+bit 454 I 1 CCLK_P72
+bit 453 O 1 CCLK_P72 452 1 Z
+bit 452 C 1 *
+bit 451 I 1 DONE_P71
+bit 450 O 1 DONE_P71 449 1 Z
+bit 449 C 1 *
+bit 448 I 1 IO_P70
+bit 447 O 1 IO_P70 446 1 Z
+bit 446 C 1 *
+bit 445 I 1 IO_P69
+bit 444 O 1 IO_P69 443 1 Z
+bit 443 C 1 *
+bit 442 I 1 IO_P68
+bit 441 O 1 IO_P68 440 1 Z
+bit 440 C 1 *
+bit 439 O 1 *
+bit 438 O 1 *
+bit 437 O 1 *
+bit 436 O 1 *
+bit 435 O 1 *
+bit 434 O 1 *
+bit 433 O 1 *
+bit 432 O 1 *
+bit 431 O 1 *
+bit 430 O 1 *
+bit 429 O 1 *
+bit 428 O 1 *
+bit 427 O 1 *
+bit 426 O 1 *
+bit 425 O 1 *
+bit 424 O 1 *
+bit 423 O 1 *
+bit 422 O 1 *
+bit 421 O 1 *
+bit 420 O 1 *
+bit 419 O 1 *
+bit 418 O 1 *
+bit 417 O 1 *
+bit 416 O 1 *
+bit 415 I 1 IO_P65
+bit 414 O 1 IO_P65 413 1 Z
+bit 413 C 1 *
+bit 412 I 1 IO_P63
+bit 411 O 1 IO_P63 410 1 Z
+bit 410 C 1 *
+bit 409 O 1 *
+bit 408 O 1 *
+bit 407 O 1 *
+bit 406 O 1 *
+bit 405 O 1 *
+bit 404 O 1 *
+bit 403 O 1 *
+bit 402 O 1 *
+bit 401 O 1 *
+bit 400 O 1 *
+bit 399 O 1 *
+bit 398 O 1 *
+bit 397 O 1 *
+bit 396 O 1 *
+bit 395 O 1 *
+bit 394 I 1 IO_P60
+bit 393 O 1 IO_P60 392 1 Z
+bit 392 C 1 *
+bit 391 I 1 IO_P59
+bit 390 O 1 IO_P59 389 1 Z
+bit 389 C 1 *
+bit 388 O 1 *
+bit 387 O 1 *
+bit 386 O 1 *
+bit 385 I 1 IO_P58
+bit 384 O 1 IO_P58 383 1 Z
+bit 383 C 1 *
+bit 382 I 1 IO_P57
+bit 381 O 1 IO_P57 380 1 Z
+bit 380 C 1 *
+bit 379 I 1 IO_P56
+bit 378 O 1 IO_P56 377 1 Z
+bit 377 C 1 *
+bit 376 I 1 IO_P55
+bit 375 O 1 IO_P55 374 1 Z
+bit 374 C 1 *
+bit 373 O 1 *
+bit 372 O 1 *
+bit 371 O 1 *
+bit 370 I 1 IO_P53
+bit 369 O 1 IO_P53 368 1 Z
+bit 368 C 1 *
+bit 367 I 1 IO_P52
+bit 366 O 1 IO_P52 365 1 Z
+bit 365 C 1 *
+bit 364 I 1 IO_P51
+bit 363 O 1 IO_P51 362 1 Z
+bit 362 C 1 *
+bit 361 I 1 IO_P50
+bit 360 O 1 IO_P50 359 1 Z
+bit 359 C 1 *
+bit 358 O 1 *
+bit 357 O 1 *
+bit 356 O 1 *
+bit 355 O 1 *
+bit 354 O 1 *
+bit 353 O 1 *
+bit 352 O 1 *
+bit 351 O 1 *
+bit 350 O 1 *
+bit 349 O 1 *
+bit 348 O 1 *
+bit 347 O 1 *
+bit 346 O 1 *
+bit 345 O 1 *
+bit 344 O 1 *
+bit 343 O 1 *
+bit 342 O 1 *
+bit 341 O 1 *
+bit 340 I 1 IO_P47
+bit 339 O 1 IO_P47 338 1 Z
+bit 338 C 1 *
+bit 337 I 1 IO_P46
+bit 336 O 1 IO_P46 335 1 Z
+bit 335 C 1 *
+bit 334 I 1 IO_P44
+bit 333 O 1 IO_P44 332 1 Z
+bit 332 C 1 *
+bit 331 O 1 *
+bit 330 O 1 *
+bit 329 O 1 *
+bit 328 O 1 *
+bit 327 O 1 *
+bit 326 O 1 *
+bit 325 O 1 *
+bit 324 O 1 *
+bit 323 O 1 *
+bit 322 O 1 *
+bit 321 O 1 *
+bit 320 O 1 *
+bit 319 O 1 *
+bit 318 O 1 *
+bit 317 O 1 *
+bit 316 O 1 *
+bit 315 O 1 *
+bit 314 O 1 *
+bit 313 O 1 *
+bit 312 O 1 *
+bit 311 O 1 *
+bit 310 O 1 *
+bit 309 O 1 *
+bit 308 O 1 *
+bit 307 O 1 *
+bit 306 O 1 *
+bit 305 O 1 *
+bit 304 I 1 IO_P41
+bit 303 O 1 IO_P41 302 1 Z
+bit 302 C 1 *
+bit 301 I 1 IO_P40
+bit 300 O 1 IO_P40 299 1 Z
+bit 299 C 1 *
+bit 298 I 1 M2_P39
+bit 297 I 1 M0_P38
+bit 296 I 1 M1_P37
+bit 295 I 1 IO_P36
+bit 294 O 1 IO_P36 293 1 Z
+bit 293 C 1 *
+bit 292 I 1 IO_P35
+bit 291 O 1 IO_P35 290 1 Z
+bit 290 C 1 *
+bit 289 O 1 *
+bit 288 O 1 *
+bit 287 O 1 *
+bit 286 O 1 *
+bit 285 O 1 *
+bit 284 O 1 *
+bit 283 O 1 *
+bit 282 O 1 *
+bit 281 O 1 *
+bit 280 O 1 *
+bit 279 O 1 *
+bit 278 O 1 *
+bit 277 O 1 *
+bit 276 O 1 *
+bit 275 O 1 *
+bit 274 O 1 *
+bit 273 O 1 *
+bit 272 O 1 *
+bit 271 I 1 IO_P33
+bit 270 O 1 IO_P33 269 1 Z
+bit 269 C 1 *
+bit 268 I 1 IO_P32
+bit 267 O 1 IO_P32 266 1 Z
+bit 266 C 1 *
+bit 265 I 1 IO_P31
+bit 264 O 1 IO_P31 263 1 Z
+bit 263 C 1 *
+bit 262 I 1 IO_P30
+bit 261 O 1 IO_P30 260 1 Z
+bit 260 C 1 *
+bit 259 I 1 IO_P28
+bit 258 O 1 IO_P28 257 1 Z
+bit 257 C 1 *
+bit 256 I 1 IO_P27
+bit 255 O 1 IO_P27 254 1 Z
+bit 254 C 1 *
+bit 253 I 1 IO_P26
+bit 252 O 1 IO_P26 251 1 Z
+bit 251 C 1 *
+bit 250 I 1 IO_P25
+bit 249 O 1 IO_P25 248 1 Z
+bit 248 C 1 *
+bit 247 I 1 IO_P24
+bit 246 O 1 IO_P24 245 1 Z
+bit 245 C 1 *
+bit 244 I 1 IO_P23
+bit 243 O 1 IO_P23 242 1 Z
+bit 242 C 1 *
+bit 241 O 1 *
+bit 240 O 1 *
+bit 239 O 1 *
+bit 238 O 1 *
+bit 237 O 1 *
+bit 236 O 1 *
+bit 235 O 1 *
+bit 234 O 1 *
+bit 233 O 1 *
+bit 232 O 1 *
+bit 231 O 1 *
+bit 230 O 1 *
+bit 229 I 1 IO_P21
+bit 228 O 1 IO_P21 227 1 Z
+bit 227 C 1 *
+bit 226 I 1 IO_P20
+bit 225 O 1 IO_P20 224 1 Z
+bit 224 C 1 *
+bit 223 I 1 IO_P18
+bit 222 O 1 IO_P18 221 1 Z
+bit 221 C 1 *
+bit 220 I 1 IO_P17
+bit 219 O 1 IO_P17 218 1 Z
+bit 218 C 1 *
+bit 217 O 1 *
+bit 216 O 1 *
+bit 215 O 1 *
+bit 214 O 1 *
+bit 213 O 1 *
+bit 212 O 1 *
+bit 211 O 1 *
+bit 210 O 1 *
+bit 209 O 1 *
+bit 208 O 1 *
+bit 207 O 1 *
+bit 206 O 1 *
+bit 205 I 1 IO_P15
+bit 204 O 1 IO_P15 203 1 Z
+bit 203 C 1 *
+bit 202 I 1 IO_P14
+bit 201 O 1 IO_P14 200 1 Z
+bit 200 C 1 *
+bit 199 I 1 IO_P13
+bit 198 O 1 IO_P13 197 1 Z
+bit 197 C 1 *
+bit 196 I 1 IO_P12
+bit 195 O 1 IO_P12 194 1 Z
+bit 194 C 1 *
+bit 193 I 1 IO_P11
+bit 192 O 1 IO_P11 191 1 Z
+bit 191 C 1 *
+bit 190 I 1 IO_P10
+bit 189 O 1 IO_P10 188 1 Z
+bit 188 C 1 *
+bit 187 I 1 IO_P8
+bit 186 O 1 IO_P8 185 1 Z
+bit 185 C 1 *
+bit 184 I 1 IO_P7
+bit 183 O 1 IO_P7 182 1 Z
+bit 182 C 1 *
+bit 181 I 1 IO_P6
+bit 180 O 1 IO_P6 179 1 Z
+bit 179 C 1 *
+bit 178 I 1 IO_P5
+bit 177 O 1 IO_P5 176 1 Z
+bit 176 C 1 *
+bit 175 I 1 IO_P4
+bit 174 O 1 IO_P4 173 1 Z
+bit 173 C 1 *
+bit 172 O 1 *
+bit 171 O 1 *
+bit 170 O 1 *
+bit 169 O 1 *
+bit 168 O 1 *
+bit 167 O 1 *
+bit 166 O 1 *
+bit 165 O 1 *
+bit 164 O 1 *
+bit 163 O 1 *
+bit 162 O 1 *
+bit 161 O 1 *
+bit 160 O 1 *
+bit 159 O 1 *
+bit 158 O 1 *
+bit 157 I 1 IO_P2
+bit 156 O 1 IO_P2 155 1 Z
+bit 155 C 1 *
+bit 154 I 1 IO_P1
+bit 153 O 1 IO_P1 152 1 Z
+bit 152 C 1 *
+bit 151 O 1 *
+bit 150 I 1 HSWAP_EN_P142
+bit 149 O 1 *
+bit 148 O 1 *
+bit 147 O 1 *
+bit 146 I 1 IO_P141
+bit 145 O 1 IO_P141 144 1 Z
+bit 144 C 1 *
+bit 143 I 1 IO_P140
+bit 142 O 1 IO_P140 141 1 Z
+bit 141 C 1 *
+bit 140 O 1 *
+bit 139 O 1 *
+bit 138 O 1 *
+bit 137 O 1 *
+bit 136 O 1 *
+bit 135 O 1 *
+bit 134 O 1 *
+bit 133 O 1 *
+bit 132 O 1 *
+bit 131 O 1 *
+bit 130 O 1 *
+bit 129 O 1 *
+bit 128 O 1 *
+bit 127 O 1 *
+bit 126 O 1 *
+bit 125 O 1 *
+bit 124 O 1 *
+bit 123 O 1 *
+bit 122 O 1 *
+bit 121 O 1 *
+bit 120 O 1 *
+bit 119 O 1 *
+bit 118 O 1 *
+bit 117 O 1 *
+bit 116 I 1 IO_P137
+bit 115 O 1 IO_P137 114 1 Z
+bit 114 C 1 *
+bit 113 I 1 IO_P135
+bit 112 O 1 IO_P135 111 1 Z
+bit 111 C 1 *
+bit 110 O 1 *
+bit 109 O 1 *
+bit 108 O 1 *
+bit 107 O 1 *
+bit 106 O 1 *
+bit 105 O 1 *
+bit 104 O 1 *
+bit 103 O 1 *
+bit 102 O 1 *
+bit 101 O 1 *
+bit 100 O 1 *
+bit 99 O 1 *
+bit 98 O 1 *
+bit 97 O 1 *
+bit 96 O 1 *
+bit 95 I 1 IO_P132
+bit 94 O 1 IO_P132 93 1 Z
+bit 93 C 1 *
+bit 92 I 1 IO_P131
+bit 91 O 1 IO_P131 90 1 Z
+bit 90 C 1 *
+bit 89 O 1 *
+bit 88 O 1 *
+bit 87 O 1 *
+bit 86 I 1 IO_P130
+bit 85 O 1 IO_P130 84 1 Z
+bit 84 C 1 *
+bit 83 I 1 IO_P129
+bit 82 O 1 IO_P129 81 1 Z
+bit 81 C 1 *
+bit 80 I 1 IO_P128
+bit 79 O 1 IO_P128 78 1 Z
+bit 78 C 1 *
+bit 77 I 1 IO_P127
+bit 76 O 1 IO_P127 75 1 Z
+bit 75 C 1 *
+bit 74 O 1 *
+bit 73 O 1 *
+bit 72 O 1 *
+bit 71 I 1 IO_P125
+bit 70 O 1 IO_P125 69 1 Z
+bit 69 C 1 *
+bit 68 I 1 IO_P124
+bit 67 O 1 IO_P124 66 1 Z
+bit 66 C 1 *
+bit 65 I 1 IO_P123
+bit 64 O 1 IO_P123 63 1 Z
+bit 63 C 1 *
+bit 62 I 1 IO_P122
+bit 61 O 1 IO_P122 60 1 Z
+bit 60 C 1 *
+bit 59 O 1 *
+bit 58 O 1 *
+bit 57 O 1 *
+bit 56 O 1 *
+bit 55 O 1 *
+bit 54 O 1 *
+bit 53 O 1 *
+bit 52 O 1 *
+bit 51 O 1 *
+bit 50 O 1 *
+bit 49 O 1 *
+bit 48 O 1 *
+bit 47 O 1 *
+bit 46 O 1 *
+bit 45 O 1 *
+bit 44 O 1 *
+bit 43 O 1 *
+bit 42 O 1 *
+bit 41 I 1 IO_P119
+bit 40 O 1 IO_P119 39 1 Z
+bit 39 C 1 *
+bit 38 I 1 IO_P118
+bit 37 O 1 IO_P118 36 1 Z
+bit 36 C 1 *
+bit 35 I 1 IO_P116
+bit 34 O 1 IO_P116 33 1 Z
+bit 33 C 1 *
+bit 32 O 1 *
+bit 31 O 1 *
+bit 30 O 1 *
+bit 29 O 1 *
+bit 28 O 1 *
+bit 27 O 1 *
+bit 26 O 1 *
+bit 25 O 1 *
+bit 24 O 1 *
+bit 23 O 1 *
+bit 22 O 1 *
+bit 21 O 1 *
+bit 20 O 1 *
+bit 19 O 1 *
+bit 18 O 1 *
+bit 17 O 1 *
+bit 16 O 1 *
+bit 15 O 1 *
+bit 14 O 1 *
+bit 13 O 1 *
+bit 12 O 1 *
+bit 11 O 1 *
+bit 10 O 1 *
+bit 9 O 1 *
+bit 8 O 1 *
+bit 7 O 1 *
+bit 6 O 1 *
+bit 5 I 1 IO_P113
+bit 4 O 1 IO_P113 3 1 Z
+bit 3 C 1 *
+bit 2 I 1 IO_P112
+bit 1 O 1 IO_P112 0 1 Z
+bit 0 C 1 *
--- /dev/null
+signal GND1
+signal GND2
+signal GND3
+signal GND4
+signal GND5
+signal GND6
+signal GND7
+signal GND8
+signal GND9
+signal GND10
+signal CCLK_P52
+signal DONE_P51
+signal HSWAP_EN_P98
+signal M0_P25
+signal M1_P24
+signal M2_P26
+signal PROG_B
+signal TCK
+signal TDI
+signal TDO
+signal TMS
+signal VCCAUX1
+signal VCCAUX2
+signal VCCAUX3
+signal VCCAUX4
+signal VCCINT1
+signal VCCINT2
+signal VCCINT3
+signal VCCINT4
+signal VCCO0
+signal VCCO1
+signal VCCO2
+signal VCCO3
+signal VCCO4
+signal VCCO5
+signal VCCO6
+signal VCCO7
+signal IO_P1
+signal IO_P2
+signal IO_P4
+signal IO_P5
+signal IO_P8
+signal IO_P9
+signal IO_P11
+signal IO_P12
+signal IO_P13
+signal IO_P14
+signal IO_P15
+signal IO_P16
+signal IO_P17
+signal IO_P21
+signal IO_P22
+signal IO_P23
+signal IO_P27
+signal IO_P28
+signal IO_P30
+signal IO_P32
+signal IO_P34
+signal IO_P35
+signal IO_P36
+signal IO_P37
+signal IO_P38
+signal IO_P39
+signal IO_P40
+signal IO_P42
+signal IO_P43
+signal IO_P44
+signal IO_P47
+signal IO_P48
+signal IO_P49
+signal IO_P50
+signal IO_P53
+signal IO_P54
+signal IO_P55
+signal IO_P59
+signal IO_P60
+signal IO_P61
+signal IO_P62
+signal IO_P63
+signal IO_P64
+signal IO_P65
+signal IO_P67
+signal IO_P68
+signal IO_P71
+signal IO_P72
+signal IO_P74
+signal IO_P75
+signal IO_P79
+signal IO_P80
+signal IO_P81
+signal IO_P85
+signal IO_P86
+signal IO_P87
+signal IO_P88
+signal IO_P89
+signal IO_P90
+signal IO_P91
+signal IO_P92
+signal IO_P96
+
+register BSR 599
+register BR 1
+register DIR 32
+
+instruction length 6
+
+instruction EXTEST 000000 BSR
+instruction SAMPLE/PRELOAD 000001 BSR
+instruction IDCODE 001001 DIR
+instruction BYPASS 111111 BR
+
+bit 598 I 1 IO_P75
+bit 597 O 1 IO_P75 596 1 Z
+bit 596 C 1 *
+bit 595 I 1 IO_P74
+bit 594 O 1 IO_P74 593 1 Z
+bit 593 C 1 *
+bit 592 O 1 *
+bit 591 O 1 *
+bit 590 O 1 *
+bit 589 O 1 *
+bit 588 O 1 *
+bit 587 O 1 *
+bit 586 O 1 *
+bit 585 O 1 *
+bit 584 O 1 *
+bit 583 O 1 *
+bit 582 O 1 *
+bit 581 O 1 *
+bit 580 O 1 *
+bit 579 O 1 *
+bit 578 O 1 *
+bit 577 O 1 *
+bit 576 O 1 *
+bit 575 O 1 *
+bit 574 O 1 *
+bit 573 O 1 *
+bit 572 O 1 *
+bit 571 O 1 *
+bit 570 O 1 *
+bit 569 O 1 *
+bit 568 I 1 IO_P72
+bit 567 O 1 IO_P72 566 1 Z
+bit 566 C 1 *
+bit 565 I 1 IO_P71
+bit 564 O 1 IO_P71 563 1 Z
+bit 563 C 1 *
+bit 562 O 1 *
+bit 561 O 1 *
+bit 560 O 1 *
+bit 559 O 1 *
+bit 558 O 1 *
+bit 557 O 1 *
+bit 556 O 1 *
+bit 555 O 1 *
+bit 554 O 1 *
+bit 553 O 1 *
+bit 552 O 1 *
+bit 551 O 1 *
+bit 550 I 1 IO_P68
+bit 549 O 1 IO_P68 548 1 Z
+bit 548 C 1 *
+bit 547 I 1 IO_P67
+bit 546 O 1 IO_P67 545 1 Z
+bit 545 C 1 *
+bit 544 O 1 *
+bit 543 O 1 *
+bit 542 O 1 *
+bit 541 O 1 *
+bit 540 O 1 *
+bit 539 O 1 *
+bit 538 O 1 *
+bit 537 O 1 *
+bit 536 O 1 *
+bit 535 O 1 *
+bit 534 O 1 *
+bit 533 O 1 *
+bit 532 I 1 IO_P65
+bit 531 O 1 IO_P65 530 1 Z
+bit 530 C 1 *
+bit 529 I 1 IO_P64
+bit 528 O 1 IO_P64 527 1 Z
+bit 527 C 1 *
+bit 526 I 1 IO_P63
+bit 525 O 1 IO_P63 524 1 Z
+bit 524 C 1 *
+bit 523 I 1 IO_P62
+bit 522 O 1 IO_P62 521 1 Z
+bit 521 C 1 *
+bit 520 O 1 *
+bit 519 O 1 *
+bit 518 O 1 *
+bit 517 O 1 *
+bit 516 O 1 *
+bit 515 O 1 *
+bit 514 O 1 *
+bit 513 O 1 *
+bit 512 O 1 *
+bit 511 O 1 *
+bit 510 O 1 *
+bit 509 O 1 *
+bit 508 I 1 IO_P61
+bit 507 O 1 IO_P61 506 1 Z
+bit 506 C 1 *
+bit 505 I 1 IO_P60
+bit 504 O 1 IO_P60 503 1 Z
+bit 503 C 1 *
+bit 502 I 1 IO_P59
+bit 501 O 1 IO_P59 500 1 Z
+bit 500 C 1 *
+bit 499 O 1 *
+bit 498 O 1 *
+bit 497 O 1 *
+bit 496 O 1 *
+bit 495 O 1 *
+bit 494 O 1 *
+bit 493 O 1 *
+bit 492 O 1 *
+bit 491 O 1 *
+bit 490 O 1 *
+bit 489 O 1 *
+bit 488 O 1 *
+bit 487 O 1 *
+bit 486 O 1 *
+bit 485 O 1 *
+bit 484 I 1 IO_P55
+bit 483 O 1 IO_P55 482 1 Z
+bit 482 C 1 *
+bit 481 O 1 *
+bit 480 O 1 *
+bit 479 O 1 *
+bit 478 O 1 *
+bit 477 O 1 *
+bit 476 O 1 *
+bit 475 O 1 *
+bit 474 O 1 *
+bit 473 O 1 *
+bit 472 O 1 *
+bit 471 O 1 *
+bit 470 O 1 *
+bit 469 O 1 *
+bit 468 O 1 *
+bit 467 O 1 *
+bit 466 O 1 *
+bit 465 O 1 *
+bit 464 O 1 *
+bit 463 O 1 *
+bit 462 O 1 *
+bit 461 O 1 *
+bit 460 I 1 IO_P54
+bit 459 O 1 IO_P54 458 1 Z
+bit 458 C 1 *
+bit 457 I 1 IO_P53
+bit 456 O 1 IO_P53 455 1 Z
+bit 455 C 1 *
+bit 454 I 1 CCLK_P52
+bit 453 O 1 CCLK_P52 452 1 Z
+bit 452 C 1 *
+bit 451 I 1 DONE_P51
+bit 450 O 1 DONE_P51 449 1 Z
+bit 449 C 1 *
+bit 448 O 1 *
+bit 447 O 1 *
+bit 446 O 1 *
+bit 445 I 1 IO_P50
+bit 444 O 1 IO_P50 443 1 Z
+bit 443 C 1 *
+bit 442 I 1 IO_P49
+bit 441 O 1 IO_P49 440 1 Z
+bit 440 C 1 *
+bit 439 O 1 *
+bit 438 O 1 *
+bit 437 O 1 *
+bit 436 O 1 *
+bit 435 O 1 *
+bit 434 O 1 *
+bit 433 O 1 *
+bit 432 O 1 *
+bit 431 O 1 *
+bit 430 O 1 *
+bit 429 O 1 *
+bit 428 O 1 *
+bit 427 O 1 *
+bit 426 O 1 *
+bit 425 O 1 *
+bit 424 O 1 *
+bit 423 O 1 *
+bit 422 O 1 *
+bit 421 O 1 *
+bit 420 O 1 *
+bit 419 O 1 *
+bit 418 O 1 *
+bit 417 O 1 *
+bit 416 O 1 *
+bit 415 I 1 IO_P48
+bit 414 O 1 IO_P48 413 1 Z
+bit 413 C 1 *
+bit 412 I 1 IO_P47
+bit 411 O 1 IO_P47 410 1 Z
+bit 410 C 1 *
+bit 409 O 1 *
+bit 408 O 1 *
+bit 407 O 1 *
+bit 406 O 1 *
+bit 405 O 1 *
+bit 404 O 1 *
+bit 403 O 1 *
+bit 402 O 1 *
+bit 401 O 1 *
+bit 400 O 1 *
+bit 399 O 1 *
+bit 398 O 1 *
+bit 397 O 1 *
+bit 396 O 1 *
+bit 395 O 1 *
+bit 394 I 1 IO_P44
+bit 393 O 1 IO_P44 392 1 Z
+bit 392 C 1 *
+bit 391 I 1 IO_P43
+bit 390 O 1 IO_P43 389 1 Z
+bit 389 C 1 *
+bit 388 O 1 *
+bit 387 O 1 *
+bit 386 O 1 *
+bit 385 I 1 IO_P42
+bit 384 O 1 IO_P42 383 1 Z
+bit 383 C 1 *
+bit 382 I 1 IO_P40
+bit 381 O 1 IO_P40 380 1 Z
+bit 380 C 1 *
+bit 379 I 1 IO_P39
+bit 378 O 1 IO_P39 377 1 Z
+bit 377 C 1 *
+bit 376 I 1 IO_P38
+bit 375 O 1 IO_P38 374 1 Z
+bit 374 C 1 *
+bit 373 O 1 *
+bit 372 O 1 *
+bit 371 O 1 *
+bit 370 I 1 IO_P37
+bit 369 O 1 IO_P37 368 1 Z
+bit 368 C 1 *
+bit 367 I 1 IO_P36
+bit 366 O 1 IO_P36 365 1 Z
+bit 365 C 1 *
+bit 364 I 1 IO_P35
+bit 363 O 1 IO_P35 362 1 Z
+bit 362 C 1 *
+bit 361 I 1 IO_P34
+bit 360 O 1 IO_P34 359 1 Z
+bit 359 C 1 *
+bit 358 O 1 *
+bit 357 O 1 *
+bit 356 O 1 *
+bit 355 O 1 *
+bit 354 O 1 *
+bit 353 O 1 *
+bit 352 O 1 *
+bit 351 O 1 *
+bit 350 O 1 *
+bit 349 O 1 *
+bit 348 O 1 *
+bit 347 O 1 *
+bit 346 O 1 *
+bit 345 O 1 *
+bit 344 O 1 *
+bit 343 O 1 *
+bit 342 O 1 *
+bit 341 O 1 *
+bit 340 I 1 IO_P32
+bit 339 O 1 IO_P32 338 1 Z
+bit 338 C 1 *
+bit 337 I 1 IO_P30
+bit 336 O 1 IO_P30 335 1 Z
+bit 335 C 1 *
+bit 334 O 1 *
+bit 333 O 1 *
+bit 332 O 1 *
+bit 331 O 1 *
+bit 330 O 1 *
+bit 329 O 1 *
+bit 328 O 1 *
+bit 327 O 1 *
+bit 326 O 1 *
+bit 325 O 1 *
+bit 324 O 1 *
+bit 323 O 1 *
+bit 322 O 1 *
+bit 321 O 1 *
+bit 320 O 1 *
+bit 319 O 1 *
+bit 318 O 1 *
+bit 317 O 1 *
+bit 316 O 1 *
+bit 315 O 1 *
+bit 314 O 1 *
+bit 313 O 1 *
+bit 312 O 1 *
+bit 311 O 1 *
+bit 310 O 1 *
+bit 309 O 1 *
+bit 308 O 1 *
+bit 307 O 1 *
+bit 306 O 1 *
+bit 305 O 1 *
+bit 304 I 1 IO_P28
+bit 303 O 1 IO_P28 302 1 Z
+bit 302 C 1 *
+bit 301 I 1 IO_P27
+bit 300 O 1 IO_P27 299 1 Z
+bit 299 C 1 *
+bit 298 I 1 M2_P26
+bit 297 I 1 M0_P25
+bit 296 I 1 M1_P24
+bit 295 I 1 IO_P23
+bit 294 O 1 IO_P23 293 1 Z
+bit 293 C 1 *
+bit 292 I 1 IO_P22
+bit 291 O 1 IO_P22 290 1 Z
+bit 290 C 1 *
+bit 289 O 1 *
+bit 288 O 1 *
+bit 287 O 1 *
+bit 286 O 1 *
+bit 285 O 1 *
+bit 284 O 1 *
+bit 283 O 1 *
+bit 282 O 1 *
+bit 281 O 1 *
+bit 280 O 1 *
+bit 279 O 1 *
+bit 278 O 1 *
+bit 277 O 1 *
+bit 276 O 1 *
+bit 275 O 1 *
+bit 274 O 1 *
+bit 273 O 1 *
+bit 272 O 1 *
+bit 271 O 1 *
+bit 270 O 1 *
+bit 269 O 1 *
+bit 268 I 1 IO_P21
+bit 267 O 1 IO_P21 266 1 Z
+bit 266 C 1 *
+bit 265 O 1 *
+bit 264 O 1 *
+bit 263 O 1 *
+bit 262 O 1 *
+bit 261 O 1 *
+bit 260 O 1 *
+bit 259 O 1 *
+bit 258 O 1 *
+bit 257 O 1 *
+bit 256 O 1 *
+bit 255 O 1 *
+bit 254 O 1 *
+bit 253 O 1 *
+bit 252 O 1 *
+bit 251 O 1 *
+bit 250 I 1 IO_P17
+bit 249 O 1 IO_P17 248 1 Z
+bit 248 C 1 *
+bit 247 I 1 IO_P16
+bit 246 O 1 IO_P16 245 1 Z
+bit 245 C 1 *
+bit 244 I 1 IO_P15
+bit 243 O 1 IO_P15 242 1 Z
+bit 242 C 1 *
+bit 241 O 1 *
+bit 240 O 1 *
+bit 239 O 1 *
+bit 238 O 1 *
+bit 237 O 1 *
+bit 236 O 1 *
+bit 235 O 1 *
+bit 234 O 1 *
+bit 233 O 1 *
+bit 232 O 1 *
+bit 231 O 1 *
+bit 230 O 1 *
+bit 229 I 1 IO_P14
+bit 228 O 1 IO_P14 227 1 Z
+bit 227 C 1 *
+bit 226 I 1 IO_P13
+bit 225 O 1 IO_P13 224 1 Z
+bit 224 C 1 *
+bit 223 I 1 IO_P12
+bit 222 O 1 IO_P12 221 1 Z
+bit 221 C 1 *
+bit 220 I 1 IO_P11
+bit 219 O 1 IO_P11 218 1 Z
+bit 218 C 1 *
+bit 217 O 1 *
+bit 216 O 1 *
+bit 215 O 1 *
+bit 214 O 1 *
+bit 213 O 1 *
+bit 212 O 1 *
+bit 211 O 1 *
+bit 210 O 1 *
+bit 209 O 1 *
+bit 208 O 1 *
+bit 207 O 1 *
+bit 206 O 1 *
+bit 205 O 1 *
+bit 204 O 1 *
+bit 203 O 1 *
+bit 202 O 1 *
+bit 201 O 1 *
+bit 200 O 1 *
+bit 199 I 1 IO_P9
+bit 198 O 1 IO_P9 197 1 Z
+bit 197 C 1 *
+bit 196 I 1 IO_P8
+bit 195 O 1 IO_P8 194 1 Z
+bit 194 C 1 *
+bit 193 O 1 *
+bit 192 O 1 *
+bit 191 O 1 *
+bit 190 O 1 *
+bit 189 O 1 *
+bit 188 O 1 *
+bit 187 I 1 IO_P5
+bit 186 O 1 IO_P5 185 1 Z
+bit 185 C 1 *
+bit 184 I 1 IO_P4
+bit 183 O 1 IO_P4 182 1 Z
+bit 182 C 1 *
+bit 181 O 1 *
+bit 180 O 1 *
+bit 179 O 1 *
+bit 178 O 1 *
+bit 177 O 1 *
+bit 176 O 1 *
+bit 175 O 1 *
+bit 174 O 1 *
+bit 173 O 1 *
+bit 172 O 1 *
+bit 171 O 1 *
+bit 170 O 1 *
+bit 169 O 1 *
+bit 168 O 1 *
+bit 167 O 1 *
+bit 166 O 1 *
+bit 165 O 1 *
+bit 164 O 1 *
+bit 163 O 1 *
+bit 162 O 1 *
+bit 161 O 1 *
+bit 160 O 1 *
+bit 159 O 1 *
+bit 158 O 1 *
+bit 157 I 1 IO_P2
+bit 156 O 1 IO_P2 155 1 Z
+bit 155 C 1 *
+bit 154 I 1 IO_P1
+bit 153 O 1 IO_P1 152 1 Z
+bit 152 C 1 *
+bit 151 O 1 *
+bit 150 I 1 HSWAP_EN_P98
+bit 149 O 1 *
+bit 148 O 1 *
+bit 147 O 1 *
+bit 146 I 1 IO_P97
+bit 145 O 1 IO_P97 144 1 Z
+bit 144 C 1 *
+bit 143 I 1 IO_P96
+bit 142 O 1 IO_P96 141 1 Z
+bit 141 C 1 *
+bit 140 O 1 *
+bit 139 O 1 *
+bit 138 O 1 *
+bit 137 O 1 *
+bit 136 O 1 *
+bit 135 O 1 *
+bit 134 O 1 *
+bit 133 O 1 *
+bit 132 O 1 *
+bit 131 O 1 *
+bit 130 O 1 *
+bit 129 O 1 *
+bit 128 O 1 *
+bit 127 O 1 *
+bit 126 O 1 *
+bit 125 O 1 *
+bit 124 O 1 *
+bit 123 O 1 *
+bit 122 O 1 *
+bit 121 O 1 *
+bit 120 O 1 *
+bit 119 O 1 *
+bit 118 O 1 *
+bit 117 O 1 *
+bit 116 O 1 *
+bit 115 O 1 *
+bit 114 O 1 *
+bit 113 O 1 *
+bit 112 O 1 *
+bit 111 O 1 *
+bit 110 O 1 *
+bit 109 O 1 *
+bit 108 O 1 *
+bit 107 O 1 *
+bit 106 O 1 *
+bit 105 O 1 *
+bit 104 O 1 *
+bit 103 O 1 *
+bit 102 O 1 *
+bit 101 O 1 *
+bit 100 O 1 *
+bit 99 O 1 *
+bit 98 O 1 *
+bit 97 O 1 *
+bit 96 O 1 *
+bit 95 O 1 *
+bit 94 O 1 *
+bit 93 O 1 *
+bit 92 O 1 *
+bit 91 O 1 *
+bit 90 O 1 *
+bit 89 O 1 *
+bit 88 O 1 *
+bit 87 O 1 *
+bit 86 I 1 IO_P92
+bit 85 O 1 IO_P92 84 1 Z
+bit 84 C 1 *
+bit 83 I 1 IO_P91
+bit 82 O 1 IO_P91 81 1 Z
+bit 81 C 1 *
+bit 80 I 1 IO_P90
+bit 79 O 1 IO_P90 78 1 Z
+bit 78 C 1 *
+bit 77 I 1 IO_P89
+bit 76 O 1 IO_P89 75 1 Z
+bit 75 C 1 *
+bit 74 O 1 *
+bit 73 O 1 *
+bit 72 O 1 *
+bit 71 I 1 IO_P88
+bit 70 O 1 IO_P88 69 1 Z
+bit 69 C 1 *
+bit 68 I 1 IO_P87
+bit 67 O 1 IO_P87 66 1 Z
+bit 66 C 1 *
+bit 65 I 1 IO_P86
+bit 64 O 1 IO_P86 63 1 Z
+bit 63 C 1 *
+bit 62 I 1 IO_P85
+bit 61 O 1 IO_P85 60 1 Z
+bit 60 C 1 *
+bit 59 O 1 *
+bit 58 O 1 *
+bit 57 O 1 *
+bit 56 O 1 *
+bit 55 O 1 *
+bit 54 O 1 *
+bit 53 O 1 *
+bit 52 O 1 *
+bit 51 O 1 *
+bit 50 O 1 *
+bit 49 O 1 *
+bit 48 O 1 *
+bit 47 O 1 *
+bit 46 O 1 *
+bit 45 O 1 *
+bit 44 O 1 *
+bit 43 O 1 *
+bit 42 O 1 *
+bit 41 O 1 *
+bit 40 O 1 *
+bit 39 O 1 *
+bit 38 O 1 *
+bit 37 O 1 *
+bit 36 O 1 *
+bit 35 O 1 *
+bit 34 O 1 *
+bit 33 O 1 *
+bit 32 O 1 *
+bit 31 O 1 *
+bit 30 O 1 *
+bit 29 I 1 IO_P81
+bit 28 O 1 IO_P81 27 1 Z
+bit 27 C 1 *
+bit 26 O 1 *
+bit 25 O 1 *
+bit 24 O 1 *
+bit 23 O 1 *
+bit 22 O 1 *
+bit 21 O 1 *
+bit 20 O 1 *
+bit 19 O 1 *
+bit 18 O 1 *
+bit 17 O 1 *
+bit 16 O 1 *
+bit 15 O 1 *
+bit 14 O 1 *
+bit 13 O 1 *
+bit 12 O 1 *
+bit 11 O 1 *
+bit 10 O 1 *
+bit 9 O 1 *
+bit 8 O 1 *
+bit 7 O 1 *
+bit 6 O 1 *
+bit 5 I 1 IO_P80
+bit 4 O 1 IO_P80 3 1 Z
+bit 3 C 1 *
+bit 2 I 1 IO_P79
+bit 1 O 1 IO_P79 0 1 Z
+bit 0 C 1 *
--- /dev/null
+0000 xc3s2000 0
--- /dev/null
+signal GND1
+signal GND2
+signal GND3
+signal GND4
+signal GND5
+signal GND6
+signal GND7
+signal GND8
+signal GND9
+signal GND10
+signal GND11
+signal GND12
+signal GND13
+signal GND14
+signal GND15
+signal GND16
+signal GND17
+signal GND18
+signal GND19
+signal GND20
+signal GND21
+signal GND22
+signal GND23
+signal GND24
+signal GND25
+signal GND26
+signal GND27
+signal GND28
+signal GND29
+signal GND30
+signal GND31
+signal GND32
+signal GND33
+signal GND34
+signal GND35
+signal GND36
+signal GND37
+signal GND38
+signal GND39
+signal GND40
+signal GND41
+signal GND42
+signal GND43
+signal GND44
+signal GND45
+signal GND46
+signal GND47
+signal GND48
+signal GND49
+signal GND50
+signal GND51
+signal GND52
+signal GND53
+signal GND54
+signal GND55
+signal GND56
+signal GND57
+signal GND58
+signal GND59
+signal GND60
+signal GND61
+signal GND62
+signal GND63
+signal GND64
+signal GND65
+signal GND66
+signal GND67
+signal GND68
+signal GND69
+signal GND70
+signal GND71
+signal GND72
+signal GND73
+signal GND74
+signal GND75
+signal GND76
+signal GND77
+signal GND78
+signal GND79
+signal GND80
+signal GND81
+signal GND82
+signal GND83
+signal GND84
+signal GND85
+signal GND86
+signal GND87
+signal GND88
+signal GND89
+signal GND90
+signal GND91
+signal GND92
+signal GND93
+signal GND94
+signal GND95
+signal GND96
+signal GND97
+signal GND98
+signal GND99
+signal GND100
+signal GND101
+signal GND102
+signal GND103
+signal GND104
+signal GND105
+signal GND106
+signal GND107
+signal GND108
+signal GND109
+signal GND110
+signal GND111
+signal GND112
+signal CCLK_PAD544
+signal DONE_PAD543
+signal HSWAP_EN_PAD112
+signal M0_PAD319
+signal M1_PAD318
+signal M2_PAD320
+signal PROG_B
+signal TCK
+signal TDI
+signal TDO
+signal TMS
+signal VCCAUX1
+signal VCCAUX2
+signal VCCAUX3
+signal VCCAUX4
+signal VCCAUX5
+signal VCCAUX6
+signal VCCAUX7
+signal VCCAUX8
+signal VCCAUX9
+signal VCCAUX10
+signal VCCAUX11
+signal VCCAUX12
+signal VCCAUX13
+signal VCCAUX14
+signal VCCAUX15
+signal VCCAUX16
+signal VCCAUX17
+signal VCCAUX18
+signal VCCAUX19
+signal VCCAUX20
+signal VCCAUX21
+signal VCCAUX22
+signal VCCAUX23
+signal VCCAUX24
+signal VCCINT1
+signal VCCINT2
+signal VCCINT3
+signal VCCINT4
+signal VCCINT5
+signal VCCINT6
+signal VCCINT7
+signal VCCINT8
+signal VCCINT9
+signal VCCINT10
+signal VCCINT11
+signal VCCINT12
+signal VCCINT13
+signal VCCINT14
+signal VCCINT15
+signal VCCINT16
+signal VCCINT17
+signal VCCINT18
+signal VCCINT19
+signal VCCINT20
+signal VCCINT21
+signal VCCINT22
+signal VCCINT23
+signal VCCINT24
+signal VCCO01
+signal VCCO02
+signal VCCO03
+signal VCCO04
+signal VCCO05
+signal VCCO06
+signal VCCO07
+signal VCCO08
+signal VCCO09
+signal VCCO010
+signal VCCO11
+signal VCCO12
+signal VCCO13
+signal VCCO14
+signal VCCO15
+signal VCCO16
+signal VCCO17
+signal VCCO18
+signal VCCO19
+signal VCCO110
+signal VCCO21
+signal VCCO22
+signal VCCO23
+signal VCCO24
+signal VCCO25
+signal VCCO26
+signal VCCO27
+signal VCCO28
+signal VCCO29
+signal VCCO31
+signal VCCO32
+signal VCCO33
+signal VCCO34
+signal VCCO35
+signal VCCO36
+signal VCCO37
+signal VCCO38
+signal VCCO39
+signal VCCO41
+signal VCCO42
+signal VCCO43
+signal VCCO44
+signal VCCO45
+signal VCCO46
+signal VCCO47
+signal VCCO48
+signal VCCO49
+signal VCCO410
+signal VCCO51
+signal VCCO52
+signal VCCO53
+signal VCCO54
+signal VCCO55
+signal VCCO56
+signal VCCO57
+signal VCCO58
+signal VCCO59
+signal VCCO510
+signal VCCO61
+signal VCCO62
+signal VCCO63
+signal VCCO64
+signal VCCO65
+signal VCCO66
+signal VCCO67
+signal VCCO68
+signal VCCO69
+signal VCCO71
+signal VCCO72
+signal VCCO73
+signal VCCO74
+signal VCCO75
+signal VCCO76
+signal VCCO77
+signal VCCO78
+signal VCCO79
+signal IO_PAD2
+signal IO_PAD3
+signal IO_PAD4
+signal IO_PAD6
+signal IO_PAD8
+signal IO_PAD9
+signal IO_PAD10
+signal IO_PAD12
+signal IO_PAD13
+signal IO_PAD14
+signal IO_PAD16
+signal IO_PAD18
+signal IO_PAD20
+signal IO_PAD22
+signal IO_PAD23
+signal IO_PAD24
+signal IO_PAD25
+signal IO_PAD26
+signal IO_PAD28
+signal IO_PAD30
+signal IO_PAD31
+signal IO_PAD32
+signal IO_PAD33
+signal IO_PAD34
+signal IO_PAD35
+signal IO_PAD36
+signal IO_PAD38
+signal IO_PAD40
+signal IO_PAD41
+signal IO_PAD42
+signal IO_PAD44
+signal IO_PAD45
+signal IO_PAD46
+signal IO_PAD48
+signal IO_PAD50
+signal IO_PAD52
+signal IO_PAD54
+signal IO_PAD55
+signal IO_PAD56
+signal IO_PAD57
+signal IO_PAD58
+signal IO_PAD60
+signal IO_PAD62
+signal IO_PAD63
+signal IO_PAD64
+signal IO_PAD66
+signal IO_PAD67
+signal IO_PAD68
+signal IO_PAD69
+signal IO_PAD70
+signal IO_PAD72
+signal IO_PAD73
+signal IO_PAD74
+signal IO_PAD76
+signal IO_PAD77
+signal IO_PAD78
+signal IO_PAD80
+signal IO_PAD82
+signal IO_PAD84
+signal IO_PAD86
+signal IO_PAD87
+signal IO_PAD88
+signal IO_PAD89
+signal IO_PAD90
+signal IO_PAD92
+signal IO_PAD94
+signal IO_PAD95
+signal IO_PAD96
+signal IO_PAD97
+signal IO_PAD98
+signal IO_PAD100
+signal IO_PAD101
+signal IO_PAD102
+signal IO_PAD104
+signal IO_PAD105
+signal IO_PAD106
+signal IO_PAD108
+signal IO_PAD109
+signal IO_PAD110
+signal IO_PAD111
+signal IO_PAD116
+signal IO_PAD117
+signal IO_PAD118
+signal IO_PAD120
+signal IO_PAD121
+signal IO_PAD122
+signal IO_PAD123
+signal IO_PAD124
+signal IO_PAD126
+signal IO_PAD128
+signal IO_PAD129
+signal IO_PAD130
+signal IO_PAD131
+signal IO_PAD132
+signal IO_PAD134
+signal IO_PAD136
+signal IO_PAD138
+signal IO_PAD140
+signal IO_PAD141
+signal IO_PAD142
+signal IO_PAD144
+signal IO_PAD146
+signal IO_PAD147
+signal IO_PAD148
+signal IO_PAD149
+signal IO_PAD150
+signal IO_PAD152
+signal IO_PAD153
+signal IO_PAD154
+signal IO_PAD155
+signal IO_PAD156
+signal IO_PAD158
+signal IO_PAD159
+signal IO_PAD160
+signal IO_PAD162
+signal IO_PAD164
+signal IO_PAD165
+signal IO_PAD166
+signal IO_PAD167
+signal IO_PAD168
+signal IO_PAD170
+signal IO_PAD172
+signal IO_PAD174
+signal IO_PAD176
+signal IO_PAD177
+signal IO_PAD178
+signal IO_PAD180
+signal IO_PAD182
+signal IO_PAD183
+signal IO_PAD184
+signal IO_PAD185
+signal IO_PAD186
+signal IO_PAD187
+signal IO_PAD188
+signal IO_PAD190
+signal IO_PAD192
+signal IO_PAD193
+signal IO_PAD194
+signal IO_PAD195
+signal IO_PAD196
+signal IO_PAD198
+signal IO_PAD200
+signal IO_PAD202
+signal IO_PAD204
+signal IO_PAD205
+signal IO_PAD206
+signal IO_PAD208
+signal IO_PAD209
+signal IO_PAD210
+signal IO_PAD212
+signal IO_PAD214
+signal IO_PAD215
+signal IO_PAD217
+signal IO_PAD218
+signal IO_PAD220
+signal IO_PAD222
+signal IO_PAD223
+signal IO_PAD224
+signal IO_PAD226
+signal IO_PAD227
+signal IO_PAD228
+signal IO_PAD230
+signal IO_PAD232
+signal IO_PAD234
+signal IO_PAD236
+signal IO_PAD237
+signal IO_PAD238
+signal IO_PAD239
+signal IO_PAD240
+signal IO_PAD242
+signal IO_PAD244
+signal IO_PAD245
+signal IO_PAD246
+signal IO_PAD247
+signal IO_PAD248
+signal IO_PAD249
+signal IO_PAD250
+signal IO_PAD252
+signal IO_PAD254
+signal IO_PAD255
+signal IO_PAD256
+signal IO_PAD258
+signal IO_PAD260
+signal IO_PAD262
+signal IO_PAD264
+signal IO_PAD265
+signal IO_PAD266
+signal IO_PAD267
+signal IO_PAD268
+signal IO_PAD270
+signal IO_PAD272
+signal IO_PAD273
+signal IO_PAD274
+signal IO_PAD276
+signal IO_PAD277
+signal IO_PAD278
+signal IO_PAD279
+signal IO_PAD280
+signal IO_PAD282
+signal IO_PAD283
+signal IO_PAD284
+signal IO_PAD285
+signal IO_PAD286
+signal IO_PAD288
+signal IO_PAD290
+signal IO_PAD291
+signal IO_PAD292
+signal IO_PAD294
+signal IO_PAD296
+signal IO_PAD298
+signal IO_PAD300
+signal IO_PAD301
+signal IO_PAD302
+signal IO_PAD303
+signal IO_PAD304
+signal IO_PAD306
+signal IO_PAD308
+signal IO_PAD309
+signal IO_PAD310
+signal IO_PAD311
+signal IO_PAD312
+signal IO_PAD314
+signal IO_PAD315
+signal IO_PAD316
+signal IO_PAD321
+signal IO_PAD322
+signal IO_PAD323
+signal IO_PAD324
+signal IO_PAD326
+signal IO_PAD327
+signal IO_PAD328
+signal IO_PAD330
+signal IO_PAD331
+signal IO_PAD332
+signal IO_PAD334
+signal IO_PAD335
+signal IO_PAD336
+signal IO_PAD337
+signal IO_PAD338
+signal IO_PAD340
+signal IO_PAD342
+signal IO_PAD343
+signal IO_PAD344
+signal IO_PAD345
+signal IO_PAD346
+signal IO_PAD348
+signal IO_PAD350
+signal IO_PAD352
+signal IO_PAD354
+signal IO_PAD355
+signal IO_PAD356
+signal IO_PAD358
+signal IO_PAD359
+signal IO_PAD360
+signal IO_PAD362
+signal IO_PAD363
+signal IO_PAD364
+signal IO_PAD365
+signal IO_PAD366
+signal IO_PAD368
+signal IO_PAD369
+signal IO_PAD370
+signal IO_PAD372
+signal IO_PAD374
+signal IO_PAD375
+signal IO_PAD376
+signal IO_PAD377
+signal IO_PAD378
+signal IO_PAD380
+signal IO_PAD382
+signal IO_PAD384
+signal IO_PAD386
+signal IO_PAD387
+signal IO_PAD388
+signal IO_PAD390
+signal IO_PAD391
+signal IO_PAD392
+signal IO_PAD394
+signal IO_PAD396
+signal IO_PAD397
+signal IO_PAD398
+signal IO_PAD399
+signal IO_PAD400
+signal IO_PAD401
+signal IO_PAD402
+signal IO_PAD404
+signal IO_PAD406
+signal IO_PAD407
+signal IO_PAD408
+signal IO_PAD409
+signal IO_PAD410
+signal IO_PAD412
+signal IO_PAD414
+signal IO_PAD416
+signal IO_PAD418
+signal IO_PAD419
+signal IO_PAD420
+signal IO_PAD422
+signal IO_PAD423
+signal IO_PAD424
+signal IO_PAD426
+signal IO_PAD428
+signal IO_PAD429
+signal IO_PAD430
+signal IO_PAD432
+signal IO_PAD433
+signal IO_PAD434
+signal IO_PAD436
+signal IO_PAD438
+signal IO_PAD439
+signal IO_PAD440
+signal IO_PAD442
+signal IO_PAD443
+signal IO_PAD444
+signal IO_PAD446
+signal IO_PAD448
+signal IO_PAD450
+signal IO_PAD452
+signal IO_PAD453
+signal IO_PAD454
+signal IO_PAD455
+signal IO_PAD456
+signal IO_PAD458
+signal IO_PAD460
+signal IO_PAD461
+signal IO_PAD462
+signal IO_PAD463
+signal IO_PAD464
+signal IO_PAD465
+signal IO_PAD466
+signal IO_PAD468
+signal IO_PAD470
+signal IO_PAD471
+signal IO_PAD472
+signal IO_PAD474
+signal IO_PAD475
+signal IO_PAD476
+signal IO_PAD478
+signal IO_PAD480
+signal IO_PAD482
+signal IO_PAD484
+signal IO_PAD485
+signal IO_PAD486
+signal IO_PAD487
+signal IO_PAD488
+signal IO_PAD490
+signal IO_PAD492
+signal IO_PAD493
+signal IO_PAD494
+signal IO_PAD496
+signal IO_PAD497
+signal IO_PAD498
+signal IO_PAD499
+signal IO_PAD500
+signal IO_PAD502
+signal IO_PAD503
+signal IO_PAD504
+signal IO_PAD506
+signal IO_PAD507
+signal IO_PAD508
+signal IO_PAD510
+signal IO_PAD512
+signal IO_PAD514
+signal IO_PAD516
+signal IO_PAD517
+signal IO_PAD518
+signal IO_PAD519
+signal IO_PAD520
+signal IO_PAD522
+signal IO_PAD524
+signal IO_PAD525
+signal IO_PAD526
+signal IO_PAD527
+signal IO_PAD528
+signal IO_PAD530
+signal IO_PAD531
+signal IO_PAD532
+signal IO_PAD534
+signal IO_PAD535
+signal IO_PAD536
+signal IO_PAD538
+signal IO_PAD539
+signal IO_PAD540
+signal IO_PAD541
+signal IO_PAD547
+signal IO_PAD548
+signal IO_PAD549
+signal IO_PAD551
+signal IO_PAD552
+signal IO_PAD553
+signal IO_PAD554
+signal IO_PAD555
+signal IO_PAD557
+signal IO_PAD559
+signal IO_PAD560
+signal IO_PAD561
+signal IO_PAD562
+signal IO_PAD563
+signal IO_PAD565
+signal IO_PAD567
+signal IO_PAD569
+signal IO_PAD571
+signal IO_PAD572
+signal IO_PAD573
+signal IO_PAD575
+signal IO_PAD577
+signal IO_PAD578
+signal IO_PAD579
+signal IO_PAD580
+signal IO_PAD581
+signal IO_PAD583
+signal IO_PAD584
+signal IO_PAD585
+signal IO_PAD586
+signal IO_PAD587
+signal IO_PAD589
+signal IO_PAD590
+signal IO_PAD591
+signal IO_PAD593
+signal IO_PAD595
+signal IO_PAD596
+signal IO_PAD597
+signal IO_PAD598
+signal IO_PAD599
+signal IO_PAD601
+signal IO_PAD603
+signal IO_PAD605
+signal IO_PAD607
+signal IO_PAD608
+signal IO_PAD609
+signal IO_PAD611
+signal IO_PAD613
+signal IO_PAD614
+signal IO_PAD615
+signal IO_PAD616
+signal IO_PAD617
+signal IO_PAD618
+signal IO_PAD619
+signal IO_PAD621
+signal IO_PAD623
+signal IO_PAD624
+signal IO_PAD625
+signal IO_PAD626
+signal IO_PAD627
+signal IO_PAD629
+signal IO_PAD631
+signal IO_PAD633
+signal IO_PAD635
+signal IO_PAD636
+signal IO_PAD637
+signal IO_PAD639
+signal IO_PAD640
+signal IO_PAD641
+signal IO_PAD643
+signal IO_PAD645
+signal IO_PAD646
+signal IO_PAD648
+signal IO_PAD649
+signal IO_PAD651
+signal IO_PAD653
+signal IO_PAD654
+signal IO_PAD655
+signal IO_PAD657
+signal IO_PAD658
+signal IO_PAD659
+signal IO_PAD661
+signal IO_PAD663
+signal IO_PAD665
+signal IO_PAD667
+signal IO_PAD668
+signal IO_PAD669
+signal IO_PAD670
+signal IO_PAD671
+signal IO_PAD673
+signal IO_PAD675
+signal IO_PAD676
+signal IO_PAD677
+signal IO_PAD678
+signal IO_PAD679
+signal IO_PAD680
+signal IO_PAD681
+signal IO_PAD683
+signal IO_PAD685
+signal IO_PAD686
+signal IO_PAD687
+signal IO_PAD689
+signal IO_PAD691
+signal IO_PAD693
+signal IO_PAD695
+signal IO_PAD696
+signal IO_PAD697
+signal IO_PAD698
+signal IO_PAD699
+signal IO_PAD701
+signal IO_PAD703
+signal IO_PAD704
+signal IO_PAD705
+signal IO_PAD707
+signal IO_PAD708
+signal IO_PAD709
+signal IO_PAD710
+signal IO_PAD711
+signal IO_PAD713
+signal IO_PAD714
+signal IO_PAD715
+signal IO_PAD716
+signal IO_PAD717
+signal IO_PAD719
+signal IO_PAD721
+signal IO_PAD722
+signal IO_PAD723
+signal IO_PAD725
+signal IO_PAD727
+signal IO_PAD729
+signal IO_PAD731
+signal IO_PAD732
+signal IO_PAD733
+signal IO_PAD734
+signal IO_PAD735
+signal IO_PAD737
+signal IO_PAD739
+signal IO_PAD740
+signal IO_PAD741
+signal IO_PAD742
+signal IO_PAD743
+signal IO_PAD745
+signal IO_PAD746
+signal IO_PAD747
+signal IO_PAD752
+signal IO_PAD753
+signal IO_PAD754
+signal IO_PAD755
+signal IO_PAD757
+signal IO_PAD758
+signal IO_PAD759
+signal IO_PAD761
+signal IO_PAD762
+signal IO_PAD763
+signal IO_PAD765
+signal IO_PAD766
+signal IO_PAD767
+signal IO_PAD768
+signal IO_PAD769
+signal IO_PAD771
+signal IO_PAD773
+signal IO_PAD774
+signal IO_PAD775
+signal IO_PAD776
+signal IO_PAD777
+signal IO_PAD779
+signal IO_PAD781
+signal IO_PAD783
+signal IO_PAD785
+signal IO_PAD786
+signal IO_PAD787
+signal IO_PAD789
+signal IO_PAD790
+signal IO_PAD791
+signal IO_PAD793
+signal IO_PAD794
+signal IO_PAD795
+signal IO_PAD796
+signal IO_PAD797
+signal IO_PAD799
+signal IO_PAD800
+signal IO_PAD801
+signal IO_PAD803
+signal IO_PAD805
+signal IO_PAD806
+signal IO_PAD807
+signal IO_PAD808
+signal IO_PAD809
+signal IO_PAD811
+signal IO_PAD813
+signal IO_PAD815
+signal IO_PAD817
+signal IO_PAD818
+signal IO_PAD819
+signal IO_PAD821
+signal IO_PAD822
+signal IO_PAD823
+signal IO_PAD825
+signal IO_PAD827
+signal IO_PAD828
+signal IO_PAD829
+signal IO_PAD830
+signal IO_PAD831
+signal IO_PAD832
+signal IO_PAD833
+signal IO_PAD835
+signal IO_PAD837
+signal IO_PAD838
+signal IO_PAD839
+signal IO_PAD840
+signal IO_PAD841
+signal IO_PAD843
+signal IO_PAD845
+signal IO_PAD847
+signal IO_PAD849
+signal IO_PAD850
+signal IO_PAD851
+signal IO_PAD853
+signal IO_PAD854
+signal IO_PAD855
+signal IO_PAD857
+signal IO_PAD859
+signal IO_PAD860
+
+register BSR 1931
+register BR 1
+register DIR 32
+
+instruction length 6
+
+instruction EXTEST 000000 BSR
+instruction SAMPLE/PRELOAD 000001 BSR
+instruction IDCODE 001001 DIR
+instruction BYPASS 111111 BR
+
+bit 1930 I 1 IO_PAD747
+bit 1929 O 1 IO_PAD747 1928 1 Z
+bit 1928 C 1 *
+bit 1927 I 1 IO_PAD746
+bit 1926 O 1 IO_PAD746 1925 1 Z
+bit 1925 C 1 *
+bit 1924 I 1 IO_PAD745
+bit 1923 O 1 IO_PAD745 1922 1 Z
+bit 1922 C 1 *
+bit 1921 I 1 IO_PAD743
+bit 1920 O 1 IO_PAD743 1919 1 Z
+bit 1919 C 1 *
+bit 1918 I 1 IO_PAD742
+bit 1917 O 1 IO_PAD742 1916 1 Z
+bit 1916 C 1 *
+bit 1915 I 1 IO_PAD741
+bit 1914 O 1 IO_PAD741 1913 1 Z
+bit 1913 C 1 *
+bit 1912 I 1 IO_PAD740
+bit 1911 O 1 IO_PAD740 1910 1 Z
+bit 1910 C 1 *
+bit 1909 I 1 IO_PAD739
+bit 1908 O 1 IO_PAD739 1907 1 Z
+bit 1907 C 1 *
+bit 1906 I 1 IO_PAD737
+bit 1905 O 1 IO_PAD737 1904 1 Z
+bit 1904 C 1 *
+bit 1903 I 1 IO_PAD735
+bit 1902 O 1 IO_PAD735 1901 1 Z
+bit 1901 C 1 *
+bit 1900 I 1 IO_PAD734
+bit 1899 O 1 IO_PAD734 1898 1 Z
+bit 1898 C 1 *
+bit 1897 I 1 IO_PAD733
+bit 1896 O 1 IO_PAD733 1895 1 Z
+bit 1895 C 1 *
+bit 1894 I 1 IO_PAD732
+bit 1893 O 1 IO_PAD732 1892 1 Z
+bit 1892 C 1 *
+bit 1891 I 1 IO_PAD731
+bit 1890 O 1 IO_PAD731 1889 1 Z
+bit 1889 C 1 *
+bit 1888 I 1 IO_PAD729
+bit 1887 O 1 IO_PAD729 1886 1 Z
+bit 1886 C 1 *
+bit 1885 I 1 IO_PAD727
+bit 1884 O 1 IO_PAD727 1883 1 Z
+bit 1883 C 1 *
+bit 1882 I 1 IO_PAD725
+bit 1881 O 1 IO_PAD725 1880 1 Z
+bit 1880 C 1 *
+bit 1879 I 1 IO_PAD723
+bit 1878 O 1 IO_PAD723 1877 1 Z
+bit 1877 C 1 *
+bit 1876 I 1 IO_PAD722
+bit 1875 O 1 IO_PAD722 1874 1 Z
+bit 1874 C 1 *
+bit 1873 I 1 IO_PAD721
+bit 1872 O 1 IO_PAD721 1871 1 Z
+bit 1871 C 1 *
+bit 1870 I 1 IO_PAD719
+bit 1869 O 1 IO_PAD719 1868 1 Z
+bit 1868 C 1 *
+bit 1867 I 1 IO_PAD717
+bit 1866 O 1 IO_PAD717 1865 1 Z
+bit 1865 C 1 *
+bit 1864 I 1 IO_PAD716
+bit 1863 O 1 IO_PAD716 1862 1 Z
+bit 1862 C 1 *
+bit 1861 I 1 IO_PAD715
+bit 1860 O 1 IO_PAD715 1859 1 Z
+bit 1859 C 1 *
+bit 1858 I 1 IO_PAD714
+bit 1857 O 1 IO_PAD714 1856 1 Z
+bit 1856 C 1 *
+bit 1855 I 1 IO_PAD713
+bit 1854 O 1 IO_PAD713 1853 1 Z
+bit 1853 C 1 *
+bit 1852 I 1 IO_PAD711
+bit 1851 O 1 IO_PAD711 1850 1 Z
+bit 1850 C 1 *
+bit 1849 I 1 IO_PAD710
+bit 1848 O 1 IO_PAD710 1847 1 Z
+bit 1847 C 1 *
+bit 1846 I 1 IO_PAD709
+bit 1845 O 1 IO_PAD709 1844 1 Z
+bit 1844 C 1 *
+bit 1843 I 1 IO_PAD708
+bit 1842 O 1 IO_PAD708 1841 1 Z
+bit 1841 C 1 *
+bit 1840 I 1 IO_PAD707
+bit 1839 O 1 IO_PAD707 1838 1 Z
+bit 1838 C 1 *
+bit 1837 I 1 IO_PAD705
+bit 1836 O 1 IO_PAD705 1835 1 Z
+bit 1835 C 1 *
+bit 1834 I 1 IO_PAD704
+bit 1833 O 1 IO_PAD704 1832 1 Z
+bit 1832 C 1 *
+bit 1831 I 1 IO_PAD703
+bit 1830 O 1 IO_PAD703 1829 1 Z
+bit 1829 C 1 *
+bit 1828 O 1 *
+bit 1827 O 1 *
+bit 1826 O 1 *
+bit 1825 O 1 *
+bit 1824 O 1 *
+bit 1823 O 1 *
+bit 1822 I 1 IO_PAD701
+bit 1821 O 1 IO_PAD701 1820 1 Z
+bit 1820 C 1 *
+bit 1819 I 1 IO_PAD699
+bit 1818 O 1 IO_PAD699 1817 1 Z
+bit 1817 C 1 *
+bit 1816 I 1 IO_PAD698
+bit 1815 O 1 IO_PAD698 1814 1 Z
+bit 1814 C 1 *
+bit 1813 I 1 IO_PAD697
+bit 1812 O 1 IO_PAD697 1811 1 Z
+bit 1811 C 1 *
+bit 1810 I 1 IO_PAD696
+bit 1809 O 1 IO_PAD696 1808 1 Z
+bit 1808 C 1 *
+bit 1807 I 1 IO_PAD695
+bit 1806 O 1 IO_PAD695 1805 1 Z
+bit 1805 C 1 *
+bit 1804 I 1 IO_PAD693
+bit 1803 O 1 IO_PAD693 1802 1 Z
+bit 1802 C 1 *
+bit 1801 I 1 IO_PAD691
+bit 1800 O 1 IO_PAD691 1799 1 Z
+bit 1799 C 1 *
+bit 1798 I 1 IO_PAD689
+bit 1797 O 1 IO_PAD689 1796 1 Z
+bit 1796 C 1 *
+bit 1795 I 1 IO_PAD687
+bit 1794 O 1 IO_PAD687 1793 1 Z
+bit 1793 C 1 *
+bit 1792 I 1 IO_PAD686
+bit 1791 O 1 IO_PAD686 1790 1 Z
+bit 1790 C 1 *
+bit 1789 I 1 IO_PAD685
+bit 1788 O 1 IO_PAD685 1787 1 Z
+bit 1787 C 1 *
+bit 1786 O 1 *
+bit 1785 O 1 *
+bit 1784 O 1 *
+bit 1783 O 1 *
+bit 1782 O 1 *
+bit 1781 O 1 *
+bit 1780 I 1 IO_PAD683
+bit 1779 O 1 IO_PAD683 1778 1 Z
+bit 1778 C 1 *
+bit 1777 I 1 IO_PAD681
+bit 1776 O 1 IO_PAD681 1775 1 Z
+bit 1775 C 1 *
+bit 1774 I 1 IO_PAD680
+bit 1773 O 1 IO_PAD680 1772 1 Z
+bit 1772 C 1 *
+bit 1771 I 1 IO_PAD679
+bit 1770 O 1 IO_PAD679 1769 1 Z
+bit 1769 C 1 *
+bit 1768 I 1 IO_PAD678
+bit 1767 O 1 IO_PAD678 1766 1 Z
+bit 1766 C 1 *
+bit 1765 I 1 IO_PAD677
+bit 1764 O 1 IO_PAD677 1763 1 Z
+bit 1763 C 1 *
+bit 1762 I 1 IO_PAD676
+bit 1761 O 1 IO_PAD676 1760 1 Z
+bit 1760 C 1 *
+bit 1759 I 1 IO_PAD675
+bit 1758 O 1 IO_PAD675 1757 1 Z
+bit 1757 C 1 *
+bit 1756 O 1 *
+bit 1755 O 1 *
+bit 1754 O 1 *
+bit 1753 O 1 *
+bit 1752 O 1 *
+bit 1751 O 1 *
+bit 1750 I 1 IO_PAD673
+bit 1749 O 1 IO_PAD673 1748 1 Z
+bit 1748 C 1 *
+bit 1747 I 1 IO_PAD671
+bit 1746 O 1 IO_PAD671 1745 1 Z
+bit 1745 C 1 *
+bit 1744 I 1 IO_PAD670
+bit 1743 O 1 IO_PAD670 1742 1 Z
+bit 1742 C 1 *
+bit 1741 I 1 IO_PAD669
+bit 1740 O 1 IO_PAD669 1739 1 Z
+bit 1739 C 1 *
+bit 1738 I 1 IO_PAD668
+bit 1737 O 1 IO_PAD668 1736 1 Z
+bit 1736 C 1 *
+bit 1735 I 1 IO_PAD667
+bit 1734 O 1 IO_PAD667 1733 1 Z
+bit 1733 C 1 *
+bit 1732 I 1 IO_PAD665
+bit 1731 O 1 IO_PAD665 1730 1 Z
+bit 1730 C 1 *
+bit 1729 I 1 IO_PAD663
+bit 1728 O 1 IO_PAD663 1727 1 Z
+bit 1727 C 1 *
+bit 1726 I 1 IO_PAD661
+bit 1725 O 1 IO_PAD661 1724 1 Z
+bit 1724 C 1 *
+bit 1723 I 1 IO_PAD659
+bit 1722 O 1 IO_PAD659 1721 1 Z
+bit 1721 C 1 *
+bit 1720 O 1 *
+bit 1719 O 1 *
+bit 1718 O 1 *
+bit 1717 O 1 *
+bit 1716 O 1 *
+bit 1715 O 1 *
+bit 1714 I 1 IO_PAD658
+bit 1713 O 1 IO_PAD658 1712 1 Z
+bit 1712 C 1 *
+bit 1711 I 1 IO_PAD657
+bit 1710 O 1 IO_PAD657 1709 1 Z
+bit 1709 C 1 *
+bit 1708 I 1 IO_PAD655
+bit 1707 O 1 IO_PAD655 1706 1 Z
+bit 1706 C 1 *
+bit 1705 I 1 IO_PAD654
+bit 1704 O 1 IO_PAD654 1703 1 Z
+bit 1703 C 1 *
+bit 1702 I 1 IO_PAD653
+bit 1701 O 1 IO_PAD653 1700 1 Z
+bit 1700 C 1 *
+bit 1699 I 1 IO_PAD651
+bit 1698 O 1 IO_PAD651 1697 1 Z
+bit 1697 C 1 *
+bit 1696 I 1 IO_PAD649
+bit 1695 O 1 IO_PAD649 1694 1 Z
+bit 1694 C 1 *
+bit 1693 I 1 IO_PAD648
+bit 1692 O 1 IO_PAD648 1691 1 Z
+bit 1691 C 1 *
+bit 1690 I 1 IO_PAD646
+bit 1689 O 1 IO_PAD646 1688 1 Z
+bit 1688 C 1 *
+bit 1687 I 1 IO_PAD645
+bit 1686 O 1 IO_PAD645 1685 1 Z
+bit 1685 C 1 *
+bit 1684 I 1 IO_PAD643
+bit 1683 O 1 IO_PAD643 1682 1 Z
+bit 1682 C 1 *
+bit 1681 I 1 IO_PAD641
+bit 1680 O 1 IO_PAD641 1679 1 Z
+bit 1679 C 1 *
+bit 1678 I 1 IO_PAD640
+bit 1677 O 1 IO_PAD640 1676 1 Z
+bit 1676 C 1 *
+bit 1675 I 1 IO_PAD639
+bit 1674 O 1 IO_PAD639 1673 1 Z
+bit 1673 C 1 *
+bit 1672 I 1 IO_PAD637
+bit 1671 O 1 IO_PAD637 1670 1 Z
+bit 1670 C 1 *
+bit 1669 I 1 IO_PAD636
+bit 1668 O 1 IO_PAD636 1667 1 Z
+bit 1667 C 1 *
+bit 1666 O 1 *
+bit 1665 O 1 *
+bit 1664 O 1 *
+bit 1663 O 1 *
+bit 1662 O 1 *
+bit 1661 O 1 *
+bit 1660 I 1 IO_PAD635
+bit 1659 O 1 IO_PAD635 1658 1 Z
+bit 1658 C 1 *
+bit 1657 I 1 IO_PAD633
+bit 1656 O 1 IO_PAD633 1655 1 Z
+bit 1655 C 1 *
+bit 1654 I 1 IO_PAD631
+bit 1653 O 1 IO_PAD631 1652 1 Z
+bit 1652 C 1 *
+bit 1651 I 1 IO_PAD629
+bit 1650 O 1 IO_PAD629 1649 1 Z
+bit 1649 C 1 *
+bit 1648 I 1 IO_PAD627
+bit 1647 O 1 IO_PAD627 1646 1 Z
+bit 1646 C 1 *
+bit 1645 I 1 IO_PAD626
+bit 1644 O 1 IO_PAD626 1643 1 Z
+bit 1643 C 1 *
+bit 1642 I 1 IO_PAD625
+bit 1641 O 1 IO_PAD625 1640 1 Z
+bit 1640 C 1 *
+bit 1639 I 1 IO_PAD624
+bit 1638 O 1 IO_PAD624 1637 1 Z
+bit 1637 C 1 *
+bit 1636 I 1 IO_PAD623
+bit 1635 O 1 IO_PAD623 1634 1 Z
+bit 1634 C 1 *
+bit 1633 I 1 IO_PAD621
+bit 1632 O 1 IO_PAD621 1631 1 Z
+bit 1631 C 1 *
+bit 1630 O 1 *
+bit 1629 O 1 *
+bit 1628 O 1 *
+bit 1627 O 1 *
+bit 1626 O 1 *
+bit 1625 O 1 *
+bit 1624 I 1 IO_PAD619
+bit 1623 O 1 IO_PAD619 1622 1 Z
+bit 1622 C 1 *
+bit 1621 I 1 IO_PAD618
+bit 1620 O 1 IO_PAD618 1619 1 Z
+bit 1619 C 1 *
+bit 1618 I 1 IO_PAD617
+bit 1617 O 1 IO_PAD617 1616 1 Z
+bit 1616 C 1 *
+bit 1615 I 1 IO_PAD616
+bit 1614 O 1 IO_PAD616 1613 1 Z
+bit 1613 C 1 *
+bit 1612 I 1 IO_PAD615
+bit 1611 O 1 IO_PAD615 1610 1 Z
+bit 1610 C 1 *
+bit 1609 I 1 IO_PAD614
+bit 1608 O 1 IO_PAD614 1607 1 Z
+bit 1607 C 1 *
+bit 1606 I 1 IO_PAD613
+bit 1605 O 1 IO_PAD613 1604 1 Z
+bit 1604 C 1 *
+bit 1603 I 1 IO_PAD611
+bit 1602 O 1 IO_PAD611 1601 1 Z
+bit 1601 C 1 *
+bit 1600 O 1 *
+bit 1599 O 1 *
+bit 1598 O 1 *
+bit 1597 O 1 *
+bit 1596 O 1 *
+bit 1595 O 1 *
+bit 1594 I 1 IO_PAD609
+bit 1593 O 1 IO_PAD609 1592 1 Z
+bit 1592 C 1 *
+bit 1591 I 1 IO_PAD608
+bit 1590 O 1 IO_PAD608 1589 1 Z
+bit 1589 C 1 *
+bit 1588 I 1 IO_PAD607
+bit 1587 O 1 IO_PAD607 1586 1 Z
+bit 1586 C 1 *
+bit 1585 I 1 IO_PAD605
+bit 1584 O 1 IO_PAD605 1583 1 Z
+bit 1583 C 1 *
+bit 1582 I 1 IO_PAD603
+bit 1581 O 1 IO_PAD603 1580 1 Z
+bit 1580 C 1 *
+bit 1579 I 1 IO_PAD601
+bit 1578 O 1 IO_PAD601 1577 1 Z
+bit 1577 C 1 *
+bit 1576 I 1 IO_PAD599
+bit 1575 O 1 IO_PAD599 1574 1 Z
+bit 1574 C 1 *
+bit 1573 I 1 IO_PAD598
+bit 1572 O 1 IO_PAD598 1571 1 Z
+bit 1571 C 1 *
+bit 1570 I 1 IO_PAD597
+bit 1569 O 1 IO_PAD597 1568 1 Z
+bit 1568 C 1 *
+bit 1567 I 1 IO_PAD596
+bit 1566 O 1 IO_PAD596 1565 1 Z
+bit 1565 C 1 *
+bit 1564 I 1 IO_PAD595
+bit 1563 O 1 IO_PAD595 1562 1 Z
+bit 1562 C 1 *
+bit 1561 I 1 IO_PAD593
+bit 1560 O 1 IO_PAD593 1559 1 Z
+bit 1559 C 1 *
+bit 1558 O 1 *
+bit 1557 O 1 *
+bit 1556 O 1 *
+bit 1555 O 1 *
+bit 1554 O 1 *
+bit 1553 O 1 *
+bit 1552 I 1 IO_PAD591
+bit 1551 O 1 IO_PAD591 1550 1 Z
+bit 1550 C 1 *
+bit 1549 I 1 IO_PAD590
+bit 1548 O 1 IO_PAD590 1547 1 Z
+bit 1547 C 1 *
+bit 1546 I 1 IO_PAD589
+bit 1545 O 1 IO_PAD589 1544 1 Z
+bit 1544 C 1 *
+bit 1543 I 1 IO_PAD587
+bit 1542 O 1 IO_PAD587 1541 1 Z
+bit 1541 C 1 *
+bit 1540 I 1 IO_PAD586
+bit 1539 O 1 IO_PAD586 1538 1 Z
+bit 1538 C 1 *
+bit 1537 I 1 IO_PAD585
+bit 1536 O 1 IO_PAD585 1535 1 Z
+bit 1535 C 1 *
+bit 1534 I 1 IO_PAD584
+bit 1533 O 1 IO_PAD584 1532 1 Z
+bit 1532 C 1 *
+bit 1531 I 1 IO_PAD583
+bit 1530 O 1 IO_PAD583 1529 1 Z
+bit 1529 C 1 *
+bit 1528 I 1 IO_PAD581
+bit 1527 O 1 IO_PAD581 1526 1 Z
+bit 1526 C 1 *
+bit 1525 I 1 IO_PAD580
+bit 1524 O 1 IO_PAD580 1523 1 Z
+bit 1523 C 1 *
+bit 1522 I 1 IO_PAD579
+bit 1521 O 1 IO_PAD579 1520 1 Z
+bit 1520 C 1 *
+bit 1519 I 1 IO_PAD578
+bit 1518 O 1 IO_PAD578 1517 1 Z
+bit 1517 C 1 *
+bit 1516 I 1 IO_PAD577
+bit 1515 O 1 IO_PAD577 1514 1 Z
+bit 1514 C 1 *
+bit 1513 I 1 IO_PAD575
+bit 1512 O 1 IO_PAD575 1511 1 Z
+bit 1511 C 1 *
+bit 1510 I 1 IO_PAD573
+bit 1509 O 1 IO_PAD573 1508 1 Z
+bit 1508 C 1 *
+bit 1507 I 1 IO_PAD572
+bit 1506 O 1 IO_PAD572 1505 1 Z
+bit 1505 C 1 *
+bit 1504 I 1 IO_PAD571
+bit 1503 O 1 IO_PAD571 1502 1 Z
+bit 1502 C 1 *
+bit 1501 I 1 IO_PAD569
+bit 1500 O 1 IO_PAD569 1499 1 Z
+bit 1499 C 1 *
+bit 1498 I 1 IO_PAD567
+bit 1497 O 1 IO_PAD567 1496 1 Z
+bit 1496 C 1 *
+bit 1495 I 1 IO_PAD565
+bit 1494 O 1 IO_PAD565 1493 1 Z
+bit 1493 C 1 *
+bit 1492 I 1 IO_PAD563
+bit 1491 O 1 IO_PAD563 1490 1 Z
+bit 1490 C 1 *
+bit 1489 I 1 IO_PAD562
+bit 1488 O 1 IO_PAD562 1487 1 Z
+bit 1487 C 1 *
+bit 1486 I 1 IO_PAD561
+bit 1485 O 1 IO_PAD561 1484 1 Z
+bit 1484 C 1 *
+bit 1483 I 1 IO_PAD560
+bit 1482 O 1 IO_PAD560 1481 1 Z
+bit 1481 C 1 *
+bit 1480 I 1 IO_PAD559
+bit 1479 O 1 IO_PAD559 1478 1 Z
+bit 1478 C 1 *
+bit 1477 I 1 IO_PAD557
+bit 1476 O 1 IO_PAD557 1475 1 Z
+bit 1475 C 1 *
+bit 1474 I 1 IO_PAD555
+bit 1473 O 1 IO_PAD555 1472 1 Z
+bit 1472 C 1 *
+bit 1471 I 1 IO_PAD554
+bit 1470 O 1 IO_PAD554 1469 1 Z
+bit 1469 C 1 *
+bit 1468 I 1 IO_PAD553
+bit 1467 O 1 IO_PAD553 1466 1 Z
+bit 1466 C 1 *
+bit 1465 I 1 IO_PAD552
+bit 1464 O 1 IO_PAD552 1463 1 Z
+bit 1463 C 1 *
+bit 1462 I 1 IO_PAD551
+bit 1461 O 1 IO_PAD551 1460 1 Z
+bit 1460 C 1 *
+bit 1459 I 1 IO_PAD549
+bit 1458 O 1 IO_PAD549 1457 1 Z
+bit 1457 C 1 *
+bit 1456 I 1 IO_PAD548
+bit 1455 O 1 IO_PAD548 1454 1 Z
+bit 1454 C 1 *
+bit 1453 I 1 IO_PAD547
+bit 1452 O 1 IO_PAD547 1451 1 Z
+bit 1451 C 1 *
+bit 1450 I 1 CCLK_PAD544
+bit 1449 O 1 CCLK_PAD544 1448 1 Z
+bit 1448 C 1 *
+bit 1447 I 1 DONE_PAD543
+bit 1446 O 1 DONE_PAD543 1445 1 Z
+bit 1445 C 1 *
+bit 1444 I 1 IO_PAD541
+bit 1443 O 1 IO_PAD541 1442 1 Z
+bit 1442 C 1 *
+bit 1441 I 1 IO_PAD540
+bit 1440 O 1 IO_PAD540 1439 1 Z
+bit 1439 C 1 *
+bit 1438 I 1 IO_PAD539
+bit 1437 O 1 IO_PAD539 1436 1 Z
+bit 1436 C 1 *
+bit 1435 I 1 IO_PAD538
+bit 1434 O 1 IO_PAD538 1433 1 Z
+bit 1433 C 1 *
+bit 1432 I 1 IO_PAD536
+bit 1431 O 1 IO_PAD536 1430 1 Z
+bit 1430 C 1 *
+bit 1429 I 1 IO_PAD535
+bit 1428 O 1 IO_PAD535 1427 1 Z
+bit 1427 C 1 *
+bit 1426 I 1 IO_PAD534
+bit 1425 O 1 IO_PAD534 1424 1 Z
+bit 1424 C 1 *
+bit 1423 I 1 IO_PAD532
+bit 1422 O 1 IO_PAD532 1421 1 Z
+bit 1421 C 1 *
+bit 1420 I 1 IO_PAD531
+bit 1419 O 1 IO_PAD531 1418 1 Z
+bit 1418 C 1 *
+bit 1417 I 1 IO_PAD530
+bit 1416 O 1 IO_PAD530 1415 1 Z
+bit 1415 C 1 *
+bit 1414 I 1 IO_PAD528
+bit 1413 O 1 IO_PAD528 1412 1 Z
+bit 1412 C 1 *
+bit 1411 I 1 IO_PAD527
+bit 1410 O 1 IO_PAD527 1409 1 Z
+bit 1409 C 1 *
+bit 1408 I 1 IO_PAD526
+bit 1407 O 1 IO_PAD526 1406 1 Z
+bit 1406 C 1 *
+bit 1405 I 1 IO_PAD525
+bit 1404 O 1 IO_PAD525 1403 1 Z
+bit 1403 C 1 *
+bit 1402 I 1 IO_PAD524
+bit 1401 O 1 IO_PAD524 1400 1 Z
+bit 1400 C 1 *
+bit 1399 I 1 IO_PAD522
+bit 1398 O 1 IO_PAD522 1397 1 Z
+bit 1397 C 1 *
+bit 1396 I 1 IO_PAD520
+bit 1395 O 1 IO_PAD520 1394 1 Z
+bit 1394 C 1 *
+bit 1393 I 1 IO_PAD519
+bit 1392 O 1 IO_PAD519 1391 1 Z
+bit 1391 C 1 *
+bit 1390 I 1 IO_PAD518
+bit 1389 O 1 IO_PAD518 1388 1 Z
+bit 1388 C 1 *
+bit 1387 I 1 IO_PAD517
+bit 1386 O 1 IO_PAD517 1385 1 Z
+bit 1385 C 1 *
+bit 1384 I 1 IO_PAD516
+bit 1383 O 1 IO_PAD516 1382 1 Z
+bit 1382 C 1 *
+bit 1381 I 1 IO_PAD514
+bit 1380 O 1 IO_PAD514 1379 1 Z
+bit 1379 C 1 *
+bit 1378 I 1 IO_PAD512
+bit 1377 O 1 IO_PAD512 1376 1 Z
+bit 1376 C 1 *
+bit 1375 I 1 IO_PAD510
+bit 1374 O 1 IO_PAD510 1373 1 Z
+bit 1373 C 1 *
+bit 1372 I 1 IO_PAD508
+bit 1371 O 1 IO_PAD508 1370 1 Z
+bit 1370 C 1 *
+bit 1369 I 1 IO_PAD507
+bit 1368 O 1 IO_PAD507 1367 1 Z
+bit 1367 C 1 *
+bit 1366 I 1 IO_PAD506
+bit 1365 O 1 IO_PAD506 1364 1 Z
+bit 1364 C 1 *
+bit 1363 I 1 IO_PAD504
+bit 1362 O 1 IO_PAD504 1361 1 Z
+bit 1361 C 1 *
+bit 1360 I 1 IO_PAD503
+bit 1359 O 1 IO_PAD503 1358 1 Z
+bit 1358 C 1 *
+bit 1357 I 1 IO_PAD502
+bit 1356 O 1 IO_PAD502 1355 1 Z
+bit 1355 C 1 *
+bit 1354 I 1 IO_PAD500
+bit 1353 O 1 IO_PAD500 1352 1 Z
+bit 1352 C 1 *
+bit 1351 I 1 IO_PAD499
+bit 1350 O 1 IO_PAD499 1349 1 Z
+bit 1349 C 1 *
+bit 1348 I 1 IO_PAD498
+bit 1347 O 1 IO_PAD498 1346 1 Z
+bit 1346 C 1 *
+bit 1345 I 1 IO_PAD497
+bit 1344 O 1 IO_PAD497 1343 1 Z
+bit 1343 C 1 *
+bit 1342 I 1 IO_PAD496
+bit 1341 O 1 IO_PAD496 1340 1 Z
+bit 1340 C 1 *
+bit 1339 I 1 IO_PAD494
+bit 1338 O 1 IO_PAD494 1337 1 Z
+bit 1337 C 1 *
+bit 1336 I 1 IO_PAD493
+bit 1335 O 1 IO_PAD493 1334 1 Z
+bit 1334 C 1 *
+bit 1333 I 1 IO_PAD492
+bit 1332 O 1 IO_PAD492 1331 1 Z
+bit 1331 C 1 *
+bit 1330 I 1 IO_PAD490
+bit 1329 O 1 IO_PAD490 1328 1 Z
+bit 1328 C 1 *
+bit 1327 I 1 IO_PAD488
+bit 1326 O 1 IO_PAD488 1325 1 Z
+bit 1325 C 1 *
+bit 1324 I 1 IO_PAD487
+bit 1323 O 1 IO_PAD487 1322 1 Z
+bit 1322 C 1 *
+bit 1321 I 1 IO_PAD486
+bit 1320 O 1 IO_PAD486 1319 1 Z
+bit 1319 C 1 *
+bit 1318 I 1 IO_PAD485
+bit 1317 O 1 IO_PAD485 1316 1 Z
+bit 1316 C 1 *
+bit 1315 I 1 IO_PAD484
+bit 1314 O 1 IO_PAD484 1313 1 Z
+bit 1313 C 1 *
+bit 1312 I 1 IO_PAD482
+bit 1311 O 1 IO_PAD482 1310 1 Z
+bit 1310 C 1 *
+bit 1309 I 1 IO_PAD480
+bit 1308 O 1 IO_PAD480 1307 1 Z
+bit 1307 C 1 *
+bit 1306 I 1 IO_PAD478
+bit 1305 O 1 IO_PAD478 1304 1 Z
+bit 1304 C 1 *
+bit 1303 I 1 IO_PAD476
+bit 1302 O 1 IO_PAD476 1301 1 Z
+bit 1301 C 1 *
+bit 1300 I 1 IO_PAD475
+bit 1299 O 1 IO_PAD475 1298 1 Z
+bit 1298 C 1 *
+bit 1297 I 1 IO_PAD474
+bit 1296 O 1 IO_PAD474 1295 1 Z
+bit 1295 C 1 *
+bit 1294 I 1 IO_PAD472
+bit 1293 O 1 IO_PAD472 1292 1 Z
+bit 1292 C 1 *
+bit 1291 I 1 IO_PAD471
+bit 1290 O 1 IO_PAD471 1289 1 Z
+bit 1289 C 1 *
+bit 1288 I 1 IO_PAD470
+bit 1287 O 1 IO_PAD470 1286 1 Z
+bit 1286 C 1 *
+bit 1285 I 1 IO_PAD468
+bit 1284 O 1 IO_PAD468 1283 1 Z
+bit 1283 C 1 *
+bit 1282 I 1 IO_PAD466
+bit 1281 O 1 IO_PAD466 1280 1 Z
+bit 1280 C 1 *
+bit 1279 I 1 IO_PAD465
+bit 1278 O 1 IO_PAD465 1277 1 Z
+bit 1277 C 1 *
+bit 1276 I 1 IO_PAD464
+bit 1275 O 1 IO_PAD464 1274 1 Z
+bit 1274 C 1 *
+bit 1273 I 1 IO_PAD463
+bit 1272 O 1 IO_PAD463 1271 1 Z
+bit 1271 C 1 *
+bit 1270 I 1 IO_PAD462
+bit 1269 O 1 IO_PAD462 1268 1 Z
+bit 1268 C 1 *
+bit 1267 I 1 IO_PAD461
+bit 1266 O 1 IO_PAD461 1265 1 Z
+bit 1265 C 1 *
+bit 1264 I 1 IO_PAD460
+bit 1263 O 1 IO_PAD460 1262 1 Z
+bit 1262 C 1 *
+bit 1261 I 1 IO_PAD458
+bit 1260 O 1 IO_PAD458 1259 1 Z
+bit 1259 C 1 *
+bit 1258 I 1 IO_PAD456
+bit 1257 O 1 IO_PAD456 1256 1 Z
+bit 1256 C 1 *
+bit 1255 I 1 IO_PAD455
+bit 1254 O 1 IO_PAD455 1253 1 Z
+bit 1253 C 1 *
+bit 1252 I 1 IO_PAD454
+bit 1251 O 1 IO_PAD454 1250 1 Z
+bit 1250 C 1 *
+bit 1249 I 1 IO_PAD453
+bit 1248 O 1 IO_PAD453 1247 1 Z
+bit 1247 C 1 *
+bit 1246 I 1 IO_PAD452
+bit 1245 O 1 IO_PAD452 1244 1 Z
+bit 1244 C 1 *
+bit 1243 I 1 IO_PAD450
+bit 1242 O 1 IO_PAD450 1241 1 Z
+bit 1241 C 1 *
+bit 1240 I 1 IO_PAD448
+bit 1239 O 1 IO_PAD448 1238 1 Z
+bit 1238 C 1 *
+bit 1237 I 1 IO_PAD446
+bit 1236 O 1 IO_PAD446 1235 1 Z
+bit 1235 C 1 *
+bit 1234 I 1 IO_PAD444
+bit 1233 O 1 IO_PAD444 1232 1 Z
+bit 1232 C 1 *
+bit 1231 I 1 IO_PAD443
+bit 1230 O 1 IO_PAD443 1229 1 Z
+bit 1229 C 1 *
+bit 1228 I 1 IO_PAD442
+bit 1227 O 1 IO_PAD442 1226 1 Z
+bit 1226 C 1 *
+bit 1225 I 1 IO_PAD440
+bit 1224 O 1 IO_PAD440 1223 1 Z
+bit 1223 C 1 *
+bit 1222 I 1 IO_PAD439
+bit 1221 O 1 IO_PAD439 1220 1 Z
+bit 1220 C 1 *
+bit 1219 I 1 IO_PAD438
+bit 1218 O 1 IO_PAD438 1217 1 Z
+bit 1217 C 1 *
+bit 1216 I 1 IO_PAD436
+bit 1215 O 1 IO_PAD436 1214 1 Z
+bit 1214 C 1 *
+bit 1213 I 1 IO_PAD434
+bit 1212 O 1 IO_PAD434 1211 1 Z
+bit 1211 C 1 *
+bit 1210 I 1 IO_PAD433
+bit 1209 O 1 IO_PAD433 1208 1 Z
+bit 1208 C 1 *
+bit 1207 I 1 IO_PAD432
+bit 1206 O 1 IO_PAD432 1205 1 Z
+bit 1205 C 1 *
+bit 1204 I 1 IO_PAD430
+bit 1203 O 1 IO_PAD430 1202 1 Z
+bit 1202 C 1 *
+bit 1201 I 1 IO_PAD429
+bit 1200 O 1 IO_PAD429 1199 1 Z
+bit 1199 C 1 *
+bit 1198 I 1 IO_PAD428
+bit 1197 O 1 IO_PAD428 1196 1 Z
+bit 1196 C 1 *
+bit 1195 I 1 IO_PAD426
+bit 1194 O 1 IO_PAD426 1193 1 Z
+bit 1193 C 1 *
+bit 1192 I 1 IO_PAD424
+bit 1191 O 1 IO_PAD424 1190 1 Z
+bit 1190 C 1 *
+bit 1189 I 1 IO_PAD423
+bit 1188 O 1 IO_PAD423 1187 1 Z
+bit 1187 C 1 *
+bit 1186 I 1 IO_PAD422
+bit 1185 O 1 IO_PAD422 1184 1 Z
+bit 1184 C 1 *
+bit 1183 I 1 IO_PAD420
+bit 1182 O 1 IO_PAD420 1181 1 Z
+bit 1181 C 1 *
+bit 1180 I 1 IO_PAD419
+bit 1179 O 1 IO_PAD419 1178 1 Z
+bit 1178 C 1 *
+bit 1177 I 1 IO_PAD418
+bit 1176 O 1 IO_PAD418 1175 1 Z
+bit 1175 C 1 *
+bit 1174 I 1 IO_PAD416
+bit 1173 O 1 IO_PAD416 1172 1 Z
+bit 1172 C 1 *
+bit 1171 I 1 IO_PAD414
+bit 1170 O 1 IO_PAD414 1169 1 Z
+bit 1169 C 1 *
+bit 1168 I 1 IO_PAD412
+bit 1167 O 1 IO_PAD412 1166 1 Z
+bit 1166 C 1 *
+bit 1165 I 1 IO_PAD410
+bit 1164 O 1 IO_PAD410 1163 1 Z
+bit 1163 C 1 *
+bit 1162 I 1 IO_PAD409
+bit 1161 O 1 IO_PAD409 1160 1 Z
+bit 1160 C 1 *
+bit 1159 I 1 IO_PAD408
+bit 1158 O 1 IO_PAD408 1157 1 Z
+bit 1157 C 1 *
+bit 1156 I 1 IO_PAD407
+bit 1155 O 1 IO_PAD407 1154 1 Z
+bit 1154 C 1 *
+bit 1153 I 1 IO_PAD406
+bit 1152 O 1 IO_PAD406 1151 1 Z
+bit 1151 C 1 *
+bit 1150 I 1 IO_PAD404
+bit 1149 O 1 IO_PAD404 1148 1 Z
+bit 1148 C 1 *
+bit 1147 I 1 IO_PAD402
+bit 1146 O 1 IO_PAD402 1145 1 Z
+bit 1145 C 1 *
+bit 1144 I 1 IO_PAD401
+bit 1143 O 1 IO_PAD401 1142 1 Z
+bit 1142 C 1 *
+bit 1141 I 1 IO_PAD400
+bit 1140 O 1 IO_PAD400 1139 1 Z
+bit 1139 C 1 *
+bit 1138 I 1 IO_PAD399
+bit 1137 O 1 IO_PAD399 1136 1 Z
+bit 1136 C 1 *
+bit 1135 I 1 IO_PAD398
+bit 1134 O 1 IO_PAD398 1133 1 Z
+bit 1133 C 1 *
+bit 1132 I 1 IO_PAD397
+bit 1131 O 1 IO_PAD397 1130 1 Z
+bit 1130 C 1 *
+bit 1129 I 1 IO_PAD396
+bit 1128 O 1 IO_PAD396 1127 1 Z
+bit 1127 C 1 *
+bit 1126 I 1 IO_PAD394
+bit 1125 O 1 IO_PAD394 1124 1 Z
+bit 1124 C 1 *
+bit 1123 I 1 IO_PAD392
+bit 1122 O 1 IO_PAD392 1121 1 Z
+bit 1121 C 1 *
+bit 1120 I 1 IO_PAD391
+bit 1119 O 1 IO_PAD391 1118 1 Z
+bit 1118 C 1 *
+bit 1117 I 1 IO_PAD390
+bit 1116 O 1 IO_PAD390 1115 1 Z
+bit 1115 C 1 *
+bit 1114 I 1 IO_PAD388
+bit 1113 O 1 IO_PAD388 1112 1 Z
+bit 1112 C 1 *
+bit 1111 I 1 IO_PAD387
+bit 1110 O 1 IO_PAD387 1109 1 Z
+bit 1109 C 1 *
+bit 1108 I 1 IO_PAD386
+bit 1107 O 1 IO_PAD386 1106 1 Z
+bit 1106 C 1 *
+bit 1105 I 1 IO_PAD384
+bit 1104 O 1 IO_PAD384 1103 1 Z
+bit 1103 C 1 *
+bit 1102 I 1 IO_PAD382
+bit 1101 O 1 IO_PAD382 1100 1 Z
+bit 1100 C 1 *
+bit 1099 I 1 IO_PAD380
+bit 1098 O 1 IO_PAD380 1097 1 Z
+bit 1097 C 1 *
+bit 1096 I 1 IO_PAD378
+bit 1095 O 1 IO_PAD378 1094 1 Z
+bit 1094 C 1 *
+bit 1093 I 1 IO_PAD377
+bit 1092 O 1 IO_PAD377 1091 1 Z
+bit 1091 C 1 *
+bit 1090 I 1 IO_PAD376
+bit 1089 O 1 IO_PAD376 1088 1 Z
+bit 1088 C 1 *
+bit 1087 I 1 IO_PAD375
+bit 1086 O 1 IO_PAD375 1085 1 Z
+bit 1085 C 1 *
+bit 1084 I 1 IO_PAD374
+bit 1083 O 1 IO_PAD374 1082 1 Z
+bit 1082 C 1 *
+bit 1081 I 1 IO_PAD372
+bit 1080 O 1 IO_PAD372 1079 1 Z
+bit 1079 C 1 *
+bit 1078 I 1 IO_PAD370
+bit 1077 O 1 IO_PAD370 1076 1 Z
+bit 1076 C 1 *
+bit 1075 I 1 IO_PAD369
+bit 1074 O 1 IO_PAD369 1073 1 Z
+bit 1073 C 1 *
+bit 1072 I 1 IO_PAD368
+bit 1071 O 1 IO_PAD368 1070 1 Z
+bit 1070 C 1 *
+bit 1069 I 1 IO_PAD366
+bit 1068 O 1 IO_PAD366 1067 1 Z
+bit 1067 C 1 *
+bit 1066 I 1 IO_PAD365
+bit 1065 O 1 IO_PAD365 1064 1 Z
+bit 1064 C 1 *
+bit 1063 I 1 IO_PAD364
+bit 1062 O 1 IO_PAD364 1061 1 Z
+bit 1061 C 1 *
+bit 1060 I 1 IO_PAD363
+bit 1059 O 1 IO_PAD363 1058 1 Z
+bit 1058 C 1 *
+bit 1057 I 1 IO_PAD362
+bit 1056 O 1 IO_PAD362 1055 1 Z
+bit 1055 C 1 *
+bit 1054 I 1 IO_PAD360
+bit 1053 O 1 IO_PAD360 1052 1 Z
+bit 1052 C 1 *
+bit 1051 I 1 IO_PAD359
+bit 1050 O 1 IO_PAD359 1049 1 Z
+bit 1049 C 1 *
+bit 1048 I 1 IO_PAD358
+bit 1047 O 1 IO_PAD358 1046 1 Z
+bit 1046 C 1 *
+bit 1045 I 1 IO_PAD356
+bit 1044 O 1 IO_PAD356 1043 1 Z
+bit 1043 C 1 *
+bit 1042 I 1 IO_PAD355
+bit 1041 O 1 IO_PAD355 1040 1 Z
+bit 1040 C 1 *
+bit 1039 I 1 IO_PAD354
+bit 1038 O 1 IO_PAD354 1037 1 Z
+bit 1037 C 1 *
+bit 1036 I 1 IO_PAD352
+bit 1035 O 1 IO_PAD352 1034 1 Z
+bit 1034 C 1 *
+bit 1033 I 1 IO_PAD350
+bit 1032 O 1 IO_PAD350 1031 1 Z
+bit 1031 C 1 *
+bit 1030 I 1 IO_PAD348
+bit 1029 O 1 IO_PAD348 1028 1 Z
+bit 1028 C 1 *
+bit 1027 I 1 IO_PAD346
+bit 1026 O 1 IO_PAD346 1025 1 Z
+bit 1025 C 1 *
+bit 1024 I 1 IO_PAD345
+bit 1023 O 1 IO_PAD345 1022 1 Z
+bit 1022 C 1 *
+bit 1021 I 1 IO_PAD344
+bit 1020 O 1 IO_PAD344 1019 1 Z
+bit 1019 C 1 *
+bit 1018 I 1 IO_PAD343
+bit 1017 O 1 IO_PAD343 1016 1 Z
+bit 1016 C 1 *
+bit 1015 I 1 IO_PAD342
+bit 1014 O 1 IO_PAD342 1013 1 Z
+bit 1013 C 1 *
+bit 1012 I 1 IO_PAD340
+bit 1011 O 1 IO_PAD340 1010 1 Z
+bit 1010 C 1 *
+bit 1009 I 1 IO_PAD338
+bit 1008 O 1 IO_PAD338 1007 1 Z
+bit 1007 C 1 *
+bit 1006 I 1 IO_PAD337
+bit 1005 O 1 IO_PAD337 1004 1 Z
+bit 1004 C 1 *
+bit 1003 I 1 IO_PAD336
+bit 1002 O 1 IO_PAD336 1001 1 Z
+bit 1001 C 1 *
+bit 1000 I 1 IO_PAD335
+bit 999 O 1 IO_PAD335 998 1 Z
+bit 998 C 1 *
+bit 997 I 1 IO_PAD334
+bit 996 O 1 IO_PAD334 995 1 Z
+bit 995 C 1 *
+bit 994 I 1 IO_PAD332
+bit 993 O 1 IO_PAD332 992 1 Z
+bit 992 C 1 *
+bit 991 I 1 IO_PAD331
+bit 990 O 1 IO_PAD331 989 1 Z
+bit 989 C 1 *
+bit 988 I 1 IO_PAD330
+bit 987 O 1 IO_PAD330 986 1 Z
+bit 986 C 1 *
+bit 985 I 1 IO_PAD328
+bit 984 O 1 IO_PAD328 983 1 Z
+bit 983 C 1 *
+bit 982 I 1 IO_PAD327
+bit 981 O 1 IO_PAD327 980 1 Z
+bit 980 C 1 *
+bit 979 I 1 IO_PAD326
+bit 978 O 1 IO_PAD326 977 1 Z
+bit 977 C 1 *
+bit 976 I 1 IO_PAD324
+bit 975 O 1 IO_PAD324 974 1 Z
+bit 974 C 1 *
+bit 973 I 1 IO_PAD323
+bit 972 O 1 IO_PAD323 971 1 Z
+bit 971 C 1 *
+bit 970 I 1 IO_PAD322
+bit 969 O 1 IO_PAD322 968 1 Z
+bit 968 C 1 *
+bit 967 I 1 IO_PAD321
+bit 966 O 1 IO_PAD321 965 1 Z
+bit 965 C 1 *
+bit 964 I 1 M2_PAD320
+bit 963 I 1 M0_PAD319
+bit 962 I 1 M1_PAD318
+bit 961 I 1 IO_PAD316
+bit 960 O 1 IO_PAD316 959 1 Z
+bit 959 C 1 *
+bit 958 I 1 IO_PAD315
+bit 957 O 1 IO_PAD315 956 1 Z
+bit 956 C 1 *
+bit 955 I 1 IO_PAD314
+bit 954 O 1 IO_PAD314 953 1 Z
+bit 953 C 1 *
+bit 952 I 1 IO_PAD312
+bit 951 O 1 IO_PAD312 950 1 Z
+bit 950 C 1 *
+bit 949 I 1 IO_PAD311
+bit 948 O 1 IO_PAD311 947 1 Z
+bit 947 C 1 *
+bit 946 I 1 IO_PAD310
+bit 945 O 1 IO_PAD310 944 1 Z
+bit 944 C 1 *
+bit 943 I 1 IO_PAD309
+bit 942 O 1 IO_PAD309 941 1 Z
+bit 941 C 1 *
+bit 940 I 1 IO_PAD308
+bit 939 O 1 IO_PAD308 938 1 Z
+bit 938 C 1 *
+bit 937 I 1 IO_PAD306
+bit 936 O 1 IO_PAD306 935 1 Z
+bit 935 C 1 *
+bit 934 I 1 IO_PAD304
+bit 933 O 1 IO_PAD304 932 1 Z
+bit 932 C 1 *
+bit 931 I 1 IO_PAD303
+bit 930 O 1 IO_PAD303 929 1 Z
+bit 929 C 1 *
+bit 928 I 1 IO_PAD302
+bit 927 O 1 IO_PAD302 926 1 Z
+bit 926 C 1 *
+bit 925 I 1 IO_PAD301
+bit 924 O 1 IO_PAD301 923 1 Z
+bit 923 C 1 *
+bit 922 I 1 IO_PAD300
+bit 921 O 1 IO_PAD300 920 1 Z
+bit 920 C 1 *
+bit 919 I 1 IO_PAD298
+bit 918 O 1 IO_PAD298 917 1 Z
+bit 917 C 1 *
+bit 916 I 1 IO_PAD296
+bit 915 O 1 IO_PAD296 914 1 Z
+bit 914 C 1 *
+bit 913 I 1 IO_PAD294
+bit 912 O 1 IO_PAD294 911 1 Z
+bit 911 C 1 *
+bit 910 I 1 IO_PAD292
+bit 909 O 1 IO_PAD292 908 1 Z
+bit 908 C 1 *
+bit 907 I 1 IO_PAD291
+bit 906 O 1 IO_PAD291 905 1 Z
+bit 905 C 1 *
+bit 904 I 1 IO_PAD290
+bit 903 O 1 IO_PAD290 902 1 Z
+bit 902 C 1 *
+bit 901 I 1 IO_PAD288
+bit 900 O 1 IO_PAD288 899 1 Z
+bit 899 C 1 *
+bit 898 I 1 IO_PAD286
+bit 897 O 1 IO_PAD286 896 1 Z
+bit 896 C 1 *
+bit 895 I 1 IO_PAD285
+bit 894 O 1 IO_PAD285 893 1 Z
+bit 893 C 1 *
+bit 892 I 1 IO_PAD284
+bit 891 O 1 IO_PAD284 890 1 Z
+bit 890 C 1 *
+bit 889 I 1 IO_PAD283
+bit 888 O 1 IO_PAD283 887 1 Z
+bit 887 C 1 *
+bit 886 I 1 IO_PAD282
+bit 885 O 1 IO_PAD282 884 1 Z
+bit 884 C 1 *
+bit 883 I 1 IO_PAD280
+bit 882 O 1 IO_PAD280 881 1 Z
+bit 881 C 1 *
+bit 880 I 1 IO_PAD279
+bit 879 O 1 IO_PAD279 878 1 Z
+bit 878 C 1 *
+bit 877 I 1 IO_PAD278
+bit 876 O 1 IO_PAD278 875 1 Z
+bit 875 C 1 *
+bit 874 I 1 IO_PAD277
+bit 873 O 1 IO_PAD277 872 1 Z
+bit 872 C 1 *
+bit 871 I 1 IO_PAD276
+bit 870 O 1 IO_PAD276 869 1 Z
+bit 869 C 1 *
+bit 868 I 1 IO_PAD274
+bit 867 O 1 IO_PAD274 866 1 Z
+bit 866 C 1 *
+bit 865 I 1 IO_PAD273
+bit 864 O 1 IO_PAD273 863 1 Z
+bit 863 C 1 *
+bit 862 I 1 IO_PAD272
+bit 861 O 1 IO_PAD272 860 1 Z
+bit 860 C 1 *
+bit 859 O 1 *
+bit 858 O 1 *
+bit 857 O 1 *
+bit 856 O 1 *
+bit 855 O 1 *
+bit 854 O 1 *
+bit 853 I 1 IO_PAD270
+bit 852 O 1 IO_PAD270 851 1 Z
+bit 851 C 1 *
+bit 850 I 1 IO_PAD268
+bit 849 O 1 IO_PAD268 848 1 Z
+bit 848 C 1 *
+bit 847 I 1 IO_PAD267
+bit 846 O 1 IO_PAD267 845 1 Z
+bit 845 C 1 *
+bit 844 I 1 IO_PAD266
+bit 843 O 1 IO_PAD266 842 1 Z
+bit 842 C 1 *
+bit 841 I 1 IO_PAD265
+bit 840 O 1 IO_PAD265 839 1 Z
+bit 839 C 1 *
+bit 838 I 1 IO_PAD264
+bit 837 O 1 IO_PAD264 836 1 Z
+bit 836 C 1 *
+bit 835 I 1 IO_PAD262
+bit 834 O 1 IO_PAD262 833 1 Z
+bit 833 C 1 *
+bit 832 I 1 IO_PAD260
+bit 831 O 1 IO_PAD260 830 1 Z
+bit 830 C 1 *
+bit 829 I 1 IO_PAD258
+bit 828 O 1 IO_PAD258 827 1 Z
+bit 827 C 1 *
+bit 826 I 1 IO_PAD256
+bit 825 O 1 IO_PAD256 824 1 Z
+bit 824 C 1 *
+bit 823 I 1 IO_PAD255
+bit 822 O 1 IO_PAD255 821 1 Z
+bit 821 C 1 *
+bit 820 I 1 IO_PAD254
+bit 819 O 1 IO_PAD254 818 1 Z
+bit 818 C 1 *
+bit 817 O 1 *
+bit 816 O 1 *
+bit 815 O 1 *
+bit 814 O 1 *
+bit 813 O 1 *
+bit 812 O 1 *
+bit 811 I 1 IO_PAD252
+bit 810 O 1 IO_PAD252 809 1 Z
+bit 809 C 1 *
+bit 808 I 1 IO_PAD250
+bit 807 O 1 IO_PAD250 806 1 Z
+bit 806 C 1 *
+bit 805 I 1 IO_PAD249
+bit 804 O 1 IO_PAD249 803 1 Z
+bit 803 C 1 *
+bit 802 I 1 IO_PAD248
+bit 801 O 1 IO_PAD248 800 1 Z
+bit 800 C 1 *
+bit 799 I 1 IO_PAD247
+bit 798 O 1 IO_PAD247 797 1 Z
+bit 797 C 1 *
+bit 796 I 1 IO_PAD246
+bit 795 O 1 IO_PAD246 794 1 Z
+bit 794 C 1 *
+bit 793 I 1 IO_PAD245
+bit 792 O 1 IO_PAD245 791 1 Z
+bit 791 C 1 *
+bit 790 I 1 IO_PAD244
+bit 789 O 1 IO_PAD244 788 1 Z
+bit 788 C 1 *
+bit 787 O 1 *
+bit 786 O 1 *
+bit 785 O 1 *
+bit 784 O 1 *
+bit 783 O 1 *
+bit 782 O 1 *
+bit 781 I 1 IO_PAD242
+bit 780 O 1 IO_PAD242 779 1 Z
+bit 779 C 1 *
+bit 778 I 1 IO_PAD240
+bit 777 O 1 IO_PAD240 776 1 Z
+bit 776 C 1 *
+bit 775 I 1 IO_PAD239
+bit 774 O 1 IO_PAD239 773 1 Z
+bit 773 C 1 *
+bit 772 I 1 IO_PAD238
+bit 771 O 1 IO_PAD238 770 1 Z
+bit 770 C 1 *
+bit 769 I 1 IO_PAD237
+bit 768 O 1 IO_PAD237 767 1 Z
+bit 767 C 1 *
+bit 766 I 1 IO_PAD236
+bit 765 O 1 IO_PAD236 764 1 Z
+bit 764 C 1 *
+bit 763 I 1 IO_PAD234
+bit 762 O 1 IO_PAD234 761 1 Z
+bit 761 C 1 *
+bit 760 I 1 IO_PAD232
+bit 759 O 1 IO_PAD232 758 1 Z
+bit 758 C 1 *
+bit 757 I 1 IO_PAD230
+bit 756 O 1 IO_PAD230 755 1 Z
+bit 755 C 1 *
+bit 754 I 1 IO_PAD228
+bit 753 O 1 IO_PAD228 752 1 Z
+bit 752 C 1 *
+bit 751 O 1 *
+bit 750 O 1 *
+bit 749 O 1 *
+bit 748 O 1 *
+bit 747 O 1 *
+bit 746 O 1 *
+bit 745 I 1 IO_PAD227
+bit 744 O 1 IO_PAD227 743 1 Z
+bit 743 C 1 *
+bit 742 I 1 IO_PAD226
+bit 741 O 1 IO_PAD226 740 1 Z
+bit 740 C 1 *
+bit 739 I 1 IO_PAD224
+bit 738 O 1 IO_PAD224 737 1 Z
+bit 737 C 1 *
+bit 736 I 1 IO_PAD223
+bit 735 O 1 IO_PAD223 734 1 Z
+bit 734 C 1 *
+bit 733 I 1 IO_PAD222
+bit 732 O 1 IO_PAD222 731 1 Z
+bit 731 C 1 *
+bit 730 I 1 IO_PAD220
+bit 729 O 1 IO_PAD220 728 1 Z
+bit 728 C 1 *
+bit 727 I 1 IO_PAD218
+bit 726 O 1 IO_PAD218 725 1 Z
+bit 725 C 1 *
+bit 724 I 1 IO_PAD217
+bit 723 O 1 IO_PAD217 722 1 Z
+bit 722 C 1 *
+bit 721 I 1 IO_PAD215
+bit 720 O 1 IO_PAD215 719 1 Z
+bit 719 C 1 *
+bit 718 I 1 IO_PAD214
+bit 717 O 1 IO_PAD214 716 1 Z
+bit 716 C 1 *
+bit 715 I 1 IO_PAD212
+bit 714 O 1 IO_PAD212 713 1 Z
+bit 713 C 1 *
+bit 712 I 1 IO_PAD210
+bit 711 O 1 IO_PAD210 710 1 Z
+bit 710 C 1 *
+bit 709 I 1 IO_PAD209
+bit 708 O 1 IO_PAD209 707 1 Z
+bit 707 C 1 *
+bit 706 I 1 IO_PAD208
+bit 705 O 1 IO_PAD208 704 1 Z
+bit 704 C 1 *
+bit 703 I 1 IO_PAD206
+bit 702 O 1 IO_PAD206 701 1 Z
+bit 701 C 1 *
+bit 700 I 1 IO_PAD205
+bit 699 O 1 IO_PAD205 698 1 Z
+bit 698 C 1 *
+bit 697 O 1 *
+bit 696 O 1 *
+bit 695 O 1 *
+bit 694 O 1 *
+bit 693 O 1 *
+bit 692 O 1 *
+bit 691 I 1 IO_PAD204
+bit 690 O 1 IO_PAD204 689 1 Z
+bit 689 C 1 *
+bit 688 I 1 IO_PAD202
+bit 687 O 1 IO_PAD202 686 1 Z
+bit 686 C 1 *
+bit 685 I 1 IO_PAD200
+bit 684 O 1 IO_PAD200 683 1 Z
+bit 683 C 1 *
+bit 682 I 1 IO_PAD198
+bit 681 O 1 IO_PAD198 680 1 Z
+bit 680 C 1 *
+bit 679 I 1 IO_PAD196
+bit 678 O 1 IO_PAD196 677 1 Z
+bit 677 C 1 *
+bit 676 I 1 IO_PAD195
+bit 675 O 1 IO_PAD195 674 1 Z
+bit 674 C 1 *
+bit 673 I 1 IO_PAD194
+bit 672 O 1 IO_PAD194 671 1 Z
+bit 671 C 1 *
+bit 670 I 1 IO_PAD193
+bit 669 O 1 IO_PAD193 668 1 Z
+bit 668 C 1 *
+bit 667 I 1 IO_PAD192
+bit 666 O 1 IO_PAD192 665 1 Z
+bit 665 C 1 *
+bit 664 I 1 IO_PAD190
+bit 663 O 1 IO_PAD190 662 1 Z
+bit 662 C 1 *
+bit 661 O 1 *
+bit 660 O 1 *
+bit 659 O 1 *
+bit 658 O 1 *
+bit 657 O 1 *
+bit 656 O 1 *
+bit 655 I 1 IO_PAD188
+bit 654 O 1 IO_PAD188 653 1 Z
+bit 653 C 1 *
+bit 652 I 1 IO_PAD187
+bit 651 O 1 IO_PAD187 650 1 Z
+bit 650 C 1 *
+bit 649 I 1 IO_PAD186
+bit 648 O 1 IO_PAD186 647 1 Z
+bit 647 C 1 *
+bit 646 I 1 IO_PAD185
+bit 645 O 1 IO_PAD185 644 1 Z
+bit 644 C 1 *
+bit 643 I 1 IO_PAD184
+bit 642 O 1 IO_PAD184 641 1 Z
+bit 641 C 1 *
+bit 640 I 1 IO_PAD183
+bit 639 O 1 IO_PAD183 638 1 Z
+bit 638 C 1 *
+bit 637 I 1 IO_PAD182
+bit 636 O 1 IO_PAD182 635 1 Z
+bit 635 C 1 *
+bit 634 I 1 IO_PAD180
+bit 633 O 1 IO_PAD180 632 1 Z
+bit 632 C 1 *
+bit 631 O 1 *
+bit 630 O 1 *
+bit 629 O 1 *
+bit 628 O 1 *
+bit 627 O 1 *
+bit 626 O 1 *
+bit 625 I 1 IO_PAD178
+bit 624 O 1 IO_PAD178 623 1 Z
+bit 623 C 1 *
+bit 622 I 1 IO_PAD177
+bit 621 O 1 IO_PAD177 620 1 Z
+bit 620 C 1 *
+bit 619 I 1 IO_PAD176
+bit 618 O 1 IO_PAD176 617 1 Z
+bit 617 C 1 *
+bit 616 I 1 IO_PAD174
+bit 615 O 1 IO_PAD174 614 1 Z
+bit 614 C 1 *
+bit 613 I 1 IO_PAD172
+bit 612 O 1 IO_PAD172 611 1 Z
+bit 611 C 1 *
+bit 610 I 1 IO_PAD170
+bit 609 O 1 IO_PAD170 608 1 Z
+bit 608 C 1 *
+bit 607 I 1 IO_PAD168
+bit 606 O 1 IO_PAD168 605 1 Z
+bit 605 C 1 *
+bit 604 I 1 IO_PAD167
+bit 603 O 1 IO_PAD167 602 1 Z
+bit 602 C 1 *
+bit 601 I 1 IO_PAD166
+bit 600 O 1 IO_PAD166 599 1 Z
+bit 599 C 1 *
+bit 598 I 1 IO_PAD165
+bit 597 O 1 IO_PAD165 596 1 Z
+bit 596 C 1 *
+bit 595 I 1 IO_PAD164
+bit 594 O 1 IO_PAD164 593 1 Z
+bit 593 C 1 *
+bit 592 I 1 IO_PAD162
+bit 591 O 1 IO_PAD162 590 1 Z
+bit 590 C 1 *
+bit 589 O 1 *
+bit 588 O 1 *
+bit 587 O 1 *
+bit 586 O 1 *
+bit 585 O 1 *
+bit 584 O 1 *
+bit 583 I 1 IO_PAD160
+bit 582 O 1 IO_PAD160 581 1 Z
+bit 581 C 1 *
+bit 580 I 1 IO_PAD159
+bit 579 O 1 IO_PAD159 578 1 Z
+bit 578 C 1 *
+bit 577 I 1 IO_PAD158
+bit 576 O 1 IO_PAD158 575 1 Z
+bit 575 C 1 *
+bit 574 I 1 IO_PAD156
+bit 573 O 1 IO_PAD156 572 1 Z
+bit 572 C 1 *
+bit 571 I 1 IO_PAD155
+bit 570 O 1 IO_PAD155 569 1 Z
+bit 569 C 1 *
+bit 568 I 1 IO_PAD154
+bit 567 O 1 IO_PAD154 566 1 Z
+bit 566 C 1 *
+bit 565 I 1 IO_PAD153
+bit 564 O 1 IO_PAD153 563 1 Z
+bit 563 C 1 *
+bit 562 I 1 IO_PAD152
+bit 561 O 1 IO_PAD152 560 1 Z
+bit 560 C 1 *
+bit 559 I 1 IO_PAD150
+bit 558 O 1 IO_PAD150 557 1 Z
+bit 557 C 1 *
+bit 556 I 1 IO_PAD149
+bit 555 O 1 IO_PAD149 554 1 Z
+bit 554 C 1 *
+bit 553 I 1 IO_PAD148
+bit 552 O 1 IO_PAD148 551 1 Z
+bit 551 C 1 *
+bit 550 I 1 IO_PAD147
+bit 549 O 1 IO_PAD147 548 1 Z
+bit 548 C 1 *
+bit 547 I 1 IO_PAD146
+bit 546 O 1 IO_PAD146 545 1 Z
+bit 545 C 1 *
+bit 544 I 1 IO_PAD144
+bit 543 O 1 IO_PAD144 542 1 Z
+bit 542 C 1 *
+bit 541 I 1 IO_PAD142
+bit 540 O 1 IO_PAD142 539 1 Z
+bit 539 C 1 *
+bit 538 I 1 IO_PAD141
+bit 537 O 1 IO_PAD141 536 1 Z
+bit 536 C 1 *
+bit 535 I 1 IO_PAD140
+bit 534 O 1 IO_PAD140 533 1 Z
+bit 533 C 1 *
+bit 532 I 1 IO_PAD138
+bit 531 O 1 IO_PAD138 530 1 Z
+bit 530 C 1 *
+bit 529 I 1 IO_PAD136
+bit 528 O 1 IO_PAD136 527 1 Z
+bit 527 C 1 *
+bit 526 I 1 IO_PAD134
+bit 525 O 1 IO_PAD134 524 1 Z
+bit 524 C 1 *
+bit 523 I 1 IO_PAD132
+bit 522 O 1 IO_PAD132 521 1 Z
+bit 521 C 1 *
+bit 520 I 1 IO_PAD131
+bit 519 O 1 IO_PAD131 518 1 Z
+bit 518 C 1 *
+bit 517 I 1 IO_PAD130
+bit 516 O 1 IO_PAD130 515 1 Z
+bit 515 C 1 *
+bit 514 I 1 IO_PAD129
+bit 513 O 1 IO_PAD129 512 1 Z
+bit 512 C 1 *
+bit 511 I 1 IO_PAD128
+bit 510 O 1 IO_PAD128 509 1 Z
+bit 509 C 1 *
+bit 508 I 1 IO_PAD126
+bit 507 O 1 IO_PAD126 506 1 Z
+bit 506 C 1 *
+bit 505 I 1 IO_PAD124
+bit 504 O 1 IO_PAD124 503 1 Z
+bit 503 C 1 *
+bit 502 I 1 IO_PAD123
+bit 501 O 1 IO_PAD123 500 1 Z
+bit 500 C 1 *
+bit 499 I 1 IO_PAD122
+bit 498 O 1 IO_PAD122 497 1 Z
+bit 497 C 1 *
+bit 496 I 1 IO_PAD121
+bit 495 O 1 IO_PAD121 494 1 Z
+bit 494 C 1 *
+bit 493 I 1 IO_PAD120
+bit 492 O 1 IO_PAD120 491 1 Z
+bit 491 C 1 *
+bit 490 I 1 IO_PAD118
+bit 489 O 1 IO_PAD118 488 1 Z
+bit 488 C 1 *
+bit 487 I 1 IO_PAD117
+bit 486 O 1 IO_PAD117 485 1 Z
+bit 485 C 1 *
+bit 484 I 1 IO_PAD116
+bit 483 O 1 IO_PAD116 482 1 Z
+bit 482 C 1 *
+bit 481 O 1 *
+bit 480 I 1 HSWAP_EN_PAD112
+bit 479 I 1 IO_PAD111
+bit 478 O 1 IO_PAD111 477 1 Z
+bit 477 C 1 *
+bit 476 I 1 IO_PAD110
+bit 475 O 1 IO_PAD110 474 1 Z
+bit 474 C 1 *
+bit 473 I 1 IO_PAD109
+bit 472 O 1 IO_PAD109 471 1 Z
+bit 471 C 1 *
+bit 470 I 1 IO_PAD108
+bit 469 O 1 IO_PAD108 468 1 Z
+bit 468 C 1 *
+bit 467 I 1 IO_PAD106
+bit 466 O 1 IO_PAD106 465 1 Z
+bit 465 C 1 *
+bit 464 I 1 IO_PAD105
+bit 463 O 1 IO_PAD105 462 1 Z
+bit 462 C 1 *
+bit 461 I 1 IO_PAD104
+bit 460 O 1 IO_PAD104 459 1 Z
+bit 459 C 1 *
+bit 458 I 1 IO_PAD102
+bit 457 O 1 IO_PAD102 456 1 Z
+bit 456 C 1 *
+bit 455 I 1 IO_PAD101
+bit 454 O 1 IO_PAD101 453 1 Z
+bit 453 C 1 *
+bit 452 I 1 IO_PAD100
+bit 451 O 1 IO_PAD100 450 1 Z
+bit 450 C 1 *
+bit 449 I 1 IO_PAD98
+bit 448 O 1 IO_PAD98 447 1 Z
+bit 447 C 1 *
+bit 446 I 1 IO_PAD97
+bit 445 O 1 IO_PAD97 444 1 Z
+bit 444 C 1 *
+bit 443 I 1 IO_PAD96
+bit 442 O 1 IO_PAD96 441 1 Z
+bit 441 C 1 *
+bit 440 I 1 IO_PAD95
+bit 439 O 1 IO_PAD95 438 1 Z
+bit 438 C 1 *
+bit 437 I 1 IO_PAD94
+bit 436 O 1 IO_PAD94 435 1 Z
+bit 435 C 1 *
+bit 434 I 1 IO_PAD92
+bit 433 O 1 IO_PAD92 432 1 Z
+bit 432 C 1 *
+bit 431 I 1 IO_PAD90
+bit 430 O 1 IO_PAD90 429 1 Z
+bit 429 C 1 *
+bit 428 I 1 IO_PAD89
+bit 427 O 1 IO_PAD89 426 1 Z
+bit 426 C 1 *
+bit 425 I 1 IO_PAD88
+bit 424 O 1 IO_PAD88 423 1 Z
+bit 423 C 1 *
+bit 422 I 1 IO_PAD87
+bit 421 O 1 IO_PAD87 420 1 Z
+bit 420 C 1 *
+bit 419 I 1 IO_PAD86
+bit 418 O 1 IO_PAD86 417 1 Z
+bit 417 C 1 *
+bit 416 I 1 IO_PAD84
+bit 415 O 1 IO_PAD84 414 1 Z
+bit 414 C 1 *
+bit 413 I 1 IO_PAD82
+bit 412 O 1 IO_PAD82 411 1 Z
+bit 411 C 1 *
+bit 410 I 1 IO_PAD80
+bit 409 O 1 IO_PAD80 408 1 Z
+bit 408 C 1 *
+bit 407 I 1 IO_PAD78
+bit 406 O 1 IO_PAD78 405 1 Z
+bit 405 C 1 *
+bit 404 I 1 IO_PAD77
+bit 403 O 1 IO_PAD77 402 1 Z
+bit 402 C 1 *
+bit 401 I 1 IO_PAD76
+bit 400 O 1 IO_PAD76 399 1 Z
+bit 399 C 1 *
+bit 398 I 1 IO_PAD74
+bit 397 O 1 IO_PAD74 396 1 Z
+bit 396 C 1 *
+bit 395 I 1 IO_PAD73
+bit 394 O 1 IO_PAD73 393 1 Z
+bit 393 C 1 *
+bit 392 I 1 IO_PAD72
+bit 391 O 1 IO_PAD72 390 1 Z
+bit 390 C 1 *
+bit 389 I 1 IO_PAD70
+bit 388 O 1 IO_PAD70 387 1 Z
+bit 387 C 1 *
+bit 386 I 1 IO_PAD69
+bit 385 O 1 IO_PAD69 384 1 Z
+bit 384 C 1 *
+bit 383 I 1 IO_PAD68
+bit 382 O 1 IO_PAD68 381 1 Z
+bit 381 C 1 *
+bit 380 I 1 IO_PAD67
+bit 379 O 1 IO_PAD67 378 1 Z
+bit 378 C 1 *
+bit 377 I 1 IO_PAD66
+bit 376 O 1 IO_PAD66 375 1 Z
+bit 375 C 1 *
+bit 374 I 1 IO_PAD64
+bit 373 O 1 IO_PAD64 372 1 Z
+bit 372 C 1 *
+bit 371 I 1 IO_PAD63
+bit 370 O 1 IO_PAD63 369 1 Z
+bit 369 C 1 *
+bit 368 I 1 IO_PAD62
+bit 367 O 1 IO_PAD62 366 1 Z
+bit 366 C 1 *
+bit 365 I 1 IO_PAD60
+bit 364 O 1 IO_PAD60 363 1 Z
+bit 363 C 1 *
+bit 362 I 1 IO_PAD58
+bit 361 O 1 IO_PAD58 360 1 Z
+bit 360 C 1 *
+bit 359 I 1 IO_PAD57
+bit 358 O 1 IO_PAD57 357 1 Z
+bit 357 C 1 *
+bit 356 I 1 IO_PAD56
+bit 355 O 1 IO_PAD56 354 1 Z
+bit 354 C 1 *
+bit 353 I 1 IO_PAD55
+bit 352 O 1 IO_PAD55 351 1 Z
+bit 351 C 1 *
+bit 350 I 1 IO_PAD54
+bit 349 O 1 IO_PAD54 348 1 Z
+bit 348 C 1 *
+bit 347 I 1 IO_PAD52
+bit 346 O 1 IO_PAD52 345 1 Z
+bit 345 C 1 *
+bit 344 I 1 IO_PAD50
+bit 343 O 1 IO_PAD50 342 1 Z
+bit 342 C 1 *
+bit 341 I 1 IO_PAD48
+bit 340 O 1 IO_PAD48 339 1 Z
+bit 339 C 1 *
+bit 338 I 1 IO_PAD46
+bit 337 O 1 IO_PAD46 336 1 Z
+bit 336 C 1 *
+bit 335 I 1 IO_PAD45
+bit 334 O 1 IO_PAD45 333 1 Z
+bit 333 C 1 *
+bit 332 I 1 IO_PAD44
+bit 331 O 1 IO_PAD44 330 1 Z
+bit 330 C 1 *
+bit 329 I 1 IO_PAD42
+bit 328 O 1 IO_PAD42 327 1 Z
+bit 327 C 1 *
+bit 326 I 1 IO_PAD41
+bit 325 O 1 IO_PAD41 324 1 Z
+bit 324 C 1 *
+bit 323 I 1 IO_PAD40
+bit 322 O 1 IO_PAD40 321 1 Z
+bit 321 C 1 *
+bit 320 I 1 IO_PAD38
+bit 319 O 1 IO_PAD38 318 1 Z
+bit 318 C 1 *
+bit 317 I 1 IO_PAD36
+bit 316 O 1 IO_PAD36 315 1 Z
+bit 315 C 1 *
+bit 314 I 1 IO_PAD35
+bit 313 O 1 IO_PAD35 312 1 Z
+bit 312 C 1 *
+bit 311 I 1 IO_PAD34
+bit 310 O 1 IO_PAD34 309 1 Z
+bit 309 C 1 *
+bit 308 I 1 IO_PAD33
+bit 307 O 1 IO_PAD33 306 1 Z
+bit 306 C 1 *
+bit 305 I 1 IO_PAD32
+bit 304 O 1 IO_PAD32 303 1 Z
+bit 303 C 1 *
+bit 302 I 1 IO_PAD31
+bit 301 O 1 IO_PAD31 300 1 Z
+bit 300 C 1 *
+bit 299 I 1 IO_PAD30
+bit 298 O 1 IO_PAD30 297 1 Z
+bit 297 C 1 *
+bit 296 I 1 IO_PAD28
+bit 295 O 1 IO_PAD28 294 1 Z
+bit 294 C 1 *
+bit 293 I 1 IO_PAD26
+bit 292 O 1 IO_PAD26 291 1 Z
+bit 291 C 1 *
+bit 290 I 1 IO_PAD25
+bit 289 O 1 IO_PAD25 288 1 Z
+bit 288 C 1 *
+bit 287 I 1 IO_PAD24
+bit 286 O 1 IO_PAD24 285 1 Z
+bit 285 C 1 *
+bit 284 I 1 IO_PAD23
+bit 283 O 1 IO_PAD23 282 1 Z
+bit 282 C 1 *
+bit 281 I 1 IO_PAD22
+bit 280 O 1 IO_PAD22 279 1 Z
+bit 279 C 1 *
+bit 278 I 1 IO_PAD20
+bit 277 O 1 IO_PAD20 276 1 Z
+bit 276 C 1 *
+bit 275 I 1 IO_PAD18
+bit 274 O 1 IO_PAD18 273 1 Z
+bit 273 C 1 *
+bit 272 I 1 IO_PAD16
+bit 271 O 1 IO_PAD16 270 1 Z
+bit 270 C 1 *
+bit 269 I 1 IO_PAD14
+bit 268 O 1 IO_PAD14 267 1 Z
+bit 267 C 1 *
+bit 266 I 1 IO_PAD13
+bit 265 O 1 IO_PAD13 264 1 Z
+bit 264 C 1 *
+bit 263 I 1 IO_PAD12
+bit 262 O 1 IO_PAD12 261 1 Z
+bit 261 C 1 *
+bit 260 I 1 IO_PAD10
+bit 259 O 1 IO_PAD10 258 1 Z
+bit 258 C 1 *
+bit 257 I 1 IO_PAD9
+bit 256 O 1 IO_PAD9 255 1 Z
+bit 255 C 1 *
+bit 254 I 1 IO_PAD8
+bit 253 O 1 IO_PAD8 252 1 Z
+bit 252 C 1 *
+bit 251 I 1 IO_PAD6
+bit 250 O 1 IO_PAD6 249 1 Z
+bit 249 C 1 *
+bit 248 I 1 IO_PAD4
+bit 247 O 1 IO_PAD4 246 1 Z
+bit 246 C 1 *
+bit 245 I 1 IO_PAD3
+bit 244 O 1 IO_PAD3 243 1 Z
+bit 243 C 1 *
+bit 242 I 1 IO_PAD2
+bit 241 O 1 IO_PAD2 240 1 Z
+bit 240 C 1 *
+bit 239 I 1 IO_PAD861
+bit 238 O 1 IO_PAD861 237 1 Z
+bit 237 C 1 *
+bit 236 I 1 IO_PAD860
+bit 235 O 1 IO_PAD860 234 1 Z
+bit 234 C 1 *
+bit 233 I 1 IO_PAD859
+bit 232 O 1 IO_PAD859 231 1 Z
+bit 231 C 1 *
+bit 230 I 1 IO_PAD857
+bit 229 O 1 IO_PAD857 228 1 Z
+bit 228 C 1 *
+bit 227 I 1 IO_PAD855
+bit 226 O 1 IO_PAD855 225 1 Z
+bit 225 C 1 *
+bit 224 I 1 IO_PAD854
+bit 223 O 1 IO_PAD854 222 1 Z
+bit 222 C 1 *
+bit 221 I 1 IO_PAD853
+bit 220 O 1 IO_PAD853 219 1 Z
+bit 219 C 1 *
+bit 218 I 1 IO_PAD851
+bit 217 O 1 IO_PAD851 216 1 Z
+bit 216 C 1 *
+bit 215 I 1 IO_PAD850
+bit 214 O 1 IO_PAD850 213 1 Z
+bit 213 C 1 *
+bit 212 I 1 IO_PAD849
+bit 211 O 1 IO_PAD849 210 1 Z
+bit 210 C 1 *
+bit 209 I 1 IO_PAD847
+bit 208 O 1 IO_PAD847 207 1 Z
+bit 207 C 1 *
+bit 206 I 1 IO_PAD845
+bit 205 O 1 IO_PAD845 204 1 Z
+bit 204 C 1 *
+bit 203 I 1 IO_PAD843
+bit 202 O 1 IO_PAD843 201 1 Z
+bit 201 C 1 *
+bit 200 I 1 IO_PAD841
+bit 199 O 1 IO_PAD841 198 1 Z
+bit 198 C 1 *
+bit 197 I 1 IO_PAD840
+bit 196 O 1 IO_PAD840 195 1 Z
+bit 195 C 1 *
+bit 194 I 1 IO_PAD839
+bit 193 O 1 IO_PAD839 192 1 Z
+bit 192 C 1 *
+bit 191 I 1 IO_PAD838
+bit 190 O 1 IO_PAD838 189 1 Z
+bit 189 C 1 *
+bit 188 I 1 IO_PAD837
+bit 187 O 1 IO_PAD837 186 1 Z
+bit 186 C 1 *
+bit 185 I 1 IO_PAD835
+bit 184 O 1 IO_PAD835 183 1 Z
+bit 183 C 1 *
+bit 182 I 1 IO_PAD833
+bit 181 O 1 IO_PAD833 180 1 Z
+bit 180 C 1 *
+bit 179 I 1 IO_PAD832
+bit 178 O 1 IO_PAD832 177 1 Z
+bit 177 C 1 *
+bit 176 I 1 IO_PAD831
+bit 175 O 1 IO_PAD831 174 1 Z
+bit 174 C 1 *
+bit 173 I 1 IO_PAD830
+bit 172 O 1 IO_PAD830 171 1 Z
+bit 171 C 1 *
+bit 170 I 1 IO_PAD829
+bit 169 O 1 IO_PAD829 168 1 Z
+bit 168 C 1 *
+bit 167 I 1 IO_PAD828
+bit 166 O 1 IO_PAD828 165 1 Z
+bit 165 C 1 *
+bit 164 I 1 IO_PAD827
+bit 163 O 1 IO_PAD827 162 1 Z
+bit 162 C 1 *
+bit 161 I 1 IO_PAD825
+bit 160 O 1 IO_PAD825 159 1 Z
+bit 159 C 1 *
+bit 158 I 1 IO_PAD823
+bit 157 O 1 IO_PAD823 156 1 Z
+bit 156 C 1 *
+bit 155 I 1 IO_PAD822
+bit 154 O 1 IO_PAD822 153 1 Z
+bit 153 C 1 *
+bit 152 I 1 IO_PAD821
+bit 151 O 1 IO_PAD821 150 1 Z
+bit 150 C 1 *
+bit 149 I 1 IO_PAD819
+bit 148 O 1 IO_PAD819 147 1 Z
+bit 147 C 1 *
+bit 146 I 1 IO_PAD818
+bit 145 O 1 IO_PAD818 144 1 Z
+bit 144 C 1 *
+bit 143 I 1 IO_PAD817
+bit 142 O 1 IO_PAD817 141 1 Z
+bit 141 C 1 *
+bit 140 I 1 IO_PAD815
+bit 139 O 1 IO_PAD815 138 1 Z
+bit 138 C 1 *
+bit 137 I 1 IO_PAD813
+bit 136 O 1 IO_PAD813 135 1 Z
+bit 135 C 1 *
+bit 134 I 1 IO_PAD811
+bit 133 O 1 IO_PAD811 132 1 Z
+bit 132 C 1 *
+bit 131 I 1 IO_PAD809
+bit 130 O 1 IO_PAD809 129 1 Z
+bit 129 C 1 *
+bit 128 I 1 IO_PAD808
+bit 127 O 1 IO_PAD808 126 1 Z
+bit 126 C 1 *
+bit 125 I 1 IO_PAD807
+bit 124 O 1 IO_PAD807 123 1 Z
+bit 123 C 1 *
+bit 122 I 1 IO_PAD806
+bit 121 O 1 IO_PAD806 120 1 Z
+bit 120 C 1 *
+bit 119 I 1 IO_PAD805
+bit 118 O 1 IO_PAD805 117 1 Z
+bit 117 C 1 *
+bit 116 I 1 IO_PAD803
+bit 115 O 1 IO_PAD803 114 1 Z
+bit 114 C 1 *
+bit 113 I 1 IO_PAD801
+bit 112 O 1 IO_PAD801 111 1 Z
+bit 111 C 1 *
+bit 110 I 1 IO_PAD800
+bit 109 O 1 IO_PAD800 108 1 Z
+bit 108 C 1 *
+bit 107 I 1 IO_PAD799
+bit 106 O 1 IO_PAD799 105 1 Z
+bit 105 C 1 *
+bit 104 I 1 IO_PAD797
+bit 103 O 1 IO_PAD797 102 1 Z
+bit 102 C 1 *
+bit 101 I 1 IO_PAD796
+bit 100 O 1 IO_PAD796 99 1 Z
+bit 99 C 1 *
+bit 98 I 1 IO_PAD795
+bit 97 O 1 IO_PAD795 96 1 Z
+bit 96 C 1 *
+bit 95 I 1 IO_PAD794
+bit 94 O 1 IO_PAD794 93 1 Z
+bit 93 C 1 *
+bit 92 I 1 IO_PAD793
+bit 91 O 1 IO_PAD793 90 1 Z
+bit 90 C 1 *
+bit 89 I 1 IO_PAD791
+bit 88 O 1 IO_PAD791 87 1 Z
+bit 87 C 1 *
+bit 86 I 1 IO_PAD790
+bit 85 O 1 IO_PAD790 84 1 Z
+bit 84 C 1 *
+bit 83 I 1 IO_PAD789
+bit 82 O 1 IO_PAD789 81 1 Z
+bit 81 C 1 *
+bit 80 I 1 IO_PAD787
+bit 79 O 1 IO_PAD787 78 1 Z
+bit 78 C 1 *
+bit 77 I 1 IO_PAD786
+bit 76 O 1 IO_PAD786 75 1 Z
+bit 75 C 1 *
+bit 74 I 1 IO_PAD785
+bit 73 O 1 IO_PAD785 72 1 Z
+bit 72 C 1 *
+bit 71 I 1 IO_PAD783
+bit 70 O 1 IO_PAD783 69 1 Z
+bit 69 C 1 *
+bit 68 I 1 IO_PAD781
+bit 67 O 1 IO_PAD781 66 1 Z
+bit 66 C 1 *
+bit 65 I 1 IO_PAD779
+bit 64 O 1 IO_PAD779 63 1 Z
+bit 63 C 1 *
+bit 62 I 1 IO_PAD777
+bit 61 O 1 IO_PAD777 60 1 Z
+bit 60 C 1 *
+bit 59 I 1 IO_PAD776
+bit 58 O 1 IO_PAD776 57 1 Z
+bit 57 C 1 *
+bit 56 I 1 IO_PAD775
+bit 55 O 1 IO_PAD775 54 1 Z
+bit 54 C 1 *
+bit 53 I 1 IO_PAD774
+bit 52 O 1 IO_PAD774 51 1 Z
+bit 51 C 1 *
+bit 50 I 1 IO_PAD773
+bit 49 O 1 IO_PAD773 48 1 Z
+bit 48 C 1 *
+bit 47 I 1 IO_PAD771
+bit 46 O 1 IO_PAD771 45 1 Z
+bit 45 C 1 *
+bit 44 I 1 IO_PAD769
+bit 43 O 1 IO_PAD769 42 1 Z
+bit 42 C 1 *
+bit 41 I 1 IO_PAD768
+bit 40 O 1 IO_PAD768 39 1 Z
+bit 39 C 1 *
+bit 38 I 1 IO_PAD767
+bit 37 O 1 IO_PAD767 36 1 Z
+bit 36 C 1 *
+bit 35 I 1 IO_PAD766
+bit 34 O 1 IO_PAD766 33 1 Z
+bit 33 C 1 *
+bit 32 I 1 IO_PAD765
+bit 31 O 1 IO_PAD765 30 1 Z
+bit 30 C 1 *
+bit 29 I 1 IO_PAD763
+bit 28 O 1 IO_PAD763 27 1 Z
+bit 27 C 1 *
+bit 26 I 1 IO_PAD762
+bit 25 O 1 IO_PAD762 24 1 Z
+bit 24 C 1 *
+bit 23 I 1 IO_PAD761
+bit 22 O 1 IO_PAD761 21 1 Z
+bit 21 C 1 *
+bit 20 I 1 IO_PAD759
+bit 19 O 1 IO_PAD759 18 1 Z
+bit 18 C 1 *
+bit 17 I 1 IO_PAD758
+bit 16 O 1 IO_PAD758 15 1 Z
+bit 15 C 1 *
+bit 14 I 1 IO_PAD757
+bit 13 O 1 IO_PAD757 12 1 Z
+bit 12 C 1 *
+bit 11 I 1 IO_PAD755
+bit 10 O 1 IO_PAD755 9 1 Z
+bit 9 C 1 *
+bit 8 I 1 IO_PAD754
+bit 7 O 1 IO_PAD754 6 1 Z
+bit 6 C 1 *
+bit 5 I 1 IO_PAD753
+bit 4 O 1 IO_PAD753 3 1 Z
+bit 3 C 1 *
+bit 2 I 1 IO_PAD752
+bit 1 O 1 IO_PAD752 0 1 Z
+bit 0 C 1 *
--- /dev/null
+signal CCLK_AA22
+signal DONE_AB21
+signal GND1
+signal GND2
+signal GND3
+signal GND4
+signal GND5
+signal GND6
+signal GND7
+signal GND8
+signal GND9
+signal GND10
+signal GND11
+signal GND12
+signal GND13
+signal GND14
+signal GND15
+signal GND16
+signal GND17
+signal GND18
+signal GND19
+signal GND20
+signal GND21
+signal GND22
+signal GND23
+signal GND24
+signal GND25
+signal GND26
+signal GND27
+signal GND28
+signal GND29
+signal GND30
+signal GND31
+signal GND32
+signal GND33
+signal GND34
+signal GND35
+signal GND36
+signal GND37
+signal GND38
+signal GND39
+signal GND40
+signal GND41
+signal GND42
+signal GND43
+signal GND44
+signal GND45
+signal GND46
+signal GND47
+signal GND48
+signal GND49
+signal GND50
+signal GND51
+signal GND52
+signal HSWAP_EN_B3
+signal M0_AB2
+signal M1_AA1
+signal M2_AB3
+signal PROG_B
+signal TCK
+signal TDI
+signal TDO
+signal TMS
+signal VCCAUX1
+signal VCCAUX2
+signal VCCAUX3
+signal VCCAUX4
+signal VCCAUX5
+signal VCCAUX6
+signal VCCAUX7
+signal VCCAUX8
+signal VCCINT1
+signal VCCINT2
+signal VCCINT3
+signal VCCINT4
+signal VCCINT5
+signal VCCINT6
+signal VCCINT7
+signal VCCINT8
+signal VCCINT9
+signal VCCINT10
+signal VCCINT11
+signal VCCINT12
+signal VCCO01
+signal VCCO02
+signal VCCO03
+signal VCCO04
+signal VCCO05
+signal VCCO11
+signal VCCO12
+signal VCCO13
+signal VCCO14
+signal VCCO15
+signal VCCO21
+signal VCCO22
+signal VCCO23
+signal VCCO24
+signal VCCO25
+signal VCCO31
+signal VCCO32
+signal VCCO33
+signal VCCO34
+signal VCCO35
+signal VCCO41
+signal VCCO42
+signal VCCO43
+signal VCCO44
+signal VCCO45
+signal VCCO51
+signal VCCO52
+signal VCCO53
+signal VCCO54
+signal VCCO55
+signal VCCO61
+signal VCCO62
+signal VCCO63
+signal VCCO64
+signal VCCO65
+signal VCCO71
+signal VCCO72
+signal VCCO73
+signal VCCO74
+signal VCCO75
+signal IO_A3
+signal IO_A4
+signal IO_A5
+signal IO_A7
+signal IO_A8
+signal IO_A9
+signal IO_A10
+signal IO_A11
+signal IO_A12
+signal IO_A13
+signal IO_A14
+signal IO_A15
+signal IO_A16
+signal IO_A18
+signal IO_A19
+signal IO_B4
+signal IO_B5
+signal IO_B6
+signal IO_B7
+signal IO_B8
+signal IO_B9
+signal IO_B10
+signal IO_B11
+signal IO_B12
+signal IO_B13
+signal IO_B14
+signal IO_B15
+signal IO_B16
+signal IO_B17
+signal IO_B18
+signal IO_B19
+signal IO_B20
+signal IO_C1
+signal IO_C2
+signal IO_C3
+signal IO_C4
+signal IO_C5
+signal IO_C6
+signal IO_C7
+signal IO_C10
+signal IO_C11
+signal IO_C12
+signal IO_C13
+signal IO_C16
+signal IO_C17
+signal IO_C18
+signal IO_C19
+signal IO_C20
+signal IO_C21
+signal IO_C22
+signal IO_D1
+signal IO_D2
+signal IO_D3
+signal IO_D4
+signal IO_D5
+signal IO_D6
+signal IO_D7
+signal IO_D8
+signal IO_D9
+signal IO_D10
+signal IO_D11
+signal IO_D12
+signal IO_D13
+signal IO_D14
+signal IO_D15
+signal IO_D16
+signal IO_D17
+signal IO_D18
+signal IO_D19
+signal IO_D20
+signal IO_D21
+signal IO_D22
+signal IO_E1
+signal IO_E2
+signal IO_E3
+signal IO_E4
+signal IO_E5
+signal IO_E6
+signal IO_E7
+signal IO_E8
+signal IO_E9
+signal IO_E10
+signal IO_E11
+signal IO_E12
+signal IO_E13
+signal IO_E14
+signal IO_E15
+signal IO_E16
+signal IO_E17
+signal IO_E18
+signal IO_E19
+signal IO_E20
+signal IO_E21
+signal IO_E22
+signal IO_F2
+signal IO_F3
+signal IO_F4
+signal IO_F5
+signal IO_F6
+signal IO_F7
+signal IO_F9
+signal IO_F10
+signal IO_F11
+signal IO_F12
+signal IO_F13
+signal IO_F14
+signal IO_F16
+signal IO_F17
+signal IO_F18
+signal IO_F19
+signal IO_F20
+signal IO_F21
+signal IO_G1
+signal IO_G2
+signal IO_G3
+signal IO_G4
+signal IO_G5
+signal IO_G6
+signal IO_G17
+signal IO_G18
+signal IO_G19
+signal IO_G20
+signal IO_G21
+signal IO_G22
+signal IO_H1
+signal IO_H2
+signal IO_H4
+signal IO_H5
+signal IO_H18
+signal IO_H19
+signal IO_H21
+signal IO_H22
+signal IO_J1
+signal IO_J2
+signal IO_J4
+signal IO_J5
+signal IO_J6
+signal IO_J17
+signal IO_J18
+signal IO_J19
+signal IO_J21
+signal IO_J22
+signal IO_K1
+signal IO_K2
+signal IO_K3
+signal IO_K4
+signal IO_K5
+signal IO_K6
+signal IO_K17
+signal IO_K18
+signal IO_K19
+signal IO_K20
+signal IO_K21
+signal IO_K22
+signal IO_L1
+signal IO_L2
+signal IO_L3
+signal IO_L4
+signal IO_L5
+signal IO_L6
+signal IO_L17
+signal IO_L18
+signal IO_L19
+signal IO_L20
+signal IO_L21
+signal IO_L22
+signal IO_M1
+signal IO_M2
+signal IO_M3
+signal IO_M4
+signal IO_M5
+signal IO_M6
+signal IO_M17
+signal IO_M18
+signal IO_M19
+signal IO_M20
+signal IO_M21
+signal IO_M22
+signal IO_N1
+signal IO_N2
+signal IO_N3
+signal IO_N4
+signal IO_N5
+signal IO_N6
+signal IO_N17
+signal IO_N18
+signal IO_N19
+signal IO_N20
+signal IO_N21
+signal IO_N22
+signal IO_P1
+signal IO_P2
+signal IO_P4
+signal IO_P5
+signal IO_P6
+signal IO_P17
+signal IO_P18
+signal IO_P19
+signal IO_P21
+signal IO_P22
+signal IO_R1
+signal IO_R2
+signal IO_R4
+signal IO_R5
+signal IO_R18
+signal IO_R19
+signal IO_R21
+signal IO_R22
+signal IO_T1
+signal IO_T2
+signal IO_T3
+signal IO_T4
+signal IO_T5
+signal IO_T6
+signal IO_T17
+signal IO_T18
+signal IO_T19
+signal IO_T20
+signal IO_T21
+signal IO_T22
+signal IO_U2
+signal IO_U3
+signal IO_U4
+signal IO_U5
+signal IO_U6
+signal IO_U7
+signal IO_U9
+signal IO_U10
+signal IO_U11
+signal IO_U12
+signal IO_U13
+signal IO_U14
+signal IO_U16
+signal IO_U17
+signal IO_U18
+signal IO_U19
+signal IO_U20
+signal IO_U21
+signal IO_V1
+signal IO_V2
+signal IO_V3
+signal IO_V4
+signal IO_V5
+signal IO_V6
+signal IO_V7
+signal IO_V8
+signal IO_V9
+signal IO_V10
+signal IO_V11
+signal IO_V12
+signal IO_V13
+signal IO_V14
+signal IO_V15
+signal IO_V16
+signal IO_V17
+signal IO_V18
+signal IO_V19
+signal IO_V20
+signal IO_V21
+signal IO_V22
+signal IO_W1
+signal IO_W2
+signal IO_W3
+signal IO_W4
+signal IO_W5
+signal IO_W6
+signal IO_W7
+signal IO_W8
+signal IO_W9
+signal IO_W10
+signal IO_W11
+signal IO_W12
+signal IO_W13
+signal IO_W14
+signal IO_W15
+signal IO_W16
+signal IO_W17
+signal IO_W18
+signal IO_W19
+signal IO_W20
+signal IO_W21
+signal IO_W22
+signal IO_Y1
+signal IO_Y2
+signal IO_Y3
+signal IO_Y4
+signal IO_Y5
+signal IO_Y6
+signal IO_Y7
+signal IO_Y10
+signal IO_Y11
+signal IO_Y12
+signal IO_Y13
+signal IO_Y16
+signal IO_Y17
+signal IO_Y18
+signal IO_Y19
+signal IO_Y20
+signal IO_Y21
+signal IO_Y22
+signal IO_AA3
+signal IO_AA4
+signal IO_AA5
+signal IO_AA6
+signal IO_AA7
+signal IO_AA8
+signal IO_AA9
+signal IO_AA10
+signal IO_AA11
+signal IO_AA12
+signal IO_AA13
+signal IO_AA14
+signal IO_AA15
+signal IO_AA16
+signal IO_AA17
+signal IO_AA18
+signal IO_AA19
+signal IO_AA20
+signal IO_AB4
+signal IO_AB5
+signal IO_AB7
+signal IO_AB8
+signal IO_AB9
+signal IO_AB10
+signal IO_AB11
+signal IO_AB12
+signal IO_AB13
+signal IO_AB14
+signal IO_AB15
+signal IO_AB16
+signal IO_AB18
+signal IO_AB19
+
+register BSR 1931
+register BR 1
+register DIR 32
+
+instruction length 6
+
+instruction EXTEST 000000 BSR
+instruction SAMPLE/PRELOAD 000001 BSR
+instruction IDCODE 001001 DIR
+instruction BYPASS 111111 BR
+
+bit 1930 I 1 IO_C20
+bit 1929 O 1 IO_C20 1928 1 Z
+bit 1928 C 1 *
+bit 1927 I 1 IO_C21
+bit 1926 O 1 IO_C21 1925 1 Z
+bit 1925 C 1 *
+bit 1924 O 1 *
+bit 1923 O 1 *
+bit 1922 O 1 *
+bit 1921 O 1 *
+bit 1920 O 1 *
+bit 1919 O 1 *
+bit 1918 O 1 *
+bit 1917 O 1 *
+bit 1916 O 1 *
+bit 1915 O 1 *
+bit 1914 O 1 *
+bit 1913 O 1 *
+bit 1912 O 1 *
+bit 1911 O 1 *
+bit 1910 O 1 *
+bit 1909 O 1 *
+bit 1908 O 1 *
+bit 1907 O 1 *
+bit 1906 O 1 *
+bit 1905 O 1 *
+bit 1904 O 1 *
+bit 1903 O 1 *
+bit 1902 O 1 *
+bit 1901 O 1 *
+bit 1900 O 1 *
+bit 1899 O 1 *
+bit 1898 O 1 *
+bit 1897 O 1 *
+bit 1896 O 1 *
+bit 1895 O 1 *
+bit 1894 O 1 *
+bit 1893 O 1 *
+bit 1892 O 1 *
+bit 1891 O 1 *
+bit 1890 O 1 *
+bit 1889 O 1 *
+bit 1888 O 1 *
+bit 1887 O 1 *
+bit 1886 O 1 *
+bit 1885 O 1 *
+bit 1884 O 1 *
+bit 1883 O 1 *
+bit 1882 O 1 *
+bit 1881 O 1 *
+bit 1880 O 1 *
+bit 1879 O 1 *
+bit 1878 O 1 *
+bit 1877 O 1 *
+bit 1876 O 1 *
+bit 1875 O 1 *
+bit 1874 O 1 *
+bit 1873 O 1 *
+bit 1872 O 1 *
+bit 1871 O 1 *
+bit 1870 O 1 *
+bit 1869 O 1 *
+bit 1868 O 1 *
+bit 1867 O 1 *
+bit 1866 O 1 *
+bit 1865 O 1 *
+bit 1864 O 1 *
+bit 1863 O 1 *
+bit 1862 O 1 *
+bit 1861 O 1 *
+bit 1860 O 1 *
+bit 1859 O 1 *
+bit 1858 O 1 *
+bit 1857 O 1 *
+bit 1856 O 1 *
+bit 1855 O 1 *
+bit 1854 O 1 *
+bit 1853 O 1 *
+bit 1852 O 1 *
+bit 1851 O 1 *
+bit 1850 O 1 *
+bit 1849 I 1 IO_C22
+bit 1848 O 1 IO_C22 1847 1 Z
+bit 1847 C 1 *
+bit 1846 O 1 *
+bit 1845 O 1 *
+bit 1844 O 1 *
+bit 1843 O 1 *
+bit 1842 O 1 *
+bit 1841 O 1 *
+bit 1840 I 1 IO_D20
+bit 1839 O 1 IO_D20 1838 1 Z
+bit 1838 C 1 *
+bit 1837 I 1 IO_D19
+bit 1836 O 1 IO_D19 1835 1 Z
+bit 1835 C 1 *
+bit 1834 I 1 IO_D21
+bit 1833 O 1 IO_D21 1832 1 Z
+bit 1832 C 1 *
+bit 1831 I 1 IO_D22
+bit 1830 O 1 IO_D22 1829 1 Z
+bit 1829 C 1 *
+bit 1828 O 1 *
+bit 1827 O 1 *
+bit 1826 O 1 *
+bit 1825 O 1 *
+bit 1824 O 1 *
+bit 1823 O 1 *
+bit 1822 I 1 IO_E18
+bit 1821 O 1 IO_E18 1820 1 Z
+bit 1820 C 1 *
+bit 1819 I 1 IO_F18
+bit 1818 O 1 IO_F18 1817 1 Z
+bit 1817 C 1 *
+bit 1816 I 1 IO_E19
+bit 1815 O 1 IO_E19 1814 1 Z
+bit 1814 C 1 *
+bit 1813 I 1 IO_E20
+bit 1812 O 1 IO_E20 1811 1 Z
+bit 1811 C 1 *
+bit 1810 I 1 IO_E21
+bit 1809 O 1 IO_E21 1808 1 Z
+bit 1808 C 1 *
+bit 1807 I 1 IO_E22
+bit 1806 O 1 IO_E22 1805 1 Z
+bit 1805 C 1 *
+bit 1804 I 1 IO_G17
+bit 1803 O 1 IO_G17 1802 1 Z
+bit 1802 C 1 *
+bit 1801 I 1 IO_G18
+bit 1800 O 1 IO_G18 1799 1 Z
+bit 1799 C 1 *
+bit 1798 I 1 IO_F19
+bit 1797 O 1 IO_F19 1796 1 Z
+bit 1796 C 1 *
+bit 1795 I 1 IO_G19
+bit 1794 O 1 IO_G19 1793 1 Z
+bit 1793 C 1 *
+bit 1792 I 1 IO_F20
+bit 1791 O 1 IO_F20 1790 1 Z
+bit 1790 C 1 *
+bit 1789 I 1 IO_F21
+bit 1788 O 1 IO_F21 1787 1 Z
+bit 1787 C 1 *
+bit 1786 O 1 *
+bit 1785 O 1 *
+bit 1784 O 1 *
+bit 1783 O 1 *
+bit 1782 O 1 *
+bit 1781 O 1 *
+bit 1780 I 1 IO_G20
+bit 1779 O 1 IO_G20 1778 1 Z
+bit 1778 C 1 *
+bit 1777 I 1 IO_H19
+bit 1776 O 1 IO_H19 1775 1 Z
+bit 1775 C 1 *
+bit 1774 I 1 IO_G21
+bit 1773 O 1 IO_G21 1772 1 Z
+bit 1772 C 1 *
+bit 1771 I 1 IO_G22
+bit 1770 O 1 IO_G22 1769 1 Z
+bit 1769 C 1 *
+bit 1768 I 1 IO_H18
+bit 1767 O 1 IO_H18 1766 1 Z
+bit 1766 C 1 *
+bit 1765 I 1 IO_J17
+bit 1764 O 1 IO_J17 1763 1 Z
+bit 1763 C 1 *
+bit 1762 I 1 IO_H21
+bit 1761 O 1 IO_H21 1760 1 Z
+bit 1760 C 1 *
+bit 1759 I 1 IO_H22
+bit 1758 O 1 IO_H22 1757 1 Z
+bit 1757 C 1 *
+bit 1756 O 1 *
+bit 1755 O 1 *
+bit 1754 O 1 *
+bit 1753 O 1 *
+bit 1752 O 1 *
+bit 1751 O 1 *
+bit 1750 I 1 IO_J18
+bit 1749 O 1 IO_J18 1748 1 Z
+bit 1748 C 1 *
+bit 1747 I 1 IO_J19
+bit 1746 O 1 IO_J19 1745 1 Z
+bit 1745 C 1 *
+bit 1744 I 1 IO_J21
+bit 1743 O 1 IO_J21 1742 1 Z
+bit 1742 C 1 *
+bit 1741 I 1 IO_J22
+bit 1740 O 1 IO_J22 1739 1 Z
+bit 1739 C 1 *
+bit 1738 I 1 IO_K17
+bit 1737 O 1 IO_K17 1736 1 Z
+bit 1736 C 1 *
+bit 1735 I 1 IO_K18
+bit 1734 O 1 IO_K18 1733 1 Z
+bit 1733 C 1 *
+bit 1732 I 1 IO_K19
+bit 1731 O 1 IO_K19 1730 1 Z
+bit 1730 C 1 *
+bit 1729 I 1 IO_K20
+bit 1728 O 1 IO_K20 1727 1 Z
+bit 1727 C 1 *
+bit 1726 I 1 IO_K21
+bit 1725 O 1 IO_K21 1724 1 Z
+bit 1724 C 1 *
+bit 1723 I 1 IO_K22
+bit 1722 O 1 IO_K22 1721 1 Z
+bit 1721 C 1 *
+bit 1720 O 1 *
+bit 1719 O 1 *
+bit 1718 O 1 *
+bit 1717 O 1 *
+bit 1716 O 1 *
+bit 1715 O 1 *
+bit 1714 O 1 *
+bit 1713 O 1 *
+bit 1712 O 1 *
+bit 1711 O 1 *
+bit 1710 O 1 *
+bit 1709 O 1 *
+bit 1708 I 1 IO_L17
+bit 1707 O 1 IO_L17 1706 1 Z
+bit 1706 C 1 *
+bit 1705 I 1 IO_L18
+bit 1704 O 1 IO_L18 1703 1 Z
+bit 1703 C 1 *
+bit 1702 I 1 IO_L19
+bit 1701 O 1 IO_L19 1700 1 Z
+bit 1700 C 1 *
+bit 1699 I 1 IO_L20
+bit 1698 O 1 IO_L20 1697 1 Z
+bit 1697 C 1 *
+bit 1696 I 1 IO_L21
+bit 1695 O 1 IO_L21 1694 1 Z
+bit 1694 C 1 *
+bit 1693 I 1 IO_L22
+bit 1692 O 1 IO_L22 1691 1 Z
+bit 1691 C 1 *
+bit 1690 I 1 IO_M22
+bit 1689 O 1 IO_M22 1688 1 Z
+bit 1688 C 1 *
+bit 1687 I 1 IO_M21
+bit 1686 O 1 IO_M21 1685 1 Z
+bit 1685 C 1 *
+bit 1684 I 1 IO_M20
+bit 1683 O 1 IO_M20 1682 1 Z
+bit 1682 C 1 *
+bit 1681 I 1 IO_M19
+bit 1680 O 1 IO_M19 1679 1 Z
+bit 1679 C 1 *
+bit 1678 I 1 IO_M18
+bit 1677 O 1 IO_M18 1676 1 Z
+bit 1676 C 1 *
+bit 1675 I 1 IO_M17
+bit 1674 O 1 IO_M17 1673 1 Z
+bit 1673 C 1 *
+bit 1672 O 1 *
+bit 1671 O 1 *
+bit 1670 O 1 *
+bit 1669 O 1 *
+bit 1668 O 1 *
+bit 1667 O 1 *
+bit 1666 O 1 *
+bit 1665 O 1 *
+bit 1664 O 1 *
+bit 1663 O 1 *
+bit 1662 O 1 *
+bit 1661 O 1 *
+bit 1660 I 1 IO_N22
+bit 1659 O 1 IO_N22 1658 1 Z
+bit 1658 C 1 *
+bit 1657 I 1 IO_N21
+bit 1656 O 1 IO_N21 1655 1 Z
+bit 1655 C 1 *
+bit 1654 I 1 IO_N20
+bit 1653 O 1 IO_N20 1652 1 Z
+bit 1652 C 1 *
+bit 1651 I 1 IO_N19
+bit 1650 O 1 IO_N19 1649 1 Z
+bit 1649 C 1 *
+bit 1648 I 1 IO_N18
+bit 1647 O 1 IO_N18 1646 1 Z
+bit 1646 C 1 *
+bit 1645 I 1 IO_N17
+bit 1644 O 1 IO_N17 1643 1 Z
+bit 1643 C 1 *
+bit 1642 I 1 IO_P22
+bit 1641 O 1 IO_P22 1640 1 Z
+bit 1640 C 1 *
+bit 1639 I 1 IO_P21
+bit 1638 O 1 IO_P21 1637 1 Z
+bit 1637 C 1 *
+bit 1636 I 1 IO_P18
+bit 1635 O 1 IO_P18 1634 1 Z
+bit 1634 C 1 *
+bit 1633 I 1 IO_P17
+bit 1632 O 1 IO_P17 1631 1 Z
+bit 1631 C 1 *
+bit 1630 O 1 *
+bit 1629 O 1 *
+bit 1628 O 1 *
+bit 1627 O 1 *
+bit 1626 O 1 *
+bit 1625 O 1 *
+bit 1624 I 1 IO_P19
+bit 1623 O 1 IO_P19 1622 1 Z
+bit 1622 C 1 *
+bit 1621 I 1 IO_R19
+bit 1620 O 1 IO_R19 1619 1 Z
+bit 1619 C 1 *
+bit 1618 I 1 IO_R22
+bit 1617 O 1 IO_R22 1616 1 Z
+bit 1616 C 1 *
+bit 1615 I 1 IO_R21
+bit 1614 O 1 IO_R21 1613 1 Z
+bit 1613 C 1 *
+bit 1612 I 1 IO_T22
+bit 1611 O 1 IO_T22 1610 1 Z
+bit 1610 C 1 *
+bit 1609 I 1 IO_T21
+bit 1608 O 1 IO_T21 1607 1 Z
+bit 1607 C 1 *
+bit 1606 I 1 IO_T20
+bit 1605 O 1 IO_T20 1604 1 Z
+bit 1604 C 1 *
+bit 1603 I 1 IO_T19
+bit 1602 O 1 IO_T19 1601 1 Z
+bit 1601 C 1 *
+bit 1600 O 1 *
+bit 1599 O 1 *
+bit 1598 O 1 *
+bit 1597 O 1 *
+bit 1596 O 1 *
+bit 1595 O 1 *
+bit 1594 I 1 IO_R18
+bit 1593 O 1 IO_R18 1592 1 Z
+bit 1592 C 1 *
+bit 1591 I 1 IO_T18
+bit 1590 O 1 IO_T18 1589 1 Z
+bit 1589 C 1 *
+bit 1588 I 1 IO_U21
+bit 1587 O 1 IO_U21 1586 1 Z
+bit 1586 C 1 *
+bit 1585 I 1 IO_U20
+bit 1584 O 1 IO_U20 1583 1 Z
+bit 1583 C 1 *
+bit 1582 I 1 IO_T17
+bit 1581 O 1 IO_T17 1580 1 Z
+bit 1580 C 1 *
+bit 1579 I 1 IO_U18
+bit 1578 O 1 IO_U18 1577 1 Z
+bit 1577 C 1 *
+bit 1576 I 1 IO_V22
+bit 1575 O 1 IO_V22 1574 1 Z
+bit 1574 C 1 *
+bit 1573 I 1 IO_V21
+bit 1572 O 1 IO_V21 1571 1 Z
+bit 1571 C 1 *
+bit 1570 I 1 IO_U19
+bit 1569 O 1 IO_U19 1568 1 Z
+bit 1568 C 1 *
+bit 1567 I 1 IO_V20
+bit 1566 O 1 IO_V20 1565 1 Z
+bit 1565 C 1 *
+bit 1564 I 1 IO_W21
+bit 1563 O 1 IO_W21 1562 1 Z
+bit 1562 C 1 *
+bit 1561 I 1 IO_W20
+bit 1560 O 1 IO_W20 1559 1 Z
+bit 1559 C 1 *
+bit 1558 O 1 *
+bit 1557 O 1 *
+bit 1556 O 1 *
+bit 1555 O 1 *
+bit 1554 O 1 *
+bit 1553 O 1 *
+bit 1552 I 1 IO_V19
+bit 1551 O 1 IO_V19 1550 1 Z
+bit 1550 C 1 *
+bit 1549 I 1 IO_W19
+bit 1548 O 1 IO_W19 1547 1 Z
+bit 1547 C 1 *
+bit 1546 I 1 IO_W22
+bit 1545 O 1 IO_W22 1544 1 Z
+bit 1544 C 1 *
+bit 1543 I 1 IO_Y22
+bit 1542 O 1 IO_Y22 1541 1 Z
+bit 1541 C 1 *
+bit 1540 O 1 *
+bit 1539 O 1 *
+bit 1538 O 1 *
+bit 1537 O 1 *
+bit 1536 O 1 *
+bit 1535 O 1 *
+bit 1534 I 1 IO_Y21
+bit 1533 O 1 IO_Y21 1532 1 Z
+bit 1532 C 1 *
+bit 1531 O 1 *
+bit 1530 O 1 *
+bit 1529 O 1 *
+bit 1528 O 1 *
+bit 1527 O 1 *
+bit 1526 O 1 *
+bit 1525 O 1 *
+bit 1524 O 1 *
+bit 1523 O 1 *
+bit 1522 O 1 *
+bit 1521 O 1 *
+bit 1520 O 1 *
+bit 1519 O 1 *
+bit 1518 O 1 *
+bit 1517 O 1 *
+bit 1516 O 1 *
+bit 1515 O 1 *
+bit 1514 O 1 *
+bit 1513 O 1 *
+bit 1512 O 1 *
+bit 1511 O 1 *
+bit 1510 O 1 *
+bit 1509 O 1 *
+bit 1508 O 1 *
+bit 1507 O 1 *
+bit 1506 O 1 *
+bit 1505 O 1 *
+bit 1504 O 1 *
+bit 1503 O 1 *
+bit 1502 O 1 *
+bit 1501 O 1 *
+bit 1500 O 1 *
+bit 1499 O 1 *
+bit 1498 O 1 *
+bit 1497 O 1 *
+bit 1496 O 1 *
+bit 1495 O 1 *
+bit 1494 O 1 *
+bit 1493 O 1 *
+bit 1492 O 1 *
+bit 1491 O 1 *
+bit 1490 O 1 *
+bit 1489 O 1 *
+bit 1488 O 1 *
+bit 1487 O 1 *
+bit 1486 O 1 *
+bit 1485 O 1 *
+bit 1484 O 1 *
+bit 1483 O 1 *
+bit 1482 O 1 *
+bit 1481 O 1 *
+bit 1480 O 1 *
+bit 1479 O 1 *
+bit 1478 O 1 *
+bit 1477 O 1 *
+bit 1476 O 1 *
+bit 1475 O 1 *
+bit 1474 O 1 *
+bit 1473 O 1 *
+bit 1472 O 1 *
+bit 1471 O 1 *
+bit 1470 O 1 *
+bit 1469 O 1 *
+bit 1468 O 1 *
+bit 1467 O 1 *
+bit 1466 O 1 *
+bit 1465 O 1 *
+bit 1464 O 1 *
+bit 1463 O 1 *
+bit 1462 O 1 *
+bit 1461 O 1 *
+bit 1460 O 1 *
+bit 1459 O 1 *
+bit 1458 O 1 *
+bit 1457 O 1 *
+bit 1456 I 1 IO_Y20
+bit 1455 O 1 IO_Y20 1454 1 Z
+bit 1454 C 1 *
+bit 1453 I 1 IO_Y19
+bit 1452 O 1 IO_Y19 1451 1 Z
+bit 1451 C 1 *
+bit 1450 I 1 CCLK_AA22
+bit 1449 O 1 CCLK_AA22 1448 1 Z
+bit 1448 C 1 *
+bit 1447 I 1 DONE_AB21
+bit 1446 O 1 DONE_AB21 1445 1 Z
+bit 1445 C 1 *
+bit 1444 I 1 IO_V18
+bit 1443 O 1 IO_V18 1442 1 Z
+bit 1442 C 1 *
+bit 1441 I 1 IO_AA20
+bit 1440 O 1 IO_AA20 1439 1 Z
+bit 1439 C 1 *
+bit 1438 I 1 IO_AB20
+bit 1437 O 1 IO_AB20 1436 1 Z
+bit 1436 C 1 *
+bit 1435 O 1 *
+bit 1434 O 1 *
+bit 1433 O 1 *
+bit 1432 O 1 *
+bit 1431 O 1 *
+bit 1430 O 1 *
+bit 1429 O 1 *
+bit 1428 O 1 *
+bit 1427 O 1 *
+bit 1426 O 1 *
+bit 1425 O 1 *
+bit 1424 O 1 *
+bit 1423 O 1 *
+bit 1422 O 1 *
+bit 1421 O 1 *
+bit 1420 O 1 *
+bit 1419 O 1 *
+bit 1418 O 1 *
+bit 1417 O 1 *
+bit 1416 O 1 *
+bit 1415 O 1 *
+bit 1414 O 1 *
+bit 1413 O 1 *
+bit 1412 O 1 *
+bit 1411 I 1 IO_AA19
+bit 1410 O 1 IO_AA19 1409 1 Z
+bit 1409 C 1 *
+bit 1408 I 1 IO_AB19
+bit 1407 O 1 IO_AB19 1406 1 Z
+bit 1406 C 1 *
+bit 1405 I 1 IO_W18
+bit 1404 O 1 IO_W18 1403 1 Z
+bit 1403 C 1 *
+bit 1402 I 1 IO_Y18
+bit 1401 O 1 IO_Y18 1400 1 Z
+bit 1400 C 1 *
+bit 1399 O 1 *
+bit 1398 O 1 *
+bit 1397 O 1 *
+bit 1396 O 1 *
+bit 1395 O 1 *
+bit 1394 O 1 *
+bit 1393 O 1 *
+bit 1392 O 1 *
+bit 1391 O 1 *
+bit 1390 O 1 *
+bit 1389 O 1 *
+bit 1388 O 1 *
+bit 1387 O 1 *
+bit 1386 O 1 *
+bit 1385 O 1 *
+bit 1384 I 1 IO_U17
+bit 1383 O 1 IO_U17 1382 1 Z
+bit 1382 C 1 *
+bit 1381 I 1 IO_AA18
+bit 1380 O 1 IO_AA18 1379 1 Z
+bit 1379 C 1 *
+bit 1378 I 1 IO_AB18
+bit 1377 O 1 IO_AB18 1376 1 Z
+bit 1376 C 1 *
+bit 1375 I 1 IO_V17
+bit 1374 O 1 IO_V17 1373 1 Z
+bit 1373 C 1 *
+bit 1372 I 1 IO_W17
+bit 1371 O 1 IO_W17 1370 1 Z
+bit 1370 C 1 *
+bit 1369 I 1 IO_U16
+bit 1368 O 1 IO_U16 1367 1 Z
+bit 1367 C 1 *
+bit 1366 O 1 *
+bit 1365 O 1 *
+bit 1364 O 1 *
+bit 1363 O 1 *
+bit 1362 O 1 *
+bit 1361 O 1 *
+bit 1360 O 1 *
+bit 1359 O 1 *
+bit 1358 O 1 *
+bit 1357 O 1 *
+bit 1356 O 1 *
+bit 1355 O 1 *
+bit 1354 O 1 *
+bit 1353 O 1 *
+bit 1352 O 1 *
+bit 1351 O 1 *
+bit 1350 O 1 *
+bit 1349 O 1 *
+bit 1348 O 1 *
+bit 1347 O 1 *
+bit 1346 O 1 *
+bit 1345 O 1 *
+bit 1344 O 1 *
+bit 1343 O 1 *
+bit 1342 O 1 *
+bit 1341 O 1 *
+bit 1340 O 1 *
+bit 1339 O 1 *
+bit 1338 O 1 *
+bit 1337 O 1 *
+bit 1336 I 1 IO_Y17
+bit 1335 O 1 IO_Y17 1334 1 Z
+bit 1334 C 1 *
+bit 1333 I 1 IO_AA17
+bit 1332 O 1 IO_AA17 1331 1 Z
+bit 1331 C 1 *
+bit 1330 I 1 IO_V16
+bit 1329 O 1 IO_V16 1328 1 Z
+bit 1328 C 1 *
+bit 1327 I 1 IO_W16
+bit 1326 O 1 IO_W16 1325 1 Z
+bit 1325 C 1 *
+bit 1324 O 1 *
+bit 1323 O 1 *
+bit 1322 O 1 *
+bit 1321 O 1 *
+bit 1320 O 1 *
+bit 1319 O 1 *
+bit 1318 O 1 *
+bit 1317 O 1 *
+bit 1316 O 1 *
+bit 1315 O 1 *
+bit 1314 O 1 *
+bit 1313 O 1 *
+bit 1312 O 1 *
+bit 1311 O 1 *
+bit 1310 O 1 *
+bit 1309 I 1 IO_Y16
+bit 1308 O 1 IO_Y16 1307 1 Z
+bit 1307 C 1 *
+bit 1306 I 1 IO_AA16
+bit 1305 O 1 IO_AA16 1304 1 Z
+bit 1304 C 1 *
+bit 1303 I 1 IO_AB16
+bit 1302 O 1 IO_AB16 1301 1 Z
+bit 1301 C 1 *
+bit 1300 O 1 *
+bit 1299 O 1 *
+bit 1298 O 1 *
+bit 1297 O 1 *
+bit 1296 O 1 *
+bit 1295 O 1 *
+bit 1294 O 1 *
+bit 1293 O 1 *
+bit 1292 O 1 *
+bit 1291 O 1 *
+bit 1290 O 1 *
+bit 1289 O 1 *
+bit 1288 O 1 *
+bit 1287 O 1 *
+bit 1286 O 1 *
+bit 1285 I 1 IO_V15
+bit 1284 O 1 IO_V15 1283 1 Z
+bit 1283 C 1 *
+bit 1282 I 1 IO_W15
+bit 1281 O 1 IO_W15 1280 1 Z
+bit 1280 C 1 *
+bit 1279 O 1 *
+bit 1278 O 1 *
+bit 1277 O 1 *
+bit 1276 O 1 *
+bit 1275 O 1 *
+bit 1274 O 1 *
+bit 1273 O 1 *
+bit 1272 O 1 *
+bit 1271 O 1 *
+bit 1270 I 1 IO_AA15
+bit 1269 O 1 IO_AA15 1268 1 Z
+bit 1268 C 1 *
+bit 1267 I 1 IO_AB15
+bit 1266 O 1 IO_AB15 1265 1 Z
+bit 1265 C 1 *
+bit 1264 O 1 *
+bit 1263 O 1 *
+bit 1262 O 1 *
+bit 1261 I 1 IO_U14
+bit 1260 O 1 IO_U14 1259 1 Z
+bit 1259 C 1 *
+bit 1258 I 1 IO_V14
+bit 1257 O 1 IO_V14 1256 1 Z
+bit 1256 C 1 *
+bit 1255 O 1 *
+bit 1254 O 1 *
+bit 1253 O 1 *
+bit 1252 O 1 *
+bit 1251 O 1 *
+bit 1250 O 1 *
+bit 1249 I 1 IO_W14
+bit 1248 O 1 IO_W14 1247 1 Z
+bit 1247 C 1 *
+bit 1246 I 1 IO_AA14
+bit 1245 O 1 IO_AA14 1244 1 Z
+bit 1244 C 1 *
+bit 1243 I 1 IO_AB14
+bit 1242 O 1 IO_AB14 1241 1 Z
+bit 1241 C 1 *
+bit 1240 I 1 IO_U13
+bit 1239 O 1 IO_U13 1238 1 Z
+bit 1238 C 1 *
+bit 1237 I 1 IO_V13
+bit 1236 O 1 IO_V13 1235 1 Z
+bit 1235 C 1 *
+bit 1234 I 1 IO_W13
+bit 1233 O 1 IO_W13 1232 1 Z
+bit 1232 C 1 *
+bit 1231 I 1 IO_Y13
+bit 1230 O 1 IO_Y13 1229 1 Z
+bit 1229 C 1 *
+bit 1228 I 1 IO_AA13
+bit 1227 O 1 IO_AA13 1226 1 Z
+bit 1226 C 1 *
+bit 1225 I 1 IO_U12
+bit 1224 O 1 IO_U12 1223 1 Z
+bit 1223 C 1 *
+bit 1222 I 1 IO_V12
+bit 1221 O 1 IO_V12 1220 1 Z
+bit 1220 C 1 *
+bit 1219 I 1 IO_AB13
+bit 1218 O 1 IO_AB13 1217 1 Z
+bit 1217 C 1 *
+bit 1216 I 1 IO_W12
+bit 1215 O 1 IO_W12 1214 1 Z
+bit 1214 C 1 *
+bit 1213 I 1 IO_Y12
+bit 1212 O 1 IO_Y12 1211 1 Z
+bit 1211 C 1 *
+bit 1210 I 1 IO_AA12
+bit 1209 O 1 IO_AA12 1208 1 Z
+bit 1208 C 1 *
+bit 1207 I 1 IO_AB12
+bit 1206 O 1 IO_AB12 1205 1 Z
+bit 1205 C 1 *
+bit 1204 I 1 IO_AB11
+bit 1203 O 1 IO_AB11 1202 1 Z
+bit 1202 C 1 *
+bit 1201 I 1 IO_AA11
+bit 1200 O 1 IO_AA11 1199 1 Z
+bit 1199 C 1 *
+bit 1198 I 1 IO_Y11
+bit 1197 O 1 IO_Y11 1196 1 Z
+bit 1196 C 1 *
+bit 1195 I 1 IO_W11
+bit 1194 O 1 IO_W11 1193 1 Z
+bit 1193 C 1 *
+bit 1192 I 1 IO_V11
+bit 1191 O 1 IO_V11 1190 1 Z
+bit 1190 C 1 *
+bit 1189 I 1 IO_U11
+bit 1188 O 1 IO_U11 1187 1 Z
+bit 1187 C 1 *
+bit 1186 I 1 IO_AB10
+bit 1185 O 1 IO_AB10 1184 1 Z
+bit 1184 C 1 *
+bit 1183 I 1 IO_AA10
+bit 1182 O 1 IO_AA10 1181 1 Z
+bit 1181 C 1 *
+bit 1180 I 1 IO_Y10
+bit 1179 O 1 IO_Y10 1178 1 Z
+bit 1178 C 1 *
+bit 1177 I 1 IO_W10
+bit 1176 O 1 IO_W10 1175 1 Z
+bit 1175 C 1 *
+bit 1174 I 1 IO_V10
+bit 1173 O 1 IO_V10 1172 1 Z
+bit 1172 C 1 *
+bit 1171 I 1 IO_AB9
+bit 1170 O 1 IO_AB9 1169 1 Z
+bit 1169 C 1 *
+bit 1168 I 1 IO_AA9
+bit 1167 O 1 IO_AA9 1166 1 Z
+bit 1166 C 1 *
+bit 1165 I 1 IO_W9
+bit 1164 O 1 IO_W9 1163 1 Z
+bit 1163 C 1 *
+bit 1162 I 1 IO_V9
+bit 1161 O 1 IO_V9 1160 1 Z
+bit 1160 C 1 *
+bit 1159 I 1 IO_U10
+bit 1158 O 1 IO_U10 1157 1 Z
+bit 1157 C 1 *
+bit 1156 O 1 *
+bit 1155 O 1 *
+bit 1154 O 1 *
+bit 1153 O 1 *
+bit 1152 O 1 *
+bit 1151 O 1 *
+bit 1150 I 1 IO_AB8
+bit 1149 O 1 IO_AB8 1148 1 Z
+bit 1148 C 1 *
+bit 1147 I 1 IO_AA8
+bit 1146 O 1 IO_AA8 1145 1 Z
+bit 1145 C 1 *
+bit 1144 O 1 *
+bit 1143 O 1 *
+bit 1142 O 1 *
+bit 1141 I 1 IO_W8
+bit 1140 O 1 IO_W8 1139 1 Z
+bit 1139 C 1 *
+bit 1138 I 1 IO_V8
+bit 1137 O 1 IO_V8 1136 1 Z
+bit 1136 C 1 *
+bit 1135 O 1 *
+bit 1134 O 1 *
+bit 1133 O 1 *
+bit 1132 O 1 *
+bit 1131 O 1 *
+bit 1130 O 1 *
+bit 1129 I 1 IO_U9
+bit 1128 O 1 IO_U9 1127 1 Z
+bit 1127 C 1 *
+bit 1126 I 1 IO_AB7
+bit 1125 O 1 IO_AB7 1124 1 Z
+bit 1124 C 1 *
+bit 1123 I 1 IO_AA7
+bit 1122 O 1 IO_AA7 1121 1 Z
+bit 1121 C 1 *
+bit 1120 O 1 *
+bit 1119 O 1 *
+bit 1118 O 1 *
+bit 1117 O 1 *
+bit 1116 O 1 *
+bit 1115 O 1 *
+bit 1114 O 1 *
+bit 1113 O 1 *
+bit 1112 O 1 *
+bit 1111 O 1 *
+bit 1110 O 1 *
+bit 1109 O 1 *
+bit 1108 O 1 *
+bit 1107 O 1 *
+bit 1106 O 1 *
+bit 1105 I 1 IO_Y7
+bit 1104 O 1 IO_Y7 1103 1 Z
+bit 1103 C 1 *
+bit 1102 I 1 IO_W7
+bit 1101 O 1 IO_W7 1100 1 Z
+bit 1100 C 1 *
+bit 1099 O 1 *
+bit 1098 O 1 *
+bit 1097 O 1 *
+bit 1096 O 1 *
+bit 1095 O 1 *
+bit 1094 O 1 *
+bit 1093 O 1 *
+bit 1092 O 1 *
+bit 1091 O 1 *
+bit 1090 O 1 *
+bit 1089 O 1 *
+bit 1088 O 1 *
+bit 1087 O 1 *
+bit 1086 O 1 *
+bit 1085 O 1 *
+bit 1084 I 1 IO_V7
+bit 1083 O 1 IO_V7 1082 1 Z
+bit 1082 C 1 *
+bit 1081 I 1 IO_AA6
+bit 1080 O 1 IO_AA6 1079 1 Z
+bit 1079 C 1 *
+bit 1078 I 1 IO_Y6
+bit 1077 O 1 IO_Y6 1076 1 Z
+bit 1076 C 1 *
+bit 1075 I 1 IO_W6
+bit 1074 O 1 IO_W6 1073 1 Z
+bit 1073 C 1 *
+bit 1072 I 1 IO_V6
+bit 1071 O 1 IO_V6 1070 1 Z
+bit 1070 C 1 *
+bit 1069 O 1 *
+bit 1068 O 1 *
+bit 1067 O 1 *
+bit 1066 O 1 *
+bit 1065 O 1 *
+bit 1064 O 1 *
+bit 1063 O 1 *
+bit 1062 O 1 *
+bit 1061 O 1 *
+bit 1060 O 1 *
+bit 1059 O 1 *
+bit 1058 O 1 *
+bit 1057 O 1 *
+bit 1056 O 1 *
+bit 1055 O 1 *
+bit 1054 O 1 *
+bit 1053 O 1 *
+bit 1052 O 1 *
+bit 1051 O 1 *
+bit 1050 O 1 *
+bit 1049 O 1 *
+bit 1048 O 1 *
+bit 1047 O 1 *
+bit 1046 O 1 *
+bit 1045 O 1 *
+bit 1044 O 1 *
+bit 1043 O 1 *
+bit 1042 O 1 *
+bit 1041 O 1 *
+bit 1040 O 1 *
+bit 1039 I 1 IO_U7
+bit 1038 O 1 IO_U7 1037 1 Z
+bit 1037 C 1 *
+bit 1036 I 1 IO_AB5
+bit 1035 O 1 IO_AB5 1034 1 Z
+bit 1034 C 1 *
+bit 1033 I 1 IO_AA5
+bit 1032 O 1 IO_AA5 1031 1 Z
+bit 1031 C 1 *
+bit 1030 I 1 IO_Y5
+bit 1029 O 1 IO_Y5 1028 1 Z
+bit 1028 C 1 *
+bit 1027 I 1 IO_W5
+bit 1026 O 1 IO_W5 1025 1 Z
+bit 1025 C 1 *
+bit 1024 O 1 *
+bit 1023 O 1 *
+bit 1022 O 1 *
+bit 1021 O 1 *
+bit 1020 O 1 *
+bit 1019 O 1 *
+bit 1018 O 1 *
+bit 1017 O 1 *
+bit 1016 O 1 *
+bit 1015 O 1 *
+bit 1014 O 1 *
+bit 1013 O 1 *
+bit 1012 O 1 *
+bit 1011 O 1 *
+bit 1010 O 1 *
+bit 1009 I 1 IO_U6
+bit 1008 O 1 IO_U6 1007 1 Z
+bit 1007 C 1 *
+bit 1006 I 1 IO_AB4
+bit 1005 O 1 IO_AB4 1004 1 Z
+bit 1004 C 1 *
+bit 1003 I 1 IO_AA4
+bit 1002 O 1 IO_AA4 1001 1 Z
+bit 1001 C 1 *
+bit 1000 O 1 *
+bit 999 O 1 *
+bit 998 O 1 *
+bit 997 O 1 *
+bit 996 O 1 *
+bit 995 O 1 *
+bit 994 O 1 *
+bit 993 O 1 *
+bit 992 O 1 *
+bit 991 O 1 *
+bit 990 O 1 *
+bit 989 O 1 *
+bit 988 O 1 *
+bit 987 O 1 *
+bit 986 O 1 *
+bit 985 O 1 *
+bit 984 O 1 *
+bit 983 O 1 *
+bit 982 O 1 *
+bit 981 O 1 *
+bit 980 O 1 *
+bit 979 O 1 *
+bit 978 O 1 *
+bit 977 O 1 *
+bit 976 O 1 *
+bit 975 O 1 *
+bit 974 O 1 *
+bit 973 O 1 *
+bit 972 O 1 *
+bit 971 O 1 *
+bit 970 I 1 IO_Y4
+bit 969 O 1 IO_Y4 968 1 Z
+bit 968 C 1 *
+bit 967 I 1 IO_AA3
+bit 966 O 1 IO_AA3 965 1 Z
+bit 965 C 1 *
+bit 964 I 1 M2_AB3
+bit 963 I 1 M0_AB2
+bit 962 I 1 M1_AA1
+bit 961 I 1 IO_Y3
+bit 960 O 1 IO_Y3 959 1 Z
+bit 959 C 1 *
+bit 958 I 1 IO_Y2
+bit 957 O 1 IO_Y2 956 1 Z
+bit 956 C 1 *
+bit 955 O 1 *
+bit 954 O 1 *
+bit 953 O 1 *
+bit 952 O 1 *
+bit 951 O 1 *
+bit 950 O 1 *
+bit 949 O 1 *
+bit 948 O 1 *
+bit 947 O 1 *
+bit 946 O 1 *
+bit 945 O 1 *
+bit 944 O 1 *
+bit 943 O 1 *
+bit 942 O 1 *
+bit 941 O 1 *
+bit 940 O 1 *
+bit 939 O 1 *
+bit 938 O 1 *
+bit 937 O 1 *
+bit 936 O 1 *
+bit 935 O 1 *
+bit 934 O 1 *
+bit 933 O 1 *
+bit 932 O 1 *
+bit 931 O 1 *
+bit 930 O 1 *
+bit 929 O 1 *
+bit 928 O 1 *
+bit 927 O 1 *
+bit 926 O 1 *
+bit 925 O 1 *
+bit 924 O 1 *
+bit 923 O 1 *
+bit 922 O 1 *
+bit 921 O 1 *
+bit 920 O 1 *
+bit 919 O 1 *
+bit 918 O 1 *
+bit 917 O 1 *
+bit 916 O 1 *
+bit 915 O 1 *
+bit 914 O 1 *
+bit 913 O 1 *
+bit 912 O 1 *
+bit 911 O 1 *
+bit 910 O 1 *
+bit 909 O 1 *
+bit 908 O 1 *
+bit 907 O 1 *
+bit 906 O 1 *
+bit 905 O 1 *
+bit 904 O 1 *
+bit 903 O 1 *
+bit 902 O 1 *
+bit 901 O 1 *
+bit 900 O 1 *
+bit 899 O 1 *
+bit 898 O 1 *
+bit 897 O 1 *
+bit 896 O 1 *
+bit 895 O 1 *
+bit 894 O 1 *
+bit 893 O 1 *
+bit 892 O 1 *
+bit 891 O 1 *
+bit 890 O 1 *
+bit 889 O 1 *
+bit 888 O 1 *
+bit 887 O 1 *
+bit 886 O 1 *
+bit 885 O 1 *
+bit 884 O 1 *
+bit 883 O 1 *
+bit 882 O 1 *
+bit 881 O 1 *
+bit 880 I 1 IO_Y1
+bit 879 O 1 IO_Y1 878 1 Z
+bit 878 C 1 *
+bit 877 O 1 *
+bit 876 O 1 *
+bit 875 O 1 *
+bit 874 O 1 *
+bit 873 O 1 *
+bit 872 O 1 *
+bit 871 I 1 IO_W4
+bit 870 O 1 IO_W4 869 1 Z
+bit 869 C 1 *
+bit 868 I 1 IO_W3
+bit 867 O 1 IO_W3 866 1 Z
+bit 866 C 1 *
+bit 865 I 1 IO_W2
+bit 864 O 1 IO_W2 863 1 Z
+bit 863 C 1 *
+bit 862 I 1 IO_W1
+bit 861 O 1 IO_W1 860 1 Z
+bit 860 C 1 *
+bit 859 O 1 *
+bit 858 O 1 *
+bit 857 O 1 *
+bit 856 O 1 *
+bit 855 O 1 *
+bit 854 O 1 *
+bit 853 I 1 IO_V5
+bit 852 O 1 IO_V5 851 1 Z
+bit 851 C 1 *
+bit 850 I 1 IO_U5
+bit 849 O 1 IO_U5 848 1 Z
+bit 848 C 1 *
+bit 847 I 1 IO_V4
+bit 846 O 1 IO_V4 845 1 Z
+bit 845 C 1 *
+bit 844 I 1 IO_V3
+bit 843 O 1 IO_V3 842 1 Z
+bit 842 C 1 *
+bit 841 I 1 IO_V2
+bit 840 O 1 IO_V2 839 1 Z
+bit 839 C 1 *
+bit 838 I 1 IO_V1
+bit 837 O 1 IO_V1 836 1 Z
+bit 836 C 1 *
+bit 835 I 1 IO_T6
+bit 834 O 1 IO_T6 833 1 Z
+bit 833 C 1 *
+bit 832 I 1 IO_T5
+bit 831 O 1 IO_T5 830 1 Z
+bit 830 C 1 *
+bit 829 I 1 IO_U4
+bit 828 O 1 IO_U4 827 1 Z
+bit 827 C 1 *
+bit 826 I 1 IO_T4
+bit 825 O 1 IO_T4 824 1 Z
+bit 824 C 1 *
+bit 823 I 1 IO_U3
+bit 822 O 1 IO_U3 821 1 Z
+bit 821 C 1 *
+bit 820 I 1 IO_U2
+bit 819 O 1 IO_U2 818 1 Z
+bit 818 C 1 *
+bit 817 O 1 *
+bit 816 O 1 *
+bit 815 O 1 *
+bit 814 O 1 *
+bit 813 O 1 *
+bit 812 O 1 *
+bit 811 I 1 IO_T3
+bit 810 O 1 IO_T3 809 1 Z
+bit 809 C 1 *
+bit 808 I 1 IO_R4
+bit 807 O 1 IO_R4 806 1 Z
+bit 806 C 1 *
+bit 805 I 1 IO_T2
+bit 804 O 1 IO_T2 803 1 Z
+bit 803 C 1 *
+bit 802 I 1 IO_T1
+bit 801 O 1 IO_T1 800 1 Z
+bit 800 C 1 *
+bit 799 I 1 IO_R5
+bit 798 O 1 IO_R5 797 1 Z
+bit 797 C 1 *
+bit 796 I 1 IO_P6
+bit 795 O 1 IO_P6 794 1 Z
+bit 794 C 1 *
+bit 793 I 1 IO_R2
+bit 792 O 1 IO_R2 791 1 Z
+bit 791 C 1 *
+bit 790 I 1 IO_R1
+bit 789 O 1 IO_R1 788 1 Z
+bit 788 C 1 *
+bit 787 O 1 *
+bit 786 O 1 *
+bit 785 O 1 *
+bit 784 O 1 *
+bit 783 O 1 *
+bit 782 O 1 *
+bit 781 I 1 IO_P5
+bit 780 O 1 IO_P5 779 1 Z
+bit 779 C 1 *
+bit 778 I 1 IO_P4
+bit 777 O 1 IO_P4 776 1 Z
+bit 776 C 1 *
+bit 775 I 1 IO_P2
+bit 774 O 1 IO_P2 773 1 Z
+bit 773 C 1 *
+bit 772 I 1 IO_P1
+bit 771 O 1 IO_P1 770 1 Z
+bit 770 C 1 *
+bit 769 I 1 IO_N6
+bit 768 O 1 IO_N6 767 1 Z
+bit 767 C 1 *
+bit 766 I 1 IO_N5
+bit 765 O 1 IO_N5 764 1 Z
+bit 764 C 1 *
+bit 763 I 1 IO_N4
+bit 762 O 1 IO_N4 761 1 Z
+bit 761 C 1 *
+bit 760 I 1 IO_N3
+bit 759 O 1 IO_N3 758 1 Z
+bit 758 C 1 *
+bit 757 I 1 IO_N2
+bit 756 O 1 IO_N2 755 1 Z
+bit 755 C 1 *
+bit 754 I 1 IO_N1
+bit 753 O 1 IO_N1 752 1 Z
+bit 752 C 1 *
+bit 751 O 1 *
+bit 750 O 1 *
+bit 749 O 1 *
+bit 748 O 1 *
+bit 747 O 1 *
+bit 746 O 1 *
+bit 745 O 1 *
+bit 744 O 1 *
+bit 743 O 1 *
+bit 742 O 1 *
+bit 741 O 1 *
+bit 740 O 1 *
+bit 739 I 1 IO_M6
+bit 738 O 1 IO_M6 737 1 Z
+bit 737 C 1 *
+bit 736 I 1 IO_M5
+bit 735 O 1 IO_M5 734 1 Z
+bit 734 C 1 *
+bit 733 I 1 IO_M4
+bit 732 O 1 IO_M4 731 1 Z
+bit 731 C 1 *
+bit 730 I 1 IO_M3
+bit 729 O 1 IO_M3 728 1 Z
+bit 728 C 1 *
+bit 727 I 1 IO_M2
+bit 726 O 1 IO_M2 725 1 Z
+bit 725 C 1 *
+bit 724 I 1 IO_M1
+bit 723 O 1 IO_M1 722 1 Z
+bit 722 C 1 *
+bit 721 I 1 IO_L1
+bit 720 O 1 IO_L1 719 1 Z
+bit 719 C 1 *
+bit 718 I 1 IO_L2
+bit 717 O 1 IO_L2 716 1 Z
+bit 716 C 1 *
+bit 715 I 1 IO_L3
+bit 714 O 1 IO_L3 713 1 Z
+bit 713 C 1 *
+bit 712 I 1 IO_L4
+bit 711 O 1 IO_L4 710 1 Z
+bit 710 C 1 *
+bit 709 I 1 IO_L5
+bit 708 O 1 IO_L5 707 1 Z
+bit 707 C 1 *
+bit 706 I 1 IO_L6
+bit 705 O 1 IO_L6 704 1 Z
+bit 704 C 1 *
+bit 703 O 1 *
+bit 702 O 1 *
+bit 701 O 1 *
+bit 700 O 1 *
+bit 699 O 1 *
+bit 698 O 1 *
+bit 697 O 1 *
+bit 696 O 1 *
+bit 695 O 1 *
+bit 694 O 1 *
+bit 693 O 1 *
+bit 692 O 1 *
+bit 691 I 1 IO_K1
+bit 690 O 1 IO_K1 689 1 Z
+bit 689 C 1 *
+bit 688 I 1 IO_K2
+bit 687 O 1 IO_K2 686 1 Z
+bit 686 C 1 *
+bit 685 I 1 IO_K3
+bit 684 O 1 IO_K3 683 1 Z
+bit 683 C 1 *
+bit 682 I 1 IO_K4
+bit 681 O 1 IO_K4 680 1 Z
+bit 680 C 1 *
+bit 679 I 1 IO_K5
+bit 678 O 1 IO_K5 677 1 Z
+bit 677 C 1 *
+bit 676 I 1 IO_K6
+bit 675 O 1 IO_K6 674 1 Z
+bit 674 C 1 *
+bit 673 I 1 IO_J1
+bit 672 O 1 IO_J1 671 1 Z
+bit 671 C 1 *
+bit 670 I 1 IO_J2
+bit 669 O 1 IO_J2 668 1 Z
+bit 668 C 1 *
+bit 667 I 1 IO_J5
+bit 666 O 1 IO_J5 665 1 Z
+bit 665 C 1 *
+bit 664 I 1 IO_J6
+bit 663 O 1 IO_J6 662 1 Z
+bit 662 C 1 *
+bit 661 O 1 *
+bit 660 O 1 *
+bit 659 O 1 *
+bit 658 O 1 *
+bit 657 O 1 *
+bit 656 O 1 *
+bit 655 I 1 IO_J4
+bit 654 O 1 IO_J4 653 1 Z
+bit 653 C 1 *
+bit 652 I 1 IO_H4
+bit 651 O 1 IO_H4 650 1 Z
+bit 650 C 1 *
+bit 649 I 1 IO_H1
+bit 648 O 1 IO_H1 647 1 Z
+bit 647 C 1 *
+bit 646 I 1 IO_H2
+bit 645 O 1 IO_H2 644 1 Z
+bit 644 C 1 *
+bit 643 I 1 IO_G1
+bit 642 O 1 IO_G1 641 1 Z
+bit 641 C 1 *
+bit 640 I 1 IO_G2
+bit 639 O 1 IO_G2 638 1 Z
+bit 638 C 1 *
+bit 637 I 1 IO_G3
+bit 636 O 1 IO_G3 635 1 Z
+bit 635 C 1 *
+bit 634 I 1 IO_G4
+bit 633 O 1 IO_G4 632 1 Z
+bit 632 C 1 *
+bit 631 O 1 *
+bit 630 O 1 *
+bit 629 O 1 *
+bit 628 O 1 *
+bit 627 O 1 *
+bit 626 O 1 *
+bit 625 I 1 IO_H5
+bit 624 O 1 IO_H5 623 1 Z
+bit 623 C 1 *
+bit 622 I 1 IO_G5
+bit 621 O 1 IO_G5 620 1 Z
+bit 620 C 1 *
+bit 619 I 1 IO_F2
+bit 618 O 1 IO_F2 617 1 Z
+bit 617 C 1 *
+bit 616 I 1 IO_F3
+bit 615 O 1 IO_F3 614 1 Z
+bit 614 C 1 *
+bit 613 I 1 IO_G6
+bit 612 O 1 IO_G6 611 1 Z
+bit 611 C 1 *
+bit 610 I 1 IO_F5
+bit 609 O 1 IO_F5 608 1 Z
+bit 608 C 1 *
+bit 607 I 1 IO_E1
+bit 606 O 1 IO_E1 605 1 Z
+bit 605 C 1 *
+bit 604 I 1 IO_E2
+bit 603 O 1 IO_E2 602 1 Z
+bit 602 C 1 *
+bit 601 I 1 IO_F4
+bit 600 O 1 IO_F4 599 1 Z
+bit 599 C 1 *
+bit 598 I 1 IO_E3
+bit 597 O 1 IO_E3 596 1 Z
+bit 596 C 1 *
+bit 595 I 1 IO_D3
+bit 594 O 1 IO_D3 593 1 Z
+bit 593 C 1 *
+bit 592 I 1 IO_D2
+bit 591 O 1 IO_D2 590 1 Z
+bit 590 C 1 *
+bit 589 O 1 *
+bit 588 O 1 *
+bit 587 O 1 *
+bit 586 O 1 *
+bit 585 O 1 *
+bit 584 O 1 *
+bit 583 I 1 IO_E4
+bit 582 O 1 IO_E4 581 1 Z
+bit 581 C 1 *
+bit 580 I 1 IO_D4
+bit 579 O 1 IO_D4 578 1 Z
+bit 578 C 1 *
+bit 577 I 1 IO_D1
+bit 576 O 1 IO_D1 575 1 Z
+bit 575 C 1 *
+bit 574 I 1 IO_C1
+bit 573 O 1 IO_C1 572 1 Z
+bit 572 C 1 *
+bit 571 O 1 *
+bit 570 O 1 *
+bit 569 O 1 *
+bit 568 O 1 *
+bit 567 O 1 *
+bit 566 O 1 *
+bit 565 I 1 IO_C2
+bit 564 O 1 IO_C2 563 1 Z
+bit 563 C 1 *
+bit 562 O 1 *
+bit 561 O 1 *
+bit 560 O 1 *
+bit 559 O 1 *
+bit 558 O 1 *
+bit 557 O 1 *
+bit 556 O 1 *
+bit 555 O 1 *
+bit 554 O 1 *
+bit 553 O 1 *
+bit 552 O 1 *
+bit 551 O 1 *
+bit 550 O 1 *
+bit 549 O 1 *
+bit 548 O 1 *
+bit 547 O 1 *
+bit 546 O 1 *
+bit 545 O 1 *
+bit 544 O 1 *
+bit 543 O 1 *
+bit 542 O 1 *
+bit 541 O 1 *
+bit 540 O 1 *
+bit 539 O 1 *
+bit 538 O 1 *
+bit 537 O 1 *
+bit 536 O 1 *
+bit 535 O 1 *
+bit 534 O 1 *
+bit 533 O 1 *
+bit 532 O 1 *
+bit 531 O 1 *
+bit 530 O 1 *
+bit 529 O 1 *
+bit 528 O 1 *
+bit 527 O 1 *
+bit 526 O 1 *
+bit 525 O 1 *
+bit 524 O 1 *
+bit 523 O 1 *
+bit 522 O 1 *
+bit 521 O 1 *
+bit 520 O 1 *
+bit 519 O 1 *
+bit 518 O 1 *
+bit 517 O 1 *
+bit 516 O 1 *
+bit 515 O 1 *
+bit 514 O 1 *
+bit 513 O 1 *
+bit 512 O 1 *
+bit 511 O 1 *
+bit 510 O 1 *
+bit 509 O 1 *
+bit 508 O 1 *
+bit 507 O 1 *
+bit 506 O 1 *
+bit 505 O 1 *
+bit 504 O 1 *
+bit 503 O 1 *
+bit 502 O 1 *
+bit 501 O 1 *
+bit 500 O 1 *
+bit 499 O 1 *
+bit 498 O 1 *
+bit 497 O 1 *
+bit 496 O 1 *
+bit 495 O 1 *
+bit 494 O 1 *
+bit 493 O 1 *
+bit 492 O 1 *
+bit 491 O 1 *
+bit 490 O 1 *
+bit 489 O 1 *
+bit 488 O 1 *
+bit 487 I 1 IO_C3
+bit 486 O 1 IO_C3 485 1 Z
+bit 485 C 1 *
+bit 484 I 1 IO_C4
+bit 483 O 1 IO_C4 482 1 Z
+bit 482 C 1 *
+bit 481 O 1 *
+bit 480 I 1 HSWAP_EN_B3
+bit 479 I 1 IO_A3
+bit 478 O 1 IO_A3 477 1 Z
+bit 477 C 1 *
+bit 476 I 1 IO_B4
+bit 475 O 1 IO_B4 474 1 Z
+bit 474 C 1 *
+bit 473 I 1 IO_A4
+bit 472 O 1 IO_A4 471 1 Z
+bit 471 C 1 *
+bit 470 O 1 *
+bit 469 O 1 *
+bit 468 O 1 *
+bit 467 O 1 *
+bit 466 O 1 *
+bit 465 O 1 *
+bit 464 O 1 *
+bit 463 O 1 *
+bit 462 O 1 *
+bit 461 O 1 *
+bit 460 O 1 *
+bit 459 O 1 *
+bit 458 O 1 *
+bit 457 O 1 *
+bit 456 O 1 *
+bit 455 O 1 *
+bit 454 O 1 *
+bit 453 O 1 *
+bit 452 O 1 *
+bit 451 O 1 *
+bit 450 O 1 *
+bit 449 O 1 *
+bit 448 O 1 *
+bit 447 O 1 *
+bit 446 O 1 *
+bit 445 O 1 *
+bit 444 O 1 *
+bit 443 I 1 IO_E5
+bit 442 O 1 IO_E5 441 1 Z
+bit 441 C 1 *
+bit 440 I 1 IO_D5
+bit 439 O 1 IO_D5 438 1 Z
+bit 438 C 1 *
+bit 437 I 1 IO_C5
+bit 436 O 1 IO_C5 435 1 Z
+bit 435 C 1 *
+bit 434 O 1 *
+bit 433 O 1 *
+bit 432 O 1 *
+bit 431 O 1 *
+bit 430 O 1 *
+bit 429 O 1 *
+bit 428 O 1 *
+bit 427 O 1 *
+bit 426 O 1 *
+bit 425 O 1 *
+bit 424 O 1 *
+bit 423 O 1 *
+bit 422 O 1 *
+bit 421 O 1 *
+bit 420 O 1 *
+bit 419 I 1 IO_F6
+bit 418 O 1 IO_F6 417 1 Z
+bit 417 C 1 *
+bit 416 I 1 IO_B5
+bit 415 O 1 IO_B5 414 1 Z
+bit 414 C 1 *
+bit 413 I 1 IO_A5
+bit 412 O 1 IO_A5 411 1 Z
+bit 411 C 1 *
+bit 410 I 1 IO_E6
+bit 409 O 1 IO_E6 408 1 Z
+bit 408 C 1 *
+bit 407 I 1 IO_D6
+bit 406 O 1 IO_D6 405 1 Z
+bit 405 C 1 *
+bit 404 I 1 IO_F7
+bit 403 O 1 IO_F7 402 1 Z
+bit 402 C 1 *
+bit 401 O 1 *
+bit 400 O 1 *
+bit 399 O 1 *
+bit 398 O 1 *
+bit 397 O 1 *
+bit 396 O 1 *
+bit 395 O 1 *
+bit 394 O 1 *
+bit 393 O 1 *
+bit 392 O 1 *
+bit 391 O 1 *
+bit 390 O 1 *
+bit 389 O 1 *
+bit 388 O 1 *
+bit 387 O 1 *
+bit 386 O 1 *
+bit 385 O 1 *
+bit 384 O 1 *
+bit 383 O 1 *
+bit 382 O 1 *
+bit 381 O 1 *
+bit 380 O 1 *
+bit 379 O 1 *
+bit 378 O 1 *
+bit 377 O 1 *
+bit 376 O 1 *
+bit 375 O 1 *
+bit 374 O 1 *
+bit 373 O 1 *
+bit 372 O 1 *
+bit 371 I 1 IO_C6
+bit 370 O 1 IO_C6 369 1 Z
+bit 369 C 1 *
+bit 368 I 1 IO_B6
+bit 367 O 1 IO_B6 366 1 Z
+bit 366 C 1 *
+bit 365 I 1 IO_E7
+bit 364 O 1 IO_E7 363 1 Z
+bit 363 C 1 *
+bit 362 I 1 IO_D7
+bit 361 O 1 IO_D7 360 1 Z
+bit 360 C 1 *
+bit 359 O 1 *
+bit 358 O 1 *
+bit 357 O 1 *
+bit 356 O 1 *
+bit 355 O 1 *
+bit 354 O 1 *
+bit 353 O 1 *
+bit 352 O 1 *
+bit 351 O 1 *
+bit 350 O 1 *
+bit 349 O 1 *
+bit 348 O 1 *
+bit 347 O 1 *
+bit 346 O 1 *
+bit 345 O 1 *
+bit 344 I 1 IO_C7
+bit 343 O 1 IO_C7 342 1 Z
+bit 342 C 1 *
+bit 341 I 1 IO_B7
+bit 340 O 1 IO_B7 339 1 Z
+bit 339 C 1 *
+bit 338 I 1 IO_A7
+bit 337 O 1 IO_A7 336 1 Z
+bit 336 C 1 *
+bit 335 O 1 *
+bit 334 O 1 *
+bit 333 O 1 *
+bit 332 O 1 *
+bit 331 O 1 *
+bit 330 O 1 *
+bit 329 O 1 *
+bit 328 O 1 *
+bit 327 O 1 *
+bit 326 O 1 *
+bit 325 O 1 *
+bit 324 O 1 *
+bit 323 O 1 *
+bit 322 O 1 *
+bit 321 O 1 *
+bit 320 I 1 IO_E8
+bit 319 O 1 IO_E8 318 1 Z
+bit 318 C 1 *
+bit 317 I 1 IO_D8
+bit 316 O 1 IO_D8 315 1 Z
+bit 315 C 1 *
+bit 314 O 1 *
+bit 313 O 1 *
+bit 312 O 1 *
+bit 311 O 1 *
+bit 310 O 1 *
+bit 309 O 1 *
+bit 308 O 1 *
+bit 307 O 1 *
+bit 306 O 1 *
+bit 305 I 1 IO_B8
+bit 304 O 1 IO_B8 303 1 Z
+bit 303 C 1 *
+bit 302 I 1 IO_A8
+bit 301 O 1 IO_A8 300 1 Z
+bit 300 C 1 *
+bit 299 O 1 *
+bit 298 O 1 *
+bit 297 O 1 *
+bit 296 I 1 IO_F9
+bit 295 O 1 IO_F9 294 1 Z
+bit 294 C 1 *
+bit 293 I 1 IO_E9
+bit 292 O 1 IO_E9 291 1 Z
+bit 291 C 1 *
+bit 290 O 1 *
+bit 289 O 1 *
+bit 288 O 1 *
+bit 287 O 1 *
+bit 286 O 1 *
+bit 285 O 1 *
+bit 284 I 1 IO_D9
+bit 283 O 1 IO_D9 282 1 Z
+bit 282 C 1 *
+bit 281 I 1 IO_B9
+bit 280 O 1 IO_B9 279 1 Z
+bit 279 C 1 *
+bit 278 I 1 IO_A9
+bit 277 O 1 IO_A9 276 1 Z
+bit 276 C 1 *
+bit 275 I 1 IO_F10
+bit 274 O 1 IO_F10 273 1 Z
+bit 273 C 1 *
+bit 272 I 1 IO_E10
+bit 271 O 1 IO_E10 270 1 Z
+bit 270 C 1 *
+bit 269 I 1 IO_D10
+bit 268 O 1 IO_D10 267 1 Z
+bit 267 C 1 *
+bit 266 I 1 IO_C10
+bit 265 O 1 IO_C10 264 1 Z
+bit 264 C 1 *
+bit 263 I 1 IO_B10
+bit 262 O 1 IO_B10 261 1 Z
+bit 261 C 1 *
+bit 260 I 1 IO_F11
+bit 259 O 1 IO_F11 258 1 Z
+bit 258 C 1 *
+bit 257 I 1 IO_E11
+bit 256 O 1 IO_E11 255 1 Z
+bit 255 C 1 *
+bit 254 I 1 IO_A10
+bit 253 O 1 IO_A10 252 1 Z
+bit 252 C 1 *
+bit 251 I 1 IO_D11
+bit 250 O 1 IO_D11 249 1 Z
+bit 249 C 1 *
+bit 248 I 1 IO_C11
+bit 247 O 1 IO_C11 246 1 Z
+bit 246 C 1 *
+bit 245 I 1 IO_B11
+bit 244 O 1 IO_B11 243 1 Z
+bit 243 C 1 *
+bit 242 I 1 IO_A11
+bit 241 O 1 IO_A11 240 1 Z
+bit 240 C 1 *
+bit 239 I 1 IO_A12
+bit 238 O 1 IO_A12 237 1 Z
+bit 237 C 1 *
+bit 236 I 1 IO_B12
+bit 235 O 1 IO_B12 234 1 Z
+bit 234 C 1 *
+bit 233 I 1 IO_C12
+bit 232 O 1 IO_C12 231 1 Z
+bit 231 C 1 *
+bit 230 I 1 IO_D12
+bit 229 O 1 IO_D12 228 1 Z
+bit 228 C 1 *
+bit 227 I 1 IO_E12
+bit 226 O 1 IO_E12 225 1 Z
+bit 225 C 1 *
+bit 224 I 1 IO_F12
+bit 223 O 1 IO_F12 222 1 Z
+bit 222 C 1 *
+bit 221 I 1 IO_A13
+bit 220 O 1 IO_A13 219 1 Z
+bit 219 C 1 *
+bit 218 I 1 IO_B13
+bit 217 O 1 IO_B13 216 1 Z
+bit 216 C 1 *
+bit 215 I 1 IO_C13
+bit 214 O 1 IO_C13 213 1 Z
+bit 213 C 1 *
+bit 212 I 1 IO_D13
+bit 211 O 1 IO_D13 210 1 Z
+bit 210 C 1 *
+bit 209 I 1 IO_E13
+bit 208 O 1 IO_E13 207 1 Z
+bit 207 C 1 *
+bit 206 I 1 IO_A14
+bit 205 O 1 IO_A14 204 1 Z
+bit 204 C 1 *
+bit 203 I 1 IO_B14
+bit 202 O 1 IO_B14 201 1 Z
+bit 201 C 1 *
+bit 200 I 1 IO_D14
+bit 199 O 1 IO_D14 198 1 Z
+bit 198 C 1 *
+bit 197 I 1 IO_E14
+bit 196 O 1 IO_E14 195 1 Z
+bit 195 C 1 *
+bit 194 I 1 IO_F13
+bit 193 O 1 IO_F13 192 1 Z
+bit 192 C 1 *
+bit 191 O 1 *
+bit 190 O 1 *
+bit 189 O 1 *
+bit 188 O 1 *
+bit 187 O 1 *
+bit 186 O 1 *
+bit 185 I 1 IO_B15
+bit 184 O 1 IO_B15 183 1 Z
+bit 183 C 1 *
+bit 182 I 1 IO_A15
+bit 181 O 1 IO_A15 180 1 Z
+bit 180 C 1 *
+bit 179 O 1 *
+bit 178 O 1 *
+bit 177 O 1 *
+bit 176 I 1 IO_D15
+bit 175 O 1 IO_D15 174 1 Z
+bit 174 C 1 *
+bit 173 I 1 IO_E15
+bit 172 O 1 IO_E15 171 1 Z
+bit 171 C 1 *
+bit 170 O 1 *
+bit 169 O 1 *
+bit 168 O 1 *
+bit 167 O 1 *
+bit 166 O 1 *
+bit 165 O 1 *
+bit 164 I 1 IO_F14
+bit 163 O 1 IO_F14 162 1 Z
+bit 162 C 1 *
+bit 161 I 1 IO_A16
+bit 160 O 1 IO_A16 159 1 Z
+bit 159 C 1 *
+bit 158 I 1 IO_B16
+bit 157 O 1 IO_B16 156 1 Z
+bit 156 C 1 *
+bit 155 O 1 *
+bit 154 O 1 *
+bit 153 O 1 *
+bit 152 O 1 *
+bit 151 O 1 *
+bit 150 O 1 *
+bit 149 O 1 *
+bit 148 O 1 *
+bit 147 O 1 *
+bit 146 O 1 *
+bit 145 O 1 *
+bit 144 O 1 *
+bit 143 O 1 *
+bit 142 O 1 *
+bit 141 O 1 *
+bit 140 I 1 IO_C16
+bit 139 O 1 IO_C16 138 1 Z
+bit 138 C 1 *
+bit 137 I 1 IO_D16
+bit 136 O 1 IO_D16 135 1 Z
+bit 135 C 1 *
+bit 134 O 1 *
+bit 133 O 1 *
+bit 132 O 1 *
+bit 131 O 1 *
+bit 130 O 1 *
+bit 129 O 1 *
+bit 128 O 1 *
+bit 127 O 1 *
+bit 126 O 1 *
+bit 125 O 1 *
+bit 124 O 1 *
+bit 123 O 1 *
+bit 122 O 1 *
+bit 121 O 1 *
+bit 120 O 1 *
+bit 119 I 1 IO_E16
+bit 118 O 1 IO_E16 117 1 Z
+bit 117 C 1 *
+bit 116 I 1 IO_B17
+bit 115 O 1 IO_B17 114 1 Z
+bit 114 C 1 *
+bit 113 I 1 IO_C17
+bit 112 O 1 IO_C17 111 1 Z
+bit 111 C 1 *
+bit 110 I 1 IO_D17
+bit 109 O 1 IO_D17 108 1 Z
+bit 108 C 1 *
+bit 107 I 1 IO_E17
+bit 106 O 1 IO_E17 105 1 Z
+bit 105 C 1 *
+bit 104 O 1 *
+bit 103 O 1 *
+bit 102 O 1 *
+bit 101 O 1 *
+bit 100 O 1 *
+bit 99 O 1 *
+bit 98 O 1 *
+bit 97 O 1 *
+bit 96 O 1 *
+bit 95 O 1 *
+bit 94 O 1 *
+bit 93 O 1 *
+bit 92 O 1 *
+bit 91 O 1 *
+bit 90 O 1 *
+bit 89 O 1 *
+bit 88 O 1 *
+bit 87 O 1 *
+bit 86 O 1 *
+bit 85 O 1 *
+bit 84 O 1 *
+bit 83 O 1 *
+bit 82 O 1 *
+bit 81 O 1 *
+bit 80 O 1 *
+bit 79 O 1 *
+bit 78 O 1 *
+bit 77 O 1 *
+bit 76 O 1 *
+bit 75 O 1 *
+bit 74 I 1 IO_F16
+bit 73 O 1 IO_F16 72 1 Z
+bit 72 C 1 *
+bit 71 I 1 IO_A18
+bit 70 O 1 IO_A18 69 1 Z
+bit 69 C 1 *
+bit 68 I 1 IO_B18
+bit 67 O 1 IO_B18 66 1 Z
+bit 66 C 1 *
+bit 65 I 1 IO_C18
+bit 64 O 1 IO_C18 63 1 Z
+bit 63 C 1 *
+bit 62 I 1 IO_D18
+bit 61 O 1 IO_D18 60 1 Z
+bit 60 C 1 *
+bit 59 O 1 *
+bit 58 O 1 *
+bit 57 O 1 *
+bit 56 O 1 *
+bit 55 O 1 *
+bit 54 O 1 *
+bit 53 O 1 *
+bit 52 O 1 *
+bit 51 O 1 *
+bit 50 O 1 *
+bit 49 O 1 *
+bit 48 O 1 *
+bit 47 O 1 *
+bit 46 O 1 *
+bit 45 O 1 *
+bit 44 I 1 IO_F17
+bit 43 O 1 IO_F17 42 1 Z
+bit 42 C 1 *
+bit 41 I 1 IO_A19
+bit 40 O 1 IO_A19 39 1 Z
+bit 39 C 1 *
+bit 38 I 1 IO_B19
+bit 37 O 1 IO_B19 36 1 Z
+bit 36 C 1 *
+bit 35 O 1 *
+bit 34 O 1 *
+bit 33 O 1 *
+bit 32 O 1 *
+bit 31 O 1 *
+bit 30 O 1 *
+bit 29 O 1 *
+bit 28 O 1 *
+bit 27 O 1 *
+bit 26 O 1 *
+bit 25 O 1 *
+bit 24 O 1 *
+bit 23 O 1 *
+bit 22 O 1 *
+bit 21 O 1 *
+bit 20 O 1 *
+bit 19 O 1 *
+bit 18 O 1 *
+bit 17 O 1 *
+bit 16 O 1 *
+bit 15 O 1 *
+bit 14 O 1 *
+bit 13 O 1 *
+bit 12 O 1 *
+bit 11 O 1 *
+bit 10 O 1 *
+bit 9 O 1 *
+bit 8 O 1 *
+bit 7 O 1 *
+bit 6 O 1 *
+bit 5 I 1 IO_C19
+bit 4 O 1 IO_C19 3 1 Z
+bit 3 C 1 *
+bit 2 I 1 IO_B20
+bit 1 O 1 IO_B20 0 1 Z
+bit 0 C 1 *
--- /dev/null
+signal GND1
+signal GND2
+signal GND3
+signal GND4
+signal GND5
+signal GND6
+signal GND7
+signal GND8
+signal GND9
+signal GND10
+signal GND11
+signal GND12
+signal GND13
+signal GND14
+signal GND15
+signal GND16
+signal GND17
+signal GND18
+signal GND19
+signal GND20
+signal GND21
+signal GND22
+signal GND23
+signal GND24
+signal GND25
+signal GND26
+signal GND27
+signal GND28
+signal GND29
+signal GND30
+signal GND31
+signal GND32
+signal GND33
+signal GND34
+signal GND35
+signal GND36
+signal GND37
+signal GND38
+signal GND39
+signal GND40
+signal GND41
+signal GND42
+signal GND43
+signal GND44
+signal GND45
+signal GND46
+signal GND47
+signal GND48
+signal GND49
+signal GND50
+signal GND51
+signal GND52
+signal GND53
+signal GND54
+signal GND55
+signal GND56
+signal GND57
+signal GND58
+signal GND59
+signal GND60
+signal GND61
+signal GND62
+signal GND63
+signal GND64
+signal GND65
+signal GND66
+signal GND67
+signal GND68
+signal GND69
+signal GND70
+signal GND71
+signal GND72
+signal GND73
+signal GND74
+signal GND75
+signal GND76
+signal CCLK_AD26
+signal DONE_AC24
+signal HSWAP_EN_C2
+signal M0_AE3
+signal M1_AC3
+signal M2_AF3
+signal PROG_B
+signal TCK
+signal TDI
+signal TDO
+signal TMS
+signal VCCAUX1
+signal VCCAUX2
+signal VCCAUX3
+signal VCCAUX4
+signal VCCAUX5
+signal VCCAUX6
+signal VCCAUX7
+signal VCCAUX8
+signal VCCAUX9
+signal VCCAUX10
+signal VCCAUX11
+signal VCCAUX12
+signal VCCAUX13
+signal VCCAUX14
+signal VCCAUX15
+signal VCCAUX16
+signal VCCINT1
+signal VCCINT2
+signal VCCINT3
+signal VCCINT4
+signal VCCINT5
+signal VCCINT6
+signal VCCINT7
+signal VCCINT8
+signal VCCINT9
+signal VCCINT10
+signal VCCINT11
+signal VCCINT12
+signal VCCINT13
+signal VCCINT14
+signal VCCINT15
+signal VCCINT16
+signal VCCINT17
+signal VCCINT18
+signal VCCINT19
+signal VCCINT20
+signal VCCO01
+signal VCCO02
+signal VCCO03
+signal VCCO04
+signal VCCO05
+signal VCCO06
+signal VCCO07
+signal VCCO08
+signal VCCO11
+signal VCCO12
+signal VCCO13
+signal VCCO14
+signal VCCO15
+signal VCCO16
+signal VCCO17
+signal VCCO18
+signal VCCO21
+signal VCCO22
+signal VCCO23
+signal VCCO24
+signal VCCO25
+signal VCCO26
+signal VCCO27
+signal VCCO28
+signal VCCO31
+signal VCCO32
+signal VCCO33
+signal VCCO34
+signal VCCO35
+signal VCCO36
+signal VCCO37
+signal VCCO38
+signal VCCO41
+signal VCCO42
+signal VCCO43
+signal VCCO44
+signal VCCO45
+signal VCCO46
+signal VCCO47
+signal VCCO48
+signal VCCO51
+signal VCCO52
+signal VCCO53
+signal VCCO54
+signal VCCO55
+signal VCCO56
+signal VCCO57
+signal VCCO58
+signal VCCO61
+signal VCCO62
+signal VCCO63
+signal VCCO64
+signal VCCO65
+signal VCCO66
+signal VCCO67
+signal VCCO68
+signal VCCO71
+signal VCCO72
+signal VCCO73
+signal VCCO74
+signal VCCO75
+signal VCCO76
+signal VCCO77
+signal VCCO78
+signal IO_A3
+signal IO_A4
+signal IO_A5
+signal IO_A6
+signal IO_A7
+signal IO_A8
+signal IO_A10
+signal IO_A11
+signal IO_A12
+signal IO_A13
+signal IO_A14
+signal IO_A15
+signal IO_A16
+signal IO_A17
+signal IO_A19
+signal IO_A20
+signal IO_A21
+signal IO_A22
+signal IO_A23
+signal IO_B3
+signal IO_B4
+signal IO_B5
+signal IO_B6
+signal IO_B7
+signal IO_B8
+signal IO_B9
+signal IO_B10
+signal IO_B11
+signal IO_B12
+signal IO_B13
+signal IO_B14
+signal IO_B15
+signal IO_B16
+signal IO_B17
+signal IO_B18
+signal IO_B19
+signal IO_B20
+signal IO_B21
+signal IO_B22
+signal IO_B23
+signal IO_C4
+signal IO_C5
+signal IO_C6
+signal IO_C8
+signal IO_C9
+signal IO_C10
+signal IO_C12
+signal IO_C13
+signal IO_C14
+signal IO_C15
+signal IO_C17
+signal IO_C18
+signal IO_C19
+signal IO_C21
+signal IO_C22
+signal IO_C23
+signal IO_C25
+signal IO_C26
+signal IO_D1
+signal IO_D2
+signal IO_D5
+signal IO_D6
+signal IO_D7
+signal IO_D8
+signal IO_D9
+signal IO_D10
+signal IO_D11
+signal IO_D13
+signal IO_D14
+signal IO_D16
+signal IO_D17
+signal IO_D18
+signal IO_D19
+signal IO_D20
+signal IO_D21
+signal IO_D22
+signal IO_D25
+signal IO_D26
+signal IO_E1
+signal IO_E2
+signal IO_E3
+signal IO_E4
+signal IO_E5
+signal IO_E6
+signal IO_E7
+signal IO_E8
+signal IO_E9
+signal IO_E10
+signal IO_E11
+signal IO_E12
+signal IO_E13
+signal IO_E14
+signal IO_E15
+signal IO_E16
+signal IO_E17
+signal IO_E18
+signal IO_E19
+signal IO_E20
+signal IO_E21
+signal IO_E22
+signal IO_E23
+signal IO_E24
+signal IO_E25
+signal IO_E26
+signal IO_F1
+signal IO_F2
+signal IO_F3
+signal IO_F4
+signal IO_F5
+signal IO_F6
+signal IO_F7
+signal IO_F8
+signal IO_F9
+signal IO_F10
+signal IO_F11
+signal IO_F12
+signal IO_F13
+signal IO_F14
+signal IO_F15
+signal IO_F16
+signal IO_F17
+signal IO_F18
+signal IO_F19
+signal IO_F20
+signal IO_F21
+signal IO_F22
+signal IO_F23
+signal IO_F24
+signal IO_F25
+signal IO_F26
+signal IO_G1
+signal IO_G2
+signal IO_G4
+signal IO_G5
+signal IO_G6
+signal IO_G7
+signal IO_G8
+signal IO_G9
+signal IO_G10
+signal IO_G11
+signal IO_G12
+signal IO_G13
+signal IO_G14
+signal IO_G15
+signal IO_G16
+signal IO_G17
+signal IO_G18
+signal IO_G19
+signal IO_G20
+signal IO_G21
+signal IO_G22
+signal IO_G23
+signal IO_G25
+signal IO_G26
+signal IO_H1
+signal IO_H2
+signal IO_H3
+signal IO_H4
+signal IO_H5
+signal IO_H6
+signal IO_H7
+signal IO_H11
+signal IO_H12
+signal IO_H13
+signal IO_H14
+signal IO_H15
+signal IO_H16
+signal IO_H20
+signal IO_H21
+signal IO_H22
+signal IO_H23
+signal IO_H24
+signal IO_H25
+signal IO_H26
+signal IO_J2
+signal IO_J3
+signal IO_J4
+signal IO_J5
+signal IO_J6
+signal IO_J7
+signal IO_J20
+signal IO_J21
+signal IO_J22
+signal IO_J23
+signal IO_J24
+signal IO_J25
+signal IO_K1
+signal IO_K2
+signal IO_K3
+signal IO_K4
+signal IO_K5
+signal IO_K6
+signal IO_K7
+signal IO_K20
+signal IO_K21
+signal IO_K22
+signal IO_K23
+signal IO_K24
+signal IO_K25
+signal IO_K26
+signal IO_L1
+signal IO_L2
+signal IO_L4
+signal IO_L5
+signal IO_L6
+signal IO_L7
+signal IO_L8
+signal IO_L19
+signal IO_L20
+signal IO_L21
+signal IO_L22
+signal IO_L23
+signal IO_L25
+signal IO_L26
+signal IO_M1
+signal IO_M2
+signal IO_M3
+signal IO_M5
+signal IO_M6
+signal IO_M7
+signal IO_M8
+signal IO_M19
+signal IO_M20
+signal IO_M21
+signal IO_M22
+signal IO_M24
+signal IO_M25
+signal IO_M26
+signal IO_N1
+signal IO_N2
+signal IO_N3
+signal IO_N4
+signal IO_N5
+signal IO_N6
+signal IO_N7
+signal IO_N8
+signal IO_N19
+signal IO_N20
+signal IO_N21
+signal IO_N22
+signal IO_N23
+signal IO_N24
+signal IO_N25
+signal IO_N26
+signal IO_P1
+signal IO_P2
+signal IO_P3
+signal IO_P4
+signal IO_P5
+signal IO_P6
+signal IO_P7
+signal IO_P8
+signal IO_P19
+signal IO_P20
+signal IO_P21
+signal IO_P22
+signal IO_P23
+signal IO_P24
+signal IO_P25
+signal IO_P26
+signal IO_R1
+signal IO_R2
+signal IO_R3
+signal IO_R5
+signal IO_R6
+signal IO_R7
+signal IO_R8
+signal IO_R19
+signal IO_R20
+signal IO_R21
+signal IO_R22
+signal IO_R24
+signal IO_R25
+signal IO_R26
+signal IO_T1
+signal IO_T2
+signal IO_T4
+signal IO_T5
+signal IO_T6
+signal IO_T7
+signal IO_T8
+signal IO_T19
+signal IO_T20
+signal IO_T21
+signal IO_T22
+signal IO_T23
+signal IO_T25
+signal IO_T26
+signal IO_U1
+signal IO_U2
+signal IO_U3
+signal IO_U4
+signal IO_U5
+signal IO_U6
+signal IO_U7
+signal IO_U20
+signal IO_U21
+signal IO_U22
+signal IO_U23
+signal IO_U24
+signal IO_U25
+signal IO_U26
+signal IO_V2
+signal IO_V3
+signal IO_V4
+signal IO_V5
+signal IO_V6
+signal IO_V7
+signal IO_V20
+signal IO_V21
+signal IO_V22
+signal IO_V23
+signal IO_V24
+signal IO_V25
+signal IO_W1
+signal IO_W2
+signal IO_W3
+signal IO_W4
+signal IO_W5
+signal IO_W6
+signal IO_W7
+signal IO_W11
+signal IO_W12
+signal IO_W13
+signal IO_W14
+signal IO_W15
+signal IO_W16
+signal IO_W20
+signal IO_W21
+signal IO_W22
+signal IO_W23
+signal IO_W24
+signal IO_W25
+signal IO_W26
+signal IO_Y1
+signal IO_Y2
+signal IO_Y4
+signal IO_Y5
+signal IO_Y6
+signal IO_Y7
+signal IO_Y8
+signal IO_Y9
+signal IO_Y10
+signal IO_Y11
+signal IO_Y12
+signal IO_Y13
+signal IO_Y14
+signal IO_Y15
+signal IO_Y16
+signal IO_Y17
+signal IO_Y18
+signal IO_Y19
+signal IO_Y20
+signal IO_Y21
+signal IO_Y22
+signal IO_Y23
+signal IO_Y25
+signal IO_Y26
+signal IO_AA1
+signal IO_AA2
+signal IO_AA3
+signal IO_AA4
+signal IO_AA5
+signal IO_AA6
+signal IO_AA7
+signal IO_AA8
+signal IO_AA9
+signal IO_AA10
+signal IO_AA11
+signal IO_AA12
+signal IO_AA13
+signal IO_AA14
+signal IO_AA15
+signal IO_AA16
+signal IO_AA17
+signal IO_AA18
+signal IO_AA19
+signal IO_AA20
+signal IO_AA21
+signal IO_AA22
+signal IO_AA23
+signal IO_AA24
+signal IO_AA25
+signal IO_AA26
+signal IO_AB1
+signal IO_AB2
+signal IO_AB3
+signal IO_AB4
+signal IO_AB5
+signal IO_AB6
+signal IO_AB7
+signal IO_AB8
+signal IO_AB9
+signal IO_AB10
+signal IO_AB11
+signal IO_AB12
+signal IO_AB13
+signal IO_AB14
+signal IO_AB15
+signal IO_AB16
+signal IO_AB17
+signal IO_AB18
+signal IO_AB19
+signal IO_AB20
+signal IO_AB21
+signal IO_AB22
+signal IO_AB23
+signal IO_AB24
+signal IO_AB25
+signal IO_AB26
+signal IO_AC1
+signal IO_AC2
+signal IO_AC5
+signal IO_AC6
+signal IO_AC7
+signal IO_AC8
+signal IO_AC9
+signal IO_AC10
+signal IO_AC11
+signal IO_AC13
+signal IO_AC14
+signal IO_AC16
+signal IO_AC17
+signal IO_AC18
+signal IO_AC19
+signal IO_AC20
+signal IO_AC21
+signal IO_AC22
+signal IO_AC25
+signal IO_AC26
+signal IO_AD1
+signal IO_AD2
+signal IO_AD4
+signal IO_AD5
+signal IO_AD6
+signal IO_AD8
+signal IO_AD9
+signal IO_AD10
+signal IO_AD12
+signal IO_AD13
+signal IO_AD14
+signal IO_AD15
+signal IO_AD17
+signal IO_AD18
+signal IO_AD19
+signal IO_AD21
+signal IO_AD22
+signal IO_AD23
+signal IO_AD25
+signal IO_AE4
+signal IO_AE5
+signal IO_AE6
+signal IO_AE7
+signal IO_AE8
+signal IO_AE9
+signal IO_AE10
+signal IO_AE11
+signal IO_AE12
+signal IO_AE13
+signal IO_AE14
+signal IO_AE15
+signal IO_AE16
+signal IO_AE17
+signal IO_AE18
+signal IO_AE19
+signal IO_AE20
+signal IO_AE21
+signal IO_AE22
+signal IO_AE23
+signal IO_AE24
+signal IO_AF4
+signal IO_AF5
+signal IO_AF6
+signal IO_AF7
+signal IO_AF8
+signal IO_AF10
+signal IO_AF11
+signal IO_AF12
+signal IO_AF13
+signal IO_AF14
+signal IO_AF15
+signal IO_AF16
+signal IO_AF17
+signal IO_AF19
+signal IO_AF20
+signal IO_AF21
+signal IO_AF22
+signal IO_AF23
+
+register BSR 1931
+register BR 1
+register DIR 32
+
+instruction length 6
+
+instruction EXTEST 000000 BSR
+instruction SAMPLE/PRELOAD 000001 BSR
+instruction IDCODE 001001 DIR
+instruction BYPASS 111111 BR
+
+bit 1930 I 1 IO_C25
+bit 1929 O 1 IO_C25 1928 1 Z
+bit 1928 C 1 *
+bit 1927 I 1 IO_C26
+bit 1926 O 1 IO_C26 1925 1 Z
+bit 1925 C 1 *
+bit 1924 I 1 IO_E23
+bit 1923 O 1 IO_E23 1922 1 Z
+bit 1922 C 1 *
+bit 1921 I 1 IO_E24
+bit 1920 O 1 IO_E24 1919 1 Z
+bit 1919 C 1 *
+bit 1918 I 1 IO_D25
+bit 1917 O 1 IO_D25 1916 1 Z
+bit 1916 C 1 *
+bit 1915 I 1 IO_D26
+bit 1914 O 1 IO_D26 1913 1 Z
+bit 1913 C 1 *
+bit 1912 I 1 IO_F22
+bit 1911 O 1 IO_F22 1910 1 Z
+bit 1910 C 1 *
+bit 1909 O 1 *
+bit 1908 O 1 *
+bit 1907 O 1 *
+bit 1906 I 1 IO_E25
+bit 1905 O 1 IO_E25 1904 1 Z
+bit 1904 C 1 *
+bit 1903 I 1 IO_E26
+bit 1902 O 1 IO_E26 1901 1 Z
+bit 1901 C 1 *
+bit 1900 I 1 IO_G20
+bit 1899 O 1 IO_G20 1898 1 Z
+bit 1898 C 1 *
+bit 1897 I 1 IO_G21
+bit 1896 O 1 IO_G21 1895 1 Z
+bit 1895 C 1 *
+bit 1894 I 1 IO_F23
+bit 1893 O 1 IO_F23 1892 1 Z
+bit 1892 C 1 *
+bit 1891 I 1 IO_F24
+bit 1890 O 1 IO_F24 1889 1 Z
+bit 1889 C 1 *
+bit 1888 I 1 IO_G22
+bit 1887 O 1 IO_G22 1886 1 Z
+bit 1886 C 1 *
+bit 1885 I 1 IO_G23
+bit 1884 O 1 IO_G23 1883 1 Z
+bit 1883 C 1 *
+bit 1882 I 1 IO_F25
+bit 1881 O 1 IO_F25 1880 1 Z
+bit 1880 C 1 *
+bit 1879 I 1 IO_F26
+bit 1878 O 1 IO_F26 1877 1 Z
+bit 1877 C 1 *
+bit 1876 I 1 IO_G25
+bit 1875 O 1 IO_G25 1874 1 Z
+bit 1874 C 1 *
+bit 1873 I 1 IO_G26
+bit 1872 O 1 IO_G26 1871 1 Z
+bit 1871 C 1 *
+bit 1870 O 1 *
+bit 1869 O 1 *
+bit 1868 O 1 *
+bit 1867 O 1 *
+bit 1866 O 1 *
+bit 1865 O 1 *
+bit 1864 O 1 *
+bit 1863 O 1 *
+bit 1862 O 1 *
+bit 1861 O 1 *
+bit 1860 O 1 *
+bit 1859 O 1 *
+bit 1858 O 1 *
+bit 1857 O 1 *
+bit 1856 O 1 *
+bit 1855 O 1 *
+bit 1854 O 1 *
+bit 1853 O 1 *
+bit 1852 I 1 IO_H20
+bit 1851 O 1 IO_H20 1850 1 Z
+bit 1850 C 1 *
+bit 1849 I 1 IO_H21
+bit 1848 O 1 IO_H21 1847 1 Z
+bit 1847 C 1 *
+bit 1846 O 1 *
+bit 1845 O 1 *
+bit 1844 O 1 *
+bit 1843 O 1 *
+bit 1842 O 1 *
+bit 1841 O 1 *
+bit 1840 I 1 IO_H22
+bit 1839 O 1 IO_H22 1838 1 Z
+bit 1838 C 1 *
+bit 1837 I 1 IO_J21
+bit 1836 O 1 IO_J21 1835 1 Z
+bit 1835 C 1 *
+bit 1834 I 1 IO_H23
+bit 1833 O 1 IO_H23 1832 1 Z
+bit 1832 C 1 *
+bit 1831 I 1 IO_H24
+bit 1830 O 1 IO_H24 1829 1 Z
+bit 1829 C 1 *
+bit 1828 O 1 *
+bit 1827 O 1 *
+bit 1826 O 1 *
+bit 1825 O 1 *
+bit 1824 O 1 *
+bit 1823 O 1 *
+bit 1822 I 1 IO_H25
+bit 1821 O 1 IO_H25 1820 1 Z
+bit 1820 C 1 *
+bit 1819 I 1 IO_H26
+bit 1818 O 1 IO_H26 1817 1 Z
+bit 1817 C 1 *
+bit 1816 I 1 IO_J20
+bit 1815 O 1 IO_J20 1814 1 Z
+bit 1814 C 1 *
+bit 1813 I 1 IO_K20
+bit 1812 O 1 IO_K20 1811 1 Z
+bit 1811 C 1 *
+bit 1810 I 1 IO_J22
+bit 1809 O 1 IO_J22 1808 1 Z
+bit 1808 C 1 *
+bit 1807 I 1 IO_J23
+bit 1806 O 1 IO_J23 1805 1 Z
+bit 1805 C 1 *
+bit 1804 I 1 IO_J24
+bit 1803 O 1 IO_J24 1802 1 Z
+bit 1802 C 1 *
+bit 1801 I 1 IO_J25
+bit 1800 O 1 IO_J25 1799 1 Z
+bit 1799 C 1 *
+bit 1798 I 1 IO_K21
+bit 1797 O 1 IO_K21 1796 1 Z
+bit 1796 C 1 *
+bit 1795 I 1 IO_K22
+bit 1794 O 1 IO_K22 1793 1 Z
+bit 1793 C 1 *
+bit 1792 I 1 IO_K23
+bit 1791 O 1 IO_K23 1790 1 Z
+bit 1790 C 1 *
+bit 1789 I 1 IO_K24
+bit 1788 O 1 IO_K24 1787 1 Z
+bit 1787 C 1 *
+bit 1786 O 1 *
+bit 1785 O 1 *
+bit 1784 O 1 *
+bit 1783 O 1 *
+bit 1782 O 1 *
+bit 1781 O 1 *
+bit 1780 I 1 IO_K25
+bit 1779 O 1 IO_K25 1778 1 Z
+bit 1778 C 1 *
+bit 1777 I 1 IO_K26
+bit 1776 O 1 IO_K26 1775 1 Z
+bit 1775 C 1 *
+bit 1774 I 1 IO_L19
+bit 1773 O 1 IO_L19 1772 1 Z
+bit 1772 C 1 *
+bit 1771 I 1 IO_L20
+bit 1770 O 1 IO_L20 1769 1 Z
+bit 1769 C 1 *
+bit 1768 I 1 IO_L21
+bit 1767 O 1 IO_L21 1766 1 Z
+bit 1766 C 1 *
+bit 1765 I 1 IO_L22
+bit 1764 O 1 IO_L22 1763 1 Z
+bit 1763 C 1 *
+bit 1762 I 1 IO_L25
+bit 1761 O 1 IO_L25 1760 1 Z
+bit 1760 C 1 *
+bit 1759 I 1 IO_L26
+bit 1758 O 1 IO_L26 1757 1 Z
+bit 1757 C 1 *
+bit 1756 O 1 *
+bit 1755 O 1 *
+bit 1754 O 1 *
+bit 1753 O 1 *
+bit 1752 O 1 *
+bit 1751 O 1 *
+bit 1750 I 1 IO_M19
+bit 1749 O 1 IO_M19 1748 1 Z
+bit 1748 C 1 *
+bit 1747 I 1 IO_M20
+bit 1746 O 1 IO_M20 1745 1 Z
+bit 1745 C 1 *
+bit 1744 I 1 IO_M21
+bit 1743 O 1 IO_M21 1742 1 Z
+bit 1742 C 1 *
+bit 1741 I 1 IO_M22
+bit 1740 O 1 IO_M22 1739 1 Z
+bit 1739 C 1 *
+bit 1738 I 1 IO_L23
+bit 1737 O 1 IO_L23 1736 1 Z
+bit 1736 C 1 *
+bit 1735 I 1 IO_M24
+bit 1734 O 1 IO_M24 1733 1 Z
+bit 1733 C 1 *
+bit 1732 I 1 IO_M25
+bit 1731 O 1 IO_M25 1730 1 Z
+bit 1730 C 1 *
+bit 1729 I 1 IO_M26
+bit 1728 O 1 IO_M26 1727 1 Z
+bit 1727 C 1 *
+bit 1726 I 1 IO_N19
+bit 1725 O 1 IO_N19 1724 1 Z
+bit 1724 C 1 *
+bit 1723 I 1 IO_N20
+bit 1722 O 1 IO_N20 1721 1 Z
+bit 1721 C 1 *
+bit 1720 O 1 *
+bit 1719 O 1 *
+bit 1718 O 1 *
+bit 1717 O 1 *
+bit 1716 O 1 *
+bit 1715 O 1 *
+bit 1714 O 1 *
+bit 1713 O 1 *
+bit 1712 O 1 *
+bit 1711 O 1 *
+bit 1710 O 1 *
+bit 1709 O 1 *
+bit 1708 I 1 IO_N21
+bit 1707 O 1 IO_N21 1706 1 Z
+bit 1706 C 1 *
+bit 1705 I 1 IO_N22
+bit 1704 O 1 IO_N22 1703 1 Z
+bit 1703 C 1 *
+bit 1702 I 1 IO_N23
+bit 1701 O 1 IO_N23 1700 1 Z
+bit 1700 C 1 *
+bit 1699 I 1 IO_N24
+bit 1698 O 1 IO_N24 1697 1 Z
+bit 1697 C 1 *
+bit 1696 I 1 IO_N25
+bit 1695 O 1 IO_N25 1694 1 Z
+bit 1694 C 1 *
+bit 1693 I 1 IO_N26
+bit 1692 O 1 IO_N26 1691 1 Z
+bit 1691 C 1 *
+bit 1690 I 1 IO_P26
+bit 1689 O 1 IO_P26 1688 1 Z
+bit 1688 C 1 *
+bit 1687 I 1 IO_P25
+bit 1686 O 1 IO_P25 1685 1 Z
+bit 1685 C 1 *
+bit 1684 I 1 IO_P24
+bit 1683 O 1 IO_P24 1682 1 Z
+bit 1682 C 1 *
+bit 1681 I 1 IO_P23
+bit 1680 O 1 IO_P23 1679 1 Z
+bit 1679 C 1 *
+bit 1678 I 1 IO_P22
+bit 1677 O 1 IO_P22 1676 1 Z
+bit 1676 C 1 *
+bit 1675 I 1 IO_P21
+bit 1674 O 1 IO_P21 1673 1 Z
+bit 1673 C 1 *
+bit 1672 O 1 *
+bit 1671 O 1 *
+bit 1670 O 1 *
+bit 1669 O 1 *
+bit 1668 O 1 *
+bit 1667 O 1 *
+bit 1666 O 1 *
+bit 1665 O 1 *
+bit 1664 O 1 *
+bit 1663 O 1 *
+bit 1662 O 1 *
+bit 1661 O 1 *
+bit 1660 I 1 IO_P20
+bit 1659 O 1 IO_P20 1658 1 Z
+bit 1658 C 1 *
+bit 1657 I 1 IO_P19
+bit 1656 O 1 IO_P19 1655 1 Z
+bit 1655 C 1 *
+bit 1654 I 1 IO_R26
+bit 1653 O 1 IO_R26 1652 1 Z
+bit 1652 C 1 *
+bit 1651 I 1 IO_R25
+bit 1650 O 1 IO_R25 1649 1 Z
+bit 1649 C 1 *
+bit 1648 I 1 IO_R24
+bit 1647 O 1 IO_R24 1646 1 Z
+bit 1646 C 1 *
+bit 1645 I 1 IO_T23
+bit 1644 O 1 IO_T23 1643 1 Z
+bit 1643 C 1 *
+bit 1642 I 1 IO_R22
+bit 1641 O 1 IO_R22 1640 1 Z
+bit 1640 C 1 *
+bit 1639 I 1 IO_R21
+bit 1638 O 1 IO_R21 1637 1 Z
+bit 1637 C 1 *
+bit 1636 I 1 IO_R20
+bit 1635 O 1 IO_R20 1634 1 Z
+bit 1634 C 1 *
+bit 1633 I 1 IO_R19
+bit 1632 O 1 IO_R19 1631 1 Z
+bit 1631 C 1 *
+bit 1630 O 1 *
+bit 1629 O 1 *
+bit 1628 O 1 *
+bit 1627 O 1 *
+bit 1626 O 1 *
+bit 1625 O 1 *
+bit 1624 I 1 IO_T26
+bit 1623 O 1 IO_T26 1622 1 Z
+bit 1622 C 1 *
+bit 1621 I 1 IO_T25
+bit 1620 O 1 IO_T25 1619 1 Z
+bit 1619 C 1 *
+bit 1618 I 1 IO_T22
+bit 1617 O 1 IO_T22 1616 1 Z
+bit 1616 C 1 *
+bit 1615 I 1 IO_T21
+bit 1614 O 1 IO_T21 1613 1 Z
+bit 1613 C 1 *
+bit 1612 I 1 IO_T20
+bit 1611 O 1 IO_T20 1610 1 Z
+bit 1610 C 1 *
+bit 1609 I 1 IO_T19
+bit 1608 O 1 IO_T19 1607 1 Z
+bit 1607 C 1 *
+bit 1606 I 1 IO_U26
+bit 1605 O 1 IO_U26 1604 1 Z
+bit 1604 C 1 *
+bit 1603 I 1 IO_U25
+bit 1602 O 1 IO_U25 1601 1 Z
+bit 1601 C 1 *
+bit 1600 O 1 *
+bit 1599 O 1 *
+bit 1598 O 1 *
+bit 1597 O 1 *
+bit 1596 O 1 *
+bit 1595 O 1 *
+bit 1594 I 1 IO_U24
+bit 1593 O 1 IO_U24 1592 1 Z
+bit 1592 C 1 *
+bit 1591 I 1 IO_U23
+bit 1590 O 1 IO_U23 1589 1 Z
+bit 1589 C 1 *
+bit 1588 I 1 IO_U22
+bit 1587 O 1 IO_U22 1586 1 Z
+bit 1586 C 1 *
+bit 1585 I 1 IO_U21
+bit 1584 O 1 IO_U21 1583 1 Z
+bit 1583 C 1 *
+bit 1582 I 1 IO_V25
+bit 1581 O 1 IO_V25 1580 1 Z
+bit 1580 C 1 *
+bit 1579 I 1 IO_V24
+bit 1578 O 1 IO_V24 1577 1 Z
+bit 1577 C 1 *
+bit 1576 I 1 IO_V23
+bit 1575 O 1 IO_V23 1574 1 Z
+bit 1574 C 1 *
+bit 1573 I 1 IO_V22
+bit 1572 O 1 IO_V22 1571 1 Z
+bit 1571 C 1 *
+bit 1570 I 1 IO_U20
+bit 1569 O 1 IO_U20 1568 1 Z
+bit 1568 C 1 *
+bit 1567 I 1 IO_V20
+bit 1566 O 1 IO_V20 1565 1 Z
+bit 1565 C 1 *
+bit 1564 I 1 IO_W26
+bit 1563 O 1 IO_W26 1562 1 Z
+bit 1562 C 1 *
+bit 1561 I 1 IO_W25
+bit 1560 O 1 IO_W25 1559 1 Z
+bit 1559 C 1 *
+bit 1558 O 1 *
+bit 1557 O 1 *
+bit 1556 O 1 *
+bit 1555 O 1 *
+bit 1554 O 1 *
+bit 1553 O 1 *
+bit 1552 I 1 IO_W24
+bit 1551 O 1 IO_W24 1550 1 Z
+bit 1550 C 1 *
+bit 1549 I 1 IO_W23
+bit 1548 O 1 IO_W23 1547 1 Z
+bit 1547 C 1 *
+bit 1546 I 1 IO_V21
+bit 1545 O 1 IO_V21 1544 1 Z
+bit 1544 C 1 *
+bit 1543 I 1 IO_W22
+bit 1542 O 1 IO_W22 1541 1 Z
+bit 1541 C 1 *
+bit 1540 O 1 *
+bit 1539 O 1 *
+bit 1538 O 1 *
+bit 1537 O 1 *
+bit 1536 O 1 *
+bit 1535 O 1 *
+bit 1534 I 1 IO_Y26
+bit 1533 O 1 IO_Y26 1532 1 Z
+bit 1532 C 1 *
+bit 1531 I 1 IO_Y25
+bit 1530 O 1 IO_Y25 1529 1 Z
+bit 1529 C 1 *
+bit 1528 O 1 *
+bit 1527 O 1 *
+bit 1526 O 1 *
+bit 1525 O 1 *
+bit 1524 O 1 *
+bit 1523 O 1 *
+bit 1522 O 1 *
+bit 1521 O 1 *
+bit 1520 O 1 *
+bit 1519 O 1 *
+bit 1518 O 1 *
+bit 1517 O 1 *
+bit 1516 O 1 *
+bit 1515 O 1 *
+bit 1514 O 1 *
+bit 1513 O 1 *
+bit 1512 O 1 *
+bit 1511 O 1 *
+bit 1510 I 1 IO_W21
+bit 1509 O 1 IO_W21 1508 1 Z
+bit 1508 C 1 *
+bit 1507 I 1 IO_W20
+bit 1506 O 1 IO_W20 1505 1 Z
+bit 1505 C 1 *
+bit 1504 I 1 IO_AA26
+bit 1503 O 1 IO_AA26 1502 1 Z
+bit 1502 C 1 *
+bit 1501 I 1 IO_AA25
+bit 1500 O 1 IO_AA25 1499 1 Z
+bit 1499 C 1 *
+bit 1498 I 1 IO_Y23
+bit 1497 O 1 IO_Y23 1496 1 Z
+bit 1496 C 1 *
+bit 1495 I 1 IO_Y22
+bit 1494 O 1 IO_Y22 1493 1 Z
+bit 1493 C 1 *
+bit 1492 I 1 IO_AA24
+bit 1491 O 1 IO_AA24 1490 1 Z
+bit 1490 C 1 *
+bit 1489 I 1 IO_AA23
+bit 1488 O 1 IO_AA23 1487 1 Z
+bit 1487 C 1 *
+bit 1486 I 1 IO_AB26
+bit 1485 O 1 IO_AB26 1484 1 Z
+bit 1484 C 1 *
+bit 1483 I 1 IO_AB25
+bit 1482 O 1 IO_AB25 1481 1 Z
+bit 1481 C 1 *
+bit 1480 I 1 IO_Y21
+bit 1479 O 1 IO_Y21 1478 1 Z
+bit 1478 C 1 *
+bit 1477 I 1 IO_Y20
+bit 1476 O 1 IO_Y20 1475 1 Z
+bit 1475 C 1 *
+bit 1474 O 1 *
+bit 1473 O 1 *
+bit 1472 O 1 *
+bit 1471 O 1 *
+bit 1470 O 1 *
+bit 1469 O 1 *
+bit 1468 I 1 IO_AC26
+bit 1467 O 1 IO_AC26 1466 1 Z
+bit 1466 C 1 *
+bit 1465 I 1 IO_AC25
+bit 1464 O 1 IO_AC25 1463 1 Z
+bit 1463 C 1 *
+bit 1462 I 1 IO_AB24
+bit 1461 O 1 IO_AB24 1460 1 Z
+bit 1460 C 1 *
+bit 1459 I 1 IO_AB23
+bit 1458 O 1 IO_AB23 1457 1 Z
+bit 1457 C 1 *
+bit 1456 I 1 IO_AA22
+bit 1455 O 1 IO_AA22 1454 1 Z
+bit 1454 C 1 *
+bit 1453 I 1 IO_AA21
+bit 1452 O 1 IO_AA21 1451 1 Z
+bit 1451 C 1 *
+bit 1450 I 1 CCLK_AD26
+bit 1449 O 1 CCLK_AD26 1448 1 Z
+bit 1448 C 1 *
+bit 1447 I 1 DONE_AC24
+bit 1446 O 1 DONE_AC24 1445 1 Z
+bit 1445 C 1 *
+bit 1444 I 1 IO_AD25
+bit 1443 O 1 IO_AD25 1442 1 Z
+bit 1442 C 1 *
+bit 1441 I 1 IO_AB22
+bit 1440 O 1 IO_AB22 1439 1 Z
+bit 1439 C 1 *
+bit 1438 I 1 IO_AC22
+bit 1437 O 1 IO_AC22 1436 1 Z
+bit 1436 C 1 *
+bit 1435 O 1 *
+bit 1434 O 1 *
+bit 1433 O 1 *
+bit 1432 O 1 *
+bit 1431 O 1 *
+bit 1430 O 1 *
+bit 1429 O 1 *
+bit 1428 O 1 *
+bit 1427 O 1 *
+bit 1426 O 1 *
+bit 1425 O 1 *
+bit 1424 O 1 *
+bit 1423 O 1 *
+bit 1422 O 1 *
+bit 1421 O 1 *
+bit 1420 I 1 IO_AE24
+bit 1419 O 1 IO_AE24 1418 1 Z
+bit 1418 C 1 *
+bit 1417 I 1 IO_AF24
+bit 1416 O 1 IO_AF24 1415 1 Z
+bit 1415 C 1 *
+bit 1414 I 1 IO_AD23
+bit 1413 O 1 IO_AD23 1412 1 Z
+bit 1412 C 1 *
+bit 1411 I 1 IO_AE23
+bit 1410 O 1 IO_AE23 1409 1 Z
+bit 1409 C 1 *
+bit 1408 I 1 IO_AF23
+bit 1407 O 1 IO_AF23 1406 1 Z
+bit 1406 C 1 *
+bit 1405 I 1 IO_AD22
+bit 1404 O 1 IO_AD22 1403 1 Z
+bit 1403 C 1 *
+bit 1402 I 1 IO_AE22
+bit 1401 O 1 IO_AE22 1400 1 Z
+bit 1400 C 1 *
+bit 1399 I 1 IO_AF22
+bit 1398 O 1 IO_AF22 1397 1 Z
+bit 1397 C 1 *
+bit 1396 I 1 IO_AB21
+bit 1395 O 1 IO_AB21 1394 1 Z
+bit 1394 C 1 *
+bit 1393 I 1 IO_AC21
+bit 1392 O 1 IO_AC21 1391 1 Z
+bit 1391 C 1 *
+bit 1390 I 1 IO_AD21
+bit 1389 O 1 IO_AD21 1388 1 Z
+bit 1388 C 1 *
+bit 1387 I 1 IO_AE21
+bit 1386 O 1 IO_AE21 1385 1 Z
+bit 1385 C 1 *
+bit 1384 I 1 IO_AF21
+bit 1383 O 1 IO_AF21 1382 1 Z
+bit 1382 C 1 *
+bit 1381 I 1 IO_AB20
+bit 1380 O 1 IO_AB20 1379 1 Z
+bit 1379 C 1 *
+bit 1378 I 1 IO_AC20
+bit 1377 O 1 IO_AC20 1376 1 Z
+bit 1376 C 1 *
+bit 1375 I 1 IO_AE20
+bit 1374 O 1 IO_AE20 1373 1 Z
+bit 1373 C 1 *
+bit 1372 I 1 IO_AF20
+bit 1371 O 1 IO_AF20 1370 1 Z
+bit 1370 C 1 *
+bit 1369 I 1 IO_AA20
+bit 1368 O 1 IO_AA20 1367 1 Z
+bit 1367 C 1 *
+bit 1366 I 1 IO_Y19
+bit 1365 O 1 IO_Y19 1364 1 Z
+bit 1364 C 1 *
+bit 1363 I 1 IO_AA19
+bit 1362 O 1 IO_AA19 1361 1 Z
+bit 1361 C 1 *
+bit 1360 I 1 IO_AB19
+bit 1359 O 1 IO_AB19 1358 1 Z
+bit 1358 C 1 *
+bit 1357 I 1 IO_AC19
+bit 1356 O 1 IO_AC19 1355 1 Z
+bit 1355 C 1 *
+bit 1354 O 1 *
+bit 1353 O 1 *
+bit 1352 O 1 *
+bit 1351 O 1 *
+bit 1350 O 1 *
+bit 1349 O 1 *
+bit 1348 O 1 *
+bit 1347 O 1 *
+bit 1346 O 1 *
+bit 1345 O 1 *
+bit 1344 O 1 *
+bit 1343 O 1 *
+bit 1342 O 1 *
+bit 1341 O 1 *
+bit 1340 O 1 *
+bit 1339 I 1 IO_AD19
+bit 1338 O 1 IO_AD19 1337 1 Z
+bit 1337 C 1 *
+bit 1336 I 1 IO_AE19
+bit 1335 O 1 IO_AE19 1334 1 Z
+bit 1334 C 1 *
+bit 1333 I 1 IO_AF19
+bit 1332 O 1 IO_AF19 1331 1 Z
+bit 1331 C 1 *
+bit 1330 I 1 IO_Y18
+bit 1329 O 1 IO_Y18 1328 1 Z
+bit 1328 C 1 *
+bit 1327 I 1 IO_AA18
+bit 1326 O 1 IO_AA18 1325 1 Z
+bit 1325 C 1 *
+bit 1324 O 1 *
+bit 1323 O 1 *
+bit 1322 O 1 *
+bit 1321 I 1 IO_AB18
+bit 1320 O 1 IO_AB18 1319 1 Z
+bit 1319 C 1 *
+bit 1318 I 1 IO_AC18
+bit 1317 O 1 IO_AC18 1316 1 Z
+bit 1316 C 1 *
+bit 1315 I 1 IO_AD18
+bit 1314 O 1 IO_AD18 1313 1 Z
+bit 1313 C 1 *
+bit 1312 I 1 IO_AE18
+bit 1311 O 1 IO_AE18 1310 1 Z
+bit 1310 C 1 *
+bit 1309 I 1 IO_Y17
+bit 1308 O 1 IO_Y17 1307 1 Z
+bit 1307 C 1 *
+bit 1306 I 1 IO_AC17
+bit 1305 O 1 IO_AC17 1304 1 Z
+bit 1304 C 1 *
+bit 1303 I 1 IO_AA17
+bit 1302 O 1 IO_AA17 1301 1 Z
+bit 1301 C 1 *
+bit 1300 O 1 *
+bit 1299 O 1 *
+bit 1298 O 1 *
+bit 1297 O 1 *
+bit 1296 O 1 *
+bit 1295 O 1 *
+bit 1294 O 1 *
+bit 1293 O 1 *
+bit 1292 O 1 *
+bit 1291 O 1 *
+bit 1290 O 1 *
+bit 1289 O 1 *
+bit 1288 O 1 *
+bit 1287 O 1 *
+bit 1286 O 1 *
+bit 1285 I 1 IO_AD17
+bit 1284 O 1 IO_AD17 1283 1 Z
+bit 1283 C 1 *
+bit 1282 I 1 IO_AB17
+bit 1281 O 1 IO_AB17 1280 1 Z
+bit 1280 C 1 *
+bit 1279 I 1 IO_W16
+bit 1278 O 1 IO_W16 1277 1 Z
+bit 1277 C 1 *
+bit 1276 I 1 IO_AE17
+bit 1275 O 1 IO_AE17 1274 1 Z
+bit 1274 C 1 *
+bit 1273 I 1 IO_AF17
+bit 1272 O 1 IO_AF17 1271 1 Z
+bit 1271 C 1 *
+bit 1270 I 1 IO_Y16
+bit 1269 O 1 IO_Y16 1268 1 Z
+bit 1268 C 1 *
+bit 1267 I 1 IO_AA16
+bit 1266 O 1 IO_AA16 1265 1 Z
+bit 1265 C 1 *
+bit 1264 O 1 *
+bit 1263 O 1 *
+bit 1262 O 1 *
+bit 1261 I 1 IO_AB16
+bit 1260 O 1 IO_AB16 1259 1 Z
+bit 1259 C 1 *
+bit 1258 I 1 IO_AC16
+bit 1257 O 1 IO_AC16 1256 1 Z
+bit 1256 C 1 *
+bit 1255 I 1 IO_AE16
+bit 1254 O 1 IO_AE16 1253 1 Z
+bit 1253 C 1 *
+bit 1252 I 1 IO_AF16
+bit 1251 O 1 IO_AF16 1250 1 Z
+bit 1250 C 1 *
+bit 1249 I 1 IO_W15
+bit 1248 O 1 IO_W15 1247 1 Z
+bit 1247 C 1 *
+bit 1246 I 1 IO_Y15
+bit 1245 O 1 IO_Y15 1244 1 Z
+bit 1244 C 1 *
+bit 1243 I 1 IO_W14
+bit 1242 O 1 IO_W14 1241 1 Z
+bit 1241 C 1 *
+bit 1240 I 1 IO_AA15
+bit 1239 O 1 IO_AA15 1238 1 Z
+bit 1238 C 1 *
+bit 1237 I 1 IO_AB15
+bit 1236 O 1 IO_AB15 1235 1 Z
+bit 1235 C 1 *
+bit 1234 I 1 IO_AD15
+bit 1233 O 1 IO_AD15 1232 1 Z
+bit 1232 C 1 *
+bit 1231 I 1 IO_AE15
+bit 1230 O 1 IO_AE15 1229 1 Z
+bit 1229 C 1 *
+bit 1228 I 1 IO_AF15
+bit 1227 O 1 IO_AF15 1226 1 Z
+bit 1226 C 1 *
+bit 1225 I 1 IO_Y14
+bit 1224 O 1 IO_Y14 1223 1 Z
+bit 1223 C 1 *
+bit 1222 I 1 IO_AA14
+bit 1221 O 1 IO_AA14 1220 1 Z
+bit 1220 C 1 *
+bit 1219 I 1 IO_AB14
+bit 1218 O 1 IO_AB14 1217 1 Z
+bit 1217 C 1 *
+bit 1216 I 1 IO_AC14
+bit 1215 O 1 IO_AC14 1214 1 Z
+bit 1214 C 1 *
+bit 1213 I 1 IO_AD14
+bit 1212 O 1 IO_AD14 1211 1 Z
+bit 1211 C 1 *
+bit 1210 I 1 IO_AE14
+bit 1209 O 1 IO_AE14 1208 1 Z
+bit 1208 C 1 *
+bit 1207 I 1 IO_AF14
+bit 1206 O 1 IO_AF14 1205 1 Z
+bit 1205 C 1 *
+bit 1204 I 1 IO_AF13
+bit 1203 O 1 IO_AF13 1202 1 Z
+bit 1202 C 1 *
+bit 1201 I 1 IO_AE13
+bit 1200 O 1 IO_AE13 1199 1 Z
+bit 1199 C 1 *
+bit 1198 I 1 IO_AD13
+bit 1197 O 1 IO_AD13 1196 1 Z
+bit 1196 C 1 *
+bit 1195 I 1 IO_AC13
+bit 1194 O 1 IO_AC13 1193 1 Z
+bit 1193 C 1 *
+bit 1192 I 1 IO_AB13
+bit 1191 O 1 IO_AB13 1190 1 Z
+bit 1190 C 1 *
+bit 1189 I 1 IO_AA13
+bit 1188 O 1 IO_AA13 1187 1 Z
+bit 1187 C 1 *
+bit 1186 I 1 IO_Y13
+bit 1185 O 1 IO_Y13 1184 1 Z
+bit 1184 C 1 *
+bit 1183 I 1 IO_W13
+bit 1182 O 1 IO_W13 1181 1 Z
+bit 1181 C 1 *
+bit 1180 I 1 IO_AF12
+bit 1179 O 1 IO_AF12 1178 1 Z
+bit 1178 C 1 *
+bit 1177 I 1 IO_AE12
+bit 1176 O 1 IO_AE12 1175 1 Z
+bit 1175 C 1 *
+bit 1174 I 1 IO_AD12
+bit 1173 O 1 IO_AD12 1172 1 Z
+bit 1172 C 1 *
+bit 1171 I 1 IO_AB12
+bit 1170 O 1 IO_AB12 1169 1 Z
+bit 1169 C 1 *
+bit 1168 I 1 IO_AA12
+bit 1167 O 1 IO_AA12 1166 1 Z
+bit 1166 C 1 *
+bit 1165 I 1 IO_Y12
+bit 1164 O 1 IO_Y12 1163 1 Z
+bit 1163 C 1 *
+bit 1162 I 1 IO_W12
+bit 1161 O 1 IO_W12 1160 1 Z
+bit 1160 C 1 *
+bit 1159 I 1 IO_AC11
+bit 1158 O 1 IO_AC11 1157 1 Z
+bit 1157 C 1 *
+bit 1156 I 1 IO_AF11
+bit 1155 O 1 IO_AF11 1154 1 Z
+bit 1154 C 1 *
+bit 1153 I 1 IO_AE11
+bit 1152 O 1 IO_AE11 1151 1 Z
+bit 1151 C 1 *
+bit 1150 I 1 IO_AB11
+bit 1149 O 1 IO_AB11 1148 1 Z
+bit 1148 C 1 *
+bit 1147 I 1 IO_AA11
+bit 1146 O 1 IO_AA11 1145 1 Z
+bit 1145 C 1 *
+bit 1144 O 1 *
+bit 1143 O 1 *
+bit 1142 O 1 *
+bit 1141 I 1 IO_Y11
+bit 1140 O 1 IO_Y11 1139 1 Z
+bit 1139 C 1 *
+bit 1138 I 1 IO_W11
+bit 1137 O 1 IO_W11 1136 1 Z
+bit 1136 C 1 *
+bit 1135 I 1 IO_AF10
+bit 1134 O 1 IO_AF10 1133 1 Z
+bit 1133 C 1 *
+bit 1132 I 1 IO_AE10
+bit 1131 O 1 IO_AE10 1130 1 Z
+bit 1130 C 1 *
+bit 1129 I 1 IO_AD10
+bit 1128 O 1 IO_AD10 1127 1 Z
+bit 1127 C 1 *
+bit 1126 I 1 IO_AC10
+bit 1125 O 1 IO_AC10 1124 1 Z
+bit 1124 C 1 *
+bit 1123 I 1 IO_AB10
+bit 1122 O 1 IO_AB10 1121 1 Z
+bit 1121 C 1 *
+bit 1120 O 1 *
+bit 1119 O 1 *
+bit 1118 O 1 *
+bit 1117 O 1 *
+bit 1116 O 1 *
+bit 1115 O 1 *
+bit 1114 O 1 *
+bit 1113 O 1 *
+bit 1112 O 1 *
+bit 1111 O 1 *
+bit 1110 O 1 *
+bit 1109 O 1 *
+bit 1108 O 1 *
+bit 1107 O 1 *
+bit 1106 O 1 *
+bit 1105 I 1 IO_AA10
+bit 1104 O 1 IO_AA10 1103 1 Z
+bit 1103 C 1 *
+bit 1102 I 1 IO_Y10
+bit 1101 O 1 IO_Y10 1100 1 Z
+bit 1100 C 1 *
+bit 1099 O 1 *
+bit 1098 O 1 *
+bit 1097 O 1 *
+bit 1096 I 1 IO_AE9
+bit 1095 O 1 IO_AE9 1094 1 Z
+bit 1094 C 1 *
+bit 1093 I 1 IO_AD9
+bit 1092 O 1 IO_AD9 1091 1 Z
+bit 1091 C 1 *
+bit 1090 I 1 IO_AC9
+bit 1089 O 1 IO_AC9 1088 1 Z
+bit 1088 C 1 *
+bit 1087 O 1 *
+bit 1086 O 1 *
+bit 1085 O 1 *
+bit 1084 I 1 IO_AB9
+bit 1083 O 1 IO_AB9 1082 1 Z
+bit 1082 C 1 *
+bit 1081 I 1 IO_AA9
+bit 1080 O 1 IO_AA9 1079 1 Z
+bit 1079 C 1 *
+bit 1078 I 1 IO_Y9
+bit 1077 O 1 IO_Y9 1076 1 Z
+bit 1076 C 1 *
+bit 1075 I 1 IO_AF8
+bit 1074 O 1 IO_AF8 1073 1 Z
+bit 1073 C 1 *
+bit 1072 I 1 IO_AE8
+bit 1071 O 1 IO_AE8 1070 1 Z
+bit 1070 C 1 *
+bit 1069 O 1 *
+bit 1068 O 1 *
+bit 1067 O 1 *
+bit 1066 O 1 *
+bit 1065 O 1 *
+bit 1064 O 1 *
+bit 1063 O 1 *
+bit 1062 O 1 *
+bit 1061 O 1 *
+bit 1060 O 1 *
+bit 1059 O 1 *
+bit 1058 O 1 *
+bit 1057 O 1 *
+bit 1056 O 1 *
+bit 1055 O 1 *
+bit 1054 O 1 *
+bit 1053 O 1 *
+bit 1052 O 1 *
+bit 1051 I 1 IO_AD8
+bit 1050 O 1 IO_AD8 1049 1 Z
+bit 1049 C 1 *
+bit 1048 I 1 IO_AC8
+bit 1047 O 1 IO_AC8 1046 1 Z
+bit 1046 C 1 *
+bit 1045 I 1 IO_AB8
+bit 1044 O 1 IO_AB8 1043 1 Z
+bit 1043 C 1 *
+bit 1042 I 1 IO_AA8
+bit 1041 O 1 IO_AA8 1040 1 Z
+bit 1040 C 1 *
+bit 1039 I 1 IO_Y8
+bit 1038 O 1 IO_Y8 1037 1 Z
+bit 1037 C 1 *
+bit 1036 I 1 IO_AF7
+bit 1035 O 1 IO_AF7 1034 1 Z
+bit 1034 C 1 *
+bit 1033 I 1 IO_AE7
+bit 1032 O 1 IO_AE7 1031 1 Z
+bit 1031 C 1 *
+bit 1030 I 1 IO_AC7
+bit 1029 O 1 IO_AC7 1028 1 Z
+bit 1028 C 1 *
+bit 1027 I 1 IO_AB7
+bit 1026 O 1 IO_AB7 1025 1 Z
+bit 1025 C 1 *
+bit 1024 I 1 IO_AA7
+bit 1023 O 1 IO_AA7 1022 1 Z
+bit 1022 C 1 *
+bit 1021 I 1 IO_AF6
+bit 1020 O 1 IO_AF6 1019 1 Z
+bit 1019 C 1 *
+bit 1018 I 1 IO_AE6
+bit 1017 O 1 IO_AE6 1016 1 Z
+bit 1016 C 1 *
+bit 1015 I 1 IO_AD6
+bit 1014 O 1 IO_AD6 1013 1 Z
+bit 1013 C 1 *
+bit 1012 I 1 IO_AC6
+bit 1011 O 1 IO_AC6 1010 1 Z
+bit 1010 C 1 *
+bit 1009 I 1 IO_AF5
+bit 1008 O 1 IO_AF5 1007 1 Z
+bit 1007 C 1 *
+bit 1006 I 1 IO_AE5
+bit 1005 O 1 IO_AE5 1004 1 Z
+bit 1004 C 1 *
+bit 1003 I 1 IO_AD5
+bit 1002 O 1 IO_AD5 1001 1 Z
+bit 1001 C 1 *
+bit 1000 I 1 IO_AB6
+bit 999 O 1 IO_AB6 998 1 Z
+bit 998 C 1 *
+bit 997 I 1 IO_AA6
+bit 996 O 1 IO_AA6 995 1 Z
+bit 995 C 1 *
+bit 994 I 1 IO_AF4
+bit 993 O 1 IO_AF4 992 1 Z
+bit 992 C 1 *
+bit 991 I 1 IO_AE4
+bit 990 O 1 IO_AE4 989 1 Z
+bit 989 C 1 *
+bit 988 I 1 IO_AD4
+bit 987 O 1 IO_AD4 986 1 Z
+bit 986 C 1 *
+bit 985 O 1 *
+bit 984 O 1 *
+bit 983 O 1 *
+bit 982 O 1 *
+bit 981 O 1 *
+bit 980 O 1 *
+bit 979 O 1 *
+bit 978 O 1 *
+bit 977 O 1 *
+bit 976 O 1 *
+bit 975 O 1 *
+bit 974 O 1 *
+bit 973 O 1 *
+bit 972 O 1 *
+bit 971 O 1 *
+bit 970 I 1 IO_AC5
+bit 969 O 1 IO_AC5 968 1 Z
+bit 968 C 1 *
+bit 967 I 1 IO_AB5
+bit 966 O 1 IO_AB5 965 1 Z
+bit 965 C 1 *
+bit 964 I 1 M2_AF3
+bit 963 I 1 M0_AE3
+bit 962 I 1 M1_AC3
+bit 961 I 1 IO_AD2
+bit 960 O 1 IO_AD2 959 1 Z
+bit 959 C 1 *
+bit 958 I 1 IO_AD1
+bit 957 O 1 IO_AD1 956 1 Z
+bit 956 C 1 *
+bit 955 I 1 IO_AB4
+bit 954 O 1 IO_AB4 953 1 Z
+bit 953 C 1 *
+bit 952 I 1 IO_AB3
+bit 951 O 1 IO_AB3 950 1 Z
+bit 950 C 1 *
+bit 949 I 1 IO_AC2
+bit 948 O 1 IO_AC2 947 1 Z
+bit 947 C 1 *
+bit 946 I 1 IO_AC1
+bit 945 O 1 IO_AC1 944 1 Z
+bit 944 C 1 *
+bit 943 I 1 IO_AA5
+bit 942 O 1 IO_AA5 941 1 Z
+bit 941 C 1 *
+bit 940 O 1 *
+bit 939 O 1 *
+bit 938 O 1 *
+bit 937 I 1 IO_AB2
+bit 936 O 1 IO_AB2 935 1 Z
+bit 935 C 1 *
+bit 934 I 1 IO_AB1
+bit 933 O 1 IO_AB1 932 1 Z
+bit 932 C 1 *
+bit 931 I 1 IO_Y7
+bit 930 O 1 IO_Y7 929 1 Z
+bit 929 C 1 *
+bit 928 I 1 IO_Y6
+bit 927 O 1 IO_Y6 926 1 Z
+bit 926 C 1 *
+bit 925 I 1 IO_AA4
+bit 924 O 1 IO_AA4 923 1 Z
+bit 923 C 1 *
+bit 922 I 1 IO_AA3
+bit 921 O 1 IO_AA3 920 1 Z
+bit 920 C 1 *
+bit 919 I 1 IO_Y5
+bit 918 O 1 IO_Y5 917 1 Z
+bit 917 C 1 *
+bit 916 I 1 IO_Y4
+bit 915 O 1 IO_Y4 914 1 Z
+bit 914 C 1 *
+bit 913 I 1 IO_AA2
+bit 912 O 1 IO_AA2 911 1 Z
+bit 911 C 1 *
+bit 910 I 1 IO_AA1
+bit 909 O 1 IO_AA1 908 1 Z
+bit 908 C 1 *
+bit 907 I 1 IO_Y2
+bit 906 O 1 IO_Y2 905 1 Z
+bit 905 C 1 *
+bit 904 I 1 IO_Y1
+bit 903 O 1 IO_Y1 902 1 Z
+bit 902 C 1 *
+bit 901 O 1 *
+bit 900 O 1 *
+bit 899 O 1 *
+bit 898 O 1 *
+bit 897 O 1 *
+bit 896 O 1 *
+bit 895 O 1 *
+bit 894 O 1 *
+bit 893 O 1 *
+bit 892 O 1 *
+bit 891 O 1 *
+bit 890 O 1 *
+bit 889 O 1 *
+bit 888 O 1 *
+bit 887 O 1 *
+bit 886 O 1 *
+bit 885 O 1 *
+bit 884 O 1 *
+bit 883 I 1 IO_W7
+bit 882 O 1 IO_W7 881 1 Z
+bit 881 C 1 *
+bit 880 I 1 IO_W6
+bit 879 O 1 IO_W6 878 1 Z
+bit 878 C 1 *
+bit 877 O 1 *
+bit 876 O 1 *
+bit 875 O 1 *
+bit 874 O 1 *
+bit 873 O 1 *
+bit 872 O 1 *
+bit 871 I 1 IO_V6
+bit 870 O 1 IO_V6 869 1 Z
+bit 869 C 1 *
+bit 868 I 1 IO_W5
+bit 867 O 1 IO_W5 866 1 Z
+bit 866 C 1 *
+bit 865 I 1 IO_W4
+bit 864 O 1 IO_W4 863 1 Z
+bit 863 C 1 *
+bit 862 I 1 IO_W3
+bit 861 O 1 IO_W3 860 1 Z
+bit 860 C 1 *
+bit 859 O 1 *
+bit 858 O 1 *
+bit 857 O 1 *
+bit 856 O 1 *
+bit 855 O 1 *
+bit 854 O 1 *
+bit 853 I 1 IO_W2
+bit 852 O 1 IO_W2 851 1 Z
+bit 851 C 1 *
+bit 850 I 1 IO_W1
+bit 849 O 1 IO_W1 848 1 Z
+bit 848 C 1 *
+bit 847 I 1 IO_V7
+bit 846 O 1 IO_V7 845 1 Z
+bit 845 C 1 *
+bit 844 I 1 IO_U7
+bit 843 O 1 IO_U7 842 1 Z
+bit 842 C 1 *
+bit 841 I 1 IO_V5
+bit 840 O 1 IO_V5 839 1 Z
+bit 839 C 1 *
+bit 838 I 1 IO_V4
+bit 837 O 1 IO_V4 836 1 Z
+bit 836 C 1 *
+bit 835 I 1 IO_V3
+bit 834 O 1 IO_V3 833 1 Z
+bit 833 C 1 *
+bit 832 I 1 IO_V2
+bit 831 O 1 IO_V2 830 1 Z
+bit 830 C 1 *
+bit 829 I 1 IO_U6
+bit 828 O 1 IO_U6 827 1 Z
+bit 827 C 1 *
+bit 826 I 1 IO_U5
+bit 825 O 1 IO_U5 824 1 Z
+bit 824 C 1 *
+bit 823 I 1 IO_U4
+bit 822 O 1 IO_U4 821 1 Z
+bit 821 C 1 *
+bit 820 I 1 IO_U3
+bit 819 O 1 IO_U3 818 1 Z
+bit 818 C 1 *
+bit 817 O 1 *
+bit 816 O 1 *
+bit 815 O 1 *
+bit 814 O 1 *
+bit 813 O 1 *
+bit 812 O 1 *
+bit 811 I 1 IO_U2
+bit 810 O 1 IO_U2 809 1 Z
+bit 809 C 1 *
+bit 808 I 1 IO_U1
+bit 807 O 1 IO_U1 806 1 Z
+bit 806 C 1 *
+bit 805 I 1 IO_T8
+bit 804 O 1 IO_T8 803 1 Z
+bit 803 C 1 *
+bit 802 I 1 IO_T7
+bit 801 O 1 IO_T7 800 1 Z
+bit 800 C 1 *
+bit 799 I 1 IO_T6
+bit 798 O 1 IO_T6 797 1 Z
+bit 797 C 1 *
+bit 796 I 1 IO_T5
+bit 795 O 1 IO_T5 794 1 Z
+bit 794 C 1 *
+bit 793 I 1 IO_T2
+bit 792 O 1 IO_T2 791 1 Z
+bit 791 C 1 *
+bit 790 I 1 IO_T1
+bit 789 O 1 IO_T1 788 1 Z
+bit 788 C 1 *
+bit 787 O 1 *
+bit 786 O 1 *
+bit 785 O 1 *
+bit 784 O 1 *
+bit 783 O 1 *
+bit 782 O 1 *
+bit 781 I 1 IO_R8
+bit 780 O 1 IO_R8 779 1 Z
+bit 779 C 1 *
+bit 778 I 1 IO_R7
+bit 777 O 1 IO_R7 776 1 Z
+bit 776 C 1 *
+bit 775 I 1 IO_R6
+bit 774 O 1 IO_R6 773 1 Z
+bit 773 C 1 *
+bit 772 I 1 IO_R5
+bit 771 O 1 IO_R5 770 1 Z
+bit 770 C 1 *
+bit 769 I 1 IO_T4
+bit 768 O 1 IO_T4 767 1 Z
+bit 767 C 1 *
+bit 766 I 1 IO_R3
+bit 765 O 1 IO_R3 764 1 Z
+bit 764 C 1 *
+bit 763 I 1 IO_R2
+bit 762 O 1 IO_R2 761 1 Z
+bit 761 C 1 *
+bit 760 I 1 IO_R1
+bit 759 O 1 IO_R1 758 1 Z
+bit 758 C 1 *
+bit 757 I 1 IO_P8
+bit 756 O 1 IO_P8 755 1 Z
+bit 755 C 1 *
+bit 754 I 1 IO_P7
+bit 753 O 1 IO_P7 752 1 Z
+bit 752 C 1 *
+bit 751 O 1 *
+bit 750 O 1 *
+bit 749 O 1 *
+bit 748 O 1 *
+bit 747 O 1 *
+bit 746 O 1 *
+bit 745 O 1 *
+bit 744 O 1 *
+bit 743 O 1 *
+bit 742 O 1 *
+bit 741 O 1 *
+bit 740 O 1 *
+bit 739 I 1 IO_P6
+bit 738 O 1 IO_P6 737 1 Z
+bit 737 C 1 *
+bit 736 I 1 IO_P5
+bit 735 O 1 IO_P5 734 1 Z
+bit 734 C 1 *
+bit 733 I 1 IO_P4
+bit 732 O 1 IO_P4 731 1 Z
+bit 731 C 1 *
+bit 730 I 1 IO_P3
+bit 729 O 1 IO_P3 728 1 Z
+bit 728 C 1 *
+bit 727 I 1 IO_P2
+bit 726 O 1 IO_P2 725 1 Z
+bit 725 C 1 *
+bit 724 I 1 IO_P1
+bit 723 O 1 IO_P1 722 1 Z
+bit 722 C 1 *
+bit 721 I 1 IO_N1
+bit 720 O 1 IO_N1 719 1 Z
+bit 719 C 1 *
+bit 718 I 1 IO_N2
+bit 717 O 1 IO_N2 716 1 Z
+bit 716 C 1 *
+bit 715 I 1 IO_N3
+bit 714 O 1 IO_N3 713 1 Z
+bit 713 C 1 *
+bit 712 I 1 IO_N4
+bit 711 O 1 IO_N4 710 1 Z
+bit 710 C 1 *
+bit 709 I 1 IO_N5
+bit 708 O 1 IO_N5 707 1 Z
+bit 707 C 1 *
+bit 706 I 1 IO_N6
+bit 705 O 1 IO_N6 704 1 Z
+bit 704 C 1 *
+bit 703 O 1 *
+bit 702 O 1 *
+bit 701 O 1 *
+bit 700 O 1 *
+bit 699 O 1 *
+bit 698 O 1 *
+bit 697 O 1 *
+bit 696 O 1 *
+bit 695 O 1 *
+bit 694 O 1 *
+bit 693 O 1 *
+bit 692 O 1 *
+bit 691 I 1 IO_N7
+bit 690 O 1 IO_N7 689 1 Z
+bit 689 C 1 *
+bit 688 I 1 IO_N8
+bit 687 O 1 IO_N8 686 1 Z
+bit 686 C 1 *
+bit 685 I 1 IO_M1
+bit 684 O 1 IO_M1 683 1 Z
+bit 683 C 1 *
+bit 682 I 1 IO_M2
+bit 681 O 1 IO_M2 680 1 Z
+bit 680 C 1 *
+bit 679 I 1 IO_M3
+bit 678 O 1 IO_M3 677 1 Z
+bit 677 C 1 *
+bit 676 I 1 IO_L4
+bit 675 O 1 IO_L4 674 1 Z
+bit 674 C 1 *
+bit 673 I 1 IO_M6
+bit 672 O 1 IO_M6 671 1 Z
+bit 671 C 1 *
+bit 670 I 1 IO_M5
+bit 669 O 1 IO_M5 668 1 Z
+bit 668 C 1 *
+bit 667 I 1 IO_M7
+bit 666 O 1 IO_M7 665 1 Z
+bit 665 C 1 *
+bit 664 I 1 IO_M8
+bit 663 O 1 IO_M8 662 1 Z
+bit 662 C 1 *
+bit 661 O 1 *
+bit 660 O 1 *
+bit 659 O 1 *
+bit 658 O 1 *
+bit 657 O 1 *
+bit 656 O 1 *
+bit 655 I 1 IO_L1
+bit 654 O 1 IO_L1 653 1 Z
+bit 653 C 1 *
+bit 652 I 1 IO_L2
+bit 651 O 1 IO_L2 650 1 Z
+bit 650 C 1 *
+bit 649 I 1 IO_L5
+bit 648 O 1 IO_L5 647 1 Z
+bit 647 C 1 *
+bit 646 I 1 IO_L6
+bit 645 O 1 IO_L6 644 1 Z
+bit 644 C 1 *
+bit 643 I 1 IO_L7
+bit 642 O 1 IO_L7 641 1 Z
+bit 641 C 1 *
+bit 640 I 1 IO_L8
+bit 639 O 1 IO_L8 638 1 Z
+bit 638 C 1 *
+bit 637 I 1 IO_K1
+bit 636 O 1 IO_K1 635 1 Z
+bit 635 C 1 *
+bit 634 I 1 IO_K2
+bit 633 O 1 IO_K2 632 1 Z
+bit 632 C 1 *
+bit 631 O 1 *
+bit 630 O 1 *
+bit 629 O 1 *
+bit 628 O 1 *
+bit 627 O 1 *
+bit 626 O 1 *
+bit 625 I 1 IO_K3
+bit 624 O 1 IO_K3 623 1 Z
+bit 623 C 1 *
+bit 622 I 1 IO_K4
+bit 621 O 1 IO_K4 620 1 Z
+bit 620 C 1 *
+bit 619 I 1 IO_K5
+bit 618 O 1 IO_K5 617 1 Z
+bit 617 C 1 *
+bit 616 I 1 IO_K6
+bit 615 O 1 IO_K6 614 1 Z
+bit 614 C 1 *
+bit 613 I 1 IO_J2
+bit 612 O 1 IO_J2 611 1 Z
+bit 611 C 1 *
+bit 610 I 1 IO_J3
+bit 609 O 1 IO_J3 608 1 Z
+bit 608 C 1 *
+bit 607 I 1 IO_J4
+bit 606 O 1 IO_J4 605 1 Z
+bit 605 C 1 *
+bit 604 I 1 IO_J5
+bit 603 O 1 IO_J5 602 1 Z
+bit 602 C 1 *
+bit 601 I 1 IO_K7
+bit 600 O 1 IO_K7 599 1 Z
+bit 599 C 1 *
+bit 598 I 1 IO_J7
+bit 597 O 1 IO_J7 596 1 Z
+bit 596 C 1 *
+bit 595 I 1 IO_H1
+bit 594 O 1 IO_H1 593 1 Z
+bit 593 C 1 *
+bit 592 I 1 IO_H2
+bit 591 O 1 IO_H2 590 1 Z
+bit 590 C 1 *
+bit 589 O 1 *
+bit 588 O 1 *
+bit 587 O 1 *
+bit 586 O 1 *
+bit 585 O 1 *
+bit 584 O 1 *
+bit 583 I 1 IO_H3
+bit 582 O 1 IO_H3 581 1 Z
+bit 581 C 1 *
+bit 580 I 1 IO_H4
+bit 579 O 1 IO_H4 578 1 Z
+bit 578 C 1 *
+bit 577 I 1 IO_J6
+bit 576 O 1 IO_J6 575 1 Z
+bit 575 C 1 *
+bit 574 I 1 IO_H5
+bit 573 O 1 IO_H5 572 1 Z
+bit 572 C 1 *
+bit 571 O 1 *
+bit 570 O 1 *
+bit 569 O 1 *
+bit 568 O 1 *
+bit 567 O 1 *
+bit 566 O 1 *
+bit 565 I 1 IO_G1
+bit 564 O 1 IO_G1 563 1 Z
+bit 563 C 1 *
+bit 562 I 1 IO_G2
+bit 561 O 1 IO_G2 560 1 Z
+bit 560 C 1 *
+bit 559 O 1 *
+bit 558 O 1 *
+bit 557 O 1 *
+bit 556 O 1 *
+bit 555 O 1 *
+bit 554 O 1 *
+bit 553 O 1 *
+bit 552 O 1 *
+bit 551 O 1 *
+bit 550 O 1 *
+bit 549 O 1 *
+bit 548 O 1 *
+bit 547 O 1 *
+bit 546 O 1 *
+bit 545 O 1 *
+bit 544 O 1 *
+bit 543 O 1 *
+bit 542 O 1 *
+bit 541 I 1 IO_H6
+bit 540 O 1 IO_H6 539 1 Z
+bit 539 C 1 *
+bit 538 I 1 IO_H7
+bit 537 O 1 IO_H7 536 1 Z
+bit 536 C 1 *
+bit 535 I 1 IO_F1
+bit 534 O 1 IO_F1 533 1 Z
+bit 533 C 1 *
+bit 532 I 1 IO_F2
+bit 531 O 1 IO_F2 530 1 Z
+bit 530 C 1 *
+bit 529 I 1 IO_G4
+bit 528 O 1 IO_G4 527 1 Z
+bit 527 C 1 *
+bit 526 I 1 IO_G5
+bit 525 O 1 IO_G5 524 1 Z
+bit 524 C 1 *
+bit 523 I 1 IO_F3
+bit 522 O 1 IO_F3 521 1 Z
+bit 521 C 1 *
+bit 520 I 1 IO_F4
+bit 519 O 1 IO_F4 518 1 Z
+bit 518 C 1 *
+bit 517 I 1 IO_E1
+bit 516 O 1 IO_E1 515 1 Z
+bit 515 C 1 *
+bit 514 I 1 IO_E2
+bit 513 O 1 IO_E2 512 1 Z
+bit 512 C 1 *
+bit 511 I 1 IO_G6
+bit 510 O 1 IO_G6 509 1 Z
+bit 509 C 1 *
+bit 508 I 1 IO_G7
+bit 507 O 1 IO_G7 506 1 Z
+bit 506 C 1 *
+bit 505 O 1 *
+bit 504 O 1 *
+bit 503 O 1 *
+bit 502 O 1 *
+bit 501 O 1 *
+bit 500 O 1 *
+bit 499 I 1 IO_D1
+bit 498 O 1 IO_D1 497 1 Z
+bit 497 C 1 *
+bit 496 I 1 IO_D2
+bit 495 O 1 IO_D2 494 1 Z
+bit 494 C 1 *
+bit 493 I 1 IO_E3
+bit 492 O 1 IO_E3 491 1 Z
+bit 491 C 1 *
+bit 490 I 1 IO_E4
+bit 489 O 1 IO_E4 488 1 Z
+bit 488 C 1 *
+bit 487 I 1 IO_F5
+bit 486 O 1 IO_F5 485 1 Z
+bit 485 C 1 *
+bit 484 I 1 IO_F6
+bit 483 O 1 IO_F6 482 1 Z
+bit 482 C 1 *
+bit 481 O 1 *
+bit 480 I 1 HSWAP_EN_C2
+bit 479 I 1 IO_B3
+bit 478 O 1 IO_B3 477 1 Z
+bit 477 C 1 *
+bit 476 I 1 IO_E5
+bit 475 O 1 IO_E5 474 1 Z
+bit 474 C 1 *
+bit 473 I 1 IO_D5
+bit 472 O 1 IO_D5 471 1 Z
+bit 471 C 1 *
+bit 470 O 1 *
+bit 469 O 1 *
+bit 468 O 1 *
+bit 467 O 1 *
+bit 466 O 1 *
+bit 465 O 1 *
+bit 464 O 1 *
+bit 463 O 1 *
+bit 462 O 1 *
+bit 461 O 1 *
+bit 460 O 1 *
+bit 459 O 1 *
+bit 458 O 1 *
+bit 457 O 1 *
+bit 456 O 1 *
+bit 455 O 1 *
+bit 454 O 1 *
+bit 453 O 1 *
+bit 452 I 1 IO_A3
+bit 451 O 1 IO_A3 450 1 Z
+bit 450 C 1 *
+bit 449 I 1 IO_C4
+bit 448 O 1 IO_C4 447 1 Z
+bit 447 C 1 *
+bit 446 I 1 IO_B4
+bit 445 O 1 IO_B4 444 1 Z
+bit 444 C 1 *
+bit 443 I 1 IO_A4
+bit 442 O 1 IO_A4 441 1 Z
+bit 441 C 1 *
+bit 440 I 1 IO_C5
+bit 439 O 1 IO_C5 438 1 Z
+bit 438 C 1 *
+bit 437 I 1 IO_B5
+bit 436 O 1 IO_B5 435 1 Z
+bit 435 C 1 *
+bit 434 I 1 IO_A5
+bit 433 O 1 IO_A5 432 1 Z
+bit 432 C 1 *
+bit 431 I 1 IO_E6
+bit 430 O 1 IO_E6 429 1 Z
+bit 429 C 1 *
+bit 428 I 1 IO_D6
+bit 427 O 1 IO_D6 426 1 Z
+bit 426 C 1 *
+bit 425 I 1 IO_C6
+bit 424 O 1 IO_C6 423 1 Z
+bit 423 C 1 *
+bit 422 I 1 IO_B6
+bit 421 O 1 IO_B6 420 1 Z
+bit 420 C 1 *
+bit 419 I 1 IO_A6
+bit 418 O 1 IO_A6 417 1 Z
+bit 417 C 1 *
+bit 416 I 1 IO_E7
+bit 415 O 1 IO_E7 414 1 Z
+bit 414 C 1 *
+bit 413 I 1 IO_D7
+bit 412 O 1 IO_D7 411 1 Z
+bit 411 C 1 *
+bit 410 I 1 IO_B7
+bit 409 O 1 IO_B7 408 1 Z
+bit 408 C 1 *
+bit 407 I 1 IO_A7
+bit 406 O 1 IO_A7 405 1 Z
+bit 405 C 1 *
+bit 404 I 1 IO_F7
+bit 403 O 1 IO_F7 402 1 Z
+bit 402 C 1 *
+bit 401 I 1 IO_G8
+bit 400 O 1 IO_G8 399 1 Z
+bit 399 C 1 *
+bit 398 I 1 IO_F8
+bit 397 O 1 IO_F8 396 1 Z
+bit 396 C 1 *
+bit 395 I 1 IO_E8
+bit 394 O 1 IO_E8 393 1 Z
+bit 393 C 1 *
+bit 392 I 1 IO_D8
+bit 391 O 1 IO_D8 390 1 Z
+bit 390 C 1 *
+bit 389 O 1 *
+bit 388 O 1 *
+bit 387 O 1 *
+bit 386 O 1 *
+bit 385 O 1 *
+bit 384 O 1 *
+bit 383 O 1 *
+bit 382 O 1 *
+bit 381 O 1 *
+bit 380 O 1 *
+bit 379 O 1 *
+bit 378 O 1 *
+bit 377 O 1 *
+bit 376 O 1 *
+bit 375 O 1 *
+bit 374 I 1 IO_C8
+bit 373 O 1 IO_C8 372 1 Z
+bit 372 C 1 *
+bit 371 I 1 IO_B8
+bit 370 O 1 IO_B8 369 1 Z
+bit 369 C 1 *
+bit 368 I 1 IO_A8
+bit 367 O 1 IO_A8 366 1 Z
+bit 366 C 1 *
+bit 365 I 1 IO_G9
+bit 364 O 1 IO_G9 363 1 Z
+bit 363 C 1 *
+bit 362 I 1 IO_F9
+bit 361 O 1 IO_F9 360 1 Z
+bit 360 C 1 *
+bit 359 O 1 *
+bit 358 O 1 *
+bit 357 O 1 *
+bit 356 I 1 IO_E9
+bit 355 O 1 IO_E9 354 1 Z
+bit 354 C 1 *
+bit 353 I 1 IO_D9
+bit 352 O 1 IO_D9 351 1 Z
+bit 351 C 1 *
+bit 350 I 1 IO_C9
+bit 349 O 1 IO_C9 348 1 Z
+bit 348 C 1 *
+bit 347 I 1 IO_B9
+bit 346 O 1 IO_B9 345 1 Z
+bit 345 C 1 *
+bit 344 I 1 IO_G10
+bit 343 O 1 IO_G10 342 1 Z
+bit 342 C 1 *
+bit 341 I 1 IO_F10
+bit 340 O 1 IO_F10 339 1 Z
+bit 339 C 1 *
+bit 338 I 1 IO_E10
+bit 337 O 1 IO_E10 336 1 Z
+bit 336 C 1 *
+bit 335 O 1 *
+bit 334 O 1 *
+bit 333 O 1 *
+bit 332 O 1 *
+bit 331 O 1 *
+bit 330 O 1 *
+bit 329 O 1 *
+bit 328 O 1 *
+bit 327 O 1 *
+bit 326 O 1 *
+bit 325 O 1 *
+bit 324 O 1 *
+bit 323 O 1 *
+bit 322 O 1 *
+bit 321 O 1 *
+bit 320 I 1 IO_D10
+bit 319 O 1 IO_D10 318 1 Z
+bit 318 C 1 *
+bit 317 I 1 IO_C10
+bit 316 O 1 IO_C10 315 1 Z
+bit 315 C 1 *
+bit 314 I 1 IO_H11
+bit 313 O 1 IO_H11 312 1 Z
+bit 312 C 1 *
+bit 311 I 1 IO_B10
+bit 310 O 1 IO_B10 309 1 Z
+bit 309 C 1 *
+bit 308 I 1 IO_A10
+bit 307 O 1 IO_A10 306 1 Z
+bit 306 C 1 *
+bit 305 I 1 IO_G11
+bit 304 O 1 IO_G11 303 1 Z
+bit 303 C 1 *
+bit 302 I 1 IO_F11
+bit 301 O 1 IO_F11 300 1 Z
+bit 300 C 1 *
+bit 299 O 1 *
+bit 298 O 1 *
+bit 297 O 1 *
+bit 296 I 1 IO_E11
+bit 295 O 1 IO_E11 294 1 Z
+bit 294 C 1 *
+bit 293 I 1 IO_D11
+bit 292 O 1 IO_D11 291 1 Z
+bit 291 C 1 *
+bit 290 I 1 IO_B11
+bit 289 O 1 IO_B11 288 1 Z
+bit 288 C 1 *
+bit 287 I 1 IO_A11
+bit 286 O 1 IO_A11 285 1 Z
+bit 285 C 1 *
+bit 284 I 1 IO_H12
+bit 283 O 1 IO_H12 282 1 Z
+bit 282 C 1 *
+bit 281 I 1 IO_G12
+bit 280 O 1 IO_G12 279 1 Z
+bit 279 C 1 *
+bit 278 I 1 IO_H13
+bit 277 O 1 IO_H13 276 1 Z
+bit 276 C 1 *
+bit 275 I 1 IO_F12
+bit 274 O 1 IO_F12 273 1 Z
+bit 273 C 1 *
+bit 272 I 1 IO_E12
+bit 271 O 1 IO_E12 270 1 Z
+bit 270 C 1 *
+bit 269 I 1 IO_C12
+bit 268 O 1 IO_C12 267 1 Z
+bit 267 C 1 *
+bit 266 I 1 IO_B12
+bit 265 O 1 IO_B12 264 1 Z
+bit 264 C 1 *
+bit 263 I 1 IO_A12
+bit 262 O 1 IO_A12 261 1 Z
+bit 261 C 1 *
+bit 260 I 1 IO_G13
+bit 259 O 1 IO_G13 258 1 Z
+bit 258 C 1 *
+bit 257 I 1 IO_F13
+bit 256 O 1 IO_F13 255 1 Z
+bit 255 C 1 *
+bit 254 I 1 IO_E13
+bit 253 O 1 IO_E13 252 1 Z
+bit 252 C 1 *
+bit 251 I 1 IO_D13
+bit 250 O 1 IO_D13 249 1 Z
+bit 249 C 1 *
+bit 248 I 1 IO_C13
+bit 247 O 1 IO_C13 246 1 Z
+bit 246 C 1 *
+bit 245 I 1 IO_B13
+bit 244 O 1 IO_B13 243 1 Z
+bit 243 C 1 *
+bit 242 I 1 IO_A13
+bit 241 O 1 IO_A13 240 1 Z
+bit 240 C 1 *
+bit 239 I 1 IO_A14
+bit 238 O 1 IO_A14 237 1 Z
+bit 237 C 1 *
+bit 236 I 1 IO_B14
+bit 235 O 1 IO_B14 234 1 Z
+bit 234 C 1 *
+bit 233 I 1 IO_C14
+bit 232 O 1 IO_C14 231 1 Z
+bit 231 C 1 *
+bit 230 I 1 IO_D14
+bit 229 O 1 IO_D14 228 1 Z
+bit 228 C 1 *
+bit 227 I 1 IO_E14
+bit 226 O 1 IO_E14 225 1 Z
+bit 225 C 1 *
+bit 224 I 1 IO_F14
+bit 223 O 1 IO_F14 222 1 Z
+bit 222 C 1 *
+bit 221 I 1 IO_G14
+bit 220 O 1 IO_G14 219 1 Z
+bit 219 C 1 *
+bit 218 I 1 IO_H14
+bit 217 O 1 IO_H14 216 1 Z
+bit 216 C 1 *
+bit 215 I 1 IO_A15
+bit 214 O 1 IO_A15 213 1 Z
+bit 213 C 1 *
+bit 212 I 1 IO_B15
+bit 211 O 1 IO_B15 210 1 Z
+bit 210 C 1 *
+bit 209 I 1 IO_C15
+bit 208 O 1 IO_C15 207 1 Z
+bit 207 C 1 *
+bit 206 I 1 IO_E15
+bit 205 O 1 IO_E15 204 1 Z
+bit 204 C 1 *
+bit 203 I 1 IO_F15
+bit 202 O 1 IO_F15 201 1 Z
+bit 201 C 1 *
+bit 200 I 1 IO_G15
+bit 199 O 1 IO_G15 198 1 Z
+bit 198 C 1 *
+bit 197 I 1 IO_H15
+bit 196 O 1 IO_H15 195 1 Z
+bit 195 C 1 *
+bit 194 I 1 IO_D16
+bit 193 O 1 IO_D16 192 1 Z
+bit 192 C 1 *
+bit 191 I 1 IO_A16
+bit 190 O 1 IO_A16 189 1 Z
+bit 189 C 1 *
+bit 188 I 1 IO_B16
+bit 187 O 1 IO_B16 186 1 Z
+bit 186 C 1 *
+bit 185 I 1 IO_E16
+bit 184 O 1 IO_E16 183 1 Z
+bit 183 C 1 *
+bit 182 I 1 IO_F16
+bit 181 O 1 IO_F16 180 1 Z
+bit 180 C 1 *
+bit 179 O 1 *
+bit 178 O 1 *
+bit 177 O 1 *
+bit 176 I 1 IO_G16
+bit 175 O 1 IO_G16 174 1 Z
+bit 174 C 1 *
+bit 173 I 1 IO_H16
+bit 172 O 1 IO_H16 171 1 Z
+bit 171 C 1 *
+bit 170 I 1 IO_A17
+bit 169 O 1 IO_A17 168 1 Z
+bit 168 C 1 *
+bit 167 I 1 IO_B17
+bit 166 O 1 IO_B17 165 1 Z
+bit 165 C 1 *
+bit 164 I 1 IO_C17
+bit 163 O 1 IO_C17 162 1 Z
+bit 162 C 1 *
+bit 161 I 1 IO_D17
+bit 160 O 1 IO_D17 159 1 Z
+bit 159 C 1 *
+bit 158 I 1 IO_E17
+bit 157 O 1 IO_E17 156 1 Z
+bit 156 C 1 *
+bit 155 O 1 *
+bit 154 O 1 *
+bit 153 O 1 *
+bit 152 O 1 *
+bit 151 O 1 *
+bit 150 O 1 *
+bit 149 O 1 *
+bit 148 O 1 *
+bit 147 O 1 *
+bit 146 O 1 *
+bit 145 O 1 *
+bit 144 O 1 *
+bit 143 O 1 *
+bit 142 O 1 *
+bit 141 O 1 *
+bit 140 I 1 IO_F17
+bit 139 O 1 IO_F17 138 1 Z
+bit 138 C 1 *
+bit 137 I 1 IO_G17
+bit 136 O 1 IO_G17 135 1 Z
+bit 135 C 1 *
+bit 134 O 1 *
+bit 133 O 1 *
+bit 132 O 1 *
+bit 131 I 1 IO_B18
+bit 130 O 1 IO_B18 129 1 Z
+bit 129 C 1 *
+bit 128 I 1 IO_C18
+bit 127 O 1 IO_C18 126 1 Z
+bit 126 C 1 *
+bit 125 I 1 IO_D18
+bit 124 O 1 IO_D18 123 1 Z
+bit 123 C 1 *
+bit 122 O 1 *
+bit 121 O 1 *
+bit 120 O 1 *
+bit 119 I 1 IO_E18
+bit 118 O 1 IO_E18 117 1 Z
+bit 117 C 1 *
+bit 116 I 1 IO_F18
+bit 115 O 1 IO_F18 114 1 Z
+bit 114 C 1 *
+bit 113 I 1 IO_G18
+bit 112 O 1 IO_G18 111 1 Z
+bit 111 C 1 *
+bit 110 I 1 IO_A19
+bit 109 O 1 IO_A19 108 1 Z
+bit 108 C 1 *
+bit 107 I 1 IO_B19
+bit 106 O 1 IO_B19 105 1 Z
+bit 105 C 1 *
+bit 104 O 1 *
+bit 103 O 1 *
+bit 102 O 1 *
+bit 101 O 1 *
+bit 100 O 1 *
+bit 99 O 1 *
+bit 98 O 1 *
+bit 97 O 1 *
+bit 96 O 1 *
+bit 95 O 1 *
+bit 94 O 1 *
+bit 93 O 1 *
+bit 92 O 1 *
+bit 91 O 1 *
+bit 90 O 1 *
+bit 89 O 1 *
+bit 88 O 1 *
+bit 87 O 1 *
+bit 86 I 1 IO_C19
+bit 85 O 1 IO_C19 84 1 Z
+bit 84 C 1 *
+bit 83 I 1 IO_D19
+bit 82 O 1 IO_D19 81 1 Z
+bit 81 C 1 *
+bit 80 I 1 IO_E19
+bit 79 O 1 IO_E19 78 1 Z
+bit 78 C 1 *
+bit 77 I 1 IO_F19
+bit 76 O 1 IO_F19 75 1 Z
+bit 75 C 1 *
+bit 74 I 1 IO_G19
+bit 73 O 1 IO_G19 72 1 Z
+bit 72 C 1 *
+bit 71 I 1 IO_A20
+bit 70 O 1 IO_A20 69 1 Z
+bit 69 C 1 *
+bit 68 I 1 IO_B20
+bit 67 O 1 IO_B20 66 1 Z
+bit 66 C 1 *
+bit 65 I 1 IO_D20
+bit 64 O 1 IO_D20 63 1 Z
+bit 63 C 1 *
+bit 62 I 1 IO_E20
+bit 61 O 1 IO_E20 60 1 Z
+bit 60 C 1 *
+bit 59 I 1 IO_F20
+bit 58 O 1 IO_F20 57 1 Z
+bit 57 C 1 *
+bit 56 I 1 IO_A21
+bit 55 O 1 IO_A21 54 1 Z
+bit 54 C 1 *
+bit 53 I 1 IO_B21
+bit 52 O 1 IO_B21 51 1 Z
+bit 51 C 1 *
+bit 50 I 1 IO_C21
+bit 49 O 1 IO_C21 48 1 Z
+bit 48 C 1 *
+bit 47 I 1 IO_D21
+bit 46 O 1 IO_D21 45 1 Z
+bit 45 C 1 *
+bit 44 I 1 IO_A22
+bit 43 O 1 IO_A22 42 1 Z
+bit 42 C 1 *
+bit 41 I 1 IO_B22
+bit 40 O 1 IO_B22 39 1 Z
+bit 39 C 1 *
+bit 38 I 1 IO_C22
+bit 37 O 1 IO_C22 36 1 Z
+bit 36 C 1 *
+bit 35 I 1 IO_E21
+bit 34 O 1 IO_E21 33 1 Z
+bit 33 C 1 *
+bit 32 I 1 IO_F21
+bit 31 O 1 IO_F21 30 1 Z
+bit 30 C 1 *
+bit 29 I 1 IO_A23
+bit 28 O 1 IO_A23 27 1 Z
+bit 27 C 1 *
+bit 26 I 1 IO_B23
+bit 25 O 1 IO_B23 24 1 Z
+bit 24 C 1 *
+bit 23 I 1 IO_C23
+bit 22 O 1 IO_C23 21 1 Z
+bit 21 C 1 *
+bit 20 O 1 *
+bit 19 O 1 *
+bit 18 O 1 *
+bit 17 O 1 *
+bit 16 O 1 *
+bit 15 O 1 *
+bit 14 O 1 *
+bit 13 O 1 *
+bit 12 O 1 *
+bit 11 O 1 *
+bit 10 O 1 *
+bit 9 O 1 *
+bit 8 O 1 *
+bit 7 O 1 *
+bit 6 O 1 *
+bit 5 I 1 IO_D22
+bit 4 O 1 IO_D22 3 1 Z
+bit 3 C 1 *
+bit 2 I 1 IO_E22
+bit 1 O 1 IO_E22 0 1 Z
+bit 0 C 1 *
--- /dev/null
+signal GND1
+signal GND2
+signal GND3
+signal GND4
+signal GND5
+signal GND6
+signal GND7
+signal GND8
+signal GND9
+signal GND10
+signal GND11
+signal GND12
+signal GND13
+signal GND14
+signal GND15
+signal GND16
+signal GND17
+signal GND18
+signal GND19
+signal GND20
+signal GND21
+signal GND22
+signal GND23
+signal GND24
+signal GND25
+signal GND26
+signal GND27
+signal GND28
+signal GND29
+signal GND30
+signal GND31
+signal GND32
+signal GND33
+signal GND34
+signal GND35
+signal GND36
+signal GND37
+signal GND38
+signal GND39
+signal GND40
+signal GND41
+signal GND42
+signal GND43
+signal GND44
+signal GND45
+signal GND46
+signal GND47
+signal GND48
+signal GND49
+signal GND50
+signal GND51
+signal GND52
+signal GND53
+signal GND54
+signal GND55
+signal GND56
+signal GND57
+signal GND58
+signal GND59
+signal GND60
+signal GND61
+signal GND62
+signal GND63
+signal GND64
+signal GND65
+signal GND66
+signal GND67
+signal GND68
+signal GND69
+signal GND70
+signal GND71
+signal GND72
+signal GND73
+signal GND74
+signal GND75
+signal GND76
+signal GND77
+signal GND78
+signal GND79
+signal GND80
+signal GND81
+signal GND82
+signal GND83
+signal GND84
+signal GND85
+signal GND86
+signal GND87
+signal GND88
+signal GND89
+signal GND90
+signal GND91
+signal GND92
+signal GND93
+signal GND94
+signal GND95
+signal GND96
+signal GND97
+signal GND98
+signal GND99
+signal GND100
+signal GND101
+signal GND102
+signal GND103
+signal GND104
+signal GND105
+signal GND106
+signal GND107
+signal GND108
+signal GND109
+signal GND110
+signal GND111
+signal GND112
+signal GND113
+signal GND114
+signal GND115
+signal GND116
+signal GND117
+signal GND118
+signal GND119
+signal GND120
+signal NOCONNECT1
+signal NOCONNECT2
+signal NOCONNECT3
+signal NOCONNECT4
+signal NOCONNECT5
+signal NOCONNECT6
+signal NOCONNECT7
+signal NOCONNECT8
+signal CCLK_AH28
+signal DONE_AJ28
+signal HSWAP_EN_A3
+signal M0_AJ3
+signal M1_AH3
+signal M2_AK3
+signal PROG_B
+signal TCK
+signal TDI
+signal TDO
+signal TMS
+signal VCCAUX1
+signal VCCAUX2
+signal VCCAUX3
+signal VCCAUX4
+signal VCCAUX5
+signal VCCAUX6
+signal VCCAUX7
+signal VCCAUX8
+signal VCCAUX9
+signal VCCAUX10
+signal VCCAUX11
+signal VCCAUX12
+signal VCCAUX13
+signal VCCAUX14
+signal VCCAUX15
+signal VCCAUX16
+signal VCCAUX17
+signal VCCAUX18
+signal VCCAUX19
+signal VCCAUX20
+signal VCCAUX21
+signal VCCAUX22
+signal VCCAUX23
+signal VCCAUX24
+signal VCCINT1
+signal VCCINT2
+signal VCCINT3
+signal VCCINT4
+signal VCCINT5
+signal VCCINT6
+signal VCCINT7
+signal VCCINT8
+signal VCCINT9
+signal VCCINT10
+signal VCCINT11
+signal VCCINT12
+signal VCCINT13
+signal VCCINT14
+signal VCCINT15
+signal VCCINT16
+signal VCCINT17
+signal VCCINT18
+signal VCCINT19
+signal VCCINT20
+signal VCCINT21
+signal VCCINT22
+signal VCCINT23
+signal VCCINT24
+signal VCCINT25
+signal VCCINT26
+signal VCCINT27
+signal VCCINT28
+signal VCCINT29
+signal VCCINT30
+signal VCCINT31
+signal VCCINT32
+signal VCCO01
+signal VCCO02
+signal VCCO03
+signal VCCO04
+signal VCCO05
+signal VCCO06
+signal VCCO07
+signal VCCO08
+signal VCCO09
+signal VCCO010
+signal VCCO11
+signal VCCO12
+signal VCCO13
+signal VCCO14
+signal VCCO15
+signal VCCO16
+signal VCCO17
+signal VCCO18
+signal VCCO19
+signal VCCO110
+signal VCCO21
+signal VCCO22
+signal VCCO23
+signal VCCO24
+signal VCCO25
+signal VCCO26
+signal VCCO27
+signal VCCO28
+signal VCCO29
+signal VCCO210
+signal VCCO31
+signal VCCO32
+signal VCCO33
+signal VCCO34
+signal VCCO35
+signal VCCO36
+signal VCCO37
+signal VCCO38
+signal VCCO39
+signal VCCO310
+signal VCCO41
+signal VCCO42
+signal VCCO43
+signal VCCO44
+signal VCCO45
+signal VCCO46
+signal VCCO47
+signal VCCO48
+signal VCCO49
+signal VCCO410
+signal VCCO51
+signal VCCO52
+signal VCCO53
+signal VCCO54
+signal VCCO55
+signal VCCO56
+signal VCCO57
+signal VCCO58
+signal VCCO59
+signal VCCO510
+signal VCCO61
+signal VCCO62
+signal VCCO63
+signal VCCO64
+signal VCCO65
+signal VCCO66
+signal VCCO67
+signal VCCO68
+signal VCCO69
+signal VCCO610
+signal VCCO71
+signal VCCO72
+signal VCCO73
+signal VCCO74
+signal VCCO75
+signal VCCO76
+signal VCCO77
+signal VCCO78
+signal VCCO79
+signal VCCO710
+signal IO_A4
+signal IO_A5
+signal IO_A8
+signal IO_A11
+signal IO_A12
+signal IO_A13
+signal IO_A15
+signal IO_A16
+signal IO_A19
+signal IO_A20
+signal IO_A22
+signal IO_A23
+signal IO_A24
+signal IO_A26
+signal IO_A27
+signal IO_B4
+signal IO_B5
+signal IO_B6
+signal IO_B8
+signal IO_B10
+signal IO_B11
+signal IO_B12
+signal IO_B13
+signal IO_B14
+signal IO_B15
+signal IO_B16
+signal IO_B17
+signal IO_B19
+signal IO_B20
+signal IO_B21
+signal IO_B22
+signal IO_B23
+signal IO_B24
+signal IO_B25
+signal IO_B26
+signal IO_B27
+signal IO_C1
+signal IO_C2
+signal IO_C4
+signal IO_C6
+signal IO_C7
+signal IO_C8
+signal IO_C10
+signal IO_C11
+signal IO_C12
+signal IO_C14
+signal IO_C15
+signal IO_C16
+signal IO_C17
+signal IO_C19
+signal IO_C20
+signal IO_C21
+signal IO_C23
+signal IO_C24
+signal IO_C25
+signal IO_C27
+signal IO_C29
+signal IO_C30
+signal IO_D1
+signal IO_D2
+signal IO_D3
+signal IO_D4
+signal IO_D5
+signal IO_D7
+signal IO_D8
+signal IO_D11
+signal IO_D12
+signal IO_D13
+signal IO_D15
+signal IO_D16
+signal IO_D19
+signal IO_D20
+signal IO_D22
+signal IO_D23
+signal IO_D24
+signal IO_D26
+signal IO_D27
+signal IO_D28
+signal IO_D29
+signal IO_D30
+signal IO_E1
+signal IO_E2
+signal IO_E4
+signal IO_E6
+signal IO_E8
+signal IO_E11
+signal IO_E12
+signal IO_E13
+signal IO_E15
+signal IO_E16
+signal IO_E19
+signal IO_E20
+signal IO_E22
+signal IO_E23
+signal IO_E25
+signal IO_E29
+signal IO_E30
+signal IO_F2
+signal IO_F3
+signal IO_F5
+signal IO_F6
+signal IO_F7
+signal IO_F8
+signal IO_F9
+signal IO_F10
+signal IO_F11
+signal IO_F12
+signal IO_F13
+signal IO_F14
+signal IO_F15
+signal IO_F16
+signal IO_F17
+signal IO_F18
+signal IO_F19
+signal IO_F20
+signal IO_F21
+signal IO_F22
+signal IO_F23
+signal IO_F24
+signal IO_F25
+signal IO_F28
+signal IO_F29
+signal IO_G1
+signal IO_G2
+signal IO_G3
+signal IO_G4
+signal IO_G6
+signal IO_G8
+signal IO_G10
+signal IO_G11
+signal IO_G12
+signal IO_G14
+signal IO_G15
+signal IO_G16
+signal IO_G17
+signal IO_G19
+signal IO_G20
+signal IO_G21
+signal IO_G23
+signal IO_G24
+signal IO_G25
+signal IO_G27
+signal IO_G28
+signal IO_G29
+signal IO_G30
+signal IO_H1
+signal IO_H2
+signal IO_H3
+signal IO_H4
+signal IO_H5
+signal IO_H6
+signal IO_H7
+signal IO_H9
+signal IO_H11
+signal IO_H12
+signal IO_H13
+signal IO_H15
+signal IO_H16
+signal IO_H19
+signal IO_H20
+signal IO_H22
+signal IO_H23
+signal IO_H24
+signal IO_H25
+signal IO_H26
+signal IO_H27
+signal IO_H28
+signal IO_H29
+signal IO_H30
+signal IO_J1
+signal IO_J2
+signal IO_J4
+signal IO_J5
+signal IO_J6
+signal IO_J8
+signal IO_J9
+signal IO_J10
+signal IO_J12
+signal IO_J13
+signal IO_J14
+signal IO_J15
+signal IO_J16
+signal IO_J17
+signal IO_J19
+signal IO_J21
+signal IO_J22
+signal IO_J23
+signal IO_J25
+signal IO_J26
+signal IO_J27
+signal IO_J29
+signal IO_J30
+signal IO_K2
+signal IO_K3
+signal IO_K6
+signal IO_K7
+signal IO_K9
+signal IO_K10
+signal IO_K11
+signal IO_K12
+signal IO_K13
+signal IO_K14
+signal IO_K15
+signal IO_K16
+signal IO_K19
+signal IO_K20
+signal IO_K22
+signal IO_K24
+signal IO_K25
+signal IO_L1
+signal IO_L2
+signal IO_L3
+signal IO_L4
+signal IO_L5
+signal IO_L6
+signal IO_L7
+signal IO_L8
+signal IO_L10
+signal IO_L25
+signal IO_L26
+signal IO_L27
+signal IO_L28
+signal IO_L29
+signal IO_L30
+signal IO_M1
+signal IO_M2
+signal IO_M3
+signal IO_M4
+signal IO_M10
+signal IO_M21
+signal IO_M22
+signal IO_M23
+signal IO_M24
+signal IO_M25
+signal IO_M26
+signal IO_M27
+signal IO_M28
+signal IO_N1
+signal IO_N2
+signal IO_N8
+signal IO_N9
+signal IO_N10
+signal IO_N21
+signal IO_N22
+signal IO_N23
+signal IO_N25
+signal IO_N26
+signal IO_N27
+signal IO_N29
+signal IO_N30
+signal IO_P2
+signal IO_P3
+signal IO_P6
+signal IO_P7
+signal IO_P9
+signal IO_P10
+signal IO_P21
+signal IO_P22
+signal IO_P24
+signal IO_P25
+signal IO_P28
+signal IO_P29
+signal IO_R1
+signal IO_R2
+signal IO_R3
+signal IO_R4
+signal IO_R5
+signal IO_R6
+signal IO_R7
+signal IO_R8
+signal IO_R9
+signal IO_R10
+signal IO_R21
+signal IO_R22
+signal IO_R23
+signal IO_R24
+signal IO_R25
+signal IO_R26
+signal IO_R27
+signal IO_R28
+signal IO_R29
+signal IO_R30
+signal IO_T1
+signal IO_T2
+signal IO_T3
+signal IO_T4
+signal IO_T5
+signal IO_T6
+signal IO_T9
+signal IO_T10
+signal IO_T21
+signal IO_T22
+signal IO_T23
+signal IO_T24
+signal IO_T25
+signal IO_T26
+signal IO_T27
+signal IO_T28
+signal IO_T29
+signal IO_T30
+signal IO_U6
+signal IO_U7
+signal IO_U9
+signal IO_U10
+signal IO_U21
+signal IO_U22
+signal IO_U24
+signal IO_U25
+signal IO_U28
+signal IO_U29
+signal IO_V1
+signal IO_V2
+signal IO_V4
+signal IO_V5
+signal IO_V6
+signal IO_V10
+signal IO_V21
+signal IO_V22
+signal IO_V23
+signal IO_V25
+signal IO_V29
+signal IO_V30
+signal IO_W1
+signal IO_W2
+signal IO_W3
+signal IO_W4
+signal IO_W5
+signal IO_W6
+signal IO_W7
+signal IO_W10
+signal IO_W21
+signal IO_W26
+signal IO_W29
+signal IO_W30
+signal IO_Y1
+signal IO_Y2
+signal IO_Y5
+signal IO_Y6
+signal IO_Y7
+signal IO_Y8
+signal IO_Y10
+signal IO_Y21
+signal IO_Y23
+signal IO_Y24
+signal IO_Y25
+signal IO_Y26
+signal IO_Y27
+signal IO_Y28
+signal IO_Y29
+signal IO_Y30
+signal IO_AA2
+signal IO_AA3
+signal IO_AA6
+signal IO_AA7
+signal IO_AA9
+signal IO_AA10
+signal IO_AA11
+signal IO_AA12
+signal IO_AA13
+signal IO_AA14
+signal IO_AA15
+signal IO_AA16
+signal IO_AA17
+signal IO_AA18
+signal IO_AA19
+signal IO_AA20
+signal IO_AA21
+signal IO_AA22
+signal IO_AA24
+signal IO_AA25
+signal IO_AA28
+signal IO_AA29
+signal IO_AB1
+signal IO_AB2
+signal IO_AB4
+signal IO_AB5
+signal IO_AB6
+signal IO_AB8
+signal IO_AB9
+signal IO_AB10
+signal IO_AB12
+signal IO_AB13
+signal IO_AB14
+signal IO_AB15
+signal IO_AB16
+signal IO_AB17
+signal IO_AB18
+signal IO_AB19
+signal IO_AB21
+signal IO_AB22
+signal IO_AB23
+signal IO_AB25
+signal IO_AB26
+signal IO_AB27
+signal IO_AB29
+signal IO_AB30
+signal IO_AC1
+signal IO_AC2
+signal IO_AC3
+signal IO_AC4
+signal IO_AC5
+signal IO_AC6
+signal IO_AC7
+signal IO_AC9
+signal IO_AC11
+signal IO_AC12
+signal IO_AC13
+signal IO_AC15
+signal IO_AC16
+signal IO_AC18
+signal IO_AC19
+signal IO_AC20
+signal IO_AC22
+signal IO_AC23
+signal IO_AC24
+signal IO_AC25
+signal IO_AC26
+signal IO_AC27
+signal IO_AC28
+signal IO_AC29
+signal IO_AC30
+signal IO_AD1
+signal IO_AD2
+signal IO_AD3
+signal IO_AD4
+signal IO_AD6
+signal IO_AD7
+signal IO_AD10
+signal IO_AD11
+signal IO_AD12
+signal IO_AD14
+signal IO_AD15
+signal IO_AD16
+signal IO_AD17
+signal IO_AD19
+signal IO_AD20
+signal IO_AD21
+signal IO_AD23
+signal IO_AD24
+signal IO_AD25
+signal IO_AD27
+signal IO_AD28
+signal IO_AD29
+signal IO_AD30
+signal IO_AE2
+signal IO_AE3
+signal IO_AE5
+signal IO_AE6
+signal IO_AE7
+signal IO_AE9
+signal IO_AE10
+signal IO_AE11
+signal IO_AE12
+signal IO_AE13
+signal IO_AE14
+signal IO_AE15
+signal IO_AE16
+signal IO_AE17
+signal IO_AE18
+signal IO_AE19
+signal IO_AE20
+signal IO_AE21
+signal IO_AE22
+signal IO_AE23
+signal IO_AE26
+signal IO_AE28
+signal IO_AE29
+signal IO_AF1
+signal IO_AF2
+signal IO_AF4
+signal IO_AF6
+signal IO_AF9
+signal IO_AF11
+signal IO_AF12
+signal IO_AF13
+signal IO_AF15
+signal IO_AF16
+signal IO_AF18
+signal IO_AF19
+signal IO_AF20
+signal IO_AF22
+signal IO_AF23
+signal IO_AF25
+signal IO_AF27
+signal IO_AF29
+signal IO_AF30
+signal IO_AG1
+signal IO_AG2
+signal IO_AG3
+signal IO_AG4
+signal IO_AG5
+signal IO_AG7
+signal IO_AG9
+signal IO_AG11
+signal IO_AG12
+signal IO_AG13
+signal IO_AG15
+signal IO_AG16
+signal IO_AG18
+signal IO_AG19
+signal IO_AG20
+signal IO_AG22
+signal IO_AG23
+signal IO_AG26
+signal IO_AG27
+signal IO_AG28
+signal IO_AG29
+signal IO_AG30
+signal IO_AH1
+signal IO_AH2
+signal IO_AH4
+signal IO_AH6
+signal IO_AH7
+signal IO_AH10
+signal IO_AH11
+signal IO_AH12
+signal IO_AH14
+signal IO_AH15
+signal IO_AH16
+signal IO_AH17
+signal IO_AH19
+signal IO_AH20
+signal IO_AH21
+signal IO_AH23
+signal IO_AH27
+signal IO_AH29
+signal IO_AH30
+signal IO_AJ4
+signal IO_AJ5
+signal IO_AJ6
+signal IO_AJ8
+signal IO_AJ9
+signal IO_AJ10
+signal IO_AJ11
+signal IO_AJ12
+signal IO_AJ13
+signal IO_AJ14
+signal IO_AJ15
+signal IO_AJ16
+signal IO_AJ17
+signal IO_AJ18
+signal IO_AJ19
+signal IO_AJ20
+signal IO_AJ21
+signal IO_AJ22
+signal IO_AJ23
+signal IO_AJ26
+signal IO_AJ27
+signal IO_AK4
+signal IO_AK5
+signal IO_AK8
+signal IO_AK9
+signal IO_AK11
+signal IO_AK12
+signal IO_AK13
+signal IO_AK15
+signal IO_AK16
+signal IO_AK18
+signal IO_AK19
+signal IO_AK20
+signal IO_AK22
+signal IO_AK23
+signal IO_AK26
+signal IO_AK27
+
+register BSR 1931
+register BR 1
+register DIR 32
+
+instruction length 6
+
+instruction EXTEST 000000 BSR
+instruction SAMPLE/PRELOAD 000001 BSR
+instruction IDCODE 001001 DIR
+instruction BYPASS 111111 BR
+
+bit 1930 I 1 IO_C29
+bit 1929 O 1 IO_C29 1928 1 Z
+bit 1928 C 1 *
+bit 1927 I 1 IO_C30
+bit 1926 O 1 IO_C30 1925 1 Z
+bit 1925 C 1 *
+bit 1924 I 1 IO_D27
+bit 1923 O 1 IO_D27 1922 1 Z
+bit 1922 C 1 *
+bit 1921 I 1 IO_D28
+bit 1920 O 1 IO_D28 1919 1 Z
+bit 1919 C 1 *
+bit 1918 I 1 IO_D29
+bit 1917 O 1 IO_D29 1916 1 Z
+bit 1916 C 1 *
+bit 1915 I 1 IO_D30
+bit 1914 O 1 IO_D30 1913 1 Z
+bit 1913 C 1 *
+bit 1912 I 1 IO_E29
+bit 1911 O 1 IO_E29 1910 1 Z
+bit 1910 C 1 *
+bit 1909 I 1 IO_E30
+bit 1908 O 1 IO_E30 1907 1 Z
+bit 1907 C 1 *
+bit 1906 I 1 IO_F28
+bit 1905 O 1 IO_F28 1904 1 Z
+bit 1904 C 1 *
+bit 1903 I 1 IO_F29
+bit 1902 O 1 IO_F29 1901 1 Z
+bit 1901 C 1 *
+bit 1900 I 1 IO_G27
+bit 1899 O 1 IO_G27 1898 1 Z
+bit 1898 C 1 *
+bit 1897 I 1 IO_G28
+bit 1896 O 1 IO_G28 1895 1 Z
+bit 1895 C 1 *
+bit 1894 I 1 IO_G29
+bit 1893 O 1 IO_G29 1892 1 Z
+bit 1892 C 1 *
+bit 1891 I 1 IO_G30
+bit 1890 O 1 IO_G30 1889 1 Z
+bit 1889 C 1 *
+bit 1888 I 1 IO_G25
+bit 1887 O 1 IO_G25 1886 1 Z
+bit 1886 C 1 *
+bit 1885 I 1 IO_H24
+bit 1884 O 1 IO_H24 1883 1 Z
+bit 1883 C 1 *
+bit 1882 I 1 IO_H25
+bit 1881 O 1 IO_H25 1880 1 Z
+bit 1880 C 1 *
+bit 1879 I 1 IO_H26
+bit 1878 O 1 IO_H26 1877 1 Z
+bit 1877 C 1 *
+bit 1876 I 1 IO_H27
+bit 1875 O 1 IO_H27 1874 1 Z
+bit 1874 C 1 *
+bit 1873 I 1 IO_H28
+bit 1872 O 1 IO_H28 1871 1 Z
+bit 1871 C 1 *
+bit 1870 O 1 *
+bit 1869 O 1 *
+bit 1868 O 1 *
+bit 1867 I 1 IO_J25
+bit 1866 O 1 IO_J25 1865 1 Z
+bit 1865 C 1 *
+bit 1864 I 1 IO_H29
+bit 1863 O 1 IO_H29 1862 1 Z
+bit 1862 C 1 *
+bit 1861 I 1 IO_H30
+bit 1860 O 1 IO_H30 1859 1 Z
+bit 1859 C 1 *
+bit 1858 I 1 IO_J26
+bit 1857 O 1 IO_J26 1856 1 Z
+bit 1856 C 1 *
+bit 1855 I 1 IO_J27
+bit 1854 O 1 IO_J27 1853 1 Z
+bit 1853 C 1 *
+bit 1852 I 1 IO_J29
+bit 1851 O 1 IO_J29 1850 1 Z
+bit 1850 C 1 *
+bit 1849 I 1 IO_J30
+bit 1848 O 1 IO_J30 1847 1 Z
+bit 1847 C 1 *
+bit 1846 I 1 IO_J23
+bit 1845 O 1 IO_J23 1844 1 Z
+bit 1844 C 1 *
+bit 1843 I 1 IO_K22
+bit 1842 O 1 IO_K22 1841 1 Z
+bit 1841 C 1 *
+bit 1840 I 1 IO_K24
+bit 1839 O 1 IO_K24 1838 1 Z
+bit 1838 C 1 *
+bit 1837 I 1 IO_K25
+bit 1836 O 1 IO_K25 1835 1 Z
+bit 1835 C 1 *
+bit 1834 O 1 *
+bit 1833 O 1 *
+bit 1832 O 1 *
+bit 1831 O 1 *
+bit 1830 O 1 *
+bit 1829 O 1 *
+bit 1828 O 1 *
+bit 1827 O 1 *
+bit 1826 O 1 *
+bit 1825 O 1 *
+bit 1824 O 1 *
+bit 1823 O 1 *
+bit 1822 I 1 IO_L25
+bit 1821 O 1 IO_L25 1820 1 Z
+bit 1820 C 1 *
+bit 1819 I 1 IO_L26
+bit 1818 O 1 IO_L26 1817 1 Z
+bit 1817 C 1 *
+bit 1816 I 1 IO_L27
+bit 1815 O 1 IO_L27 1814 1 Z
+bit 1814 C 1 *
+bit 1813 I 1 IO_L28
+bit 1812 O 1 IO_L28 1811 1 Z
+bit 1811 C 1 *
+bit 1810 I 1 IO_L29
+bit 1809 O 1 IO_L29 1808 1 Z
+bit 1808 C 1 *
+bit 1807 I 1 IO_L30
+bit 1806 O 1 IO_L30 1805 1 Z
+bit 1805 C 1 *
+bit 1804 I 1 IO_M22
+bit 1803 O 1 IO_M22 1802 1 Z
+bit 1802 C 1 *
+bit 1801 I 1 IO_M23
+bit 1800 O 1 IO_M23 1799 1 Z
+bit 1799 C 1 *
+bit 1798 I 1 IO_M24
+bit 1797 O 1 IO_M24 1796 1 Z
+bit 1796 C 1 *
+bit 1795 I 1 IO_M25
+bit 1794 O 1 IO_M25 1793 1 Z
+bit 1793 C 1 *
+bit 1792 I 1 IO_M27
+bit 1791 O 1 IO_M27 1790 1 Z
+bit 1790 C 1 *
+bit 1789 I 1 IO_M28
+bit 1788 O 1 IO_M28 1787 1 Z
+bit 1787 C 1 *
+bit 1786 O 1 *
+bit 1785 O 1 *
+bit 1784 O 1 *
+bit 1783 O 1 *
+bit 1782 O 1 *
+bit 1781 O 1 *
+bit 1780 I 1 IO_M21
+bit 1779 O 1 IO_M21 1778 1 Z
+bit 1778 C 1 *
+bit 1777 I 1 IO_N21
+bit 1776 O 1 IO_N21 1775 1 Z
+bit 1775 C 1 *
+bit 1774 I 1 IO_N22
+bit 1773 O 1 IO_N22 1772 1 Z
+bit 1772 C 1 *
+bit 1771 I 1 IO_N23
+bit 1770 O 1 IO_N23 1769 1 Z
+bit 1769 C 1 *
+bit 1768 I 1 IO_M26
+bit 1767 O 1 IO_M26 1766 1 Z
+bit 1766 C 1 *
+bit 1765 I 1 IO_N25
+bit 1764 O 1 IO_N25 1763 1 Z
+bit 1763 C 1 *
+bit 1762 I 1 IO_N26
+bit 1761 O 1 IO_N26 1760 1 Z
+bit 1760 C 1 *
+bit 1759 I 1 IO_N27
+bit 1758 O 1 IO_N27 1757 1 Z
+bit 1757 C 1 *
+bit 1756 O 1 *
+bit 1755 O 1 *
+bit 1754 O 1 *
+bit 1753 O 1 *
+bit 1752 O 1 *
+bit 1751 O 1 *
+bit 1750 I 1 IO_N29
+bit 1749 O 1 IO_N29 1748 1 Z
+bit 1748 C 1 *
+bit 1747 I 1 IO_N30
+bit 1746 O 1 IO_N30 1745 1 Z
+bit 1745 C 1 *
+bit 1744 I 1 IO_P21
+bit 1743 O 1 IO_P21 1742 1 Z
+bit 1742 C 1 *
+bit 1741 I 1 IO_P22
+bit 1740 O 1 IO_P22 1739 1 Z
+bit 1739 C 1 *
+bit 1738 I 1 IO_P24
+bit 1737 O 1 IO_P24 1736 1 Z
+bit 1736 C 1 *
+bit 1735 I 1 IO_P25
+bit 1734 O 1 IO_P25 1733 1 Z
+bit 1733 C 1 *
+bit 1732 I 1 IO_P28
+bit 1731 O 1 IO_P28 1730 1 Z
+bit 1730 C 1 *
+bit 1729 I 1 IO_P29
+bit 1728 O 1 IO_P29 1727 1 Z
+bit 1727 C 1 *
+bit 1726 I 1 IO_R21
+bit 1725 O 1 IO_R21 1724 1 Z
+bit 1724 C 1 *
+bit 1723 I 1 IO_R22
+bit 1722 O 1 IO_R22 1721 1 Z
+bit 1721 C 1 *
+bit 1720 O 1 *
+bit 1719 O 1 *
+bit 1718 O 1 *
+bit 1717 O 1 *
+bit 1716 O 1 *
+bit 1715 O 1 *
+bit 1714 I 1 IO_R23
+bit 1713 O 1 IO_R23 1712 1 Z
+bit 1712 C 1 *
+bit 1711 I 1 IO_R24
+bit 1710 O 1 IO_R24 1709 1 Z
+bit 1709 C 1 *
+bit 1708 I 1 IO_R25
+bit 1707 O 1 IO_R25 1706 1 Z
+bit 1706 C 1 *
+bit 1705 I 1 IO_R26
+bit 1704 O 1 IO_R26 1703 1 Z
+bit 1703 C 1 *
+bit 1702 I 1 IO_R27
+bit 1701 O 1 IO_R27 1700 1 Z
+bit 1700 C 1 *
+bit 1699 I 1 IO_R28
+bit 1698 O 1 IO_R28 1697 1 Z
+bit 1697 C 1 *
+bit 1696 I 1 IO_R29
+bit 1695 O 1 IO_R29 1694 1 Z
+bit 1694 C 1 *
+bit 1693 I 1 IO_R30
+bit 1692 O 1 IO_R30 1691 1 Z
+bit 1691 C 1 *
+bit 1690 I 1 IO_T30
+bit 1689 O 1 IO_T30 1688 1 Z
+bit 1688 C 1 *
+bit 1687 I 1 IO_T29
+bit 1686 O 1 IO_T29 1685 1 Z
+bit 1685 C 1 *
+bit 1684 I 1 IO_T28
+bit 1683 O 1 IO_T28 1682 1 Z
+bit 1682 C 1 *
+bit 1681 I 1 IO_T27
+bit 1680 O 1 IO_T27 1679 1 Z
+bit 1679 C 1 *
+bit 1678 I 1 IO_T26
+bit 1677 O 1 IO_T26 1676 1 Z
+bit 1676 C 1 *
+bit 1675 I 1 IO_T25
+bit 1674 O 1 IO_T25 1673 1 Z
+bit 1673 C 1 *
+bit 1672 I 1 IO_T24
+bit 1671 O 1 IO_T24 1670 1 Z
+bit 1670 C 1 *
+bit 1669 I 1 IO_T23
+bit 1668 O 1 IO_T23 1667 1 Z
+bit 1667 C 1 *
+bit 1666 O 1 *
+bit 1665 O 1 *
+bit 1664 O 1 *
+bit 1663 O 1 *
+bit 1662 O 1 *
+bit 1661 O 1 *
+bit 1660 I 1 IO_T22
+bit 1659 O 1 IO_T22 1658 1 Z
+bit 1658 C 1 *
+bit 1657 I 1 IO_T21
+bit 1656 O 1 IO_T21 1655 1 Z
+bit 1655 C 1 *
+bit 1654 I 1 IO_U29
+bit 1653 O 1 IO_U29 1652 1 Z
+bit 1652 C 1 *
+bit 1651 I 1 IO_U28
+bit 1650 O 1 IO_U28 1649 1 Z
+bit 1649 C 1 *
+bit 1648 I 1 IO_U25
+bit 1647 O 1 IO_U25 1646 1 Z
+bit 1646 C 1 *
+bit 1645 I 1 IO_U24
+bit 1644 O 1 IO_U24 1643 1 Z
+bit 1643 C 1 *
+bit 1642 I 1 IO_U22
+bit 1641 O 1 IO_U22 1640 1 Z
+bit 1640 C 1 *
+bit 1639 I 1 IO_U21
+bit 1638 O 1 IO_U21 1637 1 Z
+bit 1637 C 1 *
+bit 1636 I 1 IO_V30
+bit 1635 O 1 IO_V30 1634 1 Z
+bit 1634 C 1 *
+bit 1633 I 1 IO_V29
+bit 1632 O 1 IO_V29 1631 1 Z
+bit 1631 C 1 *
+bit 1630 O 1 *
+bit 1629 O 1 *
+bit 1628 O 1 *
+bit 1627 O 1 *
+bit 1626 O 1 *
+bit 1625 O 1 *
+bit 1624 I 1 IO_V25
+bit 1623 O 1 IO_V25 1622 1 Z
+bit 1622 C 1 *
+bit 1621 I 1 IO_W26
+bit 1620 O 1 IO_W26 1619 1 Z
+bit 1619 C 1 *
+bit 1618 I 1 IO_V23
+bit 1617 O 1 IO_V23 1616 1 Z
+bit 1616 C 1 *
+bit 1615 I 1 IO_V22
+bit 1614 O 1 IO_V22 1613 1 Z
+bit 1613 C 1 *
+bit 1612 I 1 IO_V21
+bit 1611 O 1 IO_V21 1610 1 Z
+bit 1610 C 1 *
+bit 1609 I 1 IO_W21
+bit 1608 O 1 IO_W21 1607 1 Z
+bit 1607 C 1 *
+bit 1606 I 1 IO_W30
+bit 1605 O 1 IO_W30 1604 1 Z
+bit 1604 C 1 *
+bit 1603 I 1 IO_W29
+bit 1602 O 1 IO_W29 1601 1 Z
+bit 1601 C 1 *
+bit 1600 O 1 *
+bit 1599 O 1 *
+bit 1598 O 1 *
+bit 1597 O 1 *
+bit 1596 O 1 *
+bit 1595 O 1 *
+bit 1594 I 1 IO_Y30
+bit 1593 O 1 IO_Y30 1592 1 Z
+bit 1592 C 1 *
+bit 1591 I 1 IO_Y29
+bit 1590 O 1 IO_Y29 1589 1 Z
+bit 1589 C 1 *
+bit 1588 I 1 IO_Y28
+bit 1587 O 1 IO_Y28 1586 1 Z
+bit 1586 C 1 *
+bit 1585 I 1 IO_Y27
+bit 1584 O 1 IO_Y27 1583 1 Z
+bit 1583 C 1 *
+bit 1582 I 1 IO_Y26
+bit 1581 O 1 IO_Y26 1580 1 Z
+bit 1580 C 1 *
+bit 1579 I 1 IO_Y25
+bit 1578 O 1 IO_Y25 1577 1 Z
+bit 1577 C 1 *
+bit 1576 I 1 IO_Y24
+bit 1575 O 1 IO_Y24 1574 1 Z
+bit 1574 C 1 *
+bit 1573 I 1 IO_Y23
+bit 1572 O 1 IO_Y23 1571 1 Z
+bit 1571 C 1 *
+bit 1570 I 1 IO_Y21
+bit 1569 O 1 IO_Y21 1568 1 Z
+bit 1568 C 1 *
+bit 1567 I 1 IO_AA21
+bit 1566 O 1 IO_AA21 1565 1 Z
+bit 1565 C 1 *
+bit 1564 I 1 IO_AA29
+bit 1563 O 1 IO_AA29 1562 1 Z
+bit 1562 C 1 *
+bit 1561 I 1 IO_AA28
+bit 1560 O 1 IO_AA28 1559 1 Z
+bit 1559 C 1 *
+bit 1558 O 1 *
+bit 1557 O 1 *
+bit 1556 O 1 *
+bit 1555 O 1 *
+bit 1554 O 1 *
+bit 1553 O 1 *
+bit 1552 I 1 IO_AA25
+bit 1551 O 1 IO_AA25 1550 1 Z
+bit 1550 C 1 *
+bit 1549 I 1 IO_AA24
+bit 1548 O 1 IO_AA24 1547 1 Z
+bit 1547 C 1 *
+bit 1546 I 1 IO_AA22
+bit 1545 O 1 IO_AA22 1544 1 Z
+bit 1544 C 1 *
+bit 1543 I 1 IO_AB23
+bit 1542 O 1 IO_AB23 1541 1 Z
+bit 1541 C 1 *
+bit 1540 I 1 IO_AB30
+bit 1539 O 1 IO_AB30 1538 1 Z
+bit 1538 C 1 *
+bit 1537 I 1 IO_AB29
+bit 1536 O 1 IO_AB29 1535 1 Z
+bit 1535 C 1 *
+bit 1534 I 1 IO_AB27
+bit 1533 O 1 IO_AB27 1532 1 Z
+bit 1532 C 1 *
+bit 1531 I 1 IO_AB26
+bit 1530 O 1 IO_AB26 1529 1 Z
+bit 1529 C 1 *
+bit 1528 I 1 IO_AC30
+bit 1527 O 1 IO_AC30 1526 1 Z
+bit 1526 C 1 *
+bit 1525 I 1 IO_AC29
+bit 1524 O 1 IO_AC29 1523 1 Z
+bit 1523 C 1 *
+bit 1522 I 1 IO_AB25
+bit 1521 O 1 IO_AB25 1520 1 Z
+bit 1520 C 1 *
+bit 1519 O 1 *
+bit 1518 O 1 *
+bit 1517 O 1 *
+bit 1516 I 1 IO_AC28
+bit 1515 O 1 IO_AC28 1514 1 Z
+bit 1514 C 1 *
+bit 1513 I 1 IO_AC27
+bit 1512 O 1 IO_AC27 1511 1 Z
+bit 1511 C 1 *
+bit 1510 I 1 IO_AC26
+bit 1509 O 1 IO_AC26 1508 1 Z
+bit 1508 C 1 *
+bit 1507 I 1 IO_AC25
+bit 1506 O 1 IO_AC25 1505 1 Z
+bit 1505 C 1 *
+bit 1504 I 1 IO_AC24
+bit 1503 O 1 IO_AC24 1502 1 Z
+bit 1502 C 1 *
+bit 1501 I 1 IO_AD25
+bit 1500 O 1 IO_AD25 1499 1 Z
+bit 1499 C 1 *
+bit 1498 I 1 IO_AD30
+bit 1497 O 1 IO_AD30 1496 1 Z
+bit 1496 C 1 *
+bit 1495 I 1 IO_AD29
+bit 1494 O 1 IO_AD29 1493 1 Z
+bit 1493 C 1 *
+bit 1492 I 1 IO_AD28
+bit 1491 O 1 IO_AD28 1490 1 Z
+bit 1490 C 1 *
+bit 1489 I 1 IO_AD27
+bit 1488 O 1 IO_AD27 1487 1 Z
+bit 1487 C 1 *
+bit 1486 I 1 IO_AE29
+bit 1485 O 1 IO_AE29 1484 1 Z
+bit 1484 C 1 *
+bit 1483 I 1 IO_AE28
+bit 1482 O 1 IO_AE28 1481 1 Z
+bit 1481 C 1 *
+bit 1480 I 1 IO_AE26
+bit 1479 O 1 IO_AE26 1478 1 Z
+bit 1478 C 1 *
+bit 1477 I 1 IO_AF27
+bit 1476 O 1 IO_AF27 1475 1 Z
+bit 1475 C 1 *
+bit 1474 I 1 IO_AF30
+bit 1473 O 1 IO_AF30 1472 1 Z
+bit 1472 C 1 *
+bit 1471 I 1 IO_AF29
+bit 1470 O 1 IO_AF29 1469 1 Z
+bit 1469 C 1 *
+bit 1468 I 1 IO_AG30
+bit 1467 O 1 IO_AG30 1466 1 Z
+bit 1466 C 1 *
+bit 1465 I 1 IO_AG29
+bit 1464 O 1 IO_AG29 1463 1 Z
+bit 1463 C 1 *
+bit 1462 I 1 IO_AG28
+bit 1461 O 1 IO_AG28 1460 1 Z
+bit 1460 C 1 *
+bit 1459 I 1 IO_AG27
+bit 1458 O 1 IO_AG27 1457 1 Z
+bit 1457 C 1 *
+bit 1456 I 1 IO_AH30
+bit 1455 O 1 IO_AH30 1454 1 Z
+bit 1454 C 1 *
+bit 1453 I 1 IO_AH29
+bit 1452 O 1 IO_AH29 1451 1 Z
+bit 1451 C 1 *
+bit 1450 I 1 CCLK_AH28
+bit 1449 O 1 CCLK_AH28 1448 1 Z
+bit 1448 C 1 *
+bit 1447 I 1 DONE_AJ28
+bit 1446 O 1 DONE_AJ28 1445 1 Z
+bit 1445 C 1 *
+bit 1444 I 1 IO_AK28
+bit 1443 O 1 IO_AK28 1442 1 Z
+bit 1442 C 1 *
+bit 1441 I 1 IO_AJ27
+bit 1440 O 1 IO_AJ27 1439 1 Z
+bit 1439 C 1 *
+bit 1438 I 1 IO_AK27
+bit 1437 O 1 IO_AK27 1436 1 Z
+bit 1436 C 1 *
+bit 1435 I 1 IO_AJ26
+bit 1434 O 1 IO_AJ26 1433 1 Z
+bit 1433 C 1 *
+bit 1432 I 1 IO_AK26
+bit 1431 O 1 IO_AK26 1430 1 Z
+bit 1430 C 1 *
+bit 1429 I 1 IO_AH27
+bit 1428 O 1 IO_AH27 1427 1 Z
+bit 1427 C 1 *
+bit 1426 I 1 IO_AG26
+bit 1425 O 1 IO_AG26 1424 1 Z
+bit 1424 C 1 *
+bit 1423 I 1 IO_AF25
+bit 1422 O 1 IO_AF25 1421 1 Z
+bit 1421 C 1 *
+bit 1420 I 1 IO_AD24
+bit 1419 O 1 IO_AD24 1418 1 Z
+bit 1418 C 1 *
+bit 1417 I 1 IO_AC23
+bit 1416 O 1 IO_AC23 1415 1 Z
+bit 1415 C 1 *
+bit 1414 I 1 IO_AD23
+bit 1413 O 1 IO_AD23 1412 1 Z
+bit 1412 C 1 *
+bit 1411 I 1 IO_AE23
+bit 1410 O 1 IO_AE23 1409 1 Z
+bit 1409 C 1 *
+bit 1408 I 1 IO_AF23
+bit 1407 O 1 IO_AF23 1406 1 Z
+bit 1406 C 1 *
+bit 1405 I 1 IO_AG23
+bit 1404 O 1 IO_AG23 1403 1 Z
+bit 1403 C 1 *
+bit 1402 I 1 IO_AH23
+bit 1401 O 1 IO_AH23 1400 1 Z
+bit 1400 C 1 *
+bit 1399 O 1 *
+bit 1398 O 1 *
+bit 1397 O 1 *
+bit 1396 I 1 IO_AJ23
+bit 1395 O 1 IO_AJ23 1394 1 Z
+bit 1394 C 1 *
+bit 1393 I 1 IO_AK23
+bit 1392 O 1 IO_AK23 1391 1 Z
+bit 1391 C 1 *
+bit 1390 I 1 IO_AB22
+bit 1389 O 1 IO_AB22 1388 1 Z
+bit 1388 C 1 *
+bit 1387 I 1 IO_AC22
+bit 1386 O 1 IO_AC22 1385 1 Z
+bit 1385 C 1 *
+bit 1384 I 1 IO_AE22
+bit 1383 O 1 IO_AE22 1382 1 Z
+bit 1382 C 1 *
+bit 1381 I 1 IO_AF22
+bit 1380 O 1 IO_AF22 1379 1 Z
+bit 1379 C 1 *
+bit 1378 I 1 IO_AG22
+bit 1377 O 1 IO_AG22 1376 1 Z
+bit 1376 C 1 *
+bit 1375 I 1 IO_AJ22
+bit 1374 O 1 IO_AJ22 1373 1 Z
+bit 1373 C 1 *
+bit 1372 I 1 IO_AK22
+bit 1371 O 1 IO_AK22 1370 1 Z
+bit 1370 C 1 *
+bit 1369 O 1 *
+bit 1368 O 1 *
+bit 1367 O 1 *
+bit 1366 I 1 IO_AD21
+bit 1365 O 1 IO_AD21 1364 1 Z
+bit 1364 C 1 *
+bit 1363 I 1 IO_AE21
+bit 1362 O 1 IO_AE21 1361 1 Z
+bit 1361 C 1 *
+bit 1360 I 1 IO_AH21
+bit 1359 O 1 IO_AH21 1358 1 Z
+bit 1358 C 1 *
+bit 1357 I 1 IO_AJ21
+bit 1356 O 1 IO_AJ21 1355 1 Z
+bit 1355 C 1 *
+bit 1354 O 1 *
+bit 1353 O 1 *
+bit 1352 O 1 *
+bit 1351 I 1 IO_AB21
+bit 1350 O 1 IO_AB21 1349 1 Z
+bit 1349 C 1 *
+bit 1348 I 1 IO_AA20
+bit 1347 O 1 IO_AA20 1346 1 Z
+bit 1346 C 1 *
+bit 1345 I 1 IO_AC20
+bit 1344 O 1 IO_AC20 1343 1 Z
+bit 1343 C 1 *
+bit 1342 I 1 IO_AD20
+bit 1341 O 1 IO_AD20 1340 1 Z
+bit 1340 C 1 *
+bit 1339 O 1 *
+bit 1338 O 1 *
+bit 1337 O 1 *
+bit 1336 I 1 IO_AE20
+bit 1335 O 1 IO_AE20 1334 1 Z
+bit 1334 C 1 *
+bit 1333 I 1 IO_AF20
+bit 1332 O 1 IO_AF20 1331 1 Z
+bit 1331 C 1 *
+bit 1330 I 1 IO_AG20
+bit 1329 O 1 IO_AG20 1328 1 Z
+bit 1328 C 1 *
+bit 1327 I 1 IO_AH20
+bit 1326 O 1 IO_AH20 1325 1 Z
+bit 1325 C 1 *
+bit 1324 O 1 *
+bit 1323 O 1 *
+bit 1322 O 1 *
+bit 1321 I 1 IO_AJ20
+bit 1320 O 1 IO_AJ20 1319 1 Z
+bit 1319 C 1 *
+bit 1318 I 1 IO_AK20
+bit 1317 O 1 IO_AK20 1316 1 Z
+bit 1316 C 1 *
+bit 1315 I 1 IO_AA19
+bit 1314 O 1 IO_AA19 1313 1 Z
+bit 1313 C 1 *
+bit 1312 I 1 IO_AB19
+bit 1311 O 1 IO_AB19 1310 1 Z
+bit 1310 C 1 *
+bit 1309 O 1 *
+bit 1308 O 1 *
+bit 1307 O 1 *
+bit 1306 I 1 IO_AC19
+bit 1305 O 1 IO_AC19 1304 1 Z
+bit 1304 C 1 *
+bit 1303 I 1 IO_AD19
+bit 1302 O 1 IO_AD19 1301 1 Z
+bit 1301 C 1 *
+bit 1300 I 1 IO_AE19
+bit 1299 O 1 IO_AE19 1298 1 Z
+bit 1298 C 1 *
+bit 1297 I 1 IO_AF19
+bit 1296 O 1 IO_AF19 1295 1 Z
+bit 1295 C 1 *
+bit 1294 O 1 *
+bit 1293 O 1 *
+bit 1292 O 1 *
+bit 1291 I 1 IO_AG19
+bit 1290 O 1 IO_AG19 1289 1 Z
+bit 1289 C 1 *
+bit 1288 I 1 IO_AH19
+bit 1287 O 1 IO_AH19 1286 1 Z
+bit 1286 C 1 *
+bit 1285 I 1 IO_AJ19
+bit 1284 O 1 IO_AJ19 1283 1 Z
+bit 1283 C 1 *
+bit 1282 I 1 IO_AK19
+bit 1281 O 1 IO_AK19 1280 1 Z
+bit 1280 C 1 *
+bit 1279 I 1 IO_AA18
+bit 1278 O 1 IO_AA18 1277 1 Z
+bit 1277 C 1 *
+bit 1276 I 1 IO_AB18
+bit 1275 O 1 IO_AB18 1274 1 Z
+bit 1274 C 1 *
+bit 1273 I 1 IO_AC18
+bit 1272 O 1 IO_AC18 1271 1 Z
+bit 1271 C 1 *
+bit 1270 I 1 IO_AE18
+bit 1269 O 1 IO_AE18 1268 1 Z
+bit 1268 C 1 *
+bit 1267 I 1 IO_AF18
+bit 1266 O 1 IO_AF18 1265 1 Z
+bit 1265 C 1 *
+bit 1264 I 1 IO_AG18
+bit 1263 O 1 IO_AG18 1262 1 Z
+bit 1262 C 1 *
+bit 1261 I 1 IO_AJ18
+bit 1260 O 1 IO_AJ18 1259 1 Z
+bit 1259 C 1 *
+bit 1258 I 1 IO_AK18
+bit 1257 O 1 IO_AK18 1256 1 Z
+bit 1256 C 1 *
+bit 1255 I 1 IO_AA17
+bit 1254 O 1 IO_AA17 1253 1 Z
+bit 1253 C 1 *
+bit 1252 I 1 IO_AB17
+bit 1251 O 1 IO_AB17 1250 1 Z
+bit 1250 C 1 *
+bit 1249 I 1 IO_AA16
+bit 1248 O 1 IO_AA16 1247 1 Z
+bit 1247 C 1 *
+bit 1246 I 1 IO_AD17
+bit 1245 O 1 IO_AD17 1244 1 Z
+bit 1244 C 1 *
+bit 1243 I 1 IO_AE17
+bit 1242 O 1 IO_AE17 1241 1 Z
+bit 1241 C 1 *
+bit 1240 I 1 IO_AH17
+bit 1239 O 1 IO_AH17 1238 1 Z
+bit 1238 C 1 *
+bit 1237 I 1 IO_AJ17
+bit 1236 O 1 IO_AJ17 1235 1 Z
+bit 1235 C 1 *
+bit 1234 O 1 *
+bit 1233 O 1 *
+bit 1232 O 1 *
+bit 1231 I 1 IO_AB16
+bit 1230 O 1 IO_AB16 1229 1 Z
+bit 1229 C 1 *
+bit 1228 I 1 IO_AC16
+bit 1227 O 1 IO_AC16 1226 1 Z
+bit 1226 C 1 *
+bit 1225 I 1 IO_AD16
+bit 1224 O 1 IO_AD16 1223 1 Z
+bit 1223 C 1 *
+bit 1222 I 1 IO_AE16
+bit 1221 O 1 IO_AE16 1220 1 Z
+bit 1220 C 1 *
+bit 1219 I 1 IO_AF16
+bit 1218 O 1 IO_AF16 1217 1 Z
+bit 1217 C 1 *
+bit 1216 I 1 IO_AG16
+bit 1215 O 1 IO_AG16 1214 1 Z
+bit 1214 C 1 *
+bit 1213 I 1 IO_AH16
+bit 1212 O 1 IO_AH16 1211 1 Z
+bit 1211 C 1 *
+bit 1210 I 1 IO_AJ16
+bit 1209 O 1 IO_AJ16 1208 1 Z
+bit 1208 C 1 *
+bit 1207 I 1 IO_AK16
+bit 1206 O 1 IO_AK16 1205 1 Z
+bit 1205 C 1 *
+bit 1204 I 1 IO_AK15
+bit 1203 O 1 IO_AK15 1202 1 Z
+bit 1202 C 1 *
+bit 1201 I 1 IO_AJ15
+bit 1200 O 1 IO_AJ15 1199 1 Z
+bit 1199 C 1 *
+bit 1198 I 1 IO_AH15
+bit 1197 O 1 IO_AH15 1196 1 Z
+bit 1196 C 1 *
+bit 1195 I 1 IO_AG15
+bit 1194 O 1 IO_AG15 1193 1 Z
+bit 1193 C 1 *
+bit 1192 I 1 IO_AF15
+bit 1191 O 1 IO_AF15 1190 1 Z
+bit 1190 C 1 *
+bit 1189 I 1 IO_AE15
+bit 1188 O 1 IO_AE15 1187 1 Z
+bit 1187 C 1 *
+bit 1186 I 1 IO_AD15
+bit 1185 O 1 IO_AD15 1184 1 Z
+bit 1184 C 1 *
+bit 1183 I 1 IO_AD14
+bit 1182 O 1 IO_AD14 1181 1 Z
+bit 1181 C 1 *
+bit 1180 I 1 IO_AC15
+bit 1179 O 1 IO_AC15 1178 1 Z
+bit 1178 C 1 *
+bit 1177 I 1 IO_AB15
+bit 1176 O 1 IO_AB15 1175 1 Z
+bit 1175 C 1 *
+bit 1174 I 1 IO_AA15
+bit 1173 O 1 IO_AA15 1172 1 Z
+bit 1172 C 1 *
+bit 1171 I 1 IO_AJ14
+bit 1170 O 1 IO_AJ14 1169 1 Z
+bit 1169 C 1 *
+bit 1168 I 1 IO_AH14
+bit 1167 O 1 IO_AH14 1166 1 Z
+bit 1166 C 1 *
+bit 1165 I 1 IO_AE14
+bit 1164 O 1 IO_AE14 1163 1 Z
+bit 1163 C 1 *
+bit 1162 I 1 IO_AE13
+bit 1161 O 1 IO_AE13 1160 1 Z
+bit 1160 C 1 *
+bit 1159 O 1 *
+bit 1158 O 1 *
+bit 1157 O 1 *
+bit 1156 I 1 IO_AB14
+bit 1155 O 1 IO_AB14 1154 1 Z
+bit 1154 C 1 *
+bit 1153 I 1 IO_AA14
+bit 1152 O 1 IO_AA14 1151 1 Z
+bit 1151 C 1 *
+bit 1150 I 1 IO_AK13
+bit 1149 O 1 IO_AK13 1148 1 Z
+bit 1148 C 1 *
+bit 1147 I 1 IO_AJ13
+bit 1146 O 1 IO_AJ13 1145 1 Z
+bit 1145 C 1 *
+bit 1144 O 1 *
+bit 1143 O 1 *
+bit 1142 O 1 *
+bit 1141 I 1 IO_AG13
+bit 1140 O 1 IO_AG13 1139 1 Z
+bit 1139 C 1 *
+bit 1138 I 1 IO_AF13
+bit 1137 O 1 IO_AF13 1136 1 Z
+bit 1136 C 1 *
+bit 1135 I 1 IO_AC13
+bit 1134 O 1 IO_AC13 1133 1 Z
+bit 1133 C 1 *
+bit 1132 I 1 IO_AB13
+bit 1131 O 1 IO_AB13 1130 1 Z
+bit 1130 C 1 *
+bit 1129 O 1 *
+bit 1128 O 1 *
+bit 1127 O 1 *
+bit 1126 I 1 IO_AA13
+bit 1125 O 1 IO_AA13 1124 1 Z
+bit 1124 C 1 *
+bit 1123 I 1 IO_AA12
+bit 1122 O 1 IO_AA12 1121 1 Z
+bit 1121 C 1 *
+bit 1120 I 1 IO_AK12
+bit 1119 O 1 IO_AK12 1118 1 Z
+bit 1118 C 1 *
+bit 1117 I 1 IO_AJ12
+bit 1116 O 1 IO_AJ12 1115 1 Z
+bit 1115 C 1 *
+bit 1114 O 1 *
+bit 1113 O 1 *
+bit 1112 O 1 *
+bit 1111 I 1 IO_AH12
+bit 1110 O 1 IO_AH12 1109 1 Z
+bit 1109 C 1 *
+bit 1108 I 1 IO_AG12
+bit 1107 O 1 IO_AG12 1106 1 Z
+bit 1106 C 1 *
+bit 1105 I 1 IO_AF12
+bit 1104 O 1 IO_AF12 1103 1 Z
+bit 1103 C 1 *
+bit 1102 I 1 IO_AE12
+bit 1101 O 1 IO_AE12 1100 1 Z
+bit 1100 C 1 *
+bit 1099 O 1 *
+bit 1098 O 1 *
+bit 1097 O 1 *
+bit 1096 I 1 IO_AD12
+bit 1095 O 1 IO_AD12 1094 1 Z
+bit 1094 C 1 *
+bit 1093 I 1 IO_AC12
+bit 1092 O 1 IO_AC12 1091 1 Z
+bit 1091 C 1 *
+bit 1090 I 1 IO_AB12
+bit 1089 O 1 IO_AB12 1088 1 Z
+bit 1088 C 1 *
+bit 1087 I 1 IO_AC11
+bit 1086 O 1 IO_AC11 1085 1 Z
+bit 1085 C 1 *
+bit 1084 O 1 *
+bit 1083 O 1 *
+bit 1082 O 1 *
+bit 1081 I 1 IO_AK11
+bit 1080 O 1 IO_AK11 1079 1 Z
+bit 1079 C 1 *
+bit 1078 I 1 IO_AJ11
+bit 1077 O 1 IO_AJ11 1076 1 Z
+bit 1076 C 1 *
+bit 1075 I 1 IO_AH11
+bit 1074 O 1 IO_AH11 1073 1 Z
+bit 1073 C 1 *
+bit 1072 I 1 IO_AG11
+bit 1071 O 1 IO_AG11 1070 1 Z
+bit 1070 C 1 *
+bit 1069 O 1 *
+bit 1068 O 1 *
+bit 1067 O 1 *
+bit 1066 I 1 IO_AF11
+bit 1065 O 1 IO_AF11 1064 1 Z
+bit 1064 C 1 *
+bit 1063 I 1 IO_AE11
+bit 1062 O 1 IO_AE11 1061 1 Z
+bit 1061 C 1 *
+bit 1060 I 1 IO_AD11
+bit 1059 O 1 IO_AD11 1058 1 Z
+bit 1058 C 1 *
+bit 1057 I 1 IO_AD10
+bit 1056 O 1 IO_AD10 1055 1 Z
+bit 1055 C 1 *
+bit 1054 I 1 IO_AA11
+bit 1053 O 1 IO_AA11 1052 1 Z
+bit 1052 C 1 *
+bit 1051 I 1 IO_AJ10
+bit 1050 O 1 IO_AJ10 1049 1 Z
+bit 1049 C 1 *
+bit 1048 I 1 IO_AH10
+bit 1047 O 1 IO_AH10 1046 1 Z
+bit 1046 C 1 *
+bit 1045 I 1 IO_AE10
+bit 1044 O 1 IO_AE10 1043 1 Z
+bit 1043 C 1 *
+bit 1042 I 1 IO_AE9
+bit 1041 O 1 IO_AE9 1040 1 Z
+bit 1040 C 1 *
+bit 1039 I 1 IO_AB10
+bit 1038 O 1 IO_AB10 1037 1 Z
+bit 1037 C 1 *
+bit 1036 I 1 IO_AK9
+bit 1035 O 1 IO_AK9 1034 1 Z
+bit 1034 C 1 *
+bit 1033 I 1 IO_AJ9
+bit 1032 O 1 IO_AJ9 1031 1 Z
+bit 1031 C 1 *
+bit 1030 I 1 IO_AG9
+bit 1029 O 1 IO_AG9 1028 1 Z
+bit 1028 C 1 *
+bit 1027 I 1 IO_AF9
+bit 1026 O 1 IO_AF9 1025 1 Z
+bit 1025 C 1 *
+bit 1024 O 1 *
+bit 1023 O 1 *
+bit 1022 O 1 *
+bit 1021 I 1 IO_AC9
+bit 1020 O 1 IO_AC9 1019 1 Z
+bit 1019 C 1 *
+bit 1018 I 1 IO_AB9
+bit 1017 O 1 IO_AB9 1016 1 Z
+bit 1016 C 1 *
+bit 1015 I 1 IO_AK8
+bit 1014 O 1 IO_AK8 1013 1 Z
+bit 1013 C 1 *
+bit 1012 I 1 IO_AJ8
+bit 1011 O 1 IO_AJ8 1010 1 Z
+bit 1010 C 1 *
+bit 1009 O 1 *
+bit 1008 O 1 *
+bit 1007 O 1 *
+bit 1006 I 1 IO_AH7
+bit 1005 O 1 IO_AH7 1004 1 Z
+bit 1004 C 1 *
+bit 1003 I 1 IO_AG7
+bit 1002 O 1 IO_AG7 1001 1 Z
+bit 1001 C 1 *
+bit 1000 I 1 IO_AE7
+bit 999 O 1 IO_AE7 998 1 Z
+bit 998 C 1 *
+bit 997 I 1 IO_AD7
+bit 996 O 1 IO_AD7 995 1 Z
+bit 995 C 1 *
+bit 994 I 1 IO_AE6
+bit 993 O 1 IO_AE6 992 1 Z
+bit 992 C 1 *
+bit 991 I 1 IO_AJ6
+bit 990 O 1 IO_AJ6 989 1 Z
+bit 989 C 1 *
+bit 988 I 1 IO_AH6
+bit 987 O 1 IO_AH6 986 1 Z
+bit 986 C 1 *
+bit 985 I 1 IO_AF6
+bit 984 O 1 IO_AF6 983 1 Z
+bit 983 C 1 *
+bit 982 I 1 IO_AG5
+bit 981 O 1 IO_AG5 980 1 Z
+bit 980 C 1 *
+bit 979 I 1 IO_AH4
+bit 978 O 1 IO_AH4 977 1 Z
+bit 977 C 1 *
+bit 976 I 1 IO_AK5
+bit 975 O 1 IO_AK5 974 1 Z
+bit 974 C 1 *
+bit 973 I 1 IO_AJ5
+bit 972 O 1 IO_AJ5 971 1 Z
+bit 971 C 1 *
+bit 970 I 1 IO_AK4
+bit 969 O 1 IO_AK4 968 1 Z
+bit 968 C 1 *
+bit 967 I 1 IO_AJ4
+bit 966 O 1 IO_AJ4 965 1 Z
+bit 965 C 1 *
+bit 964 I 1 M2_AK3
+bit 963 I 1 M0_AJ3
+bit 962 I 1 M1_AH3
+bit 961 I 1 IO_AH2
+bit 960 O 1 IO_AH2 959 1 Z
+bit 959 C 1 *
+bit 958 I 1 IO_AH1
+bit 957 O 1 IO_AH1 956 1 Z
+bit 956 C 1 *
+bit 955 I 1 IO_AG4
+bit 954 O 1 IO_AG4 953 1 Z
+bit 953 C 1 *
+bit 952 I 1 IO_AG3
+bit 951 O 1 IO_AG3 950 1 Z
+bit 950 C 1 *
+bit 949 I 1 IO_AG2
+bit 948 O 1 IO_AG2 947 1 Z
+bit 947 C 1 *
+bit 946 I 1 IO_AG1
+bit 945 O 1 IO_AG1 944 1 Z
+bit 944 C 1 *
+bit 943 I 1 IO_AF2
+bit 942 O 1 IO_AF2 941 1 Z
+bit 941 C 1 *
+bit 940 I 1 IO_AF1
+bit 939 O 1 IO_AF1 938 1 Z
+bit 938 C 1 *
+bit 937 I 1 IO_AF4
+bit 936 O 1 IO_AF4 935 1 Z
+bit 935 C 1 *
+bit 934 I 1 IO_AE5
+bit 933 O 1 IO_AE5 932 1 Z
+bit 932 C 1 *
+bit 931 I 1 IO_AE3
+bit 930 O 1 IO_AE3 929 1 Z
+bit 929 C 1 *
+bit 928 I 1 IO_AE2
+bit 927 O 1 IO_AE2 926 1 Z
+bit 926 C 1 *
+bit 925 I 1 IO_AD4
+bit 924 O 1 IO_AD4 923 1 Z
+bit 923 C 1 *
+bit 922 I 1 IO_AD3
+bit 921 O 1 IO_AD3 920 1 Z
+bit 920 C 1 *
+bit 919 I 1 IO_AD2
+bit 918 O 1 IO_AD2 917 1 Z
+bit 917 C 1 *
+bit 916 I 1 IO_AD1
+bit 915 O 1 IO_AD1 914 1 Z
+bit 914 C 1 *
+bit 913 I 1 IO_AD6
+bit 912 O 1 IO_AD6 911 1 Z
+bit 911 C 1 *
+bit 910 I 1 IO_AC7
+bit 909 O 1 IO_AC7 908 1 Z
+bit 908 C 1 *
+bit 907 I 1 IO_AC6
+bit 906 O 1 IO_AC6 905 1 Z
+bit 905 C 1 *
+bit 904 I 1 IO_AC5
+bit 903 O 1 IO_AC5 902 1 Z
+bit 902 C 1 *
+bit 901 I 1 IO_AC4
+bit 900 O 1 IO_AC4 899 1 Z
+bit 899 C 1 *
+bit 898 I 1 IO_AC3
+bit 897 O 1 IO_AC3 896 1 Z
+bit 896 C 1 *
+bit 895 O 1 *
+bit 894 O 1 *
+bit 893 O 1 *
+bit 892 I 1 IO_AB6
+bit 891 O 1 IO_AB6 890 1 Z
+bit 890 C 1 *
+bit 889 I 1 IO_AC2
+bit 888 O 1 IO_AC2 887 1 Z
+bit 887 C 1 *
+bit 886 I 1 IO_AC1
+bit 885 O 1 IO_AC1 884 1 Z
+bit 884 C 1 *
+bit 883 I 1 IO_AB5
+bit 882 O 1 IO_AB5 881 1 Z
+bit 881 C 1 *
+bit 880 I 1 IO_AB4
+bit 879 O 1 IO_AB4 878 1 Z
+bit 878 C 1 *
+bit 877 I 1 IO_AB2
+bit 876 O 1 IO_AB2 875 1 Z
+bit 875 C 1 *
+bit 874 I 1 IO_AB1
+bit 873 O 1 IO_AB1 872 1 Z
+bit 872 C 1 *
+bit 871 I 1 IO_AB8
+bit 870 O 1 IO_AB8 869 1 Z
+bit 869 C 1 *
+bit 868 I 1 IO_AA9
+bit 867 O 1 IO_AA9 866 1 Z
+bit 866 C 1 *
+bit 865 I 1 IO_AA7
+bit 864 O 1 IO_AA7 863 1 Z
+bit 863 C 1 *
+bit 862 I 1 IO_AA6
+bit 861 O 1 IO_AA6 860 1 Z
+bit 860 C 1 *
+bit 859 O 1 *
+bit 858 O 1 *
+bit 857 O 1 *
+bit 856 O 1 *
+bit 855 O 1 *
+bit 854 O 1 *
+bit 853 I 1 IO_AA3
+bit 852 O 1 IO_AA3 851 1 Z
+bit 851 C 1 *
+bit 850 I 1 IO_AA2
+bit 849 O 1 IO_AA2 848 1 Z
+bit 848 C 1 *
+bit 847 I 1 IO_AA10
+bit 846 O 1 IO_AA10 845 1 Z
+bit 845 C 1 *
+bit 844 I 1 IO_Y10
+bit 843 O 1 IO_Y10 842 1 Z
+bit 842 C 1 *
+bit 841 I 1 IO_Y8
+bit 840 O 1 IO_Y8 839 1 Z
+bit 839 C 1 *
+bit 838 I 1 IO_Y7
+bit 837 O 1 IO_Y7 836 1 Z
+bit 836 C 1 *
+bit 835 I 1 IO_Y6
+bit 834 O 1 IO_Y6 833 1 Z
+bit 833 C 1 *
+bit 832 I 1 IO_Y5
+bit 831 O 1 IO_Y5 830 1 Z
+bit 830 C 1 *
+bit 829 O 1 *
+bit 828 O 1 *
+bit 827 O 1 *
+bit 826 O 1 *
+bit 825 O 1 *
+bit 824 O 1 *
+bit 823 I 1 IO_Y2
+bit 822 O 1 IO_Y2 821 1 Z
+bit 821 C 1 *
+bit 820 I 1 IO_Y1
+bit 819 O 1 IO_Y1 818 1 Z
+bit 818 C 1 *
+bit 817 O 1 *
+bit 816 O 1 *
+bit 815 O 1 *
+bit 814 O 1 *
+bit 813 O 1 *
+bit 812 O 1 *
+bit 811 I 1 IO_W7
+bit 810 O 1 IO_W7 809 1 Z
+bit 809 C 1 *
+bit 808 I 1 IO_W6
+bit 807 O 1 IO_W6 806 1 Z
+bit 806 C 1 *
+bit 805 I 1 IO_W4
+bit 804 O 1 IO_W4 803 1 Z
+bit 803 C 1 *
+bit 802 I 1 IO_W3
+bit 801 O 1 IO_W3 800 1 Z
+bit 800 C 1 *
+bit 799 I 1 IO_W2
+bit 798 O 1 IO_W2 797 1 Z
+bit 797 C 1 *
+bit 796 I 1 IO_W1
+bit 795 O 1 IO_W1 794 1 Z
+bit 794 C 1 *
+bit 793 I 1 IO_W10
+bit 792 O 1 IO_W10 791 1 Z
+bit 791 C 1 *
+bit 790 I 1 IO_V10
+bit 789 O 1 IO_V10 788 1 Z
+bit 788 C 1 *
+bit 787 O 1 *
+bit 786 O 1 *
+bit 785 O 1 *
+bit 784 O 1 *
+bit 783 O 1 *
+bit 782 O 1 *
+bit 781 I 1 IO_W5
+bit 780 O 1 IO_W5 779 1 Z
+bit 779 C 1 *
+bit 778 I 1 IO_V6
+bit 777 O 1 IO_V6 776 1 Z
+bit 776 C 1 *
+bit 775 I 1 IO_V5
+bit 774 O 1 IO_V5 773 1 Z
+bit 773 C 1 *
+bit 772 I 1 IO_V4
+bit 771 O 1 IO_V4 770 1 Z
+bit 770 C 1 *
+bit 769 I 1 IO_V2
+bit 768 O 1 IO_V2 767 1 Z
+bit 767 C 1 *
+bit 766 I 1 IO_V1
+bit 765 O 1 IO_V1 764 1 Z
+bit 764 C 1 *
+bit 763 I 1 IO_U10
+bit 762 O 1 IO_U10 761 1 Z
+bit 761 C 1 *
+bit 760 I 1 IO_U9
+bit 759 O 1 IO_U9 758 1 Z
+bit 758 C 1 *
+bit 757 I 1 IO_U7
+bit 756 O 1 IO_U7 755 1 Z
+bit 755 C 1 *
+bit 754 I 1 IO_U6
+bit 753 O 1 IO_U6 752 1 Z
+bit 752 C 1 *
+bit 751 O 1 *
+bit 750 O 1 *
+bit 749 O 1 *
+bit 748 O 1 *
+bit 747 O 1 *
+bit 746 O 1 *
+bit 745 I 1 IO_T10
+bit 744 O 1 IO_T10 743 1 Z
+bit 743 C 1 *
+bit 742 I 1 IO_T9
+bit 741 O 1 IO_T9 740 1 Z
+bit 740 C 1 *
+bit 739 I 1 IO_T6
+bit 738 O 1 IO_T6 737 1 Z
+bit 737 C 1 *
+bit 736 I 1 IO_T5
+bit 735 O 1 IO_T5 734 1 Z
+bit 734 C 1 *
+bit 733 I 1 IO_T4
+bit 732 O 1 IO_T4 731 1 Z
+bit 731 C 1 *
+bit 730 I 1 IO_T3
+bit 729 O 1 IO_T3 728 1 Z
+bit 728 C 1 *
+bit 727 I 1 IO_T2
+bit 726 O 1 IO_T2 725 1 Z
+bit 725 C 1 *
+bit 724 I 1 IO_T1
+bit 723 O 1 IO_T1 722 1 Z
+bit 722 C 1 *
+bit 721 I 1 IO_R1
+bit 720 O 1 IO_R1 719 1 Z
+bit 719 C 1 *
+bit 718 I 1 IO_R2
+bit 717 O 1 IO_R2 716 1 Z
+bit 716 C 1 *
+bit 715 I 1 IO_R3
+bit 714 O 1 IO_R3 713 1 Z
+bit 713 C 1 *
+bit 712 I 1 IO_R4
+bit 711 O 1 IO_R4 710 1 Z
+bit 710 C 1 *
+bit 709 I 1 IO_R5
+bit 708 O 1 IO_R5 707 1 Z
+bit 707 C 1 *
+bit 706 I 1 IO_R6
+bit 705 O 1 IO_R6 704 1 Z
+bit 704 C 1 *
+bit 703 I 1 IO_R7
+bit 702 O 1 IO_R7 701 1 Z
+bit 701 C 1 *
+bit 700 I 1 IO_R8
+bit 699 O 1 IO_R8 698 1 Z
+bit 698 C 1 *
+bit 697 O 1 *
+bit 696 O 1 *
+bit 695 O 1 *
+bit 694 O 1 *
+bit 693 O 1 *
+bit 692 O 1 *
+bit 691 I 1 IO_R9
+bit 690 O 1 IO_R9 689 1 Z
+bit 689 C 1 *
+bit 688 I 1 IO_R10
+bit 687 O 1 IO_R10 686 1 Z
+bit 686 C 1 *
+bit 685 I 1 IO_P2
+bit 684 O 1 IO_P2 683 1 Z
+bit 683 C 1 *
+bit 682 I 1 IO_P3
+bit 681 O 1 IO_P3 680 1 Z
+bit 680 C 1 *
+bit 679 I 1 IO_P6
+bit 678 O 1 IO_P6 677 1 Z
+bit 677 C 1 *
+bit 676 I 1 IO_P7
+bit 675 O 1 IO_P7 674 1 Z
+bit 674 C 1 *
+bit 673 I 1 IO_P9
+bit 672 O 1 IO_P9 671 1 Z
+bit 671 C 1 *
+bit 670 I 1 IO_P10
+bit 669 O 1 IO_P10 668 1 Z
+bit 668 C 1 *
+bit 667 I 1 IO_N1
+bit 666 O 1 IO_N1 665 1 Z
+bit 665 C 1 *
+bit 664 I 1 IO_N2
+bit 663 O 1 IO_N2 662 1 Z
+bit 662 C 1 *
+bit 661 O 1 *
+bit 660 O 1 *
+bit 659 O 1 *
+bit 658 O 1 *
+bit 657 O 1 *
+bit 656 O 1 *
+bit 655 I 1 IO_N8
+bit 654 O 1 IO_N8 653 1 Z
+bit 653 C 1 *
+bit 652 I 1 IO_N9
+bit 651 O 1 IO_N9 650 1 Z
+bit 650 C 1 *
+bit 649 I 1 IO_N10
+bit 648 O 1 IO_N10 647 1 Z
+bit 647 C 1 *
+bit 646 I 1 IO_M10
+bit 645 O 1 IO_M10 644 1 Z
+bit 644 C 1 *
+bit 643 I 1 IO_M1
+bit 642 O 1 IO_M1 641 1 Z
+bit 641 C 1 *
+bit 640 I 1 IO_M2
+bit 639 O 1 IO_M2 638 1 Z
+bit 638 C 1 *
+bit 637 I 1 IO_M3
+bit 636 O 1 IO_M3 635 1 Z
+bit 635 C 1 *
+bit 634 I 1 IO_M4
+bit 633 O 1 IO_M4 632 1 Z
+bit 632 C 1 *
+bit 631 O 1 *
+bit 630 O 1 *
+bit 629 O 1 *
+bit 628 O 1 *
+bit 627 O 1 *
+bit 626 O 1 *
+bit 625 I 1 IO_L1
+bit 624 O 1 IO_L1 623 1 Z
+bit 623 C 1 *
+bit 622 I 1 IO_L2
+bit 621 O 1 IO_L2 620 1 Z
+bit 620 C 1 *
+bit 619 I 1 IO_L3
+bit 618 O 1 IO_L3 617 1 Z
+bit 617 C 1 *
+bit 616 I 1 IO_L4
+bit 615 O 1 IO_L4 614 1 Z
+bit 614 C 1 *
+bit 613 I 1 IO_L5
+bit 612 O 1 IO_L5 611 1 Z
+bit 611 C 1 *
+bit 610 I 1 IO_L6
+bit 609 O 1 IO_L6 608 1 Z
+bit 608 C 1 *
+bit 607 I 1 IO_L7
+bit 606 O 1 IO_L7 605 1 Z
+bit 605 C 1 *
+bit 604 I 1 IO_L8
+bit 603 O 1 IO_L8 602 1 Z
+bit 602 C 1 *
+bit 601 I 1 IO_L10
+bit 600 O 1 IO_L10 599 1 Z
+bit 599 C 1 *
+bit 598 I 1 IO_K10
+bit 597 O 1 IO_K10 596 1 Z
+bit 596 C 1 *
+bit 595 I 1 IO_K2
+bit 594 O 1 IO_K2 593 1 Z
+bit 593 C 1 *
+bit 592 I 1 IO_K3
+bit 591 O 1 IO_K3 590 1 Z
+bit 590 C 1 *
+bit 589 O 1 *
+bit 588 O 1 *
+bit 587 O 1 *
+bit 586 O 1 *
+bit 585 O 1 *
+bit 584 O 1 *
+bit 583 I 1 IO_K6
+bit 582 O 1 IO_K6 581 1 Z
+bit 581 C 1 *
+bit 580 I 1 IO_K7
+bit 579 O 1 IO_K7 578 1 Z
+bit 578 C 1 *
+bit 577 I 1 IO_K9
+bit 576 O 1 IO_K9 575 1 Z
+bit 575 C 1 *
+bit 574 I 1 IO_J8
+bit 573 O 1 IO_J8 572 1 Z
+bit 572 C 1 *
+bit 571 I 1 IO_J1
+bit 570 O 1 IO_J1 569 1 Z
+bit 569 C 1 *
+bit 568 I 1 IO_J2
+bit 567 O 1 IO_J2 566 1 Z
+bit 566 C 1 *
+bit 565 I 1 IO_J4
+bit 564 O 1 IO_J4 563 1 Z
+bit 563 C 1 *
+bit 562 I 1 IO_J5
+bit 561 O 1 IO_J5 560 1 Z
+bit 560 C 1 *
+bit 559 I 1 IO_H1
+bit 558 O 1 IO_H1 557 1 Z
+bit 557 C 1 *
+bit 556 I 1 IO_H2
+bit 555 O 1 IO_H2 554 1 Z
+bit 554 C 1 *
+bit 553 I 1 IO_J6
+bit 552 O 1 IO_J6 551 1 Z
+bit 551 C 1 *
+bit 550 O 1 *
+bit 549 O 1 *
+bit 548 O 1 *
+bit 547 I 1 IO_H3
+bit 546 O 1 IO_H3 545 1 Z
+bit 545 C 1 *
+bit 544 I 1 IO_H4
+bit 543 O 1 IO_H4 542 1 Z
+bit 542 C 1 *
+bit 541 I 1 IO_H5
+bit 540 O 1 IO_H5 539 1 Z
+bit 539 C 1 *
+bit 538 I 1 IO_H6
+bit 537 O 1 IO_H6 536 1 Z
+bit 536 C 1 *
+bit 535 I 1 IO_H7
+bit 534 O 1 IO_H7 533 1 Z
+bit 533 C 1 *
+bit 532 I 1 IO_G6
+bit 531 O 1 IO_G6 530 1 Z
+bit 530 C 1 *
+bit 529 I 1 IO_G1
+bit 528 O 1 IO_G1 527 1 Z
+bit 527 C 1 *
+bit 526 I 1 IO_G2
+bit 525 O 1 IO_G2 524 1 Z
+bit 524 C 1 *
+bit 523 I 1 IO_G3
+bit 522 O 1 IO_G3 521 1 Z
+bit 521 C 1 *
+bit 520 I 1 IO_G4
+bit 519 O 1 IO_G4 518 1 Z
+bit 518 C 1 *
+bit 517 I 1 IO_F2
+bit 516 O 1 IO_F2 515 1 Z
+bit 515 C 1 *
+bit 514 I 1 IO_F3
+bit 513 O 1 IO_F3 512 1 Z
+bit 512 C 1 *
+bit 511 I 1 IO_F5
+bit 510 O 1 IO_F5 509 1 Z
+bit 509 C 1 *
+bit 508 I 1 IO_E4
+bit 507 O 1 IO_E4 506 1 Z
+bit 506 C 1 *
+bit 505 I 1 IO_E1
+bit 504 O 1 IO_E1 503 1 Z
+bit 503 C 1 *
+bit 502 I 1 IO_E2
+bit 501 O 1 IO_E2 500 1 Z
+bit 500 C 1 *
+bit 499 I 1 IO_D1
+bit 498 O 1 IO_D1 497 1 Z
+bit 497 C 1 *
+bit 496 I 1 IO_D2
+bit 495 O 1 IO_D2 494 1 Z
+bit 494 C 1 *
+bit 493 I 1 IO_D3
+bit 492 O 1 IO_D3 491 1 Z
+bit 491 C 1 *
+bit 490 I 1 IO_D4
+bit 489 O 1 IO_D4 488 1 Z
+bit 488 C 1 *
+bit 487 I 1 IO_C1
+bit 486 O 1 IO_C1 485 1 Z
+bit 485 C 1 *
+bit 484 I 1 IO_C2
+bit 483 O 1 IO_C2 482 1 Z
+bit 482 C 1 *
+bit 481 O 1 *
+bit 480 I 1 HSWAP_EN_A3
+bit 479 I 1 IO_C4
+bit 478 O 1 IO_C4 477 1 Z
+bit 477 C 1 *
+bit 476 I 1 IO_B4
+bit 475 O 1 IO_B4 474 1 Z
+bit 474 C 1 *
+bit 473 I 1 IO_A4
+bit 472 O 1 IO_A4 471 1 Z
+bit 471 C 1 *
+bit 470 I 1 IO_B5
+bit 469 O 1 IO_B5 468 1 Z
+bit 468 C 1 *
+bit 467 I 1 IO_A5
+bit 466 O 1 IO_A5 465 1 Z
+bit 465 C 1 *
+bit 464 O 1 *
+bit 463 O 1 *
+bit 462 O 1 *
+bit 461 I 1 IO_D5
+bit 460 O 1 IO_D5 459 1 Z
+bit 459 C 1 *
+bit 458 I 1 IO_E6
+bit 457 O 1 IO_E6 456 1 Z
+bit 456 C 1 *
+bit 455 I 1 IO_C6
+bit 454 O 1 IO_C6 453 1 Z
+bit 453 C 1 *
+bit 452 I 1 IO_B6
+bit 451 O 1 IO_B6 450 1 Z
+bit 450 C 1 *
+bit 449 O 1 *
+bit 448 O 1 *
+bit 447 O 1 *
+bit 446 I 1 IO_F6
+bit 445 O 1 IO_F6 444 1 Z
+bit 444 C 1 *
+bit 443 I 1 IO_F7
+bit 442 O 1 IO_F7 441 1 Z
+bit 441 C 1 *
+bit 440 I 1 IO_D7
+bit 439 O 1 IO_D7 438 1 Z
+bit 438 C 1 *
+bit 437 I 1 IO_C7
+bit 436 O 1 IO_C7 435 1 Z
+bit 435 C 1 *
+bit 434 I 1 IO_G8
+bit 433 O 1 IO_G8 432 1 Z
+bit 432 C 1 *
+bit 431 I 1 IO_F8
+bit 430 O 1 IO_F8 429 1 Z
+bit 429 C 1 *
+bit 428 I 1 IO_E8
+bit 427 O 1 IO_E8 426 1 Z
+bit 426 C 1 *
+bit 425 I 1 IO_D8
+bit 424 O 1 IO_D8 423 1 Z
+bit 423 C 1 *
+bit 422 I 1 IO_C8
+bit 421 O 1 IO_C8 420 1 Z
+bit 420 C 1 *
+bit 419 O 1 *
+bit 418 O 1 *
+bit 417 O 1 *
+bit 416 I 1 IO_B8
+bit 415 O 1 IO_B8 414 1 Z
+bit 414 C 1 *
+bit 413 I 1 IO_A8
+bit 412 O 1 IO_A8 411 1 Z
+bit 411 C 1 *
+bit 410 I 1 IO_J9
+bit 409 O 1 IO_J9 408 1 Z
+bit 408 C 1 *
+bit 407 I 1 IO_H9
+bit 406 O 1 IO_H9 405 1 Z
+bit 405 C 1 *
+bit 404 I 1 IO_F9
+bit 403 O 1 IO_F9 402 1 Z
+bit 402 C 1 *
+bit 401 I 1 IO_G10
+bit 400 O 1 IO_G10 399 1 Z
+bit 399 C 1 *
+bit 398 I 1 IO_F10
+bit 397 O 1 IO_F10 396 1 Z
+bit 396 C 1 *
+bit 395 I 1 IO_C10
+bit 394 O 1 IO_C10 393 1 Z
+bit 393 C 1 *
+bit 392 I 1 IO_B10
+bit 391 O 1 IO_B10 390 1 Z
+bit 390 C 1 *
+bit 389 O 1 *
+bit 388 O 1 *
+bit 387 O 1 *
+bit 386 I 1 IO_J10
+bit 385 O 1 IO_J10 384 1 Z
+bit 384 C 1 *
+bit 383 I 1 IO_K11
+bit 382 O 1 IO_K11 381 1 Z
+bit 381 C 1 *
+bit 380 I 1 IO_H11
+bit 379 O 1 IO_H11 378 1 Z
+bit 378 C 1 *
+bit 377 I 1 IO_G11
+bit 376 O 1 IO_G11 375 1 Z
+bit 375 C 1 *
+bit 374 O 1 *
+bit 373 O 1 *
+bit 372 O 1 *
+bit 371 I 1 IO_F11
+bit 370 O 1 IO_F11 369 1 Z
+bit 369 C 1 *
+bit 368 I 1 IO_E11
+bit 367 O 1 IO_E11 366 1 Z
+bit 366 C 1 *
+bit 365 I 1 IO_D11
+bit 364 O 1 IO_D11 363 1 Z
+bit 363 C 1 *
+bit 362 I 1 IO_C11
+bit 361 O 1 IO_C11 360 1 Z
+bit 360 C 1 *
+bit 359 O 1 *
+bit 358 O 1 *
+bit 357 O 1 *
+bit 356 I 1 IO_B11
+bit 355 O 1 IO_B11 354 1 Z
+bit 354 C 1 *
+bit 353 I 1 IO_A11
+bit 352 O 1 IO_A11 351 1 Z
+bit 351 C 1 *
+bit 350 I 1 IO_K12
+bit 349 O 1 IO_K12 348 1 Z
+bit 348 C 1 *
+bit 347 I 1 IO_J12
+bit 346 O 1 IO_J12 345 1 Z
+bit 345 C 1 *
+bit 344 O 1 *
+bit 343 O 1 *
+bit 342 O 1 *
+bit 341 I 1 IO_H12
+bit 340 O 1 IO_H12 339 1 Z
+bit 339 C 1 *
+bit 338 I 1 IO_G12
+bit 337 O 1 IO_G12 336 1 Z
+bit 336 C 1 *
+bit 335 I 1 IO_F12
+bit 334 O 1 IO_F12 333 1 Z
+bit 333 C 1 *
+bit 332 I 1 IO_E12
+bit 331 O 1 IO_E12 330 1 Z
+bit 330 C 1 *
+bit 329 O 1 *
+bit 328 O 1 *
+bit 327 O 1 *
+bit 326 I 1 IO_D12
+bit 325 O 1 IO_D12 324 1 Z
+bit 324 C 1 *
+bit 323 I 1 IO_C12
+bit 322 O 1 IO_C12 321 1 Z
+bit 321 C 1 *
+bit 320 I 1 IO_B12
+bit 319 O 1 IO_B12 318 1 Z
+bit 318 C 1 *
+bit 317 I 1 IO_A12
+bit 316 O 1 IO_A12 315 1 Z
+bit 315 C 1 *
+bit 314 I 1 IO_K13
+bit 313 O 1 IO_K13 312 1 Z
+bit 312 C 1 *
+bit 311 I 1 IO_J13
+bit 310 O 1 IO_J13 309 1 Z
+bit 309 C 1 *
+bit 308 I 1 IO_H13
+bit 307 O 1 IO_H13 306 1 Z
+bit 306 C 1 *
+bit 305 I 1 IO_F13
+bit 304 O 1 IO_F13 303 1 Z
+bit 303 C 1 *
+bit 302 I 1 IO_E13
+bit 301 O 1 IO_E13 300 1 Z
+bit 300 C 1 *
+bit 299 I 1 IO_D13
+bit 298 O 1 IO_D13 297 1 Z
+bit 297 C 1 *
+bit 296 I 1 IO_B13
+bit 295 O 1 IO_B13 294 1 Z
+bit 294 C 1 *
+bit 293 I 1 IO_A13
+bit 292 O 1 IO_A13 291 1 Z
+bit 291 C 1 *
+bit 290 I 1 IO_K14
+bit 289 O 1 IO_K14 288 1 Z
+bit 288 C 1 *
+bit 287 I 1 IO_J14
+bit 286 O 1 IO_J14 285 1 Z
+bit 285 C 1 *
+bit 284 I 1 IO_K15
+bit 283 O 1 IO_K15 282 1 Z
+bit 282 C 1 *
+bit 281 I 1 IO_G14
+bit 280 O 1 IO_G14 279 1 Z
+bit 279 C 1 *
+bit 278 I 1 IO_F14
+bit 277 O 1 IO_F14 276 1 Z
+bit 276 C 1 *
+bit 275 I 1 IO_C14
+bit 274 O 1 IO_C14 273 1 Z
+bit 273 C 1 *
+bit 272 I 1 IO_B14
+bit 271 O 1 IO_B14 270 1 Z
+bit 270 C 1 *
+bit 269 O 1 *
+bit 268 O 1 *
+bit 267 O 1 *
+bit 266 I 1 IO_J15
+bit 265 O 1 IO_J15 264 1 Z
+bit 264 C 1 *
+bit 263 I 1 IO_H15
+bit 262 O 1 IO_H15 261 1 Z
+bit 261 C 1 *
+bit 260 I 1 IO_G15
+bit 259 O 1 IO_G15 258 1 Z
+bit 258 C 1 *
+bit 257 I 1 IO_F15
+bit 256 O 1 IO_F15 255 1 Z
+bit 255 C 1 *
+bit 254 I 1 IO_E15
+bit 253 O 1 IO_E15 252 1 Z
+bit 252 C 1 *
+bit 251 I 1 IO_D15
+bit 250 O 1 IO_D15 249 1 Z
+bit 249 C 1 *
+bit 248 I 1 IO_C15
+bit 247 O 1 IO_C15 246 1 Z
+bit 246 C 1 *
+bit 245 I 1 IO_B15
+bit 244 O 1 IO_B15 243 1 Z
+bit 243 C 1 *
+bit 242 I 1 IO_A15
+bit 241 O 1 IO_A15 240 1 Z
+bit 240 C 1 *
+bit 239 I 1 IO_A16
+bit 238 O 1 IO_A16 237 1 Z
+bit 237 C 1 *
+bit 236 I 1 IO_B16
+bit 235 O 1 IO_B16 234 1 Z
+bit 234 C 1 *
+bit 233 I 1 IO_C16
+bit 232 O 1 IO_C16 231 1 Z
+bit 231 C 1 *
+bit 230 I 1 IO_D16
+bit 229 O 1 IO_D16 228 1 Z
+bit 228 C 1 *
+bit 227 I 1 IO_E16
+bit 226 O 1 IO_E16 225 1 Z
+bit 225 C 1 *
+bit 224 I 1 IO_F16
+bit 223 O 1 IO_F16 222 1 Z
+bit 222 C 1 *
+bit 221 I 1 IO_G16
+bit 220 O 1 IO_G16 219 1 Z
+bit 219 C 1 *
+bit 218 I 1 IO_H16
+bit 217 O 1 IO_H16 216 1 Z
+bit 216 C 1 *
+bit 215 I 1 IO_J16
+bit 214 O 1 IO_J16 213 1 Z
+bit 213 C 1 *
+bit 212 I 1 IO_K16
+bit 211 O 1 IO_K16 210 1 Z
+bit 210 C 1 *
+bit 209 I 1 IO_J17
+bit 208 O 1 IO_J17 207 1 Z
+bit 207 C 1 *
+bit 206 I 1 IO_B17
+bit 205 O 1 IO_B17 204 1 Z
+bit 204 C 1 *
+bit 203 I 1 IO_C17
+bit 202 O 1 IO_C17 201 1 Z
+bit 201 C 1 *
+bit 200 I 1 IO_F17
+bit 199 O 1 IO_F17 198 1 Z
+bit 198 C 1 *
+bit 197 I 1 IO_G17
+bit 196 O 1 IO_G17 195 1 Z
+bit 195 C 1 *
+bit 194 I 1 IO_F18
+bit 193 O 1 IO_F18 192 1 Z
+bit 192 C 1 *
+bit 191 I 1 IO_A19
+bit 190 O 1 IO_A19 189 1 Z
+bit 189 C 1 *
+bit 188 I 1 IO_B19
+bit 187 O 1 IO_B19 186 1 Z
+bit 186 C 1 *
+bit 185 I 1 IO_C19
+bit 184 O 1 IO_C19 183 1 Z
+bit 183 C 1 *
+bit 182 I 1 IO_D19
+bit 181 O 1 IO_D19 180 1 Z
+bit 180 C 1 *
+bit 179 O 1 *
+bit 178 O 1 *
+bit 177 O 1 *
+bit 176 I 1 IO_E19
+bit 175 O 1 IO_E19 174 1 Z
+bit 174 C 1 *
+bit 173 I 1 IO_F19
+bit 172 O 1 IO_F19 171 1 Z
+bit 171 C 1 *
+bit 170 I 1 IO_G19
+bit 169 O 1 IO_G19 168 1 Z
+bit 168 C 1 *
+bit 167 I 1 IO_H19
+bit 166 O 1 IO_H19 165 1 Z
+bit 165 C 1 *
+bit 164 O 1 *
+bit 163 O 1 *
+bit 162 O 1 *
+bit 161 I 1 IO_J19
+bit 160 O 1 IO_J19 159 1 Z
+bit 159 C 1 *
+bit 158 I 1 IO_K19
+bit 157 O 1 IO_K19 156 1 Z
+bit 156 C 1 *
+bit 155 I 1 IO_A20
+bit 154 O 1 IO_A20 153 1 Z
+bit 153 C 1 *
+bit 152 I 1 IO_B20
+bit 151 O 1 IO_B20 150 1 Z
+bit 150 C 1 *
+bit 149 O 1 *
+bit 148 O 1 *
+bit 147 O 1 *
+bit 146 I 1 IO_C20
+bit 145 O 1 IO_C20 144 1 Z
+bit 144 C 1 *
+bit 143 I 1 IO_D20
+bit 142 O 1 IO_D20 141 1 Z
+bit 141 C 1 *
+bit 140 I 1 IO_E20
+bit 139 O 1 IO_E20 138 1 Z
+bit 138 C 1 *
+bit 137 I 1 IO_F20
+bit 136 O 1 IO_F20 135 1 Z
+bit 135 C 1 *
+bit 134 O 1 *
+bit 133 O 1 *
+bit 132 O 1 *
+bit 131 I 1 IO_G20
+bit 130 O 1 IO_G20 129 1 Z
+bit 129 C 1 *
+bit 128 I 1 IO_H20
+bit 127 O 1 IO_H20 126 1 Z
+bit 126 C 1 *
+bit 125 I 1 IO_B21
+bit 124 O 1 IO_B21 123 1 Z
+bit 123 C 1 *
+bit 122 I 1 IO_C21
+bit 121 O 1 IO_C21 120 1 Z
+bit 120 C 1 *
+bit 119 I 1 IO_K20
+bit 118 O 1 IO_K20 117 1 Z
+bit 117 C 1 *
+bit 116 I 1 IO_F21
+bit 115 O 1 IO_F21 114 1 Z
+bit 114 C 1 *
+bit 113 I 1 IO_G21
+bit 112 O 1 IO_G21 111 1 Z
+bit 111 C 1 *
+bit 110 I 1 IO_A22
+bit 109 O 1 IO_A22 108 1 Z
+bit 108 C 1 *
+bit 107 I 1 IO_B22
+bit 106 O 1 IO_B22 105 1 Z
+bit 105 C 1 *
+bit 104 I 1 IO_J21
+bit 103 O 1 IO_J21 102 1 Z
+bit 102 C 1 *
+bit 101 I 1 IO_D22
+bit 100 O 1 IO_D22 99 1 Z
+bit 99 C 1 *
+bit 98 I 1 IO_E22
+bit 97 O 1 IO_E22 96 1 Z
+bit 96 C 1 *
+bit 95 I 1 IO_F22
+bit 94 O 1 IO_F22 93 1 Z
+bit 93 C 1 *
+bit 92 I 1 IO_E23
+bit 91 O 1 IO_E23 90 1 Z
+bit 90 C 1 *
+bit 89 O 1 *
+bit 88 O 1 *
+bit 87 O 1 *
+bit 86 I 1 IO_H22
+bit 85 O 1 IO_H22 84 1 Z
+bit 84 C 1 *
+bit 83 I 1 IO_J22
+bit 82 O 1 IO_J22 81 1 Z
+bit 81 C 1 *
+bit 80 I 1 IO_A23
+bit 79 O 1 IO_A23 78 1 Z
+bit 78 C 1 *
+bit 77 I 1 IO_B23
+bit 76 O 1 IO_B23 75 1 Z
+bit 75 C 1 *
+bit 74 O 1 *
+bit 73 O 1 *
+bit 72 O 1 *
+bit 71 I 1 IO_C23
+bit 70 O 1 IO_C23 69 1 Z
+bit 69 C 1 *
+bit 68 I 1 IO_D23
+bit 67 O 1 IO_D23 66 1 Z
+bit 66 C 1 *
+bit 65 I 1 IO_F23
+bit 64 O 1 IO_F23 63 1 Z
+bit 63 C 1 *
+bit 62 I 1 IO_G23
+bit 61 O 1 IO_G23 60 1 Z
+bit 60 C 1 *
+bit 59 O 1 *
+bit 58 O 1 *
+bit 57 O 1 *
+bit 56 I 1 IO_H23
+bit 55 O 1 IO_H23 54 1 Z
+bit 54 C 1 *
+bit 53 I 1 IO_G24
+bit 52 O 1 IO_G24 51 1 Z
+bit 51 C 1 *
+bit 50 I 1 IO_A24
+bit 49 O 1 IO_A24 48 1 Z
+bit 48 C 1 *
+bit 47 I 1 IO_B24
+bit 46 O 1 IO_B24 45 1 Z
+bit 45 C 1 *
+bit 44 O 1 *
+bit 43 O 1 *
+bit 42 O 1 *
+bit 41 I 1 IO_C24
+bit 40 O 1 IO_C24 39 1 Z
+bit 39 C 1 *
+bit 38 I 1 IO_D24
+bit 37 O 1 IO_D24 36 1 Z
+bit 36 C 1 *
+bit 35 I 1 IO_F24
+bit 34 O 1 IO_F24 33 1 Z
+bit 33 C 1 *
+bit 32 I 1 IO_F25
+bit 31 O 1 IO_F25 30 1 Z
+bit 30 C 1 *
+bit 29 I 1 IO_E25
+bit 28 O 1 IO_E25 27 1 Z
+bit 27 C 1 *
+bit 26 I 1 IO_B25
+bit 25 O 1 IO_B25 24 1 Z
+bit 24 C 1 *
+bit 23 I 1 IO_C25
+bit 22 O 1 IO_C25 21 1 Z
+bit 21 C 1 *
+bit 20 I 1 IO_A26
+bit 19 O 1 IO_A26 18 1 Z
+bit 18 C 1 *
+bit 17 I 1 IO_B26
+bit 16 O 1 IO_B26 15 1 Z
+bit 15 C 1 *
+bit 14 O 1 *
+bit 13 O 1 *
+bit 12 O 1 *
+bit 11 I 1 IO_D26
+bit 10 O 1 IO_D26 9 1 Z
+bit 9 C 1 *
+bit 8 I 1 IO_C27
+bit 7 O 1 IO_C27 6 1 Z
+bit 6 C 1 *
+bit 5 I 1 IO_A27
+bit 4 O 1 IO_A27 3 1 Z
+bit 3 C 1 *
+bit 2 I 1 IO_B27
+bit 1 O 1 IO_B27 0 1 Z
+bit 0 C 1 *
--- /dev/null
+signal GND1
+signal GND2
+signal GND3
+signal GND4
+signal GND5
+signal GND6
+signal GND7
+signal GND8
+signal GND9
+signal GND10
+signal GND11
+signal GND12
+signal GND13
+signal GND14
+signal GND15
+signal GND16
+signal GND17
+signal GND18
+signal GND19
+signal GND20
+signal GND21
+signal GND22
+signal GND23
+signal GND24
+signal GND25
+signal GND26
+signal GND27
+signal GND28
+signal GND29
+signal GND30
+signal GND31
+signal GND32
+signal GND33
+signal GND34
+signal GND35
+signal GND36
+signal GND37
+signal GND38
+signal GND39
+signal GND40
+signal GND41
+signal GND42
+signal GND43
+signal GND44
+signal GND45
+signal GND46
+signal GND47
+signal GND48
+signal GND49
+signal GND50
+signal GND51
+signal GND52
+signal GND53
+signal GND54
+signal GND55
+signal GND56
+signal GND57
+signal GND58
+signal GND59
+signal GND60
+signal GND61
+signal GND62
+signal GND63
+signal GND64
+signal GND65
+signal GND66
+signal GND67
+signal GND68
+signal GND69
+signal GND70
+signal GND71
+signal GND72
+signal GND73
+signal GND74
+signal GND75
+signal GND76
+signal GND77
+signal GND78
+signal GND79
+signal GND80
+signal GND81
+signal GND82
+signal GND83
+signal GND84
+signal GND85
+signal GND86
+signal GND87
+signal GND88
+signal GND89
+signal GND90
+signal GND91
+signal GND92
+signal GND93
+signal GND94
+signal GND95
+signal GND96
+signal GND97
+signal GND98
+signal GND99
+signal GND100
+signal GND101
+signal GND102
+signal GND103
+signal GND104
+signal GND105
+signal GND106
+signal GND107
+signal GND108
+signal GND109
+signal GND110
+signal GND111
+signal GND112
+signal CCLK_PAD544
+signal DONE_PAD543
+signal HSWAP_EN_PAD112
+signal M0_PAD319
+signal M1_PAD318
+signal M2_PAD320
+signal PROG_B
+signal TCK
+signal TDI
+signal TDO
+signal TMS
+signal VCCAUX1
+signal VCCAUX2
+signal VCCAUX3
+signal VCCAUX4
+signal VCCAUX5
+signal VCCAUX6
+signal VCCAUX7
+signal VCCAUX8
+signal VCCAUX9
+signal VCCAUX10
+signal VCCAUX11
+signal VCCAUX12
+signal VCCAUX13
+signal VCCAUX14
+signal VCCAUX15
+signal VCCAUX16
+signal VCCAUX17
+signal VCCAUX18
+signal VCCAUX19
+signal VCCAUX20
+signal VCCAUX21
+signal VCCAUX22
+signal VCCAUX23
+signal VCCAUX24
+signal VCCINT1
+signal VCCINT2
+signal VCCINT3
+signal VCCINT4
+signal VCCINT5
+signal VCCINT6
+signal VCCINT7
+signal VCCINT8
+signal VCCINT9
+signal VCCINT10
+signal VCCINT11
+signal VCCINT12
+signal VCCINT13
+signal VCCINT14
+signal VCCINT15
+signal VCCINT16
+signal VCCINT17
+signal VCCINT18
+signal VCCINT19
+signal VCCINT20
+signal VCCINT21
+signal VCCINT22
+signal VCCINT23
+signal VCCINT24
+signal VCCO01
+signal VCCO02
+signal VCCO03
+signal VCCO04
+signal VCCO05
+signal VCCO06
+signal VCCO07
+signal VCCO08
+signal VCCO09
+signal VCCO010
+signal VCCO11
+signal VCCO12
+signal VCCO13
+signal VCCO14
+signal VCCO15
+signal VCCO16
+signal VCCO17
+signal VCCO18
+signal VCCO19
+signal VCCO110
+signal VCCO21
+signal VCCO22
+signal VCCO23
+signal VCCO24
+signal VCCO25
+signal VCCO26
+signal VCCO27
+signal VCCO28
+signal VCCO29
+signal VCCO31
+signal VCCO32
+signal VCCO33
+signal VCCO34
+signal VCCO35
+signal VCCO36
+signal VCCO37
+signal VCCO38
+signal VCCO39
+signal VCCO41
+signal VCCO42
+signal VCCO43
+signal VCCO44
+signal VCCO45
+signal VCCO46
+signal VCCO47
+signal VCCO48
+signal VCCO49
+signal VCCO410
+signal VCCO51
+signal VCCO52
+signal VCCO53
+signal VCCO54
+signal VCCO55
+signal VCCO56
+signal VCCO57
+signal VCCO58
+signal VCCO59
+signal VCCO510
+signal VCCO61
+signal VCCO62
+signal VCCO63
+signal VCCO64
+signal VCCO65
+signal VCCO66
+signal VCCO67
+signal VCCO68
+signal VCCO69
+signal VCCO71
+signal VCCO72
+signal VCCO73
+signal VCCO74
+signal VCCO75
+signal VCCO76
+signal VCCO77
+signal VCCO78
+signal VCCO79
+signal IO_PAD2
+signal IO_PAD3
+signal IO_PAD4
+signal IO_PAD6
+signal IO_PAD8
+signal IO_PAD9
+signal IO_PAD10
+signal IO_PAD12
+signal IO_PAD13
+signal IO_PAD14
+signal IO_PAD16
+signal IO_PAD18
+signal IO_PAD20
+signal IO_PAD22
+signal IO_PAD23
+signal IO_PAD24
+signal IO_PAD25
+signal IO_PAD26
+signal IO_PAD28
+signal IO_PAD30
+signal IO_PAD31
+signal IO_PAD32
+signal IO_PAD33
+signal IO_PAD34
+signal IO_PAD35
+signal IO_PAD36
+signal IO_PAD38
+signal IO_PAD40
+signal IO_PAD41
+signal IO_PAD42
+signal IO_PAD44
+signal IO_PAD45
+signal IO_PAD46
+signal IO_PAD48
+signal IO_PAD50
+signal IO_PAD52
+signal IO_PAD54
+signal IO_PAD55
+signal IO_PAD56
+signal IO_PAD57
+signal IO_PAD58
+signal IO_PAD60
+signal IO_PAD62
+signal IO_PAD63
+signal IO_PAD64
+signal IO_PAD66
+signal IO_PAD67
+signal IO_PAD68
+signal IO_PAD69
+signal IO_PAD70
+signal IO_PAD72
+signal IO_PAD73
+signal IO_PAD74
+signal IO_PAD76
+signal IO_PAD77
+signal IO_PAD78
+signal IO_PAD80
+signal IO_PAD82
+signal IO_PAD84
+signal IO_PAD86
+signal IO_PAD87
+signal IO_PAD88
+signal IO_PAD89
+signal IO_PAD90
+signal IO_PAD92
+signal IO_PAD94
+signal IO_PAD95
+signal IO_PAD96
+signal IO_PAD97
+signal IO_PAD98
+signal IO_PAD100
+signal IO_PAD101
+signal IO_PAD102
+signal IO_PAD104
+signal IO_PAD105
+signal IO_PAD106
+signal IO_PAD108
+signal IO_PAD109
+signal IO_PAD110
+signal IO_PAD111
+signal IO_PAD116
+signal IO_PAD117
+signal IO_PAD118
+signal IO_PAD120
+signal IO_PAD121
+signal IO_PAD122
+signal IO_PAD123
+signal IO_PAD124
+signal IO_PAD126
+signal IO_PAD128
+signal IO_PAD129
+signal IO_PAD130
+signal IO_PAD131
+signal IO_PAD132
+signal IO_PAD134
+signal IO_PAD136
+signal IO_PAD138
+signal IO_PAD140
+signal IO_PAD141
+signal IO_PAD142
+signal IO_PAD144
+signal IO_PAD146
+signal IO_PAD147
+signal IO_PAD148
+signal IO_PAD149
+signal IO_PAD150
+signal IO_PAD152
+signal IO_PAD153
+signal IO_PAD154
+signal IO_PAD155
+signal IO_PAD156
+signal IO_PAD158
+signal IO_PAD159
+signal IO_PAD160
+signal IO_PAD162
+signal IO_PAD164
+signal IO_PAD165
+signal IO_PAD166
+signal IO_PAD167
+signal IO_PAD168
+signal IO_PAD170
+signal IO_PAD172
+signal IO_PAD174
+signal IO_PAD176
+signal IO_PAD177
+signal IO_PAD178
+signal IO_PAD180
+signal IO_PAD182
+signal IO_PAD183
+signal IO_PAD184
+signal IO_PAD185
+signal IO_PAD186
+signal IO_PAD187
+signal IO_PAD188
+signal IO_PAD190
+signal IO_PAD192
+signal IO_PAD193
+signal IO_PAD194
+signal IO_PAD195
+signal IO_PAD196
+signal IO_PAD198
+signal IO_PAD200
+signal IO_PAD202
+signal IO_PAD204
+signal IO_PAD205
+signal IO_PAD206
+signal IO_PAD208
+signal IO_PAD209
+signal IO_PAD210
+signal IO_PAD212
+signal IO_PAD214
+signal IO_PAD215
+signal IO_PAD217
+signal IO_PAD218
+signal IO_PAD220
+signal IO_PAD222
+signal IO_PAD223
+signal IO_PAD224
+signal IO_PAD226
+signal IO_PAD227
+signal IO_PAD228
+signal IO_PAD230
+signal IO_PAD232
+signal IO_PAD234
+signal IO_PAD236
+signal IO_PAD237
+signal IO_PAD238
+signal IO_PAD239
+signal IO_PAD240
+signal IO_PAD242
+signal IO_PAD244
+signal IO_PAD245
+signal IO_PAD246
+signal IO_PAD247
+signal IO_PAD248
+signal IO_PAD249
+signal IO_PAD250
+signal IO_PAD252
+signal IO_PAD254
+signal IO_PAD255
+signal IO_PAD256
+signal IO_PAD258
+signal IO_PAD260
+signal IO_PAD262
+signal IO_PAD264
+signal IO_PAD265
+signal IO_PAD266
+signal IO_PAD267
+signal IO_PAD268
+signal IO_PAD270
+signal IO_PAD272
+signal IO_PAD273
+signal IO_PAD274
+signal IO_PAD276
+signal IO_PAD277
+signal IO_PAD278
+signal IO_PAD279
+signal IO_PAD280
+signal IO_PAD282
+signal IO_PAD283
+signal IO_PAD284
+signal IO_PAD285
+signal IO_PAD286
+signal IO_PAD288
+signal IO_PAD290
+signal IO_PAD291
+signal IO_PAD292
+signal IO_PAD294
+signal IO_PAD296
+signal IO_PAD298
+signal IO_PAD300
+signal IO_PAD301
+signal IO_PAD302
+signal IO_PAD303
+signal IO_PAD304
+signal IO_PAD306
+signal IO_PAD308
+signal IO_PAD309
+signal IO_PAD310
+signal IO_PAD311
+signal IO_PAD312
+signal IO_PAD314
+signal IO_PAD315
+signal IO_PAD316
+signal IO_PAD321
+signal IO_PAD322
+signal IO_PAD323
+signal IO_PAD324
+signal IO_PAD326
+signal IO_PAD327
+signal IO_PAD328
+signal IO_PAD330
+signal IO_PAD331
+signal IO_PAD332
+signal IO_PAD334
+signal IO_PAD335
+signal IO_PAD336
+signal IO_PAD337
+signal IO_PAD338
+signal IO_PAD340
+signal IO_PAD342
+signal IO_PAD343
+signal IO_PAD344
+signal IO_PAD345
+signal IO_PAD346
+signal IO_PAD348
+signal IO_PAD350
+signal IO_PAD352
+signal IO_PAD354
+signal IO_PAD355
+signal IO_PAD356
+signal IO_PAD358
+signal IO_PAD359
+signal IO_PAD360
+signal IO_PAD362
+signal IO_PAD363
+signal IO_PAD364
+signal IO_PAD365
+signal IO_PAD366
+signal IO_PAD368
+signal IO_PAD369
+signal IO_PAD370
+signal IO_PAD372
+signal IO_PAD374
+signal IO_PAD375
+signal IO_PAD376
+signal IO_PAD377
+signal IO_PAD378
+signal IO_PAD380
+signal IO_PAD382
+signal IO_PAD384
+signal IO_PAD386
+signal IO_PAD387
+signal IO_PAD388
+signal IO_PAD390
+signal IO_PAD391
+signal IO_PAD392
+signal IO_PAD394
+signal IO_PAD396
+signal IO_PAD397
+signal IO_PAD398
+signal IO_PAD399
+signal IO_PAD400
+signal IO_PAD401
+signal IO_PAD402
+signal IO_PAD404
+signal IO_PAD406
+signal IO_PAD407
+signal IO_PAD408
+signal IO_PAD409
+signal IO_PAD410
+signal IO_PAD412
+signal IO_PAD414
+signal IO_PAD416
+signal IO_PAD418
+signal IO_PAD419
+signal IO_PAD420
+signal IO_PAD422
+signal IO_PAD423
+signal IO_PAD424
+signal IO_PAD426
+signal IO_PAD428
+signal IO_PAD429
+signal IO_PAD430
+signal IO_PAD432
+signal IO_PAD433
+signal IO_PAD434
+signal IO_PAD436
+signal IO_PAD438
+signal IO_PAD439
+signal IO_PAD440
+signal IO_PAD442
+signal IO_PAD443
+signal IO_PAD444
+signal IO_PAD446
+signal IO_PAD448
+signal IO_PAD450
+signal IO_PAD452
+signal IO_PAD453
+signal IO_PAD454
+signal IO_PAD455
+signal IO_PAD456
+signal IO_PAD458
+signal IO_PAD460
+signal IO_PAD461
+signal IO_PAD462
+signal IO_PAD463
+signal IO_PAD464
+signal IO_PAD465
+signal IO_PAD466
+signal IO_PAD468
+signal IO_PAD470
+signal IO_PAD471
+signal IO_PAD472
+signal IO_PAD474
+signal IO_PAD475
+signal IO_PAD476
+signal IO_PAD478
+signal IO_PAD480
+signal IO_PAD482
+signal IO_PAD484
+signal IO_PAD485
+signal IO_PAD486
+signal IO_PAD487
+signal IO_PAD488
+signal IO_PAD490
+signal IO_PAD492
+signal IO_PAD493
+signal IO_PAD494
+signal IO_PAD496
+signal IO_PAD497
+signal IO_PAD498
+signal IO_PAD499
+signal IO_PAD500
+signal IO_PAD502
+signal IO_PAD503
+signal IO_PAD504
+signal IO_PAD506
+signal IO_PAD507
+signal IO_PAD508
+signal IO_PAD510
+signal IO_PAD512
+signal IO_PAD514
+signal IO_PAD516
+signal IO_PAD517
+signal IO_PAD518
+signal IO_PAD519
+signal IO_PAD520
+signal IO_PAD522
+signal IO_PAD524
+signal IO_PAD525
+signal IO_PAD526
+signal IO_PAD527
+signal IO_PAD528
+signal IO_PAD530
+signal IO_PAD531
+signal IO_PAD532
+signal IO_PAD534
+signal IO_PAD535
+signal IO_PAD536
+signal IO_PAD538
+signal IO_PAD539
+signal IO_PAD540
+signal IO_PAD541
+signal IO_PAD547
+signal IO_PAD548
+signal IO_PAD549
+signal IO_PAD551
+signal IO_PAD552
+signal IO_PAD553
+signal IO_PAD554
+signal IO_PAD555
+signal IO_PAD557
+signal IO_PAD559
+signal IO_PAD560
+signal IO_PAD561
+signal IO_PAD562
+signal IO_PAD563
+signal IO_PAD565
+signal IO_PAD567
+signal IO_PAD569
+signal IO_PAD571
+signal IO_PAD572
+signal IO_PAD573
+signal IO_PAD575
+signal IO_PAD577
+signal IO_PAD578
+signal IO_PAD579
+signal IO_PAD580
+signal IO_PAD581
+signal IO_PAD583
+signal IO_PAD584
+signal IO_PAD585
+signal IO_PAD586
+signal IO_PAD587
+signal IO_PAD589
+signal IO_PAD590
+signal IO_PAD591
+signal IO_PAD593
+signal IO_PAD595
+signal IO_PAD596
+signal IO_PAD597
+signal IO_PAD598
+signal IO_PAD599
+signal IO_PAD601
+signal IO_PAD603
+signal IO_PAD605
+signal IO_PAD607
+signal IO_PAD608
+signal IO_PAD609
+signal IO_PAD611
+signal IO_PAD613
+signal IO_PAD614
+signal IO_PAD615
+signal IO_PAD616
+signal IO_PAD617
+signal IO_PAD618
+signal IO_PAD619
+signal IO_PAD621
+signal IO_PAD623
+signal IO_PAD624
+signal IO_PAD625
+signal IO_PAD626
+signal IO_PAD627
+signal IO_PAD629
+signal IO_PAD631
+signal IO_PAD633
+signal IO_PAD635
+signal IO_PAD636
+signal IO_PAD637
+signal IO_PAD639
+signal IO_PAD640
+signal IO_PAD641
+signal IO_PAD643
+signal IO_PAD645
+signal IO_PAD646
+signal IO_PAD648
+signal IO_PAD649
+signal IO_PAD651
+signal IO_PAD653
+signal IO_PAD654
+signal IO_PAD655
+signal IO_PAD657
+signal IO_PAD658
+signal IO_PAD659
+signal IO_PAD661
+signal IO_PAD663
+signal IO_PAD665
+signal IO_PAD667
+signal IO_PAD668
+signal IO_PAD669
+signal IO_PAD670
+signal IO_PAD671
+signal IO_PAD673
+signal IO_PAD675
+signal IO_PAD676
+signal IO_PAD677
+signal IO_PAD678
+signal IO_PAD679
+signal IO_PAD680
+signal IO_PAD681
+signal IO_PAD683
+signal IO_PAD685
+signal IO_PAD686
+signal IO_PAD687
+signal IO_PAD689
+signal IO_PAD691
+signal IO_PAD693
+signal IO_PAD695
+signal IO_PAD696
+signal IO_PAD697
+signal IO_PAD698
+signal IO_PAD699
+signal IO_PAD701
+signal IO_PAD703
+signal IO_PAD704
+signal IO_PAD705
+signal IO_PAD707
+signal IO_PAD708
+signal IO_PAD709
+signal IO_PAD710
+signal IO_PAD711
+signal IO_PAD713
+signal IO_PAD714
+signal IO_PAD715
+signal IO_PAD716
+signal IO_PAD717
+signal IO_PAD719
+signal IO_PAD721
+signal IO_PAD722
+signal IO_PAD723
+signal IO_PAD725
+signal IO_PAD727
+signal IO_PAD729
+signal IO_PAD731
+signal IO_PAD732
+signal IO_PAD733
+signal IO_PAD734
+signal IO_PAD735
+signal IO_PAD737
+signal IO_PAD739
+signal IO_PAD740
+signal IO_PAD741
+signal IO_PAD742
+signal IO_PAD743
+signal IO_PAD745
+signal IO_PAD746
+signal IO_PAD747
+signal IO_PAD752
+signal IO_PAD753
+signal IO_PAD754
+signal IO_PAD755
+signal IO_PAD757
+signal IO_PAD758
+signal IO_PAD759
+signal IO_PAD761
+signal IO_PAD762
+signal IO_PAD763
+signal IO_PAD765
+signal IO_PAD766
+signal IO_PAD767
+signal IO_PAD768
+signal IO_PAD769
+signal IO_PAD771
+signal IO_PAD773
+signal IO_PAD774
+signal IO_PAD775
+signal IO_PAD776
+signal IO_PAD777
+signal IO_PAD779
+signal IO_PAD781
+signal IO_PAD783
+signal IO_PAD785
+signal IO_PAD786
+signal IO_PAD787
+signal IO_PAD789
+signal IO_PAD790
+signal IO_PAD791
+signal IO_PAD793
+signal IO_PAD794
+signal IO_PAD795
+signal IO_PAD796
+signal IO_PAD797
+signal IO_PAD799
+signal IO_PAD800
+signal IO_PAD801
+signal IO_PAD803
+signal IO_PAD805
+signal IO_PAD806
+signal IO_PAD807
+signal IO_PAD808
+signal IO_PAD809
+signal IO_PAD811
+signal IO_PAD813
+signal IO_PAD815
+signal IO_PAD817
+signal IO_PAD818
+signal IO_PAD819
+signal IO_PAD821
+signal IO_PAD822
+signal IO_PAD823
+signal IO_PAD825
+signal IO_PAD827
+signal IO_PAD828
+signal IO_PAD829
+signal IO_PAD830
+signal IO_PAD831
+signal IO_PAD832
+signal IO_PAD833
+signal IO_PAD835
+signal IO_PAD837
+signal IO_PAD838
+signal IO_PAD839
+signal IO_PAD840
+signal IO_PAD841
+signal IO_PAD843
+signal IO_PAD845
+signal IO_PAD847
+signal IO_PAD849
+signal IO_PAD850
+signal IO_PAD851
+signal IO_PAD853
+signal IO_PAD854
+signal IO_PAD855
+signal IO_PAD857
+signal IO_PAD859
+signal IO_PAD860
+
+register BSR 1931
+register BR 1
+register DIR 32
+
+instruction length 6
+
+instruction EXTEST 000000 BSR
+instruction SAMPLE/PRELOAD 000001 BSR
+instruction IDCODE 001001 DIR
+instruction BYPASS 111111 BR
+
+bit 1930 I 1 IO_PAD747
+bit 1929 O 1 IO_PAD747 1928 1 Z
+bit 1928 C 1 *
+bit 1927 I 1 IO_PAD746
+bit 1926 O 1 IO_PAD746 1925 1 Z
+bit 1925 C 1 *
+bit 1924 I 1 IO_PAD745
+bit 1923 O 1 IO_PAD745 1922 1 Z
+bit 1922 C 1 *
+bit 1921 I 1 IO_PAD743
+bit 1920 O 1 IO_PAD743 1919 1 Z
+bit 1919 C 1 *
+bit 1918 I 1 IO_PAD742
+bit 1917 O 1 IO_PAD742 1916 1 Z
+bit 1916 C 1 *
+bit 1915 I 1 IO_PAD741
+bit 1914 O 1 IO_PAD741 1913 1 Z
+bit 1913 C 1 *
+bit 1912 I 1 IO_PAD740
+bit 1911 O 1 IO_PAD740 1910 1 Z
+bit 1910 C 1 *
+bit 1909 I 1 IO_PAD739
+bit 1908 O 1 IO_PAD739 1907 1 Z
+bit 1907 C 1 *
+bit 1906 I 1 IO_PAD737
+bit 1905 O 1 IO_PAD737 1904 1 Z
+bit 1904 C 1 *
+bit 1903 I 1 IO_PAD735
+bit 1902 O 1 IO_PAD735 1901 1 Z
+bit 1901 C 1 *
+bit 1900 I 1 IO_PAD734
+bit 1899 O 1 IO_PAD734 1898 1 Z
+bit 1898 C 1 *
+bit 1897 I 1 IO_PAD733
+bit 1896 O 1 IO_PAD733 1895 1 Z
+bit 1895 C 1 *
+bit 1894 I 1 IO_PAD732
+bit 1893 O 1 IO_PAD732 1892 1 Z
+bit 1892 C 1 *
+bit 1891 I 1 IO_PAD731
+bit 1890 O 1 IO_PAD731 1889 1 Z
+bit 1889 C 1 *
+bit 1888 I 1 IO_PAD729
+bit 1887 O 1 IO_PAD729 1886 1 Z
+bit 1886 C 1 *
+bit 1885 I 1 IO_PAD727
+bit 1884 O 1 IO_PAD727 1883 1 Z
+bit 1883 C 1 *
+bit 1882 I 1 IO_PAD725
+bit 1881 O 1 IO_PAD725 1880 1 Z
+bit 1880 C 1 *
+bit 1879 I 1 IO_PAD723
+bit 1878 O 1 IO_PAD723 1877 1 Z
+bit 1877 C 1 *
+bit 1876 I 1 IO_PAD722
+bit 1875 O 1 IO_PAD722 1874 1 Z
+bit 1874 C 1 *
+bit 1873 I 1 IO_PAD721
+bit 1872 O 1 IO_PAD721 1871 1 Z
+bit 1871 C 1 *
+bit 1870 I 1 IO_PAD719
+bit 1869 O 1 IO_PAD719 1868 1 Z
+bit 1868 C 1 *
+bit 1867 I 1 IO_PAD717
+bit 1866 O 1 IO_PAD717 1865 1 Z
+bit 1865 C 1 *
+bit 1864 I 1 IO_PAD716
+bit 1863 O 1 IO_PAD716 1862 1 Z
+bit 1862 C 1 *
+bit 1861 I 1 IO_PAD715
+bit 1860 O 1 IO_PAD715 1859 1 Z
+bit 1859 C 1 *
+bit 1858 I 1 IO_PAD714
+bit 1857 O 1 IO_PAD714 1856 1 Z
+bit 1856 C 1 *
+bit 1855 I 1 IO_PAD713
+bit 1854 O 1 IO_PAD713 1853 1 Z
+bit 1853 C 1 *
+bit 1852 I 1 IO_PAD711
+bit 1851 O 1 IO_PAD711 1850 1 Z
+bit 1850 C 1 *
+bit 1849 I 1 IO_PAD710
+bit 1848 O 1 IO_PAD710 1847 1 Z
+bit 1847 C 1 *
+bit 1846 I 1 IO_PAD709
+bit 1845 O 1 IO_PAD709 1844 1 Z
+bit 1844 C 1 *
+bit 1843 I 1 IO_PAD708
+bit 1842 O 1 IO_PAD708 1841 1 Z
+bit 1841 C 1 *
+bit 1840 I 1 IO_PAD707
+bit 1839 O 1 IO_PAD707 1838 1 Z
+bit 1838 C 1 *
+bit 1837 I 1 IO_PAD705
+bit 1836 O 1 IO_PAD705 1835 1 Z
+bit 1835 C 1 *
+bit 1834 I 1 IO_PAD704
+bit 1833 O 1 IO_PAD704 1832 1 Z
+bit 1832 C 1 *
+bit 1831 I 1 IO_PAD703
+bit 1830 O 1 IO_PAD703 1829 1 Z
+bit 1829 C 1 *
+bit 1828 O 1 *
+bit 1827 O 1 *
+bit 1826 O 1 *
+bit 1825 O 1 *
+bit 1824 O 1 *
+bit 1823 O 1 *
+bit 1822 I 1 IO_PAD701
+bit 1821 O 1 IO_PAD701 1820 1 Z
+bit 1820 C 1 *
+bit 1819 I 1 IO_PAD699
+bit 1818 O 1 IO_PAD699 1817 1 Z
+bit 1817 C 1 *
+bit 1816 I 1 IO_PAD698
+bit 1815 O 1 IO_PAD698 1814 1 Z
+bit 1814 C 1 *
+bit 1813 I 1 IO_PAD697
+bit 1812 O 1 IO_PAD697 1811 1 Z
+bit 1811 C 1 *
+bit 1810 I 1 IO_PAD696
+bit 1809 O 1 IO_PAD696 1808 1 Z
+bit 1808 C 1 *
+bit 1807 I 1 IO_PAD695
+bit 1806 O 1 IO_PAD695 1805 1 Z
+bit 1805 C 1 *
+bit 1804 I 1 IO_PAD693
+bit 1803 O 1 IO_PAD693 1802 1 Z
+bit 1802 C 1 *
+bit 1801 I 1 IO_PAD691
+bit 1800 O 1 IO_PAD691 1799 1 Z
+bit 1799 C 1 *
+bit 1798 I 1 IO_PAD689
+bit 1797 O 1 IO_PAD689 1796 1 Z
+bit 1796 C 1 *
+bit 1795 I 1 IO_PAD687
+bit 1794 O 1 IO_PAD687 1793 1 Z
+bit 1793 C 1 *
+bit 1792 I 1 IO_PAD686
+bit 1791 O 1 IO_PAD686 1790 1 Z
+bit 1790 C 1 *
+bit 1789 I 1 IO_PAD685
+bit 1788 O 1 IO_PAD685 1787 1 Z
+bit 1787 C 1 *
+bit 1786 O 1 *
+bit 1785 O 1 *
+bit 1784 O 1 *
+bit 1783 O 1 *
+bit 1782 O 1 *
+bit 1781 O 1 *
+bit 1780 I 1 IO_PAD683
+bit 1779 O 1 IO_PAD683 1778 1 Z
+bit 1778 C 1 *
+bit 1777 I 1 IO_PAD681
+bit 1776 O 1 IO_PAD681 1775 1 Z
+bit 1775 C 1 *
+bit 1774 I 1 IO_PAD680
+bit 1773 O 1 IO_PAD680 1772 1 Z
+bit 1772 C 1 *
+bit 1771 I 1 IO_PAD679
+bit 1770 O 1 IO_PAD679 1769 1 Z
+bit 1769 C 1 *
+bit 1768 I 1 IO_PAD678
+bit 1767 O 1 IO_PAD678 1766 1 Z
+bit 1766 C 1 *
+bit 1765 I 1 IO_PAD677
+bit 1764 O 1 IO_PAD677 1763 1 Z
+bit 1763 C 1 *
+bit 1762 I 1 IO_PAD676
+bit 1761 O 1 IO_PAD676 1760 1 Z
+bit 1760 C 1 *
+bit 1759 I 1 IO_PAD675
+bit 1758 O 1 IO_PAD675 1757 1 Z
+bit 1757 C 1 *
+bit 1756 O 1 *
+bit 1755 O 1 *
+bit 1754 O 1 *
+bit 1753 O 1 *
+bit 1752 O 1 *
+bit 1751 O 1 *
+bit 1750 I 1 IO_PAD673
+bit 1749 O 1 IO_PAD673 1748 1 Z
+bit 1748 C 1 *
+bit 1747 I 1 IO_PAD671
+bit 1746 O 1 IO_PAD671 1745 1 Z
+bit 1745 C 1 *
+bit 1744 I 1 IO_PAD670
+bit 1743 O 1 IO_PAD670 1742 1 Z
+bit 1742 C 1 *
+bit 1741 I 1 IO_PAD669
+bit 1740 O 1 IO_PAD669 1739 1 Z
+bit 1739 C 1 *
+bit 1738 I 1 IO_PAD668
+bit 1737 O 1 IO_PAD668 1736 1 Z
+bit 1736 C 1 *
+bit 1735 I 1 IO_PAD667
+bit 1734 O 1 IO_PAD667 1733 1 Z
+bit 1733 C 1 *
+bit 1732 I 1 IO_PAD665
+bit 1731 O 1 IO_PAD665 1730 1 Z
+bit 1730 C 1 *
+bit 1729 I 1 IO_PAD663
+bit 1728 O 1 IO_PAD663 1727 1 Z
+bit 1727 C 1 *
+bit 1726 I 1 IO_PAD661
+bit 1725 O 1 IO_PAD661 1724 1 Z
+bit 1724 C 1 *
+bit 1723 I 1 IO_PAD659
+bit 1722 O 1 IO_PAD659 1721 1 Z
+bit 1721 C 1 *
+bit 1720 O 1 *
+bit 1719 O 1 *
+bit 1718 O 1 *
+bit 1717 O 1 *
+bit 1716 O 1 *
+bit 1715 O 1 *
+bit 1714 I 1 IO_PAD658
+bit 1713 O 1 IO_PAD658 1712 1 Z
+bit 1712 C 1 *
+bit 1711 I 1 IO_PAD657
+bit 1710 O 1 IO_PAD657 1709 1 Z
+bit 1709 C 1 *
+bit 1708 I 1 IO_PAD655
+bit 1707 O 1 IO_PAD655 1706 1 Z
+bit 1706 C 1 *
+bit 1705 I 1 IO_PAD654
+bit 1704 O 1 IO_PAD654 1703 1 Z
+bit 1703 C 1 *
+bit 1702 I 1 IO_PAD653
+bit 1701 O 1 IO_PAD653 1700 1 Z
+bit 1700 C 1 *
+bit 1699 I 1 IO_PAD651
+bit 1698 O 1 IO_PAD651 1697 1 Z
+bit 1697 C 1 *
+bit 1696 I 1 IO_PAD649
+bit 1695 O 1 IO_PAD649 1694 1 Z
+bit 1694 C 1 *
+bit 1693 I 1 IO_PAD648
+bit 1692 O 1 IO_PAD648 1691 1 Z
+bit 1691 C 1 *
+bit 1690 I 1 IO_PAD646
+bit 1689 O 1 IO_PAD646 1688 1 Z
+bit 1688 C 1 *
+bit 1687 I 1 IO_PAD645
+bit 1686 O 1 IO_PAD645 1685 1 Z
+bit 1685 C 1 *
+bit 1684 I 1 IO_PAD643
+bit 1683 O 1 IO_PAD643 1682 1 Z
+bit 1682 C 1 *
+bit 1681 I 1 IO_PAD641
+bit 1680 O 1 IO_PAD641 1679 1 Z
+bit 1679 C 1 *
+bit 1678 I 1 IO_PAD640
+bit 1677 O 1 IO_PAD640 1676 1 Z
+bit 1676 C 1 *
+bit 1675 I 1 IO_PAD639
+bit 1674 O 1 IO_PAD639 1673 1 Z
+bit 1673 C 1 *
+bit 1672 I 1 IO_PAD637
+bit 1671 O 1 IO_PAD637 1670 1 Z
+bit 1670 C 1 *
+bit 1669 I 1 IO_PAD636
+bit 1668 O 1 IO_PAD636 1667 1 Z
+bit 1667 C 1 *
+bit 1666 O 1 *
+bit 1665 O 1 *
+bit 1664 O 1 *
+bit 1663 O 1 *
+bit 1662 O 1 *
+bit 1661 O 1 *
+bit 1660 I 1 IO_PAD635
+bit 1659 O 1 IO_PAD635 1658 1 Z
+bit 1658 C 1 *
+bit 1657 I 1 IO_PAD633
+bit 1656 O 1 IO_PAD633 1655 1 Z
+bit 1655 C 1 *
+bit 1654 I 1 IO_PAD631
+bit 1653 O 1 IO_PAD631 1652 1 Z
+bit 1652 C 1 *
+bit 1651 I 1 IO_PAD629
+bit 1650 O 1 IO_PAD629 1649 1 Z
+bit 1649 C 1 *
+bit 1648 I 1 IO_PAD627
+bit 1647 O 1 IO_PAD627 1646 1 Z
+bit 1646 C 1 *
+bit 1645 I 1 IO_PAD626
+bit 1644 O 1 IO_PAD626 1643 1 Z
+bit 1643 C 1 *
+bit 1642 I 1 IO_PAD625
+bit 1641 O 1 IO_PAD625 1640 1 Z
+bit 1640 C 1 *
+bit 1639 I 1 IO_PAD624
+bit 1638 O 1 IO_PAD624 1637 1 Z
+bit 1637 C 1 *
+bit 1636 I 1 IO_PAD623
+bit 1635 O 1 IO_PAD623 1634 1 Z
+bit 1634 C 1 *
+bit 1633 I 1 IO_PAD621
+bit 1632 O 1 IO_PAD621 1631 1 Z
+bit 1631 C 1 *
+bit 1630 O 1 *
+bit 1629 O 1 *
+bit 1628 O 1 *
+bit 1627 O 1 *
+bit 1626 O 1 *
+bit 1625 O 1 *
+bit 1624 I 1 IO_PAD619
+bit 1623 O 1 IO_PAD619 1622 1 Z
+bit 1622 C 1 *
+bit 1621 I 1 IO_PAD618
+bit 1620 O 1 IO_PAD618 1619 1 Z
+bit 1619 C 1 *
+bit 1618 I 1 IO_PAD617
+bit 1617 O 1 IO_PAD617 1616 1 Z
+bit 1616 C 1 *
+bit 1615 I 1 IO_PAD616
+bit 1614 O 1 IO_PAD616 1613 1 Z
+bit 1613 C 1 *
+bit 1612 I 1 IO_PAD615
+bit 1611 O 1 IO_PAD615 1610 1 Z
+bit 1610 C 1 *
+bit 1609 I 1 IO_PAD614
+bit 1608 O 1 IO_PAD614 1607 1 Z
+bit 1607 C 1 *
+bit 1606 I 1 IO_PAD613
+bit 1605 O 1 IO_PAD613 1604 1 Z
+bit 1604 C 1 *
+bit 1603 I 1 IO_PAD611
+bit 1602 O 1 IO_PAD611 1601 1 Z
+bit 1601 C 1 *
+bit 1600 O 1 *
+bit 1599 O 1 *
+bit 1598 O 1 *
+bit 1597 O 1 *
+bit 1596 O 1 *
+bit 1595 O 1 *
+bit 1594 I 1 IO_PAD609
+bit 1593 O 1 IO_PAD609 1592 1 Z
+bit 1592 C 1 *
+bit 1591 I 1 IO_PAD608
+bit 1590 O 1 IO_PAD608 1589 1 Z
+bit 1589 C 1 *
+bit 1588 I 1 IO_PAD607
+bit 1587 O 1 IO_PAD607 1586 1 Z
+bit 1586 C 1 *
+bit 1585 I 1 IO_PAD605
+bit 1584 O 1 IO_PAD605 1583 1 Z
+bit 1583 C 1 *
+bit 1582 I 1 IO_PAD603
+bit 1581 O 1 IO_PAD603 1580 1 Z
+bit 1580 C 1 *
+bit 1579 I 1 IO_PAD601
+bit 1578 O 1 IO_PAD601 1577 1 Z
+bit 1577 C 1 *
+bit 1576 I 1 IO_PAD599
+bit 1575 O 1 IO_PAD599 1574 1 Z
+bit 1574 C 1 *
+bit 1573 I 1 IO_PAD598
+bit 1572 O 1 IO_PAD598 1571 1 Z
+bit 1571 C 1 *
+bit 1570 I 1 IO_PAD597
+bit 1569 O 1 IO_PAD597 1568 1 Z
+bit 1568 C 1 *
+bit 1567 I 1 IO_PAD596
+bit 1566 O 1 IO_PAD596 1565 1 Z
+bit 1565 C 1 *
+bit 1564 I 1 IO_PAD595
+bit 1563 O 1 IO_PAD595 1562 1 Z
+bit 1562 C 1 *
+bit 1561 I 1 IO_PAD593
+bit 1560 O 1 IO_PAD593 1559 1 Z
+bit 1559 C 1 *
+bit 1558 O 1 *
+bit 1557 O 1 *
+bit 1556 O 1 *
+bit 1555 O 1 *
+bit 1554 O 1 *
+bit 1553 O 1 *
+bit 1552 I 1 IO_PAD591
+bit 1551 O 1 IO_PAD591 1550 1 Z
+bit 1550 C 1 *
+bit 1549 I 1 IO_PAD590
+bit 1548 O 1 IO_PAD590 1547 1 Z
+bit 1547 C 1 *
+bit 1546 I 1 IO_PAD589
+bit 1545 O 1 IO_PAD589 1544 1 Z
+bit 1544 C 1 *
+bit 1543 I 1 IO_PAD587
+bit 1542 O 1 IO_PAD587 1541 1 Z
+bit 1541 C 1 *
+bit 1540 I 1 IO_PAD586
+bit 1539 O 1 IO_PAD586 1538 1 Z
+bit 1538 C 1 *
+bit 1537 I 1 IO_PAD585
+bit 1536 O 1 IO_PAD585 1535 1 Z
+bit 1535 C 1 *
+bit 1534 I 1 IO_PAD584
+bit 1533 O 1 IO_PAD584 1532 1 Z
+bit 1532 C 1 *
+bit 1531 I 1 IO_PAD583
+bit 1530 O 1 IO_PAD583 1529 1 Z
+bit 1529 C 1 *
+bit 1528 I 1 IO_PAD581
+bit 1527 O 1 IO_PAD581 1526 1 Z
+bit 1526 C 1 *
+bit 1525 I 1 IO_PAD580
+bit 1524 O 1 IO_PAD580 1523 1 Z
+bit 1523 C 1 *
+bit 1522 I 1 IO_PAD579
+bit 1521 O 1 IO_PAD579 1520 1 Z
+bit 1520 C 1 *
+bit 1519 I 1 IO_PAD578
+bit 1518 O 1 IO_PAD578 1517 1 Z
+bit 1517 C 1 *
+bit 1516 I 1 IO_PAD577
+bit 1515 O 1 IO_PAD577 1514 1 Z
+bit 1514 C 1 *
+bit 1513 I 1 IO_PAD575
+bit 1512 O 1 IO_PAD575 1511 1 Z
+bit 1511 C 1 *
+bit 1510 I 1 IO_PAD573
+bit 1509 O 1 IO_PAD573 1508 1 Z
+bit 1508 C 1 *
+bit 1507 I 1 IO_PAD572
+bit 1506 O 1 IO_PAD572 1505 1 Z
+bit 1505 C 1 *
+bit 1504 I 1 IO_PAD571
+bit 1503 O 1 IO_PAD571 1502 1 Z
+bit 1502 C 1 *
+bit 1501 I 1 IO_PAD569
+bit 1500 O 1 IO_PAD569 1499 1 Z
+bit 1499 C 1 *
+bit 1498 I 1 IO_PAD567
+bit 1497 O 1 IO_PAD567 1496 1 Z
+bit 1496 C 1 *
+bit 1495 I 1 IO_PAD565
+bit 1494 O 1 IO_PAD565 1493 1 Z
+bit 1493 C 1 *
+bit 1492 I 1 IO_PAD563
+bit 1491 O 1 IO_PAD563 1490 1 Z
+bit 1490 C 1 *
+bit 1489 I 1 IO_PAD562
+bit 1488 O 1 IO_PAD562 1487 1 Z
+bit 1487 C 1 *
+bit 1486 I 1 IO_PAD561
+bit 1485 O 1 IO_PAD561 1484 1 Z
+bit 1484 C 1 *
+bit 1483 I 1 IO_PAD560
+bit 1482 O 1 IO_PAD560 1481 1 Z
+bit 1481 C 1 *
+bit 1480 I 1 IO_PAD559
+bit 1479 O 1 IO_PAD559 1478 1 Z
+bit 1478 C 1 *
+bit 1477 I 1 IO_PAD557
+bit 1476 O 1 IO_PAD557 1475 1 Z
+bit 1475 C 1 *
+bit 1474 I 1 IO_PAD555
+bit 1473 O 1 IO_PAD555 1472 1 Z
+bit 1472 C 1 *
+bit 1471 I 1 IO_PAD554
+bit 1470 O 1 IO_PAD554 1469 1 Z
+bit 1469 C 1 *
+bit 1468 I 1 IO_PAD553
+bit 1467 O 1 IO_PAD553 1466 1 Z
+bit 1466 C 1 *
+bit 1465 I 1 IO_PAD552
+bit 1464 O 1 IO_PAD552 1463 1 Z
+bit 1463 C 1 *
+bit 1462 I 1 IO_PAD551
+bit 1461 O 1 IO_PAD551 1460 1 Z
+bit 1460 C 1 *
+bit 1459 I 1 IO_PAD549
+bit 1458 O 1 IO_PAD549 1457 1 Z
+bit 1457 C 1 *
+bit 1456 I 1 IO_PAD548
+bit 1455 O 1 IO_PAD548 1454 1 Z
+bit 1454 C 1 *
+bit 1453 I 1 IO_PAD547
+bit 1452 O 1 IO_PAD547 1451 1 Z
+bit 1451 C 1 *
+bit 1450 I 1 CCLK_PAD544
+bit 1449 O 1 CCLK_PAD544 1448 1 Z
+bit 1448 C 1 *
+bit 1447 I 1 DONE_PAD543
+bit 1446 O 1 DONE_PAD543 1445 1 Z
+bit 1445 C 1 *
+bit 1444 I 1 IO_PAD541
+bit 1443 O 1 IO_PAD541 1442 1 Z
+bit 1442 C 1 *
+bit 1441 I 1 IO_PAD540
+bit 1440 O 1 IO_PAD540 1439 1 Z
+bit 1439 C 1 *
+bit 1438 I 1 IO_PAD539
+bit 1437 O 1 IO_PAD539 1436 1 Z
+bit 1436 C 1 *
+bit 1435 I 1 IO_PAD538
+bit 1434 O 1 IO_PAD538 1433 1 Z
+bit 1433 C 1 *
+bit 1432 I 1 IO_PAD536
+bit 1431 O 1 IO_PAD536 1430 1 Z
+bit 1430 C 1 *
+bit 1429 I 1 IO_PAD535
+bit 1428 O 1 IO_PAD535 1427 1 Z
+bit 1427 C 1 *
+bit 1426 I 1 IO_PAD534
+bit 1425 O 1 IO_PAD534 1424 1 Z
+bit 1424 C 1 *
+bit 1423 I 1 IO_PAD532
+bit 1422 O 1 IO_PAD532 1421 1 Z
+bit 1421 C 1 *
+bit 1420 I 1 IO_PAD531
+bit 1419 O 1 IO_PAD531 1418 1 Z
+bit 1418 C 1 *
+bit 1417 I 1 IO_PAD530
+bit 1416 O 1 IO_PAD530 1415 1 Z
+bit 1415 C 1 *
+bit 1414 I 1 IO_PAD528
+bit 1413 O 1 IO_PAD528 1412 1 Z
+bit 1412 C 1 *
+bit 1411 I 1 IO_PAD527
+bit 1410 O 1 IO_PAD527 1409 1 Z
+bit 1409 C 1 *
+bit 1408 I 1 IO_PAD526
+bit 1407 O 1 IO_PAD526 1406 1 Z
+bit 1406 C 1 *
+bit 1405 I 1 IO_PAD525
+bit 1404 O 1 IO_PAD525 1403 1 Z
+bit 1403 C 1 *
+bit 1402 I 1 IO_PAD524
+bit 1401 O 1 IO_PAD524 1400 1 Z
+bit 1400 C 1 *
+bit 1399 I 1 IO_PAD522
+bit 1398 O 1 IO_PAD522 1397 1 Z
+bit 1397 C 1 *
+bit 1396 I 1 IO_PAD520
+bit 1395 O 1 IO_PAD520 1394 1 Z
+bit 1394 C 1 *
+bit 1393 I 1 IO_PAD519
+bit 1392 O 1 IO_PAD519 1391 1 Z
+bit 1391 C 1 *
+bit 1390 I 1 IO_PAD518
+bit 1389 O 1 IO_PAD518 1388 1 Z
+bit 1388 C 1 *
+bit 1387 I 1 IO_PAD517
+bit 1386 O 1 IO_PAD517 1385 1 Z
+bit 1385 C 1 *
+bit 1384 I 1 IO_PAD516
+bit 1383 O 1 IO_PAD516 1382 1 Z
+bit 1382 C 1 *
+bit 1381 I 1 IO_PAD514
+bit 1380 O 1 IO_PAD514 1379 1 Z
+bit 1379 C 1 *
+bit 1378 I 1 IO_PAD512
+bit 1377 O 1 IO_PAD512 1376 1 Z
+bit 1376 C 1 *
+bit 1375 I 1 IO_PAD510
+bit 1374 O 1 IO_PAD510 1373 1 Z
+bit 1373 C 1 *
+bit 1372 I 1 IO_PAD508
+bit 1371 O 1 IO_PAD508 1370 1 Z
+bit 1370 C 1 *
+bit 1369 I 1 IO_PAD507
+bit 1368 O 1 IO_PAD507 1367 1 Z
+bit 1367 C 1 *
+bit 1366 I 1 IO_PAD506
+bit 1365 O 1 IO_PAD506 1364 1 Z
+bit 1364 C 1 *
+bit 1363 I 1 IO_PAD504
+bit 1362 O 1 IO_PAD504 1361 1 Z
+bit 1361 C 1 *
+bit 1360 I 1 IO_PAD503
+bit 1359 O 1 IO_PAD503 1358 1 Z
+bit 1358 C 1 *
+bit 1357 I 1 IO_PAD502
+bit 1356 O 1 IO_PAD502 1355 1 Z
+bit 1355 C 1 *
+bit 1354 I 1 IO_PAD500
+bit 1353 O 1 IO_PAD500 1352 1 Z
+bit 1352 C 1 *
+bit 1351 I 1 IO_PAD499
+bit 1350 O 1 IO_PAD499 1349 1 Z
+bit 1349 C 1 *
+bit 1348 I 1 IO_PAD498
+bit 1347 O 1 IO_PAD498 1346 1 Z
+bit 1346 C 1 *
+bit 1345 I 1 IO_PAD497
+bit 1344 O 1 IO_PAD497 1343 1 Z
+bit 1343 C 1 *
+bit 1342 I 1 IO_PAD496
+bit 1341 O 1 IO_PAD496 1340 1 Z
+bit 1340 C 1 *
+bit 1339 I 1 IO_PAD494
+bit 1338 O 1 IO_PAD494 1337 1 Z
+bit 1337 C 1 *
+bit 1336 I 1 IO_PAD493
+bit 1335 O 1 IO_PAD493 1334 1 Z
+bit 1334 C 1 *
+bit 1333 I 1 IO_PAD492
+bit 1332 O 1 IO_PAD492 1331 1 Z
+bit 1331 C 1 *
+bit 1330 I 1 IO_PAD490
+bit 1329 O 1 IO_PAD490 1328 1 Z
+bit 1328 C 1 *
+bit 1327 I 1 IO_PAD488
+bit 1326 O 1 IO_PAD488 1325 1 Z
+bit 1325 C 1 *
+bit 1324 I 1 IO_PAD487
+bit 1323 O 1 IO_PAD487 1322 1 Z
+bit 1322 C 1 *
+bit 1321 I 1 IO_PAD486
+bit 1320 O 1 IO_PAD486 1319 1 Z
+bit 1319 C 1 *
+bit 1318 I 1 IO_PAD485
+bit 1317 O 1 IO_PAD485 1316 1 Z
+bit 1316 C 1 *
+bit 1315 I 1 IO_PAD484
+bit 1314 O 1 IO_PAD484 1313 1 Z
+bit 1313 C 1 *
+bit 1312 I 1 IO_PAD482
+bit 1311 O 1 IO_PAD482 1310 1 Z
+bit 1310 C 1 *
+bit 1309 I 1 IO_PAD480
+bit 1308 O 1 IO_PAD480 1307 1 Z
+bit 1307 C 1 *
+bit 1306 I 1 IO_PAD478
+bit 1305 O 1 IO_PAD478 1304 1 Z
+bit 1304 C 1 *
+bit 1303 I 1 IO_PAD476
+bit 1302 O 1 IO_PAD476 1301 1 Z
+bit 1301 C 1 *
+bit 1300 I 1 IO_PAD475
+bit 1299 O 1 IO_PAD475 1298 1 Z
+bit 1298 C 1 *
+bit 1297 I 1 IO_PAD474
+bit 1296 O 1 IO_PAD474 1295 1 Z
+bit 1295 C 1 *
+bit 1294 I 1 IO_PAD472
+bit 1293 O 1 IO_PAD472 1292 1 Z
+bit 1292 C 1 *
+bit 1291 I 1 IO_PAD471
+bit 1290 O 1 IO_PAD471 1289 1 Z
+bit 1289 C 1 *
+bit 1288 I 1 IO_PAD470
+bit 1287 O 1 IO_PAD470 1286 1 Z
+bit 1286 C 1 *
+bit 1285 I 1 IO_PAD468
+bit 1284 O 1 IO_PAD468 1283 1 Z
+bit 1283 C 1 *
+bit 1282 I 1 IO_PAD466
+bit 1281 O 1 IO_PAD466 1280 1 Z
+bit 1280 C 1 *
+bit 1279 I 1 IO_PAD465
+bit 1278 O 1 IO_PAD465 1277 1 Z
+bit 1277 C 1 *
+bit 1276 I 1 IO_PAD464
+bit 1275 O 1 IO_PAD464 1274 1 Z
+bit 1274 C 1 *
+bit 1273 I 1 IO_PAD463
+bit 1272 O 1 IO_PAD463 1271 1 Z
+bit 1271 C 1 *
+bit 1270 I 1 IO_PAD462
+bit 1269 O 1 IO_PAD462 1268 1 Z
+bit 1268 C 1 *
+bit 1267 I 1 IO_PAD461
+bit 1266 O 1 IO_PAD461 1265 1 Z
+bit 1265 C 1 *
+bit 1264 I 1 IO_PAD460
+bit 1263 O 1 IO_PAD460 1262 1 Z
+bit 1262 C 1 *
+bit 1261 I 1 IO_PAD458
+bit 1260 O 1 IO_PAD458 1259 1 Z
+bit 1259 C 1 *
+bit 1258 I 1 IO_PAD456
+bit 1257 O 1 IO_PAD456 1256 1 Z
+bit 1256 C 1 *
+bit 1255 I 1 IO_PAD455
+bit 1254 O 1 IO_PAD455 1253 1 Z
+bit 1253 C 1 *
+bit 1252 I 1 IO_PAD454
+bit 1251 O 1 IO_PAD454 1250 1 Z
+bit 1250 C 1 *
+bit 1249 I 1 IO_PAD453
+bit 1248 O 1 IO_PAD453 1247 1 Z
+bit 1247 C 1 *
+bit 1246 I 1 IO_PAD452
+bit 1245 O 1 IO_PAD452 1244 1 Z
+bit 1244 C 1 *
+bit 1243 I 1 IO_PAD450
+bit 1242 O 1 IO_PAD450 1241 1 Z
+bit 1241 C 1 *
+bit 1240 I 1 IO_PAD448
+bit 1239 O 1 IO_PAD448 1238 1 Z
+bit 1238 C 1 *
+bit 1237 I 1 IO_PAD446
+bit 1236 O 1 IO_PAD446 1235 1 Z
+bit 1235 C 1 *
+bit 1234 I 1 IO_PAD444
+bit 1233 O 1 IO_PAD444 1232 1 Z
+bit 1232 C 1 *
+bit 1231 I 1 IO_PAD443
+bit 1230 O 1 IO_PAD443 1229 1 Z
+bit 1229 C 1 *
+bit 1228 I 1 IO_PAD442
+bit 1227 O 1 IO_PAD442 1226 1 Z
+bit 1226 C 1 *
+bit 1225 I 1 IO_PAD440
+bit 1224 O 1 IO_PAD440 1223 1 Z
+bit 1223 C 1 *
+bit 1222 I 1 IO_PAD439
+bit 1221 O 1 IO_PAD439 1220 1 Z
+bit 1220 C 1 *
+bit 1219 I 1 IO_PAD438
+bit 1218 O 1 IO_PAD438 1217 1 Z
+bit 1217 C 1 *
+bit 1216 I 1 IO_PAD436
+bit 1215 O 1 IO_PAD436 1214 1 Z
+bit 1214 C 1 *
+bit 1213 I 1 IO_PAD434
+bit 1212 O 1 IO_PAD434 1211 1 Z
+bit 1211 C 1 *
+bit 1210 I 1 IO_PAD433
+bit 1209 O 1 IO_PAD433 1208 1 Z
+bit 1208 C 1 *
+bit 1207 I 1 IO_PAD432
+bit 1206 O 1 IO_PAD432 1205 1 Z
+bit 1205 C 1 *
+bit 1204 I 1 IO_PAD430
+bit 1203 O 1 IO_PAD430 1202 1 Z
+bit 1202 C 1 *
+bit 1201 I 1 IO_PAD429
+bit 1200 O 1 IO_PAD429 1199 1 Z
+bit 1199 C 1 *
+bit 1198 I 1 IO_PAD428
+bit 1197 O 1 IO_PAD428 1196 1 Z
+bit 1196 C 1 *
+bit 1195 I 1 IO_PAD426
+bit 1194 O 1 IO_PAD426 1193 1 Z
+bit 1193 C 1 *
+bit 1192 I 1 IO_PAD424
+bit 1191 O 1 IO_PAD424 1190 1 Z
+bit 1190 C 1 *
+bit 1189 I 1 IO_PAD423
+bit 1188 O 1 IO_PAD423 1187 1 Z
+bit 1187 C 1 *
+bit 1186 I 1 IO_PAD422
+bit 1185 O 1 IO_PAD422 1184 1 Z
+bit 1184 C 1 *
+bit 1183 I 1 IO_PAD420
+bit 1182 O 1 IO_PAD420 1181 1 Z
+bit 1181 C 1 *
+bit 1180 I 1 IO_PAD419
+bit 1179 O 1 IO_PAD419 1178 1 Z
+bit 1178 C 1 *
+bit 1177 I 1 IO_PAD418
+bit 1176 O 1 IO_PAD418 1175 1 Z
+bit 1175 C 1 *
+bit 1174 I 1 IO_PAD416
+bit 1173 O 1 IO_PAD416 1172 1 Z
+bit 1172 C 1 *
+bit 1171 I 1 IO_PAD414
+bit 1170 O 1 IO_PAD414 1169 1 Z
+bit 1169 C 1 *
+bit 1168 I 1 IO_PAD412
+bit 1167 O 1 IO_PAD412 1166 1 Z
+bit 1166 C 1 *
+bit 1165 I 1 IO_PAD410
+bit 1164 O 1 IO_PAD410 1163 1 Z
+bit 1163 C 1 *
+bit 1162 I 1 IO_PAD409
+bit 1161 O 1 IO_PAD409 1160 1 Z
+bit 1160 C 1 *
+bit 1159 I 1 IO_PAD408
+bit 1158 O 1 IO_PAD408 1157 1 Z
+bit 1157 C 1 *
+bit 1156 I 1 IO_PAD407
+bit 1155 O 1 IO_PAD407 1154 1 Z
+bit 1154 C 1 *
+bit 1153 I 1 IO_PAD406
+bit 1152 O 1 IO_PAD406 1151 1 Z
+bit 1151 C 1 *
+bit 1150 I 1 IO_PAD404
+bit 1149 O 1 IO_PAD404 1148 1 Z
+bit 1148 C 1 *
+bit 1147 I 1 IO_PAD402
+bit 1146 O 1 IO_PAD402 1145 1 Z
+bit 1145 C 1 *
+bit 1144 I 1 IO_PAD401
+bit 1143 O 1 IO_PAD401 1142 1 Z
+bit 1142 C 1 *
+bit 1141 I 1 IO_PAD400
+bit 1140 O 1 IO_PAD400 1139 1 Z
+bit 1139 C 1 *
+bit 1138 I 1 IO_PAD399
+bit 1137 O 1 IO_PAD399 1136 1 Z
+bit 1136 C 1 *
+bit 1135 I 1 IO_PAD398
+bit 1134 O 1 IO_PAD398 1133 1 Z
+bit 1133 C 1 *
+bit 1132 I 1 IO_PAD397
+bit 1131 O 1 IO_PAD397 1130 1 Z
+bit 1130 C 1 *
+bit 1129 I 1 IO_PAD396
+bit 1128 O 1 IO_PAD396 1127 1 Z
+bit 1127 C 1 *
+bit 1126 I 1 IO_PAD394
+bit 1125 O 1 IO_PAD394 1124 1 Z
+bit 1124 C 1 *
+bit 1123 I 1 IO_PAD392
+bit 1122 O 1 IO_PAD392 1121 1 Z
+bit 1121 C 1 *
+bit 1120 I 1 IO_PAD391
+bit 1119 O 1 IO_PAD391 1118 1 Z
+bit 1118 C 1 *
+bit 1117 I 1 IO_PAD390
+bit 1116 O 1 IO_PAD390 1115 1 Z
+bit 1115 C 1 *
+bit 1114 I 1 IO_PAD388
+bit 1113 O 1 IO_PAD388 1112 1 Z
+bit 1112 C 1 *
+bit 1111 I 1 IO_PAD387
+bit 1110 O 1 IO_PAD387 1109 1 Z
+bit 1109 C 1 *
+bit 1108 I 1 IO_PAD386
+bit 1107 O 1 IO_PAD386 1106 1 Z
+bit 1106 C 1 *
+bit 1105 I 1 IO_PAD384
+bit 1104 O 1 IO_PAD384 1103 1 Z
+bit 1103 C 1 *
+bit 1102 I 1 IO_PAD382
+bit 1101 O 1 IO_PAD382 1100 1 Z
+bit 1100 C 1 *
+bit 1099 I 1 IO_PAD380
+bit 1098 O 1 IO_PAD380 1097 1 Z
+bit 1097 C 1 *
+bit 1096 I 1 IO_PAD378
+bit 1095 O 1 IO_PAD378 1094 1 Z
+bit 1094 C 1 *
+bit 1093 I 1 IO_PAD377
+bit 1092 O 1 IO_PAD377 1091 1 Z
+bit 1091 C 1 *
+bit 1090 I 1 IO_PAD376
+bit 1089 O 1 IO_PAD376 1088 1 Z
+bit 1088 C 1 *
+bit 1087 I 1 IO_PAD375
+bit 1086 O 1 IO_PAD375 1085 1 Z
+bit 1085 C 1 *
+bit 1084 I 1 IO_PAD374
+bit 1083 O 1 IO_PAD374 1082 1 Z
+bit 1082 C 1 *
+bit 1081 I 1 IO_PAD372
+bit 1080 O 1 IO_PAD372 1079 1 Z
+bit 1079 C 1 *
+bit 1078 I 1 IO_PAD370
+bit 1077 O 1 IO_PAD370 1076 1 Z
+bit 1076 C 1 *
+bit 1075 I 1 IO_PAD369
+bit 1074 O 1 IO_PAD369 1073 1 Z
+bit 1073 C 1 *
+bit 1072 I 1 IO_PAD368
+bit 1071 O 1 IO_PAD368 1070 1 Z
+bit 1070 C 1 *
+bit 1069 I 1 IO_PAD366
+bit 1068 O 1 IO_PAD366 1067 1 Z
+bit 1067 C 1 *
+bit 1066 I 1 IO_PAD365
+bit 1065 O 1 IO_PAD365 1064 1 Z
+bit 1064 C 1 *
+bit 1063 I 1 IO_PAD364
+bit 1062 O 1 IO_PAD364 1061 1 Z
+bit 1061 C 1 *
+bit 1060 I 1 IO_PAD363
+bit 1059 O 1 IO_PAD363 1058 1 Z
+bit 1058 C 1 *
+bit 1057 I 1 IO_PAD362
+bit 1056 O 1 IO_PAD362 1055 1 Z
+bit 1055 C 1 *
+bit 1054 I 1 IO_PAD360
+bit 1053 O 1 IO_PAD360 1052 1 Z
+bit 1052 C 1 *
+bit 1051 I 1 IO_PAD359
+bit 1050 O 1 IO_PAD359 1049 1 Z
+bit 1049 C 1 *
+bit 1048 I 1 IO_PAD358
+bit 1047 O 1 IO_PAD358 1046 1 Z
+bit 1046 C 1 *
+bit 1045 I 1 IO_PAD356
+bit 1044 O 1 IO_PAD356 1043 1 Z
+bit 1043 C 1 *
+bit 1042 I 1 IO_PAD355
+bit 1041 O 1 IO_PAD355 1040 1 Z
+bit 1040 C 1 *
+bit 1039 I 1 IO_PAD354
+bit 1038 O 1 IO_PAD354 1037 1 Z
+bit 1037 C 1 *
+bit 1036 I 1 IO_PAD352
+bit 1035 O 1 IO_PAD352 1034 1 Z
+bit 1034 C 1 *
+bit 1033 I 1 IO_PAD350
+bit 1032 O 1 IO_PAD350 1031 1 Z
+bit 1031 C 1 *
+bit 1030 I 1 IO_PAD348
+bit 1029 O 1 IO_PAD348 1028 1 Z
+bit 1028 C 1 *
+bit 1027 I 1 IO_PAD346
+bit 1026 O 1 IO_PAD346 1025 1 Z
+bit 1025 C 1 *
+bit 1024 I 1 IO_PAD345
+bit 1023 O 1 IO_PAD345 1022 1 Z
+bit 1022 C 1 *
+bit 1021 I 1 IO_PAD344
+bit 1020 O 1 IO_PAD344 1019 1 Z
+bit 1019 C 1 *
+bit 1018 I 1 IO_PAD343
+bit 1017 O 1 IO_PAD343 1016 1 Z
+bit 1016 C 1 *
+bit 1015 I 1 IO_PAD342
+bit 1014 O 1 IO_PAD342 1013 1 Z
+bit 1013 C 1 *
+bit 1012 I 1 IO_PAD340
+bit 1011 O 1 IO_PAD340 1010 1 Z
+bit 1010 C 1 *
+bit 1009 I 1 IO_PAD338
+bit 1008 O 1 IO_PAD338 1007 1 Z
+bit 1007 C 1 *
+bit 1006 I 1 IO_PAD337
+bit 1005 O 1 IO_PAD337 1004 1 Z
+bit 1004 C 1 *
+bit 1003 I 1 IO_PAD336
+bit 1002 O 1 IO_PAD336 1001 1 Z
+bit 1001 C 1 *
+bit 1000 I 1 IO_PAD335
+bit 999 O 1 IO_PAD335 998 1 Z
+bit 998 C 1 *
+bit 997 I 1 IO_PAD334
+bit 996 O 1 IO_PAD334 995 1 Z
+bit 995 C 1 *
+bit 994 I 1 IO_PAD332
+bit 993 O 1 IO_PAD332 992 1 Z
+bit 992 C 1 *
+bit 991 I 1 IO_PAD331
+bit 990 O 1 IO_PAD331 989 1 Z
+bit 989 C 1 *
+bit 988 I 1 IO_PAD330
+bit 987 O 1 IO_PAD330 986 1 Z
+bit 986 C 1 *
+bit 985 I 1 IO_PAD328
+bit 984 O 1 IO_PAD328 983 1 Z
+bit 983 C 1 *
+bit 982 I 1 IO_PAD327
+bit 981 O 1 IO_PAD327 980 1 Z
+bit 980 C 1 *
+bit 979 I 1 IO_PAD326
+bit 978 O 1 IO_PAD326 977 1 Z
+bit 977 C 1 *
+bit 976 I 1 IO_PAD324
+bit 975 O 1 IO_PAD324 974 1 Z
+bit 974 C 1 *
+bit 973 I 1 IO_PAD323
+bit 972 O 1 IO_PAD323 971 1 Z
+bit 971 C 1 *
+bit 970 I 1 IO_PAD322
+bit 969 O 1 IO_PAD322 968 1 Z
+bit 968 C 1 *
+bit 967 I 1 IO_PAD321
+bit 966 O 1 IO_PAD321 965 1 Z
+bit 965 C 1 *
+bit 964 I 1 M2_PAD320
+bit 963 I 1 M0_PAD319
+bit 962 I 1 M1_PAD318
+bit 961 I 1 IO_PAD316
+bit 960 O 1 IO_PAD316 959 1 Z
+bit 959 C 1 *
+bit 958 I 1 IO_PAD315
+bit 957 O 1 IO_PAD315 956 1 Z
+bit 956 C 1 *
+bit 955 I 1 IO_PAD314
+bit 954 O 1 IO_PAD314 953 1 Z
+bit 953 C 1 *
+bit 952 I 1 IO_PAD312
+bit 951 O 1 IO_PAD312 950 1 Z
+bit 950 C 1 *
+bit 949 I 1 IO_PAD311
+bit 948 O 1 IO_PAD311 947 1 Z
+bit 947 C 1 *
+bit 946 I 1 IO_PAD310
+bit 945 O 1 IO_PAD310 944 1 Z
+bit 944 C 1 *
+bit 943 I 1 IO_PAD309
+bit 942 O 1 IO_PAD309 941 1 Z
+bit 941 C 1 *
+bit 940 I 1 IO_PAD308
+bit 939 O 1 IO_PAD308 938 1 Z
+bit 938 C 1 *
+bit 937 I 1 IO_PAD306
+bit 936 O 1 IO_PAD306 935 1 Z
+bit 935 C 1 *
+bit 934 I 1 IO_PAD304
+bit 933 O 1 IO_PAD304 932 1 Z
+bit 932 C 1 *
+bit 931 I 1 IO_PAD303
+bit 930 O 1 IO_PAD303 929 1 Z
+bit 929 C 1 *
+bit 928 I 1 IO_PAD302
+bit 927 O 1 IO_PAD302 926 1 Z
+bit 926 C 1 *
+bit 925 I 1 IO_PAD301
+bit 924 O 1 IO_PAD301 923 1 Z
+bit 923 C 1 *
+bit 922 I 1 IO_PAD300
+bit 921 O 1 IO_PAD300 920 1 Z
+bit 920 C 1 *
+bit 919 I 1 IO_PAD298
+bit 918 O 1 IO_PAD298 917 1 Z
+bit 917 C 1 *
+bit 916 I 1 IO_PAD296
+bit 915 O 1 IO_PAD296 914 1 Z
+bit 914 C 1 *
+bit 913 I 1 IO_PAD294
+bit 912 O 1 IO_PAD294 911 1 Z
+bit 911 C 1 *
+bit 910 I 1 IO_PAD292
+bit 909 O 1 IO_PAD292 908 1 Z
+bit 908 C 1 *
+bit 907 I 1 IO_PAD291
+bit 906 O 1 IO_PAD291 905 1 Z
+bit 905 C 1 *
+bit 904 I 1 IO_PAD290
+bit 903 O 1 IO_PAD290 902 1 Z
+bit 902 C 1 *
+bit 901 I 1 IO_PAD288
+bit 900 O 1 IO_PAD288 899 1 Z
+bit 899 C 1 *
+bit 898 I 1 IO_PAD286
+bit 897 O 1 IO_PAD286 896 1 Z
+bit 896 C 1 *
+bit 895 I 1 IO_PAD285
+bit 894 O 1 IO_PAD285 893 1 Z
+bit 893 C 1 *
+bit 892 I 1 IO_PAD284
+bit 891 O 1 IO_PAD284 890 1 Z
+bit 890 C 1 *
+bit 889 I 1 IO_PAD283
+bit 888 O 1 IO_PAD283 887 1 Z
+bit 887 C 1 *
+bit 886 I 1 IO_PAD282
+bit 885 O 1 IO_PAD282 884 1 Z
+bit 884 C 1 *
+bit 883 I 1 IO_PAD280
+bit 882 O 1 IO_PAD280 881 1 Z
+bit 881 C 1 *
+bit 880 I 1 IO_PAD279
+bit 879 O 1 IO_PAD279 878 1 Z
+bit 878 C 1 *
+bit 877 I 1 IO_PAD278
+bit 876 O 1 IO_PAD278 875 1 Z
+bit 875 C 1 *
+bit 874 I 1 IO_PAD277
+bit 873 O 1 IO_PAD277 872 1 Z
+bit 872 C 1 *
+bit 871 I 1 IO_PAD276
+bit 870 O 1 IO_PAD276 869 1 Z
+bit 869 C 1 *
+bit 868 I 1 IO_PAD274
+bit 867 O 1 IO_PAD274 866 1 Z
+bit 866 C 1 *
+bit 865 I 1 IO_PAD273
+bit 864 O 1 IO_PAD273 863 1 Z
+bit 863 C 1 *
+bit 862 I 1 IO_PAD272
+bit 861 O 1 IO_PAD272 860 1 Z
+bit 860 C 1 *
+bit 859 O 1 *
+bit 858 O 1 *
+bit 857 O 1 *
+bit 856 O 1 *
+bit 855 O 1 *
+bit 854 O 1 *
+bit 853 I 1 IO_PAD270
+bit 852 O 1 IO_PAD270 851 1 Z
+bit 851 C 1 *
+bit 850 I 1 IO_PAD268
+bit 849 O 1 IO_PAD268 848 1 Z
+bit 848 C 1 *
+bit 847 I 1 IO_PAD267
+bit 846 O 1 IO_PAD267 845 1 Z
+bit 845 C 1 *
+bit 844 I 1 IO_PAD266
+bit 843 O 1 IO_PAD266 842 1 Z
+bit 842 C 1 *
+bit 841 I 1 IO_PAD265
+bit 840 O 1 IO_PAD265 839 1 Z
+bit 839 C 1 *
+bit 838 I 1 IO_PAD264
+bit 837 O 1 IO_PAD264 836 1 Z
+bit 836 C 1 *
+bit 835 I 1 IO_PAD262
+bit 834 O 1 IO_PAD262 833 1 Z
+bit 833 C 1 *
+bit 832 I 1 IO_PAD260
+bit 831 O 1 IO_PAD260 830 1 Z
+bit 830 C 1 *
+bit 829 I 1 IO_PAD258
+bit 828 O 1 IO_PAD258 827 1 Z
+bit 827 C 1 *
+bit 826 I 1 IO_PAD256
+bit 825 O 1 IO_PAD256 824 1 Z
+bit 824 C 1 *
+bit 823 I 1 IO_PAD255
+bit 822 O 1 IO_PAD255 821 1 Z
+bit 821 C 1 *
+bit 820 I 1 IO_PAD254
+bit 819 O 1 IO_PAD254 818 1 Z
+bit 818 C 1 *
+bit 817 O 1 *
+bit 816 O 1 *
+bit 815 O 1 *
+bit 814 O 1 *
+bit 813 O 1 *
+bit 812 O 1 *
+bit 811 I 1 IO_PAD252
+bit 810 O 1 IO_PAD252 809 1 Z
+bit 809 C 1 *
+bit 808 I 1 IO_PAD250
+bit 807 O 1 IO_PAD250 806 1 Z
+bit 806 C 1 *
+bit 805 I 1 IO_PAD249
+bit 804 O 1 IO_PAD249 803 1 Z
+bit 803 C 1 *
+bit 802 I 1 IO_PAD248
+bit 801 O 1 IO_PAD248 800 1 Z
+bit 800 C 1 *
+bit 799 I 1 IO_PAD247
+bit 798 O 1 IO_PAD247 797 1 Z
+bit 797 C 1 *
+bit 796 I 1 IO_PAD246
+bit 795 O 1 IO_PAD246 794 1 Z
+bit 794 C 1 *
+bit 793 I 1 IO_PAD245
+bit 792 O 1 IO_PAD245 791 1 Z
+bit 791 C 1 *
+bit 790 I 1 IO_PAD244
+bit 789 O 1 IO_PAD244 788 1 Z
+bit 788 C 1 *
+bit 787 O 1 *
+bit 786 O 1 *
+bit 785 O 1 *
+bit 784 O 1 *
+bit 783 O 1 *
+bit 782 O 1 *
+bit 781 I 1 IO_PAD242
+bit 780 O 1 IO_PAD242 779 1 Z
+bit 779 C 1 *
+bit 778 I 1 IO_PAD240
+bit 777 O 1 IO_PAD240 776 1 Z
+bit 776 C 1 *
+bit 775 I 1 IO_PAD239
+bit 774 O 1 IO_PAD239 773 1 Z
+bit 773 C 1 *
+bit 772 I 1 IO_PAD238
+bit 771 O 1 IO_PAD238 770 1 Z
+bit 770 C 1 *
+bit 769 I 1 IO_PAD237
+bit 768 O 1 IO_PAD237 767 1 Z
+bit 767 C 1 *
+bit 766 I 1 IO_PAD236
+bit 765 O 1 IO_PAD236 764 1 Z
+bit 764 C 1 *
+bit 763 I 1 IO_PAD234
+bit 762 O 1 IO_PAD234 761 1 Z
+bit 761 C 1 *
+bit 760 I 1 IO_PAD232
+bit 759 O 1 IO_PAD232 758 1 Z
+bit 758 C 1 *
+bit 757 I 1 IO_PAD230
+bit 756 O 1 IO_PAD230 755 1 Z
+bit 755 C 1 *
+bit 754 I 1 IO_PAD228
+bit 753 O 1 IO_PAD228 752 1 Z
+bit 752 C 1 *
+bit 751 O 1 *
+bit 750 O 1 *
+bit 749 O 1 *
+bit 748 O 1 *
+bit 747 O 1 *
+bit 746 O 1 *
+bit 745 I 1 IO_PAD227
+bit 744 O 1 IO_PAD227 743 1 Z
+bit 743 C 1 *
+bit 742 I 1 IO_PAD226
+bit 741 O 1 IO_PAD226 740 1 Z
+bit 740 C 1 *
+bit 739 I 1 IO_PAD224
+bit 738 O 1 IO_PAD224 737 1 Z
+bit 737 C 1 *
+bit 736 I 1 IO_PAD223
+bit 735 O 1 IO_PAD223 734 1 Z
+bit 734 C 1 *
+bit 733 I 1 IO_PAD222
+bit 732 O 1 IO_PAD222 731 1 Z
+bit 731 C 1 *
+bit 730 I 1 IO_PAD220
+bit 729 O 1 IO_PAD220 728 1 Z
+bit 728 C 1 *
+bit 727 I 1 IO_PAD218
+bit 726 O 1 IO_PAD218 725 1 Z
+bit 725 C 1 *
+bit 724 I 1 IO_PAD217
+bit 723 O 1 IO_PAD217 722 1 Z
+bit 722 C 1 *
+bit 721 I 1 IO_PAD215
+bit 720 O 1 IO_PAD215 719 1 Z
+bit 719 C 1 *
+bit 718 I 1 IO_PAD214
+bit 717 O 1 IO_PAD214 716 1 Z
+bit 716 C 1 *
+bit 715 I 1 IO_PAD212
+bit 714 O 1 IO_PAD212 713 1 Z
+bit 713 C 1 *
+bit 712 I 1 IO_PAD210
+bit 711 O 1 IO_PAD210 710 1 Z
+bit 710 C 1 *
+bit 709 I 1 IO_PAD209
+bit 708 O 1 IO_PAD209 707 1 Z
+bit 707 C 1 *
+bit 706 I 1 IO_PAD208
+bit 705 O 1 IO_PAD208 704 1 Z
+bit 704 C 1 *
+bit 703 I 1 IO_PAD206
+bit 702 O 1 IO_PAD206 701 1 Z
+bit 701 C 1 *
+bit 700 I 1 IO_PAD205
+bit 699 O 1 IO_PAD205 698 1 Z
+bit 698 C 1 *
+bit 697 O 1 *
+bit 696 O 1 *
+bit 695 O 1 *
+bit 694 O 1 *
+bit 693 O 1 *
+bit 692 O 1 *
+bit 691 I 1 IO_PAD204
+bit 690 O 1 IO_PAD204 689 1 Z
+bit 689 C 1 *
+bit 688 I 1 IO_PAD202
+bit 687 O 1 IO_PAD202 686 1 Z
+bit 686 C 1 *
+bit 685 I 1 IO_PAD200
+bit 684 O 1 IO_PAD200 683 1 Z
+bit 683 C 1 *
+bit 682 I 1 IO_PAD198
+bit 681 O 1 IO_PAD198 680 1 Z
+bit 680 C 1 *
+bit 679 I 1 IO_PAD196
+bit 678 O 1 IO_PAD196 677 1 Z
+bit 677 C 1 *
+bit 676 I 1 IO_PAD195
+bit 675 O 1 IO_PAD195 674 1 Z
+bit 674 C 1 *
+bit 673 I 1 IO_PAD194
+bit 672 O 1 IO_PAD194 671 1 Z
+bit 671 C 1 *
+bit 670 I 1 IO_PAD193
+bit 669 O 1 IO_PAD193 668 1 Z
+bit 668 C 1 *
+bit 667 I 1 IO_PAD192
+bit 666 O 1 IO_PAD192 665 1 Z
+bit 665 C 1 *
+bit 664 I 1 IO_PAD190
+bit 663 O 1 IO_PAD190 662 1 Z
+bit 662 C 1 *
+bit 661 O 1 *
+bit 660 O 1 *
+bit 659 O 1 *
+bit 658 O 1 *
+bit 657 O 1 *
+bit 656 O 1 *
+bit 655 I 1 IO_PAD188
+bit 654 O 1 IO_PAD188 653 1 Z
+bit 653 C 1 *
+bit 652 I 1 IO_PAD187
+bit 651 O 1 IO_PAD187 650 1 Z
+bit 650 C 1 *
+bit 649 I 1 IO_PAD186
+bit 648 O 1 IO_PAD186 647 1 Z
+bit 647 C 1 *
+bit 646 I 1 IO_PAD185
+bit 645 O 1 IO_PAD185 644 1 Z
+bit 644 C 1 *
+bit 643 I 1 IO_PAD184
+bit 642 O 1 IO_PAD184 641 1 Z
+bit 641 C 1 *
+bit 640 I 1 IO_PAD183
+bit 639 O 1 IO_PAD183 638 1 Z
+bit 638 C 1 *
+bit 637 I 1 IO_PAD182
+bit 636 O 1 IO_PAD182 635 1 Z
+bit 635 C 1 *
+bit 634 I 1 IO_PAD180
+bit 633 O 1 IO_PAD180 632 1 Z
+bit 632 C 1 *
+bit 631 O 1 *
+bit 630 O 1 *
+bit 629 O 1 *
+bit 628 O 1 *
+bit 627 O 1 *
+bit 626 O 1 *
+bit 625 I 1 IO_PAD178
+bit 624 O 1 IO_PAD178 623 1 Z
+bit 623 C 1 *
+bit 622 I 1 IO_PAD177
+bit 621 O 1 IO_PAD177 620 1 Z
+bit 620 C 1 *
+bit 619 I 1 IO_PAD176
+bit 618 O 1 IO_PAD176 617 1 Z
+bit 617 C 1 *
+bit 616 I 1 IO_PAD174
+bit 615 O 1 IO_PAD174 614 1 Z
+bit 614 C 1 *
+bit 613 I 1 IO_PAD172
+bit 612 O 1 IO_PAD172 611 1 Z
+bit 611 C 1 *
+bit 610 I 1 IO_PAD170
+bit 609 O 1 IO_PAD170 608 1 Z
+bit 608 C 1 *
+bit 607 I 1 IO_PAD168
+bit 606 O 1 IO_PAD168 605 1 Z
+bit 605 C 1 *
+bit 604 I 1 IO_PAD167
+bit 603 O 1 IO_PAD167 602 1 Z
+bit 602 C 1 *
+bit 601 I 1 IO_PAD166
+bit 600 O 1 IO_PAD166 599 1 Z
+bit 599 C 1 *
+bit 598 I 1 IO_PAD165
+bit 597 O 1 IO_PAD165 596 1 Z
+bit 596 C 1 *
+bit 595 I 1 IO_PAD164
+bit 594 O 1 IO_PAD164 593 1 Z
+bit 593 C 1 *
+bit 592 I 1 IO_PAD162
+bit 591 O 1 IO_PAD162 590 1 Z
+bit 590 C 1 *
+bit 589 O 1 *
+bit 588 O 1 *
+bit 587 O 1 *
+bit 586 O 1 *
+bit 585 O 1 *
+bit 584 O 1 *
+bit 583 I 1 IO_PAD160
+bit 582 O 1 IO_PAD160 581 1 Z
+bit 581 C 1 *
+bit 580 I 1 IO_PAD159
+bit 579 O 1 IO_PAD159 578 1 Z
+bit 578 C 1 *
+bit 577 I 1 IO_PAD158
+bit 576 O 1 IO_PAD158 575 1 Z
+bit 575 C 1 *
+bit 574 I 1 IO_PAD156
+bit 573 O 1 IO_PAD156 572 1 Z
+bit 572 C 1 *
+bit 571 I 1 IO_PAD155
+bit 570 O 1 IO_PAD155 569 1 Z
+bit 569 C 1 *
+bit 568 I 1 IO_PAD154
+bit 567 O 1 IO_PAD154 566 1 Z
+bit 566 C 1 *
+bit 565 I 1 IO_PAD153
+bit 564 O 1 IO_PAD153 563 1 Z
+bit 563 C 1 *
+bit 562 I 1 IO_PAD152
+bit 561 O 1 IO_PAD152 560 1 Z
+bit 560 C 1 *
+bit 559 I 1 IO_PAD150
+bit 558 O 1 IO_PAD150 557 1 Z
+bit 557 C 1 *
+bit 556 I 1 IO_PAD149
+bit 555 O 1 IO_PAD149 554 1 Z
+bit 554 C 1 *
+bit 553 I 1 IO_PAD148
+bit 552 O 1 IO_PAD148 551 1 Z
+bit 551 C 1 *
+bit 550 I 1 IO_PAD147
+bit 549 O 1 IO_PAD147 548 1 Z
+bit 548 C 1 *
+bit 547 I 1 IO_PAD146
+bit 546 O 1 IO_PAD146 545 1 Z
+bit 545 C 1 *
+bit 544 I 1 IO_PAD144
+bit 543 O 1 IO_PAD144 542 1 Z
+bit 542 C 1 *
+bit 541 I 1 IO_PAD142
+bit 540 O 1 IO_PAD142 539 1 Z
+bit 539 C 1 *
+bit 538 I 1 IO_PAD141
+bit 537 O 1 IO_PAD141 536 1 Z
+bit 536 C 1 *
+bit 535 I 1 IO_PAD140
+bit 534 O 1 IO_PAD140 533 1 Z
+bit 533 C 1 *
+bit 532 I 1 IO_PAD138
+bit 531 O 1 IO_PAD138 530 1 Z
+bit 530 C 1 *
+bit 529 I 1 IO_PAD136
+bit 528 O 1 IO_PAD136 527 1 Z
+bit 527 C 1 *
+bit 526 I 1 IO_PAD134
+bit 525 O 1 IO_PAD134 524 1 Z
+bit 524 C 1 *
+bit 523 I 1 IO_PAD132
+bit 522 O 1 IO_PAD132 521 1 Z
+bit 521 C 1 *
+bit 520 I 1 IO_PAD131
+bit 519 O 1 IO_PAD131 518 1 Z
+bit 518 C 1 *
+bit 517 I 1 IO_PAD130
+bit 516 O 1 IO_PAD130 515 1 Z
+bit 515 C 1 *
+bit 514 I 1 IO_PAD129
+bit 513 O 1 IO_PAD129 512 1 Z
+bit 512 C 1 *
+bit 511 I 1 IO_PAD128
+bit 510 O 1 IO_PAD128 509 1 Z
+bit 509 C 1 *
+bit 508 I 1 IO_PAD126
+bit 507 O 1 IO_PAD126 506 1 Z
+bit 506 C 1 *
+bit 505 I 1 IO_PAD124
+bit 504 O 1 IO_PAD124 503 1 Z
+bit 503 C 1 *
+bit 502 I 1 IO_PAD123
+bit 501 O 1 IO_PAD123 500 1 Z
+bit 500 C 1 *
+bit 499 I 1 IO_PAD122
+bit 498 O 1 IO_PAD122 497 1 Z
+bit 497 C 1 *
+bit 496 I 1 IO_PAD121
+bit 495 O 1 IO_PAD121 494 1 Z
+bit 494 C 1 *
+bit 493 I 1 IO_PAD120
+bit 492 O 1 IO_PAD120 491 1 Z
+bit 491 C 1 *
+bit 490 I 1 IO_PAD118
+bit 489 O 1 IO_PAD118 488 1 Z
+bit 488 C 1 *
+bit 487 I 1 IO_PAD117
+bit 486 O 1 IO_PAD117 485 1 Z
+bit 485 C 1 *
+bit 484 I 1 IO_PAD116
+bit 483 O 1 IO_PAD116 482 1 Z
+bit 482 C 1 *
+bit 481 O 1 *
+bit 480 I 1 HSWAP_EN_PAD112
+bit 479 I 1 IO_PAD111
+bit 478 O 1 IO_PAD111 477 1 Z
+bit 477 C 1 *
+bit 476 I 1 IO_PAD110
+bit 475 O 1 IO_PAD110 474 1 Z
+bit 474 C 1 *
+bit 473 I 1 IO_PAD109
+bit 472 O 1 IO_PAD109 471 1 Z
+bit 471 C 1 *
+bit 470 I 1 IO_PAD108
+bit 469 O 1 IO_PAD108 468 1 Z
+bit 468 C 1 *
+bit 467 I 1 IO_PAD106
+bit 466 O 1 IO_PAD106 465 1 Z
+bit 465 C 1 *
+bit 464 I 1 IO_PAD105
+bit 463 O 1 IO_PAD105 462 1 Z
+bit 462 C 1 *
+bit 461 I 1 IO_PAD104
+bit 460 O 1 IO_PAD104 459 1 Z
+bit 459 C 1 *
+bit 458 I 1 IO_PAD102
+bit 457 O 1 IO_PAD102 456 1 Z
+bit 456 C 1 *
+bit 455 I 1 IO_PAD101
+bit 454 O 1 IO_PAD101 453 1 Z
+bit 453 C 1 *
+bit 452 I 1 IO_PAD100
+bit 451 O 1 IO_PAD100 450 1 Z
+bit 450 C 1 *
+bit 449 I 1 IO_PAD98
+bit 448 O 1 IO_PAD98 447 1 Z
+bit 447 C 1 *
+bit 446 I 1 IO_PAD97
+bit 445 O 1 IO_PAD97 444 1 Z
+bit 444 C 1 *
+bit 443 I 1 IO_PAD96
+bit 442 O 1 IO_PAD96 441 1 Z
+bit 441 C 1 *
+bit 440 I 1 IO_PAD95
+bit 439 O 1 IO_PAD95 438 1 Z
+bit 438 C 1 *
+bit 437 I 1 IO_PAD94
+bit 436 O 1 IO_PAD94 435 1 Z
+bit 435 C 1 *
+bit 434 I 1 IO_PAD92
+bit 433 O 1 IO_PAD92 432 1 Z
+bit 432 C 1 *
+bit 431 I 1 IO_PAD90
+bit 430 O 1 IO_PAD90 429 1 Z
+bit 429 C 1 *
+bit 428 I 1 IO_PAD89
+bit 427 O 1 IO_PAD89 426 1 Z
+bit 426 C 1 *
+bit 425 I 1 IO_PAD88
+bit 424 O 1 IO_PAD88 423 1 Z
+bit 423 C 1 *
+bit 422 I 1 IO_PAD87
+bit 421 O 1 IO_PAD87 420 1 Z
+bit 420 C 1 *
+bit 419 I 1 IO_PAD86
+bit 418 O 1 IO_PAD86 417 1 Z
+bit 417 C 1 *
+bit 416 I 1 IO_PAD84
+bit 415 O 1 IO_PAD84 414 1 Z
+bit 414 C 1 *
+bit 413 I 1 IO_PAD82
+bit 412 O 1 IO_PAD82 411 1 Z
+bit 411 C 1 *
+bit 410 I 1 IO_PAD80
+bit 409 O 1 IO_PAD80 408 1 Z
+bit 408 C 1 *
+bit 407 I 1 IO_PAD78
+bit 406 O 1 IO_PAD78 405 1 Z
+bit 405 C 1 *
+bit 404 I 1 IO_PAD77
+bit 403 O 1 IO_PAD77 402 1 Z
+bit 402 C 1 *
+bit 401 I 1 IO_PAD76
+bit 400 O 1 IO_PAD76 399 1 Z
+bit 399 C 1 *
+bit 398 I 1 IO_PAD74
+bit 397 O 1 IO_PAD74 396 1 Z
+bit 396 C 1 *
+bit 395 I 1 IO_PAD73
+bit 394 O 1 IO_PAD73 393 1 Z
+bit 393 C 1 *
+bit 392 I 1 IO_PAD72
+bit 391 O 1 IO_PAD72 390 1 Z
+bit 390 C 1 *
+bit 389 I 1 IO_PAD70
+bit 388 O 1 IO_PAD70 387 1 Z
+bit 387 C 1 *
+bit 386 I 1 IO_PAD69
+bit 385 O 1 IO_PAD69 384 1 Z
+bit 384 C 1 *
+bit 383 I 1 IO_PAD68
+bit 382 O 1 IO_PAD68 381 1 Z
+bit 381 C 1 *
+bit 380 I 1 IO_PAD67
+bit 379 O 1 IO_PAD67 378 1 Z
+bit 378 C 1 *
+bit 377 I 1 IO_PAD66
+bit 376 O 1 IO_PAD66 375 1 Z
+bit 375 C 1 *
+bit 374 I 1 IO_PAD64
+bit 373 O 1 IO_PAD64 372 1 Z
+bit 372 C 1 *
+bit 371 I 1 IO_PAD63
+bit 370 O 1 IO_PAD63 369 1 Z
+bit 369 C 1 *
+bit 368 I 1 IO_PAD62
+bit 367 O 1 IO_PAD62 366 1 Z
+bit 366 C 1 *
+bit 365 I 1 IO_PAD60
+bit 364 O 1 IO_PAD60 363 1 Z
+bit 363 C 1 *
+bit 362 I 1 IO_PAD58
+bit 361 O 1 IO_PAD58 360 1 Z
+bit 360 C 1 *
+bit 359 I 1 IO_PAD57
+bit 358 O 1 IO_PAD57 357 1 Z
+bit 357 C 1 *
+bit 356 I 1 IO_PAD56
+bit 355 O 1 IO_PAD56 354 1 Z
+bit 354 C 1 *
+bit 353 I 1 IO_PAD55
+bit 352 O 1 IO_PAD55 351 1 Z
+bit 351 C 1 *
+bit 350 I 1 IO_PAD54
+bit 349 O 1 IO_PAD54 348 1 Z
+bit 348 C 1 *
+bit 347 I 1 IO_PAD52
+bit 346 O 1 IO_PAD52 345 1 Z
+bit 345 C 1 *
+bit 344 I 1 IO_PAD50
+bit 343 O 1 IO_PAD50 342 1 Z
+bit 342 C 1 *
+bit 341 I 1 IO_PAD48
+bit 340 O 1 IO_PAD48 339 1 Z
+bit 339 C 1 *
+bit 338 I 1 IO_PAD46
+bit 337 O 1 IO_PAD46 336 1 Z
+bit 336 C 1 *
+bit 335 I 1 IO_PAD45
+bit 334 O 1 IO_PAD45 333 1 Z
+bit 333 C 1 *
+bit 332 I 1 IO_PAD44
+bit 331 O 1 IO_PAD44 330 1 Z
+bit 330 C 1 *
+bit 329 I 1 IO_PAD42
+bit 328 O 1 IO_PAD42 327 1 Z
+bit 327 C 1 *
+bit 326 I 1 IO_PAD41
+bit 325 O 1 IO_PAD41 324 1 Z
+bit 324 C 1 *
+bit 323 I 1 IO_PAD40
+bit 322 O 1 IO_PAD40 321 1 Z
+bit 321 C 1 *
+bit 320 I 1 IO_PAD38
+bit 319 O 1 IO_PAD38 318 1 Z
+bit 318 C 1 *
+bit 317 I 1 IO_PAD36
+bit 316 O 1 IO_PAD36 315 1 Z
+bit 315 C 1 *
+bit 314 I 1 IO_PAD35
+bit 313 O 1 IO_PAD35 312 1 Z
+bit 312 C 1 *
+bit 311 I 1 IO_PAD34
+bit 310 O 1 IO_PAD34 309 1 Z
+bit 309 C 1 *
+bit 308 I 1 IO_PAD33
+bit 307 O 1 IO_PAD33 306 1 Z
+bit 306 C 1 *
+bit 305 I 1 IO_PAD32
+bit 304 O 1 IO_PAD32 303 1 Z
+bit 303 C 1 *
+bit 302 I 1 IO_PAD31
+bit 301 O 1 IO_PAD31 300 1 Z
+bit 300 C 1 *
+bit 299 I 1 IO_PAD30
+bit 298 O 1 IO_PAD30 297 1 Z
+bit 297 C 1 *
+bit 296 I 1 IO_PAD28
+bit 295 O 1 IO_PAD28 294 1 Z
+bit 294 C 1 *
+bit 293 I 1 IO_PAD26
+bit 292 O 1 IO_PAD26 291 1 Z
+bit 291 C 1 *
+bit 290 I 1 IO_PAD25
+bit 289 O 1 IO_PAD25 288 1 Z
+bit 288 C 1 *
+bit 287 I 1 IO_PAD24
+bit 286 O 1 IO_PAD24 285 1 Z
+bit 285 C 1 *
+bit 284 I 1 IO_PAD23
+bit 283 O 1 IO_PAD23 282 1 Z
+bit 282 C 1 *
+bit 281 I 1 IO_PAD22
+bit 280 O 1 IO_PAD22 279 1 Z
+bit 279 C 1 *
+bit 278 I 1 IO_PAD20
+bit 277 O 1 IO_PAD20 276 1 Z
+bit 276 C 1 *
+bit 275 I 1 IO_PAD18
+bit 274 O 1 IO_PAD18 273 1 Z
+bit 273 C 1 *
+bit 272 I 1 IO_PAD16
+bit 271 O 1 IO_PAD16 270 1 Z
+bit 270 C 1 *
+bit 269 I 1 IO_PAD14
+bit 268 O 1 IO_PAD14 267 1 Z
+bit 267 C 1 *
+bit 266 I 1 IO_PAD13
+bit 265 O 1 IO_PAD13 264 1 Z
+bit 264 C 1 *
+bit 263 I 1 IO_PAD12
+bit 262 O 1 IO_PAD12 261 1 Z
+bit 261 C 1 *
+bit 260 I 1 IO_PAD10
+bit 259 O 1 IO_PAD10 258 1 Z
+bit 258 C 1 *
+bit 257 I 1 IO_PAD9
+bit 256 O 1 IO_PAD9 255 1 Z
+bit 255 C 1 *
+bit 254 I 1 IO_PAD8
+bit 253 O 1 IO_PAD8 252 1 Z
+bit 252 C 1 *
+bit 251 I 1 IO_PAD6
+bit 250 O 1 IO_PAD6 249 1 Z
+bit 249 C 1 *
+bit 248 I 1 IO_PAD4
+bit 247 O 1 IO_PAD4 246 1 Z
+bit 246 C 1 *
+bit 245 I 1 IO_PAD3
+bit 244 O 1 IO_PAD3 243 1 Z
+bit 243 C 1 *
+bit 242 I 1 IO_PAD2
+bit 241 O 1 IO_PAD2 240 1 Z
+bit 240 C 1 *
+bit 239 I 1 IO_PAD861
+bit 238 O 1 IO_PAD861 237 1 Z
+bit 237 C 1 *
+bit 236 I 1 IO_PAD860
+bit 235 O 1 IO_PAD860 234 1 Z
+bit 234 C 1 *
+bit 233 I 1 IO_PAD859
+bit 232 O 1 IO_PAD859 231 1 Z
+bit 231 C 1 *
+bit 230 I 1 IO_PAD857
+bit 229 O 1 IO_PAD857 228 1 Z
+bit 228 C 1 *
+bit 227 I 1 IO_PAD855
+bit 226 O 1 IO_PAD855 225 1 Z
+bit 225 C 1 *
+bit 224 I 1 IO_PAD854
+bit 223 O 1 IO_PAD854 222 1 Z
+bit 222 C 1 *
+bit 221 I 1 IO_PAD853
+bit 220 O 1 IO_PAD853 219 1 Z
+bit 219 C 1 *
+bit 218 I 1 IO_PAD851
+bit 217 O 1 IO_PAD851 216 1 Z
+bit 216 C 1 *
+bit 215 I 1 IO_PAD850
+bit 214 O 1 IO_PAD850 213 1 Z
+bit 213 C 1 *
+bit 212 I 1 IO_PAD849
+bit 211 O 1 IO_PAD849 210 1 Z
+bit 210 C 1 *
+bit 209 I 1 IO_PAD847
+bit 208 O 1 IO_PAD847 207 1 Z
+bit 207 C 1 *
+bit 206 I 1 IO_PAD845
+bit 205 O 1 IO_PAD845 204 1 Z
+bit 204 C 1 *
+bit 203 I 1 IO_PAD843
+bit 202 O 1 IO_PAD843 201 1 Z
+bit 201 C 1 *
+bit 200 I 1 IO_PAD841
+bit 199 O 1 IO_PAD841 198 1 Z
+bit 198 C 1 *
+bit 197 I 1 IO_PAD840
+bit 196 O 1 IO_PAD840 195 1 Z
+bit 195 C 1 *
+bit 194 I 1 IO_PAD839
+bit 193 O 1 IO_PAD839 192 1 Z
+bit 192 C 1 *
+bit 191 I 1 IO_PAD838
+bit 190 O 1 IO_PAD838 189 1 Z
+bit 189 C 1 *
+bit 188 I 1 IO_PAD837
+bit 187 O 1 IO_PAD837 186 1 Z
+bit 186 C 1 *
+bit 185 I 1 IO_PAD835
+bit 184 O 1 IO_PAD835 183 1 Z
+bit 183 C 1 *
+bit 182 I 1 IO_PAD833
+bit 181 O 1 IO_PAD833 180 1 Z
+bit 180 C 1 *
+bit 179 I 1 IO_PAD832
+bit 178 O 1 IO_PAD832 177 1 Z
+bit 177 C 1 *
+bit 176 I 1 IO_PAD831
+bit 175 O 1 IO_PAD831 174 1 Z
+bit 174 C 1 *
+bit 173 I 1 IO_PAD830
+bit 172 O 1 IO_PAD830 171 1 Z
+bit 171 C 1 *
+bit 170 I 1 IO_PAD829
+bit 169 O 1 IO_PAD829 168 1 Z
+bit 168 C 1 *
+bit 167 I 1 IO_PAD828
+bit 166 O 1 IO_PAD828 165 1 Z
+bit 165 C 1 *
+bit 164 I 1 IO_PAD827
+bit 163 O 1 IO_PAD827 162 1 Z
+bit 162 C 1 *
+bit 161 I 1 IO_PAD825
+bit 160 O 1 IO_PAD825 159 1 Z
+bit 159 C 1 *
+bit 158 I 1 IO_PAD823
+bit 157 O 1 IO_PAD823 156 1 Z
+bit 156 C 1 *
+bit 155 I 1 IO_PAD822
+bit 154 O 1 IO_PAD822 153 1 Z
+bit 153 C 1 *
+bit 152 I 1 IO_PAD821
+bit 151 O 1 IO_PAD821 150 1 Z
+bit 150 C 1 *
+bit 149 I 1 IO_PAD819
+bit 148 O 1 IO_PAD819 147 1 Z
+bit 147 C 1 *
+bit 146 I 1 IO_PAD818
+bit 145 O 1 IO_PAD818 144 1 Z
+bit 144 C 1 *
+bit 143 I 1 IO_PAD817
+bit 142 O 1 IO_PAD817 141 1 Z
+bit 141 C 1 *
+bit 140 I 1 IO_PAD815
+bit 139 O 1 IO_PAD815 138 1 Z
+bit 138 C 1 *
+bit 137 I 1 IO_PAD813
+bit 136 O 1 IO_PAD813 135 1 Z
+bit 135 C 1 *
+bit 134 I 1 IO_PAD811
+bit 133 O 1 IO_PAD811 132 1 Z
+bit 132 C 1 *
+bit 131 I 1 IO_PAD809
+bit 130 O 1 IO_PAD809 129 1 Z
+bit 129 C 1 *
+bit 128 I 1 IO_PAD808
+bit 127 O 1 IO_PAD808 126 1 Z
+bit 126 C 1 *
+bit 125 I 1 IO_PAD807
+bit 124 O 1 IO_PAD807 123 1 Z
+bit 123 C 1 *
+bit 122 I 1 IO_PAD806
+bit 121 O 1 IO_PAD806 120 1 Z
+bit 120 C 1 *
+bit 119 I 1 IO_PAD805
+bit 118 O 1 IO_PAD805 117 1 Z
+bit 117 C 1 *
+bit 116 I 1 IO_PAD803
+bit 115 O 1 IO_PAD803 114 1 Z
+bit 114 C 1 *
+bit 113 I 1 IO_PAD801
+bit 112 O 1 IO_PAD801 111 1 Z
+bit 111 C 1 *
+bit 110 I 1 IO_PAD800
+bit 109 O 1 IO_PAD800 108 1 Z
+bit 108 C 1 *
+bit 107 I 1 IO_PAD799
+bit 106 O 1 IO_PAD799 105 1 Z
+bit 105 C 1 *
+bit 104 I 1 IO_PAD797
+bit 103 O 1 IO_PAD797 102 1 Z
+bit 102 C 1 *
+bit 101 I 1 IO_PAD796
+bit 100 O 1 IO_PAD796 99 1 Z
+bit 99 C 1 *
+bit 98 I 1 IO_PAD795
+bit 97 O 1 IO_PAD795 96 1 Z
+bit 96 C 1 *
+bit 95 I 1 IO_PAD794
+bit 94 O 1 IO_PAD794 93 1 Z
+bit 93 C 1 *
+bit 92 I 1 IO_PAD793
+bit 91 O 1 IO_PAD793 90 1 Z
+bit 90 C 1 *
+bit 89 I 1 IO_PAD791
+bit 88 O 1 IO_PAD791 87 1 Z
+bit 87 C 1 *
+bit 86 I 1 IO_PAD790
+bit 85 O 1 IO_PAD790 84 1 Z
+bit 84 C 1 *
+bit 83 I 1 IO_PAD789
+bit 82 O 1 IO_PAD789 81 1 Z
+bit 81 C 1 *
+bit 80 I 1 IO_PAD787
+bit 79 O 1 IO_PAD787 78 1 Z
+bit 78 C 1 *
+bit 77 I 1 IO_PAD786
+bit 76 O 1 IO_PAD786 75 1 Z
+bit 75 C 1 *
+bit 74 I 1 IO_PAD785
+bit 73 O 1 IO_PAD785 72 1 Z
+bit 72 C 1 *
+bit 71 I 1 IO_PAD783
+bit 70 O 1 IO_PAD783 69 1 Z
+bit 69 C 1 *
+bit 68 I 1 IO_PAD781
+bit 67 O 1 IO_PAD781 66 1 Z
+bit 66 C 1 *
+bit 65 I 1 IO_PAD779
+bit 64 O 1 IO_PAD779 63 1 Z
+bit 63 C 1 *
+bit 62 I 1 IO_PAD777
+bit 61 O 1 IO_PAD777 60 1 Z
+bit 60 C 1 *
+bit 59 I 1 IO_PAD776
+bit 58 O 1 IO_PAD776 57 1 Z
+bit 57 C 1 *
+bit 56 I 1 IO_PAD775
+bit 55 O 1 IO_PAD775 54 1 Z
+bit 54 C 1 *
+bit 53 I 1 IO_PAD774
+bit 52 O 1 IO_PAD774 51 1 Z
+bit 51 C 1 *
+bit 50 I 1 IO_PAD773
+bit 49 O 1 IO_PAD773 48 1 Z
+bit 48 C 1 *
+bit 47 I 1 IO_PAD771
+bit 46 O 1 IO_PAD771 45 1 Z
+bit 45 C 1 *
+bit 44 I 1 IO_PAD769
+bit 43 O 1 IO_PAD769 42 1 Z
+bit 42 C 1 *
+bit 41 I 1 IO_PAD768
+bit 40 O 1 IO_PAD768 39 1 Z
+bit 39 C 1 *
+bit 38 I 1 IO_PAD767
+bit 37 O 1 IO_PAD767 36 1 Z
+bit 36 C 1 *
+bit 35 I 1 IO_PAD766
+bit 34 O 1 IO_PAD766 33 1 Z
+bit 33 C 1 *
+bit 32 I 1 IO_PAD765
+bit 31 O 1 IO_PAD765 30 1 Z
+bit 30 C 1 *
+bit 29 I 1 IO_PAD763
+bit 28 O 1 IO_PAD763 27 1 Z
+bit 27 C 1 *
+bit 26 I 1 IO_PAD762
+bit 25 O 1 IO_PAD762 24 1 Z
+bit 24 C 1 *
+bit 23 I 1 IO_PAD761
+bit 22 O 1 IO_PAD761 21 1 Z
+bit 21 C 1 *
+bit 20 I 1 IO_PAD759
+bit 19 O 1 IO_PAD759 18 1 Z
+bit 18 C 1 *
+bit 17 I 1 IO_PAD758
+bit 16 O 1 IO_PAD758 15 1 Z
+bit 15 C 1 *
+bit 14 I 1 IO_PAD757
+bit 13 O 1 IO_PAD757 12 1 Z
+bit 12 C 1 *
+bit 11 I 1 IO_PAD755
+bit 10 O 1 IO_PAD755 9 1 Z
+bit 9 C 1 *
+bit 8 I 1 IO_PAD754
+bit 7 O 1 IO_PAD754 6 1 Z
+bit 6 C 1 *
+bit 5 I 1 IO_PAD753
+bit 4 O 1 IO_PAD753 3 1 Z
+bit 3 C 1 *
+bit 2 I 1 IO_PAD752
+bit 1 O 1 IO_PAD752 0 1 Z
+bit 0 C 1 *
--- /dev/null
+signal GND1
+signal GND2
+signal GND3
+signal GND4
+signal GND5
+signal GND6
+signal GND7
+signal GND8
+signal GND9
+signal GND10
+signal GND11
+signal GND12
+signal GND13
+signal GND14
+signal GND15
+signal GND16
+signal GND17
+signal GND18
+signal GND19
+signal GND20
+signal GND21
+signal GND22
+signal GND23
+signal GND24
+signal GND25
+signal GND26
+signal GND27
+signal GND28
+signal GND29
+signal GND30
+signal GND31
+signal GND32
+signal GND33
+signal GND34
+signal GND35
+signal GND36
+signal GND37
+signal GND38
+signal GND39
+signal GND40
+signal GND41
+signal GND42
+signal GND43
+signal GND44
+signal GND45
+signal GND46
+signal GND47
+signal GND48
+signal GND49
+signal GND50
+signal GND51
+signal GND52
+signal GND53
+signal GND54
+signal GND55
+signal GND56
+signal GND57
+signal GND58
+signal GND59
+signal GND60
+signal GND61
+signal GND62
+signal GND63
+signal GND64
+signal GND65
+signal GND66
+signal GND67
+signal GND68
+signal GND69
+signal GND70
+signal GND71
+signal GND72
+signal GND73
+signal GND74
+signal GND75
+signal GND76
+signal CCLK_AD26
+signal DONE_AC24
+signal HSWAP_EN_C2
+signal M0_AE3
+signal M1_AC3
+signal M2_AF3
+signal PROG_B
+signal TCK
+signal TDI
+signal TDO
+signal TMS
+signal VCCAUX1
+signal VCCAUX2
+signal VCCAUX3
+signal VCCAUX4
+signal VCCAUX5
+signal VCCAUX6
+signal VCCAUX7
+signal VCCAUX8
+signal VCCAUX9
+signal VCCAUX10
+signal VCCAUX11
+signal VCCAUX12
+signal VCCAUX13
+signal VCCAUX14
+signal VCCAUX15
+signal VCCAUX16
+signal VCCINT1
+signal VCCINT2
+signal VCCINT3
+signal VCCINT4
+signal VCCINT5
+signal VCCINT6
+signal VCCINT7
+signal VCCINT8
+signal VCCINT9
+signal VCCINT10
+signal VCCINT11
+signal VCCINT12
+signal VCCINT13
+signal VCCINT14
+signal VCCINT15
+signal VCCINT16
+signal VCCINT17
+signal VCCINT18
+signal VCCINT19
+signal VCCINT20
+signal VCCO01
+signal VCCO02
+signal VCCO03
+signal VCCO04
+signal VCCO05
+signal VCCO06
+signal VCCO07
+signal VCCO08
+signal VCCO11
+signal VCCO12
+signal VCCO13
+signal VCCO14
+signal VCCO15
+signal VCCO16
+signal VCCO17
+signal VCCO18
+signal VCCO21
+signal VCCO22
+signal VCCO23
+signal VCCO24
+signal VCCO25
+signal VCCO26
+signal VCCO27
+signal VCCO28
+signal VCCO31
+signal VCCO32
+signal VCCO33
+signal VCCO34
+signal VCCO35
+signal VCCO36
+signal VCCO37
+signal VCCO38
+signal VCCO41
+signal VCCO42
+signal VCCO43
+signal VCCO44
+signal VCCO45
+signal VCCO46
+signal VCCO47
+signal VCCO48
+signal VCCO51
+signal VCCO52
+signal VCCO53
+signal VCCO54
+signal VCCO55
+signal VCCO56
+signal VCCO57
+signal VCCO58
+signal VCCO61
+signal VCCO62
+signal VCCO63
+signal VCCO64
+signal VCCO65
+signal VCCO66
+signal VCCO67
+signal VCCO68
+signal VCCO71
+signal VCCO72
+signal VCCO73
+signal VCCO74
+signal VCCO75
+signal VCCO76
+signal VCCO77
+signal VCCO78
+signal IO_A3
+signal IO_A4
+signal IO_A5
+signal IO_A6
+signal IO_A7
+signal IO_A8
+signal IO_A10
+signal IO_A11
+signal IO_A12
+signal IO_A13
+signal IO_A14
+signal IO_A15
+signal IO_A16
+signal IO_A17
+signal IO_A19
+signal IO_A20
+signal IO_A21
+signal IO_A22
+signal IO_A23
+signal IO_B3
+signal IO_B4
+signal IO_B5
+signal IO_B6
+signal IO_B7
+signal IO_B8
+signal IO_B9
+signal IO_B10
+signal IO_B11
+signal IO_B12
+signal IO_B13
+signal IO_B14
+signal IO_B15
+signal IO_B16
+signal IO_B17
+signal IO_B18
+signal IO_B19
+signal IO_B20
+signal IO_B21
+signal IO_B22
+signal IO_B23
+signal IO_C4
+signal IO_C5
+signal IO_C6
+signal IO_C8
+signal IO_C9
+signal IO_C10
+signal IO_C12
+signal IO_C13
+signal IO_C14
+signal IO_C15
+signal IO_C17
+signal IO_C18
+signal IO_C19
+signal IO_C21
+signal IO_C22
+signal IO_C23
+signal IO_C25
+signal IO_C26
+signal IO_D1
+signal IO_D2
+signal IO_D5
+signal IO_D6
+signal IO_D7
+signal IO_D8
+signal IO_D9
+signal IO_D10
+signal IO_D11
+signal IO_D13
+signal IO_D14
+signal IO_D16
+signal IO_D17
+signal IO_D18
+signal IO_D19
+signal IO_D20
+signal IO_D21
+signal IO_D22
+signal IO_D25
+signal IO_D26
+signal IO_E1
+signal IO_E2
+signal IO_E3
+signal IO_E4
+signal IO_E5
+signal IO_E6
+signal IO_E7
+signal IO_E8
+signal IO_E9
+signal IO_E10
+signal IO_E11
+signal IO_E12
+signal IO_E13
+signal IO_E14
+signal IO_E15
+signal IO_E16
+signal IO_E17
+signal IO_E18
+signal IO_E19
+signal IO_E20
+signal IO_E21
+signal IO_E22
+signal IO_E23
+signal IO_E24
+signal IO_E25
+signal IO_E26
+signal IO_F1
+signal IO_F2
+signal IO_F3
+signal IO_F4
+signal IO_F5
+signal IO_F6
+signal IO_F7
+signal IO_F8
+signal IO_F9
+signal IO_F10
+signal IO_F11
+signal IO_F12
+signal IO_F13
+signal IO_F14
+signal IO_F15
+signal IO_F16
+signal IO_F17
+signal IO_F18
+signal IO_F19
+signal IO_F20
+signal IO_F21
+signal IO_F22
+signal IO_F23
+signal IO_F24
+signal IO_F25
+signal IO_F26
+signal IO_G1
+signal IO_G2
+signal IO_G4
+signal IO_G5
+signal IO_G6
+signal IO_G7
+signal IO_G8
+signal IO_G9
+signal IO_G10
+signal IO_G11
+signal IO_G12
+signal IO_G13
+signal IO_G14
+signal IO_G15
+signal IO_G16
+signal IO_G17
+signal IO_G18
+signal IO_G19
+signal IO_G20
+signal IO_G21
+signal IO_G22
+signal IO_G23
+signal IO_G25
+signal IO_G26
+signal IO_H1
+signal IO_H2
+signal IO_H3
+signal IO_H4
+signal IO_H5
+signal IO_H6
+signal IO_H7
+signal IO_H11
+signal IO_H12
+signal IO_H13
+signal IO_H14
+signal IO_H15
+signal IO_H16
+signal IO_H20
+signal IO_H21
+signal IO_H22
+signal IO_H23
+signal IO_H24
+signal IO_H25
+signal IO_H26
+signal IO_J2
+signal IO_J3
+signal IO_J4
+signal IO_J5
+signal IO_J6
+signal IO_J7
+signal IO_J20
+signal IO_J21
+signal IO_J22
+signal IO_J23
+signal IO_J24
+signal IO_J25
+signal IO_K1
+signal IO_K2
+signal IO_K3
+signal IO_K4
+signal IO_K5
+signal IO_K6
+signal IO_K7
+signal IO_K20
+signal IO_K21
+signal IO_K22
+signal IO_K23
+signal IO_K24
+signal IO_K25
+signal IO_K26
+signal IO_L1
+signal IO_L2
+signal IO_L4
+signal IO_L5
+signal IO_L6
+signal IO_L7
+signal IO_L8
+signal IO_L19
+signal IO_L20
+signal IO_L21
+signal IO_L22
+signal IO_L23
+signal IO_L25
+signal IO_L26
+signal IO_M1
+signal IO_M2
+signal IO_M3
+signal IO_M5
+signal IO_M6
+signal IO_M7
+signal IO_M8
+signal IO_M19
+signal IO_M20
+signal IO_M21
+signal IO_M22
+signal IO_M24
+signal IO_M25
+signal IO_M26
+signal IO_N1
+signal IO_N2
+signal IO_N3
+signal IO_N4
+signal IO_N5
+signal IO_N6
+signal IO_N7
+signal IO_N8
+signal IO_N19
+signal IO_N20
+signal IO_N21
+signal IO_N22
+signal IO_N23
+signal IO_N24
+signal IO_N25
+signal IO_N26
+signal IO_P1
+signal IO_P2
+signal IO_P3
+signal IO_P4
+signal IO_P5
+signal IO_P6
+signal IO_P7
+signal IO_P8
+signal IO_P19
+signal IO_P20
+signal IO_P21
+signal IO_P22
+signal IO_P23
+signal IO_P24
+signal IO_P25
+signal IO_P26
+signal IO_R1
+signal IO_R2
+signal IO_R3
+signal IO_R5
+signal IO_R6
+signal IO_R7
+signal IO_R8
+signal IO_R19
+signal IO_R20
+signal IO_R21
+signal IO_R22
+signal IO_R24
+signal IO_R25
+signal IO_R26
+signal IO_T1
+signal IO_T2
+signal IO_T4
+signal IO_T5
+signal IO_T6
+signal IO_T7
+signal IO_T8
+signal IO_T19
+signal IO_T20
+signal IO_T21
+signal IO_T22
+signal IO_T23
+signal IO_T25
+signal IO_T26
+signal IO_U1
+signal IO_U2
+signal IO_U3
+signal IO_U4
+signal IO_U5
+signal IO_U6
+signal IO_U7
+signal IO_U20
+signal IO_U21
+signal IO_U22
+signal IO_U23
+signal IO_U24
+signal IO_U25
+signal IO_U26
+signal IO_V2
+signal IO_V3
+signal IO_V4
+signal IO_V5
+signal IO_V6
+signal IO_V7
+signal IO_V20
+signal IO_V21
+signal IO_V22
+signal IO_V23
+signal IO_V24
+signal IO_V25
+signal IO_W1
+signal IO_W2
+signal IO_W3
+signal IO_W4
+signal IO_W5
+signal IO_W6
+signal IO_W7
+signal IO_W11
+signal IO_W12
+signal IO_W13
+signal IO_W14
+signal IO_W15
+signal IO_W16
+signal IO_W20
+signal IO_W21
+signal IO_W22
+signal IO_W23
+signal IO_W24
+signal IO_W25
+signal IO_W26
+signal IO_Y1
+signal IO_Y2
+signal IO_Y4
+signal IO_Y5
+signal IO_Y6
+signal IO_Y7
+signal IO_Y8
+signal IO_Y9
+signal IO_Y10
+signal IO_Y11
+signal IO_Y12
+signal IO_Y13
+signal IO_Y14
+signal IO_Y15
+signal IO_Y16
+signal IO_Y17
+signal IO_Y18
+signal IO_Y19
+signal IO_Y20
+signal IO_Y21
+signal IO_Y22
+signal IO_Y23
+signal IO_Y25
+signal IO_Y26
+signal IO_AA1
+signal IO_AA2
+signal IO_AA3
+signal IO_AA4
+signal IO_AA5
+signal IO_AA6
+signal IO_AA7
+signal IO_AA8
+signal IO_AA9
+signal IO_AA10
+signal IO_AA11
+signal IO_AA12
+signal IO_AA13
+signal IO_AA14
+signal IO_AA15
+signal IO_AA16
+signal IO_AA17
+signal IO_AA18
+signal IO_AA19
+signal IO_AA20
+signal IO_AA21
+signal IO_AA22
+signal IO_AA23
+signal IO_AA24
+signal IO_AA25
+signal IO_AA26
+signal IO_AB1
+signal IO_AB2
+signal IO_AB3
+signal IO_AB4
+signal IO_AB5
+signal IO_AB6
+signal IO_AB7
+signal IO_AB8
+signal IO_AB9
+signal IO_AB10
+signal IO_AB11
+signal IO_AB12
+signal IO_AB13
+signal IO_AB14
+signal IO_AB15
+signal IO_AB16
+signal IO_AB17
+signal IO_AB18
+signal IO_AB19
+signal IO_AB20
+signal IO_AB21
+signal IO_AB22
+signal IO_AB23
+signal IO_AB24
+signal IO_AB25
+signal IO_AB26
+signal IO_AC1
+signal IO_AC2
+signal IO_AC5
+signal IO_AC6
+signal IO_AC7
+signal IO_AC8
+signal IO_AC9
+signal IO_AC10
+signal IO_AC11
+signal IO_AC13
+signal IO_AC14
+signal IO_AC16
+signal IO_AC17
+signal IO_AC18
+signal IO_AC19
+signal IO_AC20
+signal IO_AC21
+signal IO_AC22
+signal IO_AC25
+signal IO_AC26
+signal IO_AD1
+signal IO_AD2
+signal IO_AD4
+signal IO_AD5
+signal IO_AD6
+signal IO_AD8
+signal IO_AD9
+signal IO_AD10
+signal IO_AD12
+signal IO_AD13
+signal IO_AD14
+signal IO_AD15
+signal IO_AD17
+signal IO_AD18
+signal IO_AD19
+signal IO_AD21
+signal IO_AD22
+signal IO_AD23
+signal IO_AD25
+signal IO_AE4
+signal IO_AE5
+signal IO_AE6
+signal IO_AE7
+signal IO_AE8
+signal IO_AE9
+signal IO_AE10
+signal IO_AE11
+signal IO_AE12
+signal IO_AE13
+signal IO_AE14
+signal IO_AE15
+signal IO_AE16
+signal IO_AE17
+signal IO_AE18
+signal IO_AE19
+signal IO_AE20
+signal IO_AE21
+signal IO_AE22
+signal IO_AE23
+signal IO_AE24
+signal IO_AF4
+signal IO_AF5
+signal IO_AF6
+signal IO_AF7
+signal IO_AF8
+signal IO_AF10
+signal IO_AF11
+signal IO_AF12
+signal IO_AF13
+signal IO_AF14
+signal IO_AF15
+signal IO_AF16
+signal IO_AF17
+signal IO_AF19
+signal IO_AF20
+signal IO_AF21
+signal IO_AF22
+signal IO_AF23
+
+register BSR 1931
+register BR 1
+register DIR 32
+
+instruction length 6
+
+instruction EXTEST 000000 BSR
+instruction SAMPLE/PRELOAD 000001 BSR
+instruction IDCODE 001001 DIR
+instruction BYPASS 111111 BR
+
+bit 1930 I 1 IO_C25
+bit 1929 O 1 IO_C25 1928 1 Z
+bit 1928 C 1 *
+bit 1927 I 1 IO_C26
+bit 1926 O 1 IO_C26 1925 1 Z
+bit 1925 C 1 *
+bit 1924 I 1 IO_E23
+bit 1923 O 1 IO_E23 1922 1 Z
+bit 1922 C 1 *
+bit 1921 I 1 IO_E24
+bit 1920 O 1 IO_E24 1919 1 Z
+bit 1919 C 1 *
+bit 1918 I 1 IO_D25
+bit 1917 O 1 IO_D25 1916 1 Z
+bit 1916 C 1 *
+bit 1915 I 1 IO_D26
+bit 1914 O 1 IO_D26 1913 1 Z
+bit 1913 C 1 *
+bit 1912 I 1 IO_F22
+bit 1911 O 1 IO_F22 1910 1 Z
+bit 1910 C 1 *
+bit 1909 O 1 *
+bit 1908 O 1 *
+bit 1907 O 1 *
+bit 1906 I 1 IO_E25
+bit 1905 O 1 IO_E25 1904 1 Z
+bit 1904 C 1 *
+bit 1903 I 1 IO_E26
+bit 1902 O 1 IO_E26 1901 1 Z
+bit 1901 C 1 *
+bit 1900 I 1 IO_G20
+bit 1899 O 1 IO_G20 1898 1 Z
+bit 1898 C 1 *
+bit 1897 I 1 IO_G21
+bit 1896 O 1 IO_G21 1895 1 Z
+bit 1895 C 1 *
+bit 1894 I 1 IO_F23
+bit 1893 O 1 IO_F23 1892 1 Z
+bit 1892 C 1 *
+bit 1891 I 1 IO_F24
+bit 1890 O 1 IO_F24 1889 1 Z
+bit 1889 C 1 *
+bit 1888 I 1 IO_G22
+bit 1887 O 1 IO_G22 1886 1 Z
+bit 1886 C 1 *
+bit 1885 I 1 IO_G23
+bit 1884 O 1 IO_G23 1883 1 Z
+bit 1883 C 1 *
+bit 1882 I 1 IO_F25
+bit 1881 O 1 IO_F25 1880 1 Z
+bit 1880 C 1 *
+bit 1879 I 1 IO_F26
+bit 1878 O 1 IO_F26 1877 1 Z
+bit 1877 C 1 *
+bit 1876 I 1 IO_G25
+bit 1875 O 1 IO_G25 1874 1 Z
+bit 1874 C 1 *
+bit 1873 I 1 IO_G26
+bit 1872 O 1 IO_G26 1871 1 Z
+bit 1871 C 1 *
+bit 1870 O 1 *
+bit 1869 O 1 *
+bit 1868 O 1 *
+bit 1867 O 1 *
+bit 1866 O 1 *
+bit 1865 O 1 *
+bit 1864 O 1 *
+bit 1863 O 1 *
+bit 1862 O 1 *
+bit 1861 O 1 *
+bit 1860 O 1 *
+bit 1859 O 1 *
+bit 1858 O 1 *
+bit 1857 O 1 *
+bit 1856 O 1 *
+bit 1855 O 1 *
+bit 1854 O 1 *
+bit 1853 O 1 *
+bit 1852 I 1 IO_H20
+bit 1851 O 1 IO_H20 1850 1 Z
+bit 1850 C 1 *
+bit 1849 I 1 IO_H21
+bit 1848 O 1 IO_H21 1847 1 Z
+bit 1847 C 1 *
+bit 1846 O 1 *
+bit 1845 O 1 *
+bit 1844 O 1 *
+bit 1843 O 1 *
+bit 1842 O 1 *
+bit 1841 O 1 *
+bit 1840 I 1 IO_H22
+bit 1839 O 1 IO_H22 1838 1 Z
+bit 1838 C 1 *
+bit 1837 I 1 IO_J21
+bit 1836 O 1 IO_J21 1835 1 Z
+bit 1835 C 1 *
+bit 1834 I 1 IO_H23
+bit 1833 O 1 IO_H23 1832 1 Z
+bit 1832 C 1 *
+bit 1831 I 1 IO_H24
+bit 1830 O 1 IO_H24 1829 1 Z
+bit 1829 C 1 *
+bit 1828 O 1 *
+bit 1827 O 1 *
+bit 1826 O 1 *
+bit 1825 O 1 *
+bit 1824 O 1 *
+bit 1823 O 1 *
+bit 1822 I 1 IO_H25
+bit 1821 O 1 IO_H25 1820 1 Z
+bit 1820 C 1 *
+bit 1819 I 1 IO_H26
+bit 1818 O 1 IO_H26 1817 1 Z
+bit 1817 C 1 *
+bit 1816 I 1 IO_J20
+bit 1815 O 1 IO_J20 1814 1 Z
+bit 1814 C 1 *
+bit 1813 I 1 IO_K20
+bit 1812 O 1 IO_K20 1811 1 Z
+bit 1811 C 1 *
+bit 1810 I 1 IO_J22
+bit 1809 O 1 IO_J22 1808 1 Z
+bit 1808 C 1 *
+bit 1807 I 1 IO_J23
+bit 1806 O 1 IO_J23 1805 1 Z
+bit 1805 C 1 *
+bit 1804 I 1 IO_J24
+bit 1803 O 1 IO_J24 1802 1 Z
+bit 1802 C 1 *
+bit 1801 I 1 IO_J25
+bit 1800 O 1 IO_J25 1799 1 Z
+bit 1799 C 1 *
+bit 1798 I 1 IO_K21
+bit 1797 O 1 IO_K21 1796 1 Z
+bit 1796 C 1 *
+bit 1795 I 1 IO_K22
+bit 1794 O 1 IO_K22 1793 1 Z
+bit 1793 C 1 *
+bit 1792 I 1 IO_K23
+bit 1791 O 1 IO_K23 1790 1 Z
+bit 1790 C 1 *
+bit 1789 I 1 IO_K24
+bit 1788 O 1 IO_K24 1787 1 Z
+bit 1787 C 1 *
+bit 1786 O 1 *
+bit 1785 O 1 *
+bit 1784 O 1 *
+bit 1783 O 1 *
+bit 1782 O 1 *
+bit 1781 O 1 *
+bit 1780 I 1 IO_K25
+bit 1779 O 1 IO_K25 1778 1 Z
+bit 1778 C 1 *
+bit 1777 I 1 IO_K26
+bit 1776 O 1 IO_K26 1775 1 Z
+bit 1775 C 1 *
+bit 1774 I 1 IO_L19
+bit 1773 O 1 IO_L19 1772 1 Z
+bit 1772 C 1 *
+bit 1771 I 1 IO_L20
+bit 1770 O 1 IO_L20 1769 1 Z
+bit 1769 C 1 *
+bit 1768 I 1 IO_L21
+bit 1767 O 1 IO_L21 1766 1 Z
+bit 1766 C 1 *
+bit 1765 I 1 IO_L22
+bit 1764 O 1 IO_L22 1763 1 Z
+bit 1763 C 1 *
+bit 1762 I 1 IO_L25
+bit 1761 O 1 IO_L25 1760 1 Z
+bit 1760 C 1 *
+bit 1759 I 1 IO_L26
+bit 1758 O 1 IO_L26 1757 1 Z
+bit 1757 C 1 *
+bit 1756 O 1 *
+bit 1755 O 1 *
+bit 1754 O 1 *
+bit 1753 O 1 *
+bit 1752 O 1 *
+bit 1751 O 1 *
+bit 1750 I 1 IO_M19
+bit 1749 O 1 IO_M19 1748 1 Z
+bit 1748 C 1 *
+bit 1747 I 1 IO_M20
+bit 1746 O 1 IO_M20 1745 1 Z
+bit 1745 C 1 *
+bit 1744 I 1 IO_M21
+bit 1743 O 1 IO_M21 1742 1 Z
+bit 1742 C 1 *
+bit 1741 I 1 IO_M22
+bit 1740 O 1 IO_M22 1739 1 Z
+bit 1739 C 1 *
+bit 1738 I 1 IO_L23
+bit 1737 O 1 IO_L23 1736 1 Z
+bit 1736 C 1 *
+bit 1735 I 1 IO_M24
+bit 1734 O 1 IO_M24 1733 1 Z
+bit 1733 C 1 *
+bit 1732 I 1 IO_M25
+bit 1731 O 1 IO_M25 1730 1 Z
+bit 1730 C 1 *
+bit 1729 I 1 IO_M26
+bit 1728 O 1 IO_M26 1727 1 Z
+bit 1727 C 1 *
+bit 1726 I 1 IO_N19
+bit 1725 O 1 IO_N19 1724 1 Z
+bit 1724 C 1 *
+bit 1723 I 1 IO_N20
+bit 1722 O 1 IO_N20 1721 1 Z
+bit 1721 C 1 *
+bit 1720 O 1 *
+bit 1719 O 1 *
+bit 1718 O 1 *
+bit 1717 O 1 *
+bit 1716 O 1 *
+bit 1715 O 1 *
+bit 1714 O 1 *
+bit 1713 O 1 *
+bit 1712 O 1 *
+bit 1711 O 1 *
+bit 1710 O 1 *
+bit 1709 O 1 *
+bit 1708 I 1 IO_N21
+bit 1707 O 1 IO_N21 1706 1 Z
+bit 1706 C 1 *
+bit 1705 I 1 IO_N22
+bit 1704 O 1 IO_N22 1703 1 Z
+bit 1703 C 1 *
+bit 1702 I 1 IO_N23
+bit 1701 O 1 IO_N23 1700 1 Z
+bit 1700 C 1 *
+bit 1699 I 1 IO_N24
+bit 1698 O 1 IO_N24 1697 1 Z
+bit 1697 C 1 *
+bit 1696 I 1 IO_N25
+bit 1695 O 1 IO_N25 1694 1 Z
+bit 1694 C 1 *
+bit 1693 I 1 IO_N26
+bit 1692 O 1 IO_N26 1691 1 Z
+bit 1691 C 1 *
+bit 1690 I 1 IO_P26
+bit 1689 O 1 IO_P26 1688 1 Z
+bit 1688 C 1 *
+bit 1687 I 1 IO_P25
+bit 1686 O 1 IO_P25 1685 1 Z
+bit 1685 C 1 *
+bit 1684 I 1 IO_P24
+bit 1683 O 1 IO_P24 1682 1 Z
+bit 1682 C 1 *
+bit 1681 I 1 IO_P23
+bit 1680 O 1 IO_P23 1679 1 Z
+bit 1679 C 1 *
+bit 1678 I 1 IO_P22
+bit 1677 O 1 IO_P22 1676 1 Z
+bit 1676 C 1 *
+bit 1675 I 1 IO_P21
+bit 1674 O 1 IO_P21 1673 1 Z
+bit 1673 C 1 *
+bit 1672 O 1 *
+bit 1671 O 1 *
+bit 1670 O 1 *
+bit 1669 O 1 *
+bit 1668 O 1 *
+bit 1667 O 1 *
+bit 1666 O 1 *
+bit 1665 O 1 *
+bit 1664 O 1 *
+bit 1663 O 1 *
+bit 1662 O 1 *
+bit 1661 O 1 *
+bit 1660 I 1 IO_P20
+bit 1659 O 1 IO_P20 1658 1 Z
+bit 1658 C 1 *
+bit 1657 I 1 IO_P19
+bit 1656 O 1 IO_P19 1655 1 Z
+bit 1655 C 1 *
+bit 1654 I 1 IO_R26
+bit 1653 O 1 IO_R26 1652 1 Z
+bit 1652 C 1 *
+bit 1651 I 1 IO_R25
+bit 1650 O 1 IO_R25 1649 1 Z
+bit 1649 C 1 *
+bit 1648 I 1 IO_R24
+bit 1647 O 1 IO_R24 1646 1 Z
+bit 1646 C 1 *
+bit 1645 I 1 IO_T23
+bit 1644 O 1 IO_T23 1643 1 Z
+bit 1643 C 1 *
+bit 1642 I 1 IO_R22
+bit 1641 O 1 IO_R22 1640 1 Z
+bit 1640 C 1 *
+bit 1639 I 1 IO_R21
+bit 1638 O 1 IO_R21 1637 1 Z
+bit 1637 C 1 *
+bit 1636 I 1 IO_R20
+bit 1635 O 1 IO_R20 1634 1 Z
+bit 1634 C 1 *
+bit 1633 I 1 IO_R19
+bit 1632 O 1 IO_R19 1631 1 Z
+bit 1631 C 1 *
+bit 1630 O 1 *
+bit 1629 O 1 *
+bit 1628 O 1 *
+bit 1627 O 1 *
+bit 1626 O 1 *
+bit 1625 O 1 *
+bit 1624 I 1 IO_T26
+bit 1623 O 1 IO_T26 1622 1 Z
+bit 1622 C 1 *
+bit 1621 I 1 IO_T25
+bit 1620 O 1 IO_T25 1619 1 Z
+bit 1619 C 1 *
+bit 1618 I 1 IO_T22
+bit 1617 O 1 IO_T22 1616 1 Z
+bit 1616 C 1 *
+bit 1615 I 1 IO_T21
+bit 1614 O 1 IO_T21 1613 1 Z
+bit 1613 C 1 *
+bit 1612 I 1 IO_T20
+bit 1611 O 1 IO_T20 1610 1 Z
+bit 1610 C 1 *
+bit 1609 I 1 IO_T19
+bit 1608 O 1 IO_T19 1607 1 Z
+bit 1607 C 1 *
+bit 1606 I 1 IO_U26
+bit 1605 O 1 IO_U26 1604 1 Z
+bit 1604 C 1 *
+bit 1603 I 1 IO_U25
+bit 1602 O 1 IO_U25 1601 1 Z
+bit 1601 C 1 *
+bit 1600 O 1 *
+bit 1599 O 1 *
+bit 1598 O 1 *
+bit 1597 O 1 *
+bit 1596 O 1 *
+bit 1595 O 1 *
+bit 1594 I 1 IO_U24
+bit 1593 O 1 IO_U24 1592 1 Z
+bit 1592 C 1 *
+bit 1591 I 1 IO_U23
+bit 1590 O 1 IO_U23 1589 1 Z
+bit 1589 C 1 *
+bit 1588 I 1 IO_U22
+bit 1587 O 1 IO_U22 1586 1 Z
+bit 1586 C 1 *
+bit 1585 I 1 IO_U21
+bit 1584 O 1 IO_U21 1583 1 Z
+bit 1583 C 1 *
+bit 1582 I 1 IO_V25
+bit 1581 O 1 IO_V25 1580 1 Z
+bit 1580 C 1 *
+bit 1579 I 1 IO_V24
+bit 1578 O 1 IO_V24 1577 1 Z
+bit 1577 C 1 *
+bit 1576 I 1 IO_V23
+bit 1575 O 1 IO_V23 1574 1 Z
+bit 1574 C 1 *
+bit 1573 I 1 IO_V22
+bit 1572 O 1 IO_V22 1571 1 Z
+bit 1571 C 1 *
+bit 1570 I 1 IO_U20
+bit 1569 O 1 IO_U20 1568 1 Z
+bit 1568 C 1 *
+bit 1567 I 1 IO_V20
+bit 1566 O 1 IO_V20 1565 1 Z
+bit 1565 C 1 *
+bit 1564 I 1 IO_W26
+bit 1563 O 1 IO_W26 1562 1 Z
+bit 1562 C 1 *
+bit 1561 I 1 IO_W25
+bit 1560 O 1 IO_W25 1559 1 Z
+bit 1559 C 1 *
+bit 1558 O 1 *
+bit 1557 O 1 *
+bit 1556 O 1 *
+bit 1555 O 1 *
+bit 1554 O 1 *
+bit 1553 O 1 *
+bit 1552 I 1 IO_W24
+bit 1551 O 1 IO_W24 1550 1 Z
+bit 1550 C 1 *
+bit 1549 I 1 IO_W23
+bit 1548 O 1 IO_W23 1547 1 Z
+bit 1547 C 1 *
+bit 1546 I 1 IO_V21
+bit 1545 O 1 IO_V21 1544 1 Z
+bit 1544 C 1 *
+bit 1543 I 1 IO_W22
+bit 1542 O 1 IO_W22 1541 1 Z
+bit 1541 C 1 *
+bit 1540 O 1 *
+bit 1539 O 1 *
+bit 1538 O 1 *
+bit 1537 O 1 *
+bit 1536 O 1 *
+bit 1535 O 1 *
+bit 1534 I 1 IO_Y26
+bit 1533 O 1 IO_Y26 1532 1 Z
+bit 1532 C 1 *
+bit 1531 I 1 IO_Y25
+bit 1530 O 1 IO_Y25 1529 1 Z
+bit 1529 C 1 *
+bit 1528 O 1 *
+bit 1527 O 1 *
+bit 1526 O 1 *
+bit 1525 O 1 *
+bit 1524 O 1 *
+bit 1523 O 1 *
+bit 1522 O 1 *
+bit 1521 O 1 *
+bit 1520 O 1 *
+bit 1519 O 1 *
+bit 1518 O 1 *
+bit 1517 O 1 *
+bit 1516 O 1 *
+bit 1515 O 1 *
+bit 1514 O 1 *
+bit 1513 O 1 *
+bit 1512 O 1 *
+bit 1511 O 1 *
+bit 1510 I 1 IO_W21
+bit 1509 O 1 IO_W21 1508 1 Z
+bit 1508 C 1 *
+bit 1507 I 1 IO_W20
+bit 1506 O 1 IO_W20 1505 1 Z
+bit 1505 C 1 *
+bit 1504 I 1 IO_AA26
+bit 1503 O 1 IO_AA26 1502 1 Z
+bit 1502 C 1 *
+bit 1501 I 1 IO_AA25
+bit 1500 O 1 IO_AA25 1499 1 Z
+bit 1499 C 1 *
+bit 1498 I 1 IO_Y23
+bit 1497 O 1 IO_Y23 1496 1 Z
+bit 1496 C 1 *
+bit 1495 I 1 IO_Y22
+bit 1494 O 1 IO_Y22 1493 1 Z
+bit 1493 C 1 *
+bit 1492 I 1 IO_AA24
+bit 1491 O 1 IO_AA24 1490 1 Z
+bit 1490 C 1 *
+bit 1489 I 1 IO_AA23
+bit 1488 O 1 IO_AA23 1487 1 Z
+bit 1487 C 1 *
+bit 1486 I 1 IO_AB26
+bit 1485 O 1 IO_AB26 1484 1 Z
+bit 1484 C 1 *
+bit 1483 I 1 IO_AB25
+bit 1482 O 1 IO_AB25 1481 1 Z
+bit 1481 C 1 *
+bit 1480 I 1 IO_Y21
+bit 1479 O 1 IO_Y21 1478 1 Z
+bit 1478 C 1 *
+bit 1477 I 1 IO_Y20
+bit 1476 O 1 IO_Y20 1475 1 Z
+bit 1475 C 1 *
+bit 1474 O 1 *
+bit 1473 O 1 *
+bit 1472 O 1 *
+bit 1471 O 1 *
+bit 1470 O 1 *
+bit 1469 O 1 *
+bit 1468 I 1 IO_AC26
+bit 1467 O 1 IO_AC26 1466 1 Z
+bit 1466 C 1 *
+bit 1465 I 1 IO_AC25
+bit 1464 O 1 IO_AC25 1463 1 Z
+bit 1463 C 1 *
+bit 1462 I 1 IO_AB24
+bit 1461 O 1 IO_AB24 1460 1 Z
+bit 1460 C 1 *
+bit 1459 I 1 IO_AB23
+bit 1458 O 1 IO_AB23 1457 1 Z
+bit 1457 C 1 *
+bit 1456 I 1 IO_AA22
+bit 1455 O 1 IO_AA22 1454 1 Z
+bit 1454 C 1 *
+bit 1453 I 1 IO_AA21
+bit 1452 O 1 IO_AA21 1451 1 Z
+bit 1451 C 1 *
+bit 1450 I 1 CCLK_AD26
+bit 1449 O 1 CCLK_AD26 1448 1 Z
+bit 1448 C 1 *
+bit 1447 I 1 DONE_AC24
+bit 1446 O 1 DONE_AC24 1445 1 Z
+bit 1445 C 1 *
+bit 1444 I 1 IO_AD25
+bit 1443 O 1 IO_AD25 1442 1 Z
+bit 1442 C 1 *
+bit 1441 I 1 IO_AB22
+bit 1440 O 1 IO_AB22 1439 1 Z
+bit 1439 C 1 *
+bit 1438 I 1 IO_AC22
+bit 1437 O 1 IO_AC22 1436 1 Z
+bit 1436 C 1 *
+bit 1435 O 1 *
+bit 1434 O 1 *
+bit 1433 O 1 *
+bit 1432 O 1 *
+bit 1431 O 1 *
+bit 1430 O 1 *
+bit 1429 O 1 *
+bit 1428 O 1 *
+bit 1427 O 1 *
+bit 1426 O 1 *
+bit 1425 O 1 *
+bit 1424 O 1 *
+bit 1423 O 1 *
+bit 1422 O 1 *
+bit 1421 O 1 *
+bit 1420 I 1 IO_AE24
+bit 1419 O 1 IO_AE24 1418 1 Z
+bit 1418 C 1 *
+bit 1417 I 1 IO_AF24
+bit 1416 O 1 IO_AF24 1415 1 Z
+bit 1415 C 1 *
+bit 1414 I 1 IO_AD23
+bit 1413 O 1 IO_AD23 1412 1 Z
+bit 1412 C 1 *
+bit 1411 I 1 IO_AE23
+bit 1410 O 1 IO_AE23 1409 1 Z
+bit 1409 C 1 *
+bit 1408 I 1 IO_AF23
+bit 1407 O 1 IO_AF23 1406 1 Z
+bit 1406 C 1 *
+bit 1405 I 1 IO_AD22
+bit 1404 O 1 IO_AD22 1403 1 Z
+bit 1403 C 1 *
+bit 1402 I 1 IO_AE22
+bit 1401 O 1 IO_AE22 1400 1 Z
+bit 1400 C 1 *
+bit 1399 I 1 IO_AF22
+bit 1398 O 1 IO_AF22 1397 1 Z
+bit 1397 C 1 *
+bit 1396 I 1 IO_AB21
+bit 1395 O 1 IO_AB21 1394 1 Z
+bit 1394 C 1 *
+bit 1393 I 1 IO_AC21
+bit 1392 O 1 IO_AC21 1391 1 Z
+bit 1391 C 1 *
+bit 1390 I 1 IO_AD21
+bit 1389 O 1 IO_AD21 1388 1 Z
+bit 1388 C 1 *
+bit 1387 I 1 IO_AE21
+bit 1386 O 1 IO_AE21 1385 1 Z
+bit 1385 C 1 *
+bit 1384 I 1 IO_AF21
+bit 1383 O 1 IO_AF21 1382 1 Z
+bit 1382 C 1 *
+bit 1381 I 1 IO_AB20
+bit 1380 O 1 IO_AB20 1379 1 Z
+bit 1379 C 1 *
+bit 1378 I 1 IO_AC20
+bit 1377 O 1 IO_AC20 1376 1 Z
+bit 1376 C 1 *
+bit 1375 I 1 IO_AE20
+bit 1374 O 1 IO_AE20 1373 1 Z
+bit 1373 C 1 *
+bit 1372 I 1 IO_AF20
+bit 1371 O 1 IO_AF20 1370 1 Z
+bit 1370 C 1 *
+bit 1369 I 1 IO_AA20
+bit 1368 O 1 IO_AA20 1367 1 Z
+bit 1367 C 1 *
+bit 1366 I 1 IO_Y19
+bit 1365 O 1 IO_Y19 1364 1 Z
+bit 1364 C 1 *
+bit 1363 I 1 IO_AA19
+bit 1362 O 1 IO_AA19 1361 1 Z
+bit 1361 C 1 *
+bit 1360 I 1 IO_AB19
+bit 1359 O 1 IO_AB19 1358 1 Z
+bit 1358 C 1 *
+bit 1357 I 1 IO_AC19
+bit 1356 O 1 IO_AC19 1355 1 Z
+bit 1355 C 1 *
+bit 1354 O 1 *
+bit 1353 O 1 *
+bit 1352 O 1 *
+bit 1351 O 1 *
+bit 1350 O 1 *
+bit 1349 O 1 *
+bit 1348 O 1 *
+bit 1347 O 1 *
+bit 1346 O 1 *
+bit 1345 O 1 *
+bit 1344 O 1 *
+bit 1343 O 1 *
+bit 1342 O 1 *
+bit 1341 O 1 *
+bit 1340 O 1 *
+bit 1339 I 1 IO_AD19
+bit 1338 O 1 IO_AD19 1337 1 Z
+bit 1337 C 1 *
+bit 1336 I 1 IO_AE19
+bit 1335 O 1 IO_AE19 1334 1 Z
+bit 1334 C 1 *
+bit 1333 I 1 IO_AF19
+bit 1332 O 1 IO_AF19 1331 1 Z
+bit 1331 C 1 *
+bit 1330 I 1 IO_Y18
+bit 1329 O 1 IO_Y18 1328 1 Z
+bit 1328 C 1 *
+bit 1327 I 1 IO_AA18
+bit 1326 O 1 IO_AA18 1325 1 Z
+bit 1325 C 1 *
+bit 1324 O 1 *
+bit 1323 O 1 *
+bit 1322 O 1 *
+bit 1321 I 1 IO_AB18
+bit 1320 O 1 IO_AB18 1319 1 Z
+bit 1319 C 1 *
+bit 1318 I 1 IO_AC18
+bit 1317 O 1 IO_AC18 1316 1 Z
+bit 1316 C 1 *
+bit 1315 I 1 IO_AD18
+bit 1314 O 1 IO_AD18 1313 1 Z
+bit 1313 C 1 *
+bit 1312 I 1 IO_AE18
+bit 1311 O 1 IO_AE18 1310 1 Z
+bit 1310 C 1 *
+bit 1309 I 1 IO_Y17
+bit 1308 O 1 IO_Y17 1307 1 Z
+bit 1307 C 1 *
+bit 1306 I 1 IO_AC17
+bit 1305 O 1 IO_AC17 1304 1 Z
+bit 1304 C 1 *
+bit 1303 I 1 IO_AA17
+bit 1302 O 1 IO_AA17 1301 1 Z
+bit 1301 C 1 *
+bit 1300 O 1 *
+bit 1299 O 1 *
+bit 1298 O 1 *
+bit 1297 O 1 *
+bit 1296 O 1 *
+bit 1295 O 1 *
+bit 1294 O 1 *
+bit 1293 O 1 *
+bit 1292 O 1 *
+bit 1291 O 1 *
+bit 1290 O 1 *
+bit 1289 O 1 *
+bit 1288 O 1 *
+bit 1287 O 1 *
+bit 1286 O 1 *
+bit 1285 I 1 IO_AD17
+bit 1284 O 1 IO_AD17 1283 1 Z
+bit 1283 C 1 *
+bit 1282 I 1 IO_AB17
+bit 1281 O 1 IO_AB17 1280 1 Z
+bit 1280 C 1 *
+bit 1279 I 1 IO_W16
+bit 1278 O 1 IO_W16 1277 1 Z
+bit 1277 C 1 *
+bit 1276 I 1 IO_AE17
+bit 1275 O 1 IO_AE17 1274 1 Z
+bit 1274 C 1 *
+bit 1273 I 1 IO_AF17
+bit 1272 O 1 IO_AF17 1271 1 Z
+bit 1271 C 1 *
+bit 1270 I 1 IO_Y16
+bit 1269 O 1 IO_Y16 1268 1 Z
+bit 1268 C 1 *
+bit 1267 I 1 IO_AA16
+bit 1266 O 1 IO_AA16 1265 1 Z
+bit 1265 C 1 *
+bit 1264 O 1 *
+bit 1263 O 1 *
+bit 1262 O 1 *
+bit 1261 I 1 IO_AB16
+bit 1260 O 1 IO_AB16 1259 1 Z
+bit 1259 C 1 *
+bit 1258 I 1 IO_AC16
+bit 1257 O 1 IO_AC16 1256 1 Z
+bit 1256 C 1 *
+bit 1255 I 1 IO_AE16
+bit 1254 O 1 IO_AE16 1253 1 Z
+bit 1253 C 1 *
+bit 1252 I 1 IO_AF16
+bit 1251 O 1 IO_AF16 1250 1 Z
+bit 1250 C 1 *
+bit 1249 I 1 IO_W15
+bit 1248 O 1 IO_W15 1247 1 Z
+bit 1247 C 1 *
+bit 1246 I 1 IO_Y15
+bit 1245 O 1 IO_Y15 1244 1 Z
+bit 1244 C 1 *
+bit 1243 I 1 IO_W14
+bit 1242 O 1 IO_W14 1241 1 Z
+bit 1241 C 1 *
+bit 1240 I 1 IO_AA15
+bit 1239 O 1 IO_AA15 1238 1 Z
+bit 1238 C 1 *
+bit 1237 I 1 IO_AB15
+bit 1236 O 1 IO_AB15 1235 1 Z
+bit 1235 C 1 *
+bit 1234 I 1 IO_AD15
+bit 1233 O 1 IO_AD15 1232 1 Z
+bit 1232 C 1 *
+bit 1231 I 1 IO_AE15
+bit 1230 O 1 IO_AE15 1229 1 Z
+bit 1229 C 1 *
+bit 1228 I 1 IO_AF15
+bit 1227 O 1 IO_AF15 1226 1 Z
+bit 1226 C 1 *
+bit 1225 I 1 IO_Y14
+bit 1224 O 1 IO_Y14 1223 1 Z
+bit 1223 C 1 *
+bit 1222 I 1 IO_AA14
+bit 1221 O 1 IO_AA14 1220 1 Z
+bit 1220 C 1 *
+bit 1219 I 1 IO_AB14
+bit 1218 O 1 IO_AB14 1217 1 Z
+bit 1217 C 1 *
+bit 1216 I 1 IO_AC14
+bit 1215 O 1 IO_AC14 1214 1 Z
+bit 1214 C 1 *
+bit 1213 I 1 IO_AD14
+bit 1212 O 1 IO_AD14 1211 1 Z
+bit 1211 C 1 *
+bit 1210 I 1 IO_AE14
+bit 1209 O 1 IO_AE14 1208 1 Z
+bit 1208 C 1 *
+bit 1207 I 1 IO_AF14
+bit 1206 O 1 IO_AF14 1205 1 Z
+bit 1205 C 1 *
+bit 1204 I 1 IO_AF13
+bit 1203 O 1 IO_AF13 1202 1 Z
+bit 1202 C 1 *
+bit 1201 I 1 IO_AE13
+bit 1200 O 1 IO_AE13 1199 1 Z
+bit 1199 C 1 *
+bit 1198 I 1 IO_AD13
+bit 1197 O 1 IO_AD13 1196 1 Z
+bit 1196 C 1 *
+bit 1195 I 1 IO_AC13
+bit 1194 O 1 IO_AC13 1193 1 Z
+bit 1193 C 1 *
+bit 1192 I 1 IO_AB13
+bit 1191 O 1 IO_AB13 1190 1 Z
+bit 1190 C 1 *
+bit 1189 I 1 IO_AA13
+bit 1188 O 1 IO_AA13 1187 1 Z
+bit 1187 C 1 *
+bit 1186 I 1 IO_Y13
+bit 1185 O 1 IO_Y13 1184 1 Z
+bit 1184 C 1 *
+bit 1183 I 1 IO_W13
+bit 1182 O 1 IO_W13 1181 1 Z
+bit 1181 C 1 *
+bit 1180 I 1 IO_AF12
+bit 1179 O 1 IO_AF12 1178 1 Z
+bit 1178 C 1 *
+bit 1177 I 1 IO_AE12
+bit 1176 O 1 IO_AE12 1175 1 Z
+bit 1175 C 1 *
+bit 1174 I 1 IO_AD12
+bit 1173 O 1 IO_AD12 1172 1 Z
+bit 1172 C 1 *
+bit 1171 I 1 IO_AB12
+bit 1170 O 1 IO_AB12 1169 1 Z
+bit 1169 C 1 *
+bit 1168 I 1 IO_AA12
+bit 1167 O 1 IO_AA12 1166 1 Z
+bit 1166 C 1 *
+bit 1165 I 1 IO_Y12
+bit 1164 O 1 IO_Y12 1163 1 Z
+bit 1163 C 1 *
+bit 1162 I 1 IO_W12
+bit 1161 O 1 IO_W12 1160 1 Z
+bit 1160 C 1 *
+bit 1159 I 1 IO_AC11
+bit 1158 O 1 IO_AC11 1157 1 Z
+bit 1157 C 1 *
+bit 1156 I 1 IO_AF11
+bit 1155 O 1 IO_AF11 1154 1 Z
+bit 1154 C 1 *
+bit 1153 I 1 IO_AE11
+bit 1152 O 1 IO_AE11 1151 1 Z
+bit 1151 C 1 *
+bit 1150 I 1 IO_AB11
+bit 1149 O 1 IO_AB11 1148 1 Z
+bit 1148 C 1 *
+bit 1147 I 1 IO_AA11
+bit 1146 O 1 IO_AA11 1145 1 Z
+bit 1145 C 1 *
+bit 1144 O 1 *
+bit 1143 O 1 *
+bit 1142 O 1 *
+bit 1141 I 1 IO_Y11
+bit 1140 O 1 IO_Y11 1139 1 Z
+bit 1139 C 1 *
+bit 1138 I 1 IO_W11
+bit 1137 O 1 IO_W11 1136 1 Z
+bit 1136 C 1 *
+bit 1135 I 1 IO_AF10
+bit 1134 O 1 IO_AF10 1133 1 Z
+bit 1133 C 1 *
+bit 1132 I 1 IO_AE10
+bit 1131 O 1 IO_AE10 1130 1 Z
+bit 1130 C 1 *
+bit 1129 I 1 IO_AD10
+bit 1128 O 1 IO_AD10 1127 1 Z
+bit 1127 C 1 *
+bit 1126 I 1 IO_AC10
+bit 1125 O 1 IO_AC10 1124 1 Z
+bit 1124 C 1 *
+bit 1123 I 1 IO_AB10
+bit 1122 O 1 IO_AB10 1121 1 Z
+bit 1121 C 1 *
+bit 1120 O 1 *
+bit 1119 O 1 *
+bit 1118 O 1 *
+bit 1117 O 1 *
+bit 1116 O 1 *
+bit 1115 O 1 *
+bit 1114 O 1 *
+bit 1113 O 1 *
+bit 1112 O 1 *
+bit 1111 O 1 *
+bit 1110 O 1 *
+bit 1109 O 1 *
+bit 1108 O 1 *
+bit 1107 O 1 *
+bit 1106 O 1 *
+bit 1105 I 1 IO_AA10
+bit 1104 O 1 IO_AA10 1103 1 Z
+bit 1103 C 1 *
+bit 1102 I 1 IO_Y10
+bit 1101 O 1 IO_Y10 1100 1 Z
+bit 1100 C 1 *
+bit 1099 O 1 *
+bit 1098 O 1 *
+bit 1097 O 1 *
+bit 1096 I 1 IO_AE9
+bit 1095 O 1 IO_AE9 1094 1 Z
+bit 1094 C 1 *
+bit 1093 I 1 IO_AD9
+bit 1092 O 1 IO_AD9 1091 1 Z
+bit 1091 C 1 *
+bit 1090 I 1 IO_AC9
+bit 1089 O 1 IO_AC9 1088 1 Z
+bit 1088 C 1 *
+bit 1087 O 1 *
+bit 1086 O 1 *
+bit 1085 O 1 *
+bit 1084 I 1 IO_AB9
+bit 1083 O 1 IO_AB9 1082 1 Z
+bit 1082 C 1 *
+bit 1081 I 1 IO_AA9
+bit 1080 O 1 IO_AA9 1079 1 Z
+bit 1079 C 1 *
+bit 1078 I 1 IO_Y9
+bit 1077 O 1 IO_Y9 1076 1 Z
+bit 1076 C 1 *
+bit 1075 I 1 IO_AF8
+bit 1074 O 1 IO_AF8 1073 1 Z
+bit 1073 C 1 *
+bit 1072 I 1 IO_AE8
+bit 1071 O 1 IO_AE8 1070 1 Z
+bit 1070 C 1 *
+bit 1069 O 1 *
+bit 1068 O 1 *
+bit 1067 O 1 *
+bit 1066 O 1 *
+bit 1065 O 1 *
+bit 1064 O 1 *
+bit 1063 O 1 *
+bit 1062 O 1 *
+bit 1061 O 1 *
+bit 1060 O 1 *
+bit 1059 O 1 *
+bit 1058 O 1 *
+bit 1057 O 1 *
+bit 1056 O 1 *
+bit 1055 O 1 *
+bit 1054 O 1 *
+bit 1053 O 1 *
+bit 1052 O 1 *
+bit 1051 I 1 IO_AD8
+bit 1050 O 1 IO_AD8 1049 1 Z
+bit 1049 C 1 *
+bit 1048 I 1 IO_AC8
+bit 1047 O 1 IO_AC8 1046 1 Z
+bit 1046 C 1 *
+bit 1045 I 1 IO_AB8
+bit 1044 O 1 IO_AB8 1043 1 Z
+bit 1043 C 1 *
+bit 1042 I 1 IO_AA8
+bit 1041 O 1 IO_AA8 1040 1 Z
+bit 1040 C 1 *
+bit 1039 I 1 IO_Y8
+bit 1038 O 1 IO_Y8 1037 1 Z
+bit 1037 C 1 *
+bit 1036 I 1 IO_AF7
+bit 1035 O 1 IO_AF7 1034 1 Z
+bit 1034 C 1 *
+bit 1033 I 1 IO_AE7
+bit 1032 O 1 IO_AE7 1031 1 Z
+bit 1031 C 1 *
+bit 1030 I 1 IO_AC7
+bit 1029 O 1 IO_AC7 1028 1 Z
+bit 1028 C 1 *
+bit 1027 I 1 IO_AB7
+bit 1026 O 1 IO_AB7 1025 1 Z
+bit 1025 C 1 *
+bit 1024 I 1 IO_AA7
+bit 1023 O 1 IO_AA7 1022 1 Z
+bit 1022 C 1 *
+bit 1021 I 1 IO_AF6
+bit 1020 O 1 IO_AF6 1019 1 Z
+bit 1019 C 1 *
+bit 1018 I 1 IO_AE6
+bit 1017 O 1 IO_AE6 1016 1 Z
+bit 1016 C 1 *
+bit 1015 I 1 IO_AD6
+bit 1014 O 1 IO_AD6 1013 1 Z
+bit 1013 C 1 *
+bit 1012 I 1 IO_AC6
+bit 1011 O 1 IO_AC6 1010 1 Z
+bit 1010 C 1 *
+bit 1009 I 1 IO_AF5
+bit 1008 O 1 IO_AF5 1007 1 Z
+bit 1007 C 1 *
+bit 1006 I 1 IO_AE5
+bit 1005 O 1 IO_AE5 1004 1 Z
+bit 1004 C 1 *
+bit 1003 I 1 IO_AD5
+bit 1002 O 1 IO_AD5 1001 1 Z
+bit 1001 C 1 *
+bit 1000 I 1 IO_AB6
+bit 999 O 1 IO_AB6 998 1 Z
+bit 998 C 1 *
+bit 997 I 1 IO_AA6
+bit 996 O 1 IO_AA6 995 1 Z
+bit 995 C 1 *
+bit 994 I 1 IO_AF4
+bit 993 O 1 IO_AF4 992 1 Z
+bit 992 C 1 *
+bit 991 I 1 IO_AE4
+bit 990 O 1 IO_AE4 989 1 Z
+bit 989 C 1 *
+bit 988 I 1 IO_AD4
+bit 987 O 1 IO_AD4 986 1 Z
+bit 986 C 1 *
+bit 985 O 1 *
+bit 984 O 1 *
+bit 983 O 1 *
+bit 982 O 1 *
+bit 981 O 1 *
+bit 980 O 1 *
+bit 979 O 1 *
+bit 978 O 1 *
+bit 977 O 1 *
+bit 976 O 1 *
+bit 975 O 1 *
+bit 974 O 1 *
+bit 973 O 1 *
+bit 972 O 1 *
+bit 971 O 1 *
+bit 970 I 1 IO_AC5
+bit 969 O 1 IO_AC5 968 1 Z
+bit 968 C 1 *
+bit 967 I 1 IO_AB5
+bit 966 O 1 IO_AB5 965 1 Z
+bit 965 C 1 *
+bit 964 I 1 M2_AF3
+bit 963 I 1 M0_AE3
+bit 962 I 1 M1_AC3
+bit 961 I 1 IO_AD2
+bit 960 O 1 IO_AD2 959 1 Z
+bit 959 C 1 *
+bit 958 I 1 IO_AD1
+bit 957 O 1 IO_AD1 956 1 Z
+bit 956 C 1 *
+bit 955 I 1 IO_AB4
+bit 954 O 1 IO_AB4 953 1 Z
+bit 953 C 1 *
+bit 952 I 1 IO_AB3
+bit 951 O 1 IO_AB3 950 1 Z
+bit 950 C 1 *
+bit 949 I 1 IO_AC2
+bit 948 O 1 IO_AC2 947 1 Z
+bit 947 C 1 *
+bit 946 I 1 IO_AC1
+bit 945 O 1 IO_AC1 944 1 Z
+bit 944 C 1 *
+bit 943 I 1 IO_AA5
+bit 942 O 1 IO_AA5 941 1 Z
+bit 941 C 1 *
+bit 940 O 1 *
+bit 939 O 1 *
+bit 938 O 1 *
+bit 937 I 1 IO_AB2
+bit 936 O 1 IO_AB2 935 1 Z
+bit 935 C 1 *
+bit 934 I 1 IO_AB1
+bit 933 O 1 IO_AB1 932 1 Z
+bit 932 C 1 *
+bit 931 I 1 IO_Y7
+bit 930 O 1 IO_Y7 929 1 Z
+bit 929 C 1 *
+bit 928 I 1 IO_Y6
+bit 927 O 1 IO_Y6 926 1 Z
+bit 926 C 1 *
+bit 925 I 1 IO_AA4
+bit 924 O 1 IO_AA4 923 1 Z
+bit 923 C 1 *
+bit 922 I 1 IO_AA3
+bit 921 O 1 IO_AA3 920 1 Z
+bit 920 C 1 *
+bit 919 I 1 IO_Y5
+bit 918 O 1 IO_Y5 917 1 Z
+bit 917 C 1 *
+bit 916 I 1 IO_Y4
+bit 915 O 1 IO_Y4 914 1 Z
+bit 914 C 1 *
+bit 913 I 1 IO_AA2
+bit 912 O 1 IO_AA2 911 1 Z
+bit 911 C 1 *
+bit 910 I 1 IO_AA1
+bit 909 O 1 IO_AA1 908 1 Z
+bit 908 C 1 *
+bit 907 I 1 IO_Y2
+bit 906 O 1 IO_Y2 905 1 Z
+bit 905 C 1 *
+bit 904 I 1 IO_Y1
+bit 903 O 1 IO_Y1 902 1 Z
+bit 902 C 1 *
+bit 901 O 1 *
+bit 900 O 1 *
+bit 899 O 1 *
+bit 898 O 1 *
+bit 897 O 1 *
+bit 896 O 1 *
+bit 895 O 1 *
+bit 894 O 1 *
+bit 893 O 1 *
+bit 892 O 1 *
+bit 891 O 1 *
+bit 890 O 1 *
+bit 889 O 1 *
+bit 888 O 1 *
+bit 887 O 1 *
+bit 886 O 1 *
+bit 885 O 1 *
+bit 884 O 1 *
+bit 883 I 1 IO_W7
+bit 882 O 1 IO_W7 881 1 Z
+bit 881 C 1 *
+bit 880 I 1 IO_W6
+bit 879 O 1 IO_W6 878 1 Z
+bit 878 C 1 *
+bit 877 O 1 *
+bit 876 O 1 *
+bit 875 O 1 *
+bit 874 O 1 *
+bit 873 O 1 *
+bit 872 O 1 *
+bit 871 I 1 IO_V6
+bit 870 O 1 IO_V6 869 1 Z
+bit 869 C 1 *
+bit 868 I 1 IO_W5
+bit 867 O 1 IO_W5 866 1 Z
+bit 866 C 1 *
+bit 865 I 1 IO_W4
+bit 864 O 1 IO_W4 863 1 Z
+bit 863 C 1 *
+bit 862 I 1 IO_W3
+bit 861 O 1 IO_W3 860 1 Z
+bit 860 C 1 *
+bit 859 O 1 *
+bit 858 O 1 *
+bit 857 O 1 *
+bit 856 O 1 *
+bit 855 O 1 *
+bit 854 O 1 *
+bit 853 I 1 IO_W2
+bit 852 O 1 IO_W2 851 1 Z
+bit 851 C 1 *
+bit 850 I 1 IO_W1
+bit 849 O 1 IO_W1 848 1 Z
+bit 848 C 1 *
+bit 847 I 1 IO_V7
+bit 846 O 1 IO_V7 845 1 Z
+bit 845 C 1 *
+bit 844 I 1 IO_U7
+bit 843 O 1 IO_U7 842 1 Z
+bit 842 C 1 *
+bit 841 I 1 IO_V5
+bit 840 O 1 IO_V5 839 1 Z
+bit 839 C 1 *
+bit 838 I 1 IO_V4
+bit 837 O 1 IO_V4 836 1 Z
+bit 836 C 1 *
+bit 835 I 1 IO_V3
+bit 834 O 1 IO_V3 833 1 Z
+bit 833 C 1 *
+bit 832 I 1 IO_V2
+bit 831 O 1 IO_V2 830 1 Z
+bit 830 C 1 *
+bit 829 I 1 IO_U6
+bit 828 O 1 IO_U6 827 1 Z
+bit 827 C 1 *
+bit 826 I 1 IO_U5
+bit 825 O 1 IO_U5 824 1 Z
+bit 824 C 1 *
+bit 823 I 1 IO_U4
+bit 822 O 1 IO_U4 821 1 Z
+bit 821 C 1 *
+bit 820 I 1 IO_U3
+bit 819 O 1 IO_U3 818 1 Z
+bit 818 C 1 *
+bit 817 O 1 *
+bit 816 O 1 *
+bit 815 O 1 *
+bit 814 O 1 *
+bit 813 O 1 *
+bit 812 O 1 *
+bit 811 I 1 IO_U2
+bit 810 O 1 IO_U2 809 1 Z
+bit 809 C 1 *
+bit 808 I 1 IO_U1
+bit 807 O 1 IO_U1 806 1 Z
+bit 806 C 1 *
+bit 805 I 1 IO_T8
+bit 804 O 1 IO_T8 803 1 Z
+bit 803 C 1 *
+bit 802 I 1 IO_T7
+bit 801 O 1 IO_T7 800 1 Z
+bit 800 C 1 *
+bit 799 I 1 IO_T6
+bit 798 O 1 IO_T6 797 1 Z
+bit 797 C 1 *
+bit 796 I 1 IO_T5
+bit 795 O 1 IO_T5 794 1 Z
+bit 794 C 1 *
+bit 793 I 1 IO_T2
+bit 792 O 1 IO_T2 791 1 Z
+bit 791 C 1 *
+bit 790 I 1 IO_T1
+bit 789 O 1 IO_T1 788 1 Z
+bit 788 C 1 *
+bit 787 O 1 *
+bit 786 O 1 *
+bit 785 O 1 *
+bit 784 O 1 *
+bit 783 O 1 *
+bit 782 O 1 *
+bit 781 I 1 IO_R8
+bit 780 O 1 IO_R8 779 1 Z
+bit 779 C 1 *
+bit 778 I 1 IO_R7
+bit 777 O 1 IO_R7 776 1 Z
+bit 776 C 1 *
+bit 775 I 1 IO_R6
+bit 774 O 1 IO_R6 773 1 Z
+bit 773 C 1 *
+bit 772 I 1 IO_R5
+bit 771 O 1 IO_R5 770 1 Z
+bit 770 C 1 *
+bit 769 I 1 IO_T4
+bit 768 O 1 IO_T4 767 1 Z
+bit 767 C 1 *
+bit 766 I 1 IO_R3
+bit 765 O 1 IO_R3 764 1 Z
+bit 764 C 1 *
+bit 763 I 1 IO_R2
+bit 762 O 1 IO_R2 761 1 Z
+bit 761 C 1 *
+bit 760 I 1 IO_R1
+bit 759 O 1 IO_R1 758 1 Z
+bit 758 C 1 *
+bit 757 I 1 IO_P8
+bit 756 O 1 IO_P8 755 1 Z
+bit 755 C 1 *
+bit 754 I 1 IO_P7
+bit 753 O 1 IO_P7 752 1 Z
+bit 752 C 1 *
+bit 751 O 1 *
+bit 750 O 1 *
+bit 749 O 1 *
+bit 748 O 1 *
+bit 747 O 1 *
+bit 746 O 1 *
+bit 745 O 1 *
+bit 744 O 1 *
+bit 743 O 1 *
+bit 742 O 1 *
+bit 741 O 1 *
+bit 740 O 1 *
+bit 739 I 1 IO_P6
+bit 738 O 1 IO_P6 737 1 Z
+bit 737 C 1 *
+bit 736 I 1 IO_P5
+bit 735 O 1 IO_P5 734 1 Z
+bit 734 C 1 *
+bit 733 I 1 IO_P4
+bit 732 O 1 IO_P4 731 1 Z
+bit 731 C 1 *
+bit 730 I 1 IO_P3
+bit 729 O 1 IO_P3 728 1 Z
+bit 728 C 1 *
+bit 727 I 1 IO_P2
+bit 726 O 1 IO_P2 725 1 Z
+bit 725 C 1 *
+bit 724 I 1 IO_P1
+bit 723 O 1 IO_P1 722 1 Z
+bit 722 C 1 *
+bit 721 I 1 IO_N1
+bit 720 O 1 IO_N1 719 1 Z
+bit 719 C 1 *
+bit 718 I 1 IO_N2
+bit 717 O 1 IO_N2 716 1 Z
+bit 716 C 1 *
+bit 715 I 1 IO_N3
+bit 714 O 1 IO_N3 713 1 Z
+bit 713 C 1 *
+bit 712 I 1 IO_N4
+bit 711 O 1 IO_N4 710 1 Z
+bit 710 C 1 *
+bit 709 I 1 IO_N5
+bit 708 O 1 IO_N5 707 1 Z
+bit 707 C 1 *
+bit 706 I 1 IO_N6
+bit 705 O 1 IO_N6 704 1 Z
+bit 704 C 1 *
+bit 703 O 1 *
+bit 702 O 1 *
+bit 701 O 1 *
+bit 700 O 1 *
+bit 699 O 1 *
+bit 698 O 1 *
+bit 697 O 1 *
+bit 696 O 1 *
+bit 695 O 1 *
+bit 694 O 1 *
+bit 693 O 1 *
+bit 692 O 1 *
+bit 691 I 1 IO_N7
+bit 690 O 1 IO_N7 689 1 Z
+bit 689 C 1 *
+bit 688 I 1 IO_N8
+bit 687 O 1 IO_N8 686 1 Z
+bit 686 C 1 *
+bit 685 I 1 IO_M1
+bit 684 O 1 IO_M1 683 1 Z
+bit 683 C 1 *
+bit 682 I 1 IO_M2
+bit 681 O 1 IO_M2 680 1 Z
+bit 680 C 1 *
+bit 679 I 1 IO_M3
+bit 678 O 1 IO_M3 677 1 Z
+bit 677 C 1 *
+bit 676 I 1 IO_L4
+bit 675 O 1 IO_L4 674 1 Z
+bit 674 C 1 *
+bit 673 I 1 IO_M6
+bit 672 O 1 IO_M6 671 1 Z
+bit 671 C 1 *
+bit 670 I 1 IO_M5
+bit 669 O 1 IO_M5 668 1 Z
+bit 668 C 1 *
+bit 667 I 1 IO_M7
+bit 666 O 1 IO_M7 665 1 Z
+bit 665 C 1 *
+bit 664 I 1 IO_M8
+bit 663 O 1 IO_M8 662 1 Z
+bit 662 C 1 *
+bit 661 O 1 *
+bit 660 O 1 *
+bit 659 O 1 *
+bit 658 O 1 *
+bit 657 O 1 *
+bit 656 O 1 *
+bit 655 I 1 IO_L1
+bit 654 O 1 IO_L1 653 1 Z
+bit 653 C 1 *
+bit 652 I 1 IO_L2
+bit 651 O 1 IO_L2 650 1 Z
+bit 650 C 1 *
+bit 649 I 1 IO_L5
+bit 648 O 1 IO_L5 647 1 Z
+bit 647 C 1 *
+bit 646 I 1 IO_L6
+bit 645 O 1 IO_L6 644 1 Z
+bit 644 C 1 *
+bit 643 I 1 IO_L7
+bit 642 O 1 IO_L7 641 1 Z
+bit 641 C 1 *
+bit 640 I 1 IO_L8
+bit 639 O 1 IO_L8 638 1 Z
+bit 638 C 1 *
+bit 637 I 1 IO_K1
+bit 636 O 1 IO_K1 635 1 Z
+bit 635 C 1 *
+bit 634 I 1 IO_K2
+bit 633 O 1 IO_K2 632 1 Z
+bit 632 C 1 *
+bit 631 O 1 *
+bit 630 O 1 *
+bit 629 O 1 *
+bit 628 O 1 *
+bit 627 O 1 *
+bit 626 O 1 *
+bit 625 I 1 IO_K3
+bit 624 O 1 IO_K3 623 1 Z
+bit 623 C 1 *
+bit 622 I 1 IO_K4
+bit 621 O 1 IO_K4 620 1 Z
+bit 620 C 1 *
+bit 619 I 1 IO_K5
+bit 618 O 1 IO_K5 617 1 Z
+bit 617 C 1 *
+bit 616 I 1 IO_K6
+bit 615 O 1 IO_K6 614 1 Z
+bit 614 C 1 *
+bit 613 I 1 IO_J2
+bit 612 O 1 IO_J2 611 1 Z
+bit 611 C 1 *
+bit 610 I 1 IO_J3
+bit 609 O 1 IO_J3 608 1 Z
+bit 608 C 1 *
+bit 607 I 1 IO_J4
+bit 606 O 1 IO_J4 605 1 Z
+bit 605 C 1 *
+bit 604 I 1 IO_J5
+bit 603 O 1 IO_J5 602 1 Z
+bit 602 C 1 *
+bit 601 I 1 IO_K7
+bit 600 O 1 IO_K7 599 1 Z
+bit 599 C 1 *
+bit 598 I 1 IO_J7
+bit 597 O 1 IO_J7 596 1 Z
+bit 596 C 1 *
+bit 595 I 1 IO_H1
+bit 594 O 1 IO_H1 593 1 Z
+bit 593 C 1 *
+bit 592 I 1 IO_H2
+bit 591 O 1 IO_H2 590 1 Z
+bit 590 C 1 *
+bit 589 O 1 *
+bit 588 O 1 *
+bit 587 O 1 *
+bit 586 O 1 *
+bit 585 O 1 *
+bit 584 O 1 *
+bit 583 I 1 IO_H3
+bit 582 O 1 IO_H3 581 1 Z
+bit 581 C 1 *
+bit 580 I 1 IO_H4
+bit 579 O 1 IO_H4 578 1 Z
+bit 578 C 1 *
+bit 577 I 1 IO_J6
+bit 576 O 1 IO_J6 575 1 Z
+bit 575 C 1 *
+bit 574 I 1 IO_H5
+bit 573 O 1 IO_H5 572 1 Z
+bit 572 C 1 *
+bit 571 O 1 *
+bit 570 O 1 *
+bit 569 O 1 *
+bit 568 O 1 *
+bit 567 O 1 *
+bit 566 O 1 *
+bit 565 I 1 IO_G1
+bit 564 O 1 IO_G1 563 1 Z
+bit 563 C 1 *
+bit 562 I 1 IO_G2
+bit 561 O 1 IO_G2 560 1 Z
+bit 560 C 1 *
+bit 559 O 1 *
+bit 558 O 1 *
+bit 557 O 1 *
+bit 556 O 1 *
+bit 555 O 1 *
+bit 554 O 1 *
+bit 553 O 1 *
+bit 552 O 1 *
+bit 551 O 1 *
+bit 550 O 1 *
+bit 549 O 1 *
+bit 548 O 1 *
+bit 547 O 1 *
+bit 546 O 1 *
+bit 545 O 1 *
+bit 544 O 1 *
+bit 543 O 1 *
+bit 542 O 1 *
+bit 541 I 1 IO_H6
+bit 540 O 1 IO_H6 539 1 Z
+bit 539 C 1 *
+bit 538 I 1 IO_H7
+bit 537 O 1 IO_H7 536 1 Z
+bit 536 C 1 *
+bit 535 I 1 IO_F1
+bit 534 O 1 IO_F1 533 1 Z
+bit 533 C 1 *
+bit 532 I 1 IO_F2
+bit 531 O 1 IO_F2 530 1 Z
+bit 530 C 1 *
+bit 529 I 1 IO_G4
+bit 528 O 1 IO_G4 527 1 Z
+bit 527 C 1 *
+bit 526 I 1 IO_G5
+bit 525 O 1 IO_G5 524 1 Z
+bit 524 C 1 *
+bit 523 I 1 IO_F3
+bit 522 O 1 IO_F3 521 1 Z
+bit 521 C 1 *
+bit 520 I 1 IO_F4
+bit 519 O 1 IO_F4 518 1 Z
+bit 518 C 1 *
+bit 517 I 1 IO_E1
+bit 516 O 1 IO_E1 515 1 Z
+bit 515 C 1 *
+bit 514 I 1 IO_E2
+bit 513 O 1 IO_E2 512 1 Z
+bit 512 C 1 *
+bit 511 I 1 IO_G6
+bit 510 O 1 IO_G6 509 1 Z
+bit 509 C 1 *
+bit 508 I 1 IO_G7
+bit 507 O 1 IO_G7 506 1 Z
+bit 506 C 1 *
+bit 505 O 1 *
+bit 504 O 1 *
+bit 503 O 1 *
+bit 502 O 1 *
+bit 501 O 1 *
+bit 500 O 1 *
+bit 499 I 1 IO_D1
+bit 498 O 1 IO_D1 497 1 Z
+bit 497 C 1 *
+bit 496 I 1 IO_D2
+bit 495 O 1 IO_D2 494 1 Z
+bit 494 C 1 *
+bit 493 I 1 IO_E3
+bit 492 O 1 IO_E3 491 1 Z
+bit 491 C 1 *
+bit 490 I 1 IO_E4
+bit 489 O 1 IO_E4 488 1 Z
+bit 488 C 1 *
+bit 487 I 1 IO_F5
+bit 486 O 1 IO_F5 485 1 Z
+bit 485 C 1 *
+bit 484 I 1 IO_F6
+bit 483 O 1 IO_F6 482 1 Z
+bit 482 C 1 *
+bit 481 O 1 *
+bit 480 I 1 HSWAP_EN_C2
+bit 479 I 1 IO_B3
+bit 478 O 1 IO_B3 477 1 Z
+bit 477 C 1 *
+bit 476 I 1 IO_E5
+bit 475 O 1 IO_E5 474 1 Z
+bit 474 C 1 *
+bit 473 I 1 IO_D5
+bit 472 O 1 IO_D5 471 1 Z
+bit 471 C 1 *
+bit 470 O 1 *
+bit 469 O 1 *
+bit 468 O 1 *
+bit 467 O 1 *
+bit 466 O 1 *
+bit 465 O 1 *
+bit 464 O 1 *
+bit 463 O 1 *
+bit 462 O 1 *
+bit 461 O 1 *
+bit 460 O 1 *
+bit 459 O 1 *
+bit 458 O 1 *
+bit 457 O 1 *
+bit 456 O 1 *
+bit 455 O 1 *
+bit 454 O 1 *
+bit 453 O 1 *
+bit 452 I 1 IO_A3
+bit 451 O 1 IO_A3 450 1 Z
+bit 450 C 1 *
+bit 449 I 1 IO_C4
+bit 448 O 1 IO_C4 447 1 Z
+bit 447 C 1 *
+bit 446 I 1 IO_B4
+bit 445 O 1 IO_B4 444 1 Z
+bit 444 C 1 *
+bit 443 I 1 IO_A4
+bit 442 O 1 IO_A4 441 1 Z
+bit 441 C 1 *
+bit 440 I 1 IO_C5
+bit 439 O 1 IO_C5 438 1 Z
+bit 438 C 1 *
+bit 437 I 1 IO_B5
+bit 436 O 1 IO_B5 435 1 Z
+bit 435 C 1 *
+bit 434 I 1 IO_A5
+bit 433 O 1 IO_A5 432 1 Z
+bit 432 C 1 *
+bit 431 I 1 IO_E6
+bit 430 O 1 IO_E6 429 1 Z
+bit 429 C 1 *
+bit 428 I 1 IO_D6
+bit 427 O 1 IO_D6 426 1 Z
+bit 426 C 1 *
+bit 425 I 1 IO_C6
+bit 424 O 1 IO_C6 423 1 Z
+bit 423 C 1 *
+bit 422 I 1 IO_B6
+bit 421 O 1 IO_B6 420 1 Z
+bit 420 C 1 *
+bit 419 I 1 IO_A6
+bit 418 O 1 IO_A6 417 1 Z
+bit 417 C 1 *
+bit 416 I 1 IO_E7
+bit 415 O 1 IO_E7 414 1 Z
+bit 414 C 1 *
+bit 413 I 1 IO_D7
+bit 412 O 1 IO_D7 411 1 Z
+bit 411 C 1 *
+bit 410 I 1 IO_B7
+bit 409 O 1 IO_B7 408 1 Z
+bit 408 C 1 *
+bit 407 I 1 IO_A7
+bit 406 O 1 IO_A7 405 1 Z
+bit 405 C 1 *
+bit 404 I 1 IO_F7
+bit 403 O 1 IO_F7 402 1 Z
+bit 402 C 1 *
+bit 401 I 1 IO_G8
+bit 400 O 1 IO_G8 399 1 Z
+bit 399 C 1 *
+bit 398 I 1 IO_F8
+bit 397 O 1 IO_F8 396 1 Z
+bit 396 C 1 *
+bit 395 I 1 IO_E8
+bit 394 O 1 IO_E8 393 1 Z
+bit 393 C 1 *
+bit 392 I 1 IO_D8
+bit 391 O 1 IO_D8 390 1 Z
+bit 390 C 1 *
+bit 389 O 1 *
+bit 388 O 1 *
+bit 387 O 1 *
+bit 386 O 1 *
+bit 385 O 1 *
+bit 384 O 1 *
+bit 383 O 1 *
+bit 382 O 1 *
+bit 381 O 1 *
+bit 380 O 1 *
+bit 379 O 1 *
+bit 378 O 1 *
+bit 377 O 1 *
+bit 376 O 1 *
+bit 375 O 1 *
+bit 374 I 1 IO_C8
+bit 373 O 1 IO_C8 372 1 Z
+bit 372 C 1 *
+bit 371 I 1 IO_B8
+bit 370 O 1 IO_B8 369 1 Z
+bit 369 C 1 *
+bit 368 I 1 IO_A8
+bit 367 O 1 IO_A8 366 1 Z
+bit 366 C 1 *
+bit 365 I 1 IO_G9
+bit 364 O 1 IO_G9 363 1 Z
+bit 363 C 1 *
+bit 362 I 1 IO_F9
+bit 361 O 1 IO_F9 360 1 Z
+bit 360 C 1 *
+bit 359 O 1 *
+bit 358 O 1 *
+bit 357 O 1 *
+bit 356 I 1 IO_E9
+bit 355 O 1 IO_E9 354 1 Z
+bit 354 C 1 *
+bit 353 I 1 IO_D9
+bit 352 O 1 IO_D9 351 1 Z
+bit 351 C 1 *
+bit 350 I 1 IO_C9
+bit 349 O 1 IO_C9 348 1 Z
+bit 348 C 1 *
+bit 347 I 1 IO_B9
+bit 346 O 1 IO_B9 345 1 Z
+bit 345 C 1 *
+bit 344 I 1 IO_G10
+bit 343 O 1 IO_G10 342 1 Z
+bit 342 C 1 *
+bit 341 I 1 IO_F10
+bit 340 O 1 IO_F10 339 1 Z
+bit 339 C 1 *
+bit 338 I 1 IO_E10
+bit 337 O 1 IO_E10 336 1 Z
+bit 336 C 1 *
+bit 335 O 1 *
+bit 334 O 1 *
+bit 333 O 1 *
+bit 332 O 1 *
+bit 331 O 1 *
+bit 330 O 1 *
+bit 329 O 1 *
+bit 328 O 1 *
+bit 327 O 1 *
+bit 326 O 1 *
+bit 325 O 1 *
+bit 324 O 1 *
+bit 323 O 1 *
+bit 322 O 1 *
+bit 321 O 1 *
+bit 320 I 1 IO_D10
+bit 319 O 1 IO_D10 318 1 Z
+bit 318 C 1 *
+bit 317 I 1 IO_C10
+bit 316 O 1 IO_C10 315 1 Z
+bit 315 C 1 *
+bit 314 I 1 IO_H11
+bit 313 O 1 IO_H11 312 1 Z
+bit 312 C 1 *
+bit 311 I 1 IO_B10
+bit 310 O 1 IO_B10 309 1 Z
+bit 309 C 1 *
+bit 308 I 1 IO_A10
+bit 307 O 1 IO_A10 306 1 Z
+bit 306 C 1 *
+bit 305 I 1 IO_G11
+bit 304 O 1 IO_G11 303 1 Z
+bit 303 C 1 *
+bit 302 I 1 IO_F11
+bit 301 O 1 IO_F11 300 1 Z
+bit 300 C 1 *
+bit 299 O 1 *
+bit 298 O 1 *
+bit 297 O 1 *
+bit 296 I 1 IO_E11
+bit 295 O 1 IO_E11 294 1 Z
+bit 294 C 1 *
+bit 293 I 1 IO_D11
+bit 292 O 1 IO_D11 291 1 Z
+bit 291 C 1 *
+bit 290 I 1 IO_B11
+bit 289 O 1 IO_B11 288 1 Z
+bit 288 C 1 *
+bit 287 I 1 IO_A11
+bit 286 O 1 IO_A11 285 1 Z
+bit 285 C 1 *
+bit 284 I 1 IO_H12
+bit 283 O 1 IO_H12 282 1 Z
+bit 282 C 1 *
+bit 281 I 1 IO_G12
+bit 280 O 1 IO_G12 279 1 Z
+bit 279 C 1 *
+bit 278 I 1 IO_H13
+bit 277 O 1 IO_H13 276 1 Z
+bit 276 C 1 *
+bit 275 I 1 IO_F12
+bit 274 O 1 IO_F12 273 1 Z
+bit 273 C 1 *
+bit 272 I 1 IO_E12
+bit 271 O 1 IO_E12 270 1 Z
+bit 270 C 1 *
+bit 269 I 1 IO_C12
+bit 268 O 1 IO_C12 267 1 Z
+bit 267 C 1 *
+bit 266 I 1 IO_B12
+bit 265 O 1 IO_B12 264 1 Z
+bit 264 C 1 *
+bit 263 I 1 IO_A12
+bit 262 O 1 IO_A12 261 1 Z
+bit 261 C 1 *
+bit 260 I 1 IO_G13
+bit 259 O 1 IO_G13 258 1 Z
+bit 258 C 1 *
+bit 257 I 1 IO_F13
+bit 256 O 1 IO_F13 255 1 Z
+bit 255 C 1 *
+bit 254 I 1 IO_E13
+bit 253 O 1 IO_E13 252 1 Z
+bit 252 C 1 *
+bit 251 I 1 IO_D13
+bit 250 O 1 IO_D13 249 1 Z
+bit 249 C 1 *
+bit 248 I 1 IO_C13
+bit 247 O 1 IO_C13 246 1 Z
+bit 246 C 1 *
+bit 245 I 1 IO_B13
+bit 244 O 1 IO_B13 243 1 Z
+bit 243 C 1 *
+bit 242 I 1 IO_A13
+bit 241 O 1 IO_A13 240 1 Z
+bit 240 C 1 *
+bit 239 I 1 IO_A14
+bit 238 O 1 IO_A14 237 1 Z
+bit 237 C 1 *
+bit 236 I 1 IO_B14
+bit 235 O 1 IO_B14 234 1 Z
+bit 234 C 1 *
+bit 233 I 1 IO_C14
+bit 232 O 1 IO_C14 231 1 Z
+bit 231 C 1 *
+bit 230 I 1 IO_D14
+bit 229 O 1 IO_D14 228 1 Z
+bit 228 C 1 *
+bit 227 I 1 IO_E14
+bit 226 O 1 IO_E14 225 1 Z
+bit 225 C 1 *
+bit 224 I 1 IO_F14
+bit 223 O 1 IO_F14 222 1 Z
+bit 222 C 1 *
+bit 221 I 1 IO_G14
+bit 220 O 1 IO_G14 219 1 Z
+bit 219 C 1 *
+bit 218 I 1 IO_H14
+bit 217 O 1 IO_H14 216 1 Z
+bit 216 C 1 *
+bit 215 I 1 IO_A15
+bit 214 O 1 IO_A15 213 1 Z
+bit 213 C 1 *
+bit 212 I 1 IO_B15
+bit 211 O 1 IO_B15 210 1 Z
+bit 210 C 1 *
+bit 209 I 1 IO_C15
+bit 208 O 1 IO_C15 207 1 Z
+bit 207 C 1 *
+bit 206 I 1 IO_E15
+bit 205 O 1 IO_E15 204 1 Z
+bit 204 C 1 *
+bit 203 I 1 IO_F15
+bit 202 O 1 IO_F15 201 1 Z
+bit 201 C 1 *
+bit 200 I 1 IO_G15
+bit 199 O 1 IO_G15 198 1 Z
+bit 198 C 1 *
+bit 197 I 1 IO_H15
+bit 196 O 1 IO_H15 195 1 Z
+bit 195 C 1 *
+bit 194 I 1 IO_D16
+bit 193 O 1 IO_D16 192 1 Z
+bit 192 C 1 *
+bit 191 I 1 IO_A16
+bit 190 O 1 IO_A16 189 1 Z
+bit 189 C 1 *
+bit 188 I 1 IO_B16
+bit 187 O 1 IO_B16 186 1 Z
+bit 186 C 1 *
+bit 185 I 1 IO_E16
+bit 184 O 1 IO_E16 183 1 Z
+bit 183 C 1 *
+bit 182 I 1 IO_F16
+bit 181 O 1 IO_F16 180 1 Z
+bit 180 C 1 *
+bit 179 O 1 *
+bit 178 O 1 *
+bit 177 O 1 *
+bit 176 I 1 IO_G16
+bit 175 O 1 IO_G16 174 1 Z
+bit 174 C 1 *
+bit 173 I 1 IO_H16
+bit 172 O 1 IO_H16 171 1 Z
+bit 171 C 1 *
+bit 170 I 1 IO_A17
+bit 169 O 1 IO_A17 168 1 Z
+bit 168 C 1 *
+bit 167 I 1 IO_B17
+bit 166 O 1 IO_B17 165 1 Z
+bit 165 C 1 *
+bit 164 I 1 IO_C17
+bit 163 O 1 IO_C17 162 1 Z
+bit 162 C 1 *
+bit 161 I 1 IO_D17
+bit 160 O 1 IO_D17 159 1 Z
+bit 159 C 1 *
+bit 158 I 1 IO_E17
+bit 157 O 1 IO_E17 156 1 Z
+bit 156 C 1 *
+bit 155 O 1 *
+bit 154 O 1 *
+bit 153 O 1 *
+bit 152 O 1 *
+bit 151 O 1 *
+bit 150 O 1 *
+bit 149 O 1 *
+bit 148 O 1 *
+bit 147 O 1 *
+bit 146 O 1 *
+bit 145 O 1 *
+bit 144 O 1 *
+bit 143 O 1 *
+bit 142 O 1 *
+bit 141 O 1 *
+bit 140 I 1 IO_F17
+bit 139 O 1 IO_F17 138 1 Z
+bit 138 C 1 *
+bit 137 I 1 IO_G17
+bit 136 O 1 IO_G17 135 1 Z
+bit 135 C 1 *
+bit 134 O 1 *
+bit 133 O 1 *
+bit 132 O 1 *
+bit 131 I 1 IO_B18
+bit 130 O 1 IO_B18 129 1 Z
+bit 129 C 1 *
+bit 128 I 1 IO_C18
+bit 127 O 1 IO_C18 126 1 Z
+bit 126 C 1 *
+bit 125 I 1 IO_D18
+bit 124 O 1 IO_D18 123 1 Z
+bit 123 C 1 *
+bit 122 O 1 *
+bit 121 O 1 *
+bit 120 O 1 *
+bit 119 I 1 IO_E18
+bit 118 O 1 IO_E18 117 1 Z
+bit 117 C 1 *
+bit 116 I 1 IO_F18
+bit 115 O 1 IO_F18 114 1 Z
+bit 114 C 1 *
+bit 113 I 1 IO_G18
+bit 112 O 1 IO_G18 111 1 Z
+bit 111 C 1 *
+bit 110 I 1 IO_A19
+bit 109 O 1 IO_A19 108 1 Z
+bit 108 C 1 *
+bit 107 I 1 IO_B19
+bit 106 O 1 IO_B19 105 1 Z
+bit 105 C 1 *
+bit 104 O 1 *
+bit 103 O 1 *
+bit 102 O 1 *
+bit 101 O 1 *
+bit 100 O 1 *
+bit 99 O 1 *
+bit 98 O 1 *
+bit 97 O 1 *
+bit 96 O 1 *
+bit 95 O 1 *
+bit 94 O 1 *
+bit 93 O 1 *
+bit 92 O 1 *
+bit 91 O 1 *
+bit 90 O 1 *
+bit 89 O 1 *
+bit 88 O 1 *
+bit 87 O 1 *
+bit 86 I 1 IO_C19
+bit 85 O 1 IO_C19 84 1 Z
+bit 84 C 1 *
+bit 83 I 1 IO_D19
+bit 82 O 1 IO_D19 81 1 Z
+bit 81 C 1 *
+bit 80 I 1 IO_E19
+bit 79 O 1 IO_E19 78 1 Z
+bit 78 C 1 *
+bit 77 I 1 IO_F19
+bit 76 O 1 IO_F19 75 1 Z
+bit 75 C 1 *
+bit 74 I 1 IO_G19
+bit 73 O 1 IO_G19 72 1 Z
+bit 72 C 1 *
+bit 71 I 1 IO_A20
+bit 70 O 1 IO_A20 69 1 Z
+bit 69 C 1 *
+bit 68 I 1 IO_B20
+bit 67 O 1 IO_B20 66 1 Z
+bit 66 C 1 *
+bit 65 I 1 IO_D20
+bit 64 O 1 IO_D20 63 1 Z
+bit 63 C 1 *
+bit 62 I 1 IO_E20
+bit 61 O 1 IO_E20 60 1 Z
+bit 60 C 1 *
+bit 59 I 1 IO_F20
+bit 58 O 1 IO_F20 57 1 Z
+bit 57 C 1 *
+bit 56 I 1 IO_A21
+bit 55 O 1 IO_A21 54 1 Z
+bit 54 C 1 *
+bit 53 I 1 IO_B21
+bit 52 O 1 IO_B21 51 1 Z
+bit 51 C 1 *
+bit 50 I 1 IO_C21
+bit 49 O 1 IO_C21 48 1 Z
+bit 48 C 1 *
+bit 47 I 1 IO_D21
+bit 46 O 1 IO_D21 45 1 Z
+bit 45 C 1 *
+bit 44 I 1 IO_A22
+bit 43 O 1 IO_A22 42 1 Z
+bit 42 C 1 *
+bit 41 I 1 IO_B22
+bit 40 O 1 IO_B22 39 1 Z
+bit 39 C 1 *
+bit 38 I 1 IO_C22
+bit 37 O 1 IO_C22 36 1 Z
+bit 36 C 1 *
+bit 35 I 1 IO_E21
+bit 34 O 1 IO_E21 33 1 Z
+bit 33 C 1 *
+bit 32 I 1 IO_F21
+bit 31 O 1 IO_F21 30 1 Z
+bit 30 C 1 *
+bit 29 I 1 IO_A23
+bit 28 O 1 IO_A23 27 1 Z
+bit 27 C 1 *
+bit 26 I 1 IO_B23
+bit 25 O 1 IO_B23 24 1 Z
+bit 24 C 1 *
+bit 23 I 1 IO_C23
+bit 22 O 1 IO_C23 21 1 Z
+bit 21 C 1 *
+bit 20 O 1 *
+bit 19 O 1 *
+bit 18 O 1 *
+bit 17 O 1 *
+bit 16 O 1 *
+bit 15 O 1 *
+bit 14 O 1 *
+bit 13 O 1 *
+bit 12 O 1 *
+bit 11 O 1 *
+bit 10 O 1 *
+bit 9 O 1 *
+bit 8 O 1 *
+bit 7 O 1 *
+bit 6 O 1 *
+bit 5 I 1 IO_D22
+bit 4 O 1 IO_D22 3 1 Z
+bit 3 C 1 *
+bit 2 I 1 IO_E22
+bit 1 O 1 IO_E22 0 1 Z
+bit 0 C 1 *
--- /dev/null
+signal GND1
+signal GND2
+signal GND3
+signal GND4
+signal GND5
+signal GND6
+signal GND7
+signal GND8
+signal GND9
+signal GND10
+signal GND11
+signal GND12
+signal GND13
+signal GND14
+signal GND15
+signal GND16
+signal GND17
+signal GND18
+signal GND19
+signal GND20
+signal GND21
+signal GND22
+signal GND23
+signal GND24
+signal GND25
+signal GND26
+signal GND27
+signal GND28
+signal GND29
+signal GND30
+signal GND31
+signal GND32
+signal GND33
+signal GND34
+signal GND35
+signal GND36
+signal GND37
+signal GND38
+signal GND39
+signal GND40
+signal GND41
+signal GND42
+signal GND43
+signal GND44
+signal GND45
+signal GND46
+signal GND47
+signal GND48
+signal GND49
+signal GND50
+signal GND51
+signal GND52
+signal GND53
+signal GND54
+signal GND55
+signal GND56
+signal GND57
+signal GND58
+signal GND59
+signal GND60
+signal GND61
+signal GND62
+signal GND63
+signal GND64
+signal GND65
+signal GND66
+signal GND67
+signal GND68
+signal GND69
+signal GND70
+signal GND71
+signal GND72
+signal GND73
+signal GND74
+signal GND75
+signal GND76
+signal GND77
+signal GND78
+signal GND79
+signal GND80
+signal GND81
+signal GND82
+signal GND83
+signal GND84
+signal GND85
+signal GND86
+signal GND87
+signal GND88
+signal GND89
+signal GND90
+signal GND91
+signal GND92
+signal GND93
+signal GND94
+signal GND95
+signal GND96
+signal GND97
+signal GND98
+signal GND99
+signal GND100
+signal GND101
+signal GND102
+signal GND103
+signal GND104
+signal GND105
+signal GND106
+signal GND107
+signal GND108
+signal GND109
+signal GND110
+signal GND111
+signal GND112
+signal GND113
+signal GND114
+signal GND115
+signal GND116
+signal GND117
+signal GND118
+signal GND119
+signal GND120
+signal NOCONNECT1
+signal NOCONNECT2
+signal NOCONNECT3
+signal NOCONNECT4
+signal NOCONNECT5
+signal NOCONNECT6
+signal NOCONNECT7
+signal NOCONNECT8
+signal CCLK_AH28
+signal DONE_AJ28
+signal HSWAP_EN_A3
+signal M0_AJ3
+signal M1_AH3
+signal M2_AK3
+signal PROG_B
+signal TCK
+signal TDI
+signal TDO
+signal TMS
+signal VCCAUX1
+signal VCCAUX2
+signal VCCAUX3
+signal VCCAUX4
+signal VCCAUX5
+signal VCCAUX6
+signal VCCAUX7
+signal VCCAUX8
+signal VCCAUX9
+signal VCCAUX10
+signal VCCAUX11
+signal VCCAUX12
+signal VCCAUX13
+signal VCCAUX14
+signal VCCAUX15
+signal VCCAUX16
+signal VCCAUX17
+signal VCCAUX18
+signal VCCAUX19
+signal VCCAUX20
+signal VCCAUX21
+signal VCCAUX22
+signal VCCAUX23
+signal VCCAUX24
+signal VCCINT1
+signal VCCINT2
+signal VCCINT3
+signal VCCINT4
+signal VCCINT5
+signal VCCINT6
+signal VCCINT7
+signal VCCINT8
+signal VCCINT9
+signal VCCINT10
+signal VCCINT11
+signal VCCINT12
+signal VCCINT13
+signal VCCINT14
+signal VCCINT15
+signal VCCINT16
+signal VCCINT17
+signal VCCINT18
+signal VCCINT19
+signal VCCINT20
+signal VCCINT21
+signal VCCINT22
+signal VCCINT23
+signal VCCINT24
+signal VCCINT25
+signal VCCINT26
+signal VCCINT27
+signal VCCINT28
+signal VCCINT29
+signal VCCINT30
+signal VCCINT31
+signal VCCINT32
+signal VCCO01
+signal VCCO02
+signal VCCO03
+signal VCCO04
+signal VCCO05
+signal VCCO06
+signal VCCO07
+signal VCCO08
+signal VCCO09
+signal VCCO010
+signal VCCO11
+signal VCCO12
+signal VCCO13
+signal VCCO14
+signal VCCO15
+signal VCCO16
+signal VCCO17
+signal VCCO18
+signal VCCO19
+signal VCCO110
+signal VCCO21
+signal VCCO22
+signal VCCO23
+signal VCCO24
+signal VCCO25
+signal VCCO26
+signal VCCO27
+signal VCCO28
+signal VCCO29
+signal VCCO210
+signal VCCO31
+signal VCCO32
+signal VCCO33
+signal VCCO34
+signal VCCO35
+signal VCCO36
+signal VCCO37
+signal VCCO38
+signal VCCO39
+signal VCCO310
+signal VCCO41
+signal VCCO42
+signal VCCO43
+signal VCCO44
+signal VCCO45
+signal VCCO46
+signal VCCO47
+signal VCCO48
+signal VCCO49
+signal VCCO410
+signal VCCO51
+signal VCCO52
+signal VCCO53
+signal VCCO54
+signal VCCO55
+signal VCCO56
+signal VCCO57
+signal VCCO58
+signal VCCO59
+signal VCCO510
+signal VCCO61
+signal VCCO62
+signal VCCO63
+signal VCCO64
+signal VCCO65
+signal VCCO66
+signal VCCO67
+signal VCCO68
+signal VCCO69
+signal VCCO610
+signal VCCO71
+signal VCCO72
+signal VCCO73
+signal VCCO74
+signal VCCO75
+signal VCCO76
+signal VCCO77
+signal VCCO78
+signal VCCO79
+signal VCCO710
+signal IO_A4
+signal IO_A5
+signal IO_A8
+signal IO_A11
+signal IO_A12
+signal IO_A13
+signal IO_A15
+signal IO_A16
+signal IO_A19
+signal IO_A20
+signal IO_A22
+signal IO_A23
+signal IO_A24
+signal IO_A26
+signal IO_A27
+signal IO_B4
+signal IO_B5
+signal IO_B6
+signal IO_B8
+signal IO_B10
+signal IO_B11
+signal IO_B12
+signal IO_B13
+signal IO_B14
+signal IO_B15
+signal IO_B16
+signal IO_B17
+signal IO_B19
+signal IO_B20
+signal IO_B21
+signal IO_B22
+signal IO_B23
+signal IO_B24
+signal IO_B25
+signal IO_B26
+signal IO_B27
+signal IO_C1
+signal IO_C2
+signal IO_C4
+signal IO_C6
+signal IO_C7
+signal IO_C8
+signal IO_C10
+signal IO_C11
+signal IO_C12
+signal IO_C14
+signal IO_C15
+signal IO_C16
+signal IO_C17
+signal IO_C19
+signal IO_C20
+signal IO_C21
+signal IO_C23
+signal IO_C24
+signal IO_C25
+signal IO_C27
+signal IO_C29
+signal IO_C30
+signal IO_D1
+signal IO_D2
+signal IO_D3
+signal IO_D4
+signal IO_D5
+signal IO_D7
+signal IO_D8
+signal IO_D11
+signal IO_D12
+signal IO_D13
+signal IO_D15
+signal IO_D16
+signal IO_D19
+signal IO_D20
+signal IO_D22
+signal IO_D23
+signal IO_D24
+signal IO_D26
+signal IO_D27
+signal IO_D28
+signal IO_D29
+signal IO_D30
+signal IO_E1
+signal IO_E2
+signal IO_E4
+signal IO_E6
+signal IO_E8
+signal IO_E11
+signal IO_E12
+signal IO_E13
+signal IO_E15
+signal IO_E16
+signal IO_E19
+signal IO_E20
+signal IO_E22
+signal IO_E23
+signal IO_E25
+signal IO_E29
+signal IO_E30
+signal IO_F2
+signal IO_F3
+signal IO_F5
+signal IO_F6
+signal IO_F7
+signal IO_F8
+signal IO_F9
+signal IO_F10
+signal IO_F11
+signal IO_F12
+signal IO_F13
+signal IO_F14
+signal IO_F15
+signal IO_F16
+signal IO_F17
+signal IO_F18
+signal IO_F19
+signal IO_F20
+signal IO_F21
+signal IO_F22
+signal IO_F23
+signal IO_F24
+signal IO_F25
+signal IO_F28
+signal IO_F29
+signal IO_G1
+signal IO_G2
+signal IO_G3
+signal IO_G4
+signal IO_G6
+signal IO_G8
+signal IO_G10
+signal IO_G11
+signal IO_G12
+signal IO_G14
+signal IO_G15
+signal IO_G16
+signal IO_G17
+signal IO_G19
+signal IO_G20
+signal IO_G21
+signal IO_G23
+signal IO_G24
+signal IO_G25
+signal IO_G27
+signal IO_G28
+signal IO_G29
+signal IO_G30
+signal IO_H1
+signal IO_H2
+signal IO_H3
+signal IO_H4
+signal IO_H5
+signal IO_H6
+signal IO_H7
+signal IO_H9
+signal IO_H11
+signal IO_H12
+signal IO_H13
+signal IO_H15
+signal IO_H16
+signal IO_H19
+signal IO_H20
+signal IO_H22
+signal IO_H23
+signal IO_H24
+signal IO_H25
+signal IO_H26
+signal IO_H27
+signal IO_H28
+signal IO_H29
+signal IO_H30
+signal IO_J1
+signal IO_J2
+signal IO_J4
+signal IO_J5
+signal IO_J6
+signal IO_J8
+signal IO_J9
+signal IO_J10
+signal IO_J12
+signal IO_J13
+signal IO_J14
+signal IO_J15
+signal IO_J16
+signal IO_J17
+signal IO_J19
+signal IO_J21
+signal IO_J22
+signal IO_J23
+signal IO_J25
+signal IO_J26
+signal IO_J27
+signal IO_J29
+signal IO_J30
+signal IO_K2
+signal IO_K3
+signal IO_K6
+signal IO_K7
+signal IO_K9
+signal IO_K10
+signal IO_K11
+signal IO_K12
+signal IO_K13
+signal IO_K14
+signal IO_K15
+signal IO_K16
+signal IO_K19
+signal IO_K20
+signal IO_K22
+signal IO_K24
+signal IO_K25
+signal IO_L1
+signal IO_L2
+signal IO_L3
+signal IO_L4
+signal IO_L5
+signal IO_L6
+signal IO_L7
+signal IO_L8
+signal IO_L10
+signal IO_L25
+signal IO_L26
+signal IO_L27
+signal IO_L28
+signal IO_L29
+signal IO_L30
+signal IO_M1
+signal IO_M2
+signal IO_M3
+signal IO_M4
+signal IO_M10
+signal IO_M21
+signal IO_M22
+signal IO_M23
+signal IO_M24
+signal IO_M25
+signal IO_M26
+signal IO_M27
+signal IO_M28
+signal IO_N1
+signal IO_N2
+signal IO_N8
+signal IO_N9
+signal IO_N10
+signal IO_N21
+signal IO_N22
+signal IO_N23
+signal IO_N25
+signal IO_N26
+signal IO_N27
+signal IO_N29
+signal IO_N30
+signal IO_P2
+signal IO_P3
+signal IO_P6
+signal IO_P7
+signal IO_P9
+signal IO_P10
+signal IO_P21
+signal IO_P22
+signal IO_P24
+signal IO_P25
+signal IO_P28
+signal IO_P29
+signal IO_R1
+signal IO_R2
+signal IO_R3
+signal IO_R4
+signal IO_R5
+signal IO_R6
+signal IO_R7
+signal IO_R8
+signal IO_R9
+signal IO_R10
+signal IO_R21
+signal IO_R22
+signal IO_R23
+signal IO_R24
+signal IO_R25
+signal IO_R26
+signal IO_R27
+signal IO_R28
+signal IO_R29
+signal IO_R30
+signal IO_T1
+signal IO_T2
+signal IO_T3
+signal IO_T4
+signal IO_T5
+signal IO_T6
+signal IO_T9
+signal IO_T10
+signal IO_T21
+signal IO_T22
+signal IO_T23
+signal IO_T24
+signal IO_T25
+signal IO_T26
+signal IO_T27
+signal IO_T28
+signal IO_T29
+signal IO_T30
+signal IO_U6
+signal IO_U7
+signal IO_U9
+signal IO_U10
+signal IO_U21
+signal IO_U22
+signal IO_U24
+signal IO_U25
+signal IO_U28
+signal IO_U29
+signal IO_V1
+signal IO_V2
+signal IO_V4
+signal IO_V5
+signal IO_V6
+signal IO_V10
+signal IO_V21
+signal IO_V22
+signal IO_V23
+signal IO_V25
+signal IO_V29
+signal IO_V30
+signal IO_W1
+signal IO_W2
+signal IO_W3
+signal IO_W4
+signal IO_W5
+signal IO_W6
+signal IO_W7
+signal IO_W10
+signal IO_W21
+signal IO_W26
+signal IO_W29
+signal IO_W30
+signal IO_Y1
+signal IO_Y2
+signal IO_Y5
+signal IO_Y6
+signal IO_Y7
+signal IO_Y8
+signal IO_Y10
+signal IO_Y21
+signal IO_Y23
+signal IO_Y24
+signal IO_Y25
+signal IO_Y26
+signal IO_Y27
+signal IO_Y28
+signal IO_Y29
+signal IO_Y30
+signal IO_AA2
+signal IO_AA3
+signal IO_AA6
+signal IO_AA7
+signal IO_AA9
+signal IO_AA10
+signal IO_AA11
+signal IO_AA12
+signal IO_AA13
+signal IO_AA14
+signal IO_AA15
+signal IO_AA16
+signal IO_AA17
+signal IO_AA18
+signal IO_AA19
+signal IO_AA20
+signal IO_AA21
+signal IO_AA22
+signal IO_AA24
+signal IO_AA25
+signal IO_AA28
+signal IO_AA29
+signal IO_AB1
+signal IO_AB2
+signal IO_AB4
+signal IO_AB5
+signal IO_AB6
+signal IO_AB8
+signal IO_AB9
+signal IO_AB10
+signal IO_AB12
+signal IO_AB13
+signal IO_AB14
+signal IO_AB15
+signal IO_AB16
+signal IO_AB17
+signal IO_AB18
+signal IO_AB19
+signal IO_AB21
+signal IO_AB22
+signal IO_AB23
+signal IO_AB25
+signal IO_AB26
+signal IO_AB27
+signal IO_AB29
+signal IO_AB30
+signal IO_AC1
+signal IO_AC2
+signal IO_AC3
+signal IO_AC4
+signal IO_AC5
+signal IO_AC6
+signal IO_AC7
+signal IO_AC9
+signal IO_AC11
+signal IO_AC12
+signal IO_AC13
+signal IO_AC15
+signal IO_AC16
+signal IO_AC18
+signal IO_AC19
+signal IO_AC20
+signal IO_AC22
+signal IO_AC23
+signal IO_AC24
+signal IO_AC25
+signal IO_AC26
+signal IO_AC27
+signal IO_AC28
+signal IO_AC29
+signal IO_AC30
+signal IO_AD1
+signal IO_AD2
+signal IO_AD3
+signal IO_AD4
+signal IO_AD6
+signal IO_AD7
+signal IO_AD10
+signal IO_AD11
+signal IO_AD12
+signal IO_AD14
+signal IO_AD15
+signal IO_AD16
+signal IO_AD17
+signal IO_AD19
+signal IO_AD20
+signal IO_AD21
+signal IO_AD23
+signal IO_AD24
+signal IO_AD25
+signal IO_AD27
+signal IO_AD28
+signal IO_AD29
+signal IO_AD30
+signal IO_AE2
+signal IO_AE3
+signal IO_AE5
+signal IO_AE6
+signal IO_AE7
+signal IO_AE9
+signal IO_AE10
+signal IO_AE11
+signal IO_AE12
+signal IO_AE13
+signal IO_AE14
+signal IO_AE15
+signal IO_AE16
+signal IO_AE17
+signal IO_AE18
+signal IO_AE19
+signal IO_AE20
+signal IO_AE21
+signal IO_AE22
+signal IO_AE23
+signal IO_AE26
+signal IO_AE28
+signal IO_AE29
+signal IO_AF1
+signal IO_AF2
+signal IO_AF4
+signal IO_AF6
+signal IO_AF9
+signal IO_AF11
+signal IO_AF12
+signal IO_AF13
+signal IO_AF15
+signal IO_AF16
+signal IO_AF18
+signal IO_AF19
+signal IO_AF20
+signal IO_AF22
+signal IO_AF23
+signal IO_AF25
+signal IO_AF27
+signal IO_AF29
+signal IO_AF30
+signal IO_AG1
+signal IO_AG2
+signal IO_AG3
+signal IO_AG4
+signal IO_AG5
+signal IO_AG7
+signal IO_AG9
+signal IO_AG11
+signal IO_AG12
+signal IO_AG13
+signal IO_AG15
+signal IO_AG16
+signal IO_AG18
+signal IO_AG19
+signal IO_AG20
+signal IO_AG22
+signal IO_AG23
+signal IO_AG26
+signal IO_AG27
+signal IO_AG28
+signal IO_AG29
+signal IO_AG30
+signal IO_AH1
+signal IO_AH2
+signal IO_AH4
+signal IO_AH6
+signal IO_AH7
+signal IO_AH10
+signal IO_AH11
+signal IO_AH12
+signal IO_AH14
+signal IO_AH15
+signal IO_AH16
+signal IO_AH17
+signal IO_AH19
+signal IO_AH20
+signal IO_AH21
+signal IO_AH23
+signal IO_AH27
+signal IO_AH29
+signal IO_AH30
+signal IO_AJ4
+signal IO_AJ5
+signal IO_AJ6
+signal IO_AJ8
+signal IO_AJ9
+signal IO_AJ10
+signal IO_AJ11
+signal IO_AJ12
+signal IO_AJ13
+signal IO_AJ14
+signal IO_AJ15
+signal IO_AJ16
+signal IO_AJ17
+signal IO_AJ18
+signal IO_AJ19
+signal IO_AJ20
+signal IO_AJ21
+signal IO_AJ22
+signal IO_AJ23
+signal IO_AJ26
+signal IO_AJ27
+signal IO_AK4
+signal IO_AK5
+signal IO_AK8
+signal IO_AK9
+signal IO_AK11
+signal IO_AK12
+signal IO_AK13
+signal IO_AK15
+signal IO_AK16
+signal IO_AK18
+signal IO_AK19
+signal IO_AK20
+signal IO_AK22
+signal IO_AK23
+signal IO_AK26
+signal IO_AK27
+
+register BSR 1931
+register BR 1
+register DIR 32
+
+instruction length 6
+
+instruction EXTEST 000000 BSR
+instruction SAMPLE/PRELOAD 000001 BSR
+instruction IDCODE 001001 DIR
+instruction BYPASS 111111 BR
+
+bit 1930 I 1 IO_C29
+bit 1929 O 1 IO_C29 1928 1 Z
+bit 1928 C 1 *
+bit 1927 I 1 IO_C30
+bit 1926 O 1 IO_C30 1925 1 Z
+bit 1925 C 1 *
+bit 1924 I 1 IO_D27
+bit 1923 O 1 IO_D27 1922 1 Z
+bit 1922 C 1 *
+bit 1921 I 1 IO_D28
+bit 1920 O 1 IO_D28 1919 1 Z
+bit 1919 C 1 *
+bit 1918 I 1 IO_D29
+bit 1917 O 1 IO_D29 1916 1 Z
+bit 1916 C 1 *
+bit 1915 I 1 IO_D30
+bit 1914 O 1 IO_D30 1913 1 Z
+bit 1913 C 1 *
+bit 1912 I 1 IO_E29
+bit 1911 O 1 IO_E29 1910 1 Z
+bit 1910 C 1 *
+bit 1909 I 1 IO_E30
+bit 1908 O 1 IO_E30 1907 1 Z
+bit 1907 C 1 *
+bit 1906 I 1 IO_F28
+bit 1905 O 1 IO_F28 1904 1 Z
+bit 1904 C 1 *
+bit 1903 I 1 IO_F29
+bit 1902 O 1 IO_F29 1901 1 Z
+bit 1901 C 1 *
+bit 1900 I 1 IO_G27
+bit 1899 O 1 IO_G27 1898 1 Z
+bit 1898 C 1 *
+bit 1897 I 1 IO_G28
+bit 1896 O 1 IO_G28 1895 1 Z
+bit 1895 C 1 *
+bit 1894 I 1 IO_G29
+bit 1893 O 1 IO_G29 1892 1 Z
+bit 1892 C 1 *
+bit 1891 I 1 IO_G30
+bit 1890 O 1 IO_G30 1889 1 Z
+bit 1889 C 1 *
+bit 1888 I 1 IO_G25
+bit 1887 O 1 IO_G25 1886 1 Z
+bit 1886 C 1 *
+bit 1885 I 1 IO_H24
+bit 1884 O 1 IO_H24 1883 1 Z
+bit 1883 C 1 *
+bit 1882 I 1 IO_H25
+bit 1881 O 1 IO_H25 1880 1 Z
+bit 1880 C 1 *
+bit 1879 I 1 IO_H26
+bit 1878 O 1 IO_H26 1877 1 Z
+bit 1877 C 1 *
+bit 1876 I 1 IO_H27
+bit 1875 O 1 IO_H27 1874 1 Z
+bit 1874 C 1 *
+bit 1873 I 1 IO_H28
+bit 1872 O 1 IO_H28 1871 1 Z
+bit 1871 C 1 *
+bit 1870 O 1 *
+bit 1869 O 1 *
+bit 1868 O 1 *
+bit 1867 I 1 IO_J25
+bit 1866 O 1 IO_J25 1865 1 Z
+bit 1865 C 1 *
+bit 1864 I 1 IO_H29
+bit 1863 O 1 IO_H29 1862 1 Z
+bit 1862 C 1 *
+bit 1861 I 1 IO_H30
+bit 1860 O 1 IO_H30 1859 1 Z
+bit 1859 C 1 *
+bit 1858 I 1 IO_J26
+bit 1857 O 1 IO_J26 1856 1 Z
+bit 1856 C 1 *
+bit 1855 I 1 IO_J27
+bit 1854 O 1 IO_J27 1853 1 Z
+bit 1853 C 1 *
+bit 1852 I 1 IO_J29
+bit 1851 O 1 IO_J29 1850 1 Z
+bit 1850 C 1 *
+bit 1849 I 1 IO_J30
+bit 1848 O 1 IO_J30 1847 1 Z
+bit 1847 C 1 *
+bit 1846 I 1 IO_J23
+bit 1845 O 1 IO_J23 1844 1 Z
+bit 1844 C 1 *
+bit 1843 I 1 IO_K22
+bit 1842 O 1 IO_K22 1841 1 Z
+bit 1841 C 1 *
+bit 1840 I 1 IO_K24
+bit 1839 O 1 IO_K24 1838 1 Z
+bit 1838 C 1 *
+bit 1837 I 1 IO_K25
+bit 1836 O 1 IO_K25 1835 1 Z
+bit 1835 C 1 *
+bit 1834 O 1 *
+bit 1833 O 1 *
+bit 1832 O 1 *
+bit 1831 O 1 *
+bit 1830 O 1 *
+bit 1829 O 1 *
+bit 1828 O 1 *
+bit 1827 O 1 *
+bit 1826 O 1 *
+bit 1825 O 1 *
+bit 1824 O 1 *
+bit 1823 O 1 *
+bit 1822 I 1 IO_L25
+bit 1821 O 1 IO_L25 1820 1 Z
+bit 1820 C 1 *
+bit 1819 I 1 IO_L26
+bit 1818 O 1 IO_L26 1817 1 Z
+bit 1817 C 1 *
+bit 1816 I 1 IO_L27
+bit 1815 O 1 IO_L27 1814 1 Z
+bit 1814 C 1 *
+bit 1813 I 1 IO_L28
+bit 1812 O 1 IO_L28 1811 1 Z
+bit 1811 C 1 *
+bit 1810 I 1 IO_L29
+bit 1809 O 1 IO_L29 1808 1 Z
+bit 1808 C 1 *
+bit 1807 I 1 IO_L30
+bit 1806 O 1 IO_L30 1805 1 Z
+bit 1805 C 1 *
+bit 1804 I 1 IO_M22
+bit 1803 O 1 IO_M22 1802 1 Z
+bit 1802 C 1 *
+bit 1801 I 1 IO_M23
+bit 1800 O 1 IO_M23 1799 1 Z
+bit 1799 C 1 *
+bit 1798 I 1 IO_M24
+bit 1797 O 1 IO_M24 1796 1 Z
+bit 1796 C 1 *
+bit 1795 I 1 IO_M25
+bit 1794 O 1 IO_M25 1793 1 Z
+bit 1793 C 1 *
+bit 1792 I 1 IO_M27
+bit 1791 O 1 IO_M27 1790 1 Z
+bit 1790 C 1 *
+bit 1789 I 1 IO_M28
+bit 1788 O 1 IO_M28 1787 1 Z
+bit 1787 C 1 *
+bit 1786 O 1 *
+bit 1785 O 1 *
+bit 1784 O 1 *
+bit 1783 O 1 *
+bit 1782 O 1 *
+bit 1781 O 1 *
+bit 1780 I 1 IO_M21
+bit 1779 O 1 IO_M21 1778 1 Z
+bit 1778 C 1 *
+bit 1777 I 1 IO_N21
+bit 1776 O 1 IO_N21 1775 1 Z
+bit 1775 C 1 *
+bit 1774 I 1 IO_N22
+bit 1773 O 1 IO_N22 1772 1 Z
+bit 1772 C 1 *
+bit 1771 I 1 IO_N23
+bit 1770 O 1 IO_N23 1769 1 Z
+bit 1769 C 1 *
+bit 1768 I 1 IO_M26
+bit 1767 O 1 IO_M26 1766 1 Z
+bit 1766 C 1 *
+bit 1765 I 1 IO_N25
+bit 1764 O 1 IO_N25 1763 1 Z
+bit 1763 C 1 *
+bit 1762 I 1 IO_N26
+bit 1761 O 1 IO_N26 1760 1 Z
+bit 1760 C 1 *
+bit 1759 I 1 IO_N27
+bit 1758 O 1 IO_N27 1757 1 Z
+bit 1757 C 1 *
+bit 1756 O 1 *
+bit 1755 O 1 *
+bit 1754 O 1 *
+bit 1753 O 1 *
+bit 1752 O 1 *
+bit 1751 O 1 *
+bit 1750 I 1 IO_N29
+bit 1749 O 1 IO_N29 1748 1 Z
+bit 1748 C 1 *
+bit 1747 I 1 IO_N30
+bit 1746 O 1 IO_N30 1745 1 Z
+bit 1745 C 1 *
+bit 1744 I 1 IO_P21
+bit 1743 O 1 IO_P21 1742 1 Z
+bit 1742 C 1 *
+bit 1741 I 1 IO_P22
+bit 1740 O 1 IO_P22 1739 1 Z
+bit 1739 C 1 *
+bit 1738 I 1 IO_P24
+bit 1737 O 1 IO_P24 1736 1 Z
+bit 1736 C 1 *
+bit 1735 I 1 IO_P25
+bit 1734 O 1 IO_P25 1733 1 Z
+bit 1733 C 1 *
+bit 1732 I 1 IO_P28
+bit 1731 O 1 IO_P28 1730 1 Z
+bit 1730 C 1 *
+bit 1729 I 1 IO_P29
+bit 1728 O 1 IO_P29 1727 1 Z
+bit 1727 C 1 *
+bit 1726 I 1 IO_R21
+bit 1725 O 1 IO_R21 1724 1 Z
+bit 1724 C 1 *
+bit 1723 I 1 IO_R22
+bit 1722 O 1 IO_R22 1721 1 Z
+bit 1721 C 1 *
+bit 1720 O 1 *
+bit 1719 O 1 *
+bit 1718 O 1 *
+bit 1717 O 1 *
+bit 1716 O 1 *
+bit 1715 O 1 *
+bit 1714 I 1 IO_R23
+bit 1713 O 1 IO_R23 1712 1 Z
+bit 1712 C 1 *
+bit 1711 I 1 IO_R24
+bit 1710 O 1 IO_R24 1709 1 Z
+bit 1709 C 1 *
+bit 1708 I 1 IO_R25
+bit 1707 O 1 IO_R25 1706 1 Z
+bit 1706 C 1 *
+bit 1705 I 1 IO_R26
+bit 1704 O 1 IO_R26 1703 1 Z
+bit 1703 C 1 *
+bit 1702 I 1 IO_R27
+bit 1701 O 1 IO_R27 1700 1 Z
+bit 1700 C 1 *
+bit 1699 I 1 IO_R28
+bit 1698 O 1 IO_R28 1697 1 Z
+bit 1697 C 1 *
+bit 1696 I 1 IO_R29
+bit 1695 O 1 IO_R29 1694 1 Z
+bit 1694 C 1 *
+bit 1693 I 1 IO_R30
+bit 1692 O 1 IO_R30 1691 1 Z
+bit 1691 C 1 *
+bit 1690 I 1 IO_T30
+bit 1689 O 1 IO_T30 1688 1 Z
+bit 1688 C 1 *
+bit 1687 I 1 IO_T29
+bit 1686 O 1 IO_T29 1685 1 Z
+bit 1685 C 1 *
+bit 1684 I 1 IO_T28
+bit 1683 O 1 IO_T28 1682 1 Z
+bit 1682 C 1 *
+bit 1681 I 1 IO_T27
+bit 1680 O 1 IO_T27 1679 1 Z
+bit 1679 C 1 *
+bit 1678 I 1 IO_T26
+bit 1677 O 1 IO_T26 1676 1 Z
+bit 1676 C 1 *
+bit 1675 I 1 IO_T25
+bit 1674 O 1 IO_T25 1673 1 Z
+bit 1673 C 1 *
+bit 1672 I 1 IO_T24
+bit 1671 O 1 IO_T24 1670 1 Z
+bit 1670 C 1 *
+bit 1669 I 1 IO_T23
+bit 1668 O 1 IO_T23 1667 1 Z
+bit 1667 C 1 *
+bit 1666 O 1 *
+bit 1665 O 1 *
+bit 1664 O 1 *
+bit 1663 O 1 *
+bit 1662 O 1 *
+bit 1661 O 1 *
+bit 1660 I 1 IO_T22
+bit 1659 O 1 IO_T22 1658 1 Z
+bit 1658 C 1 *
+bit 1657 I 1 IO_T21
+bit 1656 O 1 IO_T21 1655 1 Z
+bit 1655 C 1 *
+bit 1654 I 1 IO_U29
+bit 1653 O 1 IO_U29 1652 1 Z
+bit 1652 C 1 *
+bit 1651 I 1 IO_U28
+bit 1650 O 1 IO_U28 1649 1 Z
+bit 1649 C 1 *
+bit 1648 I 1 IO_U25
+bit 1647 O 1 IO_U25 1646 1 Z
+bit 1646 C 1 *
+bit 1645 I 1 IO_U24
+bit 1644 O 1 IO_U24 1643 1 Z
+bit 1643 C 1 *
+bit 1642 I 1 IO_U22
+bit 1641 O 1 IO_U22 1640 1 Z
+bit 1640 C 1 *
+bit 1639 I 1 IO_U21
+bit 1638 O 1 IO_U21 1637 1 Z
+bit 1637 C 1 *
+bit 1636 I 1 IO_V30
+bit 1635 O 1 IO_V30 1634 1 Z
+bit 1634 C 1 *
+bit 1633 I 1 IO_V29
+bit 1632 O 1 IO_V29 1631 1 Z
+bit 1631 C 1 *
+bit 1630 O 1 *
+bit 1629 O 1 *
+bit 1628 O 1 *
+bit 1627 O 1 *
+bit 1626 O 1 *
+bit 1625 O 1 *
+bit 1624 I 1 IO_V25
+bit 1623 O 1 IO_V25 1622 1 Z
+bit 1622 C 1 *
+bit 1621 I 1 IO_W26
+bit 1620 O 1 IO_W26 1619 1 Z
+bit 1619 C 1 *
+bit 1618 I 1 IO_V23
+bit 1617 O 1 IO_V23 1616 1 Z
+bit 1616 C 1 *
+bit 1615 I 1 IO_V22
+bit 1614 O 1 IO_V22 1613 1 Z
+bit 1613 C 1 *
+bit 1612 I 1 IO_V21
+bit 1611 O 1 IO_V21 1610 1 Z
+bit 1610 C 1 *
+bit 1609 I 1 IO_W21
+bit 1608 O 1 IO_W21 1607 1 Z
+bit 1607 C 1 *
+bit 1606 I 1 IO_W30
+bit 1605 O 1 IO_W30 1604 1 Z
+bit 1604 C 1 *
+bit 1603 I 1 IO_W29
+bit 1602 O 1 IO_W29 1601 1 Z
+bit 1601 C 1 *
+bit 1600 O 1 *
+bit 1599 O 1 *
+bit 1598 O 1 *
+bit 1597 O 1 *
+bit 1596 O 1 *
+bit 1595 O 1 *
+bit 1594 I 1 IO_Y30
+bit 1593 O 1 IO_Y30 1592 1 Z
+bit 1592 C 1 *
+bit 1591 I 1 IO_Y29
+bit 1590 O 1 IO_Y29 1589 1 Z
+bit 1589 C 1 *
+bit 1588 I 1 IO_Y28
+bit 1587 O 1 IO_Y28 1586 1 Z
+bit 1586 C 1 *
+bit 1585 I 1 IO_Y27
+bit 1584 O 1 IO_Y27 1583 1 Z
+bit 1583 C 1 *
+bit 1582 I 1 IO_Y26
+bit 1581 O 1 IO_Y26 1580 1 Z
+bit 1580 C 1 *
+bit 1579 I 1 IO_Y25
+bit 1578 O 1 IO_Y25 1577 1 Z
+bit 1577 C 1 *
+bit 1576 I 1 IO_Y24
+bit 1575 O 1 IO_Y24 1574 1 Z
+bit 1574 C 1 *
+bit 1573 I 1 IO_Y23
+bit 1572 O 1 IO_Y23 1571 1 Z
+bit 1571 C 1 *
+bit 1570 I 1 IO_Y21
+bit 1569 O 1 IO_Y21 1568 1 Z
+bit 1568 C 1 *
+bit 1567 I 1 IO_AA21
+bit 1566 O 1 IO_AA21 1565 1 Z
+bit 1565 C 1 *
+bit 1564 I 1 IO_AA29
+bit 1563 O 1 IO_AA29 1562 1 Z
+bit 1562 C 1 *
+bit 1561 I 1 IO_AA28
+bit 1560 O 1 IO_AA28 1559 1 Z
+bit 1559 C 1 *
+bit 1558 O 1 *
+bit 1557 O 1 *
+bit 1556 O 1 *
+bit 1555 O 1 *
+bit 1554 O 1 *
+bit 1553 O 1 *
+bit 1552 I 1 IO_AA25
+bit 1551 O 1 IO_AA25 1550 1 Z
+bit 1550 C 1 *
+bit 1549 I 1 IO_AA24
+bit 1548 O 1 IO_AA24 1547 1 Z
+bit 1547 C 1 *
+bit 1546 I 1 IO_AA22
+bit 1545 O 1 IO_AA22 1544 1 Z
+bit 1544 C 1 *
+bit 1543 I 1 IO_AB23
+bit 1542 O 1 IO_AB23 1541 1 Z
+bit 1541 C 1 *
+bit 1540 I 1 IO_AB30
+bit 1539 O 1 IO_AB30 1538 1 Z
+bit 1538 C 1 *
+bit 1537 I 1 IO_AB29
+bit 1536 O 1 IO_AB29 1535 1 Z
+bit 1535 C 1 *
+bit 1534 I 1 IO_AB27
+bit 1533 O 1 IO_AB27 1532 1 Z
+bit 1532 C 1 *
+bit 1531 I 1 IO_AB26
+bit 1530 O 1 IO_AB26 1529 1 Z
+bit 1529 C 1 *
+bit 1528 I 1 IO_AC30
+bit 1527 O 1 IO_AC30 1526 1 Z
+bit 1526 C 1 *
+bit 1525 I 1 IO_AC29
+bit 1524 O 1 IO_AC29 1523 1 Z
+bit 1523 C 1 *
+bit 1522 I 1 IO_AB25
+bit 1521 O 1 IO_AB25 1520 1 Z
+bit 1520 C 1 *
+bit 1519 O 1 *
+bit 1518 O 1 *
+bit 1517 O 1 *
+bit 1516 I 1 IO_AC28
+bit 1515 O 1 IO_AC28 1514 1 Z
+bit 1514 C 1 *
+bit 1513 I 1 IO_AC27
+bit 1512 O 1 IO_AC27 1511 1 Z
+bit 1511 C 1 *
+bit 1510 I 1 IO_AC26
+bit 1509 O 1 IO_AC26 1508 1 Z
+bit 1508 C 1 *
+bit 1507 I 1 IO_AC25
+bit 1506 O 1 IO_AC25 1505 1 Z
+bit 1505 C 1 *
+bit 1504 I 1 IO_AC24
+bit 1503 O 1 IO_AC24 1502 1 Z
+bit 1502 C 1 *
+bit 1501 I 1 IO_AD25
+bit 1500 O 1 IO_AD25 1499 1 Z
+bit 1499 C 1 *
+bit 1498 I 1 IO_AD30
+bit 1497 O 1 IO_AD30 1496 1 Z
+bit 1496 C 1 *
+bit 1495 I 1 IO_AD29
+bit 1494 O 1 IO_AD29 1493 1 Z
+bit 1493 C 1 *
+bit 1492 I 1 IO_AD28
+bit 1491 O 1 IO_AD28 1490 1 Z
+bit 1490 C 1 *
+bit 1489 I 1 IO_AD27
+bit 1488 O 1 IO_AD27 1487 1 Z
+bit 1487 C 1 *
+bit 1486 I 1 IO_AE29
+bit 1485 O 1 IO_AE29 1484 1 Z
+bit 1484 C 1 *
+bit 1483 I 1 IO_AE28
+bit 1482 O 1 IO_AE28 1481 1 Z
+bit 1481 C 1 *
+bit 1480 I 1 IO_AE26
+bit 1479 O 1 IO_AE26 1478 1 Z
+bit 1478 C 1 *
+bit 1477 I 1 IO_AF27
+bit 1476 O 1 IO_AF27 1475 1 Z
+bit 1475 C 1 *
+bit 1474 I 1 IO_AF30
+bit 1473 O 1 IO_AF30 1472 1 Z
+bit 1472 C 1 *
+bit 1471 I 1 IO_AF29
+bit 1470 O 1 IO_AF29 1469 1 Z
+bit 1469 C 1 *
+bit 1468 I 1 IO_AG30
+bit 1467 O 1 IO_AG30 1466 1 Z
+bit 1466 C 1 *
+bit 1465 I 1 IO_AG29
+bit 1464 O 1 IO_AG29 1463 1 Z
+bit 1463 C 1 *
+bit 1462 I 1 IO_AG28
+bit 1461 O 1 IO_AG28 1460 1 Z
+bit 1460 C 1 *
+bit 1459 I 1 IO_AG27
+bit 1458 O 1 IO_AG27 1457 1 Z
+bit 1457 C 1 *
+bit 1456 I 1 IO_AH30
+bit 1455 O 1 IO_AH30 1454 1 Z
+bit 1454 C 1 *
+bit 1453 I 1 IO_AH29
+bit 1452 O 1 IO_AH29 1451 1 Z
+bit 1451 C 1 *
+bit 1450 I 1 CCLK_AH28
+bit 1449 O 1 CCLK_AH28 1448 1 Z
+bit 1448 C 1 *
+bit 1447 I 1 DONE_AJ28
+bit 1446 O 1 DONE_AJ28 1445 1 Z
+bit 1445 C 1 *
+bit 1444 I 1 IO_AK28
+bit 1443 O 1 IO_AK28 1442 1 Z
+bit 1442 C 1 *
+bit 1441 I 1 IO_AJ27
+bit 1440 O 1 IO_AJ27 1439 1 Z
+bit 1439 C 1 *
+bit 1438 I 1 IO_AK27
+bit 1437 O 1 IO_AK27 1436 1 Z
+bit 1436 C 1 *
+bit 1435 I 1 IO_AJ26
+bit 1434 O 1 IO_AJ26 1433 1 Z
+bit 1433 C 1 *
+bit 1432 I 1 IO_AK26
+bit 1431 O 1 IO_AK26 1430 1 Z
+bit 1430 C 1 *
+bit 1429 I 1 IO_AH27
+bit 1428 O 1 IO_AH27 1427 1 Z
+bit 1427 C 1 *
+bit 1426 I 1 IO_AG26
+bit 1425 O 1 IO_AG26 1424 1 Z
+bit 1424 C 1 *
+bit 1423 I 1 IO_AF25
+bit 1422 O 1 IO_AF25 1421 1 Z
+bit 1421 C 1 *
+bit 1420 I 1 IO_AD24
+bit 1419 O 1 IO_AD24 1418 1 Z
+bit 1418 C 1 *
+bit 1417 I 1 IO_AC23
+bit 1416 O 1 IO_AC23 1415 1 Z
+bit 1415 C 1 *
+bit 1414 I 1 IO_AD23
+bit 1413 O 1 IO_AD23 1412 1 Z
+bit 1412 C 1 *
+bit 1411 I 1 IO_AE23
+bit 1410 O 1 IO_AE23 1409 1 Z
+bit 1409 C 1 *
+bit 1408 I 1 IO_AF23
+bit 1407 O 1 IO_AF23 1406 1 Z
+bit 1406 C 1 *
+bit 1405 I 1 IO_AG23
+bit 1404 O 1 IO_AG23 1403 1 Z
+bit 1403 C 1 *
+bit 1402 I 1 IO_AH23
+bit 1401 O 1 IO_AH23 1400 1 Z
+bit 1400 C 1 *
+bit 1399 O 1 *
+bit 1398 O 1 *
+bit 1397 O 1 *
+bit 1396 I 1 IO_AJ23
+bit 1395 O 1 IO_AJ23 1394 1 Z
+bit 1394 C 1 *
+bit 1393 I 1 IO_AK23
+bit 1392 O 1 IO_AK23 1391 1 Z
+bit 1391 C 1 *
+bit 1390 I 1 IO_AB22
+bit 1389 O 1 IO_AB22 1388 1 Z
+bit 1388 C 1 *
+bit 1387 I 1 IO_AC22
+bit 1386 O 1 IO_AC22 1385 1 Z
+bit 1385 C 1 *
+bit 1384 I 1 IO_AE22
+bit 1383 O 1 IO_AE22 1382 1 Z
+bit 1382 C 1 *
+bit 1381 I 1 IO_AF22
+bit 1380 O 1 IO_AF22 1379 1 Z
+bit 1379 C 1 *
+bit 1378 I 1 IO_AG22
+bit 1377 O 1 IO_AG22 1376 1 Z
+bit 1376 C 1 *
+bit 1375 I 1 IO_AJ22
+bit 1374 O 1 IO_AJ22 1373 1 Z
+bit 1373 C 1 *
+bit 1372 I 1 IO_AK22
+bit 1371 O 1 IO_AK22 1370 1 Z
+bit 1370 C 1 *
+bit 1369 O 1 *
+bit 1368 O 1 *
+bit 1367 O 1 *
+bit 1366 I 1 IO_AD21
+bit 1365 O 1 IO_AD21 1364 1 Z
+bit 1364 C 1 *
+bit 1363 I 1 IO_AE21
+bit 1362 O 1 IO_AE21 1361 1 Z
+bit 1361 C 1 *
+bit 1360 I 1 IO_AH21
+bit 1359 O 1 IO_AH21 1358 1 Z
+bit 1358 C 1 *
+bit 1357 I 1 IO_AJ21
+bit 1356 O 1 IO_AJ21 1355 1 Z
+bit 1355 C 1 *
+bit 1354 O 1 *
+bit 1353 O 1 *
+bit 1352 O 1 *
+bit 1351 I 1 IO_AB21
+bit 1350 O 1 IO_AB21 1349 1 Z
+bit 1349 C 1 *
+bit 1348 I 1 IO_AA20
+bit 1347 O 1 IO_AA20 1346 1 Z
+bit 1346 C 1 *
+bit 1345 I 1 IO_AC20
+bit 1344 O 1 IO_AC20 1343 1 Z
+bit 1343 C 1 *
+bit 1342 I 1 IO_AD20
+bit 1341 O 1 IO_AD20 1340 1 Z
+bit 1340 C 1 *
+bit 1339 O 1 *
+bit 1338 O 1 *
+bit 1337 O 1 *
+bit 1336 I 1 IO_AE20
+bit 1335 O 1 IO_AE20 1334 1 Z
+bit 1334 C 1 *
+bit 1333 I 1 IO_AF20
+bit 1332 O 1 IO_AF20 1331 1 Z
+bit 1331 C 1 *
+bit 1330 I 1 IO_AG20
+bit 1329 O 1 IO_AG20 1328 1 Z
+bit 1328 C 1 *
+bit 1327 I 1 IO_AH20
+bit 1326 O 1 IO_AH20 1325 1 Z
+bit 1325 C 1 *
+bit 1324 O 1 *
+bit 1323 O 1 *
+bit 1322 O 1 *
+bit 1321 I 1 IO_AJ20
+bit 1320 O 1 IO_AJ20 1319 1 Z
+bit 1319 C 1 *
+bit 1318 I 1 IO_AK20
+bit 1317 O 1 IO_AK20 1316 1 Z
+bit 1316 C 1 *
+bit 1315 I 1 IO_AA19
+bit 1314 O 1 IO_AA19 1313 1 Z
+bit 1313 C 1 *
+bit 1312 I 1 IO_AB19
+bit 1311 O 1 IO_AB19 1310 1 Z
+bit 1310 C 1 *
+bit 1309 O 1 *
+bit 1308 O 1 *
+bit 1307 O 1 *
+bit 1306 I 1 IO_AC19
+bit 1305 O 1 IO_AC19 1304 1 Z
+bit 1304 C 1 *
+bit 1303 I 1 IO_AD19
+bit 1302 O 1 IO_AD19 1301 1 Z
+bit 1301 C 1 *
+bit 1300 I 1 IO_AE19
+bit 1299 O 1 IO_AE19 1298 1 Z
+bit 1298 C 1 *
+bit 1297 I 1 IO_AF19
+bit 1296 O 1 IO_AF19 1295 1 Z
+bit 1295 C 1 *
+bit 1294 O 1 *
+bit 1293 O 1 *
+bit 1292 O 1 *
+bit 1291 I 1 IO_AG19
+bit 1290 O 1 IO_AG19 1289 1 Z
+bit 1289 C 1 *
+bit 1288 I 1 IO_AH19
+bit 1287 O 1 IO_AH19 1286 1 Z
+bit 1286 C 1 *
+bit 1285 I 1 IO_AJ19
+bit 1284 O 1 IO_AJ19 1283 1 Z
+bit 1283 C 1 *
+bit 1282 I 1 IO_AK19
+bit 1281 O 1 IO_AK19 1280 1 Z
+bit 1280 C 1 *
+bit 1279 I 1 IO_AA18
+bit 1278 O 1 IO_AA18 1277 1 Z
+bit 1277 C 1 *
+bit 1276 I 1 IO_AB18
+bit 1275 O 1 IO_AB18 1274 1 Z
+bit 1274 C 1 *
+bit 1273 I 1 IO_AC18
+bit 1272 O 1 IO_AC18 1271 1 Z
+bit 1271 C 1 *
+bit 1270 I 1 IO_AE18
+bit 1269 O 1 IO_AE18 1268 1 Z
+bit 1268 C 1 *
+bit 1267 I 1 IO_AF18
+bit 1266 O 1 IO_AF18 1265 1 Z
+bit 1265 C 1 *
+bit 1264 I 1 IO_AG18
+bit 1263 O 1 IO_AG18 1262 1 Z
+bit 1262 C 1 *
+bit 1261 I 1 IO_AJ18
+bit 1260 O 1 IO_AJ18 1259 1 Z
+bit 1259 C 1 *
+bit 1258 I 1 IO_AK18
+bit 1257 O 1 IO_AK18 1256 1 Z
+bit 1256 C 1 *
+bit 1255 I 1 IO_AA17
+bit 1254 O 1 IO_AA17 1253 1 Z
+bit 1253 C 1 *
+bit 1252 I 1 IO_AB17
+bit 1251 O 1 IO_AB17 1250 1 Z
+bit 1250 C 1 *
+bit 1249 I 1 IO_AA16
+bit 1248 O 1 IO_AA16 1247 1 Z
+bit 1247 C 1 *
+bit 1246 I 1 IO_AD17
+bit 1245 O 1 IO_AD17 1244 1 Z
+bit 1244 C 1 *
+bit 1243 I 1 IO_AE17
+bit 1242 O 1 IO_AE17 1241 1 Z
+bit 1241 C 1 *
+bit 1240 I 1 IO_AH17
+bit 1239 O 1 IO_AH17 1238 1 Z
+bit 1238 C 1 *
+bit 1237 I 1 IO_AJ17
+bit 1236 O 1 IO_AJ17 1235 1 Z
+bit 1235 C 1 *
+bit 1234 O 1 *
+bit 1233 O 1 *
+bit 1232 O 1 *
+bit 1231 I 1 IO_AB16
+bit 1230 O 1 IO_AB16 1229 1 Z
+bit 1229 C 1 *
+bit 1228 I 1 IO_AC16
+bit 1227 O 1 IO_AC16 1226 1 Z
+bit 1226 C 1 *
+bit 1225 I 1 IO_AD16
+bit 1224 O 1 IO_AD16 1223 1 Z
+bit 1223 C 1 *
+bit 1222 I 1 IO_AE16
+bit 1221 O 1 IO_AE16 1220 1 Z
+bit 1220 C 1 *
+bit 1219 I 1 IO_AF16
+bit 1218 O 1 IO_AF16 1217 1 Z
+bit 1217 C 1 *
+bit 1216 I 1 IO_AG16
+bit 1215 O 1 IO_AG16 1214 1 Z
+bit 1214 C 1 *
+bit 1213 I 1 IO_AH16
+bit 1212 O 1 IO_AH16 1211 1 Z
+bit 1211 C 1 *
+bit 1210 I 1 IO_AJ16
+bit 1209 O 1 IO_AJ16 1208 1 Z
+bit 1208 C 1 *
+bit 1207 I 1 IO_AK16
+bit 1206 O 1 IO_AK16 1205 1 Z
+bit 1205 C 1 *
+bit 1204 I 1 IO_AK15
+bit 1203 O 1 IO_AK15 1202 1 Z
+bit 1202 C 1 *
+bit 1201 I 1 IO_AJ15
+bit 1200 O 1 IO_AJ15 1199 1 Z
+bit 1199 C 1 *
+bit 1198 I 1 IO_AH15
+bit 1197 O 1 IO_AH15 1196 1 Z
+bit 1196 C 1 *
+bit 1195 I 1 IO_AG15
+bit 1194 O 1 IO_AG15 1193 1 Z
+bit 1193 C 1 *
+bit 1192 I 1 IO_AF15
+bit 1191 O 1 IO_AF15 1190 1 Z
+bit 1190 C 1 *
+bit 1189 I 1 IO_AE15
+bit 1188 O 1 IO_AE15 1187 1 Z
+bit 1187 C 1 *
+bit 1186 I 1 IO_AD15
+bit 1185 O 1 IO_AD15 1184 1 Z
+bit 1184 C 1 *
+bit 1183 I 1 IO_AD14
+bit 1182 O 1 IO_AD14 1181 1 Z
+bit 1181 C 1 *
+bit 1180 I 1 IO_AC15
+bit 1179 O 1 IO_AC15 1178 1 Z
+bit 1178 C 1 *
+bit 1177 I 1 IO_AB15
+bit 1176 O 1 IO_AB15 1175 1 Z
+bit 1175 C 1 *
+bit 1174 I 1 IO_AA15
+bit 1173 O 1 IO_AA15 1172 1 Z
+bit 1172 C 1 *
+bit 1171 I 1 IO_AJ14
+bit 1170 O 1 IO_AJ14 1169 1 Z
+bit 1169 C 1 *
+bit 1168 I 1 IO_AH14
+bit 1167 O 1 IO_AH14 1166 1 Z
+bit 1166 C 1 *
+bit 1165 I 1 IO_AE14
+bit 1164 O 1 IO_AE14 1163 1 Z
+bit 1163 C 1 *
+bit 1162 I 1 IO_AE13
+bit 1161 O 1 IO_AE13 1160 1 Z
+bit 1160 C 1 *
+bit 1159 O 1 *
+bit 1158 O 1 *
+bit 1157 O 1 *
+bit 1156 I 1 IO_AB14
+bit 1155 O 1 IO_AB14 1154 1 Z
+bit 1154 C 1 *
+bit 1153 I 1 IO_AA14
+bit 1152 O 1 IO_AA14 1151 1 Z
+bit 1151 C 1 *
+bit 1150 I 1 IO_AK13
+bit 1149 O 1 IO_AK13 1148 1 Z
+bit 1148 C 1 *
+bit 1147 I 1 IO_AJ13
+bit 1146 O 1 IO_AJ13 1145 1 Z
+bit 1145 C 1 *
+bit 1144 O 1 *
+bit 1143 O 1 *
+bit 1142 O 1 *
+bit 1141 I 1 IO_AG13
+bit 1140 O 1 IO_AG13 1139 1 Z
+bit 1139 C 1 *
+bit 1138 I 1 IO_AF13
+bit 1137 O 1 IO_AF13 1136 1 Z
+bit 1136 C 1 *
+bit 1135 I 1 IO_AC13
+bit 1134 O 1 IO_AC13 1133 1 Z
+bit 1133 C 1 *
+bit 1132 I 1 IO_AB13
+bit 1131 O 1 IO_AB13 1130 1 Z
+bit 1130 C 1 *
+bit 1129 O 1 *
+bit 1128 O 1 *
+bit 1127 O 1 *
+bit 1126 I 1 IO_AA13
+bit 1125 O 1 IO_AA13 1124 1 Z
+bit 1124 C 1 *
+bit 1123 I 1 IO_AA12
+bit 1122 O 1 IO_AA12 1121 1 Z
+bit 1121 C 1 *
+bit 1120 I 1 IO_AK12
+bit 1119 O 1 IO_AK12 1118 1 Z
+bit 1118 C 1 *
+bit 1117 I 1 IO_AJ12
+bit 1116 O 1 IO_AJ12 1115 1 Z
+bit 1115 C 1 *
+bit 1114 O 1 *
+bit 1113 O 1 *
+bit 1112 O 1 *
+bit 1111 I 1 IO_AH12
+bit 1110 O 1 IO_AH12 1109 1 Z
+bit 1109 C 1 *
+bit 1108 I 1 IO_AG12
+bit 1107 O 1 IO_AG12 1106 1 Z
+bit 1106 C 1 *
+bit 1105 I 1 IO_AF12
+bit 1104 O 1 IO_AF12 1103 1 Z
+bit 1103 C 1 *
+bit 1102 I 1 IO_AE12
+bit 1101 O 1 IO_AE12 1100 1 Z
+bit 1100 C 1 *
+bit 1099 O 1 *
+bit 1098 O 1 *
+bit 1097 O 1 *
+bit 1096 I 1 IO_AD12
+bit 1095 O 1 IO_AD12 1094 1 Z
+bit 1094 C 1 *
+bit 1093 I 1 IO_AC12
+bit 1092 O 1 IO_AC12 1091 1 Z
+bit 1091 C 1 *
+bit 1090 I 1 IO_AB12
+bit 1089 O 1 IO_AB12 1088 1 Z
+bit 1088 C 1 *
+bit 1087 I 1 IO_AC11
+bit 1086 O 1 IO_AC11 1085 1 Z
+bit 1085 C 1 *
+bit 1084 O 1 *
+bit 1083 O 1 *
+bit 1082 O 1 *
+bit 1081 I 1 IO_AK11
+bit 1080 O 1 IO_AK11 1079 1 Z
+bit 1079 C 1 *
+bit 1078 I 1 IO_AJ11
+bit 1077 O 1 IO_AJ11 1076 1 Z
+bit 1076 C 1 *
+bit 1075 I 1 IO_AH11
+bit 1074 O 1 IO_AH11 1073 1 Z
+bit 1073 C 1 *
+bit 1072 I 1 IO_AG11
+bit 1071 O 1 IO_AG11 1070 1 Z
+bit 1070 C 1 *
+bit 1069 O 1 *
+bit 1068 O 1 *
+bit 1067 O 1 *
+bit 1066 I 1 IO_AF11
+bit 1065 O 1 IO_AF11 1064 1 Z
+bit 1064 C 1 *
+bit 1063 I 1 IO_AE11
+bit 1062 O 1 IO_AE11 1061 1 Z
+bit 1061 C 1 *
+bit 1060 I 1 IO_AD11
+bit 1059 O 1 IO_AD11 1058 1 Z
+bit 1058 C 1 *
+bit 1057 I 1 IO_AD10
+bit 1056 O 1 IO_AD10 1055 1 Z
+bit 1055 C 1 *
+bit 1054 I 1 IO_AA11
+bit 1053 O 1 IO_AA11 1052 1 Z
+bit 1052 C 1 *
+bit 1051 I 1 IO_AJ10
+bit 1050 O 1 IO_AJ10 1049 1 Z
+bit 1049 C 1 *
+bit 1048 I 1 IO_AH10
+bit 1047 O 1 IO_AH10 1046 1 Z
+bit 1046 C 1 *
+bit 1045 I 1 IO_AE10
+bit 1044 O 1 IO_AE10 1043 1 Z
+bit 1043 C 1 *
+bit 1042 I 1 IO_AE9
+bit 1041 O 1 IO_AE9 1040 1 Z
+bit 1040 C 1 *
+bit 1039 I 1 IO_AB10
+bit 1038 O 1 IO_AB10 1037 1 Z
+bit 1037 C 1 *
+bit 1036 I 1 IO_AK9
+bit 1035 O 1 IO_AK9 1034 1 Z
+bit 1034 C 1 *
+bit 1033 I 1 IO_AJ9
+bit 1032 O 1 IO_AJ9 1031 1 Z
+bit 1031 C 1 *
+bit 1030 I 1 IO_AG9
+bit 1029 O 1 IO_AG9 1028 1 Z
+bit 1028 C 1 *
+bit 1027 I 1 IO_AF9
+bit 1026 O 1 IO_AF9 1025 1 Z
+bit 1025 C 1 *
+bit 1024 O 1 *
+bit 1023 O 1 *
+bit 1022 O 1 *
+bit 1021 I 1 IO_AC9
+bit 1020 O 1 IO_AC9 1019 1 Z
+bit 1019 C 1 *
+bit 1018 I 1 IO_AB9
+bit 1017 O 1 IO_AB9 1016 1 Z
+bit 1016 C 1 *
+bit 1015 I 1 IO_AK8
+bit 1014 O 1 IO_AK8 1013 1 Z
+bit 1013 C 1 *
+bit 1012 I 1 IO_AJ8
+bit 1011 O 1 IO_AJ8 1010 1 Z
+bit 1010 C 1 *
+bit 1009 O 1 *
+bit 1008 O 1 *
+bit 1007 O 1 *
+bit 1006 I 1 IO_AH7
+bit 1005 O 1 IO_AH7 1004 1 Z
+bit 1004 C 1 *
+bit 1003 I 1 IO_AG7
+bit 1002 O 1 IO_AG7 1001 1 Z
+bit 1001 C 1 *
+bit 1000 I 1 IO_AE7
+bit 999 O 1 IO_AE7 998 1 Z
+bit 998 C 1 *
+bit 997 I 1 IO_AD7
+bit 996 O 1 IO_AD7 995 1 Z
+bit 995 C 1 *
+bit 994 I 1 IO_AE6
+bit 993 O 1 IO_AE6 992 1 Z
+bit 992 C 1 *
+bit 991 I 1 IO_AJ6
+bit 990 O 1 IO_AJ6 989 1 Z
+bit 989 C 1 *
+bit 988 I 1 IO_AH6
+bit 987 O 1 IO_AH6 986 1 Z
+bit 986 C 1 *
+bit 985 I 1 IO_AF6
+bit 984 O 1 IO_AF6 983 1 Z
+bit 983 C 1 *
+bit 982 I 1 IO_AG5
+bit 981 O 1 IO_AG5 980 1 Z
+bit 980 C 1 *
+bit 979 I 1 IO_AH4
+bit 978 O 1 IO_AH4 977 1 Z
+bit 977 C 1 *
+bit 976 I 1 IO_AK5
+bit 975 O 1 IO_AK5 974 1 Z
+bit 974 C 1 *
+bit 973 I 1 IO_AJ5
+bit 972 O 1 IO_AJ5 971 1 Z
+bit 971 C 1 *
+bit 970 I 1 IO_AK4
+bit 969 O 1 IO_AK4 968 1 Z
+bit 968 C 1 *
+bit 967 I 1 IO_AJ4
+bit 966 O 1 IO_AJ4 965 1 Z
+bit 965 C 1 *
+bit 964 I 1 M2_AK3
+bit 963 I 1 M0_AJ3
+bit 962 I 1 M1_AH3
+bit 961 I 1 IO_AH2
+bit 960 O 1 IO_AH2 959 1 Z
+bit 959 C 1 *
+bit 958 I 1 IO_AH1
+bit 957 O 1 IO_AH1 956 1 Z
+bit 956 C 1 *
+bit 955 I 1 IO_AG4
+bit 954 O 1 IO_AG4 953 1 Z
+bit 953 C 1 *
+bit 952 I 1 IO_AG3
+bit 951 O 1 IO_AG3 950 1 Z
+bit 950 C 1 *
+bit 949 I 1 IO_AG2
+bit 948 O 1 IO_AG2 947 1 Z
+bit 947 C 1 *
+bit 946 I 1 IO_AG1
+bit 945 O 1 IO_AG1 944 1 Z
+bit 944 C 1 *
+bit 943 I 1 IO_AF2
+bit 942 O 1 IO_AF2 941 1 Z
+bit 941 C 1 *
+bit 940 I 1 IO_AF1
+bit 939 O 1 IO_AF1 938 1 Z
+bit 938 C 1 *
+bit 937 I 1 IO_AF4
+bit 936 O 1 IO_AF4 935 1 Z
+bit 935 C 1 *
+bit 934 I 1 IO_AE5
+bit 933 O 1 IO_AE5 932 1 Z
+bit 932 C 1 *
+bit 931 I 1 IO_AE3
+bit 930 O 1 IO_AE3 929 1 Z
+bit 929 C 1 *
+bit 928 I 1 IO_AE2
+bit 927 O 1 IO_AE2 926 1 Z
+bit 926 C 1 *
+bit 925 I 1 IO_AD4
+bit 924 O 1 IO_AD4 923 1 Z
+bit 923 C 1 *
+bit 922 I 1 IO_AD3
+bit 921 O 1 IO_AD3 920 1 Z
+bit 920 C 1 *
+bit 919 I 1 IO_AD2
+bit 918 O 1 IO_AD2 917 1 Z
+bit 917 C 1 *
+bit 916 I 1 IO_AD1
+bit 915 O 1 IO_AD1 914 1 Z
+bit 914 C 1 *
+bit 913 I 1 IO_AD6
+bit 912 O 1 IO_AD6 911 1 Z
+bit 911 C 1 *
+bit 910 I 1 IO_AC7
+bit 909 O 1 IO_AC7 908 1 Z
+bit 908 C 1 *
+bit 907 I 1 IO_AC6
+bit 906 O 1 IO_AC6 905 1 Z
+bit 905 C 1 *
+bit 904 I 1 IO_AC5
+bit 903 O 1 IO_AC5 902 1 Z
+bit 902 C 1 *
+bit 901 I 1 IO_AC4
+bit 900 O 1 IO_AC4 899 1 Z
+bit 899 C 1 *
+bit 898 I 1 IO_AC3
+bit 897 O 1 IO_AC3 896 1 Z
+bit 896 C 1 *
+bit 895 O 1 *
+bit 894 O 1 *
+bit 893 O 1 *
+bit 892 I 1 IO_AB6
+bit 891 O 1 IO_AB6 890 1 Z
+bit 890 C 1 *
+bit 889 I 1 IO_AC2
+bit 888 O 1 IO_AC2 887 1 Z
+bit 887 C 1 *
+bit 886 I 1 IO_AC1
+bit 885 O 1 IO_AC1 884 1 Z
+bit 884 C 1 *
+bit 883 I 1 IO_AB5
+bit 882 O 1 IO_AB5 881 1 Z
+bit 881 C 1 *
+bit 880 I 1 IO_AB4
+bit 879 O 1 IO_AB4 878 1 Z
+bit 878 C 1 *
+bit 877 I 1 IO_AB2
+bit 876 O 1 IO_AB2 875 1 Z
+bit 875 C 1 *
+bit 874 I 1 IO_AB1
+bit 873 O 1 IO_AB1 872 1 Z
+bit 872 C 1 *
+bit 871 I 1 IO_AB8
+bit 870 O 1 IO_AB8 869 1 Z
+bit 869 C 1 *
+bit 868 I 1 IO_AA9
+bit 867 O 1 IO_AA9 866 1 Z
+bit 866 C 1 *
+bit 865 I 1 IO_AA7
+bit 864 O 1 IO_AA7 863 1 Z
+bit 863 C 1 *
+bit 862 I 1 IO_AA6
+bit 861 O 1 IO_AA6 860 1 Z
+bit 860 C 1 *
+bit 859 O 1 *
+bit 858 O 1 *
+bit 857 O 1 *
+bit 856 O 1 *
+bit 855 O 1 *
+bit 854 O 1 *
+bit 853 I 1 IO_AA3
+bit 852 O 1 IO_AA3 851 1 Z
+bit 851 C 1 *
+bit 850 I 1 IO_AA2
+bit 849 O 1 IO_AA2 848 1 Z
+bit 848 C 1 *
+bit 847 I 1 IO_AA10
+bit 846 O 1 IO_AA10 845 1 Z
+bit 845 C 1 *
+bit 844 I 1 IO_Y10
+bit 843 O 1 IO_Y10 842 1 Z
+bit 842 C 1 *
+bit 841 I 1 IO_Y8
+bit 840 O 1 IO_Y8 839 1 Z
+bit 839 C 1 *
+bit 838 I 1 IO_Y7
+bit 837 O 1 IO_Y7 836 1 Z
+bit 836 C 1 *
+bit 835 I 1 IO_Y6
+bit 834 O 1 IO_Y6 833 1 Z
+bit 833 C 1 *
+bit 832 I 1 IO_Y5
+bit 831 O 1 IO_Y5 830 1 Z
+bit 830 C 1 *
+bit 829 O 1 *
+bit 828 O 1 *
+bit 827 O 1 *
+bit 826 O 1 *
+bit 825 O 1 *
+bit 824 O 1 *
+bit 823 I 1 IO_Y2
+bit 822 O 1 IO_Y2 821 1 Z
+bit 821 C 1 *
+bit 820 I 1 IO_Y1
+bit 819 O 1 IO_Y1 818 1 Z
+bit 818 C 1 *
+bit 817 O 1 *
+bit 816 O 1 *
+bit 815 O 1 *
+bit 814 O 1 *
+bit 813 O 1 *
+bit 812 O 1 *
+bit 811 I 1 IO_W7
+bit 810 O 1 IO_W7 809 1 Z
+bit 809 C 1 *
+bit 808 I 1 IO_W6
+bit 807 O 1 IO_W6 806 1 Z
+bit 806 C 1 *
+bit 805 I 1 IO_W4
+bit 804 O 1 IO_W4 803 1 Z
+bit 803 C 1 *
+bit 802 I 1 IO_W3
+bit 801 O 1 IO_W3 800 1 Z
+bit 800 C 1 *
+bit 799 I 1 IO_W2
+bit 798 O 1 IO_W2 797 1 Z
+bit 797 C 1 *
+bit 796 I 1 IO_W1
+bit 795 O 1 IO_W1 794 1 Z
+bit 794 C 1 *
+bit 793 I 1 IO_W10
+bit 792 O 1 IO_W10 791 1 Z
+bit 791 C 1 *
+bit 790 I 1 IO_V10
+bit 789 O 1 IO_V10 788 1 Z
+bit 788 C 1 *
+bit 787 O 1 *
+bit 786 O 1 *
+bit 785 O 1 *
+bit 784 O 1 *
+bit 783 O 1 *
+bit 782 O 1 *
+bit 781 I 1 IO_W5
+bit 780 O 1 IO_W5 779 1 Z
+bit 779 C 1 *
+bit 778 I 1 IO_V6
+bit 777 O 1 IO_V6 776 1 Z
+bit 776 C 1 *
+bit 775 I 1 IO_V5
+bit 774 O 1 IO_V5 773 1 Z
+bit 773 C 1 *
+bit 772 I 1 IO_V4
+bit 771 O 1 IO_V4 770 1 Z
+bit 770 C 1 *
+bit 769 I 1 IO_V2
+bit 768 O 1 IO_V2 767 1 Z
+bit 767 C 1 *
+bit 766 I 1 IO_V1
+bit 765 O 1 IO_V1 764 1 Z
+bit 764 C 1 *
+bit 763 I 1 IO_U10
+bit 762 O 1 IO_U10 761 1 Z
+bit 761 C 1 *
+bit 760 I 1 IO_U9
+bit 759 O 1 IO_U9 758 1 Z
+bit 758 C 1 *
+bit 757 I 1 IO_U7
+bit 756 O 1 IO_U7 755 1 Z
+bit 755 C 1 *
+bit 754 I 1 IO_U6
+bit 753 O 1 IO_U6 752 1 Z
+bit 752 C 1 *
+bit 751 O 1 *
+bit 750 O 1 *
+bit 749 O 1 *
+bit 748 O 1 *
+bit 747 O 1 *
+bit 746 O 1 *
+bit 745 I 1 IO_T10
+bit 744 O 1 IO_T10 743 1 Z
+bit 743 C 1 *
+bit 742 I 1 IO_T9
+bit 741 O 1 IO_T9 740 1 Z
+bit 740 C 1 *
+bit 739 I 1 IO_T6
+bit 738 O 1 IO_T6 737 1 Z
+bit 737 C 1 *
+bit 736 I 1 IO_T5
+bit 735 O 1 IO_T5 734 1 Z
+bit 734 C 1 *
+bit 733 I 1 IO_T4
+bit 732 O 1 IO_T4 731 1 Z
+bit 731 C 1 *
+bit 730 I 1 IO_T3
+bit 729 O 1 IO_T3 728 1 Z
+bit 728 C 1 *
+bit 727 I 1 IO_T2
+bit 726 O 1 IO_T2 725 1 Z
+bit 725 C 1 *
+bit 724 I 1 IO_T1
+bit 723 O 1 IO_T1 722 1 Z
+bit 722 C 1 *
+bit 721 I 1 IO_R1
+bit 720 O 1 IO_R1 719 1 Z
+bit 719 C 1 *
+bit 718 I 1 IO_R2
+bit 717 O 1 IO_R2 716 1 Z
+bit 716 C 1 *
+bit 715 I 1 IO_R3
+bit 714 O 1 IO_R3 713 1 Z
+bit 713 C 1 *
+bit 712 I 1 IO_R4
+bit 711 O 1 IO_R4 710 1 Z
+bit 710 C 1 *
+bit 709 I 1 IO_R5
+bit 708 O 1 IO_R5 707 1 Z
+bit 707 C 1 *
+bit 706 I 1 IO_R6
+bit 705 O 1 IO_R6 704 1 Z
+bit 704 C 1 *
+bit 703 I 1 IO_R7
+bit 702 O 1 IO_R7 701 1 Z
+bit 701 C 1 *
+bit 700 I 1 IO_R8
+bit 699 O 1 IO_R8 698 1 Z
+bit 698 C 1 *
+bit 697 O 1 *
+bit 696 O 1 *
+bit 695 O 1 *
+bit 694 O 1 *
+bit 693 O 1 *
+bit 692 O 1 *
+bit 691 I 1 IO_R9
+bit 690 O 1 IO_R9 689 1 Z
+bit 689 C 1 *
+bit 688 I 1 IO_R10
+bit 687 O 1 IO_R10 686 1 Z
+bit 686 C 1 *
+bit 685 I 1 IO_P2
+bit 684 O 1 IO_P2 683 1 Z
+bit 683 C 1 *
+bit 682 I 1 IO_P3
+bit 681 O 1 IO_P3 680 1 Z
+bit 680 C 1 *
+bit 679 I 1 IO_P6
+bit 678 O 1 IO_P6 677 1 Z
+bit 677 C 1 *
+bit 676 I 1 IO_P7
+bit 675 O 1 IO_P7 674 1 Z
+bit 674 C 1 *
+bit 673 I 1 IO_P9
+bit 672 O 1 IO_P9 671 1 Z
+bit 671 C 1 *
+bit 670 I 1 IO_P10
+bit 669 O 1 IO_P10 668 1 Z
+bit 668 C 1 *
+bit 667 I 1 IO_N1
+bit 666 O 1 IO_N1 665 1 Z
+bit 665 C 1 *
+bit 664 I 1 IO_N2
+bit 663 O 1 IO_N2 662 1 Z
+bit 662 C 1 *
+bit 661 O 1 *
+bit 660 O 1 *
+bit 659 O 1 *
+bit 658 O 1 *
+bit 657 O 1 *
+bit 656 O 1 *
+bit 655 I 1 IO_N8
+bit 654 O 1 IO_N8 653 1 Z
+bit 653 C 1 *
+bit 652 I 1 IO_N9
+bit 651 O 1 IO_N9 650 1 Z
+bit 650 C 1 *
+bit 649 I 1 IO_N10
+bit 648 O 1 IO_N10 647 1 Z
+bit 647 C 1 *
+bit 646 I 1 IO_M10
+bit 645 O 1 IO_M10 644 1 Z
+bit 644 C 1 *
+bit 643 I 1 IO_M1
+bit 642 O 1 IO_M1 641 1 Z
+bit 641 C 1 *
+bit 640 I 1 IO_M2
+bit 639 O 1 IO_M2 638 1 Z
+bit 638 C 1 *
+bit 637 I 1 IO_M3
+bit 636 O 1 IO_M3 635 1 Z
+bit 635 C 1 *
+bit 634 I 1 IO_M4
+bit 633 O 1 IO_M4 632 1 Z
+bit 632 C 1 *
+bit 631 O 1 *
+bit 630 O 1 *
+bit 629 O 1 *
+bit 628 O 1 *
+bit 627 O 1 *
+bit 626 O 1 *
+bit 625 I 1 IO_L1
+bit 624 O 1 IO_L1 623 1 Z
+bit 623 C 1 *
+bit 622 I 1 IO_L2
+bit 621 O 1 IO_L2 620 1 Z
+bit 620 C 1 *
+bit 619 I 1 IO_L3
+bit 618 O 1 IO_L3 617 1 Z
+bit 617 C 1 *
+bit 616 I 1 IO_L4
+bit 615 O 1 IO_L4 614 1 Z
+bit 614 C 1 *
+bit 613 I 1 IO_L5
+bit 612 O 1 IO_L5 611 1 Z
+bit 611 C 1 *
+bit 610 I 1 IO_L6
+bit 609 O 1 IO_L6 608 1 Z
+bit 608 C 1 *
+bit 607 I 1 IO_L7
+bit 606 O 1 IO_L7 605 1 Z
+bit 605 C 1 *
+bit 604 I 1 IO_L8
+bit 603 O 1 IO_L8 602 1 Z
+bit 602 C 1 *
+bit 601 I 1 IO_L10
+bit 600 O 1 IO_L10 599 1 Z
+bit 599 C 1 *
+bit 598 I 1 IO_K10
+bit 597 O 1 IO_K10 596 1 Z
+bit 596 C 1 *
+bit 595 I 1 IO_K2
+bit 594 O 1 IO_K2 593 1 Z
+bit 593 C 1 *
+bit 592 I 1 IO_K3
+bit 591 O 1 IO_K3 590 1 Z
+bit 590 C 1 *
+bit 589 O 1 *
+bit 588 O 1 *
+bit 587 O 1 *
+bit 586 O 1 *
+bit 585 O 1 *
+bit 584 O 1 *
+bit 583 I 1 IO_K6
+bit 582 O 1 IO_K6 581 1 Z
+bit 581 C 1 *
+bit 580 I 1 IO_K7
+bit 579 O 1 IO_K7 578 1 Z
+bit 578 C 1 *
+bit 577 I 1 IO_K9
+bit 576 O 1 IO_K9 575 1 Z
+bit 575 C 1 *
+bit 574 I 1 IO_J8
+bit 573 O 1 IO_J8 572 1 Z
+bit 572 C 1 *
+bit 571 I 1 IO_J1
+bit 570 O 1 IO_J1 569 1 Z
+bit 569 C 1 *
+bit 568 I 1 IO_J2
+bit 567 O 1 IO_J2 566 1 Z
+bit 566 C 1 *
+bit 565 I 1 IO_J4
+bit 564 O 1 IO_J4 563 1 Z
+bit 563 C 1 *
+bit 562 I 1 IO_J5
+bit 561 O 1 IO_J5 560 1 Z
+bit 560 C 1 *
+bit 559 I 1 IO_H1
+bit 558 O 1 IO_H1 557 1 Z
+bit 557 C 1 *
+bit 556 I 1 IO_H2
+bit 555 O 1 IO_H2 554 1 Z
+bit 554 C 1 *
+bit 553 I 1 IO_J6
+bit 552 O 1 IO_J6 551 1 Z
+bit 551 C 1 *
+bit 550 O 1 *
+bit 549 O 1 *
+bit 548 O 1 *
+bit 547 I 1 IO_H3
+bit 546 O 1 IO_H3 545 1 Z
+bit 545 C 1 *
+bit 544 I 1 IO_H4
+bit 543 O 1 IO_H4 542 1 Z
+bit 542 C 1 *
+bit 541 I 1 IO_H5
+bit 540 O 1 IO_H5 539 1 Z
+bit 539 C 1 *
+bit 538 I 1 IO_H6
+bit 537 O 1 IO_H6 536 1 Z
+bit 536 C 1 *
+bit 535 I 1 IO_H7
+bit 534 O 1 IO_H7 533 1 Z
+bit 533 C 1 *
+bit 532 I 1 IO_G6
+bit 531 O 1 IO_G6 530 1 Z
+bit 530 C 1 *
+bit 529 I 1 IO_G1
+bit 528 O 1 IO_G1 527 1 Z
+bit 527 C 1 *
+bit 526 I 1 IO_G2
+bit 525 O 1 IO_G2 524 1 Z
+bit 524 C 1 *
+bit 523 I 1 IO_G3
+bit 522 O 1 IO_G3 521 1 Z
+bit 521 C 1 *
+bit 520 I 1 IO_G4
+bit 519 O 1 IO_G4 518 1 Z
+bit 518 C 1 *
+bit 517 I 1 IO_F2
+bit 516 O 1 IO_F2 515 1 Z
+bit 515 C 1 *
+bit 514 I 1 IO_F3
+bit 513 O 1 IO_F3 512 1 Z
+bit 512 C 1 *
+bit 511 I 1 IO_F5
+bit 510 O 1 IO_F5 509 1 Z
+bit 509 C 1 *
+bit 508 I 1 IO_E4
+bit 507 O 1 IO_E4 506 1 Z
+bit 506 C 1 *
+bit 505 I 1 IO_E1
+bit 504 O 1 IO_E1 503 1 Z
+bit 503 C 1 *
+bit 502 I 1 IO_E2
+bit 501 O 1 IO_E2 500 1 Z
+bit 500 C 1 *
+bit 499 I 1 IO_D1
+bit 498 O 1 IO_D1 497 1 Z
+bit 497 C 1 *
+bit 496 I 1 IO_D2
+bit 495 O 1 IO_D2 494 1 Z
+bit 494 C 1 *
+bit 493 I 1 IO_D3
+bit 492 O 1 IO_D3 491 1 Z
+bit 491 C 1 *
+bit 490 I 1 IO_D4
+bit 489 O 1 IO_D4 488 1 Z
+bit 488 C 1 *
+bit 487 I 1 IO_C1
+bit 486 O 1 IO_C1 485 1 Z
+bit 485 C 1 *
+bit 484 I 1 IO_C2
+bit 483 O 1 IO_C2 482 1 Z
+bit 482 C 1 *
+bit 481 O 1 *
+bit 480 I 1 HSWAP_EN_A3
+bit 479 I 1 IO_C4
+bit 478 O 1 IO_C4 477 1 Z
+bit 477 C 1 *
+bit 476 I 1 IO_B4
+bit 475 O 1 IO_B4 474 1 Z
+bit 474 C 1 *
+bit 473 I 1 IO_A4
+bit 472 O 1 IO_A4 471 1 Z
+bit 471 C 1 *
+bit 470 I 1 IO_B5
+bit 469 O 1 IO_B5 468 1 Z
+bit 468 C 1 *
+bit 467 I 1 IO_A5
+bit 466 O 1 IO_A5 465 1 Z
+bit 465 C 1 *
+bit 464 O 1 *
+bit 463 O 1 *
+bit 462 O 1 *
+bit 461 I 1 IO_D5
+bit 460 O 1 IO_D5 459 1 Z
+bit 459 C 1 *
+bit 458 I 1 IO_E6
+bit 457 O 1 IO_E6 456 1 Z
+bit 456 C 1 *
+bit 455 I 1 IO_C6
+bit 454 O 1 IO_C6 453 1 Z
+bit 453 C 1 *
+bit 452 I 1 IO_B6
+bit 451 O 1 IO_B6 450 1 Z
+bit 450 C 1 *
+bit 449 O 1 *
+bit 448 O 1 *
+bit 447 O 1 *
+bit 446 I 1 IO_F6
+bit 445 O 1 IO_F6 444 1 Z
+bit 444 C 1 *
+bit 443 I 1 IO_F7
+bit 442 O 1 IO_F7 441 1 Z
+bit 441 C 1 *
+bit 440 I 1 IO_D7
+bit 439 O 1 IO_D7 438 1 Z
+bit 438 C 1 *
+bit 437 I 1 IO_C7
+bit 436 O 1 IO_C7 435 1 Z
+bit 435 C 1 *
+bit 434 I 1 IO_G8
+bit 433 O 1 IO_G8 432 1 Z
+bit 432 C 1 *
+bit 431 I 1 IO_F8
+bit 430 O 1 IO_F8 429 1 Z
+bit 429 C 1 *
+bit 428 I 1 IO_E8
+bit 427 O 1 IO_E8 426 1 Z
+bit 426 C 1 *
+bit 425 I 1 IO_D8
+bit 424 O 1 IO_D8 423 1 Z
+bit 423 C 1 *
+bit 422 I 1 IO_C8
+bit 421 O 1 IO_C8 420 1 Z
+bit 420 C 1 *
+bit 419 O 1 *
+bit 418 O 1 *
+bit 417 O 1 *
+bit 416 I 1 IO_B8
+bit 415 O 1 IO_B8 414 1 Z
+bit 414 C 1 *
+bit 413 I 1 IO_A8
+bit 412 O 1 IO_A8 411 1 Z
+bit 411 C 1 *
+bit 410 I 1 IO_J9
+bit 409 O 1 IO_J9 408 1 Z
+bit 408 C 1 *
+bit 407 I 1 IO_H9
+bit 406 O 1 IO_H9 405 1 Z
+bit 405 C 1 *
+bit 404 I 1 IO_F9
+bit 403 O 1 IO_F9 402 1 Z
+bit 402 C 1 *
+bit 401 I 1 IO_G10
+bit 400 O 1 IO_G10 399 1 Z
+bit 399 C 1 *
+bit 398 I 1 IO_F10
+bit 397 O 1 IO_F10 396 1 Z
+bit 396 C 1 *
+bit 395 I 1 IO_C10
+bit 394 O 1 IO_C10 393 1 Z
+bit 393 C 1 *
+bit 392 I 1 IO_B10
+bit 391 O 1 IO_B10 390 1 Z
+bit 390 C 1 *
+bit 389 O 1 *
+bit 388 O 1 *
+bit 387 O 1 *
+bit 386 I 1 IO_J10
+bit 385 O 1 IO_J10 384 1 Z
+bit 384 C 1 *
+bit 383 I 1 IO_K11
+bit 382 O 1 IO_K11 381 1 Z
+bit 381 C 1 *
+bit 380 I 1 IO_H11
+bit 379 O 1 IO_H11 378 1 Z
+bit 378 C 1 *
+bit 377 I 1 IO_G11
+bit 376 O 1 IO_G11 375 1 Z
+bit 375 C 1 *
+bit 374 O 1 *
+bit 373 O 1 *
+bit 372 O 1 *
+bit 371 I 1 IO_F11
+bit 370 O 1 IO_F11 369 1 Z
+bit 369 C 1 *
+bit 368 I 1 IO_E11
+bit 367 O 1 IO_E11 366 1 Z
+bit 366 C 1 *
+bit 365 I 1 IO_D11
+bit 364 O 1 IO_D11 363 1 Z
+bit 363 C 1 *
+bit 362 I 1 IO_C11
+bit 361 O 1 IO_C11 360 1 Z
+bit 360 C 1 *
+bit 359 O 1 *
+bit 358 O 1 *
+bit 357 O 1 *
+bit 356 I 1 IO_B11
+bit 355 O 1 IO_B11 354 1 Z
+bit 354 C 1 *
+bit 353 I 1 IO_A11
+bit 352 O 1 IO_A11 351 1 Z
+bit 351 C 1 *
+bit 350 I 1 IO_K12
+bit 349 O 1 IO_K12 348 1 Z
+bit 348 C 1 *
+bit 347 I 1 IO_J12
+bit 346 O 1 IO_J12 345 1 Z
+bit 345 C 1 *
+bit 344 O 1 *
+bit 343 O 1 *
+bit 342 O 1 *
+bit 341 I 1 IO_H12
+bit 340 O 1 IO_H12 339 1 Z
+bit 339 C 1 *
+bit 338 I 1 IO_G12
+bit 337 O 1 IO_G12 336 1 Z
+bit 336 C 1 *
+bit 335 I 1 IO_F12
+bit 334 O 1 IO_F12 333 1 Z
+bit 333 C 1 *
+bit 332 I 1 IO_E12
+bit 331 O 1 IO_E12 330 1 Z
+bit 330 C 1 *
+bit 329 O 1 *
+bit 328 O 1 *
+bit 327 O 1 *
+bit 326 I 1 IO_D12
+bit 325 O 1 IO_D12 324 1 Z
+bit 324 C 1 *
+bit 323 I 1 IO_C12
+bit 322 O 1 IO_C12 321 1 Z
+bit 321 C 1 *
+bit 320 I 1 IO_B12
+bit 319 O 1 IO_B12 318 1 Z
+bit 318 C 1 *
+bit 317 I 1 IO_A12
+bit 316 O 1 IO_A12 315 1 Z
+bit 315 C 1 *
+bit 314 I 1 IO_K13
+bit 313 O 1 IO_K13 312 1 Z
+bit 312 C 1 *
+bit 311 I 1 IO_J13
+bit 310 O 1 IO_J13 309 1 Z
+bit 309 C 1 *
+bit 308 I 1 IO_H13
+bit 307 O 1 IO_H13 306 1 Z
+bit 306 C 1 *
+bit 305 I 1 IO_F13
+bit 304 O 1 IO_F13 303 1 Z
+bit 303 C 1 *
+bit 302 I 1 IO_E13
+bit 301 O 1 IO_E13 300 1 Z
+bit 300 C 1 *
+bit 299 I 1 IO_D13
+bit 298 O 1 IO_D13 297 1 Z
+bit 297 C 1 *
+bit 296 I 1 IO_B13
+bit 295 O 1 IO_B13 294 1 Z
+bit 294 C 1 *
+bit 293 I 1 IO_A13
+bit 292 O 1 IO_A13 291 1 Z
+bit 291 C 1 *
+bit 290 I 1 IO_K14
+bit 289 O 1 IO_K14 288 1 Z
+bit 288 C 1 *
+bit 287 I 1 IO_J14
+bit 286 O 1 IO_J14 285 1 Z
+bit 285 C 1 *
+bit 284 I 1 IO_K15
+bit 283 O 1 IO_K15 282 1 Z
+bit 282 C 1 *
+bit 281 I 1 IO_G14
+bit 280 O 1 IO_G14 279 1 Z
+bit 279 C 1 *
+bit 278 I 1 IO_F14
+bit 277 O 1 IO_F14 276 1 Z
+bit 276 C 1 *
+bit 275 I 1 IO_C14
+bit 274 O 1 IO_C14 273 1 Z
+bit 273 C 1 *
+bit 272 I 1 IO_B14
+bit 271 O 1 IO_B14 270 1 Z
+bit 270 C 1 *
+bit 269 O 1 *
+bit 268 O 1 *
+bit 267 O 1 *
+bit 266 I 1 IO_J15
+bit 265 O 1 IO_J15 264 1 Z
+bit 264 C 1 *
+bit 263 I 1 IO_H15
+bit 262 O 1 IO_H15 261 1 Z
+bit 261 C 1 *
+bit 260 I 1 IO_G15
+bit 259 O 1 IO_G15 258 1 Z
+bit 258 C 1 *
+bit 257 I 1 IO_F15
+bit 256 O 1 IO_F15 255 1 Z
+bit 255 C 1 *
+bit 254 I 1 IO_E15
+bit 253 O 1 IO_E15 252 1 Z
+bit 252 C 1 *
+bit 251 I 1 IO_D15
+bit 250 O 1 IO_D15 249 1 Z
+bit 249 C 1 *
+bit 248 I 1 IO_C15
+bit 247 O 1 IO_C15 246 1 Z
+bit 246 C 1 *
+bit 245 I 1 IO_B15
+bit 244 O 1 IO_B15 243 1 Z
+bit 243 C 1 *
+bit 242 I 1 IO_A15
+bit 241 O 1 IO_A15 240 1 Z
+bit 240 C 1 *
+bit 239 I 1 IO_A16
+bit 238 O 1 IO_A16 237 1 Z
+bit 237 C 1 *
+bit 236 I 1 IO_B16
+bit 235 O 1 IO_B16 234 1 Z
+bit 234 C 1 *
+bit 233 I 1 IO_C16
+bit 232 O 1 IO_C16 231 1 Z
+bit 231 C 1 *
+bit 230 I 1 IO_D16
+bit 229 O 1 IO_D16 228 1 Z
+bit 228 C 1 *
+bit 227 I 1 IO_E16
+bit 226 O 1 IO_E16 225 1 Z
+bit 225 C 1 *
+bit 224 I 1 IO_F16
+bit 223 O 1 IO_F16 222 1 Z
+bit 222 C 1 *
+bit 221 I 1 IO_G16
+bit 220 O 1 IO_G16 219 1 Z
+bit 219 C 1 *
+bit 218 I 1 IO_H16
+bit 217 O 1 IO_H16 216 1 Z
+bit 216 C 1 *
+bit 215 I 1 IO_J16
+bit 214 O 1 IO_J16 213 1 Z
+bit 213 C 1 *
+bit 212 I 1 IO_K16
+bit 211 O 1 IO_K16 210 1 Z
+bit 210 C 1 *
+bit 209 I 1 IO_J17
+bit 208 O 1 IO_J17 207 1 Z
+bit 207 C 1 *
+bit 206 I 1 IO_B17
+bit 205 O 1 IO_B17 204 1 Z
+bit 204 C 1 *
+bit 203 I 1 IO_C17
+bit 202 O 1 IO_C17 201 1 Z
+bit 201 C 1 *
+bit 200 I 1 IO_F17
+bit 199 O 1 IO_F17 198 1 Z
+bit 198 C 1 *
+bit 197 I 1 IO_G17
+bit 196 O 1 IO_G17 195 1 Z
+bit 195 C 1 *
+bit 194 I 1 IO_F18
+bit 193 O 1 IO_F18 192 1 Z
+bit 192 C 1 *
+bit 191 I 1 IO_A19
+bit 190 O 1 IO_A19 189 1 Z
+bit 189 C 1 *
+bit 188 I 1 IO_B19
+bit 187 O 1 IO_B19 186 1 Z
+bit 186 C 1 *
+bit 185 I 1 IO_C19
+bit 184 O 1 IO_C19 183 1 Z
+bit 183 C 1 *
+bit 182 I 1 IO_D19
+bit 181 O 1 IO_D19 180 1 Z
+bit 180 C 1 *
+bit 179 O 1 *
+bit 178 O 1 *
+bit 177 O 1 *
+bit 176 I 1 IO_E19
+bit 175 O 1 IO_E19 174 1 Z
+bit 174 C 1 *
+bit 173 I 1 IO_F19
+bit 172 O 1 IO_F19 171 1 Z
+bit 171 C 1 *
+bit 170 I 1 IO_G19
+bit 169 O 1 IO_G19 168 1 Z
+bit 168 C 1 *
+bit 167 I 1 IO_H19
+bit 166 O 1 IO_H19 165 1 Z
+bit 165 C 1 *
+bit 164 O 1 *
+bit 163 O 1 *
+bit 162 O 1 *
+bit 161 I 1 IO_J19
+bit 160 O 1 IO_J19 159 1 Z
+bit 159 C 1 *
+bit 158 I 1 IO_K19
+bit 157 O 1 IO_K19 156 1 Z
+bit 156 C 1 *
+bit 155 I 1 IO_A20
+bit 154 O 1 IO_A20 153 1 Z
+bit 153 C 1 *
+bit 152 I 1 IO_B20
+bit 151 O 1 IO_B20 150 1 Z
+bit 150 C 1 *
+bit 149 O 1 *
+bit 148 O 1 *
+bit 147 O 1 *
+bit 146 I 1 IO_C20
+bit 145 O 1 IO_C20 144 1 Z
+bit 144 C 1 *
+bit 143 I 1 IO_D20
+bit 142 O 1 IO_D20 141 1 Z
+bit 141 C 1 *
+bit 140 I 1 IO_E20
+bit 139 O 1 IO_E20 138 1 Z
+bit 138 C 1 *
+bit 137 I 1 IO_F20
+bit 136 O 1 IO_F20 135 1 Z
+bit 135 C 1 *
+bit 134 O 1 *
+bit 133 O 1 *
+bit 132 O 1 *
+bit 131 I 1 IO_G20
+bit 130 O 1 IO_G20 129 1 Z
+bit 129 C 1 *
+bit 128 I 1 IO_H20
+bit 127 O 1 IO_H20 126 1 Z
+bit 126 C 1 *
+bit 125 I 1 IO_B21
+bit 124 O 1 IO_B21 123 1 Z
+bit 123 C 1 *
+bit 122 I 1 IO_C21
+bit 121 O 1 IO_C21 120 1 Z
+bit 120 C 1 *
+bit 119 I 1 IO_K20
+bit 118 O 1 IO_K20 117 1 Z
+bit 117 C 1 *
+bit 116 I 1 IO_F21
+bit 115 O 1 IO_F21 114 1 Z
+bit 114 C 1 *
+bit 113 I 1 IO_G21
+bit 112 O 1 IO_G21 111 1 Z
+bit 111 C 1 *
+bit 110 I 1 IO_A22
+bit 109 O 1 IO_A22 108 1 Z
+bit 108 C 1 *
+bit 107 I 1 IO_B22
+bit 106 O 1 IO_B22 105 1 Z
+bit 105 C 1 *
+bit 104 I 1 IO_J21
+bit 103 O 1 IO_J21 102 1 Z
+bit 102 C 1 *
+bit 101 I 1 IO_D22
+bit 100 O 1 IO_D22 99 1 Z
+bit 99 C 1 *
+bit 98 I 1 IO_E22
+bit 97 O 1 IO_E22 96 1 Z
+bit 96 C 1 *
+bit 95 I 1 IO_F22
+bit 94 O 1 IO_F22 93 1 Z
+bit 93 C 1 *
+bit 92 I 1 IO_E23
+bit 91 O 1 IO_E23 90 1 Z
+bit 90 C 1 *
+bit 89 O 1 *
+bit 88 O 1 *
+bit 87 O 1 *
+bit 86 I 1 IO_H22
+bit 85 O 1 IO_H22 84 1 Z
+bit 84 C 1 *
+bit 83 I 1 IO_J22
+bit 82 O 1 IO_J22 81 1 Z
+bit 81 C 1 *
+bit 80 I 1 IO_A23
+bit 79 O 1 IO_A23 78 1 Z
+bit 78 C 1 *
+bit 77 I 1 IO_B23
+bit 76 O 1 IO_B23 75 1 Z
+bit 75 C 1 *
+bit 74 O 1 *
+bit 73 O 1 *
+bit 72 O 1 *
+bit 71 I 1 IO_C23
+bit 70 O 1 IO_C23 69 1 Z
+bit 69 C 1 *
+bit 68 I 1 IO_D23
+bit 67 O 1 IO_D23 66 1 Z
+bit 66 C 1 *
+bit 65 I 1 IO_F23
+bit 64 O 1 IO_F23 63 1 Z
+bit 63 C 1 *
+bit 62 I 1 IO_G23
+bit 61 O 1 IO_G23 60 1 Z
+bit 60 C 1 *
+bit 59 O 1 *
+bit 58 O 1 *
+bit 57 O 1 *
+bit 56 I 1 IO_H23
+bit 55 O 1 IO_H23 54 1 Z
+bit 54 C 1 *
+bit 53 I 1 IO_G24
+bit 52 O 1 IO_G24 51 1 Z
+bit 51 C 1 *
+bit 50 I 1 IO_A24
+bit 49 O 1 IO_A24 48 1 Z
+bit 48 C 1 *
+bit 47 I 1 IO_B24
+bit 46 O 1 IO_B24 45 1 Z
+bit 45 C 1 *
+bit 44 O 1 *
+bit 43 O 1 *
+bit 42 O 1 *
+bit 41 I 1 IO_C24
+bit 40 O 1 IO_C24 39 1 Z
+bit 39 C 1 *
+bit 38 I 1 IO_D24
+bit 37 O 1 IO_D24 36 1 Z
+bit 36 C 1 *
+bit 35 I 1 IO_F24
+bit 34 O 1 IO_F24 33 1 Z
+bit 33 C 1 *
+bit 32 I 1 IO_F25
+bit 31 O 1 IO_F25 30 1 Z
+bit 30 C 1 *
+bit 29 I 1 IO_E25
+bit 28 O 1 IO_E25 27 1 Z
+bit 27 C 1 *
+bit 26 I 1 IO_B25
+bit 25 O 1 IO_B25 24 1 Z
+bit 24 C 1 *
+bit 23 I 1 IO_C25
+bit 22 O 1 IO_C25 21 1 Z
+bit 21 C 1 *
+bit 20 I 1 IO_A26
+bit 19 O 1 IO_A26 18 1 Z
+bit 18 C 1 *
+bit 17 I 1 IO_B26
+bit 16 O 1 IO_B26 15 1 Z
+bit 15 C 1 *
+bit 14 O 1 *
+bit 13 O 1 *
+bit 12 O 1 *
+bit 11 I 1 IO_D26
+bit 10 O 1 IO_D26 9 1 Z
+bit 9 C 1 *
+bit 8 I 1 IO_C27
+bit 7 O 1 IO_C27 6 1 Z
+bit 6 C 1 *
+bit 5 I 1 IO_A27
+bit 4 O 1 IO_A27 3 1 Z
+bit 3 C 1 *
+bit 2 I 1 IO_B27
+bit 1 O 1 IO_B27 0 1 Z
+bit 0 C 1 *
--- /dev/null
+0000 xc3s400 0
--- /dev/null
+signal GND1
+signal GND2
+signal GND3
+signal GND4
+signal GND5
+signal GND6
+signal GND7
+signal GND8
+signal GND9
+signal GND10
+signal GND11
+signal GND12
+signal GND13
+signal GND14
+signal GND15
+signal GND16
+signal GND17
+signal GND18
+signal GND19
+signal GND20
+signal GND21
+signal GND22
+signal GND23
+signal GND24
+signal GND25
+signal GND26
+signal GND27
+signal GND28
+signal GND29
+signal GND30
+signal GND31
+signal GND32
+signal GND33
+signal GND34
+signal GND35
+signal GND36
+signal GND37
+signal GND38
+signal GND39
+signal GND40
+signal GND41
+signal GND42
+signal GND43
+signal GND44
+signal GND45
+signal GND46
+signal GND47
+signal GND48
+signal GND49
+signal GND50
+signal GND51
+signal GND52
+signal GND53
+signal GND54
+signal GND55
+signal GND56
+signal CCLK_PAD275
+signal DONE_PAD274
+signal HSWAP_EN_PAD56
+signal M0_PAD165
+signal M1_PAD164
+signal M2_PAD166
+signal PROG_B
+signal TCK
+signal TDI
+signal TDO
+signal TMS
+signal VCCAUX1
+signal VCCAUX2
+signal VCCAUX3
+signal VCCAUX4
+signal VCCAUX5
+signal VCCAUX6
+signal VCCAUX7
+signal VCCAUX8
+signal VCCAUX9
+signal VCCAUX10
+signal VCCAUX11
+signal VCCAUX12
+signal VCCAUX13
+signal VCCAUX14
+signal VCCAUX15
+signal VCCAUX16
+signal VCCINT1
+signal VCCINT2
+signal VCCINT3
+signal VCCINT4
+signal VCCINT5
+signal VCCINT6
+signal VCCINT7
+signal VCCINT8
+signal VCCINT9
+signal VCCINT10
+signal VCCINT11
+signal VCCINT12
+signal VCCINT13
+signal VCCINT14
+signal VCCINT15
+signal VCCINT16
+signal VCCO01
+signal VCCO02
+signal VCCO03
+signal VCCO04
+signal VCCO05
+signal VCCO06
+signal VCCO11
+signal VCCO12
+signal VCCO13
+signal VCCO14
+signal VCCO15
+signal VCCO16
+signal VCCO21
+signal VCCO22
+signal VCCO23
+signal VCCO24
+signal VCCO25
+signal VCCO26
+signal VCCO31
+signal VCCO32
+signal VCCO33
+signal VCCO34
+signal VCCO35
+signal VCCO36
+signal VCCO41
+signal VCCO42
+signal VCCO43
+signal VCCO44
+signal VCCO45
+signal VCCO46
+signal VCCO51
+signal VCCO52
+signal VCCO53
+signal VCCO54
+signal VCCO55
+signal VCCO56
+signal VCCO61
+signal VCCO62
+signal VCCO63
+signal VCCO64
+signal VCCO65
+signal VCCO66
+signal VCCO71
+signal VCCO72
+signal VCCO73
+signal VCCO74
+signal VCCO75
+signal VCCO76
+signal IO_PAD2
+signal IO_PAD3
+signal IO_PAD4
+signal IO_PAD6
+signal IO_PAD8
+signal IO_PAD9
+signal IO_PAD10
+signal IO_PAD12
+signal IO_PAD13
+signal IO_PAD14
+signal IO_PAD16
+signal IO_PAD18
+signal IO_PAD20
+signal IO_PAD22
+signal IO_PAD23
+signal IO_PAD24
+signal IO_PAD26
+signal IO_PAD28
+signal IO_PAD29
+signal IO_PAD30
+signal IO_PAD31
+signal IO_PAD32
+signal IO_PAD33
+signal IO_PAD34
+signal IO_PAD35
+signal IO_PAD36
+signal IO_PAD38
+signal IO_PAD40
+signal IO_PAD42
+signal IO_PAD44
+signal IO_PAD48
+signal IO_PAD49
+signal IO_PAD53
+signal IO_PAD54
+signal IO_PAD55
+signal IO_PAD62
+signal IO_PAD63
+signal IO_PAD65
+signal IO_PAD66
+signal IO_PAD67
+signal IO_PAD69
+signal IO_PAD70
+signal IO_PAD71
+signal IO_PAD73
+signal IO_PAD75
+signal IO_PAD76
+signal IO_PAD77
+signal IO_PAD78
+signal IO_PAD79
+signal IO_PAD81
+signal IO_PAD83
+signal IO_PAD85
+signal IO_PAD87
+signal IO_PAD88
+signal IO_PAD89
+signal IO_PAD91
+signal IO_PAD92
+signal IO_PAD93
+signal IO_PAD95
+signal IO_PAD97
+signal IO_PAD99
+signal IO_PAD101
+signal IO_PAD102
+signal IO_PAD103
+signal IO_PAD105
+signal IO_PAD107
+signal IO_PAD108
+signal IO_PAD114
+signal IO_PAD115
+signal IO_PAD117
+signal IO_PAD119
+signal IO_PAD120
+signal IO_PAD121
+signal IO_PAD123
+signal IO_PAD125
+signal IO_PAD127
+signal IO_PAD129
+signal IO_PAD130
+signal IO_PAD131
+signal IO_PAD133
+signal IO_PAD134
+signal IO_PAD135
+signal IO_PAD137
+signal IO_PAD139
+signal IO_PAD141
+signal IO_PAD143
+signal IO_PAD144
+signal IO_PAD145
+signal IO_PAD146
+signal IO_PAD147
+signal IO_PAD149
+signal IO_PAD151
+signal IO_PAD152
+signal IO_PAD153
+signal IO_PAD155
+signal IO_PAD156
+signal IO_PAD157
+signal IO_PAD159
+signal IO_PAD160
+signal IO_PAD167
+signal IO_PAD168
+signal IO_PAD171
+signal IO_PAD172
+signal IO_PAD173
+signal IO_PAD176
+signal IO_PAD178
+signal IO_PAD180
+signal IO_PAD182
+signal IO_PAD184
+signal IO_PAD185
+signal IO_PAD186
+signal IO_PAD187
+signal IO_PAD188
+signal IO_PAD189
+signal IO_PAD190
+signal IO_PAD191
+signal IO_PAD192
+signal IO_PAD194
+signal IO_PAD196
+signal IO_PAD197
+signal IO_PAD198
+signal IO_PAD200
+signal IO_PAD202
+signal IO_PAD204
+signal IO_PAD206
+signal IO_PAD207
+signal IO_PAD208
+signal IO_PAD210
+signal IO_PAD211
+signal IO_PAD212
+signal IO_PAD214
+signal IO_PAD216
+signal IO_PAD217
+signal IO_PAD218
+signal IO_PAD222
+signal IO_PAD223
+signal IO_PAD224
+signal IO_PAD226
+signal IO_PAD228
+signal IO_PAD229
+signal IO_PAD230
+signal IO_PAD232
+signal IO_PAD233
+signal IO_PAD234
+signal IO_PAD236
+signal IO_PAD238
+signal IO_PAD240
+signal IO_PAD242
+signal IO_PAD243
+signal IO_PAD244
+signal IO_PAD246
+signal IO_PAD248
+signal IO_PAD249
+signal IO_PAD250
+signal IO_PAD251
+signal IO_PAD252
+signal IO_PAD253
+signal IO_PAD254
+signal IO_PAD255
+signal IO_PAD256
+signal IO_PAD258
+signal IO_PAD260
+signal IO_PAD262
+signal IO_PAD264
+signal IO_PAD267
+signal IO_PAD268
+signal IO_PAD271
+signal IO_PAD272
+signal IO_PAD273
+signal IO_PAD279
+signal IO_PAD280
+signal IO_PAD282
+signal IO_PAD283
+signal IO_PAD284
+signal IO_PAD286
+signal IO_PAD287
+signal IO_PAD288
+signal IO_PAD290
+signal IO_PAD292
+signal IO_PAD293
+signal IO_PAD294
+signal IO_PAD295
+signal IO_PAD296
+signal IO_PAD298
+signal IO_PAD300
+signal IO_PAD302
+signal IO_PAD304
+signal IO_PAD305
+signal IO_PAD306
+signal IO_PAD308
+signal IO_PAD309
+signal IO_PAD310
+signal IO_PAD312
+signal IO_PAD314
+signal IO_PAD316
+signal IO_PAD318
+signal IO_PAD319
+signal IO_PAD320
+signal IO_PAD322
+signal IO_PAD324
+signal IO_PAD325
+signal IO_PAD331
+signal IO_PAD332
+signal IO_PAD334
+signal IO_PAD336
+signal IO_PAD337
+signal IO_PAD338
+signal IO_PAD340
+signal IO_PAD342
+signal IO_PAD344
+signal IO_PAD346
+signal IO_PAD347
+signal IO_PAD348
+signal IO_PAD350
+signal IO_PAD351
+signal IO_PAD352
+signal IO_PAD354
+signal IO_PAD356
+signal IO_PAD358
+signal IO_PAD360
+signal IO_PAD361
+signal IO_PAD362
+signal IO_PAD363
+signal IO_PAD364
+signal IO_PAD366
+signal IO_PAD368
+signal IO_PAD369
+signal IO_PAD370
+signal IO_PAD372
+signal IO_PAD373
+signal IO_PAD374
+signal IO_PAD376
+signal IO_PAD377
+signal IO_PAD384
+signal IO_PAD385
+signal IO_PAD388
+signal IO_PAD389
+signal IO_PAD390
+signal IO_PAD394
+signal IO_PAD396
+signal IO_PAD398
+signal IO_PAD400
+signal IO_PAD402
+signal IO_PAD403
+signal IO_PAD404
+signal IO_PAD405
+signal IO_PAD406
+signal IO_PAD407
+signal IO_PAD408
+signal IO_PAD409
+signal IO_PAD410
+signal IO_PAD412
+signal IO_PAD414
+signal IO_PAD415
+signal IO_PAD416
+signal IO_PAD418
+signal IO_PAD420
+signal IO_PAD422
+signal IO_PAD424
+signal IO_PAD425
+signal IO_PAD426
+signal IO_PAD428
+signal IO_PAD429
+signal IO_PAD430
+signal IO_PAD432
+signal IO_PAD434
+signal IO_PAD435
+
+register BSR 815
+register BR 1
+register DIR 32
+
+instruction length 6
+
+instruction EXTEST 000000 BSR
+instruction SAMPLE/PRELOAD 000001 BSR
+instruction IDCODE 001001 DIR
+instruction BYPASS 111111 BR
+
+bit 814 I 1 IO_PAD377
+bit 813 O 1 IO_PAD377 812 1 Z
+bit 812 C 1 *
+bit 811 I 1 IO_PAD376
+bit 810 O 1 IO_PAD376 809 1 Z
+bit 809 C 1 *
+bit 808 I 1 IO_PAD374
+bit 807 O 1 IO_PAD374 806 1 Z
+bit 806 C 1 *
+bit 805 I 1 IO_PAD373
+bit 804 O 1 IO_PAD373 803 1 Z
+bit 803 C 1 *
+bit 802 I 1 IO_PAD372
+bit 801 O 1 IO_PAD372 800 1 Z
+bit 800 C 1 *
+bit 799 I 1 IO_PAD370
+bit 798 O 1 IO_PAD370 797 1 Z
+bit 797 C 1 *
+bit 796 I 1 IO_PAD369
+bit 795 O 1 IO_PAD369 794 1 Z
+bit 794 C 1 *
+bit 793 I 1 IO_PAD368
+bit 792 O 1 IO_PAD368 791 1 Z
+bit 791 C 1 *
+bit 790 I 1 IO_PAD366
+bit 789 O 1 IO_PAD366 788 1 Z
+bit 788 C 1 *
+bit 787 I 1 IO_PAD364
+bit 786 O 1 IO_PAD364 785 1 Z
+bit 785 C 1 *
+bit 784 I 1 IO_PAD363
+bit 783 O 1 IO_PAD363 782 1 Z
+bit 782 C 1 *
+bit 781 I 1 IO_PAD362
+bit 780 O 1 IO_PAD362 779 1 Z
+bit 779 C 1 *
+bit 778 I 1 IO_PAD361
+bit 777 O 1 IO_PAD361 776 1 Z
+bit 776 C 1 *
+bit 775 I 1 IO_PAD360
+bit 774 O 1 IO_PAD360 773 1 Z
+bit 773 C 1 *
+bit 772 I 1 IO_PAD358
+bit 771 O 1 IO_PAD358 770 1 Z
+bit 770 C 1 *
+bit 769 I 1 IO_PAD356
+bit 768 O 1 IO_PAD356 767 1 Z
+bit 767 C 1 *
+bit 766 I 1 IO_PAD354
+bit 765 O 1 IO_PAD354 764 1 Z
+bit 764 C 1 *
+bit 763 I 1 IO_PAD352
+bit 762 O 1 IO_PAD352 761 1 Z
+bit 761 C 1 *
+bit 760 I 1 IO_PAD351
+bit 759 O 1 IO_PAD351 758 1 Z
+bit 758 C 1 *
+bit 757 I 1 IO_PAD350
+bit 756 O 1 IO_PAD350 755 1 Z
+bit 755 C 1 *
+bit 754 I 1 IO_PAD348
+bit 753 O 1 IO_PAD348 752 1 Z
+bit 752 C 1 *
+bit 751 I 1 IO_PAD347
+bit 750 O 1 IO_PAD347 749 1 Z
+bit 749 C 1 *
+bit 748 I 1 IO_PAD346
+bit 747 O 1 IO_PAD346 746 1 Z
+bit 746 C 1 *
+bit 745 I 1 IO_PAD344
+bit 744 O 1 IO_PAD344 743 1 Z
+bit 743 C 1 *
+bit 742 I 1 IO_PAD342
+bit 741 O 1 IO_PAD342 740 1 Z
+bit 740 C 1 *
+bit 739 I 1 IO_PAD340
+bit 738 O 1 IO_PAD340 737 1 Z
+bit 737 C 1 *
+bit 736 I 1 IO_PAD338
+bit 735 O 1 IO_PAD338 734 1 Z
+bit 734 C 1 *
+bit 733 I 1 IO_PAD337
+bit 732 O 1 IO_PAD337 731 1 Z
+bit 731 C 1 *
+bit 730 I 1 IO_PAD336
+bit 729 O 1 IO_PAD336 728 1 Z
+bit 728 C 1 *
+bit 727 I 1 IO_PAD334
+bit 726 O 1 IO_PAD334 725 1 Z
+bit 725 C 1 *
+bit 724 I 1 IO_PAD332
+bit 723 O 1 IO_PAD332 722 1 Z
+bit 722 C 1 *
+bit 721 I 1 IO_PAD331
+bit 720 O 1 IO_PAD331 719 1 Z
+bit 719 C 1 *
+bit 718 I 1 IO_PAD325
+bit 717 O 1 IO_PAD325 716 1 Z
+bit 716 C 1 *
+bit 715 I 1 IO_PAD324
+bit 714 O 1 IO_PAD324 713 1 Z
+bit 713 C 1 *
+bit 712 I 1 IO_PAD322
+bit 711 O 1 IO_PAD322 710 1 Z
+bit 710 C 1 *
+bit 709 I 1 IO_PAD320
+bit 708 O 1 IO_PAD320 707 1 Z
+bit 707 C 1 *
+bit 706 I 1 IO_PAD319
+bit 705 O 1 IO_PAD319 704 1 Z
+bit 704 C 1 *
+bit 703 I 1 IO_PAD318
+bit 702 O 1 IO_PAD318 701 1 Z
+bit 701 C 1 *
+bit 700 I 1 IO_PAD316
+bit 699 O 1 IO_PAD316 698 1 Z
+bit 698 C 1 *
+bit 697 I 1 IO_PAD314
+bit 696 O 1 IO_PAD314 695 1 Z
+bit 695 C 1 *
+bit 694 I 1 IO_PAD312
+bit 693 O 1 IO_PAD312 692 1 Z
+bit 692 C 1 *
+bit 691 I 1 IO_PAD310
+bit 690 O 1 IO_PAD310 689 1 Z
+bit 689 C 1 *
+bit 688 I 1 IO_PAD309
+bit 687 O 1 IO_PAD309 686 1 Z
+bit 686 C 1 *
+bit 685 I 1 IO_PAD308
+bit 684 O 1 IO_PAD308 683 1 Z
+bit 683 C 1 *
+bit 682 I 1 IO_PAD306
+bit 681 O 1 IO_PAD306 680 1 Z
+bit 680 C 1 *
+bit 679 I 1 IO_PAD305
+bit 678 O 1 IO_PAD305 677 1 Z
+bit 677 C 1 *
+bit 676 I 1 IO_PAD304
+bit 675 O 1 IO_PAD304 674 1 Z
+bit 674 C 1 *
+bit 673 I 1 IO_PAD302
+bit 672 O 1 IO_PAD302 671 1 Z
+bit 671 C 1 *
+bit 670 I 1 IO_PAD300
+bit 669 O 1 IO_PAD300 668 1 Z
+bit 668 C 1 *
+bit 667 I 1 IO_PAD298
+bit 666 O 1 IO_PAD298 665 1 Z
+bit 665 C 1 *
+bit 664 I 1 IO_PAD296
+bit 663 O 1 IO_PAD296 662 1 Z
+bit 662 C 1 *
+bit 661 I 1 IO_PAD295
+bit 660 O 1 IO_PAD295 659 1 Z
+bit 659 C 1 *
+bit 658 I 1 IO_PAD294
+bit 657 O 1 IO_PAD294 656 1 Z
+bit 656 C 1 *
+bit 655 I 1 IO_PAD293
+bit 654 O 1 IO_PAD293 653 1 Z
+bit 653 C 1 *
+bit 652 I 1 IO_PAD292
+bit 651 O 1 IO_PAD292 650 1 Z
+bit 650 C 1 *
+bit 649 I 1 IO_PAD290
+bit 648 O 1 IO_PAD290 647 1 Z
+bit 647 C 1 *
+bit 646 I 1 IO_PAD288
+bit 645 O 1 IO_PAD288 644 1 Z
+bit 644 C 1 *
+bit 643 I 1 IO_PAD287
+bit 642 O 1 IO_PAD287 641 1 Z
+bit 641 C 1 *
+bit 640 I 1 IO_PAD286
+bit 639 O 1 IO_PAD286 638 1 Z
+bit 638 C 1 *
+bit 637 I 1 IO_PAD284
+bit 636 O 1 IO_PAD284 635 1 Z
+bit 635 C 1 *
+bit 634 I 1 IO_PAD283
+bit 633 O 1 IO_PAD283 632 1 Z
+bit 632 C 1 *
+bit 631 I 1 IO_PAD282
+bit 630 O 1 IO_PAD282 629 1 Z
+bit 629 C 1 *
+bit 628 I 1 IO_PAD280
+bit 627 O 1 IO_PAD280 626 1 Z
+bit 626 C 1 *
+bit 625 I 1 IO_PAD279
+bit 624 O 1 IO_PAD279 623 1 Z
+bit 623 C 1 *
+bit 622 I 1 CCLK_PAD275
+bit 621 O 1 CCLK_PAD275 620 1 Z
+bit 620 C 1 *
+bit 619 I 1 DONE_PAD274
+bit 618 O 1 DONE_PAD274 617 1 Z
+bit 617 C 1 *
+bit 616 I 1 IO_PAD273
+bit 615 O 1 IO_PAD273 614 1 Z
+bit 614 C 1 *
+bit 613 I 1 IO_PAD272
+bit 612 O 1 IO_PAD272 611 1 Z
+bit 611 C 1 *
+bit 610 I 1 IO_PAD271
+bit 609 O 1 IO_PAD271 608 1 Z
+bit 608 C 1 *
+bit 607 I 1 IO_PAD268
+bit 606 O 1 IO_PAD268 605 1 Z
+bit 605 C 1 *
+bit 604 I 1 IO_PAD267
+bit 603 O 1 IO_PAD267 602 1 Z
+bit 602 C 1 *
+bit 601 I 1 IO_PAD264
+bit 600 O 1 IO_PAD264 599 1 Z
+bit 599 C 1 *
+bit 598 I 1 IO_PAD262
+bit 597 O 1 IO_PAD262 596 1 Z
+bit 596 C 1 *
+bit 595 I 1 IO_PAD260
+bit 594 O 1 IO_PAD260 593 1 Z
+bit 593 C 1 *
+bit 592 I 1 IO_PAD258
+bit 591 O 1 IO_PAD258 590 1 Z
+bit 590 C 1 *
+bit 589 I 1 IO_PAD256
+bit 588 O 1 IO_PAD256 587 1 Z
+bit 587 C 1 *
+bit 586 I 1 IO_PAD255
+bit 585 O 1 IO_PAD255 584 1 Z
+bit 584 C 1 *
+bit 583 I 1 IO_PAD254
+bit 582 O 1 IO_PAD254 581 1 Z
+bit 581 C 1 *
+bit 580 I 1 IO_PAD253
+bit 579 O 1 IO_PAD253 578 1 Z
+bit 578 C 1 *
+bit 577 I 1 IO_PAD252
+bit 576 O 1 IO_PAD252 575 1 Z
+bit 575 C 1 *
+bit 574 I 1 IO_PAD251
+bit 573 O 1 IO_PAD251 572 1 Z
+bit 572 C 1 *
+bit 571 I 1 IO_PAD250
+bit 570 O 1 IO_PAD250 569 1 Z
+bit 569 C 1 *
+bit 568 I 1 IO_PAD249
+bit 567 O 1 IO_PAD249 566 1 Z
+bit 566 C 1 *
+bit 565 I 1 IO_PAD248
+bit 564 O 1 IO_PAD248 563 1 Z
+bit 563 C 1 *
+bit 562 I 1 IO_PAD246
+bit 561 O 1 IO_PAD246 560 1 Z
+bit 560 C 1 *
+bit 559 I 1 IO_PAD244
+bit 558 O 1 IO_PAD244 557 1 Z
+bit 557 C 1 *
+bit 556 I 1 IO_PAD243
+bit 555 O 1 IO_PAD243 554 1 Z
+bit 554 C 1 *
+bit 553 I 1 IO_PAD242
+bit 552 O 1 IO_PAD242 551 1 Z
+bit 551 C 1 *
+bit 550 I 1 IO_PAD240
+bit 549 O 1 IO_PAD240 548 1 Z
+bit 548 C 1 *
+bit 547 I 1 IO_PAD238
+bit 546 O 1 IO_PAD238 545 1 Z
+bit 545 C 1 *
+bit 544 I 1 IO_PAD236
+bit 543 O 1 IO_PAD236 542 1 Z
+bit 542 C 1 *
+bit 541 I 1 IO_PAD234
+bit 540 O 1 IO_PAD234 539 1 Z
+bit 539 C 1 *
+bit 538 I 1 IO_PAD233
+bit 537 O 1 IO_PAD233 536 1 Z
+bit 536 C 1 *
+bit 535 I 1 IO_PAD232
+bit 534 O 1 IO_PAD232 533 1 Z
+bit 533 C 1 *
+bit 532 I 1 IO_PAD230
+bit 531 O 1 IO_PAD230 530 1 Z
+bit 530 C 1 *
+bit 529 I 1 IO_PAD229
+bit 528 O 1 IO_PAD229 527 1 Z
+bit 527 C 1 *
+bit 526 I 1 IO_PAD228
+bit 525 O 1 IO_PAD228 524 1 Z
+bit 524 C 1 *
+bit 523 I 1 IO_PAD226
+bit 522 O 1 IO_PAD226 521 1 Z
+bit 521 C 1 *
+bit 520 I 1 IO_PAD224
+bit 519 O 1 IO_PAD224 518 1 Z
+bit 518 C 1 *
+bit 517 I 1 IO_PAD223
+bit 516 O 1 IO_PAD223 515 1 Z
+bit 515 C 1 *
+bit 514 I 1 IO_PAD222
+bit 513 O 1 IO_PAD222 512 1 Z
+bit 512 C 1 *
+bit 511 I 1 IO_PAD218
+bit 510 O 1 IO_PAD218 509 1 Z
+bit 509 C 1 *
+bit 508 I 1 IO_PAD217
+bit 507 O 1 IO_PAD217 506 1 Z
+bit 506 C 1 *
+bit 505 I 1 IO_PAD216
+bit 504 O 1 IO_PAD216 503 1 Z
+bit 503 C 1 *
+bit 502 I 1 IO_PAD214
+bit 501 O 1 IO_PAD214 500 1 Z
+bit 500 C 1 *
+bit 499 I 1 IO_PAD212
+bit 498 O 1 IO_PAD212 497 1 Z
+bit 497 C 1 *
+bit 496 I 1 IO_PAD211
+bit 495 O 1 IO_PAD211 494 1 Z
+bit 494 C 1 *
+bit 493 I 1 IO_PAD210
+bit 492 O 1 IO_PAD210 491 1 Z
+bit 491 C 1 *
+bit 490 I 1 IO_PAD208
+bit 489 O 1 IO_PAD208 488 1 Z
+bit 488 C 1 *
+bit 487 I 1 IO_PAD207
+bit 486 O 1 IO_PAD207 485 1 Z
+bit 485 C 1 *
+bit 484 I 1 IO_PAD206
+bit 483 O 1 IO_PAD206 482 1 Z
+bit 482 C 1 *
+bit 481 I 1 IO_PAD204
+bit 480 O 1 IO_PAD204 479 1 Z
+bit 479 C 1 *
+bit 478 I 1 IO_PAD202
+bit 477 O 1 IO_PAD202 476 1 Z
+bit 476 C 1 *
+bit 475 I 1 IO_PAD200
+bit 474 O 1 IO_PAD200 473 1 Z
+bit 473 C 1 *
+bit 472 I 1 IO_PAD198
+bit 471 O 1 IO_PAD198 470 1 Z
+bit 470 C 1 *
+bit 469 I 1 IO_PAD197
+bit 468 O 1 IO_PAD197 467 1 Z
+bit 467 C 1 *
+bit 466 I 1 IO_PAD196
+bit 465 O 1 IO_PAD196 464 1 Z
+bit 464 C 1 *
+bit 463 I 1 IO_PAD194
+bit 462 O 1 IO_PAD194 461 1 Z
+bit 461 C 1 *
+bit 460 I 1 IO_PAD192
+bit 459 O 1 IO_PAD192 458 1 Z
+bit 458 C 1 *
+bit 457 I 1 IO_PAD191
+bit 456 O 1 IO_PAD191 455 1 Z
+bit 455 C 1 *
+bit 454 I 1 IO_PAD190
+bit 453 O 1 IO_PAD190 452 1 Z
+bit 452 C 1 *
+bit 451 I 1 IO_PAD189
+bit 450 O 1 IO_PAD189 449 1 Z
+bit 449 C 1 *
+bit 448 I 1 IO_PAD188
+bit 447 O 1 IO_PAD188 446 1 Z
+bit 446 C 1 *
+bit 445 I 1 IO_PAD187
+bit 444 O 1 IO_PAD187 443 1 Z
+bit 443 C 1 *
+bit 442 I 1 IO_PAD186
+bit 441 O 1 IO_PAD186 440 1 Z
+bit 440 C 1 *
+bit 439 I 1 IO_PAD185
+bit 438 O 1 IO_PAD185 437 1 Z
+bit 437 C 1 *
+bit 436 I 1 IO_PAD184
+bit 435 O 1 IO_PAD184 434 1 Z
+bit 434 C 1 *
+bit 433 I 1 IO_PAD182
+bit 432 O 1 IO_PAD182 431 1 Z
+bit 431 C 1 *
+bit 430 I 1 IO_PAD180
+bit 429 O 1 IO_PAD180 428 1 Z
+bit 428 C 1 *
+bit 427 I 1 IO_PAD178
+bit 426 O 1 IO_PAD178 425 1 Z
+bit 425 C 1 *
+bit 424 I 1 IO_PAD176
+bit 423 O 1 IO_PAD176 422 1 Z
+bit 422 C 1 *
+bit 421 I 1 IO_PAD173
+bit 420 O 1 IO_PAD173 419 1 Z
+bit 419 C 1 *
+bit 418 I 1 IO_PAD172
+bit 417 O 1 IO_PAD172 416 1 Z
+bit 416 C 1 *
+bit 415 I 1 IO_PAD171
+bit 414 O 1 IO_PAD171 413 1 Z
+bit 413 C 1 *
+bit 412 I 1 IO_PAD168
+bit 411 O 1 IO_PAD168 410 1 Z
+bit 410 C 1 *
+bit 409 I 1 IO_PAD167
+bit 408 O 1 IO_PAD167 407 1 Z
+bit 407 C 1 *
+bit 406 I 1 M2_PAD166
+bit 405 I 1 M0_PAD165
+bit 404 I 1 M1_PAD164
+bit 403 I 1 IO_PAD160
+bit 402 O 1 IO_PAD160 401 1 Z
+bit 401 C 1 *
+bit 400 I 1 IO_PAD159
+bit 399 O 1 IO_PAD159 398 1 Z
+bit 398 C 1 *
+bit 397 I 1 IO_PAD157
+bit 396 O 1 IO_PAD157 395 1 Z
+bit 395 C 1 *
+bit 394 I 1 IO_PAD156
+bit 393 O 1 IO_PAD156 392 1 Z
+bit 392 C 1 *
+bit 391 I 1 IO_PAD155
+bit 390 O 1 IO_PAD155 389 1 Z
+bit 389 C 1 *
+bit 388 I 1 IO_PAD153
+bit 387 O 1 IO_PAD153 386 1 Z
+bit 386 C 1 *
+bit 385 I 1 IO_PAD152
+bit 384 O 1 IO_PAD152 383 1 Z
+bit 383 C 1 *
+bit 382 I 1 IO_PAD151
+bit 381 O 1 IO_PAD151 380 1 Z
+bit 380 C 1 *
+bit 379 I 1 IO_PAD149
+bit 378 O 1 IO_PAD149 377 1 Z
+bit 377 C 1 *
+bit 376 I 1 IO_PAD147
+bit 375 O 1 IO_PAD147 374 1 Z
+bit 374 C 1 *
+bit 373 I 1 IO_PAD146
+bit 372 O 1 IO_PAD146 371 1 Z
+bit 371 C 1 *
+bit 370 I 1 IO_PAD145
+bit 369 O 1 IO_PAD145 368 1 Z
+bit 368 C 1 *
+bit 367 I 1 IO_PAD144
+bit 366 O 1 IO_PAD144 365 1 Z
+bit 365 C 1 *
+bit 364 I 1 IO_PAD143
+bit 363 O 1 IO_PAD143 362 1 Z
+bit 362 C 1 *
+bit 361 I 1 IO_PAD141
+bit 360 O 1 IO_PAD141 359 1 Z
+bit 359 C 1 *
+bit 358 I 1 IO_PAD139
+bit 357 O 1 IO_PAD139 356 1 Z
+bit 356 C 1 *
+bit 355 I 1 IO_PAD137
+bit 354 O 1 IO_PAD137 353 1 Z
+bit 353 C 1 *
+bit 352 I 1 IO_PAD135
+bit 351 O 1 IO_PAD135 350 1 Z
+bit 350 C 1 *
+bit 349 I 1 IO_PAD134
+bit 348 O 1 IO_PAD134 347 1 Z
+bit 347 C 1 *
+bit 346 I 1 IO_PAD133
+bit 345 O 1 IO_PAD133 344 1 Z
+bit 344 C 1 *
+bit 343 I 1 IO_PAD131
+bit 342 O 1 IO_PAD131 341 1 Z
+bit 341 C 1 *
+bit 340 I 1 IO_PAD130
+bit 339 O 1 IO_PAD130 338 1 Z
+bit 338 C 1 *
+bit 337 I 1 IO_PAD129
+bit 336 O 1 IO_PAD129 335 1 Z
+bit 335 C 1 *
+bit 334 I 1 IO_PAD127
+bit 333 O 1 IO_PAD127 332 1 Z
+bit 332 C 1 *
+bit 331 I 1 IO_PAD125
+bit 330 O 1 IO_PAD125 329 1 Z
+bit 329 C 1 *
+bit 328 I 1 IO_PAD123
+bit 327 O 1 IO_PAD123 326 1 Z
+bit 326 C 1 *
+bit 325 I 1 IO_PAD121
+bit 324 O 1 IO_PAD121 323 1 Z
+bit 323 C 1 *
+bit 322 I 1 IO_PAD120
+bit 321 O 1 IO_PAD120 320 1 Z
+bit 320 C 1 *
+bit 319 I 1 IO_PAD119
+bit 318 O 1 IO_PAD119 317 1 Z
+bit 317 C 1 *
+bit 316 I 1 IO_PAD117
+bit 315 O 1 IO_PAD117 314 1 Z
+bit 314 C 1 *
+bit 313 I 1 IO_PAD115
+bit 312 O 1 IO_PAD115 311 1 Z
+bit 311 C 1 *
+bit 310 I 1 IO_PAD114
+bit 309 O 1 IO_PAD114 308 1 Z
+bit 308 C 1 *
+bit 307 I 1 IO_PAD108
+bit 306 O 1 IO_PAD108 305 1 Z
+bit 305 C 1 *
+bit 304 I 1 IO_PAD107
+bit 303 O 1 IO_PAD107 302 1 Z
+bit 302 C 1 *
+bit 301 I 1 IO_PAD105
+bit 300 O 1 IO_PAD105 299 1 Z
+bit 299 C 1 *
+bit 298 I 1 IO_PAD103
+bit 297 O 1 IO_PAD103 296 1 Z
+bit 296 C 1 *
+bit 295 I 1 IO_PAD102
+bit 294 O 1 IO_PAD102 293 1 Z
+bit 293 C 1 *
+bit 292 I 1 IO_PAD101
+bit 291 O 1 IO_PAD101 290 1 Z
+bit 290 C 1 *
+bit 289 I 1 IO_PAD99
+bit 288 O 1 IO_PAD99 287 1 Z
+bit 287 C 1 *
+bit 286 I 1 IO_PAD97
+bit 285 O 1 IO_PAD97 284 1 Z
+bit 284 C 1 *
+bit 283 I 1 IO_PAD95
+bit 282 O 1 IO_PAD95 281 1 Z
+bit 281 C 1 *
+bit 280 I 1 IO_PAD93
+bit 279 O 1 IO_PAD93 278 1 Z
+bit 278 C 1 *
+bit 277 I 1 IO_PAD92
+bit 276 O 1 IO_PAD92 275 1 Z
+bit 275 C 1 *
+bit 274 I 1 IO_PAD91
+bit 273 O 1 IO_PAD91 272 1 Z
+bit 272 C 1 *
+bit 271 I 1 IO_PAD89
+bit 270 O 1 IO_PAD89 269 1 Z
+bit 269 C 1 *
+bit 268 I 1 IO_PAD88
+bit 267 O 1 IO_PAD88 266 1 Z
+bit 266 C 1 *
+bit 265 I 1 IO_PAD87
+bit 264 O 1 IO_PAD87 263 1 Z
+bit 263 C 1 *
+bit 262 I 1 IO_PAD85
+bit 261 O 1 IO_PAD85 260 1 Z
+bit 260 C 1 *
+bit 259 I 1 IO_PAD83
+bit 258 O 1 IO_PAD83 257 1 Z
+bit 257 C 1 *
+bit 256 I 1 IO_PAD81
+bit 255 O 1 IO_PAD81 254 1 Z
+bit 254 C 1 *
+bit 253 I 1 IO_PAD79
+bit 252 O 1 IO_PAD79 251 1 Z
+bit 251 C 1 *
+bit 250 I 1 IO_PAD78
+bit 249 O 1 IO_PAD78 248 1 Z
+bit 248 C 1 *
+bit 247 I 1 IO_PAD77
+bit 246 O 1 IO_PAD77 245 1 Z
+bit 245 C 1 *
+bit 244 I 1 IO_PAD76
+bit 243 O 1 IO_PAD76 242 1 Z
+bit 242 C 1 *
+bit 241 I 1 IO_PAD75
+bit 240 O 1 IO_PAD75 239 1 Z
+bit 239 C 1 *
+bit 238 I 1 IO_PAD73
+bit 237 O 1 IO_PAD73 236 1 Z
+bit 236 C 1 *
+bit 235 I 1 IO_PAD71
+bit 234 O 1 IO_PAD71 233 1 Z
+bit 233 C 1 *
+bit 232 I 1 IO_PAD70
+bit 231 O 1 IO_PAD70 230 1 Z
+bit 230 C 1 *
+bit 229 I 1 IO_PAD69
+bit 228 O 1 IO_PAD69 227 1 Z
+bit 227 C 1 *
+bit 226 I 1 IO_PAD67
+bit 225 O 1 IO_PAD67 224 1 Z
+bit 224 C 1 *
+bit 223 I 1 IO_PAD66
+bit 222 O 1 IO_PAD66 221 1 Z
+bit 221 C 1 *
+bit 220 I 1 IO_PAD65
+bit 219 O 1 IO_PAD65 218 1 Z
+bit 218 C 1 *
+bit 217 I 1 IO_PAD63
+bit 216 O 1 IO_PAD63 215 1 Z
+bit 215 C 1 *
+bit 214 I 1 IO_PAD62
+bit 213 O 1 IO_PAD62 212 1 Z
+bit 212 C 1 *
+bit 211 O 1 *
+bit 210 I 1 HSWAP_EN_PAD56
+bit 209 I 1 IO_PAD55
+bit 208 O 1 IO_PAD55 207 1 Z
+bit 207 C 1 *
+bit 206 I 1 IO_PAD54
+bit 205 O 1 IO_PAD54 204 1 Z
+bit 204 C 1 *
+bit 203 I 1 IO_PAD53
+bit 202 O 1 IO_PAD53 201 1 Z
+bit 201 C 1 *
+bit 200 I 1 IO_PAD49
+bit 199 O 1 IO_PAD49 198 1 Z
+bit 198 C 1 *
+bit 197 I 1 IO_PAD48
+bit 196 O 1 IO_PAD48 195 1 Z
+bit 195 C 1 *
+bit 194 I 1 IO_PAD44
+bit 193 O 1 IO_PAD44 192 1 Z
+bit 192 C 1 *
+bit 191 I 1 IO_PAD42
+bit 190 O 1 IO_PAD42 189 1 Z
+bit 189 C 1 *
+bit 188 I 1 IO_PAD40
+bit 187 O 1 IO_PAD40 186 1 Z
+bit 186 C 1 *
+bit 185 I 1 IO_PAD38
+bit 184 O 1 IO_PAD38 183 1 Z
+bit 183 C 1 *
+bit 182 I 1 IO_PAD36
+bit 181 O 1 IO_PAD36 180 1 Z
+bit 180 C 1 *
+bit 179 I 1 IO_PAD35
+bit 178 O 1 IO_PAD35 177 1 Z
+bit 177 C 1 *
+bit 176 I 1 IO_PAD34
+bit 175 O 1 IO_PAD34 174 1 Z
+bit 174 C 1 *
+bit 173 I 1 IO_PAD33
+bit 172 O 1 IO_PAD33 171 1 Z
+bit 171 C 1 *
+bit 170 I 1 IO_PAD32
+bit 169 O 1 IO_PAD32 168 1 Z
+bit 168 C 1 *
+bit 167 I 1 IO_PAD31
+bit 166 O 1 IO_PAD31 165 1 Z
+bit 165 C 1 *
+bit 164 I 1 IO_PAD30
+bit 163 O 1 IO_PAD30 162 1 Z
+bit 162 C 1 *
+bit 161 I 1 IO_PAD29
+bit 160 O 1 IO_PAD29 159 1 Z
+bit 159 C 1 *
+bit 158 I 1 IO_PAD28
+bit 157 O 1 IO_PAD28 156 1 Z
+bit 156 C 1 *
+bit 155 I 1 IO_PAD26
+bit 154 O 1 IO_PAD26 153 1 Z
+bit 153 C 1 *
+bit 152 I 1 IO_PAD24
+bit 151 O 1 IO_PAD24 150 1 Z
+bit 150 C 1 *
+bit 149 I 1 IO_PAD23
+bit 148 O 1 IO_PAD23 147 1 Z
+bit 147 C 1 *
+bit 146 I 1 IO_PAD22
+bit 145 O 1 IO_PAD22 144 1 Z
+bit 144 C 1 *
+bit 143 I 1 IO_PAD20
+bit 142 O 1 IO_PAD20 141 1 Z
+bit 141 C 1 *
+bit 140 I 1 IO_PAD18
+bit 139 O 1 IO_PAD18 138 1 Z
+bit 138 C 1 *
+bit 137 I 1 IO_PAD16
+bit 136 O 1 IO_PAD16 135 1 Z
+bit 135 C 1 *
+bit 134 I 1 IO_PAD14
+bit 133 O 1 IO_PAD14 132 1 Z
+bit 132 C 1 *
+bit 131 I 1 IO_PAD13
+bit 130 O 1 IO_PAD13 129 1 Z
+bit 129 C 1 *
+bit 128 I 1 IO_PAD12
+bit 127 O 1 IO_PAD12 126 1 Z
+bit 126 C 1 *
+bit 125 I 1 IO_PAD10
+bit 124 O 1 IO_PAD10 123 1 Z
+bit 123 C 1 *
+bit 122 I 1 IO_PAD9
+bit 121 O 1 IO_PAD9 120 1 Z
+bit 120 C 1 *
+bit 119 I 1 IO_PAD8
+bit 118 O 1 IO_PAD8 117 1 Z
+bit 117 C 1 *
+bit 116 I 1 IO_PAD6
+bit 115 O 1 IO_PAD6 114 1 Z
+bit 114 C 1 *
+bit 113 I 1 IO_PAD4
+bit 112 O 1 IO_PAD4 111 1 Z
+bit 111 C 1 *
+bit 110 I 1 IO_PAD3
+bit 109 O 1 IO_PAD3 108 1 Z
+bit 108 C 1 *
+bit 107 I 1 IO_PAD2
+bit 106 O 1 IO_PAD2 105 1 Z
+bit 105 C 1 *
+bit 104 I 1 IO_PAD436
+bit 103 O 1 IO_PAD436 102 1 Z
+bit 102 C 1 *
+bit 101 I 1 IO_PAD435
+bit 100 O 1 IO_PAD435 99 1 Z
+bit 99 C 1 *
+bit 98 I 1 IO_PAD434
+bit 97 O 1 IO_PAD434 96 1 Z
+bit 96 C 1 *
+bit 95 I 1 IO_PAD432
+bit 94 O 1 IO_PAD432 93 1 Z
+bit 93 C 1 *
+bit 92 I 1 IO_PAD430
+bit 91 O 1 IO_PAD430 90 1 Z
+bit 90 C 1 *
+bit 89 I 1 IO_PAD429
+bit 88 O 1 IO_PAD429 87 1 Z
+bit 87 C 1 *
+bit 86 I 1 IO_PAD428
+bit 85 O 1 IO_PAD428 84 1 Z
+bit 84 C 1 *
+bit 83 I 1 IO_PAD426
+bit 82 O 1 IO_PAD426 81 1 Z
+bit 81 C 1 *
+bit 80 I 1 IO_PAD425
+bit 79 O 1 IO_PAD425 78 1 Z
+bit 78 C 1 *
+bit 77 I 1 IO_PAD424
+bit 76 O 1 IO_PAD424 75 1 Z
+bit 75 C 1 *
+bit 74 I 1 IO_PAD422
+bit 73 O 1 IO_PAD422 72 1 Z
+bit 72 C 1 *
+bit 71 I 1 IO_PAD420
+bit 70 O 1 IO_PAD420 69 1 Z
+bit 69 C 1 *
+bit 68 I 1 IO_PAD418
+bit 67 O 1 IO_PAD418 66 1 Z
+bit 66 C 1 *
+bit 65 I 1 IO_PAD416
+bit 64 O 1 IO_PAD416 63 1 Z
+bit 63 C 1 *
+bit 62 I 1 IO_PAD415
+bit 61 O 1 IO_PAD415 60 1 Z
+bit 60 C 1 *
+bit 59 I 1 IO_PAD414
+bit 58 O 1 IO_PAD414 57 1 Z
+bit 57 C 1 *
+bit 56 I 1 IO_PAD412
+bit 55 O 1 IO_PAD412 54 1 Z
+bit 54 C 1 *
+bit 53 I 1 IO_PAD410
+bit 52 O 1 IO_PAD410 51 1 Z
+bit 51 C 1 *
+bit 50 I 1 IO_PAD409
+bit 49 O 1 IO_PAD409 48 1 Z
+bit 48 C 1 *
+bit 47 I 1 IO_PAD408
+bit 46 O 1 IO_PAD408 45 1 Z
+bit 45 C 1 *
+bit 44 I 1 IO_PAD407
+bit 43 O 1 IO_PAD407 42 1 Z
+bit 42 C 1 *
+bit 41 I 1 IO_PAD406
+bit 40 O 1 IO_PAD406 39 1 Z
+bit 39 C 1 *
+bit 38 I 1 IO_PAD405
+bit 37 O 1 IO_PAD405 36 1 Z
+bit 36 C 1 *
+bit 35 I 1 IO_PAD404
+bit 34 O 1 IO_PAD404 33 1 Z
+bit 33 C 1 *
+bit 32 I 1 IO_PAD403
+bit 31 O 1 IO_PAD403 30 1 Z
+bit 30 C 1 *
+bit 29 I 1 IO_PAD402
+bit 28 O 1 IO_PAD402 27 1 Z
+bit 27 C 1 *
+bit 26 I 1 IO_PAD400
+bit 25 O 1 IO_PAD400 24 1 Z
+bit 24 C 1 *
+bit 23 I 1 IO_PAD398
+bit 22 O 1 IO_PAD398 21 1 Z
+bit 21 C 1 *
+bit 20 I 1 IO_PAD396
+bit 19 O 1 IO_PAD396 18 1 Z
+bit 18 C 1 *
+bit 17 I 1 IO_PAD394
+bit 16 O 1 IO_PAD394 15 1 Z
+bit 15 C 1 *
+bit 14 I 1 IO_PAD390
+bit 13 O 1 IO_PAD390 12 1 Z
+bit 12 C 1 *
+bit 11 I 1 IO_PAD389
+bit 10 O 1 IO_PAD389 9 1 Z
+bit 9 C 1 *
+bit 8 I 1 IO_PAD388
+bit 7 O 1 IO_PAD388 6 1 Z
+bit 6 C 1 *
+bit 5 I 1 IO_PAD385
+bit 4 O 1 IO_PAD385 3 1 Z
+bit 3 C 1 *
+bit 2 I 1 IO_PAD384
+bit 1 O 1 IO_PAD384 0 1 Z
+bit 0 C 1 *
--- /dev/null
+signal GND1
+signal GND2
+signal GND3
+signal GND4
+signal GND5
+signal GND6
+signal GND7
+signal GND8
+signal GND9
+signal GND10
+signal GND11
+signal GND12
+signal GND13
+signal GND14
+signal GND15
+signal GND16
+signal GND17
+signal GND18
+signal GND19
+signal GND20
+signal GND21
+signal GND22
+signal GND23
+signal GND24
+signal GND25
+signal GND26
+signal GND27
+signal GND28
+signal GND29
+signal GND30
+signal GND31
+signal GND32
+signal GND33
+signal GND34
+signal GND35
+signal GND36
+signal GND37
+signal GND38
+signal GND39
+signal GND40
+signal CCLK_T15
+signal DONE_R15
+signal HSWAP_EN_E6
+signal M0_P5
+signal M1_U3
+signal M2_R4
+signal PROG_B
+signal TCK
+signal TDI
+signal TDO
+signal TMS
+signal VCCAUX1
+signal VCCAUX2
+signal VCCAUX3
+signal VCCAUX4
+signal VCCAUX5
+signal VCCAUX6
+signal VCCAUX7
+signal VCCAUX8
+signal VCCINT1
+signal VCCINT2
+signal VCCINT3
+signal VCCINT4
+signal VCCINT5
+signal VCCINT6
+signal VCCINT7
+signal VCCINT8
+signal VCCINT9
+signal VCCINT10
+signal VCCINT11
+signal VCCINT12
+signal VCCO01
+signal VCCO02
+signal VCCO03
+signal VCCO04
+signal VCCO11
+signal VCCO12
+signal VCCO13
+signal VCCO14
+signal VCCO21
+signal VCCO22
+signal VCCO23
+signal VCCO31
+signal VCCO32
+signal VCCO33
+signal VCCO41
+signal VCCO42
+signal VCCO43
+signal VCCO44
+signal VCCO51
+signal VCCO52
+signal VCCO53
+signal VCCO54
+signal VCCO61
+signal VCCO62
+signal VCCO63
+signal VCCO71
+signal VCCO72
+signal VCCO73
+signal IO_A2
+signal IO_A3
+signal IO_A4
+signal IO_A5
+signal IO_A7
+signal IO_A8
+signal IO_A9
+signal IO_A10
+signal IO_A11
+signal IO_A12
+signal IO_A14
+signal IO_A15
+signal IO_A16
+signal IO_A17
+signal IO_B1
+signal IO_B3
+signal IO_B4
+signal IO_B5
+signal IO_B6
+signal IO_B9
+signal IO_B10
+signal IO_B13
+signal IO_B14
+signal IO_B15
+signal IO_B18
+signal IO_C1
+signal IO_C2
+signal IO_C3
+signal IO_C4
+signal IO_C5
+signal IO_C7
+signal IO_C8
+signal IO_C11
+signal IO_C12
+signal IO_C14
+signal IO_C15
+signal IO_C16
+signal IO_C17
+signal IO_C18
+signal IO_D1
+signal IO_D2
+signal IO_D3
+signal IO_D5
+signal IO_D6
+signal IO_D7
+signal IO_D8
+signal IO_D9
+signal IO_D10
+signal IO_D11
+signal IO_D12
+signal IO_D13
+signal IO_D14
+signal IO_D16
+signal IO_D17
+signal IO_D18
+signal IO_E1
+signal IO_E2
+signal IO_E3
+signal IO_E4
+signal IO_E7
+signal IO_E8
+signal IO_E9
+signal IO_E10
+signal IO_E11
+signal IO_E12
+signal IO_E13
+signal IO_E15
+signal IO_E16
+signal IO_E17
+signal IO_E18
+signal IO_F2
+signal IO_F4
+signal IO_F5
+signal IO_F8
+signal IO_F9
+signal IO_F10
+signal IO_F11
+signal IO_F14
+signal IO_F15
+signal IO_F17
+signal IO_G1
+signal IO_G3
+signal IO_G4
+signal IO_G5
+signal IO_G14
+signal IO_G15
+signal IO_G16
+signal IO_G18
+signal IO_H1
+signal IO_H2
+signal IO_H3
+signal IO_H4
+signal IO_H5
+signal IO_H6
+signal IO_H13
+signal IO_H14
+signal IO_H15
+signal IO_H16
+signal IO_H17
+signal IO_H18
+signal IO_J1
+signal IO_J2
+signal IO_J4
+signal IO_J5
+signal IO_J6
+signal IO_J13
+signal IO_J14
+signal IO_J15
+signal IO_J17
+signal IO_J18
+signal IO_K1
+signal IO_K2
+signal IO_K4
+signal IO_K5
+signal IO_K6
+signal IO_K13
+signal IO_K14
+signal IO_K15
+signal IO_K17
+signal IO_K18
+signal IO_L1
+signal IO_L2
+signal IO_L3
+signal IO_L4
+signal IO_L5
+signal IO_L6
+signal IO_L13
+signal IO_L14
+signal IO_L15
+signal IO_L16
+signal IO_L17
+signal IO_L18
+signal IO_M1
+signal IO_M3
+signal IO_M4
+signal IO_M5
+signal IO_M14
+signal IO_M15
+signal IO_M16
+signal IO_M18
+signal IO_N2
+signal IO_N4
+signal IO_N5
+signal IO_N8
+signal IO_N9
+signal IO_N10
+signal IO_N11
+signal IO_N14
+signal IO_N15
+signal IO_N17
+signal IO_P1
+signal IO_P2
+signal IO_P3
+signal IO_P4
+signal IO_P6
+signal IO_P7
+signal IO_P8
+signal IO_P9
+signal IO_P10
+signal IO_P11
+signal IO_P12
+signal IO_P13
+signal IO_P14
+signal IO_P15
+signal IO_P16
+signal IO_P17
+signal IO_P18
+signal IO_R1
+signal IO_R2
+signal IO_R3
+signal IO_R5
+signal IO_R6
+signal IO_R7
+signal IO_R8
+signal IO_R9
+signal IO_R10
+signal IO_R11
+signal IO_R12
+signal IO_R13
+signal IO_R14
+signal IO_R16
+signal IO_R17
+signal IO_R18
+signal IO_T1
+signal IO_T2
+signal IO_T3
+signal IO_T4
+signal IO_T5
+signal IO_T7
+signal IO_T8
+signal IO_T11
+signal IO_T12
+signal IO_T14
+signal IO_T16
+signal IO_T17
+signal IO_T18
+signal IO_U1
+signal IO_U4
+signal IO_U5
+signal IO_U6
+signal IO_U9
+signal IO_U10
+signal IO_U13
+signal IO_U14
+signal IO_U15
+signal IO_U16
+signal IO_U18
+signal IO_V2
+signal IO_V3
+signal IO_V4
+signal IO_V5
+signal IO_V7
+signal IO_V8
+signal IO_V9
+signal IO_V10
+signal IO_V11
+signal IO_V12
+signal IO_V14
+signal IO_V15
+signal IO_V16
+
+register BSR 815
+register BR 1
+register DIR 32
+
+instruction length 6
+
+instruction EXTEST 000000 BSR
+instruction SAMPLE/PRELOAD 000001 BSR
+instruction IDCODE 001001 DIR
+instruction BYPASS 111111 BR
+
+bit 814 I 1 IO_C16
+bit 813 O 1 IO_C16 812 1 Z
+bit 812 C 1 *
+bit 811 I 1 IO_C17
+bit 810 O 1 IO_C17 809 1 Z
+bit 809 C 1 *
+bit 808 O 1 *
+bit 807 O 1 *
+bit 806 O 1 *
+bit 805 O 1 *
+bit 804 O 1 *
+bit 803 O 1 *
+bit 802 I 1 IO_B18
+bit 801 O 1 IO_B18 800 1 Z
+bit 800 C 1 *
+bit 799 I 1 IO_C18
+bit 798 O 1 IO_C18 797 1 Z
+bit 797 C 1 *
+bit 796 I 1 IO_D17
+bit 795 O 1 IO_D17 794 1 Z
+bit 794 C 1 *
+bit 793 I 1 IO_D18
+bit 792 O 1 IO_D18 791 1 Z
+bit 791 C 1 *
+bit 790 I 1 IO_D16
+bit 789 O 1 IO_D16 788 1 Z
+bit 788 C 1 *
+bit 787 I 1 IO_E16
+bit 786 O 1 IO_E16 785 1 Z
+bit 785 C 1 *
+bit 784 I 1 IO_E17
+bit 783 O 1 IO_E17 782 1 Z
+bit 782 C 1 *
+bit 781 I 1 IO_E18
+bit 780 O 1 IO_E18 779 1 Z
+bit 779 C 1 *
+bit 778 I 1 IO_F15
+bit 777 O 1 IO_F15 776 1 Z
+bit 776 C 1 *
+bit 775 I 1 IO_E15
+bit 774 O 1 IO_E15 773 1 Z
+bit 773 C 1 *
+bit 772 I 1 IO_F14
+bit 771 O 1 IO_F14 770 1 Z
+bit 770 C 1 *
+bit 769 I 1 IO_G14
+bit 768 O 1 IO_G14 767 1 Z
+bit 767 C 1 *
+bit 766 I 1 IO_G18
+bit 765 O 1 IO_G18 764 1 Z
+bit 764 C 1 *
+bit 763 I 1 IO_F17
+bit 762 O 1 IO_F17 761 1 Z
+bit 761 C 1 *
+bit 760 I 1 IO_G15
+bit 759 O 1 IO_G15 758 1 Z
+bit 758 C 1 *
+bit 757 I 1 IO_G16
+bit 756 O 1 IO_G16 755 1 Z
+bit 755 C 1 *
+bit 754 I 1 IO_H13
+bit 753 O 1 IO_H13 752 1 Z
+bit 752 C 1 *
+bit 751 I 1 IO_H14
+bit 750 O 1 IO_H14 749 1 Z
+bit 749 C 1 *
+bit 748 I 1 IO_H16
+bit 747 O 1 IO_H16 746 1 Z
+bit 746 C 1 *
+bit 745 I 1 IO_H15
+bit 744 O 1 IO_H15 743 1 Z
+bit 743 C 1 *
+bit 742 I 1 IO_H17
+bit 741 O 1 IO_H17 740 1 Z
+bit 740 C 1 *
+bit 739 I 1 IO_H18
+bit 738 O 1 IO_H18 737 1 Z
+bit 737 C 1 *
+bit 736 O 1 *
+bit 735 O 1 *
+bit 734 O 1 *
+bit 733 I 1 IO_J13
+bit 732 O 1 IO_J13 731 1 Z
+bit 731 C 1 *
+bit 730 I 1 IO_J18
+bit 729 O 1 IO_J18 728 1 Z
+bit 728 C 1 *
+bit 727 I 1 IO_J17
+bit 726 O 1 IO_J17 725 1 Z
+bit 725 C 1 *
+bit 724 I 1 IO_J15
+bit 723 O 1 IO_J15 722 1 Z
+bit 722 C 1 *
+bit 721 I 1 IO_J14
+bit 720 O 1 IO_J14 719 1 Z
+bit 719 C 1 *
+bit 718 I 1 IO_K17
+bit 717 O 1 IO_K17 716 1 Z
+bit 716 C 1 *
+bit 715 I 1 IO_K18
+bit 714 O 1 IO_K18 713 1 Z
+bit 713 C 1 *
+bit 712 I 1 IO_K13
+bit 711 O 1 IO_K13 710 1 Z
+bit 710 C 1 *
+bit 709 I 1 IO_K14
+bit 708 O 1 IO_K14 707 1 Z
+bit 707 C 1 *
+bit 706 I 1 IO_K15
+bit 705 O 1 IO_K15 704 1 Z
+bit 704 C 1 *
+bit 703 O 1 *
+bit 702 O 1 *
+bit 701 O 1 *
+bit 700 I 1 IO_L18
+bit 699 O 1 IO_L18 698 1 Z
+bit 698 C 1 *
+bit 697 I 1 IO_L17
+bit 696 O 1 IO_L17 695 1 Z
+bit 695 C 1 *
+bit 694 I 1 IO_L15
+bit 693 O 1 IO_L15 692 1 Z
+bit 692 C 1 *
+bit 691 I 1 IO_L16
+bit 690 O 1 IO_L16 689 1 Z
+bit 689 C 1 *
+bit 688 I 1 IO_L14
+bit 687 O 1 IO_L14 686 1 Z
+bit 686 C 1 *
+bit 685 I 1 IO_L13
+bit 684 O 1 IO_L13 683 1 Z
+bit 683 C 1 *
+bit 682 I 1 IO_M18
+bit 681 O 1 IO_M18 680 1 Z
+bit 680 C 1 *
+bit 679 I 1 IO_N17
+bit 678 O 1 IO_N17 677 1 Z
+bit 677 C 1 *
+bit 676 I 1 IO_M15
+bit 675 O 1 IO_M15 674 1 Z
+bit 674 C 1 *
+bit 673 I 1 IO_M16
+bit 672 O 1 IO_M16 671 1 Z
+bit 671 C 1 *
+bit 670 I 1 IO_M14
+bit 669 O 1 IO_M14 668 1 Z
+bit 668 C 1 *
+bit 667 I 1 IO_N14
+bit 666 O 1 IO_N14 665 1 Z
+bit 665 C 1 *
+bit 664 I 1 IO_P15
+bit 663 O 1 IO_P15 662 1 Z
+bit 662 C 1 *
+bit 661 I 1 IO_N15
+bit 660 O 1 IO_N15 659 1 Z
+bit 659 C 1 *
+bit 658 I 1 IO_P18
+bit 657 O 1 IO_P18 656 1 Z
+bit 656 C 1 *
+bit 655 I 1 IO_P17
+bit 654 O 1 IO_P17 653 1 Z
+bit 653 C 1 *
+bit 652 I 1 IO_R17
+bit 651 O 1 IO_R17 650 1 Z
+bit 650 C 1 *
+bit 649 I 1 IO_R18
+bit 648 O 1 IO_R18 647 1 Z
+bit 647 C 1 *
+bit 646 I 1 IO_P16
+bit 645 O 1 IO_P16 644 1 Z
+bit 644 C 1 *
+bit 643 I 1 IO_R16
+bit 642 O 1 IO_R16 641 1 Z
+bit 641 C 1 *
+bit 640 I 1 IO_T18
+bit 639 O 1 IO_T18 638 1 Z
+bit 638 C 1 *
+bit 637 I 1 IO_U18
+bit 636 O 1 IO_U18 635 1 Z
+bit 635 C 1 *
+bit 634 O 1 *
+bit 633 O 1 *
+bit 632 O 1 *
+bit 631 O 1 *
+bit 630 O 1 *
+bit 629 O 1 *
+bit 628 I 1 IO_T17
+bit 627 O 1 IO_T17 626 1 Z
+bit 626 C 1 *
+bit 625 I 1 IO_T16
+bit 624 O 1 IO_T16 623 1 Z
+bit 623 C 1 *
+bit 622 I 1 CCLK_T15
+bit 621 O 1 CCLK_T15 620 1 Z
+bit 620 C 1 *
+bit 619 I 1 DONE_R15
+bit 618 O 1 DONE_R15 617 1 Z
+bit 617 C 1 *
+bit 616 I 1 IO_V17
+bit 615 O 1 IO_V17 614 1 Z
+bit 614 C 1 *
+bit 613 I 1 IO_U16
+bit 612 O 1 IO_U16 611 1 Z
+bit 611 C 1 *
+bit 610 I 1 IO_V16
+bit 609 O 1 IO_V16 608 1 Z
+bit 608 C 1 *
+bit 607 I 1 IO_P14
+bit 606 O 1 IO_P14 605 1 Z
+bit 605 C 1 *
+bit 604 I 1 IO_R14
+bit 603 O 1 IO_R14 602 1 Z
+bit 602 C 1 *
+bit 601 O 1 *
+bit 600 O 1 *
+bit 599 O 1 *
+bit 598 I 1 IO_U15
+bit 597 O 1 IO_U15 596 1 Z
+bit 596 C 1 *
+bit 595 I 1 IO_V15
+bit 594 O 1 IO_V15 593 1 Z
+bit 593 C 1 *
+bit 592 I 1 IO_T14
+bit 591 O 1 IO_T14 590 1 Z
+bit 590 C 1 *
+bit 589 I 1 IO_U14
+bit 588 O 1 IO_U14 587 1 Z
+bit 587 C 1 *
+bit 586 O 1 *
+bit 585 O 1 *
+bit 584 O 1 *
+bit 583 O 1 *
+bit 582 O 1 *
+bit 581 O 1 *
+bit 580 O 1 *
+bit 579 O 1 *
+bit 578 O 1 *
+bit 577 I 1 IO_V14
+bit 576 O 1 IO_V14 575 1 Z
+bit 575 C 1 *
+bit 574 O 1 *
+bit 573 O 1 *
+bit 572 O 1 *
+bit 571 I 1 IO_U13
+bit 570 O 1 IO_U13 569 1 Z
+bit 569 C 1 *
+bit 568 O 1 *
+bit 567 O 1 *
+bit 566 O 1 *
+bit 565 O 1 *
+bit 564 O 1 *
+bit 563 O 1 *
+bit 562 I 1 IO_R13
+bit 561 O 1 IO_R13 560 1 Z
+bit 560 C 1 *
+bit 559 I 1 IO_P13
+bit 558 O 1 IO_P13 557 1 Z
+bit 557 C 1 *
+bit 556 I 1 IO_P12
+bit 555 O 1 IO_P12 554 1 Z
+bit 554 C 1 *
+bit 553 I 1 IO_T12
+bit 552 O 1 IO_T12 551 1 Z
+bit 551 C 1 *
+bit 550 I 1 IO_R12
+bit 549 O 1 IO_R12 548 1 Z
+bit 548 C 1 *
+bit 547 I 1 IO_V12
+bit 546 O 1 IO_V12 545 1 Z
+bit 545 C 1 *
+bit 544 I 1 IO_V11
+bit 543 O 1 IO_V11 542 1 Z
+bit 542 C 1 *
+bit 541 O 1 *
+bit 540 O 1 *
+bit 539 O 1 *
+bit 538 I 1 IO_R11
+bit 537 O 1 IO_R11 536 1 Z
+bit 536 C 1 *
+bit 535 I 1 IO_T11
+bit 534 O 1 IO_T11 533 1 Z
+bit 533 C 1 *
+bit 532 I 1 IO_N11
+bit 531 O 1 IO_N11 530 1 Z
+bit 530 C 1 *
+bit 529 I 1 IO_P11
+bit 528 O 1 IO_P11 527 1 Z
+bit 527 C 1 *
+bit 526 I 1 IO_R10
+bit 525 O 1 IO_R10 524 1 Z
+bit 524 C 1 *
+bit 523 I 1 IO_U10
+bit 522 O 1 IO_U10 521 1 Z
+bit 521 C 1 *
+bit 520 I 1 IO_V10
+bit 519 O 1 IO_V10 518 1 Z
+bit 518 C 1 *
+bit 517 I 1 IO_N10
+bit 516 O 1 IO_N10 515 1 Z
+bit 515 C 1 *
+bit 514 I 1 IO_P10
+bit 513 O 1 IO_P10 512 1 Z
+bit 512 C 1 *
+bit 511 I 1 IO_R9
+bit 510 O 1 IO_R9 509 1 Z
+bit 509 C 1 *
+bit 508 I 1 IO_N9
+bit 507 O 1 IO_N9 506 1 Z
+bit 506 C 1 *
+bit 505 I 1 IO_P9
+bit 504 O 1 IO_P9 503 1 Z
+bit 503 C 1 *
+bit 502 I 1 IO_U9
+bit 501 O 1 IO_U9 500 1 Z
+bit 500 C 1 *
+bit 499 I 1 IO_V9
+bit 498 O 1 IO_V9 497 1 Z
+bit 497 C 1 *
+bit 496 I 1 IO_N8
+bit 495 O 1 IO_N8 494 1 Z
+bit 494 C 1 *
+bit 493 I 1 IO_R8
+bit 492 O 1 IO_R8 491 1 Z
+bit 491 C 1 *
+bit 490 I 1 IO_T8
+bit 489 O 1 IO_T8 488 1 Z
+bit 488 C 1 *
+bit 487 I 1 IO_V8
+bit 486 O 1 IO_V8 485 1 Z
+bit 485 C 1 *
+bit 484 I 1 IO_V7
+bit 483 O 1 IO_V7 482 1 Z
+bit 482 C 1 *
+bit 481 I 1 IO_P8
+bit 480 O 1 IO_P8 479 1 Z
+bit 479 C 1 *
+bit 478 I 1 IO_R7
+bit 477 O 1 IO_R7 476 1 Z
+bit 476 C 1 *
+bit 475 I 1 IO_T7
+bit 474 O 1 IO_T7 473 1 Z
+bit 473 C 1 *
+bit 472 I 1 IO_P6
+bit 471 O 1 IO_P6 470 1 Z
+bit 470 C 1 *
+bit 469 I 1 IO_P7
+bit 468 O 1 IO_P7 467 1 Z
+bit 467 C 1 *
+bit 466 I 1 IO_U6
+bit 465 O 1 IO_U6 464 1 Z
+bit 464 C 1 *
+bit 463 O 1 *
+bit 462 O 1 *
+bit 461 O 1 *
+bit 460 O 1 *
+bit 459 O 1 *
+bit 458 O 1 *
+bit 457 O 1 *
+bit 456 O 1 *
+bit 455 O 1 *
+bit 454 O 1 *
+bit 453 O 1 *
+bit 452 O 1 *
+bit 451 O 1 *
+bit 450 O 1 *
+bit 449 O 1 *
+bit 448 I 1 IO_V5
+bit 447 O 1 IO_V5 446 1 Z
+bit 446 C 1 *
+bit 445 I 1 IO_U5
+bit 444 O 1 IO_U5 443 1 Z
+bit 443 C 1 *
+bit 442 I 1 IO_R6
+bit 441 O 1 IO_R6 440 1 Z
+bit 440 C 1 *
+bit 439 I 1 IO_R5
+bit 438 O 1 IO_R5 437 1 Z
+bit 437 C 1 *
+bit 436 O 1 *
+bit 435 O 1 *
+bit 434 O 1 *
+bit 433 I 1 IO_V4
+bit 432 O 1 IO_V4 431 1 Z
+bit 431 C 1 *
+bit 430 I 1 IO_U4
+bit 429 O 1 IO_U4 428 1 Z
+bit 428 C 1 *
+bit 427 O 1 *
+bit 426 O 1 *
+bit 425 O 1 *
+bit 424 O 1 *
+bit 423 O 1 *
+bit 422 O 1 *
+bit 421 O 1 *
+bit 420 O 1 *
+bit 419 O 1 *
+bit 418 I 1 IO_T5
+bit 417 O 1 IO_T5 416 1 Z
+bit 416 C 1 *
+bit 415 I 1 IO_T4
+bit 414 O 1 IO_T4 413 1 Z
+bit 413 C 1 *
+bit 412 I 1 IO_V3
+bit 411 O 1 IO_V3 410 1 Z
+bit 410 C 1 *
+bit 409 I 1 IO_V2
+bit 408 O 1 IO_V2 407 1 Z
+bit 407 C 1 *
+bit 406 I 1 M2_R4
+bit 405 I 1 M0_P5
+bit 404 I 1 M1_U3
+bit 403 I 1 IO_T3
+bit 402 O 1 IO_T3 401 1 Z
+bit 401 C 1 *
+bit 400 I 1 IO_T2
+bit 399 O 1 IO_T2 398 1 Z
+bit 398 C 1 *
+bit 397 O 1 *
+bit 396 O 1 *
+bit 395 O 1 *
+bit 394 O 1 *
+bit 393 O 1 *
+bit 392 O 1 *
+bit 391 I 1 IO_U1
+bit 390 O 1 IO_U1 389 1 Z
+bit 389 C 1 *
+bit 388 I 1 IO_T1
+bit 387 O 1 IO_T1 386 1 Z
+bit 386 C 1 *
+bit 385 I 1 IO_R2
+bit 384 O 1 IO_R2 383 1 Z
+bit 383 C 1 *
+bit 382 I 1 IO_R1
+bit 381 O 1 IO_R1 380 1 Z
+bit 380 C 1 *
+bit 379 I 1 IO_R3
+bit 378 O 1 IO_R3 377 1 Z
+bit 377 C 1 *
+bit 376 I 1 IO_P3
+bit 375 O 1 IO_P3 374 1 Z
+bit 374 C 1 *
+bit 373 I 1 IO_P2
+bit 372 O 1 IO_P2 371 1 Z
+bit 371 C 1 *
+bit 370 I 1 IO_P1
+bit 369 O 1 IO_P1 368 1 Z
+bit 368 C 1 *
+bit 367 I 1 IO_N4
+bit 366 O 1 IO_N4 365 1 Z
+bit 365 C 1 *
+bit 364 I 1 IO_P4
+bit 363 O 1 IO_P4 362 1 Z
+bit 362 C 1 *
+bit 361 I 1 IO_N5
+bit 360 O 1 IO_N5 359 1 Z
+bit 359 C 1 *
+bit 358 I 1 IO_M5
+bit 357 O 1 IO_M5 356 1 Z
+bit 356 C 1 *
+bit 355 I 1 IO_M3
+bit 354 O 1 IO_M3 353 1 Z
+bit 353 C 1 *
+bit 352 I 1 IO_M4
+bit 351 O 1 IO_M4 350 1 Z
+bit 350 C 1 *
+bit 349 I 1 IO_N2
+bit 348 O 1 IO_N2 347 1 Z
+bit 347 C 1 *
+bit 346 I 1 IO_M1
+bit 345 O 1 IO_M1 344 1 Z
+bit 344 C 1 *
+bit 343 I 1 IO_L6
+bit 342 O 1 IO_L6 341 1 Z
+bit 341 C 1 *
+bit 340 I 1 IO_L5
+bit 339 O 1 IO_L5 338 1 Z
+bit 338 C 1 *
+bit 337 I 1 IO_L3
+bit 336 O 1 IO_L3 335 1 Z
+bit 335 C 1 *
+bit 334 I 1 IO_L4
+bit 333 O 1 IO_L4 332 1 Z
+bit 332 C 1 *
+bit 331 I 1 IO_L2
+bit 330 O 1 IO_L2 329 1 Z
+bit 329 C 1 *
+bit 328 I 1 IO_L1
+bit 327 O 1 IO_L1 326 1 Z
+bit 326 C 1 *
+bit 325 O 1 *
+bit 324 O 1 *
+bit 323 O 1 *
+bit 322 I 1 IO_K6
+bit 321 O 1 IO_K6 320 1 Z
+bit 320 C 1 *
+bit 319 I 1 IO_K5
+bit 318 O 1 IO_K5 317 1 Z
+bit 317 C 1 *
+bit 316 I 1 IO_K4
+bit 315 O 1 IO_K4 314 1 Z
+bit 314 C 1 *
+bit 313 I 1 IO_K1
+bit 312 O 1 IO_K1 311 1 Z
+bit 311 C 1 *
+bit 310 I 1 IO_K2
+bit 309 O 1 IO_K2 308 1 Z
+bit 308 C 1 *
+bit 307 I 1 IO_J5
+bit 306 O 1 IO_J5 305 1 Z
+bit 305 C 1 *
+bit 304 I 1 IO_J4
+bit 303 O 1 IO_J4 302 1 Z
+bit 302 C 1 *
+bit 301 I 1 IO_J1
+bit 300 O 1 IO_J1 299 1 Z
+bit 299 C 1 *
+bit 298 I 1 IO_J2
+bit 297 O 1 IO_J2 296 1 Z
+bit 296 C 1 *
+bit 295 I 1 IO_J6
+bit 294 O 1 IO_J6 293 1 Z
+bit 293 C 1 *
+bit 292 O 1 *
+bit 291 O 1 *
+bit 290 O 1 *
+bit 289 I 1 IO_H1
+bit 288 O 1 IO_H1 287 1 Z
+bit 287 C 1 *
+bit 286 I 1 IO_H2
+bit 285 O 1 IO_H2 284 1 Z
+bit 284 C 1 *
+bit 283 I 1 IO_H4
+bit 282 O 1 IO_H4 281 1 Z
+bit 281 C 1 *
+bit 280 I 1 IO_H3
+bit 279 O 1 IO_H3 278 1 Z
+bit 278 C 1 *
+bit 277 I 1 IO_H5
+bit 276 O 1 IO_H5 275 1 Z
+bit 275 C 1 *
+bit 274 I 1 IO_H6
+bit 273 O 1 IO_H6 272 1 Z
+bit 272 C 1 *
+bit 271 I 1 IO_G4
+bit 270 O 1 IO_G4 269 1 Z
+bit 269 C 1 *
+bit 268 I 1 IO_G3
+bit 267 O 1 IO_G3 266 1 Z
+bit 266 C 1 *
+bit 265 I 1 IO_G1
+bit 264 O 1 IO_G1 263 1 Z
+bit 263 C 1 *
+bit 262 I 1 IO_F2
+bit 261 O 1 IO_F2 260 1 Z
+bit 260 C 1 *
+bit 259 I 1 IO_G5
+bit 258 O 1 IO_G5 257 1 Z
+bit 257 C 1 *
+bit 256 I 1 IO_F5
+bit 255 O 1 IO_F5 254 1 Z
+bit 254 C 1 *
+bit 253 I 1 IO_E4
+bit 252 O 1 IO_E4 251 1 Z
+bit 251 C 1 *
+bit 250 I 1 IO_F4
+bit 249 O 1 IO_F4 248 1 Z
+bit 248 C 1 *
+bit 247 I 1 IO_E2
+bit 246 O 1 IO_E2 245 1 Z
+bit 245 C 1 *
+bit 244 I 1 IO_E1
+bit 243 O 1 IO_E1 242 1 Z
+bit 242 C 1 *
+bit 241 I 1 IO_E3
+bit 240 O 1 IO_E3 239 1 Z
+bit 239 C 1 *
+bit 238 I 1 IO_D3
+bit 237 O 1 IO_D3 236 1 Z
+bit 236 C 1 *
+bit 235 I 1 IO_D1
+bit 234 O 1 IO_D1 233 1 Z
+bit 233 C 1 *
+bit 232 I 1 IO_D2
+bit 231 O 1 IO_D2 230 1 Z
+bit 230 C 1 *
+bit 229 I 1 IO_C1
+bit 228 O 1 IO_C1 227 1 Z
+bit 227 C 1 *
+bit 226 I 1 IO_B1
+bit 225 O 1 IO_B1 224 1 Z
+bit 224 C 1 *
+bit 223 O 1 *
+bit 222 O 1 *
+bit 221 O 1 *
+bit 220 O 1 *
+bit 219 O 1 *
+bit 218 O 1 *
+bit 217 I 1 IO_C3
+bit 216 O 1 IO_C3 215 1 Z
+bit 215 C 1 *
+bit 214 I 1 IO_C2
+bit 213 O 1 IO_C2 212 1 Z
+bit 212 C 1 *
+bit 211 O 1 *
+bit 210 I 1 HSWAP_EN_E6
+bit 209 I 1 IO_B3
+bit 208 O 1 IO_B3 207 1 Z
+bit 207 C 1 *
+bit 206 I 1 IO_A2
+bit 205 O 1 IO_A2 204 1 Z
+bit 204 C 1 *
+bit 203 I 1 IO_A3
+bit 202 O 1 IO_A3 201 1 Z
+bit 201 C 1 *
+bit 200 O 1 *
+bit 199 O 1 *
+bit 198 O 1 *
+bit 197 O 1 *
+bit 196 O 1 *
+bit 195 O 1 *
+bit 194 O 1 *
+bit 193 O 1 *
+bit 192 O 1 *
+bit 191 I 1 IO_B4
+bit 190 O 1 IO_B4 189 1 Z
+bit 189 C 1 *
+bit 188 I 1 IO_C4
+bit 187 O 1 IO_C4 186 1 Z
+bit 186 C 1 *
+bit 185 I 1 IO_C5
+bit 184 O 1 IO_C5 183 1 Z
+bit 183 C 1 *
+bit 182 I 1 IO_D5
+bit 181 O 1 IO_D5 180 1 Z
+bit 180 C 1 *
+bit 179 O 1 *
+bit 178 O 1 *
+bit 177 O 1 *
+bit 176 I 1 IO_A4
+bit 175 O 1 IO_A4 174 1 Z
+bit 174 C 1 *
+bit 173 I 1 IO_A5
+bit 172 O 1 IO_A5 171 1 Z
+bit 171 C 1 *
+bit 170 O 1 *
+bit 169 O 1 *
+bit 168 O 1 *
+bit 167 O 1 *
+bit 166 O 1 *
+bit 165 O 1 *
+bit 164 I 1 IO_D6
+bit 163 O 1 IO_D6 162 1 Z
+bit 162 C 1 *
+bit 161 O 1 *
+bit 160 O 1 *
+bit 159 O 1 *
+bit 158 O 1 *
+bit 157 O 1 *
+bit 156 O 1 *
+bit 155 I 1 IO_B5
+bit 154 O 1 IO_B5 153 1 Z
+bit 153 C 1 *
+bit 152 I 1 IO_B6
+bit 151 O 1 IO_B6 150 1 Z
+bit 150 C 1 *
+bit 149 I 1 IO_E7
+bit 148 O 1 IO_E7 147 1 Z
+bit 147 C 1 *
+bit 146 I 1 IO_C7
+bit 145 O 1 IO_C7 144 1 Z
+bit 144 C 1 *
+bit 143 I 1 IO_D7
+bit 142 O 1 IO_D7 141 1 Z
+bit 141 C 1 *
+bit 140 I 1 IO_C8
+bit 139 O 1 IO_C8 138 1 Z
+bit 138 C 1 *
+bit 137 I 1 IO_D8
+bit 136 O 1 IO_D8 135 1 Z
+bit 135 C 1 *
+bit 134 O 1 *
+bit 133 O 1 *
+bit 132 O 1 *
+bit 131 I 1 IO_E8
+bit 130 O 1 IO_E8 129 1 Z
+bit 129 C 1 *
+bit 128 I 1 IO_F8
+bit 127 O 1 IO_F8 126 1 Z
+bit 126 C 1 *
+bit 125 I 1 IO_A7
+bit 124 O 1 IO_A7 123 1 Z
+bit 123 C 1 *
+bit 122 I 1 IO_A8
+bit 121 O 1 IO_A8 120 1 Z
+bit 120 C 1 *
+bit 119 I 1 IO_D9
+bit 118 O 1 IO_D9 117 1 Z
+bit 117 C 1 *
+bit 116 I 1 IO_B9
+bit 115 O 1 IO_B9 114 1 Z
+bit 114 C 1 *
+bit 113 I 1 IO_A9
+bit 112 O 1 IO_A9 111 1 Z
+bit 111 C 1 *
+bit 110 I 1 IO_E9
+bit 109 O 1 IO_E9 108 1 Z
+bit 108 C 1 *
+bit 107 I 1 IO_F9
+bit 106 O 1 IO_F9 105 1 Z
+bit 105 C 1 *
+bit 104 I 1 IO_D10
+bit 103 O 1 IO_D10 102 1 Z
+bit 102 C 1 *
+bit 101 I 1 IO_E10
+bit 100 O 1 IO_E10 99 1 Z
+bit 99 C 1 *
+bit 98 I 1 IO_F10
+bit 97 O 1 IO_F10 96 1 Z
+bit 96 C 1 *
+bit 95 I 1 IO_A10
+bit 94 O 1 IO_A10 93 1 Z
+bit 93 C 1 *
+bit 92 I 1 IO_B10
+bit 91 O 1 IO_B10 90 1 Z
+bit 90 C 1 *
+bit 89 I 1 IO_A11
+bit 88 O 1 IO_A11 87 1 Z
+bit 87 C 1 *
+bit 86 I 1 IO_C11
+bit 85 O 1 IO_C11 84 1 Z
+bit 84 C 1 *
+bit 83 I 1 IO_D11
+bit 82 O 1 IO_D11 81 1 Z
+bit 81 C 1 *
+bit 80 I 1 IO_F11
+bit 79 O 1 IO_F11 78 1 Z
+bit 78 C 1 *
+bit 77 I 1 IO_E11
+bit 76 O 1 IO_E11 75 1 Z
+bit 75 C 1 *
+bit 74 I 1 IO_A12
+bit 73 O 1 IO_A12 72 1 Z
+bit 72 C 1 *
+bit 71 I 1 IO_C12
+bit 70 O 1 IO_C12 69 1 Z
+bit 69 C 1 *
+bit 68 I 1 IO_D12
+bit 67 O 1 IO_D12 66 1 Z
+bit 66 C 1 *
+bit 65 I 1 IO_E13
+bit 64 O 1 IO_E13 63 1 Z
+bit 63 C 1 *
+bit 62 I 1 IO_E12
+bit 61 O 1 IO_E12 60 1 Z
+bit 60 C 1 *
+bit 59 I 1 IO_B13
+bit 58 O 1 IO_B13 57 1 Z
+bit 57 C 1 *
+bit 56 O 1 *
+bit 55 O 1 *
+bit 54 O 1 *
+bit 53 O 1 *
+bit 52 O 1 *
+bit 51 O 1 *
+bit 50 I 1 IO_D14
+bit 49 O 1 IO_D14 48 1 Z
+bit 48 C 1 *
+bit 47 I 1 IO_D13
+bit 46 O 1 IO_D13 45 1 Z
+bit 45 C 1 *
+bit 44 O 1 *
+bit 43 O 1 *
+bit 42 O 1 *
+bit 41 I 1 IO_A14
+bit 40 O 1 IO_A14 39 1 Z
+bit 39 C 1 *
+bit 38 I 1 IO_B14
+bit 37 O 1 IO_B14 36 1 Z
+bit 36 C 1 *
+bit 35 I 1 IO_C14
+bit 34 O 1 IO_C14 33 1 Z
+bit 33 C 1 *
+bit 32 I 1 IO_C15
+bit 31 O 1 IO_C15 30 1 Z
+bit 30 C 1 *
+bit 29 O 1 *
+bit 28 O 1 *
+bit 27 O 1 *
+bit 26 I 1 IO_A15
+bit 25 O 1 IO_A15 24 1 Z
+bit 24 C 1 *
+bit 23 I 1 IO_B15
+bit 22 O 1 IO_B15 21 1 Z
+bit 21 C 1 *
+bit 20 O 1 *
+bit 19 O 1 *
+bit 18 O 1 *
+bit 17 O 1 *
+bit 16 O 1 *
+bit 15 O 1 *
+bit 14 O 1 *
+bit 13 O 1 *
+bit 12 O 1 *
+bit 11 O 1 *
+bit 10 O 1 *
+bit 9 O 1 *
+bit 8 O 1 *
+bit 7 O 1 *
+bit 6 O 1 *
+bit 5 I 1 IO_A16
+bit 4 O 1 IO_A16 3 1 Z
+bit 3 C 1 *
+bit 2 I 1 IO_A17
+bit 1 O 1 IO_A17 0 1 Z
+bit 0 C 1 *
--- /dev/null
+signal GND1
+signal GND2
+signal GND3
+signal GND4
+signal GND5
+signal GND6
+signal GND7
+signal GND8
+signal GND9
+signal GND10
+signal GND11
+signal GND12
+signal GND13
+signal GND14
+signal GND15
+signal GND16
+signal GND17
+signal GND18
+signal GND19
+signal GND20
+signal GND21
+signal GND22
+signal GND23
+signal GND24
+signal GND25
+signal GND26
+signal GND27
+signal GND28
+signal GND29
+signal GND30
+signal GND31
+signal GND32
+signal GND33
+signal GND34
+signal GND35
+signal GND36
+signal GND37
+signal GND38
+signal GND39
+signal GND40
+signal GND41
+signal GND42
+signal GND43
+signal GND44
+signal GND45
+signal GND46
+signal GND47
+signal GND48
+signal GND49
+signal GND50
+signal GND51
+signal GND52
+signal CCLK_AA22
+signal DONE_AB21
+signal HSWAP_EN_B3
+signal M0_AB2
+signal M1_AA1
+signal M2_AB3
+signal PROG_B
+signal TCK
+signal TDI
+signal TDO
+signal TMS
+signal VCCAUX1
+signal VCCAUX2
+signal VCCAUX3
+signal VCCAUX4
+signal VCCAUX5
+signal VCCAUX6
+signal VCCAUX7
+signal VCCAUX8
+signal VCCINT1
+signal VCCINT2
+signal VCCINT3
+signal VCCINT4
+signal VCCINT5
+signal VCCINT6
+signal VCCINT7
+signal VCCINT8
+signal VCCINT9
+signal VCCINT10
+signal VCCINT11
+signal VCCINT12
+signal VCCO01
+signal VCCO02
+signal VCCO03
+signal VCCO04
+signal VCCO05
+signal VCCO11
+signal VCCO12
+signal VCCO13
+signal VCCO14
+signal VCCO15
+signal VCCO21
+signal VCCO22
+signal VCCO23
+signal VCCO24
+signal VCCO25
+signal VCCO31
+signal VCCO32
+signal VCCO33
+signal VCCO34
+signal VCCO35
+signal VCCO41
+signal VCCO42
+signal VCCO43
+signal VCCO44
+signal VCCO45
+signal VCCO51
+signal VCCO52
+signal VCCO53
+signal VCCO54
+signal VCCO55
+signal VCCO61
+signal VCCO62
+signal VCCO63
+signal VCCO64
+signal VCCO65
+signal VCCO71
+signal VCCO72
+signal VCCO73
+signal VCCO74
+signal VCCO75
+signal IO_A3
+signal IO_A4
+signal IO_A5
+signal IO_A8
+signal IO_A9
+signal IO_A10
+signal IO_A11
+signal IO_A12
+signal IO_A13
+signal IO_A14
+signal IO_A15
+signal IO_A18
+signal IO_A19
+signal IO_B4
+signal IO_B5
+signal IO_B6
+signal IO_B8
+signal IO_B9
+signal IO_B10
+signal IO_B11
+signal IO_B12
+signal IO_B13
+signal IO_B14
+signal IO_B15
+signal IO_B17
+signal IO_B18
+signal IO_B19
+signal IO_B20
+signal IO_C1
+signal IO_C2
+signal IO_C3
+signal IO_C4
+signal IO_C5
+signal IO_C6
+signal IO_C7
+signal IO_C10
+signal IO_C11
+signal IO_C12
+signal IO_C13
+signal IO_C17
+signal IO_C18
+signal IO_C19
+signal IO_C20
+signal IO_C21
+signal IO_C22
+signal IO_D1
+signal IO_D2
+signal IO_D3
+signal IO_D4
+signal IO_D5
+signal IO_D6
+signal IO_D7
+signal IO_D9
+signal IO_D10
+signal IO_D11
+signal IO_D12
+signal IO_D13
+signal IO_D14
+signal IO_D15
+signal IO_D17
+signal IO_D18
+signal IO_D19
+signal IO_D20
+signal IO_D21
+signal IO_D22
+signal IO_E1
+signal IO_E2
+signal IO_E3
+signal IO_E4
+signal IO_E6
+signal IO_E7
+signal IO_E9
+signal IO_E10
+signal IO_E11
+signal IO_E12
+signal IO_E13
+signal IO_E14
+signal IO_E15
+signal IO_E16
+signal IO_E17
+signal IO_E18
+signal IO_E19
+signal IO_E20
+signal IO_E21
+signal IO_E22
+signal IO_F2
+signal IO_F3
+signal IO_F4
+signal IO_F5
+signal IO_F6
+signal IO_F7
+signal IO_F9
+signal IO_F10
+signal IO_F11
+signal IO_F12
+signal IO_F13
+signal IO_F16
+signal IO_F17
+signal IO_F18
+signal IO_F19
+signal IO_F20
+signal IO_F21
+signal IO_G1
+signal IO_G2
+signal IO_G5
+signal IO_G6
+signal IO_G17
+signal IO_G18
+signal IO_G19
+signal IO_G21
+signal IO_G22
+signal IO_H5
+signal IO_K1
+signal IO_K2
+signal IO_K3
+signal IO_K4
+signal IO_K19
+signal IO_K20
+signal IO_K21
+signal IO_K22
+signal IO_L1
+signal IO_L2
+signal IO_L3
+signal IO_L4
+signal IO_L5
+signal IO_L6
+signal IO_L17
+signal IO_L18
+signal IO_L19
+signal IO_L20
+signal IO_L21
+signal IO_L22
+signal IO_M1
+signal IO_M2
+signal IO_M3
+signal IO_M4
+signal IO_M5
+signal IO_M6
+signal IO_M17
+signal IO_M18
+signal IO_M19
+signal IO_M20
+signal IO_M21
+signal IO_M22
+signal IO_N1
+signal IO_N2
+signal IO_N3
+signal IO_N4
+signal IO_N19
+signal IO_N20
+signal IO_N21
+signal IO_N22
+signal IO_R18
+signal IO_T1
+signal IO_T2
+signal IO_T4
+signal IO_T5
+signal IO_T6
+signal IO_T17
+signal IO_T18
+signal IO_T21
+signal IO_T22
+signal IO_U2
+signal IO_U3
+signal IO_U4
+signal IO_U5
+signal IO_U6
+signal IO_U7
+signal IO_U10
+signal IO_U11
+signal IO_U12
+signal IO_U13
+signal IO_U14
+signal IO_U16
+signal IO_U17
+signal IO_U18
+signal IO_U19
+signal IO_U20
+signal IO_U21
+signal IO_V1
+signal IO_V2
+signal IO_V3
+signal IO_V4
+signal IO_V5
+signal IO_V6
+signal IO_V7
+signal IO_V8
+signal IO_V9
+signal IO_V10
+signal IO_V11
+signal IO_V12
+signal IO_V13
+signal IO_V14
+signal IO_V16
+signal IO_V17
+signal IO_V18
+signal IO_V19
+signal IO_V20
+signal IO_V21
+signal IO_V22
+signal IO_W1
+signal IO_W2
+signal IO_W3
+signal IO_W4
+signal IO_W5
+signal IO_W6
+signal IO_W8
+signal IO_W9
+signal IO_W10
+signal IO_W11
+signal IO_W12
+signal IO_W13
+signal IO_W14
+signal IO_W16
+signal IO_W17
+signal IO_W18
+signal IO_W19
+signal IO_W20
+signal IO_W21
+signal IO_W22
+signal IO_Y1
+signal IO_Y2
+signal IO_Y3
+signal IO_Y4
+signal IO_Y5
+signal IO_Y6
+signal IO_Y10
+signal IO_Y11
+signal IO_Y12
+signal IO_Y13
+signal IO_Y16
+signal IO_Y17
+signal IO_Y18
+signal IO_Y19
+signal IO_Y20
+signal IO_Y21
+signal IO_Y22
+signal IO_AA3
+signal IO_AA4
+signal IO_AA5
+signal IO_AA6
+signal IO_AA8
+signal IO_AA9
+signal IO_AA10
+signal IO_AA11
+signal IO_AA12
+signal IO_AA13
+signal IO_AA14
+signal IO_AA15
+signal IO_AA17
+signal IO_AA18
+signal IO_AA20
+signal IO_AB4
+signal IO_AB5
+signal IO_AB8
+signal IO_AB9
+signal IO_AB10
+signal IO_AB11
+signal IO_AB12
+signal IO_AB13
+signal IO_AB14
+signal IO_AB15
+signal IO_AB18
+
+register BSR 815
+register BR 1
+register DIR 32
+
+instruction length 6
+
+instruction EXTEST 000000 BSR
+instruction SAMPLE/PRELOAD 000001 BSR
+instruction IDCODE 001001 DIR
+instruction BYPASS 111111 BR
+
+bit 814 I 1 IO_C20
+bit 813 O 1 IO_C20 812 1 Z
+bit 812 C 1 *
+bit 811 I 1 IO_C21
+bit 810 O 1 IO_C21 809 1 Z
+bit 809 C 1 *
+bit 808 O 1 *
+bit 807 O 1 *
+bit 806 O 1 *
+bit 805 I 1 IO_C22
+bit 804 O 1 IO_C22 803 1 Z
+bit 803 C 1 *
+bit 802 I 1 IO_D20
+bit 801 O 1 IO_D20 800 1 Z
+bit 800 C 1 *
+bit 799 I 1 IO_D19
+bit 798 O 1 IO_D19 797 1 Z
+bit 797 C 1 *
+bit 796 I 1 IO_D21
+bit 795 O 1 IO_D21 794 1 Z
+bit 794 C 1 *
+bit 793 I 1 IO_D22
+bit 792 O 1 IO_D22 791 1 Z
+bit 791 C 1 *
+bit 790 I 1 IO_E18
+bit 789 O 1 IO_E18 788 1 Z
+bit 788 C 1 *
+bit 787 I 1 IO_F18
+bit 786 O 1 IO_F18 785 1 Z
+bit 785 C 1 *
+bit 784 I 1 IO_E19
+bit 783 O 1 IO_E19 782 1 Z
+bit 782 C 1 *
+bit 781 I 1 IO_E20
+bit 780 O 1 IO_E20 779 1 Z
+bit 779 C 1 *
+bit 778 I 1 IO_E21
+bit 777 O 1 IO_E21 776 1 Z
+bit 776 C 1 *
+bit 775 I 1 IO_E22
+bit 774 O 1 IO_E22 773 1 Z
+bit 773 C 1 *
+bit 772 I 1 IO_G17
+bit 771 O 1 IO_G17 770 1 Z
+bit 770 C 1 *
+bit 769 I 1 IO_G18
+bit 768 O 1 IO_G18 767 1 Z
+bit 767 C 1 *
+bit 766 I 1 IO_F19
+bit 765 O 1 IO_F19 764 1 Z
+bit 764 C 1 *
+bit 763 I 1 IO_G19
+bit 762 O 1 IO_G19 761 1 Z
+bit 761 C 1 *
+bit 760 I 1 IO_F20
+bit 759 O 1 IO_F20 758 1 Z
+bit 758 C 1 *
+bit 757 I 1 IO_F21
+bit 756 O 1 IO_F21 755 1 Z
+bit 755 C 1 *
+bit 754 I 1 IO_G21
+bit 753 O 1 IO_G21 752 1 Z
+bit 752 C 1 *
+bit 751 I 1 IO_G22
+bit 750 O 1 IO_G22 749 1 Z
+bit 749 C 1 *
+bit 748 I 1 IO_K19
+bit 747 O 1 IO_K19 746 1 Z
+bit 746 C 1 *
+bit 745 I 1 IO_K20
+bit 744 O 1 IO_K20 743 1 Z
+bit 743 C 1 *
+bit 742 I 1 IO_K21
+bit 741 O 1 IO_K21 740 1 Z
+bit 740 C 1 *
+bit 739 I 1 IO_K22
+bit 738 O 1 IO_K22 737 1 Z
+bit 737 C 1 *
+bit 736 I 1 IO_L17
+bit 735 O 1 IO_L17 734 1 Z
+bit 734 C 1 *
+bit 733 I 1 IO_L18
+bit 732 O 1 IO_L18 731 1 Z
+bit 731 C 1 *
+bit 730 I 1 IO_L19
+bit 729 O 1 IO_L19 728 1 Z
+bit 728 C 1 *
+bit 727 I 1 IO_L20
+bit 726 O 1 IO_L20 725 1 Z
+bit 725 C 1 *
+bit 724 I 1 IO_L21
+bit 723 O 1 IO_L21 722 1 Z
+bit 722 C 1 *
+bit 721 I 1 IO_L22
+bit 720 O 1 IO_L22 719 1 Z
+bit 719 C 1 *
+bit 718 I 1 IO_M22
+bit 717 O 1 IO_M22 716 1 Z
+bit 716 C 1 *
+bit 715 I 1 IO_M21
+bit 714 O 1 IO_M21 713 1 Z
+bit 713 C 1 *
+bit 712 I 1 IO_M20
+bit 711 O 1 IO_M20 710 1 Z
+bit 710 C 1 *
+bit 709 I 1 IO_M19
+bit 708 O 1 IO_M19 707 1 Z
+bit 707 C 1 *
+bit 706 I 1 IO_M18
+bit 705 O 1 IO_M18 704 1 Z
+bit 704 C 1 *
+bit 703 I 1 IO_M17
+bit 702 O 1 IO_M17 701 1 Z
+bit 701 C 1 *
+bit 700 I 1 IO_N22
+bit 699 O 1 IO_N22 698 1 Z
+bit 698 C 1 *
+bit 697 I 1 IO_N21
+bit 696 O 1 IO_N21 695 1 Z
+bit 695 C 1 *
+bit 694 I 1 IO_N20
+bit 693 O 1 IO_N20 692 1 Z
+bit 692 C 1 *
+bit 691 I 1 IO_N19
+bit 690 O 1 IO_N19 689 1 Z
+bit 689 C 1 *
+bit 688 I 1 IO_T22
+bit 687 O 1 IO_T22 686 1 Z
+bit 686 C 1 *
+bit 685 I 1 IO_T21
+bit 684 O 1 IO_T21 683 1 Z
+bit 683 C 1 *
+bit 682 I 1 IO_R18
+bit 681 O 1 IO_R18 680 1 Z
+bit 680 C 1 *
+bit 679 I 1 IO_T18
+bit 678 O 1 IO_T18 677 1 Z
+bit 677 C 1 *
+bit 676 I 1 IO_U21
+bit 675 O 1 IO_U21 674 1 Z
+bit 674 C 1 *
+bit 673 I 1 IO_U20
+bit 672 O 1 IO_U20 671 1 Z
+bit 671 C 1 *
+bit 670 I 1 IO_T17
+bit 669 O 1 IO_T17 668 1 Z
+bit 668 C 1 *
+bit 667 I 1 IO_U18
+bit 666 O 1 IO_U18 665 1 Z
+bit 665 C 1 *
+bit 664 I 1 IO_V22
+bit 663 O 1 IO_V22 662 1 Z
+bit 662 C 1 *
+bit 661 I 1 IO_V21
+bit 660 O 1 IO_V21 659 1 Z
+bit 659 C 1 *
+bit 658 I 1 IO_U19
+bit 657 O 1 IO_U19 656 1 Z
+bit 656 C 1 *
+bit 655 I 1 IO_V20
+bit 654 O 1 IO_V20 653 1 Z
+bit 653 C 1 *
+bit 652 I 1 IO_W21
+bit 651 O 1 IO_W21 650 1 Z
+bit 650 C 1 *
+bit 649 I 1 IO_W20
+bit 648 O 1 IO_W20 647 1 Z
+bit 647 C 1 *
+bit 646 I 1 IO_V19
+bit 645 O 1 IO_V19 644 1 Z
+bit 644 C 1 *
+bit 643 I 1 IO_W19
+bit 642 O 1 IO_W19 641 1 Z
+bit 641 C 1 *
+bit 640 I 1 IO_W22
+bit 639 O 1 IO_W22 638 1 Z
+bit 638 C 1 *
+bit 637 I 1 IO_Y22
+bit 636 O 1 IO_Y22 635 1 Z
+bit 635 C 1 *
+bit 634 I 1 IO_Y21
+bit 633 O 1 IO_Y21 632 1 Z
+bit 632 C 1 *
+bit 631 O 1 *
+bit 630 O 1 *
+bit 629 O 1 *
+bit 628 I 1 IO_Y20
+bit 627 O 1 IO_Y20 626 1 Z
+bit 626 C 1 *
+bit 625 I 1 IO_Y19
+bit 624 O 1 IO_Y19 623 1 Z
+bit 623 C 1 *
+bit 622 I 1 CCLK_AA22
+bit 621 O 1 CCLK_AA22 620 1 Z
+bit 620 C 1 *
+bit 619 I 1 DONE_AB21
+bit 618 O 1 DONE_AB21 617 1 Z
+bit 617 C 1 *
+bit 616 I 1 IO_V18
+bit 615 O 1 IO_V18 614 1 Z
+bit 614 C 1 *
+bit 613 I 1 IO_AA20
+bit 612 O 1 IO_AA20 611 1 Z
+bit 611 C 1 *
+bit 610 I 1 IO_AB20
+bit 609 O 1 IO_AB20 608 1 Z
+bit 608 C 1 *
+bit 607 I 1 IO_W18
+bit 606 O 1 IO_W18 605 1 Z
+bit 605 C 1 *
+bit 604 I 1 IO_Y18
+bit 603 O 1 IO_Y18 602 1 Z
+bit 602 C 1 *
+bit 601 I 1 IO_U17
+bit 600 O 1 IO_U17 599 1 Z
+bit 599 C 1 *
+bit 598 I 1 IO_AA18
+bit 597 O 1 IO_AA18 596 1 Z
+bit 596 C 1 *
+bit 595 I 1 IO_AB18
+bit 594 O 1 IO_AB18 593 1 Z
+bit 593 C 1 *
+bit 592 I 1 IO_V17
+bit 591 O 1 IO_V17 590 1 Z
+bit 590 C 1 *
+bit 589 I 1 IO_W17
+bit 588 O 1 IO_W17 587 1 Z
+bit 587 C 1 *
+bit 586 I 1 IO_U16
+bit 585 O 1 IO_U16 584 1 Z
+bit 584 C 1 *
+bit 583 I 1 IO_Y17
+bit 582 O 1 IO_Y17 581 1 Z
+bit 581 C 1 *
+bit 580 I 1 IO_AA17
+bit 579 O 1 IO_AA17 578 1 Z
+bit 578 C 1 *
+bit 577 I 1 IO_V16
+bit 576 O 1 IO_V16 575 1 Z
+bit 575 C 1 *
+bit 574 I 1 IO_W16
+bit 573 O 1 IO_W16 572 1 Z
+bit 572 C 1 *
+bit 571 I 1 IO_Y16
+bit 570 O 1 IO_Y16 569 1 Z
+bit 569 C 1 *
+bit 568 I 1 IO_AA15
+bit 567 O 1 IO_AA15 566 1 Z
+bit 566 C 1 *
+bit 565 I 1 IO_AB15
+bit 564 O 1 IO_AB15 563 1 Z
+bit 563 C 1 *
+bit 562 I 1 IO_U14
+bit 561 O 1 IO_U14 560 1 Z
+bit 560 C 1 *
+bit 559 I 1 IO_V14
+bit 558 O 1 IO_V14 557 1 Z
+bit 557 C 1 *
+bit 556 I 1 IO_W14
+bit 555 O 1 IO_W14 554 1 Z
+bit 554 C 1 *
+bit 553 I 1 IO_AA14
+bit 552 O 1 IO_AA14 551 1 Z
+bit 551 C 1 *
+bit 550 I 1 IO_AB14
+bit 549 O 1 IO_AB14 548 1 Z
+bit 548 C 1 *
+bit 547 I 1 IO_U13
+bit 546 O 1 IO_U13 545 1 Z
+bit 545 C 1 *
+bit 544 I 1 IO_V13
+bit 543 O 1 IO_V13 542 1 Z
+bit 542 C 1 *
+bit 541 I 1 IO_W13
+bit 540 O 1 IO_W13 539 1 Z
+bit 539 C 1 *
+bit 538 I 1 IO_Y13
+bit 537 O 1 IO_Y13 536 1 Z
+bit 536 C 1 *
+bit 535 I 1 IO_AA13
+bit 534 O 1 IO_AA13 533 1 Z
+bit 533 C 1 *
+bit 532 I 1 IO_U12
+bit 531 O 1 IO_U12 530 1 Z
+bit 530 C 1 *
+bit 529 I 1 IO_V12
+bit 528 O 1 IO_V12 527 1 Z
+bit 527 C 1 *
+bit 526 I 1 IO_AB13
+bit 525 O 1 IO_AB13 524 1 Z
+bit 524 C 1 *
+bit 523 I 1 IO_W12
+bit 522 O 1 IO_W12 521 1 Z
+bit 521 C 1 *
+bit 520 I 1 IO_Y12
+bit 519 O 1 IO_Y12 518 1 Z
+bit 518 C 1 *
+bit 517 I 1 IO_AA12
+bit 516 O 1 IO_AA12 515 1 Z
+bit 515 C 1 *
+bit 514 I 1 IO_AB12
+bit 513 O 1 IO_AB12 512 1 Z
+bit 512 C 1 *
+bit 511 I 1 IO_AB11
+bit 510 O 1 IO_AB11 509 1 Z
+bit 509 C 1 *
+bit 508 I 1 IO_AA11
+bit 507 O 1 IO_AA11 506 1 Z
+bit 506 C 1 *
+bit 505 I 1 IO_Y11
+bit 504 O 1 IO_Y11 503 1 Z
+bit 503 C 1 *
+bit 502 I 1 IO_W11
+bit 501 O 1 IO_W11 500 1 Z
+bit 500 C 1 *
+bit 499 I 1 IO_V11
+bit 498 O 1 IO_V11 497 1 Z
+bit 497 C 1 *
+bit 496 I 1 IO_U11
+bit 495 O 1 IO_U11 494 1 Z
+bit 494 C 1 *
+bit 493 I 1 IO_AB10
+bit 492 O 1 IO_AB10 491 1 Z
+bit 491 C 1 *
+bit 490 I 1 IO_AA10
+bit 489 O 1 IO_AA10 488 1 Z
+bit 488 C 1 *
+bit 487 I 1 IO_Y10
+bit 486 O 1 IO_Y10 485 1 Z
+bit 485 C 1 *
+bit 484 I 1 IO_W10
+bit 483 O 1 IO_W10 482 1 Z
+bit 482 C 1 *
+bit 481 I 1 IO_V10
+bit 480 O 1 IO_V10 479 1 Z
+bit 479 C 1 *
+bit 478 I 1 IO_AB9
+bit 477 O 1 IO_AB9 476 1 Z
+bit 476 C 1 *
+bit 475 I 1 IO_AA9
+bit 474 O 1 IO_AA9 473 1 Z
+bit 473 C 1 *
+bit 472 I 1 IO_W9
+bit 471 O 1 IO_W9 470 1 Z
+bit 470 C 1 *
+bit 469 I 1 IO_V9
+bit 468 O 1 IO_V9 467 1 Z
+bit 467 C 1 *
+bit 466 I 1 IO_U10
+bit 465 O 1 IO_U10 464 1 Z
+bit 464 C 1 *
+bit 463 I 1 IO_AB8
+bit 462 O 1 IO_AB8 461 1 Z
+bit 461 C 1 *
+bit 460 I 1 IO_AA8
+bit 459 O 1 IO_AA8 458 1 Z
+bit 458 C 1 *
+bit 457 I 1 IO_W8
+bit 456 O 1 IO_W8 455 1 Z
+bit 455 C 1 *
+bit 454 I 1 IO_V8
+bit 453 O 1 IO_V8 452 1 Z
+bit 452 C 1 *
+bit 451 I 1 IO_V7
+bit 450 O 1 IO_V7 449 1 Z
+bit 449 C 1 *
+bit 448 I 1 IO_AA6
+bit 447 O 1 IO_AA6 446 1 Z
+bit 446 C 1 *
+bit 445 I 1 IO_Y6
+bit 444 O 1 IO_Y6 443 1 Z
+bit 443 C 1 *
+bit 442 I 1 IO_W6
+bit 441 O 1 IO_W6 440 1 Z
+bit 440 C 1 *
+bit 439 I 1 IO_V6
+bit 438 O 1 IO_V6 437 1 Z
+bit 437 C 1 *
+bit 436 I 1 IO_U7
+bit 435 O 1 IO_U7 434 1 Z
+bit 434 C 1 *
+bit 433 I 1 IO_AB5
+bit 432 O 1 IO_AB5 431 1 Z
+bit 431 C 1 *
+bit 430 I 1 IO_AA5
+bit 429 O 1 IO_AA5 428 1 Z
+bit 428 C 1 *
+bit 427 I 1 IO_Y5
+bit 426 O 1 IO_Y5 425 1 Z
+bit 425 C 1 *
+bit 424 I 1 IO_W5
+bit 423 O 1 IO_W5 422 1 Z
+bit 422 C 1 *
+bit 421 I 1 IO_U6
+bit 420 O 1 IO_U6 419 1 Z
+bit 419 C 1 *
+bit 418 I 1 IO_AB4
+bit 417 O 1 IO_AB4 416 1 Z
+bit 416 C 1 *
+bit 415 I 1 IO_AA4
+bit 414 O 1 IO_AA4 413 1 Z
+bit 413 C 1 *
+bit 412 I 1 IO_Y4
+bit 411 O 1 IO_Y4 410 1 Z
+bit 410 C 1 *
+bit 409 I 1 IO_AA3
+bit 408 O 1 IO_AA3 407 1 Z
+bit 407 C 1 *
+bit 406 I 1 M2_AB3
+bit 405 I 1 M0_AB2
+bit 404 I 1 M1_AA1
+bit 403 I 1 IO_Y3
+bit 402 O 1 IO_Y3 401 1 Z
+bit 401 C 1 *
+bit 400 I 1 IO_Y2
+bit 399 O 1 IO_Y2 398 1 Z
+bit 398 C 1 *
+bit 397 O 1 *
+bit 396 O 1 *
+bit 395 O 1 *
+bit 394 I 1 IO_Y1
+bit 393 O 1 IO_Y1 392 1 Z
+bit 392 C 1 *
+bit 391 I 1 IO_W4
+bit 390 O 1 IO_W4 389 1 Z
+bit 389 C 1 *
+bit 388 I 1 IO_W3
+bit 387 O 1 IO_W3 386 1 Z
+bit 386 C 1 *
+bit 385 I 1 IO_W2
+bit 384 O 1 IO_W2 383 1 Z
+bit 383 C 1 *
+bit 382 I 1 IO_W1
+bit 381 O 1 IO_W1 380 1 Z
+bit 380 C 1 *
+bit 379 I 1 IO_V5
+bit 378 O 1 IO_V5 377 1 Z
+bit 377 C 1 *
+bit 376 I 1 IO_U5
+bit 375 O 1 IO_U5 374 1 Z
+bit 374 C 1 *
+bit 373 I 1 IO_V4
+bit 372 O 1 IO_V4 371 1 Z
+bit 371 C 1 *
+bit 370 I 1 IO_V3
+bit 369 O 1 IO_V3 368 1 Z
+bit 368 C 1 *
+bit 367 I 1 IO_V2
+bit 366 O 1 IO_V2 365 1 Z
+bit 365 C 1 *
+bit 364 I 1 IO_V1
+bit 363 O 1 IO_V1 362 1 Z
+bit 362 C 1 *
+bit 361 I 1 IO_T6
+bit 360 O 1 IO_T6 359 1 Z
+bit 359 C 1 *
+bit 358 I 1 IO_T5
+bit 357 O 1 IO_T5 356 1 Z
+bit 356 C 1 *
+bit 355 I 1 IO_U4
+bit 354 O 1 IO_U4 353 1 Z
+bit 353 C 1 *
+bit 352 I 1 IO_T4
+bit 351 O 1 IO_T4 350 1 Z
+bit 350 C 1 *
+bit 349 I 1 IO_U3
+bit 348 O 1 IO_U3 347 1 Z
+bit 347 C 1 *
+bit 346 I 1 IO_U2
+bit 345 O 1 IO_U2 344 1 Z
+bit 344 C 1 *
+bit 343 I 1 IO_T2
+bit 342 O 1 IO_T2 341 1 Z
+bit 341 C 1 *
+bit 340 I 1 IO_T1
+bit 339 O 1 IO_T1 338 1 Z
+bit 338 C 1 *
+bit 337 I 1 IO_N4
+bit 336 O 1 IO_N4 335 1 Z
+bit 335 C 1 *
+bit 334 I 1 IO_N3
+bit 333 O 1 IO_N3 332 1 Z
+bit 332 C 1 *
+bit 331 I 1 IO_N2
+bit 330 O 1 IO_N2 329 1 Z
+bit 329 C 1 *
+bit 328 I 1 IO_N1
+bit 327 O 1 IO_N1 326 1 Z
+bit 326 C 1 *
+bit 325 I 1 IO_M6
+bit 324 O 1 IO_M6 323 1 Z
+bit 323 C 1 *
+bit 322 I 1 IO_M5
+bit 321 O 1 IO_M5 320 1 Z
+bit 320 C 1 *
+bit 319 I 1 IO_M4
+bit 318 O 1 IO_M4 317 1 Z
+bit 317 C 1 *
+bit 316 I 1 IO_M3
+bit 315 O 1 IO_M3 314 1 Z
+bit 314 C 1 *
+bit 313 I 1 IO_M2
+bit 312 O 1 IO_M2 311 1 Z
+bit 311 C 1 *
+bit 310 I 1 IO_M1
+bit 309 O 1 IO_M1 308 1 Z
+bit 308 C 1 *
+bit 307 I 1 IO_L1
+bit 306 O 1 IO_L1 305 1 Z
+bit 305 C 1 *
+bit 304 I 1 IO_L2
+bit 303 O 1 IO_L2 302 1 Z
+bit 302 C 1 *
+bit 301 I 1 IO_L3
+bit 300 O 1 IO_L3 299 1 Z
+bit 299 C 1 *
+bit 298 I 1 IO_L4
+bit 297 O 1 IO_L4 296 1 Z
+bit 296 C 1 *
+bit 295 I 1 IO_L5
+bit 294 O 1 IO_L5 293 1 Z
+bit 293 C 1 *
+bit 292 I 1 IO_L6
+bit 291 O 1 IO_L6 290 1 Z
+bit 290 C 1 *
+bit 289 I 1 IO_K1
+bit 288 O 1 IO_K1 287 1 Z
+bit 287 C 1 *
+bit 286 I 1 IO_K2
+bit 285 O 1 IO_K2 284 1 Z
+bit 284 C 1 *
+bit 283 I 1 IO_K3
+bit 282 O 1 IO_K3 281 1 Z
+bit 281 C 1 *
+bit 280 I 1 IO_K4
+bit 279 O 1 IO_K4 278 1 Z
+bit 278 C 1 *
+bit 277 I 1 IO_G1
+bit 276 O 1 IO_G1 275 1 Z
+bit 275 C 1 *
+bit 274 I 1 IO_G2
+bit 273 O 1 IO_G2 272 1 Z
+bit 272 C 1 *
+bit 271 I 1 IO_H5
+bit 270 O 1 IO_H5 269 1 Z
+bit 269 C 1 *
+bit 268 I 1 IO_G5
+bit 267 O 1 IO_G5 266 1 Z
+bit 266 C 1 *
+bit 265 I 1 IO_F2
+bit 264 O 1 IO_F2 263 1 Z
+bit 263 C 1 *
+bit 262 I 1 IO_F3
+bit 261 O 1 IO_F3 260 1 Z
+bit 260 C 1 *
+bit 259 I 1 IO_G6
+bit 258 O 1 IO_G6 257 1 Z
+bit 257 C 1 *
+bit 256 I 1 IO_F5
+bit 255 O 1 IO_F5 254 1 Z
+bit 254 C 1 *
+bit 253 I 1 IO_E1
+bit 252 O 1 IO_E1 251 1 Z
+bit 251 C 1 *
+bit 250 I 1 IO_E2
+bit 249 O 1 IO_E2 248 1 Z
+bit 248 C 1 *
+bit 247 I 1 IO_F4
+bit 246 O 1 IO_F4 245 1 Z
+bit 245 C 1 *
+bit 244 I 1 IO_E3
+bit 243 O 1 IO_E3 242 1 Z
+bit 242 C 1 *
+bit 241 I 1 IO_D3
+bit 240 O 1 IO_D3 239 1 Z
+bit 239 C 1 *
+bit 238 I 1 IO_D2
+bit 237 O 1 IO_D2 236 1 Z
+bit 236 C 1 *
+bit 235 I 1 IO_E4
+bit 234 O 1 IO_E4 233 1 Z
+bit 233 C 1 *
+bit 232 I 1 IO_D4
+bit 231 O 1 IO_D4 230 1 Z
+bit 230 C 1 *
+bit 229 I 1 IO_D1
+bit 228 O 1 IO_D1 227 1 Z
+bit 227 C 1 *
+bit 226 I 1 IO_C1
+bit 225 O 1 IO_C1 224 1 Z
+bit 224 C 1 *
+bit 223 I 1 IO_C2
+bit 222 O 1 IO_C2 221 1 Z
+bit 221 C 1 *
+bit 220 O 1 *
+bit 219 O 1 *
+bit 218 O 1 *
+bit 217 I 1 IO_C3
+bit 216 O 1 IO_C3 215 1 Z
+bit 215 C 1 *
+bit 214 I 1 IO_C4
+bit 213 O 1 IO_C4 212 1 Z
+bit 212 C 1 *
+bit 211 O 1 *
+bit 210 I 1 HSWAP_EN_B3
+bit 209 I 1 IO_A3
+bit 208 O 1 IO_A3 207 1 Z
+bit 207 C 1 *
+bit 206 I 1 IO_B4
+bit 205 O 1 IO_B4 204 1 Z
+bit 204 C 1 *
+bit 203 I 1 IO_A4
+bit 202 O 1 IO_A4 201 1 Z
+bit 201 C 1 *
+bit 200 I 1 IO_D5
+bit 199 O 1 IO_D5 198 1 Z
+bit 198 C 1 *
+bit 197 I 1 IO_C5
+bit 196 O 1 IO_C5 195 1 Z
+bit 195 C 1 *
+bit 194 I 1 IO_F6
+bit 193 O 1 IO_F6 192 1 Z
+bit 192 C 1 *
+bit 191 I 1 IO_B5
+bit 190 O 1 IO_B5 189 1 Z
+bit 189 C 1 *
+bit 188 I 1 IO_A5
+bit 187 O 1 IO_A5 186 1 Z
+bit 186 C 1 *
+bit 185 I 1 IO_E6
+bit 184 O 1 IO_E6 183 1 Z
+bit 183 C 1 *
+bit 182 I 1 IO_D6
+bit 181 O 1 IO_D6 180 1 Z
+bit 180 C 1 *
+bit 179 I 1 IO_F7
+bit 178 O 1 IO_F7 177 1 Z
+bit 177 C 1 *
+bit 176 I 1 IO_C6
+bit 175 O 1 IO_C6 174 1 Z
+bit 174 C 1 *
+bit 173 I 1 IO_B6
+bit 172 O 1 IO_B6 171 1 Z
+bit 171 C 1 *
+bit 170 I 1 IO_E7
+bit 169 O 1 IO_E7 168 1 Z
+bit 168 C 1 *
+bit 167 I 1 IO_D7
+bit 166 O 1 IO_D7 165 1 Z
+bit 165 C 1 *
+bit 164 I 1 IO_C7
+bit 163 O 1 IO_C7 162 1 Z
+bit 162 C 1 *
+bit 161 I 1 IO_B8
+bit 160 O 1 IO_B8 159 1 Z
+bit 159 C 1 *
+bit 158 I 1 IO_A8
+bit 157 O 1 IO_A8 156 1 Z
+bit 156 C 1 *
+bit 155 I 1 IO_F9
+bit 154 O 1 IO_F9 153 1 Z
+bit 153 C 1 *
+bit 152 I 1 IO_E9
+bit 151 O 1 IO_E9 150 1 Z
+bit 150 C 1 *
+bit 149 I 1 IO_D9
+bit 148 O 1 IO_D9 147 1 Z
+bit 147 C 1 *
+bit 146 I 1 IO_B9
+bit 145 O 1 IO_B9 144 1 Z
+bit 144 C 1 *
+bit 143 I 1 IO_A9
+bit 142 O 1 IO_A9 141 1 Z
+bit 141 C 1 *
+bit 140 I 1 IO_F10
+bit 139 O 1 IO_F10 138 1 Z
+bit 138 C 1 *
+bit 137 I 1 IO_E10
+bit 136 O 1 IO_E10 135 1 Z
+bit 135 C 1 *
+bit 134 I 1 IO_D10
+bit 133 O 1 IO_D10 132 1 Z
+bit 132 C 1 *
+bit 131 I 1 IO_C10
+bit 130 O 1 IO_C10 129 1 Z
+bit 129 C 1 *
+bit 128 I 1 IO_B10
+bit 127 O 1 IO_B10 126 1 Z
+bit 126 C 1 *
+bit 125 I 1 IO_F11
+bit 124 O 1 IO_F11 123 1 Z
+bit 123 C 1 *
+bit 122 I 1 IO_E11
+bit 121 O 1 IO_E11 120 1 Z
+bit 120 C 1 *
+bit 119 I 1 IO_A10
+bit 118 O 1 IO_A10 117 1 Z
+bit 117 C 1 *
+bit 116 I 1 IO_D11
+bit 115 O 1 IO_D11 114 1 Z
+bit 114 C 1 *
+bit 113 I 1 IO_C11
+bit 112 O 1 IO_C11 111 1 Z
+bit 111 C 1 *
+bit 110 I 1 IO_B11
+bit 109 O 1 IO_B11 108 1 Z
+bit 108 C 1 *
+bit 107 I 1 IO_A11
+bit 106 O 1 IO_A11 105 1 Z
+bit 105 C 1 *
+bit 104 I 1 IO_A12
+bit 103 O 1 IO_A12 102 1 Z
+bit 102 C 1 *
+bit 101 I 1 IO_B12
+bit 100 O 1 IO_B12 99 1 Z
+bit 99 C 1 *
+bit 98 I 1 IO_C12
+bit 97 O 1 IO_C12 96 1 Z
+bit 96 C 1 *
+bit 95 I 1 IO_D12
+bit 94 O 1 IO_D12 93 1 Z
+bit 93 C 1 *
+bit 92 I 1 IO_E12
+bit 91 O 1 IO_E12 90 1 Z
+bit 90 C 1 *
+bit 89 I 1 IO_F12
+bit 88 O 1 IO_F12 87 1 Z
+bit 87 C 1 *
+bit 86 I 1 IO_A13
+bit 85 O 1 IO_A13 84 1 Z
+bit 84 C 1 *
+bit 83 I 1 IO_B13
+bit 82 O 1 IO_B13 81 1 Z
+bit 81 C 1 *
+bit 80 I 1 IO_C13
+bit 79 O 1 IO_C13 78 1 Z
+bit 78 C 1 *
+bit 77 I 1 IO_D13
+bit 76 O 1 IO_D13 75 1 Z
+bit 75 C 1 *
+bit 74 I 1 IO_E13
+bit 73 O 1 IO_E13 72 1 Z
+bit 72 C 1 *
+bit 71 I 1 IO_A14
+bit 70 O 1 IO_A14 69 1 Z
+bit 69 C 1 *
+bit 68 I 1 IO_B14
+bit 67 O 1 IO_B14 66 1 Z
+bit 66 C 1 *
+bit 65 I 1 IO_D14
+bit 64 O 1 IO_D14 63 1 Z
+bit 63 C 1 *
+bit 62 I 1 IO_E14
+bit 61 O 1 IO_E14 60 1 Z
+bit 60 C 1 *
+bit 59 I 1 IO_F13
+bit 58 O 1 IO_F13 57 1 Z
+bit 57 C 1 *
+bit 56 I 1 IO_B15
+bit 55 O 1 IO_B15 54 1 Z
+bit 54 C 1 *
+bit 53 I 1 IO_A15
+bit 52 O 1 IO_A15 51 1 Z
+bit 51 C 1 *
+bit 50 I 1 IO_D15
+bit 49 O 1 IO_D15 48 1 Z
+bit 48 C 1 *
+bit 47 I 1 IO_E15
+bit 46 O 1 IO_E15 45 1 Z
+bit 45 C 1 *
+bit 44 I 1 IO_E16
+bit 43 O 1 IO_E16 42 1 Z
+bit 42 C 1 *
+bit 41 I 1 IO_B17
+bit 40 O 1 IO_B17 39 1 Z
+bit 39 C 1 *
+bit 38 I 1 IO_C17
+bit 37 O 1 IO_C17 36 1 Z
+bit 36 C 1 *
+bit 35 I 1 IO_D17
+bit 34 O 1 IO_D17 33 1 Z
+bit 33 C 1 *
+bit 32 I 1 IO_E17
+bit 31 O 1 IO_E17 30 1 Z
+bit 30 C 1 *
+bit 29 I 1 IO_F16
+bit 28 O 1 IO_F16 27 1 Z
+bit 27 C 1 *
+bit 26 I 1 IO_A18
+bit 25 O 1 IO_A18 24 1 Z
+bit 24 C 1 *
+bit 23 I 1 IO_B18
+bit 22 O 1 IO_B18 21 1 Z
+bit 21 C 1 *
+bit 20 I 1 IO_C18
+bit 19 O 1 IO_C18 18 1 Z
+bit 18 C 1 *
+bit 17 I 1 IO_D18
+bit 16 O 1 IO_D18 15 1 Z
+bit 15 C 1 *
+bit 14 I 1 IO_F17
+bit 13 O 1 IO_F17 12 1 Z
+bit 12 C 1 *
+bit 11 I 1 IO_A19
+bit 10 O 1 IO_A19 9 1 Z
+bit 9 C 1 *
+bit 8 I 1 IO_B19
+bit 7 O 1 IO_B19 6 1 Z
+bit 6 C 1 *
+bit 5 I 1 IO_C19
+bit 4 O 1 IO_C19 3 1 Z
+bit 3 C 1 *
+bit 2 I 1 IO_B20
+bit 1 O 1 IO_B20 0 1 Z
+bit 0 C 1 *
--- /dev/null
+signal GND1
+signal GND2
+signal GND3
+signal GND4
+signal GND5
+signal GND6
+signal GND7
+signal GND8
+signal GND9
+signal GND10
+signal GND11
+signal GND12
+signal GND13
+signal GND14
+signal GND15
+signal GND16
+signal GND17
+signal GND18
+signal GND19
+signal GND20
+signal GND21
+signal GND22
+signal GND23
+signal GND24
+signal GND25
+signal GND26
+signal GND27
+signal GND28
+signal GND29
+signal GND30
+signal GND31
+signal GND32
+signal CCLK_T15
+signal DONE_R14
+signal HSWAP_EN_C4
+signal M0_P3
+signal M1_T2
+signal M2_P4
+signal PROG_B
+signal TCK
+signal TDI
+signal TDO
+signal TMS
+signal VCCAUX1
+signal VCCAUX2
+signal VCCAUX3
+signal VCCAUX4
+signal VCCAUX5
+signal VCCAUX6
+signal VCCAUX7
+signal VCCAUX8
+signal VCCINT1
+signal VCCINT2
+signal VCCINT3
+signal VCCINT4
+signal VCCINT5
+signal VCCINT6
+signal VCCINT7
+signal VCCINT8
+signal VCCO01
+signal VCCO02
+signal VCCO03
+signal VCCO11
+signal VCCO12
+signal VCCO13
+signal VCCO21
+signal VCCO22
+signal VCCO23
+signal VCCO31
+signal VCCO32
+signal VCCO33
+signal VCCO41
+signal VCCO42
+signal VCCO43
+signal VCCO51
+signal VCCO52
+signal VCCO53
+signal VCCO61
+signal VCCO62
+signal VCCO63
+signal VCCO71
+signal VCCO72
+signal VCCO73
+signal IO_A3
+signal IO_A4
+signal IO_A5
+signal IO_A7
+signal IO_A8
+signal IO_A9
+signal IO_A10
+signal IO_A12
+signal IO_A13
+signal IO_A14
+signal IO_B1
+signal IO_B4
+signal IO_B5
+signal IO_B6
+signal IO_B7
+signal IO_B8
+signal IO_B10
+signal IO_B11
+signal IO_B12
+signal IO_B13
+signal IO_B14
+signal IO_B16
+signal IO_C1
+signal IO_C2
+signal IO_C3
+signal IO_C5
+signal IO_C6
+signal IO_C7
+signal IO_C8
+signal IO_C9
+signal IO_C10
+signal IO_C11
+signal IO_C12
+signal IO_C15
+signal IO_C16
+signal IO_D1
+signal IO_D2
+signal IO_D3
+signal IO_D5
+signal IO_D6
+signal IO_D7
+signal IO_D8
+signal IO_D9
+signal IO_D10
+signal IO_D11
+signal IO_D12
+signal IO_D14
+signal IO_D15
+signal IO_D16
+signal IO_E1
+signal IO_E2
+signal IO_E3
+signal IO_E4
+signal IO_E6
+signal IO_E7
+signal IO_E10
+signal IO_E11
+signal IO_E13
+signal IO_E14
+signal IO_E15
+signal IO_E16
+signal IO_F2
+signal IO_F3
+signal IO_F4
+signal IO_F5
+signal IO_F12
+signal IO_F13
+signal IO_F14
+signal IO_F15
+signal IO_G1
+signal IO_G2
+signal IO_G3
+signal IO_G4
+signal IO_G5
+signal IO_G12
+signal IO_G13
+signal IO_G14
+signal IO_G15
+signal IO_G16
+signal IO_H1
+signal IO_H3
+signal IO_H4
+signal IO_H13
+signal IO_H14
+signal IO_H15
+signal IO_H16
+signal IO_J1
+signal IO_J2
+signal IO_J3
+signal IO_J4
+signal IO_J13
+signal IO_J14
+signal IO_J16
+signal IO_K1
+signal IO_K2
+signal IO_K3
+signal IO_K4
+signal IO_K5
+signal IO_K12
+signal IO_K13
+signal IO_K14
+signal IO_K15
+signal IO_K16
+signal IO_L2
+signal IO_L3
+signal IO_L4
+signal IO_L5
+signal IO_L12
+signal IO_L13
+signal IO_L14
+signal IO_L15
+signal IO_M1
+signal IO_M2
+signal IO_M3
+signal IO_M4
+signal IO_M6
+signal IO_M7
+signal IO_M10
+signal IO_M11
+signal IO_M13
+signal IO_M14
+signal IO_M15
+signal IO_M16
+signal IO_N1
+signal IO_N2
+signal IO_N3
+signal IO_N5
+signal IO_N6
+signal IO_N7
+signal IO_N8
+signal IO_N9
+signal IO_N10
+signal IO_N11
+signal IO_N12
+signal IO_N14
+signal IO_N15
+signal IO_N16
+signal IO_P1
+signal IO_P2
+signal IO_P5
+signal IO_P6
+signal IO_P7
+signal IO_P8
+signal IO_P9
+signal IO_P10
+signal IO_P11
+signal IO_P12
+signal IO_P13
+signal IO_P14
+signal IO_P15
+signal IO_P16
+signal IO_R1
+signal IO_R3
+signal IO_R4
+signal IO_R5
+signal IO_R6
+signal IO_R7
+signal IO_R9
+signal IO_R10
+signal IO_R11
+signal IO_R12
+signal IO_R13
+signal IO_R16
+signal IO_T3
+signal IO_T4
+signal IO_T5
+signal IO_T7
+signal IO_T8
+signal IO_T9
+signal IO_T10
+signal IO_T12
+signal IO_T13
+
+register BSR 815
+register BR 1
+register DIR 32
+
+instruction length 6
+
+instruction EXTEST 000000 BSR
+instruction SAMPLE/PRELOAD 000001 BSR
+instruction IDCODE 001001 DIR
+instruction BYPASS 111111 BR
+
+bit 814 I 1 IO_B16
+bit 813 O 1 IO_B16 812 1 Z
+bit 812 C 1 *
+bit 811 I 1 IO_C16
+bit 810 O 1 IO_C16 809 1 Z
+bit 809 C 1 *
+bit 808 O 1 *
+bit 807 O 1 *
+bit 806 O 1 *
+bit 805 O 1 *
+bit 804 O 1 *
+bit 803 O 1 *
+bit 802 I 1 IO_C15
+bit 801 O 1 IO_C15 800 1 Z
+bit 800 C 1 *
+bit 799 I 1 IO_D14
+bit 798 O 1 IO_D14 797 1 Z
+bit 797 C 1 *
+bit 796 I 1 IO_D15
+bit 795 O 1 IO_D15 794 1 Z
+bit 794 C 1 *
+bit 793 I 1 IO_D16
+bit 792 O 1 IO_D16 791 1 Z
+bit 791 C 1 *
+bit 790 I 1 IO_E13
+bit 789 O 1 IO_E13 788 1 Z
+bit 788 C 1 *
+bit 787 I 1 IO_E14
+bit 786 O 1 IO_E14 785 1 Z
+bit 785 C 1 *
+bit 784 I 1 IO_E15
+bit 783 O 1 IO_E15 782 1 Z
+bit 782 C 1 *
+bit 781 I 1 IO_E16
+bit 780 O 1 IO_E16 779 1 Z
+bit 779 C 1 *
+bit 778 I 1 IO_F12
+bit 777 O 1 IO_F12 776 1 Z
+bit 776 C 1 *
+bit 775 I 1 IO_F13
+bit 774 O 1 IO_F13 773 1 Z
+bit 773 C 1 *
+bit 772 I 1 IO_F14
+bit 771 O 1 IO_F14 770 1 Z
+bit 770 C 1 *
+bit 769 I 1 IO_F15
+bit 768 O 1 IO_F15 767 1 Z
+bit 767 C 1 *
+bit 766 I 1 IO_G12
+bit 765 O 1 IO_G12 764 1 Z
+bit 764 C 1 *
+bit 763 I 1 IO_G13
+bit 762 O 1 IO_G13 761 1 Z
+bit 761 C 1 *
+bit 760 I 1 IO_G14
+bit 759 O 1 IO_G14 758 1 Z
+bit 758 C 1 *
+bit 757 I 1 IO_G15
+bit 756 O 1 IO_G15 755 1 Z
+bit 755 C 1 *
+bit 754 O 1 *
+bit 753 O 1 *
+bit 752 O 1 *
+bit 751 O 1 *
+bit 750 O 1 *
+bit 749 O 1 *
+bit 748 O 1 *
+bit 747 O 1 *
+bit 746 O 1 *
+bit 745 O 1 *
+bit 744 O 1 *
+bit 743 O 1 *
+bit 742 O 1 *
+bit 741 O 1 *
+bit 740 O 1 *
+bit 739 O 1 *
+bit 738 O 1 *
+bit 737 O 1 *
+bit 736 O 1 *
+bit 735 O 1 *
+bit 734 O 1 *
+bit 733 I 1 IO_G16
+bit 732 O 1 IO_G16 731 1 Z
+bit 731 C 1 *
+bit 730 I 1 IO_H13
+bit 729 O 1 IO_H13 728 1 Z
+bit 728 C 1 *
+bit 727 I 1 IO_H14
+bit 726 O 1 IO_H14 725 1 Z
+bit 725 C 1 *
+bit 724 I 1 IO_H15
+bit 723 O 1 IO_H15 722 1 Z
+bit 722 C 1 *
+bit 721 I 1 IO_H16
+bit 720 O 1 IO_H16 719 1 Z
+bit 719 C 1 *
+bit 718 I 1 IO_J16
+bit 717 O 1 IO_J16 716 1 Z
+bit 716 C 1 *
+bit 715 I 1 IO_K16
+bit 714 O 1 IO_K16 713 1 Z
+bit 713 C 1 *
+bit 712 I 1 IO_J14
+bit 711 O 1 IO_J14 710 1 Z
+bit 710 C 1 *
+bit 709 I 1 IO_J13
+bit 708 O 1 IO_J13 707 1 Z
+bit 707 C 1 *
+bit 706 I 1 IO_K15
+bit 705 O 1 IO_K15 704 1 Z
+bit 704 C 1 *
+bit 703 O 1 *
+bit 702 O 1 *
+bit 701 O 1 *
+bit 700 O 1 *
+bit 699 O 1 *
+bit 698 O 1 *
+bit 697 O 1 *
+bit 696 O 1 *
+bit 695 O 1 *
+bit 694 O 1 *
+bit 693 O 1 *
+bit 692 O 1 *
+bit 691 O 1 *
+bit 690 O 1 *
+bit 689 O 1 *
+bit 688 O 1 *
+bit 687 O 1 *
+bit 686 O 1 *
+bit 685 O 1 *
+bit 684 O 1 *
+bit 683 O 1 *
+bit 682 I 1 IO_K14
+bit 681 O 1 IO_K14 680 1 Z
+bit 680 C 1 *
+bit 679 I 1 IO_K13
+bit 678 O 1 IO_K13 677 1 Z
+bit 677 C 1 *
+bit 676 I 1 IO_K12
+bit 675 O 1 IO_K12 674 1 Z
+bit 674 C 1 *
+bit 673 I 1 IO_L12
+bit 672 O 1 IO_L12 671 1 Z
+bit 671 C 1 *
+bit 670 I 1 IO_L15
+bit 669 O 1 IO_L15 668 1 Z
+bit 668 C 1 *
+bit 667 I 1 IO_L14
+bit 666 O 1 IO_L14 665 1 Z
+bit 665 C 1 *
+bit 664 I 1 IO_L13
+bit 663 O 1 IO_L13 662 1 Z
+bit 662 C 1 *
+bit 661 I 1 IO_M13
+bit 660 O 1 IO_M13 659 1 Z
+bit 659 C 1 *
+bit 658 I 1 IO_M16
+bit 657 O 1 IO_M16 656 1 Z
+bit 656 C 1 *
+bit 655 I 1 IO_M15
+bit 654 O 1 IO_M15 653 1 Z
+bit 653 C 1 *
+bit 652 I 1 IO_M14
+bit 651 O 1 IO_M14 650 1 Z
+bit 650 C 1 *
+bit 649 I 1 IO_N14
+bit 648 O 1 IO_N14 647 1 Z
+bit 647 C 1 *
+bit 646 I 1 IO_N16
+bit 645 O 1 IO_N16 644 1 Z
+bit 644 C 1 *
+bit 643 I 1 IO_N15
+bit 642 O 1 IO_N15 641 1 Z
+bit 641 C 1 *
+bit 640 I 1 IO_P15
+bit 639 O 1 IO_P15 638 1 Z
+bit 638 C 1 *
+bit 637 I 1 IO_P14
+bit 636 O 1 IO_P14 635 1 Z
+bit 635 C 1 *
+bit 634 O 1 *
+bit 633 O 1 *
+bit 632 O 1 *
+bit 631 O 1 *
+bit 630 O 1 *
+bit 629 O 1 *
+bit 628 I 1 IO_P16
+bit 627 O 1 IO_P16 626 1 Z
+bit 626 C 1 *
+bit 625 I 1 IO_R16
+bit 624 O 1 IO_R16 623 1 Z
+bit 623 C 1 *
+bit 622 I 1 CCLK_T15
+bit 621 O 1 CCLK_T15 620 1 Z
+bit 620 C 1 *
+bit 619 I 1 DONE_R14
+bit 618 O 1 DONE_R14 617 1 Z
+bit 617 C 1 *
+bit 616 I 1 IO_P13
+bit 615 O 1 IO_P13 614 1 Z
+bit 614 C 1 *
+bit 613 I 1 IO_R13
+bit 612 O 1 IO_R13 611 1 Z
+bit 611 C 1 *
+bit 610 I 1 IO_T13
+bit 609 O 1 IO_T13 608 1 Z
+bit 608 C 1 *
+bit 607 O 1 *
+bit 606 O 1 *
+bit 605 O 1 *
+bit 604 O 1 *
+bit 603 O 1 *
+bit 602 O 1 *
+bit 601 O 1 *
+bit 600 O 1 *
+bit 599 O 1 *
+bit 598 O 1 *
+bit 597 O 1 *
+bit 596 O 1 *
+bit 595 O 1 *
+bit 594 O 1 *
+bit 593 O 1 *
+bit 592 O 1 *
+bit 591 O 1 *
+bit 590 O 1 *
+bit 589 O 1 *
+bit 588 O 1 *
+bit 587 O 1 *
+bit 586 O 1 *
+bit 585 O 1 *
+bit 584 O 1 *
+bit 583 O 1 *
+bit 582 O 1 *
+bit 581 O 1 *
+bit 580 O 1 *
+bit 579 O 1 *
+bit 578 O 1 *
+bit 577 I 1 IO_T14
+bit 576 O 1 IO_T14 575 1 Z
+bit 575 C 1 *
+bit 574 O 1 *
+bit 573 O 1 *
+bit 572 O 1 *
+bit 571 I 1 IO_N12
+bit 570 O 1 IO_N12 569 1 Z
+bit 569 C 1 *
+bit 568 O 1 *
+bit 567 O 1 *
+bit 566 O 1 *
+bit 565 O 1 *
+bit 564 O 1 *
+bit 563 O 1 *
+bit 562 I 1 IO_P12
+bit 561 O 1 IO_P12 560 1 Z
+bit 560 C 1 *
+bit 559 I 1 IO_R12
+bit 558 O 1 IO_R12 557 1 Z
+bit 557 C 1 *
+bit 556 I 1 IO_T12
+bit 555 O 1 IO_T12 554 1 Z
+bit 554 C 1 *
+bit 553 I 1 IO_M11
+bit 552 O 1 IO_M11 551 1 Z
+bit 551 C 1 *
+bit 550 I 1 IO_N11
+bit 549 O 1 IO_N11 548 1 Z
+bit 548 C 1 *
+bit 547 I 1 IO_P11
+bit 546 O 1 IO_P11 545 1 Z
+bit 545 C 1 *
+bit 544 I 1 IO_R11
+bit 543 O 1 IO_R11 542 1 Z
+bit 542 C 1 *
+bit 541 O 1 *
+bit 540 O 1 *
+bit 539 O 1 *
+bit 538 I 1 IO_M10
+bit 537 O 1 IO_M10 536 1 Z
+bit 536 C 1 *
+bit 535 I 1 IO_N10
+bit 534 O 1 IO_N10 533 1 Z
+bit 533 C 1 *
+bit 532 I 1 IO_P10
+bit 531 O 1 IO_P10 530 1 Z
+bit 530 C 1 *
+bit 529 I 1 IO_R10
+bit 528 O 1 IO_R10 527 1 Z
+bit 527 C 1 *
+bit 526 I 1 IO_T10
+bit 525 O 1 IO_T10 524 1 Z
+bit 524 C 1 *
+bit 523 I 1 IO_N9
+bit 522 O 1 IO_N9 521 1 Z
+bit 521 C 1 *
+bit 520 I 1 IO_P9
+bit 519 O 1 IO_P9 518 1 Z
+bit 518 C 1 *
+bit 517 I 1 IO_R9
+bit 516 O 1 IO_R9 515 1 Z
+bit 515 C 1 *
+bit 514 I 1 IO_T9
+bit 513 O 1 IO_T9 512 1 Z
+bit 512 C 1 *
+bit 511 I 1 IO_T8
+bit 510 O 1 IO_T8 509 1 Z
+bit 509 C 1 *
+bit 508 I 1 IO_P8
+bit 507 O 1 IO_P8 506 1 Z
+bit 506 C 1 *
+bit 505 I 1 IO_N8
+bit 504 O 1 IO_N8 503 1 Z
+bit 503 C 1 *
+bit 502 I 1 IO_T7
+bit 501 O 1 IO_T7 500 1 Z
+bit 500 C 1 *
+bit 499 I 1 IO_R7
+bit 498 O 1 IO_R7 497 1 Z
+bit 497 C 1 *
+bit 496 I 1 IO_P7
+bit 495 O 1 IO_P7 494 1 Z
+bit 494 C 1 *
+bit 493 I 1 IO_N7
+bit 492 O 1 IO_N7 491 1 Z
+bit 491 C 1 *
+bit 490 I 1 IO_M7
+bit 489 O 1 IO_M7 488 1 Z
+bit 488 C 1 *
+bit 487 I 1 IO_R6
+bit 486 O 1 IO_R6 485 1 Z
+bit 485 C 1 *
+bit 484 I 1 IO_P6
+bit 483 O 1 IO_P6 482 1 Z
+bit 482 C 1 *
+bit 481 I 1 IO_N5
+bit 480 O 1 IO_N5 479 1 Z
+bit 479 C 1 *
+bit 478 I 1 IO_N6
+bit 477 O 1 IO_N6 476 1 Z
+bit 476 C 1 *
+bit 475 I 1 IO_M6
+bit 474 O 1 IO_M6 473 1 Z
+bit 473 C 1 *
+bit 472 I 1 IO_R5
+bit 471 O 1 IO_R5 470 1 Z
+bit 470 C 1 *
+bit 469 I 1 IO_P5
+bit 468 O 1 IO_P5 467 1 Z
+bit 467 C 1 *
+bit 466 I 1 IO_T5
+bit 465 O 1 IO_T5 464 1 Z
+bit 464 C 1 *
+bit 463 O 1 *
+bit 462 O 1 *
+bit 461 O 1 *
+bit 460 O 1 *
+bit 459 O 1 *
+bit 458 O 1 *
+bit 457 O 1 *
+bit 456 O 1 *
+bit 455 O 1 *
+bit 454 O 1 *
+bit 453 O 1 *
+bit 452 O 1 *
+bit 451 O 1 *
+bit 450 O 1 *
+bit 449 O 1 *
+bit 448 O 1 *
+bit 447 O 1 *
+bit 446 O 1 *
+bit 445 O 1 *
+bit 444 O 1 *
+bit 443 O 1 *
+bit 442 O 1 *
+bit 441 O 1 *
+bit 440 O 1 *
+bit 439 O 1 *
+bit 438 O 1 *
+bit 437 O 1 *
+bit 436 O 1 *
+bit 435 O 1 *
+bit 434 O 1 *
+bit 433 I 1 IO_T4
+bit 432 O 1 IO_T4 431 1 Z
+bit 431 C 1 *
+bit 430 I 1 IO_R4
+bit 429 O 1 IO_R4 428 1 Z
+bit 428 C 1 *
+bit 427 O 1 *
+bit 426 O 1 *
+bit 425 O 1 *
+bit 424 O 1 *
+bit 423 O 1 *
+bit 422 O 1 *
+bit 421 O 1 *
+bit 420 O 1 *
+bit 419 O 1 *
+bit 418 O 1 *
+bit 417 O 1 *
+bit 416 O 1 *
+bit 415 O 1 *
+bit 414 O 1 *
+bit 413 O 1 *
+bit 412 I 1 IO_T3
+bit 411 O 1 IO_T3 410 1 Z
+bit 410 C 1 *
+bit 409 I 1 IO_R3
+bit 408 O 1 IO_R3 407 1 Z
+bit 407 C 1 *
+bit 406 I 1 M2_P4
+bit 405 I 1 M0_P3
+bit 404 I 1 M1_T2
+bit 403 I 1 IO_R1
+bit 402 O 1 IO_R1 401 1 Z
+bit 401 C 1 *
+bit 400 I 1 IO_P1
+bit 399 O 1 IO_P1 398 1 Z
+bit 398 C 1 *
+bit 397 O 1 *
+bit 396 O 1 *
+bit 395 O 1 *
+bit 394 O 1 *
+bit 393 O 1 *
+bit 392 O 1 *
+bit 391 I 1 IO_P2
+bit 390 O 1 IO_P2 389 1 Z
+bit 389 C 1 *
+bit 388 I 1 IO_N3
+bit 387 O 1 IO_N3 386 1 Z
+bit 386 C 1 *
+bit 385 I 1 IO_N2
+bit 384 O 1 IO_N2 383 1 Z
+bit 383 C 1 *
+bit 382 I 1 IO_N1
+bit 381 O 1 IO_N1 380 1 Z
+bit 380 C 1 *
+bit 379 I 1 IO_M4
+bit 378 O 1 IO_M4 377 1 Z
+bit 377 C 1 *
+bit 376 I 1 IO_M3
+bit 375 O 1 IO_M3 374 1 Z
+bit 374 C 1 *
+bit 373 I 1 IO_M2
+bit 372 O 1 IO_M2 371 1 Z
+bit 371 C 1 *
+bit 370 I 1 IO_M1
+bit 369 O 1 IO_M1 368 1 Z
+bit 368 C 1 *
+bit 367 I 1 IO_L5
+bit 366 O 1 IO_L5 365 1 Z
+bit 365 C 1 *
+bit 364 I 1 IO_L4
+bit 363 O 1 IO_L4 362 1 Z
+bit 362 C 1 *
+bit 361 I 1 IO_L3
+bit 360 O 1 IO_L3 359 1 Z
+bit 359 C 1 *
+bit 358 I 1 IO_L2
+bit 357 O 1 IO_L2 356 1 Z
+bit 356 C 1 *
+bit 355 I 1 IO_K5
+bit 354 O 1 IO_K5 353 1 Z
+bit 353 C 1 *
+bit 352 I 1 IO_K4
+bit 351 O 1 IO_K4 350 1 Z
+bit 350 C 1 *
+bit 349 I 1 IO_K3
+bit 348 O 1 IO_K3 347 1 Z
+bit 347 C 1 *
+bit 346 I 1 IO_K2
+bit 345 O 1 IO_K2 344 1 Z
+bit 344 C 1 *
+bit 343 O 1 *
+bit 342 O 1 *
+bit 341 O 1 *
+bit 340 O 1 *
+bit 339 O 1 *
+bit 338 O 1 *
+bit 337 O 1 *
+bit 336 O 1 *
+bit 335 O 1 *
+bit 334 O 1 *
+bit 333 O 1 *
+bit 332 O 1 *
+bit 331 O 1 *
+bit 330 O 1 *
+bit 329 O 1 *
+bit 328 O 1 *
+bit 327 O 1 *
+bit 326 O 1 *
+bit 325 O 1 *
+bit 324 O 1 *
+bit 323 O 1 *
+bit 322 I 1 IO_K1
+bit 321 O 1 IO_K1 320 1 Z
+bit 320 C 1 *
+bit 319 I 1 IO_J4
+bit 318 O 1 IO_J4 317 1 Z
+bit 317 C 1 *
+bit 316 I 1 IO_J3
+bit 315 O 1 IO_J3 314 1 Z
+bit 314 C 1 *
+bit 313 I 1 IO_J2
+bit 312 O 1 IO_J2 311 1 Z
+bit 311 C 1 *
+bit 310 I 1 IO_J1
+bit 309 O 1 IO_J1 308 1 Z
+bit 308 C 1 *
+bit 307 I 1 IO_H1
+bit 306 O 1 IO_H1 305 1 Z
+bit 305 C 1 *
+bit 304 I 1 IO_G1
+bit 303 O 1 IO_G1 302 1 Z
+bit 302 C 1 *
+bit 301 I 1 IO_H3
+bit 300 O 1 IO_H3 299 1 Z
+bit 299 C 1 *
+bit 298 I 1 IO_H4
+bit 297 O 1 IO_H4 296 1 Z
+bit 296 C 1 *
+bit 295 I 1 IO_G2
+bit 294 O 1 IO_G2 293 1 Z
+bit 293 C 1 *
+bit 292 O 1 *
+bit 291 O 1 *
+bit 290 O 1 *
+bit 289 O 1 *
+bit 288 O 1 *
+bit 287 O 1 *
+bit 286 O 1 *
+bit 285 O 1 *
+bit 284 O 1 *
+bit 283 O 1 *
+bit 282 O 1 *
+bit 281 O 1 *
+bit 280 O 1 *
+bit 279 O 1 *
+bit 278 O 1 *
+bit 277 O 1 *
+bit 276 O 1 *
+bit 275 O 1 *
+bit 274 O 1 *
+bit 273 O 1 *
+bit 272 O 1 *
+bit 271 I 1 IO_G3
+bit 270 O 1 IO_G3 269 1 Z
+bit 269 C 1 *
+bit 268 I 1 IO_G4
+bit 267 O 1 IO_G4 266 1 Z
+bit 266 C 1 *
+bit 265 I 1 IO_G5
+bit 264 O 1 IO_G5 263 1 Z
+bit 263 C 1 *
+bit 262 I 1 IO_F5
+bit 261 O 1 IO_F5 260 1 Z
+bit 260 C 1 *
+bit 259 I 1 IO_F2
+bit 258 O 1 IO_F2 257 1 Z
+bit 257 C 1 *
+bit 256 I 1 IO_F3
+bit 255 O 1 IO_F3 254 1 Z
+bit 254 C 1 *
+bit 253 I 1 IO_F4
+bit 252 O 1 IO_F4 251 1 Z
+bit 251 C 1 *
+bit 250 I 1 IO_E4
+bit 249 O 1 IO_E4 248 1 Z
+bit 248 C 1 *
+bit 247 I 1 IO_E1
+bit 246 O 1 IO_E1 245 1 Z
+bit 245 C 1 *
+bit 244 I 1 IO_E2
+bit 243 O 1 IO_E2 242 1 Z
+bit 242 C 1 *
+bit 241 I 1 IO_E3
+bit 240 O 1 IO_E3 239 1 Z
+bit 239 C 1 *
+bit 238 I 1 IO_D3
+bit 237 O 1 IO_D3 236 1 Z
+bit 236 C 1 *
+bit 235 I 1 IO_D1
+bit 234 O 1 IO_D1 233 1 Z
+bit 233 C 1 *
+bit 232 I 1 IO_D2
+bit 231 O 1 IO_D2 230 1 Z
+bit 230 C 1 *
+bit 229 I 1 IO_C2
+bit 228 O 1 IO_C2 227 1 Z
+bit 227 C 1 *
+bit 226 I 1 IO_C3
+bit 225 O 1 IO_C3 224 1 Z
+bit 224 C 1 *
+bit 223 O 1 *
+bit 222 O 1 *
+bit 221 O 1 *
+bit 220 O 1 *
+bit 219 O 1 *
+bit 218 O 1 *
+bit 217 I 1 IO_C1
+bit 216 O 1 IO_C1 215 1 Z
+bit 215 C 1 *
+bit 214 I 1 IO_B1
+bit 213 O 1 IO_B1 212 1 Z
+bit 212 C 1 *
+bit 211 O 1 *
+bit 210 I 1 HSWAP_EN_C4
+bit 209 I 1 IO_A3
+bit 208 O 1 IO_A3 207 1 Z
+bit 207 C 1 *
+bit 206 I 1 IO_B4
+bit 205 O 1 IO_B4 204 1 Z
+bit 204 C 1 *
+bit 203 I 1 IO_A4
+bit 202 O 1 IO_A4 201 1 Z
+bit 201 C 1 *
+bit 200 O 1 *
+bit 199 O 1 *
+bit 198 O 1 *
+bit 197 O 1 *
+bit 196 O 1 *
+bit 195 O 1 *
+bit 194 O 1 *
+bit 193 O 1 *
+bit 192 O 1 *
+bit 191 O 1 *
+bit 190 O 1 *
+bit 189 O 1 *
+bit 188 O 1 *
+bit 187 O 1 *
+bit 186 O 1 *
+bit 185 O 1 *
+bit 184 O 1 *
+bit 183 O 1 *
+bit 182 O 1 *
+bit 181 O 1 *
+bit 180 O 1 *
+bit 179 O 1 *
+bit 178 O 1 *
+bit 177 O 1 *
+bit 176 O 1 *
+bit 175 O 1 *
+bit 174 O 1 *
+bit 173 O 1 *
+bit 172 O 1 *
+bit 171 O 1 *
+bit 170 O 1 *
+bit 169 O 1 *
+bit 168 O 1 *
+bit 167 O 1 *
+bit 166 O 1 *
+bit 165 O 1 *
+bit 164 I 1 IO_D5
+bit 163 O 1 IO_D5 162 1 Z
+bit 162 C 1 *
+bit 161 O 1 *
+bit 160 O 1 *
+bit 159 O 1 *
+bit 158 O 1 *
+bit 157 O 1 *
+bit 156 O 1 *
+bit 155 I 1 IO_C5
+bit 154 O 1 IO_C5 153 1 Z
+bit 153 C 1 *
+bit 152 I 1 IO_B5
+bit 151 O 1 IO_B5 150 1 Z
+bit 150 C 1 *
+bit 149 I 1 IO_A5
+bit 148 O 1 IO_A5 147 1 Z
+bit 147 C 1 *
+bit 146 I 1 IO_E6
+bit 145 O 1 IO_E6 144 1 Z
+bit 144 C 1 *
+bit 143 I 1 IO_D6
+bit 142 O 1 IO_D6 141 1 Z
+bit 141 C 1 *
+bit 140 I 1 IO_C6
+bit 139 O 1 IO_C6 138 1 Z
+bit 138 C 1 *
+bit 137 I 1 IO_B6
+bit 136 O 1 IO_B6 135 1 Z
+bit 135 C 1 *
+bit 134 O 1 *
+bit 133 O 1 *
+bit 132 O 1 *
+bit 131 I 1 IO_E7
+bit 130 O 1 IO_E7 129 1 Z
+bit 129 C 1 *
+bit 128 I 1 IO_D7
+bit 127 O 1 IO_D7 126 1 Z
+bit 126 C 1 *
+bit 125 I 1 IO_C7
+bit 124 O 1 IO_C7 123 1 Z
+bit 123 C 1 *
+bit 122 I 1 IO_B7
+bit 121 O 1 IO_B7 120 1 Z
+bit 120 C 1 *
+bit 119 I 1 IO_A7
+bit 118 O 1 IO_A7 117 1 Z
+bit 117 C 1 *
+bit 116 I 1 IO_D8
+bit 115 O 1 IO_D8 114 1 Z
+bit 114 C 1 *
+bit 113 I 1 IO_C8
+bit 112 O 1 IO_C8 111 1 Z
+bit 111 C 1 *
+bit 110 I 1 IO_B8
+bit 109 O 1 IO_B8 108 1 Z
+bit 108 C 1 *
+bit 107 I 1 IO_A8
+bit 106 O 1 IO_A8 105 1 Z
+bit 105 C 1 *
+bit 104 I 1 IO_A9
+bit 103 O 1 IO_A9 102 1 Z
+bit 102 C 1 *
+bit 101 I 1 IO_C9
+bit 100 O 1 IO_C9 99 1 Z
+bit 99 C 1 *
+bit 98 I 1 IO_D9
+bit 97 O 1 IO_D9 96 1 Z
+bit 96 C 1 *
+bit 95 I 1 IO_A10
+bit 94 O 1 IO_A10 93 1 Z
+bit 93 C 1 *
+bit 92 I 1 IO_B10
+bit 91 O 1 IO_B10 90 1 Z
+bit 90 C 1 *
+bit 89 I 1 IO_C10
+bit 88 O 1 IO_C10 87 1 Z
+bit 87 C 1 *
+bit 86 I 1 IO_D10
+bit 85 O 1 IO_D10 84 1 Z
+bit 84 C 1 *
+bit 83 I 1 IO_E10
+bit 82 O 1 IO_E10 81 1 Z
+bit 81 C 1 *
+bit 80 I 1 IO_B11
+bit 79 O 1 IO_B11 78 1 Z
+bit 78 C 1 *
+bit 77 I 1 IO_C11
+bit 76 O 1 IO_C11 75 1 Z
+bit 75 C 1 *
+bit 74 I 1 IO_D12
+bit 73 O 1 IO_D12 72 1 Z
+bit 72 C 1 *
+bit 71 I 1 IO_D11
+bit 70 O 1 IO_D11 69 1 Z
+bit 69 C 1 *
+bit 68 I 1 IO_E11
+bit 67 O 1 IO_E11 66 1 Z
+bit 66 C 1 *
+bit 65 I 1 IO_B12
+bit 64 O 1 IO_B12 63 1 Z
+bit 63 C 1 *
+bit 62 I 1 IO_C12
+bit 61 O 1 IO_C12 60 1 Z
+bit 60 C 1 *
+bit 59 I 1 IO_A12
+bit 58 O 1 IO_A12 57 1 Z
+bit 57 C 1 *
+bit 56 O 1 *
+bit 55 O 1 *
+bit 54 O 1 *
+bit 53 O 1 *
+bit 52 O 1 *
+bit 51 O 1 *
+bit 50 O 1 *
+bit 49 O 1 *
+bit 48 O 1 *
+bit 47 O 1 *
+bit 46 O 1 *
+bit 45 O 1 *
+bit 44 O 1 *
+bit 43 O 1 *
+bit 42 O 1 *
+bit 41 O 1 *
+bit 40 O 1 *
+bit 39 O 1 *
+bit 38 O 1 *
+bit 37 O 1 *
+bit 36 O 1 *
+bit 35 O 1 *
+bit 34 O 1 *
+bit 33 O 1 *
+bit 32 O 1 *
+bit 31 O 1 *
+bit 30 O 1 *
+bit 29 O 1 *
+bit 28 O 1 *
+bit 27 O 1 *
+bit 26 I 1 IO_A13
+bit 25 O 1 IO_A13 24 1 Z
+bit 24 C 1 *
+bit 23 I 1 IO_B13
+bit 22 O 1 IO_B13 21 1 Z
+bit 21 C 1 *
+bit 20 O 1 *
+bit 19 O 1 *
+bit 18 O 1 *
+bit 17 O 1 *
+bit 16 O 1 *
+bit 15 O 1 *
+bit 14 O 1 *
+bit 13 O 1 *
+bit 12 O 1 *
+bit 11 O 1 *
+bit 10 O 1 *
+bit 9 O 1 *
+bit 8 O 1 *
+bit 7 O 1 *
+bit 6 O 1 *
+bit 5 I 1 IO_A14
+bit 4 O 1 IO_A14 3 1 Z
+bit 3 C 1 *
+bit 2 I 1 IO_B14
+bit 1 O 1 IO_B14 0 1 Z
+bit 0 C 1 *
--- /dev/null
+signal GND1
+signal GND2
+signal GND3
+signal GND4
+signal GND5
+signal GND6
+signal GND7
+signal GND8
+signal GND9
+signal GND10
+signal GND11
+signal GND12
+signal GND13
+signal GND14
+signal GND15
+signal GND16
+signal GND17
+signal GND18
+signal GND19
+signal GND20
+signal GND21
+signal GND22
+signal GND23
+signal GND24
+signal GND25
+signal GND26
+signal GND27
+signal GND28
+signal CCLK_P104
+signal DONE_P103
+signal HSWAP_EN_P206
+signal M0_P55
+signal M1_P54
+signal M2_P56
+signal PROG_B
+signal TCK
+signal TDI
+signal TDO
+signal TMS
+signal VCCAUX1
+signal VCCAUX2
+signal VCCAUX3
+signal VCCAUX4
+signal VCCAUX5
+signal VCCAUX6
+signal VCCAUX7
+signal VCCAUX8
+signal VCCINT1
+signal VCCINT2
+signal VCCINT3
+signal VCCINT4
+signal VCCO01
+signal VCCO02
+signal VCCO11
+signal VCCO12
+signal VCCO21
+signal VCCO22
+signal VCCO31
+signal VCCO32
+signal VCCO41
+signal VCCO42
+signal VCCO51
+signal VCCO52
+signal VCCO61
+signal VCCO62
+signal VCCO71
+signal VCCO72
+signal IO_P2
+signal IO_P3
+signal IO_P4
+signal IO_P5
+signal IO_P7
+signal IO_P9
+signal IO_P10
+signal IO_P11
+signal IO_P12
+signal IO_P13
+signal IO_P15
+signal IO_P16
+signal IO_P18
+signal IO_P19
+signal IO_P20
+signal IO_P21
+signal IO_P22
+signal IO_P24
+signal IO_P26
+signal IO_P27
+signal IO_P28
+signal IO_P29
+signal IO_P31
+signal IO_P33
+signal IO_P34
+signal IO_P35
+signal IO_P36
+signal IO_P37
+signal IO_P39
+signal IO_P40
+signal IO_P42
+signal IO_P43
+signal IO_P44
+signal IO_P45
+signal IO_P46
+signal IO_P48
+signal IO_P50
+signal IO_P51
+signal IO_P52
+signal IO_P57
+signal IO_P58
+signal IO_P61
+signal IO_P62
+signal IO_P63
+signal IO_P64
+signal IO_P65
+signal IO_P67
+signal IO_P68
+signal IO_P71
+signal IO_P72
+signal IO_P74
+signal IO_P76
+signal IO_P77
+signal IO_P78
+signal IO_P79
+signal IO_P80
+signal IO_P81
+signal IO_P83
+signal IO_P85
+signal IO_P86
+signal IO_P87
+signal IO_P90
+signal IO_P92
+signal IO_P93
+signal IO_P94
+signal IO_P95
+signal IO_P96
+signal IO_P97
+signal IO_P100
+signal IO_P101
+signal IO_P102
+signal IO_P106
+signal IO_P107
+signal IO_P108
+signal IO_P109
+signal IO_P111
+signal IO_P113
+signal IO_P114
+signal IO_P115
+signal IO_P116
+signal IO_P117
+signal IO_P119
+signal IO_P120
+signal IO_P122
+signal IO_P123
+signal IO_P124
+signal IO_P125
+signal IO_P126
+signal IO_P128
+signal IO_P130
+signal IO_P131
+signal IO_P132
+signal IO_P133
+signal IO_P135
+signal IO_P137
+signal IO_P138
+signal IO_P139
+signal IO_P140
+signal IO_P141
+signal IO_P143
+signal IO_P144
+signal IO_P146
+signal IO_P147
+signal IO_P148
+signal IO_P149
+signal IO_P150
+signal IO_P152
+signal IO_P154
+signal IO_P155
+signal IO_P156
+signal IO_P161
+signal IO_P162
+signal IO_P165
+signal IO_P166
+signal IO_P167
+signal IO_P168
+signal IO_P169
+signal IO_P171
+signal IO_P172
+signal IO_P175
+signal IO_P176
+signal IO_P178
+signal IO_P180
+signal IO_P181
+signal IO_P182
+signal IO_P183
+signal IO_P184
+signal IO_P185
+signal IO_P187
+signal IO_P189
+signal IO_P190
+signal IO_P191
+signal IO_P194
+signal IO_P196
+signal IO_P197
+signal IO_P198
+signal IO_P199
+signal IO_P200
+signal IO_P203
+signal IO_P204
+
+register BSR 815
+register BR 1
+register DIR 32
+
+instruction length 6
+
+instruction EXTEST 000000 BSR
+instruction SAMPLE/PRELOAD 000001 BSR
+instruction IDCODE 001001 DIR
+instruction BYPASS 111111 BR
+
+bit 814 I 1 IO_P156
+bit 813 O 1 IO_P156 812 1 Z
+bit 812 C 1 *
+bit 811 I 1 IO_P155
+bit 810 O 1 IO_P155 809 1 Z
+bit 809 C 1 *
+bit 808 O 1 *
+bit 807 O 1 *
+bit 806 O 1 *
+bit 805 O 1 *
+bit 804 O 1 *
+bit 803 O 1 *
+bit 802 O 1 *
+bit 801 O 1 *
+bit 800 O 1 *
+bit 799 O 1 *
+bit 798 O 1 *
+bit 797 O 1 *
+bit 796 O 1 *
+bit 795 O 1 *
+bit 794 O 1 *
+bit 793 I 1 IO_P154
+bit 792 O 1 IO_P154 791 1 Z
+bit 791 C 1 *
+bit 790 I 1 IO_P152
+bit 789 O 1 IO_P152 788 1 Z
+bit 788 C 1 *
+bit 787 I 1 IO_P150
+bit 786 O 1 IO_P150 785 1 Z
+bit 785 C 1 *
+bit 784 I 1 IO_P149
+bit 783 O 1 IO_P149 782 1 Z
+bit 782 C 1 *
+bit 781 I 1 IO_P148
+bit 780 O 1 IO_P148 779 1 Z
+bit 779 C 1 *
+bit 778 I 1 IO_P147
+bit 777 O 1 IO_P147 776 1 Z
+bit 776 C 1 *
+bit 775 I 1 IO_P146
+bit 774 O 1 IO_P146 773 1 Z
+bit 773 C 1 *
+bit 772 I 1 IO_P144
+bit 771 O 1 IO_P144 770 1 Z
+bit 770 C 1 *
+bit 769 I 1 IO_P143
+bit 768 O 1 IO_P143 767 1 Z
+bit 767 C 1 *
+bit 766 I 1 IO_P141
+bit 765 O 1 IO_P141 764 1 Z
+bit 764 C 1 *
+bit 763 I 1 IO_P140
+bit 762 O 1 IO_P140 761 1 Z
+bit 761 C 1 *
+bit 760 I 1 IO_P139
+bit 759 O 1 IO_P139 758 1 Z
+bit 758 C 1 *
+bit 757 I 1 IO_P138
+bit 756 O 1 IO_P138 755 1 Z
+bit 755 C 1 *
+bit 754 O 1 *
+bit 753 O 1 *
+bit 752 O 1 *
+bit 751 O 1 *
+bit 750 O 1 *
+bit 749 O 1 *
+bit 748 O 1 *
+bit 747 O 1 *
+bit 746 O 1 *
+bit 745 O 1 *
+bit 744 O 1 *
+bit 743 O 1 *
+bit 742 O 1 *
+bit 741 O 1 *
+bit 740 O 1 *
+bit 739 O 1 *
+bit 738 O 1 *
+bit 737 O 1 *
+bit 736 O 1 *
+bit 735 O 1 *
+bit 734 O 1 *
+bit 733 O 1 *
+bit 732 O 1 *
+bit 731 O 1 *
+bit 730 I 1 IO_P137
+bit 729 O 1 IO_P137 728 1 Z
+bit 728 C 1 *
+bit 727 I 1 IO_P135
+bit 726 O 1 IO_P135 725 1 Z
+bit 725 C 1 *
+bit 724 I 1 IO_P133
+bit 723 O 1 IO_P133 722 1 Z
+bit 722 C 1 *
+bit 721 I 1 IO_P132
+bit 720 O 1 IO_P132 719 1 Z
+bit 719 C 1 *
+bit 718 I 1 IO_P131
+bit 717 O 1 IO_P131 716 1 Z
+bit 716 C 1 *
+bit 715 I 1 IO_P130
+bit 714 O 1 IO_P130 713 1 Z
+bit 713 C 1 *
+bit 712 I 1 IO_P128
+bit 711 O 1 IO_P128 710 1 Z
+bit 710 C 1 *
+bit 709 I 1 IO_P126
+bit 708 O 1 IO_P126 707 1 Z
+bit 707 C 1 *
+bit 706 O 1 *
+bit 705 O 1 *
+bit 704 O 1 *
+bit 703 O 1 *
+bit 702 O 1 *
+bit 701 O 1 *
+bit 700 O 1 *
+bit 699 O 1 *
+bit 698 O 1 *
+bit 697 O 1 *
+bit 696 O 1 *
+bit 695 O 1 *
+bit 694 O 1 *
+bit 693 O 1 *
+bit 692 O 1 *
+bit 691 O 1 *
+bit 690 O 1 *
+bit 689 O 1 *
+bit 688 O 1 *
+bit 687 O 1 *
+bit 686 O 1 *
+bit 685 O 1 *
+bit 684 O 1 *
+bit 683 O 1 *
+bit 682 I 1 IO_P125
+bit 681 O 1 IO_P125 680 1 Z
+bit 680 C 1 *
+bit 679 I 1 IO_P124
+bit 678 O 1 IO_P124 677 1 Z
+bit 677 C 1 *
+bit 676 I 1 IO_P123
+bit 675 O 1 IO_P123 674 1 Z
+bit 674 C 1 *
+bit 673 I 1 IO_P122
+bit 672 O 1 IO_P122 671 1 Z
+bit 671 C 1 *
+bit 670 I 1 IO_P120
+bit 669 O 1 IO_P120 668 1 Z
+bit 668 C 1 *
+bit 667 I 1 IO_P119
+bit 666 O 1 IO_P119 665 1 Z
+bit 665 C 1 *
+bit 664 I 1 IO_P117
+bit 663 O 1 IO_P117 662 1 Z
+bit 662 C 1 *
+bit 661 I 1 IO_P116
+bit 660 O 1 IO_P116 659 1 Z
+bit 659 C 1 *
+bit 658 I 1 IO_P115
+bit 657 O 1 IO_P115 656 1 Z
+bit 656 C 1 *
+bit 655 I 1 IO_P114
+bit 654 O 1 IO_P114 653 1 Z
+bit 653 C 1 *
+bit 652 I 1 IO_P113
+bit 651 O 1 IO_P113 650 1 Z
+bit 650 C 1 *
+bit 649 I 1 IO_P111
+bit 648 O 1 IO_P111 647 1 Z
+bit 647 C 1 *
+bit 646 I 1 IO_P109
+bit 645 O 1 IO_P109 644 1 Z
+bit 644 C 1 *
+bit 643 I 1 IO_P108
+bit 642 O 1 IO_P108 641 1 Z
+bit 641 C 1 *
+bit 640 O 1 *
+bit 639 O 1 *
+bit 638 O 1 *
+bit 637 O 1 *
+bit 636 O 1 *
+bit 635 O 1 *
+bit 634 O 1 *
+bit 633 O 1 *
+bit 632 O 1 *
+bit 631 O 1 *
+bit 630 O 1 *
+bit 629 O 1 *
+bit 628 I 1 IO_P107
+bit 627 O 1 IO_P107 626 1 Z
+bit 626 C 1 *
+bit 625 I 1 IO_P106
+bit 624 O 1 IO_P106 623 1 Z
+bit 623 C 1 *
+bit 622 I 1 CCLK_P104
+bit 621 O 1 CCLK_P104 620 1 Z
+bit 620 C 1 *
+bit 619 I 1 DONE_P103
+bit 618 O 1 DONE_P103 617 1 Z
+bit 617 C 1 *
+bit 616 I 1 IO_P102
+bit 615 O 1 IO_P102 614 1 Z
+bit 614 C 1 *
+bit 613 I 1 IO_P101
+bit 612 O 1 IO_P101 611 1 Z
+bit 611 C 1 *
+bit 610 I 1 IO_P100
+bit 609 O 1 IO_P100 608 1 Z
+bit 608 C 1 *
+bit 607 O 1 *
+bit 606 O 1 *
+bit 605 O 1 *
+bit 604 O 1 *
+bit 603 O 1 *
+bit 602 O 1 *
+bit 601 O 1 *
+bit 600 O 1 *
+bit 599 O 1 *
+bit 598 O 1 *
+bit 597 O 1 *
+bit 596 O 1 *
+bit 595 O 1 *
+bit 594 O 1 *
+bit 593 O 1 *
+bit 592 O 1 *
+bit 591 O 1 *
+bit 590 O 1 *
+bit 589 O 1 *
+bit 588 O 1 *
+bit 587 O 1 *
+bit 586 O 1 *
+bit 585 O 1 *
+bit 584 O 1 *
+bit 583 O 1 *
+bit 582 O 1 *
+bit 581 O 1 *
+bit 580 O 1 *
+bit 579 O 1 *
+bit 578 O 1 *
+bit 577 I 1 IO_P97
+bit 576 O 1 IO_P97 575 1 Z
+bit 575 C 1 *
+bit 574 O 1 *
+bit 573 O 1 *
+bit 572 O 1 *
+bit 571 I 1 IO_P96
+bit 570 O 1 IO_P96 569 1 Z
+bit 569 C 1 *
+bit 568 O 1 *
+bit 567 O 1 *
+bit 566 O 1 *
+bit 565 O 1 *
+bit 564 O 1 *
+bit 563 O 1 *
+bit 562 I 1 IO_P95
+bit 561 O 1 IO_P95 560 1 Z
+bit 560 C 1 *
+bit 559 I 1 IO_P94
+bit 558 O 1 IO_P94 557 1 Z
+bit 557 C 1 *
+bit 556 I 1 IO_P93
+bit 555 O 1 IO_P93 554 1 Z
+bit 554 C 1 *
+bit 553 I 1 IO_P92
+bit 552 O 1 IO_P92 551 1 Z
+bit 551 C 1 *
+bit 550 I 1 IO_P90
+bit 549 O 1 IO_P90 548 1 Z
+bit 548 C 1 *
+bit 547 O 1 *
+bit 546 O 1 *
+bit 545 O 1 *
+bit 544 O 1 *
+bit 543 O 1 *
+bit 542 O 1 *
+bit 541 O 1 *
+bit 540 O 1 *
+bit 539 O 1 *
+bit 538 O 1 *
+bit 537 O 1 *
+bit 536 O 1 *
+bit 535 O 1 *
+bit 534 O 1 *
+bit 533 O 1 *
+bit 532 I 1 IO_P87
+bit 531 O 1 IO_P87 530 1 Z
+bit 530 C 1 *
+bit 529 I 1 IO_P86
+bit 528 O 1 IO_P86 527 1 Z
+bit 527 C 1 *
+bit 526 I 1 IO_P85
+bit 525 O 1 IO_P85 524 1 Z
+bit 524 C 1 *
+bit 523 I 1 IO_P83
+bit 522 O 1 IO_P83 521 1 Z
+bit 521 C 1 *
+bit 520 I 1 IO_P81
+bit 519 O 1 IO_P81 518 1 Z
+bit 518 C 1 *
+bit 517 I 1 IO_P80
+bit 516 O 1 IO_P80 515 1 Z
+bit 515 C 1 *
+bit 514 I 1 IO_P79
+bit 513 O 1 IO_P79 512 1 Z
+bit 512 C 1 *
+bit 511 I 1 IO_P78
+bit 510 O 1 IO_P78 509 1 Z
+bit 509 C 1 *
+bit 508 I 1 IO_P77
+bit 507 O 1 IO_P77 506 1 Z
+bit 506 C 1 *
+bit 505 I 1 IO_P76
+bit 504 O 1 IO_P76 503 1 Z
+bit 503 C 1 *
+bit 502 I 1 IO_P74
+bit 501 O 1 IO_P74 500 1 Z
+bit 500 C 1 *
+bit 499 I 1 IO_P72
+bit 498 O 1 IO_P72 497 1 Z
+bit 497 C 1 *
+bit 496 I 1 IO_P71
+bit 495 O 1 IO_P71 494 1 Z
+bit 494 C 1 *
+bit 493 O 1 *
+bit 492 O 1 *
+bit 491 O 1 *
+bit 490 O 1 *
+bit 489 O 1 *
+bit 488 O 1 *
+bit 487 O 1 *
+bit 486 O 1 *
+bit 485 O 1 *
+bit 484 O 1 *
+bit 483 O 1 *
+bit 482 O 1 *
+bit 481 O 1 *
+bit 480 O 1 *
+bit 479 O 1 *
+bit 478 I 1 IO_P68
+bit 477 O 1 IO_P68 476 1 Z
+bit 476 C 1 *
+bit 475 I 1 IO_P67
+bit 474 O 1 IO_P67 473 1 Z
+bit 473 C 1 *
+bit 472 I 1 IO_P65
+bit 471 O 1 IO_P65 470 1 Z
+bit 470 C 1 *
+bit 469 I 1 IO_P64
+bit 468 O 1 IO_P64 467 1 Z
+bit 467 C 1 *
+bit 466 I 1 IO_P63
+bit 465 O 1 IO_P63 464 1 Z
+bit 464 C 1 *
+bit 463 O 1 *
+bit 462 O 1 *
+bit 461 O 1 *
+bit 460 O 1 *
+bit 459 O 1 *
+bit 458 O 1 *
+bit 457 O 1 *
+bit 456 O 1 *
+bit 455 O 1 *
+bit 454 O 1 *
+bit 453 O 1 *
+bit 452 O 1 *
+bit 451 O 1 *
+bit 450 O 1 *
+bit 449 O 1 *
+bit 448 O 1 *
+bit 447 O 1 *
+bit 446 O 1 *
+bit 445 O 1 *
+bit 444 O 1 *
+bit 443 O 1 *
+bit 442 O 1 *
+bit 441 O 1 *
+bit 440 O 1 *
+bit 439 O 1 *
+bit 438 O 1 *
+bit 437 O 1 *
+bit 436 O 1 *
+bit 435 O 1 *
+bit 434 O 1 *
+bit 433 I 1 IO_P62
+bit 432 O 1 IO_P62 431 1 Z
+bit 431 C 1 *
+bit 430 I 1 IO_P61
+bit 429 O 1 IO_P61 428 1 Z
+bit 428 C 1 *
+bit 427 O 1 *
+bit 426 O 1 *
+bit 425 O 1 *
+bit 424 O 1 *
+bit 423 O 1 *
+bit 422 O 1 *
+bit 421 O 1 *
+bit 420 O 1 *
+bit 419 O 1 *
+bit 418 O 1 *
+bit 417 O 1 *
+bit 416 O 1 *
+bit 415 O 1 *
+bit 414 O 1 *
+bit 413 O 1 *
+bit 412 I 1 IO_P58
+bit 411 O 1 IO_P58 410 1 Z
+bit 410 C 1 *
+bit 409 I 1 IO_P57
+bit 408 O 1 IO_P57 407 1 Z
+bit 407 C 1 *
+bit 406 I 1 M2_P56
+bit 405 I 1 M0_P55
+bit 404 I 1 M1_P54
+bit 403 I 1 IO_P52
+bit 402 O 1 IO_P52 401 1 Z
+bit 401 C 1 *
+bit 400 I 1 IO_P51
+bit 399 O 1 IO_P51 398 1 Z
+bit 398 C 1 *
+bit 397 O 1 *
+bit 396 O 1 *
+bit 395 O 1 *
+bit 394 O 1 *
+bit 393 O 1 *
+bit 392 O 1 *
+bit 391 O 1 *
+bit 390 O 1 *
+bit 389 O 1 *
+bit 388 O 1 *
+bit 387 O 1 *
+bit 386 O 1 *
+bit 385 O 1 *
+bit 384 O 1 *
+bit 383 O 1 *
+bit 382 I 1 IO_P50
+bit 381 O 1 IO_P50 380 1 Z
+bit 380 C 1 *
+bit 379 I 1 IO_P48
+bit 378 O 1 IO_P48 377 1 Z
+bit 377 C 1 *
+bit 376 I 1 IO_P46
+bit 375 O 1 IO_P46 374 1 Z
+bit 374 C 1 *
+bit 373 I 1 IO_P45
+bit 372 O 1 IO_P45 371 1 Z
+bit 371 C 1 *
+bit 370 I 1 IO_P44
+bit 369 O 1 IO_P44 368 1 Z
+bit 368 C 1 *
+bit 367 I 1 IO_P43
+bit 366 O 1 IO_P43 365 1 Z
+bit 365 C 1 *
+bit 364 I 1 IO_P42
+bit 363 O 1 IO_P42 362 1 Z
+bit 362 C 1 *
+bit 361 I 1 IO_P40
+bit 360 O 1 IO_P40 359 1 Z
+bit 359 C 1 *
+bit 358 I 1 IO_P39
+bit 357 O 1 IO_P39 356 1 Z
+bit 356 C 1 *
+bit 355 I 1 IO_P37
+bit 354 O 1 IO_P37 353 1 Z
+bit 353 C 1 *
+bit 352 I 1 IO_P36
+bit 351 O 1 IO_P36 350 1 Z
+bit 350 C 1 *
+bit 349 I 1 IO_P35
+bit 348 O 1 IO_P35 347 1 Z
+bit 347 C 1 *
+bit 346 I 1 IO_P34
+bit 345 O 1 IO_P34 344 1 Z
+bit 344 C 1 *
+bit 343 O 1 *
+bit 342 O 1 *
+bit 341 O 1 *
+bit 340 O 1 *
+bit 339 O 1 *
+bit 338 O 1 *
+bit 337 O 1 *
+bit 336 O 1 *
+bit 335 O 1 *
+bit 334 O 1 *
+bit 333 O 1 *
+bit 332 O 1 *
+bit 331 O 1 *
+bit 330 O 1 *
+bit 329 O 1 *
+bit 328 O 1 *
+bit 327 O 1 *
+bit 326 O 1 *
+bit 325 O 1 *
+bit 324 O 1 *
+bit 323 O 1 *
+bit 322 O 1 *
+bit 321 O 1 *
+bit 320 O 1 *
+bit 319 I 1 IO_P33
+bit 318 O 1 IO_P33 317 1 Z
+bit 317 C 1 *
+bit 316 I 1 IO_P31
+bit 315 O 1 IO_P31 314 1 Z
+bit 314 C 1 *
+bit 313 I 1 IO_P29
+bit 312 O 1 IO_P29 311 1 Z
+bit 311 C 1 *
+bit 310 I 1 IO_P28
+bit 309 O 1 IO_P28 308 1 Z
+bit 308 C 1 *
+bit 307 I 1 IO_P27
+bit 306 O 1 IO_P27 305 1 Z
+bit 305 C 1 *
+bit 304 I 1 IO_P26
+bit 303 O 1 IO_P26 302 1 Z
+bit 302 C 1 *
+bit 301 I 1 IO_P24
+bit 300 O 1 IO_P24 299 1 Z
+bit 299 C 1 *
+bit 298 I 1 IO_P22
+bit 297 O 1 IO_P22 296 1 Z
+bit 296 C 1 *
+bit 295 O 1 *
+bit 294 O 1 *
+bit 293 O 1 *
+bit 292 O 1 *
+bit 291 O 1 *
+bit 290 O 1 *
+bit 289 O 1 *
+bit 288 O 1 *
+bit 287 O 1 *
+bit 286 O 1 *
+bit 285 O 1 *
+bit 284 O 1 *
+bit 283 O 1 *
+bit 282 O 1 *
+bit 281 O 1 *
+bit 280 O 1 *
+bit 279 O 1 *
+bit 278 O 1 *
+bit 277 O 1 *
+bit 276 O 1 *
+bit 275 O 1 *
+bit 274 O 1 *
+bit 273 O 1 *
+bit 272 O 1 *
+bit 271 I 1 IO_P21
+bit 270 O 1 IO_P21 269 1 Z
+bit 269 C 1 *
+bit 268 I 1 IO_P20
+bit 267 O 1 IO_P20 266 1 Z
+bit 266 C 1 *
+bit 265 I 1 IO_P19
+bit 264 O 1 IO_P19 263 1 Z
+bit 263 C 1 *
+bit 262 I 1 IO_P18
+bit 261 O 1 IO_P18 260 1 Z
+bit 260 C 1 *
+bit 259 I 1 IO_P16
+bit 258 O 1 IO_P16 257 1 Z
+bit 257 C 1 *
+bit 256 I 1 IO_P15
+bit 255 O 1 IO_P15 254 1 Z
+bit 254 C 1 *
+bit 253 I 1 IO_P13
+bit 252 O 1 IO_P13 251 1 Z
+bit 251 C 1 *
+bit 250 I 1 IO_P12
+bit 249 O 1 IO_P12 248 1 Z
+bit 248 C 1 *
+bit 247 I 1 IO_P11
+bit 246 O 1 IO_P11 245 1 Z
+bit 245 C 1 *
+bit 244 I 1 IO_P10
+bit 243 O 1 IO_P10 242 1 Z
+bit 242 C 1 *
+bit 241 I 1 IO_P9
+bit 240 O 1 IO_P9 239 1 Z
+bit 239 C 1 *
+bit 238 I 1 IO_P7
+bit 237 O 1 IO_P7 236 1 Z
+bit 236 C 1 *
+bit 235 O 1 *
+bit 234 O 1 *
+bit 233 O 1 *
+bit 232 O 1 *
+bit 231 O 1 *
+bit 230 O 1 *
+bit 229 I 1 IO_P5
+bit 228 O 1 IO_P5 227 1 Z
+bit 227 C 1 *
+bit 226 I 1 IO_P4
+bit 225 O 1 IO_P4 224 1 Z
+bit 224 C 1 *
+bit 223 O 1 *
+bit 222 O 1 *
+bit 221 O 1 *
+bit 220 O 1 *
+bit 219 O 1 *
+bit 218 O 1 *
+bit 217 I 1 IO_P3
+bit 216 O 1 IO_P3 215 1 Z
+bit 215 C 1 *
+bit 214 I 1 IO_P2
+bit 213 O 1 IO_P2 212 1 Z
+bit 212 C 1 *
+bit 211 O 1 *
+bit 210 I 1 HSWAP_EN_P206
+bit 209 I 1 IO_P205
+bit 208 O 1 IO_P205 207 1 Z
+bit 207 C 1 *
+bit 206 I 1 IO_P204
+bit 205 O 1 IO_P204 204 1 Z
+bit 204 C 1 *
+bit 203 I 1 IO_P203
+bit 202 O 1 IO_P203 201 1 Z
+bit 201 C 1 *
+bit 200 O 1 *
+bit 199 O 1 *
+bit 198 O 1 *
+bit 197 O 1 *
+bit 196 O 1 *
+bit 195 O 1 *
+bit 194 O 1 *
+bit 193 O 1 *
+bit 192 O 1 *
+bit 191 O 1 *
+bit 190 O 1 *
+bit 189 O 1 *
+bit 188 O 1 *
+bit 187 O 1 *
+bit 186 O 1 *
+bit 185 O 1 *
+bit 184 O 1 *
+bit 183 O 1 *
+bit 182 O 1 *
+bit 181 O 1 *
+bit 180 O 1 *
+bit 179 O 1 *
+bit 178 O 1 *
+bit 177 O 1 *
+bit 176 O 1 *
+bit 175 O 1 *
+bit 174 O 1 *
+bit 173 O 1 *
+bit 172 O 1 *
+bit 171 O 1 *
+bit 170 O 1 *
+bit 169 O 1 *
+bit 168 O 1 *
+bit 167 O 1 *
+bit 166 O 1 *
+bit 165 O 1 *
+bit 164 I 1 IO_P200
+bit 163 O 1 IO_P200 162 1 Z
+bit 162 C 1 *
+bit 161 O 1 *
+bit 160 O 1 *
+bit 159 O 1 *
+bit 158 O 1 *
+bit 157 O 1 *
+bit 156 O 1 *
+bit 155 I 1 IO_P199
+bit 154 O 1 IO_P199 153 1 Z
+bit 153 C 1 *
+bit 152 I 1 IO_P198
+bit 151 O 1 IO_P198 150 1 Z
+bit 150 C 1 *
+bit 149 I 1 IO_P197
+bit 148 O 1 IO_P197 147 1 Z
+bit 147 C 1 *
+bit 146 I 1 IO_P196
+bit 145 O 1 IO_P196 144 1 Z
+bit 144 C 1 *
+bit 143 I 1 IO_P194
+bit 142 O 1 IO_P194 141 1 Z
+bit 141 C 1 *
+bit 140 O 1 *
+bit 139 O 1 *
+bit 138 O 1 *
+bit 137 O 1 *
+bit 136 O 1 *
+bit 135 O 1 *
+bit 134 O 1 *
+bit 133 O 1 *
+bit 132 O 1 *
+bit 131 O 1 *
+bit 130 O 1 *
+bit 129 O 1 *
+bit 128 O 1 *
+bit 127 O 1 *
+bit 126 O 1 *
+bit 125 I 1 IO_P191
+bit 124 O 1 IO_P191 123 1 Z
+bit 123 C 1 *
+bit 122 I 1 IO_P190
+bit 121 O 1 IO_P190 120 1 Z
+bit 120 C 1 *
+bit 119 I 1 IO_P189
+bit 118 O 1 IO_P189 117 1 Z
+bit 117 C 1 *
+bit 116 I 1 IO_P187
+bit 115 O 1 IO_P187 114 1 Z
+bit 114 C 1 *
+bit 113 I 1 IO_P185
+bit 112 O 1 IO_P185 111 1 Z
+bit 111 C 1 *
+bit 110 I 1 IO_P184
+bit 109 O 1 IO_P184 108 1 Z
+bit 108 C 1 *
+bit 107 I 1 IO_P183
+bit 106 O 1 IO_P183 105 1 Z
+bit 105 C 1 *
+bit 104 I 1 IO_P182
+bit 103 O 1 IO_P182 102 1 Z
+bit 102 C 1 *
+bit 101 I 1 IO_P181
+bit 100 O 1 IO_P181 99 1 Z
+bit 99 C 1 *
+bit 98 I 1 IO_P180
+bit 97 O 1 IO_P180 96 1 Z
+bit 96 C 1 *
+bit 95 I 1 IO_P178
+bit 94 O 1 IO_P178 93 1 Z
+bit 93 C 1 *
+bit 92 I 1 IO_P176
+bit 91 O 1 IO_P176 90 1 Z
+bit 90 C 1 *
+bit 89 I 1 IO_P175
+bit 88 O 1 IO_P175 87 1 Z
+bit 87 C 1 *
+bit 86 O 1 *
+bit 85 O 1 *
+bit 84 O 1 *
+bit 83 O 1 *
+bit 82 O 1 *
+bit 81 O 1 *
+bit 80 O 1 *
+bit 79 O 1 *
+bit 78 O 1 *
+bit 77 O 1 *
+bit 76 O 1 *
+bit 75 O 1 *
+bit 74 O 1 *
+bit 73 O 1 *
+bit 72 O 1 *
+bit 71 I 1 IO_P172
+bit 70 O 1 IO_P172 69 1 Z
+bit 69 C 1 *
+bit 68 I 1 IO_P171
+bit 67 O 1 IO_P171 66 1 Z
+bit 66 C 1 *
+bit 65 I 1 IO_P169
+bit 64 O 1 IO_P169 63 1 Z
+bit 63 C 1 *
+bit 62 I 1 IO_P168
+bit 61 O 1 IO_P168 60 1 Z
+bit 60 C 1 *
+bit 59 I 1 IO_P167
+bit 58 O 1 IO_P167 57 1 Z
+bit 57 C 1 *
+bit 56 O 1 *
+bit 55 O 1 *
+bit 54 O 1 *
+bit 53 O 1 *
+bit 52 O 1 *
+bit 51 O 1 *
+bit 50 O 1 *
+bit 49 O 1 *
+bit 48 O 1 *
+bit 47 O 1 *
+bit 46 O 1 *
+bit 45 O 1 *
+bit 44 O 1 *
+bit 43 O 1 *
+bit 42 O 1 *
+bit 41 O 1 *
+bit 40 O 1 *
+bit 39 O 1 *
+bit 38 O 1 *
+bit 37 O 1 *
+bit 36 O 1 *
+bit 35 O 1 *
+bit 34 O 1 *
+bit 33 O 1 *
+bit 32 O 1 *
+bit 31 O 1 *
+bit 30 O 1 *
+bit 29 O 1 *
+bit 28 O 1 *
+bit 27 O 1 *
+bit 26 I 1 IO_P166
+bit 25 O 1 IO_P166 24 1 Z
+bit 24 C 1 *
+bit 23 I 1 IO_P165
+bit 22 O 1 IO_P165 21 1 Z
+bit 21 C 1 *
+bit 20 O 1 *
+bit 19 O 1 *
+bit 18 O 1 *
+bit 17 O 1 *
+bit 16 O 1 *
+bit 15 O 1 *
+bit 14 O 1 *
+bit 13 O 1 *
+bit 12 O 1 *
+bit 11 O 1 *
+bit 10 O 1 *
+bit 9 O 1 *
+bit 8 O 1 *
+bit 7 O 1 *
+bit 6 O 1 *
+bit 5 I 1 IO_P162
+bit 4 O 1 IO_P162 3 1 Z
+bit 3 C 1 *
+bit 2 I 1 IO_P161
+bit 1 O 1 IO_P161 0 1 Z
+bit 0 C 1 *
--- /dev/null
+signal GND1
+signal GND2
+signal GND3
+signal GND4
+signal GND5
+signal GND6
+signal GND7
+signal GND8
+signal GND9
+signal GND10
+signal GND11
+signal GND12
+signal GND13
+signal GND14
+signal GND15
+signal GND16
+signal CCLK_P72
+signal DONE_P71
+signal HSWAP_EN_P142
+signal M0_P38
+signal M1_P37
+signal M2_P39
+signal PROG_B
+signal TCK
+signal TDI
+signal TDO
+signal TMS
+signal VCCAUX1
+signal VCCAUX2
+signal VCCAUX3
+signal VCCAUX4
+signal VCCINT1
+signal VCCINT2
+signal VCCINT3
+signal VCCINT4
+signal VCCO011
+signal VCCO012
+signal VCCO013
+signal VCCO231
+signal VCCO232
+signal VCCO233
+signal VCCO451
+signal VCCO452
+signal VCCO453
+signal VCCO671
+signal VCCO672
+signal VCCO673
+signal IO_P1
+signal IO_P2
+signal IO_P4
+signal IO_P5
+signal IO_P6
+signal IO_P7
+signal IO_P8
+signal IO_P10
+signal IO_P11
+signal IO_P12
+signal IO_P13
+signal IO_P14
+signal IO_P15
+signal IO_P17
+signal IO_P18
+signal IO_P20
+signal IO_P21
+signal IO_P23
+signal IO_P24
+signal IO_P25
+signal IO_P26
+signal IO_P27
+signal IO_P28
+signal IO_P30
+signal IO_P31
+signal IO_P32
+signal IO_P33
+signal IO_P35
+signal IO_P36
+signal IO_P40
+signal IO_P41
+signal IO_P44
+signal IO_P46
+signal IO_P47
+signal IO_P50
+signal IO_P51
+signal IO_P52
+signal IO_P53
+signal IO_P55
+signal IO_P56
+signal IO_P57
+signal IO_P58
+signal IO_P59
+signal IO_P60
+signal IO_P63
+signal IO_P65
+signal IO_P68
+signal IO_P69
+signal IO_P70
+signal IO_P73
+signal IO_P74
+signal IO_P76
+signal IO_P77
+signal IO_P78
+signal IO_P79
+signal IO_P80
+signal IO_P82
+signal IO_P83
+signal IO_P84
+signal IO_P85
+signal IO_P86
+signal IO_P87
+signal IO_P89
+signal IO_P90
+signal IO_P92
+signal IO_P93
+signal IO_P95
+signal IO_P96
+signal IO_P97
+signal IO_P98
+signal IO_P99
+signal IO_P100
+signal IO_P102
+signal IO_P103
+signal IO_P104
+signal IO_P105
+signal IO_P107
+signal IO_P108
+signal IO_P112
+signal IO_P113
+signal IO_P116
+signal IO_P118
+signal IO_P119
+signal IO_P122
+signal IO_P123
+signal IO_P124
+signal IO_P125
+signal IO_P127
+signal IO_P128
+signal IO_P129
+signal IO_P130
+signal IO_P131
+signal IO_P132
+signal IO_P135
+signal IO_P137
+signal IO_P140
+
+register BSR 815
+register BR 1
+register DIR 32
+
+instruction length 6
+
+instruction EXTEST 000000 BSR
+instruction SAMPLE/PRELOAD 000001 BSR
+instruction IDCODE 001001 DIR
+instruction BYPASS 111111 BR
+
+bit 814 I 1 IO_P108
+bit 813 O 1 IO_P108 812 1 Z
+bit 812 C 1 *
+bit 811 I 1 IO_P107
+bit 810 O 1 IO_P107 809 1 Z
+bit 809 C 1 *
+bit 808 O 1 *
+bit 807 O 1 *
+bit 806 O 1 *
+bit 805 O 1 *
+bit 804 O 1 *
+bit 803 O 1 *
+bit 802 O 1 *
+bit 801 O 1 *
+bit 800 O 1 *
+bit 799 O 1 *
+bit 798 O 1 *
+bit 797 O 1 *
+bit 796 O 1 *
+bit 795 O 1 *
+bit 794 O 1 *
+bit 793 O 1 *
+bit 792 O 1 *
+bit 791 O 1 *
+bit 790 O 1 *
+bit 789 O 1 *
+bit 788 O 1 *
+bit 787 O 1 *
+bit 786 O 1 *
+bit 785 O 1 *
+bit 784 I 1 IO_P105
+bit 783 O 1 IO_P105 782 1 Z
+bit 782 C 1 *
+bit 781 I 1 IO_P104
+bit 780 O 1 IO_P104 779 1 Z
+bit 779 C 1 *
+bit 778 I 1 IO_P103
+bit 777 O 1 IO_P103 776 1 Z
+bit 776 C 1 *
+bit 775 I 1 IO_P102
+bit 774 O 1 IO_P102 773 1 Z
+bit 773 C 1 *
+bit 772 I 1 IO_P100
+bit 771 O 1 IO_P100 770 1 Z
+bit 770 C 1 *
+bit 769 I 1 IO_P99
+bit 768 O 1 IO_P99 767 1 Z
+bit 767 C 1 *
+bit 766 I 1 IO_P98
+bit 765 O 1 IO_P98 764 1 Z
+bit 764 C 1 *
+bit 763 I 1 IO_P97
+bit 762 O 1 IO_P97 761 1 Z
+bit 761 C 1 *
+bit 760 I 1 IO_P96
+bit 759 O 1 IO_P96 758 1 Z
+bit 758 C 1 *
+bit 757 I 1 IO_P95
+bit 756 O 1 IO_P95 755 1 Z
+bit 755 C 1 *
+bit 754 O 1 *
+bit 753 O 1 *
+bit 752 O 1 *
+bit 751 O 1 *
+bit 750 O 1 *
+bit 749 O 1 *
+bit 748 O 1 *
+bit 747 O 1 *
+bit 746 O 1 *
+bit 745 O 1 *
+bit 744 O 1 *
+bit 743 O 1 *
+bit 742 O 1 *
+bit 741 O 1 *
+bit 740 O 1 *
+bit 739 O 1 *
+bit 738 O 1 *
+bit 737 O 1 *
+bit 736 O 1 *
+bit 735 O 1 *
+bit 734 O 1 *
+bit 733 O 1 *
+bit 732 O 1 *
+bit 731 O 1 *
+bit 730 O 1 *
+bit 729 O 1 *
+bit 728 O 1 *
+bit 727 O 1 *
+bit 726 O 1 *
+bit 725 O 1 *
+bit 724 I 1 IO_P93
+bit 723 O 1 IO_P93 722 1 Z
+bit 722 C 1 *
+bit 721 I 1 IO_P92
+bit 720 O 1 IO_P92 719 1 Z
+bit 719 C 1 *
+bit 718 I 1 IO_P90
+bit 717 O 1 IO_P90 716 1 Z
+bit 716 C 1 *
+bit 715 I 1 IO_P89
+bit 714 O 1 IO_P89 713 1 Z
+bit 713 C 1 *
+bit 712 O 1 *
+bit 711 O 1 *
+bit 710 O 1 *
+bit 709 O 1 *
+bit 708 O 1 *
+bit 707 O 1 *
+bit 706 O 1 *
+bit 705 O 1 *
+bit 704 O 1 *
+bit 703 O 1 *
+bit 702 O 1 *
+bit 701 O 1 *
+bit 700 O 1 *
+bit 699 O 1 *
+bit 698 O 1 *
+bit 697 O 1 *
+bit 696 O 1 *
+bit 695 O 1 *
+bit 694 O 1 *
+bit 693 O 1 *
+bit 692 O 1 *
+bit 691 O 1 *
+bit 690 O 1 *
+bit 689 O 1 *
+bit 688 O 1 *
+bit 687 O 1 *
+bit 686 O 1 *
+bit 685 O 1 *
+bit 684 O 1 *
+bit 683 O 1 *
+bit 682 I 1 IO_P87
+bit 681 O 1 IO_P87 680 1 Z
+bit 680 C 1 *
+bit 679 I 1 IO_P86
+bit 678 O 1 IO_P86 677 1 Z
+bit 677 C 1 *
+bit 676 I 1 IO_P85
+bit 675 O 1 IO_P85 674 1 Z
+bit 674 C 1 *
+bit 673 I 1 IO_P84
+bit 672 O 1 IO_P84 671 1 Z
+bit 671 C 1 *
+bit 670 I 1 IO_P83
+bit 669 O 1 IO_P83 668 1 Z
+bit 668 C 1 *
+bit 667 I 1 IO_P82
+bit 666 O 1 IO_P82 665 1 Z
+bit 665 C 1 *
+bit 664 I 1 IO_P80
+bit 663 O 1 IO_P80 662 1 Z
+bit 662 C 1 *
+bit 661 I 1 IO_P79
+bit 660 O 1 IO_P79 659 1 Z
+bit 659 C 1 *
+bit 658 I 1 IO_P78
+bit 657 O 1 IO_P78 656 1 Z
+bit 656 C 1 *
+bit 655 I 1 IO_P77
+bit 654 O 1 IO_P77 653 1 Z
+bit 653 C 1 *
+bit 652 I 1 IO_P76
+bit 651 O 1 IO_P76 650 1 Z
+bit 650 C 1 *
+bit 649 O 1 *
+bit 648 O 1 *
+bit 647 O 1 *
+bit 646 O 1 *
+bit 645 O 1 *
+bit 644 O 1 *
+bit 643 O 1 *
+bit 642 O 1 *
+bit 641 O 1 *
+bit 640 O 1 *
+bit 639 O 1 *
+bit 638 O 1 *
+bit 637 O 1 *
+bit 636 O 1 *
+bit 635 O 1 *
+bit 634 O 1 *
+bit 633 O 1 *
+bit 632 O 1 *
+bit 631 O 1 *
+bit 630 O 1 *
+bit 629 O 1 *
+bit 628 I 1 IO_P74
+bit 627 O 1 IO_P74 626 1 Z
+bit 626 C 1 *
+bit 625 I 1 IO_P73
+bit 624 O 1 IO_P73 623 1 Z
+bit 623 C 1 *
+bit 622 I 1 CCLK_P72
+bit 621 O 1 CCLK_P72 620 1 Z
+bit 620 C 1 *
+bit 619 I 1 DONE_P71
+bit 618 O 1 DONE_P71 617 1 Z
+bit 617 C 1 *
+bit 616 I 1 IO_P70
+bit 615 O 1 IO_P70 614 1 Z
+bit 614 C 1 *
+bit 613 I 1 IO_P69
+bit 612 O 1 IO_P69 611 1 Z
+bit 611 C 1 *
+bit 610 I 1 IO_P68
+bit 609 O 1 IO_P68 608 1 Z
+bit 608 C 1 *
+bit 607 O 1 *
+bit 606 O 1 *
+bit 605 O 1 *
+bit 604 O 1 *
+bit 603 O 1 *
+bit 602 O 1 *
+bit 601 O 1 *
+bit 600 O 1 *
+bit 599 O 1 *
+bit 598 O 1 *
+bit 597 O 1 *
+bit 596 O 1 *
+bit 595 O 1 *
+bit 594 O 1 *
+bit 593 O 1 *
+bit 592 O 1 *
+bit 591 O 1 *
+bit 590 O 1 *
+bit 589 O 1 *
+bit 588 O 1 *
+bit 587 O 1 *
+bit 586 O 1 *
+bit 585 O 1 *
+bit 584 O 1 *
+bit 583 O 1 *
+bit 582 O 1 *
+bit 581 O 1 *
+bit 580 O 1 *
+bit 579 O 1 *
+bit 578 O 1 *
+bit 577 O 1 *
+bit 576 O 1 *
+bit 575 O 1 *
+bit 574 O 1 *
+bit 573 O 1 *
+bit 572 O 1 *
+bit 571 O 1 *
+bit 570 O 1 *
+bit 569 O 1 *
+bit 568 O 1 *
+bit 567 O 1 *
+bit 566 O 1 *
+bit 565 O 1 *
+bit 564 O 1 *
+bit 563 O 1 *
+bit 562 O 1 *
+bit 561 O 1 *
+bit 560 O 1 *
+bit 559 O 1 *
+bit 558 O 1 *
+bit 557 O 1 *
+bit 556 O 1 *
+bit 555 O 1 *
+bit 554 O 1 *
+bit 553 I 1 IO_P65
+bit 552 O 1 IO_P65 551 1 Z
+bit 551 C 1 *
+bit 550 I 1 IO_P63
+bit 549 O 1 IO_P63 548 1 Z
+bit 548 C 1 *
+bit 547 O 1 *
+bit 546 O 1 *
+bit 545 O 1 *
+bit 544 O 1 *
+bit 543 O 1 *
+bit 542 O 1 *
+bit 541 O 1 *
+bit 540 O 1 *
+bit 539 O 1 *
+bit 538 O 1 *
+bit 537 O 1 *
+bit 536 O 1 *
+bit 535 O 1 *
+bit 534 O 1 *
+bit 533 O 1 *
+bit 532 I 1 IO_P60
+bit 531 O 1 IO_P60 530 1 Z
+bit 530 C 1 *
+bit 529 I 1 IO_P59
+bit 528 O 1 IO_P59 527 1 Z
+bit 527 C 1 *
+bit 526 O 1 *
+bit 525 O 1 *
+bit 524 O 1 *
+bit 523 I 1 IO_P58
+bit 522 O 1 IO_P58 521 1 Z
+bit 521 C 1 *
+bit 520 I 1 IO_P57
+bit 519 O 1 IO_P57 518 1 Z
+bit 518 C 1 *
+bit 517 I 1 IO_P56
+bit 516 O 1 IO_P56 515 1 Z
+bit 515 C 1 *
+bit 514 I 1 IO_P55
+bit 513 O 1 IO_P55 512 1 Z
+bit 512 C 1 *
+bit 511 O 1 *
+bit 510 O 1 *
+bit 509 O 1 *
+bit 508 I 1 IO_P53
+bit 507 O 1 IO_P53 506 1 Z
+bit 506 C 1 *
+bit 505 I 1 IO_P52
+bit 504 O 1 IO_P52 503 1 Z
+bit 503 C 1 *
+bit 502 I 1 IO_P51
+bit 501 O 1 IO_P51 500 1 Z
+bit 500 C 1 *
+bit 499 I 1 IO_P50
+bit 498 O 1 IO_P50 497 1 Z
+bit 497 C 1 *
+bit 496 O 1 *
+bit 495 O 1 *
+bit 494 O 1 *
+bit 493 O 1 *
+bit 492 O 1 *
+bit 491 O 1 *
+bit 490 O 1 *
+bit 489 O 1 *
+bit 488 O 1 *
+bit 487 O 1 *
+bit 486 O 1 *
+bit 485 O 1 *
+bit 484 O 1 *
+bit 483 O 1 *
+bit 482 O 1 *
+bit 481 O 1 *
+bit 480 O 1 *
+bit 479 O 1 *
+bit 478 I 1 IO_P47
+bit 477 O 1 IO_P47 476 1 Z
+bit 476 C 1 *
+bit 475 I 1 IO_P46
+bit 474 O 1 IO_P46 473 1 Z
+bit 473 C 1 *
+bit 472 I 1 IO_P44
+bit 471 O 1 IO_P44 470 1 Z
+bit 470 C 1 *
+bit 469 O 1 *
+bit 468 O 1 *
+bit 467 O 1 *
+bit 466 O 1 *
+bit 465 O 1 *
+bit 464 O 1 *
+bit 463 O 1 *
+bit 462 O 1 *
+bit 461 O 1 *
+bit 460 O 1 *
+bit 459 O 1 *
+bit 458 O 1 *
+bit 457 O 1 *
+bit 456 O 1 *
+bit 455 O 1 *
+bit 454 O 1 *
+bit 453 O 1 *
+bit 452 O 1 *
+bit 451 O 1 *
+bit 450 O 1 *
+bit 449 O 1 *
+bit 448 O 1 *
+bit 447 O 1 *
+bit 446 O 1 *
+bit 445 O 1 *
+bit 444 O 1 *
+bit 443 O 1 *
+bit 442 O 1 *
+bit 441 O 1 *
+bit 440 O 1 *
+bit 439 O 1 *
+bit 438 O 1 *
+bit 437 O 1 *
+bit 436 O 1 *
+bit 435 O 1 *
+bit 434 O 1 *
+bit 433 O 1 *
+bit 432 O 1 *
+bit 431 O 1 *
+bit 430 O 1 *
+bit 429 O 1 *
+bit 428 O 1 *
+bit 427 O 1 *
+bit 426 O 1 *
+bit 425 O 1 *
+bit 424 O 1 *
+bit 423 O 1 *
+bit 422 O 1 *
+bit 421 O 1 *
+bit 420 O 1 *
+bit 419 O 1 *
+bit 418 O 1 *
+bit 417 O 1 *
+bit 416 O 1 *
+bit 415 O 1 *
+bit 414 O 1 *
+bit 413 O 1 *
+bit 412 I 1 IO_P41
+bit 411 O 1 IO_P41 410 1 Z
+bit 410 C 1 *
+bit 409 I 1 IO_P40
+bit 408 O 1 IO_P40 407 1 Z
+bit 407 C 1 *
+bit 406 I 1 M2_P39
+bit 405 I 1 M0_P38
+bit 404 I 1 M1_P37
+bit 403 I 1 IO_P36
+bit 402 O 1 IO_P36 401 1 Z
+bit 401 C 1 *
+bit 400 I 1 IO_P35
+bit 399 O 1 IO_P35 398 1 Z
+bit 398 C 1 *
+bit 397 O 1 *
+bit 396 O 1 *
+bit 395 O 1 *
+bit 394 O 1 *
+bit 393 O 1 *
+bit 392 O 1 *
+bit 391 O 1 *
+bit 390 O 1 *
+bit 389 O 1 *
+bit 388 O 1 *
+bit 387 O 1 *
+bit 386 O 1 *
+bit 385 O 1 *
+bit 384 O 1 *
+bit 383 O 1 *
+bit 382 O 1 *
+bit 381 O 1 *
+bit 380 O 1 *
+bit 379 O 1 *
+bit 378 O 1 *
+bit 377 O 1 *
+bit 376 O 1 *
+bit 375 O 1 *
+bit 374 O 1 *
+bit 373 I 1 IO_P33
+bit 372 O 1 IO_P33 371 1 Z
+bit 371 C 1 *
+bit 370 I 1 IO_P32
+bit 369 O 1 IO_P32 368 1 Z
+bit 368 C 1 *
+bit 367 I 1 IO_P31
+bit 366 O 1 IO_P31 365 1 Z
+bit 365 C 1 *
+bit 364 I 1 IO_P30
+bit 363 O 1 IO_P30 362 1 Z
+bit 362 C 1 *
+bit 361 I 1 IO_P28
+bit 360 O 1 IO_P28 359 1 Z
+bit 359 C 1 *
+bit 358 I 1 IO_P27
+bit 357 O 1 IO_P27 356 1 Z
+bit 356 C 1 *
+bit 355 I 1 IO_P26
+bit 354 O 1 IO_P26 353 1 Z
+bit 353 C 1 *
+bit 352 I 1 IO_P25
+bit 351 O 1 IO_P25 350 1 Z
+bit 350 C 1 *
+bit 349 I 1 IO_P24
+bit 348 O 1 IO_P24 347 1 Z
+bit 347 C 1 *
+bit 346 I 1 IO_P23
+bit 345 O 1 IO_P23 344 1 Z
+bit 344 C 1 *
+bit 343 O 1 *
+bit 342 O 1 *
+bit 341 O 1 *
+bit 340 O 1 *
+bit 339 O 1 *
+bit 338 O 1 *
+bit 337 O 1 *
+bit 336 O 1 *
+bit 335 O 1 *
+bit 334 O 1 *
+bit 333 O 1 *
+bit 332 O 1 *
+bit 331 O 1 *
+bit 330 O 1 *
+bit 329 O 1 *
+bit 328 O 1 *
+bit 327 O 1 *
+bit 326 O 1 *
+bit 325 O 1 *
+bit 324 O 1 *
+bit 323 O 1 *
+bit 322 O 1 *
+bit 321 O 1 *
+bit 320 O 1 *
+bit 319 O 1 *
+bit 318 O 1 *
+bit 317 O 1 *
+bit 316 O 1 *
+bit 315 O 1 *
+bit 314 O 1 *
+bit 313 I 1 IO_P21
+bit 312 O 1 IO_P21 311 1 Z
+bit 311 C 1 *
+bit 310 I 1 IO_P20
+bit 309 O 1 IO_P20 308 1 Z
+bit 308 C 1 *
+bit 307 I 1 IO_P18
+bit 306 O 1 IO_P18 305 1 Z
+bit 305 C 1 *
+bit 304 I 1 IO_P17
+bit 303 O 1 IO_P17 302 1 Z
+bit 302 C 1 *
+bit 301 O 1 *
+bit 300 O 1 *
+bit 299 O 1 *
+bit 298 O 1 *
+bit 297 O 1 *
+bit 296 O 1 *
+bit 295 O 1 *
+bit 294 O 1 *
+bit 293 O 1 *
+bit 292 O 1 *
+bit 291 O 1 *
+bit 290 O 1 *
+bit 289 O 1 *
+bit 288 O 1 *
+bit 287 O 1 *
+bit 286 O 1 *
+bit 285 O 1 *
+bit 284 O 1 *
+bit 283 O 1 *
+bit 282 O 1 *
+bit 281 O 1 *
+bit 280 O 1 *
+bit 279 O 1 *
+bit 278 O 1 *
+bit 277 O 1 *
+bit 276 O 1 *
+bit 275 O 1 *
+bit 274 O 1 *
+bit 273 O 1 *
+bit 272 O 1 *
+bit 271 I 1 IO_P15
+bit 270 O 1 IO_P15 269 1 Z
+bit 269 C 1 *
+bit 268 I 1 IO_P14
+bit 267 O 1 IO_P14 266 1 Z
+bit 266 C 1 *
+bit 265 I 1 IO_P13
+bit 264 O 1 IO_P13 263 1 Z
+bit 263 C 1 *
+bit 262 I 1 IO_P12
+bit 261 O 1 IO_P12 260 1 Z
+bit 260 C 1 *
+bit 259 I 1 IO_P11
+bit 258 O 1 IO_P11 257 1 Z
+bit 257 C 1 *
+bit 256 I 1 IO_P10
+bit 255 O 1 IO_P10 254 1 Z
+bit 254 C 1 *
+bit 253 I 1 IO_P8
+bit 252 O 1 IO_P8 251 1 Z
+bit 251 C 1 *
+bit 250 I 1 IO_P7
+bit 249 O 1 IO_P7 248 1 Z
+bit 248 C 1 *
+bit 247 I 1 IO_P6
+bit 246 O 1 IO_P6 245 1 Z
+bit 245 C 1 *
+bit 244 I 1 IO_P5
+bit 243 O 1 IO_P5 242 1 Z
+bit 242 C 1 *
+bit 241 I 1 IO_P4
+bit 240 O 1 IO_P4 239 1 Z
+bit 239 C 1 *
+bit 238 O 1 *
+bit 237 O 1 *
+bit 236 O 1 *
+bit 235 O 1 *
+bit 234 O 1 *
+bit 233 O 1 *
+bit 232 O 1 *
+bit 231 O 1 *
+bit 230 O 1 *
+bit 229 O 1 *
+bit 228 O 1 *
+bit 227 O 1 *
+bit 226 O 1 *
+bit 225 O 1 *
+bit 224 O 1 *
+bit 223 O 1 *
+bit 222 O 1 *
+bit 221 O 1 *
+bit 220 O 1 *
+bit 219 O 1 *
+bit 218 O 1 *
+bit 217 I 1 IO_P2
+bit 216 O 1 IO_P2 215 1 Z
+bit 215 C 1 *
+bit 214 I 1 IO_P1
+bit 213 O 1 IO_P1 212 1 Z
+bit 212 C 1 *
+bit 211 O 1 *
+bit 210 I 1 HSWAP_EN_P142
+bit 209 O 1 *
+bit 208 O 1 *
+bit 207 O 1 *
+bit 206 I 1 IO_P141
+bit 205 O 1 IO_P141 204 1 Z
+bit 204 C 1 *
+bit 203 I 1 IO_P140
+bit 202 O 1 IO_P140 201 1 Z
+bit 201 C 1 *
+bit 200 O 1 *
+bit 199 O 1 *
+bit 198 O 1 *
+bit 197 O 1 *
+bit 196 O 1 *
+bit 195 O 1 *
+bit 194 O 1 *
+bit 193 O 1 *
+bit 192 O 1 *
+bit 191 O 1 *
+bit 190 O 1 *
+bit 189 O 1 *
+bit 188 O 1 *
+bit 187 O 1 *
+bit 186 O 1 *
+bit 185 O 1 *
+bit 184 O 1 *
+bit 183 O 1 *
+bit 182 O 1 *
+bit 181 O 1 *
+bit 180 O 1 *
+bit 179 O 1 *
+bit 178 O 1 *
+bit 177 O 1 *
+bit 176 O 1 *
+bit 175 O 1 *
+bit 174 O 1 *
+bit 173 O 1 *
+bit 172 O 1 *
+bit 171 O 1 *
+bit 170 O 1 *
+bit 169 O 1 *
+bit 168 O 1 *
+bit 167 O 1 *
+bit 166 O 1 *
+bit 165 O 1 *
+bit 164 O 1 *
+bit 163 O 1 *
+bit 162 O 1 *
+bit 161 O 1 *
+bit 160 O 1 *
+bit 159 O 1 *
+bit 158 O 1 *
+bit 157 O 1 *
+bit 156 O 1 *
+bit 155 O 1 *
+bit 154 O 1 *
+bit 153 O 1 *
+bit 152 O 1 *
+bit 151 O 1 *
+bit 150 O 1 *
+bit 149 O 1 *
+bit 148 O 1 *
+bit 147 O 1 *
+bit 146 I 1 IO_P137
+bit 145 O 1 IO_P137 144 1 Z
+bit 144 C 1 *
+bit 143 I 1 IO_P135
+bit 142 O 1 IO_P135 141 1 Z
+bit 141 C 1 *
+bit 140 O 1 *
+bit 139 O 1 *
+bit 138 O 1 *
+bit 137 O 1 *
+bit 136 O 1 *
+bit 135 O 1 *
+bit 134 O 1 *
+bit 133 O 1 *
+bit 132 O 1 *
+bit 131 O 1 *
+bit 130 O 1 *
+bit 129 O 1 *
+bit 128 O 1 *
+bit 127 O 1 *
+bit 126 O 1 *
+bit 125 I 1 IO_P132
+bit 124 O 1 IO_P132 123 1 Z
+bit 123 C 1 *
+bit 122 I 1 IO_P131
+bit 121 O 1 IO_P131 120 1 Z
+bit 120 C 1 *
+bit 119 O 1 *
+bit 118 O 1 *
+bit 117 O 1 *
+bit 116 I 1 IO_P130
+bit 115 O 1 IO_P130 114 1 Z
+bit 114 C 1 *
+bit 113 I 1 IO_P129
+bit 112 O 1 IO_P129 111 1 Z
+bit 111 C 1 *
+bit 110 I 1 IO_P128
+bit 109 O 1 IO_P128 108 1 Z
+bit 108 C 1 *
+bit 107 I 1 IO_P127
+bit 106 O 1 IO_P127 105 1 Z
+bit 105 C 1 *
+bit 104 O 1 *
+bit 103 O 1 *
+bit 102 O 1 *
+bit 101 I 1 IO_P125
+bit 100 O 1 IO_P125 99 1 Z
+bit 99 C 1 *
+bit 98 I 1 IO_P124
+bit 97 O 1 IO_P124 96 1 Z
+bit 96 C 1 *
+bit 95 I 1 IO_P123
+bit 94 O 1 IO_P123 93 1 Z
+bit 93 C 1 *
+bit 92 I 1 IO_P122
+bit 91 O 1 IO_P122 90 1 Z
+bit 90 C 1 *
+bit 89 O 1 *
+bit 88 O 1 *
+bit 87 O 1 *
+bit 86 O 1 *
+bit 85 O 1 *
+bit 84 O 1 *
+bit 83 O 1 *
+bit 82 O 1 *
+bit 81 O 1 *
+bit 80 O 1 *
+bit 79 O 1 *
+bit 78 O 1 *
+bit 77 O 1 *
+bit 76 O 1 *
+bit 75 O 1 *
+bit 74 O 1 *
+bit 73 O 1 *
+bit 72 O 1 *
+bit 71 I 1 IO_P119
+bit 70 O 1 IO_P119 69 1 Z
+bit 69 C 1 *
+bit 68 I 1 IO_P118
+bit 67 O 1 IO_P118 66 1 Z
+bit 66 C 1 *
+bit 65 I 1 IO_P116
+bit 64 O 1 IO_P116 63 1 Z
+bit 63 C 1 *
+bit 62 O 1 *
+bit 61 O 1 *
+bit 60 O 1 *
+bit 59 O 1 *
+bit 58 O 1 *
+bit 57 O 1 *
+bit 56 O 1 *
+bit 55 O 1 *
+bit 54 O 1 *
+bit 53 O 1 *
+bit 52 O 1 *
+bit 51 O 1 *
+bit 50 O 1 *
+bit 49 O 1 *
+bit 48 O 1 *
+bit 47 O 1 *
+bit 46 O 1 *
+bit 45 O 1 *
+bit 44 O 1 *
+bit 43 O 1 *
+bit 42 O 1 *
+bit 41 O 1 *
+bit 40 O 1 *
+bit 39 O 1 *
+bit 38 O 1 *
+bit 37 O 1 *
+bit 36 O 1 *
+bit 35 O 1 *
+bit 34 O 1 *
+bit 33 O 1 *
+bit 32 O 1 *
+bit 31 O 1 *
+bit 30 O 1 *
+bit 29 O 1 *
+bit 28 O 1 *
+bit 27 O 1 *
+bit 26 O 1 *
+bit 25 O 1 *
+bit 24 O 1 *
+bit 23 O 1 *
+bit 22 O 1 *
+bit 21 O 1 *
+bit 20 O 1 *
+bit 19 O 1 *
+bit 18 O 1 *
+bit 17 O 1 *
+bit 16 O 1 *
+bit 15 O 1 *
+bit 14 O 1 *
+bit 13 O 1 *
+bit 12 O 1 *
+bit 11 O 1 *
+bit 10 O 1 *
+bit 9 O 1 *
+bit 8 O 1 *
+bit 7 O 1 *
+bit 6 O 1 *
+bit 5 I 1 IO_P113
+bit 4 O 1 IO_P113 3 1 Z
+bit 3 C 1 *
+bit 2 I 1 IO_P112
+bit 1 O 1 IO_P112 0 1 Z
+bit 0 C 1 *
--- /dev/null
+0000 xc3s4000 0
--- /dev/null
+signal GND1
+signal GND2
+signal GND3
+signal GND4
+signal GND5
+signal GND6
+signal GND7
+signal GND8
+signal GND9
+signal GND10
+signal GND11
+signal GND12
+signal GND13
+signal GND14
+signal GND15
+signal GND16
+signal GND17
+signal GND18
+signal GND19
+signal GND20
+signal GND21
+signal GND22
+signal GND23
+signal GND24
+signal GND25
+signal GND26
+signal GND27
+signal GND28
+signal GND29
+signal GND30
+signal GND31
+signal GND32
+signal GND33
+signal GND34
+signal GND35
+signal GND36
+signal GND37
+signal GND38
+signal GND39
+signal GND40
+signal GND41
+signal GND42
+signal GND43
+signal GND44
+signal GND45
+signal GND46
+signal GND47
+signal GND48
+signal GND49
+signal GND50
+signal GND51
+signal GND52
+signal GND53
+signal GND54
+signal GND55
+signal GND56
+signal GND57
+signal GND58
+signal GND59
+signal GND60
+signal GND61
+signal GND62
+signal GND63
+signal GND64
+signal GND65
+signal GND66
+signal GND67
+signal GND68
+signal GND69
+signal GND70
+signal GND71
+signal GND72
+signal GND73
+signal GND74
+signal GND75
+signal GND76
+signal GND77
+signal GND78
+signal GND79
+signal GND80
+signal GND81
+signal GND82
+signal GND83
+signal GND84
+signal GND85
+signal GND86
+signal GND87
+signal GND88
+signal GND89
+signal GND90
+signal GND91
+signal GND92
+signal GND93
+signal GND94
+signal GND95
+signal GND96
+signal GND97
+signal GND98
+signal GND99
+signal GND100
+signal GND101
+signal GND102
+signal GND103
+signal GND104
+signal GND105
+signal GND106
+signal GND107
+signal GND108
+signal GND109
+signal GND110
+signal GND111
+signal GND112
+signal GND113
+signal GND114
+signal GND115
+signal GND116
+signal GND117
+signal GND118
+signal GND119
+signal GND120
+signal GND121
+signal GND122
+signal GND123
+signal GND124
+signal GND125
+signal GND126
+signal GND127
+signal GND128
+signal GND129
+signal GND130
+signal GND131
+signal GND132
+signal GND133
+signal GND134
+signal GND135
+signal GND136
+signal GND137
+signal GND138
+signal GND139
+signal GND140
+signal GND141
+signal GND142
+signal GND143
+signal GND144
+signal GND145
+signal GND146
+signal GND147
+signal GND148
+signal GND149
+signal NC1
+signal NC2
+signal NC3
+signal NC4
+signal NC5
+signal CCLK_PAD654
+signal DONE_PAD653
+signal HSWAP_EN_PAD137
+signal M0_PAD382
+signal M1_PAD381
+signal M2_PAD383
+signal PROG_B
+signal TCK
+signal TDI
+signal TDO
+signal TMS
+signal VCCAUX1
+signal VCCAUX2
+signal VCCAUX3
+signal VCCAUX4
+signal VCCAUX5
+signal VCCAUX6
+signal VCCAUX7
+signal VCCAUX8
+signal VCCAUX9
+signal VCCAUX10
+signal VCCAUX11
+signal VCCAUX12
+signal VCCAUX13
+signal VCCAUX14
+signal VCCAUX15
+signal VCCAUX16
+signal VCCAUX17
+signal VCCAUX18
+signal VCCAUX19
+signal VCCAUX20
+signal VCCAUX21
+signal VCCAUX22
+signal VCCAUX23
+signal VCCAUX24
+signal VCCAUX25
+signal VCCAUX26
+signal VCCAUX27
+signal VCCAUX28
+signal VCCINT1
+signal VCCINT2
+signal VCCINT3
+signal VCCINT4
+signal VCCINT5
+signal VCCINT6
+signal VCCINT7
+signal VCCINT8
+signal VCCINT9
+signal VCCINT10
+signal VCCINT11
+signal VCCINT12
+signal VCCINT13
+signal VCCINT14
+signal VCCINT15
+signal VCCINT16
+signal VCCINT17
+signal VCCINT18
+signal VCCINT19
+signal VCCINT20
+signal VCCINT21
+signal VCCINT22
+signal VCCINT23
+signal VCCINT24
+signal VCCINT25
+signal VCCINT26
+signal VCCINT27
+signal VCCINT28
+signal VCCINT29
+signal VCCINT30
+signal VCCINT31
+signal VCCINT32
+signal VCCINT33
+signal VCCINT34
+signal VCCINT35
+signal VCCINT36
+signal VCCO01
+signal VCCO02
+signal VCCO03
+signal VCCO04
+signal VCCO05
+signal VCCO06
+signal VCCO07
+signal VCCO08
+signal VCCO09
+signal VCCO010
+signal VCCO011
+signal VCCO012
+signal VCCO11
+signal VCCO12
+signal VCCO13
+signal VCCO14
+signal VCCO15
+signal VCCO16
+signal VCCO17
+signal VCCO18
+signal VCCO19
+signal VCCO110
+signal VCCO111
+signal VCCO112
+signal VCCO21
+signal VCCO22
+signal VCCO23
+signal VCCO24
+signal VCCO25
+signal VCCO26
+signal VCCO27
+signal VCCO28
+signal VCCO29
+signal VCCO210
+signal VCCO31
+signal VCCO32
+signal VCCO33
+signal VCCO34
+signal VCCO35
+signal VCCO36
+signal VCCO37
+signal VCCO38
+signal VCCO39
+signal VCCO310
+signal VCCO41
+signal VCCO42
+signal VCCO43
+signal VCCO44
+signal VCCO45
+signal VCCO46
+signal VCCO47
+signal VCCO48
+signal VCCO49
+signal VCCO410
+signal VCCO411
+signal VCCO412
+signal VCCO51
+signal VCCO52
+signal VCCO53
+signal VCCO54
+signal VCCO55
+signal VCCO56
+signal VCCO57
+signal VCCO58
+signal VCCO59
+signal VCCO510
+signal VCCO511
+signal VCCO512
+signal VCCO61
+signal VCCO62
+signal VCCO63
+signal VCCO64
+signal VCCO65
+signal VCCO66
+signal VCCO67
+signal VCCO68
+signal VCCO69
+signal VCCO610
+signal VCCO71
+signal VCCO72
+signal VCCO73
+signal VCCO74
+signal VCCO75
+signal VCCO76
+signal VCCO77
+signal VCCO78
+signal VCCO79
+signal VCCO710
+signal IO_PAD2
+signal IO_PAD3
+signal IO_PAD4
+signal IO_PAD5
+signal IO_PAD7
+signal IO_PAD9
+signal IO_PAD10
+signal IO_PAD11
+signal IO_PAD13
+signal IO_PAD14
+signal IO_PAD15
+signal IO_PAD17
+signal IO_PAD19
+signal IO_PAD21
+signal IO_PAD23
+signal IO_PAD25
+signal IO_PAD26
+signal IO_PAD27
+signal IO_PAD28
+signal IO_PAD29
+signal IO_PAD31
+signal IO_PAD33
+signal IO_PAD34
+signal IO_PAD35
+signal IO_PAD37
+signal IO_PAD38
+signal IO_PAD39
+signal IO_PAD41
+signal IO_PAD43
+signal IO_PAD45
+signal IO_PAD46
+signal IO_PAD47
+signal IO_PAD49
+signal IO_PAD50
+signal IO_PAD51
+signal IO_PAD53
+signal IO_PAD55
+signal IO_PAD57
+signal IO_PAD58
+signal IO_PAD59
+signal IO_PAD61
+signal IO_PAD62
+signal IO_PAD63
+signal IO_PAD65
+signal IO_PAD67
+signal IO_PAD69
+signal IO_PAD70
+signal IO_PAD71
+signal IO_PAD73
+signal IO_PAD74
+signal IO_PAD75
+signal IO_PAD77
+signal IO_PAD79
+signal IO_PAD80
+signal IO_PAD81
+signal IO_PAD83
+signal IO_PAD85
+signal IO_PAD87
+signal IO_PAD89
+signal IO_PAD91
+signal IO_PAD92
+signal IO_PAD93
+signal IO_PAD95
+signal IO_PAD97
+signal IO_PAD98
+signal IO_PAD99
+signal IO_PAD101
+signal IO_PAD102
+signal IO_PAD103
+signal IO_PAD104
+signal IO_PAD105
+signal IO_PAD107
+signal IO_PAD109
+signal IO_PAD111
+signal IO_PAD113
+signal IO_PAD115
+signal IO_PAD117
+signal IO_PAD119
+signal IO_PAD120
+signal IO_PAD121
+signal IO_PAD122
+signal IO_PAD123
+signal IO_PAD125
+signal IO_PAD127
+signal IO_PAD129
+signal IO_PAD130
+signal IO_PAD131
+signal IO_PAD133
+signal IO_PAD135
+signal IO_PAD136
+signal IO_PAD141
+signal IO_PAD142
+signal IO_PAD143
+signal IO_PAD145
+signal IO_PAD146
+signal IO_PAD147
+signal IO_PAD149
+signal IO_PAD150
+signal IO_PAD151
+signal IO_PAD153
+signal IO_PAD154
+signal IO_PAD155
+signal IO_PAD157
+signal IO_PAD159
+signal IO_PAD161
+signal IO_PAD163
+signal IO_PAD164
+signal IO_PAD165
+signal IO_PAD166
+signal IO_PAD167
+signal IO_PAD169
+signal IO_PAD171
+signal IO_PAD172
+signal IO_PAD173
+signal IO_PAD174
+signal IO_PAD175
+signal IO_PAD176
+signal IO_PAD177
+signal IO_PAD179
+signal IO_PAD181
+signal IO_PAD182
+signal IO_PAD183
+signal IO_PAD184
+signal IO_PAD185
+signal IO_PAD187
+signal IO_PAD188
+signal IO_PAD189
+signal IO_PAD191
+signal IO_PAD192
+signal IO_PAD193
+signal IO_PAD195
+signal IO_PAD196
+signal IO_PAD197
+signal IO_PAD198
+signal IO_PAD199
+signal IO_PAD201
+signal IO_PAD203
+signal IO_PAD204
+signal IO_PAD205
+signal IO_PAD206
+signal IO_PAD207
+signal IO_PAD208
+signal IO_PAD209
+signal IO_PAD210
+signal IO_PAD211
+signal IO_PAD213
+signal IO_PAD215
+signal IO_PAD217
+signal IO_PAD218
+signal IO_PAD219
+signal IO_PAD220
+signal IO_PAD221
+signal IO_PAD223
+signal IO_PAD225
+signal IO_PAD226
+signal IO_PAD227
+signal IO_PAD228
+signal IO_PAD229
+signal IO_PAD231
+signal IO_PAD233
+signal IO_PAD234
+signal IO_PAD235
+signal IO_PAD236
+signal IO_PAD237
+signal IO_PAD239
+signal IO_PAD240
+signal IO_PAD241
+signal IO_PAD243
+signal IO_PAD245
+signal IO_PAD247
+signal IO_PAD249
+signal IO_PAD250
+signal IO_PAD251
+signal IO_PAD252
+signal IO_PAD253
+signal IO_PAD255
+signal IO_PAD257
+signal IO_PAD258
+signal IO_PAD260
+signal IO_PAD261
+signal IO_PAD263
+signal IO_PAD265
+signal IO_PAD266
+signal IO_PAD267
+signal IO_PAD268
+signal IO_PAD269
+signal IO_PAD271
+signal IO_PAD273
+signal IO_PAD275
+signal IO_PAD277
+signal IO_PAD278
+signal IO_PAD279
+signal IO_PAD281
+signal IO_PAD282
+signal IO_PAD283
+signal IO_PAD284
+signal IO_PAD285
+signal IO_PAD287
+signal IO_PAD289
+signal IO_PAD290
+signal IO_PAD291
+signal IO_PAD292
+signal IO_PAD293
+signal IO_PAD295
+signal IO_PAD297
+signal IO_PAD298
+signal IO_PAD299
+signal IO_PAD300
+signal IO_PAD301
+signal IO_PAD303
+signal IO_PAD305
+signal IO_PAD307
+signal IO_PAD308
+signal IO_PAD309
+signal IO_PAD310
+signal IO_PAD311
+signal IO_PAD312
+signal IO_PAD313
+signal IO_PAD314
+signal IO_PAD315
+signal IO_PAD317
+signal IO_PAD319
+signal IO_PAD320
+signal IO_PAD321
+signal IO_PAD322
+signal IO_PAD323
+signal IO_PAD325
+signal IO_PAD326
+signal IO_PAD327
+signal IO_PAD329
+signal IO_PAD330
+signal IO_PAD331
+signal IO_PAD333
+signal IO_PAD334
+signal IO_PAD335
+signal IO_PAD336
+signal IO_PAD337
+signal IO_PAD339
+signal IO_PAD341
+signal IO_PAD342
+signal IO_PAD343
+signal IO_PAD344
+signal IO_PAD345
+signal IO_PAD346
+signal IO_PAD347
+signal IO_PAD349
+signal IO_PAD351
+signal IO_PAD352
+signal IO_PAD353
+signal IO_PAD354
+signal IO_PAD355
+signal IO_PAD357
+signal IO_PAD359
+signal IO_PAD361
+signal IO_PAD363
+signal IO_PAD364
+signal IO_PAD365
+signal IO_PAD367
+signal IO_PAD368
+signal IO_PAD369
+signal IO_PAD371
+signal IO_PAD372
+signal IO_PAD373
+signal IO_PAD375
+signal IO_PAD376
+signal IO_PAD377
+signal IO_PAD384
+signal IO_PAD385
+signal IO_PAD387
+signal IO_PAD389
+signal IO_PAD390
+signal IO_PAD391
+signal IO_PAD393
+signal IO_PAD395
+signal IO_PAD397
+signal IO_PAD398
+signal IO_PAD399
+signal IO_PAD400
+signal IO_PAD401
+signal IO_PAD403
+signal IO_PAD405
+signal IO_PAD406
+signal IO_PAD407
+signal IO_PAD409
+signal IO_PAD411
+signal IO_PAD413
+signal IO_PAD414
+signal IO_PAD415
+signal IO_PAD416
+signal IO_PAD417
+signal IO_PAD419
+signal IO_PAD420
+signal IO_PAD421
+signal IO_PAD423
+signal IO_PAD425
+signal IO_PAD426
+signal IO_PAD427
+signal IO_PAD429
+signal IO_PAD431
+signal IO_PAD433
+signal IO_PAD435
+signal IO_PAD437
+signal IO_PAD438
+signal IO_PAD439
+signal IO_PAD441
+signal IO_PAD443
+signal IO_PAD444
+signal IO_PAD445
+signal IO_PAD447
+signal IO_PAD448
+signal IO_PAD449
+signal IO_PAD451
+signal IO_PAD453
+signal IO_PAD455
+signal IO_PAD456
+signal IO_PAD457
+signal IO_PAD459
+signal IO_PAD460
+signal IO_PAD461
+signal IO_PAD463
+signal IO_PAD465
+signal IO_PAD467
+signal IO_PAD468
+signal IO_PAD469
+signal IO_PAD471
+signal IO_PAD472
+signal IO_PAD473
+signal IO_PAD475
+signal IO_PAD477
+signal IO_PAD479
+signal IO_PAD480
+signal IO_PAD481
+signal IO_PAD483
+signal IO_PAD484
+signal IO_PAD485
+signal IO_PAD487
+signal IO_PAD489
+signal IO_PAD490
+signal IO_PAD491
+signal IO_PAD492
+signal IO_PAD493
+signal IO_PAD495
+signal IO_PAD497
+signal IO_PAD499
+signal IO_PAD501
+signal IO_PAD503
+signal IO_PAD504
+signal IO_PAD505
+signal IO_PAD507
+signal IO_PAD508
+signal IO_PAD509
+signal IO_PAD511
+signal IO_PAD513
+signal IO_PAD514
+signal IO_PAD515
+signal IO_PAD516
+signal IO_PAD518
+signal IO_PAD519
+signal IO_PAD520
+signal IO_PAD521
+signal IO_PAD523
+signal IO_PAD525
+signal IO_PAD526
+signal IO_PAD527
+signal IO_PAD529
+signal IO_PAD530
+signal IO_PAD531
+signal IO_PAD533
+signal IO_PAD535
+signal IO_PAD537
+signal IO_PAD539
+signal IO_PAD541
+signal IO_PAD542
+signal IO_PAD543
+signal IO_PAD544
+signal IO_PAD545
+signal IO_PAD547
+signal IO_PAD549
+signal IO_PAD550
+signal IO_PAD551
+signal IO_PAD553
+signal IO_PAD554
+signal IO_PAD555
+signal IO_PAD557
+signal IO_PAD559
+signal IO_PAD561
+signal IO_PAD562
+signal IO_PAD563
+signal IO_PAD565
+signal IO_PAD566
+signal IO_PAD567
+signal IO_PAD569
+signal IO_PAD571
+signal IO_PAD573
+signal IO_PAD574
+signal IO_PAD575
+signal IO_PAD577
+signal IO_PAD578
+signal IO_PAD579
+signal IO_PAD581
+signal IO_PAD583
+signal IO_PAD585
+signal IO_PAD586
+signal IO_PAD587
+signal IO_PAD589
+signal IO_PAD590
+signal IO_PAD591
+signal IO_PAD593
+signal IO_PAD595
+signal IO_PAD596
+signal IO_PAD597
+signal IO_PAD599
+signal IO_PAD601
+signal IO_PAD603
+signal IO_PAD605
+signal IO_PAD607
+signal IO_PAD608
+signal IO_PAD609
+signal IO_PAD611
+signal IO_PAD613
+signal IO_PAD614
+signal IO_PAD615
+signal IO_PAD617
+signal IO_PAD618
+signal IO_PAD619
+signal IO_PAD620
+signal IO_PAD621
+signal IO_PAD623
+signal IO_PAD625
+signal IO_PAD627
+signal IO_PAD629
+signal IO_PAD631
+signal IO_PAD633
+signal IO_PAD635
+signal IO_PAD636
+signal IO_PAD637
+signal IO_PAD638
+signal IO_PAD639
+signal IO_PAD641
+signal IO_PAD643
+signal IO_PAD645
+signal IO_PAD646
+signal IO_PAD647
+signal IO_PAD649
+signal IO_PAD651
+signal IO_PAD652
+signal IO_PAD657
+signal IO_PAD658
+signal IO_PAD659
+signal IO_PAD661
+signal IO_PAD662
+signal IO_PAD663
+signal IO_PAD665
+signal IO_PAD666
+signal IO_PAD667
+signal IO_PAD669
+signal IO_PAD670
+signal IO_PAD671
+signal IO_PAD673
+signal IO_PAD675
+signal IO_PAD677
+signal IO_PAD679
+signal IO_PAD680
+signal IO_PAD681
+signal IO_PAD682
+signal IO_PAD683
+signal IO_PAD685
+signal IO_PAD687
+signal IO_PAD688
+signal IO_PAD689
+signal IO_PAD690
+signal IO_PAD691
+signal IO_PAD692
+signal IO_PAD693
+signal IO_PAD695
+signal IO_PAD697
+signal IO_PAD698
+signal IO_PAD699
+signal IO_PAD700
+signal IO_PAD701
+signal IO_PAD703
+signal IO_PAD704
+signal IO_PAD705
+signal IO_PAD707
+signal IO_PAD708
+signal IO_PAD709
+signal IO_PAD711
+signal IO_PAD712
+signal IO_PAD713
+signal IO_PAD714
+signal IO_PAD715
+signal IO_PAD717
+signal IO_PAD719
+signal IO_PAD720
+signal IO_PAD721
+signal IO_PAD722
+signal IO_PAD723
+signal IO_PAD724
+signal IO_PAD725
+signal IO_PAD726
+signal IO_PAD727
+signal IO_PAD729
+signal IO_PAD731
+signal IO_PAD733
+signal IO_PAD734
+signal IO_PAD735
+signal IO_PAD736
+signal IO_PAD737
+signal IO_PAD739
+signal IO_PAD741
+signal IO_PAD742
+signal IO_PAD743
+signal IO_PAD744
+signal IO_PAD745
+signal IO_PAD747
+signal IO_PAD749
+signal IO_PAD750
+signal IO_PAD751
+signal IO_PAD752
+signal IO_PAD753
+signal IO_PAD755
+signal IO_PAD756
+signal IO_PAD757
+signal IO_PAD759
+signal IO_PAD761
+signal IO_PAD763
+signal IO_PAD765
+signal IO_PAD766
+signal IO_PAD767
+signal IO_PAD768
+signal IO_PAD769
+signal IO_PAD771
+signal IO_PAD773
+signal IO_PAD774
+signal IO_PAD776
+signal IO_PAD777
+signal IO_PAD779
+signal IO_PAD781
+signal IO_PAD782
+signal IO_PAD783
+signal IO_PAD784
+signal IO_PAD785
+signal IO_PAD787
+signal IO_PAD789
+signal IO_PAD791
+signal IO_PAD793
+signal IO_PAD794
+signal IO_PAD795
+signal IO_PAD797
+signal IO_PAD798
+signal IO_PAD799
+signal IO_PAD800
+signal IO_PAD801
+signal IO_PAD803
+signal IO_PAD805
+signal IO_PAD806
+signal IO_PAD807
+signal IO_PAD808
+signal IO_PAD809
+signal IO_PAD811
+signal IO_PAD813
+signal IO_PAD814
+signal IO_PAD815
+signal IO_PAD816
+signal IO_PAD817
+signal IO_PAD819
+signal IO_PAD821
+signal IO_PAD823
+signal IO_PAD824
+signal IO_PAD825
+signal IO_PAD826
+signal IO_PAD827
+signal IO_PAD828
+signal IO_PAD829
+signal IO_PAD830
+signal IO_PAD831
+signal IO_PAD833
+signal IO_PAD835
+signal IO_PAD836
+signal IO_PAD837
+signal IO_PAD838
+signal IO_PAD839
+signal IO_PAD841
+signal IO_PAD842
+signal IO_PAD843
+signal IO_PAD845
+signal IO_PAD846
+signal IO_PAD847
+signal IO_PAD849
+signal IO_PAD850
+signal IO_PAD851
+signal IO_PAD852
+signal IO_PAD853
+signal IO_PAD855
+signal IO_PAD857
+signal IO_PAD858
+signal IO_PAD859
+signal IO_PAD860
+signal IO_PAD861
+signal IO_PAD862
+signal IO_PAD863
+signal IO_PAD865
+signal IO_PAD867
+signal IO_PAD868
+signal IO_PAD869
+signal IO_PAD870
+signal IO_PAD871
+signal IO_PAD873
+signal IO_PAD875
+signal IO_PAD877
+signal IO_PAD879
+signal IO_PAD880
+signal IO_PAD881
+signal IO_PAD883
+signal IO_PAD884
+signal IO_PAD885
+signal IO_PAD887
+signal IO_PAD888
+signal IO_PAD889
+signal IO_PAD891
+signal IO_PAD892
+signal IO_PAD893
+signal IO_PAD898
+signal IO_PAD899
+signal IO_PAD901
+signal IO_PAD903
+signal IO_PAD904
+signal IO_PAD905
+signal IO_PAD907
+signal IO_PAD909
+signal IO_PAD911
+signal IO_PAD912
+signal IO_PAD913
+signal IO_PAD914
+signal IO_PAD915
+signal IO_PAD917
+signal IO_PAD919
+signal IO_PAD920
+signal IO_PAD921
+signal IO_PAD923
+signal IO_PAD925
+signal IO_PAD927
+signal IO_PAD928
+signal IO_PAD929
+signal IO_PAD930
+signal IO_PAD931
+signal IO_PAD933
+signal IO_PAD934
+signal IO_PAD935
+signal IO_PAD937
+signal IO_PAD939
+signal IO_PAD940
+signal IO_PAD941
+signal IO_PAD943
+signal IO_PAD945
+signal IO_PAD947
+signal IO_PAD949
+signal IO_PAD951
+signal IO_PAD952
+signal IO_PAD953
+signal IO_PAD955
+signal IO_PAD957
+signal IO_PAD958
+signal IO_PAD959
+signal IO_PAD961
+signal IO_PAD962
+signal IO_PAD963
+signal IO_PAD965
+signal IO_PAD967
+signal IO_PAD969
+signal IO_PAD970
+signal IO_PAD971
+signal IO_PAD973
+signal IO_PAD974
+signal IO_PAD975
+signal IO_PAD977
+signal IO_PAD979
+signal IO_PAD981
+signal IO_PAD982
+signal IO_PAD983
+signal IO_PAD985
+signal IO_PAD986
+signal IO_PAD987
+signal IO_PAD989
+signal IO_PAD991
+signal IO_PAD993
+signal IO_PAD994
+signal IO_PAD995
+signal IO_PAD997
+signal IO_PAD998
+signal IO_PAD999
+signal IO_PAD1001
+signal IO_PAD1003
+signal IO_PAD1004
+signal IO_PAD1005
+signal IO_PAD1006
+signal IO_PAD1007
+signal IO_PAD1009
+signal IO_PAD1011
+signal IO_PAD1013
+signal IO_PAD1015
+signal IO_PAD1017
+signal IO_PAD1018
+signal IO_PAD1019
+signal IO_PAD1021
+signal IO_PAD1022
+signal IO_PAD1023
+signal IO_PAD1025
+signal IO_PAD1027
+signal IO_PAD1028
+signal IO_PAD1029
+
+register BSR 2243
+register BR 1
+register DIR 32
+
+instruction length 6
+
+instruction EXTEST 000000 BSR
+instruction SAMPLE/PRELOAD 000001 BSR
+instruction IDCODE 001001 DIR
+instruction BYPASS 111111 BR
+
+bit 2242 I 1 IO_PAD893
+bit 2241 O 1 IO_PAD893 2240 1 Z
+bit 2240 C 1 *
+bit 2239 I 1 IO_PAD892
+bit 2238 O 1 IO_PAD892 2237 1 Z
+bit 2237 C 1 *
+bit 2236 I 1 IO_PAD891
+bit 2235 O 1 IO_PAD891 2234 1 Z
+bit 2234 C 1 *
+bit 2233 I 1 IO_PAD889
+bit 2232 O 1 IO_PAD889 2231 1 Z
+bit 2231 C 1 *
+bit 2230 I 1 IO_PAD888
+bit 2229 O 1 IO_PAD888 2228 1 Z
+bit 2228 C 1 *
+bit 2227 I 1 IO_PAD887
+bit 2226 O 1 IO_PAD887 2225 1 Z
+bit 2225 C 1 *
+bit 2224 I 1 IO_PAD885
+bit 2223 O 1 IO_PAD885 2222 1 Z
+bit 2222 C 1 *
+bit 2221 I 1 IO_PAD884
+bit 2220 O 1 IO_PAD884 2219 1 Z
+bit 2219 C 1 *
+bit 2218 I 1 IO_PAD883
+bit 2217 O 1 IO_PAD883 2216 1 Z
+bit 2216 C 1 *
+bit 2215 I 1 IO_PAD881
+bit 2214 O 1 IO_PAD881 2213 1 Z
+bit 2213 C 1 *
+bit 2212 I 1 IO_PAD880
+bit 2211 O 1 IO_PAD880 2210 1 Z
+bit 2210 C 1 *
+bit 2209 I 1 IO_PAD879
+bit 2208 O 1 IO_PAD879 2207 1 Z
+bit 2207 C 1 *
+bit 2206 I 1 IO_PAD877
+bit 2205 O 1 IO_PAD877 2204 1 Z
+bit 2204 C 1 *
+bit 2203 O 1 *
+bit 2202 O 1 *
+bit 2201 O 1 *
+bit 2200 O 1 *
+bit 2199 O 1 *
+bit 2198 O 1 *
+bit 2197 I 1 IO_PAD875
+bit 2196 O 1 IO_PAD875 2195 1 Z
+bit 2195 C 1 *
+bit 2194 I 1 IO_PAD873
+bit 2193 O 1 IO_PAD873 2192 1 Z
+bit 2192 C 1 *
+bit 2191 I 1 IO_PAD871
+bit 2190 O 1 IO_PAD871 2189 1 Z
+bit 2189 C 1 *
+bit 2188 I 1 IO_PAD870
+bit 2187 O 1 IO_PAD870 2186 1 Z
+bit 2186 C 1 *
+bit 2185 I 1 IO_PAD869
+bit 2184 O 1 IO_PAD869 2183 1 Z
+bit 2183 C 1 *
+bit 2182 I 1 IO_PAD868
+bit 2181 O 1 IO_PAD868 2180 1 Z
+bit 2180 C 1 *
+bit 2179 I 1 IO_PAD867
+bit 2178 O 1 IO_PAD867 2177 1 Z
+bit 2177 C 1 *
+bit 2176 I 1 IO_PAD865
+bit 2175 O 1 IO_PAD865 2174 1 Z
+bit 2174 C 1 *
+bit 2173 I 1 IO_PAD863
+bit 2172 O 1 IO_PAD863 2171 1 Z
+bit 2171 C 1 *
+bit 2170 I 1 IO_PAD862
+bit 2169 O 1 IO_PAD862 2168 1 Z
+bit 2168 C 1 *
+bit 2167 I 1 IO_PAD861
+bit 2166 O 1 IO_PAD861 2165 1 Z
+bit 2165 C 1 *
+bit 2164 I 1 IO_PAD860
+bit 2163 O 1 IO_PAD860 2162 1 Z
+bit 2162 C 1 *
+bit 2161 I 1 IO_PAD859
+bit 2160 O 1 IO_PAD859 2159 1 Z
+bit 2159 C 1 *
+bit 2158 I 1 IO_PAD858
+bit 2157 O 1 IO_PAD858 2156 1 Z
+bit 2156 C 1 *
+bit 2155 I 1 IO_PAD857
+bit 2154 O 1 IO_PAD857 2153 1 Z
+bit 2153 C 1 *
+bit 2152 I 1 IO_PAD855
+bit 2151 O 1 IO_PAD855 2150 1 Z
+bit 2150 C 1 *
+bit 2149 I 1 IO_PAD853
+bit 2148 O 1 IO_PAD853 2147 1 Z
+bit 2147 C 1 *
+bit 2146 I 1 IO_PAD852
+bit 2145 O 1 IO_PAD852 2144 1 Z
+bit 2144 C 1 *
+bit 2143 I 1 IO_PAD851
+bit 2142 O 1 IO_PAD851 2141 1 Z
+bit 2141 C 1 *
+bit 2140 I 1 IO_PAD850
+bit 2139 O 1 IO_PAD850 2138 1 Z
+bit 2138 C 1 *
+bit 2137 I 1 IO_PAD849
+bit 2136 O 1 IO_PAD849 2135 1 Z
+bit 2135 C 1 *
+bit 2134 I 1 IO_PAD847
+bit 2133 O 1 IO_PAD847 2132 1 Z
+bit 2132 C 1 *
+bit 2131 I 1 IO_PAD846
+bit 2130 O 1 IO_PAD846 2129 1 Z
+bit 2129 C 1 *
+bit 2128 O 1 *
+bit 2127 O 1 *
+bit 2126 O 1 *
+bit 2125 O 1 *
+bit 2124 O 1 *
+bit 2123 O 1 *
+bit 2122 I 1 IO_PAD845
+bit 2121 O 1 IO_PAD845 2120 1 Z
+bit 2120 C 1 *
+bit 2119 I 1 IO_PAD843
+bit 2118 O 1 IO_PAD843 2117 1 Z
+bit 2117 C 1 *
+bit 2116 I 1 IO_PAD842
+bit 2115 O 1 IO_PAD842 2114 1 Z
+bit 2114 C 1 *
+bit 2113 I 1 IO_PAD841
+bit 2112 O 1 IO_PAD841 2111 1 Z
+bit 2111 C 1 *
+bit 2110 I 1 IO_PAD839
+bit 2109 O 1 IO_PAD839 2108 1 Z
+bit 2108 C 1 *
+bit 2107 I 1 IO_PAD838
+bit 2106 O 1 IO_PAD838 2105 1 Z
+bit 2105 C 1 *
+bit 2104 I 1 IO_PAD837
+bit 2103 O 1 IO_PAD837 2102 1 Z
+bit 2102 C 1 *
+bit 2101 I 1 IO_PAD836
+bit 2100 O 1 IO_PAD836 2099 1 Z
+bit 2099 C 1 *
+bit 2098 I 1 IO_PAD835
+bit 2097 O 1 IO_PAD835 2096 1 Z
+bit 2096 C 1 *
+bit 2095 I 1 IO_PAD833
+bit 2094 O 1 IO_PAD833 2093 1 Z
+bit 2093 C 1 *
+bit 2092 I 1 IO_PAD831
+bit 2091 O 1 IO_PAD831 2090 1 Z
+bit 2090 C 1 *
+bit 2089 I 1 IO_PAD830
+bit 2088 O 1 IO_PAD830 2087 1 Z
+bit 2087 C 1 *
+bit 2086 I 1 IO_PAD829
+bit 2085 O 1 IO_PAD829 2084 1 Z
+bit 2084 C 1 *
+bit 2083 I 1 IO_PAD828
+bit 2082 O 1 IO_PAD828 2081 1 Z
+bit 2081 C 1 *
+bit 2080 I 1 IO_PAD827
+bit 2079 O 1 IO_PAD827 2078 1 Z
+bit 2078 C 1 *
+bit 2077 I 1 IO_PAD826
+bit 2076 O 1 IO_PAD826 2075 1 Z
+bit 2075 C 1 *
+bit 2074 I 1 IO_PAD825
+bit 2073 O 1 IO_PAD825 2072 1 Z
+bit 2072 C 1 *
+bit 2071 I 1 IO_PAD824
+bit 2070 O 1 IO_PAD824 2069 1 Z
+bit 2069 C 1 *
+bit 2068 I 1 IO_PAD823
+bit 2067 O 1 IO_PAD823 2066 1 Z
+bit 2066 C 1 *
+bit 2065 I 1 IO_PAD821
+bit 2064 O 1 IO_PAD821 2063 1 Z
+bit 2063 C 1 *
+bit 2062 O 1 *
+bit 2061 O 1 *
+bit 2060 O 1 *
+bit 2059 O 1 *
+bit 2058 O 1 *
+bit 2057 O 1 *
+bit 2056 I 1 IO_PAD819
+bit 2055 O 1 IO_PAD819 2054 1 Z
+bit 2054 C 1 *
+bit 2053 I 1 IO_PAD817
+bit 2052 O 1 IO_PAD817 2051 1 Z
+bit 2051 C 1 *
+bit 2050 I 1 IO_PAD816
+bit 2049 O 1 IO_PAD816 2048 1 Z
+bit 2048 C 1 *
+bit 2047 I 1 IO_PAD815
+bit 2046 O 1 IO_PAD815 2045 1 Z
+bit 2045 C 1 *
+bit 2044 I 1 IO_PAD814
+bit 2043 O 1 IO_PAD814 2042 1 Z
+bit 2042 C 1 *
+bit 2041 I 1 IO_PAD813
+bit 2040 O 1 IO_PAD813 2039 1 Z
+bit 2039 C 1 *
+bit 2038 I 1 IO_PAD811
+bit 2037 O 1 IO_PAD811 2036 1 Z
+bit 2036 C 1 *
+bit 2035 I 1 IO_PAD809
+bit 2034 O 1 IO_PAD809 2033 1 Z
+bit 2033 C 1 *
+bit 2032 I 1 IO_PAD808
+bit 2031 O 1 IO_PAD808 2030 1 Z
+bit 2030 C 1 *
+bit 2029 I 1 IO_PAD807
+bit 2028 O 1 IO_PAD807 2027 1 Z
+bit 2027 C 1 *
+bit 2026 I 1 IO_PAD806
+bit 2025 O 1 IO_PAD806 2024 1 Z
+bit 2024 C 1 *
+bit 2023 I 1 IO_PAD805
+bit 2022 O 1 IO_PAD805 2021 1 Z
+bit 2021 C 1 *
+bit 2020 I 1 IO_PAD803
+bit 2019 O 1 IO_PAD803 2018 1 Z
+bit 2018 C 1 *
+bit 2017 I 1 IO_PAD801
+bit 2016 O 1 IO_PAD801 2015 1 Z
+bit 2015 C 1 *
+bit 2014 I 1 IO_PAD800
+bit 2013 O 1 IO_PAD800 2012 1 Z
+bit 2012 C 1 *
+bit 2011 I 1 IO_PAD799
+bit 2010 O 1 IO_PAD799 2009 1 Z
+bit 2009 C 1 *
+bit 2008 I 1 IO_PAD798
+bit 2007 O 1 IO_PAD798 2006 1 Z
+bit 2006 C 1 *
+bit 2005 I 1 IO_PAD797
+bit 2004 O 1 IO_PAD797 2003 1 Z
+bit 2003 C 1 *
+bit 2002 I 1 IO_PAD795
+bit 2001 O 1 IO_PAD795 2000 1 Z
+bit 2000 C 1 *
+bit 1999 I 1 IO_PAD794
+bit 1998 O 1 IO_PAD794 1997 1 Z
+bit 1997 C 1 *
+bit 1996 I 1 IO_PAD793
+bit 1995 O 1 IO_PAD793 1994 1 Z
+bit 1994 C 1 *
+bit 1993 I 1 IO_PAD791
+bit 1992 O 1 IO_PAD791 1991 1 Z
+bit 1991 C 1 *
+bit 1990 I 1 IO_PAD789
+bit 1989 O 1 IO_PAD789 1988 1 Z
+bit 1988 C 1 *
+bit 1987 O 1 *
+bit 1986 O 1 *
+bit 1985 O 1 *
+bit 1984 O 1 *
+bit 1983 O 1 *
+bit 1982 O 1 *
+bit 1981 I 1 IO_PAD787
+bit 1980 O 1 IO_PAD787 1979 1 Z
+bit 1979 C 1 *
+bit 1978 I 1 IO_PAD785
+bit 1977 O 1 IO_PAD785 1976 1 Z
+bit 1976 C 1 *
+bit 1975 I 1 IO_PAD784
+bit 1974 O 1 IO_PAD784 1973 1 Z
+bit 1973 C 1 *
+bit 1972 I 1 IO_PAD783
+bit 1971 O 1 IO_PAD783 1970 1 Z
+bit 1970 C 1 *
+bit 1969 I 1 IO_PAD782
+bit 1968 O 1 IO_PAD782 1967 1 Z
+bit 1967 C 1 *
+bit 1966 I 1 IO_PAD781
+bit 1965 O 1 IO_PAD781 1964 1 Z
+bit 1964 C 1 *
+bit 1963 I 1 IO_PAD779
+bit 1962 O 1 IO_PAD779 1961 1 Z
+bit 1961 C 1 *
+bit 1960 I 1 IO_PAD777
+bit 1959 O 1 IO_PAD777 1958 1 Z
+bit 1958 C 1 *
+bit 1957 I 1 IO_PAD776
+bit 1956 O 1 IO_PAD776 1955 1 Z
+bit 1955 C 1 *
+bit 1954 I 1 IO_PAD774
+bit 1953 O 1 IO_PAD774 1952 1 Z
+bit 1952 C 1 *
+bit 1951 I 1 IO_PAD773
+bit 1950 O 1 IO_PAD773 1949 1 Z
+bit 1949 C 1 *
+bit 1948 I 1 IO_PAD771
+bit 1947 O 1 IO_PAD771 1946 1 Z
+bit 1946 C 1 *
+bit 1945 I 1 IO_PAD769
+bit 1944 O 1 IO_PAD769 1943 1 Z
+bit 1943 C 1 *
+bit 1942 I 1 IO_PAD768
+bit 1941 O 1 IO_PAD768 1940 1 Z
+bit 1940 C 1 *
+bit 1939 I 1 IO_PAD767
+bit 1938 O 1 IO_PAD767 1937 1 Z
+bit 1937 C 1 *
+bit 1936 I 1 IO_PAD766
+bit 1935 O 1 IO_PAD766 1934 1 Z
+bit 1934 C 1 *
+bit 1933 I 1 IO_PAD765
+bit 1932 O 1 IO_PAD765 1931 1 Z
+bit 1931 C 1 *
+bit 1930 I 1 IO_PAD763
+bit 1929 O 1 IO_PAD763 1928 1 Z
+bit 1928 C 1 *
+bit 1927 O 1 *
+bit 1926 O 1 *
+bit 1925 O 1 *
+bit 1924 O 1 *
+bit 1923 O 1 *
+bit 1922 O 1 *
+bit 1921 I 1 IO_PAD761
+bit 1920 O 1 IO_PAD761 1919 1 Z
+bit 1919 C 1 *
+bit 1918 I 1 IO_PAD759
+bit 1917 O 1 IO_PAD759 1916 1 Z
+bit 1916 C 1 *
+bit 1915 I 1 IO_PAD757
+bit 1914 O 1 IO_PAD757 1913 1 Z
+bit 1913 C 1 *
+bit 1912 I 1 IO_PAD756
+bit 1911 O 1 IO_PAD756 1910 1 Z
+bit 1910 C 1 *
+bit 1909 I 1 IO_PAD755
+bit 1908 O 1 IO_PAD755 1907 1 Z
+bit 1907 C 1 *
+bit 1906 I 1 IO_PAD753
+bit 1905 O 1 IO_PAD753 1904 1 Z
+bit 1904 C 1 *
+bit 1903 I 1 IO_PAD752
+bit 1902 O 1 IO_PAD752 1901 1 Z
+bit 1901 C 1 *
+bit 1900 I 1 IO_PAD751
+bit 1899 O 1 IO_PAD751 1898 1 Z
+bit 1898 C 1 *
+bit 1897 I 1 IO_PAD750
+bit 1896 O 1 IO_PAD750 1895 1 Z
+bit 1895 C 1 *
+bit 1894 I 1 IO_PAD749
+bit 1893 O 1 IO_PAD749 1892 1 Z
+bit 1892 C 1 *
+bit 1891 I 1 IO_PAD747
+bit 1890 O 1 IO_PAD747 1889 1 Z
+bit 1889 C 1 *
+bit 1888 I 1 IO_PAD745
+bit 1887 O 1 IO_PAD745 1886 1 Z
+bit 1886 C 1 *
+bit 1885 I 1 IO_PAD744
+bit 1884 O 1 IO_PAD744 1883 1 Z
+bit 1883 C 1 *
+bit 1882 I 1 IO_PAD743
+bit 1881 O 1 IO_PAD743 1880 1 Z
+bit 1880 C 1 *
+bit 1879 I 1 IO_PAD742
+bit 1878 O 1 IO_PAD742 1877 1 Z
+bit 1877 C 1 *
+bit 1876 I 1 IO_PAD741
+bit 1875 O 1 IO_PAD741 1874 1 Z
+bit 1874 C 1 *
+bit 1873 I 1 IO_PAD739
+bit 1872 O 1 IO_PAD739 1871 1 Z
+bit 1871 C 1 *
+bit 1870 I 1 IO_PAD737
+bit 1869 O 1 IO_PAD737 1868 1 Z
+bit 1868 C 1 *
+bit 1867 I 1 IO_PAD736
+bit 1866 O 1 IO_PAD736 1865 1 Z
+bit 1865 C 1 *
+bit 1864 I 1 IO_PAD735
+bit 1863 O 1 IO_PAD735 1862 1 Z
+bit 1862 C 1 *
+bit 1861 I 1 IO_PAD734
+bit 1860 O 1 IO_PAD734 1859 1 Z
+bit 1859 C 1 *
+bit 1858 I 1 IO_PAD733
+bit 1857 O 1 IO_PAD733 1856 1 Z
+bit 1856 C 1 *
+bit 1855 I 1 IO_PAD731
+bit 1854 O 1 IO_PAD731 1853 1 Z
+bit 1853 C 1 *
+bit 1852 O 1 *
+bit 1851 O 1 *
+bit 1850 O 1 *
+bit 1849 O 1 *
+bit 1848 O 1 *
+bit 1847 O 1 *
+bit 1846 I 1 IO_PAD729
+bit 1845 O 1 IO_PAD729 1844 1 Z
+bit 1844 C 1 *
+bit 1843 I 1 IO_PAD727
+bit 1842 O 1 IO_PAD727 1841 1 Z
+bit 1841 C 1 *
+bit 1840 I 1 IO_PAD726
+bit 1839 O 1 IO_PAD726 1838 1 Z
+bit 1838 C 1 *
+bit 1837 I 1 IO_PAD725
+bit 1836 O 1 IO_PAD725 1835 1 Z
+bit 1835 C 1 *
+bit 1834 I 1 IO_PAD724
+bit 1833 O 1 IO_PAD724 1832 1 Z
+bit 1832 C 1 *
+bit 1831 I 1 IO_PAD723
+bit 1830 O 1 IO_PAD723 1829 1 Z
+bit 1829 C 1 *
+bit 1828 I 1 IO_PAD722
+bit 1827 O 1 IO_PAD722 1826 1 Z
+bit 1826 C 1 *
+bit 1825 I 1 IO_PAD721
+bit 1824 O 1 IO_PAD721 1823 1 Z
+bit 1823 C 1 *
+bit 1822 I 1 IO_PAD720
+bit 1821 O 1 IO_PAD720 1820 1 Z
+bit 1820 C 1 *
+bit 1819 I 1 IO_PAD719
+bit 1818 O 1 IO_PAD719 1817 1 Z
+bit 1817 C 1 *
+bit 1816 I 1 IO_PAD717
+bit 1815 O 1 IO_PAD717 1814 1 Z
+bit 1814 C 1 *
+bit 1813 I 1 IO_PAD715
+bit 1812 O 1 IO_PAD715 1811 1 Z
+bit 1811 C 1 *
+bit 1810 I 1 IO_PAD714
+bit 1809 O 1 IO_PAD714 1808 1 Z
+bit 1808 C 1 *
+bit 1807 I 1 IO_PAD713
+bit 1806 O 1 IO_PAD713 1805 1 Z
+bit 1805 C 1 *
+bit 1804 I 1 IO_PAD712
+bit 1803 O 1 IO_PAD712 1802 1 Z
+bit 1802 C 1 *
+bit 1801 I 1 IO_PAD711
+bit 1800 O 1 IO_PAD711 1799 1 Z
+bit 1799 C 1 *
+bit 1798 I 1 IO_PAD709
+bit 1797 O 1 IO_PAD709 1796 1 Z
+bit 1796 C 1 *
+bit 1795 I 1 IO_PAD708
+bit 1794 O 1 IO_PAD708 1793 1 Z
+bit 1793 C 1 *
+bit 1792 I 1 IO_PAD707
+bit 1791 O 1 IO_PAD707 1790 1 Z
+bit 1790 C 1 *
+bit 1789 I 1 IO_PAD705
+bit 1788 O 1 IO_PAD705 1787 1 Z
+bit 1787 C 1 *
+bit 1786 O 1 *
+bit 1785 O 1 *
+bit 1784 O 1 *
+bit 1783 O 1 *
+bit 1782 O 1 *
+bit 1781 O 1 *
+bit 1780 I 1 IO_PAD704
+bit 1779 O 1 IO_PAD704 1778 1 Z
+bit 1778 C 1 *
+bit 1777 I 1 IO_PAD703
+bit 1776 O 1 IO_PAD703 1775 1 Z
+bit 1775 C 1 *
+bit 1774 I 1 IO_PAD701
+bit 1773 O 1 IO_PAD701 1772 1 Z
+bit 1772 C 1 *
+bit 1771 I 1 IO_PAD700
+bit 1770 O 1 IO_PAD700 1769 1 Z
+bit 1769 C 1 *
+bit 1768 I 1 IO_PAD699
+bit 1767 O 1 IO_PAD699 1766 1 Z
+bit 1766 C 1 *
+bit 1765 I 1 IO_PAD698
+bit 1764 O 1 IO_PAD698 1763 1 Z
+bit 1763 C 1 *
+bit 1762 I 1 IO_PAD697
+bit 1761 O 1 IO_PAD697 1760 1 Z
+bit 1760 C 1 *
+bit 1759 I 1 IO_PAD695
+bit 1758 O 1 IO_PAD695 1757 1 Z
+bit 1757 C 1 *
+bit 1756 I 1 IO_PAD693
+bit 1755 O 1 IO_PAD693 1754 1 Z
+bit 1754 C 1 *
+bit 1753 I 1 IO_PAD692
+bit 1752 O 1 IO_PAD692 1751 1 Z
+bit 1751 C 1 *
+bit 1750 I 1 IO_PAD691
+bit 1749 O 1 IO_PAD691 1748 1 Z
+bit 1748 C 1 *
+bit 1747 I 1 IO_PAD690
+bit 1746 O 1 IO_PAD690 1745 1 Z
+bit 1745 C 1 *
+bit 1744 I 1 IO_PAD689
+bit 1743 O 1 IO_PAD689 1742 1 Z
+bit 1742 C 1 *
+bit 1741 I 1 IO_PAD688
+bit 1740 O 1 IO_PAD688 1739 1 Z
+bit 1739 C 1 *
+bit 1738 I 1 IO_PAD687
+bit 1737 O 1 IO_PAD687 1736 1 Z
+bit 1736 C 1 *
+bit 1735 I 1 IO_PAD685
+bit 1734 O 1 IO_PAD685 1733 1 Z
+bit 1733 C 1 *
+bit 1732 I 1 IO_PAD683
+bit 1731 O 1 IO_PAD683 1730 1 Z
+bit 1730 C 1 *
+bit 1729 I 1 IO_PAD682
+bit 1728 O 1 IO_PAD682 1727 1 Z
+bit 1727 C 1 *
+bit 1726 I 1 IO_PAD681
+bit 1725 O 1 IO_PAD681 1724 1 Z
+bit 1724 C 1 *
+bit 1723 I 1 IO_PAD680
+bit 1722 O 1 IO_PAD680 1721 1 Z
+bit 1721 C 1 *
+bit 1720 I 1 IO_PAD679
+bit 1719 O 1 IO_PAD679 1718 1 Z
+bit 1718 C 1 *
+bit 1717 I 1 IO_PAD677
+bit 1716 O 1 IO_PAD677 1715 1 Z
+bit 1715 C 1 *
+bit 1714 I 1 IO_PAD675
+bit 1713 O 1 IO_PAD675 1712 1 Z
+bit 1712 C 1 *
+bit 1711 O 1 *
+bit 1710 O 1 *
+bit 1709 O 1 *
+bit 1708 O 1 *
+bit 1707 O 1 *
+bit 1706 O 1 *
+bit 1705 I 1 IO_PAD673
+bit 1704 O 1 IO_PAD673 1703 1 Z
+bit 1703 C 1 *
+bit 1702 I 1 IO_PAD671
+bit 1701 O 1 IO_PAD671 1700 1 Z
+bit 1700 C 1 *
+bit 1699 I 1 IO_PAD670
+bit 1698 O 1 IO_PAD670 1697 1 Z
+bit 1697 C 1 *
+bit 1696 I 1 IO_PAD669
+bit 1695 O 1 IO_PAD669 1694 1 Z
+bit 1694 C 1 *
+bit 1693 I 1 IO_PAD667
+bit 1692 O 1 IO_PAD667 1691 1 Z
+bit 1691 C 1 *
+bit 1690 I 1 IO_PAD666
+bit 1689 O 1 IO_PAD666 1688 1 Z
+bit 1688 C 1 *
+bit 1687 I 1 IO_PAD665
+bit 1686 O 1 IO_PAD665 1685 1 Z
+bit 1685 C 1 *
+bit 1684 I 1 IO_PAD663
+bit 1683 O 1 IO_PAD663 1682 1 Z
+bit 1682 C 1 *
+bit 1681 I 1 IO_PAD662
+bit 1680 O 1 IO_PAD662 1679 1 Z
+bit 1679 C 1 *
+bit 1678 I 1 IO_PAD661
+bit 1677 O 1 IO_PAD661 1676 1 Z
+bit 1676 C 1 *
+bit 1675 I 1 IO_PAD659
+bit 1674 O 1 IO_PAD659 1673 1 Z
+bit 1673 C 1 *
+bit 1672 I 1 IO_PAD658
+bit 1671 O 1 IO_PAD658 1670 1 Z
+bit 1670 C 1 *
+bit 1669 I 1 IO_PAD657
+bit 1668 O 1 IO_PAD657 1667 1 Z
+bit 1667 C 1 *
+bit 1666 I 1 CCLK_PAD654
+bit 1665 O 1 CCLK_PAD654 1664 1 Z
+bit 1664 C 1 *
+bit 1663 I 1 DONE_PAD653
+bit 1662 O 1 DONE_PAD653 1661 1 Z
+bit 1661 C 1 *
+bit 1660 I 1 IO_PAD652
+bit 1659 O 1 IO_PAD652 1658 1 Z
+bit 1658 C 1 *
+bit 1657 I 1 IO_PAD651
+bit 1656 O 1 IO_PAD651 1655 1 Z
+bit 1655 C 1 *
+bit 1654 I 1 IO_PAD649
+bit 1653 O 1 IO_PAD649 1652 1 Z
+bit 1652 C 1 *
+bit 1651 I 1 IO_PAD647
+bit 1650 O 1 IO_PAD647 1649 1 Z
+bit 1649 C 1 *
+bit 1648 I 1 IO_PAD646
+bit 1647 O 1 IO_PAD646 1646 1 Z
+bit 1646 C 1 *
+bit 1645 I 1 IO_PAD645
+bit 1644 O 1 IO_PAD645 1643 1 Z
+bit 1643 C 1 *
+bit 1642 I 1 IO_PAD643
+bit 1641 O 1 IO_PAD643 1640 1 Z
+bit 1640 C 1 *
+bit 1639 I 1 IO_PAD641
+bit 1638 O 1 IO_PAD641 1637 1 Z
+bit 1637 C 1 *
+bit 1636 I 1 IO_PAD639
+bit 1635 O 1 IO_PAD639 1634 1 Z
+bit 1634 C 1 *
+bit 1633 I 1 IO_PAD638
+bit 1632 O 1 IO_PAD638 1631 1 Z
+bit 1631 C 1 *
+bit 1630 I 1 IO_PAD637
+bit 1629 O 1 IO_PAD637 1628 1 Z
+bit 1628 C 1 *
+bit 1627 I 1 IO_PAD636
+bit 1626 O 1 IO_PAD636 1625 1 Z
+bit 1625 C 1 *
+bit 1624 I 1 IO_PAD635
+bit 1623 O 1 IO_PAD635 1622 1 Z
+bit 1622 C 1 *
+bit 1621 I 1 IO_PAD633
+bit 1620 O 1 IO_PAD633 1619 1 Z
+bit 1619 C 1 *
+bit 1618 I 1 IO_PAD631
+bit 1617 O 1 IO_PAD631 1616 1 Z
+bit 1616 C 1 *
+bit 1615 I 1 IO_PAD629
+bit 1614 O 1 IO_PAD629 1613 1 Z
+bit 1613 C 1 *
+bit 1612 I 1 IO_PAD627
+bit 1611 O 1 IO_PAD627 1610 1 Z
+bit 1610 C 1 *
+bit 1609 I 1 IO_PAD625
+bit 1608 O 1 IO_PAD625 1607 1 Z
+bit 1607 C 1 *
+bit 1606 I 1 IO_PAD623
+bit 1605 O 1 IO_PAD623 1604 1 Z
+bit 1604 C 1 *
+bit 1603 I 1 IO_PAD621
+bit 1602 O 1 IO_PAD621 1601 1 Z
+bit 1601 C 1 *
+bit 1600 I 1 IO_PAD620
+bit 1599 O 1 IO_PAD620 1598 1 Z
+bit 1598 C 1 *
+bit 1597 I 1 IO_PAD619
+bit 1596 O 1 IO_PAD619 1595 1 Z
+bit 1595 C 1 *
+bit 1594 I 1 IO_PAD618
+bit 1593 O 1 IO_PAD618 1592 1 Z
+bit 1592 C 1 *
+bit 1591 I 1 IO_PAD617
+bit 1590 O 1 IO_PAD617 1589 1 Z
+bit 1589 C 1 *
+bit 1588 I 1 IO_PAD615
+bit 1587 O 1 IO_PAD615 1586 1 Z
+bit 1586 C 1 *
+bit 1585 I 1 IO_PAD614
+bit 1584 O 1 IO_PAD614 1583 1 Z
+bit 1583 C 1 *
+bit 1582 I 1 IO_PAD613
+bit 1581 O 1 IO_PAD613 1580 1 Z
+bit 1580 C 1 *
+bit 1579 I 1 IO_PAD611
+bit 1578 O 1 IO_PAD611 1577 1 Z
+bit 1577 C 1 *
+bit 1576 I 1 IO_PAD609
+bit 1575 O 1 IO_PAD609 1574 1 Z
+bit 1574 C 1 *
+bit 1573 I 1 IO_PAD608
+bit 1572 O 1 IO_PAD608 1571 1 Z
+bit 1571 C 1 *
+bit 1570 I 1 IO_PAD607
+bit 1569 O 1 IO_PAD607 1568 1 Z
+bit 1568 C 1 *
+bit 1567 I 1 IO_PAD605
+bit 1566 O 1 IO_PAD605 1565 1 Z
+bit 1565 C 1 *
+bit 1564 I 1 IO_PAD603
+bit 1563 O 1 IO_PAD603 1562 1 Z
+bit 1562 C 1 *
+bit 1561 I 1 IO_PAD601
+bit 1560 O 1 IO_PAD601 1559 1 Z
+bit 1559 C 1 *
+bit 1558 I 1 IO_PAD599
+bit 1557 O 1 IO_PAD599 1556 1 Z
+bit 1556 C 1 *
+bit 1555 I 1 IO_PAD597
+bit 1554 O 1 IO_PAD597 1553 1 Z
+bit 1553 C 1 *
+bit 1552 I 1 IO_PAD596
+bit 1551 O 1 IO_PAD596 1550 1 Z
+bit 1550 C 1 *
+bit 1549 I 1 IO_PAD595
+bit 1548 O 1 IO_PAD595 1547 1 Z
+bit 1547 C 1 *
+bit 1546 I 1 IO_PAD593
+bit 1545 O 1 IO_PAD593 1544 1 Z
+bit 1544 C 1 *
+bit 1543 I 1 IO_PAD591
+bit 1542 O 1 IO_PAD591 1541 1 Z
+bit 1541 C 1 *
+bit 1540 I 1 IO_PAD590
+bit 1539 O 1 IO_PAD590 1538 1 Z
+bit 1538 C 1 *
+bit 1537 I 1 IO_PAD589
+bit 1536 O 1 IO_PAD589 1535 1 Z
+bit 1535 C 1 *
+bit 1534 I 1 IO_PAD587
+bit 1533 O 1 IO_PAD587 1532 1 Z
+bit 1532 C 1 *
+bit 1531 I 1 IO_PAD586
+bit 1530 O 1 IO_PAD586 1529 1 Z
+bit 1529 C 1 *
+bit 1528 I 1 IO_PAD585
+bit 1527 O 1 IO_PAD585 1526 1 Z
+bit 1526 C 1 *
+bit 1525 I 1 IO_PAD583
+bit 1524 O 1 IO_PAD583 1523 1 Z
+bit 1523 C 1 *
+bit 1522 I 1 IO_PAD581
+bit 1521 O 1 IO_PAD581 1520 1 Z
+bit 1520 C 1 *
+bit 1519 I 1 IO_PAD579
+bit 1518 O 1 IO_PAD579 1517 1 Z
+bit 1517 C 1 *
+bit 1516 I 1 IO_PAD578
+bit 1515 O 1 IO_PAD578 1514 1 Z
+bit 1514 C 1 *
+bit 1513 I 1 IO_PAD577
+bit 1512 O 1 IO_PAD577 1511 1 Z
+bit 1511 C 1 *
+bit 1510 I 1 IO_PAD575
+bit 1509 O 1 IO_PAD575 1508 1 Z
+bit 1508 C 1 *
+bit 1507 I 1 IO_PAD574
+bit 1506 O 1 IO_PAD574 1505 1 Z
+bit 1505 C 1 *
+bit 1504 I 1 IO_PAD573
+bit 1503 O 1 IO_PAD573 1502 1 Z
+bit 1502 C 1 *
+bit 1501 I 1 IO_PAD571
+bit 1500 O 1 IO_PAD571 1499 1 Z
+bit 1499 C 1 *
+bit 1498 I 1 IO_PAD569
+bit 1497 O 1 IO_PAD569 1496 1 Z
+bit 1496 C 1 *
+bit 1495 I 1 IO_PAD567
+bit 1494 O 1 IO_PAD567 1493 1 Z
+bit 1493 C 1 *
+bit 1492 I 1 IO_PAD566
+bit 1491 O 1 IO_PAD566 1490 1 Z
+bit 1490 C 1 *
+bit 1489 I 1 IO_PAD565
+bit 1488 O 1 IO_PAD565 1487 1 Z
+bit 1487 C 1 *
+bit 1486 I 1 IO_PAD563
+bit 1485 O 1 IO_PAD563 1484 1 Z
+bit 1484 C 1 *
+bit 1483 I 1 IO_PAD562
+bit 1482 O 1 IO_PAD562 1481 1 Z
+bit 1481 C 1 *
+bit 1480 I 1 IO_PAD561
+bit 1479 O 1 IO_PAD561 1478 1 Z
+bit 1478 C 1 *
+bit 1477 I 1 IO_PAD559
+bit 1476 O 1 IO_PAD559 1475 1 Z
+bit 1475 C 1 *
+bit 1474 I 1 IO_PAD557
+bit 1473 O 1 IO_PAD557 1472 1 Z
+bit 1472 C 1 *
+bit 1471 I 1 IO_PAD555
+bit 1470 O 1 IO_PAD555 1469 1 Z
+bit 1469 C 1 *
+bit 1468 I 1 IO_PAD554
+bit 1467 O 1 IO_PAD554 1466 1 Z
+bit 1466 C 1 *
+bit 1465 I 1 IO_PAD553
+bit 1464 O 1 IO_PAD553 1463 1 Z
+bit 1463 C 1 *
+bit 1462 I 1 IO_PAD551
+bit 1461 O 1 IO_PAD551 1460 1 Z
+bit 1460 C 1 *
+bit 1459 I 1 IO_PAD550
+bit 1458 O 1 IO_PAD550 1457 1 Z
+bit 1457 C 1 *
+bit 1456 I 1 IO_PAD549
+bit 1455 O 1 IO_PAD549 1454 1 Z
+bit 1454 C 1 *
+bit 1453 I 1 IO_PAD547
+bit 1452 O 1 IO_PAD547 1451 1 Z
+bit 1451 C 1 *
+bit 1450 I 1 IO_PAD545
+bit 1449 O 1 IO_PAD545 1448 1 Z
+bit 1448 C 1 *
+bit 1447 I 1 IO_PAD544
+bit 1446 O 1 IO_PAD544 1445 1 Z
+bit 1445 C 1 *
+bit 1444 I 1 IO_PAD543
+bit 1443 O 1 IO_PAD543 1442 1 Z
+bit 1442 C 1 *
+bit 1441 I 1 IO_PAD542
+bit 1440 O 1 IO_PAD542 1439 1 Z
+bit 1439 C 1 *
+bit 1438 I 1 IO_PAD541
+bit 1437 O 1 IO_PAD541 1436 1 Z
+bit 1436 C 1 *
+bit 1435 I 1 IO_PAD539
+bit 1434 O 1 IO_PAD539 1433 1 Z
+bit 1433 C 1 *
+bit 1432 I 1 IO_PAD537
+bit 1431 O 1 IO_PAD537 1430 1 Z
+bit 1430 C 1 *
+bit 1429 I 1 IO_PAD535
+bit 1428 O 1 IO_PAD535 1427 1 Z
+bit 1427 C 1 *
+bit 1426 I 1 IO_PAD533
+bit 1425 O 1 IO_PAD533 1424 1 Z
+bit 1424 C 1 *
+bit 1423 I 1 IO_PAD531
+bit 1422 O 1 IO_PAD531 1421 1 Z
+bit 1421 C 1 *
+bit 1420 I 1 IO_PAD530
+bit 1419 O 1 IO_PAD530 1418 1 Z
+bit 1418 C 1 *
+bit 1417 I 1 IO_PAD529
+bit 1416 O 1 IO_PAD529 1415 1 Z
+bit 1415 C 1 *
+bit 1414 I 1 IO_PAD527
+bit 1413 O 1 IO_PAD527 1412 1 Z
+bit 1412 C 1 *
+bit 1411 I 1 IO_PAD526
+bit 1410 O 1 IO_PAD526 1409 1 Z
+bit 1409 C 1 *
+bit 1408 I 1 IO_PAD525
+bit 1407 O 1 IO_PAD525 1406 1 Z
+bit 1406 C 1 *
+bit 1405 I 1 IO_PAD523
+bit 1404 O 1 IO_PAD523 1403 1 Z
+bit 1403 C 1 *
+bit 1402 I 1 IO_PAD521
+bit 1401 O 1 IO_PAD521 1400 1 Z
+bit 1400 C 1 *
+bit 1399 I 1 IO_PAD520
+bit 1398 O 1 IO_PAD520 1397 1 Z
+bit 1397 C 1 *
+bit 1396 I 1 IO_PAD519
+bit 1395 O 1 IO_PAD519 1394 1 Z
+bit 1394 C 1 *
+bit 1393 I 1 IO_PAD518
+bit 1392 O 1 IO_PAD518 1391 1 Z
+bit 1391 C 1 *
+bit 1390 I 1 IO_PAD516
+bit 1389 O 1 IO_PAD516 1388 1 Z
+bit 1388 C 1 *
+bit 1387 I 1 IO_PAD515
+bit 1386 O 1 IO_PAD515 1385 1 Z
+bit 1385 C 1 *
+bit 1384 I 1 IO_PAD514
+bit 1383 O 1 IO_PAD514 1382 1 Z
+bit 1382 C 1 *
+bit 1381 I 1 IO_PAD513
+bit 1380 O 1 IO_PAD513 1379 1 Z
+bit 1379 C 1 *
+bit 1378 I 1 IO_PAD511
+bit 1377 O 1 IO_PAD511 1376 1 Z
+bit 1376 C 1 *
+bit 1375 I 1 IO_PAD509
+bit 1374 O 1 IO_PAD509 1373 1 Z
+bit 1373 C 1 *
+bit 1372 I 1 IO_PAD508
+bit 1371 O 1 IO_PAD508 1370 1 Z
+bit 1370 C 1 *
+bit 1369 I 1 IO_PAD507
+bit 1368 O 1 IO_PAD507 1367 1 Z
+bit 1367 C 1 *
+bit 1366 I 1 IO_PAD505
+bit 1365 O 1 IO_PAD505 1364 1 Z
+bit 1364 C 1 *
+bit 1363 I 1 IO_PAD504
+bit 1362 O 1 IO_PAD504 1361 1 Z
+bit 1361 C 1 *
+bit 1360 I 1 IO_PAD503
+bit 1359 O 1 IO_PAD503 1358 1 Z
+bit 1358 C 1 *
+bit 1357 I 1 IO_PAD501
+bit 1356 O 1 IO_PAD501 1355 1 Z
+bit 1355 C 1 *
+bit 1354 I 1 IO_PAD499
+bit 1353 O 1 IO_PAD499 1352 1 Z
+bit 1352 C 1 *
+bit 1351 I 1 IO_PAD497
+bit 1350 O 1 IO_PAD497 1349 1 Z
+bit 1349 C 1 *
+bit 1348 I 1 IO_PAD495
+bit 1347 O 1 IO_PAD495 1346 1 Z
+bit 1346 C 1 *
+bit 1345 I 1 IO_PAD493
+bit 1344 O 1 IO_PAD493 1343 1 Z
+bit 1343 C 1 *
+bit 1342 I 1 IO_PAD492
+bit 1341 O 1 IO_PAD492 1340 1 Z
+bit 1340 C 1 *
+bit 1339 I 1 IO_PAD491
+bit 1338 O 1 IO_PAD491 1337 1 Z
+bit 1337 C 1 *
+bit 1336 I 1 IO_PAD490
+bit 1335 O 1 IO_PAD490 1334 1 Z
+bit 1334 C 1 *
+bit 1333 I 1 IO_PAD489
+bit 1332 O 1 IO_PAD489 1331 1 Z
+bit 1331 C 1 *
+bit 1330 I 1 IO_PAD487
+bit 1329 O 1 IO_PAD487 1328 1 Z
+bit 1328 C 1 *
+bit 1327 I 1 IO_PAD485
+bit 1326 O 1 IO_PAD485 1325 1 Z
+bit 1325 C 1 *
+bit 1324 I 1 IO_PAD484
+bit 1323 O 1 IO_PAD484 1322 1 Z
+bit 1322 C 1 *
+bit 1321 I 1 IO_PAD483
+bit 1320 O 1 IO_PAD483 1319 1 Z
+bit 1319 C 1 *
+bit 1318 I 1 IO_PAD481
+bit 1317 O 1 IO_PAD481 1316 1 Z
+bit 1316 C 1 *
+bit 1315 I 1 IO_PAD480
+bit 1314 O 1 IO_PAD480 1313 1 Z
+bit 1313 C 1 *
+bit 1312 I 1 IO_PAD479
+bit 1311 O 1 IO_PAD479 1310 1 Z
+bit 1310 C 1 *
+bit 1309 I 1 IO_PAD477
+bit 1308 O 1 IO_PAD477 1307 1 Z
+bit 1307 C 1 *
+bit 1306 I 1 IO_PAD475
+bit 1305 O 1 IO_PAD475 1304 1 Z
+bit 1304 C 1 *
+bit 1303 I 1 IO_PAD473
+bit 1302 O 1 IO_PAD473 1301 1 Z
+bit 1301 C 1 *
+bit 1300 I 1 IO_PAD472
+bit 1299 O 1 IO_PAD472 1298 1 Z
+bit 1298 C 1 *
+bit 1297 I 1 IO_PAD471
+bit 1296 O 1 IO_PAD471 1295 1 Z
+bit 1295 C 1 *
+bit 1294 I 1 IO_PAD469
+bit 1293 O 1 IO_PAD469 1292 1 Z
+bit 1292 C 1 *
+bit 1291 I 1 IO_PAD468
+bit 1290 O 1 IO_PAD468 1289 1 Z
+bit 1289 C 1 *
+bit 1288 I 1 IO_PAD467
+bit 1287 O 1 IO_PAD467 1286 1 Z
+bit 1286 C 1 *
+bit 1285 I 1 IO_PAD465
+bit 1284 O 1 IO_PAD465 1283 1 Z
+bit 1283 C 1 *
+bit 1282 I 1 IO_PAD463
+bit 1281 O 1 IO_PAD463 1280 1 Z
+bit 1280 C 1 *
+bit 1279 I 1 IO_PAD461
+bit 1278 O 1 IO_PAD461 1277 1 Z
+bit 1277 C 1 *
+bit 1276 I 1 IO_PAD460
+bit 1275 O 1 IO_PAD460 1274 1 Z
+bit 1274 C 1 *
+bit 1273 I 1 IO_PAD459
+bit 1272 O 1 IO_PAD459 1271 1 Z
+bit 1271 C 1 *
+bit 1270 I 1 IO_PAD457
+bit 1269 O 1 IO_PAD457 1268 1 Z
+bit 1268 C 1 *
+bit 1267 I 1 IO_PAD456
+bit 1266 O 1 IO_PAD456 1265 1 Z
+bit 1265 C 1 *
+bit 1264 I 1 IO_PAD455
+bit 1263 O 1 IO_PAD455 1262 1 Z
+bit 1262 C 1 *
+bit 1261 I 1 IO_PAD453
+bit 1260 O 1 IO_PAD453 1259 1 Z
+bit 1259 C 1 *
+bit 1258 I 1 IO_PAD451
+bit 1257 O 1 IO_PAD451 1256 1 Z
+bit 1256 C 1 *
+bit 1255 I 1 IO_PAD449
+bit 1254 O 1 IO_PAD449 1253 1 Z
+bit 1253 C 1 *
+bit 1252 I 1 IO_PAD448
+bit 1251 O 1 IO_PAD448 1250 1 Z
+bit 1250 C 1 *
+bit 1249 I 1 IO_PAD447
+bit 1248 O 1 IO_PAD447 1247 1 Z
+bit 1247 C 1 *
+bit 1246 I 1 IO_PAD445
+bit 1245 O 1 IO_PAD445 1244 1 Z
+bit 1244 C 1 *
+bit 1243 I 1 IO_PAD444
+bit 1242 O 1 IO_PAD444 1241 1 Z
+bit 1241 C 1 *
+bit 1240 I 1 IO_PAD443
+bit 1239 O 1 IO_PAD443 1238 1 Z
+bit 1238 C 1 *
+bit 1237 I 1 IO_PAD441
+bit 1236 O 1 IO_PAD441 1235 1 Z
+bit 1235 C 1 *
+bit 1234 I 1 IO_PAD439
+bit 1233 O 1 IO_PAD439 1232 1 Z
+bit 1232 C 1 *
+bit 1231 I 1 IO_PAD438
+bit 1230 O 1 IO_PAD438 1229 1 Z
+bit 1229 C 1 *
+bit 1228 I 1 IO_PAD437
+bit 1227 O 1 IO_PAD437 1226 1 Z
+bit 1226 C 1 *
+bit 1225 I 1 IO_PAD435
+bit 1224 O 1 IO_PAD435 1223 1 Z
+bit 1223 C 1 *
+bit 1222 I 1 IO_PAD433
+bit 1221 O 1 IO_PAD433 1220 1 Z
+bit 1220 C 1 *
+bit 1219 I 1 IO_PAD431
+bit 1218 O 1 IO_PAD431 1217 1 Z
+bit 1217 C 1 *
+bit 1216 I 1 IO_PAD429
+bit 1215 O 1 IO_PAD429 1214 1 Z
+bit 1214 C 1 *
+bit 1213 I 1 IO_PAD427
+bit 1212 O 1 IO_PAD427 1211 1 Z
+bit 1211 C 1 *
+bit 1210 I 1 IO_PAD426
+bit 1209 O 1 IO_PAD426 1208 1 Z
+bit 1208 C 1 *
+bit 1207 I 1 IO_PAD425
+bit 1206 O 1 IO_PAD425 1205 1 Z
+bit 1205 C 1 *
+bit 1204 I 1 IO_PAD423
+bit 1203 O 1 IO_PAD423 1202 1 Z
+bit 1202 C 1 *
+bit 1201 I 1 IO_PAD421
+bit 1200 O 1 IO_PAD421 1199 1 Z
+bit 1199 C 1 *
+bit 1198 I 1 IO_PAD420
+bit 1197 O 1 IO_PAD420 1196 1 Z
+bit 1196 C 1 *
+bit 1195 I 1 IO_PAD419
+bit 1194 O 1 IO_PAD419 1193 1 Z
+bit 1193 C 1 *
+bit 1192 I 1 IO_PAD417
+bit 1191 O 1 IO_PAD417 1190 1 Z
+bit 1190 C 1 *
+bit 1189 I 1 IO_PAD416
+bit 1188 O 1 IO_PAD416 1187 1 Z
+bit 1187 C 1 *
+bit 1186 I 1 IO_PAD415
+bit 1185 O 1 IO_PAD415 1184 1 Z
+bit 1184 C 1 *
+bit 1183 I 1 IO_PAD414
+bit 1182 O 1 IO_PAD414 1181 1 Z
+bit 1181 C 1 *
+bit 1180 I 1 IO_PAD413
+bit 1179 O 1 IO_PAD413 1178 1 Z
+bit 1178 C 1 *
+bit 1177 I 1 IO_PAD411
+bit 1176 O 1 IO_PAD411 1175 1 Z
+bit 1175 C 1 *
+bit 1174 I 1 IO_PAD409
+bit 1173 O 1 IO_PAD409 1172 1 Z
+bit 1172 C 1 *
+bit 1171 I 1 IO_PAD407
+bit 1170 O 1 IO_PAD407 1169 1 Z
+bit 1169 C 1 *
+bit 1168 I 1 IO_PAD406
+bit 1167 O 1 IO_PAD406 1166 1 Z
+bit 1166 C 1 *
+bit 1165 I 1 IO_PAD405
+bit 1164 O 1 IO_PAD405 1163 1 Z
+bit 1163 C 1 *
+bit 1162 I 1 IO_PAD403
+bit 1161 O 1 IO_PAD403 1160 1 Z
+bit 1160 C 1 *
+bit 1159 I 1 IO_PAD401
+bit 1158 O 1 IO_PAD401 1157 1 Z
+bit 1157 C 1 *
+bit 1156 I 1 IO_PAD400
+bit 1155 O 1 IO_PAD400 1154 1 Z
+bit 1154 C 1 *
+bit 1153 I 1 IO_PAD399
+bit 1152 O 1 IO_PAD399 1151 1 Z
+bit 1151 C 1 *
+bit 1150 I 1 IO_PAD398
+bit 1149 O 1 IO_PAD398 1148 1 Z
+bit 1148 C 1 *
+bit 1147 I 1 IO_PAD397
+bit 1146 O 1 IO_PAD397 1145 1 Z
+bit 1145 C 1 *
+bit 1144 I 1 IO_PAD395
+bit 1143 O 1 IO_PAD395 1142 1 Z
+bit 1142 C 1 *
+bit 1141 I 1 IO_PAD393
+bit 1140 O 1 IO_PAD393 1139 1 Z
+bit 1139 C 1 *
+bit 1138 I 1 IO_PAD391
+bit 1137 O 1 IO_PAD391 1136 1 Z
+bit 1136 C 1 *
+bit 1135 I 1 IO_PAD390
+bit 1134 O 1 IO_PAD390 1133 1 Z
+bit 1133 C 1 *
+bit 1132 I 1 IO_PAD389
+bit 1131 O 1 IO_PAD389 1130 1 Z
+bit 1130 C 1 *
+bit 1129 I 1 IO_PAD387
+bit 1128 O 1 IO_PAD387 1127 1 Z
+bit 1127 C 1 *
+bit 1126 I 1 IO_PAD385
+bit 1125 O 1 IO_PAD385 1124 1 Z
+bit 1124 C 1 *
+bit 1123 I 1 IO_PAD384
+bit 1122 O 1 IO_PAD384 1121 1 Z
+bit 1121 C 1 *
+bit 1120 I 1 M2_PAD383
+bit 1119 I 1 M0_PAD382
+bit 1118 I 1 M1_PAD381
+bit 1117 I 1 IO_PAD377
+bit 1116 O 1 IO_PAD377 1115 1 Z
+bit 1115 C 1 *
+bit 1114 I 1 IO_PAD376
+bit 1113 O 1 IO_PAD376 1112 1 Z
+bit 1112 C 1 *
+bit 1111 I 1 IO_PAD375
+bit 1110 O 1 IO_PAD375 1109 1 Z
+bit 1109 C 1 *
+bit 1108 I 1 IO_PAD373
+bit 1107 O 1 IO_PAD373 1106 1 Z
+bit 1106 C 1 *
+bit 1105 I 1 IO_PAD372
+bit 1104 O 1 IO_PAD372 1103 1 Z
+bit 1103 C 1 *
+bit 1102 I 1 IO_PAD371
+bit 1101 O 1 IO_PAD371 1100 1 Z
+bit 1100 C 1 *
+bit 1099 I 1 IO_PAD369
+bit 1098 O 1 IO_PAD369 1097 1 Z
+bit 1097 C 1 *
+bit 1096 I 1 IO_PAD368
+bit 1095 O 1 IO_PAD368 1094 1 Z
+bit 1094 C 1 *
+bit 1093 I 1 IO_PAD367
+bit 1092 O 1 IO_PAD367 1091 1 Z
+bit 1091 C 1 *
+bit 1090 I 1 IO_PAD365
+bit 1089 O 1 IO_PAD365 1088 1 Z
+bit 1088 C 1 *
+bit 1087 I 1 IO_PAD364
+bit 1086 O 1 IO_PAD364 1085 1 Z
+bit 1085 C 1 *
+bit 1084 I 1 IO_PAD363
+bit 1083 O 1 IO_PAD363 1082 1 Z
+bit 1082 C 1 *
+bit 1081 I 1 IO_PAD361
+bit 1080 O 1 IO_PAD361 1079 1 Z
+bit 1079 C 1 *
+bit 1078 O 1 *
+bit 1077 O 1 *
+bit 1076 O 1 *
+bit 1075 O 1 *
+bit 1074 O 1 *
+bit 1073 O 1 *
+bit 1072 I 1 IO_PAD359
+bit 1071 O 1 IO_PAD359 1070 1 Z
+bit 1070 C 1 *
+bit 1069 I 1 IO_PAD357
+bit 1068 O 1 IO_PAD357 1067 1 Z
+bit 1067 C 1 *
+bit 1066 I 1 IO_PAD355
+bit 1065 O 1 IO_PAD355 1064 1 Z
+bit 1064 C 1 *
+bit 1063 I 1 IO_PAD354
+bit 1062 O 1 IO_PAD354 1061 1 Z
+bit 1061 C 1 *
+bit 1060 I 1 IO_PAD353
+bit 1059 O 1 IO_PAD353 1058 1 Z
+bit 1058 C 1 *
+bit 1057 I 1 IO_PAD352
+bit 1056 O 1 IO_PAD352 1055 1 Z
+bit 1055 C 1 *
+bit 1054 I 1 IO_PAD351
+bit 1053 O 1 IO_PAD351 1052 1 Z
+bit 1052 C 1 *
+bit 1051 I 1 IO_PAD349
+bit 1050 O 1 IO_PAD349 1049 1 Z
+bit 1049 C 1 *
+bit 1048 I 1 IO_PAD347
+bit 1047 O 1 IO_PAD347 1046 1 Z
+bit 1046 C 1 *
+bit 1045 I 1 IO_PAD346
+bit 1044 O 1 IO_PAD346 1043 1 Z
+bit 1043 C 1 *
+bit 1042 I 1 IO_PAD345
+bit 1041 O 1 IO_PAD345 1040 1 Z
+bit 1040 C 1 *
+bit 1039 I 1 IO_PAD344
+bit 1038 O 1 IO_PAD344 1037 1 Z
+bit 1037 C 1 *
+bit 1036 I 1 IO_PAD343
+bit 1035 O 1 IO_PAD343 1034 1 Z
+bit 1034 C 1 *
+bit 1033 I 1 IO_PAD342
+bit 1032 O 1 IO_PAD342 1031 1 Z
+bit 1031 C 1 *
+bit 1030 I 1 IO_PAD341
+bit 1029 O 1 IO_PAD341 1028 1 Z
+bit 1028 C 1 *
+bit 1027 I 1 IO_PAD339
+bit 1026 O 1 IO_PAD339 1025 1 Z
+bit 1025 C 1 *
+bit 1024 I 1 IO_PAD337
+bit 1023 O 1 IO_PAD337 1022 1 Z
+bit 1022 C 1 *
+bit 1021 I 1 IO_PAD336
+bit 1020 O 1 IO_PAD336 1019 1 Z
+bit 1019 C 1 *
+bit 1018 I 1 IO_PAD335
+bit 1017 O 1 IO_PAD335 1016 1 Z
+bit 1016 C 1 *
+bit 1015 I 1 IO_PAD334
+bit 1014 O 1 IO_PAD334 1013 1 Z
+bit 1013 C 1 *
+bit 1012 I 1 IO_PAD333
+bit 1011 O 1 IO_PAD333 1010 1 Z
+bit 1010 C 1 *
+bit 1009 I 1 IO_PAD331
+bit 1008 O 1 IO_PAD331 1007 1 Z
+bit 1007 C 1 *
+bit 1006 I 1 IO_PAD330
+bit 1005 O 1 IO_PAD330 1004 1 Z
+bit 1004 C 1 *
+bit 1003 O 1 *
+bit 1002 O 1 *
+bit 1001 O 1 *
+bit 1000 O 1 *
+bit 999 O 1 *
+bit 998 O 1 *
+bit 997 I 1 IO_PAD329
+bit 996 O 1 IO_PAD329 995 1 Z
+bit 995 C 1 *
+bit 994 I 1 IO_PAD327
+bit 993 O 1 IO_PAD327 992 1 Z
+bit 992 C 1 *
+bit 991 I 1 IO_PAD326
+bit 990 O 1 IO_PAD326 989 1 Z
+bit 989 C 1 *
+bit 988 I 1 IO_PAD325
+bit 987 O 1 IO_PAD325 986 1 Z
+bit 986 C 1 *
+bit 985 I 1 IO_PAD323
+bit 984 O 1 IO_PAD323 983 1 Z
+bit 983 C 1 *
+bit 982 I 1 IO_PAD322
+bit 981 O 1 IO_PAD322 980 1 Z
+bit 980 C 1 *
+bit 979 I 1 IO_PAD321
+bit 978 O 1 IO_PAD321 977 1 Z
+bit 977 C 1 *
+bit 976 I 1 IO_PAD320
+bit 975 O 1 IO_PAD320 974 1 Z
+bit 974 C 1 *
+bit 973 I 1 IO_PAD319
+bit 972 O 1 IO_PAD319 971 1 Z
+bit 971 C 1 *
+bit 970 I 1 IO_PAD317
+bit 969 O 1 IO_PAD317 968 1 Z
+bit 968 C 1 *
+bit 967 I 1 IO_PAD315
+bit 966 O 1 IO_PAD315 965 1 Z
+bit 965 C 1 *
+bit 964 I 1 IO_PAD314
+bit 963 O 1 IO_PAD314 962 1 Z
+bit 962 C 1 *
+bit 961 I 1 IO_PAD313
+bit 960 O 1 IO_PAD313 959 1 Z
+bit 959 C 1 *
+bit 958 I 1 IO_PAD312
+bit 957 O 1 IO_PAD312 956 1 Z
+bit 956 C 1 *
+bit 955 I 1 IO_PAD311
+bit 954 O 1 IO_PAD311 953 1 Z
+bit 953 C 1 *
+bit 952 I 1 IO_PAD310
+bit 951 O 1 IO_PAD310 950 1 Z
+bit 950 C 1 *
+bit 949 I 1 IO_PAD309
+bit 948 O 1 IO_PAD309 947 1 Z
+bit 947 C 1 *
+bit 946 I 1 IO_PAD308
+bit 945 O 1 IO_PAD308 944 1 Z
+bit 944 C 1 *
+bit 943 I 1 IO_PAD307
+bit 942 O 1 IO_PAD307 941 1 Z
+bit 941 C 1 *
+bit 940 I 1 IO_PAD305
+bit 939 O 1 IO_PAD305 938 1 Z
+bit 938 C 1 *
+bit 937 O 1 *
+bit 936 O 1 *
+bit 935 O 1 *
+bit 934 O 1 *
+bit 933 O 1 *
+bit 932 O 1 *
+bit 931 I 1 IO_PAD303
+bit 930 O 1 IO_PAD303 929 1 Z
+bit 929 C 1 *
+bit 928 I 1 IO_PAD301
+bit 927 O 1 IO_PAD301 926 1 Z
+bit 926 C 1 *
+bit 925 I 1 IO_PAD300
+bit 924 O 1 IO_PAD300 923 1 Z
+bit 923 C 1 *
+bit 922 I 1 IO_PAD299
+bit 921 O 1 IO_PAD299 920 1 Z
+bit 920 C 1 *
+bit 919 I 1 IO_PAD298
+bit 918 O 1 IO_PAD298 917 1 Z
+bit 917 C 1 *
+bit 916 I 1 IO_PAD297
+bit 915 O 1 IO_PAD297 914 1 Z
+bit 914 C 1 *
+bit 913 I 1 IO_PAD295
+bit 912 O 1 IO_PAD295 911 1 Z
+bit 911 C 1 *
+bit 910 I 1 IO_PAD293
+bit 909 O 1 IO_PAD293 908 1 Z
+bit 908 C 1 *
+bit 907 I 1 IO_PAD292
+bit 906 O 1 IO_PAD292 905 1 Z
+bit 905 C 1 *
+bit 904 I 1 IO_PAD291
+bit 903 O 1 IO_PAD291 902 1 Z
+bit 902 C 1 *
+bit 901 I 1 IO_PAD290
+bit 900 O 1 IO_PAD290 899 1 Z
+bit 899 C 1 *
+bit 898 I 1 IO_PAD289
+bit 897 O 1 IO_PAD289 896 1 Z
+bit 896 C 1 *
+bit 895 I 1 IO_PAD287
+bit 894 O 1 IO_PAD287 893 1 Z
+bit 893 C 1 *
+bit 892 I 1 IO_PAD285
+bit 891 O 1 IO_PAD285 890 1 Z
+bit 890 C 1 *
+bit 889 I 1 IO_PAD284
+bit 888 O 1 IO_PAD284 887 1 Z
+bit 887 C 1 *
+bit 886 I 1 IO_PAD283
+bit 885 O 1 IO_PAD283 884 1 Z
+bit 884 C 1 *
+bit 883 I 1 IO_PAD282
+bit 882 O 1 IO_PAD282 881 1 Z
+bit 881 C 1 *
+bit 880 I 1 IO_PAD281
+bit 879 O 1 IO_PAD281 878 1 Z
+bit 878 C 1 *
+bit 877 I 1 IO_PAD279
+bit 876 O 1 IO_PAD279 875 1 Z
+bit 875 C 1 *
+bit 874 I 1 IO_PAD278
+bit 873 O 1 IO_PAD278 872 1 Z
+bit 872 C 1 *
+bit 871 I 1 IO_PAD277
+bit 870 O 1 IO_PAD277 869 1 Z
+bit 869 C 1 *
+bit 868 I 1 IO_PAD275
+bit 867 O 1 IO_PAD275 866 1 Z
+bit 866 C 1 *
+bit 865 I 1 IO_PAD273
+bit 864 O 1 IO_PAD273 863 1 Z
+bit 863 C 1 *
+bit 862 O 1 *
+bit 861 O 1 *
+bit 860 O 1 *
+bit 859 O 1 *
+bit 858 O 1 *
+bit 857 O 1 *
+bit 856 I 1 IO_PAD271
+bit 855 O 1 IO_PAD271 854 1 Z
+bit 854 C 1 *
+bit 853 I 1 IO_PAD269
+bit 852 O 1 IO_PAD269 851 1 Z
+bit 851 C 1 *
+bit 850 I 1 IO_PAD268
+bit 849 O 1 IO_PAD268 848 1 Z
+bit 848 C 1 *
+bit 847 I 1 IO_PAD267
+bit 846 O 1 IO_PAD267 845 1 Z
+bit 845 C 1 *
+bit 844 I 1 IO_PAD266
+bit 843 O 1 IO_PAD266 842 1 Z
+bit 842 C 1 *
+bit 841 I 1 IO_PAD265
+bit 840 O 1 IO_PAD265 839 1 Z
+bit 839 C 1 *
+bit 838 I 1 IO_PAD263
+bit 837 O 1 IO_PAD263 836 1 Z
+bit 836 C 1 *
+bit 835 I 1 IO_PAD261
+bit 834 O 1 IO_PAD261 833 1 Z
+bit 833 C 1 *
+bit 832 I 1 IO_PAD260
+bit 831 O 1 IO_PAD260 830 1 Z
+bit 830 C 1 *
+bit 829 I 1 IO_PAD258
+bit 828 O 1 IO_PAD258 827 1 Z
+bit 827 C 1 *
+bit 826 I 1 IO_PAD257
+bit 825 O 1 IO_PAD257 824 1 Z
+bit 824 C 1 *
+bit 823 I 1 IO_PAD255
+bit 822 O 1 IO_PAD255 821 1 Z
+bit 821 C 1 *
+bit 820 I 1 IO_PAD253
+bit 819 O 1 IO_PAD253 818 1 Z
+bit 818 C 1 *
+bit 817 I 1 IO_PAD252
+bit 816 O 1 IO_PAD252 815 1 Z
+bit 815 C 1 *
+bit 814 I 1 IO_PAD251
+bit 813 O 1 IO_PAD251 812 1 Z
+bit 812 C 1 *
+bit 811 I 1 IO_PAD250
+bit 810 O 1 IO_PAD250 809 1 Z
+bit 809 C 1 *
+bit 808 I 1 IO_PAD249
+bit 807 O 1 IO_PAD249 806 1 Z
+bit 806 C 1 *
+bit 805 I 1 IO_PAD247
+bit 804 O 1 IO_PAD247 803 1 Z
+bit 803 C 1 *
+bit 802 O 1 *
+bit 801 O 1 *
+bit 800 O 1 *
+bit 799 O 1 *
+bit 798 O 1 *
+bit 797 O 1 *
+bit 796 I 1 IO_PAD245
+bit 795 O 1 IO_PAD245 794 1 Z
+bit 794 C 1 *
+bit 793 I 1 IO_PAD243
+bit 792 O 1 IO_PAD243 791 1 Z
+bit 791 C 1 *
+bit 790 I 1 IO_PAD241
+bit 789 O 1 IO_PAD241 788 1 Z
+bit 788 C 1 *
+bit 787 I 1 IO_PAD240
+bit 786 O 1 IO_PAD240 785 1 Z
+bit 785 C 1 *
+bit 784 I 1 IO_PAD239
+bit 783 O 1 IO_PAD239 782 1 Z
+bit 782 C 1 *
+bit 781 I 1 IO_PAD237
+bit 780 O 1 IO_PAD237 779 1 Z
+bit 779 C 1 *
+bit 778 I 1 IO_PAD236
+bit 777 O 1 IO_PAD236 776 1 Z
+bit 776 C 1 *
+bit 775 I 1 IO_PAD235
+bit 774 O 1 IO_PAD235 773 1 Z
+bit 773 C 1 *
+bit 772 I 1 IO_PAD234
+bit 771 O 1 IO_PAD234 770 1 Z
+bit 770 C 1 *
+bit 769 I 1 IO_PAD233
+bit 768 O 1 IO_PAD233 767 1 Z
+bit 767 C 1 *
+bit 766 I 1 IO_PAD231
+bit 765 O 1 IO_PAD231 764 1 Z
+bit 764 C 1 *
+bit 763 I 1 IO_PAD229
+bit 762 O 1 IO_PAD229 761 1 Z
+bit 761 C 1 *
+bit 760 I 1 IO_PAD228
+bit 759 O 1 IO_PAD228 758 1 Z
+bit 758 C 1 *
+bit 757 I 1 IO_PAD227
+bit 756 O 1 IO_PAD227 755 1 Z
+bit 755 C 1 *
+bit 754 I 1 IO_PAD226
+bit 753 O 1 IO_PAD226 752 1 Z
+bit 752 C 1 *
+bit 751 I 1 IO_PAD225
+bit 750 O 1 IO_PAD225 749 1 Z
+bit 749 C 1 *
+bit 748 I 1 IO_PAD223
+bit 747 O 1 IO_PAD223 746 1 Z
+bit 746 C 1 *
+bit 745 I 1 IO_PAD221
+bit 744 O 1 IO_PAD221 743 1 Z
+bit 743 C 1 *
+bit 742 I 1 IO_PAD220
+bit 741 O 1 IO_PAD220 740 1 Z
+bit 740 C 1 *
+bit 739 I 1 IO_PAD219
+bit 738 O 1 IO_PAD219 737 1 Z
+bit 737 C 1 *
+bit 736 I 1 IO_PAD218
+bit 735 O 1 IO_PAD218 734 1 Z
+bit 734 C 1 *
+bit 733 I 1 IO_PAD217
+bit 732 O 1 IO_PAD217 731 1 Z
+bit 731 C 1 *
+bit 730 I 1 IO_PAD215
+bit 729 O 1 IO_PAD215 728 1 Z
+bit 728 C 1 *
+bit 727 O 1 *
+bit 726 O 1 *
+bit 725 O 1 *
+bit 724 O 1 *
+bit 723 O 1 *
+bit 722 O 1 *
+bit 721 I 1 IO_PAD213
+bit 720 O 1 IO_PAD213 719 1 Z
+bit 719 C 1 *
+bit 718 I 1 IO_PAD211
+bit 717 O 1 IO_PAD211 716 1 Z
+bit 716 C 1 *
+bit 715 I 1 IO_PAD210
+bit 714 O 1 IO_PAD210 713 1 Z
+bit 713 C 1 *
+bit 712 I 1 IO_PAD209
+bit 711 O 1 IO_PAD209 710 1 Z
+bit 710 C 1 *
+bit 709 I 1 IO_PAD208
+bit 708 O 1 IO_PAD208 707 1 Z
+bit 707 C 1 *
+bit 706 I 1 IO_PAD207
+bit 705 O 1 IO_PAD207 704 1 Z
+bit 704 C 1 *
+bit 703 I 1 IO_PAD206
+bit 702 O 1 IO_PAD206 701 1 Z
+bit 701 C 1 *
+bit 700 I 1 IO_PAD205
+bit 699 O 1 IO_PAD205 698 1 Z
+bit 698 C 1 *
+bit 697 I 1 IO_PAD204
+bit 696 O 1 IO_PAD204 695 1 Z
+bit 695 C 1 *
+bit 694 I 1 IO_PAD203
+bit 693 O 1 IO_PAD203 692 1 Z
+bit 692 C 1 *
+bit 691 I 1 IO_PAD201
+bit 690 O 1 IO_PAD201 689 1 Z
+bit 689 C 1 *
+bit 688 I 1 IO_PAD199
+bit 687 O 1 IO_PAD199 686 1 Z
+bit 686 C 1 *
+bit 685 I 1 IO_PAD198
+bit 684 O 1 IO_PAD198 683 1 Z
+bit 683 C 1 *
+bit 682 I 1 IO_PAD197
+bit 681 O 1 IO_PAD197 680 1 Z
+bit 680 C 1 *
+bit 679 I 1 IO_PAD196
+bit 678 O 1 IO_PAD196 677 1 Z
+bit 677 C 1 *
+bit 676 I 1 IO_PAD195
+bit 675 O 1 IO_PAD195 674 1 Z
+bit 674 C 1 *
+bit 673 I 1 IO_PAD193
+bit 672 O 1 IO_PAD193 671 1 Z
+bit 671 C 1 *
+bit 670 I 1 IO_PAD192
+bit 669 O 1 IO_PAD192 668 1 Z
+bit 668 C 1 *
+bit 667 I 1 IO_PAD191
+bit 666 O 1 IO_PAD191 665 1 Z
+bit 665 C 1 *
+bit 664 I 1 IO_PAD189
+bit 663 O 1 IO_PAD189 662 1 Z
+bit 662 C 1 *
+bit 661 O 1 *
+bit 660 O 1 *
+bit 659 O 1 *
+bit 658 O 1 *
+bit 657 O 1 *
+bit 656 O 1 *
+bit 655 I 1 IO_PAD188
+bit 654 O 1 IO_PAD188 653 1 Z
+bit 653 C 1 *
+bit 652 I 1 IO_PAD187
+bit 651 O 1 IO_PAD187 650 1 Z
+bit 650 C 1 *
+bit 649 I 1 IO_PAD185
+bit 648 O 1 IO_PAD185 647 1 Z
+bit 647 C 1 *
+bit 646 I 1 IO_PAD184
+bit 645 O 1 IO_PAD184 644 1 Z
+bit 644 C 1 *
+bit 643 I 1 IO_PAD183
+bit 642 O 1 IO_PAD183 641 1 Z
+bit 641 C 1 *
+bit 640 I 1 IO_PAD182
+bit 639 O 1 IO_PAD182 638 1 Z
+bit 638 C 1 *
+bit 637 I 1 IO_PAD181
+bit 636 O 1 IO_PAD181 635 1 Z
+bit 635 C 1 *
+bit 634 I 1 IO_PAD179
+bit 633 O 1 IO_PAD179 632 1 Z
+bit 632 C 1 *
+bit 631 I 1 IO_PAD177
+bit 630 O 1 IO_PAD177 629 1 Z
+bit 629 C 1 *
+bit 628 I 1 IO_PAD176
+bit 627 O 1 IO_PAD176 626 1 Z
+bit 626 C 1 *
+bit 625 I 1 IO_PAD175
+bit 624 O 1 IO_PAD175 623 1 Z
+bit 623 C 1 *
+bit 622 I 1 IO_PAD174
+bit 621 O 1 IO_PAD174 620 1 Z
+bit 620 C 1 *
+bit 619 I 1 IO_PAD173
+bit 618 O 1 IO_PAD173 617 1 Z
+bit 617 C 1 *
+bit 616 I 1 IO_PAD172
+bit 615 O 1 IO_PAD172 614 1 Z
+bit 614 C 1 *
+bit 613 I 1 IO_PAD171
+bit 612 O 1 IO_PAD171 611 1 Z
+bit 611 C 1 *
+bit 610 I 1 IO_PAD169
+bit 609 O 1 IO_PAD169 608 1 Z
+bit 608 C 1 *
+bit 607 I 1 IO_PAD167
+bit 606 O 1 IO_PAD167 605 1 Z
+bit 605 C 1 *
+bit 604 I 1 IO_PAD166
+bit 603 O 1 IO_PAD166 602 1 Z
+bit 602 C 1 *
+bit 601 I 1 IO_PAD165
+bit 600 O 1 IO_PAD165 599 1 Z
+bit 599 C 1 *
+bit 598 I 1 IO_PAD164
+bit 597 O 1 IO_PAD164 596 1 Z
+bit 596 C 1 *
+bit 595 I 1 IO_PAD163
+bit 594 O 1 IO_PAD163 593 1 Z
+bit 593 C 1 *
+bit 592 I 1 IO_PAD161
+bit 591 O 1 IO_PAD161 590 1 Z
+bit 590 C 1 *
+bit 589 I 1 IO_PAD159
+bit 588 O 1 IO_PAD159 587 1 Z
+bit 587 C 1 *
+bit 586 O 1 *
+bit 585 O 1 *
+bit 584 O 1 *
+bit 583 O 1 *
+bit 582 O 1 *
+bit 581 O 1 *
+bit 580 I 1 IO_PAD157
+bit 579 O 1 IO_PAD157 578 1 Z
+bit 578 C 1 *
+bit 577 I 1 IO_PAD155
+bit 576 O 1 IO_PAD155 575 1 Z
+bit 575 C 1 *
+bit 574 I 1 IO_PAD154
+bit 573 O 1 IO_PAD154 572 1 Z
+bit 572 C 1 *
+bit 571 I 1 IO_PAD153
+bit 570 O 1 IO_PAD153 569 1 Z
+bit 569 C 1 *
+bit 568 I 1 IO_PAD151
+bit 567 O 1 IO_PAD151 566 1 Z
+bit 566 C 1 *
+bit 565 I 1 IO_PAD150
+bit 564 O 1 IO_PAD150 563 1 Z
+bit 563 C 1 *
+bit 562 I 1 IO_PAD149
+bit 561 O 1 IO_PAD149 560 1 Z
+bit 560 C 1 *
+bit 559 I 1 IO_PAD147
+bit 558 O 1 IO_PAD147 557 1 Z
+bit 557 C 1 *
+bit 556 I 1 IO_PAD146
+bit 555 O 1 IO_PAD146 554 1 Z
+bit 554 C 1 *
+bit 553 I 1 IO_PAD145
+bit 552 O 1 IO_PAD145 551 1 Z
+bit 551 C 1 *
+bit 550 I 1 IO_PAD143
+bit 549 O 1 IO_PAD143 548 1 Z
+bit 548 C 1 *
+bit 547 I 1 IO_PAD142
+bit 546 O 1 IO_PAD142 545 1 Z
+bit 545 C 1 *
+bit 544 I 1 IO_PAD141
+bit 543 O 1 IO_PAD141 542 1 Z
+bit 542 C 1 *
+bit 541 O 1 *
+bit 540 I 1 HSWAP_EN_PAD137
+bit 539 I 1 IO_PAD136
+bit 538 O 1 IO_PAD136 537 1 Z
+bit 537 C 1 *
+bit 536 I 1 IO_PAD135
+bit 535 O 1 IO_PAD135 534 1 Z
+bit 534 C 1 *
+bit 533 I 1 IO_PAD133
+bit 532 O 1 IO_PAD133 531 1 Z
+bit 531 C 1 *
+bit 530 I 1 IO_PAD131
+bit 529 O 1 IO_PAD131 528 1 Z
+bit 528 C 1 *
+bit 527 I 1 IO_PAD130
+bit 526 O 1 IO_PAD130 525 1 Z
+bit 525 C 1 *
+bit 524 I 1 IO_PAD129
+bit 523 O 1 IO_PAD129 522 1 Z
+bit 522 C 1 *
+bit 521 I 1 IO_PAD127
+bit 520 O 1 IO_PAD127 519 1 Z
+bit 519 C 1 *
+bit 518 I 1 IO_PAD125
+bit 517 O 1 IO_PAD125 516 1 Z
+bit 516 C 1 *
+bit 515 I 1 IO_PAD123
+bit 514 O 1 IO_PAD123 513 1 Z
+bit 513 C 1 *
+bit 512 I 1 IO_PAD122
+bit 511 O 1 IO_PAD122 510 1 Z
+bit 510 C 1 *
+bit 509 I 1 IO_PAD121
+bit 508 O 1 IO_PAD121 507 1 Z
+bit 507 C 1 *
+bit 506 I 1 IO_PAD120
+bit 505 O 1 IO_PAD120 504 1 Z
+bit 504 C 1 *
+bit 503 I 1 IO_PAD119
+bit 502 O 1 IO_PAD119 501 1 Z
+bit 501 C 1 *
+bit 500 I 1 IO_PAD117
+bit 499 O 1 IO_PAD117 498 1 Z
+bit 498 C 1 *
+bit 497 I 1 IO_PAD115
+bit 496 O 1 IO_PAD115 495 1 Z
+bit 495 C 1 *
+bit 494 I 1 IO_PAD113
+bit 493 O 1 IO_PAD113 492 1 Z
+bit 492 C 1 *
+bit 491 I 1 IO_PAD111
+bit 490 O 1 IO_PAD111 489 1 Z
+bit 489 C 1 *
+bit 488 I 1 IO_PAD109
+bit 487 O 1 IO_PAD109 486 1 Z
+bit 486 C 1 *
+bit 485 I 1 IO_PAD107
+bit 484 O 1 IO_PAD107 483 1 Z
+bit 483 C 1 *
+bit 482 I 1 IO_PAD105
+bit 481 O 1 IO_PAD105 480 1 Z
+bit 480 C 1 *
+bit 479 I 1 IO_PAD104
+bit 478 O 1 IO_PAD104 477 1 Z
+bit 477 C 1 *
+bit 476 I 1 IO_PAD103
+bit 475 O 1 IO_PAD103 474 1 Z
+bit 474 C 1 *
+bit 473 I 1 IO_PAD102
+bit 472 O 1 IO_PAD102 471 1 Z
+bit 471 C 1 *
+bit 470 I 1 IO_PAD101
+bit 469 O 1 IO_PAD101 468 1 Z
+bit 468 C 1 *
+bit 467 I 1 IO_PAD99
+bit 466 O 1 IO_PAD99 465 1 Z
+bit 465 C 1 *
+bit 464 I 1 IO_PAD98
+bit 463 O 1 IO_PAD98 462 1 Z
+bit 462 C 1 *
+bit 461 I 1 IO_PAD97
+bit 460 O 1 IO_PAD97 459 1 Z
+bit 459 C 1 *
+bit 458 I 1 IO_PAD95
+bit 457 O 1 IO_PAD95 456 1 Z
+bit 456 C 1 *
+bit 455 I 1 IO_PAD93
+bit 454 O 1 IO_PAD93 453 1 Z
+bit 453 C 1 *
+bit 452 I 1 IO_PAD92
+bit 451 O 1 IO_PAD92 450 1 Z
+bit 450 C 1 *
+bit 449 I 1 IO_PAD91
+bit 448 O 1 IO_PAD91 447 1 Z
+bit 447 C 1 *
+bit 446 I 1 IO_PAD89
+bit 445 O 1 IO_PAD89 444 1 Z
+bit 444 C 1 *
+bit 443 I 1 IO_PAD87
+bit 442 O 1 IO_PAD87 441 1 Z
+bit 441 C 1 *
+bit 440 I 1 IO_PAD85
+bit 439 O 1 IO_PAD85 438 1 Z
+bit 438 C 1 *
+bit 437 I 1 IO_PAD83
+bit 436 O 1 IO_PAD83 435 1 Z
+bit 435 C 1 *
+bit 434 I 1 IO_PAD81
+bit 433 O 1 IO_PAD81 432 1 Z
+bit 432 C 1 *
+bit 431 I 1 IO_PAD80
+bit 430 O 1 IO_PAD80 429 1 Z
+bit 429 C 1 *
+bit 428 I 1 IO_PAD79
+bit 427 O 1 IO_PAD79 426 1 Z
+bit 426 C 1 *
+bit 425 I 1 IO_PAD77
+bit 424 O 1 IO_PAD77 423 1 Z
+bit 423 C 1 *
+bit 422 I 1 IO_PAD75
+bit 421 O 1 IO_PAD75 420 1 Z
+bit 420 C 1 *
+bit 419 I 1 IO_PAD74
+bit 418 O 1 IO_PAD74 417 1 Z
+bit 417 C 1 *
+bit 416 I 1 IO_PAD73
+bit 415 O 1 IO_PAD73 414 1 Z
+bit 414 C 1 *
+bit 413 I 1 IO_PAD71
+bit 412 O 1 IO_PAD71 411 1 Z
+bit 411 C 1 *
+bit 410 I 1 IO_PAD70
+bit 409 O 1 IO_PAD70 408 1 Z
+bit 408 C 1 *
+bit 407 I 1 IO_PAD69
+bit 406 O 1 IO_PAD69 405 1 Z
+bit 405 C 1 *
+bit 404 I 1 IO_PAD67
+bit 403 O 1 IO_PAD67 402 1 Z
+bit 402 C 1 *
+bit 401 I 1 IO_PAD65
+bit 400 O 1 IO_PAD65 399 1 Z
+bit 399 C 1 *
+bit 398 I 1 IO_PAD63
+bit 397 O 1 IO_PAD63 396 1 Z
+bit 396 C 1 *
+bit 395 I 1 IO_PAD62
+bit 394 O 1 IO_PAD62 393 1 Z
+bit 393 C 1 *
+bit 392 I 1 IO_PAD61
+bit 391 O 1 IO_PAD61 390 1 Z
+bit 390 C 1 *
+bit 389 I 1 IO_PAD59
+bit 388 O 1 IO_PAD59 387 1 Z
+bit 387 C 1 *
+bit 386 I 1 IO_PAD58
+bit 385 O 1 IO_PAD58 384 1 Z
+bit 384 C 1 *
+bit 383 I 1 IO_PAD57
+bit 382 O 1 IO_PAD57 381 1 Z
+bit 381 C 1 *
+bit 380 I 1 IO_PAD55
+bit 379 O 1 IO_PAD55 378 1 Z
+bit 378 C 1 *
+bit 377 I 1 IO_PAD53
+bit 376 O 1 IO_PAD53 375 1 Z
+bit 375 C 1 *
+bit 374 I 1 IO_PAD51
+bit 373 O 1 IO_PAD51 372 1 Z
+bit 372 C 1 *
+bit 371 I 1 IO_PAD50
+bit 370 O 1 IO_PAD50 369 1 Z
+bit 369 C 1 *
+bit 368 I 1 IO_PAD49
+bit 367 O 1 IO_PAD49 366 1 Z
+bit 366 C 1 *
+bit 365 I 1 IO_PAD47
+bit 364 O 1 IO_PAD47 363 1 Z
+bit 363 C 1 *
+bit 362 I 1 IO_PAD46
+bit 361 O 1 IO_PAD46 360 1 Z
+bit 360 C 1 *
+bit 359 I 1 IO_PAD45
+bit 358 O 1 IO_PAD45 357 1 Z
+bit 357 C 1 *
+bit 356 I 1 IO_PAD43
+bit 355 O 1 IO_PAD43 354 1 Z
+bit 354 C 1 *
+bit 353 I 1 IO_PAD41
+bit 352 O 1 IO_PAD41 351 1 Z
+bit 351 C 1 *
+bit 350 I 1 IO_PAD39
+bit 349 O 1 IO_PAD39 348 1 Z
+bit 348 C 1 *
+bit 347 I 1 IO_PAD38
+bit 346 O 1 IO_PAD38 345 1 Z
+bit 345 C 1 *
+bit 344 I 1 IO_PAD37
+bit 343 O 1 IO_PAD37 342 1 Z
+bit 342 C 1 *
+bit 341 I 1 IO_PAD35
+bit 340 O 1 IO_PAD35 339 1 Z
+bit 339 C 1 *
+bit 338 I 1 IO_PAD34
+bit 337 O 1 IO_PAD34 336 1 Z
+bit 336 C 1 *
+bit 335 I 1 IO_PAD33
+bit 334 O 1 IO_PAD33 333 1 Z
+bit 333 C 1 *
+bit 332 I 1 IO_PAD31
+bit 331 O 1 IO_PAD31 330 1 Z
+bit 330 C 1 *
+bit 329 I 1 IO_PAD29
+bit 328 O 1 IO_PAD29 327 1 Z
+bit 327 C 1 *
+bit 326 I 1 IO_PAD28
+bit 325 O 1 IO_PAD28 324 1 Z
+bit 324 C 1 *
+bit 323 I 1 IO_PAD27
+bit 322 O 1 IO_PAD27 321 1 Z
+bit 321 C 1 *
+bit 320 I 1 IO_PAD26
+bit 319 O 1 IO_PAD26 318 1 Z
+bit 318 C 1 *
+bit 317 I 1 IO_PAD25
+bit 316 O 1 IO_PAD25 315 1 Z
+bit 315 C 1 *
+bit 314 I 1 IO_PAD23
+bit 313 O 1 IO_PAD23 312 1 Z
+bit 312 C 1 *
+bit 311 I 1 IO_PAD21
+bit 310 O 1 IO_PAD21 309 1 Z
+bit 309 C 1 *
+bit 308 I 1 IO_PAD19
+bit 307 O 1 IO_PAD19 306 1 Z
+bit 306 C 1 *
+bit 305 I 1 IO_PAD17
+bit 304 O 1 IO_PAD17 303 1 Z
+bit 303 C 1 *
+bit 302 I 1 IO_PAD15
+bit 301 O 1 IO_PAD15 300 1 Z
+bit 300 C 1 *
+bit 299 I 1 IO_PAD14
+bit 298 O 1 IO_PAD14 297 1 Z
+bit 297 C 1 *
+bit 296 I 1 IO_PAD13
+bit 295 O 1 IO_PAD13 294 1 Z
+bit 294 C 1 *
+bit 293 I 1 IO_PAD11
+bit 292 O 1 IO_PAD11 291 1 Z
+bit 291 C 1 *
+bit 290 I 1 IO_PAD10
+bit 289 O 1 IO_PAD10 288 1 Z
+bit 288 C 1 *
+bit 287 I 1 IO_PAD9
+bit 286 O 1 IO_PAD9 285 1 Z
+bit 285 C 1 *
+bit 284 I 1 IO_PAD7
+bit 283 O 1 IO_PAD7 282 1 Z
+bit 282 C 1 *
+bit 281 I 1 IO_PAD5
+bit 280 O 1 IO_PAD5 279 1 Z
+bit 279 C 1 *
+bit 278 I 1 IO_PAD4
+bit 277 O 1 IO_PAD4 276 1 Z
+bit 276 C 1 *
+bit 275 I 1 IO_PAD3
+bit 274 O 1 IO_PAD3 273 1 Z
+bit 273 C 1 *
+bit 272 I 1 IO_PAD2
+bit 271 O 1 IO_PAD2 270 1 Z
+bit 270 C 1 *
+bit 269 I 1 IO_PAD1030
+bit 268 O 1 IO_PAD1030 267 1 Z
+bit 267 C 1 *
+bit 266 I 1 IO_PAD1029
+bit 265 O 1 IO_PAD1029 264 1 Z
+bit 264 C 1 *
+bit 263 I 1 IO_PAD1028
+bit 262 O 1 IO_PAD1028 261 1 Z
+bit 261 C 1 *
+bit 260 I 1 IO_PAD1027
+bit 259 O 1 IO_PAD1027 258 1 Z
+bit 258 C 1 *
+bit 257 I 1 IO_PAD1025
+bit 256 O 1 IO_PAD1025 255 1 Z
+bit 255 C 1 *
+bit 254 I 1 IO_PAD1023
+bit 253 O 1 IO_PAD1023 252 1 Z
+bit 252 C 1 *
+bit 251 I 1 IO_PAD1022
+bit 250 O 1 IO_PAD1022 249 1 Z
+bit 249 C 1 *
+bit 248 I 1 IO_PAD1021
+bit 247 O 1 IO_PAD1021 246 1 Z
+bit 246 C 1 *
+bit 245 I 1 IO_PAD1019
+bit 244 O 1 IO_PAD1019 243 1 Z
+bit 243 C 1 *
+bit 242 I 1 IO_PAD1018
+bit 241 O 1 IO_PAD1018 240 1 Z
+bit 240 C 1 *
+bit 239 I 1 IO_PAD1017
+bit 238 O 1 IO_PAD1017 237 1 Z
+bit 237 C 1 *
+bit 236 I 1 IO_PAD1015
+bit 235 O 1 IO_PAD1015 234 1 Z
+bit 234 C 1 *
+bit 233 I 1 IO_PAD1013
+bit 232 O 1 IO_PAD1013 231 1 Z
+bit 231 C 1 *
+bit 230 I 1 IO_PAD1011
+bit 229 O 1 IO_PAD1011 228 1 Z
+bit 228 C 1 *
+bit 227 I 1 IO_PAD1009
+bit 226 O 1 IO_PAD1009 225 1 Z
+bit 225 C 1 *
+bit 224 I 1 IO_PAD1007
+bit 223 O 1 IO_PAD1007 222 1 Z
+bit 222 C 1 *
+bit 221 I 1 IO_PAD1006
+bit 220 O 1 IO_PAD1006 219 1 Z
+bit 219 C 1 *
+bit 218 I 1 IO_PAD1005
+bit 217 O 1 IO_PAD1005 216 1 Z
+bit 216 C 1 *
+bit 215 I 1 IO_PAD1004
+bit 214 O 1 IO_PAD1004 213 1 Z
+bit 213 C 1 *
+bit 212 I 1 IO_PAD1003
+bit 211 O 1 IO_PAD1003 210 1 Z
+bit 210 C 1 *
+bit 209 I 1 IO_PAD1001
+bit 208 O 1 IO_PAD1001 207 1 Z
+bit 207 C 1 *
+bit 206 I 1 IO_PAD999
+bit 205 O 1 IO_PAD999 204 1 Z
+bit 204 C 1 *
+bit 203 I 1 IO_PAD998
+bit 202 O 1 IO_PAD998 201 1 Z
+bit 201 C 1 *
+bit 200 I 1 IO_PAD997
+bit 199 O 1 IO_PAD997 198 1 Z
+bit 198 C 1 *
+bit 197 I 1 IO_PAD995
+bit 196 O 1 IO_PAD995 195 1 Z
+bit 195 C 1 *
+bit 194 I 1 IO_PAD994
+bit 193 O 1 IO_PAD994 192 1 Z
+bit 192 C 1 *
+bit 191 I 1 IO_PAD993
+bit 190 O 1 IO_PAD993 189 1 Z
+bit 189 C 1 *
+bit 188 I 1 IO_PAD991
+bit 187 O 1 IO_PAD991 186 1 Z
+bit 186 C 1 *
+bit 185 I 1 IO_PAD989
+bit 184 O 1 IO_PAD989 183 1 Z
+bit 183 C 1 *
+bit 182 I 1 IO_PAD987
+bit 181 O 1 IO_PAD987 180 1 Z
+bit 180 C 1 *
+bit 179 I 1 IO_PAD986
+bit 178 O 1 IO_PAD986 177 1 Z
+bit 177 C 1 *
+bit 176 I 1 IO_PAD985
+bit 175 O 1 IO_PAD985 174 1 Z
+bit 174 C 1 *
+bit 173 I 1 IO_PAD983
+bit 172 O 1 IO_PAD983 171 1 Z
+bit 171 C 1 *
+bit 170 I 1 IO_PAD982
+bit 169 O 1 IO_PAD982 168 1 Z
+bit 168 C 1 *
+bit 167 I 1 IO_PAD981
+bit 166 O 1 IO_PAD981 165 1 Z
+bit 165 C 1 *
+bit 164 I 1 IO_PAD979
+bit 163 O 1 IO_PAD979 162 1 Z
+bit 162 C 1 *
+bit 161 I 1 IO_PAD977
+bit 160 O 1 IO_PAD977 159 1 Z
+bit 159 C 1 *
+bit 158 I 1 IO_PAD975
+bit 157 O 1 IO_PAD975 156 1 Z
+bit 156 C 1 *
+bit 155 I 1 IO_PAD974
+bit 154 O 1 IO_PAD974 153 1 Z
+bit 153 C 1 *
+bit 152 I 1 IO_PAD973
+bit 151 O 1 IO_PAD973 150 1 Z
+bit 150 C 1 *
+bit 149 I 1 IO_PAD971
+bit 148 O 1 IO_PAD971 147 1 Z
+bit 147 C 1 *
+bit 146 I 1 IO_PAD970
+bit 145 O 1 IO_PAD970 144 1 Z
+bit 144 C 1 *
+bit 143 I 1 IO_PAD969
+bit 142 O 1 IO_PAD969 141 1 Z
+bit 141 C 1 *
+bit 140 I 1 IO_PAD967
+bit 139 O 1 IO_PAD967 138 1 Z
+bit 138 C 1 *
+bit 137 I 1 IO_PAD965
+bit 136 O 1 IO_PAD965 135 1 Z
+bit 135 C 1 *
+bit 134 I 1 IO_PAD963
+bit 133 O 1 IO_PAD963 132 1 Z
+bit 132 C 1 *
+bit 131 I 1 IO_PAD962
+bit 130 O 1 IO_PAD962 129 1 Z
+bit 129 C 1 *
+bit 128 I 1 IO_PAD961
+bit 127 O 1 IO_PAD961 126 1 Z
+bit 126 C 1 *
+bit 125 I 1 IO_PAD959
+bit 124 O 1 IO_PAD959 123 1 Z
+bit 123 C 1 *
+bit 122 I 1 IO_PAD958
+bit 121 O 1 IO_PAD958 120 1 Z
+bit 120 C 1 *
+bit 119 I 1 IO_PAD957
+bit 118 O 1 IO_PAD957 117 1 Z
+bit 117 C 1 *
+bit 116 I 1 IO_PAD955
+bit 115 O 1 IO_PAD955 114 1 Z
+bit 114 C 1 *
+bit 113 I 1 IO_PAD953
+bit 112 O 1 IO_PAD953 111 1 Z
+bit 111 C 1 *
+bit 110 I 1 IO_PAD952
+bit 109 O 1 IO_PAD952 108 1 Z
+bit 108 C 1 *
+bit 107 I 1 IO_PAD951
+bit 106 O 1 IO_PAD951 105 1 Z
+bit 105 C 1 *
+bit 104 I 1 IO_PAD949
+bit 103 O 1 IO_PAD949 102 1 Z
+bit 102 C 1 *
+bit 101 I 1 IO_PAD947
+bit 100 O 1 IO_PAD947 99 1 Z
+bit 99 C 1 *
+bit 98 I 1 IO_PAD945
+bit 97 O 1 IO_PAD945 96 1 Z
+bit 96 C 1 *
+bit 95 I 1 IO_PAD943
+bit 94 O 1 IO_PAD943 93 1 Z
+bit 93 C 1 *
+bit 92 I 1 IO_PAD941
+bit 91 O 1 IO_PAD941 90 1 Z
+bit 90 C 1 *
+bit 89 I 1 IO_PAD940
+bit 88 O 1 IO_PAD940 87 1 Z
+bit 87 C 1 *
+bit 86 I 1 IO_PAD939
+bit 85 O 1 IO_PAD939 84 1 Z
+bit 84 C 1 *
+bit 83 I 1 IO_PAD937
+bit 82 O 1 IO_PAD937 81 1 Z
+bit 81 C 1 *
+bit 80 I 1 IO_PAD935
+bit 79 O 1 IO_PAD935 78 1 Z
+bit 78 C 1 *
+bit 77 I 1 IO_PAD934
+bit 76 O 1 IO_PAD934 75 1 Z
+bit 75 C 1 *
+bit 74 I 1 IO_PAD933
+bit 73 O 1 IO_PAD933 72 1 Z
+bit 72 C 1 *
+bit 71 I 1 IO_PAD931
+bit 70 O 1 IO_PAD931 69 1 Z
+bit 69 C 1 *
+bit 68 I 1 IO_PAD930
+bit 67 O 1 IO_PAD930 66 1 Z
+bit 66 C 1 *
+bit 65 I 1 IO_PAD929
+bit 64 O 1 IO_PAD929 63 1 Z
+bit 63 C 1 *
+bit 62 I 1 IO_PAD928
+bit 61 O 1 IO_PAD928 60 1 Z
+bit 60 C 1 *
+bit 59 I 1 IO_PAD927
+bit 58 O 1 IO_PAD927 57 1 Z
+bit 57 C 1 *
+bit 56 I 1 IO_PAD925
+bit 55 O 1 IO_PAD925 54 1 Z
+bit 54 C 1 *
+bit 53 I 1 IO_PAD923
+bit 52 O 1 IO_PAD923 51 1 Z
+bit 51 C 1 *
+bit 50 I 1 IO_PAD921
+bit 49 O 1 IO_PAD921 48 1 Z
+bit 48 C 1 *
+bit 47 I 1 IO_PAD920
+bit 46 O 1 IO_PAD920 45 1 Z
+bit 45 C 1 *
+bit 44 I 1 IO_PAD919
+bit 43 O 1 IO_PAD919 42 1 Z
+bit 42 C 1 *
+bit 41 I 1 IO_PAD917
+bit 40 O 1 IO_PAD917 39 1 Z
+bit 39 C 1 *
+bit 38 I 1 IO_PAD915
+bit 37 O 1 IO_PAD915 36 1 Z
+bit 36 C 1 *
+bit 35 I 1 IO_PAD914
+bit 34 O 1 IO_PAD914 33 1 Z
+bit 33 C 1 *
+bit 32 I 1 IO_PAD913
+bit 31 O 1 IO_PAD913 30 1 Z
+bit 30 C 1 *
+bit 29 I 1 IO_PAD912
+bit 28 O 1 IO_PAD912 27 1 Z
+bit 27 C 1 *
+bit 26 I 1 IO_PAD911
+bit 25 O 1 IO_PAD911 24 1 Z
+bit 24 C 1 *
+bit 23 I 1 IO_PAD909
+bit 22 O 1 IO_PAD909 21 1 Z
+bit 21 C 1 *
+bit 20 I 1 IO_PAD907
+bit 19 O 1 IO_PAD907 18 1 Z
+bit 18 C 1 *
+bit 17 I 1 IO_PAD905
+bit 16 O 1 IO_PAD905 15 1 Z
+bit 15 C 1 *
+bit 14 I 1 IO_PAD904
+bit 13 O 1 IO_PAD904 12 1 Z
+bit 12 C 1 *
+bit 11 I 1 IO_PAD903
+bit 10 O 1 IO_PAD903 9 1 Z
+bit 9 C 1 *
+bit 8 I 1 IO_PAD901
+bit 7 O 1 IO_PAD901 6 1 Z
+bit 6 C 1 *
+bit 5 I 1 IO_PAD899
+bit 4 O 1 IO_PAD899 3 1 Z
+bit 3 C 1 *
+bit 2 I 1 IO_PAD898
+bit 1 O 1 IO_PAD898 0 1 Z
+bit 0 C 1 *
--- /dev/null
+signal GND1
+signal GND2
+signal GND3
+signal GND4
+signal GND5
+signal GND6
+signal GND7
+signal GND8
+signal GND9
+signal GND10
+signal GND11
+signal GND12
+signal GND13
+signal GND14
+signal GND15
+signal GND16
+signal GND17
+signal GND18
+signal GND19
+signal GND20
+signal GND21
+signal GND22
+signal GND23
+signal GND24
+signal GND25
+signal GND26
+signal GND27
+signal GND28
+signal GND29
+signal GND30
+signal GND31
+signal GND32
+signal GND33
+signal GND34
+signal GND35
+signal GND36
+signal GND37
+signal GND38
+signal GND39
+signal GND40
+signal GND41
+signal GND42
+signal GND43
+signal GND44
+signal GND45
+signal GND46
+signal GND47
+signal GND48
+signal GND49
+signal GND50
+signal GND51
+signal GND52
+signal GND53
+signal GND54
+signal GND55
+signal GND56
+signal GND57
+signal GND58
+signal GND59
+signal GND60
+signal GND61
+signal GND62
+signal GND63
+signal GND64
+signal GND65
+signal GND66
+signal GND67
+signal GND68
+signal GND69
+signal GND70
+signal GND71
+signal GND72
+signal GND73
+signal GND74
+signal GND75
+signal GND76
+signal GND77
+signal GND78
+signal GND79
+signal GND80
+signal GND81
+signal GND82
+signal GND83
+signal GND84
+signal GND85
+signal GND86
+signal GND87
+signal GND88
+signal GND89
+signal GND90
+signal GND91
+signal GND92
+signal GND93
+signal GND94
+signal GND95
+signal GND96
+signal GND97
+signal GND98
+signal GND99
+signal GND100
+signal GND101
+signal GND102
+signal GND103
+signal GND104
+signal GND105
+signal GND106
+signal GND107
+signal GND108
+signal GND109
+signal GND110
+signal GND111
+signal GND112
+signal GND113
+signal GND114
+signal GND115
+signal GND116
+signal GND117
+signal GND118
+signal GND119
+signal GND120
+signal GND121
+signal GND122
+signal GND123
+signal GND124
+signal GND125
+signal GND126
+signal GND127
+signal GND128
+signal GND129
+signal GND130
+signal GND131
+signal GND132
+signal GND133
+signal GND134
+signal GND135
+signal GND136
+signal GND137
+signal GND138
+signal GND139
+signal GND140
+signal GND141
+signal GND142
+signal GND143
+signal GND144
+signal GND145
+signal GND146
+signal GND147
+signal GND148
+signal GND149
+signal GND150
+signal GND151
+signal GND152
+signal GND153
+signal GND154
+signal GND155
+signal GND156
+signal GND157
+signal GND158
+signal GND159
+signal GND160
+signal GND161
+signal GND162
+signal GND163
+signal GND164
+signal GND165
+signal GND166
+signal GND167
+signal GND168
+signal GND169
+signal GND170
+signal GND171
+signal GND172
+signal GND173
+signal GND174
+signal GND175
+signal GND176
+signal GND177
+signal GND178
+signal GND179
+signal GND180
+signal GND181
+signal GND182
+signal GND183
+signal GND184
+signal CCLK_AL31
+signal DONE_AD24
+signal HSWAP_EN_L11
+signal M0_AL4
+signal M1_AK4
+signal M2_AG8
+signal PROG_B
+signal TCK
+signal TDI
+signal TDO
+signal TMS
+signal VCCAUX1
+signal VCCAUX2
+signal VCCAUX3
+signal VCCAUX4
+signal VCCAUX5
+signal VCCAUX6
+signal VCCAUX7
+signal VCCAUX8
+signal VCCAUX9
+signal VCCAUX10
+signal VCCAUX11
+signal VCCAUX12
+signal VCCAUX13
+signal VCCAUX14
+signal VCCAUX15
+signal VCCAUX16
+signal VCCAUX17
+signal VCCAUX18
+signal VCCAUX19
+signal VCCAUX20
+signal VCCAUX21
+signal VCCAUX22
+signal VCCAUX23
+signal VCCAUX24
+signal VCCAUX25
+signal VCCAUX26
+signal VCCAUX27
+signal VCCAUX28
+signal VCCAUX29
+signal VCCAUX30
+signal VCCAUX31
+signal VCCAUX32
+signal VCCINT1
+signal VCCINT2
+signal VCCINT3
+signal VCCINT4
+signal VCCINT5
+signal VCCINT6
+signal VCCINT7
+signal VCCINT8
+signal VCCINT9
+signal VCCINT10
+signal VCCINT11
+signal VCCINT12
+signal VCCINT13
+signal VCCINT14
+signal VCCINT15
+signal VCCINT16
+signal VCCINT17
+signal VCCINT18
+signal VCCINT19
+signal VCCINT20
+signal VCCINT21
+signal VCCINT22
+signal VCCINT23
+signal VCCINT24
+signal VCCINT25
+signal VCCINT26
+signal VCCINT27
+signal VCCINT28
+signal VCCINT29
+signal VCCINT30
+signal VCCINT31
+signal VCCINT32
+signal VCCINT33
+signal VCCINT34
+signal VCCINT35
+signal VCCINT36
+signal VCCINT37
+signal VCCINT38
+signal VCCINT39
+signal VCCINT40
+signal VCCO01
+signal VCCO02
+signal VCCO03
+signal VCCO04
+signal VCCO05
+signal VCCO06
+signal VCCO07
+signal VCCO08
+signal VCCO09
+signal VCCO010
+signal VCCO011
+signal VCCO012
+signal VCCO013
+signal VCCO11
+signal VCCO12
+signal VCCO13
+signal VCCO14
+signal VCCO15
+signal VCCO16
+signal VCCO17
+signal VCCO18
+signal VCCO19
+signal VCCO110
+signal VCCO111
+signal VCCO112
+signal VCCO113
+signal VCCO21
+signal VCCO22
+signal VCCO23
+signal VCCO24
+signal VCCO25
+signal VCCO26
+signal VCCO27
+signal VCCO28
+signal VCCO29
+signal VCCO210
+signal VCCO211
+signal VCCO212
+signal VCCO213
+signal VCCO31
+signal VCCO32
+signal VCCO33
+signal VCCO34
+signal VCCO35
+signal VCCO36
+signal VCCO37
+signal VCCO38
+signal VCCO39
+signal VCCO310
+signal VCCO311
+signal VCCO312
+signal VCCO313
+signal VCCO41
+signal VCCO42
+signal VCCO43
+signal VCCO44
+signal VCCO45
+signal VCCO46
+signal VCCO47
+signal VCCO48
+signal VCCO49
+signal VCCO410
+signal VCCO411
+signal VCCO412
+signal VCCO413
+signal VCCO51
+signal VCCO52
+signal VCCO53
+signal VCCO54
+signal VCCO55
+signal VCCO56
+signal VCCO57
+signal VCCO58
+signal VCCO59
+signal VCCO510
+signal VCCO511
+signal VCCO512
+signal VCCO513
+signal VCCO61
+signal VCCO62
+signal VCCO63
+signal VCCO64
+signal VCCO65
+signal VCCO66
+signal VCCO67
+signal VCCO68
+signal VCCO69
+signal VCCO610
+signal VCCO611
+signal VCCO612
+signal VCCO613
+signal VCCO71
+signal VCCO72
+signal VCCO73
+signal VCCO74
+signal VCCO75
+signal VCCO76
+signal VCCO77
+signal VCCO78
+signal VCCO79
+signal VCCO710
+signal VCCO711
+signal VCCO712
+signal VCCO713
+signal IO_A3
+signal IO_A4
+signal IO_A6
+signal IO_A8
+signal IO_A10
+signal IO_A12
+signal IO_A14
+signal IO_A15
+signal IO_A17
+signal IO_A18
+signal IO_A20
+signal IO_A21
+signal IO_A23
+signal IO_A24
+signal IO_A25
+signal IO_A27
+signal IO_A29
+signal IO_A31
+signal IO_A32
+signal IO_B3
+signal IO_B4
+signal IO_B5
+signal IO_B6
+signal IO_B8
+signal IO_B9
+signal IO_B10
+signal IO_B12
+signal IO_B14
+signal IO_B15
+signal IO_B16
+signal IO_B17
+signal IO_B18
+signal IO_B19
+signal IO_B20
+signal IO_B21
+signal IO_B23
+signal IO_B24
+signal IO_B25
+signal IO_B26
+signal IO_B27
+signal IO_B29
+signal IO_B30
+signal IO_B31
+signal IO_B32
+signal IO_C1
+signal IO_C2
+signal IO_C5
+signal IO_C6
+signal IO_C9
+signal IO_C10
+signal IO_C12
+signal IO_C13
+signal IO_C14
+signal IO_C15
+signal IO_C16
+signal IO_C17
+signal IO_C18
+signal IO_C19
+signal IO_C20
+signal IO_C21
+signal IO_C22
+signal IO_C23
+signal IO_C25
+signal IO_C26
+signal IO_C29
+signal IO_C30
+signal IO_C33
+signal IO_C34
+signal IO_D1
+signal IO_D2
+signal IO_D5
+signal IO_D6
+signal IO_D8
+signal IO_D9
+signal IO_D10
+signal IO_D12
+signal IO_D13
+signal IO_D14
+signal IO_D15
+signal IO_D17
+signal IO_D18
+signal IO_D20
+signal IO_D21
+signal IO_D22
+signal IO_D23
+signal IO_D25
+signal IO_D26
+signal IO_D27
+signal IO_D29
+signal IO_D30
+signal IO_D33
+signal IO_D34
+signal IO_E2
+signal IO_E3
+signal IO_E7
+signal IO_E8
+signal IO_E10
+signal IO_E12
+signal IO_E14
+signal IO_E17
+signal IO_E18
+signal IO_E21
+signal IO_E23
+signal IO_E25
+signal IO_E27
+signal IO_E28
+signal IO_E32
+signal IO_E33
+signal IO_F1
+signal IO_F2
+signal IO_F3
+signal IO_F4
+signal IO_F6
+signal IO_F7
+signal IO_F8
+signal IO_F9
+signal IO_F10
+signal IO_F12
+signal IO_F14
+signal IO_F15
+signal IO_F16
+signal IO_F17
+signal IO_F18
+signal IO_F19
+signal IO_F20
+signal IO_F21
+signal IO_F23
+signal IO_F25
+signal IO_F26
+signal IO_F27
+signal IO_F28
+signal IO_F29
+signal IO_F31
+signal IO_F32
+signal IO_F33
+signal IO_F34
+signal IO_G1
+signal IO_G2
+signal IO_G5
+signal IO_G6
+signal IO_G9
+signal IO_G10
+signal IO_G12
+signal IO_G13
+signal IO_G14
+signal IO_G15
+signal IO_G16
+signal IO_G17
+signal IO_G18
+signal IO_G19
+signal IO_G20
+signal IO_G21
+signal IO_G22
+signal IO_G23
+signal IO_G25
+signal IO_G26
+signal IO_G29
+signal IO_G30
+signal IO_G33
+signal IO_G34
+signal IO_H1
+signal IO_H2
+signal IO_H4
+signal IO_H5
+signal IO_H6
+signal IO_H8
+signal IO_H9
+signal IO_H10
+signal IO_H12
+signal IO_H13
+signal IO_H14
+signal IO_H17
+signal IO_H18
+signal IO_H21
+signal IO_H22
+signal IO_H23
+signal IO_H25
+signal IO_H26
+signal IO_H29
+signal IO_H30
+signal IO_H31
+signal IO_H33
+signal IO_H34
+signal IO_J2
+signal IO_J3
+signal IO_J4
+signal IO_J6
+signal IO_J7
+signal IO_J8
+signal IO_J10
+signal IO_J11
+signal IO_J12
+signal IO_J14
+signal IO_J15
+signal IO_J17
+signal IO_J18
+signal IO_J20
+signal IO_J21
+signal IO_J23
+signal IO_J25
+signal IO_J27
+signal IO_J28
+signal IO_J29
+signal IO_J31
+signal IO_J32
+signal IO_J33
+signal IO_K1
+signal IO_K2
+signal IO_K3
+signal IO_K4
+signal IO_K5
+signal IO_K6
+signal IO_K7
+signal IO_K8
+signal IO_K9
+signal IO_K12
+signal IO_K13
+signal IO_K14
+signal IO_K15
+signal IO_K16
+signal IO_K17
+signal IO_K18
+signal IO_K19
+signal IO_K20
+signal IO_K21
+signal IO_K22
+signal IO_K23
+signal IO_K26
+signal IO_K27
+signal IO_K28
+signal IO_K29
+signal IO_K30
+signal IO_K31
+signal IO_K32
+signal IO_K33
+signal IO_K34
+signal IO_L1
+signal IO_L2
+signal IO_L9
+signal IO_L10
+signal IO_L12
+signal IO_L13
+signal IO_L14
+signal IO_L15
+signal IO_L16
+signal IO_L17
+signal IO_L18
+signal IO_L19
+signal IO_L20
+signal IO_L21
+signal IO_L22
+signal IO_L24
+signal IO_L25
+signal IO_L26
+signal IO_L33
+signal IO_L34
+signal IO_M1
+signal IO_M2
+signal IO_M3
+signal IO_M4
+signal IO_M5
+signal IO_M6
+signal IO_M7
+signal IO_M8
+signal IO_M9
+signal IO_M10
+signal IO_M11
+signal IO_M24
+signal IO_M25
+signal IO_M26
+signal IO_M27
+signal IO_M28
+signal IO_M29
+signal IO_M30
+signal IO_M31
+signal IO_M32
+signal IO_M33
+signal IO_M34
+signal IO_N3
+signal IO_N4
+signal IO_N7
+signal IO_N8
+signal IO_N10
+signal IO_N11
+signal IO_N24
+signal IO_N25
+signal IO_N27
+signal IO_N28
+signal IO_N31
+signal IO_N32
+signal IO_P1
+signal IO_P2
+signal IO_P3
+signal IO_P4
+signal IO_P5
+signal IO_P6
+signal IO_P7
+signal IO_P8
+signal IO_P11
+signal IO_P24
+signal IO_P27
+signal IO_P28
+signal IO_P29
+signal IO_P30
+signal IO_P31
+signal IO_P32
+signal IO_P33
+signal IO_P34
+signal IO_R1
+signal IO_R2
+signal IO_R3
+signal IO_R4
+signal IO_R6
+signal IO_R7
+signal IO_R9
+signal IO_R10
+signal IO_R11
+signal IO_R24
+signal IO_R25
+signal IO_R26
+signal IO_R28
+signal IO_R29
+signal IO_R31
+signal IO_R32
+signal IO_R33
+signal IO_R34
+signal IO_T2
+signal IO_T3
+signal IO_T6
+signal IO_T7
+signal IO_T10
+signal IO_T25
+signal IO_T28
+signal IO_T29
+signal IO_T32
+signal IO_T33
+signal IO_U1
+signal IO_U2
+signal IO_U3
+signal IO_U4
+signal IO_U5
+signal IO_U6
+signal IO_U7
+signal IO_U8
+signal IO_U9
+signal IO_U10
+signal IO_U25
+signal IO_U26
+signal IO_U27
+signal IO_U28
+signal IO_U29
+signal IO_U30
+signal IO_U31
+signal IO_U32
+signal IO_U33
+signal IO_U34
+signal IO_V1
+signal IO_V2
+signal IO_V3
+signal IO_V4
+signal IO_V5
+signal IO_V6
+signal IO_V7
+signal IO_V8
+signal IO_V9
+signal IO_V10
+signal IO_V25
+signal IO_V26
+signal IO_V27
+signal IO_V28
+signal IO_V29
+signal IO_V30
+signal IO_V31
+signal IO_V32
+signal IO_V33
+signal IO_V34
+signal IO_W2
+signal IO_W3
+signal IO_W6
+signal IO_W7
+signal IO_W10
+signal IO_W25
+signal IO_W28
+signal IO_W29
+signal IO_W32
+signal IO_W33
+signal IO_Y1
+signal IO_Y2
+signal IO_Y3
+signal IO_Y4
+signal IO_Y6
+signal IO_Y7
+signal IO_Y9
+signal IO_Y10
+signal IO_Y11
+signal IO_Y24
+signal IO_Y25
+signal IO_Y26
+signal IO_Y28
+signal IO_Y29
+signal IO_Y31
+signal IO_Y32
+signal IO_Y33
+signal IO_Y34
+signal IO_AA1
+signal IO_AA2
+signal IO_AA3
+signal IO_AA4
+signal IO_AA5
+signal IO_AA6
+signal IO_AA7
+signal IO_AA8
+signal IO_AA11
+signal IO_AA24
+signal IO_AA27
+signal IO_AA28
+signal IO_AA29
+signal IO_AA30
+signal IO_AA31
+signal IO_AA32
+signal IO_AA33
+signal IO_AA34
+signal IO_AB3
+signal IO_AB4
+signal IO_AB7
+signal IO_AB8
+signal IO_AB10
+signal IO_AB11
+signal IO_AB24
+signal IO_AB25
+signal IO_AB27
+signal IO_AB28
+signal IO_AB31
+signal IO_AB32
+signal IO_AC1
+signal IO_AC2
+signal IO_AC3
+signal IO_AC4
+signal IO_AC5
+signal IO_AC6
+signal IO_AC7
+signal IO_AC8
+signal IO_AC9
+signal IO_AC10
+signal IO_AC11
+signal IO_AC24
+signal IO_AC25
+signal IO_AC26
+signal IO_AC27
+signal IO_AC28
+signal IO_AC29
+signal IO_AC30
+signal IO_AC31
+signal IO_AC32
+signal IO_AC33
+signal IO_AC34
+signal IO_AD1
+signal IO_AD2
+signal IO_AD9
+signal IO_AD10
+signal IO_AD11
+signal IO_AD13
+signal IO_AD14
+signal IO_AD15
+signal IO_AD16
+signal IO_AD17
+signal IO_AD18
+signal IO_AD19
+signal IO_AD20
+signal IO_AD21
+signal IO_AD22
+signal IO_AD23
+signal IO_AD25
+signal IO_AD26
+signal IO_AD33
+signal IO_AD34
+signal IO_AE1
+signal IO_AE2
+signal IO_AE3
+signal IO_AE4
+signal IO_AE5
+signal IO_AE6
+signal IO_AE7
+signal IO_AE8
+signal IO_AE9
+signal IO_AE12
+signal IO_AE13
+signal IO_AE14
+signal IO_AE15
+signal IO_AE16
+signal IO_AE17
+signal IO_AE18
+signal IO_AE19
+signal IO_AE20
+signal IO_AE21
+signal IO_AE22
+signal IO_AE23
+signal IO_AE26
+signal IO_AE27
+signal IO_AE28
+signal IO_AE29
+signal IO_AE30
+signal IO_AE31
+signal IO_AE32
+signal IO_AE33
+signal IO_AE34
+signal IO_AF2
+signal IO_AF3
+signal IO_AF4
+signal IO_AF6
+signal IO_AF7
+signal IO_AF8
+signal IO_AF10
+signal IO_AF12
+signal IO_AF14
+signal IO_AF15
+signal IO_AF17
+signal IO_AF18
+signal IO_AF20
+signal IO_AF21
+signal IO_AF23
+signal IO_AF24
+signal IO_AF25
+signal IO_AF27
+signal IO_AF28
+signal IO_AF29
+signal IO_AF31
+signal IO_AF32
+signal IO_AF33
+signal IO_AG1
+signal IO_AG2
+signal IO_AG4
+signal IO_AG5
+signal IO_AG6
+signal IO_AG9
+signal IO_AG10
+signal IO_AG12
+signal IO_AG13
+signal IO_AG14
+signal IO_AG17
+signal IO_AG18
+signal IO_AG21
+signal IO_AG22
+signal IO_AG23
+signal IO_AG25
+signal IO_AG26
+signal IO_AG27
+signal IO_AG29
+signal IO_AG30
+signal IO_AG31
+signal IO_AG33
+signal IO_AG34
+signal IO_AH1
+signal IO_AH2
+signal IO_AH5
+signal IO_AH6
+signal IO_AH9
+signal IO_AH10
+signal IO_AH12
+signal IO_AH13
+signal IO_AH14
+signal IO_AH15
+signal IO_AH16
+signal IO_AH17
+signal IO_AH18
+signal IO_AH19
+signal IO_AH20
+signal IO_AH21
+signal IO_AH22
+signal IO_AH23
+signal IO_AH25
+signal IO_AH26
+signal IO_AH29
+signal IO_AH30
+signal IO_AH33
+signal IO_AH34
+signal IO_AJ1
+signal IO_AJ2
+signal IO_AJ3
+signal IO_AJ4
+signal IO_AJ6
+signal IO_AJ7
+signal IO_AJ8
+signal IO_AJ9
+signal IO_AJ10
+signal IO_AJ12
+signal IO_AJ14
+signal IO_AJ15
+signal IO_AJ16
+signal IO_AJ17
+signal IO_AJ18
+signal IO_AJ19
+signal IO_AJ20
+signal IO_AJ21
+signal IO_AJ23
+signal IO_AJ25
+signal IO_AJ26
+signal IO_AJ27
+signal IO_AJ28
+signal IO_AJ29
+signal IO_AJ31
+signal IO_AJ32
+signal IO_AJ33
+signal IO_AJ34
+signal IO_AK2
+signal IO_AK3
+signal IO_AK7
+signal IO_AK8
+signal IO_AK10
+signal IO_AK12
+signal IO_AK14
+signal IO_AK17
+signal IO_AK18
+signal IO_AK21
+signal IO_AK23
+signal IO_AK25
+signal IO_AK27
+signal IO_AK28
+signal IO_AK32
+signal IO_AK33
+signal IO_AL1
+signal IO_AL2
+signal IO_AL5
+signal IO_AL6
+signal IO_AL8
+signal IO_AL9
+signal IO_AL10
+signal IO_AL12
+signal IO_AL13
+signal IO_AL14
+signal IO_AL15
+signal IO_AL17
+signal IO_AL18
+signal IO_AL20
+signal IO_AL21
+signal IO_AL22
+signal IO_AL23
+signal IO_AL25
+signal IO_AL26
+signal IO_AL27
+signal IO_AL29
+signal IO_AL30
+signal IO_AL33
+signal IO_AL34
+signal IO_AM1
+signal IO_AM2
+signal IO_AM5
+signal IO_AM6
+signal IO_AM9
+signal IO_AM10
+signal IO_AM12
+signal IO_AM13
+signal IO_AM14
+signal IO_AM15
+signal IO_AM16
+signal IO_AM17
+signal IO_AM18
+signal IO_AM19
+signal IO_AM20
+signal IO_AM21
+signal IO_AM22
+signal IO_AM23
+signal IO_AM25
+signal IO_AM26
+signal IO_AM29
+signal IO_AM30
+signal IO_AM33
+signal IO_AM34
+signal IO_AN3
+signal IO_AN4
+signal IO_AN5
+signal IO_AN6
+signal IO_AN8
+signal IO_AN9
+signal IO_AN10
+signal IO_AN11
+signal IO_AN12
+signal IO_AN14
+signal IO_AN15
+signal IO_AN16
+signal IO_AN17
+signal IO_AN18
+signal IO_AN19
+signal IO_AN20
+signal IO_AN21
+signal IO_AN23
+signal IO_AN25
+signal IO_AN26
+signal IO_AN27
+signal IO_AN29
+signal IO_AN30
+signal IO_AN31
+signal IO_AN32
+signal IO_AP3
+signal IO_AP4
+signal IO_AP6
+signal IO_AP8
+signal IO_AP10
+signal IO_AP11
+signal IO_AP12
+signal IO_AP14
+signal IO_AP15
+signal IO_AP17
+signal IO_AP18
+signal IO_AP20
+signal IO_AP21
+signal IO_AP23
+signal IO_AP25
+signal IO_AP27
+signal IO_AP29
+signal IO_AP31
+
+register BSR 2243
+register BR 1
+register DIR 32
+
+instruction length 6
+
+instruction EXTEST 000000 BSR
+instruction SAMPLE/PRELOAD 000001 BSR
+instruction IDCODE 001001 DIR
+instruction BYPASS 111111 BR
+
+bit 2242 I 1 IO_C33
+bit 2241 O 1 IO_C33 2240 1 Z
+bit 2240 C 1 *
+bit 2239 I 1 IO_C34
+bit 2238 O 1 IO_C34 2237 1 Z
+bit 2237 C 1 *
+bit 2236 I 1 IO_D33
+bit 2235 O 1 IO_D33 2234 1 Z
+bit 2234 C 1 *
+bit 2233 I 1 IO_D34
+bit 2232 O 1 IO_D34 2231 1 Z
+bit 2231 C 1 *
+bit 2230 I 1 IO_E32
+bit 2229 O 1 IO_E32 2228 1 Z
+bit 2228 C 1 *
+bit 2227 I 1 IO_E33
+bit 2226 O 1 IO_E33 2225 1 Z
+bit 2225 C 1 *
+bit 2224 I 1 IO_F31
+bit 2223 O 1 IO_F31 2222 1 Z
+bit 2222 C 1 *
+bit 2221 I 1 IO_F32
+bit 2220 O 1 IO_F32 2219 1 Z
+bit 2219 C 1 *
+bit 2218 I 1 IO_F33
+bit 2217 O 1 IO_F33 2216 1 Z
+bit 2216 C 1 *
+bit 2215 I 1 IO_F34
+bit 2214 O 1 IO_F34 2213 1 Z
+bit 2213 C 1 *
+bit 2212 I 1 IO_G29
+bit 2211 O 1 IO_G29 2210 1 Z
+bit 2210 C 1 *
+bit 2209 I 1 IO_G30
+bit 2208 O 1 IO_G30 2207 1 Z
+bit 2207 C 1 *
+bit 2206 I 1 IO_G33
+bit 2205 O 1 IO_G33 2204 1 Z
+bit 2204 C 1 *
+bit 2203 O 1 *
+bit 2202 O 1 *
+bit 2201 O 1 *
+bit 2200 O 1 *
+bit 2199 O 1 *
+bit 2198 O 1 *
+bit 2197 I 1 IO_G34
+bit 2196 O 1 IO_G34 2195 1 Z
+bit 2195 C 1 *
+bit 2194 I 1 IO_H29
+bit 2193 O 1 IO_H29 2192 1 Z
+bit 2192 C 1 *
+bit 2191 I 1 IO_H30
+bit 2190 O 1 IO_H30 2189 1 Z
+bit 2189 C 1 *
+bit 2188 I 1 IO_H33
+bit 2187 O 1 IO_H33 2186 1 Z
+bit 2186 C 1 *
+bit 2185 I 1 IO_H34
+bit 2184 O 1 IO_H34 2183 1 Z
+bit 2183 C 1 *
+bit 2182 I 1 IO_J28
+bit 2181 O 1 IO_J28 2180 1 Z
+bit 2180 C 1 *
+bit 2179 I 1 IO_J29
+bit 2178 O 1 IO_J29 2177 1 Z
+bit 2177 C 1 *
+bit 2176 I 1 IO_H31
+bit 2175 O 1 IO_H31 2174 1 Z
+bit 2174 C 1 *
+bit 2173 I 1 IO_J31
+bit 2172 O 1 IO_J31 2171 1 Z
+bit 2171 C 1 *
+bit 2170 I 1 IO_J32
+bit 2169 O 1 IO_J32 2168 1 Z
+bit 2168 C 1 *
+bit 2167 I 1 IO_J33
+bit 2166 O 1 IO_J33 2165 1 Z
+bit 2165 C 1 *
+bit 2164 I 1 IO_J27
+bit 2163 O 1 IO_J27 2162 1 Z
+bit 2162 C 1 *
+bit 2161 I 1 IO_K26
+bit 2160 O 1 IO_K26 2159 1 Z
+bit 2159 C 1 *
+bit 2158 I 1 IO_K27
+bit 2157 O 1 IO_K27 2156 1 Z
+bit 2156 C 1 *
+bit 2155 I 1 IO_K28
+bit 2154 O 1 IO_K28 2153 1 Z
+bit 2153 C 1 *
+bit 2152 I 1 IO_K29
+bit 2151 O 1 IO_K29 2150 1 Z
+bit 2150 C 1 *
+bit 2149 I 1 IO_K30
+bit 2148 O 1 IO_K30 2147 1 Z
+bit 2147 C 1 *
+bit 2146 I 1 IO_K31
+bit 2145 O 1 IO_K31 2144 1 Z
+bit 2144 C 1 *
+bit 2143 I 1 IO_K32
+bit 2142 O 1 IO_K32 2141 1 Z
+bit 2141 C 1 *
+bit 2140 I 1 IO_K33
+bit 2139 O 1 IO_K33 2138 1 Z
+bit 2138 C 1 *
+bit 2137 I 1 IO_K34
+bit 2136 O 1 IO_K34 2135 1 Z
+bit 2135 C 1 *
+bit 2134 I 1 IO_L25
+bit 2133 O 1 IO_L25 2132 1 Z
+bit 2132 C 1 *
+bit 2131 I 1 IO_L26
+bit 2130 O 1 IO_L26 2129 1 Z
+bit 2129 C 1 *
+bit 2128 O 1 *
+bit 2127 O 1 *
+bit 2126 O 1 *
+bit 2125 O 1 *
+bit 2124 O 1 *
+bit 2123 O 1 *
+bit 2122 I 1 IO_L33
+bit 2121 O 1 IO_L33 2120 1 Z
+bit 2120 C 1 *
+bit 2119 I 1 IO_L34
+bit 2118 O 1 IO_L34 2117 1 Z
+bit 2117 C 1 *
+bit 2116 I 1 IO_M24
+bit 2115 O 1 IO_M24 2114 1 Z
+bit 2114 C 1 *
+bit 2113 I 1 IO_M25
+bit 2112 O 1 IO_M25 2111 1 Z
+bit 2111 C 1 *
+bit 2110 I 1 IO_M27
+bit 2109 O 1 IO_M27 2108 1 Z
+bit 2108 C 1 *
+bit 2107 I 1 IO_M28
+bit 2106 O 1 IO_M28 2105 1 Z
+bit 2105 C 1 *
+bit 2104 I 1 IO_M29
+bit 2103 O 1 IO_M29 2102 1 Z
+bit 2102 C 1 *
+bit 2101 I 1 IO_M30
+bit 2100 O 1 IO_M30 2099 1 Z
+bit 2099 C 1 *
+bit 2098 I 1 IO_M31
+bit 2097 O 1 IO_M31 2096 1 Z
+bit 2096 C 1 *
+bit 2095 I 1 IO_M32
+bit 2094 O 1 IO_M32 2093 1 Z
+bit 2093 C 1 *
+bit 2092 I 1 IO_M33
+bit 2091 O 1 IO_M33 2090 1 Z
+bit 2090 C 1 *
+bit 2089 I 1 IO_M34
+bit 2088 O 1 IO_M34 2087 1 Z
+bit 2087 C 1 *
+bit 2086 I 1 IO_M26
+bit 2085 O 1 IO_M26 2084 1 Z
+bit 2084 C 1 *
+bit 2083 I 1 IO_N25
+bit 2082 O 1 IO_N25 2081 1 Z
+bit 2081 C 1 *
+bit 2080 I 1 IO_N27
+bit 2079 O 1 IO_N27 2078 1 Z
+bit 2078 C 1 *
+bit 2077 I 1 IO_N28
+bit 2076 O 1 IO_N28 2075 1 Z
+bit 2075 C 1 *
+bit 2074 I 1 IO_N31
+bit 2073 O 1 IO_N31 2072 1 Z
+bit 2072 C 1 *
+bit 2071 I 1 IO_N32
+bit 2070 O 1 IO_N32 2069 1 Z
+bit 2069 C 1 *
+bit 2068 I 1 IO_N24
+bit 2067 O 1 IO_N24 2066 1 Z
+bit 2066 C 1 *
+bit 2065 I 1 IO_P24
+bit 2064 O 1 IO_P24 2063 1 Z
+bit 2063 C 1 *
+bit 2062 O 1 *
+bit 2061 O 1 *
+bit 2060 O 1 *
+bit 2059 O 1 *
+bit 2058 O 1 *
+bit 2057 O 1 *
+bit 2056 I 1 IO_P27
+bit 2055 O 1 IO_P27 2054 1 Z
+bit 2054 C 1 *
+bit 2053 I 1 IO_P28
+bit 2052 O 1 IO_P28 2051 1 Z
+bit 2051 C 1 *
+bit 2050 I 1 IO_P29
+bit 2049 O 1 IO_P29 2048 1 Z
+bit 2048 C 1 *
+bit 2047 I 1 IO_P30
+bit 2046 O 1 IO_P30 2045 1 Z
+bit 2045 C 1 *
+bit 2044 I 1 IO_P31
+bit 2043 O 1 IO_P31 2042 1 Z
+bit 2042 C 1 *
+bit 2041 I 1 IO_P32
+bit 2040 O 1 IO_P32 2039 1 Z
+bit 2039 C 1 *
+bit 2038 I 1 IO_P33
+bit 2037 O 1 IO_P33 2036 1 Z
+bit 2036 C 1 *
+bit 2035 I 1 IO_P34
+bit 2034 O 1 IO_P34 2033 1 Z
+bit 2033 C 1 *
+bit 2032 I 1 IO_R24
+bit 2031 O 1 IO_R24 2030 1 Z
+bit 2030 C 1 *
+bit 2029 I 1 IO_R25
+bit 2028 O 1 IO_R25 2027 1 Z
+bit 2027 C 1 *
+bit 2026 I 1 IO_R28
+bit 2025 O 1 IO_R28 2024 1 Z
+bit 2024 C 1 *
+bit 2023 I 1 IO_R29
+bit 2022 O 1 IO_R29 2021 1 Z
+bit 2021 C 1 *
+bit 2020 I 1 IO_R31
+bit 2019 O 1 IO_R31 2018 1 Z
+bit 2018 C 1 *
+bit 2017 I 1 IO_R32
+bit 2016 O 1 IO_R32 2015 1 Z
+bit 2015 C 1 *
+bit 2014 I 1 IO_R33
+bit 2013 O 1 IO_R33 2012 1 Z
+bit 2012 C 1 *
+bit 2011 I 1 IO_R34
+bit 2010 O 1 IO_R34 2009 1 Z
+bit 2009 C 1 *
+bit 2008 I 1 IO_R26
+bit 2007 O 1 IO_R26 2006 1 Z
+bit 2006 C 1 *
+bit 2005 I 1 IO_T25
+bit 2004 O 1 IO_T25 2003 1 Z
+bit 2003 C 1 *
+bit 2002 I 1 IO_T28
+bit 2001 O 1 IO_T28 2000 1 Z
+bit 2000 C 1 *
+bit 1999 I 1 IO_T29
+bit 1998 O 1 IO_T29 1997 1 Z
+bit 1997 C 1 *
+bit 1996 I 1 IO_T32
+bit 1995 O 1 IO_T32 1994 1 Z
+bit 1994 C 1 *
+bit 1993 I 1 IO_T33
+bit 1992 O 1 IO_T33 1991 1 Z
+bit 1991 C 1 *
+bit 1990 I 1 IO_U25
+bit 1989 O 1 IO_U25 1988 1 Z
+bit 1988 C 1 *
+bit 1987 O 1 *
+bit 1986 O 1 *
+bit 1985 O 1 *
+bit 1984 O 1 *
+bit 1983 O 1 *
+bit 1982 O 1 *
+bit 1981 I 1 IO_U26
+bit 1980 O 1 IO_U26 1979 1 Z
+bit 1979 C 1 *
+bit 1978 I 1 IO_U27
+bit 1977 O 1 IO_U27 1976 1 Z
+bit 1976 C 1 *
+bit 1975 I 1 IO_U28
+bit 1974 O 1 IO_U28 1973 1 Z
+bit 1973 C 1 *
+bit 1972 I 1 IO_U29
+bit 1971 O 1 IO_U29 1970 1 Z
+bit 1970 C 1 *
+bit 1969 I 1 IO_U30
+bit 1968 O 1 IO_U30 1967 1 Z
+bit 1967 C 1 *
+bit 1966 I 1 IO_U31
+bit 1965 O 1 IO_U31 1964 1 Z
+bit 1964 C 1 *
+bit 1963 I 1 IO_U32
+bit 1962 O 1 IO_U32 1961 1 Z
+bit 1961 C 1 *
+bit 1960 I 1 IO_U33
+bit 1959 O 1 IO_U33 1958 1 Z
+bit 1958 C 1 *
+bit 1957 I 1 IO_U34
+bit 1956 O 1 IO_U34 1955 1 Z
+bit 1955 C 1 *
+bit 1954 I 1 IO_V34
+bit 1953 O 1 IO_V34 1952 1 Z
+bit 1952 C 1 *
+bit 1951 I 1 IO_V33
+bit 1950 O 1 IO_V33 1949 1 Z
+bit 1949 C 1 *
+bit 1948 I 1 IO_V32
+bit 1947 O 1 IO_V32 1946 1 Z
+bit 1946 C 1 *
+bit 1945 I 1 IO_V31
+bit 1944 O 1 IO_V31 1943 1 Z
+bit 1943 C 1 *
+bit 1942 I 1 IO_V30
+bit 1941 O 1 IO_V30 1940 1 Z
+bit 1940 C 1 *
+bit 1939 I 1 IO_V29
+bit 1938 O 1 IO_V29 1937 1 Z
+bit 1937 C 1 *
+bit 1936 I 1 IO_V28
+bit 1935 O 1 IO_V28 1934 1 Z
+bit 1934 C 1 *
+bit 1933 I 1 IO_V27
+bit 1932 O 1 IO_V27 1931 1 Z
+bit 1931 C 1 *
+bit 1930 I 1 IO_V26
+bit 1929 O 1 IO_V26 1928 1 Z
+bit 1928 C 1 *
+bit 1927 O 1 *
+bit 1926 O 1 *
+bit 1925 O 1 *
+bit 1924 O 1 *
+bit 1923 O 1 *
+bit 1922 O 1 *
+bit 1921 I 1 IO_V25
+bit 1920 O 1 IO_V25 1919 1 Z
+bit 1919 C 1 *
+bit 1918 I 1 IO_W33
+bit 1917 O 1 IO_W33 1916 1 Z
+bit 1916 C 1 *
+bit 1915 I 1 IO_W32
+bit 1914 O 1 IO_W32 1913 1 Z
+bit 1913 C 1 *
+bit 1912 I 1 IO_W29
+bit 1911 O 1 IO_W29 1910 1 Z
+bit 1910 C 1 *
+bit 1909 I 1 IO_W28
+bit 1908 O 1 IO_W28 1907 1 Z
+bit 1907 C 1 *
+bit 1906 I 1 IO_W25
+bit 1905 O 1 IO_W25 1904 1 Z
+bit 1904 C 1 *
+bit 1903 I 1 IO_Y26
+bit 1902 O 1 IO_Y26 1901 1 Z
+bit 1901 C 1 *
+bit 1900 I 1 IO_Y34
+bit 1899 O 1 IO_Y34 1898 1 Z
+bit 1898 C 1 *
+bit 1897 I 1 IO_Y33
+bit 1896 O 1 IO_Y33 1895 1 Z
+bit 1895 C 1 *
+bit 1894 I 1 IO_Y32
+bit 1893 O 1 IO_Y32 1892 1 Z
+bit 1892 C 1 *
+bit 1891 I 1 IO_Y31
+bit 1890 O 1 IO_Y31 1889 1 Z
+bit 1889 C 1 *
+bit 1888 I 1 IO_Y29
+bit 1887 O 1 IO_Y29 1886 1 Z
+bit 1886 C 1 *
+bit 1885 I 1 IO_Y28
+bit 1884 O 1 IO_Y28 1883 1 Z
+bit 1883 C 1 *
+bit 1882 I 1 IO_Y25
+bit 1881 O 1 IO_Y25 1880 1 Z
+bit 1880 C 1 *
+bit 1879 I 1 IO_Y24
+bit 1878 O 1 IO_Y24 1877 1 Z
+bit 1877 C 1 *
+bit 1876 I 1 IO_AA34
+bit 1875 O 1 IO_AA34 1874 1 Z
+bit 1874 C 1 *
+bit 1873 I 1 IO_AA33
+bit 1872 O 1 IO_AA33 1871 1 Z
+bit 1871 C 1 *
+bit 1870 I 1 IO_AA32
+bit 1869 O 1 IO_AA32 1868 1 Z
+bit 1868 C 1 *
+bit 1867 I 1 IO_AA31
+bit 1866 O 1 IO_AA31 1865 1 Z
+bit 1865 C 1 *
+bit 1864 I 1 IO_AA30
+bit 1863 O 1 IO_AA30 1862 1 Z
+bit 1862 C 1 *
+bit 1861 I 1 IO_AA29
+bit 1860 O 1 IO_AA29 1859 1 Z
+bit 1859 C 1 *
+bit 1858 I 1 IO_AA28
+bit 1857 O 1 IO_AA28 1856 1 Z
+bit 1856 C 1 *
+bit 1855 I 1 IO_AA27
+bit 1854 O 1 IO_AA27 1853 1 Z
+bit 1853 C 1 *
+bit 1852 O 1 *
+bit 1851 O 1 *
+bit 1850 O 1 *
+bit 1849 O 1 *
+bit 1848 O 1 *
+bit 1847 O 1 *
+bit 1846 I 1 IO_AA24
+bit 1845 O 1 IO_AA24 1844 1 Z
+bit 1844 C 1 *
+bit 1843 I 1 IO_AB24
+bit 1842 O 1 IO_AB24 1841 1 Z
+bit 1841 C 1 *
+bit 1840 I 1 IO_AB32
+bit 1839 O 1 IO_AB32 1838 1 Z
+bit 1838 C 1 *
+bit 1837 I 1 IO_AB31
+bit 1836 O 1 IO_AB31 1835 1 Z
+bit 1835 C 1 *
+bit 1834 I 1 IO_AB28
+bit 1833 O 1 IO_AB28 1832 1 Z
+bit 1832 C 1 *
+bit 1831 I 1 IO_AB27
+bit 1830 O 1 IO_AB27 1829 1 Z
+bit 1829 C 1 *
+bit 1828 I 1 IO_AB25
+bit 1827 O 1 IO_AB25 1826 1 Z
+bit 1826 C 1 *
+bit 1825 I 1 IO_AC26
+bit 1824 O 1 IO_AC26 1823 1 Z
+bit 1823 C 1 *
+bit 1822 I 1 IO_AC34
+bit 1821 O 1 IO_AC34 1820 1 Z
+bit 1820 C 1 *
+bit 1819 I 1 IO_AC33
+bit 1818 O 1 IO_AC33 1817 1 Z
+bit 1817 C 1 *
+bit 1816 I 1 IO_AC32
+bit 1815 O 1 IO_AC32 1814 1 Z
+bit 1814 C 1 *
+bit 1813 I 1 IO_AC31
+bit 1812 O 1 IO_AC31 1811 1 Z
+bit 1811 C 1 *
+bit 1810 I 1 IO_AC30
+bit 1809 O 1 IO_AC30 1808 1 Z
+bit 1808 C 1 *
+bit 1807 I 1 IO_AC29
+bit 1806 O 1 IO_AC29 1805 1 Z
+bit 1805 C 1 *
+bit 1804 I 1 IO_AC28
+bit 1803 O 1 IO_AC28 1802 1 Z
+bit 1802 C 1 *
+bit 1801 I 1 IO_AC27
+bit 1800 O 1 IO_AC27 1799 1 Z
+bit 1799 C 1 *
+bit 1798 I 1 IO_AC25
+bit 1797 O 1 IO_AC25 1796 1 Z
+bit 1796 C 1 *
+bit 1795 I 1 IO_AC24
+bit 1794 O 1 IO_AC24 1793 1 Z
+bit 1793 C 1 *
+bit 1792 I 1 IO_AD34
+bit 1791 O 1 IO_AD34 1790 1 Z
+bit 1790 C 1 *
+bit 1789 I 1 IO_AD33
+bit 1788 O 1 IO_AD33 1787 1 Z
+bit 1787 C 1 *
+bit 1786 O 1 *
+bit 1785 O 1 *
+bit 1784 O 1 *
+bit 1783 O 1 *
+bit 1782 O 1 *
+bit 1781 O 1 *
+bit 1780 I 1 IO_AD26
+bit 1779 O 1 IO_AD26 1778 1 Z
+bit 1778 C 1 *
+bit 1777 I 1 IO_AD25
+bit 1776 O 1 IO_AD25 1775 1 Z
+bit 1775 C 1 *
+bit 1774 I 1 IO_AE34
+bit 1773 O 1 IO_AE34 1772 1 Z
+bit 1772 C 1 *
+bit 1771 I 1 IO_AE33
+bit 1770 O 1 IO_AE33 1769 1 Z
+bit 1769 C 1 *
+bit 1768 I 1 IO_AE32
+bit 1767 O 1 IO_AE32 1766 1 Z
+bit 1766 C 1 *
+bit 1765 I 1 IO_AE31
+bit 1764 O 1 IO_AE31 1763 1 Z
+bit 1763 C 1 *
+bit 1762 I 1 IO_AE30
+bit 1761 O 1 IO_AE30 1760 1 Z
+bit 1760 C 1 *
+bit 1759 I 1 IO_AE29
+bit 1758 O 1 IO_AE29 1757 1 Z
+bit 1757 C 1 *
+bit 1756 I 1 IO_AE28
+bit 1755 O 1 IO_AE28 1754 1 Z
+bit 1754 C 1 *
+bit 1753 I 1 IO_AE27
+bit 1752 O 1 IO_AE27 1751 1 Z
+bit 1751 C 1 *
+bit 1750 I 1 IO_AE26
+bit 1749 O 1 IO_AE26 1748 1 Z
+bit 1748 C 1 *
+bit 1747 I 1 IO_AF27
+bit 1746 O 1 IO_AF27 1745 1 Z
+bit 1745 C 1 *
+bit 1744 I 1 IO_AF33
+bit 1743 O 1 IO_AF33 1742 1 Z
+bit 1742 C 1 *
+bit 1741 I 1 IO_AF32
+bit 1740 O 1 IO_AF32 1739 1 Z
+bit 1739 C 1 *
+bit 1738 I 1 IO_AF31
+bit 1737 O 1 IO_AF31 1736 1 Z
+bit 1736 C 1 *
+bit 1735 I 1 IO_AG31
+bit 1734 O 1 IO_AG31 1733 1 Z
+bit 1733 C 1 *
+bit 1732 I 1 IO_AF29
+bit 1731 O 1 IO_AF29 1730 1 Z
+bit 1730 C 1 *
+bit 1729 I 1 IO_AF28
+bit 1728 O 1 IO_AF28 1727 1 Z
+bit 1727 C 1 *
+bit 1726 I 1 IO_AG34
+bit 1725 O 1 IO_AG34 1724 1 Z
+bit 1724 C 1 *
+bit 1723 I 1 IO_AG33
+bit 1722 O 1 IO_AG33 1721 1 Z
+bit 1721 C 1 *
+bit 1720 I 1 IO_AG30
+bit 1719 O 1 IO_AG30 1718 1 Z
+bit 1718 C 1 *
+bit 1717 I 1 IO_AG29
+bit 1716 O 1 IO_AG29 1715 1 Z
+bit 1715 C 1 *
+bit 1714 I 1 IO_AH34
+bit 1713 O 1 IO_AH34 1712 1 Z
+bit 1712 C 1 *
+bit 1711 O 1 *
+bit 1710 O 1 *
+bit 1709 O 1 *
+bit 1708 O 1 *
+bit 1707 O 1 *
+bit 1706 O 1 *
+bit 1705 I 1 IO_AH33
+bit 1704 O 1 IO_AH33 1703 1 Z
+bit 1703 C 1 *
+bit 1702 I 1 IO_AH30
+bit 1701 O 1 IO_AH30 1700 1 Z
+bit 1700 C 1 *
+bit 1699 I 1 IO_AH29
+bit 1698 O 1 IO_AH29 1697 1 Z
+bit 1697 C 1 *
+bit 1696 I 1 IO_AJ34
+bit 1695 O 1 IO_AJ34 1694 1 Z
+bit 1694 C 1 *
+bit 1693 I 1 IO_AJ33
+bit 1692 O 1 IO_AJ33 1691 1 Z
+bit 1691 C 1 *
+bit 1690 I 1 IO_AJ32
+bit 1689 O 1 IO_AJ32 1688 1 Z
+bit 1688 C 1 *
+bit 1687 I 1 IO_AJ31
+bit 1686 O 1 IO_AJ31 1685 1 Z
+bit 1685 C 1 *
+bit 1684 I 1 IO_AK33
+bit 1683 O 1 IO_AK33 1682 1 Z
+bit 1682 C 1 *
+bit 1681 I 1 IO_AK32
+bit 1680 O 1 IO_AK32 1679 1 Z
+bit 1679 C 1 *
+bit 1678 I 1 IO_AL34
+bit 1677 O 1 IO_AL34 1676 1 Z
+bit 1676 C 1 *
+bit 1675 I 1 IO_AL33
+bit 1674 O 1 IO_AL33 1673 1 Z
+bit 1673 C 1 *
+bit 1672 I 1 IO_AM34
+bit 1671 O 1 IO_AM34 1670 1 Z
+bit 1670 C 1 *
+bit 1669 I 1 IO_AM33
+bit 1668 O 1 IO_AM33 1667 1 Z
+bit 1667 C 1 *
+bit 1666 I 1 CCLK_AL31
+bit 1665 O 1 CCLK_AL31 1664 1 Z
+bit 1664 C 1 *
+bit 1663 I 1 DONE_AD24
+bit 1662 O 1 DONE_AD24 1661 1 Z
+bit 1661 C 1 *
+bit 1660 I 1 IO_AL30
+bit 1659 O 1 IO_AL30 1658 1 Z
+bit 1658 C 1 *
+bit 1657 I 1 IO_AN32
+bit 1656 O 1 IO_AN32 1655 1 Z
+bit 1655 C 1 *
+bit 1654 I 1 IO_AP32
+bit 1653 O 1 IO_AP32 1652 1 Z
+bit 1652 C 1 *
+bit 1651 I 1 IO_AN31
+bit 1650 O 1 IO_AN31 1649 1 Z
+bit 1649 C 1 *
+bit 1648 I 1 IO_AP31
+bit 1647 O 1 IO_AP31 1646 1 Z
+bit 1646 C 1 *
+bit 1645 I 1 IO_AJ29
+bit 1644 O 1 IO_AJ29 1643 1 Z
+bit 1643 C 1 *
+bit 1642 I 1 IO_AM30
+bit 1641 O 1 IO_AM30 1640 1 Z
+bit 1640 C 1 *
+bit 1639 I 1 IO_AN30
+bit 1638 O 1 IO_AN30 1637 1 Z
+bit 1637 C 1 *
+bit 1636 I 1 IO_AL29
+bit 1635 O 1 IO_AL29 1634 1 Z
+bit 1634 C 1 *
+bit 1633 I 1 IO_AM29
+bit 1632 O 1 IO_AM29 1631 1 Z
+bit 1631 C 1 *
+bit 1630 I 1 IO_AG27
+bit 1629 O 1 IO_AG27 1628 1 Z
+bit 1628 C 1 *
+bit 1627 I 1 IO_AN29
+bit 1626 O 1 IO_AN29 1625 1 Z
+bit 1625 C 1 *
+bit 1624 I 1 IO_AP29
+bit 1623 O 1 IO_AP29 1622 1 Z
+bit 1622 C 1 *
+bit 1621 I 1 IO_AJ28
+bit 1620 O 1 IO_AJ28 1619 1 Z
+bit 1619 C 1 *
+bit 1618 I 1 IO_AK28
+bit 1617 O 1 IO_AK28 1616 1 Z
+bit 1616 C 1 *
+bit 1615 I 1 IO_AJ27
+bit 1614 O 1 IO_AJ27 1613 1 Z
+bit 1613 C 1 *
+bit 1612 I 1 IO_AK27
+bit 1611 O 1 IO_AK27 1610 1 Z
+bit 1610 C 1 *
+bit 1609 I 1 IO_AL27
+bit 1608 O 1 IO_AL27 1607 1 Z
+bit 1607 C 1 *
+bit 1606 I 1 IO_AN27
+bit 1605 O 1 IO_AN27 1604 1 Z
+bit 1604 C 1 *
+bit 1603 I 1 IO_AP27
+bit 1602 O 1 IO_AP27 1601 1 Z
+bit 1601 C 1 *
+bit 1600 I 1 IO_AG26
+bit 1599 O 1 IO_AG26 1598 1 Z
+bit 1598 C 1 *
+bit 1597 I 1 IO_AH26
+bit 1596 O 1 IO_AH26 1595 1 Z
+bit 1595 C 1 *
+bit 1594 I 1 IO_AJ26
+bit 1593 O 1 IO_AJ26 1592 1 Z
+bit 1592 C 1 *
+bit 1591 I 1 IO_AL26
+bit 1590 O 1 IO_AL26 1589 1 Z
+bit 1589 C 1 *
+bit 1588 I 1 IO_AM26
+bit 1587 O 1 IO_AM26 1586 1 Z
+bit 1586 C 1 *
+bit 1585 I 1 IO_AN26
+bit 1584 O 1 IO_AN26 1583 1 Z
+bit 1583 C 1 *
+bit 1582 I 1 IO_AF25
+bit 1581 O 1 IO_AF25 1580 1 Z
+bit 1580 C 1 *
+bit 1579 I 1 IO_AG25
+bit 1578 O 1 IO_AG25 1577 1 Z
+bit 1577 C 1 *
+bit 1576 I 1 IO_AH25
+bit 1575 O 1 IO_AH25 1574 1 Z
+bit 1574 C 1 *
+bit 1573 I 1 IO_AJ25
+bit 1572 O 1 IO_AJ25 1571 1 Z
+bit 1571 C 1 *
+bit 1570 I 1 IO_AK25
+bit 1569 O 1 IO_AK25 1568 1 Z
+bit 1568 C 1 *
+bit 1567 I 1 IO_AL25
+bit 1566 O 1 IO_AL25 1565 1 Z
+bit 1565 C 1 *
+bit 1564 I 1 IO_AM25
+bit 1563 O 1 IO_AM25 1562 1 Z
+bit 1562 C 1 *
+bit 1561 I 1 IO_AN25
+bit 1560 O 1 IO_AN25 1559 1 Z
+bit 1559 C 1 *
+bit 1558 I 1 IO_AP25
+bit 1557 O 1 IO_AP25 1556 1 Z
+bit 1556 C 1 *
+bit 1555 I 1 IO_AF24
+bit 1554 O 1 IO_AF24 1553 1 Z
+bit 1553 C 1 *
+bit 1552 I 1 IO_AD23
+bit 1551 O 1 IO_AD23 1550 1 Z
+bit 1550 C 1 *
+bit 1549 I 1 IO_AE23
+bit 1548 O 1 IO_AE23 1547 1 Z
+bit 1547 C 1 *
+bit 1546 I 1 IO_AF23
+bit 1545 O 1 IO_AF23 1544 1 Z
+bit 1544 C 1 *
+bit 1543 I 1 IO_AG23
+bit 1542 O 1 IO_AG23 1541 1 Z
+bit 1541 C 1 *
+bit 1540 I 1 IO_AH23
+bit 1539 O 1 IO_AH23 1538 1 Z
+bit 1538 C 1 *
+bit 1537 I 1 IO_AJ23
+bit 1536 O 1 IO_AJ23 1535 1 Z
+bit 1535 C 1 *
+bit 1534 I 1 IO_AK23
+bit 1533 O 1 IO_AK23 1532 1 Z
+bit 1532 C 1 *
+bit 1531 I 1 IO_AL23
+bit 1530 O 1 IO_AL23 1529 1 Z
+bit 1529 C 1 *
+bit 1528 I 1 IO_AM23
+bit 1527 O 1 IO_AM23 1526 1 Z
+bit 1526 C 1 *
+bit 1525 I 1 IO_AD22
+bit 1524 O 1 IO_AD22 1523 1 Z
+bit 1523 C 1 *
+bit 1522 I 1 IO_AN23
+bit 1521 O 1 IO_AN23 1520 1 Z
+bit 1520 C 1 *
+bit 1519 I 1 IO_AP23
+bit 1518 O 1 IO_AP23 1517 1 Z
+bit 1517 C 1 *
+bit 1516 I 1 IO_AG22
+bit 1515 O 1 IO_AG22 1514 1 Z
+bit 1514 C 1 *
+bit 1513 I 1 IO_AH22
+bit 1512 O 1 IO_AH22 1511 1 Z
+bit 1511 C 1 *
+bit 1510 I 1 IO_AE22
+bit 1509 O 1 IO_AE22 1508 1 Z
+bit 1508 C 1 *
+bit 1507 I 1 IO_AL22
+bit 1506 O 1 IO_AL22 1505 1 Z
+bit 1505 C 1 *
+bit 1504 I 1 IO_AM22
+bit 1503 O 1 IO_AM22 1502 1 Z
+bit 1502 C 1 *
+bit 1501 I 1 IO_AD21
+bit 1500 O 1 IO_AD21 1499 1 Z
+bit 1499 C 1 *
+bit 1498 I 1 IO_AE21
+bit 1497 O 1 IO_AE21 1496 1 Z
+bit 1496 C 1 *
+bit 1495 I 1 IO_AF21
+bit 1494 O 1 IO_AF21 1493 1 Z
+bit 1493 C 1 *
+bit 1492 I 1 IO_AG21
+bit 1491 O 1 IO_AG21 1490 1 Z
+bit 1490 C 1 *
+bit 1489 I 1 IO_AH21
+bit 1488 O 1 IO_AH21 1487 1 Z
+bit 1487 C 1 *
+bit 1486 I 1 IO_AJ21
+bit 1485 O 1 IO_AJ21 1484 1 Z
+bit 1484 C 1 *
+bit 1483 I 1 IO_AK21
+bit 1482 O 1 IO_AK21 1481 1 Z
+bit 1481 C 1 *
+bit 1480 I 1 IO_AD20
+bit 1479 O 1 IO_AD20 1478 1 Z
+bit 1478 C 1 *
+bit 1477 I 1 IO_AL21
+bit 1476 O 1 IO_AL21 1475 1 Z
+bit 1475 C 1 *
+bit 1474 I 1 IO_AM21
+bit 1473 O 1 IO_AM21 1472 1 Z
+bit 1472 C 1 *
+bit 1471 I 1 IO_AN21
+bit 1470 O 1 IO_AN21 1469 1 Z
+bit 1469 C 1 *
+bit 1468 I 1 IO_AP21
+bit 1467 O 1 IO_AP21 1466 1 Z
+bit 1466 C 1 *
+bit 1465 I 1 IO_AD19
+bit 1464 O 1 IO_AD19 1463 1 Z
+bit 1463 C 1 *
+bit 1462 I 1 IO_AE20
+bit 1461 O 1 IO_AE20 1460 1 Z
+bit 1460 C 1 *
+bit 1459 I 1 IO_AF20
+bit 1458 O 1 IO_AF20 1457 1 Z
+bit 1457 C 1 *
+bit 1456 I 1 IO_AH20
+bit 1455 O 1 IO_AH20 1454 1 Z
+bit 1454 C 1 *
+bit 1453 I 1 IO_AJ20
+bit 1452 O 1 IO_AJ20 1451 1 Z
+bit 1451 C 1 *
+bit 1450 I 1 IO_AE19
+bit 1449 O 1 IO_AE19 1448 1 Z
+bit 1448 C 1 *
+bit 1447 I 1 IO_AL20
+bit 1446 O 1 IO_AL20 1445 1 Z
+bit 1445 C 1 *
+bit 1444 I 1 IO_AM20
+bit 1443 O 1 IO_AM20 1442 1 Z
+bit 1442 C 1 *
+bit 1441 I 1 IO_AN20
+bit 1440 O 1 IO_AN20 1439 1 Z
+bit 1439 C 1 *
+bit 1438 I 1 IO_AP20
+bit 1437 O 1 IO_AP20 1436 1 Z
+bit 1436 C 1 *
+bit 1435 I 1 IO_AD18
+bit 1434 O 1 IO_AD18 1433 1 Z
+bit 1433 C 1 *
+bit 1432 I 1 IO_AH19
+bit 1431 O 1 IO_AH19 1430 1 Z
+bit 1430 C 1 *
+bit 1429 I 1 IO_AJ19
+bit 1428 O 1 IO_AJ19 1427 1 Z
+bit 1427 C 1 *
+bit 1426 I 1 IO_AM19
+bit 1425 O 1 IO_AM19 1424 1 Z
+bit 1424 C 1 *
+bit 1423 I 1 IO_AN19
+bit 1422 O 1 IO_AN19 1421 1 Z
+bit 1421 C 1 *
+bit 1420 I 1 IO_AE18
+bit 1419 O 1 IO_AE18 1418 1 Z
+bit 1418 C 1 *
+bit 1417 I 1 IO_AF18
+bit 1416 O 1 IO_AF18 1415 1 Z
+bit 1415 C 1 *
+bit 1414 I 1 IO_AG18
+bit 1413 O 1 IO_AG18 1412 1 Z
+bit 1412 C 1 *
+bit 1411 I 1 IO_AH18
+bit 1410 O 1 IO_AH18 1409 1 Z
+bit 1409 C 1 *
+bit 1408 I 1 IO_AJ18
+bit 1407 O 1 IO_AJ18 1406 1 Z
+bit 1406 C 1 *
+bit 1405 I 1 IO_AK18
+bit 1404 O 1 IO_AK18 1403 1 Z
+bit 1403 C 1 *
+bit 1402 I 1 IO_AL18
+bit 1401 O 1 IO_AL18 1400 1 Z
+bit 1400 C 1 *
+bit 1399 I 1 IO_AM18
+bit 1398 O 1 IO_AM18 1397 1 Z
+bit 1397 C 1 *
+bit 1396 I 1 IO_AN18
+bit 1395 O 1 IO_AN18 1394 1 Z
+bit 1394 C 1 *
+bit 1393 I 1 IO_AP18
+bit 1392 O 1 IO_AP18 1391 1 Z
+bit 1391 C 1 *
+bit 1390 I 1 IO_AP17
+bit 1389 O 1 IO_AP17 1388 1 Z
+bit 1388 C 1 *
+bit 1387 I 1 IO_AN17
+bit 1386 O 1 IO_AN17 1385 1 Z
+bit 1385 C 1 *
+bit 1384 I 1 IO_AM17
+bit 1383 O 1 IO_AM17 1382 1 Z
+bit 1382 C 1 *
+bit 1381 I 1 IO_AL17
+bit 1380 O 1 IO_AL17 1379 1 Z
+bit 1379 C 1 *
+bit 1378 I 1 IO_AK17
+bit 1377 O 1 IO_AK17 1376 1 Z
+bit 1376 C 1 *
+bit 1375 I 1 IO_AJ17
+bit 1374 O 1 IO_AJ17 1373 1 Z
+bit 1373 C 1 *
+bit 1372 I 1 IO_AH17
+bit 1371 O 1 IO_AH17 1370 1 Z
+bit 1370 C 1 *
+bit 1369 I 1 IO_AG17
+bit 1368 O 1 IO_AG17 1367 1 Z
+bit 1367 C 1 *
+bit 1366 I 1 IO_AF17
+bit 1365 O 1 IO_AF17 1364 1 Z
+bit 1364 C 1 *
+bit 1363 I 1 IO_AE17
+bit 1362 O 1 IO_AE17 1361 1 Z
+bit 1361 C 1 *
+bit 1360 I 1 IO_AD17
+bit 1359 O 1 IO_AD17 1358 1 Z
+bit 1358 C 1 *
+bit 1357 I 1 IO_AN16
+bit 1356 O 1 IO_AN16 1355 1 Z
+bit 1355 C 1 *
+bit 1354 I 1 IO_AM16
+bit 1353 O 1 IO_AM16 1352 1 Z
+bit 1352 C 1 *
+bit 1351 I 1 IO_AJ16
+bit 1350 O 1 IO_AJ16 1349 1 Z
+bit 1349 C 1 *
+bit 1348 I 1 IO_AH16
+bit 1347 O 1 IO_AH16 1346 1 Z
+bit 1346 C 1 *
+bit 1345 I 1 IO_AE16
+bit 1344 O 1 IO_AE16 1343 1 Z
+bit 1343 C 1 *
+bit 1342 I 1 IO_AP15
+bit 1341 O 1 IO_AP15 1340 1 Z
+bit 1340 C 1 *
+bit 1339 I 1 IO_AN15
+bit 1338 O 1 IO_AN15 1337 1 Z
+bit 1337 C 1 *
+bit 1336 I 1 IO_AM15
+bit 1335 O 1 IO_AM15 1334 1 Z
+bit 1334 C 1 *
+bit 1333 I 1 IO_AL15
+bit 1332 O 1 IO_AL15 1331 1 Z
+bit 1331 C 1 *
+bit 1330 I 1 IO_AD16
+bit 1329 O 1 IO_AD16 1328 1 Z
+bit 1328 C 1 *
+bit 1327 I 1 IO_AJ15
+bit 1326 O 1 IO_AJ15 1325 1 Z
+bit 1325 C 1 *
+bit 1324 I 1 IO_AH15
+bit 1323 O 1 IO_AH15 1322 1 Z
+bit 1322 C 1 *
+bit 1321 I 1 IO_AF15
+bit 1320 O 1 IO_AF15 1319 1 Z
+bit 1319 C 1 *
+bit 1318 I 1 IO_AE15
+bit 1317 O 1 IO_AE15 1316 1 Z
+bit 1316 C 1 *
+bit 1315 I 1 IO_AD15
+bit 1314 O 1 IO_AD15 1313 1 Z
+bit 1313 C 1 *
+bit 1312 I 1 IO_AP14
+bit 1311 O 1 IO_AP14 1310 1 Z
+bit 1310 C 1 *
+bit 1309 I 1 IO_AN14
+bit 1308 O 1 IO_AN14 1307 1 Z
+bit 1307 C 1 *
+bit 1306 I 1 IO_AM14
+bit 1305 O 1 IO_AM14 1304 1 Z
+bit 1304 C 1 *
+bit 1303 I 1 IO_AL14
+bit 1302 O 1 IO_AL14 1301 1 Z
+bit 1301 C 1 *
+bit 1300 I 1 IO_AK14
+bit 1299 O 1 IO_AK14 1298 1 Z
+bit 1298 C 1 *
+bit 1297 I 1 IO_AJ14
+bit 1296 O 1 IO_AJ14 1295 1 Z
+bit 1295 C 1 *
+bit 1294 I 1 IO_AH14
+bit 1293 O 1 IO_AH14 1292 1 Z
+bit 1292 C 1 *
+bit 1291 I 1 IO_AG14
+bit 1290 O 1 IO_AG14 1289 1 Z
+bit 1289 C 1 *
+bit 1288 I 1 IO_AF14
+bit 1287 O 1 IO_AF14 1286 1 Z
+bit 1286 C 1 *
+bit 1285 I 1 IO_AE14
+bit 1284 O 1 IO_AE14 1283 1 Z
+bit 1283 C 1 *
+bit 1282 I 1 IO_AM13
+bit 1281 O 1 IO_AM13 1280 1 Z
+bit 1280 C 1 *
+bit 1279 I 1 IO_AL13
+bit 1278 O 1 IO_AL13 1277 1 Z
+bit 1277 C 1 *
+bit 1276 I 1 IO_AH13
+bit 1275 O 1 IO_AH13 1274 1 Z
+bit 1274 C 1 *
+bit 1273 I 1 IO_AG13
+bit 1272 O 1 IO_AG13 1271 1 Z
+bit 1271 C 1 *
+bit 1270 I 1 IO_AD14
+bit 1269 O 1 IO_AD14 1268 1 Z
+bit 1268 C 1 *
+bit 1267 I 1 IO_AE13
+bit 1266 O 1 IO_AE13 1265 1 Z
+bit 1265 C 1 *
+bit 1264 I 1 IO_AD13
+bit 1263 O 1 IO_AD13 1262 1 Z
+bit 1262 C 1 *
+bit 1261 I 1 IO_AP12
+bit 1260 O 1 IO_AP12 1259 1 Z
+bit 1259 C 1 *
+bit 1258 I 1 IO_AN12
+bit 1257 O 1 IO_AN12 1256 1 Z
+bit 1256 C 1 *
+bit 1255 I 1 IO_AM12
+bit 1254 O 1 IO_AM12 1253 1 Z
+bit 1253 C 1 *
+bit 1252 I 1 IO_AL12
+bit 1251 O 1 IO_AL12 1250 1 Z
+bit 1250 C 1 *
+bit 1249 I 1 IO_AK12
+bit 1248 O 1 IO_AK12 1247 1 Z
+bit 1247 C 1 *
+bit 1246 I 1 IO_AJ12
+bit 1245 O 1 IO_AJ12 1244 1 Z
+bit 1244 C 1 *
+bit 1243 I 1 IO_AH12
+bit 1242 O 1 IO_AH12 1241 1 Z
+bit 1241 C 1 *
+bit 1240 I 1 IO_AG12
+bit 1239 O 1 IO_AG12 1238 1 Z
+bit 1238 C 1 *
+bit 1237 I 1 IO_AF12
+bit 1236 O 1 IO_AF12 1235 1 Z
+bit 1235 C 1 *
+bit 1234 I 1 IO_AE12
+bit 1233 O 1 IO_AE12 1232 1 Z
+bit 1232 C 1 *
+bit 1231 I 1 IO_AP11
+bit 1230 O 1 IO_AP11 1229 1 Z
+bit 1229 C 1 *
+bit 1228 I 1 IO_AN11
+bit 1227 O 1 IO_AN11 1226 1 Z
+bit 1226 C 1 *
+bit 1225 I 1 IO_AD11
+bit 1224 O 1 IO_AD11 1223 1 Z
+bit 1223 C 1 *
+bit 1222 I 1 IO_AP10
+bit 1221 O 1 IO_AP10 1220 1 Z
+bit 1220 C 1 *
+bit 1219 I 1 IO_AN10
+bit 1218 O 1 IO_AN10 1217 1 Z
+bit 1217 C 1 *
+bit 1216 I 1 IO_AM10
+bit 1215 O 1 IO_AM10 1214 1 Z
+bit 1214 C 1 *
+bit 1213 I 1 IO_AL10
+bit 1212 O 1 IO_AL10 1211 1 Z
+bit 1211 C 1 *
+bit 1210 I 1 IO_AK10
+bit 1209 O 1 IO_AK10 1208 1 Z
+bit 1208 C 1 *
+bit 1207 I 1 IO_AJ10
+bit 1206 O 1 IO_AJ10 1205 1 Z
+bit 1205 C 1 *
+bit 1204 I 1 IO_AH10
+bit 1203 O 1 IO_AH10 1202 1 Z
+bit 1202 C 1 *
+bit 1201 I 1 IO_AG10
+bit 1200 O 1 IO_AG10 1199 1 Z
+bit 1199 C 1 *
+bit 1198 I 1 IO_AF10
+bit 1197 O 1 IO_AF10 1196 1 Z
+bit 1196 C 1 *
+bit 1195 I 1 IO_AN9
+bit 1194 O 1 IO_AN9 1193 1 Z
+bit 1193 C 1 *
+bit 1192 I 1 IO_AM9
+bit 1191 O 1 IO_AM9 1190 1 Z
+bit 1190 C 1 *
+bit 1189 I 1 IO_AL9
+bit 1188 O 1 IO_AL9 1187 1 Z
+bit 1187 C 1 *
+bit 1186 I 1 IO_AJ9
+bit 1185 O 1 IO_AJ9 1184 1 Z
+bit 1184 C 1 *
+bit 1183 I 1 IO_AH9
+bit 1182 O 1 IO_AH9 1181 1 Z
+bit 1181 C 1 *
+bit 1180 I 1 IO_AG9
+bit 1179 O 1 IO_AG9 1178 1 Z
+bit 1178 C 1 *
+bit 1177 I 1 IO_AP8
+bit 1176 O 1 IO_AP8 1175 1 Z
+bit 1175 C 1 *
+bit 1174 I 1 IO_AN8
+bit 1173 O 1 IO_AN8 1172 1 Z
+bit 1172 C 1 *
+bit 1171 I 1 IO_AL8
+bit 1170 O 1 IO_AL8 1169 1 Z
+bit 1169 C 1 *
+bit 1168 I 1 IO_AK8
+bit 1167 O 1 IO_AK8 1166 1 Z
+bit 1166 C 1 *
+bit 1165 I 1 IO_AJ8
+bit 1164 O 1 IO_AJ8 1163 1 Z
+bit 1163 C 1 *
+bit 1162 I 1 IO_AK7
+bit 1161 O 1 IO_AK7 1160 1 Z
+bit 1160 C 1 *
+bit 1159 I 1 IO_AJ7
+bit 1158 O 1 IO_AJ7 1157 1 Z
+bit 1157 C 1 *
+bit 1156 I 1 IO_AP6
+bit 1155 O 1 IO_AP6 1154 1 Z
+bit 1154 C 1 *
+bit 1153 I 1 IO_AN6
+bit 1152 O 1 IO_AN6 1151 1 Z
+bit 1151 C 1 *
+bit 1150 I 1 IO_AJ6
+bit 1149 O 1 IO_AJ6 1148 1 Z
+bit 1148 C 1 *
+bit 1147 I 1 IO_AM6
+bit 1146 O 1 IO_AM6 1145 1 Z
+bit 1145 C 1 *
+bit 1144 I 1 IO_AL6
+bit 1143 O 1 IO_AL6 1142 1 Z
+bit 1142 C 1 *
+bit 1141 I 1 IO_AN5
+bit 1140 O 1 IO_AN5 1139 1 Z
+bit 1139 C 1 *
+bit 1138 I 1 IO_AM5
+bit 1137 O 1 IO_AM5 1136 1 Z
+bit 1136 C 1 *
+bit 1135 I 1 IO_AL5
+bit 1134 O 1 IO_AL5 1133 1 Z
+bit 1133 C 1 *
+bit 1132 I 1 IO_AP4
+bit 1131 O 1 IO_AP4 1130 1 Z
+bit 1130 C 1 *
+bit 1129 I 1 IO_AN4
+bit 1128 O 1 IO_AN4 1127 1 Z
+bit 1127 C 1 *
+bit 1126 I 1 IO_AP3
+bit 1125 O 1 IO_AP3 1124 1 Z
+bit 1124 C 1 *
+bit 1123 I 1 IO_AN3
+bit 1122 O 1 IO_AN3 1121 1 Z
+bit 1121 C 1 *
+bit 1120 I 1 M2_AG8
+bit 1119 I 1 M0_AL4
+bit 1118 I 1 M1_AK4
+bit 1117 I 1 IO_AM2
+bit 1116 O 1 IO_AM2 1115 1 Z
+bit 1115 C 1 *
+bit 1114 I 1 IO_AM1
+bit 1113 O 1 IO_AM1 1112 1 Z
+bit 1112 C 1 *
+bit 1111 I 1 IO_AL2
+bit 1110 O 1 IO_AL2 1109 1 Z
+bit 1109 C 1 *
+bit 1108 I 1 IO_AL1
+bit 1107 O 1 IO_AL1 1106 1 Z
+bit 1106 C 1 *
+bit 1105 I 1 IO_AK3
+bit 1104 O 1 IO_AK3 1103 1 Z
+bit 1103 C 1 *
+bit 1102 I 1 IO_AK2
+bit 1101 O 1 IO_AK2 1100 1 Z
+bit 1100 C 1 *
+bit 1099 I 1 IO_AJ4
+bit 1098 O 1 IO_AJ4 1097 1 Z
+bit 1097 C 1 *
+bit 1096 I 1 IO_AJ3
+bit 1095 O 1 IO_AJ3 1094 1 Z
+bit 1094 C 1 *
+bit 1093 I 1 IO_AJ2
+bit 1092 O 1 IO_AJ2 1091 1 Z
+bit 1091 C 1 *
+bit 1090 I 1 IO_AJ1
+bit 1089 O 1 IO_AJ1 1088 1 Z
+bit 1088 C 1 *
+bit 1087 I 1 IO_AH6
+bit 1086 O 1 IO_AH6 1085 1 Z
+bit 1085 C 1 *
+bit 1084 I 1 IO_AH5
+bit 1083 O 1 IO_AH5 1082 1 Z
+bit 1082 C 1 *
+bit 1081 I 1 IO_AH2
+bit 1080 O 1 IO_AH2 1079 1 Z
+bit 1079 C 1 *
+bit 1078 O 1 *
+bit 1077 O 1 *
+bit 1076 O 1 *
+bit 1075 O 1 *
+bit 1074 O 1 *
+bit 1073 O 1 *
+bit 1072 I 1 IO_AH1
+bit 1071 O 1 IO_AH1 1070 1 Z
+bit 1070 C 1 *
+bit 1069 I 1 IO_AG6
+bit 1068 O 1 IO_AG6 1067 1 Z
+bit 1067 C 1 *
+bit 1066 I 1 IO_AG5
+bit 1065 O 1 IO_AG5 1064 1 Z
+bit 1064 C 1 *
+bit 1063 I 1 IO_AG2
+bit 1062 O 1 IO_AG2 1061 1 Z
+bit 1061 C 1 *
+bit 1060 I 1 IO_AG1
+bit 1059 O 1 IO_AG1 1058 1 Z
+bit 1058 C 1 *
+bit 1057 I 1 IO_AF7
+bit 1056 O 1 IO_AF7 1055 1 Z
+bit 1055 C 1 *
+bit 1054 I 1 IO_AF6
+bit 1053 O 1 IO_AF6 1052 1 Z
+bit 1052 C 1 *
+bit 1051 I 1 IO_AG4
+bit 1050 O 1 IO_AG4 1049 1 Z
+bit 1049 C 1 *
+bit 1048 I 1 IO_AF4
+bit 1047 O 1 IO_AF4 1046 1 Z
+bit 1046 C 1 *
+bit 1045 I 1 IO_AF3
+bit 1044 O 1 IO_AF3 1043 1 Z
+bit 1043 C 1 *
+bit 1042 I 1 IO_AF2
+bit 1041 O 1 IO_AF2 1040 1 Z
+bit 1040 C 1 *
+bit 1039 I 1 IO_AF8
+bit 1038 O 1 IO_AF8 1037 1 Z
+bit 1037 C 1 *
+bit 1036 I 1 IO_AE9
+bit 1035 O 1 IO_AE9 1034 1 Z
+bit 1034 C 1 *
+bit 1033 I 1 IO_AE8
+bit 1032 O 1 IO_AE8 1031 1 Z
+bit 1031 C 1 *
+bit 1030 I 1 IO_AE7
+bit 1029 O 1 IO_AE7 1028 1 Z
+bit 1028 C 1 *
+bit 1027 I 1 IO_AE6
+bit 1026 O 1 IO_AE6 1025 1 Z
+bit 1025 C 1 *
+bit 1024 I 1 IO_AE5
+bit 1023 O 1 IO_AE5 1022 1 Z
+bit 1022 C 1 *
+bit 1021 I 1 IO_AE4
+bit 1020 O 1 IO_AE4 1019 1 Z
+bit 1019 C 1 *
+bit 1018 I 1 IO_AE3
+bit 1017 O 1 IO_AE3 1016 1 Z
+bit 1016 C 1 *
+bit 1015 I 1 IO_AE2
+bit 1014 O 1 IO_AE2 1013 1 Z
+bit 1013 C 1 *
+bit 1012 I 1 IO_AE1
+bit 1011 O 1 IO_AE1 1010 1 Z
+bit 1010 C 1 *
+bit 1009 I 1 IO_AD10
+bit 1008 O 1 IO_AD10 1007 1 Z
+bit 1007 C 1 *
+bit 1006 I 1 IO_AD9
+bit 1005 O 1 IO_AD9 1004 1 Z
+bit 1004 C 1 *
+bit 1003 O 1 *
+bit 1002 O 1 *
+bit 1001 O 1 *
+bit 1000 O 1 *
+bit 999 O 1 *
+bit 998 O 1 *
+bit 997 I 1 IO_AD2
+bit 996 O 1 IO_AD2 995 1 Z
+bit 995 C 1 *
+bit 994 I 1 IO_AD1
+bit 993 O 1 IO_AD1 992 1 Z
+bit 992 C 1 *
+bit 991 I 1 IO_AC11
+bit 990 O 1 IO_AC11 989 1 Z
+bit 989 C 1 *
+bit 988 I 1 IO_AC10
+bit 987 O 1 IO_AC10 986 1 Z
+bit 986 C 1 *
+bit 985 I 1 IO_AC8
+bit 984 O 1 IO_AC8 983 1 Z
+bit 983 C 1 *
+bit 982 I 1 IO_AC7
+bit 981 O 1 IO_AC7 980 1 Z
+bit 980 C 1 *
+bit 979 I 1 IO_AC6
+bit 978 O 1 IO_AC6 977 1 Z
+bit 977 C 1 *
+bit 976 I 1 IO_AC5
+bit 975 O 1 IO_AC5 974 1 Z
+bit 974 C 1 *
+bit 973 I 1 IO_AC4
+bit 972 O 1 IO_AC4 971 1 Z
+bit 971 C 1 *
+bit 970 I 1 IO_AC3
+bit 969 O 1 IO_AC3 968 1 Z
+bit 968 C 1 *
+bit 967 I 1 IO_AC2
+bit 966 O 1 IO_AC2 965 1 Z
+bit 965 C 1 *
+bit 964 I 1 IO_AC1
+bit 963 O 1 IO_AC1 962 1 Z
+bit 962 C 1 *
+bit 961 I 1 IO_AC9
+bit 960 O 1 IO_AC9 959 1 Z
+bit 959 C 1 *
+bit 958 I 1 IO_AB10
+bit 957 O 1 IO_AB10 956 1 Z
+bit 956 C 1 *
+bit 955 I 1 IO_AB8
+bit 954 O 1 IO_AB8 953 1 Z
+bit 953 C 1 *
+bit 952 I 1 IO_AB7
+bit 951 O 1 IO_AB7 950 1 Z
+bit 950 C 1 *
+bit 949 I 1 IO_AB4
+bit 948 O 1 IO_AB4 947 1 Z
+bit 947 C 1 *
+bit 946 I 1 IO_AB3
+bit 945 O 1 IO_AB3 944 1 Z
+bit 944 C 1 *
+bit 943 I 1 IO_AB11
+bit 942 O 1 IO_AB11 941 1 Z
+bit 941 C 1 *
+bit 940 I 1 IO_AA11
+bit 939 O 1 IO_AA11 938 1 Z
+bit 938 C 1 *
+bit 937 O 1 *
+bit 936 O 1 *
+bit 935 O 1 *
+bit 934 O 1 *
+bit 933 O 1 *
+bit 932 O 1 *
+bit 931 I 1 IO_AA8
+bit 930 O 1 IO_AA8 929 1 Z
+bit 929 C 1 *
+bit 928 I 1 IO_AA7
+bit 927 O 1 IO_AA7 926 1 Z
+bit 926 C 1 *
+bit 925 I 1 IO_AA6
+bit 924 O 1 IO_AA6 923 1 Z
+bit 923 C 1 *
+bit 922 I 1 IO_AA5
+bit 921 O 1 IO_AA5 920 1 Z
+bit 920 C 1 *
+bit 919 I 1 IO_AA4
+bit 918 O 1 IO_AA4 917 1 Z
+bit 917 C 1 *
+bit 916 I 1 IO_AA3
+bit 915 O 1 IO_AA3 914 1 Z
+bit 914 C 1 *
+bit 913 I 1 IO_AA2
+bit 912 O 1 IO_AA2 911 1 Z
+bit 911 C 1 *
+bit 910 I 1 IO_AA1
+bit 909 O 1 IO_AA1 908 1 Z
+bit 908 C 1 *
+bit 907 I 1 IO_Y11
+bit 906 O 1 IO_Y11 905 1 Z
+bit 905 C 1 *
+bit 904 I 1 IO_Y10
+bit 903 O 1 IO_Y10 902 1 Z
+bit 902 C 1 *
+bit 901 I 1 IO_Y7
+bit 900 O 1 IO_Y7 899 1 Z
+bit 899 C 1 *
+bit 898 I 1 IO_Y6
+bit 897 O 1 IO_Y6 896 1 Z
+bit 896 C 1 *
+bit 895 I 1 IO_Y4
+bit 894 O 1 IO_Y4 893 1 Z
+bit 893 C 1 *
+bit 892 I 1 IO_Y3
+bit 891 O 1 IO_Y3 890 1 Z
+bit 890 C 1 *
+bit 889 I 1 IO_Y2
+bit 888 O 1 IO_Y2 887 1 Z
+bit 887 C 1 *
+bit 886 I 1 IO_Y1
+bit 885 O 1 IO_Y1 884 1 Z
+bit 884 C 1 *
+bit 883 I 1 IO_Y9
+bit 882 O 1 IO_Y9 881 1 Z
+bit 881 C 1 *
+bit 880 I 1 IO_W10
+bit 879 O 1 IO_W10 878 1 Z
+bit 878 C 1 *
+bit 877 I 1 IO_W7
+bit 876 O 1 IO_W7 875 1 Z
+bit 875 C 1 *
+bit 874 I 1 IO_W6
+bit 873 O 1 IO_W6 872 1 Z
+bit 872 C 1 *
+bit 871 I 1 IO_W3
+bit 870 O 1 IO_W3 869 1 Z
+bit 869 C 1 *
+bit 868 I 1 IO_W2
+bit 867 O 1 IO_W2 866 1 Z
+bit 866 C 1 *
+bit 865 I 1 IO_V10
+bit 864 O 1 IO_V10 863 1 Z
+bit 863 C 1 *
+bit 862 O 1 *
+bit 861 O 1 *
+bit 860 O 1 *
+bit 859 O 1 *
+bit 858 O 1 *
+bit 857 O 1 *
+bit 856 I 1 IO_V9
+bit 855 O 1 IO_V9 854 1 Z
+bit 854 C 1 *
+bit 853 I 1 IO_V8
+bit 852 O 1 IO_V8 851 1 Z
+bit 851 C 1 *
+bit 850 I 1 IO_V7
+bit 849 O 1 IO_V7 848 1 Z
+bit 848 C 1 *
+bit 847 I 1 IO_V6
+bit 846 O 1 IO_V6 845 1 Z
+bit 845 C 1 *
+bit 844 I 1 IO_V5
+bit 843 O 1 IO_V5 842 1 Z
+bit 842 C 1 *
+bit 841 I 1 IO_V4
+bit 840 O 1 IO_V4 839 1 Z
+bit 839 C 1 *
+bit 838 I 1 IO_V3
+bit 837 O 1 IO_V3 836 1 Z
+bit 836 C 1 *
+bit 835 I 1 IO_V2
+bit 834 O 1 IO_V2 833 1 Z
+bit 833 C 1 *
+bit 832 I 1 IO_V1
+bit 831 O 1 IO_V1 830 1 Z
+bit 830 C 1 *
+bit 829 I 1 IO_U1
+bit 828 O 1 IO_U1 827 1 Z
+bit 827 C 1 *
+bit 826 I 1 IO_U2
+bit 825 O 1 IO_U2 824 1 Z
+bit 824 C 1 *
+bit 823 I 1 IO_U3
+bit 822 O 1 IO_U3 821 1 Z
+bit 821 C 1 *
+bit 820 I 1 IO_U4
+bit 819 O 1 IO_U4 818 1 Z
+bit 818 C 1 *
+bit 817 I 1 IO_U5
+bit 816 O 1 IO_U5 815 1 Z
+bit 815 C 1 *
+bit 814 I 1 IO_U6
+bit 813 O 1 IO_U6 812 1 Z
+bit 812 C 1 *
+bit 811 I 1 IO_U7
+bit 810 O 1 IO_U7 809 1 Z
+bit 809 C 1 *
+bit 808 I 1 IO_U8
+bit 807 O 1 IO_U8 806 1 Z
+bit 806 C 1 *
+bit 805 I 1 IO_U9
+bit 804 O 1 IO_U9 803 1 Z
+bit 803 C 1 *
+bit 802 O 1 *
+bit 801 O 1 *
+bit 800 O 1 *
+bit 799 O 1 *
+bit 798 O 1 *
+bit 797 O 1 *
+bit 796 I 1 IO_U10
+bit 795 O 1 IO_U10 794 1 Z
+bit 794 C 1 *
+bit 793 I 1 IO_T2
+bit 792 O 1 IO_T2 791 1 Z
+bit 791 C 1 *
+bit 790 I 1 IO_T3
+bit 789 O 1 IO_T3 788 1 Z
+bit 788 C 1 *
+bit 787 I 1 IO_T6
+bit 786 O 1 IO_T6 785 1 Z
+bit 785 C 1 *
+bit 784 I 1 IO_T7
+bit 783 O 1 IO_T7 782 1 Z
+bit 782 C 1 *
+bit 781 I 1 IO_T10
+bit 780 O 1 IO_T10 779 1 Z
+bit 779 C 1 *
+bit 778 I 1 IO_R9
+bit 777 O 1 IO_R9 776 1 Z
+bit 776 C 1 *
+bit 775 I 1 IO_R1
+bit 774 O 1 IO_R1 773 1 Z
+bit 773 C 1 *
+bit 772 I 1 IO_R2
+bit 771 O 1 IO_R2 770 1 Z
+bit 770 C 1 *
+bit 769 I 1 IO_R3
+bit 768 O 1 IO_R3 767 1 Z
+bit 767 C 1 *
+bit 766 I 1 IO_R4
+bit 765 O 1 IO_R4 764 1 Z
+bit 764 C 1 *
+bit 763 I 1 IO_R6
+bit 762 O 1 IO_R6 761 1 Z
+bit 761 C 1 *
+bit 760 I 1 IO_R7
+bit 759 O 1 IO_R7 758 1 Z
+bit 758 C 1 *
+bit 757 I 1 IO_R10
+bit 756 O 1 IO_R10 755 1 Z
+bit 755 C 1 *
+bit 754 I 1 IO_R11
+bit 753 O 1 IO_R11 752 1 Z
+bit 752 C 1 *
+bit 751 I 1 IO_P1
+bit 750 O 1 IO_P1 749 1 Z
+bit 749 C 1 *
+bit 748 I 1 IO_P2
+bit 747 O 1 IO_P2 746 1 Z
+bit 746 C 1 *
+bit 745 I 1 IO_P3
+bit 744 O 1 IO_P3 743 1 Z
+bit 743 C 1 *
+bit 742 I 1 IO_P4
+bit 741 O 1 IO_P4 740 1 Z
+bit 740 C 1 *
+bit 739 I 1 IO_P5
+bit 738 O 1 IO_P5 737 1 Z
+bit 737 C 1 *
+bit 736 I 1 IO_P6
+bit 735 O 1 IO_P6 734 1 Z
+bit 734 C 1 *
+bit 733 I 1 IO_P7
+bit 732 O 1 IO_P7 731 1 Z
+bit 731 C 1 *
+bit 730 I 1 IO_P8
+bit 729 O 1 IO_P8 728 1 Z
+bit 728 C 1 *
+bit 727 O 1 *
+bit 726 O 1 *
+bit 725 O 1 *
+bit 724 O 1 *
+bit 723 O 1 *
+bit 722 O 1 *
+bit 721 I 1 IO_P11
+bit 720 O 1 IO_P11 719 1 Z
+bit 719 C 1 *
+bit 718 I 1 IO_N11
+bit 717 O 1 IO_N11 716 1 Z
+bit 716 C 1 *
+bit 715 I 1 IO_N3
+bit 714 O 1 IO_N3 713 1 Z
+bit 713 C 1 *
+bit 712 I 1 IO_N4
+bit 711 O 1 IO_N4 710 1 Z
+bit 710 C 1 *
+bit 709 I 1 IO_N7
+bit 708 O 1 IO_N7 707 1 Z
+bit 707 C 1 *
+bit 706 I 1 IO_N8
+bit 705 O 1 IO_N8 704 1 Z
+bit 704 C 1 *
+bit 703 I 1 IO_N10
+bit 702 O 1 IO_N10 701 1 Z
+bit 701 C 1 *
+bit 700 I 1 IO_M9
+bit 699 O 1 IO_M9 698 1 Z
+bit 698 C 1 *
+bit 697 I 1 IO_M1
+bit 696 O 1 IO_M1 695 1 Z
+bit 695 C 1 *
+bit 694 I 1 IO_M2
+bit 693 O 1 IO_M2 692 1 Z
+bit 692 C 1 *
+bit 691 I 1 IO_M3
+bit 690 O 1 IO_M3 689 1 Z
+bit 689 C 1 *
+bit 688 I 1 IO_M4
+bit 687 O 1 IO_M4 686 1 Z
+bit 686 C 1 *
+bit 685 I 1 IO_M5
+bit 684 O 1 IO_M5 683 1 Z
+bit 683 C 1 *
+bit 682 I 1 IO_M6
+bit 681 O 1 IO_M6 680 1 Z
+bit 680 C 1 *
+bit 679 I 1 IO_M7
+bit 678 O 1 IO_M7 677 1 Z
+bit 677 C 1 *
+bit 676 I 1 IO_M8
+bit 675 O 1 IO_M8 674 1 Z
+bit 674 C 1 *
+bit 673 I 1 IO_M10
+bit 672 O 1 IO_M10 671 1 Z
+bit 671 C 1 *
+bit 670 I 1 IO_M11
+bit 669 O 1 IO_M11 668 1 Z
+bit 668 C 1 *
+bit 667 I 1 IO_L1
+bit 666 O 1 IO_L1 665 1 Z
+bit 665 C 1 *
+bit 664 I 1 IO_L2
+bit 663 O 1 IO_L2 662 1 Z
+bit 662 C 1 *
+bit 661 O 1 *
+bit 660 O 1 *
+bit 659 O 1 *
+bit 658 O 1 *
+bit 657 O 1 *
+bit 656 O 1 *
+bit 655 I 1 IO_L9
+bit 654 O 1 IO_L9 653 1 Z
+bit 653 C 1 *
+bit 652 I 1 IO_L10
+bit 651 O 1 IO_L10 650 1 Z
+bit 650 C 1 *
+bit 649 I 1 IO_K1
+bit 648 O 1 IO_K1 647 1 Z
+bit 647 C 1 *
+bit 646 I 1 IO_K2
+bit 645 O 1 IO_K2 644 1 Z
+bit 644 C 1 *
+bit 643 I 1 IO_K3
+bit 642 O 1 IO_K3 641 1 Z
+bit 641 C 1 *
+bit 640 I 1 IO_K4
+bit 639 O 1 IO_K4 638 1 Z
+bit 638 C 1 *
+bit 637 I 1 IO_K5
+bit 636 O 1 IO_K5 635 1 Z
+bit 635 C 1 *
+bit 634 I 1 IO_K6
+bit 633 O 1 IO_K6 632 1 Z
+bit 632 C 1 *
+bit 631 I 1 IO_K7
+bit 630 O 1 IO_K7 629 1 Z
+bit 629 C 1 *
+bit 628 I 1 IO_K8
+bit 627 O 1 IO_K8 626 1 Z
+bit 626 C 1 *
+bit 625 I 1 IO_K9
+bit 624 O 1 IO_K9 623 1 Z
+bit 623 C 1 *
+bit 622 I 1 IO_J8
+bit 621 O 1 IO_J8 620 1 Z
+bit 620 C 1 *
+bit 619 I 1 IO_J2
+bit 618 O 1 IO_J2 617 1 Z
+bit 617 C 1 *
+bit 616 I 1 IO_J3
+bit 615 O 1 IO_J3 614 1 Z
+bit 614 C 1 *
+bit 613 I 1 IO_J4
+bit 612 O 1 IO_J4 611 1 Z
+bit 611 C 1 *
+bit 610 I 1 IO_H4
+bit 609 O 1 IO_H4 608 1 Z
+bit 608 C 1 *
+bit 607 I 1 IO_J6
+bit 606 O 1 IO_J6 605 1 Z
+bit 605 C 1 *
+bit 604 I 1 IO_J7
+bit 603 O 1 IO_J7 602 1 Z
+bit 602 C 1 *
+bit 601 I 1 IO_H1
+bit 600 O 1 IO_H1 599 1 Z
+bit 599 C 1 *
+bit 598 I 1 IO_H2
+bit 597 O 1 IO_H2 596 1 Z
+bit 596 C 1 *
+bit 595 I 1 IO_H5
+bit 594 O 1 IO_H5 593 1 Z
+bit 593 C 1 *
+bit 592 I 1 IO_H6
+bit 591 O 1 IO_H6 590 1 Z
+bit 590 C 1 *
+bit 589 I 1 IO_G1
+bit 588 O 1 IO_G1 587 1 Z
+bit 587 C 1 *
+bit 586 O 1 *
+bit 585 O 1 *
+bit 584 O 1 *
+bit 583 O 1 *
+bit 582 O 1 *
+bit 581 O 1 *
+bit 580 I 1 IO_G2
+bit 579 O 1 IO_G2 578 1 Z
+bit 578 C 1 *
+bit 577 I 1 IO_G5
+bit 576 O 1 IO_G5 575 1 Z
+bit 575 C 1 *
+bit 574 I 1 IO_G6
+bit 573 O 1 IO_G6 572 1 Z
+bit 572 C 1 *
+bit 571 I 1 IO_F1
+bit 570 O 1 IO_F1 569 1 Z
+bit 569 C 1 *
+bit 568 I 1 IO_F2
+bit 567 O 1 IO_F2 566 1 Z
+bit 566 C 1 *
+bit 565 I 1 IO_F3
+bit 564 O 1 IO_F3 563 1 Z
+bit 563 C 1 *
+bit 562 I 1 IO_F4
+bit 561 O 1 IO_F4 560 1 Z
+bit 560 C 1 *
+bit 559 I 1 IO_E2
+bit 558 O 1 IO_E2 557 1 Z
+bit 557 C 1 *
+bit 556 I 1 IO_E3
+bit 555 O 1 IO_E3 554 1 Z
+bit 554 C 1 *
+bit 553 I 1 IO_D1
+bit 552 O 1 IO_D1 551 1 Z
+bit 551 C 1 *
+bit 550 I 1 IO_D2
+bit 549 O 1 IO_D2 548 1 Z
+bit 548 C 1 *
+bit 547 I 1 IO_C1
+bit 546 O 1 IO_C1 545 1 Z
+bit 545 C 1 *
+bit 544 I 1 IO_C2
+bit 543 O 1 IO_C2 542 1 Z
+bit 542 C 1 *
+bit 541 O 1 *
+bit 540 I 1 HSWAP_EN_L11
+bit 539 I 1 IO_D5
+bit 538 O 1 IO_D5 537 1 Z
+bit 537 C 1 *
+bit 536 I 1 IO_B3
+bit 535 O 1 IO_B3 534 1 Z
+bit 534 C 1 *
+bit 533 I 1 IO_A3
+bit 532 O 1 IO_A3 531 1 Z
+bit 531 C 1 *
+bit 530 I 1 IO_B4
+bit 529 O 1 IO_B4 528 1 Z
+bit 528 C 1 *
+bit 527 I 1 IO_A4
+bit 526 O 1 IO_A4 525 1 Z
+bit 525 C 1 *
+bit 524 I 1 IO_F6
+bit 523 O 1 IO_F6 522 1 Z
+bit 522 C 1 *
+bit 521 I 1 IO_C5
+bit 520 O 1 IO_C5 519 1 Z
+bit 519 C 1 *
+bit 518 I 1 IO_B5
+bit 517 O 1 IO_B5 516 1 Z
+bit 516 C 1 *
+bit 515 I 1 IO_D6
+bit 514 O 1 IO_D6 513 1 Z
+bit 513 C 1 *
+bit 512 I 1 IO_C6
+bit 511 O 1 IO_C6 510 1 Z
+bit 510 C 1 *
+bit 509 I 1 IO_H8
+bit 508 O 1 IO_H8 507 1 Z
+bit 507 C 1 *
+bit 506 I 1 IO_B6
+bit 505 O 1 IO_B6 504 1 Z
+bit 504 C 1 *
+bit 503 I 1 IO_A6
+bit 502 O 1 IO_A6 501 1 Z
+bit 501 C 1 *
+bit 500 I 1 IO_F7
+bit 499 O 1 IO_F7 498 1 Z
+bit 498 C 1 *
+bit 497 I 1 IO_E7
+bit 496 O 1 IO_E7 495 1 Z
+bit 495 C 1 *
+bit 494 I 1 IO_F8
+bit 493 O 1 IO_F8 492 1 Z
+bit 492 C 1 *
+bit 491 I 1 IO_E8
+bit 490 O 1 IO_E8 489 1 Z
+bit 489 C 1 *
+bit 488 I 1 IO_D8
+bit 487 O 1 IO_D8 486 1 Z
+bit 486 C 1 *
+bit 485 I 1 IO_B8
+bit 484 O 1 IO_B8 483 1 Z
+bit 483 C 1 *
+bit 482 I 1 IO_A8
+bit 481 O 1 IO_A8 480 1 Z
+bit 480 C 1 *
+bit 479 I 1 IO_H9
+bit 478 O 1 IO_H9 477 1 Z
+bit 477 C 1 *
+bit 476 I 1 IO_G9
+bit 475 O 1 IO_G9 474 1 Z
+bit 474 C 1 *
+bit 473 I 1 IO_F9
+bit 472 O 1 IO_F9 471 1 Z
+bit 471 C 1 *
+bit 470 I 1 IO_D9
+bit 469 O 1 IO_D9 468 1 Z
+bit 468 C 1 *
+bit 467 I 1 IO_C9
+bit 466 O 1 IO_C9 465 1 Z
+bit 465 C 1 *
+bit 464 I 1 IO_B9
+bit 463 O 1 IO_B9 462 1 Z
+bit 462 C 1 *
+bit 461 I 1 IO_J10
+bit 460 O 1 IO_J10 459 1 Z
+bit 459 C 1 *
+bit 458 I 1 IO_H10
+bit 457 O 1 IO_H10 456 1 Z
+bit 456 C 1 *
+bit 455 I 1 IO_G10
+bit 454 O 1 IO_G10 453 1 Z
+bit 453 C 1 *
+bit 452 I 1 IO_F10
+bit 451 O 1 IO_F10 450 1 Z
+bit 450 C 1 *
+bit 449 I 1 IO_E10
+bit 448 O 1 IO_E10 447 1 Z
+bit 447 C 1 *
+bit 446 I 1 IO_D10
+bit 445 O 1 IO_D10 444 1 Z
+bit 444 C 1 *
+bit 443 I 1 IO_C10
+bit 442 O 1 IO_C10 441 1 Z
+bit 441 C 1 *
+bit 440 I 1 IO_B10
+bit 439 O 1 IO_B10 438 1 Z
+bit 438 C 1 *
+bit 437 I 1 IO_A10
+bit 436 O 1 IO_A10 435 1 Z
+bit 435 C 1 *
+bit 434 I 1 IO_J11
+bit 433 O 1 IO_J11 432 1 Z
+bit 432 C 1 *
+bit 431 I 1 IO_L12
+bit 430 O 1 IO_L12 429 1 Z
+bit 429 C 1 *
+bit 428 I 1 IO_K12
+bit 427 O 1 IO_K12 426 1 Z
+bit 426 C 1 *
+bit 425 I 1 IO_J12
+bit 424 O 1 IO_J12 423 1 Z
+bit 423 C 1 *
+bit 422 I 1 IO_H12
+bit 421 O 1 IO_H12 420 1 Z
+bit 420 C 1 *
+bit 419 I 1 IO_G12
+bit 418 O 1 IO_G12 417 1 Z
+bit 417 C 1 *
+bit 416 I 1 IO_F12
+bit 415 O 1 IO_F12 414 1 Z
+bit 414 C 1 *
+bit 413 I 1 IO_E12
+bit 412 O 1 IO_E12 411 1 Z
+bit 411 C 1 *
+bit 410 I 1 IO_D12
+bit 409 O 1 IO_D12 408 1 Z
+bit 408 C 1 *
+bit 407 I 1 IO_C12
+bit 406 O 1 IO_C12 405 1 Z
+bit 405 C 1 *
+bit 404 I 1 IO_L13
+bit 403 O 1 IO_L13 402 1 Z
+bit 402 C 1 *
+bit 401 I 1 IO_B12
+bit 400 O 1 IO_B12 399 1 Z
+bit 399 C 1 *
+bit 398 I 1 IO_A12
+bit 397 O 1 IO_A12 396 1 Z
+bit 396 C 1 *
+bit 395 I 1 IO_H13
+bit 394 O 1 IO_H13 393 1 Z
+bit 393 C 1 *
+bit 392 I 1 IO_G13
+bit 391 O 1 IO_G13 390 1 Z
+bit 390 C 1 *
+bit 389 I 1 IO_K13
+bit 388 O 1 IO_K13 387 1 Z
+bit 387 C 1 *
+bit 386 I 1 IO_D13
+bit 385 O 1 IO_D13 384 1 Z
+bit 384 C 1 *
+bit 383 I 1 IO_C13
+bit 382 O 1 IO_C13 381 1 Z
+bit 381 C 1 *
+bit 380 I 1 IO_L14
+bit 379 O 1 IO_L14 378 1 Z
+bit 378 C 1 *
+bit 377 I 1 IO_K14
+bit 376 O 1 IO_K14 375 1 Z
+bit 375 C 1 *
+bit 374 I 1 IO_J14
+bit 373 O 1 IO_J14 372 1 Z
+bit 372 C 1 *
+bit 371 I 1 IO_H14
+bit 370 O 1 IO_H14 369 1 Z
+bit 369 C 1 *
+bit 368 I 1 IO_G14
+bit 367 O 1 IO_G14 366 1 Z
+bit 366 C 1 *
+bit 365 I 1 IO_F14
+bit 364 O 1 IO_F14 363 1 Z
+bit 363 C 1 *
+bit 362 I 1 IO_E14
+bit 361 O 1 IO_E14 360 1 Z
+bit 360 C 1 *
+bit 359 I 1 IO_L15
+bit 358 O 1 IO_L15 357 1 Z
+bit 357 C 1 *
+bit 356 I 1 IO_D14
+bit 355 O 1 IO_D14 354 1 Z
+bit 354 C 1 *
+bit 353 I 1 IO_C14
+bit 352 O 1 IO_C14 351 1 Z
+bit 351 C 1 *
+bit 350 I 1 IO_B14
+bit 349 O 1 IO_B14 348 1 Z
+bit 348 C 1 *
+bit 347 I 1 IO_A14
+bit 346 O 1 IO_A14 345 1 Z
+bit 345 C 1 *
+bit 344 I 1 IO_L16
+bit 343 O 1 IO_L16 342 1 Z
+bit 342 C 1 *
+bit 341 I 1 IO_K15
+bit 340 O 1 IO_K15 339 1 Z
+bit 339 C 1 *
+bit 338 I 1 IO_J15
+bit 337 O 1 IO_J15 336 1 Z
+bit 336 C 1 *
+bit 335 I 1 IO_G15
+bit 334 O 1 IO_G15 333 1 Z
+bit 333 C 1 *
+bit 332 I 1 IO_F15
+bit 331 O 1 IO_F15 330 1 Z
+bit 330 C 1 *
+bit 329 I 1 IO_K16
+bit 328 O 1 IO_K16 327 1 Z
+bit 327 C 1 *
+bit 326 I 1 IO_D15
+bit 325 O 1 IO_D15 324 1 Z
+bit 324 C 1 *
+bit 323 I 1 IO_C15
+bit 322 O 1 IO_C15 321 1 Z
+bit 321 C 1 *
+bit 320 I 1 IO_B15
+bit 319 O 1 IO_B15 318 1 Z
+bit 318 C 1 *
+bit 317 I 1 IO_A15
+bit 316 O 1 IO_A15 315 1 Z
+bit 315 C 1 *
+bit 314 I 1 IO_L17
+bit 313 O 1 IO_L17 312 1 Z
+bit 312 C 1 *
+bit 311 I 1 IO_G16
+bit 310 O 1 IO_G16 309 1 Z
+bit 309 C 1 *
+bit 308 I 1 IO_F16
+bit 307 O 1 IO_F16 306 1 Z
+bit 306 C 1 *
+bit 305 I 1 IO_C16
+bit 304 O 1 IO_C16 303 1 Z
+bit 303 C 1 *
+bit 302 I 1 IO_B16
+bit 301 O 1 IO_B16 300 1 Z
+bit 300 C 1 *
+bit 299 I 1 IO_K17
+bit 298 O 1 IO_K17 297 1 Z
+bit 297 C 1 *
+bit 296 I 1 IO_J17
+bit 295 O 1 IO_J17 294 1 Z
+bit 294 C 1 *
+bit 293 I 1 IO_H17
+bit 292 O 1 IO_H17 291 1 Z
+bit 291 C 1 *
+bit 290 I 1 IO_G17
+bit 289 O 1 IO_G17 288 1 Z
+bit 288 C 1 *
+bit 287 I 1 IO_F17
+bit 286 O 1 IO_F17 285 1 Z
+bit 285 C 1 *
+bit 284 I 1 IO_E17
+bit 283 O 1 IO_E17 282 1 Z
+bit 282 C 1 *
+bit 281 I 1 IO_D17
+bit 280 O 1 IO_D17 279 1 Z
+bit 279 C 1 *
+bit 278 I 1 IO_C17
+bit 277 O 1 IO_C17 276 1 Z
+bit 276 C 1 *
+bit 275 I 1 IO_B17
+bit 274 O 1 IO_B17 273 1 Z
+bit 273 C 1 *
+bit 272 I 1 IO_A17
+bit 271 O 1 IO_A17 270 1 Z
+bit 270 C 1 *
+bit 269 I 1 IO_A18
+bit 268 O 1 IO_A18 267 1 Z
+bit 267 C 1 *
+bit 266 I 1 IO_B18
+bit 265 O 1 IO_B18 264 1 Z
+bit 264 C 1 *
+bit 263 I 1 IO_C18
+bit 262 O 1 IO_C18 261 1 Z
+bit 261 C 1 *
+bit 260 I 1 IO_D18
+bit 259 O 1 IO_D18 258 1 Z
+bit 258 C 1 *
+bit 257 I 1 IO_E18
+bit 256 O 1 IO_E18 255 1 Z
+bit 255 C 1 *
+bit 254 I 1 IO_F18
+bit 253 O 1 IO_F18 252 1 Z
+bit 252 C 1 *
+bit 251 I 1 IO_G18
+bit 250 O 1 IO_G18 249 1 Z
+bit 249 C 1 *
+bit 248 I 1 IO_H18
+bit 247 O 1 IO_H18 246 1 Z
+bit 246 C 1 *
+bit 245 I 1 IO_J18
+bit 244 O 1 IO_J18 243 1 Z
+bit 243 C 1 *
+bit 242 I 1 IO_K18
+bit 241 O 1 IO_K18 240 1 Z
+bit 240 C 1 *
+bit 239 I 1 IO_L18
+bit 238 O 1 IO_L18 237 1 Z
+bit 237 C 1 *
+bit 236 I 1 IO_B19
+bit 235 O 1 IO_B19 234 1 Z
+bit 234 C 1 *
+bit 233 I 1 IO_C19
+bit 232 O 1 IO_C19 231 1 Z
+bit 231 C 1 *
+bit 230 I 1 IO_F19
+bit 229 O 1 IO_F19 228 1 Z
+bit 228 C 1 *
+bit 227 I 1 IO_G19
+bit 226 O 1 IO_G19 225 1 Z
+bit 225 C 1 *
+bit 224 I 1 IO_K19
+bit 223 O 1 IO_K19 222 1 Z
+bit 222 C 1 *
+bit 221 I 1 IO_A20
+bit 220 O 1 IO_A20 219 1 Z
+bit 219 C 1 *
+bit 218 I 1 IO_B20
+bit 217 O 1 IO_B20 216 1 Z
+bit 216 C 1 *
+bit 215 I 1 IO_C20
+bit 214 O 1 IO_C20 213 1 Z
+bit 213 C 1 *
+bit 212 I 1 IO_D20
+bit 211 O 1 IO_D20 210 1 Z
+bit 210 C 1 *
+bit 209 I 1 IO_L19
+bit 208 O 1 IO_L19 207 1 Z
+bit 207 C 1 *
+bit 206 I 1 IO_F20
+bit 205 O 1 IO_F20 204 1 Z
+bit 204 C 1 *
+bit 203 I 1 IO_G20
+bit 202 O 1 IO_G20 201 1 Z
+bit 201 C 1 *
+bit 200 I 1 IO_J20
+bit 199 O 1 IO_J20 198 1 Z
+bit 198 C 1 *
+bit 197 I 1 IO_K20
+bit 196 O 1 IO_K20 195 1 Z
+bit 195 C 1 *
+bit 194 I 1 IO_L20
+bit 193 O 1 IO_L20 192 1 Z
+bit 192 C 1 *
+bit 191 I 1 IO_A21
+bit 190 O 1 IO_A21 189 1 Z
+bit 189 C 1 *
+bit 188 I 1 IO_B21
+bit 187 O 1 IO_B21 186 1 Z
+bit 186 C 1 *
+bit 185 I 1 IO_C21
+bit 184 O 1 IO_C21 183 1 Z
+bit 183 C 1 *
+bit 182 I 1 IO_D21
+bit 181 O 1 IO_D21 180 1 Z
+bit 180 C 1 *
+bit 179 I 1 IO_E21
+bit 178 O 1 IO_E21 177 1 Z
+bit 177 C 1 *
+bit 176 I 1 IO_F21
+bit 175 O 1 IO_F21 174 1 Z
+bit 174 C 1 *
+bit 173 I 1 IO_G21
+bit 172 O 1 IO_G21 171 1 Z
+bit 171 C 1 *
+bit 170 I 1 IO_H21
+bit 169 O 1 IO_H21 168 1 Z
+bit 168 C 1 *
+bit 167 I 1 IO_J21
+bit 166 O 1 IO_J21 165 1 Z
+bit 165 C 1 *
+bit 164 I 1 IO_K21
+bit 163 O 1 IO_K21 162 1 Z
+bit 162 C 1 *
+bit 161 I 1 IO_C22
+bit 160 O 1 IO_C22 159 1 Z
+bit 159 C 1 *
+bit 158 I 1 IO_D22
+bit 157 O 1 IO_D22 156 1 Z
+bit 156 C 1 *
+bit 155 I 1 IO_G22
+bit 154 O 1 IO_G22 153 1 Z
+bit 153 C 1 *
+bit 152 I 1 IO_H22
+bit 151 O 1 IO_H22 150 1 Z
+bit 150 C 1 *
+bit 149 I 1 IO_L21
+bit 148 O 1 IO_L21 147 1 Z
+bit 147 C 1 *
+bit 146 I 1 IO_K22
+bit 145 O 1 IO_K22 144 1 Z
+bit 144 C 1 *
+bit 143 I 1 IO_L22
+bit 142 O 1 IO_L22 141 1 Z
+bit 141 C 1 *
+bit 140 I 1 IO_A23
+bit 139 O 1 IO_A23 138 1 Z
+bit 138 C 1 *
+bit 137 I 1 IO_B23
+bit 136 O 1 IO_B23 135 1 Z
+bit 135 C 1 *
+bit 134 I 1 IO_C23
+bit 133 O 1 IO_C23 132 1 Z
+bit 132 C 1 *
+bit 131 I 1 IO_D23
+bit 130 O 1 IO_D23 129 1 Z
+bit 129 C 1 *
+bit 128 I 1 IO_E23
+bit 127 O 1 IO_E23 126 1 Z
+bit 126 C 1 *
+bit 125 I 1 IO_F23
+bit 124 O 1 IO_F23 123 1 Z
+bit 123 C 1 *
+bit 122 I 1 IO_G23
+bit 121 O 1 IO_G23 120 1 Z
+bit 120 C 1 *
+bit 119 I 1 IO_H23
+bit 118 O 1 IO_H23 117 1 Z
+bit 117 C 1 *
+bit 116 I 1 IO_J23
+bit 115 O 1 IO_J23 114 1 Z
+bit 114 C 1 *
+bit 113 I 1 IO_K23
+bit 112 O 1 IO_K23 111 1 Z
+bit 111 C 1 *
+bit 110 I 1 IO_A24
+bit 109 O 1 IO_A24 108 1 Z
+bit 108 C 1 *
+bit 107 I 1 IO_B24
+bit 106 O 1 IO_B24 105 1 Z
+bit 105 C 1 *
+bit 104 I 1 IO_L24
+bit 103 O 1 IO_L24 102 1 Z
+bit 102 C 1 *
+bit 101 I 1 IO_A25
+bit 100 O 1 IO_A25 99 1 Z
+bit 99 C 1 *
+bit 98 I 1 IO_B25
+bit 97 O 1 IO_B25 96 1 Z
+bit 96 C 1 *
+bit 95 I 1 IO_C25
+bit 94 O 1 IO_C25 93 1 Z
+bit 93 C 1 *
+bit 92 I 1 IO_D25
+bit 91 O 1 IO_D25 90 1 Z
+bit 90 C 1 *
+bit 89 I 1 IO_E25
+bit 88 O 1 IO_E25 87 1 Z
+bit 87 C 1 *
+bit 86 I 1 IO_F25
+bit 85 O 1 IO_F25 84 1 Z
+bit 84 C 1 *
+bit 83 I 1 IO_G25
+bit 82 O 1 IO_G25 81 1 Z
+bit 81 C 1 *
+bit 80 I 1 IO_H25
+bit 79 O 1 IO_H25 78 1 Z
+bit 78 C 1 *
+bit 77 I 1 IO_J25
+bit 76 O 1 IO_J25 75 1 Z
+bit 75 C 1 *
+bit 74 I 1 IO_B26
+bit 73 O 1 IO_B26 72 1 Z
+bit 72 C 1 *
+bit 71 I 1 IO_C26
+bit 70 O 1 IO_C26 69 1 Z
+bit 69 C 1 *
+bit 68 I 1 IO_D26
+bit 67 O 1 IO_D26 66 1 Z
+bit 66 C 1 *
+bit 65 I 1 IO_F26
+bit 64 O 1 IO_F26 63 1 Z
+bit 63 C 1 *
+bit 62 I 1 IO_G26
+bit 61 O 1 IO_G26 60 1 Z
+bit 60 C 1 *
+bit 59 I 1 IO_H26
+bit 58 O 1 IO_H26 57 1 Z
+bit 57 C 1 *
+bit 56 I 1 IO_A27
+bit 55 O 1 IO_A27 54 1 Z
+bit 54 C 1 *
+bit 53 I 1 IO_B27
+bit 52 O 1 IO_B27 51 1 Z
+bit 51 C 1 *
+bit 50 I 1 IO_D27
+bit 49 O 1 IO_D27 48 1 Z
+bit 48 C 1 *
+bit 47 I 1 IO_E27
+bit 46 O 1 IO_E27 45 1 Z
+bit 45 C 1 *
+bit 44 I 1 IO_F27
+bit 43 O 1 IO_F27 42 1 Z
+bit 42 C 1 *
+bit 41 I 1 IO_E28
+bit 40 O 1 IO_E28 39 1 Z
+bit 39 C 1 *
+bit 38 I 1 IO_F28
+bit 37 O 1 IO_F28 36 1 Z
+bit 36 C 1 *
+bit 35 I 1 IO_A29
+bit 34 O 1 IO_A29 33 1 Z
+bit 33 C 1 *
+bit 32 I 1 IO_B29
+bit 31 O 1 IO_B29 30 1 Z
+bit 30 C 1 *
+bit 29 I 1 IO_F29
+bit 28 O 1 IO_F29 27 1 Z
+bit 27 C 1 *
+bit 26 I 1 IO_C29
+bit 25 O 1 IO_C29 24 1 Z
+bit 24 C 1 *
+bit 23 I 1 IO_D29
+bit 22 O 1 IO_D29 21 1 Z
+bit 21 C 1 *
+bit 20 I 1 IO_B30
+bit 19 O 1 IO_B30 18 1 Z
+bit 18 C 1 *
+bit 17 I 1 IO_C30
+bit 16 O 1 IO_C30 15 1 Z
+bit 15 C 1 *
+bit 14 I 1 IO_D30
+bit 13 O 1 IO_D30 12 1 Z
+bit 12 C 1 *
+bit 11 I 1 IO_A31
+bit 10 O 1 IO_A31 9 1 Z
+bit 9 C 1 *
+bit 8 I 1 IO_B31
+bit 7 O 1 IO_B31 6 1 Z
+bit 6 C 1 *
+bit 5 I 1 IO_A32
+bit 4 O 1 IO_A32 3 1 Z
+bit 3 C 1 *
+bit 2 I 1 IO_B32
+bit 1 O 1 IO_B32 0 1 Z
+bit 0 C 1 *
--- /dev/null
+signal CCLK_AD26
+signal DONE_AC24
+signal GND1
+signal GND2
+signal GND3
+signal GND4
+signal GND5
+signal GND6
+signal GND7
+signal GND8
+signal GND9
+signal GND10
+signal GND11
+signal GND12
+signal GND13
+signal GND14
+signal GND15
+signal GND16
+signal GND17
+signal GND18
+signal GND19
+signal GND20
+signal GND21
+signal GND22
+signal GND23
+signal GND24
+signal GND25
+signal GND26
+signal GND27
+signal GND28
+signal GND29
+signal GND30
+signal GND31
+signal GND32
+signal GND33
+signal GND34
+signal GND35
+signal GND36
+signal GND37
+signal GND38
+signal GND39
+signal GND40
+signal GND41
+signal GND42
+signal GND43
+signal GND44
+signal GND45
+signal GND46
+signal GND47
+signal GND48
+signal GND49
+signal GND50
+signal GND51
+signal GND52
+signal GND53
+signal GND54
+signal GND55
+signal GND56
+signal GND57
+signal GND58
+signal GND59
+signal GND60
+signal GND61
+signal GND62
+signal GND63
+signal GND64
+signal GND65
+signal GND66
+signal GND67
+signal GND68
+signal GND69
+signal GND70
+signal GND71
+signal GND72
+signal GND73
+signal GND74
+signal GND75
+signal GND76
+signal HSWAP_EN_C2
+signal M0_AE3
+signal M1_AC3
+signal M2_AF3
+signal PROG_B
+signal TCK
+signal TDI
+signal TDO
+signal TMS
+signal VCCAUX1
+signal VCCAUX2
+signal VCCAUX3
+signal VCCAUX4
+signal VCCAUX5
+signal VCCAUX6
+signal VCCAUX7
+signal VCCAUX8
+signal VCCAUX9
+signal VCCAUX10
+signal VCCAUX11
+signal VCCAUX12
+signal VCCAUX13
+signal VCCAUX14
+signal VCCAUX15
+signal VCCAUX16
+signal VCCINT1
+signal VCCINT2
+signal VCCINT3
+signal VCCINT4
+signal VCCINT5
+signal VCCINT6
+signal VCCINT7
+signal VCCINT8
+signal VCCINT9
+signal VCCINT10
+signal VCCINT11
+signal VCCINT12
+signal VCCINT13
+signal VCCINT14
+signal VCCINT15
+signal VCCINT16
+signal VCCINT17
+signal VCCINT18
+signal VCCINT19
+signal VCCINT20
+signal VCCO01
+signal VCCO02
+signal VCCO03
+signal VCCO04
+signal VCCO05
+signal VCCO06
+signal VCCO07
+signal VCCO08
+signal VCCO11
+signal VCCO12
+signal VCCO13
+signal VCCO14
+signal VCCO15
+signal VCCO16
+signal VCCO17
+signal VCCO18
+signal VCCO21
+signal VCCO22
+signal VCCO23
+signal VCCO24
+signal VCCO25
+signal VCCO26
+signal VCCO27
+signal VCCO28
+signal VCCO31
+signal VCCO32
+signal VCCO33
+signal VCCO34
+signal VCCO35
+signal VCCO36
+signal VCCO37
+signal VCCO38
+signal VCCO41
+signal VCCO42
+signal VCCO43
+signal VCCO44
+signal VCCO45
+signal VCCO46
+signal VCCO47
+signal VCCO48
+signal VCCO51
+signal VCCO52
+signal VCCO53
+signal VCCO54
+signal VCCO55
+signal VCCO56
+signal VCCO57
+signal VCCO58
+signal VCCO61
+signal VCCO62
+signal VCCO63
+signal VCCO64
+signal VCCO65
+signal VCCO66
+signal VCCO67
+signal VCCO68
+signal VCCO71
+signal VCCO72
+signal VCCO73
+signal VCCO74
+signal VCCO75
+signal VCCO76
+signal VCCO77
+signal VCCO78
+signal IO_A3
+signal IO_A4
+signal IO_A5
+signal IO_A6
+signal IO_A7
+signal IO_A8
+signal IO_A10
+signal IO_A11
+signal IO_A12
+signal IO_A13
+signal IO_A14
+signal IO_A15
+signal IO_A16
+signal IO_A17
+signal IO_A19
+signal IO_A20
+signal IO_A21
+signal IO_A22
+signal IO_A23
+signal IO_B3
+signal IO_B4
+signal IO_B5
+signal IO_B6
+signal IO_B7
+signal IO_B8
+signal IO_B9
+signal IO_B10
+signal IO_B11
+signal IO_B12
+signal IO_B13
+signal IO_B14
+signal IO_B15
+signal IO_B16
+signal IO_B17
+signal IO_B18
+signal IO_B19
+signal IO_B20
+signal IO_B21
+signal IO_B22
+signal IO_B23
+signal IO_C4
+signal IO_C5
+signal IO_C6
+signal IO_C8
+signal IO_C9
+signal IO_C10
+signal IO_C12
+signal IO_C13
+signal IO_C14
+signal IO_C15
+signal IO_C17
+signal IO_C18
+signal IO_C19
+signal IO_C21
+signal IO_C22
+signal IO_C23
+signal IO_C25
+signal IO_C26
+signal IO_D1
+signal IO_D2
+signal IO_D5
+signal IO_D6
+signal IO_D7
+signal IO_D8
+signal IO_D9
+signal IO_D10
+signal IO_D11
+signal IO_D13
+signal IO_D14
+signal IO_D16
+signal IO_D17
+signal IO_D18
+signal IO_D19
+signal IO_D20
+signal IO_D21
+signal IO_D22
+signal IO_D25
+signal IO_D26
+signal IO_E1
+signal IO_E2
+signal IO_E3
+signal IO_E4
+signal IO_E5
+signal IO_E6
+signal IO_E7
+signal IO_E8
+signal IO_E9
+signal IO_E10
+signal IO_E11
+signal IO_E12
+signal IO_E13
+signal IO_E14
+signal IO_E15
+signal IO_E16
+signal IO_E17
+signal IO_E18
+signal IO_E19
+signal IO_E20
+signal IO_E21
+signal IO_E22
+signal IO_E23
+signal IO_E24
+signal IO_E25
+signal IO_E26
+signal IO_F1
+signal IO_F2
+signal IO_F3
+signal IO_F4
+signal IO_F5
+signal IO_F6
+signal IO_F7
+signal IO_F8
+signal IO_F9
+signal IO_F10
+signal IO_F11
+signal IO_F12
+signal IO_F13
+signal IO_F14
+signal IO_F15
+signal IO_F16
+signal IO_F17
+signal IO_F18
+signal IO_F19
+signal IO_F20
+signal IO_F21
+signal IO_F22
+signal IO_F23
+signal IO_F24
+signal IO_F25
+signal IO_F26
+signal IO_G1
+signal IO_G2
+signal IO_G4
+signal IO_G5
+signal IO_G6
+signal IO_G7
+signal IO_G8
+signal IO_G9
+signal IO_G10
+signal IO_G11
+signal IO_G12
+signal IO_G13
+signal IO_G14
+signal IO_G15
+signal IO_G16
+signal IO_G17
+signal IO_G18
+signal IO_G19
+signal IO_G20
+signal IO_G21
+signal IO_G22
+signal IO_G23
+signal IO_G25
+signal IO_G26
+signal IO_H1
+signal IO_H2
+signal IO_H3
+signal IO_H4
+signal IO_H5
+signal IO_H6
+signal IO_H7
+signal IO_H11
+signal IO_H12
+signal IO_H13
+signal IO_H14
+signal IO_H15
+signal IO_H16
+signal IO_H20
+signal IO_H21
+signal IO_H22
+signal IO_H23
+signal IO_H24
+signal IO_H25
+signal IO_H26
+signal IO_J2
+signal IO_J3
+signal IO_J4
+signal IO_J5
+signal IO_J6
+signal IO_J7
+signal IO_J20
+signal IO_J21
+signal IO_J22
+signal IO_J23
+signal IO_J24
+signal IO_J25
+signal IO_K1
+signal IO_K2
+signal IO_K3
+signal IO_K4
+signal IO_K5
+signal IO_K6
+signal IO_K7
+signal IO_K20
+signal IO_K21
+signal IO_K22
+signal IO_K23
+signal IO_K24
+signal IO_K25
+signal IO_K26
+signal IO_L1
+signal IO_L2
+signal IO_L4
+signal IO_L5
+signal IO_L6
+signal IO_L7
+signal IO_L8
+signal IO_L19
+signal IO_L20
+signal IO_L21
+signal IO_L22
+signal IO_L23
+signal IO_L25
+signal IO_L26
+signal IO_M1
+signal IO_M2
+signal IO_M3
+signal IO_M5
+signal IO_M6
+signal IO_M7
+signal IO_M8
+signal IO_M19
+signal IO_M20
+signal IO_M21
+signal IO_M22
+signal IO_M24
+signal IO_M25
+signal IO_M26
+signal IO_N1
+signal IO_N2
+signal IO_N3
+signal IO_N4
+signal IO_N5
+signal IO_N6
+signal IO_N7
+signal IO_N8
+signal IO_N19
+signal IO_N20
+signal IO_N21
+signal IO_N22
+signal IO_N23
+signal IO_N24
+signal IO_N25
+signal IO_N26
+signal IO_P1
+signal IO_P2
+signal IO_P3
+signal IO_P4
+signal IO_P5
+signal IO_P6
+signal IO_P7
+signal IO_P8
+signal IO_P19
+signal IO_P20
+signal IO_P21
+signal IO_P22
+signal IO_P23
+signal IO_P24
+signal IO_P25
+signal IO_P26
+signal IO_R1
+signal IO_R2
+signal IO_R3
+signal IO_R5
+signal IO_R6
+signal IO_R7
+signal IO_R8
+signal IO_R19
+signal IO_R20
+signal IO_R21
+signal IO_R22
+signal IO_R24
+signal IO_R25
+signal IO_R26
+signal IO_T1
+signal IO_T2
+signal IO_T4
+signal IO_T5
+signal IO_T6
+signal IO_T7
+signal IO_T8
+signal IO_T19
+signal IO_T20
+signal IO_T21
+signal IO_T22
+signal IO_T23
+signal IO_T25
+signal IO_T26
+signal IO_U1
+signal IO_U2
+signal IO_U3
+signal IO_U4
+signal IO_U5
+signal IO_U6
+signal IO_U7
+signal IO_U20
+signal IO_U21
+signal IO_U22
+signal IO_U23
+signal IO_U24
+signal IO_U25
+signal IO_U26
+signal IO_V2
+signal IO_V3
+signal IO_V4
+signal IO_V5
+signal IO_V6
+signal IO_V7
+signal IO_V20
+signal IO_V21
+signal IO_V22
+signal IO_V23
+signal IO_V24
+signal IO_V25
+signal IO_W1
+signal IO_W2
+signal IO_W3
+signal IO_W4
+signal IO_W5
+signal IO_W6
+signal IO_W7
+signal IO_W11
+signal IO_W12
+signal IO_W13
+signal IO_W14
+signal IO_W15
+signal IO_W16
+signal IO_W20
+signal IO_W21
+signal IO_W22
+signal IO_W23
+signal IO_W24
+signal IO_W25
+signal IO_W26
+signal IO_Y1
+signal IO_Y2
+signal IO_Y4
+signal IO_Y5
+signal IO_Y6
+signal IO_Y7
+signal IO_Y8
+signal IO_Y9
+signal IO_Y10
+signal IO_Y11
+signal IO_Y12
+signal IO_Y13
+signal IO_Y14
+signal IO_Y15
+signal IO_Y16
+signal IO_Y17
+signal IO_Y18
+signal IO_Y19
+signal IO_Y20
+signal IO_Y21
+signal IO_Y22
+signal IO_Y23
+signal IO_Y25
+signal IO_Y26
+signal IO_AA1
+signal IO_AA2
+signal IO_AA3
+signal IO_AA4
+signal IO_AA5
+signal IO_AA6
+signal IO_AA7
+signal IO_AA8
+signal IO_AA9
+signal IO_AA10
+signal IO_AA11
+signal IO_AA12
+signal IO_AA13
+signal IO_AA14
+signal IO_AA15
+signal IO_AA16
+signal IO_AA17
+signal IO_AA18
+signal IO_AA19
+signal IO_AA20
+signal IO_AA21
+signal IO_AA22
+signal IO_AA23
+signal IO_AA24
+signal IO_AA25
+signal IO_AA26
+signal IO_AB1
+signal IO_AB2
+signal IO_AB3
+signal IO_AB4
+signal IO_AB5
+signal IO_AB6
+signal IO_AB7
+signal IO_AB8
+signal IO_AB9
+signal IO_AB10
+signal IO_AB11
+signal IO_AB12
+signal IO_AB13
+signal IO_AB14
+signal IO_AB15
+signal IO_AB16
+signal IO_AB17
+signal IO_AB18
+signal IO_AB19
+signal IO_AB20
+signal IO_AB21
+signal IO_AB22
+signal IO_AB23
+signal IO_AB24
+signal IO_AB25
+signal IO_AB26
+signal IO_AC1
+signal IO_AC2
+signal IO_AC5
+signal IO_AC6
+signal IO_AC7
+signal IO_AC8
+signal IO_AC9
+signal IO_AC10
+signal IO_AC11
+signal IO_AC13
+signal IO_AC14
+signal IO_AC16
+signal IO_AC17
+signal IO_AC18
+signal IO_AC19
+signal IO_AC20
+signal IO_AC21
+signal IO_AC22
+signal IO_AC25
+signal IO_AC26
+signal IO_AD1
+signal IO_AD2
+signal IO_AD4
+signal IO_AD5
+signal IO_AD6
+signal IO_AD8
+signal IO_AD9
+signal IO_AD10
+signal IO_AD12
+signal IO_AD13
+signal IO_AD14
+signal IO_AD15
+signal IO_AD17
+signal IO_AD18
+signal IO_AD19
+signal IO_AD21
+signal IO_AD22
+signal IO_AD23
+signal IO_AD25
+signal IO_AE4
+signal IO_AE5
+signal IO_AE6
+signal IO_AE7
+signal IO_AE8
+signal IO_AE9
+signal IO_AE10
+signal IO_AE11
+signal IO_AE12
+signal IO_AE13
+signal IO_AE14
+signal IO_AE15
+signal IO_AE16
+signal IO_AE17
+signal IO_AE18
+signal IO_AE19
+signal IO_AE20
+signal IO_AE21
+signal IO_AE22
+signal IO_AE23
+signal IO_AE24
+signal IO_AF4
+signal IO_AF5
+signal IO_AF6
+signal IO_AF7
+signal IO_AF8
+signal IO_AF10
+signal IO_AF11
+signal IO_AF12
+signal IO_AF13
+signal IO_AF14
+signal IO_AF15
+signal IO_AF16
+signal IO_AF17
+signal IO_AF19
+signal IO_AF20
+signal IO_AF21
+signal IO_AF22
+signal IO_AF23
+
+register BSR 2243
+register BR 1
+register DIR 32
+
+instruction length 6
+
+instruction EXTEST 000000 BSR
+instruction SAMPLE/PRELOAD 000001 BSR
+instruction IDCODE 001001 DIR
+instruction BYPASS 111111 BR
+
+bit 2242 I 1 IO_C25
+bit 2241 O 1 IO_C25 2240 1 Z
+bit 2240 C 1 *
+bit 2239 I 1 IO_C26
+bit 2238 O 1 IO_C26 2237 1 Z
+bit 2237 C 1 *
+bit 2236 I 1 IO_E23
+bit 2235 O 1 IO_E23 2234 1 Z
+bit 2234 C 1 *
+bit 2233 I 1 IO_E24
+bit 2232 O 1 IO_E24 2231 1 Z
+bit 2231 C 1 *
+bit 2230 I 1 IO_D25
+bit 2229 O 1 IO_D25 2228 1 Z
+bit 2228 C 1 *
+bit 2227 I 1 IO_D26
+bit 2226 O 1 IO_D26 2225 1 Z
+bit 2225 C 1 *
+bit 2224 I 1 IO_F22
+bit 2223 O 1 IO_F22 2222 1 Z
+bit 2222 C 1 *
+bit 2221 O 1 *
+bit 2220 O 1 *
+bit 2219 O 1 *
+bit 2218 O 1 *
+bit 2217 O 1 *
+bit 2216 O 1 *
+bit 2215 O 1 *
+bit 2214 O 1 *
+bit 2213 O 1 *
+bit 2212 I 1 IO_E25
+bit 2211 O 1 IO_E25 2210 1 Z
+bit 2210 C 1 *
+bit 2209 I 1 IO_E26
+bit 2208 O 1 IO_E26 2207 1 Z
+bit 2207 C 1 *
+bit 2206 O 1 *
+bit 2205 O 1 *
+bit 2204 O 1 *
+bit 2203 O 1 *
+bit 2202 O 1 *
+bit 2201 O 1 *
+bit 2200 O 1 *
+bit 2199 O 1 *
+bit 2198 O 1 *
+bit 2197 O 1 *
+bit 2196 O 1 *
+bit 2195 O 1 *
+bit 2194 I 1 IO_G20
+bit 2193 O 1 IO_G20 2192 1 Z
+bit 2192 C 1 *
+bit 2191 I 1 IO_G21
+bit 2190 O 1 IO_G21 2189 1 Z
+bit 2189 C 1 *
+bit 2188 I 1 IO_F23
+bit 2187 O 1 IO_F23 2186 1 Z
+bit 2186 C 1 *
+bit 2185 I 1 IO_F24
+bit 2184 O 1 IO_F24 2183 1 Z
+bit 2183 C 1 *
+bit 2182 I 1 IO_G22
+bit 2181 O 1 IO_G22 2180 1 Z
+bit 2180 C 1 *
+bit 2179 I 1 IO_G23
+bit 2178 O 1 IO_G23 2177 1 Z
+bit 2177 C 1 *
+bit 2176 I 1 IO_F25
+bit 2175 O 1 IO_F25 2174 1 Z
+bit 2174 C 1 *
+bit 2173 I 1 IO_F26
+bit 2172 O 1 IO_F26 2171 1 Z
+bit 2171 C 1 *
+bit 2170 I 1 IO_G25
+bit 2169 O 1 IO_G25 2168 1 Z
+bit 2168 C 1 *
+bit 2167 I 1 IO_G26
+bit 2166 O 1 IO_G26 2165 1 Z
+bit 2165 C 1 *
+bit 2164 I 1 IO_H20
+bit 2163 O 1 IO_H20 2162 1 Z
+bit 2162 C 1 *
+bit 2161 I 1 IO_H21
+bit 2160 O 1 IO_H21 2159 1 Z
+bit 2159 C 1 *
+bit 2158 I 1 IO_H22
+bit 2157 O 1 IO_H22 2156 1 Z
+bit 2156 C 1 *
+bit 2155 I 1 IO_J21
+bit 2154 O 1 IO_J21 2153 1 Z
+bit 2153 C 1 *
+bit 2152 I 1 IO_H23
+bit 2151 O 1 IO_H23 2150 1 Z
+bit 2150 C 1 *
+bit 2149 I 1 IO_H24
+bit 2148 O 1 IO_H24 2147 1 Z
+bit 2147 C 1 *
+bit 2146 O 1 *
+bit 2145 O 1 *
+bit 2144 O 1 *
+bit 2143 O 1 *
+bit 2142 O 1 *
+bit 2141 O 1 *
+bit 2140 O 1 *
+bit 2139 O 1 *
+bit 2138 O 1 *
+bit 2137 O 1 *
+bit 2136 O 1 *
+bit 2135 O 1 *
+bit 2134 O 1 *
+bit 2133 O 1 *
+bit 2132 O 1 *
+bit 2131 O 1 *
+bit 2130 O 1 *
+bit 2129 O 1 *
+bit 2128 O 1 *
+bit 2127 O 1 *
+bit 2126 O 1 *
+bit 2125 O 1 *
+bit 2124 O 1 *
+bit 2123 O 1 *
+bit 2122 O 1 *
+bit 2121 O 1 *
+bit 2120 O 1 *
+bit 2119 O 1 *
+bit 2118 O 1 *
+bit 2117 O 1 *
+bit 2116 O 1 *
+bit 2115 O 1 *
+bit 2114 O 1 *
+bit 2113 O 1 *
+bit 2112 O 1 *
+bit 2111 O 1 *
+bit 2110 O 1 *
+bit 2109 O 1 *
+bit 2108 O 1 *
+bit 2107 O 1 *
+bit 2106 O 1 *
+bit 2105 O 1 *
+bit 2104 I 1 IO_H25
+bit 2103 O 1 IO_H25 2102 1 Z
+bit 2102 C 1 *
+bit 2101 I 1 IO_H26
+bit 2100 O 1 IO_H26 2099 1 Z
+bit 2099 C 1 *
+bit 2098 I 1 IO_J20
+bit 2097 O 1 IO_J20 2096 1 Z
+bit 2096 C 1 *
+bit 2095 I 1 IO_K20
+bit 2094 O 1 IO_K20 2093 1 Z
+bit 2093 C 1 *
+bit 2092 O 1 *
+bit 2091 O 1 *
+bit 2090 O 1 *
+bit 2089 O 1 *
+bit 2088 O 1 *
+bit 2087 O 1 *
+bit 2086 I 1 IO_J22
+bit 2085 O 1 IO_J22 2084 1 Z
+bit 2084 C 1 *
+bit 2083 I 1 IO_J23
+bit 2082 O 1 IO_J23 2081 1 Z
+bit 2081 C 1 *
+bit 2080 I 1 IO_J24
+bit 2079 O 1 IO_J24 2078 1 Z
+bit 2078 C 1 *
+bit 2077 I 1 IO_J25
+bit 2076 O 1 IO_J25 2075 1 Z
+bit 2075 C 1 *
+bit 2074 I 1 IO_K21
+bit 2073 O 1 IO_K21 2072 1 Z
+bit 2072 C 1 *
+bit 2071 I 1 IO_K22
+bit 2070 O 1 IO_K22 2069 1 Z
+bit 2069 C 1 *
+bit 2068 I 1 IO_K23
+bit 2067 O 1 IO_K23 2066 1 Z
+bit 2066 C 1 *
+bit 2065 I 1 IO_K24
+bit 2064 O 1 IO_K24 2063 1 Z
+bit 2063 C 1 *
+bit 2062 O 1 *
+bit 2061 O 1 *
+bit 2060 O 1 *
+bit 2059 O 1 *
+bit 2058 O 1 *
+bit 2057 O 1 *
+bit 2056 O 1 *
+bit 2055 O 1 *
+bit 2054 O 1 *
+bit 2053 O 1 *
+bit 2052 O 1 *
+bit 2051 O 1 *
+bit 2050 I 1 IO_K25
+bit 2049 O 1 IO_K25 2048 1 Z
+bit 2048 C 1 *
+bit 2047 I 1 IO_K26
+bit 2046 O 1 IO_K26 2045 1 Z
+bit 2045 C 1 *
+bit 2044 I 1 IO_L19
+bit 2043 O 1 IO_L19 2042 1 Z
+bit 2042 C 1 *
+bit 2041 I 1 IO_L20
+bit 2040 O 1 IO_L20 2039 1 Z
+bit 2039 C 1 *
+bit 2038 I 1 IO_L21
+bit 2037 O 1 IO_L21 2036 1 Z
+bit 2036 C 1 *
+bit 2035 I 1 IO_L22
+bit 2034 O 1 IO_L22 2033 1 Z
+bit 2033 C 1 *
+bit 2032 I 1 IO_L25
+bit 2031 O 1 IO_L25 2030 1 Z
+bit 2030 C 1 *
+bit 2029 I 1 IO_L26
+bit 2028 O 1 IO_L26 2027 1 Z
+bit 2027 C 1 *
+bit 2026 O 1 *
+bit 2025 O 1 *
+bit 2024 O 1 *
+bit 2023 O 1 *
+bit 2022 O 1 *
+bit 2021 O 1 *
+bit 2020 I 1 IO_M19
+bit 2019 O 1 IO_M19 2018 1 Z
+bit 2018 C 1 *
+bit 2017 I 1 IO_M20
+bit 2016 O 1 IO_M20 2015 1 Z
+bit 2015 C 1 *
+bit 2014 I 1 IO_M21
+bit 2013 O 1 IO_M21 2012 1 Z
+bit 2012 C 1 *
+bit 2011 I 1 IO_M22
+bit 2010 O 1 IO_M22 2009 1 Z
+bit 2009 C 1 *
+bit 2008 I 1 IO_L23
+bit 2007 O 1 IO_L23 2006 1 Z
+bit 2006 C 1 *
+bit 2005 I 1 IO_M24
+bit 2004 O 1 IO_M24 2003 1 Z
+bit 2003 C 1 *
+bit 2002 I 1 IO_M25
+bit 2001 O 1 IO_M25 2000 1 Z
+bit 2000 C 1 *
+bit 1999 I 1 IO_M26
+bit 1998 O 1 IO_M26 1997 1 Z
+bit 1997 C 1 *
+bit 1996 I 1 IO_N19
+bit 1995 O 1 IO_N19 1994 1 Z
+bit 1994 C 1 *
+bit 1993 I 1 IO_N20
+bit 1992 O 1 IO_N20 1991 1 Z
+bit 1991 C 1 *
+bit 1990 O 1 *
+bit 1989 O 1 *
+bit 1988 O 1 *
+bit 1987 O 1 *
+bit 1986 O 1 *
+bit 1985 O 1 *
+bit 1984 O 1 *
+bit 1983 O 1 *
+bit 1982 O 1 *
+bit 1981 O 1 *
+bit 1980 O 1 *
+bit 1979 O 1 *
+bit 1978 O 1 *
+bit 1977 O 1 *
+bit 1976 O 1 *
+bit 1975 O 1 *
+bit 1974 O 1 *
+bit 1973 O 1 *
+bit 1972 I 1 IO_N21
+bit 1971 O 1 IO_N21 1970 1 Z
+bit 1970 C 1 *
+bit 1969 I 1 IO_N22
+bit 1968 O 1 IO_N22 1967 1 Z
+bit 1967 C 1 *
+bit 1966 I 1 IO_N23
+bit 1965 O 1 IO_N23 1964 1 Z
+bit 1964 C 1 *
+bit 1963 I 1 IO_N24
+bit 1962 O 1 IO_N24 1961 1 Z
+bit 1961 C 1 *
+bit 1960 I 1 IO_N25
+bit 1959 O 1 IO_N25 1958 1 Z
+bit 1958 C 1 *
+bit 1957 I 1 IO_N26
+bit 1956 O 1 IO_N26 1955 1 Z
+bit 1955 C 1 *
+bit 1954 I 1 IO_P26
+bit 1953 O 1 IO_P26 1952 1 Z
+bit 1952 C 1 *
+bit 1951 I 1 IO_P25
+bit 1950 O 1 IO_P25 1949 1 Z
+bit 1949 C 1 *
+bit 1948 I 1 IO_P24
+bit 1947 O 1 IO_P24 1946 1 Z
+bit 1946 C 1 *
+bit 1945 I 1 IO_P23
+bit 1944 O 1 IO_P23 1943 1 Z
+bit 1943 C 1 *
+bit 1942 I 1 IO_P22
+bit 1941 O 1 IO_P22 1940 1 Z
+bit 1940 C 1 *
+bit 1939 I 1 IO_P21
+bit 1938 O 1 IO_P21 1937 1 Z
+bit 1937 C 1 *
+bit 1936 O 1 *
+bit 1935 O 1 *
+bit 1934 O 1 *
+bit 1933 O 1 *
+bit 1932 O 1 *
+bit 1931 O 1 *
+bit 1930 O 1 *
+bit 1929 O 1 *
+bit 1928 O 1 *
+bit 1927 O 1 *
+bit 1926 O 1 *
+bit 1925 O 1 *
+bit 1924 O 1 *
+bit 1923 O 1 *
+bit 1922 O 1 *
+bit 1921 O 1 *
+bit 1920 O 1 *
+bit 1919 O 1 *
+bit 1918 I 1 IO_P20
+bit 1917 O 1 IO_P20 1916 1 Z
+bit 1916 C 1 *
+bit 1915 I 1 IO_P19
+bit 1914 O 1 IO_P19 1913 1 Z
+bit 1913 C 1 *
+bit 1912 I 1 IO_R26
+bit 1911 O 1 IO_R26 1910 1 Z
+bit 1910 C 1 *
+bit 1909 I 1 IO_R25
+bit 1908 O 1 IO_R25 1907 1 Z
+bit 1907 C 1 *
+bit 1906 I 1 IO_R24
+bit 1905 O 1 IO_R24 1904 1 Z
+bit 1904 C 1 *
+bit 1903 I 1 IO_T23
+bit 1902 O 1 IO_T23 1901 1 Z
+bit 1901 C 1 *
+bit 1900 I 1 IO_R22
+bit 1899 O 1 IO_R22 1898 1 Z
+bit 1898 C 1 *
+bit 1897 I 1 IO_R21
+bit 1896 O 1 IO_R21 1895 1 Z
+bit 1895 C 1 *
+bit 1894 I 1 IO_R20
+bit 1893 O 1 IO_R20 1892 1 Z
+bit 1892 C 1 *
+bit 1891 I 1 IO_R19
+bit 1890 O 1 IO_R19 1889 1 Z
+bit 1889 C 1 *
+bit 1888 O 1 *
+bit 1887 O 1 *
+bit 1886 O 1 *
+bit 1885 O 1 *
+bit 1884 O 1 *
+bit 1883 O 1 *
+bit 1882 O 1 *
+bit 1881 O 1 *
+bit 1880 O 1 *
+bit 1879 O 1 *
+bit 1878 O 1 *
+bit 1877 O 1 *
+bit 1876 I 1 IO_T26
+bit 1875 O 1 IO_T26 1874 1 Z
+bit 1874 C 1 *
+bit 1873 I 1 IO_T25
+bit 1872 O 1 IO_T25 1871 1 Z
+bit 1871 C 1 *
+bit 1870 I 1 IO_T22
+bit 1869 O 1 IO_T22 1868 1 Z
+bit 1868 C 1 *
+bit 1867 I 1 IO_T21
+bit 1866 O 1 IO_T21 1865 1 Z
+bit 1865 C 1 *
+bit 1864 I 1 IO_T20
+bit 1863 O 1 IO_T20 1862 1 Z
+bit 1862 C 1 *
+bit 1861 I 1 IO_T19
+bit 1860 O 1 IO_T19 1859 1 Z
+bit 1859 C 1 *
+bit 1858 I 1 IO_U26
+bit 1857 O 1 IO_U26 1856 1 Z
+bit 1856 C 1 *
+bit 1855 I 1 IO_U25
+bit 1854 O 1 IO_U25 1853 1 Z
+bit 1853 C 1 *
+bit 1852 O 1 *
+bit 1851 O 1 *
+bit 1850 O 1 *
+bit 1849 O 1 *
+bit 1848 O 1 *
+bit 1847 O 1 *
+bit 1846 O 1 *
+bit 1845 O 1 *
+bit 1844 O 1 *
+bit 1843 O 1 *
+bit 1842 O 1 *
+bit 1841 O 1 *
+bit 1840 O 1 *
+bit 1839 O 1 *
+bit 1838 O 1 *
+bit 1837 O 1 *
+bit 1836 O 1 *
+bit 1835 O 1 *
+bit 1834 O 1 *
+bit 1833 O 1 *
+bit 1832 O 1 *
+bit 1831 O 1 *
+bit 1830 O 1 *
+bit 1829 O 1 *
+bit 1828 I 1 IO_U24
+bit 1827 O 1 IO_U24 1826 1 Z
+bit 1826 C 1 *
+bit 1825 I 1 IO_U23
+bit 1824 O 1 IO_U23 1823 1 Z
+bit 1823 C 1 *
+bit 1822 O 1 *
+bit 1821 O 1 *
+bit 1820 O 1 *
+bit 1819 O 1 *
+bit 1818 O 1 *
+bit 1817 O 1 *
+bit 1816 I 1 IO_U22
+bit 1815 O 1 IO_U22 1814 1 Z
+bit 1814 C 1 *
+bit 1813 I 1 IO_U21
+bit 1812 O 1 IO_U21 1811 1 Z
+bit 1811 C 1 *
+bit 1810 I 1 IO_V25
+bit 1809 O 1 IO_V25 1808 1 Z
+bit 1808 C 1 *
+bit 1807 I 1 IO_V24
+bit 1806 O 1 IO_V24 1805 1 Z
+bit 1805 C 1 *
+bit 1804 I 1 IO_V23
+bit 1803 O 1 IO_V23 1802 1 Z
+bit 1802 C 1 *
+bit 1801 I 1 IO_V22
+bit 1800 O 1 IO_V22 1799 1 Z
+bit 1799 C 1 *
+bit 1798 I 1 IO_U20
+bit 1797 O 1 IO_U20 1796 1 Z
+bit 1796 C 1 *
+bit 1795 I 1 IO_V20
+bit 1794 O 1 IO_V20 1793 1 Z
+bit 1793 C 1 *
+bit 1792 I 1 IO_W26
+bit 1791 O 1 IO_W26 1790 1 Z
+bit 1790 C 1 *
+bit 1789 I 1 IO_W25
+bit 1788 O 1 IO_W25 1787 1 Z
+bit 1787 C 1 *
+bit 1786 O 1 *
+bit 1785 O 1 *
+bit 1784 O 1 *
+bit 1783 O 1 *
+bit 1782 O 1 *
+bit 1781 O 1 *
+bit 1780 I 1 IO_W24
+bit 1779 O 1 IO_W24 1778 1 Z
+bit 1778 C 1 *
+bit 1777 I 1 IO_W23
+bit 1776 O 1 IO_W23 1775 1 Z
+bit 1775 C 1 *
+bit 1774 I 1 IO_V21
+bit 1773 O 1 IO_V21 1772 1 Z
+bit 1772 C 1 *
+bit 1771 I 1 IO_W22
+bit 1770 O 1 IO_W22 1769 1 Z
+bit 1769 C 1 *
+bit 1768 O 1 *
+bit 1767 O 1 *
+bit 1766 O 1 *
+bit 1765 O 1 *
+bit 1764 O 1 *
+bit 1763 O 1 *
+bit 1762 I 1 IO_Y26
+bit 1761 O 1 IO_Y26 1760 1 Z
+bit 1760 C 1 *
+bit 1759 I 1 IO_Y25
+bit 1758 O 1 IO_Y25 1757 1 Z
+bit 1757 C 1 *
+bit 1756 O 1 *
+bit 1755 O 1 *
+bit 1754 O 1 *
+bit 1753 O 1 *
+bit 1752 O 1 *
+bit 1751 O 1 *
+bit 1750 O 1 *
+bit 1749 O 1 *
+bit 1748 O 1 *
+bit 1747 O 1 *
+bit 1746 O 1 *
+bit 1745 O 1 *
+bit 1744 O 1 *
+bit 1743 O 1 *
+bit 1742 O 1 *
+bit 1741 O 1 *
+bit 1740 O 1 *
+bit 1739 O 1 *
+bit 1738 I 1 IO_W21
+bit 1737 O 1 IO_W21 1736 1 Z
+bit 1736 C 1 *
+bit 1735 I 1 IO_W20
+bit 1734 O 1 IO_W20 1733 1 Z
+bit 1733 C 1 *
+bit 1732 I 1 IO_AA26
+bit 1731 O 1 IO_AA26 1730 1 Z
+bit 1730 C 1 *
+bit 1729 I 1 IO_AA25
+bit 1728 O 1 IO_AA25 1727 1 Z
+bit 1727 C 1 *
+bit 1726 I 1 IO_Y23
+bit 1725 O 1 IO_Y23 1724 1 Z
+bit 1724 C 1 *
+bit 1723 I 1 IO_Y22
+bit 1722 O 1 IO_Y22 1721 1 Z
+bit 1721 C 1 *
+bit 1720 I 1 IO_AA24
+bit 1719 O 1 IO_AA24 1718 1 Z
+bit 1718 C 1 *
+bit 1717 I 1 IO_AA23
+bit 1716 O 1 IO_AA23 1715 1 Z
+bit 1715 C 1 *
+bit 1714 O 1 *
+bit 1713 O 1 *
+bit 1712 O 1 *
+bit 1711 O 1 *
+bit 1710 O 1 *
+bit 1709 O 1 *
+bit 1708 O 1 *
+bit 1707 O 1 *
+bit 1706 O 1 *
+bit 1705 O 1 *
+bit 1704 O 1 *
+bit 1703 O 1 *
+bit 1702 I 1 IO_AB26
+bit 1701 O 1 IO_AB26 1700 1 Z
+bit 1700 C 1 *
+bit 1699 I 1 IO_AB25
+bit 1698 O 1 IO_AB25 1697 1 Z
+bit 1697 C 1 *
+bit 1696 I 1 IO_Y21
+bit 1695 O 1 IO_Y21 1694 1 Z
+bit 1694 C 1 *
+bit 1693 I 1 IO_Y20
+bit 1692 O 1 IO_Y20 1691 1 Z
+bit 1691 C 1 *
+bit 1690 O 1 *
+bit 1689 O 1 *
+bit 1688 O 1 *
+bit 1687 O 1 *
+bit 1686 O 1 *
+bit 1685 O 1 *
+bit 1684 I 1 IO_AC26
+bit 1683 O 1 IO_AC26 1682 1 Z
+bit 1682 C 1 *
+bit 1681 I 1 IO_AC25
+bit 1680 O 1 IO_AC25 1679 1 Z
+bit 1679 C 1 *
+bit 1678 I 1 IO_AB24
+bit 1677 O 1 IO_AB24 1676 1 Z
+bit 1676 C 1 *
+bit 1675 I 1 IO_AB23
+bit 1674 O 1 IO_AB23 1673 1 Z
+bit 1673 C 1 *
+bit 1672 I 1 IO_AA22
+bit 1671 O 1 IO_AA22 1670 1 Z
+bit 1670 C 1 *
+bit 1669 I 1 IO_AA21
+bit 1668 O 1 IO_AA21 1667 1 Z
+bit 1667 C 1 *
+bit 1666 I 1 CCLK_AD26
+bit 1665 O 1 CCLK_AD26 1664 1 Z
+bit 1664 C 1 *
+bit 1663 I 1 DONE_AC24
+bit 1662 O 1 DONE_AC24 1661 1 Z
+bit 1661 C 1 *
+bit 1660 I 1 IO_AD25
+bit 1659 O 1 IO_AD25 1658 1 Z
+bit 1658 C 1 *
+bit 1657 I 1 IO_AB22
+bit 1656 O 1 IO_AB22 1655 1 Z
+bit 1655 C 1 *
+bit 1654 I 1 IO_AC22
+bit 1653 O 1 IO_AC22 1652 1 Z
+bit 1652 C 1 *
+bit 1651 O 1 *
+bit 1650 O 1 *
+bit 1649 O 1 *
+bit 1648 O 1 *
+bit 1647 O 1 *
+bit 1646 O 1 *
+bit 1645 O 1 *
+bit 1644 O 1 *
+bit 1643 O 1 *
+bit 1642 O 1 *
+bit 1641 O 1 *
+bit 1640 O 1 *
+bit 1639 O 1 *
+bit 1638 O 1 *
+bit 1637 O 1 *
+bit 1636 O 1 *
+bit 1635 O 1 *
+bit 1634 O 1 *
+bit 1633 O 1 *
+bit 1632 O 1 *
+bit 1631 O 1 *
+bit 1630 O 1 *
+bit 1629 O 1 *
+bit 1628 O 1 *
+bit 1627 O 1 *
+bit 1626 O 1 *
+bit 1625 O 1 *
+bit 1624 O 1 *
+bit 1623 O 1 *
+bit 1622 O 1 *
+bit 1621 O 1 *
+bit 1620 O 1 *
+bit 1619 O 1 *
+bit 1618 O 1 *
+bit 1617 O 1 *
+bit 1616 O 1 *
+bit 1615 O 1 *
+bit 1614 O 1 *
+bit 1613 O 1 *
+bit 1612 O 1 *
+bit 1611 O 1 *
+bit 1610 O 1 *
+bit 1609 O 1 *
+bit 1608 O 1 *
+bit 1607 O 1 *
+bit 1606 I 1 IO_AE24
+bit 1605 O 1 IO_AE24 1604 1 Z
+bit 1604 C 1 *
+bit 1603 I 1 IO_AF24
+bit 1602 O 1 IO_AF24 1601 1 Z
+bit 1601 C 1 *
+bit 1600 I 1 IO_AD23
+bit 1599 O 1 IO_AD23 1598 1 Z
+bit 1598 C 1 *
+bit 1597 I 1 IO_AE23
+bit 1596 O 1 IO_AE23 1595 1 Z
+bit 1595 C 1 *
+bit 1594 I 1 IO_AF23
+bit 1593 O 1 IO_AF23 1592 1 Z
+bit 1592 C 1 *
+bit 1591 I 1 IO_AD22
+bit 1590 O 1 IO_AD22 1589 1 Z
+bit 1589 C 1 *
+bit 1588 I 1 IO_AE22
+bit 1587 O 1 IO_AE22 1586 1 Z
+bit 1586 C 1 *
+bit 1585 I 1 IO_AF22
+bit 1584 O 1 IO_AF22 1583 1 Z
+bit 1583 C 1 *
+bit 1582 I 1 IO_AB21
+bit 1581 O 1 IO_AB21 1580 1 Z
+bit 1580 C 1 *
+bit 1579 I 1 IO_AC21
+bit 1578 O 1 IO_AC21 1577 1 Z
+bit 1577 C 1 *
+bit 1576 I 1 IO_AD21
+bit 1575 O 1 IO_AD21 1574 1 Z
+bit 1574 C 1 *
+bit 1573 I 1 IO_AE21
+bit 1572 O 1 IO_AE21 1571 1 Z
+bit 1571 C 1 *
+bit 1570 I 1 IO_AF21
+bit 1569 O 1 IO_AF21 1568 1 Z
+bit 1568 C 1 *
+bit 1567 I 1 IO_AB20
+bit 1566 O 1 IO_AB20 1565 1 Z
+bit 1565 C 1 *
+bit 1564 I 1 IO_AC20
+bit 1563 O 1 IO_AC20 1562 1 Z
+bit 1562 C 1 *
+bit 1561 I 1 IO_AE20
+bit 1560 O 1 IO_AE20 1559 1 Z
+bit 1559 C 1 *
+bit 1558 I 1 IO_AF20
+bit 1557 O 1 IO_AF20 1556 1 Z
+bit 1556 C 1 *
+bit 1555 I 1 IO_AA20
+bit 1554 O 1 IO_AA20 1553 1 Z
+bit 1553 C 1 *
+bit 1552 I 1 IO_Y19
+bit 1551 O 1 IO_Y19 1550 1 Z
+bit 1550 C 1 *
+bit 1549 I 1 IO_AA19
+bit 1548 O 1 IO_AA19 1547 1 Z
+bit 1547 C 1 *
+bit 1546 I 1 IO_AB19
+bit 1545 O 1 IO_AB19 1544 1 Z
+bit 1544 C 1 *
+bit 1543 I 1 IO_AC19
+bit 1542 O 1 IO_AC19 1541 1 Z
+bit 1541 C 1 *
+bit 1540 O 1 *
+bit 1539 O 1 *
+bit 1538 O 1 *
+bit 1537 O 1 *
+bit 1536 O 1 *
+bit 1535 O 1 *
+bit 1534 O 1 *
+bit 1533 O 1 *
+bit 1532 O 1 *
+bit 1531 O 1 *
+bit 1530 O 1 *
+bit 1529 O 1 *
+bit 1528 O 1 *
+bit 1527 O 1 *
+bit 1526 O 1 *
+bit 1525 I 1 IO_AD19
+bit 1524 O 1 IO_AD19 1523 1 Z
+bit 1523 C 1 *
+bit 1522 I 1 IO_AE19
+bit 1521 O 1 IO_AE19 1520 1 Z
+bit 1520 C 1 *
+bit 1519 I 1 IO_AF19
+bit 1518 O 1 IO_AF19 1517 1 Z
+bit 1517 C 1 *
+bit 1516 I 1 IO_Y18
+bit 1515 O 1 IO_Y18 1514 1 Z
+bit 1514 C 1 *
+bit 1513 I 1 IO_AA18
+bit 1512 O 1 IO_AA18 1511 1 Z
+bit 1511 C 1 *
+bit 1510 O 1 *
+bit 1509 O 1 *
+bit 1508 O 1 *
+bit 1507 I 1 IO_AB18
+bit 1506 O 1 IO_AB18 1505 1 Z
+bit 1505 C 1 *
+bit 1504 I 1 IO_AC18
+bit 1503 O 1 IO_AC18 1502 1 Z
+bit 1502 C 1 *
+bit 1501 I 1 IO_AD18
+bit 1500 O 1 IO_AD18 1499 1 Z
+bit 1499 C 1 *
+bit 1498 I 1 IO_AE18
+bit 1497 O 1 IO_AE18 1496 1 Z
+bit 1496 C 1 *
+bit 1495 I 1 IO_Y17
+bit 1494 O 1 IO_Y17 1493 1 Z
+bit 1493 C 1 *
+bit 1492 I 1 IO_AC17
+bit 1491 O 1 IO_AC17 1490 1 Z
+bit 1490 C 1 *
+bit 1489 I 1 IO_AA17
+bit 1488 O 1 IO_AA17 1487 1 Z
+bit 1487 C 1 *
+bit 1486 O 1 *
+bit 1485 O 1 *
+bit 1484 O 1 *
+bit 1483 O 1 *
+bit 1482 O 1 *
+bit 1481 O 1 *
+bit 1480 O 1 *
+bit 1479 O 1 *
+bit 1478 O 1 *
+bit 1477 O 1 *
+bit 1476 O 1 *
+bit 1475 O 1 *
+bit 1474 O 1 *
+bit 1473 O 1 *
+bit 1472 O 1 *
+bit 1471 I 1 IO_AD17
+bit 1470 O 1 IO_AD17 1469 1 Z
+bit 1469 C 1 *
+bit 1468 I 1 IO_AB17
+bit 1467 O 1 IO_AB17 1466 1 Z
+bit 1466 C 1 *
+bit 1465 I 1 IO_W16
+bit 1464 O 1 IO_W16 1463 1 Z
+bit 1463 C 1 *
+bit 1462 I 1 IO_AE17
+bit 1461 O 1 IO_AE17 1460 1 Z
+bit 1460 C 1 *
+bit 1459 I 1 IO_AF17
+bit 1458 O 1 IO_AF17 1457 1 Z
+bit 1457 C 1 *
+bit 1456 I 1 IO_Y16
+bit 1455 O 1 IO_Y16 1454 1 Z
+bit 1454 C 1 *
+bit 1453 I 1 IO_AA16
+bit 1452 O 1 IO_AA16 1451 1 Z
+bit 1451 C 1 *
+bit 1450 O 1 *
+bit 1449 O 1 *
+bit 1448 O 1 *
+bit 1447 I 1 IO_AB16
+bit 1446 O 1 IO_AB16 1445 1 Z
+bit 1445 C 1 *
+bit 1444 I 1 IO_AC16
+bit 1443 O 1 IO_AC16 1442 1 Z
+bit 1442 C 1 *
+bit 1441 I 1 IO_AE16
+bit 1440 O 1 IO_AE16 1439 1 Z
+bit 1439 C 1 *
+bit 1438 I 1 IO_AF16
+bit 1437 O 1 IO_AF16 1436 1 Z
+bit 1436 C 1 *
+bit 1435 I 1 IO_W15
+bit 1434 O 1 IO_W15 1433 1 Z
+bit 1433 C 1 *
+bit 1432 I 1 IO_Y15
+bit 1431 O 1 IO_Y15 1430 1 Z
+bit 1430 C 1 *
+bit 1429 I 1 IO_W14
+bit 1428 O 1 IO_W14 1427 1 Z
+bit 1427 C 1 *
+bit 1426 I 1 IO_AA15
+bit 1425 O 1 IO_AA15 1424 1 Z
+bit 1424 C 1 *
+bit 1423 I 1 IO_AB15
+bit 1422 O 1 IO_AB15 1421 1 Z
+bit 1421 C 1 *
+bit 1420 I 1 IO_AD15
+bit 1419 O 1 IO_AD15 1418 1 Z
+bit 1418 C 1 *
+bit 1417 I 1 IO_AE15
+bit 1416 O 1 IO_AE15 1415 1 Z
+bit 1415 C 1 *
+bit 1414 I 1 IO_AF15
+bit 1413 O 1 IO_AF15 1412 1 Z
+bit 1412 C 1 *
+bit 1411 I 1 IO_Y14
+bit 1410 O 1 IO_Y14 1409 1 Z
+bit 1409 C 1 *
+bit 1408 I 1 IO_AA14
+bit 1407 O 1 IO_AA14 1406 1 Z
+bit 1406 C 1 *
+bit 1405 I 1 IO_AB14
+bit 1404 O 1 IO_AB14 1403 1 Z
+bit 1403 C 1 *
+bit 1402 I 1 IO_AC14
+bit 1401 O 1 IO_AC14 1400 1 Z
+bit 1400 C 1 *
+bit 1399 I 1 IO_AD14
+bit 1398 O 1 IO_AD14 1397 1 Z
+bit 1397 C 1 *
+bit 1396 I 1 IO_AE14
+bit 1395 O 1 IO_AE14 1394 1 Z
+bit 1394 C 1 *
+bit 1393 I 1 IO_AF14
+bit 1392 O 1 IO_AF14 1391 1 Z
+bit 1391 C 1 *
+bit 1390 I 1 IO_AF13
+bit 1389 O 1 IO_AF13 1388 1 Z
+bit 1388 C 1 *
+bit 1387 I 1 IO_AE13
+bit 1386 O 1 IO_AE13 1385 1 Z
+bit 1385 C 1 *
+bit 1384 I 1 IO_AD13
+bit 1383 O 1 IO_AD13 1382 1 Z
+bit 1382 C 1 *
+bit 1381 I 1 IO_AC13
+bit 1380 O 1 IO_AC13 1379 1 Z
+bit 1379 C 1 *
+bit 1378 I 1 IO_AB13
+bit 1377 O 1 IO_AB13 1376 1 Z
+bit 1376 C 1 *
+bit 1375 I 1 IO_AA13
+bit 1374 O 1 IO_AA13 1373 1 Z
+bit 1373 C 1 *
+bit 1372 I 1 IO_Y13
+bit 1371 O 1 IO_Y13 1370 1 Z
+bit 1370 C 1 *
+bit 1369 I 1 IO_W13
+bit 1368 O 1 IO_W13 1367 1 Z
+bit 1367 C 1 *
+bit 1366 I 1 IO_AF12
+bit 1365 O 1 IO_AF12 1364 1 Z
+bit 1364 C 1 *
+bit 1363 I 1 IO_AE12
+bit 1362 O 1 IO_AE12 1361 1 Z
+bit 1361 C 1 *
+bit 1360 I 1 IO_AD12
+bit 1359 O 1 IO_AD12 1358 1 Z
+bit 1358 C 1 *
+bit 1357 I 1 IO_AB12
+bit 1356 O 1 IO_AB12 1355 1 Z
+bit 1355 C 1 *
+bit 1354 I 1 IO_AA12
+bit 1353 O 1 IO_AA12 1352 1 Z
+bit 1352 C 1 *
+bit 1351 I 1 IO_Y12
+bit 1350 O 1 IO_Y12 1349 1 Z
+bit 1349 C 1 *
+bit 1348 I 1 IO_W12
+bit 1347 O 1 IO_W12 1346 1 Z
+bit 1346 C 1 *
+bit 1345 I 1 IO_AC11
+bit 1344 O 1 IO_AC11 1343 1 Z
+bit 1343 C 1 *
+bit 1342 I 1 IO_AF11
+bit 1341 O 1 IO_AF11 1340 1 Z
+bit 1340 C 1 *
+bit 1339 I 1 IO_AE11
+bit 1338 O 1 IO_AE11 1337 1 Z
+bit 1337 C 1 *
+bit 1336 I 1 IO_AB11
+bit 1335 O 1 IO_AB11 1334 1 Z
+bit 1334 C 1 *
+bit 1333 I 1 IO_AA11
+bit 1332 O 1 IO_AA11 1331 1 Z
+bit 1331 C 1 *
+bit 1330 O 1 *
+bit 1329 O 1 *
+bit 1328 O 1 *
+bit 1327 I 1 IO_Y11
+bit 1326 O 1 IO_Y11 1325 1 Z
+bit 1325 C 1 *
+bit 1324 I 1 IO_W11
+bit 1323 O 1 IO_W11 1322 1 Z
+bit 1322 C 1 *
+bit 1321 I 1 IO_AF10
+bit 1320 O 1 IO_AF10 1319 1 Z
+bit 1319 C 1 *
+bit 1318 I 1 IO_AE10
+bit 1317 O 1 IO_AE10 1316 1 Z
+bit 1316 C 1 *
+bit 1315 I 1 IO_AD10
+bit 1314 O 1 IO_AD10 1313 1 Z
+bit 1313 C 1 *
+bit 1312 I 1 IO_AC10
+bit 1311 O 1 IO_AC10 1310 1 Z
+bit 1310 C 1 *
+bit 1309 I 1 IO_AB10
+bit 1308 O 1 IO_AB10 1307 1 Z
+bit 1307 C 1 *
+bit 1306 O 1 *
+bit 1305 O 1 *
+bit 1304 O 1 *
+bit 1303 O 1 *
+bit 1302 O 1 *
+bit 1301 O 1 *
+bit 1300 O 1 *
+bit 1299 O 1 *
+bit 1298 O 1 *
+bit 1297 O 1 *
+bit 1296 O 1 *
+bit 1295 O 1 *
+bit 1294 O 1 *
+bit 1293 O 1 *
+bit 1292 O 1 *
+bit 1291 I 1 IO_AA10
+bit 1290 O 1 IO_AA10 1289 1 Z
+bit 1289 C 1 *
+bit 1288 I 1 IO_Y10
+bit 1287 O 1 IO_Y10 1286 1 Z
+bit 1286 C 1 *
+bit 1285 O 1 *
+bit 1284 O 1 *
+bit 1283 O 1 *
+bit 1282 I 1 IO_AE9
+bit 1281 O 1 IO_AE9 1280 1 Z
+bit 1280 C 1 *
+bit 1279 I 1 IO_AD9
+bit 1278 O 1 IO_AD9 1277 1 Z
+bit 1277 C 1 *
+bit 1276 I 1 IO_AC9
+bit 1275 O 1 IO_AC9 1274 1 Z
+bit 1274 C 1 *
+bit 1273 O 1 *
+bit 1272 O 1 *
+bit 1271 O 1 *
+bit 1270 I 1 IO_AB9
+bit 1269 O 1 IO_AB9 1268 1 Z
+bit 1268 C 1 *
+bit 1267 I 1 IO_AA9
+bit 1266 O 1 IO_AA9 1265 1 Z
+bit 1265 C 1 *
+bit 1264 I 1 IO_Y9
+bit 1263 O 1 IO_Y9 1262 1 Z
+bit 1262 C 1 *
+bit 1261 I 1 IO_AF8
+bit 1260 O 1 IO_AF8 1259 1 Z
+bit 1259 C 1 *
+bit 1258 I 1 IO_AE8
+bit 1257 O 1 IO_AE8 1256 1 Z
+bit 1256 C 1 *
+bit 1255 O 1 *
+bit 1254 O 1 *
+bit 1253 O 1 *
+bit 1252 O 1 *
+bit 1251 O 1 *
+bit 1250 O 1 *
+bit 1249 O 1 *
+bit 1248 O 1 *
+bit 1247 O 1 *
+bit 1246 O 1 *
+bit 1245 O 1 *
+bit 1244 O 1 *
+bit 1243 O 1 *
+bit 1242 O 1 *
+bit 1241 O 1 *
+bit 1240 O 1 *
+bit 1239 O 1 *
+bit 1238 O 1 *
+bit 1237 I 1 IO_AD8
+bit 1236 O 1 IO_AD8 1235 1 Z
+bit 1235 C 1 *
+bit 1234 I 1 IO_AC8
+bit 1233 O 1 IO_AC8 1232 1 Z
+bit 1232 C 1 *
+bit 1231 I 1 IO_AB8
+bit 1230 O 1 IO_AB8 1229 1 Z
+bit 1229 C 1 *
+bit 1228 I 1 IO_AA8
+bit 1227 O 1 IO_AA8 1226 1 Z
+bit 1226 C 1 *
+bit 1225 I 1 IO_Y8
+bit 1224 O 1 IO_Y8 1223 1 Z
+bit 1223 C 1 *
+bit 1222 I 1 IO_AF7
+bit 1221 O 1 IO_AF7 1220 1 Z
+bit 1220 C 1 *
+bit 1219 I 1 IO_AE7
+bit 1218 O 1 IO_AE7 1217 1 Z
+bit 1217 C 1 *
+bit 1216 I 1 IO_AC7
+bit 1215 O 1 IO_AC7 1214 1 Z
+bit 1214 C 1 *
+bit 1213 I 1 IO_AB7
+bit 1212 O 1 IO_AB7 1211 1 Z
+bit 1211 C 1 *
+bit 1210 I 1 IO_AA7
+bit 1209 O 1 IO_AA7 1208 1 Z
+bit 1208 C 1 *
+bit 1207 I 1 IO_AF6
+bit 1206 O 1 IO_AF6 1205 1 Z
+bit 1205 C 1 *
+bit 1204 I 1 IO_AE6
+bit 1203 O 1 IO_AE6 1202 1 Z
+bit 1202 C 1 *
+bit 1201 I 1 IO_AD6
+bit 1200 O 1 IO_AD6 1199 1 Z
+bit 1199 C 1 *
+bit 1198 I 1 IO_AC6
+bit 1197 O 1 IO_AC6 1196 1 Z
+bit 1196 C 1 *
+bit 1195 O 1 *
+bit 1194 O 1 *
+bit 1193 O 1 *
+bit 1192 O 1 *
+bit 1191 O 1 *
+bit 1190 O 1 *
+bit 1189 O 1 *
+bit 1188 O 1 *
+bit 1187 O 1 *
+bit 1186 O 1 *
+bit 1185 O 1 *
+bit 1184 O 1 *
+bit 1183 O 1 *
+bit 1182 O 1 *
+bit 1181 O 1 *
+bit 1180 O 1 *
+bit 1179 O 1 *
+bit 1178 O 1 *
+bit 1177 O 1 *
+bit 1176 O 1 *
+bit 1175 O 1 *
+bit 1174 O 1 *
+bit 1173 O 1 *
+bit 1172 O 1 *
+bit 1171 O 1 *
+bit 1170 O 1 *
+bit 1169 O 1 *
+bit 1168 O 1 *
+bit 1167 O 1 *
+bit 1166 O 1 *
+bit 1165 I 1 IO_AF5
+bit 1164 O 1 IO_AF5 1163 1 Z
+bit 1163 C 1 *
+bit 1162 I 1 IO_AE5
+bit 1161 O 1 IO_AE5 1160 1 Z
+bit 1160 C 1 *
+bit 1159 I 1 IO_AD5
+bit 1158 O 1 IO_AD5 1157 1 Z
+bit 1157 C 1 *
+bit 1156 I 1 IO_AB6
+bit 1155 O 1 IO_AB6 1154 1 Z
+bit 1154 C 1 *
+bit 1153 I 1 IO_AA6
+bit 1152 O 1 IO_AA6 1151 1 Z
+bit 1151 C 1 *
+bit 1150 I 1 IO_AF4
+bit 1149 O 1 IO_AF4 1148 1 Z
+bit 1148 C 1 *
+bit 1147 I 1 IO_AE4
+bit 1146 O 1 IO_AE4 1145 1 Z
+bit 1145 C 1 *
+bit 1144 I 1 IO_AD4
+bit 1143 O 1 IO_AD4 1142 1 Z
+bit 1142 C 1 *
+bit 1141 O 1 *
+bit 1140 O 1 *
+bit 1139 O 1 *
+bit 1138 O 1 *
+bit 1137 O 1 *
+bit 1136 O 1 *
+bit 1135 O 1 *
+bit 1134 O 1 *
+bit 1133 O 1 *
+bit 1132 O 1 *
+bit 1131 O 1 *
+bit 1130 O 1 *
+bit 1129 O 1 *
+bit 1128 O 1 *
+bit 1127 O 1 *
+bit 1126 I 1 IO_AC5
+bit 1125 O 1 IO_AC5 1124 1 Z
+bit 1124 C 1 *
+bit 1123 I 1 IO_AB5
+bit 1122 O 1 IO_AB5 1121 1 Z
+bit 1121 C 1 *
+bit 1120 I 1 M2_AF3
+bit 1119 I 1 M0_AE3
+bit 1118 I 1 M1_AC3
+bit 1117 I 1 IO_AD2
+bit 1116 O 1 IO_AD2 1115 1 Z
+bit 1115 C 1 *
+bit 1114 I 1 IO_AD1
+bit 1113 O 1 IO_AD1 1112 1 Z
+bit 1112 C 1 *
+bit 1111 I 1 IO_AB4
+bit 1110 O 1 IO_AB4 1109 1 Z
+bit 1109 C 1 *
+bit 1108 I 1 IO_AB3
+bit 1107 O 1 IO_AB3 1106 1 Z
+bit 1106 C 1 *
+bit 1105 I 1 IO_AC2
+bit 1104 O 1 IO_AC2 1103 1 Z
+bit 1103 C 1 *
+bit 1102 I 1 IO_AC1
+bit 1101 O 1 IO_AC1 1100 1 Z
+bit 1100 C 1 *
+bit 1099 I 1 IO_AA5
+bit 1098 O 1 IO_AA5 1097 1 Z
+bit 1097 C 1 *
+bit 1096 O 1 *
+bit 1095 O 1 *
+bit 1094 O 1 *
+bit 1093 I 1 IO_AB2
+bit 1092 O 1 IO_AB2 1091 1 Z
+bit 1091 C 1 *
+bit 1090 I 1 IO_AB1
+bit 1089 O 1 IO_AB1 1088 1 Z
+bit 1088 C 1 *
+bit 1087 I 1 IO_Y7
+bit 1086 O 1 IO_Y7 1085 1 Z
+bit 1085 C 1 *
+bit 1084 I 1 IO_Y6
+bit 1083 O 1 IO_Y6 1082 1 Z
+bit 1082 C 1 *
+bit 1081 O 1 *
+bit 1080 O 1 *
+bit 1079 O 1 *
+bit 1078 O 1 *
+bit 1077 O 1 *
+bit 1076 O 1 *
+bit 1075 O 1 *
+bit 1074 O 1 *
+bit 1073 O 1 *
+bit 1072 O 1 *
+bit 1071 O 1 *
+bit 1070 O 1 *
+bit 1069 I 1 IO_AA4
+bit 1068 O 1 IO_AA4 1067 1 Z
+bit 1067 C 1 *
+bit 1066 I 1 IO_AA3
+bit 1065 O 1 IO_AA3 1064 1 Z
+bit 1064 C 1 *
+bit 1063 I 1 IO_Y5
+bit 1062 O 1 IO_Y5 1061 1 Z
+bit 1061 C 1 *
+bit 1060 I 1 IO_Y4
+bit 1059 O 1 IO_Y4 1058 1 Z
+bit 1058 C 1 *
+bit 1057 I 1 IO_AA2
+bit 1056 O 1 IO_AA2 1055 1 Z
+bit 1055 C 1 *
+bit 1054 I 1 IO_AA1
+bit 1053 O 1 IO_AA1 1052 1 Z
+bit 1052 C 1 *
+bit 1051 I 1 IO_Y2
+bit 1050 O 1 IO_Y2 1049 1 Z
+bit 1049 C 1 *
+bit 1048 I 1 IO_Y1
+bit 1047 O 1 IO_Y1 1046 1 Z
+bit 1046 C 1 *
+bit 1045 O 1 *
+bit 1044 O 1 *
+bit 1043 O 1 *
+bit 1042 O 1 *
+bit 1041 O 1 *
+bit 1040 O 1 *
+bit 1039 O 1 *
+bit 1038 O 1 *
+bit 1037 O 1 *
+bit 1036 O 1 *
+bit 1035 O 1 *
+bit 1034 O 1 *
+bit 1033 O 1 *
+bit 1032 O 1 *
+bit 1031 O 1 *
+bit 1030 O 1 *
+bit 1029 O 1 *
+bit 1028 O 1 *
+bit 1027 I 1 IO_W7
+bit 1026 O 1 IO_W7 1025 1 Z
+bit 1025 C 1 *
+bit 1024 I 1 IO_W6
+bit 1023 O 1 IO_W6 1022 1 Z
+bit 1022 C 1 *
+bit 1021 O 1 *
+bit 1020 O 1 *
+bit 1019 O 1 *
+bit 1018 O 1 *
+bit 1017 O 1 *
+bit 1016 O 1 *
+bit 1015 I 1 IO_V6
+bit 1014 O 1 IO_V6 1013 1 Z
+bit 1013 C 1 *
+bit 1012 I 1 IO_W5
+bit 1011 O 1 IO_W5 1010 1 Z
+bit 1010 C 1 *
+bit 1009 I 1 IO_W4
+bit 1008 O 1 IO_W4 1007 1 Z
+bit 1007 C 1 *
+bit 1006 I 1 IO_W3
+bit 1005 O 1 IO_W3 1004 1 Z
+bit 1004 C 1 *
+bit 1003 O 1 *
+bit 1002 O 1 *
+bit 1001 O 1 *
+bit 1000 O 1 *
+bit 999 O 1 *
+bit 998 O 1 *
+bit 997 I 1 IO_W2
+bit 996 O 1 IO_W2 995 1 Z
+bit 995 C 1 *
+bit 994 I 1 IO_W1
+bit 993 O 1 IO_W1 992 1 Z
+bit 992 C 1 *
+bit 991 I 1 IO_V7
+bit 990 O 1 IO_V7 989 1 Z
+bit 989 C 1 *
+bit 988 I 1 IO_U7
+bit 987 O 1 IO_U7 986 1 Z
+bit 986 C 1 *
+bit 985 I 1 IO_V5
+bit 984 O 1 IO_V5 983 1 Z
+bit 983 C 1 *
+bit 982 I 1 IO_V4
+bit 981 O 1 IO_V4 980 1 Z
+bit 980 C 1 *
+bit 979 I 1 IO_V3
+bit 978 O 1 IO_V3 977 1 Z
+bit 977 C 1 *
+bit 976 I 1 IO_V2
+bit 975 O 1 IO_V2 974 1 Z
+bit 974 C 1 *
+bit 973 O 1 *
+bit 972 O 1 *
+bit 971 O 1 *
+bit 970 O 1 *
+bit 969 O 1 *
+bit 968 O 1 *
+bit 967 I 1 IO_U6
+bit 966 O 1 IO_U6 965 1 Z
+bit 965 C 1 *
+bit 964 I 1 IO_U5
+bit 963 O 1 IO_U5 962 1 Z
+bit 962 C 1 *
+bit 961 I 1 IO_U4
+bit 960 O 1 IO_U4 959 1 Z
+bit 959 C 1 *
+bit 958 I 1 IO_U3
+bit 957 O 1 IO_U3 956 1 Z
+bit 956 C 1 *
+bit 955 O 1 *
+bit 954 O 1 *
+bit 953 O 1 *
+bit 952 O 1 *
+bit 951 O 1 *
+bit 950 O 1 *
+bit 949 I 1 IO_U2
+bit 948 O 1 IO_U2 947 1 Z
+bit 947 C 1 *
+bit 946 I 1 IO_U1
+bit 945 O 1 IO_U1 944 1 Z
+bit 944 C 1 *
+bit 943 I 1 IO_T8
+bit 942 O 1 IO_T8 941 1 Z
+bit 941 C 1 *
+bit 940 I 1 IO_T7
+bit 939 O 1 IO_T7 938 1 Z
+bit 938 C 1 *
+bit 937 O 1 *
+bit 936 O 1 *
+bit 935 O 1 *
+bit 934 O 1 *
+bit 933 O 1 *
+bit 932 O 1 *
+bit 931 I 1 IO_T6
+bit 930 O 1 IO_T6 929 1 Z
+bit 929 C 1 *
+bit 928 I 1 IO_T5
+bit 927 O 1 IO_T5 926 1 Z
+bit 926 C 1 *
+bit 925 I 1 IO_T2
+bit 924 O 1 IO_T2 923 1 Z
+bit 923 C 1 *
+bit 922 I 1 IO_T1
+bit 921 O 1 IO_T1 920 1 Z
+bit 920 C 1 *
+bit 919 O 1 *
+bit 918 O 1 *
+bit 917 O 1 *
+bit 916 O 1 *
+bit 915 O 1 *
+bit 914 O 1 *
+bit 913 I 1 IO_R8
+bit 912 O 1 IO_R8 911 1 Z
+bit 911 C 1 *
+bit 910 I 1 IO_R7
+bit 909 O 1 IO_R7 908 1 Z
+bit 908 C 1 *
+bit 907 I 1 IO_R6
+bit 906 O 1 IO_R6 905 1 Z
+bit 905 C 1 *
+bit 904 I 1 IO_R5
+bit 903 O 1 IO_R5 902 1 Z
+bit 902 C 1 *
+bit 901 O 1 *
+bit 900 O 1 *
+bit 899 O 1 *
+bit 898 O 1 *
+bit 897 O 1 *
+bit 896 O 1 *
+bit 895 I 1 IO_T4
+bit 894 O 1 IO_T4 893 1 Z
+bit 893 C 1 *
+bit 892 I 1 IO_R3
+bit 891 O 1 IO_R3 890 1 Z
+bit 890 C 1 *
+bit 889 I 1 IO_R2
+bit 888 O 1 IO_R2 887 1 Z
+bit 887 C 1 *
+bit 886 I 1 IO_R1
+bit 885 O 1 IO_R1 884 1 Z
+bit 884 C 1 *
+bit 883 I 1 IO_P8
+bit 882 O 1 IO_P8 881 1 Z
+bit 881 C 1 *
+bit 880 I 1 IO_P7
+bit 879 O 1 IO_P7 878 1 Z
+bit 878 C 1 *
+bit 877 O 1 *
+bit 876 O 1 *
+bit 875 O 1 *
+bit 874 O 1 *
+bit 873 O 1 *
+bit 872 O 1 *
+bit 871 O 1 *
+bit 870 O 1 *
+bit 869 O 1 *
+bit 868 O 1 *
+bit 867 O 1 *
+bit 866 O 1 *
+bit 865 O 1 *
+bit 864 O 1 *
+bit 863 O 1 *
+bit 862 O 1 *
+bit 861 O 1 *
+bit 860 O 1 *
+bit 859 O 1 *
+bit 858 O 1 *
+bit 857 O 1 *
+bit 856 O 1 *
+bit 855 O 1 *
+bit 854 O 1 *
+bit 853 O 1 *
+bit 852 O 1 *
+bit 851 O 1 *
+bit 850 O 1 *
+bit 849 O 1 *
+bit 848 O 1 *
+bit 847 I 1 IO_P6
+bit 846 O 1 IO_P6 845 1 Z
+bit 845 C 1 *
+bit 844 I 1 IO_P5
+bit 843 O 1 IO_P5 842 1 Z
+bit 842 C 1 *
+bit 841 I 1 IO_P4
+bit 840 O 1 IO_P4 839 1 Z
+bit 839 C 1 *
+bit 838 I 1 IO_P3
+bit 837 O 1 IO_P3 836 1 Z
+bit 836 C 1 *
+bit 835 I 1 IO_P2
+bit 834 O 1 IO_P2 833 1 Z
+bit 833 C 1 *
+bit 832 I 1 IO_P1
+bit 831 O 1 IO_P1 830 1 Z
+bit 830 C 1 *
+bit 829 I 1 IO_N1
+bit 828 O 1 IO_N1 827 1 Z
+bit 827 C 1 *
+bit 826 I 1 IO_N2
+bit 825 O 1 IO_N2 824 1 Z
+bit 824 C 1 *
+bit 823 I 1 IO_N3
+bit 822 O 1 IO_N3 821 1 Z
+bit 821 C 1 *
+bit 820 I 1 IO_N4
+bit 819 O 1 IO_N4 818 1 Z
+bit 818 C 1 *
+bit 817 I 1 IO_N5
+bit 816 O 1 IO_N5 815 1 Z
+bit 815 C 1 *
+bit 814 I 1 IO_N6
+bit 813 O 1 IO_N6 812 1 Z
+bit 812 C 1 *
+bit 811 O 1 *
+bit 810 O 1 *
+bit 809 O 1 *
+bit 808 O 1 *
+bit 807 O 1 *
+bit 806 O 1 *
+bit 805 O 1 *
+bit 804 O 1 *
+bit 803 O 1 *
+bit 802 O 1 *
+bit 801 O 1 *
+bit 800 O 1 *
+bit 799 O 1 *
+bit 798 O 1 *
+bit 797 O 1 *
+bit 796 O 1 *
+bit 795 O 1 *
+bit 794 O 1 *
+bit 793 I 1 IO_N7
+bit 792 O 1 IO_N7 791 1 Z
+bit 791 C 1 *
+bit 790 I 1 IO_N8
+bit 789 O 1 IO_N8 788 1 Z
+bit 788 C 1 *
+bit 787 I 1 IO_M1
+bit 786 O 1 IO_M1 785 1 Z
+bit 785 C 1 *
+bit 784 I 1 IO_M2
+bit 783 O 1 IO_M2 782 1 Z
+bit 782 C 1 *
+bit 781 I 1 IO_M3
+bit 780 O 1 IO_M3 779 1 Z
+bit 779 C 1 *
+bit 778 I 1 IO_L4
+bit 777 O 1 IO_L4 776 1 Z
+bit 776 C 1 *
+bit 775 I 1 IO_M6
+bit 774 O 1 IO_M6 773 1 Z
+bit 773 C 1 *
+bit 772 I 1 IO_M5
+bit 771 O 1 IO_M5 770 1 Z
+bit 770 C 1 *
+bit 769 I 1 IO_M7
+bit 768 O 1 IO_M7 767 1 Z
+bit 767 C 1 *
+bit 766 I 1 IO_M8
+bit 765 O 1 IO_M8 764 1 Z
+bit 764 C 1 *
+bit 763 O 1 *
+bit 762 O 1 *
+bit 761 O 1 *
+bit 760 O 1 *
+bit 759 O 1 *
+bit 758 O 1 *
+bit 757 O 1 *
+bit 756 O 1 *
+bit 755 O 1 *
+bit 754 O 1 *
+bit 753 O 1 *
+bit 752 O 1 *
+bit 751 O 1 *
+bit 750 O 1 *
+bit 749 O 1 *
+bit 748 O 1 *
+bit 747 O 1 *
+bit 746 O 1 *
+bit 745 I 1 IO_L1
+bit 744 O 1 IO_L1 743 1 Z
+bit 743 C 1 *
+bit 742 I 1 IO_L2
+bit 741 O 1 IO_L2 740 1 Z
+bit 740 C 1 *
+bit 739 I 1 IO_L5
+bit 738 O 1 IO_L5 737 1 Z
+bit 737 C 1 *
+bit 736 I 1 IO_L6
+bit 735 O 1 IO_L6 734 1 Z
+bit 734 C 1 *
+bit 733 I 1 IO_L7
+bit 732 O 1 IO_L7 731 1 Z
+bit 731 C 1 *
+bit 730 I 1 IO_L8
+bit 729 O 1 IO_L8 728 1 Z
+bit 728 C 1 *
+bit 727 O 1 *
+bit 726 O 1 *
+bit 725 O 1 *
+bit 724 O 1 *
+bit 723 O 1 *
+bit 722 O 1 *
+bit 721 I 1 IO_K1
+bit 720 O 1 IO_K1 719 1 Z
+bit 719 C 1 *
+bit 718 I 1 IO_K2
+bit 717 O 1 IO_K2 716 1 Z
+bit 716 C 1 *
+bit 715 O 1 *
+bit 714 O 1 *
+bit 713 O 1 *
+bit 712 O 1 *
+bit 711 O 1 *
+bit 710 O 1 *
+bit 709 O 1 *
+bit 708 O 1 *
+bit 707 O 1 *
+bit 706 O 1 *
+bit 705 O 1 *
+bit 704 O 1 *
+bit 703 I 1 IO_K3
+bit 702 O 1 IO_K3 701 1 Z
+bit 701 C 1 *
+bit 700 I 1 IO_K4
+bit 699 O 1 IO_K4 698 1 Z
+bit 698 C 1 *
+bit 697 O 1 *
+bit 696 O 1 *
+bit 695 O 1 *
+bit 694 O 1 *
+bit 693 O 1 *
+bit 692 O 1 *
+bit 691 I 1 IO_K5
+bit 690 O 1 IO_K5 689 1 Z
+bit 689 C 1 *
+bit 688 I 1 IO_K6
+bit 687 O 1 IO_K6 686 1 Z
+bit 686 C 1 *
+bit 685 I 1 IO_J2
+bit 684 O 1 IO_J2 683 1 Z
+bit 683 C 1 *
+bit 682 I 1 IO_J3
+bit 681 O 1 IO_J3 680 1 Z
+bit 680 C 1 *
+bit 679 I 1 IO_J4
+bit 678 O 1 IO_J4 677 1 Z
+bit 677 C 1 *
+bit 676 I 1 IO_J5
+bit 675 O 1 IO_J5 674 1 Z
+bit 674 C 1 *
+bit 673 I 1 IO_K7
+bit 672 O 1 IO_K7 671 1 Z
+bit 671 C 1 *
+bit 670 I 1 IO_J7
+bit 669 O 1 IO_J7 668 1 Z
+bit 668 C 1 *
+bit 667 I 1 IO_H1
+bit 666 O 1 IO_H1 665 1 Z
+bit 665 C 1 *
+bit 664 I 1 IO_H2
+bit 663 O 1 IO_H2 662 1 Z
+bit 662 C 1 *
+bit 661 O 1 *
+bit 660 O 1 *
+bit 659 O 1 *
+bit 658 O 1 *
+bit 657 O 1 *
+bit 656 O 1 *
+bit 655 I 1 IO_H3
+bit 654 O 1 IO_H3 653 1 Z
+bit 653 C 1 *
+bit 652 I 1 IO_H4
+bit 651 O 1 IO_H4 650 1 Z
+bit 650 C 1 *
+bit 649 I 1 IO_J6
+bit 648 O 1 IO_J6 647 1 Z
+bit 647 C 1 *
+bit 646 I 1 IO_H5
+bit 645 O 1 IO_H5 644 1 Z
+bit 644 C 1 *
+bit 643 O 1 *
+bit 642 O 1 *
+bit 641 O 1 *
+bit 640 O 1 *
+bit 639 O 1 *
+bit 638 O 1 *
+bit 637 I 1 IO_G1
+bit 636 O 1 IO_G1 635 1 Z
+bit 635 C 1 *
+bit 634 I 1 IO_G2
+bit 633 O 1 IO_G2 632 1 Z
+bit 632 C 1 *
+bit 631 O 1 *
+bit 630 O 1 *
+bit 629 O 1 *
+bit 628 O 1 *
+bit 627 O 1 *
+bit 626 O 1 *
+bit 625 O 1 *
+bit 624 O 1 *
+bit 623 O 1 *
+bit 622 O 1 *
+bit 621 O 1 *
+bit 620 O 1 *
+bit 619 O 1 *
+bit 618 O 1 *
+bit 617 O 1 *
+bit 616 O 1 *
+bit 615 O 1 *
+bit 614 O 1 *
+bit 613 I 1 IO_H6
+bit 612 O 1 IO_H6 611 1 Z
+bit 611 C 1 *
+bit 610 I 1 IO_H7
+bit 609 O 1 IO_H7 608 1 Z
+bit 608 C 1 *
+bit 607 I 1 IO_F1
+bit 606 O 1 IO_F1 605 1 Z
+bit 605 C 1 *
+bit 604 I 1 IO_F2
+bit 603 O 1 IO_F2 602 1 Z
+bit 602 C 1 *
+bit 601 I 1 IO_G4
+bit 600 O 1 IO_G4 599 1 Z
+bit 599 C 1 *
+bit 598 I 1 IO_G5
+bit 597 O 1 IO_G5 596 1 Z
+bit 596 C 1 *
+bit 595 I 1 IO_F3
+bit 594 O 1 IO_F3 593 1 Z
+bit 593 C 1 *
+bit 592 I 1 IO_F4
+bit 591 O 1 IO_F4 590 1 Z
+bit 590 C 1 *
+bit 589 O 1 *
+bit 588 O 1 *
+bit 587 O 1 *
+bit 586 O 1 *
+bit 585 O 1 *
+bit 584 O 1 *
+bit 583 O 1 *
+bit 582 O 1 *
+bit 581 O 1 *
+bit 580 O 1 *
+bit 579 O 1 *
+bit 578 O 1 *
+bit 577 I 1 IO_E1
+bit 576 O 1 IO_E1 575 1 Z
+bit 575 C 1 *
+bit 574 I 1 IO_E2
+bit 573 O 1 IO_E2 572 1 Z
+bit 572 C 1 *
+bit 571 I 1 IO_G6
+bit 570 O 1 IO_G6 569 1 Z
+bit 569 C 1 *
+bit 568 I 1 IO_G7
+bit 567 O 1 IO_G7 566 1 Z
+bit 566 C 1 *
+bit 565 O 1 *
+bit 564 O 1 *
+bit 563 O 1 *
+bit 562 O 1 *
+bit 561 O 1 *
+bit 560 O 1 *
+bit 559 I 1 IO_D1
+bit 558 O 1 IO_D1 557 1 Z
+bit 557 C 1 *
+bit 556 I 1 IO_D2
+bit 555 O 1 IO_D2 554 1 Z
+bit 554 C 1 *
+bit 553 I 1 IO_E3
+bit 552 O 1 IO_E3 551 1 Z
+bit 551 C 1 *
+bit 550 I 1 IO_E4
+bit 549 O 1 IO_E4 548 1 Z
+bit 548 C 1 *
+bit 547 I 1 IO_F5
+bit 546 O 1 IO_F5 545 1 Z
+bit 545 C 1 *
+bit 544 I 1 IO_F6
+bit 543 O 1 IO_F6 542 1 Z
+bit 542 C 1 *
+bit 541 O 1 *
+bit 540 I 1 HSWAP_EN_C2
+bit 539 I 1 IO_B3
+bit 538 O 1 IO_B3 537 1 Z
+bit 537 C 1 *
+bit 536 I 1 IO_E5
+bit 535 O 1 IO_E5 534 1 Z
+bit 534 C 1 *
+bit 533 I 1 IO_D5
+bit 532 O 1 IO_D5 531 1 Z
+bit 531 C 1 *
+bit 530 O 1 *
+bit 529 O 1 *
+bit 528 O 1 *
+bit 527 O 1 *
+bit 526 O 1 *
+bit 525 O 1 *
+bit 524 O 1 *
+bit 523 O 1 *
+bit 522 O 1 *
+bit 521 O 1 *
+bit 520 O 1 *
+bit 519 O 1 *
+bit 518 O 1 *
+bit 517 O 1 *
+bit 516 O 1 *
+bit 515 O 1 *
+bit 514 O 1 *
+bit 513 O 1 *
+bit 512 I 1 IO_A3
+bit 511 O 1 IO_A3 510 1 Z
+bit 510 C 1 *
+bit 509 I 1 IO_C4
+bit 508 O 1 IO_C4 507 1 Z
+bit 507 C 1 *
+bit 506 I 1 IO_B4
+bit 505 O 1 IO_B4 504 1 Z
+bit 504 C 1 *
+bit 503 I 1 IO_A4
+bit 502 O 1 IO_A4 501 1 Z
+bit 501 C 1 *
+bit 500 I 1 IO_C5
+bit 499 O 1 IO_C5 498 1 Z
+bit 498 C 1 *
+bit 497 I 1 IO_B5
+bit 496 O 1 IO_B5 495 1 Z
+bit 495 C 1 *
+bit 494 O 1 *
+bit 493 O 1 *
+bit 492 O 1 *
+bit 491 O 1 *
+bit 490 O 1 *
+bit 489 O 1 *
+bit 488 O 1 *
+bit 487 O 1 *
+bit 486 O 1 *
+bit 485 O 1 *
+bit 484 O 1 *
+bit 483 O 1 *
+bit 482 I 1 IO_A5
+bit 481 O 1 IO_A5 480 1 Z
+bit 480 C 1 *
+bit 479 O 1 *
+bit 478 O 1 *
+bit 477 O 1 *
+bit 476 I 1 IO_E6
+bit 475 O 1 IO_E6 474 1 Z
+bit 474 C 1 *
+bit 473 I 1 IO_D6
+bit 472 O 1 IO_D6 471 1 Z
+bit 471 C 1 *
+bit 470 I 1 IO_C6
+bit 469 O 1 IO_C6 468 1 Z
+bit 468 C 1 *
+bit 467 I 1 IO_B6
+bit 466 O 1 IO_B6 465 1 Z
+bit 465 C 1 *
+bit 464 I 1 IO_A6
+bit 463 O 1 IO_A6 462 1 Z
+bit 462 C 1 *
+bit 461 I 1 IO_E7
+bit 460 O 1 IO_E7 459 1 Z
+bit 459 C 1 *
+bit 458 I 1 IO_D7
+bit 457 O 1 IO_D7 456 1 Z
+bit 456 C 1 *
+bit 455 I 1 IO_B7
+bit 454 O 1 IO_B7 453 1 Z
+bit 453 C 1 *
+bit 452 I 1 IO_A7
+bit 451 O 1 IO_A7 450 1 Z
+bit 450 C 1 *
+bit 449 I 1 IO_F7
+bit 448 O 1 IO_F7 447 1 Z
+bit 447 C 1 *
+bit 446 O 1 *
+bit 445 O 1 *
+bit 444 O 1 *
+bit 443 O 1 *
+bit 442 O 1 *
+bit 441 O 1 *
+bit 440 O 1 *
+bit 439 O 1 *
+bit 438 O 1 *
+bit 437 O 1 *
+bit 436 O 1 *
+bit 435 O 1 *
+bit 434 O 1 *
+bit 433 O 1 *
+bit 432 O 1 *
+bit 431 I 1 IO_G8
+bit 430 O 1 IO_G8 429 1 Z
+bit 429 C 1 *
+bit 428 I 1 IO_F8
+bit 427 O 1 IO_F8 426 1 Z
+bit 426 C 1 *
+bit 425 I 1 IO_E8
+bit 424 O 1 IO_E8 423 1 Z
+bit 423 C 1 *
+bit 422 I 1 IO_D8
+bit 421 O 1 IO_D8 420 1 Z
+bit 420 C 1 *
+bit 419 O 1 *
+bit 418 O 1 *
+bit 417 O 1 *
+bit 416 O 1 *
+bit 415 O 1 *
+bit 414 O 1 *
+bit 413 O 1 *
+bit 412 O 1 *
+bit 411 O 1 *
+bit 410 O 1 *
+bit 409 O 1 *
+bit 408 O 1 *
+bit 407 O 1 *
+bit 406 O 1 *
+bit 405 O 1 *
+bit 404 I 1 IO_C8
+bit 403 O 1 IO_C8 402 1 Z
+bit 402 C 1 *
+bit 401 I 1 IO_B8
+bit 400 O 1 IO_B8 399 1 Z
+bit 399 C 1 *
+bit 398 I 1 IO_A8
+bit 397 O 1 IO_A8 396 1 Z
+bit 396 C 1 *
+bit 395 I 1 IO_G9
+bit 394 O 1 IO_G9 393 1 Z
+bit 393 C 1 *
+bit 392 I 1 IO_F9
+bit 391 O 1 IO_F9 390 1 Z
+bit 390 C 1 *
+bit 389 O 1 *
+bit 388 O 1 *
+bit 387 O 1 *
+bit 386 I 1 IO_E9
+bit 385 O 1 IO_E9 384 1 Z
+bit 384 C 1 *
+bit 383 I 1 IO_D9
+bit 382 O 1 IO_D9 381 1 Z
+bit 381 C 1 *
+bit 380 I 1 IO_C9
+bit 379 O 1 IO_C9 378 1 Z
+bit 378 C 1 *
+bit 377 I 1 IO_B9
+bit 376 O 1 IO_B9 375 1 Z
+bit 375 C 1 *
+bit 374 I 1 IO_G10
+bit 373 O 1 IO_G10 372 1 Z
+bit 372 C 1 *
+bit 371 I 1 IO_F10
+bit 370 O 1 IO_F10 369 1 Z
+bit 369 C 1 *
+bit 368 I 1 IO_E10
+bit 367 O 1 IO_E10 366 1 Z
+bit 366 C 1 *
+bit 365 O 1 *
+bit 364 O 1 *
+bit 363 O 1 *
+bit 362 O 1 *
+bit 361 O 1 *
+bit 360 O 1 *
+bit 359 O 1 *
+bit 358 O 1 *
+bit 357 O 1 *
+bit 356 O 1 *
+bit 355 O 1 *
+bit 354 O 1 *
+bit 353 O 1 *
+bit 352 O 1 *
+bit 351 O 1 *
+bit 350 I 1 IO_D10
+bit 349 O 1 IO_D10 348 1 Z
+bit 348 C 1 *
+bit 347 I 1 IO_C10
+bit 346 O 1 IO_C10 345 1 Z
+bit 345 C 1 *
+bit 344 I 1 IO_H11
+bit 343 O 1 IO_H11 342 1 Z
+bit 342 C 1 *
+bit 341 I 1 IO_B10
+bit 340 O 1 IO_B10 339 1 Z
+bit 339 C 1 *
+bit 338 I 1 IO_A10
+bit 337 O 1 IO_A10 336 1 Z
+bit 336 C 1 *
+bit 335 I 1 IO_G11
+bit 334 O 1 IO_G11 333 1 Z
+bit 333 C 1 *
+bit 332 I 1 IO_F11
+bit 331 O 1 IO_F11 330 1 Z
+bit 330 C 1 *
+bit 329 O 1 *
+bit 328 O 1 *
+bit 327 O 1 *
+bit 326 I 1 IO_E11
+bit 325 O 1 IO_E11 324 1 Z
+bit 324 C 1 *
+bit 323 I 1 IO_D11
+bit 322 O 1 IO_D11 321 1 Z
+bit 321 C 1 *
+bit 320 I 1 IO_B11
+bit 319 O 1 IO_B11 318 1 Z
+bit 318 C 1 *
+bit 317 I 1 IO_A11
+bit 316 O 1 IO_A11 315 1 Z
+bit 315 C 1 *
+bit 314 I 1 IO_H12
+bit 313 O 1 IO_H12 312 1 Z
+bit 312 C 1 *
+bit 311 I 1 IO_G12
+bit 310 O 1 IO_G12 309 1 Z
+bit 309 C 1 *
+bit 308 I 1 IO_H13
+bit 307 O 1 IO_H13 306 1 Z
+bit 306 C 1 *
+bit 305 I 1 IO_F12
+bit 304 O 1 IO_F12 303 1 Z
+bit 303 C 1 *
+bit 302 I 1 IO_E12
+bit 301 O 1 IO_E12 300 1 Z
+bit 300 C 1 *
+bit 299 I 1 IO_C12
+bit 298 O 1 IO_C12 297 1 Z
+bit 297 C 1 *
+bit 296 I 1 IO_B12
+bit 295 O 1 IO_B12 294 1 Z
+bit 294 C 1 *
+bit 293 I 1 IO_A12
+bit 292 O 1 IO_A12 291 1 Z
+bit 291 C 1 *
+bit 290 I 1 IO_G13
+bit 289 O 1 IO_G13 288 1 Z
+bit 288 C 1 *
+bit 287 I 1 IO_F13
+bit 286 O 1 IO_F13 285 1 Z
+bit 285 C 1 *
+bit 284 I 1 IO_E13
+bit 283 O 1 IO_E13 282 1 Z
+bit 282 C 1 *
+bit 281 I 1 IO_D13
+bit 280 O 1 IO_D13 279 1 Z
+bit 279 C 1 *
+bit 278 I 1 IO_C13
+bit 277 O 1 IO_C13 276 1 Z
+bit 276 C 1 *
+bit 275 I 1 IO_B13
+bit 274 O 1 IO_B13 273 1 Z
+bit 273 C 1 *
+bit 272 I 1 IO_A13
+bit 271 O 1 IO_A13 270 1 Z
+bit 270 C 1 *
+bit 269 I 1 IO_A14
+bit 268 O 1 IO_A14 267 1 Z
+bit 267 C 1 *
+bit 266 I 1 IO_B14
+bit 265 O 1 IO_B14 264 1 Z
+bit 264 C 1 *
+bit 263 I 1 IO_C14
+bit 262 O 1 IO_C14 261 1 Z
+bit 261 C 1 *
+bit 260 I 1 IO_D14
+bit 259 O 1 IO_D14 258 1 Z
+bit 258 C 1 *
+bit 257 I 1 IO_E14
+bit 256 O 1 IO_E14 255 1 Z
+bit 255 C 1 *
+bit 254 I 1 IO_F14
+bit 253 O 1 IO_F14 252 1 Z
+bit 252 C 1 *
+bit 251 I 1 IO_G14
+bit 250 O 1 IO_G14 249 1 Z
+bit 249 C 1 *
+bit 248 I 1 IO_H14
+bit 247 O 1 IO_H14 246 1 Z
+bit 246 C 1 *
+bit 245 I 1 IO_A15
+bit 244 O 1 IO_A15 243 1 Z
+bit 243 C 1 *
+bit 242 I 1 IO_B15
+bit 241 O 1 IO_B15 240 1 Z
+bit 240 C 1 *
+bit 239 I 1 IO_C15
+bit 238 O 1 IO_C15 237 1 Z
+bit 237 C 1 *
+bit 236 I 1 IO_E15
+bit 235 O 1 IO_E15 234 1 Z
+bit 234 C 1 *
+bit 233 I 1 IO_F15
+bit 232 O 1 IO_F15 231 1 Z
+bit 231 C 1 *
+bit 230 I 1 IO_G15
+bit 229 O 1 IO_G15 228 1 Z
+bit 228 C 1 *
+bit 227 I 1 IO_H15
+bit 226 O 1 IO_H15 225 1 Z
+bit 225 C 1 *
+bit 224 O 1 *
+bit 223 O 1 *
+bit 222 O 1 *
+bit 221 O 1 *
+bit 220 O 1 *
+bit 219 O 1 *
+bit 218 O 1 *
+bit 217 O 1 *
+bit 216 O 1 *
+bit 215 O 1 *
+bit 214 O 1 *
+bit 213 O 1 *
+bit 212 O 1 *
+bit 211 O 1 *
+bit 210 O 1 *
+bit 209 O 1 *
+bit 208 O 1 *
+bit 207 O 1 *
+bit 206 O 1 *
+bit 205 O 1 *
+bit 204 O 1 *
+bit 203 O 1 *
+bit 202 O 1 *
+bit 201 O 1 *
+bit 200 O 1 *
+bit 199 O 1 *
+bit 198 O 1 *
+bit 197 O 1 *
+bit 196 O 1 *
+bit 195 O 1 *
+bit 194 I 1 IO_D16
+bit 193 O 1 IO_D16 192 1 Z
+bit 192 C 1 *
+bit 191 I 1 IO_A16
+bit 190 O 1 IO_A16 189 1 Z
+bit 189 C 1 *
+bit 188 I 1 IO_B16
+bit 187 O 1 IO_B16 186 1 Z
+bit 186 C 1 *
+bit 185 I 1 IO_E16
+bit 184 O 1 IO_E16 183 1 Z
+bit 183 C 1 *
+bit 182 I 1 IO_F16
+bit 181 O 1 IO_F16 180 1 Z
+bit 180 C 1 *
+bit 179 O 1 *
+bit 178 O 1 *
+bit 177 O 1 *
+bit 176 I 1 IO_G16
+bit 175 O 1 IO_G16 174 1 Z
+bit 174 C 1 *
+bit 173 I 1 IO_H16
+bit 172 O 1 IO_H16 171 1 Z
+bit 171 C 1 *
+bit 170 I 1 IO_A17
+bit 169 O 1 IO_A17 168 1 Z
+bit 168 C 1 *
+bit 167 I 1 IO_B17
+bit 166 O 1 IO_B17 165 1 Z
+bit 165 C 1 *
+bit 164 I 1 IO_C17
+bit 163 O 1 IO_C17 162 1 Z
+bit 162 C 1 *
+bit 161 I 1 IO_D17
+bit 160 O 1 IO_D17 159 1 Z
+bit 159 C 1 *
+bit 158 I 1 IO_E17
+bit 157 O 1 IO_E17 156 1 Z
+bit 156 C 1 *
+bit 155 O 1 *
+bit 154 O 1 *
+bit 153 O 1 *
+bit 152 O 1 *
+bit 151 O 1 *
+bit 150 O 1 *
+bit 149 O 1 *
+bit 148 O 1 *
+bit 147 O 1 *
+bit 146 O 1 *
+bit 145 O 1 *
+bit 144 O 1 *
+bit 143 O 1 *
+bit 142 O 1 *
+bit 141 O 1 *
+bit 140 I 1 IO_F17
+bit 139 O 1 IO_F17 138 1 Z
+bit 138 C 1 *
+bit 137 I 1 IO_G17
+bit 136 O 1 IO_G17 135 1 Z
+bit 135 C 1 *
+bit 134 O 1 *
+bit 133 O 1 *
+bit 132 O 1 *
+bit 131 I 1 IO_B18
+bit 130 O 1 IO_B18 129 1 Z
+bit 129 C 1 *
+bit 128 I 1 IO_C18
+bit 127 O 1 IO_C18 126 1 Z
+bit 126 C 1 *
+bit 125 I 1 IO_D18
+bit 124 O 1 IO_D18 123 1 Z
+bit 123 C 1 *
+bit 122 O 1 *
+bit 121 O 1 *
+bit 120 O 1 *
+bit 119 I 1 IO_E18
+bit 118 O 1 IO_E18 117 1 Z
+bit 117 C 1 *
+bit 116 I 1 IO_F18
+bit 115 O 1 IO_F18 114 1 Z
+bit 114 C 1 *
+bit 113 I 1 IO_G18
+bit 112 O 1 IO_G18 111 1 Z
+bit 111 C 1 *
+bit 110 I 1 IO_A19
+bit 109 O 1 IO_A19 108 1 Z
+bit 108 C 1 *
+bit 107 I 1 IO_B19
+bit 106 O 1 IO_B19 105 1 Z
+bit 105 C 1 *
+bit 104 O 1 *
+bit 103 O 1 *
+bit 102 O 1 *
+bit 101 O 1 *
+bit 100 O 1 *
+bit 99 O 1 *
+bit 98 O 1 *
+bit 97 O 1 *
+bit 96 O 1 *
+bit 95 O 1 *
+bit 94 O 1 *
+bit 93 O 1 *
+bit 92 O 1 *
+bit 91 O 1 *
+bit 90 O 1 *
+bit 89 O 1 *
+bit 88 O 1 *
+bit 87 O 1 *
+bit 86 I 1 IO_C19
+bit 85 O 1 IO_C19 84 1 Z
+bit 84 C 1 *
+bit 83 I 1 IO_D19
+bit 82 O 1 IO_D19 81 1 Z
+bit 81 C 1 *
+bit 80 I 1 IO_E19
+bit 79 O 1 IO_E19 78 1 Z
+bit 78 C 1 *
+bit 77 I 1 IO_F19
+bit 76 O 1 IO_F19 75 1 Z
+bit 75 C 1 *
+bit 74 I 1 IO_G19
+bit 73 O 1 IO_G19 72 1 Z
+bit 72 C 1 *
+bit 71 I 1 IO_A20
+bit 70 O 1 IO_A20 69 1 Z
+bit 69 C 1 *
+bit 68 I 1 IO_B20
+bit 67 O 1 IO_B20 66 1 Z
+bit 66 C 1 *
+bit 65 I 1 IO_D20
+bit 64 O 1 IO_D20 63 1 Z
+bit 63 C 1 *
+bit 62 I 1 IO_E20
+bit 61 O 1 IO_E20 60 1 Z
+bit 60 C 1 *
+bit 59 I 1 IO_F20
+bit 58 O 1 IO_F20 57 1 Z
+bit 57 C 1 *
+bit 56 I 1 IO_A21
+bit 55 O 1 IO_A21 54 1 Z
+bit 54 C 1 *
+bit 53 I 1 IO_B21
+bit 52 O 1 IO_B21 51 1 Z
+bit 51 C 1 *
+bit 50 I 1 IO_C21
+bit 49 O 1 IO_C21 48 1 Z
+bit 48 C 1 *
+bit 47 I 1 IO_D21
+bit 46 O 1 IO_D21 45 1 Z
+bit 45 C 1 *
+bit 44 I 1 IO_A22
+bit 43 O 1 IO_A22 42 1 Z
+bit 42 C 1 *
+bit 41 I 1 IO_B22
+bit 40 O 1 IO_B22 39 1 Z
+bit 39 C 1 *
+bit 38 I 1 IO_C22
+bit 37 O 1 IO_C22 36 1 Z
+bit 36 C 1 *
+bit 35 I 1 IO_E21
+bit 34 O 1 IO_E21 33 1 Z
+bit 33 C 1 *
+bit 32 I 1 IO_F21
+bit 31 O 1 IO_F21 30 1 Z
+bit 30 C 1 *
+bit 29 I 1 IO_A23
+bit 28 O 1 IO_A23 27 1 Z
+bit 27 C 1 *
+bit 26 I 1 IO_B23
+bit 25 O 1 IO_B23 24 1 Z
+bit 24 C 1 *
+bit 23 I 1 IO_C23
+bit 22 O 1 IO_C23 21 1 Z
+bit 21 C 1 *
+bit 20 O 1 *
+bit 19 O 1 *
+bit 18 O 1 *
+bit 17 O 1 *
+bit 16 O 1 *
+bit 15 O 1 *
+bit 14 O 1 *
+bit 13 O 1 *
+bit 12 O 1 *
+bit 11 O 1 *
+bit 10 O 1 *
+bit 9 O 1 *
+bit 8 O 1 *
+bit 7 O 1 *
+bit 6 O 1 *
+bit 5 I 1 IO_D22
+bit 4 O 1 IO_D22 3 1 Z
+bit 3 C 1 *
+bit 2 I 1 IO_E22
+bit 1 O 1 IO_E22 0 1 Z
+bit 0 C 1 *
--- /dev/null
+signal GND1
+signal GND2
+signal GND3
+signal GND4
+signal GND5
+signal GND6
+signal GND7
+signal GND8
+signal GND9
+signal GND10
+signal GND11
+signal GND12
+signal GND13
+signal GND14
+signal GND15
+signal GND16
+signal GND17
+signal GND18
+signal GND19
+signal GND20
+signal GND21
+signal GND22
+signal GND23
+signal GND24
+signal GND25
+signal GND26
+signal GND27
+signal GND28
+signal GND29
+signal GND30
+signal GND31
+signal GND32
+signal GND33
+signal GND34
+signal GND35
+signal GND36
+signal GND37
+signal GND38
+signal GND39
+signal GND40
+signal GND41
+signal GND42
+signal GND43
+signal GND44
+signal GND45
+signal GND46
+signal GND47
+signal GND48
+signal GND49
+signal GND50
+signal GND51
+signal GND52
+signal GND53
+signal GND54
+signal GND55
+signal GND56
+signal GND57
+signal GND58
+signal GND59
+signal GND60
+signal GND61
+signal GND62
+signal GND63
+signal GND64
+signal GND65
+signal GND66
+signal GND67
+signal GND68
+signal GND69
+signal GND70
+signal GND71
+signal GND72
+signal GND73
+signal GND74
+signal GND75
+signal GND76
+signal GND77
+signal GND78
+signal GND79
+signal GND80
+signal GND81
+signal GND82
+signal GND83
+signal GND84
+signal GND85
+signal GND86
+signal GND87
+signal GND88
+signal GND89
+signal GND90
+signal GND91
+signal GND92
+signal GND93
+signal GND94
+signal GND95
+signal GND96
+signal GND97
+signal GND98
+signal GND99
+signal GND100
+signal GND101
+signal GND102
+signal GND103
+signal GND104
+signal GND105
+signal GND106
+signal GND107
+signal GND108
+signal GND109
+signal GND110
+signal GND111
+signal GND112
+signal GND113
+signal GND114
+signal GND115
+signal GND116
+signal GND117
+signal GND118
+signal GND119
+signal GND120
+signal CCLK_AH28
+signal DONE_AJ28
+signal HSWAP_EN_A3
+signal M0_AJ3
+signal M1_AH3
+signal M2_AK3
+signal PROG_B
+signal TCK
+signal TDI
+signal TDO
+signal TMS
+signal VCCAUX1
+signal VCCAUX2
+signal VCCAUX3
+signal VCCAUX4
+signal VCCAUX5
+signal VCCAUX6
+signal VCCAUX7
+signal VCCAUX8
+signal VCCAUX9
+signal VCCAUX10
+signal VCCAUX11
+signal VCCAUX12
+signal VCCAUX13
+signal VCCAUX14
+signal VCCAUX15
+signal VCCAUX16
+signal VCCAUX17
+signal VCCAUX18
+signal VCCAUX19
+signal VCCAUX20
+signal VCCAUX21
+signal VCCAUX22
+signal VCCAUX23
+signal VCCAUX24
+signal VCCINT1
+signal VCCINT2
+signal VCCINT3
+signal VCCINT4
+signal VCCINT5
+signal VCCINT6
+signal VCCINT7
+signal VCCINT8
+signal VCCINT9
+signal VCCINT10
+signal VCCINT11
+signal VCCINT12
+signal VCCINT13
+signal VCCINT14
+signal VCCINT15
+signal VCCINT16
+signal VCCINT17
+signal VCCINT18
+signal VCCINT19
+signal VCCINT20
+signal VCCINT21
+signal VCCINT22
+signal VCCINT23
+signal VCCINT24
+signal VCCINT25
+signal VCCINT26
+signal VCCINT27
+signal VCCINT28
+signal VCCINT29
+signal VCCINT30
+signal VCCINT31
+signal VCCINT32
+signal VCCO01
+signal VCCO02
+signal VCCO03
+signal VCCO04
+signal VCCO05
+signal VCCO06
+signal VCCO07
+signal VCCO08
+signal VCCO09
+signal VCCO010
+signal VCCO11
+signal VCCO12
+signal VCCO13
+signal VCCO14
+signal VCCO15
+signal VCCO16
+signal VCCO17
+signal VCCO18
+signal VCCO19
+signal VCCO110
+signal VCCO21
+signal VCCO22
+signal VCCO23
+signal VCCO24
+signal VCCO25
+signal VCCO26
+signal VCCO27
+signal VCCO28
+signal VCCO29
+signal VCCO210
+signal VCCO31
+signal VCCO32
+signal VCCO33
+signal VCCO34
+signal VCCO35
+signal VCCO36
+signal VCCO37
+signal VCCO38
+signal VCCO39
+signal VCCO310
+signal VCCO41
+signal VCCO42
+signal VCCO43
+signal VCCO44
+signal VCCO45
+signal VCCO46
+signal VCCO47
+signal VCCO48
+signal VCCO49
+signal VCCO410
+signal VCCO51
+signal VCCO52
+signal VCCO53
+signal VCCO54
+signal VCCO55
+signal VCCO56
+signal VCCO57
+signal VCCO58
+signal VCCO59
+signal VCCO510
+signal VCCO61
+signal VCCO62
+signal VCCO63
+signal VCCO64
+signal VCCO65
+signal VCCO66
+signal VCCO67
+signal VCCO68
+signal VCCO69
+signal VCCO610
+signal VCCO71
+signal VCCO72
+signal VCCO73
+signal VCCO74
+signal VCCO75
+signal VCCO76
+signal VCCO77
+signal VCCO78
+signal VCCO79
+signal VCCO710
+signal IO_A4
+signal IO_A5
+signal IO_A7
+signal IO_A8
+signal IO_A9
+signal IO_A11
+signal IO_A12
+signal IO_A13
+signal IO_A15
+signal IO_A16
+signal IO_A18
+signal IO_A19
+signal IO_A20
+signal IO_A22
+signal IO_A23
+signal IO_A24
+signal IO_A26
+signal IO_A27
+signal IO_B4
+signal IO_B5
+signal IO_B6
+signal IO_B7
+signal IO_B8
+signal IO_B9
+signal IO_B10
+signal IO_B11
+signal IO_B12
+signal IO_B13
+signal IO_B14
+signal IO_B15
+signal IO_B16
+signal IO_B17
+signal IO_B18
+signal IO_B19
+signal IO_B20
+signal IO_B21
+signal IO_B22
+signal IO_B23
+signal IO_B24
+signal IO_B25
+signal IO_B26
+signal IO_B27
+signal IO_C1
+signal IO_C2
+signal IO_C4
+signal IO_C6
+signal IO_C7
+signal IO_C8
+signal IO_C10
+signal IO_C11
+signal IO_C12
+signal IO_C14
+signal IO_C15
+signal IO_C16
+signal IO_C17
+signal IO_C19
+signal IO_C20
+signal IO_C21
+signal IO_C23
+signal IO_C24
+signal IO_C25
+signal IO_C27
+signal IO_C29
+signal IO_C30
+signal IO_D1
+signal IO_D2
+signal IO_D3
+signal IO_D4
+signal IO_D5
+signal IO_D7
+signal IO_D8
+signal IO_D9
+signal IO_D11
+signal IO_D12
+signal IO_D13
+signal IO_D15
+signal IO_D16
+signal IO_D18
+signal IO_D19
+signal IO_D20
+signal IO_D22
+signal IO_D23
+signal IO_D24
+signal IO_D26
+signal IO_D27
+signal IO_D28
+signal IO_D29
+signal IO_D30
+signal IO_E1
+signal IO_E2
+signal IO_E4
+signal IO_E6
+signal IO_E8
+signal IO_E9
+signal IO_E11
+signal IO_E12
+signal IO_E13
+signal IO_E15
+signal IO_E16
+signal IO_E18
+signal IO_E19
+signal IO_E20
+signal IO_E22
+signal IO_E23
+signal IO_E25
+signal IO_E27
+signal IO_E29
+signal IO_E30
+signal IO_F2
+signal IO_F3
+signal IO_F5
+signal IO_F6
+signal IO_F7
+signal IO_F8
+signal IO_F9
+signal IO_F10
+signal IO_F11
+signal IO_F12
+signal IO_F13
+signal IO_F14
+signal IO_F15
+signal IO_F16
+signal IO_F17
+signal IO_F18
+signal IO_F19
+signal IO_F20
+signal IO_F21
+signal IO_F22
+signal IO_F23
+signal IO_F24
+signal IO_F25
+signal IO_F26
+signal IO_F28
+signal IO_F29
+signal IO_G1
+signal IO_G2
+signal IO_G3
+signal IO_G4
+signal IO_G6
+signal IO_G7
+signal IO_G8
+signal IO_G10
+signal IO_G11
+signal IO_G12
+signal IO_G14
+signal IO_G15
+signal IO_G16
+signal IO_G17
+signal IO_G19
+signal IO_G20
+signal IO_G21
+signal IO_G23
+signal IO_G24
+signal IO_G25
+signal IO_G27
+signal IO_G28
+signal IO_G29
+signal IO_G30
+signal IO_H1
+signal IO_H2
+signal IO_H3
+signal IO_H4
+signal IO_H5
+signal IO_H6
+signal IO_H7
+signal IO_H8
+signal IO_H9
+signal IO_H11
+signal IO_H12
+signal IO_H13
+signal IO_H15
+signal IO_H16
+signal IO_H18
+signal IO_H19
+signal IO_H20
+signal IO_H22
+signal IO_H23
+signal IO_H24
+signal IO_H25
+signal IO_H26
+signal IO_H27
+signal IO_H28
+signal IO_H29
+signal IO_H30
+signal IO_J1
+signal IO_J2
+signal IO_J4
+signal IO_J5
+signal IO_J6
+signal IO_J8
+signal IO_J9
+signal IO_J10
+signal IO_J12
+signal IO_J13
+signal IO_J14
+signal IO_J15
+signal IO_J16
+signal IO_J17
+signal IO_J18
+signal IO_J19
+signal IO_J21
+signal IO_J22
+signal IO_J23
+signal IO_J25
+signal IO_J26
+signal IO_J27
+signal IO_J29
+signal IO_J30
+signal IO_K2
+signal IO_K3
+signal IO_K6
+signal IO_K7
+signal IO_K9
+signal IO_K10
+signal IO_K11
+signal IO_K12
+signal IO_K13
+signal IO_K14
+signal IO_K15
+signal IO_K16
+signal IO_K17
+signal IO_K18
+signal IO_K19
+signal IO_K20
+signal IO_K21
+signal IO_K22
+signal IO_K24
+signal IO_K25
+signal IO_K28
+signal IO_K29
+signal IO_L1
+signal IO_L2
+signal IO_L3
+signal IO_L4
+signal IO_L5
+signal IO_L6
+signal IO_L7
+signal IO_L8
+signal IO_L10
+signal IO_L21
+signal IO_L23
+signal IO_L24
+signal IO_L25
+signal IO_L26
+signal IO_L27
+signal IO_L28
+signal IO_L29
+signal IO_L30
+signal IO_M1
+signal IO_M2
+signal IO_M3
+signal IO_M4
+signal IO_M5
+signal IO_M6
+signal IO_M7
+signal IO_M8
+signal IO_M9
+signal IO_M10
+signal IO_M21
+signal IO_M22
+signal IO_M23
+signal IO_M24
+signal IO_M25
+signal IO_M26
+signal IO_M27
+signal IO_M28
+signal IO_M29
+signal IO_M30
+signal IO_N1
+signal IO_N2
+signal IO_N4
+signal IO_N5
+signal IO_N6
+signal IO_N8
+signal IO_N9
+signal IO_N10
+signal IO_N21
+signal IO_N22
+signal IO_N23
+signal IO_N25
+signal IO_N26
+signal IO_N27
+signal IO_N29
+signal IO_N30
+signal IO_P2
+signal IO_P3
+signal IO_P6
+signal IO_P7
+signal IO_P9
+signal IO_P10
+signal IO_P21
+signal IO_P22
+signal IO_P24
+signal IO_P25
+signal IO_P28
+signal IO_P29
+signal IO_R1
+signal IO_R2
+signal IO_R3
+signal IO_R4
+signal IO_R5
+signal IO_R6
+signal IO_R7
+signal IO_R8
+signal IO_R9
+signal IO_R10
+signal IO_R21
+signal IO_R22
+signal IO_R23
+signal IO_R24
+signal IO_R25
+signal IO_R26
+signal IO_R27
+signal IO_R28
+signal IO_R29
+signal IO_R30
+signal IO_T1
+signal IO_T2
+signal IO_T3
+signal IO_T4
+signal IO_T5
+signal IO_T6
+signal IO_T7
+signal IO_T8
+signal IO_T9
+signal IO_T10
+signal IO_T21
+signal IO_T22
+signal IO_T23
+signal IO_T24
+signal IO_T25
+signal IO_T26
+signal IO_T27
+signal IO_T28
+signal IO_T29
+signal IO_T30
+signal IO_U2
+signal IO_U3
+signal IO_U6
+signal IO_U7
+signal IO_U9
+signal IO_U10
+signal IO_U21
+signal IO_U22
+signal IO_U24
+signal IO_U25
+signal IO_U28
+signal IO_U29
+signal IO_V1
+signal IO_V2
+signal IO_V4
+signal IO_V5
+signal IO_V6
+signal IO_V8
+signal IO_V9
+signal IO_V10
+signal IO_V21
+signal IO_V22
+signal IO_V23
+signal IO_V25
+signal IO_V26
+signal IO_V27
+signal IO_V29
+signal IO_V30
+signal IO_W1
+signal IO_W2
+signal IO_W3
+signal IO_W4
+signal IO_W5
+signal IO_W6
+signal IO_W7
+signal IO_W8
+signal IO_W9
+signal IO_W10
+signal IO_W21
+signal IO_W22
+signal IO_W23
+signal IO_W24
+signal IO_W25
+signal IO_W26
+signal IO_W27
+signal IO_W28
+signal IO_W29
+signal IO_W30
+signal IO_Y1
+signal IO_Y2
+signal IO_Y3
+signal IO_Y4
+signal IO_Y5
+signal IO_Y6
+signal IO_Y7
+signal IO_Y8
+signal IO_Y10
+signal IO_Y21
+signal IO_Y23
+signal IO_Y24
+signal IO_Y25
+signal IO_Y26
+signal IO_Y27
+signal IO_Y28
+signal IO_Y29
+signal IO_Y30
+signal IO_AA2
+signal IO_AA3
+signal IO_AA6
+signal IO_AA7
+signal IO_AA9
+signal IO_AA10
+signal IO_AA11
+signal IO_AA12
+signal IO_AA13
+signal IO_AA14
+signal IO_AA15
+signal IO_AA16
+signal IO_AA17
+signal IO_AA18
+signal IO_AA19
+signal IO_AA20
+signal IO_AA21
+signal IO_AA22
+signal IO_AA24
+signal IO_AA25
+signal IO_AA28
+signal IO_AA29
+signal IO_AB1
+signal IO_AB2
+signal IO_AB4
+signal IO_AB5
+signal IO_AB6
+signal IO_AB8
+signal IO_AB9
+signal IO_AB10
+signal IO_AB12
+signal IO_AB13
+signal IO_AB14
+signal IO_AB15
+signal IO_AB16
+signal IO_AB17
+signal IO_AB18
+signal IO_AB19
+signal IO_AB21
+signal IO_AB22
+signal IO_AB23
+signal IO_AB25
+signal IO_AB26
+signal IO_AB27
+signal IO_AB29
+signal IO_AB30
+signal IO_AC1
+signal IO_AC2
+signal IO_AC3
+signal IO_AC4
+signal IO_AC5
+signal IO_AC6
+signal IO_AC7
+signal IO_AC8
+signal IO_AC9
+signal IO_AC11
+signal IO_AC12
+signal IO_AC13
+signal IO_AC15
+signal IO_AC16
+signal IO_AC18
+signal IO_AC19
+signal IO_AC20
+signal IO_AC22
+signal IO_AC23
+signal IO_AC24
+signal IO_AC25
+signal IO_AC26
+signal IO_AC27
+signal IO_AC28
+signal IO_AC29
+signal IO_AC30
+signal IO_AD1
+signal IO_AD2
+signal IO_AD3
+signal IO_AD4
+signal IO_AD6
+signal IO_AD7
+signal IO_AD8
+signal IO_AD10
+signal IO_AD11
+signal IO_AD12
+signal IO_AD14
+signal IO_AD15
+signal IO_AD16
+signal IO_AD17
+signal IO_AD19
+signal IO_AD20
+signal IO_AD21
+signal IO_AD23
+signal IO_AD24
+signal IO_AD25
+signal IO_AD27
+signal IO_AD28
+signal IO_AD29
+signal IO_AD30
+signal IO_AE2
+signal IO_AE3
+signal IO_AE5
+signal IO_AE6
+signal IO_AE7
+signal IO_AE8
+signal IO_AE9
+signal IO_AE10
+signal IO_AE11
+signal IO_AE12
+signal IO_AE13
+signal IO_AE14
+signal IO_AE15
+signal IO_AE16
+signal IO_AE17
+signal IO_AE18
+signal IO_AE19
+signal IO_AE20
+signal IO_AE21
+signal IO_AE22
+signal IO_AE23
+signal IO_AE24
+signal IO_AE25
+signal IO_AE26
+signal IO_AE28
+signal IO_AE29
+signal IO_AF1
+signal IO_AF2
+signal IO_AF4
+signal IO_AF6
+signal IO_AF8
+signal IO_AF9
+signal IO_AF11
+signal IO_AF12
+signal IO_AF13
+signal IO_AF15
+signal IO_AF16
+signal IO_AF18
+signal IO_AF19
+signal IO_AF20
+signal IO_AF22
+signal IO_AF23
+signal IO_AF25
+signal IO_AF27
+signal IO_AF29
+signal IO_AF30
+signal IO_AG1
+signal IO_AG2
+signal IO_AG3
+signal IO_AG4
+signal IO_AG5
+signal IO_AG7
+signal IO_AG8
+signal IO_AG9
+signal IO_AG11
+signal IO_AG12
+signal IO_AG13
+signal IO_AG15
+signal IO_AG16
+signal IO_AG18
+signal IO_AG19
+signal IO_AG20
+signal IO_AG22
+signal IO_AG23
+signal IO_AG24
+signal IO_AG26
+signal IO_AG27
+signal IO_AG28
+signal IO_AG29
+signal IO_AG30
+signal IO_AH1
+signal IO_AH2
+signal IO_AH4
+signal IO_AH6
+signal IO_AH7
+signal IO_AH8
+signal IO_AH10
+signal IO_AH11
+signal IO_AH12
+signal IO_AH14
+signal IO_AH15
+signal IO_AH16
+signal IO_AH17
+signal IO_AH19
+signal IO_AH20
+signal IO_AH21
+signal IO_AH23
+signal IO_AH24
+signal IO_AH25
+signal IO_AH27
+signal IO_AH29
+signal IO_AH30
+signal IO_AJ4
+signal IO_AJ5
+signal IO_AJ6
+signal IO_AJ7
+signal IO_AJ8
+signal IO_AJ9
+signal IO_AJ10
+signal IO_AJ11
+signal IO_AJ12
+signal IO_AJ13
+signal IO_AJ14
+signal IO_AJ15
+signal IO_AJ16
+signal IO_AJ17
+signal IO_AJ18
+signal IO_AJ19
+signal IO_AJ20
+signal IO_AJ21
+signal IO_AJ22
+signal IO_AJ23
+signal IO_AJ24
+signal IO_AJ25
+signal IO_AJ26
+signal IO_AJ27
+signal IO_AK4
+signal IO_AK5
+signal IO_AK7
+signal IO_AK8
+signal IO_AK9
+signal IO_AK11
+signal IO_AK12
+signal IO_AK13
+signal IO_AK15
+signal IO_AK16
+signal IO_AK18
+signal IO_AK19
+signal IO_AK20
+signal IO_AK22
+signal IO_AK23
+signal IO_AK24
+signal IO_AK26
+signal IO_AK27
+
+register BSR 2243
+register BR 1
+register DIR 32
+
+instruction length 6
+
+instruction EXTEST 000000 BSR
+instruction SAMPLE/PRELOAD 000001 BSR
+instruction IDCODE 001001 DIR
+instruction BYPASS 111111 BR
+
+bit 2242 I 1 IO_C29
+bit 2241 O 1 IO_C29 2240 1 Z
+bit 2240 C 1 *
+bit 2239 I 1 IO_C30
+bit 2238 O 1 IO_C30 2237 1 Z
+bit 2237 C 1 *
+bit 2236 I 1 IO_D27
+bit 2235 O 1 IO_D27 2234 1 Z
+bit 2234 C 1 *
+bit 2233 I 1 IO_D28
+bit 2232 O 1 IO_D28 2231 1 Z
+bit 2231 C 1 *
+bit 2230 I 1 IO_D29
+bit 2229 O 1 IO_D29 2228 1 Z
+bit 2228 C 1 *
+bit 2227 I 1 IO_D30
+bit 2226 O 1 IO_D30 2225 1 Z
+bit 2225 C 1 *
+bit 2224 I 1 IO_E29
+bit 2223 O 1 IO_E29 2222 1 Z
+bit 2222 C 1 *
+bit 2221 I 1 IO_E30
+bit 2220 O 1 IO_E30 2219 1 Z
+bit 2219 C 1 *
+bit 2218 I 1 IO_E27
+bit 2217 O 1 IO_E27 2216 1 Z
+bit 2216 C 1 *
+bit 2215 I 1 IO_F26
+bit 2214 O 1 IO_F26 2213 1 Z
+bit 2213 C 1 *
+bit 2212 I 1 IO_F28
+bit 2211 O 1 IO_F28 2210 1 Z
+bit 2210 C 1 *
+bit 2209 I 1 IO_F29
+bit 2208 O 1 IO_F29 2207 1 Z
+bit 2207 C 1 *
+bit 2206 O 1 *
+bit 2205 O 1 *
+bit 2204 O 1 *
+bit 2203 O 1 *
+bit 2202 O 1 *
+bit 2201 O 1 *
+bit 2200 O 1 *
+bit 2199 O 1 *
+bit 2198 O 1 *
+bit 2197 O 1 *
+bit 2196 O 1 *
+bit 2195 O 1 *
+bit 2194 I 1 IO_G27
+bit 2193 O 1 IO_G27 2192 1 Z
+bit 2192 C 1 *
+bit 2191 I 1 IO_G28
+bit 2190 O 1 IO_G28 2189 1 Z
+bit 2189 C 1 *
+bit 2188 I 1 IO_G29
+bit 2187 O 1 IO_G29 2186 1 Z
+bit 2186 C 1 *
+bit 2185 I 1 IO_G30
+bit 2184 O 1 IO_G30 2183 1 Z
+bit 2183 C 1 *
+bit 2182 I 1 IO_G25
+bit 2181 O 1 IO_G25 2180 1 Z
+bit 2180 C 1 *
+bit 2179 I 1 IO_H24
+bit 2178 O 1 IO_H24 2177 1 Z
+bit 2177 C 1 *
+bit 2176 I 1 IO_H25
+bit 2175 O 1 IO_H25 2174 1 Z
+bit 2174 C 1 *
+bit 2173 I 1 IO_H26
+bit 2172 O 1 IO_H26 2171 1 Z
+bit 2171 C 1 *
+bit 2170 I 1 IO_H27
+bit 2169 O 1 IO_H27 2168 1 Z
+bit 2168 C 1 *
+bit 2167 I 1 IO_H28
+bit 2166 O 1 IO_H28 2165 1 Z
+bit 2165 C 1 *
+bit 2164 O 1 *
+bit 2163 O 1 *
+bit 2162 O 1 *
+bit 2161 I 1 IO_J25
+bit 2160 O 1 IO_J25 2159 1 Z
+bit 2159 C 1 *
+bit 2158 I 1 IO_H29
+bit 2157 O 1 IO_H29 2156 1 Z
+bit 2156 C 1 *
+bit 2155 I 1 IO_H30
+bit 2154 O 1 IO_H30 2153 1 Z
+bit 2153 C 1 *
+bit 2152 I 1 IO_J26
+bit 2151 O 1 IO_J26 2150 1 Z
+bit 2150 C 1 *
+bit 2149 I 1 IO_J27
+bit 2148 O 1 IO_J27 2147 1 Z
+bit 2147 C 1 *
+bit 2146 I 1 IO_J29
+bit 2145 O 1 IO_J29 2144 1 Z
+bit 2144 C 1 *
+bit 2143 I 1 IO_J30
+bit 2142 O 1 IO_J30 2141 1 Z
+bit 2141 C 1 *
+bit 2140 I 1 IO_J23
+bit 2139 O 1 IO_J23 2138 1 Z
+bit 2138 C 1 *
+bit 2137 I 1 IO_K22
+bit 2136 O 1 IO_K22 2135 1 Z
+bit 2135 C 1 *
+bit 2134 I 1 IO_K24
+bit 2133 O 1 IO_K24 2132 1 Z
+bit 2132 C 1 *
+bit 2131 I 1 IO_K25
+bit 2130 O 1 IO_K25 2129 1 Z
+bit 2129 C 1 *
+bit 2128 O 1 *
+bit 2127 O 1 *
+bit 2126 O 1 *
+bit 2125 O 1 *
+bit 2124 O 1 *
+bit 2123 O 1 *
+bit 2122 I 1 IO_K28
+bit 2121 O 1 IO_K28 2120 1 Z
+bit 2120 C 1 *
+bit 2119 I 1 IO_K29
+bit 2118 O 1 IO_K29 2117 1 Z
+bit 2117 C 1 *
+bit 2116 I 1 IO_K21
+bit 2115 O 1 IO_K21 2114 1 Z
+bit 2114 C 1 *
+bit 2113 I 1 IO_L21
+bit 2112 O 1 IO_L21 2111 1 Z
+bit 2111 C 1 *
+bit 2110 I 1 IO_L23
+bit 2109 O 1 IO_L23 2108 1 Z
+bit 2108 C 1 *
+bit 2107 I 1 IO_L24
+bit 2106 O 1 IO_L24 2105 1 Z
+bit 2105 C 1 *
+bit 2104 I 1 IO_L25
+bit 2103 O 1 IO_L25 2102 1 Z
+bit 2102 C 1 *
+bit 2101 I 1 IO_L26
+bit 2100 O 1 IO_L26 2099 1 Z
+bit 2099 C 1 *
+bit 2098 I 1 IO_L27
+bit 2097 O 1 IO_L27 2096 1 Z
+bit 2096 C 1 *
+bit 2095 I 1 IO_L28
+bit 2094 O 1 IO_L28 2093 1 Z
+bit 2093 C 1 *
+bit 2092 O 1 *
+bit 2091 O 1 *
+bit 2090 O 1 *
+bit 2089 O 1 *
+bit 2088 O 1 *
+bit 2087 O 1 *
+bit 2086 I 1 IO_L29
+bit 2085 O 1 IO_L29 2084 1 Z
+bit 2084 C 1 *
+bit 2083 I 1 IO_L30
+bit 2082 O 1 IO_L30 2081 1 Z
+bit 2081 C 1 *
+bit 2080 I 1 IO_M22
+bit 2079 O 1 IO_M22 2078 1 Z
+bit 2078 C 1 *
+bit 2077 I 1 IO_M23
+bit 2076 O 1 IO_M23 2075 1 Z
+bit 2075 C 1 *
+bit 2074 I 1 IO_M24
+bit 2073 O 1 IO_M24 2072 1 Z
+bit 2072 C 1 *
+bit 2071 I 1 IO_M25
+bit 2070 O 1 IO_M25 2069 1 Z
+bit 2069 C 1 *
+bit 2068 I 1 IO_M27
+bit 2067 O 1 IO_M27 2066 1 Z
+bit 2066 C 1 *
+bit 2065 I 1 IO_M28
+bit 2064 O 1 IO_M28 2063 1 Z
+bit 2063 C 1 *
+bit 2062 O 1 *
+bit 2061 O 1 *
+bit 2060 O 1 *
+bit 2059 O 1 *
+bit 2058 O 1 *
+bit 2057 O 1 *
+bit 2056 I 1 IO_M29
+bit 2055 O 1 IO_M29 2054 1 Z
+bit 2054 C 1 *
+bit 2053 I 1 IO_M30
+bit 2052 O 1 IO_M30 2051 1 Z
+bit 2051 C 1 *
+bit 2050 I 1 IO_M21
+bit 2049 O 1 IO_M21 2048 1 Z
+bit 2048 C 1 *
+bit 2047 I 1 IO_N21
+bit 2046 O 1 IO_N21 2045 1 Z
+bit 2045 C 1 *
+bit 2044 I 1 IO_N22
+bit 2043 O 1 IO_N22 2042 1 Z
+bit 2042 C 1 *
+bit 2041 I 1 IO_N23
+bit 2040 O 1 IO_N23 2039 1 Z
+bit 2039 C 1 *
+bit 2038 I 1 IO_M26
+bit 2037 O 1 IO_M26 2036 1 Z
+bit 2036 C 1 *
+bit 2035 I 1 IO_N25
+bit 2034 O 1 IO_N25 2033 1 Z
+bit 2033 C 1 *
+bit 2032 I 1 IO_N26
+bit 2031 O 1 IO_N26 2030 1 Z
+bit 2030 C 1 *
+bit 2029 I 1 IO_N27
+bit 2028 O 1 IO_N27 2027 1 Z
+bit 2027 C 1 *
+bit 2026 O 1 *
+bit 2025 O 1 *
+bit 2024 O 1 *
+bit 2023 O 1 *
+bit 2022 O 1 *
+bit 2021 O 1 *
+bit 2020 I 1 IO_N29
+bit 2019 O 1 IO_N29 2018 1 Z
+bit 2018 C 1 *
+bit 2017 I 1 IO_N30
+bit 2016 O 1 IO_N30 2015 1 Z
+bit 2015 C 1 *
+bit 2014 I 1 IO_P21
+bit 2013 O 1 IO_P21 2012 1 Z
+bit 2012 C 1 *
+bit 2011 I 1 IO_P22
+bit 2010 O 1 IO_P22 2009 1 Z
+bit 2009 C 1 *
+bit 2008 I 1 IO_P24
+bit 2007 O 1 IO_P24 2006 1 Z
+bit 2006 C 1 *
+bit 2005 I 1 IO_P25
+bit 2004 O 1 IO_P25 2003 1 Z
+bit 2003 C 1 *
+bit 2002 I 1 IO_P28
+bit 2001 O 1 IO_P28 2000 1 Z
+bit 2000 C 1 *
+bit 1999 I 1 IO_P29
+bit 1998 O 1 IO_P29 1997 1 Z
+bit 1997 C 1 *
+bit 1996 I 1 IO_R21
+bit 1995 O 1 IO_R21 1994 1 Z
+bit 1994 C 1 *
+bit 1993 I 1 IO_R22
+bit 1992 O 1 IO_R22 1991 1 Z
+bit 1991 C 1 *
+bit 1990 O 1 *
+bit 1989 O 1 *
+bit 1988 O 1 *
+bit 1987 O 1 *
+bit 1986 O 1 *
+bit 1985 O 1 *
+bit 1984 O 1 *
+bit 1983 O 1 *
+bit 1982 O 1 *
+bit 1981 O 1 *
+bit 1980 O 1 *
+bit 1979 O 1 *
+bit 1978 I 1 IO_R23
+bit 1977 O 1 IO_R23 1976 1 Z
+bit 1976 C 1 *
+bit 1975 I 1 IO_R24
+bit 1974 O 1 IO_R24 1973 1 Z
+bit 1973 C 1 *
+bit 1972 I 1 IO_R25
+bit 1971 O 1 IO_R25 1970 1 Z
+bit 1970 C 1 *
+bit 1969 I 1 IO_R26
+bit 1968 O 1 IO_R26 1967 1 Z
+bit 1967 C 1 *
+bit 1966 I 1 IO_R27
+bit 1965 O 1 IO_R27 1964 1 Z
+bit 1964 C 1 *
+bit 1963 I 1 IO_R28
+bit 1962 O 1 IO_R28 1961 1 Z
+bit 1961 C 1 *
+bit 1960 I 1 IO_R29
+bit 1959 O 1 IO_R29 1958 1 Z
+bit 1958 C 1 *
+bit 1957 I 1 IO_R30
+bit 1956 O 1 IO_R30 1955 1 Z
+bit 1955 C 1 *
+bit 1954 I 1 IO_T30
+bit 1953 O 1 IO_T30 1952 1 Z
+bit 1952 C 1 *
+bit 1951 I 1 IO_T29
+bit 1950 O 1 IO_T29 1949 1 Z
+bit 1949 C 1 *
+bit 1948 I 1 IO_T28
+bit 1947 O 1 IO_T28 1946 1 Z
+bit 1946 C 1 *
+bit 1945 I 1 IO_T27
+bit 1944 O 1 IO_T27 1943 1 Z
+bit 1943 C 1 *
+bit 1942 I 1 IO_T26
+bit 1941 O 1 IO_T26 1940 1 Z
+bit 1940 C 1 *
+bit 1939 I 1 IO_T25
+bit 1938 O 1 IO_T25 1937 1 Z
+bit 1937 C 1 *
+bit 1936 I 1 IO_T24
+bit 1935 O 1 IO_T24 1934 1 Z
+bit 1934 C 1 *
+bit 1933 I 1 IO_T23
+bit 1932 O 1 IO_T23 1931 1 Z
+bit 1931 C 1 *
+bit 1930 O 1 *
+bit 1929 O 1 *
+bit 1928 O 1 *
+bit 1927 O 1 *
+bit 1926 O 1 *
+bit 1925 O 1 *
+bit 1924 O 1 *
+bit 1923 O 1 *
+bit 1922 O 1 *
+bit 1921 O 1 *
+bit 1920 O 1 *
+bit 1919 O 1 *
+bit 1918 I 1 IO_T22
+bit 1917 O 1 IO_T22 1916 1 Z
+bit 1916 C 1 *
+bit 1915 I 1 IO_T21
+bit 1914 O 1 IO_T21 1913 1 Z
+bit 1913 C 1 *
+bit 1912 I 1 IO_U29
+bit 1911 O 1 IO_U29 1910 1 Z
+bit 1910 C 1 *
+bit 1909 I 1 IO_U28
+bit 1908 O 1 IO_U28 1907 1 Z
+bit 1907 C 1 *
+bit 1906 I 1 IO_U25
+bit 1905 O 1 IO_U25 1904 1 Z
+bit 1904 C 1 *
+bit 1903 I 1 IO_U24
+bit 1902 O 1 IO_U24 1901 1 Z
+bit 1901 C 1 *
+bit 1900 I 1 IO_U22
+bit 1899 O 1 IO_U22 1898 1 Z
+bit 1898 C 1 *
+bit 1897 I 1 IO_U21
+bit 1896 O 1 IO_U21 1895 1 Z
+bit 1895 C 1 *
+bit 1894 I 1 IO_V30
+bit 1893 O 1 IO_V30 1892 1 Z
+bit 1892 C 1 *
+bit 1891 I 1 IO_V29
+bit 1890 O 1 IO_V29 1889 1 Z
+bit 1889 C 1 *
+bit 1888 O 1 *
+bit 1887 O 1 *
+bit 1886 O 1 *
+bit 1885 O 1 *
+bit 1884 O 1 *
+bit 1883 O 1 *
+bit 1882 I 1 IO_V27
+bit 1881 O 1 IO_V27 1880 1 Z
+bit 1880 C 1 *
+bit 1879 I 1 IO_V26
+bit 1878 O 1 IO_V26 1877 1 Z
+bit 1877 C 1 *
+bit 1876 I 1 IO_V25
+bit 1875 O 1 IO_V25 1874 1 Z
+bit 1874 C 1 *
+bit 1873 I 1 IO_W26
+bit 1872 O 1 IO_W26 1871 1 Z
+bit 1871 C 1 *
+bit 1870 I 1 IO_V23
+bit 1869 O 1 IO_V23 1868 1 Z
+bit 1868 C 1 *
+bit 1867 I 1 IO_V22
+bit 1866 O 1 IO_V22 1865 1 Z
+bit 1865 C 1 *
+bit 1864 I 1 IO_V21
+bit 1863 O 1 IO_V21 1862 1 Z
+bit 1862 C 1 *
+bit 1861 I 1 IO_W21
+bit 1860 O 1 IO_W21 1859 1 Z
+bit 1859 C 1 *
+bit 1858 I 1 IO_W30
+bit 1857 O 1 IO_W30 1856 1 Z
+bit 1856 C 1 *
+bit 1855 I 1 IO_W29
+bit 1854 O 1 IO_W29 1853 1 Z
+bit 1853 C 1 *
+bit 1852 O 1 *
+bit 1851 O 1 *
+bit 1850 O 1 *
+bit 1849 O 1 *
+bit 1848 O 1 *
+bit 1847 O 1 *
+bit 1846 I 1 IO_W28
+bit 1845 O 1 IO_W28 1844 1 Z
+bit 1844 C 1 *
+bit 1843 I 1 IO_W27
+bit 1842 O 1 IO_W27 1841 1 Z
+bit 1841 C 1 *
+bit 1840 I 1 IO_W25
+bit 1839 O 1 IO_W25 1838 1 Z
+bit 1838 C 1 *
+bit 1837 I 1 IO_W24
+bit 1836 O 1 IO_W24 1835 1 Z
+bit 1835 C 1 *
+bit 1834 I 1 IO_W23
+bit 1833 O 1 IO_W23 1832 1 Z
+bit 1832 C 1 *
+bit 1831 I 1 IO_W22
+bit 1830 O 1 IO_W22 1829 1 Z
+bit 1829 C 1 *
+bit 1828 I 1 IO_Y30
+bit 1827 O 1 IO_Y30 1826 1 Z
+bit 1826 C 1 *
+bit 1825 I 1 IO_Y29
+bit 1824 O 1 IO_Y29 1823 1 Z
+bit 1823 C 1 *
+bit 1822 O 1 *
+bit 1821 O 1 *
+bit 1820 O 1 *
+bit 1819 O 1 *
+bit 1818 O 1 *
+bit 1817 O 1 *
+bit 1816 I 1 IO_Y28
+bit 1815 O 1 IO_Y28 1814 1 Z
+bit 1814 C 1 *
+bit 1813 I 1 IO_Y27
+bit 1812 O 1 IO_Y27 1811 1 Z
+bit 1811 C 1 *
+bit 1810 I 1 IO_Y26
+bit 1809 O 1 IO_Y26 1808 1 Z
+bit 1808 C 1 *
+bit 1807 I 1 IO_Y25
+bit 1806 O 1 IO_Y25 1805 1 Z
+bit 1805 C 1 *
+bit 1804 I 1 IO_Y24
+bit 1803 O 1 IO_Y24 1802 1 Z
+bit 1802 C 1 *
+bit 1801 I 1 IO_Y23
+bit 1800 O 1 IO_Y23 1799 1 Z
+bit 1799 C 1 *
+bit 1798 I 1 IO_Y21
+bit 1797 O 1 IO_Y21 1796 1 Z
+bit 1796 C 1 *
+bit 1795 I 1 IO_AA21
+bit 1794 O 1 IO_AA21 1793 1 Z
+bit 1793 C 1 *
+bit 1792 I 1 IO_AA29
+bit 1791 O 1 IO_AA29 1790 1 Z
+bit 1790 C 1 *
+bit 1789 I 1 IO_AA28
+bit 1788 O 1 IO_AA28 1787 1 Z
+bit 1787 C 1 *
+bit 1786 O 1 *
+bit 1785 O 1 *
+bit 1784 O 1 *
+bit 1783 O 1 *
+bit 1782 O 1 *
+bit 1781 O 1 *
+bit 1780 I 1 IO_AA25
+bit 1779 O 1 IO_AA25 1778 1 Z
+bit 1778 C 1 *
+bit 1777 I 1 IO_AA24
+bit 1776 O 1 IO_AA24 1775 1 Z
+bit 1775 C 1 *
+bit 1774 I 1 IO_AA22
+bit 1773 O 1 IO_AA22 1772 1 Z
+bit 1772 C 1 *
+bit 1771 I 1 IO_AB23
+bit 1770 O 1 IO_AB23 1769 1 Z
+bit 1769 C 1 *
+bit 1768 I 1 IO_AB30
+bit 1767 O 1 IO_AB30 1766 1 Z
+bit 1766 C 1 *
+bit 1765 I 1 IO_AB29
+bit 1764 O 1 IO_AB29 1763 1 Z
+bit 1763 C 1 *
+bit 1762 I 1 IO_AB27
+bit 1761 O 1 IO_AB27 1760 1 Z
+bit 1760 C 1 *
+bit 1759 I 1 IO_AB26
+bit 1758 O 1 IO_AB26 1757 1 Z
+bit 1757 C 1 *
+bit 1756 I 1 IO_AC30
+bit 1755 O 1 IO_AC30 1754 1 Z
+bit 1754 C 1 *
+bit 1753 I 1 IO_AC29
+bit 1752 O 1 IO_AC29 1751 1 Z
+bit 1751 C 1 *
+bit 1750 I 1 IO_AB25
+bit 1749 O 1 IO_AB25 1748 1 Z
+bit 1748 C 1 *
+bit 1747 O 1 *
+bit 1746 O 1 *
+bit 1745 O 1 *
+bit 1744 I 1 IO_AC28
+bit 1743 O 1 IO_AC28 1742 1 Z
+bit 1742 C 1 *
+bit 1741 I 1 IO_AC27
+bit 1740 O 1 IO_AC27 1739 1 Z
+bit 1739 C 1 *
+bit 1738 I 1 IO_AC26
+bit 1737 O 1 IO_AC26 1736 1 Z
+bit 1736 C 1 *
+bit 1735 I 1 IO_AC25
+bit 1734 O 1 IO_AC25 1733 1 Z
+bit 1733 C 1 *
+bit 1732 I 1 IO_AC24
+bit 1731 O 1 IO_AC24 1730 1 Z
+bit 1730 C 1 *
+bit 1729 I 1 IO_AD25
+bit 1728 O 1 IO_AD25 1727 1 Z
+bit 1727 C 1 *
+bit 1726 I 1 IO_AD30
+bit 1725 O 1 IO_AD30 1724 1 Z
+bit 1724 C 1 *
+bit 1723 I 1 IO_AD29
+bit 1722 O 1 IO_AD29 1721 1 Z
+bit 1721 C 1 *
+bit 1720 I 1 IO_AD28
+bit 1719 O 1 IO_AD28 1718 1 Z
+bit 1718 C 1 *
+bit 1717 I 1 IO_AD27
+bit 1716 O 1 IO_AD27 1715 1 Z
+bit 1715 C 1 *
+bit 1714 O 1 *
+bit 1713 O 1 *
+bit 1712 O 1 *
+bit 1711 O 1 *
+bit 1710 O 1 *
+bit 1709 O 1 *
+bit 1708 O 1 *
+bit 1707 O 1 *
+bit 1706 O 1 *
+bit 1705 O 1 *
+bit 1704 O 1 *
+bit 1703 O 1 *
+bit 1702 I 1 IO_AE29
+bit 1701 O 1 IO_AE29 1700 1 Z
+bit 1700 C 1 *
+bit 1699 I 1 IO_AE28
+bit 1698 O 1 IO_AE28 1697 1 Z
+bit 1697 C 1 *
+bit 1696 I 1 IO_AE26
+bit 1695 O 1 IO_AE26 1694 1 Z
+bit 1694 C 1 *
+bit 1693 I 1 IO_AF27
+bit 1692 O 1 IO_AF27 1691 1 Z
+bit 1691 C 1 *
+bit 1690 I 1 IO_AF30
+bit 1689 O 1 IO_AF30 1688 1 Z
+bit 1688 C 1 *
+bit 1687 I 1 IO_AF29
+bit 1686 O 1 IO_AF29 1685 1 Z
+bit 1685 C 1 *
+bit 1684 I 1 IO_AG30
+bit 1683 O 1 IO_AG30 1682 1 Z
+bit 1682 C 1 *
+bit 1681 I 1 IO_AG29
+bit 1680 O 1 IO_AG29 1679 1 Z
+bit 1679 C 1 *
+bit 1678 I 1 IO_AG28
+bit 1677 O 1 IO_AG28 1676 1 Z
+bit 1676 C 1 *
+bit 1675 I 1 IO_AG27
+bit 1674 O 1 IO_AG27 1673 1 Z
+bit 1673 C 1 *
+bit 1672 I 1 IO_AH30
+bit 1671 O 1 IO_AH30 1670 1 Z
+bit 1670 C 1 *
+bit 1669 I 1 IO_AH29
+bit 1668 O 1 IO_AH29 1667 1 Z
+bit 1667 C 1 *
+bit 1666 I 1 CCLK_AH28
+bit 1665 O 1 CCLK_AH28 1664 1 Z
+bit 1664 C 1 *
+bit 1663 I 1 DONE_AJ28
+bit 1662 O 1 DONE_AJ28 1661 1 Z
+bit 1661 C 1 *
+bit 1660 I 1 IO_AK28
+bit 1659 O 1 IO_AK28 1658 1 Z
+bit 1658 C 1 *
+bit 1657 I 1 IO_AJ27
+bit 1656 O 1 IO_AJ27 1655 1 Z
+bit 1655 C 1 *
+bit 1654 I 1 IO_AK27
+bit 1653 O 1 IO_AK27 1652 1 Z
+bit 1652 C 1 *
+bit 1651 I 1 IO_AJ26
+bit 1650 O 1 IO_AJ26 1649 1 Z
+bit 1649 C 1 *
+bit 1648 I 1 IO_AK26
+bit 1647 O 1 IO_AK26 1646 1 Z
+bit 1646 C 1 *
+bit 1645 I 1 IO_AH27
+bit 1644 O 1 IO_AH27 1643 1 Z
+bit 1643 C 1 *
+bit 1642 I 1 IO_AG26
+bit 1641 O 1 IO_AG26 1640 1 Z
+bit 1640 C 1 *
+bit 1639 I 1 IO_AF25
+bit 1638 O 1 IO_AF25 1637 1 Z
+bit 1637 C 1 *
+bit 1636 I 1 IO_AH25
+bit 1635 O 1 IO_AH25 1634 1 Z
+bit 1634 C 1 *
+bit 1633 I 1 IO_AJ25
+bit 1632 O 1 IO_AJ25 1631 1 Z
+bit 1631 C 1 *
+bit 1630 O 1 *
+bit 1629 O 1 *
+bit 1628 O 1 *
+bit 1627 I 1 IO_AE25
+bit 1626 O 1 IO_AE25 1625 1 Z
+bit 1625 C 1 *
+bit 1624 I 1 IO_AE24
+bit 1623 O 1 IO_AE24 1622 1 Z
+bit 1622 C 1 *
+bit 1621 I 1 IO_AG24
+bit 1620 O 1 IO_AG24 1619 1 Z
+bit 1619 C 1 *
+bit 1618 I 1 IO_AH24
+bit 1617 O 1 IO_AH24 1616 1 Z
+bit 1616 C 1 *
+bit 1615 O 1 *
+bit 1614 O 1 *
+bit 1613 O 1 *
+bit 1612 I 1 IO_AJ24
+bit 1611 O 1 IO_AJ24 1610 1 Z
+bit 1610 C 1 *
+bit 1609 I 1 IO_AK24
+bit 1608 O 1 IO_AK24 1607 1 Z
+bit 1607 C 1 *
+bit 1606 I 1 IO_AD24
+bit 1605 O 1 IO_AD24 1604 1 Z
+bit 1604 C 1 *
+bit 1603 I 1 IO_AC23
+bit 1602 O 1 IO_AC23 1601 1 Z
+bit 1601 C 1 *
+bit 1600 I 1 IO_AD23
+bit 1599 O 1 IO_AD23 1598 1 Z
+bit 1598 C 1 *
+bit 1597 I 1 IO_AE23
+bit 1596 O 1 IO_AE23 1595 1 Z
+bit 1595 C 1 *
+bit 1594 I 1 IO_AF23
+bit 1593 O 1 IO_AF23 1592 1 Z
+bit 1592 C 1 *
+bit 1591 I 1 IO_AG23
+bit 1590 O 1 IO_AG23 1589 1 Z
+bit 1589 C 1 *
+bit 1588 I 1 IO_AH23
+bit 1587 O 1 IO_AH23 1586 1 Z
+bit 1586 C 1 *
+bit 1585 O 1 *
+bit 1584 O 1 *
+bit 1583 O 1 *
+bit 1582 I 1 IO_AJ23
+bit 1581 O 1 IO_AJ23 1580 1 Z
+bit 1580 C 1 *
+bit 1579 I 1 IO_AK23
+bit 1578 O 1 IO_AK23 1577 1 Z
+bit 1577 C 1 *
+bit 1576 I 1 IO_AB22
+bit 1575 O 1 IO_AB22 1574 1 Z
+bit 1574 C 1 *
+bit 1573 I 1 IO_AC22
+bit 1572 O 1 IO_AC22 1571 1 Z
+bit 1571 C 1 *
+bit 1570 I 1 IO_AE22
+bit 1569 O 1 IO_AE22 1568 1 Z
+bit 1568 C 1 *
+bit 1567 I 1 IO_AF22
+bit 1566 O 1 IO_AF22 1565 1 Z
+bit 1565 C 1 *
+bit 1564 I 1 IO_AG22
+bit 1563 O 1 IO_AG22 1562 1 Z
+bit 1562 C 1 *
+bit 1561 I 1 IO_AJ22
+bit 1560 O 1 IO_AJ22 1559 1 Z
+bit 1559 C 1 *
+bit 1558 I 1 IO_AK22
+bit 1557 O 1 IO_AK22 1556 1 Z
+bit 1556 C 1 *
+bit 1555 O 1 *
+bit 1554 O 1 *
+bit 1553 O 1 *
+bit 1552 I 1 IO_AD21
+bit 1551 O 1 IO_AD21 1550 1 Z
+bit 1550 C 1 *
+bit 1549 I 1 IO_AE21
+bit 1548 O 1 IO_AE21 1547 1 Z
+bit 1547 C 1 *
+bit 1546 I 1 IO_AH21
+bit 1545 O 1 IO_AH21 1544 1 Z
+bit 1544 C 1 *
+bit 1543 I 1 IO_AJ21
+bit 1542 O 1 IO_AJ21 1541 1 Z
+bit 1541 C 1 *
+bit 1540 O 1 *
+bit 1539 O 1 *
+bit 1538 O 1 *
+bit 1537 I 1 IO_AB21
+bit 1536 O 1 IO_AB21 1535 1 Z
+bit 1535 C 1 *
+bit 1534 I 1 IO_AA20
+bit 1533 O 1 IO_AA20 1532 1 Z
+bit 1532 C 1 *
+bit 1531 I 1 IO_AC20
+bit 1530 O 1 IO_AC20 1529 1 Z
+bit 1529 C 1 *
+bit 1528 I 1 IO_AD20
+bit 1527 O 1 IO_AD20 1526 1 Z
+bit 1526 C 1 *
+bit 1525 O 1 *
+bit 1524 O 1 *
+bit 1523 O 1 *
+bit 1522 I 1 IO_AE20
+bit 1521 O 1 IO_AE20 1520 1 Z
+bit 1520 C 1 *
+bit 1519 I 1 IO_AF20
+bit 1518 O 1 IO_AF20 1517 1 Z
+bit 1517 C 1 *
+bit 1516 I 1 IO_AG20
+bit 1515 O 1 IO_AG20 1514 1 Z
+bit 1514 C 1 *
+bit 1513 I 1 IO_AH20
+bit 1512 O 1 IO_AH20 1511 1 Z
+bit 1511 C 1 *
+bit 1510 O 1 *
+bit 1509 O 1 *
+bit 1508 O 1 *
+bit 1507 I 1 IO_AJ20
+bit 1506 O 1 IO_AJ20 1505 1 Z
+bit 1505 C 1 *
+bit 1504 I 1 IO_AK20
+bit 1503 O 1 IO_AK20 1502 1 Z
+bit 1502 C 1 *
+bit 1501 I 1 IO_AA19
+bit 1500 O 1 IO_AA19 1499 1 Z
+bit 1499 C 1 *
+bit 1498 I 1 IO_AB19
+bit 1497 O 1 IO_AB19 1496 1 Z
+bit 1496 C 1 *
+bit 1495 O 1 *
+bit 1494 O 1 *
+bit 1493 O 1 *
+bit 1492 I 1 IO_AC19
+bit 1491 O 1 IO_AC19 1490 1 Z
+bit 1490 C 1 *
+bit 1489 I 1 IO_AD19
+bit 1488 O 1 IO_AD19 1487 1 Z
+bit 1487 C 1 *
+bit 1486 I 1 IO_AE19
+bit 1485 O 1 IO_AE19 1484 1 Z
+bit 1484 C 1 *
+bit 1483 I 1 IO_AF19
+bit 1482 O 1 IO_AF19 1481 1 Z
+bit 1481 C 1 *
+bit 1480 O 1 *
+bit 1479 O 1 *
+bit 1478 O 1 *
+bit 1477 I 1 IO_AG19
+bit 1476 O 1 IO_AG19 1475 1 Z
+bit 1475 C 1 *
+bit 1474 I 1 IO_AH19
+bit 1473 O 1 IO_AH19 1472 1 Z
+bit 1472 C 1 *
+bit 1471 I 1 IO_AJ19
+bit 1470 O 1 IO_AJ19 1469 1 Z
+bit 1469 C 1 *
+bit 1468 I 1 IO_AK19
+bit 1467 O 1 IO_AK19 1466 1 Z
+bit 1466 C 1 *
+bit 1465 I 1 IO_AA18
+bit 1464 O 1 IO_AA18 1463 1 Z
+bit 1463 C 1 *
+bit 1462 I 1 IO_AB18
+bit 1461 O 1 IO_AB18 1460 1 Z
+bit 1460 C 1 *
+bit 1459 I 1 IO_AC18
+bit 1458 O 1 IO_AC18 1457 1 Z
+bit 1457 C 1 *
+bit 1456 I 1 IO_AE18
+bit 1455 O 1 IO_AE18 1454 1 Z
+bit 1454 C 1 *
+bit 1453 I 1 IO_AF18
+bit 1452 O 1 IO_AF18 1451 1 Z
+bit 1451 C 1 *
+bit 1450 I 1 IO_AG18
+bit 1449 O 1 IO_AG18 1448 1 Z
+bit 1448 C 1 *
+bit 1447 I 1 IO_AJ18
+bit 1446 O 1 IO_AJ18 1445 1 Z
+bit 1445 C 1 *
+bit 1444 I 1 IO_AK18
+bit 1443 O 1 IO_AK18 1442 1 Z
+bit 1442 C 1 *
+bit 1441 I 1 IO_AA17
+bit 1440 O 1 IO_AA17 1439 1 Z
+bit 1439 C 1 *
+bit 1438 I 1 IO_AB17
+bit 1437 O 1 IO_AB17 1436 1 Z
+bit 1436 C 1 *
+bit 1435 I 1 IO_AA16
+bit 1434 O 1 IO_AA16 1433 1 Z
+bit 1433 C 1 *
+bit 1432 I 1 IO_AD17
+bit 1431 O 1 IO_AD17 1430 1 Z
+bit 1430 C 1 *
+bit 1429 I 1 IO_AE17
+bit 1428 O 1 IO_AE17 1427 1 Z
+bit 1427 C 1 *
+bit 1426 I 1 IO_AH17
+bit 1425 O 1 IO_AH17 1424 1 Z
+bit 1424 C 1 *
+bit 1423 I 1 IO_AJ17
+bit 1422 O 1 IO_AJ17 1421 1 Z
+bit 1421 C 1 *
+bit 1420 O 1 *
+bit 1419 O 1 *
+bit 1418 O 1 *
+bit 1417 I 1 IO_AB16
+bit 1416 O 1 IO_AB16 1415 1 Z
+bit 1415 C 1 *
+bit 1414 I 1 IO_AC16
+bit 1413 O 1 IO_AC16 1412 1 Z
+bit 1412 C 1 *
+bit 1411 I 1 IO_AD16
+bit 1410 O 1 IO_AD16 1409 1 Z
+bit 1409 C 1 *
+bit 1408 I 1 IO_AE16
+bit 1407 O 1 IO_AE16 1406 1 Z
+bit 1406 C 1 *
+bit 1405 I 1 IO_AF16
+bit 1404 O 1 IO_AF16 1403 1 Z
+bit 1403 C 1 *
+bit 1402 I 1 IO_AG16
+bit 1401 O 1 IO_AG16 1400 1 Z
+bit 1400 C 1 *
+bit 1399 I 1 IO_AH16
+bit 1398 O 1 IO_AH16 1397 1 Z
+bit 1397 C 1 *
+bit 1396 I 1 IO_AJ16
+bit 1395 O 1 IO_AJ16 1394 1 Z
+bit 1394 C 1 *
+bit 1393 I 1 IO_AK16
+bit 1392 O 1 IO_AK16 1391 1 Z
+bit 1391 C 1 *
+bit 1390 I 1 IO_AK15
+bit 1389 O 1 IO_AK15 1388 1 Z
+bit 1388 C 1 *
+bit 1387 I 1 IO_AJ15
+bit 1386 O 1 IO_AJ15 1385 1 Z
+bit 1385 C 1 *
+bit 1384 I 1 IO_AH15
+bit 1383 O 1 IO_AH15 1382 1 Z
+bit 1382 C 1 *
+bit 1381 I 1 IO_AG15
+bit 1380 O 1 IO_AG15 1379 1 Z
+bit 1379 C 1 *
+bit 1378 I 1 IO_AF15
+bit 1377 O 1 IO_AF15 1376 1 Z
+bit 1376 C 1 *
+bit 1375 I 1 IO_AE15
+bit 1374 O 1 IO_AE15 1373 1 Z
+bit 1373 C 1 *
+bit 1372 I 1 IO_AD15
+bit 1371 O 1 IO_AD15 1370 1 Z
+bit 1370 C 1 *
+bit 1369 I 1 IO_AD14
+bit 1368 O 1 IO_AD14 1367 1 Z
+bit 1367 C 1 *
+bit 1366 I 1 IO_AC15
+bit 1365 O 1 IO_AC15 1364 1 Z
+bit 1364 C 1 *
+bit 1363 I 1 IO_AB15
+bit 1362 O 1 IO_AB15 1361 1 Z
+bit 1361 C 1 *
+bit 1360 I 1 IO_AA15
+bit 1359 O 1 IO_AA15 1358 1 Z
+bit 1358 C 1 *
+bit 1357 I 1 IO_AJ14
+bit 1356 O 1 IO_AJ14 1355 1 Z
+bit 1355 C 1 *
+bit 1354 I 1 IO_AH14
+bit 1353 O 1 IO_AH14 1352 1 Z
+bit 1352 C 1 *
+bit 1351 I 1 IO_AE14
+bit 1350 O 1 IO_AE14 1349 1 Z
+bit 1349 C 1 *
+bit 1348 I 1 IO_AE13
+bit 1347 O 1 IO_AE13 1346 1 Z
+bit 1346 C 1 *
+bit 1345 O 1 *
+bit 1344 O 1 *
+bit 1343 O 1 *
+bit 1342 I 1 IO_AB14
+bit 1341 O 1 IO_AB14 1340 1 Z
+bit 1340 C 1 *
+bit 1339 I 1 IO_AA14
+bit 1338 O 1 IO_AA14 1337 1 Z
+bit 1337 C 1 *
+bit 1336 I 1 IO_AK13
+bit 1335 O 1 IO_AK13 1334 1 Z
+bit 1334 C 1 *
+bit 1333 I 1 IO_AJ13
+bit 1332 O 1 IO_AJ13 1331 1 Z
+bit 1331 C 1 *
+bit 1330 O 1 *
+bit 1329 O 1 *
+bit 1328 O 1 *
+bit 1327 I 1 IO_AG13
+bit 1326 O 1 IO_AG13 1325 1 Z
+bit 1325 C 1 *
+bit 1324 I 1 IO_AF13
+bit 1323 O 1 IO_AF13 1322 1 Z
+bit 1322 C 1 *
+bit 1321 I 1 IO_AC13
+bit 1320 O 1 IO_AC13 1319 1 Z
+bit 1319 C 1 *
+bit 1318 I 1 IO_AB13
+bit 1317 O 1 IO_AB13 1316 1 Z
+bit 1316 C 1 *
+bit 1315 O 1 *
+bit 1314 O 1 *
+bit 1313 O 1 *
+bit 1312 I 1 IO_AA13
+bit 1311 O 1 IO_AA13 1310 1 Z
+bit 1310 C 1 *
+bit 1309 I 1 IO_AA12
+bit 1308 O 1 IO_AA12 1307 1 Z
+bit 1307 C 1 *
+bit 1306 I 1 IO_AK12
+bit 1305 O 1 IO_AK12 1304 1 Z
+bit 1304 C 1 *
+bit 1303 I 1 IO_AJ12
+bit 1302 O 1 IO_AJ12 1301 1 Z
+bit 1301 C 1 *
+bit 1300 O 1 *
+bit 1299 O 1 *
+bit 1298 O 1 *
+bit 1297 I 1 IO_AH12
+bit 1296 O 1 IO_AH12 1295 1 Z
+bit 1295 C 1 *
+bit 1294 I 1 IO_AG12
+bit 1293 O 1 IO_AG12 1292 1 Z
+bit 1292 C 1 *
+bit 1291 I 1 IO_AF12
+bit 1290 O 1 IO_AF12 1289 1 Z
+bit 1289 C 1 *
+bit 1288 I 1 IO_AE12
+bit 1287 O 1 IO_AE12 1286 1 Z
+bit 1286 C 1 *
+bit 1285 O 1 *
+bit 1284 O 1 *
+bit 1283 O 1 *
+bit 1282 I 1 IO_AD12
+bit 1281 O 1 IO_AD12 1280 1 Z
+bit 1280 C 1 *
+bit 1279 I 1 IO_AC12
+bit 1278 O 1 IO_AC12 1277 1 Z
+bit 1277 C 1 *
+bit 1276 I 1 IO_AB12
+bit 1275 O 1 IO_AB12 1274 1 Z
+bit 1274 C 1 *
+bit 1273 I 1 IO_AC11
+bit 1272 O 1 IO_AC11 1271 1 Z
+bit 1271 C 1 *
+bit 1270 O 1 *
+bit 1269 O 1 *
+bit 1268 O 1 *
+bit 1267 I 1 IO_AK11
+bit 1266 O 1 IO_AK11 1265 1 Z
+bit 1265 C 1 *
+bit 1264 I 1 IO_AJ11
+bit 1263 O 1 IO_AJ11 1262 1 Z
+bit 1262 C 1 *
+bit 1261 I 1 IO_AH11
+bit 1260 O 1 IO_AH11 1259 1 Z
+bit 1259 C 1 *
+bit 1258 I 1 IO_AG11
+bit 1257 O 1 IO_AG11 1256 1 Z
+bit 1256 C 1 *
+bit 1255 O 1 *
+bit 1254 O 1 *
+bit 1253 O 1 *
+bit 1252 I 1 IO_AF11
+bit 1251 O 1 IO_AF11 1250 1 Z
+bit 1250 C 1 *
+bit 1249 I 1 IO_AE11
+bit 1248 O 1 IO_AE11 1247 1 Z
+bit 1247 C 1 *
+bit 1246 I 1 IO_AD11
+bit 1245 O 1 IO_AD11 1244 1 Z
+bit 1244 C 1 *
+bit 1243 I 1 IO_AD10
+bit 1242 O 1 IO_AD10 1241 1 Z
+bit 1241 C 1 *
+bit 1240 I 1 IO_AA11
+bit 1239 O 1 IO_AA11 1238 1 Z
+bit 1238 C 1 *
+bit 1237 I 1 IO_AJ10
+bit 1236 O 1 IO_AJ10 1235 1 Z
+bit 1235 C 1 *
+bit 1234 I 1 IO_AH10
+bit 1233 O 1 IO_AH10 1232 1 Z
+bit 1232 C 1 *
+bit 1231 I 1 IO_AE10
+bit 1230 O 1 IO_AE10 1229 1 Z
+bit 1229 C 1 *
+bit 1228 I 1 IO_AE9
+bit 1227 O 1 IO_AE9 1226 1 Z
+bit 1226 C 1 *
+bit 1225 I 1 IO_AB10
+bit 1224 O 1 IO_AB10 1223 1 Z
+bit 1223 C 1 *
+bit 1222 I 1 IO_AK9
+bit 1221 O 1 IO_AK9 1220 1 Z
+bit 1220 C 1 *
+bit 1219 I 1 IO_AJ9
+bit 1218 O 1 IO_AJ9 1217 1 Z
+bit 1217 C 1 *
+bit 1216 I 1 IO_AG9
+bit 1215 O 1 IO_AG9 1214 1 Z
+bit 1214 C 1 *
+bit 1213 I 1 IO_AF9
+bit 1212 O 1 IO_AF9 1211 1 Z
+bit 1211 C 1 *
+bit 1210 O 1 *
+bit 1209 O 1 *
+bit 1208 O 1 *
+bit 1207 I 1 IO_AC9
+bit 1206 O 1 IO_AC9 1205 1 Z
+bit 1205 C 1 *
+bit 1204 I 1 IO_AB9
+bit 1203 O 1 IO_AB9 1202 1 Z
+bit 1202 C 1 *
+bit 1201 I 1 IO_AK8
+bit 1200 O 1 IO_AK8 1199 1 Z
+bit 1199 C 1 *
+bit 1198 I 1 IO_AJ8
+bit 1197 O 1 IO_AJ8 1196 1 Z
+bit 1196 C 1 *
+bit 1195 O 1 *
+bit 1194 O 1 *
+bit 1193 O 1 *
+bit 1192 I 1 IO_AH8
+bit 1191 O 1 IO_AH8 1190 1 Z
+bit 1190 C 1 *
+bit 1189 I 1 IO_AG8
+bit 1188 O 1 IO_AG8 1187 1 Z
+bit 1187 C 1 *
+bit 1186 I 1 IO_AF8
+bit 1185 O 1 IO_AF8 1184 1 Z
+bit 1184 C 1 *
+bit 1183 I 1 IO_AE8
+bit 1182 O 1 IO_AE8 1181 1 Z
+bit 1181 C 1 *
+bit 1180 O 1 *
+bit 1179 O 1 *
+bit 1178 O 1 *
+bit 1177 I 1 IO_AD8
+bit 1176 O 1 IO_AD8 1175 1 Z
+bit 1175 C 1 *
+bit 1174 I 1 IO_AC8
+bit 1173 O 1 IO_AC8 1172 1 Z
+bit 1172 C 1 *
+bit 1171 I 1 IO_AK7
+bit 1170 O 1 IO_AK7 1169 1 Z
+bit 1169 C 1 *
+bit 1168 I 1 IO_AJ7
+bit 1167 O 1 IO_AJ7 1166 1 Z
+bit 1166 C 1 *
+bit 1165 O 1 *
+bit 1164 O 1 *
+bit 1163 O 1 *
+bit 1162 I 1 IO_AH7
+bit 1161 O 1 IO_AH7 1160 1 Z
+bit 1160 C 1 *
+bit 1159 I 1 IO_AG7
+bit 1158 O 1 IO_AG7 1157 1 Z
+bit 1157 C 1 *
+bit 1156 I 1 IO_AE7
+bit 1155 O 1 IO_AE7 1154 1 Z
+bit 1154 C 1 *
+bit 1153 I 1 IO_AD7
+bit 1152 O 1 IO_AD7 1151 1 Z
+bit 1151 C 1 *
+bit 1150 I 1 IO_AE6
+bit 1149 O 1 IO_AE6 1148 1 Z
+bit 1148 C 1 *
+bit 1147 I 1 IO_AJ6
+bit 1146 O 1 IO_AJ6 1145 1 Z
+bit 1145 C 1 *
+bit 1144 I 1 IO_AH6
+bit 1143 O 1 IO_AH6 1142 1 Z
+bit 1142 C 1 *
+bit 1141 I 1 IO_AF6
+bit 1140 O 1 IO_AF6 1139 1 Z
+bit 1139 C 1 *
+bit 1138 I 1 IO_AG5
+bit 1137 O 1 IO_AG5 1136 1 Z
+bit 1136 C 1 *
+bit 1135 I 1 IO_AH4
+bit 1134 O 1 IO_AH4 1133 1 Z
+bit 1133 C 1 *
+bit 1132 I 1 IO_AK5
+bit 1131 O 1 IO_AK5 1130 1 Z
+bit 1130 C 1 *
+bit 1129 I 1 IO_AJ5
+bit 1128 O 1 IO_AJ5 1127 1 Z
+bit 1127 C 1 *
+bit 1126 I 1 IO_AK4
+bit 1125 O 1 IO_AK4 1124 1 Z
+bit 1124 C 1 *
+bit 1123 I 1 IO_AJ4
+bit 1122 O 1 IO_AJ4 1121 1 Z
+bit 1121 C 1 *
+bit 1120 I 1 M2_AK3
+bit 1119 I 1 M0_AJ3
+bit 1118 I 1 M1_AH3
+bit 1117 I 1 IO_AH2
+bit 1116 O 1 IO_AH2 1115 1 Z
+bit 1115 C 1 *
+bit 1114 I 1 IO_AH1
+bit 1113 O 1 IO_AH1 1112 1 Z
+bit 1112 C 1 *
+bit 1111 I 1 IO_AG4
+bit 1110 O 1 IO_AG4 1109 1 Z
+bit 1109 C 1 *
+bit 1108 I 1 IO_AG3
+bit 1107 O 1 IO_AG3 1106 1 Z
+bit 1106 C 1 *
+bit 1105 I 1 IO_AG2
+bit 1104 O 1 IO_AG2 1103 1 Z
+bit 1103 C 1 *
+bit 1102 I 1 IO_AG1
+bit 1101 O 1 IO_AG1 1100 1 Z
+bit 1100 C 1 *
+bit 1099 I 1 IO_AF2
+bit 1098 O 1 IO_AF2 1097 1 Z
+bit 1097 C 1 *
+bit 1096 I 1 IO_AF1
+bit 1095 O 1 IO_AF1 1094 1 Z
+bit 1094 C 1 *
+bit 1093 I 1 IO_AF4
+bit 1092 O 1 IO_AF4 1091 1 Z
+bit 1091 C 1 *
+bit 1090 I 1 IO_AE5
+bit 1089 O 1 IO_AE5 1088 1 Z
+bit 1088 C 1 *
+bit 1087 I 1 IO_AE3
+bit 1086 O 1 IO_AE3 1085 1 Z
+bit 1085 C 1 *
+bit 1084 I 1 IO_AE2
+bit 1083 O 1 IO_AE2 1082 1 Z
+bit 1082 C 1 *
+bit 1081 O 1 *
+bit 1080 O 1 *
+bit 1079 O 1 *
+bit 1078 O 1 *
+bit 1077 O 1 *
+bit 1076 O 1 *
+bit 1075 O 1 *
+bit 1074 O 1 *
+bit 1073 O 1 *
+bit 1072 O 1 *
+bit 1071 O 1 *
+bit 1070 O 1 *
+bit 1069 I 1 IO_AD4
+bit 1068 O 1 IO_AD4 1067 1 Z
+bit 1067 C 1 *
+bit 1066 I 1 IO_AD3
+bit 1065 O 1 IO_AD3 1064 1 Z
+bit 1064 C 1 *
+bit 1063 I 1 IO_AD2
+bit 1062 O 1 IO_AD2 1061 1 Z
+bit 1061 C 1 *
+bit 1060 I 1 IO_AD1
+bit 1059 O 1 IO_AD1 1058 1 Z
+bit 1058 C 1 *
+bit 1057 I 1 IO_AD6
+bit 1056 O 1 IO_AD6 1055 1 Z
+bit 1055 C 1 *
+bit 1054 I 1 IO_AC7
+bit 1053 O 1 IO_AC7 1052 1 Z
+bit 1052 C 1 *
+bit 1051 I 1 IO_AC6
+bit 1050 O 1 IO_AC6 1049 1 Z
+bit 1049 C 1 *
+bit 1048 I 1 IO_AC5
+bit 1047 O 1 IO_AC5 1046 1 Z
+bit 1046 C 1 *
+bit 1045 I 1 IO_AC4
+bit 1044 O 1 IO_AC4 1043 1 Z
+bit 1043 C 1 *
+bit 1042 I 1 IO_AC3
+bit 1041 O 1 IO_AC3 1040 1 Z
+bit 1040 C 1 *
+bit 1039 O 1 *
+bit 1038 O 1 *
+bit 1037 O 1 *
+bit 1036 I 1 IO_AB6
+bit 1035 O 1 IO_AB6 1034 1 Z
+bit 1034 C 1 *
+bit 1033 I 1 IO_AC2
+bit 1032 O 1 IO_AC2 1031 1 Z
+bit 1031 C 1 *
+bit 1030 I 1 IO_AC1
+bit 1029 O 1 IO_AC1 1028 1 Z
+bit 1028 C 1 *
+bit 1027 I 1 IO_AB5
+bit 1026 O 1 IO_AB5 1025 1 Z
+bit 1025 C 1 *
+bit 1024 I 1 IO_AB4
+bit 1023 O 1 IO_AB4 1022 1 Z
+bit 1022 C 1 *
+bit 1021 I 1 IO_AB2
+bit 1020 O 1 IO_AB2 1019 1 Z
+bit 1019 C 1 *
+bit 1018 I 1 IO_AB1
+bit 1017 O 1 IO_AB1 1016 1 Z
+bit 1016 C 1 *
+bit 1015 I 1 IO_AB8
+bit 1014 O 1 IO_AB8 1013 1 Z
+bit 1013 C 1 *
+bit 1012 I 1 IO_AA9
+bit 1011 O 1 IO_AA9 1010 1 Z
+bit 1010 C 1 *
+bit 1009 I 1 IO_AA7
+bit 1008 O 1 IO_AA7 1007 1 Z
+bit 1007 C 1 *
+bit 1006 I 1 IO_AA6
+bit 1005 O 1 IO_AA6 1004 1 Z
+bit 1004 C 1 *
+bit 1003 O 1 *
+bit 1002 O 1 *
+bit 1001 O 1 *
+bit 1000 O 1 *
+bit 999 O 1 *
+bit 998 O 1 *
+bit 997 I 1 IO_AA3
+bit 996 O 1 IO_AA3 995 1 Z
+bit 995 C 1 *
+bit 994 I 1 IO_AA2
+bit 993 O 1 IO_AA2 992 1 Z
+bit 992 C 1 *
+bit 991 I 1 IO_AA10
+bit 990 O 1 IO_AA10 989 1 Z
+bit 989 C 1 *
+bit 988 I 1 IO_Y10
+bit 987 O 1 IO_Y10 986 1 Z
+bit 986 C 1 *
+bit 985 I 1 IO_Y8
+bit 984 O 1 IO_Y8 983 1 Z
+bit 983 C 1 *
+bit 982 I 1 IO_Y7
+bit 981 O 1 IO_Y7 980 1 Z
+bit 980 C 1 *
+bit 979 I 1 IO_Y6
+bit 978 O 1 IO_Y6 977 1 Z
+bit 977 C 1 *
+bit 976 I 1 IO_Y5
+bit 975 O 1 IO_Y5 974 1 Z
+bit 974 C 1 *
+bit 973 I 1 IO_Y4
+bit 972 O 1 IO_Y4 971 1 Z
+bit 971 C 1 *
+bit 970 I 1 IO_Y3
+bit 969 O 1 IO_Y3 968 1 Z
+bit 968 C 1 *
+bit 967 O 1 *
+bit 966 O 1 *
+bit 965 O 1 *
+bit 964 O 1 *
+bit 963 O 1 *
+bit 962 O 1 *
+bit 961 I 1 IO_Y2
+bit 960 O 1 IO_Y2 959 1 Z
+bit 959 C 1 *
+bit 958 I 1 IO_Y1
+bit 957 O 1 IO_Y1 956 1 Z
+bit 956 C 1 *
+bit 955 I 1 IO_W9
+bit 954 O 1 IO_W9 953 1 Z
+bit 953 C 1 *
+bit 952 I 1 IO_W8
+bit 951 O 1 IO_W8 950 1 Z
+bit 950 C 1 *
+bit 949 I 1 IO_W7
+bit 948 O 1 IO_W7 947 1 Z
+bit 947 C 1 *
+bit 946 I 1 IO_W6
+bit 945 O 1 IO_W6 944 1 Z
+bit 944 C 1 *
+bit 943 I 1 IO_W4
+bit 942 O 1 IO_W4 941 1 Z
+bit 941 C 1 *
+bit 940 I 1 IO_W3
+bit 939 O 1 IO_W3 938 1 Z
+bit 938 C 1 *
+bit 937 O 1 *
+bit 936 O 1 *
+bit 935 O 1 *
+bit 934 O 1 *
+bit 933 O 1 *
+bit 932 O 1 *
+bit 931 I 1 IO_W2
+bit 930 O 1 IO_W2 929 1 Z
+bit 929 C 1 *
+bit 928 I 1 IO_W1
+bit 927 O 1 IO_W1 926 1 Z
+bit 926 C 1 *
+bit 925 I 1 IO_W10
+bit 924 O 1 IO_W10 923 1 Z
+bit 923 C 1 *
+bit 922 I 1 IO_V10
+bit 921 O 1 IO_V10 920 1 Z
+bit 920 C 1 *
+bit 919 I 1 IO_V9
+bit 918 O 1 IO_V9 917 1 Z
+bit 917 C 1 *
+bit 916 I 1 IO_V8
+bit 915 O 1 IO_V8 914 1 Z
+bit 914 C 1 *
+bit 913 I 1 IO_W5
+bit 912 O 1 IO_W5 911 1 Z
+bit 911 C 1 *
+bit 910 I 1 IO_V6
+bit 909 O 1 IO_V6 908 1 Z
+bit 908 C 1 *
+bit 907 I 1 IO_V5
+bit 906 O 1 IO_V5 905 1 Z
+bit 905 C 1 *
+bit 904 I 1 IO_V4
+bit 903 O 1 IO_V4 902 1 Z
+bit 902 C 1 *
+bit 901 O 1 *
+bit 900 O 1 *
+bit 899 O 1 *
+bit 898 O 1 *
+bit 897 O 1 *
+bit 896 O 1 *
+bit 895 I 1 IO_V2
+bit 894 O 1 IO_V2 893 1 Z
+bit 893 C 1 *
+bit 892 I 1 IO_V1
+bit 891 O 1 IO_V1 890 1 Z
+bit 890 C 1 *
+bit 889 I 1 IO_U10
+bit 888 O 1 IO_U10 887 1 Z
+bit 887 C 1 *
+bit 886 I 1 IO_U9
+bit 885 O 1 IO_U9 884 1 Z
+bit 884 C 1 *
+bit 883 I 1 IO_U7
+bit 882 O 1 IO_U7 881 1 Z
+bit 881 C 1 *
+bit 880 I 1 IO_U6
+bit 879 O 1 IO_U6 878 1 Z
+bit 878 C 1 *
+bit 877 I 1 IO_U3
+bit 876 O 1 IO_U3 875 1 Z
+bit 875 C 1 *
+bit 874 I 1 IO_U2
+bit 873 O 1 IO_U2 872 1 Z
+bit 872 C 1 *
+bit 871 I 1 IO_T10
+bit 870 O 1 IO_T10 869 1 Z
+bit 869 C 1 *
+bit 868 I 1 IO_T9
+bit 867 O 1 IO_T9 866 1 Z
+bit 866 C 1 *
+bit 865 O 1 *
+bit 864 O 1 *
+bit 863 O 1 *
+bit 862 O 1 *
+bit 861 O 1 *
+bit 860 O 1 *
+bit 859 O 1 *
+bit 858 O 1 *
+bit 857 O 1 *
+bit 856 O 1 *
+bit 855 O 1 *
+bit 854 O 1 *
+bit 853 I 1 IO_T8
+bit 852 O 1 IO_T8 851 1 Z
+bit 851 C 1 *
+bit 850 I 1 IO_T7
+bit 849 O 1 IO_T7 848 1 Z
+bit 848 C 1 *
+bit 847 I 1 IO_T6
+bit 846 O 1 IO_T6 845 1 Z
+bit 845 C 1 *
+bit 844 I 1 IO_T5
+bit 843 O 1 IO_T5 842 1 Z
+bit 842 C 1 *
+bit 841 I 1 IO_T4
+bit 840 O 1 IO_T4 839 1 Z
+bit 839 C 1 *
+bit 838 I 1 IO_T3
+bit 837 O 1 IO_T3 836 1 Z
+bit 836 C 1 *
+bit 835 I 1 IO_T2
+bit 834 O 1 IO_T2 833 1 Z
+bit 833 C 1 *
+bit 832 I 1 IO_T1
+bit 831 O 1 IO_T1 830 1 Z
+bit 830 C 1 *
+bit 829 I 1 IO_R1
+bit 828 O 1 IO_R1 827 1 Z
+bit 827 C 1 *
+bit 826 I 1 IO_R2
+bit 825 O 1 IO_R2 824 1 Z
+bit 824 C 1 *
+bit 823 I 1 IO_R3
+bit 822 O 1 IO_R3 821 1 Z
+bit 821 C 1 *
+bit 820 I 1 IO_R4
+bit 819 O 1 IO_R4 818 1 Z
+bit 818 C 1 *
+bit 817 I 1 IO_R5
+bit 816 O 1 IO_R5 815 1 Z
+bit 815 C 1 *
+bit 814 I 1 IO_R6
+bit 813 O 1 IO_R6 812 1 Z
+bit 812 C 1 *
+bit 811 I 1 IO_R7
+bit 810 O 1 IO_R7 809 1 Z
+bit 809 C 1 *
+bit 808 I 1 IO_R8
+bit 807 O 1 IO_R8 806 1 Z
+bit 806 C 1 *
+bit 805 O 1 *
+bit 804 O 1 *
+bit 803 O 1 *
+bit 802 O 1 *
+bit 801 O 1 *
+bit 800 O 1 *
+bit 799 O 1 *
+bit 798 O 1 *
+bit 797 O 1 *
+bit 796 O 1 *
+bit 795 O 1 *
+bit 794 O 1 *
+bit 793 I 1 IO_R9
+bit 792 O 1 IO_R9 791 1 Z
+bit 791 C 1 *
+bit 790 I 1 IO_R10
+bit 789 O 1 IO_R10 788 1 Z
+bit 788 C 1 *
+bit 787 I 1 IO_P2
+bit 786 O 1 IO_P2 785 1 Z
+bit 785 C 1 *
+bit 784 I 1 IO_P3
+bit 783 O 1 IO_P3 782 1 Z
+bit 782 C 1 *
+bit 781 I 1 IO_P6
+bit 780 O 1 IO_P6 779 1 Z
+bit 779 C 1 *
+bit 778 I 1 IO_P7
+bit 777 O 1 IO_P7 776 1 Z
+bit 776 C 1 *
+bit 775 I 1 IO_P9
+bit 774 O 1 IO_P9 773 1 Z
+bit 773 C 1 *
+bit 772 I 1 IO_P10
+bit 771 O 1 IO_P10 770 1 Z
+bit 770 C 1 *
+bit 769 I 1 IO_N1
+bit 768 O 1 IO_N1 767 1 Z
+bit 767 C 1 *
+bit 766 I 1 IO_N2
+bit 765 O 1 IO_N2 764 1 Z
+bit 764 C 1 *
+bit 763 O 1 *
+bit 762 O 1 *
+bit 761 O 1 *
+bit 760 O 1 *
+bit 759 O 1 *
+bit 758 O 1 *
+bit 757 I 1 IO_N4
+bit 756 O 1 IO_N4 755 1 Z
+bit 755 C 1 *
+bit 754 I 1 IO_N5
+bit 753 O 1 IO_N5 752 1 Z
+bit 752 C 1 *
+bit 751 I 1 IO_N6
+bit 750 O 1 IO_N6 749 1 Z
+bit 749 C 1 *
+bit 748 I 1 IO_M5
+bit 747 O 1 IO_M5 746 1 Z
+bit 746 C 1 *
+bit 745 I 1 IO_N8
+bit 744 O 1 IO_N8 743 1 Z
+bit 743 C 1 *
+bit 742 I 1 IO_N9
+bit 741 O 1 IO_N9 740 1 Z
+bit 740 C 1 *
+bit 739 I 1 IO_N10
+bit 738 O 1 IO_N10 737 1 Z
+bit 737 C 1 *
+bit 736 I 1 IO_M10
+bit 735 O 1 IO_M10 734 1 Z
+bit 734 C 1 *
+bit 733 I 1 IO_M1
+bit 732 O 1 IO_M1 731 1 Z
+bit 731 C 1 *
+bit 730 I 1 IO_M2
+bit 729 O 1 IO_M2 728 1 Z
+bit 728 C 1 *
+bit 727 O 1 *
+bit 726 O 1 *
+bit 725 O 1 *
+bit 724 O 1 *
+bit 723 O 1 *
+bit 722 O 1 *
+bit 721 I 1 IO_M3
+bit 720 O 1 IO_M3 719 1 Z
+bit 719 C 1 *
+bit 718 I 1 IO_M4
+bit 717 O 1 IO_M4 716 1 Z
+bit 716 C 1 *
+bit 715 I 1 IO_M6
+bit 714 O 1 IO_M6 713 1 Z
+bit 713 C 1 *
+bit 712 I 1 IO_M7
+bit 711 O 1 IO_M7 710 1 Z
+bit 710 C 1 *
+bit 709 I 1 IO_M8
+bit 708 O 1 IO_M8 707 1 Z
+bit 707 C 1 *
+bit 706 I 1 IO_M9
+bit 705 O 1 IO_M9 704 1 Z
+bit 704 C 1 *
+bit 703 I 1 IO_L1
+bit 702 O 1 IO_L1 701 1 Z
+bit 701 C 1 *
+bit 700 I 1 IO_L2
+bit 699 O 1 IO_L2 698 1 Z
+bit 698 C 1 *
+bit 697 O 1 *
+bit 696 O 1 *
+bit 695 O 1 *
+bit 694 O 1 *
+bit 693 O 1 *
+bit 692 O 1 *
+bit 691 I 1 IO_L3
+bit 690 O 1 IO_L3 689 1 Z
+bit 689 C 1 *
+bit 688 I 1 IO_L4
+bit 687 O 1 IO_L4 686 1 Z
+bit 686 C 1 *
+bit 685 I 1 IO_L5
+bit 684 O 1 IO_L5 683 1 Z
+bit 683 C 1 *
+bit 682 I 1 IO_L6
+bit 681 O 1 IO_L6 680 1 Z
+bit 680 C 1 *
+bit 679 I 1 IO_L7
+bit 678 O 1 IO_L7 677 1 Z
+bit 677 C 1 *
+bit 676 I 1 IO_L8
+bit 675 O 1 IO_L8 674 1 Z
+bit 674 C 1 *
+bit 673 I 1 IO_L10
+bit 672 O 1 IO_L10 671 1 Z
+bit 671 C 1 *
+bit 670 I 1 IO_K10
+bit 669 O 1 IO_K10 668 1 Z
+bit 668 C 1 *
+bit 667 I 1 IO_K2
+bit 666 O 1 IO_K2 665 1 Z
+bit 665 C 1 *
+bit 664 I 1 IO_K3
+bit 663 O 1 IO_K3 662 1 Z
+bit 662 C 1 *
+bit 661 O 1 *
+bit 660 O 1 *
+bit 659 O 1 *
+bit 658 O 1 *
+bit 657 O 1 *
+bit 656 O 1 *
+bit 655 I 1 IO_K6
+bit 654 O 1 IO_K6 653 1 Z
+bit 653 C 1 *
+bit 652 I 1 IO_K7
+bit 651 O 1 IO_K7 650 1 Z
+bit 650 C 1 *
+bit 649 I 1 IO_K9
+bit 648 O 1 IO_K9 647 1 Z
+bit 647 C 1 *
+bit 646 I 1 IO_J8
+bit 645 O 1 IO_J8 644 1 Z
+bit 644 C 1 *
+bit 643 I 1 IO_J1
+bit 642 O 1 IO_J1 641 1 Z
+bit 641 C 1 *
+bit 640 I 1 IO_J2
+bit 639 O 1 IO_J2 638 1 Z
+bit 638 C 1 *
+bit 637 I 1 IO_J4
+bit 636 O 1 IO_J4 635 1 Z
+bit 635 C 1 *
+bit 634 I 1 IO_J5
+bit 633 O 1 IO_J5 632 1 Z
+bit 632 C 1 *
+bit 631 I 1 IO_H1
+bit 630 O 1 IO_H1 629 1 Z
+bit 629 C 1 *
+bit 628 I 1 IO_H2
+bit 627 O 1 IO_H2 626 1 Z
+bit 626 C 1 *
+bit 625 I 1 IO_J6
+bit 624 O 1 IO_J6 623 1 Z
+bit 623 C 1 *
+bit 622 O 1 *
+bit 621 O 1 *
+bit 620 O 1 *
+bit 619 I 1 IO_H3
+bit 618 O 1 IO_H3 617 1 Z
+bit 617 C 1 *
+bit 616 I 1 IO_H4
+bit 615 O 1 IO_H4 614 1 Z
+bit 614 C 1 *
+bit 613 I 1 IO_H5
+bit 612 O 1 IO_H5 611 1 Z
+bit 611 C 1 *
+bit 610 I 1 IO_H6
+bit 609 O 1 IO_H6 608 1 Z
+bit 608 C 1 *
+bit 607 I 1 IO_H7
+bit 606 O 1 IO_H7 605 1 Z
+bit 605 C 1 *
+bit 604 I 1 IO_G6
+bit 603 O 1 IO_G6 602 1 Z
+bit 602 C 1 *
+bit 601 I 1 IO_G1
+bit 600 O 1 IO_G1 599 1 Z
+bit 599 C 1 *
+bit 598 I 1 IO_G2
+bit 597 O 1 IO_G2 596 1 Z
+bit 596 C 1 *
+bit 595 I 1 IO_G3
+bit 594 O 1 IO_G3 593 1 Z
+bit 593 C 1 *
+bit 592 I 1 IO_G4
+bit 591 O 1 IO_G4 590 1 Z
+bit 590 C 1 *
+bit 589 O 1 *
+bit 588 O 1 *
+bit 587 O 1 *
+bit 586 O 1 *
+bit 585 O 1 *
+bit 584 O 1 *
+bit 583 O 1 *
+bit 582 O 1 *
+bit 581 O 1 *
+bit 580 O 1 *
+bit 579 O 1 *
+bit 578 O 1 *
+bit 577 I 1 IO_F2
+bit 576 O 1 IO_F2 575 1 Z
+bit 575 C 1 *
+bit 574 I 1 IO_F3
+bit 573 O 1 IO_F3 572 1 Z
+bit 572 C 1 *
+bit 571 I 1 IO_F5
+bit 570 O 1 IO_F5 569 1 Z
+bit 569 C 1 *
+bit 568 I 1 IO_E4
+bit 567 O 1 IO_E4 566 1 Z
+bit 566 C 1 *
+bit 565 I 1 IO_E1
+bit 564 O 1 IO_E1 563 1 Z
+bit 563 C 1 *
+bit 562 I 1 IO_E2
+bit 561 O 1 IO_E2 560 1 Z
+bit 560 C 1 *
+bit 559 I 1 IO_D1
+bit 558 O 1 IO_D1 557 1 Z
+bit 557 C 1 *
+bit 556 I 1 IO_D2
+bit 555 O 1 IO_D2 554 1 Z
+bit 554 C 1 *
+bit 553 I 1 IO_D3
+bit 552 O 1 IO_D3 551 1 Z
+bit 551 C 1 *
+bit 550 I 1 IO_D4
+bit 549 O 1 IO_D4 548 1 Z
+bit 548 C 1 *
+bit 547 I 1 IO_C1
+bit 546 O 1 IO_C1 545 1 Z
+bit 545 C 1 *
+bit 544 I 1 IO_C2
+bit 543 O 1 IO_C2 542 1 Z
+bit 542 C 1 *
+bit 541 O 1 *
+bit 540 I 1 HSWAP_EN_A3
+bit 539 I 1 IO_C4
+bit 538 O 1 IO_C4 537 1 Z
+bit 537 C 1 *
+bit 536 I 1 IO_B4
+bit 535 O 1 IO_B4 534 1 Z
+bit 534 C 1 *
+bit 533 I 1 IO_A4
+bit 532 O 1 IO_A4 531 1 Z
+bit 531 C 1 *
+bit 530 I 1 IO_B5
+bit 529 O 1 IO_B5 528 1 Z
+bit 528 C 1 *
+bit 527 I 1 IO_A5
+bit 526 O 1 IO_A5 525 1 Z
+bit 525 C 1 *
+bit 524 O 1 *
+bit 523 O 1 *
+bit 522 O 1 *
+bit 521 I 1 IO_D5
+bit 520 O 1 IO_D5 519 1 Z
+bit 519 C 1 *
+bit 518 I 1 IO_E6
+bit 517 O 1 IO_E6 516 1 Z
+bit 516 C 1 *
+bit 515 I 1 IO_C6
+bit 514 O 1 IO_C6 513 1 Z
+bit 513 C 1 *
+bit 512 I 1 IO_B6
+bit 511 O 1 IO_B6 510 1 Z
+bit 510 C 1 *
+bit 509 O 1 *
+bit 508 O 1 *
+bit 507 O 1 *
+bit 506 I 1 IO_F6
+bit 505 O 1 IO_F6 504 1 Z
+bit 504 C 1 *
+bit 503 I 1 IO_F7
+bit 502 O 1 IO_F7 501 1 Z
+bit 501 C 1 *
+bit 500 I 1 IO_D7
+bit 499 O 1 IO_D7 498 1 Z
+bit 498 C 1 *
+bit 497 I 1 IO_C7
+bit 496 O 1 IO_C7 495 1 Z
+bit 495 C 1 *
+bit 494 O 1 *
+bit 493 O 1 *
+bit 492 O 1 *
+bit 491 I 1 IO_B7
+bit 490 O 1 IO_B7 489 1 Z
+bit 489 C 1 *
+bit 488 I 1 IO_A7
+bit 487 O 1 IO_A7 486 1 Z
+bit 486 C 1 *
+bit 485 I 1 IO_G7
+bit 484 O 1 IO_G7 483 1 Z
+bit 483 C 1 *
+bit 482 I 1 IO_H8
+bit 481 O 1 IO_H8 480 1 Z
+bit 480 C 1 *
+bit 479 I 1 IO_G8
+bit 478 O 1 IO_G8 477 1 Z
+bit 477 C 1 *
+bit 476 I 1 IO_F8
+bit 475 O 1 IO_F8 474 1 Z
+bit 474 C 1 *
+bit 473 I 1 IO_E8
+bit 472 O 1 IO_E8 471 1 Z
+bit 471 C 1 *
+bit 470 I 1 IO_D8
+bit 469 O 1 IO_D8 468 1 Z
+bit 468 C 1 *
+bit 467 I 1 IO_C8
+bit 466 O 1 IO_C8 465 1 Z
+bit 465 C 1 *
+bit 464 O 1 *
+bit 463 O 1 *
+bit 462 O 1 *
+bit 461 I 1 IO_B8
+bit 460 O 1 IO_B8 459 1 Z
+bit 459 C 1 *
+bit 458 I 1 IO_A8
+bit 457 O 1 IO_A8 456 1 Z
+bit 456 C 1 *
+bit 455 I 1 IO_J9
+bit 454 O 1 IO_J9 453 1 Z
+bit 453 C 1 *
+bit 452 I 1 IO_H9
+bit 451 O 1 IO_H9 450 1 Z
+bit 450 C 1 *
+bit 449 I 1 IO_F9
+bit 448 O 1 IO_F9 447 1 Z
+bit 447 C 1 *
+bit 446 I 1 IO_E9
+bit 445 O 1 IO_E9 444 1 Z
+bit 444 C 1 *
+bit 443 I 1 IO_D9
+bit 442 O 1 IO_D9 441 1 Z
+bit 441 C 1 *
+bit 440 I 1 IO_B9
+bit 439 O 1 IO_B9 438 1 Z
+bit 438 C 1 *
+bit 437 I 1 IO_A9
+bit 436 O 1 IO_A9 435 1 Z
+bit 435 C 1 *
+bit 434 O 1 *
+bit 433 O 1 *
+bit 432 O 1 *
+bit 431 I 1 IO_G10
+bit 430 O 1 IO_G10 429 1 Z
+bit 429 C 1 *
+bit 428 I 1 IO_F10
+bit 427 O 1 IO_F10 426 1 Z
+bit 426 C 1 *
+bit 425 I 1 IO_C10
+bit 424 O 1 IO_C10 423 1 Z
+bit 423 C 1 *
+bit 422 I 1 IO_B10
+bit 421 O 1 IO_B10 420 1 Z
+bit 420 C 1 *
+bit 419 O 1 *
+bit 418 O 1 *
+bit 417 O 1 *
+bit 416 I 1 IO_J10
+bit 415 O 1 IO_J10 414 1 Z
+bit 414 C 1 *
+bit 413 I 1 IO_K11
+bit 412 O 1 IO_K11 411 1 Z
+bit 411 C 1 *
+bit 410 I 1 IO_H11
+bit 409 O 1 IO_H11 408 1 Z
+bit 408 C 1 *
+bit 407 I 1 IO_G11
+bit 406 O 1 IO_G11 405 1 Z
+bit 405 C 1 *
+bit 404 O 1 *
+bit 403 O 1 *
+bit 402 O 1 *
+bit 401 I 1 IO_F11
+bit 400 O 1 IO_F11 399 1 Z
+bit 399 C 1 *
+bit 398 I 1 IO_E11
+bit 397 O 1 IO_E11 396 1 Z
+bit 396 C 1 *
+bit 395 I 1 IO_D11
+bit 394 O 1 IO_D11 393 1 Z
+bit 393 C 1 *
+bit 392 I 1 IO_C11
+bit 391 O 1 IO_C11 390 1 Z
+bit 390 C 1 *
+bit 389 O 1 *
+bit 388 O 1 *
+bit 387 O 1 *
+bit 386 I 1 IO_B11
+bit 385 O 1 IO_B11 384 1 Z
+bit 384 C 1 *
+bit 383 I 1 IO_A11
+bit 382 O 1 IO_A11 381 1 Z
+bit 381 C 1 *
+bit 380 I 1 IO_K12
+bit 379 O 1 IO_K12 378 1 Z
+bit 378 C 1 *
+bit 377 I 1 IO_J12
+bit 376 O 1 IO_J12 375 1 Z
+bit 375 C 1 *
+bit 374 O 1 *
+bit 373 O 1 *
+bit 372 O 1 *
+bit 371 I 1 IO_H12
+bit 370 O 1 IO_H12 369 1 Z
+bit 369 C 1 *
+bit 368 I 1 IO_G12
+bit 367 O 1 IO_G12 366 1 Z
+bit 366 C 1 *
+bit 365 I 1 IO_F12
+bit 364 O 1 IO_F12 363 1 Z
+bit 363 C 1 *
+bit 362 I 1 IO_E12
+bit 361 O 1 IO_E12 360 1 Z
+bit 360 C 1 *
+bit 359 O 1 *
+bit 358 O 1 *
+bit 357 O 1 *
+bit 356 I 1 IO_D12
+bit 355 O 1 IO_D12 354 1 Z
+bit 354 C 1 *
+bit 353 I 1 IO_C12
+bit 352 O 1 IO_C12 351 1 Z
+bit 351 C 1 *
+bit 350 I 1 IO_B12
+bit 349 O 1 IO_B12 348 1 Z
+bit 348 C 1 *
+bit 347 I 1 IO_A12
+bit 346 O 1 IO_A12 345 1 Z
+bit 345 C 1 *
+bit 344 I 1 IO_K13
+bit 343 O 1 IO_K13 342 1 Z
+bit 342 C 1 *
+bit 341 I 1 IO_J13
+bit 340 O 1 IO_J13 339 1 Z
+bit 339 C 1 *
+bit 338 I 1 IO_H13
+bit 337 O 1 IO_H13 336 1 Z
+bit 336 C 1 *
+bit 335 I 1 IO_F13
+bit 334 O 1 IO_F13 333 1 Z
+bit 333 C 1 *
+bit 332 I 1 IO_E13
+bit 331 O 1 IO_E13 330 1 Z
+bit 330 C 1 *
+bit 329 I 1 IO_D13
+bit 328 O 1 IO_D13 327 1 Z
+bit 327 C 1 *
+bit 326 I 1 IO_B13
+bit 325 O 1 IO_B13 324 1 Z
+bit 324 C 1 *
+bit 323 I 1 IO_A13
+bit 322 O 1 IO_A13 321 1 Z
+bit 321 C 1 *
+bit 320 I 1 IO_K14
+bit 319 O 1 IO_K14 318 1 Z
+bit 318 C 1 *
+bit 317 I 1 IO_J14
+bit 316 O 1 IO_J14 315 1 Z
+bit 315 C 1 *
+bit 314 I 1 IO_K15
+bit 313 O 1 IO_K15 312 1 Z
+bit 312 C 1 *
+bit 311 I 1 IO_G14
+bit 310 O 1 IO_G14 309 1 Z
+bit 309 C 1 *
+bit 308 I 1 IO_F14
+bit 307 O 1 IO_F14 306 1 Z
+bit 306 C 1 *
+bit 305 I 1 IO_C14
+bit 304 O 1 IO_C14 303 1 Z
+bit 303 C 1 *
+bit 302 I 1 IO_B14
+bit 301 O 1 IO_B14 300 1 Z
+bit 300 C 1 *
+bit 299 O 1 *
+bit 298 O 1 *
+bit 297 O 1 *
+bit 296 I 1 IO_J15
+bit 295 O 1 IO_J15 294 1 Z
+bit 294 C 1 *
+bit 293 I 1 IO_H15
+bit 292 O 1 IO_H15 291 1 Z
+bit 291 C 1 *
+bit 290 I 1 IO_G15
+bit 289 O 1 IO_G15 288 1 Z
+bit 288 C 1 *
+bit 287 I 1 IO_F15
+bit 286 O 1 IO_F15 285 1 Z
+bit 285 C 1 *
+bit 284 I 1 IO_E15
+bit 283 O 1 IO_E15 282 1 Z
+bit 282 C 1 *
+bit 281 I 1 IO_D15
+bit 280 O 1 IO_D15 279 1 Z
+bit 279 C 1 *
+bit 278 I 1 IO_C15
+bit 277 O 1 IO_C15 276 1 Z
+bit 276 C 1 *
+bit 275 I 1 IO_B15
+bit 274 O 1 IO_B15 273 1 Z
+bit 273 C 1 *
+bit 272 I 1 IO_A15
+bit 271 O 1 IO_A15 270 1 Z
+bit 270 C 1 *
+bit 269 I 1 IO_A16
+bit 268 O 1 IO_A16 267 1 Z
+bit 267 C 1 *
+bit 266 I 1 IO_B16
+bit 265 O 1 IO_B16 264 1 Z
+bit 264 C 1 *
+bit 263 I 1 IO_C16
+bit 262 O 1 IO_C16 261 1 Z
+bit 261 C 1 *
+bit 260 I 1 IO_D16
+bit 259 O 1 IO_D16 258 1 Z
+bit 258 C 1 *
+bit 257 I 1 IO_E16
+bit 256 O 1 IO_E16 255 1 Z
+bit 255 C 1 *
+bit 254 I 1 IO_F16
+bit 253 O 1 IO_F16 252 1 Z
+bit 252 C 1 *
+bit 251 I 1 IO_G16
+bit 250 O 1 IO_G16 249 1 Z
+bit 249 C 1 *
+bit 248 I 1 IO_H16
+bit 247 O 1 IO_H16 246 1 Z
+bit 246 C 1 *
+bit 245 I 1 IO_J16
+bit 244 O 1 IO_J16 243 1 Z
+bit 243 C 1 *
+bit 242 I 1 IO_K16
+bit 241 O 1 IO_K16 240 1 Z
+bit 240 C 1 *
+bit 239 I 1 IO_J17
+bit 238 O 1 IO_J17 237 1 Z
+bit 237 C 1 *
+bit 236 I 1 IO_B17
+bit 235 O 1 IO_B17 234 1 Z
+bit 234 C 1 *
+bit 233 I 1 IO_C17
+bit 232 O 1 IO_C17 231 1 Z
+bit 231 C 1 *
+bit 230 I 1 IO_F17
+bit 229 O 1 IO_F17 228 1 Z
+bit 228 C 1 *
+bit 227 I 1 IO_G17
+bit 226 O 1 IO_G17 225 1 Z
+bit 225 C 1 *
+bit 224 O 1 *
+bit 223 O 1 *
+bit 222 O 1 *
+bit 221 I 1 IO_K17
+bit 220 O 1 IO_K17 219 1 Z
+bit 219 C 1 *
+bit 218 I 1 IO_K18
+bit 217 O 1 IO_K18 216 1 Z
+bit 216 C 1 *
+bit 215 I 1 IO_A18
+bit 214 O 1 IO_A18 213 1 Z
+bit 213 C 1 *
+bit 212 I 1 IO_B18
+bit 211 O 1 IO_B18 210 1 Z
+bit 210 C 1 *
+bit 209 O 1 *
+bit 208 O 1 *
+bit 207 O 1 *
+bit 206 I 1 IO_D18
+bit 205 O 1 IO_D18 204 1 Z
+bit 204 C 1 *
+bit 203 I 1 IO_E18
+bit 202 O 1 IO_E18 201 1 Z
+bit 201 C 1 *
+bit 200 I 1 IO_H18
+bit 199 O 1 IO_H18 198 1 Z
+bit 198 C 1 *
+bit 197 I 1 IO_J18
+bit 196 O 1 IO_J18 195 1 Z
+bit 195 C 1 *
+bit 194 I 1 IO_F18
+bit 193 O 1 IO_F18 192 1 Z
+bit 192 C 1 *
+bit 191 I 1 IO_A19
+bit 190 O 1 IO_A19 189 1 Z
+bit 189 C 1 *
+bit 188 I 1 IO_B19
+bit 187 O 1 IO_B19 186 1 Z
+bit 186 C 1 *
+bit 185 I 1 IO_C19
+bit 184 O 1 IO_C19 183 1 Z
+bit 183 C 1 *
+bit 182 I 1 IO_D19
+bit 181 O 1 IO_D19 180 1 Z
+bit 180 C 1 *
+bit 179 O 1 *
+bit 178 O 1 *
+bit 177 O 1 *
+bit 176 I 1 IO_E19
+bit 175 O 1 IO_E19 174 1 Z
+bit 174 C 1 *
+bit 173 I 1 IO_F19
+bit 172 O 1 IO_F19 171 1 Z
+bit 171 C 1 *
+bit 170 I 1 IO_G19
+bit 169 O 1 IO_G19 168 1 Z
+bit 168 C 1 *
+bit 167 I 1 IO_H19
+bit 166 O 1 IO_H19 165 1 Z
+bit 165 C 1 *
+bit 164 O 1 *
+bit 163 O 1 *
+bit 162 O 1 *
+bit 161 I 1 IO_J19
+bit 160 O 1 IO_J19 159 1 Z
+bit 159 C 1 *
+bit 158 I 1 IO_K19
+bit 157 O 1 IO_K19 156 1 Z
+bit 156 C 1 *
+bit 155 I 1 IO_A20
+bit 154 O 1 IO_A20 153 1 Z
+bit 153 C 1 *
+bit 152 I 1 IO_B20
+bit 151 O 1 IO_B20 150 1 Z
+bit 150 C 1 *
+bit 149 O 1 *
+bit 148 O 1 *
+bit 147 O 1 *
+bit 146 I 1 IO_C20
+bit 145 O 1 IO_C20 144 1 Z
+bit 144 C 1 *
+bit 143 I 1 IO_D20
+bit 142 O 1 IO_D20 141 1 Z
+bit 141 C 1 *
+bit 140 I 1 IO_E20
+bit 139 O 1 IO_E20 138 1 Z
+bit 138 C 1 *
+bit 137 I 1 IO_F20
+bit 136 O 1 IO_F20 135 1 Z
+bit 135 C 1 *
+bit 134 O 1 *
+bit 133 O 1 *
+bit 132 O 1 *
+bit 131 I 1 IO_G20
+bit 130 O 1 IO_G20 129 1 Z
+bit 129 C 1 *
+bit 128 I 1 IO_H20
+bit 127 O 1 IO_H20 126 1 Z
+bit 126 C 1 *
+bit 125 I 1 IO_B21
+bit 124 O 1 IO_B21 123 1 Z
+bit 123 C 1 *
+bit 122 I 1 IO_C21
+bit 121 O 1 IO_C21 120 1 Z
+bit 120 C 1 *
+bit 119 I 1 IO_K20
+bit 118 O 1 IO_K20 117 1 Z
+bit 117 C 1 *
+bit 116 I 1 IO_F21
+bit 115 O 1 IO_F21 114 1 Z
+bit 114 C 1 *
+bit 113 I 1 IO_G21
+bit 112 O 1 IO_G21 111 1 Z
+bit 111 C 1 *
+bit 110 I 1 IO_A22
+bit 109 O 1 IO_A22 108 1 Z
+bit 108 C 1 *
+bit 107 I 1 IO_B22
+bit 106 O 1 IO_B22 105 1 Z
+bit 105 C 1 *
+bit 104 I 1 IO_J21
+bit 103 O 1 IO_J21 102 1 Z
+bit 102 C 1 *
+bit 101 I 1 IO_D22
+bit 100 O 1 IO_D22 99 1 Z
+bit 99 C 1 *
+bit 98 I 1 IO_E22
+bit 97 O 1 IO_E22 96 1 Z
+bit 96 C 1 *
+bit 95 I 1 IO_F22
+bit 94 O 1 IO_F22 93 1 Z
+bit 93 C 1 *
+bit 92 I 1 IO_E23
+bit 91 O 1 IO_E23 90 1 Z
+bit 90 C 1 *
+bit 89 O 1 *
+bit 88 O 1 *
+bit 87 O 1 *
+bit 86 I 1 IO_H22
+bit 85 O 1 IO_H22 84 1 Z
+bit 84 C 1 *
+bit 83 I 1 IO_J22
+bit 82 O 1 IO_J22 81 1 Z
+bit 81 C 1 *
+bit 80 I 1 IO_A23
+bit 79 O 1 IO_A23 78 1 Z
+bit 78 C 1 *
+bit 77 I 1 IO_B23
+bit 76 O 1 IO_B23 75 1 Z
+bit 75 C 1 *
+bit 74 O 1 *
+bit 73 O 1 *
+bit 72 O 1 *
+bit 71 I 1 IO_C23
+bit 70 O 1 IO_C23 69 1 Z
+bit 69 C 1 *
+bit 68 I 1 IO_D23
+bit 67 O 1 IO_D23 66 1 Z
+bit 66 C 1 *
+bit 65 I 1 IO_F23
+bit 64 O 1 IO_F23 63 1 Z
+bit 63 C 1 *
+bit 62 I 1 IO_G23
+bit 61 O 1 IO_G23 60 1 Z
+bit 60 C 1 *
+bit 59 O 1 *
+bit 58 O 1 *
+bit 57 O 1 *
+bit 56 I 1 IO_H23
+bit 55 O 1 IO_H23 54 1 Z
+bit 54 C 1 *
+bit 53 I 1 IO_G24
+bit 52 O 1 IO_G24 51 1 Z
+bit 51 C 1 *
+bit 50 I 1 IO_A24
+bit 49 O 1 IO_A24 48 1 Z
+bit 48 C 1 *
+bit 47 I 1 IO_B24
+bit 46 O 1 IO_B24 45 1 Z
+bit 45 C 1 *
+bit 44 O 1 *
+bit 43 O 1 *
+bit 42 O 1 *
+bit 41 I 1 IO_C24
+bit 40 O 1 IO_C24 39 1 Z
+bit 39 C 1 *
+bit 38 I 1 IO_D24
+bit 37 O 1 IO_D24 36 1 Z
+bit 36 C 1 *
+bit 35 I 1 IO_F24
+bit 34 O 1 IO_F24 33 1 Z
+bit 33 C 1 *
+bit 32 I 1 IO_F25
+bit 31 O 1 IO_F25 30 1 Z
+bit 30 C 1 *
+bit 29 I 1 IO_E25
+bit 28 O 1 IO_E25 27 1 Z
+bit 27 C 1 *
+bit 26 I 1 IO_B25
+bit 25 O 1 IO_B25 24 1 Z
+bit 24 C 1 *
+bit 23 I 1 IO_C25
+bit 22 O 1 IO_C25 21 1 Z
+bit 21 C 1 *
+bit 20 I 1 IO_A26
+bit 19 O 1 IO_A26 18 1 Z
+bit 18 C 1 *
+bit 17 I 1 IO_B26
+bit 16 O 1 IO_B26 15 1 Z
+bit 15 C 1 *
+bit 14 O 1 *
+bit 13 O 1 *
+bit 12 O 1 *
+bit 11 I 1 IO_D26
+bit 10 O 1 IO_D26 9 1 Z
+bit 9 C 1 *
+bit 8 I 1 IO_C27
+bit 7 O 1 IO_C27 6 1 Z
+bit 6 C 1 *
+bit 5 I 1 IO_A27
+bit 4 O 1 IO_A27 3 1 Z
+bit 3 C 1 *
+bit 2 I 1 IO_B27
+bit 1 O 1 IO_B27 0 1 Z
+bit 0 C 1 *
--- /dev/null
+signal GND1
+signal GND2
+signal GND3
+signal GND4
+signal GND5
+signal GND6
+signal GND7
+signal GND8
+signal GND9
+signal GND10
+signal GND11
+signal GND12
+signal GND13
+signal GND14
+signal GND15
+signal GND16
+signal GND17
+signal GND18
+signal GND19
+signal GND20
+signal GND21
+signal GND22
+signal GND23
+signal GND24
+signal GND25
+signal GND26
+signal GND27
+signal GND28
+signal GND29
+signal GND30
+signal GND31
+signal GND32
+signal GND33
+signal GND34
+signal GND35
+signal GND36
+signal GND37
+signal GND38
+signal GND39
+signal GND40
+signal GND41
+signal GND42
+signal GND43
+signal GND44
+signal GND45
+signal GND46
+signal GND47
+signal GND48
+signal GND49
+signal GND50
+signal GND51
+signal GND52
+signal GND53
+signal GND54
+signal GND55
+signal GND56
+signal GND57
+signal GND58
+signal GND59
+signal GND60
+signal GND61
+signal GND62
+signal GND63
+signal GND64
+signal GND65
+signal GND66
+signal GND67
+signal GND68
+signal GND69
+signal GND70
+signal GND71
+signal GND72
+signal GND73
+signal GND74
+signal GND75
+signal GND76
+signal GND77
+signal GND78
+signal GND79
+signal GND80
+signal GND81
+signal GND82
+signal GND83
+signal GND84
+signal GND85
+signal GND86
+signal GND87
+signal GND88
+signal GND89
+signal GND90
+signal GND91
+signal GND92
+signal GND93
+signal GND94
+signal GND95
+signal GND96
+signal GND97
+signal GND98
+signal GND99
+signal GND100
+signal GND101
+signal GND102
+signal GND103
+signal GND104
+signal GND105
+signal GND106
+signal GND107
+signal GND108
+signal GND109
+signal GND110
+signal GND111
+signal GND112
+signal GND113
+signal GND114
+signal GND115
+signal GND116
+signal GND117
+signal GND118
+signal GND119
+signal GND120
+signal GND121
+signal GND122
+signal GND123
+signal GND124
+signal GND125
+signal GND126
+signal GND127
+signal GND128
+signal GND129
+signal GND130
+signal GND131
+signal GND132
+signal GND133
+signal GND134
+signal GND135
+signal GND136
+signal GND137
+signal GND138
+signal GND139
+signal GND140
+signal GND141
+signal GND142
+signal GND143
+signal GND144
+signal GND145
+signal GND146
+signal GND147
+signal GND148
+signal GND149
+signal NC1
+signal NC2
+signal NC3
+signal NC4
+signal NC5
+signal CCLK_PAD654
+signal DONE_PAD653
+signal HSWAP_EN_PAD137
+signal M0_PAD382
+signal M1_PAD381
+signal M2_PAD383
+signal PROG_B
+signal TCK
+signal TDI
+signal TDO
+signal TMS
+signal VCCAUX1
+signal VCCAUX2
+signal VCCAUX3
+signal VCCAUX4
+signal VCCAUX5
+signal VCCAUX6
+signal VCCAUX7
+signal VCCAUX8
+signal VCCAUX9
+signal VCCAUX10
+signal VCCAUX11
+signal VCCAUX12
+signal VCCAUX13
+signal VCCAUX14
+signal VCCAUX15
+signal VCCAUX16
+signal VCCAUX17
+signal VCCAUX18
+signal VCCAUX19
+signal VCCAUX20
+signal VCCAUX21
+signal VCCAUX22
+signal VCCAUX23
+signal VCCAUX24
+signal VCCAUX25
+signal VCCAUX26
+signal VCCAUX27
+signal VCCAUX28
+signal VCCINT1
+signal VCCINT2
+signal VCCINT3
+signal VCCINT4
+signal VCCINT5
+signal VCCINT6
+signal VCCINT7
+signal VCCINT8
+signal VCCINT9
+signal VCCINT10
+signal VCCINT11
+signal VCCINT12
+signal VCCINT13
+signal VCCINT14
+signal VCCINT15
+signal VCCINT16
+signal VCCINT17
+signal VCCINT18
+signal VCCINT19
+signal VCCINT20
+signal VCCINT21
+signal VCCINT22
+signal VCCINT23
+signal VCCINT24
+signal VCCINT25
+signal VCCINT26
+signal VCCINT27
+signal VCCINT28
+signal VCCINT29
+signal VCCINT30
+signal VCCINT31
+signal VCCINT32
+signal VCCINT33
+signal VCCINT34
+signal VCCINT35
+signal VCCINT36
+signal VCCO01
+signal VCCO02
+signal VCCO03
+signal VCCO04
+signal VCCO05
+signal VCCO06
+signal VCCO07
+signal VCCO08
+signal VCCO09
+signal VCCO010
+signal VCCO011
+signal VCCO012
+signal VCCO11
+signal VCCO12
+signal VCCO13
+signal VCCO14
+signal VCCO15
+signal VCCO16
+signal VCCO17
+signal VCCO18
+signal VCCO19
+signal VCCO110
+signal VCCO111
+signal VCCO112
+signal VCCO21
+signal VCCO22
+signal VCCO23
+signal VCCO24
+signal VCCO25
+signal VCCO26
+signal VCCO27
+signal VCCO28
+signal VCCO29
+signal VCCO210
+signal VCCO31
+signal VCCO32
+signal VCCO33
+signal VCCO34
+signal VCCO35
+signal VCCO36
+signal VCCO37
+signal VCCO38
+signal VCCO39
+signal VCCO310
+signal VCCO41
+signal VCCO42
+signal VCCO43
+signal VCCO44
+signal VCCO45
+signal VCCO46
+signal VCCO47
+signal VCCO48
+signal VCCO49
+signal VCCO410
+signal VCCO411
+signal VCCO412
+signal VCCO51
+signal VCCO52
+signal VCCO53
+signal VCCO54
+signal VCCO55
+signal VCCO56
+signal VCCO57
+signal VCCO58
+signal VCCO59
+signal VCCO510
+signal VCCO511
+signal VCCO512
+signal VCCO61
+signal VCCO62
+signal VCCO63
+signal VCCO64
+signal VCCO65
+signal VCCO66
+signal VCCO67
+signal VCCO68
+signal VCCO69
+signal VCCO610
+signal VCCO71
+signal VCCO72
+signal VCCO73
+signal VCCO74
+signal VCCO75
+signal VCCO76
+signal VCCO77
+signal VCCO78
+signal VCCO79
+signal VCCO710
+signal IO_PAD2
+signal IO_PAD3
+signal IO_PAD4
+signal IO_PAD5
+signal IO_PAD7
+signal IO_PAD9
+signal IO_PAD10
+signal IO_PAD11
+signal IO_PAD13
+signal IO_PAD14
+signal IO_PAD15
+signal IO_PAD17
+signal IO_PAD19
+signal IO_PAD21
+signal IO_PAD23
+signal IO_PAD25
+signal IO_PAD26
+signal IO_PAD27
+signal IO_PAD28
+signal IO_PAD29
+signal IO_PAD31
+signal IO_PAD33
+signal IO_PAD34
+signal IO_PAD35
+signal IO_PAD37
+signal IO_PAD38
+signal IO_PAD39
+signal IO_PAD41
+signal IO_PAD43
+signal IO_PAD45
+signal IO_PAD46
+signal IO_PAD47
+signal IO_PAD49
+signal IO_PAD50
+signal IO_PAD51
+signal IO_PAD53
+signal IO_PAD55
+signal IO_PAD57
+signal IO_PAD58
+signal IO_PAD59
+signal IO_PAD61
+signal IO_PAD62
+signal IO_PAD63
+signal IO_PAD65
+signal IO_PAD67
+signal IO_PAD69
+signal IO_PAD70
+signal IO_PAD71
+signal IO_PAD73
+signal IO_PAD74
+signal IO_PAD75
+signal IO_PAD77
+signal IO_PAD79
+signal IO_PAD80
+signal IO_PAD81
+signal IO_PAD83
+signal IO_PAD85
+signal IO_PAD87
+signal IO_PAD89
+signal IO_PAD91
+signal IO_PAD92
+signal IO_PAD93
+signal IO_PAD95
+signal IO_PAD97
+signal IO_PAD98
+signal IO_PAD99
+signal IO_PAD101
+signal IO_PAD102
+signal IO_PAD103
+signal IO_PAD104
+signal IO_PAD105
+signal IO_PAD107
+signal IO_PAD109
+signal IO_PAD111
+signal IO_PAD113
+signal IO_PAD115
+signal IO_PAD117
+signal IO_PAD119
+signal IO_PAD120
+signal IO_PAD121
+signal IO_PAD122
+signal IO_PAD123
+signal IO_PAD125
+signal IO_PAD127
+signal IO_PAD129
+signal IO_PAD130
+signal IO_PAD131
+signal IO_PAD133
+signal IO_PAD135
+signal IO_PAD136
+signal IO_PAD141
+signal IO_PAD142
+signal IO_PAD143
+signal IO_PAD145
+signal IO_PAD146
+signal IO_PAD147
+signal IO_PAD149
+signal IO_PAD150
+signal IO_PAD151
+signal IO_PAD153
+signal IO_PAD154
+signal IO_PAD155
+signal IO_PAD157
+signal IO_PAD159
+signal IO_PAD161
+signal IO_PAD163
+signal IO_PAD164
+signal IO_PAD165
+signal IO_PAD166
+signal IO_PAD167
+signal IO_PAD169
+signal IO_PAD171
+signal IO_PAD172
+signal IO_PAD173
+signal IO_PAD174
+signal IO_PAD175
+signal IO_PAD176
+signal IO_PAD177
+signal IO_PAD179
+signal IO_PAD181
+signal IO_PAD182
+signal IO_PAD183
+signal IO_PAD184
+signal IO_PAD185
+signal IO_PAD187
+signal IO_PAD188
+signal IO_PAD189
+signal IO_PAD191
+signal IO_PAD192
+signal IO_PAD193
+signal IO_PAD195
+signal IO_PAD196
+signal IO_PAD197
+signal IO_PAD198
+signal IO_PAD199
+signal IO_PAD201
+signal IO_PAD203
+signal IO_PAD204
+signal IO_PAD205
+signal IO_PAD206
+signal IO_PAD207
+signal IO_PAD208
+signal IO_PAD209
+signal IO_PAD210
+signal IO_PAD211
+signal IO_PAD213
+signal IO_PAD215
+signal IO_PAD217
+signal IO_PAD218
+signal IO_PAD219
+signal IO_PAD220
+signal IO_PAD221
+signal IO_PAD223
+signal IO_PAD225
+signal IO_PAD226
+signal IO_PAD227
+signal IO_PAD228
+signal IO_PAD229
+signal IO_PAD231
+signal IO_PAD233
+signal IO_PAD234
+signal IO_PAD235
+signal IO_PAD236
+signal IO_PAD237
+signal IO_PAD239
+signal IO_PAD240
+signal IO_PAD241
+signal IO_PAD243
+signal IO_PAD245
+signal IO_PAD247
+signal IO_PAD249
+signal IO_PAD250
+signal IO_PAD251
+signal IO_PAD252
+signal IO_PAD253
+signal IO_PAD255
+signal IO_PAD257
+signal IO_PAD258
+signal IO_PAD260
+signal IO_PAD261
+signal IO_PAD263
+signal IO_PAD265
+signal IO_PAD266
+signal IO_PAD267
+signal IO_PAD268
+signal IO_PAD269
+signal IO_PAD271
+signal IO_PAD273
+signal IO_PAD275
+signal IO_PAD277
+signal IO_PAD278
+signal IO_PAD279
+signal IO_PAD281
+signal IO_PAD282
+signal IO_PAD283
+signal IO_PAD284
+signal IO_PAD285
+signal IO_PAD287
+signal IO_PAD289
+signal IO_PAD290
+signal IO_PAD291
+signal IO_PAD292
+signal IO_PAD293
+signal IO_PAD295
+signal IO_PAD297
+signal IO_PAD298
+signal IO_PAD299
+signal IO_PAD300
+signal IO_PAD301
+signal IO_PAD303
+signal IO_PAD305
+signal IO_PAD307
+signal IO_PAD308
+signal IO_PAD309
+signal IO_PAD310
+signal IO_PAD311
+signal IO_PAD312
+signal IO_PAD313
+signal IO_PAD314
+signal IO_PAD315
+signal IO_PAD317
+signal IO_PAD319
+signal IO_PAD320
+signal IO_PAD321
+signal IO_PAD322
+signal IO_PAD323
+signal IO_PAD325
+signal IO_PAD326
+signal IO_PAD327
+signal IO_PAD329
+signal IO_PAD330
+signal IO_PAD331
+signal IO_PAD333
+signal IO_PAD334
+signal IO_PAD335
+signal IO_PAD336
+signal IO_PAD337
+signal IO_PAD339
+signal IO_PAD341
+signal IO_PAD342
+signal IO_PAD343
+signal IO_PAD344
+signal IO_PAD345
+signal IO_PAD346
+signal IO_PAD347
+signal IO_PAD349
+signal IO_PAD351
+signal IO_PAD352
+signal IO_PAD353
+signal IO_PAD354
+signal IO_PAD355
+signal IO_PAD357
+signal IO_PAD359
+signal IO_PAD361
+signal IO_PAD363
+signal IO_PAD364
+signal IO_PAD365
+signal IO_PAD367
+signal IO_PAD368
+signal IO_PAD369
+signal IO_PAD371
+signal IO_PAD372
+signal IO_PAD373
+signal IO_PAD375
+signal IO_PAD376
+signal IO_PAD377
+signal IO_PAD384
+signal IO_PAD385
+signal IO_PAD387
+signal IO_PAD389
+signal IO_PAD390
+signal IO_PAD391
+signal IO_PAD393
+signal IO_PAD395
+signal IO_PAD397
+signal IO_PAD398
+signal IO_PAD399
+signal IO_PAD400
+signal IO_PAD401
+signal IO_PAD403
+signal IO_PAD405
+signal IO_PAD406
+signal IO_PAD407
+signal IO_PAD409
+signal IO_PAD411
+signal IO_PAD413
+signal IO_PAD414
+signal IO_PAD415
+signal IO_PAD416
+signal IO_PAD417
+signal IO_PAD419
+signal IO_PAD420
+signal IO_PAD421
+signal IO_PAD423
+signal IO_PAD425
+signal IO_PAD426
+signal IO_PAD427
+signal IO_PAD429
+signal IO_PAD431
+signal IO_PAD433
+signal IO_PAD435
+signal IO_PAD437
+signal IO_PAD438
+signal IO_PAD439
+signal IO_PAD441
+signal IO_PAD443
+signal IO_PAD444
+signal IO_PAD445
+signal IO_PAD447
+signal IO_PAD448
+signal IO_PAD449
+signal IO_PAD451
+signal IO_PAD453
+signal IO_PAD455
+signal IO_PAD456
+signal IO_PAD457
+signal IO_PAD459
+signal IO_PAD460
+signal IO_PAD461
+signal IO_PAD463
+signal IO_PAD465
+signal IO_PAD467
+signal IO_PAD468
+signal IO_PAD469
+signal IO_PAD471
+signal IO_PAD472
+signal IO_PAD473
+signal IO_PAD475
+signal IO_PAD477
+signal IO_PAD479
+signal IO_PAD480
+signal IO_PAD481
+signal IO_PAD483
+signal IO_PAD484
+signal IO_PAD485
+signal IO_PAD487
+signal IO_PAD489
+signal IO_PAD490
+signal IO_PAD491
+signal IO_PAD492
+signal IO_PAD493
+signal IO_PAD495
+signal IO_PAD497
+signal IO_PAD499
+signal IO_PAD501
+signal IO_PAD503
+signal IO_PAD504
+signal IO_PAD505
+signal IO_PAD507
+signal IO_PAD508
+signal IO_PAD509
+signal IO_PAD511
+signal IO_PAD513
+signal IO_PAD514
+signal IO_PAD515
+signal IO_PAD516
+signal IO_PAD518
+signal IO_PAD519
+signal IO_PAD520
+signal IO_PAD521
+signal IO_PAD523
+signal IO_PAD525
+signal IO_PAD526
+signal IO_PAD527
+signal IO_PAD529
+signal IO_PAD530
+signal IO_PAD531
+signal IO_PAD533
+signal IO_PAD535
+signal IO_PAD537
+signal IO_PAD539
+signal IO_PAD541
+signal IO_PAD542
+signal IO_PAD543
+signal IO_PAD544
+signal IO_PAD545
+signal IO_PAD547
+signal IO_PAD549
+signal IO_PAD550
+signal IO_PAD551
+signal IO_PAD553
+signal IO_PAD554
+signal IO_PAD555
+signal IO_PAD557
+signal IO_PAD559
+signal IO_PAD561
+signal IO_PAD562
+signal IO_PAD563
+signal IO_PAD565
+signal IO_PAD566
+signal IO_PAD567
+signal IO_PAD569
+signal IO_PAD571
+signal IO_PAD573
+signal IO_PAD574
+signal IO_PAD575
+signal IO_PAD577
+signal IO_PAD578
+signal IO_PAD579
+signal IO_PAD581
+signal IO_PAD583
+signal IO_PAD585
+signal IO_PAD586
+signal IO_PAD587
+signal IO_PAD589
+signal IO_PAD590
+signal IO_PAD591
+signal IO_PAD593
+signal IO_PAD595
+signal IO_PAD596
+signal IO_PAD597
+signal IO_PAD599
+signal IO_PAD601
+signal IO_PAD603
+signal IO_PAD605
+signal IO_PAD607
+signal IO_PAD608
+signal IO_PAD609
+signal IO_PAD611
+signal IO_PAD613
+signal IO_PAD614
+signal IO_PAD615
+signal IO_PAD617
+signal IO_PAD618
+signal IO_PAD619
+signal IO_PAD620
+signal IO_PAD621
+signal IO_PAD623
+signal IO_PAD625
+signal IO_PAD627
+signal IO_PAD629
+signal IO_PAD631
+signal IO_PAD633
+signal IO_PAD635
+signal IO_PAD636
+signal IO_PAD637
+signal IO_PAD638
+signal IO_PAD639
+signal IO_PAD641
+signal IO_PAD643
+signal IO_PAD645
+signal IO_PAD646
+signal IO_PAD647
+signal IO_PAD649
+signal IO_PAD651
+signal IO_PAD652
+signal IO_PAD657
+signal IO_PAD658
+signal IO_PAD659
+signal IO_PAD661
+signal IO_PAD662
+signal IO_PAD663
+signal IO_PAD665
+signal IO_PAD666
+signal IO_PAD667
+signal IO_PAD669
+signal IO_PAD670
+signal IO_PAD671
+signal IO_PAD673
+signal IO_PAD675
+signal IO_PAD677
+signal IO_PAD679
+signal IO_PAD680
+signal IO_PAD681
+signal IO_PAD682
+signal IO_PAD683
+signal IO_PAD685
+signal IO_PAD687
+signal IO_PAD688
+signal IO_PAD689
+signal IO_PAD690
+signal IO_PAD691
+signal IO_PAD692
+signal IO_PAD693
+signal IO_PAD695
+signal IO_PAD697
+signal IO_PAD698
+signal IO_PAD699
+signal IO_PAD700
+signal IO_PAD701
+signal IO_PAD703
+signal IO_PAD704
+signal IO_PAD705
+signal IO_PAD707
+signal IO_PAD708
+signal IO_PAD709
+signal IO_PAD711
+signal IO_PAD712
+signal IO_PAD713
+signal IO_PAD714
+signal IO_PAD715
+signal IO_PAD717
+signal IO_PAD719
+signal IO_PAD720
+signal IO_PAD721
+signal IO_PAD722
+signal IO_PAD723
+signal IO_PAD724
+signal IO_PAD725
+signal IO_PAD726
+signal IO_PAD727
+signal IO_PAD729
+signal IO_PAD731
+signal IO_PAD733
+signal IO_PAD734
+signal IO_PAD735
+signal IO_PAD736
+signal IO_PAD737
+signal IO_PAD739
+signal IO_PAD741
+signal IO_PAD742
+signal IO_PAD743
+signal IO_PAD744
+signal IO_PAD745
+signal IO_PAD747
+signal IO_PAD749
+signal IO_PAD750
+signal IO_PAD751
+signal IO_PAD752
+signal IO_PAD753
+signal IO_PAD755
+signal IO_PAD756
+signal IO_PAD757
+signal IO_PAD759
+signal IO_PAD761
+signal IO_PAD763
+signal IO_PAD765
+signal IO_PAD766
+signal IO_PAD767
+signal IO_PAD768
+signal IO_PAD769
+signal IO_PAD771
+signal IO_PAD773
+signal IO_PAD774
+signal IO_PAD776
+signal IO_PAD777
+signal IO_PAD779
+signal IO_PAD781
+signal IO_PAD782
+signal IO_PAD783
+signal IO_PAD784
+signal IO_PAD785
+signal IO_PAD787
+signal IO_PAD789
+signal IO_PAD791
+signal IO_PAD793
+signal IO_PAD794
+signal IO_PAD795
+signal IO_PAD797
+signal IO_PAD798
+signal IO_PAD799
+signal IO_PAD800
+signal IO_PAD801
+signal IO_PAD803
+signal IO_PAD805
+signal IO_PAD806
+signal IO_PAD807
+signal IO_PAD808
+signal IO_PAD809
+signal IO_PAD811
+signal IO_PAD813
+signal IO_PAD814
+signal IO_PAD815
+signal IO_PAD816
+signal IO_PAD817
+signal IO_PAD819
+signal IO_PAD821
+signal IO_PAD823
+signal IO_PAD824
+signal IO_PAD825
+signal IO_PAD826
+signal IO_PAD827
+signal IO_PAD828
+signal IO_PAD829
+signal IO_PAD830
+signal IO_PAD831
+signal IO_PAD833
+signal IO_PAD835
+signal IO_PAD836
+signal IO_PAD837
+signal IO_PAD838
+signal IO_PAD839
+signal IO_PAD841
+signal IO_PAD842
+signal IO_PAD843
+signal IO_PAD845
+signal IO_PAD846
+signal IO_PAD847
+signal IO_PAD849
+signal IO_PAD850
+signal IO_PAD851
+signal IO_PAD852
+signal IO_PAD853
+signal IO_PAD855
+signal IO_PAD857
+signal IO_PAD858
+signal IO_PAD859
+signal IO_PAD860
+signal IO_PAD861
+signal IO_PAD862
+signal IO_PAD863
+signal IO_PAD865
+signal IO_PAD867
+signal IO_PAD868
+signal IO_PAD869
+signal IO_PAD870
+signal IO_PAD871
+signal IO_PAD873
+signal IO_PAD875
+signal IO_PAD877
+signal IO_PAD879
+signal IO_PAD880
+signal IO_PAD881
+signal IO_PAD883
+signal IO_PAD884
+signal IO_PAD885
+signal IO_PAD887
+signal IO_PAD888
+signal IO_PAD889
+signal IO_PAD891
+signal IO_PAD892
+signal IO_PAD893
+signal IO_PAD898
+signal IO_PAD899
+signal IO_PAD901
+signal IO_PAD903
+signal IO_PAD904
+signal IO_PAD905
+signal IO_PAD907
+signal IO_PAD909
+signal IO_PAD911
+signal IO_PAD912
+signal IO_PAD913
+signal IO_PAD914
+signal IO_PAD915
+signal IO_PAD917
+signal IO_PAD919
+signal IO_PAD920
+signal IO_PAD921
+signal IO_PAD923
+signal IO_PAD925
+signal IO_PAD927
+signal IO_PAD928
+signal IO_PAD929
+signal IO_PAD930
+signal IO_PAD931
+signal IO_PAD933
+signal IO_PAD934
+signal IO_PAD935
+signal IO_PAD937
+signal IO_PAD939
+signal IO_PAD940
+signal IO_PAD941
+signal IO_PAD943
+signal IO_PAD945
+signal IO_PAD947
+signal IO_PAD949
+signal IO_PAD951
+signal IO_PAD952
+signal IO_PAD953
+signal IO_PAD955
+signal IO_PAD957
+signal IO_PAD958
+signal IO_PAD959
+signal IO_PAD961
+signal IO_PAD962
+signal IO_PAD963
+signal IO_PAD965
+signal IO_PAD967
+signal IO_PAD969
+signal IO_PAD970
+signal IO_PAD971
+signal IO_PAD973
+signal IO_PAD974
+signal IO_PAD975
+signal IO_PAD977
+signal IO_PAD979
+signal IO_PAD981
+signal IO_PAD982
+signal IO_PAD983
+signal IO_PAD985
+signal IO_PAD986
+signal IO_PAD987
+signal IO_PAD989
+signal IO_PAD991
+signal IO_PAD993
+signal IO_PAD994
+signal IO_PAD995
+signal IO_PAD997
+signal IO_PAD998
+signal IO_PAD999
+signal IO_PAD1001
+signal IO_PAD1003
+signal IO_PAD1004
+signal IO_PAD1005
+signal IO_PAD1006
+signal IO_PAD1007
+signal IO_PAD1009
+signal IO_PAD1011
+signal IO_PAD1013
+signal IO_PAD1015
+signal IO_PAD1017
+signal IO_PAD1018
+signal IO_PAD1019
+signal IO_PAD1021
+signal IO_PAD1022
+signal IO_PAD1023
+signal IO_PAD1025
+signal IO_PAD1027
+signal IO_PAD1028
+signal IO_PAD1029
+
+register BSR 2243
+register BR 1
+register DIR 32
+
+instruction length 6
+
+instruction EXTEST 000000 BSR
+instruction SAMPLE/PRELOAD 000001 BSR
+instruction IDCODE 001001 DIR
+instruction BYPASS 111111 BR
+
+bit 2242 I 1 IO_PAD893
+bit 2241 O 1 IO_PAD893 2240 1 Z
+bit 2240 C 1 *
+bit 2239 I 1 IO_PAD892
+bit 2238 O 1 IO_PAD892 2237 1 Z
+bit 2237 C 1 *
+bit 2236 I 1 IO_PAD891
+bit 2235 O 1 IO_PAD891 2234 1 Z
+bit 2234 C 1 *
+bit 2233 I 1 IO_PAD889
+bit 2232 O 1 IO_PAD889 2231 1 Z
+bit 2231 C 1 *
+bit 2230 I 1 IO_PAD888
+bit 2229 O 1 IO_PAD888 2228 1 Z
+bit 2228 C 1 *
+bit 2227 I 1 IO_PAD887
+bit 2226 O 1 IO_PAD887 2225 1 Z
+bit 2225 C 1 *
+bit 2224 I 1 IO_PAD885
+bit 2223 O 1 IO_PAD885 2222 1 Z
+bit 2222 C 1 *
+bit 2221 I 1 IO_PAD884
+bit 2220 O 1 IO_PAD884 2219 1 Z
+bit 2219 C 1 *
+bit 2218 I 1 IO_PAD883
+bit 2217 O 1 IO_PAD883 2216 1 Z
+bit 2216 C 1 *
+bit 2215 I 1 IO_PAD881
+bit 2214 O 1 IO_PAD881 2213 1 Z
+bit 2213 C 1 *
+bit 2212 I 1 IO_PAD880
+bit 2211 O 1 IO_PAD880 2210 1 Z
+bit 2210 C 1 *
+bit 2209 I 1 IO_PAD879
+bit 2208 O 1 IO_PAD879 2207 1 Z
+bit 2207 C 1 *
+bit 2206 I 1 IO_PAD877
+bit 2205 O 1 IO_PAD877 2204 1 Z
+bit 2204 C 1 *
+bit 2203 O 1 *
+bit 2202 O 1 *
+bit 2201 O 1 *
+bit 2200 O 1 *
+bit 2199 O 1 *
+bit 2198 O 1 *
+bit 2197 I 1 IO_PAD875
+bit 2196 O 1 IO_PAD875 2195 1 Z
+bit 2195 C 1 *
+bit 2194 I 1 IO_PAD873
+bit 2193 O 1 IO_PAD873 2192 1 Z
+bit 2192 C 1 *
+bit 2191 I 1 IO_PAD871
+bit 2190 O 1 IO_PAD871 2189 1 Z
+bit 2189 C 1 *
+bit 2188 I 1 IO_PAD870
+bit 2187 O 1 IO_PAD870 2186 1 Z
+bit 2186 C 1 *
+bit 2185 I 1 IO_PAD869
+bit 2184 O 1 IO_PAD869 2183 1 Z
+bit 2183 C 1 *
+bit 2182 I 1 IO_PAD868
+bit 2181 O 1 IO_PAD868 2180 1 Z
+bit 2180 C 1 *
+bit 2179 I 1 IO_PAD867
+bit 2178 O 1 IO_PAD867 2177 1 Z
+bit 2177 C 1 *
+bit 2176 I 1 IO_PAD865
+bit 2175 O 1 IO_PAD865 2174 1 Z
+bit 2174 C 1 *
+bit 2173 I 1 IO_PAD863
+bit 2172 O 1 IO_PAD863 2171 1 Z
+bit 2171 C 1 *
+bit 2170 I 1 IO_PAD862
+bit 2169 O 1 IO_PAD862 2168 1 Z
+bit 2168 C 1 *
+bit 2167 I 1 IO_PAD861
+bit 2166 O 1 IO_PAD861 2165 1 Z
+bit 2165 C 1 *
+bit 2164 I 1 IO_PAD860
+bit 2163 O 1 IO_PAD860 2162 1 Z
+bit 2162 C 1 *
+bit 2161 I 1 IO_PAD859
+bit 2160 O 1 IO_PAD859 2159 1 Z
+bit 2159 C 1 *
+bit 2158 I 1 IO_PAD858
+bit 2157 O 1 IO_PAD858 2156 1 Z
+bit 2156 C 1 *
+bit 2155 I 1 IO_PAD857
+bit 2154 O 1 IO_PAD857 2153 1 Z
+bit 2153 C 1 *
+bit 2152 I 1 IO_PAD855
+bit 2151 O 1 IO_PAD855 2150 1 Z
+bit 2150 C 1 *
+bit 2149 I 1 IO_PAD853
+bit 2148 O 1 IO_PAD853 2147 1 Z
+bit 2147 C 1 *
+bit 2146 I 1 IO_PAD852
+bit 2145 O 1 IO_PAD852 2144 1 Z
+bit 2144 C 1 *
+bit 2143 I 1 IO_PAD851
+bit 2142 O 1 IO_PAD851 2141 1 Z
+bit 2141 C 1 *
+bit 2140 I 1 IO_PAD850
+bit 2139 O 1 IO_PAD850 2138 1 Z
+bit 2138 C 1 *
+bit 2137 I 1 IO_PAD849
+bit 2136 O 1 IO_PAD849 2135 1 Z
+bit 2135 C 1 *
+bit 2134 I 1 IO_PAD847
+bit 2133 O 1 IO_PAD847 2132 1 Z
+bit 2132 C 1 *
+bit 2131 I 1 IO_PAD846
+bit 2130 O 1 IO_PAD846 2129 1 Z
+bit 2129 C 1 *
+bit 2128 O 1 *
+bit 2127 O 1 *
+bit 2126 O 1 *
+bit 2125 O 1 *
+bit 2124 O 1 *
+bit 2123 O 1 *
+bit 2122 I 1 IO_PAD845
+bit 2121 O 1 IO_PAD845 2120 1 Z
+bit 2120 C 1 *
+bit 2119 I 1 IO_PAD843
+bit 2118 O 1 IO_PAD843 2117 1 Z
+bit 2117 C 1 *
+bit 2116 I 1 IO_PAD842
+bit 2115 O 1 IO_PAD842 2114 1 Z
+bit 2114 C 1 *
+bit 2113 I 1 IO_PAD841
+bit 2112 O 1 IO_PAD841 2111 1 Z
+bit 2111 C 1 *
+bit 2110 I 1 IO_PAD839
+bit 2109 O 1 IO_PAD839 2108 1 Z
+bit 2108 C 1 *
+bit 2107 I 1 IO_PAD838
+bit 2106 O 1 IO_PAD838 2105 1 Z
+bit 2105 C 1 *
+bit 2104 I 1 IO_PAD837
+bit 2103 O 1 IO_PAD837 2102 1 Z
+bit 2102 C 1 *
+bit 2101 I 1 IO_PAD836
+bit 2100 O 1 IO_PAD836 2099 1 Z
+bit 2099 C 1 *
+bit 2098 I 1 IO_PAD835
+bit 2097 O 1 IO_PAD835 2096 1 Z
+bit 2096 C 1 *
+bit 2095 I 1 IO_PAD833
+bit 2094 O 1 IO_PAD833 2093 1 Z
+bit 2093 C 1 *
+bit 2092 I 1 IO_PAD831
+bit 2091 O 1 IO_PAD831 2090 1 Z
+bit 2090 C 1 *
+bit 2089 I 1 IO_PAD830
+bit 2088 O 1 IO_PAD830 2087 1 Z
+bit 2087 C 1 *
+bit 2086 I 1 IO_PAD829
+bit 2085 O 1 IO_PAD829 2084 1 Z
+bit 2084 C 1 *
+bit 2083 I 1 IO_PAD828
+bit 2082 O 1 IO_PAD828 2081 1 Z
+bit 2081 C 1 *
+bit 2080 I 1 IO_PAD827
+bit 2079 O 1 IO_PAD827 2078 1 Z
+bit 2078 C 1 *
+bit 2077 I 1 IO_PAD826
+bit 2076 O 1 IO_PAD826 2075 1 Z
+bit 2075 C 1 *
+bit 2074 I 1 IO_PAD825
+bit 2073 O 1 IO_PAD825 2072 1 Z
+bit 2072 C 1 *
+bit 2071 I 1 IO_PAD824
+bit 2070 O 1 IO_PAD824 2069 1 Z
+bit 2069 C 1 *
+bit 2068 I 1 IO_PAD823
+bit 2067 O 1 IO_PAD823 2066 1 Z
+bit 2066 C 1 *
+bit 2065 I 1 IO_PAD821
+bit 2064 O 1 IO_PAD821 2063 1 Z
+bit 2063 C 1 *
+bit 2062 O 1 *
+bit 2061 O 1 *
+bit 2060 O 1 *
+bit 2059 O 1 *
+bit 2058 O 1 *
+bit 2057 O 1 *
+bit 2056 I 1 IO_PAD819
+bit 2055 O 1 IO_PAD819 2054 1 Z
+bit 2054 C 1 *
+bit 2053 I 1 IO_PAD817
+bit 2052 O 1 IO_PAD817 2051 1 Z
+bit 2051 C 1 *
+bit 2050 I 1 IO_PAD816
+bit 2049 O 1 IO_PAD816 2048 1 Z
+bit 2048 C 1 *
+bit 2047 I 1 IO_PAD815
+bit 2046 O 1 IO_PAD815 2045 1 Z
+bit 2045 C 1 *
+bit 2044 I 1 IO_PAD814
+bit 2043 O 1 IO_PAD814 2042 1 Z
+bit 2042 C 1 *
+bit 2041 I 1 IO_PAD813
+bit 2040 O 1 IO_PAD813 2039 1 Z
+bit 2039 C 1 *
+bit 2038 I 1 IO_PAD811
+bit 2037 O 1 IO_PAD811 2036 1 Z
+bit 2036 C 1 *
+bit 2035 I 1 IO_PAD809
+bit 2034 O 1 IO_PAD809 2033 1 Z
+bit 2033 C 1 *
+bit 2032 I 1 IO_PAD808
+bit 2031 O 1 IO_PAD808 2030 1 Z
+bit 2030 C 1 *
+bit 2029 I 1 IO_PAD807
+bit 2028 O 1 IO_PAD807 2027 1 Z
+bit 2027 C 1 *
+bit 2026 I 1 IO_PAD806
+bit 2025 O 1 IO_PAD806 2024 1 Z
+bit 2024 C 1 *
+bit 2023 I 1 IO_PAD805
+bit 2022 O 1 IO_PAD805 2021 1 Z
+bit 2021 C 1 *
+bit 2020 I 1 IO_PAD803
+bit 2019 O 1 IO_PAD803 2018 1 Z
+bit 2018 C 1 *
+bit 2017 I 1 IO_PAD801
+bit 2016 O 1 IO_PAD801 2015 1 Z
+bit 2015 C 1 *
+bit 2014 I 1 IO_PAD800
+bit 2013 O 1 IO_PAD800 2012 1 Z
+bit 2012 C 1 *
+bit 2011 I 1 IO_PAD799
+bit 2010 O 1 IO_PAD799 2009 1 Z
+bit 2009 C 1 *
+bit 2008 I 1 IO_PAD798
+bit 2007 O 1 IO_PAD798 2006 1 Z
+bit 2006 C 1 *
+bit 2005 I 1 IO_PAD797
+bit 2004 O 1 IO_PAD797 2003 1 Z
+bit 2003 C 1 *
+bit 2002 I 1 IO_PAD795
+bit 2001 O 1 IO_PAD795 2000 1 Z
+bit 2000 C 1 *
+bit 1999 I 1 IO_PAD794
+bit 1998 O 1 IO_PAD794 1997 1 Z
+bit 1997 C 1 *
+bit 1996 I 1 IO_PAD793
+bit 1995 O 1 IO_PAD793 1994 1 Z
+bit 1994 C 1 *
+bit 1993 I 1 IO_PAD791
+bit 1992 O 1 IO_PAD791 1991 1 Z
+bit 1991 C 1 *
+bit 1990 I 1 IO_PAD789
+bit 1989 O 1 IO_PAD789 1988 1 Z
+bit 1988 C 1 *
+bit 1987 O 1 *
+bit 1986 O 1 *
+bit 1985 O 1 *
+bit 1984 O 1 *
+bit 1983 O 1 *
+bit 1982 O 1 *
+bit 1981 I 1 IO_PAD787
+bit 1980 O 1 IO_PAD787 1979 1 Z
+bit 1979 C 1 *
+bit 1978 I 1 IO_PAD785
+bit 1977 O 1 IO_PAD785 1976 1 Z
+bit 1976 C 1 *
+bit 1975 I 1 IO_PAD784
+bit 1974 O 1 IO_PAD784 1973 1 Z
+bit 1973 C 1 *
+bit 1972 I 1 IO_PAD783
+bit 1971 O 1 IO_PAD783 1970 1 Z
+bit 1970 C 1 *
+bit 1969 I 1 IO_PAD782
+bit 1968 O 1 IO_PAD782 1967 1 Z
+bit 1967 C 1 *
+bit 1966 I 1 IO_PAD781
+bit 1965 O 1 IO_PAD781 1964 1 Z
+bit 1964 C 1 *
+bit 1963 I 1 IO_PAD779
+bit 1962 O 1 IO_PAD779 1961 1 Z
+bit 1961 C 1 *
+bit 1960 I 1 IO_PAD777
+bit 1959 O 1 IO_PAD777 1958 1 Z
+bit 1958 C 1 *
+bit 1957 I 1 IO_PAD776
+bit 1956 O 1 IO_PAD776 1955 1 Z
+bit 1955 C 1 *
+bit 1954 I 1 IO_PAD774
+bit 1953 O 1 IO_PAD774 1952 1 Z
+bit 1952 C 1 *
+bit 1951 I 1 IO_PAD773
+bit 1950 O 1 IO_PAD773 1949 1 Z
+bit 1949 C 1 *
+bit 1948 I 1 IO_PAD771
+bit 1947 O 1 IO_PAD771 1946 1 Z
+bit 1946 C 1 *
+bit 1945 I 1 IO_PAD769
+bit 1944 O 1 IO_PAD769 1943 1 Z
+bit 1943 C 1 *
+bit 1942 I 1 IO_PAD768
+bit 1941 O 1 IO_PAD768 1940 1 Z
+bit 1940 C 1 *
+bit 1939 I 1 IO_PAD767
+bit 1938 O 1 IO_PAD767 1937 1 Z
+bit 1937 C 1 *
+bit 1936 I 1 IO_PAD766
+bit 1935 O 1 IO_PAD766 1934 1 Z
+bit 1934 C 1 *
+bit 1933 I 1 IO_PAD765
+bit 1932 O 1 IO_PAD765 1931 1 Z
+bit 1931 C 1 *
+bit 1930 I 1 IO_PAD763
+bit 1929 O 1 IO_PAD763 1928 1 Z
+bit 1928 C 1 *
+bit 1927 O 1 *
+bit 1926 O 1 *
+bit 1925 O 1 *
+bit 1924 O 1 *
+bit 1923 O 1 *
+bit 1922 O 1 *
+bit 1921 I 1 IO_PAD761
+bit 1920 O 1 IO_PAD761 1919 1 Z
+bit 1919 C 1 *
+bit 1918 I 1 IO_PAD759
+bit 1917 O 1 IO_PAD759 1916 1 Z
+bit 1916 C 1 *
+bit 1915 I 1 IO_PAD757
+bit 1914 O 1 IO_PAD757 1913 1 Z
+bit 1913 C 1 *
+bit 1912 I 1 IO_PAD756
+bit 1911 O 1 IO_PAD756 1910 1 Z
+bit 1910 C 1 *
+bit 1909 I 1 IO_PAD755
+bit 1908 O 1 IO_PAD755 1907 1 Z
+bit 1907 C 1 *
+bit 1906 I 1 IO_PAD753
+bit 1905 O 1 IO_PAD753 1904 1 Z
+bit 1904 C 1 *
+bit 1903 I 1 IO_PAD752
+bit 1902 O 1 IO_PAD752 1901 1 Z
+bit 1901 C 1 *
+bit 1900 I 1 IO_PAD751
+bit 1899 O 1 IO_PAD751 1898 1 Z
+bit 1898 C 1 *
+bit 1897 I 1 IO_PAD750
+bit 1896 O 1 IO_PAD750 1895 1 Z
+bit 1895 C 1 *
+bit 1894 I 1 IO_PAD749
+bit 1893 O 1 IO_PAD749 1892 1 Z
+bit 1892 C 1 *
+bit 1891 I 1 IO_PAD747
+bit 1890 O 1 IO_PAD747 1889 1 Z
+bit 1889 C 1 *
+bit 1888 I 1 IO_PAD745
+bit 1887 O 1 IO_PAD745 1886 1 Z
+bit 1886 C 1 *
+bit 1885 I 1 IO_PAD744
+bit 1884 O 1 IO_PAD744 1883 1 Z
+bit 1883 C 1 *
+bit 1882 I 1 IO_PAD743
+bit 1881 O 1 IO_PAD743 1880 1 Z
+bit 1880 C 1 *
+bit 1879 I 1 IO_PAD742
+bit 1878 O 1 IO_PAD742 1877 1 Z
+bit 1877 C 1 *
+bit 1876 I 1 IO_PAD741
+bit 1875 O 1 IO_PAD741 1874 1 Z
+bit 1874 C 1 *
+bit 1873 I 1 IO_PAD739
+bit 1872 O 1 IO_PAD739 1871 1 Z
+bit 1871 C 1 *
+bit 1870 I 1 IO_PAD737
+bit 1869 O 1 IO_PAD737 1868 1 Z
+bit 1868 C 1 *
+bit 1867 I 1 IO_PAD736
+bit 1866 O 1 IO_PAD736 1865 1 Z
+bit 1865 C 1 *
+bit 1864 I 1 IO_PAD735
+bit 1863 O 1 IO_PAD735 1862 1 Z
+bit 1862 C 1 *
+bit 1861 I 1 IO_PAD734
+bit 1860 O 1 IO_PAD734 1859 1 Z
+bit 1859 C 1 *
+bit 1858 I 1 IO_PAD733
+bit 1857 O 1 IO_PAD733 1856 1 Z
+bit 1856 C 1 *
+bit 1855 I 1 IO_PAD731
+bit 1854 O 1 IO_PAD731 1853 1 Z
+bit 1853 C 1 *
+bit 1852 O 1 *
+bit 1851 O 1 *
+bit 1850 O 1 *
+bit 1849 O 1 *
+bit 1848 O 1 *
+bit 1847 O 1 *
+bit 1846 I 1 IO_PAD729
+bit 1845 O 1 IO_PAD729 1844 1 Z
+bit 1844 C 1 *
+bit 1843 I 1 IO_PAD727
+bit 1842 O 1 IO_PAD727 1841 1 Z
+bit 1841 C 1 *
+bit 1840 I 1 IO_PAD726
+bit 1839 O 1 IO_PAD726 1838 1 Z
+bit 1838 C 1 *
+bit 1837 I 1 IO_PAD725
+bit 1836 O 1 IO_PAD725 1835 1 Z
+bit 1835 C 1 *
+bit 1834 I 1 IO_PAD724
+bit 1833 O 1 IO_PAD724 1832 1 Z
+bit 1832 C 1 *
+bit 1831 I 1 IO_PAD723
+bit 1830 O 1 IO_PAD723 1829 1 Z
+bit 1829 C 1 *
+bit 1828 I 1 IO_PAD722
+bit 1827 O 1 IO_PAD722 1826 1 Z
+bit 1826 C 1 *
+bit 1825 I 1 IO_PAD721
+bit 1824 O 1 IO_PAD721 1823 1 Z
+bit 1823 C 1 *
+bit 1822 I 1 IO_PAD720
+bit 1821 O 1 IO_PAD720 1820 1 Z
+bit 1820 C 1 *
+bit 1819 I 1 IO_PAD719
+bit 1818 O 1 IO_PAD719 1817 1 Z
+bit 1817 C 1 *
+bit 1816 I 1 IO_PAD717
+bit 1815 O 1 IO_PAD717 1814 1 Z
+bit 1814 C 1 *
+bit 1813 I 1 IO_PAD715
+bit 1812 O 1 IO_PAD715 1811 1 Z
+bit 1811 C 1 *
+bit 1810 I 1 IO_PAD714
+bit 1809 O 1 IO_PAD714 1808 1 Z
+bit 1808 C 1 *
+bit 1807 I 1 IO_PAD713
+bit 1806 O 1 IO_PAD713 1805 1 Z
+bit 1805 C 1 *
+bit 1804 I 1 IO_PAD712
+bit 1803 O 1 IO_PAD712 1802 1 Z
+bit 1802 C 1 *
+bit 1801 I 1 IO_PAD711
+bit 1800 O 1 IO_PAD711 1799 1 Z
+bit 1799 C 1 *
+bit 1798 I 1 IO_PAD709
+bit 1797 O 1 IO_PAD709 1796 1 Z
+bit 1796 C 1 *
+bit 1795 I 1 IO_PAD708
+bit 1794 O 1 IO_PAD708 1793 1 Z
+bit 1793 C 1 *
+bit 1792 I 1 IO_PAD707
+bit 1791 O 1 IO_PAD707 1790 1 Z
+bit 1790 C 1 *
+bit 1789 I 1 IO_PAD705
+bit 1788 O 1 IO_PAD705 1787 1 Z
+bit 1787 C 1 *
+bit 1786 O 1 *
+bit 1785 O 1 *
+bit 1784 O 1 *
+bit 1783 O 1 *
+bit 1782 O 1 *
+bit 1781 O 1 *
+bit 1780 I 1 IO_PAD704
+bit 1779 O 1 IO_PAD704 1778 1 Z
+bit 1778 C 1 *
+bit 1777 I 1 IO_PAD703
+bit 1776 O 1 IO_PAD703 1775 1 Z
+bit 1775 C 1 *
+bit 1774 I 1 IO_PAD701
+bit 1773 O 1 IO_PAD701 1772 1 Z
+bit 1772 C 1 *
+bit 1771 I 1 IO_PAD700
+bit 1770 O 1 IO_PAD700 1769 1 Z
+bit 1769 C 1 *
+bit 1768 I 1 IO_PAD699
+bit 1767 O 1 IO_PAD699 1766 1 Z
+bit 1766 C 1 *
+bit 1765 I 1 IO_PAD698
+bit 1764 O 1 IO_PAD698 1763 1 Z
+bit 1763 C 1 *
+bit 1762 I 1 IO_PAD697
+bit 1761 O 1 IO_PAD697 1760 1 Z
+bit 1760 C 1 *
+bit 1759 I 1 IO_PAD695
+bit 1758 O 1 IO_PAD695 1757 1 Z
+bit 1757 C 1 *
+bit 1756 I 1 IO_PAD693
+bit 1755 O 1 IO_PAD693 1754 1 Z
+bit 1754 C 1 *
+bit 1753 I 1 IO_PAD692
+bit 1752 O 1 IO_PAD692 1751 1 Z
+bit 1751 C 1 *
+bit 1750 I 1 IO_PAD691
+bit 1749 O 1 IO_PAD691 1748 1 Z
+bit 1748 C 1 *
+bit 1747 I 1 IO_PAD690
+bit 1746 O 1 IO_PAD690 1745 1 Z
+bit 1745 C 1 *
+bit 1744 I 1 IO_PAD689
+bit 1743 O 1 IO_PAD689 1742 1 Z
+bit 1742 C 1 *
+bit 1741 I 1 IO_PAD688
+bit 1740 O 1 IO_PAD688 1739 1 Z
+bit 1739 C 1 *
+bit 1738 I 1 IO_PAD687
+bit 1737 O 1 IO_PAD687 1736 1 Z
+bit 1736 C 1 *
+bit 1735 I 1 IO_PAD685
+bit 1734 O 1 IO_PAD685 1733 1 Z
+bit 1733 C 1 *
+bit 1732 I 1 IO_PAD683
+bit 1731 O 1 IO_PAD683 1730 1 Z
+bit 1730 C 1 *
+bit 1729 I 1 IO_PAD682
+bit 1728 O 1 IO_PAD682 1727 1 Z
+bit 1727 C 1 *
+bit 1726 I 1 IO_PAD681
+bit 1725 O 1 IO_PAD681 1724 1 Z
+bit 1724 C 1 *
+bit 1723 I 1 IO_PAD680
+bit 1722 O 1 IO_PAD680 1721 1 Z
+bit 1721 C 1 *
+bit 1720 I 1 IO_PAD679
+bit 1719 O 1 IO_PAD679 1718 1 Z
+bit 1718 C 1 *
+bit 1717 I 1 IO_PAD677
+bit 1716 O 1 IO_PAD677 1715 1 Z
+bit 1715 C 1 *
+bit 1714 I 1 IO_PAD675
+bit 1713 O 1 IO_PAD675 1712 1 Z
+bit 1712 C 1 *
+bit 1711 O 1 *
+bit 1710 O 1 *
+bit 1709 O 1 *
+bit 1708 O 1 *
+bit 1707 O 1 *
+bit 1706 O 1 *
+bit 1705 I 1 IO_PAD673
+bit 1704 O 1 IO_PAD673 1703 1 Z
+bit 1703 C 1 *
+bit 1702 I 1 IO_PAD671
+bit 1701 O 1 IO_PAD671 1700 1 Z
+bit 1700 C 1 *
+bit 1699 I 1 IO_PAD670
+bit 1698 O 1 IO_PAD670 1697 1 Z
+bit 1697 C 1 *
+bit 1696 I 1 IO_PAD669
+bit 1695 O 1 IO_PAD669 1694 1 Z
+bit 1694 C 1 *
+bit 1693 I 1 IO_PAD667
+bit 1692 O 1 IO_PAD667 1691 1 Z
+bit 1691 C 1 *
+bit 1690 I 1 IO_PAD666
+bit 1689 O 1 IO_PAD666 1688 1 Z
+bit 1688 C 1 *
+bit 1687 I 1 IO_PAD665
+bit 1686 O 1 IO_PAD665 1685 1 Z
+bit 1685 C 1 *
+bit 1684 I 1 IO_PAD663
+bit 1683 O 1 IO_PAD663 1682 1 Z
+bit 1682 C 1 *
+bit 1681 I 1 IO_PAD662
+bit 1680 O 1 IO_PAD662 1679 1 Z
+bit 1679 C 1 *
+bit 1678 I 1 IO_PAD661
+bit 1677 O 1 IO_PAD661 1676 1 Z
+bit 1676 C 1 *
+bit 1675 I 1 IO_PAD659
+bit 1674 O 1 IO_PAD659 1673 1 Z
+bit 1673 C 1 *
+bit 1672 I 1 IO_PAD658
+bit 1671 O 1 IO_PAD658 1670 1 Z
+bit 1670 C 1 *
+bit 1669 I 1 IO_PAD657
+bit 1668 O 1 IO_PAD657 1667 1 Z
+bit 1667 C 1 *
+bit 1666 I 1 CCLK_PAD654
+bit 1665 O 1 CCLK_PAD654 1664 1 Z
+bit 1664 C 1 *
+bit 1663 I 1 DONE_PAD653
+bit 1662 O 1 DONE_PAD653 1661 1 Z
+bit 1661 C 1 *
+bit 1660 I 1 IO_PAD652
+bit 1659 O 1 IO_PAD652 1658 1 Z
+bit 1658 C 1 *
+bit 1657 I 1 IO_PAD651
+bit 1656 O 1 IO_PAD651 1655 1 Z
+bit 1655 C 1 *
+bit 1654 I 1 IO_PAD649
+bit 1653 O 1 IO_PAD649 1652 1 Z
+bit 1652 C 1 *
+bit 1651 I 1 IO_PAD647
+bit 1650 O 1 IO_PAD647 1649 1 Z
+bit 1649 C 1 *
+bit 1648 I 1 IO_PAD646
+bit 1647 O 1 IO_PAD646 1646 1 Z
+bit 1646 C 1 *
+bit 1645 I 1 IO_PAD645
+bit 1644 O 1 IO_PAD645 1643 1 Z
+bit 1643 C 1 *
+bit 1642 I 1 IO_PAD643
+bit 1641 O 1 IO_PAD643 1640 1 Z
+bit 1640 C 1 *
+bit 1639 I 1 IO_PAD641
+bit 1638 O 1 IO_PAD641 1637 1 Z
+bit 1637 C 1 *
+bit 1636 I 1 IO_PAD639
+bit 1635 O 1 IO_PAD639 1634 1 Z
+bit 1634 C 1 *
+bit 1633 I 1 IO_PAD638
+bit 1632 O 1 IO_PAD638 1631 1 Z
+bit 1631 C 1 *
+bit 1630 I 1 IO_PAD637
+bit 1629 O 1 IO_PAD637 1628 1 Z
+bit 1628 C 1 *
+bit 1627 I 1 IO_PAD636
+bit 1626 O 1 IO_PAD636 1625 1 Z
+bit 1625 C 1 *
+bit 1624 I 1 IO_PAD635
+bit 1623 O 1 IO_PAD635 1622 1 Z
+bit 1622 C 1 *
+bit 1621 I 1 IO_PAD633
+bit 1620 O 1 IO_PAD633 1619 1 Z
+bit 1619 C 1 *
+bit 1618 I 1 IO_PAD631
+bit 1617 O 1 IO_PAD631 1616 1 Z
+bit 1616 C 1 *
+bit 1615 I 1 IO_PAD629
+bit 1614 O 1 IO_PAD629 1613 1 Z
+bit 1613 C 1 *
+bit 1612 I 1 IO_PAD627
+bit 1611 O 1 IO_PAD627 1610 1 Z
+bit 1610 C 1 *
+bit 1609 I 1 IO_PAD625
+bit 1608 O 1 IO_PAD625 1607 1 Z
+bit 1607 C 1 *
+bit 1606 I 1 IO_PAD623
+bit 1605 O 1 IO_PAD623 1604 1 Z
+bit 1604 C 1 *
+bit 1603 I 1 IO_PAD621
+bit 1602 O 1 IO_PAD621 1601 1 Z
+bit 1601 C 1 *
+bit 1600 I 1 IO_PAD620
+bit 1599 O 1 IO_PAD620 1598 1 Z
+bit 1598 C 1 *
+bit 1597 I 1 IO_PAD619
+bit 1596 O 1 IO_PAD619 1595 1 Z
+bit 1595 C 1 *
+bit 1594 I 1 IO_PAD618
+bit 1593 O 1 IO_PAD618 1592 1 Z
+bit 1592 C 1 *
+bit 1591 I 1 IO_PAD617
+bit 1590 O 1 IO_PAD617 1589 1 Z
+bit 1589 C 1 *
+bit 1588 I 1 IO_PAD615
+bit 1587 O 1 IO_PAD615 1586 1 Z
+bit 1586 C 1 *
+bit 1585 I 1 IO_PAD614
+bit 1584 O 1 IO_PAD614 1583 1 Z
+bit 1583 C 1 *
+bit 1582 I 1 IO_PAD613
+bit 1581 O 1 IO_PAD613 1580 1 Z
+bit 1580 C 1 *
+bit 1579 I 1 IO_PAD611
+bit 1578 O 1 IO_PAD611 1577 1 Z
+bit 1577 C 1 *
+bit 1576 I 1 IO_PAD609
+bit 1575 O 1 IO_PAD609 1574 1 Z
+bit 1574 C 1 *
+bit 1573 I 1 IO_PAD608
+bit 1572 O 1 IO_PAD608 1571 1 Z
+bit 1571 C 1 *
+bit 1570 I 1 IO_PAD607
+bit 1569 O 1 IO_PAD607 1568 1 Z
+bit 1568 C 1 *
+bit 1567 I 1 IO_PAD605
+bit 1566 O 1 IO_PAD605 1565 1 Z
+bit 1565 C 1 *
+bit 1564 I 1 IO_PAD603
+bit 1563 O 1 IO_PAD603 1562 1 Z
+bit 1562 C 1 *
+bit 1561 I 1 IO_PAD601
+bit 1560 O 1 IO_PAD601 1559 1 Z
+bit 1559 C 1 *
+bit 1558 I 1 IO_PAD599
+bit 1557 O 1 IO_PAD599 1556 1 Z
+bit 1556 C 1 *
+bit 1555 I 1 IO_PAD597
+bit 1554 O 1 IO_PAD597 1553 1 Z
+bit 1553 C 1 *
+bit 1552 I 1 IO_PAD596
+bit 1551 O 1 IO_PAD596 1550 1 Z
+bit 1550 C 1 *
+bit 1549 I 1 IO_PAD595
+bit 1548 O 1 IO_PAD595 1547 1 Z
+bit 1547 C 1 *
+bit 1546 I 1 IO_PAD593
+bit 1545 O 1 IO_PAD593 1544 1 Z
+bit 1544 C 1 *
+bit 1543 I 1 IO_PAD591
+bit 1542 O 1 IO_PAD591 1541 1 Z
+bit 1541 C 1 *
+bit 1540 I 1 IO_PAD590
+bit 1539 O 1 IO_PAD590 1538 1 Z
+bit 1538 C 1 *
+bit 1537 I 1 IO_PAD589
+bit 1536 O 1 IO_PAD589 1535 1 Z
+bit 1535 C 1 *
+bit 1534 I 1 IO_PAD587
+bit 1533 O 1 IO_PAD587 1532 1 Z
+bit 1532 C 1 *
+bit 1531 I 1 IO_PAD586
+bit 1530 O 1 IO_PAD586 1529 1 Z
+bit 1529 C 1 *
+bit 1528 I 1 IO_PAD585
+bit 1527 O 1 IO_PAD585 1526 1 Z
+bit 1526 C 1 *
+bit 1525 I 1 IO_PAD583
+bit 1524 O 1 IO_PAD583 1523 1 Z
+bit 1523 C 1 *
+bit 1522 I 1 IO_PAD581
+bit 1521 O 1 IO_PAD581 1520 1 Z
+bit 1520 C 1 *
+bit 1519 I 1 IO_PAD579
+bit 1518 O 1 IO_PAD579 1517 1 Z
+bit 1517 C 1 *
+bit 1516 I 1 IO_PAD578
+bit 1515 O 1 IO_PAD578 1514 1 Z
+bit 1514 C 1 *
+bit 1513 I 1 IO_PAD577
+bit 1512 O 1 IO_PAD577 1511 1 Z
+bit 1511 C 1 *
+bit 1510 I 1 IO_PAD575
+bit 1509 O 1 IO_PAD575 1508 1 Z
+bit 1508 C 1 *
+bit 1507 I 1 IO_PAD574
+bit 1506 O 1 IO_PAD574 1505 1 Z
+bit 1505 C 1 *
+bit 1504 I 1 IO_PAD573
+bit 1503 O 1 IO_PAD573 1502 1 Z
+bit 1502 C 1 *
+bit 1501 I 1 IO_PAD571
+bit 1500 O 1 IO_PAD571 1499 1 Z
+bit 1499 C 1 *
+bit 1498 I 1 IO_PAD569
+bit 1497 O 1 IO_PAD569 1496 1 Z
+bit 1496 C 1 *
+bit 1495 I 1 IO_PAD567
+bit 1494 O 1 IO_PAD567 1493 1 Z
+bit 1493 C 1 *
+bit 1492 I 1 IO_PAD566
+bit 1491 O 1 IO_PAD566 1490 1 Z
+bit 1490 C 1 *
+bit 1489 I 1 IO_PAD565
+bit 1488 O 1 IO_PAD565 1487 1 Z
+bit 1487 C 1 *
+bit 1486 I 1 IO_PAD563
+bit 1485 O 1 IO_PAD563 1484 1 Z
+bit 1484 C 1 *
+bit 1483 I 1 IO_PAD562
+bit 1482 O 1 IO_PAD562 1481 1 Z
+bit 1481 C 1 *
+bit 1480 I 1 IO_PAD561
+bit 1479 O 1 IO_PAD561 1478 1 Z
+bit 1478 C 1 *
+bit 1477 I 1 IO_PAD559
+bit 1476 O 1 IO_PAD559 1475 1 Z
+bit 1475 C 1 *
+bit 1474 I 1 IO_PAD557
+bit 1473 O 1 IO_PAD557 1472 1 Z
+bit 1472 C 1 *
+bit 1471 I 1 IO_PAD555
+bit 1470 O 1 IO_PAD555 1469 1 Z
+bit 1469 C 1 *
+bit 1468 I 1 IO_PAD554
+bit 1467 O 1 IO_PAD554 1466 1 Z
+bit 1466 C 1 *
+bit 1465 I 1 IO_PAD553
+bit 1464 O 1 IO_PAD553 1463 1 Z
+bit 1463 C 1 *
+bit 1462 I 1 IO_PAD551
+bit 1461 O 1 IO_PAD551 1460 1 Z
+bit 1460 C 1 *
+bit 1459 I 1 IO_PAD550
+bit 1458 O 1 IO_PAD550 1457 1 Z
+bit 1457 C 1 *
+bit 1456 I 1 IO_PAD549
+bit 1455 O 1 IO_PAD549 1454 1 Z
+bit 1454 C 1 *
+bit 1453 I 1 IO_PAD547
+bit 1452 O 1 IO_PAD547 1451 1 Z
+bit 1451 C 1 *
+bit 1450 I 1 IO_PAD545
+bit 1449 O 1 IO_PAD545 1448 1 Z
+bit 1448 C 1 *
+bit 1447 I 1 IO_PAD544
+bit 1446 O 1 IO_PAD544 1445 1 Z
+bit 1445 C 1 *
+bit 1444 I 1 IO_PAD543
+bit 1443 O 1 IO_PAD543 1442 1 Z
+bit 1442 C 1 *
+bit 1441 I 1 IO_PAD542
+bit 1440 O 1 IO_PAD542 1439 1 Z
+bit 1439 C 1 *
+bit 1438 I 1 IO_PAD541
+bit 1437 O 1 IO_PAD541 1436 1 Z
+bit 1436 C 1 *
+bit 1435 I 1 IO_PAD539
+bit 1434 O 1 IO_PAD539 1433 1 Z
+bit 1433 C 1 *
+bit 1432 I 1 IO_PAD537
+bit 1431 O 1 IO_PAD537 1430 1 Z
+bit 1430 C 1 *
+bit 1429 I 1 IO_PAD535
+bit 1428 O 1 IO_PAD535 1427 1 Z
+bit 1427 C 1 *
+bit 1426 I 1 IO_PAD533
+bit 1425 O 1 IO_PAD533 1424 1 Z
+bit 1424 C 1 *
+bit 1423 I 1 IO_PAD531
+bit 1422 O 1 IO_PAD531 1421 1 Z
+bit 1421 C 1 *
+bit 1420 I 1 IO_PAD530
+bit 1419 O 1 IO_PAD530 1418 1 Z
+bit 1418 C 1 *
+bit 1417 I 1 IO_PAD529
+bit 1416 O 1 IO_PAD529 1415 1 Z
+bit 1415 C 1 *
+bit 1414 I 1 IO_PAD527
+bit 1413 O 1 IO_PAD527 1412 1 Z
+bit 1412 C 1 *
+bit 1411 I 1 IO_PAD526
+bit 1410 O 1 IO_PAD526 1409 1 Z
+bit 1409 C 1 *
+bit 1408 I 1 IO_PAD525
+bit 1407 O 1 IO_PAD525 1406 1 Z
+bit 1406 C 1 *
+bit 1405 I 1 IO_PAD523
+bit 1404 O 1 IO_PAD523 1403 1 Z
+bit 1403 C 1 *
+bit 1402 I 1 IO_PAD521
+bit 1401 O 1 IO_PAD521 1400 1 Z
+bit 1400 C 1 *
+bit 1399 I 1 IO_PAD520
+bit 1398 O 1 IO_PAD520 1397 1 Z
+bit 1397 C 1 *
+bit 1396 I 1 IO_PAD519
+bit 1395 O 1 IO_PAD519 1394 1 Z
+bit 1394 C 1 *
+bit 1393 I 1 IO_PAD518
+bit 1392 O 1 IO_PAD518 1391 1 Z
+bit 1391 C 1 *
+bit 1390 I 1 IO_PAD516
+bit 1389 O 1 IO_PAD516 1388 1 Z
+bit 1388 C 1 *
+bit 1387 I 1 IO_PAD515
+bit 1386 O 1 IO_PAD515 1385 1 Z
+bit 1385 C 1 *
+bit 1384 I 1 IO_PAD514
+bit 1383 O 1 IO_PAD514 1382 1 Z
+bit 1382 C 1 *
+bit 1381 I 1 IO_PAD513
+bit 1380 O 1 IO_PAD513 1379 1 Z
+bit 1379 C 1 *
+bit 1378 I 1 IO_PAD511
+bit 1377 O 1 IO_PAD511 1376 1 Z
+bit 1376 C 1 *
+bit 1375 I 1 IO_PAD509
+bit 1374 O 1 IO_PAD509 1373 1 Z
+bit 1373 C 1 *
+bit 1372 I 1 IO_PAD508
+bit 1371 O 1 IO_PAD508 1370 1 Z
+bit 1370 C 1 *
+bit 1369 I 1 IO_PAD507
+bit 1368 O 1 IO_PAD507 1367 1 Z
+bit 1367 C 1 *
+bit 1366 I 1 IO_PAD505
+bit 1365 O 1 IO_PAD505 1364 1 Z
+bit 1364 C 1 *
+bit 1363 I 1 IO_PAD504
+bit 1362 O 1 IO_PAD504 1361 1 Z
+bit 1361 C 1 *
+bit 1360 I 1 IO_PAD503
+bit 1359 O 1 IO_PAD503 1358 1 Z
+bit 1358 C 1 *
+bit 1357 I 1 IO_PAD501
+bit 1356 O 1 IO_PAD501 1355 1 Z
+bit 1355 C 1 *
+bit 1354 I 1 IO_PAD499
+bit 1353 O 1 IO_PAD499 1352 1 Z
+bit 1352 C 1 *
+bit 1351 I 1 IO_PAD497
+bit 1350 O 1 IO_PAD497 1349 1 Z
+bit 1349 C 1 *
+bit 1348 I 1 IO_PAD495
+bit 1347 O 1 IO_PAD495 1346 1 Z
+bit 1346 C 1 *
+bit 1345 I 1 IO_PAD493
+bit 1344 O 1 IO_PAD493 1343 1 Z
+bit 1343 C 1 *
+bit 1342 I 1 IO_PAD492
+bit 1341 O 1 IO_PAD492 1340 1 Z
+bit 1340 C 1 *
+bit 1339 I 1 IO_PAD491
+bit 1338 O 1 IO_PAD491 1337 1 Z
+bit 1337 C 1 *
+bit 1336 I 1 IO_PAD490
+bit 1335 O 1 IO_PAD490 1334 1 Z
+bit 1334 C 1 *
+bit 1333 I 1 IO_PAD489
+bit 1332 O 1 IO_PAD489 1331 1 Z
+bit 1331 C 1 *
+bit 1330 I 1 IO_PAD487
+bit 1329 O 1 IO_PAD487 1328 1 Z
+bit 1328 C 1 *
+bit 1327 I 1 IO_PAD485
+bit 1326 O 1 IO_PAD485 1325 1 Z
+bit 1325 C 1 *
+bit 1324 I 1 IO_PAD484
+bit 1323 O 1 IO_PAD484 1322 1 Z
+bit 1322 C 1 *
+bit 1321 I 1 IO_PAD483
+bit 1320 O 1 IO_PAD483 1319 1 Z
+bit 1319 C 1 *
+bit 1318 I 1 IO_PAD481
+bit 1317 O 1 IO_PAD481 1316 1 Z
+bit 1316 C 1 *
+bit 1315 I 1 IO_PAD480
+bit 1314 O 1 IO_PAD480 1313 1 Z
+bit 1313 C 1 *
+bit 1312 I 1 IO_PAD479
+bit 1311 O 1 IO_PAD479 1310 1 Z
+bit 1310 C 1 *
+bit 1309 I 1 IO_PAD477
+bit 1308 O 1 IO_PAD477 1307 1 Z
+bit 1307 C 1 *
+bit 1306 I 1 IO_PAD475
+bit 1305 O 1 IO_PAD475 1304 1 Z
+bit 1304 C 1 *
+bit 1303 I 1 IO_PAD473
+bit 1302 O 1 IO_PAD473 1301 1 Z
+bit 1301 C 1 *
+bit 1300 I 1 IO_PAD472
+bit 1299 O 1 IO_PAD472 1298 1 Z
+bit 1298 C 1 *
+bit 1297 I 1 IO_PAD471
+bit 1296 O 1 IO_PAD471 1295 1 Z
+bit 1295 C 1 *
+bit 1294 I 1 IO_PAD469
+bit 1293 O 1 IO_PAD469 1292 1 Z
+bit 1292 C 1 *
+bit 1291 I 1 IO_PAD468
+bit 1290 O 1 IO_PAD468 1289 1 Z
+bit 1289 C 1 *
+bit 1288 I 1 IO_PAD467
+bit 1287 O 1 IO_PAD467 1286 1 Z
+bit 1286 C 1 *
+bit 1285 I 1 IO_PAD465
+bit 1284 O 1 IO_PAD465 1283 1 Z
+bit 1283 C 1 *
+bit 1282 I 1 IO_PAD463
+bit 1281 O 1 IO_PAD463 1280 1 Z
+bit 1280 C 1 *
+bit 1279 I 1 IO_PAD461
+bit 1278 O 1 IO_PAD461 1277 1 Z
+bit 1277 C 1 *
+bit 1276 I 1 IO_PAD460
+bit 1275 O 1 IO_PAD460 1274 1 Z
+bit 1274 C 1 *
+bit 1273 I 1 IO_PAD459
+bit 1272 O 1 IO_PAD459 1271 1 Z
+bit 1271 C 1 *
+bit 1270 I 1 IO_PAD457
+bit 1269 O 1 IO_PAD457 1268 1 Z
+bit 1268 C 1 *
+bit 1267 I 1 IO_PAD456
+bit 1266 O 1 IO_PAD456 1265 1 Z
+bit 1265 C 1 *
+bit 1264 I 1 IO_PAD455
+bit 1263 O 1 IO_PAD455 1262 1 Z
+bit 1262 C 1 *
+bit 1261 I 1 IO_PAD453
+bit 1260 O 1 IO_PAD453 1259 1 Z
+bit 1259 C 1 *
+bit 1258 I 1 IO_PAD451
+bit 1257 O 1 IO_PAD451 1256 1 Z
+bit 1256 C 1 *
+bit 1255 I 1 IO_PAD449
+bit 1254 O 1 IO_PAD449 1253 1 Z
+bit 1253 C 1 *
+bit 1252 I 1 IO_PAD448
+bit 1251 O 1 IO_PAD448 1250 1 Z
+bit 1250 C 1 *
+bit 1249 I 1 IO_PAD447
+bit 1248 O 1 IO_PAD447 1247 1 Z
+bit 1247 C 1 *
+bit 1246 I 1 IO_PAD445
+bit 1245 O 1 IO_PAD445 1244 1 Z
+bit 1244 C 1 *
+bit 1243 I 1 IO_PAD444
+bit 1242 O 1 IO_PAD444 1241 1 Z
+bit 1241 C 1 *
+bit 1240 I 1 IO_PAD443
+bit 1239 O 1 IO_PAD443 1238 1 Z
+bit 1238 C 1 *
+bit 1237 I 1 IO_PAD441
+bit 1236 O 1 IO_PAD441 1235 1 Z
+bit 1235 C 1 *
+bit 1234 I 1 IO_PAD439
+bit 1233 O 1 IO_PAD439 1232 1 Z
+bit 1232 C 1 *
+bit 1231 I 1 IO_PAD438
+bit 1230 O 1 IO_PAD438 1229 1 Z
+bit 1229 C 1 *
+bit 1228 I 1 IO_PAD437
+bit 1227 O 1 IO_PAD437 1226 1 Z
+bit 1226 C 1 *
+bit 1225 I 1 IO_PAD435
+bit 1224 O 1 IO_PAD435 1223 1 Z
+bit 1223 C 1 *
+bit 1222 I 1 IO_PAD433
+bit 1221 O 1 IO_PAD433 1220 1 Z
+bit 1220 C 1 *
+bit 1219 I 1 IO_PAD431
+bit 1218 O 1 IO_PAD431 1217 1 Z
+bit 1217 C 1 *
+bit 1216 I 1 IO_PAD429
+bit 1215 O 1 IO_PAD429 1214 1 Z
+bit 1214 C 1 *
+bit 1213 I 1 IO_PAD427
+bit 1212 O 1 IO_PAD427 1211 1 Z
+bit 1211 C 1 *
+bit 1210 I 1 IO_PAD426
+bit 1209 O 1 IO_PAD426 1208 1 Z
+bit 1208 C 1 *
+bit 1207 I 1 IO_PAD425
+bit 1206 O 1 IO_PAD425 1205 1 Z
+bit 1205 C 1 *
+bit 1204 I 1 IO_PAD423
+bit 1203 O 1 IO_PAD423 1202 1 Z
+bit 1202 C 1 *
+bit 1201 I 1 IO_PAD421
+bit 1200 O 1 IO_PAD421 1199 1 Z
+bit 1199 C 1 *
+bit 1198 I 1 IO_PAD420
+bit 1197 O 1 IO_PAD420 1196 1 Z
+bit 1196 C 1 *
+bit 1195 I 1 IO_PAD419
+bit 1194 O 1 IO_PAD419 1193 1 Z
+bit 1193 C 1 *
+bit 1192 I 1 IO_PAD417
+bit 1191 O 1 IO_PAD417 1190 1 Z
+bit 1190 C 1 *
+bit 1189 I 1 IO_PAD416
+bit 1188 O 1 IO_PAD416 1187 1 Z
+bit 1187 C 1 *
+bit 1186 I 1 IO_PAD415
+bit 1185 O 1 IO_PAD415 1184 1 Z
+bit 1184 C 1 *
+bit 1183 I 1 IO_PAD414
+bit 1182 O 1 IO_PAD414 1181 1 Z
+bit 1181 C 1 *
+bit 1180 I 1 IO_PAD413
+bit 1179 O 1 IO_PAD413 1178 1 Z
+bit 1178 C 1 *
+bit 1177 I 1 IO_PAD411
+bit 1176 O 1 IO_PAD411 1175 1 Z
+bit 1175 C 1 *
+bit 1174 I 1 IO_PAD409
+bit 1173 O 1 IO_PAD409 1172 1 Z
+bit 1172 C 1 *
+bit 1171 I 1 IO_PAD407
+bit 1170 O 1 IO_PAD407 1169 1 Z
+bit 1169 C 1 *
+bit 1168 I 1 IO_PAD406
+bit 1167 O 1 IO_PAD406 1166 1 Z
+bit 1166 C 1 *
+bit 1165 I 1 IO_PAD405
+bit 1164 O 1 IO_PAD405 1163 1 Z
+bit 1163 C 1 *
+bit 1162 I 1 IO_PAD403
+bit 1161 O 1 IO_PAD403 1160 1 Z
+bit 1160 C 1 *
+bit 1159 I 1 IO_PAD401
+bit 1158 O 1 IO_PAD401 1157 1 Z
+bit 1157 C 1 *
+bit 1156 I 1 IO_PAD400
+bit 1155 O 1 IO_PAD400 1154 1 Z
+bit 1154 C 1 *
+bit 1153 I 1 IO_PAD399
+bit 1152 O 1 IO_PAD399 1151 1 Z
+bit 1151 C 1 *
+bit 1150 I 1 IO_PAD398
+bit 1149 O 1 IO_PAD398 1148 1 Z
+bit 1148 C 1 *
+bit 1147 I 1 IO_PAD397
+bit 1146 O 1 IO_PAD397 1145 1 Z
+bit 1145 C 1 *
+bit 1144 I 1 IO_PAD395
+bit 1143 O 1 IO_PAD395 1142 1 Z
+bit 1142 C 1 *
+bit 1141 I 1 IO_PAD393
+bit 1140 O 1 IO_PAD393 1139 1 Z
+bit 1139 C 1 *
+bit 1138 I 1 IO_PAD391
+bit 1137 O 1 IO_PAD391 1136 1 Z
+bit 1136 C 1 *
+bit 1135 I 1 IO_PAD390
+bit 1134 O 1 IO_PAD390 1133 1 Z
+bit 1133 C 1 *
+bit 1132 I 1 IO_PAD389
+bit 1131 O 1 IO_PAD389 1130 1 Z
+bit 1130 C 1 *
+bit 1129 I 1 IO_PAD387
+bit 1128 O 1 IO_PAD387 1127 1 Z
+bit 1127 C 1 *
+bit 1126 I 1 IO_PAD385
+bit 1125 O 1 IO_PAD385 1124 1 Z
+bit 1124 C 1 *
+bit 1123 I 1 IO_PAD384
+bit 1122 O 1 IO_PAD384 1121 1 Z
+bit 1121 C 1 *
+bit 1120 I 1 M2_PAD383
+bit 1119 I 1 M0_PAD382
+bit 1118 I 1 M1_PAD381
+bit 1117 I 1 IO_PAD377
+bit 1116 O 1 IO_PAD377 1115 1 Z
+bit 1115 C 1 *
+bit 1114 I 1 IO_PAD376
+bit 1113 O 1 IO_PAD376 1112 1 Z
+bit 1112 C 1 *
+bit 1111 I 1 IO_PAD375
+bit 1110 O 1 IO_PAD375 1109 1 Z
+bit 1109 C 1 *
+bit 1108 I 1 IO_PAD373
+bit 1107 O 1 IO_PAD373 1106 1 Z
+bit 1106 C 1 *
+bit 1105 I 1 IO_PAD372
+bit 1104 O 1 IO_PAD372 1103 1 Z
+bit 1103 C 1 *
+bit 1102 I 1 IO_PAD371
+bit 1101 O 1 IO_PAD371 1100 1 Z
+bit 1100 C 1 *
+bit 1099 I 1 IO_PAD369
+bit 1098 O 1 IO_PAD369 1097 1 Z
+bit 1097 C 1 *
+bit 1096 I 1 IO_PAD368
+bit 1095 O 1 IO_PAD368 1094 1 Z
+bit 1094 C 1 *
+bit 1093 I 1 IO_PAD367
+bit 1092 O 1 IO_PAD367 1091 1 Z
+bit 1091 C 1 *
+bit 1090 I 1 IO_PAD365
+bit 1089 O 1 IO_PAD365 1088 1 Z
+bit 1088 C 1 *
+bit 1087 I 1 IO_PAD364
+bit 1086 O 1 IO_PAD364 1085 1 Z
+bit 1085 C 1 *
+bit 1084 I 1 IO_PAD363
+bit 1083 O 1 IO_PAD363 1082 1 Z
+bit 1082 C 1 *
+bit 1081 I 1 IO_PAD361
+bit 1080 O 1 IO_PAD361 1079 1 Z
+bit 1079 C 1 *
+bit 1078 O 1 *
+bit 1077 O 1 *
+bit 1076 O 1 *
+bit 1075 O 1 *
+bit 1074 O 1 *
+bit 1073 O 1 *
+bit 1072 I 1 IO_PAD359
+bit 1071 O 1 IO_PAD359 1070 1 Z
+bit 1070 C 1 *
+bit 1069 I 1 IO_PAD357
+bit 1068 O 1 IO_PAD357 1067 1 Z
+bit 1067 C 1 *
+bit 1066 I 1 IO_PAD355
+bit 1065 O 1 IO_PAD355 1064 1 Z
+bit 1064 C 1 *
+bit 1063 I 1 IO_PAD354
+bit 1062 O 1 IO_PAD354 1061 1 Z
+bit 1061 C 1 *
+bit 1060 I 1 IO_PAD353
+bit 1059 O 1 IO_PAD353 1058 1 Z
+bit 1058 C 1 *
+bit 1057 I 1 IO_PAD352
+bit 1056 O 1 IO_PAD352 1055 1 Z
+bit 1055 C 1 *
+bit 1054 I 1 IO_PAD351
+bit 1053 O 1 IO_PAD351 1052 1 Z
+bit 1052 C 1 *
+bit 1051 I 1 IO_PAD349
+bit 1050 O 1 IO_PAD349 1049 1 Z
+bit 1049 C 1 *
+bit 1048 I 1 IO_PAD347
+bit 1047 O 1 IO_PAD347 1046 1 Z
+bit 1046 C 1 *
+bit 1045 I 1 IO_PAD346
+bit 1044 O 1 IO_PAD346 1043 1 Z
+bit 1043 C 1 *
+bit 1042 I 1 IO_PAD345
+bit 1041 O 1 IO_PAD345 1040 1 Z
+bit 1040 C 1 *
+bit 1039 I 1 IO_PAD344
+bit 1038 O 1 IO_PAD344 1037 1 Z
+bit 1037 C 1 *
+bit 1036 I 1 IO_PAD343
+bit 1035 O 1 IO_PAD343 1034 1 Z
+bit 1034 C 1 *
+bit 1033 I 1 IO_PAD342
+bit 1032 O 1 IO_PAD342 1031 1 Z
+bit 1031 C 1 *
+bit 1030 I 1 IO_PAD341
+bit 1029 O 1 IO_PAD341 1028 1 Z
+bit 1028 C 1 *
+bit 1027 I 1 IO_PAD339
+bit 1026 O 1 IO_PAD339 1025 1 Z
+bit 1025 C 1 *
+bit 1024 I 1 IO_PAD337
+bit 1023 O 1 IO_PAD337 1022 1 Z
+bit 1022 C 1 *
+bit 1021 I 1 IO_PAD336
+bit 1020 O 1 IO_PAD336 1019 1 Z
+bit 1019 C 1 *
+bit 1018 I 1 IO_PAD335
+bit 1017 O 1 IO_PAD335 1016 1 Z
+bit 1016 C 1 *
+bit 1015 I 1 IO_PAD334
+bit 1014 O 1 IO_PAD334 1013 1 Z
+bit 1013 C 1 *
+bit 1012 I 1 IO_PAD333
+bit 1011 O 1 IO_PAD333 1010 1 Z
+bit 1010 C 1 *
+bit 1009 I 1 IO_PAD331
+bit 1008 O 1 IO_PAD331 1007 1 Z
+bit 1007 C 1 *
+bit 1006 I 1 IO_PAD330
+bit 1005 O 1 IO_PAD330 1004 1 Z
+bit 1004 C 1 *
+bit 1003 O 1 *
+bit 1002 O 1 *
+bit 1001 O 1 *
+bit 1000 O 1 *
+bit 999 O 1 *
+bit 998 O 1 *
+bit 997 I 1 IO_PAD329
+bit 996 O 1 IO_PAD329 995 1 Z
+bit 995 C 1 *
+bit 994 I 1 IO_PAD327
+bit 993 O 1 IO_PAD327 992 1 Z
+bit 992 C 1 *
+bit 991 I 1 IO_PAD326
+bit 990 O 1 IO_PAD326 989 1 Z
+bit 989 C 1 *
+bit 988 I 1 IO_PAD325
+bit 987 O 1 IO_PAD325 986 1 Z
+bit 986 C 1 *
+bit 985 I 1 IO_PAD323
+bit 984 O 1 IO_PAD323 983 1 Z
+bit 983 C 1 *
+bit 982 I 1 IO_PAD322
+bit 981 O 1 IO_PAD322 980 1 Z
+bit 980 C 1 *
+bit 979 I 1 IO_PAD321
+bit 978 O 1 IO_PAD321 977 1 Z
+bit 977 C 1 *
+bit 976 I 1 IO_PAD320
+bit 975 O 1 IO_PAD320 974 1 Z
+bit 974 C 1 *
+bit 973 I 1 IO_PAD319
+bit 972 O 1 IO_PAD319 971 1 Z
+bit 971 C 1 *
+bit 970 I 1 IO_PAD317
+bit 969 O 1 IO_PAD317 968 1 Z
+bit 968 C 1 *
+bit 967 I 1 IO_PAD315
+bit 966 O 1 IO_PAD315 965 1 Z
+bit 965 C 1 *
+bit 964 I 1 IO_PAD314
+bit 963 O 1 IO_PAD314 962 1 Z
+bit 962 C 1 *
+bit 961 I 1 IO_PAD313
+bit 960 O 1 IO_PAD313 959 1 Z
+bit 959 C 1 *
+bit 958 I 1 IO_PAD312
+bit 957 O 1 IO_PAD312 956 1 Z
+bit 956 C 1 *
+bit 955 I 1 IO_PAD311
+bit 954 O 1 IO_PAD311 953 1 Z
+bit 953 C 1 *
+bit 952 I 1 IO_PAD310
+bit 951 O 1 IO_PAD310 950 1 Z
+bit 950 C 1 *
+bit 949 I 1 IO_PAD309
+bit 948 O 1 IO_PAD309 947 1 Z
+bit 947 C 1 *
+bit 946 I 1 IO_PAD308
+bit 945 O 1 IO_PAD308 944 1 Z
+bit 944 C 1 *
+bit 943 I 1 IO_PAD307
+bit 942 O 1 IO_PAD307 941 1 Z
+bit 941 C 1 *
+bit 940 I 1 IO_PAD305
+bit 939 O 1 IO_PAD305 938 1 Z
+bit 938 C 1 *
+bit 937 O 1 *
+bit 936 O 1 *
+bit 935 O 1 *
+bit 934 O 1 *
+bit 933 O 1 *
+bit 932 O 1 *
+bit 931 I 1 IO_PAD303
+bit 930 O 1 IO_PAD303 929 1 Z
+bit 929 C 1 *
+bit 928 I 1 IO_PAD301
+bit 927 O 1 IO_PAD301 926 1 Z
+bit 926 C 1 *
+bit 925 I 1 IO_PAD300
+bit 924 O 1 IO_PAD300 923 1 Z
+bit 923 C 1 *
+bit 922 I 1 IO_PAD299
+bit 921 O 1 IO_PAD299 920 1 Z
+bit 920 C 1 *
+bit 919 I 1 IO_PAD298
+bit 918 O 1 IO_PAD298 917 1 Z
+bit 917 C 1 *
+bit 916 I 1 IO_PAD297
+bit 915 O 1 IO_PAD297 914 1 Z
+bit 914 C 1 *
+bit 913 I 1 IO_PAD295
+bit 912 O 1 IO_PAD295 911 1 Z
+bit 911 C 1 *
+bit 910 I 1 IO_PAD293
+bit 909 O 1 IO_PAD293 908 1 Z
+bit 908 C 1 *
+bit 907 I 1 IO_PAD292
+bit 906 O 1 IO_PAD292 905 1 Z
+bit 905 C 1 *
+bit 904 I 1 IO_PAD291
+bit 903 O 1 IO_PAD291 902 1 Z
+bit 902 C 1 *
+bit 901 I 1 IO_PAD290
+bit 900 O 1 IO_PAD290 899 1 Z
+bit 899 C 1 *
+bit 898 I 1 IO_PAD289
+bit 897 O 1 IO_PAD289 896 1 Z
+bit 896 C 1 *
+bit 895 I 1 IO_PAD287
+bit 894 O 1 IO_PAD287 893 1 Z
+bit 893 C 1 *
+bit 892 I 1 IO_PAD285
+bit 891 O 1 IO_PAD285 890 1 Z
+bit 890 C 1 *
+bit 889 I 1 IO_PAD284
+bit 888 O 1 IO_PAD284 887 1 Z
+bit 887 C 1 *
+bit 886 I 1 IO_PAD283
+bit 885 O 1 IO_PAD283 884 1 Z
+bit 884 C 1 *
+bit 883 I 1 IO_PAD282
+bit 882 O 1 IO_PAD282 881 1 Z
+bit 881 C 1 *
+bit 880 I 1 IO_PAD281
+bit 879 O 1 IO_PAD281 878 1 Z
+bit 878 C 1 *
+bit 877 I 1 IO_PAD279
+bit 876 O 1 IO_PAD279 875 1 Z
+bit 875 C 1 *
+bit 874 I 1 IO_PAD278
+bit 873 O 1 IO_PAD278 872 1 Z
+bit 872 C 1 *
+bit 871 I 1 IO_PAD277
+bit 870 O 1 IO_PAD277 869 1 Z
+bit 869 C 1 *
+bit 868 I 1 IO_PAD275
+bit 867 O 1 IO_PAD275 866 1 Z
+bit 866 C 1 *
+bit 865 I 1 IO_PAD273
+bit 864 O 1 IO_PAD273 863 1 Z
+bit 863 C 1 *
+bit 862 O 1 *
+bit 861 O 1 *
+bit 860 O 1 *
+bit 859 O 1 *
+bit 858 O 1 *
+bit 857 O 1 *
+bit 856 I 1 IO_PAD271
+bit 855 O 1 IO_PAD271 854 1 Z
+bit 854 C 1 *
+bit 853 I 1 IO_PAD269
+bit 852 O 1 IO_PAD269 851 1 Z
+bit 851 C 1 *
+bit 850 I 1 IO_PAD268
+bit 849 O 1 IO_PAD268 848 1 Z
+bit 848 C 1 *
+bit 847 I 1 IO_PAD267
+bit 846 O 1 IO_PAD267 845 1 Z
+bit 845 C 1 *
+bit 844 I 1 IO_PAD266
+bit 843 O 1 IO_PAD266 842 1 Z
+bit 842 C 1 *
+bit 841 I 1 IO_PAD265
+bit 840 O 1 IO_PAD265 839 1 Z
+bit 839 C 1 *
+bit 838 I 1 IO_PAD263
+bit 837 O 1 IO_PAD263 836 1 Z
+bit 836 C 1 *
+bit 835 I 1 IO_PAD261
+bit 834 O 1 IO_PAD261 833 1 Z
+bit 833 C 1 *
+bit 832 I 1 IO_PAD260
+bit 831 O 1 IO_PAD260 830 1 Z
+bit 830 C 1 *
+bit 829 I 1 IO_PAD258
+bit 828 O 1 IO_PAD258 827 1 Z
+bit 827 C 1 *
+bit 826 I 1 IO_PAD257
+bit 825 O 1 IO_PAD257 824 1 Z
+bit 824 C 1 *
+bit 823 I 1 IO_PAD255
+bit 822 O 1 IO_PAD255 821 1 Z
+bit 821 C 1 *
+bit 820 I 1 IO_PAD253
+bit 819 O 1 IO_PAD253 818 1 Z
+bit 818 C 1 *
+bit 817 I 1 IO_PAD252
+bit 816 O 1 IO_PAD252 815 1 Z
+bit 815 C 1 *
+bit 814 I 1 IO_PAD251
+bit 813 O 1 IO_PAD251 812 1 Z
+bit 812 C 1 *
+bit 811 I 1 IO_PAD250
+bit 810 O 1 IO_PAD250 809 1 Z
+bit 809 C 1 *
+bit 808 I 1 IO_PAD249
+bit 807 O 1 IO_PAD249 806 1 Z
+bit 806 C 1 *
+bit 805 I 1 IO_PAD247
+bit 804 O 1 IO_PAD247 803 1 Z
+bit 803 C 1 *
+bit 802 O 1 *
+bit 801 O 1 *
+bit 800 O 1 *
+bit 799 O 1 *
+bit 798 O 1 *
+bit 797 O 1 *
+bit 796 I 1 IO_PAD245
+bit 795 O 1 IO_PAD245 794 1 Z
+bit 794 C 1 *
+bit 793 I 1 IO_PAD243
+bit 792 O 1 IO_PAD243 791 1 Z
+bit 791 C 1 *
+bit 790 I 1 IO_PAD241
+bit 789 O 1 IO_PAD241 788 1 Z
+bit 788 C 1 *
+bit 787 I 1 IO_PAD240
+bit 786 O 1 IO_PAD240 785 1 Z
+bit 785 C 1 *
+bit 784 I 1 IO_PAD239
+bit 783 O 1 IO_PAD239 782 1 Z
+bit 782 C 1 *
+bit 781 I 1 IO_PAD237
+bit 780 O 1 IO_PAD237 779 1 Z
+bit 779 C 1 *
+bit 778 I 1 IO_PAD236
+bit 777 O 1 IO_PAD236 776 1 Z
+bit 776 C 1 *
+bit 775 I 1 IO_PAD235
+bit 774 O 1 IO_PAD235 773 1 Z
+bit 773 C 1 *
+bit 772 I 1 IO_PAD234
+bit 771 O 1 IO_PAD234 770 1 Z
+bit 770 C 1 *
+bit 769 I 1 IO_PAD233
+bit 768 O 1 IO_PAD233 767 1 Z
+bit 767 C 1 *
+bit 766 I 1 IO_PAD231
+bit 765 O 1 IO_PAD231 764 1 Z
+bit 764 C 1 *
+bit 763 I 1 IO_PAD229
+bit 762 O 1 IO_PAD229 761 1 Z
+bit 761 C 1 *
+bit 760 I 1 IO_PAD228
+bit 759 O 1 IO_PAD228 758 1 Z
+bit 758 C 1 *
+bit 757 I 1 IO_PAD227
+bit 756 O 1 IO_PAD227 755 1 Z
+bit 755 C 1 *
+bit 754 I 1 IO_PAD226
+bit 753 O 1 IO_PAD226 752 1 Z
+bit 752 C 1 *
+bit 751 I 1 IO_PAD225
+bit 750 O 1 IO_PAD225 749 1 Z
+bit 749 C 1 *
+bit 748 I 1 IO_PAD223
+bit 747 O 1 IO_PAD223 746 1 Z
+bit 746 C 1 *
+bit 745 I 1 IO_PAD221
+bit 744 O 1 IO_PAD221 743 1 Z
+bit 743 C 1 *
+bit 742 I 1 IO_PAD220
+bit 741 O 1 IO_PAD220 740 1 Z
+bit 740 C 1 *
+bit 739 I 1 IO_PAD219
+bit 738 O 1 IO_PAD219 737 1 Z
+bit 737 C 1 *
+bit 736 I 1 IO_PAD218
+bit 735 O 1 IO_PAD218 734 1 Z
+bit 734 C 1 *
+bit 733 I 1 IO_PAD217
+bit 732 O 1 IO_PAD217 731 1 Z
+bit 731 C 1 *
+bit 730 I 1 IO_PAD215
+bit 729 O 1 IO_PAD215 728 1 Z
+bit 728 C 1 *
+bit 727 O 1 *
+bit 726 O 1 *
+bit 725 O 1 *
+bit 724 O 1 *
+bit 723 O 1 *
+bit 722 O 1 *
+bit 721 I 1 IO_PAD213
+bit 720 O 1 IO_PAD213 719 1 Z
+bit 719 C 1 *
+bit 718 I 1 IO_PAD211
+bit 717 O 1 IO_PAD211 716 1 Z
+bit 716 C 1 *
+bit 715 I 1 IO_PAD210
+bit 714 O 1 IO_PAD210 713 1 Z
+bit 713 C 1 *
+bit 712 I 1 IO_PAD209
+bit 711 O 1 IO_PAD209 710 1 Z
+bit 710 C 1 *
+bit 709 I 1 IO_PAD208
+bit 708 O 1 IO_PAD208 707 1 Z
+bit 707 C 1 *
+bit 706 I 1 IO_PAD207
+bit 705 O 1 IO_PAD207 704 1 Z
+bit 704 C 1 *
+bit 703 I 1 IO_PAD206
+bit 702 O 1 IO_PAD206 701 1 Z
+bit 701 C 1 *
+bit 700 I 1 IO_PAD205
+bit 699 O 1 IO_PAD205 698 1 Z
+bit 698 C 1 *
+bit 697 I 1 IO_PAD204
+bit 696 O 1 IO_PAD204 695 1 Z
+bit 695 C 1 *
+bit 694 I 1 IO_PAD203
+bit 693 O 1 IO_PAD203 692 1 Z
+bit 692 C 1 *
+bit 691 I 1 IO_PAD201
+bit 690 O 1 IO_PAD201 689 1 Z
+bit 689 C 1 *
+bit 688 I 1 IO_PAD199
+bit 687 O 1 IO_PAD199 686 1 Z
+bit 686 C 1 *
+bit 685 I 1 IO_PAD198
+bit 684 O 1 IO_PAD198 683 1 Z
+bit 683 C 1 *
+bit 682 I 1 IO_PAD197
+bit 681 O 1 IO_PAD197 680 1 Z
+bit 680 C 1 *
+bit 679 I 1 IO_PAD196
+bit 678 O 1 IO_PAD196 677 1 Z
+bit 677 C 1 *
+bit 676 I 1 IO_PAD195
+bit 675 O 1 IO_PAD195 674 1 Z
+bit 674 C 1 *
+bit 673 I 1 IO_PAD193
+bit 672 O 1 IO_PAD193 671 1 Z
+bit 671 C 1 *
+bit 670 I 1 IO_PAD192
+bit 669 O 1 IO_PAD192 668 1 Z
+bit 668 C 1 *
+bit 667 I 1 IO_PAD191
+bit 666 O 1 IO_PAD191 665 1 Z
+bit 665 C 1 *
+bit 664 I 1 IO_PAD189
+bit 663 O 1 IO_PAD189 662 1 Z
+bit 662 C 1 *
+bit 661 O 1 *
+bit 660 O 1 *
+bit 659 O 1 *
+bit 658 O 1 *
+bit 657 O 1 *
+bit 656 O 1 *
+bit 655 I 1 IO_PAD188
+bit 654 O 1 IO_PAD188 653 1 Z
+bit 653 C 1 *
+bit 652 I 1 IO_PAD187
+bit 651 O 1 IO_PAD187 650 1 Z
+bit 650 C 1 *
+bit 649 I 1 IO_PAD185
+bit 648 O 1 IO_PAD185 647 1 Z
+bit 647 C 1 *
+bit 646 I 1 IO_PAD184
+bit 645 O 1 IO_PAD184 644 1 Z
+bit 644 C 1 *
+bit 643 I 1 IO_PAD183
+bit 642 O 1 IO_PAD183 641 1 Z
+bit 641 C 1 *
+bit 640 I 1 IO_PAD182
+bit 639 O 1 IO_PAD182 638 1 Z
+bit 638 C 1 *
+bit 637 I 1 IO_PAD181
+bit 636 O 1 IO_PAD181 635 1 Z
+bit 635 C 1 *
+bit 634 I 1 IO_PAD179
+bit 633 O 1 IO_PAD179 632 1 Z
+bit 632 C 1 *
+bit 631 I 1 IO_PAD177
+bit 630 O 1 IO_PAD177 629 1 Z
+bit 629 C 1 *
+bit 628 I 1 IO_PAD176
+bit 627 O 1 IO_PAD176 626 1 Z
+bit 626 C 1 *
+bit 625 I 1 IO_PAD175
+bit 624 O 1 IO_PAD175 623 1 Z
+bit 623 C 1 *
+bit 622 I 1 IO_PAD174
+bit 621 O 1 IO_PAD174 620 1 Z
+bit 620 C 1 *
+bit 619 I 1 IO_PAD173
+bit 618 O 1 IO_PAD173 617 1 Z
+bit 617 C 1 *
+bit 616 I 1 IO_PAD172
+bit 615 O 1 IO_PAD172 614 1 Z
+bit 614 C 1 *
+bit 613 I 1 IO_PAD171
+bit 612 O 1 IO_PAD171 611 1 Z
+bit 611 C 1 *
+bit 610 I 1 IO_PAD169
+bit 609 O 1 IO_PAD169 608 1 Z
+bit 608 C 1 *
+bit 607 I 1 IO_PAD167
+bit 606 O 1 IO_PAD167 605 1 Z
+bit 605 C 1 *
+bit 604 I 1 IO_PAD166
+bit 603 O 1 IO_PAD166 602 1 Z
+bit 602 C 1 *
+bit 601 I 1 IO_PAD165
+bit 600 O 1 IO_PAD165 599 1 Z
+bit 599 C 1 *
+bit 598 I 1 IO_PAD164
+bit 597 O 1 IO_PAD164 596 1 Z
+bit 596 C 1 *
+bit 595 I 1 IO_PAD163
+bit 594 O 1 IO_PAD163 593 1 Z
+bit 593 C 1 *
+bit 592 I 1 IO_PAD161
+bit 591 O 1 IO_PAD161 590 1 Z
+bit 590 C 1 *
+bit 589 I 1 IO_PAD159
+bit 588 O 1 IO_PAD159 587 1 Z
+bit 587 C 1 *
+bit 586 O 1 *
+bit 585 O 1 *
+bit 584 O 1 *
+bit 583 O 1 *
+bit 582 O 1 *
+bit 581 O 1 *
+bit 580 I 1 IO_PAD157
+bit 579 O 1 IO_PAD157 578 1 Z
+bit 578 C 1 *
+bit 577 I 1 IO_PAD155
+bit 576 O 1 IO_PAD155 575 1 Z
+bit 575 C 1 *
+bit 574 I 1 IO_PAD154
+bit 573 O 1 IO_PAD154 572 1 Z
+bit 572 C 1 *
+bit 571 I 1 IO_PAD153
+bit 570 O 1 IO_PAD153 569 1 Z
+bit 569 C 1 *
+bit 568 I 1 IO_PAD151
+bit 567 O 1 IO_PAD151 566 1 Z
+bit 566 C 1 *
+bit 565 I 1 IO_PAD150
+bit 564 O 1 IO_PAD150 563 1 Z
+bit 563 C 1 *
+bit 562 I 1 IO_PAD149
+bit 561 O 1 IO_PAD149 560 1 Z
+bit 560 C 1 *
+bit 559 I 1 IO_PAD147
+bit 558 O 1 IO_PAD147 557 1 Z
+bit 557 C 1 *
+bit 556 I 1 IO_PAD146
+bit 555 O 1 IO_PAD146 554 1 Z
+bit 554 C 1 *
+bit 553 I 1 IO_PAD145
+bit 552 O 1 IO_PAD145 551 1 Z
+bit 551 C 1 *
+bit 550 I 1 IO_PAD143
+bit 549 O 1 IO_PAD143 548 1 Z
+bit 548 C 1 *
+bit 547 I 1 IO_PAD142
+bit 546 O 1 IO_PAD142 545 1 Z
+bit 545 C 1 *
+bit 544 I 1 IO_PAD141
+bit 543 O 1 IO_PAD141 542 1 Z
+bit 542 C 1 *
+bit 541 O 1 *
+bit 540 I 1 HSWAP_EN_PAD137
+bit 539 I 1 IO_PAD136
+bit 538 O 1 IO_PAD136 537 1 Z
+bit 537 C 1 *
+bit 536 I 1 IO_PAD135
+bit 535 O 1 IO_PAD135 534 1 Z
+bit 534 C 1 *
+bit 533 I 1 IO_PAD133
+bit 532 O 1 IO_PAD133 531 1 Z
+bit 531 C 1 *
+bit 530 I 1 IO_PAD131
+bit 529 O 1 IO_PAD131 528 1 Z
+bit 528 C 1 *
+bit 527 I 1 IO_PAD130
+bit 526 O 1 IO_PAD130 525 1 Z
+bit 525 C 1 *
+bit 524 I 1 IO_PAD129
+bit 523 O 1 IO_PAD129 522 1 Z
+bit 522 C 1 *
+bit 521 I 1 IO_PAD127
+bit 520 O 1 IO_PAD127 519 1 Z
+bit 519 C 1 *
+bit 518 I 1 IO_PAD125
+bit 517 O 1 IO_PAD125 516 1 Z
+bit 516 C 1 *
+bit 515 I 1 IO_PAD123
+bit 514 O 1 IO_PAD123 513 1 Z
+bit 513 C 1 *
+bit 512 I 1 IO_PAD122
+bit 511 O 1 IO_PAD122 510 1 Z
+bit 510 C 1 *
+bit 509 I 1 IO_PAD121
+bit 508 O 1 IO_PAD121 507 1 Z
+bit 507 C 1 *
+bit 506 I 1 IO_PAD120
+bit 505 O 1 IO_PAD120 504 1 Z
+bit 504 C 1 *
+bit 503 I 1 IO_PAD119
+bit 502 O 1 IO_PAD119 501 1 Z
+bit 501 C 1 *
+bit 500 I 1 IO_PAD117
+bit 499 O 1 IO_PAD117 498 1 Z
+bit 498 C 1 *
+bit 497 I 1 IO_PAD115
+bit 496 O 1 IO_PAD115 495 1 Z
+bit 495 C 1 *
+bit 494 I 1 IO_PAD113
+bit 493 O 1 IO_PAD113 492 1 Z
+bit 492 C 1 *
+bit 491 I 1 IO_PAD111
+bit 490 O 1 IO_PAD111 489 1 Z
+bit 489 C 1 *
+bit 488 I 1 IO_PAD109
+bit 487 O 1 IO_PAD109 486 1 Z
+bit 486 C 1 *
+bit 485 I 1 IO_PAD107
+bit 484 O 1 IO_PAD107 483 1 Z
+bit 483 C 1 *
+bit 482 I 1 IO_PAD105
+bit 481 O 1 IO_PAD105 480 1 Z
+bit 480 C 1 *
+bit 479 I 1 IO_PAD104
+bit 478 O 1 IO_PAD104 477 1 Z
+bit 477 C 1 *
+bit 476 I 1 IO_PAD103
+bit 475 O 1 IO_PAD103 474 1 Z
+bit 474 C 1 *
+bit 473 I 1 IO_PAD102
+bit 472 O 1 IO_PAD102 471 1 Z
+bit 471 C 1 *
+bit 470 I 1 IO_PAD101
+bit 469 O 1 IO_PAD101 468 1 Z
+bit 468 C 1 *
+bit 467 I 1 IO_PAD99
+bit 466 O 1 IO_PAD99 465 1 Z
+bit 465 C 1 *
+bit 464 I 1 IO_PAD98
+bit 463 O 1 IO_PAD98 462 1 Z
+bit 462 C 1 *
+bit 461 I 1 IO_PAD97
+bit 460 O 1 IO_PAD97 459 1 Z
+bit 459 C 1 *
+bit 458 I 1 IO_PAD95
+bit 457 O 1 IO_PAD95 456 1 Z
+bit 456 C 1 *
+bit 455 I 1 IO_PAD93
+bit 454 O 1 IO_PAD93 453 1 Z
+bit 453 C 1 *
+bit 452 I 1 IO_PAD92
+bit 451 O 1 IO_PAD92 450 1 Z
+bit 450 C 1 *
+bit 449 I 1 IO_PAD91
+bit 448 O 1 IO_PAD91 447 1 Z
+bit 447 C 1 *
+bit 446 I 1 IO_PAD89
+bit 445 O 1 IO_PAD89 444 1 Z
+bit 444 C 1 *
+bit 443 I 1 IO_PAD87
+bit 442 O 1 IO_PAD87 441 1 Z
+bit 441 C 1 *
+bit 440 I 1 IO_PAD85
+bit 439 O 1 IO_PAD85 438 1 Z
+bit 438 C 1 *
+bit 437 I 1 IO_PAD83
+bit 436 O 1 IO_PAD83 435 1 Z
+bit 435 C 1 *
+bit 434 I 1 IO_PAD81
+bit 433 O 1 IO_PAD81 432 1 Z
+bit 432 C 1 *
+bit 431 I 1 IO_PAD80
+bit 430 O 1 IO_PAD80 429 1 Z
+bit 429 C 1 *
+bit 428 I 1 IO_PAD79
+bit 427 O 1 IO_PAD79 426 1 Z
+bit 426 C 1 *
+bit 425 I 1 IO_PAD77
+bit 424 O 1 IO_PAD77 423 1 Z
+bit 423 C 1 *
+bit 422 I 1 IO_PAD75
+bit 421 O 1 IO_PAD75 420 1 Z
+bit 420 C 1 *
+bit 419 I 1 IO_PAD74
+bit 418 O 1 IO_PAD74 417 1 Z
+bit 417 C 1 *
+bit 416 I 1 IO_PAD73
+bit 415 O 1 IO_PAD73 414 1 Z
+bit 414 C 1 *
+bit 413 I 1 IO_PAD71
+bit 412 O 1 IO_PAD71 411 1 Z
+bit 411 C 1 *
+bit 410 I 1 IO_PAD70
+bit 409 O 1 IO_PAD70 408 1 Z
+bit 408 C 1 *
+bit 407 I 1 IO_PAD69
+bit 406 O 1 IO_PAD69 405 1 Z
+bit 405 C 1 *
+bit 404 I 1 IO_PAD67
+bit 403 O 1 IO_PAD67 402 1 Z
+bit 402 C 1 *
+bit 401 I 1 IO_PAD65
+bit 400 O 1 IO_PAD65 399 1 Z
+bit 399 C 1 *
+bit 398 I 1 IO_PAD63
+bit 397 O 1 IO_PAD63 396 1 Z
+bit 396 C 1 *
+bit 395 I 1 IO_PAD62
+bit 394 O 1 IO_PAD62 393 1 Z
+bit 393 C 1 *
+bit 392 I 1 IO_PAD61
+bit 391 O 1 IO_PAD61 390 1 Z
+bit 390 C 1 *
+bit 389 I 1 IO_PAD59
+bit 388 O 1 IO_PAD59 387 1 Z
+bit 387 C 1 *
+bit 386 I 1 IO_PAD58
+bit 385 O 1 IO_PAD58 384 1 Z
+bit 384 C 1 *
+bit 383 I 1 IO_PAD57
+bit 382 O 1 IO_PAD57 381 1 Z
+bit 381 C 1 *
+bit 380 I 1 IO_PAD55
+bit 379 O 1 IO_PAD55 378 1 Z
+bit 378 C 1 *
+bit 377 I 1 IO_PAD53
+bit 376 O 1 IO_PAD53 375 1 Z
+bit 375 C 1 *
+bit 374 I 1 IO_PAD51
+bit 373 O 1 IO_PAD51 372 1 Z
+bit 372 C 1 *
+bit 371 I 1 IO_PAD50
+bit 370 O 1 IO_PAD50 369 1 Z
+bit 369 C 1 *
+bit 368 I 1 IO_PAD49
+bit 367 O 1 IO_PAD49 366 1 Z
+bit 366 C 1 *
+bit 365 I 1 IO_PAD47
+bit 364 O 1 IO_PAD47 363 1 Z
+bit 363 C 1 *
+bit 362 I 1 IO_PAD46
+bit 361 O 1 IO_PAD46 360 1 Z
+bit 360 C 1 *
+bit 359 I 1 IO_PAD45
+bit 358 O 1 IO_PAD45 357 1 Z
+bit 357 C 1 *
+bit 356 I 1 IO_PAD43
+bit 355 O 1 IO_PAD43 354 1 Z
+bit 354 C 1 *
+bit 353 I 1 IO_PAD41
+bit 352 O 1 IO_PAD41 351 1 Z
+bit 351 C 1 *
+bit 350 I 1 IO_PAD39
+bit 349 O 1 IO_PAD39 348 1 Z
+bit 348 C 1 *
+bit 347 I 1 IO_PAD38
+bit 346 O 1 IO_PAD38 345 1 Z
+bit 345 C 1 *
+bit 344 I 1 IO_PAD37
+bit 343 O 1 IO_PAD37 342 1 Z
+bit 342 C 1 *
+bit 341 I 1 IO_PAD35
+bit 340 O 1 IO_PAD35 339 1 Z
+bit 339 C 1 *
+bit 338 I 1 IO_PAD34
+bit 337 O 1 IO_PAD34 336 1 Z
+bit 336 C 1 *
+bit 335 I 1 IO_PAD33
+bit 334 O 1 IO_PAD33 333 1 Z
+bit 333 C 1 *
+bit 332 I 1 IO_PAD31
+bit 331 O 1 IO_PAD31 330 1 Z
+bit 330 C 1 *
+bit 329 I 1 IO_PAD29
+bit 328 O 1 IO_PAD29 327 1 Z
+bit 327 C 1 *
+bit 326 I 1 IO_PAD28
+bit 325 O 1 IO_PAD28 324 1 Z
+bit 324 C 1 *
+bit 323 I 1 IO_PAD27
+bit 322 O 1 IO_PAD27 321 1 Z
+bit 321 C 1 *
+bit 320 I 1 IO_PAD26
+bit 319 O 1 IO_PAD26 318 1 Z
+bit 318 C 1 *
+bit 317 I 1 IO_PAD25
+bit 316 O 1 IO_PAD25 315 1 Z
+bit 315 C 1 *
+bit 314 I 1 IO_PAD23
+bit 313 O 1 IO_PAD23 312 1 Z
+bit 312 C 1 *
+bit 311 I 1 IO_PAD21
+bit 310 O 1 IO_PAD21 309 1 Z
+bit 309 C 1 *
+bit 308 I 1 IO_PAD19
+bit 307 O 1 IO_PAD19 306 1 Z
+bit 306 C 1 *
+bit 305 I 1 IO_PAD17
+bit 304 O 1 IO_PAD17 303 1 Z
+bit 303 C 1 *
+bit 302 I 1 IO_PAD15
+bit 301 O 1 IO_PAD15 300 1 Z
+bit 300 C 1 *
+bit 299 I 1 IO_PAD14
+bit 298 O 1 IO_PAD14 297 1 Z
+bit 297 C 1 *
+bit 296 I 1 IO_PAD13
+bit 295 O 1 IO_PAD13 294 1 Z
+bit 294 C 1 *
+bit 293 I 1 IO_PAD11
+bit 292 O 1 IO_PAD11 291 1 Z
+bit 291 C 1 *
+bit 290 I 1 IO_PAD10
+bit 289 O 1 IO_PAD10 288 1 Z
+bit 288 C 1 *
+bit 287 I 1 IO_PAD9
+bit 286 O 1 IO_PAD9 285 1 Z
+bit 285 C 1 *
+bit 284 I 1 IO_PAD7
+bit 283 O 1 IO_PAD7 282 1 Z
+bit 282 C 1 *
+bit 281 I 1 IO_PAD5
+bit 280 O 1 IO_PAD5 279 1 Z
+bit 279 C 1 *
+bit 278 I 1 IO_PAD4
+bit 277 O 1 IO_PAD4 276 1 Z
+bit 276 C 1 *
+bit 275 I 1 IO_PAD3
+bit 274 O 1 IO_PAD3 273 1 Z
+bit 273 C 1 *
+bit 272 I 1 IO_PAD2
+bit 271 O 1 IO_PAD2 270 1 Z
+bit 270 C 1 *
+bit 269 I 1 IO_PAD1030
+bit 268 O 1 IO_PAD1030 267 1 Z
+bit 267 C 1 *
+bit 266 I 1 IO_PAD1029
+bit 265 O 1 IO_PAD1029 264 1 Z
+bit 264 C 1 *
+bit 263 I 1 IO_PAD1028
+bit 262 O 1 IO_PAD1028 261 1 Z
+bit 261 C 1 *
+bit 260 I 1 IO_PAD1027
+bit 259 O 1 IO_PAD1027 258 1 Z
+bit 258 C 1 *
+bit 257 I 1 IO_PAD1025
+bit 256 O 1 IO_PAD1025 255 1 Z
+bit 255 C 1 *
+bit 254 I 1 IO_PAD1023
+bit 253 O 1 IO_PAD1023 252 1 Z
+bit 252 C 1 *
+bit 251 I 1 IO_PAD1022
+bit 250 O 1 IO_PAD1022 249 1 Z
+bit 249 C 1 *
+bit 248 I 1 IO_PAD1021
+bit 247 O 1 IO_PAD1021 246 1 Z
+bit 246 C 1 *
+bit 245 I 1 IO_PAD1019
+bit 244 O 1 IO_PAD1019 243 1 Z
+bit 243 C 1 *
+bit 242 I 1 IO_PAD1018
+bit 241 O 1 IO_PAD1018 240 1 Z
+bit 240 C 1 *
+bit 239 I 1 IO_PAD1017
+bit 238 O 1 IO_PAD1017 237 1 Z
+bit 237 C 1 *
+bit 236 I 1 IO_PAD1015
+bit 235 O 1 IO_PAD1015 234 1 Z
+bit 234 C 1 *
+bit 233 I 1 IO_PAD1013
+bit 232 O 1 IO_PAD1013 231 1 Z
+bit 231 C 1 *
+bit 230 I 1 IO_PAD1011
+bit 229 O 1 IO_PAD1011 228 1 Z
+bit 228 C 1 *
+bit 227 I 1 IO_PAD1009
+bit 226 O 1 IO_PAD1009 225 1 Z
+bit 225 C 1 *
+bit 224 I 1 IO_PAD1007
+bit 223 O 1 IO_PAD1007 222 1 Z
+bit 222 C 1 *
+bit 221 I 1 IO_PAD1006
+bit 220 O 1 IO_PAD1006 219 1 Z
+bit 219 C 1 *
+bit 218 I 1 IO_PAD1005
+bit 217 O 1 IO_PAD1005 216 1 Z
+bit 216 C 1 *
+bit 215 I 1 IO_PAD1004
+bit 214 O 1 IO_PAD1004 213 1 Z
+bit 213 C 1 *
+bit 212 I 1 IO_PAD1003
+bit 211 O 1 IO_PAD1003 210 1 Z
+bit 210 C 1 *
+bit 209 I 1 IO_PAD1001
+bit 208 O 1 IO_PAD1001 207 1 Z
+bit 207 C 1 *
+bit 206 I 1 IO_PAD999
+bit 205 O 1 IO_PAD999 204 1 Z
+bit 204 C 1 *
+bit 203 I 1 IO_PAD998
+bit 202 O 1 IO_PAD998 201 1 Z
+bit 201 C 1 *
+bit 200 I 1 IO_PAD997
+bit 199 O 1 IO_PAD997 198 1 Z
+bit 198 C 1 *
+bit 197 I 1 IO_PAD995
+bit 196 O 1 IO_PAD995 195 1 Z
+bit 195 C 1 *
+bit 194 I 1 IO_PAD994
+bit 193 O 1 IO_PAD994 192 1 Z
+bit 192 C 1 *
+bit 191 I 1 IO_PAD993
+bit 190 O 1 IO_PAD993 189 1 Z
+bit 189 C 1 *
+bit 188 I 1 IO_PAD991
+bit 187 O 1 IO_PAD991 186 1 Z
+bit 186 C 1 *
+bit 185 I 1 IO_PAD989
+bit 184 O 1 IO_PAD989 183 1 Z
+bit 183 C 1 *
+bit 182 I 1 IO_PAD987
+bit 181 O 1 IO_PAD987 180 1 Z
+bit 180 C 1 *
+bit 179 I 1 IO_PAD986
+bit 178 O 1 IO_PAD986 177 1 Z
+bit 177 C 1 *
+bit 176 I 1 IO_PAD985
+bit 175 O 1 IO_PAD985 174 1 Z
+bit 174 C 1 *
+bit 173 I 1 IO_PAD983
+bit 172 O 1 IO_PAD983 171 1 Z
+bit 171 C 1 *
+bit 170 I 1 IO_PAD982
+bit 169 O 1 IO_PAD982 168 1 Z
+bit 168 C 1 *
+bit 167 I 1 IO_PAD981
+bit 166 O 1 IO_PAD981 165 1 Z
+bit 165 C 1 *
+bit 164 I 1 IO_PAD979
+bit 163 O 1 IO_PAD979 162 1 Z
+bit 162 C 1 *
+bit 161 I 1 IO_PAD977
+bit 160 O 1 IO_PAD977 159 1 Z
+bit 159 C 1 *
+bit 158 I 1 IO_PAD975
+bit 157 O 1 IO_PAD975 156 1 Z
+bit 156 C 1 *
+bit 155 I 1 IO_PAD974
+bit 154 O 1 IO_PAD974 153 1 Z
+bit 153 C 1 *
+bit 152 I 1 IO_PAD973
+bit 151 O 1 IO_PAD973 150 1 Z
+bit 150 C 1 *
+bit 149 I 1 IO_PAD971
+bit 148 O 1 IO_PAD971 147 1 Z
+bit 147 C 1 *
+bit 146 I 1 IO_PAD970
+bit 145 O 1 IO_PAD970 144 1 Z
+bit 144 C 1 *
+bit 143 I 1 IO_PAD969
+bit 142 O 1 IO_PAD969 141 1 Z
+bit 141 C 1 *
+bit 140 I 1 IO_PAD967
+bit 139 O 1 IO_PAD967 138 1 Z
+bit 138 C 1 *
+bit 137 I 1 IO_PAD965
+bit 136 O 1 IO_PAD965 135 1 Z
+bit 135 C 1 *
+bit 134 I 1 IO_PAD963
+bit 133 O 1 IO_PAD963 132 1 Z
+bit 132 C 1 *
+bit 131 I 1 IO_PAD962
+bit 130 O 1 IO_PAD962 129 1 Z
+bit 129 C 1 *
+bit 128 I 1 IO_PAD961
+bit 127 O 1 IO_PAD961 126 1 Z
+bit 126 C 1 *
+bit 125 I 1 IO_PAD959
+bit 124 O 1 IO_PAD959 123 1 Z
+bit 123 C 1 *
+bit 122 I 1 IO_PAD958
+bit 121 O 1 IO_PAD958 120 1 Z
+bit 120 C 1 *
+bit 119 I 1 IO_PAD957
+bit 118 O 1 IO_PAD957 117 1 Z
+bit 117 C 1 *
+bit 116 I 1 IO_PAD955
+bit 115 O 1 IO_PAD955 114 1 Z
+bit 114 C 1 *
+bit 113 I 1 IO_PAD953
+bit 112 O 1 IO_PAD953 111 1 Z
+bit 111 C 1 *
+bit 110 I 1 IO_PAD952
+bit 109 O 1 IO_PAD952 108 1 Z
+bit 108 C 1 *
+bit 107 I 1 IO_PAD951
+bit 106 O 1 IO_PAD951 105 1 Z
+bit 105 C 1 *
+bit 104 I 1 IO_PAD949
+bit 103 O 1 IO_PAD949 102 1 Z
+bit 102 C 1 *
+bit 101 I 1 IO_PAD947
+bit 100 O 1 IO_PAD947 99 1 Z
+bit 99 C 1 *
+bit 98 I 1 IO_PAD945
+bit 97 O 1 IO_PAD945 96 1 Z
+bit 96 C 1 *
+bit 95 I 1 IO_PAD943
+bit 94 O 1 IO_PAD943 93 1 Z
+bit 93 C 1 *
+bit 92 I 1 IO_PAD941
+bit 91 O 1 IO_PAD941 90 1 Z
+bit 90 C 1 *
+bit 89 I 1 IO_PAD940
+bit 88 O 1 IO_PAD940 87 1 Z
+bit 87 C 1 *
+bit 86 I 1 IO_PAD939
+bit 85 O 1 IO_PAD939 84 1 Z
+bit 84 C 1 *
+bit 83 I 1 IO_PAD937
+bit 82 O 1 IO_PAD937 81 1 Z
+bit 81 C 1 *
+bit 80 I 1 IO_PAD935
+bit 79 O 1 IO_PAD935 78 1 Z
+bit 78 C 1 *
+bit 77 I 1 IO_PAD934
+bit 76 O 1 IO_PAD934 75 1 Z
+bit 75 C 1 *
+bit 74 I 1 IO_PAD933
+bit 73 O 1 IO_PAD933 72 1 Z
+bit 72 C 1 *
+bit 71 I 1 IO_PAD931
+bit 70 O 1 IO_PAD931 69 1 Z
+bit 69 C 1 *
+bit 68 I 1 IO_PAD930
+bit 67 O 1 IO_PAD930 66 1 Z
+bit 66 C 1 *
+bit 65 I 1 IO_PAD929
+bit 64 O 1 IO_PAD929 63 1 Z
+bit 63 C 1 *
+bit 62 I 1 IO_PAD928
+bit 61 O 1 IO_PAD928 60 1 Z
+bit 60 C 1 *
+bit 59 I 1 IO_PAD927
+bit 58 O 1 IO_PAD927 57 1 Z
+bit 57 C 1 *
+bit 56 I 1 IO_PAD925
+bit 55 O 1 IO_PAD925 54 1 Z
+bit 54 C 1 *
+bit 53 I 1 IO_PAD923
+bit 52 O 1 IO_PAD923 51 1 Z
+bit 51 C 1 *
+bit 50 I 1 IO_PAD921
+bit 49 O 1 IO_PAD921 48 1 Z
+bit 48 C 1 *
+bit 47 I 1 IO_PAD920
+bit 46 O 1 IO_PAD920 45 1 Z
+bit 45 C 1 *
+bit 44 I 1 IO_PAD919
+bit 43 O 1 IO_PAD919 42 1 Z
+bit 42 C 1 *
+bit 41 I 1 IO_PAD917
+bit 40 O 1 IO_PAD917 39 1 Z
+bit 39 C 1 *
+bit 38 I 1 IO_PAD915
+bit 37 O 1 IO_PAD915 36 1 Z
+bit 36 C 1 *
+bit 35 I 1 IO_PAD914
+bit 34 O 1 IO_PAD914 33 1 Z
+bit 33 C 1 *
+bit 32 I 1 IO_PAD913
+bit 31 O 1 IO_PAD913 30 1 Z
+bit 30 C 1 *
+bit 29 I 1 IO_PAD912
+bit 28 O 1 IO_PAD912 27 1 Z
+bit 27 C 1 *
+bit 26 I 1 IO_PAD911
+bit 25 O 1 IO_PAD911 24 1 Z
+bit 24 C 1 *
+bit 23 I 1 IO_PAD909
+bit 22 O 1 IO_PAD909 21 1 Z
+bit 21 C 1 *
+bit 20 I 1 IO_PAD907
+bit 19 O 1 IO_PAD907 18 1 Z
+bit 18 C 1 *
+bit 17 I 1 IO_PAD905
+bit 16 O 1 IO_PAD905 15 1 Z
+bit 15 C 1 *
+bit 14 I 1 IO_PAD904
+bit 13 O 1 IO_PAD904 12 1 Z
+bit 12 C 1 *
+bit 11 I 1 IO_PAD903
+bit 10 O 1 IO_PAD903 9 1 Z
+bit 9 C 1 *
+bit 8 I 1 IO_PAD901
+bit 7 O 1 IO_PAD901 6 1 Z
+bit 6 C 1 *
+bit 5 I 1 IO_PAD899
+bit 4 O 1 IO_PAD899 3 1 Z
+bit 3 C 1 *
+bit 2 I 1 IO_PAD898
+bit 1 O 1 IO_PAD898 0 1 Z
+bit 0 C 1 *
--- /dev/null
+signal GND1
+signal GND2
+signal GND3
+signal GND4
+signal GND5
+signal GND6
+signal GND7
+signal GND8
+signal GND9
+signal GND10
+signal GND11
+signal GND12
+signal GND13
+signal GND14
+signal GND15
+signal GND16
+signal GND17
+signal GND18
+signal GND19
+signal GND20
+signal GND21
+signal GND22
+signal GND23
+signal GND24
+signal GND25
+signal GND26
+signal GND27
+signal GND28
+signal GND29
+signal GND30
+signal GND31
+signal GND32
+signal GND33
+signal GND34
+signal GND35
+signal GND36
+signal GND37
+signal GND38
+signal GND39
+signal GND40
+signal GND41
+signal GND42
+signal GND43
+signal GND44
+signal GND45
+signal GND46
+signal GND47
+signal GND48
+signal GND49
+signal GND50
+signal GND51
+signal GND52
+signal GND53
+signal GND54
+signal GND55
+signal GND56
+signal GND57
+signal GND58
+signal GND59
+signal GND60
+signal GND61
+signal GND62
+signal GND63
+signal GND64
+signal GND65
+signal GND66
+signal GND67
+signal GND68
+signal GND69
+signal GND70
+signal GND71
+signal GND72
+signal GND73
+signal GND74
+signal GND75
+signal GND76
+signal GND77
+signal GND78
+signal GND79
+signal GND80
+signal GND81
+signal GND82
+signal GND83
+signal GND84
+signal GND85
+signal GND86
+signal GND87
+signal GND88
+signal GND89
+signal GND90
+signal GND91
+signal GND92
+signal GND93
+signal GND94
+signal GND95
+signal GND96
+signal GND97
+signal GND98
+signal GND99
+signal GND100
+signal GND101
+signal GND102
+signal GND103
+signal GND104
+signal GND105
+signal GND106
+signal GND107
+signal GND108
+signal GND109
+signal GND110
+signal GND111
+signal GND112
+signal GND113
+signal GND114
+signal GND115
+signal GND116
+signal GND117
+signal GND118
+signal GND119
+signal GND120
+signal GND121
+signal GND122
+signal GND123
+signal GND124
+signal GND125
+signal GND126
+signal GND127
+signal GND128
+signal GND129
+signal GND130
+signal GND131
+signal GND132
+signal GND133
+signal GND134
+signal GND135
+signal GND136
+signal GND137
+signal GND138
+signal GND139
+signal GND140
+signal GND141
+signal GND142
+signal GND143
+signal GND144
+signal GND145
+signal GND146
+signal GND147
+signal GND148
+signal GND149
+signal GND150
+signal GND151
+signal GND152
+signal GND153
+signal GND154
+signal GND155
+signal GND156
+signal GND157
+signal GND158
+signal GND159
+signal GND160
+signal GND161
+signal GND162
+signal GND163
+signal GND164
+signal GND165
+signal GND166
+signal GND167
+signal GND168
+signal GND169
+signal GND170
+signal GND171
+signal GND172
+signal GND173
+signal GND174
+signal GND175
+signal GND176
+signal GND177
+signal GND178
+signal GND179
+signal GND180
+signal GND181
+signal GND182
+signal GND183
+signal GND184
+signal CCLK_AL31
+signal DONE_AD24
+signal HSWAP_EN_L11
+signal M0_AL4
+signal M1_AK4
+signal M2_AG8
+signal PROG_B
+signal TCK
+signal TDI
+signal TDO
+signal TMS
+signal VCCAUX1
+signal VCCAUX2
+signal VCCAUX3
+signal VCCAUX4
+signal VCCAUX5
+signal VCCAUX6
+signal VCCAUX7
+signal VCCAUX8
+signal VCCAUX9
+signal VCCAUX10
+signal VCCAUX11
+signal VCCAUX12
+signal VCCAUX13
+signal VCCAUX14
+signal VCCAUX15
+signal VCCAUX16
+signal VCCAUX17
+signal VCCAUX18
+signal VCCAUX19
+signal VCCAUX20
+signal VCCAUX21
+signal VCCAUX22
+signal VCCAUX23
+signal VCCAUX24
+signal VCCAUX25
+signal VCCAUX26
+signal VCCAUX27
+signal VCCAUX28
+signal VCCAUX29
+signal VCCAUX30
+signal VCCAUX31
+signal VCCAUX32
+signal VCCINT1
+signal VCCINT2
+signal VCCINT3
+signal VCCINT4
+signal VCCINT5
+signal VCCINT6
+signal VCCINT7
+signal VCCINT8
+signal VCCINT9
+signal VCCINT10
+signal VCCINT11
+signal VCCINT12
+signal VCCINT13
+signal VCCINT14
+signal VCCINT15
+signal VCCINT16
+signal VCCINT17
+signal VCCINT18
+signal VCCINT19
+signal VCCINT20
+signal VCCINT21
+signal VCCINT22
+signal VCCINT23
+signal VCCINT24
+signal VCCINT25
+signal VCCINT26
+signal VCCINT27
+signal VCCINT28
+signal VCCINT29
+signal VCCINT30
+signal VCCINT31
+signal VCCINT32
+signal VCCINT33
+signal VCCINT34
+signal VCCINT35
+signal VCCINT36
+signal VCCINT37
+signal VCCINT38
+signal VCCINT39
+signal VCCINT40
+signal VCCO01
+signal VCCO02
+signal VCCO03
+signal VCCO04
+signal VCCO05
+signal VCCO06
+signal VCCO07
+signal VCCO08
+signal VCCO09
+signal VCCO010
+signal VCCO011
+signal VCCO012
+signal VCCO013
+signal VCCO11
+signal VCCO12
+signal VCCO13
+signal VCCO14
+signal VCCO15
+signal VCCO16
+signal VCCO17
+signal VCCO18
+signal VCCO19
+signal VCCO110
+signal VCCO111
+signal VCCO112
+signal VCCO113
+signal VCCO21
+signal VCCO22
+signal VCCO23
+signal VCCO24
+signal VCCO25
+signal VCCO26
+signal VCCO27
+signal VCCO28
+signal VCCO29
+signal VCCO210
+signal VCCO211
+signal VCCO212
+signal VCCO213
+signal VCCO31
+signal VCCO32
+signal VCCO33
+signal VCCO34
+signal VCCO35
+signal VCCO36
+signal VCCO37
+signal VCCO38
+signal VCCO39
+signal VCCO310
+signal VCCO311
+signal VCCO312
+signal VCCO313
+signal VCCO41
+signal VCCO42
+signal VCCO43
+signal VCCO44
+signal VCCO45
+signal VCCO46
+signal VCCO47
+signal VCCO48
+signal VCCO49
+signal VCCO410
+signal VCCO411
+signal VCCO412
+signal VCCO413
+signal VCCO51
+signal VCCO52
+signal VCCO53
+signal VCCO54
+signal VCCO55
+signal VCCO56
+signal VCCO57
+signal VCCO58
+signal VCCO59
+signal VCCO510
+signal VCCO511
+signal VCCO512
+signal VCCO513
+signal VCCO61
+signal VCCO62
+signal VCCO63
+signal VCCO64
+signal VCCO65
+signal VCCO66
+signal VCCO67
+signal VCCO68
+signal VCCO69
+signal VCCO610
+signal VCCO611
+signal VCCO612
+signal VCCO613
+signal VCCO71
+signal VCCO72
+signal VCCO73
+signal VCCO74
+signal VCCO75
+signal VCCO76
+signal VCCO77
+signal VCCO78
+signal VCCO79
+signal VCCO710
+signal VCCO711
+signal VCCO712
+signal VCCO713
+signal IO_A3
+signal IO_A4
+signal IO_A6
+signal IO_A8
+signal IO_A10
+signal IO_A12
+signal IO_A14
+signal IO_A15
+signal IO_A17
+signal IO_A18
+signal IO_A20
+signal IO_A21
+signal IO_A23
+signal IO_A24
+signal IO_A25
+signal IO_A27
+signal IO_A29
+signal IO_A31
+signal IO_A32
+signal IO_B3
+signal IO_B4
+signal IO_B5
+signal IO_B6
+signal IO_B8
+signal IO_B9
+signal IO_B10
+signal IO_B12
+signal IO_B14
+signal IO_B15
+signal IO_B16
+signal IO_B17
+signal IO_B18
+signal IO_B19
+signal IO_B20
+signal IO_B21
+signal IO_B23
+signal IO_B24
+signal IO_B25
+signal IO_B26
+signal IO_B27
+signal IO_B29
+signal IO_B30
+signal IO_B31
+signal IO_B32
+signal IO_C1
+signal IO_C2
+signal IO_C5
+signal IO_C6
+signal IO_C9
+signal IO_C10
+signal IO_C12
+signal IO_C13
+signal IO_C14
+signal IO_C15
+signal IO_C16
+signal IO_C17
+signal IO_C18
+signal IO_C19
+signal IO_C20
+signal IO_C21
+signal IO_C22
+signal IO_C23
+signal IO_C25
+signal IO_C26
+signal IO_C29
+signal IO_C30
+signal IO_C33
+signal IO_C34
+signal IO_D1
+signal IO_D2
+signal IO_D5
+signal IO_D6
+signal IO_D8
+signal IO_D9
+signal IO_D10
+signal IO_D12
+signal IO_D13
+signal IO_D14
+signal IO_D15
+signal IO_D17
+signal IO_D18
+signal IO_D20
+signal IO_D21
+signal IO_D22
+signal IO_D23
+signal IO_D25
+signal IO_D26
+signal IO_D27
+signal IO_D29
+signal IO_D30
+signal IO_D33
+signal IO_D34
+signal IO_E2
+signal IO_E3
+signal IO_E7
+signal IO_E8
+signal IO_E10
+signal IO_E12
+signal IO_E14
+signal IO_E17
+signal IO_E18
+signal IO_E21
+signal IO_E23
+signal IO_E25
+signal IO_E27
+signal IO_E28
+signal IO_E32
+signal IO_E33
+signal IO_F1
+signal IO_F2
+signal IO_F3
+signal IO_F4
+signal IO_F6
+signal IO_F7
+signal IO_F8
+signal IO_F9
+signal IO_F10
+signal IO_F12
+signal IO_F14
+signal IO_F15
+signal IO_F16
+signal IO_F17
+signal IO_F18
+signal IO_F19
+signal IO_F20
+signal IO_F21
+signal IO_F23
+signal IO_F25
+signal IO_F26
+signal IO_F27
+signal IO_F28
+signal IO_F29
+signal IO_F31
+signal IO_F32
+signal IO_F33
+signal IO_F34
+signal IO_G1
+signal IO_G2
+signal IO_G5
+signal IO_G6
+signal IO_G9
+signal IO_G10
+signal IO_G12
+signal IO_G13
+signal IO_G14
+signal IO_G15
+signal IO_G16
+signal IO_G17
+signal IO_G18
+signal IO_G19
+signal IO_G20
+signal IO_G21
+signal IO_G22
+signal IO_G23
+signal IO_G25
+signal IO_G26
+signal IO_G29
+signal IO_G30
+signal IO_G33
+signal IO_G34
+signal IO_H1
+signal IO_H2
+signal IO_H4
+signal IO_H5
+signal IO_H6
+signal IO_H8
+signal IO_H9
+signal IO_H10
+signal IO_H12
+signal IO_H13
+signal IO_H14
+signal IO_H17
+signal IO_H18
+signal IO_H21
+signal IO_H22
+signal IO_H23
+signal IO_H25
+signal IO_H26
+signal IO_H29
+signal IO_H30
+signal IO_H31
+signal IO_H33
+signal IO_H34
+signal IO_J2
+signal IO_J3
+signal IO_J4
+signal IO_J6
+signal IO_J7
+signal IO_J8
+signal IO_J10
+signal IO_J11
+signal IO_J12
+signal IO_J14
+signal IO_J15
+signal IO_J17
+signal IO_J18
+signal IO_J20
+signal IO_J21
+signal IO_J23
+signal IO_J25
+signal IO_J27
+signal IO_J28
+signal IO_J29
+signal IO_J31
+signal IO_J32
+signal IO_J33
+signal IO_K1
+signal IO_K2
+signal IO_K3
+signal IO_K4
+signal IO_K5
+signal IO_K6
+signal IO_K7
+signal IO_K8
+signal IO_K9
+signal IO_K12
+signal IO_K13
+signal IO_K14
+signal IO_K15
+signal IO_K16
+signal IO_K17
+signal IO_K18
+signal IO_K19
+signal IO_K20
+signal IO_K21
+signal IO_K22
+signal IO_K23
+signal IO_K26
+signal IO_K27
+signal IO_K28
+signal IO_K29
+signal IO_K30
+signal IO_K31
+signal IO_K32
+signal IO_K33
+signal IO_K34
+signal IO_L1
+signal IO_L2
+signal IO_L9
+signal IO_L10
+signal IO_L12
+signal IO_L13
+signal IO_L14
+signal IO_L15
+signal IO_L16
+signal IO_L17
+signal IO_L18
+signal IO_L19
+signal IO_L20
+signal IO_L21
+signal IO_L22
+signal IO_L24
+signal IO_L25
+signal IO_L26
+signal IO_L33
+signal IO_L34
+signal IO_M1
+signal IO_M2
+signal IO_M3
+signal IO_M4
+signal IO_M5
+signal IO_M6
+signal IO_M7
+signal IO_M8
+signal IO_M9
+signal IO_M10
+signal IO_M11
+signal IO_M24
+signal IO_M25
+signal IO_M26
+signal IO_M27
+signal IO_M28
+signal IO_M29
+signal IO_M30
+signal IO_M31
+signal IO_M32
+signal IO_M33
+signal IO_M34
+signal IO_N3
+signal IO_N4
+signal IO_N7
+signal IO_N8
+signal IO_N10
+signal IO_N11
+signal IO_N24
+signal IO_N25
+signal IO_N27
+signal IO_N28
+signal IO_N31
+signal IO_N32
+signal IO_P1
+signal IO_P2
+signal IO_P3
+signal IO_P4
+signal IO_P5
+signal IO_P6
+signal IO_P7
+signal IO_P8
+signal IO_P11
+signal IO_P24
+signal IO_P27
+signal IO_P28
+signal IO_P29
+signal IO_P30
+signal IO_P31
+signal IO_P32
+signal IO_P33
+signal IO_P34
+signal IO_R1
+signal IO_R2
+signal IO_R3
+signal IO_R4
+signal IO_R6
+signal IO_R7
+signal IO_R9
+signal IO_R10
+signal IO_R11
+signal IO_R24
+signal IO_R25
+signal IO_R26
+signal IO_R28
+signal IO_R29
+signal IO_R31
+signal IO_R32
+signal IO_R33
+signal IO_R34
+signal IO_T2
+signal IO_T3
+signal IO_T6
+signal IO_T7
+signal IO_T10
+signal IO_T25
+signal IO_T28
+signal IO_T29
+signal IO_T32
+signal IO_T33
+signal IO_U1
+signal IO_U2
+signal IO_U3
+signal IO_U4
+signal IO_U5
+signal IO_U6
+signal IO_U7
+signal IO_U8
+signal IO_U9
+signal IO_U10
+signal IO_U25
+signal IO_U26
+signal IO_U27
+signal IO_U28
+signal IO_U29
+signal IO_U30
+signal IO_U31
+signal IO_U32
+signal IO_U33
+signal IO_U34
+signal IO_V1
+signal IO_V2
+signal IO_V3
+signal IO_V4
+signal IO_V5
+signal IO_V6
+signal IO_V7
+signal IO_V8
+signal IO_V9
+signal IO_V10
+signal IO_V25
+signal IO_V26
+signal IO_V27
+signal IO_V28
+signal IO_V29
+signal IO_V30
+signal IO_V31
+signal IO_V32
+signal IO_V33
+signal IO_V34
+signal IO_W2
+signal IO_W3
+signal IO_W6
+signal IO_W7
+signal IO_W10
+signal IO_W25
+signal IO_W28
+signal IO_W29
+signal IO_W32
+signal IO_W33
+signal IO_Y1
+signal IO_Y2
+signal IO_Y3
+signal IO_Y4
+signal IO_Y6
+signal IO_Y7
+signal IO_Y9
+signal IO_Y10
+signal IO_Y11
+signal IO_Y24
+signal IO_Y25
+signal IO_Y26
+signal IO_Y28
+signal IO_Y29
+signal IO_Y31
+signal IO_Y32
+signal IO_Y33
+signal IO_Y34
+signal IO_AA1
+signal IO_AA2
+signal IO_AA3
+signal IO_AA4
+signal IO_AA5
+signal IO_AA6
+signal IO_AA7
+signal IO_AA8
+signal IO_AA11
+signal IO_AA24
+signal IO_AA27
+signal IO_AA28
+signal IO_AA29
+signal IO_AA30
+signal IO_AA31
+signal IO_AA32
+signal IO_AA33
+signal IO_AA34
+signal IO_AB3
+signal IO_AB4
+signal IO_AB7
+signal IO_AB8
+signal IO_AB10
+signal IO_AB11
+signal IO_AB24
+signal IO_AB25
+signal IO_AB27
+signal IO_AB28
+signal IO_AB31
+signal IO_AB32
+signal IO_AC1
+signal IO_AC2
+signal IO_AC3
+signal IO_AC4
+signal IO_AC5
+signal IO_AC6
+signal IO_AC7
+signal IO_AC8
+signal IO_AC9
+signal IO_AC10
+signal IO_AC11
+signal IO_AC24
+signal IO_AC25
+signal IO_AC26
+signal IO_AC27
+signal IO_AC28
+signal IO_AC29
+signal IO_AC30
+signal IO_AC31
+signal IO_AC32
+signal IO_AC33
+signal IO_AC34
+signal IO_AD1
+signal IO_AD2
+signal IO_AD9
+signal IO_AD10
+signal IO_AD11
+signal IO_AD13
+signal IO_AD14
+signal IO_AD15
+signal IO_AD16
+signal IO_AD17
+signal IO_AD18
+signal IO_AD19
+signal IO_AD20
+signal IO_AD21
+signal IO_AD22
+signal IO_AD23
+signal IO_AD25
+signal IO_AD26
+signal IO_AD33
+signal IO_AD34
+signal IO_AE1
+signal IO_AE2
+signal IO_AE3
+signal IO_AE4
+signal IO_AE5
+signal IO_AE6
+signal IO_AE7
+signal IO_AE8
+signal IO_AE9
+signal IO_AE12
+signal IO_AE13
+signal IO_AE14
+signal IO_AE15
+signal IO_AE16
+signal IO_AE17
+signal IO_AE18
+signal IO_AE19
+signal IO_AE20
+signal IO_AE21
+signal IO_AE22
+signal IO_AE23
+signal IO_AE26
+signal IO_AE27
+signal IO_AE28
+signal IO_AE29
+signal IO_AE30
+signal IO_AE31
+signal IO_AE32
+signal IO_AE33
+signal IO_AE34
+signal IO_AF2
+signal IO_AF3
+signal IO_AF4
+signal IO_AF6
+signal IO_AF7
+signal IO_AF8
+signal IO_AF10
+signal IO_AF12
+signal IO_AF14
+signal IO_AF15
+signal IO_AF17
+signal IO_AF18
+signal IO_AF20
+signal IO_AF21
+signal IO_AF23
+signal IO_AF24
+signal IO_AF25
+signal IO_AF27
+signal IO_AF28
+signal IO_AF29
+signal IO_AF31
+signal IO_AF32
+signal IO_AF33
+signal IO_AG1
+signal IO_AG2
+signal IO_AG4
+signal IO_AG5
+signal IO_AG6
+signal IO_AG9
+signal IO_AG10
+signal IO_AG12
+signal IO_AG13
+signal IO_AG14
+signal IO_AG17
+signal IO_AG18
+signal IO_AG21
+signal IO_AG22
+signal IO_AG23
+signal IO_AG25
+signal IO_AG26
+signal IO_AG27
+signal IO_AG29
+signal IO_AG30
+signal IO_AG31
+signal IO_AG33
+signal IO_AG34
+signal IO_AH1
+signal IO_AH2
+signal IO_AH5
+signal IO_AH6
+signal IO_AH9
+signal IO_AH10
+signal IO_AH12
+signal IO_AH13
+signal IO_AH14
+signal IO_AH15
+signal IO_AH16
+signal IO_AH17
+signal IO_AH18
+signal IO_AH19
+signal IO_AH20
+signal IO_AH21
+signal IO_AH22
+signal IO_AH23
+signal IO_AH25
+signal IO_AH26
+signal IO_AH29
+signal IO_AH30
+signal IO_AH33
+signal IO_AH34
+signal IO_AJ1
+signal IO_AJ2
+signal IO_AJ3
+signal IO_AJ4
+signal IO_AJ6
+signal IO_AJ7
+signal IO_AJ8
+signal IO_AJ9
+signal IO_AJ10
+signal IO_AJ12
+signal IO_AJ14
+signal IO_AJ15
+signal IO_AJ16
+signal IO_AJ17
+signal IO_AJ18
+signal IO_AJ19
+signal IO_AJ20
+signal IO_AJ21
+signal IO_AJ23
+signal IO_AJ25
+signal IO_AJ26
+signal IO_AJ27
+signal IO_AJ28
+signal IO_AJ29
+signal IO_AJ31
+signal IO_AJ32
+signal IO_AJ33
+signal IO_AJ34
+signal IO_AK2
+signal IO_AK3
+signal IO_AK7
+signal IO_AK8
+signal IO_AK10
+signal IO_AK12
+signal IO_AK14
+signal IO_AK17
+signal IO_AK18
+signal IO_AK21
+signal IO_AK23
+signal IO_AK25
+signal IO_AK27
+signal IO_AK28
+signal IO_AK32
+signal IO_AK33
+signal IO_AL1
+signal IO_AL2
+signal IO_AL5
+signal IO_AL6
+signal IO_AL8
+signal IO_AL9
+signal IO_AL10
+signal IO_AL12
+signal IO_AL13
+signal IO_AL14
+signal IO_AL15
+signal IO_AL17
+signal IO_AL18
+signal IO_AL20
+signal IO_AL21
+signal IO_AL22
+signal IO_AL23
+signal IO_AL25
+signal IO_AL26
+signal IO_AL27
+signal IO_AL29
+signal IO_AL30
+signal IO_AL33
+signal IO_AL34
+signal IO_AM1
+signal IO_AM2
+signal IO_AM5
+signal IO_AM6
+signal IO_AM9
+signal IO_AM10
+signal IO_AM12
+signal IO_AM13
+signal IO_AM14
+signal IO_AM15
+signal IO_AM16
+signal IO_AM17
+signal IO_AM18
+signal IO_AM19
+signal IO_AM20
+signal IO_AM21
+signal IO_AM22
+signal IO_AM23
+signal IO_AM25
+signal IO_AM26
+signal IO_AM29
+signal IO_AM30
+signal IO_AM33
+signal IO_AM34
+signal IO_AN3
+signal IO_AN4
+signal IO_AN5
+signal IO_AN6
+signal IO_AN8
+signal IO_AN9
+signal IO_AN10
+signal IO_AN11
+signal IO_AN12
+signal IO_AN14
+signal IO_AN15
+signal IO_AN16
+signal IO_AN17
+signal IO_AN18
+signal IO_AN19
+signal IO_AN20
+signal IO_AN21
+signal IO_AN23
+signal IO_AN25
+signal IO_AN26
+signal IO_AN27
+signal IO_AN29
+signal IO_AN30
+signal IO_AN31
+signal IO_AN32
+signal IO_AP3
+signal IO_AP4
+signal IO_AP6
+signal IO_AP8
+signal IO_AP10
+signal IO_AP11
+signal IO_AP12
+signal IO_AP14
+signal IO_AP15
+signal IO_AP17
+signal IO_AP18
+signal IO_AP20
+signal IO_AP21
+signal IO_AP23
+signal IO_AP25
+signal IO_AP27
+signal IO_AP29
+signal IO_AP31
+
+register BSR 2243
+register BR 1
+register DIR 32
+
+instruction length 6
+
+instruction EXTEST 000000 BSR
+instruction SAMPLE/PRELOAD 000001 BSR
+instruction IDCODE 001001 DIR
+instruction BYPASS 111111 BR
+
+bit 2242 I 1 IO_C33
+bit 2241 O 1 IO_C33 2240 1 Z
+bit 2240 C 1 *
+bit 2239 I 1 IO_C34
+bit 2238 O 1 IO_C34 2237 1 Z
+bit 2237 C 1 *
+bit 2236 I 1 IO_D33
+bit 2235 O 1 IO_D33 2234 1 Z
+bit 2234 C 1 *
+bit 2233 I 1 IO_D34
+bit 2232 O 1 IO_D34 2231 1 Z
+bit 2231 C 1 *
+bit 2230 I 1 IO_E32
+bit 2229 O 1 IO_E32 2228 1 Z
+bit 2228 C 1 *
+bit 2227 I 1 IO_E33
+bit 2226 O 1 IO_E33 2225 1 Z
+bit 2225 C 1 *
+bit 2224 I 1 IO_F31
+bit 2223 O 1 IO_F31 2222 1 Z
+bit 2222 C 1 *
+bit 2221 I 1 IO_F32
+bit 2220 O 1 IO_F32 2219 1 Z
+bit 2219 C 1 *
+bit 2218 I 1 IO_F33
+bit 2217 O 1 IO_F33 2216 1 Z
+bit 2216 C 1 *
+bit 2215 I 1 IO_F34
+bit 2214 O 1 IO_F34 2213 1 Z
+bit 2213 C 1 *
+bit 2212 I 1 IO_G29
+bit 2211 O 1 IO_G29 2210 1 Z
+bit 2210 C 1 *
+bit 2209 I 1 IO_G30
+bit 2208 O 1 IO_G30 2207 1 Z
+bit 2207 C 1 *
+bit 2206 I 1 IO_G33
+bit 2205 O 1 IO_G33 2204 1 Z
+bit 2204 C 1 *
+bit 2203 O 1 *
+bit 2202 O 1 *
+bit 2201 O 1 *
+bit 2200 O 1 *
+bit 2199 O 1 *
+bit 2198 O 1 *
+bit 2197 I 1 IO_G34
+bit 2196 O 1 IO_G34 2195 1 Z
+bit 2195 C 1 *
+bit 2194 I 1 IO_H29
+bit 2193 O 1 IO_H29 2192 1 Z
+bit 2192 C 1 *
+bit 2191 I 1 IO_H30
+bit 2190 O 1 IO_H30 2189 1 Z
+bit 2189 C 1 *
+bit 2188 I 1 IO_H33
+bit 2187 O 1 IO_H33 2186 1 Z
+bit 2186 C 1 *
+bit 2185 I 1 IO_H34
+bit 2184 O 1 IO_H34 2183 1 Z
+bit 2183 C 1 *
+bit 2182 I 1 IO_J28
+bit 2181 O 1 IO_J28 2180 1 Z
+bit 2180 C 1 *
+bit 2179 I 1 IO_J29
+bit 2178 O 1 IO_J29 2177 1 Z
+bit 2177 C 1 *
+bit 2176 I 1 IO_H31
+bit 2175 O 1 IO_H31 2174 1 Z
+bit 2174 C 1 *
+bit 2173 I 1 IO_J31
+bit 2172 O 1 IO_J31 2171 1 Z
+bit 2171 C 1 *
+bit 2170 I 1 IO_J32
+bit 2169 O 1 IO_J32 2168 1 Z
+bit 2168 C 1 *
+bit 2167 I 1 IO_J33
+bit 2166 O 1 IO_J33 2165 1 Z
+bit 2165 C 1 *
+bit 2164 I 1 IO_J27
+bit 2163 O 1 IO_J27 2162 1 Z
+bit 2162 C 1 *
+bit 2161 I 1 IO_K26
+bit 2160 O 1 IO_K26 2159 1 Z
+bit 2159 C 1 *
+bit 2158 I 1 IO_K27
+bit 2157 O 1 IO_K27 2156 1 Z
+bit 2156 C 1 *
+bit 2155 I 1 IO_K28
+bit 2154 O 1 IO_K28 2153 1 Z
+bit 2153 C 1 *
+bit 2152 I 1 IO_K29
+bit 2151 O 1 IO_K29 2150 1 Z
+bit 2150 C 1 *
+bit 2149 I 1 IO_K30
+bit 2148 O 1 IO_K30 2147 1 Z
+bit 2147 C 1 *
+bit 2146 I 1 IO_K31
+bit 2145 O 1 IO_K31 2144 1 Z
+bit 2144 C 1 *
+bit 2143 I 1 IO_K32
+bit 2142 O 1 IO_K32 2141 1 Z
+bit 2141 C 1 *
+bit 2140 I 1 IO_K33
+bit 2139 O 1 IO_K33 2138 1 Z
+bit 2138 C 1 *
+bit 2137 I 1 IO_K34
+bit 2136 O 1 IO_K34 2135 1 Z
+bit 2135 C 1 *
+bit 2134 I 1 IO_L25
+bit 2133 O 1 IO_L25 2132 1 Z
+bit 2132 C 1 *
+bit 2131 I 1 IO_L26
+bit 2130 O 1 IO_L26 2129 1 Z
+bit 2129 C 1 *
+bit 2128 O 1 *
+bit 2127 O 1 *
+bit 2126 O 1 *
+bit 2125 O 1 *
+bit 2124 O 1 *
+bit 2123 O 1 *
+bit 2122 I 1 IO_L33
+bit 2121 O 1 IO_L33 2120 1 Z
+bit 2120 C 1 *
+bit 2119 I 1 IO_L34
+bit 2118 O 1 IO_L34 2117 1 Z
+bit 2117 C 1 *
+bit 2116 I 1 IO_M24
+bit 2115 O 1 IO_M24 2114 1 Z
+bit 2114 C 1 *
+bit 2113 I 1 IO_M25
+bit 2112 O 1 IO_M25 2111 1 Z
+bit 2111 C 1 *
+bit 2110 I 1 IO_M27
+bit 2109 O 1 IO_M27 2108 1 Z
+bit 2108 C 1 *
+bit 2107 I 1 IO_M28
+bit 2106 O 1 IO_M28 2105 1 Z
+bit 2105 C 1 *
+bit 2104 I 1 IO_M29
+bit 2103 O 1 IO_M29 2102 1 Z
+bit 2102 C 1 *
+bit 2101 I 1 IO_M30
+bit 2100 O 1 IO_M30 2099 1 Z
+bit 2099 C 1 *
+bit 2098 I 1 IO_M31
+bit 2097 O 1 IO_M31 2096 1 Z
+bit 2096 C 1 *
+bit 2095 I 1 IO_M32
+bit 2094 O 1 IO_M32 2093 1 Z
+bit 2093 C 1 *
+bit 2092 I 1 IO_M33
+bit 2091 O 1 IO_M33 2090 1 Z
+bit 2090 C 1 *
+bit 2089 I 1 IO_M34
+bit 2088 O 1 IO_M34 2087 1 Z
+bit 2087 C 1 *
+bit 2086 I 1 IO_M26
+bit 2085 O 1 IO_M26 2084 1 Z
+bit 2084 C 1 *
+bit 2083 I 1 IO_N25
+bit 2082 O 1 IO_N25 2081 1 Z
+bit 2081 C 1 *
+bit 2080 I 1 IO_N27
+bit 2079 O 1 IO_N27 2078 1 Z
+bit 2078 C 1 *
+bit 2077 I 1 IO_N28
+bit 2076 O 1 IO_N28 2075 1 Z
+bit 2075 C 1 *
+bit 2074 I 1 IO_N31
+bit 2073 O 1 IO_N31 2072 1 Z
+bit 2072 C 1 *
+bit 2071 I 1 IO_N32
+bit 2070 O 1 IO_N32 2069 1 Z
+bit 2069 C 1 *
+bit 2068 I 1 IO_N24
+bit 2067 O 1 IO_N24 2066 1 Z
+bit 2066 C 1 *
+bit 2065 I 1 IO_P24
+bit 2064 O 1 IO_P24 2063 1 Z
+bit 2063 C 1 *
+bit 2062 O 1 *
+bit 2061 O 1 *
+bit 2060 O 1 *
+bit 2059 O 1 *
+bit 2058 O 1 *
+bit 2057 O 1 *
+bit 2056 I 1 IO_P27
+bit 2055 O 1 IO_P27 2054 1 Z
+bit 2054 C 1 *
+bit 2053 I 1 IO_P28
+bit 2052 O 1 IO_P28 2051 1 Z
+bit 2051 C 1 *
+bit 2050 I 1 IO_P29
+bit 2049 O 1 IO_P29 2048 1 Z
+bit 2048 C 1 *
+bit 2047 I 1 IO_P30
+bit 2046 O 1 IO_P30 2045 1 Z
+bit 2045 C 1 *
+bit 2044 I 1 IO_P31
+bit 2043 O 1 IO_P31 2042 1 Z
+bit 2042 C 1 *
+bit 2041 I 1 IO_P32
+bit 2040 O 1 IO_P32 2039 1 Z
+bit 2039 C 1 *
+bit 2038 I 1 IO_P33
+bit 2037 O 1 IO_P33 2036 1 Z
+bit 2036 C 1 *
+bit 2035 I 1 IO_P34
+bit 2034 O 1 IO_P34 2033 1 Z
+bit 2033 C 1 *
+bit 2032 I 1 IO_R24
+bit 2031 O 1 IO_R24 2030 1 Z
+bit 2030 C 1 *
+bit 2029 I 1 IO_R25
+bit 2028 O 1 IO_R25 2027 1 Z
+bit 2027 C 1 *
+bit 2026 I 1 IO_R28
+bit 2025 O 1 IO_R28 2024 1 Z
+bit 2024 C 1 *
+bit 2023 I 1 IO_R29
+bit 2022 O 1 IO_R29 2021 1 Z
+bit 2021 C 1 *
+bit 2020 I 1 IO_R31
+bit 2019 O 1 IO_R31 2018 1 Z
+bit 2018 C 1 *
+bit 2017 I 1 IO_R32
+bit 2016 O 1 IO_R32 2015 1 Z
+bit 2015 C 1 *
+bit 2014 I 1 IO_R33
+bit 2013 O 1 IO_R33 2012 1 Z
+bit 2012 C 1 *
+bit 2011 I 1 IO_R34
+bit 2010 O 1 IO_R34 2009 1 Z
+bit 2009 C 1 *
+bit 2008 I 1 IO_R26
+bit 2007 O 1 IO_R26 2006 1 Z
+bit 2006 C 1 *
+bit 2005 I 1 IO_T25
+bit 2004 O 1 IO_T25 2003 1 Z
+bit 2003 C 1 *
+bit 2002 I 1 IO_T28
+bit 2001 O 1 IO_T28 2000 1 Z
+bit 2000 C 1 *
+bit 1999 I 1 IO_T29
+bit 1998 O 1 IO_T29 1997 1 Z
+bit 1997 C 1 *
+bit 1996 I 1 IO_T32
+bit 1995 O 1 IO_T32 1994 1 Z
+bit 1994 C 1 *
+bit 1993 I 1 IO_T33
+bit 1992 O 1 IO_T33 1991 1 Z
+bit 1991 C 1 *
+bit 1990 I 1 IO_U25
+bit 1989 O 1 IO_U25 1988 1 Z
+bit 1988 C 1 *
+bit 1987 O 1 *
+bit 1986 O 1 *
+bit 1985 O 1 *
+bit 1984 O 1 *
+bit 1983 O 1 *
+bit 1982 O 1 *
+bit 1981 I 1 IO_U26
+bit 1980 O 1 IO_U26 1979 1 Z
+bit 1979 C 1 *
+bit 1978 I 1 IO_U27
+bit 1977 O 1 IO_U27 1976 1 Z
+bit 1976 C 1 *
+bit 1975 I 1 IO_U28
+bit 1974 O 1 IO_U28 1973 1 Z
+bit 1973 C 1 *
+bit 1972 I 1 IO_U29
+bit 1971 O 1 IO_U29 1970 1 Z
+bit 1970 C 1 *
+bit 1969 I 1 IO_U30
+bit 1968 O 1 IO_U30 1967 1 Z
+bit 1967 C 1 *
+bit 1966 I 1 IO_U31
+bit 1965 O 1 IO_U31 1964 1 Z
+bit 1964 C 1 *
+bit 1963 I 1 IO_U32
+bit 1962 O 1 IO_U32 1961 1 Z
+bit 1961 C 1 *
+bit 1960 I 1 IO_U33
+bit 1959 O 1 IO_U33 1958 1 Z
+bit 1958 C 1 *
+bit 1957 I 1 IO_U34
+bit 1956 O 1 IO_U34 1955 1 Z
+bit 1955 C 1 *
+bit 1954 I 1 IO_V34
+bit 1953 O 1 IO_V34 1952 1 Z
+bit 1952 C 1 *
+bit 1951 I 1 IO_V33
+bit 1950 O 1 IO_V33 1949 1 Z
+bit 1949 C 1 *
+bit 1948 I 1 IO_V32
+bit 1947 O 1 IO_V32 1946 1 Z
+bit 1946 C 1 *
+bit 1945 I 1 IO_V31
+bit 1944 O 1 IO_V31 1943 1 Z
+bit 1943 C 1 *
+bit 1942 I 1 IO_V30
+bit 1941 O 1 IO_V30 1940 1 Z
+bit 1940 C 1 *
+bit 1939 I 1 IO_V29
+bit 1938 O 1 IO_V29 1937 1 Z
+bit 1937 C 1 *
+bit 1936 I 1 IO_V28
+bit 1935 O 1 IO_V28 1934 1 Z
+bit 1934 C 1 *
+bit 1933 I 1 IO_V27
+bit 1932 O 1 IO_V27 1931 1 Z
+bit 1931 C 1 *
+bit 1930 I 1 IO_V26
+bit 1929 O 1 IO_V26 1928 1 Z
+bit 1928 C 1 *
+bit 1927 O 1 *
+bit 1926 O 1 *
+bit 1925 O 1 *
+bit 1924 O 1 *
+bit 1923 O 1 *
+bit 1922 O 1 *
+bit 1921 I 1 IO_V25
+bit 1920 O 1 IO_V25 1919 1 Z
+bit 1919 C 1 *
+bit 1918 I 1 IO_W33
+bit 1917 O 1 IO_W33 1916 1 Z
+bit 1916 C 1 *
+bit 1915 I 1 IO_W32
+bit 1914 O 1 IO_W32 1913 1 Z
+bit 1913 C 1 *
+bit 1912 I 1 IO_W29
+bit 1911 O 1 IO_W29 1910 1 Z
+bit 1910 C 1 *
+bit 1909 I 1 IO_W28
+bit 1908 O 1 IO_W28 1907 1 Z
+bit 1907 C 1 *
+bit 1906 I 1 IO_W25
+bit 1905 O 1 IO_W25 1904 1 Z
+bit 1904 C 1 *
+bit 1903 I 1 IO_Y26
+bit 1902 O 1 IO_Y26 1901 1 Z
+bit 1901 C 1 *
+bit 1900 I 1 IO_Y34
+bit 1899 O 1 IO_Y34 1898 1 Z
+bit 1898 C 1 *
+bit 1897 I 1 IO_Y33
+bit 1896 O 1 IO_Y33 1895 1 Z
+bit 1895 C 1 *
+bit 1894 I 1 IO_Y32
+bit 1893 O 1 IO_Y32 1892 1 Z
+bit 1892 C 1 *
+bit 1891 I 1 IO_Y31
+bit 1890 O 1 IO_Y31 1889 1 Z
+bit 1889 C 1 *
+bit 1888 I 1 IO_Y29
+bit 1887 O 1 IO_Y29 1886 1 Z
+bit 1886 C 1 *
+bit 1885 I 1 IO_Y28
+bit 1884 O 1 IO_Y28 1883 1 Z
+bit 1883 C 1 *
+bit 1882 I 1 IO_Y25
+bit 1881 O 1 IO_Y25 1880 1 Z
+bit 1880 C 1 *
+bit 1879 I 1 IO_Y24
+bit 1878 O 1 IO_Y24 1877 1 Z
+bit 1877 C 1 *
+bit 1876 I 1 IO_AA34
+bit 1875 O 1 IO_AA34 1874 1 Z
+bit 1874 C 1 *
+bit 1873 I 1 IO_AA33
+bit 1872 O 1 IO_AA33 1871 1 Z
+bit 1871 C 1 *
+bit 1870 I 1 IO_AA32
+bit 1869 O 1 IO_AA32 1868 1 Z
+bit 1868 C 1 *
+bit 1867 I 1 IO_AA31
+bit 1866 O 1 IO_AA31 1865 1 Z
+bit 1865 C 1 *
+bit 1864 I 1 IO_AA30
+bit 1863 O 1 IO_AA30 1862 1 Z
+bit 1862 C 1 *
+bit 1861 I 1 IO_AA29
+bit 1860 O 1 IO_AA29 1859 1 Z
+bit 1859 C 1 *
+bit 1858 I 1 IO_AA28
+bit 1857 O 1 IO_AA28 1856 1 Z
+bit 1856 C 1 *
+bit 1855 I 1 IO_AA27
+bit 1854 O 1 IO_AA27 1853 1 Z
+bit 1853 C 1 *
+bit 1852 O 1 *
+bit 1851 O 1 *
+bit 1850 O 1 *
+bit 1849 O 1 *
+bit 1848 O 1 *
+bit 1847 O 1 *
+bit 1846 I 1 IO_AA24
+bit 1845 O 1 IO_AA24 1844 1 Z
+bit 1844 C 1 *
+bit 1843 I 1 IO_AB24
+bit 1842 O 1 IO_AB24 1841 1 Z
+bit 1841 C 1 *
+bit 1840 I 1 IO_AB32
+bit 1839 O 1 IO_AB32 1838 1 Z
+bit 1838 C 1 *
+bit 1837 I 1 IO_AB31
+bit 1836 O 1 IO_AB31 1835 1 Z
+bit 1835 C 1 *
+bit 1834 I 1 IO_AB28
+bit 1833 O 1 IO_AB28 1832 1 Z
+bit 1832 C 1 *
+bit 1831 I 1 IO_AB27
+bit 1830 O 1 IO_AB27 1829 1 Z
+bit 1829 C 1 *
+bit 1828 I 1 IO_AB25
+bit 1827 O 1 IO_AB25 1826 1 Z
+bit 1826 C 1 *
+bit 1825 I 1 IO_AC26
+bit 1824 O 1 IO_AC26 1823 1 Z
+bit 1823 C 1 *
+bit 1822 I 1 IO_AC34
+bit 1821 O 1 IO_AC34 1820 1 Z
+bit 1820 C 1 *
+bit 1819 I 1 IO_AC33
+bit 1818 O 1 IO_AC33 1817 1 Z
+bit 1817 C 1 *
+bit 1816 I 1 IO_AC32
+bit 1815 O 1 IO_AC32 1814 1 Z
+bit 1814 C 1 *
+bit 1813 I 1 IO_AC31
+bit 1812 O 1 IO_AC31 1811 1 Z
+bit 1811 C 1 *
+bit 1810 I 1 IO_AC30
+bit 1809 O 1 IO_AC30 1808 1 Z
+bit 1808 C 1 *
+bit 1807 I 1 IO_AC29
+bit 1806 O 1 IO_AC29 1805 1 Z
+bit 1805 C 1 *
+bit 1804 I 1 IO_AC28
+bit 1803 O 1 IO_AC28 1802 1 Z
+bit 1802 C 1 *
+bit 1801 I 1 IO_AC27
+bit 1800 O 1 IO_AC27 1799 1 Z
+bit 1799 C 1 *
+bit 1798 I 1 IO_AC25
+bit 1797 O 1 IO_AC25 1796 1 Z
+bit 1796 C 1 *
+bit 1795 I 1 IO_AC24
+bit 1794 O 1 IO_AC24 1793 1 Z
+bit 1793 C 1 *
+bit 1792 I 1 IO_AD34
+bit 1791 O 1 IO_AD34 1790 1 Z
+bit 1790 C 1 *
+bit 1789 I 1 IO_AD33
+bit 1788 O 1 IO_AD33 1787 1 Z
+bit 1787 C 1 *
+bit 1786 O 1 *
+bit 1785 O 1 *
+bit 1784 O 1 *
+bit 1783 O 1 *
+bit 1782 O 1 *
+bit 1781 O 1 *
+bit 1780 I 1 IO_AD26
+bit 1779 O 1 IO_AD26 1778 1 Z
+bit 1778 C 1 *
+bit 1777 I 1 IO_AD25
+bit 1776 O 1 IO_AD25 1775 1 Z
+bit 1775 C 1 *
+bit 1774 I 1 IO_AE34
+bit 1773 O 1 IO_AE34 1772 1 Z
+bit 1772 C 1 *
+bit 1771 I 1 IO_AE33
+bit 1770 O 1 IO_AE33 1769 1 Z
+bit 1769 C 1 *
+bit 1768 I 1 IO_AE32
+bit 1767 O 1 IO_AE32 1766 1 Z
+bit 1766 C 1 *
+bit 1765 I 1 IO_AE31
+bit 1764 O 1 IO_AE31 1763 1 Z
+bit 1763 C 1 *
+bit 1762 I 1 IO_AE30
+bit 1761 O 1 IO_AE30 1760 1 Z
+bit 1760 C 1 *
+bit 1759 I 1 IO_AE29
+bit 1758 O 1 IO_AE29 1757 1 Z
+bit 1757 C 1 *
+bit 1756 I 1 IO_AE28
+bit 1755 O 1 IO_AE28 1754 1 Z
+bit 1754 C 1 *
+bit 1753 I 1 IO_AE27
+bit 1752 O 1 IO_AE27 1751 1 Z
+bit 1751 C 1 *
+bit 1750 I 1 IO_AE26
+bit 1749 O 1 IO_AE26 1748 1 Z
+bit 1748 C 1 *
+bit 1747 I 1 IO_AF27
+bit 1746 O 1 IO_AF27 1745 1 Z
+bit 1745 C 1 *
+bit 1744 I 1 IO_AF33
+bit 1743 O 1 IO_AF33 1742 1 Z
+bit 1742 C 1 *
+bit 1741 I 1 IO_AF32
+bit 1740 O 1 IO_AF32 1739 1 Z
+bit 1739 C 1 *
+bit 1738 I 1 IO_AF31
+bit 1737 O 1 IO_AF31 1736 1 Z
+bit 1736 C 1 *
+bit 1735 I 1 IO_AG31
+bit 1734 O 1 IO_AG31 1733 1 Z
+bit 1733 C 1 *
+bit 1732 I 1 IO_AF29
+bit 1731 O 1 IO_AF29 1730 1 Z
+bit 1730 C 1 *
+bit 1729 I 1 IO_AF28
+bit 1728 O 1 IO_AF28 1727 1 Z
+bit 1727 C 1 *
+bit 1726 I 1 IO_AG34
+bit 1725 O 1 IO_AG34 1724 1 Z
+bit 1724 C 1 *
+bit 1723 I 1 IO_AG33
+bit 1722 O 1 IO_AG33 1721 1 Z
+bit 1721 C 1 *
+bit 1720 I 1 IO_AG30
+bit 1719 O 1 IO_AG30 1718 1 Z
+bit 1718 C 1 *
+bit 1717 I 1 IO_AG29
+bit 1716 O 1 IO_AG29 1715 1 Z
+bit 1715 C 1 *
+bit 1714 I 1 IO_AH34
+bit 1713 O 1 IO_AH34 1712 1 Z
+bit 1712 C 1 *
+bit 1711 O 1 *
+bit 1710 O 1 *
+bit 1709 O 1 *
+bit 1708 O 1 *
+bit 1707 O 1 *
+bit 1706 O 1 *
+bit 1705 I 1 IO_AH33
+bit 1704 O 1 IO_AH33 1703 1 Z
+bit 1703 C 1 *
+bit 1702 I 1 IO_AH30
+bit 1701 O 1 IO_AH30 1700 1 Z
+bit 1700 C 1 *
+bit 1699 I 1 IO_AH29
+bit 1698 O 1 IO_AH29 1697 1 Z
+bit 1697 C 1 *
+bit 1696 I 1 IO_AJ34
+bit 1695 O 1 IO_AJ34 1694 1 Z
+bit 1694 C 1 *
+bit 1693 I 1 IO_AJ33
+bit 1692 O 1 IO_AJ33 1691 1 Z
+bit 1691 C 1 *
+bit 1690 I 1 IO_AJ32
+bit 1689 O 1 IO_AJ32 1688 1 Z
+bit 1688 C 1 *
+bit 1687 I 1 IO_AJ31
+bit 1686 O 1 IO_AJ31 1685 1 Z
+bit 1685 C 1 *
+bit 1684 I 1 IO_AK33
+bit 1683 O 1 IO_AK33 1682 1 Z
+bit 1682 C 1 *
+bit 1681 I 1 IO_AK32
+bit 1680 O 1 IO_AK32 1679 1 Z
+bit 1679 C 1 *
+bit 1678 I 1 IO_AL34
+bit 1677 O 1 IO_AL34 1676 1 Z
+bit 1676 C 1 *
+bit 1675 I 1 IO_AL33
+bit 1674 O 1 IO_AL33 1673 1 Z
+bit 1673 C 1 *
+bit 1672 I 1 IO_AM34
+bit 1671 O 1 IO_AM34 1670 1 Z
+bit 1670 C 1 *
+bit 1669 I 1 IO_AM33
+bit 1668 O 1 IO_AM33 1667 1 Z
+bit 1667 C 1 *
+bit 1666 I 1 CCLK_AL31
+bit 1665 O 1 CCLK_AL31 1664 1 Z
+bit 1664 C 1 *
+bit 1663 I 1 DONE_AD24
+bit 1662 O 1 DONE_AD24 1661 1 Z
+bit 1661 C 1 *
+bit 1660 I 1 IO_AL30
+bit 1659 O 1 IO_AL30 1658 1 Z
+bit 1658 C 1 *
+bit 1657 I 1 IO_AN32
+bit 1656 O 1 IO_AN32 1655 1 Z
+bit 1655 C 1 *
+bit 1654 I 1 IO_AP32
+bit 1653 O 1 IO_AP32 1652 1 Z
+bit 1652 C 1 *
+bit 1651 I 1 IO_AN31
+bit 1650 O 1 IO_AN31 1649 1 Z
+bit 1649 C 1 *
+bit 1648 I 1 IO_AP31
+bit 1647 O 1 IO_AP31 1646 1 Z
+bit 1646 C 1 *
+bit 1645 I 1 IO_AJ29
+bit 1644 O 1 IO_AJ29 1643 1 Z
+bit 1643 C 1 *
+bit 1642 I 1 IO_AM30
+bit 1641 O 1 IO_AM30 1640 1 Z
+bit 1640 C 1 *
+bit 1639 I 1 IO_AN30
+bit 1638 O 1 IO_AN30 1637 1 Z
+bit 1637 C 1 *
+bit 1636 I 1 IO_AL29
+bit 1635 O 1 IO_AL29 1634 1 Z
+bit 1634 C 1 *
+bit 1633 I 1 IO_AM29
+bit 1632 O 1 IO_AM29 1631 1 Z
+bit 1631 C 1 *
+bit 1630 I 1 IO_AG27
+bit 1629 O 1 IO_AG27 1628 1 Z
+bit 1628 C 1 *
+bit 1627 I 1 IO_AN29
+bit 1626 O 1 IO_AN29 1625 1 Z
+bit 1625 C 1 *
+bit 1624 I 1 IO_AP29
+bit 1623 O 1 IO_AP29 1622 1 Z
+bit 1622 C 1 *
+bit 1621 I 1 IO_AJ28
+bit 1620 O 1 IO_AJ28 1619 1 Z
+bit 1619 C 1 *
+bit 1618 I 1 IO_AK28
+bit 1617 O 1 IO_AK28 1616 1 Z
+bit 1616 C 1 *
+bit 1615 I 1 IO_AJ27
+bit 1614 O 1 IO_AJ27 1613 1 Z
+bit 1613 C 1 *
+bit 1612 I 1 IO_AK27
+bit 1611 O 1 IO_AK27 1610 1 Z
+bit 1610 C 1 *
+bit 1609 I 1 IO_AL27
+bit 1608 O 1 IO_AL27 1607 1 Z
+bit 1607 C 1 *
+bit 1606 I 1 IO_AN27
+bit 1605 O 1 IO_AN27 1604 1 Z
+bit 1604 C 1 *
+bit 1603 I 1 IO_AP27
+bit 1602 O 1 IO_AP27 1601 1 Z
+bit 1601 C 1 *
+bit 1600 I 1 IO_AG26
+bit 1599 O 1 IO_AG26 1598 1 Z
+bit 1598 C 1 *
+bit 1597 I 1 IO_AH26
+bit 1596 O 1 IO_AH26 1595 1 Z
+bit 1595 C 1 *
+bit 1594 I 1 IO_AJ26
+bit 1593 O 1 IO_AJ26 1592 1 Z
+bit 1592 C 1 *
+bit 1591 I 1 IO_AL26
+bit 1590 O 1 IO_AL26 1589 1 Z
+bit 1589 C 1 *
+bit 1588 I 1 IO_AM26
+bit 1587 O 1 IO_AM26 1586 1 Z
+bit 1586 C 1 *
+bit 1585 I 1 IO_AN26
+bit 1584 O 1 IO_AN26 1583 1 Z
+bit 1583 C 1 *
+bit 1582 I 1 IO_AF25
+bit 1581 O 1 IO_AF25 1580 1 Z
+bit 1580 C 1 *
+bit 1579 I 1 IO_AG25
+bit 1578 O 1 IO_AG25 1577 1 Z
+bit 1577 C 1 *
+bit 1576 I 1 IO_AH25
+bit 1575 O 1 IO_AH25 1574 1 Z
+bit 1574 C 1 *
+bit 1573 I 1 IO_AJ25
+bit 1572 O 1 IO_AJ25 1571 1 Z
+bit 1571 C 1 *
+bit 1570 I 1 IO_AK25
+bit 1569 O 1 IO_AK25 1568 1 Z
+bit 1568 C 1 *
+bit 1567 I 1 IO_AL25
+bit 1566 O 1 IO_AL25 1565 1 Z
+bit 1565 C 1 *
+bit 1564 I 1 IO_AM25
+bit 1563 O 1 IO_AM25 1562 1 Z
+bit 1562 C 1 *
+bit 1561 I 1 IO_AN25
+bit 1560 O 1 IO_AN25 1559 1 Z
+bit 1559 C 1 *
+bit 1558 I 1 IO_AP25
+bit 1557 O 1 IO_AP25 1556 1 Z
+bit 1556 C 1 *
+bit 1555 I 1 IO_AF24
+bit 1554 O 1 IO_AF24 1553 1 Z
+bit 1553 C 1 *
+bit 1552 I 1 IO_AD23
+bit 1551 O 1 IO_AD23 1550 1 Z
+bit 1550 C 1 *
+bit 1549 I 1 IO_AE23
+bit 1548 O 1 IO_AE23 1547 1 Z
+bit 1547 C 1 *
+bit 1546 I 1 IO_AF23
+bit 1545 O 1 IO_AF23 1544 1 Z
+bit 1544 C 1 *
+bit 1543 I 1 IO_AG23
+bit 1542 O 1 IO_AG23 1541 1 Z
+bit 1541 C 1 *
+bit 1540 I 1 IO_AH23
+bit 1539 O 1 IO_AH23 1538 1 Z
+bit 1538 C 1 *
+bit 1537 I 1 IO_AJ23
+bit 1536 O 1 IO_AJ23 1535 1 Z
+bit 1535 C 1 *
+bit 1534 I 1 IO_AK23
+bit 1533 O 1 IO_AK23 1532 1 Z
+bit 1532 C 1 *
+bit 1531 I 1 IO_AL23
+bit 1530 O 1 IO_AL23 1529 1 Z
+bit 1529 C 1 *
+bit 1528 I 1 IO_AM23
+bit 1527 O 1 IO_AM23 1526 1 Z
+bit 1526 C 1 *
+bit 1525 I 1 IO_AD22
+bit 1524 O 1 IO_AD22 1523 1 Z
+bit 1523 C 1 *
+bit 1522 I 1 IO_AN23
+bit 1521 O 1 IO_AN23 1520 1 Z
+bit 1520 C 1 *
+bit 1519 I 1 IO_AP23
+bit 1518 O 1 IO_AP23 1517 1 Z
+bit 1517 C 1 *
+bit 1516 I 1 IO_AG22
+bit 1515 O 1 IO_AG22 1514 1 Z
+bit 1514 C 1 *
+bit 1513 I 1 IO_AH22
+bit 1512 O 1 IO_AH22 1511 1 Z
+bit 1511 C 1 *
+bit 1510 I 1 IO_AE22
+bit 1509 O 1 IO_AE22 1508 1 Z
+bit 1508 C 1 *
+bit 1507 I 1 IO_AL22
+bit 1506 O 1 IO_AL22 1505 1 Z
+bit 1505 C 1 *
+bit 1504 I 1 IO_AM22
+bit 1503 O 1 IO_AM22 1502 1 Z
+bit 1502 C 1 *
+bit 1501 I 1 IO_AD21
+bit 1500 O 1 IO_AD21 1499 1 Z
+bit 1499 C 1 *
+bit 1498 I 1 IO_AE21
+bit 1497 O 1 IO_AE21 1496 1 Z
+bit 1496 C 1 *
+bit 1495 I 1 IO_AF21
+bit 1494 O 1 IO_AF21 1493 1 Z
+bit 1493 C 1 *
+bit 1492 I 1 IO_AG21
+bit 1491 O 1 IO_AG21 1490 1 Z
+bit 1490 C 1 *
+bit 1489 I 1 IO_AH21
+bit 1488 O 1 IO_AH21 1487 1 Z
+bit 1487 C 1 *
+bit 1486 I 1 IO_AJ21
+bit 1485 O 1 IO_AJ21 1484 1 Z
+bit 1484 C 1 *
+bit 1483 I 1 IO_AK21
+bit 1482 O 1 IO_AK21 1481 1 Z
+bit 1481 C 1 *
+bit 1480 I 1 IO_AD20
+bit 1479 O 1 IO_AD20 1478 1 Z
+bit 1478 C 1 *
+bit 1477 I 1 IO_AL21
+bit 1476 O 1 IO_AL21 1475 1 Z
+bit 1475 C 1 *
+bit 1474 I 1 IO_AM21
+bit 1473 O 1 IO_AM21 1472 1 Z
+bit 1472 C 1 *
+bit 1471 I 1 IO_AN21
+bit 1470 O 1 IO_AN21 1469 1 Z
+bit 1469 C 1 *
+bit 1468 I 1 IO_AP21
+bit 1467 O 1 IO_AP21 1466 1 Z
+bit 1466 C 1 *
+bit 1465 I 1 IO_AD19
+bit 1464 O 1 IO_AD19 1463 1 Z
+bit 1463 C 1 *
+bit 1462 I 1 IO_AE20
+bit 1461 O 1 IO_AE20 1460 1 Z
+bit 1460 C 1 *
+bit 1459 I 1 IO_AF20
+bit 1458 O 1 IO_AF20 1457 1 Z
+bit 1457 C 1 *
+bit 1456 I 1 IO_AH20
+bit 1455 O 1 IO_AH20 1454 1 Z
+bit 1454 C 1 *
+bit 1453 I 1 IO_AJ20
+bit 1452 O 1 IO_AJ20 1451 1 Z
+bit 1451 C 1 *
+bit 1450 I 1 IO_AE19
+bit 1449 O 1 IO_AE19 1448 1 Z
+bit 1448 C 1 *
+bit 1447 I 1 IO_AL20
+bit 1446 O 1 IO_AL20 1445 1 Z
+bit 1445 C 1 *
+bit 1444 I 1 IO_AM20
+bit 1443 O 1 IO_AM20 1442 1 Z
+bit 1442 C 1 *
+bit 1441 I 1 IO_AN20
+bit 1440 O 1 IO_AN20 1439 1 Z
+bit 1439 C 1 *
+bit 1438 I 1 IO_AP20
+bit 1437 O 1 IO_AP20 1436 1 Z
+bit 1436 C 1 *
+bit 1435 I 1 IO_AD18
+bit 1434 O 1 IO_AD18 1433 1 Z
+bit 1433 C 1 *
+bit 1432 I 1 IO_AH19
+bit 1431 O 1 IO_AH19 1430 1 Z
+bit 1430 C 1 *
+bit 1429 I 1 IO_AJ19
+bit 1428 O 1 IO_AJ19 1427 1 Z
+bit 1427 C 1 *
+bit 1426 I 1 IO_AM19
+bit 1425 O 1 IO_AM19 1424 1 Z
+bit 1424 C 1 *
+bit 1423 I 1 IO_AN19
+bit 1422 O 1 IO_AN19 1421 1 Z
+bit 1421 C 1 *
+bit 1420 I 1 IO_AE18
+bit 1419 O 1 IO_AE18 1418 1 Z
+bit 1418 C 1 *
+bit 1417 I 1 IO_AF18
+bit 1416 O 1 IO_AF18 1415 1 Z
+bit 1415 C 1 *
+bit 1414 I 1 IO_AG18
+bit 1413 O 1 IO_AG18 1412 1 Z
+bit 1412 C 1 *
+bit 1411 I 1 IO_AH18
+bit 1410 O 1 IO_AH18 1409 1 Z
+bit 1409 C 1 *
+bit 1408 I 1 IO_AJ18
+bit 1407 O 1 IO_AJ18 1406 1 Z
+bit 1406 C 1 *
+bit 1405 I 1 IO_AK18
+bit 1404 O 1 IO_AK18 1403 1 Z
+bit 1403 C 1 *
+bit 1402 I 1 IO_AL18
+bit 1401 O 1 IO_AL18 1400 1 Z
+bit 1400 C 1 *
+bit 1399 I 1 IO_AM18
+bit 1398 O 1 IO_AM18 1397 1 Z
+bit 1397 C 1 *
+bit 1396 I 1 IO_AN18
+bit 1395 O 1 IO_AN18 1394 1 Z
+bit 1394 C 1 *
+bit 1393 I 1 IO_AP18
+bit 1392 O 1 IO_AP18 1391 1 Z
+bit 1391 C 1 *
+bit 1390 I 1 IO_AP17
+bit 1389 O 1 IO_AP17 1388 1 Z
+bit 1388 C 1 *
+bit 1387 I 1 IO_AN17
+bit 1386 O 1 IO_AN17 1385 1 Z
+bit 1385 C 1 *
+bit 1384 I 1 IO_AM17
+bit 1383 O 1 IO_AM17 1382 1 Z
+bit 1382 C 1 *
+bit 1381 I 1 IO_AL17
+bit 1380 O 1 IO_AL17 1379 1 Z
+bit 1379 C 1 *
+bit 1378 I 1 IO_AK17
+bit 1377 O 1 IO_AK17 1376 1 Z
+bit 1376 C 1 *
+bit 1375 I 1 IO_AJ17
+bit 1374 O 1 IO_AJ17 1373 1 Z
+bit 1373 C 1 *
+bit 1372 I 1 IO_AH17
+bit 1371 O 1 IO_AH17 1370 1 Z
+bit 1370 C 1 *
+bit 1369 I 1 IO_AG17
+bit 1368 O 1 IO_AG17 1367 1 Z
+bit 1367 C 1 *
+bit 1366 I 1 IO_AF17
+bit 1365 O 1 IO_AF17 1364 1 Z
+bit 1364 C 1 *
+bit 1363 I 1 IO_AE17
+bit 1362 O 1 IO_AE17 1361 1 Z
+bit 1361 C 1 *
+bit 1360 I 1 IO_AD17
+bit 1359 O 1 IO_AD17 1358 1 Z
+bit 1358 C 1 *
+bit 1357 I 1 IO_AN16
+bit 1356 O 1 IO_AN16 1355 1 Z
+bit 1355 C 1 *
+bit 1354 I 1 IO_AM16
+bit 1353 O 1 IO_AM16 1352 1 Z
+bit 1352 C 1 *
+bit 1351 I 1 IO_AJ16
+bit 1350 O 1 IO_AJ16 1349 1 Z
+bit 1349 C 1 *
+bit 1348 I 1 IO_AH16
+bit 1347 O 1 IO_AH16 1346 1 Z
+bit 1346 C 1 *
+bit 1345 I 1 IO_AE16
+bit 1344 O 1 IO_AE16 1343 1 Z
+bit 1343 C 1 *
+bit 1342 I 1 IO_AP15
+bit 1341 O 1 IO_AP15 1340 1 Z
+bit 1340 C 1 *
+bit 1339 I 1 IO_AN15
+bit 1338 O 1 IO_AN15 1337 1 Z
+bit 1337 C 1 *
+bit 1336 I 1 IO_AM15
+bit 1335 O 1 IO_AM15 1334 1 Z
+bit 1334 C 1 *
+bit 1333 I 1 IO_AL15
+bit 1332 O 1 IO_AL15 1331 1 Z
+bit 1331 C 1 *
+bit 1330 I 1 IO_AD16
+bit 1329 O 1 IO_AD16 1328 1 Z
+bit 1328 C 1 *
+bit 1327 I 1 IO_AJ15
+bit 1326 O 1 IO_AJ15 1325 1 Z
+bit 1325 C 1 *
+bit 1324 I 1 IO_AH15
+bit 1323 O 1 IO_AH15 1322 1 Z
+bit 1322 C 1 *
+bit 1321 I 1 IO_AF15
+bit 1320 O 1 IO_AF15 1319 1 Z
+bit 1319 C 1 *
+bit 1318 I 1 IO_AE15
+bit 1317 O 1 IO_AE15 1316 1 Z
+bit 1316 C 1 *
+bit 1315 I 1 IO_AD15
+bit 1314 O 1 IO_AD15 1313 1 Z
+bit 1313 C 1 *
+bit 1312 I 1 IO_AP14
+bit 1311 O 1 IO_AP14 1310 1 Z
+bit 1310 C 1 *
+bit 1309 I 1 IO_AN14
+bit 1308 O 1 IO_AN14 1307 1 Z
+bit 1307 C 1 *
+bit 1306 I 1 IO_AM14
+bit 1305 O 1 IO_AM14 1304 1 Z
+bit 1304 C 1 *
+bit 1303 I 1 IO_AL14
+bit 1302 O 1 IO_AL14 1301 1 Z
+bit 1301 C 1 *
+bit 1300 I 1 IO_AK14
+bit 1299 O 1 IO_AK14 1298 1 Z
+bit 1298 C 1 *
+bit 1297 I 1 IO_AJ14
+bit 1296 O 1 IO_AJ14 1295 1 Z
+bit 1295 C 1 *
+bit 1294 I 1 IO_AH14
+bit 1293 O 1 IO_AH14 1292 1 Z
+bit 1292 C 1 *
+bit 1291 I 1 IO_AG14
+bit 1290 O 1 IO_AG14 1289 1 Z
+bit 1289 C 1 *
+bit 1288 I 1 IO_AF14
+bit 1287 O 1 IO_AF14 1286 1 Z
+bit 1286 C 1 *
+bit 1285 I 1 IO_AE14
+bit 1284 O 1 IO_AE14 1283 1 Z
+bit 1283 C 1 *
+bit 1282 I 1 IO_AM13
+bit 1281 O 1 IO_AM13 1280 1 Z
+bit 1280 C 1 *
+bit 1279 I 1 IO_AL13
+bit 1278 O 1 IO_AL13 1277 1 Z
+bit 1277 C 1 *
+bit 1276 I 1 IO_AH13
+bit 1275 O 1 IO_AH13 1274 1 Z
+bit 1274 C 1 *
+bit 1273 I 1 IO_AG13
+bit 1272 O 1 IO_AG13 1271 1 Z
+bit 1271 C 1 *
+bit 1270 I 1 IO_AD14
+bit 1269 O 1 IO_AD14 1268 1 Z
+bit 1268 C 1 *
+bit 1267 I 1 IO_AE13
+bit 1266 O 1 IO_AE13 1265 1 Z
+bit 1265 C 1 *
+bit 1264 I 1 IO_AD13
+bit 1263 O 1 IO_AD13 1262 1 Z
+bit 1262 C 1 *
+bit 1261 I 1 IO_AP12
+bit 1260 O 1 IO_AP12 1259 1 Z
+bit 1259 C 1 *
+bit 1258 I 1 IO_AN12
+bit 1257 O 1 IO_AN12 1256 1 Z
+bit 1256 C 1 *
+bit 1255 I 1 IO_AM12
+bit 1254 O 1 IO_AM12 1253 1 Z
+bit 1253 C 1 *
+bit 1252 I 1 IO_AL12
+bit 1251 O 1 IO_AL12 1250 1 Z
+bit 1250 C 1 *
+bit 1249 I 1 IO_AK12
+bit 1248 O 1 IO_AK12 1247 1 Z
+bit 1247 C 1 *
+bit 1246 I 1 IO_AJ12
+bit 1245 O 1 IO_AJ12 1244 1 Z
+bit 1244 C 1 *
+bit 1243 I 1 IO_AH12
+bit 1242 O 1 IO_AH12 1241 1 Z
+bit 1241 C 1 *
+bit 1240 I 1 IO_AG12
+bit 1239 O 1 IO_AG12 1238 1 Z
+bit 1238 C 1 *
+bit 1237 I 1 IO_AF12
+bit 1236 O 1 IO_AF12 1235 1 Z
+bit 1235 C 1 *
+bit 1234 I 1 IO_AE12
+bit 1233 O 1 IO_AE12 1232 1 Z
+bit 1232 C 1 *
+bit 1231 I 1 IO_AP11
+bit 1230 O 1 IO_AP11 1229 1 Z
+bit 1229 C 1 *
+bit 1228 I 1 IO_AN11
+bit 1227 O 1 IO_AN11 1226 1 Z
+bit 1226 C 1 *
+bit 1225 I 1 IO_AD11
+bit 1224 O 1 IO_AD11 1223 1 Z
+bit 1223 C 1 *
+bit 1222 I 1 IO_AP10
+bit 1221 O 1 IO_AP10 1220 1 Z
+bit 1220 C 1 *
+bit 1219 I 1 IO_AN10
+bit 1218 O 1 IO_AN10 1217 1 Z
+bit 1217 C 1 *
+bit 1216 I 1 IO_AM10
+bit 1215 O 1 IO_AM10 1214 1 Z
+bit 1214 C 1 *
+bit 1213 I 1 IO_AL10
+bit 1212 O 1 IO_AL10 1211 1 Z
+bit 1211 C 1 *
+bit 1210 I 1 IO_AK10
+bit 1209 O 1 IO_AK10 1208 1 Z
+bit 1208 C 1 *
+bit 1207 I 1 IO_AJ10
+bit 1206 O 1 IO_AJ10 1205 1 Z
+bit 1205 C 1 *
+bit 1204 I 1 IO_AH10
+bit 1203 O 1 IO_AH10 1202 1 Z
+bit 1202 C 1 *
+bit 1201 I 1 IO_AG10
+bit 1200 O 1 IO_AG10 1199 1 Z
+bit 1199 C 1 *
+bit 1198 I 1 IO_AF10
+bit 1197 O 1 IO_AF10 1196 1 Z
+bit 1196 C 1 *
+bit 1195 I 1 IO_AN9
+bit 1194 O 1 IO_AN9 1193 1 Z
+bit 1193 C 1 *
+bit 1192 I 1 IO_AM9
+bit 1191 O 1 IO_AM9 1190 1 Z
+bit 1190 C 1 *
+bit 1189 I 1 IO_AL9
+bit 1188 O 1 IO_AL9 1187 1 Z
+bit 1187 C 1 *
+bit 1186 I 1 IO_AJ9
+bit 1185 O 1 IO_AJ9 1184 1 Z
+bit 1184 C 1 *
+bit 1183 I 1 IO_AH9
+bit 1182 O 1 IO_AH9 1181 1 Z
+bit 1181 C 1 *
+bit 1180 I 1 IO_AG9
+bit 1179 O 1 IO_AG9 1178 1 Z
+bit 1178 C 1 *
+bit 1177 I 1 IO_AP8
+bit 1176 O 1 IO_AP8 1175 1 Z
+bit 1175 C 1 *
+bit 1174 I 1 IO_AN8
+bit 1173 O 1 IO_AN8 1172 1 Z
+bit 1172 C 1 *
+bit 1171 I 1 IO_AL8
+bit 1170 O 1 IO_AL8 1169 1 Z
+bit 1169 C 1 *
+bit 1168 I 1 IO_AK8
+bit 1167 O 1 IO_AK8 1166 1 Z
+bit 1166 C 1 *
+bit 1165 I 1 IO_AJ8
+bit 1164 O 1 IO_AJ8 1163 1 Z
+bit 1163 C 1 *
+bit 1162 I 1 IO_AK7
+bit 1161 O 1 IO_AK7 1160 1 Z
+bit 1160 C 1 *
+bit 1159 I 1 IO_AJ7
+bit 1158 O 1 IO_AJ7 1157 1 Z
+bit 1157 C 1 *
+bit 1156 I 1 IO_AP6
+bit 1155 O 1 IO_AP6 1154 1 Z
+bit 1154 C 1 *
+bit 1153 I 1 IO_AN6
+bit 1152 O 1 IO_AN6 1151 1 Z
+bit 1151 C 1 *
+bit 1150 I 1 IO_AJ6
+bit 1149 O 1 IO_AJ6 1148 1 Z
+bit 1148 C 1 *
+bit 1147 I 1 IO_AM6
+bit 1146 O 1 IO_AM6 1145 1 Z
+bit 1145 C 1 *
+bit 1144 I 1 IO_AL6
+bit 1143 O 1 IO_AL6 1142 1 Z
+bit 1142 C 1 *
+bit 1141 I 1 IO_AN5
+bit 1140 O 1 IO_AN5 1139 1 Z
+bit 1139 C 1 *
+bit 1138 I 1 IO_AM5
+bit 1137 O 1 IO_AM5 1136 1 Z
+bit 1136 C 1 *
+bit 1135 I 1 IO_AL5
+bit 1134 O 1 IO_AL5 1133 1 Z
+bit 1133 C 1 *
+bit 1132 I 1 IO_AP4
+bit 1131 O 1 IO_AP4 1130 1 Z
+bit 1130 C 1 *
+bit 1129 I 1 IO_AN4
+bit 1128 O 1 IO_AN4 1127 1 Z
+bit 1127 C 1 *
+bit 1126 I 1 IO_AP3
+bit 1125 O 1 IO_AP3 1124 1 Z
+bit 1124 C 1 *
+bit 1123 I 1 IO_AN3
+bit 1122 O 1 IO_AN3 1121 1 Z
+bit 1121 C 1 *
+bit 1120 I 1 M2_AG8
+bit 1119 I 1 M0_AL4
+bit 1118 I 1 M1_AK4
+bit 1117 I 1 IO_AM2
+bit 1116 O 1 IO_AM2 1115 1 Z
+bit 1115 C 1 *
+bit 1114 I 1 IO_AM1
+bit 1113 O 1 IO_AM1 1112 1 Z
+bit 1112 C 1 *
+bit 1111 I 1 IO_AL2
+bit 1110 O 1 IO_AL2 1109 1 Z
+bit 1109 C 1 *
+bit 1108 I 1 IO_AL1
+bit 1107 O 1 IO_AL1 1106 1 Z
+bit 1106 C 1 *
+bit 1105 I 1 IO_AK3
+bit 1104 O 1 IO_AK3 1103 1 Z
+bit 1103 C 1 *
+bit 1102 I 1 IO_AK2
+bit 1101 O 1 IO_AK2 1100 1 Z
+bit 1100 C 1 *
+bit 1099 I 1 IO_AJ4
+bit 1098 O 1 IO_AJ4 1097 1 Z
+bit 1097 C 1 *
+bit 1096 I 1 IO_AJ3
+bit 1095 O 1 IO_AJ3 1094 1 Z
+bit 1094 C 1 *
+bit 1093 I 1 IO_AJ2
+bit 1092 O 1 IO_AJ2 1091 1 Z
+bit 1091 C 1 *
+bit 1090 I 1 IO_AJ1
+bit 1089 O 1 IO_AJ1 1088 1 Z
+bit 1088 C 1 *
+bit 1087 I 1 IO_AH6
+bit 1086 O 1 IO_AH6 1085 1 Z
+bit 1085 C 1 *
+bit 1084 I 1 IO_AH5
+bit 1083 O 1 IO_AH5 1082 1 Z
+bit 1082 C 1 *
+bit 1081 I 1 IO_AH2
+bit 1080 O 1 IO_AH2 1079 1 Z
+bit 1079 C 1 *
+bit 1078 O 1 *
+bit 1077 O 1 *
+bit 1076 O 1 *
+bit 1075 O 1 *
+bit 1074 O 1 *
+bit 1073 O 1 *
+bit 1072 I 1 IO_AH1
+bit 1071 O 1 IO_AH1 1070 1 Z
+bit 1070 C 1 *
+bit 1069 I 1 IO_AG6
+bit 1068 O 1 IO_AG6 1067 1 Z
+bit 1067 C 1 *
+bit 1066 I 1 IO_AG5
+bit 1065 O 1 IO_AG5 1064 1 Z
+bit 1064 C 1 *
+bit 1063 I 1 IO_AG2
+bit 1062 O 1 IO_AG2 1061 1 Z
+bit 1061 C 1 *
+bit 1060 I 1 IO_AG1
+bit 1059 O 1 IO_AG1 1058 1 Z
+bit 1058 C 1 *
+bit 1057 I 1 IO_AF7
+bit 1056 O 1 IO_AF7 1055 1 Z
+bit 1055 C 1 *
+bit 1054 I 1 IO_AF6
+bit 1053 O 1 IO_AF6 1052 1 Z
+bit 1052 C 1 *
+bit 1051 I 1 IO_AG4
+bit 1050 O 1 IO_AG4 1049 1 Z
+bit 1049 C 1 *
+bit 1048 I 1 IO_AF4
+bit 1047 O 1 IO_AF4 1046 1 Z
+bit 1046 C 1 *
+bit 1045 I 1 IO_AF3
+bit 1044 O 1 IO_AF3 1043 1 Z
+bit 1043 C 1 *
+bit 1042 I 1 IO_AF2
+bit 1041 O 1 IO_AF2 1040 1 Z
+bit 1040 C 1 *
+bit 1039 I 1 IO_AF8
+bit 1038 O 1 IO_AF8 1037 1 Z
+bit 1037 C 1 *
+bit 1036 I 1 IO_AE9
+bit 1035 O 1 IO_AE9 1034 1 Z
+bit 1034 C 1 *
+bit 1033 I 1 IO_AE8
+bit 1032 O 1 IO_AE8 1031 1 Z
+bit 1031 C 1 *
+bit 1030 I 1 IO_AE7
+bit 1029 O 1 IO_AE7 1028 1 Z
+bit 1028 C 1 *
+bit 1027 I 1 IO_AE6
+bit 1026 O 1 IO_AE6 1025 1 Z
+bit 1025 C 1 *
+bit 1024 I 1 IO_AE5
+bit 1023 O 1 IO_AE5 1022 1 Z
+bit 1022 C 1 *
+bit 1021 I 1 IO_AE4
+bit 1020 O 1 IO_AE4 1019 1 Z
+bit 1019 C 1 *
+bit 1018 I 1 IO_AE3
+bit 1017 O 1 IO_AE3 1016 1 Z
+bit 1016 C 1 *
+bit 1015 I 1 IO_AE2
+bit 1014 O 1 IO_AE2 1013 1 Z
+bit 1013 C 1 *
+bit 1012 I 1 IO_AE1
+bit 1011 O 1 IO_AE1 1010 1 Z
+bit 1010 C 1 *
+bit 1009 I 1 IO_AD10
+bit 1008 O 1 IO_AD10 1007 1 Z
+bit 1007 C 1 *
+bit 1006 I 1 IO_AD9
+bit 1005 O 1 IO_AD9 1004 1 Z
+bit 1004 C 1 *
+bit 1003 O 1 *
+bit 1002 O 1 *
+bit 1001 O 1 *
+bit 1000 O 1 *
+bit 999 O 1 *
+bit 998 O 1 *
+bit 997 I 1 IO_AD2
+bit 996 O 1 IO_AD2 995 1 Z
+bit 995 C 1 *
+bit 994 I 1 IO_AD1
+bit 993 O 1 IO_AD1 992 1 Z
+bit 992 C 1 *
+bit 991 I 1 IO_AC11
+bit 990 O 1 IO_AC11 989 1 Z
+bit 989 C 1 *
+bit 988 I 1 IO_AC10
+bit 987 O 1 IO_AC10 986 1 Z
+bit 986 C 1 *
+bit 985 I 1 IO_AC8
+bit 984 O 1 IO_AC8 983 1 Z
+bit 983 C 1 *
+bit 982 I 1 IO_AC7
+bit 981 O 1 IO_AC7 980 1 Z
+bit 980 C 1 *
+bit 979 I 1 IO_AC6
+bit 978 O 1 IO_AC6 977 1 Z
+bit 977 C 1 *
+bit 976 I 1 IO_AC5
+bit 975 O 1 IO_AC5 974 1 Z
+bit 974 C 1 *
+bit 973 I 1 IO_AC4
+bit 972 O 1 IO_AC4 971 1 Z
+bit 971 C 1 *
+bit 970 I 1 IO_AC3
+bit 969 O 1 IO_AC3 968 1 Z
+bit 968 C 1 *
+bit 967 I 1 IO_AC2
+bit 966 O 1 IO_AC2 965 1 Z
+bit 965 C 1 *
+bit 964 I 1 IO_AC1
+bit 963 O 1 IO_AC1 962 1 Z
+bit 962 C 1 *
+bit 961 I 1 IO_AC9
+bit 960 O 1 IO_AC9 959 1 Z
+bit 959 C 1 *
+bit 958 I 1 IO_AB10
+bit 957 O 1 IO_AB10 956 1 Z
+bit 956 C 1 *
+bit 955 I 1 IO_AB8
+bit 954 O 1 IO_AB8 953 1 Z
+bit 953 C 1 *
+bit 952 I 1 IO_AB7
+bit 951 O 1 IO_AB7 950 1 Z
+bit 950 C 1 *
+bit 949 I 1 IO_AB4
+bit 948 O 1 IO_AB4 947 1 Z
+bit 947 C 1 *
+bit 946 I 1 IO_AB3
+bit 945 O 1 IO_AB3 944 1 Z
+bit 944 C 1 *
+bit 943 I 1 IO_AB11
+bit 942 O 1 IO_AB11 941 1 Z
+bit 941 C 1 *
+bit 940 I 1 IO_AA11
+bit 939 O 1 IO_AA11 938 1 Z
+bit 938 C 1 *
+bit 937 O 1 *
+bit 936 O 1 *
+bit 935 O 1 *
+bit 934 O 1 *
+bit 933 O 1 *
+bit 932 O 1 *
+bit 931 I 1 IO_AA8
+bit 930 O 1 IO_AA8 929 1 Z
+bit 929 C 1 *
+bit 928 I 1 IO_AA7
+bit 927 O 1 IO_AA7 926 1 Z
+bit 926 C 1 *
+bit 925 I 1 IO_AA6
+bit 924 O 1 IO_AA6 923 1 Z
+bit 923 C 1 *
+bit 922 I 1 IO_AA5
+bit 921 O 1 IO_AA5 920 1 Z
+bit 920 C 1 *
+bit 919 I 1 IO_AA4
+bit 918 O 1 IO_AA4 917 1 Z
+bit 917 C 1 *
+bit 916 I 1 IO_AA3
+bit 915 O 1 IO_AA3 914 1 Z
+bit 914 C 1 *
+bit 913 I 1 IO_AA2
+bit 912 O 1 IO_AA2 911 1 Z
+bit 911 C 1 *
+bit 910 I 1 IO_AA1
+bit 909 O 1 IO_AA1 908 1 Z
+bit 908 C 1 *
+bit 907 I 1 IO_Y11
+bit 906 O 1 IO_Y11 905 1 Z
+bit 905 C 1 *
+bit 904 I 1 IO_Y10
+bit 903 O 1 IO_Y10 902 1 Z
+bit 902 C 1 *
+bit 901 I 1 IO_Y7
+bit 900 O 1 IO_Y7 899 1 Z
+bit 899 C 1 *
+bit 898 I 1 IO_Y6
+bit 897 O 1 IO_Y6 896 1 Z
+bit 896 C 1 *
+bit 895 I 1 IO_Y4
+bit 894 O 1 IO_Y4 893 1 Z
+bit 893 C 1 *
+bit 892 I 1 IO_Y3
+bit 891 O 1 IO_Y3 890 1 Z
+bit 890 C 1 *
+bit 889 I 1 IO_Y2
+bit 888 O 1 IO_Y2 887 1 Z
+bit 887 C 1 *
+bit 886 I 1 IO_Y1
+bit 885 O 1 IO_Y1 884 1 Z
+bit 884 C 1 *
+bit 883 I 1 IO_Y9
+bit 882 O 1 IO_Y9 881 1 Z
+bit 881 C 1 *
+bit 880 I 1 IO_W10
+bit 879 O 1 IO_W10 878 1 Z
+bit 878 C 1 *
+bit 877 I 1 IO_W7
+bit 876 O 1 IO_W7 875 1 Z
+bit 875 C 1 *
+bit 874 I 1 IO_W6
+bit 873 O 1 IO_W6 872 1 Z
+bit 872 C 1 *
+bit 871 I 1 IO_W3
+bit 870 O 1 IO_W3 869 1 Z
+bit 869 C 1 *
+bit 868 I 1 IO_W2
+bit 867 O 1 IO_W2 866 1 Z
+bit 866 C 1 *
+bit 865 I 1 IO_V10
+bit 864 O 1 IO_V10 863 1 Z
+bit 863 C 1 *
+bit 862 O 1 *
+bit 861 O 1 *
+bit 860 O 1 *
+bit 859 O 1 *
+bit 858 O 1 *
+bit 857 O 1 *
+bit 856 I 1 IO_V9
+bit 855 O 1 IO_V9 854 1 Z
+bit 854 C 1 *
+bit 853 I 1 IO_V8
+bit 852 O 1 IO_V8 851 1 Z
+bit 851 C 1 *
+bit 850 I 1 IO_V7
+bit 849 O 1 IO_V7 848 1 Z
+bit 848 C 1 *
+bit 847 I 1 IO_V6
+bit 846 O 1 IO_V6 845 1 Z
+bit 845 C 1 *
+bit 844 I 1 IO_V5
+bit 843 O 1 IO_V5 842 1 Z
+bit 842 C 1 *
+bit 841 I 1 IO_V4
+bit 840 O 1 IO_V4 839 1 Z
+bit 839 C 1 *
+bit 838 I 1 IO_V3
+bit 837 O 1 IO_V3 836 1 Z
+bit 836 C 1 *
+bit 835 I 1 IO_V2
+bit 834 O 1 IO_V2 833 1 Z
+bit 833 C 1 *
+bit 832 I 1 IO_V1
+bit 831 O 1 IO_V1 830 1 Z
+bit 830 C 1 *
+bit 829 I 1 IO_U1
+bit 828 O 1 IO_U1 827 1 Z
+bit 827 C 1 *
+bit 826 I 1 IO_U2
+bit 825 O 1 IO_U2 824 1 Z
+bit 824 C 1 *
+bit 823 I 1 IO_U3
+bit 822 O 1 IO_U3 821 1 Z
+bit 821 C 1 *
+bit 820 I 1 IO_U4
+bit 819 O 1 IO_U4 818 1 Z
+bit 818 C 1 *
+bit 817 I 1 IO_U5
+bit 816 O 1 IO_U5 815 1 Z
+bit 815 C 1 *
+bit 814 I 1 IO_U6
+bit 813 O 1 IO_U6 812 1 Z
+bit 812 C 1 *
+bit 811 I 1 IO_U7
+bit 810 O 1 IO_U7 809 1 Z
+bit 809 C 1 *
+bit 808 I 1 IO_U8
+bit 807 O 1 IO_U8 806 1 Z
+bit 806 C 1 *
+bit 805 I 1 IO_U9
+bit 804 O 1 IO_U9 803 1 Z
+bit 803 C 1 *
+bit 802 O 1 *
+bit 801 O 1 *
+bit 800 O 1 *
+bit 799 O 1 *
+bit 798 O 1 *
+bit 797 O 1 *
+bit 796 I 1 IO_U10
+bit 795 O 1 IO_U10 794 1 Z
+bit 794 C 1 *
+bit 793 I 1 IO_T2
+bit 792 O 1 IO_T2 791 1 Z
+bit 791 C 1 *
+bit 790 I 1 IO_T3
+bit 789 O 1 IO_T3 788 1 Z
+bit 788 C 1 *
+bit 787 I 1 IO_T6
+bit 786 O 1 IO_T6 785 1 Z
+bit 785 C 1 *
+bit 784 I 1 IO_T7
+bit 783 O 1 IO_T7 782 1 Z
+bit 782 C 1 *
+bit 781 I 1 IO_T10
+bit 780 O 1 IO_T10 779 1 Z
+bit 779 C 1 *
+bit 778 I 1 IO_R9
+bit 777 O 1 IO_R9 776 1 Z
+bit 776 C 1 *
+bit 775 I 1 IO_R1
+bit 774 O 1 IO_R1 773 1 Z
+bit 773 C 1 *
+bit 772 I 1 IO_R2
+bit 771 O 1 IO_R2 770 1 Z
+bit 770 C 1 *
+bit 769 I 1 IO_R3
+bit 768 O 1 IO_R3 767 1 Z
+bit 767 C 1 *
+bit 766 I 1 IO_R4
+bit 765 O 1 IO_R4 764 1 Z
+bit 764 C 1 *
+bit 763 I 1 IO_R6
+bit 762 O 1 IO_R6 761 1 Z
+bit 761 C 1 *
+bit 760 I 1 IO_R7
+bit 759 O 1 IO_R7 758 1 Z
+bit 758 C 1 *
+bit 757 I 1 IO_R10
+bit 756 O 1 IO_R10 755 1 Z
+bit 755 C 1 *
+bit 754 I 1 IO_R11
+bit 753 O 1 IO_R11 752 1 Z
+bit 752 C 1 *
+bit 751 I 1 IO_P1
+bit 750 O 1 IO_P1 749 1 Z
+bit 749 C 1 *
+bit 748 I 1 IO_P2
+bit 747 O 1 IO_P2 746 1 Z
+bit 746 C 1 *
+bit 745 I 1 IO_P3
+bit 744 O 1 IO_P3 743 1 Z
+bit 743 C 1 *
+bit 742 I 1 IO_P4
+bit 741 O 1 IO_P4 740 1 Z
+bit 740 C 1 *
+bit 739 I 1 IO_P5
+bit 738 O 1 IO_P5 737 1 Z
+bit 737 C 1 *
+bit 736 I 1 IO_P6
+bit 735 O 1 IO_P6 734 1 Z
+bit 734 C 1 *
+bit 733 I 1 IO_P7
+bit 732 O 1 IO_P7 731 1 Z
+bit 731 C 1 *
+bit 730 I 1 IO_P8
+bit 729 O 1 IO_P8 728 1 Z
+bit 728 C 1 *
+bit 727 O 1 *
+bit 726 O 1 *
+bit 725 O 1 *
+bit 724 O 1 *
+bit 723 O 1 *
+bit 722 O 1 *
+bit 721 I 1 IO_P11
+bit 720 O 1 IO_P11 719 1 Z
+bit 719 C 1 *
+bit 718 I 1 IO_N11
+bit 717 O 1 IO_N11 716 1 Z
+bit 716 C 1 *
+bit 715 I 1 IO_N3
+bit 714 O 1 IO_N3 713 1 Z
+bit 713 C 1 *
+bit 712 I 1 IO_N4
+bit 711 O 1 IO_N4 710 1 Z
+bit 710 C 1 *
+bit 709 I 1 IO_N7
+bit 708 O 1 IO_N7 707 1 Z
+bit 707 C 1 *
+bit 706 I 1 IO_N8
+bit 705 O 1 IO_N8 704 1 Z
+bit 704 C 1 *
+bit 703 I 1 IO_N10
+bit 702 O 1 IO_N10 701 1 Z
+bit 701 C 1 *
+bit 700 I 1 IO_M9
+bit 699 O 1 IO_M9 698 1 Z
+bit 698 C 1 *
+bit 697 I 1 IO_M1
+bit 696 O 1 IO_M1 695 1 Z
+bit 695 C 1 *
+bit 694 I 1 IO_M2
+bit 693 O 1 IO_M2 692 1 Z
+bit 692 C 1 *
+bit 691 I 1 IO_M3
+bit 690 O 1 IO_M3 689 1 Z
+bit 689 C 1 *
+bit 688 I 1 IO_M4
+bit 687 O 1 IO_M4 686 1 Z
+bit 686 C 1 *
+bit 685 I 1 IO_M5
+bit 684 O 1 IO_M5 683 1 Z
+bit 683 C 1 *
+bit 682 I 1 IO_M6
+bit 681 O 1 IO_M6 680 1 Z
+bit 680 C 1 *
+bit 679 I 1 IO_M7
+bit 678 O 1 IO_M7 677 1 Z
+bit 677 C 1 *
+bit 676 I 1 IO_M8
+bit 675 O 1 IO_M8 674 1 Z
+bit 674 C 1 *
+bit 673 I 1 IO_M10
+bit 672 O 1 IO_M10 671 1 Z
+bit 671 C 1 *
+bit 670 I 1 IO_M11
+bit 669 O 1 IO_M11 668 1 Z
+bit 668 C 1 *
+bit 667 I 1 IO_L1
+bit 666 O 1 IO_L1 665 1 Z
+bit 665 C 1 *
+bit 664 I 1 IO_L2
+bit 663 O 1 IO_L2 662 1 Z
+bit 662 C 1 *
+bit 661 O 1 *
+bit 660 O 1 *
+bit 659 O 1 *
+bit 658 O 1 *
+bit 657 O 1 *
+bit 656 O 1 *
+bit 655 I 1 IO_L9
+bit 654 O 1 IO_L9 653 1 Z
+bit 653 C 1 *
+bit 652 I 1 IO_L10
+bit 651 O 1 IO_L10 650 1 Z
+bit 650 C 1 *
+bit 649 I 1 IO_K1
+bit 648 O 1 IO_K1 647 1 Z
+bit 647 C 1 *
+bit 646 I 1 IO_K2
+bit 645 O 1 IO_K2 644 1 Z
+bit 644 C 1 *
+bit 643 I 1 IO_K3
+bit 642 O 1 IO_K3 641 1 Z
+bit 641 C 1 *
+bit 640 I 1 IO_K4
+bit 639 O 1 IO_K4 638 1 Z
+bit 638 C 1 *
+bit 637 I 1 IO_K5
+bit 636 O 1 IO_K5 635 1 Z
+bit 635 C 1 *
+bit 634 I 1 IO_K6
+bit 633 O 1 IO_K6 632 1 Z
+bit 632 C 1 *
+bit 631 I 1 IO_K7
+bit 630 O 1 IO_K7 629 1 Z
+bit 629 C 1 *
+bit 628 I 1 IO_K8
+bit 627 O 1 IO_K8 626 1 Z
+bit 626 C 1 *
+bit 625 I 1 IO_K9
+bit 624 O 1 IO_K9 623 1 Z
+bit 623 C 1 *
+bit 622 I 1 IO_J8
+bit 621 O 1 IO_J8 620 1 Z
+bit 620 C 1 *
+bit 619 I 1 IO_J2
+bit 618 O 1 IO_J2 617 1 Z
+bit 617 C 1 *
+bit 616 I 1 IO_J3
+bit 615 O 1 IO_J3 614 1 Z
+bit 614 C 1 *
+bit 613 I 1 IO_J4
+bit 612 O 1 IO_J4 611 1 Z
+bit 611 C 1 *
+bit 610 I 1 IO_H4
+bit 609 O 1 IO_H4 608 1 Z
+bit 608 C 1 *
+bit 607 I 1 IO_J6
+bit 606 O 1 IO_J6 605 1 Z
+bit 605 C 1 *
+bit 604 I 1 IO_J7
+bit 603 O 1 IO_J7 602 1 Z
+bit 602 C 1 *
+bit 601 I 1 IO_H1
+bit 600 O 1 IO_H1 599 1 Z
+bit 599 C 1 *
+bit 598 I 1 IO_H2
+bit 597 O 1 IO_H2 596 1 Z
+bit 596 C 1 *
+bit 595 I 1 IO_H5
+bit 594 O 1 IO_H5 593 1 Z
+bit 593 C 1 *
+bit 592 I 1 IO_H6
+bit 591 O 1 IO_H6 590 1 Z
+bit 590 C 1 *
+bit 589 I 1 IO_G1
+bit 588 O 1 IO_G1 587 1 Z
+bit 587 C 1 *
+bit 586 O 1 *
+bit 585 O 1 *
+bit 584 O 1 *
+bit 583 O 1 *
+bit 582 O 1 *
+bit 581 O 1 *
+bit 580 I 1 IO_G2
+bit 579 O 1 IO_G2 578 1 Z
+bit 578 C 1 *
+bit 577 I 1 IO_G5
+bit 576 O 1 IO_G5 575 1 Z
+bit 575 C 1 *
+bit 574 I 1 IO_G6
+bit 573 O 1 IO_G6 572 1 Z
+bit 572 C 1 *
+bit 571 I 1 IO_F1
+bit 570 O 1 IO_F1 569 1 Z
+bit 569 C 1 *
+bit 568 I 1 IO_F2
+bit 567 O 1 IO_F2 566 1 Z
+bit 566 C 1 *
+bit 565 I 1 IO_F3
+bit 564 O 1 IO_F3 563 1 Z
+bit 563 C 1 *
+bit 562 I 1 IO_F4
+bit 561 O 1 IO_F4 560 1 Z
+bit 560 C 1 *
+bit 559 I 1 IO_E2
+bit 558 O 1 IO_E2 557 1 Z
+bit 557 C 1 *
+bit 556 I 1 IO_E3
+bit 555 O 1 IO_E3 554 1 Z
+bit 554 C 1 *
+bit 553 I 1 IO_D1
+bit 552 O 1 IO_D1 551 1 Z
+bit 551 C 1 *
+bit 550 I 1 IO_D2
+bit 549 O 1 IO_D2 548 1 Z
+bit 548 C 1 *
+bit 547 I 1 IO_C1
+bit 546 O 1 IO_C1 545 1 Z
+bit 545 C 1 *
+bit 544 I 1 IO_C2
+bit 543 O 1 IO_C2 542 1 Z
+bit 542 C 1 *
+bit 541 O 1 *
+bit 540 I 1 HSWAP_EN_L11
+bit 539 I 1 IO_D5
+bit 538 O 1 IO_D5 537 1 Z
+bit 537 C 1 *
+bit 536 I 1 IO_B3
+bit 535 O 1 IO_B3 534 1 Z
+bit 534 C 1 *
+bit 533 I 1 IO_A3
+bit 532 O 1 IO_A3 531 1 Z
+bit 531 C 1 *
+bit 530 I 1 IO_B4
+bit 529 O 1 IO_B4 528 1 Z
+bit 528 C 1 *
+bit 527 I 1 IO_A4
+bit 526 O 1 IO_A4 525 1 Z
+bit 525 C 1 *
+bit 524 I 1 IO_F6
+bit 523 O 1 IO_F6 522 1 Z
+bit 522 C 1 *
+bit 521 I 1 IO_C5
+bit 520 O 1 IO_C5 519 1 Z
+bit 519 C 1 *
+bit 518 I 1 IO_B5
+bit 517 O 1 IO_B5 516 1 Z
+bit 516 C 1 *
+bit 515 I 1 IO_D6
+bit 514 O 1 IO_D6 513 1 Z
+bit 513 C 1 *
+bit 512 I 1 IO_C6
+bit 511 O 1 IO_C6 510 1 Z
+bit 510 C 1 *
+bit 509 I 1 IO_H8
+bit 508 O 1 IO_H8 507 1 Z
+bit 507 C 1 *
+bit 506 I 1 IO_B6
+bit 505 O 1 IO_B6 504 1 Z
+bit 504 C 1 *
+bit 503 I 1 IO_A6
+bit 502 O 1 IO_A6 501 1 Z
+bit 501 C 1 *
+bit 500 I 1 IO_F7
+bit 499 O 1 IO_F7 498 1 Z
+bit 498 C 1 *
+bit 497 I 1 IO_E7
+bit 496 O 1 IO_E7 495 1 Z
+bit 495 C 1 *
+bit 494 I 1 IO_F8
+bit 493 O 1 IO_F8 492 1 Z
+bit 492 C 1 *
+bit 491 I 1 IO_E8
+bit 490 O 1 IO_E8 489 1 Z
+bit 489 C 1 *
+bit 488 I 1 IO_D8
+bit 487 O 1 IO_D8 486 1 Z
+bit 486 C 1 *
+bit 485 I 1 IO_B8
+bit 484 O 1 IO_B8 483 1 Z
+bit 483 C 1 *
+bit 482 I 1 IO_A8
+bit 481 O 1 IO_A8 480 1 Z
+bit 480 C 1 *
+bit 479 I 1 IO_H9
+bit 478 O 1 IO_H9 477 1 Z
+bit 477 C 1 *
+bit 476 I 1 IO_G9
+bit 475 O 1 IO_G9 474 1 Z
+bit 474 C 1 *
+bit 473 I 1 IO_F9
+bit 472 O 1 IO_F9 471 1 Z
+bit 471 C 1 *
+bit 470 I 1 IO_D9
+bit 469 O 1 IO_D9 468 1 Z
+bit 468 C 1 *
+bit 467 I 1 IO_C9
+bit 466 O 1 IO_C9 465 1 Z
+bit 465 C 1 *
+bit 464 I 1 IO_B9
+bit 463 O 1 IO_B9 462 1 Z
+bit 462 C 1 *
+bit 461 I 1 IO_J10
+bit 460 O 1 IO_J10 459 1 Z
+bit 459 C 1 *
+bit 458 I 1 IO_H10
+bit 457 O 1 IO_H10 456 1 Z
+bit 456 C 1 *
+bit 455 I 1 IO_G10
+bit 454 O 1 IO_G10 453 1 Z
+bit 453 C 1 *
+bit 452 I 1 IO_F10
+bit 451 O 1 IO_F10 450 1 Z
+bit 450 C 1 *
+bit 449 I 1 IO_E10
+bit 448 O 1 IO_E10 447 1 Z
+bit 447 C 1 *
+bit 446 I 1 IO_D10
+bit 445 O 1 IO_D10 444 1 Z
+bit 444 C 1 *
+bit 443 I 1 IO_C10
+bit 442 O 1 IO_C10 441 1 Z
+bit 441 C 1 *
+bit 440 I 1 IO_B10
+bit 439 O 1 IO_B10 438 1 Z
+bit 438 C 1 *
+bit 437 I 1 IO_A10
+bit 436 O 1 IO_A10 435 1 Z
+bit 435 C 1 *
+bit 434 I 1 IO_J11
+bit 433 O 1 IO_J11 432 1 Z
+bit 432 C 1 *
+bit 431 I 1 IO_L12
+bit 430 O 1 IO_L12 429 1 Z
+bit 429 C 1 *
+bit 428 I 1 IO_K12
+bit 427 O 1 IO_K12 426 1 Z
+bit 426 C 1 *
+bit 425 I 1 IO_J12
+bit 424 O 1 IO_J12 423 1 Z
+bit 423 C 1 *
+bit 422 I 1 IO_H12
+bit 421 O 1 IO_H12 420 1 Z
+bit 420 C 1 *
+bit 419 I 1 IO_G12
+bit 418 O 1 IO_G12 417 1 Z
+bit 417 C 1 *
+bit 416 I 1 IO_F12
+bit 415 O 1 IO_F12 414 1 Z
+bit 414 C 1 *
+bit 413 I 1 IO_E12
+bit 412 O 1 IO_E12 411 1 Z
+bit 411 C 1 *
+bit 410 I 1 IO_D12
+bit 409 O 1 IO_D12 408 1 Z
+bit 408 C 1 *
+bit 407 I 1 IO_C12
+bit 406 O 1 IO_C12 405 1 Z
+bit 405 C 1 *
+bit 404 I 1 IO_L13
+bit 403 O 1 IO_L13 402 1 Z
+bit 402 C 1 *
+bit 401 I 1 IO_B12
+bit 400 O 1 IO_B12 399 1 Z
+bit 399 C 1 *
+bit 398 I 1 IO_A12
+bit 397 O 1 IO_A12 396 1 Z
+bit 396 C 1 *
+bit 395 I 1 IO_H13
+bit 394 O 1 IO_H13 393 1 Z
+bit 393 C 1 *
+bit 392 I 1 IO_G13
+bit 391 O 1 IO_G13 390 1 Z
+bit 390 C 1 *
+bit 389 I 1 IO_K13
+bit 388 O 1 IO_K13 387 1 Z
+bit 387 C 1 *
+bit 386 I 1 IO_D13
+bit 385 O 1 IO_D13 384 1 Z
+bit 384 C 1 *
+bit 383 I 1 IO_C13
+bit 382 O 1 IO_C13 381 1 Z
+bit 381 C 1 *
+bit 380 I 1 IO_L14
+bit 379 O 1 IO_L14 378 1 Z
+bit 378 C 1 *
+bit 377 I 1 IO_K14
+bit 376 O 1 IO_K14 375 1 Z
+bit 375 C 1 *
+bit 374 I 1 IO_J14
+bit 373 O 1 IO_J14 372 1 Z
+bit 372 C 1 *
+bit 371 I 1 IO_H14
+bit 370 O 1 IO_H14 369 1 Z
+bit 369 C 1 *
+bit 368 I 1 IO_G14
+bit 367 O 1 IO_G14 366 1 Z
+bit 366 C 1 *
+bit 365 I 1 IO_F14
+bit 364 O 1 IO_F14 363 1 Z
+bit 363 C 1 *
+bit 362 I 1 IO_E14
+bit 361 O 1 IO_E14 360 1 Z
+bit 360 C 1 *
+bit 359 I 1 IO_L15
+bit 358 O 1 IO_L15 357 1 Z
+bit 357 C 1 *
+bit 356 I 1 IO_D14
+bit 355 O 1 IO_D14 354 1 Z
+bit 354 C 1 *
+bit 353 I 1 IO_C14
+bit 352 O 1 IO_C14 351 1 Z
+bit 351 C 1 *
+bit 350 I 1 IO_B14
+bit 349 O 1 IO_B14 348 1 Z
+bit 348 C 1 *
+bit 347 I 1 IO_A14
+bit 346 O 1 IO_A14 345 1 Z
+bit 345 C 1 *
+bit 344 I 1 IO_L16
+bit 343 O 1 IO_L16 342 1 Z
+bit 342 C 1 *
+bit 341 I 1 IO_K15
+bit 340 O 1 IO_K15 339 1 Z
+bit 339 C 1 *
+bit 338 I 1 IO_J15
+bit 337 O 1 IO_J15 336 1 Z
+bit 336 C 1 *
+bit 335 I 1 IO_G15
+bit 334 O 1 IO_G15 333 1 Z
+bit 333 C 1 *
+bit 332 I 1 IO_F15
+bit 331 O 1 IO_F15 330 1 Z
+bit 330 C 1 *
+bit 329 I 1 IO_K16
+bit 328 O 1 IO_K16 327 1 Z
+bit 327 C 1 *
+bit 326 I 1 IO_D15
+bit 325 O 1 IO_D15 324 1 Z
+bit 324 C 1 *
+bit 323 I 1 IO_C15
+bit 322 O 1 IO_C15 321 1 Z
+bit 321 C 1 *
+bit 320 I 1 IO_B15
+bit 319 O 1 IO_B15 318 1 Z
+bit 318 C 1 *
+bit 317 I 1 IO_A15
+bit 316 O 1 IO_A15 315 1 Z
+bit 315 C 1 *
+bit 314 I 1 IO_L17
+bit 313 O 1 IO_L17 312 1 Z
+bit 312 C 1 *
+bit 311 I 1 IO_G16
+bit 310 O 1 IO_G16 309 1 Z
+bit 309 C 1 *
+bit 308 I 1 IO_F16
+bit 307 O 1 IO_F16 306 1 Z
+bit 306 C 1 *
+bit 305 I 1 IO_C16
+bit 304 O 1 IO_C16 303 1 Z
+bit 303 C 1 *
+bit 302 I 1 IO_B16
+bit 301 O 1 IO_B16 300 1 Z
+bit 300 C 1 *
+bit 299 I 1 IO_K17
+bit 298 O 1 IO_K17 297 1 Z
+bit 297 C 1 *
+bit 296 I 1 IO_J17
+bit 295 O 1 IO_J17 294 1 Z
+bit 294 C 1 *
+bit 293 I 1 IO_H17
+bit 292 O 1 IO_H17 291 1 Z
+bit 291 C 1 *
+bit 290 I 1 IO_G17
+bit 289 O 1 IO_G17 288 1 Z
+bit 288 C 1 *
+bit 287 I 1 IO_F17
+bit 286 O 1 IO_F17 285 1 Z
+bit 285 C 1 *
+bit 284 I 1 IO_E17
+bit 283 O 1 IO_E17 282 1 Z
+bit 282 C 1 *
+bit 281 I 1 IO_D17
+bit 280 O 1 IO_D17 279 1 Z
+bit 279 C 1 *
+bit 278 I 1 IO_C17
+bit 277 O 1 IO_C17 276 1 Z
+bit 276 C 1 *
+bit 275 I 1 IO_B17
+bit 274 O 1 IO_B17 273 1 Z
+bit 273 C 1 *
+bit 272 I 1 IO_A17
+bit 271 O 1 IO_A17 270 1 Z
+bit 270 C 1 *
+bit 269 I 1 IO_A18
+bit 268 O 1 IO_A18 267 1 Z
+bit 267 C 1 *
+bit 266 I 1 IO_B18
+bit 265 O 1 IO_B18 264 1 Z
+bit 264 C 1 *
+bit 263 I 1 IO_C18
+bit 262 O 1 IO_C18 261 1 Z
+bit 261 C 1 *
+bit 260 I 1 IO_D18
+bit 259 O 1 IO_D18 258 1 Z
+bit 258 C 1 *
+bit 257 I 1 IO_E18
+bit 256 O 1 IO_E18 255 1 Z
+bit 255 C 1 *
+bit 254 I 1 IO_F18
+bit 253 O 1 IO_F18 252 1 Z
+bit 252 C 1 *
+bit 251 I 1 IO_G18
+bit 250 O 1 IO_G18 249 1 Z
+bit 249 C 1 *
+bit 248 I 1 IO_H18
+bit 247 O 1 IO_H18 246 1 Z
+bit 246 C 1 *
+bit 245 I 1 IO_J18
+bit 244 O 1 IO_J18 243 1 Z
+bit 243 C 1 *
+bit 242 I 1 IO_K18
+bit 241 O 1 IO_K18 240 1 Z
+bit 240 C 1 *
+bit 239 I 1 IO_L18
+bit 238 O 1 IO_L18 237 1 Z
+bit 237 C 1 *
+bit 236 I 1 IO_B19
+bit 235 O 1 IO_B19 234 1 Z
+bit 234 C 1 *
+bit 233 I 1 IO_C19
+bit 232 O 1 IO_C19 231 1 Z
+bit 231 C 1 *
+bit 230 I 1 IO_F19
+bit 229 O 1 IO_F19 228 1 Z
+bit 228 C 1 *
+bit 227 I 1 IO_G19
+bit 226 O 1 IO_G19 225 1 Z
+bit 225 C 1 *
+bit 224 I 1 IO_K19
+bit 223 O 1 IO_K19 222 1 Z
+bit 222 C 1 *
+bit 221 I 1 IO_A20
+bit 220 O 1 IO_A20 219 1 Z
+bit 219 C 1 *
+bit 218 I 1 IO_B20
+bit 217 O 1 IO_B20 216 1 Z
+bit 216 C 1 *
+bit 215 I 1 IO_C20
+bit 214 O 1 IO_C20 213 1 Z
+bit 213 C 1 *
+bit 212 I 1 IO_D20
+bit 211 O 1 IO_D20 210 1 Z
+bit 210 C 1 *
+bit 209 I 1 IO_L19
+bit 208 O 1 IO_L19 207 1 Z
+bit 207 C 1 *
+bit 206 I 1 IO_F20
+bit 205 O 1 IO_F20 204 1 Z
+bit 204 C 1 *
+bit 203 I 1 IO_G20
+bit 202 O 1 IO_G20 201 1 Z
+bit 201 C 1 *
+bit 200 I 1 IO_J20
+bit 199 O 1 IO_J20 198 1 Z
+bit 198 C 1 *
+bit 197 I 1 IO_K20
+bit 196 O 1 IO_K20 195 1 Z
+bit 195 C 1 *
+bit 194 I 1 IO_L20
+bit 193 O 1 IO_L20 192 1 Z
+bit 192 C 1 *
+bit 191 I 1 IO_A21
+bit 190 O 1 IO_A21 189 1 Z
+bit 189 C 1 *
+bit 188 I 1 IO_B21
+bit 187 O 1 IO_B21 186 1 Z
+bit 186 C 1 *
+bit 185 I 1 IO_C21
+bit 184 O 1 IO_C21 183 1 Z
+bit 183 C 1 *
+bit 182 I 1 IO_D21
+bit 181 O 1 IO_D21 180 1 Z
+bit 180 C 1 *
+bit 179 I 1 IO_E21
+bit 178 O 1 IO_E21 177 1 Z
+bit 177 C 1 *
+bit 176 I 1 IO_F21
+bit 175 O 1 IO_F21 174 1 Z
+bit 174 C 1 *
+bit 173 I 1 IO_G21
+bit 172 O 1 IO_G21 171 1 Z
+bit 171 C 1 *
+bit 170 I 1 IO_H21
+bit 169 O 1 IO_H21 168 1 Z
+bit 168 C 1 *
+bit 167 I 1 IO_J21
+bit 166 O 1 IO_J21 165 1 Z
+bit 165 C 1 *
+bit 164 I 1 IO_K21
+bit 163 O 1 IO_K21 162 1 Z
+bit 162 C 1 *
+bit 161 I 1 IO_C22
+bit 160 O 1 IO_C22 159 1 Z
+bit 159 C 1 *
+bit 158 I 1 IO_D22
+bit 157 O 1 IO_D22 156 1 Z
+bit 156 C 1 *
+bit 155 I 1 IO_G22
+bit 154 O 1 IO_G22 153 1 Z
+bit 153 C 1 *
+bit 152 I 1 IO_H22
+bit 151 O 1 IO_H22 150 1 Z
+bit 150 C 1 *
+bit 149 I 1 IO_L21
+bit 148 O 1 IO_L21 147 1 Z
+bit 147 C 1 *
+bit 146 I 1 IO_K22
+bit 145 O 1 IO_K22 144 1 Z
+bit 144 C 1 *
+bit 143 I 1 IO_L22
+bit 142 O 1 IO_L22 141 1 Z
+bit 141 C 1 *
+bit 140 I 1 IO_A23
+bit 139 O 1 IO_A23 138 1 Z
+bit 138 C 1 *
+bit 137 I 1 IO_B23
+bit 136 O 1 IO_B23 135 1 Z
+bit 135 C 1 *
+bit 134 I 1 IO_C23
+bit 133 O 1 IO_C23 132 1 Z
+bit 132 C 1 *
+bit 131 I 1 IO_D23
+bit 130 O 1 IO_D23 129 1 Z
+bit 129 C 1 *
+bit 128 I 1 IO_E23
+bit 127 O 1 IO_E23 126 1 Z
+bit 126 C 1 *
+bit 125 I 1 IO_F23
+bit 124 O 1 IO_F23 123 1 Z
+bit 123 C 1 *
+bit 122 I 1 IO_G23
+bit 121 O 1 IO_G23 120 1 Z
+bit 120 C 1 *
+bit 119 I 1 IO_H23
+bit 118 O 1 IO_H23 117 1 Z
+bit 117 C 1 *
+bit 116 I 1 IO_J23
+bit 115 O 1 IO_J23 114 1 Z
+bit 114 C 1 *
+bit 113 I 1 IO_K23
+bit 112 O 1 IO_K23 111 1 Z
+bit 111 C 1 *
+bit 110 I 1 IO_A24
+bit 109 O 1 IO_A24 108 1 Z
+bit 108 C 1 *
+bit 107 I 1 IO_B24
+bit 106 O 1 IO_B24 105 1 Z
+bit 105 C 1 *
+bit 104 I 1 IO_L24
+bit 103 O 1 IO_L24 102 1 Z
+bit 102 C 1 *
+bit 101 I 1 IO_A25
+bit 100 O 1 IO_A25 99 1 Z
+bit 99 C 1 *
+bit 98 I 1 IO_B25
+bit 97 O 1 IO_B25 96 1 Z
+bit 96 C 1 *
+bit 95 I 1 IO_C25
+bit 94 O 1 IO_C25 93 1 Z
+bit 93 C 1 *
+bit 92 I 1 IO_D25
+bit 91 O 1 IO_D25 90 1 Z
+bit 90 C 1 *
+bit 89 I 1 IO_E25
+bit 88 O 1 IO_E25 87 1 Z
+bit 87 C 1 *
+bit 86 I 1 IO_F25
+bit 85 O 1 IO_F25 84 1 Z
+bit 84 C 1 *
+bit 83 I 1 IO_G25
+bit 82 O 1 IO_G25 81 1 Z
+bit 81 C 1 *
+bit 80 I 1 IO_H25
+bit 79 O 1 IO_H25 78 1 Z
+bit 78 C 1 *
+bit 77 I 1 IO_J25
+bit 76 O 1 IO_J25 75 1 Z
+bit 75 C 1 *
+bit 74 I 1 IO_B26
+bit 73 O 1 IO_B26 72 1 Z
+bit 72 C 1 *
+bit 71 I 1 IO_C26
+bit 70 O 1 IO_C26 69 1 Z
+bit 69 C 1 *
+bit 68 I 1 IO_D26
+bit 67 O 1 IO_D26 66 1 Z
+bit 66 C 1 *
+bit 65 I 1 IO_F26
+bit 64 O 1 IO_F26 63 1 Z
+bit 63 C 1 *
+bit 62 I 1 IO_G26
+bit 61 O 1 IO_G26 60 1 Z
+bit 60 C 1 *
+bit 59 I 1 IO_H26
+bit 58 O 1 IO_H26 57 1 Z
+bit 57 C 1 *
+bit 56 I 1 IO_A27
+bit 55 O 1 IO_A27 54 1 Z
+bit 54 C 1 *
+bit 53 I 1 IO_B27
+bit 52 O 1 IO_B27 51 1 Z
+bit 51 C 1 *
+bit 50 I 1 IO_D27
+bit 49 O 1 IO_D27 48 1 Z
+bit 48 C 1 *
+bit 47 I 1 IO_E27
+bit 46 O 1 IO_E27 45 1 Z
+bit 45 C 1 *
+bit 44 I 1 IO_F27
+bit 43 O 1 IO_F27 42 1 Z
+bit 42 C 1 *
+bit 41 I 1 IO_E28
+bit 40 O 1 IO_E28 39 1 Z
+bit 39 C 1 *
+bit 38 I 1 IO_F28
+bit 37 O 1 IO_F28 36 1 Z
+bit 36 C 1 *
+bit 35 I 1 IO_A29
+bit 34 O 1 IO_A29 33 1 Z
+bit 33 C 1 *
+bit 32 I 1 IO_B29
+bit 31 O 1 IO_B29 30 1 Z
+bit 30 C 1 *
+bit 29 I 1 IO_F29
+bit 28 O 1 IO_F29 27 1 Z
+bit 27 C 1 *
+bit 26 I 1 IO_C29
+bit 25 O 1 IO_C29 24 1 Z
+bit 24 C 1 *
+bit 23 I 1 IO_D29
+bit 22 O 1 IO_D29 21 1 Z
+bit 21 C 1 *
+bit 20 I 1 IO_B30
+bit 19 O 1 IO_B30 18 1 Z
+bit 18 C 1 *
+bit 17 I 1 IO_C30
+bit 16 O 1 IO_C30 15 1 Z
+bit 15 C 1 *
+bit 14 I 1 IO_D30
+bit 13 O 1 IO_D30 12 1 Z
+bit 12 C 1 *
+bit 11 I 1 IO_A31
+bit 10 O 1 IO_A31 9 1 Z
+bit 9 C 1 *
+bit 8 I 1 IO_B31
+bit 7 O 1 IO_B31 6 1 Z
+bit 6 C 1 *
+bit 5 I 1 IO_A32
+bit 4 O 1 IO_A32 3 1 Z
+bit 3 C 1 *
+bit 2 I 1 IO_B32
+bit 1 O 1 IO_B32 0 1 Z
+bit 0 C 1 *
--- /dev/null
+signal GND1
+signal GND2
+signal GND3
+signal GND4
+signal GND5
+signal GND6
+signal GND7
+signal GND8
+signal GND9
+signal GND10
+signal GND11
+signal GND12
+signal GND13
+signal GND14
+signal GND15
+signal GND16
+signal GND17
+signal GND18
+signal GND19
+signal GND20
+signal GND21
+signal GND22
+signal GND23
+signal GND24
+signal GND25
+signal GND26
+signal GND27
+signal GND28
+signal GND29
+signal GND30
+signal GND31
+signal GND32
+signal GND33
+signal GND34
+signal GND35
+signal GND36
+signal GND37
+signal GND38
+signal GND39
+signal GND40
+signal GND41
+signal GND42
+signal GND43
+signal GND44
+signal GND45
+signal GND46
+signal GND47
+signal GND48
+signal GND49
+signal GND50
+signal GND51
+signal GND52
+signal GND53
+signal GND54
+signal GND55
+signal GND56
+signal GND57
+signal GND58
+signal GND59
+signal GND60
+signal GND61
+signal GND62
+signal GND63
+signal GND64
+signal GND65
+signal GND66
+signal GND67
+signal GND68
+signal GND69
+signal GND70
+signal GND71
+signal GND72
+signal GND73
+signal GND74
+signal GND75
+signal GND76
+signal GND77
+signal GND78
+signal GND79
+signal GND80
+signal GND81
+signal GND82
+signal GND83
+signal GND84
+signal GND85
+signal GND86
+signal GND87
+signal GND88
+signal GND89
+signal GND90
+signal GND91
+signal GND92
+signal GND93
+signal GND94
+signal GND95
+signal GND96
+signal GND97
+signal GND98
+signal GND99
+signal GND100
+signal GND101
+signal GND102
+signal GND103
+signal GND104
+signal GND105
+signal GND106
+signal GND107
+signal GND108
+signal GND109
+signal GND110
+signal GND111
+signal GND112
+signal GND113
+signal GND114
+signal GND115
+signal GND116
+signal GND117
+signal GND118
+signal GND119
+signal GND120
+signal CCLK_AH28
+signal DONE_AJ28
+signal HSWAP_EN_A3
+signal M0_AJ3
+signal M1_AH3
+signal M2_AK3
+signal PROG_B
+signal TCK
+signal TDI
+signal TDO
+signal TMS
+signal VCCAUX1
+signal VCCAUX2
+signal VCCAUX3
+signal VCCAUX4
+signal VCCAUX5
+signal VCCAUX6
+signal VCCAUX7
+signal VCCAUX8
+signal VCCAUX9
+signal VCCAUX10
+signal VCCAUX11
+signal VCCAUX12
+signal VCCAUX13
+signal VCCAUX14
+signal VCCAUX15
+signal VCCAUX16
+signal VCCAUX17
+signal VCCAUX18
+signal VCCAUX19
+signal VCCAUX20
+signal VCCAUX21
+signal VCCAUX22
+signal VCCAUX23
+signal VCCAUX24
+signal VCCINT1
+signal VCCINT2
+signal VCCINT3
+signal VCCINT4
+signal VCCINT5
+signal VCCINT6
+signal VCCINT7
+signal VCCINT8
+signal VCCINT9
+signal VCCINT10
+signal VCCINT11
+signal VCCINT12
+signal VCCINT13
+signal VCCINT14
+signal VCCINT15
+signal VCCINT16
+signal VCCINT17
+signal VCCINT18
+signal VCCINT19
+signal VCCINT20
+signal VCCINT21
+signal VCCINT22
+signal VCCINT23
+signal VCCINT24
+signal VCCINT25
+signal VCCINT26
+signal VCCINT27
+signal VCCINT28
+signal VCCINT29
+signal VCCINT30
+signal VCCINT31
+signal VCCINT32
+signal VCCO01
+signal VCCO02
+signal VCCO03
+signal VCCO04
+signal VCCO05
+signal VCCO06
+signal VCCO07
+signal VCCO08
+signal VCCO09
+signal VCCO010
+signal VCCO11
+signal VCCO12
+signal VCCO13
+signal VCCO14
+signal VCCO15
+signal VCCO16
+signal VCCO17
+signal VCCO18
+signal VCCO19
+signal VCCO110
+signal VCCO21
+signal VCCO22
+signal VCCO23
+signal VCCO24
+signal VCCO25
+signal VCCO26
+signal VCCO27
+signal VCCO28
+signal VCCO29
+signal VCCO210
+signal VCCO31
+signal VCCO32
+signal VCCO33
+signal VCCO34
+signal VCCO35
+signal VCCO36
+signal VCCO37
+signal VCCO38
+signal VCCO39
+signal VCCO310
+signal VCCO41
+signal VCCO42
+signal VCCO43
+signal VCCO44
+signal VCCO45
+signal VCCO46
+signal VCCO47
+signal VCCO48
+signal VCCO49
+signal VCCO410
+signal VCCO51
+signal VCCO52
+signal VCCO53
+signal VCCO54
+signal VCCO55
+signal VCCO56
+signal VCCO57
+signal VCCO58
+signal VCCO59
+signal VCCO510
+signal VCCO61
+signal VCCO62
+signal VCCO63
+signal VCCO64
+signal VCCO65
+signal VCCO66
+signal VCCO67
+signal VCCO68
+signal VCCO69
+signal VCCO610
+signal VCCO71
+signal VCCO72
+signal VCCO73
+signal VCCO74
+signal VCCO75
+signal VCCO76
+signal VCCO77
+signal VCCO78
+signal VCCO79
+signal VCCO710
+signal IO_A4
+signal IO_A5
+signal IO_A7
+signal IO_A8
+signal IO_A9
+signal IO_A11
+signal IO_A12
+signal IO_A13
+signal IO_A15
+signal IO_A16
+signal IO_A18
+signal IO_A19
+signal IO_A20
+signal IO_A22
+signal IO_A23
+signal IO_A24
+signal IO_A26
+signal IO_A27
+signal IO_B4
+signal IO_B5
+signal IO_B6
+signal IO_B7
+signal IO_B8
+signal IO_B9
+signal IO_B10
+signal IO_B11
+signal IO_B12
+signal IO_B13
+signal IO_B14
+signal IO_B15
+signal IO_B16
+signal IO_B17
+signal IO_B18
+signal IO_B19
+signal IO_B20
+signal IO_B21
+signal IO_B22
+signal IO_B23
+signal IO_B24
+signal IO_B25
+signal IO_B26
+signal IO_B27
+signal IO_C1
+signal IO_C2
+signal IO_C4
+signal IO_C6
+signal IO_C7
+signal IO_C8
+signal IO_C10
+signal IO_C11
+signal IO_C12
+signal IO_C14
+signal IO_C15
+signal IO_C16
+signal IO_C17
+signal IO_C19
+signal IO_C20
+signal IO_C21
+signal IO_C23
+signal IO_C24
+signal IO_C25
+signal IO_C27
+signal IO_C29
+signal IO_C30
+signal IO_D1
+signal IO_D2
+signal IO_D3
+signal IO_D4
+signal IO_D5
+signal IO_D7
+signal IO_D8
+signal IO_D9
+signal IO_D11
+signal IO_D12
+signal IO_D13
+signal IO_D15
+signal IO_D16
+signal IO_D18
+signal IO_D19
+signal IO_D20
+signal IO_D22
+signal IO_D23
+signal IO_D24
+signal IO_D26
+signal IO_D27
+signal IO_D28
+signal IO_D29
+signal IO_D30
+signal IO_E1
+signal IO_E2
+signal IO_E4
+signal IO_E6
+signal IO_E8
+signal IO_E9
+signal IO_E11
+signal IO_E12
+signal IO_E13
+signal IO_E15
+signal IO_E16
+signal IO_E18
+signal IO_E19
+signal IO_E20
+signal IO_E22
+signal IO_E23
+signal IO_E25
+signal IO_E27
+signal IO_E29
+signal IO_E30
+signal IO_F2
+signal IO_F3
+signal IO_F5
+signal IO_F6
+signal IO_F7
+signal IO_F8
+signal IO_F9
+signal IO_F10
+signal IO_F11
+signal IO_F12
+signal IO_F13
+signal IO_F14
+signal IO_F15
+signal IO_F16
+signal IO_F17
+signal IO_F18
+signal IO_F19
+signal IO_F20
+signal IO_F21
+signal IO_F22
+signal IO_F23
+signal IO_F24
+signal IO_F25
+signal IO_F26
+signal IO_F28
+signal IO_F29
+signal IO_G1
+signal IO_G2
+signal IO_G3
+signal IO_G4
+signal IO_G6
+signal IO_G7
+signal IO_G8
+signal IO_G10
+signal IO_G11
+signal IO_G12
+signal IO_G14
+signal IO_G15
+signal IO_G16
+signal IO_G17
+signal IO_G19
+signal IO_G20
+signal IO_G21
+signal IO_G23
+signal IO_G24
+signal IO_G25
+signal IO_G27
+signal IO_G28
+signal IO_G29
+signal IO_G30
+signal IO_H1
+signal IO_H2
+signal IO_H3
+signal IO_H4
+signal IO_H5
+signal IO_H6
+signal IO_H7
+signal IO_H8
+signal IO_H9
+signal IO_H11
+signal IO_H12
+signal IO_H13
+signal IO_H15
+signal IO_H16
+signal IO_H18
+signal IO_H19
+signal IO_H20
+signal IO_H22
+signal IO_H23
+signal IO_H24
+signal IO_H25
+signal IO_H26
+signal IO_H27
+signal IO_H28
+signal IO_H29
+signal IO_H30
+signal IO_J1
+signal IO_J2
+signal IO_J4
+signal IO_J5
+signal IO_J6
+signal IO_J8
+signal IO_J9
+signal IO_J10
+signal IO_J12
+signal IO_J13
+signal IO_J14
+signal IO_J15
+signal IO_J16
+signal IO_J17
+signal IO_J18
+signal IO_J19
+signal IO_J21
+signal IO_J22
+signal IO_J23
+signal IO_J25
+signal IO_J26
+signal IO_J27
+signal IO_J29
+signal IO_J30
+signal IO_K2
+signal IO_K3
+signal IO_K6
+signal IO_K7
+signal IO_K9
+signal IO_K10
+signal IO_K11
+signal IO_K12
+signal IO_K13
+signal IO_K14
+signal IO_K15
+signal IO_K16
+signal IO_K17
+signal IO_K18
+signal IO_K19
+signal IO_K20
+signal IO_K21
+signal IO_K22
+signal IO_K24
+signal IO_K25
+signal IO_K28
+signal IO_K29
+signal IO_L1
+signal IO_L2
+signal IO_L3
+signal IO_L4
+signal IO_L5
+signal IO_L6
+signal IO_L7
+signal IO_L8
+signal IO_L10
+signal IO_L21
+signal IO_L23
+signal IO_L24
+signal IO_L25
+signal IO_L26
+signal IO_L27
+signal IO_L28
+signal IO_L29
+signal IO_L30
+signal IO_M1
+signal IO_M2
+signal IO_M3
+signal IO_M4
+signal IO_M5
+signal IO_M6
+signal IO_M7
+signal IO_M8
+signal IO_M9
+signal IO_M10
+signal IO_M21
+signal IO_M22
+signal IO_M23
+signal IO_M24
+signal IO_M25
+signal IO_M26
+signal IO_M27
+signal IO_M28
+signal IO_M29
+signal IO_M30
+signal IO_N1
+signal IO_N2
+signal IO_N4
+signal IO_N5
+signal IO_N6
+signal IO_N8
+signal IO_N9
+signal IO_N10
+signal IO_N21
+signal IO_N22
+signal IO_N23
+signal IO_N25
+signal IO_N26
+signal IO_N27
+signal IO_N29
+signal IO_N30
+signal IO_P2
+signal IO_P3
+signal IO_P6
+signal IO_P7
+signal IO_P9
+signal IO_P10
+signal IO_P21
+signal IO_P22
+signal IO_P24
+signal IO_P25
+signal IO_P28
+signal IO_P29
+signal IO_R1
+signal IO_R2
+signal IO_R3
+signal IO_R4
+signal IO_R5
+signal IO_R6
+signal IO_R7
+signal IO_R8
+signal IO_R9
+signal IO_R10
+signal IO_R21
+signal IO_R22
+signal IO_R23
+signal IO_R24
+signal IO_R25
+signal IO_R26
+signal IO_R27
+signal IO_R28
+signal IO_R29
+signal IO_R30
+signal IO_T1
+signal IO_T2
+signal IO_T3
+signal IO_T4
+signal IO_T5
+signal IO_T6
+signal IO_T7
+signal IO_T8
+signal IO_T9
+signal IO_T10
+signal IO_T21
+signal IO_T22
+signal IO_T23
+signal IO_T24
+signal IO_T25
+signal IO_T26
+signal IO_T27
+signal IO_T28
+signal IO_T29
+signal IO_T30
+signal IO_U2
+signal IO_U3
+signal IO_U6
+signal IO_U7
+signal IO_U9
+signal IO_U10
+signal IO_U21
+signal IO_U22
+signal IO_U24
+signal IO_U25
+signal IO_U28
+signal IO_U29
+signal IO_V1
+signal IO_V2
+signal IO_V4
+signal IO_V5
+signal IO_V6
+signal IO_V8
+signal IO_V9
+signal IO_V10
+signal IO_V21
+signal IO_V22
+signal IO_V23
+signal IO_V25
+signal IO_V26
+signal IO_V27
+signal IO_V29
+signal IO_V30
+signal IO_W1
+signal IO_W2
+signal IO_W3
+signal IO_W4
+signal IO_W5
+signal IO_W6
+signal IO_W7
+signal IO_W8
+signal IO_W9
+signal IO_W10
+signal IO_W21
+signal IO_W22
+signal IO_W23
+signal IO_W24
+signal IO_W25
+signal IO_W26
+signal IO_W27
+signal IO_W28
+signal IO_W29
+signal IO_W30
+signal IO_Y1
+signal IO_Y2
+signal IO_Y3
+signal IO_Y4
+signal IO_Y5
+signal IO_Y6
+signal IO_Y7
+signal IO_Y8
+signal IO_Y10
+signal IO_Y21
+signal IO_Y23
+signal IO_Y24
+signal IO_Y25
+signal IO_Y26
+signal IO_Y27
+signal IO_Y28
+signal IO_Y29
+signal IO_Y30
+signal IO_AA2
+signal IO_AA3
+signal IO_AA6
+signal IO_AA7
+signal IO_AA9
+signal IO_AA10
+signal IO_AA11
+signal IO_AA12
+signal IO_AA13
+signal IO_AA14
+signal IO_AA15
+signal IO_AA16
+signal IO_AA17
+signal IO_AA18
+signal IO_AA19
+signal IO_AA20
+signal IO_AA21
+signal IO_AA22
+signal IO_AA24
+signal IO_AA25
+signal IO_AA28
+signal IO_AA29
+signal IO_AB1
+signal IO_AB2
+signal IO_AB4
+signal IO_AB5
+signal IO_AB6
+signal IO_AB8
+signal IO_AB9
+signal IO_AB10
+signal IO_AB12
+signal IO_AB13
+signal IO_AB14
+signal IO_AB15
+signal IO_AB16
+signal IO_AB17
+signal IO_AB18
+signal IO_AB19
+signal IO_AB21
+signal IO_AB22
+signal IO_AB23
+signal IO_AB25
+signal IO_AB26
+signal IO_AB27
+signal IO_AB29
+signal IO_AB30
+signal IO_AC1
+signal IO_AC2
+signal IO_AC3
+signal IO_AC4
+signal IO_AC5
+signal IO_AC6
+signal IO_AC7
+signal IO_AC8
+signal IO_AC9
+signal IO_AC11
+signal IO_AC12
+signal IO_AC13
+signal IO_AC15
+signal IO_AC16
+signal IO_AC18
+signal IO_AC19
+signal IO_AC20
+signal IO_AC22
+signal IO_AC23
+signal IO_AC24
+signal IO_AC25
+signal IO_AC26
+signal IO_AC27
+signal IO_AC28
+signal IO_AC29
+signal IO_AC30
+signal IO_AD1
+signal IO_AD2
+signal IO_AD3
+signal IO_AD4
+signal IO_AD6
+signal IO_AD7
+signal IO_AD8
+signal IO_AD10
+signal IO_AD11
+signal IO_AD12
+signal IO_AD14
+signal IO_AD15
+signal IO_AD16
+signal IO_AD17
+signal IO_AD19
+signal IO_AD20
+signal IO_AD21
+signal IO_AD23
+signal IO_AD24
+signal IO_AD25
+signal IO_AD27
+signal IO_AD28
+signal IO_AD29
+signal IO_AD30
+signal IO_AE2
+signal IO_AE3
+signal IO_AE5
+signal IO_AE6
+signal IO_AE7
+signal IO_AE8
+signal IO_AE9
+signal IO_AE10
+signal IO_AE11
+signal IO_AE12
+signal IO_AE13
+signal IO_AE14
+signal IO_AE15
+signal IO_AE16
+signal IO_AE17
+signal IO_AE18
+signal IO_AE19
+signal IO_AE20
+signal IO_AE21
+signal IO_AE22
+signal IO_AE23
+signal IO_AE24
+signal IO_AE25
+signal IO_AE26
+signal IO_AE28
+signal IO_AE29
+signal IO_AF1
+signal IO_AF2
+signal IO_AF4
+signal IO_AF6
+signal IO_AF8
+signal IO_AF9
+signal IO_AF11
+signal IO_AF12
+signal IO_AF13
+signal IO_AF15
+signal IO_AF16
+signal IO_AF18
+signal IO_AF19
+signal IO_AF20
+signal IO_AF22
+signal IO_AF23
+signal IO_AF25
+signal IO_AF27
+signal IO_AF29
+signal IO_AF30
+signal IO_AG1
+signal IO_AG2
+signal IO_AG3
+signal IO_AG4
+signal IO_AG5
+signal IO_AG7
+signal IO_AG8
+signal IO_AG9
+signal IO_AG11
+signal IO_AG12
+signal IO_AG13
+signal IO_AG15
+signal IO_AG16
+signal IO_AG18
+signal IO_AG19
+signal IO_AG20
+signal IO_AG22
+signal IO_AG23
+signal IO_AG24
+signal IO_AG26
+signal IO_AG27
+signal IO_AG28
+signal IO_AG29
+signal IO_AG30
+signal IO_AH1
+signal IO_AH2
+signal IO_AH4
+signal IO_AH6
+signal IO_AH7
+signal IO_AH8
+signal IO_AH10
+signal IO_AH11
+signal IO_AH12
+signal IO_AH14
+signal IO_AH15
+signal IO_AH16
+signal IO_AH17
+signal IO_AH19
+signal IO_AH20
+signal IO_AH21
+signal IO_AH23
+signal IO_AH24
+signal IO_AH25
+signal IO_AH27
+signal IO_AH29
+signal IO_AH30
+signal IO_AJ4
+signal IO_AJ5
+signal IO_AJ6
+signal IO_AJ7
+signal IO_AJ8
+signal IO_AJ9
+signal IO_AJ10
+signal IO_AJ11
+signal IO_AJ12
+signal IO_AJ13
+signal IO_AJ14
+signal IO_AJ15
+signal IO_AJ16
+signal IO_AJ17
+signal IO_AJ18
+signal IO_AJ19
+signal IO_AJ20
+signal IO_AJ21
+signal IO_AJ22
+signal IO_AJ23
+signal IO_AJ24
+signal IO_AJ25
+signal IO_AJ26
+signal IO_AJ27
+signal IO_AK4
+signal IO_AK5
+signal IO_AK7
+signal IO_AK8
+signal IO_AK9
+signal IO_AK11
+signal IO_AK12
+signal IO_AK13
+signal IO_AK15
+signal IO_AK16
+signal IO_AK18
+signal IO_AK19
+signal IO_AK20
+signal IO_AK22
+signal IO_AK23
+signal IO_AK24
+signal IO_AK26
+signal IO_AK27
+
+register BSR 2243
+register BR 1
+register DIR 32
+
+instruction length 6
+
+instruction EXTEST 000000 BSR
+instruction SAMPLE/PRELOAD 000001 BSR
+instruction IDCODE 001001 DIR
+instruction BYPASS 111111 BR
+
+bit 2242 I 1 IO_C29
+bit 2241 O 1 IO_C29 2240 1 Z
+bit 2240 C 1 *
+bit 2239 I 1 IO_C30
+bit 2238 O 1 IO_C30 2237 1 Z
+bit 2237 C 1 *
+bit 2236 I 1 IO_D27
+bit 2235 O 1 IO_D27 2234 1 Z
+bit 2234 C 1 *
+bit 2233 I 1 IO_D28
+bit 2232 O 1 IO_D28 2231 1 Z
+bit 2231 C 1 *
+bit 2230 I 1 IO_D29
+bit 2229 O 1 IO_D29 2228 1 Z
+bit 2228 C 1 *
+bit 2227 I 1 IO_D30
+bit 2226 O 1 IO_D30 2225 1 Z
+bit 2225 C 1 *
+bit 2224 I 1 IO_E29
+bit 2223 O 1 IO_E29 2222 1 Z
+bit 2222 C 1 *
+bit 2221 I 1 IO_E30
+bit 2220 O 1 IO_E30 2219 1 Z
+bit 2219 C 1 *
+bit 2218 I 1 IO_E27
+bit 2217 O 1 IO_E27 2216 1 Z
+bit 2216 C 1 *
+bit 2215 I 1 IO_F26
+bit 2214 O 1 IO_F26 2213 1 Z
+bit 2213 C 1 *
+bit 2212 I 1 IO_F28
+bit 2211 O 1 IO_F28 2210 1 Z
+bit 2210 C 1 *
+bit 2209 I 1 IO_F29
+bit 2208 O 1 IO_F29 2207 1 Z
+bit 2207 C 1 *
+bit 2206 O 1 *
+bit 2205 O 1 *
+bit 2204 O 1 *
+bit 2203 O 1 *
+bit 2202 O 1 *
+bit 2201 O 1 *
+bit 2200 O 1 *
+bit 2199 O 1 *
+bit 2198 O 1 *
+bit 2197 O 1 *
+bit 2196 O 1 *
+bit 2195 O 1 *
+bit 2194 I 1 IO_G27
+bit 2193 O 1 IO_G27 2192 1 Z
+bit 2192 C 1 *
+bit 2191 I 1 IO_G28
+bit 2190 O 1 IO_G28 2189 1 Z
+bit 2189 C 1 *
+bit 2188 I 1 IO_G29
+bit 2187 O 1 IO_G29 2186 1 Z
+bit 2186 C 1 *
+bit 2185 I 1 IO_G30
+bit 2184 O 1 IO_G30 2183 1 Z
+bit 2183 C 1 *
+bit 2182 I 1 IO_G25
+bit 2181 O 1 IO_G25 2180 1 Z
+bit 2180 C 1 *
+bit 2179 I 1 IO_H24
+bit 2178 O 1 IO_H24 2177 1 Z
+bit 2177 C 1 *
+bit 2176 I 1 IO_H25
+bit 2175 O 1 IO_H25 2174 1 Z
+bit 2174 C 1 *
+bit 2173 I 1 IO_H26
+bit 2172 O 1 IO_H26 2171 1 Z
+bit 2171 C 1 *
+bit 2170 I 1 IO_H27
+bit 2169 O 1 IO_H27 2168 1 Z
+bit 2168 C 1 *
+bit 2167 I 1 IO_H28
+bit 2166 O 1 IO_H28 2165 1 Z
+bit 2165 C 1 *
+bit 2164 O 1 *
+bit 2163 O 1 *
+bit 2162 O 1 *
+bit 2161 I 1 IO_J25
+bit 2160 O 1 IO_J25 2159 1 Z
+bit 2159 C 1 *
+bit 2158 I 1 IO_H29
+bit 2157 O 1 IO_H29 2156 1 Z
+bit 2156 C 1 *
+bit 2155 I 1 IO_H30
+bit 2154 O 1 IO_H30 2153 1 Z
+bit 2153 C 1 *
+bit 2152 I 1 IO_J26
+bit 2151 O 1 IO_J26 2150 1 Z
+bit 2150 C 1 *
+bit 2149 I 1 IO_J27
+bit 2148 O 1 IO_J27 2147 1 Z
+bit 2147 C 1 *
+bit 2146 I 1 IO_J29
+bit 2145 O 1 IO_J29 2144 1 Z
+bit 2144 C 1 *
+bit 2143 I 1 IO_J30
+bit 2142 O 1 IO_J30 2141 1 Z
+bit 2141 C 1 *
+bit 2140 I 1 IO_J23
+bit 2139 O 1 IO_J23 2138 1 Z
+bit 2138 C 1 *
+bit 2137 I 1 IO_K22
+bit 2136 O 1 IO_K22 2135 1 Z
+bit 2135 C 1 *
+bit 2134 I 1 IO_K24
+bit 2133 O 1 IO_K24 2132 1 Z
+bit 2132 C 1 *
+bit 2131 I 1 IO_K25
+bit 2130 O 1 IO_K25 2129 1 Z
+bit 2129 C 1 *
+bit 2128 O 1 *
+bit 2127 O 1 *
+bit 2126 O 1 *
+bit 2125 O 1 *
+bit 2124 O 1 *
+bit 2123 O 1 *
+bit 2122 I 1 IO_K28
+bit 2121 O 1 IO_K28 2120 1 Z
+bit 2120 C 1 *
+bit 2119 I 1 IO_K29
+bit 2118 O 1 IO_K29 2117 1 Z
+bit 2117 C 1 *
+bit 2116 I 1 IO_K21
+bit 2115 O 1 IO_K21 2114 1 Z
+bit 2114 C 1 *
+bit 2113 I 1 IO_L21
+bit 2112 O 1 IO_L21 2111 1 Z
+bit 2111 C 1 *
+bit 2110 I 1 IO_L23
+bit 2109 O 1 IO_L23 2108 1 Z
+bit 2108 C 1 *
+bit 2107 I 1 IO_L24
+bit 2106 O 1 IO_L24 2105 1 Z
+bit 2105 C 1 *
+bit 2104 I 1 IO_L25
+bit 2103 O 1 IO_L25 2102 1 Z
+bit 2102 C 1 *
+bit 2101 I 1 IO_L26
+bit 2100 O 1 IO_L26 2099 1 Z
+bit 2099 C 1 *
+bit 2098 I 1 IO_L27
+bit 2097 O 1 IO_L27 2096 1 Z
+bit 2096 C 1 *
+bit 2095 I 1 IO_L28
+bit 2094 O 1 IO_L28 2093 1 Z
+bit 2093 C 1 *
+bit 2092 O 1 *
+bit 2091 O 1 *
+bit 2090 O 1 *
+bit 2089 O 1 *
+bit 2088 O 1 *
+bit 2087 O 1 *
+bit 2086 I 1 IO_L29
+bit 2085 O 1 IO_L29 2084 1 Z
+bit 2084 C 1 *
+bit 2083 I 1 IO_L30
+bit 2082 O 1 IO_L30 2081 1 Z
+bit 2081 C 1 *
+bit 2080 I 1 IO_M22
+bit 2079 O 1 IO_M22 2078 1 Z
+bit 2078 C 1 *
+bit 2077 I 1 IO_M23
+bit 2076 O 1 IO_M23 2075 1 Z
+bit 2075 C 1 *
+bit 2074 I 1 IO_M24
+bit 2073 O 1 IO_M24 2072 1 Z
+bit 2072 C 1 *
+bit 2071 I 1 IO_M25
+bit 2070 O 1 IO_M25 2069 1 Z
+bit 2069 C 1 *
+bit 2068 I 1 IO_M27
+bit 2067 O 1 IO_M27 2066 1 Z
+bit 2066 C 1 *
+bit 2065 I 1 IO_M28
+bit 2064 O 1 IO_M28 2063 1 Z
+bit 2063 C 1 *
+bit 2062 O 1 *
+bit 2061 O 1 *
+bit 2060 O 1 *
+bit 2059 O 1 *
+bit 2058 O 1 *
+bit 2057 O 1 *
+bit 2056 I 1 IO_M29
+bit 2055 O 1 IO_M29 2054 1 Z
+bit 2054 C 1 *
+bit 2053 I 1 IO_M30
+bit 2052 O 1 IO_M30 2051 1 Z
+bit 2051 C 1 *
+bit 2050 I 1 IO_M21
+bit 2049 O 1 IO_M21 2048 1 Z
+bit 2048 C 1 *
+bit 2047 I 1 IO_N21
+bit 2046 O 1 IO_N21 2045 1 Z
+bit 2045 C 1 *
+bit 2044 I 1 IO_N22
+bit 2043 O 1 IO_N22 2042 1 Z
+bit 2042 C 1 *
+bit 2041 I 1 IO_N23
+bit 2040 O 1 IO_N23 2039 1 Z
+bit 2039 C 1 *
+bit 2038 I 1 IO_M26
+bit 2037 O 1 IO_M26 2036 1 Z
+bit 2036 C 1 *
+bit 2035 I 1 IO_N25
+bit 2034 O 1 IO_N25 2033 1 Z
+bit 2033 C 1 *
+bit 2032 I 1 IO_N26
+bit 2031 O 1 IO_N26 2030 1 Z
+bit 2030 C 1 *
+bit 2029 I 1 IO_N27
+bit 2028 O 1 IO_N27 2027 1 Z
+bit 2027 C 1 *
+bit 2026 O 1 *
+bit 2025 O 1 *
+bit 2024 O 1 *
+bit 2023 O 1 *
+bit 2022 O 1 *
+bit 2021 O 1 *
+bit 2020 I 1 IO_N29
+bit 2019 O 1 IO_N29 2018 1 Z
+bit 2018 C 1 *
+bit 2017 I 1 IO_N30
+bit 2016 O 1 IO_N30 2015 1 Z
+bit 2015 C 1 *
+bit 2014 I 1 IO_P21
+bit 2013 O 1 IO_P21 2012 1 Z
+bit 2012 C 1 *
+bit 2011 I 1 IO_P22
+bit 2010 O 1 IO_P22 2009 1 Z
+bit 2009 C 1 *
+bit 2008 I 1 IO_P24
+bit 2007 O 1 IO_P24 2006 1 Z
+bit 2006 C 1 *
+bit 2005 I 1 IO_P25
+bit 2004 O 1 IO_P25 2003 1 Z
+bit 2003 C 1 *
+bit 2002 I 1 IO_P28
+bit 2001 O 1 IO_P28 2000 1 Z
+bit 2000 C 1 *
+bit 1999 I 1 IO_P29
+bit 1998 O 1 IO_P29 1997 1 Z
+bit 1997 C 1 *
+bit 1996 I 1 IO_R21
+bit 1995 O 1 IO_R21 1994 1 Z
+bit 1994 C 1 *
+bit 1993 I 1 IO_R22
+bit 1992 O 1 IO_R22 1991 1 Z
+bit 1991 C 1 *
+bit 1990 O 1 *
+bit 1989 O 1 *
+bit 1988 O 1 *
+bit 1987 O 1 *
+bit 1986 O 1 *
+bit 1985 O 1 *
+bit 1984 O 1 *
+bit 1983 O 1 *
+bit 1982 O 1 *
+bit 1981 O 1 *
+bit 1980 O 1 *
+bit 1979 O 1 *
+bit 1978 I 1 IO_R23
+bit 1977 O 1 IO_R23 1976 1 Z
+bit 1976 C 1 *
+bit 1975 I 1 IO_R24
+bit 1974 O 1 IO_R24 1973 1 Z
+bit 1973 C 1 *
+bit 1972 I 1 IO_R25
+bit 1971 O 1 IO_R25 1970 1 Z
+bit 1970 C 1 *
+bit 1969 I 1 IO_R26
+bit 1968 O 1 IO_R26 1967 1 Z
+bit 1967 C 1 *
+bit 1966 I 1 IO_R27
+bit 1965 O 1 IO_R27 1964 1 Z
+bit 1964 C 1 *
+bit 1963 I 1 IO_R28
+bit 1962 O 1 IO_R28 1961 1 Z
+bit 1961 C 1 *
+bit 1960 I 1 IO_R29
+bit 1959 O 1 IO_R29 1958 1 Z
+bit 1958 C 1 *
+bit 1957 I 1 IO_R30
+bit 1956 O 1 IO_R30 1955 1 Z
+bit 1955 C 1 *
+bit 1954 I 1 IO_T30
+bit 1953 O 1 IO_T30 1952 1 Z
+bit 1952 C 1 *
+bit 1951 I 1 IO_T29
+bit 1950 O 1 IO_T29 1949 1 Z
+bit 1949 C 1 *
+bit 1948 I 1 IO_T28
+bit 1947 O 1 IO_T28 1946 1 Z
+bit 1946 C 1 *
+bit 1945 I 1 IO_T27
+bit 1944 O 1 IO_T27 1943 1 Z
+bit 1943 C 1 *
+bit 1942 I 1 IO_T26
+bit 1941 O 1 IO_T26 1940 1 Z
+bit 1940 C 1 *
+bit 1939 I 1 IO_T25
+bit 1938 O 1 IO_T25 1937 1 Z
+bit 1937 C 1 *
+bit 1936 I 1 IO_T24
+bit 1935 O 1 IO_T24 1934 1 Z
+bit 1934 C 1 *
+bit 1933 I 1 IO_T23
+bit 1932 O 1 IO_T23 1931 1 Z
+bit 1931 C 1 *
+bit 1930 O 1 *
+bit 1929 O 1 *
+bit 1928 O 1 *
+bit 1927 O 1 *
+bit 1926 O 1 *
+bit 1925 O 1 *
+bit 1924 O 1 *
+bit 1923 O 1 *
+bit 1922 O 1 *
+bit 1921 O 1 *
+bit 1920 O 1 *
+bit 1919 O 1 *
+bit 1918 I 1 IO_T22
+bit 1917 O 1 IO_T22 1916 1 Z
+bit 1916 C 1 *
+bit 1915 I 1 IO_T21
+bit 1914 O 1 IO_T21 1913 1 Z
+bit 1913 C 1 *
+bit 1912 I 1 IO_U29
+bit 1911 O 1 IO_U29 1910 1 Z
+bit 1910 C 1 *
+bit 1909 I 1 IO_U28
+bit 1908 O 1 IO_U28 1907 1 Z
+bit 1907 C 1 *
+bit 1906 I 1 IO_U25
+bit 1905 O 1 IO_U25 1904 1 Z
+bit 1904 C 1 *
+bit 1903 I 1 IO_U24
+bit 1902 O 1 IO_U24 1901 1 Z
+bit 1901 C 1 *
+bit 1900 I 1 IO_U22
+bit 1899 O 1 IO_U22 1898 1 Z
+bit 1898 C 1 *
+bit 1897 I 1 IO_U21
+bit 1896 O 1 IO_U21 1895 1 Z
+bit 1895 C 1 *
+bit 1894 I 1 IO_V30
+bit 1893 O 1 IO_V30 1892 1 Z
+bit 1892 C 1 *
+bit 1891 I 1 IO_V29
+bit 1890 O 1 IO_V29 1889 1 Z
+bit 1889 C 1 *
+bit 1888 O 1 *
+bit 1887 O 1 *
+bit 1886 O 1 *
+bit 1885 O 1 *
+bit 1884 O 1 *
+bit 1883 O 1 *
+bit 1882 I 1 IO_V27
+bit 1881 O 1 IO_V27 1880 1 Z
+bit 1880 C 1 *
+bit 1879 I 1 IO_V26
+bit 1878 O 1 IO_V26 1877 1 Z
+bit 1877 C 1 *
+bit 1876 I 1 IO_V25
+bit 1875 O 1 IO_V25 1874 1 Z
+bit 1874 C 1 *
+bit 1873 I 1 IO_W26
+bit 1872 O 1 IO_W26 1871 1 Z
+bit 1871 C 1 *
+bit 1870 I 1 IO_V23
+bit 1869 O 1 IO_V23 1868 1 Z
+bit 1868 C 1 *
+bit 1867 I 1 IO_V22
+bit 1866 O 1 IO_V22 1865 1 Z
+bit 1865 C 1 *
+bit 1864 I 1 IO_V21
+bit 1863 O 1 IO_V21 1862 1 Z
+bit 1862 C 1 *
+bit 1861 I 1 IO_W21
+bit 1860 O 1 IO_W21 1859 1 Z
+bit 1859 C 1 *
+bit 1858 I 1 IO_W30
+bit 1857 O 1 IO_W30 1856 1 Z
+bit 1856 C 1 *
+bit 1855 I 1 IO_W29
+bit 1854 O 1 IO_W29 1853 1 Z
+bit 1853 C 1 *
+bit 1852 O 1 *
+bit 1851 O 1 *
+bit 1850 O 1 *
+bit 1849 O 1 *
+bit 1848 O 1 *
+bit 1847 O 1 *
+bit 1846 I 1 IO_W28
+bit 1845 O 1 IO_W28 1844 1 Z
+bit 1844 C 1 *
+bit 1843 I 1 IO_W27
+bit 1842 O 1 IO_W27 1841 1 Z
+bit 1841 C 1 *
+bit 1840 I 1 IO_W25
+bit 1839 O 1 IO_W25 1838 1 Z
+bit 1838 C 1 *
+bit 1837 I 1 IO_W24
+bit 1836 O 1 IO_W24 1835 1 Z
+bit 1835 C 1 *
+bit 1834 I 1 IO_W23
+bit 1833 O 1 IO_W23 1832 1 Z
+bit 1832 C 1 *
+bit 1831 I 1 IO_W22
+bit 1830 O 1 IO_W22 1829 1 Z
+bit 1829 C 1 *
+bit 1828 I 1 IO_Y30
+bit 1827 O 1 IO_Y30 1826 1 Z
+bit 1826 C 1 *
+bit 1825 I 1 IO_Y29
+bit 1824 O 1 IO_Y29 1823 1 Z
+bit 1823 C 1 *
+bit 1822 O 1 *
+bit 1821 O 1 *
+bit 1820 O 1 *
+bit 1819 O 1 *
+bit 1818 O 1 *
+bit 1817 O 1 *
+bit 1816 I 1 IO_Y28
+bit 1815 O 1 IO_Y28 1814 1 Z
+bit 1814 C 1 *
+bit 1813 I 1 IO_Y27
+bit 1812 O 1 IO_Y27 1811 1 Z
+bit 1811 C 1 *
+bit 1810 I 1 IO_Y26
+bit 1809 O 1 IO_Y26 1808 1 Z
+bit 1808 C 1 *
+bit 1807 I 1 IO_Y25
+bit 1806 O 1 IO_Y25 1805 1 Z
+bit 1805 C 1 *
+bit 1804 I 1 IO_Y24
+bit 1803 O 1 IO_Y24 1802 1 Z
+bit 1802 C 1 *
+bit 1801 I 1 IO_Y23
+bit 1800 O 1 IO_Y23 1799 1 Z
+bit 1799 C 1 *
+bit 1798 I 1 IO_Y21
+bit 1797 O 1 IO_Y21 1796 1 Z
+bit 1796 C 1 *
+bit 1795 I 1 IO_AA21
+bit 1794 O 1 IO_AA21 1793 1 Z
+bit 1793 C 1 *
+bit 1792 I 1 IO_AA29
+bit 1791 O 1 IO_AA29 1790 1 Z
+bit 1790 C 1 *
+bit 1789 I 1 IO_AA28
+bit 1788 O 1 IO_AA28 1787 1 Z
+bit 1787 C 1 *
+bit 1786 O 1 *
+bit 1785 O 1 *
+bit 1784 O 1 *
+bit 1783 O 1 *
+bit 1782 O 1 *
+bit 1781 O 1 *
+bit 1780 I 1 IO_AA25
+bit 1779 O 1 IO_AA25 1778 1 Z
+bit 1778 C 1 *
+bit 1777 I 1 IO_AA24
+bit 1776 O 1 IO_AA24 1775 1 Z
+bit 1775 C 1 *
+bit 1774 I 1 IO_AA22
+bit 1773 O 1 IO_AA22 1772 1 Z
+bit 1772 C 1 *
+bit 1771 I 1 IO_AB23
+bit 1770 O 1 IO_AB23 1769 1 Z
+bit 1769 C 1 *
+bit 1768 I 1 IO_AB30
+bit 1767 O 1 IO_AB30 1766 1 Z
+bit 1766 C 1 *
+bit 1765 I 1 IO_AB29
+bit 1764 O 1 IO_AB29 1763 1 Z
+bit 1763 C 1 *
+bit 1762 I 1 IO_AB27
+bit 1761 O 1 IO_AB27 1760 1 Z
+bit 1760 C 1 *
+bit 1759 I 1 IO_AB26
+bit 1758 O 1 IO_AB26 1757 1 Z
+bit 1757 C 1 *
+bit 1756 I 1 IO_AC30
+bit 1755 O 1 IO_AC30 1754 1 Z
+bit 1754 C 1 *
+bit 1753 I 1 IO_AC29
+bit 1752 O 1 IO_AC29 1751 1 Z
+bit 1751 C 1 *
+bit 1750 I 1 IO_AB25
+bit 1749 O 1 IO_AB25 1748 1 Z
+bit 1748 C 1 *
+bit 1747 O 1 *
+bit 1746 O 1 *
+bit 1745 O 1 *
+bit 1744 I 1 IO_AC28
+bit 1743 O 1 IO_AC28 1742 1 Z
+bit 1742 C 1 *
+bit 1741 I 1 IO_AC27
+bit 1740 O 1 IO_AC27 1739 1 Z
+bit 1739 C 1 *
+bit 1738 I 1 IO_AC26
+bit 1737 O 1 IO_AC26 1736 1 Z
+bit 1736 C 1 *
+bit 1735 I 1 IO_AC25
+bit 1734 O 1 IO_AC25 1733 1 Z
+bit 1733 C 1 *
+bit 1732 I 1 IO_AC24
+bit 1731 O 1 IO_AC24 1730 1 Z
+bit 1730 C 1 *
+bit 1729 I 1 IO_AD25
+bit 1728 O 1 IO_AD25 1727 1 Z
+bit 1727 C 1 *
+bit 1726 I 1 IO_AD30
+bit 1725 O 1 IO_AD30 1724 1 Z
+bit 1724 C 1 *
+bit 1723 I 1 IO_AD29
+bit 1722 O 1 IO_AD29 1721 1 Z
+bit 1721 C 1 *
+bit 1720 I 1 IO_AD28
+bit 1719 O 1 IO_AD28 1718 1 Z
+bit 1718 C 1 *
+bit 1717 I 1 IO_AD27
+bit 1716 O 1 IO_AD27 1715 1 Z
+bit 1715 C 1 *
+bit 1714 O 1 *
+bit 1713 O 1 *
+bit 1712 O 1 *
+bit 1711 O 1 *
+bit 1710 O 1 *
+bit 1709 O 1 *
+bit 1708 O 1 *
+bit 1707 O 1 *
+bit 1706 O 1 *
+bit 1705 O 1 *
+bit 1704 O 1 *
+bit 1703 O 1 *
+bit 1702 I 1 IO_AE29
+bit 1701 O 1 IO_AE29 1700 1 Z
+bit 1700 C 1 *
+bit 1699 I 1 IO_AE28
+bit 1698 O 1 IO_AE28 1697 1 Z
+bit 1697 C 1 *
+bit 1696 I 1 IO_AE26
+bit 1695 O 1 IO_AE26 1694 1 Z
+bit 1694 C 1 *
+bit 1693 I 1 IO_AF27
+bit 1692 O 1 IO_AF27 1691 1 Z
+bit 1691 C 1 *
+bit 1690 I 1 IO_AF30
+bit 1689 O 1 IO_AF30 1688 1 Z
+bit 1688 C 1 *
+bit 1687 I 1 IO_AF29
+bit 1686 O 1 IO_AF29 1685 1 Z
+bit 1685 C 1 *
+bit 1684 I 1 IO_AG30
+bit 1683 O 1 IO_AG30 1682 1 Z
+bit 1682 C 1 *
+bit 1681 I 1 IO_AG29
+bit 1680 O 1 IO_AG29 1679 1 Z
+bit 1679 C 1 *
+bit 1678 I 1 IO_AG28
+bit 1677 O 1 IO_AG28 1676 1 Z
+bit 1676 C 1 *
+bit 1675 I 1 IO_AG27
+bit 1674 O 1 IO_AG27 1673 1 Z
+bit 1673 C 1 *
+bit 1672 I 1 IO_AH30
+bit 1671 O 1 IO_AH30 1670 1 Z
+bit 1670 C 1 *
+bit 1669 I 1 IO_AH29
+bit 1668 O 1 IO_AH29 1667 1 Z
+bit 1667 C 1 *
+bit 1666 I 1 CCLK_AH28
+bit 1665 O 1 CCLK_AH28 1664 1 Z
+bit 1664 C 1 *
+bit 1663 I 1 DONE_AJ28
+bit 1662 O 1 DONE_AJ28 1661 1 Z
+bit 1661 C 1 *
+bit 1660 I 1 IO_AK28
+bit 1659 O 1 IO_AK28 1658 1 Z
+bit 1658 C 1 *
+bit 1657 I 1 IO_AJ27
+bit 1656 O 1 IO_AJ27 1655 1 Z
+bit 1655 C 1 *
+bit 1654 I 1 IO_AK27
+bit 1653 O 1 IO_AK27 1652 1 Z
+bit 1652 C 1 *
+bit 1651 I 1 IO_AJ26
+bit 1650 O 1 IO_AJ26 1649 1 Z
+bit 1649 C 1 *
+bit 1648 I 1 IO_AK26
+bit 1647 O 1 IO_AK26 1646 1 Z
+bit 1646 C 1 *
+bit 1645 I 1 IO_AH27
+bit 1644 O 1 IO_AH27 1643 1 Z
+bit 1643 C 1 *
+bit 1642 I 1 IO_AG26
+bit 1641 O 1 IO_AG26 1640 1 Z
+bit 1640 C 1 *
+bit 1639 I 1 IO_AF25
+bit 1638 O 1 IO_AF25 1637 1 Z
+bit 1637 C 1 *
+bit 1636 I 1 IO_AH25
+bit 1635 O 1 IO_AH25 1634 1 Z
+bit 1634 C 1 *
+bit 1633 I 1 IO_AJ25
+bit 1632 O 1 IO_AJ25 1631 1 Z
+bit 1631 C 1 *
+bit 1630 O 1 *
+bit 1629 O 1 *
+bit 1628 O 1 *
+bit 1627 I 1 IO_AE25
+bit 1626 O 1 IO_AE25 1625 1 Z
+bit 1625 C 1 *
+bit 1624 I 1 IO_AE24
+bit 1623 O 1 IO_AE24 1622 1 Z
+bit 1622 C 1 *
+bit 1621 I 1 IO_AG24
+bit 1620 O 1 IO_AG24 1619 1 Z
+bit 1619 C 1 *
+bit 1618 I 1 IO_AH24
+bit 1617 O 1 IO_AH24 1616 1 Z
+bit 1616 C 1 *
+bit 1615 O 1 *
+bit 1614 O 1 *
+bit 1613 O 1 *
+bit 1612 I 1 IO_AJ24
+bit 1611 O 1 IO_AJ24 1610 1 Z
+bit 1610 C 1 *
+bit 1609 I 1 IO_AK24
+bit 1608 O 1 IO_AK24 1607 1 Z
+bit 1607 C 1 *
+bit 1606 I 1 IO_AD24
+bit 1605 O 1 IO_AD24 1604 1 Z
+bit 1604 C 1 *
+bit 1603 I 1 IO_AC23
+bit 1602 O 1 IO_AC23 1601 1 Z
+bit 1601 C 1 *
+bit 1600 I 1 IO_AD23
+bit 1599 O 1 IO_AD23 1598 1 Z
+bit 1598 C 1 *
+bit 1597 I 1 IO_AE23
+bit 1596 O 1 IO_AE23 1595 1 Z
+bit 1595 C 1 *
+bit 1594 I 1 IO_AF23
+bit 1593 O 1 IO_AF23 1592 1 Z
+bit 1592 C 1 *
+bit 1591 I 1 IO_AG23
+bit 1590 O 1 IO_AG23 1589 1 Z
+bit 1589 C 1 *
+bit 1588 I 1 IO_AH23
+bit 1587 O 1 IO_AH23 1586 1 Z
+bit 1586 C 1 *
+bit 1585 O 1 *
+bit 1584 O 1 *
+bit 1583 O 1 *
+bit 1582 I 1 IO_AJ23
+bit 1581 O 1 IO_AJ23 1580 1 Z
+bit 1580 C 1 *
+bit 1579 I 1 IO_AK23
+bit 1578 O 1 IO_AK23 1577 1 Z
+bit 1577 C 1 *
+bit 1576 I 1 IO_AB22
+bit 1575 O 1 IO_AB22 1574 1 Z
+bit 1574 C 1 *
+bit 1573 I 1 IO_AC22
+bit 1572 O 1 IO_AC22 1571 1 Z
+bit 1571 C 1 *
+bit 1570 I 1 IO_AE22
+bit 1569 O 1 IO_AE22 1568 1 Z
+bit 1568 C 1 *
+bit 1567 I 1 IO_AF22
+bit 1566 O 1 IO_AF22 1565 1 Z
+bit 1565 C 1 *
+bit 1564 I 1 IO_AG22
+bit 1563 O 1 IO_AG22 1562 1 Z
+bit 1562 C 1 *
+bit 1561 I 1 IO_AJ22
+bit 1560 O 1 IO_AJ22 1559 1 Z
+bit 1559 C 1 *
+bit 1558 I 1 IO_AK22
+bit 1557 O 1 IO_AK22 1556 1 Z
+bit 1556 C 1 *
+bit 1555 O 1 *
+bit 1554 O 1 *
+bit 1553 O 1 *
+bit 1552 I 1 IO_AD21
+bit 1551 O 1 IO_AD21 1550 1 Z
+bit 1550 C 1 *
+bit 1549 I 1 IO_AE21
+bit 1548 O 1 IO_AE21 1547 1 Z
+bit 1547 C 1 *
+bit 1546 I 1 IO_AH21
+bit 1545 O 1 IO_AH21 1544 1 Z
+bit 1544 C 1 *
+bit 1543 I 1 IO_AJ21
+bit 1542 O 1 IO_AJ21 1541 1 Z
+bit 1541 C 1 *
+bit 1540 O 1 *
+bit 1539 O 1 *
+bit 1538 O 1 *
+bit 1537 I 1 IO_AB21
+bit 1536 O 1 IO_AB21 1535 1 Z
+bit 1535 C 1 *
+bit 1534 I 1 IO_AA20
+bit 1533 O 1 IO_AA20 1532 1 Z
+bit 1532 C 1 *
+bit 1531 I 1 IO_AC20
+bit 1530 O 1 IO_AC20 1529 1 Z
+bit 1529 C 1 *
+bit 1528 I 1 IO_AD20
+bit 1527 O 1 IO_AD20 1526 1 Z
+bit 1526 C 1 *
+bit 1525 O 1 *
+bit 1524 O 1 *
+bit 1523 O 1 *
+bit 1522 I 1 IO_AE20
+bit 1521 O 1 IO_AE20 1520 1 Z
+bit 1520 C 1 *
+bit 1519 I 1 IO_AF20
+bit 1518 O 1 IO_AF20 1517 1 Z
+bit 1517 C 1 *
+bit 1516 I 1 IO_AG20
+bit 1515 O 1 IO_AG20 1514 1 Z
+bit 1514 C 1 *
+bit 1513 I 1 IO_AH20
+bit 1512 O 1 IO_AH20 1511 1 Z
+bit 1511 C 1 *
+bit 1510 O 1 *
+bit 1509 O 1 *
+bit 1508 O 1 *
+bit 1507 I 1 IO_AJ20
+bit 1506 O 1 IO_AJ20 1505 1 Z
+bit 1505 C 1 *
+bit 1504 I 1 IO_AK20
+bit 1503 O 1 IO_AK20 1502 1 Z
+bit 1502 C 1 *
+bit 1501 I 1 IO_AA19
+bit 1500 O 1 IO_AA19 1499 1 Z
+bit 1499 C 1 *
+bit 1498 I 1 IO_AB19
+bit 1497 O 1 IO_AB19 1496 1 Z
+bit 1496 C 1 *
+bit 1495 O 1 *
+bit 1494 O 1 *
+bit 1493 O 1 *
+bit 1492 I 1 IO_AC19
+bit 1491 O 1 IO_AC19 1490 1 Z
+bit 1490 C 1 *
+bit 1489 I 1 IO_AD19
+bit 1488 O 1 IO_AD19 1487 1 Z
+bit 1487 C 1 *
+bit 1486 I 1 IO_AE19
+bit 1485 O 1 IO_AE19 1484 1 Z
+bit 1484 C 1 *
+bit 1483 I 1 IO_AF19
+bit 1482 O 1 IO_AF19 1481 1 Z
+bit 1481 C 1 *
+bit 1480 O 1 *
+bit 1479 O 1 *
+bit 1478 O 1 *
+bit 1477 I 1 IO_AG19
+bit 1476 O 1 IO_AG19 1475 1 Z
+bit 1475 C 1 *
+bit 1474 I 1 IO_AH19
+bit 1473 O 1 IO_AH19 1472 1 Z
+bit 1472 C 1 *
+bit 1471 I 1 IO_AJ19
+bit 1470 O 1 IO_AJ19 1469 1 Z
+bit 1469 C 1 *
+bit 1468 I 1 IO_AK19
+bit 1467 O 1 IO_AK19 1466 1 Z
+bit 1466 C 1 *
+bit 1465 I 1 IO_AA18
+bit 1464 O 1 IO_AA18 1463 1 Z
+bit 1463 C 1 *
+bit 1462 I 1 IO_AB18
+bit 1461 O 1 IO_AB18 1460 1 Z
+bit 1460 C 1 *
+bit 1459 I 1 IO_AC18
+bit 1458 O 1 IO_AC18 1457 1 Z
+bit 1457 C 1 *
+bit 1456 I 1 IO_AE18
+bit 1455 O 1 IO_AE18 1454 1 Z
+bit 1454 C 1 *
+bit 1453 I 1 IO_AF18
+bit 1452 O 1 IO_AF18 1451 1 Z
+bit 1451 C 1 *
+bit 1450 I 1 IO_AG18
+bit 1449 O 1 IO_AG18 1448 1 Z
+bit 1448 C 1 *
+bit 1447 I 1 IO_AJ18
+bit 1446 O 1 IO_AJ18 1445 1 Z
+bit 1445 C 1 *
+bit 1444 I 1 IO_AK18
+bit 1443 O 1 IO_AK18 1442 1 Z
+bit 1442 C 1 *
+bit 1441 I 1 IO_AA17
+bit 1440 O 1 IO_AA17 1439 1 Z
+bit 1439 C 1 *
+bit 1438 I 1 IO_AB17
+bit 1437 O 1 IO_AB17 1436 1 Z
+bit 1436 C 1 *
+bit 1435 I 1 IO_AA16
+bit 1434 O 1 IO_AA16 1433 1 Z
+bit 1433 C 1 *
+bit 1432 I 1 IO_AD17
+bit 1431 O 1 IO_AD17 1430 1 Z
+bit 1430 C 1 *
+bit 1429 I 1 IO_AE17
+bit 1428 O 1 IO_AE17 1427 1 Z
+bit 1427 C 1 *
+bit 1426 I 1 IO_AH17
+bit 1425 O 1 IO_AH17 1424 1 Z
+bit 1424 C 1 *
+bit 1423 I 1 IO_AJ17
+bit 1422 O 1 IO_AJ17 1421 1 Z
+bit 1421 C 1 *
+bit 1420 O 1 *
+bit 1419 O 1 *
+bit 1418 O 1 *
+bit 1417 I 1 IO_AB16
+bit 1416 O 1 IO_AB16 1415 1 Z
+bit 1415 C 1 *
+bit 1414 I 1 IO_AC16
+bit 1413 O 1 IO_AC16 1412 1 Z
+bit 1412 C 1 *
+bit 1411 I 1 IO_AD16
+bit 1410 O 1 IO_AD16 1409 1 Z
+bit 1409 C 1 *
+bit 1408 I 1 IO_AE16
+bit 1407 O 1 IO_AE16 1406 1 Z
+bit 1406 C 1 *
+bit 1405 I 1 IO_AF16
+bit 1404 O 1 IO_AF16 1403 1 Z
+bit 1403 C 1 *
+bit 1402 I 1 IO_AG16
+bit 1401 O 1 IO_AG16 1400 1 Z
+bit 1400 C 1 *
+bit 1399 I 1 IO_AH16
+bit 1398 O 1 IO_AH16 1397 1 Z
+bit 1397 C 1 *
+bit 1396 I 1 IO_AJ16
+bit 1395 O 1 IO_AJ16 1394 1 Z
+bit 1394 C 1 *
+bit 1393 I 1 IO_AK16
+bit 1392 O 1 IO_AK16 1391 1 Z
+bit 1391 C 1 *
+bit 1390 I 1 IO_AK15
+bit 1389 O 1 IO_AK15 1388 1 Z
+bit 1388 C 1 *
+bit 1387 I 1 IO_AJ15
+bit 1386 O 1 IO_AJ15 1385 1 Z
+bit 1385 C 1 *
+bit 1384 I 1 IO_AH15
+bit 1383 O 1 IO_AH15 1382 1 Z
+bit 1382 C 1 *
+bit 1381 I 1 IO_AG15
+bit 1380 O 1 IO_AG15 1379 1 Z
+bit 1379 C 1 *
+bit 1378 I 1 IO_AF15
+bit 1377 O 1 IO_AF15 1376 1 Z
+bit 1376 C 1 *
+bit 1375 I 1 IO_AE15
+bit 1374 O 1 IO_AE15 1373 1 Z
+bit 1373 C 1 *
+bit 1372 I 1 IO_AD15
+bit 1371 O 1 IO_AD15 1370 1 Z
+bit 1370 C 1 *
+bit 1369 I 1 IO_AD14
+bit 1368 O 1 IO_AD14 1367 1 Z
+bit 1367 C 1 *
+bit 1366 I 1 IO_AC15
+bit 1365 O 1 IO_AC15 1364 1 Z
+bit 1364 C 1 *
+bit 1363 I 1 IO_AB15
+bit 1362 O 1 IO_AB15 1361 1 Z
+bit 1361 C 1 *
+bit 1360 I 1 IO_AA15
+bit 1359 O 1 IO_AA15 1358 1 Z
+bit 1358 C 1 *
+bit 1357 I 1 IO_AJ14
+bit 1356 O 1 IO_AJ14 1355 1 Z
+bit 1355 C 1 *
+bit 1354 I 1 IO_AH14
+bit 1353 O 1 IO_AH14 1352 1 Z
+bit 1352 C 1 *
+bit 1351 I 1 IO_AE14
+bit 1350 O 1 IO_AE14 1349 1 Z
+bit 1349 C 1 *
+bit 1348 I 1 IO_AE13
+bit 1347 O 1 IO_AE13 1346 1 Z
+bit 1346 C 1 *
+bit 1345 O 1 *
+bit 1344 O 1 *
+bit 1343 O 1 *
+bit 1342 I 1 IO_AB14
+bit 1341 O 1 IO_AB14 1340 1 Z
+bit 1340 C 1 *
+bit 1339 I 1 IO_AA14
+bit 1338 O 1 IO_AA14 1337 1 Z
+bit 1337 C 1 *
+bit 1336 I 1 IO_AK13
+bit 1335 O 1 IO_AK13 1334 1 Z
+bit 1334 C 1 *
+bit 1333 I 1 IO_AJ13
+bit 1332 O 1 IO_AJ13 1331 1 Z
+bit 1331 C 1 *
+bit 1330 O 1 *
+bit 1329 O 1 *
+bit 1328 O 1 *
+bit 1327 I 1 IO_AG13
+bit 1326 O 1 IO_AG13 1325 1 Z
+bit 1325 C 1 *
+bit 1324 I 1 IO_AF13
+bit 1323 O 1 IO_AF13 1322 1 Z
+bit 1322 C 1 *
+bit 1321 I 1 IO_AC13
+bit 1320 O 1 IO_AC13 1319 1 Z
+bit 1319 C 1 *
+bit 1318 I 1 IO_AB13
+bit 1317 O 1 IO_AB13 1316 1 Z
+bit 1316 C 1 *
+bit 1315 O 1 *
+bit 1314 O 1 *
+bit 1313 O 1 *
+bit 1312 I 1 IO_AA13
+bit 1311 O 1 IO_AA13 1310 1 Z
+bit 1310 C 1 *
+bit 1309 I 1 IO_AA12
+bit 1308 O 1 IO_AA12 1307 1 Z
+bit 1307 C 1 *
+bit 1306 I 1 IO_AK12
+bit 1305 O 1 IO_AK12 1304 1 Z
+bit 1304 C 1 *
+bit 1303 I 1 IO_AJ12
+bit 1302 O 1 IO_AJ12 1301 1 Z
+bit 1301 C 1 *
+bit 1300 O 1 *
+bit 1299 O 1 *
+bit 1298 O 1 *
+bit 1297 I 1 IO_AH12
+bit 1296 O 1 IO_AH12 1295 1 Z
+bit 1295 C 1 *
+bit 1294 I 1 IO_AG12
+bit 1293 O 1 IO_AG12 1292 1 Z
+bit 1292 C 1 *
+bit 1291 I 1 IO_AF12
+bit 1290 O 1 IO_AF12 1289 1 Z
+bit 1289 C 1 *
+bit 1288 I 1 IO_AE12
+bit 1287 O 1 IO_AE12 1286 1 Z
+bit 1286 C 1 *
+bit 1285 O 1 *
+bit 1284 O 1 *
+bit 1283 O 1 *
+bit 1282 I 1 IO_AD12
+bit 1281 O 1 IO_AD12 1280 1 Z
+bit 1280 C 1 *
+bit 1279 I 1 IO_AC12
+bit 1278 O 1 IO_AC12 1277 1 Z
+bit 1277 C 1 *
+bit 1276 I 1 IO_AB12
+bit 1275 O 1 IO_AB12 1274 1 Z
+bit 1274 C 1 *
+bit 1273 I 1 IO_AC11
+bit 1272 O 1 IO_AC11 1271 1 Z
+bit 1271 C 1 *
+bit 1270 O 1 *
+bit 1269 O 1 *
+bit 1268 O 1 *
+bit 1267 I 1 IO_AK11
+bit 1266 O 1 IO_AK11 1265 1 Z
+bit 1265 C 1 *
+bit 1264 I 1 IO_AJ11
+bit 1263 O 1 IO_AJ11 1262 1 Z
+bit 1262 C 1 *
+bit 1261 I 1 IO_AH11
+bit 1260 O 1 IO_AH11 1259 1 Z
+bit 1259 C 1 *
+bit 1258 I 1 IO_AG11
+bit 1257 O 1 IO_AG11 1256 1 Z
+bit 1256 C 1 *
+bit 1255 O 1 *
+bit 1254 O 1 *
+bit 1253 O 1 *
+bit 1252 I 1 IO_AF11
+bit 1251 O 1 IO_AF11 1250 1 Z
+bit 1250 C 1 *
+bit 1249 I 1 IO_AE11
+bit 1248 O 1 IO_AE11 1247 1 Z
+bit 1247 C 1 *
+bit 1246 I 1 IO_AD11
+bit 1245 O 1 IO_AD11 1244 1 Z
+bit 1244 C 1 *
+bit 1243 I 1 IO_AD10
+bit 1242 O 1 IO_AD10 1241 1 Z
+bit 1241 C 1 *
+bit 1240 I 1 IO_AA11
+bit 1239 O 1 IO_AA11 1238 1 Z
+bit 1238 C 1 *
+bit 1237 I 1 IO_AJ10
+bit 1236 O 1 IO_AJ10 1235 1 Z
+bit 1235 C 1 *
+bit 1234 I 1 IO_AH10
+bit 1233 O 1 IO_AH10 1232 1 Z
+bit 1232 C 1 *
+bit 1231 I 1 IO_AE10
+bit 1230 O 1 IO_AE10 1229 1 Z
+bit 1229 C 1 *
+bit 1228 I 1 IO_AE9
+bit 1227 O 1 IO_AE9 1226 1 Z
+bit 1226 C 1 *
+bit 1225 I 1 IO_AB10
+bit 1224 O 1 IO_AB10 1223 1 Z
+bit 1223 C 1 *
+bit 1222 I 1 IO_AK9
+bit 1221 O 1 IO_AK9 1220 1 Z
+bit 1220 C 1 *
+bit 1219 I 1 IO_AJ9
+bit 1218 O 1 IO_AJ9 1217 1 Z
+bit 1217 C 1 *
+bit 1216 I 1 IO_AG9
+bit 1215 O 1 IO_AG9 1214 1 Z
+bit 1214 C 1 *
+bit 1213 I 1 IO_AF9
+bit 1212 O 1 IO_AF9 1211 1 Z
+bit 1211 C 1 *
+bit 1210 O 1 *
+bit 1209 O 1 *
+bit 1208 O 1 *
+bit 1207 I 1 IO_AC9
+bit 1206 O 1 IO_AC9 1205 1 Z
+bit 1205 C 1 *
+bit 1204 I 1 IO_AB9
+bit 1203 O 1 IO_AB9 1202 1 Z
+bit 1202 C 1 *
+bit 1201 I 1 IO_AK8
+bit 1200 O 1 IO_AK8 1199 1 Z
+bit 1199 C 1 *
+bit 1198 I 1 IO_AJ8
+bit 1197 O 1 IO_AJ8 1196 1 Z
+bit 1196 C 1 *
+bit 1195 O 1 *
+bit 1194 O 1 *
+bit 1193 O 1 *
+bit 1192 I 1 IO_AH8
+bit 1191 O 1 IO_AH8 1190 1 Z
+bit 1190 C 1 *
+bit 1189 I 1 IO_AG8
+bit 1188 O 1 IO_AG8 1187 1 Z
+bit 1187 C 1 *
+bit 1186 I 1 IO_AF8
+bit 1185 O 1 IO_AF8 1184 1 Z
+bit 1184 C 1 *
+bit 1183 I 1 IO_AE8
+bit 1182 O 1 IO_AE8 1181 1 Z
+bit 1181 C 1 *
+bit 1180 O 1 *
+bit 1179 O 1 *
+bit 1178 O 1 *
+bit 1177 I 1 IO_AD8
+bit 1176 O 1 IO_AD8 1175 1 Z
+bit 1175 C 1 *
+bit 1174 I 1 IO_AC8
+bit 1173 O 1 IO_AC8 1172 1 Z
+bit 1172 C 1 *
+bit 1171 I 1 IO_AK7
+bit 1170 O 1 IO_AK7 1169 1 Z
+bit 1169 C 1 *
+bit 1168 I 1 IO_AJ7
+bit 1167 O 1 IO_AJ7 1166 1 Z
+bit 1166 C 1 *
+bit 1165 O 1 *
+bit 1164 O 1 *
+bit 1163 O 1 *
+bit 1162 I 1 IO_AH7
+bit 1161 O 1 IO_AH7 1160 1 Z
+bit 1160 C 1 *
+bit 1159 I 1 IO_AG7
+bit 1158 O 1 IO_AG7 1157 1 Z
+bit 1157 C 1 *
+bit 1156 I 1 IO_AE7
+bit 1155 O 1 IO_AE7 1154 1 Z
+bit 1154 C 1 *
+bit 1153 I 1 IO_AD7
+bit 1152 O 1 IO_AD7 1151 1 Z
+bit 1151 C 1 *
+bit 1150 I 1 IO_AE6
+bit 1149 O 1 IO_AE6 1148 1 Z
+bit 1148 C 1 *
+bit 1147 I 1 IO_AJ6
+bit 1146 O 1 IO_AJ6 1145 1 Z
+bit 1145 C 1 *
+bit 1144 I 1 IO_AH6
+bit 1143 O 1 IO_AH6 1142 1 Z
+bit 1142 C 1 *
+bit 1141 I 1 IO_AF6
+bit 1140 O 1 IO_AF6 1139 1 Z
+bit 1139 C 1 *
+bit 1138 I 1 IO_AG5
+bit 1137 O 1 IO_AG5 1136 1 Z
+bit 1136 C 1 *
+bit 1135 I 1 IO_AH4
+bit 1134 O 1 IO_AH4 1133 1 Z
+bit 1133 C 1 *
+bit 1132 I 1 IO_AK5
+bit 1131 O 1 IO_AK5 1130 1 Z
+bit 1130 C 1 *
+bit 1129 I 1 IO_AJ5
+bit 1128 O 1 IO_AJ5 1127 1 Z
+bit 1127 C 1 *
+bit 1126 I 1 IO_AK4
+bit 1125 O 1 IO_AK4 1124 1 Z
+bit 1124 C 1 *
+bit 1123 I 1 IO_AJ4
+bit 1122 O 1 IO_AJ4 1121 1 Z
+bit 1121 C 1 *
+bit 1120 I 1 M2_AK3
+bit 1119 I 1 M0_AJ3
+bit 1118 I 1 M1_AH3
+bit 1117 I 1 IO_AH2
+bit 1116 O 1 IO_AH2 1115 1 Z
+bit 1115 C 1 *
+bit 1114 I 1 IO_AH1
+bit 1113 O 1 IO_AH1 1112 1 Z
+bit 1112 C 1 *
+bit 1111 I 1 IO_AG4
+bit 1110 O 1 IO_AG4 1109 1 Z
+bit 1109 C 1 *
+bit 1108 I 1 IO_AG3
+bit 1107 O 1 IO_AG3 1106 1 Z
+bit 1106 C 1 *
+bit 1105 I 1 IO_AG2
+bit 1104 O 1 IO_AG2 1103 1 Z
+bit 1103 C 1 *
+bit 1102 I 1 IO_AG1
+bit 1101 O 1 IO_AG1 1100 1 Z
+bit 1100 C 1 *
+bit 1099 I 1 IO_AF2
+bit 1098 O 1 IO_AF2 1097 1 Z
+bit 1097 C 1 *
+bit 1096 I 1 IO_AF1
+bit 1095 O 1 IO_AF1 1094 1 Z
+bit 1094 C 1 *
+bit 1093 I 1 IO_AF4
+bit 1092 O 1 IO_AF4 1091 1 Z
+bit 1091 C 1 *
+bit 1090 I 1 IO_AE5
+bit 1089 O 1 IO_AE5 1088 1 Z
+bit 1088 C 1 *
+bit 1087 I 1 IO_AE3
+bit 1086 O 1 IO_AE3 1085 1 Z
+bit 1085 C 1 *
+bit 1084 I 1 IO_AE2
+bit 1083 O 1 IO_AE2 1082 1 Z
+bit 1082 C 1 *
+bit 1081 O 1 *
+bit 1080 O 1 *
+bit 1079 O 1 *
+bit 1078 O 1 *
+bit 1077 O 1 *
+bit 1076 O 1 *
+bit 1075 O 1 *
+bit 1074 O 1 *
+bit 1073 O 1 *
+bit 1072 O 1 *
+bit 1071 O 1 *
+bit 1070 O 1 *
+bit 1069 I 1 IO_AD4
+bit 1068 O 1 IO_AD4 1067 1 Z
+bit 1067 C 1 *
+bit 1066 I 1 IO_AD3
+bit 1065 O 1 IO_AD3 1064 1 Z
+bit 1064 C 1 *
+bit 1063 I 1 IO_AD2
+bit 1062 O 1 IO_AD2 1061 1 Z
+bit 1061 C 1 *
+bit 1060 I 1 IO_AD1
+bit 1059 O 1 IO_AD1 1058 1 Z
+bit 1058 C 1 *
+bit 1057 I 1 IO_AD6
+bit 1056 O 1 IO_AD6 1055 1 Z
+bit 1055 C 1 *
+bit 1054 I 1 IO_AC7
+bit 1053 O 1 IO_AC7 1052 1 Z
+bit 1052 C 1 *
+bit 1051 I 1 IO_AC6
+bit 1050 O 1 IO_AC6 1049 1 Z
+bit 1049 C 1 *
+bit 1048 I 1 IO_AC5
+bit 1047 O 1 IO_AC5 1046 1 Z
+bit 1046 C 1 *
+bit 1045 I 1 IO_AC4
+bit 1044 O 1 IO_AC4 1043 1 Z
+bit 1043 C 1 *
+bit 1042 I 1 IO_AC3
+bit 1041 O 1 IO_AC3 1040 1 Z
+bit 1040 C 1 *
+bit 1039 O 1 *
+bit 1038 O 1 *
+bit 1037 O 1 *
+bit 1036 I 1 IO_AB6
+bit 1035 O 1 IO_AB6 1034 1 Z
+bit 1034 C 1 *
+bit 1033 I 1 IO_AC2
+bit 1032 O 1 IO_AC2 1031 1 Z
+bit 1031 C 1 *
+bit 1030 I 1 IO_AC1
+bit 1029 O 1 IO_AC1 1028 1 Z
+bit 1028 C 1 *
+bit 1027 I 1 IO_AB5
+bit 1026 O 1 IO_AB5 1025 1 Z
+bit 1025 C 1 *
+bit 1024 I 1 IO_AB4
+bit 1023 O 1 IO_AB4 1022 1 Z
+bit 1022 C 1 *
+bit 1021 I 1 IO_AB2
+bit 1020 O 1 IO_AB2 1019 1 Z
+bit 1019 C 1 *
+bit 1018 I 1 IO_AB1
+bit 1017 O 1 IO_AB1 1016 1 Z
+bit 1016 C 1 *
+bit 1015 I 1 IO_AB8
+bit 1014 O 1 IO_AB8 1013 1 Z
+bit 1013 C 1 *
+bit 1012 I 1 IO_AA9
+bit 1011 O 1 IO_AA9 1010 1 Z
+bit 1010 C 1 *
+bit 1009 I 1 IO_AA7
+bit 1008 O 1 IO_AA7 1007 1 Z
+bit 1007 C 1 *
+bit 1006 I 1 IO_AA6
+bit 1005 O 1 IO_AA6 1004 1 Z
+bit 1004 C 1 *
+bit 1003 O 1 *
+bit 1002 O 1 *
+bit 1001 O 1 *
+bit 1000 O 1 *
+bit 999 O 1 *
+bit 998 O 1 *
+bit 997 I 1 IO_AA3
+bit 996 O 1 IO_AA3 995 1 Z
+bit 995 C 1 *
+bit 994 I 1 IO_AA2
+bit 993 O 1 IO_AA2 992 1 Z
+bit 992 C 1 *
+bit 991 I 1 IO_AA10
+bit 990 O 1 IO_AA10 989 1 Z
+bit 989 C 1 *
+bit 988 I 1 IO_Y10
+bit 987 O 1 IO_Y10 986 1 Z
+bit 986 C 1 *
+bit 985 I 1 IO_Y8
+bit 984 O 1 IO_Y8 983 1 Z
+bit 983 C 1 *
+bit 982 I 1 IO_Y7
+bit 981 O 1 IO_Y7 980 1 Z
+bit 980 C 1 *
+bit 979 I 1 IO_Y6
+bit 978 O 1 IO_Y6 977 1 Z
+bit 977 C 1 *
+bit 976 I 1 IO_Y5
+bit 975 O 1 IO_Y5 974 1 Z
+bit 974 C 1 *
+bit 973 I 1 IO_Y4
+bit 972 O 1 IO_Y4 971 1 Z
+bit 971 C 1 *
+bit 970 I 1 IO_Y3
+bit 969 O 1 IO_Y3 968 1 Z
+bit 968 C 1 *
+bit 967 O 1 *
+bit 966 O 1 *
+bit 965 O 1 *
+bit 964 O 1 *
+bit 963 O 1 *
+bit 962 O 1 *
+bit 961 I 1 IO_Y2
+bit 960 O 1 IO_Y2 959 1 Z
+bit 959 C 1 *
+bit 958 I 1 IO_Y1
+bit 957 O 1 IO_Y1 956 1 Z
+bit 956 C 1 *
+bit 955 I 1 IO_W9
+bit 954 O 1 IO_W9 953 1 Z
+bit 953 C 1 *
+bit 952 I 1 IO_W8
+bit 951 O 1 IO_W8 950 1 Z
+bit 950 C 1 *
+bit 949 I 1 IO_W7
+bit 948 O 1 IO_W7 947 1 Z
+bit 947 C 1 *
+bit 946 I 1 IO_W6
+bit 945 O 1 IO_W6 944 1 Z
+bit 944 C 1 *
+bit 943 I 1 IO_W4
+bit 942 O 1 IO_W4 941 1 Z
+bit 941 C 1 *
+bit 940 I 1 IO_W3
+bit 939 O 1 IO_W3 938 1 Z
+bit 938 C 1 *
+bit 937 O 1 *
+bit 936 O 1 *
+bit 935 O 1 *
+bit 934 O 1 *
+bit 933 O 1 *
+bit 932 O 1 *
+bit 931 I 1 IO_W2
+bit 930 O 1 IO_W2 929 1 Z
+bit 929 C 1 *
+bit 928 I 1 IO_W1
+bit 927 O 1 IO_W1 926 1 Z
+bit 926 C 1 *
+bit 925 I 1 IO_W10
+bit 924 O 1 IO_W10 923 1 Z
+bit 923 C 1 *
+bit 922 I 1 IO_V10
+bit 921 O 1 IO_V10 920 1 Z
+bit 920 C 1 *
+bit 919 I 1 IO_V9
+bit 918 O 1 IO_V9 917 1 Z
+bit 917 C 1 *
+bit 916 I 1 IO_V8
+bit 915 O 1 IO_V8 914 1 Z
+bit 914 C 1 *
+bit 913 I 1 IO_W5
+bit 912 O 1 IO_W5 911 1 Z
+bit 911 C 1 *
+bit 910 I 1 IO_V6
+bit 909 O 1 IO_V6 908 1 Z
+bit 908 C 1 *
+bit 907 I 1 IO_V5
+bit 906 O 1 IO_V5 905 1 Z
+bit 905 C 1 *
+bit 904 I 1 IO_V4
+bit 903 O 1 IO_V4 902 1 Z
+bit 902 C 1 *
+bit 901 O 1 *
+bit 900 O 1 *
+bit 899 O 1 *
+bit 898 O 1 *
+bit 897 O 1 *
+bit 896 O 1 *
+bit 895 I 1 IO_V2
+bit 894 O 1 IO_V2 893 1 Z
+bit 893 C 1 *
+bit 892 I 1 IO_V1
+bit 891 O 1 IO_V1 890 1 Z
+bit 890 C 1 *
+bit 889 I 1 IO_U10
+bit 888 O 1 IO_U10 887 1 Z
+bit 887 C 1 *
+bit 886 I 1 IO_U9
+bit 885 O 1 IO_U9 884 1 Z
+bit 884 C 1 *
+bit 883 I 1 IO_U7
+bit 882 O 1 IO_U7 881 1 Z
+bit 881 C 1 *
+bit 880 I 1 IO_U6
+bit 879 O 1 IO_U6 878 1 Z
+bit 878 C 1 *
+bit 877 I 1 IO_U3
+bit 876 O 1 IO_U3 875 1 Z
+bit 875 C 1 *
+bit 874 I 1 IO_U2
+bit 873 O 1 IO_U2 872 1 Z
+bit 872 C 1 *
+bit 871 I 1 IO_T10
+bit 870 O 1 IO_T10 869 1 Z
+bit 869 C 1 *
+bit 868 I 1 IO_T9
+bit 867 O 1 IO_T9 866 1 Z
+bit 866 C 1 *
+bit 865 O 1 *
+bit 864 O 1 *
+bit 863 O 1 *
+bit 862 O 1 *
+bit 861 O 1 *
+bit 860 O 1 *
+bit 859 O 1 *
+bit 858 O 1 *
+bit 857 O 1 *
+bit 856 O 1 *
+bit 855 O 1 *
+bit 854 O 1 *
+bit 853 I 1 IO_T8
+bit 852 O 1 IO_T8 851 1 Z
+bit 851 C 1 *
+bit 850 I 1 IO_T7
+bit 849 O 1 IO_T7 848 1 Z
+bit 848 C 1 *
+bit 847 I 1 IO_T6
+bit 846 O 1 IO_T6 845 1 Z
+bit 845 C 1 *
+bit 844 I 1 IO_T5
+bit 843 O 1 IO_T5 842 1 Z
+bit 842 C 1 *
+bit 841 I 1 IO_T4
+bit 840 O 1 IO_T4 839 1 Z
+bit 839 C 1 *
+bit 838 I 1 IO_T3
+bit 837 O 1 IO_T3 836 1 Z
+bit 836 C 1 *
+bit 835 I 1 IO_T2
+bit 834 O 1 IO_T2 833 1 Z
+bit 833 C 1 *
+bit 832 I 1 IO_T1
+bit 831 O 1 IO_T1 830 1 Z
+bit 830 C 1 *
+bit 829 I 1 IO_R1
+bit 828 O 1 IO_R1 827 1 Z
+bit 827 C 1 *
+bit 826 I 1 IO_R2
+bit 825 O 1 IO_R2 824 1 Z
+bit 824 C 1 *
+bit 823 I 1 IO_R3
+bit 822 O 1 IO_R3 821 1 Z
+bit 821 C 1 *
+bit 820 I 1 IO_R4
+bit 819 O 1 IO_R4 818 1 Z
+bit 818 C 1 *
+bit 817 I 1 IO_R5
+bit 816 O 1 IO_R5 815 1 Z
+bit 815 C 1 *
+bit 814 I 1 IO_R6
+bit 813 O 1 IO_R6 812 1 Z
+bit 812 C 1 *
+bit 811 I 1 IO_R7
+bit 810 O 1 IO_R7 809 1 Z
+bit 809 C 1 *
+bit 808 I 1 IO_R8
+bit 807 O 1 IO_R8 806 1 Z
+bit 806 C 1 *
+bit 805 O 1 *
+bit 804 O 1 *
+bit 803 O 1 *
+bit 802 O 1 *
+bit 801 O 1 *
+bit 800 O 1 *
+bit 799 O 1 *
+bit 798 O 1 *
+bit 797 O 1 *
+bit 796 O 1 *
+bit 795 O 1 *
+bit 794 O 1 *
+bit 793 I 1 IO_R9
+bit 792 O 1 IO_R9 791 1 Z
+bit 791 C 1 *
+bit 790 I 1 IO_R10
+bit 789 O 1 IO_R10 788 1 Z
+bit 788 C 1 *
+bit 787 I 1 IO_P2
+bit 786 O 1 IO_P2 785 1 Z
+bit 785 C 1 *
+bit 784 I 1 IO_P3
+bit 783 O 1 IO_P3 782 1 Z
+bit 782 C 1 *
+bit 781 I 1 IO_P6
+bit 780 O 1 IO_P6 779 1 Z
+bit 779 C 1 *
+bit 778 I 1 IO_P7
+bit 777 O 1 IO_P7 776 1 Z
+bit 776 C 1 *
+bit 775 I 1 IO_P9
+bit 774 O 1 IO_P9 773 1 Z
+bit 773 C 1 *
+bit 772 I 1 IO_P10
+bit 771 O 1 IO_P10 770 1 Z
+bit 770 C 1 *
+bit 769 I 1 IO_N1
+bit 768 O 1 IO_N1 767 1 Z
+bit 767 C 1 *
+bit 766 I 1 IO_N2
+bit 765 O 1 IO_N2 764 1 Z
+bit 764 C 1 *
+bit 763 O 1 *
+bit 762 O 1 *
+bit 761 O 1 *
+bit 760 O 1 *
+bit 759 O 1 *
+bit 758 O 1 *
+bit 757 I 1 IO_N4
+bit 756 O 1 IO_N4 755 1 Z
+bit 755 C 1 *
+bit 754 I 1 IO_N5
+bit 753 O 1 IO_N5 752 1 Z
+bit 752 C 1 *
+bit 751 I 1 IO_N6
+bit 750 O 1 IO_N6 749 1 Z
+bit 749 C 1 *
+bit 748 I 1 IO_M5
+bit 747 O 1 IO_M5 746 1 Z
+bit 746 C 1 *
+bit 745 I 1 IO_N8
+bit 744 O 1 IO_N8 743 1 Z
+bit 743 C 1 *
+bit 742 I 1 IO_N9
+bit 741 O 1 IO_N9 740 1 Z
+bit 740 C 1 *
+bit 739 I 1 IO_N10
+bit 738 O 1 IO_N10 737 1 Z
+bit 737 C 1 *
+bit 736 I 1 IO_M10
+bit 735 O 1 IO_M10 734 1 Z
+bit 734 C 1 *
+bit 733 I 1 IO_M1
+bit 732 O 1 IO_M1 731 1 Z
+bit 731 C 1 *
+bit 730 I 1 IO_M2
+bit 729 O 1 IO_M2 728 1 Z
+bit 728 C 1 *
+bit 727 O 1 *
+bit 726 O 1 *
+bit 725 O 1 *
+bit 724 O 1 *
+bit 723 O 1 *
+bit 722 O 1 *
+bit 721 I 1 IO_M3
+bit 720 O 1 IO_M3 719 1 Z
+bit 719 C 1 *
+bit 718 I 1 IO_M4
+bit 717 O 1 IO_M4 716 1 Z
+bit 716 C 1 *
+bit 715 I 1 IO_M6
+bit 714 O 1 IO_M6 713 1 Z
+bit 713 C 1 *
+bit 712 I 1 IO_M7
+bit 711 O 1 IO_M7 710 1 Z
+bit 710 C 1 *
+bit 709 I 1 IO_M8
+bit 708 O 1 IO_M8 707 1 Z
+bit 707 C 1 *
+bit 706 I 1 IO_M9
+bit 705 O 1 IO_M9 704 1 Z
+bit 704 C 1 *
+bit 703 I 1 IO_L1
+bit 702 O 1 IO_L1 701 1 Z
+bit 701 C 1 *
+bit 700 I 1 IO_L2
+bit 699 O 1 IO_L2 698 1 Z
+bit 698 C 1 *
+bit 697 O 1 *
+bit 696 O 1 *
+bit 695 O 1 *
+bit 694 O 1 *
+bit 693 O 1 *
+bit 692 O 1 *
+bit 691 I 1 IO_L3
+bit 690 O 1 IO_L3 689 1 Z
+bit 689 C 1 *
+bit 688 I 1 IO_L4
+bit 687 O 1 IO_L4 686 1 Z
+bit 686 C 1 *
+bit 685 I 1 IO_L5
+bit 684 O 1 IO_L5 683 1 Z
+bit 683 C 1 *
+bit 682 I 1 IO_L6
+bit 681 O 1 IO_L6 680 1 Z
+bit 680 C 1 *
+bit 679 I 1 IO_L7
+bit 678 O 1 IO_L7 677 1 Z
+bit 677 C 1 *
+bit 676 I 1 IO_L8
+bit 675 O 1 IO_L8 674 1 Z
+bit 674 C 1 *
+bit 673 I 1 IO_L10
+bit 672 O 1 IO_L10 671 1 Z
+bit 671 C 1 *
+bit 670 I 1 IO_K10
+bit 669 O 1 IO_K10 668 1 Z
+bit 668 C 1 *
+bit 667 I 1 IO_K2
+bit 666 O 1 IO_K2 665 1 Z
+bit 665 C 1 *
+bit 664 I 1 IO_K3
+bit 663 O 1 IO_K3 662 1 Z
+bit 662 C 1 *
+bit 661 O 1 *
+bit 660 O 1 *
+bit 659 O 1 *
+bit 658 O 1 *
+bit 657 O 1 *
+bit 656 O 1 *
+bit 655 I 1 IO_K6
+bit 654 O 1 IO_K6 653 1 Z
+bit 653 C 1 *
+bit 652 I 1 IO_K7
+bit 651 O 1 IO_K7 650 1 Z
+bit 650 C 1 *
+bit 649 I 1 IO_K9
+bit 648 O 1 IO_K9 647 1 Z
+bit 647 C 1 *
+bit 646 I 1 IO_J8
+bit 645 O 1 IO_J8 644 1 Z
+bit 644 C 1 *
+bit 643 I 1 IO_J1
+bit 642 O 1 IO_J1 641 1 Z
+bit 641 C 1 *
+bit 640 I 1 IO_J2
+bit 639 O 1 IO_J2 638 1 Z
+bit 638 C 1 *
+bit 637 I 1 IO_J4
+bit 636 O 1 IO_J4 635 1 Z
+bit 635 C 1 *
+bit 634 I 1 IO_J5
+bit 633 O 1 IO_J5 632 1 Z
+bit 632 C 1 *
+bit 631 I 1 IO_H1
+bit 630 O 1 IO_H1 629 1 Z
+bit 629 C 1 *
+bit 628 I 1 IO_H2
+bit 627 O 1 IO_H2 626 1 Z
+bit 626 C 1 *
+bit 625 I 1 IO_J6
+bit 624 O 1 IO_J6 623 1 Z
+bit 623 C 1 *
+bit 622 O 1 *
+bit 621 O 1 *
+bit 620 O 1 *
+bit 619 I 1 IO_H3
+bit 618 O 1 IO_H3 617 1 Z
+bit 617 C 1 *
+bit 616 I 1 IO_H4
+bit 615 O 1 IO_H4 614 1 Z
+bit 614 C 1 *
+bit 613 I 1 IO_H5
+bit 612 O 1 IO_H5 611 1 Z
+bit 611 C 1 *
+bit 610 I 1 IO_H6
+bit 609 O 1 IO_H6 608 1 Z
+bit 608 C 1 *
+bit 607 I 1 IO_H7
+bit 606 O 1 IO_H7 605 1 Z
+bit 605 C 1 *
+bit 604 I 1 IO_G6
+bit 603 O 1 IO_G6 602 1 Z
+bit 602 C 1 *
+bit 601 I 1 IO_G1
+bit 600 O 1 IO_G1 599 1 Z
+bit 599 C 1 *
+bit 598 I 1 IO_G2
+bit 597 O 1 IO_G2 596 1 Z
+bit 596 C 1 *
+bit 595 I 1 IO_G3
+bit 594 O 1 IO_G3 593 1 Z
+bit 593 C 1 *
+bit 592 I 1 IO_G4
+bit 591 O 1 IO_G4 590 1 Z
+bit 590 C 1 *
+bit 589 O 1 *
+bit 588 O 1 *
+bit 587 O 1 *
+bit 586 O 1 *
+bit 585 O 1 *
+bit 584 O 1 *
+bit 583 O 1 *
+bit 582 O 1 *
+bit 581 O 1 *
+bit 580 O 1 *
+bit 579 O 1 *
+bit 578 O 1 *
+bit 577 I 1 IO_F2
+bit 576 O 1 IO_F2 575 1 Z
+bit 575 C 1 *
+bit 574 I 1 IO_F3
+bit 573 O 1 IO_F3 572 1 Z
+bit 572 C 1 *
+bit 571 I 1 IO_F5
+bit 570 O 1 IO_F5 569 1 Z
+bit 569 C 1 *
+bit 568 I 1 IO_E4
+bit 567 O 1 IO_E4 566 1 Z
+bit 566 C 1 *
+bit 565 I 1 IO_E1
+bit 564 O 1 IO_E1 563 1 Z
+bit 563 C 1 *
+bit 562 I 1 IO_E2
+bit 561 O 1 IO_E2 560 1 Z
+bit 560 C 1 *
+bit 559 I 1 IO_D1
+bit 558 O 1 IO_D1 557 1 Z
+bit 557 C 1 *
+bit 556 I 1 IO_D2
+bit 555 O 1 IO_D2 554 1 Z
+bit 554 C 1 *
+bit 553 I 1 IO_D3
+bit 552 O 1 IO_D3 551 1 Z
+bit 551 C 1 *
+bit 550 I 1 IO_D4
+bit 549 O 1 IO_D4 548 1 Z
+bit 548 C 1 *
+bit 547 I 1 IO_C1
+bit 546 O 1 IO_C1 545 1 Z
+bit 545 C 1 *
+bit 544 I 1 IO_C2
+bit 543 O 1 IO_C2 542 1 Z
+bit 542 C 1 *
+bit 541 O 1 *
+bit 540 I 1 HSWAP_EN_A3
+bit 539 I 1 IO_C4
+bit 538 O 1 IO_C4 537 1 Z
+bit 537 C 1 *
+bit 536 I 1 IO_B4
+bit 535 O 1 IO_B4 534 1 Z
+bit 534 C 1 *
+bit 533 I 1 IO_A4
+bit 532 O 1 IO_A4 531 1 Z
+bit 531 C 1 *
+bit 530 I 1 IO_B5
+bit 529 O 1 IO_B5 528 1 Z
+bit 528 C 1 *
+bit 527 I 1 IO_A5
+bit 526 O 1 IO_A5 525 1 Z
+bit 525 C 1 *
+bit 524 O 1 *
+bit 523 O 1 *
+bit 522 O 1 *
+bit 521 I 1 IO_D5
+bit 520 O 1 IO_D5 519 1 Z
+bit 519 C 1 *
+bit 518 I 1 IO_E6
+bit 517 O 1 IO_E6 516 1 Z
+bit 516 C 1 *
+bit 515 I 1 IO_C6
+bit 514 O 1 IO_C6 513 1 Z
+bit 513 C 1 *
+bit 512 I 1 IO_B6
+bit 511 O 1 IO_B6 510 1 Z
+bit 510 C 1 *
+bit 509 O 1 *
+bit 508 O 1 *
+bit 507 O 1 *
+bit 506 I 1 IO_F6
+bit 505 O 1 IO_F6 504 1 Z
+bit 504 C 1 *
+bit 503 I 1 IO_F7
+bit 502 O 1 IO_F7 501 1 Z
+bit 501 C 1 *
+bit 500 I 1 IO_D7
+bit 499 O 1 IO_D7 498 1 Z
+bit 498 C 1 *
+bit 497 I 1 IO_C7
+bit 496 O 1 IO_C7 495 1 Z
+bit 495 C 1 *
+bit 494 O 1 *
+bit 493 O 1 *
+bit 492 O 1 *
+bit 491 I 1 IO_B7
+bit 490 O 1 IO_B7 489 1 Z
+bit 489 C 1 *
+bit 488 I 1 IO_A7
+bit 487 O 1 IO_A7 486 1 Z
+bit 486 C 1 *
+bit 485 I 1 IO_G7
+bit 484 O 1 IO_G7 483 1 Z
+bit 483 C 1 *
+bit 482 I 1 IO_H8
+bit 481 O 1 IO_H8 480 1 Z
+bit 480 C 1 *
+bit 479 I 1 IO_G8
+bit 478 O 1 IO_G8 477 1 Z
+bit 477 C 1 *
+bit 476 I 1 IO_F8
+bit 475 O 1 IO_F8 474 1 Z
+bit 474 C 1 *
+bit 473 I 1 IO_E8
+bit 472 O 1 IO_E8 471 1 Z
+bit 471 C 1 *
+bit 470 I 1 IO_D8
+bit 469 O 1 IO_D8 468 1 Z
+bit 468 C 1 *
+bit 467 I 1 IO_C8
+bit 466 O 1 IO_C8 465 1 Z
+bit 465 C 1 *
+bit 464 O 1 *
+bit 463 O 1 *
+bit 462 O 1 *
+bit 461 I 1 IO_B8
+bit 460 O 1 IO_B8 459 1 Z
+bit 459 C 1 *
+bit 458 I 1 IO_A8
+bit 457 O 1 IO_A8 456 1 Z
+bit 456 C 1 *
+bit 455 I 1 IO_J9
+bit 454 O 1 IO_J9 453 1 Z
+bit 453 C 1 *
+bit 452 I 1 IO_H9
+bit 451 O 1 IO_H9 450 1 Z
+bit 450 C 1 *
+bit 449 I 1 IO_F9
+bit 448 O 1 IO_F9 447 1 Z
+bit 447 C 1 *
+bit 446 I 1 IO_E9
+bit 445 O 1 IO_E9 444 1 Z
+bit 444 C 1 *
+bit 443 I 1 IO_D9
+bit 442 O 1 IO_D9 441 1 Z
+bit 441 C 1 *
+bit 440 I 1 IO_B9
+bit 439 O 1 IO_B9 438 1 Z
+bit 438 C 1 *
+bit 437 I 1 IO_A9
+bit 436 O 1 IO_A9 435 1 Z
+bit 435 C 1 *
+bit 434 O 1 *
+bit 433 O 1 *
+bit 432 O 1 *
+bit 431 I 1 IO_G10
+bit 430 O 1 IO_G10 429 1 Z
+bit 429 C 1 *
+bit 428 I 1 IO_F10
+bit 427 O 1 IO_F10 426 1 Z
+bit 426 C 1 *
+bit 425 I 1 IO_C10
+bit 424 O 1 IO_C10 423 1 Z
+bit 423 C 1 *
+bit 422 I 1 IO_B10
+bit 421 O 1 IO_B10 420 1 Z
+bit 420 C 1 *
+bit 419 O 1 *
+bit 418 O 1 *
+bit 417 O 1 *
+bit 416 I 1 IO_J10
+bit 415 O 1 IO_J10 414 1 Z
+bit 414 C 1 *
+bit 413 I 1 IO_K11
+bit 412 O 1 IO_K11 411 1 Z
+bit 411 C 1 *
+bit 410 I 1 IO_H11
+bit 409 O 1 IO_H11 408 1 Z
+bit 408 C 1 *
+bit 407 I 1 IO_G11
+bit 406 O 1 IO_G11 405 1 Z
+bit 405 C 1 *
+bit 404 O 1 *
+bit 403 O 1 *
+bit 402 O 1 *
+bit 401 I 1 IO_F11
+bit 400 O 1 IO_F11 399 1 Z
+bit 399 C 1 *
+bit 398 I 1 IO_E11
+bit 397 O 1 IO_E11 396 1 Z
+bit 396 C 1 *
+bit 395 I 1 IO_D11
+bit 394 O 1 IO_D11 393 1 Z
+bit 393 C 1 *
+bit 392 I 1 IO_C11
+bit 391 O 1 IO_C11 390 1 Z
+bit 390 C 1 *
+bit 389 O 1 *
+bit 388 O 1 *
+bit 387 O 1 *
+bit 386 I 1 IO_B11
+bit 385 O 1 IO_B11 384 1 Z
+bit 384 C 1 *
+bit 383 I 1 IO_A11
+bit 382 O 1 IO_A11 381 1 Z
+bit 381 C 1 *
+bit 380 I 1 IO_K12
+bit 379 O 1 IO_K12 378 1 Z
+bit 378 C 1 *
+bit 377 I 1 IO_J12
+bit 376 O 1 IO_J12 375 1 Z
+bit 375 C 1 *
+bit 374 O 1 *
+bit 373 O 1 *
+bit 372 O 1 *
+bit 371 I 1 IO_H12
+bit 370 O 1 IO_H12 369 1 Z
+bit 369 C 1 *
+bit 368 I 1 IO_G12
+bit 367 O 1 IO_G12 366 1 Z
+bit 366 C 1 *
+bit 365 I 1 IO_F12
+bit 364 O 1 IO_F12 363 1 Z
+bit 363 C 1 *
+bit 362 I 1 IO_E12
+bit 361 O 1 IO_E12 360 1 Z
+bit 360 C 1 *
+bit 359 O 1 *
+bit 358 O 1 *
+bit 357 O 1 *
+bit 356 I 1 IO_D12
+bit 355 O 1 IO_D12 354 1 Z
+bit 354 C 1 *
+bit 353 I 1 IO_C12
+bit 352 O 1 IO_C12 351 1 Z
+bit 351 C 1 *
+bit 350 I 1 IO_B12
+bit 349 O 1 IO_B12 348 1 Z
+bit 348 C 1 *
+bit 347 I 1 IO_A12
+bit 346 O 1 IO_A12 345 1 Z
+bit 345 C 1 *
+bit 344 I 1 IO_K13
+bit 343 O 1 IO_K13 342 1 Z
+bit 342 C 1 *
+bit 341 I 1 IO_J13
+bit 340 O 1 IO_J13 339 1 Z
+bit 339 C 1 *
+bit 338 I 1 IO_H13
+bit 337 O 1 IO_H13 336 1 Z
+bit 336 C 1 *
+bit 335 I 1 IO_F13
+bit 334 O 1 IO_F13 333 1 Z
+bit 333 C 1 *
+bit 332 I 1 IO_E13
+bit 331 O 1 IO_E13 330 1 Z
+bit 330 C 1 *
+bit 329 I 1 IO_D13
+bit 328 O 1 IO_D13 327 1 Z
+bit 327 C 1 *
+bit 326 I 1 IO_B13
+bit 325 O 1 IO_B13 324 1 Z
+bit 324 C 1 *
+bit 323 I 1 IO_A13
+bit 322 O 1 IO_A13 321 1 Z
+bit 321 C 1 *
+bit 320 I 1 IO_K14
+bit 319 O 1 IO_K14 318 1 Z
+bit 318 C 1 *
+bit 317 I 1 IO_J14
+bit 316 O 1 IO_J14 315 1 Z
+bit 315 C 1 *
+bit 314 I 1 IO_K15
+bit 313 O 1 IO_K15 312 1 Z
+bit 312 C 1 *
+bit 311 I 1 IO_G14
+bit 310 O 1 IO_G14 309 1 Z
+bit 309 C 1 *
+bit 308 I 1 IO_F14
+bit 307 O 1 IO_F14 306 1 Z
+bit 306 C 1 *
+bit 305 I 1 IO_C14
+bit 304 O 1 IO_C14 303 1 Z
+bit 303 C 1 *
+bit 302 I 1 IO_B14
+bit 301 O 1 IO_B14 300 1 Z
+bit 300 C 1 *
+bit 299 O 1 *
+bit 298 O 1 *
+bit 297 O 1 *
+bit 296 I 1 IO_J15
+bit 295 O 1 IO_J15 294 1 Z
+bit 294 C 1 *
+bit 293 I 1 IO_H15
+bit 292 O 1 IO_H15 291 1 Z
+bit 291 C 1 *
+bit 290 I 1 IO_G15
+bit 289 O 1 IO_G15 288 1 Z
+bit 288 C 1 *
+bit 287 I 1 IO_F15
+bit 286 O 1 IO_F15 285 1 Z
+bit 285 C 1 *
+bit 284 I 1 IO_E15
+bit 283 O 1 IO_E15 282 1 Z
+bit 282 C 1 *
+bit 281 I 1 IO_D15
+bit 280 O 1 IO_D15 279 1 Z
+bit 279 C 1 *
+bit 278 I 1 IO_C15
+bit 277 O 1 IO_C15 276 1 Z
+bit 276 C 1 *
+bit 275 I 1 IO_B15
+bit 274 O 1 IO_B15 273 1 Z
+bit 273 C 1 *
+bit 272 I 1 IO_A15
+bit 271 O 1 IO_A15 270 1 Z
+bit 270 C 1 *
+bit 269 I 1 IO_A16
+bit 268 O 1 IO_A16 267 1 Z
+bit 267 C 1 *
+bit 266 I 1 IO_B16
+bit 265 O 1 IO_B16 264 1 Z
+bit 264 C 1 *
+bit 263 I 1 IO_C16
+bit 262 O 1 IO_C16 261 1 Z
+bit 261 C 1 *
+bit 260 I 1 IO_D16
+bit 259 O 1 IO_D16 258 1 Z
+bit 258 C 1 *
+bit 257 I 1 IO_E16
+bit 256 O 1 IO_E16 255 1 Z
+bit 255 C 1 *
+bit 254 I 1 IO_F16
+bit 253 O 1 IO_F16 252 1 Z
+bit 252 C 1 *
+bit 251 I 1 IO_G16
+bit 250 O 1 IO_G16 249 1 Z
+bit 249 C 1 *
+bit 248 I 1 IO_H16
+bit 247 O 1 IO_H16 246 1 Z
+bit 246 C 1 *
+bit 245 I 1 IO_J16
+bit 244 O 1 IO_J16 243 1 Z
+bit 243 C 1 *
+bit 242 I 1 IO_K16
+bit 241 O 1 IO_K16 240 1 Z
+bit 240 C 1 *
+bit 239 I 1 IO_J17
+bit 238 O 1 IO_J17 237 1 Z
+bit 237 C 1 *
+bit 236 I 1 IO_B17
+bit 235 O 1 IO_B17 234 1 Z
+bit 234 C 1 *
+bit 233 I 1 IO_C17
+bit 232 O 1 IO_C17 231 1 Z
+bit 231 C 1 *
+bit 230 I 1 IO_F17
+bit 229 O 1 IO_F17 228 1 Z
+bit 228 C 1 *
+bit 227 I 1 IO_G17
+bit 226 O 1 IO_G17 225 1 Z
+bit 225 C 1 *
+bit 224 O 1 *
+bit 223 O 1 *
+bit 222 O 1 *
+bit 221 I 1 IO_K17
+bit 220 O 1 IO_K17 219 1 Z
+bit 219 C 1 *
+bit 218 I 1 IO_K18
+bit 217 O 1 IO_K18 216 1 Z
+bit 216 C 1 *
+bit 215 I 1 IO_A18
+bit 214 O 1 IO_A18 213 1 Z
+bit 213 C 1 *
+bit 212 I 1 IO_B18
+bit 211 O 1 IO_B18 210 1 Z
+bit 210 C 1 *
+bit 209 O 1 *
+bit 208 O 1 *
+bit 207 O 1 *
+bit 206 I 1 IO_D18
+bit 205 O 1 IO_D18 204 1 Z
+bit 204 C 1 *
+bit 203 I 1 IO_E18
+bit 202 O 1 IO_E18 201 1 Z
+bit 201 C 1 *
+bit 200 I 1 IO_H18
+bit 199 O 1 IO_H18 198 1 Z
+bit 198 C 1 *
+bit 197 I 1 IO_J18
+bit 196 O 1 IO_J18 195 1 Z
+bit 195 C 1 *
+bit 194 I 1 IO_F18
+bit 193 O 1 IO_F18 192 1 Z
+bit 192 C 1 *
+bit 191 I 1 IO_A19
+bit 190 O 1 IO_A19 189 1 Z
+bit 189 C 1 *
+bit 188 I 1 IO_B19
+bit 187 O 1 IO_B19 186 1 Z
+bit 186 C 1 *
+bit 185 I 1 IO_C19
+bit 184 O 1 IO_C19 183 1 Z
+bit 183 C 1 *
+bit 182 I 1 IO_D19
+bit 181 O 1 IO_D19 180 1 Z
+bit 180 C 1 *
+bit 179 O 1 *
+bit 178 O 1 *
+bit 177 O 1 *
+bit 176 I 1 IO_E19
+bit 175 O 1 IO_E19 174 1 Z
+bit 174 C 1 *
+bit 173 I 1 IO_F19
+bit 172 O 1 IO_F19 171 1 Z
+bit 171 C 1 *
+bit 170 I 1 IO_G19
+bit 169 O 1 IO_G19 168 1 Z
+bit 168 C 1 *
+bit 167 I 1 IO_H19
+bit 166 O 1 IO_H19 165 1 Z
+bit 165 C 1 *
+bit 164 O 1 *
+bit 163 O 1 *
+bit 162 O 1 *
+bit 161 I 1 IO_J19
+bit 160 O 1 IO_J19 159 1 Z
+bit 159 C 1 *
+bit 158 I 1 IO_K19
+bit 157 O 1 IO_K19 156 1 Z
+bit 156 C 1 *
+bit 155 I 1 IO_A20
+bit 154 O 1 IO_A20 153 1 Z
+bit 153 C 1 *
+bit 152 I 1 IO_B20
+bit 151 O 1 IO_B20 150 1 Z
+bit 150 C 1 *
+bit 149 O 1 *
+bit 148 O 1 *
+bit 147 O 1 *
+bit 146 I 1 IO_C20
+bit 145 O 1 IO_C20 144 1 Z
+bit 144 C 1 *
+bit 143 I 1 IO_D20
+bit 142 O 1 IO_D20 141 1 Z
+bit 141 C 1 *
+bit 140 I 1 IO_E20
+bit 139 O 1 IO_E20 138 1 Z
+bit 138 C 1 *
+bit 137 I 1 IO_F20
+bit 136 O 1 IO_F20 135 1 Z
+bit 135 C 1 *
+bit 134 O 1 *
+bit 133 O 1 *
+bit 132 O 1 *
+bit 131 I 1 IO_G20
+bit 130 O 1 IO_G20 129 1 Z
+bit 129 C 1 *
+bit 128 I 1 IO_H20
+bit 127 O 1 IO_H20 126 1 Z
+bit 126 C 1 *
+bit 125 I 1 IO_B21
+bit 124 O 1 IO_B21 123 1 Z
+bit 123 C 1 *
+bit 122 I 1 IO_C21
+bit 121 O 1 IO_C21 120 1 Z
+bit 120 C 1 *
+bit 119 I 1 IO_K20
+bit 118 O 1 IO_K20 117 1 Z
+bit 117 C 1 *
+bit 116 I 1 IO_F21
+bit 115 O 1 IO_F21 114 1 Z
+bit 114 C 1 *
+bit 113 I 1 IO_G21
+bit 112 O 1 IO_G21 111 1 Z
+bit 111 C 1 *
+bit 110 I 1 IO_A22
+bit 109 O 1 IO_A22 108 1 Z
+bit 108 C 1 *
+bit 107 I 1 IO_B22
+bit 106 O 1 IO_B22 105 1 Z
+bit 105 C 1 *
+bit 104 I 1 IO_J21
+bit 103 O 1 IO_J21 102 1 Z
+bit 102 C 1 *
+bit 101 I 1 IO_D22
+bit 100 O 1 IO_D22 99 1 Z
+bit 99 C 1 *
+bit 98 I 1 IO_E22
+bit 97 O 1 IO_E22 96 1 Z
+bit 96 C 1 *
+bit 95 I 1 IO_F22
+bit 94 O 1 IO_F22 93 1 Z
+bit 93 C 1 *
+bit 92 I 1 IO_E23
+bit 91 O 1 IO_E23 90 1 Z
+bit 90 C 1 *
+bit 89 O 1 *
+bit 88 O 1 *
+bit 87 O 1 *
+bit 86 I 1 IO_H22
+bit 85 O 1 IO_H22 84 1 Z
+bit 84 C 1 *
+bit 83 I 1 IO_J22
+bit 82 O 1 IO_J22 81 1 Z
+bit 81 C 1 *
+bit 80 I 1 IO_A23
+bit 79 O 1 IO_A23 78 1 Z
+bit 78 C 1 *
+bit 77 I 1 IO_B23
+bit 76 O 1 IO_B23 75 1 Z
+bit 75 C 1 *
+bit 74 O 1 *
+bit 73 O 1 *
+bit 72 O 1 *
+bit 71 I 1 IO_C23
+bit 70 O 1 IO_C23 69 1 Z
+bit 69 C 1 *
+bit 68 I 1 IO_D23
+bit 67 O 1 IO_D23 66 1 Z
+bit 66 C 1 *
+bit 65 I 1 IO_F23
+bit 64 O 1 IO_F23 63 1 Z
+bit 63 C 1 *
+bit 62 I 1 IO_G23
+bit 61 O 1 IO_G23 60 1 Z
+bit 60 C 1 *
+bit 59 O 1 *
+bit 58 O 1 *
+bit 57 O 1 *
+bit 56 I 1 IO_H23
+bit 55 O 1 IO_H23 54 1 Z
+bit 54 C 1 *
+bit 53 I 1 IO_G24
+bit 52 O 1 IO_G24 51 1 Z
+bit 51 C 1 *
+bit 50 I 1 IO_A24
+bit 49 O 1 IO_A24 48 1 Z
+bit 48 C 1 *
+bit 47 I 1 IO_B24
+bit 46 O 1 IO_B24 45 1 Z
+bit 45 C 1 *
+bit 44 O 1 *
+bit 43 O 1 *
+bit 42 O 1 *
+bit 41 I 1 IO_C24
+bit 40 O 1 IO_C24 39 1 Z
+bit 39 C 1 *
+bit 38 I 1 IO_D24
+bit 37 O 1 IO_D24 36 1 Z
+bit 36 C 1 *
+bit 35 I 1 IO_F24
+bit 34 O 1 IO_F24 33 1 Z
+bit 33 C 1 *
+bit 32 I 1 IO_F25
+bit 31 O 1 IO_F25 30 1 Z
+bit 30 C 1 *
+bit 29 I 1 IO_E25
+bit 28 O 1 IO_E25 27 1 Z
+bit 27 C 1 *
+bit 26 I 1 IO_B25
+bit 25 O 1 IO_B25 24 1 Z
+bit 24 C 1 *
+bit 23 I 1 IO_C25
+bit 22 O 1 IO_C25 21 1 Z
+bit 21 C 1 *
+bit 20 I 1 IO_A26
+bit 19 O 1 IO_A26 18 1 Z
+bit 18 C 1 *
+bit 17 I 1 IO_B26
+bit 16 O 1 IO_B26 15 1 Z
+bit 15 C 1 *
+bit 14 O 1 *
+bit 13 O 1 *
+bit 12 O 1 *
+bit 11 I 1 IO_D26
+bit 10 O 1 IO_D26 9 1 Z
+bit 9 C 1 *
+bit 8 I 1 IO_C27
+bit 7 O 1 IO_C27 6 1 Z
+bit 6 C 1 *
+bit 5 I 1 IO_A27
+bit 4 O 1 IO_A27 3 1 Z
+bit 3 C 1 *
+bit 2 I 1 IO_B27
+bit 1 O 1 IO_B27 0 1 Z
+bit 0 C 1 *
--- /dev/null
+0000 xc3s50 0
--- /dev/null
+signal GND1
+signal GND2
+signal GND3
+signal GND4
+signal GND5
+signal GND6
+signal GND7
+signal GND8
+signal GND9
+signal GND10
+signal GND11
+signal GND12
+signal GND13
+signal GND14
+signal GND15
+signal GND16
+signal GND17
+signal GND18
+signal GND19
+signal GND20
+signal GND21
+signal GND22
+signal GND23
+signal GND24
+signal GND25
+signal GND26
+signal GND27
+signal GND28
+signal GND29
+signal GND30
+signal GND31
+signal GND32
+signal CCLK_PAD134
+signal DONE_PAD133
+signal HSWAP_EN_PAD25
+signal M0_PAD83
+signal M1_PAD82
+signal M2_PAD84
+signal PROG_B
+signal TCK
+signal TDI
+signal TDO
+signal TMS
+signal VCCAUX1
+signal VCCAUX2
+signal VCCAUX3
+signal VCCAUX4
+signal VCCAUX5
+signal VCCAUX6
+signal VCCAUX7
+signal VCCAUX8
+signal VCCINT1
+signal VCCINT2
+signal VCCINT3
+signal VCCINT4
+signal VCCINT5
+signal VCCINT6
+signal VCCINT7
+signal VCCINT8
+signal VCCO01
+signal VCCO02
+signal VCCO03
+signal VCCO04
+signal VCCO11
+signal VCCO12
+signal VCCO13
+signal VCCO14
+signal VCCO21
+signal VCCO22
+signal VCCO23
+signal VCCO24
+signal VCCO31
+signal VCCO32
+signal VCCO33
+signal VCCO34
+signal VCCO41
+signal VCCO42
+signal VCCO43
+signal VCCO44
+signal VCCO51
+signal VCCO52
+signal VCCO53
+signal VCCO54
+signal VCCO61
+signal VCCO62
+signal VCCO63
+signal VCCO64
+signal VCCO71
+signal VCCO72
+signal VCCO73
+signal VCCO74
+signal IO_PAD2
+signal IO_PAD3
+signal IO_PAD4
+signal IO_PAD6
+signal IO_PAD8
+signal IO_PAD9
+signal IO_PAD10
+signal IO_PAD14
+signal IO_PAD16
+signal IO_PAD17
+signal IO_PAD18
+signal IO_PAD19
+signal IO_PAD22
+signal IO_PAD23
+signal IO_PAD24
+signal IO_PAD29
+signal IO_PAD30
+signal IO_PAD32
+signal IO_PAD34
+signal IO_PAD35
+signal IO_PAD36
+signal IO_PAD37
+signal IO_PAD38
+signal IO_PAD40
+signal IO_PAD42
+signal IO_PAD44
+signal IO_PAD46
+signal IO_PAD47
+signal IO_PAD48
+signal IO_PAD51
+signal IO_PAD53
+signal IO_PAD56
+signal IO_PAD58
+signal IO_PAD61
+signal IO_PAD62
+signal IO_PAD63
+signal IO_PAD65
+signal IO_PAD67
+signal IO_PAD69
+signal IO_PAD71
+signal IO_PAD72
+signal IO_PAD73
+signal IO_PAD74
+signal IO_PAD75
+signal IO_PAD77
+signal IO_PAD79
+signal IO_PAD80
+signal IO_PAD85
+signal IO_PAD86
+signal IO_PAD89
+signal IO_PAD90
+signal IO_PAD91
+signal IO_PAD92
+signal IO_PAD93
+signal IO_PAD95
+signal IO_PAD97
+signal IO_PAD100
+signal IO_PAD101
+signal IO_PAD103
+signal IO_PAD105
+signal IO_PAD106
+signal IO_PAD107
+signal IO_PAD110
+signal IO_PAD111
+signal IO_PAD112
+signal IO_PAD114
+signal IO_PAD116
+signal IO_PAD117
+signal IO_PAD118
+signal IO_PAD122
+signal IO_PAD124
+signal IO_PAD125
+signal IO_PAD126
+signal IO_PAD127
+signal IO_PAD130
+signal IO_PAD131
+signal IO_PAD132
+signal IO_PAD137
+signal IO_PAD138
+signal IO_PAD140
+signal IO_PAD142
+signal IO_PAD143
+signal IO_PAD144
+signal IO_PAD145
+signal IO_PAD146
+signal IO_PAD148
+signal IO_PAD150
+signal IO_PAD152
+signal IO_PAD154
+signal IO_PAD155
+signal IO_PAD156
+signal IO_PAD159
+signal IO_PAD161
+signal IO_PAD164
+signal IO_PAD166
+signal IO_PAD169
+signal IO_PAD170
+signal IO_PAD171
+signal IO_PAD173
+signal IO_PAD175
+signal IO_PAD177
+signal IO_PAD179
+signal IO_PAD180
+signal IO_PAD181
+signal IO_PAD182
+signal IO_PAD183
+signal IO_PAD185
+signal IO_PAD187
+signal IO_PAD188
+signal IO_PAD193
+signal IO_PAD194
+signal IO_PAD197
+signal IO_PAD198
+signal IO_PAD199
+signal IO_PAD200
+signal IO_PAD201
+signal IO_PAD203
+signal IO_PAD205
+signal IO_PAD208
+signal IO_PAD209
+signal IO_PAD211
+signal IO_PAD213
+signal IO_PAD214
+
+register BSR 383
+register BR 1
+register DIR 32
+
+instruction length 6
+
+instruction EXTEST 000000 BSR
+instruction SAMPLE/PRELOAD 000001 BSR
+instruction IDCODE 001001 DIR
+instruction BYPASS 111111 BR
+
+bit 382 I 1 IO_PAD188
+bit 381 O 1 IO_PAD188 380 1 Z
+bit 380 C 1 *
+bit 379 I 1 IO_PAD187
+bit 378 O 1 IO_PAD187 377 1 Z
+bit 377 C 1 *
+bit 376 I 1 IO_PAD185
+bit 375 O 1 IO_PAD185 374 1 Z
+bit 374 C 1 *
+bit 373 I 1 IO_PAD183
+bit 372 O 1 IO_PAD183 371 1 Z
+bit 371 C 1 *
+bit 370 I 1 IO_PAD182
+bit 369 O 1 IO_PAD182 368 1 Z
+bit 368 C 1 *
+bit 367 I 1 IO_PAD181
+bit 366 O 1 IO_PAD181 365 1 Z
+bit 365 C 1 *
+bit 364 I 1 IO_PAD180
+bit 363 O 1 IO_PAD180 362 1 Z
+bit 362 C 1 *
+bit 361 I 1 IO_PAD179
+bit 360 O 1 IO_PAD179 359 1 Z
+bit 359 C 1 *
+bit 358 I 1 IO_PAD177
+bit 357 O 1 IO_PAD177 356 1 Z
+bit 356 C 1 *
+bit 355 I 1 IO_PAD175
+bit 354 O 1 IO_PAD175 353 1 Z
+bit 353 C 1 *
+bit 352 I 1 IO_PAD173
+bit 351 O 1 IO_PAD173 350 1 Z
+bit 350 C 1 *
+bit 349 I 1 IO_PAD171
+bit 348 O 1 IO_PAD171 347 1 Z
+bit 347 C 1 *
+bit 346 I 1 IO_PAD170
+bit 345 O 1 IO_PAD170 344 1 Z
+bit 344 C 1 *
+bit 343 I 1 IO_PAD169
+bit 342 O 1 IO_PAD169 341 1 Z
+bit 341 C 1 *
+bit 340 I 1 IO_PAD166
+bit 339 O 1 IO_PAD166 338 1 Z
+bit 338 C 1 *
+bit 337 I 1 IO_PAD164
+bit 336 O 1 IO_PAD164 335 1 Z
+bit 335 C 1 *
+bit 334 I 1 IO_PAD161
+bit 333 O 1 IO_PAD161 332 1 Z
+bit 332 C 1 *
+bit 331 I 1 IO_PAD159
+bit 330 O 1 IO_PAD159 329 1 Z
+bit 329 C 1 *
+bit 328 I 1 IO_PAD156
+bit 327 O 1 IO_PAD156 326 1 Z
+bit 326 C 1 *
+bit 325 I 1 IO_PAD155
+bit 324 O 1 IO_PAD155 323 1 Z
+bit 323 C 1 *
+bit 322 I 1 IO_PAD154
+bit 321 O 1 IO_PAD154 320 1 Z
+bit 320 C 1 *
+bit 319 I 1 IO_PAD152
+bit 318 O 1 IO_PAD152 317 1 Z
+bit 317 C 1 *
+bit 316 I 1 IO_PAD150
+bit 315 O 1 IO_PAD150 314 1 Z
+bit 314 C 1 *
+bit 313 I 1 IO_PAD148
+bit 312 O 1 IO_PAD148 311 1 Z
+bit 311 C 1 *
+bit 310 I 1 IO_PAD146
+bit 309 O 1 IO_PAD146 308 1 Z
+bit 308 C 1 *
+bit 307 I 1 IO_PAD145
+bit 306 O 1 IO_PAD145 305 1 Z
+bit 305 C 1 *
+bit 304 I 1 IO_PAD144
+bit 303 O 1 IO_PAD144 302 1 Z
+bit 302 C 1 *
+bit 301 I 1 IO_PAD143
+bit 300 O 1 IO_PAD143 299 1 Z
+bit 299 C 1 *
+bit 298 I 1 IO_PAD142
+bit 297 O 1 IO_PAD142 296 1 Z
+bit 296 C 1 *
+bit 295 I 1 IO_PAD140
+bit 294 O 1 IO_PAD140 293 1 Z
+bit 293 C 1 *
+bit 292 I 1 IO_PAD138
+bit 291 O 1 IO_PAD138 290 1 Z
+bit 290 C 1 *
+bit 289 I 1 IO_PAD137
+bit 288 O 1 IO_PAD137 287 1 Z
+bit 287 C 1 *
+bit 286 I 1 CCLK_PAD134
+bit 285 O 1 CCLK_PAD134 284 1 Z
+bit 284 C 1 *
+bit 283 I 1 DONE_PAD133
+bit 282 O 1 DONE_PAD133 281 1 Z
+bit 281 C 1 *
+bit 280 I 1 IO_PAD132
+bit 279 O 1 IO_PAD132 278 1 Z
+bit 278 C 1 *
+bit 277 I 1 IO_PAD131
+bit 276 O 1 IO_PAD131 275 1 Z
+bit 275 C 1 *
+bit 274 I 1 IO_PAD130
+bit 273 O 1 IO_PAD130 272 1 Z
+bit 272 C 1 *
+bit 271 I 1 IO_PAD127
+bit 270 O 1 IO_PAD127 269 1 Z
+bit 269 C 1 *
+bit 268 I 1 IO_PAD126
+bit 267 O 1 IO_PAD126 266 1 Z
+bit 266 C 1 *
+bit 265 I 1 IO_PAD125
+bit 264 O 1 IO_PAD125 263 1 Z
+bit 263 C 1 *
+bit 262 I 1 IO_PAD124
+bit 261 O 1 IO_PAD124 260 1 Z
+bit 260 C 1 *
+bit 259 I 1 IO_PAD122
+bit 258 O 1 IO_PAD122 257 1 Z
+bit 257 C 1 *
+bit 256 I 1 IO_PAD118
+bit 255 O 1 IO_PAD118 254 1 Z
+bit 254 C 1 *
+bit 253 I 1 IO_PAD117
+bit 252 O 1 IO_PAD117 251 1 Z
+bit 251 C 1 *
+bit 250 I 1 IO_PAD116
+bit 249 O 1 IO_PAD116 248 1 Z
+bit 248 C 1 *
+bit 247 I 1 IO_PAD114
+bit 246 O 1 IO_PAD114 245 1 Z
+bit 245 C 1 *
+bit 244 I 1 IO_PAD112
+bit 243 O 1 IO_PAD112 242 1 Z
+bit 242 C 1 *
+bit 241 I 1 IO_PAD111
+bit 240 O 1 IO_PAD111 239 1 Z
+bit 239 C 1 *
+bit 238 I 1 IO_PAD110
+bit 237 O 1 IO_PAD110 236 1 Z
+bit 236 C 1 *
+bit 235 I 1 IO_PAD107
+bit 234 O 1 IO_PAD107 233 1 Z
+bit 233 C 1 *
+bit 232 I 1 IO_PAD106
+bit 231 O 1 IO_PAD106 230 1 Z
+bit 230 C 1 *
+bit 229 I 1 IO_PAD105
+bit 228 O 1 IO_PAD105 227 1 Z
+bit 227 C 1 *
+bit 226 I 1 IO_PAD103
+bit 225 O 1 IO_PAD103 224 1 Z
+bit 224 C 1 *
+bit 223 I 1 IO_PAD101
+bit 222 O 1 IO_PAD101 221 1 Z
+bit 221 C 1 *
+bit 220 I 1 IO_PAD100
+bit 219 O 1 IO_PAD100 218 1 Z
+bit 218 C 1 *
+bit 217 I 1 IO_PAD97
+bit 216 O 1 IO_PAD97 215 1 Z
+bit 215 C 1 *
+bit 214 I 1 IO_PAD95
+bit 213 O 1 IO_PAD95 212 1 Z
+bit 212 C 1 *
+bit 211 I 1 IO_PAD93
+bit 210 O 1 IO_PAD93 209 1 Z
+bit 209 C 1 *
+bit 208 I 1 IO_PAD92
+bit 207 O 1 IO_PAD92 206 1 Z
+bit 206 C 1 *
+bit 205 I 1 IO_PAD91
+bit 204 O 1 IO_PAD91 203 1 Z
+bit 203 C 1 *
+bit 202 I 1 IO_PAD90
+bit 201 O 1 IO_PAD90 200 1 Z
+bit 200 C 1 *
+bit 199 I 1 IO_PAD89
+bit 198 O 1 IO_PAD89 197 1 Z
+bit 197 C 1 *
+bit 196 I 1 IO_PAD86
+bit 195 O 1 IO_PAD86 194 1 Z
+bit 194 C 1 *
+bit 193 I 1 IO_PAD85
+bit 192 O 1 IO_PAD85 191 1 Z
+bit 191 C 1 *
+bit 190 I 1 M2_PAD84
+bit 189 I 1 M0_PAD83
+bit 188 I 1 M1_PAD82
+bit 187 I 1 IO_PAD80
+bit 186 O 1 IO_PAD80 185 1 Z
+bit 185 C 1 *
+bit 184 I 1 IO_PAD79
+bit 183 O 1 IO_PAD79 182 1 Z
+bit 182 C 1 *
+bit 181 I 1 IO_PAD77
+bit 180 O 1 IO_PAD77 179 1 Z
+bit 179 C 1 *
+bit 178 I 1 IO_PAD75
+bit 177 O 1 IO_PAD75 176 1 Z
+bit 176 C 1 *
+bit 175 I 1 IO_PAD74
+bit 174 O 1 IO_PAD74 173 1 Z
+bit 173 C 1 *
+bit 172 I 1 IO_PAD73
+bit 171 O 1 IO_PAD73 170 1 Z
+bit 170 C 1 *
+bit 169 I 1 IO_PAD72
+bit 168 O 1 IO_PAD72 167 1 Z
+bit 167 C 1 *
+bit 166 I 1 IO_PAD71
+bit 165 O 1 IO_PAD71 164 1 Z
+bit 164 C 1 *
+bit 163 I 1 IO_PAD69
+bit 162 O 1 IO_PAD69 161 1 Z
+bit 161 C 1 *
+bit 160 I 1 IO_PAD67
+bit 159 O 1 IO_PAD67 158 1 Z
+bit 158 C 1 *
+bit 157 I 1 IO_PAD65
+bit 156 O 1 IO_PAD65 155 1 Z
+bit 155 C 1 *
+bit 154 I 1 IO_PAD63
+bit 153 O 1 IO_PAD63 152 1 Z
+bit 152 C 1 *
+bit 151 I 1 IO_PAD62
+bit 150 O 1 IO_PAD62 149 1 Z
+bit 149 C 1 *
+bit 148 I 1 IO_PAD61
+bit 147 O 1 IO_PAD61 146 1 Z
+bit 146 C 1 *
+bit 145 I 1 IO_PAD58
+bit 144 O 1 IO_PAD58 143 1 Z
+bit 143 C 1 *
+bit 142 I 1 IO_PAD56
+bit 141 O 1 IO_PAD56 140 1 Z
+bit 140 C 1 *
+bit 139 I 1 IO_PAD53
+bit 138 O 1 IO_PAD53 137 1 Z
+bit 137 C 1 *
+bit 136 I 1 IO_PAD51
+bit 135 O 1 IO_PAD51 134 1 Z
+bit 134 C 1 *
+bit 133 I 1 IO_PAD48
+bit 132 O 1 IO_PAD48 131 1 Z
+bit 131 C 1 *
+bit 130 I 1 IO_PAD47
+bit 129 O 1 IO_PAD47 128 1 Z
+bit 128 C 1 *
+bit 127 I 1 IO_PAD46
+bit 126 O 1 IO_PAD46 125 1 Z
+bit 125 C 1 *
+bit 124 I 1 IO_PAD44
+bit 123 O 1 IO_PAD44 122 1 Z
+bit 122 C 1 *
+bit 121 I 1 IO_PAD42
+bit 120 O 1 IO_PAD42 119 1 Z
+bit 119 C 1 *
+bit 118 I 1 IO_PAD40
+bit 117 O 1 IO_PAD40 116 1 Z
+bit 116 C 1 *
+bit 115 I 1 IO_PAD38
+bit 114 O 1 IO_PAD38 113 1 Z
+bit 113 C 1 *
+bit 112 I 1 IO_PAD37
+bit 111 O 1 IO_PAD37 110 1 Z
+bit 110 C 1 *
+bit 109 I 1 IO_PAD36
+bit 108 O 1 IO_PAD36 107 1 Z
+bit 107 C 1 *
+bit 106 I 1 IO_PAD35
+bit 105 O 1 IO_PAD35 104 1 Z
+bit 104 C 1 *
+bit 103 I 1 IO_PAD34
+bit 102 O 1 IO_PAD34 101 1 Z
+bit 101 C 1 *
+bit 100 I 1 IO_PAD32
+bit 99 O 1 IO_PAD32 98 1 Z
+bit 98 C 1 *
+bit 97 I 1 IO_PAD30
+bit 96 O 1 IO_PAD30 95 1 Z
+bit 95 C 1 *
+bit 94 I 1 IO_PAD29
+bit 93 O 1 IO_PAD29 92 1 Z
+bit 92 C 1 *
+bit 91 O 1 *
+bit 90 I 1 HSWAP_EN_PAD25
+bit 89 I 1 IO_PAD24
+bit 88 O 1 IO_PAD24 87 1 Z
+bit 87 C 1 *
+bit 86 I 1 IO_PAD23
+bit 85 O 1 IO_PAD23 84 1 Z
+bit 84 C 1 *
+bit 83 I 1 IO_PAD22
+bit 82 O 1 IO_PAD22 81 1 Z
+bit 81 C 1 *
+bit 80 I 1 IO_PAD19
+bit 79 O 1 IO_PAD19 78 1 Z
+bit 78 C 1 *
+bit 77 I 1 IO_PAD18
+bit 76 O 1 IO_PAD18 75 1 Z
+bit 75 C 1 *
+bit 74 I 1 IO_PAD17
+bit 73 O 1 IO_PAD17 72 1 Z
+bit 72 C 1 *
+bit 71 I 1 IO_PAD16
+bit 70 O 1 IO_PAD16 69 1 Z
+bit 69 C 1 *
+bit 68 I 1 IO_PAD14
+bit 67 O 1 IO_PAD14 66 1 Z
+bit 66 C 1 *
+bit 65 I 1 IO_PAD10
+bit 64 O 1 IO_PAD10 63 1 Z
+bit 63 C 1 *
+bit 62 I 1 IO_PAD9
+bit 61 O 1 IO_PAD9 60 1 Z
+bit 60 C 1 *
+bit 59 I 1 IO_PAD8
+bit 58 O 1 IO_PAD8 57 1 Z
+bit 57 C 1 *
+bit 56 I 1 IO_PAD6
+bit 55 O 1 IO_PAD6 54 1 Z
+bit 54 C 1 *
+bit 53 I 1 IO_PAD4
+bit 52 O 1 IO_PAD4 51 1 Z
+bit 51 C 1 *
+bit 50 I 1 IO_PAD3
+bit 49 O 1 IO_PAD3 48 1 Z
+bit 48 C 1 *
+bit 47 I 1 IO_PAD2
+bit 46 O 1 IO_PAD2 45 1 Z
+bit 45 C 1 *
+bit 44 I 1 IO_PAD215
+bit 43 O 1 IO_PAD215 42 1 Z
+bit 42 C 1 *
+bit 41 I 1 IO_PAD214
+bit 40 O 1 IO_PAD214 39 1 Z
+bit 39 C 1 *
+bit 38 I 1 IO_PAD213
+bit 37 O 1 IO_PAD213 36 1 Z
+bit 36 C 1 *
+bit 35 I 1 IO_PAD211
+bit 34 O 1 IO_PAD211 33 1 Z
+bit 33 C 1 *
+bit 32 I 1 IO_PAD209
+bit 31 O 1 IO_PAD209 30 1 Z
+bit 30 C 1 *
+bit 29 I 1 IO_PAD208
+bit 28 O 1 IO_PAD208 27 1 Z
+bit 27 C 1 *
+bit 26 I 1 IO_PAD205
+bit 25 O 1 IO_PAD205 24 1 Z
+bit 24 C 1 *
+bit 23 I 1 IO_PAD203
+bit 22 O 1 IO_PAD203 21 1 Z
+bit 21 C 1 *
+bit 20 I 1 IO_PAD201
+bit 19 O 1 IO_PAD201 18 1 Z
+bit 18 C 1 *
+bit 17 I 1 IO_PAD200
+bit 16 O 1 IO_PAD200 15 1 Z
+bit 15 C 1 *
+bit 14 I 1 IO_PAD199
+bit 13 O 1 IO_PAD199 12 1 Z
+bit 12 C 1 *
+bit 11 I 1 IO_PAD198
+bit 10 O 1 IO_PAD198 9 1 Z
+bit 9 C 1 *
+bit 8 I 1 IO_PAD197
+bit 7 O 1 IO_PAD197 6 1 Z
+bit 6 C 1 *
+bit 5 I 1 IO_PAD194
+bit 4 O 1 IO_PAD194 3 1 Z
+bit 3 C 1 *
+bit 2 I 1 IO_PAD193
+bit 1 O 1 IO_PAD193 0 1 Z
+bit 0 C 1 *
--- /dev/null
+signal CCLK_P14
+signal DONE_P13
+signal GND1
+signal GND2
+signal GND3
+signal GND4
+signal GND5
+signal GND6
+signal GND7
+signal GND8
+signal GND9
+signal GND10
+signal GND11
+signal GND12
+signal HSWAP_EN_B3
+signal M0_N1
+signal M1_M2
+signal M2_P1
+signal PROG_B
+signal TCK
+signal TDI
+signal TDO
+signal TMS
+signal VCCAUX1
+signal VCCAUX2
+signal VCCAUX3
+signal VCCAUX4
+signal VCCINT1
+signal VCCINT2
+signal VCCINT3
+signal VCCINT4
+signal VCCO011
+signal VCCO012
+signal VCCO013
+signal VCCO231
+signal VCCO232
+signal VCCO233
+signal VCCO451
+signal VCCO452
+signal VCCO453
+signal VCCO671
+signal VCCO672
+signal VCCO673
+signal IO_A3
+signal IO_A6
+signal IO_A7
+signal IO_A8
+signal IO_A9
+signal IO_A10
+signal IO_A11
+signal IO_A12
+signal IO_A13
+signal IO_B1
+signal IO_B2
+signal IO_B5
+signal IO_B6
+signal IO_B7
+signal IO_B11
+signal IO_B13
+signal IO_C1
+signal IO_C4
+signal IO_C5
+signal IO_C7
+signal IO_C8
+signal IO_C9
+signal IO_C11
+signal IO_C14
+signal IO_D1
+signal IO_D2
+signal IO_D3
+signal IO_D12
+signal IO_E1
+signal IO_E2
+signal IO_E3
+signal IO_E12
+signal IO_E13
+signal IO_E14
+signal IO_F2
+signal IO_F3
+signal IO_F12
+signal IO_F13
+signal IO_F14
+signal IO_G1
+signal IO_G3
+signal IO_G12
+signal IO_G13
+signal IO_G14
+signal IO_H1
+signal IO_H2
+signal IO_H3
+signal IO_H12
+signal IO_H14
+signal IO_J1
+signal IO_J2
+signal IO_J3
+signal IO_J12
+signal IO_J13
+signal IO_K1
+signal IO_K2
+signal IO_K3
+signal IO_K12
+signal IO_K13
+signal IO_K14
+signal IO_L3
+signal IO_L12
+signal IO_L13
+signal IO_L14
+signal IO_M1
+signal IO_M4
+signal IO_M6
+signal IO_M7
+signal IO_M8
+signal IO_M10
+signal IO_M11
+signal IO_M14
+signal IO_N2
+signal IO_N4
+signal IO_N8
+signal IO_N9
+signal IO_N10
+signal IO_N12
+signal IO_N13
+signal IO_N14
+signal IO_P2
+signal IO_P3
+signal IO_P4
+signal IO_P5
+signal IO_P6
+signal IO_P7
+signal IO_P8
+signal IO_P9
+
+register BSR 383
+register BR 1
+register DIR 32
+
+instruction length 6
+
+instruction EXTEST 000000 BSR
+instruction SAMPLE/PRELOAD 000001 BSR
+instruction IDCODE 001001 DIR
+instruction BYPASS 111111 BR
+
+bit 382 I 1 IO_D12
+bit 381 O 1 IO_D12 380 1 Z
+bit 380 C 1 *
+bit 379 I 1 IO_C14
+bit 378 O 1 IO_C14 377 1 Z
+bit 377 C 1 *
+bit 376 O 1 *
+bit 375 O 1 *
+bit 374 O 1 *
+bit 373 O 1 *
+bit 372 O 1 *
+bit 371 O 1 *
+bit 370 I 1 IO_E12
+bit 369 O 1 IO_E12 368 1 Z
+bit 368 C 1 *
+bit 367 I 1 IO_E13
+bit 366 O 1 IO_E13 365 1 Z
+bit 365 C 1 *
+bit 364 I 1 IO_E14
+bit 363 O 1 IO_E14 362 1 Z
+bit 362 C 1 *
+bit 361 I 1 IO_F12
+bit 360 O 1 IO_F12 359 1 Z
+bit 359 C 1 *
+bit 358 O 1 *
+bit 357 O 1 *
+bit 356 O 1 *
+bit 355 O 1 *
+bit 354 O 1 *
+bit 353 O 1 *
+bit 352 I 1 IO_F13
+bit 351 O 1 IO_F13 350 1 Z
+bit 350 C 1 *
+bit 349 I 1 IO_F14
+bit 348 O 1 IO_F14 347 1 Z
+bit 347 C 1 *
+bit 346 I 1 IO_G12
+bit 345 O 1 IO_G12 344 1 Z
+bit 344 C 1 *
+bit 343 I 1 IO_G13
+bit 342 O 1 IO_G13 341 1 Z
+bit 341 C 1 *
+bit 340 I 1 IO_G14
+bit 339 O 1 IO_G14 338 1 Z
+bit 338 C 1 *
+bit 337 I 1 IO_H12
+bit 336 O 1 IO_H12 335 1 Z
+bit 335 C 1 *
+bit 334 I 1 IO_H14
+bit 333 O 1 IO_H14 332 1 Z
+bit 332 C 1 *
+bit 331 I 1 IO_J13
+bit 330 O 1 IO_J13 329 1 Z
+bit 329 C 1 *
+bit 328 I 1 IO_J12
+bit 327 O 1 IO_J12 326 1 Z
+bit 326 C 1 *
+bit 325 I 1 IO_K14
+bit 324 O 1 IO_K14 323 1 Z
+bit 323 C 1 *
+bit 322 I 1 IO_K13
+bit 321 O 1 IO_K13 320 1 Z
+bit 320 C 1 *
+bit 319 I 1 IO_K12
+bit 318 O 1 IO_K12 317 1 Z
+bit 317 C 1 *
+bit 316 I 1 IO_L14
+bit 315 O 1 IO_L14 314 1 Z
+bit 314 C 1 *
+bit 313 I 1 IO_L13
+bit 312 O 1 IO_L13 311 1 Z
+bit 311 C 1 *
+bit 310 O 1 *
+bit 309 O 1 *
+bit 308 O 1 *
+bit 307 O 1 *
+bit 306 O 1 *
+bit 305 O 1 *
+bit 304 I 1 IO_L12
+bit 303 O 1 IO_L12 302 1 Z
+bit 302 C 1 *
+bit 301 I 1 IO_M14
+bit 300 O 1 IO_M14 299 1 Z
+bit 299 C 1 *
+bit 298 O 1 *
+bit 297 O 1 *
+bit 296 O 1 *
+bit 295 O 1 *
+bit 294 O 1 *
+bit 293 O 1 *
+bit 292 I 1 IO_N13
+bit 291 O 1 IO_N13 290 1 Z
+bit 290 C 1 *
+bit 289 I 1 IO_N14
+bit 288 O 1 IO_N14 287 1 Z
+bit 287 C 1 *
+bit 286 I 1 CCLK_P14
+bit 285 O 1 CCLK_P14 284 1 Z
+bit 284 C 1 *
+bit 283 I 1 DONE_P13
+bit 282 O 1 DONE_P13 281 1 Z
+bit 281 C 1 *
+bit 280 I 1 IO_N12
+bit 279 O 1 IO_N12 278 1 Z
+bit 278 C 1 *
+bit 277 I 1 IO_P12
+bit 276 O 1 IO_P12 275 1 Z
+bit 275 C 1 *
+bit 274 I 1 IO_M11
+bit 273 O 1 IO_M11 272 1 Z
+bit 272 C 1 *
+bit 271 O 1 *
+bit 270 O 1 *
+bit 269 O 1 *
+bit 268 O 1 *
+bit 267 O 1 *
+bit 266 O 1 *
+bit 265 O 1 *
+bit 264 O 1 *
+bit 263 O 1 *
+bit 262 I 1 IO_M10
+bit 261 O 1 IO_M10 260 1 Z
+bit 260 C 1 *
+bit 259 I 1 IO_N10
+bit 258 O 1 IO_N10 257 1 Z
+bit 257 C 1 *
+bit 256 I 1 IO_N9
+bit 255 O 1 IO_N9 254 1 Z
+bit 254 C 1 *
+bit 253 I 1 IO_P9
+bit 252 O 1 IO_P9 251 1 Z
+bit 251 C 1 *
+bit 250 O 1 *
+bit 249 O 1 *
+bit 248 O 1 *
+bit 247 I 1 IO_M8
+bit 246 O 1 IO_M8 245 1 Z
+bit 245 C 1 *
+bit 244 I 1 IO_N8
+bit 243 O 1 IO_N8 242 1 Z
+bit 242 C 1 *
+bit 241 I 1 IO_P8
+bit 240 O 1 IO_P8 239 1 Z
+bit 239 C 1 *
+bit 238 I 1 IO_M7
+bit 237 O 1 IO_M7 236 1 Z
+bit 236 C 1 *
+bit 235 O 1 *
+bit 234 O 1 *
+bit 233 O 1 *
+bit 232 I 1 IO_P7
+bit 231 O 1 IO_P7 230 1 Z
+bit 230 C 1 *
+bit 229 I 1 IO_P6
+bit 228 O 1 IO_P6 227 1 Z
+bit 227 C 1 *
+bit 226 I 1 IO_M6
+bit 225 O 1 IO_M6 224 1 Z
+bit 224 C 1 *
+bit 223 I 1 IO_P5
+bit 222 O 1 IO_P5 221 1 Z
+bit 221 C 1 *
+bit 220 O 1 *
+bit 219 O 1 *
+bit 218 O 1 *
+bit 217 I 1 IO_P4
+bit 216 O 1 IO_P4 215 1 Z
+bit 215 C 1 *
+bit 214 I 1 IO_N4
+bit 213 O 1 IO_N4 212 1 Z
+bit 212 C 1 *
+bit 211 I 1 IO_M4
+bit 210 O 1 IO_M4 209 1 Z
+bit 209 C 1 *
+bit 208 I 1 IO_P3
+bit 207 O 1 IO_P3 206 1 Z
+bit 206 C 1 *
+bit 205 O 1 *
+bit 204 O 1 *
+bit 203 O 1 *
+bit 202 O 1 *
+bit 201 O 1 *
+bit 200 O 1 *
+bit 199 O 1 *
+bit 198 O 1 *
+bit 197 O 1 *
+bit 196 I 1 IO_P2
+bit 195 O 1 IO_P2 194 1 Z
+bit 194 C 1 *
+bit 193 I 1 IO_N2
+bit 192 O 1 IO_N2 191 1 Z
+bit 191 C 1 *
+bit 190 I 1 M2_P1
+bit 189 I 1 M0_N1
+bit 188 I 1 M1_M2
+bit 187 I 1 IO_L3
+bit 186 O 1 IO_L3 185 1 Z
+bit 185 C 1 *
+bit 184 I 1 IO_M1
+bit 183 O 1 IO_M1 182 1 Z
+bit 182 C 1 *
+bit 181 O 1 *
+bit 180 O 1 *
+bit 179 O 1 *
+bit 178 O 1 *
+bit 177 O 1 *
+bit 176 O 1 *
+bit 175 I 1 IO_K3
+bit 174 O 1 IO_K3 173 1 Z
+bit 173 C 1 *
+bit 172 I 1 IO_K2
+bit 171 O 1 IO_K2 170 1 Z
+bit 170 C 1 *
+bit 169 O 1 *
+bit 168 O 1 *
+bit 167 O 1 *
+bit 166 O 1 *
+bit 165 O 1 *
+bit 164 O 1 *
+bit 163 I 1 IO_K1
+bit 162 O 1 IO_K1 161 1 Z
+bit 161 C 1 *
+bit 160 I 1 IO_J3
+bit 159 O 1 IO_J3 158 1 Z
+bit 158 C 1 *
+bit 157 I 1 IO_J2
+bit 156 O 1 IO_J2 155 1 Z
+bit 155 C 1 *
+bit 154 I 1 IO_J1
+bit 153 O 1 IO_J1 152 1 Z
+bit 152 C 1 *
+bit 151 I 1 IO_H3
+bit 150 O 1 IO_H3 149 1 Z
+bit 149 C 1 *
+bit 148 I 1 IO_H2
+bit 147 O 1 IO_H2 146 1 Z
+bit 146 C 1 *
+bit 145 I 1 IO_H1
+bit 144 O 1 IO_H1 143 1 Z
+bit 143 C 1 *
+bit 142 I 1 IO_G3
+bit 141 O 1 IO_G3 140 1 Z
+bit 140 C 1 *
+bit 139 I 1 IO_G1
+bit 138 O 1 IO_G1 137 1 Z
+bit 137 C 1 *
+bit 136 I 1 IO_F2
+bit 135 O 1 IO_F2 134 1 Z
+bit 134 C 1 *
+bit 133 I 1 IO_F3
+bit 132 O 1 IO_F3 131 1 Z
+bit 131 C 1 *
+bit 130 I 1 IO_E1
+bit 129 O 1 IO_E1 128 1 Z
+bit 128 C 1 *
+bit 127 I 1 IO_E2
+bit 126 O 1 IO_E2 125 1 Z
+bit 125 C 1 *
+bit 124 I 1 IO_E3
+bit 123 O 1 IO_E3 122 1 Z
+bit 122 C 1 *
+bit 121 I 1 IO_D1
+bit 120 O 1 IO_D1 119 1 Z
+bit 119 C 1 *
+bit 118 I 1 IO_D2
+bit 117 O 1 IO_D2 116 1 Z
+bit 116 C 1 *
+bit 115 I 1 IO_C1
+bit 114 O 1 IO_C1 113 1 Z
+bit 113 C 1 *
+bit 112 I 1 IO_D3
+bit 111 O 1 IO_D3 110 1 Z
+bit 110 C 1 *
+bit 109 O 1 *
+bit 108 O 1 *
+bit 107 O 1 *
+bit 106 O 1 *
+bit 105 O 1 *
+bit 104 O 1 *
+bit 103 O 1 *
+bit 102 O 1 *
+bit 101 O 1 *
+bit 100 O 1 *
+bit 99 O 1 *
+bit 98 O 1 *
+bit 97 I 1 IO_B2
+bit 96 O 1 IO_B2 95 1 Z
+bit 95 C 1 *
+bit 94 I 1 IO_B1
+bit 93 O 1 IO_B1 92 1 Z
+bit 92 C 1 *
+bit 91 O 1 *
+bit 90 I 1 HSWAP_EN_B3
+bit 89 O 1 *
+bit 88 O 1 *
+bit 87 O 1 *
+bit 86 I 1 IO_A3
+bit 85 O 1 IO_A3 84 1 Z
+bit 84 C 1 *
+bit 83 I 1 IO_C4
+bit 82 O 1 IO_C4 81 1 Z
+bit 81 C 1 *
+bit 80 O 1 *
+bit 79 O 1 *
+bit 78 O 1 *
+bit 77 O 1 *
+bit 76 O 1 *
+bit 75 O 1 *
+bit 74 O 1 *
+bit 73 O 1 *
+bit 72 O 1 *
+bit 71 I 1 IO_C5
+bit 70 O 1 IO_C5 69 1 Z
+bit 69 C 1 *
+bit 68 I 1 IO_B5
+bit 67 O 1 IO_B5 66 1 Z
+bit 66 C 1 *
+bit 65 I 1 IO_B6
+bit 64 O 1 IO_B6 63 1 Z
+bit 63 C 1 *
+bit 62 I 1 IO_A6
+bit 61 O 1 IO_A6 60 1 Z
+bit 60 C 1 *
+bit 59 O 1 *
+bit 58 O 1 *
+bit 57 O 1 *
+bit 56 I 1 IO_C7
+bit 55 O 1 IO_C7 54 1 Z
+bit 54 C 1 *
+bit 53 I 1 IO_B7
+bit 52 O 1 IO_B7 51 1 Z
+bit 51 C 1 *
+bit 50 I 1 IO_A7
+bit 49 O 1 IO_A7 48 1 Z
+bit 48 C 1 *
+bit 47 I 1 IO_C8
+bit 46 O 1 IO_C8 45 1 Z
+bit 45 C 1 *
+bit 44 O 1 *
+bit 43 O 1 *
+bit 42 O 1 *
+bit 41 I 1 IO_A8
+bit 40 O 1 IO_A8 39 1 Z
+bit 39 C 1 *
+bit 38 I 1 IO_A9
+bit 37 O 1 IO_A9 36 1 Z
+bit 36 C 1 *
+bit 35 I 1 IO_C9
+bit 34 O 1 IO_C9 33 1 Z
+bit 33 C 1 *
+bit 32 I 1 IO_A10
+bit 31 O 1 IO_A10 30 1 Z
+bit 30 C 1 *
+bit 29 O 1 *
+bit 28 O 1 *
+bit 27 O 1 *
+bit 26 I 1 IO_A11
+bit 25 O 1 IO_A11 24 1 Z
+bit 24 C 1 *
+bit 23 I 1 IO_B11
+bit 22 O 1 IO_B11 21 1 Z
+bit 21 C 1 *
+bit 20 I 1 IO_C11
+bit 19 O 1 IO_C11 18 1 Z
+bit 18 C 1 *
+bit 17 I 1 IO_A12
+bit 16 O 1 IO_A12 15 1 Z
+bit 15 C 1 *
+bit 14 O 1 *
+bit 13 O 1 *
+bit 12 O 1 *
+bit 11 O 1 *
+bit 10 O 1 *
+bit 9 O 1 *
+bit 8 O 1 *
+bit 7 O 1 *
+bit 6 O 1 *
+bit 5 I 1 IO_A13
+bit 4 O 1 IO_A13 3 1 Z
+bit 3 C 1 *
+bit 2 I 1 IO_B13
+bit 1 O 1 IO_B13 0 1 Z
+bit 0 C 1 *
--- /dev/null
+signal GND1
+signal GND2
+signal GND3
+signal GND4
+signal GND5
+signal GND6
+signal GND7
+signal GND8
+signal GND9
+signal GND10
+signal GND11
+signal GND12
+signal GND13
+signal GND14
+signal GND15
+signal GND16
+signal GND17
+signal GND18
+signal GND19
+signal GND20
+signal GND21
+signal GND22
+signal GND23
+signal GND24
+signal GND25
+signal GND26
+signal GND27
+signal GND28
+signal CCLK_P104
+signal DONE_P103
+signal HSWAP_EN_P206
+signal M0_P55
+signal M1_P54
+signal M2_P56
+signal PROG_B
+signal TCK
+signal TDI
+signal TDO
+signal TMS
+signal VCCAUX1
+signal VCCAUX2
+signal VCCAUX3
+signal VCCAUX4
+signal VCCAUX5
+signal VCCAUX6
+signal VCCAUX7
+signal VCCAUX8
+signal VCCINT1
+signal VCCINT2
+signal VCCINT3
+signal VCCINT4
+signal VCCO01
+signal VCCO02
+signal VCCO11
+signal VCCO12
+signal VCCO21
+signal VCCO22
+signal VCCO31
+signal VCCO32
+signal VCCO41
+signal VCCO42
+signal VCCO51
+signal VCCO52
+signal VCCO61
+signal VCCO62
+signal VCCO71
+signal VCCO72
+signal IO_P2
+signal IO_P3
+signal IO_P7
+signal IO_P9
+signal IO_P10
+signal IO_P11
+signal IO_P12
+signal IO_P13
+signal IO_P15
+signal IO_P16
+signal IO_P18
+signal IO_P19
+signal IO_P20
+signal IO_P21
+signal IO_P26
+signal IO_P27
+signal IO_P28
+signal IO_P29
+signal IO_P34
+signal IO_P35
+signal IO_P36
+signal IO_P37
+signal IO_P39
+signal IO_P40
+signal IO_P42
+signal IO_P43
+signal IO_P44
+signal IO_P45
+signal IO_P46
+signal IO_P48
+signal IO_P51
+signal IO_P52
+signal IO_P57
+signal IO_P58
+signal IO_P61
+signal IO_P62
+signal IO_P63
+signal IO_P64
+signal IO_P65
+signal IO_P67
+signal IO_P68
+signal IO_P71
+signal IO_P72
+signal IO_P74
+signal IO_P76
+signal IO_P77
+signal IO_P78
+signal IO_P79
+signal IO_P80
+signal IO_P81
+signal IO_P83
+signal IO_P85
+signal IO_P86
+signal IO_P87
+signal IO_P90
+signal IO_P92
+signal IO_P93
+signal IO_P94
+signal IO_P95
+signal IO_P100
+signal IO_P101
+signal IO_P102
+signal IO_P106
+signal IO_P107
+signal IO_P111
+signal IO_P113
+signal IO_P114
+signal IO_P115
+signal IO_P116
+signal IO_P117
+signal IO_P119
+signal IO_P120
+signal IO_P122
+signal IO_P123
+signal IO_P124
+signal IO_P125
+signal IO_P130
+signal IO_P131
+signal IO_P132
+signal IO_P133
+signal IO_P138
+signal IO_P139
+signal IO_P140
+signal IO_P141
+signal IO_P143
+signal IO_P144
+signal IO_P146
+signal IO_P147
+signal IO_P148
+signal IO_P149
+signal IO_P150
+signal IO_P152
+signal IO_P155
+signal IO_P156
+signal IO_P161
+signal IO_P162
+signal IO_P165
+signal IO_P166
+signal IO_P167
+signal IO_P168
+signal IO_P169
+signal IO_P171
+signal IO_P172
+signal IO_P175
+signal IO_P176
+signal IO_P178
+signal IO_P180
+signal IO_P181
+signal IO_P182
+signal IO_P183
+signal IO_P184
+signal IO_P185
+signal IO_P187
+signal IO_P189
+signal IO_P190
+signal IO_P191
+signal IO_P194
+signal IO_P196
+signal IO_P197
+signal IO_P198
+signal IO_P199
+signal IO_P203
+signal IO_P204
+
+register BSR 383
+register BR 1
+register DIR 32
+
+instruction length 6
+
+instruction EXTEST 000000 BSR
+instruction SAMPLE/PRELOAD 000001 BSR
+instruction IDCODE 001001 DIR
+instruction BYPASS 111111 BR
+
+bit 382 I 1 IO_P156
+bit 381 O 1 IO_P156 380 1 Z
+bit 380 C 1 *
+bit 379 I 1 IO_P155
+bit 378 O 1 IO_P155 377 1 Z
+bit 377 C 1 *
+bit 376 I 1 IO_P152
+bit 375 O 1 IO_P152 374 1 Z
+bit 374 C 1 *
+bit 373 I 1 IO_P150
+bit 372 O 1 IO_P150 371 1 Z
+bit 371 C 1 *
+bit 370 I 1 IO_P149
+bit 369 O 1 IO_P149 368 1 Z
+bit 368 C 1 *
+bit 367 I 1 IO_P148
+bit 366 O 1 IO_P148 365 1 Z
+bit 365 C 1 *
+bit 364 I 1 IO_P147
+bit 363 O 1 IO_P147 362 1 Z
+bit 362 C 1 *
+bit 361 I 1 IO_P146
+bit 360 O 1 IO_P146 359 1 Z
+bit 359 C 1 *
+bit 358 I 1 IO_P144
+bit 357 O 1 IO_P144 356 1 Z
+bit 356 C 1 *
+bit 355 I 1 IO_P143
+bit 354 O 1 IO_P143 353 1 Z
+bit 353 C 1 *
+bit 352 I 1 IO_P141
+bit 351 O 1 IO_P141 350 1 Z
+bit 350 C 1 *
+bit 349 I 1 IO_P140
+bit 348 O 1 IO_P140 347 1 Z
+bit 347 C 1 *
+bit 346 I 1 IO_P139
+bit 345 O 1 IO_P139 344 1 Z
+bit 344 C 1 *
+bit 343 I 1 IO_P138
+bit 342 O 1 IO_P138 341 1 Z
+bit 341 C 1 *
+bit 340 I 1 IO_P133
+bit 339 O 1 IO_P133 338 1 Z
+bit 338 C 1 *
+bit 337 I 1 IO_P132
+bit 336 O 1 IO_P132 335 1 Z
+bit 335 C 1 *
+bit 334 I 1 IO_P131
+bit 333 O 1 IO_P131 332 1 Z
+bit 332 C 1 *
+bit 331 I 1 IO_P130
+bit 330 O 1 IO_P130 329 1 Z
+bit 329 C 1 *
+bit 328 I 1 IO_P125
+bit 327 O 1 IO_P125 326 1 Z
+bit 326 C 1 *
+bit 325 I 1 IO_P124
+bit 324 O 1 IO_P124 323 1 Z
+bit 323 C 1 *
+bit 322 I 1 IO_P123
+bit 321 O 1 IO_P123 320 1 Z
+bit 320 C 1 *
+bit 319 I 1 IO_P122
+bit 318 O 1 IO_P122 317 1 Z
+bit 317 C 1 *
+bit 316 I 1 IO_P120
+bit 315 O 1 IO_P120 314 1 Z
+bit 314 C 1 *
+bit 313 I 1 IO_P119
+bit 312 O 1 IO_P119 311 1 Z
+bit 311 C 1 *
+bit 310 I 1 IO_P117
+bit 309 O 1 IO_P117 308 1 Z
+bit 308 C 1 *
+bit 307 I 1 IO_P116
+bit 306 O 1 IO_P116 305 1 Z
+bit 305 C 1 *
+bit 304 I 1 IO_P115
+bit 303 O 1 IO_P115 302 1 Z
+bit 302 C 1 *
+bit 301 I 1 IO_P114
+bit 300 O 1 IO_P114 299 1 Z
+bit 299 C 1 *
+bit 298 I 1 IO_P113
+bit 297 O 1 IO_P113 296 1 Z
+bit 296 C 1 *
+bit 295 I 1 IO_P111
+bit 294 O 1 IO_P111 293 1 Z
+bit 293 C 1 *
+bit 292 I 1 IO_P107
+bit 291 O 1 IO_P107 290 1 Z
+bit 290 C 1 *
+bit 289 I 1 IO_P106
+bit 288 O 1 IO_P106 287 1 Z
+bit 287 C 1 *
+bit 286 I 1 CCLK_P104
+bit 285 O 1 CCLK_P104 284 1 Z
+bit 284 C 1 *
+bit 283 I 1 DONE_P103
+bit 282 O 1 DONE_P103 281 1 Z
+bit 281 C 1 *
+bit 280 I 1 IO_P102
+bit 279 O 1 IO_P102 278 1 Z
+bit 278 C 1 *
+bit 277 I 1 IO_P101
+bit 276 O 1 IO_P101 275 1 Z
+bit 275 C 1 *
+bit 274 I 1 IO_P100
+bit 273 O 1 IO_P100 272 1 Z
+bit 272 C 1 *
+bit 271 I 1 IO_P95
+bit 270 O 1 IO_P95 269 1 Z
+bit 269 C 1 *
+bit 268 I 1 IO_P94
+bit 267 O 1 IO_P94 266 1 Z
+bit 266 C 1 *
+bit 265 I 1 IO_P93
+bit 264 O 1 IO_P93 263 1 Z
+bit 263 C 1 *
+bit 262 I 1 IO_P92
+bit 261 O 1 IO_P92 260 1 Z
+bit 260 C 1 *
+bit 259 I 1 IO_P90
+bit 258 O 1 IO_P90 257 1 Z
+bit 257 C 1 *
+bit 256 I 1 IO_P87
+bit 255 O 1 IO_P87 254 1 Z
+bit 254 C 1 *
+bit 253 I 1 IO_P86
+bit 252 O 1 IO_P86 251 1 Z
+bit 251 C 1 *
+bit 250 I 1 IO_P85
+bit 249 O 1 IO_P85 248 1 Z
+bit 248 C 1 *
+bit 247 I 1 IO_P83
+bit 246 O 1 IO_P83 245 1 Z
+bit 245 C 1 *
+bit 244 I 1 IO_P81
+bit 243 O 1 IO_P81 242 1 Z
+bit 242 C 1 *
+bit 241 I 1 IO_P80
+bit 240 O 1 IO_P80 239 1 Z
+bit 239 C 1 *
+bit 238 I 1 IO_P79
+bit 237 O 1 IO_P79 236 1 Z
+bit 236 C 1 *
+bit 235 I 1 IO_P78
+bit 234 O 1 IO_P78 233 1 Z
+bit 233 C 1 *
+bit 232 I 1 IO_P77
+bit 231 O 1 IO_P77 230 1 Z
+bit 230 C 1 *
+bit 229 I 1 IO_P76
+bit 228 O 1 IO_P76 227 1 Z
+bit 227 C 1 *
+bit 226 I 1 IO_P74
+bit 225 O 1 IO_P74 224 1 Z
+bit 224 C 1 *
+bit 223 I 1 IO_P72
+bit 222 O 1 IO_P72 221 1 Z
+bit 221 C 1 *
+bit 220 I 1 IO_P71
+bit 219 O 1 IO_P71 218 1 Z
+bit 218 C 1 *
+bit 217 I 1 IO_P68
+bit 216 O 1 IO_P68 215 1 Z
+bit 215 C 1 *
+bit 214 I 1 IO_P67
+bit 213 O 1 IO_P67 212 1 Z
+bit 212 C 1 *
+bit 211 I 1 IO_P65
+bit 210 O 1 IO_P65 209 1 Z
+bit 209 C 1 *
+bit 208 I 1 IO_P64
+bit 207 O 1 IO_P64 206 1 Z
+bit 206 C 1 *
+bit 205 I 1 IO_P63
+bit 204 O 1 IO_P63 203 1 Z
+bit 203 C 1 *
+bit 202 I 1 IO_P62
+bit 201 O 1 IO_P62 200 1 Z
+bit 200 C 1 *
+bit 199 I 1 IO_P61
+bit 198 O 1 IO_P61 197 1 Z
+bit 197 C 1 *
+bit 196 I 1 IO_P58
+bit 195 O 1 IO_P58 194 1 Z
+bit 194 C 1 *
+bit 193 I 1 IO_P57
+bit 192 O 1 IO_P57 191 1 Z
+bit 191 C 1 *
+bit 190 I 1 M2_P56
+bit 189 I 1 M0_P55
+bit 188 I 1 M1_P54
+bit 187 I 1 IO_P52
+bit 186 O 1 IO_P52 185 1 Z
+bit 185 C 1 *
+bit 184 I 1 IO_P51
+bit 183 O 1 IO_P51 182 1 Z
+bit 182 C 1 *
+bit 181 I 1 IO_P48
+bit 180 O 1 IO_P48 179 1 Z
+bit 179 C 1 *
+bit 178 I 1 IO_P46
+bit 177 O 1 IO_P46 176 1 Z
+bit 176 C 1 *
+bit 175 I 1 IO_P45
+bit 174 O 1 IO_P45 173 1 Z
+bit 173 C 1 *
+bit 172 I 1 IO_P44
+bit 171 O 1 IO_P44 170 1 Z
+bit 170 C 1 *
+bit 169 I 1 IO_P43
+bit 168 O 1 IO_P43 167 1 Z
+bit 167 C 1 *
+bit 166 I 1 IO_P42
+bit 165 O 1 IO_P42 164 1 Z
+bit 164 C 1 *
+bit 163 I 1 IO_P40
+bit 162 O 1 IO_P40 161 1 Z
+bit 161 C 1 *
+bit 160 I 1 IO_P39
+bit 159 O 1 IO_P39 158 1 Z
+bit 158 C 1 *
+bit 157 I 1 IO_P37
+bit 156 O 1 IO_P37 155 1 Z
+bit 155 C 1 *
+bit 154 I 1 IO_P36
+bit 153 O 1 IO_P36 152 1 Z
+bit 152 C 1 *
+bit 151 I 1 IO_P35
+bit 150 O 1 IO_P35 149 1 Z
+bit 149 C 1 *
+bit 148 I 1 IO_P34
+bit 147 O 1 IO_P34 146 1 Z
+bit 146 C 1 *
+bit 145 I 1 IO_P29
+bit 144 O 1 IO_P29 143 1 Z
+bit 143 C 1 *
+bit 142 I 1 IO_P28
+bit 141 O 1 IO_P28 140 1 Z
+bit 140 C 1 *
+bit 139 I 1 IO_P27
+bit 138 O 1 IO_P27 137 1 Z
+bit 137 C 1 *
+bit 136 I 1 IO_P26
+bit 135 O 1 IO_P26 134 1 Z
+bit 134 C 1 *
+bit 133 I 1 IO_P21
+bit 132 O 1 IO_P21 131 1 Z
+bit 131 C 1 *
+bit 130 I 1 IO_P20
+bit 129 O 1 IO_P20 128 1 Z
+bit 128 C 1 *
+bit 127 I 1 IO_P19
+bit 126 O 1 IO_P19 125 1 Z
+bit 125 C 1 *
+bit 124 I 1 IO_P18
+bit 123 O 1 IO_P18 122 1 Z
+bit 122 C 1 *
+bit 121 I 1 IO_P16
+bit 120 O 1 IO_P16 119 1 Z
+bit 119 C 1 *
+bit 118 I 1 IO_P15
+bit 117 O 1 IO_P15 116 1 Z
+bit 116 C 1 *
+bit 115 I 1 IO_P13
+bit 114 O 1 IO_P13 113 1 Z
+bit 113 C 1 *
+bit 112 I 1 IO_P12
+bit 111 O 1 IO_P12 110 1 Z
+bit 110 C 1 *
+bit 109 I 1 IO_P11
+bit 108 O 1 IO_P11 107 1 Z
+bit 107 C 1 *
+bit 106 I 1 IO_P10
+bit 105 O 1 IO_P10 104 1 Z
+bit 104 C 1 *
+bit 103 I 1 IO_P9
+bit 102 O 1 IO_P9 101 1 Z
+bit 101 C 1 *
+bit 100 I 1 IO_P7
+bit 99 O 1 IO_P7 98 1 Z
+bit 98 C 1 *
+bit 97 I 1 IO_P3
+bit 96 O 1 IO_P3 95 1 Z
+bit 95 C 1 *
+bit 94 I 1 IO_P2
+bit 93 O 1 IO_P2 92 1 Z
+bit 92 C 1 *
+bit 91 O 1 *
+bit 90 I 1 HSWAP_EN_P206
+bit 89 I 1 IO_P205
+bit 88 O 1 IO_P205 87 1 Z
+bit 87 C 1 *
+bit 86 I 1 IO_P204
+bit 85 O 1 IO_P204 84 1 Z
+bit 84 C 1 *
+bit 83 I 1 IO_P203
+bit 82 O 1 IO_P203 81 1 Z
+bit 81 C 1 *
+bit 80 I 1 IO_P199
+bit 79 O 1 IO_P199 78 1 Z
+bit 78 C 1 *
+bit 77 I 1 IO_P198
+bit 76 O 1 IO_P198 75 1 Z
+bit 75 C 1 *
+bit 74 I 1 IO_P197
+bit 73 O 1 IO_P197 72 1 Z
+bit 72 C 1 *
+bit 71 I 1 IO_P196
+bit 70 O 1 IO_P196 69 1 Z
+bit 69 C 1 *
+bit 68 I 1 IO_P194
+bit 67 O 1 IO_P194 66 1 Z
+bit 66 C 1 *
+bit 65 I 1 IO_P191
+bit 64 O 1 IO_P191 63 1 Z
+bit 63 C 1 *
+bit 62 I 1 IO_P190
+bit 61 O 1 IO_P190 60 1 Z
+bit 60 C 1 *
+bit 59 I 1 IO_P189
+bit 58 O 1 IO_P189 57 1 Z
+bit 57 C 1 *
+bit 56 I 1 IO_P187
+bit 55 O 1 IO_P187 54 1 Z
+bit 54 C 1 *
+bit 53 I 1 IO_P185
+bit 52 O 1 IO_P185 51 1 Z
+bit 51 C 1 *
+bit 50 I 1 IO_P184
+bit 49 O 1 IO_P184 48 1 Z
+bit 48 C 1 *
+bit 47 I 1 IO_P183
+bit 46 O 1 IO_P183 45 1 Z
+bit 45 C 1 *
+bit 44 I 1 IO_P182
+bit 43 O 1 IO_P182 42 1 Z
+bit 42 C 1 *
+bit 41 I 1 IO_P181
+bit 40 O 1 IO_P181 39 1 Z
+bit 39 C 1 *
+bit 38 I 1 IO_P180
+bit 37 O 1 IO_P180 36 1 Z
+bit 36 C 1 *
+bit 35 I 1 IO_P178
+bit 34 O 1 IO_P178 33 1 Z
+bit 33 C 1 *
+bit 32 I 1 IO_P176
+bit 31 O 1 IO_P176 30 1 Z
+bit 30 C 1 *
+bit 29 I 1 IO_P175
+bit 28 O 1 IO_P175 27 1 Z
+bit 27 C 1 *
+bit 26 I 1 IO_P172
+bit 25 O 1 IO_P172 24 1 Z
+bit 24 C 1 *
+bit 23 I 1 IO_P171
+bit 22 O 1 IO_P171 21 1 Z
+bit 21 C 1 *
+bit 20 I 1 IO_P169
+bit 19 O 1 IO_P169 18 1 Z
+bit 18 C 1 *
+bit 17 I 1 IO_P168
+bit 16 O 1 IO_P168 15 1 Z
+bit 15 C 1 *
+bit 14 I 1 IO_P167
+bit 13 O 1 IO_P167 12 1 Z
+bit 12 C 1 *
+bit 11 I 1 IO_P166
+bit 10 O 1 IO_P166 9 1 Z
+bit 9 C 1 *
+bit 8 I 1 IO_P165
+bit 7 O 1 IO_P165 6 1 Z
+bit 6 C 1 *
+bit 5 I 1 IO_P162
+bit 4 O 1 IO_P162 3 1 Z
+bit 3 C 1 *
+bit 2 I 1 IO_P161
+bit 1 O 1 IO_P161 0 1 Z
+bit 0 C 1 *
--- /dev/null
+signal GND1
+signal GND2
+signal GND3
+signal GND4
+signal GND5
+signal GND6
+signal GND7
+signal GND8
+signal GND9
+signal GND10
+signal GND11
+signal GND12
+signal GND13
+signal GND14
+signal GND15
+signal GND16
+signal CCLK_P72
+signal DONE_P71
+signal HSWAP_EN_P142
+signal M0_P38
+signal M1_P37
+signal M2_P39
+signal PROG_B
+signal TCK
+signal TDI
+signal TDO
+signal TMS
+signal VCCAUX1
+signal VCCAUX2
+signal VCCAUX3
+signal VCCAUX4
+signal VCCINT1
+signal VCCINT2
+signal VCCINT3
+signal VCCINT4
+signal VCCO011
+signal VCCO012
+signal VCCO013
+signal VCCO231
+signal VCCO232
+signal VCCO233
+signal VCCO451
+signal VCCO452
+signal VCCO453
+signal VCCO671
+signal VCCO672
+signal VCCO673
+signal IO_P1
+signal IO_P2
+signal IO_P4
+signal IO_P5
+signal IO_P6
+signal IO_P7
+signal IO_P8
+signal IO_P10
+signal IO_P11
+signal IO_P12
+signal IO_P13
+signal IO_P14
+signal IO_P15
+signal IO_P17
+signal IO_P18
+signal IO_P20
+signal IO_P21
+signal IO_P23
+signal IO_P24
+signal IO_P25
+signal IO_P26
+signal IO_P27
+signal IO_P28
+signal IO_P30
+signal IO_P31
+signal IO_P32
+signal IO_P33
+signal IO_P35
+signal IO_P36
+signal IO_P40
+signal IO_P41
+signal IO_P44
+signal IO_P46
+signal IO_P47
+signal IO_P50
+signal IO_P51
+signal IO_P52
+signal IO_P53
+signal IO_P55
+signal IO_P56
+signal IO_P57
+signal IO_P58
+signal IO_P59
+signal IO_P60
+signal IO_P63
+signal IO_P65
+signal IO_P68
+signal IO_P69
+signal IO_P70
+signal IO_P73
+signal IO_P74
+signal IO_P76
+signal IO_P77
+signal IO_P78
+signal IO_P79
+signal IO_P80
+signal IO_P82
+signal IO_P83
+signal IO_P84
+signal IO_P85
+signal IO_P86
+signal IO_P87
+signal IO_P89
+signal IO_P90
+signal IO_P92
+signal IO_P93
+signal IO_P95
+signal IO_P96
+signal IO_P97
+signal IO_P98
+signal IO_P99
+signal IO_P100
+signal IO_P102
+signal IO_P103
+signal IO_P104
+signal IO_P105
+signal IO_P107
+signal IO_P108
+signal IO_P112
+signal IO_P113
+signal IO_P116
+signal IO_P118
+signal IO_P119
+signal IO_P122
+signal IO_P123
+signal IO_P124
+signal IO_P125
+signal IO_P127
+signal IO_P128
+signal IO_P129
+signal IO_P130
+signal IO_P131
+signal IO_P132
+signal IO_P135
+signal IO_P137
+signal IO_P140
+
+register BSR 383
+register BR 1
+register DIR 32
+
+instruction length 6
+
+instruction EXTEST 000000 BSR
+instruction SAMPLE/PRELOAD 000001 BSR
+instruction IDCODE 001001 DIR
+instruction BYPASS 111111 BR
+
+bit 382 I 1 IO_P108
+bit 381 O 1 IO_P108 380 1 Z
+bit 380 C 1 *
+bit 379 I 1 IO_P107
+bit 378 O 1 IO_P107 377 1 Z
+bit 377 C 1 *
+bit 376 O 1 *
+bit 375 O 1 *
+bit 374 O 1 *
+bit 373 O 1 *
+bit 372 O 1 *
+bit 371 O 1 *
+bit 370 I 1 IO_P105
+bit 369 O 1 IO_P105 368 1 Z
+bit 368 C 1 *
+bit 367 I 1 IO_P104
+bit 366 O 1 IO_P104 365 1 Z
+bit 365 C 1 *
+bit 364 I 1 IO_P103
+bit 363 O 1 IO_P103 362 1 Z
+bit 362 C 1 *
+bit 361 I 1 IO_P102
+bit 360 O 1 IO_P102 359 1 Z
+bit 359 C 1 *
+bit 358 I 1 IO_P100
+bit 357 O 1 IO_P100 356 1 Z
+bit 356 C 1 *
+bit 355 I 1 IO_P99
+bit 354 O 1 IO_P99 353 1 Z
+bit 353 C 1 *
+bit 352 I 1 IO_P98
+bit 351 O 1 IO_P98 350 1 Z
+bit 350 C 1 *
+bit 349 I 1 IO_P97
+bit 348 O 1 IO_P97 347 1 Z
+bit 347 C 1 *
+bit 346 I 1 IO_P96
+bit 345 O 1 IO_P96 344 1 Z
+bit 344 C 1 *
+bit 343 I 1 IO_P95
+bit 342 O 1 IO_P95 341 1 Z
+bit 341 C 1 *
+bit 340 I 1 IO_P93
+bit 339 O 1 IO_P93 338 1 Z
+bit 338 C 1 *
+bit 337 I 1 IO_P92
+bit 336 O 1 IO_P92 335 1 Z
+bit 335 C 1 *
+bit 334 I 1 IO_P90
+bit 333 O 1 IO_P90 332 1 Z
+bit 332 C 1 *
+bit 331 I 1 IO_P89
+bit 330 O 1 IO_P89 329 1 Z
+bit 329 C 1 *
+bit 328 I 1 IO_P87
+bit 327 O 1 IO_P87 326 1 Z
+bit 326 C 1 *
+bit 325 I 1 IO_P86
+bit 324 O 1 IO_P86 323 1 Z
+bit 323 C 1 *
+bit 322 I 1 IO_P85
+bit 321 O 1 IO_P85 320 1 Z
+bit 320 C 1 *
+bit 319 I 1 IO_P84
+bit 318 O 1 IO_P84 317 1 Z
+bit 317 C 1 *
+bit 316 I 1 IO_P83
+bit 315 O 1 IO_P83 314 1 Z
+bit 314 C 1 *
+bit 313 I 1 IO_P82
+bit 312 O 1 IO_P82 311 1 Z
+bit 311 C 1 *
+bit 310 I 1 IO_P80
+bit 309 O 1 IO_P80 308 1 Z
+bit 308 C 1 *
+bit 307 I 1 IO_P79
+bit 306 O 1 IO_P79 305 1 Z
+bit 305 C 1 *
+bit 304 I 1 IO_P78
+bit 303 O 1 IO_P78 302 1 Z
+bit 302 C 1 *
+bit 301 I 1 IO_P77
+bit 300 O 1 IO_P77 299 1 Z
+bit 299 C 1 *
+bit 298 I 1 IO_P76
+bit 297 O 1 IO_P76 296 1 Z
+bit 296 C 1 *
+bit 295 O 1 *
+bit 294 O 1 *
+bit 293 O 1 *
+bit 292 I 1 IO_P74
+bit 291 O 1 IO_P74 290 1 Z
+bit 290 C 1 *
+bit 289 I 1 IO_P73
+bit 288 O 1 IO_P73 287 1 Z
+bit 287 C 1 *
+bit 286 I 1 CCLK_P72
+bit 285 O 1 CCLK_P72 284 1 Z
+bit 284 C 1 *
+bit 283 I 1 DONE_P71
+bit 282 O 1 DONE_P71 281 1 Z
+bit 281 C 1 *
+bit 280 I 1 IO_P70
+bit 279 O 1 IO_P70 278 1 Z
+bit 278 C 1 *
+bit 277 I 1 IO_P69
+bit 276 O 1 IO_P69 275 1 Z
+bit 275 C 1 *
+bit 274 I 1 IO_P68
+bit 273 O 1 IO_P68 272 1 Z
+bit 272 C 1 *
+bit 271 O 1 *
+bit 270 O 1 *
+bit 269 O 1 *
+bit 268 O 1 *
+bit 267 O 1 *
+bit 266 O 1 *
+bit 265 O 1 *
+bit 264 O 1 *
+bit 263 O 1 *
+bit 262 I 1 IO_P65
+bit 261 O 1 IO_P65 260 1 Z
+bit 260 C 1 *
+bit 259 I 1 IO_P63
+bit 258 O 1 IO_P63 257 1 Z
+bit 257 C 1 *
+bit 256 I 1 IO_P60
+bit 255 O 1 IO_P60 254 1 Z
+bit 254 C 1 *
+bit 253 I 1 IO_P59
+bit 252 O 1 IO_P59 251 1 Z
+bit 251 C 1 *
+bit 250 O 1 *
+bit 249 O 1 *
+bit 248 O 1 *
+bit 247 I 1 IO_P58
+bit 246 O 1 IO_P58 245 1 Z
+bit 245 C 1 *
+bit 244 I 1 IO_P57
+bit 243 O 1 IO_P57 242 1 Z
+bit 242 C 1 *
+bit 241 I 1 IO_P56
+bit 240 O 1 IO_P56 239 1 Z
+bit 239 C 1 *
+bit 238 I 1 IO_P55
+bit 237 O 1 IO_P55 236 1 Z
+bit 236 C 1 *
+bit 235 O 1 *
+bit 234 O 1 *
+bit 233 O 1 *
+bit 232 I 1 IO_P53
+bit 231 O 1 IO_P53 230 1 Z
+bit 230 C 1 *
+bit 229 I 1 IO_P52
+bit 228 O 1 IO_P52 227 1 Z
+bit 227 C 1 *
+bit 226 I 1 IO_P51
+bit 225 O 1 IO_P51 224 1 Z
+bit 224 C 1 *
+bit 223 I 1 IO_P50
+bit 222 O 1 IO_P50 221 1 Z
+bit 221 C 1 *
+bit 220 O 1 *
+bit 219 O 1 *
+bit 218 O 1 *
+bit 217 I 1 IO_P47
+bit 216 O 1 IO_P47 215 1 Z
+bit 215 C 1 *
+bit 214 I 1 IO_P46
+bit 213 O 1 IO_P46 212 1 Z
+bit 212 C 1 *
+bit 211 I 1 IO_P44
+bit 210 O 1 IO_P44 209 1 Z
+bit 209 C 1 *
+bit 208 O 1 *
+bit 207 O 1 *
+bit 206 O 1 *
+bit 205 O 1 *
+bit 204 O 1 *
+bit 203 O 1 *
+bit 202 O 1 *
+bit 201 O 1 *
+bit 200 O 1 *
+bit 199 O 1 *
+bit 198 O 1 *
+bit 197 O 1 *
+bit 196 I 1 IO_P41
+bit 195 O 1 IO_P41 194 1 Z
+bit 194 C 1 *
+bit 193 I 1 IO_P40
+bit 192 O 1 IO_P40 191 1 Z
+bit 191 C 1 *
+bit 190 I 1 M2_P39
+bit 189 I 1 M0_P38
+bit 188 I 1 M1_P37
+bit 187 I 1 IO_P36
+bit 186 O 1 IO_P36 185 1 Z
+bit 185 C 1 *
+bit 184 I 1 IO_P35
+bit 183 O 1 IO_P35 182 1 Z
+bit 182 C 1 *
+bit 181 O 1 *
+bit 180 O 1 *
+bit 179 O 1 *
+bit 178 O 1 *
+bit 177 O 1 *
+bit 176 O 1 *
+bit 175 I 1 IO_P33
+bit 174 O 1 IO_P33 173 1 Z
+bit 173 C 1 *
+bit 172 I 1 IO_P32
+bit 171 O 1 IO_P32 170 1 Z
+bit 170 C 1 *
+bit 169 I 1 IO_P31
+bit 168 O 1 IO_P31 167 1 Z
+bit 167 C 1 *
+bit 166 I 1 IO_P30
+bit 165 O 1 IO_P30 164 1 Z
+bit 164 C 1 *
+bit 163 I 1 IO_P28
+bit 162 O 1 IO_P28 161 1 Z
+bit 161 C 1 *
+bit 160 I 1 IO_P27
+bit 159 O 1 IO_P27 158 1 Z
+bit 158 C 1 *
+bit 157 I 1 IO_P26
+bit 156 O 1 IO_P26 155 1 Z
+bit 155 C 1 *
+bit 154 I 1 IO_P25
+bit 153 O 1 IO_P25 152 1 Z
+bit 152 C 1 *
+bit 151 I 1 IO_P24
+bit 150 O 1 IO_P24 149 1 Z
+bit 149 C 1 *
+bit 148 I 1 IO_P23
+bit 147 O 1 IO_P23 146 1 Z
+bit 146 C 1 *
+bit 145 I 1 IO_P21
+bit 144 O 1 IO_P21 143 1 Z
+bit 143 C 1 *
+bit 142 I 1 IO_P20
+bit 141 O 1 IO_P20 140 1 Z
+bit 140 C 1 *
+bit 139 I 1 IO_P18
+bit 138 O 1 IO_P18 137 1 Z
+bit 137 C 1 *
+bit 136 I 1 IO_P17
+bit 135 O 1 IO_P17 134 1 Z
+bit 134 C 1 *
+bit 133 I 1 IO_P15
+bit 132 O 1 IO_P15 131 1 Z
+bit 131 C 1 *
+bit 130 I 1 IO_P14
+bit 129 O 1 IO_P14 128 1 Z
+bit 128 C 1 *
+bit 127 I 1 IO_P13
+bit 126 O 1 IO_P13 125 1 Z
+bit 125 C 1 *
+bit 124 I 1 IO_P12
+bit 123 O 1 IO_P12 122 1 Z
+bit 122 C 1 *
+bit 121 I 1 IO_P11
+bit 120 O 1 IO_P11 119 1 Z
+bit 119 C 1 *
+bit 118 I 1 IO_P10
+bit 117 O 1 IO_P10 116 1 Z
+bit 116 C 1 *
+bit 115 I 1 IO_P8
+bit 114 O 1 IO_P8 113 1 Z
+bit 113 C 1 *
+bit 112 I 1 IO_P7
+bit 111 O 1 IO_P7 110 1 Z
+bit 110 C 1 *
+bit 109 I 1 IO_P6
+bit 108 O 1 IO_P6 107 1 Z
+bit 107 C 1 *
+bit 106 I 1 IO_P5
+bit 105 O 1 IO_P5 104 1 Z
+bit 104 C 1 *
+bit 103 I 1 IO_P4
+bit 102 O 1 IO_P4 101 1 Z
+bit 101 C 1 *
+bit 100 O 1 *
+bit 99 O 1 *
+bit 98 O 1 *
+bit 97 I 1 IO_P2
+bit 96 O 1 IO_P2 95 1 Z
+bit 95 C 1 *
+bit 94 I 1 IO_P1
+bit 93 O 1 IO_P1 92 1 Z
+bit 92 C 1 *
+bit 91 O 1 *
+bit 90 I 1 HSWAP_EN_P142
+bit 89 O 1 *
+bit 88 O 1 *
+bit 87 O 1 *
+bit 86 I 1 IO_P141
+bit 85 O 1 IO_P141 84 1 Z
+bit 84 C 1 *
+bit 83 I 1 IO_P140
+bit 82 O 1 IO_P140 81 1 Z
+bit 81 C 1 *
+bit 80 O 1 *
+bit 79 O 1 *
+bit 78 O 1 *
+bit 77 O 1 *
+bit 76 O 1 *
+bit 75 O 1 *
+bit 74 O 1 *
+bit 73 O 1 *
+bit 72 O 1 *
+bit 71 I 1 IO_P137
+bit 70 O 1 IO_P137 69 1 Z
+bit 69 C 1 *
+bit 68 I 1 IO_P135
+bit 67 O 1 IO_P135 66 1 Z
+bit 66 C 1 *
+bit 65 I 1 IO_P132
+bit 64 O 1 IO_P132 63 1 Z
+bit 63 C 1 *
+bit 62 I 1 IO_P131
+bit 61 O 1 IO_P131 60 1 Z
+bit 60 C 1 *
+bit 59 O 1 *
+bit 58 O 1 *
+bit 57 O 1 *
+bit 56 I 1 IO_P130
+bit 55 O 1 IO_P130 54 1 Z
+bit 54 C 1 *
+bit 53 I 1 IO_P129
+bit 52 O 1 IO_P129 51 1 Z
+bit 51 C 1 *
+bit 50 I 1 IO_P128
+bit 49 O 1 IO_P128 48 1 Z
+bit 48 C 1 *
+bit 47 I 1 IO_P127
+bit 46 O 1 IO_P127 45 1 Z
+bit 45 C 1 *
+bit 44 O 1 *
+bit 43 O 1 *
+bit 42 O 1 *
+bit 41 I 1 IO_P125
+bit 40 O 1 IO_P125 39 1 Z
+bit 39 C 1 *
+bit 38 I 1 IO_P124
+bit 37 O 1 IO_P124 36 1 Z
+bit 36 C 1 *
+bit 35 I 1 IO_P123
+bit 34 O 1 IO_P123 33 1 Z
+bit 33 C 1 *
+bit 32 I 1 IO_P122
+bit 31 O 1 IO_P122 30 1 Z
+bit 30 C 1 *
+bit 29 O 1 *
+bit 28 O 1 *
+bit 27 O 1 *
+bit 26 I 1 IO_P119
+bit 25 O 1 IO_P119 24 1 Z
+bit 24 C 1 *
+bit 23 I 1 IO_P118
+bit 22 O 1 IO_P118 21 1 Z
+bit 21 C 1 *
+bit 20 I 1 IO_P116
+bit 19 O 1 IO_P116 18 1 Z
+bit 18 C 1 *
+bit 17 O 1 *
+bit 16 O 1 *
+bit 15 O 1 *
+bit 14 O 1 *
+bit 13 O 1 *
+bit 12 O 1 *
+bit 11 O 1 *
+bit 10 O 1 *
+bit 9 O 1 *
+bit 8 O 1 *
+bit 7 O 1 *
+bit 6 O 1 *
+bit 5 I 1 IO_P113
+bit 4 O 1 IO_P113 3 1 Z
+bit 3 C 1 *
+bit 2 I 1 IO_P112
+bit 1 O 1 IO_P112 0 1 Z
+bit 0 C 1 *
--- /dev/null
+signal GND1
+signal GND2
+signal GND3
+signal GND4
+signal GND5
+signal GND6
+signal GND7
+signal GND8
+signal GND9
+signal GND10
+signal CCLK_P52
+signal DONE_P51
+signal HSWAP_EN_P98
+signal M0_P25
+signal M1_P24
+signal M2_P26
+signal PROG_B
+signal TCK
+signal TDI
+signal TDO
+signal TMS
+signal VCCAUX1
+signal VCCAUX2
+signal VCCAUX3
+signal VCCAUX4
+signal VCCINT1
+signal VCCINT2
+signal VCCINT3
+signal VCCINT4
+signal VCCO0
+signal VCCO1
+signal VCCO2
+signal VCCO3
+signal VCCO4
+signal VCCO5
+signal VCCO6
+signal VCCO7
+signal IO_P1
+signal IO_P2
+signal IO_P4
+signal IO_P5
+signal IO_P8
+signal IO_P9
+signal IO_P11
+signal IO_P12
+signal IO_P13
+signal IO_P14
+signal IO_P15
+signal IO_P16
+signal IO_P17
+signal IO_P21
+signal IO_P22
+signal IO_P23
+signal IO_P27
+signal IO_P28
+signal IO_P30
+signal IO_P32
+signal IO_P34
+signal IO_P35
+signal IO_P36
+signal IO_P37
+signal IO_P38
+signal IO_P39
+signal IO_P40
+signal IO_P42
+signal IO_P43
+signal IO_P44
+signal IO_P47
+signal IO_P48
+signal IO_P49
+signal IO_P50
+signal IO_P53
+signal IO_P54
+signal IO_P55
+signal IO_P59
+signal IO_P60
+signal IO_P61
+signal IO_P62
+signal IO_P63
+signal IO_P64
+signal IO_P65
+signal IO_P67
+signal IO_P68
+signal IO_P71
+signal IO_P72
+signal IO_P74
+signal IO_P75
+signal IO_P79
+signal IO_P80
+signal IO_P81
+signal IO_P85
+signal IO_P86
+signal IO_P87
+signal IO_P88
+signal IO_P89
+signal IO_P90
+signal IO_P91
+signal IO_P92
+signal IO_P96
+
+register BSR 383
+register BR 1
+register DIR 32
+
+instruction length 6
+
+instruction EXTEST 000000 BSR
+instruction SAMPLE/PRELOAD 000001 BSR
+instruction IDCODE 001001 DIR
+instruction BYPASS 111111 BR
+
+bit 382 I 1 IO_P75
+bit 381 O 1 IO_P75 380 1 Z
+bit 380 C 1 *
+bit 379 I 1 IO_P74
+bit 378 O 1 IO_P74 377 1 Z
+bit 377 C 1 *
+bit 376 O 1 *
+bit 375 O 1 *
+bit 374 O 1 *
+bit 373 O 1 *
+bit 372 O 1 *
+bit 371 O 1 *
+bit 370 O 1 *
+bit 369 O 1 *
+bit 368 O 1 *
+bit 367 O 1 *
+bit 366 O 1 *
+bit 365 O 1 *
+bit 364 I 1 IO_P72
+bit 363 O 1 IO_P72 362 1 Z
+bit 362 C 1 *
+bit 361 I 1 IO_P71
+bit 360 O 1 IO_P71 359 1 Z
+bit 359 C 1 *
+bit 358 O 1 *
+bit 357 O 1 *
+bit 356 O 1 *
+bit 355 O 1 *
+bit 354 O 1 *
+bit 353 O 1 *
+bit 352 O 1 *
+bit 351 O 1 *
+bit 350 O 1 *
+bit 349 O 1 *
+bit 348 O 1 *
+bit 347 O 1 *
+bit 346 I 1 IO_P68
+bit 345 O 1 IO_P68 344 1 Z
+bit 344 C 1 *
+bit 343 I 1 IO_P67
+bit 342 O 1 IO_P67 341 1 Z
+bit 341 C 1 *
+bit 340 I 1 IO_P65
+bit 339 O 1 IO_P65 338 1 Z
+bit 338 C 1 *
+bit 337 I 1 IO_P64
+bit 336 O 1 IO_P64 335 1 Z
+bit 335 C 1 *
+bit 334 I 1 IO_P63
+bit 333 O 1 IO_P63 332 1 Z
+bit 332 C 1 *
+bit 331 I 1 IO_P62
+bit 330 O 1 IO_P62 329 1 Z
+bit 329 C 1 *
+bit 328 I 1 IO_P61
+bit 327 O 1 IO_P61 326 1 Z
+bit 326 C 1 *
+bit 325 I 1 IO_P60
+bit 324 O 1 IO_P60 323 1 Z
+bit 323 C 1 *
+bit 322 I 1 IO_P59
+bit 321 O 1 IO_P59 320 1 Z
+bit 320 C 1 *
+bit 319 O 1 *
+bit 318 O 1 *
+bit 317 O 1 *
+bit 316 O 1 *
+bit 315 O 1 *
+bit 314 O 1 *
+bit 313 O 1 *
+bit 312 O 1 *
+bit 311 O 1 *
+bit 310 O 1 *
+bit 309 O 1 *
+bit 308 O 1 *
+bit 307 O 1 *
+bit 306 O 1 *
+bit 305 O 1 *
+bit 304 I 1 IO_P55
+bit 303 O 1 IO_P55 302 1 Z
+bit 302 C 1 *
+bit 301 O 1 *
+bit 300 O 1 *
+bit 299 O 1 *
+bit 298 O 1 *
+bit 297 O 1 *
+bit 296 O 1 *
+bit 295 O 1 *
+bit 294 O 1 *
+bit 293 O 1 *
+bit 292 I 1 IO_P54
+bit 291 O 1 IO_P54 290 1 Z
+bit 290 C 1 *
+bit 289 I 1 IO_P53
+bit 288 O 1 IO_P53 287 1 Z
+bit 287 C 1 *
+bit 286 I 1 CCLK_P52
+bit 285 O 1 CCLK_P52 284 1 Z
+bit 284 C 1 *
+bit 283 I 1 DONE_P51
+bit 282 O 1 DONE_P51 281 1 Z
+bit 281 C 1 *
+bit 280 O 1 *
+bit 279 O 1 *
+bit 278 O 1 *
+bit 277 I 1 IO_P50
+bit 276 O 1 IO_P50 275 1 Z
+bit 275 C 1 *
+bit 274 I 1 IO_P49
+bit 273 O 1 IO_P49 272 1 Z
+bit 272 C 1 *
+bit 271 O 1 *
+bit 270 O 1 *
+bit 269 O 1 *
+bit 268 O 1 *
+bit 267 O 1 *
+bit 266 O 1 *
+bit 265 O 1 *
+bit 264 O 1 *
+bit 263 O 1 *
+bit 262 I 1 IO_P48
+bit 261 O 1 IO_P48 260 1 Z
+bit 260 C 1 *
+bit 259 I 1 IO_P47
+bit 258 O 1 IO_P47 257 1 Z
+bit 257 C 1 *
+bit 256 I 1 IO_P44
+bit 255 O 1 IO_P44 254 1 Z
+bit 254 C 1 *
+bit 253 I 1 IO_P43
+bit 252 O 1 IO_P43 251 1 Z
+bit 251 C 1 *
+bit 250 O 1 *
+bit 249 O 1 *
+bit 248 O 1 *
+bit 247 I 1 IO_P42
+bit 246 O 1 IO_P42 245 1 Z
+bit 245 C 1 *
+bit 244 I 1 IO_P40
+bit 243 O 1 IO_P40 242 1 Z
+bit 242 C 1 *
+bit 241 I 1 IO_P39
+bit 240 O 1 IO_P39 239 1 Z
+bit 239 C 1 *
+bit 238 I 1 IO_P38
+bit 237 O 1 IO_P38 236 1 Z
+bit 236 C 1 *
+bit 235 O 1 *
+bit 234 O 1 *
+bit 233 O 1 *
+bit 232 I 1 IO_P37
+bit 231 O 1 IO_P37 230 1 Z
+bit 230 C 1 *
+bit 229 I 1 IO_P36
+bit 228 O 1 IO_P36 227 1 Z
+bit 227 C 1 *
+bit 226 I 1 IO_P35
+bit 225 O 1 IO_P35 224 1 Z
+bit 224 C 1 *
+bit 223 I 1 IO_P34
+bit 222 O 1 IO_P34 221 1 Z
+bit 221 C 1 *
+bit 220 O 1 *
+bit 219 O 1 *
+bit 218 O 1 *
+bit 217 I 1 IO_P32
+bit 216 O 1 IO_P32 215 1 Z
+bit 215 C 1 *
+bit 214 I 1 IO_P30
+bit 213 O 1 IO_P30 212 1 Z
+bit 212 C 1 *
+bit 211 O 1 *
+bit 210 O 1 *
+bit 209 O 1 *
+bit 208 O 1 *
+bit 207 O 1 *
+bit 206 O 1 *
+bit 205 O 1 *
+bit 204 O 1 *
+bit 203 O 1 *
+bit 202 O 1 *
+bit 201 O 1 *
+bit 200 O 1 *
+bit 199 O 1 *
+bit 198 O 1 *
+bit 197 O 1 *
+bit 196 I 1 IO_P28
+bit 195 O 1 IO_P28 194 1 Z
+bit 194 C 1 *
+bit 193 I 1 IO_P27
+bit 192 O 1 IO_P27 191 1 Z
+bit 191 C 1 *
+bit 190 I 1 M2_P26
+bit 189 I 1 M0_P25
+bit 188 I 1 M1_P24
+bit 187 I 1 IO_P23
+bit 186 O 1 IO_P23 185 1 Z
+bit 185 C 1 *
+bit 184 I 1 IO_P22
+bit 183 O 1 IO_P22 182 1 Z
+bit 182 C 1 *
+bit 181 O 1 *
+bit 180 O 1 *
+bit 179 O 1 *
+bit 178 O 1 *
+bit 177 O 1 *
+bit 176 O 1 *
+bit 175 O 1 *
+bit 174 O 1 *
+bit 173 O 1 *
+bit 172 I 1 IO_P21
+bit 171 O 1 IO_P21 170 1 Z
+bit 170 C 1 *
+bit 169 O 1 *
+bit 168 O 1 *
+bit 167 O 1 *
+bit 166 O 1 *
+bit 165 O 1 *
+bit 164 O 1 *
+bit 163 O 1 *
+bit 162 O 1 *
+bit 161 O 1 *
+bit 160 O 1 *
+bit 159 O 1 *
+bit 158 O 1 *
+bit 157 O 1 *
+bit 156 O 1 *
+bit 155 O 1 *
+bit 154 I 1 IO_P17
+bit 153 O 1 IO_P17 152 1 Z
+bit 152 C 1 *
+bit 151 I 1 IO_P16
+bit 150 O 1 IO_P16 149 1 Z
+bit 149 C 1 *
+bit 148 I 1 IO_P15
+bit 147 O 1 IO_P15 146 1 Z
+bit 146 C 1 *
+bit 145 I 1 IO_P14
+bit 144 O 1 IO_P14 143 1 Z
+bit 143 C 1 *
+bit 142 I 1 IO_P13
+bit 141 O 1 IO_P13 140 1 Z
+bit 140 C 1 *
+bit 139 I 1 IO_P12
+bit 138 O 1 IO_P12 137 1 Z
+bit 137 C 1 *
+bit 136 I 1 IO_P11
+bit 135 O 1 IO_P11 134 1 Z
+bit 134 C 1 *
+bit 133 O 1 *
+bit 132 O 1 *
+bit 131 O 1 *
+bit 130 O 1 *
+bit 129 O 1 *
+bit 128 O 1 *
+bit 127 I 1 IO_P9
+bit 126 O 1 IO_P9 125 1 Z
+bit 125 C 1 *
+bit 124 I 1 IO_P8
+bit 123 O 1 IO_P8 122 1 Z
+bit 122 C 1 *
+bit 121 O 1 *
+bit 120 O 1 *
+bit 119 O 1 *
+bit 118 O 1 *
+bit 117 O 1 *
+bit 116 O 1 *
+bit 115 I 1 IO_P5
+bit 114 O 1 IO_P5 113 1 Z
+bit 113 C 1 *
+bit 112 I 1 IO_P4
+bit 111 O 1 IO_P4 110 1 Z
+bit 110 C 1 *
+bit 109 O 1 *
+bit 108 O 1 *
+bit 107 O 1 *
+bit 106 O 1 *
+bit 105 O 1 *
+bit 104 O 1 *
+bit 103 O 1 *
+bit 102 O 1 *
+bit 101 O 1 *
+bit 100 O 1 *
+bit 99 O 1 *
+bit 98 O 1 *
+bit 97 I 1 IO_P2
+bit 96 O 1 IO_P2 95 1 Z
+bit 95 C 1 *
+bit 94 I 1 IO_P1
+bit 93 O 1 IO_P1 92 1 Z
+bit 92 C 1 *
+bit 91 O 1 *
+bit 90 I 1 HSWAP_EN_P98
+bit 89 O 1 *
+bit 88 O 1 *
+bit 87 O 1 *
+bit 86 I 1 IO_P97
+bit 85 O 1 IO_P97 84 1 Z
+bit 84 C 1 *
+bit 83 I 1 IO_P96
+bit 82 O 1 IO_P96 81 1 Z
+bit 81 C 1 *
+bit 80 O 1 *
+bit 79 O 1 *
+bit 78 O 1 *
+bit 77 O 1 *
+bit 76 O 1 *
+bit 75 O 1 *
+bit 74 O 1 *
+bit 73 O 1 *
+bit 72 O 1 *
+bit 71 O 1 *
+bit 70 O 1 *
+bit 69 O 1 *
+bit 68 O 1 *
+bit 67 O 1 *
+bit 66 O 1 *
+bit 65 O 1 *
+bit 64 O 1 *
+bit 63 O 1 *
+bit 62 O 1 *
+bit 61 O 1 *
+bit 60 O 1 *
+bit 59 O 1 *
+bit 58 O 1 *
+bit 57 O 1 *
+bit 56 I 1 IO_P92
+bit 55 O 1 IO_P92 54 1 Z
+bit 54 C 1 *
+bit 53 I 1 IO_P91
+bit 52 O 1 IO_P91 51 1 Z
+bit 51 C 1 *
+bit 50 I 1 IO_P90
+bit 49 O 1 IO_P90 48 1 Z
+bit 48 C 1 *
+bit 47 I 1 IO_P89
+bit 46 O 1 IO_P89 45 1 Z
+bit 45 C 1 *
+bit 44 O 1 *
+bit 43 O 1 *
+bit 42 O 1 *
+bit 41 I 1 IO_P88
+bit 40 O 1 IO_P88 39 1 Z
+bit 39 C 1 *
+bit 38 I 1 IO_P87
+bit 37 O 1 IO_P87 36 1 Z
+bit 36 C 1 *
+bit 35 I 1 IO_P86
+bit 34 O 1 IO_P86 33 1 Z
+bit 33 C 1 *
+bit 32 I 1 IO_P85
+bit 31 O 1 IO_P85 30 1 Z
+bit 30 C 1 *
+bit 29 O 1 *
+bit 28 O 1 *
+bit 27 O 1 *
+bit 26 O 1 *
+bit 25 O 1 *
+bit 24 O 1 *
+bit 23 O 1 *
+bit 22 O 1 *
+bit 21 O 1 *
+bit 20 O 1 *
+bit 19 O 1 *
+bit 18 O 1 *
+bit 17 O 1 *
+bit 16 O 1 *
+bit 15 O 1 *
+bit 14 I 1 IO_P81
+bit 13 O 1 IO_P81 12 1 Z
+bit 12 C 1 *
+bit 11 O 1 *
+bit 10 O 1 *
+bit 9 O 1 *
+bit 8 O 1 *
+bit 7 O 1 *
+bit 6 O 1 *
+bit 5 I 1 IO_P80
+bit 4 O 1 IO_P80 3 1 Z
+bit 3 C 1 *
+bit 2 I 1 IO_P79
+bit 1 O 1 IO_P79 0 1 Z
+bit 0 C 1 *
--- /dev/null
+0000 xc3s5000 0
--- /dev/null
+signal GND1
+signal GND2
+signal GND3
+signal GND4
+signal GND5
+signal GND6
+signal GND7
+signal GND8
+signal GND9
+signal GND10
+signal GND11
+signal GND12
+signal GND13
+signal GND14
+signal GND15
+signal GND16
+signal GND17
+signal GND18
+signal GND19
+signal GND20
+signal GND21
+signal GND22
+signal GND23
+signal GND24
+signal GND25
+signal GND26
+signal GND27
+signal GND28
+signal GND29
+signal GND30
+signal GND31
+signal GND32
+signal GND33
+signal GND34
+signal GND35
+signal GND36
+signal GND37
+signal GND38
+signal GND39
+signal GND40
+signal GND41
+signal GND42
+signal GND43
+signal GND44
+signal GND45
+signal GND46
+signal GND47
+signal GND48
+signal GND49
+signal GND50
+signal GND51
+signal GND52
+signal GND53
+signal GND54
+signal GND55
+signal GND56
+signal GND57
+signal GND58
+signal GND59
+signal GND60
+signal GND61
+signal GND62
+signal GND63
+signal GND64
+signal GND65
+signal GND66
+signal GND67
+signal GND68
+signal GND69
+signal GND70
+signal GND71
+signal GND72
+signal GND73
+signal GND74
+signal GND75
+signal GND76
+signal GND77
+signal GND78
+signal GND79
+signal GND80
+signal GND81
+signal GND82
+signal GND83
+signal GND84
+signal GND85
+signal GND86
+signal GND87
+signal GND88
+signal GND89
+signal GND90
+signal GND91
+signal GND92
+signal GND93
+signal GND94
+signal GND95
+signal GND96
+signal GND97
+signal GND98
+signal GND99
+signal GND100
+signal GND101
+signal GND102
+signal GND103
+signal GND104
+signal GND105
+signal GND106
+signal GND107
+signal GND108
+signal GND109
+signal GND110
+signal GND111
+signal GND112
+signal GND113
+signal GND114
+signal GND115
+signal GND116
+signal GND117
+signal GND118
+signal GND119
+signal GND120
+signal GND121
+signal GND122
+signal GND123
+signal GND124
+signal GND125
+signal GND126
+signal GND127
+signal GND128
+signal GND129
+signal GND130
+signal GND131
+signal GND132
+signal GND133
+signal GND134
+signal GND135
+signal GND136
+signal GND137
+signal GND138
+signal GND139
+signal GND140
+signal GND141
+signal GND142
+signal GND143
+signal GND144
+signal GND145
+signal GND146
+signal GND147
+signal GND148
+signal NC1
+signal NC2
+signal NC3
+signal NC4
+signal NC5
+signal CCLK_PAD706
+signal DONE_PAD705
+signal HSWAP_EN_PAD147
+signal M0_PAD412
+signal M1_PAD411
+signal M2_PAD413
+signal PROG_B
+signal TCK
+signal TDI
+signal TDO
+signal TMS
+signal VCCAUX1
+signal VCCAUX2
+signal VCCAUX3
+signal VCCAUX4
+signal VCCAUX5
+signal VCCAUX6
+signal VCCAUX7
+signal VCCAUX8
+signal VCCAUX9
+signal VCCAUX10
+signal VCCAUX11
+signal VCCAUX12
+signal VCCAUX13
+signal VCCAUX14
+signal VCCAUX15
+signal VCCAUX16
+signal VCCAUX17
+signal VCCAUX18
+signal VCCAUX19
+signal VCCAUX20
+signal VCCAUX21
+signal VCCAUX22
+signal VCCAUX23
+signal VCCAUX24
+signal VCCAUX25
+signal VCCAUX26
+signal VCCAUX27
+signal VCCAUX28
+signal VCCAUX29
+signal VCCAUX30
+signal VCCAUX31
+signal VCCAUX32
+signal VCCINT1
+signal VCCINT2
+signal VCCINT3
+signal VCCINT4
+signal VCCINT5
+signal VCCINT6
+signal VCCINT7
+signal VCCINT8
+signal VCCINT9
+signal VCCINT10
+signal VCCINT11
+signal VCCINT12
+signal VCCINT13
+signal VCCINT14
+signal VCCINT15
+signal VCCINT16
+signal VCCINT17
+signal VCCINT18
+signal VCCINT19
+signal VCCINT20
+signal VCCINT21
+signal VCCINT22
+signal VCCINT23
+signal VCCINT24
+signal VCCINT25
+signal VCCINT26
+signal VCCINT27
+signal VCCINT28
+signal VCCINT29
+signal VCCINT30
+signal VCCINT31
+signal VCCINT32
+signal VCCINT33
+signal VCCINT34
+signal VCCINT35
+signal VCCINT36
+signal VCCINT37
+signal VCCINT38
+signal VCCINT39
+signal VCCINT40
+signal VCCO01
+signal VCCO02
+signal VCCO03
+signal VCCO04
+signal VCCO05
+signal VCCO06
+signal VCCO07
+signal VCCO08
+signal VCCO09
+signal VCCO010
+signal VCCO011
+signal VCCO012
+signal VCCO013
+signal VCCO11
+signal VCCO12
+signal VCCO13
+signal VCCO14
+signal VCCO15
+signal VCCO16
+signal VCCO17
+signal VCCO18
+signal VCCO19
+signal VCCO110
+signal VCCO111
+signal VCCO112
+signal VCCO113
+signal VCCO21
+signal VCCO22
+signal VCCO23
+signal VCCO24
+signal VCCO25
+signal VCCO26
+signal VCCO27
+signal VCCO28
+signal VCCO29
+signal VCCO210
+signal VCCO211
+signal VCCO31
+signal VCCO32
+signal VCCO33
+signal VCCO34
+signal VCCO35
+signal VCCO36
+signal VCCO37
+signal VCCO38
+signal VCCO39
+signal VCCO310
+signal VCCO311
+signal VCCO41
+signal VCCO42
+signal VCCO43
+signal VCCO44
+signal VCCO45
+signal VCCO46
+signal VCCO47
+signal VCCO48
+signal VCCO49
+signal VCCO410
+signal VCCO411
+signal VCCO412
+signal VCCO413
+signal VCCO51
+signal VCCO52
+signal VCCO53
+signal VCCO54
+signal VCCO55
+signal VCCO56
+signal VCCO57
+signal VCCO58
+signal VCCO59
+signal VCCO510
+signal VCCO511
+signal VCCO512
+signal VCCO513
+signal VCCO61
+signal VCCO62
+signal VCCO63
+signal VCCO64
+signal VCCO65
+signal VCCO66
+signal VCCO67
+signal VCCO68
+signal VCCO69
+signal VCCO610
+signal VCCO611
+signal VCCO71
+signal VCCO72
+signal VCCO73
+signal VCCO74
+signal VCCO75
+signal VCCO76
+signal VCCO77
+signal VCCO78
+signal VCCO79
+signal VCCO710
+signal VCCO711
+signal IO_PAD2
+signal IO_PAD3
+signal IO_PAD4
+signal IO_PAD5
+signal IO_PAD7
+signal IO_PAD9
+signal IO_PAD10
+signal IO_PAD11
+signal IO_PAD13
+signal IO_PAD14
+signal IO_PAD15
+signal IO_PAD17
+signal IO_PAD19
+signal IO_PAD21
+signal IO_PAD23
+signal IO_PAD25
+signal IO_PAD26
+signal IO_PAD27
+signal IO_PAD28
+signal IO_PAD29
+signal IO_PAD31
+signal IO_PAD33
+signal IO_PAD34
+signal IO_PAD35
+signal IO_PAD37
+signal IO_PAD38
+signal IO_PAD39
+signal IO_PAD41
+signal IO_PAD43
+signal IO_PAD45
+signal IO_PAD46
+signal IO_PAD47
+signal IO_PAD49
+signal IO_PAD50
+signal IO_PAD51
+signal IO_PAD53
+signal IO_PAD55
+signal IO_PAD57
+signal IO_PAD58
+signal IO_PAD59
+signal IO_PAD61
+signal IO_PAD62
+signal IO_PAD63
+signal IO_PAD65
+signal IO_PAD67
+signal IO_PAD69
+signal IO_PAD70
+signal IO_PAD71
+signal IO_PAD73
+signal IO_PAD74
+signal IO_PAD75
+signal IO_PAD77
+signal IO_PAD79
+signal IO_PAD80
+signal IO_PAD81
+signal IO_PAD83
+signal IO_PAD84
+signal IO_PAD85
+signal IO_PAD86
+signal IO_PAD87
+signal IO_PAD89
+signal IO_PAD91
+signal IO_PAD93
+signal IO_PAD95
+signal IO_PAD97
+signal IO_PAD98
+signal IO_PAD99
+signal IO_PAD101
+signal IO_PAD103
+signal IO_PAD104
+signal IO_PAD105
+signal IO_PAD107
+signal IO_PAD108
+signal IO_PAD109
+signal IO_PAD110
+signal IO_PAD111
+signal IO_PAD113
+signal IO_PAD115
+signal IO_PAD117
+signal IO_PAD118
+signal IO_PAD119
+signal IO_PAD121
+signal IO_PAD122
+signal IO_PAD123
+signal IO_PAD125
+signal IO_PAD127
+signal IO_PAD129
+signal IO_PAD131
+signal IO_PAD132
+signal IO_PAD133
+signal IO_PAD134
+signal IO_PAD135
+signal IO_PAD137
+signal IO_PAD139
+signal IO_PAD140
+signal IO_PAD141
+signal IO_PAD142
+signal IO_PAD143
+signal IO_PAD145
+signal IO_PAD146
+signal IO_PAD151
+signal IO_PAD152
+signal IO_PAD153
+signal IO_PAD154
+signal IO_PAD155
+signal IO_PAD156
+signal IO_PAD158
+signal IO_PAD159
+signal IO_PAD160
+signal IO_PAD162
+signal IO_PAD163
+signal IO_PAD164
+signal IO_PAD166
+signal IO_PAD167
+signal IO_PAD168
+signal IO_PAD170
+signal IO_PAD172
+signal IO_PAD174
+signal IO_PAD175
+signal IO_PAD176
+signal IO_PAD177
+signal IO_PAD178
+signal IO_PAD180
+signal IO_PAD182
+signal IO_PAD183
+signal IO_PAD184
+signal IO_PAD185
+signal IO_PAD186
+signal IO_PAD187
+signal IO_PAD188
+signal IO_PAD190
+signal IO_PAD192
+signal IO_PAD193
+signal IO_PAD194
+signal IO_PAD195
+signal IO_PAD196
+signal IO_PAD198
+signal IO_PAD200
+signal IO_PAD201
+signal IO_PAD202
+signal IO_PAD204
+signal IO_PAD206
+signal IO_PAD207
+signal IO_PAD208
+signal IO_PAD210
+signal IO_PAD211
+signal IO_PAD212
+signal IO_PAD213
+signal IO_PAD214
+signal IO_PAD216
+signal IO_PAD218
+signal IO_PAD219
+signal IO_PAD220
+signal IO_PAD221
+signal IO_PAD222
+signal IO_PAD224
+signal IO_PAD225
+signal IO_PAD226
+signal IO_PAD228
+signal IO_PAD230
+signal IO_PAD231
+signal IO_PAD232
+signal IO_PAD234
+signal IO_PAD236
+signal IO_PAD237
+signal IO_PAD238
+signal IO_PAD239
+signal IO_PAD240
+signal IO_PAD242
+signal IO_PAD244
+signal IO_PAD245
+signal IO_PAD246
+signal IO_PAD247
+signal IO_PAD248
+signal IO_PAD250
+signal IO_PAD252
+signal IO_PAD253
+signal IO_PAD254
+signal IO_PAD255
+signal IO_PAD256
+signal IO_PAD258
+signal IO_PAD259
+signal IO_PAD260
+signal IO_PAD262
+signal IO_PAD264
+signal IO_PAD265
+signal IO_PAD266
+signal IO_PAD268
+signal IO_PAD270
+signal IO_PAD271
+signal IO_PAD272
+signal IO_PAD273
+signal IO_PAD274
+signal IO_PAD276
+signal IO_PAD278
+signal IO_PAD279
+signal IO_PAD281
+signal IO_PAD282
+signal IO_PAD284
+signal IO_PAD286
+signal IO_PAD287
+signal IO_PAD288
+signal IO_PAD289
+signal IO_PAD290
+signal IO_PAD292
+signal IO_PAD294
+signal IO_PAD295
+signal IO_PAD296
+signal IO_PAD298
+signal IO_PAD300
+signal IO_PAD301
+signal IO_PAD302
+signal IO_PAD304
+signal IO_PAD305
+signal IO_PAD306
+signal IO_PAD307
+signal IO_PAD308
+signal IO_PAD310
+signal IO_PAD312
+signal IO_PAD313
+signal IO_PAD314
+signal IO_PAD315
+signal IO_PAD316
+signal IO_PAD318
+signal IO_PAD320
+signal IO_PAD321
+signal IO_PAD322
+signal IO_PAD323
+signal IO_PAD324
+signal IO_PAD326
+signal IO_PAD328
+signal IO_PAD329
+signal IO_PAD330
+signal IO_PAD332
+signal IO_PAD334
+signal IO_PAD335
+signal IO_PAD336
+signal IO_PAD338
+signal IO_PAD339
+signal IO_PAD340
+signal IO_PAD341
+signal IO_PAD342
+signal IO_PAD344
+signal IO_PAD346
+signal IO_PAD347
+signal IO_PAD348
+signal IO_PAD349
+signal IO_PAD350
+signal IO_PAD352
+signal IO_PAD353
+signal IO_PAD354
+signal IO_PAD356
+signal IO_PAD358
+signal IO_PAD359
+signal IO_PAD360
+signal IO_PAD362
+signal IO_PAD364
+signal IO_PAD365
+signal IO_PAD366
+signal IO_PAD367
+signal IO_PAD368
+signal IO_PAD370
+signal IO_PAD372
+signal IO_PAD373
+signal IO_PAD374
+signal IO_PAD375
+signal IO_PAD376
+signal IO_PAD377
+signal IO_PAD378
+signal IO_PAD380
+signal IO_PAD382
+signal IO_PAD383
+signal IO_PAD384
+signal IO_PAD385
+signal IO_PAD386
+signal IO_PAD388
+signal IO_PAD390
+signal IO_PAD392
+signal IO_PAD393
+signal IO_PAD394
+signal IO_PAD396
+signal IO_PAD397
+signal IO_PAD398
+signal IO_PAD400
+signal IO_PAD401
+signal IO_PAD402
+signal IO_PAD404
+signal IO_PAD405
+signal IO_PAD406
+signal IO_PAD407
+signal IO_PAD408
+signal IO_PAD409
+signal IO_PAD414
+signal IO_PAD415
+signal IO_PAD417
+signal IO_PAD418
+signal IO_PAD419
+signal IO_PAD420
+signal IO_PAD421
+signal IO_PAD423
+signal IO_PAD425
+signal IO_PAD426
+signal IO_PAD427
+signal IO_PAD428
+signal IO_PAD429
+signal IO_PAD431
+signal IO_PAD433
+signal IO_PAD435
+signal IO_PAD437
+signal IO_PAD438
+signal IO_PAD439
+signal IO_PAD441
+signal IO_PAD442
+signal IO_PAD443
+signal IO_PAD445
+signal IO_PAD447
+signal IO_PAD449
+signal IO_PAD450
+signal IO_PAD451
+signal IO_PAD452
+signal IO_PAD453
+signal IO_PAD455
+signal IO_PAD456
+signal IO_PAD457
+signal IO_PAD459
+signal IO_PAD461
+signal IO_PAD462
+signal IO_PAD463
+signal IO_PAD465
+signal IO_PAD467
+signal IO_PAD469
+signal IO_PAD471
+signal IO_PAD473
+signal IO_PAD474
+signal IO_PAD475
+signal IO_PAD476
+signal IO_PAD477
+signal IO_PAD479
+signal IO_PAD480
+signal IO_PAD481
+signal IO_PAD483
+signal IO_PAD485
+signal IO_PAD486
+signal IO_PAD487
+signal IO_PAD489
+signal IO_PAD490
+signal IO_PAD491
+signal IO_PAD493
+signal IO_PAD495
+signal IO_PAD497
+signal IO_PAD498
+signal IO_PAD499
+signal IO_PAD501
+signal IO_PAD502
+signal IO_PAD503
+signal IO_PAD505
+signal IO_PAD507
+signal IO_PAD509
+signal IO_PAD510
+signal IO_PAD511
+signal IO_PAD513
+signal IO_PAD514
+signal IO_PAD515
+signal IO_PAD517
+signal IO_PAD519
+signal IO_PAD521
+signal IO_PAD522
+signal IO_PAD523
+signal IO_PAD525
+signal IO_PAD526
+signal IO_PAD527
+signal IO_PAD529
+signal IO_PAD531
+signal IO_PAD532
+signal IO_PAD533
+signal IO_PAD534
+signal IO_PAD535
+signal IO_PAD537
+signal IO_PAD539
+signal IO_PAD541
+signal IO_PAD543
+signal IO_PAD545
+signal IO_PAD546
+signal IO_PAD547
+signal IO_PAD549
+signal IO_PAD550
+signal IO_PAD551
+signal IO_PAD553
+signal IO_PAD555
+signal IO_PAD556
+signal IO_PAD557
+signal IO_PAD558
+signal IO_PAD560
+signal IO_PAD561
+signal IO_PAD562
+signal IO_PAD563
+signal IO_PAD565
+signal IO_PAD567
+signal IO_PAD568
+signal IO_PAD569
+signal IO_PAD571
+signal IO_PAD572
+signal IO_PAD573
+signal IO_PAD575
+signal IO_PAD577
+signal IO_PAD579
+signal IO_PAD581
+signal IO_PAD583
+signal IO_PAD584
+signal IO_PAD585
+signal IO_PAD586
+signal IO_PAD587
+signal IO_PAD589
+signal IO_PAD591
+signal IO_PAD592
+signal IO_PAD593
+signal IO_PAD595
+signal IO_PAD596
+signal IO_PAD597
+signal IO_PAD599
+signal IO_PAD601
+signal IO_PAD603
+signal IO_PAD604
+signal IO_PAD605
+signal IO_PAD607
+signal IO_PAD608
+signal IO_PAD609
+signal IO_PAD611
+signal IO_PAD613
+signal IO_PAD615
+signal IO_PAD616
+signal IO_PAD617
+signal IO_PAD619
+signal IO_PAD620
+signal IO_PAD621
+signal IO_PAD623
+signal IO_PAD625
+signal IO_PAD627
+signal IO_PAD628
+signal IO_PAD629
+signal IO_PAD631
+signal IO_PAD632
+signal IO_PAD633
+signal IO_PAD635
+signal IO_PAD637
+signal IO_PAD638
+signal IO_PAD639
+signal IO_PAD641
+signal IO_PAD642
+signal IO_PAD643
+signal IO_PAD644
+signal IO_PAD645
+signal IO_PAD647
+signal IO_PAD649
+signal IO_PAD651
+signal IO_PAD653
+signal IO_PAD655
+signal IO_PAD656
+signal IO_PAD657
+signal IO_PAD659
+signal IO_PAD661
+signal IO_PAD662
+signal IO_PAD663
+signal IO_PAD665
+signal IO_PAD666
+signal IO_PAD667
+signal IO_PAD668
+signal IO_PAD669
+signal IO_PAD671
+signal IO_PAD673
+signal IO_PAD675
+signal IO_PAD676
+signal IO_PAD677
+signal IO_PAD679
+signal IO_PAD680
+signal IO_PAD681
+signal IO_PAD683
+signal IO_PAD685
+signal IO_PAD687
+signal IO_PAD689
+signal IO_PAD690
+signal IO_PAD691
+signal IO_PAD692
+signal IO_PAD693
+signal IO_PAD695
+signal IO_PAD697
+signal IO_PAD698
+signal IO_PAD699
+signal IO_PAD700
+signal IO_PAD701
+signal IO_PAD703
+signal IO_PAD704
+signal IO_PAD710
+signal IO_PAD711
+signal IO_PAD712
+signal IO_PAD713
+signal IO_PAD714
+signal IO_PAD715
+signal IO_PAD717
+signal IO_PAD718
+signal IO_PAD719
+signal IO_PAD721
+signal IO_PAD722
+signal IO_PAD723
+signal IO_PAD725
+signal IO_PAD726
+signal IO_PAD727
+signal IO_PAD729
+signal IO_PAD731
+signal IO_PAD733
+signal IO_PAD734
+signal IO_PAD735
+signal IO_PAD736
+signal IO_PAD737
+signal IO_PAD739
+signal IO_PAD741
+signal IO_PAD742
+signal IO_PAD743
+signal IO_PAD744
+signal IO_PAD745
+signal IO_PAD746
+signal IO_PAD747
+signal IO_PAD749
+signal IO_PAD751
+signal IO_PAD752
+signal IO_PAD753
+signal IO_PAD754
+signal IO_PAD755
+signal IO_PAD757
+signal IO_PAD759
+signal IO_PAD760
+signal IO_PAD761
+signal IO_PAD763
+signal IO_PAD765
+signal IO_PAD766
+signal IO_PAD767
+signal IO_PAD769
+signal IO_PAD770
+signal IO_PAD771
+signal IO_PAD772
+signal IO_PAD773
+signal IO_PAD775
+signal IO_PAD777
+signal IO_PAD778
+signal IO_PAD779
+signal IO_PAD780
+signal IO_PAD781
+signal IO_PAD783
+signal IO_PAD784
+signal IO_PAD785
+signal IO_PAD787
+signal IO_PAD789
+signal IO_PAD790
+signal IO_PAD791
+signal IO_PAD793
+signal IO_PAD795
+signal IO_PAD796
+signal IO_PAD797
+signal IO_PAD798
+signal IO_PAD799
+signal IO_PAD801
+signal IO_PAD803
+signal IO_PAD804
+signal IO_PAD805
+signal IO_PAD806
+signal IO_PAD807
+signal IO_PAD809
+signal IO_PAD811
+signal IO_PAD812
+signal IO_PAD813
+signal IO_PAD814
+signal IO_PAD815
+signal IO_PAD817
+signal IO_PAD818
+signal IO_PAD819
+signal IO_PAD821
+signal IO_PAD823
+signal IO_PAD824
+signal IO_PAD825
+signal IO_PAD827
+signal IO_PAD829
+signal IO_PAD830
+signal IO_PAD831
+signal IO_PAD832
+signal IO_PAD833
+signal IO_PAD835
+signal IO_PAD837
+signal IO_PAD838
+signal IO_PAD840
+signal IO_PAD841
+signal IO_PAD843
+signal IO_PAD845
+signal IO_PAD846
+signal IO_PAD847
+signal IO_PAD848
+signal IO_PAD849
+signal IO_PAD851
+signal IO_PAD853
+signal IO_PAD854
+signal IO_PAD855
+signal IO_PAD857
+signal IO_PAD859
+signal IO_PAD860
+signal IO_PAD861
+signal IO_PAD863
+signal IO_PAD864
+signal IO_PAD865
+signal IO_PAD866
+signal IO_PAD867
+signal IO_PAD869
+signal IO_PAD871
+signal IO_PAD872
+signal IO_PAD873
+signal IO_PAD874
+signal IO_PAD875
+signal IO_PAD877
+signal IO_PAD879
+signal IO_PAD880
+signal IO_PAD881
+signal IO_PAD882
+signal IO_PAD883
+signal IO_PAD885
+signal IO_PAD887
+signal IO_PAD888
+signal IO_PAD889
+signal IO_PAD891
+signal IO_PAD893
+signal IO_PAD894
+signal IO_PAD895
+signal IO_PAD897
+signal IO_PAD898
+signal IO_PAD899
+signal IO_PAD900
+signal IO_PAD901
+signal IO_PAD903
+signal IO_PAD905
+signal IO_PAD906
+signal IO_PAD907
+signal IO_PAD908
+signal IO_PAD909
+signal IO_PAD911
+signal IO_PAD912
+signal IO_PAD913
+signal IO_PAD915
+signal IO_PAD917
+signal IO_PAD918
+signal IO_PAD919
+signal IO_PAD921
+signal IO_PAD923
+signal IO_PAD924
+signal IO_PAD925
+signal IO_PAD926
+signal IO_PAD927
+signal IO_PAD929
+signal IO_PAD931
+signal IO_PAD932
+signal IO_PAD933
+signal IO_PAD934
+signal IO_PAD935
+signal IO_PAD936
+signal IO_PAD937
+signal IO_PAD939
+signal IO_PAD941
+signal IO_PAD942
+signal IO_PAD943
+signal IO_PAD944
+signal IO_PAD945
+signal IO_PAD947
+signal IO_PAD949
+signal IO_PAD951
+signal IO_PAD952
+signal IO_PAD953
+signal IO_PAD955
+signal IO_PAD956
+signal IO_PAD957
+signal IO_PAD959
+signal IO_PAD960
+signal IO_PAD961
+signal IO_PAD963
+signal IO_PAD964
+signal IO_PAD965
+signal IO_PAD966
+signal IO_PAD967
+signal IO_PAD968
+signal IO_PAD973
+signal IO_PAD974
+signal IO_PAD976
+signal IO_PAD977
+signal IO_PAD978
+signal IO_PAD979
+signal IO_PAD980
+signal IO_PAD982
+signal IO_PAD984
+signal IO_PAD985
+signal IO_PAD986
+signal IO_PAD987
+signal IO_PAD988
+signal IO_PAD990
+signal IO_PAD992
+signal IO_PAD994
+signal IO_PAD996
+signal IO_PAD997
+signal IO_PAD998
+signal IO_PAD1000
+signal IO_PAD1001
+signal IO_PAD1002
+signal IO_PAD1004
+signal IO_PAD1006
+signal IO_PAD1008
+signal IO_PAD1009
+signal IO_PAD1010
+signal IO_PAD1011
+signal IO_PAD1012
+signal IO_PAD1014
+signal IO_PAD1015
+signal IO_PAD1016
+signal IO_PAD1018
+signal IO_PAD1020
+signal IO_PAD1021
+signal IO_PAD1022
+signal IO_PAD1024
+signal IO_PAD1026
+signal IO_PAD1028
+signal IO_PAD1030
+signal IO_PAD1032
+signal IO_PAD1033
+signal IO_PAD1034
+signal IO_PAD1035
+signal IO_PAD1036
+signal IO_PAD1038
+signal IO_PAD1039
+signal IO_PAD1040
+signal IO_PAD1042
+signal IO_PAD1044
+signal IO_PAD1045
+signal IO_PAD1046
+signal IO_PAD1048
+signal IO_PAD1049
+signal IO_PAD1050
+signal IO_PAD1052
+signal IO_PAD1054
+signal IO_PAD1056
+signal IO_PAD1057
+signal IO_PAD1058
+signal IO_PAD1060
+signal IO_PAD1061
+signal IO_PAD1062
+signal IO_PAD1064
+signal IO_PAD1066
+signal IO_PAD1068
+signal IO_PAD1069
+signal IO_PAD1070
+signal IO_PAD1072
+signal IO_PAD1073
+signal IO_PAD1074
+signal IO_PAD1076
+signal IO_PAD1078
+signal IO_PAD1080
+signal IO_PAD1081
+signal IO_PAD1082
+signal IO_PAD1084
+signal IO_PAD1085
+signal IO_PAD1086
+signal IO_PAD1088
+signal IO_PAD1090
+signal IO_PAD1091
+signal IO_PAD1092
+signal IO_PAD1093
+signal IO_PAD1094
+signal IO_PAD1096
+signal IO_PAD1098
+signal IO_PAD1100
+signal IO_PAD1102
+signal IO_PAD1104
+signal IO_PAD1105
+signal IO_PAD1106
+signal IO_PAD1108
+signal IO_PAD1109
+signal IO_PAD1110
+signal IO_PAD1112
+signal IO_PAD1114
+signal IO_PAD1115
+signal IO_PAD1116
+
+register BSR 2459
+register BR 1
+register DIR 32
+
+instruction length 6
+
+instruction EXTEST 000000 BSR
+instruction SAMPLE/PRELOAD 000001 BSR
+instruction IDCODE 001001 DIR
+instruction BYPASS 111111 BR
+
+bit 2458 I 1 IO_PAD968
+bit 2457 O 1 IO_PAD968 2456 1 Z
+bit 2456 C 1 *
+bit 2455 I 1 IO_PAD967
+bit 2454 O 1 IO_PAD967 2453 1 Z
+bit 2453 C 1 *
+bit 2452 I 1 IO_PAD966
+bit 2451 O 1 IO_PAD966 2450 1 Z
+bit 2450 C 1 *
+bit 2449 I 1 IO_PAD965
+bit 2448 O 1 IO_PAD965 2447 1 Z
+bit 2447 C 1 *
+bit 2446 I 1 IO_PAD964
+bit 2445 O 1 IO_PAD964 2444 1 Z
+bit 2444 C 1 *
+bit 2443 I 1 IO_PAD963
+bit 2442 O 1 IO_PAD963 2441 1 Z
+bit 2441 C 1 *
+bit 2440 I 1 IO_PAD961
+bit 2439 O 1 IO_PAD961 2438 1 Z
+bit 2438 C 1 *
+bit 2437 I 1 IO_PAD960
+bit 2436 O 1 IO_PAD960 2435 1 Z
+bit 2435 C 1 *
+bit 2434 I 1 IO_PAD959
+bit 2433 O 1 IO_PAD959 2432 1 Z
+bit 2432 C 1 *
+bit 2431 I 1 IO_PAD957
+bit 2430 O 1 IO_PAD957 2429 1 Z
+bit 2429 C 1 *
+bit 2428 I 1 IO_PAD956
+bit 2427 O 1 IO_PAD956 2426 1 Z
+bit 2426 C 1 *
+bit 2425 I 1 IO_PAD955
+bit 2424 O 1 IO_PAD955 2423 1 Z
+bit 2423 C 1 *
+bit 2422 I 1 IO_PAD953
+bit 2421 O 1 IO_PAD953 2420 1 Z
+bit 2420 C 1 *
+bit 2419 I 1 IO_PAD952
+bit 2418 O 1 IO_PAD952 2417 1 Z
+bit 2417 C 1 *
+bit 2416 I 1 IO_PAD951
+bit 2415 O 1 IO_PAD951 2414 1 Z
+bit 2414 C 1 *
+bit 2413 O 1 *
+bit 2412 O 1 *
+bit 2411 O 1 *
+bit 2410 O 1 *
+bit 2409 O 1 *
+bit 2408 O 1 *
+bit 2407 I 1 IO_PAD949
+bit 2406 O 1 IO_PAD949 2405 1 Z
+bit 2405 C 1 *
+bit 2404 I 1 IO_PAD947
+bit 2403 O 1 IO_PAD947 2402 1 Z
+bit 2402 C 1 *
+bit 2401 I 1 IO_PAD945
+bit 2400 O 1 IO_PAD945 2399 1 Z
+bit 2399 C 1 *
+bit 2398 I 1 IO_PAD944
+bit 2397 O 1 IO_PAD944 2396 1 Z
+bit 2396 C 1 *
+bit 2395 I 1 IO_PAD943
+bit 2394 O 1 IO_PAD943 2393 1 Z
+bit 2393 C 1 *
+bit 2392 I 1 IO_PAD942
+bit 2391 O 1 IO_PAD942 2390 1 Z
+bit 2390 C 1 *
+bit 2389 I 1 IO_PAD941
+bit 2388 O 1 IO_PAD941 2387 1 Z
+bit 2387 C 1 *
+bit 2386 I 1 IO_PAD939
+bit 2385 O 1 IO_PAD939 2384 1 Z
+bit 2384 C 1 *
+bit 2383 I 1 IO_PAD937
+bit 2382 O 1 IO_PAD937 2381 1 Z
+bit 2381 C 1 *
+bit 2380 I 1 IO_PAD936
+bit 2379 O 1 IO_PAD936 2378 1 Z
+bit 2378 C 1 *
+bit 2377 I 1 IO_PAD935
+bit 2376 O 1 IO_PAD935 2375 1 Z
+bit 2375 C 1 *
+bit 2374 I 1 IO_PAD934
+bit 2373 O 1 IO_PAD934 2372 1 Z
+bit 2372 C 1 *
+bit 2371 I 1 IO_PAD933
+bit 2370 O 1 IO_PAD933 2369 1 Z
+bit 2369 C 1 *
+bit 2368 I 1 IO_PAD932
+bit 2367 O 1 IO_PAD932 2366 1 Z
+bit 2366 C 1 *
+bit 2365 I 1 IO_PAD931
+bit 2364 O 1 IO_PAD931 2363 1 Z
+bit 2363 C 1 *
+bit 2362 I 1 IO_PAD929
+bit 2361 O 1 IO_PAD929 2360 1 Z
+bit 2360 C 1 *
+bit 2359 I 1 IO_PAD927
+bit 2358 O 1 IO_PAD927 2357 1 Z
+bit 2357 C 1 *
+bit 2356 I 1 IO_PAD926
+bit 2355 O 1 IO_PAD926 2354 1 Z
+bit 2354 C 1 *
+bit 2353 I 1 IO_PAD925
+bit 2352 O 1 IO_PAD925 2351 1 Z
+bit 2351 C 1 *
+bit 2350 I 1 IO_PAD924
+bit 2349 O 1 IO_PAD924 2348 1 Z
+bit 2348 C 1 *
+bit 2347 I 1 IO_PAD923
+bit 2346 O 1 IO_PAD923 2345 1 Z
+bit 2345 C 1 *
+bit 2344 I 1 IO_PAD921
+bit 2343 O 1 IO_PAD921 2342 1 Z
+bit 2342 C 1 *
+bit 2341 I 1 IO_PAD919
+bit 2340 O 1 IO_PAD919 2339 1 Z
+bit 2339 C 1 *
+bit 2338 I 1 IO_PAD918
+bit 2337 O 1 IO_PAD918 2336 1 Z
+bit 2336 C 1 *
+bit 2335 I 1 IO_PAD917
+bit 2334 O 1 IO_PAD917 2333 1 Z
+bit 2333 C 1 *
+bit 2332 O 1 *
+bit 2331 O 1 *
+bit 2330 O 1 *
+bit 2329 O 1 *
+bit 2328 O 1 *
+bit 2327 O 1 *
+bit 2326 I 1 IO_PAD915
+bit 2325 O 1 IO_PAD915 2324 1 Z
+bit 2324 C 1 *
+bit 2323 I 1 IO_PAD913
+bit 2322 O 1 IO_PAD913 2321 1 Z
+bit 2321 C 1 *
+bit 2320 I 1 IO_PAD912
+bit 2319 O 1 IO_PAD912 2318 1 Z
+bit 2318 C 1 *
+bit 2317 I 1 IO_PAD911
+bit 2316 O 1 IO_PAD911 2315 1 Z
+bit 2315 C 1 *
+bit 2314 I 1 IO_PAD909
+bit 2313 O 1 IO_PAD909 2312 1 Z
+bit 2312 C 1 *
+bit 2311 I 1 IO_PAD908
+bit 2310 O 1 IO_PAD908 2309 1 Z
+bit 2309 C 1 *
+bit 2308 I 1 IO_PAD907
+bit 2307 O 1 IO_PAD907 2306 1 Z
+bit 2306 C 1 *
+bit 2305 I 1 IO_PAD906
+bit 2304 O 1 IO_PAD906 2303 1 Z
+bit 2303 C 1 *
+bit 2302 I 1 IO_PAD905
+bit 2301 O 1 IO_PAD905 2300 1 Z
+bit 2300 C 1 *
+bit 2299 I 1 IO_PAD903
+bit 2298 O 1 IO_PAD903 2297 1 Z
+bit 2297 C 1 *
+bit 2296 I 1 IO_PAD901
+bit 2295 O 1 IO_PAD901 2294 1 Z
+bit 2294 C 1 *
+bit 2293 I 1 IO_PAD900
+bit 2292 O 1 IO_PAD900 2291 1 Z
+bit 2291 C 1 *
+bit 2290 I 1 IO_PAD899
+bit 2289 O 1 IO_PAD899 2288 1 Z
+bit 2288 C 1 *
+bit 2287 I 1 IO_PAD898
+bit 2286 O 1 IO_PAD898 2285 1 Z
+bit 2285 C 1 *
+bit 2284 I 1 IO_PAD897
+bit 2283 O 1 IO_PAD897 2282 1 Z
+bit 2282 C 1 *
+bit 2281 I 1 IO_PAD895
+bit 2280 O 1 IO_PAD895 2279 1 Z
+bit 2279 C 1 *
+bit 2278 I 1 IO_PAD894
+bit 2277 O 1 IO_PAD894 2276 1 Z
+bit 2276 C 1 *
+bit 2275 I 1 IO_PAD893
+bit 2274 O 1 IO_PAD893 2273 1 Z
+bit 2273 C 1 *
+bit 2272 I 1 IO_PAD891
+bit 2271 O 1 IO_PAD891 2270 1 Z
+bit 2270 C 1 *
+bit 2269 I 1 IO_PAD889
+bit 2268 O 1 IO_PAD889 2267 1 Z
+bit 2267 C 1 *
+bit 2266 I 1 IO_PAD888
+bit 2265 O 1 IO_PAD888 2264 1 Z
+bit 2264 C 1 *
+bit 2263 I 1 IO_PAD887
+bit 2262 O 1 IO_PAD887 2261 1 Z
+bit 2261 C 1 *
+bit 2260 O 1 *
+bit 2259 O 1 *
+bit 2258 O 1 *
+bit 2257 O 1 *
+bit 2256 O 1 *
+bit 2255 O 1 *
+bit 2254 I 1 IO_PAD885
+bit 2253 O 1 IO_PAD885 2252 1 Z
+bit 2252 C 1 *
+bit 2251 I 1 IO_PAD883
+bit 2250 O 1 IO_PAD883 2249 1 Z
+bit 2249 C 1 *
+bit 2248 I 1 IO_PAD882
+bit 2247 O 1 IO_PAD882 2246 1 Z
+bit 2246 C 1 *
+bit 2245 I 1 IO_PAD881
+bit 2244 O 1 IO_PAD881 2243 1 Z
+bit 2243 C 1 *
+bit 2242 I 1 IO_PAD880
+bit 2241 O 1 IO_PAD880 2240 1 Z
+bit 2240 C 1 *
+bit 2239 I 1 IO_PAD879
+bit 2238 O 1 IO_PAD879 2237 1 Z
+bit 2237 C 1 *
+bit 2236 I 1 IO_PAD877
+bit 2235 O 1 IO_PAD877 2234 1 Z
+bit 2234 C 1 *
+bit 2233 I 1 IO_PAD875
+bit 2232 O 1 IO_PAD875 2231 1 Z
+bit 2231 C 1 *
+bit 2230 I 1 IO_PAD874
+bit 2229 O 1 IO_PAD874 2228 1 Z
+bit 2228 C 1 *
+bit 2227 I 1 IO_PAD873
+bit 2226 O 1 IO_PAD873 2225 1 Z
+bit 2225 C 1 *
+bit 2224 I 1 IO_PAD872
+bit 2223 O 1 IO_PAD872 2222 1 Z
+bit 2222 C 1 *
+bit 2221 I 1 IO_PAD871
+bit 2220 O 1 IO_PAD871 2219 1 Z
+bit 2219 C 1 *
+bit 2218 I 1 IO_PAD869
+bit 2217 O 1 IO_PAD869 2216 1 Z
+bit 2216 C 1 *
+bit 2215 I 1 IO_PAD867
+bit 2214 O 1 IO_PAD867 2213 1 Z
+bit 2213 C 1 *
+bit 2212 I 1 IO_PAD866
+bit 2211 O 1 IO_PAD866 2210 1 Z
+bit 2210 C 1 *
+bit 2209 I 1 IO_PAD865
+bit 2208 O 1 IO_PAD865 2207 1 Z
+bit 2207 C 1 *
+bit 2206 I 1 IO_PAD864
+bit 2205 O 1 IO_PAD864 2204 1 Z
+bit 2204 C 1 *
+bit 2203 I 1 IO_PAD863
+bit 2202 O 1 IO_PAD863 2201 1 Z
+bit 2201 C 1 *
+bit 2200 I 1 IO_PAD861
+bit 2199 O 1 IO_PAD861 2198 1 Z
+bit 2198 C 1 *
+bit 2197 I 1 IO_PAD860
+bit 2196 O 1 IO_PAD860 2195 1 Z
+bit 2195 C 1 *
+bit 2194 I 1 IO_PAD859
+bit 2193 O 1 IO_PAD859 2192 1 Z
+bit 2192 C 1 *
+bit 2191 I 1 IO_PAD857
+bit 2190 O 1 IO_PAD857 2189 1 Z
+bit 2189 C 1 *
+bit 2188 I 1 IO_PAD855
+bit 2187 O 1 IO_PAD855 2186 1 Z
+bit 2186 C 1 *
+bit 2185 I 1 IO_PAD854
+bit 2184 O 1 IO_PAD854 2183 1 Z
+bit 2183 C 1 *
+bit 2182 I 1 IO_PAD853
+bit 2181 O 1 IO_PAD853 2180 1 Z
+bit 2180 C 1 *
+bit 2179 O 1 *
+bit 2178 O 1 *
+bit 2177 O 1 *
+bit 2176 O 1 *
+bit 2175 O 1 *
+bit 2174 O 1 *
+bit 2173 I 1 IO_PAD851
+bit 2172 O 1 IO_PAD851 2171 1 Z
+bit 2171 C 1 *
+bit 2170 I 1 IO_PAD849
+bit 2169 O 1 IO_PAD849 2168 1 Z
+bit 2168 C 1 *
+bit 2167 I 1 IO_PAD848
+bit 2166 O 1 IO_PAD848 2165 1 Z
+bit 2165 C 1 *
+bit 2164 I 1 IO_PAD847
+bit 2163 O 1 IO_PAD847 2162 1 Z
+bit 2162 C 1 *
+bit 2161 I 1 IO_PAD846
+bit 2160 O 1 IO_PAD846 2159 1 Z
+bit 2159 C 1 *
+bit 2158 I 1 IO_PAD845
+bit 2157 O 1 IO_PAD845 2156 1 Z
+bit 2156 C 1 *
+bit 2155 I 1 IO_PAD843
+bit 2154 O 1 IO_PAD843 2153 1 Z
+bit 2153 C 1 *
+bit 2152 I 1 IO_PAD841
+bit 2151 O 1 IO_PAD841 2150 1 Z
+bit 2150 C 1 *
+bit 2149 I 1 IO_PAD840
+bit 2148 O 1 IO_PAD840 2147 1 Z
+bit 2147 C 1 *
+bit 2146 I 1 IO_PAD838
+bit 2145 O 1 IO_PAD838 2144 1 Z
+bit 2144 C 1 *
+bit 2143 I 1 IO_PAD837
+bit 2142 O 1 IO_PAD837 2141 1 Z
+bit 2141 C 1 *
+bit 2140 I 1 IO_PAD835
+bit 2139 O 1 IO_PAD835 2138 1 Z
+bit 2138 C 1 *
+bit 2137 I 1 IO_PAD833
+bit 2136 O 1 IO_PAD833 2135 1 Z
+bit 2135 C 1 *
+bit 2134 I 1 IO_PAD832
+bit 2133 O 1 IO_PAD832 2132 1 Z
+bit 2132 C 1 *
+bit 2131 I 1 IO_PAD831
+bit 2130 O 1 IO_PAD831 2129 1 Z
+bit 2129 C 1 *
+bit 2128 I 1 IO_PAD830
+bit 2127 O 1 IO_PAD830 2126 1 Z
+bit 2126 C 1 *
+bit 2125 I 1 IO_PAD829
+bit 2124 O 1 IO_PAD829 2123 1 Z
+bit 2123 C 1 *
+bit 2122 I 1 IO_PAD827
+bit 2121 O 1 IO_PAD827 2120 1 Z
+bit 2120 C 1 *
+bit 2119 O 1 *
+bit 2118 O 1 *
+bit 2117 O 1 *
+bit 2116 O 1 *
+bit 2115 O 1 *
+bit 2114 O 1 *
+bit 2113 I 1 IO_PAD825
+bit 2112 O 1 IO_PAD825 2111 1 Z
+bit 2111 C 1 *
+bit 2110 I 1 IO_PAD824
+bit 2109 O 1 IO_PAD824 2108 1 Z
+bit 2108 C 1 *
+bit 2107 I 1 IO_PAD823
+bit 2106 O 1 IO_PAD823 2105 1 Z
+bit 2105 C 1 *
+bit 2104 I 1 IO_PAD821
+bit 2103 O 1 IO_PAD821 2102 1 Z
+bit 2102 C 1 *
+bit 2101 I 1 IO_PAD819
+bit 2100 O 1 IO_PAD819 2099 1 Z
+bit 2099 C 1 *
+bit 2098 I 1 IO_PAD818
+bit 2097 O 1 IO_PAD818 2096 1 Z
+bit 2096 C 1 *
+bit 2095 I 1 IO_PAD817
+bit 2094 O 1 IO_PAD817 2093 1 Z
+bit 2093 C 1 *
+bit 2092 I 1 IO_PAD815
+bit 2091 O 1 IO_PAD815 2090 1 Z
+bit 2090 C 1 *
+bit 2089 I 1 IO_PAD814
+bit 2088 O 1 IO_PAD814 2087 1 Z
+bit 2087 C 1 *
+bit 2086 I 1 IO_PAD813
+bit 2085 O 1 IO_PAD813 2084 1 Z
+bit 2084 C 1 *
+bit 2083 I 1 IO_PAD812
+bit 2082 O 1 IO_PAD812 2081 1 Z
+bit 2081 C 1 *
+bit 2080 I 1 IO_PAD811
+bit 2079 O 1 IO_PAD811 2078 1 Z
+bit 2078 C 1 *
+bit 2077 I 1 IO_PAD809
+bit 2076 O 1 IO_PAD809 2075 1 Z
+bit 2075 C 1 *
+bit 2074 I 1 IO_PAD807
+bit 2073 O 1 IO_PAD807 2072 1 Z
+bit 2072 C 1 *
+bit 2071 I 1 IO_PAD806
+bit 2070 O 1 IO_PAD806 2069 1 Z
+bit 2069 C 1 *
+bit 2068 I 1 IO_PAD805
+bit 2067 O 1 IO_PAD805 2066 1 Z
+bit 2066 C 1 *
+bit 2065 I 1 IO_PAD804
+bit 2064 O 1 IO_PAD804 2063 1 Z
+bit 2063 C 1 *
+bit 2062 I 1 IO_PAD803
+bit 2061 O 1 IO_PAD803 2060 1 Z
+bit 2060 C 1 *
+bit 2059 I 1 IO_PAD801
+bit 2058 O 1 IO_PAD801 2057 1 Z
+bit 2057 C 1 *
+bit 2056 I 1 IO_PAD799
+bit 2055 O 1 IO_PAD799 2054 1 Z
+bit 2054 C 1 *
+bit 2053 I 1 IO_PAD798
+bit 2052 O 1 IO_PAD798 2051 1 Z
+bit 2051 C 1 *
+bit 2050 I 1 IO_PAD797
+bit 2049 O 1 IO_PAD797 2048 1 Z
+bit 2048 C 1 *
+bit 2047 I 1 IO_PAD796
+bit 2046 O 1 IO_PAD796 2045 1 Z
+bit 2045 C 1 *
+bit 2044 I 1 IO_PAD795
+bit 2043 O 1 IO_PAD795 2042 1 Z
+bit 2042 C 1 *
+bit 2041 I 1 IO_PAD793
+bit 2040 O 1 IO_PAD793 2039 1 Z
+bit 2039 C 1 *
+bit 2038 O 1 *
+bit 2037 O 1 *
+bit 2036 O 1 *
+bit 2035 O 1 *
+bit 2034 O 1 *
+bit 2033 O 1 *
+bit 2032 I 1 IO_PAD791
+bit 2031 O 1 IO_PAD791 2030 1 Z
+bit 2030 C 1 *
+bit 2029 I 1 IO_PAD790
+bit 2028 O 1 IO_PAD790 2027 1 Z
+bit 2027 C 1 *
+bit 2026 I 1 IO_PAD789
+bit 2025 O 1 IO_PAD789 2024 1 Z
+bit 2024 C 1 *
+bit 2023 I 1 IO_PAD787
+bit 2022 O 1 IO_PAD787 2021 1 Z
+bit 2021 C 1 *
+bit 2020 I 1 IO_PAD785
+bit 2019 O 1 IO_PAD785 2018 1 Z
+bit 2018 C 1 *
+bit 2017 I 1 IO_PAD784
+bit 2016 O 1 IO_PAD784 2015 1 Z
+bit 2015 C 1 *
+bit 2014 I 1 IO_PAD783
+bit 2013 O 1 IO_PAD783 2012 1 Z
+bit 2012 C 1 *
+bit 2011 I 1 IO_PAD781
+bit 2010 O 1 IO_PAD781 2009 1 Z
+bit 2009 C 1 *
+bit 2008 I 1 IO_PAD780
+bit 2007 O 1 IO_PAD780 2006 1 Z
+bit 2006 C 1 *
+bit 2005 I 1 IO_PAD779
+bit 2004 O 1 IO_PAD779 2003 1 Z
+bit 2003 C 1 *
+bit 2002 I 1 IO_PAD778
+bit 2001 O 1 IO_PAD778 2000 1 Z
+bit 2000 C 1 *
+bit 1999 I 1 IO_PAD777
+bit 1998 O 1 IO_PAD777 1997 1 Z
+bit 1997 C 1 *
+bit 1996 I 1 IO_PAD775
+bit 1995 O 1 IO_PAD775 1994 1 Z
+bit 1994 C 1 *
+bit 1993 I 1 IO_PAD773
+bit 1992 O 1 IO_PAD773 1991 1 Z
+bit 1991 C 1 *
+bit 1990 I 1 IO_PAD772
+bit 1989 O 1 IO_PAD772 1988 1 Z
+bit 1988 C 1 *
+bit 1987 I 1 IO_PAD771
+bit 1986 O 1 IO_PAD771 1985 1 Z
+bit 1985 C 1 *
+bit 1984 I 1 IO_PAD770
+bit 1983 O 1 IO_PAD770 1982 1 Z
+bit 1982 C 1 *
+bit 1981 I 1 IO_PAD769
+bit 1980 O 1 IO_PAD769 1979 1 Z
+bit 1979 C 1 *
+bit 1978 I 1 IO_PAD767
+bit 1977 O 1 IO_PAD767 1976 1 Z
+bit 1976 C 1 *
+bit 1975 I 1 IO_PAD766
+bit 1974 O 1 IO_PAD766 1973 1 Z
+bit 1973 C 1 *
+bit 1972 I 1 IO_PAD765
+bit 1971 O 1 IO_PAD765 1970 1 Z
+bit 1970 C 1 *
+bit 1969 I 1 IO_PAD763
+bit 1968 O 1 IO_PAD763 1967 1 Z
+bit 1967 C 1 *
+bit 1966 O 1 *
+bit 1965 O 1 *
+bit 1964 O 1 *
+bit 1963 O 1 *
+bit 1962 O 1 *
+bit 1961 O 1 *
+bit 1960 I 1 IO_PAD761
+bit 1959 O 1 IO_PAD761 1958 1 Z
+bit 1958 C 1 *
+bit 1957 I 1 IO_PAD760
+bit 1956 O 1 IO_PAD760 1955 1 Z
+bit 1955 C 1 *
+bit 1954 I 1 IO_PAD759
+bit 1953 O 1 IO_PAD759 1952 1 Z
+bit 1952 C 1 *
+bit 1951 I 1 IO_PAD757
+bit 1950 O 1 IO_PAD757 1949 1 Z
+bit 1949 C 1 *
+bit 1948 I 1 IO_PAD755
+bit 1947 O 1 IO_PAD755 1946 1 Z
+bit 1946 C 1 *
+bit 1945 I 1 IO_PAD754
+bit 1944 O 1 IO_PAD754 1943 1 Z
+bit 1943 C 1 *
+bit 1942 I 1 IO_PAD753
+bit 1941 O 1 IO_PAD753 1940 1 Z
+bit 1940 C 1 *
+bit 1939 I 1 IO_PAD752
+bit 1938 O 1 IO_PAD752 1937 1 Z
+bit 1937 C 1 *
+bit 1936 I 1 IO_PAD751
+bit 1935 O 1 IO_PAD751 1934 1 Z
+bit 1934 C 1 *
+bit 1933 I 1 IO_PAD749
+bit 1932 O 1 IO_PAD749 1931 1 Z
+bit 1931 C 1 *
+bit 1930 I 1 IO_PAD747
+bit 1929 O 1 IO_PAD747 1928 1 Z
+bit 1928 C 1 *
+bit 1927 I 1 IO_PAD746
+bit 1926 O 1 IO_PAD746 1925 1 Z
+bit 1925 C 1 *
+bit 1924 I 1 IO_PAD745
+bit 1923 O 1 IO_PAD745 1922 1 Z
+bit 1922 C 1 *
+bit 1921 I 1 IO_PAD744
+bit 1920 O 1 IO_PAD744 1919 1 Z
+bit 1919 C 1 *
+bit 1918 I 1 IO_PAD743
+bit 1917 O 1 IO_PAD743 1916 1 Z
+bit 1916 C 1 *
+bit 1915 I 1 IO_PAD742
+bit 1914 O 1 IO_PAD742 1913 1 Z
+bit 1913 C 1 *
+bit 1912 I 1 IO_PAD741
+bit 1911 O 1 IO_PAD741 1910 1 Z
+bit 1910 C 1 *
+bit 1909 I 1 IO_PAD739
+bit 1908 O 1 IO_PAD739 1907 1 Z
+bit 1907 C 1 *
+bit 1906 I 1 IO_PAD737
+bit 1905 O 1 IO_PAD737 1904 1 Z
+bit 1904 C 1 *
+bit 1903 I 1 IO_PAD736
+bit 1902 O 1 IO_PAD736 1901 1 Z
+bit 1901 C 1 *
+bit 1900 I 1 IO_PAD735
+bit 1899 O 1 IO_PAD735 1898 1 Z
+bit 1898 C 1 *
+bit 1897 I 1 IO_PAD734
+bit 1896 O 1 IO_PAD734 1895 1 Z
+bit 1895 C 1 *
+bit 1894 I 1 IO_PAD733
+bit 1893 O 1 IO_PAD733 1892 1 Z
+bit 1892 C 1 *
+bit 1891 I 1 IO_PAD731
+bit 1890 O 1 IO_PAD731 1889 1 Z
+bit 1889 C 1 *
+bit 1888 I 1 IO_PAD729
+bit 1887 O 1 IO_PAD729 1886 1 Z
+bit 1886 C 1 *
+bit 1885 O 1 *
+bit 1884 O 1 *
+bit 1883 O 1 *
+bit 1882 O 1 *
+bit 1881 O 1 *
+bit 1880 O 1 *
+bit 1879 I 1 IO_PAD727
+bit 1878 O 1 IO_PAD727 1877 1 Z
+bit 1877 C 1 *
+bit 1876 I 1 IO_PAD726
+bit 1875 O 1 IO_PAD726 1874 1 Z
+bit 1874 C 1 *
+bit 1873 I 1 IO_PAD725
+bit 1872 O 1 IO_PAD725 1871 1 Z
+bit 1871 C 1 *
+bit 1870 I 1 IO_PAD723
+bit 1869 O 1 IO_PAD723 1868 1 Z
+bit 1868 C 1 *
+bit 1867 I 1 IO_PAD722
+bit 1866 O 1 IO_PAD722 1865 1 Z
+bit 1865 C 1 *
+bit 1864 I 1 IO_PAD721
+bit 1863 O 1 IO_PAD721 1862 1 Z
+bit 1862 C 1 *
+bit 1861 I 1 IO_PAD719
+bit 1860 O 1 IO_PAD719 1859 1 Z
+bit 1859 C 1 *
+bit 1858 I 1 IO_PAD718
+bit 1857 O 1 IO_PAD718 1856 1 Z
+bit 1856 C 1 *
+bit 1855 I 1 IO_PAD717
+bit 1854 O 1 IO_PAD717 1853 1 Z
+bit 1853 C 1 *
+bit 1852 I 1 IO_PAD715
+bit 1851 O 1 IO_PAD715 1850 1 Z
+bit 1850 C 1 *
+bit 1849 I 1 IO_PAD714
+bit 1848 O 1 IO_PAD714 1847 1 Z
+bit 1847 C 1 *
+bit 1846 I 1 IO_PAD713
+bit 1845 O 1 IO_PAD713 1844 1 Z
+bit 1844 C 1 *
+bit 1843 I 1 IO_PAD712
+bit 1842 O 1 IO_PAD712 1841 1 Z
+bit 1841 C 1 *
+bit 1840 I 1 IO_PAD711
+bit 1839 O 1 IO_PAD711 1838 1 Z
+bit 1838 C 1 *
+bit 1837 I 1 IO_PAD710
+bit 1836 O 1 IO_PAD710 1835 1 Z
+bit 1835 C 1 *
+bit 1834 I 1 CCLK_PAD706
+bit 1833 O 1 CCLK_PAD706 1832 1 Z
+bit 1832 C 1 *
+bit 1831 I 1 DONE_PAD705
+bit 1830 O 1 DONE_PAD705 1829 1 Z
+bit 1829 C 1 *
+bit 1828 I 1 IO_PAD704
+bit 1827 O 1 IO_PAD704 1826 1 Z
+bit 1826 C 1 *
+bit 1825 I 1 IO_PAD703
+bit 1824 O 1 IO_PAD703 1823 1 Z
+bit 1823 C 1 *
+bit 1822 I 1 IO_PAD701
+bit 1821 O 1 IO_PAD701 1820 1 Z
+bit 1820 C 1 *
+bit 1819 I 1 IO_PAD700
+bit 1818 O 1 IO_PAD700 1817 1 Z
+bit 1817 C 1 *
+bit 1816 I 1 IO_PAD699
+bit 1815 O 1 IO_PAD699 1814 1 Z
+bit 1814 C 1 *
+bit 1813 I 1 IO_PAD698
+bit 1812 O 1 IO_PAD698 1811 1 Z
+bit 1811 C 1 *
+bit 1810 I 1 IO_PAD697
+bit 1809 O 1 IO_PAD697 1808 1 Z
+bit 1808 C 1 *
+bit 1807 I 1 IO_PAD695
+bit 1806 O 1 IO_PAD695 1805 1 Z
+bit 1805 C 1 *
+bit 1804 I 1 IO_PAD693
+bit 1803 O 1 IO_PAD693 1802 1 Z
+bit 1802 C 1 *
+bit 1801 I 1 IO_PAD692
+bit 1800 O 1 IO_PAD692 1799 1 Z
+bit 1799 C 1 *
+bit 1798 I 1 IO_PAD691
+bit 1797 O 1 IO_PAD691 1796 1 Z
+bit 1796 C 1 *
+bit 1795 I 1 IO_PAD690
+bit 1794 O 1 IO_PAD690 1793 1 Z
+bit 1793 C 1 *
+bit 1792 I 1 IO_PAD689
+bit 1791 O 1 IO_PAD689 1790 1 Z
+bit 1790 C 1 *
+bit 1789 I 1 IO_PAD687
+bit 1788 O 1 IO_PAD687 1787 1 Z
+bit 1787 C 1 *
+bit 1786 I 1 IO_PAD685
+bit 1785 O 1 IO_PAD685 1784 1 Z
+bit 1784 C 1 *
+bit 1783 I 1 IO_PAD683
+bit 1782 O 1 IO_PAD683 1781 1 Z
+bit 1781 C 1 *
+bit 1780 I 1 IO_PAD681
+bit 1779 O 1 IO_PAD681 1778 1 Z
+bit 1778 C 1 *
+bit 1777 I 1 IO_PAD680
+bit 1776 O 1 IO_PAD680 1775 1 Z
+bit 1775 C 1 *
+bit 1774 I 1 IO_PAD679
+bit 1773 O 1 IO_PAD679 1772 1 Z
+bit 1772 C 1 *
+bit 1771 I 1 IO_PAD677
+bit 1770 O 1 IO_PAD677 1769 1 Z
+bit 1769 C 1 *
+bit 1768 I 1 IO_PAD676
+bit 1767 O 1 IO_PAD676 1766 1 Z
+bit 1766 C 1 *
+bit 1765 I 1 IO_PAD675
+bit 1764 O 1 IO_PAD675 1763 1 Z
+bit 1763 C 1 *
+bit 1762 I 1 IO_PAD673
+bit 1761 O 1 IO_PAD673 1760 1 Z
+bit 1760 C 1 *
+bit 1759 I 1 IO_PAD671
+bit 1758 O 1 IO_PAD671 1757 1 Z
+bit 1757 C 1 *
+bit 1756 I 1 IO_PAD669
+bit 1755 O 1 IO_PAD669 1754 1 Z
+bit 1754 C 1 *
+bit 1753 I 1 IO_PAD668
+bit 1752 O 1 IO_PAD668 1751 1 Z
+bit 1751 C 1 *
+bit 1750 I 1 IO_PAD667
+bit 1749 O 1 IO_PAD667 1748 1 Z
+bit 1748 C 1 *
+bit 1747 I 1 IO_PAD666
+bit 1746 O 1 IO_PAD666 1745 1 Z
+bit 1745 C 1 *
+bit 1744 I 1 IO_PAD665
+bit 1743 O 1 IO_PAD665 1742 1 Z
+bit 1742 C 1 *
+bit 1741 I 1 IO_PAD663
+bit 1740 O 1 IO_PAD663 1739 1 Z
+bit 1739 C 1 *
+bit 1738 I 1 IO_PAD662
+bit 1737 O 1 IO_PAD662 1736 1 Z
+bit 1736 C 1 *
+bit 1735 I 1 IO_PAD661
+bit 1734 O 1 IO_PAD661 1733 1 Z
+bit 1733 C 1 *
+bit 1732 I 1 IO_PAD659
+bit 1731 O 1 IO_PAD659 1730 1 Z
+bit 1730 C 1 *
+bit 1729 I 1 IO_PAD657
+bit 1728 O 1 IO_PAD657 1727 1 Z
+bit 1727 C 1 *
+bit 1726 I 1 IO_PAD656
+bit 1725 O 1 IO_PAD656 1724 1 Z
+bit 1724 C 1 *
+bit 1723 I 1 IO_PAD655
+bit 1722 O 1 IO_PAD655 1721 1 Z
+bit 1721 C 1 *
+bit 1720 I 1 IO_PAD653
+bit 1719 O 1 IO_PAD653 1718 1 Z
+bit 1718 C 1 *
+bit 1717 I 1 IO_PAD651
+bit 1716 O 1 IO_PAD651 1715 1 Z
+bit 1715 C 1 *
+bit 1714 I 1 IO_PAD649
+bit 1713 O 1 IO_PAD649 1712 1 Z
+bit 1712 C 1 *
+bit 1711 I 1 IO_PAD647
+bit 1710 O 1 IO_PAD647 1709 1 Z
+bit 1709 C 1 *
+bit 1708 I 1 IO_PAD645
+bit 1707 O 1 IO_PAD645 1706 1 Z
+bit 1706 C 1 *
+bit 1705 I 1 IO_PAD644
+bit 1704 O 1 IO_PAD644 1703 1 Z
+bit 1703 C 1 *
+bit 1702 I 1 IO_PAD643
+bit 1701 O 1 IO_PAD643 1700 1 Z
+bit 1700 C 1 *
+bit 1699 I 1 IO_PAD642
+bit 1698 O 1 IO_PAD642 1697 1 Z
+bit 1697 C 1 *
+bit 1696 I 1 IO_PAD641
+bit 1695 O 1 IO_PAD641 1694 1 Z
+bit 1694 C 1 *
+bit 1693 I 1 IO_PAD639
+bit 1692 O 1 IO_PAD639 1691 1 Z
+bit 1691 C 1 *
+bit 1690 I 1 IO_PAD638
+bit 1689 O 1 IO_PAD638 1688 1 Z
+bit 1688 C 1 *
+bit 1687 I 1 IO_PAD637
+bit 1686 O 1 IO_PAD637 1685 1 Z
+bit 1685 C 1 *
+bit 1684 I 1 IO_PAD635
+bit 1683 O 1 IO_PAD635 1682 1 Z
+bit 1682 C 1 *
+bit 1681 I 1 IO_PAD633
+bit 1680 O 1 IO_PAD633 1679 1 Z
+bit 1679 C 1 *
+bit 1678 I 1 IO_PAD632
+bit 1677 O 1 IO_PAD632 1676 1 Z
+bit 1676 C 1 *
+bit 1675 I 1 IO_PAD631
+bit 1674 O 1 IO_PAD631 1673 1 Z
+bit 1673 C 1 *
+bit 1672 I 1 IO_PAD629
+bit 1671 O 1 IO_PAD629 1670 1 Z
+bit 1670 C 1 *
+bit 1669 I 1 IO_PAD628
+bit 1668 O 1 IO_PAD628 1667 1 Z
+bit 1667 C 1 *
+bit 1666 I 1 IO_PAD627
+bit 1665 O 1 IO_PAD627 1664 1 Z
+bit 1664 C 1 *
+bit 1663 I 1 IO_PAD625
+bit 1662 O 1 IO_PAD625 1661 1 Z
+bit 1661 C 1 *
+bit 1660 I 1 IO_PAD623
+bit 1659 O 1 IO_PAD623 1658 1 Z
+bit 1658 C 1 *
+bit 1657 I 1 IO_PAD621
+bit 1656 O 1 IO_PAD621 1655 1 Z
+bit 1655 C 1 *
+bit 1654 I 1 IO_PAD620
+bit 1653 O 1 IO_PAD620 1652 1 Z
+bit 1652 C 1 *
+bit 1651 I 1 IO_PAD619
+bit 1650 O 1 IO_PAD619 1649 1 Z
+bit 1649 C 1 *
+bit 1648 I 1 IO_PAD617
+bit 1647 O 1 IO_PAD617 1646 1 Z
+bit 1646 C 1 *
+bit 1645 I 1 IO_PAD616
+bit 1644 O 1 IO_PAD616 1643 1 Z
+bit 1643 C 1 *
+bit 1642 I 1 IO_PAD615
+bit 1641 O 1 IO_PAD615 1640 1 Z
+bit 1640 C 1 *
+bit 1639 I 1 IO_PAD613
+bit 1638 O 1 IO_PAD613 1637 1 Z
+bit 1637 C 1 *
+bit 1636 I 1 IO_PAD611
+bit 1635 O 1 IO_PAD611 1634 1 Z
+bit 1634 C 1 *
+bit 1633 I 1 IO_PAD609
+bit 1632 O 1 IO_PAD609 1631 1 Z
+bit 1631 C 1 *
+bit 1630 I 1 IO_PAD608
+bit 1629 O 1 IO_PAD608 1628 1 Z
+bit 1628 C 1 *
+bit 1627 I 1 IO_PAD607
+bit 1626 O 1 IO_PAD607 1625 1 Z
+bit 1625 C 1 *
+bit 1624 I 1 IO_PAD605
+bit 1623 O 1 IO_PAD605 1622 1 Z
+bit 1622 C 1 *
+bit 1621 I 1 IO_PAD604
+bit 1620 O 1 IO_PAD604 1619 1 Z
+bit 1619 C 1 *
+bit 1618 I 1 IO_PAD603
+bit 1617 O 1 IO_PAD603 1616 1 Z
+bit 1616 C 1 *
+bit 1615 I 1 IO_PAD601
+bit 1614 O 1 IO_PAD601 1613 1 Z
+bit 1613 C 1 *
+bit 1612 I 1 IO_PAD599
+bit 1611 O 1 IO_PAD599 1610 1 Z
+bit 1610 C 1 *
+bit 1609 I 1 IO_PAD597
+bit 1608 O 1 IO_PAD597 1607 1 Z
+bit 1607 C 1 *
+bit 1606 I 1 IO_PAD596
+bit 1605 O 1 IO_PAD596 1604 1 Z
+bit 1604 C 1 *
+bit 1603 I 1 IO_PAD595
+bit 1602 O 1 IO_PAD595 1601 1 Z
+bit 1601 C 1 *
+bit 1600 I 1 IO_PAD593
+bit 1599 O 1 IO_PAD593 1598 1 Z
+bit 1598 C 1 *
+bit 1597 I 1 IO_PAD592
+bit 1596 O 1 IO_PAD592 1595 1 Z
+bit 1595 C 1 *
+bit 1594 I 1 IO_PAD591
+bit 1593 O 1 IO_PAD591 1592 1 Z
+bit 1592 C 1 *
+bit 1591 I 1 IO_PAD589
+bit 1590 O 1 IO_PAD589 1589 1 Z
+bit 1589 C 1 *
+bit 1588 I 1 IO_PAD587
+bit 1587 O 1 IO_PAD587 1586 1 Z
+bit 1586 C 1 *
+bit 1585 I 1 IO_PAD586
+bit 1584 O 1 IO_PAD586 1583 1 Z
+bit 1583 C 1 *
+bit 1582 I 1 IO_PAD585
+bit 1581 O 1 IO_PAD585 1580 1 Z
+bit 1580 C 1 *
+bit 1579 I 1 IO_PAD584
+bit 1578 O 1 IO_PAD584 1577 1 Z
+bit 1577 C 1 *
+bit 1576 I 1 IO_PAD583
+bit 1575 O 1 IO_PAD583 1574 1 Z
+bit 1574 C 1 *
+bit 1573 I 1 IO_PAD581
+bit 1572 O 1 IO_PAD581 1571 1 Z
+bit 1571 C 1 *
+bit 1570 I 1 IO_PAD579
+bit 1569 O 1 IO_PAD579 1568 1 Z
+bit 1568 C 1 *
+bit 1567 I 1 IO_PAD577
+bit 1566 O 1 IO_PAD577 1565 1 Z
+bit 1565 C 1 *
+bit 1564 I 1 IO_PAD575
+bit 1563 O 1 IO_PAD575 1562 1 Z
+bit 1562 C 1 *
+bit 1561 I 1 IO_PAD573
+bit 1560 O 1 IO_PAD573 1559 1 Z
+bit 1559 C 1 *
+bit 1558 I 1 IO_PAD572
+bit 1557 O 1 IO_PAD572 1556 1 Z
+bit 1556 C 1 *
+bit 1555 I 1 IO_PAD571
+bit 1554 O 1 IO_PAD571 1553 1 Z
+bit 1553 C 1 *
+bit 1552 I 1 IO_PAD569
+bit 1551 O 1 IO_PAD569 1550 1 Z
+bit 1550 C 1 *
+bit 1549 I 1 IO_PAD568
+bit 1548 O 1 IO_PAD568 1547 1 Z
+bit 1547 C 1 *
+bit 1546 I 1 IO_PAD567
+bit 1545 O 1 IO_PAD567 1544 1 Z
+bit 1544 C 1 *
+bit 1543 I 1 IO_PAD565
+bit 1542 O 1 IO_PAD565 1541 1 Z
+bit 1541 C 1 *
+bit 1540 I 1 IO_PAD563
+bit 1539 O 1 IO_PAD563 1538 1 Z
+bit 1538 C 1 *
+bit 1537 I 1 IO_PAD562
+bit 1536 O 1 IO_PAD562 1535 1 Z
+bit 1535 C 1 *
+bit 1534 I 1 IO_PAD561
+bit 1533 O 1 IO_PAD561 1532 1 Z
+bit 1532 C 1 *
+bit 1531 I 1 IO_PAD560
+bit 1530 O 1 IO_PAD560 1529 1 Z
+bit 1529 C 1 *
+bit 1528 I 1 IO_PAD558
+bit 1527 O 1 IO_PAD558 1526 1 Z
+bit 1526 C 1 *
+bit 1525 I 1 IO_PAD557
+bit 1524 O 1 IO_PAD557 1523 1 Z
+bit 1523 C 1 *
+bit 1522 I 1 IO_PAD556
+bit 1521 O 1 IO_PAD556 1520 1 Z
+bit 1520 C 1 *
+bit 1519 I 1 IO_PAD555
+bit 1518 O 1 IO_PAD555 1517 1 Z
+bit 1517 C 1 *
+bit 1516 I 1 IO_PAD553
+bit 1515 O 1 IO_PAD553 1514 1 Z
+bit 1514 C 1 *
+bit 1513 I 1 IO_PAD551
+bit 1512 O 1 IO_PAD551 1511 1 Z
+bit 1511 C 1 *
+bit 1510 I 1 IO_PAD550
+bit 1509 O 1 IO_PAD550 1508 1 Z
+bit 1508 C 1 *
+bit 1507 I 1 IO_PAD549
+bit 1506 O 1 IO_PAD549 1505 1 Z
+bit 1505 C 1 *
+bit 1504 I 1 IO_PAD547
+bit 1503 O 1 IO_PAD547 1502 1 Z
+bit 1502 C 1 *
+bit 1501 I 1 IO_PAD546
+bit 1500 O 1 IO_PAD546 1499 1 Z
+bit 1499 C 1 *
+bit 1498 I 1 IO_PAD545
+bit 1497 O 1 IO_PAD545 1496 1 Z
+bit 1496 C 1 *
+bit 1495 I 1 IO_PAD543
+bit 1494 O 1 IO_PAD543 1493 1 Z
+bit 1493 C 1 *
+bit 1492 I 1 IO_PAD541
+bit 1491 O 1 IO_PAD541 1490 1 Z
+bit 1490 C 1 *
+bit 1489 I 1 IO_PAD539
+bit 1488 O 1 IO_PAD539 1487 1 Z
+bit 1487 C 1 *
+bit 1486 I 1 IO_PAD537
+bit 1485 O 1 IO_PAD537 1484 1 Z
+bit 1484 C 1 *
+bit 1483 I 1 IO_PAD535
+bit 1482 O 1 IO_PAD535 1481 1 Z
+bit 1481 C 1 *
+bit 1480 I 1 IO_PAD534
+bit 1479 O 1 IO_PAD534 1478 1 Z
+bit 1478 C 1 *
+bit 1477 I 1 IO_PAD533
+bit 1476 O 1 IO_PAD533 1475 1 Z
+bit 1475 C 1 *
+bit 1474 I 1 IO_PAD532
+bit 1473 O 1 IO_PAD532 1472 1 Z
+bit 1472 C 1 *
+bit 1471 I 1 IO_PAD531
+bit 1470 O 1 IO_PAD531 1469 1 Z
+bit 1469 C 1 *
+bit 1468 I 1 IO_PAD529
+bit 1467 O 1 IO_PAD529 1466 1 Z
+bit 1466 C 1 *
+bit 1465 I 1 IO_PAD527
+bit 1464 O 1 IO_PAD527 1463 1 Z
+bit 1463 C 1 *
+bit 1462 I 1 IO_PAD526
+bit 1461 O 1 IO_PAD526 1460 1 Z
+bit 1460 C 1 *
+bit 1459 I 1 IO_PAD525
+bit 1458 O 1 IO_PAD525 1457 1 Z
+bit 1457 C 1 *
+bit 1456 I 1 IO_PAD523
+bit 1455 O 1 IO_PAD523 1454 1 Z
+bit 1454 C 1 *
+bit 1453 I 1 IO_PAD522
+bit 1452 O 1 IO_PAD522 1451 1 Z
+bit 1451 C 1 *
+bit 1450 I 1 IO_PAD521
+bit 1449 O 1 IO_PAD521 1448 1 Z
+bit 1448 C 1 *
+bit 1447 I 1 IO_PAD519
+bit 1446 O 1 IO_PAD519 1445 1 Z
+bit 1445 C 1 *
+bit 1444 I 1 IO_PAD517
+bit 1443 O 1 IO_PAD517 1442 1 Z
+bit 1442 C 1 *
+bit 1441 I 1 IO_PAD515
+bit 1440 O 1 IO_PAD515 1439 1 Z
+bit 1439 C 1 *
+bit 1438 I 1 IO_PAD514
+bit 1437 O 1 IO_PAD514 1436 1 Z
+bit 1436 C 1 *
+bit 1435 I 1 IO_PAD513
+bit 1434 O 1 IO_PAD513 1433 1 Z
+bit 1433 C 1 *
+bit 1432 I 1 IO_PAD511
+bit 1431 O 1 IO_PAD511 1430 1 Z
+bit 1430 C 1 *
+bit 1429 I 1 IO_PAD510
+bit 1428 O 1 IO_PAD510 1427 1 Z
+bit 1427 C 1 *
+bit 1426 I 1 IO_PAD509
+bit 1425 O 1 IO_PAD509 1424 1 Z
+bit 1424 C 1 *
+bit 1423 I 1 IO_PAD507
+bit 1422 O 1 IO_PAD507 1421 1 Z
+bit 1421 C 1 *
+bit 1420 I 1 IO_PAD505
+bit 1419 O 1 IO_PAD505 1418 1 Z
+bit 1418 C 1 *
+bit 1417 I 1 IO_PAD503
+bit 1416 O 1 IO_PAD503 1415 1 Z
+bit 1415 C 1 *
+bit 1414 I 1 IO_PAD502
+bit 1413 O 1 IO_PAD502 1412 1 Z
+bit 1412 C 1 *
+bit 1411 I 1 IO_PAD501
+bit 1410 O 1 IO_PAD501 1409 1 Z
+bit 1409 C 1 *
+bit 1408 I 1 IO_PAD499
+bit 1407 O 1 IO_PAD499 1406 1 Z
+bit 1406 C 1 *
+bit 1405 I 1 IO_PAD498
+bit 1404 O 1 IO_PAD498 1403 1 Z
+bit 1403 C 1 *
+bit 1402 I 1 IO_PAD497
+bit 1401 O 1 IO_PAD497 1400 1 Z
+bit 1400 C 1 *
+bit 1399 I 1 IO_PAD495
+bit 1398 O 1 IO_PAD495 1397 1 Z
+bit 1397 C 1 *
+bit 1396 I 1 IO_PAD493
+bit 1395 O 1 IO_PAD493 1394 1 Z
+bit 1394 C 1 *
+bit 1393 I 1 IO_PAD491
+bit 1392 O 1 IO_PAD491 1391 1 Z
+bit 1391 C 1 *
+bit 1390 I 1 IO_PAD490
+bit 1389 O 1 IO_PAD490 1388 1 Z
+bit 1388 C 1 *
+bit 1387 I 1 IO_PAD489
+bit 1386 O 1 IO_PAD489 1385 1 Z
+bit 1385 C 1 *
+bit 1384 I 1 IO_PAD487
+bit 1383 O 1 IO_PAD487 1382 1 Z
+bit 1382 C 1 *
+bit 1381 I 1 IO_PAD486
+bit 1380 O 1 IO_PAD486 1379 1 Z
+bit 1379 C 1 *
+bit 1378 I 1 IO_PAD485
+bit 1377 O 1 IO_PAD485 1376 1 Z
+bit 1376 C 1 *
+bit 1375 I 1 IO_PAD483
+bit 1374 O 1 IO_PAD483 1373 1 Z
+bit 1373 C 1 *
+bit 1372 I 1 IO_PAD481
+bit 1371 O 1 IO_PAD481 1370 1 Z
+bit 1370 C 1 *
+bit 1369 I 1 IO_PAD480
+bit 1368 O 1 IO_PAD480 1367 1 Z
+bit 1367 C 1 *
+bit 1366 I 1 IO_PAD479
+bit 1365 O 1 IO_PAD479 1364 1 Z
+bit 1364 C 1 *
+bit 1363 I 1 IO_PAD477
+bit 1362 O 1 IO_PAD477 1361 1 Z
+bit 1361 C 1 *
+bit 1360 I 1 IO_PAD476
+bit 1359 O 1 IO_PAD476 1358 1 Z
+bit 1358 C 1 *
+bit 1357 I 1 IO_PAD475
+bit 1356 O 1 IO_PAD475 1355 1 Z
+bit 1355 C 1 *
+bit 1354 I 1 IO_PAD474
+bit 1353 O 1 IO_PAD474 1352 1 Z
+bit 1352 C 1 *
+bit 1351 I 1 IO_PAD473
+bit 1350 O 1 IO_PAD473 1349 1 Z
+bit 1349 C 1 *
+bit 1348 I 1 IO_PAD471
+bit 1347 O 1 IO_PAD471 1346 1 Z
+bit 1346 C 1 *
+bit 1345 I 1 IO_PAD469
+bit 1344 O 1 IO_PAD469 1343 1 Z
+bit 1343 C 1 *
+bit 1342 I 1 IO_PAD467
+bit 1341 O 1 IO_PAD467 1340 1 Z
+bit 1340 C 1 *
+bit 1339 I 1 IO_PAD465
+bit 1338 O 1 IO_PAD465 1337 1 Z
+bit 1337 C 1 *
+bit 1336 I 1 IO_PAD463
+bit 1335 O 1 IO_PAD463 1334 1 Z
+bit 1334 C 1 *
+bit 1333 I 1 IO_PAD462
+bit 1332 O 1 IO_PAD462 1331 1 Z
+bit 1331 C 1 *
+bit 1330 I 1 IO_PAD461
+bit 1329 O 1 IO_PAD461 1328 1 Z
+bit 1328 C 1 *
+bit 1327 I 1 IO_PAD459
+bit 1326 O 1 IO_PAD459 1325 1 Z
+bit 1325 C 1 *
+bit 1324 I 1 IO_PAD457
+bit 1323 O 1 IO_PAD457 1322 1 Z
+bit 1322 C 1 *
+bit 1321 I 1 IO_PAD456
+bit 1320 O 1 IO_PAD456 1319 1 Z
+bit 1319 C 1 *
+bit 1318 I 1 IO_PAD455
+bit 1317 O 1 IO_PAD455 1316 1 Z
+bit 1316 C 1 *
+bit 1315 I 1 IO_PAD453
+bit 1314 O 1 IO_PAD453 1313 1 Z
+bit 1313 C 1 *
+bit 1312 I 1 IO_PAD452
+bit 1311 O 1 IO_PAD452 1310 1 Z
+bit 1310 C 1 *
+bit 1309 I 1 IO_PAD451
+bit 1308 O 1 IO_PAD451 1307 1 Z
+bit 1307 C 1 *
+bit 1306 I 1 IO_PAD450
+bit 1305 O 1 IO_PAD450 1304 1 Z
+bit 1304 C 1 *
+bit 1303 I 1 IO_PAD449
+bit 1302 O 1 IO_PAD449 1301 1 Z
+bit 1301 C 1 *
+bit 1300 I 1 IO_PAD447
+bit 1299 O 1 IO_PAD447 1298 1 Z
+bit 1298 C 1 *
+bit 1297 I 1 IO_PAD445
+bit 1296 O 1 IO_PAD445 1295 1 Z
+bit 1295 C 1 *
+bit 1294 I 1 IO_PAD443
+bit 1293 O 1 IO_PAD443 1292 1 Z
+bit 1292 C 1 *
+bit 1291 I 1 IO_PAD442
+bit 1290 O 1 IO_PAD442 1289 1 Z
+bit 1289 C 1 *
+bit 1288 I 1 IO_PAD441
+bit 1287 O 1 IO_PAD441 1286 1 Z
+bit 1286 C 1 *
+bit 1285 I 1 IO_PAD439
+bit 1284 O 1 IO_PAD439 1283 1 Z
+bit 1283 C 1 *
+bit 1282 I 1 IO_PAD438
+bit 1281 O 1 IO_PAD438 1280 1 Z
+bit 1280 C 1 *
+bit 1279 I 1 IO_PAD437
+bit 1278 O 1 IO_PAD437 1277 1 Z
+bit 1277 C 1 *
+bit 1276 I 1 IO_PAD435
+bit 1275 O 1 IO_PAD435 1274 1 Z
+bit 1274 C 1 *
+bit 1273 I 1 IO_PAD433
+bit 1272 O 1 IO_PAD433 1271 1 Z
+bit 1271 C 1 *
+bit 1270 I 1 IO_PAD431
+bit 1269 O 1 IO_PAD431 1268 1 Z
+bit 1268 C 1 *
+bit 1267 I 1 IO_PAD429
+bit 1266 O 1 IO_PAD429 1265 1 Z
+bit 1265 C 1 *
+bit 1264 I 1 IO_PAD428
+bit 1263 O 1 IO_PAD428 1262 1 Z
+bit 1262 C 1 *
+bit 1261 I 1 IO_PAD427
+bit 1260 O 1 IO_PAD427 1259 1 Z
+bit 1259 C 1 *
+bit 1258 I 1 IO_PAD426
+bit 1257 O 1 IO_PAD426 1256 1 Z
+bit 1256 C 1 *
+bit 1255 I 1 IO_PAD425
+bit 1254 O 1 IO_PAD425 1253 1 Z
+bit 1253 C 1 *
+bit 1252 I 1 IO_PAD423
+bit 1251 O 1 IO_PAD423 1250 1 Z
+bit 1250 C 1 *
+bit 1249 I 1 IO_PAD421
+bit 1248 O 1 IO_PAD421 1247 1 Z
+bit 1247 C 1 *
+bit 1246 I 1 IO_PAD420
+bit 1245 O 1 IO_PAD420 1244 1 Z
+bit 1244 C 1 *
+bit 1243 I 1 IO_PAD419
+bit 1242 O 1 IO_PAD419 1241 1 Z
+bit 1241 C 1 *
+bit 1240 I 1 IO_PAD418
+bit 1239 O 1 IO_PAD418 1238 1 Z
+bit 1238 C 1 *
+bit 1237 I 1 IO_PAD417
+bit 1236 O 1 IO_PAD417 1235 1 Z
+bit 1235 C 1 *
+bit 1234 I 1 IO_PAD415
+bit 1233 O 1 IO_PAD415 1232 1 Z
+bit 1232 C 1 *
+bit 1231 I 1 IO_PAD414
+bit 1230 O 1 IO_PAD414 1229 1 Z
+bit 1229 C 1 *
+bit 1228 I 1 M2_PAD413
+bit 1227 I 1 M0_PAD412
+bit 1226 I 1 M1_PAD411
+bit 1225 I 1 IO_PAD409
+bit 1224 O 1 IO_PAD409 1223 1 Z
+bit 1223 C 1 *
+bit 1222 I 1 IO_PAD408
+bit 1221 O 1 IO_PAD408 1220 1 Z
+bit 1220 C 1 *
+bit 1219 I 1 IO_PAD407
+bit 1218 O 1 IO_PAD407 1217 1 Z
+bit 1217 C 1 *
+bit 1216 I 1 IO_PAD406
+bit 1215 O 1 IO_PAD406 1214 1 Z
+bit 1214 C 1 *
+bit 1213 I 1 IO_PAD405
+bit 1212 O 1 IO_PAD405 1211 1 Z
+bit 1211 C 1 *
+bit 1210 I 1 IO_PAD404
+bit 1209 O 1 IO_PAD404 1208 1 Z
+bit 1208 C 1 *
+bit 1207 I 1 IO_PAD402
+bit 1206 O 1 IO_PAD402 1205 1 Z
+bit 1205 C 1 *
+bit 1204 I 1 IO_PAD401
+bit 1203 O 1 IO_PAD401 1202 1 Z
+bit 1202 C 1 *
+bit 1201 I 1 IO_PAD400
+bit 1200 O 1 IO_PAD400 1199 1 Z
+bit 1199 C 1 *
+bit 1198 I 1 IO_PAD398
+bit 1197 O 1 IO_PAD398 1196 1 Z
+bit 1196 C 1 *
+bit 1195 I 1 IO_PAD397
+bit 1194 O 1 IO_PAD397 1193 1 Z
+bit 1193 C 1 *
+bit 1192 I 1 IO_PAD396
+bit 1191 O 1 IO_PAD396 1190 1 Z
+bit 1190 C 1 *
+bit 1189 I 1 IO_PAD394
+bit 1188 O 1 IO_PAD394 1187 1 Z
+bit 1187 C 1 *
+bit 1186 I 1 IO_PAD393
+bit 1185 O 1 IO_PAD393 1184 1 Z
+bit 1184 C 1 *
+bit 1183 I 1 IO_PAD392
+bit 1182 O 1 IO_PAD392 1181 1 Z
+bit 1181 C 1 *
+bit 1180 O 1 *
+bit 1179 O 1 *
+bit 1178 O 1 *
+bit 1177 O 1 *
+bit 1176 O 1 *
+bit 1175 O 1 *
+bit 1174 I 1 IO_PAD390
+bit 1173 O 1 IO_PAD390 1172 1 Z
+bit 1172 C 1 *
+bit 1171 I 1 IO_PAD388
+bit 1170 O 1 IO_PAD388 1169 1 Z
+bit 1169 C 1 *
+bit 1168 I 1 IO_PAD386
+bit 1167 O 1 IO_PAD386 1166 1 Z
+bit 1166 C 1 *
+bit 1165 I 1 IO_PAD385
+bit 1164 O 1 IO_PAD385 1163 1 Z
+bit 1163 C 1 *
+bit 1162 I 1 IO_PAD384
+bit 1161 O 1 IO_PAD384 1160 1 Z
+bit 1160 C 1 *
+bit 1159 I 1 IO_PAD383
+bit 1158 O 1 IO_PAD383 1157 1 Z
+bit 1157 C 1 *
+bit 1156 I 1 IO_PAD382
+bit 1155 O 1 IO_PAD382 1154 1 Z
+bit 1154 C 1 *
+bit 1153 I 1 IO_PAD380
+bit 1152 O 1 IO_PAD380 1151 1 Z
+bit 1151 C 1 *
+bit 1150 I 1 IO_PAD378
+bit 1149 O 1 IO_PAD378 1148 1 Z
+bit 1148 C 1 *
+bit 1147 I 1 IO_PAD377
+bit 1146 O 1 IO_PAD377 1145 1 Z
+bit 1145 C 1 *
+bit 1144 I 1 IO_PAD376
+bit 1143 O 1 IO_PAD376 1142 1 Z
+bit 1142 C 1 *
+bit 1141 I 1 IO_PAD375
+bit 1140 O 1 IO_PAD375 1139 1 Z
+bit 1139 C 1 *
+bit 1138 I 1 IO_PAD374
+bit 1137 O 1 IO_PAD374 1136 1 Z
+bit 1136 C 1 *
+bit 1135 I 1 IO_PAD373
+bit 1134 O 1 IO_PAD373 1133 1 Z
+bit 1133 C 1 *
+bit 1132 I 1 IO_PAD372
+bit 1131 O 1 IO_PAD372 1130 1 Z
+bit 1130 C 1 *
+bit 1129 I 1 IO_PAD370
+bit 1128 O 1 IO_PAD370 1127 1 Z
+bit 1127 C 1 *
+bit 1126 I 1 IO_PAD368
+bit 1125 O 1 IO_PAD368 1124 1 Z
+bit 1124 C 1 *
+bit 1123 I 1 IO_PAD367
+bit 1122 O 1 IO_PAD367 1121 1 Z
+bit 1121 C 1 *
+bit 1120 I 1 IO_PAD366
+bit 1119 O 1 IO_PAD366 1118 1 Z
+bit 1118 C 1 *
+bit 1117 I 1 IO_PAD365
+bit 1116 O 1 IO_PAD365 1115 1 Z
+bit 1115 C 1 *
+bit 1114 I 1 IO_PAD364
+bit 1113 O 1 IO_PAD364 1112 1 Z
+bit 1112 C 1 *
+bit 1111 I 1 IO_PAD362
+bit 1110 O 1 IO_PAD362 1109 1 Z
+bit 1109 C 1 *
+bit 1108 I 1 IO_PAD360
+bit 1107 O 1 IO_PAD360 1106 1 Z
+bit 1106 C 1 *
+bit 1105 I 1 IO_PAD359
+bit 1104 O 1 IO_PAD359 1103 1 Z
+bit 1103 C 1 *
+bit 1102 I 1 IO_PAD358
+bit 1101 O 1 IO_PAD358 1100 1 Z
+bit 1100 C 1 *
+bit 1099 O 1 *
+bit 1098 O 1 *
+bit 1097 O 1 *
+bit 1096 O 1 *
+bit 1095 O 1 *
+bit 1094 O 1 *
+bit 1093 I 1 IO_PAD356
+bit 1092 O 1 IO_PAD356 1091 1 Z
+bit 1091 C 1 *
+bit 1090 I 1 IO_PAD354
+bit 1089 O 1 IO_PAD354 1088 1 Z
+bit 1088 C 1 *
+bit 1087 I 1 IO_PAD353
+bit 1086 O 1 IO_PAD353 1085 1 Z
+bit 1085 C 1 *
+bit 1084 I 1 IO_PAD352
+bit 1083 O 1 IO_PAD352 1082 1 Z
+bit 1082 C 1 *
+bit 1081 I 1 IO_PAD350
+bit 1080 O 1 IO_PAD350 1079 1 Z
+bit 1079 C 1 *
+bit 1078 I 1 IO_PAD349
+bit 1077 O 1 IO_PAD349 1076 1 Z
+bit 1076 C 1 *
+bit 1075 I 1 IO_PAD348
+bit 1074 O 1 IO_PAD348 1073 1 Z
+bit 1073 C 1 *
+bit 1072 I 1 IO_PAD347
+bit 1071 O 1 IO_PAD347 1070 1 Z
+bit 1070 C 1 *
+bit 1069 I 1 IO_PAD346
+bit 1068 O 1 IO_PAD346 1067 1 Z
+bit 1067 C 1 *
+bit 1066 I 1 IO_PAD344
+bit 1065 O 1 IO_PAD344 1064 1 Z
+bit 1064 C 1 *
+bit 1063 I 1 IO_PAD342
+bit 1062 O 1 IO_PAD342 1061 1 Z
+bit 1061 C 1 *
+bit 1060 I 1 IO_PAD341
+bit 1059 O 1 IO_PAD341 1058 1 Z
+bit 1058 C 1 *
+bit 1057 I 1 IO_PAD340
+bit 1056 O 1 IO_PAD340 1055 1 Z
+bit 1055 C 1 *
+bit 1054 I 1 IO_PAD339
+bit 1053 O 1 IO_PAD339 1052 1 Z
+bit 1052 C 1 *
+bit 1051 I 1 IO_PAD338
+bit 1050 O 1 IO_PAD338 1049 1 Z
+bit 1049 C 1 *
+bit 1048 I 1 IO_PAD336
+bit 1047 O 1 IO_PAD336 1046 1 Z
+bit 1046 C 1 *
+bit 1045 I 1 IO_PAD335
+bit 1044 O 1 IO_PAD335 1043 1 Z
+bit 1043 C 1 *
+bit 1042 I 1 IO_PAD334
+bit 1041 O 1 IO_PAD334 1040 1 Z
+bit 1040 C 1 *
+bit 1039 I 1 IO_PAD332
+bit 1038 O 1 IO_PAD332 1037 1 Z
+bit 1037 C 1 *
+bit 1036 I 1 IO_PAD330
+bit 1035 O 1 IO_PAD330 1034 1 Z
+bit 1034 C 1 *
+bit 1033 I 1 IO_PAD329
+bit 1032 O 1 IO_PAD329 1031 1 Z
+bit 1031 C 1 *
+bit 1030 I 1 IO_PAD328
+bit 1029 O 1 IO_PAD328 1028 1 Z
+bit 1028 C 1 *
+bit 1027 O 1 *
+bit 1026 O 1 *
+bit 1025 O 1 *
+bit 1024 O 1 *
+bit 1023 O 1 *
+bit 1022 O 1 *
+bit 1021 I 1 IO_PAD326
+bit 1020 O 1 IO_PAD326 1019 1 Z
+bit 1019 C 1 *
+bit 1018 I 1 IO_PAD324
+bit 1017 O 1 IO_PAD324 1016 1 Z
+bit 1016 C 1 *
+bit 1015 I 1 IO_PAD323
+bit 1014 O 1 IO_PAD323 1013 1 Z
+bit 1013 C 1 *
+bit 1012 I 1 IO_PAD322
+bit 1011 O 1 IO_PAD322 1010 1 Z
+bit 1010 C 1 *
+bit 1009 I 1 IO_PAD321
+bit 1008 O 1 IO_PAD321 1007 1 Z
+bit 1007 C 1 *
+bit 1006 I 1 IO_PAD320
+bit 1005 O 1 IO_PAD320 1004 1 Z
+bit 1004 C 1 *
+bit 1003 I 1 IO_PAD318
+bit 1002 O 1 IO_PAD318 1001 1 Z
+bit 1001 C 1 *
+bit 1000 I 1 IO_PAD316
+bit 999 O 1 IO_PAD316 998 1 Z
+bit 998 C 1 *
+bit 997 I 1 IO_PAD315
+bit 996 O 1 IO_PAD315 995 1 Z
+bit 995 C 1 *
+bit 994 I 1 IO_PAD314
+bit 993 O 1 IO_PAD314 992 1 Z
+bit 992 C 1 *
+bit 991 I 1 IO_PAD313
+bit 990 O 1 IO_PAD313 989 1 Z
+bit 989 C 1 *
+bit 988 I 1 IO_PAD312
+bit 987 O 1 IO_PAD312 986 1 Z
+bit 986 C 1 *
+bit 985 I 1 IO_PAD310
+bit 984 O 1 IO_PAD310 983 1 Z
+bit 983 C 1 *
+bit 982 I 1 IO_PAD308
+bit 981 O 1 IO_PAD308 980 1 Z
+bit 980 C 1 *
+bit 979 I 1 IO_PAD307
+bit 978 O 1 IO_PAD307 977 1 Z
+bit 977 C 1 *
+bit 976 I 1 IO_PAD306
+bit 975 O 1 IO_PAD306 974 1 Z
+bit 974 C 1 *
+bit 973 I 1 IO_PAD305
+bit 972 O 1 IO_PAD305 971 1 Z
+bit 971 C 1 *
+bit 970 I 1 IO_PAD304
+bit 969 O 1 IO_PAD304 968 1 Z
+bit 968 C 1 *
+bit 967 I 1 IO_PAD302
+bit 966 O 1 IO_PAD302 965 1 Z
+bit 965 C 1 *
+bit 964 I 1 IO_PAD301
+bit 963 O 1 IO_PAD301 962 1 Z
+bit 962 C 1 *
+bit 961 I 1 IO_PAD300
+bit 960 O 1 IO_PAD300 959 1 Z
+bit 959 C 1 *
+bit 958 I 1 IO_PAD298
+bit 957 O 1 IO_PAD298 956 1 Z
+bit 956 C 1 *
+bit 955 I 1 IO_PAD296
+bit 954 O 1 IO_PAD296 953 1 Z
+bit 953 C 1 *
+bit 952 I 1 IO_PAD295
+bit 951 O 1 IO_PAD295 950 1 Z
+bit 950 C 1 *
+bit 949 I 1 IO_PAD294
+bit 948 O 1 IO_PAD294 947 1 Z
+bit 947 C 1 *
+bit 946 O 1 *
+bit 945 O 1 *
+bit 944 O 1 *
+bit 943 O 1 *
+bit 942 O 1 *
+bit 941 O 1 *
+bit 940 I 1 IO_PAD292
+bit 939 O 1 IO_PAD292 938 1 Z
+bit 938 C 1 *
+bit 937 I 1 IO_PAD290
+bit 936 O 1 IO_PAD290 935 1 Z
+bit 935 C 1 *
+bit 934 I 1 IO_PAD289
+bit 933 O 1 IO_PAD289 932 1 Z
+bit 932 C 1 *
+bit 931 I 1 IO_PAD288
+bit 930 O 1 IO_PAD288 929 1 Z
+bit 929 C 1 *
+bit 928 I 1 IO_PAD287
+bit 927 O 1 IO_PAD287 926 1 Z
+bit 926 C 1 *
+bit 925 I 1 IO_PAD286
+bit 924 O 1 IO_PAD286 923 1 Z
+bit 923 C 1 *
+bit 922 I 1 IO_PAD284
+bit 921 O 1 IO_PAD284 920 1 Z
+bit 920 C 1 *
+bit 919 I 1 IO_PAD282
+bit 918 O 1 IO_PAD282 917 1 Z
+bit 917 C 1 *
+bit 916 I 1 IO_PAD281
+bit 915 O 1 IO_PAD281 914 1 Z
+bit 914 C 1 *
+bit 913 I 1 IO_PAD279
+bit 912 O 1 IO_PAD279 911 1 Z
+bit 911 C 1 *
+bit 910 I 1 IO_PAD278
+bit 909 O 1 IO_PAD278 908 1 Z
+bit 908 C 1 *
+bit 907 I 1 IO_PAD276
+bit 906 O 1 IO_PAD276 905 1 Z
+bit 905 C 1 *
+bit 904 I 1 IO_PAD274
+bit 903 O 1 IO_PAD274 902 1 Z
+bit 902 C 1 *
+bit 901 I 1 IO_PAD273
+bit 900 O 1 IO_PAD273 899 1 Z
+bit 899 C 1 *
+bit 898 I 1 IO_PAD272
+bit 897 O 1 IO_PAD272 896 1 Z
+bit 896 C 1 *
+bit 895 I 1 IO_PAD271
+bit 894 O 1 IO_PAD271 893 1 Z
+bit 893 C 1 *
+bit 892 I 1 IO_PAD270
+bit 891 O 1 IO_PAD270 890 1 Z
+bit 890 C 1 *
+bit 889 I 1 IO_PAD268
+bit 888 O 1 IO_PAD268 887 1 Z
+bit 887 C 1 *
+bit 886 O 1 *
+bit 885 O 1 *
+bit 884 O 1 *
+bit 883 O 1 *
+bit 882 O 1 *
+bit 881 O 1 *
+bit 880 I 1 IO_PAD266
+bit 879 O 1 IO_PAD266 878 1 Z
+bit 878 C 1 *
+bit 877 I 1 IO_PAD265
+bit 876 O 1 IO_PAD265 875 1 Z
+bit 875 C 1 *
+bit 874 I 1 IO_PAD264
+bit 873 O 1 IO_PAD264 872 1 Z
+bit 872 C 1 *
+bit 871 I 1 IO_PAD262
+bit 870 O 1 IO_PAD262 869 1 Z
+bit 869 C 1 *
+bit 868 I 1 IO_PAD260
+bit 867 O 1 IO_PAD260 866 1 Z
+bit 866 C 1 *
+bit 865 I 1 IO_PAD259
+bit 864 O 1 IO_PAD259 863 1 Z
+bit 863 C 1 *
+bit 862 I 1 IO_PAD258
+bit 861 O 1 IO_PAD258 860 1 Z
+bit 860 C 1 *
+bit 859 I 1 IO_PAD256
+bit 858 O 1 IO_PAD256 857 1 Z
+bit 857 C 1 *
+bit 856 I 1 IO_PAD255
+bit 855 O 1 IO_PAD255 854 1 Z
+bit 854 C 1 *
+bit 853 I 1 IO_PAD254
+bit 852 O 1 IO_PAD254 851 1 Z
+bit 851 C 1 *
+bit 850 I 1 IO_PAD253
+bit 849 O 1 IO_PAD253 848 1 Z
+bit 848 C 1 *
+bit 847 I 1 IO_PAD252
+bit 846 O 1 IO_PAD252 845 1 Z
+bit 845 C 1 *
+bit 844 I 1 IO_PAD250
+bit 843 O 1 IO_PAD250 842 1 Z
+bit 842 C 1 *
+bit 841 I 1 IO_PAD248
+bit 840 O 1 IO_PAD248 839 1 Z
+bit 839 C 1 *
+bit 838 I 1 IO_PAD247
+bit 837 O 1 IO_PAD247 836 1 Z
+bit 836 C 1 *
+bit 835 I 1 IO_PAD246
+bit 834 O 1 IO_PAD246 833 1 Z
+bit 833 C 1 *
+bit 832 I 1 IO_PAD245
+bit 831 O 1 IO_PAD245 830 1 Z
+bit 830 C 1 *
+bit 829 I 1 IO_PAD244
+bit 828 O 1 IO_PAD244 827 1 Z
+bit 827 C 1 *
+bit 826 I 1 IO_PAD242
+bit 825 O 1 IO_PAD242 824 1 Z
+bit 824 C 1 *
+bit 823 I 1 IO_PAD240
+bit 822 O 1 IO_PAD240 821 1 Z
+bit 821 C 1 *
+bit 820 I 1 IO_PAD239
+bit 819 O 1 IO_PAD239 818 1 Z
+bit 818 C 1 *
+bit 817 I 1 IO_PAD238
+bit 816 O 1 IO_PAD238 815 1 Z
+bit 815 C 1 *
+bit 814 I 1 IO_PAD237
+bit 813 O 1 IO_PAD237 812 1 Z
+bit 812 C 1 *
+bit 811 I 1 IO_PAD236
+bit 810 O 1 IO_PAD236 809 1 Z
+bit 809 C 1 *
+bit 808 I 1 IO_PAD234
+bit 807 O 1 IO_PAD234 806 1 Z
+bit 806 C 1 *
+bit 805 O 1 *
+bit 804 O 1 *
+bit 803 O 1 *
+bit 802 O 1 *
+bit 801 O 1 *
+bit 800 O 1 *
+bit 799 I 1 IO_PAD232
+bit 798 O 1 IO_PAD232 797 1 Z
+bit 797 C 1 *
+bit 796 I 1 IO_PAD231
+bit 795 O 1 IO_PAD231 794 1 Z
+bit 794 C 1 *
+bit 793 I 1 IO_PAD230
+bit 792 O 1 IO_PAD230 791 1 Z
+bit 791 C 1 *
+bit 790 I 1 IO_PAD228
+bit 789 O 1 IO_PAD228 788 1 Z
+bit 788 C 1 *
+bit 787 I 1 IO_PAD226
+bit 786 O 1 IO_PAD226 785 1 Z
+bit 785 C 1 *
+bit 784 I 1 IO_PAD225
+bit 783 O 1 IO_PAD225 782 1 Z
+bit 782 C 1 *
+bit 781 I 1 IO_PAD224
+bit 780 O 1 IO_PAD224 779 1 Z
+bit 779 C 1 *
+bit 778 I 1 IO_PAD222
+bit 777 O 1 IO_PAD222 776 1 Z
+bit 776 C 1 *
+bit 775 I 1 IO_PAD221
+bit 774 O 1 IO_PAD221 773 1 Z
+bit 773 C 1 *
+bit 772 I 1 IO_PAD220
+bit 771 O 1 IO_PAD220 770 1 Z
+bit 770 C 1 *
+bit 769 I 1 IO_PAD219
+bit 768 O 1 IO_PAD219 767 1 Z
+bit 767 C 1 *
+bit 766 I 1 IO_PAD218
+bit 765 O 1 IO_PAD218 764 1 Z
+bit 764 C 1 *
+bit 763 I 1 IO_PAD216
+bit 762 O 1 IO_PAD216 761 1 Z
+bit 761 C 1 *
+bit 760 I 1 IO_PAD214
+bit 759 O 1 IO_PAD214 758 1 Z
+bit 758 C 1 *
+bit 757 I 1 IO_PAD213
+bit 756 O 1 IO_PAD213 755 1 Z
+bit 755 C 1 *
+bit 754 I 1 IO_PAD212
+bit 753 O 1 IO_PAD212 752 1 Z
+bit 752 C 1 *
+bit 751 I 1 IO_PAD211
+bit 750 O 1 IO_PAD211 749 1 Z
+bit 749 C 1 *
+bit 748 I 1 IO_PAD210
+bit 747 O 1 IO_PAD210 746 1 Z
+bit 746 C 1 *
+bit 745 I 1 IO_PAD208
+bit 744 O 1 IO_PAD208 743 1 Z
+bit 743 C 1 *
+bit 742 I 1 IO_PAD207
+bit 741 O 1 IO_PAD207 740 1 Z
+bit 740 C 1 *
+bit 739 I 1 IO_PAD206
+bit 738 O 1 IO_PAD206 737 1 Z
+bit 737 C 1 *
+bit 736 I 1 IO_PAD204
+bit 735 O 1 IO_PAD204 734 1 Z
+bit 734 C 1 *
+bit 733 O 1 *
+bit 732 O 1 *
+bit 731 O 1 *
+bit 730 O 1 *
+bit 729 O 1 *
+bit 728 O 1 *
+bit 727 I 1 IO_PAD202
+bit 726 O 1 IO_PAD202 725 1 Z
+bit 725 C 1 *
+bit 724 I 1 IO_PAD201
+bit 723 O 1 IO_PAD201 722 1 Z
+bit 722 C 1 *
+bit 721 I 1 IO_PAD200
+bit 720 O 1 IO_PAD200 719 1 Z
+bit 719 C 1 *
+bit 718 I 1 IO_PAD198
+bit 717 O 1 IO_PAD198 716 1 Z
+bit 716 C 1 *
+bit 715 I 1 IO_PAD196
+bit 714 O 1 IO_PAD196 713 1 Z
+bit 713 C 1 *
+bit 712 I 1 IO_PAD195
+bit 711 O 1 IO_PAD195 710 1 Z
+bit 710 C 1 *
+bit 709 I 1 IO_PAD194
+bit 708 O 1 IO_PAD194 707 1 Z
+bit 707 C 1 *
+bit 706 I 1 IO_PAD193
+bit 705 O 1 IO_PAD193 704 1 Z
+bit 704 C 1 *
+bit 703 I 1 IO_PAD192
+bit 702 O 1 IO_PAD192 701 1 Z
+bit 701 C 1 *
+bit 700 I 1 IO_PAD190
+bit 699 O 1 IO_PAD190 698 1 Z
+bit 698 C 1 *
+bit 697 I 1 IO_PAD188
+bit 696 O 1 IO_PAD188 695 1 Z
+bit 695 C 1 *
+bit 694 I 1 IO_PAD187
+bit 693 O 1 IO_PAD187 692 1 Z
+bit 692 C 1 *
+bit 691 I 1 IO_PAD186
+bit 690 O 1 IO_PAD186 689 1 Z
+bit 689 C 1 *
+bit 688 I 1 IO_PAD185
+bit 687 O 1 IO_PAD185 686 1 Z
+bit 686 C 1 *
+bit 685 I 1 IO_PAD184
+bit 684 O 1 IO_PAD184 683 1 Z
+bit 683 C 1 *
+bit 682 I 1 IO_PAD183
+bit 681 O 1 IO_PAD183 680 1 Z
+bit 680 C 1 *
+bit 679 I 1 IO_PAD182
+bit 678 O 1 IO_PAD182 677 1 Z
+bit 677 C 1 *
+bit 676 I 1 IO_PAD180
+bit 675 O 1 IO_PAD180 674 1 Z
+bit 674 C 1 *
+bit 673 I 1 IO_PAD178
+bit 672 O 1 IO_PAD178 671 1 Z
+bit 671 C 1 *
+bit 670 I 1 IO_PAD177
+bit 669 O 1 IO_PAD177 668 1 Z
+bit 668 C 1 *
+bit 667 I 1 IO_PAD176
+bit 666 O 1 IO_PAD176 665 1 Z
+bit 665 C 1 *
+bit 664 I 1 IO_PAD175
+bit 663 O 1 IO_PAD175 662 1 Z
+bit 662 C 1 *
+bit 661 I 1 IO_PAD174
+bit 660 O 1 IO_PAD174 659 1 Z
+bit 659 C 1 *
+bit 658 I 1 IO_PAD172
+bit 657 O 1 IO_PAD172 656 1 Z
+bit 656 C 1 *
+bit 655 I 1 IO_PAD170
+bit 654 O 1 IO_PAD170 653 1 Z
+bit 653 C 1 *
+bit 652 O 1 *
+bit 651 O 1 *
+bit 650 O 1 *
+bit 649 O 1 *
+bit 648 O 1 *
+bit 647 O 1 *
+bit 646 I 1 IO_PAD168
+bit 645 O 1 IO_PAD168 644 1 Z
+bit 644 C 1 *
+bit 643 I 1 IO_PAD167
+bit 642 O 1 IO_PAD167 641 1 Z
+bit 641 C 1 *
+bit 640 I 1 IO_PAD166
+bit 639 O 1 IO_PAD166 638 1 Z
+bit 638 C 1 *
+bit 637 I 1 IO_PAD164
+bit 636 O 1 IO_PAD164 635 1 Z
+bit 635 C 1 *
+bit 634 I 1 IO_PAD163
+bit 633 O 1 IO_PAD163 632 1 Z
+bit 632 C 1 *
+bit 631 I 1 IO_PAD162
+bit 630 O 1 IO_PAD162 629 1 Z
+bit 629 C 1 *
+bit 628 I 1 IO_PAD160
+bit 627 O 1 IO_PAD160 626 1 Z
+bit 626 C 1 *
+bit 625 I 1 IO_PAD159
+bit 624 O 1 IO_PAD159 623 1 Z
+bit 623 C 1 *
+bit 622 I 1 IO_PAD158
+bit 621 O 1 IO_PAD158 620 1 Z
+bit 620 C 1 *
+bit 619 I 1 IO_PAD156
+bit 618 O 1 IO_PAD156 617 1 Z
+bit 617 C 1 *
+bit 616 I 1 IO_PAD155
+bit 615 O 1 IO_PAD155 614 1 Z
+bit 614 C 1 *
+bit 613 I 1 IO_PAD154
+bit 612 O 1 IO_PAD154 611 1 Z
+bit 611 C 1 *
+bit 610 I 1 IO_PAD153
+bit 609 O 1 IO_PAD153 608 1 Z
+bit 608 C 1 *
+bit 607 I 1 IO_PAD152
+bit 606 O 1 IO_PAD152 605 1 Z
+bit 605 C 1 *
+bit 604 I 1 IO_PAD151
+bit 603 O 1 IO_PAD151 602 1 Z
+bit 602 C 1 *
+bit 601 O 1 *
+bit 600 I 1 HSWAP_EN_PAD147
+bit 599 I 1 IO_PAD146
+bit 598 O 1 IO_PAD146 597 1 Z
+bit 597 C 1 *
+bit 596 I 1 IO_PAD145
+bit 595 O 1 IO_PAD145 594 1 Z
+bit 594 C 1 *
+bit 593 I 1 IO_PAD143
+bit 592 O 1 IO_PAD143 591 1 Z
+bit 591 C 1 *
+bit 590 I 1 IO_PAD142
+bit 589 O 1 IO_PAD142 588 1 Z
+bit 588 C 1 *
+bit 587 I 1 IO_PAD141
+bit 586 O 1 IO_PAD141 585 1 Z
+bit 585 C 1 *
+bit 584 I 1 IO_PAD140
+bit 583 O 1 IO_PAD140 582 1 Z
+bit 582 C 1 *
+bit 581 I 1 IO_PAD139
+bit 580 O 1 IO_PAD139 579 1 Z
+bit 579 C 1 *
+bit 578 I 1 IO_PAD137
+bit 577 O 1 IO_PAD137 576 1 Z
+bit 576 C 1 *
+bit 575 I 1 IO_PAD135
+bit 574 O 1 IO_PAD135 573 1 Z
+bit 573 C 1 *
+bit 572 I 1 IO_PAD134
+bit 571 O 1 IO_PAD134 570 1 Z
+bit 570 C 1 *
+bit 569 I 1 IO_PAD133
+bit 568 O 1 IO_PAD133 567 1 Z
+bit 567 C 1 *
+bit 566 I 1 IO_PAD132
+bit 565 O 1 IO_PAD132 564 1 Z
+bit 564 C 1 *
+bit 563 I 1 IO_PAD131
+bit 562 O 1 IO_PAD131 561 1 Z
+bit 561 C 1 *
+bit 560 I 1 IO_PAD129
+bit 559 O 1 IO_PAD129 558 1 Z
+bit 558 C 1 *
+bit 557 I 1 IO_PAD127
+bit 556 O 1 IO_PAD127 555 1 Z
+bit 555 C 1 *
+bit 554 I 1 IO_PAD125
+bit 553 O 1 IO_PAD125 552 1 Z
+bit 552 C 1 *
+bit 551 I 1 IO_PAD123
+bit 550 O 1 IO_PAD123 549 1 Z
+bit 549 C 1 *
+bit 548 I 1 IO_PAD122
+bit 547 O 1 IO_PAD122 546 1 Z
+bit 546 C 1 *
+bit 545 I 1 IO_PAD121
+bit 544 O 1 IO_PAD121 543 1 Z
+bit 543 C 1 *
+bit 542 I 1 IO_PAD119
+bit 541 O 1 IO_PAD119 540 1 Z
+bit 540 C 1 *
+bit 539 I 1 IO_PAD118
+bit 538 O 1 IO_PAD118 537 1 Z
+bit 537 C 1 *
+bit 536 I 1 IO_PAD117
+bit 535 O 1 IO_PAD117 534 1 Z
+bit 534 C 1 *
+bit 533 I 1 IO_PAD115
+bit 532 O 1 IO_PAD115 531 1 Z
+bit 531 C 1 *
+bit 530 I 1 IO_PAD113
+bit 529 O 1 IO_PAD113 528 1 Z
+bit 528 C 1 *
+bit 527 I 1 IO_PAD111
+bit 526 O 1 IO_PAD111 525 1 Z
+bit 525 C 1 *
+bit 524 I 1 IO_PAD110
+bit 523 O 1 IO_PAD110 522 1 Z
+bit 522 C 1 *
+bit 521 I 1 IO_PAD109
+bit 520 O 1 IO_PAD109 519 1 Z
+bit 519 C 1 *
+bit 518 I 1 IO_PAD108
+bit 517 O 1 IO_PAD108 516 1 Z
+bit 516 C 1 *
+bit 515 I 1 IO_PAD107
+bit 514 O 1 IO_PAD107 513 1 Z
+bit 513 C 1 *
+bit 512 I 1 IO_PAD105
+bit 511 O 1 IO_PAD105 510 1 Z
+bit 510 C 1 *
+bit 509 I 1 IO_PAD104
+bit 508 O 1 IO_PAD104 507 1 Z
+bit 507 C 1 *
+bit 506 I 1 IO_PAD103
+bit 505 O 1 IO_PAD103 504 1 Z
+bit 504 C 1 *
+bit 503 I 1 IO_PAD101
+bit 502 O 1 IO_PAD101 501 1 Z
+bit 501 C 1 *
+bit 500 I 1 IO_PAD99
+bit 499 O 1 IO_PAD99 498 1 Z
+bit 498 C 1 *
+bit 497 I 1 IO_PAD98
+bit 496 O 1 IO_PAD98 495 1 Z
+bit 495 C 1 *
+bit 494 I 1 IO_PAD97
+bit 493 O 1 IO_PAD97 492 1 Z
+bit 492 C 1 *
+bit 491 I 1 IO_PAD95
+bit 490 O 1 IO_PAD95 489 1 Z
+bit 489 C 1 *
+bit 488 I 1 IO_PAD93
+bit 487 O 1 IO_PAD93 486 1 Z
+bit 486 C 1 *
+bit 485 I 1 IO_PAD91
+bit 484 O 1 IO_PAD91 483 1 Z
+bit 483 C 1 *
+bit 482 I 1 IO_PAD89
+bit 481 O 1 IO_PAD89 480 1 Z
+bit 480 C 1 *
+bit 479 I 1 IO_PAD87
+bit 478 O 1 IO_PAD87 477 1 Z
+bit 477 C 1 *
+bit 476 I 1 IO_PAD86
+bit 475 O 1 IO_PAD86 474 1 Z
+bit 474 C 1 *
+bit 473 I 1 IO_PAD85
+bit 472 O 1 IO_PAD85 471 1 Z
+bit 471 C 1 *
+bit 470 I 1 IO_PAD84
+bit 469 O 1 IO_PAD84 468 1 Z
+bit 468 C 1 *
+bit 467 I 1 IO_PAD83
+bit 466 O 1 IO_PAD83 465 1 Z
+bit 465 C 1 *
+bit 464 I 1 IO_PAD81
+bit 463 O 1 IO_PAD81 462 1 Z
+bit 462 C 1 *
+bit 461 I 1 IO_PAD80
+bit 460 O 1 IO_PAD80 459 1 Z
+bit 459 C 1 *
+bit 458 I 1 IO_PAD79
+bit 457 O 1 IO_PAD79 456 1 Z
+bit 456 C 1 *
+bit 455 I 1 IO_PAD77
+bit 454 O 1 IO_PAD77 453 1 Z
+bit 453 C 1 *
+bit 452 I 1 IO_PAD75
+bit 451 O 1 IO_PAD75 450 1 Z
+bit 450 C 1 *
+bit 449 I 1 IO_PAD74
+bit 448 O 1 IO_PAD74 447 1 Z
+bit 447 C 1 *
+bit 446 I 1 IO_PAD73
+bit 445 O 1 IO_PAD73 444 1 Z
+bit 444 C 1 *
+bit 443 I 1 IO_PAD71
+bit 442 O 1 IO_PAD71 441 1 Z
+bit 441 C 1 *
+bit 440 I 1 IO_PAD70
+bit 439 O 1 IO_PAD70 438 1 Z
+bit 438 C 1 *
+bit 437 I 1 IO_PAD69
+bit 436 O 1 IO_PAD69 435 1 Z
+bit 435 C 1 *
+bit 434 I 1 IO_PAD67
+bit 433 O 1 IO_PAD67 432 1 Z
+bit 432 C 1 *
+bit 431 I 1 IO_PAD65
+bit 430 O 1 IO_PAD65 429 1 Z
+bit 429 C 1 *
+bit 428 I 1 IO_PAD63
+bit 427 O 1 IO_PAD63 426 1 Z
+bit 426 C 1 *
+bit 425 I 1 IO_PAD62
+bit 424 O 1 IO_PAD62 423 1 Z
+bit 423 C 1 *
+bit 422 I 1 IO_PAD61
+bit 421 O 1 IO_PAD61 420 1 Z
+bit 420 C 1 *
+bit 419 I 1 IO_PAD59
+bit 418 O 1 IO_PAD59 417 1 Z
+bit 417 C 1 *
+bit 416 I 1 IO_PAD58
+bit 415 O 1 IO_PAD58 414 1 Z
+bit 414 C 1 *
+bit 413 I 1 IO_PAD57
+bit 412 O 1 IO_PAD57 411 1 Z
+bit 411 C 1 *
+bit 410 I 1 IO_PAD55
+bit 409 O 1 IO_PAD55 408 1 Z
+bit 408 C 1 *
+bit 407 I 1 IO_PAD53
+bit 406 O 1 IO_PAD53 405 1 Z
+bit 405 C 1 *
+bit 404 I 1 IO_PAD51
+bit 403 O 1 IO_PAD51 402 1 Z
+bit 402 C 1 *
+bit 401 I 1 IO_PAD50
+bit 400 O 1 IO_PAD50 399 1 Z
+bit 399 C 1 *
+bit 398 I 1 IO_PAD49
+bit 397 O 1 IO_PAD49 396 1 Z
+bit 396 C 1 *
+bit 395 I 1 IO_PAD47
+bit 394 O 1 IO_PAD47 393 1 Z
+bit 393 C 1 *
+bit 392 I 1 IO_PAD46
+bit 391 O 1 IO_PAD46 390 1 Z
+bit 390 C 1 *
+bit 389 I 1 IO_PAD45
+bit 388 O 1 IO_PAD45 387 1 Z
+bit 387 C 1 *
+bit 386 I 1 IO_PAD43
+bit 385 O 1 IO_PAD43 384 1 Z
+bit 384 C 1 *
+bit 383 I 1 IO_PAD41
+bit 382 O 1 IO_PAD41 381 1 Z
+bit 381 C 1 *
+bit 380 I 1 IO_PAD39
+bit 379 O 1 IO_PAD39 378 1 Z
+bit 378 C 1 *
+bit 377 I 1 IO_PAD38
+bit 376 O 1 IO_PAD38 375 1 Z
+bit 375 C 1 *
+bit 374 I 1 IO_PAD37
+bit 373 O 1 IO_PAD37 372 1 Z
+bit 372 C 1 *
+bit 371 I 1 IO_PAD35
+bit 370 O 1 IO_PAD35 369 1 Z
+bit 369 C 1 *
+bit 368 I 1 IO_PAD34
+bit 367 O 1 IO_PAD34 366 1 Z
+bit 366 C 1 *
+bit 365 I 1 IO_PAD33
+bit 364 O 1 IO_PAD33 363 1 Z
+bit 363 C 1 *
+bit 362 I 1 IO_PAD31
+bit 361 O 1 IO_PAD31 360 1 Z
+bit 360 C 1 *
+bit 359 I 1 IO_PAD29
+bit 358 O 1 IO_PAD29 357 1 Z
+bit 357 C 1 *
+bit 356 I 1 IO_PAD28
+bit 355 O 1 IO_PAD28 354 1 Z
+bit 354 C 1 *
+bit 353 I 1 IO_PAD27
+bit 352 O 1 IO_PAD27 351 1 Z
+bit 351 C 1 *
+bit 350 I 1 IO_PAD26
+bit 349 O 1 IO_PAD26 348 1 Z
+bit 348 C 1 *
+bit 347 I 1 IO_PAD25
+bit 346 O 1 IO_PAD25 345 1 Z
+bit 345 C 1 *
+bit 344 I 1 IO_PAD23
+bit 343 O 1 IO_PAD23 342 1 Z
+bit 342 C 1 *
+bit 341 I 1 IO_PAD21
+bit 340 O 1 IO_PAD21 339 1 Z
+bit 339 C 1 *
+bit 338 I 1 IO_PAD19
+bit 337 O 1 IO_PAD19 336 1 Z
+bit 336 C 1 *
+bit 335 I 1 IO_PAD17
+bit 334 O 1 IO_PAD17 333 1 Z
+bit 333 C 1 *
+bit 332 I 1 IO_PAD15
+bit 331 O 1 IO_PAD15 330 1 Z
+bit 330 C 1 *
+bit 329 I 1 IO_PAD14
+bit 328 O 1 IO_PAD14 327 1 Z
+bit 327 C 1 *
+bit 326 I 1 IO_PAD13
+bit 325 O 1 IO_PAD13 324 1 Z
+bit 324 C 1 *
+bit 323 I 1 IO_PAD11
+bit 322 O 1 IO_PAD11 321 1 Z
+bit 321 C 1 *
+bit 320 I 1 IO_PAD10
+bit 319 O 1 IO_PAD10 318 1 Z
+bit 318 C 1 *
+bit 317 I 1 IO_PAD9
+bit 316 O 1 IO_PAD9 315 1 Z
+bit 315 C 1 *
+bit 314 I 1 IO_PAD7
+bit 313 O 1 IO_PAD7 312 1 Z
+bit 312 C 1 *
+bit 311 I 1 IO_PAD5
+bit 310 O 1 IO_PAD5 309 1 Z
+bit 309 C 1 *
+bit 308 I 1 IO_PAD4
+bit 307 O 1 IO_PAD4 306 1 Z
+bit 306 C 1 *
+bit 305 I 1 IO_PAD3
+bit 304 O 1 IO_PAD3 303 1 Z
+bit 303 C 1 *
+bit 302 I 1 IO_PAD2
+bit 301 O 1 IO_PAD2 300 1 Z
+bit 300 C 1 *
+bit 299 I 1 IO_PAD1117
+bit 298 O 1 IO_PAD1117 297 1 Z
+bit 297 C 1 *
+bit 296 I 1 IO_PAD1116
+bit 295 O 1 IO_PAD1116 294 1 Z
+bit 294 C 1 *
+bit 293 I 1 IO_PAD1115
+bit 292 O 1 IO_PAD1115 291 1 Z
+bit 291 C 1 *
+bit 290 I 1 IO_PAD1114
+bit 289 O 1 IO_PAD1114 288 1 Z
+bit 288 C 1 *
+bit 287 I 1 IO_PAD1112
+bit 286 O 1 IO_PAD1112 285 1 Z
+bit 285 C 1 *
+bit 284 I 1 IO_PAD1110
+bit 283 O 1 IO_PAD1110 282 1 Z
+bit 282 C 1 *
+bit 281 I 1 IO_PAD1109
+bit 280 O 1 IO_PAD1109 279 1 Z
+bit 279 C 1 *
+bit 278 I 1 IO_PAD1108
+bit 277 O 1 IO_PAD1108 276 1 Z
+bit 276 C 1 *
+bit 275 I 1 IO_PAD1106
+bit 274 O 1 IO_PAD1106 273 1 Z
+bit 273 C 1 *
+bit 272 I 1 IO_PAD1105
+bit 271 O 1 IO_PAD1105 270 1 Z
+bit 270 C 1 *
+bit 269 I 1 IO_PAD1104
+bit 268 O 1 IO_PAD1104 267 1 Z
+bit 267 C 1 *
+bit 266 I 1 IO_PAD1102
+bit 265 O 1 IO_PAD1102 264 1 Z
+bit 264 C 1 *
+bit 263 I 1 IO_PAD1100
+bit 262 O 1 IO_PAD1100 261 1 Z
+bit 261 C 1 *
+bit 260 I 1 IO_PAD1098
+bit 259 O 1 IO_PAD1098 258 1 Z
+bit 258 C 1 *
+bit 257 I 1 IO_PAD1096
+bit 256 O 1 IO_PAD1096 255 1 Z
+bit 255 C 1 *
+bit 254 I 1 IO_PAD1094
+bit 253 O 1 IO_PAD1094 252 1 Z
+bit 252 C 1 *
+bit 251 I 1 IO_PAD1093
+bit 250 O 1 IO_PAD1093 249 1 Z
+bit 249 C 1 *
+bit 248 I 1 IO_PAD1092
+bit 247 O 1 IO_PAD1092 246 1 Z
+bit 246 C 1 *
+bit 245 I 1 IO_PAD1091
+bit 244 O 1 IO_PAD1091 243 1 Z
+bit 243 C 1 *
+bit 242 I 1 IO_PAD1090
+bit 241 O 1 IO_PAD1090 240 1 Z
+bit 240 C 1 *
+bit 239 I 1 IO_PAD1088
+bit 238 O 1 IO_PAD1088 237 1 Z
+bit 237 C 1 *
+bit 236 I 1 IO_PAD1086
+bit 235 O 1 IO_PAD1086 234 1 Z
+bit 234 C 1 *
+bit 233 I 1 IO_PAD1085
+bit 232 O 1 IO_PAD1085 231 1 Z
+bit 231 C 1 *
+bit 230 I 1 IO_PAD1084
+bit 229 O 1 IO_PAD1084 228 1 Z
+bit 228 C 1 *
+bit 227 I 1 IO_PAD1082
+bit 226 O 1 IO_PAD1082 225 1 Z
+bit 225 C 1 *
+bit 224 I 1 IO_PAD1081
+bit 223 O 1 IO_PAD1081 222 1 Z
+bit 222 C 1 *
+bit 221 I 1 IO_PAD1080
+bit 220 O 1 IO_PAD1080 219 1 Z
+bit 219 C 1 *
+bit 218 I 1 IO_PAD1078
+bit 217 O 1 IO_PAD1078 216 1 Z
+bit 216 C 1 *
+bit 215 I 1 IO_PAD1076
+bit 214 O 1 IO_PAD1076 213 1 Z
+bit 213 C 1 *
+bit 212 I 1 IO_PAD1074
+bit 211 O 1 IO_PAD1074 210 1 Z
+bit 210 C 1 *
+bit 209 I 1 IO_PAD1073
+bit 208 O 1 IO_PAD1073 207 1 Z
+bit 207 C 1 *
+bit 206 I 1 IO_PAD1072
+bit 205 O 1 IO_PAD1072 204 1 Z
+bit 204 C 1 *
+bit 203 I 1 IO_PAD1070
+bit 202 O 1 IO_PAD1070 201 1 Z
+bit 201 C 1 *
+bit 200 I 1 IO_PAD1069
+bit 199 O 1 IO_PAD1069 198 1 Z
+bit 198 C 1 *
+bit 197 I 1 IO_PAD1068
+bit 196 O 1 IO_PAD1068 195 1 Z
+bit 195 C 1 *
+bit 194 I 1 IO_PAD1066
+bit 193 O 1 IO_PAD1066 192 1 Z
+bit 192 C 1 *
+bit 191 I 1 IO_PAD1064
+bit 190 O 1 IO_PAD1064 189 1 Z
+bit 189 C 1 *
+bit 188 I 1 IO_PAD1062
+bit 187 O 1 IO_PAD1062 186 1 Z
+bit 186 C 1 *
+bit 185 I 1 IO_PAD1061
+bit 184 O 1 IO_PAD1061 183 1 Z
+bit 183 C 1 *
+bit 182 I 1 IO_PAD1060
+bit 181 O 1 IO_PAD1060 180 1 Z
+bit 180 C 1 *
+bit 179 I 1 IO_PAD1058
+bit 178 O 1 IO_PAD1058 177 1 Z
+bit 177 C 1 *
+bit 176 I 1 IO_PAD1057
+bit 175 O 1 IO_PAD1057 174 1 Z
+bit 174 C 1 *
+bit 173 I 1 IO_PAD1056
+bit 172 O 1 IO_PAD1056 171 1 Z
+bit 171 C 1 *
+bit 170 I 1 IO_PAD1054
+bit 169 O 1 IO_PAD1054 168 1 Z
+bit 168 C 1 *
+bit 167 I 1 IO_PAD1052
+bit 166 O 1 IO_PAD1052 165 1 Z
+bit 165 C 1 *
+bit 164 I 1 IO_PAD1050
+bit 163 O 1 IO_PAD1050 162 1 Z
+bit 162 C 1 *
+bit 161 I 1 IO_PAD1049
+bit 160 O 1 IO_PAD1049 159 1 Z
+bit 159 C 1 *
+bit 158 I 1 IO_PAD1048
+bit 157 O 1 IO_PAD1048 156 1 Z
+bit 156 C 1 *
+bit 155 I 1 IO_PAD1046
+bit 154 O 1 IO_PAD1046 153 1 Z
+bit 153 C 1 *
+bit 152 I 1 IO_PAD1045
+bit 151 O 1 IO_PAD1045 150 1 Z
+bit 150 C 1 *
+bit 149 I 1 IO_PAD1044
+bit 148 O 1 IO_PAD1044 147 1 Z
+bit 147 C 1 *
+bit 146 I 1 IO_PAD1042
+bit 145 O 1 IO_PAD1042 144 1 Z
+bit 144 C 1 *
+bit 143 I 1 IO_PAD1040
+bit 142 O 1 IO_PAD1040 141 1 Z
+bit 141 C 1 *
+bit 140 I 1 IO_PAD1039
+bit 139 O 1 IO_PAD1039 138 1 Z
+bit 138 C 1 *
+bit 137 I 1 IO_PAD1038
+bit 136 O 1 IO_PAD1038 135 1 Z
+bit 135 C 1 *
+bit 134 I 1 IO_PAD1036
+bit 133 O 1 IO_PAD1036 132 1 Z
+bit 132 C 1 *
+bit 131 I 1 IO_PAD1035
+bit 130 O 1 IO_PAD1035 129 1 Z
+bit 129 C 1 *
+bit 128 I 1 IO_PAD1034
+bit 127 O 1 IO_PAD1034 126 1 Z
+bit 126 C 1 *
+bit 125 I 1 IO_PAD1033
+bit 124 O 1 IO_PAD1033 123 1 Z
+bit 123 C 1 *
+bit 122 I 1 IO_PAD1032
+bit 121 O 1 IO_PAD1032 120 1 Z
+bit 120 C 1 *
+bit 119 I 1 IO_PAD1030
+bit 118 O 1 IO_PAD1030 117 1 Z
+bit 117 C 1 *
+bit 116 I 1 IO_PAD1028
+bit 115 O 1 IO_PAD1028 114 1 Z
+bit 114 C 1 *
+bit 113 I 1 IO_PAD1026
+bit 112 O 1 IO_PAD1026 111 1 Z
+bit 111 C 1 *
+bit 110 I 1 IO_PAD1024
+bit 109 O 1 IO_PAD1024 108 1 Z
+bit 108 C 1 *
+bit 107 I 1 IO_PAD1022
+bit 106 O 1 IO_PAD1022 105 1 Z
+bit 105 C 1 *
+bit 104 I 1 IO_PAD1021
+bit 103 O 1 IO_PAD1021 102 1 Z
+bit 102 C 1 *
+bit 101 I 1 IO_PAD1020
+bit 100 O 1 IO_PAD1020 99 1 Z
+bit 99 C 1 *
+bit 98 I 1 IO_PAD1018
+bit 97 O 1 IO_PAD1018 96 1 Z
+bit 96 C 1 *
+bit 95 I 1 IO_PAD1016
+bit 94 O 1 IO_PAD1016 93 1 Z
+bit 93 C 1 *
+bit 92 I 1 IO_PAD1015
+bit 91 O 1 IO_PAD1015 90 1 Z
+bit 90 C 1 *
+bit 89 I 1 IO_PAD1014
+bit 88 O 1 IO_PAD1014 87 1 Z
+bit 87 C 1 *
+bit 86 I 1 IO_PAD1012
+bit 85 O 1 IO_PAD1012 84 1 Z
+bit 84 C 1 *
+bit 83 I 1 IO_PAD1011
+bit 82 O 1 IO_PAD1011 81 1 Z
+bit 81 C 1 *
+bit 80 I 1 IO_PAD1010
+bit 79 O 1 IO_PAD1010 78 1 Z
+bit 78 C 1 *
+bit 77 I 1 IO_PAD1009
+bit 76 O 1 IO_PAD1009 75 1 Z
+bit 75 C 1 *
+bit 74 I 1 IO_PAD1008
+bit 73 O 1 IO_PAD1008 72 1 Z
+bit 72 C 1 *
+bit 71 I 1 IO_PAD1006
+bit 70 O 1 IO_PAD1006 69 1 Z
+bit 69 C 1 *
+bit 68 I 1 IO_PAD1004
+bit 67 O 1 IO_PAD1004 66 1 Z
+bit 66 C 1 *
+bit 65 I 1 IO_PAD1002
+bit 64 O 1 IO_PAD1002 63 1 Z
+bit 63 C 1 *
+bit 62 I 1 IO_PAD1001
+bit 61 O 1 IO_PAD1001 60 1 Z
+bit 60 C 1 *
+bit 59 I 1 IO_PAD1000
+bit 58 O 1 IO_PAD1000 57 1 Z
+bit 57 C 1 *
+bit 56 I 1 IO_PAD998
+bit 55 O 1 IO_PAD998 54 1 Z
+bit 54 C 1 *
+bit 53 I 1 IO_PAD997
+bit 52 O 1 IO_PAD997 51 1 Z
+bit 51 C 1 *
+bit 50 I 1 IO_PAD996
+bit 49 O 1 IO_PAD996 48 1 Z
+bit 48 C 1 *
+bit 47 I 1 IO_PAD994
+bit 46 O 1 IO_PAD994 45 1 Z
+bit 45 C 1 *
+bit 44 I 1 IO_PAD992
+bit 43 O 1 IO_PAD992 42 1 Z
+bit 42 C 1 *
+bit 41 I 1 IO_PAD990
+bit 40 O 1 IO_PAD990 39 1 Z
+bit 39 C 1 *
+bit 38 I 1 IO_PAD988
+bit 37 O 1 IO_PAD988 36 1 Z
+bit 36 C 1 *
+bit 35 I 1 IO_PAD987
+bit 34 O 1 IO_PAD987 33 1 Z
+bit 33 C 1 *
+bit 32 I 1 IO_PAD986
+bit 31 O 1 IO_PAD986 30 1 Z
+bit 30 C 1 *
+bit 29 I 1 IO_PAD985
+bit 28 O 1 IO_PAD985 27 1 Z
+bit 27 C 1 *
+bit 26 I 1 IO_PAD984
+bit 25 O 1 IO_PAD984 24 1 Z
+bit 24 C 1 *
+bit 23 I 1 IO_PAD982
+bit 22 O 1 IO_PAD982 21 1 Z
+bit 21 C 1 *
+bit 20 I 1 IO_PAD980
+bit 19 O 1 IO_PAD980 18 1 Z
+bit 18 C 1 *
+bit 17 I 1 IO_PAD979
+bit 16 O 1 IO_PAD979 15 1 Z
+bit 15 C 1 *
+bit 14 I 1 IO_PAD978
+bit 13 O 1 IO_PAD978 12 1 Z
+bit 12 C 1 *
+bit 11 I 1 IO_PAD977
+bit 10 O 1 IO_PAD977 9 1 Z
+bit 9 C 1 *
+bit 8 I 1 IO_PAD976
+bit 7 O 1 IO_PAD976 6 1 Z
+bit 6 C 1 *
+bit 5 I 1 IO_PAD974
+bit 4 O 1 IO_PAD974 3 1 Z
+bit 3 C 1 *
+bit 2 I 1 IO_PAD973
+bit 1 O 1 IO_PAD973 0 1 Z
+bit 0 C 1 *
--- /dev/null
+signal GND1
+signal GND2
+signal GND3
+signal GND4
+signal GND5
+signal GND6
+signal GND7
+signal GND8
+signal GND9
+signal GND10
+signal GND11
+signal GND12
+signal GND13
+signal GND14
+signal GND15
+signal GND16
+signal GND17
+signal GND18
+signal GND19
+signal GND20
+signal GND21
+signal GND22
+signal GND23
+signal GND24
+signal GND25
+signal GND26
+signal GND27
+signal GND28
+signal GND29
+signal GND30
+signal GND31
+signal GND32
+signal GND33
+signal GND34
+signal GND35
+signal GND36
+signal GND37
+signal GND38
+signal GND39
+signal GND40
+signal GND41
+signal GND42
+signal GND43
+signal GND44
+signal GND45
+signal GND46
+signal GND47
+signal GND48
+signal GND49
+signal GND50
+signal GND51
+signal GND52
+signal GND53
+signal GND54
+signal GND55
+signal GND56
+signal GND57
+signal GND58
+signal GND59
+signal GND60
+signal GND61
+signal GND62
+signal GND63
+signal GND64
+signal GND65
+signal GND66
+signal GND67
+signal GND68
+signal GND69
+signal GND70
+signal GND71
+signal GND72
+signal GND73
+signal GND74
+signal GND75
+signal GND76
+signal GND77
+signal GND78
+signal GND79
+signal GND80
+signal GND81
+signal GND82
+signal GND83
+signal GND84
+signal GND85
+signal GND86
+signal GND87
+signal GND88
+signal GND89
+signal GND90
+signal GND91
+signal GND92
+signal GND93
+signal GND94
+signal GND95
+signal GND96
+signal GND97
+signal GND98
+signal GND99
+signal GND100
+signal GND101
+signal GND102
+signal GND103
+signal GND104
+signal GND105
+signal GND106
+signal GND107
+signal GND108
+signal GND109
+signal GND110
+signal GND111
+signal GND112
+signal GND113
+signal GND114
+signal GND115
+signal GND116
+signal GND117
+signal GND118
+signal GND119
+signal GND120
+signal GND121
+signal GND122
+signal GND123
+signal GND124
+signal GND125
+signal GND126
+signal GND127
+signal GND128
+signal GND129
+signal GND130
+signal GND131
+signal GND132
+signal GND133
+signal GND134
+signal GND135
+signal GND136
+signal GND137
+signal GND138
+signal GND139
+signal GND140
+signal GND141
+signal GND142
+signal GND143
+signal GND144
+signal GND145
+signal GND146
+signal GND147
+signal GND148
+signal GND149
+signal GND150
+signal GND151
+signal GND152
+signal GND153
+signal GND154
+signal GND155
+signal GND156
+signal GND157
+signal GND158
+signal GND159
+signal GND160
+signal GND161
+signal GND162
+signal GND163
+signal GND164
+signal GND165
+signal GND166
+signal GND167
+signal GND168
+signal GND169
+signal GND170
+signal GND171
+signal GND172
+signal GND173
+signal GND174
+signal GND175
+signal GND176
+signal GND177
+signal GND178
+signal GND179
+signal GND180
+signal GND181
+signal GND182
+signal GND183
+signal GND184
+signal CCLK_AL31
+signal DONE_AD24
+signal HSWAP_EN_L11
+signal M0_AL4
+signal M1_AK4
+signal M2_AG8
+signal PROG_B
+signal TCK
+signal TDI
+signal TDO
+signal TMS
+signal VCCAUX1
+signal VCCAUX2
+signal VCCAUX3
+signal VCCAUX4
+signal VCCAUX5
+signal VCCAUX6
+signal VCCAUX7
+signal VCCAUX8
+signal VCCAUX9
+signal VCCAUX10
+signal VCCAUX11
+signal VCCAUX12
+signal VCCAUX13
+signal VCCAUX14
+signal VCCAUX15
+signal VCCAUX16
+signal VCCAUX17
+signal VCCAUX18
+signal VCCAUX19
+signal VCCAUX20
+signal VCCAUX21
+signal VCCAUX22
+signal VCCAUX23
+signal VCCAUX24
+signal VCCAUX25
+signal VCCAUX26
+signal VCCAUX27
+signal VCCAUX28
+signal VCCAUX29
+signal VCCAUX30
+signal VCCAUX31
+signal VCCAUX32
+signal VCCINT1
+signal VCCINT2
+signal VCCINT3
+signal VCCINT4
+signal VCCINT5
+signal VCCINT6
+signal VCCINT7
+signal VCCINT8
+signal VCCINT9
+signal VCCINT10
+signal VCCINT11
+signal VCCINT12
+signal VCCINT13
+signal VCCINT14
+signal VCCINT15
+signal VCCINT16
+signal VCCINT17
+signal VCCINT18
+signal VCCINT19
+signal VCCINT20
+signal VCCINT21
+signal VCCINT22
+signal VCCINT23
+signal VCCINT24
+signal VCCINT25
+signal VCCINT26
+signal VCCINT27
+signal VCCINT28
+signal VCCINT29
+signal VCCINT30
+signal VCCINT31
+signal VCCINT32
+signal VCCINT33
+signal VCCINT34
+signal VCCINT35
+signal VCCINT36
+signal VCCINT37
+signal VCCINT38
+signal VCCINT39
+signal VCCINT40
+signal VCCO01
+signal VCCO02
+signal VCCO03
+signal VCCO04
+signal VCCO05
+signal VCCO06
+signal VCCO07
+signal VCCO08
+signal VCCO09
+signal VCCO010
+signal VCCO011
+signal VCCO012
+signal VCCO013
+signal VCCO11
+signal VCCO12
+signal VCCO13
+signal VCCO14
+signal VCCO15
+signal VCCO16
+signal VCCO17
+signal VCCO18
+signal VCCO19
+signal VCCO110
+signal VCCO111
+signal VCCO112
+signal VCCO113
+signal VCCO21
+signal VCCO22
+signal VCCO23
+signal VCCO24
+signal VCCO25
+signal VCCO26
+signal VCCO27
+signal VCCO28
+signal VCCO29
+signal VCCO210
+signal VCCO211
+signal VCCO212
+signal VCCO213
+signal VCCO31
+signal VCCO32
+signal VCCO33
+signal VCCO34
+signal VCCO35
+signal VCCO36
+signal VCCO37
+signal VCCO38
+signal VCCO39
+signal VCCO310
+signal VCCO311
+signal VCCO312
+signal VCCO313
+signal VCCO41
+signal VCCO42
+signal VCCO43
+signal VCCO44
+signal VCCO45
+signal VCCO46
+signal VCCO47
+signal VCCO48
+signal VCCO49
+signal VCCO410
+signal VCCO411
+signal VCCO412
+signal VCCO413
+signal VCCO51
+signal VCCO52
+signal VCCO53
+signal VCCO54
+signal VCCO55
+signal VCCO56
+signal VCCO57
+signal VCCO58
+signal VCCO59
+signal VCCO510
+signal VCCO511
+signal VCCO512
+signal VCCO513
+signal VCCO61
+signal VCCO62
+signal VCCO63
+signal VCCO64
+signal VCCO65
+signal VCCO66
+signal VCCO67
+signal VCCO68
+signal VCCO69
+signal VCCO610
+signal VCCO611
+signal VCCO612
+signal VCCO613
+signal VCCO71
+signal VCCO72
+signal VCCO73
+signal VCCO74
+signal VCCO75
+signal VCCO76
+signal VCCO77
+signal VCCO78
+signal VCCO79
+signal VCCO710
+signal VCCO711
+signal VCCO712
+signal VCCO713
+signal IO_A3
+signal IO_A4
+signal IO_A6
+signal IO_A7
+signal IO_A8
+signal IO_A10
+signal IO_A11
+signal IO_A12
+signal IO_A14
+signal IO_A15
+signal IO_A17
+signal IO_A18
+signal IO_A20
+signal IO_A21
+signal IO_A23
+signal IO_A24
+signal IO_A25
+signal IO_A27
+signal IO_A28
+signal IO_A29
+signal IO_A31
+signal IO_A32
+signal IO_B3
+signal IO_B4
+signal IO_B5
+signal IO_B6
+signal IO_B7
+signal IO_B8
+signal IO_B9
+signal IO_B10
+signal IO_B11
+signal IO_B12
+signal IO_B14
+signal IO_B15
+signal IO_B16
+signal IO_B17
+signal IO_B18
+signal IO_B19
+signal IO_B20
+signal IO_B21
+signal IO_B23
+signal IO_B24
+signal IO_B25
+signal IO_B26
+signal IO_B27
+signal IO_B28
+signal IO_B29
+signal IO_B30
+signal IO_B31
+signal IO_B32
+signal IO_C1
+signal IO_C2
+signal IO_C5
+signal IO_C6
+signal IO_C7
+signal IO_C9
+signal IO_C10
+signal IO_C12
+signal IO_C13
+signal IO_C14
+signal IO_C15
+signal IO_C16
+signal IO_C17
+signal IO_C18
+signal IO_C19
+signal IO_C20
+signal IO_C21
+signal IO_C22
+signal IO_C23
+signal IO_C25
+signal IO_C26
+signal IO_C28
+signal IO_C29
+signal IO_C30
+signal IO_C33
+signal IO_C34
+signal IO_D1
+signal IO_D2
+signal IO_D5
+signal IO_D6
+signal IO_D7
+signal IO_D8
+signal IO_D9
+signal IO_D10
+signal IO_D12
+signal IO_D13
+signal IO_D14
+signal IO_D15
+signal IO_D17
+signal IO_D18
+signal IO_D20
+signal IO_D21
+signal IO_D22
+signal IO_D23
+signal IO_D25
+signal IO_D26
+signal IO_D27
+signal IO_D28
+signal IO_D29
+signal IO_D30
+signal IO_D33
+signal IO_D34
+signal IO_E2
+signal IO_E3
+signal IO_E7
+signal IO_E8
+signal IO_E10
+signal IO_E12
+signal IO_E14
+signal IO_E17
+signal IO_E18
+signal IO_E21
+signal IO_E23
+signal IO_E25
+signal IO_E27
+signal IO_E28
+signal IO_E32
+signal IO_E33
+signal IO_F1
+signal IO_F2
+signal IO_F3
+signal IO_F4
+signal IO_F6
+signal IO_F7
+signal IO_F8
+signal IO_F9
+signal IO_F10
+signal IO_F11
+signal IO_F12
+signal IO_F14
+signal IO_F15
+signal IO_F16
+signal IO_F17
+signal IO_F18
+signal IO_F19
+signal IO_F20
+signal IO_F21
+signal IO_F23
+signal IO_F24
+signal IO_F25
+signal IO_F26
+signal IO_F27
+signal IO_F28
+signal IO_F29
+signal IO_F31
+signal IO_F32
+signal IO_F33
+signal IO_F34
+signal IO_G1
+signal IO_G2
+signal IO_G3
+signal IO_G4
+signal IO_G5
+signal IO_G6
+signal IO_G9
+signal IO_G10
+signal IO_G11
+signal IO_G12
+signal IO_G13
+signal IO_G14
+signal IO_G15
+signal IO_G16
+signal IO_G17
+signal IO_G18
+signal IO_G19
+signal IO_G20
+signal IO_G21
+signal IO_G22
+signal IO_G23
+signal IO_G24
+signal IO_G25
+signal IO_G26
+signal IO_G29
+signal IO_G30
+signal IO_G31
+signal IO_G32
+signal IO_G33
+signal IO_G34
+signal IO_H1
+signal IO_H2
+signal IO_H4
+signal IO_H5
+signal IO_H6
+signal IO_H8
+signal IO_H9
+signal IO_H10
+signal IO_H12
+signal IO_H13
+signal IO_H14
+signal IO_H17
+signal IO_H18
+signal IO_H21
+signal IO_H22
+signal IO_H23
+signal IO_H25
+signal IO_H26
+signal IO_H29
+signal IO_H30
+signal IO_H31
+signal IO_H33
+signal IO_H34
+signal IO_J2
+signal IO_J3
+signal IO_J4
+signal IO_J6
+signal IO_J7
+signal IO_J8
+signal IO_J9
+signal IO_J10
+signal IO_J11
+signal IO_J12
+signal IO_J14
+signal IO_J15
+signal IO_J17
+signal IO_J18
+signal IO_J20
+signal IO_J21
+signal IO_J23
+signal IO_J24
+signal IO_J25
+signal IO_J26
+signal IO_J27
+signal IO_J28
+signal IO_J29
+signal IO_J31
+signal IO_J32
+signal IO_J33
+signal IO_K1
+signal IO_K2
+signal IO_K3
+signal IO_K4
+signal IO_K5
+signal IO_K6
+signal IO_K7
+signal IO_K8
+signal IO_K9
+signal IO_K11
+signal IO_K12
+signal IO_K13
+signal IO_K14
+signal IO_K15
+signal IO_K16
+signal IO_K17
+signal IO_K18
+signal IO_K19
+signal IO_K20
+signal IO_K21
+signal IO_K22
+signal IO_K23
+signal IO_K24
+signal IO_K26
+signal IO_K27
+signal IO_K28
+signal IO_K29
+signal IO_K30
+signal IO_K31
+signal IO_K32
+signal IO_K33
+signal IO_K34
+signal IO_L1
+signal IO_L2
+signal IO_L6
+signal IO_L7
+signal IO_L9
+signal IO_L10
+signal IO_L12
+signal IO_L13
+signal IO_L14
+signal IO_L15
+signal IO_L16
+signal IO_L17
+signal IO_L18
+signal IO_L19
+signal IO_L20
+signal IO_L21
+signal IO_L22
+signal IO_L23
+signal IO_L24
+signal IO_L25
+signal IO_L26
+signal IO_L28
+signal IO_L29
+signal IO_L33
+signal IO_L34
+signal IO_M1
+signal IO_M2
+signal IO_M3
+signal IO_M4
+signal IO_M5
+signal IO_M6
+signal IO_M7
+signal IO_M8
+signal IO_M9
+signal IO_M10
+signal IO_M11
+signal IO_M24
+signal IO_M25
+signal IO_M26
+signal IO_M27
+signal IO_M28
+signal IO_M29
+signal IO_M30
+signal IO_M31
+signal IO_M32
+signal IO_M33
+signal IO_M34
+signal IO_N3
+signal IO_N4
+signal IO_N7
+signal IO_N8
+signal IO_N10
+signal IO_N11
+signal IO_N24
+signal IO_N25
+signal IO_N27
+signal IO_N28
+signal IO_N31
+signal IO_N32
+signal IO_P1
+signal IO_P2
+signal IO_P3
+signal IO_P4
+signal IO_P5
+signal IO_P6
+signal IO_P7
+signal IO_P8
+signal IO_P9
+signal IO_P10
+signal IO_P11
+signal IO_P24
+signal IO_P25
+signal IO_P26
+signal IO_P27
+signal IO_P28
+signal IO_P29
+signal IO_P30
+signal IO_P31
+signal IO_P32
+signal IO_P33
+signal IO_P34
+signal IO_R1
+signal IO_R2
+signal IO_R3
+signal IO_R4
+signal IO_R6
+signal IO_R7
+signal IO_R9
+signal IO_R10
+signal IO_R11
+signal IO_R24
+signal IO_R25
+signal IO_R26
+signal IO_R28
+signal IO_R29
+signal IO_R31
+signal IO_R32
+signal IO_R33
+signal IO_R34
+signal IO_T2
+signal IO_T3
+signal IO_T6
+signal IO_T7
+signal IO_T10
+signal IO_T11
+signal IO_T24
+signal IO_T25
+signal IO_T28
+signal IO_T29
+signal IO_T32
+signal IO_T33
+signal IO_U1
+signal IO_U2
+signal IO_U3
+signal IO_U4
+signal IO_U5
+signal IO_U6
+signal IO_U7
+signal IO_U8
+signal IO_U9
+signal IO_U10
+signal IO_U11
+signal IO_U24
+signal IO_U25
+signal IO_U26
+signal IO_U27
+signal IO_U28
+signal IO_U29
+signal IO_U30
+signal IO_U31
+signal IO_U32
+signal IO_U33
+signal IO_U34
+signal IO_V1
+signal IO_V2
+signal IO_V3
+signal IO_V4
+signal IO_V5
+signal IO_V6
+signal IO_V7
+signal IO_V8
+signal IO_V9
+signal IO_V10
+signal IO_V11
+signal IO_V24
+signal IO_V25
+signal IO_V26
+signal IO_V27
+signal IO_V28
+signal IO_V29
+signal IO_V30
+signal IO_V31
+signal IO_V32
+signal IO_V33
+signal IO_V34
+signal IO_W2
+signal IO_W3
+signal IO_W6
+signal IO_W7
+signal IO_W10
+signal IO_W11
+signal IO_W24
+signal IO_W25
+signal IO_W28
+signal IO_W29
+signal IO_W32
+signal IO_W33
+signal IO_Y1
+signal IO_Y2
+signal IO_Y3
+signal IO_Y4
+signal IO_Y6
+signal IO_Y7
+signal IO_Y9
+signal IO_Y10
+signal IO_Y11
+signal IO_Y24
+signal IO_Y25
+signal IO_Y26
+signal IO_Y28
+signal IO_Y29
+signal IO_Y31
+signal IO_Y32
+signal IO_Y33
+signal IO_Y34
+signal IO_AA1
+signal IO_AA2
+signal IO_AA3
+signal IO_AA4
+signal IO_AA5
+signal IO_AA6
+signal IO_AA7
+signal IO_AA8
+signal IO_AA9
+signal IO_AA10
+signal IO_AA11
+signal IO_AA24
+signal IO_AA25
+signal IO_AA26
+signal IO_AA27
+signal IO_AA28
+signal IO_AA29
+signal IO_AA30
+signal IO_AA31
+signal IO_AA32
+signal IO_AA33
+signal IO_AA34
+signal IO_AB3
+signal IO_AB4
+signal IO_AB7
+signal IO_AB8
+signal IO_AB10
+signal IO_AB11
+signal IO_AB24
+signal IO_AB25
+signal IO_AB27
+signal IO_AB28
+signal IO_AB31
+signal IO_AB32
+signal IO_AC1
+signal IO_AC2
+signal IO_AC3
+signal IO_AC4
+signal IO_AC5
+signal IO_AC6
+signal IO_AC7
+signal IO_AC8
+signal IO_AC9
+signal IO_AC10
+signal IO_AC11
+signal IO_AC24
+signal IO_AC25
+signal IO_AC26
+signal IO_AC27
+signal IO_AC28
+signal IO_AC29
+signal IO_AC30
+signal IO_AC31
+signal IO_AC32
+signal IO_AC33
+signal IO_AC34
+signal IO_AD1
+signal IO_AD2
+signal IO_AD6
+signal IO_AD7
+signal IO_AD9
+signal IO_AD10
+signal IO_AD11
+signal IO_AD12
+signal IO_AD13
+signal IO_AD14
+signal IO_AD15
+signal IO_AD16
+signal IO_AD17
+signal IO_AD18
+signal IO_AD19
+signal IO_AD20
+signal IO_AD21
+signal IO_AD22
+signal IO_AD23
+signal IO_AD25
+signal IO_AD26
+signal IO_AD28
+signal IO_AD29
+signal IO_AD33
+signal IO_AD34
+signal IO_AE1
+signal IO_AE2
+signal IO_AE3
+signal IO_AE4
+signal IO_AE5
+signal IO_AE6
+signal IO_AE7
+signal IO_AE8
+signal IO_AE9
+signal IO_AE11
+signal IO_AE12
+signal IO_AE13
+signal IO_AE14
+signal IO_AE15
+signal IO_AE16
+signal IO_AE17
+signal IO_AE18
+signal IO_AE19
+signal IO_AE20
+signal IO_AE21
+signal IO_AE22
+signal IO_AE23
+signal IO_AE24
+signal IO_AE26
+signal IO_AE27
+signal IO_AE28
+signal IO_AE29
+signal IO_AE30
+signal IO_AE31
+signal IO_AE32
+signal IO_AE33
+signal IO_AE34
+signal IO_AF2
+signal IO_AF3
+signal IO_AF4
+signal IO_AF6
+signal IO_AF7
+signal IO_AF8
+signal IO_AF9
+signal IO_AF10
+signal IO_AF11
+signal IO_AF12
+signal IO_AF14
+signal IO_AF15
+signal IO_AF17
+signal IO_AF18
+signal IO_AF20
+signal IO_AF21
+signal IO_AF23
+signal IO_AF24
+signal IO_AF25
+signal IO_AF26
+signal IO_AF27
+signal IO_AF28
+signal IO_AF29
+signal IO_AF31
+signal IO_AF32
+signal IO_AF33
+signal IO_AG1
+signal IO_AG2
+signal IO_AG4
+signal IO_AG5
+signal IO_AG6
+signal IO_AG9
+signal IO_AG10
+signal IO_AG12
+signal IO_AG13
+signal IO_AG14
+signal IO_AG17
+signal IO_AG18
+signal IO_AG21
+signal IO_AG22
+signal IO_AG23
+signal IO_AG25
+signal IO_AG26
+signal IO_AG27
+signal IO_AG29
+signal IO_AG30
+signal IO_AG31
+signal IO_AG33
+signal IO_AG34
+signal IO_AH1
+signal IO_AH2
+signal IO_AH3
+signal IO_AH4
+signal IO_AH5
+signal IO_AH6
+signal IO_AH9
+signal IO_AH10
+signal IO_AH11
+signal IO_AH12
+signal IO_AH13
+signal IO_AH14
+signal IO_AH15
+signal IO_AH16
+signal IO_AH17
+signal IO_AH18
+signal IO_AH19
+signal IO_AH20
+signal IO_AH21
+signal IO_AH22
+signal IO_AH23
+signal IO_AH24
+signal IO_AH25
+signal IO_AH26
+signal IO_AH29
+signal IO_AH30
+signal IO_AH31
+signal IO_AH32
+signal IO_AH33
+signal IO_AH34
+signal IO_AJ1
+signal IO_AJ2
+signal IO_AJ3
+signal IO_AJ4
+signal IO_AJ6
+signal IO_AJ7
+signal IO_AJ8
+signal IO_AJ9
+signal IO_AJ10
+signal IO_AJ11
+signal IO_AJ12
+signal IO_AJ14
+signal IO_AJ15
+signal IO_AJ16
+signal IO_AJ17
+signal IO_AJ18
+signal IO_AJ19
+signal IO_AJ20
+signal IO_AJ21
+signal IO_AJ23
+signal IO_AJ24
+signal IO_AJ25
+signal IO_AJ26
+signal IO_AJ27
+signal IO_AJ28
+signal IO_AJ29
+signal IO_AJ31
+signal IO_AJ32
+signal IO_AJ33
+signal IO_AJ34
+signal IO_AK2
+signal IO_AK3
+signal IO_AK7
+signal IO_AK8
+signal IO_AK10
+signal IO_AK12
+signal IO_AK14
+signal IO_AK17
+signal IO_AK18
+signal IO_AK21
+signal IO_AK23
+signal IO_AK25
+signal IO_AK27
+signal IO_AK28
+signal IO_AK32
+signal IO_AK33
+signal IO_AL1
+signal IO_AL2
+signal IO_AL5
+signal IO_AL6
+signal IO_AL7
+signal IO_AL8
+signal IO_AL9
+signal IO_AL10
+signal IO_AL12
+signal IO_AL13
+signal IO_AL14
+signal IO_AL15
+signal IO_AL17
+signal IO_AL18
+signal IO_AL20
+signal IO_AL21
+signal IO_AL22
+signal IO_AL23
+signal IO_AL25
+signal IO_AL26
+signal IO_AL27
+signal IO_AL28
+signal IO_AL29
+signal IO_AL30
+signal IO_AL33
+signal IO_AL34
+signal IO_AM1
+signal IO_AM2
+signal IO_AM5
+signal IO_AM6
+signal IO_AM7
+signal IO_AM9
+signal IO_AM10
+signal IO_AM12
+signal IO_AM13
+signal IO_AM14
+signal IO_AM15
+signal IO_AM16
+signal IO_AM17
+signal IO_AM18
+signal IO_AM19
+signal IO_AM20
+signal IO_AM21
+signal IO_AM22
+signal IO_AM23
+signal IO_AM25
+signal IO_AM26
+signal IO_AM28
+signal IO_AM29
+signal IO_AM30
+signal IO_AM33
+signal IO_AM34
+signal IO_AN3
+signal IO_AN4
+signal IO_AN5
+signal IO_AN6
+signal IO_AN7
+signal IO_AN8
+signal IO_AN9
+signal IO_AN10
+signal IO_AN11
+signal IO_AN12
+signal IO_AN14
+signal IO_AN15
+signal IO_AN16
+signal IO_AN17
+signal IO_AN18
+signal IO_AN19
+signal IO_AN20
+signal IO_AN21
+signal IO_AN23
+signal IO_AN24
+signal IO_AN25
+signal IO_AN26
+signal IO_AN27
+signal IO_AN28
+signal IO_AN29
+signal IO_AN30
+signal IO_AN31
+signal IO_AN32
+signal IO_AP3
+signal IO_AP4
+signal IO_AP6
+signal IO_AP7
+signal IO_AP8
+signal IO_AP10
+signal IO_AP11
+signal IO_AP12
+signal IO_AP14
+signal IO_AP15
+signal IO_AP17
+signal IO_AP18
+signal IO_AP20
+signal IO_AP21
+signal IO_AP23
+signal IO_AP24
+signal IO_AP25
+signal IO_AP27
+signal IO_AP28
+signal IO_AP29
+signal IO_AP31
+
+register BSR 2459
+register BR 1
+register DIR 32
+
+instruction length 6
+
+instruction EXTEST 000000 BSR
+instruction SAMPLE/PRELOAD 000001 BSR
+instruction IDCODE 001001 DIR
+instruction BYPASS 111111 BR
+
+bit 2458 I 1 IO_C33
+bit 2457 O 1 IO_C33 2456 1 Z
+bit 2456 C 1 *
+bit 2455 I 1 IO_C34
+bit 2454 O 1 IO_C34 2453 1 Z
+bit 2453 C 1 *
+bit 2452 I 1 IO_D33
+bit 2451 O 1 IO_D33 2450 1 Z
+bit 2450 C 1 *
+bit 2449 I 1 IO_D34
+bit 2448 O 1 IO_D34 2447 1 Z
+bit 2447 C 1 *
+bit 2446 I 1 IO_E32
+bit 2445 O 1 IO_E32 2444 1 Z
+bit 2444 C 1 *
+bit 2443 I 1 IO_E33
+bit 2442 O 1 IO_E33 2441 1 Z
+bit 2441 C 1 *
+bit 2440 I 1 IO_F31
+bit 2439 O 1 IO_F31 2438 1 Z
+bit 2438 C 1 *
+bit 2437 I 1 IO_F32
+bit 2436 O 1 IO_F32 2435 1 Z
+bit 2435 C 1 *
+bit 2434 I 1 IO_F33
+bit 2433 O 1 IO_F33 2432 1 Z
+bit 2432 C 1 *
+bit 2431 I 1 IO_F34
+bit 2430 O 1 IO_F34 2429 1 Z
+bit 2429 C 1 *
+bit 2428 I 1 IO_G29
+bit 2427 O 1 IO_G29 2426 1 Z
+bit 2426 C 1 *
+bit 2425 I 1 IO_G30
+bit 2424 O 1 IO_G30 2423 1 Z
+bit 2423 C 1 *
+bit 2422 I 1 IO_G31
+bit 2421 O 1 IO_G31 2420 1 Z
+bit 2420 C 1 *
+bit 2419 I 1 IO_G32
+bit 2418 O 1 IO_G32 2417 1 Z
+bit 2417 C 1 *
+bit 2416 I 1 IO_G33
+bit 2415 O 1 IO_G33 2414 1 Z
+bit 2414 C 1 *
+bit 2413 O 1 *
+bit 2412 O 1 *
+bit 2411 O 1 *
+bit 2410 O 1 *
+bit 2409 O 1 *
+bit 2408 O 1 *
+bit 2407 I 1 IO_G34
+bit 2406 O 1 IO_G34 2405 1 Z
+bit 2405 C 1 *
+bit 2404 I 1 IO_H29
+bit 2403 O 1 IO_H29 2402 1 Z
+bit 2402 C 1 *
+bit 2401 I 1 IO_H30
+bit 2400 O 1 IO_H30 2399 1 Z
+bit 2399 C 1 *
+bit 2398 I 1 IO_H33
+bit 2397 O 1 IO_H33 2396 1 Z
+bit 2396 C 1 *
+bit 2395 I 1 IO_H34
+bit 2394 O 1 IO_H34 2393 1 Z
+bit 2393 C 1 *
+bit 2392 I 1 IO_J28
+bit 2391 O 1 IO_J28 2390 1 Z
+bit 2390 C 1 *
+bit 2389 I 1 IO_J29
+bit 2388 O 1 IO_J29 2387 1 Z
+bit 2387 C 1 *
+bit 2386 I 1 IO_H31
+bit 2385 O 1 IO_H31 2384 1 Z
+bit 2384 C 1 *
+bit 2383 I 1 IO_J31
+bit 2382 O 1 IO_J31 2381 1 Z
+bit 2381 C 1 *
+bit 2380 I 1 IO_J32
+bit 2379 O 1 IO_J32 2378 1 Z
+bit 2378 C 1 *
+bit 2377 I 1 IO_J33
+bit 2376 O 1 IO_J33 2375 1 Z
+bit 2375 C 1 *
+bit 2374 I 1 IO_J27
+bit 2373 O 1 IO_J27 2372 1 Z
+bit 2372 C 1 *
+bit 2371 I 1 IO_K26
+bit 2370 O 1 IO_K26 2369 1 Z
+bit 2369 C 1 *
+bit 2368 I 1 IO_K27
+bit 2367 O 1 IO_K27 2366 1 Z
+bit 2366 C 1 *
+bit 2365 I 1 IO_K28
+bit 2364 O 1 IO_K28 2363 1 Z
+bit 2363 C 1 *
+bit 2362 I 1 IO_K29
+bit 2361 O 1 IO_K29 2360 1 Z
+bit 2360 C 1 *
+bit 2359 I 1 IO_K30
+bit 2358 O 1 IO_K30 2357 1 Z
+bit 2357 C 1 *
+bit 2356 I 1 IO_K31
+bit 2355 O 1 IO_K31 2354 1 Z
+bit 2354 C 1 *
+bit 2353 I 1 IO_K32
+bit 2352 O 1 IO_K32 2351 1 Z
+bit 2351 C 1 *
+bit 2350 I 1 IO_K33
+bit 2349 O 1 IO_K33 2348 1 Z
+bit 2348 C 1 *
+bit 2347 I 1 IO_K34
+bit 2346 O 1 IO_K34 2345 1 Z
+bit 2345 C 1 *
+bit 2344 I 1 IO_L25
+bit 2343 O 1 IO_L25 2342 1 Z
+bit 2342 C 1 *
+bit 2341 I 1 IO_L26
+bit 2340 O 1 IO_L26 2339 1 Z
+bit 2339 C 1 *
+bit 2338 I 1 IO_L28
+bit 2337 O 1 IO_L28 2336 1 Z
+bit 2336 C 1 *
+bit 2335 I 1 IO_L29
+bit 2334 O 1 IO_L29 2333 1 Z
+bit 2333 C 1 *
+bit 2332 O 1 *
+bit 2331 O 1 *
+bit 2330 O 1 *
+bit 2329 O 1 *
+bit 2328 O 1 *
+bit 2327 O 1 *
+bit 2326 I 1 IO_L33
+bit 2325 O 1 IO_L33 2324 1 Z
+bit 2324 C 1 *
+bit 2323 I 1 IO_L34
+bit 2322 O 1 IO_L34 2321 1 Z
+bit 2321 C 1 *
+bit 2320 I 1 IO_M24
+bit 2319 O 1 IO_M24 2318 1 Z
+bit 2318 C 1 *
+bit 2317 I 1 IO_M25
+bit 2316 O 1 IO_M25 2315 1 Z
+bit 2315 C 1 *
+bit 2314 I 1 IO_M27
+bit 2313 O 1 IO_M27 2312 1 Z
+bit 2312 C 1 *
+bit 2311 I 1 IO_M28
+bit 2310 O 1 IO_M28 2309 1 Z
+bit 2309 C 1 *
+bit 2308 I 1 IO_M29
+bit 2307 O 1 IO_M29 2306 1 Z
+bit 2306 C 1 *
+bit 2305 I 1 IO_M30
+bit 2304 O 1 IO_M30 2303 1 Z
+bit 2303 C 1 *
+bit 2302 I 1 IO_M31
+bit 2301 O 1 IO_M31 2300 1 Z
+bit 2300 C 1 *
+bit 2299 I 1 IO_M32
+bit 2298 O 1 IO_M32 2297 1 Z
+bit 2297 C 1 *
+bit 2296 I 1 IO_M33
+bit 2295 O 1 IO_M33 2294 1 Z
+bit 2294 C 1 *
+bit 2293 I 1 IO_M34
+bit 2292 O 1 IO_M34 2291 1 Z
+bit 2291 C 1 *
+bit 2290 I 1 IO_M26
+bit 2289 O 1 IO_M26 2288 1 Z
+bit 2288 C 1 *
+bit 2287 I 1 IO_N25
+bit 2286 O 1 IO_N25 2285 1 Z
+bit 2285 C 1 *
+bit 2284 I 1 IO_N27
+bit 2283 O 1 IO_N27 2282 1 Z
+bit 2282 C 1 *
+bit 2281 I 1 IO_N28
+bit 2280 O 1 IO_N28 2279 1 Z
+bit 2279 C 1 *
+bit 2278 I 1 IO_N31
+bit 2277 O 1 IO_N31 2276 1 Z
+bit 2276 C 1 *
+bit 2275 I 1 IO_N32
+bit 2274 O 1 IO_N32 2273 1 Z
+bit 2273 C 1 *
+bit 2272 I 1 IO_N24
+bit 2271 O 1 IO_N24 2270 1 Z
+bit 2270 C 1 *
+bit 2269 I 1 IO_P24
+bit 2268 O 1 IO_P24 2267 1 Z
+bit 2267 C 1 *
+bit 2266 I 1 IO_P25
+bit 2265 O 1 IO_P25 2264 1 Z
+bit 2264 C 1 *
+bit 2263 I 1 IO_P26
+bit 2262 O 1 IO_P26 2261 1 Z
+bit 2261 C 1 *
+bit 2260 O 1 *
+bit 2259 O 1 *
+bit 2258 O 1 *
+bit 2257 O 1 *
+bit 2256 O 1 *
+bit 2255 O 1 *
+bit 2254 I 1 IO_P27
+bit 2253 O 1 IO_P27 2252 1 Z
+bit 2252 C 1 *
+bit 2251 I 1 IO_P28
+bit 2250 O 1 IO_P28 2249 1 Z
+bit 2249 C 1 *
+bit 2248 I 1 IO_P29
+bit 2247 O 1 IO_P29 2246 1 Z
+bit 2246 C 1 *
+bit 2245 I 1 IO_P30
+bit 2244 O 1 IO_P30 2243 1 Z
+bit 2243 C 1 *
+bit 2242 I 1 IO_P31
+bit 2241 O 1 IO_P31 2240 1 Z
+bit 2240 C 1 *
+bit 2239 I 1 IO_P32
+bit 2238 O 1 IO_P32 2237 1 Z
+bit 2237 C 1 *
+bit 2236 I 1 IO_P33
+bit 2235 O 1 IO_P33 2234 1 Z
+bit 2234 C 1 *
+bit 2233 I 1 IO_P34
+bit 2232 O 1 IO_P34 2231 1 Z
+bit 2231 C 1 *
+bit 2230 I 1 IO_R24
+bit 2229 O 1 IO_R24 2228 1 Z
+bit 2228 C 1 *
+bit 2227 I 1 IO_R25
+bit 2226 O 1 IO_R25 2225 1 Z
+bit 2225 C 1 *
+bit 2224 I 1 IO_R28
+bit 2223 O 1 IO_R28 2222 1 Z
+bit 2222 C 1 *
+bit 2221 I 1 IO_R29
+bit 2220 O 1 IO_R29 2219 1 Z
+bit 2219 C 1 *
+bit 2218 I 1 IO_R31
+bit 2217 O 1 IO_R31 2216 1 Z
+bit 2216 C 1 *
+bit 2215 I 1 IO_R32
+bit 2214 O 1 IO_R32 2213 1 Z
+bit 2213 C 1 *
+bit 2212 I 1 IO_R33
+bit 2211 O 1 IO_R33 2210 1 Z
+bit 2210 C 1 *
+bit 2209 I 1 IO_R34
+bit 2208 O 1 IO_R34 2207 1 Z
+bit 2207 C 1 *
+bit 2206 I 1 IO_R26
+bit 2205 O 1 IO_R26 2204 1 Z
+bit 2204 C 1 *
+bit 2203 I 1 IO_T25
+bit 2202 O 1 IO_T25 2201 1 Z
+bit 2201 C 1 *
+bit 2200 I 1 IO_T28
+bit 2199 O 1 IO_T28 2198 1 Z
+bit 2198 C 1 *
+bit 2197 I 1 IO_T29
+bit 2196 O 1 IO_T29 2195 1 Z
+bit 2195 C 1 *
+bit 2194 I 1 IO_T32
+bit 2193 O 1 IO_T32 2192 1 Z
+bit 2192 C 1 *
+bit 2191 I 1 IO_T33
+bit 2190 O 1 IO_T33 2189 1 Z
+bit 2189 C 1 *
+bit 2188 I 1 IO_T24
+bit 2187 O 1 IO_T24 2186 1 Z
+bit 2186 C 1 *
+bit 2185 I 1 IO_U24
+bit 2184 O 1 IO_U24 2183 1 Z
+bit 2183 C 1 *
+bit 2182 I 1 IO_U25
+bit 2181 O 1 IO_U25 2180 1 Z
+bit 2180 C 1 *
+bit 2179 O 1 *
+bit 2178 O 1 *
+bit 2177 O 1 *
+bit 2176 O 1 *
+bit 2175 O 1 *
+bit 2174 O 1 *
+bit 2173 I 1 IO_U26
+bit 2172 O 1 IO_U26 2171 1 Z
+bit 2171 C 1 *
+bit 2170 I 1 IO_U27
+bit 2169 O 1 IO_U27 2168 1 Z
+bit 2168 C 1 *
+bit 2167 I 1 IO_U28
+bit 2166 O 1 IO_U28 2165 1 Z
+bit 2165 C 1 *
+bit 2164 I 1 IO_U29
+bit 2163 O 1 IO_U29 2162 1 Z
+bit 2162 C 1 *
+bit 2161 I 1 IO_U30
+bit 2160 O 1 IO_U30 2159 1 Z
+bit 2159 C 1 *
+bit 2158 I 1 IO_U31
+bit 2157 O 1 IO_U31 2156 1 Z
+bit 2156 C 1 *
+bit 2155 I 1 IO_U32
+bit 2154 O 1 IO_U32 2153 1 Z
+bit 2153 C 1 *
+bit 2152 I 1 IO_U33
+bit 2151 O 1 IO_U33 2150 1 Z
+bit 2150 C 1 *
+bit 2149 I 1 IO_U34
+bit 2148 O 1 IO_U34 2147 1 Z
+bit 2147 C 1 *
+bit 2146 I 1 IO_V34
+bit 2145 O 1 IO_V34 2144 1 Z
+bit 2144 C 1 *
+bit 2143 I 1 IO_V33
+bit 2142 O 1 IO_V33 2141 1 Z
+bit 2141 C 1 *
+bit 2140 I 1 IO_V32
+bit 2139 O 1 IO_V32 2138 1 Z
+bit 2138 C 1 *
+bit 2137 I 1 IO_V31
+bit 2136 O 1 IO_V31 2135 1 Z
+bit 2135 C 1 *
+bit 2134 I 1 IO_V30
+bit 2133 O 1 IO_V30 2132 1 Z
+bit 2132 C 1 *
+bit 2131 I 1 IO_V29
+bit 2130 O 1 IO_V29 2129 1 Z
+bit 2129 C 1 *
+bit 2128 I 1 IO_V28
+bit 2127 O 1 IO_V28 2126 1 Z
+bit 2126 C 1 *
+bit 2125 I 1 IO_V27
+bit 2124 O 1 IO_V27 2123 1 Z
+bit 2123 C 1 *
+bit 2122 I 1 IO_V26
+bit 2121 O 1 IO_V26 2120 1 Z
+bit 2120 C 1 *
+bit 2119 O 1 *
+bit 2118 O 1 *
+bit 2117 O 1 *
+bit 2116 O 1 *
+bit 2115 O 1 *
+bit 2114 O 1 *
+bit 2113 I 1 IO_V25
+bit 2112 O 1 IO_V25 2111 1 Z
+bit 2111 C 1 *
+bit 2110 I 1 IO_V24
+bit 2109 O 1 IO_V24 2108 1 Z
+bit 2108 C 1 *
+bit 2107 I 1 IO_W24
+bit 2106 O 1 IO_W24 2105 1 Z
+bit 2105 C 1 *
+bit 2104 I 1 IO_W33
+bit 2103 O 1 IO_W33 2102 1 Z
+bit 2102 C 1 *
+bit 2101 I 1 IO_W32
+bit 2100 O 1 IO_W32 2099 1 Z
+bit 2099 C 1 *
+bit 2098 I 1 IO_W29
+bit 2097 O 1 IO_W29 2096 1 Z
+bit 2096 C 1 *
+bit 2095 I 1 IO_W28
+bit 2094 O 1 IO_W28 2093 1 Z
+bit 2093 C 1 *
+bit 2092 I 1 IO_W25
+bit 2091 O 1 IO_W25 2090 1 Z
+bit 2090 C 1 *
+bit 2089 I 1 IO_Y26
+bit 2088 O 1 IO_Y26 2087 1 Z
+bit 2087 C 1 *
+bit 2086 I 1 IO_Y34
+bit 2085 O 1 IO_Y34 2084 1 Z
+bit 2084 C 1 *
+bit 2083 I 1 IO_Y33
+bit 2082 O 1 IO_Y33 2081 1 Z
+bit 2081 C 1 *
+bit 2080 I 1 IO_Y32
+bit 2079 O 1 IO_Y32 2078 1 Z
+bit 2078 C 1 *
+bit 2077 I 1 IO_Y31
+bit 2076 O 1 IO_Y31 2075 1 Z
+bit 2075 C 1 *
+bit 2074 I 1 IO_Y29
+bit 2073 O 1 IO_Y29 2072 1 Z
+bit 2072 C 1 *
+bit 2071 I 1 IO_Y28
+bit 2070 O 1 IO_Y28 2069 1 Z
+bit 2069 C 1 *
+bit 2068 I 1 IO_Y25
+bit 2067 O 1 IO_Y25 2066 1 Z
+bit 2066 C 1 *
+bit 2065 I 1 IO_Y24
+bit 2064 O 1 IO_Y24 2063 1 Z
+bit 2063 C 1 *
+bit 2062 I 1 IO_AA34
+bit 2061 O 1 IO_AA34 2060 1 Z
+bit 2060 C 1 *
+bit 2059 I 1 IO_AA33
+bit 2058 O 1 IO_AA33 2057 1 Z
+bit 2057 C 1 *
+bit 2056 I 1 IO_AA32
+bit 2055 O 1 IO_AA32 2054 1 Z
+bit 2054 C 1 *
+bit 2053 I 1 IO_AA31
+bit 2052 O 1 IO_AA31 2051 1 Z
+bit 2051 C 1 *
+bit 2050 I 1 IO_AA30
+bit 2049 O 1 IO_AA30 2048 1 Z
+bit 2048 C 1 *
+bit 2047 I 1 IO_AA29
+bit 2046 O 1 IO_AA29 2045 1 Z
+bit 2045 C 1 *
+bit 2044 I 1 IO_AA28
+bit 2043 O 1 IO_AA28 2042 1 Z
+bit 2042 C 1 *
+bit 2041 I 1 IO_AA27
+bit 2040 O 1 IO_AA27 2039 1 Z
+bit 2039 C 1 *
+bit 2038 O 1 *
+bit 2037 O 1 *
+bit 2036 O 1 *
+bit 2035 O 1 *
+bit 2034 O 1 *
+bit 2033 O 1 *
+bit 2032 I 1 IO_AA26
+bit 2031 O 1 IO_AA26 2030 1 Z
+bit 2030 C 1 *
+bit 2029 I 1 IO_AA25
+bit 2028 O 1 IO_AA25 2027 1 Z
+bit 2027 C 1 *
+bit 2026 I 1 IO_AA24
+bit 2025 O 1 IO_AA24 2024 1 Z
+bit 2024 C 1 *
+bit 2023 I 1 IO_AB24
+bit 2022 O 1 IO_AB24 2021 1 Z
+bit 2021 C 1 *
+bit 2020 I 1 IO_AB32
+bit 2019 O 1 IO_AB32 2018 1 Z
+bit 2018 C 1 *
+bit 2017 I 1 IO_AB31
+bit 2016 O 1 IO_AB31 2015 1 Z
+bit 2015 C 1 *
+bit 2014 I 1 IO_AB28
+bit 2013 O 1 IO_AB28 2012 1 Z
+bit 2012 C 1 *
+bit 2011 I 1 IO_AB27
+bit 2010 O 1 IO_AB27 2009 1 Z
+bit 2009 C 1 *
+bit 2008 I 1 IO_AB25
+bit 2007 O 1 IO_AB25 2006 1 Z
+bit 2006 C 1 *
+bit 2005 I 1 IO_AC26
+bit 2004 O 1 IO_AC26 2003 1 Z
+bit 2003 C 1 *
+bit 2002 I 1 IO_AC34
+bit 2001 O 1 IO_AC34 2000 1 Z
+bit 2000 C 1 *
+bit 1999 I 1 IO_AC33
+bit 1998 O 1 IO_AC33 1997 1 Z
+bit 1997 C 1 *
+bit 1996 I 1 IO_AC32
+bit 1995 O 1 IO_AC32 1994 1 Z
+bit 1994 C 1 *
+bit 1993 I 1 IO_AC31
+bit 1992 O 1 IO_AC31 1991 1 Z
+bit 1991 C 1 *
+bit 1990 I 1 IO_AC30
+bit 1989 O 1 IO_AC30 1988 1 Z
+bit 1988 C 1 *
+bit 1987 I 1 IO_AC29
+bit 1986 O 1 IO_AC29 1985 1 Z
+bit 1985 C 1 *
+bit 1984 I 1 IO_AC28
+bit 1983 O 1 IO_AC28 1982 1 Z
+bit 1982 C 1 *
+bit 1981 I 1 IO_AC27
+bit 1980 O 1 IO_AC27 1979 1 Z
+bit 1979 C 1 *
+bit 1978 I 1 IO_AC25
+bit 1977 O 1 IO_AC25 1976 1 Z
+bit 1976 C 1 *
+bit 1975 I 1 IO_AC24
+bit 1974 O 1 IO_AC24 1973 1 Z
+bit 1973 C 1 *
+bit 1972 I 1 IO_AD34
+bit 1971 O 1 IO_AD34 1970 1 Z
+bit 1970 C 1 *
+bit 1969 I 1 IO_AD33
+bit 1968 O 1 IO_AD33 1967 1 Z
+bit 1967 C 1 *
+bit 1966 O 1 *
+bit 1965 O 1 *
+bit 1964 O 1 *
+bit 1963 O 1 *
+bit 1962 O 1 *
+bit 1961 O 1 *
+bit 1960 I 1 IO_AD29
+bit 1959 O 1 IO_AD29 1958 1 Z
+bit 1958 C 1 *
+bit 1957 I 1 IO_AD28
+bit 1956 O 1 IO_AD28 1955 1 Z
+bit 1955 C 1 *
+bit 1954 I 1 IO_AD26
+bit 1953 O 1 IO_AD26 1952 1 Z
+bit 1952 C 1 *
+bit 1951 I 1 IO_AD25
+bit 1950 O 1 IO_AD25 1949 1 Z
+bit 1949 C 1 *
+bit 1948 I 1 IO_AE34
+bit 1947 O 1 IO_AE34 1946 1 Z
+bit 1946 C 1 *
+bit 1945 I 1 IO_AE33
+bit 1944 O 1 IO_AE33 1943 1 Z
+bit 1943 C 1 *
+bit 1942 I 1 IO_AE32
+bit 1941 O 1 IO_AE32 1940 1 Z
+bit 1940 C 1 *
+bit 1939 I 1 IO_AE31
+bit 1938 O 1 IO_AE31 1937 1 Z
+bit 1937 C 1 *
+bit 1936 I 1 IO_AE30
+bit 1935 O 1 IO_AE30 1934 1 Z
+bit 1934 C 1 *
+bit 1933 I 1 IO_AE29
+bit 1932 O 1 IO_AE29 1931 1 Z
+bit 1931 C 1 *
+bit 1930 I 1 IO_AE28
+bit 1929 O 1 IO_AE28 1928 1 Z
+bit 1928 C 1 *
+bit 1927 I 1 IO_AE27
+bit 1926 O 1 IO_AE27 1925 1 Z
+bit 1925 C 1 *
+bit 1924 I 1 IO_AE26
+bit 1923 O 1 IO_AE26 1922 1 Z
+bit 1922 C 1 *
+bit 1921 I 1 IO_AF27
+bit 1920 O 1 IO_AF27 1919 1 Z
+bit 1919 C 1 *
+bit 1918 I 1 IO_AF33
+bit 1917 O 1 IO_AF33 1916 1 Z
+bit 1916 C 1 *
+bit 1915 I 1 IO_AF32
+bit 1914 O 1 IO_AF32 1913 1 Z
+bit 1913 C 1 *
+bit 1912 I 1 IO_AF31
+bit 1911 O 1 IO_AF31 1910 1 Z
+bit 1910 C 1 *
+bit 1909 I 1 IO_AG31
+bit 1908 O 1 IO_AG31 1907 1 Z
+bit 1907 C 1 *
+bit 1906 I 1 IO_AF29
+bit 1905 O 1 IO_AF29 1904 1 Z
+bit 1904 C 1 *
+bit 1903 I 1 IO_AF28
+bit 1902 O 1 IO_AF28 1901 1 Z
+bit 1901 C 1 *
+bit 1900 I 1 IO_AG34
+bit 1899 O 1 IO_AG34 1898 1 Z
+bit 1898 C 1 *
+bit 1897 I 1 IO_AG33
+bit 1896 O 1 IO_AG33 1895 1 Z
+bit 1895 C 1 *
+bit 1894 I 1 IO_AG30
+bit 1893 O 1 IO_AG30 1892 1 Z
+bit 1892 C 1 *
+bit 1891 I 1 IO_AG29
+bit 1890 O 1 IO_AG29 1889 1 Z
+bit 1889 C 1 *
+bit 1888 I 1 IO_AH34
+bit 1887 O 1 IO_AH34 1886 1 Z
+bit 1886 C 1 *
+bit 1885 O 1 *
+bit 1884 O 1 *
+bit 1883 O 1 *
+bit 1882 O 1 *
+bit 1881 O 1 *
+bit 1880 O 1 *
+bit 1879 I 1 IO_AH33
+bit 1878 O 1 IO_AH33 1877 1 Z
+bit 1877 C 1 *
+bit 1876 I 1 IO_AH32
+bit 1875 O 1 IO_AH32 1874 1 Z
+bit 1874 C 1 *
+bit 1873 I 1 IO_AH31
+bit 1872 O 1 IO_AH31 1871 1 Z
+bit 1871 C 1 *
+bit 1870 I 1 IO_AH30
+bit 1869 O 1 IO_AH30 1868 1 Z
+bit 1868 C 1 *
+bit 1867 I 1 IO_AH29
+bit 1866 O 1 IO_AH29 1865 1 Z
+bit 1865 C 1 *
+bit 1864 I 1 IO_AJ34
+bit 1863 O 1 IO_AJ34 1862 1 Z
+bit 1862 C 1 *
+bit 1861 I 1 IO_AJ33
+bit 1860 O 1 IO_AJ33 1859 1 Z
+bit 1859 C 1 *
+bit 1858 I 1 IO_AJ32
+bit 1857 O 1 IO_AJ32 1856 1 Z
+bit 1856 C 1 *
+bit 1855 I 1 IO_AJ31
+bit 1854 O 1 IO_AJ31 1853 1 Z
+bit 1853 C 1 *
+bit 1852 I 1 IO_AK33
+bit 1851 O 1 IO_AK33 1850 1 Z
+bit 1850 C 1 *
+bit 1849 I 1 IO_AK32
+bit 1848 O 1 IO_AK32 1847 1 Z
+bit 1847 C 1 *
+bit 1846 I 1 IO_AL34
+bit 1845 O 1 IO_AL34 1844 1 Z
+bit 1844 C 1 *
+bit 1843 I 1 IO_AL33
+bit 1842 O 1 IO_AL33 1841 1 Z
+bit 1841 C 1 *
+bit 1840 I 1 IO_AM34
+bit 1839 O 1 IO_AM34 1838 1 Z
+bit 1838 C 1 *
+bit 1837 I 1 IO_AM33
+bit 1836 O 1 IO_AM33 1835 1 Z
+bit 1835 C 1 *
+bit 1834 I 1 CCLK_AL31
+bit 1833 O 1 CCLK_AL31 1832 1 Z
+bit 1832 C 1 *
+bit 1831 I 1 DONE_AD24
+bit 1830 O 1 DONE_AD24 1829 1 Z
+bit 1829 C 1 *
+bit 1828 I 1 IO_AL30
+bit 1827 O 1 IO_AL30 1826 1 Z
+bit 1826 C 1 *
+bit 1825 I 1 IO_AN32
+bit 1824 O 1 IO_AN32 1823 1 Z
+bit 1823 C 1 *
+bit 1822 I 1 IO_AP32
+bit 1821 O 1 IO_AP32 1820 1 Z
+bit 1820 C 1 *
+bit 1819 I 1 IO_AN31
+bit 1818 O 1 IO_AN31 1817 1 Z
+bit 1817 C 1 *
+bit 1816 I 1 IO_AP31
+bit 1815 O 1 IO_AP31 1814 1 Z
+bit 1814 C 1 *
+bit 1813 I 1 IO_AJ29
+bit 1812 O 1 IO_AJ29 1811 1 Z
+bit 1811 C 1 *
+bit 1810 I 1 IO_AM30
+bit 1809 O 1 IO_AM30 1808 1 Z
+bit 1808 C 1 *
+bit 1807 I 1 IO_AN30
+bit 1806 O 1 IO_AN30 1805 1 Z
+bit 1805 C 1 *
+bit 1804 I 1 IO_AL29
+bit 1803 O 1 IO_AL29 1802 1 Z
+bit 1802 C 1 *
+bit 1801 I 1 IO_AM29
+bit 1800 O 1 IO_AM29 1799 1 Z
+bit 1799 C 1 *
+bit 1798 I 1 IO_AG27
+bit 1797 O 1 IO_AG27 1796 1 Z
+bit 1796 C 1 *
+bit 1795 I 1 IO_AN29
+bit 1794 O 1 IO_AN29 1793 1 Z
+bit 1793 C 1 *
+bit 1792 I 1 IO_AP29
+bit 1791 O 1 IO_AP29 1790 1 Z
+bit 1790 C 1 *
+bit 1789 I 1 IO_AJ28
+bit 1788 O 1 IO_AJ28 1787 1 Z
+bit 1787 C 1 *
+bit 1786 I 1 IO_AK28
+bit 1785 O 1 IO_AK28 1784 1 Z
+bit 1784 C 1 *
+bit 1783 I 1 IO_AJ27
+bit 1782 O 1 IO_AJ27 1781 1 Z
+bit 1781 C 1 *
+bit 1780 I 1 IO_AL28
+bit 1779 O 1 IO_AL28 1778 1 Z
+bit 1778 C 1 *
+bit 1777 I 1 IO_AM28
+bit 1776 O 1 IO_AM28 1775 1 Z
+bit 1775 C 1 *
+bit 1774 I 1 IO_AN28
+bit 1773 O 1 IO_AN28 1772 1 Z
+bit 1772 C 1 *
+bit 1771 I 1 IO_AP28
+bit 1770 O 1 IO_AP28 1769 1 Z
+bit 1769 C 1 *
+bit 1768 I 1 IO_AF26
+bit 1767 O 1 IO_AF26 1766 1 Z
+bit 1766 C 1 *
+bit 1765 I 1 IO_AK27
+bit 1764 O 1 IO_AK27 1763 1 Z
+bit 1763 C 1 *
+bit 1762 I 1 IO_AL27
+bit 1761 O 1 IO_AL27 1760 1 Z
+bit 1760 C 1 *
+bit 1759 I 1 IO_AN27
+bit 1758 O 1 IO_AN27 1757 1 Z
+bit 1757 C 1 *
+bit 1756 I 1 IO_AP27
+bit 1755 O 1 IO_AP27 1754 1 Z
+bit 1754 C 1 *
+bit 1753 I 1 IO_AG26
+bit 1752 O 1 IO_AG26 1751 1 Z
+bit 1751 C 1 *
+bit 1750 I 1 IO_AH26
+bit 1749 O 1 IO_AH26 1748 1 Z
+bit 1748 C 1 *
+bit 1747 I 1 IO_AJ26
+bit 1746 O 1 IO_AJ26 1745 1 Z
+bit 1745 C 1 *
+bit 1744 I 1 IO_AL26
+bit 1743 O 1 IO_AL26 1742 1 Z
+bit 1742 C 1 *
+bit 1741 I 1 IO_AM26
+bit 1740 O 1 IO_AM26 1739 1 Z
+bit 1739 C 1 *
+bit 1738 I 1 IO_AN26
+bit 1737 O 1 IO_AN26 1736 1 Z
+bit 1736 C 1 *
+bit 1735 I 1 IO_AF25
+bit 1734 O 1 IO_AF25 1733 1 Z
+bit 1733 C 1 *
+bit 1732 I 1 IO_AG25
+bit 1731 O 1 IO_AG25 1730 1 Z
+bit 1730 C 1 *
+bit 1729 I 1 IO_AH25
+bit 1728 O 1 IO_AH25 1727 1 Z
+bit 1727 C 1 *
+bit 1726 I 1 IO_AJ25
+bit 1725 O 1 IO_AJ25 1724 1 Z
+bit 1724 C 1 *
+bit 1723 I 1 IO_AK25
+bit 1722 O 1 IO_AK25 1721 1 Z
+bit 1721 C 1 *
+bit 1720 I 1 IO_AL25
+bit 1719 O 1 IO_AL25 1718 1 Z
+bit 1718 C 1 *
+bit 1717 I 1 IO_AM25
+bit 1716 O 1 IO_AM25 1715 1 Z
+bit 1715 C 1 *
+bit 1714 I 1 IO_AN25
+bit 1713 O 1 IO_AN25 1712 1 Z
+bit 1712 C 1 *
+bit 1711 I 1 IO_AP25
+bit 1710 O 1 IO_AP25 1709 1 Z
+bit 1709 C 1 *
+bit 1708 I 1 IO_AE24
+bit 1707 O 1 IO_AE24 1706 1 Z
+bit 1706 C 1 *
+bit 1705 I 1 IO_AH24
+bit 1704 O 1 IO_AH24 1703 1 Z
+bit 1703 C 1 *
+bit 1702 I 1 IO_AJ24
+bit 1701 O 1 IO_AJ24 1700 1 Z
+bit 1700 C 1 *
+bit 1699 I 1 IO_AN24
+bit 1698 O 1 IO_AN24 1697 1 Z
+bit 1697 C 1 *
+bit 1696 I 1 IO_AP24
+bit 1695 O 1 IO_AP24 1694 1 Z
+bit 1694 C 1 *
+bit 1693 I 1 IO_AF24
+bit 1692 O 1 IO_AF24 1691 1 Z
+bit 1691 C 1 *
+bit 1690 I 1 IO_AD23
+bit 1689 O 1 IO_AD23 1688 1 Z
+bit 1688 C 1 *
+bit 1687 I 1 IO_AE23
+bit 1686 O 1 IO_AE23 1685 1 Z
+bit 1685 C 1 *
+bit 1684 I 1 IO_AF23
+bit 1683 O 1 IO_AF23 1682 1 Z
+bit 1682 C 1 *
+bit 1681 I 1 IO_AG23
+bit 1680 O 1 IO_AG23 1679 1 Z
+bit 1679 C 1 *
+bit 1678 I 1 IO_AH23
+bit 1677 O 1 IO_AH23 1676 1 Z
+bit 1676 C 1 *
+bit 1675 I 1 IO_AJ23
+bit 1674 O 1 IO_AJ23 1673 1 Z
+bit 1673 C 1 *
+bit 1672 I 1 IO_AK23
+bit 1671 O 1 IO_AK23 1670 1 Z
+bit 1670 C 1 *
+bit 1669 I 1 IO_AL23
+bit 1668 O 1 IO_AL23 1667 1 Z
+bit 1667 C 1 *
+bit 1666 I 1 IO_AM23
+bit 1665 O 1 IO_AM23 1664 1 Z
+bit 1664 C 1 *
+bit 1663 I 1 IO_AD22
+bit 1662 O 1 IO_AD22 1661 1 Z
+bit 1661 C 1 *
+bit 1660 I 1 IO_AN23
+bit 1659 O 1 IO_AN23 1658 1 Z
+bit 1658 C 1 *
+bit 1657 I 1 IO_AP23
+bit 1656 O 1 IO_AP23 1655 1 Z
+bit 1655 C 1 *
+bit 1654 I 1 IO_AG22
+bit 1653 O 1 IO_AG22 1652 1 Z
+bit 1652 C 1 *
+bit 1651 I 1 IO_AH22
+bit 1650 O 1 IO_AH22 1649 1 Z
+bit 1649 C 1 *
+bit 1648 I 1 IO_AE22
+bit 1647 O 1 IO_AE22 1646 1 Z
+bit 1646 C 1 *
+bit 1645 I 1 IO_AL22
+bit 1644 O 1 IO_AL22 1643 1 Z
+bit 1643 C 1 *
+bit 1642 I 1 IO_AM22
+bit 1641 O 1 IO_AM22 1640 1 Z
+bit 1640 C 1 *
+bit 1639 I 1 IO_AD21
+bit 1638 O 1 IO_AD21 1637 1 Z
+bit 1637 C 1 *
+bit 1636 I 1 IO_AE21
+bit 1635 O 1 IO_AE21 1634 1 Z
+bit 1634 C 1 *
+bit 1633 I 1 IO_AF21
+bit 1632 O 1 IO_AF21 1631 1 Z
+bit 1631 C 1 *
+bit 1630 I 1 IO_AG21
+bit 1629 O 1 IO_AG21 1628 1 Z
+bit 1628 C 1 *
+bit 1627 I 1 IO_AH21
+bit 1626 O 1 IO_AH21 1625 1 Z
+bit 1625 C 1 *
+bit 1624 I 1 IO_AJ21
+bit 1623 O 1 IO_AJ21 1622 1 Z
+bit 1622 C 1 *
+bit 1621 I 1 IO_AK21
+bit 1620 O 1 IO_AK21 1619 1 Z
+bit 1619 C 1 *
+bit 1618 I 1 IO_AD20
+bit 1617 O 1 IO_AD20 1616 1 Z
+bit 1616 C 1 *
+bit 1615 I 1 IO_AL21
+bit 1614 O 1 IO_AL21 1613 1 Z
+bit 1613 C 1 *
+bit 1612 I 1 IO_AM21
+bit 1611 O 1 IO_AM21 1610 1 Z
+bit 1610 C 1 *
+bit 1609 I 1 IO_AN21
+bit 1608 O 1 IO_AN21 1607 1 Z
+bit 1607 C 1 *
+bit 1606 I 1 IO_AP21
+bit 1605 O 1 IO_AP21 1604 1 Z
+bit 1604 C 1 *
+bit 1603 I 1 IO_AD19
+bit 1602 O 1 IO_AD19 1601 1 Z
+bit 1601 C 1 *
+bit 1600 I 1 IO_AE20
+bit 1599 O 1 IO_AE20 1598 1 Z
+bit 1598 C 1 *
+bit 1597 I 1 IO_AF20
+bit 1596 O 1 IO_AF20 1595 1 Z
+bit 1595 C 1 *
+bit 1594 I 1 IO_AH20
+bit 1593 O 1 IO_AH20 1592 1 Z
+bit 1592 C 1 *
+bit 1591 I 1 IO_AJ20
+bit 1590 O 1 IO_AJ20 1589 1 Z
+bit 1589 C 1 *
+bit 1588 I 1 IO_AE19
+bit 1587 O 1 IO_AE19 1586 1 Z
+bit 1586 C 1 *
+bit 1585 I 1 IO_AL20
+bit 1584 O 1 IO_AL20 1583 1 Z
+bit 1583 C 1 *
+bit 1582 I 1 IO_AM20
+bit 1581 O 1 IO_AM20 1580 1 Z
+bit 1580 C 1 *
+bit 1579 I 1 IO_AN20
+bit 1578 O 1 IO_AN20 1577 1 Z
+bit 1577 C 1 *
+bit 1576 I 1 IO_AP20
+bit 1575 O 1 IO_AP20 1574 1 Z
+bit 1574 C 1 *
+bit 1573 I 1 IO_AD18
+bit 1572 O 1 IO_AD18 1571 1 Z
+bit 1571 C 1 *
+bit 1570 I 1 IO_AH19
+bit 1569 O 1 IO_AH19 1568 1 Z
+bit 1568 C 1 *
+bit 1567 I 1 IO_AJ19
+bit 1566 O 1 IO_AJ19 1565 1 Z
+bit 1565 C 1 *
+bit 1564 I 1 IO_AM19
+bit 1563 O 1 IO_AM19 1562 1 Z
+bit 1562 C 1 *
+bit 1561 I 1 IO_AN19
+bit 1560 O 1 IO_AN19 1559 1 Z
+bit 1559 C 1 *
+bit 1558 I 1 IO_AE18
+bit 1557 O 1 IO_AE18 1556 1 Z
+bit 1556 C 1 *
+bit 1555 I 1 IO_AF18
+bit 1554 O 1 IO_AF18 1553 1 Z
+bit 1553 C 1 *
+bit 1552 I 1 IO_AG18
+bit 1551 O 1 IO_AG18 1550 1 Z
+bit 1550 C 1 *
+bit 1549 I 1 IO_AH18
+bit 1548 O 1 IO_AH18 1547 1 Z
+bit 1547 C 1 *
+bit 1546 I 1 IO_AJ18
+bit 1545 O 1 IO_AJ18 1544 1 Z
+bit 1544 C 1 *
+bit 1543 I 1 IO_AK18
+bit 1542 O 1 IO_AK18 1541 1 Z
+bit 1541 C 1 *
+bit 1540 I 1 IO_AL18
+bit 1539 O 1 IO_AL18 1538 1 Z
+bit 1538 C 1 *
+bit 1537 I 1 IO_AM18
+bit 1536 O 1 IO_AM18 1535 1 Z
+bit 1535 C 1 *
+bit 1534 I 1 IO_AN18
+bit 1533 O 1 IO_AN18 1532 1 Z
+bit 1532 C 1 *
+bit 1531 I 1 IO_AP18
+bit 1530 O 1 IO_AP18 1529 1 Z
+bit 1529 C 1 *
+bit 1528 I 1 IO_AP17
+bit 1527 O 1 IO_AP17 1526 1 Z
+bit 1526 C 1 *
+bit 1525 I 1 IO_AN17
+bit 1524 O 1 IO_AN17 1523 1 Z
+bit 1523 C 1 *
+bit 1522 I 1 IO_AM17
+bit 1521 O 1 IO_AM17 1520 1 Z
+bit 1520 C 1 *
+bit 1519 I 1 IO_AL17
+bit 1518 O 1 IO_AL17 1517 1 Z
+bit 1517 C 1 *
+bit 1516 I 1 IO_AK17
+bit 1515 O 1 IO_AK17 1514 1 Z
+bit 1514 C 1 *
+bit 1513 I 1 IO_AJ17
+bit 1512 O 1 IO_AJ17 1511 1 Z
+bit 1511 C 1 *
+bit 1510 I 1 IO_AH17
+bit 1509 O 1 IO_AH17 1508 1 Z
+bit 1508 C 1 *
+bit 1507 I 1 IO_AG17
+bit 1506 O 1 IO_AG17 1505 1 Z
+bit 1505 C 1 *
+bit 1504 I 1 IO_AF17
+bit 1503 O 1 IO_AF17 1502 1 Z
+bit 1502 C 1 *
+bit 1501 I 1 IO_AE17
+bit 1500 O 1 IO_AE17 1499 1 Z
+bit 1499 C 1 *
+bit 1498 I 1 IO_AD17
+bit 1497 O 1 IO_AD17 1496 1 Z
+bit 1496 C 1 *
+bit 1495 I 1 IO_AN16
+bit 1494 O 1 IO_AN16 1493 1 Z
+bit 1493 C 1 *
+bit 1492 I 1 IO_AM16
+bit 1491 O 1 IO_AM16 1490 1 Z
+bit 1490 C 1 *
+bit 1489 I 1 IO_AJ16
+bit 1488 O 1 IO_AJ16 1487 1 Z
+bit 1487 C 1 *
+bit 1486 I 1 IO_AH16
+bit 1485 O 1 IO_AH16 1484 1 Z
+bit 1484 C 1 *
+bit 1483 I 1 IO_AE16
+bit 1482 O 1 IO_AE16 1481 1 Z
+bit 1481 C 1 *
+bit 1480 I 1 IO_AP15
+bit 1479 O 1 IO_AP15 1478 1 Z
+bit 1478 C 1 *
+bit 1477 I 1 IO_AN15
+bit 1476 O 1 IO_AN15 1475 1 Z
+bit 1475 C 1 *
+bit 1474 I 1 IO_AM15
+bit 1473 O 1 IO_AM15 1472 1 Z
+bit 1472 C 1 *
+bit 1471 I 1 IO_AL15
+bit 1470 O 1 IO_AL15 1469 1 Z
+bit 1469 C 1 *
+bit 1468 I 1 IO_AD16
+bit 1467 O 1 IO_AD16 1466 1 Z
+bit 1466 C 1 *
+bit 1465 I 1 IO_AJ15
+bit 1464 O 1 IO_AJ15 1463 1 Z
+bit 1463 C 1 *
+bit 1462 I 1 IO_AH15
+bit 1461 O 1 IO_AH15 1460 1 Z
+bit 1460 C 1 *
+bit 1459 I 1 IO_AF15
+bit 1458 O 1 IO_AF15 1457 1 Z
+bit 1457 C 1 *
+bit 1456 I 1 IO_AE15
+bit 1455 O 1 IO_AE15 1454 1 Z
+bit 1454 C 1 *
+bit 1453 I 1 IO_AD15
+bit 1452 O 1 IO_AD15 1451 1 Z
+bit 1451 C 1 *
+bit 1450 I 1 IO_AP14
+bit 1449 O 1 IO_AP14 1448 1 Z
+bit 1448 C 1 *
+bit 1447 I 1 IO_AN14
+bit 1446 O 1 IO_AN14 1445 1 Z
+bit 1445 C 1 *
+bit 1444 I 1 IO_AM14
+bit 1443 O 1 IO_AM14 1442 1 Z
+bit 1442 C 1 *
+bit 1441 I 1 IO_AL14
+bit 1440 O 1 IO_AL14 1439 1 Z
+bit 1439 C 1 *
+bit 1438 I 1 IO_AK14
+bit 1437 O 1 IO_AK14 1436 1 Z
+bit 1436 C 1 *
+bit 1435 I 1 IO_AJ14
+bit 1434 O 1 IO_AJ14 1433 1 Z
+bit 1433 C 1 *
+bit 1432 I 1 IO_AH14
+bit 1431 O 1 IO_AH14 1430 1 Z
+bit 1430 C 1 *
+bit 1429 I 1 IO_AG14
+bit 1428 O 1 IO_AG14 1427 1 Z
+bit 1427 C 1 *
+bit 1426 I 1 IO_AF14
+bit 1425 O 1 IO_AF14 1424 1 Z
+bit 1424 C 1 *
+bit 1423 I 1 IO_AE14
+bit 1422 O 1 IO_AE14 1421 1 Z
+bit 1421 C 1 *
+bit 1420 I 1 IO_AM13
+bit 1419 O 1 IO_AM13 1418 1 Z
+bit 1418 C 1 *
+bit 1417 I 1 IO_AL13
+bit 1416 O 1 IO_AL13 1415 1 Z
+bit 1415 C 1 *
+bit 1414 I 1 IO_AH13
+bit 1413 O 1 IO_AH13 1412 1 Z
+bit 1412 C 1 *
+bit 1411 I 1 IO_AG13
+bit 1410 O 1 IO_AG13 1409 1 Z
+bit 1409 C 1 *
+bit 1408 I 1 IO_AD14
+bit 1407 O 1 IO_AD14 1406 1 Z
+bit 1406 C 1 *
+bit 1405 I 1 IO_AE13
+bit 1404 O 1 IO_AE13 1403 1 Z
+bit 1403 C 1 *
+bit 1402 I 1 IO_AD13
+bit 1401 O 1 IO_AD13 1400 1 Z
+bit 1400 C 1 *
+bit 1399 I 1 IO_AP12
+bit 1398 O 1 IO_AP12 1397 1 Z
+bit 1397 C 1 *
+bit 1396 I 1 IO_AN12
+bit 1395 O 1 IO_AN12 1394 1 Z
+bit 1394 C 1 *
+bit 1393 I 1 IO_AM12
+bit 1392 O 1 IO_AM12 1391 1 Z
+bit 1391 C 1 *
+bit 1390 I 1 IO_AL12
+bit 1389 O 1 IO_AL12 1388 1 Z
+bit 1388 C 1 *
+bit 1387 I 1 IO_AK12
+bit 1386 O 1 IO_AK12 1385 1 Z
+bit 1385 C 1 *
+bit 1384 I 1 IO_AJ12
+bit 1383 O 1 IO_AJ12 1382 1 Z
+bit 1382 C 1 *
+bit 1381 I 1 IO_AH12
+bit 1380 O 1 IO_AH12 1379 1 Z
+bit 1379 C 1 *
+bit 1378 I 1 IO_AG12
+bit 1377 O 1 IO_AG12 1376 1 Z
+bit 1376 C 1 *
+bit 1375 I 1 IO_AF12
+bit 1374 O 1 IO_AF12 1373 1 Z
+bit 1373 C 1 *
+bit 1372 I 1 IO_AE12
+bit 1371 O 1 IO_AE12 1370 1 Z
+bit 1370 C 1 *
+bit 1369 I 1 IO_AP11
+bit 1368 O 1 IO_AP11 1367 1 Z
+bit 1367 C 1 *
+bit 1366 I 1 IO_AN11
+bit 1365 O 1 IO_AN11 1364 1 Z
+bit 1364 C 1 *
+bit 1363 I 1 IO_AD12
+bit 1362 O 1 IO_AD12 1361 1 Z
+bit 1361 C 1 *
+bit 1360 I 1 IO_AJ11
+bit 1359 O 1 IO_AJ11 1358 1 Z
+bit 1358 C 1 *
+bit 1357 I 1 IO_AH11
+bit 1356 O 1 IO_AH11 1355 1 Z
+bit 1355 C 1 *
+bit 1354 I 1 IO_AF11
+bit 1353 O 1 IO_AF11 1352 1 Z
+bit 1352 C 1 *
+bit 1351 I 1 IO_AE11
+bit 1350 O 1 IO_AE11 1349 1 Z
+bit 1349 C 1 *
+bit 1348 I 1 IO_AD11
+bit 1347 O 1 IO_AD11 1346 1 Z
+bit 1346 C 1 *
+bit 1345 I 1 IO_AP10
+bit 1344 O 1 IO_AP10 1343 1 Z
+bit 1343 C 1 *
+bit 1342 I 1 IO_AN10
+bit 1341 O 1 IO_AN10 1340 1 Z
+bit 1340 C 1 *
+bit 1339 I 1 IO_AM10
+bit 1338 O 1 IO_AM10 1337 1 Z
+bit 1337 C 1 *
+bit 1336 I 1 IO_AL10
+bit 1335 O 1 IO_AL10 1334 1 Z
+bit 1334 C 1 *
+bit 1333 I 1 IO_AK10
+bit 1332 O 1 IO_AK10 1331 1 Z
+bit 1331 C 1 *
+bit 1330 I 1 IO_AJ10
+bit 1329 O 1 IO_AJ10 1328 1 Z
+bit 1328 C 1 *
+bit 1327 I 1 IO_AH10
+bit 1326 O 1 IO_AH10 1325 1 Z
+bit 1325 C 1 *
+bit 1324 I 1 IO_AG10
+bit 1323 O 1 IO_AG10 1322 1 Z
+bit 1322 C 1 *
+bit 1321 I 1 IO_AF10
+bit 1320 O 1 IO_AF10 1319 1 Z
+bit 1319 C 1 *
+bit 1318 I 1 IO_AN9
+bit 1317 O 1 IO_AN9 1316 1 Z
+bit 1316 C 1 *
+bit 1315 I 1 IO_AM9
+bit 1314 O 1 IO_AM9 1313 1 Z
+bit 1313 C 1 *
+bit 1312 I 1 IO_AL9
+bit 1311 O 1 IO_AL9 1310 1 Z
+bit 1310 C 1 *
+bit 1309 I 1 IO_AJ9
+bit 1308 O 1 IO_AJ9 1307 1 Z
+bit 1307 C 1 *
+bit 1306 I 1 IO_AH9
+bit 1305 O 1 IO_AH9 1304 1 Z
+bit 1304 C 1 *
+bit 1303 I 1 IO_AG9
+bit 1302 O 1 IO_AG9 1301 1 Z
+bit 1301 C 1 *
+bit 1300 I 1 IO_AP8
+bit 1299 O 1 IO_AP8 1298 1 Z
+bit 1298 C 1 *
+bit 1297 I 1 IO_AN8
+bit 1296 O 1 IO_AN8 1295 1 Z
+bit 1295 C 1 *
+bit 1294 I 1 IO_AL8
+bit 1293 O 1 IO_AL8 1292 1 Z
+bit 1292 C 1 *
+bit 1291 I 1 IO_AK8
+bit 1290 O 1 IO_AK8 1289 1 Z
+bit 1289 C 1 *
+bit 1288 I 1 IO_AF9
+bit 1287 O 1 IO_AF9 1286 1 Z
+bit 1286 C 1 *
+bit 1285 I 1 IO_AP7
+bit 1284 O 1 IO_AP7 1283 1 Z
+bit 1283 C 1 *
+bit 1282 I 1 IO_AN7
+bit 1281 O 1 IO_AN7 1280 1 Z
+bit 1280 C 1 *
+bit 1279 I 1 IO_AM7
+bit 1278 O 1 IO_AM7 1277 1 Z
+bit 1277 C 1 *
+bit 1276 I 1 IO_AL7
+bit 1275 O 1 IO_AL7 1274 1 Z
+bit 1274 C 1 *
+bit 1273 I 1 IO_AJ8
+bit 1272 O 1 IO_AJ8 1271 1 Z
+bit 1271 C 1 *
+bit 1270 I 1 IO_AK7
+bit 1269 O 1 IO_AK7 1268 1 Z
+bit 1268 C 1 *
+bit 1267 I 1 IO_AJ7
+bit 1266 O 1 IO_AJ7 1265 1 Z
+bit 1265 C 1 *
+bit 1264 I 1 IO_AP6
+bit 1263 O 1 IO_AP6 1262 1 Z
+bit 1262 C 1 *
+bit 1261 I 1 IO_AN6
+bit 1260 O 1 IO_AN6 1259 1 Z
+bit 1259 C 1 *
+bit 1258 I 1 IO_AJ6
+bit 1257 O 1 IO_AJ6 1256 1 Z
+bit 1256 C 1 *
+bit 1255 I 1 IO_AM6
+bit 1254 O 1 IO_AM6 1253 1 Z
+bit 1253 C 1 *
+bit 1252 I 1 IO_AL6
+bit 1251 O 1 IO_AL6 1250 1 Z
+bit 1250 C 1 *
+bit 1249 I 1 IO_AN5
+bit 1248 O 1 IO_AN5 1247 1 Z
+bit 1247 C 1 *
+bit 1246 I 1 IO_AM5
+bit 1245 O 1 IO_AM5 1244 1 Z
+bit 1244 C 1 *
+bit 1243 I 1 IO_AL5
+bit 1242 O 1 IO_AL5 1241 1 Z
+bit 1241 C 1 *
+bit 1240 I 1 IO_AP4
+bit 1239 O 1 IO_AP4 1238 1 Z
+bit 1238 C 1 *
+bit 1237 I 1 IO_AN4
+bit 1236 O 1 IO_AN4 1235 1 Z
+bit 1235 C 1 *
+bit 1234 I 1 IO_AP3
+bit 1233 O 1 IO_AP3 1232 1 Z
+bit 1232 C 1 *
+bit 1231 I 1 IO_AN3
+bit 1230 O 1 IO_AN3 1229 1 Z
+bit 1229 C 1 *
+bit 1228 I 1 M2_AG8
+bit 1227 I 1 M0_AL4
+bit 1226 I 1 M1_AK4
+bit 1225 I 1 IO_AM2
+bit 1224 O 1 IO_AM2 1223 1 Z
+bit 1223 C 1 *
+bit 1222 I 1 IO_AM1
+bit 1221 O 1 IO_AM1 1220 1 Z
+bit 1220 C 1 *
+bit 1219 I 1 IO_AL2
+bit 1218 O 1 IO_AL2 1217 1 Z
+bit 1217 C 1 *
+bit 1216 I 1 IO_AL1
+bit 1215 O 1 IO_AL1 1214 1 Z
+bit 1214 C 1 *
+bit 1213 I 1 IO_AK3
+bit 1212 O 1 IO_AK3 1211 1 Z
+bit 1211 C 1 *
+bit 1210 I 1 IO_AK2
+bit 1209 O 1 IO_AK2 1208 1 Z
+bit 1208 C 1 *
+bit 1207 I 1 IO_AJ4
+bit 1206 O 1 IO_AJ4 1205 1 Z
+bit 1205 C 1 *
+bit 1204 I 1 IO_AJ3
+bit 1203 O 1 IO_AJ3 1202 1 Z
+bit 1202 C 1 *
+bit 1201 I 1 IO_AJ2
+bit 1200 O 1 IO_AJ2 1199 1 Z
+bit 1199 C 1 *
+bit 1198 I 1 IO_AJ1
+bit 1197 O 1 IO_AJ1 1196 1 Z
+bit 1196 C 1 *
+bit 1195 I 1 IO_AH6
+bit 1194 O 1 IO_AH6 1193 1 Z
+bit 1193 C 1 *
+bit 1192 I 1 IO_AH5
+bit 1191 O 1 IO_AH5 1190 1 Z
+bit 1190 C 1 *
+bit 1189 I 1 IO_AH4
+bit 1188 O 1 IO_AH4 1187 1 Z
+bit 1187 C 1 *
+bit 1186 I 1 IO_AH3
+bit 1185 O 1 IO_AH3 1184 1 Z
+bit 1184 C 1 *
+bit 1183 I 1 IO_AH2
+bit 1182 O 1 IO_AH2 1181 1 Z
+bit 1181 C 1 *
+bit 1180 O 1 *
+bit 1179 O 1 *
+bit 1178 O 1 *
+bit 1177 O 1 *
+bit 1176 O 1 *
+bit 1175 O 1 *
+bit 1174 I 1 IO_AH1
+bit 1173 O 1 IO_AH1 1172 1 Z
+bit 1172 C 1 *
+bit 1171 I 1 IO_AG6
+bit 1170 O 1 IO_AG6 1169 1 Z
+bit 1169 C 1 *
+bit 1168 I 1 IO_AG5
+bit 1167 O 1 IO_AG5 1166 1 Z
+bit 1166 C 1 *
+bit 1165 I 1 IO_AG2
+bit 1164 O 1 IO_AG2 1163 1 Z
+bit 1163 C 1 *
+bit 1162 I 1 IO_AG1
+bit 1161 O 1 IO_AG1 1160 1 Z
+bit 1160 C 1 *
+bit 1159 I 1 IO_AF7
+bit 1158 O 1 IO_AF7 1157 1 Z
+bit 1157 C 1 *
+bit 1156 I 1 IO_AF6
+bit 1155 O 1 IO_AF6 1154 1 Z
+bit 1154 C 1 *
+bit 1153 I 1 IO_AG4
+bit 1152 O 1 IO_AG4 1151 1 Z
+bit 1151 C 1 *
+bit 1150 I 1 IO_AF4
+bit 1149 O 1 IO_AF4 1148 1 Z
+bit 1148 C 1 *
+bit 1147 I 1 IO_AF3
+bit 1146 O 1 IO_AF3 1145 1 Z
+bit 1145 C 1 *
+bit 1144 I 1 IO_AF2
+bit 1143 O 1 IO_AF2 1142 1 Z
+bit 1142 C 1 *
+bit 1141 I 1 IO_AF8
+bit 1140 O 1 IO_AF8 1139 1 Z
+bit 1139 C 1 *
+bit 1138 I 1 IO_AE9
+bit 1137 O 1 IO_AE9 1136 1 Z
+bit 1136 C 1 *
+bit 1135 I 1 IO_AE8
+bit 1134 O 1 IO_AE8 1133 1 Z
+bit 1133 C 1 *
+bit 1132 I 1 IO_AE7
+bit 1131 O 1 IO_AE7 1130 1 Z
+bit 1130 C 1 *
+bit 1129 I 1 IO_AE6
+bit 1128 O 1 IO_AE6 1127 1 Z
+bit 1127 C 1 *
+bit 1126 I 1 IO_AE5
+bit 1125 O 1 IO_AE5 1124 1 Z
+bit 1124 C 1 *
+bit 1123 I 1 IO_AE4
+bit 1122 O 1 IO_AE4 1121 1 Z
+bit 1121 C 1 *
+bit 1120 I 1 IO_AE3
+bit 1119 O 1 IO_AE3 1118 1 Z
+bit 1118 C 1 *
+bit 1117 I 1 IO_AE2
+bit 1116 O 1 IO_AE2 1115 1 Z
+bit 1115 C 1 *
+bit 1114 I 1 IO_AE1
+bit 1113 O 1 IO_AE1 1112 1 Z
+bit 1112 C 1 *
+bit 1111 I 1 IO_AD10
+bit 1110 O 1 IO_AD10 1109 1 Z
+bit 1109 C 1 *
+bit 1108 I 1 IO_AD9
+bit 1107 O 1 IO_AD9 1106 1 Z
+bit 1106 C 1 *
+bit 1105 I 1 IO_AD7
+bit 1104 O 1 IO_AD7 1103 1 Z
+bit 1103 C 1 *
+bit 1102 I 1 IO_AD6
+bit 1101 O 1 IO_AD6 1100 1 Z
+bit 1100 C 1 *
+bit 1099 O 1 *
+bit 1098 O 1 *
+bit 1097 O 1 *
+bit 1096 O 1 *
+bit 1095 O 1 *
+bit 1094 O 1 *
+bit 1093 I 1 IO_AD2
+bit 1092 O 1 IO_AD2 1091 1 Z
+bit 1091 C 1 *
+bit 1090 I 1 IO_AD1
+bit 1089 O 1 IO_AD1 1088 1 Z
+bit 1088 C 1 *
+bit 1087 I 1 IO_AC11
+bit 1086 O 1 IO_AC11 1085 1 Z
+bit 1085 C 1 *
+bit 1084 I 1 IO_AC10
+bit 1083 O 1 IO_AC10 1082 1 Z
+bit 1082 C 1 *
+bit 1081 I 1 IO_AC8
+bit 1080 O 1 IO_AC8 1079 1 Z
+bit 1079 C 1 *
+bit 1078 I 1 IO_AC7
+bit 1077 O 1 IO_AC7 1076 1 Z
+bit 1076 C 1 *
+bit 1075 I 1 IO_AC6
+bit 1074 O 1 IO_AC6 1073 1 Z
+bit 1073 C 1 *
+bit 1072 I 1 IO_AC5
+bit 1071 O 1 IO_AC5 1070 1 Z
+bit 1070 C 1 *
+bit 1069 I 1 IO_AC4
+bit 1068 O 1 IO_AC4 1067 1 Z
+bit 1067 C 1 *
+bit 1066 I 1 IO_AC3
+bit 1065 O 1 IO_AC3 1064 1 Z
+bit 1064 C 1 *
+bit 1063 I 1 IO_AC2
+bit 1062 O 1 IO_AC2 1061 1 Z
+bit 1061 C 1 *
+bit 1060 I 1 IO_AC1
+bit 1059 O 1 IO_AC1 1058 1 Z
+bit 1058 C 1 *
+bit 1057 I 1 IO_AC9
+bit 1056 O 1 IO_AC9 1055 1 Z
+bit 1055 C 1 *
+bit 1054 I 1 IO_AB10
+bit 1053 O 1 IO_AB10 1052 1 Z
+bit 1052 C 1 *
+bit 1051 I 1 IO_AB8
+bit 1050 O 1 IO_AB8 1049 1 Z
+bit 1049 C 1 *
+bit 1048 I 1 IO_AB7
+bit 1047 O 1 IO_AB7 1046 1 Z
+bit 1046 C 1 *
+bit 1045 I 1 IO_AB4
+bit 1044 O 1 IO_AB4 1043 1 Z
+bit 1043 C 1 *
+bit 1042 I 1 IO_AB3
+bit 1041 O 1 IO_AB3 1040 1 Z
+bit 1040 C 1 *
+bit 1039 I 1 IO_AB11
+bit 1038 O 1 IO_AB11 1037 1 Z
+bit 1037 C 1 *
+bit 1036 I 1 IO_AA11
+bit 1035 O 1 IO_AA11 1034 1 Z
+bit 1034 C 1 *
+bit 1033 I 1 IO_AA10
+bit 1032 O 1 IO_AA10 1031 1 Z
+bit 1031 C 1 *
+bit 1030 I 1 IO_AA9
+bit 1029 O 1 IO_AA9 1028 1 Z
+bit 1028 C 1 *
+bit 1027 O 1 *
+bit 1026 O 1 *
+bit 1025 O 1 *
+bit 1024 O 1 *
+bit 1023 O 1 *
+bit 1022 O 1 *
+bit 1021 I 1 IO_AA8
+bit 1020 O 1 IO_AA8 1019 1 Z
+bit 1019 C 1 *
+bit 1018 I 1 IO_AA7
+bit 1017 O 1 IO_AA7 1016 1 Z
+bit 1016 C 1 *
+bit 1015 I 1 IO_AA6
+bit 1014 O 1 IO_AA6 1013 1 Z
+bit 1013 C 1 *
+bit 1012 I 1 IO_AA5
+bit 1011 O 1 IO_AA5 1010 1 Z
+bit 1010 C 1 *
+bit 1009 I 1 IO_AA4
+bit 1008 O 1 IO_AA4 1007 1 Z
+bit 1007 C 1 *
+bit 1006 I 1 IO_AA3
+bit 1005 O 1 IO_AA3 1004 1 Z
+bit 1004 C 1 *
+bit 1003 I 1 IO_AA2
+bit 1002 O 1 IO_AA2 1001 1 Z
+bit 1001 C 1 *
+bit 1000 I 1 IO_AA1
+bit 999 O 1 IO_AA1 998 1 Z
+bit 998 C 1 *
+bit 997 I 1 IO_Y11
+bit 996 O 1 IO_Y11 995 1 Z
+bit 995 C 1 *
+bit 994 I 1 IO_Y10
+bit 993 O 1 IO_Y10 992 1 Z
+bit 992 C 1 *
+bit 991 I 1 IO_Y7
+bit 990 O 1 IO_Y7 989 1 Z
+bit 989 C 1 *
+bit 988 I 1 IO_Y6
+bit 987 O 1 IO_Y6 986 1 Z
+bit 986 C 1 *
+bit 985 I 1 IO_Y4
+bit 984 O 1 IO_Y4 983 1 Z
+bit 983 C 1 *
+bit 982 I 1 IO_Y3
+bit 981 O 1 IO_Y3 980 1 Z
+bit 980 C 1 *
+bit 979 I 1 IO_Y2
+bit 978 O 1 IO_Y2 977 1 Z
+bit 977 C 1 *
+bit 976 I 1 IO_Y1
+bit 975 O 1 IO_Y1 974 1 Z
+bit 974 C 1 *
+bit 973 I 1 IO_Y9
+bit 972 O 1 IO_Y9 971 1 Z
+bit 971 C 1 *
+bit 970 I 1 IO_W10
+bit 969 O 1 IO_W10 968 1 Z
+bit 968 C 1 *
+bit 967 I 1 IO_W7
+bit 966 O 1 IO_W7 965 1 Z
+bit 965 C 1 *
+bit 964 I 1 IO_W6
+bit 963 O 1 IO_W6 962 1 Z
+bit 962 C 1 *
+bit 961 I 1 IO_W3
+bit 960 O 1 IO_W3 959 1 Z
+bit 959 C 1 *
+bit 958 I 1 IO_W2
+bit 957 O 1 IO_W2 956 1 Z
+bit 956 C 1 *
+bit 955 I 1 IO_W11
+bit 954 O 1 IO_W11 953 1 Z
+bit 953 C 1 *
+bit 952 I 1 IO_V11
+bit 951 O 1 IO_V11 950 1 Z
+bit 950 C 1 *
+bit 949 I 1 IO_V10
+bit 948 O 1 IO_V10 947 1 Z
+bit 947 C 1 *
+bit 946 O 1 *
+bit 945 O 1 *
+bit 944 O 1 *
+bit 943 O 1 *
+bit 942 O 1 *
+bit 941 O 1 *
+bit 940 I 1 IO_V9
+bit 939 O 1 IO_V9 938 1 Z
+bit 938 C 1 *
+bit 937 I 1 IO_V8
+bit 936 O 1 IO_V8 935 1 Z
+bit 935 C 1 *
+bit 934 I 1 IO_V7
+bit 933 O 1 IO_V7 932 1 Z
+bit 932 C 1 *
+bit 931 I 1 IO_V6
+bit 930 O 1 IO_V6 929 1 Z
+bit 929 C 1 *
+bit 928 I 1 IO_V5
+bit 927 O 1 IO_V5 926 1 Z
+bit 926 C 1 *
+bit 925 I 1 IO_V4
+bit 924 O 1 IO_V4 923 1 Z
+bit 923 C 1 *
+bit 922 I 1 IO_V3
+bit 921 O 1 IO_V3 920 1 Z
+bit 920 C 1 *
+bit 919 I 1 IO_V2
+bit 918 O 1 IO_V2 917 1 Z
+bit 917 C 1 *
+bit 916 I 1 IO_V1
+bit 915 O 1 IO_V1 914 1 Z
+bit 914 C 1 *
+bit 913 I 1 IO_U1
+bit 912 O 1 IO_U1 911 1 Z
+bit 911 C 1 *
+bit 910 I 1 IO_U2
+bit 909 O 1 IO_U2 908 1 Z
+bit 908 C 1 *
+bit 907 I 1 IO_U3
+bit 906 O 1 IO_U3 905 1 Z
+bit 905 C 1 *
+bit 904 I 1 IO_U4
+bit 903 O 1 IO_U4 902 1 Z
+bit 902 C 1 *
+bit 901 I 1 IO_U5
+bit 900 O 1 IO_U5 899 1 Z
+bit 899 C 1 *
+bit 898 I 1 IO_U6
+bit 897 O 1 IO_U6 896 1 Z
+bit 896 C 1 *
+bit 895 I 1 IO_U7
+bit 894 O 1 IO_U7 893 1 Z
+bit 893 C 1 *
+bit 892 I 1 IO_U8
+bit 891 O 1 IO_U8 890 1 Z
+bit 890 C 1 *
+bit 889 I 1 IO_U9
+bit 888 O 1 IO_U9 887 1 Z
+bit 887 C 1 *
+bit 886 O 1 *
+bit 885 O 1 *
+bit 884 O 1 *
+bit 883 O 1 *
+bit 882 O 1 *
+bit 881 O 1 *
+bit 880 I 1 IO_U10
+bit 879 O 1 IO_U10 878 1 Z
+bit 878 C 1 *
+bit 877 I 1 IO_U11
+bit 876 O 1 IO_U11 875 1 Z
+bit 875 C 1 *
+bit 874 I 1 IO_T11
+bit 873 O 1 IO_T11 872 1 Z
+bit 872 C 1 *
+bit 871 I 1 IO_T2
+bit 870 O 1 IO_T2 869 1 Z
+bit 869 C 1 *
+bit 868 I 1 IO_T3
+bit 867 O 1 IO_T3 866 1 Z
+bit 866 C 1 *
+bit 865 I 1 IO_T6
+bit 864 O 1 IO_T6 863 1 Z
+bit 863 C 1 *
+bit 862 I 1 IO_T7
+bit 861 O 1 IO_T7 860 1 Z
+bit 860 C 1 *
+bit 859 I 1 IO_T10
+bit 858 O 1 IO_T10 857 1 Z
+bit 857 C 1 *
+bit 856 I 1 IO_R9
+bit 855 O 1 IO_R9 854 1 Z
+bit 854 C 1 *
+bit 853 I 1 IO_R1
+bit 852 O 1 IO_R1 851 1 Z
+bit 851 C 1 *
+bit 850 I 1 IO_R2
+bit 849 O 1 IO_R2 848 1 Z
+bit 848 C 1 *
+bit 847 I 1 IO_R3
+bit 846 O 1 IO_R3 845 1 Z
+bit 845 C 1 *
+bit 844 I 1 IO_R4
+bit 843 O 1 IO_R4 842 1 Z
+bit 842 C 1 *
+bit 841 I 1 IO_R6
+bit 840 O 1 IO_R6 839 1 Z
+bit 839 C 1 *
+bit 838 I 1 IO_R7
+bit 837 O 1 IO_R7 836 1 Z
+bit 836 C 1 *
+bit 835 I 1 IO_R10
+bit 834 O 1 IO_R10 833 1 Z
+bit 833 C 1 *
+bit 832 I 1 IO_R11
+bit 831 O 1 IO_R11 830 1 Z
+bit 830 C 1 *
+bit 829 I 1 IO_P1
+bit 828 O 1 IO_P1 827 1 Z
+bit 827 C 1 *
+bit 826 I 1 IO_P2
+bit 825 O 1 IO_P2 824 1 Z
+bit 824 C 1 *
+bit 823 I 1 IO_P3
+bit 822 O 1 IO_P3 821 1 Z
+bit 821 C 1 *
+bit 820 I 1 IO_P4
+bit 819 O 1 IO_P4 818 1 Z
+bit 818 C 1 *
+bit 817 I 1 IO_P5
+bit 816 O 1 IO_P5 815 1 Z
+bit 815 C 1 *
+bit 814 I 1 IO_P6
+bit 813 O 1 IO_P6 812 1 Z
+bit 812 C 1 *
+bit 811 I 1 IO_P7
+bit 810 O 1 IO_P7 809 1 Z
+bit 809 C 1 *
+bit 808 I 1 IO_P8
+bit 807 O 1 IO_P8 806 1 Z
+bit 806 C 1 *
+bit 805 O 1 *
+bit 804 O 1 *
+bit 803 O 1 *
+bit 802 O 1 *
+bit 801 O 1 *
+bit 800 O 1 *
+bit 799 I 1 IO_P9
+bit 798 O 1 IO_P9 797 1 Z
+bit 797 C 1 *
+bit 796 I 1 IO_P10
+bit 795 O 1 IO_P10 794 1 Z
+bit 794 C 1 *
+bit 793 I 1 IO_P11
+bit 792 O 1 IO_P11 791 1 Z
+bit 791 C 1 *
+bit 790 I 1 IO_N11
+bit 789 O 1 IO_N11 788 1 Z
+bit 788 C 1 *
+bit 787 I 1 IO_N3
+bit 786 O 1 IO_N3 785 1 Z
+bit 785 C 1 *
+bit 784 I 1 IO_N4
+bit 783 O 1 IO_N4 782 1 Z
+bit 782 C 1 *
+bit 781 I 1 IO_N7
+bit 780 O 1 IO_N7 779 1 Z
+bit 779 C 1 *
+bit 778 I 1 IO_N8
+bit 777 O 1 IO_N8 776 1 Z
+bit 776 C 1 *
+bit 775 I 1 IO_N10
+bit 774 O 1 IO_N10 773 1 Z
+bit 773 C 1 *
+bit 772 I 1 IO_M9
+bit 771 O 1 IO_M9 770 1 Z
+bit 770 C 1 *
+bit 769 I 1 IO_M1
+bit 768 O 1 IO_M1 767 1 Z
+bit 767 C 1 *
+bit 766 I 1 IO_M2
+bit 765 O 1 IO_M2 764 1 Z
+bit 764 C 1 *
+bit 763 I 1 IO_M3
+bit 762 O 1 IO_M3 761 1 Z
+bit 761 C 1 *
+bit 760 I 1 IO_M4
+bit 759 O 1 IO_M4 758 1 Z
+bit 758 C 1 *
+bit 757 I 1 IO_M5
+bit 756 O 1 IO_M5 755 1 Z
+bit 755 C 1 *
+bit 754 I 1 IO_M6
+bit 753 O 1 IO_M6 752 1 Z
+bit 752 C 1 *
+bit 751 I 1 IO_M7
+bit 750 O 1 IO_M7 749 1 Z
+bit 749 C 1 *
+bit 748 I 1 IO_M8
+bit 747 O 1 IO_M8 746 1 Z
+bit 746 C 1 *
+bit 745 I 1 IO_M10
+bit 744 O 1 IO_M10 743 1 Z
+bit 743 C 1 *
+bit 742 I 1 IO_M11
+bit 741 O 1 IO_M11 740 1 Z
+bit 740 C 1 *
+bit 739 I 1 IO_L1
+bit 738 O 1 IO_L1 737 1 Z
+bit 737 C 1 *
+bit 736 I 1 IO_L2
+bit 735 O 1 IO_L2 734 1 Z
+bit 734 C 1 *
+bit 733 O 1 *
+bit 732 O 1 *
+bit 731 O 1 *
+bit 730 O 1 *
+bit 729 O 1 *
+bit 728 O 1 *
+bit 727 I 1 IO_L6
+bit 726 O 1 IO_L6 725 1 Z
+bit 725 C 1 *
+bit 724 I 1 IO_L7
+bit 723 O 1 IO_L7 722 1 Z
+bit 722 C 1 *
+bit 721 I 1 IO_L9
+bit 720 O 1 IO_L9 719 1 Z
+bit 719 C 1 *
+bit 718 I 1 IO_L10
+bit 717 O 1 IO_L10 716 1 Z
+bit 716 C 1 *
+bit 715 I 1 IO_K1
+bit 714 O 1 IO_K1 713 1 Z
+bit 713 C 1 *
+bit 712 I 1 IO_K2
+bit 711 O 1 IO_K2 710 1 Z
+bit 710 C 1 *
+bit 709 I 1 IO_K3
+bit 708 O 1 IO_K3 707 1 Z
+bit 707 C 1 *
+bit 706 I 1 IO_K4
+bit 705 O 1 IO_K4 704 1 Z
+bit 704 C 1 *
+bit 703 I 1 IO_K5
+bit 702 O 1 IO_K5 701 1 Z
+bit 701 C 1 *
+bit 700 I 1 IO_K6
+bit 699 O 1 IO_K6 698 1 Z
+bit 698 C 1 *
+bit 697 I 1 IO_K7
+bit 696 O 1 IO_K7 695 1 Z
+bit 695 C 1 *
+bit 694 I 1 IO_K8
+bit 693 O 1 IO_K8 692 1 Z
+bit 692 C 1 *
+bit 691 I 1 IO_K9
+bit 690 O 1 IO_K9 689 1 Z
+bit 689 C 1 *
+bit 688 I 1 IO_J8
+bit 687 O 1 IO_J8 686 1 Z
+bit 686 C 1 *
+bit 685 I 1 IO_J2
+bit 684 O 1 IO_J2 683 1 Z
+bit 683 C 1 *
+bit 682 I 1 IO_J3
+bit 681 O 1 IO_J3 680 1 Z
+bit 680 C 1 *
+bit 679 I 1 IO_J4
+bit 678 O 1 IO_J4 677 1 Z
+bit 677 C 1 *
+bit 676 I 1 IO_H4
+bit 675 O 1 IO_H4 674 1 Z
+bit 674 C 1 *
+bit 673 I 1 IO_J6
+bit 672 O 1 IO_J6 671 1 Z
+bit 671 C 1 *
+bit 670 I 1 IO_J7
+bit 669 O 1 IO_J7 668 1 Z
+bit 668 C 1 *
+bit 667 I 1 IO_H1
+bit 666 O 1 IO_H1 665 1 Z
+bit 665 C 1 *
+bit 664 I 1 IO_H2
+bit 663 O 1 IO_H2 662 1 Z
+bit 662 C 1 *
+bit 661 I 1 IO_H5
+bit 660 O 1 IO_H5 659 1 Z
+bit 659 C 1 *
+bit 658 I 1 IO_H6
+bit 657 O 1 IO_H6 656 1 Z
+bit 656 C 1 *
+bit 655 I 1 IO_G1
+bit 654 O 1 IO_G1 653 1 Z
+bit 653 C 1 *
+bit 652 O 1 *
+bit 651 O 1 *
+bit 650 O 1 *
+bit 649 O 1 *
+bit 648 O 1 *
+bit 647 O 1 *
+bit 646 I 1 IO_G2
+bit 645 O 1 IO_G2 644 1 Z
+bit 644 C 1 *
+bit 643 I 1 IO_G3
+bit 642 O 1 IO_G3 641 1 Z
+bit 641 C 1 *
+bit 640 I 1 IO_G4
+bit 639 O 1 IO_G4 638 1 Z
+bit 638 C 1 *
+bit 637 I 1 IO_G5
+bit 636 O 1 IO_G5 635 1 Z
+bit 635 C 1 *
+bit 634 I 1 IO_G6
+bit 633 O 1 IO_G6 632 1 Z
+bit 632 C 1 *
+bit 631 I 1 IO_F1
+bit 630 O 1 IO_F1 629 1 Z
+bit 629 C 1 *
+bit 628 I 1 IO_F2
+bit 627 O 1 IO_F2 626 1 Z
+bit 626 C 1 *
+bit 625 I 1 IO_F3
+bit 624 O 1 IO_F3 623 1 Z
+bit 623 C 1 *
+bit 622 I 1 IO_F4
+bit 621 O 1 IO_F4 620 1 Z
+bit 620 C 1 *
+bit 619 I 1 IO_E2
+bit 618 O 1 IO_E2 617 1 Z
+bit 617 C 1 *
+bit 616 I 1 IO_E3
+bit 615 O 1 IO_E3 614 1 Z
+bit 614 C 1 *
+bit 613 I 1 IO_D1
+bit 612 O 1 IO_D1 611 1 Z
+bit 611 C 1 *
+bit 610 I 1 IO_D2
+bit 609 O 1 IO_D2 608 1 Z
+bit 608 C 1 *
+bit 607 I 1 IO_C1
+bit 606 O 1 IO_C1 605 1 Z
+bit 605 C 1 *
+bit 604 I 1 IO_C2
+bit 603 O 1 IO_C2 602 1 Z
+bit 602 C 1 *
+bit 601 O 1 *
+bit 600 I 1 HSWAP_EN_L11
+bit 599 I 1 IO_D5
+bit 598 O 1 IO_D5 597 1 Z
+bit 597 C 1 *
+bit 596 I 1 IO_B3
+bit 595 O 1 IO_B3 594 1 Z
+bit 594 C 1 *
+bit 593 I 1 IO_A3
+bit 592 O 1 IO_A3 591 1 Z
+bit 591 C 1 *
+bit 590 I 1 IO_B4
+bit 589 O 1 IO_B4 588 1 Z
+bit 588 C 1 *
+bit 587 I 1 IO_A4
+bit 586 O 1 IO_A4 585 1 Z
+bit 585 C 1 *
+bit 584 I 1 IO_F6
+bit 583 O 1 IO_F6 582 1 Z
+bit 582 C 1 *
+bit 581 I 1 IO_C5
+bit 580 O 1 IO_C5 579 1 Z
+bit 579 C 1 *
+bit 578 I 1 IO_B5
+bit 577 O 1 IO_B5 576 1 Z
+bit 576 C 1 *
+bit 575 I 1 IO_D6
+bit 574 O 1 IO_D6 573 1 Z
+bit 573 C 1 *
+bit 572 I 1 IO_C6
+bit 571 O 1 IO_C6 570 1 Z
+bit 570 C 1 *
+bit 569 I 1 IO_H8
+bit 568 O 1 IO_H8 567 1 Z
+bit 567 C 1 *
+bit 566 I 1 IO_B6
+bit 565 O 1 IO_B6 564 1 Z
+bit 564 C 1 *
+bit 563 I 1 IO_A6
+bit 562 O 1 IO_A6 561 1 Z
+bit 561 C 1 *
+bit 560 I 1 IO_F7
+bit 559 O 1 IO_F7 558 1 Z
+bit 558 C 1 *
+bit 557 I 1 IO_E7
+bit 556 O 1 IO_E7 555 1 Z
+bit 555 C 1 *
+bit 554 I 1 IO_F8
+bit 553 O 1 IO_F8 552 1 Z
+bit 552 C 1 *
+bit 551 I 1 IO_D7
+bit 550 O 1 IO_D7 549 1 Z
+bit 549 C 1 *
+bit 548 I 1 IO_C7
+bit 547 O 1 IO_C7 546 1 Z
+bit 546 C 1 *
+bit 545 I 1 IO_B7
+bit 544 O 1 IO_B7 543 1 Z
+bit 543 C 1 *
+bit 542 I 1 IO_A7
+bit 541 O 1 IO_A7 540 1 Z
+bit 540 C 1 *
+bit 539 I 1 IO_J9
+bit 538 O 1 IO_J9 537 1 Z
+bit 537 C 1 *
+bit 536 I 1 IO_E8
+bit 535 O 1 IO_E8 534 1 Z
+bit 534 C 1 *
+bit 533 I 1 IO_D8
+bit 532 O 1 IO_D8 531 1 Z
+bit 531 C 1 *
+bit 530 I 1 IO_B8
+bit 529 O 1 IO_B8 528 1 Z
+bit 528 C 1 *
+bit 527 I 1 IO_A8
+bit 526 O 1 IO_A8 525 1 Z
+bit 525 C 1 *
+bit 524 I 1 IO_H9
+bit 523 O 1 IO_H9 522 1 Z
+bit 522 C 1 *
+bit 521 I 1 IO_G9
+bit 520 O 1 IO_G9 519 1 Z
+bit 519 C 1 *
+bit 518 I 1 IO_F9
+bit 517 O 1 IO_F9 516 1 Z
+bit 516 C 1 *
+bit 515 I 1 IO_D9
+bit 514 O 1 IO_D9 513 1 Z
+bit 513 C 1 *
+bit 512 I 1 IO_C9
+bit 511 O 1 IO_C9 510 1 Z
+bit 510 C 1 *
+bit 509 I 1 IO_B9
+bit 508 O 1 IO_B9 507 1 Z
+bit 507 C 1 *
+bit 506 I 1 IO_J10
+bit 505 O 1 IO_J10 504 1 Z
+bit 504 C 1 *
+bit 503 I 1 IO_H10
+bit 502 O 1 IO_H10 501 1 Z
+bit 501 C 1 *
+bit 500 I 1 IO_G10
+bit 499 O 1 IO_G10 498 1 Z
+bit 498 C 1 *
+bit 497 I 1 IO_F10
+bit 496 O 1 IO_F10 495 1 Z
+bit 495 C 1 *
+bit 494 I 1 IO_E10
+bit 493 O 1 IO_E10 492 1 Z
+bit 492 C 1 *
+bit 491 I 1 IO_D10
+bit 490 O 1 IO_D10 489 1 Z
+bit 489 C 1 *
+bit 488 I 1 IO_C10
+bit 487 O 1 IO_C10 486 1 Z
+bit 486 C 1 *
+bit 485 I 1 IO_B10
+bit 484 O 1 IO_B10 483 1 Z
+bit 483 C 1 *
+bit 482 I 1 IO_A10
+bit 481 O 1 IO_A10 480 1 Z
+bit 480 C 1 *
+bit 479 I 1 IO_K11
+bit 478 O 1 IO_K11 477 1 Z
+bit 477 C 1 *
+bit 476 I 1 IO_G11
+bit 475 O 1 IO_G11 474 1 Z
+bit 474 C 1 *
+bit 473 I 1 IO_F11
+bit 472 O 1 IO_F11 471 1 Z
+bit 471 C 1 *
+bit 470 I 1 IO_B11
+bit 469 O 1 IO_B11 468 1 Z
+bit 468 C 1 *
+bit 467 I 1 IO_A11
+bit 466 O 1 IO_A11 465 1 Z
+bit 465 C 1 *
+bit 464 I 1 IO_J11
+bit 463 O 1 IO_J11 462 1 Z
+bit 462 C 1 *
+bit 461 I 1 IO_L12
+bit 460 O 1 IO_L12 459 1 Z
+bit 459 C 1 *
+bit 458 I 1 IO_K12
+bit 457 O 1 IO_K12 456 1 Z
+bit 456 C 1 *
+bit 455 I 1 IO_J12
+bit 454 O 1 IO_J12 453 1 Z
+bit 453 C 1 *
+bit 452 I 1 IO_H12
+bit 451 O 1 IO_H12 450 1 Z
+bit 450 C 1 *
+bit 449 I 1 IO_G12
+bit 448 O 1 IO_G12 447 1 Z
+bit 447 C 1 *
+bit 446 I 1 IO_F12
+bit 445 O 1 IO_F12 444 1 Z
+bit 444 C 1 *
+bit 443 I 1 IO_E12
+bit 442 O 1 IO_E12 441 1 Z
+bit 441 C 1 *
+bit 440 I 1 IO_D12
+bit 439 O 1 IO_D12 438 1 Z
+bit 438 C 1 *
+bit 437 I 1 IO_C12
+bit 436 O 1 IO_C12 435 1 Z
+bit 435 C 1 *
+bit 434 I 1 IO_L13
+bit 433 O 1 IO_L13 432 1 Z
+bit 432 C 1 *
+bit 431 I 1 IO_B12
+bit 430 O 1 IO_B12 429 1 Z
+bit 429 C 1 *
+bit 428 I 1 IO_A12
+bit 427 O 1 IO_A12 426 1 Z
+bit 426 C 1 *
+bit 425 I 1 IO_H13
+bit 424 O 1 IO_H13 423 1 Z
+bit 423 C 1 *
+bit 422 I 1 IO_G13
+bit 421 O 1 IO_G13 420 1 Z
+bit 420 C 1 *
+bit 419 I 1 IO_K13
+bit 418 O 1 IO_K13 417 1 Z
+bit 417 C 1 *
+bit 416 I 1 IO_D13
+bit 415 O 1 IO_D13 414 1 Z
+bit 414 C 1 *
+bit 413 I 1 IO_C13
+bit 412 O 1 IO_C13 411 1 Z
+bit 411 C 1 *
+bit 410 I 1 IO_L14
+bit 409 O 1 IO_L14 408 1 Z
+bit 408 C 1 *
+bit 407 I 1 IO_K14
+bit 406 O 1 IO_K14 405 1 Z
+bit 405 C 1 *
+bit 404 I 1 IO_J14
+bit 403 O 1 IO_J14 402 1 Z
+bit 402 C 1 *
+bit 401 I 1 IO_H14
+bit 400 O 1 IO_H14 399 1 Z
+bit 399 C 1 *
+bit 398 I 1 IO_G14
+bit 397 O 1 IO_G14 396 1 Z
+bit 396 C 1 *
+bit 395 I 1 IO_F14
+bit 394 O 1 IO_F14 393 1 Z
+bit 393 C 1 *
+bit 392 I 1 IO_E14
+bit 391 O 1 IO_E14 390 1 Z
+bit 390 C 1 *
+bit 389 I 1 IO_L15
+bit 388 O 1 IO_L15 387 1 Z
+bit 387 C 1 *
+bit 386 I 1 IO_D14
+bit 385 O 1 IO_D14 384 1 Z
+bit 384 C 1 *
+bit 383 I 1 IO_C14
+bit 382 O 1 IO_C14 381 1 Z
+bit 381 C 1 *
+bit 380 I 1 IO_B14
+bit 379 O 1 IO_B14 378 1 Z
+bit 378 C 1 *
+bit 377 I 1 IO_A14
+bit 376 O 1 IO_A14 375 1 Z
+bit 375 C 1 *
+bit 374 I 1 IO_L16
+bit 373 O 1 IO_L16 372 1 Z
+bit 372 C 1 *
+bit 371 I 1 IO_K15
+bit 370 O 1 IO_K15 369 1 Z
+bit 369 C 1 *
+bit 368 I 1 IO_J15
+bit 367 O 1 IO_J15 366 1 Z
+bit 366 C 1 *
+bit 365 I 1 IO_G15
+bit 364 O 1 IO_G15 363 1 Z
+bit 363 C 1 *
+bit 362 I 1 IO_F15
+bit 361 O 1 IO_F15 360 1 Z
+bit 360 C 1 *
+bit 359 I 1 IO_K16
+bit 358 O 1 IO_K16 357 1 Z
+bit 357 C 1 *
+bit 356 I 1 IO_D15
+bit 355 O 1 IO_D15 354 1 Z
+bit 354 C 1 *
+bit 353 I 1 IO_C15
+bit 352 O 1 IO_C15 351 1 Z
+bit 351 C 1 *
+bit 350 I 1 IO_B15
+bit 349 O 1 IO_B15 348 1 Z
+bit 348 C 1 *
+bit 347 I 1 IO_A15
+bit 346 O 1 IO_A15 345 1 Z
+bit 345 C 1 *
+bit 344 I 1 IO_L17
+bit 343 O 1 IO_L17 342 1 Z
+bit 342 C 1 *
+bit 341 I 1 IO_G16
+bit 340 O 1 IO_G16 339 1 Z
+bit 339 C 1 *
+bit 338 I 1 IO_F16
+bit 337 O 1 IO_F16 336 1 Z
+bit 336 C 1 *
+bit 335 I 1 IO_C16
+bit 334 O 1 IO_C16 333 1 Z
+bit 333 C 1 *
+bit 332 I 1 IO_B16
+bit 331 O 1 IO_B16 330 1 Z
+bit 330 C 1 *
+bit 329 I 1 IO_K17
+bit 328 O 1 IO_K17 327 1 Z
+bit 327 C 1 *
+bit 326 I 1 IO_J17
+bit 325 O 1 IO_J17 324 1 Z
+bit 324 C 1 *
+bit 323 I 1 IO_H17
+bit 322 O 1 IO_H17 321 1 Z
+bit 321 C 1 *
+bit 320 I 1 IO_G17
+bit 319 O 1 IO_G17 318 1 Z
+bit 318 C 1 *
+bit 317 I 1 IO_F17
+bit 316 O 1 IO_F17 315 1 Z
+bit 315 C 1 *
+bit 314 I 1 IO_E17
+bit 313 O 1 IO_E17 312 1 Z
+bit 312 C 1 *
+bit 311 I 1 IO_D17
+bit 310 O 1 IO_D17 309 1 Z
+bit 309 C 1 *
+bit 308 I 1 IO_C17
+bit 307 O 1 IO_C17 306 1 Z
+bit 306 C 1 *
+bit 305 I 1 IO_B17
+bit 304 O 1 IO_B17 303 1 Z
+bit 303 C 1 *
+bit 302 I 1 IO_A17
+bit 301 O 1 IO_A17 300 1 Z
+bit 300 C 1 *
+bit 299 I 1 IO_A18
+bit 298 O 1 IO_A18 297 1 Z
+bit 297 C 1 *
+bit 296 I 1 IO_B18
+bit 295 O 1 IO_B18 294 1 Z
+bit 294 C 1 *
+bit 293 I 1 IO_C18
+bit 292 O 1 IO_C18 291 1 Z
+bit 291 C 1 *
+bit 290 I 1 IO_D18
+bit 289 O 1 IO_D18 288 1 Z
+bit 288 C 1 *
+bit 287 I 1 IO_E18
+bit 286 O 1 IO_E18 285 1 Z
+bit 285 C 1 *
+bit 284 I 1 IO_F18
+bit 283 O 1 IO_F18 282 1 Z
+bit 282 C 1 *
+bit 281 I 1 IO_G18
+bit 280 O 1 IO_G18 279 1 Z
+bit 279 C 1 *
+bit 278 I 1 IO_H18
+bit 277 O 1 IO_H18 276 1 Z
+bit 276 C 1 *
+bit 275 I 1 IO_J18
+bit 274 O 1 IO_J18 273 1 Z
+bit 273 C 1 *
+bit 272 I 1 IO_K18
+bit 271 O 1 IO_K18 270 1 Z
+bit 270 C 1 *
+bit 269 I 1 IO_L18
+bit 268 O 1 IO_L18 267 1 Z
+bit 267 C 1 *
+bit 266 I 1 IO_B19
+bit 265 O 1 IO_B19 264 1 Z
+bit 264 C 1 *
+bit 263 I 1 IO_C19
+bit 262 O 1 IO_C19 261 1 Z
+bit 261 C 1 *
+bit 260 I 1 IO_F19
+bit 259 O 1 IO_F19 258 1 Z
+bit 258 C 1 *
+bit 257 I 1 IO_G19
+bit 256 O 1 IO_G19 255 1 Z
+bit 255 C 1 *
+bit 254 I 1 IO_K19
+bit 253 O 1 IO_K19 252 1 Z
+bit 252 C 1 *
+bit 251 I 1 IO_A20
+bit 250 O 1 IO_A20 249 1 Z
+bit 249 C 1 *
+bit 248 I 1 IO_B20
+bit 247 O 1 IO_B20 246 1 Z
+bit 246 C 1 *
+bit 245 I 1 IO_C20
+bit 244 O 1 IO_C20 243 1 Z
+bit 243 C 1 *
+bit 242 I 1 IO_D20
+bit 241 O 1 IO_D20 240 1 Z
+bit 240 C 1 *
+bit 239 I 1 IO_L19
+bit 238 O 1 IO_L19 237 1 Z
+bit 237 C 1 *
+bit 236 I 1 IO_F20
+bit 235 O 1 IO_F20 234 1 Z
+bit 234 C 1 *
+bit 233 I 1 IO_G20
+bit 232 O 1 IO_G20 231 1 Z
+bit 231 C 1 *
+bit 230 I 1 IO_J20
+bit 229 O 1 IO_J20 228 1 Z
+bit 228 C 1 *
+bit 227 I 1 IO_K20
+bit 226 O 1 IO_K20 225 1 Z
+bit 225 C 1 *
+bit 224 I 1 IO_L20
+bit 223 O 1 IO_L20 222 1 Z
+bit 222 C 1 *
+bit 221 I 1 IO_A21
+bit 220 O 1 IO_A21 219 1 Z
+bit 219 C 1 *
+bit 218 I 1 IO_B21
+bit 217 O 1 IO_B21 216 1 Z
+bit 216 C 1 *
+bit 215 I 1 IO_C21
+bit 214 O 1 IO_C21 213 1 Z
+bit 213 C 1 *
+bit 212 I 1 IO_D21
+bit 211 O 1 IO_D21 210 1 Z
+bit 210 C 1 *
+bit 209 I 1 IO_E21
+bit 208 O 1 IO_E21 207 1 Z
+bit 207 C 1 *
+bit 206 I 1 IO_F21
+bit 205 O 1 IO_F21 204 1 Z
+bit 204 C 1 *
+bit 203 I 1 IO_G21
+bit 202 O 1 IO_G21 201 1 Z
+bit 201 C 1 *
+bit 200 I 1 IO_H21
+bit 199 O 1 IO_H21 198 1 Z
+bit 198 C 1 *
+bit 197 I 1 IO_J21
+bit 196 O 1 IO_J21 195 1 Z
+bit 195 C 1 *
+bit 194 I 1 IO_K21
+bit 193 O 1 IO_K21 192 1 Z
+bit 192 C 1 *
+bit 191 I 1 IO_C22
+bit 190 O 1 IO_C22 189 1 Z
+bit 189 C 1 *
+bit 188 I 1 IO_D22
+bit 187 O 1 IO_D22 186 1 Z
+bit 186 C 1 *
+bit 185 I 1 IO_G22
+bit 184 O 1 IO_G22 183 1 Z
+bit 183 C 1 *
+bit 182 I 1 IO_H22
+bit 181 O 1 IO_H22 180 1 Z
+bit 180 C 1 *
+bit 179 I 1 IO_L21
+bit 178 O 1 IO_L21 177 1 Z
+bit 177 C 1 *
+bit 176 I 1 IO_K22
+bit 175 O 1 IO_K22 174 1 Z
+bit 174 C 1 *
+bit 173 I 1 IO_L22
+bit 172 O 1 IO_L22 171 1 Z
+bit 171 C 1 *
+bit 170 I 1 IO_A23
+bit 169 O 1 IO_A23 168 1 Z
+bit 168 C 1 *
+bit 167 I 1 IO_B23
+bit 166 O 1 IO_B23 165 1 Z
+bit 165 C 1 *
+bit 164 I 1 IO_C23
+bit 163 O 1 IO_C23 162 1 Z
+bit 162 C 1 *
+bit 161 I 1 IO_D23
+bit 160 O 1 IO_D23 159 1 Z
+bit 159 C 1 *
+bit 158 I 1 IO_E23
+bit 157 O 1 IO_E23 156 1 Z
+bit 156 C 1 *
+bit 155 I 1 IO_F23
+bit 154 O 1 IO_F23 153 1 Z
+bit 153 C 1 *
+bit 152 I 1 IO_G23
+bit 151 O 1 IO_G23 150 1 Z
+bit 150 C 1 *
+bit 149 I 1 IO_H23
+bit 148 O 1 IO_H23 147 1 Z
+bit 147 C 1 *
+bit 146 I 1 IO_J23
+bit 145 O 1 IO_J23 144 1 Z
+bit 144 C 1 *
+bit 143 I 1 IO_K23
+bit 142 O 1 IO_K23 141 1 Z
+bit 141 C 1 *
+bit 140 I 1 IO_A24
+bit 139 O 1 IO_A24 138 1 Z
+bit 138 C 1 *
+bit 137 I 1 IO_B24
+bit 136 O 1 IO_B24 135 1 Z
+bit 135 C 1 *
+bit 134 I 1 IO_L23
+bit 133 O 1 IO_L23 132 1 Z
+bit 132 C 1 *
+bit 131 I 1 IO_F24
+bit 130 O 1 IO_F24 129 1 Z
+bit 129 C 1 *
+bit 128 I 1 IO_G24
+bit 127 O 1 IO_G24 126 1 Z
+bit 126 C 1 *
+bit 125 I 1 IO_J24
+bit 124 O 1 IO_J24 123 1 Z
+bit 123 C 1 *
+bit 122 I 1 IO_K24
+bit 121 O 1 IO_K24 120 1 Z
+bit 120 C 1 *
+bit 119 I 1 IO_L24
+bit 118 O 1 IO_L24 117 1 Z
+bit 117 C 1 *
+bit 116 I 1 IO_A25
+bit 115 O 1 IO_A25 114 1 Z
+bit 114 C 1 *
+bit 113 I 1 IO_B25
+bit 112 O 1 IO_B25 111 1 Z
+bit 111 C 1 *
+bit 110 I 1 IO_C25
+bit 109 O 1 IO_C25 108 1 Z
+bit 108 C 1 *
+bit 107 I 1 IO_D25
+bit 106 O 1 IO_D25 105 1 Z
+bit 105 C 1 *
+bit 104 I 1 IO_E25
+bit 103 O 1 IO_E25 102 1 Z
+bit 102 C 1 *
+bit 101 I 1 IO_F25
+bit 100 O 1 IO_F25 99 1 Z
+bit 99 C 1 *
+bit 98 I 1 IO_G25
+bit 97 O 1 IO_G25 96 1 Z
+bit 96 C 1 *
+bit 95 I 1 IO_H25
+bit 94 O 1 IO_H25 93 1 Z
+bit 93 C 1 *
+bit 92 I 1 IO_J25
+bit 91 O 1 IO_J25 90 1 Z
+bit 90 C 1 *
+bit 89 I 1 IO_B26
+bit 88 O 1 IO_B26 87 1 Z
+bit 87 C 1 *
+bit 86 I 1 IO_C26
+bit 85 O 1 IO_C26 84 1 Z
+bit 84 C 1 *
+bit 83 I 1 IO_D26
+bit 82 O 1 IO_D26 81 1 Z
+bit 81 C 1 *
+bit 80 I 1 IO_F26
+bit 79 O 1 IO_F26 78 1 Z
+bit 78 C 1 *
+bit 77 I 1 IO_G26
+bit 76 O 1 IO_G26 75 1 Z
+bit 75 C 1 *
+bit 74 I 1 IO_H26
+bit 73 O 1 IO_H26 72 1 Z
+bit 72 C 1 *
+bit 71 I 1 IO_A27
+bit 70 O 1 IO_A27 69 1 Z
+bit 69 C 1 *
+bit 68 I 1 IO_B27
+bit 67 O 1 IO_B27 66 1 Z
+bit 66 C 1 *
+bit 65 I 1 IO_D27
+bit 64 O 1 IO_D27 63 1 Z
+bit 63 C 1 *
+bit 62 I 1 IO_E27
+bit 61 O 1 IO_E27 60 1 Z
+bit 60 C 1 *
+bit 59 I 1 IO_J26
+bit 58 O 1 IO_J26 57 1 Z
+bit 57 C 1 *
+bit 56 I 1 IO_A28
+bit 55 O 1 IO_A28 54 1 Z
+bit 54 C 1 *
+bit 53 I 1 IO_B28
+bit 52 O 1 IO_B28 51 1 Z
+bit 51 C 1 *
+bit 50 I 1 IO_C28
+bit 49 O 1 IO_C28 48 1 Z
+bit 48 C 1 *
+bit 47 I 1 IO_D28
+bit 46 O 1 IO_D28 45 1 Z
+bit 45 C 1 *
+bit 44 I 1 IO_F27
+bit 43 O 1 IO_F27 42 1 Z
+bit 42 C 1 *
+bit 41 I 1 IO_E28
+bit 40 O 1 IO_E28 39 1 Z
+bit 39 C 1 *
+bit 38 I 1 IO_F28
+bit 37 O 1 IO_F28 36 1 Z
+bit 36 C 1 *
+bit 35 I 1 IO_A29
+bit 34 O 1 IO_A29 33 1 Z
+bit 33 C 1 *
+bit 32 I 1 IO_B29
+bit 31 O 1 IO_B29 30 1 Z
+bit 30 C 1 *
+bit 29 I 1 IO_F29
+bit 28 O 1 IO_F29 27 1 Z
+bit 27 C 1 *
+bit 26 I 1 IO_C29
+bit 25 O 1 IO_C29 24 1 Z
+bit 24 C 1 *
+bit 23 I 1 IO_D29
+bit 22 O 1 IO_D29 21 1 Z
+bit 21 C 1 *
+bit 20 I 1 IO_B30
+bit 19 O 1 IO_B30 18 1 Z
+bit 18 C 1 *
+bit 17 I 1 IO_C30
+bit 16 O 1 IO_C30 15 1 Z
+bit 15 C 1 *
+bit 14 I 1 IO_D30
+bit 13 O 1 IO_D30 12 1 Z
+bit 12 C 1 *
+bit 11 I 1 IO_A31
+bit 10 O 1 IO_A31 9 1 Z
+bit 9 C 1 *
+bit 8 I 1 IO_B31
+bit 7 O 1 IO_B31 6 1 Z
+bit 6 C 1 *
+bit 5 I 1 IO_A32
+bit 4 O 1 IO_A32 3 1 Z
+bit 3 C 1 *
+bit 2 I 1 IO_B32
+bit 1 O 1 IO_B32 0 1 Z
+bit 0 C 1 *
--- /dev/null
+signal GND1
+signal GND2
+signal GND3
+signal GND4
+signal GND5
+signal GND6
+signal GND7
+signal GND8
+signal GND9
+signal GND10
+signal GND11
+signal GND12
+signal GND13
+signal GND14
+signal GND15
+signal GND16
+signal GND17
+signal GND18
+signal GND19
+signal GND20
+signal GND21
+signal GND22
+signal GND23
+signal GND24
+signal GND25
+signal GND26
+signal GND27
+signal GND28
+signal GND29
+signal GND30
+signal GND31
+signal GND32
+signal GND33
+signal GND34
+signal GND35
+signal GND36
+signal GND37
+signal GND38
+signal GND39
+signal GND40
+signal GND41
+signal GND42
+signal GND43
+signal GND44
+signal GND45
+signal GND46
+signal GND47
+signal GND48
+signal GND49
+signal GND50
+signal GND51
+signal GND52
+signal GND53
+signal GND54
+signal GND55
+signal GND56
+signal GND57
+signal GND58
+signal GND59
+signal GND60
+signal GND61
+signal GND62
+signal GND63
+signal GND64
+signal GND65
+signal GND66
+signal GND67
+signal GND68
+signal GND69
+signal GND70
+signal GND71
+signal GND72
+signal GND73
+signal GND74
+signal GND75
+signal GND76
+signal GND77
+signal GND78
+signal GND79
+signal GND80
+signal GND81
+signal GND82
+signal GND83
+signal GND84
+signal GND85
+signal GND86
+signal GND87
+signal GND88
+signal GND89
+signal GND90
+signal GND91
+signal GND92
+signal GND93
+signal GND94
+signal GND95
+signal GND96
+signal GND97
+signal GND98
+signal GND99
+signal GND100
+signal GND101
+signal GND102
+signal GND103
+signal GND104
+signal GND105
+signal GND106
+signal GND107
+signal GND108
+signal GND109
+signal GND110
+signal GND111
+signal GND112
+signal GND113
+signal GND114
+signal GND115
+signal GND116
+signal GND117
+signal GND118
+signal GND119
+signal GND120
+signal CCLK_AH28
+signal DONE_AJ28
+signal HSWAP_EN_A3
+signal M0_AJ3
+signal M1_AH3
+signal M2_AK3
+signal PROG_B
+signal TCK
+signal TDI
+signal TDO
+signal TMS
+signal VCCAUX1
+signal VCCAUX2
+signal VCCAUX3
+signal VCCAUX4
+signal VCCAUX5
+signal VCCAUX6
+signal VCCAUX7
+signal VCCAUX8
+signal VCCAUX9
+signal VCCAUX10
+signal VCCAUX11
+signal VCCAUX12
+signal VCCAUX13
+signal VCCAUX14
+signal VCCAUX15
+signal VCCAUX16
+signal VCCAUX17
+signal VCCAUX18
+signal VCCAUX19
+signal VCCAUX20
+signal VCCAUX21
+signal VCCAUX22
+signal VCCAUX23
+signal VCCAUX24
+signal VCCINT1
+signal VCCINT2
+signal VCCINT3
+signal VCCINT4
+signal VCCINT5
+signal VCCINT6
+signal VCCINT7
+signal VCCINT8
+signal VCCINT9
+signal VCCINT10
+signal VCCINT11
+signal VCCINT12
+signal VCCINT13
+signal VCCINT14
+signal VCCINT15
+signal VCCINT16
+signal VCCINT17
+signal VCCINT18
+signal VCCINT19
+signal VCCINT20
+signal VCCINT21
+signal VCCINT22
+signal VCCINT23
+signal VCCINT24
+signal VCCINT25
+signal VCCINT26
+signal VCCINT27
+signal VCCINT28
+signal VCCINT29
+signal VCCINT30
+signal VCCINT31
+signal VCCINT32
+signal VCCO01
+signal VCCO02
+signal VCCO03
+signal VCCO04
+signal VCCO05
+signal VCCO06
+signal VCCO07
+signal VCCO08
+signal VCCO09
+signal VCCO010
+signal VCCO11
+signal VCCO12
+signal VCCO13
+signal VCCO14
+signal VCCO15
+signal VCCO16
+signal VCCO17
+signal VCCO18
+signal VCCO19
+signal VCCO110
+signal VCCO21
+signal VCCO22
+signal VCCO23
+signal VCCO24
+signal VCCO25
+signal VCCO26
+signal VCCO27
+signal VCCO28
+signal VCCO29
+signal VCCO210
+signal VCCO31
+signal VCCO32
+signal VCCO33
+signal VCCO34
+signal VCCO35
+signal VCCO36
+signal VCCO37
+signal VCCO38
+signal VCCO39
+signal VCCO310
+signal VCCO41
+signal VCCO42
+signal VCCO43
+signal VCCO44
+signal VCCO45
+signal VCCO46
+signal VCCO47
+signal VCCO48
+signal VCCO49
+signal VCCO410
+signal VCCO51
+signal VCCO52
+signal VCCO53
+signal VCCO54
+signal VCCO55
+signal VCCO56
+signal VCCO57
+signal VCCO58
+signal VCCO59
+signal VCCO510
+signal VCCO61
+signal VCCO62
+signal VCCO63
+signal VCCO64
+signal VCCO65
+signal VCCO66
+signal VCCO67
+signal VCCO68
+signal VCCO69
+signal VCCO610
+signal VCCO71
+signal VCCO72
+signal VCCO73
+signal VCCO74
+signal VCCO75
+signal VCCO76
+signal VCCO77
+signal VCCO78
+signal VCCO79
+signal VCCO710
+signal IO_A4
+signal IO_A5
+signal IO_A7
+signal IO_A8
+signal IO_A9
+signal IO_A11
+signal IO_A12
+signal IO_A13
+signal IO_A15
+signal IO_A16
+signal IO_A18
+signal IO_A19
+signal IO_A20
+signal IO_A22
+signal IO_A23
+signal IO_A24
+signal IO_A26
+signal IO_A27
+signal IO_B4
+signal IO_B5
+signal IO_B6
+signal IO_B7
+signal IO_B8
+signal IO_B9
+signal IO_B10
+signal IO_B11
+signal IO_B12
+signal IO_B13
+signal IO_B14
+signal IO_B15
+signal IO_B16
+signal IO_B17
+signal IO_B18
+signal IO_B19
+signal IO_B20
+signal IO_B21
+signal IO_B22
+signal IO_B23
+signal IO_B24
+signal IO_B25
+signal IO_B26
+signal IO_B27
+signal IO_C1
+signal IO_C2
+signal IO_C4
+signal IO_C6
+signal IO_C7
+signal IO_C8
+signal IO_C10
+signal IO_C11
+signal IO_C12
+signal IO_C14
+signal IO_C15
+signal IO_C16
+signal IO_C17
+signal IO_C19
+signal IO_C20
+signal IO_C21
+signal IO_C23
+signal IO_C24
+signal IO_C25
+signal IO_C27
+signal IO_C29
+signal IO_C30
+signal IO_D1
+signal IO_D2
+signal IO_D3
+signal IO_D4
+signal IO_D5
+signal IO_D7
+signal IO_D8
+signal IO_D9
+signal IO_D11
+signal IO_D12
+signal IO_D13
+signal IO_D15
+signal IO_D16
+signal IO_D18
+signal IO_D19
+signal IO_D20
+signal IO_D22
+signal IO_D23
+signal IO_D24
+signal IO_D26
+signal IO_D27
+signal IO_D28
+signal IO_D29
+signal IO_D30
+signal IO_E1
+signal IO_E2
+signal IO_E4
+signal IO_E6
+signal IO_E8
+signal IO_E9
+signal IO_E11
+signal IO_E12
+signal IO_E13
+signal IO_E15
+signal IO_E16
+signal IO_E18
+signal IO_E19
+signal IO_E20
+signal IO_E22
+signal IO_E23
+signal IO_E25
+signal IO_E27
+signal IO_E29
+signal IO_E30
+signal IO_F2
+signal IO_F3
+signal IO_F5
+signal IO_F6
+signal IO_F7
+signal IO_F8
+signal IO_F9
+signal IO_F10
+signal IO_F11
+signal IO_F12
+signal IO_F13
+signal IO_F14
+signal IO_F15
+signal IO_F16
+signal IO_F17
+signal IO_F18
+signal IO_F19
+signal IO_F20
+signal IO_F21
+signal IO_F22
+signal IO_F23
+signal IO_F24
+signal IO_F25
+signal IO_F26
+signal IO_F28
+signal IO_F29
+signal IO_G1
+signal IO_G2
+signal IO_G3
+signal IO_G4
+signal IO_G6
+signal IO_G7
+signal IO_G8
+signal IO_G10
+signal IO_G11
+signal IO_G12
+signal IO_G14
+signal IO_G15
+signal IO_G16
+signal IO_G17
+signal IO_G19
+signal IO_G20
+signal IO_G21
+signal IO_G23
+signal IO_G24
+signal IO_G25
+signal IO_G27
+signal IO_G28
+signal IO_G29
+signal IO_G30
+signal IO_H1
+signal IO_H2
+signal IO_H3
+signal IO_H4
+signal IO_H5
+signal IO_H6
+signal IO_H7
+signal IO_H8
+signal IO_H9
+signal IO_H11
+signal IO_H12
+signal IO_H13
+signal IO_H15
+signal IO_H16
+signal IO_H18
+signal IO_H19
+signal IO_H20
+signal IO_H22
+signal IO_H23
+signal IO_H24
+signal IO_H25
+signal IO_H26
+signal IO_H27
+signal IO_H28
+signal IO_H29
+signal IO_H30
+signal IO_J1
+signal IO_J2
+signal IO_J4
+signal IO_J5
+signal IO_J6
+signal IO_J8
+signal IO_J9
+signal IO_J10
+signal IO_J12
+signal IO_J13
+signal IO_J14
+signal IO_J15
+signal IO_J16
+signal IO_J17
+signal IO_J18
+signal IO_J19
+signal IO_J21
+signal IO_J22
+signal IO_J23
+signal IO_J25
+signal IO_J26
+signal IO_J27
+signal IO_J29
+signal IO_J30
+signal IO_K2
+signal IO_K3
+signal IO_K6
+signal IO_K7
+signal IO_K9
+signal IO_K10
+signal IO_K11
+signal IO_K12
+signal IO_K13
+signal IO_K14
+signal IO_K15
+signal IO_K16
+signal IO_K17
+signal IO_K18
+signal IO_K19
+signal IO_K20
+signal IO_K21
+signal IO_K22
+signal IO_K24
+signal IO_K25
+signal IO_K28
+signal IO_K29
+signal IO_L1
+signal IO_L2
+signal IO_L3
+signal IO_L4
+signal IO_L5
+signal IO_L6
+signal IO_L7
+signal IO_L8
+signal IO_L10
+signal IO_L21
+signal IO_L23
+signal IO_L24
+signal IO_L25
+signal IO_L26
+signal IO_L27
+signal IO_L28
+signal IO_L29
+signal IO_L30
+signal IO_M1
+signal IO_M2
+signal IO_M3
+signal IO_M4
+signal IO_M5
+signal IO_M6
+signal IO_M7
+signal IO_M8
+signal IO_M9
+signal IO_M10
+signal IO_M21
+signal IO_M22
+signal IO_M23
+signal IO_M24
+signal IO_M25
+signal IO_M26
+signal IO_M27
+signal IO_M28
+signal IO_M29
+signal IO_M30
+signal IO_N1
+signal IO_N2
+signal IO_N4
+signal IO_N5
+signal IO_N6
+signal IO_N8
+signal IO_N9
+signal IO_N10
+signal IO_N21
+signal IO_N22
+signal IO_N23
+signal IO_N25
+signal IO_N26
+signal IO_N27
+signal IO_N29
+signal IO_N30
+signal IO_P2
+signal IO_P3
+signal IO_P6
+signal IO_P7
+signal IO_P9
+signal IO_P10
+signal IO_P21
+signal IO_P22
+signal IO_P24
+signal IO_P25
+signal IO_P28
+signal IO_P29
+signal IO_R1
+signal IO_R2
+signal IO_R3
+signal IO_R4
+signal IO_R5
+signal IO_R6
+signal IO_R7
+signal IO_R8
+signal IO_R9
+signal IO_R10
+signal IO_R21
+signal IO_R22
+signal IO_R23
+signal IO_R24
+signal IO_R25
+signal IO_R26
+signal IO_R27
+signal IO_R28
+signal IO_R29
+signal IO_R30
+signal IO_T1
+signal IO_T2
+signal IO_T3
+signal IO_T4
+signal IO_T5
+signal IO_T6
+signal IO_T7
+signal IO_T8
+signal IO_T9
+signal IO_T10
+signal IO_T21
+signal IO_T22
+signal IO_T23
+signal IO_T24
+signal IO_T25
+signal IO_T26
+signal IO_T27
+signal IO_T28
+signal IO_T29
+signal IO_T30
+signal IO_U2
+signal IO_U3
+signal IO_U6
+signal IO_U7
+signal IO_U9
+signal IO_U10
+signal IO_U21
+signal IO_U22
+signal IO_U24
+signal IO_U25
+signal IO_U28
+signal IO_U29
+signal IO_V1
+signal IO_V2
+signal IO_V4
+signal IO_V5
+signal IO_V6
+signal IO_V8
+signal IO_V9
+signal IO_V10
+signal IO_V21
+signal IO_V22
+signal IO_V23
+signal IO_V25
+signal IO_V26
+signal IO_V27
+signal IO_V29
+signal IO_V30
+signal IO_W1
+signal IO_W2
+signal IO_W3
+signal IO_W4
+signal IO_W5
+signal IO_W6
+signal IO_W7
+signal IO_W8
+signal IO_W9
+signal IO_W10
+signal IO_W21
+signal IO_W22
+signal IO_W23
+signal IO_W24
+signal IO_W25
+signal IO_W26
+signal IO_W27
+signal IO_W28
+signal IO_W29
+signal IO_W30
+signal IO_Y1
+signal IO_Y2
+signal IO_Y3
+signal IO_Y4
+signal IO_Y5
+signal IO_Y6
+signal IO_Y7
+signal IO_Y8
+signal IO_Y10
+signal IO_Y21
+signal IO_Y23
+signal IO_Y24
+signal IO_Y25
+signal IO_Y26
+signal IO_Y27
+signal IO_Y28
+signal IO_Y29
+signal IO_Y30
+signal IO_AA2
+signal IO_AA3
+signal IO_AA6
+signal IO_AA7
+signal IO_AA9
+signal IO_AA10
+signal IO_AA11
+signal IO_AA12
+signal IO_AA13
+signal IO_AA14
+signal IO_AA15
+signal IO_AA16
+signal IO_AA17
+signal IO_AA18
+signal IO_AA19
+signal IO_AA20
+signal IO_AA21
+signal IO_AA22
+signal IO_AA24
+signal IO_AA25
+signal IO_AA28
+signal IO_AA29
+signal IO_AB1
+signal IO_AB2
+signal IO_AB4
+signal IO_AB5
+signal IO_AB6
+signal IO_AB8
+signal IO_AB9
+signal IO_AB10
+signal IO_AB12
+signal IO_AB13
+signal IO_AB14
+signal IO_AB15
+signal IO_AB16
+signal IO_AB17
+signal IO_AB18
+signal IO_AB19
+signal IO_AB21
+signal IO_AB22
+signal IO_AB23
+signal IO_AB25
+signal IO_AB26
+signal IO_AB27
+signal IO_AB29
+signal IO_AB30
+signal IO_AC1
+signal IO_AC2
+signal IO_AC3
+signal IO_AC4
+signal IO_AC5
+signal IO_AC6
+signal IO_AC7
+signal IO_AC8
+signal IO_AC9
+signal IO_AC11
+signal IO_AC12
+signal IO_AC13
+signal IO_AC15
+signal IO_AC16
+signal IO_AC18
+signal IO_AC19
+signal IO_AC20
+signal IO_AC22
+signal IO_AC23
+signal IO_AC24
+signal IO_AC25
+signal IO_AC26
+signal IO_AC27
+signal IO_AC28
+signal IO_AC29
+signal IO_AC30
+signal IO_AD1
+signal IO_AD2
+signal IO_AD3
+signal IO_AD4
+signal IO_AD6
+signal IO_AD7
+signal IO_AD8
+signal IO_AD10
+signal IO_AD11
+signal IO_AD12
+signal IO_AD14
+signal IO_AD15
+signal IO_AD16
+signal IO_AD17
+signal IO_AD19
+signal IO_AD20
+signal IO_AD21
+signal IO_AD23
+signal IO_AD24
+signal IO_AD25
+signal IO_AD27
+signal IO_AD28
+signal IO_AD29
+signal IO_AD30
+signal IO_AE2
+signal IO_AE3
+signal IO_AE5
+signal IO_AE6
+signal IO_AE7
+signal IO_AE8
+signal IO_AE9
+signal IO_AE10
+signal IO_AE11
+signal IO_AE12
+signal IO_AE13
+signal IO_AE14
+signal IO_AE15
+signal IO_AE16
+signal IO_AE17
+signal IO_AE18
+signal IO_AE19
+signal IO_AE20
+signal IO_AE21
+signal IO_AE22
+signal IO_AE23
+signal IO_AE24
+signal IO_AE25
+signal IO_AE26
+signal IO_AE28
+signal IO_AE29
+signal IO_AF1
+signal IO_AF2
+signal IO_AF4
+signal IO_AF6
+signal IO_AF8
+signal IO_AF9
+signal IO_AF11
+signal IO_AF12
+signal IO_AF13
+signal IO_AF15
+signal IO_AF16
+signal IO_AF18
+signal IO_AF19
+signal IO_AF20
+signal IO_AF22
+signal IO_AF23
+signal IO_AF25
+signal IO_AF27
+signal IO_AF29
+signal IO_AF30
+signal IO_AG1
+signal IO_AG2
+signal IO_AG3
+signal IO_AG4
+signal IO_AG5
+signal IO_AG7
+signal IO_AG8
+signal IO_AG9
+signal IO_AG11
+signal IO_AG12
+signal IO_AG13
+signal IO_AG15
+signal IO_AG16
+signal IO_AG18
+signal IO_AG19
+signal IO_AG20
+signal IO_AG22
+signal IO_AG23
+signal IO_AG24
+signal IO_AG26
+signal IO_AG27
+signal IO_AG28
+signal IO_AG29
+signal IO_AG30
+signal IO_AH1
+signal IO_AH2
+signal IO_AH4
+signal IO_AH6
+signal IO_AH7
+signal IO_AH8
+signal IO_AH10
+signal IO_AH11
+signal IO_AH12
+signal IO_AH14
+signal IO_AH15
+signal IO_AH16
+signal IO_AH17
+signal IO_AH19
+signal IO_AH20
+signal IO_AH21
+signal IO_AH23
+signal IO_AH24
+signal IO_AH25
+signal IO_AH27
+signal IO_AH29
+signal IO_AH30
+signal IO_AJ4
+signal IO_AJ5
+signal IO_AJ6
+signal IO_AJ7
+signal IO_AJ8
+signal IO_AJ9
+signal IO_AJ10
+signal IO_AJ11
+signal IO_AJ12
+signal IO_AJ13
+signal IO_AJ14
+signal IO_AJ15
+signal IO_AJ16
+signal IO_AJ17
+signal IO_AJ18
+signal IO_AJ19
+signal IO_AJ20
+signal IO_AJ21
+signal IO_AJ22
+signal IO_AJ23
+signal IO_AJ24
+signal IO_AJ25
+signal IO_AJ26
+signal IO_AJ27
+signal IO_AK4
+signal IO_AK5
+signal IO_AK7
+signal IO_AK8
+signal IO_AK9
+signal IO_AK11
+signal IO_AK12
+signal IO_AK13
+signal IO_AK15
+signal IO_AK16
+signal IO_AK18
+signal IO_AK19
+signal IO_AK20
+signal IO_AK22
+signal IO_AK23
+signal IO_AK24
+signal IO_AK26
+signal IO_AK27
+
+register BSR 2459
+register BR 1
+register DIR 32
+
+instruction length 6
+
+instruction EXTEST 000000 BSR
+instruction SAMPLE/PRELOAD 000001 BSR
+instruction IDCODE 001001 DIR
+instruction BYPASS 111111 BR
+
+bit 2458 I 1 IO_C29
+bit 2457 O 1 IO_C29 2456 1 Z
+bit 2456 C 1 *
+bit 2455 I 1 IO_C30
+bit 2454 O 1 IO_C30 2453 1 Z
+bit 2453 C 1 *
+bit 2452 I 1 IO_D27
+bit 2451 O 1 IO_D27 2450 1 Z
+bit 2450 C 1 *
+bit 2449 I 1 IO_D28
+bit 2448 O 1 IO_D28 2447 1 Z
+bit 2447 C 1 *
+bit 2446 I 1 IO_D29
+bit 2445 O 1 IO_D29 2444 1 Z
+bit 2444 C 1 *
+bit 2443 I 1 IO_D30
+bit 2442 O 1 IO_D30 2441 1 Z
+bit 2441 C 1 *
+bit 2440 I 1 IO_E29
+bit 2439 O 1 IO_E29 2438 1 Z
+bit 2438 C 1 *
+bit 2437 I 1 IO_E30
+bit 2436 O 1 IO_E30 2435 1 Z
+bit 2435 C 1 *
+bit 2434 I 1 IO_E27
+bit 2433 O 1 IO_E27 2432 1 Z
+bit 2432 C 1 *
+bit 2431 I 1 IO_F26
+bit 2430 O 1 IO_F26 2429 1 Z
+bit 2429 C 1 *
+bit 2428 I 1 IO_F28
+bit 2427 O 1 IO_F28 2426 1 Z
+bit 2426 C 1 *
+bit 2425 I 1 IO_F29
+bit 2424 O 1 IO_F29 2423 1 Z
+bit 2423 C 1 *
+bit 2422 O 1 *
+bit 2421 O 1 *
+bit 2420 O 1 *
+bit 2419 O 1 *
+bit 2418 O 1 *
+bit 2417 O 1 *
+bit 2416 O 1 *
+bit 2415 O 1 *
+bit 2414 O 1 *
+bit 2413 O 1 *
+bit 2412 O 1 *
+bit 2411 O 1 *
+bit 2410 O 1 *
+bit 2409 O 1 *
+bit 2408 O 1 *
+bit 2407 O 1 *
+bit 2406 O 1 *
+bit 2405 O 1 *
+bit 2404 I 1 IO_G27
+bit 2403 O 1 IO_G27 2402 1 Z
+bit 2402 C 1 *
+bit 2401 I 1 IO_G28
+bit 2400 O 1 IO_G28 2399 1 Z
+bit 2399 C 1 *
+bit 2398 I 1 IO_G29
+bit 2397 O 1 IO_G29 2396 1 Z
+bit 2396 C 1 *
+bit 2395 I 1 IO_G30
+bit 2394 O 1 IO_G30 2393 1 Z
+bit 2393 C 1 *
+bit 2392 I 1 IO_G25
+bit 2391 O 1 IO_G25 2390 1 Z
+bit 2390 C 1 *
+bit 2389 I 1 IO_H24
+bit 2388 O 1 IO_H24 2387 1 Z
+bit 2387 C 1 *
+bit 2386 I 1 IO_H25
+bit 2385 O 1 IO_H25 2384 1 Z
+bit 2384 C 1 *
+bit 2383 I 1 IO_H26
+bit 2382 O 1 IO_H26 2381 1 Z
+bit 2381 C 1 *
+bit 2380 I 1 IO_H27
+bit 2379 O 1 IO_H27 2378 1 Z
+bit 2378 C 1 *
+bit 2377 I 1 IO_H28
+bit 2376 O 1 IO_H28 2375 1 Z
+bit 2375 C 1 *
+bit 2374 O 1 *
+bit 2373 O 1 *
+bit 2372 O 1 *
+bit 2371 I 1 IO_J25
+bit 2370 O 1 IO_J25 2369 1 Z
+bit 2369 C 1 *
+bit 2368 I 1 IO_H29
+bit 2367 O 1 IO_H29 2366 1 Z
+bit 2366 C 1 *
+bit 2365 I 1 IO_H30
+bit 2364 O 1 IO_H30 2363 1 Z
+bit 2363 C 1 *
+bit 2362 I 1 IO_J26
+bit 2361 O 1 IO_J26 2360 1 Z
+bit 2360 C 1 *
+bit 2359 I 1 IO_J27
+bit 2358 O 1 IO_J27 2357 1 Z
+bit 2357 C 1 *
+bit 2356 I 1 IO_J29
+bit 2355 O 1 IO_J29 2354 1 Z
+bit 2354 C 1 *
+bit 2353 I 1 IO_J30
+bit 2352 O 1 IO_J30 2351 1 Z
+bit 2351 C 1 *
+bit 2350 I 1 IO_J23
+bit 2349 O 1 IO_J23 2348 1 Z
+bit 2348 C 1 *
+bit 2347 I 1 IO_K22
+bit 2346 O 1 IO_K22 2345 1 Z
+bit 2345 C 1 *
+bit 2344 I 1 IO_K24
+bit 2343 O 1 IO_K24 2342 1 Z
+bit 2342 C 1 *
+bit 2341 I 1 IO_K25
+bit 2340 O 1 IO_K25 2339 1 Z
+bit 2339 C 1 *
+bit 2338 O 1 *
+bit 2337 O 1 *
+bit 2336 O 1 *
+bit 2335 O 1 *
+bit 2334 O 1 *
+bit 2333 O 1 *
+bit 2332 O 1 *
+bit 2331 O 1 *
+bit 2330 O 1 *
+bit 2329 O 1 *
+bit 2328 O 1 *
+bit 2327 O 1 *
+bit 2326 I 1 IO_K28
+bit 2325 O 1 IO_K28 2324 1 Z
+bit 2324 C 1 *
+bit 2323 I 1 IO_K29
+bit 2322 O 1 IO_K29 2321 1 Z
+bit 2321 C 1 *
+bit 2320 I 1 IO_K21
+bit 2319 O 1 IO_K21 2318 1 Z
+bit 2318 C 1 *
+bit 2317 I 1 IO_L21
+bit 2316 O 1 IO_L21 2315 1 Z
+bit 2315 C 1 *
+bit 2314 I 1 IO_L23
+bit 2313 O 1 IO_L23 2312 1 Z
+bit 2312 C 1 *
+bit 2311 I 1 IO_L24
+bit 2310 O 1 IO_L24 2309 1 Z
+bit 2309 C 1 *
+bit 2308 I 1 IO_L25
+bit 2307 O 1 IO_L25 2306 1 Z
+bit 2306 C 1 *
+bit 2305 I 1 IO_L26
+bit 2304 O 1 IO_L26 2303 1 Z
+bit 2303 C 1 *
+bit 2302 I 1 IO_L27
+bit 2301 O 1 IO_L27 2300 1 Z
+bit 2300 C 1 *
+bit 2299 I 1 IO_L28
+bit 2298 O 1 IO_L28 2297 1 Z
+bit 2297 C 1 *
+bit 2296 O 1 *
+bit 2295 O 1 *
+bit 2294 O 1 *
+bit 2293 O 1 *
+bit 2292 O 1 *
+bit 2291 O 1 *
+bit 2290 I 1 IO_L29
+bit 2289 O 1 IO_L29 2288 1 Z
+bit 2288 C 1 *
+bit 2287 I 1 IO_L30
+bit 2286 O 1 IO_L30 2285 1 Z
+bit 2285 C 1 *
+bit 2284 I 1 IO_M22
+bit 2283 O 1 IO_M22 2282 1 Z
+bit 2282 C 1 *
+bit 2281 I 1 IO_M23
+bit 2280 O 1 IO_M23 2279 1 Z
+bit 2279 C 1 *
+bit 2278 I 1 IO_M24
+bit 2277 O 1 IO_M24 2276 1 Z
+bit 2276 C 1 *
+bit 2275 I 1 IO_M25
+bit 2274 O 1 IO_M25 2273 1 Z
+bit 2273 C 1 *
+bit 2272 I 1 IO_M27
+bit 2271 O 1 IO_M27 2270 1 Z
+bit 2270 C 1 *
+bit 2269 I 1 IO_M28
+bit 2268 O 1 IO_M28 2267 1 Z
+bit 2267 C 1 *
+bit 2266 O 1 *
+bit 2265 O 1 *
+bit 2264 O 1 *
+bit 2263 O 1 *
+bit 2262 O 1 *
+bit 2261 O 1 *
+bit 2260 O 1 *
+bit 2259 O 1 *
+bit 2258 O 1 *
+bit 2257 O 1 *
+bit 2256 O 1 *
+bit 2255 O 1 *
+bit 2254 I 1 IO_M29
+bit 2253 O 1 IO_M29 2252 1 Z
+bit 2252 C 1 *
+bit 2251 I 1 IO_M30
+bit 2250 O 1 IO_M30 2249 1 Z
+bit 2249 C 1 *
+bit 2248 I 1 IO_M21
+bit 2247 O 1 IO_M21 2246 1 Z
+bit 2246 C 1 *
+bit 2245 I 1 IO_N21
+bit 2244 O 1 IO_N21 2243 1 Z
+bit 2243 C 1 *
+bit 2242 I 1 IO_N22
+bit 2241 O 1 IO_N22 2240 1 Z
+bit 2240 C 1 *
+bit 2239 I 1 IO_N23
+bit 2238 O 1 IO_N23 2237 1 Z
+bit 2237 C 1 *
+bit 2236 I 1 IO_M26
+bit 2235 O 1 IO_M26 2234 1 Z
+bit 2234 C 1 *
+bit 2233 I 1 IO_N25
+bit 2232 O 1 IO_N25 2231 1 Z
+bit 2231 C 1 *
+bit 2230 I 1 IO_N26
+bit 2229 O 1 IO_N26 2228 1 Z
+bit 2228 C 1 *
+bit 2227 I 1 IO_N27
+bit 2226 O 1 IO_N27 2225 1 Z
+bit 2225 C 1 *
+bit 2224 O 1 *
+bit 2223 O 1 *
+bit 2222 O 1 *
+bit 2221 O 1 *
+bit 2220 O 1 *
+bit 2219 O 1 *
+bit 2218 I 1 IO_N29
+bit 2217 O 1 IO_N29 2216 1 Z
+bit 2216 C 1 *
+bit 2215 I 1 IO_N30
+bit 2214 O 1 IO_N30 2213 1 Z
+bit 2213 C 1 *
+bit 2212 I 1 IO_P21
+bit 2211 O 1 IO_P21 2210 1 Z
+bit 2210 C 1 *
+bit 2209 I 1 IO_P22
+bit 2208 O 1 IO_P22 2207 1 Z
+bit 2207 C 1 *
+bit 2206 I 1 IO_P24
+bit 2205 O 1 IO_P24 2204 1 Z
+bit 2204 C 1 *
+bit 2203 I 1 IO_P25
+bit 2202 O 1 IO_P25 2201 1 Z
+bit 2201 C 1 *
+bit 2200 I 1 IO_P28
+bit 2199 O 1 IO_P28 2198 1 Z
+bit 2198 C 1 *
+bit 2197 I 1 IO_P29
+bit 2196 O 1 IO_P29 2195 1 Z
+bit 2195 C 1 *
+bit 2194 I 1 IO_R21
+bit 2193 O 1 IO_R21 2192 1 Z
+bit 2192 C 1 *
+bit 2191 I 1 IO_R22
+bit 2190 O 1 IO_R22 2189 1 Z
+bit 2189 C 1 *
+bit 2188 O 1 *
+bit 2187 O 1 *
+bit 2186 O 1 *
+bit 2185 O 1 *
+bit 2184 O 1 *
+bit 2183 O 1 *
+bit 2182 O 1 *
+bit 2181 O 1 *
+bit 2180 O 1 *
+bit 2179 O 1 *
+bit 2178 O 1 *
+bit 2177 O 1 *
+bit 2176 O 1 *
+bit 2175 O 1 *
+bit 2174 O 1 *
+bit 2173 O 1 *
+bit 2172 O 1 *
+bit 2171 O 1 *
+bit 2170 I 1 IO_R23
+bit 2169 O 1 IO_R23 2168 1 Z
+bit 2168 C 1 *
+bit 2167 I 1 IO_R24
+bit 2166 O 1 IO_R24 2165 1 Z
+bit 2165 C 1 *
+bit 2164 I 1 IO_R25
+bit 2163 O 1 IO_R25 2162 1 Z
+bit 2162 C 1 *
+bit 2161 I 1 IO_R26
+bit 2160 O 1 IO_R26 2159 1 Z
+bit 2159 C 1 *
+bit 2158 I 1 IO_R27
+bit 2157 O 1 IO_R27 2156 1 Z
+bit 2156 C 1 *
+bit 2155 I 1 IO_R28
+bit 2154 O 1 IO_R28 2153 1 Z
+bit 2153 C 1 *
+bit 2152 I 1 IO_R29
+bit 2151 O 1 IO_R29 2150 1 Z
+bit 2150 C 1 *
+bit 2149 I 1 IO_R30
+bit 2148 O 1 IO_R30 2147 1 Z
+bit 2147 C 1 *
+bit 2146 I 1 IO_T30
+bit 2145 O 1 IO_T30 2144 1 Z
+bit 2144 C 1 *
+bit 2143 I 1 IO_T29
+bit 2142 O 1 IO_T29 2141 1 Z
+bit 2141 C 1 *
+bit 2140 I 1 IO_T28
+bit 2139 O 1 IO_T28 2138 1 Z
+bit 2138 C 1 *
+bit 2137 I 1 IO_T27
+bit 2136 O 1 IO_T27 2135 1 Z
+bit 2135 C 1 *
+bit 2134 I 1 IO_T26
+bit 2133 O 1 IO_T26 2132 1 Z
+bit 2132 C 1 *
+bit 2131 I 1 IO_T25
+bit 2130 O 1 IO_T25 2129 1 Z
+bit 2129 C 1 *
+bit 2128 I 1 IO_T24
+bit 2127 O 1 IO_T24 2126 1 Z
+bit 2126 C 1 *
+bit 2125 I 1 IO_T23
+bit 2124 O 1 IO_T23 2123 1 Z
+bit 2123 C 1 *
+bit 2122 O 1 *
+bit 2121 O 1 *
+bit 2120 O 1 *
+bit 2119 O 1 *
+bit 2118 O 1 *
+bit 2117 O 1 *
+bit 2116 O 1 *
+bit 2115 O 1 *
+bit 2114 O 1 *
+bit 2113 O 1 *
+bit 2112 O 1 *
+bit 2111 O 1 *
+bit 2110 O 1 *
+bit 2109 O 1 *
+bit 2108 O 1 *
+bit 2107 O 1 *
+bit 2106 O 1 *
+bit 2105 O 1 *
+bit 2104 I 1 IO_T22
+bit 2103 O 1 IO_T22 2102 1 Z
+bit 2102 C 1 *
+bit 2101 I 1 IO_T21
+bit 2100 O 1 IO_T21 2099 1 Z
+bit 2099 C 1 *
+bit 2098 I 1 IO_U29
+bit 2097 O 1 IO_U29 2096 1 Z
+bit 2096 C 1 *
+bit 2095 I 1 IO_U28
+bit 2094 O 1 IO_U28 2093 1 Z
+bit 2093 C 1 *
+bit 2092 I 1 IO_U25
+bit 2091 O 1 IO_U25 2090 1 Z
+bit 2090 C 1 *
+bit 2089 I 1 IO_U24
+bit 2088 O 1 IO_U24 2087 1 Z
+bit 2087 C 1 *
+bit 2086 I 1 IO_U22
+bit 2085 O 1 IO_U22 2084 1 Z
+bit 2084 C 1 *
+bit 2083 I 1 IO_U21
+bit 2082 O 1 IO_U21 2081 1 Z
+bit 2081 C 1 *
+bit 2080 I 1 IO_V30
+bit 2079 O 1 IO_V30 2078 1 Z
+bit 2078 C 1 *
+bit 2077 I 1 IO_V29
+bit 2076 O 1 IO_V29 2075 1 Z
+bit 2075 C 1 *
+bit 2074 O 1 *
+bit 2073 O 1 *
+bit 2072 O 1 *
+bit 2071 O 1 *
+bit 2070 O 1 *
+bit 2069 O 1 *
+bit 2068 I 1 IO_V27
+bit 2067 O 1 IO_V27 2066 1 Z
+bit 2066 C 1 *
+bit 2065 I 1 IO_V26
+bit 2064 O 1 IO_V26 2063 1 Z
+bit 2063 C 1 *
+bit 2062 I 1 IO_V25
+bit 2061 O 1 IO_V25 2060 1 Z
+bit 2060 C 1 *
+bit 2059 I 1 IO_W26
+bit 2058 O 1 IO_W26 2057 1 Z
+bit 2057 C 1 *
+bit 2056 I 1 IO_V23
+bit 2055 O 1 IO_V23 2054 1 Z
+bit 2054 C 1 *
+bit 2053 I 1 IO_V22
+bit 2052 O 1 IO_V22 2051 1 Z
+bit 2051 C 1 *
+bit 2050 I 1 IO_V21
+bit 2049 O 1 IO_V21 2048 1 Z
+bit 2048 C 1 *
+bit 2047 I 1 IO_W21
+bit 2046 O 1 IO_W21 2045 1 Z
+bit 2045 C 1 *
+bit 2044 I 1 IO_W30
+bit 2043 O 1 IO_W30 2042 1 Z
+bit 2042 C 1 *
+bit 2041 I 1 IO_W29
+bit 2040 O 1 IO_W29 2039 1 Z
+bit 2039 C 1 *
+bit 2038 O 1 *
+bit 2037 O 1 *
+bit 2036 O 1 *
+bit 2035 O 1 *
+bit 2034 O 1 *
+bit 2033 O 1 *
+bit 2032 O 1 *
+bit 2031 O 1 *
+bit 2030 O 1 *
+bit 2029 O 1 *
+bit 2028 O 1 *
+bit 2027 O 1 *
+bit 2026 I 1 IO_W28
+bit 2025 O 1 IO_W28 2024 1 Z
+bit 2024 C 1 *
+bit 2023 I 1 IO_W27
+bit 2022 O 1 IO_W27 2021 1 Z
+bit 2021 C 1 *
+bit 2020 I 1 IO_W25
+bit 2019 O 1 IO_W25 2018 1 Z
+bit 2018 C 1 *
+bit 2017 I 1 IO_W24
+bit 2016 O 1 IO_W24 2015 1 Z
+bit 2015 C 1 *
+bit 2014 I 1 IO_W23
+bit 2013 O 1 IO_W23 2012 1 Z
+bit 2012 C 1 *
+bit 2011 I 1 IO_W22
+bit 2010 O 1 IO_W22 2009 1 Z
+bit 2009 C 1 *
+bit 2008 I 1 IO_Y30
+bit 2007 O 1 IO_Y30 2006 1 Z
+bit 2006 C 1 *
+bit 2005 I 1 IO_Y29
+bit 2004 O 1 IO_Y29 2003 1 Z
+bit 2003 C 1 *
+bit 2002 O 1 *
+bit 2001 O 1 *
+bit 2000 O 1 *
+bit 1999 O 1 *
+bit 1998 O 1 *
+bit 1997 O 1 *
+bit 1996 I 1 IO_Y28
+bit 1995 O 1 IO_Y28 1994 1 Z
+bit 1994 C 1 *
+bit 1993 I 1 IO_Y27
+bit 1992 O 1 IO_Y27 1991 1 Z
+bit 1991 C 1 *
+bit 1990 I 1 IO_Y26
+bit 1989 O 1 IO_Y26 1988 1 Z
+bit 1988 C 1 *
+bit 1987 I 1 IO_Y25
+bit 1986 O 1 IO_Y25 1985 1 Z
+bit 1985 C 1 *
+bit 1984 I 1 IO_Y24
+bit 1983 O 1 IO_Y24 1982 1 Z
+bit 1982 C 1 *
+bit 1981 I 1 IO_Y23
+bit 1980 O 1 IO_Y23 1979 1 Z
+bit 1979 C 1 *
+bit 1978 I 1 IO_Y21
+bit 1977 O 1 IO_Y21 1976 1 Z
+bit 1976 C 1 *
+bit 1975 I 1 IO_AA21
+bit 1974 O 1 IO_AA21 1973 1 Z
+bit 1973 C 1 *
+bit 1972 I 1 IO_AA29
+bit 1971 O 1 IO_AA29 1970 1 Z
+bit 1970 C 1 *
+bit 1969 I 1 IO_AA28
+bit 1968 O 1 IO_AA28 1967 1 Z
+bit 1967 C 1 *
+bit 1966 O 1 *
+bit 1965 O 1 *
+bit 1964 O 1 *
+bit 1963 O 1 *
+bit 1962 O 1 *
+bit 1961 O 1 *
+bit 1960 O 1 *
+bit 1959 O 1 *
+bit 1958 O 1 *
+bit 1957 O 1 *
+bit 1956 O 1 *
+bit 1955 O 1 *
+bit 1954 I 1 IO_AA25
+bit 1953 O 1 IO_AA25 1952 1 Z
+bit 1952 C 1 *
+bit 1951 I 1 IO_AA24
+bit 1950 O 1 IO_AA24 1949 1 Z
+bit 1949 C 1 *
+bit 1948 I 1 IO_AA22
+bit 1947 O 1 IO_AA22 1946 1 Z
+bit 1946 C 1 *
+bit 1945 I 1 IO_AB23
+bit 1944 O 1 IO_AB23 1943 1 Z
+bit 1943 C 1 *
+bit 1942 I 1 IO_AB30
+bit 1941 O 1 IO_AB30 1940 1 Z
+bit 1940 C 1 *
+bit 1939 I 1 IO_AB29
+bit 1938 O 1 IO_AB29 1937 1 Z
+bit 1937 C 1 *
+bit 1936 I 1 IO_AB27
+bit 1935 O 1 IO_AB27 1934 1 Z
+bit 1934 C 1 *
+bit 1933 I 1 IO_AB26
+bit 1932 O 1 IO_AB26 1931 1 Z
+bit 1931 C 1 *
+bit 1930 I 1 IO_AC30
+bit 1929 O 1 IO_AC30 1928 1 Z
+bit 1928 C 1 *
+bit 1927 I 1 IO_AC29
+bit 1926 O 1 IO_AC29 1925 1 Z
+bit 1925 C 1 *
+bit 1924 I 1 IO_AB25
+bit 1923 O 1 IO_AB25 1922 1 Z
+bit 1922 C 1 *
+bit 1921 O 1 *
+bit 1920 O 1 *
+bit 1919 O 1 *
+bit 1918 I 1 IO_AC28
+bit 1917 O 1 IO_AC28 1916 1 Z
+bit 1916 C 1 *
+bit 1915 I 1 IO_AC27
+bit 1914 O 1 IO_AC27 1913 1 Z
+bit 1913 C 1 *
+bit 1912 I 1 IO_AC26
+bit 1911 O 1 IO_AC26 1910 1 Z
+bit 1910 C 1 *
+bit 1909 I 1 IO_AC25
+bit 1908 O 1 IO_AC25 1907 1 Z
+bit 1907 C 1 *
+bit 1906 I 1 IO_AC24
+bit 1905 O 1 IO_AC24 1904 1 Z
+bit 1904 C 1 *
+bit 1903 I 1 IO_AD25
+bit 1902 O 1 IO_AD25 1901 1 Z
+bit 1901 C 1 *
+bit 1900 I 1 IO_AD30
+bit 1899 O 1 IO_AD30 1898 1 Z
+bit 1898 C 1 *
+bit 1897 I 1 IO_AD29
+bit 1896 O 1 IO_AD29 1895 1 Z
+bit 1895 C 1 *
+bit 1894 I 1 IO_AD28
+bit 1893 O 1 IO_AD28 1892 1 Z
+bit 1892 C 1 *
+bit 1891 I 1 IO_AD27
+bit 1890 O 1 IO_AD27 1889 1 Z
+bit 1889 C 1 *
+bit 1888 O 1 *
+bit 1887 O 1 *
+bit 1886 O 1 *
+bit 1885 O 1 *
+bit 1884 O 1 *
+bit 1883 O 1 *
+bit 1882 O 1 *
+bit 1881 O 1 *
+bit 1880 O 1 *
+bit 1879 O 1 *
+bit 1878 O 1 *
+bit 1877 O 1 *
+bit 1876 O 1 *
+bit 1875 O 1 *
+bit 1874 O 1 *
+bit 1873 O 1 *
+bit 1872 O 1 *
+bit 1871 O 1 *
+bit 1870 I 1 IO_AE29
+bit 1869 O 1 IO_AE29 1868 1 Z
+bit 1868 C 1 *
+bit 1867 I 1 IO_AE28
+bit 1866 O 1 IO_AE28 1865 1 Z
+bit 1865 C 1 *
+bit 1864 I 1 IO_AE26
+bit 1863 O 1 IO_AE26 1862 1 Z
+bit 1862 C 1 *
+bit 1861 I 1 IO_AF27
+bit 1860 O 1 IO_AF27 1859 1 Z
+bit 1859 C 1 *
+bit 1858 I 1 IO_AF30
+bit 1857 O 1 IO_AF30 1856 1 Z
+bit 1856 C 1 *
+bit 1855 I 1 IO_AF29
+bit 1854 O 1 IO_AF29 1853 1 Z
+bit 1853 C 1 *
+bit 1852 I 1 IO_AG30
+bit 1851 O 1 IO_AG30 1850 1 Z
+bit 1850 C 1 *
+bit 1849 I 1 IO_AG29
+bit 1848 O 1 IO_AG29 1847 1 Z
+bit 1847 C 1 *
+bit 1846 I 1 IO_AG28
+bit 1845 O 1 IO_AG28 1844 1 Z
+bit 1844 C 1 *
+bit 1843 I 1 IO_AG27
+bit 1842 O 1 IO_AG27 1841 1 Z
+bit 1841 C 1 *
+bit 1840 I 1 IO_AH30
+bit 1839 O 1 IO_AH30 1838 1 Z
+bit 1838 C 1 *
+bit 1837 I 1 IO_AH29
+bit 1836 O 1 IO_AH29 1835 1 Z
+bit 1835 C 1 *
+bit 1834 I 1 CCLK_AH28
+bit 1833 O 1 CCLK_AH28 1832 1 Z
+bit 1832 C 1 *
+bit 1831 I 1 DONE_AJ28
+bit 1830 O 1 DONE_AJ28 1829 1 Z
+bit 1829 C 1 *
+bit 1828 I 1 IO_AK28
+bit 1827 O 1 IO_AK28 1826 1 Z
+bit 1826 C 1 *
+bit 1825 I 1 IO_AJ27
+bit 1824 O 1 IO_AJ27 1823 1 Z
+bit 1823 C 1 *
+bit 1822 I 1 IO_AK27
+bit 1821 O 1 IO_AK27 1820 1 Z
+bit 1820 C 1 *
+bit 1819 I 1 IO_AJ26
+bit 1818 O 1 IO_AJ26 1817 1 Z
+bit 1817 C 1 *
+bit 1816 I 1 IO_AK26
+bit 1815 O 1 IO_AK26 1814 1 Z
+bit 1814 C 1 *
+bit 1813 I 1 IO_AH27
+bit 1812 O 1 IO_AH27 1811 1 Z
+bit 1811 C 1 *
+bit 1810 I 1 IO_AG26
+bit 1809 O 1 IO_AG26 1808 1 Z
+bit 1808 C 1 *
+bit 1807 I 1 IO_AF25
+bit 1806 O 1 IO_AF25 1805 1 Z
+bit 1805 C 1 *
+bit 1804 I 1 IO_AH25
+bit 1803 O 1 IO_AH25 1802 1 Z
+bit 1802 C 1 *
+bit 1801 I 1 IO_AJ25
+bit 1800 O 1 IO_AJ25 1799 1 Z
+bit 1799 C 1 *
+bit 1798 O 1 *
+bit 1797 O 1 *
+bit 1796 O 1 *
+bit 1795 I 1 IO_AE25
+bit 1794 O 1 IO_AE25 1793 1 Z
+bit 1793 C 1 *
+bit 1792 I 1 IO_AE24
+bit 1791 O 1 IO_AE24 1790 1 Z
+bit 1790 C 1 *
+bit 1789 I 1 IO_AG24
+bit 1788 O 1 IO_AG24 1787 1 Z
+bit 1787 C 1 *
+bit 1786 I 1 IO_AH24
+bit 1785 O 1 IO_AH24 1784 1 Z
+bit 1784 C 1 *
+bit 1783 O 1 *
+bit 1782 O 1 *
+bit 1781 O 1 *
+bit 1780 O 1 *
+bit 1779 O 1 *
+bit 1778 O 1 *
+bit 1777 O 1 *
+bit 1776 O 1 *
+bit 1775 O 1 *
+bit 1774 O 1 *
+bit 1773 O 1 *
+bit 1772 O 1 *
+bit 1771 O 1 *
+bit 1770 O 1 *
+bit 1769 O 1 *
+bit 1768 O 1 *
+bit 1767 O 1 *
+bit 1766 O 1 *
+bit 1765 I 1 IO_AJ24
+bit 1764 O 1 IO_AJ24 1763 1 Z
+bit 1763 C 1 *
+bit 1762 I 1 IO_AK24
+bit 1761 O 1 IO_AK24 1760 1 Z
+bit 1760 C 1 *
+bit 1759 I 1 IO_AD24
+bit 1758 O 1 IO_AD24 1757 1 Z
+bit 1757 C 1 *
+bit 1756 I 1 IO_AC23
+bit 1755 O 1 IO_AC23 1754 1 Z
+bit 1754 C 1 *
+bit 1753 I 1 IO_AD23
+bit 1752 O 1 IO_AD23 1751 1 Z
+bit 1751 C 1 *
+bit 1750 I 1 IO_AE23
+bit 1749 O 1 IO_AE23 1748 1 Z
+bit 1748 C 1 *
+bit 1747 I 1 IO_AF23
+bit 1746 O 1 IO_AF23 1745 1 Z
+bit 1745 C 1 *
+bit 1744 I 1 IO_AG23
+bit 1743 O 1 IO_AG23 1742 1 Z
+bit 1742 C 1 *
+bit 1741 I 1 IO_AH23
+bit 1740 O 1 IO_AH23 1739 1 Z
+bit 1739 C 1 *
+bit 1738 O 1 *
+bit 1737 O 1 *
+bit 1736 O 1 *
+bit 1735 I 1 IO_AJ23
+bit 1734 O 1 IO_AJ23 1733 1 Z
+bit 1733 C 1 *
+bit 1732 I 1 IO_AK23
+bit 1731 O 1 IO_AK23 1730 1 Z
+bit 1730 C 1 *
+bit 1729 I 1 IO_AB22
+bit 1728 O 1 IO_AB22 1727 1 Z
+bit 1727 C 1 *
+bit 1726 I 1 IO_AC22
+bit 1725 O 1 IO_AC22 1724 1 Z
+bit 1724 C 1 *
+bit 1723 I 1 IO_AE22
+bit 1722 O 1 IO_AE22 1721 1 Z
+bit 1721 C 1 *
+bit 1720 I 1 IO_AF22
+bit 1719 O 1 IO_AF22 1718 1 Z
+bit 1718 C 1 *
+bit 1717 I 1 IO_AG22
+bit 1716 O 1 IO_AG22 1715 1 Z
+bit 1715 C 1 *
+bit 1714 I 1 IO_AJ22
+bit 1713 O 1 IO_AJ22 1712 1 Z
+bit 1712 C 1 *
+bit 1711 I 1 IO_AK22
+bit 1710 O 1 IO_AK22 1709 1 Z
+bit 1709 C 1 *
+bit 1708 O 1 *
+bit 1707 O 1 *
+bit 1706 O 1 *
+bit 1705 O 1 *
+bit 1704 O 1 *
+bit 1703 O 1 *
+bit 1702 O 1 *
+bit 1701 O 1 *
+bit 1700 O 1 *
+bit 1699 O 1 *
+bit 1698 O 1 *
+bit 1697 O 1 *
+bit 1696 O 1 *
+bit 1695 O 1 *
+bit 1694 O 1 *
+bit 1693 O 1 *
+bit 1692 O 1 *
+bit 1691 O 1 *
+bit 1690 I 1 IO_AD21
+bit 1689 O 1 IO_AD21 1688 1 Z
+bit 1688 C 1 *
+bit 1687 I 1 IO_AE21
+bit 1686 O 1 IO_AE21 1685 1 Z
+bit 1685 C 1 *
+bit 1684 I 1 IO_AH21
+bit 1683 O 1 IO_AH21 1682 1 Z
+bit 1682 C 1 *
+bit 1681 I 1 IO_AJ21
+bit 1680 O 1 IO_AJ21 1679 1 Z
+bit 1679 C 1 *
+bit 1678 O 1 *
+bit 1677 O 1 *
+bit 1676 O 1 *
+bit 1675 I 1 IO_AB21
+bit 1674 O 1 IO_AB21 1673 1 Z
+bit 1673 C 1 *
+bit 1672 I 1 IO_AA20
+bit 1671 O 1 IO_AA20 1670 1 Z
+bit 1670 C 1 *
+bit 1669 I 1 IO_AC20
+bit 1668 O 1 IO_AC20 1667 1 Z
+bit 1667 C 1 *
+bit 1666 I 1 IO_AD20
+bit 1665 O 1 IO_AD20 1664 1 Z
+bit 1664 C 1 *
+bit 1663 O 1 *
+bit 1662 O 1 *
+bit 1661 O 1 *
+bit 1660 I 1 IO_AE20
+bit 1659 O 1 IO_AE20 1658 1 Z
+bit 1658 C 1 *
+bit 1657 I 1 IO_AF20
+bit 1656 O 1 IO_AF20 1655 1 Z
+bit 1655 C 1 *
+bit 1654 I 1 IO_AG20
+bit 1653 O 1 IO_AG20 1652 1 Z
+bit 1652 C 1 *
+bit 1651 I 1 IO_AH20
+bit 1650 O 1 IO_AH20 1649 1 Z
+bit 1649 C 1 *
+bit 1648 O 1 *
+bit 1647 O 1 *
+bit 1646 O 1 *
+bit 1645 I 1 IO_AJ20
+bit 1644 O 1 IO_AJ20 1643 1 Z
+bit 1643 C 1 *
+bit 1642 I 1 IO_AK20
+bit 1641 O 1 IO_AK20 1640 1 Z
+bit 1640 C 1 *
+bit 1639 I 1 IO_AA19
+bit 1638 O 1 IO_AA19 1637 1 Z
+bit 1637 C 1 *
+bit 1636 I 1 IO_AB19
+bit 1635 O 1 IO_AB19 1634 1 Z
+bit 1634 C 1 *
+bit 1633 O 1 *
+bit 1632 O 1 *
+bit 1631 O 1 *
+bit 1630 I 1 IO_AC19
+bit 1629 O 1 IO_AC19 1628 1 Z
+bit 1628 C 1 *
+bit 1627 I 1 IO_AD19
+bit 1626 O 1 IO_AD19 1625 1 Z
+bit 1625 C 1 *
+bit 1624 I 1 IO_AE19
+bit 1623 O 1 IO_AE19 1622 1 Z
+bit 1622 C 1 *
+bit 1621 I 1 IO_AF19
+bit 1620 O 1 IO_AF19 1619 1 Z
+bit 1619 C 1 *
+bit 1618 O 1 *
+bit 1617 O 1 *
+bit 1616 O 1 *
+bit 1615 I 1 IO_AG19
+bit 1614 O 1 IO_AG19 1613 1 Z
+bit 1613 C 1 *
+bit 1612 I 1 IO_AH19
+bit 1611 O 1 IO_AH19 1610 1 Z
+bit 1610 C 1 *
+bit 1609 I 1 IO_AJ19
+bit 1608 O 1 IO_AJ19 1607 1 Z
+bit 1607 C 1 *
+bit 1606 I 1 IO_AK19
+bit 1605 O 1 IO_AK19 1604 1 Z
+bit 1604 C 1 *
+bit 1603 I 1 IO_AA18
+bit 1602 O 1 IO_AA18 1601 1 Z
+bit 1601 C 1 *
+bit 1600 I 1 IO_AB18
+bit 1599 O 1 IO_AB18 1598 1 Z
+bit 1598 C 1 *
+bit 1597 I 1 IO_AC18
+bit 1596 O 1 IO_AC18 1595 1 Z
+bit 1595 C 1 *
+bit 1594 I 1 IO_AE18
+bit 1593 O 1 IO_AE18 1592 1 Z
+bit 1592 C 1 *
+bit 1591 I 1 IO_AF18
+bit 1590 O 1 IO_AF18 1589 1 Z
+bit 1589 C 1 *
+bit 1588 I 1 IO_AG18
+bit 1587 O 1 IO_AG18 1586 1 Z
+bit 1586 C 1 *
+bit 1585 I 1 IO_AJ18
+bit 1584 O 1 IO_AJ18 1583 1 Z
+bit 1583 C 1 *
+bit 1582 I 1 IO_AK18
+bit 1581 O 1 IO_AK18 1580 1 Z
+bit 1580 C 1 *
+bit 1579 I 1 IO_AA17
+bit 1578 O 1 IO_AA17 1577 1 Z
+bit 1577 C 1 *
+bit 1576 I 1 IO_AB17
+bit 1575 O 1 IO_AB17 1574 1 Z
+bit 1574 C 1 *
+bit 1573 I 1 IO_AA16
+bit 1572 O 1 IO_AA16 1571 1 Z
+bit 1571 C 1 *
+bit 1570 I 1 IO_AD17
+bit 1569 O 1 IO_AD17 1568 1 Z
+bit 1568 C 1 *
+bit 1567 I 1 IO_AE17
+bit 1566 O 1 IO_AE17 1565 1 Z
+bit 1565 C 1 *
+bit 1564 I 1 IO_AH17
+bit 1563 O 1 IO_AH17 1562 1 Z
+bit 1562 C 1 *
+bit 1561 I 1 IO_AJ17
+bit 1560 O 1 IO_AJ17 1559 1 Z
+bit 1559 C 1 *
+bit 1558 O 1 *
+bit 1557 O 1 *
+bit 1556 O 1 *
+bit 1555 I 1 IO_AB16
+bit 1554 O 1 IO_AB16 1553 1 Z
+bit 1553 C 1 *
+bit 1552 I 1 IO_AC16
+bit 1551 O 1 IO_AC16 1550 1 Z
+bit 1550 C 1 *
+bit 1549 I 1 IO_AD16
+bit 1548 O 1 IO_AD16 1547 1 Z
+bit 1547 C 1 *
+bit 1546 I 1 IO_AE16
+bit 1545 O 1 IO_AE16 1544 1 Z
+bit 1544 C 1 *
+bit 1543 I 1 IO_AF16
+bit 1542 O 1 IO_AF16 1541 1 Z
+bit 1541 C 1 *
+bit 1540 I 1 IO_AG16
+bit 1539 O 1 IO_AG16 1538 1 Z
+bit 1538 C 1 *
+bit 1537 I 1 IO_AH16
+bit 1536 O 1 IO_AH16 1535 1 Z
+bit 1535 C 1 *
+bit 1534 I 1 IO_AJ16
+bit 1533 O 1 IO_AJ16 1532 1 Z
+bit 1532 C 1 *
+bit 1531 I 1 IO_AK16
+bit 1530 O 1 IO_AK16 1529 1 Z
+bit 1529 C 1 *
+bit 1528 I 1 IO_AK15
+bit 1527 O 1 IO_AK15 1526 1 Z
+bit 1526 C 1 *
+bit 1525 I 1 IO_AJ15
+bit 1524 O 1 IO_AJ15 1523 1 Z
+bit 1523 C 1 *
+bit 1522 I 1 IO_AH15
+bit 1521 O 1 IO_AH15 1520 1 Z
+bit 1520 C 1 *
+bit 1519 I 1 IO_AG15
+bit 1518 O 1 IO_AG15 1517 1 Z
+bit 1517 C 1 *
+bit 1516 I 1 IO_AF15
+bit 1515 O 1 IO_AF15 1514 1 Z
+bit 1514 C 1 *
+bit 1513 I 1 IO_AE15
+bit 1512 O 1 IO_AE15 1511 1 Z
+bit 1511 C 1 *
+bit 1510 I 1 IO_AD15
+bit 1509 O 1 IO_AD15 1508 1 Z
+bit 1508 C 1 *
+bit 1507 I 1 IO_AD14
+bit 1506 O 1 IO_AD14 1505 1 Z
+bit 1505 C 1 *
+bit 1504 I 1 IO_AC15
+bit 1503 O 1 IO_AC15 1502 1 Z
+bit 1502 C 1 *
+bit 1501 I 1 IO_AB15
+bit 1500 O 1 IO_AB15 1499 1 Z
+bit 1499 C 1 *
+bit 1498 I 1 IO_AA15
+bit 1497 O 1 IO_AA15 1496 1 Z
+bit 1496 C 1 *
+bit 1495 I 1 IO_AJ14
+bit 1494 O 1 IO_AJ14 1493 1 Z
+bit 1493 C 1 *
+bit 1492 I 1 IO_AH14
+bit 1491 O 1 IO_AH14 1490 1 Z
+bit 1490 C 1 *
+bit 1489 I 1 IO_AE14
+bit 1488 O 1 IO_AE14 1487 1 Z
+bit 1487 C 1 *
+bit 1486 I 1 IO_AE13
+bit 1485 O 1 IO_AE13 1484 1 Z
+bit 1484 C 1 *
+bit 1483 O 1 *
+bit 1482 O 1 *
+bit 1481 O 1 *
+bit 1480 I 1 IO_AB14
+bit 1479 O 1 IO_AB14 1478 1 Z
+bit 1478 C 1 *
+bit 1477 I 1 IO_AA14
+bit 1476 O 1 IO_AA14 1475 1 Z
+bit 1475 C 1 *
+bit 1474 I 1 IO_AK13
+bit 1473 O 1 IO_AK13 1472 1 Z
+bit 1472 C 1 *
+bit 1471 I 1 IO_AJ13
+bit 1470 O 1 IO_AJ13 1469 1 Z
+bit 1469 C 1 *
+bit 1468 O 1 *
+bit 1467 O 1 *
+bit 1466 O 1 *
+bit 1465 I 1 IO_AG13
+bit 1464 O 1 IO_AG13 1463 1 Z
+bit 1463 C 1 *
+bit 1462 I 1 IO_AF13
+bit 1461 O 1 IO_AF13 1460 1 Z
+bit 1460 C 1 *
+bit 1459 I 1 IO_AC13
+bit 1458 O 1 IO_AC13 1457 1 Z
+bit 1457 C 1 *
+bit 1456 I 1 IO_AB13
+bit 1455 O 1 IO_AB13 1454 1 Z
+bit 1454 C 1 *
+bit 1453 O 1 *
+bit 1452 O 1 *
+bit 1451 O 1 *
+bit 1450 I 1 IO_AA13
+bit 1449 O 1 IO_AA13 1448 1 Z
+bit 1448 C 1 *
+bit 1447 I 1 IO_AA12
+bit 1446 O 1 IO_AA12 1445 1 Z
+bit 1445 C 1 *
+bit 1444 I 1 IO_AK12
+bit 1443 O 1 IO_AK12 1442 1 Z
+bit 1442 C 1 *
+bit 1441 I 1 IO_AJ12
+bit 1440 O 1 IO_AJ12 1439 1 Z
+bit 1439 C 1 *
+bit 1438 O 1 *
+bit 1437 O 1 *
+bit 1436 O 1 *
+bit 1435 I 1 IO_AH12
+bit 1434 O 1 IO_AH12 1433 1 Z
+bit 1433 C 1 *
+bit 1432 I 1 IO_AG12
+bit 1431 O 1 IO_AG12 1430 1 Z
+bit 1430 C 1 *
+bit 1429 I 1 IO_AF12
+bit 1428 O 1 IO_AF12 1427 1 Z
+bit 1427 C 1 *
+bit 1426 I 1 IO_AE12
+bit 1425 O 1 IO_AE12 1424 1 Z
+bit 1424 C 1 *
+bit 1423 O 1 *
+bit 1422 O 1 *
+bit 1421 O 1 *
+bit 1420 I 1 IO_AD12
+bit 1419 O 1 IO_AD12 1418 1 Z
+bit 1418 C 1 *
+bit 1417 I 1 IO_AC12
+bit 1416 O 1 IO_AC12 1415 1 Z
+bit 1415 C 1 *
+bit 1414 I 1 IO_AB12
+bit 1413 O 1 IO_AB12 1412 1 Z
+bit 1412 C 1 *
+bit 1411 I 1 IO_AC11
+bit 1410 O 1 IO_AC11 1409 1 Z
+bit 1409 C 1 *
+bit 1408 O 1 *
+bit 1407 O 1 *
+bit 1406 O 1 *
+bit 1405 I 1 IO_AK11
+bit 1404 O 1 IO_AK11 1403 1 Z
+bit 1403 C 1 *
+bit 1402 I 1 IO_AJ11
+bit 1401 O 1 IO_AJ11 1400 1 Z
+bit 1400 C 1 *
+bit 1399 I 1 IO_AH11
+bit 1398 O 1 IO_AH11 1397 1 Z
+bit 1397 C 1 *
+bit 1396 I 1 IO_AG11
+bit 1395 O 1 IO_AG11 1394 1 Z
+bit 1394 C 1 *
+bit 1393 O 1 *
+bit 1392 O 1 *
+bit 1391 O 1 *
+bit 1390 I 1 IO_AF11
+bit 1389 O 1 IO_AF11 1388 1 Z
+bit 1388 C 1 *
+bit 1387 I 1 IO_AE11
+bit 1386 O 1 IO_AE11 1385 1 Z
+bit 1385 C 1 *
+bit 1384 I 1 IO_AD11
+bit 1383 O 1 IO_AD11 1382 1 Z
+bit 1382 C 1 *
+bit 1381 I 1 IO_AD10
+bit 1380 O 1 IO_AD10 1379 1 Z
+bit 1379 C 1 *
+bit 1378 I 1 IO_AA11
+bit 1377 O 1 IO_AA11 1376 1 Z
+bit 1376 C 1 *
+bit 1375 I 1 IO_AJ10
+bit 1374 O 1 IO_AJ10 1373 1 Z
+bit 1373 C 1 *
+bit 1372 I 1 IO_AH10
+bit 1371 O 1 IO_AH10 1370 1 Z
+bit 1370 C 1 *
+bit 1369 I 1 IO_AE10
+bit 1368 O 1 IO_AE10 1367 1 Z
+bit 1367 C 1 *
+bit 1366 I 1 IO_AE9
+bit 1365 O 1 IO_AE9 1364 1 Z
+bit 1364 C 1 *
+bit 1363 O 1 *
+bit 1362 O 1 *
+bit 1361 O 1 *
+bit 1360 O 1 *
+bit 1359 O 1 *
+bit 1358 O 1 *
+bit 1357 O 1 *
+bit 1356 O 1 *
+bit 1355 O 1 *
+bit 1354 O 1 *
+bit 1353 O 1 *
+bit 1352 O 1 *
+bit 1351 O 1 *
+bit 1350 O 1 *
+bit 1349 O 1 *
+bit 1348 I 1 IO_AB10
+bit 1347 O 1 IO_AB10 1346 1 Z
+bit 1346 C 1 *
+bit 1345 I 1 IO_AK9
+bit 1344 O 1 IO_AK9 1343 1 Z
+bit 1343 C 1 *
+bit 1342 I 1 IO_AJ9
+bit 1341 O 1 IO_AJ9 1340 1 Z
+bit 1340 C 1 *
+bit 1339 I 1 IO_AG9
+bit 1338 O 1 IO_AG9 1337 1 Z
+bit 1337 C 1 *
+bit 1336 I 1 IO_AF9
+bit 1335 O 1 IO_AF9 1334 1 Z
+bit 1334 C 1 *
+bit 1333 O 1 *
+bit 1332 O 1 *
+bit 1331 O 1 *
+bit 1330 I 1 IO_AC9
+bit 1329 O 1 IO_AC9 1328 1 Z
+bit 1328 C 1 *
+bit 1327 I 1 IO_AB9
+bit 1326 O 1 IO_AB9 1325 1 Z
+bit 1325 C 1 *
+bit 1324 I 1 IO_AK8
+bit 1323 O 1 IO_AK8 1322 1 Z
+bit 1322 C 1 *
+bit 1321 I 1 IO_AJ8
+bit 1320 O 1 IO_AJ8 1319 1 Z
+bit 1319 C 1 *
+bit 1318 O 1 *
+bit 1317 O 1 *
+bit 1316 O 1 *
+bit 1315 I 1 IO_AH8
+bit 1314 O 1 IO_AH8 1313 1 Z
+bit 1313 C 1 *
+bit 1312 I 1 IO_AG8
+bit 1311 O 1 IO_AG8 1310 1 Z
+bit 1310 C 1 *
+bit 1309 I 1 IO_AF8
+bit 1308 O 1 IO_AF8 1307 1 Z
+bit 1307 C 1 *
+bit 1306 I 1 IO_AE8
+bit 1305 O 1 IO_AE8 1304 1 Z
+bit 1304 C 1 *
+bit 1303 O 1 *
+bit 1302 O 1 *
+bit 1301 O 1 *
+bit 1300 I 1 IO_AD8
+bit 1299 O 1 IO_AD8 1298 1 Z
+bit 1298 C 1 *
+bit 1297 I 1 IO_AC8
+bit 1296 O 1 IO_AC8 1295 1 Z
+bit 1295 C 1 *
+bit 1294 I 1 IO_AK7
+bit 1293 O 1 IO_AK7 1292 1 Z
+bit 1292 C 1 *
+bit 1291 I 1 IO_AJ7
+bit 1290 O 1 IO_AJ7 1289 1 Z
+bit 1289 C 1 *
+bit 1288 O 1 *
+bit 1287 O 1 *
+bit 1286 O 1 *
+bit 1285 O 1 *
+bit 1284 O 1 *
+bit 1283 O 1 *
+bit 1282 O 1 *
+bit 1281 O 1 *
+bit 1280 O 1 *
+bit 1279 O 1 *
+bit 1278 O 1 *
+bit 1277 O 1 *
+bit 1276 O 1 *
+bit 1275 O 1 *
+bit 1274 O 1 *
+bit 1273 O 1 *
+bit 1272 O 1 *
+bit 1271 O 1 *
+bit 1270 I 1 IO_AH7
+bit 1269 O 1 IO_AH7 1268 1 Z
+bit 1268 C 1 *
+bit 1267 I 1 IO_AG7
+bit 1266 O 1 IO_AG7 1265 1 Z
+bit 1265 C 1 *
+bit 1264 I 1 IO_AE7
+bit 1263 O 1 IO_AE7 1262 1 Z
+bit 1262 C 1 *
+bit 1261 I 1 IO_AD7
+bit 1260 O 1 IO_AD7 1259 1 Z
+bit 1259 C 1 *
+bit 1258 I 1 IO_AE6
+bit 1257 O 1 IO_AE6 1256 1 Z
+bit 1256 C 1 *
+bit 1255 I 1 IO_AJ6
+bit 1254 O 1 IO_AJ6 1253 1 Z
+bit 1253 C 1 *
+bit 1252 I 1 IO_AH6
+bit 1251 O 1 IO_AH6 1250 1 Z
+bit 1250 C 1 *
+bit 1249 I 1 IO_AF6
+bit 1248 O 1 IO_AF6 1247 1 Z
+bit 1247 C 1 *
+bit 1246 I 1 IO_AG5
+bit 1245 O 1 IO_AG5 1244 1 Z
+bit 1244 C 1 *
+bit 1243 I 1 IO_AH4
+bit 1242 O 1 IO_AH4 1241 1 Z
+bit 1241 C 1 *
+bit 1240 I 1 IO_AK5
+bit 1239 O 1 IO_AK5 1238 1 Z
+bit 1238 C 1 *
+bit 1237 I 1 IO_AJ5
+bit 1236 O 1 IO_AJ5 1235 1 Z
+bit 1235 C 1 *
+bit 1234 I 1 IO_AK4
+bit 1233 O 1 IO_AK4 1232 1 Z
+bit 1232 C 1 *
+bit 1231 I 1 IO_AJ4
+bit 1230 O 1 IO_AJ4 1229 1 Z
+bit 1229 C 1 *
+bit 1228 I 1 M2_AK3
+bit 1227 I 1 M0_AJ3
+bit 1226 I 1 M1_AH3
+bit 1225 I 1 IO_AH2
+bit 1224 O 1 IO_AH2 1223 1 Z
+bit 1223 C 1 *
+bit 1222 I 1 IO_AH1
+bit 1221 O 1 IO_AH1 1220 1 Z
+bit 1220 C 1 *
+bit 1219 I 1 IO_AG4
+bit 1218 O 1 IO_AG4 1217 1 Z
+bit 1217 C 1 *
+bit 1216 I 1 IO_AG3
+bit 1215 O 1 IO_AG3 1214 1 Z
+bit 1214 C 1 *
+bit 1213 I 1 IO_AG2
+bit 1212 O 1 IO_AG2 1211 1 Z
+bit 1211 C 1 *
+bit 1210 I 1 IO_AG1
+bit 1209 O 1 IO_AG1 1208 1 Z
+bit 1208 C 1 *
+bit 1207 I 1 IO_AF2
+bit 1206 O 1 IO_AF2 1205 1 Z
+bit 1205 C 1 *
+bit 1204 I 1 IO_AF1
+bit 1203 O 1 IO_AF1 1202 1 Z
+bit 1202 C 1 *
+bit 1201 I 1 IO_AF4
+bit 1200 O 1 IO_AF4 1199 1 Z
+bit 1199 C 1 *
+bit 1198 I 1 IO_AE5
+bit 1197 O 1 IO_AE5 1196 1 Z
+bit 1196 C 1 *
+bit 1195 I 1 IO_AE3
+bit 1194 O 1 IO_AE3 1193 1 Z
+bit 1193 C 1 *
+bit 1192 I 1 IO_AE2
+bit 1191 O 1 IO_AE2 1190 1 Z
+bit 1190 C 1 *
+bit 1189 O 1 *
+bit 1188 O 1 *
+bit 1187 O 1 *
+bit 1186 O 1 *
+bit 1185 O 1 *
+bit 1184 O 1 *
+bit 1183 O 1 *
+bit 1182 O 1 *
+bit 1181 O 1 *
+bit 1180 O 1 *
+bit 1179 O 1 *
+bit 1178 O 1 *
+bit 1177 O 1 *
+bit 1176 O 1 *
+bit 1175 O 1 *
+bit 1174 O 1 *
+bit 1173 O 1 *
+bit 1172 O 1 *
+bit 1171 I 1 IO_AD4
+bit 1170 O 1 IO_AD4 1169 1 Z
+bit 1169 C 1 *
+bit 1168 I 1 IO_AD3
+bit 1167 O 1 IO_AD3 1166 1 Z
+bit 1166 C 1 *
+bit 1165 I 1 IO_AD2
+bit 1164 O 1 IO_AD2 1163 1 Z
+bit 1163 C 1 *
+bit 1162 I 1 IO_AD1
+bit 1161 O 1 IO_AD1 1160 1 Z
+bit 1160 C 1 *
+bit 1159 I 1 IO_AD6
+bit 1158 O 1 IO_AD6 1157 1 Z
+bit 1157 C 1 *
+bit 1156 I 1 IO_AC7
+bit 1155 O 1 IO_AC7 1154 1 Z
+bit 1154 C 1 *
+bit 1153 I 1 IO_AC6
+bit 1152 O 1 IO_AC6 1151 1 Z
+bit 1151 C 1 *
+bit 1150 I 1 IO_AC5
+bit 1149 O 1 IO_AC5 1148 1 Z
+bit 1148 C 1 *
+bit 1147 I 1 IO_AC4
+bit 1146 O 1 IO_AC4 1145 1 Z
+bit 1145 C 1 *
+bit 1144 I 1 IO_AC3
+bit 1143 O 1 IO_AC3 1142 1 Z
+bit 1142 C 1 *
+bit 1141 O 1 *
+bit 1140 O 1 *
+bit 1139 O 1 *
+bit 1138 I 1 IO_AB6
+bit 1137 O 1 IO_AB6 1136 1 Z
+bit 1136 C 1 *
+bit 1135 I 1 IO_AC2
+bit 1134 O 1 IO_AC2 1133 1 Z
+bit 1133 C 1 *
+bit 1132 I 1 IO_AC1
+bit 1131 O 1 IO_AC1 1130 1 Z
+bit 1130 C 1 *
+bit 1129 I 1 IO_AB5
+bit 1128 O 1 IO_AB5 1127 1 Z
+bit 1127 C 1 *
+bit 1126 I 1 IO_AB4
+bit 1125 O 1 IO_AB4 1124 1 Z
+bit 1124 C 1 *
+bit 1123 I 1 IO_AB2
+bit 1122 O 1 IO_AB2 1121 1 Z
+bit 1121 C 1 *
+bit 1120 I 1 IO_AB1
+bit 1119 O 1 IO_AB1 1118 1 Z
+bit 1118 C 1 *
+bit 1117 I 1 IO_AB8
+bit 1116 O 1 IO_AB8 1115 1 Z
+bit 1115 C 1 *
+bit 1114 I 1 IO_AA9
+bit 1113 O 1 IO_AA9 1112 1 Z
+bit 1112 C 1 *
+bit 1111 I 1 IO_AA7
+bit 1110 O 1 IO_AA7 1109 1 Z
+bit 1109 C 1 *
+bit 1108 I 1 IO_AA6
+bit 1107 O 1 IO_AA6 1106 1 Z
+bit 1106 C 1 *
+bit 1105 O 1 *
+bit 1104 O 1 *
+bit 1103 O 1 *
+bit 1102 O 1 *
+bit 1101 O 1 *
+bit 1100 O 1 *
+bit 1099 O 1 *
+bit 1098 O 1 *
+bit 1097 O 1 *
+bit 1096 O 1 *
+bit 1095 O 1 *
+bit 1094 O 1 *
+bit 1093 I 1 IO_AA3
+bit 1092 O 1 IO_AA3 1091 1 Z
+bit 1091 C 1 *
+bit 1090 I 1 IO_AA2
+bit 1089 O 1 IO_AA2 1088 1 Z
+bit 1088 C 1 *
+bit 1087 I 1 IO_AA10
+bit 1086 O 1 IO_AA10 1085 1 Z
+bit 1085 C 1 *
+bit 1084 I 1 IO_Y10
+bit 1083 O 1 IO_Y10 1082 1 Z
+bit 1082 C 1 *
+bit 1081 I 1 IO_Y8
+bit 1080 O 1 IO_Y8 1079 1 Z
+bit 1079 C 1 *
+bit 1078 I 1 IO_Y7
+bit 1077 O 1 IO_Y7 1076 1 Z
+bit 1076 C 1 *
+bit 1075 I 1 IO_Y6
+bit 1074 O 1 IO_Y6 1073 1 Z
+bit 1073 C 1 *
+bit 1072 I 1 IO_Y5
+bit 1071 O 1 IO_Y5 1070 1 Z
+bit 1070 C 1 *
+bit 1069 I 1 IO_Y4
+bit 1068 O 1 IO_Y4 1067 1 Z
+bit 1067 C 1 *
+bit 1066 I 1 IO_Y3
+bit 1065 O 1 IO_Y3 1064 1 Z
+bit 1064 C 1 *
+bit 1063 O 1 *
+bit 1062 O 1 *
+bit 1061 O 1 *
+bit 1060 O 1 *
+bit 1059 O 1 *
+bit 1058 O 1 *
+bit 1057 I 1 IO_Y2
+bit 1056 O 1 IO_Y2 1055 1 Z
+bit 1055 C 1 *
+bit 1054 I 1 IO_Y1
+bit 1053 O 1 IO_Y1 1052 1 Z
+bit 1052 C 1 *
+bit 1051 I 1 IO_W9
+bit 1050 O 1 IO_W9 1049 1 Z
+bit 1049 C 1 *
+bit 1048 I 1 IO_W8
+bit 1047 O 1 IO_W8 1046 1 Z
+bit 1046 C 1 *
+bit 1045 I 1 IO_W7
+bit 1044 O 1 IO_W7 1043 1 Z
+bit 1043 C 1 *
+bit 1042 I 1 IO_W6
+bit 1041 O 1 IO_W6 1040 1 Z
+bit 1040 C 1 *
+bit 1039 I 1 IO_W4
+bit 1038 O 1 IO_W4 1037 1 Z
+bit 1037 C 1 *
+bit 1036 I 1 IO_W3
+bit 1035 O 1 IO_W3 1034 1 Z
+bit 1034 C 1 *
+bit 1033 O 1 *
+bit 1032 O 1 *
+bit 1031 O 1 *
+bit 1030 O 1 *
+bit 1029 O 1 *
+bit 1028 O 1 *
+bit 1027 O 1 *
+bit 1026 O 1 *
+bit 1025 O 1 *
+bit 1024 O 1 *
+bit 1023 O 1 *
+bit 1022 O 1 *
+bit 1021 I 1 IO_W2
+bit 1020 O 1 IO_W2 1019 1 Z
+bit 1019 C 1 *
+bit 1018 I 1 IO_W1
+bit 1017 O 1 IO_W1 1016 1 Z
+bit 1016 C 1 *
+bit 1015 I 1 IO_W10
+bit 1014 O 1 IO_W10 1013 1 Z
+bit 1013 C 1 *
+bit 1012 I 1 IO_V10
+bit 1011 O 1 IO_V10 1010 1 Z
+bit 1010 C 1 *
+bit 1009 I 1 IO_V9
+bit 1008 O 1 IO_V9 1007 1 Z
+bit 1007 C 1 *
+bit 1006 I 1 IO_V8
+bit 1005 O 1 IO_V8 1004 1 Z
+bit 1004 C 1 *
+bit 1003 I 1 IO_W5
+bit 1002 O 1 IO_W5 1001 1 Z
+bit 1001 C 1 *
+bit 1000 I 1 IO_V6
+bit 999 O 1 IO_V6 998 1 Z
+bit 998 C 1 *
+bit 997 I 1 IO_V5
+bit 996 O 1 IO_V5 995 1 Z
+bit 995 C 1 *
+bit 994 I 1 IO_V4
+bit 993 O 1 IO_V4 992 1 Z
+bit 992 C 1 *
+bit 991 O 1 *
+bit 990 O 1 *
+bit 989 O 1 *
+bit 988 O 1 *
+bit 987 O 1 *
+bit 986 O 1 *
+bit 985 I 1 IO_V2
+bit 984 O 1 IO_V2 983 1 Z
+bit 983 C 1 *
+bit 982 I 1 IO_V1
+bit 981 O 1 IO_V1 980 1 Z
+bit 980 C 1 *
+bit 979 I 1 IO_U10
+bit 978 O 1 IO_U10 977 1 Z
+bit 977 C 1 *
+bit 976 I 1 IO_U9
+bit 975 O 1 IO_U9 974 1 Z
+bit 974 C 1 *
+bit 973 I 1 IO_U7
+bit 972 O 1 IO_U7 971 1 Z
+bit 971 C 1 *
+bit 970 I 1 IO_U6
+bit 969 O 1 IO_U6 968 1 Z
+bit 968 C 1 *
+bit 967 I 1 IO_U3
+bit 966 O 1 IO_U3 965 1 Z
+bit 965 C 1 *
+bit 964 I 1 IO_U2
+bit 963 O 1 IO_U2 962 1 Z
+bit 962 C 1 *
+bit 961 I 1 IO_T10
+bit 960 O 1 IO_T10 959 1 Z
+bit 959 C 1 *
+bit 958 I 1 IO_T9
+bit 957 O 1 IO_T9 956 1 Z
+bit 956 C 1 *
+bit 955 O 1 *
+bit 954 O 1 *
+bit 953 O 1 *
+bit 952 O 1 *
+bit 951 O 1 *
+bit 950 O 1 *
+bit 949 O 1 *
+bit 948 O 1 *
+bit 947 O 1 *
+bit 946 O 1 *
+bit 945 O 1 *
+bit 944 O 1 *
+bit 943 O 1 *
+bit 942 O 1 *
+bit 941 O 1 *
+bit 940 O 1 *
+bit 939 O 1 *
+bit 938 O 1 *
+bit 937 I 1 IO_T8
+bit 936 O 1 IO_T8 935 1 Z
+bit 935 C 1 *
+bit 934 I 1 IO_T7
+bit 933 O 1 IO_T7 932 1 Z
+bit 932 C 1 *
+bit 931 I 1 IO_T6
+bit 930 O 1 IO_T6 929 1 Z
+bit 929 C 1 *
+bit 928 I 1 IO_T5
+bit 927 O 1 IO_T5 926 1 Z
+bit 926 C 1 *
+bit 925 I 1 IO_T4
+bit 924 O 1 IO_T4 923 1 Z
+bit 923 C 1 *
+bit 922 I 1 IO_T3
+bit 921 O 1 IO_T3 920 1 Z
+bit 920 C 1 *
+bit 919 I 1 IO_T2
+bit 918 O 1 IO_T2 917 1 Z
+bit 917 C 1 *
+bit 916 I 1 IO_T1
+bit 915 O 1 IO_T1 914 1 Z
+bit 914 C 1 *
+bit 913 I 1 IO_R1
+bit 912 O 1 IO_R1 911 1 Z
+bit 911 C 1 *
+bit 910 I 1 IO_R2
+bit 909 O 1 IO_R2 908 1 Z
+bit 908 C 1 *
+bit 907 I 1 IO_R3
+bit 906 O 1 IO_R3 905 1 Z
+bit 905 C 1 *
+bit 904 I 1 IO_R4
+bit 903 O 1 IO_R4 902 1 Z
+bit 902 C 1 *
+bit 901 I 1 IO_R5
+bit 900 O 1 IO_R5 899 1 Z
+bit 899 C 1 *
+bit 898 I 1 IO_R6
+bit 897 O 1 IO_R6 896 1 Z
+bit 896 C 1 *
+bit 895 I 1 IO_R7
+bit 894 O 1 IO_R7 893 1 Z
+bit 893 C 1 *
+bit 892 I 1 IO_R8
+bit 891 O 1 IO_R8 890 1 Z
+bit 890 C 1 *
+bit 889 O 1 *
+bit 888 O 1 *
+bit 887 O 1 *
+bit 886 O 1 *
+bit 885 O 1 *
+bit 884 O 1 *
+bit 883 O 1 *
+bit 882 O 1 *
+bit 881 O 1 *
+bit 880 O 1 *
+bit 879 O 1 *
+bit 878 O 1 *
+bit 877 O 1 *
+bit 876 O 1 *
+bit 875 O 1 *
+bit 874 O 1 *
+bit 873 O 1 *
+bit 872 O 1 *
+bit 871 I 1 IO_R9
+bit 870 O 1 IO_R9 869 1 Z
+bit 869 C 1 *
+bit 868 I 1 IO_R10
+bit 867 O 1 IO_R10 866 1 Z
+bit 866 C 1 *
+bit 865 I 1 IO_P2
+bit 864 O 1 IO_P2 863 1 Z
+bit 863 C 1 *
+bit 862 I 1 IO_P3
+bit 861 O 1 IO_P3 860 1 Z
+bit 860 C 1 *
+bit 859 I 1 IO_P6
+bit 858 O 1 IO_P6 857 1 Z
+bit 857 C 1 *
+bit 856 I 1 IO_P7
+bit 855 O 1 IO_P7 854 1 Z
+bit 854 C 1 *
+bit 853 I 1 IO_P9
+bit 852 O 1 IO_P9 851 1 Z
+bit 851 C 1 *
+bit 850 I 1 IO_P10
+bit 849 O 1 IO_P10 848 1 Z
+bit 848 C 1 *
+bit 847 I 1 IO_N1
+bit 846 O 1 IO_N1 845 1 Z
+bit 845 C 1 *
+bit 844 I 1 IO_N2
+bit 843 O 1 IO_N2 842 1 Z
+bit 842 C 1 *
+bit 841 O 1 *
+bit 840 O 1 *
+bit 839 O 1 *
+bit 838 O 1 *
+bit 837 O 1 *
+bit 836 O 1 *
+bit 835 I 1 IO_N4
+bit 834 O 1 IO_N4 833 1 Z
+bit 833 C 1 *
+bit 832 I 1 IO_N5
+bit 831 O 1 IO_N5 830 1 Z
+bit 830 C 1 *
+bit 829 I 1 IO_N6
+bit 828 O 1 IO_N6 827 1 Z
+bit 827 C 1 *
+bit 826 I 1 IO_M5
+bit 825 O 1 IO_M5 824 1 Z
+bit 824 C 1 *
+bit 823 I 1 IO_N8
+bit 822 O 1 IO_N8 821 1 Z
+bit 821 C 1 *
+bit 820 I 1 IO_N9
+bit 819 O 1 IO_N9 818 1 Z
+bit 818 C 1 *
+bit 817 I 1 IO_N10
+bit 816 O 1 IO_N10 815 1 Z
+bit 815 C 1 *
+bit 814 I 1 IO_M10
+bit 813 O 1 IO_M10 812 1 Z
+bit 812 C 1 *
+bit 811 I 1 IO_M1
+bit 810 O 1 IO_M1 809 1 Z
+bit 809 C 1 *
+bit 808 I 1 IO_M2
+bit 807 O 1 IO_M2 806 1 Z
+bit 806 C 1 *
+bit 805 O 1 *
+bit 804 O 1 *
+bit 803 O 1 *
+bit 802 O 1 *
+bit 801 O 1 *
+bit 800 O 1 *
+bit 799 O 1 *
+bit 798 O 1 *
+bit 797 O 1 *
+bit 796 O 1 *
+bit 795 O 1 *
+bit 794 O 1 *
+bit 793 I 1 IO_M3
+bit 792 O 1 IO_M3 791 1 Z
+bit 791 C 1 *
+bit 790 I 1 IO_M4
+bit 789 O 1 IO_M4 788 1 Z
+bit 788 C 1 *
+bit 787 I 1 IO_M6
+bit 786 O 1 IO_M6 785 1 Z
+bit 785 C 1 *
+bit 784 I 1 IO_M7
+bit 783 O 1 IO_M7 782 1 Z
+bit 782 C 1 *
+bit 781 I 1 IO_M8
+bit 780 O 1 IO_M8 779 1 Z
+bit 779 C 1 *
+bit 778 I 1 IO_M9
+bit 777 O 1 IO_M9 776 1 Z
+bit 776 C 1 *
+bit 775 I 1 IO_L1
+bit 774 O 1 IO_L1 773 1 Z
+bit 773 C 1 *
+bit 772 I 1 IO_L2
+bit 771 O 1 IO_L2 770 1 Z
+bit 770 C 1 *
+bit 769 O 1 *
+bit 768 O 1 *
+bit 767 O 1 *
+bit 766 O 1 *
+bit 765 O 1 *
+bit 764 O 1 *
+bit 763 I 1 IO_L3
+bit 762 O 1 IO_L3 761 1 Z
+bit 761 C 1 *
+bit 760 I 1 IO_L4
+bit 759 O 1 IO_L4 758 1 Z
+bit 758 C 1 *
+bit 757 I 1 IO_L5
+bit 756 O 1 IO_L5 755 1 Z
+bit 755 C 1 *
+bit 754 I 1 IO_L6
+bit 753 O 1 IO_L6 752 1 Z
+bit 752 C 1 *
+bit 751 I 1 IO_L7
+bit 750 O 1 IO_L7 749 1 Z
+bit 749 C 1 *
+bit 748 I 1 IO_L8
+bit 747 O 1 IO_L8 746 1 Z
+bit 746 C 1 *
+bit 745 I 1 IO_L10
+bit 744 O 1 IO_L10 743 1 Z
+bit 743 C 1 *
+bit 742 I 1 IO_K10
+bit 741 O 1 IO_K10 740 1 Z
+bit 740 C 1 *
+bit 739 I 1 IO_K2
+bit 738 O 1 IO_K2 737 1 Z
+bit 737 C 1 *
+bit 736 I 1 IO_K3
+bit 735 O 1 IO_K3 734 1 Z
+bit 734 C 1 *
+bit 733 O 1 *
+bit 732 O 1 *
+bit 731 O 1 *
+bit 730 O 1 *
+bit 729 O 1 *
+bit 728 O 1 *
+bit 727 O 1 *
+bit 726 O 1 *
+bit 725 O 1 *
+bit 724 O 1 *
+bit 723 O 1 *
+bit 722 O 1 *
+bit 721 I 1 IO_K6
+bit 720 O 1 IO_K6 719 1 Z
+bit 719 C 1 *
+bit 718 I 1 IO_K7
+bit 717 O 1 IO_K7 716 1 Z
+bit 716 C 1 *
+bit 715 I 1 IO_K9
+bit 714 O 1 IO_K9 713 1 Z
+bit 713 C 1 *
+bit 712 I 1 IO_J8
+bit 711 O 1 IO_J8 710 1 Z
+bit 710 C 1 *
+bit 709 I 1 IO_J1
+bit 708 O 1 IO_J1 707 1 Z
+bit 707 C 1 *
+bit 706 I 1 IO_J2
+bit 705 O 1 IO_J2 704 1 Z
+bit 704 C 1 *
+bit 703 I 1 IO_J4
+bit 702 O 1 IO_J4 701 1 Z
+bit 701 C 1 *
+bit 700 I 1 IO_J5
+bit 699 O 1 IO_J5 698 1 Z
+bit 698 C 1 *
+bit 697 I 1 IO_H1
+bit 696 O 1 IO_H1 695 1 Z
+bit 695 C 1 *
+bit 694 I 1 IO_H2
+bit 693 O 1 IO_H2 692 1 Z
+bit 692 C 1 *
+bit 691 I 1 IO_J6
+bit 690 O 1 IO_J6 689 1 Z
+bit 689 C 1 *
+bit 688 O 1 *
+bit 687 O 1 *
+bit 686 O 1 *
+bit 685 I 1 IO_H3
+bit 684 O 1 IO_H3 683 1 Z
+bit 683 C 1 *
+bit 682 I 1 IO_H4
+bit 681 O 1 IO_H4 680 1 Z
+bit 680 C 1 *
+bit 679 I 1 IO_H5
+bit 678 O 1 IO_H5 677 1 Z
+bit 677 C 1 *
+bit 676 I 1 IO_H6
+bit 675 O 1 IO_H6 674 1 Z
+bit 674 C 1 *
+bit 673 I 1 IO_H7
+bit 672 O 1 IO_H7 671 1 Z
+bit 671 C 1 *
+bit 670 I 1 IO_G6
+bit 669 O 1 IO_G6 668 1 Z
+bit 668 C 1 *
+bit 667 I 1 IO_G1
+bit 666 O 1 IO_G1 665 1 Z
+bit 665 C 1 *
+bit 664 I 1 IO_G2
+bit 663 O 1 IO_G2 662 1 Z
+bit 662 C 1 *
+bit 661 I 1 IO_G3
+bit 660 O 1 IO_G3 659 1 Z
+bit 659 C 1 *
+bit 658 I 1 IO_G4
+bit 657 O 1 IO_G4 656 1 Z
+bit 656 C 1 *
+bit 655 O 1 *
+bit 654 O 1 *
+bit 653 O 1 *
+bit 652 O 1 *
+bit 651 O 1 *
+bit 650 O 1 *
+bit 649 O 1 *
+bit 648 O 1 *
+bit 647 O 1 *
+bit 646 O 1 *
+bit 645 O 1 *
+bit 644 O 1 *
+bit 643 O 1 *
+bit 642 O 1 *
+bit 641 O 1 *
+bit 640 O 1 *
+bit 639 O 1 *
+bit 638 O 1 *
+bit 637 I 1 IO_F2
+bit 636 O 1 IO_F2 635 1 Z
+bit 635 C 1 *
+bit 634 I 1 IO_F3
+bit 633 O 1 IO_F3 632 1 Z
+bit 632 C 1 *
+bit 631 I 1 IO_F5
+bit 630 O 1 IO_F5 629 1 Z
+bit 629 C 1 *
+bit 628 I 1 IO_E4
+bit 627 O 1 IO_E4 626 1 Z
+bit 626 C 1 *
+bit 625 I 1 IO_E1
+bit 624 O 1 IO_E1 623 1 Z
+bit 623 C 1 *
+bit 622 I 1 IO_E2
+bit 621 O 1 IO_E2 620 1 Z
+bit 620 C 1 *
+bit 619 I 1 IO_D1
+bit 618 O 1 IO_D1 617 1 Z
+bit 617 C 1 *
+bit 616 I 1 IO_D2
+bit 615 O 1 IO_D2 614 1 Z
+bit 614 C 1 *
+bit 613 I 1 IO_D3
+bit 612 O 1 IO_D3 611 1 Z
+bit 611 C 1 *
+bit 610 I 1 IO_D4
+bit 609 O 1 IO_D4 608 1 Z
+bit 608 C 1 *
+bit 607 I 1 IO_C1
+bit 606 O 1 IO_C1 605 1 Z
+bit 605 C 1 *
+bit 604 I 1 IO_C2
+bit 603 O 1 IO_C2 602 1 Z
+bit 602 C 1 *
+bit 601 O 1 *
+bit 600 I 1 HSWAP_EN_A3
+bit 599 I 1 IO_C4
+bit 598 O 1 IO_C4 597 1 Z
+bit 597 C 1 *
+bit 596 I 1 IO_B4
+bit 595 O 1 IO_B4 594 1 Z
+bit 594 C 1 *
+bit 593 I 1 IO_A4
+bit 592 O 1 IO_A4 591 1 Z
+bit 591 C 1 *
+bit 590 I 1 IO_B5
+bit 589 O 1 IO_B5 588 1 Z
+bit 588 C 1 *
+bit 587 I 1 IO_A5
+bit 586 O 1 IO_A5 585 1 Z
+bit 585 C 1 *
+bit 584 O 1 *
+bit 583 O 1 *
+bit 582 O 1 *
+bit 581 I 1 IO_D5
+bit 580 O 1 IO_D5 579 1 Z
+bit 579 C 1 *
+bit 578 I 1 IO_E6
+bit 577 O 1 IO_E6 576 1 Z
+bit 576 C 1 *
+bit 575 I 1 IO_C6
+bit 574 O 1 IO_C6 573 1 Z
+bit 573 C 1 *
+bit 572 I 1 IO_B6
+bit 571 O 1 IO_B6 570 1 Z
+bit 570 C 1 *
+bit 569 O 1 *
+bit 568 O 1 *
+bit 567 O 1 *
+bit 566 I 1 IO_F6
+bit 565 O 1 IO_F6 564 1 Z
+bit 564 C 1 *
+bit 563 I 1 IO_F7
+bit 562 O 1 IO_F7 561 1 Z
+bit 561 C 1 *
+bit 560 I 1 IO_D7
+bit 559 O 1 IO_D7 558 1 Z
+bit 558 C 1 *
+bit 557 I 1 IO_C7
+bit 556 O 1 IO_C7 555 1 Z
+bit 555 C 1 *
+bit 554 O 1 *
+bit 553 O 1 *
+bit 552 O 1 *
+bit 551 O 1 *
+bit 550 O 1 *
+bit 549 O 1 *
+bit 548 O 1 *
+bit 547 O 1 *
+bit 546 O 1 *
+bit 545 O 1 *
+bit 544 O 1 *
+bit 543 O 1 *
+bit 542 O 1 *
+bit 541 O 1 *
+bit 540 O 1 *
+bit 539 O 1 *
+bit 538 O 1 *
+bit 537 O 1 *
+bit 536 I 1 IO_B7
+bit 535 O 1 IO_B7 534 1 Z
+bit 534 C 1 *
+bit 533 I 1 IO_A7
+bit 532 O 1 IO_A7 531 1 Z
+bit 531 C 1 *
+bit 530 I 1 IO_G7
+bit 529 O 1 IO_G7 528 1 Z
+bit 528 C 1 *
+bit 527 I 1 IO_H8
+bit 526 O 1 IO_H8 525 1 Z
+bit 525 C 1 *
+bit 524 I 1 IO_G8
+bit 523 O 1 IO_G8 522 1 Z
+bit 522 C 1 *
+bit 521 I 1 IO_F8
+bit 520 O 1 IO_F8 519 1 Z
+bit 519 C 1 *
+bit 518 I 1 IO_E8
+bit 517 O 1 IO_E8 516 1 Z
+bit 516 C 1 *
+bit 515 I 1 IO_D8
+bit 514 O 1 IO_D8 513 1 Z
+bit 513 C 1 *
+bit 512 I 1 IO_C8
+bit 511 O 1 IO_C8 510 1 Z
+bit 510 C 1 *
+bit 509 O 1 *
+bit 508 O 1 *
+bit 507 O 1 *
+bit 506 I 1 IO_B8
+bit 505 O 1 IO_B8 504 1 Z
+bit 504 C 1 *
+bit 503 I 1 IO_A8
+bit 502 O 1 IO_A8 501 1 Z
+bit 501 C 1 *
+bit 500 I 1 IO_J9
+bit 499 O 1 IO_J9 498 1 Z
+bit 498 C 1 *
+bit 497 I 1 IO_H9
+bit 496 O 1 IO_H9 495 1 Z
+bit 495 C 1 *
+bit 494 I 1 IO_F9
+bit 493 O 1 IO_F9 492 1 Z
+bit 492 C 1 *
+bit 491 I 1 IO_E9
+bit 490 O 1 IO_E9 489 1 Z
+bit 489 C 1 *
+bit 488 I 1 IO_D9
+bit 487 O 1 IO_D9 486 1 Z
+bit 486 C 1 *
+bit 485 I 1 IO_B9
+bit 484 O 1 IO_B9 483 1 Z
+bit 483 C 1 *
+bit 482 I 1 IO_A9
+bit 481 O 1 IO_A9 480 1 Z
+bit 480 C 1 *
+bit 479 O 1 *
+bit 478 O 1 *
+bit 477 O 1 *
+bit 476 O 1 *
+bit 475 O 1 *
+bit 474 O 1 *
+bit 473 O 1 *
+bit 472 O 1 *
+bit 471 O 1 *
+bit 470 O 1 *
+bit 469 O 1 *
+bit 468 O 1 *
+bit 467 O 1 *
+bit 466 O 1 *
+bit 465 O 1 *
+bit 464 O 1 *
+bit 463 O 1 *
+bit 462 O 1 *
+bit 461 I 1 IO_G10
+bit 460 O 1 IO_G10 459 1 Z
+bit 459 C 1 *
+bit 458 I 1 IO_F10
+bit 457 O 1 IO_F10 456 1 Z
+bit 456 C 1 *
+bit 455 I 1 IO_C10
+bit 454 O 1 IO_C10 453 1 Z
+bit 453 C 1 *
+bit 452 I 1 IO_B10
+bit 451 O 1 IO_B10 450 1 Z
+bit 450 C 1 *
+bit 449 O 1 *
+bit 448 O 1 *
+bit 447 O 1 *
+bit 446 I 1 IO_J10
+bit 445 O 1 IO_J10 444 1 Z
+bit 444 C 1 *
+bit 443 I 1 IO_K11
+bit 442 O 1 IO_K11 441 1 Z
+bit 441 C 1 *
+bit 440 I 1 IO_H11
+bit 439 O 1 IO_H11 438 1 Z
+bit 438 C 1 *
+bit 437 I 1 IO_G11
+bit 436 O 1 IO_G11 435 1 Z
+bit 435 C 1 *
+bit 434 O 1 *
+bit 433 O 1 *
+bit 432 O 1 *
+bit 431 I 1 IO_F11
+bit 430 O 1 IO_F11 429 1 Z
+bit 429 C 1 *
+bit 428 I 1 IO_E11
+bit 427 O 1 IO_E11 426 1 Z
+bit 426 C 1 *
+bit 425 I 1 IO_D11
+bit 424 O 1 IO_D11 423 1 Z
+bit 423 C 1 *
+bit 422 I 1 IO_C11
+bit 421 O 1 IO_C11 420 1 Z
+bit 420 C 1 *
+bit 419 O 1 *
+bit 418 O 1 *
+bit 417 O 1 *
+bit 416 I 1 IO_B11
+bit 415 O 1 IO_B11 414 1 Z
+bit 414 C 1 *
+bit 413 I 1 IO_A11
+bit 412 O 1 IO_A11 411 1 Z
+bit 411 C 1 *
+bit 410 I 1 IO_K12
+bit 409 O 1 IO_K12 408 1 Z
+bit 408 C 1 *
+bit 407 I 1 IO_J12
+bit 406 O 1 IO_J12 405 1 Z
+bit 405 C 1 *
+bit 404 O 1 *
+bit 403 O 1 *
+bit 402 O 1 *
+bit 401 I 1 IO_H12
+bit 400 O 1 IO_H12 399 1 Z
+bit 399 C 1 *
+bit 398 I 1 IO_G12
+bit 397 O 1 IO_G12 396 1 Z
+bit 396 C 1 *
+bit 395 I 1 IO_F12
+bit 394 O 1 IO_F12 393 1 Z
+bit 393 C 1 *
+bit 392 I 1 IO_E12
+bit 391 O 1 IO_E12 390 1 Z
+bit 390 C 1 *
+bit 389 O 1 *
+bit 388 O 1 *
+bit 387 O 1 *
+bit 386 I 1 IO_D12
+bit 385 O 1 IO_D12 384 1 Z
+bit 384 C 1 *
+bit 383 I 1 IO_C12
+bit 382 O 1 IO_C12 381 1 Z
+bit 381 C 1 *
+bit 380 I 1 IO_B12
+bit 379 O 1 IO_B12 378 1 Z
+bit 378 C 1 *
+bit 377 I 1 IO_A12
+bit 376 O 1 IO_A12 375 1 Z
+bit 375 C 1 *
+bit 374 I 1 IO_K13
+bit 373 O 1 IO_K13 372 1 Z
+bit 372 C 1 *
+bit 371 I 1 IO_J13
+bit 370 O 1 IO_J13 369 1 Z
+bit 369 C 1 *
+bit 368 I 1 IO_H13
+bit 367 O 1 IO_H13 366 1 Z
+bit 366 C 1 *
+bit 365 I 1 IO_F13
+bit 364 O 1 IO_F13 363 1 Z
+bit 363 C 1 *
+bit 362 I 1 IO_E13
+bit 361 O 1 IO_E13 360 1 Z
+bit 360 C 1 *
+bit 359 I 1 IO_D13
+bit 358 O 1 IO_D13 357 1 Z
+bit 357 C 1 *
+bit 356 I 1 IO_B13
+bit 355 O 1 IO_B13 354 1 Z
+bit 354 C 1 *
+bit 353 I 1 IO_A13
+bit 352 O 1 IO_A13 351 1 Z
+bit 351 C 1 *
+bit 350 I 1 IO_K14
+bit 349 O 1 IO_K14 348 1 Z
+bit 348 C 1 *
+bit 347 I 1 IO_J14
+bit 346 O 1 IO_J14 345 1 Z
+bit 345 C 1 *
+bit 344 I 1 IO_K15
+bit 343 O 1 IO_K15 342 1 Z
+bit 342 C 1 *
+bit 341 I 1 IO_G14
+bit 340 O 1 IO_G14 339 1 Z
+bit 339 C 1 *
+bit 338 I 1 IO_F14
+bit 337 O 1 IO_F14 336 1 Z
+bit 336 C 1 *
+bit 335 I 1 IO_C14
+bit 334 O 1 IO_C14 333 1 Z
+bit 333 C 1 *
+bit 332 I 1 IO_B14
+bit 331 O 1 IO_B14 330 1 Z
+bit 330 C 1 *
+bit 329 O 1 *
+bit 328 O 1 *
+bit 327 O 1 *
+bit 326 I 1 IO_J15
+bit 325 O 1 IO_J15 324 1 Z
+bit 324 C 1 *
+bit 323 I 1 IO_H15
+bit 322 O 1 IO_H15 321 1 Z
+bit 321 C 1 *
+bit 320 I 1 IO_G15
+bit 319 O 1 IO_G15 318 1 Z
+bit 318 C 1 *
+bit 317 I 1 IO_F15
+bit 316 O 1 IO_F15 315 1 Z
+bit 315 C 1 *
+bit 314 I 1 IO_E15
+bit 313 O 1 IO_E15 312 1 Z
+bit 312 C 1 *
+bit 311 I 1 IO_D15
+bit 310 O 1 IO_D15 309 1 Z
+bit 309 C 1 *
+bit 308 I 1 IO_C15
+bit 307 O 1 IO_C15 306 1 Z
+bit 306 C 1 *
+bit 305 I 1 IO_B15
+bit 304 O 1 IO_B15 303 1 Z
+bit 303 C 1 *
+bit 302 I 1 IO_A15
+bit 301 O 1 IO_A15 300 1 Z
+bit 300 C 1 *
+bit 299 I 1 IO_A16
+bit 298 O 1 IO_A16 297 1 Z
+bit 297 C 1 *
+bit 296 I 1 IO_B16
+bit 295 O 1 IO_B16 294 1 Z
+bit 294 C 1 *
+bit 293 I 1 IO_C16
+bit 292 O 1 IO_C16 291 1 Z
+bit 291 C 1 *
+bit 290 I 1 IO_D16
+bit 289 O 1 IO_D16 288 1 Z
+bit 288 C 1 *
+bit 287 I 1 IO_E16
+bit 286 O 1 IO_E16 285 1 Z
+bit 285 C 1 *
+bit 284 I 1 IO_F16
+bit 283 O 1 IO_F16 282 1 Z
+bit 282 C 1 *
+bit 281 I 1 IO_G16
+bit 280 O 1 IO_G16 279 1 Z
+bit 279 C 1 *
+bit 278 I 1 IO_H16
+bit 277 O 1 IO_H16 276 1 Z
+bit 276 C 1 *
+bit 275 I 1 IO_J16
+bit 274 O 1 IO_J16 273 1 Z
+bit 273 C 1 *
+bit 272 I 1 IO_K16
+bit 271 O 1 IO_K16 270 1 Z
+bit 270 C 1 *
+bit 269 I 1 IO_J17
+bit 268 O 1 IO_J17 267 1 Z
+bit 267 C 1 *
+bit 266 I 1 IO_B17
+bit 265 O 1 IO_B17 264 1 Z
+bit 264 C 1 *
+bit 263 I 1 IO_C17
+bit 262 O 1 IO_C17 261 1 Z
+bit 261 C 1 *
+bit 260 I 1 IO_F17
+bit 259 O 1 IO_F17 258 1 Z
+bit 258 C 1 *
+bit 257 I 1 IO_G17
+bit 256 O 1 IO_G17 255 1 Z
+bit 255 C 1 *
+bit 254 O 1 *
+bit 253 O 1 *
+bit 252 O 1 *
+bit 251 I 1 IO_K17
+bit 250 O 1 IO_K17 249 1 Z
+bit 249 C 1 *
+bit 248 I 1 IO_K18
+bit 247 O 1 IO_K18 246 1 Z
+bit 246 C 1 *
+bit 245 I 1 IO_A18
+bit 244 O 1 IO_A18 243 1 Z
+bit 243 C 1 *
+bit 242 I 1 IO_B18
+bit 241 O 1 IO_B18 240 1 Z
+bit 240 C 1 *
+bit 239 O 1 *
+bit 238 O 1 *
+bit 237 O 1 *
+bit 236 I 1 IO_D18
+bit 235 O 1 IO_D18 234 1 Z
+bit 234 C 1 *
+bit 233 I 1 IO_E18
+bit 232 O 1 IO_E18 231 1 Z
+bit 231 C 1 *
+bit 230 I 1 IO_H18
+bit 229 O 1 IO_H18 228 1 Z
+bit 228 C 1 *
+bit 227 I 1 IO_J18
+bit 226 O 1 IO_J18 225 1 Z
+bit 225 C 1 *
+bit 224 I 1 IO_F18
+bit 223 O 1 IO_F18 222 1 Z
+bit 222 C 1 *
+bit 221 I 1 IO_A19
+bit 220 O 1 IO_A19 219 1 Z
+bit 219 C 1 *
+bit 218 I 1 IO_B19
+bit 217 O 1 IO_B19 216 1 Z
+bit 216 C 1 *
+bit 215 I 1 IO_C19
+bit 214 O 1 IO_C19 213 1 Z
+bit 213 C 1 *
+bit 212 I 1 IO_D19
+bit 211 O 1 IO_D19 210 1 Z
+bit 210 C 1 *
+bit 209 O 1 *
+bit 208 O 1 *
+bit 207 O 1 *
+bit 206 I 1 IO_E19
+bit 205 O 1 IO_E19 204 1 Z
+bit 204 C 1 *
+bit 203 I 1 IO_F19
+bit 202 O 1 IO_F19 201 1 Z
+bit 201 C 1 *
+bit 200 I 1 IO_G19
+bit 199 O 1 IO_G19 198 1 Z
+bit 198 C 1 *
+bit 197 I 1 IO_H19
+bit 196 O 1 IO_H19 195 1 Z
+bit 195 C 1 *
+bit 194 O 1 *
+bit 193 O 1 *
+bit 192 O 1 *
+bit 191 I 1 IO_J19
+bit 190 O 1 IO_J19 189 1 Z
+bit 189 C 1 *
+bit 188 I 1 IO_K19
+bit 187 O 1 IO_K19 186 1 Z
+bit 186 C 1 *
+bit 185 I 1 IO_A20
+bit 184 O 1 IO_A20 183 1 Z
+bit 183 C 1 *
+bit 182 I 1 IO_B20
+bit 181 O 1 IO_B20 180 1 Z
+bit 180 C 1 *
+bit 179 O 1 *
+bit 178 O 1 *
+bit 177 O 1 *
+bit 176 I 1 IO_C20
+bit 175 O 1 IO_C20 174 1 Z
+bit 174 C 1 *
+bit 173 I 1 IO_D20
+bit 172 O 1 IO_D20 171 1 Z
+bit 171 C 1 *
+bit 170 I 1 IO_E20
+bit 169 O 1 IO_E20 168 1 Z
+bit 168 C 1 *
+bit 167 I 1 IO_F20
+bit 166 O 1 IO_F20 165 1 Z
+bit 165 C 1 *
+bit 164 O 1 *
+bit 163 O 1 *
+bit 162 O 1 *
+bit 161 I 1 IO_G20
+bit 160 O 1 IO_G20 159 1 Z
+bit 159 C 1 *
+bit 158 I 1 IO_H20
+bit 157 O 1 IO_H20 156 1 Z
+bit 156 C 1 *
+bit 155 I 1 IO_B21
+bit 154 O 1 IO_B21 153 1 Z
+bit 153 C 1 *
+bit 152 I 1 IO_C21
+bit 151 O 1 IO_C21 150 1 Z
+bit 150 C 1 *
+bit 149 I 1 IO_K20
+bit 148 O 1 IO_K20 147 1 Z
+bit 147 C 1 *
+bit 146 I 1 IO_F21
+bit 145 O 1 IO_F21 144 1 Z
+bit 144 C 1 *
+bit 143 I 1 IO_G21
+bit 142 O 1 IO_G21 141 1 Z
+bit 141 C 1 *
+bit 140 I 1 IO_A22
+bit 139 O 1 IO_A22 138 1 Z
+bit 138 C 1 *
+bit 137 I 1 IO_B22
+bit 136 O 1 IO_B22 135 1 Z
+bit 135 C 1 *
+bit 134 O 1 *
+bit 133 O 1 *
+bit 132 O 1 *
+bit 131 O 1 *
+bit 130 O 1 *
+bit 129 O 1 *
+bit 128 O 1 *
+bit 127 O 1 *
+bit 126 O 1 *
+bit 125 O 1 *
+bit 124 O 1 *
+bit 123 O 1 *
+bit 122 O 1 *
+bit 121 O 1 *
+bit 120 O 1 *
+bit 119 I 1 IO_J21
+bit 118 O 1 IO_J21 117 1 Z
+bit 117 C 1 *
+bit 116 I 1 IO_D22
+bit 115 O 1 IO_D22 114 1 Z
+bit 114 C 1 *
+bit 113 I 1 IO_E22
+bit 112 O 1 IO_E22 111 1 Z
+bit 111 C 1 *
+bit 110 I 1 IO_F22
+bit 109 O 1 IO_F22 108 1 Z
+bit 108 C 1 *
+bit 107 I 1 IO_E23
+bit 106 O 1 IO_E23 105 1 Z
+bit 105 C 1 *
+bit 104 O 1 *
+bit 103 O 1 *
+bit 102 O 1 *
+bit 101 I 1 IO_H22
+bit 100 O 1 IO_H22 99 1 Z
+bit 99 C 1 *
+bit 98 I 1 IO_J22
+bit 97 O 1 IO_J22 96 1 Z
+bit 96 C 1 *
+bit 95 I 1 IO_A23
+bit 94 O 1 IO_A23 93 1 Z
+bit 93 C 1 *
+bit 92 I 1 IO_B23
+bit 91 O 1 IO_B23 90 1 Z
+bit 90 C 1 *
+bit 89 O 1 *
+bit 88 O 1 *
+bit 87 O 1 *
+bit 86 I 1 IO_C23
+bit 85 O 1 IO_C23 84 1 Z
+bit 84 C 1 *
+bit 83 I 1 IO_D23
+bit 82 O 1 IO_D23 81 1 Z
+bit 81 C 1 *
+bit 80 I 1 IO_F23
+bit 79 O 1 IO_F23 78 1 Z
+bit 78 C 1 *
+bit 77 I 1 IO_G23
+bit 76 O 1 IO_G23 75 1 Z
+bit 75 C 1 *
+bit 74 O 1 *
+bit 73 O 1 *
+bit 72 O 1 *
+bit 71 I 1 IO_H23
+bit 70 O 1 IO_H23 69 1 Z
+bit 69 C 1 *
+bit 68 I 1 IO_G24
+bit 67 O 1 IO_G24 66 1 Z
+bit 66 C 1 *
+bit 65 I 1 IO_A24
+bit 64 O 1 IO_A24 63 1 Z
+bit 63 C 1 *
+bit 62 I 1 IO_B24
+bit 61 O 1 IO_B24 60 1 Z
+bit 60 C 1 *
+bit 59 O 1 *
+bit 58 O 1 *
+bit 57 O 1 *
+bit 56 O 1 *
+bit 55 O 1 *
+bit 54 O 1 *
+bit 53 O 1 *
+bit 52 O 1 *
+bit 51 O 1 *
+bit 50 O 1 *
+bit 49 O 1 *
+bit 48 O 1 *
+bit 47 O 1 *
+bit 46 O 1 *
+bit 45 O 1 *
+bit 44 O 1 *
+bit 43 O 1 *
+bit 42 O 1 *
+bit 41 I 1 IO_C24
+bit 40 O 1 IO_C24 39 1 Z
+bit 39 C 1 *
+bit 38 I 1 IO_D24
+bit 37 O 1 IO_D24 36 1 Z
+bit 36 C 1 *
+bit 35 I 1 IO_F24
+bit 34 O 1 IO_F24 33 1 Z
+bit 33 C 1 *
+bit 32 I 1 IO_F25
+bit 31 O 1 IO_F25 30 1 Z
+bit 30 C 1 *
+bit 29 I 1 IO_E25
+bit 28 O 1 IO_E25 27 1 Z
+bit 27 C 1 *
+bit 26 I 1 IO_B25
+bit 25 O 1 IO_B25 24 1 Z
+bit 24 C 1 *
+bit 23 I 1 IO_C25
+bit 22 O 1 IO_C25 21 1 Z
+bit 21 C 1 *
+bit 20 I 1 IO_A26
+bit 19 O 1 IO_A26 18 1 Z
+bit 18 C 1 *
+bit 17 I 1 IO_B26
+bit 16 O 1 IO_B26 15 1 Z
+bit 15 C 1 *
+bit 14 O 1 *
+bit 13 O 1 *
+bit 12 O 1 *
+bit 11 I 1 IO_D26
+bit 10 O 1 IO_D26 9 1 Z
+bit 9 C 1 *
+bit 8 I 1 IO_C27
+bit 7 O 1 IO_C27 6 1 Z
+bit 6 C 1 *
+bit 5 I 1 IO_A27
+bit 4 O 1 IO_A27 3 1 Z
+bit 3 C 1 *
+bit 2 I 1 IO_B27
+bit 1 O 1 IO_B27 0 1 Z
+bit 0 C 1 *
--- /dev/null
+0000 xc3s500e_fg320 0
--- /dev/null
+signal TCK
+signal TDI
+signal TDO
+signal TMS
+signal PAD100
+signal PAD101
+signal PAD102
+signal PAD60
+signal PAD61
+signal PAD104
+signal IPAD93
+signal PAD62
+signal PAD105
+signal PAD63
+signal PAD106
+signal PAD107
+signal IPAD204
+signal PAD65
+signal PAD109
+signal IPAD98
+signal PAD66
+signal PAD67
+signal PAD69
+signal IPAD209
+signal IPAD137
+signal IPAD138
+signal PAD181
+signal PAD182
+signal PAD183
+signal IPAD21
+signal PAD185
+signal IPAD22
+signal PAD186
+signal PAD187
+signal PAD188
+signal IPAD28
+signal IPAD29
+signal PAD110
+signal PAD111
+signal PAD70
+signal PAD113
+signal PAD71
+signal PAD114
+signal PAD72
+signal PAD115
+signal PAD116
+signal PAD117
+signal PAD74
+signal IPAD214
+signal PAD118
+signal PAD75
+signal PAD76
+signal PAD77
+signal IPAD144
+signal IPAD145
+signal PAD79
+signal IPAD219
+signal PAD190
+signal PAD191
+signal PAD192
+signal PAD193
+signal PAD195
+signal PAD196
+signal PAD197
+signal PAD198
+signal IPAD35
+signal IPAD36
+signal PAD120
+signal DONE
+signal PAD121
+signal PAD122
+signal PAD80
+signal PAD123
+signal PAD81
+signal PAD124
+signal PAD82
+signal PAD127
+signal PAD84
+signal IPAD151
+signal PAD128
+signal PAD85
+signal IPAD224
+signal IPAD152
+signal PAD86
+signal PAD87
+signal IPAD228
+signal PAD89
+signal IPAD3
+signal IPAD158
+signal IPAD159
+signal IPAD9
+signal PAD11
+signal IPAD42
+signal PAD12
+signal IPAD43
+signal PAD14
+signal IPAD46
+signal PAD15
+signal PAD16
+signal PAD17
+signal PAD18
+signal PAD19
+signal PAD200
+signal PAD201
+signal PAD202
+signal PAD203
+signal PAD130
+signal PAD131
+signal PAD205
+signal PAD132
+signal PAD90
+signal PAD206
+signal PAD133
+signal PAD91
+signal PAD207
+signal PAD134
+signal PAD208
+signal PAD92
+signal PAD135
+signal PAD136
+signal PAD94
+signal PAD95
+signal IPAD162
+signal PAD139
+signal PAD96
+signal PAD97
+signal PAD99
+signal PAD20
+signal IPAD54
+signal PAD23
+signal IPAD55
+signal PAD24
+signal PAD25
+signal PAD26
+signal IPAD58
+signal PAD27
+signal IPAD59
+signal PAD210
+signal PAD211
+signal PAD212
+signal PAD140
+signal PAD213
+signal PAD141
+signal PAD142
+signal PAD215
+signal PAD143
+signal PAD216
+signal PAD217
+signal PAD218
+signal PAD146
+signal PAD147
+signal IPAD170
+signal PAD148
+signal IPAD171
+signal PAD149
+signal IPAD174
+signal IPAD175
+signal PAD30
+signal PAD31
+signal PAD32
+signal IPAD64
+signal PAD33
+signal PAD34
+signal PAD1
+signal PAD2
+signal IPAD68
+signal PAD37
+signal PAD4
+signal IPAD103
+signal PAD5
+signal PAD38
+signal PAD6
+signal PAD39
+signal PAD220
+signal PAD7
+signal PAD221
+signal PAD8
+signal PAD222
+signal IPAD108
+signal PAD150
+signal PAD223
+signal PAD225
+signal PAD153
+signal PAD226
+signal PAD154
+signal PAD227
+signal PAD155
+signal PAD156
+signal PAD229
+signal PAD157
+signal IPAD180
+signal IPAD184
+signal IPAD189
+signal PAD40
+signal PAD41
+signal IPAD73
+signal PAD44
+signal PAD45
+signal IPAD112
+signal IPAD78
+signal PAD47
+signal PAD48
+signal PAD49
+signal PAD230
+signal PAD231
+signal PAD232
+signal IPAD119
+signal PAD160
+signal PAD161
+signal PAD163
+signal PAD164
+signal PAD165
+signal PAD166
+signal PAD167
+signal PAD168
+signal PAD169
+signal PROG_B
+signal IPAD194
+signal IPAD199
+signal PAD50
+signal PAD51
+signal IPAD83
+signal PAD52
+signal PAD53
+signal IPAD88
+signal PAD56
+signal PAD57
+signal IPAD125
+signal IPAD126
+signal IPAD129
+signal PAD172
+signal IPAD10
+signal PAD173
+signal PAD176
+signal IPAD13
+signal PAD177
+signal PAD178
+signal PAD179
+signal GND0
+signal GND1
+signal GND2
+signal GND3
+signal GND4
+signal GND5
+signal GND6
+signal GND7
+signal GND8
+signal GND9
+signal GND10
+signal GND11
+signal GND12
+signal GND13
+signal GND14
+signal GND15
+signal GND16
+signal GND17
+signal GND18
+signal GND19
+signal GND20
+signal GND21
+signal GND22
+signal GND23
+signal GND24
+signal GND25
+signal GND26
+signal VDD0
+signal VDD1
+signal VDD2
+signal VDD3
+signal VDD4
+signal VDD5
+signal VDD6
+signal VDD7
+signal VDD8
+signal VDD9
+signal VDD10
+signal VDD11
+signal VDD12
+signal VDD13
+signal VDD14
+signal VDD15
+signal VDD16
+signal VDD17
+signal VDD18
+signal VDD19
+signal VDD20
+signal VDD21
+signal VDD22
+signal VDD23
+signal VDD24
+signal VDD25
+signal VDD26
+signal VDD27
+signal Vaux0
+signal Vaux1
+signal Vaux2
+signal Vaux3
+signal Vaux4
+signal Vaux5
+signal Vaux6
+
+register BSR 588
+register BR 1
+register DIR 32
+
+instruction length 6
+
+instruction SAMPLE/PRELOAD 100000 BSR
+instruction IDCODE 100100 DIR
+instruction EXTEST 111100 BSR
+instruction BYPASS 111111 BR
+
+bit 587 I 1 IPAD59
+bit 586 I 1 PAD60
+bit 585 O 1 PAD60 584 0 Z
+bit 584 C 0 *
+bit 583 I 1 PAD61
+bit 582 O 1 PAD61 581 0 Z
+bit 581 C 0 *
+bit 580 I 1 PAD62
+bit 579 O 1 PAD62 578 0 Z
+bit 578 C 0 *
+bit 577 I 1 PAD63
+bit 576 O 1 PAD63 575 0 Z
+bit 575 C 0 *
+bit 574 I 1 IPAD64
+bit 573 I 1 PAD65
+bit 572 O 1 PAD65 571 0 Z
+bit 571 C 0 *
+bit 570 I 1 PAD66
+bit 569 O 1 PAD66 568 0 Z
+bit 568 C 0 *
+bit 567 I 1 PAD67
+bit 566 O 1 PAD67 565 0 Z
+bit 565 C 0 *
+bit 564 I 1 IPAD68
+bit 563 I 1 PAD69
+bit 562 O 1 PAD69 561 0 Z
+bit 561 C 0 *
+bit 560 I 1 PAD70
+bit 559 O 1 PAD70 558 0 Z
+bit 558 C 0 *
+bit 557 I 1 PAD71
+bit 556 O 1 PAD71 555 0 Z
+bit 555 C 0 *
+bit 554 I 1 PAD72
+bit 553 O 1 PAD72 552 0 Z
+bit 552 C 0 *
+bit 551 I 1 IPAD73
+bit 550 I 1 PAD74
+bit 549 O 1 PAD74 548 0 Z
+bit 548 C 0 *
+bit 547 I 1 PAD75
+bit 546 O 1 PAD75 545 0 Z
+bit 545 C 0 *
+bit 544 I 1 PAD76
+bit 543 O 1 PAD76 542 0 Z
+bit 542 C 0 *
+bit 541 I 1 PAD77
+bit 540 O 1 PAD77 539 0 Z
+bit 539 C 0 *
+bit 538 I 1 IPAD78
+bit 537 I 1 PAD79
+bit 536 O 1 PAD79 535 0 Z
+bit 535 C 0 *
+bit 534 I 1 PAD80
+bit 533 O 1 PAD80 532 0 Z
+bit 532 C 0 *
+bit 531 I 1 PAD81
+bit 530 O 1 PAD81 529 0 Z
+bit 529 C 0 *
+bit 528 I 1 PAD82
+bit 527 O 1 PAD82 526 0 Z
+bit 526 C 0 *
+bit 525 I 1 IPAD83
+bit 524 I 1 PAD84
+bit 523 O 1 PAD84 522 0 Z
+bit 522 C 0 *
+bit 521 I 1 PAD85
+bit 520 O 1 PAD85 519 0 Z
+bit 519 C 0 *
+bit 518 I 1 PAD86
+bit 517 O 1 PAD86 516 0 Z
+bit 516 C 0 *
+bit 515 I 1 PAD87
+bit 514 O 1 PAD87 513 0 Z
+bit 513 C 0 *
+bit 512 I 1 IPAD88
+bit 511 I 1 PAD89
+bit 510 O 1 PAD89 509 0 Z
+bit 509 C 0 *
+bit 508 I 1 PAD90
+bit 507 O 1 PAD90 506 0 Z
+bit 506 C 0 *
+bit 505 I 1 PAD91
+bit 504 O 1 PAD91 503 0 Z
+bit 503 C 0 *
+bit 502 I 1 PAD92
+bit 501 O 1 PAD92 500 0 Z
+bit 500 C 0 *
+bit 499 I 1 IPAD93
+bit 498 I 1 PAD94
+bit 497 O 1 PAD94 496 0 Z
+bit 496 C 0 *
+bit 495 I 1 PAD95
+bit 494 O 1 PAD95 493 0 Z
+bit 493 C 0 *
+bit 492 I 1 PAD96
+bit 491 O 1 PAD96 490 0 Z
+bit 490 C 0 *
+bit 489 I 1 PAD97
+bit 488 O 1 PAD97 487 0 Z
+bit 487 C 0 *
+bit 486 I 1 IPAD98
+bit 485 I 1 PAD99
+bit 484 O 1 PAD99 483 0 Z
+bit 483 C 0 *
+bit 482 I 1 PAD100
+bit 481 O 1 PAD100 480 0 Z
+bit 480 C 0 *
+bit 479 I 1 PAD101
+bit 478 O 1 PAD101 477 0 Z
+bit 477 C 0 *
+bit 476 I 1 PAD102
+bit 475 O 1 PAD102 474 0 Z
+bit 474 C 0 *
+bit 473 I 1 IPAD103
+bit 472 I 1 PAD104
+bit 471 O 1 PAD104 470 0 Z
+bit 470 C 0 *
+bit 469 I 1 PAD105
+bit 468 O 1 PAD105 467 0 Z
+bit 467 C 0 *
+bit 466 I 1 PAD106
+bit 465 O 1 PAD106 464 0 Z
+bit 464 C 0 *
+bit 463 I 1 PAD107
+bit 462 O 1 PAD107 461 0 Z
+bit 461 C 0 *
+bit 460 I 1 IPAD108
+bit 459 I 1 PAD109
+bit 458 O 1 *
+bit 457 O 1 *
+bit 456 I 1 PAD110
+bit 455 O 1 *
+bit 454 O 1 *
+bit 453 I 1 PAD111
+bit 452 O 1 *
+bit 451 O 1 *
+bit 450 I 1 IPAD112
+bit 449 I 1 PAD113
+bit 448 O 1 *
+bit 447 O 1 *
+bit 446 I 1 PAD114
+bit 445 O 1 *
+bit 444 O 1 *
+bit 443 I 1 PAD115
+bit 442 O 1 *
+bit 441 O 1 *
+bit 440 I 1 PAD116
+bit 439 O 1 *
+bit 438 O 1 *
+bit 437 I 1 DONE
+bit 436 O 1 PAD109 435 0 Z
+bit 435 C 0 *
+bit 434 I 1 PAD117
+bit 433 O 1 PAD110 432 0 Z
+bit 432 C 0 *
+bit 431 I 1 PAD118
+bit 430 O 1 *
+bit 429 O 1 *
+bit 428 I 1 IPAD119
+bit 427 I 1 PAD120
+bit 426 O 1 *
+bit 425 O 1 *
+bit 424 I 1 PAD121
+bit 423 O 1 *
+bit 422 O 1 *
+bit 421 I 1 PAD122
+bit 420 O 1 *
+bit 419 O 1 *
+bit 418 I 1 PAD123
+bit 417 O 1 *
+bit 416 O 1 *
+bit 415 I 1 PAD124
+bit 414 O 1 *
+bit 413 O 1 *
+bit 412 I 1 IPAD125
+bit 411 I 1 IPAD126
+bit 410 I 1 PAD127
+bit 409 O 1 *
+bit 408 O 1 *
+bit 407 I 1 PAD128
+bit 406 O 1 *
+bit 405 O 1 *
+bit 404 I 1 IPAD129
+bit 403 I 1 PAD130
+bit 402 O 1 *
+bit 401 O 1 *
+bit 400 I 1 PAD131
+bit 399 O 1 *
+bit 398 O 1 *
+bit 397 I 1 PAD132
+bit 396 O 1 *
+bit 395 O 1 *
+bit 394 I 1 PAD133
+bit 393 O 1 *
+bit 392 O 1 *
+bit 391 I 1 PAD134
+bit 390 O 1 *
+bit 389 O 1 *
+bit 388 I 1 PAD135
+bit 387 O 1 *
+bit 386 O 1 *
+bit 385 I 1 PAD136
+bit 384 O 1 *
+bit 383 O 1 *
+bit 382 I 1 IPAD137
+bit 381 I 1 IPAD138
+bit 380 I 1 PAD139
+bit 379 O 1 *
+bit 378 O 1 *
+bit 377 I 1 PAD140
+bit 376 O 1 *
+bit 375 O 1 *
+bit 374 I 1 PAD141
+bit 373 O 1 *
+bit 372 O 1 *
+bit 371 I 1 PAD142
+bit 370 O 1 PAD113 369 0 Z
+bit 369 C 0 *
+bit 368 I 1 PAD143
+bit 367 O 1 IPAD112 366 0 Z
+bit 366 C 0 *
+bit 365 I 1 IPAD144
+bit 364 I 1 IPAD145
+bit 363 I 1 PAD146
+bit 362 O 1 *
+bit 361 O 1 *
+bit 360 I 1 PAD147
+bit 359 O 1 *
+bit 358 O 1 *
+bit 357 I 1 PAD148
+bit 356 O 1 *
+bit 355 O 1 *
+bit 354 I 1 PAD149
+bit 353 O 1 *
+bit 352 O 1 *
+bit 351 I 1 PAD150
+bit 350 O 1 *
+bit 349 O 1 *
+bit 348 I 1 IPAD151
+bit 347 I 1 IPAD152
+bit 346 I 1 PAD153
+bit 345 O 1 *
+bit 344 O 1 *
+bit 343 I 1 PAD154
+bit 342 O 1 *
+bit 341 O 1 *
+bit 340 I 1 PAD155
+bit 339 O 1 *
+bit 338 O 1 *
+bit 337 I 1 PAD156
+bit 336 O 1 *
+bit 335 O 1 *
+bit 334 I 1 PAD157
+bit 333 O 1 *
+bit 332 O 1 *
+bit 331 I 1 IPAD158
+bit 330 I 1 IPAD159
+bit 329 I 1 PAD160
+bit 328 O 1 *
+bit 327 O 1 *
+bit 326 I 1 PAD161
+bit 325 O 1 *
+bit 324 O 1 *
+bit 323 I 1 IPAD162
+bit 322 I 1 PAD163
+bit 321 O 1 *
+bit 320 O 1 *
+bit 319 I 1 PAD164
+bit 318 O 1 *
+bit 317 O 1 *
+bit 316 I 1 PAD165
+bit 315 O 1 *
+bit 314 O 1 *
+bit 313 I 1 PAD166
+bit 312 O 1 *
+bit 311 O 1 *
+bit 310 I 1 PAD167
+bit 309 O 1 *
+bit 308 O 1 *
+bit 307 I 1 PAD168
+bit 306 O 1 *
+bit 305 O 1 *
+bit 304 I 1 PAD169
+bit 303 O 1 *
+bit 302 O 1 *
+bit 301 I 1 IPAD170
+bit 300 I 1 IPAD171
+bit 299 I 1 PAD172
+bit 298 O 1 *
+bit 297 O 1 *
+bit 296 I 1 PAD173
+bit 295 O 1 *
+bit 294 O 1 *
+bit 293 I 1 IPAD174
+bit 292 I 1 IPAD175
+bit 291 I 1 PAD176
+bit 290 O 1 *
+bit 289 O 1 *
+bit 288 I 1 PAD177
+bit 287 O 1 *
+bit 286 O 1 *
+bit 285 I 1 PAD178
+bit 284 O 1 *
+bit 283 O 1 *
+bit 282 I 1 PAD179
+bit 281 O 1 *
+bit 280 O 1 *
+bit 279 I 1 IPAD180
+bit 278 I 1 PAD181
+bit 277 O 1 *
+bit 276 O 1 *
+bit 275 I 1 PAD182
+bit 274 O 1 *
+bit 273 O 1 *
+bit 272 I 1 PAD183
+bit 271 O 1 *
+bit 270 O 1 *
+bit 269 I 1 IPAD184
+bit 268 I 1 PAD185
+bit 267 O 1 *
+bit 266 O 1 *
+bit 265 I 1 PAD186
+bit 264 O 1 *
+bit 263 O 1 *
+bit 262 I 1 PAD187
+bit 261 O 1 *
+bit 260 O 1 *
+bit 259 I 1 PAD188
+bit 258 O 1 *
+bit 257 O 1 *
+bit 256 I 1 IPAD189
+bit 255 I 1 PAD190
+bit 254 O 1 *
+bit 253 O 1 *
+bit 252 I 1 PAD191
+bit 251 O 1 *
+bit 250 O 1 *
+bit 249 I 1 PAD192
+bit 248 O 1 *
+bit 247 O 1 *
+bit 246 I 1 PAD193
+bit 245 O 1 *
+bit 244 O 1 *
+bit 243 I 1 IPAD194
+bit 242 I 1 PAD195
+bit 241 O 1 *
+bit 240 O 1 *
+bit 239 I 1 PAD196
+bit 238 O 1 *
+bit 237 O 1 *
+bit 236 I 1 PAD197
+bit 235 O 1 *
+bit 234 O 1 *
+bit 233 I 1 PAD198
+bit 232 O 1 *
+bit 231 O 1 *
+bit 230 I 1 IPAD199
+bit 229 I 1 PAD200
+bit 228 O 1 *
+bit 227 O 1 *
+bit 226 I 1 PAD201
+bit 225 O 1 *
+bit 224 O 1 *
+bit 223 I 1 PAD202
+bit 222 O 1 *
+bit 221 O 1 *
+bit 220 I 1 PAD203
+bit 219 O 1 *
+bit 218 O 1 *
+bit 217 I 1 IPAD204
+bit 216 I 1 PAD205
+bit 215 O 1 *
+bit 214 O 1 *
+bit 213 I 1 PAD206
+bit 212 O 1 *
+bit 211 O 1 *
+bit 210 I 1 PAD207
+bit 209 O 1 *
+bit 208 O 1 *
+bit 207 I 1 PAD208
+bit 206 O 1 *
+bit 205 O 1 *
+bit 204 I 1 IPAD209
+bit 203 I 1 PAD210
+bit 202 O 1 *
+bit 201 O 1 *
+bit 200 I 1 PAD211
+bit 199 O 1 *
+bit 198 O 1 *
+bit 197 I 1 PAD212
+bit 196 O 1 *
+bit 195 O 1 *
+bit 194 I 1 PAD213
+bit 193 O 1 *
+bit 192 O 1 *
+bit 191 I 1 IPAD214
+bit 190 I 1 PAD215
+bit 189 O 1 *
+bit 188 O 1 *
+bit 187 I 1 PAD216
+bit 186 O 1 *
+bit 185 O 1 *
+bit 184 I 1 PAD217
+bit 183 O 1 *
+bit 182 O 1 *
+bit 181 I 1 PAD218
+bit 180 O 1 *
+bit 179 O 1 *
+bit 178 I 1 IPAD219
+bit 177 I 1 PAD220
+bit 176 O 1 *
+bit 175 O 1 *
+bit 174 I 1 PAD221
+bit 173 O 1 *
+bit 172 O 1 *
+bit 171 I 1 PAD222
+bit 170 O 1 *
+bit 169 O 1 *
+bit 168 I 1 PAD223
+bit 167 O 1 *
+bit 166 O 1 *
+bit 165 I 1 IPAD224
+bit 164 I 1 PAD225
+bit 163 O 1 *
+bit 162 O 1 *
+bit 161 I 1 PAD226
+bit 160 O 1 *
+bit 159 O 1 *
+bit 158 I 1 PAD227
+bit 157 O 1 *
+bit 156 O 1 *
+bit 155 I 1 IPAD228
+bit 154 I 1 PAD229
+bit 153 O 1 *
+bit 152 O 1 *
+bit 151 I 1 PAD230
+bit 150 O 1 *
+bit 149 O 1 *
+bit 148 I 1 PAD231
+bit 147 O 1 *
+bit 146 O 1 *
+bit 145 I 1 PAD232
+bit 144 O 1 *
+bit 143 O 1 *
+bit 142 I 1 PROG_B
+bit 141 I 1 PAD1
+bit 140 O 1 PAD1 139 0 Z
+bit 139 C 0 *
+bit 138 I 1 PAD2
+bit 137 O 1 PAD2 136 0 Z
+bit 136 C 0 *
+bit 135 I 1 IPAD3
+bit 134 I 1 PAD4
+bit 133 O 1 PAD4 132 0 Z
+bit 132 C 0 *
+bit 131 I 1 PAD5
+bit 130 O 1 PAD5 129 0 Z
+bit 129 C 0 *
+bit 128 I 1 PAD6
+bit 127 O 1 PAD6 126 0 Z
+bit 126 C 0 *
+bit 125 I 1 PAD7
+bit 124 O 1 PAD7 123 0 Z
+bit 123 C 0 *
+bit 122 I 1 PAD8
+bit 121 O 1 PAD8 120 0 Z
+bit 120 C 0 *
+bit 119 I 1 IPAD9
+bit 118 I 1 IPAD10
+bit 117 I 1 PAD11
+bit 116 O 1 PAD11 115 0 Z
+bit 115 C 0 *
+bit 114 I 1 PAD12
+bit 113 O 1 PAD12 112 0 Z
+bit 112 C 0 *
+bit 111 I 1 IPAD13
+bit 110 I 1 PAD14
+bit 109 O 1 PAD14 108 0 Z
+bit 108 C 0 *
+bit 107 I 1 PAD15
+bit 106 O 1 PAD15 105 0 Z
+bit 105 C 0 *
+bit 104 I 1 PAD16
+bit 103 O 1 PAD16 102 0 Z
+bit 102 C 0 *
+bit 101 I 1 PAD17
+bit 100 O 1 PAD17 99 0 Z
+bit 99 C 0 *
+bit 98 I 1 PAD18
+bit 97 O 1 PAD18 96 0 Z
+bit 96 C 0 *
+bit 95 I 1 PAD19
+bit 94 O 1 PAD19 93 0 Z
+bit 93 C 0 *
+bit 92 I 1 PAD20
+bit 91 O 1 PAD20 90 0 Z
+bit 90 C 0 *
+bit 89 I 1 IPAD21
+bit 88 I 1 IPAD22
+bit 87 I 1 PAD23
+bit 86 O 1 PAD23 85 0 Z
+bit 85 C 0 *
+bit 84 I 1 PAD24
+bit 83 O 1 PAD24 82 0 Z
+bit 82 C 0 *
+bit 81 I 1 PAD25
+bit 80 O 1 PAD25 79 0 Z
+bit 79 C 0 *
+bit 78 I 1 PAD26
+bit 77 O 1 PAD26 76 0 Z
+bit 76 C 0 *
+bit 75 I 1 PAD27
+bit 74 O 1 PAD27 73 0 Z
+bit 73 C 0 *
+bit 72 I 1 IPAD28
+bit 71 I 1 IPAD29
+bit 70 I 1 PAD30
+bit 69 O 1 PAD30 68 0 Z
+bit 68 C 0 *
+bit 67 I 1 PAD31
+bit 66 O 1 PAD31 65 0 Z
+bit 65 C 0 *
+bit 64 I 1 PAD32
+bit 63 O 1 PAD32 62 0 Z
+bit 62 C 0 *
+bit 61 I 1 PAD33
+bit 60 O 1 PAD33 59 0 Z
+bit 59 C 0 *
+bit 58 I 1 PAD34
+bit 57 O 1 PAD34 56 0 Z
+bit 56 C 0 *
+bit 55 I 1 IPAD35
+bit 54 I 1 IPAD36
+bit 53 I 1 PAD37
+bit 52 O 1 PAD37 51 0 Z
+bit 51 C 0 *
+bit 50 I 1 PAD38
+bit 49 O 1 PAD38 48 0 Z
+bit 48 C 0 *
+bit 47 I 1 PAD39
+bit 46 O 1 PAD39 45 0 Z
+bit 45 C 0 *
+bit 44 I 1 PAD40
+bit 43 O 1 PAD40 42 0 Z
+bit 42 C 0 *
+bit 41 I 1 PAD41
+bit 40 O 1 PAD41 39 0 Z
+bit 39 C 0 *
+bit 38 I 1 IPAD42
+bit 37 I 1 IPAD43
+bit 36 I 1 PAD44
+bit 35 O 1 PAD44 34 0 Z
+bit 34 C 0 *
+bit 33 I 1 PAD45
+bit 32 O 1 PAD45 31 0 Z
+bit 31 C 0 *
+bit 30 I 1 IPAD46
+bit 29 I 1 PAD47
+bit 28 O 1 PAD47 27 0 Z
+bit 27 C 0 *
+bit 26 I 1 PAD48
+bit 25 O 1 PAD48 24 0 Z
+bit 24 C 0 *
+bit 23 I 1 PAD49
+bit 22 O 1 PAD49 21 0 Z
+bit 21 C 0 *
+bit 20 I 1 PAD50
+bit 19 O 1 PAD50 18 0 Z
+bit 18 C 0 *
+bit 17 I 1 PAD51
+bit 16 O 1 PAD51 15 0 Z
+bit 15 C 0 *
+bit 14 I 1 PAD52
+bit 13 O 1 PAD52 12 0 Z
+bit 12 C 0 *
+bit 11 I 1 PAD53
+bit 10 O 1 PAD53 9 0 Z
+bit 9 C 0 *
+bit 8 I 1 IPAD54
+bit 7 I 1 IPAD55
+bit 6 I 1 PAD56
+bit 5 O 1 PAD56 4 0 Z
+bit 4 C 0 *
+bit 3 I 1 PAD57
+bit 2 O 1 PAD57 1 0 Z
+bit 1 C 0 *
+bit 0 I 1 IPAD58
--- /dev/null
+signal TCK
+signal TDI
+signal TDO
+signal TMS
+signal PAD101
+signal PAD102
+signal PAD60
+signal PAD61
+signal PAD104
+signal IPAD93
+signal PAD62
+signal PAD105
+signal PAD63
+signal PAD106
+signal PAD107
+signal IPAD204
+signal PAD109
+signal IPAD98
+signal PAD66
+signal PAD67
+signal IPAD209
+signal PAD181
+signal PAD185
+signal PAD186
+signal PAD187
+signal PAD188
+signal IPAD28
+signal IPAD29
+signal PAD110
+signal PAD111
+signal PAD71
+signal PAD113
+signal PAD72
+signal PAD114
+signal PAD115
+signal PAD116
+signal PAD74
+signal PAD117
+signal PAD75
+signal PAD118
+signal IPAD214
+signal IPAD144
+signal IPAD145
+signal PAD79
+signal PAD190
+signal PAD191
+signal PAD192
+signal PAD193
+signal PAD195
+signal PAD196
+signal PAD197
+signal PAD198
+signal IPAD35
+signal IPAD36
+signal DONE
+signal PAD120
+signal PAD121
+signal PAD80
+signal PAD122
+signal PAD81
+signal PAD123
+signal PAD82
+signal PAD124
+signal PAD84
+signal PAD127
+signal PAD85
+signal PAD128
+signal IPAD151
+signal PAD86
+signal IPAD152
+signal PAD87
+signal IPAD228
+signal PAD89
+signal IPAD3
+signal IPAD9
+signal PAD11
+signal PAD12
+signal IPAD46
+signal PAD16
+signal PAD17
+signal PAD19
+signal PAD200
+signal PAD201
+signal PAD202
+signal PAD203
+signal PAD130
+signal PAD131
+signal PAD205
+signal PAD132
+signal PAD90
+signal PAD206
+signal PAD133
+signal PAD91
+signal PAD207
+signal PAD208
+signal PAD92
+signal PAD94
+signal PAD95
+signal IPAD162
+signal PAD139
+signal PAD96
+signal PAD97
+signal PAD20
+signal PAD23
+signal IPAD54
+signal PAD24
+signal IPAD55
+signal PAD25
+signal PAD26
+signal PAD27
+signal IPAD58
+signal IPAD59
+signal PAD210
+signal PAD211
+signal PAD212
+signal PAD213
+signal PAD140
+signal PAD141
+signal PAD142
+signal PAD143
+signal PAD217
+signal PAD218
+signal PAD146
+signal IPAD170
+signal PAD147
+signal IPAD171
+signal PAD148
+signal PAD149
+signal IPAD174
+signal IPAD175
+signal PAD30
+signal PAD31
+signal PAD32
+signal IPAD64
+signal PAD33
+signal PAD34
+signal PAD1
+signal PAD2
+signal IPAD68
+signal PAD4
+signal PAD5
+signal PAD6
+signal PAD220
+signal PAD7
+signal PAD221
+signal PAD8
+signal PAD222
+signal PAD150
+signal PAD223
+signal PAD225
+signal PAD153
+signal PAD154
+signal PAD156
+signal PAD229
+signal PAD157
+signal IPAD184
+signal PAD40
+signal PAD41
+signal IPAD112
+signal IPAD78
+signal PAD47
+signal PAD48
+signal PAD49
+signal PAD230
+signal PAD231
+signal PAD232
+signal IPAD119
+signal PAD163
+signal PAD164
+signal PAD165
+signal PAD166
+signal PAD167
+signal PAD168
+signal PAD169
+signal PROG_B
+signal IPAD194
+signal IPAD199
+signal PAD50
+signal PAD51
+signal IPAD83
+signal PAD52
+signal PAD53
+signal IPAD88
+signal PAD56
+signal PAD57
+signal IPAD125
+signal IPAD126
+signal IPAD129
+signal PAD172
+signal IPAD10
+signal PAD173
+signal PAD176
+signal IPAD13
+signal PAD177
+signal PAD178
+signal PAD179
+signal GND0
+signal GND1
+signal GND2
+signal GND3
+signal GND4
+signal GND5
+signal GND6
+signal GND7
+signal GND8
+signal GND9
+signal GND10
+signal GND11
+signal GND12
+signal GND13
+signal GND14
+signal GND15
+signal GND16
+signal GND17
+signal GND18
+signal GND19
+signal GND20
+signal GND21
+signal GND22
+signal GND23
+signal GND24
+signal GND25
+signal GND26
+signal VDD0
+signal VDD1
+signal VDD2
+signal VDD3
+signal VDD4
+signal VDD5
+signal VDD6
+signal VDD7
+signal VDD8
+signal VDD9
+signal VDD10
+signal VDD11
+signal VDD12
+signal VDD13
+signal VDD14
+signal VDD15
+signal VDD16
+signal VDD17
+signal VDD18
+signal VDD19
+signal VDD20
+signal VDD21
+signal VDD22
+signal VDD23
+signal Vaux0
+signal Vaux1
+signal Vaux2
+signal Vaux3
+signal Vaux4
+signal Vaux5
+
+register BSR 588
+register BR 1
+register DIR 32
+
+instruction length 6
+
+instruction SAMPLE/PRELOAD 100000 BSR
+instruction IDCODE 100100 DIR
+instruction EXTEST 111100 BSR
+instruction BYPASS 111111 BR
+
+bit 587 I 1 IPAD59
+bit 586 I 1 PAD60
+bit 585 O 1 PAD60 584 0 Z
+bit 584 C 0 *
+bit 583 I 1 PAD61
+bit 582 O 1 PAD61 581 0 Z
+bit 581 C 0 *
+bit 580 I 1 PAD62
+bit 579 O 1 PAD62 578 0 Z
+bit 578 C 0 *
+bit 577 I 1 PAD63
+bit 576 O 1 PAD63 575 0 Z
+bit 575 C 0 *
+bit 574 I 1 IPAD64
+bit 573 O 1 *
+bit 572 O 1 *
+bit 571 O 1 *
+bit 570 I 1 PAD66
+bit 569 O 1 PAD66 568 0 Z
+bit 568 C 0 *
+bit 567 I 1 PAD67
+bit 566 O 1 PAD67 565 0 Z
+bit 565 C 0 *
+bit 564 I 1 IPAD68
+bit 563 O 1 *
+bit 562 O 1 *
+bit 561 O 1 *
+bit 560 O 1 *
+bit 559 O 1 *
+bit 558 O 1 *
+bit 557 I 1 PAD71
+bit 556 O 1 PAD71 555 0 Z
+bit 555 C 0 *
+bit 554 I 1 PAD72
+bit 553 O 1 PAD72 552 0 Z
+bit 552 C 0 *
+bit 551 O 1 *
+bit 550 I 1 PAD74
+bit 549 O 1 PAD74 548 0 Z
+bit 548 C 0 *
+bit 547 I 1 PAD75
+bit 546 O 1 PAD75 545 0 Z
+bit 545 C 0 *
+bit 544 O 1 *
+bit 543 O 1 *
+bit 542 O 1 *
+bit 541 O 1 *
+bit 540 O 1 *
+bit 539 O 1 *
+bit 538 I 1 IPAD78
+bit 537 I 1 PAD79
+bit 536 O 1 PAD79 535 0 Z
+bit 535 C 0 *
+bit 534 I 1 PAD80
+bit 533 O 1 PAD80 532 0 Z
+bit 532 C 0 *
+bit 531 I 1 PAD81
+bit 530 O 1 PAD81 529 0 Z
+bit 529 C 0 *
+bit 528 I 1 PAD82
+bit 527 O 1 PAD82 526 0 Z
+bit 526 C 0 *
+bit 525 I 1 IPAD83
+bit 524 I 1 PAD84
+bit 523 O 1 PAD84 522 0 Z
+bit 522 C 0 *
+bit 521 I 1 PAD85
+bit 520 O 1 PAD85 519 0 Z
+bit 519 C 0 *
+bit 518 I 1 PAD86
+bit 517 O 1 PAD86 516 0 Z
+bit 516 C 0 *
+bit 515 I 1 PAD87
+bit 514 O 1 PAD87 513 0 Z
+bit 513 C 0 *
+bit 512 I 1 IPAD88
+bit 511 I 1 PAD89
+bit 510 O 1 PAD89 509 0 Z
+bit 509 C 0 *
+bit 508 I 1 PAD90
+bit 507 O 1 PAD90 506 0 Z
+bit 506 C 0 *
+bit 505 I 1 PAD91
+bit 504 O 1 PAD91 503 0 Z
+bit 503 C 0 *
+bit 502 I 1 PAD92
+bit 501 O 1 PAD92 500 0 Z
+bit 500 C 0 *
+bit 499 I 1 IPAD93
+bit 498 I 1 PAD94
+bit 497 O 1 PAD94 496 0 Z
+bit 496 C 0 *
+bit 495 I 1 PAD95
+bit 494 O 1 PAD95 493 0 Z
+bit 493 C 0 *
+bit 492 I 1 PAD96
+bit 491 O 1 PAD96 490 0 Z
+bit 490 C 0 *
+bit 489 I 1 PAD97
+bit 488 O 1 PAD97 487 0 Z
+bit 487 C 0 *
+bit 486 I 1 IPAD98
+bit 485 O 1 *
+bit 484 O 1 *
+bit 483 O 1 *
+bit 482 O 1 *
+bit 481 O 1 *
+bit 480 O 1 *
+bit 479 I 1 PAD101
+bit 478 O 1 PAD101 477 0 Z
+bit 477 C 0 *
+bit 476 I 1 PAD102
+bit 475 O 1 PAD102 474 0 Z
+bit 474 C 0 *
+bit 473 O 1 *
+bit 472 I 1 PAD104
+bit 471 O 1 PAD104 470 0 Z
+bit 470 C 0 *
+bit 469 I 1 PAD105
+bit 468 O 1 PAD105 467 0 Z
+bit 467 C 0 *
+bit 466 I 1 PAD106
+bit 465 O 1 PAD106 464 0 Z
+bit 464 C 0 *
+bit 463 I 1 PAD107
+bit 462 O 1 PAD107 461 0 Z
+bit 461 C 0 *
+bit 460 O 1 *
+bit 459 I 1 PAD109
+bit 458 O 1 *
+bit 457 O 1 *
+bit 456 I 1 PAD110
+bit 455 O 1 *
+bit 454 O 1 *
+bit 453 I 1 PAD111
+bit 452 O 1 *
+bit 451 O 1 *
+bit 450 I 1 IPAD112
+bit 449 I 1 PAD113
+bit 448 O 1 *
+bit 447 O 1 *
+bit 446 I 1 PAD114
+bit 445 O 1 *
+bit 444 O 1 *
+bit 443 I 1 PAD115
+bit 442 O 1 *
+bit 441 O 1 *
+bit 440 I 1 PAD116
+bit 439 O 1 *
+bit 438 O 1 *
+bit 437 I 1 DONE
+bit 436 O 1 PAD109 435 0 Z
+bit 435 C 0 *
+bit 434 I 1 PAD117
+bit 433 O 1 PAD110 432 0 Z
+bit 432 C 0 *
+bit 431 I 1 PAD118
+bit 430 O 1 *
+bit 429 O 1 *
+bit 428 I 1 IPAD119
+bit 427 I 1 PAD120
+bit 426 O 1 *
+bit 425 O 1 *
+bit 424 I 1 PAD121
+bit 423 O 1 *
+bit 422 O 1 *
+bit 421 I 1 PAD122
+bit 420 O 1 *
+bit 419 O 1 *
+bit 418 I 1 PAD123
+bit 417 O 1 *
+bit 416 O 1 *
+bit 415 I 1 PAD124
+bit 414 O 1 *
+bit 413 O 1 *
+bit 412 I 1 IPAD125
+bit 411 I 1 IPAD126
+bit 410 I 1 PAD127
+bit 409 O 1 *
+bit 408 O 1 *
+bit 407 I 1 PAD128
+bit 406 O 1 *
+bit 405 O 1 *
+bit 404 I 1 IPAD129
+bit 403 I 1 PAD130
+bit 402 O 1 *
+bit 401 O 1 *
+bit 400 I 1 PAD131
+bit 399 O 1 *
+bit 398 O 1 *
+bit 397 I 1 PAD132
+bit 396 O 1 *
+bit 395 O 1 *
+bit 394 I 1 PAD133
+bit 393 O 1 *
+bit 392 O 1 *
+bit 391 O 1 *
+bit 390 O 1 *
+bit 389 O 1 *
+bit 388 O 1 *
+bit 387 O 1 *
+bit 386 O 1 *
+bit 385 O 1 *
+bit 384 O 1 *
+bit 383 O 1 *
+bit 382 O 1 *
+bit 381 O 1 *
+bit 380 I 1 PAD139
+bit 379 O 1 *
+bit 378 O 1 *
+bit 377 I 1 PAD140
+bit 376 O 1 *
+bit 375 O 1 *
+bit 374 I 1 PAD141
+bit 373 O 1 *
+bit 372 O 1 *
+bit 371 I 1 PAD142
+bit 370 O 1 PAD113 369 0 Z
+bit 369 C 0 *
+bit 368 I 1 PAD143
+bit 367 O 1 IPAD112 366 0 Z
+bit 366 C 0 *
+bit 365 I 1 IPAD144
+bit 364 I 1 IPAD145
+bit 363 I 1 PAD146
+bit 362 O 1 *
+bit 361 O 1 *
+bit 360 I 1 PAD147
+bit 359 O 1 *
+bit 358 O 1 *
+bit 357 I 1 PAD148
+bit 356 O 1 *
+bit 355 O 1 *
+bit 354 I 1 PAD149
+bit 353 O 1 *
+bit 352 O 1 *
+bit 351 I 1 PAD150
+bit 350 O 1 *
+bit 349 O 1 *
+bit 348 I 1 IPAD151
+bit 347 I 1 IPAD152
+bit 346 I 1 PAD153
+bit 345 O 1 *
+bit 344 O 1 *
+bit 343 I 1 PAD154
+bit 342 O 1 *
+bit 341 O 1 *
+bit 340 O 1 *
+bit 339 O 1 *
+bit 338 O 1 *
+bit 337 I 1 PAD156
+bit 336 O 1 *
+bit 335 O 1 *
+bit 334 I 1 PAD157
+bit 333 O 1 *
+bit 332 O 1 *
+bit 331 O 1 *
+bit 330 O 1 *
+bit 329 O 1 *
+bit 328 O 1 *
+bit 327 O 1 *
+bit 326 O 1 *
+bit 325 O 1 *
+bit 324 O 1 *
+bit 323 I 1 IPAD162
+bit 322 I 1 PAD163
+bit 321 O 1 *
+bit 320 O 1 *
+bit 319 I 1 PAD164
+bit 318 O 1 *
+bit 317 O 1 *
+bit 316 I 1 PAD165
+bit 315 O 1 *
+bit 314 O 1 *
+bit 313 I 1 PAD166
+bit 312 O 1 *
+bit 311 O 1 *
+bit 310 I 1 PAD167
+bit 309 O 1 *
+bit 308 O 1 *
+bit 307 I 1 PAD168
+bit 306 O 1 *
+bit 305 O 1 *
+bit 304 I 1 PAD169
+bit 303 O 1 *
+bit 302 O 1 *
+bit 301 I 1 IPAD170
+bit 300 I 1 IPAD171
+bit 299 I 1 PAD172
+bit 298 O 1 *
+bit 297 O 1 *
+bit 296 I 1 PAD173
+bit 295 O 1 *
+bit 294 O 1 *
+bit 293 I 1 IPAD174
+bit 292 I 1 IPAD175
+bit 291 I 1 PAD176
+bit 290 O 1 *
+bit 289 O 1 *
+bit 288 I 1 PAD177
+bit 287 O 1 *
+bit 286 O 1 *
+bit 285 I 1 PAD178
+bit 284 O 1 *
+bit 283 O 1 *
+bit 282 I 1 PAD179
+bit 281 O 1 *
+bit 280 O 1 *
+bit 279 O 1 *
+bit 278 I 1 PAD181
+bit 277 O 1 *
+bit 276 O 1 *
+bit 275 O 1 *
+bit 274 O 1 *
+bit 273 O 1 *
+bit 272 O 1 *
+bit 271 O 1 *
+bit 270 O 1 *
+bit 269 I 1 IPAD184
+bit 268 I 1 PAD185
+bit 267 O 1 *
+bit 266 O 1 *
+bit 265 I 1 PAD186
+bit 264 O 1 *
+bit 263 O 1 *
+bit 262 I 1 PAD187
+bit 261 O 1 *
+bit 260 O 1 *
+bit 259 I 1 PAD188
+bit 258 O 1 *
+bit 257 O 1 *
+bit 256 O 1 *
+bit 255 I 1 PAD190
+bit 254 O 1 *
+bit 253 O 1 *
+bit 252 I 1 PAD191
+bit 251 O 1 *
+bit 250 O 1 *
+bit 249 I 1 PAD192
+bit 248 O 1 *
+bit 247 O 1 *
+bit 246 I 1 PAD193
+bit 245 O 1 *
+bit 244 O 1 *
+bit 243 I 1 IPAD194
+bit 242 I 1 PAD195
+bit 241 O 1 *
+bit 240 O 1 *
+bit 239 I 1 PAD196
+bit 238 O 1 *
+bit 237 O 1 *
+bit 236 I 1 PAD197
+bit 235 O 1 *
+bit 234 O 1 *
+bit 233 I 1 PAD198
+bit 232 O 1 *
+bit 231 O 1 *
+bit 230 I 1 IPAD199
+bit 229 I 1 PAD200
+bit 228 O 1 *
+bit 227 O 1 *
+bit 226 I 1 PAD201
+bit 225 O 1 *
+bit 224 O 1 *
+bit 223 I 1 PAD202
+bit 222 O 1 *
+bit 221 O 1 *
+bit 220 I 1 PAD203
+bit 219 O 1 *
+bit 218 O 1 *
+bit 217 I 1 IPAD204
+bit 216 I 1 PAD205
+bit 215 O 1 *
+bit 214 O 1 *
+bit 213 I 1 PAD206
+bit 212 O 1 *
+bit 211 O 1 *
+bit 210 I 1 PAD207
+bit 209 O 1 *
+bit 208 O 1 *
+bit 207 I 1 PAD208
+bit 206 O 1 *
+bit 205 O 1 *
+bit 204 I 1 IPAD209
+bit 203 I 1 PAD210
+bit 202 O 1 *
+bit 201 O 1 *
+bit 200 I 1 PAD211
+bit 199 O 1 *
+bit 198 O 1 *
+bit 197 I 1 PAD212
+bit 196 O 1 *
+bit 195 O 1 *
+bit 194 I 1 PAD213
+bit 193 O 1 *
+bit 192 O 1 *
+bit 191 I 1 IPAD214
+bit 190 O 1 *
+bit 189 O 1 *
+bit 188 O 1 *
+bit 187 O 1 *
+bit 186 O 1 *
+bit 185 O 1 *
+bit 184 I 1 PAD217
+bit 183 O 1 *
+bit 182 O 1 *
+bit 181 I 1 PAD218
+bit 180 O 1 *
+bit 179 O 1 *
+bit 178 O 1 *
+bit 177 I 1 PAD220
+bit 176 O 1 *
+bit 175 O 1 *
+bit 174 I 1 PAD221
+bit 173 O 1 *
+bit 172 O 1 *
+bit 171 I 1 PAD222
+bit 170 O 1 *
+bit 169 O 1 *
+bit 168 I 1 PAD223
+bit 167 O 1 *
+bit 166 O 1 *
+bit 165 O 1 *
+bit 164 I 1 PAD225
+bit 163 O 1 *
+bit 162 O 1 *
+bit 161 O 1 *
+bit 160 O 1 *
+bit 159 O 1 *
+bit 158 O 1 *
+bit 157 O 1 *
+bit 156 O 1 *
+bit 155 I 1 IPAD228
+bit 154 I 1 PAD229
+bit 153 O 1 *
+bit 152 O 1 *
+bit 151 I 1 PAD230
+bit 150 O 1 *
+bit 149 O 1 *
+bit 148 I 1 PAD231
+bit 147 O 1 *
+bit 146 O 1 *
+bit 145 I 1 PAD232
+bit 144 O 1 *
+bit 143 O 1 *
+bit 142 I 1 PROG_B
+bit 141 I 1 PAD1
+bit 140 O 1 PAD1 139 0 Z
+bit 139 C 0 *
+bit 138 I 1 PAD2
+bit 137 O 1 PAD2 136 0 Z
+bit 136 C 0 *
+bit 135 I 1 IPAD3
+bit 134 I 1 PAD4
+bit 133 O 1 PAD4 132 0 Z
+bit 132 C 0 *
+bit 131 I 1 PAD5
+bit 130 O 1 PAD5 129 0 Z
+bit 129 C 0 *
+bit 128 I 1 PAD6
+bit 127 O 1 PAD6 126 0 Z
+bit 126 C 0 *
+bit 125 I 1 PAD7
+bit 124 O 1 PAD7 123 0 Z
+bit 123 C 0 *
+bit 122 I 1 PAD8
+bit 121 O 1 PAD8 120 0 Z
+bit 120 C 0 *
+bit 119 I 1 IPAD9
+bit 118 I 1 IPAD10
+bit 117 I 1 PAD11
+bit 116 O 1 PAD11 115 0 Z
+bit 115 C 0 *
+bit 114 I 1 PAD12
+bit 113 O 1 PAD12 112 0 Z
+bit 112 C 0 *
+bit 111 I 1 IPAD13
+bit 110 O 1 *
+bit 109 O 1 *
+bit 108 O 1 *
+bit 107 O 1 *
+bit 106 O 1 *
+bit 105 O 1 *
+bit 104 I 1 PAD16
+bit 103 O 1 PAD16 102 0 Z
+bit 102 C 0 *
+bit 101 I 1 PAD17
+bit 100 O 1 PAD17 99 0 Z
+bit 99 C 0 *
+bit 98 O 1 *
+bit 97 O 1 *
+bit 96 O 1 *
+bit 95 I 1 PAD19
+bit 94 O 1 PAD19 93 0 Z
+bit 93 C 0 *
+bit 92 I 1 PAD20
+bit 91 O 1 PAD20 90 0 Z
+bit 90 C 0 *
+bit 89 O 1 *
+bit 88 O 1 *
+bit 87 I 1 PAD23
+bit 86 O 1 PAD23 85 0 Z
+bit 85 C 0 *
+bit 84 I 1 PAD24
+bit 83 O 1 PAD24 82 0 Z
+bit 82 C 0 *
+bit 81 I 1 PAD25
+bit 80 O 1 PAD25 79 0 Z
+bit 79 C 0 *
+bit 78 I 1 PAD26
+bit 77 O 1 PAD26 76 0 Z
+bit 76 C 0 *
+bit 75 I 1 PAD27
+bit 74 O 1 PAD27 73 0 Z
+bit 73 C 0 *
+bit 72 I 1 IPAD28
+bit 71 I 1 IPAD29
+bit 70 I 1 PAD30
+bit 69 O 1 PAD30 68 0 Z
+bit 68 C 0 *
+bit 67 I 1 PAD31
+bit 66 O 1 PAD31 65 0 Z
+bit 65 C 0 *
+bit 64 I 1 PAD32
+bit 63 O 1 PAD32 62 0 Z
+bit 62 C 0 *
+bit 61 I 1 PAD33
+bit 60 O 1 PAD33 59 0 Z
+bit 59 C 0 *
+bit 58 I 1 PAD34
+bit 57 O 1 PAD34 56 0 Z
+bit 56 C 0 *
+bit 55 I 1 IPAD35
+bit 54 I 1 IPAD36
+bit 53 O 1 *
+bit 52 O 1 *
+bit 51 O 1 *
+bit 50 O 1 *
+bit 49 O 1 *
+bit 48 O 1 *
+bit 47 O 1 *
+bit 46 O 1 *
+bit 45 O 1 *
+bit 44 I 1 PAD40
+bit 43 O 1 PAD40 42 0 Z
+bit 42 C 0 *
+bit 41 I 1 PAD41
+bit 40 O 1 PAD41 39 0 Z
+bit 39 C 0 *
+bit 38 O 1 *
+bit 37 O 1 *
+bit 36 O 1 *
+bit 35 O 1 *
+bit 34 O 1 *
+bit 33 O 1 *
+bit 32 O 1 *
+bit 31 O 1 *
+bit 30 I 1 IPAD46
+bit 29 I 1 PAD47
+bit 28 O 1 PAD47 27 0 Z
+bit 27 C 0 *
+bit 26 I 1 PAD48
+bit 25 O 1 PAD48 24 0 Z
+bit 24 C 0 *
+bit 23 I 1 PAD49
+bit 22 O 1 PAD49 21 0 Z
+bit 21 C 0 *
+bit 20 I 1 PAD50
+bit 19 O 1 PAD50 18 0 Z
+bit 18 C 0 *
+bit 17 I 1 PAD51
+bit 16 O 1 PAD51 15 0 Z
+bit 15 C 0 *
+bit 14 I 1 PAD52
+bit 13 O 1 PAD52 12 0 Z
+bit 12 C 0 *
+bit 11 I 1 PAD53
+bit 10 O 1 PAD53 9 0 Z
+bit 9 C 0 *
+bit 8 I 1 IPAD54
+bit 7 I 1 IPAD55
+bit 6 I 1 PAD56
+bit 5 O 1 PAD56 4 0 Z
+bit 4 C 0 *
+bit 3 I 1 PAD57
+bit 2 O 1 PAD57 1 0 Z
+bit 1 C 0 *
+bit 0 I 1 IPAD58
--- /dev/null
+signal TCK
+signal TDI
+signal TDO
+signal TMS
+signal PAD100
+signal PAD101
+signal PAD102
+signal PAD60
+signal PAD61
+signal PAD104
+signal IPAD93
+signal PAD62
+signal PAD105
+signal PAD63
+signal PAD106
+signal PAD107
+signal IPAD204
+signal PAD65
+signal PAD109
+signal IPAD98
+signal PAD66
+signal PAD67
+signal PAD69
+signal IPAD209
+signal IPAD137
+signal IPAD138
+signal PAD181
+signal PAD182
+signal PAD183
+signal IPAD21
+signal PAD185
+signal IPAD22
+signal PAD186
+signal PAD187
+signal PAD188
+signal IPAD28
+signal IPAD29
+signal PAD110
+signal PAD111
+signal PAD70
+signal PAD113
+signal PAD71
+signal PAD114
+signal PAD72
+signal PAD115
+signal PAD116
+signal PAD117
+signal PAD74
+signal IPAD214
+signal PAD118
+signal PAD75
+signal PAD76
+signal PAD77
+signal IPAD144
+signal IPAD145
+signal PAD79
+signal IPAD219
+signal PAD190
+signal PAD191
+signal PAD192
+signal PAD193
+signal PAD195
+signal PAD196
+signal PAD197
+signal PAD198
+signal IPAD35
+signal IPAD36
+signal PAD120
+signal DONE
+signal PAD121
+signal PAD122
+signal PAD80
+signal PAD123
+signal PAD81
+signal PAD124
+signal PAD82
+signal PAD127
+signal PAD84
+signal IPAD151
+signal PAD128
+signal PAD85
+signal IPAD224
+signal IPAD152
+signal PAD86
+signal PAD87
+signal IPAD228
+signal PAD89
+signal IPAD3
+signal IPAD158
+signal IPAD159
+signal IPAD9
+signal PAD11
+signal IPAD42
+signal PAD12
+signal IPAD43
+signal PAD14
+signal IPAD46
+signal PAD15
+signal PAD16
+signal PAD17
+signal PAD18
+signal PAD19
+signal PAD200
+signal PAD201
+signal PAD202
+signal PAD203
+signal PAD130
+signal PAD131
+signal PAD205
+signal PAD132
+signal PAD90
+signal PAD206
+signal PAD133
+signal PAD91
+signal PAD207
+signal PAD134
+signal PAD208
+signal PAD92
+signal PAD135
+signal PAD136
+signal PAD94
+signal PAD95
+signal IPAD162
+signal PAD139
+signal PAD96
+signal PAD97
+signal PAD99
+signal PAD20
+signal IPAD54
+signal PAD23
+signal IPAD55
+signal PAD24
+signal PAD25
+signal PAD26
+signal IPAD58
+signal PAD27
+signal IPAD59
+signal PAD210
+signal PAD211
+signal PAD212
+signal PAD140
+signal PAD213
+signal PAD141
+signal PAD142
+signal PAD215
+signal PAD143
+signal PAD216
+signal PAD217
+signal PAD218
+signal PAD146
+signal PAD147
+signal IPAD170
+signal PAD148
+signal IPAD171
+signal PAD149
+signal IPAD174
+signal IPAD175
+signal PAD30
+signal PAD31
+signal PAD32
+signal IPAD64
+signal PAD33
+signal PAD34
+signal PAD1
+signal PAD2
+signal IPAD68
+signal PAD37
+signal PAD4
+signal IPAD103
+signal PAD5
+signal PAD38
+signal PAD6
+signal PAD39
+signal PAD220
+signal PAD7
+signal PAD221
+signal PAD8
+signal PAD222
+signal IPAD108
+signal PAD150
+signal PAD223
+signal PAD225
+signal PAD153
+signal PAD226
+signal PAD154
+signal PAD227
+signal PAD155
+signal PAD156
+signal PAD229
+signal PAD157
+signal IPAD180
+signal IPAD184
+signal IPAD189
+signal PAD40
+signal PAD41
+signal IPAD73
+signal PAD44
+signal PAD45
+signal IPAD112
+signal IPAD78
+signal PAD47
+signal PAD48
+signal PAD49
+signal PAD230
+signal PAD231
+signal PAD232
+signal IPAD119
+signal PAD160
+signal PAD161
+signal PAD163
+signal PAD164
+signal PAD165
+signal PAD166
+signal PAD167
+signal PAD168
+signal PAD169
+signal PROG_B
+signal IPAD194
+signal IPAD199
+signal PAD50
+signal PAD51
+signal IPAD83
+signal PAD52
+signal PAD53
+signal IPAD88
+signal PAD56
+signal PAD57
+signal IPAD125
+signal IPAD126
+signal IPAD129
+signal PAD172
+signal IPAD10
+signal PAD173
+signal PAD176
+signal IPAD13
+signal PAD177
+signal PAD178
+signal PAD179
+signal GND0
+signal GND1
+signal GND2
+signal GND3
+signal GND4
+signal GND5
+signal GND6
+signal GND7
+signal GND8
+signal GND9
+signal GND10
+signal GND11
+signal GND12
+signal GND13
+signal GND14
+signal GND15
+signal GND16
+signal GND17
+signal GND18
+signal GND19
+signal VDD0
+signal VDD1
+signal VDD2
+signal VDD3
+signal VDD4
+signal VDD5
+signal VDD6
+signal VDD7
+signal VDD8
+signal VDD9
+signal VDD10
+signal VDD11
+signal VDD12
+signal VDD13
+signal VDD14
+signal VDD15
+signal Vaux0
+signal Vaux1
+signal Vaux2
+signal Vaux3
+signal Vaux4
+signal Vaux5
+signal Vaux6
+
+register BSR 588
+register BR 1
+register DIR 32
+
+instruction length 6
+
+instruction SAMPLE/PRELOAD 100000 BSR
+instruction IDCODE 100100 DIR
+instruction EXTEST 111100 BSR
+instruction BYPASS 111111 BR
+
+bit 587 I 1 IPAD59
+bit 586 I 1 PAD60
+bit 585 O 1 PAD60 584 0 Z
+bit 584 C 0 *
+bit 583 I 1 PAD61
+bit 582 O 1 PAD61 581 0 Z
+bit 581 C 0 *
+bit 580 I 1 PAD62
+bit 579 O 1 PAD62 578 0 Z
+bit 578 C 0 *
+bit 577 I 1 PAD63
+bit 576 O 1 PAD63 575 0 Z
+bit 575 C 0 *
+bit 574 O 1 *
+bit 573 O 1 *
+bit 572 O 1 *
+bit 571 O 1 *
+bit 570 O 1 *
+bit 569 O 1 *
+bit 568 O 1 *
+bit 567 O 1 *
+bit 566 O 1 *
+bit 565 O 1 *
+bit 564 I 1 IPAD68
+bit 563 O 1 *
+bit 562 O 1 *
+bit 561 O 1 *
+bit 560 O 1 *
+bit 559 O 1 *
+bit 558 O 1 *
+bit 557 I 1 PAD71
+bit 556 O 1 PAD71 555 0 Z
+bit 555 C 0 *
+bit 554 I 1 PAD72
+bit 553 O 1 PAD72 552 0 Z
+bit 552 C 0 *
+bit 551 O 1 *
+bit 550 I 1 PAD74
+bit 549 O 1 PAD74 548 0 Z
+bit 548 C 0 *
+bit 547 I 1 PAD75
+bit 546 O 1 PAD75 545 0 Z
+bit 545 C 0 *
+bit 544 O 1 *
+bit 543 O 1 *
+bit 542 O 1 *
+bit 541 O 1 *
+bit 540 O 1 *
+bit 539 O 1 *
+bit 538 I 1 IPAD78
+bit 537 I 1 PAD79
+bit 536 O 1 PAD79 535 0 Z
+bit 535 C 0 *
+bit 534 I 1 PAD80
+bit 533 O 1 PAD80 532 0 Z
+bit 532 C 0 *
+bit 531 I 1 PAD81
+bit 530 O 1 PAD81 529 0 Z
+bit 529 C 0 *
+bit 528 I 1 PAD82
+bit 527 O 1 PAD82 526 0 Z
+bit 526 C 0 *
+bit 525 I 1 IPAD83
+bit 524 I 1 PAD84
+bit 523 O 1 PAD84 522 0 Z
+bit 522 C 0 *
+bit 521 I 1 PAD85
+bit 520 O 1 PAD85 519 0 Z
+bit 519 C 0 *
+bit 518 I 1 PAD86
+bit 517 O 1 PAD86 516 0 Z
+bit 516 C 0 *
+bit 515 I 1 PAD87
+bit 514 O 1 PAD87 513 0 Z
+bit 513 C 0 *
+bit 512 I 1 IPAD88
+bit 511 I 1 PAD89
+bit 510 O 1 PAD89 509 0 Z
+bit 509 C 0 *
+bit 508 I 1 PAD90
+bit 507 O 1 PAD90 506 0 Z
+bit 506 C 0 *
+bit 505 I 1 PAD91
+bit 504 O 1 PAD91 503 0 Z
+bit 503 C 0 *
+bit 502 I 1 PAD92
+bit 501 O 1 PAD92 500 0 Z
+bit 500 C 0 *
+bit 499 I 1 IPAD93
+bit 498 I 1 PAD94
+bit 497 O 1 PAD94 496 0 Z
+bit 496 C 0 *
+bit 495 I 1 PAD95
+bit 494 O 1 PAD95 493 0 Z
+bit 493 C 0 *
+bit 492 I 1 PAD96
+bit 491 O 1 PAD96 490 0 Z
+bit 490 C 0 *
+bit 489 I 1 PAD97
+bit 488 O 1 PAD97 487 0 Z
+bit 487 C 0 *
+bit 486 I 1 IPAD98
+bit 485 O 1 *
+bit 484 O 1 *
+bit 483 O 1 *
+bit 482 O 1 *
+bit 481 O 1 *
+bit 480 O 1 *
+bit 479 I 1 PAD101
+bit 478 O 1 PAD101 477 0 Z
+bit 477 C 0 *
+bit 476 I 1 PAD102
+bit 475 O 1 PAD102 474 0 Z
+bit 474 C 0 *
+bit 473 O 1 *
+bit 472 O 1 *
+bit 471 O 1 *
+bit 470 O 1 *
+bit 469 O 1 *
+bit 468 O 1 *
+bit 467 O 1 *
+bit 466 I 1 PAD106
+bit 465 O 1 PAD106 464 0 Z
+bit 464 C 0 *
+bit 463 I 1 PAD107
+bit 462 O 1 PAD107 461 0 Z
+bit 461 C 0 *
+bit 460 O 1 *
+bit 459 O 1 *
+bit 458 O 1 *
+bit 457 O 1 *
+bit 456 O 1 *
+bit 455 O 1 *
+bit 454 O 1 *
+bit 453 O 1 *
+bit 452 O 1 *
+bit 451 O 1 *
+bit 450 I 1 IPAD112
+bit 449 I 1 PAD113
+bit 448 O 1 *
+bit 447 O 1 *
+bit 446 I 1 PAD114
+bit 445 O 1 *
+bit 444 O 1 *
+bit 443 I 1 PAD115
+bit 442 O 1 *
+bit 441 O 1 *
+bit 440 I 1 PAD116
+bit 439 O 1 *
+bit 438 O 1 *
+bit 437 I 1 DONE
+bit 436 O 1 *
+bit 435 O 1 *
+bit 434 I 1 PAD117
+bit 433 O 1 *
+bit 432 O 1 *
+bit 431 I 1 PAD118
+bit 430 O 1 *
+bit 429 O 1 *
+bit 428 I 1 IPAD119
+bit 427 I 1 PAD120
+bit 426 O 1 *
+bit 425 O 1 *
+bit 424 I 1 PAD121
+bit 423 O 1 *
+bit 422 O 1 *
+bit 421 I 1 PAD122
+bit 420 O 1 *
+bit 419 O 1 *
+bit 418 I 1 PAD123
+bit 417 O 1 *
+bit 416 O 1 *
+bit 415 I 1 PAD124
+bit 414 O 1 *
+bit 413 O 1 *
+bit 412 O 1 *
+bit 411 O 1 *
+bit 410 I 1 PAD127
+bit 409 O 1 *
+bit 408 O 1 *
+bit 407 I 1 PAD128
+bit 406 O 1 *
+bit 405 O 1 *
+bit 404 I 1 IPAD129
+bit 403 I 1 PAD130
+bit 402 O 1 *
+bit 401 O 1 *
+bit 400 I 1 PAD131
+bit 399 O 1 *
+bit 398 O 1 *
+bit 397 O 1 *
+bit 396 O 1 *
+bit 395 O 1 *
+bit 394 O 1 *
+bit 393 O 1 *
+bit 392 O 1 *
+bit 391 O 1 *
+bit 390 O 1 *
+bit 389 O 1 *
+bit 388 O 1 *
+bit 387 O 1 *
+bit 386 O 1 *
+bit 385 O 1 *
+bit 384 O 1 *
+bit 383 O 1 *
+bit 382 O 1 *
+bit 381 O 1 *
+bit 380 I 1 PAD139
+bit 379 O 1 *
+bit 378 O 1 *
+bit 377 I 1 PAD140
+bit 376 O 1 *
+bit 375 O 1 *
+bit 374 I 1 PAD141
+bit 373 O 1 *
+bit 372 O 1 *
+bit 371 I 1 PAD142
+bit 370 O 1 PAD113 369 0 Z
+bit 369 C 0 *
+bit 368 I 1 PAD143
+bit 367 O 1 IPAD112 366 0 Z
+bit 366 C 0 *
+bit 365 I 1 IPAD144
+bit 364 I 1 IPAD145
+bit 363 I 1 PAD146
+bit 362 O 1 *
+bit 361 O 1 *
+bit 360 I 1 PAD147
+bit 359 O 1 *
+bit 358 O 1 *
+bit 357 I 1 PAD148
+bit 356 O 1 *
+bit 355 O 1 *
+bit 354 I 1 PAD149
+bit 353 O 1 *
+bit 352 O 1 *
+bit 351 I 1 PAD150
+bit 350 O 1 *
+bit 349 O 1 *
+bit 348 I 1 IPAD151
+bit 347 I 1 IPAD152
+bit 346 O 1 *
+bit 345 O 1 *
+bit 344 O 1 *
+bit 343 O 1 *
+bit 342 O 1 *
+bit 341 O 1 *
+bit 340 O 1 *
+bit 339 O 1 *
+bit 338 O 1 *
+bit 337 I 1 PAD156
+bit 336 O 1 *
+bit 335 O 1 *
+bit 334 I 1 PAD157
+bit 333 O 1 *
+bit 332 O 1 *
+bit 331 O 1 *
+bit 330 O 1 *
+bit 329 O 1 *
+bit 328 O 1 *
+bit 327 O 1 *
+bit 326 O 1 *
+bit 325 O 1 *
+bit 324 O 1 *
+bit 323 O 1 *
+bit 322 I 1 PAD163
+bit 321 O 1 *
+bit 320 O 1 *
+bit 319 I 1 PAD164
+bit 318 O 1 *
+bit 317 O 1 *
+bit 316 I 1 PAD165
+bit 315 O 1 *
+bit 314 O 1 *
+bit 313 I 1 PAD166
+bit 312 O 1 *
+bit 311 O 1 *
+bit 310 O 1 *
+bit 309 O 1 *
+bit 308 O 1 *
+bit 307 I 1 PAD168
+bit 306 O 1 *
+bit 305 O 1 *
+bit 304 I 1 PAD169
+bit 303 O 1 *
+bit 302 O 1 *
+bit 301 I 1 IPAD170
+bit 300 I 1 IPAD171
+bit 299 I 1 PAD172
+bit 298 O 1 *
+bit 297 O 1 *
+bit 296 I 1 PAD173
+bit 295 O 1 *
+bit 294 O 1 *
+bit 293 I 1 IPAD174
+bit 292 I 1 IPAD175
+bit 291 I 1 PAD176
+bit 290 O 1 *
+bit 289 O 1 *
+bit 288 I 1 PAD177
+bit 287 O 1 *
+bit 286 O 1 *
+bit 285 I 1 PAD178
+bit 284 O 1 *
+bit 283 O 1 *
+bit 282 I 1 PAD179
+bit 281 O 1 *
+bit 280 O 1 *
+bit 279 O 1 *
+bit 278 I 1 PAD181
+bit 277 O 1 *
+bit 276 O 1 *
+bit 275 O 1 *
+bit 274 O 1 *
+bit 273 O 1 *
+bit 272 O 1 *
+bit 271 O 1 *
+bit 270 O 1 *
+bit 269 I 1 IPAD184
+bit 268 O 1 *
+bit 267 O 1 *
+bit 266 O 1 *
+bit 265 O 1 *
+bit 264 O 1 *
+bit 263 O 1 *
+bit 262 I 1 PAD187
+bit 261 O 1 *
+bit 260 O 1 *
+bit 259 I 1 PAD188
+bit 258 O 1 *
+bit 257 O 1 *
+bit 256 O 1 *
+bit 255 I 1 PAD190
+bit 254 O 1 *
+bit 253 O 1 *
+bit 252 I 1 PAD191
+bit 251 O 1 *
+bit 250 O 1 *
+bit 249 O 1 *
+bit 248 O 1 *
+bit 247 O 1 *
+bit 246 O 1 *
+bit 245 O 1 *
+bit 244 O 1 *
+bit 243 O 1 *
+bit 242 I 1 PAD195
+bit 241 O 1 *
+bit 240 O 1 *
+bit 239 I 1 PAD196
+bit 238 O 1 *
+bit 237 O 1 *
+bit 236 I 1 PAD197
+bit 235 O 1 *
+bit 234 O 1 *
+bit 233 I 1 PAD198
+bit 232 O 1 *
+bit 231 O 1 *
+bit 230 I 1 IPAD199
+bit 229 I 1 PAD200
+bit 228 O 1 *
+bit 227 O 1 *
+bit 226 I 1 PAD201
+bit 225 O 1 *
+bit 224 O 1 *
+bit 223 I 1 PAD202
+bit 222 O 1 *
+bit 221 O 1 *
+bit 220 I 1 PAD203
+bit 219 O 1 *
+bit 218 O 1 *
+bit 217 I 1 IPAD204
+bit 216 I 1 PAD205
+bit 215 O 1 *
+bit 214 O 1 *
+bit 213 I 1 PAD206
+bit 212 O 1 *
+bit 211 O 1 *
+bit 210 I 1 PAD207
+bit 209 O 1 *
+bit 208 O 1 *
+bit 207 I 1 PAD208
+bit 206 O 1 *
+bit 205 O 1 *
+bit 204 I 1 IPAD209
+bit 203 I 1 PAD210
+bit 202 O 1 *
+bit 201 O 1 *
+bit 200 I 1 PAD104
+bit 199 O 1 *
+bit 198 O 1 *
+bit 197 I 1 PAD212
+bit 196 O 1 *
+bit 195 O 1 *
+bit 194 I 1 PAD109
+bit 193 O 1 *
+bit 192 O 1 *
+bit 191 I 1 IPAD214
+bit 190 O 1 *
+bit 189 O 1 *
+bit 188 O 1 *
+bit 187 O 1 *
+bit 186 O 1 *
+bit 185 O 1 *
+bit 184 I 1 PAD217
+bit 183 O 1 *
+bit 182 O 1 *
+bit 181 I 1 PAD136
+bit 180 O 1 *
+bit 179 O 1 *
+bit 178 O 1 *
+bit 177 O 1 *
+bit 176 O 1 *
+bit 175 O 1 *
+bit 174 O 1 *
+bit 173 O 1 *
+bit 172 O 1 *
+bit 171 I 1 PAD222
+bit 170 O 1 *
+bit 169 O 1 *
+bit 168 I 1 PAD223
+bit 167 O 1 *
+bit 166 O 1 *
+bit 165 O 1 *
+bit 164 O 1 *
+bit 163 O 1 *
+bit 162 O 1 *
+bit 161 O 1 *
+bit 160 O 1 *
+bit 159 O 1 *
+bit 158 O 1 *
+bit 157 O 1 *
+bit 156 O 1 *
+bit 155 I 1 IPAD228
+bit 154 I 1 PAD229
+bit 153 O 1 *
+bit 152 O 1 *
+bit 151 I 1 PAD230
+bit 150 O 1 *
+bit 149 O 1 *
+bit 148 I 1 PAD231
+bit 147 O 1 *
+bit 146 O 1 *
+bit 145 I 1 PAD183
+bit 144 O 1 *
+bit 143 O 1 *
+bit 142 I 1 PAD182
+bit 141 I 1 PAD1
+bit 140 O 1 PAD1 139 0 Z
+bit 139 C 0 *
+bit 138 I 1 PAD2
+bit 137 O 1 PAD2 136 0 Z
+bit 136 C 0 *
+bit 135 I 1 IPAD3
+bit 134 I 1 PAD4
+bit 133 O 1 PAD4 132 0 Z
+bit 132 C 0 *
+bit 131 I 1 PAD5
+bit 130 O 1 PAD5 129 0 Z
+bit 129 C 0 *
+bit 128 O 1 *
+bit 127 O 1 *
+bit 126 O 1 *
+bit 125 I 1 PAD7
+bit 124 O 1 PAD7 123 0 Z
+bit 123 C 0 *
+bit 122 I 1 PAD8
+bit 121 O 1 PAD8 120 0 Z
+bit 120 C 0 *
+bit 119 O 1 *
+bit 118 O 1 *
+bit 117 I 1 PAD11
+bit 116 O 1 PAD11 115 0 Z
+bit 115 C 0 *
+bit 114 I 1 PAD12
+bit 113 O 1 PAD12 112 0 Z
+bit 112 C 0 *
+bit 111 I 1 IPAD13
+bit 110 O 1 *
+bit 109 O 1 *
+bit 108 O 1 *
+bit 107 O 1 *
+bit 106 O 1 *
+bit 105 O 1 *
+bit 104 I 1 PAD16
+bit 103 O 1 PAD16 102 0 Z
+bit 102 C 0 *
+bit 101 I 1 PAD17
+bit 100 O 1 PAD17 99 0 Z
+bit 99 C 0 *
+bit 98 O 1 *
+bit 97 O 1 *
+bit 96 O 1 *
+bit 95 O 1 *
+bit 94 O 1 *
+bit 93 O 1 *
+bit 92 O 1 *
+bit 91 O 1 *
+bit 90 O 1 *
+bit 89 O 1 *
+bit 88 O 1 *
+bit 87 I 1 PAD23
+bit 86 O 1 PAD23 85 0 Z
+bit 85 C 0 *
+bit 84 I 1 PAD24
+bit 83 O 1 PAD24 82 0 Z
+bit 82 C 0 *
+bit 81 I 1 PAD25
+bit 80 O 1 PAD25 79 0 Z
+bit 79 C 0 *
+bit 78 I 1 PAD26
+bit 77 O 1 PAD26 76 0 Z
+bit 76 C 0 *
+bit 75 I 1 PAD27
+bit 74 O 1 PAD27 73 0 Z
+bit 73 C 0 *
+bit 72 I 1 IPAD28
+bit 71 I 1 IPAD29
+bit 70 I 1 PAD30
+bit 69 O 1 PAD30 68 0 Z
+bit 68 C 0 *
+bit 67 I 1 PAD31
+bit 66 O 1 PAD31 65 0 Z
+bit 65 C 0 *
+bit 64 I 1 PAD32
+bit 63 O 1 PAD32 62 0 Z
+bit 62 C 0 *
+bit 61 I 1 PAD33
+bit 60 O 1 PAD33 59 0 Z
+bit 59 C 0 *
+bit 58 I 1 PAD34
+bit 57 O 1 PAD34 56 0 Z
+bit 56 C 0 *
+bit 55 I 1 IPAD35
+bit 54 I 1 IPAD36
+bit 53 O 1 *
+bit 52 O 1 *
+bit 51 O 1 *
+bit 50 O 1 *
+bit 49 O 1 *
+bit 48 O 1 *
+bit 47 O 1 *
+bit 46 O 1 *
+bit 45 O 1 *
+bit 44 I 1 PAD40
+bit 43 O 1 PAD40 42 0 Z
+bit 42 C 0 *
+bit 41 I 1 PAD41
+bit 40 O 1 PAD41 39 0 Z
+bit 39 C 0 *
+bit 38 O 1 *
+bit 37 O 1 *
+bit 36 O 1 *
+bit 35 O 1 *
+bit 34 O 1 *
+bit 33 O 1 *
+bit 32 O 1 *
+bit 31 O 1 *
+bit 30 I 1 IPAD46
+bit 29 I 1 PAD47
+bit 28 O 1 PAD47 27 0 Z
+bit 27 C 0 *
+bit 26 I 1 PAD48
+bit 25 O 1 PAD48 24 0 Z
+bit 24 C 0 *
+bit 23 I 1 PAD49
+bit 22 O 1 PAD49 21 0 Z
+bit 21 C 0 *
+bit 20 I 1 PAD50
+bit 19 O 1 PAD50 18 0 Z
+bit 18 C 0 *
+bit 17 O 1 *
+bit 16 O 1 *
+bit 15 O 1 *
+bit 14 I 1 PAD52
+bit 13 O 1 PAD52 12 0 Z
+bit 12 C 0 *
+bit 11 I 1 PAD53
+bit 10 O 1 PAD53 9 0 Z
+bit 9 C 0 *
+bit 8 O 1 *
+bit 7 O 1 *
+bit 6 I 1 PAD56
+bit 5 O 1 PAD56 4 0 Z
+bit 4 C 0 *
+bit 3 I 1 PAD57
+bit 2 O 1 PAD57 1 0 Z
+bit 1 C 0 *
+bit 0 I 1 IPAD58
--- /dev/null
+#
+# $Id: STEPPINGS,v 1.1 2003/02/14 11:14:56 telka Exp $
+#
+# Copyright (C) 2003 Tower Technologies s.r.l.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Alessandro Zummo <azummo@towertech.it>, 2003.
+# DJF:w
+
+# bits 31-28 of the Device Identification Register
+0100 xc9572xl_vq44 0
--- /dev/null
+signal PB00_01
+signal PB00_04
+signal PB00_05
+signal PB00_07
+signal PB00_08
+signal PB00_10
+signal PB00_13
+signal PB00_14
+signal PB00_16
+signal PB01_01
+signal PB01_04
+signal PB01_05
+signal PB01_07
+signal PB01_08
+signal PB01_10
+signal PB01_13
+signal PB01_14
+signal PB01_16
+signal PB02_01
+signal PB02_04
+signal PB02_07
+signal PB02_08
+signal PB02_10
+signal PB02_13
+signal PB02_14
+signal PB02_15
+signal PB02_16
+signal PB03_01
+signal PB03_04
+signal PB03_07
+signal PB03_10
+signal PB03_13
+signal PB03_14
+signal PB03_16
+signal TCK
+signal TDI
+signal TDO
+signal TMS
+signal Vccint_1
+signal VccInt_Vpp
+signal Vccio
+signal Vssint_2
+signal Vssio_1
+
+register BSR 216
+register BR 1
+register DIR 32
+
+instruction length 8
+
+instruction BYPASS 11111111 BR
+instruction EXTEST 00000000 BSR
+instruction IDCODE 11111110 DIR
+instruction SAMPLE/PRELOAD 00000001 BSR
+
+bit 215 O 1 *
+bit 214 O 1 *
+bit 213 O 1 *
+bit 212 I 1 PB00_01
+bit 211 O 1 PB00_01 210 0 Z
+bit 210 C 0 *
+bit 209 O 1 *
+bit 208 O 1 *
+bit 207 O 1 *
+bit 206 O 1 *
+bit 205 O 1 *
+bit 204 O 1 *
+bit 203 I 1 PB00_04
+bit 202 O 1 PB00_04 201 0 Z
+bit 201 C 0 *
+bit 200 I 1 PB00_05
+bit 199 O 1 PB00_05 198 0 Z
+bit 198 C 0 *
+bit 197 O 1 *
+bit 196 O 1 *
+bit 195 O 1 *
+bit 194 I 1 PB00_07
+bit 193 O 1 PB00_07 192 0 Z
+bit 192 C 0 *
+bit 191 I 1 PB00_08
+bit 190 O 1 PB00_08 189 0 Z
+bit 189 C 0 *
+bit 188 O 1 *
+bit 187 O 1 *
+bit 186 O 1 *
+bit 185 I 1 PB00_10
+bit 184 O 1 PB00_10 183 0 Z
+bit 183 C 0 *
+bit 182 O 1 *
+bit 181 O 1 *
+bit 180 O 1 *
+bit 179 O 1 *
+bit 178 O 1 *
+bit 177 O 1 *
+bit 176 I 1 PB00_13
+bit 175 O 1 PB00_13 174 0 Z
+bit 174 C 0 *
+bit 173 I 1 PB00_14
+bit 172 O 1 PB00_14 171 0 Z
+bit 171 C 0 *
+bit 170 O 1 *
+bit 169 O 1 *
+bit 168 O 1 *
+bit 167 I 1 PB00_16
+bit 166 O 1 PB00_16 165 0 Z
+bit 165 C 0 *
+bit 164 O 1 *
+bit 163 O 1 *
+bit 162 O 1 *
+bit 161 O 1 *
+bit 160 O 1 *
+bit 159 O 1 *
+bit 158 I 1 PB01_01
+bit 157 O 1 PB01_01 156 0 Z
+bit 156 C 0 *
+bit 155 O 1 *
+bit 154 O 1 *
+bit 153 O 1 *
+bit 152 O 1 *
+bit 151 O 1 *
+bit 150 O 1 *
+bit 149 I 1 PB01_04
+bit 148 O 1 PB01_04 147 0 Z
+bit 147 C 0 *
+bit 146 I 1 PB01_05
+bit 145 O 1 PB01_05 144 0 Z
+bit 144 C 0 *
+bit 143 O 1 *
+bit 142 O 1 *
+bit 141 O 1 *
+bit 140 I 1 PB01_07
+bit 139 O 1 PB01_07 138 0 Z
+bit 138 C 0 *
+bit 137 I 1 PB01_08
+bit 136 O 1 PB01_08 135 0 Z
+bit 135 C 0 *
+bit 134 O 1 *
+bit 133 O 1 *
+bit 132 O 1 *
+bit 131 I 1 PB01_10
+bit 130 O 1 PB01_10 129 0 Z
+bit 129 C 0 *
+bit 128 O 1 *
+bit 127 O 1 *
+bit 126 O 1 *
+bit 125 O 1 *
+bit 124 O 1 *
+bit 123 O 1 *
+bit 122 I 1 PB01_13
+bit 121 O 1 PB01_13 120 0 Z
+bit 120 C 0 *
+bit 119 I 1 PB01_14
+bit 118 O 1 PB01_14 117 0 Z
+bit 117 C 0 *
+bit 116 O 1 *
+bit 115 O 1 *
+bit 114 O 1 *
+bit 113 I 1 PB01_16
+bit 112 O 1 PB01_16 111 0 Z
+bit 111 C 0 *
+bit 110 O 1 *
+bit 109 O 1 *
+bit 108 O 1 *
+bit 107 O 1 *
+bit 106 O 1 *
+bit 105 O 1 *
+bit 104 I 1 PB02_01
+bit 103 O 1 PB02_01 102 0 Z
+bit 102 C 0 *
+bit 101 O 1 *
+bit 100 O 1 *
+bit 99 O 1 *
+bit 98 O 1 *
+bit 97 O 1 *
+bit 96 O 1 *
+bit 95 I 1 PB02_04
+bit 94 O 1 PB02_04 93 0 Z
+bit 93 C 0 *
+bit 92 O 1 *
+bit 91 O 1 *
+bit 90 O 1 *
+bit 89 O 1 *
+bit 88 O 1 *
+bit 87 O 1 *
+bit 86 I 1 PB02_07
+bit 85 O 1 PB02_07 84 0 Z
+bit 84 C 0 *
+bit 83 I 1 PB02_08
+bit 82 O 1 PB02_08 81 0 Z
+bit 81 C 0 *
+bit 80 O 1 *
+bit 79 O 1 *
+bit 78 O 1 *
+bit 77 I 1 PB02_10
+bit 76 O 1 PB02_10 75 0 Z
+bit 75 C 0 *
+bit 74 O 1 *
+bit 73 O 1 *
+bit 72 O 1 *
+bit 71 O 1 *
+bit 70 O 1 *
+bit 69 O 1 *
+bit 68 I 1 PB02_13
+bit 67 O 1 PB02_13 66 0 Z
+bit 66 C 0 *
+bit 65 I 1 PB02_14
+bit 64 O 1 PB02_14 63 0 Z
+bit 63 C 0 *
+bit 62 I 1 PB02_15
+bit 61 O 1 PB02_15 60 0 Z
+bit 60 C 0 *
+bit 59 I 1 PB02_16
+bit 58 O 1 PB02_16 57 0 Z
+bit 57 C 0 *
+bit 56 O 1 *
+bit 55 O 1 *
+bit 54 O 1 *
+bit 53 O 1 *
+bit 52 O 1 *
+bit 51 O 1 *
+bit 50 I 1 PB03_01
+bit 49 O 1 PB03_01 48 0 Z
+bit 48 C 0 *
+bit 47 O 1 *
+bit 46 O 1 *
+bit 45 O 1 *
+bit 44 O 1 *
+bit 43 O 1 *
+bit 42 O 1 *
+bit 41 I 1 PB03_04
+bit 40 O 1 PB03_04 39 0 Z
+bit 39 C 0 *
+bit 38 O 1 *
+bit 37 O 1 *
+bit 36 O 1 *
+bit 35 O 1 *
+bit 34 O 1 *
+bit 33 O 1 *
+bit 32 I 1 PB03_07
+bit 31 O 1 PB03_07 30 0 Z
+bit 30 C 0 *
+bit 29 O 1 *
+bit 28 O 1 *
+bit 27 O 1 *
+bit 26 O 1 *
+bit 25 O 1 *
+bit 24 O 1 *
+bit 23 I 1 PB03_10
+bit 22 O 1 PB03_10 21 0 Z
+bit 21 C 0 *
+bit 20 O 1 *
+bit 19 O 1 *
+bit 18 O 1 *
+bit 17 O 1 *
+bit 16 O 1 *
+bit 15 O 1 *
+bit 14 I 1 PB03_13
+bit 13 O 1 PB03_13 12 0 Z
+bit 12 C 0 *
+bit 11 I 1 PB03_14
+bit 10 O 1 PB03_14 9 0 Z
+bit 9 C 0 *
+bit 8 O 1 *
+bit 7 O 1 *
+bit 6 O 1 *
+bit 5 I 1 PB03_16
+bit 4 O 1 PB03_16 3 0 Z
+bit 3 C 0 *
+bit 2 O 1 *
+bit 1 O 1 *
+bit 0 O 1 *
--- /dev/null
+#
+# $Id: STEPPINGS,v 1.1 2003/02/14 11:14:56 telka Exp $
+#
+# Copyright (C) 2003 Tower Technologies s.r.l.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Jerome Debard <jdebard@vmetro.no>, 2005.
+#
+
+# bits 31-28 of the Device Identification Register
+0000 xcf04s 0
--- /dev/null
+#
+# JTAG declarations for XCF04s
+# Copyright (C) 2005
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Jerome Debard <jdebard@vmetro.no>, 2005.
+#
+
+signal D0 1
+signal NC1 2
+signal CLK 3
+signal TDI 4
+signal TMS 5
+signal TCK 6
+signal CF 7
+signal OE_RESET 8
+signal NC2 9
+signal CE 10
+signal GND 11
+signal NC3 12
+signal CEO 13
+signal NC4 14
+signal NC5 15
+signal NC6 16
+signal TDO 17
+signal VCC 18
+signal VCCO 19
+signal VCCAUX 20
+
+
+
+# mandatory data registers
+register BSR 25
+register BR 1
+
+# optional data registers
+register UCR 32
+
+# user-defined registers
+
+
+# instructions
+instruction length 8
+
+# mandatory instructions
+instruction EXTEST 00000000 BSR
+instruction SAMPLE/PRELOAD 00000001 BSR
+instruction BYPASS 11111111 BR
+#instruction INTEST ???????? BSR
+instruction IDCODE 11111110 UCR
+instruction USERCODE 11111101 UCR
+instruction HIGHZ 11111100 BR
+instruction CLAMP 11111010 BR
+
+# user-defined instructions
+#instruction ISPEN 11101000
+#instruction ISPENC 11101001
+#instruction FPGM 11101010
+#instruction FADDR 11101011
+#instruction FVFY0 11101111
+#instruction FVFY1 11111000
+#instruction FVFY3 11100010
+#instruction FVFY6 11100110
+#instruction FERASE 11101100
+#instruction SERASE 00001010
+#instruction FDATA0 11101101
+#instruction FDATA3 11110011
+#instruction FBLANK0 11100101
+#instruction FBLANK3 11100001
+#instruction FBLANK6 11100100
+#instruction NORMRST 11110000
+#instruction CONFIG 11101110
+#instruction priv1 11110001
+#instruction ISCTESTSTATUS 11100011
+#instruction priv3 11100111
+#instruction priv4 11110110
+#instruction priv5 11100000
+#instruction priv6 11110111
+#instruction priv7 11110010
+#instruction ISCCLRSTATUS 11110100
+#instruction priv9 11110101
+
+
+# BSR description
+bit 0 I ? CLK
+bit 1 X ? .
+bit 2 X ? .
+bit 3 C ? .
+bit 4 O ? D0 3 0 Z
+bit 5 X ? .
+bit 6 X ? .
+bit 7 X ? .
+bit 8 X ? .
+bit 9 X ? .
+bit 10 X ? .
+bit 11 C ? .
+bit 12 O ? CEO 11 0 Z
+bit 13 X ? .
+bit 14 X ? .
+bit 15 I ? CE
+bit 16 X ? .
+bit 17 X ? .
+bit 18 C ? .
+bit 19 O ? OE_RESET 18 0 Z
+bit 20 I ? OE_RESET
+bit 21 C ? .
+bit 22 O ? CF 21 0 Z
+bit 23 X ? .
+bit 24 X ? .
--- /dev/null
+#
+# $Id$
+#
+# Copyright (C) 2003 Jachym Holecek <freza@psi.cz>
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+
+# bits 31-28 of the Device Identification Register
+0000 xcr3032xl-vq44 0
--- /dev/null
+#
+# $Id$
+#
+# JTAG declarations for XCR3032XL-VQ44
+# Copyright (C) 2004 RightHand Technologies, Inc.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Andrew Dyer <adyer@righthandtech.com>, 2004
+#
+# Documentation:
+# [1] Xilinx Inc., "CoolRunner XPLA3 Preliminary Product Specification"
+# DS012 (v1.7) June 23, 2003
+# [2] Xilinx Inc., "BSDL file for device XCR3032, package VQ44
+# Revision: 1.2", 2002-01-03
+# [3] Xilinx Inc., "XCR3032XL 32 Macrocell CPLD Preliminary Product Specification"
+# DS023 (v1.8) August 15, 2003
+#
+signal tck
+signal tdi
+signal tdo
+signal tms
+signal CLK0_IN0
+signal CLK1_IN1
+signal CLK2_IN2
+signal CLK3_IN3
+signal A0
+signal A1
+signal A2
+signal A4
+signal A5
+signal A6
+signal A7
+signal A9
+signal A10
+signal A11
+signal A12
+signal A13
+signal A14
+signal A15
+signal B0
+signal B1
+signal B2
+signal B4
+signal B5
+signal B6
+signal B7
+signal B9
+signal B10
+signal B11
+signal B12
+signal B13
+signal B14
+signal B15
+signal VDDE1
+signal VDDE2
+signal VDDI1
+signal VDDI2
+signal GND1
+signal GND2
+signal GND3
+
+register BSR 132
+register BR 1
+register DIR 32
+
+instruction length 5
+
+instruction BYPASS 11111 BR
+instruction SAMPLE/PRELOAD 00010 BSR
+instruction EXTEST 00000 BSR
+instruction IDCODE 00001 DIR
+
+bit 131 O 1 *
+bit 130 I 1 A0
+bit 129 O 1 A0 128 0 Z
+bit 128 C 1 *
+bit 127 O 1 *
+bit 126 I 1 A1
+bit 125 O 1 A1 124 0 Z
+bit 124 C 1 *
+bit 123 O 1 *
+bit 122 I 1 A2
+bit 121 O 1 A2 120 0 Z
+bit 120 C 1 *
+bit 119 O 1 *
+bit 118 O 1 *
+bit 117 O 1 *
+bit 116 O 1 *
+bit 115 O 1 *
+bit 114 I 1 A4
+bit 113 O 1 A4 112 0 Z
+bit 112 C 1 *
+bit 111 O 1 *
+bit 110 I 1 A5
+bit 109 O 1 A5 108 0 Z
+bit 108 C 1 *
+bit 107 O 1 *
+bit 106 I 1 A6
+bit 105 O 1 A6 104 0 Z
+bit 104 C 1 *
+bit 103 O 1 *
+bit 102 I 1 A7
+bit 101 O 1 A7 100 0 Z
+bit 100 C 1 *
+bit 99 O 1 *
+bit 98 O 1 *
+bit 97 O 1 *
+bit 96 O 1 *
+bit 95 O 1 *
+bit 94 I 1 A9
+bit 93 O 1 A9 92 0 Z
+bit 92 C 1 *
+bit 91 O 1 *
+bit 90 I 1 A10
+bit 89 O 1 A10 88 0 Z
+bit 88 C 1 *
+bit 87 O 1 *
+bit 86 I 1 A11
+bit 85 O 1 A11 84 0 Z
+bit 84 C 1 *
+bit 83 O 1 *
+bit 82 I 1 A12
+bit 81 O 1 A12 80 0 Z
+bit 80 C 1 *
+bit 79 O 1 *
+bit 78 I 1 A13
+bit 77 O 1 A13 76 0 Z
+bit 76 C 1 *
+bit 75 O 1 *
+bit 74 I 1 A14
+bit 73 O 1 A14 72 0 Z
+bit 72 C 1 *
+bit 71 O 1 *
+bit 70 I 1 A15
+bit 69 O 1 A15 68 0 Z
+bit 68 C 1 *
+bit 67 O 1 *
+bit 66 I 1 B0
+bit 65 O 1 B0 64 0 Z
+bit 64 C 1 *
+bit 63 O 1 *
+bit 62 I 1 B1
+bit 61 O 1 B1 60 0 Z
+bit 60 C 1 *
+bit 59 O 1 *
+bit 58 I 1 B2
+bit 57 O 1 B2 56 0 Z
+bit 56 C 1 *
+bit 55 O 1 *
+bit 54 O 1 *
+bit 53 O 1 *
+bit 52 O 1 *
+bit 51 O 1 *
+bit 50 I 1 B4
+bit 49 O 1 B4 48 0 Z
+bit 48 C 1 *
+bit 47 O 1 *
+bit 46 I 1 B5
+bit 45 O 1 B5 44 0 Z
+bit 44 C 1 *
+bit 43 O 1 *
+bit 42 I 1 B6
+bit 41 O 1 B6 40 0 Z
+bit 40 C 1 *
+bit 39 O 1 *
+bit 38 I 1 B7
+bit 37 O 1 B7 36 0 Z
+bit 36 C 1 *
+bit 35 O 1 *
+bit 34 O 1 *
+bit 33 O 1 *
+bit 32 O 1 *
+bit 31 O 1 *
+bit 30 I 1 B9
+bit 29 O 1 B9 28 0 Z
+bit 28 C 1 *
+bit 27 O 1 *
+bit 26 I 1 B10
+bit 25 O 1 B10 24 0 Z
+bit 24 C 1 *
+bit 23 O 1 *
+bit 22 I 1 B11
+bit 21 O 1 B11 20 0 Z
+bit 20 C 1 *
+bit 19 O 1 *
+bit 18 I 1 B12
+bit 17 O 1 B12 16 0 Z
+bit 16 C 1 *
+bit 15 O 1 *
+bit 14 I 1 B13
+bit 13 O 1 B13 12 0 Z
+bit 12 C 1 *
+bit 11 O 1 *
+bit 10 I 1 B14
+bit 9 O 1 B14 8 0 Z
+bit 8 C 1 *
+bit 7 O 1 *
+bit 6 I 1 B15
+bit 5 O 1 B15 4 0 Z
+bit 4 C 1 *
+bit 3 I 1 CLK0_IN0
+bit 2 I 1 CLK1_IN1
+bit 1 I 1 CLK2_IN2
+bit 0 I 1 CLK3_IN3
--- /dev/null
+#
+# $Id$
+#
+# Copyright (C) 2002 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Marcel Telka <marcel@telka.sk>, 2002.
+#
+
+# bits 31-28 of the Device Identification Register
+0000 xcr3128xl-cs144 0
--- /dev/null
+#
+# $Id$
+#
+# JTAG declarations for XCR3128XL-CS144
+# Copyright (C) 2002 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Marcel Telka <marcel@telka.sk>, 2002.
+#
+# Documentation:
+# [1] Xilinx Inc., "CoolRunner XPLA3 CPLD Advance Product Specification",
+# DS012 (v1.5) January 7, 2002
+# [2] Xilinx Inc., "BSDL file for device xcr3128xl, package cs144
+# Revision 1.3", 2002-01-03
+# [3] Xilinx Inc., "XCR3128XL 128 Macrocell CPLD Preliminary Product
+# Specification", DS016 (v1.8) January 8, 2002
+#
+
+# 8 function blocks (A to H) by 16 macrocells (0 to 15)
+# see Table 3 in [3] and Table 4 in [3]
+signal A0 B12
+signal A2 D12
+signal A3 D13
+signal A4 E10
+signal A5 E11
+signal A6 E12
+signal A10 E13
+signal A11 F10
+signal A12 F12
+signal A13 F13
+signal A14 G10
+signal A15 G11
+signal B0 A13
+signal B1 A12
+signal B2 B11
+signal B3 A11
+signal B4 D10
+signal B5 C10
+signal B6 B10
+signal B10 D9
+signal B11 C9
+signal B12 B9
+signal B13 A9
+signal B14 D8
+signal B15 C8
+signal C0 G13
+signal C2 H13
+signal C3 H12
+signal C4 H11
+signal C5 J13
+signal C6 J12
+signal C10 J11
+signal C11 J10
+signal C12 K13
+signal C13 K12
+signal C14 K11
+signal C15 K10
+signal D0 M8
+signal D1 L8
+signal D2 K8
+signal D3 N9
+signal D4 L9
+signal D5 K9
+signal D6 N10
+signal D10 M10
+signal D11 L10
+signal D12 N11
+signal D13 M11
+signal D14 L11
+signal D15 M12
+signal E0 A1
+signal E1 A2
+signal E2 C3
+signal E3 B3
+signal E4 A3
+signal E5 C4
+signal E6 B4
+signal E10 A4
+signal E11 D5
+signal E12 B5
+signal E13 A5
+signal E14 D6
+signal E15 C6
+signal F0 B1
+signal F2 D1
+signal F3 E4
+signal F4 E3
+signal F5 E2
+signal F6 E1
+signal F10 F4
+signal F11 F3
+signal F12 F2
+signal F13 G2
+signal F14 G1
+signal F15 G3
+signal G0 N7
+signal G1 M7
+signal G2 N6
+signal G3 M6
+signal G4 M5
+signal G5 L5
+signal G6 K5
+signal G10 N4
+signal G11 M4
+signal G12 L4
+signal G13 K4
+signal G14 N3
+signal G15 M3
+signal GND A6 A8 C5 C13 D3 G4 H10 L6 L7 M9 N2 N8
+signal H0 H1
+signal H2 H3
+signal H3 H4
+signal H4 J1
+signal H5 J3
+signal H6 J4
+signal H10 K1
+signal H11 K2
+signal H12 K3
+signal H13 L1
+signal H14 M2
+signal H15 N1
+signal IN0_CLK0 D7
+signal IN1_CLK1 C7
+signal IN2_CLK2 A7
+signal IN3_CLK3 B7
+signal PORT_EN F1
+signal TCK G12
+signal TDI D2
+signal TDO D11
+signal TMS H2
+signal Vcc A10 B2 B6 B8 D4 F11 J2 K6 K7 L13 N5 N12
+signal N/C B13 C1 C2 C11 C12 L2 L3 L12 M1 M13 N13
+
+# mandatory data registers
+register BSR 444 # see [2]
+register BR 1
+# optional data registers
+register DIR 32
+# user-defined registers
+register ISPSR 274 # ISP (In-System Programming) Shift Register, see [2]
+
+# instructions - see [2]
+instruction length 5
+# mandatory instructions - see Table 3 in [1]
+instruction EXTEST 00000 BSR
+instruction SAMPLE/PRELOAD 00010 BSR
+instruction BYPASS 11111 BR
+# optional instructions - see Table 3 in [1]
+instruction IDCODE 00001 DIR
+instruction HIGHZ 00101 BR
+instruction INTEST 00011 BSR
+# user-defined instructions - see Table 5 in [1]
+instruction ENABLE 01001 ISPSR
+instruction ERASE 01010 ISPSR
+instruction PROGRAM 01011 ISPSR
+instruction DISABLE 10000 ISPSR
+instruction VERIFY 01100 ISPSR
+
+# see [2]
+bit 443 X ? .
+bit 442 I ? A0
+bit 441 O ? A0 440 0 Z
+bit 440 C ? A0
+bit 439 X ? .
+bit 438 X ? .
+bit 437 X ? .
+bit 436 X ? .
+bit 435 X ? .
+bit 434 I ? A2
+bit 433 O ? A2 432 0 Z
+bit 432 C ? A2
+bit 431 X ? .
+bit 430 I ? A3
+bit 429 O ? A3 428 0 Z
+bit 428 C ? A3
+bit 427 X ? .
+bit 426 I ? A4
+bit 425 O ? A4 424 0 Z
+bit 424 C ? A4
+bit 423 X ? .
+bit 422 I ? A5
+bit 421 O ? A5 420 0 Z
+bit 420 C ? A5
+bit 419 X ? .
+bit 418 I ? A6
+bit 417 O ? A6 416 0 Z
+bit 416 C ? A6
+bit 415 X ? .
+bit 414 X ? .
+bit 413 X ? .
+bit 412 X ? .
+bit 411 I ? A10
+bit 410 O ? A10 409 0 Z
+bit 409 C ? A10
+bit 408 X ? .
+bit 407 I ? A11
+bit 406 O ? A11 405 0 Z
+bit 405 C ? A11
+bit 404 X ? .
+bit 403 I ? A12
+bit 402 O ? A12 401 0 Z
+bit 401 C ? A12
+bit 400 X ? .
+bit 399 I ? A13
+bit 398 O ? A13 397 0 Z
+bit 397 C ? A13
+bit 396 X ? .
+bit 395 I ? A14
+bit 394 O ? A14 393 0 Z
+bit 393 C ? A14
+bit 392 X ? .
+bit 391 I ? A15
+bit 390 O ? A15 389 0 Z
+bit 389 C ? A15
+bit 388 X ? .
+bit 387 I ? C0
+bit 386 O ? C0 385 0 Z
+bit 385 C ? C0
+bit 384 X ? .
+bit 383 X ? .
+bit 382 X ? .
+bit 381 X ? .
+bit 380 X ? .
+bit 379 I ? C2
+bit 378 O ? C2 377 0 Z
+bit 377 C ? C2
+bit 376 X ? .
+bit 375 I ? C3
+bit 374 O ? C3 373 0 Z
+bit 373 C ? C3
+bit 372 X ? .
+bit 371 I ? C4
+bit 370 O ? C4 369 0 Z
+bit 369 C ? C4
+bit 368 X ? .
+bit 367 I ? C5
+bit 366 O ? C5 365 0 Z
+bit 365 C ? C5
+bit 364 X ? .
+bit 363 I ? C6
+bit 362 O ? C6 361 0 Z
+bit 361 C ? C6
+bit 360 X ? .
+bit 359 X ? .
+bit 358 X ? .
+bit 357 X ? .
+bit 356 I ? C10
+bit 355 O ? C10 354 0 Z
+bit 354 C ? C10
+bit 353 X ? .
+bit 352 I ? C11
+bit 351 O ? C11 350 0 Z
+bit 350 C ? C11
+bit 349 X ? .
+bit 348 I ? C12
+bit 347 O ? C12 346 0 Z
+bit 346 C ? C12
+bit 345 X ? .
+bit 344 I ? C13
+bit 343 O ? C13 342 0 Z
+bit 342 C ? C13
+bit 341 X ? .
+bit 340 I ? C14
+bit 339 O ? C14 338 0 Z
+bit 338 C ? C14
+bit 337 X ? .
+bit 336 I ? C15
+bit 335 O ? C15 334 0 Z
+bit 334 C ? C15
+bit 333 X ? .
+bit 332 I ? B0
+bit 331 O ? B0 330 0 Z
+bit 330 C ? B0
+bit 329 X ? .
+bit 328 I ? B1
+bit 327 O ? B1 326 0 Z
+bit 326 C ? B1
+bit 325 X ? .
+bit 324 I ? B2
+bit 323 O ? B2 322 0 Z
+bit 322 C ? B2
+bit 321 X ? .
+bit 320 I ? B3
+bit 319 O ? B3 318 0 Z
+bit 318 C ? B3
+bit 317 X ? .
+bit 316 I ? B4
+bit 315 O ? B4 314 0 Z
+bit 314 C ? B4
+bit 313 X ? .
+bit 312 I ? B5
+bit 311 O ? B5 310 0 Z
+bit 310 C ? B5
+bit 309 X ? .
+bit 308 I ? B6
+bit 307 O ? B6 306 0 Z
+bit 306 C ? B6
+bit 305 X ? .
+bit 304 X ? .
+bit 303 X ? .
+bit 302 X ? .
+bit 301 I ? B10
+bit 300 O ? B10 299 0 Z
+bit 299 C ? B10
+bit 298 X ? .
+bit 297 I ? B11
+bit 296 O ? B11 295 0 Z
+bit 295 C ? B11
+bit 294 X ? .
+bit 293 I ? B12
+bit 292 O ? B12 291 0 Z
+bit 291 C ? B12
+bit 290 X ? .
+bit 289 I ? B13
+bit 288 O ? B13 287 0 Z
+bit 287 C ? B13
+bit 286 X ? .
+bit 285 I ? B14
+bit 284 O ? B14 283 0 Z
+bit 283 C ? B14
+bit 282 X ? .
+bit 281 I ? B15
+bit 280 O ? B15 279 0 Z
+bit 279 C ? B15
+bit 278 X ? .
+bit 277 I ? D0
+bit 276 O ? D0 275 0 Z
+bit 275 C ? D0
+bit 274 X ? .
+bit 273 I ? D1
+bit 272 O ? D1 271 0 Z
+bit 271 C ? D1
+bit 270 X ? .
+bit 269 I ? D2
+bit 268 O ? D2 267 0 Z
+bit 267 C ? D2
+bit 266 X ? .
+bit 265 I ? D3
+bit 264 O ? D3 263 0 Z
+bit 263 C ? D3
+bit 262 X ? .
+bit 261 I ? D4
+bit 260 O ? D4 259 0 Z
+bit 259 C ? D4
+bit 258 X ? .
+bit 257 I ? D5
+bit 256 O ? D5 255 0 Z
+bit 255 C ? D5
+bit 254 X ? .
+bit 253 I ? D6
+bit 252 O ? D6 251 0 Z
+bit 251 C ? D6
+bit 250 X ? .
+bit 249 X ? .
+bit 248 X ? .
+bit 247 X ? .
+bit 246 I ? D10
+bit 245 O ? D10 244 0 Z
+bit 244 C ? D10
+bit 243 X ? .
+bit 242 I ? D11
+bit 241 O ? D11 240 0 Z
+bit 240 C ? D11
+bit 239 X ? .
+bit 238 I ? D12
+bit 237 O ? D12 236 0 Z
+bit 236 C ? D12
+bit 235 X ? .
+bit 234 I ? D13
+bit 233 O ? D13 232 0 Z
+bit 232 C ? D13
+bit 231 X ? .
+bit 230 I ? D14
+bit 229 O ? D14 228 0 Z
+bit 228 C ? D14
+bit 227 X ? .
+bit 226 I ? D15
+bit 225 O ? D15 224 0 Z
+bit 224 C ? D15
+bit 223 X ? .
+bit 222 I ? E0
+bit 221 O ? E0 220 0 Z
+bit 220 C ? E0
+bit 219 X ? .
+bit 218 I ? E1
+bit 217 O ? E1 216 0 Z
+bit 216 C ? E1
+bit 215 X ? .
+bit 214 I ? E2
+bit 213 O ? E2 212 0 Z
+bit 212 C ? E2
+bit 211 X ? .
+bit 210 I ? E3
+bit 209 O ? E3 208 0 Z
+bit 208 C ? E3
+bit 207 X ? .
+bit 206 I ? E4
+bit 205 O ? E4 204 0 Z
+bit 204 C ? E4
+bit 203 X ? .
+bit 202 I ? E5
+bit 201 O ? E5 200 0 Z
+bit 200 C ? E5
+bit 199 X ? .
+bit 198 I ? E6
+bit 197 O ? E6 196 0 Z
+bit 196 C ? E6
+bit 195 X ? .
+bit 194 X ? .
+bit 193 X ? .
+bit 192 X ? .
+bit 191 I ? E10
+bit 190 O ? E10 189 0 Z
+bit 189 C ? E10
+bit 188 X ? .
+bit 187 I ? E11
+bit 186 O ? E11 185 0 Z
+bit 185 C ? E11
+bit 184 X ? .
+bit 183 I ? E12
+bit 182 O ? E12 181 0 Z
+bit 181 C ? E12
+bit 180 X ? .
+bit 179 I ? E13
+bit 178 O ? E13 177 0 Z
+bit 177 C ? E13
+bit 176 X ? .
+bit 175 I ? E14
+bit 174 O ? E14 173 0 Z
+bit 173 C ? E14
+bit 172 X ? .
+bit 171 I ? E15
+bit 170 O ? E15 169 0 Z
+bit 169 C ? E15
+bit 168 X ? .
+bit 167 I ? G0
+bit 166 O ? G0 165 0 Z
+bit 165 C ? G0
+bit 164 X ? .
+bit 163 I ? G1
+bit 162 O ? G1 161 0 Z
+bit 161 C ? G1
+bit 160 X ? .
+bit 159 I ? G2
+bit 158 O ? G2 157 0 Z
+bit 157 C ? G2
+bit 156 X ? .
+bit 155 I ? G3
+bit 154 O ? G3 153 0 Z
+bit 153 C ? G3
+bit 152 X ? .
+bit 151 I ? G4
+bit 150 O ? G4 149 0 Z
+bit 149 C ? G4
+bit 148 X ? .
+bit 147 I ? G5
+bit 146 O ? G5 145 0 Z
+bit 145 C ? G5
+bit 144 X ? .
+bit 143 I ? G6
+bit 142 O ? G6 141 0 Z
+bit 141 C ? G6
+bit 140 X ? .
+bit 139 X ? .
+bit 138 X ? .
+bit 137 X ? .
+bit 136 I ? G10
+bit 135 O ? G10 134 0 Z
+bit 134 C ? G10
+bit 133 X ? .
+bit 132 I ? G11
+bit 131 O ? G11 130 0 Z
+bit 130 C ? G11
+bit 129 X ? .
+bit 128 I ? G12
+bit 127 O ? G12 126 0 Z
+bit 126 C ? G12
+bit 125 X ? .
+bit 124 I ? G13
+bit 123 O ? G13 122 0 Z
+bit 122 C ? G13
+bit 121 X ? .
+bit 120 I ? G14
+bit 119 O ? G14 118 0 Z
+bit 118 C ? G14
+bit 117 X ? .
+bit 116 I ? G15
+bit 115 O ? G15 114 0 Z
+bit 114 C ? G15
+bit 113 X ? .
+bit 112 I ? F0
+bit 111 O ? F0 110 0 Z
+bit 110 C ? F0
+bit 109 X ? .
+bit 108 X ? .
+bit 107 X ? .
+bit 106 X ? .
+bit 105 X ? .
+bit 104 I ? F2
+bit 103 O ? F2 102 0 Z
+bit 102 C ? F2
+bit 101 X ? .
+bit 100 I ? F3
+bit 99 O ? F3 98 0 Z
+bit 98 C ? F3
+bit 97 X ? .
+bit 96 I ? F4
+bit 95 O ? F4 94 0 Z
+bit 94 C ? F4
+bit 93 X ? .
+bit 92 I ? F5
+bit 91 O ? F5 90 0 Z
+bit 90 C ? F5
+bit 89 X ? .
+bit 88 I ? F6
+bit 87 O ? F6 86 0 Z
+bit 86 C ? F6
+bit 85 X ? .
+bit 84 X ? .
+bit 83 X ? .
+bit 82 X ? .
+bit 81 I ? F10
+bit 80 O ? F10 79 0 Z
+bit 79 C ? F10
+bit 78 X ? .
+bit 77 I ? F11
+bit 76 O ? F11 75 0 Z
+bit 75 C ? F11
+bit 74 X ? .
+bit 73 I ? F12
+bit 72 O ? F12 71 0 Z
+bit 71 C ? F12
+bit 70 X ? .
+bit 69 I ? F13
+bit 68 O ? F13 67 0 Z
+bit 67 C ? F13
+bit 66 X ? .
+bit 65 I ? F14
+bit 64 O ? F14 63 0 Z
+bit 63 C ? F14
+bit 62 X ? .
+bit 61 I ? F15
+bit 60 O ? F15 59 0 Z
+bit 59 C ? F15
+bit 58 X ? .
+bit 57 I ? H0
+bit 56 O ? H0 55 0 Z
+bit 55 C ? H0
+bit 54 X ? .
+bit 53 X ? .
+bit 52 X ? .
+bit 51 X ? .
+bit 50 X ? .
+bit 49 I ? H2
+bit 48 O ? H2 47 0 Z
+bit 47 C ? .
+bit 46 X ? .
+bit 45 I ? H3
+bit 44 O ? H3 43 0 Z
+bit 43 C ? H3
+bit 42 X ? .
+bit 41 I ? H4
+bit 40 O ? H4 39 0 Z
+bit 39 C ? H4
+bit 38 X ? .
+bit 37 I ? H5
+bit 36 O ? H5 35 0 Z
+bit 35 C ? H5
+bit 34 X ? .
+bit 33 I ? H6
+bit 32 O ? H6 31 0 Z
+bit 31 C ? H6
+bit 30 X ? .
+bit 29 X ? .
+bit 28 X ? .
+bit 27 X ? .
+bit 26 I ? H10
+bit 25 O ? H10 24 0 Z
+bit 24 C ? H10
+bit 23 X ? .
+bit 22 I ? H11
+bit 21 O ? H11 20 0 Z
+bit 20 C ? H11
+bit 19 X ? .
+bit 18 I ? H12
+bit 17 O ? H12 16 0 Z
+bit 16 C ? H12
+bit 15 X ? .
+bit 14 I ? H13
+bit 13 O ? H13 12 0 Z
+bit 12 C ? H13
+bit 11 X ? .
+bit 10 I ? H14
+bit 9 O ? H14 8 0 Z
+bit 8 C ? H14
+bit 7 X ? .
+bit 6 I ? H15
+bit 5 O ? H15 4 0 Z
+bit 4 C ? H15
+bit 3 I ? IN0_CLK0
+bit 2 I ? IN1_CLK1
+bit 1 I ? IN2_CLK2
+bit 0 I ? IN3_CLK3
--- /dev/null
+# JTAG declarations for XCR3128XL-VQ100
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Michael Lauer <mickeyl@handhelds.org>, 2004.
+# Based on the definition for XCR3128XL-CS144
+#
+# Additional Documentation:
+# [1] Xilinx Inc., "CoolRunner XPLA3 CPLD Advance Product Specification",
+# DS012 (v1.5) January 7, 2002
+# [2] Xilinx Inc., "BSDL file for device xcr3128xl, package vq100
+# Revision 1.3", 2002-01-03
+# [3] Xilinx Inc., "XCR3128XL 128 Macrocell CPLD Preliminary Product
+# Specification", DS016 (v1.8) January 8, 2002
+#
+
+# 8 function blocks (A to H) by 16 macrocells (0 to 15)
+# see Table 3 in [3] and Table 4 in [3]
+signal A2 72
+signal A3 71
+signal A4 70
+signal A5 69
+signal A6 68
+signal A10 67
+signal A12 65
+signal A13 64
+signal A14 63
+signal B0 75
+signal B1 76
+signal B2 77
+signal B3 78
+signal B4 79
+signal B5 80
+signal B6 81
+signal B10 83
+signal B11 84
+signal B12 85
+signal C2 61
+signal C3 60
+signal C5 58
+signal C6 57
+signal C10 56
+signal C11 55
+signal C12 54
+signal C13 53
+signal C14 52
+signal D1 40
+signal D2 41
+signal D3 42
+signal D4 44
+signal D5 45
+signal D6 46
+signal D10 47
+signal D11 48
+signal D12 49
+signal D13 50
+signal E0 2
+signal E1 1
+signal E2 100
+signal E3 99
+signal E4 98
+signal E5 97
+signal E6 96
+signal TCK 62
+signal TDI 4
+signal TDO 73
+signal TMS 15
+signal IN0_CLK0 90
+signal IN1_CLK1 89
+signal IN2_CLK2 88
+signal IN3_CLK3 87
+signal PORT_EN 11
+signal Vcc 3 18 34 39 51 66 82 91
+signal GND 26 38 43 59 74 86 95
+
+# mandatory data registers
+register BSR 444 # see [2]
+register BR 1
+# optional data registers
+register DIR 32
+# user-defined registers
+register ISPSR 274 # ISP (In-System Programming) Shift Register, see [2]
+
+# instructions - see [2]
+instruction length 5
+# mandatory instructions - see Table 3 in [1]
+instruction EXTEST 00000 BSR
+instruction SAMPLE/PRELOAD 00010 BSR
+instruction BYPASS 11111 BR
+# optional instructions - see Table 3 in [1]
+instruction IDCODE 00001 DIR
+instruction HIGHZ 00101 BR
+instruction INTEST 00011 BSR
+# user-defined instructions - see Table 5 in [1]
+instruction ENABLE 01001 ISPSR
+instruction ERASE 01010 ISPSR
+instruction PROGRAM 01011 ISPSR
+instruction DISABLE 10000 ISPSR
+instruction VERIFY 01100 ISPSR
+
+bit 443 O 1 *
+bit 442 O 1 *
+bit 441 O 1 *
+bit 440 O 1 *
+bit 439 O 1 *
+bit 438 O 1 *
+bit 437 O 1 *
+bit 436 O 1 *
+bit 435 O 1 *
+bit 434 I 1 A2
+bit 433 O 1 A2 432 0 Z
+bit 432 C 1 *
+bit 431 O 1 *
+bit 430 I 1 A3
+bit 429 O 1 A3 428 0 Z
+bit 428 C 1 *
+bit 427 O 1 *
+bit 426 I 1 A4
+bit 425 O 1 A4 424 0 Z
+bit 424 C 1 *
+bit 423 O 1 *
+bit 422 I 1 A5
+bit 421 O 1 A5 420 0 Z
+bit 420 C 1 *
+bit 419 O 1 *
+bit 418 I 1 A6
+bit 417 O 1 A6 416 0 Z
+bit 416 C 1 *
+bit 415 O 1 *
+bit 414 O 1 *
+bit 413 O 1 *
+bit 412 O 1 *
+bit 411 I 1 A10
+bit 410 O 1 A10 409 0 Z
+bit 409 C 1 *
+bit 408 O 1 *
+bit 407 O 1 *
+bit 406 O 1 *
+bit 405 O 1 *
+bit 404 O 1 *
+bit 403 I 1 A12
+bit 402 O 1 A12 401 0 Z
+bit 401 C 1 *
+bit 400 O 1 *
+bit 399 I 1 A13
+bit 398 O 1 A13 397 0 Z
+bit 397 C 1 *
+bit 396 O 1 *
+bit 395 I 1 A14
+bit 394 O 1 A14 393 0 Z
+bit 393 C 1 *
+bit 392 O 1 *
+bit 391 O 1 *
+bit 390 O 1 *
+bit 389 O 1 *
+bit 388 O 1 *
+bit 387 O 1 *
+bit 386 O 1 *
+bit 385 O 1 *
+bit 384 O 1 *
+bit 383 O 1 *
+bit 382 O 1 *
+bit 381 O 1 *
+bit 380 O 1 *
+bit 379 I 1 C2
+bit 378 O 1 C2 377 0 Z
+bit 377 C 1 *
+bit 376 O 1 *
+bit 375 I 1 C3
+bit 374 O 1 C3 373 0 Z
+bit 373 C 1 *
+bit 372 O 1 *
+bit 371 O 1 *
+bit 370 O 1 *
+bit 369 O 1 *
+bit 368 O 1 *
+bit 367 I 1 C5
+bit 366 O 1 C5 365 0 Z
+bit 365 C 1 *
+bit 364 O 1 *
+bit 363 I 1 C6
+bit 362 O 1 C6 361 0 Z
+bit 361 C 1 *
+bit 360 O 1 *
+bit 359 O 1 *
+bit 358 O 1 *
+bit 357 O 1 *
+bit 356 I 1 C10
+bit 355 O 1 C10 354 0 Z
+bit 354 C 1 *
+bit 353 O 1 *
+bit 352 I 1 C11
+bit 351 O 1 C11 350 0 Z
+bit 350 C 1 *
+bit 349 O 1 *
+bit 348 I 1 C12
+bit 347 O 1 C12 346 0 Z
+bit 346 C 1 *
+bit 345 O 1 *
+bit 344 I 1 C13
+bit 343 O 1 C13 342 0 Z
+bit 342 C 1 *
+bit 341 O 1 *
+bit 340 I 1 C14
+bit 339 O 1 C14 338 0 Z
+bit 338 C 1 *
+bit 337 O 1 *
+bit 336 O 1 *
+bit 335 O 1 *
+bit 334 O 1 *
+bit 333 O 1 *
+bit 332 I 1 B0
+bit 331 O 1 B0 330 0 Z
+bit 330 C 1 *
+bit 329 O 1 *
+bit 328 I 1 B1
+bit 327 O 1 B1 326 0 Z
+bit 326 C 1 *
+bit 325 O 1 *
+bit 324 I 1 B2
+bit 323 O 1 B2 322 0 Z
+bit 322 C 1 *
+bit 321 O 1 *
+bit 320 I 1 B3
+bit 319 O 1 B3 318 0 Z
+bit 318 C 1 *
+bit 317 O 1 *
+bit 316 I 1 B4
+bit 315 O 1 B4 314 0 Z
+bit 314 C 1 *
+bit 313 O 1 *
+bit 312 I 1 B5
+bit 311 O 1 B5 310 0 Z
+bit 310 C 1 *
+bit 309 O 1 *
+bit 308 I 1 B6
+bit 307 O 1 B6 306 0 Z
+bit 306 C 1 *
+bit 305 O 1 *
+bit 304 O 1 *
+bit 303 O 1 *
+bit 302 O 1 *
+bit 301 I 1 B10
+bit 300 O 1 B10 299 0 Z
+bit 299 C 1 *
+bit 298 O 1 *
+bit 297 I 1 B11
+bit 296 O 1 B11 295 0 Z
+bit 295 C 1 *
+bit 294 O 1 *
+bit 293 I 1 B12
+bit 292 O 1 B12 291 0 Z
+bit 291 C 1 *
+bit 290 O 1 *
+bit 289 O 1 *
+bit 288 O 1 *
+bit 287 O 1 *
+bit 286 O 1 *
+bit 285 O 1 *
+bit 284 O 1 *
+bit 283 O 1 *
+bit 282 O 1 *
+bit 281 O 1 *
+bit 280 O 1 *
+bit 279 O 1 *
+bit 278 O 1 *
+bit 277 O 1 *
+bit 276 O 1 *
+bit 275 O 1 *
+bit 274 O 1 *
+bit 273 I 1 D1
+bit 272 O 1 D1 271 0 Z
+bit 271 C 1 *
+bit 270 O 1 *
+bit 269 I 1 D2
+bit 268 O 1 D2 267 0 Z
+bit 267 C 1 *
+bit 266 O 1 *
+bit 265 I 1 D3
+bit 264 O 1 D3 263 0 Z
+bit 263 C 1 *
+bit 262 O 1 *
+bit 261 I 1 D4
+bit 260 O 1 D4 259 0 Z
+bit 259 C 1 *
+bit 258 O 1 *
+bit 257 I 1 D5
+bit 256 O 1 D5 255 0 Z
+bit 255 C 1 *
+bit 254 O 1 *
+bit 253 I 1 D6
+bit 252 O 1 D6 251 0 Z
+bit 251 C 1 *
+bit 250 O 1 *
+bit 249 O 1 *
+bit 248 O 1 *
+bit 247 O 1 *
+bit 246 I 1 D10
+bit 245 O 1 D10 244 0 Z
+bit 244 C 1 *
+bit 243 O 1 *
+bit 242 I 1 D11
+bit 241 O 1 D11 240 0 Z
+bit 240 C 1 *
+bit 239 O 1 *
+bit 238 I 1 D12
+bit 237 O 1 D12 236 0 Z
+bit 236 C 1 *
+bit 235 O 1 *
+bit 234 I 1 D13
+bit 233 O 1 D13 232 0 Z
+bit 232 C 1 *
+bit 231 O 1 *
+bit 230 O 1 *
+bit 229 O 1 *
+bit 228 O 1 *
+bit 227 O 1 *
+bit 226 O 1 *
+bit 225 O 1 *
+bit 224 O 1 *
+bit 223 O 1 *
+bit 222 I 1 E0
+bit 221 O 1 E0 220 0 Z
+bit 220 C 1 *
+bit 219 O 1 *
+bit 218 I 1 E1
+bit 217 O 1 E1 216 0 Z
+bit 216 C 1 *
+bit 215 O 1 *
+bit 214 I 1 E2
+bit 213 O 1 E2 212 0 Z
+bit 212 C 1 *
+bit 211 O 1 *
+bit 210 I 1 E3
+bit 209 O 1 E3 208 0 Z
+bit 208 C 1 *
+bit 207 O 1 *
+bit 206 I 1 E4
+bit 205 O 1 E4 204 0 Z
+bit 204 C 1 *
+bit 203 O 1 *
+bit 202 I 1 E5
+bit 201 O 1 E5 200 0 Z
+bit 200 C 1 *
+bit 199 O 1 *
+bit 198 I 1 E6
+bit 197 O 1 E6 196 0 Z
+bit 196 C 1 *
+bit 195 O 1 *
+bit 194 O 1 *
+bit 193 O 1 *
+bit 192 O 1 *
+bit 191 O 1 *
+bit 190 O 1 *
+bit 189 O 1 *
+bit 188 O 1 *
+bit 187 O 1 *
+bit 186 O 1 *
+bit 185 O 1 *
+bit 184 O 1 *
+bit 183 I 1 E12
+bit 182 O 1 E12 181 0 Z
+bit 181 C 1 *
+bit 180 O 1 *
+bit 179 I 1 E13
+bit 178 O 1 E13 177 0 Z
+bit 177 C 1 *
+bit 176 O 1 *
+bit 175 I 1 E14
+bit 174 O 1 E14 173 0 Z
+bit 173 C 1 *
+bit 172 O 1 *
+bit 171 O 1 *
+bit 170 O 1 *
+bit 169 O 1 *
+bit 168 O 1 *
+bit 167 O 1 *
+bit 166 O 1 *
+bit 165 O 1 *
+bit 164 O 1 *
+bit 163 I 1 G1
+bit 162 O 1 G1 161 0 Z
+bit 161 C 1 *
+bit 160 O 1 *
+bit 159 I 1 G2
+bit 158 O 1 G2 157 0 Z
+bit 157 C 1 *
+bit 156 O 1 *
+bit 155 I 1 G3
+bit 154 O 1 G3 153 0 Z
+bit 153 C 1 *
+bit 152 O 1 *
+bit 151 I 1 G4
+bit 150 O 1 G4 149 0 Z
+bit 149 C 1 *
+bit 148 O 1 *
+bit 147 I 1 G5
+bit 146 O 1 G5 145 0 Z
+bit 145 C 1 *
+bit 144 O 1 *
+bit 143 I 1 G6
+bit 142 O 1 G6 141 0 Z
+bit 141 C 1 *
+bit 140 O 1 *
+bit 139 O 1 *
+bit 138 O 1 *
+bit 137 O 1 *
+bit 136 I 1 G10
+bit 135 O 1 G10 134 0 Z
+bit 134 C 1 *
+bit 133 O 1 *
+bit 132 I 1 G11
+bit 131 O 1 G11 130 0 Z
+bit 130 C 1 *
+bit 129 O 1 *
+bit 128 I 1 G12
+bit 127 O 1 G12 126 0 Z
+bit 126 C 1 *
+bit 125 O 1 *
+bit 124 I 1 G13
+bit 123 O 1 G13 122 0 Z
+bit 122 C 1 *
+bit 121 O 1 *
+bit 120 O 1 *
+bit 119 O 1 *
+bit 118 O 1 *
+bit 117 O 1 *
+bit 116 O 1 *
+bit 115 O 1 *
+bit 114 O 1 *
+bit 113 O 1 *
+bit 112 O 1 *
+bit 111 O 1 *
+bit 110 O 1 *
+bit 109 O 1 *
+bit 108 O 1 *
+bit 107 O 1 *
+bit 106 O 1 *
+bit 105 O 1 *
+bit 104 I 1 F2
+bit 103 O 1 F2 102 0 Z
+bit 102 C 1 *
+bit 101 O 1 *
+bit 100 I 1 F3
+bit 99 O 1 F3 98 0 Z
+bit 98 C 1 *
+bit 97 O 1 *
+bit 96 I 1 F4
+bit 95 O 1 F4 94 0 Z
+bit 94 C 1 *
+bit 93 O 1 *
+bit 92 I 1 F5
+bit 91 O 1 F5 90 0 Z
+bit 90 C 1 *
+bit 89 O 1 *
+bit 88 I 1 F6
+bit 87 O 1 F6 86 0 Z
+bit 86 C 1 *
+bit 85 O 1 *
+bit 84 O 1 *
+bit 83 O 1 *
+bit 82 O 1 *
+bit 81 I 1 F10
+bit 80 O 1 F10 79 0 Z
+bit 79 C 1 *
+bit 78 O 1 *
+bit 77 O 1 *
+bit 76 O 1 *
+bit 75 O 1 *
+bit 74 O 1 *
+bit 73 O 1 *
+bit 72 O 1 *
+bit 71 O 1 *
+bit 70 O 1 *
+bit 69 I 1 F13
+bit 68 O 1 F13 67 0 Z
+bit 67 C 1 *
+bit 66 O 1 *
+bit 65 I 1 F14
+bit 64 O 1 F14 63 0 Z
+bit 63 C 1 *
+bit 62 O 1 *
+bit 61 I 1 F15
+bit 60 O 1 F15 59 0 Z
+bit 59 C 1 *
+bit 58 O 1 *
+bit 57 O 1 *
+bit 56 O 1 *
+bit 55 O 1 *
+bit 54 O 1 *
+bit 53 O 1 *
+bit 52 O 1 *
+bit 51 O 1 *
+bit 50 O 1 *
+bit 49 I 1 H2
+bit 48 O 1 H2 47 0 Z
+bit 47 C 1 *
+bit 46 O 1 *
+bit 45 I 1 H3
+bit 44 O 1 H3 43 0 Z
+bit 43 C 1 *
+bit 42 O 1 *
+bit 41 O 1 *
+bit 40 O 1 *
+bit 39 O 1 *
+bit 38 O 1 *
+bit 37 I 1 H5
+bit 36 O 1 H5 35 0 Z
+bit 35 C 1 *
+bit 34 O 1 *
+bit 33 I 1 H6
+bit 32 O 1 H6 31 0 Z
+bit 31 C 1 *
+bit 30 O 1 *
+bit 29 O 1 *
+bit 28 O 1 *
+bit 27 O 1 *
+bit 26 I 1 H10
+bit 25 O 1 H10 24 0 Z
+bit 24 C 1 *
+bit 23 O 1 *
+bit 22 I 1 H11
+bit 21 O 1 H11 20 0 Z
+bit 20 C 1 *
+bit 19 O 1 *
+bit 18 I 1 H12
+bit 17 O 1 H12 16 0 Z
+bit 16 C 1 *
+bit 15 O 1 *
+bit 14 I 1 H13
+bit 13 O 1 H13 12 0 Z
+bit 12 C 1 *
+bit 11 O 1 *
+bit 10 I 1 H14
+bit 9 O 1 H14 8 0 Z
+bit 8 C 1 *
+bit 7 O 1 *
+bit 6 O 1 *
+bit 5 O 1 *
+bit 4 O 1 *
+bit 3 I 1 IN0_CLK0
+bit 2 I 1 IN1_CLK1
+bit 1 I 1 IN2_CLK2
+bit 0 I 1 IN3_CLK3
--- /dev/null
+#
+# $Id$
+#
+# Copyright (C) 2003 Jachym Holecek <freza@psi.cz>
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+
+# bits 31-28 of the Device Identification Register
+0000 xcr3256xl-ft256 0
--- /dev/null
+#
+# $Id$
+#
+# Copyright (C) 2003 Jachym Holecek <freza@psi.cz>
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+
+signal tdi
+signal tck
+signal tms
+signal tdo
+signal CLK0
+signal CLK1
+signal CLK2
+signal CLK3
+signal IO_0
+signal IO_1
+signal IO_2
+signal IO_3
+signal IO_4
+signal IO_5
+signal IO_6
+signal IO_7
+signal IO_8
+signal IO_9
+signal IO_10
+signal IO_11
+signal IO_12
+signal IO_13
+signal IO_14
+signal IO_15
+signal IO_16
+signal IO_17
+signal IO_18
+signal IO_19
+signal IO_20
+signal IO_21
+signal IO_22
+signal IO_23
+signal IO_24
+signal IO_25
+signal IO_26
+signal IO_27
+signal IO_28
+signal IO_29
+signal IO_30
+signal IO_31
+signal IO_32
+signal IO_33
+signal IO_34
+signal IO_35
+signal IO_36
+signal IO_38
+signal IO_39
+signal IO_40
+signal IO_41
+signal IO_43
+signal IO_44
+signal IO_45
+signal IO_46
+signal IO_47
+signal IO_48
+signal IO_49
+signal IO_50
+signal IO_51
+signal IO_52
+signal IO_53
+signal IO_54
+signal IO_55
+signal IO_56
+signal IO_57
+signal IO_58
+signal IO_59
+signal IO_60
+signal IO_61
+signal IO_62
+signal IO_63
+signal IO_64
+signal IO_65
+signal IO_66
+signal IO_67
+signal IO_68
+signal IO_69
+signal IO_70
+signal IO_71
+signal IO_72
+signal IO_73
+signal IO_74
+signal IO_75
+signal IO_76
+signal IO_77
+signal IO_78
+signal IO_79
+signal IO_80
+signal IO_81
+signal IO_82
+signal IO_83
+signal IO_84
+signal IO_85
+signal IO_86
+signal IO_87
+signal IO_88
+signal IO_89
+signal IO_90
+signal IO_91
+signal IO_92
+signal IO_93
+signal IO_94
+signal IO_95
+signal IO_96
+signal IO_97
+signal IO_98
+signal IO_99
+signal IO_100
+signal IO_101
+signal IO_102
+signal IO_103
+signal IO_104
+signal IO_105
+signal IO_106
+signal IO_108
+signal IO_109
+signal IO_110
+signal IO_111
+signal IO_112
+signal IO_113
+signal IO_114
+signal IO_115
+signal IO_116
+signal IO_117
+signal IO_118
+signal IO_119
+signal IO_120
+signal IO_121
+signal IO_122
+signal IO_123
+signal IO_124
+signal IO_125
+signal IO_126
+signal IO_127
+signal IO_128
+signal IO_129
+signal IO_130
+signal IO_131
+signal IO_133
+signal IO_134
+signal IO_135
+signal IO_136
+signal IO_137
+signal IO_138
+signal IO_139
+signal IO_140
+signal IO_141
+signal IO_142
+signal IO_143
+signal IO_144
+signal IO_145
+signal IO_146
+signal IO_147
+signal IO_148
+signal IO_149
+signal IO_150
+signal IO_151
+signal IO_152
+signal IO_153
+signal IO_154
+signal IO_155
+signal IO_156
+signal IO_157
+signal IO_158
+
+# Boundary Scan (mandatory regs)
+register BSR 740 # Boundary Scan Register
+register BR 1 # Bypass Register
+
+# Optional data reg
+register DIR 32 # ID Code Register
+
+# In-System Programming (user defined regs)
+register ISPSR 313 # ISP Shift Register
+
+instruction length 5
+
+# Mandatory cmds
+instruction BYPASS 11111 BR
+instruction SAMPLE/PRELOAD 00010 BSR
+instruction EXTEST 00000 BSR
+
+# Optional cmds
+instruction IDCODE 00001 DIR
+instruction INTEST 00011 BSR
+instruction HIGHZ 00101 BR
+
+# Mysterious cmds
+#instruction STRTEST 00100
+#instruction CLAMP 00110 BR
+
+# User defined regs
+instruction ENABLE 01001 ISPSR
+instruction ERASE 01010 ISPSR
+instruction PROGRAM 01011 ISPSR
+instruction DISABLE 10000 ISPSR
+instruction VERIFY 01100 ISPSR
+
+# Another mysterious cmds
+#instruction ISP_EOTF 01000 ISPSR
+#instruction ISP_INIT 01101 BR
+#instruction ISP_WRITE 00111 ISPSR
+#instruction ISP_READ 01110 ISPSR
+#instruction TEST_MODE 10001 BR
+
+bit 739 O 1 *
+bit 738 I 1 IO_0
+bit 737 O 1 IO_0 736 0 Z
+bit 736 C 1 *
+bit 735 O 1 *
+bit 734 I 1 IO_1
+bit 733 O 1 IO_1 732 0 Z
+bit 732 C 1 *
+bit 731 O 1 *
+bit 730 I 1 IO_2
+bit 729 O 1 IO_2 728 0 Z
+bit 728 C 1 *
+bit 727 O 1 *
+bit 726 I 1 IO_3
+bit 725 O 1 IO_3 724 0 Z
+bit 724 C 1 *
+bit 723 O 1 *
+bit 722 I 1 IO_4
+bit 721 O 1 IO_4 720 0 Z
+bit 720 C 1 *
+bit 719 O 1 *
+bit 718 O 1 *
+bit 717 O 1 *
+bit 716 O 1 *
+bit 715 O 1 *
+bit 714 O 1 *
+bit 713 O 1 *
+bit 712 I 1 IO_5
+bit 711 O 1 IO_5 710 0 Z
+bit 710 C 1 *
+bit 709 O 1 *
+bit 708 I 1 IO_6
+bit 707 O 1 IO_6 706 0 Z
+bit 706 C 1 *
+bit 705 O 1 *
+bit 704 I 1 IO_7
+bit 703 O 1 IO_7 702 0 Z
+bit 702 C 1 *
+bit 701 O 1 *
+bit 700 I 1 IO_8
+bit 699 O 1 IO_8 698 0 Z
+bit 698 C 1 *
+bit 697 O 1 *
+bit 696 I 1 IO_9
+bit 695 O 1 IO_9 694 0 Z
+bit 694 C 1 *
+bit 693 O 1 *
+bit 692 I 1 IO_10
+bit 691 O 1 IO_10 690 0 Z
+bit 690 C 1 *
+bit 689 O 1 *
+bit 688 I 1 IO_11
+bit 687 O 1 IO_11 686 0 Z
+bit 686 C 1 *
+bit 685 O 1 *
+bit 684 I 1 IO_12
+bit 683 O 1 IO_12 682 0 Z
+bit 682 C 1 *
+bit 681 O 1 *
+bit 680 I 1 IO_13
+bit 679 O 1 IO_13 678 0 Z
+bit 678 C 1 *
+bit 677 O 1 *
+bit 676 I 1 IO_14
+bit 675 O 1 IO_14 674 0 Z
+bit 674 C 1 *
+bit 673 O 1 *
+bit 672 O 1 *
+bit 671 O 1 *
+bit 670 O 1 *
+bit 669 O 1 *
+bit 668 O 1 *
+bit 667 O 1 *
+bit 666 I 1 IO_15
+bit 665 O 1 IO_15 664 0 Z
+bit 664 C 1 *
+bit 663 O 1 *
+bit 662 I 1 IO_16
+bit 661 O 1 IO_16 660 0 Z
+bit 660 C 1 *
+bit 659 O 1 *
+bit 658 I 1 IO_17
+bit 657 O 1 IO_17 656 0 Z
+bit 656 C 1 *
+bit 655 O 1 *
+bit 654 I 1 IO_18
+bit 653 O 1 IO_18 652 0 Z
+bit 652 C 1 *
+bit 651 O 1 *
+bit 650 I 1 IO_19
+bit 649 O 1 IO_19 648 0 Z
+bit 648 C 1 *
+bit 647 O 1 *
+bit 646 I 1 IO_20
+bit 645 O 1 IO_20 644 0 Z
+bit 644 C 1 *
+bit 643 O 1 *
+bit 642 I 1 IO_21
+bit 641 O 1 IO_21 640 0 Z
+bit 640 C 1 *
+bit 639 O 1 *
+bit 638 I 1 IO_22
+bit 637 O 1 IO_22 636 0 Z
+bit 636 C 1 *
+bit 635 O 1 *
+bit 634 I 1 IO_23
+bit 633 O 1 IO_23 632 0 Z
+bit 632 C 1 *
+bit 631 O 1 *
+bit 630 I 1 IO_24
+bit 629 O 1 IO_24 628 0 Z
+bit 628 C 1 *
+bit 627 O 1 *
+bit 626 O 1 *
+bit 625 O 1 *
+bit 624 O 1 *
+bit 623 O 1 *
+bit 622 O 1 *
+bit 621 O 1 *
+bit 620 I 1 IO_25
+bit 619 O 1 IO_25 618 0 Z
+bit 618 C 1 *
+bit 617 O 1 *
+bit 616 I 1 IO_26
+bit 615 O 1 IO_26 614 0 Z
+bit 614 C 1 *
+bit 613 O 1 *
+bit 612 I 1 IO_27
+bit 611 O 1 IO_27 610 0 Z
+bit 610 C 1 *
+bit 609 O 1 *
+bit 608 I 1 IO_28
+bit 607 O 1 IO_28 606 0 Z
+bit 606 C 1 *
+bit 605 O 1 *
+bit 604 I 1 IO_29
+bit 603 O 1 IO_29 602 0 Z
+bit 602 C 1 *
+bit 601 O 1 *
+bit 600 I 1 IO_30
+bit 599 O 1 IO_30 598 0 Z
+bit 598 C 1 *
+bit 597 O 1 *
+bit 596 I 1 IO_31
+bit 595 O 1 IO_31 594 0 Z
+bit 594 C 1 *
+bit 593 O 1 *
+bit 592 I 1 IO_32
+bit 591 O 1 IO_32 590 0 Z
+bit 590 C 1 *
+bit 589 O 1 *
+bit 588 I 1 IO_33
+bit 587 O 1 IO_33 586 0 Z
+bit 586 C 1 *
+bit 585 O 1 *
+bit 584 I 1 IO_34
+bit 583 O 1 IO_34 582 0 Z
+bit 582 C 1 *
+bit 581 O 1 *
+bit 580 O 1 *
+bit 579 O 1 *
+bit 578 O 1 *
+bit 577 O 1 *
+bit 576 O 1 *
+bit 575 O 1 *
+bit 574 I 1 IO_35
+bit 573 O 1 IO_35 572 0 Z
+bit 572 C 1 *
+bit 571 O 1 *
+bit 570 I 1 IO_36
+bit 569 O 1 IO_36 568 0 Z
+bit 568 C 1 *
+bit 567 O 1 *
+bit 566 O 1 *
+bit 565 O 1 *
+bit 564 O 1 *
+bit 563 O 1 *
+bit 562 I 1 IO_38
+bit 561 O 1 IO_38 560 0 Z
+bit 560 C 1 *
+bit 559 O 1 *
+bit 558 I 1 IO_39
+bit 557 O 1 IO_39 556 0 Z
+bit 556 C 1 *
+bit 555 O 1 *
+bit 554 I 1 IO_40
+bit 553 O 1 IO_40 552 0 Z
+bit 552 C 1 *
+bit 551 O 1 *
+bit 550 I 1 IO_41
+bit 549 O 1 IO_41 548 0 Z
+bit 548 C 1 *
+bit 547 O 1 *
+bit 546 O 1 *
+bit 545 O 1 *
+bit 544 O 1 *
+bit 543 O 1 *
+bit 542 I 1 IO_43
+bit 541 O 1 IO_43 540 0 Z
+bit 540 C 1 *
+bit 539 O 1 *
+bit 538 I 1 IO_44
+bit 537 O 1 IO_44 536 0 Z
+bit 536 C 1 *
+bit 535 O 1 *
+bit 534 O 1 *
+bit 533 O 1 *
+bit 532 O 1 *
+bit 531 O 1 *
+bit 530 O 1 *
+bit 529 O 1 *
+bit 528 I 1 IO_45
+bit 527 O 1 IO_45 526 0 Z
+bit 526 C 1 *
+bit 525 O 1 *
+bit 524 I 1 IO_46
+bit 523 O 1 IO_46 522 0 Z
+bit 522 C 1 *
+bit 521 O 1 *
+bit 520 I 1 IO_47
+bit 519 O 1 IO_47 518 0 Z
+bit 518 C 1 *
+bit 517 O 1 *
+bit 516 I 1 IO_48
+bit 515 O 1 IO_48 514 0 Z
+bit 514 C 1 *
+bit 513 O 1 *
+bit 512 I 1 IO_49
+bit 511 O 1 IO_49 510 0 Z
+bit 510 C 1 *
+bit 509 O 1 *
+bit 508 I 1 IO_50
+bit 507 O 1 IO_50 506 0 Z
+bit 506 C 1 *
+bit 505 O 1 *
+bit 504 I 1 IO_51
+bit 503 O 1 IO_51 502 0 Z
+bit 502 C 1 *
+bit 501 O 1 *
+bit 500 I 1 IO_52
+bit 499 O 1 IO_52 498 0 Z
+bit 498 C 1 *
+bit 497 O 1 *
+bit 496 I 1 IO_53
+bit 495 O 1 IO_53 494 0 Z
+bit 494 C 1 *
+bit 493 O 1 *
+bit 492 I 1 IO_54
+bit 491 O 1 IO_54 490 0 Z
+bit 490 C 1 *
+bit 489 O 1 *
+bit 488 O 1 *
+bit 487 O 1 *
+bit 486 O 1 *
+bit 485 O 1 *
+bit 484 O 1 *
+bit 483 O 1 *
+bit 482 I 1 IO_55
+bit 481 O 1 IO_55 480 0 Z
+bit 480 C 1 *
+bit 479 O 1 *
+bit 478 I 1 IO_56
+bit 477 O 1 IO_56 476 0 Z
+bit 476 C 1 *
+bit 475 O 1 *
+bit 474 I 1 IO_57
+bit 473 O 1 IO_57 472 0 Z
+bit 472 C 1 *
+bit 471 O 1 *
+bit 470 I 1 IO_58
+bit 469 O 1 IO_58 468 0 Z
+bit 468 C 1 *
+bit 467 O 1 *
+bit 466 I 1 IO_59
+bit 465 O 1 IO_59 464 0 Z
+bit 464 C 1 *
+bit 463 O 1 *
+bit 462 I 1 IO_60
+bit 461 O 1 IO_60 460 0 Z
+bit 460 C 1 *
+bit 459 O 1 *
+bit 458 I 1 IO_61
+bit 457 O 1 IO_61 456 0 Z
+bit 456 C 1 *
+bit 455 O 1 *
+bit 454 I 1 IO_62
+bit 453 O 1 IO_62 452 0 Z
+bit 452 C 1 *
+bit 451 O 1 *
+bit 450 I 1 IO_63
+bit 449 O 1 IO_63 448 0 Z
+bit 448 C 1 *
+bit 447 O 1 *
+bit 446 I 1 IO_64
+bit 445 O 1 IO_64 444 0 Z
+bit 444 C 1 *
+bit 443 O 1 *
+bit 442 O 1 *
+bit 441 O 1 *
+bit 440 O 1 *
+bit 439 O 1 *
+bit 438 O 1 *
+bit 437 O 1 *
+bit 436 I 1 IO_65
+bit 435 O 1 IO_65 434 0 Z
+bit 434 C 1 *
+bit 433 O 1 *
+bit 432 I 1 IO_66
+bit 431 O 1 IO_66 430 0 Z
+bit 430 C 1 *
+bit 429 O 1 *
+bit 428 I 1 IO_67
+bit 427 O 1 IO_67 426 0 Z
+bit 426 C 1 *
+bit 425 O 1 *
+bit 424 I 1 IO_68
+bit 423 O 1 IO_68 422 0 Z
+bit 422 C 1 *
+bit 421 O 1 *
+bit 420 I 1 IO_69
+bit 419 O 1 IO_69 418 0 Z
+bit 418 C 1 *
+bit 417 O 1 *
+bit 416 I 1 IO_70
+bit 415 O 1 IO_70 414 0 Z
+bit 414 C 1 *
+bit 413 O 1 *
+bit 412 I 1 IO_71
+bit 411 O 1 IO_71 410 0 Z
+bit 410 C 1 *
+bit 409 O 1 *
+bit 408 I 1 IO_72
+bit 407 O 1 IO_72 406 0 Z
+bit 406 C 1 *
+bit 405 O 1 *
+bit 404 I 1 IO_73
+bit 403 O 1 IO_73 402 0 Z
+bit 402 C 1 *
+bit 401 O 1 *
+bit 400 I 1 IO_74
+bit 399 O 1 IO_74 398 0 Z
+bit 398 C 1 *
+bit 397 O 1 *
+bit 396 O 1 *
+bit 395 O 1 *
+bit 394 O 1 *
+bit 393 O 1 *
+bit 392 O 1 *
+bit 391 O 1 *
+bit 390 I 1 IO_75
+bit 389 O 1 IO_75 388 0 Z
+bit 388 C 1 *
+bit 387 O 1 *
+bit 386 I 1 IO_76
+bit 385 O 1 IO_76 384 0 Z
+bit 384 C 1 *
+bit 383 O 1 *
+bit 382 I 1 IO_77
+bit 381 O 1 IO_77 380 0 Z
+bit 380 C 1 *
+bit 379 O 1 *
+bit 378 I 1 IO_78
+bit 377 O 1 IO_78 376 0 Z
+bit 376 C 1 *
+bit 375 O 1 *
+bit 374 I 1 IO_79
+bit 373 O 1 IO_79 372 0 Z
+bit 372 C 1 *
+bit 371 O 1 *
+bit 370 I 1 IO_80
+bit 369 O 1 IO_80 368 0 Z
+bit 368 C 1 *
+bit 367 O 1 *
+bit 366 I 1 IO_81
+bit 365 O 1 IO_81 364 0 Z
+bit 364 C 1 *
+bit 363 O 1 *
+bit 362 I 1 IO_82
+bit 361 O 1 IO_82 360 0 Z
+bit 360 C 1 *
+bit 359 O 1 *
+bit 358 I 1 IO_83
+bit 357 O 1 IO_83 356 0 Z
+bit 356 C 1 *
+bit 355 O 1 *
+bit 354 I 1 IO_84
+bit 353 O 1 IO_84 352 0 Z
+bit 352 C 1 *
+bit 351 O 1 *
+bit 350 O 1 *
+bit 349 O 1 *
+bit 348 O 1 *
+bit 347 O 1 *
+bit 346 O 1 *
+bit 345 O 1 *
+bit 344 I 1 IO_85
+bit 343 O 1 IO_85 342 0 Z
+bit 342 C 1 *
+bit 341 O 1 *
+bit 340 I 1 IO_86
+bit 339 O 1 IO_86 338 0 Z
+bit 338 C 1 *
+bit 337 O 1 *
+bit 336 I 1 IO_87
+bit 335 O 1 IO_87 334 0 Z
+bit 334 C 1 *
+bit 333 O 1 *
+bit 332 I 1 IO_88
+bit 331 O 1 IO_88 330 0 Z
+bit 330 C 1 *
+bit 329 O 1 *
+bit 328 I 1 IO_89
+bit 327 O 1 IO_89 326 0 Z
+bit 326 C 1 *
+bit 325 O 1 *
+bit 324 I 1 IO_90
+bit 323 O 1 IO_90 322 0 Z
+bit 322 C 1 *
+bit 321 O 1 *
+bit 320 I 1 IO_91
+bit 319 O 1 IO_91 318 0 Z
+bit 318 C 1 *
+bit 317 O 1 *
+bit 316 I 1 IO_92
+bit 315 O 1 IO_92 314 0 Z
+bit 314 C 1 *
+bit 313 O 1 *
+bit 312 I 1 IO_93
+bit 311 O 1 IO_93 310 0 Z
+bit 310 C 1 *
+bit 309 O 1 *
+bit 308 I 1 IO_94
+bit 307 O 1 IO_94 306 0 Z
+bit 306 C 1 *
+bit 305 O 1 *
+bit 304 O 1 *
+bit 303 O 1 *
+bit 302 O 1 *
+bit 301 O 1 *
+bit 300 O 1 *
+bit 299 O 1 *
+bit 298 I 1 IO_95
+bit 297 O 1 IO_95 296 0 Z
+bit 296 C 1 *
+bit 295 O 1 *
+bit 294 I 1 IO_96
+bit 293 O 1 IO_96 292 0 Z
+bit 292 C 1 *
+bit 291 O 1 *
+bit 290 I 1 IO_97
+bit 289 O 1 IO_97 288 0 Z
+bit 288 C 1 *
+bit 287 O 1 *
+bit 286 I 1 IO_98
+bit 285 O 1 IO_98 284 0 Z
+bit 284 C 1 *
+bit 283 O 1 *
+bit 282 I 1 IO_99
+bit 281 O 1 IO_99 280 0 Z
+bit 280 C 1 *
+bit 279 O 1 *
+bit 278 I 1 IO_100
+bit 277 O 1 IO_100 276 0 Z
+bit 276 C 1 *
+bit 275 O 1 *
+bit 274 I 1 IO_101
+bit 273 O 1 IO_101 272 0 Z
+bit 272 C 1 *
+bit 271 O 1 *
+bit 270 I 1 IO_102
+bit 269 O 1 IO_102 268 0 Z
+bit 268 C 1 *
+bit 267 O 1 *
+bit 266 I 1 IO_103
+bit 265 O 1 IO_103 264 0 Z
+bit 264 C 1 *
+bit 263 O 1 *
+bit 262 I 1 IO_104
+bit 261 O 1 IO_104 260 0 Z
+bit 260 C 1 *
+bit 259 O 1 *
+bit 258 O 1 *
+bit 257 O 1 *
+bit 256 O 1 *
+bit 255 O 1 *
+bit 254 O 1 *
+bit 253 O 1 *
+bit 252 I 1 IO_105
+bit 251 O 1 IO_105 250 0 Z
+bit 250 C 1 *
+bit 249 O 1 *
+bit 248 I 1 IO_106
+bit 247 O 1 IO_106 246 0 Z
+bit 246 C 1 *
+bit 245 O 1 *
+bit 244 O 1 *
+bit 243 O 1 *
+bit 242 O 1 *
+bit 241 O 1 *
+bit 240 I 1 IO_108
+bit 239 O 1 IO_108 238 0 Z
+bit 238 C 1 *
+bit 237 O 1 *
+bit 236 I 1 IO_109
+bit 235 O 1 IO_109 234 0 Z
+bit 234 C 1 *
+bit 233 O 1 *
+bit 232 I 1 IO_110
+bit 231 O 1 IO_110 230 0 Z
+bit 230 C 1 *
+bit 229 O 1 *
+bit 228 I 1 IO_111
+bit 227 O 1 IO_111 226 0 Z
+bit 226 C 1 *
+bit 225 O 1 *
+bit 224 I 1 IO_112
+bit 223 O 1 IO_112 222 0 Z
+bit 222 C 1 *
+bit 221 O 1 *
+bit 220 I 1 IO_113
+bit 219 O 1 IO_113 218 0 Z
+bit 218 C 1 *
+bit 217 O 1 *
+bit 216 I 1 IO_114
+bit 215 O 1 IO_114 214 0 Z
+bit 214 C 1 *
+bit 213 O 1 *
+bit 212 O 1 *
+bit 211 O 1 *
+bit 210 O 1 *
+bit 209 O 1 *
+bit 208 O 1 *
+bit 207 O 1 *
+bit 206 I 1 IO_115
+bit 205 O 1 IO_115 204 0 Z
+bit 204 C 1 *
+bit 203 O 1 *
+bit 202 I 1 IO_116
+bit 201 O 1 IO_116 200 0 Z
+bit 200 C 1 *
+bit 199 O 1 *
+bit 198 I 1 IO_117
+bit 197 O 1 IO_117 196 0 Z
+bit 196 C 1 *
+bit 195 O 1 *
+bit 194 I 1 IO_118
+bit 193 O 1 IO_118 192 0 Z
+bit 192 C 1 *
+bit 191 O 1 *
+bit 190 I 1 IO_119
+bit 189 O 1 IO_119 188 0 Z
+bit 188 C 1 *
+bit 187 O 1 *
+bit 186 I 1 IO_120
+bit 185 O 1 IO_120 184 0 Z
+bit 184 C 1 *
+bit 183 O 1 *
+bit 182 I 1 IO_121
+bit 181 O 1 IO_121 180 0 Z
+bit 180 C 1 *
+bit 179 O 1 *
+bit 178 I 1 IO_122
+bit 177 O 1 IO_122 176 0 Z
+bit 176 C 1 *
+bit 175 O 1 *
+bit 174 I 1 IO_123
+bit 173 O 1 IO_123 172 0 Z
+bit 172 C 1 *
+bit 171 O 1 *
+bit 170 I 1 IO_124
+bit 169 O 1 IO_124 168 0 Z
+bit 168 C 1 *
+bit 167 O 1 *
+bit 166 O 1 *
+bit 165 O 1 *
+bit 164 O 1 *
+bit 163 O 1 *
+bit 162 O 1 *
+bit 161 O 1 *
+bit 160 I 1 IO_125
+bit 159 O 1 IO_125 158 0 Z
+bit 158 C 1 *
+bit 157 O 1 *
+bit 156 I 1 IO_126
+bit 155 O 1 IO_126 154 0 Z
+bit 154 C 1 *
+bit 153 O 1 *
+bit 152 I 1 IO_127
+bit 151 O 1 IO_127 150 0 Z
+bit 150 C 1 *
+bit 149 O 1 *
+bit 148 I 1 IO_128
+bit 147 O 1 IO_128 146 0 Z
+bit 146 C 1 *
+bit 145 O 1 *
+bit 144 I 1 IO_129
+bit 143 O 1 IO_129 142 0 Z
+bit 142 C 1 *
+bit 141 O 1 *
+bit 140 I 1 IO_130
+bit 139 O 1 IO_130 138 0 Z
+bit 138 C 1 *
+bit 137 O 1 *
+bit 136 I 1 IO_131
+bit 135 O 1 IO_131 134 0 Z
+bit 134 C 1 *
+bit 133 O 1 *
+bit 132 O 1 *
+bit 131 O 1 *
+bit 130 O 1 *
+bit 129 O 1 *
+bit 128 I 1 IO_133
+bit 127 O 1 IO_133 126 0 Z
+bit 126 C 1 *
+bit 125 O 1 *
+bit 124 I 1 IO_134
+bit 123 O 1 IO_134 122 0 Z
+bit 122 C 1 *
+bit 121 O 1 *
+bit 120 O 1 *
+bit 119 O 1 *
+bit 118 O 1 *
+bit 117 O 1 *
+bit 116 O 1 *
+bit 115 O 1 *
+bit 114 I 1 IO_135
+bit 113 O 1 IO_135 112 0 Z
+bit 112 C 1 *
+bit 111 O 1 *
+bit 110 I 1 IO_136
+bit 109 O 1 IO_136 108 0 Z
+bit 108 C 1 *
+bit 107 O 1 *
+bit 106 I 1 IO_137
+bit 105 O 1 IO_137 104 0 Z
+bit 104 C 1 *
+bit 103 O 1 *
+bit 102 I 1 IO_138
+bit 101 O 1 IO_138 100 0 Z
+bit 100 C 1 *
+bit 99 O 1 *
+bit 98 I 1 IO_139
+bit 97 O 1 IO_139 96 0 Z
+bit 96 C 1 *
+bit 95 O 1 *
+bit 94 I 1 IO_140
+bit 93 O 1 IO_140 92 0 Z
+bit 92 C 1 *
+bit 91 O 1 *
+bit 90 I 1 IO_141
+bit 89 O 1 IO_141 88 0 Z
+bit 88 C 1 *
+bit 87 O 1 *
+bit 86 I 1 IO_142
+bit 85 O 1 IO_142 84 0 Z
+bit 84 C 1 *
+bit 83 O 1 *
+bit 82 I 1 IO_143
+bit 81 O 1 IO_143 80 0 Z
+bit 80 C 1 *
+bit 79 O 1 *
+bit 78 I 1 IO_144
+bit 77 O 1 IO_144 76 0 Z
+bit 76 C 1 *
+bit 75 O 1 *
+bit 74 O 1 *
+bit 73 O 1 *
+bit 72 O 1 *
+bit 71 O 1 *
+bit 70 O 1 *
+bit 69 O 1 *
+bit 68 I 1 IO_145
+bit 67 O 1 IO_145 66 0 Z
+bit 66 C 1 *
+bit 65 O 1 *
+bit 64 I 1 IO_146
+bit 63 O 1 IO_146 62 0 Z
+bit 62 C 1 *
+bit 61 O 1 *
+bit 60 I 1 IO_147
+bit 59 O 1 IO_147 58 0 Z
+bit 58 C 1 *
+bit 57 O 1 *
+bit 56 I 1 IO_148
+bit 55 O 1 IO_148 54 0 Z
+bit 54 C 1 *
+bit 53 O 1 *
+bit 52 I 1 IO_149
+bit 51 O 1 IO_149 50 0 Z
+bit 50 C 1 *
+bit 49 O 1 *
+bit 48 I 1 IO_150
+bit 47 O 1 IO_150 46 0 Z
+bit 46 C 1 *
+bit 45 O 1 *
+bit 44 I 1 IO_151
+bit 43 O 1 IO_151 42 0 Z
+bit 42 C 1 *
+bit 41 O 1 *
+bit 40 I 1 IO_152
+bit 39 O 1 IO_152 38 0 Z
+bit 38 C 1 *
+bit 37 O 1 *
+bit 36 I 1 IO_153
+bit 35 O 1 IO_153 34 0 Z
+bit 34 C 1 *
+bit 33 O 1 *
+bit 32 I 1 IO_154
+bit 31 O 1 IO_154 30 0 Z
+bit 30 C 1 *
+bit 29 O 1 *
+bit 28 O 1 *
+bit 27 O 1 *
+bit 26 O 1 *
+bit 25 O 1 *
+bit 24 O 1 *
+bit 23 O 1 *
+bit 22 I 1 IO_155
+bit 21 O 1 IO_155 20 0 Z
+bit 20 C 1 *
+bit 19 O 1 *
+bit 18 I 1 IO_156
+bit 17 O 1 IO_156 16 0 Z
+bit 16 C 1 *
+bit 15 O 1 *
+bit 14 I 1 IO_157
+bit 13 O 1 IO_157 12 0 Z
+bit 12 C 1 *
+bit 11 O 1 *
+bit 10 I 1 IO_158
+bit 9 O 1 IO_158 8 0 Z
+bit 8 C 1 *
+bit 7 O 1 *
+bit 6 I 1 IO_159
+bit 5 O 1 IO_159 4 0 Z
+bit 4 C 1 *
+bit 3 I 1 CLK0
+bit 2 I 1 CLK1
+bit 1 I 1 CLK2
+bit 0 I 1 CLK3
--- /dev/null
+Makefile
+Makefile.in
--- /dev/null
+2008-01-18 Arnim Laeuger <arniml@users.sourceforge.net>
+
+ * UrJTAG.txt (packages): Some notes about Flex & BSDL
+
+2007-12-30 Arnim Laeuger <arniml@users.sourceforge.net>
+
+ * UrJTAG.txt (Example): Added contents from README.svf, new section on BSDL
+
+2007-12-15 Kolja Waschk <kawk>
+
+ * fdl.txt, gpl.txt: licenses as plain text files
+ * lgpl.txt: Lesser GPL not in use (yet), removed
+ * jtag.1, bsdl2jtag.1: manpages copied (with permission) from
+ Debian openwince jtag package, then updated for UrJTAG.
+ * Makefile.am: add new files
+
+2007-12-10 Arnim Laeuger <arniml@users.sourceforge.net>
+
+ * UrJTAG.txt: Balancing of tags.
+
+2007-12-07 Kolja Waschk <kawk>
+
+ * UrJTAG.txt: New software manual, using asciidoc formatting
+ * internals.xml: merged into UrJTAG.txt.
+
+2003-09-15 Marcel Telka <marcel@telka.sk>
+
+ * internals.xml: Fixed spelling (patch 805108, Andreas Mohr).
+
+2003-03-19 Marcel Telka <marcel@telka.sk>
+
+ * Makefile.am: New file.
+
+2003-03-06 Marcel Telka <marcel@telka.sk>
+
+ * internals.xml: Internals documentation started.
+
--- /dev/null
+#
+# $Id$
+#
+# Copyright (C) 2003 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Marcel Telka <marcel@telka.sk>, 2003.
+#
+
+include $(top_srcdir)/Makefile.rules
+
+man_MANS = jtag.1 bsdl2jtag.1
+
+EXTRA_DIST = \
+ gpl.txt \
+ fdl.txt \
+ UrJTAG.txt \
+ README.ejtag \
+ howto_add_support_for_more_flash.txt \
+ $(man_MANS)
+
--- /dev/null
+This diff files add:\r
+1) EJTAG support. It supply ability to flash almost ALL EJTAG-capable boards (ARM, MIPS).\r
+It is not needed to search BSDL sescriptors. it uses STANDARD path to access flash.\r
+For new CPU it is needed just add data files wich can be authomatically\r
+generated, but jtag-tools originally used this files and auto generation for EJTAG-capable\r
+CPUs is not wroted. Anybody can wrote this code.\r
+\r
+EJTAG driver written by Marek Marek Michalkiewicz <marekm@amelek.gda.pl>, 2005\r
+under GPL http://www.amelek.gda.pl/rtl8181/jtag/\r
+\r
+2) data files for very different EJTAG capable MIPS CPUs in file data-add.diff\r
+Realtek RTL8181, RTL8186, Admtek ADM5120, Atheros AR2312, TI AR7, Brecis (PMC-Sierra) MSP2006.\r
+anybody can create files for nes CPUs using this files as template.\r
+Truly say, it is needed to change just\r
+"instruction length" and "endian" strings.\r
+Instruction length can be given by "detect" command:\r
+jtag> detect\r
+IR length: 5\r
+Chain length: 1\r
+Device Id: 0001-0000001000000010-00101110000-1\r
+ ^^^^ ^^^^^^^^^^^^^^^^ ^^^^^^^^^^^\r
+--->>>> step-PARTS -MANUFACTURER\r
+\r
+3) address-support.diff contains support for non-zero flash address.\r
+Different CPUs use different flash addresses.\r
+\r
+Example: TI AR7 (famouse ADSL modems) uses 0x30000000\r
+another MIPS CPUs uses 0x3fc00000 (standard for MIPS32 boards).\r
+0x1------- is for 8bit access to flash (example: 0x1fc00000)\r
+0x3------- is for 16-bit access to flash (example: 0x3fc00000)\r
+0x5------- is for 32-bit access to flash (example: 0x5fc00000)\r
+length depends on flash. It is possible to try any from this address regions.\r
+Many CPUs map flash to all of this addresses.\r
+\r
+So, for EJTAG non-zero flash address support IS NEEDED. Unfortunetly, ejtag-tools\r
+not maintained by owner and this patch is not implemented more than 2 years.\r
+But, i think, it is not needed to create new sourceforge project.\r
+\r
+For success flashing it is needed to take into attention:\r
+in file /libbrux/flash/amd.c there are strings:\r
+ o = 1; /* Heuristic */\r
+Flash can be connected to board using switch in address. In some cases it is needed\r
+to add 1 to this digit. For example, MSP2006 boards uses amd_flash_autodetect8 \r
+with o = 1. And AR7 uses o = 0.\r
+\r
+4) example of successful flashing using EJTAG: http://forum.openwrt.org/viewtopic.php?id=4191\r
+\r
+Patch do not conflicts with another patches.\r
+it \r
+1)adds /src/bus/ejtag.c file\r
+2) register this file in /src/bus/buses.c buses.h makefile.am\r
+3) removes one check from /src/tap/parport/ppdev.c\r
+4) change in flash.c is not needed, but can speedup flashing. It just exclude "printf" from cycle.\r
+5) comment two strings in libbrux/flash/detectflash.c\r
+it is not needed\r
+6) add non-zero flash address support to libbrux/flash/jedec.c and amd.c\r
+i wonder why this is not added to CVS tree. This patch was given by different peoples many times.\r
--- /dev/null
+Universal JTAG library, server and tools
+========================================
+Kolja Waschk (Ed.)
+$Id$
+
+/////////////////////////////////////////////////////////////////////////////
+This document is formatted to be readable for "asciidoc". Before you
+make any changes, please read the use guide at the asciidoc home page
+www.methods.co.nz/asciidoc and try to adapt to the style used here; e.g.
+use the single-line section header style ("== header =="). Please do not use
+any whitespace other than SPACE (ASCII 0x20) and break lines > 79 chars.
+/////////////////////////////////////////////////////////////////////////////
+
+== Copyright ==
+
+Copyright 2007, 2008 Kolja Waschk and the respective authors.
+
+Permission is granted to copy, distribute and/or modify this document under the
+terms of the GNU Free Documentation License, Version 1.2 or any later version
+published by the Free Software Foundation. A copy of the license is included in
+the section entitled "GNU Free Documentation License".
+
+//=========================================================================
+
+== General ==
+
+=== JTAG ===
+// Contributed by Ralf Engels
+
+JTAG basics can be found all over the Internet. This section should go into
+some more details about working with JTAG. What hardware do you need, what is
+the usage of JTAG, where do I get files. What file formats are available...
+
+==== Introduction ====
+
+JTAG (IEEE 1149.1) is a serial interface for testing devices with
+integrated circuits. The problem that the JTAG interface was designed to solve
+is checking if connections between ICs are OK. Therefore you can set and check
+in- and outputs of ICs. In order to save pins and logic a very simple serial
+design was invented.
+
+* One pin serial input
+* One pin serial output
+* One pin clock
+* One pin control
+
+The control pin (together with clock) allows to switch device states. A state
+machine inside each chip can be controlled, e.g. to reset the device. This
+control machine also allows to have two internal shift registers in each device
+(although we only have on in- and one output-pin). The registers are called
+instruction register (IR) and data register (DR). The current UrJTAG tool
+allows you to set the IR and set and get the DR. It doesn't allow you to
+directly control the state machine (yet).
+
+==== Interfaces ====
+
+The simplest interface that you can build is like the Xilinx parallel cable
+(also called DLC5). If your device works with a 5V or 3.3V supply voltage then
+this device can even be built just with passive parts. (picture missing here)
+UrJTAG also supports a number of other interface adapters.
+
+==== Additions ====
+
+In the meantime the JTAG specification was used as a basis for programming
+flash files and debugging processors. UrJTAG supports programming a couple of
+different flash devices. It also supports programming of non-flash devices via
+SVF files. UrJTAG does not support debugging yet. Other open source solutions
+such as OpenOCD allow you to debug ARM processors with gdb.
+
+==== BSDL and UrJTAG data files ====
+
+The BSDL file format describes the JTAG interface for one IC. It is a VHDL
+syntax with the needed information (like pin-names, register lengths and
+commands) that is usually created by the supplier. e.g. Xilinx BSDL files are
+all included in their free web-pack (using file extension ".bsd").
+
+UrJTAG uses a different file format internally. So in order to add a new device
+to UrJTAG you need to convert those files and produce a directory structure.
+Currently there are at least three tools available to do that; included with
+UrJTAG is "bsdl2jtag". Please ask on the mailing list in case of problems with
+that. Please also send proven working files back to this project.
+
+Starting with post-0.7 releases, UrJTAG contains a BSDL subsystem that
+retrieves the descriptions for chips in the chain from BSDL files on the
+fly. "bsdl2jtag" is in fact a wrapper that uses the BSDL subsystem to
+convert the BSDL file.
+
+==== SVF files ====
+
+The SVF file format contains a number of high level commands to drive the JTAG
+bus. For example you can shift the IR or DR and even check for the results.
+The Xilinx Impact and Altera QuartusII tools allow you to write this file to
+program devices.
+
+The player has been developed according to the "Serial Vector Format
+Specification", Revision E, 8 March 1999 issued by ASSET InterTech, Inc. The
+full specification can be found at
+http://www.asset-intertech.com/support/svf.pdf[].
+
+UrJTAG features an "SVF player" that can read SVF files and perform the
+described actions on the bus.
+
+SVF parser and lexer are also copyright 2002, CDS at http://www-csd.ijs.si/[].
+They have been reused from the "Experimental Boundary Scan" project at
+http://ebsp.sourceforge.net/[].
+
+==== JAM/STAPL files ====
+
+Another format for describing actions over JTAG interfaces is STAPL, actually
+standardized as JEDEC "JESD-71A". Compared to SVF, it looks more like an
+actual programming language and features looping, conditional execution, and
+more. STAPL is not yet supported by UrJTAG.
+
+//------------------------------------------------------------------------
+
+=== UrJTAG ===
+// Written by K.Waschk
+
+==== Introduction ====
+
+UrJTAG is a software package which enables working with JTAG-aware (IEEE
+1149.1) hardware devices (parts) and boards through a JTAG adapter.
+
+This package has an open and modular architecture with the ability to write
+miscellaneous extensions (like board testers, flash memory programmers, and so
+on).
+
+UrJTAG is free software, covered by the GNU General Public License,
+and you are welcome to change it and/or distribute copies of it under certain
+conditions. There is absolutely no warranty for UrJTAG. Please read
+the COPYING file for more info.
+
+WARNING: This software may damage your hardware!
+
+Feedback and contributions are welcome.
+
+==== About this document ====
+
+This documentation is far from being complete. You're encouraged to amend and
+supplement it and submit your changes in the Bugs or Enhancements tracker
+at the UrJTAG website.
+
+==== UrJTAG Website ====
+
+The most current version of this documentation and UrJTAG source code
+is always available from the project homepage at http://www.urjtag.org[].
+
+==== The name "UrJTAG" ====
+
+I (Kolja) favour short names, so I thought about adding only a few
+letters to "JTAG". The prefix "Ur" in German means "ancestral", an "Ur-Vater"
+is a forefather. UrJTAG shall become the forefather, the prototype for many
+other JTAG tools. By mere chance the "Ur" is also another name for an aurochs,
+an animal similar to the GNU...
+
+==== Authors, contributors, ... thanks ====
+
+A list of contributors is maintained in the file THANKS in the source
+distribution. Special thanks go to Marcel Telka, who actually "invented" the
+JTAG tools and wrote most of this basis of UrJTAG, and Arnim Laeuger for his
+continuous support and development of SVF and BSDL subsystem and FT2232
+drivers.
+
+==== UrJTAG and openwince JTAG Tools ====
+
+The JTAG Tools originally were developed by Marcel Telka as part of
+the openwince project. Still a large portion of the source code is his work.
+However, the last release of the JTAG tools was version 0.5.1 in 2003. After a
+few years the development completely stalled. Every few months or so on the
+project's mailing list someone asked about continuing, but a critical mass
+wasn't reached before late 2007. A fork of the JTAG tools was created under the
+wings of the UrJTAG project at Sourceforge.
+
+//------------------------------------------------------------------------
+
+=== System requirements ===
+//Copied from original README
+
+==== Supported host operating systems ====
+
+JTAG Tools should run on all Unix like operating systems including MS Windows
+with Cygwin installed. A precompiled version that runs on MS Windows without
+Cygwin is available as a Windows installer executable.
+
+==== Required software for running UrJTAG ====
+
+Required only for MS Windows, unless you use the precompiled version:
+
+ * current Cygwin net installation from http://cygwin.com[]
+ * ioperm package (a part of the standard Cygwin net installation)
+
+It may be necessary to run the command "ioperm -i" to install the IOPERM.SYS
+driver in the system.
+
+If UrJTAG was compiled to use the readline library, it has to be present on
+the system as well. It's probably a standard part of your distribution.
+
+More software is needed if you want to compile UrJTAG (which you probably want
+because currently no pre-compiled binaries are available...).
+See "Installation" below.
+
+==== Supported JTAG adapters/cables ====
+
+See 'help cable' command for up-to-date info.
+
+Parallel-port cables:
+
+ * Arcom JTAG Cable
+ * Altera ByteBlaster/ByteBlaster II/ByteBlasterMV Parallel Port Download Cable
+ * Xilinx DLC5 JTAG Parallel Cable III
+ * ETC EA253 JTAG Cable
+ * ETC EI012 JTAG Cable
+ * Ka-Ro TRITON (PXA255/250) JTAG Cable
+ * Keith & Koep JTAG Cable
+ * Lattice Parallel Port JTAG Cable
+ * Mpcbdm JTAG Cable
+ * Macraigor Wiggler JTAG Cable
+
+FT2232-based USB cables:
+
+ * Amontec JTAGkey
+ * Amontec JTAGkey-Tiny (supported as cable "JTAGkey")
+ * KrisTech UsbScarab2 ARM JTAG http://www.kristech.eu/[]
+ * Olimex ARM-USB-JTAG
+ * Olimex ARM-USB-TINY
+ * OOCDLink-s (experimental) http://www.joernonline.de/dw/doku.php?id=projects:oocdlink:2_oocdlinks[]
+ * Other FT2232-based USB JTAG cables (experimental)
+ * TinCanTools Flyswatter
+ * Turtelizer 2 (experimental) http://www.ethernut.de/en/hardware/turtelizer/[]
+ * USB to JTAG Interface (experimental)
+ * http://www.hs-augsburg.de/~hhoegl/proj/usbjtag/usbjtag.html[]
+ * Black gnICE http://docs.blackfin.uclinux.org/doku.php?id=hw:jtag:gnice[]
+ * Xverve Signalyzer Tool (experimental)
+
+Other USB cables:
+
+ * Altera USB-Blaster and compatible http://www.ixo.de/info/usb_jtag[]
+ * Segger/IAR J-Link / Atmel SAM-ICE (experimental, work in progress)
+ * Xilinx Platform USB Cable / DLC9 (slow, experimental, work in progress - don't use)
+
+Other cables:
+
+ * Technologic Systems TS-7800 SoC GPIO builtin JTAG interface
+
+==== JTAG-aware parts (chips) ====
+
+The data/ directory of the UrJTAG installation has some more, but at
+least the following are supported:
+
+ * Altera EP1C20F400
+ * Altera MAX7000 (w/ BSDL)
+ * Altera EPM7128AETC100
+ * Altera Cyclone I & II (w/ BSDL)
+ * Analog Devices Sharc-21065L
+ * Atmel ATmega128 (partial support)
+ * Atmel AT32AP7000 (partial support)
+ * Broadcom BCM1250
+ * Broadcom BCM3310 (partial support)
+ * Broadcom BCM5421S
+ * Broadcom BCM4712 (partial support)
+ * DEC SA1100
+ * Hitachi HD64465
+ * Hitachi SH7727
+ * Hitachi SH7729
+ * IBM PowerPC 440GX
+ * Intel IXP425
+ * Intel SA1110
+ * Intel PXA250/PXA255/PXA260/PXA261/PXA262/PXA263
+ * Lattice LC4032V
+ * Lattice M4A3-64/32
+ * Lattice M4A3-256/192
+ * Motorola MPC8245
+ * Samsung S3C4510B
+ * Sharp LH7A400
+ * Toshiba TX4925/TX4926
+ * Xilinx XC2C256-TQ144
+ * Xilinx XCR3032XL-VQ44
+ * Xilinx XCR3128XL-CS144
+ * Xilinx XCR3128XL-VQ100
+ * Xilinx XCR3256XL-FT256
+ * Xilinx Spartan-IIE
+ * Xilinx Spartan-3/E
+ * Xilinx Spartan-3AN
+
+==== Flash chips ====
+
+NOTE: Not all chips are supported in every possible configuration, there may
+be untested combinations of chip type, bus width, ...
+
+ * Intel 28FxxxJ3A (28F320J3A, 28F640J3A, 28F128J3A)
+ * Intel 28FxxxK3 (28F640K3, 28F128K3, 28F256K3)
+ * Intel 28FxxxK18 (28F640K18, 28F128K18, 28F256K18)
+ * AMD Am29LV64xD (Am29LV640D, Am29LV641D, Am29LV642D)
+ * AMD Am29xx040B (Am29F040B, Am29LV040B)
+
+UrJTAG uses the multi-byte write mode if supported by the particular flash
+device. The flash code will automatically switch to this algorithm if the
+Device Geometry Definition reports that more than one memory location can be
+written in a single step (refer to CFI details shown by 'detectflash'). Since
+multiple locations are written in a burst-like manner with only one polling
+sequence afterwards, the overall flashing performance increases by factor of
+5-17.
+
+In case you encounter any issues with the multi-byte write mode, run configure
+with the '--disable-flash-multi-byte' option and re-compile to disable this
+algorithm.
+
+//------------------------------------------------------------------------
+
+=== Compilation and installation ===
+
+==== Installation of precompiled UrJTAG for Windows ====
+
+By simply running UrJTAG-xxx.exe, the executable and data files will
+be installed in your Windows program folder, usually some place like
+C:\Program Files\UrJTAG. It comes ready with support for JTAG cables that are
+directly attached to a parallel port. However, if you work with Windows Vista
+and want access to the parallel port, a driver for it has to be installed
+separately. It is available from
+
+ http://www.highrez.co.uk/Downloads/InpOut32/
+
+If you want to use UrJTAG with a JTAG cable attached to the USB port,
+actual cable drivers have to be installed beside UrJTAG itself. Usually,
+the cable vendor will provide the drivers. For example, drivers for
+Altera USB-Blaster come with their Quartus software. For FTDI-based
+cables, you need an INF file describing the cable and FTDIBUS.SYS and
+FTD2XX.DLL from FTDI (CDM drivers). If your cable shows up in the device
+manager without any warning sign, UrJTAG probably is able to talk to it.
+
+Finally, UrJTAG additionally needs libusb-win32 to talk to some USB cables that
+are not based on FTDI chips (Xilinx Platform Cable USB, Segger J-Link). The
+so-called libusb-win32 filter driver is available from the project's download
+page at Sourceforge:
+
+ http://libusb-win32.sourceforge.net/#downloads
+
+==== Required software for compiling UrJTAG ====
+
+To run autogen.sh, you need autoconf and automake, bison, and a recent flex.
+
+The distributed source tarball contains source pregenerated with a current
+flex version; flex therefore is only needed if you want to compile code
+checked out from our Subversion repository. Flex 2.5.4a as it comes with
+most but the very latest Cygwin release cannot build the scanners for BSDL and
+SVF. Building these files requires Flex 2.5.33 or newer. The configure script
+will compare the available Flex version against these preconditions and enables
+or disables the related features.
+
+Furthermore, libtool should be available, and "devel" versions of the following
+packages:
+
+ * gettext
+ * readline (not needed, but really eases interactive use)
+ * ioperm (needed only for Cygwin)
+
+==== Required libraries for USB support ====
+
+For USB adapter support (including support for parallel port adapters attached
+to USB-to-parallel converters), one or more additional libraries are required.
+
+Many USB JTAG adapters and USB-to-parallel converters are based on chips
+made by FTDI. To support these, either intra.net's "libftdi" or FTDI's
+"FTD2XX" library can be used.
+
+On many modern Linux distributions, libftdi is available as a precompiled
+package and can be installed using the distribution's package management system
+(e.g. "apt-get libftdi-dev" for Debian and Ubuntu). If it isn't available or
+you don't run Linux, you can get it from
+
+ * http://www.intra2net.com/en/developer/libftdi/[]
+
+Alternatively, you can use the FTD2XX library from the chip manufacturer FTDI.
+It is available for Linux and Windows. There's more information about linking
+to that library in a Cygwin environment below.
+
+All other USB JTAG adapters can be supported only if libusb is installed.
+There is a libusb-win32 variant that can be used in a Cygwin environment:
+
+ * http://libusb.sourceforge.net[] (libusb)
+ * http://libusb-win32.sourceforge.net[] (libusb for Windows)
+
+For specific notes regarding the use of these libraries in a Cygwin
+environment, see below.
+
+==== Installing from source tar.gz ====
+
+The installation follows the standard configure, make, make install scheme:
+
+ tar xzvf urjtag-x.y.tar.gz
+ cd urjtag-x.y
+ ./configure
+ make
+ make install
+
+==== Installing from Subversion repository ====
+
+If you want to try the very newest version of UrJTAG...
+
+ svn co http://urjtag.svn.sourceforge.net/svnroot/urjtag/trunk urjtag
+
+ cd urjtag/jtag
+ ./autogen.sh
+ # ./configure done by autogen.sh; run it here with special options if needed
+ make
+ make install
+
+==== Linking to FTD2XX.DLL in Cygwin environment ====
+
+Before running configure, get the D2XX drivers from FTDI.
+
+ * http://www.ftdichip.com/Drivers/D2XX.htm[] (FTDI FTD2XX library)
+
+Unzip the archive into a directory of your choice (probably a choice
+without spaces in the name is better) and afterwards run configure with the
+"--with-ftd2xx" pointing to that directory, e.g.
+
+ ./configure --with-ftd2xx="/cygdrive/c/temp/ftdi-cdm-drivers"
+
+Configure should now report
+
+ jtag is now configured for
+ ...
+ Detected libftd2xx : yes
+
+
+==== Using LibUSB-Win32 in Cygwin environment ====
+
+Before running configure, install the LibUSB-Win32 "filter" driver from SF.
+
+ * http://libusb-win32.sourceforge.net[]
+
+Then point configure to the directory where LibUSB-Win32 was installed (it
+might give problems if the path contains spaces, as "Program Files" does!):
+
+ ./configure --with-libusb="/cygdrive/c/Programme/LibUSB-Win32/"
+
+==== Compiling with MinGW ====
+
+UrJTAG may be compiled into a Windows executable using the MinGW compiler
+(http://www.mingw.org[]), or Cygwin GCC with the "-mno-cygwin" compiler flag.
+
+This has the advantage over running in a Cygwin environment that you don't need
+to install anything else but the jtag.exe (plus libraries like FTD2XX.dll or
+InpOut32.DLL that are required for device access under Windows in any case).
+
+However, because support for MinGW is quite new in UrJTAG, it may lack some
+features (e.g. readline support) or run a little slower.
+
+Because it seems to be easier to set up a Cygwin environment, we recommend
+using the Cygwin GCC with "-mno-cygwin" flag instead of using a MinGW setup:
+
+ CFLAGS="-mno-cygwin -O2" ./configure --with-ftd2xx=/tmp/cdm-drivers --with-inpout32
+
+
+It is even possible to cross-compile and build the executable on a Linux
+host:
+
+ ./configure --host=i586-mingw32msvc --with-ftd2xx=/tmp/cdm-drivers --with-inpout32
+ make
+
+
+The "--with-inpout32" switch tells UrJTAG to use the InpOut32.DLL for access to
+parallel ports, because the Cygwin ioperm isn't available for MinGW. The InpOut32
+library is available from logix4u.net:
+
+ http://logix4u.net/Legacy_Ports/Parallel_Port/Inpout32.dll_for_Windows_98/2000/NT/XP.html
+
+An version updated to work in Windows Vista and 64 bit Windows is available from highrez:
+
+ http://www.highrez.co.uk/Downloads/InpOut32/
+
+==== Driver tailoring ====
+
+The configure script enables all default bus, cable and lowlevel drivers. You
+can include and exclude specific drivers if required. For a list of parameters
+run
+
+ ./configure --help
+
+to figure out the appropriate --enable-bus, --enable-cable, and --enable-lowlevel
+options.
+
+
+==== Building the BSDL subsystem ====
+
+As mentioned above, building the BSDL lexer requires Flex 2.5.33 or newer. If
+the detected Flex version is not recent enough, configure will disable the
+BSDL subsystem. The detection result is summarized at the end of configure:
+
+ jtag is now configured for
+ ...
+ Build BSDL subsystem : yes
+
+Flex is only required when you're working on a check-out of the Subversion
+repository. In this case Flex has to be called to transform bsdl_flex.l to
+bsdl_flex.c. When you're compiling from released sources, the local Flex
+version is not relevant since the output file of Flex is part of the
+tarball. I.e. even if the local Flex fails the check, the BSDL subsystem is
+enabled and will be compiled from the released C files.
+
+//=========================================================================
+
+== Usage ==
+
+=== Quick start ===
+// Contributed by Ralf Engels
+
+==== Run the software ====
+
+Connect your JTAG adapter between your PC and target device and turn
+on your device.
+
+To run UrJTAG type "jtag" and press Enter; jtag should start and
+display some initial information. Output should end with a line like this:
+
+ WARNING: UrJTAG may damage your hardware!
+ Type "quit" to exit, "help" for help.
+
+==== Configure the cable ====
+
+Type "help cable" for a list of supported JTAG cables.
+
+Type the "cable" command followed by the cable name and possibly further
+arguments for cable configuration. Example:
+
+ jtag> cable EA253 parallel 0x378
+ Initializing ETC EA253 JTAG Cable on parallel port at 0x378
+
+See the section about the "cable" command for details and USB support.
+
+==== Detect parts on the JTAG chain ====
+
+Type "detect" at the jtag command prompt:
+
+ jtag> detect
+
+Your output should look like this:
+
+ IR length: 5
+ Chain length: 1
+ Device Id: 01011001001001100100000000010011
+ Manufacturer: Intel
+ Part: PXA250
+ Stepping: C0
+ Filename: /usr/local/share/urjtag/intel/pxa250/pxa250c0
+
+If you get empty output or an error message your JTAG adapter is not connected
+properly, or your target board doesn't work, or it is turned off.
+
+The "detect" command is required before all other commands.
+
+==== Print current JTAG chain status ====
+
+ jtag> print chain
+ No. Manufacturer Part Stepping Instruction Register
+ ---------------------------------------------------------
+ 0 Intel PXA250 C0 BYPASS BR
+
+==== Sample device pin status ====
+
+ jtag> instruction SAMPLE/PRELOAD
+ jtag> shift ir
+ jtag> shift dr
+ jtag> dr
+ 1000110010000010000110010111111111111111111001101110...
+ jtag> print chain
+ No. Manufacturer Part Stepping Instruction Register
+ ------------------------------------------------------------
+ 0 Intel PXA250 C0 SAMPLE/PRELOAD BSR
+ jtag> get signal BOOT_SEL[0]
+ BOOT_SEL[0] = 0
+ jtag>
+
+ Note: BSR is "Boundary Scan Register"
+
+==== Burn flash connected to the part ====
+
+ jtag> flashmem 0 brux.b
+ 0x00000000
+ Note: Supported configuration is 2 x 16 bit only
+ BOOT_SEL: Asynchronous 32-bit ROM
+
+ 2 x 16 bit CFI devices detected (QRY ok)!
+
+ program:
+ block 0 unlocked
+ erasing block 0: 0
+ addr: 0x00002854
+ verify:
+ addr: 0x00002854
+ Done.
+ jtag>
+
+or:
+
+ jtag> flashmem msbin xboot.bin
+ Note: Supported configuration is 2 x 16 bit only
+ BOOT_SEL: Asynchronous 32-bit ROM
+
+ 2 x 16 bit CFI devices detected (QRY ok)!
+
+ block 0 unlocked
+ erasing block 0: 0
+ program:
+ record: start = 0x00000000, len = 0x00000004, checksum = 0x000001EB
+ record: start = 0x00000040, len = 0x00000008, checksum = 0x000001B0
+ record: start = 0x00001000, len = 0x00002B30, checksum = 0x00122CAB
+ record: start = 0x00004000, len = 0x00000160, checksum = 0x0000684B
+ record: start = 0x00005000, len = 0x00000054, checksum = 0x000008EE
+ record: start = 0x00005054, len = 0x00000030, checksum = 0x00000DA9
+ record: start = 0x00000000, len = 0x00001000, checksum = 0x00000000
+
+ verify:
+ record: start = 0x00000000, len = 0x00000004, checksum = 0x000001EB
+ record: start = 0x00000040, len = 0x00000008, checksum = 0x000001B0
+ record: start = 0x00001000, len = 0x00002B30, checksum = 0x00122CAB
+ record: start = 0x00004000, len = 0x00000160, checksum = 0x0000684B
+ record: start = 0x00005000, len = 0x00000054, checksum = 0x000008EE
+ record: start = 0x00005054, len = 0x00000030, checksum = 0x00000DA9
+ record: start = 0x00000000, len = 0x00001000, checksum = 0x00000000
+
+ Done.
+ jtag>
+
+==== Non-standard flash commands ====
+
+Erasing and programming flash devices is covered by standard procedures
+in UrJTAG. Apart from these, many flash chips implement a lot more
+functionality via dedicated commands that vary from between manufacturers
+and device families. UrJTAG can't cover them all natively.
+
+It's however possible to send any command stream to the flash by using
+the poke and peek commands. You just need to clarify two things:
+
+ 1. base address of the flash (BA) +
+ it's the same that's used for detectflash
+ 2. data width, x8 or x16 +
+ defined by the width of the bus where the flash is attached
+
+Next look up the address/data pairs for the command in question. The data
+sheet for your particular flash should document all commands in a table e.g.
+If your flash is attached in x16 mode, the address must be shifted by one
+position. Addresses in x8 mode are not affected.
+
+The "Read Manufacturer ID" command in x16 mode would look like
+
+ poke BA+(0x555*2) 0xaa
+ poke BA+(0x2aa*2) 0x55
+ poke BA+(0x555*2) 0x90
+ peek BA+(0x000*2)
+
+Note that the calculations must be done beforehand. UrJTAG can't evaluate
+expressions on the command line.
+
+//------------------------------------------------------------------------
+
+=== JTAG commands ===
+// Various authors...
+
+==== Overview ====
+
+Following is a list of commands currently supported by jtag and some
+example usage.
+
+*bit*:: define new BSR bit
+*bus*:: change active bus
+*bsdl*:: manage BSDL files
+*cable*:: select JTAG cable
+*detect*:: detect parts on the JTAG chain
+*detectflash*:: detect parameters of flash chips attached to a part
+*discovery*:: discovery of unknown parts in the JTAG chain
+*dr*:: display or set active data register for a part
+*endian*:: set/print endianess for reading/writing binary files
+*eraseflash*:: erase flash memory by number of blocks
+*flashmem*:: burn flash memory with data from a file
+*frequency*:: setup JTAG frequency
+*get*:: get external signal value
+*help*:: display this help
+*include*:: include command sequence from external file
+*initbus*:: initialize bus driver for active part
+*instruction*:: change active instruction for a part or declare new instruction
+*part*:: change active part for current JTAG chain
+*peek*:: read a single word
+*poke*:: write a single word
+*print*:: display JTAG chain list/status
+*quit*:: exit and terminate this session
+*readmem*:: read content of the memory and write it to file
+*register*:: define new data register for a part
+*scan*:: detect changes on input pins of current part
+*set*:: set external signal value
+*shift*:: shift data/instruction registers through JTAG chain
+*signal*:: define new signal for a part
+*svf*:: execute SVF commands from file
+*writemem*:: write content from file to memory
+
+Some tools derived from the same openwince JTAG Tools code base as UrJTAG
+know additional commands, which are not supported in UrJTAG. See the section
+about "Unsupported commands", below, about workarounds.
+
+==== Basic commands ====
+
+===== quit =====
+
+This command closes the jtag console.
+
+===== help =====
+
+Without additional parameter it gives an overview of the available commands.
+With a parameter you can get more information about any of the commands.
+Example:
+
+ jtag> help cable
+
+Most cable drivers require some more details about the cable to start properly.
+To learn about the details, use the "cable" command with the name of the cable
+followed by the word "help". Example:
+
+ jtag> cable wiggler help
+
+===== include =====
+
+Run commands from a named script file installed with UrJTAG or applies a BSDL
+file to the active part. The directory prefix is added automatically
+(e.g. /usr/share/urjtag/, depending on your installation), unless the file
+name starts with a dot or slash.
+
+For example, the following startup sequence configures the cable, chain, and
+loads definitions and bus driver for a Samsung S3C4510B CPU to peek its memory
+at 0x0:
+
+ jtag> cable wiggler ppdev /dev/parport0
+ jtag> detect
+ jtag> include samsung/s3c4510b/s3c4510b
+ jtag> peek 0x0000
+
+If the file contains valid BSDL syntax, it will be converted to native
+commands on the fly.
+
+Optionally, a number X may be specified following the file name, to cause
+an X times repetition of the command sequence from the file.
+
+==== Chain management ====
+
+===== cable =====
+
+Sets and initializes the cable driver. This is usually the first command that
+you are executing in a session. Example:
+
+ jtag> cable EA253 parallel 0x378
+ Initializing ETC EA253 JTAG Cable on parallel port at 0x378
+
+For a parallel cable using the ppdev driver you would use this:
+
+ jtag> cable DLC5 ppdev /dev/parport0
+
+If you get an error, it may be that the parallel port kernel driver
+was compiled as a module in your Linux kernel and wasn't loaded automatically.
+Then you should try to load the ppdev driver manually (with root rights outside
+the jtag shell):
+
+ modprobe ppdev
+ modprobe parport
+ modprobe parport_pc
+
+UrJTAG now also supports some USB cables. Unfortunately, there is no standard
+for "JTAG over USB", so this support is limited to a few selected cables only.
+For cables based on the FT2232 chip from FTDI, the cable command has to be
+given cable name and optionally the driver name, USB Vendor, and Product ID of
+the cable:
+
+ jtag> cable ARM-USB-OCD vid=15ba pid=0003 driver=ftdi-mpsse
+
+For all known cables, UrJTAG knows the VID and PID so you can just say
+
+ jtag> cable ARM-USB-OCD
+
+If your cable isn't detected automatically though it's listed as a known and
+supported cable, feel free to report its VID and PID. It might be a different
+revision and should be added to the known & tested list of cables.
+
+As stated above, the driver name is not mandatory for the cable
+command. UrJTAG will select the driver automatically based on UrJTAG's
+configuration. In case your system provides just one of libftdi or FTD2XX
+the respective driver is selected. If both libraries are available, then
+FTD2XX is selected. That's simply because FTD2XX showed some performance
+advantages over libftdi in the past. You can still force libftdi with the
+respective parameter.
+
+WARNING: There's one quirk to consider when using FTDI's FTD2XX driver. It
+connects to any known FTDI chip, randomly. I.e. if there's more than one FTDI
+device connected to the host, chances are that the driver connects to the
+wrong USB device. This might be an OEM USB-serial converter and you'll be
+banging your head why there's no proper reading from the JTAG chain. Therefore
+it's strongly recommended to specify the desc=xxx parameter for the cable
+command if the ftd2xx driver is to be used. Set xxx to the product or serial
+number descriptor string that are exhibited by the USB device.
+
+===== detect =====
+
+Detects devices on the chain. Example:
+
+ jtag> detect
+ IR length: 5
+ Chain length: 1
+ Device Id: 01011001001001100100000000010011
+ Manufacturer: Intel
+ Part: PXA250
+ Stepping: C0
+ Filename: /usr/local/share/jtag/intel/pxa250/pxa250c0
+
+During "detect", UrJTAG searches through the files in its database (usually in
+/usr/share/urjtag) and optionally in the search path for BSDL files (see bsdl
+command) to find a match for the manufacturer, revision and part number for the
+IDCODE read from the part. However, not all parts identify themselves in a way
+that is useful for "detect". For example, many chips with an ARM processor core
+inside present an IDCODE that may be specific to the the particular core inside
+the chip (e.g. ARM7TDMI), but doesn't tell about the actual manufacturer of
+the chip. In such case, the data for the part has to be included manually. See
+also the documentation for the "include" command.
+
+===== print =====
+
+Print a list of parts in the chain and the currently active instruction per part.
+Further details of bus, signals and instructions can be obtained with dedicated
+command options, see "help print".
+
+===== initbus =====
+
+Selects and initializes a bus of the currently selected part, e.g. the external
+memory bus of a CPU. This is required in order to access chips that aren't
+connected in the JTAG chain, but indirectly accessible through other chips
+(e.g. CPU or programmable logic).
+
+Type "help initbus" to get a list of supported bus types.
+If you do not find a bus driver for your specific hardware, you might be lucky
+enough to have EJTAG in your target (most MIPS-based CPUs do) and should try
+the "ejtag" bus driver. In contrast to the method "via BSR", it uploads some
+instructions to the CPU and triggers their execution to access the bus, and
+should work with almost any EJTAG-capable chip (Note: JTAG isn't EJTAG):
+
+ jtag> initbus ejtag
+
+There's another option to support new chips "via BSR", the "prototype" bus
+driver, which can be adapted to support your part with command parameters.
+The only prerequisite for using this driver is knowledge of the names of the
+signals that represent address bus, data bus, and enable signals, and that
+address and data lines are numbered in order.
+
+For example, assume the signals are named in the BSDL description as follows:
+
+ * Data bus: D0, D1, ... D31
+ * Address bus: ADDR0, ADDR1, ... ADDR22
+ * Output Enable: nOE
+ * Write Enable: nWE
+ * Chip Select: nRCS0
+
+The enable signals seem to be active low (indicated by the leading "n" in their
+names). Further we assume the interesting connected part, some flash chip, is
+only 16 bits wide even though the data bus width is 32 bits. With this
+information, you could use the following command (all on a single line!) to
+access the bus:
+
+ initbus prototype amsb=ADDR22 alsb=ADDR0 dmsb=D15 dlsb=D0
+ ncs=nRCS0 nwe=nWE noe=nOE amode=x16
+
+The "prototype" bus driver cannot deal with systems where address and data
+bus are multiplexed on the same pins. If signals aren't numbered in the right
+order or with gaps, you may get along by defining proper names as aliases for
+the actual signals, with commands like "salias ADDR12 BSCGX44".
+
+Most drivers work "via BSR", i.e. they directly access the pins of the device.
+Because it isn't possible to efficiently address only particular pins but only
+all at once, and data for all pins has to be transferred through JTAG for every
+single change, this method isn't the fastest, but usually easiest to implement
+and, well, sometimes it counts whether it works at all.
+
+The "fjmem" (FPGA JTAG memory) bus driver attempts to address this issue by
+moving control and observation away from BSR to a device-internal
+register. For sure this is only possible on FPGAs where the designer can hook
+additional logic to the JTAG chain. A core design plus examples for different
+FPGA families is available in the extra/fjmem directory. Refer to the README
+located there.
+
+Some chips don't allow direct access to their pins via BSR at all. For these,
+writing a new bus driver that utilizes a debug module to upload specific code
+to access the bus is inevitable.
+
+===== bus =====
+
+It's possible to initialize more than one bus for part(s) within a chain. The
+"bus" command allows to select the active bus for readmem, flashmem,
+etc. operation.
+
+==== Part definition commands ====
+
+The following commands are also used in the data files to define a device (IC)
+on the JTAG chain. It is not recommended to use these commands in an interactive
+session. Instead you should produce a device definition file out of a .bsd file
+using one of the supplied tools (or use the new BSDL subsystem, see below).
+
+*bit*:: define new BSR bit
+*instruction*:: change active instruction for a part or declare new instruction
+*register*:: define new data register for a part
+*signal*:: define new signal for a part
+
+==== TAP control ====
+
+The following commands can be used to directly manipulate and display the state
+of the TAP controller(s) and registers in the chain:
+
+*dr*:: display or set active data register for a part
+*instruction*:: change active instruction for a part or declare new instruction
+*get*:: get external signal value
+*pod*:: low level direct access to POD signals like TRST; use with care
+*scan*:: detect changes on input pins of current part
+*set*:: set external signal value
+*shift*:: shift data/instruction registers through JTAG chain
+
+==== RAM/Flash access ====
+
+These commands can be used if a part in the chain has memory connected to it
+(or integrated). Before they can be used, a bus driver has to be selected and
+initialized (see initbus command).
+
+*detectflash*:: detect parameters of flash chips attached to a part
+*endian*:: set/print endianess for reading/writing binary files
+*eraseflash*:: erase flash memory by number of blocks
+*flashmem*:: burn flash memory with data from a file
+*peek*:: read a single word
+*poke*:: write a single word
+*readmem*:: read content of the memory and write it to file
+*writemem*:: write content from file to memory
+
+==== Highlevel commands ====
+
+===== svf =====
+
+The SVF player operates on a single part in the scan chain. Therefore, you
+have to bring up the JTAG software, specify a cable and detect the scan
+chain beforehand.
+
+The player will establish a new instruction called "SIR" and a new register
+called "SDR". They are used internally by the respective SVF commands and are
+reassigned with new values as the player advances through the file. It is not
+recommended to use them outside of the SVF player as their content is dynamic.
+
+An example session:
+
+ jtag> cable ppdev /dev/parport0 DLC5
+ Initializing Xilinx DLC5 JTAG Parallel Cable III on ppdev port /dev/parport0
+ jtag> detect
+ IR length: 5
+ Chain length: 1
+ Device Id: 10010000101000100000000010010011
+ Manufacturer: Xilinx
+ Part: XC2S300E-PQ208
+ Stepping: 9
+ Filename: /usr/local/share/jtag/xilinx/xc2s300e-pq208/xc2s300e-pq208
+ jtag> part <desired part of the scan chain>
+ jtag> svf <SVF file for selected part>
+ jtag> instruction BYPASS
+ jtag> shift ir
+ jtag> part <next part>
+ jtag> svf <SVF file for selected part>
+ jtag> instruction BYPASS
+ jtag> shift ir
+
+It is recommended to set the part's instruction register to BYPASS although
+most SVF files do this at the end. By setting the instruction explicitely to
+BYPASS the output of the print command will always show meaningful
+information.
+
+The SVF player will issue messages when situations arise that cannot be
+handled. These messages are classified as warnings or errors depending on
+whether the player can continue operation (warning) or not (error).
+In case the TDO parameter of an SDR command leads to a mismatch the player
+issues a warning and continues. If the player should abort in this case then
+specify 'stop' at the svf command.
+
+The absence of error or warning messages indicate that the SVF file was
+executed without problems. To get a progress reporting while the player advances
+through the SVF file, specify 'progress' at the svf command.
+
+.Limitations and Deficiencies
+*****************************
+Several limitations exist for the SVF player.
+
+The implementation of some SVF commands has deficiencies.
+
+ - HIR, HDR commands not supported. +
+ Their functionality should be covered by the part concept of UrJTAG.
+ - PIO command not supported.
+ - PIOMAP command not supported.
+ - RUNTEST SCK not supported. +
+ The maximum time constraint is not guaranteed.
+ - TRST +
+ Parameters Z and ABSENT are not supported.
+ - TIR, TDR commands not supported. +
+ Their functionality should be covered by the part concept of UrJTAG.
+
+SVF files for programming flash-based devices might or might not work for a given
+setup. This has been observed for Actel IGLOO devices where success and failure
+depends on the actual clocking rate of the chosen cable.
+
+The ref_freq=<...> option to the svf command allows to tweak the calculation
+of 'RUNTEST xxx SEC' commands. For these commands, the SVF player needs to
+calculate the equivalent number of clocks and per default it will use the
+current cable clock frequency. This can be overridden with the ref_freq option
+that specifies a fixed reference frequency for such calculations.
+*****************************
+
+===== bsdl =====
+
+The 'bsdl' command is used to set up and test the underlying BSDL subsystem of
+UrJTAG.
+
+Whenever 'detect' encounters a new part, a configuration process is
+started. This involves matching the retrieved IDCODE against the part
+descriptions in /usr/share/urjtag as described above. However, before this
+database is searched for a suitable description, the BSDL subsystem is started
+and searches for a BSDL file that matches this device. If it finds a matching
+file, traversal of the /usr/share/urjtag database is skipped. If not, then
+this standard process follows.
+
+To tell the BSDL subsytem where to look for BSDL files, the 'bsdl path
+pathlist' command has to be issued prior to 'detect'. The contents of
+'pathlist' must be a semicolon-separated list of directories where BSDL files
+are located. This list is stored by 'bsdl path' and is used later on when
+'detect' calls the BSDL subsystem.
+
+IMPORTANT: The BSDL subsystem applies the first BSDL file that parses without
+errors and that contains the correct IDCODE. Scanning the specified
+directories happens in exactly the given order. Inside a directory however,
+the order depends largely on your filesystem's behavior.
+
+Further details of the 'bsdl' command:
+
+ - bsdl path <path1>[;<path2>[;<pathN>]] +
+ set paths for locating BSDL files
+ - bsdl debug on|off +
+ switches debug messages on or off
+ - bsdl test [file] +
+ reads file (if specified) or all files found via 'bsdl path' and
+ prints a short status, an active part is not required
+ - bsdl dump [file] +
+ reads file (if specified) or all files found via 'bsdl path' and
+ prints all configuration commands, an active part is not required
+
+TIP: The 'bsdl dump file' command implements the same functionality as
+bsdl2jtag.
+
+==== Unsupported commands ====
+
+===== script =====
+
+Although it's still there, its functionality has been merged into the include
+command. Please use "include" instead.
+
+===== setdevice =====
+
+This command was only there to support the SHARC 21065L processor,
+which has no IDCODE and therefore can't be initialized correctly by
+just running "detect". However, the proper initialization can be done
+after "detect" by loading the proper declarations and bus driver manually:
+
+ jtag> include analog/sharc21065l/sharc21065l
+
+===== spiflashmem =====
+
+The commands "spidetectflash", "spiflashmem", "spireadflash" and
+"spieraseflash" only exist in a version of the JTAG tools copyrighted by
+Intratrade Ltd., we just know about them from a posting on the net.
+
+//========================================================================
+
+== Internals ==
+
+This section is only a placeholder for the information that will
+be added soon...
+
+=== Files ===
+
+==== Source code Overview ====
+
+doc/:: Documentation
+
+data/:: Part descriptions (data files)
+
+include/:: C header files
+
+src/:: C source code
+
+src/bsdl:: BSDL subsystem
+src/bus:: Bus driver for various CPUs and other parts
+src/cmd:: Implementation of the commands for the "jtag" shell
+src/flash:: Flash detection and programming algorithms
+src/jim:: JIM, the JTAG target simulator
+src/lib:: Utility functions
+src/part:: Functions for accessing specific parts in a chain
+src/svf:: SVF player
+src/tap:: Functions for accessing the chain in general
+
+//------------------------------------------------------------------------
+
+=== Drivers ===
+
+ * Cable drivers
+ * Link drivers
+ * TAP drivers
+ * Chain drivers
+ * Bus drivers
+ * Flash drivers
+ * Commands
+
+==== Cable-specific drivers (src/tap/cable) ====
+
+Cable-specific drivers are those which are visible to the user through
+the "jtag" command shell. They're listed in response to the "help cable"
+command. Each driver has to provide the following functions:
+
+ * connect(), init() - Initialization
+ * done(), cable_free(), disconnect() - Cleaning up
+ * set_frequency() - set bitrate for shifting data through the chain
+ * clock(), get_tdo(), transfer() - immediate JTAG activities
+ * flush() - internally used to actually perform JTAG activities
+ * help() - a help text to be displayed by the jtag command shell
+
+===== Initialization =====
+
+After allocating a "cable_t" structure, a pointer to it and further
+parameters (as strings) have to be passed first to the selected cable's
+connect() function.
+
+Following that, the init() function is called via cable_init(). If cable_init()
+returns a zero value, all is fine and the cable is ready for use.
+
+===== Cleaning up =====
+
+There are two functions for actual cleanup:
+
+ * done() is responsible for driving the hardware to a safe and consistent state.
+ * cable_free() then can be used to clean up eventually extra allocated memory etc.
+
+Both are usually called from chain_disconnect().
+
+An additional mechanism allows to clean up if a disconnection was detected by
+the low level driver (e.g. USB or parallel port driver). A cable has to provide
+a disconnect() function for this purpose:
+
+ 1. Low level (e.g. parport) driver calls cable driver->disconnect()
+ 2. cable driver->disconnect() calls chain_disconnect()
+ 3. chain_disconnect() calls cable driver->done()
+ 4. chain_disconnect() then calls cable driver->cable_free()
+
+After return from chain_disconnect() to cable driver->disconnect(), the cable_t
+structure has been freed and must not be accessed anymore.
+
+===== JTAG Activities =====
+
+Currently the API provides five different functions for performing operations
+at the JTAG interface on the low level signal level (using the four signals
+TMS, TCK, TDI, and TDO).
+
+ * clock(tms,tdi,n) takes values for TMS and TDI output as its parameters, ensures that actual cable signals are set accordingly, and does a 0-1 transition on TCK (n times)
+ * get_tdo() returns the current value at the TDO input.
+ * set_trst(x) sets the TRST signal and returns the current value.
+ * get_trst() returns the current value of the TRST signal.
+
+For many JTAG adapters, there's almost no delay when doing alternating clock()
+and get_tdo(). Writing and reading happens immediately and the result is
+available immediately as well. This is the case with most parallel port
+adapters (but not when attached to USB-to-parallel adapters or USB docking
+stations) and memory mapped IO (e.g. general purpose I/O pins of
+microcontrollers).
+
+But there are adapters, especially USB and Ethernet based adapters, which
+exhibit a rather long delay between the initiation of reading a bit and the
+delivery of the value of the bit. It is at least 1 millisecond with USB,
+which would limit the transfer rate to 1 kHz. One way to workaround this
+is to transmit bits compacted into bytes and chunks of bytes, which is
+possible with the transfer() function.
+
+ * transfer(in, out)
+
+The transfer() function does a series of TCK pulses, with data for TDI read as
+bytes from memory. The bytes are automatically serialized. TMS is set to zero
+during transfer()s. Optionally, prior to each bit shifted out to the interface,
+TDO input can be read into memory (deserialized into a byte array of the same
+size as the input array).
+
+It still doesn't yield much improvement if the operation consists of many read
+and write transitions (e.g. repeatedly writing an instruction and some data
+register values, then reading from the data register, as it is necessary for
+memory access). For that reason, the above functions are also available in
+variants that don't cause immediate activity, but rather schedule it for later.
+In the API, they're visible as
+
+ * cable_defer_clock()
+ * cable_defer_get_tdo()
+ * cable_defer_set_trst()
+ * cable_defer_get_trst()
+ * cable_defer_transfer()
+
+These functions aren't implemented in the cable driver (but currently in
+src/tap/cable.c). The cable driver just has to provide a flush() function to
+actually execute the queued activity in some cable-specific optimal way, and
+to store the results of get_tdo() and transfer() activity. The caller later
+can pick up the results using these functions (implemented in cable.c):
+
+ * cable_get_tdo_late()
+ * cable_get_trst_late()
+ * cable_transfer_late()
+
+As an example, consider the following sequence of activities:
+
+ 1. clock()
+ 2. get_tdo()
+ 3. clock()
+ 4. get_tdo()
+
+If the result of the first get_tdo() isn't absolutely required before the
+second clock(), the sequence can be optimized into the following sequence (if
+
+ 1. defer_clock()
+ 2. defer_clock()
+ 3. flush()
+ 4. get_tdo_late()
+ 5. get_tdo_late()
+
+The next sections explain the queueing mechanism and its limits in detail.
+
+===== When flushing occurs =====
+
+The cable_flush() function is used to flush the queue towards the cable. It
+takes one additional argument, "how_much", which may be one of
+
+ * OPTIONALLY: The cable driver may flush if it's reasonable (e.g. if the
+ queue has been filled so that some buffer limit for the cable interface
+ is reached). It would be wise to flush early to keep the queue small, if
+ there is no point in queueing up more items because the transfer to the
+ cable would have to be split into smaller chunks anyway. This is used by
+ UrJTAG immediately after adding items to the queue.
+
+ * TO_OUTPUT: The cable driver should at least flush as much so that one
+ output becomes available in the output queue. If there's already something
+ in the output queue, this should be interpreted similar to OPTIONALLY. This
+ is used by UrJTAG immediately before it wants to use that output.
+
+ * COMPLETELY: The cable driver has to flush the queue completely. This is
+ used by UrJTAG immediately before actions that circumvent the queueing
+ such as calls to the legacy clock/get_tdo functions. It could also be
+ used by application code to ensure that some action is actually done in
+ time.
+
+===== JTAG activity queueing =====
+
+The source in src/tap/cable.c provides to important functions to access the
+two queues "todo" (with activity to be done) and "done" (with results):
+
+ * cable_add_queue_item
+ * cable_get_queue_item
+
+In src/tap/cable/generic.c you'll find two implementations of dequeueing
+algorithms, i.e. implementations of the flush() function. These could be used
+by any new cable driver unless it provides a more sophisticated algorithm
+itself:
+
+ * generic_flush_one_by_one() simply calls the "classic" functions one after
+ another. The performance of the cable driver using this implementation will
+ be the same whether the immediate or defer variants of the functions are used.
+ * generic_flush_using_transfer() tries to optimize as many clock() and
+ get_tdo() by transforming them into calls to transfer() instead. This can
+ give a slight advantage.
+
+The generic implementations also serve as a template for new cable-specific
+implementations.
+
+===== Generic implementations =====
+
+As a reference and in many cases completely sufficient for new cables, take a
+look at the code in src/tap/cable/generic.c, which contains generic routines,
+suitable for parallel port based cables (and some for other types of cables as
+well).
+
+==== Link drivers ====
+
+Link drivers like the "parport" driver collection provide the basis for
+communication between cable driver and actual JTAG adapter. The openwince JTAG
+tools supported only parallel port links with the "parport" drivers. UrJTAG
+introduced support for USB links, but in the early releases the drivers for
+these just mimic the parallel port links.
+
+The basic functions provided by all link drivers are
+
+ * connect(), to called from cable driver connect()
+ * open(), to actually connect to the device during cable driver init()
+ * close(), to disconnect from the device during cable driver done()
+ * free(), to free all resources, called from cable driver free()
+
+===== parport =====
+
+Currently there are parport drivers for direct access to the parallel port on a
+PC using I/O addresses (direct.c), and for using ppdev on Linux or ppi on FreeBSD.
+
+In addition, there are "ftdi" and "ftd2xx" parport drivers that actually are for
+communication with USB cables based on FTDI chips. They cannot be used for
+connecting old parallel port cables through parallel to USB adapters with FTDI
+chips, and probably soon will be rewritten as "usbconn" drivers instead.
+
+All parport drivers present a common API for setting and reading signals.
+
+===== usbconn =====
+
+The usbconn drivers provide a common API to search for and connect with USB
+devices. At the moment, there are drivers for libusd, libftdi and FTD2XX
+(e.g. to communicate with FTDI chip based cables through libftdi and/or
+FTD2XX, to communicate with Cypress FX2 using EZUSB.SYS or CyUSB.sys, and
+more).
+
+/////////////////////////////////////////////////////////////////////////////
+arniml, 18-may-2008: Obsolete?
+In contrast to the parport API, the usbconn drivers provide only the functions
+for connecting, disconnecting, and for releasing ressources. The actual
+communication must be implemented using the underlying library's functions,
+e.g. usb_write from libusb, or ftdi_write from libftdi. Therefore, each driver
+using usbconn usually only works together with one particular usbconn driver.
+/////////////////////////////////////////////////////////////////////////////
+
+==== Bus drivers ====
+
+Bus drivers translate read and write operations on a bus into JTAG commands
+and methods. A bus in this context is neither restricted to a processor bus,
+nor to memory. Any system component that can be read from and written to could
+be seen as attached to a bus. I.e. external or internal memory (RAM, ROM,
+Flash) and peripherals connected to a processor or simply an FPGA with 1:1
+connections.
+
+The available bus drivers are listed in response to "help initbus". Each
+driver has to provide the following functions:
+
+ * bus_new() - Initialization
+ * bus_free() - Cleaning up
+ * bus_printinfo() - Short description
+ * bus_prepare() - Preparation
+ * bus_area() - Description of the bus geometry
+ * bus_read_start() - Initiate reading
+ * bus_read_next() - Read access
+ * bus_read_end() - Finish reading
+ * bus_read() - Atomic reading
+ * bus_write() - Write access
+
+IMPORTANT: Address parameters to the functions listed above specify always
+byte locations, independent of the actual data width. The bus driver has to
+adjust the address on its own if required.
+
+===== Creation =====
+
+Upon calling of its bus_new() function, the driver allocates a "bus_t"
+structure and performs all required internal initializations.
+
+===== Initialization =====
+
+After creation of the new "bus_t" structure, the bus_init() function will
+be called to give the driver the possibility to initialize it's internal
+states or BSR bits as required. Such functionality has been split from
+bus_new() since some drivers require to re-initialize during runtime.
+
+===== Cleaning up =====
+
+The driver is supposed to free all allocated memory (including its "bus_t"
+structure). Additionally, it should set the device into a state that doesn't
+prevent it from normal operation.
+
+===== Short description =====
+
+Prints a message describing the driver. This function is called by the "print"
+command before it lists the areas covered by this bus driver.
+
+===== Preparation =====
+
+This function is called whenever a bus operation is initiated. The
+driver should perform the required preparation steps so that
+subsequent calls to the bus_read_* and bus_write functions can perform
+their tasks properly.
+
+E.g. a BSR bus driver would put the device into EXTEST mode to activate the
+boundary scan register on the device pins.
+
+===== Description of the bus geometry =====
+
+At certain stages, the bus driver's bus_area() function is called by other
+commands to query the bus geometry for a given address. The bus driver must
+fill in the fields of a "bus_area_t" structure describing the geometry of the
+area in which the specified address is located:
+
+ * a short textual description of the area
+ * start address of area
+ * length of area in bytes
+ * data width in bits
+
+Queries with an address out of range must result in an area length of
+
+ UINT64_C(0x100000000)
+
+===== Initiate reading =====
+
+Since the JTAG state machine defines a capture-shift-update sequence, it is
+required to shift the address for a read prior to capturing the read
+data. Therefore, the bus_read_start() function is called with the very first
+address to read from. This enables the driver to shift the address into the
+device before it can actually retrieve the read data for this address.
+
+===== Read access =====
+
+The bus_read_next() function fetches the read data from the device that has
+been addressed by a previous call to bus_read_start() or
+bus_read_next(). Again, this is due to the capture-shift-update sequence of
+JTAG:
+
+ 1. capture read data from device pins
+ 2. shift new address
+ 3. update new address to device pins
+
+IMPORTANT: The address parameter specifies the location of the 'following'
+read access. It is not the address of the data returned by this function call.
+
+===== Finish reading =====
+
+Function "bus_read_end()" is called at the end of a read sequence. I.e. when
+the higher level command determines that the last data portion is to be read
+from the device. There is no new address and the function driver is supposed
+to return the read data that was addressed previously.
+
+===== Atomic reading =====
+
+For ease of use, a bus driver has to supply a "bus_read()" function that
+encapsulates reading data from a single address in an atomic operation. Bus
+drivers typically build this function from "bus_read_start()" and a subsequent
+"bus_read_end()".
+
+===== Write access =====
+
+This function writes one data element at the specified address. Since this
+translates to a single JTAG operation (capture ignored, shift and update
+address & data), there is no splitting as with the read functions.
+
+=== Data file format ===
+// By Marcel Telka
+
+JTAG declarations files are located in directory "data". The files contains
+common part specific JTAG information in parseable form, e.g. list of the JTAG
+commands, boundary scan register, list of JTAG registers, etc.
+
+Syntax of the JTAG declaration file is defined in the following subsections.
+
+==== General rules ====
+
+JTAG declaration file is text file which consists of lines. Empty lines are
+ignored. Text after first "#" on the line to the end of line is ignored. This
+is useful for comments. All other lines are significant.
+
+Each significant line consists of tokens separated by whitespace. Whitespace
+could be spaces and/or tabs.
+
+==== Signal Definition ====
+
+Signal definition line consists of word "signal" followed by whitespace and
+signal name (without spaces in the name). Rest of the line should contain
+whitespace separated list of pins of the part. This list is currently not used
+for any purpose in JTAG Tools. It is intended for future use.
+
+
+//------------------------------------------------------------------------
+
+=== Development ===
+
+==== Future Plans ====
+
+- C API and library package
+- Bindings for Python, Perl, ...
+- TCP/IP access
+- New cable drivers
+- ...
+
+==== How to contribute ====
+
+ * Using Subversion
+ * Create and submit a patch
+ * Use SourceForge trackers
+
+//========================================================================
+
+== F.A.Q. ==
+
+For a list of known problems in current versions, please also check the "Bugs"
+tracker at the UrJTAG website!
+
+Q. The documentation is incomplete. Where can I get more information?::
+ A. Please ask in the "Using UrJTAG" Forum on http://urjtag.org[]
+
+Q. My flash isn't detected or can't be programmed. What can I do?::
+ A. Please record the output of the "detect" and "detectflash" commands and ask in the Forum. If possible, re-compile UrJTAG before with "--enable-jedec-exp" to get extra information.
+
+Q. My CPU/FPGA/etc. chip isn't detected. What can I do?::
+ A. First try to get hold of a "BSDL" description of the chip from the vendor, and specify where to find this file to UrJTAG using "bsdl path" before you "detect". Second, a bus driver has to be selected. Maybe "ejtag" or "prototype" work.
+
+Q. When I type "cable parallel 0x378 DLC5" (in a Cygwin environment) I get "Unknown port driver: parallel"?::
+ A. Please install the Cygwin ioperm package, and re-configure/compile.
+
+Q. When I type "cable parallel 0x378 DLC5" (in a Cygwin environment) I get "Error: Cable initialization failed!".::
+ A. Please install ioperm.sys driver using `ioperm -i` command.
+
+Q. When running autogen.sh, I get "Can't exec "autopoint": No such file or directory"::
+ A. You need the headers for gettext (e.g. Debian package "gettext-devel").
+
+Q. When running autogen.sh, it complains about missing CVS::
+ A. The easiest solution is to actually install CVS for this step, just to get around this error message.
+
+Q. During compilation, I get "svf_bison.y: No such file or directory"::
+ A. You need "bison".
+
+Q. During compilation, I get "flex: can't open ... src/svf/svf_flex.l"::
+ A. You need "flex"
+
+Q. During compilation, I get "src/svf/svf_flex.l", line 27: unrecognized %option: bison-locations"::
+ A. You need a newer version of flex. It should be 2.5.31 or newer;
+ Unfortunately, Cygwin comes with only 2.5.4a. You may try to compile and
+ install a newer version of flex from source to solve this. The distributed
+ source tarball contains source pregenerated with a current flex version,
+ you need flex yourself only to compile from fresh SVN checkouts.
+
+Q. When running "make install", I get "Permission denied" errors::
+ A. If you want to install into a system directory (the default /usr/local is one), you'll have to run "make install" as the superuser, e.g. do "sudo make install".
+
+Q. My BSDL file defines the bus DAT as bit_vector(15 downto 0), how should I access single elements?::
+ A. BSDL syntax is an extension of the VHDL language. Array elements are indexed with
+ parentheses: DAT(4) selects index number 4 of the DAT vector. Also refer to the "print
+ signals" command.
+
+Q. My board requires certain signals to be set to dedicated values before external memories can be accessed.::
+ A. Most (if not all) BSR-based bus drivers allow for static configurations of
+ pins that are controlled by BSR bits. Apply the required "set" commands before
+ issueing the "initbus ..." command. These settings are preserved by all bus
+ related commands if they don't collide with the signals required for bus operation.
+
+Q. My USB pod seems slow.::
+ A. USB-based JTAG pods suffer from a couple of intrinsic issues. Consider the
+ following to get maximum performance:
+ * Run UrJTAG on native linux. Cygwin and VMWare are reportedly slower.
+ * Connect the pod via a high speed USB hub to a high speed USB host port.
+ Even though the pod is a full speed device, it benefits from the shorter
+ turn-around times between host and hub.
+
+//========================================================================
+
+== Licensing ==
+
+=== Overview ===
+
+Various licenses are used for the UrJTAG project. The GPL is used for most
+of the code except for some include files, JIM, and cable driver source, where
+a BSD or MIT license is used; this is noted in the file headers.
+
+=== GNU Free Documentation License (FDL) ===
+.........................................
+include::fdl.txt[]
+.........................................
+=== GNU General Public License (GPL) ===
+.........................................
+include::gpl.txt[]
+.........................................
+
--- /dev/null
+.TH bsdl2jtag 1 "April 7, 2009" UrJTAG
+.SH NAME
+bsdl2jtag \- UrJTAG declaration file conversion
+.SH SYNOPSIS
+.B bsdl2jtag
+.I bsdlfile
+.I jtagfile
+.SH DESCRIPTION
+.B bsdl2jtag
+converts BSDL files to JTAG files which can be used by
+.BR jtag (1).
+.B bsdl2jtag
+reads from
+.I bsdlfile
+and produces its output in the file
+.IR jtagfile .
+.SH OPTIONS
+None.
+.SH BUGS
+Bugs are tracked at the project homepage, http://www.urjtag.org
+.SH "SEE ALSO"
+.BR jtag (1)
+.SH AUTHORS
+Authors and contributors are listed in the AUTHORS and THANKS files in
+the source documentation.
+.SH HISTORY
+JTAG Tools originally have been developed as part of the openwince project by
+Marcel Telka. They became an independent project named UrJTAG in late 2007.
+
--- /dev/null
+ GNU Free Documentation License
+ Version 1.2, November 2002
+
+
+ Copyright (C) 2000,2001,2002 Free Software Foundation, Inc.
+ 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ Everyone is permitted to copy and distribute verbatim copies
+ of this license document, but changing it is not allowed.
+
+
+0. PREAMBLE
+
+The purpose of this License is to make a manual, textbook, or other
+functional and useful document "free" in the sense of freedom: to
+assure everyone the effective freedom to copy and redistribute it,
+with or without modifying it, either commercially or noncommercially.
+Secondarily, this License preserves for the author and publisher a way
+to get credit for their work, while not being considered responsible
+for modifications made by others.
+
+This License is a kind of "copyleft", which means that derivative
+works of the document must themselves be free in the same sense. It
+complements the GNU General Public License, which is a copyleft
+license designed for free software.
+
+We have designed this License in order to use it for manuals for free
+software, because free software needs free documentation: a free
+program should come with manuals providing the same freedoms that the
+software does. But this License is not limited to software manuals;
+it can be used for any textual work, regardless of subject matter or
+whether it is published as a printed book. We recommend this License
+principally for works whose purpose is instruction or reference.
+
+
+1. APPLICABILITY AND DEFINITIONS
+
+This License applies to any manual or other work, in any medium, that
+contains a notice placed by the copyright holder saying it can be
+distributed under the terms of this License. Such a notice grants a
+world-wide, royalty-free license, unlimited in duration, to use that
+work under the conditions stated herein. The "Document", below,
+refers to any such manual or work. Any member of the public is a
+licensee, and is addressed as "you". You accept the license if you
+copy, modify or distribute the work in a way requiring permission
+under copyright law.
+
+A "Modified Version" of the Document means any work containing the
+Document or a portion of it, either copied verbatim, or with
+modifications and/or translated into another language.
+
+A "Secondary Section" is a named appendix or a front-matter section of
+the Document that deals exclusively with the relationship of the
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+them.
+
+The "Invariant Sections" are certain Secondary Sections whose titles
+are designated, as being those of Invariant Sections, in the notice
+that says that the Document is released under this License. If a
+section does not fit the above definition of Secondary then it is not
+allowed to be designated as Invariant. The Document may contain zero
+Invariant Sections. If the Document does not identify any Invariant
+Sections then there are none.
+
+The "Cover Texts" are certain short passages of text that are listed,
+as Front-Cover Texts or Back-Cover Texts, in the notice that says that
+the Document is released under this License. A Front-Cover Text may
+be at most 5 words, and a Back-Cover Text may be at most 25 words.
+
+A "Transparent" copy of the Document means a machine-readable copy,
+represented in a format whose specification is available to the
+general public, that is suitable for revising the document
+straightforwardly with generic text editors or (for images composed of
+pixels) generic paint programs or (for drawings) some widely available
+drawing editor, and that is suitable for input to text formatters or
+for automatic translation to a variety of formats suitable for input
+to text formatters. A copy made in an otherwise Transparent file
+format whose markup, or absence of markup, has been arranged to thwart
+or discourage subsequent modification by readers is not Transparent.
+An image format is not Transparent if used for any substantial amount
+of text. A copy that is not "Transparent" is called "Opaque".
+
+Examples of suitable formats for Transparent copies include plain
+ASCII without markup, Texinfo input format, LaTeX input format, SGML
+or XML using a publicly available DTD, and standard-conforming simple
+HTML, PostScript or PDF designed for human modification. Examples of
+transparent image formats include PNG, XCF and JPG. Opaque formats
+include proprietary formats that can be read and edited only by
+proprietary word processors, SGML or XML for which the DTD and/or
+processing tools are not generally available, and the
+machine-generated HTML, PostScript or PDF produced by some word
+processors for output purposes only.
+
+The "Title Page" means, for a printed book, the title page itself,
+plus such following pages as are needed to hold, legibly, the material
+this License requires to appear in the title page. For works in
+formats which do not have any title page as such, "Title Page" means
+the text near the most prominent appearance of the work's title,
+preceding the beginning of the body of the text.
+
+A section "Entitled XYZ" means a named subunit of the Document whose
+title either is precisely XYZ or contains XYZ in parentheses following
+text that translates XYZ in another language. (Here XYZ stands for a
+specific section name mentioned below, such as "Acknowledgements",
+"Dedications", "Endorsements", or "History".) To "Preserve the Title"
+of such a section when you modify the Document means that it remains a
+section "Entitled XYZ" according to this definition.
+
+The Document may include Warranty Disclaimers next to the notice which
+states that this License applies to the Document. These Warranty
+Disclaimers are considered to be included by reference in this
+License, but only as regards disclaiming warranties: any other
+implication that these Warranty Disclaimers may have is void and has
+no effect on the meaning of this License.
+
+
+2. VERBATIM COPYING
+
+You may copy and distribute the Document in any medium, either
+commercially or noncommercially, provided that this License, the
+copyright notices, and the license notice saying this License applies
+to the Document are reproduced in all copies, and that you add no other
+conditions whatsoever to those of this License. You may not use
+technical measures to obstruct or control the reading or further
+copying of the copies you make or distribute. However, you may accept
+compensation in exchange for copies. If you distribute a large enough
+number of copies you must also follow the conditions in section 3.
+
+You may also lend copies, under the same conditions stated above, and
+you may publicly display copies.
+
+
+3. COPYING IN QUANTITY
+
+If you publish printed copies (or copies in media that commonly have
+printed covers) of the Document, numbering more than 100, and the
+Document's license notice requires Cover Texts, you must enclose the
+copies in covers that carry, clearly and legibly, all these Cover
+Texts: Front-Cover Texts on the front cover, and Back-Cover Texts on
+the back cover. Both covers must also clearly and legibly identify
+you as the publisher of these copies. The front cover must present
+the full title with all words of the title equally prominent and
+visible. You may add other material on the covers in addition.
+Copying with changes limited to the covers, as long as they preserve
+the title of the Document and satisfy these conditions, can be treated
+as verbatim copying in other respects.
+
+If the required texts for either cover are too voluminous to fit
+legibly, you should put the first ones listed (as many as fit
+reasonably) on the actual cover, and continue the rest onto adjacent
+pages.
+
+If you publish or distribute Opaque copies of the Document numbering
+more than 100, you must either include a machine-readable Transparent
+copy along with each Opaque copy, or state in or with each Opaque copy
+a computer-network location from which the general network-using
+public has access to download using public-standard network protocols
+a complete Transparent copy of the Document, free of added material.
+If you use the latter option, you must take reasonably prudent steps,
+when you begin distribution of Opaque copies in quantity, to ensure
+that this Transparent copy will remain thus accessible at the stated
+location until at least one year after the last time you distribute an
+Opaque copy (directly or through your agents or retailers) of that
+edition to the public.
+
+It is requested, but not required, that you contact the authors of the
+Document well before redistributing any large number of copies, to give
+them a chance to provide you with an updated version of the Document.
+
+
+4. MODIFICATIONS
+
+You may copy and distribute a Modified Version of the Document under
+the conditions of sections 2 and 3 above, provided that you release
+the Modified Version under precisely this License, with the Modified
+Version filling the role of the Document, thus licensing distribution
+and modification of the Modified Version to whoever possesses a copy
+of it. In addition, you must do these things in the Modified Version:
+
+A. Use in the Title Page (and on the covers, if any) a title distinct
+ from that of the Document, and from those of previous versions
+ (which should, if there were any, be listed in the History section
+ of the Document). You may use the same title as a previous version
+ if the original publisher of that version gives permission.
+B. List on the Title Page, as authors, one or more persons or entities
+ responsible for authorship of the modifications in the Modified
+ Version, together with at least five of the principal authors of the
+ Document (all of its principal authors, if it has fewer than five),
+ unless they release you from this requirement.
+C. State on the Title page the name of the publisher of the
+ Modified Version, as the publisher.
+D. Preserve all the copyright notices of the Document.
+E. Add an appropriate copyright notice for your modifications
+ adjacent to the other copyright notices.
+F. Include, immediately after the copyright notices, a license notice
+ giving the public permission to use the Modified Version under the
+ terms of this License, in the form shown in the Addendum below.
+G. Preserve in that license notice the full lists of Invariant Sections
+ and required Cover Texts given in the Document's license notice.
+H. Include an unaltered copy of this License.
+I. Preserve the section Entitled "History", Preserve its Title, and add
+ to it an item stating at least the title, year, new authors, and
+ publisher of the Modified Version as given on the Title Page. If
+ there is no section Entitled "History" in the Document, create one
+ stating the title, year, authors, and publisher of the Document as
+ given on its Title Page, then add an item describing the Modified
+ Version as stated in the previous sentence.
+J. Preserve the network location, if any, given in the Document for
+ public access to a Transparent copy of the Document, and likewise
+ the network locations given in the Document for previous versions
+ it was based on. These may be placed in the "History" section.
+ You may omit a network location for a work that was published at
+ least four years before the Document itself, or if the original
+ publisher of the version it refers to gives permission.
+K. For any section Entitled "Acknowledgements" or "Dedications",
+ Preserve the Title of the section, and preserve in the section all
+ the substance and tone of each of the contributor acknowledgements
+ and/or dedications given therein.
+L. Preserve all the Invariant Sections of the Document,
+ unaltered in their text and in their titles. Section numbers
+ or the equivalent are not considered part of the section titles.
+M. Delete any section Entitled "Endorsements". Such a section
+ may not be included in the Modified Version.
+N. Do not retitle any existing section to be Entitled "Endorsements"
+ or to conflict in title with any Invariant Section.
+O. Preserve any Warranty Disclaimers.
+
+If the Modified Version includes new front-matter sections or
+appendices that qualify as Secondary Sections and contain no material
+copied from the Document, you may at your option designate some or all
+of these sections as invariant. To do this, add their titles to the
+list of Invariant Sections in the Modified Version's license notice.
+These titles must be distinct from any other section titles.
+
+You may add a section Entitled "Endorsements", provided it contains
+nothing but endorsements of your Modified Version by various
+parties--for example, statements of peer review or that the text has
+been approved by an organization as the authoritative definition of a
+standard.
+
+You may add a passage of up to five words as a Front-Cover Text, and a
+passage of up to 25 words as a Back-Cover Text, to the end of the list
+of Cover Texts in the Modified Version. Only one passage of
+Front-Cover Text and one of Back-Cover Text may be added by (or
+through arrangements made by) any one entity. If the Document already
+includes a cover text for the same cover, previously added by you or
+by arrangement made by the same entity you are acting on behalf of,
+you may not add another; but you may replace the old one, on explicit
+permission from the previous publisher that added the old one.
+
+The author(s) and publisher(s) of the Document do not by this License
+give permission to use their names for publicity for or to assert or
+imply endorsement of any Modified Version.
+
+
+5. COMBINING DOCUMENTS
+
+You may combine the Document with other documents released under this
+License, under the terms defined in section 4 above for modified
+versions, provided that you include in the combination all of the
+Invariant Sections of all of the original documents, unmodified, and
+list them all as Invariant Sections of your combined work in its
+license notice, and that you preserve all their Warranty Disclaimers.
+
+The combined work need only contain one copy of this License, and
+multiple identical Invariant Sections may be replaced with a single
+copy. If there are multiple Invariant Sections with the same name but
+different contents, make the title of each such section unique by
+adding at the end of it, in parentheses, the name of the original
+author or publisher of that section if known, or else a unique number.
+Make the same adjustment to the section titles in the list of
+Invariant Sections in the license notice of the combined work.
+
+In the combination, you must combine any sections Entitled "History"
+in the various original documents, forming one section Entitled
+"History"; likewise combine any sections Entitled "Acknowledgements",
+and any sections Entitled "Dedications". You must delete all sections
+Entitled "Endorsements".
+
+
+6. COLLECTIONS OF DOCUMENTS
+
+You may make a collection consisting of the Document and other documents
+released under this License, and replace the individual copies of this
+License in the various documents with a single copy that is included in
+the collection, provided that you follow the rules of this License for
+verbatim copying of each of the documents in all other respects.
+
+You may extract a single document from such a collection, and distribute
+it individually under this License, provided you insert a copy of this
+License into the extracted document, and follow this License in all
+other respects regarding verbatim copying of that document.
+
+
+7. AGGREGATION WITH INDEPENDENT WORKS
+
+A compilation of the Document or its derivatives with other separate
+and independent documents or works, in or on a volume of a storage or
+distribution medium, is called an "aggregate" if the copyright
+resulting from the compilation is not used to limit the legal rights
+of the compilation's users beyond what the individual works permit.
+When the Document is included in an aggregate, this License does not
+apply to the other works in the aggregate which are not themselves
+derivative works of the Document.
+
+If the Cover Text requirement of section 3 is applicable to these
+copies of the Document, then if the Document is less than one half of
+the entire aggregate, the Document's Cover Texts may be placed on
+covers that bracket the Document within the aggregate, or the
+electronic equivalent of covers if the Document is in electronic form.
+Otherwise they must appear on printed covers that bracket the whole
+aggregate.
+
+
+8. TRANSLATION
+
+Translation is considered a kind of modification, so you may
+distribute translations of the Document under the terms of section 4.
+Replacing Invariant Sections with translations requires special
+permission from their copyright holders, but you may include
+translations of some or all Invariant Sections in addition to the
+original versions of these Invariant Sections. You may include a
+translation of this License, and all the license notices in the
+Document, and any Warranty Disclaimers, provided that you also include
+the original English version of this License and the original versions
+of those notices and disclaimers. In case of a disagreement between
+the translation and the original version of this License or a notice
+or disclaimer, the original version will prevail.
+
+If a section in the Document is Entitled "Acknowledgements",
+"Dedications", or "History", the requirement (section 4) to Preserve
+its Title (section 1) will typically require changing the actual
+title.
+
+
+9. TERMINATION
+
+You may not copy, modify, sublicense, or distribute the Document except
+as expressly provided for under this License. Any other attempt to
+copy, modify, sublicense or distribute the Document is void, and will
+automatically terminate your rights under this License. However,
+parties who have received copies, or rights, from you under this
+License will not have their licenses terminated so long as such
+parties remain in full compliance.
+
+
+10. FUTURE REVISIONS OF THIS LICENSE
+
+The Free Software Foundation may publish new, revised versions
+of the GNU Free Documentation License from time to time. Such new
+versions will be similar in spirit to the present version, but may
+differ in detail to address new problems or concerns. See
+http://www.gnu.org/copyleft/.
+
+Each version of the License is given a distinguishing version number.
+If the Document specifies that a particular numbered version of this
+License "or any later version" applies to it, you have the option of
+following the terms and conditions either of that specified version or
+of any later version that has been published (not as a draft) by the
+Free Software Foundation. If the Document does not specify a version
+number of this License, you may choose any version ever published (not
+as a draft) by the Free Software Foundation.
+
+
+ADDENDUM: How to use this License for your documents
+
+To use this License in a document you have written, include a copy of
+the License in the document and put the following copyright and
+license notices just after the title page:
+
+ Copyright (c) YEAR YOUR NAME.
+ Permission is granted to copy, distribute and/or modify this document
+ under the terms of the GNU Free Documentation License, Version 1.2
+ or any later version published by the Free Software Foundation;
+ with no Invariant Sections, no Front-Cover Texts, and no Back-Cover Texts.
+ A copy of the license is included in the section entitled "GNU
+ Free Documentation License".
+
+If you have Invariant Sections, Front-Cover Texts and Back-Cover Texts,
+replace the "with...Texts." line with this:
+
+ with the Invariant Sections being LIST THEIR TITLES, with the
+ Front-Cover Texts being LIST, and with the Back-Cover Texts being LIST.
+
+If you have Invariant Sections without Cover Texts, or some other
+combination of the three, merge those two alternatives to suit the
+situation.
+
+If your document contains nontrivial examples of program code, we
+recommend releasing these examples in parallel under your choice of
+free software license, such as the GNU General Public License,
+to permit their use in free software.
--- /dev/null
+ GNU GENERAL PUBLIC LICENSE
+ Version 2, June 1991
+
+ Copyright (C) 1989, 1991 Free Software Foundation, Inc.,
+ 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
+ Everyone is permitted to copy and distribute verbatim copies
+ of this license document, but changing it is not allowed.
+
+ Preamble
+
+ The licenses for most software are designed to take away your
+freedom to share and change it. By contrast, the GNU General Public
+License is intended to guarantee your freedom to share and change free
+software--to make sure the software is free for all its users. This
+General Public License applies to most of the Free Software
+Foundation's software and to any other program whose authors commit to
+using it. (Some other Free Software Foundation software is covered by
+the GNU Lesser General Public License instead.) You can apply it to
+your programs, too.
+
+ When we speak of free software, we are referring to freedom, not
+price. Our General Public Licenses are designed to make sure that you
+have the freedom to distribute copies of free software (and charge for
+this service if you wish), that you receive source code or can get it
+if you want it, that you can change the software or use pieces of it
+in new free programs; and that you know you can do these things.
+
+ To protect your rights, we need to make restrictions that forbid
+anyone to deny you these rights or to ask you to surrender the rights.
+These restrictions translate to certain responsibilities for you if you
+distribute copies of the software, or if you modify it.
+
+ For example, if you distribute copies of such a program, whether
+gratis or for a fee, you must give the recipients all the rights that
+you have. You must make sure that they, too, receive or can get the
+source code. And you must show them these terms so they know their
+rights.
+
+ We protect your rights with two steps: (1) copyright the software, and
+(2) offer you this license which gives you legal permission to copy,
+distribute and/or modify the software.
+
+ Also, for each author's protection and ours, we want to make certain
+that everyone understands that there is no warranty for this free
+software. If the software is modified by someone else and passed on, we
+want its recipients to know that what they have is not the original, so
+that any problems introduced by others will not reflect on the original
+authors' reputations.
+
+ Finally, any free program is threatened constantly by software
+patents. We wish to avoid the danger that redistributors of a free
+program will individually obtain patent licenses, in effect making the
+program proprietary. To prevent this, we have made it clear that any
+patent must be licensed for everyone's free use or not licensed at all.
+
+ The precise terms and conditions for copying, distribution and
+modification follow.
+
+ GNU GENERAL PUBLIC LICENSE
+ TERMS AND CONDITIONS FOR COPYING, DISTRIBUTION AND MODIFICATION
+
+ 0. This License applies to any program or other work which contains
+a notice placed by the copyright holder saying it may be distributed
+under the terms of this General Public License. The "Program", below,
+refers to any such program or work, and a "work based on the Program"
+means either the Program or any derivative work under copyright law:
+that is to say, a work containing the Program or a portion of it,
+either verbatim or with modifications and/or translated into another
+language. (Hereinafter, translation is included without limitation in
+the term "modification".) Each licensee is addressed as "you".
+
+Activities other than copying, distribution and modification are not
+covered by this License; they are outside its scope. The act of
+running the Program is not restricted, and the output from the Program
+is covered only if its contents constitute a work based on the
+Program (independent of having been made by running the Program).
+Whether that is true depends on what the Program does.
+
+ 1. You may copy and distribute verbatim copies of the Program's
+source code as you receive it, in any medium, provided that you
+conspicuously and appropriately publish on each copy an appropriate
+copyright notice and disclaimer of warranty; keep intact all the
+notices that refer to this License and to the absence of any warranty;
+and give any other recipients of the Program a copy of this License
+along with the Program.
+
+You may charge a fee for the physical act of transferring a copy, and
+you may at your option offer warranty protection in exchange for a fee.
+
+ 2. You may modify your copy or copies of the Program or any portion
+of it, thus forming a work based on the Program, and copy and
+distribute such modifications or work under the terms of Section 1
+above, provided that you also meet all of these conditions:
+
+ a) You must cause the modified files to carry prominent notices
+ stating that you changed the files and the date of any change.
+
+ b) You must cause any work that you distribute or publish, that in
+ whole or in part contains or is derived from the Program or any
+ part thereof, to be licensed as a whole at no charge to all third
+ parties under the terms of this License.
+
+ c) If the modified program normally reads commands interactively
+ when run, you must cause it, when started running for such
+ interactive use in the most ordinary way, to print or display an
+ announcement including an appropriate copyright notice and a
+ notice that there is no warranty (or else, saying that you provide
+ a warranty) and that users may redistribute the program under
+ these conditions, and telling the user how to view a copy of this
+ License. (Exception: if the Program itself is interactive but
+ does not normally print such an announcement, your work based on
+ the Program is not required to print an announcement.)
+
+These requirements apply to the modified work as a whole. If
+identifiable sections of that work are not derived from the Program,
+and can be reasonably considered independent and separate works in
+themselves, then this License, and its terms, do not apply to those
+sections when you distribute them as separate works. But when you
+distribute the same sections as part of a whole which is a work based
+on the Program, the distribution of the whole must be on the terms of
+this License, whose permissions for other licensees extend to the
+entire whole, and thus to each and every part regardless of who wrote it.
+
+Thus, it is not the intent of this section to claim rights or contest
+your rights to work written entirely by you; rather, the intent is to
+exercise the right to control the distribution of derivative or
+collective works based on the Program.
+
+In addition, mere aggregation of another work not based on the Program
+with the Program (or with a work based on the Program) on a volume of
+a storage or distribution medium does not bring the other work under
+the scope of this License.
+
+ 3. You may copy and distribute the Program (or a work based on it,
+under Section 2) in object code or executable form under the terms of
+Sections 1 and 2 above provided that you also do one of the following:
+
+ a) Accompany it with the complete corresponding machine-readable
+ source code, which must be distributed under the terms of Sections
+ 1 and 2 above on a medium customarily used for software interchange; or,
+
+ b) Accompany it with a written offer, valid for at least three
+ years, to give any third party, for a charge no more than your
+ cost of physically performing source distribution, a complete
+ machine-readable copy of the corresponding source code, to be
+ distributed under the terms of Sections 1 and 2 above on a medium
+ customarily used for software interchange; or,
+
+ c) Accompany it with the information you received as to the offer
+ to distribute corresponding source code. (This alternative is
+ allowed only for noncommercial distribution and only if you
+ received the program in object code or executable form with such
+ an offer, in accord with Subsection b above.)
+
+The source code for a work means the preferred form of the work for
+making modifications to it. For an executable work, complete source
+code means all the source code for all modules it contains, plus any
+associated interface definition files, plus the scripts used to
+control compilation and installation of the executable. However, as a
+special exception, the source code distributed need not include
+anything that is normally distributed (in either source or binary
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+operating system on which the executable runs, unless that component
+itself accompanies the executable.
+
+If distribution of executable or object code is made by offering
+access to copy from a designated place, then offering equivalent
+access to copy the source code from the same place counts as
+distribution of the source code, even though third parties are not
+compelled to copy the source along with the object code.
+
+ 4. You may not copy, modify, sublicense, or distribute the Program
+except as expressly provided under this License. Any attempt
+otherwise to copy, modify, sublicense or distribute the Program is
+void, and will automatically terminate your rights under this License.
+However, parties who have received copies, or rights, from you under
+this License will not have their licenses terminated so long as such
+parties remain in full compliance.
+
+ 5. You are not required to accept this License, since you have not
+signed it. However, nothing else grants you permission to modify or
+distribute the Program or its derivative works. These actions are
+prohibited by law if you do not accept this License. Therefore, by
+modifying or distributing the Program (or any work based on the
+Program), you indicate your acceptance of this License to do so, and
+all its terms and conditions for copying, distributing or modifying
+the Program or works based on it.
+
+ 6. Each time you redistribute the Program (or any work based on the
+Program), the recipient automatically receives a license from the
+original licensor to copy, distribute or modify the Program subject to
+these terms and conditions. You may not impose any further
+restrictions on the recipients' exercise of the rights granted herein.
+You are not responsible for enforcing compliance by third parties to
+this License.
+
+ 7. If, as a consequence of a court judgment or allegation of patent
+infringement or for any other reason (not limited to patent issues),
+conditions are imposed on you (whether by court order, agreement or
+otherwise) that contradict the conditions of this License, they do not
+excuse you from the conditions of this License. If you cannot
+distribute so as to satisfy simultaneously your obligations under this
+License and any other pertinent obligations, then as a consequence you
+may not distribute the Program at all. For example, if a patent
+license would not permit royalty-free redistribution of the Program by
+all those who receive copies directly or indirectly through you, then
+the only way you could satisfy both it and this License would be to
+refrain entirely from distribution of the Program.
+
+If any portion of this section is held invalid or unenforceable under
+any particular circumstance, the balance of the section is intended to
+apply and the section as a whole is intended to apply in other
+circumstances.
+
+It is not the purpose of this section to induce you to infringe any
+patents or other property right claims or to contest validity of any
+such claims; this section has the sole purpose of protecting the
+integrity of the free software distribution system, which is
+implemented by public license practices. Many people have made
+generous contributions to the wide range of software distributed
+through that system in reliance on consistent application of that
+system; it is up to the author/donor to decide if he or she is willing
+to distribute software through any other system and a licensee cannot
+impose that choice.
+
+This section is intended to make thoroughly clear what is believed to
+be a consequence of the rest of this License.
+
+ 8. If the distribution and/or use of the Program is restricted in
+certain countries either by patents or by copyrighted interfaces, the
+original copyright holder who places the Program under this License
+may add an explicit geographical distribution limitation excluding
+those countries, so that distribution is permitted only in or among
+countries not thus excluded. In such case, this License incorporates
+the limitation as if written in the body of this License.
+
+ 9. The Free Software Foundation may publish revised and/or new versions
+of the General Public License from time to time. Such new versions will
+be similar in spirit to the present version, but may differ in detail to
+address new problems or concerns.
+
+Each version is given a distinguishing version number. If the Program
+specifies a version number of this License which applies to it and "any
+later version", you have the option of following the terms and conditions
+either of that version or of any later version published by the Free
+Software Foundation. If the Program does not specify a version number of
+this License, you may choose any version ever published by the Free Software
+Foundation.
+
+ 10. If you wish to incorporate parts of the Program into other free
+programs whose distribution conditions are different, write to the author
+to ask for permission. For software which is copyrighted by the Free
+Software Foundation, write to the Free Software Foundation; we sometimes
+make exceptions for this. Our decision will be guided by the two goals
+of preserving the free status of all derivatives of our free software and
+of promoting the sharing and reuse of software generally.
+
+ NO WARRANTY
+
+ 11. BECAUSE THE PROGRAM IS LICENSED FREE OF CHARGE, THERE IS NO WARRANTY
+FOR THE PROGRAM, TO THE EXTENT PERMITTED BY APPLICABLE LAW. EXCEPT WHEN
+OTHERWISE STATED IN WRITING THE COPYRIGHT HOLDERS AND/OR OTHER PARTIES
+PROVIDE THE PROGRAM "AS IS" WITHOUT WARRANTY OF ANY KIND, EITHER EXPRESSED
+OR IMPLIED, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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+TO THE QUALITY AND PERFORMANCE OF THE PROGRAM IS WITH YOU. SHOULD THE
+PROGRAM PROVE DEFECTIVE, YOU ASSUME THE COST OF ALL NECESSARY SERVICING,
+REPAIR OR CORRECTION.
+
+ 12. IN NO EVENT UNLESS REQUIRED BY APPLICABLE LAW OR AGREED TO IN WRITING
+WILL ANY COPYRIGHT HOLDER, OR ANY OTHER PARTY WHO MAY MODIFY AND/OR
+REDISTRIBUTE THE PROGRAM AS PERMITTED ABOVE, BE LIABLE TO YOU FOR DAMAGES,
+INCLUDING ANY GENERAL, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES ARISING
+OUT OF THE USE OR INABILITY TO USE THE PROGRAM (INCLUDING BUT NOT LIMITED
+TO LOSS OF DATA OR DATA BEING RENDERED INACCURATE OR LOSSES SUSTAINED BY
+YOU OR THIRD PARTIES OR A FAILURE OF THE PROGRAM TO OPERATE WITH ANY OTHER
+PROGRAMS), EVEN IF SUCH HOLDER OR OTHER PARTY HAS BEEN ADVISED OF THE
+POSSIBILITY OF SUCH DAMAGES.
+
+ END OF TERMS AND CONDITIONS
+
+ How to Apply These Terms to Your New Programs
+
+ If you develop a new program, and you want it to be of the greatest
+possible use to the public, the best way to achieve this is to make it
+free software which everyone can redistribute and change under these terms.
+
+ To do so, attach the following notices to the program. It is safest
+to attach them to the start of each source file to most effectively
+convey the exclusion of warranty; and each file should have at least
+the "copyright" line and a pointer to where the full notice is found.
+
+ <one line to give the program's name and a brief idea of what it does.>
+ Copyright (C) <year> <name of author>
+
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 2 of the License, or
+ (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License along
+ with this program; if not, write to the Free Software Foundation, Inc.,
+ 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
+
+Also add information on how to contact you by electronic and paper mail.
+
+If the program is interactive, make it output a short notice like this
+when it starts in an interactive mode:
+
+ Gnomovision version 69, Copyright (C) year name of author
+ Gnomovision comes with ABSOLUTELY NO WARRANTY; for details type `show w'.
+ This is free software, and you are welcome to redistribute it
+ under certain conditions; type `show c' for details.
+
+The hypothetical commands `show w' and `show c' should show the appropriate
+parts of the General Public License. Of course, the commands you use may
+be called something other than `show w' and `show c'; they could even be
+mouse-clicks or menu items--whatever suits your program.
+
+You should also get your employer (if you work as a programmer) or your
+school, if any, to sign a "copyright disclaimer" for the program, if
+necessary. Here is a sample; alter the names:
+
+ Yoyodyne, Inc., hereby disclaims all copyright interest in the program
+ `Gnomovision' (which makes passes at compilers) written by James Hacker.
+
+ <signature of Ty Coon>, 1 April 1989
+ Ty Coon, President of Vice
+
+This General Public License does not permit incorporating your program into
+proprietary programs. If your program is a subroutine library, you may
+consider it more useful to permit linking proprietary applications with the
+library. If this is what you want to do, use the GNU Lesser General
+Public License instead of this License.
--- /dev/null
+[ 1460563 ] How to add Support more Flash chip???
+
+Date: 2006-06-04 15:48
+Sender: ameziti
+
+Hi
+
+I will not give here the answers but just the we to do the
+work.
+
+Theres three category of things you have to consider:
+
+1- the part wich contain the jtag port (processor, fpga..)
+2- the flash memory you want to flash (amd, intel, atmel..)
+3- the bus wich indicate how the part and the flash are
+connected together on your card.
+
+Use the patches that are on the site as exemples to
+inderstand how to do your job.
+
+Exemples:
+
+1- for the part (processor) with jtag:
+ -have a look at the patch 1173994 for the IBM PPC405EP
+ - you will need bsdl file of your processor and use
+ - bsdl2jtag to transform your file
+ - he add a directory jtag-0.5.1/data/ibm
+ - add and modify same files... look at the patch
+ - understand what that mean and do the same think
+
+2- you have to add your flash :
+ - have a look at the patch 1281666 for the Am29LV040B
+ - he modify the jtag-0.5.1/libbrux/flash/amd.c file
+ - he modify the jtag-0.5.1/libbrux/flash/jedec.c
+ - understand what that mean and do the same think
+
+3 - you have to add your bus (interconnexion card) betwin
+the processor and the flash
+ - look at the second party of the patch 1173994 where
+begin at line 756 with jtag-0.5.1.orig/src/bus
+ - you have to modify this directory files buses.h buses.c
+ - writing and adding your own bus description ixp425.c
+(look at the examples to understand what to do)
+
+
+generally:
+You have also to understand
+- the architecture of the jtag-0.5.1 project
+- how to modify makefiles
+- to install the ioperm-0.4 for managing the parallel port
+- to install the include-0.4.2 wich contains the *.h files
+- to install cygwin (if you work under windows) with
+developpement pack which contain debug module
+- prefer a fast and quick PC for not to wast the time
+during compilation
+- perhaps an logic analyser for debugging your hardware
+
+I took about 1 month (during wasting time) to understand
+all of this things and do it for flashing
+an AT49BV322A atmel flash
+with the spartan 3 xc3s1500 xilinx fpga
+on the DS-BD-3S1500MB-FG676 memec card
+
+good work
+
+Abdallah MEZITI
+
+
--- /dev/null
+.TH jtag 1 "April 7, 2009" UrJTAG
+.SH NAME
+jtag \- UrJTAG command shell
+.SH SYNOPSIS
+.B jtag
+[\-hinqv]
+.I file
+.B ...
+.SH DESCRIPTION
+UrJTAG is a software package which enables working with JTAG-aware (IEEE
+1149.1) hardware devices (parts) and boards through JTAG adapter.
+.SH OPTIONS
+.TP
+.I \-h, \-\-help
+Display a short help text and exit.
+.TP
+.I \-i, \-\-interactive
+Enter interactive mode after executing commands from files (this is the default if no files are named on the command line).
+.TP
+.I \-n, \-\-norc
+Disable reading ~/.jtag/rc on startup.
+.TP
+.I \-q, \-\-quiet
+Do not print help on startup.
+.TP
+.I \-v, \-\-version
+Display version information and exit.
+.SH ARGUMENTS
+If arguments remain after option processing, they are taken as names of files
+containing JTAG commands, one per line. Unless the
+.I \-\-interactive
+option was specified, the program will exit after processing the commands from
+the file[s].
+.SH FILES
+.PP
+.I ~/.jtag/rc
+.IP
+A per-user text file containing JTAG commands to execute at startup.
+.PP
+.I /usr/share/urjtag
+.IP
+Data files about various CPUs, flash chips etc.
+.SH BUGS
+Bugs are tracked at the project homepage, http://www.urjtag.org.
+.SH "SEE ALSO"
+.BR bsdl2jtag (1)
+.SH AUTHORS
+Authors and contributors are listed in the AUTHORS and THANKS files in
+the source documentation.
+.SH HISTORY
+JTAG Tools originally have been developed as part of the openwince project by
+Marcel Telka. They became an independent project named UrJTAG in late 2007.
+
--- /dev/null
+FPGA JTAG Memory (fjmem) Design
+===============================
+$Id$
+
+
+Introduction
+------------
+
+This directory contains the VHDL design files that complement UrJTAG's fjmem
+bus driver. The fjmem system utilizes generic embedded JTAG components that
+are available in several FPGA families. These stubs connect to the fjmem_core
+design and act as the interface to the external JTAG chain.
+
+The fjmem_core design implements a data register that is hooked into the JTAG
+chain when a USER instruction is selected. UrJTAG communicates with fjmem_core
+by shifting command, address and data information through this register. This
+information is processed by fjmem_core and results in read or write operations
+on a generic memory interface.
+
+
+JTAG stubs
+----------
+
+Modern FPGA devices contain a JTAG component that allows user logic to connect
+to the external JTAG chain. Xilinx devices like the Spartan 3 call it
+BSCAN_SPARTAN3 while it's named cyclone_jtag in Altera's Cyclone
+devices. Apart from details, both components provide equivalent
+functionality: User logic can place a data shift register between TDI and TDO
+that is activated by special USER instructions.
+
+Xilinx BSCAN_SPARTAN3:
+ * USER1, opcode 00010
+ * USER2, opcode 00011
+Extensively documented in "Configuration and Readback of Spartan-II FPGAs
+Using Boundary Scan" (xapp188.pdf).
+
+Altera cyclone_jtag:
+ * USER0, opcode 0000001100
+ * USER1, opcode 0000001110
+Briefly mentioned in the "MAXII Device Handbook".
+
+
+Integration
+-----------
+
+A short description of fjmem_core's ports:
+
+ -- JTAG Interface
+ clkdr_i - TCK clock
+ trst_i - TAP reset
+ shift_i - Shift enable
+ update_i - Update clock
+ tdi_i - TDI chain input
+ tdo_o - TDO chain output
+ -- Memory Interface
+ clk_i - Clock
+ res_i - Reset
+ strobe_o - Strobe
+ read_o - Read enable
+ write_o - Write enable
+ ack_i - Acknowledge
+ cs_o - Chip select lines
+ addr_o - Address vector
+ din_i - Data input vector
+ dout_o - Data output vector
+
+
+Whenever the fjmem_core receives a command from the fjmem bus driver, it
+issues the according signals on the memory interface. This interface is
+synchronous to clk_i.
+
+Active strobe_o announces a read or write operation. All other outputs are
+valid only when strobe_o is '1'. Access direction outputs read_o and write_o
+are mutually exclusive. cs_o is a one-hot vector and identifies the selected
+memory block.
+
+Two sample toplevel designs are provided for Cyclone and Spartan3 devices that
+demonstrate the attachment of asynchronous and synchronous (on-chip) memories.
+
+
+Configuration
+-------------
+
+The specific configuration of fjmem_core is taken from fjmem_config_pack. The
+user has to set a number of constants that determine the behavior of the core
+design.
+
+ -- Specify the active levels of trst_i, shift_i and res_i
+ trst_act_level_c - TRST active level
+ shift_act_level_c - Shift enable active level
+ res_act_level_c - res_i active level
+
+A block is a consecutive memory range that has a common geometry, i.e. it
+represents a single memory component in the system. The number of block
+relates directly to the number of lines in the cs_o chip select vector.
+
+ -- number of used blocks
+ constant num_blocks_c : natural := 4;
+ -- number of bits for block field
+ constant num_block_field_c : natural := 2;
+
+Specify the geometry of each block: address and data vector width. The block
+(= memory range) is expected to use the full address vector width.
+
+ constant blocks_c : block_array_t :=
+ ((addr_width => 18, -- block #0
+ data_width => 16),
+ (addr_width => 18, -- block #1
+ data_width => 16),
+ (addr_width => 19, -- block #2
+ data_width => 8),
+ (addr_width => 8, -- block #3
+ data_width => 8)
+ );
+
+For completeness, it's required to set constants for the maximum address and
+data vector widths.
+
+ constant max_addr_width_c : natural := 19;
+ constant max_data_width_c : natural := 16;
--- /dev/null
+-------------------------------------------------------------------------------
+--
+-- $Id$
+--
+-- This program is free software; you can redistribute it and/or
+-- modify it under the terms of the GNU General Public License
+-- as published by the Free Software Foundation; either version 2
+-- of the License, or (at your option) any later version.
+--
+-- This program is distributed in the hope that it will be useful,
+-- but WITHOUT ANY WARRANTY; without even the implied warranty of
+-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+-- GNU General Public License for more details.
+--
+-- You should have received a copy of the GNU General Public License
+-- along with this program; if not, write to the Free Software
+-- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+-- 02111-1307, USA.
+--
+-- Written by Arnim Laeuger <arniml@users.sourceforge.net>, 2008.
+--
+-------------------------------------------------------------------------------
+
+library ieee;
+use ieee.std_logic_1164.all;
+
+package fjmem_config_pack is
+
+ -----------------------------------------------------------------------------
+ -- Specify the active levels of trst_i, shift_i and res_i
+ --
+ constant trst_act_level_c : std_logic := '1';
+ constant shift_act_level_c : std_logic := '1';
+ constant res_act_level_c : std_logic := '1';
+ --
+ -----------------------------------------------------------------------------
+
+
+ -----------------------------------------------------------------------------
+ -- Adapt the number of used blocks and the number of bits that are
+ -- required for the block field (2 ** num_block_field_c >= num_blocks_c)
+ --
+ -- number of used blocks
+ constant num_blocks_c : natural := 4;
+ -- number of bits for block field
+ constant num_block_field_c : natural := 2;
+ --
+ -----------------------------------------------------------------------------
+
+
+ -----------------------------------------------------------------------------
+ -- Don't change the array type
+ --
+ type block_desc_t is
+ record
+ addr_width : natural;
+ data_width : natural;
+ end record;
+ type block_array_t is array (natural range 0 to num_blocks_c-1) of block_desc_t;
+ --
+ -----------------------------------------------------------------------------
+
+
+ -----------------------------------------------------------------------------
+ -- Fill in the array for all your used blocks
+ --
+ constant blocks_c : block_array_t :=
+ ((addr_width => 18, -- block #0
+ data_width => 16),
+ (addr_width => 18, -- block #1
+ data_width => 16),
+ (addr_width => 19, -- block #2
+ data_width => 8),
+ (addr_width => 8, -- block #3
+ data_width => 8)
+ );
+ --
+ -- And specify the maximum address and data width
+ --
+ constant max_addr_width_c : natural := 19;
+ constant max_data_width_c : natural := 16;
+ --
+ -----------------------------------------------------------------------------
+
+end;
--- /dev/null
+-------------------------------------------------------------------------------
+--
+-- $Id$
+--
+-- This program is free software; you can redistribute it and/or
+-- modify it under the terms of the GNU General Public License
+-- as published by the Free Software Foundation; either version 2
+-- of the License, or (at your option) any later version.
+--
+-- This program is distributed in the hope that it will be useful,
+-- but WITHOUT ANY WARRANTY; without even the implied warranty of
+-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+-- GNU General Public License for more details.
+--
+-- You should have received a copy of the GNU General Public License
+-- along with this program; if not, write to the Free Software
+-- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+-- 02111-1307, USA.
+--
+-- Written by Arnim Laeuger <arniml@users.sourceforge.net>, 2008.
+--
+-------------------------------------------------------------------------------
+
+library ieee;
+use ieee.std_logic_1164.all;
+
+package fjmem_config_pack is
+
+ -----------------------------------------------------------------------------
+ -- Specify the active levels of trst_i, shift_i and res_i
+ --
+ constant trst_act_level_c : std_logic := '1';
+ constant shift_act_level_c : std_logic := '1';
+ constant res_act_level_c : std_logic := '1';
+ --
+ -----------------------------------------------------------------------------
+
+
+ -----------------------------------------------------------------------------
+ -- Adapt the number of used blocks and the number of bits that are
+ -- required for the block field (2 ** num_block_field_c >= num_blocks_c)
+ --
+ -- number of used blocks
+ constant num_blocks_c : natural := 4;
+ -- number of bits for block field
+ constant num_block_field_c : natural := 2;
+ --
+ -----------------------------------------------------------------------------
+
+
+ -----------------------------------------------------------------------------
+ -- Don't change the array type
+ --
+ type block_desc_t is
+ record
+ addr_width : natural;
+ data_width : natural;
+ end record;
+ type block_array_t is array (natural range 0 to num_blocks_c-1) of block_desc_t;
+ --
+ -----------------------------------------------------------------------------
+
+
+ -----------------------------------------------------------------------------
+ -- Fill in the array for all your used blocks
+ --
+ constant blocks_c : block_array_t :=
+ ((addr_width => 24, -- block #0, FLASH
+ data_width => 16),
+ (addr_width => 18, -- block #1, RAM0
+ data_width => 16),
+ (addr_width => 18, -- block #2, RAM1
+ data_width => 16),
+ (addr_width => 8, -- block #3, embedded RAM
+ data_width => 8)
+ );
+ --
+ -- And specify the maximum address and data width
+ --
+ constant max_addr_width_c : natural := 24;
+ constant max_data_width_c : natural := 16;
+ --
+ -----------------------------------------------------------------------------
+
+end;
--- /dev/null
+-------------------------------------------------------------------------------
+--
+-- $Id$
+--
+-- jmem_core - a generic interface module for accessing on-chip and off-chip
+-- memory and peripherals
+--
+-- For host software support visit
+-- http://urjtag.org/
+--
+-- This program is free software; you can redistribute it and/or
+-- modify it under the terms of the GNU General Public License
+-- as published by the Free Software Foundation; either version 2
+-- of the License, or (at your option) any later version.
+--
+-- This program is distributed in the hope that it will be useful,
+-- but WITHOUT ANY WARRANTY; without even the implied warranty of
+-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+-- GNU General Public License for more details.
+--
+-- You should have received a copy of the GNU General Public License
+-- along with this program; if not, write to the Free Software
+-- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+-- 02111-1307, USA.
+--
+-- Written by Arnim Laeuger <arniml@users.sourceforge.net>, 2008.
+--
+-------------------------------------------------------------------------------
+
+library ieee;
+use ieee.std_logic_1164.all;
+
+use work.fjmem_config_pack.all;
+use work.fjmem_pack.all;
+
+entity fjmem_core is
+
+ port (
+ -- JTAG Interface ---------------------------------------------------------
+ clkdr_i : in std_logic;
+ trst_i : in std_logic;
+ shift_i : in std_logic;
+ update_i : in std_logic;
+ tdi_i : in std_logic;
+ tdo_o : out std_logic;
+ -- Memory Interface -------------------------------------------------------
+ clk_i : in std_logic;
+ res_i : in std_logic;
+ strobe_o : out std_logic;
+ read_o : out std_logic;
+ write_o : out std_logic;
+ ack_i : in std_logic;
+ cs_o : out std_logic_vector(num_blocks_c-1 downto 0);
+ addr_o : out std_logic_vector(max_addr_width_c-1 downto 0);
+ din_i : in std_logic_vector(max_data_width_c-1 downto 0);
+ dout_o : out std_logic_vector(max_data_width_c-1 downto 0)
+ );
+
+end fjmem_core;
+
+
+library ieee;
+use ieee.numeric_std.all;
+
+architecture rtl of fjmem_core is
+
+ signal trst_s : boolean;
+ signal shift_en_s,
+ capture_en_s : boolean;
+
+ signal shift_q : std_logic_vector(shift_range_t);
+ signal update_q : std_logic_vector(shift_range_t);
+
+ signal res_s : boolean;
+
+ signal din_q : std_logic_vector(data_range_t);
+ signal ack_q,
+ ack_for_shift_q : std_logic;
+
+ signal instr_q : std_logic_vector(instr_range_t);
+ signal block_q : std_logic_vector(block_range_t);
+ signal strobe_toggle_q : std_logic;
+ signal addr_q : std_logic_vector(addr_range_t);
+ signal dout_q : std_logic_vector(data_range_t);
+
+ signal strobe_sync_q : std_logic_vector(1 downto 0);
+ signal strobe_edge_q : std_logic;
+
+begin
+
+ -----------------------------------------------------------------------------
+ -- Mapping of input signals to internal flags
+ -----------------------------------------------------------------------------
+ trst_s <= trst_i = trst_act_level_c;
+ shift_en_s <= shift_i = shift_act_level_c;
+ capture_en_s <= shift_i /= shift_act_level_c;
+
+ res_s <= res_i = res_act_level_c;
+
+
+ -----------------------------------------------------------------------------
+ -- Process shift
+ --
+ -- Purpose:
+ -- Implements the shift register between tdi_i and tdo_o.
+ --
+ -- Instruction are handled as follows.
+ -- read :
+ -- write :
+ -- detect : a dedicated pattern is captured that allows that marks the
+ -- variable length fields:
+ -- * block field marked with '1'
+ -- * address field marked with '0'
+ -- * data field marked with '1'
+ -- This allows the host software to detect how these fields are
+ -- located inside the bit stream (total length of bitstream has
+ -- been determined previously).
+ -- query : Based on the shifted block number, the used bits in the
+ -- address and data field are marked with '1'. This reports the
+ -- specific addr and data widths of the specified block.
+ --
+ shift: process (trst_s, clkdr_i)
+ variable addr_width_v,
+ data_width_v : natural;
+ variable idx_v : natural;
+ begin
+ if trst_s then
+ shift_q <= (others => '0');
+
+ elsif rising_edge(clkdr_i) then
+ if shift_en_s then
+ -- shift mode
+ shift_q(shift_width_c-2 downto 0) <= shift_q(shift_width_c-1 downto 1);
+ shift_q(shift_width_c-1) <= tdi_i;
+
+ else
+ -- capture mode
+ idx_v := to_integer(unsigned(shift_q(block_range_t)));
+ if idx_v < num_blocks_c then
+ addr_width_v := blocks_c(idx_v).addr_width;
+ data_width_v := blocks_c(idx_v).data_width;
+ else
+ addr_width_v := 0;
+ data_width_v := 0;
+ end if;
+
+ case instr_q is
+ when instr_read_c =>
+ shift_q(instr_range_t) <= instr_q;
+ shift_q(shift_ack_pos_c) <= ack_for_shift_q;
+ shift_q(data_range_t) <= din_q;
+
+ when instr_write_c =>
+ shift_q(instr_range_t) <= instr_q;
+
+ when instr_idle_c =>
+ shift_q <= (others => '0');
+
+ when instr_detect_c =>
+ shift_q <= (others => '0');
+ shift_q(instr_range_t) <= instr_q;
+ -- mark block field with '1'
+ shift_q(block_range_t) <= (others => '1');
+ -- mark address field with '0'
+ shift_q(addr_range_t) <= (others => '0');
+ -- mark data field with '1'
+ shift_q(data_range_t) <= (others => '1');
+
+ when instr_query_c =>
+ if idx_v < num_blocks_c then
+ shift_q <= (others => '0');
+ -- mark used address bits of this block in the address field with '1'
+ for idx in addr_range_t loop
+ if idx < shift_addr_pos_c + addr_width_v then
+ shift_q(idx) <= '1';
+ end if;
+ end loop;
+ -- mark used data bits of this block in the data field '1'
+ for idx in data_range_t loop
+ if idx < shift_data_pos_c + data_width_v then
+ shift_q(idx) <= '1';
+ end if;
+ end loop;
+ else
+ -- unused block
+ shift_q <= (others => '0');
+ end if;
+ shift_q(instr_range_t) <= instr_q;
+
+ when others =>
+ shift_q <= (others => '-');
+ shift_q(instr_range_t) <= instr_q;
+ end case;
+
+ end if;
+ end if;
+ end process shift;
+ --
+ -----------------------------------------------------------------------------
+
+
+ -----------------------------------------------------------------------------
+ -- Process din
+ --
+ -- Purpose:
+ -- Stores the provided data at din_i for later capture.
+ -- The ack_i input is stored in a two-stage pipeline to allow din_q to
+ -- settle before ack is actually detected in the clkdr clock domain.
+ --
+ din: process (res_s, clk_i)
+ begin
+ if res_s then
+ din_q <= (others => '0');
+ ack_q <= '0';
+ ack_for_shift_q <= '0';
+
+ elsif rising_edge(clk_i) then
+ if ack_i = '1' then
+ din_q <= din_i;
+ ack_q <= '1';
+ end if;
+ ack_for_shift_q <= ack_q;
+
+ if ack_for_shift_q = '1' then
+ -- reset for the moment, functionality not yet complete
+ ack_q <= '0';
+ end if;
+
+ end if;
+ end process din;
+ --
+ -----------------------------------------------------------------------------
+
+
+ -----------------------------------------------------------------------------
+ -- Process dout
+ --
+ -- Purpose:
+ -- Stores the updated block, instruction, address and data fields.
+ --
+ dout: process (trst_s, update_i)
+ begin
+ if trst_s then
+ instr_q <= instr_idle_c;
+ block_q <= (others => '0');
+ addr_q <= (others => '0');
+ dout_q <= (others => '0');
+ strobe_toggle_q <= '0';
+
+ elsif rising_edge(update_i) then
+ instr_q <= shift_q(instr_range_t);
+ block_q <= shift_q(block_range_t);
+ addr_q <= shift_q(addr_range_t);
+ dout_q <= shift_q(data_range_t);
+
+ strobe_toggle_q <= not strobe_toggle_q;
+
+ end if;
+ end process dout;
+ --
+ -----------------------------------------------------------------------------
+
+
+ -----------------------------------------------------------------------------
+ -- Process strobe_sync
+ --
+ -- Purpose:
+ -- Implements the synchronizer for the strobe signal from clkdr_i to
+ -- clk_i domain. This is a toggle synchronizer.
+ --
+ strobe_sync: process (res_s, clk_i)
+ begin
+ if res_s then
+ strobe_sync_q <= (others => '0');
+ strobe_edge_q <= '0';
+
+ elsif rising_edge(clk_i) then
+ strobe_sync_q(1) <= strobe_toggle_q;
+ strobe_sync_q(0) <= strobe_sync_q(1);
+
+ strobe_edge_q <= strobe_sync_q(0);
+ end if;
+ end process strobe_sync;
+ --
+ -----------------------------------------------------------------------------
+
+
+ -----------------------------------------------------------------------------
+ -- Process cs_gen
+ --
+ -- Purpose:
+ -- Generates the cs_o output vector.
+ --
+ cs_gen: process (block_q)
+ begin
+ for idx in 0 to num_blocks_c-1 loop
+ if idx = to_integer(unsigned(block_q)) then
+ cs_o(idx) <= '1';
+ else
+ cs_o(idx) <= '0';
+ end if;
+ end loop;
+ end process cs_gen;
+ --
+ -----------------------------------------------------------------------------
+
+
+ -----------------------------------------------------------------------------
+ -- Output mapping
+ -----------------------------------------------------------------------------
+ tdo_o <= shift_q(0);
+ strobe_o <= strobe_sync_q(0) xor strobe_edge_q;
+ read_o <= '1' when instr_q = instr_read_c else '0';
+ write_o <= '1' when instr_q = instr_write_c else '0';
+ addr_o <= addr_q;
+ dout_o <= dout_q;
+
+end rtl;
--- /dev/null
+-------------------------------------------------------------------------------
+--
+-- $Id$
+--
+-- This program is free software; you can redistribute it and/or
+-- modify it under the terms of the GNU General Public License
+-- as published by the Free Software Foundation; either version 2
+-- of the License, or (at your option) any later version.
+--
+-- This program is distributed in the hope that it will be useful,
+-- but WITHOUT ANY WARRANTY; without even the implied warranty of
+-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+-- GNU General Public License for more details.
+--
+-- You should have received a copy of the GNU General Public License
+-- along with this program; if not, write to the Free Software
+-- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+-- 02111-1307, USA.
+--
+-- Written by Arnim Laeuger <arniml@users.sourceforge.net>, 2008.
+--
+-------------------------------------------------------------------------------
+
+library ieee;
+use ieee.std_logic_1164.all;
+
+entity fjmem_cyclone is
+
+ port (
+ altera_reserved_tck : in std_logic;
+ altera_reserved_tms : in std_logic;
+ altera_reserved_tdi : in std_logic;
+ altera_reserved_tdo : out std_logic;
+ ext_clk_i : in std_logic;
+ wd_o : out std_logic;
+ rgb_r_o : out std_logic_vector( 2 downto 0);
+ rgb_g_o : out std_logic_vector( 2 downto 0);
+ rgb_b_o : out std_logic_vector( 2 downto 0);
+ comp_sync_n_o : out std_logic;
+ audio_l_o : out std_logic;
+ audio_r_o : out std_logic;
+ audio_o : out std_logic_vector( 7 downto 0);
+ pad_clk_o : out std_logic;
+ pad_latch_o : out std_logic;
+ pad_data_i : in std_logic_vector( 1 downto 0);
+ rxd_i : in std_logic;
+ txd_o : out std_logic;
+ cts_i : in std_logic;
+ rts_o : out std_logic;
+ rama_a_o : out std_logic_vector(17 downto 0);
+ rama_d_b : inout std_logic_vector(15 downto 0);
+ rama_cs_n_o : out std_logic;
+ rama_oe_n_o : out std_logic;
+ rama_we_n_o : out std_logic;
+ rama_lb_n_o : out std_logic;
+ rama_ub_n_o : out std_logic;
+ ramb_a_o : out std_logic_vector(17 downto 0);
+ ramb_d_b : inout std_logic_vector(15 downto 0);
+ ramb_cs_n_o : out std_logic;
+ ramb_oe_n_o : out std_logic;
+ ramb_we_n_o : out std_logic;
+ ramb_lb_n_o : out std_logic;
+ ramb_ub_n_o : out std_logic;
+ fl_a_o : out std_logic_vector(18 downto 0);
+ fl_d_b : inout std_logic_vector( 7 downto 0);
+ fl_we_n_o : out std_logic;
+ fl_oe_n_o : out std_logic;
+ fl_cs_n_o : out std_logic;
+ fl_cs2_n_o : out std_logic;
+ fl_rdy_i : in std_logic
+ );
+
+end fjmem_cyclone;
+
+
+library ieee;
+use ieee.numeric_std.all;
+
+use work.fjmem_config_pack.all;
+
+architecture struct of fjmem_cyclone is
+
+ component fjmem_core
+ port (
+ clkdr_i : in std_logic;
+ trst_i : in std_logic;
+ shift_i : in std_logic;
+ update_i : in std_logic;
+ tdi_i : in std_logic;
+ tdo_o : out std_logic;
+ clk_i : in std_logic;
+ res_i : in std_logic;
+ strobe_o : out std_logic;
+ read_o : out std_logic;
+ write_o : out std_logic;
+ ack_i : in std_logic;
+ cs_o : out std_logic_vector(num_blocks_c-1 downto 0);
+ addr_o : out std_logic_vector(max_addr_width_c-1 downto 0);
+ din_i : in std_logic_vector(max_data_width_c-1 downto 0);
+ dout_o : out std_logic_vector(max_data_width_c-1 downto 0)
+ );
+ end component;
+
+ component cyclone_jtag
+ port (
+ tms : in std_logic;
+ tck : in std_logic;
+ tdi : in std_logic;
+ tdo : out std_logic;
+ tmsutap : out std_logic;
+ tckutap : out std_logic;
+ tdiutap : out std_logic;
+ tdouser : in std_logic;
+ shiftuser : out std_logic;
+ clkdruser : out std_logic;
+ updateuser : out std_logic;
+ runidleuser : out std_logic;
+ usr1user : out std_logic
+ );
+ end component;
+
+ component generic_ram_ena
+ generic (
+ addr_width_g : integer := 10;
+ data_width_g : integer := 8
+ );
+ port (
+ clk_i : in std_logic;
+ a_i : in std_logic_vector(addr_width_g-1 downto 0);
+ we_i : in std_logic;
+ ena_i : in std_logic;
+ d_i : in std_logic_vector(data_width_g-1 downto 0);
+ d_o : out std_logic_vector(data_width_g-1 downto 0)
+ );
+ end component;
+
+ signal tdi_s,
+ tdo_s : std_logic;
+ signal clkdr_s,
+ trst_s,
+ shift_s,
+ update_s : std_logic;
+
+ signal addr_s : std_logic_vector(max_addr_width_c-1 downto 0);
+ signal din_s,
+ dout_s : std_logic_vector(max_data_width_c-1 downto 0);
+
+ signal res_s : std_logic;
+
+ signal read_s,
+ write_s,
+ strobe_s : std_logic;
+ signal cs_s : std_logic_vector(3 downto 0);
+ signal ack_q : std_logic;
+
+ type state_t is (IDLE,
+ READ_WAIT,
+ WRITE_DRIVE,
+ WRITE_WAIT,
+ WRITE_FINISH);
+ signal state_q : state_t;
+
+ signal cnt_q : unsigned(1 downto 0);
+
+ signal rama_cs_n_q,
+ rama_oe_n_q,
+ rama_we_n_q,
+ rama_lb_n_q,
+ rama_ub_n_q,
+ rama_d_en_q : std_logic;
+ signal ramb_cs_n_q,
+ ramb_oe_n_q,
+ ramb_we_n_q,
+ ramb_lb_n_q,
+ ramb_ub_n_q,
+ ramb_d_en_q : std_logic;
+ signal fl_cs_n_q,
+ fl_oe_n_q,
+ fl_we_n_q,
+ fl_d_en_q : std_logic;
+
+ signal en_emb_rams_s : std_logic;
+ signal d_from_emb_ram_s : std_logic_vector(7 downto 0);
+
+begin
+
+ res_s <= '0';
+
+
+ cyclone_jtag_b : cyclone_jtag
+ port map (
+ tms => altera_reserved_tms,
+ tck => altera_reserved_tck,
+ tdi => altera_reserved_tdi,
+ tdo => altera_reserved_tdo,
+ tmsutap => open,
+ tckutap => open,
+ tdiutap => tdi_s,
+ tdouser => tdo_s,
+ shiftuser => shift_s,
+ clkdruser => clkdr_s,
+ updateuser => update_s,
+ runidleuser => open, --trst_s,
+ usr1user => open
+ );
+ trst_s <= '0';
+
+
+ fjmem_core_b : fjmem_core
+ port map (
+ clkdr_i => clkdr_s,
+ trst_i => trst_s,
+ shift_i => shift_s,
+ update_i => update_s,
+ tdi_i => tdi_s,
+ tdo_o => tdo_s,
+ clk_i => ext_clk_i,
+ res_i => res_s,
+ strobe_o => strobe_s,
+ read_o => read_s,
+ write_o => write_s,
+ ack_i => ack_q,
+ cs_o => cs_s,
+ addr_o => addr_s,
+ din_i => din_s,
+ dout_o => dout_s
+ );
+ wd_o <= '0';
+
+
+ -----------------------------------------------------------------------------
+ -- Process mem_ctrl
+ --
+ -- Purpose:
+ -- Handles access to external memory.
+ --
+ mem_ctrl: process (res_s, ext_clk_i)
+ begin
+ if res_s = '1' then
+ -- RAMA
+ rama_cs_n_q <= '1';
+ rama_oe_n_q <= '1';
+ rama_we_n_q <= '1';
+ rama_lb_n_q <= '1';
+ rama_ub_n_q <= '1';
+ rama_d_en_q <= '0';
+ -- RAMB
+ ramb_cs_n_q <= '1';
+ ramb_oe_n_q <= '1';
+ ramb_we_n_q <= '1';
+ ramb_lb_n_q <= '1';
+ ramb_ub_n_q <= '1';
+ ramb_d_en_q <= '0';
+ -- Flash
+ fl_cs_n_q <= '1';
+ fl_oe_n_q <= '1';
+ fl_we_n_q <= '1';
+ fl_d_en_q <= '0';
+
+ ack_q <= '0';
+
+ state_q <= IDLE;
+ cnt_q <= (others => '0');
+
+ elsif rising_edge(ext_clk_i) then
+ case state_q is
+ when IDLE =>
+ if strobe_s = '1' then
+ if write_s = '1' then
+ state_q <= WRITE_DRIVE;
+ else
+ state_q <= READ_WAIT;
+ ack_q <= '1';
+ end if;
+
+ case cs_s is
+ -- RAMA
+ when "0001" =>
+ rama_cs_n_q <= '0';
+ rama_lb_n_q <= '0';
+ rama_ub_n_q <= '0';
+ if read_s = '1' then
+ rama_oe_n_q <= '0';
+ end if;
+ if write_s = '1' then
+ rama_d_en_q <= '1';
+ end if;
+
+ -- RAMB
+ when "0010" =>
+ ramb_cs_n_q <= '0';
+ ramb_lb_n_q <= '0';
+ ramb_ub_n_q <= '0';
+ if read_s = '1' then
+ ramb_oe_n_q <= '0';
+ end if;
+ if write_s = '1' then
+ ramb_d_en_q <= '1';
+ end if;
+
+ -- Flash
+ when "0100" =>
+ fl_cs_n_q <= '0';
+ if read_s = '1' then
+ fl_oe_n_q <= '0';
+ -- start counter on read
+ cnt_q <= (others => '1');
+ end if;
+ if write_s = '1' then
+ fl_d_en_q <= '1';
+ end if;
+
+ -- unimlemented / invalid
+ when others =>
+ null;
+
+ end case;
+ end if;
+
+ when READ_WAIT =>
+ if cnt_q = 0 then
+ state_q <= IDLE;
+ ack_q <= '0';
+
+ -- disable all memories
+ rama_cs_n_q <= '1';
+ rama_oe_n_q <= '1';
+ rama_lb_n_q <= '1';
+ rama_ub_n_q <= '1';
+ ramb_cs_n_q <= '1';
+ ramb_oe_n_q <= '1';
+ ramb_lb_n_q <= '1';
+ ramb_ub_n_q <= '1';
+ fl_cs_n_q <= '1';
+ fl_oe_n_q <= '1';
+ end if;
+
+ when WRITE_DRIVE =>
+ state_q <= WRITE_WAIT;
+
+ -- output drivers are active during this state
+ -- thus we can activate the write impulse at the end
+ case cs_s is
+ when "0001" =>
+ rama_we_n_q <= '0';
+ when "0010" =>
+ ramb_we_n_q <= '0';
+ when "0100" =>
+ fl_we_n_q <= '0';
+ -- start counter
+ cnt_q <= (others => '1');
+ when others =>
+ null;
+ end case;
+
+ when WRITE_WAIT =>
+ if cnt_q = 0 then
+ state_q <= WRITE_FINISH;
+ ack_q <= '0';
+
+ -- disable write signals
+ rama_we_n_q <= '1';
+ ramb_we_n_q <= '1';
+ fl_we_n_q <= '1';
+ end if;
+
+ when WRITE_FINISH =>
+ state_q <= IDLE;
+
+ -- disable output enables
+ rama_d_en_q <= '0';
+ ramb_d_en_q <= '0';
+ fl_d_en_q <= '0';
+ -- disable all memories
+ rama_cs_n_q <= '1';
+ rama_oe_n_q <= '1';
+ rama_lb_n_q <= '1';
+ rama_ub_n_q <= '1';
+ ramb_cs_n_q <= '1';
+ ramb_oe_n_q <= '1';
+ ramb_lb_n_q <= '1';
+ ramb_ub_n_q <= '1';
+ fl_cs_n_q <= '1';
+ fl_oe_n_q <= '1';
+
+ when others =>
+ state_q <= IDLE;
+
+ end case;
+
+ if cnt_q /= 0 then
+ cnt_q <= cnt_q - 1;
+ end if;
+
+ end if;
+ end process mem_ctrl;
+ --
+ -----------------------------------------------------------------------------
+
+
+ -----------------------------------------------------------------------------
+ -- An embedded RAM
+ -----------------------------------------------------------------------------
+ en_emb_rams_s <= cs_s(3) and strobe_s;
+ --
+ emb_ram_b : generic_ram_ena
+ generic map (
+ addr_width_g => 8,
+ data_width_g => 8
+ )
+ port map (
+ clk_i => ext_clk_i,
+ a_i => addr_s(7 downto 0),
+ we_i => write_s,
+ ena_i => en_emb_rams_s,
+ d_i => dout_s(7 downto 0),
+ d_o => d_from_emb_ram_s
+ );
+
+
+ -----------------------------------------------------------------------------
+ -- Process read_mux
+ --
+ -- Purpose:
+ -- Read multiplexer from memory to jop_core.
+ --
+ read_mux: process (cs_s,
+ rama_d_b, ramb_d_b, fl_d_b,
+ d_from_emb_ram_s)
+ variable din_v : std_logic_vector(din_s'range);
+ begin
+ din_v := (others => '0');
+
+ if cs_s(0) = '1' then
+ din_v := din_v or rama_d_b;
+ end if;
+ if cs_s(1) = '1' then
+ din_v := din_v or ramb_d_b;
+ end if;
+ if cs_s(2) = '1' then
+ din_v(7 downto 0) := din_v(7 downto 0) or fl_d_b;
+ end if;
+ if cs_s(3) = '1' then
+ din_v(7 downto 0) := din_v(7 downto 0) or d_from_emb_ram_s;
+ end if;
+
+ din_s <= din_v;
+ end process read_mux;
+ --
+ -----------------------------------------------------------------------------
+
+
+ -----------------------------------------------------------------------------
+ -- JOP pin defaults
+ -----------------------------------------------------------------------------
+ -- UART
+ txd_o <= '1';
+ rts_o <= '1';
+ -- RAMA
+ rama_a_o <= addr_s(17 downto 0);
+ rama_d_b <= dout_s
+ when rama_d_en_q = '1' else
+ (others => 'Z');
+ rama_cs_n_o <= rama_cs_n_q;
+ rama_oe_n_o <= rama_oe_n_q;
+ rama_we_n_o <= rama_we_n_q;
+ rama_lb_n_o <= rama_lb_n_q;
+ rama_ub_n_o <= rama_ub_n_q;
+ -- RAMB
+ ramb_a_o <= addr_s(17 downto 0);
+ ramb_d_b <= dout_s
+ when ramb_d_en_q = '1' else
+ (others => 'Z');
+ ramb_cs_n_o <= ramb_cs_n_q;
+ ramb_oe_n_o <= ramb_oe_n_q;
+ ramb_we_n_o <= ramb_we_n_q;
+ ramb_lb_n_o <= ramb_lb_n_q;
+ ramb_ub_n_o <= ramb_ub_n_q;
+ -- Flash
+ fl_a_o <= addr_s(18 downto 0);
+ fl_d_b <= dout_s(7 downto 0)
+ when fl_d_en_q = '1' else
+ (others => 'Z');
+ fl_we_n_o <= fl_we_n_q;
+ fl_oe_n_o <= fl_oe_n_q;
+ fl_cs_n_o <= fl_cs_n_q;
+ fl_cs2_n_o <= '1';
+ -- Misc
+ rgb_r_o <= (others => '0');
+ rgb_g_o <= (others => '0');
+ rgb_b_o <= (others => '0');
+ comp_sync_n_o <= '0';
+ audio_l_o <= '0';
+ audio_r_o <= '0';
+ audio_o <= (others => '0');
+ pad_clk_o <= '0';
+ pad_latch_o <= '0';
+
+end struct;
--- /dev/null
+-------------------------------------------------------------------------------
+--
+-- $Id$
+--
+-- This program is free software; you can redistribute it and/or
+-- modify it under the terms of the GNU General Public License
+-- as published by the Free Software Foundation; either version 2
+-- of the License, or (at your option) any later version.
+--
+-- This program is distributed in the hope that it will be useful,
+-- but WITHOUT ANY WARRANTY; without even the implied warranty of
+-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+-- GNU General Public License for more details.
+--
+-- You should have received a copy of the GNU General Public License
+-- along with this program; if not, write to the Free Software
+-- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+-- 02111-1307, USA.
+--
+-- Written by Arnim Laeuger <arniml@users.sourceforge.net>, 2008.
+--
+-------------------------------------------------------------------------------
+
+library ieee;
+use ieee.std_logic_1164.all;
+
+use work.fjmem_config_pack.all;
+
+package fjmem_pack is
+
+ -----------------------------------------------------------------------------
+ -- Constants that build the shift register
+ --
+ constant shift_instr_pos_c : natural := 0;
+ constant shift_instr_width_c : natural := 3;
+ constant shift_ack_pos_c : natural := shift_instr_pos_c + shift_instr_width_c;
+ constant shift_ack_width_c : natural := 1;
+ constant shift_block_pos_c : natural := shift_ack_pos_c + shift_ack_width_c;
+ constant shift_block_width_c : natural := num_block_field_c;
+ constant shift_addr_pos_c : natural := shift_block_pos_c + shift_block_width_c;
+ constant shift_addr_width_c : natural := max_addr_width_c;
+ constant shift_data_pos_c : natural := shift_addr_pos_c + shift_addr_width_c;
+ constant shift_data_width_c : natural := max_data_width_c;
+ constant shift_width_c : natural := shift_data_pos_c + shift_data_width_c;
+ --
+ subtype instr_range_t is natural range shift_instr_width_c-1 downto 0;
+ subtype block_range_t is natural range shift_block_pos_c+shift_block_width_c-1 downto shift_block_pos_c;
+ subtype addr_range_t is natural range shift_addr_pos_c+shift_addr_width_c-1 downto shift_addr_pos_c;
+ subtype data_range_t is natural range shift_data_pos_c+shift_data_width_c-1 downto shift_data_pos_c;
+ subtype shift_range_t is natural range shift_width_c-1 downto 0;
+ --
+ -----------------------------------------------------------------------------
+
+
+ -----------------------------------------------------------------------------
+ -- Instruction constants
+ --
+ constant instr_idle_c : std_logic_vector(instr_range_t) := "000";
+ constant instr_detect_c : std_logic_vector(instr_range_t) := "111";
+ constant instr_query_c : std_logic_vector(instr_range_t) := "110";
+ constant instr_read_c : std_logic_vector(instr_range_t) := "001";
+ constant instr_write_c : std_logic_vector(instr_range_t) := "010";
+ --
+ -----------------------------------------------------------------------------
+
+end;
--- /dev/null
+-------------------------------------------------------------------------------
+--
+-- $Id$
+--
+-- This program is free software; you can redistribute it and/or
+-- modify it under the terms of the GNU General Public License
+-- as published by the Free Software Foundation; either version 2
+-- of the License, or (at your option) any later version.
+--
+-- This program is distributed in the hope that it will be useful,
+-- but WITHOUT ANY WARRANTY; without even the implied warranty of
+-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+-- GNU General Public License for more details.
+--
+-- You should have received a copy of the GNU General Public License
+-- along with this program; if not, write to the Free Software
+-- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+-- 02111-1307, USA.
+--
+-- Written by Arnim Laeuger <arniml@users.sourceforge.net>, 2008.
+--
+-------------------------------------------------------------------------------
+
+library ieee;
+use ieee.std_logic_1164.all;
+
+entity fjmem_spartan3 is
+
+ port (
+ -- Zefant-DDR FPGA Module Peripherals -----------------------------------
+ -- Clock oscillator
+ osc1 : in std_logic;
+
+ -- Flash Memory
+ fl_a : out std_logic_vector(24 downto 0);
+ fl_d : inout std_logic_vector(15 downto 0);
+ fl_ce_n : out std_logic;
+ fl_oe_n : out std_logic;
+ fl_we_n : out std_logic;
+ fl_byte_n : out std_logic;
+ fl_rp_n : out std_logic;
+ fl_sts : in std_logic;
+
+ -- FPGA dedicated/dual purpose pins
+ fpga_cs_b : inout std_logic;
+ fpga_dout_busy : inout std_logic;
+ fpga_init_b : inout std_logic;
+ fpga_rdwr_b : inout std_logic;
+
+ fpga_cpld_io : inout std_logic_vector(7 downto 0);
+
+ -- SRAM 0
+ sr0_a : out std_logic_vector(17 downto 0);
+ sr0_d : inout std_logic_vector(15 downto 0);
+ sr0_ce_n : out std_logic;
+ sr0_lb_n : out std_logic;
+ sr0_oe_n : out std_logic;
+ sr0_ub_n : out std_logic;
+ sr0_we_n : out std_logic;
+ -- SRAM 1
+ sr1_a : out std_logic_vector(17 downto 0);
+ sr1_d : inout std_logic_vector(15 downto 0);
+ sr1_ce_n : out std_logic;
+ sr1_lb_n : out std_logic;
+ sr1_oe_n : out std_logic;
+ sr1_ub_n : out std_logic;
+ sr1_we_n : out std_logic;
+
+ -- Zefant-XS3 Baseboard Peripherals -----------------------------------
+ -- EEPROM
+ ee_cs_n : out std_logic;
+ ee_sck : out std_logic;
+ ee_si : out std_logic;
+ ee_so : in std_logic;
+
+ -- User Interface
+ button : in std_logic_vector(5 downto 0);
+ led : out std_logic_vector(5 downto 0);
+
+ -- Audio Codec
+ aud_sdata_in : in std_logic;
+ aud_sdata_out : out std_logic;
+ aud_bit_clk : in std_logic;
+ aud_cin : out std_logic;
+ aud_reset_n : out std_logic;
+ aud_sync : out std_logic;
+
+ -- Video DAC
+ vid_blank : out std_logic;
+ vid_clk : out std_logic;
+ vid_r : out std_logic_vector(7 downto 0);
+ vid_g : out std_logic_vector(7 downto 0);
+ vid_b : out std_logic_vector(7 downto 0);
+ vid_hsync : out std_logic;
+ vid_psave_n : out std_logic;
+ vid_sync_n : out std_logic;
+ vid_vsync : out std_logic;
+
+ -- Extension Connectors
+ x301 : inout std_logic_vector(19 downto 2);
+ x303 : inout std_logic_vector(30 downto 1);
+
+ -- RS 232
+ rs232_rxd : in std_logic_vector(1 downto 0);
+ rs232_txd : out std_logic_vector(1 downto 0);
+ rs232_cts : in std_logic_vector(1 downto 0);
+ rs232_rts : out std_logic_vector(1 downto 0);
+
+ -- USB
+ usb_rcv : in std_logic;
+ usb_vp : in std_logic;
+ usb_vm : in std_logic;
+ usb_vbus : in std_logic;
+ usb_oe_n : out std_logic;
+ usb_softcon : out std_logic;
+ usb_suspnd : out std_logic;
+ usb_vmo : out std_logic;
+ usb_vpo : out std_logic
+ );
+
+end fjmem_spartan3;
+
+
+library ieee;
+use ieee.numeric_std.all;
+
+use work.fjmem_config_pack.all;
+
+architecture struct of fjmem_spartan3 is
+
+ component fjmem_core
+ port (
+ clkdr_i : in std_logic;
+ trst_i : in std_logic;
+ shift_i : in std_logic;
+ update_i : in std_logic;
+ tdi_i : in std_logic;
+ tdo_o : out std_logic;
+ clk_i : in std_logic;
+ res_i : in std_logic;
+ strobe_o : out std_logic;
+ read_o : out std_logic;
+ write_o : out std_logic;
+ ack_i : in std_logic;
+ cs_o : out std_logic_vector(num_blocks_c-1 downto 0);
+ addr_o : out std_logic_vector(max_addr_width_c-1 downto 0);
+ din_i : in std_logic_vector(max_data_width_c-1 downto 0);
+ dout_o : out std_logic_vector(max_data_width_c-1 downto 0)
+ );
+ end component;
+
+ component BSCAN_SPARTAN3
+ port (
+ CAPTURE : out std_ulogic := 'H';
+ DRCK1 : out std_ulogic := 'L';
+ DRCK2 : out std_ulogic := 'L';
+ RESET : out std_ulogic := 'L';
+ SEL1 : out std_ulogic := 'L';
+ SEL2 : out std_ulogic := 'L';
+ SHIFT : out std_ulogic := 'L';
+ TDI : out std_ulogic := 'L';
+ UPDATE : out std_ulogic := 'L';
+ TDO1 : in std_ulogic := 'X';
+ TDO2 : in std_ulogic := 'X'
+ );
+ end component;
+
+
+ component generic_ram_ena
+ generic (
+ addr_width_g : integer := 10;
+ data_width_g : integer := 8
+ );
+ port (
+ clk_i : in std_logic;
+ a_i : in std_logic_vector(addr_width_g-1 downto 0);
+ we_i : in std_logic;
+ ena_i : in std_logic;
+ d_i : in std_logic_vector(data_width_g-1 downto 0);
+ d_o : out std_logic_vector(data_width_g-1 downto 0)
+ );
+ end component;
+
+ signal tdi_s,
+ tdo_s : std_logic;
+ signal clkdr_s,
+ trst_s,
+ shift_s,
+ update_s : std_logic;
+
+ signal addr_s : std_logic_vector(max_addr_width_c-1 downto 0);
+ signal din_s,
+ dout_s : std_logic_vector(max_data_width_c-1 downto 0);
+
+ signal res_s : std_logic;
+
+ signal read_s,
+ write_s,
+ strobe_s : std_logic;
+ signal cs_s : std_logic_vector(3 downto 0);
+ signal ack_q : std_logic;
+
+ type state_t is (IDLE,
+ READ_WAIT,
+ WRITE_DRIVE,
+ WRITE_WAIT,
+ WRITE_FINISH);
+ signal state_q : state_t;
+
+ signal cnt_q : unsigned(2 downto 0);
+
+ signal fl_ce_n_q,
+ fl_oe_n_q,
+ fl_we_n_q,
+ fl_d_en_q : std_logic;
+ signal sr0_ce_n_q,
+ sr0_oe_n_q,
+ sr0_we_n_q,
+ sr0_lb_n_q,
+ sr0_ub_n_q,
+ sr0_d_en_q : std_logic;
+ signal sr1_ce_n_q,
+ sr1_oe_n_q,
+ sr1_we_n_q,
+ sr1_lb_n_q,
+ sr1_ub_n_q,
+ sr1_d_en_q : std_logic;
+
+ signal en_emb_rams_s : std_logic;
+ signal d_from_emb_ram_s : std_logic_vector(7 downto 0);
+
+ signal vss_s : std_logic;
+
+begin
+
+ vss_s <= '0';
+ res_s <= '0';
+
+
+ bscan_spartan3_b : BSCAN_SPARTAN3
+ port map (
+ CAPTURE => open,
+ DRCK1 => clkdr_s,
+ DRCK2 => open,
+ RESET => open, --trst_s,
+ SEL1 => open,
+ SEL2 => open,
+ SHIFT => shift_s,
+ TDI => tdi_s,
+ UPDATE => update_s,
+ TDO1 => tdo_s,
+ TDO2 => vss_s
+ );
+ trst_s <= '0';
+
+
+ fjmem_core_b : fjmem_core
+ port map (
+ clkdr_i => clkdr_s,
+ trst_i => trst_s,
+ shift_i => shift_s,
+ update_i => update_s,
+ tdi_i => tdi_s,
+ tdo_o => tdo_s,
+ clk_i => osc1,
+ res_i => res_s,
+ strobe_o => strobe_s,
+ read_o => read_s,
+ write_o => write_s,
+ ack_i => ack_q,
+ cs_o => cs_s,
+ addr_o => addr_s,
+ din_i => din_s,
+ dout_o => dout_s
+ );
+
+
+ -----------------------------------------------------------------------------
+ -- Process mem_ctrl
+ --
+ -- Purpose:
+ -- Handles access to external memory.
+ --
+ mem_ctrl: process (res_s, osc1)
+ begin
+ if res_s = '1' then
+ -- Flash
+ fl_ce_n_q <= '1';
+ fl_oe_n_q <= '1';
+ fl_we_n_q <= '1';
+ fl_d_en_q <= '0';
+ -- RAM0
+ sr0_ce_n_q <= '1';
+ sr0_oe_n_q <= '1';
+ sr0_we_n_q <= '1';
+ sr0_lb_n_q <= '1';
+ sr0_ub_n_q <= '1';
+ sr0_d_en_q <= '0';
+ -- RAM1
+ sr1_ce_n_q <= '1';
+ sr1_oe_n_q <= '1';
+ sr1_we_n_q <= '1';
+ sr1_lb_n_q <= '1';
+ sr1_ub_n_q <= '1';
+ sr1_d_en_q <= '0';
+
+ ack_q <= '0';
+
+ state_q <= IDLE;
+ cnt_q <= (others => '0');
+
+ elsif rising_edge(osc1) then
+ case state_q is
+ when IDLE =>
+ if strobe_s = '1' then
+ if write_s = '1' then
+ state_q <= WRITE_DRIVE;
+ else
+ state_q <= READ_WAIT;
+ ack_q <= '1';
+ end if;
+
+ case cs_s is
+ -- Flash
+ when "0001" =>
+ fl_ce_n_q <= '0';
+ if read_s = '1' then
+ fl_oe_n_q <= '0';
+ -- start counter on read
+ cnt_q <= (others => '1');
+ end if;
+ if write_s = '1' then
+ fl_d_en_q <= '1';
+ end if;
+
+ -- RAM0
+ when "0010" =>
+ sr0_ce_n_q <= '0';
+ sr0_lb_n_q <= '0';
+ sr0_ub_n_q <= '0';
+ if read_s = '1' then
+ sr0_oe_n_q <= '0';
+ -- start counter on read
+ cnt_q <= (others => '1');
+ end if;
+ if write_s = '1' then
+ sr0_d_en_q <= '1';
+ end if;
+
+ -- RAM1
+ when "0100" =>
+ sr1_ce_n_q <= '0';
+ sr1_lb_n_q <= '0';
+ sr1_ub_n_q <= '0';
+ if read_s = '1' then
+ sr1_oe_n_q <= '0';
+ -- start counter on read
+ cnt_q <= (others => '1');
+ end if;
+ if write_s = '1' then
+ sr1_d_en_q <= '1';
+ end if;
+
+ -- unimlemented / invalid
+ when others =>
+ null;
+
+ end case;
+ end if;
+
+ when READ_WAIT =>
+ if cnt_q = 0 then
+ state_q <= IDLE;
+ ack_q <= '0';
+
+ -- disable all memories
+ fl_ce_n_q <= '1';
+ fl_oe_n_q <= '1';
+ sr0_ce_n_q <= '1';
+ sr0_oe_n_q <= '1';
+ sr0_lb_n_q <= '1';
+ sr0_ub_n_q <= '1';
+ sr1_ce_n_q <= '1';
+ sr1_oe_n_q <= '1';
+ sr1_lb_n_q <= '1';
+ sr1_ub_n_q <= '1';
+ end if;
+
+ when WRITE_DRIVE =>
+ state_q <= WRITE_WAIT;
+
+ -- output drivers are active during this state
+ -- thus we can activate the write impulse at the end
+ case cs_s is
+ when "0001" =>
+ fl_we_n_q <= '0';
+ -- start counter
+ cnt_q <= (others => '1');
+ when "0010" =>
+ sr0_we_n_q <= '0';
+ -- start counter
+ cnt_q <= (others => '1');
+ when "0100" =>
+ sr1_we_n_q <= '0';
+ -- start counter
+ cnt_q <= (others => '1');
+ when others =>
+ null;
+ end case;
+
+ when WRITE_WAIT =>
+ if cnt_q = 0 then
+ state_q <= WRITE_FINISH;
+ ack_q <= '0';
+
+ -- disable write signals
+ fl_we_n_q <= '1';
+ sr0_we_n_q <= '1';
+ sr1_we_n_q <= '1';
+ end if;
+
+ when WRITE_FINISH =>
+ state_q <= IDLE;
+
+ -- disable output enables
+ fl_d_en_q <= '0';
+ sr0_d_en_q <= '0';
+ sr1_d_en_q <= '0';
+ -- disable all memories
+ fl_ce_n_q <= '1';
+ fl_oe_n_q <= '1';
+ sr0_ce_n_q <= '1';
+ sr0_oe_n_q <= '1';
+ sr0_lb_n_q <= '1';
+ sr0_ub_n_q <= '1';
+ sr1_ce_n_q <= '1';
+ sr1_oe_n_q <= '1';
+ sr1_lb_n_q <= '1';
+ sr1_ub_n_q <= '1';
+
+ when others =>
+ state_q <= IDLE;
+
+ end case;
+
+ if cnt_q /= 0 then
+ cnt_q <= cnt_q - 1;
+ end if;
+
+ end if;
+ end process mem_ctrl;
+ --
+ -----------------------------------------------------------------------------
+
+
+ -----------------------------------------------------------------------------
+ -- An embedded RAM
+ -----------------------------------------------------------------------------
+ en_emb_rams_s <= cs_s(3) and strobe_s;
+ --
+ emb_ram_b : generic_ram_ena
+ generic map (
+ addr_width_g => 8,
+ data_width_g => 8
+ )
+ port map (
+ clk_i => osc1,
+ a_i => addr_s(7 downto 0),
+ we_i => write_s,
+ ena_i => en_emb_rams_s,
+ d_i => dout_s(7 downto 0),
+ d_o => d_from_emb_ram_s
+ );
+
+
+ -----------------------------------------------------------------------------
+ -- Process read_mux
+ --
+ -- Purpose:
+ -- Read multiplexer from memory to jop_core.
+ --
+ read_mux: process (cs_s,
+ fl_d, sr0_d, sr1_d,
+ d_from_emb_ram_s)
+ variable din_v : std_logic_vector(din_s'range);
+ begin
+ din_v := (others => '0');
+
+ if cs_s(0) = '1' then
+ din_v := din_v or fl_d;
+ end if;
+ if cs_s(1) = '1' then
+ din_v := din_v or sr0_d;
+ end if;
+ if cs_s(2) = '1' then
+ din_v := din_v or sr1_d;
+ end if;
+ if cs_s(3) = '1' then
+ din_v(7 downto 0) := din_v(7 downto 0) or d_from_emb_ram_s;
+ end if;
+
+ din_s <= din_v;
+ end process read_mux;
+ --
+ -----------------------------------------------------------------------------
+
+
+ -----------------------------------------------------------------------------
+ -- Pin defaults
+ -----------------------------------------------------------------------------
+ -- Flash Memory -------------------------------------------------------------
+ fl_addr: process (addr_s)
+ begin
+ fl_a <= (others => '0');
+ fl_a(24 downto 1) <= addr_s;
+ end process fl_addr;
+ fl_d <= dout_s
+ when fl_d_en_q = '1' else
+ (others => 'Z');
+ fl_ce_n <= fl_ce_n_q;
+ fl_oe_n <= fl_oe_n_q;
+ fl_we_n <= fl_we_n_q;
+ fl_byte_n <= '1';
+ fl_rp_n <= '1';
+
+ fpga_cs_b <= 'Z';
+ fpga_dout_busy <= 'Z';
+ fpga_init_b <= 'Z';
+ fpga_rdwr_b <= 'Z';
+
+ fpga_cpld_io(7 downto 2) <= (others => 'Z');
+
+-- cpld_clk <= '0';
+ -- same pin assigned clkd_clk <=> x303(30)
+ x303(30) <= '0';
+
+ -- SRAMs in SO-DIMM Socket --------------------------------------------------
+ sr0_a <= addr_s(17 downto 0);
+ sr0_d <= dout_s
+ when sr0_d_en_q = '1' else
+ (others => 'Z');
+ sr0_ce_n <= sr0_ce_n_q;
+ sr0_lb_n <= sr0_lb_n_q;
+ sr0_oe_n <= sr0_oe_n_q;
+ sr0_ub_n <= sr0_ub_n_q;
+ sr0_we_n <= sr0_we_n_q;
+ sr1_a <= addr_s(17 downto 0);
+ sr1_d <= dout_s
+ when sr1_d_en_q = '1' else
+ (others => 'Z');
+ sr1_ce_n <= sr1_ce_n_q;
+ sr1_lb_n <= sr1_lb_n_q;
+ sr1_oe_n <= sr1_oe_n_q;
+ sr1_ub_n <= sr1_ub_n_q;
+ sr1_we_n <= sr1_we_n_q;
+
+ -- Baseboard EEPROM ---------------------------------------------------------
+ ee_cs_n <= '1';
+ ee_sck <= '0';
+ ee_si <= '0';
+
+ -- User Interface -----------------------------------------------------------
+ led <= (others => '0');
+
+ -- Audio Codec --------------------------------------------------------------
+ aud_sdata_out <= '0';
+ aud_cin <= '0';
+ aud_reset_n <= '0';
+ aud_sync <= '0';
+
+ -- Video DAC ----------------------------------------------------------------
+ vid_blank <= '1';
+ vid_clk <= '0';
+ vid_r <= (others => '0');
+ vid_g <= (others => '0');
+ vid_b <= (others => '0');
+ vid_hsync <= '0';
+ vid_psave_n <= '1';
+ vid_sync_n <= '0';
+ vid_vsync <= '0';
+
+ -- Extension Connectors -----------------------------------------------------
+ x301 <= (others => 'Z');
+ x303 <= (others => 'Z');
+
+ -- RS 232 -------------------------------------------------------------------
+ rs232_txd <= (others => '1');
+ rs232_rts <= (others => '1');
+
+ -- USB ----------------------------------------------------------------------
+ usb_oe_n <= '1';
+ usb_softcon <= '0';
+ usb_suspnd <= '1';
+ usb_vmo <= '0';
+ usb_vpo <= '1';
+
+end struct;
--- /dev/null
+-------------------------------------------------------------------------------
+--
+-- Parametrizable, generic RAM with enable.
+--
+-- $Id$
+--
+-- Copyright (c) 2006 Arnim Laeuger (arniml@opencores.org)
+--
+-- All rights reserved
+--
+-- Redistribution and use in source and synthezised forms, with or without
+-- modification, are permitted provided that the following conditions are met:
+--
+-- Redistributions of source code must retain the above copyright notice,
+-- this list of conditions and the following disclaimer.
+--
+-- Redistributions in synthesized form must reproduce the above copyright
+-- notice, this list of conditions and the following disclaimer in the
+-- documentation and/or other materials provided with the distribution.
+--
+-- Neither the name of the author nor the names of other contributors may
+-- be used to endorse or promote products derived from this software without
+-- specific prior written permission.
+--
+-- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+-- AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+-- THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+-- PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE
+-- LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+-- CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+-- SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+-- INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+-- CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+-- ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+-- POSSIBILITY OF SUCH DAMAGE.
+--
+-- Please report bugs to the author, but before you do so, please
+-- make sure that this is not a derivative work and that
+-- you have the latest version of this file.
+--
+-- The latest version of this file can be found at:
+-- http://www.opencores.org/cvsweb.shtml/t48/
+--
+-------------------------------------------------------------------------------
+
+library ieee;
+use ieee.std_logic_1164.all;
+
+entity generic_ram_ena is
+
+ generic (
+ addr_width_g : integer := 10;
+ data_width_g : integer := 8
+ );
+ port (
+ clk_i : in std_logic;
+ a_i : in std_logic_vector(addr_width_g-1 downto 0);
+ we_i : in std_logic;
+ ena_i : in std_logic;
+ d_i : in std_logic_vector(data_width_g-1 downto 0);
+ d_o : out std_logic_vector(data_width_g-1 downto 0)
+ );
+
+end generic_ram_ena;
+
+
+library ieee;
+use ieee.numeric_std.all;
+
+architecture rtl of generic_ram_ena is
+
+ type mem_t is array (natural range 0 to 2**addr_width_g-1) of
+ std_logic_vector(d_i'range);
+ signal mem_q : mem_t
+ -- pragma translate_off
+ := (others => (others => '0'))
+ -- pragma translate_on
+ ;
+ signal a_q : std_logic_vector(a_i'range);
+
+begin
+
+ mem: process (clk_i)
+ begin
+
+ if clk_i'event and clk_i = '1' then
+ if ena_i = '1' then
+ if we_i = '1' then
+ mem_q(to_integer(unsigned(a_i))) <= d_i;
+ end if;
+
+ a_q <= a_i;
+ end if;
+
+ d_o <= mem_q(to_integer(unsigned(a_i)));
+ end if;
+ end process mem;
+
+end rtl;
--- /dev/null
+Makefile
+Makefile.in
--- /dev/null
+#
+# $Id$
+#
+# Copyright (C) 2002 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Marcel Telka <marcel@telka.sk>, 2002.
+#
+
+include $(top_srcdir)/Makefile.rules
+
+pkginclude_HEADERS = \
+ bitmask.h \
+ bsbit.h \
+ bsdl.h \
+ bsdl_mode.h \
+ bssignal.h \
+ bus.h \
+ bus_driver.h \
+ cable.h \
+ chain.h \
+ cmd.h \
+ data_register.h \
+ error.h \
+ fclock.h \
+ flash.h \
+ gettext.h \
+ jim.h \
+ jtag.h \
+ log.h \
+ params.h \
+ parport.h \
+ part.h \
+ part_instruction.h \
+ pod.h \
+ tap_register.h \
+ tap_state.h \
+ tap.h \
+ svf.h \
+ types.h \
+ urjtag.h \
+ usbconn.h \
+ xpcu.h
--- /dev/null
+/*
+ * $Id$
+ *
+ * Common header file
+ * Copyright (C) 2002 ETC s.r.o.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the ETC s.r.o. nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2002.
+ *
+ */
+
+/* @@@@ RFHH candidate to move to internal include file, and */
+/* @@@@ RFHH the definition of URJ_BIT(b) should go into types.h */
+
+#ifndef URJ_BITMASK_H
+#define URJ_BITMASK_H
+
+#ifdef UNUSED /* RFHH */
+/* @@@@ RFHH remove? */
+#ifndef LANGUAGE
+# ifdef __ASSEMBLY__
+# define LANGUAGE ASM
+# else
+# define LANGUAGE C
+# endif
+#endif
+
+/* @@@@ RFHH remove? */
+#ifndef ASM
+#define ASM 0
+#endif
+
+/* @@@@ RFHH remove? */
+#ifndef C
+#define C 1
+#endif
+#endif /* def UNUSED */
+
+#define URJ_MAX_BITS_ABS_VAL 1024
+#define URJ_BITS_ABS(a) (((((a) + URJ_MAX_BITS_ABS_VAL) / URJ_MAX_BITS_ABS_VAL) * 2 - 1) * (a))
+#define URJ_BITS_MIN(a,b) (((a) + (b) - URJ_BITS_ABS((a) - (b))) / 2)
+
+#define URJ_BIT(b) (1 << (b))
+#define URJ_BITS(b1,b2) (((2 << URJ_BITS_ABS((b1) - (b2))) - 1) << URJ_BITS_MIN(b1,b2))
+#define URJ_BITS_VAL(b1,b2,v) (((v) << URJ_BITS_MIN(b1,b2)) & URJ_BITS (b1,b2))
+#define URJ_BITS_GET(b1,b2,v) (((v) & URJ_BITS (b1,b2)) >> URJ_BITS_MIN(b1,b2))
+
+#endif /* URJ_BITMASK_H */
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2002 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2002.
+ *
+ */
+
+#ifndef URJ_BSBIT_BSBIT_H
+#define URJ_BSBIT_BSBIT_H
+
+#include "types.h"
+
+#define URJ_BSBIT_INPUT 1
+#define URJ_BSBIT_OUTPUT 2
+#define URJ_BSBIT_CONTROL 3
+#define URJ_BSBIT_INTERNAL 4
+#define URJ_BSBIT_BIDIR 5
+
+#define URJ_BSBIT_STATE_Z (-1)
+
+#define URJ_BSBIT_DONTCARE '?'
+
+struct URJ_BSBIT
+{
+ int bit;
+ char *name;
+ int type;
+ urj_part_signal_t *signal;
+ int safe; /* safe value */
+ int control; /* -1 for none */
+ int control_value;
+ int control_state;
+};
+
+/**
+ * Define new BSR (Boundary Scan Register) bit for signal <code>name</code>.
+ *
+ * @param part
+ * @param bit
+ * @param name associated signal name
+ * @param type URJ_BSBIT_{INPUT|OUTPUT|BIDIR|CONTROL|INTERNAL}
+ * @param safe default (safe) value (0|1|URJ_BSBIT_DONTCARE)
+ *
+ * @return URJ_STATUS_OK on success; URJ_STATUS_FAIL on error
+ */
+int urj_part_bsbit_alloc (urj_part_t *part, int bit, const char *name,
+ int type, int safe);
+/**
+ * Define new BSR (Boundary Scan Register) bit for signal <code>name</code>.
+ * Additionally, define control bit.
+ *
+ * @param part
+ * @param bit
+ * @param name associated signal name
+ * @param type URJ_BSBIT_{INPUT|OUTPUT|BIDIR|CONTROL|INTERNAL}
+ * @param safe default (safe) value (0|1|URJ_BSBIT_DONTCARE)
+ * @param ctrl_num control bit number
+ * @param ctrl_val control value
+ * @param ctrl_state control state; valid statis is only URJ_BSBIT_STATE_Z
+ *
+ * @return URJ_STATUS_OK on success; URJ_STATUS_FAIL on error
+ */
+int urj_part_bsbit_alloc_control (urj_part_t *part, int bit, const char *name,
+ int type, int safe, int ctrl_num,
+ int ctrl_val, int ctrl_state);
+
+void urj_part_bsbit_free (urj_bsbit_t *b);
+
+#endif /* URJ_BSBIT_BSBIT_H */
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2007, Arnim Laeuger
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Arnim Laeuger <arniml@users.sourceforge.net>, 2007.
+ *
+ */
+
+#ifndef URJ_BSDL_BSDL_H
+#define URJ_BSDL_BSDL_H
+
+#include "types.h"
+
+#include "bsdl_mode.h"
+
+typedef struct
+{
+ char **path_list;
+ int debug;
+}
+urj_bsdl_globs_t;
+
+#define URJ_BSDL_GLOBS_INIT(bsdl) \
+ do { \
+ bsdl.path_list = NULL; \
+ bsdl.debug = 0; \
+ } while (0)
+
+/* @@@@ RFHH ToDo: let urj_bsdl_read_file also return URJ_STATUS_... */
+/**
+ * @return
+ * < 0 : Error occured, parse/syntax problems or out of memory
+ * = 0 : No errors, idcode not checked or mismatching
+ * > 0 : No errors, idcode checked and matched
+ */
+int urj_bsdl_read_file (urj_chain_t *, const char *, int, const char *);
+void urj_bsdl_set_path (urj_chain_t *, const char *);
+/* @@@@ RFHH ToDo: let urj_bsdl_scan_files also return URJ_STATUS_... */
+/**
+ * @return
+ * < 0 : Error occured, parse/syntax problems or out of memory
+ * = 0 : No errors, idcode not checked or mismatching
+ * > 0 : No errors, idcode checked and matched
+ */
+int urj_bsdl_scan_files (urj_chain_t *, const char *, int);
+
+#endif /* URJ_BSDL_BSDL_H */
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2008, Arnim Laeuger
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Arnim Laeuger <arniml@users.sourceforge.net>, 2008.
+ *
+ */
+
+#ifndef URJ_BSDL_MODE_H
+#define URJ_BSDL_MODE_H
+
+#define URJ_BSDL_MODE_MSG_NOTE (1 << 0)
+#define URJ_BSDL_MODE_MSG_WARN (1 << 1)
+#define URJ_BSDL_MODE_MSG_ERR (1 << 2)
+#define URJ_BSDL_MODE_MSG_FATAL (1 << 3)
+
+#define URJ_BSDL_MODE_MSG_ALL (URJ_BSDL_MODE_MSG_FATAL | \
+ URJ_BSDL_MODE_MSG_ERR | \
+ URJ_BSDL_MODE_MSG_WARN | \
+ URJ_BSDL_MODE_MSG_NOTE)
+#define URJ_BSDL_MODE_MSG_ALWAYS URJ_BSDL_MODE_MSG_FATAL
+
+#define URJ_BSDL_MODE_SYN_CHECK (1 << 4)
+#define URJ_BSDL_MODE_INSTR_PRINT (1 << 5)
+#define URJ_BSDL_MODE_INSTR_EXEC (1 << 6)
+#define URJ_BSDL_MODE_IDCODE_CHECK (1 << 7)
+#define URJ_BSDL_MODE_ACTION_ALL (URJ_BSDL_MODE_SYN_CHECK | \
+ URJ_BSDL_MODE_INSTR_PRINT | \
+ URJ_BSDL_MODE_INSTR_EXEC | \
+ URJ_BSDL_MODE_IDCODE_CHECK)
+
+#define URJ_BSDL_MODE_INCLUDE1 (URJ_BSDL_MODE_MSG_ALWAYS)
+#define URJ_BSDL_MODE_INCLUDE2 (URJ_BSDL_MODE_SYN_CHECK | \
+ URJ_BSDL_MODE_INSTR_EXEC | \
+ URJ_BSDL_MODE_MSG_WARN | \
+ URJ_BSDL_MODE_MSG_ERR | \
+ URJ_BSDL_MODE_MSG_FATAL)
+#define URJ_BSDL_MODE_DETECT (URJ_BSDL_MODE_SYN_CHECK | \
+ URJ_BSDL_MODE_INSTR_EXEC | \
+ URJ_BSDL_MODE_IDCODE_CHECK | \
+ URJ_BSDL_MODE_MSG_ALWAYS)
+#define URJ_BSDL_MODE_TEST (URJ_BSDL_MODE_SYN_CHECK | \
+ URJ_BSDL_MODE_MSG_ALL)
+#define URJ_BSDL_MODE_DUMP (URJ_BSDL_MODE_SYN_CHECK | \
+ URJ_BSDL_MODE_INSTR_PRINT | \
+ URJ_BSDL_MODE_MSG_WARN | \
+ URJ_BSDL_MODE_MSG_ERR | \
+ URJ_BSDL_MODE_MSG_FATAL)
+
+#endif /* URJ_BSDL_MODE_H */
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2002 ETC s.r.o.
+ * Copyright (C) 2003 Marcel Telka
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2002, 2003.
+ *
+ */
+
+#ifndef URJ_BSSIGNAL_H
+#define URJ_BSSIGNAL_H
+
+#include "types.h"
+
+struct URJ_PART_SIGNAL
+{
+ char *name;
+ char *pin; /* djf hack pin number from bsdl */
+ urj_part_signal_t *next;
+ urj_bsbit_t *input;
+ urj_bsbit_t *output;
+};
+
+struct URJ_PART_SALIAS
+{
+ char *name;
+ urj_part_salias_t *next;
+ urj_part_signal_t *signal;
+};
+
+urj_part_signal_t *urj_part_signal_alloc (const char *name);
+void urj_part_signal_free (urj_part_signal_t *s);
+
+urj_part_salias_t *urj_part_salias_alloc (const char *name,
+ const urj_part_signal_t *signal);
+void urj_part_salias_free (urj_part_salias_t *salias);
+
+/**
+ * Define a signal and its associated pin (name)
+ */
+urj_part_signal_t *urj_part_signal_define_pin (urj_chain_t *chain,
+ const char *signal_name,
+ const char *pin_name);
+/**
+ * Define a signal without pin (name)
+ */
+urj_part_signal_t *urj_part_signal_define (urj_chain_t *chain,
+ const char *signal_name);
+/**
+ * Redefine the pin name for a signal
+ */
+int urj_part_signal_redefine_pin (urj_chain_t *chain, urj_part_signal_t *s,
+ const char *pin_name);
+
+#endif /* URJ_BSSIGNAL_H */
--- /dev/null
+/*
+ * $Id$
+ *
+ * Bus driver interface
+ * Copyright (C) 2002 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2002.
+ *
+ */
+
+#ifndef URJ_BUS_H
+#define URJ_BUS_H
+
+#include <stdint.h>
+#include <stdio.h>
+
+#include "bus_driver.h"
+
+extern urj_bus_t *urj_bus;
+
+/** @return URJ_STATUS_OK on success; URJ_STATUS_FAIL on error */
+int urj_bus_readmem (urj_bus_t *bus, FILE *f, uint32_t addr, uint32_t len);
+/** @return URJ_STATUS_OK on success; URJ_STATUS_FAIL on error */
+int urj_bus_writemem (urj_bus_t *bus, FILE *f, uint32_t addr, uint32_t len);
+
+typedef struct
+{
+ int len;
+ urj_bus_t **buses;
+}
+urj_buses_t;
+
+extern urj_buses_t urj_buses;
+extern const urj_bus_driver_t *urj_bus_drivers[];
+
+void urj_bus_buses_free (void);
+int urj_bus_buses_add (urj_bus_t *abus);
+int urj_bus_buses_delete (urj_bus_t *abus);
+
+/** set active bus
+ * @param n choose n'th bus in #urj_buses as the active bus
+ * @return URJ_STATUS_OK on success; URJ_STATUS_FAIL on error
+ */
+int urj_bus_buses_set (int n);
+
+#endif /* URJ_BUS_H */
--- /dev/null
+/*
+ * $Id$
+ *
+ * Bus driver interface
+ * Copyright (C) 2002, 2003 ETC s.r.o.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the ETC s.r.o. nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2002, 2003.
+ *
+ */
+
+#ifndef URJ_BUS_DRIVER_BRUX_BUS_H
+#define URJ_BUS_DRIVER_BRUX_BUS_H
+
+#include <stdint.h>
+
+#include "types.h"
+#include "params.h"
+
+typedef struct
+{
+ const char *description;
+ uint32_t start;
+ uint64_t length;
+ unsigned int width;
+}
+urj_bus_area_t;
+
+typedef enum URJ_BUS_PARAM_KEY
+{
+ URJ_BUS_PARAM_KEY_MUX, /* bool mpc5200 */
+ /* avr32: mode = OCD | HSBC | HSBU | x8 | x16 | x32 avr32 */
+ URJ_BUS_PARAM_KEY_OCD, /* bool avr32 */
+ URJ_BUS_PARAM_KEY_HSBC, /* bool avr32 */
+ URJ_BUS_PARAM_KEY_HSBU, /* bool avr32 */
+ URJ_BUS_PARAM_KEY_X8, /* bool avr32 */
+ URJ_BUS_PARAM_KEY_X16, /* bool avr32 */
+ URJ_BUS_PARAM_KEY_X32, /* bool avr32 */
+ URJ_BUS_PARAM_KEY_WIDTH, /* 0=auto 8 16 32 64 */
+ /* aliased as x8 x16 x32 bool avr32 */
+ /* 8 32 64 mpc824 */
+ /* aliased as AMODE prototype */
+ URJ_BUS_PARAM_KEY_OPCODE, /* string fjmem */
+ URJ_BUS_PARAM_KEY_LEN, /* ulong fjmem */
+ URJ_BUS_PARAM_KEY_AMODE, /* alias for WIDTH: 0=auto 8 16 32 prototype */
+ URJ_BUS_PARAM_KEY_ALSB, /* string (= signal name) prototype */
+ URJ_BUS_PARAM_KEY_AMSB, /* string (= signal name) prototype */
+ URJ_BUS_PARAM_KEY_DLSB, /* string (= signal name) prototype */
+ URJ_BUS_PARAM_KEY_DMSB, /* string (= signal name) prototype */
+ URJ_BUS_PARAM_KEY_CS, /* string (= signal name) prototype */
+ URJ_BUS_PARAM_KEY_NCS, /* string (= signal name) prototype */
+ URJ_BUS_PARAM_KEY_OE, /* string (= signal name) prototype */
+ URJ_BUS_PARAM_KEY_NOE, /* string (= signal name) prototype */
+ URJ_BUS_PARAM_KEY_WE, /* string (= signal name) prototype */
+ URJ_BUS_PARAM_KEY_NWE, /* string (= signal name) prototype */
+ URJ_BUS_PARAM_KEY_REVBITS, /* bool mpc824 */
+ URJ_BUS_PARAM_KEY_HELP, /* bool mpc824 */
+ URJ_BUS_PARAM_KEY_DBGaDDR, /* bool mpc824 */
+ URJ_BUS_PARAM_KEY_DBGdATA, /* bool mpc824 */
+}
+urj_bus_param_key_t;
+
+struct URJ_BUS_DRIVER
+{
+ const char *name;
+ const char *description;
+ urj_bus_t *(*new_bus) (urj_chain_t *chain,
+ const urj_bus_driver_t *driver,
+ const urj_param_t *cmd_params[]);
+ void (*free_bus) (urj_bus_t *bus);
+ void (*printinfo) (urj_log_level_t ll, urj_bus_t *bus);
+ void (*prepare) (urj_bus_t *bus);
+ /** @return URJ_STATUS_OK on success; URJ_STATUS_FAIL on error */
+ int (*area) (urj_bus_t *bus, uint32_t adr, urj_bus_area_t *area);
+ /** @return URJ_STATUS_OK on success; URJ_STATUS_FAIL on error */
+ int (*read_start) (urj_bus_t *bus, uint32_t adr);
+ /* @@@@ RFHH need to return status */
+ uint32_t (*read_next) (urj_bus_t *bus, uint32_t adr);
+ /* @@@@ RFHH need to return status */
+ uint32_t (*read_end) (urj_bus_t *bus);
+ /* @@@@ RFHH need to return status */
+ uint32_t (*read) (urj_bus_t *bus, uint32_t adr);
+ /* @@@@ RFHH need to return status */
+ void (*write) (urj_bus_t *bus, uint32_t adr, uint32_t data);
+ int (*init) (urj_bus_t *bus);
+};
+
+struct URJ_BUS
+{
+ urj_chain_t *chain;
+ urj_part_t *part;
+ void *params;
+ int initialized;
+ const urj_bus_driver_t *driver;
+};
+
+
+#define URJ_BUS_PRINTINFO(ll,bus) (bus)->driver->printinfo(ll,bus)
+#define URJ_BUS_PREPARE(bus) (bus)->driver->prepare(bus)
+#define URJ_BUS_AREA(bus,adr,a) (bus)->driver->area(bus,adr,a)
+#define URJ_BUS_READ_START(bus,adr) (bus)->driver->read_start(bus,adr)
+#define URJ_BUS_READ_NEXT(bus,adr) (bus)->driver->read_next(bus,adr)
+#define URJ_BUS_READ_END(bus) (bus)->driver->read_end(bus)
+#define URJ_BUS_READ(bus,adr) (bus)->driver->read(bus,adr)
+#define URJ_BUS_WRITE(bus,adr,data) (bus)->driver->write(bus,adr,data)
+#define URJ_BUS_FREE(bus) (bus)->driver->free_bus(bus)
+#define URJ_BUS_INIT(bus) (bus)->driver->init(bus)
+
+/**
+ * API function to init a bus
+ */
+urj_bus_t *urj_bus_init_bus (urj_chain_t *chain,
+ const urj_bus_driver_t *bus_driver,
+ const urj_param_t *param[]);
+
+/** The list of recognized parameters */
+extern const urj_param_list_t urj_bus_param_list;
+
+#endif /* URJ_BUS_DRIVER_BRUX_BUS_H */
--- /dev/null
+/*
+ * $Id$
+ *
+ * Cable driver interface
+ * Copyright (C) 2003 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2003.
+ *
+ */
+
+#ifndef URJ_CABLE_H
+#define URJ_CABLE_H
+
+#include <stdint.h>
+
+#include "types.h"
+#include "params.h"
+
+#include "parport.h"
+#include "pod.h"
+
+typedef struct URJ_CABLE_DRIVER urj_cable_driver_t;
+
+typedef enum URJ_CABLE_FLUSH_AMOUNT
+{
+ URJ_TAP_CABLE_OPTIONALLY,
+ URJ_TAP_CABLE_TO_OUTPUT,
+ URJ_TAP_CABLE_COMPLETELY
+}
+urj_cable_flush_amount_t;
+
+typedef enum URJ_CABLE_DEVICE_TYPE
+{
+ URJ_CABLE_DEVICE_PARPORT,
+ URJ_CABLE_DEVICE_USB,
+ URJ_CABLE_DEVICE_OTHER,
+}
+urj_cable_device_type_t;
+
+typedef enum URJ_CABLE_PARAM_KEY
+{
+ URJ_CABLE_PARAM_KEY_PID, /* lu generic_usbconn */
+ URJ_CABLE_PARAM_KEY_VID, /* lu generic_usbconn */
+ URJ_CABLE_PARAM_KEY_DESC, /* string generic_usbconn */
+ URJ_CABLE_PARAM_KEY_DRIVER, /* string generic_usbconn */
+ URJ_CABLE_PARAM_KEY_BITMAP, /* string wiggler */
+}
+urj_cable_param_key_t;
+
+struct URJ_CABLE_DRIVER
+{
+ const char *name;
+ const char *description;
+ /** tag for the following union */
+ urj_cable_device_type_t device_type;
+ /** @return URJ_STATUS_OK on success; URJ_STATUS_FAIL on failure */
+ union {
+ int (*parport) (urj_cable_t *cable, urj_cable_parport_devtype_t devtype,
+ const char *devname, const urj_param_t *params[]);
+ int (*usb) (urj_cable_t *cable, const urj_param_t *params[]);
+ int (*other) (urj_cable_t *cable, const urj_param_t *params[]);
+ } connect;
+ void (*disconnect) (urj_cable_t *cable);
+ void (*cable_free) (urj_cable_t *cable);
+ /** @return URJ_STATUS_OK on success; URJ_STATUS_FAIL on failure */
+ int (*init) (urj_cable_t *);
+ void (*done) (urj_cable_t *);
+ void (*set_frequency) (urj_cable_t *, uint32_t freq);
+ void (*clock) (urj_cable_t *, int, int, int);
+ /** @return 0 or 1 on success; -1 on failure */
+ int (*get_tdo) (urj_cable_t *);
+ /** @return nonnegative number, or the number of transferred bits on
+ * success; -1 on failure */
+ int (*transfer) (urj_cable_t *, int, const char *, char *);
+ /** @return 0 or 1 on success; -1 on failure */
+ int (*set_signal) (urj_cable_t *, int, int);
+ /** @return 0 or 1 on success; -1 on failure */
+ int (*get_signal) (urj_cable_t *, urj_pod_sigsel_t);
+ void (*flush) (urj_cable_t *, urj_cable_flush_amount_t);
+ void (*help) (urj_log_level_t ll, const char *);
+};
+
+typedef struct URJ_CABLE_QUEUE urj_cable_queue_t;
+
+struct URJ_CABLE_QUEUE
+{
+ enum
+ {
+ URJ_TAP_CABLE_CLOCK,
+ URJ_TAP_CABLE_GET_TDO,
+ URJ_TAP_CABLE_TRANSFER,
+ URJ_TAP_CABLE_SET_SIGNAL,
+ URJ_TAP_CABLE_GET_SIGNAL
+ } action;
+ union
+ {
+ struct
+ {
+ int tms;
+ int tdi;
+ int n;
+ } clock;
+ struct
+ {
+ urj_pod_sigsel_t sig;
+ int mask;
+ int val;
+ } value;
+ struct
+ {
+ int len;
+ char *in;
+ char *out;
+ } transfer;
+ struct
+ {
+ int len;
+ int res;
+ char *out;
+ } xferred;
+ } arg;
+};
+
+typedef struct URJ_CABLE_QUEUE_INFO urj_cable_queue_info_t;
+
+struct URJ_CABLE_QUEUE_INFO
+{
+ urj_cable_queue_t *data;
+ int max_items;
+ int num_items;
+ int next_item;
+ int next_free;
+};
+
+struct URJ_CABLE
+{
+ urj_cable_driver_t *driver;
+ union
+ {
+ urj_usbconn_t *usb;
+ urj_parport_t *port;
+ void *other;
+ } link;
+ void *params;
+ urj_chain_t *chain;
+ urj_cable_queue_info_t todo;
+ urj_cable_queue_info_t done;
+ uint32_t delay;
+ uint32_t frequency;
+};
+
+void urj_tap_cable_free (urj_cable_t *cable);
+/** @return URJ_STATUS_OK on success; URJ_STATUS_FAIL on failure */
+int urj_tap_cable_init (urj_cable_t *cable);
+void urj_tap_cable_done (urj_cable_t *cable);
+void urj_tap_cable_flush (urj_cable_t *cable,
+ urj_cable_flush_amount_t);
+/** @return URJ_STATUS_OK on success; URJ_STATUS_FAIL on failure */
+void urj_tap_cable_clock (urj_cable_t *cable, int tms, int tdi, int n);
+int urj_tap_cable_defer_clock (urj_cable_t *cable, int tms, int tdi, int n);
+/** @return 0 or 1 on success; -1 on failure */
+int urj_tap_cable_get_tdo (urj_cable_t *cable);
+/** @return 0 or 1 on success; -1 on failure */
+int urj_tap_cable_get_tdo_late (urj_cable_t *cable);
+/** @return URJ_STATUS_OK on success; URJ_STATUS_FAIL on failure */
+int urj_tap_cable_defer_get_tdo (urj_cable_t *cable);
+/** @return 0 or 1 on success; -1 on failure */
+int urj_tap_cable_set_signal (urj_cable_t *cable, int mask, int val);
+/** @return URJ_STATUS_OK on success; URJ_STATUS_FAIL on failure */
+int urj_tap_cable_defer_set_signal (urj_cable_t *cable, int mask, int val);
+/** @return 0 or 1 on success; -1 on failure */
+int urj_tap_cable_get_signal (urj_cable_t *cable, urj_pod_sigsel_t sig);
+/** @return 0 or 1 on success; -1 on failure */
+int urj_tap_cable_get_signal_late (urj_cable_t *cable, urj_pod_sigsel_t sig);
+/** @return URJ_STATUS_OK on success; URJ_STATUS_FAIL on failure */
+int urj_tap_cable_defer_get_signal (urj_cable_t *cable, urj_pod_sigsel_t sig);
+/** @return the number of transferred bits on success; -1 on failure */
+int urj_tap_cable_transfer (urj_cable_t *cable, int len, char *in, char *out);
+/** @return the number of transferred bits on success; -1 on failure */
+int urj_tap_cable_transfer_late (urj_cable_t *cable, char *out);
+/** @return URJ_STATUS_OK on success; URJ_STATUS_FAIL on failure */
+int urj_tap_cable_defer_transfer (urj_cable_t *cable, int len, char *in,
+ char *out);
+
+void urj_tap_cable_set_frequency (urj_cable_t *cable, uint32_t frequency);
+uint32_t urj_tap_cable_get_frequency (urj_cable_t *cable);
+void urj_tap_cable_wait (urj_cable_t *cable);
+void urj_tap_cable_purge_queue (urj_cable_queue_info_t *q, int io);
+/** @return queue item number on success; -1 on failure */
+int urj_tap_cable_add_queue_item (urj_cable_t *cable,
+ urj_cable_queue_info_t *q);
+/** @return queue item number on success; -1 on failure */
+int urj_tap_cable_get_queue_item (urj_cable_t *cable,
+ urj_cable_queue_info_t *q);
+
+/**
+ * API function to connect to a parport cable
+ *
+ * @return URJ_STATUS_OK on success; URJ_STATUS_FAIL on failure
+ */
+urj_cable_t *urj_tap_cable_parport_connect (urj_chain_t *chain,
+ urj_cable_driver_t *driver,
+ urj_cable_parport_devtype_t devtype,
+ const char *devname,
+ const urj_param_t *params[]);
+/**
+ * API function to connect to a USB cable
+ *
+ * @return URJ_STATUS_OK on success; URJ_STATUS_FAIL on failure
+ */
+urj_cable_t *urj_tap_cable_usb_connect (urj_chain_t *chain,
+ urj_cable_driver_t *driver,
+ const urj_param_t *params[]);
+/**
+ * API function to connect to a type-other cable
+ *
+ * @return URJ_STATUS_OK on success; URJ_STATUS_FAIL on failure
+ */
+urj_cable_t *urj_tap_cable_other_connect (urj_chain_t *chain,
+ urj_cable_driver_t *driver,
+ const urj_param_t *params[]);
+
+extern urj_cable_driver_t *urj_tap_cable_drivers[];
+
+/** The list of recognized parameters */
+extern const urj_param_list_t urj_cable_param_list;
+
+#endif /* URJ_CABLE_H */
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2003 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2003.
+ *
+ */
+
+#ifndef URJ_CHAIN_H
+#define URJ_CHAIN_H
+
+#include "types.h"
+
+#include "pod.h"
+#include "bsdl.h"
+#include "error.h"
+
+#define URJ_CHAIN_EXITMODE_SHIFT 0
+#define URJ_CHAIN_EXITMODE_IDLE 1
+#define URJ_CHAIN_EXITMODE_EXIT1 2
+#define URJ_CHAIN_EXITMODE_UPDATE 3
+
+struct URJ_CHAIN
+{
+ int state;
+ urj_parts_t *parts;
+ int total_instr_len;
+ int active_part;
+ urj_cable_t *cable;
+ urj_bsdl_globs_t bsdl;
+};
+
+urj_chain_t *urj_tap_chain_alloc (void);
+void urj_tap_chain_free (urj_chain_t *chain);
+void urj_tap_chain_disconnect (urj_chain_t *chain);
+/** @return URJ_STATUS_OK on success; URJ_STATUS_FAIL on error */
+int urj_tap_chain_clock (urj_chain_t *chain, int tms, int tdi, int n);
+/** @return URJ_STATUS_OK on success; URJ_STATUS_FAIL on error */
+int urj_tap_chain_defer_clock (urj_chain_t *chain, int tms, int tdi, int n);
+/** @return trst = 0 or 1 on success; -1 on error */
+int urj_tap_chain_set_trst (urj_chain_t *chain, int trst);
+/** @return 0 or 1 on success; -1 on error */
+int urj_tap_chain_get_trst (urj_chain_t *chain);
+/** @return URJ_STATUS_OK on success; URJ_STATUS_FAIL on error */
+int urj_tap_chain_shift_instructions (urj_chain_t *chain);
+/** @return URJ_STATUS_OK on success; URJ_STATUS_FAIL on error */
+int urj_tap_chain_shift_instructions_mode (urj_chain_t *chain,
+ int capture_output, int capture,
+ int chain_exit);
+/** @return URJ_STATUS_OK on success; URJ_STATUS_FAIL on error */
+int urj_tap_chain_shift_data_registers (urj_chain_t *chain,
+ int capture_output);
+/** @return URJ_STATUS_OK on success; URJ_STATUS_FAIL on error */
+int urj_tap_chain_shift_data_registers_mode (urj_chain_t *chain,
+ int capture_output, int capture,
+ int chain_exit);
+void urj_tap_chain_flush (urj_chain_t *chain);
+/** @return 0 or 1 on success; -1 on failure */
+int urj_tap_chain_set_pod_signal (urj_chain_t *chain, int mask, int val);
+/** @return 0 or 1 on success; -1 on failure */
+int urj_tap_chain_get_pod_signal (urj_chain_t *chain, urj_pod_sigsel_t sig);
+/**
+ * Check whether a chain has an active part
+ *
+ * @return NULL on error, and sets urj_error.
+ */
+urj_part_t *urj_tap_chain_active_part(urj_chain_t *chain);
+
+typedef struct
+{
+ urj_chain_t **chains;
+ int size; /* allocated chains array size */
+}
+urj_chains_t;
+
+#endif /* URJ_CHAIN_H */
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2003 ETC s.r.o.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the ETC s.r.o. nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2003.
+ *
+ */
+
+#ifndef URJ_CMD_H
+#define URJ_CMD_H
+
+#include "types.h"
+
+/**
+ * @return URJ_STATUS_OK on success; URJ_STATUS_FAIL on error. Consult
+ * urj_error for error details. Syntax errors in the input params are
+ * handled in the same way, urj_error is set to #URJ_ERROR_SYNTAX.
+ */
+int urj_cmd_run (urj_chain_t *chain, char *params[]);
+/**
+ * Search through registered commands
+ *
+ * @param text match commands whose prefix equals <code>text</code>. Rotates
+ * through the registered commands. The prefix length is set when
+ * the rotating state is reset.
+ * @@@@ RFHH that is weird behaviour. Why not do the prefix length as strlen(text)?
+ * @param state if 0, reset the rotating state to start from the beginning
+ *
+ * @return malloc'ed value. The caller is responsible for freeing it.
+ * NULL for malloc failure or end of command list.
+ */
+char *urj_cmd_find_next (const char *text, int state);
+
+#endif /* URJ_CMD_H */
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2002 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2002.
+ *
+ */
+
+#ifndef URJ_DATA_REGISTER_H
+#define URJ_DATA_REGISTER_H
+
+#include "types.h"
+
+#define URJ_DATA_REGISTER_MAXLEN 32
+
+struct URJ_DATA_REGISTER
+{
+ char name[URJ_DATA_REGISTER_MAXLEN + 1]; /* (public) register name */
+ urj_tap_register_t *in; /* (public) register value clocked in */
+ urj_tap_register_t *out; /* (public) register value clocked out */
+ urj_data_register_t *next;
+};
+
+urj_data_register_t *urj_part_data_register_alloc (const char *name, int len);
+void urj_part_data_register_free (urj_data_register_t *dr);
+
+/**
+ * allocate a data register and initialize the relevant <code>part</code> parts
+ *
+ * @return URJ_STATUS_OK on success; URJ_STATUS_FAIL on error
+ */
+int urj_part_data_register_define (urj_part_t *part, const char *name, int len);
+
+#endif /* URJ_DATA_REGISTER_H */
--- /dev/null
+/*
+ * $Id: error.h 1519 2009-04-22 23:12:44Z rfhh $
+ *
+ * Copyright (C) 2009, Rutger Hofman, VU Amsterdam
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ */
+
+#ifndef URJ_ERROR_H
+#define URJ_ERROR_H
+
+#include <stdio.h>
+#include <errno.h>
+
+#include "log.h"
+
+/**
+ * Error types
+ */
+typedef enum URJ_ERROR
+{
+ URJ_ERROR_OK = 0,
+ URJ_ERROR_ALREADY,
+ URJ_ERROR_OUT_OF_MEMORY,
+ URJ_ERROR_NO_CHAIN,
+ URJ_ERROR_NO_PART,
+ URJ_ERROR_NO_ACTIVE_INSTRUCTION,
+ URJ_ERROR_NO_DATA_REGISTER,
+ URJ_ERROR_INVALID,
+ URJ_ERROR_NOTFOUND,
+ URJ_ERROR_NO_BUS_DRIVER,
+ URJ_ERROR_BUFFER_EXHAUSTED,
+ URJ_ERROR_ILLEGAL_STATE,
+ URJ_ERROR_ILLEGAL_TRANSITION,
+ URJ_ERROR_OUT_OF_BOUNDS,
+ URJ_ERROR_TIMEOUT,
+ URJ_ERROR_UNSUPPORTED,
+ URJ_ERROR_SYNTAX,
+ URJ_ERROR_FILEIO, /**< I/O error from fread/fwrite */
+
+ URJ_ERROR_IO, /**< I/O error from OS */
+ URJ_ERROR_FTD, /**< error from ftdi/ftd2xx */
+ URJ_ERROR_USB, /**< error from libusb */
+
+ URJ_ERROR_BUS,
+ URJ_ERROR_BUS_DMA,
+
+ URJ_ERROR_FLASH,
+ URJ_ERROR_FLASH_DETECT,
+ URJ_ERROR_FLASH_PROGRAM,
+ URJ_ERROR_FLASH_ERASE,
+ URJ_ERROR_FLASH_UNLOCK,
+
+ URJ_ERROR_BSDL_VHDL,
+ URJ_ERROR_BSDL_BSDL,
+
+ URJ_ERROR_UNIMPLEMENTED,
+}
+urj_error_t;
+
+/** Max length of message string that can be recorded. */
+#define URJ_ERROR_MSG_LEN 256
+
+/**
+ * Error state.
+ */
+typedef struct URJ_ERROR_STATE
+{
+ urj_error_t errnum; /**< error number */
+ int sys_errno; /**< errno if URJ_ERROR_IO */
+ const char *file; /**< file where error is set */
+ const char *function; /**< function --,,-- */
+ int line; /**< line no --,,-- */
+ char msg[URJ_ERROR_MSG_LEN]; /**< printf-style message */
+}
+urj_error_state_t;
+
+extern urj_error_state_t urj_error_state;
+
+/**
+ * Descriptive string for error type
+ */
+extern const char *urj_error_string (urj_error_t error);
+
+/**
+ * Set error state.
+ *
+ * @param e urj_error_t value
+ * @param ... error detail message that consists of a printf argument set.
+ * It needs to start with a const char *fmt, followed by arguments used
+ * by fmt.
+ */
+#define urj_error_set(e, ...) \
+ do { \
+ urj_error_state.errnum = e; \
+ urj_error_state.file = __FILE__; \
+ urj_error_state.function = __func__; \
+ urj_error_state.line = __LINE__; \
+ snprintf (urj_error_state.msg, sizeof urj_error_state.msg, \
+ __VA_ARGS__); \
+ } while (0)
+
+/**
+ * Set I/O error state: do as urj_error_set, but also store errno in
+ * #urj_error_state and then reset errno.
+ *
+ * @param ... error detail message that consists of a printf argument set.
+ * It needs to start with a const char *fmt, followed by arguments used
+ * by fmt. The error code (URJ_ERROR_IO) is added by this macro.
+ */
+#define urj_error_IO_set(...) \
+ do { \
+ urj_error_set (URJ_ERROR_IO, __VA_ARGS__); \
+ urj_error_state.sys_errno = errno; \
+ errno = 0; \
+ } while (0)
+
+/**
+ * The error number
+ */
+urj_error_t urj_error_get (void);
+
+/**
+ * Reset the error state.
+ */
+void urj_error_reset (void);
+/**
+ * The error state in human-readable form.
+ *
+ * This function is not reentrant.
+ *
+ * @return a pointer to a static area.
+ */
+const char *urj_error_describe (void);
+
+#endif /* URJ_ERROR_H */
--- /dev/null
+/*
+ * fclock.h
+ *
+ * Copyright (C) 2005 Hein Roehrig
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ */
+
+
+#ifndef URJ_FCLOCK_FCLOCK_H
+#define URJ_FCLOCK_FCLOCK_H
+
+/* @@@@ RFHH this had better be an internal include file */
+
+
+#ifdef __cplusplus
+extern "C"
+{
+
+# ifndef CVOID
+# define CVOID
+# endif
+#else /* def __cplusplus */
+# ifndef CVOID
+# define CVOID void
+# endif
+#endif /* def __cplusplus */
+
+
+/* return real time in seconds starting at some arbitrary point in
+time*/
+long double urj_lib_frealtime (CVOID);
+
+#ifdef UNUSED /* RFHH */
+/* return the CPU time used by this process (seconds) */
+long double fcputime (CVOID);
+#endif
+
+
+#ifdef __cplusplus
+}
+#endif
+
+
+#endif
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2003 ETC s.r.o.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the ETC s.r.o. nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2003.
+ *
+ */
+
+#ifndef URJ_FLASH_H
+#define URJ_FLASH_H
+
+#include <stdio.h>
+#include <stdint.h>
+
+#include "types.h"
+
+typedef struct URJ_FLASH_CFI_ARRAY urj_flash_cfi_array_t;
+
+typedef struct
+{
+ unsigned int bus_width; /* 1 for 8 bits, 2 for 16 bits, 4 for 32 bits, etc. */
+ const char *name;
+ const char *description;
+ /** @return 1 if autodetected, 0 otherwise */
+ int (*autodetect) (urj_flash_cfi_array_t *cfi_array);
+ void (*print_info) (urj_log_level_t ll, urj_flash_cfi_array_t *cfi_array);
+ /** @return URJ_STATUS_OK on success; URJ_STATUS_FAIL on error */
+ int (*erase_block) (urj_flash_cfi_array_t *cfi_array, uint32_t adr);
+ /** @return URJ_STATUS_OK on success; URJ_STATUS_FAIL on error */
+ int (*unlock_block) (urj_flash_cfi_array_t *cfi_array, uint32_t adr);
+ /** @return URJ_STATUS_OK on success; URJ_STATUS_FAIL on error */
+ int (*program) (urj_flash_cfi_array_t *cfi_array, uint32_t adr,
+ uint32_t *buffer, int count);
+ void (*readarray) (urj_flash_cfi_array_t *cfi_array);
+}
+urj_flash_driver_t;
+
+extern urj_flash_driver_t *urj_flash_flash_drivers[];
+
+/** @return URJ_STATUS_OK on success; URJ_STATUS_FAIL on error */
+int urj_flash_detectflash (urj_log_level_t ll, urj_bus_t *bus, uint32_t adr);
+void urj_flash_cleanup (void);
+
+/** @return URJ_STATUS_OK on success; URJ_STATUS_FAIL on error */
+int urj_flashmem (urj_bus_t *bus, FILE *f, uint32_t addr, int);
+/** @return URJ_STATUS_OK on success; URJ_STATUS_FAIL on error */
+int urj_flashmsbin (urj_bus_t *bus, FILE *f, int);
+
+/** @return URJ_STATUS_OK on success; URJ_STATUS_FAIL on error */
+int urj_flasherase (urj_bus_t *bus, uint32_t addr, int number);
+
+#endif /* URJ_FLASH_H */
--- /dev/null
+/* Convenience header for conditional use of GNU <libintl.h>.
+ Copyright (C) 1995-1998, 2000-2002 Free Software Foundation, Inc.
+
+ This program is free software; you can redistribute it and/or modify it
+ under the terms of the GNU Library General Public License as published
+ by the Free Software Foundation; either version 2, or (at your option)
+ any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Library General Public License for more details.
+
+ You should have received a copy of the GNU Library General Public
+ License along with this program; if not, write to the Free Software
+ Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307,
+ USA. */
+
+/* @@@@ RFHH this has better be an internal include file */
+
+#ifndef _LIBGETTEXT_H
+#define _LIBGETTEXT_H 1
+
+/* NLS can be disabled through the configure --disable-nls option. */
+#if ENABLE_NLS
+
+/* Get declarations of GNU message catalog functions. */
+# include <libintl.h>
+
+#else
+
+/* Solaris /usr/include/locale.h includes /usr/include/libintl.h, which
+ chokes if dcgettext is defined as a macro. So include it now, to make
+ later inclusions of <locale.h> a NOP. We don't include <libintl.h>
+ as well because people using "gettext.h" will not include <libintl.h>,
+ and also including <libintl.h> would fail on SunOS 4, whereas <locale.h>
+ is OK. */
+#if defined(__sun)
+# include <locale.h>
+#endif
+
+/* Disabled NLS.
+ The casts to 'const char *' serve the purpose of producing warnings
+ for invalid uses of the value returned from these functions.
+ On pre-ANSI systems without 'const', the config.h file is supposed to
+ contain "#define const". */
+# define gettext(Msgid) ((const char *) (Msgid))
+# define dgettext(Domainname, Msgid) ((const char *) (Msgid))
+# define dcgettext(Domainname, Msgid, Category) ((const char *) (Msgid))
+# define ngettext(Msgid1, Msgid2, N) \
+ ((N) == 1 ? (const char *) (Msgid1) : (const char *) (Msgid2))
+# define dngettext(Domainname, Msgid1, Msgid2, N) \
+ ((N) == 1 ? (const char *) (Msgid1) : (const char *) (Msgid2))
+# define dcngettext(Domainname, Msgid1, Msgid2, N, Category) \
+ ((N) == 1 ? (const char *) (Msgid1) : (const char *) (Msgid2))
+# define textdomain(Domainname) ((const char *) (Domainname))
+# define bindtextdomain(Domainname, Dirname) ((const char *) (Dirname))
+# define bind_textdomain_codeset(Domainname, Codeset) ((const char *) (Codeset))
+
+#endif
+
+/* A pseudo function call that serves as a marker for the automated
+ extraction of messages, but does not call gettext(). The run-time
+ translation is done at a different place in the code.
+ The argument, String, should be a literal string. Concatenated strings
+ and other string expressions won't work.
+ The macro's expansion is not parenthesized, so that it is suitable as
+ initializer for static 'char[]' or 'const char[]' variables. */
+#define gettext_noop(String) String
+
+#endif /* _LIBGETTEXT_H */
--- /dev/null
+/*
+ * $Id: jim.h $
+ *
+ * Copyright (C) 2008 Kolja Waschk <kawk>
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * Documentation used while writing this code:
+ *
+ * http://www.inaccessnetworks.com/projects/ianjtag/jtag-intro/jtag-intro.html
+ * "A Brief Introduction to the JTAG Boundary Scan Interface", Nick Patavalis
+ *
+ * http://www.xjtag.com/support-jtag/jtag-technical-guide.php
+ * "JTAG - A technical overview", XJTAG Ltd.
+ *
+ */
+
+#ifndef URJ_JIM_H
+#define URJ_JIM_H 1
+
+#include <stdint.h>
+#include <stddef.h>
+
+typedef enum jim_tap_state
+{
+ URJ_JIM_RESET = 0,
+ URJ_JIM_SELECT_DR = 0 + 1,
+ URJ_JIM_CAPTURE_DR = 0 + 2,
+ URJ_JIM_SHIFT_DR = 0 + 3,
+ URJ_JIM_EXIT1_DR = 0 + 4,
+ URJ_JIM_PAUSE_DR = 0 + 5,
+ URJ_JIM_EXIT2_DR = 0 + 6,
+ URJ_JIM_UPDATE_DR = 0 + 7,
+ URJ_JIM_IDLE = 8,
+ URJ_JIM_SELECT_IR = 8 + 1,
+ URJ_JIM_CAPTURE_IR = 8 + 2,
+ URJ_JIM_SHIFT_IR = 8 + 3,
+ URJ_JIM_EXIT1_IR = 8 + 4,
+ URJ_JIM_PAUSE_IR = 8 + 5,
+ URJ_JIM_EXIT2_IR = 8 + 6,
+ URJ_JIM_UPDATE_IR = 8 + 7,
+}
+urj_jim_tap_state_t;
+
+typedef struct
+{
+ uint32_t *reg;
+ int len;
+}
+urj_jim_shift_reg_t;
+
+typedef struct URJ_JIM_DEVICE urj_jim_device_t;
+
+struct URJ_JIM_DEVICE
+{
+ urj_jim_device_t *prev;
+
+ urj_jim_tap_state_t tap_state;
+ void (*tck_rise) (urj_jim_device_t *dev, int tms, int tdi,
+ uint8_t *shmem, size_t shmem_size);
+ void (*tck_fall) (urj_jim_device_t *dev, uint8_t *shmem,
+ size_t shmem_size);
+ void (*dev_free) (urj_jim_device_t *dev);
+ void *state;
+ int num_sregs;
+ int current_dr;
+ urj_jim_shift_reg_t *sreg;
+ int tdo;
+ int tdo_buffer;
+};
+
+typedef struct URJ_JIM_STATE
+{
+ int trst;
+ uint8_t *shmem;
+ size_t shmem_size;
+ urj_jim_device_t *last_device_in_chain;
+}
+urj_jim_state_t;
+
+typedef struct URJ_JIM_BUS_DEVICE urj_jim_bus_device_t;
+
+struct URJ_JIM_BUS_DEVICE
+{
+ int width; /* bytes */
+ int size; /* words (each <width> bytes) */
+ void *state; /* device-dependent */
+ int (*init) (urj_jim_bus_device_t *x);
+ uint32_t (*capture) (urj_jim_bus_device_t *x,
+ uint32_t address, uint32_t control,
+ uint8_t *shmem, size_t shmem_size);
+ void (*update) (urj_jim_bus_device_t *x,
+ uint32_t address, uint32_t data, uint32_t control,
+ uint8_t *shmem, size_t shmem_size);
+ void (*free) (urj_jim_bus_device_t *x);
+};
+
+typedef struct
+{
+ uint32_t offset;
+ int adr_shift;
+ int data_shift;
+ urj_jim_bus_device_t *part;
+}
+urj_jim_attached_part_t;
+
+void urj_jim_set_trst (urj_jim_state_t *s, int trst);
+int urj_jim_get_trst (urj_jim_state_t *s);
+int urj_jim_get_tdo (urj_jim_state_t *s);
+void urj_jim_tck_rise (urj_jim_state_t *s, int tms, int tdi);
+void urj_jim_tck_fall (urj_jim_state_t *s);
+urj_jim_device_t *urj_jim_alloc_device (int num_sregs, const int reg_size[]);
+urj_jim_state_t *urj_jim_init (void);
+void urj_jim_free (urj_jim_state_t *s);
+urj_jim_device_t *urj_jim_some_cpu (void);
+
+#endif
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2003 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2003.
+ *
+ */
+
+#ifndef URJ_JTAG_H
+#define URJ_JTAG_H
+
+#include "types.h"
+
+extern int urj_big_endian;
+
+/**
+ * Register the application name with global/data_dir.
+ * @param argv0 is remembered as a pointer, it is not strdup()'ed.
+ */
+void urj_set_argv0(const char *argv0);
+const char *urj_get_data_dir (void);
+
+#endif /* URJ_JTAG_H */
--- /dev/null
+/*
+ * $Id: log.h 1519 2009-04-22 23:12:44Z rfhh $
+ *
+ * Copyright (C) 2009, Rutger Hofman, VU Amsterdam
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ */
+
+#ifndef URJ_LOG_H
+#define URJ_LOG_H
+
+#include <stdarg.h>
+
+#include "types.h"
+
+/**
+ * Log state.
+ */
+typedef struct URJ_LOG_STATE
+{
+ urj_log_level_t level; /**< logging level */
+ int (*out_vprintf) (const char *fmt, va_list ap);
+ int (*err_vprintf) (const char *fmt, va_list ap);
+}
+urj_log_state_t;
+
+extern urj_log_state_t urj_log_state;
+
+int urj_do_log (urj_log_level_t level, const char *fmt, ...)
+#ifdef __GNUC__
+ __attribute__ ((format (printf, 2, 3)))
+#endif
+ ;
+
+#define urj_log(lvl, ...) \
+ do { \
+ if ((lvl) >= urj_log_state.level) \
+ urj_do_log (lvl, __VA_ARGS__); \
+ } while (0)
+
+/**
+ * Print warning unless logging level is > URJ_LOG_LEVEL_WARNING
+ *
+ * @param e urj_error_t value
+ * @param ... consists of a printf argument set. It needs to start with a
+ * const char *fmt, followed by arguments used by fmt.
+ */
+#define urj_warning(...) \
+ do { \
+ urj_log (URJ_LOG_LEVEL_WARNING, "%s:%d %s() Warning: ", \
+ __FILE__, __LINE__, __func__); \
+ urj_log (URJ_LOG_LEVEL_WARNING, __VA_ARGS__); \
+ } while (0)
+
+#endif /* URJ_LOG_H */
--- /dev/null
+/*
+ * $Id: params.h 1606 2009-05-19 15:06:20Z rfhh $
+ *
+ * Parameter list, in the vein of X parameter passing
+ * Copyright (C) 2009 VU Amsterdam
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the ETC s.r.o. nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Written by Rutger Hofman <rutger at cs dot vu dot nl>, 2009
+ *
+ */
+
+#ifndef URJ_PARAMS_H
+#define URJ_PARAMS_H
+
+#include <stddef.h>
+
+#include "types.h"
+
+/**
+ * Supported parameter types
+ */
+typedef enum URJ_PARAM_TYPE_T
+{
+ URJ_PARAM_TYPE_LU,
+ URJ_PARAM_TYPE_STRING,
+ URJ_PARAM_TYPE_BOOL,
+}
+urj_param_type_t;
+
+/**
+ * Parameter as assembled for passing to parameter-taking functions
+ */
+typedef struct URJ_PARAM
+{
+ urj_param_type_t type;
+ int key;
+ union {
+ long unsigned lu;
+ const char *string;
+ int enabled; /**< bool */
+ } value;
+}
+urj_param_t;
+
+/**
+ * Description of a parameter, as recognized by a module
+ */
+typedef struct URJ_PARAM_DESCR
+{
+ int key; /**< key */
+ urj_param_type_t type; /**< type */
+ const char *string; /**< human-friendly form */
+}
+urj_param_descr_t;
+
+/**
+ * Type for a module to export its recognized parameters
+ */
+typedef struct URJ_PARAM_LIST
+{
+ urj_param_descr_t *list;
+ size_t n;
+}
+urj_param_list_t;
+
+/** Initialise a parameter assembly line */
+int urj_param_init (const urj_param_t ***bp);
+/** Clear the parameter assembly line */
+int urj_param_clear (const urj_param_t ***bp);
+
+/**
+ * toString function for #urj_param_t. Is not reentrant. May return a
+ * pointer to a static string.
+ */
+const char *urj_param_string(const urj_param_list_t *params,
+ const urj_param_t *p);
+
+/**
+ * Append a string-type argument to the current #urj_param_t assembly line.
+ * Copies the pointer value, does no strdup(val).
+ */
+int urj_param_push_string (const urj_param_t ***bp, int key, const char *val);
+/**
+ * Append a ulong-type argument to the current #urj_param_t assembly line.
+ */
+int urj_param_push_lu (const urj_param_t ***bp, int key, long unsigned val);
+/**
+ * Append a bool-type argument to the current #urj_param_t assembly line.
+ */
+int urj_param_push_bool (const urj_param_t ***bp, int key, int val);
+/**
+ * Transform a string representation of a param "key=value" into a #urj_param_t
+ * representation, and append it to the current #urj_param_t assembly line.
+ */
+int urj_param_push (const urj_param_list_t *params, const urj_param_t ***bp,
+ const char *p);
+/**
+ * Utility function to count the number of items in a #urj_param_t assembly
+ * line
+ */
+size_t urj_param_num (const urj_param_t *params[]);
+
+#endif /* URJ_BUS_DRIVER_BRUX_BUS_H */
--- /dev/null
+/*
+ * $Id$
+ *
+ * Parallel Port Connection Driver Interface
+ * Copyright (C) 2003 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2003.
+ *
+ */
+
+#ifndef URJ_PARPORT_H
+#define URJ_PARPORT_H
+
+#include <stdint.h>
+
+#include "types.h"
+#include "params.h"
+
+typedef enum URJ_CABLE_PARPORT_DEVTYPE
+{
+ URJ_CABLE_PARPORT_DEV_PARALLEL,
+ URJ_CABLE_PARPORT_DEV_PPDEV,
+ URJ_CABLE_PARPORT_DEV_PPI,
+ URJ_CABLE_PARPORT_N_DEVS,
+}
+urj_cable_parport_devtype_t;
+
+typedef struct
+{
+ urj_cable_parport_devtype_t type;
+ urj_parport_t *(*connect) (const char *devname);
+ void (*parport_free) (urj_parport_t *);
+ /** @return URJ_STATUS_OK on success; URJ_STATUS_FAIL on error */
+ int (*open) (urj_parport_t *);
+ /** @return URJ_STATUS_OK on success; URJ_STATUS_FAIL on error */
+ int (*close) (urj_parport_t *);
+ /** @return URJ_STATUS_OK on success; URJ_STATUS_FAIL on error */
+ int (*set_data) (urj_parport_t *, unsigned char);
+ /** @return data on success; -1 on error */
+ int (*get_data) (urj_parport_t *);
+ /** @return status on success; -1 on error */
+ int (*get_status) (urj_parport_t *);
+ /** @return URJ_STATUS_OK on success; URJ_STATUS_FAIL on error */
+ int (*set_control) (urj_parport_t *, unsigned char);
+}
+urj_parport_driver_t;
+
+struct URJ_PARPORT
+{
+ urj_parport_driver_t *driver;
+ void *params;
+ urj_cable_t *cable;
+};
+
+int urj_tap_parport_open (urj_parport_t *port);
+int urj_tap_parport_close (urj_parport_t *port);
+int urj_tap_parport_set_data (urj_parport_t *port, const unsigned char data);
+/** @return data on success; -1 on error */
+int urj_tap_parport_get_data (urj_parport_t *port);
+/** @return status on success; -1 on error */
+int urj_tap_parport_get_status (urj_parport_t *port);
+int urj_tap_parport_set_control (urj_parport_t *port, const unsigned char data);
+
+const char *urj_cable_parport_devtype_string(urj_cable_parport_devtype_t dt);
+
+extern urj_parport_driver_t *urj_tap_parport_drivers[];
+
+#endif /* URJ_PARPORT_H */
--- /dev/null
+/*
+ * $Id: parse.h 1544 2009-05-01 12:55:19Z rfhh $
+ *
+ * Copyright (C) 2003 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2003.
+ *
+ */
+
+#ifndef URJ_PARSE_H
+#define URJ_PARSE_H
+
+#include <stdio.h>
+
+#include "types.h"
+
+/**
+ * @return
+ * URJ_STATUS_OK on success
+ * URJ_STATUS_ERROR on error
+ * URJ_STATUS_QUIT on quit command
+ */
+int urj_parse_line (urj_chain_t *chain, char *line);
+/**
+ * @return
+ * URJ_STATUS_OK on success
+ * URJ_STATUS_ERROR on error
+ * URJ_STATUS_QUIT on quit command
+ */
+int urj_parse_stream (urj_log_level_t ll, urj_chain_t *chain, FILE *f);
+/**
+ * @return
+ * URJ_STATUS_OK on success
+ * URJ_STATUS_ERROR on error
+ * URJ_STATUS_QUIT on quit command
+ */
+int urj_parse_file (urj_log_level_t ll, urj_chain_t *chain,
+ const char *filename);
+
+/**
+ * Include a file. Autodetects whether it is a bsdl file or a UrJTAG command
+ * shell script.
+ *
+ * @param filename if begins with a slash, or dots followed by a slash, ignore
+ * the search path
+ * @param ignore_path ignore the search path anyway
+ *
+ * @return URJ_STATUS_OK on success; URJ_STATUS_FAIL on error
+ */
+int urj_parse_include (urj_chain_t *chain, const char *filename,
+ int ignore_path);
+
+#endif /* URJ_PARSE_H */
+
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2002 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2002.
+ *
+ */
+
+#ifndef URJ_PART_H
+#define URJ_PART_H
+
+#include "types.h"
+
+#define URJ_PART_MANUFACTURER_MAXLEN 25
+#define URJ_PART_PART_MAXLEN 20
+#define URJ_PART_STEPPING_MAXLEN 8
+
+struct URJ_PART
+{
+ urj_tap_register_t *id;
+ char *alias; /* djf refdes */
+ char manufacturer[URJ_PART_MANUFACTURER_MAXLEN + 1];
+ char part[URJ_PART_PART_MAXLEN + 1];
+ char stepping[URJ_PART_STEPPING_MAXLEN + 1];
+ urj_part_signal_t *signals;
+ urj_part_salias_t *saliases;
+ int instruction_length;
+ urj_part_instruction_t *instructions;
+ urj_part_instruction_t *active_instruction;
+ urj_data_register_t *data_registers;
+ int boundary_length;
+ urj_bsbit_t **bsbits;
+};
+
+urj_part_t *urj_part_alloc (const urj_tap_register_t *id);
+void urj_part_free (urj_part_t *p);
+/* @return instruction pointer on success; NULL if not found but does not set
+ * urj_error; NULL on error */
+urj_part_instruction_t *urj_part_find_instruction (urj_part_t *p,
+ const char *iname);
+/* @return data register pointer on success; NULL if not found but does not set
+ * urj_error; NULL on error */
+urj_data_register_t *urj_part_find_data_register (urj_part_t *p,
+ const char *drname);
+/* @return signal pointer on success; NULL if not found but does not set
+ * urj_error; NULL on error */
+urj_part_signal_t *urj_part_find_signal (urj_part_t *p,
+ const char *signalname);
+void urj_part_set_instruction (urj_part_t *p, const char *iname);
+/** @return URJ_STATUS_OK on success; URJ_STATUS_FAIL on error */
+int urj_part_set_signal (urj_part_t *p, urj_part_signal_t *s, int out, int val);
+/** @return -1 on error; signal number >= 0 for success */
+int urj_part_get_signal (urj_part_t *p, const urj_part_signal_t *s);
+/* @return URJ_STATUS_OK on success; URJ_STATUS_FAIL on error */
+int urj_part_print (urj_log_level_t ll, urj_part_t *p);
+/**
+ * Set the length of the instructions of a part
+ * @return URJ_STATUS_OK on success; URJ_STATUS_FAIL on error
+ */
+int urj_part_instruction_length_set (urj_part_t *part, int length);
+/**
+ * Create a new instruction for a part.
+ * @param part
+ * @param instruction name for the new instruction
+ * @param code string that contains the bit pattern for the default instruction
+ * @param data_register default data register for instruction (e.g. BR)
+ */
+urj_part_instruction_t *urj_part_instruction_define (urj_part_t *part,
+ const char *instruction,
+ const char *code,
+ const char *data_register);
+
+
+/**
+ * parts
+ */
+
+struct URJ_PARTS
+{
+ int len;
+ urj_part_t **parts;
+};
+
+urj_parts_t *urj_part_parts_alloc (void);
+void urj_part_parts_free (urj_parts_t *ps);
+/* @return URJ_STATUS_OK on success; URJ_STATUS_FAIL on error */
+int urj_part_parts_add_part (urj_parts_t *ps, urj_part_t *p);
+/* @return URJ_STATUS_OK on success; URJ_STATUS_FAIL on error */
+int urj_part_parts_set_instruction (urj_parts_t *ps, const char *iname);
+/* @return URJ_STATUS_OK on success; URJ_STATUS_FAIL on error */
+int urj_part_parts_print (urj_log_level_t ll, urj_parts_t *ps);
+
+#endif /* URJ_PART_H */
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2002 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2002.
+ *
+ */
+
+#ifndef URJ_PART_INSTRUCTION_H
+#define URJ_PART_INSTRUCTION_H
+
+#include "types.h"
+
+#define URJ_INSTRUCTION_MAXLEN_INSTRUCTION 20
+
+struct URJ_PART_INSTRUCTION
+{
+ char name[URJ_INSTRUCTION_MAXLEN_INSTRUCTION + 1];
+ urj_tap_register_t *value;
+ urj_tap_register_t *out;
+ urj_data_register_t *data_register;
+ urj_part_instruction_t *next;
+};
+
+urj_part_instruction_t *urj_part_instruction_alloc (const char *name, int len,
+ const char *val);
+void urj_part_instruction_free (urj_part_instruction_t *i);
+
+#endif /* URJ_INSTRUCTION_H */
--- /dev/null
+/*
+ * $Id$
+ *
+ * Pod signal names
+ * Copyright (C) 2008 K. Waschk
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ */
+
+#ifndef URJ_POD_H
+#define URJ_POD_H
+
+typedef enum URJ_POD_SIGSEL
+{
+ URJ_POD_CS_NONE = 0, /* no/invalid signal */
+ URJ_POD_CS_TDI = (1 << 0), /* out: JTAG/SPI data in */
+ URJ_POD_CS_TCK = (1 << 1), /* out: JTAG/SPI clock */
+ URJ_POD_CS_TMS = (1 << 2), /* out: JTAG test mode select/SPI slave select */
+ URJ_POD_CS_TRST = (1 << 3), /* out: JTAG TAP reset */
+ URJ_POD_CS_RESET = (1 << 4), /* out: system reset */
+ URJ_POD_CS_SCK = (1 << 5), /* out: I2C clock (not yet used) */
+ URJ_POD_CS_SDA = (1 << 6), /* inout: I2C data (not yet used) */
+ URJ_POD_CS_SS = (1 << 7), /* out: SPI slave select (not yet used) */
+}
+urj_pod_sigsel_t;
+
+#endif /* URJ_POD_H */
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2004, Arnim Laeuger
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Arnim Laeuger <arniml@users.sourceforge.net>, 2004.
+ *
+ */
+
+#ifndef URJ_SVF_H
+#define URJ_SVF_H
+
+#include <stdint.h>
+#include <stdio.h>
+
+#include "types.h"
+
+/**
+ * ***************************************************************************
+ * urj_svf_run(chain, SVF_FILE, stop_on_mismatch, ref_freq)
+ *
+ * Main entry point for the 'svf' command. Calls the svf parser.
+ *
+ * Checks the jtag-environment (availability of SIR instruction and SDR
+ * register). Initializes all svf-global variables and performs clean-up
+ * afterwards.
+ *
+ * @param chain pointer to global chain
+ * @param SVF_FILE file handle of SVF file
+ * @param stop_on_mismatch 1 = stop upon tdo mismatch
+ * 0 = continue upon mismatch
+ * @param ref_freq reference frequency for RUNTEST
+ *
+ * @return
+ * URJ_STATUS_OK, URJ_STATUS_FAIL
+ * ***************************************************************************/
+
+int urj_svf_run (urj_chain_t *chain, FILE *SVF_FILE, int stop_on_mismatch,
+ uint32_t ref_freq);
+
+#endif /* URJ_SVF_H */
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2002 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2002.
+ *
+ */
+
+#ifndef URJ_TAP_H
+#define URJ_TAP_H
+
+#include "types.h"
+
+void urj_tap_reset (urj_chain_t *chain);
+/** @return URJ_STATUS_OK on success; URJ_STATUS_FAIL on error */
+int urj_tap_reset_bypass (urj_chain_t *chain);
+void urj_tap_capture_dr (urj_chain_t *chain);
+void urj_tap_capture_ir (urj_chain_t *chain);
+void urj_tap_defer_shift_register (urj_chain_t *chain,
+ const urj_tap_register_t *in,
+ urj_tap_register_t *out, int tap_exit);
+void urj_tap_shift_register_output (urj_chain_t *chain,
+ const urj_tap_register_t *in,
+ urj_tap_register_t *out, int tap_exit);
+void urj_tap_shift_register (urj_chain_t *chain,
+ const urj_tap_register_t *in,
+ urj_tap_register_t *out, int tap_exit);
+
+/** API functions */
+/** @return number of detected parts on success; -1 on error */
+int urj_tap_detect_parts (urj_chain_t *chain, const char *db_path);
+/** @return chain length on success; -1 on error */
+int urj_tap_manual_add (urj_chain_t *chain, int instr_len);
+/** @return register size on success; -1 on error */
+int urj_tap_detect_register_size (urj_chain_t *chain);
+/** @return URJ_STATUS_OK on success; URJ_STATUS_FAIL on error */
+int urj_tap_discovery (urj_chain_t *chain);
+/** @return URJ_STATUS_OK on success; URJ_STATUS_FAIL on error */
+int urj_tap_idcode (urj_chain_t *chain, unsigned int bytes);
+/**
+ * Convenience function that detects the parts, initialises them to BYPASS,
+ * and initialises the bus drivers.
+ *
+ * @return URJ_STATUS_OK on success; URJ_STATUS_FAIL on error
+ */
+int urj_tap_detect (urj_chain_t *chain);
+
+#endif /* URJ_TAP_H */
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2002, 2003 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2002, 2003.
+ *
+ */
+
+#ifndef URJ_TAP_REGISTER_H
+#define URJ_TAP_REGISTER_H
+
+#include "types.h"
+#include <stdint.h>
+
+struct URJ_TAP_REGISTER
+{
+ char *data; /* (public, r/w) register data */
+ int len; /* (public, r/o) register length */
+ char *string; /* (private) string representation of register data */
+};
+
+urj_tap_register_t *urj_tap_register_alloc (int len);
+urj_tap_register_t *urj_tap_register_duplicate (const urj_tap_register_t *tr);
+void urj_tap_register_free (urj_tap_register_t *tr);
+urj_tap_register_t *urj_tap_register_fill (urj_tap_register_t *tr, int val);
+const char *urj_tap_register_get_string (const urj_tap_register_t *tr);
+uint64_t urj_tap_register_get_value (const urj_tap_register_t *tr);
+/** @return 0 or 1 on success; -1 on error */
+int urj_tap_register_all_bits_same_value (const urj_tap_register_t *tr);
+urj_tap_register_t *urj_tap_register_init (urj_tap_register_t *tr,
+ const char *value);
+int urj_tap_register_compare (const urj_tap_register_t *tr,
+ const urj_tap_register_t *tr2);
+int urj_tap_register_match (const urj_tap_register_t *tr, const char *expr);
+urj_tap_register_t *urj_tap_register_inc (urj_tap_register_t *tr);
+urj_tap_register_t *urj_tap_register_dec (urj_tap_register_t *tr);
+urj_tap_register_t *urj_tap_register_shift_right (urj_tap_register_t *tr,
+ int shift);
+urj_tap_register_t *urj_tap_register_shift_left (urj_tap_register_t *tr,
+ int shift);
+
+#endif /* URJ_REGISTER_H */
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2002 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2002.
+ *
+ */
+
+#ifndef URJ_TAP_STATE_H
+#define URJ_TAP_STATE_H
+
+#include "bitmask.h"
+
+#include "types.h"
+
+#define URJ_TAP_STATE_DR URJ_BIT (0)
+#define URJ_TAP_STATE_IR URJ_BIT (1)
+#define URJ_TAP_STATE_SHIFT URJ_BIT (2) /* register shift with TMS = 0 */
+#define URJ_TAP_STATE_IDLE URJ_BIT (3) /* to Run-Test/Idle with TMS = 0 */
+#define URJ_TAP_STATE_CAPTURE URJ_BIT (4) /* Capture state */
+#define URJ_TAP_STATE_UPDATE URJ_BIT (5) /* to Update with TMS = 1 */
+#define URJ_TAP_STATE_PAUSE URJ_BIT (6) /* to Pause with TMS = 0 */
+#define URJ_TAP_STATE_RESET URJ_BIT (7) /* Test-Logic-Reset or unknown state */
+
+#define URJ_TAP_STATE_UNKNOWN_STATE URJ_TAP_STATE_RESET
+#define URJ_TAP_STATE_TEST_LOGIC_RESET (URJ_TAP_STATE_RESET | URJ_TAP_STATE_IDLE)
+#define URJ_TAP_STATE_RUN_TEST_IDLE URJ_TAP_STATE_IDLE
+#define URJ_TAP_STATE_SELECT_DR_SCAN URJ_TAP_STATE_DR
+#define URJ_TAP_STATE_CAPTURE_DR (URJ_TAP_STATE_DR | URJ_TAP_STATE_SHIFT | URJ_TAP_STATE_CAPTURE)
+#define URJ_TAP_STATE_SHIFT_DR (URJ_TAP_STATE_DR | URJ_TAP_STATE_SHIFT)
+#define URJ_TAP_STATE_EXIT1_DR (URJ_TAP_STATE_DR | URJ_TAP_STATE_UPDATE | URJ_TAP_STATE_PAUSE)
+#define URJ_TAP_STATE_PAUSE_DR (URJ_TAP_STATE_DR | URJ_TAP_STATE_PAUSE)
+#define URJ_TAP_STATE_EXIT2_DR (URJ_TAP_STATE_DR | URJ_TAP_STATE_SHIFT | URJ_TAP_STATE_UPDATE)
+#define URJ_TAP_STATE_UPDATE_DR (URJ_TAP_STATE_DR | URJ_TAP_STATE_IDLE)
+#define URJ_TAP_STATE_SELECT_IR_SCAN URJ_TAP_STATE_IR
+#define URJ_TAP_STATE_CAPTURE_IR (URJ_TAP_STATE_IR | URJ_TAP_STATE_SHIFT | URJ_TAP_STATE_CAPTURE)
+#define URJ_TAP_STATE_SHIFT_IR (URJ_TAP_STATE_IR | URJ_TAP_STATE_SHIFT)
+#define URJ_TAP_STATE_EXIT1_IR (URJ_TAP_STATE_IR | URJ_TAP_STATE_UPDATE | URJ_TAP_STATE_PAUSE)
+#define URJ_TAP_STATE_PAUSE_IR (URJ_TAP_STATE_IR | URJ_TAP_STATE_PAUSE)
+#define URJ_TAP_STATE_EXIT2_IR (URJ_TAP_STATE_IR | URJ_TAP_STATE_SHIFT | URJ_TAP_STATE_UPDATE)
+#define URJ_TAP_STATE_UPDATE_IR (URJ_TAP_STATE_IR | URJ_TAP_STATE_IDLE)
+
+int urj_tap_state (urj_chain_t *chain);
+int urj_tap_state_init (urj_chain_t *chain);
+int urj_tap_state_done (urj_chain_t *chain);
+int urj_tap_state_reset (urj_chain_t *chain);
+int urj_tap_state_set_trst (urj_chain_t *chain, int old_trst, int new_trst);
+int urj_tap_state_clock (urj_chain_t *chain, int tms);
+
+#endif /* URJ_TAP_STATE_H */
--- /dev/null
+/*
+ * $Id: urjtag.h 1525 2009-04-23 15:56:49Z rfhh $
+ *
+ * Global opaque types that had better be predefined
+ * Copyright (C) 2009, Rutger Hofman
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Author: Rutger Hofman, VU Amsterdam
+ *
+ */
+
+#ifndef URJ_URJ_TYPES_H
+#define URJ_URJ_TYPES_H
+
+typedef struct URJ_BUS urj_bus_t;
+typedef struct URJ_BUS_DRIVER urj_bus_driver_t;
+typedef struct URJ_CHAIN urj_chain_t;
+typedef struct URJ_CABLE urj_cable_t;
+typedef struct URJ_USBCONN urj_usbconn_t;
+typedef struct URJ_PARPORT urj_parport_t;
+typedef struct URJ_PART urj_part_t;
+typedef struct URJ_PARTS urj_parts_t;
+typedef struct URJ_PART_SIGNAL urj_part_signal_t;
+typedef struct URJ_PART_SALIAS urj_part_salias_t;
+typedef struct URJ_PART_INSTRUCTION urj_part_instruction_t;
+typedef struct URJ_DATA_REGISTER urj_data_register_t;
+typedef struct URJ_BSBIT urj_bsbit_t;
+typedef struct URJ_TAP_REGISTER urj_tap_register_t;
+
+/**
+ * Log levels
+ */
+typedef enum URJ_LOG_LEVEL
+{
+ URJ_LOG_LEVEL_ALL, /**< every single bit as it is transmitted */
+ URJ_LOG_LEVEL_COMM, /**< low level communication details */
+ URJ_LOG_LEVEL_DEBUG, /**< more details of interest for developers */
+ URJ_LOG_LEVEL_DETAIL, /**< verbose output */
+ URJ_LOG_LEVEL_NORMAL, /**< just noteworthy info */
+ URJ_LOG_LEVEL_WARNING, /**< unmissable warnings */
+ URJ_LOG_LEVEL_ERROR, /**< only fatal errors */
+ URJ_LOG_LEVEL_SILENT, /**< suppress logging output */
+}
+urj_log_level_t;
+
+#define URJ_STATUS_OK 0
+#define URJ_STATUS_FAIL 1
+#define URJ_STATUS_MUST_QUIT (-2)
+
+#endif /* URJ_URJ_TYPES_H */
--- /dev/null
+/*
+ * $Id: urjtag.h 1525 2009-04-23 15:56:49Z rfhh $
+ *
+ * Public include file for the UrJTAG library.
+ * Copyright (C) 2009, Rutger Hofman
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Author: Rutger Hofman, VU Amsterdam
+ *
+ */
+
+#ifndef URJ_URJTAG_H
+#define URJ_URJTAG_H
+
+#undef ENABLE_BSDL
+#undef ENABLE_SVF
+#undef HAVE_LIBUSB
+
+#include "types.h"
+#include "bitmask.h"
+#include "bsbit.h"
+#if ENABLE_BSDL
+#include "bsdl.h"
+#include "bsdl_mode.h"
+#endif
+#include "bssignal.h"
+#include "bus.h"
+#include "bus_driver.h"
+#include "cable.h"
+#include "chain.h"
+#include "cmd.h"
+#include "data_register.h"
+#include "fclock.h"
+#include "flash.h"
+#include "gettext.h"
+#include "jim.h"
+#include "jtag.h"
+#include "parport.h"
+#include "part.h"
+#include "part_instruction.h"
+#include "pod.h"
+#if ENABLE_SVF
+#include "svf.h"
+#endif
+#include "tap.h"
+#include "tap_register.h"
+#include "tap_state.h"
+#if HAVE_LIBUSB
+#include "usbconn.h"
+#include "xpcu.h"
+#endif
+
+#endif /* URJ_URJTAG_H */
--- /dev/null
+/*
+ * $Id$
+ *
+ * USB Device Connection Driver Interface
+ * Copyright (C) 2008 K. Waschk
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Kolja Waschk <kawk>, 2008
+ *
+ */
+
+#ifndef URJ_USBCONN_H
+#define URJ_USBCONN_H
+
+#include <stdint.h>
+
+#include "types.h"
+#include "params.h"
+
+typedef struct
+{
+ const char *name;
+ const char *desc;
+ const char *driver;
+ int32_t vid;
+ int32_t pid;
+}
+urj_usbconn_cable_t;
+
+typedef struct
+{
+ const char *type;
+ urj_usbconn_t *(*connect) (urj_usbconn_cable_t *cable,
+ const urj_param_t *params[]);
+ void (*free) (urj_usbconn_t *);
+ /** @return URJ_STATUS_OK on success; URJ_STATUS_FAIL on error */
+ int (*open) (urj_usbconn_t *);
+ /** @return URJ_STATUS_OK on success; URJ_STATUS_FAIL on error */
+ int (*close) (urj_usbconn_t *);
+ /** @return bytes read on success; -1 on error */
+ int (*read) (urj_usbconn_t *, uint8_t *, int);
+ /** @return bytes written on success; -1 on error */
+ int (*write) (urj_usbconn_t *, uint8_t *, int, int);
+}
+urj_usbconn_driver_t;
+
+struct URJ_USBCONN
+{
+ urj_usbconn_driver_t *driver;
+ void *params;
+ urj_cable_t *cable;
+};
+
+urj_usbconn_t *usbconn_connect (urj_usbconn_cable_t *cable,
+ const urj_param_t *params[]);
+int usbconn_free (urj_usbconn_t *conn);
+int urj_tap_usbconn_open (urj_usbconn_t *conn);
+int urj_tap_usbconn_close (urj_usbconn_t *conn);
+int urj_tap_usbconn_read (urj_usbconn_t *conn, uint8_t *buf, int len);
+int urj_tap_usbconn_write (urj_usbconn_t *conn, uint8_t *buf, int len,
+ int recv);
+extern urj_usbconn_driver_t *urj_tap_usbconn_drivers[];
+
+#endif /* URJ_USBCONN_H */
--- /dev/null
+/*
+ * $Id$
+ *
+ * Xilinx Platform Cable USB functions
+ * Copyright (C) 2008 K. Waschk
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Kolja Waschk <kawk>, 2008
+ *
+ */
+
+#ifndef URJ_XPCU_H
+#define URJ_XPCU_H 1
+
+#include <stdint.h>
+#include <usb.h>
+
+#define URJ_XPCU_VID 0x03FD
+#define URJ_XPCU_PID 0x0008
+
+struct usb_device *find_xpcu (void);
+int xpcu_init (void);
+int xpcu_close (struct usb_dev_handle *xpcu);
+int xpcu_request_28 (struct usb_dev_handle *xpcu, int value);
+int xpcu_raise_ioa5 (struct usb_dev_handle *xpcu);
+int xpcu_write_gpio (struct usb_dev_handle *xpcu, uint8_t bits);
+int xpcu_read_gpio (struct usb_dev_handle *xpcu, uint8_t *bits);
+int xpcu_bitrev_test (struct usb_dev_handle *xpcu);
+int xpcu_select_gpio (struct usb_dev_handle *xpcu, int select);
+int xpcu_open (struct usb_dev_handle **xpcu);
+int xpcu_request_a6 (struct usb_dev_handle *xpcu, int nibbles, uint8_t *xmit,
+ int inlen, uint8_t *recv);
+
+
+#endif /* URJ_XPCU_H */
--- /dev/null
+Makefile.in.in
+Makefile.in
+Makefile
+POTFILES
+Rules-quot
+boldquot.sed
+en@boldquot.header
+en@quot.header
+insert-header.sin
+quot.sed
+remove-potcdate.sin
+remove-potcdate.sed
+jtag.pot
+messages.mo
+*.gmo
+stamp-po
+Makevars.template
--- /dev/null
+2007-12-23 Kolja Waschk <kawk>
+
+ * rw/fr/sk.po: Committed machine-updated files.
+
+2007-11-02 Kolja Waschk <kawk>
+
+ * created "UrJTAG" project as fork of openwince jtag tools. All older
+ log entries in this ChangeLog describe the openwince development.
+
+2005-04-06 Marcel Telka <marcel@telka.sk>
+
+ * rw.po: Added Kinyarwanda translation by Steven Michael Murphy.
+ * LINGUAS: Added rw.
+
+2004-11-24 Marcel Telka <marcel@telka.sk>
+
+ * POTFILES.in: Added src/cmd/reset.c.
+
+2004-11-18 Marcel Telka <marcel@telka.sk>
+
+ * POTFILES.in: Added src/bus/ppc440gx_ebc8.c, src/bus/tx4925.c, and src/tap/cable/lattice.c.
+
+2004-10-22 Marcel Telka <marcel@telka.sk>
+
+ * POTFILES.in: Added src/bus/lh7a400.c (patch 886068, Marko Rößler).
+
+2004-05-11 Marcel Telka <marcel@telka.sk>
+
+ * fr.po: Updated French translation by Michel Robitaille.
+
+2004-01-07 Marcel Telka <marcel@telka.sk>
+
+ * POTFILES.in: Added missing files.
+
+2004-01-07 Marcel Telka <marcel@telka.sk>
+
+ * fr.po: Updated French translation by Michel Robitaille.
+
+2004-01-06 Marcel Telka <marcel@telka.sk>
+
+ * fr.po: Added French translation by Michel Robitaille.
+ * LINGUAS: Added fr.
+
+2003-10-08 Marcel Telka <marcel@telka.sk>
+
+ * sk.po: Updated Slovak translation.
+
+2003-09-23 Marcel Telka <marcel@telka.sk>
+
+ * POTFILES.in: Added src/tap/cable/triton.c.
+
+2003-09-05 Marcel Telka <marcel@telka.sk>
+
+ * POTFILES.in: Added src/cmd/initbus.c.
+
+2003-09-04 Marcel Telka <marcel@telka.sk>
+
+ * sk.po: Updated Slovak translation for 0.5 release reformatted by TP-Robot.
+
+2003-08-19 Marcel Telka <marcel@telka.sk>
+
+ * Makevars (MSGID_BUGS_ADDRESS): Added e-mail address.
+ * sk.po: Added e-mail address for bugs. Removed some comments.
+
+2003-08-19 Marcel Telka <marcel@telka.sk>
+
+ * POTFILES.in: Added src/bus/s3c4510x.c.
+ * sk.po: Updated Slovak translation.
+
+2003-08-19 Marcel Telka <marcel@telka.sk>
+
+ * sk.po: Updated Slovak translation.
+
+2003-08-18 Marcel Telka <marcel@telka.sk>
+
+ * POTFILES.in: Added src/cmd/eraseflash.c.
+ * sk.po: Added Slovak translations.
+ * LINGUAS: Added sk.
+
+2003-08-14 Marcel Telka <marcel@telka.sk>
+
+ * POTFILES.in: Added new source files.
+
--- /dev/null
+# $Id$
+
+fr
+rw
+sk
--- /dev/null
+# $Id$
+
+include $(top_srcdir)/Makefile.rules
+
+# Makefile variables for PO directory in any package using GNU gettext.
+
+# Usually the message domain is the same as the package name.
+DOMAIN = $(PACKAGE)
+
+# These two variables depend on the location of this directory.
+subdir = po
+top_builddir = ..
+
+# These options get passed to xgettext.
+XGETTEXT_OPTIONS = --keyword=_ --keyword=N_
+
+# This is the copyright holder that gets inserted into the header of the
+# $(DOMAIN).pot file. Set this to the copyright holder of the surrounding
+# package. (Note that the msgstr strings, extracted from the package's
+# sources, belong to the copyright holder of the package.) Translators are
+# expected to transfer the copyright for their translations to this person
+# or entity, or to disclaim their copyright. The empty string stands for
+# the public domain; in this case the translators are expected to disclaim
+# their copyright.
+COPYRIGHT_HOLDER = ETC s.r.o.
+
+# This is the email address or URL to which the translators shall report
+# bugs in the untranslated strings:
+# - Strings which are not entire sentences, see the maintainer guidelines
+# in the GNU gettext documentation, section 'Preparing Strings'.
+# - Strings which use unclear terms or require additional context to be
+# understood.
+# - Strings which make invalid assumptions about notation of date, time or
+# money.
+# - Pluralisation problems.
+# - Incorrect English spelling.
+# - Incorrect formatting.
+# It can be your email address, or a mailing list address where translators
+# can write to without being subscribed, or the URL of a web page through
+# which the translators can contact you.
+MSGID_BUGS_ADDRESS = marcel@telka.sk
+
+# This is the list of locale categories, beyond LC_MESSAGES, for which the
+# message catalogs shall be used. It is usually empty.
+EXTRA_LOCALE_CATEGORIES =
--- /dev/null
+# $Id$
+src/apps/bsdl2jtag/bsdl2jtag.c
+src/apps/jtag/jtag.c
+src/bsdl/bsdl_bison.c
+src/bsdl/bsdl.c
+src/bsdl/bsdl_flex.c
+src/bsdl/bsdl_sem.c
+src/bsdl/vhdl_bison.c
+src/bsdl/vhdl_flex.c
+src/bus/au1500.c
+src/bus/avr32.c
+src/bus/bcm1250.c
+src/bus/bf533_ezkit.c
+src/bus/bf533_stamp.c
+src/bus/bf537_stamp.c
+src/bus/bf548_ezkit.c
+src/bus/bf561_ezkit.c
+src/bus/bscoach.c
+src/bus/buses.c
+src/bus/ejtag.c
+src/bus/fjmem.c
+src/bus/generic_bus.c
+src/bus/h7202.c
+src/bus/ixp425.c
+src/bus/jopcyc.c
+src/bus/lh7a400.c
+src/bus/mpc5200.c
+src/bus/mpc824x.c
+src/bus/ppc405ep.c
+src/bus/ppc440gx_ebc8.c
+src/bus/prototype.c
+src/bus/pxa2x0.c
+src/bus/readmem.c
+src/bus/s3c4510x.c
+src/bus/sa1110.c
+src/bus/sh7727.c
+src/bus/sh7750r.c
+src/bus/sh7751r.c
+src/bus/sharc21065l.c
+src/bus/slsup3.c
+src/bus/tx4925.c
+src/bus/writemem.c
+src/bus/zefant-xs3.c
+src/cmd/cmd_bit.c
+src/cmd/cmd_bsdl.c
+src/cmd/cmd_bus.c
+src/cmd/cmd_cable.c
+src/cmd/cmd_cmd.c
+src/cmd/cmd_debug.c
+src/cmd/cmd_detect.c
+src/cmd/cmd_detectflash.c
+src/cmd/cmd_discovery.c
+src/cmd/cmd_dr.c
+src/cmd/cmd_endian.c
+src/cmd/cmd_eraseflash.c
+src/cmd/cmd_flashmem.c
+src/cmd/cmd_frequency.c
+src/cmd/cmd_get.c
+src/cmd/cmd_help.c
+src/cmd/cmd_idcode.c
+src/cmd/cmd_include.c
+src/cmd/cmd_initbus.c
+src/cmd/cmd_instruction.c
+src/cmd/cmd_part.c
+src/cmd/cmd_peekpoke.c
+src/cmd/cmd_pod.c
+src/cmd/cmd_print.c
+src/cmd/cmd_quit.c
+src/cmd/cmd_readmem.c
+src/cmd/cmd_register.c
+src/cmd/cmd_reset.c
+src/cmd/cmd_salias.c
+src/cmd/cmd_scan.c
+src/cmd/cmd_set.c
+src/cmd/cmd_shell.c
+src/cmd/cmd_shift.c
+src/cmd/cmd_signal.c
+src/cmd/cmd_svf.c
+src/cmd/cmd_test.c
+src/cmd/cmd_usleep.c
+src/cmd/cmd_writemem.c
+src/flash/amd.c
+src/flash/amd_flash.c
+src/flash/cfi.c
+src/flash/detectflash.c
+src/flash/flash.c
+src/flash/intel.c
+src/flash/jedec.c
+src/flash/jedec_exp.c
+src/global/log-error.c
+src/global/parse.c
+src/global/data_dir.c
+src/global/params.c
+src/jim/intel_28f800b3.c
+src/jim/some_cpu.c
+src/jim/jim_tap.c
+src/lib/fclock.c
+src/part/bsbit.c
+src/part/data_register.c
+src/part/instruction.c
+src/part/part.c
+src/part/signal.c
+src/svf/svf_bison.c
+src/svf/svf.c
+src/svf/svf_flex.c
+src/tap/cable/arcom.c
+src/tap/cable/byteblaster.c
+src/tap/cable.c
+src/tap/cable/dlc5.c
+src/tap/cable/ea253.c
+src/tap/cable/ei012.c
+src/tap/cable/ft2232.c
+src/tap/cable/generic.c
+src/tap/cable/generic_parport.c
+src/tap/cable/generic_usbconn.c
+src/tap/cable/jim.c
+src/tap/cable/jlink.c
+src/tap/cable/keithkoep.c
+src/tap/cable/lattice.c
+src/tap/cable/mpcbdm.c
+src/tap/cable/triton.c
+src/tap/cable/ts7800.c
+src/tap/cable/usbblaster.c
+src/tap/cable/vision_ep9307.c
+src/tap/cable/wiggler2.c
+src/tap/cable/wiggler.c
+src/tap/cable/xpc.c
+src/tap/chain.c
+src/tap/detect.c
+src/tap/discovery.c
+src/tap/parport.c
+src/tap/parport/direct.c
+src/tap/parport/ppdev.c
+src/tap/parport/ppi.c
+src/tap/register.c
+src/tap/state.c
+src/tap/tap.c
+src/tap/usbconn.c
+src/tap/usbconn/libusb.c
+src/tap/usbconn/libftd2xx.c
+src/tap/usbconn/libftdi.c
--- /dev/null
+# Messages français pour GNU concernant jtag.
+# Copyright © 2004 Free Software Foundation, Inc.
+# This file is distributed under the same license as the PACKAGE package.
+# Michel Robitaille <robitail@IRO.UMontreal.CA>, traducteur depuis/since 1996.
+#
+msgid ""
+msgstr ""
+"Project-Id-Version: GNU jtag 0.5.1\n"
+"Report-Msgid-Bugs-To: marcel@telka.sk\n"
+"POT-Creation-Date: 2009-05-28 14:35+0200\n"
+"PO-Revision-Date: 2004-05-10 08:00-0500\n"
+"Last-Translator: Michel Robitaille <robitail@IRO.UMontreal.CA>\n"
+"Language-Team: French <traduc@traduc.org>\n"
+"MIME-Version: 1.0\n"
+"Content-Type: text/plain; charset=ISO-8859-1\n"
+"Content-Transfer-Encoding: 8-bit\n"
+"Plural-Forms: nplurals=2; plural=(n > 1);\n"
+
+#: src/apps/jtag/jtag.c:372
+#, c-format
+msgid "'%s' must not be run suid root!\n"
+msgstr ""
+
+#: src/apps/jtag/jtag.c:431
+#, fuzzy, c-format
+msgid "%s #%s\n"
+msgstr "%-13s %s\n"
+
+#: src/apps/jtag/jtag.c:434
+#, c-format
+msgid "Usage: %s [OPTIONS] [FILE [FILE ... ]] \n"
+msgstr ""
+
+#: src/apps/jtag/jtag.c:437
+#, c-format
+msgid " -h, --help display this help and exit\n"
+msgstr ""
+
+#: src/apps/jtag/jtag.c:438
+#, c-format
+msgid " -v, --version display version information and exit\n"
+msgstr ""
+
+#: src/apps/jtag/jtag.c:440
+#, c-format
+msgid " -n, --norc disable reading ~/.jtag/rc on startup\n"
+msgstr ""
+
+#: src/apps/jtag/jtag.c:441
+#, c-format
+msgid " -i, --interactive enter interactive mode after reading files\n"
+msgstr ""
+
+#: src/apps/jtag/jtag.c:442
+#, c-format
+msgid " -q, --quiet Do not print help on startup\n"
+msgstr ""
+
+#: src/apps/jtag/jtag.c:444
+#, c-format
+msgid " [FILE] file containing commands to execute\n"
+msgstr ""
+
+#: src/apps/jtag/jtag.c:447
+#, c-format
+msgid " Please report bugs at http://www.urjtag.org\n"
+msgstr ""
+
+#: src/apps/jtag/jtag.c:454
+#, c-format
+msgid ""
+"\n"
+"%s #%s\n"
+"\n"
+"Copyright (C) 2002, 2003 ETC s.r.o.\n"
+"Copyright (C) 2007, 2008, 2009 Kolja Waschk and the respective authors\n"
+msgstr ""
+
+#: src/apps/jtag/jtag.c:459
+#, c-format
+msgid ""
+"\n"
+"This program is free software; you can redistribute it and/or modify\n"
+"it under the terms of the GNU General Public License as published by\n"
+"the Free Software Foundation; either version 2 of the License, or\n"
+"(at your option) any later version.\n"
+"\n"
+"This program is distributed in the hope that it will be useful,\n"
+"but WITHOUT ANY WARRANTY; without even the implied warranty of\n"
+"MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the\n"
+"GNU General Public License for more details.\n"
+"\n"
+"You should have received a copy of the GNU General Public License\n"
+"along with this program; if not, write to the Free Software\n"
+"Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA\n"
+msgstr ""
+
+#: src/apps/jtag/jtag.c:485 src/apps/jtag/jtag.c:508 src/apps/jtag/jtag.c:531
+#, c-format
+msgid "Out of memory\n"
+msgstr "Mémoire épuisée\n"
+
+#: src/apps/jtag/jtag.c:493
+#, c-format
+msgid "Unable to open file `%s'!\n"
+msgstr "Incapable d'ouvrir le fichier `%s'!\n"
+
+#: src/apps/jtag/jtag.c:520
+#, fuzzy, c-format
+msgid ""
+"\n"
+"%s #%s\n"
+"Copyright (C) 2002, 2003 ETC s.r.o.\n"
+"Copyright (C) 2007, 2008, 2009 Kolja Waschk and the respective authors\n"
+"\n"
+"%s is free software, covered by the GNU General Public License, and you are\n"
+"welcome to change it and/or distribute copies of it under certain "
+"conditions.\n"
+"There is absolutely no warranty for %s.\n"
+"\n"
+msgstr ""
+"%s\n"
+"Copyright © 2002, 2003 ETC s.r.o.\n"
+"%s est un logiciel libre; vous pouvez le redistribuer ou le\n"
+"modifier selon les termes de la License Publique Générale de GNU, publiée\n"
+"par la Free Software Foundation (soit la version 2 ou selon votre choix, "
+"toute version ultérieure).\n"
+"\n"
+"Ce programme est distribué dans l'espoir qu'il soit utile,\n"
+"mais AUCUNE garantie n'est donnée pour %s\n"
+"tant pour des raisons COMMERCIALES que\n"
+"pour RÉPONDRE À UN BESOIN PARTICULIER. Consulter la licence\n"
+"GNU General Public License pour plus de détails.\n"
+"\n"
+"Vous devriez avoir reçu copie de la Licence Publique Générale de GNU\n"
+"avec ce programme; sinon, écrire à la Free Software Foundation, Inc.,\n"
+"59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.\n"
+
+#: src/apps/jtag/jtag.c:537
+#, fuzzy, c-format
+msgid "%s may damage your hardware!\n"
+msgstr ""
+"AVERTISSEMENT: %s peut endommager votre matériel! Taper \"quit\" pour "
+"quitter!\n"
+"\n"
+
+#: src/apps/jtag/jtag.c:539
+#, fuzzy
+msgid ""
+"Type \"quit\" to exit, \"help\" for help.\n"
+"\n"
+msgstr ""
+"Taper \"help\" pour de l'aide.\n"
+"\n"
+
+#: bsdl_bison.y:268
+msgid "Unsupported BSDL construct found"
+msgstr ""
+
+#: bsdl_bison.y:331
+msgid "Error in Instruction_Opcode attribute statement"
+msgstr ""
+
+#: bsdl_bison.y:344
+msgid "Multiple opcode patterns are not supported, first pattern will be used"
+msgstr ""
+
+#: bsdl_bison.y:375
+msgid "Error in Opcode List"
+msgstr ""
+
+#: bsdl_bison.y:461
+msgid "Error in Boundary Cell description"
+msgstr ""
+
+#: bsdl_bison.y:586
+#, fuzzy
+msgid "Error in ISC_Pin_Behavior Definition"
+msgstr "ERREUR: longueur de l'enregistrement invalide!\n"
+
+#: bsdl_bison.y:598
+#, fuzzy
+msgid "Error in ISC_Fixed_System_Pins Definition"
+msgstr "ERREUR: longueur de l'enregistrement invalide!\n"
+
+#: bsdl_bison.y:625
+#, fuzzy
+msgid "Error in ISC_Security Definition"
+msgstr "ERREUR: longueur de l'enregistrement invalide!\n"
+
+#: bsdl_bison.y:659
+#, fuzzy
+msgid "Error in ISC_Flow Definition"
+msgstr "ERREUR: longueur de l'enregistrement invalide!\n"
+
+#: bsdl_bison.y:823
+#, fuzzy
+msgid "Error in ISC_Procedure Definition"
+msgstr "ERREUR: longueur de l'enregistrement invalide!\n"
+
+#: bsdl_bison.y:847
+#, fuzzy
+msgid "Error in ISC_Action Definition"
+msgstr "ERREUR: longueur de l'enregistrement invalide!\n"
+
+#: bsdl_bison.y:890 bsdl_bison.y:904 vhdl_bison.y:674
+#, c-format
+msgid "Line %d, %s.\n"
+msgstr ""
+
+#: src/bsdl/bsdl.c:117
+#, c-format
+msgid "Reading file '%s'\n"
+msgstr ""
+
+#: src/bsdl/bsdl.c:138
+#, c-format
+msgid "BSDL file '%s' passed VHDL stage correctly\n"
+msgstr ""
+
+#: src/bsdl/bsdl.c:145
+#, c-format
+msgid "BSDL file '%s' passed BSDL stage correctly\n"
+msgstr ""
+
+#: src/bsdl/bsdl.c:152
+#, c-format
+msgid "BSDL file '%s' contains errors in VHDL stage, stopping\n"
+msgstr ""
+
+#: src/bsdl/bsdl.c:293 src/tap/detect.c:372
+#, c-format
+msgid " Filename: %s\n"
+msgstr " nom de fichier: %s\n"
+
+#: src/bsdl/bsdl.c:305
+#, fuzzy, c-format
+msgid "Cannot open directory %s\n"
+msgstr "ne peut ouvrir %s\n"
+
+#: src/bsdl/bsdl_sem.c:204
+msgid "No IDCODE specification found.\n"
+msgstr ""
+
+#: src/bsdl/bsdl_sem.c:649
+msgid "IDCODE matched\n"
+msgstr ""
+
+#: src/bsdl/bsdl_sem.c:651
+msgid "IDCODE mismatch\n"
+msgstr ""
+
+#: src/bsdl/bsdl_sem.c:699
+msgid "BSDL stage reported errors, aborting.\n"
+msgstr ""
+
+#: src/bsdl/bsdl_sem.c:706
+#, c-format
+msgid "Got IDCODE: %s\n"
+msgstr ""
+
+#: vhdl_bison.y:231
+msgid "Improper Entity declaration"
+msgstr ""
+
+#: vhdl_bison.y:232
+msgid "Check if source file is BSDL"
+msgstr ""
+
+#: vhdl_bison.y:242 vhdl_bison.y:250
+#, fuzzy
+msgid "Syntax Error"
+msgstr "ERREUR de syntaxe!\n"
+
+#: vhdl_bison.y:260
+msgid "Improper Port declaration"
+msgstr ""
+
+#: vhdl_bison.y:292
+#, fuzzy
+msgid "Error in Package declaration(s)"
+msgstr "ERREUR: longueur de l'enregistrement invalide!\n"
+
+#: vhdl_bison.y:317
+#, fuzzy
+msgid "Error in Standard Package"
+msgstr "ERREUR: longueur de l'enregistrement invalide!\n"
+
+#: vhdl_bison.y:335
+#, fuzzy
+msgid "Error in Standard Declarations"
+msgstr "ERREUR: longueur de l'enregistrement invalide!\n"
+
+#: vhdl_bison.y:346
+#, fuzzy
+msgid "Error in Attribute type identification"
+msgstr "ERREUR: longueur de l'enregistrement invalide!\n"
+
+#: vhdl_bison.y:362
+#, fuzzy
+msgid "Error in Type definition"
+msgstr "ERREUR: longueur de l'enregistrement invalide!\n"
+
+#: vhdl_bison.y:378
+#, fuzzy
+msgid "Error in Bit definition"
+msgstr "ERREUR: longueur de l'enregistrement invalide!\n"
+
+#: vhdl_bison.y:389
+#, fuzzy
+msgid "Error in Record Definition"
+msgstr "ERREUR: longueur de l'enregistrement invalide!\n"
+
+#: vhdl_bison.y:402
+#, fuzzy
+msgid "Error in defered constant"
+msgstr "ERREUR: longueur de l'enregistrement invalide!\n"
+
+#: vhdl_bison.y:414
+#, fuzzy
+msgid "Error in Package Body definition"
+msgstr "ERREUR: longueur de l'enregistrement invalide!\n"
+
+#: vhdl_bison.y:426
+#, fuzzy
+msgid "Error in Cell Constant definition"
+msgstr "ERREUR: longueur de l'enregistrement invalide!\n"
+
+#: vhdl_bison.y:437
+#, fuzzy
+msgid "Error in Cell Data Record"
+msgstr "Error: échec de la connexion par cable!\n"
+
+#: vhdl_bison.y:446
+#, fuzzy
+msgid "Error in Cell_Type Function field"
+msgstr "Error: échec de la connexion par cable!\n"
+
+#: vhdl_bison.y:453
+#, fuzzy
+msgid "Error in BScan_Inst Instruction field"
+msgstr "Error: échec de la connexion par cable!\n"
+
+#: vhdl_bison.y:460
+#, fuzzy
+msgid "Error in Constant CAP data source field"
+msgstr "ERREUR: longueur de l'enregistrement invalide!\n"
+
+#: vhdl_bison.y:484
+#, fuzzy
+msgid "Error in User-Defined Package declarations"
+msgstr "ERREUR: longueur de l'enregistrement invalide!\n"
+
+#: vhdl_bison.y:491
+msgid "Unknown VHDL statement"
+msgstr ""
+
+#: vhdl_bison.y:514
+#, fuzzy
+msgid "Error in Attribute specification"
+msgstr "ERREUR: longueur de l'enregistrement invalide!\n"
+
+#: vhdl_bison.y:669
+#, c-format
+msgid "In Package %s, Line %d, %s.\n"
+msgstr ""
+
+#: vhdl_bison.y:687
+msgid "Too many errors"
+msgstr ""
+
+#: src/bus/au1500.c:124
+#, fuzzy, c-format
+msgid "AU1500 compatible bus driver via BSR (JTAG part No. %d)\n"
+msgstr "pilote de bus compatible Intel SA-1110 via BSR (JTAG no de pièce %d)\n"
+
+#: src/bus/au1500.c:301
+msgid "AU1500 BUS Driver via BSR"
+msgstr ""
+
+#: src/bus/avr32.c:153
+#, fuzzy, c-format
+msgid "%s: instr=%s\n"
+msgstr "%-13s %s\n"
+
+#: src/bus/avr32.c:158
+#, fuzzy, c-format
+msgid "%s: ret=%s\n"
+msgstr "%-13s %s\n"
+
+#: src/bus/avr32.c:172
+#, fuzzy, c-format
+msgid "%s: data=%s\n"
+msgstr "%-13s %s\n"
+
+#: src/bus/avr32.c:175
+#, c-format
+msgid "%s: data out=%s\n"
+msgstr ""
+
+#: src/bus/avr32.c:196
+#, c-format
+msgid "%s: slave=%01x, addr=%08lx, %s\n"
+msgstr ""
+
+#: src/bus/avr32.c:222 src/bus/avr32.c:248 src/bus/avr32.c:322
+#: src/bus/avr32.c:334
+#, fuzzy, c-format
+msgid "%s: data=%08lx\n"
+msgstr "%-13s %s\n"
+
+#: src/bus/avr32.c:292
+#, fuzzy, c-format
+msgid "%s: addr=%08lx, mode=%s\n"
+msgstr "adr: 0x%08X"
+
+#: src/bus/avr32.c:383
+#, fuzzy, c-format
+msgid "%s: read status %08lx\n"
+msgstr "%s: état invalide: %2X\n"
+
+#: src/bus/avr32.c:417
+#, fuzzy, c-format
+msgid "%s: status=%08lx\n"
+msgstr "%s: état invalide: %2X\n"
+
+#: src/bus/avr32.c:613
+#, fuzzy, c-format
+msgid "AVR32 multi-mode bus driver (JTAG part No. %d)\n"
+msgstr "pilote de bus compatible Intel SA-1110 via BSR (JTAG no de pièce %d)\n"
+
+#: src/bus/avr32.c:695
+#, fuzzy, c-format
+msgid "%s:addr=%08lx\n"
+msgstr "adr: 0x%08X"
+
+#: src/bus/avr32.c:806
+msgid ""
+"Atmel AVR32 multi-mode bus driver, requires <mode> parameter\n"
+" valid <mode> parameters:\n"
+" x8: 8 bit bus for the uncached HSB area, via OCD registers\n"
+" x16: 16 bit bus for the uncached HSB area, via OCD "
+"registers\n"
+" x32: 32 bit bus for the uncached HSB area, via OCD "
+"registers\n"
+" OCD : 32 bit bus for the OCD registers\n"
+" HSBC: 32 bit bus for the cached HSB area, via SAB\n"
+" HSBU: 32 bit bus for the uncached HSB area, via SAB"
+msgstr ""
+
+#: src/bus/bcm1250.c:115
+#, c-format
+msgid "Broadcom BCM1250 compatible bus driver via BSR (JTAG part No. %d)\n"
+msgstr ""
+"Pilote de bus compatible Broadcom BCM1250 via BSR (JTAG No de pièce %d)\n"
+
+#: src/bus/bcm1250.c:525
+msgid "Broadcom BCM1250 compatible bus driver via BSR"
+msgstr "pilote de bus compatible Broadcom BCM1250 via BSR"
+
+#: src/bus/bf533_ezkit.c:139
+#, fuzzy, c-format
+msgid "Blackfin BF533 EZKit compatible bus driver via BSR (JTAG part No. %d)\n"
+msgstr ""
+"Pilote de bus compatible Broadcom BCM1250 via BSR (JTAG No de pièce %d)\n"
+
+#: src/bus/bf533_ezkit.c:324
+msgid "Blackfin BF533 EZKit board bus driver"
+msgstr ""
+
+#: src/bus/bf533_stamp.c:145
+#, fuzzy, c-format
+msgid "Blackfin BF533 compatible bus driver via BSR (JTAG part No. %d)\n"
+msgstr ""
+"Pilote de bus compatible Broadcom BCM1250 via BSR (JTAG No de pièce %d)\n"
+
+#: src/bus/bf533_stamp.c:332
+msgid "Blackfin BF533 Stamp board bus driver"
+msgstr ""
+
+#: src/bus/bf537_stamp.c:315 src/bus/pxa2x0.c:251
+#, fuzzy, c-format
+msgid "%s (JTAG part No. %d)\n"
+msgstr "pilote de bus compatible Intel SA-1110 via BSR (JTAG no de pièce %d)\n"
+
+#: src/bus/bf537_stamp.c:335
+#, fuzzy
+msgid "Blackfin BF537 Stamp board bus driver via BSR"
+msgstr ""
+"Pilote de bus compatible Broadcom BCM1250 via BSR (JTAG No de pièce %d)\n"
+
+#: src/bus/bf537_stamp.c:345
+#, fuzzy
+msgid "Blackfin BF537 EZ-KIT board bus driver via BSR"
+msgstr ""
+"Pilote de bus compatible Broadcom BCM1250 via BSR (JTAG No de pièce %d)\n"
+
+#: src/bus/bf537_stamp.c:355
+#, fuzzy
+msgid "Blackfin BF527 EZ-KIT board bus driver via BSR"
+msgstr ""
+"Pilote de bus compatible Broadcom BCM1250 via BSR (JTAG No de pièce %d)\n"
+
+#: src/bus/bf537_stamp.c:365
+#, fuzzy
+msgid "Blackfin BF538F EZ-KIT board bus driver"
+msgstr ""
+"Pilote de bus compatible Broadcom BCM1250 via BSR (JTAG No de pièce %d)\n"
+
+#: src/bus/bf537_stamp.c:375
+#, fuzzy
+msgid "Blackfin BF526 EZ-KIT board bus driver"
+msgstr ""
+"Pilote de bus compatible Broadcom BCM1250 via BSR (JTAG No de pièce %d)\n"
+
+#: src/bus/bf548_ezkit.c:140
+#, fuzzy, c-format
+msgid ""
+"Blackfin BF548 EZ-KIT compatible bus driver via BSR (JTAG part No. %d)\n"
+msgstr ""
+"Pilote de bus compatible Broadcom BCM1250 via BSR (JTAG No de pièce %d)\n"
+
+#: src/bus/bf548_ezkit.c:314
+msgid "Blackfin BF548 EZ-KIT board bus driver"
+msgstr ""
+
+#: src/bus/bf561_ezkit.c:145
+#, fuzzy, c-format
+msgid ""
+"Blackfin BF561 EZ-KIT compatible bus driver via BSR (JTAG part No. %d)\n"
+msgstr ""
+"pilote de bus compatible Hitachi SH7751R via BSR (JTAG no de pièce %d)\n"
+
+#: src/bus/bf561_ezkit.c:337
+msgid "Blackfin BF561 EZ-KIT board bus driver"
+msgstr ""
+
+#: src/bus/bscoach.c:137
+#, fuzzy, c-format
+msgid ""
+"Goepel electronic Boundary Scan Coach compatible bus driver via BSR (JTAG "
+"part No. %d)\n"
+msgstr ""
+"pilote de bus compatible Hitachi SH7727 via BSR (JTAG no de pièce %d)\n"
+
+#: src/bus/bscoach.c:378
+msgid ""
+"Goepel Boundary Scan Coach compatible bus driver for flash programming via "
+"BSR"
+msgstr ""
+
+#: src/bus/buses.c:182 src/bus/buses.c:219
+#, c-format
+msgid "realloc(%s,%zd) fails"
+msgstr ""
+
+#: src/bus/buses.c:242
+#, fuzzy
+msgid "invalid bus number"
+msgstr "%s: numéro de bus invalide\n"
+
+#: src/bus/buses.c:284
+#, fuzzy, c-format
+msgid "Initialized bus %d, active bus %d\n"
+msgstr "initialiser le pilote du bus pour la pièce active."
+
+#: src/bus/ejtag.c:137
+#, fuzzy, c-format
+msgid "EJTAG compatible bus driver via PrAcc (JTAG part No. %d)\n"
+msgstr "pilote de bus compatible Intel SA-1110 via BSR (JTAG no de pièce %d)\n"
+
+#: src/bus/ejtag.c:168
+msgid "EJADDRESS, EJDATA or EJCONTROL register not found"
+msgstr ""
+
+#: src/bus/ejtag.c:189
+#, c-format
+msgid "Reset occurred, ctrl=%s"
+msgstr ""
+
+#: src/bus/ejtag.c:196
+#, c-format
+msgid "No processor access, ctrl=%s"
+msgstr ""
+
+#: src/bus/ejtag.c:210
+#, c-format
+msgid "PrAcc bad alignment: addr=0x%08lx"
+msgstr ""
+
+#: src/bus/ejtag.c:225
+#, c-format
+msgid "%s(%d) PrAcc write: addr=0x%08lx data=0x%08lx\n"
+msgstr ""
+
+#: src/bus/ejtag.c:236
+#, c-format
+msgid "Unknown write addr=0x%08lx data=0x%08lx"
+msgstr ""
+
+#: src/bus/ejtag.c:297
+msgid "EJCONTROL or EJIMPCODE register not found"
+msgstr ""
+
+#: src/bus/ejtag.c:546
+#, c-format
+msgid "Failed to enter debug mode, ctrl=%s"
+msgstr ""
+
+#: src/bus/ejtag.c:761
+#, fuzzy
+msgid "EJTAG compatible bus driver via PrAcc"
+msgstr "pilote de bus compatible Intel PXA2x0 via BSR"
+
+#: src/bus/fjmem.c:108 src/part/part.c:348
+#, fuzzy
+msgid "invalid instruction length"
+msgstr "longueur d'instruction invalide\n"
+
+#: src/bus/fjmem.c:397
+msgid "Parameter for instruction opcode missing"
+msgstr ""
+
+#: src/bus/fjmem.c:475
+#, fuzzy, c-format
+msgid "fjmem FPGA bus driver via USER register (JTAG part No. %d)\n"
+msgstr "pilote de bus compatible Intel SA-1110 via BSR (JTAG no de pièce %d)\n"
+
+#: src/bus/fjmem.c:610 src/bus/fjmem.c:645 src/bus/fjmem.c:680
+#: src/bus/fjmem.c:716 src/bus/jopcyc.c:557 src/bus/jopcyc.c:596
+#: src/bus/jopcyc.c:628 src/bus/jopcyc.c:662 src/bus/zefant-xs3.c:707
+#: src/bus/zefant-xs3.c:780 src/bus/zefant-xs3.c:831 src/bus/zefant-xs3.c:887
+msgid "Address out of range"
+msgstr ""
+
+#: src/bus/fjmem.c:733
+msgid ""
+"FPGA JTAG memory bus driver via USER register, requires parameters:\n"
+" opcode=<USERx OPCODE> [len=<FJMEM REG LEN>]"
+msgstr ""
+
+#: src/bus/ixp425.c:117
+#, c-format
+msgid "Intel IXP425 compatible bus driver via BSR (JTAG part No. %d)\n"
+msgstr "pilote de bus compatible Intel IXP425 via BSR (JTAG No de pièce %d)\n"
+
+#: src/bus/ixp425.c:290
+msgid "Intel IXP425 compatible bus driver via BSR"
+msgstr "pilote de bus compatible Intel IXP425 via BSR"
+
+#: src/bus/jopcyc.c:344
+#, fuzzy, c-format
+msgid ""
+"JOP.design Cyclone Board compatible bus driver via BSR (JTAG part No. %d)\n"
+msgstr ""
+"Pilote de bus compatible Broadcom BCM1250 via BSR (JTAG No de pièce %d)\n"
+
+#: src/bus/jopcyc.c:694
+#, fuzzy
+msgid "JOP.design Cyclone Board compatible bus driver via BSR"
+msgstr "pilote de bus compatible Broadcom BCM1250 via BSR"
+
+#: src/bus/lh7a400.c:139
+#, fuzzy, c-format
+msgid "Sharp LH7A400 compatible bus driver via BSR (JTAG part No. %d)\n"
+msgstr ""
+"pilote de bus compatible Hitachi SH7750R via BSR (JTAG no de pièce %d)\n"
+
+#: src/bus/lh7a400.c:327
+#, fuzzy
+msgid "Sharp LH7A400 compatible bus driver via BSR (flash access only!)"
+msgstr ""
+"pilote de bus compatible Hitachi SH7750R via BSR (JTAG no de pièce %d)\n"
+
+#: src/bus/mpc5200.c:157
+#, fuzzy, c-format
+msgid "Freescale MPC5200 compatible bus driver via BSR (JTAG part No. %d)\n"
+msgstr "pilote de bus compatible Intel PXA2x0 via BSR (JTAG No de pièce %d)\n"
+
+#: src/bus/mpc5200.c:172
+msgid "LocalPlus Bus"
+msgstr ""
+
+#: src/bus/mpc5200.c:401
+#, fuzzy
+msgid "Freescale MPC5200 compatible bus driver via BSR, parameter: [mux]"
+msgstr "pilote de bus compatible Intel PXA2x0 via BSR"
+
+#: src/bus/mpc824x.c:112
+msgid ""
+" Bus width 64 exists in mpc824x, but not supported by UrJTAG currently"
+msgstr ""
+
+#: src/bus/mpc824x.c:117
+msgid " Only 8,32 and 64 bus width are supported for Banks 0 and 1"
+msgstr ""
+
+#: src/bus/mpc824x.c:129
+msgid ""
+"Usage: initbus mpc824x [width=WIDTH] [revbits] [dbgAddr] [dbgData]\n"
+"\n"
+" WIDTH data bus width - 8, 32, 64 (default 8)\n"
+" revbits reverse bits in data bus (default - no)\n"
+" dbgAddr display address bus state (default - no)\n"
+" dbgData display data bus state (default - no)\n"
+msgstr ""
+
+#: src/bus/mpc824x.c:155
+#, c-format
+msgid " Using default bus width %d\n"
+msgstr ""
+
+#: src/bus/mpc824x.c:244
+#, fuzzy, c-format
+msgid "Motorola MPC824x compatible bus driver via BSR (JTAG part No. %d)\n"
+msgstr "pilote de bus compatible Intel PXA2x0 via BSR (JTAG No de pièce %d)\n"
+
+#: src/bus/mpc824x.c:268
+msgid "Base ROM Interface (Bank 1)"
+msgstr ""
+
+#: src/bus/mpc824x.c:278 src/bus/mpc824x.c:297
+msgid "Base ROM Interface (Bank 0)"
+msgstr ""
+
+#: src/bus/mpc824x.c:327
+#, c-format
+msgid "Warning: unhandled bus width: %i"
+msgstr ""
+
+#: src/bus/mpc824x.c:350
+#, c-format
+msgid "Addr [%2d:0]: %06lX "
+msgstr ""
+
+#: src/bus/mpc824x.c:400
+#, c-format
+msgid "Data WR [%d:0]: %08lX "
+msgstr ""
+
+#: src/bus/mpc824x.c:446
+#, c-format
+msgid "Data RD [%d:0]: %08lX "
+msgstr ""
+
+#: src/bus/mpc824x.c:566
+#, fuzzy
+msgid "Motorola MPC824x compatible bus driver via BSR"
+msgstr "pilote de bus compatible Intel PXA2x0 via BSR"
+
+#: src/bus/ppc405ep.c:113
+#, fuzzy, c-format
+msgid "IBM PowerPC 405EP compatible bus driver via BSR (JTAG part No. %d)\n"
+msgstr "pilote de bus compatible Intel IXP425 via BSR (JTAG No de pièce %d)\n"
+
+#: src/bus/ppc405ep.c:267
+#, fuzzy
+msgid "IBM PowerPC 405EP compatible bus driver via BSR"
+msgstr "pilote de bus compatible Intel IXP425 via BSR"
+
+#: src/bus/ppc440gx_ebc8.c:113
+#, fuzzy, c-format
+msgid ""
+"IBM PowerPC 440GX 8-bit compatible bus driver via BSR (JTAG part No. %d)\n"
+msgstr "pilote de bus compatible Intel IXP425 via BSR (JTAG No de pièce %d)\n"
+
+#: src/bus/ppc440gx_ebc8.c:271
+#, fuzzy
+msgid "IBM PowerPC 440GX 8-bit EBC compatible bus driver via BSR"
+msgstr "pilote de bus compatible Intel IXP425 via BSR"
+
+#: src/bus/prototype.c:133
+#, c-format
+msgid "value %lu not defined for parameter %s"
+msgstr ""
+
+#: src/bus/prototype.c:166 src/cmd/cmd_get.c:71 src/cmd/cmd_set.c:98
+#: src/cmd/cmd_test.c:75
+#, fuzzy, c-format
+msgid "signal '%s' not found"
+msgstr "signal '%s' non repéré\n"
+
+#: src/bus/prototype.c:210
+#, c-format
+msgid "parameter %s is unknown"
+msgstr ""
+
+#: src/bus/prototype.c:254
+msgid "parameters alsb=<signal> and/or amsb=<signal> are not defined"
+msgstr ""
+
+#: src/bus/prototype.c:314
+msgid "parameters dlsb=<signal> and/or dmsb=<signal> are not defined\n"
+msgstr ""
+
+#: src/bus/prototype.c:321
+msgid "parameter cs=<signal> or ncs=<signal> is not defined\n"
+msgstr ""
+
+#: src/bus/prototype.c:328
+msgid "parameter oe=<signal> or noe=<signal> is not defined\n"
+msgstr ""
+
+#: src/bus/prototype.c:335
+msgid "parameter we=<signal> or nwe=<signal> is not defined\n"
+msgstr ""
+
+#: src/bus/prototype.c:361
+#, fuzzy, c-format
+msgid "Configurable prototype bus driver via BSR (JTAG part No. %d)\n"
+msgstr "pilote de bus compatible Intel SA-1110 via BSR (JTAG no de pièce %d)\n"
+
+#: src/bus/prototype.c:517
+msgid ""
+"Configurable prototype bus driver via BSR, requires parameters:\n"
+" amsb=<addr MSB> alsb=<addr LSB> dmsb=<data MSB> dlsb=<data LSB>\n"
+" ncs=<CS#>|cs=<CS> noe=<OE#>|oe=<OE> nwe=<WE#>|we=<WE> [amode=auto|"
+"x8|x16|x32]"
+msgstr ""
+
+#: src/bus/pxa2x0.c:322 src/bus/pxa2x0.c:421
+msgid "Static Chip Select 0"
+msgstr "Sélection statique du module 0"
+
+#: src/bus/pxa2x0.c:392
+msgid "Memory Mapped registers (Memory Ctl)"
+msgstr "Registres mémoire mappé (Ctl Mémoire)"
+
+#: src/bus/pxa2x0.c:496
+msgid "PXA270 internal address space (cfg, SRAM)"
+msgstr ""
+
+#: src/bus/pxa2x0.c:516
+msgid "PXA270 SDRAM space (4x 64MB)"
+msgstr ""
+
+#: src/bus/pxa2x0.c:756
+msgid "Intel PXA2x0 compatible bus driver via BSR"
+msgstr "pilote de bus compatible Intel PXA2x0 via BSR"
+
+#: src/bus/pxa2x0.c:772
+#, fuzzy
+msgid "Intel PXA27x compatible bus driver via BSR"
+msgstr "pilote de bus compatible Intel PXA2x0 via BSR"
+
+#: src/bus/readmem.c:55 src/bus/writemem.c:49
+#, fuzzy
+msgid "Missing bus driver"
+msgstr "Erreur: pilote de bus manquant!\n"
+
+#: src/bus/readmem.c:68 src/bus/writemem.c:62
+#, fuzzy
+msgid "Unknown bus width"
+msgstr "Largeur de bus inconnu!\n"
+
+#: src/bus/readmem.c:81 src/bus/writemem.c:75
+#, fuzzy, c-format
+msgid "address: 0x%08lX\n"
+msgstr "adresse: 0x%08X\n"
+
+#: src/bus/readmem.c:83 src/bus/writemem.c:77
+#, fuzzy, c-format
+msgid "length: 0x%08lX\n"
+msgstr "longueur: 0x%08X\n"
+
+#: src/bus/readmem.c:88 src/bus/writemem.c:82
+#, fuzzy
+msgid "length is 0"
+msgstr "longeur est 0.\n"
+
+#: src/bus/readmem.c:94
+msgid "reading:\n"
+msgstr "lecture en cours:\n"
+
+#: src/bus/readmem.c:120 src/bus/writemem.c:98
+#, fuzzy, c-format
+msgid "addr: 0x%08llX\r"
+msgstr "adr: 0x%08X"
+
+#: src/bus/readmem.c:133 src/bus/writemem.c:144 src/flash/flash.c:258
+msgid ""
+"\n"
+"Done.\n"
+msgstr ""
+"\n"
+"Complété.\n"
+
+#: src/bus/s3c4510x.c:179
+#, fuzzy, c-format
+msgid ""
+"Samsung S3C4510B compatibile bus driver via BSR (JTAG part No. %d) RCS0=%"
+"ubit\n"
+msgstr ""
+"pilote de bus compatible Samsung S3C4510B via BSR (JTAG no de pièce %d)\n"
+
+#: src/bus/s3c4510x.c:427
+msgid "Samsung S3C4510B compatible bus driver via BSR"
+msgstr "pilote de bus compatible Samsung S3C4510B via BSR"
+
+#: src/bus/sa1110.c:124
+#, c-format
+msgid "Intel SA-1110 compatible bus driver via BSR (JTAG part No. %d)\n"
+msgstr "pilote de bus compatible Intel SA-1110 via BSR (JTAG no de pièce %d)\n"
+
+#: src/bus/sa1110.c:307
+msgid "Intel SA-1110 compatible bus driver via BSR"
+msgstr "pilote de bus compatible Intel SA-1110 via BSR"
+
+#: src/bus/sh7727.c:135
+#, c-format
+msgid "Hitachi SH7727 compatible bus driver via BSR (JTAG part No. %d)\n"
+msgstr ""
+"pilote de bus compatible Hitachi SH7727 via BSR (JTAG no de pièce %d)\n"
+
+#: src/bus/sh7727.c:347
+msgid "Hitachi SH7727 compatible bus driver via BSR"
+msgstr "pilote de bus compatible Hitachi SH7727 via BSR"
+
+#: src/bus/sh7750r.c:133
+#, c-format
+msgid "Hitachi SH7750R compatible bus driver via BSR (JTAG part No. %d)\n"
+msgstr ""
+"pilote de bus compatible Hitachi SH7750R via BSR (JTAG no de pièce %d)\n"
+
+#: src/bus/sh7750r.c:328
+msgid "Hitachi SH7750R compatible bus driver via BSR"
+msgstr "pilote de bus compatible Hitachi SH7750R via BSR"
+
+#: src/bus/sh7751r.c:127
+#, c-format
+msgid "Hitachi SH7751R compatible bus driver via BSR (JTAG part No. %d)\n"
+msgstr ""
+"pilote de bus compatible Hitachi SH7751R via BSR (JTAG no de pièce %d)\n"
+
+#: src/bus/sh7751r.c:316
+msgid "Hitachi SH7751R compatible bus driver via BSR"
+msgstr "pilote de bus compatible Hitachi SH7751R via BSR"
+
+#: src/bus/sharc21065l.c:121
+#, fuzzy, c-format
+msgid ""
+"Analog Device's SHARC 21065L compatible bus driver via BSR (JTAG part No. %"
+"d)\n"
+msgstr "pilote de bus compatible Intel SA-1110 via BSR (JTAG no de pièce %d)\n"
+
+#: src/bus/sharc21065l.c:135
+msgid "Boot Memory Select"
+msgstr ""
+
+#: src/bus/sharc21065l.c:316
+#, fuzzy
+msgid "SHARC_21065L compatible bus driver via BSR"
+msgstr "pilote de bus compatible Intel SA-1110 via BSR"
+
+#: src/bus/slsup3.c:169
+#, fuzzy, c-format
+msgid "SLS UP3 bus driver via BSR (JTAG part No. %d)\n"
+msgstr "pilote de bus compatible Intel SA-1110 via BSR (JTAG no de pièce %d)\n"
+
+#: src/bus/slsup3.c:181
+msgid "Flash Memory (2 MByte) byte mode"
+msgstr ""
+
+#: src/bus/slsup3.c:191
+msgid "SRAM 128KByte (64K x 16)"
+msgstr ""
+
+#: src/bus/slsup3.c:201
+msgid "LCD Display (RS select by A0)"
+msgstr ""
+
+#: src/bus/slsup3.c:440
+#, fuzzy
+msgid "SLS UP3 compatible bus driver via BSR"
+msgstr "pilote de bus compatible Intel IXP425 via BSR"
+
+#: src/bus/tx4925.c:137
+#, fuzzy, c-format
+msgid "Toshiba TX4925 compatible bus driver via BSR (JTAG part No. %d)\n"
+msgstr "pilote de bus compatible Intel IXP425 via BSR (JTAG No de pièce %d)\n"
+
+#: src/bus/tx4925.c:311
+#, fuzzy
+msgid "Toshiba TX4925 compatible bus driver via BSR"
+msgstr "pilote de bus compatible Intel IXP425 via BSR"
+
+#: src/bus/writemem.c:88
+#, fuzzy
+msgid "writing:\n"
+msgstr "lecture en cours:\n"
+
+#: src/bus/writemem.c:103
+#, c-format
+msgid "Short read: bc=0x%zX\n"
+msgstr ""
+
+#: src/bus/writemem.c:110
+#, fuzzy, c-format
+msgid "Unexpected end of file; Addr: 0x%08llX\n"
+msgstr "ERREUR: fin prématurée du fichier\n"
+
+#: src/bus/zefant-xs3.c:419
+#, fuzzy, c-format
+msgid ""
+"Simple Solutions Zefant-XS3 Board compatible bus driver via BSR (JTAG part "
+"No. %d)\n"
+msgstr ""
+"pilote de bus compatible Hitachi SH7727 via BSR (JTAG no de pièce %d)\n"
+
+#: src/bus/zefant-xs3.c:756 src/bus/zefant-xs3.c:806 src/bus/zefant-xs3.c:864
+#: src/bus/zefant-xs3.c:981
+#, fuzzy
+msgid "Component type not supported"
+msgstr "Flash non supporté!\n"
+
+#: src/bus/zefant-xs3.c:988
+#, fuzzy
+msgid "Simple Solutions Zefant-XS3 Board compatible bus driver via BSR"
+msgstr "pilote de bus compatible Samsung S3C4510B via BSR"
+
+#: src/cmd/cmd_bit.c:88
+#, fuzzy, c-format
+msgid "%s: unable to get boundary bit number for command '%s'"
+msgstr "numéro de bit de limite invalide\n"
+
+#: src/cmd/cmd_bit.c:97
+#, fuzzy, c-format
+msgid "%s: invalid bit type length for command '%s'"
+msgstr "flash: séquence de commande invalide\n"
+
+#: src/cmd/cmd_bit.c:125
+#, fuzzy, c-format
+msgid "%s: invalid bit type for command '%s'"
+msgstr "flash: séquence de commande invalide\n"
+
+#: src/cmd/cmd_bit.c:134
+#, fuzzy, c-format
+msgid "%s: invalid default value length for command '%s'"
+msgstr "flash: séquence de commande invalide\n"
+
+#: src/cmd/cmd_bit.c:149
+#, fuzzy, c-format
+msgid "%s: invalid default value '%s' for command '%s'"
+msgstr "flash: séquence de commande invalide\n"
+
+#: src/cmd/cmd_bit.c:167
+#, fuzzy, c-format
+msgid "%s: unable to get control bit number for command '%s'"
+msgstr "numéro de bit de contrôle invalide\n"
+
+#: src/cmd/cmd_bit.c:175
+#, fuzzy, c-format
+msgid "%s: invalid control value length for command '%s'"
+msgstr "numéro de bit de contrôle invalide\n"
+
+#: src/cmd/cmd_bit.c:200
+#, c-format
+msgid ""
+"Usage: %s NUMBER TYPE DEFAULT SIGNAL [CBIT CVAL CSTATE]\n"
+"Define new BSR (Boundary Scan Register) bit for SIGNAL, with\n"
+"DEFAULT value.\n"
+"\n"
+"NUMBER Bit number in the BSR\n"
+"TYPE Bit type, valid values are I, O, B, C, and X\n"
+"DEFAULT Default (safe) bit value, valid values are 1, 0, ?\n"
+"SIGNAL Associated signal name\n"
+"CBIT Control bit number\n"
+"CVAL Control value\n"
+"CSTATE Control state, valid state is only Z\n"
+msgstr ""
+"Usage: %s NUMÉRO TYPE DÉFAUT SIGNAL [BITC VALC ÉTATC]\n"
+"Définir le nouveau bit du registre BSR (Boundary Scan Register) pour le "
+"SIGNAL, avec\n"
+"la valeur par DÉFAUT.\n"
+"\n"
+"NUMÉRO numéro du bit du BSR\n"
+"TYPE type de bit, valeurs permises: I, O, B, C et X\n"
+"DÉFAUT valeur du bit par défaut (sûre), valeurs permises: 1, 0, ?\n"
+"SIGNAL nom du signal associé\n"
+"BITC numéro de bit de contrôle\n"
+"VALC valeur de contrôle\n"
+"ÉTATC état de contrôle, état permis est seulement Z\n"
+
+#: src/cmd/cmd_bit.c:216
+msgid "define new BSR bit"
+msgstr "définir un nouveau bit BSR"
+
+#: src/cmd/cmd_bsdl.c:124
+#, c-format
+msgid ""
+"Usage: %s path PATHLIST\n"
+"Usage: %s test [FILE]\n"
+"Usage: %s dump [FILE]\n"
+"Usage: %s debug on|off\n"
+"Manage BSDL files\n"
+"\n"
+"PATHLIST semicolon separated list of directory paths to search for BSDL "
+"files\n"
+"FILE file containing part description in BSDL format\n"
+msgstr ""
+
+#: src/cmd/cmd_bsdl.c:137
+msgid "manage BSDL files"
+msgstr ""
+
+#: src/cmd/cmd_bus.c:71
+#, c-format
+msgid ""
+"Usage: %s BUS\n"
+"Change active bus.\n"
+"\n"
+"BUS bus number\n"
+msgstr ""
+"Usage: %s BUS\n"
+"Changer le bus actif.\n"
+"\n"
+"BUS numéro de bus\n"
+
+#: src/cmd/cmd_bus.c:79
+msgid "change active bus"
+msgstr "changer le bus actif"
+
+#: src/cmd/cmd_cable.c:98
+#, fuzzy, c-format
+msgid "Unknown cable type: '%s'"
+msgstr "Cable inconnue: %s\n"
+
+#: src/cmd/cmd_cable.c:167
+#, c-format
+msgid ""
+"Usage: %s DRIVER [DRIVER_OPTS]\n"
+"Select JTAG cable type.\n"
+"\n"
+"DRIVER name of cable\n"
+"DRIVER_OPTS options for the selected cable\n"
+"\n"
+"Type \"cable DRIVER help\" for info about options for cable DRIVER.\n"
+"\n"
+"List of supported cables:\n"
+msgstr ""
+
+#: src/cmd/cmd_cable.c:179 src/cmd/cmd_help.c:53
+#, c-format
+msgid "%-13s %s\n"
+msgstr "%-13s %s\n"
+
+#: src/cmd/cmd_cable.c:185
+msgid "select JTAG cable"
+msgstr "sélectionner le cable JTAG"
+
+#: src/cmd/cmd_cmd.c:164
+#, fuzzy, c-format
+msgid "%s: Ambiguous command\n"
+msgstr "%s: commande inconnue\n"
+
+#: src/cmd/cmd_cmd.c:167 src/cmd/cmd_help.c:70
+#, c-format
+msgid "%s: unknown command\n"
+msgstr "%s: commande inconnue\n"
+
+#: src/cmd/cmd_debug.c:86
+#, c-format
+msgid "Current log level is '%s'\n"
+msgstr ""
+
+#: src/cmd/cmd_debug.c:117
+#, c-format
+msgid ""
+"Usage: %s LEVEL\n"
+"Set logging/debugging level.\n"
+"\n"
+"LEVEL:\n"
+"all every single bit as it is transmitted\n"
+"comm low level communication details\n"
+"debug more details of interest for developers\n"
+"detail verbose output\n"
+"normal just noteworthy info\n"
+"warning unmissable warnings\n"
+"error only fatal errors\n"
+"silent suppress logging output\n"
+msgstr ""
+
+#: src/cmd/cmd_debug.c:133
+msgid "set logging/debugging level"
+msgstr ""
+
+#: src/cmd/cmd_detect.c:62
+#, c-format
+msgid ""
+"Usage: %s\n"
+"Detect parts on the JTAG chain.\n"
+"\n"
+"Output from this command is a list of the detected parts.\n"
+"If no parts are detected other commands may not work properly.\n"
+msgstr ""
+"Usage: %s\n"
+"Détecter les pièces sur la chaîne JTAG.\n"
+"\n"
+"La sortie de cette commande est une liste de pièces détectées.\n"
+"Si aucune pièce n'est détectée, les autres commandes peuvent ne pas "
+"fonctionner correctement.\n"
+
+#: src/cmd/cmd_detect.c:72
+msgid "detect parts on the JTAG chain"
+msgstr "pièces détectés sur la caîne JTAG"
+
+#: src/cmd/cmd_detectflash.c:52 src/cmd/cmd_peekpoke.c:57
+#: src/cmd/cmd_peekpoke.c:139 src/cmd/cmd_readmem.c:57
+#: src/cmd/cmd_writemem.c:55
+msgid "Bus missing"
+msgstr ""
+
+#: src/cmd/cmd_detectflash.c:66
+#, fuzzy, c-format
+msgid ""
+"Usage: %s ADDRESS\n"
+"Detect flash memory type connected to a part.\n"
+"\n"
+"ADDRESS Base address for memory region\n"
+msgstr ""
+"Usage: %s\n"
+"Détecter un type de mémoire flash connecté.\n"
+
+#: src/cmd/cmd_detectflash.c:75
+msgid "detect parameters of flash chips attached to a part"
+msgstr "paramètres de détection de modules flahs connectés"
+
+#: src/cmd/cmd_discovery.c:57
+#, c-format
+msgid ""
+"Usage: %s\n"
+"Discovery of unknown parts in the JTAG chain.\n"
+"\n"
+"'%s' attempts to detect these parameters of an unknown JTAG\n"
+"chain:\n"
+" 1. IR (instruction register) length\n"
+" 2. DR (data register) length for all possible instructions\n"
+"\n"
+"Warning: This may be dangerous for some parts (especially if the\n"
+"part doesn't have TRST signal).\n"
+msgstr ""
+"Usage: %s\n"
+"Découvrir les pièces inconnues sur la chaîne JTAG.\n"
+"\n"
+"'%s' tentatives pour détecter ces paramètres sur une chaîne JTAG inconnue:\n"
+" 1. IR (registre d'instruction register) longueur\n"
+" 2. DR (registre de données) longueurs de toutes les instructions possibles\n"
+"\n"
+"AVERTISSMENT: ceci peut être dangereus pour certaintes pièces (spécialement "
+"si celles-ci\n"
+"n'ont pas de signal TRST).\n"
+
+#: src/cmd/cmd_discovery.c:72
+msgid "discovery of unknown parts in the JTAG chain"
+msgstr "découverte des pièces inconnues dans la chaîne JTAG"
+
+#: src/cmd/cmd_dr.c:69
+#, fuzzy, c-format
+msgid "%s: part without active instruction"
+msgstr "%s: pièces sans instruction active\n"
+
+#: src/cmd/cmd_dr.c:76
+#, fuzzy, c-format
+msgid "%s: instruction without active data register"
+msgstr "%s: pièces sans registre actif de données\n"
+
+#: src/cmd/cmd_dr.c:101
+#, c-format
+msgid "%s: register length %d mismatch: %zd"
+msgstr ""
+
+#: src/cmd/cmd_dr.c:118
+#, c-format
+msgid "%s\n"
+msgstr "%s\n"
+
+#: src/cmd/cmd_dr.c:127
+#, fuzzy, c-format
+msgid ""
+"Usage: %s [DIR]\n"
+"Usage: %s BITSTRING\n"
+"Display input or output data register content or set current register.\n"
+"\n"
+"DIR requested data register; possible values: 'in' for\n"
+" input and 'out' for output; default is 'out'\n"
+"BITSTRING set current data register with BITSTRING (e.g. 01010)\n"
+msgstr ""
+"Usage: %s [DIR]\n"
+"Afficher le contenu des registres d'entrée et de sortie de données.\n"
+"\n"
+"DIR registre de données interrogé; valeurs possibles: 'in' pour\n"
+" l'entrée et 'out' pour la sortie; par défaut 'out'\n"
+
+#: src/cmd/cmd_dr.c:139
+msgid "display active data register for a part"
+msgstr "afficher le registre actif de données pour une pièce"
+
+#: src/cmd/cmd_endian.c:52
+msgid "Endianess for external files: big\n"
+msgstr ""
+"système de poids fort/faible des fichiers externes: gros (big endian)\n"
+
+#: src/cmd/cmd_endian.c:55
+msgid "Endianess for external files: little\n"
+msgstr ""
+"système de poids fort/faible des fichiers externes: petit (little endian)\n"
+
+#: src/cmd/cmd_endian.c:79
+#, c-format
+msgid ""
+"Usage: %s\n"
+"Set or print endianess for external files.\n"
+msgstr ""
+"Usage: %s\n"
+"Initialiser ou afficher le système de poids fort/faible (big/little endian) "
+"des fichiers externes.\n"
+
+#: src/cmd/cmd_endian.c:86
+msgid "set/print endianess"
+msgstr ""
+"Initialiser ou afficher le système de poids fort/faible (big/little endian)."
+
+#: src/cmd/cmd_eraseflash.c:57 src/cmd/cmd_flashmem.c:60
+#: src/cmd/cmd_peekpoke.c:62 src/cmd/cmd_peekpoke.c:144
+#, fuzzy
+msgid "Bus driver missing"
+msgstr "Erreur: pilote du bus manquant.\n"
+
+#: src/cmd/cmd_eraseflash.c:74
+#, c-format
+msgid ""
+"Usage: %s ADDR BLOCKS\n"
+"Erase flash memory from ADDR.\n"
+"\n"
+"ADDR target addres for erasing block\n"
+"BLOCKS number of blocks to erase\n"
+"\n"
+"ADDR and BLOCKS could be in decimal or hexadecimal (prefixed with 0x) form.\n"
+"\n"
+"Supported Flash Memories:\n"
+msgstr ""
+"Usage: %s ADR BLOCS\n"
+"Effacer la mémoire flash à partir de l'ADResse.\n"
+"\n"
+"ADR ADRessse cible pour effacer un bloc\n"
+"BLOCS numbre de blocs à effacer\n"
+"\n"
+"ADR et BLOCS peuvent être en valeur décimal ou hexadécimal (préfixé avec "
+"0x).\n"
+"\n"
+"Mémoires flash supportées:\n"
+
+#: src/cmd/cmd_eraseflash.c:86 src/cmd/cmd_flashmem.c:112
+#, c-format
+msgid ""
+"%s\n"
+" %s\n"
+msgstr ""
+"%s\n"
+" %s\n"
+
+#: src/cmd/cmd_eraseflash.c:92
+msgid "erase flash memory by number of blocks"
+msgstr "effacer la mémoire flash par numéro de bloc"
+
+#: src/cmd/cmd_flashmem.c:76 src/cmd/cmd_writemem.c:66
+#, fuzzy, c-format
+msgid "Unable to open file `%s'"
+msgstr "Incapable d'ouvrir le fichier `%s'!\n"
+
+#: src/cmd/cmd_flashmem.c:96
+#, fuzzy, c-format
+msgid ""
+"Usage: %s ADDR FILENAME [noverify]\n"
+"Usage: %s FILENAME [noverify]\n"
+"Program FILENAME content to flash memory.\n"
+"\n"
+"ADDR target address for raw binary image\n"
+"FILENAME name of the input file\n"
+"%-10s FILENAME is in MS .bin format (for WinCE)\n"
+"%-10s if specified, verification is skipped\n"
+"\n"
+"ADDR could be in decimal or hexadecimal (prefixed with 0x) form.\n"
+"\n"
+"Supported Flash Memories:\n"
+msgstr ""
+"Usage: %s ADR FICHIER\n"
+"Usage: %s FICHIER\n"
+"Programmer le contenu de la mémoire flash avec le FICHIER.\n"
+"\n"
+"ADR ADResse cible d'une image binaire brute\n"
+"FICHIER nom du FICHIER d'entrée\n"
+"%-10s FICHIER est un format MS .bin (pour WinCE)\n"
+"\n"
+"ADR et BLOCS peuvent être en valeur décimal ou hexadécimal (préfixé avec "
+"0x).\n"
+"\n"
+"Mémoires flahs supportées:\n"
+
+#: src/cmd/cmd_flashmem.c:118
+msgid "burn flash memory with data from a file"
+msgstr "brûler la mémoire flahs avec les données à partir d'un fichier"
+
+#: src/cmd/cmd_frequency.c:55
+#, fuzzy, c-format
+msgid "Current TCK frequency is %lu Hz\n"
+msgstr "Fréquence courant TCK est %u Hz\n"
+
+#: src/cmd/cmd_frequency.c:63
+#, fuzzy, c-format
+msgid "Setting TCK frequency to %lu Hz\n"
+msgstr "Initialisation de la fréquence TCK à %u Hz\n"
+
+#: src/cmd/cmd_frequency.c:74
+#, c-format
+msgid ""
+"Usage: %s [FREQ]\n"
+"Change TCK frequency to FREQ or print current TCK frequency.\n"
+"\n"
+"FREQ is in hertz. It's a maximum TCK frequency for JTAG interface.\n"
+"In some cases the TCK frequency is less than FREQ, but the frequency\n"
+"is never more than FREQ. Maximum supported frequency depends on JTAG\n"
+"adapter.\n"
+"\n"
+"FREQ must be an unsigned integer. Minimum allowed frequency is 1 Hz.\n"
+"Use 0 for FREQ to disable frequency limit.\n"
+msgstr ""
+"Usage: %s [FRÉQUENCE]\n"
+"Modifier ou afficher la fréquence courante TCK.\n"
+"\n"
+"FRÉQUENCE est en hertz. C'est la férquence maximale TCK pour une interface "
+"JTAG.\n"
+"Dans certains cas, la fréquence TCK est inférieure à la FRÉQUENCE mais "
+"jamais\n"
+"plus que la FRÉQUENCE. La fréquence maximum supportée dépend de l'adapteur "
+"JTAG.\n"
+"\n"
+"FRÉQUENCE doit être un entier non signé. La fréquence minimale permise est 1 "
+"Hz.\n"
+"Utilise 0 comme valeur pour désactiver la limite de fréquence.\n"
+
+#: src/cmd/cmd_frequency.c:89
+msgid "setup JTAG frequency"
+msgstr "initialisation de la fréquence JTAG"
+
+#: src/cmd/cmd_get.c:79
+#, c-format
+msgid "%s = %d\n"
+msgstr "%s = %d\n"
+
+#: src/cmd/cmd_get.c:88
+#, fuzzy, c-format
+msgid ""
+"Usage: %s signal SIGNAL\n"
+"Get signal state from output BSR (Boundary Scan Register).\n"
+"\n"
+"SIGNAL signal name (from JTAG declaration file)\n"
+msgstr ""
+"Usage: %s SIGNAL\n"
+"Obtenir l'état du signal de la sortie BSR (Boundary Scan Register).\n"
+"\n"
+"SIGNAL nom du signal (à partir du fichier de déclaration JTAG)\n"
+
+#: src/cmd/cmd_get.c:97
+msgid "get external signal value"
+msgstr "obtenir la valeur externe du signal"
+
+#: src/cmd/cmd_help.c:51
+msgid ""
+"Command list:\n"
+"\n"
+msgstr ""
+"Liste de commandes:\n"
+"\n"
+
+#: src/cmd/cmd_help.c:55
+msgid "(no description available)"
+msgstr "(pas de description disponible)"
+
+#: src/cmd/cmd_help.c:57
+msgid ""
+"\n"
+"Type \"help COMMAND\" for details about a particular command.\n"
+msgstr ""
+"\n"
+"Taper \"help COMMANDE\" pour des détails au sujet d'une commande "
+"particulière.\n"
+
+#: src/cmd/cmd_help.c:79
+#, c-format
+msgid ""
+"Usage: %s [COMMAND]\n"
+"Print short help for COMMAND, or list of available commands.\n"
+msgstr ""
+"Usage: %s [COMMANDE]\n"
+"Afficher une aide sommaire de la COMMANDE ou lister les commandes "
+"disponibles.\n"
+
+#: src/cmd/cmd_help.c:86
+msgid "display this help"
+msgstr "afficher l'aide-mémoire"
+
+#: src/cmd/cmd_idcode.c:55
+#, c-format
+msgid "Reading %lu bytes of idcode\n"
+msgstr ""
+
+#: src/cmd/cmd_idcode.c:63
+#, c-format
+msgid ""
+"Usage: %s [BYTES]\n"
+"Read [BYTES] IDCODEs of all parts in a JTAG chain.\n"
+"\n"
+"BYTES must be an unsigned integer, and the default is 0.\n"
+"If BYTES is 0, IDCODEs will be read until 32 consecutive zeros are found.\n"
+msgstr ""
+
+#: src/cmd/cmd_idcode.c:73
+#, fuzzy
+msgid "Read IDCODEs of all parts in a JTAG chain"
+msgstr "découverte des pièces inconnues dans la chaîne JTAG"
+
+#: src/cmd/cmd_include.c:58
+msgid "Please use the 'include' command instead of 'script'\n"
+msgstr ""
+
+#: src/cmd/cmd_include.c:82
+#, fuzzy, c-format
+msgid ""
+"Usage: %s FILENAME [n] \n"
+"Run command sequence n times from external FILENAME.\n"
+"\n"
+"FILENAME Name of the file with commands\n"
+msgstr ""
+"Usage: %s FICHIER\n"
+"Exécuter une séquence de commandes à partir d'un FICHIER externe.\n"
+"\n"
+"FICHIER nom du fichier contenant les commande\n"
+
+#: src/cmd/cmd_include.c:102
+msgid "include command sequence from external repository"
+msgstr "inclure une séquence de commandes à partir du dépôt externe"
+
+#: src/cmd/cmd_include.c:121
+msgid "run command sequence from external file"
+msgstr "exécuter une séquence de commandes à partir d'un FICHIER externe"
+
+#: src/cmd/cmd_initbus.c:66
+#, fuzzy, c-format
+msgid "Unknown bus: %s"
+msgstr "bus inconnu: %s\n"
+
+#: src/cmd/cmd_initbus.c:96
+#, c-format
+msgid ""
+"Usage: %s BUSNAME\n"
+"Initialize new bus driver for active part.\n"
+"\n"
+"BUSNAME Name of the bus\n"
+"\n"
+"List of available buses:\n"
+msgstr ""
+"Usage: %s BUS\n"
+"Initialiser le pilote du bus pour la pièce active.\n"
+"\n"
+"BUS nom du bus\n"
+"\n"
+"Liste des bus disponibles:\n"
+
+#: src/cmd/cmd_initbus.c:105
+#, c-format
+msgid "%-10s %s\n"
+msgstr "%-10s %s\n"
+
+#: src/cmd/cmd_initbus.c:111
+msgid "initialize bus driver for active part"
+msgstr "initialiser le pilote du bus pour la pièce active."
+
+#: src/cmd/cmd_instruction.c:60
+#, fuzzy, c-format
+msgid "%s: unknown instruction '%s'"
+msgstr "%s: instruction inconnue '%s'\n"
+
+#: src/cmd/cmd_instruction.c:101
+#, c-format
+msgid ""
+"Usage: %s INSTRUCTION\n"
+"Usage: %s length LENGTH\n"
+"Usage: %s INSTRUCTION CODE REGISTER\n"
+"Change active INSTRUCTION for a part or declare new instruction.\n"
+"\n"
+"INSTRUCTION instruction name (e.g. BYPASS)\n"
+"LENGTH common instruction length\n"
+"CODE instruction code (e.g. 11111)\n"
+"REGISTER default data register for instruction (e.g. BR)\n"
+msgstr ""
+"Usage: %s INSTRUCTION\n"
+"Usage: %s longueur LONGUEUR\n"
+"Usage: %s INSTRUCTION CODE REGISTRE\n"
+"Changer l'INSTRUCTION active pour une pièce ou déclarer une nouvelle "
+"instruction.\n"
+"\n"
+"INSTRUCTION nom de l'instruction (i.e. BYPASS)\n"
+"LENGTH longueur commune d'instruction\n"
+"CODE code d'instruction (i.e. 11111)\n"
+"REGISTRE registre de données pour l'instruction (i.e. BR)\n"
+
+#: src/cmd/cmd_instruction.c:115
+msgid "change active instruction for a part or declare new instruction"
+msgstr ""
+"changer l'instruction active pour une pièce ou déclarer une nouvelle "
+"instruction."
+
+#: src/cmd/cmd_part.c:119
+#, fuzzy, c-format
+msgid "%s: invalid part number %lu, max %d"
+msgstr "%s: numéro de pièce invalide\n"
+
+#: src/cmd/cmd_part.c:136
+#, fuzzy, c-format
+msgid ""
+"Usage: %s PART\n"
+"Change active part for current JTAG chain.\n"
+"\n"
+"PART part number | alias\n"
+msgstr ""
+"Usage: %s PIÈCE\n"
+"Changer la pièce active pour la chaîne courant JTAG.\n"
+"\n"
+"PIÈCE numéro de pièce\n"
+
+#: src/cmd/cmd_part.c:144
+msgid "change active part for current JTAG chain"
+msgstr "changer la pièce active pour la chaîne courante JTAG"
+
+#: src/cmd/cmd_peekpoke.c:80
+#, fuzzy, c-format
+msgid "URJ_BUS_READ(0x%08lx) = 0x%02lX (%li)\n"
+msgstr "bus_read(0x%08x) = 0x%08X (%i)\n"
+
+#: src/cmd/cmd_peekpoke.c:86
+#, fuzzy, c-format
+msgid "URJ_BUS_READ(0x%08lx) = 0x%04lX (%li)\n"
+msgstr "bus_read(0x%08x) = 0x%08X (%i)\n"
+
+#: src/cmd/cmd_peekpoke.c:91
+#, fuzzy, c-format
+msgid "URJ_BUS_READ(0x%08lx) = 0x%08lX (%li)\n"
+msgstr "bus_read(0x%08x) = 0x%08X (%i)\n"
+
+#: src/cmd/cmd_peekpoke.c:104
+#, c-format
+msgid ""
+"Usage: %s ADDR\n"
+"Read a single word (bus width size).\n"
+"\n"
+"ADDR address to read from\n"
+"\n"
+"ADDR could be in decimal or hexadecimal (prefixed with 0x) form.\n"
+"\n"
+msgstr ""
+"Usage: %s ADR\n"
+"Lire un mot simple (taille de la largeur de bus).\n"
+"\n"
+"ADR adresse de lecture\n"
+"\n"
+"ADR peut être en décimal ou hexadécimal (préfixé par 0x).\n"
+"\n"
+
+#: src/cmd/cmd_peekpoke.c:116
+msgid "read a single word"
+msgstr "lire un mot simple"
+
+#: src/cmd/cmd_peekpoke.c:167
+#, fuzzy, c-format
+msgid ""
+"Usage: %s ADDR VAL [ADDR VAL] ... \n"
+"Write a single word (bus width size).\n"
+"\n"
+"ADDR address to write\n"
+"VAL value to write\n"
+"\n"
+"ADDR and VAL could be in decimal or hexadecimal (prefixed with 0x) form.\n"
+"\n"
+msgstr ""
+"Usage: %s ADR VAL\n"
+"Écrire un mot simple (taille de la largeur de bus).\n"
+"\n"
+"ADR adresse d'écriture\n"
+"VAL valeur à écrire\n"
+"\n"
+"ADR et VAL peuvent être en décimal ou en hexadécimal (préfixé par 0x).\n"
+"\n"
+
+#: src/cmd/cmd_peekpoke.c:180
+msgid "write a single word"
+msgstr "écrire un mot simple"
+
+#: src/cmd/cmd_pod.c:105
+#, c-format
+msgid ""
+"Usage: %s SIGNAL=# [SIGNAL=# ...]\n"
+"Set state of POD signal(s) to 0 or 1.\n"
+"\n"
+"SIGNAL TCK,TMS, TDI, TRST, or RESET\n"
+"# 0 or 1\n"
+msgstr ""
+
+#: src/cmd/cmd_pod.c:115
+msgid "Set state of POD signal(s)"
+msgstr ""
+
+#: src/cmd/cmd_print.c:124
+#, fuzzy, c-format
+msgid " Active %%-%ds %%-%ds\n"
+msgstr " No. %%-%ds %%-%ds %%-%ds %%-%ds %%-%ds\n"
+
+#: src/cmd/cmd_print.c:130 src/cmd/cmd_print.c:134 src/cmd/cmd_print.c:139
+#: src/cmd/cmd_print.c:173 src/cmd/cmd_print.c:178 src/cmd/cmd_print.c:184
+#, c-format
+msgid "(%d) String conversion failed!\n"
+msgstr "(%d) la conversion de chaîne a échoué!\n"
+
+#: src/cmd/cmd_print.c:131 src/cmd/cmd_print.c:136 src/cmd/cmd_print.c:175
+#: src/cmd/cmd_print.c:181
+msgid "Instruction"
+msgstr "Instruction"
+
+#: src/cmd/cmd_print.c:131 src/cmd/cmd_print.c:136 src/cmd/cmd_print.c:175
+#: src/cmd/cmd_print.c:181
+msgid "Register"
+msgstr "Registre"
+
+#: src/cmd/cmd_print.c:147
+#, fuzzy, c-format
+msgid " %%c %%-%ds %%-%ds\n"
+msgstr " No. %%-%ds %%-%ds %%-%ds %%-%ds %%-%ds\n"
+
+#: src/cmd/cmd_print.c:165
+#, fuzzy, c-format
+msgid " No. %%-%ds %%-%ds %%-%ds %%-%ds %%-%ds\n"
+msgstr " No. %%-%ds %%-%ds %%-%ds %%-%ds %%-%ds\n"
+
+#: src/cmd/cmd_print.c:174 src/cmd/cmd_print.c:180
+msgid "Manufacturer"
+msgstr "Manufacturier"
+
+#: src/cmd/cmd_print.c:174 src/cmd/cmd_print.c:180
+msgid "Part"
+msgstr "Pièce"
+
+#: src/cmd/cmd_print.c:175 src/cmd/cmd_print.c:181
+msgid "Stepping"
+msgstr "Pas"
+
+#: src/cmd/cmd_print.c:200
+#, fuzzy, c-format
+msgid " %3d %s "
+msgstr " %3d "
+
+#: src/cmd/cmd_print.c:204 src/part/part.c:472
+#, c-format
+msgid " %3d "
+msgstr " %3d "
+
+#: src/cmd/cmd_print.c:218
+#, c-format
+msgid ""
+"\n"
+"Active bus:\n"
+"*%d: "
+msgstr ""
+"\n"
+"Bus actif:\n"
+"*%d: "
+
+#: src/cmd/cmd_print.c:228
+#, c-format
+msgid "Error in bus area discovery at 0x%08llX\n"
+msgstr "ERREUR dans la zone de découverte du bus à 0x%08llX\n"
+
+#: src/cmd/cmd_print.c:236
+#, fuzzy, c-format
+msgid "\tstart: 0x%08lX, length: 0x%08llX, data width: %d bit, (%s)\n"
+msgstr ""
+"\tdébut: 0x%08X, longueur: 0x%08llX, largeur des données: %d bits, (%s)\n"
+
+#: src/cmd/cmd_print.c:242
+#, fuzzy, c-format
+msgid "\tstart: 0x%08lX, length: 0x%08llX, data width: %d bit\n"
+msgstr "\tdébut: 0x%08X, longueur: 0x%08llX, largeur des données: %d bits\n"
+
+#: src/cmd/cmd_print.c:262
+#, c-format
+msgid "*%d: "
+msgstr "*%d: "
+
+#: src/cmd/cmd_print.c:264
+#, c-format
+msgid "%d: "
+msgstr "%d: "
+
+#: src/cmd/cmd_print.c:275
+#, fuzzy, c-format
+msgid ""
+"Usage: %s [chain|bus|signals|instructions]\n"
+"Display JTAG chain status.\n"
+"\n"
+"Display list of the parts connected to the JTAG chain including\n"
+"part number and current (active) instruction and data register.\n"
+msgstr ""
+"Usage: %s [chaîne|bus]\n"
+"Afficher l'état de la chaîne JTAG.\n"
+"\n"
+"Afficher la liste des pièces connectés à la chaîne JTAG incluant\n"
+"le numéro de pièce, l'instruiction courante (active) et le registre de "
+"données.\n"
+
+#: src/cmd/cmd_print.c:285
+msgid "display JTAG chain list/status"
+msgstr "afficher la liste/état de la chaîne JTAG"
+
+#: src/cmd/cmd_quit.c:52
+#, c-format
+msgid ""
+"Usage: %s\n"
+"Exit from %s.\n"
+msgstr ""
+"Usage: %s\n"
+"Quitter à partir de %s.\n"
+
+#: src/cmd/cmd_quit.c:57
+msgid "exit and terminate this session"
+msgstr "quitter et terminer la session"
+
+#: src/cmd/cmd_readmem.c:68
+#, fuzzy, c-format
+msgid "Unable to create file `%s'"
+msgstr "Incapable de créer le fichier `%s'!\n"
+
+#: src/cmd/cmd_readmem.c:81
+#, c-format
+msgid ""
+"Usage: %s ADDR LEN FILENAME\n"
+"Copy device memory content starting with ADDR to FILENAME file.\n"
+"\n"
+"ADDR start address of the copied memory area\n"
+"LEN copied memory length\n"
+"FILENAME name of the output file\n"
+"\n"
+"ADDR and LEN could be in decimal or hexadecimal (prefixed with 0x) form.\n"
+msgstr ""
+"Usage: %s ADR LONG FICHIER\n"
+"Copier le contenu de la mémoire du périphérique débutant à l'ADR dans le "
+"FICHIER.\n"
+"\n"
+"ADR adresse de départ de la zone mémoire à copier\n"
+"LONG longeur de la zone mémoire à copier\n"
+"FICHIER nom du fichier de sortie\n"
+"\n"
+"ADR et LONG peuvent être en décimal ou hexadécimal (préfixe par 0x).\n"
+
+#: src/cmd/cmd_readmem.c:94
+msgid "read content of the memory and write it to file"
+msgstr "lire le contenu de la mémoire et l'écrire dans le fichier"
+
+#: src/cmd/cmd_register.c:72
+#, c-format
+msgid ""
+"Usage: %s NAME LENGTH\n"
+"Define new data register with specified NAME and LENGTH.\n"
+"\n"
+"NAME Data register name\n"
+"LENGTH Data register length\n"
+msgstr ""
+"Usage: %s NOM LONGUEUR\n"
+"Définir un nouveau registre de données avec un NOM et une LONGUER "
+"spécifique.\n"
+"\n"
+"NOM nom du registre de données\n"
+"LONGUEUR longueur du registre de données\n"
+
+#: src/cmd/cmd_register.c:82
+msgid "define new data register for a part"
+msgstr "définir un nouveau registre de données pour la pièce"
+
+#: src/cmd/cmd_reset.c:58
+#, fuzzy, c-format
+msgid ""
+"Usage: %s\n"
+"Reset current JTAG chain.\n"
+msgstr "changer la pièce active pour la chaîne courante JTAG"
+
+#: src/cmd/cmd_reset.c:63
+#, fuzzy
+msgid "reset JTAG chain"
+msgstr "sélectionner le cable JTAG"
+
+#: src/cmd/cmd_salias.c:70
+#, fuzzy, c-format
+msgid "Signal '%s' not found"
+msgstr "signal '%s' non repéré\n"
+
+#: src/cmd/cmd_salias.c:89
+#, fuzzy, c-format
+msgid ""
+"Usage: %s ALIAS SIGNAL\n"
+"Define new signal ALIAS as alias for existing SIGNAL.\n"
+"\n"
+"ALIAS New signal alias name\n"
+"SIGNAL Existing signal name\n"
+msgstr ""
+"Usage: %s SIGNAL [BROCHES...]\n"
+"Définir un nouveau signal avec le nom SIGNAL pour la pièce.\n"
+"\n"
+"SIGNAL nouveau nom de signal\n"
+"BROCHES liste debroches pour le signal (non utilisé)\n"
+
+#: src/cmd/cmd_salias.c:99
+#, fuzzy
+msgid "define an alias for a signal"
+msgstr "définir un nouveau signal pour une pièce"
+
+#: src/cmd/cmd_scan.c:71 src/part/part.c:220 src/part/part.c:273
+#, fuzzy
+msgid "Boundary Scan Register (BSR) not found"
+msgstr "%s(%s:%d) Boundary Scan Register (BSR) non repéré\n"
+
+#: src/cmd/cmd_scan.c:85
+msgid "Part can't SAMPLE"
+msgstr ""
+
+#: src/cmd/cmd_scan.c:115
+#, fuzzy, c-format
+msgid ": %d > %d\n"
+msgstr "%s = %d\n"
+
+#: src/cmd/cmd_scan.c:129
+#, c-format
+msgid ""
+"Usage: %s [SIGNAL]* \n"
+"Read BSR and show changes since last scan.\n"
+msgstr ""
+
+#: src/cmd/cmd_scan.c:136
+msgid "read BSR and show changes since last scan"
+msgstr ""
+
+#: src/cmd/cmd_set.c:110
+#, c-format
+msgid ""
+"Usage: %s SIGNAL DIR [DATA]\n"
+"Set signal state in input BSR (Boundary Scan Register).\n"
+"\n"
+"SIGNAL signal name (from JTAG declaration file)\n"
+"DIR requested signal direction; possible values: 'in' or 'out'\n"
+"DATA desired output signal value ('0' or '1'); used only if DIR\n"
+" is 'out'\n"
+msgstr ""
+"Usage: %s SIGNAL DIR [DONNÉE]\n"
+"Initialiser l'état du signal à l'entrée du BSR (Boundary Scan Register).\n"
+"\n"
+"SIGNAL nom du signal (à partir du fichier de déclaration JTAG)\n"
+"DIR direction requise du signal; valeurs possibles: 'in' ou 'out'\n"
+"DATA valeur de sortie du signal ('0' ou '1'); utilisé seulement si "
+"DIR\n"
+" est à 'out'\n"
+
+#: src/cmd/cmd_set.c:122
+msgid "set external signal value"
+msgstr "initialiser la valeur d'un signal externe"
+
+#: src/cmd/cmd_shell.c:91
+#, c-format
+msgid ""
+"Usage: %s cmmd\n"
+"Shell out to os for a command.\n"
+"\n"
+"CMMD OS Shell Command\n"
+msgstr ""
+
+#: src/cmd/cmd_shell.c:99
+msgid "shell cmmd"
+msgstr ""
+
+#: src/cmd/cmd_shift.c:74
+#, c-format
+msgid ""
+"Usage: %s\n"
+"Usage: %s\n"
+"Shift instruction or data register through JTAG chain.\n"
+msgstr ""
+"Usage: %s\n"
+"Usage: %s\n"
+"Décaler le registre d'instruction ou de données à travers la chaîne JTAG.\n"
+
+#: src/cmd/cmd_shift.c:82
+msgid "shift data/instruction registers through JTAG chain"
+msgstr "décaler le registre instruction/données à travers la chaîne JTAG"
+
+#: src/cmd/cmd_signal.c:66 src/part/signal.c:114
+#, fuzzy, c-format
+msgid "Signal '%s' already defined"
+msgstr "Signal '%s' déjà défini\n"
+
+#: src/cmd/cmd_signal.c:96
+#, fuzzy, c-format
+msgid ""
+"Usage: %s SIGNAL [PIN#]\n"
+"Define new signal with name SIGNAL for a part.\n"
+"\n"
+"SIGNAL New signal name\n"
+"PIN# List of pin # for a signal\n"
+msgstr ""
+"Usage: %s SIGNAL [BROCHES...]\n"
+"Définir un nouveau signal avec le nom SIGNAL pour la pièce.\n"
+"\n"
+"SIGNAL nouveau nom de signal\n"
+"BROCHES liste debroches pour le signal (non utilisé)\n"
+
+#: src/cmd/cmd_signal.c:106
+msgid "define new signal for a part"
+msgstr "définir un nouveau signal pour une pièce"
+
+#: src/cmd/cmd_svf.c:103
+#, c-format
+msgid ""
+"Usage: %s FILE [stop] [progress] [ref_freq=<frequency>]\n"
+"Execute svf commands from FILE.\n"
+"stop : Command execution stops upon TDO mismatch.\n"
+"progress : Continually displays progress status.\n"
+"ref_freq : Use <frequency> as the reference for 'RUNTEST xxx SEC' commands\n"
+"\n"
+"FILE file containing SVF commands\n"
+msgstr ""
+
+#: src/cmd/cmd_svf.c:114
+msgid "execute svf commands from file"
+msgstr ""
+
+#: src/cmd/cmd_test.c:93
+#, fuzzy, c-format
+msgid "<FAIL>%s = %d"
+msgstr "%s = %d\n"
+
+#: src/cmd/cmd_test.c:104
+#, fuzzy, c-format
+msgid ""
+"Usage: %s SIGNAL 0/1\n"
+"Test signal state from output BSR (Boundary Scan Register).\n"
+"\n"
+"SIGNAL signal name (from JTAG declaration file)\n"
+msgstr ""
+"Usage: %s SIGNAL\n"
+"Obtenir l'état du signal de la sortie BSR (Boundary Scan Register).\n"
+"\n"
+"SIGNAL nom du signal (à partir du fichier de déclaration JTAG)\n"
+
+#: src/cmd/cmd_test.c:113
+#, fuzzy
+msgid "test external signal value"
+msgstr "obtenir la valeur externe du signal"
+
+#: src/cmd/cmd_usleep.c:63
+#, c-format
+msgid ""
+"Usage: %s USECS\n"
+"Sleep some number of microseconds.\n"
+msgstr ""
+
+#: src/cmd/cmd_usleep.c:70
+msgid "Sleep some number of microseconds"
+msgstr ""
+
+#: src/cmd/cmd_writemem.c:79
+#, fuzzy, c-format
+msgid ""
+"Usage: %s ADDR LEN FILENAME\n"
+"Write to device memory starting at ADDR the FILENAME file.\n"
+"\n"
+"ADDR start address of the written memory area\n"
+"LEN written memory length\n"
+"FILENAME name of the input file\n"
+"\n"
+"ADDR and LEN could be in decimal or hexadecimal (prefixed with 0x) form.\n"
+"NOTE: This is NOT useful for FLASH programming!\n"
+msgstr ""
+"Usage: %s ADR LONG FICHIER\n"
+"Copier le contenu de la mémoire du périphérique débutant à l'ADR dans le "
+"FICHIER.\n"
+"\n"
+"ADR adresse de départ de la zone mémoire à copier\n"
+"LONG longeur de la zone mémoire à copier\n"
+"FICHIER nom du fichier de sortie\n"
+"\n"
+"ADR et LONG peuvent être en décimal ou hexadécimal (préfixe par 0x).\n"
+
+#: src/cmd/cmd_writemem.c:93
+msgid "write content of file to the memory"
+msgstr ""
+
+#: src/flash/amd.c:311
+msgid ""
+"Chip: AMD Flash\n"
+"\tManufacturer: "
+msgstr ""
+"Module: AMD Flash\n"
+"\tManufacturier: "
+
+#: src/flash/amd.c:316 src/flash/amd.c:345 src/flash/amd.c:361
+#: src/flash/amd.c:380 src/flash/amd.c:396 src/flash/amd_flash.c:266
+msgid ""
+"\n"
+"\tChip: "
+msgstr ""
+"\n"
+"\tModule: "
+
+#: src/flash/amd.c:339 src/flash/amd.c:355 src/flash/amd.c:374
+#: src/flash/amd.c:390 src/flash/amd.c:403 src/flash/amd_flash.c:278
+#, c-format
+msgid "Unknown (ID 0x%04x)"
+msgstr "Inconnu (ID 0x%04x)"
+
+#: src/flash/amd.c:408
+#, fuzzy, c-format
+msgid "Unknown manufacturer (ID 0x%04x) Chip (ID 0x%04x)"
+msgstr "Manufacturier inconnu (ID 0x%04x)"
+
+#: src/flash/amd.c:412 src/flash/amd_flash.c:281
+#, c-format
+msgid ""
+"\n"
+"\tProtected: %04x\n"
+msgstr ""
+"\n"
+"\tProtégé: %04x\n"
+
+#: src/flash/amd.c:635 src/flash/amd.c:647 src/flash/amd.c:659
+#: src/flash/detectflash.c:117 src/flash/detectflash.c:149
+msgid "AMD/Fujitsu Standard Command Set"
+msgstr "AMD/Fujitsu Jeu standard de commandes"
+
+#: src/flash/amd.c:636
+msgid "supported: AMD 29LV640D, 29LV641D, 29LV642D; 2x16 Bit"
+msgstr "supportés: AMD 29LV640D, 29LV641D, 29LV642D; 2x16 Bit"
+
+#: src/flash/amd.c:648
+#, fuzzy
+msgid "supported: AMD 29LV800B, S29GLxxxN; MX29LV640B, W19B320AT/B; 1x16 Bit"
+msgstr "supportés: AMD 29LV800B; 1x16 Bit"
+
+#: src/flash/amd.c:660
+#, fuzzy
+msgid ""
+"supported: AMD 29LV160, AMD 29LV065D, AMD 29LV040B, S29GLxxxN, W19B320AT/B; "
+"1x8 Bit"
+msgstr "supportés: AMD 29LV640D, 29LV641D, 29LV642D; 2x16 Bit"
+
+#: src/flash/amd_flash.c:260
+#, fuzzy
+msgid ""
+"Chip: AMD Flash\n"
+"\tPartNumber: "
+msgstr ""
+"Module: AMD Flash\n"
+"\tManufacturier: "
+
+#: src/flash/amd_flash.c:263
+#, c-format
+msgid "Unknown manufacturer (ID 0x%04x)"
+msgstr "Manufacturier inconnu (ID 0x%04x)"
+
+#: src/flash/amd_flash.c:271
+msgid "5V Flash\n"
+msgstr ""
+
+#: src/flash/amd_flash.c:275
+msgid "3V Flash\n"
+msgstr ""
+
+#: src/flash/amd_flash.c:414
+#, fuzzy
+msgid "AMD Standard Command Set"
+msgstr "AMD/Fujitsu Jeu standard de commandes"
+
+#: src/flash/amd_flash.c:415
+#, fuzzy
+msgid "supported: AMD 29LV040B, 29C040B, 1x8 Bit"
+msgstr "supportés: AMD 29LV800B; 1x16 Bit"
+
+#: src/flash/detectflash.c:65
+msgid "bus driver"
+msgstr ""
+
+#: src/flash/detectflash.c:97
+#, fuzzy
+msgid "Flash not found"
+msgstr "Flash non détecté!\n"
+
+#: src/flash/detectflash.c:106
+msgid "Query identification string:\n"
+msgstr "Chaîne de requêtre d'identification:\n"
+
+#: src/flash/detectflash.c:111 src/flash/detectflash.c:143
+msgid "null"
+msgstr "nul"
+
+#: src/flash/detectflash.c:114 src/flash/detectflash.c:146
+msgid "Intel/Sharp Extended Command Set"
+msgstr "Jeu étendu de commandes Intel/Sharp"
+
+#: src/flash/detectflash.c:120 src/flash/detectflash.c:152
+#: src/flash/intel.c:530 src/flash/intel.c:542 src/flash/intel.c:554
+msgid "Intel Standard Command Set"
+msgstr "Jeu standard de commandes Intel"
+
+#: src/flash/detectflash.c:123 src/flash/detectflash.c:155
+msgid "AMD/Fujitsu Extended Command Set"
+msgstr "Jeu étendu de commandes AMD/Fujitsu"
+
+#: src/flash/detectflash.c:126 src/flash/detectflash.c:158
+msgid "Mitsubishi Standard Command Set"
+msgstr "Jeu standard de commandes Mitsubishi"
+
+#: src/flash/detectflash.c:129 src/flash/detectflash.c:161
+msgid "Mitsubishi Extended Command Set"
+msgstr "Jeu étendu de commandes Mitsubishi"
+
+#: src/flash/detectflash.c:132 src/flash/detectflash.c:164
+msgid "Page Write Command Set"
+msgstr "Jeu de commande d'écriture de page"
+
+#: src/flash/detectflash.c:135 src/flash/detectflash.c:167
+#: src/flash/detectflash.c:225
+msgid "unknown!!!"
+msgstr "inconnu!!!"
+
+#: src/flash/detectflash.c:138
+#, c-format
+msgid ""
+"\tPrimary Algorithm Command Set and Control Interface ID Code: 0x%04X (%s)\n"
+msgstr ""
+"\tJeu de commandes Primary Algorithm et Code ID de contrôle d'interface: 0x%"
+"04X (%s)\n"
+
+#: src/flash/detectflash.c:170
+#, c-format
+msgid ""
+"\tAlternate Algorithm Command Set and Control Interface ID Code: 0x%04X (%"
+"s)\n"
+msgstr ""
+"\tJeu alternatif de commandes Primary Algorithm et Code ID de contrôle "
+"d'interface: 0x%04X (%s)\n"
+
+#: src/flash/detectflash.c:174
+msgid "Query system interface information:\n"
+msgstr "Requête d'information d'interface système:\n"
+
+#: src/flash/detectflash.c:175
+#, c-format
+msgid "\tVcc Logic Supply Minimum Write/Erase or Write voltage: %d mV\n"
+msgstr ""
+"\tVcc logique Puissance minimum Écri/Efface ou Voltage d'écriture: %d mV\n"
+
+#: src/flash/detectflash.c:177
+#, c-format
+msgid "\tVcc Logic Supply Maximum Write/Erase or Write voltage: %d mV\n"
+msgstr ""
+"\tVcc logique Puissance maximum Écri/Efface ou Voltage d'écriture: %d mV\n"
+
+#: src/flash/detectflash.c:179
+#, c-format
+msgid "\tVpp [Programming] Supply Minimum Write/Erase voltage: %d mV\n"
+msgstr ""
+"\tVpp [Programmation] puissance minimum Écriture/Efface voltage: %d mV\n"
+
+#: src/flash/detectflash.c:181
+#, c-format
+msgid "\tVpp [Programming] Supply Maximum Write/Erase voltage: %d mV\n"
+msgstr ""
+"\tVpp [Programmation] puissance maximum Écriture/Efface voltage: %d mV\n"
+
+#: src/flash/detectflash.c:183
+#, c-format
+msgid "\tTypical timeout per single byte/word program: %d us\n"
+msgstr "\tDélai d'expiration typique par programme simple octet/mot: %d us\n"
+
+#: src/flash/detectflash.c:185
+#, c-format
+msgid "\tTypical timeout for maximum-size multi-byte program: %d us\n"
+msgstr ""
+"\tDélai d'expiration typique pour la taille maximale par programme multi-"
+"octets: %d us\n"
+
+#: src/flash/detectflash.c:187
+#, c-format
+msgid "\tTypical timeout per individual block erase: %d ms\n"
+msgstr ""
+"\tDélai d'expiration typique par effacement individuel de blocs: %d ms\n"
+
+#: src/flash/detectflash.c:189
+#, c-format
+msgid "\tTypical timeout for full chip erase: %d ms\n"
+msgstr ""
+"\tDélai d'expiration typique pour un effacement complet du module: %d ms\n"
+
+#: src/flash/detectflash.c:191
+#, c-format
+msgid "\tMaximum timeout for byte/word program: %d us\n"
+msgstr "\tDélai d'expiration maximal pour un programme octer/mot: %d us\n"
+
+#: src/flash/detectflash.c:193
+#, c-format
+msgid "\tMaximum timeout for multi-byte program: %d us\n"
+msgstr "\tDélai d'expiration maximum pour programme multi-octets: %d us\n"
+
+#: src/flash/detectflash.c:195
+#, c-format
+msgid "\tMaximum timeout per individual block erase: %d ms\n"
+msgstr ""
+"\tDélai d'expiration maximum par effacement individuel de blocs: %d ms\n"
+
+#: src/flash/detectflash.c:197
+#, c-format
+msgid "\tMaximum timeout for chip erase: %d ms\n"
+msgstr ""
+"\tDélai d'expiration maximum pour un effacement complet du module: %d ms\n"
+
+#: src/flash/detectflash.c:201
+msgid "Device geometry definition:\n"
+msgstr "Définition de la géométrie du périphérique:\n"
+
+#: src/flash/detectflash.c:202
+#, c-format
+msgid "\tDevice Size: %d B (%d KiB, %d MiB)\n"
+msgstr "\tTaille du périphérique: %d O (%d KiB, %d MiB)\n"
+
+#: src/flash/detectflash.c:210
+msgid "x8"
+msgstr "x8"
+
+#: src/flash/detectflash.c:213
+msgid "x16"
+msgstr "x16"
+
+#: src/flash/detectflash.c:216
+msgid "x8/x16"
+msgstr "x8/x16"
+
+#: src/flash/detectflash.c:219
+msgid "x32"
+msgstr "x32"
+
+#: src/flash/detectflash.c:222
+msgid "x16/x32"
+msgstr "x16/x32"
+
+#: src/flash/detectflash.c:228
+#, c-format
+msgid "\tFlash Device Interface Code description: 0x%04X (%s)\n"
+msgstr "\tDescription du code de l'interface du module: 0x%04X (%s)\n"
+
+#: src/flash/detectflash.c:230
+#, c-format
+msgid "\tMaximum number of bytes in multi-byte program: %d\n"
+msgstr "\tNombre maximum d'octets d'un programme multi-octest: %d\n"
+
+#: src/flash/detectflash.c:232
+#, c-format
+msgid "\tNumber of Erase Block Regions within device: %d\n"
+msgstr ""
+"\tNumbre de régions de blocs d'effacement à l'intérieur du périphérique: %d\n"
+
+#: src/flash/detectflash.c:234
+msgid "\tErase Block Region Information:\n"
+msgstr "\tInformation sur la région du bloc d'effacement:\n"
+
+#: src/flash/detectflash.c:240
+#, c-format
+msgid "\t\tRegion %d:\n"
+msgstr "\t\tRégion %d:\n"
+
+#: src/flash/detectflash.c:241
+#, c-format
+msgid "\t\t\tErase Block Size: %d B (%d KiB)\n"
+msgstr "\t\t\tTaille du bloc d'effacement: %d B (%d KiB)\n"
+
+#: src/flash/detectflash.c:246
+#, c-format
+msgid "\t\t\tNumber of Erase Blocks: %d\n"
+msgstr "\t\t\tNombre de blocs d'effacement: %d\n"
+
+#: src/flash/detectflash.c:260
+msgid "Required"
+msgstr ""
+
+#: src/flash/detectflash.c:260
+msgid "Not required"
+msgstr ""
+
+#: src/flash/detectflash.c:263
+msgid "Supported"
+msgstr ""
+
+#: src/flash/detectflash.c:263 src/flash/detectflash.c:277
+#: src/flash/detectflash.c:288
+#, fuzzy
+msgid "Not supported"
+msgstr "Flash non supporté!\n"
+
+#: src/flash/detectflash.c:266
+msgid "170-nm Floating Gate technology"
+msgstr ""
+
+#: src/flash/detectflash.c:267
+msgid "230-nm MirrorBit(tm) technology"
+msgstr ""
+
+#: src/flash/detectflash.c:268
+msgid "130-nm Floating Gate technology"
+msgstr ""
+
+#: src/flash/detectflash.c:269
+msgid "110-nm MirrorBit(tm) technology"
+msgstr ""
+
+#: src/flash/detectflash.c:270
+msgid "90-nm Floating Gate technology"
+msgstr ""
+
+#: src/flash/detectflash.c:271
+msgid "90-nm MirrorBit(tm) technology"
+msgstr ""
+
+#: src/flash/detectflash.c:274
+msgid "CS49"
+msgstr ""
+
+#: src/flash/detectflash.c:274
+msgid "CS59"
+msgstr ""
+
+#: src/flash/detectflash.c:274
+msgid "CS99"
+msgstr ""
+
+#: src/flash/detectflash.c:277
+msgid "Read only"
+msgstr ""
+
+#: src/flash/detectflash.c:277
+msgid "Read/write"
+msgstr ""
+
+#: src/flash/detectflash.c:280
+msgid "29F040 mode"
+msgstr ""
+
+#: src/flash/detectflash.c:280
+msgid "29F016 mode"
+msgstr ""
+
+#: src/flash/detectflash.c:280
+msgid "29F400 mode"
+msgstr ""
+
+#: src/flash/detectflash.c:281
+#, fuzzy
+msgid "29LV800 mode"
+msgstr "Am29LV800B"
+
+#: src/flash/detectflash.c:282
+msgid "29BDS640 mode (Software Command Locking)"
+msgstr ""
+
+#: src/flash/detectflash.c:283
+msgid "29BDD160 mode (New Sector Protect)"
+msgstr ""
+
+#: src/flash/detectflash.c:284
+msgid "29PDL128 mode (New Sector Protect + 29LV800)"
+msgstr ""
+
+#: src/flash/detectflash.c:285
+msgid "Advanced Sector Protect"
+msgstr ""
+
+#: src/flash/detectflash.c:288
+msgid "4 word Page"
+msgstr ""
+
+#: src/flash/detectflash.c:288
+msgid "8 word Page"
+msgstr ""
+
+#: src/flash/detectflash.c:289
+msgid "16 word Page"
+msgstr ""
+
+#: src/flash/detectflash.c:293
+msgid "No boot"
+msgstr ""
+
+#: src/flash/detectflash.c:294
+msgid "8x8kb sectors at top and bottom with WP control"
+msgstr ""
+
+#: src/flash/detectflash.c:295
+msgid "Bottom boot device"
+msgstr ""
+
+#: src/flash/detectflash.c:295
+msgid "Top boot device"
+msgstr ""
+
+#: src/flash/detectflash.c:296
+msgid "Uniform bottom boot device"
+msgstr ""
+
+#: src/flash/detectflash.c:296
+msgid "Uniform top boot device"
+msgstr ""
+
+#: src/flash/detectflash.c:298
+msgid "Bad value"
+msgstr ""
+
+#: src/flash/detectflash.c:306
+msgid "Primary Vendor-Specific Extended Query:\n"
+msgstr ""
+
+#: src/flash/detectflash.c:307
+#, c-format
+msgid "\tMajor version number: %c\n"
+msgstr ""
+
+#: src/flash/detectflash.c:309
+#, c-format
+msgid "\tMinor version number: %c\n"
+msgstr ""
+
+#: src/flash/detectflash.c:316 src/flash/detectflash.c:320
+#, c-format
+msgid "\tAddress Sensitive Unlock: %s\n"
+msgstr ""
+
+#: src/flash/detectflash.c:327 src/flash/detectflash.c:332
+#: src/flash/detectflash.c:338 src/flash/detectflash.c:343
+#, c-format
+msgid "\tProcess Technology: %s\n"
+msgstr ""
+
+#: src/flash/detectflash.c:346
+#, c-format
+msgid "\tErase Suspend: %s\n"
+msgstr ""
+
+#: src/flash/detectflash.c:349
+#, fuzzy
+msgid "\tSector Protect: Not supported\n"
+msgstr "Flash non supporté!\n"
+
+#: src/flash/detectflash.c:351
+#, c-format
+msgid "\tSector Protect: %d sectors per group\n"
+msgstr ""
+
+#: src/flash/detectflash.c:355 src/flash/detectflash.c:359
+#, c-format
+msgid "\tSector Temporary Unprotect: %s\n"
+msgstr ""
+
+#: src/flash/detectflash.c:363 src/flash/detectflash.c:367
+#, c-format
+msgid "\tSector Protect/Unprotect Scheme: %s\n"
+msgstr ""
+
+#: src/flash/detectflash.c:370
+#, fuzzy
+msgid "\tSimultaneous Operation: Not supported\n"
+msgstr "Flash non supporté!\n"
+
+#: src/flash/detectflash.c:372
+#, c-format
+msgid "\tSimultaneous Operation: %d sectors\n"
+msgstr ""
+
+#: src/flash/detectflash.c:376 src/flash/detectflash.c:379
+#, c-format
+msgid "\tBurst Mode Type: %s\n"
+msgstr ""
+
+#: src/flash/detectflash.c:382 src/flash/detectflash.c:385
+#, c-format
+msgid "\tPage Mode Type: %s\n"
+msgstr ""
+
+#: src/flash/detectflash.c:391
+#, c-format
+msgid "\tACC (Acceleration) Supply Minimum: %d mV\n"
+msgstr ""
+
+#: src/flash/detectflash.c:393
+#, c-format
+msgid "\tACC (Acceleration) Supply Maximum: %d mV\n"
+msgstr ""
+
+#: src/flash/detectflash.c:397 src/flash/detectflash.c:400
+#, c-format
+msgid "\tTop/Bottom Sector Flag: %s\n"
+msgstr ""
+
+#: src/flash/detectflash.c:407 src/flash/detectflash.c:410
+#, c-format
+msgid "\tProgram Suspend: %s\n"
+msgstr ""
+
+#: src/flash/detectflash.c:417 src/flash/detectflash.c:420
+#, c-format
+msgid "\tUnlock Bypass: %s\n"
+msgstr ""
+
+#: src/flash/detectflash.c:421
+#, c-format
+msgid "\tSecSi Sector (Customer OTP Area) Size: %d bytes\n"
+msgstr ""
+
+#: src/flash/detectflash.c:423
+#, c-format
+msgid "\tEmbedded Hardware Reset Timeout Maximum: %d ns\n"
+msgstr ""
+
+#: src/flash/detectflash.c:425
+#, c-format
+msgid "\tNon-Embedded Hardware Reset Timeout Maximum: %d ns\n"
+msgstr ""
+
+#: src/flash/detectflash.c:427
+#, c-format
+msgid "\tErase Suspend Timeout Maximum: %d us\n"
+msgstr ""
+
+#: src/flash/detectflash.c:429
+#, c-format
+msgid "\tProgram Suspend Timeout Maximum: %d us\n"
+msgstr ""
+
+#: src/flash/detectflash.c:436
+msgid "\tBank Organization:\n"
+msgstr ""
+
+#: src/flash/detectflash.c:438
+#, c-format
+msgid "\t\tBank%d: %d sectors\n"
+msgstr ""
+
+#: src/flash/flash.c:92
+#, c-format
+msgid "unknown flash - vendor id: %d (0x%04x)\n"
+msgstr "flahs inconnu - identificateur du manufacturier: %d (0x%04x)\n"
+
+#: src/flash/flash.c:96
+#, fuzzy
+msgid "Flash not supported"
+msgstr "Flash non supporté!\n"
+
+#: src/flash/flash.c:110 src/flash/flash.c:311 src/flash/flash.c:484
+#, fuzzy
+msgid "no flash driver found"
+msgstr "aucun pilote de flahs repéré\n"
+
+#: src/flash/flash.c:124
+#, fuzzy
+msgid "Invalid sync sequence"
+msgstr "Séquence de synchro invalide!\n"
+
+#: src/flash/flash.c:150
+#, c-format
+msgid "block %d unlocked\n"
+msgstr "bloc %d déverrouillé\n"
+
+#: src/flash/flash.c:153 src/flash/flash.c:362
+#, c-format
+msgid "erasing block %d: %d\n"
+msgstr "effacement du bloc %d: %d\n"
+
+#: src/flash/flash.c:158 src/flash/flash.c:334
+msgid "program:\n"
+msgstr "programme:\n"
+
+#: src/flash/flash.c:168 src/flash/flash.c:221
+#, fuzzy
+msgid "premature end of file"
+msgstr "ERREUR: fin prématurée du fichier\n"
+
+#: src/flash/flash.c:172 src/flash/flash.c:225
+#, fuzzy, c-format
+msgid "record: start = 0x%08lX, len = 0x%08lX, checksum = 0x%08lX\n"
+msgstr "enregistrement: début = 0x%08X, longueur = 0x%08X, checksum = 0x%08X\n"
+
+#: src/flash/flash.c:178 src/flash/flash.c:231
+#, fuzzy
+msgid "Invalid record length"
+msgstr "ERREUR: longueur de l'enregistrement invalide!\n"
+
+#: src/flash/flash.c:186 src/flash/flash.c:239 src/flash/flash.c:372
+#: src/flash/flash.c:434
+#, fuzzy, c-format
+msgid "addr: 0x%08lX"
+msgstr "adr: 0x%08X"
+
+#: src/flash/flash.c:205 src/flash/flash.c:408
+#, fuzzy
+msgid "verify skipped\n"
+msgstr "vérifier:\n"
+
+#: src/flash/flash.c:210 src/flash/flash.c:413
+msgid "verify:\n"
+msgstr "vérifier:\n"
+
+#: src/flash/flash.c:248
+#, fuzzy, c-format
+msgid "verify error: 0x%08lX vs. 0x%08lX at addr %08lX"
+msgstr ""
+"\n"
+"ERREUR de vérification: 0x%08X vs. 0x%08X à l'adresse %08X\n"
+
+#: src/flash/flash.c:327
+#, c-format
+msgid "malloc(%zd) failed"
+msgstr ""
+
+#: src/flash/flash.c:358
+#, c-format
+msgid ""
+"\n"
+"block %d unlocked\n"
+msgstr ""
+"\n"
+"bloc %d déverrouillé\n"
+
+#: src/flash/flash.c:401
+#, fuzzy, c-format
+msgid "addr: 0x%08lX\n"
+msgstr "adr: 0x%08X"
+
+#: src/flash/flash.c:453
+#, fuzzy, c-format
+msgid ""
+"addr: 0x%08lX\n"
+" verify error:\n"
+"read: 0x%08lX\n"
+"expected: 0x%08lX\n"
+msgstr ""
+"\n"
+"ERREUR de vérification:\n"
+"lu: 0x%08X\n"
+"attendu: 0x%08X\n"
+
+#: src/flash/flash.c:466
+#, fuzzy, c-format
+msgid ""
+"addr: 0x%08lX\n"
+"Done.\n"
+msgstr "adr: 0x%08X"
+
+#: src/flash/flash.c:493
+#, c-format
+msgid ""
+"\n"
+"Erasing %d Flash block%s from address 0x%lx\n"
+msgstr ""
+
+#: src/flash/flash.c:511
+#, c-format
+msgid "(%d%% Completed) FLASH Block %d : Unlocking ... "
+msgstr ""
+
+#: src/flash/flash.c:514
+msgid "Erasing ... "
+msgstr ""
+
+#: src/flash/flash.c:522
+#, c-format
+msgid "(100%% Completed) FLASH Block %d : Unlocking ... Erasing ... Ok.\n"
+msgstr ""
+
+#: src/flash/flash.c:527
+msgid "Ok."
+msgstr ""
+
+#: src/flash/flash.c:529
+#, c-format
+msgid "%78s"
+msgstr ""
+
+#: src/flash/flash.c:535
+msgid "ERROR.\n"
+msgstr ""
+
+#: src/flash/flash.c:542
+msgid ""
+"\n"
+"Erasing Completed.\n"
+msgstr ""
+
+#: src/flash/flash.c:544
+msgid ""
+"\n"
+"Erasing (partially) Failed.\n"
+msgstr ""
+
+#: src/flash/intel.c:127 src/flash/intel.c:130 src/flash/intel.c:133
+#, c-format
+msgid "Manufacturer: %s\n"
+msgstr "Manufacturier: %s\n"
+
+#: src/flash/intel.c:136
+#, fuzzy, c-format
+msgid "Unknown manufacturer (0x%04lX)!\n"
+msgstr "Manufacturier inconnu (0x%04X)!\n"
+
+#: src/flash/intel.c:141
+msgid "Chip: "
+msgstr "Module: "
+
+#: src/flash/intel.c:194
+#, fuzzy, c-format
+msgid "Unknown (0x%02lX)!\n"
+msgstr "Inconnu (0x%02X)!\n"
+
+#: src/flash/intel.c:255
+#, fuzzy
+msgid "invalid command seq"
+msgstr "flash: séquence de commande invalide\n"
+
+#: src/flash/intel.c:258
+#, fuzzy
+msgid "low vpen"
+msgstr "flash: vpen bas\n"
+
+#: src/flash/intel.c:261
+#, fuzzy
+msgid "block locked"
+msgstr "bloc %d déverrouillé\n"
+
+#: src/flash/intel.c:287
+#, fuzzy
+msgid "unknown error while unlocking block"
+msgstr "flash: erreur inconnue lors du déverrouillage\n"
+
+#: src/flash/intel.c:311 src/flash/intel.c:370
+#, fuzzy
+msgid "unknown error while programming"
+msgstr "flash: erreur inconnue lors de la programmation\n"
+
+#: src/flash/intel.c:531
+msgid "supported: 28Fxxxx, 2 x 16 bit"
+msgstr "supportés: 28Fxxxx, 2 x 16 bit"
+
+#: src/flash/intel.c:543
+msgid "supported: 28Fxxxx, 1 x 16 bit"
+msgstr "supportés: 28Fxxxx, 1 x 16 bit"
+
+#: src/flash/intel.c:555
+msgid "supported: 28Fxxxx, 1 x 8 bit"
+msgstr "supportés: 28Fxxxx, 1 x 8 bit"
+
+#: src/part/bsbit.c:50
+#, fuzzy
+msgid "missing Boundary Scan Register (BSR)"
+msgstr "registre Boundary Scan Register (BSR) manquant\n"
+
+#: src/part/bsbit.c:56
+#, fuzzy
+msgid "invalid boundary bit number"
+msgstr "numéro de bit de limite invalide\n"
+
+#: src/part/bsbit.c:61
+#, fuzzy
+msgid "duplicate bit declaration"
+msgstr "déclaration double de bit\n"
+
+#: src/part/bsbit.c:66
+#, fuzzy
+msgid "invalid control bit number"
+msgstr "numéro de bit de contrôle invalide\n"
+
+#: src/part/data_register.c:53
+#, fuzzy
+msgid "Data register name too long\n"
+msgstr "AVERTISSEMENT: nom du registre de données trop long\n"
+
+#: src/part/data_register.c:101
+#, fuzzy, c-format
+msgid "Data register '%s' already defined"
+msgstr "registre de données '%s' est déjà défini\n"
+
+#: src/part/instruction.c:51
+#, fuzzy
+msgid "Instruction name too long\n"
+msgstr "AVERTISSEMENT: nom de l'instruction trop long\n"
+
+#: src/part/part.c:231
+#, fuzzy, c-format
+msgid "signal '%s' cannot be set as output"
+msgstr "signal '%s' ne peut être initialisé comme sortie\n"
+
+#: src/part/part.c:246
+#, fuzzy, c-format
+msgid "signal '%s' cannot be set as input"
+msgstr "signal '%s' ne peut être initialisé comme entrée\n"
+
+#: src/part/part.c:280
+#, fuzzy, c-format
+msgid "signal '%s' is not input signal"
+msgstr "signal '%s' n'est pas un signal d'entrée\n"
+
+#: src/part/part.c:300
+#, c-format
+msgid "%%-%ds %%-%ds %%-%ds %%-%ds %%-%ds\n"
+msgstr "%%-%ds %%-%ds %%-%ds %%-%ds %%-%ds\n"
+
+#: src/part/part.c:312 src/part/part.c:314
+msgid "(none)"
+msgstr "(aucun)"
+
+#: src/part/part.c:328
+#, fuzzy
+msgid "instruction length is already set and used"
+msgstr "la longueur d'instruction est déjà initialisée et utilisée\n"
+
+#: src/part/part.c:355
+#, fuzzy, c-format
+msgid "Instruction '%s' already defined"
+msgstr "Instruction '%s' est déjà définie\n"
+
+#: src/part/part.c:363
+#, fuzzy, c-format
+msgid "unknown data register '%s'"
+msgstr "registre de données inconnu '%s'\n"
+
+#: src/svf/svf.c:470
+#, c-format
+msgid "Error %s: mismatch at position %d for TDO\n"
+msgstr ""
+
+#: src/svf/svf.c:550
+#, c-format
+msgid "calloc(%zd,%zd) fails"
+msgstr ""
+
+#: src/svf/svf.c:624 src/svf/svf.c:1081
+#, c-format
+msgid "command %s not implemented\n"
+msgstr ""
+
+#: src/svf/svf.c:661
+#, c-format
+msgid "Error %s: only TCK is supported for RUNTEST"
+msgstr ""
+
+#: src/svf/svf.c:668
+#, c-format
+msgid "Error %s: maximum time must be larger or equal to minimum time"
+msgstr ""
+
+#: src/svf/svf.c:676
+msgid "maximum time for RUNTEST not guaranteed.\n"
+msgstr ""
+
+#: src/svf/svf.c:677
+msgid " This message is only displayed once.\n"
+msgstr ""
+
+#: src/svf/svf.c:710
+#, c-format
+msgid "Error %s: Maximum cable clock frequency required for RUNTEST"
+msgstr ""
+
+#: src/svf/svf.c:713
+msgid " Set the cable frequency with 'FREQUENCY <Hz>'.\n"
+msgstr ""
+
+#: src/svf/svf.c:878
+#, c-format
+msgid "Error %s: first %s command after length change must have a TDI value.\n"
+msgstr ""
+
+#: src/svf/svf.c:906
+#, c-format
+msgid "Error %s: SIR command length inconsistent.\n"
+msgstr ""
+
+#: src/svf/svf.c:910
+#, c-format
+msgid " in input file between line %d col %d and line %d col %d\n"
+msgstr ""
+
+#: src/svf/svf.c:1011
+#, c-format
+msgid "Error %s: no further TRST command allowed after mode ABSENT"
+msgstr ""
+
+#: src/svf/svf.c:1034
+#, c-format
+msgid "Error %s: TRST ABSENT must not be issued after a STATE command"
+msgstr ""
+
+#: src/svf/svf.c:1042
+#, c-format
+msgid "Error %s: TRST ABSENT must not be issued after an SIR or SDR command"
+msgstr ""
+
+#: src/svf/svf.c:1052
+#, c-format
+msgid "unimplemented mode '%s' for TRST\n"
+msgstr ""
+
+#: src/svf/svf.c:1140
+#, fuzzy, c-format
+msgid "%s: no JTAG chain available"
+msgstr "ERREUR: incapable de détecter la fin de la chaîne JTAG!\n"
+
+#: src/svf/svf.c:1147
+#, c-format
+msgid "%s: chain without any parts"
+msgstr ""
+
+#: src/svf/svf.c:1163
+#, c-format
+msgid "%s: could not establish SDR register"
+msgstr ""
+
+#: src/svf/svf.c:1203
+#, c-format
+msgid "%s: could not establish SIR instruction"
+msgstr ""
+
+#: src/svf/svf.c:1240
+msgid ""
+"Mismatches occurred between scanned device output and expected TDO values.\n"
+msgstr ""
+
+#: src/svf/svf.c:1243
+msgid "Scanned device output matched expected TDO values.\n"
+msgstr ""
+
+#: svf_flex.l:367
+#, c-format
+msgid "Parsing %6d/%d (%3.0d%%)"
+msgstr ""
+
+#: svf_flex.l:387 src/tap/cable/ft2232.c:1741
+#: src/tap/cable/generic_parport.c:89 src/tap/cable/generic_usbconn.c:236
+#: src/tap/cable/jim.c:71 src/tap/cable/ts7800.c:171
+#: src/tap/cable/usbblaster.c:80 src/tap/cable/vision_ep9307.c:214
+#: src/tap/cable/wiggler.c:226
+#, c-format
+msgid "malloc(%zd) fails"
+msgstr ""
+
+#: src/tap/cable/arcom.c:137
+msgid "Arcom JTAG Cable"
+msgstr "Cable JTAG Arcom"
+
+#: src/tap/cable/byteblaster.c:159
+msgid ""
+"Altera ByteBlaster/ByteBlaster II/ByteBlasterMV Parallel Port Download Cable"
+msgstr ""
+"Cable du port parallèle de chargement Altera ByteBlaster/ByteBlaster II/"
+"ByteBlasterMV"
+
+#: src/tap/cable.c:185 src/tap/usbconn/libusb.c:169
+#, c-format
+msgid "malloc(%zd)/malloc(%zd) fails"
+msgstr ""
+
+#: src/tap/cable.c:239
+#, c-format
+msgid "(Resized JTAG activity queue to hold max %d items)\n"
+msgstr ""
+
+#: src/tap/cable.c:426 src/tap/cable.c:487
+#, c-format
+msgid "Internal error: Got wrong type of result from queue (%d? %p.%d)\n"
+msgstr ""
+
+#: src/tap/cable.c:494
+#, c-format
+msgid "Internal error: Got wrong signal's value from queue (%d? %p.%d)\n"
+msgstr ""
+
+#: src/tap/cable.c:551
+#, c-format
+msgid "Internal error: Got wrong type of result from queue (#%d %p.%d)\n"
+msgstr ""
+
+#: src/tap/cable.c:558
+msgid "Internal error: Wanted transfer result but none was queued\n"
+msgstr ""
+
+#: src/tap/cable/dlc5.c:131
+msgid "Xilinx DLC5 JTAG Parallel Cable III"
+msgstr "Cable parallèle JTAG Xilinx DLC5 III"
+
+#: src/tap/cable/ea253.c:137
+msgid "ETC EA253 JTAG Cable"
+msgstr "Cable JATB ETC EA253"
+
+#: src/tap/cable/ei012.c:139
+msgid "ETC EI012 JTAG Cable"
+msgstr "Cable JTAG ETC EI012"
+
+#: src/tap/cable/ft2232.c:251
+#, c-format
+msgid "Setting lowest supported frequency for FT2232: %d\n"
+msgstr ""
+
+#: src/tap/cable/ft2232.c:739
+msgid "Please power on the TARGET board and connect VCC signal"
+msgstr ""
+
+#: src/tap/cable/ft2232.c:1824
+#, c-format
+msgid ""
+"Usage: cable %s [vid=VID] [pid=PID] [desc=DESC] [driver=DRIVER]\n"
+"\n"
+"VID vendor ID (hex), defaults to %04X\n"
+"PID product ID (hex), defaults to %04X\n"
+"DESC Some string to match in description or serial no.\n"
+"DRIVER usbconn driver, either ftdi-mpsse or ftd2xx-mpsse\n"
+" defaults to %s if not specified\n"
+"\n"
+msgstr ""
+
+#: src/tap/cable/ft2232.c:1836
+msgid "Generic FTDI FT2232 Cable"
+msgstr ""
+
+#: src/tap/cable/ft2232.c:1869
+msgid "Olimex ARM-USB-OCD[-TINY] (FT2232) Cable"
+msgstr ""
+
+#: src/tap/cable/ft2232.c:1916
+msgid "Analog Devices Blackfin gnICE (FT2232) Cable (EXPERIMENTAL)"
+msgstr ""
+
+#: src/tap/cable/ft2232.c:1949
+msgid "Amontec JTAGkey (FT2232) Cable"
+msgstr ""
+
+#: src/tap/cable/ft2232.c:1982
+msgid "OOCDLink-s (FT2232) Cable (EXPERIMENTAL)"
+msgstr ""
+
+#: src/tap/cable/ft2232.c:2015
+msgid "Turtelizer 2 Rev. B (FT2232) Cable (EXPERIMENTAL)"
+msgstr ""
+
+#: src/tap/cable/ft2232.c:2048
+msgid "USB to JTAG Interface (FT2232) Cable (EXPERIMENTAL)"
+msgstr ""
+
+#: src/tap/cable/ft2232.c:2081
+msgid "Xverve DT-USB-ST Signalyzer Tool (FT2232) Cable (EXPERIMENTAL)"
+msgstr ""
+
+#: src/tap/cable/ft2232.c:2114
+msgid "TinCanTools Flyswatter (FT2232) Cable"
+msgstr ""
+
+#: src/tap/cable/ft2232.c:2147
+msgid "KrisTech usbScarabeus2 (FT2232) Cable"
+msgstr ""
+
+#: src/tap/cable/generic.c:110
+msgid "No space in cable activity results queue"
+msgstr ""
+
+#: src/tap/cable/generic.c:421
+msgid "calibration error, wall clock is not monotonically increasing\n"
+msgstr ""
+
+#: src/tap/cable/generic_parport.c:62
+msgid "extra arguments"
+msgstr ""
+
+#: src/tap/cable/generic_parport.c:72
+#, fuzzy, c-format
+msgid "Unknown port type: %s"
+msgstr "registre de données inconnu '%s'\n"
+
+#: src/tap/cable/generic_parport.c:120
+#, c-format
+msgid ""
+"Usage: cable %s parallel PORTADDR\n"
+" or: cable %s ppdev PPDEV\n"
+" or: cable %s ppi PPIDEV\n"
+"\n"
+"PORTADDR parallel port address (e.g. 0x378)\n"
+"PPDEV ppdev device (e.g. /dev/parport0)\n"
+"PPIDEF ppi device (e.g. /dev/ppi0)\n"
+"\n"
+msgstr ""
+
+#: src/tap/cable/generic_usbconn.c:229
+msgid "Couldn't connect to suitable USB device.\n"
+msgstr ""
+
+#: src/tap/cable/generic_usbconn.c:267
+#, c-format
+msgid ""
+"Usage: cable %s [vid=VID] [pid=PID] [desc=DESC] [...]\n"
+"\n"
+"VID USB Device Vendor ID (hex, e.g. 0abc)\n"
+"PID USB Device Product ID (hex, e.g. 0abc)\n"
+"DESC Some string to match in description or serial no.\n"
+"\n"
+msgstr ""
+
+#: src/tap/cable/jim.c:55
+msgid "not enough arguments"
+msgstr ""
+
+#: src/tap/cable/jim.c:59
+msgid "JTAG target simulator JIM - work in progress!\n"
+msgstr ""
+
+#: src/tap/cable/jim.c:154
+#, c-format
+msgid "Usage: cable %s\n"
+msgstr ""
+
+#: src/tap/cable/jim.c:159
+msgid "JTAG target simulator JIM"
+msgstr ""
+
+#: src/tap/cable/jlink.c:590
+msgid "Segger/IAR J-Link, Atmel SAM-ICE and others."
+msgstr ""
+
+#: src/tap/cable/keithkoep.c:148
+msgid "Keith & Koep JTAG cable"
+msgstr "Cable JTAG Keith & Koep"
+
+#: src/tap/cable/lattice.c:140
+#, fuzzy
+msgid "Lattice Parallel Port JTAG Cable"
+msgstr "Cable JTAG Macraigor Wiggler"
+
+#: src/tap/cable/mpcbdm.c:146
+msgid "Mpcbdm JTAG cable"
+msgstr "Cable JTAG Mpcbdm"
+
+#: src/tap/cable/triton.c:150
+msgid "Ka-Ro TRITON Starterkit II (PXA255/250) JTAG Cable"
+msgstr "Cable JTAG Ka-Ro TRITON Starterkit II (PXA255/250)"
+
+#: src/tap/cable/ts7800.c:89 src/tap/cable/vision_ep9307.c:95
+#, fuzzy
+msgid "unable to open /dev/mem"
+msgstr "ERREUR: mémoire épuisée!\n"
+
+#: src/tap/cable/ts7800.c:102 src/tap/cable/vision_ep9307.c:138
+#, fuzzy
+msgid "unable to mmap the GPIO registers"
+msgstr "ERREUR: incapable de détecter la fin de la chaîne JTAG!\n"
+
+#: src/tap/cable/ts7800.c:127 src/tap/cable/vision_ep9307.c:164
+#, fuzzy
+msgid "unable to munmap the GPIO registers"
+msgstr "ERREUR: incapable de détecter la fin de la chaîne JTAG!\n"
+
+#: src/tap/cable/ts7800.c:161 src/tap/cable/vision_ep9307.c:204
+msgid "This cable type does not accept parameters"
+msgstr ""
+
+#: src/tap/cable/ts7800.c:166
+msgid "Initializing TS-7800 Built-in JTAG Chain\n"
+msgstr ""
+
+#: src/tap/cable/ts7800.c:298 src/tap/cable/vision_ep9307.c:339
+#, c-format
+msgid ""
+"Usage: cable %s\n"
+"\n"
+msgstr ""
+
+#: src/tap/cable/ts7800.c:303
+msgid "TS-7800 Built-in JTAG Chain"
+msgstr ""
+
+#: src/tap/cable/usbblaster.c:104
+#, c-format
+msgid "USB-Blaster frequency is fixed to %ld Hz\n"
+msgstr ""
+
+#: src/tap/cable/usbblaster.c:503
+#, c-format
+msgid ""
+"Usage: cable %s [vid=VID] [pid=PID] [desc=DESC] [driver=DRIVER]\n"
+"\n"
+"VID vendor ID (hex, e.g. 0abc)\n"
+"PID product ID (hex, e.g. 0abc)\n"
+"DESC Some string to match in description or serial no.\n"
+"DRIVER usbconn driver, either ftdi or ftd2xx\n"
+" defaults to %s if not specified\n"
+"\n"
+msgstr ""
+
+#: src/tap/cable/usbblaster.c:514
+msgid "Altera USB-Blaster Cable"
+msgstr ""
+
+#: src/tap/cable/vision_ep9307.c:107
+msgid "unable to mmap the System Control registers"
+msgstr ""
+
+#: src/tap/cable/vision_ep9307.c:127
+msgid "unable to munmap the System Controller registers"
+msgstr ""
+
+#: src/tap/cable/vision_ep9307.c:209
+msgid "Initializing Vision EP9307 SoM GPIO JTAG Cable\n"
+msgstr ""
+
+#: src/tap/cable/vision_ep9307.c:344
+msgid "Vision EP9307 SoM GPIO JTAG Cable"
+msgstr ""
+
+#: src/tap/cable/wiggler2.c:159
+msgid "Modified (with CPU Reset) WIGGLER JTAG Cable"
+msgstr ""
+
+#: src/tap/cable/wiggler.c:248
+msgid "Pin mapping failed\n"
+msgstr ""
+
+#: src/tap/cable/wiggler.c:388
+#, c-format
+msgid ""
+"Usage: cable %s parallel PORTADDR [TDO,TRST,TDI,TCK,TMS,SRESET]\n"
+" or: cable %s ppdev PPDEV [TDO,TRST,TDI,TCK,TMS,SRESET]\n"
+" or: cable %s ppi PPIDEV [TDO,TRST,TDI,TCK,TMS,SRESET]\n"
+"\n"
+"PORTADDR parallel port address (e.g. 0x378)\n"
+"PPDEV ppdev device (e.g. /dev/parport0)\n"
+"PPIDEF ppi device (e.g. /dev/ppi0)\n"
+"TDO, ... parallel port bit number, prepend '#' for inversion\n"
+" default is '%s'\n"
+"\n"
+msgstr ""
+
+#: src/tap/cable/wiggler.c:415
+msgid "Macraigor Wiggler JTAG Cable"
+msgstr "Cable JTAG Macraigor Wiggler"
+
+#: src/tap/cable/wiggler.c:434
+#, fuzzy
+msgid "Excelpoint IGLOO JTAG Cable"
+msgstr "Cable JTAG Arcom"
+
+#: src/tap/cable/xpc.c:685
+msgid "Xilinx Platform Cable USB internal chain"
+msgstr ""
+
+#: src/tap/cable/xpc.c:712
+msgid "Xilinx Platform Cable USB external chain"
+msgstr ""
+
+#: src/tap/chain.c:182 src/tap/chain.c:250
+#, fuzzy, c-format
+msgid "Part %d without active instruction"
+msgstr "%s(%d) pièce %d sans instruction active\n"
+
+#: src/tap/chain.c:256
+#, fuzzy, c-format
+msgid "Part %d without data register"
+msgstr "%s(%d) pièce %d sans registre de données\n"
+
+#: src/tap/chain.c:321
+#, fuzzy
+msgid "Run \"detect\" first"
+msgstr "Eéxcuer \"détecter\" d'abord.\n"
+
+#: src/tap/chain.c:327
+#, c-format
+msgid "active part no %d exceeds chain length %d"
+msgstr ""
+
+#: src/tap/detect.c:65
+#, fuzzy, c-format
+msgid "Unable to open file '%s'\n"
+msgstr "Incapable d'ouvrir le fichier `%s'!\n"
+
+#: src/tap/detect.c:201
+#, c-format
+msgid "IR length: %d\n"
+msgstr "longueur IR: %d\n"
+
+#: src/tap/detect.c:219
+msgid "Unable to detect JTAG chain length\n"
+msgstr "Incapable de détecter la longueur de la chaîne JTAG\n"
+
+#: src/tap/detect.c:222
+#, c-format
+msgid "Chain length: %d\n"
+msgstr "Longueur de la chaîne: %d\n"
+
+#: src/tap/detect.c:265
+#, fuzzy, c-format
+msgid "Device Id: %s (0x%016<PRIX64>)\n"
+msgstr "Identificateur du périphérique: %s\n"
+
+#: src/tap/detect.c:268
+msgid "Device Id: unknown as bit 0 was not a 1\n"
+msgstr ""
+
+#: src/tap/detect.c:299
+msgid " Unknown manufacturer!\n"
+msgstr " Manufacturier inconnu!\n"
+
+#: src/tap/detect.c:305
+#, c-format
+msgid " Manufacturer: %s\n"
+msgstr " Manufacturier: %s\n"
+
+#: src/tap/detect.c:308
+#, fuzzy
+msgid "Manufacturer too long\n"
+msgstr "AVERTISSEMENT: nom du manufacturier trop long\n"
+
+#: src/tap/detect.c:325
+msgid " Unknown part!\n"
+msgstr " Pièce inconnue!\n"
+
+#: src/tap/detect.c:331
+#, fuzzy, c-format
+msgid " Part(%d): %s\n"
+msgstr " Pièce: %s\n"
+
+#: src/tap/detect.c:334
+#, fuzzy
+msgid "Part too long\n"
+msgstr "AVERTISSEMENT: nom de pièce trop long\n"
+
+#: src/tap/detect.c:351
+msgid " Unknown stepping!\n"
+msgstr " Pas inconnu!\n"
+
+#: src/tap/detect.c:357
+#, c-format
+msgid " Stepping: %s\n"
+msgstr " Pas : %s\n"
+
+#: src/tap/detect.c:360
+#, fuzzy
+msgid "Stepping too long\n"
+msgstr "AVERTISSEMENT: pas trop long\n"
+
+#: src/tap/detect.c:400
+msgid "Error: Unable to detect JTAG chain end!\n"
+msgstr "ERREUR: incapable de détecter la fin de la chaîne JTAG!\n"
+
+#: src/tap/detect.c:450
+msgid "Error: could not set BR register"
+msgstr ""
+
+#: src/tap/detect.c:471
+msgid "Error: could not set BYPASS instruction"
+msgstr ""
+
+#: src/tap/discovery.c:117
+#, c-format
+msgid "TDO seems to be stuck at %d\n"
+msgstr ""
+
+#: src/tap/discovery.c:142
+msgid "Detecting IR length ... "
+msgstr "Détection de la longuer IR..."
+
+#: src/tap/discovery.c:148 src/tap/discovery.c:184
+#, c-format
+msgid "%d\n"
+msgstr "%d\n"
+
+#: src/tap/discovery.c:153
+msgid "Error: Invalid IR length!\n"
+msgstr "ERREUR: longueur IR invalide!\n"
+
+#: src/tap/discovery.c:177
+#, c-format
+msgid "Detecting DR length for IR %s ... "
+msgstr "Détection de la longeur DR de IR %s..."
+
+#: src/tap/parport/direct.c:157
+msgid "Couldn't load InpOut32.dll; maybe not installed?"
+msgstr ""
+
+#: src/tap/parport/direct.c:223
+#, fuzzy
+msgid "Invalid port address"
+msgstr "Adresse de port invalide!\n"
+
+#: src/tap/parport/direct.c:238
+#, c-format
+msgid "Disconnecting %s from parallel port at 0x%x\n"
+msgstr "Déconnexion de %s du port parallèle à 0x%x\n"
+
+#: src/tap/parport/direct.c:245
+#, fuzzy, c-format
+msgid "Initializing parallel port at 0x%x\n"
+msgstr "Initialisation de %s sur le port parallèle à 0x%x\n"
+
+#: src/tap/parport/ppdev.c:132
+#, c-format
+msgid "Disconnecting %s from ppdev port %s\n"
+msgstr "Déconnexion de %s du port ppdev %s\n"
+
+#: src/tap/parport/ppdev.c:138
+#, fuzzy, c-format
+msgid "Initializing ppdev port %s\n"
+msgstr "Initialisation de %s sur le port ppdev %s\n"
+
+#: src/tap/parport/ppdev.c:155
+#, fuzzy, c-format
+msgid "Could not open port %s"
+msgstr "ne peut ouvrir %s\n"
+
+#: src/tap/parport/ppdev.c:162
+msgid "Could not claim ppdev device"
+msgstr ""
+
+#: src/tap/parport/ppi.c:128
+#, fuzzy, c-format
+msgid "Disconnecting %s from ppi port %s\n"
+msgstr "Déconnexion de %s du port ppdev %s\n"
+
+#: src/tap/parport/ppi.c:135
+#, fuzzy, c-format
+msgid "Initializing on ppi port %s\n"
+msgstr "Initialisation de %s sur le port ppdev %s\n"
+
+#: src/tap/tap.c:78 src/tap/tap.c:150 src/tap/tap.c:163
+#, c-format
+msgid "%s: Invalid state: %2X\n"
+msgstr "%s: état invalide: %2X\n"
+
+#: src/tap/usbconn/libftd2xx.c:133
+#, c-format
+msgid "FT_Write() failed: %s"
+msgstr ""
+
+#: src/tap/usbconn/libftd2xx.c:141 src/tap/usbconn/libftdi.c:93
+msgid "Written fewer bytes than requested"
+msgstr ""
+
+#: src/tap/usbconn/libftd2xx.c:161 src/tap/usbconn/libftdi.c:113
+msgid "Receive buffer does not exist"
+msgstr ""
+
+#: src/tap/usbconn/libftd2xx.c:168 src/tap/usbconn/libftd2xx.c:230
+#, c-format
+msgid "Error from FT_Read(): %s"
+msgstr ""
+
+#: src/tap/usbconn/libftd2xx.c:173 src/tap/usbconn/libftdi.c:127
+#, c-format
+msgid "%s(): Received fewer bytes than requested.\n"
+msgstr ""
+
+#: src/tap/usbconn/libftd2xx.c:297 src/tap/usbconn/libftdi.c:237
+msgid "Send buffer does not exist"
+msgstr ""
+
+#: src/tap/usbconn/libftd2xx.c:360
+msgid "Connected to libftd2xx driver.\n"
+msgstr ""
+
+#: src/tap/usbconn/libftd2xx.c:437 src/tap/usbconn/libftd2xx.c:484
+#: src/tap/usbconn/libftd2xx.c:519 src/tap/usbconn/libftd2xx.c:546
+#, c-format
+msgid "Can't reset device: %s"
+msgstr ""
+
+#: src/tap/usbconn/libftd2xx.c:441 src/tap/usbconn/libftd2xx.c:523
+#: src/tap/usbconn/libftd2xx.c:550
+#, c-format
+msgid "Can't purge RX buffer: %s"
+msgstr ""
+
+#: src/tap/usbconn/libftd2xx.c:446
+#, c-format
+msgid "Can't set latency timer: %s"
+msgstr ""
+
+#: src/tap/usbconn/libftd2xx.c:451
+#, c-format
+msgid "Can't set baudrate: %s"
+msgstr ""
+
+#: src/tap/usbconn/libftd2xx.c:488
+#, c-format
+msgid "s(): Can't purge RX buffer: %s"
+msgstr ""
+
+#: src/tap/usbconn/libftd2xx.c:495
+#, c-format
+msgid "Can't set USB parameters: %s"
+msgstr ""
+
+#: src/tap/usbconn/libftd2xx.c:500
+#, c-format
+msgid "Can't set special characters: %s"
+msgstr ""
+
+#: src/tap/usbconn/libftd2xx.c:508
+#, c-format
+msgid "Can't set target latency timer: %s"
+msgstr ""
+
+#: src/tap/usbconn/libftd2xx.c:514
+#, c-format
+msgid "Can't set MPSSE bitmode: %s"
+msgstr ""
+
+#: src/tap/usbconn/libftdi.c:87
+#, c-format
+msgid "ftdi_write_data() failed: %s"
+msgstr ""
+
+#: src/tap/usbconn/libftdi.c:122 src/tap/usbconn/libftdi.c:178
+#, c-format
+msgid "Error from ftdi_read_data(): %s"
+msgstr ""
+
+#: src/tap/usbconn/libftdi.c:305
+msgid "Connected to libftdi driver.\n"
+msgstr ""
+
+#: src/tap/usbconn/libftdi.c:344
+#, c-format
+msgid "%s(): ftdi_usb_open_desc() failed: %s"
+msgstr ""
+
+#: src/tap/usbconn/libftdi.c:346
+#, c-format
+msgid "ftdi_usb_open_desc() failed: %s"
+msgstr ""
+
+#: src/tap/usbconn/libftdi.c:371
+#, c-format
+msgid "ftdi_usb_purge_buffers() failed: %s"
+msgstr ""
+
+#: src/tap/usbconn/libftdi.c:375 src/tap/usbconn/libftdi.c:396
+#, c-format
+msgid "ftdi_read_data() failed: %s"
+msgstr ""
+
+#: src/tap/usbconn/libftdi.c:385
+#, c-format
+msgid "ftdi_usb_purge_rx_buffer() failed: %s"
+msgstr ""
+
+#: src/tap/usbconn/libftdi.c:392
+#, c-format
+msgid "ftdi_usb_purge_tx_buffer() failed: %s"
+msgstr ""
+
+#: src/tap/usbconn/libftdi.c:413
+#, c-format
+msgid "ftdi_poll_status() failed: %s"
+msgstr ""
+
+#: src/tap/usbconn/libftdi.c:418 src/tap/usbconn/libftdi.c:534
+#: src/tap/usbconn/libftdi.c:556
+#, c-format
+msgid "ftdi_usb_reset() failed: %s"
+msgstr ""
+
+#: src/tap/usbconn/libftdi.c:444 src/tap/usbconn/libftdi.c:524
+#, c-format
+msgid "ftdi_set_latency_timer() failed: %s"
+msgstr ""
+
+#: src/tap/usbconn/libftdi.c:461
+#, c-format
+msgid "ftdi_set_baudrate() failed: %s"
+msgstr ""
+
+#: src/tap/usbconn/libftdi.c:529
+#, c-format
+msgid "ftdi_set_bitmode() failed: %s"
+msgstr ""
+
+#, fuzzy
+#~ msgid "Out of memory, %s line %i\n"
+#~ msgstr "Mémoire épuisée\n"
+
+#, fuzzy
+#~ msgid "No JTAG chain available\n"
+#~ msgstr "(pas de description disponible)"
+
+#, fuzzy
+#~ msgid "Unable to open BSDL file '%s'\n"
+#~ msgstr "Incapable d'ouvrir le fichier `%s'!\n"
+
+#, fuzzy
+#~ msgid "Cannot open file %s or %s.\n"
+#~ msgstr "ne peut ouvrir %s\n"
+
+#~ msgid "out of memory\n"
+#~ msgstr "mémoire épuisée\n"
+
+#, fuzzy
+#~ msgid "signal '%s' is not found\n"
+#~ msgstr "signal '%s' non repéré\n"
+
+#~ msgid "Error: Bus width detection failed\n"
+#~ msgstr "ERREUR: détection de la largeur de bus a échoué\n"
+
+#~ msgid "Error: Invalid bus width (MD3 = MD4 = 0)!\n"
+#~ msgstr "ERREUR: largeur de bus invalide (MD3 = MD4 = 0)!\n"
+
+#, fuzzy
+#~ msgid "Addr: 0x%08X\n"
+#~ msgstr "adr: 0x%08X\n"
+
+#~ msgid "%s: no active part\n"
+#~ msgstr "%s: aucune pièce active\n"
+
+#~ msgid "Error: Cable connection failed!\n"
+#~ msgstr "Error: échec de la connexion par cable!\n"
+
+#~ msgid "Error: Cable initialization failed!\n"
+#~ msgstr "Error: échec de l'initialisation par cable!\n"
+
+#~ msgid "Error: Cable not configured. Please use '%s' command first!\n"
+#~ msgstr ""
+#~ "ERREUR: cable non configuré. SVP utiliser la commande '%s' d'abord!\n"
+
+#~ msgid "%s: syntax error!\n"
+#~ msgstr "%s: erreur de syntaxe!\n"
+
+#, fuzzy
+#~ msgid "Unable to open file `%s go=%d'!\n"
+#~ msgstr "Incapable d'ouvrir le fichier `%s'!\n"
+
+#, fuzzy
+#~ msgid "bus alloc/attach failed!\n"
+#~ msgstr "initialisation du bus a échoué!\n"
+
+#~ msgid "bus initialization failed!\n"
+#~ msgstr "initialisation du bus a échoué!\n"
+
+#~ msgid ""
+#~ "\n"
+#~ "flash error\n"
+#~ msgstr ""
+#~ "\n"
+#~ "erreur flash\n"
+
+#~ msgid "Out of memory!\n"
+#~ msgstr "Mémoire épuisée!\n"
+
+#~ msgid "flash: block locked\n"
+#~ msgstr "flash: bloc verrouillé\n"
+
+#, fuzzy
+#~ msgid "out of memory"
+#~ msgstr "mémoire épuisée\n"
+
+#, fuzzy
+#~ msgid "Initialization failed.\n"
+#~ msgstr "initialisation du bus a échoué!\n"
+
+#, fuzzy
+#~ msgid "%s(%d) Out of memory\n"
+#~ msgstr "%s(%d) Mémoire épuisée.\n"
+
+#~ msgid "Cannot open %s\n"
+#~ msgstr "ne peut ouvrir %s\n"
+
+#, fuzzy
+#~ msgid "Error: Unable to allocate space for parts!\n"
+#~ msgstr "ERREUR: incapable de détecter la fin de la chaîne JTAG!\n"
+
+#, fuzzy
+#~ msgid "Error: Unable to allocate space for a part!\n"
+#~ msgstr "ERREUR: incapable de détecter la fin de la chaîne JTAG!\n"
+
+#~ msgid "Error: Out of memory!\n"
+#~ msgstr "ERREUR: mémoire épuisée!\n"
+
+#~ msgid "Syntax error!\n"
+#~ msgstr "ERREUR de syntaxe!\n"
+
+#~ msgid "%s(%d) Out of memory.\n"
+#~ msgstr "%s(%d) Mémoire épuisée.\n"
+
+#~ msgid "supported: AMD 29LV800B; 1x16 Bit"
+#~ msgstr "supportés: AMD 29LV800B; 1x16 Bit"
+
+#, fuzzy
+#~ msgid ""
+#~ "Blackfin BF537 Stamp compatible bus driver via BSR (JTAG part No. %d)\n"
+#~ msgstr ""
+#~ "Pilote de bus compatible Broadcom BCM1250 via BSR (JTAG No de pièce %d)\n"
+
+#, fuzzy
+#~ msgid ""
+#~ "Blackfin BF537 EZ-KIT compatible bus driver via BSR (JTAG part No. %d)\n"
+#~ msgstr ""
+#~ "Pilote de bus compatible Broadcom BCM1250 via BSR (JTAG No de pièce %d)\n"
+
+#, fuzzy
+#~ msgid ""
+#~ "Blackfin BF527 EZ-KIT compatible bus driver via BSR (JTAG part No. %d)\n"
+#~ msgstr ""
+#~ "Pilote de bus compatible Broadcom BCM1250 via BSR (JTAG No de pièce %d)\n"
+
+#~ msgid "Intel PXA2x0 compatible bus driver via BSR (JTAG part No. %d)\n"
+#~ msgstr ""
+#~ "pilote de bus compatible Intel PXA2x0 via BSR (JTAG No de pièce %d)\n"
+
+#, fuzzy
+#~ msgid "Intel PXA27x compatible bus driver via BSR (JTAG part No. %d)\n"
+#~ msgstr ""
+#~ "pilote de bus compatible Intel PXA2x0 via BSR (JTAG No de pièce %d)\n"
+
+#~ msgid "AMD"
+#~ msgstr "AMD"
+
+#, fuzzy
+#~ msgid "Am29LV040B"
+#~ msgstr "Am29LV800B"
+
+#~ msgid "Am29LV640D/Am29LV641D/Am29LV642D"
+#~ msgstr "Am29LV640D/Am29LV641D/Am29LV642D"
+
+#~ msgid "Am29LV800B"
+#~ msgstr "Am29LV800B"
+
+#, fuzzy
+#~ msgid "MX29LV160B"
+#~ msgstr "Am29LV800B"
+
+#, fuzzy
+#~ msgid "AM29LV160DB"
+#~ msgstr "Am29LV800B"
+
+#, fuzzy
+#~ msgid "Am29LV065D"
+#~ msgstr "Am29LV800B"
+
+#, fuzzy
+#~ msgid "Am29C040B\t-\t"
+#~ msgstr "Am29LV800B"
+
+#, fuzzy
+#~ msgid "Am29LV040B\t-\t"
+#~ msgstr "Am29LV800B"
+
+#~ msgid "Error during file read.\n"
+#~ msgstr "ERREUR durant la lecture du fichier.\n"
+
+#, fuzzy
+#~ msgid "Disconnecting %s\n"
+#~ msgstr "Déconnexion de %s du port ppdev %s\n"
+
+#, fuzzy
+#~ msgid "Disconnecting %s from FTDI device %s\n"
+#~ msgstr "Déconnexion de %s du port ppdev %s\n"
+
+#, fuzzy
+#~ msgid "Initializing %s on FTDI device %s\n"
+#~ msgstr "Initialisation de %s sur le port ppdev %s\n"
+
+#, fuzzy
+#~ msgid "Initializing on FTDI device %s\n"
+#~ msgstr "Initialisation de %s sur le port ppdev %s\n"
+
+#, fuzzy
+#~ msgid "Disconnecting %s, device %s\n"
+#~ msgstr "Déconnexion de %s du port ppdev %s\n"
+
+#, fuzzy
+#~ msgid "Initializing %s, device %s\n"
+#~ msgstr "Initialisation de %s sur le port ppdev %s\n"
+
+#, fuzzy
+#~ msgid "Initializing device %s\n"
+#~ msgstr "Initialisation de %s sur le port ppdev %s\n"
+
+#~ msgid ""
+#~ "Usage: %s FILENAME\n"
+#~ "Run command sequence from external FILENAME from the repository.\n"
+#~ "\n"
+#~ "FILENAME Name of the file with commands\n"
+#~ msgstr ""
+#~ "Usage: %s FICHIER\n"
+#~ "Exécuter une séquence de commandes à partir du FICHIER du dépôt externe.\n"
+#~ "\n"
+#~ "FICHIER nom du fichier contenant les commandes\n"
+
+#~ msgid "supported: AMD 29LV160; 1x8 Bit"
+#~ msgstr "supportés: AMD 29LV160; 1x8 Bit"
+
+#~ msgid "Unknown connection type: %s\n"
+#~ msgstr "Type de connexion inconnue: %s\n"
+
+#~ msgid ""
+#~ "Usage: %s PORTADDR CABLE\n"
+#~ "Usage: %s DEV CABLE\n"
+#~ "Select JTAG cable connected to parallel port.\n"
+#~ "\n"
+#~ "PORTADDR parallel port address (e.g. 0x378)\n"
+#~ "CABLE cable type\n"
+#~ "DEV ppdev device (e.g. /dev/parport0)\n"
+#~ "\n"
+#~ "List of supported cables:\n"
+#~ "%-13s No cable connected\n"
+#~ msgstr ""
+#~ "Usage: %s ADDR_PORT CABLE\n"
+#~ "Usage: %s PÉRIPHÉRIQUE CABLE\n"
+#~ "Sélectionner le cable JTAG connecté au port parallèle.\n"
+#~ "\n"
+#~ "ADDR_PORT adresse du port parallèle (i.e. 0x378)\n"
+#~ "CABLE type de cable\n"
+#~ "PÉR PÉRiphérique (i.e. /dev/parport0)\n"
+#~ "\n"
+#~ "Lists des cables supportés:\n"
+#~ "%-13s Aucun cable connecté\n"
+
+#~ msgid "Note: Supported configuration is 2 x 16 bit or 1 x 16 bit only\n"
+#~ msgstr ""
+#~ "Note: configuration supportés sont 2 x 16 bits ou 1 x 16 bits seulement\n"
+
+#~ msgid "Changed cable to 'none'\n"
+#~ msgstr "Cable changé pour 'aucun'\n"
--- /dev/null
+# Kinyarwanda translations for jtag package.
+# Copyright (C) 2005 Free Software Foundation, Inc.
+# This file is distributed under the same license as the jtag package.
+# Steve Murphy <murf@e-tools.com>, 2005.
+# Steve performed initial rough translation from compendium built from translations provided by the following translators:
+# Philibert Ndandali <ndandali@yahoo.fr>, 2005.
+# Viateur MUGENZI <muvia1@yahoo.fr>, 2005.
+# Noëlla Mupole <s24211045@tuks.co.za>, 2005.
+# Carole Karema <karemacarole@hotmail.com>, 2005.
+# JEAN BAPTISTE NGENDAHAYO <ngenda_denis@yahoo.co.uk>, 2005.
+# Augustin KIBERWA <akiberwa@yahoo.co.uk>, 2005.
+# Donatien NSENGIYUMVA <ndonatienuk@yahoo.co.uk>, 2005.
+# Antoine Bigirimana <antoine@e-tools.com>, 2005.
+#
+msgid ""
+msgstr ""
+"Project-Id-Version: jtag 0.5.1\n"
+"Report-Msgid-Bugs-To: marcel@telka.sk\n"
+"POT-Creation-Date: 2009-05-28 14:35+0200\n"
+"PO-Revision-Date: 2005-04-04 10:55-0700\n"
+"Last-Translator: Steven Michael Murphy <murf@e-tools.com>\n"
+"Language-Team: Kinyarwanda <translation-team-rw@lists.sourceforge.net>\n"
+"MIME-Version: 1.0\n"
+"Content-Type: text/plain; charset=UTF-8\n"
+"Content-Transfer-Encoding: 8bit\n"
+
+#: src/apps/jtag/jtag.c:372
+#, c-format
+msgid "'%s' must not be run suid root!\n"
+msgstr ""
+
+# #-#-#-#-# dbaccess.pot (PACKAGE VERSION) #-#-#-#-#
+# #-#-#-#-# dbaccess.pot (PACKAGE VERSION) #-#-#-#-#
+# #-#-#-#-# dbaccess.pot (PACKAGE VERSION) #-#-#-#-#
+#: src/apps/jtag/jtag.c:431
+#, fuzzy, c-format
+msgid "%s #%s\n"
+msgstr "%-13s%s"
+
+#: src/apps/jtag/jtag.c:434
+#, c-format
+msgid "Usage: %s [OPTIONS] [FILE [FILE ... ]] \n"
+msgstr ""
+
+#: src/apps/jtag/jtag.c:437
+#, c-format
+msgid " -h, --help display this help and exit\n"
+msgstr ""
+
+#: src/apps/jtag/jtag.c:438
+#, c-format
+msgid " -v, --version display version information and exit\n"
+msgstr ""
+
+#: src/apps/jtag/jtag.c:440
+#, c-format
+msgid " -n, --norc disable reading ~/.jtag/rc on startup\n"
+msgstr ""
+
+#: src/apps/jtag/jtag.c:441
+#, c-format
+msgid " -i, --interactive enter interactive mode after reading files\n"
+msgstr ""
+
+#: src/apps/jtag/jtag.c:442
+#, c-format
+msgid " -q, --quiet Do not print help on startup\n"
+msgstr ""
+
+#: src/apps/jtag/jtag.c:444
+#, c-format
+msgid " [FILE] file containing commands to execute\n"
+msgstr ""
+
+#: src/apps/jtag/jtag.c:447
+#, c-format
+msgid " Please report bugs at http://www.urjtag.org\n"
+msgstr ""
+
+#: src/apps/jtag/jtag.c:454
+#, c-format
+msgid ""
+"\n"
+"%s #%s\n"
+"\n"
+"Copyright (C) 2002, 2003 ETC s.r.o.\n"
+"Copyright (C) 2007, 2008, 2009 Kolja Waschk and the respective authors\n"
+msgstr ""
+
+#: src/apps/jtag/jtag.c:459
+#, c-format
+msgid ""
+"\n"
+"This program is free software; you can redistribute it and/or modify\n"
+"it under the terms of the GNU General Public License as published by\n"
+"the Free Software Foundation; either version 2 of the License, or\n"
+"(at your option) any later version.\n"
+"\n"
+"This program is distributed in the hope that it will be useful,\n"
+"but WITHOUT ANY WARRANTY; without even the implied warranty of\n"
+"MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the\n"
+"GNU General Public License for more details.\n"
+"\n"
+"You should have received a copy of the GNU General Public License\n"
+"along with this program; if not, write to the Free Software\n"
+"Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA\n"
+msgstr ""
+
+#: src/apps/jtag/jtag.c:485 src/apps/jtag/jtag.c:508 src/apps/jtag/jtag.c:531
+#, fuzzy, c-format
+msgid "Out of memory\n"
+msgstr "Bya"
+
+#: src/apps/jtag/jtag.c:493
+#, fuzzy, c-format
+msgid "Unable to open file `%s'!\n"
+msgstr "Kuri Gufungura IDOSIYE"
+
+#: src/apps/jtag/jtag.c:520
+#, fuzzy, c-format
+msgid ""
+"\n"
+"%s #%s\n"
+"Copyright (C) 2002, 2003 ETC s.r.o.\n"
+"Copyright (C) 2007, 2008, 2009 Kolja Waschk and the respective authors\n"
+"\n"
+"%s is free software, covered by the GNU General Public License, and you are\n"
+"welcome to change it and/or distribute copies of it under certain "
+"conditions.\n"
+"There is absolutely no warranty for %s.\n"
+"\n"
+msgstr "%sR. o."
+
+#: src/apps/jtag/jtag.c:537
+#, fuzzy, c-format
+msgid "%s may damage your hardware!\n"
+msgstr "Gicurasi Kuvamo Kuri Gusohoka"
+
+#: src/apps/jtag/jtag.c:539
+#, fuzzy
+msgid ""
+"Type \"quit\" to exit, \"help\" for help.\n"
+"\n"
+msgstr "Ifashayobora kugirango Ifashayobora"
+
+#: bsdl_bison.y:268
+msgid "Unsupported BSDL construct found"
+msgstr ""
+
+#: bsdl_bison.y:331
+msgid "Error in Instruction_Opcode attribute statement"
+msgstr ""
+
+#: bsdl_bison.y:344
+msgid "Multiple opcode patterns are not supported, first pattern will be used"
+msgstr ""
+
+#: bsdl_bison.y:375
+msgid "Error in Opcode List"
+msgstr ""
+
+#: bsdl_bison.y:461
+msgid "Error in Boundary Cell description"
+msgstr ""
+
+#: bsdl_bison.y:586
+#, fuzzy
+msgid "Error in ISC_Pin_Behavior Definition"
+msgstr "Icyabitswe Uburebure"
+
+#: bsdl_bison.y:598
+#, fuzzy
+msgid "Error in ISC_Fixed_System_Pins Definition"
+msgstr "Icyabitswe Uburebure"
+
+#: bsdl_bison.y:625
+#, fuzzy
+msgid "Error in ISC_Security Definition"
+msgstr "Icyabitswe Uburebure"
+
+#: bsdl_bison.y:659
+#, fuzzy
+msgid "Error in ISC_Flow Definition"
+msgstr "Icyabitswe Uburebure"
+
+#: bsdl_bison.y:823
+#, fuzzy
+msgid "Error in ISC_Procedure Definition"
+msgstr "Icyabitswe Uburebure"
+
+#: bsdl_bison.y:847
+#, fuzzy
+msgid "Error in ISC_Action Definition"
+msgstr "Icyabitswe Uburebure"
+
+#: bsdl_bison.y:890 bsdl_bison.y:904 vhdl_bison.y:674
+#, c-format
+msgid "Line %d, %s.\n"
+msgstr ""
+
+#: src/bsdl/bsdl.c:117
+#, c-format
+msgid "Reading file '%s'\n"
+msgstr ""
+
+#: src/bsdl/bsdl.c:138
+#, c-format
+msgid "BSDL file '%s' passed VHDL stage correctly\n"
+msgstr ""
+
+#: src/bsdl/bsdl.c:145
+#, c-format
+msgid "BSDL file '%s' passed BSDL stage correctly\n"
+msgstr ""
+
+#: src/bsdl/bsdl.c:152
+#, c-format
+msgid "BSDL file '%s' contains errors in VHDL stage, stopping\n"
+msgstr ""
+
+#: src/bsdl/bsdl.c:293 src/tap/detect.c:372
+#, fuzzy, c-format
+msgid " Filename: %s\n"
+msgstr "Izina ry'idosiye:"
+
+#: src/bsdl/bsdl.c:305
+#, fuzzy, c-format
+msgid "Cannot open directory %s\n"
+msgstr "Gufungura"
+
+#: src/bsdl/bsdl_sem.c:204
+msgid "No IDCODE specification found.\n"
+msgstr ""
+
+#: src/bsdl/bsdl_sem.c:649
+msgid "IDCODE matched\n"
+msgstr ""
+
+#: src/bsdl/bsdl_sem.c:651
+msgid "IDCODE mismatch\n"
+msgstr ""
+
+#: src/bsdl/bsdl_sem.c:699
+msgid "BSDL stage reported errors, aborting.\n"
+msgstr ""
+
+#: src/bsdl/bsdl_sem.c:706
+#, c-format
+msgid "Got IDCODE: %s\n"
+msgstr ""
+
+#: vhdl_bison.y:231
+msgid "Improper Entity declaration"
+msgstr ""
+
+#: vhdl_bison.y:232
+msgid "Check if source file is BSDL"
+msgstr ""
+
+#: vhdl_bison.y:242 vhdl_bison.y:250
+#, fuzzy
+msgid "Syntax Error"
+msgstr "Ikosa ry'imyandikire"
+
+#: vhdl_bison.y:260
+msgid "Improper Port declaration"
+msgstr ""
+
+#: vhdl_bison.y:292
+#, fuzzy
+msgid "Error in Package declaration(s)"
+msgstr "Icyabitswe Uburebure"
+
+#: vhdl_bison.y:317
+#, fuzzy
+msgid "Error in Standard Package"
+msgstr "Icyabitswe Uburebure"
+
+#: vhdl_bison.y:335
+#, fuzzy
+msgid "Error in Standard Declarations"
+msgstr "Icyabitswe Uburebure"
+
+#: vhdl_bison.y:346
+#, fuzzy
+msgid "Error in Attribute type identification"
+msgstr "Icyabitswe Uburebure"
+
+#: vhdl_bison.y:362
+#, fuzzy
+msgid "Error in Type definition"
+msgstr "Icyabitswe Uburebure"
+
+#: vhdl_bison.y:378
+#, fuzzy
+msgid "Error in Bit definition"
+msgstr "Icyabitswe Uburebure"
+
+#: vhdl_bison.y:389
+#, fuzzy
+msgid "Error in Record Definition"
+msgstr "Icyabitswe Uburebure"
+
+#: vhdl_bison.y:402
+#, fuzzy
+msgid "Error in defered constant"
+msgstr "Icyabitswe Uburebure"
+
+#: vhdl_bison.y:414
+#, fuzzy
+msgid "Error in Package Body definition"
+msgstr "Icyabitswe Uburebure"
+
+#: vhdl_bison.y:426
+#, fuzzy
+msgid "Error in Cell Constant definition"
+msgstr "Icyabitswe Uburebure"
+
+#: vhdl_bison.y:437
+#, fuzzy
+msgid "Error in Cell Data Record"
+msgstr "Ukwihuza Byanze"
+
+#: vhdl_bison.y:446
+#, fuzzy
+msgid "Error in Cell_Type Function field"
+msgstr "Ukwihuza Byanze"
+
+#: vhdl_bison.y:453
+#, fuzzy
+msgid "Error in BScan_Inst Instruction field"
+msgstr "Ukwihuza Byanze"
+
+#: vhdl_bison.y:460
+#, fuzzy
+msgid "Error in Constant CAP data source field"
+msgstr "Icyabitswe Uburebure"
+
+#: vhdl_bison.y:484
+#, fuzzy
+msgid "Error in User-Defined Package declarations"
+msgstr "Icyabitswe Uburebure"
+
+#: vhdl_bison.y:491
+msgid "Unknown VHDL statement"
+msgstr ""
+
+#: vhdl_bison.y:514
+#, fuzzy
+msgid "Error in Attribute specification"
+msgstr "Icyabitswe Uburebure"
+
+#: vhdl_bison.y:669
+#, c-format
+msgid "In Package %s, Line %d, %s.\n"
+msgstr ""
+
+#: vhdl_bison.y:687
+msgid "Too many errors"
+msgstr ""
+
+#: src/bus/au1500.c:124
+#, fuzzy, c-format
+msgid "AU1500 compatible bus driver via BSR (JTAG part No. %d)\n"
+msgstr "Musomyi: Biturutse"
+
+#: src/bus/au1500.c:301
+msgid "AU1500 BUS Driver via BSR"
+msgstr ""
+
+# #-#-#-#-# dbaccess.pot (PACKAGE VERSION) #-#-#-#-#
+# #-#-#-#-# dbaccess.pot (PACKAGE VERSION) #-#-#-#-#
+# #-#-#-#-# dbaccess.pot (PACKAGE VERSION) #-#-#-#-#
+#: src/bus/avr32.c:153
+#, fuzzy, c-format
+msgid "%s: instr=%s\n"
+msgstr "%-13s%s"
+
+# #-#-#-#-# dbaccess.pot (PACKAGE VERSION) #-#-#-#-#
+# #-#-#-#-# dbaccess.pot (PACKAGE VERSION) #-#-#-#-#
+# #-#-#-#-# dbaccess.pot (PACKAGE VERSION) #-#-#-#-#
+#: src/bus/avr32.c:158
+#, fuzzy, c-format
+msgid "%s: ret=%s\n"
+msgstr "%-13s%s"
+
+# #-#-#-#-# dbaccess.pot (PACKAGE VERSION) #-#-#-#-#
+# #-#-#-#-# dbaccess.pot (PACKAGE VERSION) #-#-#-#-#
+# #-#-#-#-# dbaccess.pot (PACKAGE VERSION) #-#-#-#-#
+#: src/bus/avr32.c:172
+#, fuzzy, c-format
+msgid "%s: data=%s\n"
+msgstr "%-13s%s"
+
+#: src/bus/avr32.c:175
+#, c-format
+msgid "%s: data out=%s\n"
+msgstr ""
+
+#: src/bus/avr32.c:196
+#, c-format
+msgid "%s: slave=%01x, addr=%08lx, %s\n"
+msgstr ""
+
+# #-#-#-#-# dbaccess.pot (PACKAGE VERSION) #-#-#-#-#
+# #-#-#-#-# dbaccess.pot (PACKAGE VERSION) #-#-#-#-#
+# #-#-#-#-# dbaccess.pot (PACKAGE VERSION) #-#-#-#-#
+#: src/bus/avr32.c:222 src/bus/avr32.c:248 src/bus/avr32.c:322
+#: src/bus/avr32.c:334
+#, fuzzy, c-format
+msgid "%s: data=%08lx\n"
+msgstr "%-13s%s"
+
+#: src/bus/avr32.c:292
+#, fuzzy, c-format
+msgid "%s: addr=%08lx, mode=%s\n"
+msgstr "Aderesi"
+
+#: src/bus/avr32.c:383
+#, fuzzy, c-format
+msgid "%s: read status %08lx\n"
+msgstr "%s:Leta"
+
+#: src/bus/avr32.c:417
+#, fuzzy, c-format
+msgid "%s: status=%08lx\n"
+msgstr "%s:Leta"
+
+#: src/bus/avr32.c:613
+#, fuzzy, c-format
+msgid "AVR32 multi-mode bus driver (JTAG part No. %d)\n"
+msgstr "Musomyi: Biturutse"
+
+#: src/bus/avr32.c:695
+#, fuzzy, c-format
+msgid "%s:addr=%08lx\n"
+msgstr "Aderesi"
+
+#: src/bus/avr32.c:806
+msgid ""
+"Atmel AVR32 multi-mode bus driver, requires <mode> parameter\n"
+" valid <mode> parameters:\n"
+" x8: 8 bit bus for the uncached HSB area, via OCD registers\n"
+" x16: 16 bit bus for the uncached HSB area, via OCD "
+"registers\n"
+" x32: 32 bit bus for the uncached HSB area, via OCD "
+"registers\n"
+" OCD : 32 bit bus for the OCD registers\n"
+" HSBC: 32 bit bus for the cached HSB area, via SAB\n"
+" HSBU: 32 bit bus for the uncached HSB area, via SAB"
+msgstr ""
+
+#: src/bus/bcm1250.c:115
+#, fuzzy, c-format
+msgid "Broadcom BCM1250 compatible bus driver via BSR (JTAG part No. %d)\n"
+msgstr "Musomyi: Biturutse"
+
+#: src/bus/bcm1250.c:525
+#, fuzzy
+msgid "Broadcom BCM1250 compatible bus driver via BSR"
+msgstr "Musomyi: Biturutse"
+
+#: src/bus/bf533_ezkit.c:139
+#, fuzzy, c-format
+msgid "Blackfin BF533 EZKit compatible bus driver via BSR (JTAG part No. %d)\n"
+msgstr "Musomyi: Biturutse"
+
+#: src/bus/bf533_ezkit.c:324
+msgid "Blackfin BF533 EZKit board bus driver"
+msgstr ""
+
+#: src/bus/bf533_stamp.c:145
+#, fuzzy, c-format
+msgid "Blackfin BF533 compatible bus driver via BSR (JTAG part No. %d)\n"
+msgstr "Musomyi: Biturutse"
+
+#: src/bus/bf533_stamp.c:332
+msgid "Blackfin BF533 Stamp board bus driver"
+msgstr ""
+
+#: src/bus/bf537_stamp.c:315 src/bus/pxa2x0.c:251
+#, fuzzy, c-format
+msgid "%s (JTAG part No. %d)\n"
+msgstr "Musomyi: Biturutse"
+
+#: src/bus/bf537_stamp.c:335
+#, fuzzy
+msgid "Blackfin BF537 Stamp board bus driver via BSR"
+msgstr "Musomyi: Biturutse"
+
+#: src/bus/bf537_stamp.c:345
+#, fuzzy
+msgid "Blackfin BF537 EZ-KIT board bus driver via BSR"
+msgstr "Musomyi: Biturutse"
+
+#: src/bus/bf537_stamp.c:355
+#, fuzzy
+msgid "Blackfin BF527 EZ-KIT board bus driver via BSR"
+msgstr "Musomyi: Biturutse"
+
+#: src/bus/bf537_stamp.c:365
+#, fuzzy
+msgid "Blackfin BF538F EZ-KIT board bus driver"
+msgstr "Musomyi: Biturutse"
+
+#: src/bus/bf537_stamp.c:375
+#, fuzzy
+msgid "Blackfin BF526 EZ-KIT board bus driver"
+msgstr "Musomyi: Biturutse"
+
+#: src/bus/bf548_ezkit.c:140
+#, fuzzy, c-format
+msgid ""
+"Blackfin BF548 EZ-KIT compatible bus driver via BSR (JTAG part No. %d)\n"
+msgstr "Musomyi: Biturutse"
+
+#: src/bus/bf548_ezkit.c:314
+msgid "Blackfin BF548 EZ-KIT board bus driver"
+msgstr ""
+
+#: src/bus/bf561_ezkit.c:145
+#, fuzzy, c-format
+msgid ""
+"Blackfin BF561 EZ-KIT compatible bus driver via BSR (JTAG part No. %d)\n"
+msgstr "Musomyi: Biturutse"
+
+#: src/bus/bf561_ezkit.c:337
+msgid "Blackfin BF561 EZ-KIT board bus driver"
+msgstr ""
+
+#: src/bus/bscoach.c:137
+#, fuzzy, c-format
+msgid ""
+"Goepel electronic Boundary Scan Coach compatible bus driver via BSR (JTAG "
+"part No. %d)\n"
+msgstr "Musomyi: Biturutse"
+
+#: src/bus/bscoach.c:378
+msgid ""
+"Goepel Boundary Scan Coach compatible bus driver for flash programming via "
+"BSR"
+msgstr ""
+
+#: src/bus/buses.c:182 src/bus/buses.c:219
+#, c-format
+msgid "realloc(%s,%zd) fails"
+msgstr ""
+
+#: src/bus/buses.c:242
+#, fuzzy
+msgid "invalid bus number"
+msgstr "%s:Sibyo"
+
+#: src/bus/buses.c:284
+#, fuzzy, c-format
+msgid "Initialized bus %d, active bus %d\n"
+msgstr "gutangiza Musomyi: kugirango Gikora"
+
+#: src/bus/ejtag.c:137
+#, fuzzy, c-format
+msgid "EJTAG compatible bus driver via PrAcc (JTAG part No. %d)\n"
+msgstr "Musomyi: Biturutse"
+
+#: src/bus/ejtag.c:168
+msgid "EJADDRESS, EJDATA or EJCONTROL register not found"
+msgstr ""
+
+#: src/bus/ejtag.c:189
+#, c-format
+msgid "Reset occurred, ctrl=%s"
+msgstr ""
+
+#: src/bus/ejtag.c:196
+#, c-format
+msgid "No processor access, ctrl=%s"
+msgstr ""
+
+#: src/bus/ejtag.c:210
+#, c-format
+msgid "PrAcc bad alignment: addr=0x%08lx"
+msgstr ""
+
+#: src/bus/ejtag.c:225
+#, c-format
+msgid "%s(%d) PrAcc write: addr=0x%08lx data=0x%08lx\n"
+msgstr ""
+
+#: src/bus/ejtag.c:236
+#, c-format
+msgid "Unknown write addr=0x%08lx data=0x%08lx"
+msgstr ""
+
+#: src/bus/ejtag.c:297
+msgid "EJCONTROL or EJIMPCODE register not found"
+msgstr ""
+
+#: src/bus/ejtag.c:546
+#, c-format
+msgid "Failed to enter debug mode, ctrl=%s"
+msgstr ""
+
+#: src/bus/ejtag.c:761
+#, fuzzy
+msgid "EJTAG compatible bus driver via PrAcc"
+msgstr "Musomyi: Biturutse"
+
+#: src/bus/fjmem.c:108 src/part/part.c:348
+#, fuzzy
+msgid "invalid instruction length"
+msgstr "Sibyo"
+
+#: src/bus/fjmem.c:397
+msgid "Parameter for instruction opcode missing"
+msgstr ""
+
+#: src/bus/fjmem.c:475
+#, fuzzy, c-format
+msgid "fjmem FPGA bus driver via USER register (JTAG part No. %d)\n"
+msgstr "Musomyi: Biturutse"
+
+#: src/bus/fjmem.c:610 src/bus/fjmem.c:645 src/bus/fjmem.c:680
+#: src/bus/fjmem.c:716 src/bus/jopcyc.c:557 src/bus/jopcyc.c:596
+#: src/bus/jopcyc.c:628 src/bus/jopcyc.c:662 src/bus/zefant-xs3.c:707
+#: src/bus/zefant-xs3.c:780 src/bus/zefant-xs3.c:831 src/bus/zefant-xs3.c:887
+msgid "Address out of range"
+msgstr ""
+
+#: src/bus/fjmem.c:733
+msgid ""
+"FPGA JTAG memory bus driver via USER register, requires parameters:\n"
+" opcode=<USERx OPCODE> [len=<FJMEM REG LEN>]"
+msgstr ""
+
+#: src/bus/ixp425.c:117
+#, fuzzy, c-format
+msgid "Intel IXP425 compatible bus driver via BSR (JTAG part No. %d)\n"
+msgstr "Musomyi: Biturutse"
+
+#: src/bus/ixp425.c:290
+#, fuzzy
+msgid "Intel IXP425 compatible bus driver via BSR"
+msgstr "Musomyi: Biturutse"
+
+#: src/bus/jopcyc.c:344
+#, fuzzy, c-format
+msgid ""
+"JOP.design Cyclone Board compatible bus driver via BSR (JTAG part No. %d)\n"
+msgstr "Musomyi: Biturutse"
+
+#: src/bus/jopcyc.c:694
+#, fuzzy
+msgid "JOP.design Cyclone Board compatible bus driver via BSR"
+msgstr "Musomyi: Biturutse"
+
+#: src/bus/lh7a400.c:139
+#, fuzzy, c-format
+msgid "Sharp LH7A400 compatible bus driver via BSR (JTAG part No. %d)\n"
+msgstr "Musomyi: Biturutse"
+
+#: src/bus/lh7a400.c:327
+#, fuzzy
+msgid "Sharp LH7A400 compatible bus driver via BSR (flash access only!)"
+msgstr "Musomyi: Biturutse"
+
+#: src/bus/mpc5200.c:157
+#, fuzzy, c-format
+msgid "Freescale MPC5200 compatible bus driver via BSR (JTAG part No. %d)\n"
+msgstr "Musomyi: Biturutse"
+
+#: src/bus/mpc5200.c:172
+msgid "LocalPlus Bus"
+msgstr ""
+
+#: src/bus/mpc5200.c:401
+#, fuzzy
+msgid "Freescale MPC5200 compatible bus driver via BSR, parameter: [mux]"
+msgstr "Musomyi: Biturutse"
+
+#: src/bus/mpc824x.c:112
+msgid ""
+" Bus width 64 exists in mpc824x, but not supported by UrJTAG currently"
+msgstr ""
+
+#: src/bus/mpc824x.c:117
+msgid " Only 8,32 and 64 bus width are supported for Banks 0 and 1"
+msgstr ""
+
+#: src/bus/mpc824x.c:129
+msgid ""
+"Usage: initbus mpc824x [width=WIDTH] [revbits] [dbgAddr] [dbgData]\n"
+"\n"
+" WIDTH data bus width - 8, 32, 64 (default 8)\n"
+" revbits reverse bits in data bus (default - no)\n"
+" dbgAddr display address bus state (default - no)\n"
+" dbgData display data bus state (default - no)\n"
+msgstr ""
+
+#: src/bus/mpc824x.c:155
+#, c-format
+msgid " Using default bus width %d\n"
+msgstr ""
+
+#: src/bus/mpc824x.c:244
+#, fuzzy, c-format
+msgid "Motorola MPC824x compatible bus driver via BSR (JTAG part No. %d)\n"
+msgstr "Musomyi: Biturutse"
+
+#: src/bus/mpc824x.c:268
+msgid "Base ROM Interface (Bank 1)"
+msgstr ""
+
+#: src/bus/mpc824x.c:278 src/bus/mpc824x.c:297
+msgid "Base ROM Interface (Bank 0)"
+msgstr ""
+
+#: src/bus/mpc824x.c:327
+#, c-format
+msgid "Warning: unhandled bus width: %i"
+msgstr ""
+
+#: src/bus/mpc824x.c:350
+#, c-format
+msgid "Addr [%2d:0]: %06lX "
+msgstr ""
+
+#: src/bus/mpc824x.c:400
+#, c-format
+msgid "Data WR [%d:0]: %08lX "
+msgstr ""
+
+#: src/bus/mpc824x.c:446
+#, c-format
+msgid "Data RD [%d:0]: %08lX "
+msgstr ""
+
+#: src/bus/mpc824x.c:566
+#, fuzzy
+msgid "Motorola MPC824x compatible bus driver via BSR"
+msgstr "Musomyi: Biturutse"
+
+#: src/bus/ppc405ep.c:113
+#, fuzzy, c-format
+msgid "IBM PowerPC 405EP compatible bus driver via BSR (JTAG part No. %d)\n"
+msgstr "Musomyi: Biturutse"
+
+#: src/bus/ppc405ep.c:267
+#, fuzzy
+msgid "IBM PowerPC 405EP compatible bus driver via BSR"
+msgstr "Musomyi: Biturutse"
+
+#: src/bus/ppc440gx_ebc8.c:113
+#, fuzzy, c-format
+msgid ""
+"IBM PowerPC 440GX 8-bit compatible bus driver via BSR (JTAG part No. %d)\n"
+msgstr "Musomyi: Biturutse"
+
+#: src/bus/ppc440gx_ebc8.c:271
+#, fuzzy
+msgid "IBM PowerPC 440GX 8-bit EBC compatible bus driver via BSR"
+msgstr "Musomyi: Biturutse"
+
+#: src/bus/prototype.c:133
+#, c-format
+msgid "value %lu not defined for parameter %s"
+msgstr ""
+
+#: src/bus/prototype.c:166 src/cmd/cmd_get.c:71 src/cmd/cmd_set.c:98
+#: src/cmd/cmd_test.c:75
+#, fuzzy, c-format
+msgid "signal '%s' not found"
+msgstr "OYA"
+
+#: src/bus/prototype.c:210
+#, c-format
+msgid "parameter %s is unknown"
+msgstr ""
+
+#: src/bus/prototype.c:254
+msgid "parameters alsb=<signal> and/or amsb=<signal> are not defined"
+msgstr ""
+
+#: src/bus/prototype.c:314
+msgid "parameters dlsb=<signal> and/or dmsb=<signal> are not defined\n"
+msgstr ""
+
+#: src/bus/prototype.c:321
+msgid "parameter cs=<signal> or ncs=<signal> is not defined\n"
+msgstr ""
+
+#: src/bus/prototype.c:328
+msgid "parameter oe=<signal> or noe=<signal> is not defined\n"
+msgstr ""
+
+#: src/bus/prototype.c:335
+msgid "parameter we=<signal> or nwe=<signal> is not defined\n"
+msgstr ""
+
+#: src/bus/prototype.c:361
+#, fuzzy, c-format
+msgid "Configurable prototype bus driver via BSR (JTAG part No. %d)\n"
+msgstr "Musomyi: Biturutse"
+
+#: src/bus/prototype.c:517
+msgid ""
+"Configurable prototype bus driver via BSR, requires parameters:\n"
+" amsb=<addr MSB> alsb=<addr LSB> dmsb=<data MSB> dlsb=<data LSB>\n"
+" ncs=<CS#>|cs=<CS> noe=<OE#>|oe=<OE> nwe=<WE#>|we=<WE> [amode=auto|"
+"x8|x16|x32]"
+msgstr ""
+
+#: src/bus/pxa2x0.c:322 src/bus/pxa2x0.c:421
+#, fuzzy
+msgid "Static Chip Select 0"
+msgstr "0"
+
+#: src/bus/pxa2x0.c:392
+msgid "Memory Mapped registers (Memory Ctl)"
+msgstr ""
+
+#: src/bus/pxa2x0.c:496
+msgid "PXA270 internal address space (cfg, SRAM)"
+msgstr ""
+
+#: src/bus/pxa2x0.c:516
+msgid "PXA270 SDRAM space (4x 64MB)"
+msgstr ""
+
+#: src/bus/pxa2x0.c:756
+#, fuzzy
+msgid "Intel PXA2x0 compatible bus driver via BSR"
+msgstr "Musomyi: Biturutse"
+
+#: src/bus/pxa2x0.c:772
+#, fuzzy
+msgid "Intel PXA27x compatible bus driver via BSR"
+msgstr "Musomyi: Biturutse"
+
+#: src/bus/readmem.c:55 src/bus/writemem.c:49
+#, fuzzy
+msgid "Missing bus driver"
+msgstr "Musomyi:"
+
+#: src/bus/readmem.c:68 src/bus/writemem.c:62
+#, fuzzy
+msgid "Unknown bus width"
+msgstr "Ubugari"
+
+#: src/bus/readmem.c:81 src/bus/writemem.c:75
+#, fuzzy, c-format
+msgid "address: 0x%08lX\n"
+msgstr "Aderesi"
+
+#: src/bus/readmem.c:83 src/bus/writemem.c:77
+#, fuzzy, c-format
+msgid "length: 0x%08lX\n"
+msgstr "Uburebure"
+
+#: src/bus/readmem.c:88 src/bus/writemem.c:82
+#, fuzzy
+msgid "length is 0"
+msgstr "Uburebure ni 0"
+
+#: src/bus/readmem.c:94
+msgid "reading:\n"
+msgstr ""
+
+#: src/bus/readmem.c:120 src/bus/writemem.c:98
+#, fuzzy, c-format
+msgid "addr: 0x%08llX\r"
+msgstr "Aderesi"
+
+#: src/bus/readmem.c:133 src/bus/writemem.c:144 src/flash/flash.c:258
+#, fuzzy
+msgid ""
+"\n"
+"Done.\n"
+msgstr "Byakozwe."
+
+#: src/bus/s3c4510x.c:179
+#, fuzzy, c-format
+msgid ""
+"Samsung S3C4510B compatibile bus driver via BSR (JTAG part No. %d) RCS0=%"
+"ubit\n"
+msgstr "Musomyi: Biturutse"
+
+#: src/bus/s3c4510x.c:427
+#, fuzzy
+msgid "Samsung S3C4510B compatible bus driver via BSR"
+msgstr "Musomyi: Biturutse"
+
+#: src/bus/sa1110.c:124
+#, fuzzy, c-format
+msgid "Intel SA-1110 compatible bus driver via BSR (JTAG part No. %d)\n"
+msgstr "Musomyi: Biturutse"
+
+#: src/bus/sa1110.c:307
+#, fuzzy
+msgid "Intel SA-1110 compatible bus driver via BSR"
+msgstr "Musomyi: Biturutse"
+
+#: src/bus/sh7727.c:135
+#, fuzzy, c-format
+msgid "Hitachi SH7727 compatible bus driver via BSR (JTAG part No. %d)\n"
+msgstr "Musomyi: Biturutse"
+
+#: src/bus/sh7727.c:347
+#, fuzzy
+msgid "Hitachi SH7727 compatible bus driver via BSR"
+msgstr "Musomyi: Biturutse"
+
+#: src/bus/sh7750r.c:133
+#, fuzzy, c-format
+msgid "Hitachi SH7750R compatible bus driver via BSR (JTAG part No. %d)\n"
+msgstr "Musomyi: Biturutse"
+
+#: src/bus/sh7750r.c:328
+#, fuzzy
+msgid "Hitachi SH7750R compatible bus driver via BSR"
+msgstr "Musomyi: Biturutse"
+
+#: src/bus/sh7751r.c:127
+#, fuzzy, c-format
+msgid "Hitachi SH7751R compatible bus driver via BSR (JTAG part No. %d)\n"
+msgstr "Musomyi: Biturutse"
+
+#: src/bus/sh7751r.c:316
+#, fuzzy
+msgid "Hitachi SH7751R compatible bus driver via BSR"
+msgstr "Musomyi: Biturutse"
+
+#: src/bus/sharc21065l.c:121
+#, fuzzy, c-format
+msgid ""
+"Analog Device's SHARC 21065L compatible bus driver via BSR (JTAG part No. %"
+"d)\n"
+msgstr "Musomyi: Biturutse"
+
+#: src/bus/sharc21065l.c:135
+msgid "Boot Memory Select"
+msgstr ""
+
+#: src/bus/sharc21065l.c:316
+#, fuzzy
+msgid "SHARC_21065L compatible bus driver via BSR"
+msgstr "Musomyi: Biturutse"
+
+#: src/bus/slsup3.c:169
+#, fuzzy, c-format
+msgid "SLS UP3 bus driver via BSR (JTAG part No. %d)\n"
+msgstr "Musomyi: Biturutse"
+
+#: src/bus/slsup3.c:181
+msgid "Flash Memory (2 MByte) byte mode"
+msgstr ""
+
+#: src/bus/slsup3.c:191
+msgid "SRAM 128KByte (64K x 16)"
+msgstr ""
+
+#: src/bus/slsup3.c:201
+msgid "LCD Display (RS select by A0)"
+msgstr ""
+
+#: src/bus/slsup3.c:440
+#, fuzzy
+msgid "SLS UP3 compatible bus driver via BSR"
+msgstr "Musomyi: Biturutse"
+
+#: src/bus/tx4925.c:137
+#, fuzzy, c-format
+msgid "Toshiba TX4925 compatible bus driver via BSR (JTAG part No. %d)\n"
+msgstr "Musomyi: Biturutse"
+
+#: src/bus/tx4925.c:311
+#, fuzzy
+msgid "Toshiba TX4925 compatible bus driver via BSR"
+msgstr "Musomyi: Biturutse"
+
+#: src/bus/writemem.c:88
+msgid "writing:\n"
+msgstr ""
+
+#: src/bus/writemem.c:103
+#, c-format
+msgid "Short read: bc=0x%zX\n"
+msgstr ""
+
+#: src/bus/writemem.c:110
+#, fuzzy, c-format
+msgid "Unexpected end of file; Addr: 0x%08llX\n"
+msgstr "Impera Bya"
+
+#: src/bus/zefant-xs3.c:419
+#, fuzzy, c-format
+msgid ""
+"Simple Solutions Zefant-XS3 Board compatible bus driver via BSR (JTAG part "
+"No. %d)\n"
+msgstr "Musomyi: Biturutse"
+
+#: src/bus/zefant-xs3.c:756 src/bus/zefant-xs3.c:806 src/bus/zefant-xs3.c:864
+#: src/bus/zefant-xs3.c:981
+#, fuzzy
+msgid "Component type not supported"
+msgstr "OYA"
+
+#: src/bus/zefant-xs3.c:988
+#, fuzzy
+msgid "Simple Solutions Zefant-XS3 Board compatible bus driver via BSR"
+msgstr "Musomyi: Biturutse"
+
+#: src/cmd/cmd_bit.c:88
+#, fuzzy, c-format
+msgid "%s: unable to get boundary bit number for command '%s'"
+msgstr "Sibyo"
+
+#: src/cmd/cmd_bit.c:97
+#, fuzzy, c-format
+msgid "%s: invalid bit type length for command '%s'"
+msgstr "Umurabyo Sibyo Komandi:"
+
+#: src/cmd/cmd_bit.c:125
+#, fuzzy, c-format
+msgid "%s: invalid bit type for command '%s'"
+msgstr "Umurabyo Sibyo Komandi:"
+
+#: src/cmd/cmd_bit.c:134
+#, fuzzy, c-format
+msgid "%s: invalid default value length for command '%s'"
+msgstr "Umurabyo Sibyo Komandi:"
+
+#: src/cmd/cmd_bit.c:149
+#, fuzzy, c-format
+msgid "%s: invalid default value '%s' for command '%s'"
+msgstr "Umurabyo Sibyo Komandi:"
+
+#: src/cmd/cmd_bit.c:167
+#, fuzzy, c-format
+msgid "%s: unable to get control bit number for command '%s'"
+msgstr "Sibyo Igenzura"
+
+#: src/cmd/cmd_bit.c:175
+#, fuzzy, c-format
+msgid "%s: invalid control value length for command '%s'"
+msgstr "Sibyo Igenzura"
+
+#: src/cmd/cmd_bit.c:200
+#, fuzzy, c-format
+msgid ""
+"Usage: %s NUMBER TYPE DEFAULT SIGNAL [CBIT CVAL CSTATE]\n"
+"Define new BSR (Boundary Scan Register) bit for SIGNAL, with\n"
+"DEFAULT value.\n"
+"\n"
+"NUMBER Bit number in the BSR\n"
+"TYPE Bit type, valid values are I, O, B, C, and X\n"
+"DEFAULT Default (safe) bit value, valid values are 1, 0, ?\n"
+"SIGNAL Associated signal name\n"
+"CBIT Control bit number\n"
+"CVAL Control value\n"
+"CSTATE Control state, valid state is only Z\n"
+msgstr ""
+"Gishya kugirango Agaciro Umubare in i Ubwoko Byemewe Uduciro C Na Agaciro "
+"Byemewe Uduciro 1. 0 Leta Byemewe Leta ni"
+
+#: src/cmd/cmd_bit.c:216
+#, fuzzy
+msgid "define new BSR bit"
+msgstr "Kugaragaza... Gishya"
+
+#: src/cmd/cmd_bsdl.c:124
+#, c-format
+msgid ""
+"Usage: %s path PATHLIST\n"
+"Usage: %s test [FILE]\n"
+"Usage: %s dump [FILE]\n"
+"Usage: %s debug on|off\n"
+"Manage BSDL files\n"
+"\n"
+"PATHLIST semicolon separated list of directory paths to search for BSDL "
+"files\n"
+"FILE file containing part description in BSDL format\n"
+msgstr ""
+
+#: src/cmd/cmd_bsdl.c:137
+msgid "manage BSDL files"
+msgstr ""
+
+#: src/cmd/cmd_bus.c:71
+#, fuzzy, c-format
+msgid ""
+"Usage: %s BUS\n"
+"Change active bus.\n"
+"\n"
+"BUS bus number\n"
+msgstr "Gikora"
+
+#: src/cmd/cmd_bus.c:79
+#, fuzzy
+msgid "change active bus"
+msgstr "Guhindura>> Gikora"
+
+#: src/cmd/cmd_cable.c:98
+#, fuzzy, c-format
+msgid "Unknown cable type: '%s'"
+msgstr "Ukwihuza Ubwoko"
+
+#: src/cmd/cmd_cable.c:167
+#, c-format
+msgid ""
+"Usage: %s DRIVER [DRIVER_OPTS]\n"
+"Select JTAG cable type.\n"
+"\n"
+"DRIVER name of cable\n"
+"DRIVER_OPTS options for the selected cable\n"
+"\n"
+"Type \"cable DRIVER help\" for info about options for cable DRIVER.\n"
+"\n"
+"List of supported cables:\n"
+msgstr ""
+
+# #-#-#-#-# dbaccess.pot (PACKAGE VERSION) #-#-#-#-#
+# #-#-#-#-# dbaccess.pot (PACKAGE VERSION) #-#-#-#-#
+# #-#-#-#-# dbaccess.pot (PACKAGE VERSION) #-#-#-#-#
+#: src/cmd/cmd_cable.c:179 src/cmd/cmd_help.c:53
+#, fuzzy, c-format
+msgid "%-13s %s\n"
+msgstr "%-13s%s"
+
+#: src/cmd/cmd_cable.c:185
+#, fuzzy
+msgid "select JTAG cable"
+msgstr "Guhitamo"
+
+#: src/cmd/cmd_cmd.c:164
+#, fuzzy, c-format
+msgid "%s: Ambiguous command\n"
+msgstr "%s:Kitazwi"
+
+#: src/cmd/cmd_cmd.c:167 src/cmd/cmd_help.c:70
+#, fuzzy, c-format
+msgid "%s: unknown command\n"
+msgstr "%s:Kitazwi"
+
+#: src/cmd/cmd_debug.c:86
+#, c-format
+msgid "Current log level is '%s'\n"
+msgstr ""
+
+#: src/cmd/cmd_debug.c:117
+#, c-format
+msgid ""
+"Usage: %s LEVEL\n"
+"Set logging/debugging level.\n"
+"\n"
+"LEVEL:\n"
+"all every single bit as it is transmitted\n"
+"comm low level communication details\n"
+"debug more details of interest for developers\n"
+"detail verbose output\n"
+"normal just noteworthy info\n"
+"warning unmissable warnings\n"
+"error only fatal errors\n"
+"silent suppress logging output\n"
+msgstr ""
+
+#: src/cmd/cmd_debug.c:133
+msgid "set logging/debugging level"
+msgstr ""
+
+#: src/cmd/cmd_detect.c:62
+#, fuzzy, c-format
+msgid ""
+"Usage: %s\n"
+"Detect parts on the JTAG chain.\n"
+"\n"
+"Output from this command is a list of the detected parts.\n"
+"If no parts are detected other commands may not work properly.\n"
+msgstr ""
+"ku i Bivuye iyi Komandi: ni a Urutonde Bya i Oya Ikindi Amabwiriza Gicurasi "
+"OYA Akazi"
+
+#: src/cmd/cmd_detect.c:72
+#, fuzzy
+msgid "detect parts on the JTAG chain"
+msgstr "ku i"
+
+#: src/cmd/cmd_detectflash.c:52 src/cmd/cmd_peekpoke.c:57
+#: src/cmd/cmd_peekpoke.c:139 src/cmd/cmd_readmem.c:57
+#: src/cmd/cmd_writemem.c:55
+msgid "Bus missing"
+msgstr ""
+
+#: src/cmd/cmd_detectflash.c:66
+#, fuzzy, c-format
+msgid ""
+"Usage: %s ADDRESS\n"
+"Detect flash memory type connected to a part.\n"
+"\n"
+"ADDRESS Base address for memory region\n"
+msgstr "Umurabyo Ububiko Ubwoko Kuri a"
+
+#: src/cmd/cmd_detectflash.c:75
+#, fuzzy
+msgid "detect parameters of flash chips attached to a part"
+msgstr "Ibigenga Bya Umurabyo Kuri a"
+
+#: src/cmd/cmd_discovery.c:57
+#, fuzzy, c-format
+msgid ""
+"Usage: %s\n"
+"Discovery of unknown parts in the JTAG chain.\n"
+"\n"
+"'%s' attempts to detect these parameters of an unknown JTAG\n"
+"chain:\n"
+" 1. IR (instruction register) length\n"
+" 2. DR (data register) length for all possible instructions\n"
+"\n"
+"Warning: This may be dangerous for some parts (especially if the\n"
+"part doesn't have TRST signal).\n"
+msgstr ""
+"Bya Kitazwi in i Kuri Ibigenga Bya Kitazwi 1. Kwiyandikisha 2. Ibyatanzwe "
+"Kwiyandikisha Uburebure kugirango Byose Gicurasi kugirango NIBA"
+
+#: src/cmd/cmd_discovery.c:72
+#, fuzzy
+msgid "discovery of unknown parts in the JTAG chain"
+msgstr "Bya Kitazwi in i"
+
+#: src/cmd/cmd_dr.c:69
+#, fuzzy, c-format
+msgid "%s: part without active instruction"
+msgstr "%s:Gikora"
+
+#: src/cmd/cmd_dr.c:76
+#, fuzzy, c-format
+msgid "%s: instruction without active data register"
+msgstr "%s:Gikora Ibyatanzwe"
+
+#: src/cmd/cmd_dr.c:101
+#, c-format
+msgid "%s: register length %d mismatch: %zd"
+msgstr ""
+
+# basctl/source\basicide\basidesh.src:RID_IMGBTN_REMOVEWATCH.text
+#: src/cmd/cmd_dr.c:118
+#, fuzzy, c-format
+msgid "%s\n"
+msgstr "%s"
+
+#: src/cmd/cmd_dr.c:127
+#, fuzzy, c-format
+msgid ""
+"Usage: %s [DIR]\n"
+"Usage: %s BITSTRING\n"
+"Display input or output data register content or set current register.\n"
+"\n"
+"DIR requested data register; possible values: 'in' for\n"
+" input and 'out' for output; default is 'out'\n"
+"BITSTRING set current data register with BITSTRING (e.g. 01010)\n"
+msgstr ""
+"Iyinjiza Cyangwa Ibisohoka Ibyatanzwe Kwiyandikisha Ibikubiyemo Ibyatanzwe "
+"Kwiyandikisha Uduciro Iyinjiza Na kugirango Ibisohoka Mburabuzi ni"
+
+#: src/cmd/cmd_dr.c:139
+#, fuzzy
+msgid "display active data register for a part"
+msgstr "Kugaragaza Gikora Ibyatanzwe Kwiyandikisha kugirango a"
+
+#: src/cmd/cmd_endian.c:52
+#, fuzzy
+msgid "Endianess for external files: big\n"
+msgstr "kugirango external Idosiye"
+
+#: src/cmd/cmd_endian.c:55
+#, fuzzy
+msgid "Endianess for external files: little\n"
+msgstr "kugirango external Idosiye"
+
+#: src/cmd/cmd_endian.c:79
+#, fuzzy, c-format
+msgid ""
+"Usage: %s\n"
+"Set or print endianess for external files.\n"
+msgstr "Cyangwa Gucapa kugirango external Idosiye"
+
+#: src/cmd/cmd_endian.c:86
+#, fuzzy
+msgid "set/print endianess"
+msgstr "Gushyiraho Gucapa"
+
+#: src/cmd/cmd_eraseflash.c:57 src/cmd/cmd_flashmem.c:60
+#: src/cmd/cmd_peekpoke.c:62 src/cmd/cmd_peekpoke.c:144
+#, fuzzy
+msgid "Bus driver missing"
+msgstr "Musomyi: Ibuze"
+
+#: src/cmd/cmd_eraseflash.c:74
+#, fuzzy, c-format
+msgid ""
+"Usage: %s ADDR BLOCKS\n"
+"Erase flash memory from ADDR.\n"
+"\n"
+"ADDR target addres for erasing block\n"
+"BLOCKS number of blocks to erase\n"
+"\n"
+"ADDR and BLOCKS could be in decimal or hexadecimal (prefixed with 0x) form.\n"
+"\n"
+"Supported Flash Memories:\n"
+msgstr ""
+"Umurabyo Ububiko Bivuye Intego kugirango Umubare Bya Kuri Na in NYACUMI "
+"Cyangwa Na: Ifishi"
+
+# #-#-#-#-# dbaccess.pot (PACKAGE VERSION) #-#-#-#-#
+# #-#-#-#-# dbaccess.pot (PACKAGE VERSION) #-#-#-#-#
+# #-#-#-#-# dbaccess.pot (PACKAGE VERSION) #-#-#-#-#
+#: src/cmd/cmd_eraseflash.c:86 src/cmd/cmd_flashmem.c:112
+#, fuzzy, c-format
+msgid ""
+"%s\n"
+" %s\n"
+msgstr "%s%s"
+
+#: src/cmd/cmd_eraseflash.c:92
+#, fuzzy
+msgid "erase flash memory by number of blocks"
+msgstr "Umurabyo Ububiko ku Umubare Bya"
+
+#: src/cmd/cmd_flashmem.c:76 src/cmd/cmd_writemem.c:66
+#, fuzzy, c-format
+msgid "Unable to open file `%s'"
+msgstr "Kuri Gufungura IDOSIYE"
+
+#: src/cmd/cmd_flashmem.c:96
+#, fuzzy, c-format
+msgid ""
+"Usage: %s ADDR FILENAME [noverify]\n"
+"Usage: %s FILENAME [noverify]\n"
+"Program FILENAME content to flash memory.\n"
+"\n"
+"ADDR target address for raw binary image\n"
+"FILENAME name of the input file\n"
+"%-10s FILENAME is in MS .bin format (for WinCE)\n"
+"%-10s if specified, verification is skipped\n"
+"\n"
+"ADDR could be in decimal or hexadecimal (prefixed with 0x) form.\n"
+"\n"
+"Supported Flash Memories:\n"
+msgstr ""
+"Ibikubiyemo Kuri Umurabyo Ububiko Intego Aderesi kugirango Nyabibiri Izina: "
+"Bya i Iyinjiza ni in Imiterere kugirango in NYACUMI Cyangwa Na: Ifishi"
+
+#: src/cmd/cmd_flashmem.c:118
+#, fuzzy
+msgid "burn flash memory with data from a file"
+msgstr "Umurabyo Ububiko Na: Ibyatanzwe Bivuye a IDOSIYE"
+
+#: src/cmd/cmd_frequency.c:55
+#, fuzzy, c-format
+msgid "Current TCK frequency is %lu Hz\n"
+msgstr "Ubwisubire ni"
+
+#: src/cmd/cmd_frequency.c:63
+#, fuzzy, c-format
+msgid "Setting TCK frequency to %lu Hz\n"
+msgstr "Ubwisubire Kuri"
+
+#: src/cmd/cmd_frequency.c:74
+#, fuzzy, c-format
+msgid ""
+"Usage: %s [FREQ]\n"
+"Change TCK frequency to FREQ or print current TCK frequency.\n"
+"\n"
+"FREQ is in hertz. It's a maximum TCK frequency for JTAG interface.\n"
+"In some cases the TCK frequency is less than FREQ, but the frequency\n"
+"is never more than FREQ. Maximum supported frequency depends on JTAG\n"
+"adapter.\n"
+"\n"
+"FREQ must be an unsigned integer. Minimum allowed frequency is 1 Hz.\n"
+"Use 0 for FREQ to disable frequency limit.\n"
+msgstr ""
+"Ubwisubire Kuri Cyangwa Gucapa KIGEZWEHO Ubwisubire ni in a Kinini "
+"Ubwisubire kugirango i Ubwisubire ni Birutwa i Nta narimwe Birenzeho "
+"Ubwisubire ku Bitashizweho umukono Umubare wuzuye Ubwisubire ni 1. 0 "
+"kugirango Kuri Ubwisubire"
+
+#: src/cmd/cmd_frequency.c:89
+#, fuzzy
+msgid "setup JTAG frequency"
+msgstr "Imikorere Ubwisubire"
+
+# desktop/source\app\ssodlg.src:DLG_SSOLOGIN.text
+#: src/cmd/cmd_get.c:79
+#, fuzzy, c-format
+msgid "%s = %d\n"
+msgstr "%s=%d"
+
+#: src/cmd/cmd_get.c:88
+#, fuzzy, c-format
+msgid ""
+"Usage: %s signal SIGNAL\n"
+"Get signal state from output BSR (Boundary Scan Register).\n"
+"\n"
+"SIGNAL signal name (from JTAG declaration file)\n"
+msgstr "Leta Bivuye Ibisohoka Izina: Bivuye IDOSIYE"
+
+#: src/cmd/cmd_get.c:97
+#, fuzzy
+msgid "get external signal value"
+msgstr "Kubona external Agaciro"
+
+#: src/cmd/cmd_help.c:51
+#, fuzzy
+msgid ""
+"Command list:\n"
+"\n"
+msgstr "Urutonde"
+
+#: src/cmd/cmd_help.c:55
+#, fuzzy
+msgid "(no description available)"
+msgstr "(Oya Isobanuramiterere Bihari"
+
+#: src/cmd/cmd_help.c:57
+#, fuzzy
+msgid ""
+"\n"
+"Type \"help COMMAND\" for details about a particular command.\n"
+msgstr "Ifashayobora kugirango Birambuye Ibyerekeye a Komandi:"
+
+#: src/cmd/cmd_help.c:79
+#, fuzzy, c-format
+msgid ""
+"Usage: %s [COMMAND]\n"
+"Print short help for COMMAND, or list of available commands.\n"
+msgstr "Ifashayobora kugirango Cyangwa Urutonde Bya Bihari Amabwiriza"
+
+#: src/cmd/cmd_help.c:86
+#, fuzzy
+msgid "display this help"
+msgstr "Kugaragaza iyi Ifashayobora"
+
+#: src/cmd/cmd_idcode.c:55
+#, c-format
+msgid "Reading %lu bytes of idcode\n"
+msgstr ""
+
+#: src/cmd/cmd_idcode.c:63
+#, c-format
+msgid ""
+"Usage: %s [BYTES]\n"
+"Read [BYTES] IDCODEs of all parts in a JTAG chain.\n"
+"\n"
+"BYTES must be an unsigned integer, and the default is 0.\n"
+"If BYTES is 0, IDCODEs will be read until 32 consecutive zeros are found.\n"
+msgstr ""
+
+#: src/cmd/cmd_idcode.c:73
+#, fuzzy
+msgid "Read IDCODEs of all parts in a JTAG chain"
+msgstr "Bya Kitazwi in i"
+
+#: src/cmd/cmd_include.c:58
+msgid "Please use the 'include' command instead of 'script'\n"
+msgstr ""
+
+#: src/cmd/cmd_include.c:82
+#, fuzzy, c-format
+msgid ""
+"Usage: %s FILENAME [n] \n"
+"Run command sequence n times from external FILENAME.\n"
+"\n"
+"FILENAME Name of the file with commands\n"
+msgstr "Komandi: Bivuye external Bya i IDOSIYE Na:"
+
+#: src/cmd/cmd_include.c:102
+#, fuzzy
+msgid "include command sequence from external repository"
+msgstr "Gushyiramo Komandi: Bivuye external"
+
+#: src/cmd/cmd_include.c:121
+#, fuzzy
+msgid "run command sequence from external file"
+msgstr "Gukoresha Komandi: Bivuye external IDOSIYE"
+
+#: src/cmd/cmd_initbus.c:66
+#, fuzzy, c-format
+msgid "Unknown bus: %s"
+msgstr "Ubugari"
+
+#: src/cmd/cmd_initbus.c:96
+#, fuzzy, c-format
+msgid ""
+"Usage: %s BUSNAME\n"
+"Initialize new bus driver for active part.\n"
+"\n"
+"BUSNAME Name of the bus\n"
+"\n"
+"List of available buses:\n"
+msgstr "Gishya Musomyi: kugirango Gikora Bya i Bya Bihari"
+
+# #-#-#-#-# dbaccess.pot (PACKAGE VERSION) #-#-#-#-#
+# #-#-#-#-# dbaccess.pot (PACKAGE VERSION) #-#-#-#-#
+# #-#-#-#-# dbaccess.pot (PACKAGE VERSION) #-#-#-#-#
+#: src/cmd/cmd_initbus.c:105
+#, fuzzy, c-format
+msgid "%-10s %s\n"
+msgstr "%-10s%s"
+
+#: src/cmd/cmd_initbus.c:111
+#, fuzzy
+msgid "initialize bus driver for active part"
+msgstr "gutangiza Musomyi: kugirango Gikora"
+
+#: src/cmd/cmd_instruction.c:60
+#, fuzzy, c-format
+msgid "%s: unknown instruction '%s'"
+msgstr "%s:Kitazwi"
+
+#: src/cmd/cmd_instruction.c:101
+#, fuzzy, c-format
+msgid ""
+"Usage: %s INSTRUCTION\n"
+"Usage: %s length LENGTH\n"
+"Usage: %s INSTRUCTION CODE REGISTER\n"
+"Change active INSTRUCTION for a part or declare new instruction.\n"
+"\n"
+"INSTRUCTION instruction name (e.g. BYPASS)\n"
+"LENGTH common instruction length\n"
+"CODE instruction code (e.g. 11111)\n"
+"REGISTER default data register for instruction (e.g. BR)\n"
+msgstr "g. g. g."
+
+#: src/cmd/cmd_instruction.c:115
+#, fuzzy
+msgid "change active instruction for a part or declare new instruction"
+msgstr "Guhindura>> Gikora kugirango a Cyangwa Gishya"
+
+#: src/cmd/cmd_part.c:119
+#, fuzzy, c-format
+msgid "%s: invalid part number %lu, max %d"
+msgstr "%s:Sibyo"
+
+#: src/cmd/cmd_part.c:136
+#, fuzzy, c-format
+msgid ""
+"Usage: %s PART\n"
+"Change active part for current JTAG chain.\n"
+"\n"
+"PART part number | alias\n"
+msgstr "Gikora kugirango KIGEZWEHO"
+
+#: src/cmd/cmd_part.c:144
+#, fuzzy
+msgid "change active part for current JTAG chain"
+msgstr "Guhindura>> Gikora kugirango KIGEZWEHO"
+
+#: src/cmd/cmd_peekpoke.c:80
+#, c-format
+msgid "URJ_BUS_READ(0x%08lx) = 0x%02lX (%li)\n"
+msgstr ""
+
+#: src/cmd/cmd_peekpoke.c:86
+#, c-format
+msgid "URJ_BUS_READ(0x%08lx) = 0x%04lX (%li)\n"
+msgstr ""
+
+#: src/cmd/cmd_peekpoke.c:91
+#, c-format
+msgid "URJ_BUS_READ(0x%08lx) = 0x%08lX (%li)\n"
+msgstr ""
+
+#: src/cmd/cmd_peekpoke.c:104
+#, fuzzy, c-format
+msgid ""
+"Usage: %s ADDR\n"
+"Read a single word (bus width size).\n"
+"\n"
+"ADDR address to read from\n"
+"\n"
+"ADDR could be in decimal or hexadecimal (prefixed with 0x) form.\n"
+"\n"
+msgstr ""
+"a UMWE ijambo Ubugari Ingano Aderesi Kuri Gusoma in NYACUMI Cyangwa Na: "
+"Ifishi"
+
+#: src/cmd/cmd_peekpoke.c:116
+#, fuzzy
+msgid "read a single word"
+msgstr "Gusoma a UMWE ijambo"
+
+#: src/cmd/cmd_peekpoke.c:167
+#, fuzzy, c-format
+msgid ""
+"Usage: %s ADDR VAL [ADDR VAL] ... \n"
+"Write a single word (bus width size).\n"
+"\n"
+"ADDR address to write\n"
+"VAL value to write\n"
+"\n"
+"ADDR and VAL could be in decimal or hexadecimal (prefixed with 0x) form.\n"
+"\n"
+msgstr ""
+"a UMWE ijambo Ubugari Ingano Aderesi Kuri Agaciro Kuri Na in NYACUMI Cyangwa "
+"Na: Ifishi"
+
+#: src/cmd/cmd_peekpoke.c:180
+#, fuzzy
+msgid "write a single word"
+msgstr "Kwandika a UMWE ijambo"
+
+#: src/cmd/cmd_pod.c:105
+#, c-format
+msgid ""
+"Usage: %s SIGNAL=# [SIGNAL=# ...]\n"
+"Set state of POD signal(s) to 0 or 1.\n"
+"\n"
+"SIGNAL TCK,TMS, TDI, TRST, or RESET\n"
+"# 0 or 1\n"
+msgstr ""
+
+#: src/cmd/cmd_pod.c:115
+msgid "Set state of POD signal(s)"
+msgstr ""
+
+#: src/cmd/cmd_print.c:124
+#, fuzzy, c-format
+msgid " Active %%-%ds %%-%ds\n"
+msgstr "Oya"
+
+#: src/cmd/cmd_print.c:130 src/cmd/cmd_print.c:134 src/cmd/cmd_print.c:139
+#: src/cmd/cmd_print.c:173 src/cmd/cmd_print.c:178 src/cmd/cmd_print.c:184
+#, fuzzy, c-format
+msgid "(%d) String conversion failed!\n"
+msgstr "(%d)Ihindurangero Byanze"
+
+#: src/cmd/cmd_print.c:131 src/cmd/cmd_print.c:136 src/cmd/cmd_print.c:175
+#: src/cmd/cmd_print.c:181
+msgid "Instruction"
+msgstr ""
+
+#: src/cmd/cmd_print.c:131 src/cmd/cmd_print.c:136 src/cmd/cmd_print.c:175
+#: src/cmd/cmd_print.c:181
+msgid "Register"
+msgstr "Kwiyandikisha"
+
+#: src/cmd/cmd_print.c:147
+#, fuzzy, c-format
+msgid " %%c %%-%ds %%-%ds\n"
+msgstr "Oya"
+
+#: src/cmd/cmd_print.c:165
+#, fuzzy, c-format
+msgid " No. %%-%ds %%-%ds %%-%ds %%-%ds %%-%ds\n"
+msgstr "Oya"
+
+#: src/cmd/cmd_print.c:174 src/cmd/cmd_print.c:180
+msgid "Manufacturer"
+msgstr "Ukora mu nganda"
+
+#: src/cmd/cmd_print.c:174 src/cmd/cmd_print.c:180
+msgid "Part"
+msgstr ""
+
+#: src/cmd/cmd_print.c:175 src/cmd/cmd_print.c:181
+msgid "Stepping"
+msgstr ""
+
+# basctl/source\basicide\basidesh.src:RID_IMGBTN_REMOVEWATCH.text
+#: src/cmd/cmd_print.c:200
+#, fuzzy, c-format
+msgid " %3d %s "
+msgstr "%3d"
+
+# basctl/source\basicide\basidesh.src:RID_IMGBTN_REMOVEWATCH.text
+#: src/cmd/cmd_print.c:204 src/part/part.c:472
+#, fuzzy, c-format
+msgid " %3d "
+msgstr "%3d"
+
+#: src/cmd/cmd_print.c:218
+#, c-format
+msgid ""
+"\n"
+"Active bus:\n"
+"*%d: "
+msgstr ""
+
+#: src/cmd/cmd_print.c:228
+#, fuzzy, c-format
+msgid "Error in bus area discovery at 0x%08llX\n"
+msgstr "in Ubuso ku"
+
+#: src/cmd/cmd_print.c:236
+#, fuzzy, c-format
+msgid "\tstart: 0x%08lX, length: 0x%08llX, data width: %d bit, (%s)\n"
+msgstr "Gutangira Uburebure Ibyatanzwe Ubugari"
+
+#: src/cmd/cmd_print.c:242
+#, fuzzy, c-format
+msgid "\tstart: 0x%08lX, length: 0x%08llX, data width: %d bit\n"
+msgstr "Gutangira Uburebure Ibyatanzwe Ubugari"
+
+# desktop/source\app\ssodlg.src:DLG_SSOLOGIN.text
+#: src/cmd/cmd_print.c:262
+#, fuzzy, c-format
+msgid "*%d: "
+msgstr "*%d:"
+
+# #-#-#-#-# dbaccess.pot (PACKAGE VERSION) #-#-#-#-#
+# #-#-#-#-# dbaccess.pot (PACKAGE VERSION) #-#-#-#-#
+# #-#-#-#-# dbaccess.pot (PACKAGE VERSION) #-#-#-#-#
+#: src/cmd/cmd_print.c:264
+#, fuzzy, c-format
+msgid "%d: "
+msgstr "%d:"
+
+#: src/cmd/cmd_print.c:275
+#, fuzzy, c-format
+msgid ""
+"Usage: %s [chain|bus|signals|instructions]\n"
+"Display JTAG chain status.\n"
+"\n"
+"Display list of the parts connected to the JTAG chain including\n"
+"part number and current (active) instruction and data register.\n"
+msgstr ""
+"Imimerere Urutonde Bya i Kuri i Umubare Na KIGEZWEHO Gikora Na Ibyatanzwe "
+"Kwiyandikisha"
+
+#: src/cmd/cmd_print.c:285
+#, fuzzy
+msgid "display JTAG chain list/status"
+msgstr "Kugaragaza Urutonde Imimerere"
+
+#: src/cmd/cmd_quit.c:52
+#, fuzzy, c-format
+msgid ""
+"Usage: %s\n"
+"Exit from %s.\n"
+msgstr "Bivuye"
+
+#: src/cmd/cmd_quit.c:57
+#, fuzzy
+msgid "exit and terminate this session"
+msgstr "Gusohoka Na iyi Umukoro"
+
+#: src/cmd/cmd_readmem.c:68
+#, fuzzy, c-format
+msgid "Unable to create file `%s'"
+msgstr "Kuri Kurema IDOSIYE"
+
+#: src/cmd/cmd_readmem.c:81
+#, fuzzy, c-format
+msgid ""
+"Usage: %s ADDR LEN FILENAME\n"
+"Copy device memory content starting with ADDR to FILENAME file.\n"
+"\n"
+"ADDR start address of the copied memory area\n"
+"LEN copied memory length\n"
+"FILENAME name of the output file\n"
+"\n"
+"ADDR and LEN could be in decimal or hexadecimal (prefixed with 0x) form.\n"
+msgstr ""
+"APAREYE Ububiko Ibikubiyemo Na: Kuri IDOSIYE Gutangira Aderesi Bya i Ububiko "
+"Ububiko Izina: Bya i Ibisohoka Na in NYACUMI Cyangwa Na: Ifishi"
+
+#: src/cmd/cmd_readmem.c:94
+#, fuzzy
+msgid "read content of the memory and write it to file"
+msgstr "Gusoma Ibikubiyemo Bya i Ububiko Na Kwandika Kuri IDOSIYE"
+
+#: src/cmd/cmd_register.c:72
+#, fuzzy, c-format
+msgid ""
+"Usage: %s NAME LENGTH\n"
+"Define new data register with specified NAME and LENGTH.\n"
+"\n"
+"NAME Data register name\n"
+"LENGTH Data register length\n"
+msgstr "Gishya Ibyatanzwe Kwiyandikisha Na: Na Kwiyandikisha Kwiyandikisha"
+
+#: src/cmd/cmd_register.c:82
+#, fuzzy
+msgid "define new data register for a part"
+msgstr "Kugaragaza... Gishya Ibyatanzwe Kwiyandikisha kugirango a"
+
+#: src/cmd/cmd_reset.c:58
+#, fuzzy, c-format
+msgid ""
+"Usage: %s\n"
+"Reset current JTAG chain.\n"
+msgstr "Guhindura>> Gikora kugirango KIGEZWEHO"
+
+#: src/cmd/cmd_reset.c:63
+#, fuzzy
+msgid "reset JTAG chain"
+msgstr "Guhitamo"
+
+#: src/cmd/cmd_salias.c:70
+#, fuzzy, c-format
+msgid "Signal '%s' not found"
+msgstr "OYA"
+
+#: src/cmd/cmd_salias.c:89
+#, fuzzy, c-format
+msgid ""
+"Usage: %s ALIAS SIGNAL\n"
+"Define new signal ALIAS as alias for existing SIGNAL.\n"
+"\n"
+"ALIAS New signal alias name\n"
+"SIGNAL Existing signal name\n"
+msgstr "Gishya Na: Izina: kugirango a Bya kugirango a OYA"
+
+#: src/cmd/cmd_salias.c:99
+#, fuzzy
+msgid "define an alias for a signal"
+msgstr "Kugaragaza... Gishya kugirango a"
+
+#: src/cmd/cmd_scan.c:71 src/part/part.c:220 src/part/part.c:273
+#, fuzzy
+msgid "Boundary Scan Register (BSR) not found"
+msgstr "%s(%s:%d)OYA"
+
+#: src/cmd/cmd_scan.c:85
+msgid "Part can't SAMPLE"
+msgstr ""
+
+# desktop/source\app\ssodlg.src:DLG_SSOLOGIN.text
+#: src/cmd/cmd_scan.c:115
+#, fuzzy, c-format
+msgid ": %d > %d\n"
+msgstr "%s=%d"
+
+#: src/cmd/cmd_scan.c:129
+#, c-format
+msgid ""
+"Usage: %s [SIGNAL]* \n"
+"Read BSR and show changes since last scan.\n"
+msgstr ""
+
+#: src/cmd/cmd_scan.c:136
+msgid "read BSR and show changes since last scan"
+msgstr ""
+
+#: src/cmd/cmd_set.c:110
+#, fuzzy, c-format
+msgid ""
+"Usage: %s SIGNAL DIR [DATA]\n"
+"Set signal state in input BSR (Boundary Scan Register).\n"
+"\n"
+"SIGNAL signal name (from JTAG declaration file)\n"
+"DIR requested signal direction; possible values: 'in' or 'out'\n"
+"DATA desired output signal value ('0' or '1'); used only if DIR\n"
+" is 'out'\n"
+msgstr ""
+"Leta in Iyinjiza Izina: Bivuye IDOSIYE Icyerekezo Uduciro Cyangwa Ibisohoka "
+"Agaciro Cyangwa NIBA ni"
+
+#: src/cmd/cmd_set.c:122
+#, fuzzy
+msgid "set external signal value"
+msgstr "Gushyiraho external Agaciro"
+
+#: src/cmd/cmd_shell.c:91
+#, c-format
+msgid ""
+"Usage: %s cmmd\n"
+"Shell out to os for a command.\n"
+"\n"
+"CMMD OS Shell Command\n"
+msgstr ""
+
+#: src/cmd/cmd_shell.c:99
+msgid "shell cmmd"
+msgstr ""
+
+#: src/cmd/cmd_shift.c:74
+#, fuzzy, c-format
+msgid ""
+"Usage: %s\n"
+"Usage: %s\n"
+"Shift instruction or data register through JTAG chain.\n"
+msgstr "Cyangwa Ibyatanzwe Kwiyandikisha Gihinguranya"
+
+#: src/cmd/cmd_shift.c:82
+#, fuzzy
+msgid "shift data/instruction registers through JTAG chain"
+msgstr "Gusunika Ibyatanzwe Gihinguranya"
+
+#: src/cmd/cmd_signal.c:66 src/part/signal.c:114
+#, fuzzy, c-format
+msgid "Signal '%s' already defined"
+msgstr "Kwiyandikisha"
+
+#: src/cmd/cmd_signal.c:96
+#, fuzzy, c-format
+msgid ""
+"Usage: %s SIGNAL [PIN#]\n"
+"Define new signal with name SIGNAL for a part.\n"
+"\n"
+"SIGNAL New signal name\n"
+"PIN# List of pin # for a signal\n"
+msgstr "Gishya Na: Izina: kugirango a Bya kugirango a OYA"
+
+#: src/cmd/cmd_signal.c:106
+#, fuzzy
+msgid "define new signal for a part"
+msgstr "Kugaragaza... Gishya kugirango a"
+
+#: src/cmd/cmd_svf.c:103
+#, c-format
+msgid ""
+"Usage: %s FILE [stop] [progress] [ref_freq=<frequency>]\n"
+"Execute svf commands from FILE.\n"
+"stop : Command execution stops upon TDO mismatch.\n"
+"progress : Continually displays progress status.\n"
+"ref_freq : Use <frequency> as the reference for 'RUNTEST xxx SEC' commands\n"
+"\n"
+"FILE file containing SVF commands\n"
+msgstr ""
+
+#: src/cmd/cmd_svf.c:114
+msgid "execute svf commands from file"
+msgstr ""
+
+# desktop/source\app\ssodlg.src:DLG_SSOLOGIN.text
+#: src/cmd/cmd_test.c:93
+#, fuzzy, c-format
+msgid "<FAIL>%s = %d"
+msgstr "%s=%d"
+
+#: src/cmd/cmd_test.c:104
+#, fuzzy, c-format
+msgid ""
+"Usage: %s SIGNAL 0/1\n"
+"Test signal state from output BSR (Boundary Scan Register).\n"
+"\n"
+"SIGNAL signal name (from JTAG declaration file)\n"
+msgstr "Leta Bivuye Ibisohoka Izina: Bivuye IDOSIYE"
+
+#: src/cmd/cmd_test.c:113
+#, fuzzy
+msgid "test external signal value"
+msgstr "Kubona external Agaciro"
+
+#: src/cmd/cmd_usleep.c:63
+#, c-format
+msgid ""
+"Usage: %s USECS\n"
+"Sleep some number of microseconds.\n"
+msgstr ""
+
+#: src/cmd/cmd_usleep.c:70
+msgid "Sleep some number of microseconds"
+msgstr ""
+
+#: src/cmd/cmd_writemem.c:79
+#, fuzzy, c-format
+msgid ""
+"Usage: %s ADDR LEN FILENAME\n"
+"Write to device memory starting at ADDR the FILENAME file.\n"
+"\n"
+"ADDR start address of the written memory area\n"
+"LEN written memory length\n"
+"FILENAME name of the input file\n"
+"\n"
+"ADDR and LEN could be in decimal or hexadecimal (prefixed with 0x) form.\n"
+"NOTE: This is NOT useful for FLASH programming!\n"
+msgstr ""
+"APAREYE Ububiko Ibikubiyemo Na: Kuri IDOSIYE Gutangira Aderesi Bya i Ububiko "
+"Ububiko Izina: Bya i Ibisohoka Na in NYACUMI Cyangwa Na: Ifishi"
+
+#: src/cmd/cmd_writemem.c:93
+msgid "write content of file to the memory"
+msgstr ""
+
+#: src/flash/amd.c:311
+msgid ""
+"Chip: AMD Flash\n"
+"\tManufacturer: "
+msgstr ""
+
+#: src/flash/amd.c:316 src/flash/amd.c:345 src/flash/amd.c:361
+#: src/flash/amd.c:380 src/flash/amd.c:396 src/flash/amd_flash.c:266
+msgid ""
+"\n"
+"\tChip: "
+msgstr ""
+
+#: src/flash/amd.c:339 src/flash/amd.c:355 src/flash/amd.c:374
+#: src/flash/amd.c:390 src/flash/amd.c:403 src/flash/amd_flash.c:278
+#, c-format
+msgid "Unknown (ID 0x%04x)"
+msgstr ""
+
+#: src/flash/amd.c:408
+#, fuzzy, c-format
+msgid "Unknown manufacturer (ID 0x%04x) Chip (ID 0x%04x)"
+msgstr "Ukora mu nganda"
+
+# sc/source\ui\src\attrdlg.src:RID_SCPAGE_PROTECTION.BTN_PROTECTED.text
+#: src/flash/amd.c:412 src/flash/amd_flash.c:281
+#, fuzzy, c-format
+msgid ""
+"\n"
+"\tProtected: %04x\n"
+msgstr "Birinzwe"
+
+#: src/flash/amd.c:635 src/flash/amd.c:647 src/flash/amd.c:659
+#: src/flash/detectflash.c:117 src/flash/detectflash.c:149
+msgid "AMD/Fujitsu Standard Command Set"
+msgstr ""
+
+#: src/flash/amd.c:636
+msgid "supported: AMD 29LV640D, 29LV641D, 29LV642D; 2x16 Bit"
+msgstr ""
+
+#: src/flash/amd.c:648
+msgid "supported: AMD 29LV800B, S29GLxxxN; MX29LV640B, W19B320AT/B; 1x16 Bit"
+msgstr ""
+
+#: src/flash/amd.c:660
+msgid ""
+"supported: AMD 29LV160, AMD 29LV065D, AMD 29LV040B, S29GLxxxN, W19B320AT/B; "
+"1x8 Bit"
+msgstr ""
+
+#: src/flash/amd_flash.c:260
+msgid ""
+"Chip: AMD Flash\n"
+"\tPartNumber: "
+msgstr ""
+
+#: src/flash/amd_flash.c:263
+#, fuzzy, c-format
+msgid "Unknown manufacturer (ID 0x%04x)"
+msgstr "Ukora mu nganda"
+
+#: src/flash/amd_flash.c:271
+msgid "5V Flash\n"
+msgstr ""
+
+#: src/flash/amd_flash.c:275
+msgid "3V Flash\n"
+msgstr ""
+
+#: src/flash/amd_flash.c:414
+msgid "AMD Standard Command Set"
+msgstr ""
+
+#: src/flash/amd_flash.c:415
+msgid "supported: AMD 29LV040B, 29C040B, 1x8 Bit"
+msgstr ""
+
+#: src/flash/detectflash.c:65
+msgid "bus driver"
+msgstr ""
+
+#: src/flash/detectflash.c:97
+#, fuzzy
+msgid "Flash not found"
+msgstr "OYA Byabonetse"
+
+#: src/flash/detectflash.c:106
+#, fuzzy
+msgid "Query identification string:\n"
+msgstr "irangamimerere Ikurikiranyanyuguti"
+
+#: src/flash/detectflash.c:111 src/flash/detectflash.c:143
+#, fuzzy
+msgid "null"
+msgstr "NTAGIHARI"
+
+#: src/flash/detectflash.c:114 src/flash/detectflash.c:146
+msgid "Intel/Sharp Extended Command Set"
+msgstr ""
+
+#: src/flash/detectflash.c:120 src/flash/detectflash.c:152
+#: src/flash/intel.c:530 src/flash/intel.c:542 src/flash/intel.c:554
+msgid "Intel Standard Command Set"
+msgstr ""
+
+#: src/flash/detectflash.c:123 src/flash/detectflash.c:155
+msgid "AMD/Fujitsu Extended Command Set"
+msgstr ""
+
+#: src/flash/detectflash.c:126 src/flash/detectflash.c:158
+msgid "Mitsubishi Standard Command Set"
+msgstr ""
+
+#: src/flash/detectflash.c:129 src/flash/detectflash.c:161
+msgid "Mitsubishi Extended Command Set"
+msgstr ""
+
+#: src/flash/detectflash.c:132 src/flash/detectflash.c:164
+msgid "Page Write Command Set"
+msgstr ""
+
+# filter/source\xsltdialog\xmlfilterdialogstrings.src:STR_UNKNOWN_APPLICATION.text
+#: src/flash/detectflash.c:135 src/flash/detectflash.c:167
+#: src/flash/detectflash.c:225
+#, fuzzy
+msgid "unknown!!!"
+msgstr "Kitazwi"
+
+#: src/flash/detectflash.c:138
+#, fuzzy, c-format
+msgid ""
+"\tPrimary Algorithm Command Set and Control Interface ID Code: 0x%04X (%s)\n"
+msgstr "Na"
+
+#: src/flash/detectflash.c:170
+#, fuzzy, c-format
+msgid ""
+"\tAlternate Algorithm Command Set and Control Interface ID Code: 0x%04X (%"
+"s)\n"
+msgstr "Na"
+
+#: src/flash/detectflash.c:174
+#, fuzzy
+msgid "Query system interface information:\n"
+msgstr "Sisitemu Ibisobanuro"
+
+#: src/flash/detectflash.c:175
+#, fuzzy, c-format
+msgid "\tVcc Logic Supply Minimum Write/Erase or Write voltage: %d mV\n"
+msgstr "Cyangwa"
+
+#: src/flash/detectflash.c:177
+#, fuzzy, c-format
+msgid "\tVcc Logic Supply Maximum Write/Erase or Write voltage: %d mV\n"
+msgstr "Cyangwa"
+
+#: src/flash/detectflash.c:179
+#, c-format
+msgid "\tVpp [Programming] Supply Minimum Write/Erase voltage: %d mV\n"
+msgstr ""
+
+#: src/flash/detectflash.c:181
+#, c-format
+msgid "\tVpp [Programming] Supply Maximum Write/Erase voltage: %d mV\n"
+msgstr ""
+
+#: src/flash/detectflash.c:183
+#, fuzzy, c-format
+msgid "\tTypical timeout per single byte/word program: %d us\n"
+msgstr "Igihe cyarenze: UMWE Bayite ijambo Porogaramu"
+
+#: src/flash/detectflash.c:185
+#, fuzzy, c-format
+msgid "\tTypical timeout for maximum-size multi-byte program: %d us\n"
+msgstr "Igihe cyarenze: kugirango Kinini Ingano Bayite Porogaramu"
+
+#: src/flash/detectflash.c:187
+#, fuzzy, c-format
+msgid "\tTypical timeout per individual block erase: %d ms\n"
+msgstr "Igihe cyarenze: Funga"
+
+#: src/flash/detectflash.c:189
+#, fuzzy, c-format
+msgid "\tTypical timeout for full chip erase: %d ms\n"
+msgstr "Igihe cyarenze: kugirango"
+
+#: src/flash/detectflash.c:191
+#, fuzzy, c-format
+msgid "\tMaximum timeout for byte/word program: %d us\n"
+msgstr "Igihe cyarenze: kugirango Bayite ijambo Porogaramu"
+
+#: src/flash/detectflash.c:193
+#, fuzzy, c-format
+msgid "\tMaximum timeout for multi-byte program: %d us\n"
+msgstr "Igihe cyarenze: kugirango Bayite Porogaramu"
+
+#: src/flash/detectflash.c:195
+#, fuzzy, c-format
+msgid "\tMaximum timeout per individual block erase: %d ms\n"
+msgstr "Igihe cyarenze: Funga"
+
+#: src/flash/detectflash.c:197
+#, fuzzy, c-format
+msgid "\tMaximum timeout for chip erase: %d ms\n"
+msgstr "Igihe cyarenze: kugirango"
+
+#: src/flash/detectflash.c:201
+#, fuzzy
+msgid "Device geometry definition:\n"
+msgstr "Iyigamashusho Insobanuro"
+
+#: src/flash/detectflash.c:202
+#, c-format
+msgid "\tDevice Size: %d B (%d KiB, %d MiB)\n"
+msgstr ""
+
+#: src/flash/detectflash.c:210
+msgid "x8"
+msgstr ""
+
+#: src/flash/detectflash.c:213
+msgid "x16"
+msgstr ""
+
+#: src/flash/detectflash.c:216
+msgid "x8/x16"
+msgstr ""
+
+#: src/flash/detectflash.c:219
+msgid "x32"
+msgstr ""
+
+#: src/flash/detectflash.c:222
+msgid "x16/x32"
+msgstr ""
+
+#: src/flash/detectflash.c:228
+#, fuzzy, c-format
+msgid "\tFlash Device Interface Code description: 0x%04X (%s)\n"
+msgstr "Isobanuramiterere"
+
+#: src/flash/detectflash.c:230
+#, fuzzy, c-format
+msgid "\tMaximum number of bytes in multi-byte program: %d\n"
+msgstr "Umubare Bya Bayite in Bayite Porogaramu"
+
+#: src/flash/detectflash.c:232
+#, fuzzy, c-format
+msgid "\tNumber of Erase Block Regions within device: %d\n"
+msgstr "Bya muri APAREYE"
+
+#: src/flash/detectflash.c:234
+msgid "\tErase Block Region Information:\n"
+msgstr ""
+
+#: src/flash/detectflash.c:240
+#, c-format
+msgid "\t\tRegion %d:\n"
+msgstr ""
+
+#: src/flash/detectflash.c:241
+#, c-format
+msgid "\t\t\tErase Block Size: %d B (%d KiB)\n"
+msgstr ""
+
+#: src/flash/detectflash.c:246
+#, fuzzy, c-format
+msgid "\t\t\tNumber of Erase Blocks: %d\n"
+msgstr "Bya"
+
+#: src/flash/detectflash.c:260
+msgid "Required"
+msgstr ""
+
+#: src/flash/detectflash.c:260
+msgid "Not required"
+msgstr ""
+
+#: src/flash/detectflash.c:263
+msgid "Supported"
+msgstr ""
+
+#: src/flash/detectflash.c:263 src/flash/detectflash.c:277
+#: src/flash/detectflash.c:288
+#, fuzzy
+msgid "Not supported"
+msgstr "OYA"
+
+#: src/flash/detectflash.c:266
+msgid "170-nm Floating Gate technology"
+msgstr ""
+
+#: src/flash/detectflash.c:267
+msgid "230-nm MirrorBit(tm) technology"
+msgstr ""
+
+#: src/flash/detectflash.c:268
+msgid "130-nm Floating Gate technology"
+msgstr ""
+
+#: src/flash/detectflash.c:269
+msgid "110-nm MirrorBit(tm) technology"
+msgstr ""
+
+#: src/flash/detectflash.c:270
+msgid "90-nm Floating Gate technology"
+msgstr ""
+
+#: src/flash/detectflash.c:271
+msgid "90-nm MirrorBit(tm) technology"
+msgstr ""
+
+#: src/flash/detectflash.c:274
+msgid "CS49"
+msgstr ""
+
+#: src/flash/detectflash.c:274
+msgid "CS59"
+msgstr ""
+
+#: src/flash/detectflash.c:274
+msgid "CS99"
+msgstr ""
+
+#: src/flash/detectflash.c:277
+msgid "Read only"
+msgstr ""
+
+#: src/flash/detectflash.c:277
+msgid "Read/write"
+msgstr ""
+
+#: src/flash/detectflash.c:280
+msgid "29F040 mode"
+msgstr ""
+
+#: src/flash/detectflash.c:280
+msgid "29F016 mode"
+msgstr ""
+
+#: src/flash/detectflash.c:280
+msgid "29F400 mode"
+msgstr ""
+
+#: src/flash/detectflash.c:281
+msgid "29LV800 mode"
+msgstr ""
+
+#: src/flash/detectflash.c:282
+msgid "29BDS640 mode (Software Command Locking)"
+msgstr ""
+
+#: src/flash/detectflash.c:283
+msgid "29BDD160 mode (New Sector Protect)"
+msgstr ""
+
+#: src/flash/detectflash.c:284
+msgid "29PDL128 mode (New Sector Protect + 29LV800)"
+msgstr ""
+
+#: src/flash/detectflash.c:285
+msgid "Advanced Sector Protect"
+msgstr ""
+
+#: src/flash/detectflash.c:288
+msgid "4 word Page"
+msgstr ""
+
+#: src/flash/detectflash.c:288
+msgid "8 word Page"
+msgstr ""
+
+#: src/flash/detectflash.c:289
+msgid "16 word Page"
+msgstr ""
+
+#: src/flash/detectflash.c:293
+msgid "No boot"
+msgstr ""
+
+#: src/flash/detectflash.c:294
+msgid "8x8kb sectors at top and bottom with WP control"
+msgstr ""
+
+#: src/flash/detectflash.c:295
+msgid "Bottom boot device"
+msgstr ""
+
+#: src/flash/detectflash.c:295
+msgid "Top boot device"
+msgstr ""
+
+#: src/flash/detectflash.c:296
+msgid "Uniform bottom boot device"
+msgstr ""
+
+#: src/flash/detectflash.c:296
+msgid "Uniform top boot device"
+msgstr ""
+
+#: src/flash/detectflash.c:298
+msgid "Bad value"
+msgstr ""
+
+#: src/flash/detectflash.c:306
+msgid "Primary Vendor-Specific Extended Query:\n"
+msgstr ""
+
+#: src/flash/detectflash.c:307
+#, c-format
+msgid "\tMajor version number: %c\n"
+msgstr ""
+
+#: src/flash/detectflash.c:309
+#, c-format
+msgid "\tMinor version number: %c\n"
+msgstr ""
+
+#: src/flash/detectflash.c:316 src/flash/detectflash.c:320
+#, c-format
+msgid "\tAddress Sensitive Unlock: %s\n"
+msgstr ""
+
+#: src/flash/detectflash.c:327 src/flash/detectflash.c:332
+#: src/flash/detectflash.c:338 src/flash/detectflash.c:343
+#, c-format
+msgid "\tProcess Technology: %s\n"
+msgstr ""
+
+#: src/flash/detectflash.c:346
+#, c-format
+msgid "\tErase Suspend: %s\n"
+msgstr ""
+
+#: src/flash/detectflash.c:349
+#, fuzzy
+msgid "\tSector Protect: Not supported\n"
+msgstr "OYA"
+
+#: src/flash/detectflash.c:351
+#, c-format
+msgid "\tSector Protect: %d sectors per group\n"
+msgstr ""
+
+#: src/flash/detectflash.c:355 src/flash/detectflash.c:359
+#, c-format
+msgid "\tSector Temporary Unprotect: %s\n"
+msgstr ""
+
+#: src/flash/detectflash.c:363 src/flash/detectflash.c:367
+#, c-format
+msgid "\tSector Protect/Unprotect Scheme: %s\n"
+msgstr ""
+
+#: src/flash/detectflash.c:370
+#, fuzzy
+msgid "\tSimultaneous Operation: Not supported\n"
+msgstr "OYA"
+
+#: src/flash/detectflash.c:372
+#, c-format
+msgid "\tSimultaneous Operation: %d sectors\n"
+msgstr ""
+
+#: src/flash/detectflash.c:376 src/flash/detectflash.c:379
+#, c-format
+msgid "\tBurst Mode Type: %s\n"
+msgstr ""
+
+#: src/flash/detectflash.c:382 src/flash/detectflash.c:385
+#, c-format
+msgid "\tPage Mode Type: %s\n"
+msgstr ""
+
+#: src/flash/detectflash.c:391
+#, c-format
+msgid "\tACC (Acceleration) Supply Minimum: %d mV\n"
+msgstr ""
+
+#: src/flash/detectflash.c:393
+#, c-format
+msgid "\tACC (Acceleration) Supply Maximum: %d mV\n"
+msgstr ""
+
+#: src/flash/detectflash.c:397 src/flash/detectflash.c:400
+#, c-format
+msgid "\tTop/Bottom Sector Flag: %s\n"
+msgstr ""
+
+#: src/flash/detectflash.c:407 src/flash/detectflash.c:410
+#, c-format
+msgid "\tProgram Suspend: %s\n"
+msgstr ""
+
+#: src/flash/detectflash.c:417 src/flash/detectflash.c:420
+#, c-format
+msgid "\tUnlock Bypass: %s\n"
+msgstr ""
+
+#: src/flash/detectflash.c:421
+#, c-format
+msgid "\tSecSi Sector (Customer OTP Area) Size: %d bytes\n"
+msgstr ""
+
+#: src/flash/detectflash.c:423
+#, c-format
+msgid "\tEmbedded Hardware Reset Timeout Maximum: %d ns\n"
+msgstr ""
+
+#: src/flash/detectflash.c:425
+#, c-format
+msgid "\tNon-Embedded Hardware Reset Timeout Maximum: %d ns\n"
+msgstr ""
+
+#: src/flash/detectflash.c:427
+#, c-format
+msgid "\tErase Suspend Timeout Maximum: %d us\n"
+msgstr ""
+
+#: src/flash/detectflash.c:429
+#, c-format
+msgid "\tProgram Suspend Timeout Maximum: %d us\n"
+msgstr ""
+
+#: src/flash/detectflash.c:436
+msgid "\tBank Organization:\n"
+msgstr ""
+
+#: src/flash/detectflash.c:438
+#, c-format
+msgid "\t\tBank%d: %d sectors\n"
+msgstr ""
+
+#: src/flash/flash.c:92
+#, fuzzy, c-format
+msgid "unknown flash - vendor id: %d (0x%04x)\n"
+msgstr "Kitazwi Umurabyo Umucuruzi ID"
+
+#: src/flash/flash.c:96
+#, fuzzy
+msgid "Flash not supported"
+msgstr "OYA"
+
+#: src/flash/flash.c:110 src/flash/flash.c:311 src/flash/flash.c:484
+#, fuzzy
+msgid "no flash driver found"
+msgstr "Oya Umurabyo Musomyi:"
+
+#: src/flash/flash.c:124
+msgid "Invalid sync sequence"
+msgstr ""
+
+#: src/flash/flash.c:150
+#, fuzzy, c-format
+msgid "block %d unlocked\n"
+msgstr "Funga"
+
+#: src/flash/flash.c:153 src/flash/flash.c:362
+#, fuzzy, c-format
+msgid "erasing block %d: %d\n"
+msgstr "Funga"
+
+# offmgr/source\offapp\dialog\optgdlg.src:OFA_TP_HELPERPROG.FT_PROGRAM.text
+#: src/flash/flash.c:158 src/flash/flash.c:334
+#, fuzzy
+msgid "program:\n"
+msgstr "Porogaramu"
+
+#: src/flash/flash.c:168 src/flash/flash.c:221
+#, fuzzy
+msgid "premature end of file"
+msgstr "Impera Bya"
+
+#: src/flash/flash.c:172 src/flash/flash.c:225
+#, fuzzy, c-format
+msgid "record: start = 0x%08lX, len = 0x%08lX, checksum = 0x%08lX\n"
+msgstr "Icyabitswe Gutangira LEN"
+
+#: src/flash/flash.c:178 src/flash/flash.c:231
+#, fuzzy
+msgid "Invalid record length"
+msgstr "Icyabitswe Uburebure"
+
+#: src/flash/flash.c:186 src/flash/flash.c:239 src/flash/flash.c:372
+#: src/flash/flash.c:434
+#, fuzzy, c-format
+msgid "addr: 0x%08lX"
+msgstr "Aderesi"
+
+#: src/flash/flash.c:205 src/flash/flash.c:408
+msgid "verify skipped\n"
+msgstr ""
+
+#: src/flash/flash.c:210 src/flash/flash.c:413
+msgid "verify:\n"
+msgstr ""
+
+#: src/flash/flash.c:248
+#, fuzzy, c-format
+msgid "verify error: 0x%08lX vs. 0x%08lX at addr %08lX"
+msgstr "Ikosa ku Aderesi"
+
+#: src/flash/flash.c:327
+#, c-format
+msgid "malloc(%zd) failed"
+msgstr ""
+
+#: src/flash/flash.c:358
+#, fuzzy, c-format
+msgid ""
+"\n"
+"block %d unlocked\n"
+msgstr "Funga"
+
+#: src/flash/flash.c:401
+#, fuzzy, c-format
+msgid "addr: 0x%08lX\n"
+msgstr "Aderesi"
+
+#: src/flash/flash.c:453
+#, fuzzy, c-format
+msgid ""
+"addr: 0x%08lX\n"
+" verify error:\n"
+"read: 0x%08lX\n"
+"expected: 0x%08lX\n"
+msgstr "Ikosa Ikitezwe:"
+
+#: src/flash/flash.c:466
+#, fuzzy, c-format
+msgid ""
+"addr: 0x%08lX\n"
+"Done.\n"
+msgstr "Aderesi"
+
+#: src/flash/flash.c:493
+#, c-format
+msgid ""
+"\n"
+"Erasing %d Flash block%s from address 0x%lx\n"
+msgstr ""
+
+#: src/flash/flash.c:511
+#, c-format
+msgid "(%d%% Completed) FLASH Block %d : Unlocking ... "
+msgstr ""
+
+#: src/flash/flash.c:514
+msgid "Erasing ... "
+msgstr ""
+
+#: src/flash/flash.c:522
+#, c-format
+msgid "(100%% Completed) FLASH Block %d : Unlocking ... Erasing ... Ok.\n"
+msgstr ""
+
+#: src/flash/flash.c:527
+msgid "Ok."
+msgstr ""
+
+#: src/flash/flash.c:529
+#, c-format
+msgid "%78s"
+msgstr ""
+
+#: src/flash/flash.c:535
+msgid "ERROR.\n"
+msgstr ""
+
+#: src/flash/flash.c:542
+msgid ""
+"\n"
+"Erasing Completed.\n"
+msgstr ""
+
+#: src/flash/flash.c:544
+msgid ""
+"\n"
+"Erasing (partially) Failed.\n"
+msgstr ""
+
+#: src/flash/intel.c:127 src/flash/intel.c:130 src/flash/intel.c:133
+#, fuzzy, c-format
+msgid "Manufacturer: %s\n"
+msgstr "Ukora mu nganda"
+
+#: src/flash/intel.c:136
+#, fuzzy, c-format
+msgid "Unknown manufacturer (0x%04lX)!\n"
+msgstr "Ukora mu nganda"
+
+#: src/flash/intel.c:141
+msgid "Chip: "
+msgstr ""
+
+#: src/flash/intel.c:194
+#, fuzzy, c-format
+msgid "Unknown (0x%02lX)!\n"
+msgstr "Ukora mu nganda"
+
+#: src/flash/intel.c:255
+#, fuzzy
+msgid "invalid command seq"
+msgstr "Umurabyo Sibyo Komandi:"
+
+#: src/flash/intel.c:258
+#, fuzzy
+msgid "low vpen"
+msgstr "Umurabyo Byo hasi"
+
+#: src/flash/intel.c:261
+#, fuzzy
+msgid "block locked"
+msgstr "Funga"
+
+#: src/flash/intel.c:287
+#, fuzzy
+msgid "unknown error while unlocking block"
+msgstr "Umurabyo Kitazwi Ikosa"
+
+#: src/flash/intel.c:311 src/flash/intel.c:370
+#, fuzzy
+msgid "unknown error while programming"
+msgstr "Umurabyo Kitazwi Ikosa"
+
+#: src/flash/intel.c:531
+#, fuzzy
+msgid "supported: 28Fxxxx, 2 x 16 bit"
+msgstr "2. X"
+
+#: src/flash/intel.c:543
+#, fuzzy
+msgid "supported: 28Fxxxx, 1 x 16 bit"
+msgstr "1. X"
+
+#: src/flash/intel.c:555
+#, fuzzy
+msgid "supported: 28Fxxxx, 1 x 8 bit"
+msgstr "1. X 8"
+
+#: src/part/bsbit.c:50
+#, fuzzy
+msgid "missing Boundary Scan Register (BSR)"
+msgstr "Ibuze"
+
+#: src/part/bsbit.c:56
+#, fuzzy
+msgid "invalid boundary bit number"
+msgstr "Sibyo"
+
+#: src/part/bsbit.c:61
+#, fuzzy
+msgid "duplicate bit declaration"
+msgstr "Gusubiramo"
+
+#: src/part/bsbit.c:66
+#, fuzzy
+msgid "invalid control bit number"
+msgstr "Sibyo Igenzura"
+
+#: src/part/data_register.c:53
+#, fuzzy
+msgid "Data register name too long\n"
+msgstr "Kwiyandikisha Izina:"
+
+#: src/part/data_register.c:101
+#, fuzzy, c-format
+msgid "Data register '%s' already defined"
+msgstr "Kwiyandikisha"
+
+#: src/part/instruction.c:51
+#, fuzzy
+msgid "Instruction name too long\n"
+msgstr "Izina:"
+
+#: src/part/part.c:231
+#, fuzzy, c-format
+msgid "signal '%s' cannot be set as output"
+msgstr "Gushyiraho Nka"
+
+#: src/part/part.c:246
+#, fuzzy, c-format
+msgid "signal '%s' cannot be set as input"
+msgstr "Gushyiraho Nka"
+
+#: src/part/part.c:280
+#, fuzzy, c-format
+msgid "signal '%s' is not input signal"
+msgstr "ni OYA Iyinjiza"
+
+#: src/part/part.c:300
+#, c-format
+msgid "%%-%ds %%-%ds %%-%ds %%-%ds %%-%ds\n"
+msgstr ""
+
+#: src/part/part.c:312 src/part/part.c:314
+msgid "(none)"
+msgstr "(ntacyo)"
+
+#: src/part/part.c:328
+#, fuzzy
+msgid "instruction length is already set and used"
+msgstr "Uburebure ni Gushyiraho Na"
+
+#: src/part/part.c:355
+#, fuzzy, c-format
+msgid "Instruction '%s' already defined"
+msgstr "Kwiyandikisha"
+
+#: src/part/part.c:363
+#, fuzzy, c-format
+msgid "unknown data register '%s'"
+msgstr "Kitazwi Ibyatanzwe Kwiyandikisha"
+
+#: src/svf/svf.c:470
+#, c-format
+msgid "Error %s: mismatch at position %d for TDO\n"
+msgstr ""
+
+#: src/svf/svf.c:550
+#, c-format
+msgid "calloc(%zd,%zd) fails"
+msgstr ""
+
+#: src/svf/svf.c:624 src/svf/svf.c:1081
+#, c-format
+msgid "command %s not implemented\n"
+msgstr ""
+
+#: src/svf/svf.c:661
+#, c-format
+msgid "Error %s: only TCK is supported for RUNTEST"
+msgstr ""
+
+#: src/svf/svf.c:668
+#, c-format
+msgid "Error %s: maximum time must be larger or equal to minimum time"
+msgstr ""
+
+#: src/svf/svf.c:676
+msgid "maximum time for RUNTEST not guaranteed.\n"
+msgstr ""
+
+#: src/svf/svf.c:677
+msgid " This message is only displayed once.\n"
+msgstr ""
+
+#: src/svf/svf.c:710
+#, c-format
+msgid "Error %s: Maximum cable clock frequency required for RUNTEST"
+msgstr ""
+
+#: src/svf/svf.c:713
+msgid " Set the cable frequency with 'FREQUENCY <Hz>'.\n"
+msgstr ""
+
+#: src/svf/svf.c:878
+#, c-format
+msgid "Error %s: first %s command after length change must have a TDI value.\n"
+msgstr ""
+
+#: src/svf/svf.c:906
+#, c-format
+msgid "Error %s: SIR command length inconsistent.\n"
+msgstr ""
+
+#: src/svf/svf.c:910
+#, c-format
+msgid " in input file between line %d col %d and line %d col %d\n"
+msgstr ""
+
+#: src/svf/svf.c:1011
+#, c-format
+msgid "Error %s: no further TRST command allowed after mode ABSENT"
+msgstr ""
+
+#: src/svf/svf.c:1034
+#, c-format
+msgid "Error %s: TRST ABSENT must not be issued after a STATE command"
+msgstr ""
+
+#: src/svf/svf.c:1042
+#, c-format
+msgid "Error %s: TRST ABSENT must not be issued after an SIR or SDR command"
+msgstr ""
+
+#: src/svf/svf.c:1052
+#, c-format
+msgid "unimplemented mode '%s' for TRST\n"
+msgstr ""
+
+#: src/svf/svf.c:1140
+#, fuzzy, c-format
+msgid "%s: no JTAG chain available"
+msgstr "Kuri Impera"
+
+#: src/svf/svf.c:1147
+#, c-format
+msgid "%s: chain without any parts"
+msgstr ""
+
+#: src/svf/svf.c:1163
+#, c-format
+msgid "%s: could not establish SDR register"
+msgstr ""
+
+#: src/svf/svf.c:1203
+#, c-format
+msgid "%s: could not establish SIR instruction"
+msgstr ""
+
+#: src/svf/svf.c:1240
+msgid ""
+"Mismatches occurred between scanned device output and expected TDO values.\n"
+msgstr ""
+
+#: src/svf/svf.c:1243
+msgid "Scanned device output matched expected TDO values.\n"
+msgstr ""
+
+#: svf_flex.l:367
+#, c-format
+msgid "Parsing %6d/%d (%3.0d%%)"
+msgstr ""
+
+#: svf_flex.l:387 src/tap/cable/ft2232.c:1741
+#: src/tap/cable/generic_parport.c:89 src/tap/cable/generic_usbconn.c:236
+#: src/tap/cable/jim.c:71 src/tap/cable/ts7800.c:171
+#: src/tap/cable/usbblaster.c:80 src/tap/cable/vision_ep9307.c:214
+#: src/tap/cable/wiggler.c:226
+#, c-format
+msgid "malloc(%zd) fails"
+msgstr ""
+
+#: src/tap/cable/arcom.c:137
+msgid "Arcom JTAG Cable"
+msgstr ""
+
+#: src/tap/cable/byteblaster.c:159
+msgid ""
+"Altera ByteBlaster/ByteBlaster II/ByteBlasterMV Parallel Port Download Cable"
+msgstr ""
+
+#: src/tap/cable.c:185 src/tap/usbconn/libusb.c:169
+#, c-format
+msgid "malloc(%zd)/malloc(%zd) fails"
+msgstr ""
+
+#: src/tap/cable.c:239
+#, c-format
+msgid "(Resized JTAG activity queue to hold max %d items)\n"
+msgstr ""
+
+#: src/tap/cable.c:426 src/tap/cable.c:487
+#, c-format
+msgid "Internal error: Got wrong type of result from queue (%d? %p.%d)\n"
+msgstr ""
+
+#: src/tap/cable.c:494
+#, c-format
+msgid "Internal error: Got wrong signal's value from queue (%d? %p.%d)\n"
+msgstr ""
+
+#: src/tap/cable.c:551
+#, c-format
+msgid "Internal error: Got wrong type of result from queue (#%d %p.%d)\n"
+msgstr ""
+
+#: src/tap/cable.c:558
+msgid "Internal error: Wanted transfer result but none was queued\n"
+msgstr ""
+
+#: src/tap/cable/dlc5.c:131
+msgid "Xilinx DLC5 JTAG Parallel Cable III"
+msgstr ""
+
+#: src/tap/cable/ea253.c:137
+msgid "ETC EA253 JTAG Cable"
+msgstr ""
+
+#: src/tap/cable/ei012.c:139
+msgid "ETC EI012 JTAG Cable"
+msgstr ""
+
+#: src/tap/cable/ft2232.c:251
+#, c-format
+msgid "Setting lowest supported frequency for FT2232: %d\n"
+msgstr ""
+
+#: src/tap/cable/ft2232.c:739
+msgid "Please power on the TARGET board and connect VCC signal"
+msgstr ""
+
+#: src/tap/cable/ft2232.c:1824
+#, c-format
+msgid ""
+"Usage: cable %s [vid=VID] [pid=PID] [desc=DESC] [driver=DRIVER]\n"
+"\n"
+"VID vendor ID (hex), defaults to %04X\n"
+"PID product ID (hex), defaults to %04X\n"
+"DESC Some string to match in description or serial no.\n"
+"DRIVER usbconn driver, either ftdi-mpsse or ftd2xx-mpsse\n"
+" defaults to %s if not specified\n"
+"\n"
+msgstr ""
+
+#: src/tap/cable/ft2232.c:1836
+msgid "Generic FTDI FT2232 Cable"
+msgstr ""
+
+#: src/tap/cable/ft2232.c:1869
+msgid "Olimex ARM-USB-OCD[-TINY] (FT2232) Cable"
+msgstr ""
+
+#: src/tap/cable/ft2232.c:1916
+msgid "Analog Devices Blackfin gnICE (FT2232) Cable (EXPERIMENTAL)"
+msgstr ""
+
+#: src/tap/cable/ft2232.c:1949
+msgid "Amontec JTAGkey (FT2232) Cable"
+msgstr ""
+
+#: src/tap/cable/ft2232.c:1982
+msgid "OOCDLink-s (FT2232) Cable (EXPERIMENTAL)"
+msgstr ""
+
+#: src/tap/cable/ft2232.c:2015
+msgid "Turtelizer 2 Rev. B (FT2232) Cable (EXPERIMENTAL)"
+msgstr ""
+
+#: src/tap/cable/ft2232.c:2048
+msgid "USB to JTAG Interface (FT2232) Cable (EXPERIMENTAL)"
+msgstr ""
+
+#: src/tap/cable/ft2232.c:2081
+msgid "Xverve DT-USB-ST Signalyzer Tool (FT2232) Cable (EXPERIMENTAL)"
+msgstr ""
+
+#: src/tap/cable/ft2232.c:2114
+msgid "TinCanTools Flyswatter (FT2232) Cable"
+msgstr ""
+
+#: src/tap/cable/ft2232.c:2147
+msgid "KrisTech usbScarabeus2 (FT2232) Cable"
+msgstr ""
+
+#: src/tap/cable/generic.c:110
+msgid "No space in cable activity results queue"
+msgstr ""
+
+#: src/tap/cable/generic.c:421
+msgid "calibration error, wall clock is not monotonically increasing\n"
+msgstr ""
+
+#: src/tap/cable/generic_parport.c:62
+msgid "extra arguments"
+msgstr ""
+
+#: src/tap/cable/generic_parport.c:72
+#, fuzzy, c-format
+msgid "Unknown port type: %s"
+msgstr "Kitazwi Ibyatanzwe Kwiyandikisha"
+
+#: src/tap/cable/generic_parport.c:120
+#, c-format
+msgid ""
+"Usage: cable %s parallel PORTADDR\n"
+" or: cable %s ppdev PPDEV\n"
+" or: cable %s ppi PPIDEV\n"
+"\n"
+"PORTADDR parallel port address (e.g. 0x378)\n"
+"PPDEV ppdev device (e.g. /dev/parport0)\n"
+"PPIDEF ppi device (e.g. /dev/ppi0)\n"
+"\n"
+msgstr ""
+
+#: src/tap/cable/generic_usbconn.c:229
+msgid "Couldn't connect to suitable USB device.\n"
+msgstr ""
+
+#: src/tap/cable/generic_usbconn.c:267
+#, c-format
+msgid ""
+"Usage: cable %s [vid=VID] [pid=PID] [desc=DESC] [...]\n"
+"\n"
+"VID USB Device Vendor ID (hex, e.g. 0abc)\n"
+"PID USB Device Product ID (hex, e.g. 0abc)\n"
+"DESC Some string to match in description or serial no.\n"
+"\n"
+msgstr ""
+
+#: src/tap/cable/jim.c:55
+msgid "not enough arguments"
+msgstr ""
+
+#: src/tap/cable/jim.c:59
+msgid "JTAG target simulator JIM - work in progress!\n"
+msgstr ""
+
+#: src/tap/cable/jim.c:154
+#, c-format
+msgid "Usage: cable %s\n"
+msgstr ""
+
+#: src/tap/cable/jim.c:159
+msgid "JTAG target simulator JIM"
+msgstr ""
+
+#: src/tap/cable/jlink.c:590
+msgid "Segger/IAR J-Link, Atmel SAM-ICE and others."
+msgstr ""
+
+#: src/tap/cable/keithkoep.c:148
+msgid "Keith & Koep JTAG cable"
+msgstr ""
+
+#: src/tap/cable/lattice.c:140
+msgid "Lattice Parallel Port JTAG Cable"
+msgstr ""
+
+#: src/tap/cable/mpcbdm.c:146
+msgid "Mpcbdm JTAG cable"
+msgstr ""
+
+#: src/tap/cable/triton.c:150
+msgid "Ka-Ro TRITON Starterkit II (PXA255/250) JTAG Cable"
+msgstr ""
+
+#: src/tap/cable/ts7800.c:89 src/tap/cable/vision_ep9307.c:95
+#, fuzzy
+msgid "unable to open /dev/mem"
+msgstr "Bya Ububiko"
+
+#: src/tap/cable/ts7800.c:102 src/tap/cable/vision_ep9307.c:138
+#, fuzzy
+msgid "unable to mmap the GPIO registers"
+msgstr "Kuri Impera"
+
+#: src/tap/cable/ts7800.c:127 src/tap/cable/vision_ep9307.c:164
+#, fuzzy
+msgid "unable to munmap the GPIO registers"
+msgstr "Kuri Impera"
+
+#: src/tap/cable/ts7800.c:161 src/tap/cable/vision_ep9307.c:204
+msgid "This cable type does not accept parameters"
+msgstr ""
+
+#: src/tap/cable/ts7800.c:166
+msgid "Initializing TS-7800 Built-in JTAG Chain\n"
+msgstr ""
+
+#: src/tap/cable/ts7800.c:298 src/tap/cable/vision_ep9307.c:339
+#, c-format
+msgid ""
+"Usage: cable %s\n"
+"\n"
+msgstr ""
+
+#: src/tap/cable/ts7800.c:303
+msgid "TS-7800 Built-in JTAG Chain"
+msgstr ""
+
+#: src/tap/cable/usbblaster.c:104
+#, c-format
+msgid "USB-Blaster frequency is fixed to %ld Hz\n"
+msgstr ""
+
+#: src/tap/cable/usbblaster.c:503
+#, c-format
+msgid ""
+"Usage: cable %s [vid=VID] [pid=PID] [desc=DESC] [driver=DRIVER]\n"
+"\n"
+"VID vendor ID (hex, e.g. 0abc)\n"
+"PID product ID (hex, e.g. 0abc)\n"
+"DESC Some string to match in description or serial no.\n"
+"DRIVER usbconn driver, either ftdi or ftd2xx\n"
+" defaults to %s if not specified\n"
+"\n"
+msgstr ""
+
+#: src/tap/cable/usbblaster.c:514
+msgid "Altera USB-Blaster Cable"
+msgstr ""
+
+#: src/tap/cable/vision_ep9307.c:107
+msgid "unable to mmap the System Control registers"
+msgstr ""
+
+#: src/tap/cable/vision_ep9307.c:127
+msgid "unable to munmap the System Controller registers"
+msgstr ""
+
+#: src/tap/cable/vision_ep9307.c:209
+msgid "Initializing Vision EP9307 SoM GPIO JTAG Cable\n"
+msgstr ""
+
+#: src/tap/cable/vision_ep9307.c:344
+msgid "Vision EP9307 SoM GPIO JTAG Cable"
+msgstr ""
+
+#: src/tap/cable/wiggler2.c:159
+msgid "Modified (with CPU Reset) WIGGLER JTAG Cable"
+msgstr ""
+
+#: src/tap/cable/wiggler.c:248
+msgid "Pin mapping failed\n"
+msgstr ""
+
+#: src/tap/cable/wiggler.c:388
+#, c-format
+msgid ""
+"Usage: cable %s parallel PORTADDR [TDO,TRST,TDI,TCK,TMS,SRESET]\n"
+" or: cable %s ppdev PPDEV [TDO,TRST,TDI,TCK,TMS,SRESET]\n"
+" or: cable %s ppi PPIDEV [TDO,TRST,TDI,TCK,TMS,SRESET]\n"
+"\n"
+"PORTADDR parallel port address (e.g. 0x378)\n"
+"PPDEV ppdev device (e.g. /dev/parport0)\n"
+"PPIDEF ppi device (e.g. /dev/ppi0)\n"
+"TDO, ... parallel port bit number, prepend '#' for inversion\n"
+" default is '%s'\n"
+"\n"
+msgstr ""
+
+#: src/tap/cable/wiggler.c:415
+msgid "Macraigor Wiggler JTAG Cable"
+msgstr ""
+
+#: src/tap/cable/wiggler.c:434
+msgid "Excelpoint IGLOO JTAG Cable"
+msgstr ""
+
+#: src/tap/cable/xpc.c:685
+msgid "Xilinx Platform Cable USB internal chain"
+msgstr ""
+
+#: src/tap/cable/xpc.c:712
+msgid "Xilinx Platform Cable USB external chain"
+msgstr ""
+
+#: src/tap/chain.c:182 src/tap/chain.c:250
+#, fuzzy, c-format
+msgid "Part %d without active instruction"
+msgstr "%s(%d)Gikora"
+
+#: src/tap/chain.c:256
+#, fuzzy, c-format
+msgid "Part %d without data register"
+msgstr "%s(%d)Ibyatanzwe"
+
+#: src/tap/chain.c:321
+#, fuzzy
+msgid "Run \"detect\" first"
+msgstr "Itangira"
+
+#: src/tap/chain.c:327
+#, c-format
+msgid "active part no %d exceeds chain length %d"
+msgstr ""
+
+#: src/tap/detect.c:65
+#, fuzzy, c-format
+msgid "Unable to open file '%s'\n"
+msgstr "Kuri Gufungura IDOSIYE"
+
+#: src/tap/detect.c:201
+#, fuzzy, c-format
+msgid "IR length: %d\n"
+msgstr "Uburebure"
+
+#: src/tap/detect.c:219
+#, fuzzy
+msgid "Unable to detect JTAG chain length\n"
+msgstr "Kuri"
+
+#: src/tap/detect.c:222
+#, fuzzy, c-format
+msgid "Chain length: %d\n"
+msgstr "Uburebure"
+
+#: src/tap/detect.c:265
+#, c-format
+msgid "Device Id: %s (0x%016<PRIX64>)\n"
+msgstr ""
+
+#: src/tap/detect.c:268
+msgid "Device Id: unknown as bit 0 was not a 1\n"
+msgstr ""
+
+#: src/tap/detect.c:299
+#, fuzzy
+msgid " Unknown manufacturer!\n"
+msgstr "Ukora mu nganda"
+
+#: src/tap/detect.c:305
+#, fuzzy, c-format
+msgid " Manufacturer: %s\n"
+msgstr "Ukora mu nganda"
+
+#: src/tap/detect.c:308
+#, fuzzy
+msgid "Manufacturer too long\n"
+msgstr "Ukora mu nganda"
+
+#: src/tap/detect.c:325
+msgid " Unknown part!\n"
+msgstr ""
+
+#: src/tap/detect.c:331
+#, c-format
+msgid " Part(%d): %s\n"
+msgstr ""
+
+#: src/tap/detect.c:334
+msgid "Part too long\n"
+msgstr ""
+
+#: src/tap/detect.c:351
+msgid " Unknown stepping!\n"
+msgstr ""
+
+#: src/tap/detect.c:357
+#, c-format
+msgid " Stepping: %s\n"
+msgstr ""
+
+#: src/tap/detect.c:360
+msgid "Stepping too long\n"
+msgstr ""
+
+#: src/tap/detect.c:400
+#, fuzzy
+msgid "Error: Unable to detect JTAG chain end!\n"
+msgstr "Kuri Impera"
+
+#: src/tap/detect.c:450
+msgid "Error: could not set BR register"
+msgstr ""
+
+#: src/tap/detect.c:471
+msgid "Error: could not set BYPASS instruction"
+msgstr ""
+
+#: src/tap/discovery.c:117
+#, c-format
+msgid "TDO seems to be stuck at %d\n"
+msgstr ""
+
+#: src/tap/discovery.c:142
+#, fuzzy
+msgid "Detecting IR length ... "
+msgstr "Uburebure"
+
+# basctl/source\basicide\basidesh.src:RID_IMGBTN_REMOVEWATCH.text
+#: src/tap/discovery.c:148 src/tap/discovery.c:184
+#, fuzzy, c-format
+msgid "%d\n"
+msgstr "%d"
+
+#: src/tap/discovery.c:153
+#, fuzzy
+msgid "Error: Invalid IR length!\n"
+msgstr "Uburebure"
+
+#: src/tap/discovery.c:177
+#, fuzzy, c-format
+msgid "Detecting DR length for IR %s ... "
+msgstr "Uburebure kugirango"
+
+#: src/tap/parport/direct.c:157
+msgid "Couldn't load InpOut32.dll; maybe not installed?"
+msgstr ""
+
+#: src/tap/parport/direct.c:223
+#, fuzzy
+msgid "Invalid port address"
+msgstr "Umuyoboro Aderesi"
+
+#: src/tap/parport/direct.c:238
+#, fuzzy, c-format
+msgid "Disconnecting %s from parallel port at 0x%x\n"
+msgstr "Bivuye Biteganye Umuyoboro ku"
+
+#: src/tap/parport/direct.c:245
+#, fuzzy, c-format
+msgid "Initializing parallel port at 0x%x\n"
+msgstr "ku Biteganye Umuyoboro ku"
+
+#: src/tap/parport/ppdev.c:132
+#, fuzzy, c-format
+msgid "Disconnecting %s from ppdev port %s\n"
+msgstr "Bivuye Umuyoboro"
+
+#: src/tap/parport/ppdev.c:138
+#, fuzzy, c-format
+msgid "Initializing ppdev port %s\n"
+msgstr "ku Umuyoboro"
+
+#: src/tap/parport/ppdev.c:155
+#, fuzzy, c-format
+msgid "Could not open port %s"
+msgstr "Gufungura"
+
+#: src/tap/parport/ppdev.c:162
+msgid "Could not claim ppdev device"
+msgstr ""
+
+#: src/tap/parport/ppi.c:128
+#, fuzzy, c-format
+msgid "Disconnecting %s from ppi port %s\n"
+msgstr "Bivuye Umuyoboro"
+
+#: src/tap/parport/ppi.c:135
+#, fuzzy, c-format
+msgid "Initializing on ppi port %s\n"
+msgstr "ku Umuyoboro"
+
+#: src/tap/tap.c:78 src/tap/tap.c:150 src/tap/tap.c:163
+#, fuzzy, c-format
+msgid "%s: Invalid state: %2X\n"
+msgstr "%s:Leta"
+
+#: src/tap/usbconn/libftd2xx.c:133
+#, c-format
+msgid "FT_Write() failed: %s"
+msgstr ""
+
+#: src/tap/usbconn/libftd2xx.c:141 src/tap/usbconn/libftdi.c:93
+msgid "Written fewer bytes than requested"
+msgstr ""
+
+#: src/tap/usbconn/libftd2xx.c:161 src/tap/usbconn/libftdi.c:113
+msgid "Receive buffer does not exist"
+msgstr ""
+
+#: src/tap/usbconn/libftd2xx.c:168 src/tap/usbconn/libftd2xx.c:230
+#, c-format
+msgid "Error from FT_Read(): %s"
+msgstr ""
+
+#: src/tap/usbconn/libftd2xx.c:173 src/tap/usbconn/libftdi.c:127
+#, c-format
+msgid "%s(): Received fewer bytes than requested.\n"
+msgstr ""
+
+#: src/tap/usbconn/libftd2xx.c:297 src/tap/usbconn/libftdi.c:237
+msgid "Send buffer does not exist"
+msgstr ""
+
+#: src/tap/usbconn/libftd2xx.c:360
+msgid "Connected to libftd2xx driver.\n"
+msgstr ""
+
+#: src/tap/usbconn/libftd2xx.c:437 src/tap/usbconn/libftd2xx.c:484
+#: src/tap/usbconn/libftd2xx.c:519 src/tap/usbconn/libftd2xx.c:546
+#, c-format
+msgid "Can't reset device: %s"
+msgstr ""
+
+#: src/tap/usbconn/libftd2xx.c:441 src/tap/usbconn/libftd2xx.c:523
+#: src/tap/usbconn/libftd2xx.c:550
+#, c-format
+msgid "Can't purge RX buffer: %s"
+msgstr ""
+
+#: src/tap/usbconn/libftd2xx.c:446
+#, c-format
+msgid "Can't set latency timer: %s"
+msgstr ""
+
+#: src/tap/usbconn/libftd2xx.c:451
+#, c-format
+msgid "Can't set baudrate: %s"
+msgstr ""
+
+#: src/tap/usbconn/libftd2xx.c:488
+#, c-format
+msgid "s(): Can't purge RX buffer: %s"
+msgstr ""
+
+#: src/tap/usbconn/libftd2xx.c:495
+#, c-format
+msgid "Can't set USB parameters: %s"
+msgstr ""
+
+#: src/tap/usbconn/libftd2xx.c:500
+#, c-format
+msgid "Can't set special characters: %s"
+msgstr ""
+
+#: src/tap/usbconn/libftd2xx.c:508
+#, c-format
+msgid "Can't set target latency timer: %s"
+msgstr ""
+
+#: src/tap/usbconn/libftd2xx.c:514
+#, c-format
+msgid "Can't set MPSSE bitmode: %s"
+msgstr ""
+
+#: src/tap/usbconn/libftdi.c:87
+#, c-format
+msgid "ftdi_write_data() failed: %s"
+msgstr ""
+
+#: src/tap/usbconn/libftdi.c:122 src/tap/usbconn/libftdi.c:178
+#, c-format
+msgid "Error from ftdi_read_data(): %s"
+msgstr ""
+
+#: src/tap/usbconn/libftdi.c:305
+msgid "Connected to libftdi driver.\n"
+msgstr ""
+
+#: src/tap/usbconn/libftdi.c:344
+#, c-format
+msgid "%s(): ftdi_usb_open_desc() failed: %s"
+msgstr ""
+
+#: src/tap/usbconn/libftdi.c:346
+#, c-format
+msgid "ftdi_usb_open_desc() failed: %s"
+msgstr ""
+
+#: src/tap/usbconn/libftdi.c:371
+#, c-format
+msgid "ftdi_usb_purge_buffers() failed: %s"
+msgstr ""
+
+#: src/tap/usbconn/libftdi.c:375 src/tap/usbconn/libftdi.c:396
+#, c-format
+msgid "ftdi_read_data() failed: %s"
+msgstr ""
+
+#: src/tap/usbconn/libftdi.c:385
+#, c-format
+msgid "ftdi_usb_purge_rx_buffer() failed: %s"
+msgstr ""
+
+#: src/tap/usbconn/libftdi.c:392
+#, c-format
+msgid "ftdi_usb_purge_tx_buffer() failed: %s"
+msgstr ""
+
+#: src/tap/usbconn/libftdi.c:413
+#, c-format
+msgid "ftdi_poll_status() failed: %s"
+msgstr ""
+
+#: src/tap/usbconn/libftdi.c:418 src/tap/usbconn/libftdi.c:534
+#: src/tap/usbconn/libftdi.c:556
+#, c-format
+msgid "ftdi_usb_reset() failed: %s"
+msgstr ""
+
+#: src/tap/usbconn/libftdi.c:444 src/tap/usbconn/libftdi.c:524
+#, c-format
+msgid "ftdi_set_latency_timer() failed: %s"
+msgstr ""
+
+#: src/tap/usbconn/libftdi.c:461
+#, c-format
+msgid "ftdi_set_baudrate() failed: %s"
+msgstr ""
+
+#: src/tap/usbconn/libftdi.c:529
+#, c-format
+msgid "ftdi_set_bitmode() failed: %s"
+msgstr ""
+
+#, fuzzy
+#~ msgid "Out of memory, %s line %i\n"
+#~ msgstr "Bya"
+
+#, fuzzy
+#~ msgid "No JTAG chain available\n"
+#~ msgstr "(Oya Isobanuramiterere Bihari"
+
+#, fuzzy
+#~ msgid "Unable to open BSDL file '%s'\n"
+#~ msgstr "Kuri Gufungura IDOSIYE"
+
+#, fuzzy
+#~ msgid "Cannot open file %s or %s.\n"
+#~ msgstr "Gufungura"
+
+#, fuzzy
+#~ msgid "out of memory\n"
+#~ msgstr "Inyuma Bya"
+
+#, fuzzy
+#~ msgid "signal '%s' is not found\n"
+#~ msgstr "OYA"
+
+#, fuzzy
+#~ msgid "Error: Bus width detection failed\n"
+#~ msgstr "Ubugari"
+
+#, fuzzy
+#~ msgid "Error: Invalid bus width (MD3 = MD4 = 0)!\n"
+#~ msgstr "Ubugari 0"
+
+#, fuzzy
+#~ msgid "Addr: 0x%08X\n"
+#~ msgstr "Aderesi"
+
+#, fuzzy
+#~ msgid "%s: no active part\n"
+#~ msgstr "%s:Oya Gikora"
+
+#, fuzzy
+#~ msgid "Error: Cable connection failed!\n"
+#~ msgstr "Ukwihuza Byanze"
+
+#, fuzzy
+#~ msgid "Error: Cable initialization failed!\n"
+#~ msgstr "Byanze"
+
+#, fuzzy
+#~ msgid "Error: Cable not configured. Please use '%s' command first!\n"
+#~ msgstr "OYA Gukoresha Komandi: Itangira"
+
+# sw/source\ui\utlui\initui.src:RID_SW_SHELLRES.STR_CALC_SYNTAX.text
+#, fuzzy
+#~ msgid "%s: syntax error!\n"
+#~ msgstr "%s:Ikosa ry'iyandikanteruro**"
+
+#, fuzzy
+#~ msgid "Unable to open file `%s go=%d'!\n"
+#~ msgstr "Kuri Gufungura IDOSIYE"
+
+#, fuzzy
+#~ msgid "bus alloc/attach failed!\n"
+#~ msgstr "Byanze"
+
+#, fuzzy
+#~ msgid "bus initialization failed!\n"
+#~ msgstr "Byanze"
+
+#, fuzzy
+#~ msgid ""
+#~ "\n"
+#~ "flash error\n"
+#~ msgstr "Umurabyo"
+
+#, fuzzy
+#~ msgid "Out of memory!\n"
+#~ msgstr "Ububiko bwarenzwe"
+
+#, fuzzy
+#~ msgid "flash: block locked\n"
+#~ msgstr "Umurabyo Funga"
+
+#, fuzzy
+#~ msgid "out of memory"
+#~ msgstr "Inyuma Bya"
+
+#, fuzzy
+#~ msgid "Initialization failed.\n"
+#~ msgstr "Byanze"
+
+#, fuzzy
+#~ msgid "%s(%d) Out of memory\n"
+#~ msgstr "%s(%d)Bya Ububiko"
+
+#, fuzzy
+#~ msgid "Cannot open %s\n"
+#~ msgstr "Gufungura"
+
+#, fuzzy
+#~ msgid "Error: Unable to allocate space for parts!\n"
+#~ msgstr "Kuri Impera"
+
+#, fuzzy
+#~ msgid "Error: Unable to allocate space for a part!\n"
+#~ msgstr "Kuri Impera"
+
+#, fuzzy
+#~ msgid "Error: Out of memory!\n"
+#~ msgstr "Bya Ububiko"
+
+#, fuzzy
+#~ msgid "Syntax error!\n"
+#~ msgstr "Ikosa ry'imyandikire"
+
+#, fuzzy
+#~ msgid "%s(%d) Out of memory.\n"
+#~ msgstr "%s(%d)Bya Ububiko"
+
+#, fuzzy
+#~ msgid ""
+#~ "Blackfin BF537 Stamp compatible bus driver via BSR (JTAG part No. %d)\n"
+#~ msgstr "Musomyi: Biturutse"
+
+#, fuzzy
+#~ msgid ""
+#~ "Blackfin BF537 EZ-KIT compatible bus driver via BSR (JTAG part No. %d)\n"
+#~ msgstr "Musomyi: Biturutse"
+
+#, fuzzy
+#~ msgid ""
+#~ "Blackfin BF527 EZ-KIT compatible bus driver via BSR (JTAG part No. %d)\n"
+#~ msgstr "Musomyi: Biturutse"
+
+#, fuzzy
+#~ msgid "Intel PXA2x0 compatible bus driver via BSR (JTAG part No. %d)\n"
+#~ msgstr "Musomyi: Biturutse"
+
+#, fuzzy
+#~ msgid "Intel PXA27x compatible bus driver via BSR (JTAG part No. %d)\n"
+#~ msgstr "Musomyi: Biturutse"
+
+#, fuzzy
+#~ msgid "Error during file read.\n"
+#~ msgstr "IDOSIYE Gusoma"
+
+#, fuzzy
+#~ msgid "Disconnecting %s\n"
+#~ msgstr "Bivuye Umuyoboro"
+
+#, fuzzy
+#~ msgid "Disconnecting %s from FTDI device %s\n"
+#~ msgstr "Bivuye Umuyoboro"
+
+#, fuzzy
+#~ msgid "Initializing %s on FTDI device %s\n"
+#~ msgstr "ku Umuyoboro"
+
+#, fuzzy
+#~ msgid "Initializing on FTDI device %s\n"
+#~ msgstr "ku Umuyoboro"
+
+#, fuzzy
+#~ msgid "Disconnecting %s, device %s\n"
+#~ msgstr "Bivuye Umuyoboro"
+
+#, fuzzy
+#~ msgid "Initializing %s, device %s\n"
+#~ msgstr "ku Umuyoboro"
+
+#, fuzzy
+#~ msgid "Initializing device %s\n"
+#~ msgstr "ku Umuyoboro"
+
+#, fuzzy
+#~ msgid ""
+#~ "Usage: %s FILENAME\n"
+#~ "Run command sequence from external FILENAME from the repository.\n"
+#~ "\n"
+#~ "FILENAME Name of the file with commands\n"
+#~ msgstr "Komandi: Bivuye external Bivuye i Bya i IDOSIYE Na:"
+
+#, fuzzy
+#~ msgid ""
+#~ "Usage: %s PORTADDR CABLE\n"
+#~ "Usage: %s DEV CABLE\n"
+#~ "Select JTAG cable connected to parallel port.\n"
+#~ "\n"
+#~ "PORTADDR parallel port address (e.g. 0x378)\n"
+#~ "CABLE cable type\n"
+#~ "DEV ppdev device (e.g. /dev/parport0)\n"
+#~ "\n"
+#~ "List of supported cables:\n"
+#~ "%-13s No cable connected\n"
+#~ msgstr "g. g."
+
+#, fuzzy
+#~ msgid "Note: Supported configuration is 2 x 16 bit or 1 x 16 bit only\n"
+#~ msgstr "Iboneza ni 2. X Cyangwa 1. X"
+
+#, fuzzy
+#~ msgid "Changed cable to 'none'\n"
+#~ msgstr "Kuri"
--- /dev/null
+# Slovak translations for jtag package
+# Copyright (C) 2003 ETC s.r.o.
+# This file is distributed under the same license as the jtag package.
+# Marcel Telka <marcel@telka.sk>, 2003.
+#
+msgid ""
+msgstr ""
+"Project-Id-Version: jtag 0.5.1\n"
+"Report-Msgid-Bugs-To: marcel@telka.sk\n"
+"POT-Creation-Date: 2009-05-28 14:35+0200\n"
+"PO-Revision-Date: 2003-10-08 21:25+0200\n"
+"Last-Translator: Marcel Telka <marcel@telka.sk>\n"
+"Language-Team: Slovak <sk-i18n@lists.linux.sk>\n"
+"MIME-Version: 1.0\n"
+"Content-Type: text/plain; charset=UTF-8\n"
+"Content-Transfer-Encoding: 8bit\n"
+
+#: src/apps/jtag/jtag.c:372
+#, c-format
+msgid "'%s' must not be run suid root!\n"
+msgstr ""
+
+#: src/apps/jtag/jtag.c:431
+#, fuzzy, c-format
+msgid "%s #%s\n"
+msgstr "%-13s %s\n"
+
+#: src/apps/jtag/jtag.c:434
+#, c-format
+msgid "Usage: %s [OPTIONS] [FILE [FILE ... ]] \n"
+msgstr ""
+
+#: src/apps/jtag/jtag.c:437
+#, c-format
+msgid " -h, --help display this help and exit\n"
+msgstr ""
+
+#: src/apps/jtag/jtag.c:438
+#, c-format
+msgid " -v, --version display version information and exit\n"
+msgstr ""
+
+#: src/apps/jtag/jtag.c:440
+#, c-format
+msgid " -n, --norc disable reading ~/.jtag/rc on startup\n"
+msgstr ""
+
+#: src/apps/jtag/jtag.c:441
+#, c-format
+msgid " -i, --interactive enter interactive mode after reading files\n"
+msgstr ""
+
+#: src/apps/jtag/jtag.c:442
+#, c-format
+msgid " -q, --quiet Do not print help on startup\n"
+msgstr ""
+
+#: src/apps/jtag/jtag.c:444
+#, c-format
+msgid " [FILE] file containing commands to execute\n"
+msgstr ""
+
+#: src/apps/jtag/jtag.c:447
+#, c-format
+msgid " Please report bugs at http://www.urjtag.org\n"
+msgstr ""
+
+#: src/apps/jtag/jtag.c:454
+#, c-format
+msgid ""
+"\n"
+"%s #%s\n"
+"\n"
+"Copyright (C) 2002, 2003 ETC s.r.o.\n"
+"Copyright (C) 2007, 2008, 2009 Kolja Waschk and the respective authors\n"
+msgstr ""
+
+#: src/apps/jtag/jtag.c:459
+#, c-format
+msgid ""
+"\n"
+"This program is free software; you can redistribute it and/or modify\n"
+"it under the terms of the GNU General Public License as published by\n"
+"the Free Software Foundation; either version 2 of the License, or\n"
+"(at your option) any later version.\n"
+"\n"
+"This program is distributed in the hope that it will be useful,\n"
+"but WITHOUT ANY WARRANTY; without even the implied warranty of\n"
+"MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the\n"
+"GNU General Public License for more details.\n"
+"\n"
+"You should have received a copy of the GNU General Public License\n"
+"along with this program; if not, write to the Free Software\n"
+"Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA\n"
+msgstr ""
+
+#: src/apps/jtag/jtag.c:485 src/apps/jtag/jtag.c:508 src/apps/jtag/jtag.c:531
+#, c-format
+msgid "Out of memory\n"
+msgstr "Nedostatok pamäte\n"
+
+#: src/apps/jtag/jtag.c:493
+#, c-format
+msgid "Unable to open file `%s'!\n"
+msgstr "Nepodarilo sa otvoriť súbor `%s'!\n"
+
+#: src/apps/jtag/jtag.c:520
+#, fuzzy, c-format
+msgid ""
+"\n"
+"%s #%s\n"
+"Copyright (C) 2002, 2003 ETC s.r.o.\n"
+"Copyright (C) 2007, 2008, 2009 Kolja Waschk and the respective authors\n"
+"\n"
+"%s is free software, covered by the GNU General Public License, and you are\n"
+"welcome to change it and/or distribute copies of it under certain "
+"conditions.\n"
+"There is absolutely no warranty for %s.\n"
+"\n"
+msgstr ""
+"%s\n"
+"Autorské práva © 2002, 2003 ETC s.r.o.\n"
+"%s je voľný softvér, pokrytý Všeobecnou verejnou licenciou GNU a môžete ho\n"
+"meniť a/alebo distribuovať jeho kópie za určitých podmienok.\n"
+"Neposkytuje sa žiadna záruka pre %s.\n"
+"\n"
+
+#: src/apps/jtag/jtag.c:537
+#, fuzzy, c-format
+msgid "%s may damage your hardware!\n"
+msgstr ""
+"Upozornenie: %s môže poškodiť váš hardvér! Napíšte \"quit\" pre ukončenie!\n"
+"\n"
+
+#: src/apps/jtag/jtag.c:539
+#, fuzzy
+msgid ""
+"Type \"quit\" to exit, \"help\" for help.\n"
+"\n"
+msgstr ""
+"Napíšte \"help\" pre získanie pomoci.\n"
+"\n"
+
+#: bsdl_bison.y:268
+msgid "Unsupported BSDL construct found"
+msgstr ""
+
+#: bsdl_bison.y:331
+msgid "Error in Instruction_Opcode attribute statement"
+msgstr ""
+
+#: bsdl_bison.y:344
+msgid "Multiple opcode patterns are not supported, first pattern will be used"
+msgstr ""
+
+#: bsdl_bison.y:375
+msgid "Error in Opcode List"
+msgstr ""
+
+#: bsdl_bison.y:461
+msgid "Error in Boundary Cell description"
+msgstr ""
+
+#: bsdl_bison.y:586
+#, fuzzy
+msgid "Error in ISC_Pin_Behavior Definition"
+msgstr "Chyba: Neplatná dĺžka záznamu!\n"
+
+#: bsdl_bison.y:598
+#, fuzzy
+msgid "Error in ISC_Fixed_System_Pins Definition"
+msgstr "Chyba: Neplatná dĺžka záznamu!\n"
+
+#: bsdl_bison.y:625
+#, fuzzy
+msgid "Error in ISC_Security Definition"
+msgstr "Chyba: Neplatná dĺžka záznamu!\n"
+
+#: bsdl_bison.y:659
+#, fuzzy
+msgid "Error in ISC_Flow Definition"
+msgstr "Chyba: Neplatná dĺžka záznamu!\n"
+
+#: bsdl_bison.y:823
+#, fuzzy
+msgid "Error in ISC_Procedure Definition"
+msgstr "Chyba: Neplatná dĺžka záznamu!\n"
+
+#: bsdl_bison.y:847
+#, fuzzy
+msgid "Error in ISC_Action Definition"
+msgstr "Chyba: Neplatná dĺžka záznamu!\n"
+
+#: bsdl_bison.y:890 bsdl_bison.y:904 vhdl_bison.y:674
+#, c-format
+msgid "Line %d, %s.\n"
+msgstr ""
+
+#: src/bsdl/bsdl.c:117
+#, c-format
+msgid "Reading file '%s'\n"
+msgstr ""
+
+#: src/bsdl/bsdl.c:138
+#, c-format
+msgid "BSDL file '%s' passed VHDL stage correctly\n"
+msgstr ""
+
+#: src/bsdl/bsdl.c:145
+#, c-format
+msgid "BSDL file '%s' passed BSDL stage correctly\n"
+msgstr ""
+
+#: src/bsdl/bsdl.c:152
+#, c-format
+msgid "BSDL file '%s' contains errors in VHDL stage, stopping\n"
+msgstr ""
+
+#: src/bsdl/bsdl.c:293 src/tap/detect.c:372
+#, c-format
+msgid " Filename: %s\n"
+msgstr " Súbor: %s\n"
+
+#: src/bsdl/bsdl.c:305
+#, fuzzy, c-format
+msgid "Cannot open directory %s\n"
+msgstr "Nepodarilo sa otvoriť %s\n"
+
+#: src/bsdl/bsdl_sem.c:204
+msgid "No IDCODE specification found.\n"
+msgstr ""
+
+#: src/bsdl/bsdl_sem.c:649
+msgid "IDCODE matched\n"
+msgstr ""
+
+#: src/bsdl/bsdl_sem.c:651
+msgid "IDCODE mismatch\n"
+msgstr ""
+
+#: src/bsdl/bsdl_sem.c:699
+msgid "BSDL stage reported errors, aborting.\n"
+msgstr ""
+
+#: src/bsdl/bsdl_sem.c:706
+#, c-format
+msgid "Got IDCODE: %s\n"
+msgstr ""
+
+#: vhdl_bison.y:231
+msgid "Improper Entity declaration"
+msgstr ""
+
+#: vhdl_bison.y:232
+msgid "Check if source file is BSDL"
+msgstr ""
+
+#: vhdl_bison.y:242 vhdl_bison.y:250
+#, fuzzy
+msgid "Syntax Error"
+msgstr "Chyba syntaxe!\n"
+
+#: vhdl_bison.y:260
+msgid "Improper Port declaration"
+msgstr ""
+
+#: vhdl_bison.y:292
+#, fuzzy
+msgid "Error in Package declaration(s)"
+msgstr "Chyba: Neplatná dĺžka záznamu!\n"
+
+#: vhdl_bison.y:317
+#, fuzzy
+msgid "Error in Standard Package"
+msgstr "Chyba: Neplatná dĺžka záznamu!\n"
+
+#: vhdl_bison.y:335
+#, fuzzy
+msgid "Error in Standard Declarations"
+msgstr "Chyba: Neplatná dĺžka záznamu!\n"
+
+#: vhdl_bison.y:346
+#, fuzzy
+msgid "Error in Attribute type identification"
+msgstr "Chyba: Neplatná dĺžka záznamu!\n"
+
+#: vhdl_bison.y:362
+#, fuzzy
+msgid "Error in Type definition"
+msgstr "Chyba: Neplatná dĺžka záznamu!\n"
+
+#: vhdl_bison.y:378
+#, fuzzy
+msgid "Error in Bit definition"
+msgstr "Chyba: Neplatná dĺžka záznamu!\n"
+
+#: vhdl_bison.y:389
+#, fuzzy
+msgid "Error in Record Definition"
+msgstr "Chyba: Neplatná dĺžka záznamu!\n"
+
+#: vhdl_bison.y:402
+#, fuzzy
+msgid "Error in defered constant"
+msgstr "Chyba: Neplatná dĺžka záznamu!\n"
+
+#: vhdl_bison.y:414
+#, fuzzy
+msgid "Error in Package Body definition"
+msgstr "Chyba: Neplatná dĺžka záznamu!\n"
+
+#: vhdl_bison.y:426
+#, fuzzy
+msgid "Error in Cell Constant definition"
+msgstr "Chyba: Neplatná dĺžka záznamu!\n"
+
+#: vhdl_bison.y:437
+#, fuzzy
+msgid "Error in Cell Data Record"
+msgstr "Chyba: Pripojenie kábla zlyhalo!\n"
+
+#: vhdl_bison.y:446
+#, fuzzy
+msgid "Error in Cell_Type Function field"
+msgstr "Chyba: Pripojenie kábla zlyhalo!\n"
+
+#: vhdl_bison.y:453
+#, fuzzy
+msgid "Error in BScan_Inst Instruction field"
+msgstr "Chyba: Pripojenie kábla zlyhalo!\n"
+
+#: vhdl_bison.y:460
+#, fuzzy
+msgid "Error in Constant CAP data source field"
+msgstr "Chyba: Neplatná dĺžka záznamu!\n"
+
+#: vhdl_bison.y:484
+#, fuzzy
+msgid "Error in User-Defined Package declarations"
+msgstr "Chyba: Neplatná dĺžka záznamu!\n"
+
+#: vhdl_bison.y:491
+msgid "Unknown VHDL statement"
+msgstr ""
+
+#: vhdl_bison.y:514
+#, fuzzy
+msgid "Error in Attribute specification"
+msgstr "Chyba: Neplatná dĺžka záznamu!\n"
+
+#: vhdl_bison.y:669
+#, c-format
+msgid "In Package %s, Line %d, %s.\n"
+msgstr ""
+
+#: vhdl_bison.y:687
+msgid "Too many errors"
+msgstr ""
+
+#: src/bus/au1500.c:124
+#, fuzzy, c-format
+msgid "AU1500 compatible bus driver via BSR (JTAG part No. %d)\n"
+msgstr ""
+"Intel SA-1110 kompatibilný ovládač zbernice cez BSR (JTAG súčiastka č. %d)\n"
+
+#: src/bus/au1500.c:301
+msgid "AU1500 BUS Driver via BSR"
+msgstr ""
+
+#: src/bus/avr32.c:153
+#, fuzzy, c-format
+msgid "%s: instr=%s\n"
+msgstr "%-13s %s\n"
+
+#: src/bus/avr32.c:158
+#, fuzzy, c-format
+msgid "%s: ret=%s\n"
+msgstr "%-13s %s\n"
+
+#: src/bus/avr32.c:172
+#, fuzzy, c-format
+msgid "%s: data=%s\n"
+msgstr "%-13s %s\n"
+
+#: src/bus/avr32.c:175
+#, c-format
+msgid "%s: data out=%s\n"
+msgstr ""
+
+#: src/bus/avr32.c:196
+#, c-format
+msgid "%s: slave=%01x, addr=%08lx, %s\n"
+msgstr ""
+
+#: src/bus/avr32.c:222 src/bus/avr32.c:248 src/bus/avr32.c:322
+#: src/bus/avr32.c:334
+#, fuzzy, c-format
+msgid "%s: data=%08lx\n"
+msgstr "%-13s %s\n"
+
+#: src/bus/avr32.c:292
+#, fuzzy, c-format
+msgid "%s: addr=%08lx, mode=%s\n"
+msgstr "adresa: 0x%08X"
+
+#: src/bus/avr32.c:383
+#, fuzzy, c-format
+msgid "%s: read status %08lx\n"
+msgstr "%s: Neplatný stav: %2X\n"
+
+#: src/bus/avr32.c:417
+#, fuzzy, c-format
+msgid "%s: status=%08lx\n"
+msgstr "%s: Neplatný stav: %2X\n"
+
+#: src/bus/avr32.c:613
+#, fuzzy, c-format
+msgid "AVR32 multi-mode bus driver (JTAG part No. %d)\n"
+msgstr ""
+"Intel SA-1110 kompatibilný ovládač zbernice cez BSR (JTAG súčiastka č. %d)\n"
+
+#: src/bus/avr32.c:695
+#, fuzzy, c-format
+msgid "%s:addr=%08lx\n"
+msgstr "adresa: 0x%08X"
+
+#: src/bus/avr32.c:806
+msgid ""
+"Atmel AVR32 multi-mode bus driver, requires <mode> parameter\n"
+" valid <mode> parameters:\n"
+" x8: 8 bit bus for the uncached HSB area, via OCD registers\n"
+" x16: 16 bit bus for the uncached HSB area, via OCD "
+"registers\n"
+" x32: 32 bit bus for the uncached HSB area, via OCD "
+"registers\n"
+" OCD : 32 bit bus for the OCD registers\n"
+" HSBC: 32 bit bus for the cached HSB area, via SAB\n"
+" HSBU: 32 bit bus for the uncached HSB area, via SAB"
+msgstr ""
+
+#: src/bus/bcm1250.c:115
+#, c-format
+msgid "Broadcom BCM1250 compatible bus driver via BSR (JTAG part No. %d)\n"
+msgstr ""
+"Broadcom BCM1250 kompatibilný ovládač zbernice cez BSR (JTAG súčiastka č. %"
+"d)\n"
+
+#: src/bus/bcm1250.c:525
+msgid "Broadcom BCM1250 compatible bus driver via BSR"
+msgstr "Broadcom BCM1250 kompatibilný ovládač zbernice cez BSR"
+
+#: src/bus/bf533_ezkit.c:139
+#, fuzzy, c-format
+msgid "Blackfin BF533 EZKit compatible bus driver via BSR (JTAG part No. %d)\n"
+msgstr ""
+"Broadcom BCM1250 kompatibilný ovládač zbernice cez BSR (JTAG súčiastka č. %"
+"d)\n"
+
+#: src/bus/bf533_ezkit.c:324
+msgid "Blackfin BF533 EZKit board bus driver"
+msgstr ""
+
+#: src/bus/bf533_stamp.c:145
+#, fuzzy, c-format
+msgid "Blackfin BF533 compatible bus driver via BSR (JTAG part No. %d)\n"
+msgstr ""
+"Broadcom BCM1250 kompatibilný ovládač zbernice cez BSR (JTAG súčiastka č. %"
+"d)\n"
+
+#: src/bus/bf533_stamp.c:332
+msgid "Blackfin BF533 Stamp board bus driver"
+msgstr ""
+
+#: src/bus/bf537_stamp.c:315 src/bus/pxa2x0.c:251
+#, fuzzy, c-format
+msgid "%s (JTAG part No. %d)\n"
+msgstr ""
+"Intel SA-1110 kompatibilný ovládač zbernice cez BSR (JTAG súčiastka č. %d)\n"
+
+#: src/bus/bf537_stamp.c:335
+#, fuzzy
+msgid "Blackfin BF537 Stamp board bus driver via BSR"
+msgstr ""
+"Broadcom BCM1250 kompatibilný ovládač zbernice cez BSR (JTAG súčiastka č. %"
+"d)\n"
+
+#: src/bus/bf537_stamp.c:345
+#, fuzzy
+msgid "Blackfin BF537 EZ-KIT board bus driver via BSR"
+msgstr ""
+"Broadcom BCM1250 kompatibilný ovládač zbernice cez BSR (JTAG súčiastka č. %"
+"d)\n"
+
+#: src/bus/bf537_stamp.c:355
+#, fuzzy
+msgid "Blackfin BF527 EZ-KIT board bus driver via BSR"
+msgstr ""
+"Broadcom BCM1250 kompatibilný ovládač zbernice cez BSR (JTAG súčiastka č. %"
+"d)\n"
+
+#: src/bus/bf537_stamp.c:365
+#, fuzzy
+msgid "Blackfin BF538F EZ-KIT board bus driver"
+msgstr ""
+"Broadcom BCM1250 kompatibilný ovládač zbernice cez BSR (JTAG súčiastka č. %"
+"d)\n"
+
+#: src/bus/bf537_stamp.c:375
+#, fuzzy
+msgid "Blackfin BF526 EZ-KIT board bus driver"
+msgstr ""
+"Broadcom BCM1250 kompatibilný ovládač zbernice cez BSR (JTAG súčiastka č. %"
+"d)\n"
+
+#: src/bus/bf548_ezkit.c:140
+#, fuzzy, c-format
+msgid ""
+"Blackfin BF548 EZ-KIT compatible bus driver via BSR (JTAG part No. %d)\n"
+msgstr ""
+"Broadcom BCM1250 kompatibilný ovládač zbernice cez BSR (JTAG súčiastka č. %"
+"d)\n"
+
+#: src/bus/bf548_ezkit.c:314
+msgid "Blackfin BF548 EZ-KIT board bus driver"
+msgstr ""
+
+#: src/bus/bf561_ezkit.c:145
+#, fuzzy, c-format
+msgid ""
+"Blackfin BF561 EZ-KIT compatible bus driver via BSR (JTAG part No. %d)\n"
+msgstr ""
+"Hitachi SH7751R kompatibilný ovládač zbernice cez BSR (JTAG súčiastka č. %"
+"d)\n"
+
+#: src/bus/bf561_ezkit.c:337
+msgid "Blackfin BF561 EZ-KIT board bus driver"
+msgstr ""
+
+#: src/bus/bscoach.c:137
+#, fuzzy, c-format
+msgid ""
+"Goepel electronic Boundary Scan Coach compatible bus driver via BSR (JTAG "
+"part No. %d)\n"
+msgstr ""
+"Hitachi SH7727 kompatibilný ovládač zbernice cez BSR (JTAG súčiastka č. %d)\n"
+
+#: src/bus/bscoach.c:378
+msgid ""
+"Goepel Boundary Scan Coach compatible bus driver for flash programming via "
+"BSR"
+msgstr ""
+
+#: src/bus/buses.c:182 src/bus/buses.c:219
+#, c-format
+msgid "realloc(%s,%zd) fails"
+msgstr ""
+
+#: src/bus/buses.c:242
+#, fuzzy
+msgid "invalid bus number"
+msgstr "%s: neplatné číslo zbernice\n"
+
+#: src/bus/buses.c:284
+#, fuzzy, c-format
+msgid "Initialized bus %d, active bus %d\n"
+msgstr "inicializovať ovládač zbernice pre aktívnu súčiastku"
+
+#: src/bus/ejtag.c:137
+#, fuzzy, c-format
+msgid "EJTAG compatible bus driver via PrAcc (JTAG part No. %d)\n"
+msgstr ""
+"Intel SA-1110 kompatibilný ovládač zbernice cez BSR (JTAG súčiastka č. %d)\n"
+
+#: src/bus/ejtag.c:168
+msgid "EJADDRESS, EJDATA or EJCONTROL register not found"
+msgstr ""
+
+#: src/bus/ejtag.c:189
+#, c-format
+msgid "Reset occurred, ctrl=%s"
+msgstr ""
+
+#: src/bus/ejtag.c:196
+#, c-format
+msgid "No processor access, ctrl=%s"
+msgstr ""
+
+#: src/bus/ejtag.c:210
+#, c-format
+msgid "PrAcc bad alignment: addr=0x%08lx"
+msgstr ""
+
+#: src/bus/ejtag.c:225
+#, c-format
+msgid "%s(%d) PrAcc write: addr=0x%08lx data=0x%08lx\n"
+msgstr ""
+
+#: src/bus/ejtag.c:236
+#, c-format
+msgid "Unknown write addr=0x%08lx data=0x%08lx"
+msgstr ""
+
+#: src/bus/ejtag.c:297
+msgid "EJCONTROL or EJIMPCODE register not found"
+msgstr ""
+
+#: src/bus/ejtag.c:546
+#, c-format
+msgid "Failed to enter debug mode, ctrl=%s"
+msgstr ""
+
+#: src/bus/ejtag.c:761
+#, fuzzy
+msgid "EJTAG compatible bus driver via PrAcc"
+msgstr "Intel PXA2x0 kompatibilný ovládač zbernice cez BSR"
+
+#: src/bus/fjmem.c:108 src/part/part.c:348
+#, fuzzy
+msgid "invalid instruction length"
+msgstr "neplatná dĺžka inštrukcie\n"
+
+#: src/bus/fjmem.c:397
+msgid "Parameter for instruction opcode missing"
+msgstr ""
+
+#: src/bus/fjmem.c:475
+#, fuzzy, c-format
+msgid "fjmem FPGA bus driver via USER register (JTAG part No. %d)\n"
+msgstr ""
+"Intel SA-1110 kompatibilný ovládač zbernice cez BSR (JTAG súčiastka č. %d)\n"
+
+#: src/bus/fjmem.c:610 src/bus/fjmem.c:645 src/bus/fjmem.c:680
+#: src/bus/fjmem.c:716 src/bus/jopcyc.c:557 src/bus/jopcyc.c:596
+#: src/bus/jopcyc.c:628 src/bus/jopcyc.c:662 src/bus/zefant-xs3.c:707
+#: src/bus/zefant-xs3.c:780 src/bus/zefant-xs3.c:831 src/bus/zefant-xs3.c:887
+msgid "Address out of range"
+msgstr ""
+
+#: src/bus/fjmem.c:733
+msgid ""
+"FPGA JTAG memory bus driver via USER register, requires parameters:\n"
+" opcode=<USERx OPCODE> [len=<FJMEM REG LEN>]"
+msgstr ""
+
+#: src/bus/ixp425.c:117
+#, c-format
+msgid "Intel IXP425 compatible bus driver via BSR (JTAG part No. %d)\n"
+msgstr ""
+"Intel IXP425 kompatibilný ovládač zbernice cez BSR (JTAG súčiastka č. %d)\n"
+
+#: src/bus/ixp425.c:290
+msgid "Intel IXP425 compatible bus driver via BSR"
+msgstr "Intel IXP425 kompatibilný ovládač zbernice cez BSR"
+
+#: src/bus/jopcyc.c:344
+#, fuzzy, c-format
+msgid ""
+"JOP.design Cyclone Board compatible bus driver via BSR (JTAG part No. %d)\n"
+msgstr ""
+"Broadcom BCM1250 kompatibilný ovládač zbernice cez BSR (JTAG súčiastka č. %"
+"d)\n"
+
+#: src/bus/jopcyc.c:694
+#, fuzzy
+msgid "JOP.design Cyclone Board compatible bus driver via BSR"
+msgstr "Broadcom BCM1250 kompatibilný ovládač zbernice cez BSR"
+
+#: src/bus/lh7a400.c:139
+#, fuzzy, c-format
+msgid "Sharp LH7A400 compatible bus driver via BSR (JTAG part No. %d)\n"
+msgstr ""
+"Hitachi SH7750R kompatibilný ovládač zbernice cez BSR (JTAG súčiastka č. %"
+"d)\n"
+
+#: src/bus/lh7a400.c:327
+#, fuzzy
+msgid "Sharp LH7A400 compatible bus driver via BSR (flash access only!)"
+msgstr ""
+"Hitachi SH7750R kompatibilný ovládač zbernice cez BSR (JTAG súčiastka č. %"
+"d)\n"
+
+#: src/bus/mpc5200.c:157
+#, fuzzy, c-format
+msgid "Freescale MPC5200 compatible bus driver via BSR (JTAG part No. %d)\n"
+msgstr ""
+"Intel PXA2x0 kompatibilný ovládač zbernice cez BSR (JTAG súčiastka č. %d)\n"
+
+#: src/bus/mpc5200.c:172
+msgid "LocalPlus Bus"
+msgstr ""
+
+#: src/bus/mpc5200.c:401
+#, fuzzy
+msgid "Freescale MPC5200 compatible bus driver via BSR, parameter: [mux]"
+msgstr "Intel PXA2x0 kompatibilný ovládač zbernice cez BSR"
+
+#: src/bus/mpc824x.c:112
+msgid ""
+" Bus width 64 exists in mpc824x, but not supported by UrJTAG currently"
+msgstr ""
+
+#: src/bus/mpc824x.c:117
+msgid " Only 8,32 and 64 bus width are supported for Banks 0 and 1"
+msgstr ""
+
+#: src/bus/mpc824x.c:129
+msgid ""
+"Usage: initbus mpc824x [width=WIDTH] [revbits] [dbgAddr] [dbgData]\n"
+"\n"
+" WIDTH data bus width - 8, 32, 64 (default 8)\n"
+" revbits reverse bits in data bus (default - no)\n"
+" dbgAddr display address bus state (default - no)\n"
+" dbgData display data bus state (default - no)\n"
+msgstr ""
+
+#: src/bus/mpc824x.c:155
+#, c-format
+msgid " Using default bus width %d\n"
+msgstr ""
+
+#: src/bus/mpc824x.c:244
+#, fuzzy, c-format
+msgid "Motorola MPC824x compatible bus driver via BSR (JTAG part No. %d)\n"
+msgstr ""
+"Intel PXA2x0 kompatibilný ovládač zbernice cez BSR (JTAG súčiastka č. %d)\n"
+
+#: src/bus/mpc824x.c:268
+msgid "Base ROM Interface (Bank 1)"
+msgstr ""
+
+#: src/bus/mpc824x.c:278 src/bus/mpc824x.c:297
+msgid "Base ROM Interface (Bank 0)"
+msgstr ""
+
+#: src/bus/mpc824x.c:327
+#, c-format
+msgid "Warning: unhandled bus width: %i"
+msgstr ""
+
+#: src/bus/mpc824x.c:350
+#, c-format
+msgid "Addr [%2d:0]: %06lX "
+msgstr ""
+
+#: src/bus/mpc824x.c:400
+#, c-format
+msgid "Data WR [%d:0]: %08lX "
+msgstr ""
+
+#: src/bus/mpc824x.c:446
+#, c-format
+msgid "Data RD [%d:0]: %08lX "
+msgstr ""
+
+#: src/bus/mpc824x.c:566
+#, fuzzy
+msgid "Motorola MPC824x compatible bus driver via BSR"
+msgstr "Intel PXA2x0 kompatibilný ovládač zbernice cez BSR"
+
+#: src/bus/ppc405ep.c:113
+#, fuzzy, c-format
+msgid "IBM PowerPC 405EP compatible bus driver via BSR (JTAG part No. %d)\n"
+msgstr ""
+"Intel IXP425 kompatibilný ovládač zbernice cez BSR (JTAG súčiastka č. %d)\n"
+
+#: src/bus/ppc405ep.c:267
+#, fuzzy
+msgid "IBM PowerPC 405EP compatible bus driver via BSR"
+msgstr "Intel IXP425 kompatibilný ovládač zbernice cez BSR"
+
+#: src/bus/ppc440gx_ebc8.c:113
+#, fuzzy, c-format
+msgid ""
+"IBM PowerPC 440GX 8-bit compatible bus driver via BSR (JTAG part No. %d)\n"
+msgstr ""
+"Intel IXP425 kompatibilný ovládač zbernice cez BSR (JTAG súčiastka č. %d)\n"
+
+#: src/bus/ppc440gx_ebc8.c:271
+#, fuzzy
+msgid "IBM PowerPC 440GX 8-bit EBC compatible bus driver via BSR"
+msgstr "Intel IXP425 kompatibilný ovládač zbernice cez BSR"
+
+#: src/bus/prototype.c:133
+#, c-format
+msgid "value %lu not defined for parameter %s"
+msgstr ""
+
+#: src/bus/prototype.c:166 src/cmd/cmd_get.c:71 src/cmd/cmd_set.c:98
+#: src/cmd/cmd_test.c:75
+#, fuzzy, c-format
+msgid "signal '%s' not found"
+msgstr "signál '%s' nenájdený\n"
+
+#: src/bus/prototype.c:210
+#, c-format
+msgid "parameter %s is unknown"
+msgstr ""
+
+#: src/bus/prototype.c:254
+msgid "parameters alsb=<signal> and/or amsb=<signal> are not defined"
+msgstr ""
+
+#: src/bus/prototype.c:314
+msgid "parameters dlsb=<signal> and/or dmsb=<signal> are not defined\n"
+msgstr ""
+
+#: src/bus/prototype.c:321
+msgid "parameter cs=<signal> or ncs=<signal> is not defined\n"
+msgstr ""
+
+#: src/bus/prototype.c:328
+msgid "parameter oe=<signal> or noe=<signal> is not defined\n"
+msgstr ""
+
+#: src/bus/prototype.c:335
+msgid "parameter we=<signal> or nwe=<signal> is not defined\n"
+msgstr ""
+
+#: src/bus/prototype.c:361
+#, fuzzy, c-format
+msgid "Configurable prototype bus driver via BSR (JTAG part No. %d)\n"
+msgstr ""
+"Intel SA-1110 kompatibilný ovládač zbernice cez BSR (JTAG súčiastka č. %d)\n"
+
+#: src/bus/prototype.c:517
+msgid ""
+"Configurable prototype bus driver via BSR, requires parameters:\n"
+" amsb=<addr MSB> alsb=<addr LSB> dmsb=<data MSB> dlsb=<data LSB>\n"
+" ncs=<CS#>|cs=<CS> noe=<OE#>|oe=<OE> nwe=<WE#>|we=<WE> [amode=auto|"
+"x8|x16|x32]"
+msgstr ""
+
+#: src/bus/pxa2x0.c:322 src/bus/pxa2x0.c:421
+msgid "Static Chip Select 0"
+msgstr "Statický výber čipu 0"
+
+#: src/bus/pxa2x0.c:392
+msgid "Memory Mapped registers (Memory Ctl)"
+msgstr "Pamäťovo mapované registre (Memory Ctl)"
+
+#: src/bus/pxa2x0.c:496
+msgid "PXA270 internal address space (cfg, SRAM)"
+msgstr ""
+
+#: src/bus/pxa2x0.c:516
+msgid "PXA270 SDRAM space (4x 64MB)"
+msgstr ""
+
+#: src/bus/pxa2x0.c:756
+msgid "Intel PXA2x0 compatible bus driver via BSR"
+msgstr "Intel PXA2x0 kompatibilný ovládač zbernice cez BSR"
+
+#: src/bus/pxa2x0.c:772
+#, fuzzy
+msgid "Intel PXA27x compatible bus driver via BSR"
+msgstr "Intel PXA2x0 kompatibilný ovládač zbernice cez BSR"
+
+#: src/bus/readmem.c:55 src/bus/writemem.c:49
+#, fuzzy
+msgid "Missing bus driver"
+msgstr "Chyba: Chýba ovládač zbernice!\n"
+
+#: src/bus/readmem.c:68 src/bus/writemem.c:62
+#, fuzzy
+msgid "Unknown bus width"
+msgstr "Neznáma šírka zbernice!\n"
+
+#: src/bus/readmem.c:81 src/bus/writemem.c:75
+#, fuzzy, c-format
+msgid "address: 0x%08lX\n"
+msgstr "adresa: 0x%08X\n"
+
+#: src/bus/readmem.c:83 src/bus/writemem.c:77
+#, fuzzy, c-format
+msgid "length: 0x%08lX\n"
+msgstr "dĺžka: 0x%08X\n"
+
+#: src/bus/readmem.c:88 src/bus/writemem.c:82
+#, fuzzy
+msgid "length is 0"
+msgstr "dĺžka je 0.\n"
+
+#: src/bus/readmem.c:94
+msgid "reading:\n"
+msgstr "čítam:\n"
+
+#: src/bus/readmem.c:120 src/bus/writemem.c:98
+#, fuzzy, c-format
+msgid "addr: 0x%08llX\r"
+msgstr "adresa: 0x%08X"
+
+#: src/bus/readmem.c:133 src/bus/writemem.c:144 src/flash/flash.c:258
+msgid ""
+"\n"
+"Done.\n"
+msgstr ""
+"\n"
+"Hotovo.\n"
+
+#: src/bus/s3c4510x.c:179
+#, fuzzy, c-format
+msgid ""
+"Samsung S3C4510B compatibile bus driver via BSR (JTAG part No. %d) RCS0=%"
+"ubit\n"
+msgstr ""
+"Samsung S3C4510B kompatibilný ovládač zbernice cez BSR (JTAG súčiastka č. %"
+"d)\n"
+
+#: src/bus/s3c4510x.c:427
+msgid "Samsung S3C4510B compatible bus driver via BSR"
+msgstr "Samsung S3C4510B kompatibilný ovládač zbernice cez BSR"
+
+#: src/bus/sa1110.c:124
+#, c-format
+msgid "Intel SA-1110 compatible bus driver via BSR (JTAG part No. %d)\n"
+msgstr ""
+"Intel SA-1110 kompatibilný ovládač zbernice cez BSR (JTAG súčiastka č. %d)\n"
+
+#: src/bus/sa1110.c:307
+msgid "Intel SA-1110 compatible bus driver via BSR"
+msgstr "Intel SA-1110 kompatibilný ovládač zbernice cez BSR"
+
+#: src/bus/sh7727.c:135
+#, c-format
+msgid "Hitachi SH7727 compatible bus driver via BSR (JTAG part No. %d)\n"
+msgstr ""
+"Hitachi SH7727 kompatibilný ovládač zbernice cez BSR (JTAG súčiastka č. %d)\n"
+
+#: src/bus/sh7727.c:347
+msgid "Hitachi SH7727 compatible bus driver via BSR"
+msgstr "Hitachi SH7727 kompatibilný ovládač zbernice cez BSR"
+
+#: src/bus/sh7750r.c:133
+#, c-format
+msgid "Hitachi SH7750R compatible bus driver via BSR (JTAG part No. %d)\n"
+msgstr ""
+"Hitachi SH7750R kompatibilný ovládač zbernice cez BSR (JTAG súčiastka č. %"
+"d)\n"
+
+#: src/bus/sh7750r.c:328
+msgid "Hitachi SH7750R compatible bus driver via BSR"
+msgstr "Hitachi SH7750R kompatibilný ovládač zbernice cez BSR"
+
+#: src/bus/sh7751r.c:127
+#, c-format
+msgid "Hitachi SH7751R compatible bus driver via BSR (JTAG part No. %d)\n"
+msgstr ""
+"Hitachi SH7751R kompatibilný ovládač zbernice cez BSR (JTAG súčiastka č. %"
+"d)\n"
+
+#: src/bus/sh7751r.c:316
+msgid "Hitachi SH7751R compatible bus driver via BSR"
+msgstr "Hitachi SH7751R kompatibilný ovládač zbernice cez BSR"
+
+#: src/bus/sharc21065l.c:121
+#, fuzzy, c-format
+msgid ""
+"Analog Device's SHARC 21065L compatible bus driver via BSR (JTAG part No. %"
+"d)\n"
+msgstr ""
+"Intel SA-1110 kompatibilný ovládač zbernice cez BSR (JTAG súčiastka č. %d)\n"
+
+#: src/bus/sharc21065l.c:135
+msgid "Boot Memory Select"
+msgstr ""
+
+#: src/bus/sharc21065l.c:316
+#, fuzzy
+msgid "SHARC_21065L compatible bus driver via BSR"
+msgstr "Intel SA-1110 kompatibilný ovládač zbernice cez BSR"
+
+#: src/bus/slsup3.c:169
+#, fuzzy, c-format
+msgid "SLS UP3 bus driver via BSR (JTAG part No. %d)\n"
+msgstr ""
+"Intel SA-1110 kompatibilný ovládač zbernice cez BSR (JTAG súčiastka č. %d)\n"
+
+#: src/bus/slsup3.c:181
+msgid "Flash Memory (2 MByte) byte mode"
+msgstr ""
+
+#: src/bus/slsup3.c:191
+msgid "SRAM 128KByte (64K x 16)"
+msgstr ""
+
+#: src/bus/slsup3.c:201
+msgid "LCD Display (RS select by A0)"
+msgstr ""
+
+#: src/bus/slsup3.c:440
+#, fuzzy
+msgid "SLS UP3 compatible bus driver via BSR"
+msgstr "Intel IXP425 kompatibilný ovládač zbernice cez BSR"
+
+#: src/bus/tx4925.c:137
+#, fuzzy, c-format
+msgid "Toshiba TX4925 compatible bus driver via BSR (JTAG part No. %d)\n"
+msgstr ""
+"Intel IXP425 kompatibilný ovládač zbernice cez BSR (JTAG súčiastka č. %d)\n"
+
+#: src/bus/tx4925.c:311
+#, fuzzy
+msgid "Toshiba TX4925 compatible bus driver via BSR"
+msgstr "Intel IXP425 kompatibilný ovládač zbernice cez BSR"
+
+#: src/bus/writemem.c:88
+#, fuzzy
+msgid "writing:\n"
+msgstr "čítam:\n"
+
+#: src/bus/writemem.c:103
+#, c-format
+msgid "Short read: bc=0x%zX\n"
+msgstr ""
+
+#: src/bus/writemem.c:110
+#, fuzzy, c-format
+msgid "Unexpected end of file; Addr: 0x%08llX\n"
+msgstr "Chyba: neočakávaný koniec súboru\n"
+
+#: src/bus/zefant-xs3.c:419
+#, fuzzy, c-format
+msgid ""
+"Simple Solutions Zefant-XS3 Board compatible bus driver via BSR (JTAG part "
+"No. %d)\n"
+msgstr ""
+"Hitachi SH7727 kompatibilný ovládač zbernice cez BSR (JTAG súčiastka č. %d)\n"
+
+#: src/bus/zefant-xs3.c:756 src/bus/zefant-xs3.c:806 src/bus/zefant-xs3.c:864
+#: src/bus/zefant-xs3.c:981
+#, fuzzy
+msgid "Component type not supported"
+msgstr "Nepodporovaná flash pamäť!\n"
+
+#: src/bus/zefant-xs3.c:988
+#, fuzzy
+msgid "Simple Solutions Zefant-XS3 Board compatible bus driver via BSR"
+msgstr "Samsung S3C4510B kompatibilný ovládač zbernice cez BSR"
+
+#: src/cmd/cmd_bit.c:88
+#, fuzzy, c-format
+msgid "%s: unable to get boundary bit number for command '%s'"
+msgstr "neplatné číslo hraničného bitu\n"
+
+#: src/cmd/cmd_bit.c:97
+#, fuzzy, c-format
+msgid "%s: invalid bit type length for command '%s'"
+msgstr "flash: neplatná sekvencia príkazov\n"
+
+#: src/cmd/cmd_bit.c:125
+#, fuzzy, c-format
+msgid "%s: invalid bit type for command '%s'"
+msgstr "flash: neplatná sekvencia príkazov\n"
+
+#: src/cmd/cmd_bit.c:134
+#, fuzzy, c-format
+msgid "%s: invalid default value length for command '%s'"
+msgstr "flash: neplatná sekvencia príkazov\n"
+
+#: src/cmd/cmd_bit.c:149
+#, fuzzy, c-format
+msgid "%s: invalid default value '%s' for command '%s'"
+msgstr "flash: neplatná sekvencia príkazov\n"
+
+#: src/cmd/cmd_bit.c:167
+#, fuzzy, c-format
+msgid "%s: unable to get control bit number for command '%s'"
+msgstr "neplatné číslo riadiaceho bitu\n"
+
+#: src/cmd/cmd_bit.c:175
+#, fuzzy, c-format
+msgid "%s: invalid control value length for command '%s'"
+msgstr "neplatné číslo riadiaceho bitu\n"
+
+#: src/cmd/cmd_bit.c:200
+#, c-format
+msgid ""
+"Usage: %s NUMBER TYPE DEFAULT SIGNAL [CBIT CVAL CSTATE]\n"
+"Define new BSR (Boundary Scan Register) bit for SIGNAL, with\n"
+"DEFAULT value.\n"
+"\n"
+"NUMBER Bit number in the BSR\n"
+"TYPE Bit type, valid values are I, O, B, C, and X\n"
+"DEFAULT Default (safe) bit value, valid values are 1, 0, ?\n"
+"SIGNAL Associated signal name\n"
+"CBIT Control bit number\n"
+"CVAL Control value\n"
+"CSTATE Control state, valid state is only Z\n"
+msgstr ""
+"Použitie: %s ČÍSLO TYP PREDVOLENÉ SIGNÁL [RBIT RHOD RSTAV]\n"
+"Definuje nový BSR (Boundary Scan Register) bit pre SIGNÁL,\n"
+"s PREDVOLENOU hodnotou.\n"
+"\n"
+"ČÍSLO Čislo bitu v BSR\n"
+"TYP Typ bitu, platné hodnoty sú I, O, B, C a X\n"
+"PREDVOLENÉ Predvolená (bezpečná) hodnota bitu,\n"
+" platné hodnoty sú 1, O, ?\n"
+"SIGNÁL Názov prideleného signálu\n"
+"RBIT Číslo riadiaceho bitu\n"
+"RHOD Riadiaca hodnota\n"
+"RSTAV Riadiaci stav, platný stav je len Z\n"
+
+#: src/cmd/cmd_bit.c:216
+msgid "define new BSR bit"
+msgstr "definuje nový BSR bit"
+
+#: src/cmd/cmd_bsdl.c:124
+#, c-format
+msgid ""
+"Usage: %s path PATHLIST\n"
+"Usage: %s test [FILE]\n"
+"Usage: %s dump [FILE]\n"
+"Usage: %s debug on|off\n"
+"Manage BSDL files\n"
+"\n"
+"PATHLIST semicolon separated list of directory paths to search for BSDL "
+"files\n"
+"FILE file containing part description in BSDL format\n"
+msgstr ""
+
+#: src/cmd/cmd_bsdl.c:137
+msgid "manage BSDL files"
+msgstr ""
+
+#: src/cmd/cmd_bus.c:71
+#, c-format
+msgid ""
+"Usage: %s BUS\n"
+"Change active bus.\n"
+"\n"
+"BUS bus number\n"
+msgstr ""
+"Použitie: %s ZBERNICA\n"
+"Zmeniť aktívnu zbernicu.\n"
+"\n"
+"ZBERNICA číslo zbernice\n"
+
+#: src/cmd/cmd_bus.c:79
+msgid "change active bus"
+msgstr "zmeniť aktívnu zbernicu"
+
+#: src/cmd/cmd_cable.c:98
+#, fuzzy, c-format
+msgid "Unknown cable type: '%s'"
+msgstr "Neznámy kábel: %s\n"
+
+#: src/cmd/cmd_cable.c:167
+#, c-format
+msgid ""
+"Usage: %s DRIVER [DRIVER_OPTS]\n"
+"Select JTAG cable type.\n"
+"\n"
+"DRIVER name of cable\n"
+"DRIVER_OPTS options for the selected cable\n"
+"\n"
+"Type \"cable DRIVER help\" for info about options for cable DRIVER.\n"
+"\n"
+"List of supported cables:\n"
+msgstr ""
+
+#: src/cmd/cmd_cable.c:179 src/cmd/cmd_help.c:53
+#, c-format
+msgid "%-13s %s\n"
+msgstr "%-13s %s\n"
+
+#: src/cmd/cmd_cable.c:185
+msgid "select JTAG cable"
+msgstr "nastaviť JTAG kábel"
+
+#: src/cmd/cmd_cmd.c:164
+#, fuzzy, c-format
+msgid "%s: Ambiguous command\n"
+msgstr "%s: neznámy príkaz\n"
+
+#: src/cmd/cmd_cmd.c:167 src/cmd/cmd_help.c:70
+#, c-format
+msgid "%s: unknown command\n"
+msgstr "%s: neznámy príkaz\n"
+
+#: src/cmd/cmd_debug.c:86
+#, c-format
+msgid "Current log level is '%s'\n"
+msgstr ""
+
+#: src/cmd/cmd_debug.c:117
+#, c-format
+msgid ""
+"Usage: %s LEVEL\n"
+"Set logging/debugging level.\n"
+"\n"
+"LEVEL:\n"
+"all every single bit as it is transmitted\n"
+"comm low level communication details\n"
+"debug more details of interest for developers\n"
+"detail verbose output\n"
+"normal just noteworthy info\n"
+"warning unmissable warnings\n"
+"error only fatal errors\n"
+"silent suppress logging output\n"
+msgstr ""
+
+#: src/cmd/cmd_debug.c:133
+msgid "set logging/debugging level"
+msgstr ""
+
+#: src/cmd/cmd_detect.c:62
+#, c-format
+msgid ""
+"Usage: %s\n"
+"Detect parts on the JTAG chain.\n"
+"\n"
+"Output from this command is a list of the detected parts.\n"
+"If no parts are detected other commands may not work properly.\n"
+msgstr ""
+"Použitie: %s\n"
+"Detekovať súčiastky v JTAG reťazci.\n"
+"\n"
+"Výstupom tohoto príkazu je zoznam zdetekovaných súčiastok.\n"
+"Ak nie sú súčiastky zdetekované, ostatné príkazy nemusia fungovať\n"
+"správne.\n"
+
+#: src/cmd/cmd_detect.c:72
+msgid "detect parts on the JTAG chain"
+msgstr "detekovať súčiastky v JTAG reťazci"
+
+#: src/cmd/cmd_detectflash.c:52 src/cmd/cmd_peekpoke.c:57
+#: src/cmd/cmd_peekpoke.c:139 src/cmd/cmd_readmem.c:57
+#: src/cmd/cmd_writemem.c:55
+msgid "Bus missing"
+msgstr ""
+
+#: src/cmd/cmd_detectflash.c:66
+#, fuzzy, c-format
+msgid ""
+"Usage: %s ADDRESS\n"
+"Detect flash memory type connected to a part.\n"
+"\n"
+"ADDRESS Base address for memory region\n"
+msgstr ""
+"Použitie: %s\n"
+"Detekovať typ flash pamäte pripojený k súčiastke.\n"
+
+#: src/cmd/cmd_detectflash.c:75
+msgid "detect parameters of flash chips attached to a part"
+msgstr "detekovať parametre čipov flash pripojených k súčiastke"
+
+#: src/cmd/cmd_discovery.c:57
+#, c-format
+msgid ""
+"Usage: %s\n"
+"Discovery of unknown parts in the JTAG chain.\n"
+"\n"
+"'%s' attempts to detect these parameters of an unknown JTAG\n"
+"chain:\n"
+" 1. IR (instruction register) length\n"
+" 2. DR (data register) length for all possible instructions\n"
+"\n"
+"Warning: This may be dangerous for some parts (especially if the\n"
+"part doesn't have TRST signal).\n"
+msgstr ""
+"Použitie: %s\n"
+"Preskúmať neznáme súčiastky v JTAG reťazci.\n"
+"\n"
+"'%s' sa pokúša detekovať tieto parametre neznámeho JTAG\n"
+"reťazca:\n"
+" 1. dĺžku IR (inštrukčného registra)\n"
+" 2. dĺžku DR (dátového rgistra) pre všetky možné inštrukcie\n"
+"\n"
+"Upozornenie: Toto môže byť nebezpečné pre niektoré súčiastky\n"
+"(hlavne v prípade, ak súčiastka nemá TRST signál).\n"
+
+#: src/cmd/cmd_discovery.c:72
+msgid "discovery of unknown parts in the JTAG chain"
+msgstr "preskúmať neznáme súčiastky v JTAG reťazci"
+
+#: src/cmd/cmd_dr.c:69
+#, fuzzy, c-format
+msgid "%s: part without active instruction"
+msgstr "%s: súčiastka bez aktívnej inštrukcie\n"
+
+#: src/cmd/cmd_dr.c:76
+#, fuzzy, c-format
+msgid "%s: instruction without active data register"
+msgstr "%s: súčiastka bez aktívneho dátového registra\n"
+
+#: src/cmd/cmd_dr.c:101
+#, c-format
+msgid "%s: register length %d mismatch: %zd"
+msgstr ""
+
+#: src/cmd/cmd_dr.c:118
+#, c-format
+msgid "%s\n"
+msgstr "%s\n"
+
+#: src/cmd/cmd_dr.c:127
+#, fuzzy, c-format
+msgid ""
+"Usage: %s [DIR]\n"
+"Usage: %s BITSTRING\n"
+"Display input or output data register content or set current register.\n"
+"\n"
+"DIR requested data register; possible values: 'in' for\n"
+" input and 'out' for output; default is 'out'\n"
+"BITSTRING set current data register with BITSTRING (e.g. 01010)\n"
+msgstr ""
+"Použitie: %s [SMER]\n"
+"Zobraziť obsah vstupného alebo výstupného dátového registra.\n"
+"\n"
+"SMER požadovaný dátový register; možné hodnoty sú: 'in'\n"
+" pre vstupný a 'out' pre výstupný; predvolená hodnota\n"
+" je 'out'\n"
+
+#: src/cmd/cmd_dr.c:139
+msgid "display active data register for a part"
+msgstr "zobraziť akívny dátový register pre súčiastku"
+
+#: src/cmd/cmd_endian.c:52
+msgid "Endianess for external files: big\n"
+msgstr "Poradie bajtov pre externé súbory: big endian\n"
+
+#: src/cmd/cmd_endian.c:55
+msgid "Endianess for external files: little\n"
+msgstr "Poradie bajtov pre externé súbory: little endian\n"
+
+#: src/cmd/cmd_endian.c:79
+#, c-format
+msgid ""
+"Usage: %s\n"
+"Set or print endianess for external files.\n"
+msgstr ""
+"Použitie: %s\n"
+"Nastaviť alebo vypísať poradie bajtov pre externá súbory.\n"
+
+#: src/cmd/cmd_endian.c:86
+msgid "set/print endianess"
+msgstr "nastaviť/vypísať poradie bajtov"
+
+#: src/cmd/cmd_eraseflash.c:57 src/cmd/cmd_flashmem.c:60
+#: src/cmd/cmd_peekpoke.c:62 src/cmd/cmd_peekpoke.c:144
+#, fuzzy
+msgid "Bus driver missing"
+msgstr "Chyba: Chýba ovládač zbernice.\n"
+
+#: src/cmd/cmd_eraseflash.c:74
+#, c-format
+msgid ""
+"Usage: %s ADDR BLOCKS\n"
+"Erase flash memory from ADDR.\n"
+"\n"
+"ADDR target addres for erasing block\n"
+"BLOCKS number of blocks to erase\n"
+"\n"
+"ADDR and BLOCKS could be in decimal or hexadecimal (prefixed with 0x) form.\n"
+"\n"
+"Supported Flash Memories:\n"
+msgstr ""
+"Použitie: %s ADRESA BLOKY\n"
+"Vymazať pamäť flash od ADRESY.\n"
+"\n"
+"ADRESA cieľová adresa pre vymazanie bloku\n"
+"BLOKY počet blokov na vymazanie\n"
+"\n"
+"ADRESA a BLOKY môžu byť v desiatkovom alebo šestnástkovom (začína s 0x)\n"
+"tvare.\n"
+"\n"
+"Podporované pamäte flash:\n"
+
+#: src/cmd/cmd_eraseflash.c:86 src/cmd/cmd_flashmem.c:112
+#, c-format
+msgid ""
+"%s\n"
+" %s\n"
+msgstr ""
+"%s\n"
+" %s\n"
+
+#: src/cmd/cmd_eraseflash.c:92
+msgid "erase flash memory by number of blocks"
+msgstr "vymazať pamäť flash podľa počtu blokov"
+
+#: src/cmd/cmd_flashmem.c:76 src/cmd/cmd_writemem.c:66
+#, fuzzy, c-format
+msgid "Unable to open file `%s'"
+msgstr "Nepodarilo sa otvoriť súbor `%s'!\n"
+
+#: src/cmd/cmd_flashmem.c:96
+#, fuzzy, c-format
+msgid ""
+"Usage: %s ADDR FILENAME [noverify]\n"
+"Usage: %s FILENAME [noverify]\n"
+"Program FILENAME content to flash memory.\n"
+"\n"
+"ADDR target address for raw binary image\n"
+"FILENAME name of the input file\n"
+"%-10s FILENAME is in MS .bin format (for WinCE)\n"
+"%-10s if specified, verification is skipped\n"
+"\n"
+"ADDR could be in decimal or hexadecimal (prefixed with 0x) form.\n"
+"\n"
+"Supported Flash Memories:\n"
+msgstr ""
+"Použitie: %s ADRESA SÚBOR\n"
+"Použitie: %s SÚBOR\n"
+"Naprogramovať obsah SÚBORu do flash pamäte.\n"
+"\n"
+"ADRESA cieľová adresa pre priamy binárny obraz\n"
+"SÚBOR názov vstupného súboru\n"
+"%-10s SÚBOR je vo formáte MS .bin (pre WinCE)\n"
+"\n"
+"ADRESA môže byť v desiatkovom alebo šestnástkovom (začína s 0x) tvare.\n"
+"\n"
+"Podporované pamäte flash:\n"
+
+#: src/cmd/cmd_flashmem.c:118
+msgid "burn flash memory with data from a file"
+msgstr "napáliť dáta zo súboru do pamäte flash"
+
+#: src/cmd/cmd_frequency.c:55
+#, fuzzy, c-format
+msgid "Current TCK frequency is %lu Hz\n"
+msgstr "Aktuálna frekvencia TCK je %u Hz\n"
+
+#: src/cmd/cmd_frequency.c:63
+#, fuzzy, c-format
+msgid "Setting TCK frequency to %lu Hz\n"
+msgstr "Nastavujem frekvenciu TCK na %u Hz\n"
+
+#: src/cmd/cmd_frequency.c:74
+#, c-format
+msgid ""
+"Usage: %s [FREQ]\n"
+"Change TCK frequency to FREQ or print current TCK frequency.\n"
+"\n"
+"FREQ is in hertz. It's a maximum TCK frequency for JTAG interface.\n"
+"In some cases the TCK frequency is less than FREQ, but the frequency\n"
+"is never more than FREQ. Maximum supported frequency depends on JTAG\n"
+"adapter.\n"
+"\n"
+"FREQ must be an unsigned integer. Minimum allowed frequency is 1 Hz.\n"
+"Use 0 for FREQ to disable frequency limit.\n"
+msgstr ""
+"Použitie: %s [FREK]\n"
+"Zmeniť frekvenciu TCK na FREK alebo vypísať aktuálnu frekvenciu TCK.\n"
+"\n"
+"FREK je v hertzoch. Je to maximálna frekvencia TCK pre JTAG rozhranie.\n"
+"V niektorých prípadoch je frekvencia TCK menšia ako FREK, ale nikdy\n"
+"nie je väčšia ako FREK. Maximálna podporovaná frekvencia závisí od\n"
+"JTAG adapéra.\n"
+"\n"
+"FREK musí byť celé číslo bez znamienka. Minimálna povolená frekvencia\n"
+"je 1 Hz. Ak chcete vypnúť obmedzenie frekvencie, použite 0 pre FREK.\n"
+
+#: src/cmd/cmd_frequency.c:89
+msgid "setup JTAG frequency"
+msgstr "nastaviť JTAG frekvenciu"
+
+#: src/cmd/cmd_get.c:79
+#, c-format
+msgid "%s = %d\n"
+msgstr "%s = %d\n"
+
+#: src/cmd/cmd_get.c:88
+#, fuzzy, c-format
+msgid ""
+"Usage: %s signal SIGNAL\n"
+"Get signal state from output BSR (Boundary Scan Register).\n"
+"\n"
+"SIGNAL signal name (from JTAG declaration file)\n"
+msgstr ""
+"Použitie: %s SIGNÁL\n"
+"Získať stav signálu z výstupného BSR (Boundary Scan Register).\n"
+"\n"
+"SIGNÁL názov signálu (zo súboru JTAG deklarácií)\n"
+
+#: src/cmd/cmd_get.c:97
+msgid "get external signal value"
+msgstr "získať hodnotu externého signálu"
+
+#: src/cmd/cmd_help.c:51
+msgid ""
+"Command list:\n"
+"\n"
+msgstr ""
+"Zoznam príkazov:\n"
+"\n"
+
+#: src/cmd/cmd_help.c:55
+msgid "(no description available)"
+msgstr "(popis je nedostupný)"
+
+#: src/cmd/cmd_help.c:57
+msgid ""
+"\n"
+"Type \"help COMMAND\" for details about a particular command.\n"
+msgstr ""
+"\n"
+"Napíšte \"help PRÍKAZ\" a získate podrobnosti o príslušnom príkaze.\n"
+
+#: src/cmd/cmd_help.c:79
+#, c-format
+msgid ""
+"Usage: %s [COMMAND]\n"
+"Print short help for COMMAND, or list of available commands.\n"
+msgstr ""
+"Použitie: %s [PRÍKAZ]\n"
+"Vypísať krátku pomoc pre PRÍKAZ alebo zoznam dostupných príkazov.\n"
+
+#: src/cmd/cmd_help.c:86
+msgid "display this help"
+msgstr "zobraziť túto pomoc"
+
+#: src/cmd/cmd_idcode.c:55
+#, c-format
+msgid "Reading %lu bytes of idcode\n"
+msgstr ""
+
+#: src/cmd/cmd_idcode.c:63
+#, c-format
+msgid ""
+"Usage: %s [BYTES]\n"
+"Read [BYTES] IDCODEs of all parts in a JTAG chain.\n"
+"\n"
+"BYTES must be an unsigned integer, and the default is 0.\n"
+"If BYTES is 0, IDCODEs will be read until 32 consecutive zeros are found.\n"
+msgstr ""
+
+#: src/cmd/cmd_idcode.c:73
+#, fuzzy
+msgid "Read IDCODEs of all parts in a JTAG chain"
+msgstr "preskúmať neznáme súčiastky v JTAG reťazci"
+
+#: src/cmd/cmd_include.c:58
+msgid "Please use the 'include' command instead of 'script'\n"
+msgstr ""
+
+#: src/cmd/cmd_include.c:82
+#, fuzzy, c-format
+msgid ""
+"Usage: %s FILENAME [n] \n"
+"Run command sequence n times from external FILENAME.\n"
+"\n"
+"FILENAME Name of the file with commands\n"
+msgstr ""
+"Použitie: %s SÚBOR\n"
+"Spustiť príkazovú sekvenciu z externého SÚBORu.\n"
+"\n"
+"SÚBOR Názov súboru s príkazmi\n"
+
+#: src/cmd/cmd_include.c:102
+msgid "include command sequence from external repository"
+msgstr "vložiť sekvenciu príkazov zo štandardného externého súboru"
+
+#: src/cmd/cmd_include.c:121
+msgid "run command sequence from external file"
+msgstr "spustiť sekvenciu príkazov z externého súboru"
+
+#: src/cmd/cmd_initbus.c:66
+#, fuzzy, c-format
+msgid "Unknown bus: %s"
+msgstr "Neznáma zbernica: %s\n"
+
+#: src/cmd/cmd_initbus.c:96
+#, c-format
+msgid ""
+"Usage: %s BUSNAME\n"
+"Initialize new bus driver for active part.\n"
+"\n"
+"BUSNAME Name of the bus\n"
+"\n"
+"List of available buses:\n"
+msgstr ""
+"Použitie: %s ZBERNICA\n"
+"Inicializovať nový ovládač zbernice pre aktívnu súčiastku.\n"
+"\n"
+"ZBERNICA Názov zbernice\n"
+"\n"
+"Zoznam dostupných zberníc:\n"
+
+#: src/cmd/cmd_initbus.c:105
+#, c-format
+msgid "%-10s %s\n"
+msgstr "%-10s %s\n"
+
+#: src/cmd/cmd_initbus.c:111
+msgid "initialize bus driver for active part"
+msgstr "inicializovať ovládač zbernice pre aktívnu súčiastku"
+
+#: src/cmd/cmd_instruction.c:60
+#, fuzzy, c-format
+msgid "%s: unknown instruction '%s'"
+msgstr "%s: neznáma inštrukcia '%s'\n"
+
+#: src/cmd/cmd_instruction.c:101
+#, c-format
+msgid ""
+"Usage: %s INSTRUCTION\n"
+"Usage: %s length LENGTH\n"
+"Usage: %s INSTRUCTION CODE REGISTER\n"
+"Change active INSTRUCTION for a part or declare new instruction.\n"
+"\n"
+"INSTRUCTION instruction name (e.g. BYPASS)\n"
+"LENGTH common instruction length\n"
+"CODE instruction code (e.g. 11111)\n"
+"REGISTER default data register for instruction (e.g. BR)\n"
+msgstr ""
+"Použitie: %s INŠTRUKCIA\n"
+"Použitie: %s length DĹŽKA\n"
+"Použitie: %s INŠTRUKCIA KÓD REGISTER\n"
+"Zmeniť aktívnu INŠTRUKCIU pre súčiastku alebo deklarovať novú inštrukciu.\n"
+"\n"
+"INŠTRUKCIA názov inštrukcie (napr. BYPASS)\n"
+"DĹŽKA spoločná dĺžka inštrukcií\n"
+"KÓD kód inštrukcie (napr. 11111)\n"
+"REGISTER predvolený dátový register pre inštrukciu (napr. BR)\n"
+
+#: src/cmd/cmd_instruction.c:115
+msgid "change active instruction for a part or declare new instruction"
+msgstr ""
+"zmeniť aktívnu inštrukciu pre súčiastku alebo deklarovať novú inštrukciu"
+
+#: src/cmd/cmd_part.c:119
+#, fuzzy, c-format
+msgid "%s: invalid part number %lu, max %d"
+msgstr "%s: neplatné číslo súčiastky\n"
+
+#: src/cmd/cmd_part.c:136
+#, fuzzy, c-format
+msgid ""
+"Usage: %s PART\n"
+"Change active part for current JTAG chain.\n"
+"\n"
+"PART part number | alias\n"
+msgstr ""
+"Použitie: %s SÚČIASTKA\n"
+"Zmeniť aktívnu súčiastku pre aktuálny JTAG reťazec.\n"
+"\n"
+"SÚČIASTKA číslo súčiaskty\n"
+
+#: src/cmd/cmd_part.c:144
+msgid "change active part for current JTAG chain"
+msgstr "zmeniť aktívnu súčiastku pre aktuálny JTAG reťazec"
+
+#: src/cmd/cmd_peekpoke.c:80
+#, fuzzy, c-format
+msgid "URJ_BUS_READ(0x%08lx) = 0x%02lX (%li)\n"
+msgstr "bus_read(0x%08x) = 0x%08X (%i)\n"
+
+#: src/cmd/cmd_peekpoke.c:86
+#, fuzzy, c-format
+msgid "URJ_BUS_READ(0x%08lx) = 0x%04lX (%li)\n"
+msgstr "bus_read(0x%08x) = 0x%08X (%i)\n"
+
+#: src/cmd/cmd_peekpoke.c:91
+#, fuzzy, c-format
+msgid "URJ_BUS_READ(0x%08lx) = 0x%08lX (%li)\n"
+msgstr "bus_read(0x%08x) = 0x%08X (%i)\n"
+
+#: src/cmd/cmd_peekpoke.c:104
+#, c-format
+msgid ""
+"Usage: %s ADDR\n"
+"Read a single word (bus width size).\n"
+"\n"
+"ADDR address to read from\n"
+"\n"
+"ADDR could be in decimal or hexadecimal (prefixed with 0x) form.\n"
+"\n"
+msgstr ""
+"Použitie: %s ADRESA\n"
+"Prečítať jedno slovo (s veľkosťou šírky zbernice).\n"
+"\n"
+"ADRESA adresa, z ktorej čítať\n"
+"\n"
+"ADRESA môže byť v desiatkovom alebo šestnástkovom (začína s 0x) tvare.\n"
+
+#: src/cmd/cmd_peekpoke.c:116
+msgid "read a single word"
+msgstr "prečítať jedno slovo"
+
+#: src/cmd/cmd_peekpoke.c:167
+#, fuzzy, c-format
+msgid ""
+"Usage: %s ADDR VAL [ADDR VAL] ... \n"
+"Write a single word (bus width size).\n"
+"\n"
+"ADDR address to write\n"
+"VAL value to write\n"
+"\n"
+"ADDR and VAL could be in decimal or hexadecimal (prefixed with 0x) form.\n"
+"\n"
+msgstr ""
+"Použitie: %s ADRESA HODNOTA\n"
+"Zapísať jedno slovo (s veľkosťou šírky zbernice).\n"
+"\n"
+"ADRESA adresa pre zápis\n"
+"HODNOTA zapisovaná hodnota\n"
+"\n"
+"ADRESA a HODNOTA môžu byť v desiatkovom alebo šestnástkovom (začína s 0x)\n"
+"tvare.\n"
+"\n"
+
+#: src/cmd/cmd_peekpoke.c:180
+msgid "write a single word"
+msgstr "zapísať jedno slovo"
+
+#: src/cmd/cmd_pod.c:105
+#, c-format
+msgid ""
+"Usage: %s SIGNAL=# [SIGNAL=# ...]\n"
+"Set state of POD signal(s) to 0 or 1.\n"
+"\n"
+"SIGNAL TCK,TMS, TDI, TRST, or RESET\n"
+"# 0 or 1\n"
+msgstr ""
+
+#: src/cmd/cmd_pod.c:115
+msgid "Set state of POD signal(s)"
+msgstr ""
+
+#: src/cmd/cmd_print.c:124
+#, fuzzy, c-format
+msgid " Active %%-%ds %%-%ds\n"
+msgstr " Č. %%-%ds %%-%ds %%-%ds %%-%ds %%-%ds\n"
+
+#: src/cmd/cmd_print.c:130 src/cmd/cmd_print.c:134 src/cmd/cmd_print.c:139
+#: src/cmd/cmd_print.c:173 src/cmd/cmd_print.c:178 src/cmd/cmd_print.c:184
+#, c-format
+msgid "(%d) String conversion failed!\n"
+msgstr "(%d) Konverzia reťazca zlyhala!\n"
+
+#: src/cmd/cmd_print.c:131 src/cmd/cmd_print.c:136 src/cmd/cmd_print.c:175
+#: src/cmd/cmd_print.c:181
+msgid "Instruction"
+msgstr "Inštrukcia"
+
+#: src/cmd/cmd_print.c:131 src/cmd/cmd_print.c:136 src/cmd/cmd_print.c:175
+#: src/cmd/cmd_print.c:181
+msgid "Register"
+msgstr "Register"
+
+#: src/cmd/cmd_print.c:147
+#, fuzzy, c-format
+msgid " %%c %%-%ds %%-%ds\n"
+msgstr " Č. %%-%ds %%-%ds %%-%ds %%-%ds %%-%ds\n"
+
+#: src/cmd/cmd_print.c:165
+#, fuzzy, c-format
+msgid " No. %%-%ds %%-%ds %%-%ds %%-%ds %%-%ds\n"
+msgstr " Č. %%-%ds %%-%ds %%-%ds %%-%ds %%-%ds\n"
+
+#: src/cmd/cmd_print.c:174 src/cmd/cmd_print.c:180
+msgid "Manufacturer"
+msgstr "Výrobca"
+
+#: src/cmd/cmd_print.c:174 src/cmd/cmd_print.c:180
+msgid "Part"
+msgstr "Súčiastka"
+
+#: src/cmd/cmd_print.c:175 src/cmd/cmd_print.c:181
+msgid "Stepping"
+msgstr "Stupeň"
+
+#: src/cmd/cmd_print.c:200
+#, fuzzy, c-format
+msgid " %3d %s "
+msgstr " %3d "
+
+#: src/cmd/cmd_print.c:204 src/part/part.c:472
+#, c-format
+msgid " %3d "
+msgstr " %3d "
+
+#: src/cmd/cmd_print.c:218
+#, c-format
+msgid ""
+"\n"
+"Active bus:\n"
+"*%d: "
+msgstr ""
+"\n"
+"Aktívna zbernica:\n"
+"*%d: "
+
+#: src/cmd/cmd_print.c:228
+#, c-format
+msgid "Error in bus area discovery at 0x%08llX\n"
+msgstr "Chyba pri zisťovaní oblasti zbernice na adrese 0x%08llX\n"
+
+#: src/cmd/cmd_print.c:236
+#, fuzzy, c-format
+msgid "\tstart: 0x%08lX, length: 0x%08llX, data width: %d bit, (%s)\n"
+msgstr "\tzačiatok: 0x%08X, dĺžka: 0x%08llX, šírka údajov: %d bitov, (%s)\n"
+
+#: src/cmd/cmd_print.c:242
+#, fuzzy, c-format
+msgid "\tstart: 0x%08lX, length: 0x%08llX, data width: %d bit\n"
+msgstr "\tzačiatok: 0x%08X, dĺžka: 0x%08llX, šírka údajov: %d bitov\n"
+
+#: src/cmd/cmd_print.c:262
+#, c-format
+msgid "*%d: "
+msgstr "*%d: "
+
+#: src/cmd/cmd_print.c:264
+#, c-format
+msgid "%d: "
+msgstr "%d: "
+
+#: src/cmd/cmd_print.c:275
+#, fuzzy, c-format
+msgid ""
+"Usage: %s [chain|bus|signals|instructions]\n"
+"Display JTAG chain status.\n"
+"\n"
+"Display list of the parts connected to the JTAG chain including\n"
+"part number and current (active) instruction and data register.\n"
+msgstr ""
+"Použitie: %s [chain|bus]\n"
+"Zobraziť stav JTAG reťazca.\n"
+"\n"
+"Zobraziť zoznam súčiastok zapojených v JTAG reťazci vrátane čísla\n"
+"súčiastky a aktuálnej (aktívnej) inštrukcie a dátového registra.\n"
+
+#: src/cmd/cmd_print.c:285
+msgid "display JTAG chain list/status"
+msgstr "zobraziť zoznam/stav JTAG reťazca"
+
+#: src/cmd/cmd_quit.c:52
+#, c-format
+msgid ""
+"Usage: %s\n"
+"Exit from %s.\n"
+msgstr ""
+"Použitie: %s\n"
+"Ukončit %s.\n"
+
+#: src/cmd/cmd_quit.c:57
+msgid "exit and terminate this session"
+msgstr "ukončiť toto sedenie"
+
+#: src/cmd/cmd_readmem.c:68
+#, fuzzy, c-format
+msgid "Unable to create file `%s'"
+msgstr "Nepodarilo sa vytvoriť súbor `%s'!\n"
+
+#: src/cmd/cmd_readmem.c:81
+#, c-format
+msgid ""
+"Usage: %s ADDR LEN FILENAME\n"
+"Copy device memory content starting with ADDR to FILENAME file.\n"
+"\n"
+"ADDR start address of the copied memory area\n"
+"LEN copied memory length\n"
+"FILENAME name of the output file\n"
+"\n"
+"ADDR and LEN could be in decimal or hexadecimal (prefixed with 0x) form.\n"
+msgstr ""
+"Použitie: %s ADRESA DĹŽKA SÚBOR\n"
+"Kopírovať obsah pamäte zariadenia z ADRESY do SÚBORu.\n"
+"\n"
+"ADRESA začiatočná adresa kopírovanej oblasti pamäte\n"
+"DĹŽKA dĺžka kopírovanej pamäte\n"
+"SÚBOR názov výstupného súboru\n"
+"\n"
+"ADRESA a DĹŽKA môžu byť v desiatkovom alebo šestnástkovom (začína s 0x) "
+"tvare.\n"
+
+#: src/cmd/cmd_readmem.c:94
+msgid "read content of the memory and write it to file"
+msgstr "čítať obsah pamäte a zapísať ho do súboru"
+
+#: src/cmd/cmd_register.c:72
+#, c-format
+msgid ""
+"Usage: %s NAME LENGTH\n"
+"Define new data register with specified NAME and LENGTH.\n"
+"\n"
+"NAME Data register name\n"
+"LENGTH Data register length\n"
+msgstr ""
+"Použitie: %s NÁZOV DĹŽKA\n"
+"DEfinovať nový dátový register so zadaným NÁZVOM a DĹŽKOU.\n"
+"\n"
+"NÁZOV Názov dátového registra\n"
+"DĹŽKA Dĺžka dátového registra\n"
+
+#: src/cmd/cmd_register.c:82
+msgid "define new data register for a part"
+msgstr "definovať nový dátový register pre súčiastku"
+
+#: src/cmd/cmd_reset.c:58
+#, fuzzy, c-format
+msgid ""
+"Usage: %s\n"
+"Reset current JTAG chain.\n"
+msgstr "zmeniť aktívnu súčiastku pre aktuálny JTAG reťazec"
+
+#: src/cmd/cmd_reset.c:63
+#, fuzzy
+msgid "reset JTAG chain"
+msgstr "nastaviť JTAG kábel"
+
+#: src/cmd/cmd_salias.c:70
+#, fuzzy, c-format
+msgid "Signal '%s' not found"
+msgstr "signál '%s' nenájdený\n"
+
+#: src/cmd/cmd_salias.c:89
+#, fuzzy, c-format
+msgid ""
+"Usage: %s ALIAS SIGNAL\n"
+"Define new signal ALIAS as alias for existing SIGNAL.\n"
+"\n"
+"ALIAS New signal alias name\n"
+"SIGNAL Existing signal name\n"
+msgstr ""
+"Použitie: %s SIGNÁL [ZOZNAM...]\n"
+"DEfinovať nový signál s názvom SIGNÁL pre súčiastku.\n"
+"\n"
+"SIGNÁL Názov nového signálu\n"
+"ZOZNAM Zoznam nožičiek pre signál (nepoužité)\n"
+
+#: src/cmd/cmd_salias.c:99
+#, fuzzy
+msgid "define an alias for a signal"
+msgstr "definovať nový signál pre súčiastku"
+
+#: src/cmd/cmd_scan.c:71 src/part/part.c:220 src/part/part.c:273
+#, fuzzy
+msgid "Boundary Scan Register (BSR) not found"
+msgstr "%s(%s:%d) Boundary Scan Register (BSR) nebol nájdený\n"
+
+#: src/cmd/cmd_scan.c:85
+msgid "Part can't SAMPLE"
+msgstr ""
+
+#: src/cmd/cmd_scan.c:115
+#, fuzzy, c-format
+msgid ": %d > %d\n"
+msgstr "%s = %d\n"
+
+#: src/cmd/cmd_scan.c:129
+#, c-format
+msgid ""
+"Usage: %s [SIGNAL]* \n"
+"Read BSR and show changes since last scan.\n"
+msgstr ""
+
+#: src/cmd/cmd_scan.c:136
+msgid "read BSR and show changes since last scan"
+msgstr ""
+
+#: src/cmd/cmd_set.c:110
+#, c-format
+msgid ""
+"Usage: %s SIGNAL DIR [DATA]\n"
+"Set signal state in input BSR (Boundary Scan Register).\n"
+"\n"
+"SIGNAL signal name (from JTAG declaration file)\n"
+"DIR requested signal direction; possible values: 'in' or 'out'\n"
+"DATA desired output signal value ('0' or '1'); used only if DIR\n"
+" is 'out'\n"
+msgstr ""
+"Použitie: %s SIGNÁL SMER [DÁTA]\n"
+"Nastaviť stav signálu vo vstupnom BSR (Boundary Scan Register).\n"
+"\n"
+"SIGNÁL názov signálu (zo súboru JTAG deklarácií)\n"
+"SMER požadovaný smer signálu; možné hodnoty sú: 'in' alebo 'out'\n"
+"DÁTA želaná hodnota výstupného signálu ('0' alebo '1'); použité "
+"len\n"
+" ak SMER je 'out'\n"
+
+#: src/cmd/cmd_set.c:122
+msgid "set external signal value"
+msgstr "nastaviť hodnotu externého signálu"
+
+#: src/cmd/cmd_shell.c:91
+#, c-format
+msgid ""
+"Usage: %s cmmd\n"
+"Shell out to os for a command.\n"
+"\n"
+"CMMD OS Shell Command\n"
+msgstr ""
+
+#: src/cmd/cmd_shell.c:99
+msgid "shell cmmd"
+msgstr ""
+
+#: src/cmd/cmd_shift.c:74
+#, c-format
+msgid ""
+"Usage: %s\n"
+"Usage: %s\n"
+"Shift instruction or data register through JTAG chain.\n"
+msgstr ""
+"Použitie: %s\n"
+"Použitie: %s\n"
+"Posunúť inštrukčný alebo dátový register cez JTAG reťazec.\n"
+
+#: src/cmd/cmd_shift.c:82
+msgid "shift data/instruction registers through JTAG chain"
+msgstr "posunúť dátové/inštrukčné registre cez JTAG reťazec"
+
+#: src/cmd/cmd_signal.c:66 src/part/signal.c:114
+#, fuzzy, c-format
+msgid "Signal '%s' already defined"
+msgstr "Signál '%s' je už definovaný\n"
+
+#: src/cmd/cmd_signal.c:96
+#, fuzzy, c-format
+msgid ""
+"Usage: %s SIGNAL [PIN#]\n"
+"Define new signal with name SIGNAL for a part.\n"
+"\n"
+"SIGNAL New signal name\n"
+"PIN# List of pin # for a signal\n"
+msgstr ""
+"Použitie: %s SIGNÁL [ZOZNAM...]\n"
+"DEfinovať nový signál s názvom SIGNÁL pre súčiastku.\n"
+"\n"
+"SIGNÁL Názov nového signálu\n"
+"ZOZNAM Zoznam nožičiek pre signál (nepoužité)\n"
+
+#: src/cmd/cmd_signal.c:106
+msgid "define new signal for a part"
+msgstr "definovať nový signál pre súčiastku"
+
+#: src/cmd/cmd_svf.c:103
+#, c-format
+msgid ""
+"Usage: %s FILE [stop] [progress] [ref_freq=<frequency>]\n"
+"Execute svf commands from FILE.\n"
+"stop : Command execution stops upon TDO mismatch.\n"
+"progress : Continually displays progress status.\n"
+"ref_freq : Use <frequency> as the reference for 'RUNTEST xxx SEC' commands\n"
+"\n"
+"FILE file containing SVF commands\n"
+msgstr ""
+
+#: src/cmd/cmd_svf.c:114
+msgid "execute svf commands from file"
+msgstr ""
+
+#: src/cmd/cmd_test.c:93
+#, fuzzy, c-format
+msgid "<FAIL>%s = %d"
+msgstr "%s = %d\n"
+
+#: src/cmd/cmd_test.c:104
+#, fuzzy, c-format
+msgid ""
+"Usage: %s SIGNAL 0/1\n"
+"Test signal state from output BSR (Boundary Scan Register).\n"
+"\n"
+"SIGNAL signal name (from JTAG declaration file)\n"
+msgstr ""
+"Použitie: %s SIGNÁL\n"
+"Získať stav signálu z výstupného BSR (Boundary Scan Register).\n"
+"\n"
+"SIGNÁL názov signálu (zo súboru JTAG deklarácií)\n"
+
+#: src/cmd/cmd_test.c:113
+#, fuzzy
+msgid "test external signal value"
+msgstr "získať hodnotu externého signálu"
+
+#: src/cmd/cmd_usleep.c:63
+#, c-format
+msgid ""
+"Usage: %s USECS\n"
+"Sleep some number of microseconds.\n"
+msgstr ""
+
+#: src/cmd/cmd_usleep.c:70
+msgid "Sleep some number of microseconds"
+msgstr ""
+
+#: src/cmd/cmd_writemem.c:79
+#, fuzzy, c-format
+msgid ""
+"Usage: %s ADDR LEN FILENAME\n"
+"Write to device memory starting at ADDR the FILENAME file.\n"
+"\n"
+"ADDR start address of the written memory area\n"
+"LEN written memory length\n"
+"FILENAME name of the input file\n"
+"\n"
+"ADDR and LEN could be in decimal or hexadecimal (prefixed with 0x) form.\n"
+"NOTE: This is NOT useful for FLASH programming!\n"
+msgstr ""
+"Použitie: %s ADRESA DĹŽKA SÚBOR\n"
+"Kopírovať obsah pamäte zariadenia z ADRESY do SÚBORu.\n"
+"\n"
+"ADRESA začiatočná adresa kopírovanej oblasti pamäte\n"
+"DĹŽKA dĺžka kopírovanej pamäte\n"
+"SÚBOR názov výstupného súboru\n"
+"\n"
+"ADRESA a DĹŽKA môžu byť v desiatkovom alebo šestnástkovom (začína s 0x) "
+"tvare.\n"
+
+#: src/cmd/cmd_writemem.c:93
+msgid "write content of file to the memory"
+msgstr ""
+
+#: src/flash/amd.c:311
+msgid ""
+"Chip: AMD Flash\n"
+"\tManufacturer: "
+msgstr ""
+"Čip: AMD Flash\n"
+"\tVýrobca: "
+
+#: src/flash/amd.c:316 src/flash/amd.c:345 src/flash/amd.c:361
+#: src/flash/amd.c:380 src/flash/amd.c:396 src/flash/amd_flash.c:266
+msgid ""
+"\n"
+"\tChip: "
+msgstr ""
+"\n"
+"\tČip: "
+
+#: src/flash/amd.c:339 src/flash/amd.c:355 src/flash/amd.c:374
+#: src/flash/amd.c:390 src/flash/amd.c:403 src/flash/amd_flash.c:278
+#, c-format
+msgid "Unknown (ID 0x%04x)"
+msgstr "Neznámy (ID 0x%04x)"
+
+#: src/flash/amd.c:408
+#, fuzzy, c-format
+msgid "Unknown manufacturer (ID 0x%04x) Chip (ID 0x%04x)"
+msgstr "Neznámy výrobca (ID 0x%04x)"
+
+#: src/flash/amd.c:412 src/flash/amd_flash.c:281
+#, c-format
+msgid ""
+"\n"
+"\tProtected: %04x\n"
+msgstr ""
+"\n"
+"\tChránené: %04x\n"
+
+#: src/flash/amd.c:635 src/flash/amd.c:647 src/flash/amd.c:659
+#: src/flash/detectflash.c:117 src/flash/detectflash.c:149
+msgid "AMD/Fujitsu Standard Command Set"
+msgstr "Štandardná množina príkazov AMD/Fujitsu"
+
+#: src/flash/amd.c:636
+msgid "supported: AMD 29LV640D, 29LV641D, 29LV642D; 2x16 Bit"
+msgstr "podporované: AMD 29LV640D, 29LV641D, 29LV642D; 2x16 bitov"
+
+#: src/flash/amd.c:648
+#, fuzzy
+msgid "supported: AMD 29LV800B, S29GLxxxN; MX29LV640B, W19B320AT/B; 1x16 Bit"
+msgstr "podporované: AMD 29LV800B; 1x16 bitov"
+
+#: src/flash/amd.c:660
+#, fuzzy
+msgid ""
+"supported: AMD 29LV160, AMD 29LV065D, AMD 29LV040B, S29GLxxxN, W19B320AT/B; "
+"1x8 Bit"
+msgstr "podporované: AMD 29LV640D, 29LV641D, 29LV642D; 2x16 bitov"
+
+#: src/flash/amd_flash.c:260
+#, fuzzy
+msgid ""
+"Chip: AMD Flash\n"
+"\tPartNumber: "
+msgstr ""
+"Čip: AMD Flash\n"
+"\tVýrobca: "
+
+#: src/flash/amd_flash.c:263
+#, c-format
+msgid "Unknown manufacturer (ID 0x%04x)"
+msgstr "Neznámy výrobca (ID 0x%04x)"
+
+#: src/flash/amd_flash.c:271
+msgid "5V Flash\n"
+msgstr ""
+
+#: src/flash/amd_flash.c:275
+msgid "3V Flash\n"
+msgstr ""
+
+#: src/flash/amd_flash.c:414
+#, fuzzy
+msgid "AMD Standard Command Set"
+msgstr "Štandardná množina príkazov AMD/Fujitsu"
+
+#: src/flash/amd_flash.c:415
+#, fuzzy
+msgid "supported: AMD 29LV040B, 29C040B, 1x8 Bit"
+msgstr "podporované: AMD 29LV800B; 1x16 bitov"
+
+#: src/flash/detectflash.c:65
+msgid "bus driver"
+msgstr ""
+
+#: src/flash/detectflash.c:97
+#, fuzzy
+msgid "Flash not found"
+msgstr "Pamäť flash nebola nájdená!\n"
+
+#: src/flash/detectflash.c:106
+msgid "Query identification string:\n"
+msgstr "Identifikačný reťazec:\n"
+
+#: src/flash/detectflash.c:111 src/flash/detectflash.c:143
+msgid "null"
+msgstr "nič"
+
+#: src/flash/detectflash.c:114 src/flash/detectflash.c:146
+msgid "Intel/Sharp Extended Command Set"
+msgstr "Rozšírená sada príkazov Intel/Sharp"
+
+#: src/flash/detectflash.c:120 src/flash/detectflash.c:152
+#: src/flash/intel.c:530 src/flash/intel.c:542 src/flash/intel.c:554
+msgid "Intel Standard Command Set"
+msgstr "Štandardná sada príkazov Intel"
+
+#: src/flash/detectflash.c:123 src/flash/detectflash.c:155
+msgid "AMD/Fujitsu Extended Command Set"
+msgstr "Rozšírená sada príkazov AMD/Fujitsu"
+
+#: src/flash/detectflash.c:126 src/flash/detectflash.c:158
+msgid "Mitsubishi Standard Command Set"
+msgstr "Štandardná sada príkazov Mitsubishi"
+
+#: src/flash/detectflash.c:129 src/flash/detectflash.c:161
+msgid "Mitsubishi Extended Command Set"
+msgstr "Rozšírená sada príkazov Mitsubishi"
+
+#: src/flash/detectflash.c:132 src/flash/detectflash.c:164
+msgid "Page Write Command Set"
+msgstr "Sada príkazov Page Write"
+
+#: src/flash/detectflash.c:135 src/flash/detectflash.c:167
+#: src/flash/detectflash.c:225
+msgid "unknown!!!"
+msgstr "neznáma!!!"
+
+#: src/flash/detectflash.c:138
+#, c-format
+msgid ""
+"\tPrimary Algorithm Command Set and Control Interface ID Code: 0x%04X (%s)\n"
+msgstr ""
+"\tID kód sady príkazov a riadiaceho rozhrania primárneho algoritmu: 0x%04X (%"
+"s)\n"
+
+#: src/flash/detectflash.c:170
+#, c-format
+msgid ""
+"\tAlternate Algorithm Command Set and Control Interface ID Code: 0x%04X (%"
+"s)\n"
+msgstr ""
+"\tID kód sady príkazov a riadiaceho rozhrania alternatívneho algoritmu: 0x%"
+"04X (%s)\n"
+
+#: src/flash/detectflash.c:174
+msgid "Query system interface information:\n"
+msgstr "Informácie systémového rozhrania:\n"
+
+#: src/flash/detectflash.c:175
+#, c-format
+msgid "\tVcc Logic Supply Minimum Write/Erase or Write voltage: %d mV\n"
+msgstr ""
+"\tVcc minimálne napäte zdroja logiky pre zápis/vymazávanie alebo zápis: %d "
+"mV\n"
+
+#: src/flash/detectflash.c:177
+#, c-format
+msgid "\tVcc Logic Supply Maximum Write/Erase or Write voltage: %d mV\n"
+msgstr ""
+"\tVcc maximálne napätie zdroja logiky pre zápis/vymazávanie alebo zápis: %d "
+"mV\n"
+
+#: src/flash/detectflash.c:179
+#, c-format
+msgid "\tVpp [Programming] Supply Minimum Write/Erase voltage: %d mV\n"
+msgstr ""
+"\tVpp [programovanie] minimálne napátie zdroja pre zápis/vymazanie: %d mV\n"
+
+#: src/flash/detectflash.c:181
+#, c-format
+msgid "\tVpp [Programming] Supply Maximum Write/Erase voltage: %d mV\n"
+msgstr ""
+"\tVpp [programovanie] maximálne napätie zdroja pre zápis/programovanie: %d "
+"mV\n"
+
+#: src/flash/detectflash.c:183
+#, c-format
+msgid "\tTypical timeout per single byte/word program: %d us\n"
+msgstr "\tTypický časový limit pre programovanie jedného bajtu/slova: %d µs\n"
+
+#: src/flash/detectflash.c:185
+#, c-format
+msgid "\tTypical timeout for maximum-size multi-byte program: %d us\n"
+msgstr ""
+"\tTypický časový limit pre programovanie maximálnej viacbajtovej sekvencie: %"
+"d µs\n"
+
+#: src/flash/detectflash.c:187
+#, c-format
+msgid "\tTypical timeout per individual block erase: %d ms\n"
+msgstr "\tTypický časový limit pre vymazanie jedného bloku: %d ms\n"
+
+#: src/flash/detectflash.c:189
+#, c-format
+msgid "\tTypical timeout for full chip erase: %d ms\n"
+msgstr "\tTypický časový limit pre vymazanie celého čipu: %d ms\n"
+
+#: src/flash/detectflash.c:191
+#, c-format
+msgid "\tMaximum timeout for byte/word program: %d us\n"
+msgstr "\tMaximálny časový limit pre programovanie bajtu/slova: %d µs\n"
+
+#: src/flash/detectflash.c:193
+#, c-format
+msgid "\tMaximum timeout for multi-byte program: %d us\n"
+msgstr ""
+"\tMaximálny časový limit pre programovanie viacbajtovej sekvencie: %d µs\n"
+
+#: src/flash/detectflash.c:195
+#, c-format
+msgid "\tMaximum timeout per individual block erase: %d ms\n"
+msgstr "\tMaximálny časový limit pre vymazanie jedného bloku: %d ms\n"
+
+#: src/flash/detectflash.c:197
+#, c-format
+msgid "\tMaximum timeout for chip erase: %d ms\n"
+msgstr "\tMaximálny časový limit pre vymazanie čipu: %d ms\n"
+
+#: src/flash/detectflash.c:201
+msgid "Device geometry definition:\n"
+msgstr "Definícia geometrie zariadenia:\n"
+
+#: src/flash/detectflash.c:202
+#, c-format
+msgid "\tDevice Size: %d B (%d KiB, %d MiB)\n"
+msgstr "\tVeľkosť zariadenia: %d B (%d KiB, %d MiB)\n"
+
+#: src/flash/detectflash.c:210
+msgid "x8"
+msgstr "x8"
+
+#: src/flash/detectflash.c:213
+msgid "x16"
+msgstr "x16"
+
+#: src/flash/detectflash.c:216
+msgid "x8/x16"
+msgstr "x8/x16"
+
+#: src/flash/detectflash.c:219
+msgid "x32"
+msgstr "x32"
+
+#: src/flash/detectflash.c:222
+msgid "x16/x32"
+msgstr "x16/x32"
+
+#: src/flash/detectflash.c:228
+#, c-format
+msgid "\tFlash Device Interface Code description: 0x%04X (%s)\n"
+msgstr "\tPopisný kód rozhrania flash zariadenia: 0x%04X (%s)\n"
+
+#: src/flash/detectflash.c:230
+#, c-format
+msgid "\tMaximum number of bytes in multi-byte program: %d\n"
+msgstr "\tMaximálny počet bajtov pri viacbajtovom programovaní: %d\n"
+
+#: src/flash/detectflash.c:232
+#, c-format
+msgid "\tNumber of Erase Block Regions within device: %d\n"
+msgstr "\tPočet oblastí vymazávnia blokov v zariadení: %d\n"
+
+#: src/flash/detectflash.c:234
+msgid "\tErase Block Region Information:\n"
+msgstr "\tInformácie o oblasti vymazávania blokov:\n"
+
+#: src/flash/detectflash.c:240
+#, c-format
+msgid "\t\tRegion %d:\n"
+msgstr "\t\tOblasť %d:\n"
+
+#: src/flash/detectflash.c:241
+#, c-format
+msgid "\t\t\tErase Block Size: %d B (%d KiB)\n"
+msgstr "\t\t\tVeľkosť vymazávacieho bloku: %d B (%d KiB)\n"
+
+#: src/flash/detectflash.c:246
+#, c-format
+msgid "\t\t\tNumber of Erase Blocks: %d\n"
+msgstr "\t\t\tPočet vymazávacích blokov: %d\n"
+
+#: src/flash/detectflash.c:260
+msgid "Required"
+msgstr ""
+
+#: src/flash/detectflash.c:260
+msgid "Not required"
+msgstr ""
+
+#: src/flash/detectflash.c:263
+msgid "Supported"
+msgstr ""
+
+#: src/flash/detectflash.c:263 src/flash/detectflash.c:277
+#: src/flash/detectflash.c:288
+#, fuzzy
+msgid "Not supported"
+msgstr "Nepodporovaná flash pamäť!\n"
+
+#: src/flash/detectflash.c:266
+msgid "170-nm Floating Gate technology"
+msgstr ""
+
+#: src/flash/detectflash.c:267
+msgid "230-nm MirrorBit(tm) technology"
+msgstr ""
+
+#: src/flash/detectflash.c:268
+msgid "130-nm Floating Gate technology"
+msgstr ""
+
+#: src/flash/detectflash.c:269
+msgid "110-nm MirrorBit(tm) technology"
+msgstr ""
+
+#: src/flash/detectflash.c:270
+msgid "90-nm Floating Gate technology"
+msgstr ""
+
+#: src/flash/detectflash.c:271
+msgid "90-nm MirrorBit(tm) technology"
+msgstr ""
+
+#: src/flash/detectflash.c:274
+msgid "CS49"
+msgstr ""
+
+#: src/flash/detectflash.c:274
+msgid "CS59"
+msgstr ""
+
+#: src/flash/detectflash.c:274
+msgid "CS99"
+msgstr ""
+
+#: src/flash/detectflash.c:277
+msgid "Read only"
+msgstr ""
+
+#: src/flash/detectflash.c:277
+msgid "Read/write"
+msgstr ""
+
+#: src/flash/detectflash.c:280
+msgid "29F040 mode"
+msgstr ""
+
+#: src/flash/detectflash.c:280
+msgid "29F016 mode"
+msgstr ""
+
+#: src/flash/detectflash.c:280
+msgid "29F400 mode"
+msgstr ""
+
+#: src/flash/detectflash.c:281
+#, fuzzy
+msgid "29LV800 mode"
+msgstr "Am29LV800B"
+
+#: src/flash/detectflash.c:282
+msgid "29BDS640 mode (Software Command Locking)"
+msgstr ""
+
+#: src/flash/detectflash.c:283
+msgid "29BDD160 mode (New Sector Protect)"
+msgstr ""
+
+#: src/flash/detectflash.c:284
+msgid "29PDL128 mode (New Sector Protect + 29LV800)"
+msgstr ""
+
+#: src/flash/detectflash.c:285
+msgid "Advanced Sector Protect"
+msgstr ""
+
+#: src/flash/detectflash.c:288
+msgid "4 word Page"
+msgstr ""
+
+#: src/flash/detectflash.c:288
+msgid "8 word Page"
+msgstr ""
+
+#: src/flash/detectflash.c:289
+msgid "16 word Page"
+msgstr ""
+
+#: src/flash/detectflash.c:293
+msgid "No boot"
+msgstr ""
+
+#: src/flash/detectflash.c:294
+msgid "8x8kb sectors at top and bottom with WP control"
+msgstr ""
+
+#: src/flash/detectflash.c:295
+msgid "Bottom boot device"
+msgstr ""
+
+#: src/flash/detectflash.c:295
+msgid "Top boot device"
+msgstr ""
+
+#: src/flash/detectflash.c:296
+msgid "Uniform bottom boot device"
+msgstr ""
+
+#: src/flash/detectflash.c:296
+msgid "Uniform top boot device"
+msgstr ""
+
+#: src/flash/detectflash.c:298
+msgid "Bad value"
+msgstr ""
+
+#: src/flash/detectflash.c:306
+msgid "Primary Vendor-Specific Extended Query:\n"
+msgstr ""
+
+#: src/flash/detectflash.c:307
+#, c-format
+msgid "\tMajor version number: %c\n"
+msgstr ""
+
+#: src/flash/detectflash.c:309
+#, c-format
+msgid "\tMinor version number: %c\n"
+msgstr ""
+
+#: src/flash/detectflash.c:316 src/flash/detectflash.c:320
+#, c-format
+msgid "\tAddress Sensitive Unlock: %s\n"
+msgstr ""
+
+#: src/flash/detectflash.c:327 src/flash/detectflash.c:332
+#: src/flash/detectflash.c:338 src/flash/detectflash.c:343
+#, c-format
+msgid "\tProcess Technology: %s\n"
+msgstr ""
+
+#: src/flash/detectflash.c:346
+#, c-format
+msgid "\tErase Suspend: %s\n"
+msgstr ""
+
+#: src/flash/detectflash.c:349
+#, fuzzy
+msgid "\tSector Protect: Not supported\n"
+msgstr "Nepodporovaná flash pamäť!\n"
+
+#: src/flash/detectflash.c:351
+#, c-format
+msgid "\tSector Protect: %d sectors per group\n"
+msgstr ""
+
+#: src/flash/detectflash.c:355 src/flash/detectflash.c:359
+#, c-format
+msgid "\tSector Temporary Unprotect: %s\n"
+msgstr ""
+
+#: src/flash/detectflash.c:363 src/flash/detectflash.c:367
+#, c-format
+msgid "\tSector Protect/Unprotect Scheme: %s\n"
+msgstr ""
+
+#: src/flash/detectflash.c:370
+#, fuzzy
+msgid "\tSimultaneous Operation: Not supported\n"
+msgstr "Nepodporovaná flash pamäť!\n"
+
+#: src/flash/detectflash.c:372
+#, c-format
+msgid "\tSimultaneous Operation: %d sectors\n"
+msgstr ""
+
+#: src/flash/detectflash.c:376 src/flash/detectflash.c:379
+#, c-format
+msgid "\tBurst Mode Type: %s\n"
+msgstr ""
+
+#: src/flash/detectflash.c:382 src/flash/detectflash.c:385
+#, c-format
+msgid "\tPage Mode Type: %s\n"
+msgstr ""
+
+#: src/flash/detectflash.c:391
+#, c-format
+msgid "\tACC (Acceleration) Supply Minimum: %d mV\n"
+msgstr ""
+
+#: src/flash/detectflash.c:393
+#, c-format
+msgid "\tACC (Acceleration) Supply Maximum: %d mV\n"
+msgstr ""
+
+#: src/flash/detectflash.c:397 src/flash/detectflash.c:400
+#, c-format
+msgid "\tTop/Bottom Sector Flag: %s\n"
+msgstr ""
+
+#: src/flash/detectflash.c:407 src/flash/detectflash.c:410
+#, c-format
+msgid "\tProgram Suspend: %s\n"
+msgstr ""
+
+#: src/flash/detectflash.c:417 src/flash/detectflash.c:420
+#, c-format
+msgid "\tUnlock Bypass: %s\n"
+msgstr ""
+
+#: src/flash/detectflash.c:421
+#, c-format
+msgid "\tSecSi Sector (Customer OTP Area) Size: %d bytes\n"
+msgstr ""
+
+#: src/flash/detectflash.c:423
+#, c-format
+msgid "\tEmbedded Hardware Reset Timeout Maximum: %d ns\n"
+msgstr ""
+
+#: src/flash/detectflash.c:425
+#, c-format
+msgid "\tNon-Embedded Hardware Reset Timeout Maximum: %d ns\n"
+msgstr ""
+
+#: src/flash/detectflash.c:427
+#, c-format
+msgid "\tErase Suspend Timeout Maximum: %d us\n"
+msgstr ""
+
+#: src/flash/detectflash.c:429
+#, c-format
+msgid "\tProgram Suspend Timeout Maximum: %d us\n"
+msgstr ""
+
+#: src/flash/detectflash.c:436
+msgid "\tBank Organization:\n"
+msgstr ""
+
+#: src/flash/detectflash.c:438
+#, c-format
+msgid "\t\tBank%d: %d sectors\n"
+msgstr ""
+
+#: src/flash/flash.c:92
+#, c-format
+msgid "unknown flash - vendor id: %d (0x%04x)\n"
+msgstr "neznáma flash pamäť - id dodávateľa: %d (0x%04x)\n"
+
+#: src/flash/flash.c:96
+#, fuzzy
+msgid "Flash not supported"
+msgstr "Nepodporovaná flash pamäť!\n"
+
+#: src/flash/flash.c:110 src/flash/flash.c:311 src/flash/flash.c:484
+#, fuzzy
+msgid "no flash driver found"
+msgstr "ovládač pre flash pamäť nebol nájdený\n"
+
+#: src/flash/flash.c:124
+#, fuzzy
+msgid "Invalid sync sequence"
+msgstr "Neplatná synchronizačná sekvencia!\n"
+
+#: src/flash/flash.c:150
+#, c-format
+msgid "block %d unlocked\n"
+msgstr "blok %d odomknutý\n"
+
+#: src/flash/flash.c:153 src/flash/flash.c:362
+#, c-format
+msgid "erasing block %d: %d\n"
+msgstr "vymazávam blok %d: %d\n"
+
+#: src/flash/flash.c:158 src/flash/flash.c:334
+msgid "program:\n"
+msgstr "programovanie:\n"
+
+#: src/flash/flash.c:168 src/flash/flash.c:221
+#, fuzzy
+msgid "premature end of file"
+msgstr "Chyba: neočakávaný koniec súboru\n"
+
+#: src/flash/flash.c:172 src/flash/flash.c:225
+#, fuzzy, c-format
+msgid "record: start = 0x%08lX, len = 0x%08lX, checksum = 0x%08lX\n"
+msgstr "záznam: začiatok = 0x%08X, dĺžka = 0x%08X, kontrolná suma = 0x%08X\n"
+
+#: src/flash/flash.c:178 src/flash/flash.c:231
+#, fuzzy
+msgid "Invalid record length"
+msgstr "Chyba: Neplatná dĺžka záznamu!\n"
+
+#: src/flash/flash.c:186 src/flash/flash.c:239 src/flash/flash.c:372
+#: src/flash/flash.c:434
+#, fuzzy, c-format
+msgid "addr: 0x%08lX"
+msgstr "adresa: 0x%08X"
+
+#: src/flash/flash.c:205 src/flash/flash.c:408
+#, fuzzy
+msgid "verify skipped\n"
+msgstr "kontrola:\n"
+
+#: src/flash/flash.c:210 src/flash/flash.c:413
+msgid "verify:\n"
+msgstr "kontrola:\n"
+
+#: src/flash/flash.c:248
+#, fuzzy, c-format
+msgid "verify error: 0x%08lX vs. 0x%08lX at addr %08lX"
+msgstr ""
+"\n"
+"chyba pri kontrole: 0x%08X vs. 0x%08X na adrese %08X\n"
+
+#: src/flash/flash.c:327
+#, c-format
+msgid "malloc(%zd) failed"
+msgstr ""
+
+#: src/flash/flash.c:358
+#, c-format
+msgid ""
+"\n"
+"block %d unlocked\n"
+msgstr ""
+"\n"
+"blok %d odomknutý\n"
+
+#: src/flash/flash.c:401
+#, fuzzy, c-format
+msgid "addr: 0x%08lX\n"
+msgstr "adresa: 0x%08X"
+
+#: src/flash/flash.c:453
+#, fuzzy, c-format
+msgid ""
+"addr: 0x%08lX\n"
+" verify error:\n"
+"read: 0x%08lX\n"
+"expected: 0x%08lX\n"
+msgstr ""
+"\n"
+"chyba pri kontrole:\n"
+"načítané: 0x%08X\n"
+"očakávané: 0x%08X\n"
+
+#: src/flash/flash.c:466
+#, fuzzy, c-format
+msgid ""
+"addr: 0x%08lX\n"
+"Done.\n"
+msgstr "adresa: 0x%08X"
+
+#: src/flash/flash.c:493
+#, c-format
+msgid ""
+"\n"
+"Erasing %d Flash block%s from address 0x%lx\n"
+msgstr ""
+
+#: src/flash/flash.c:511
+#, c-format
+msgid "(%d%% Completed) FLASH Block %d : Unlocking ... "
+msgstr ""
+
+#: src/flash/flash.c:514
+msgid "Erasing ... "
+msgstr ""
+
+#: src/flash/flash.c:522
+#, c-format
+msgid "(100%% Completed) FLASH Block %d : Unlocking ... Erasing ... Ok.\n"
+msgstr ""
+
+#: src/flash/flash.c:527
+msgid "Ok."
+msgstr ""
+
+#: src/flash/flash.c:529
+#, c-format
+msgid "%78s"
+msgstr ""
+
+#: src/flash/flash.c:535
+msgid "ERROR.\n"
+msgstr ""
+
+#: src/flash/flash.c:542
+msgid ""
+"\n"
+"Erasing Completed.\n"
+msgstr ""
+
+#: src/flash/flash.c:544
+msgid ""
+"\n"
+"Erasing (partially) Failed.\n"
+msgstr ""
+
+#: src/flash/intel.c:127 src/flash/intel.c:130 src/flash/intel.c:133
+#, c-format
+msgid "Manufacturer: %s\n"
+msgstr "Výrobca: %s\n"
+
+#: src/flash/intel.c:136
+#, fuzzy, c-format
+msgid "Unknown manufacturer (0x%04lX)!\n"
+msgstr "Neznámy výrobva (0x%04X)!\n"
+
+#: src/flash/intel.c:141
+msgid "Chip: "
+msgstr "Čip: "
+
+#: src/flash/intel.c:194
+#, fuzzy, c-format
+msgid "Unknown (0x%02lX)!\n"
+msgstr "Neznámy (0x%02X)!\n"
+
+#: src/flash/intel.c:255
+#, fuzzy
+msgid "invalid command seq"
+msgstr "flash: neplatná sekvencia príkazov\n"
+
+#: src/flash/intel.c:258
+#, fuzzy
+msgid "low vpen"
+msgstr "flash: nízke vpen\n"
+
+#: src/flash/intel.c:261
+#, fuzzy
+msgid "block locked"
+msgstr "blok %d odomknutý\n"
+
+#: src/flash/intel.c:287
+#, fuzzy
+msgid "unknown error while unlocking block"
+msgstr "flash: neznáma chyba pri odblokovaní\n"
+
+#: src/flash/intel.c:311 src/flash/intel.c:370
+#, fuzzy
+msgid "unknown error while programming"
+msgstr "flash: neznáma chyba pri programovaní\n"
+
+#: src/flash/intel.c:531
+msgid "supported: 28Fxxxx, 2 x 16 bit"
+msgstr "podporované: 28Fxxxx, 2 x 16 bitov"
+
+#: src/flash/intel.c:543
+msgid "supported: 28Fxxxx, 1 x 16 bit"
+msgstr "podporované: 28Fxxxx, 1 x 16 bitov"
+
+#: src/flash/intel.c:555
+msgid "supported: 28Fxxxx, 1 x 8 bit"
+msgstr "podporované: 28Fxxxx, 1 x 8 bitov"
+
+#: src/part/bsbit.c:50
+#, fuzzy
+msgid "missing Boundary Scan Register (BSR)"
+msgstr "chýbajúci Boundary Scan Register (BSR)\n"
+
+#: src/part/bsbit.c:56
+#, fuzzy
+msgid "invalid boundary bit number"
+msgstr "neplatné číslo hraničného bitu\n"
+
+#: src/part/bsbit.c:61
+#, fuzzy
+msgid "duplicate bit declaration"
+msgstr "duplikátna deklarácia bitu\n"
+
+#: src/part/bsbit.c:66
+#, fuzzy
+msgid "invalid control bit number"
+msgstr "neplatné číslo riadiaceho bitu\n"
+
+#: src/part/data_register.c:53
+#, fuzzy
+msgid "Data register name too long\n"
+msgstr "Upozornenie: Názov dátového registra je príliš dlhý\n"
+
+#: src/part/data_register.c:101
+#, fuzzy, c-format
+msgid "Data register '%s' already defined"
+msgstr "Dátový register '%s' je už definovaný\n"
+
+#: src/part/instruction.c:51
+#, fuzzy
+msgid "Instruction name too long\n"
+msgstr "Upozornenie: Názov inštrukcie je príliš dlhý\n"
+
+#: src/part/part.c:231
+#, fuzzy, c-format
+msgid "signal '%s' cannot be set as output"
+msgstr "signál '%s' nemôže byť nastavený ako výstup\n"
+
+#: src/part/part.c:246
+#, fuzzy, c-format
+msgid "signal '%s' cannot be set as input"
+msgstr "signál '%s' nemôže byť nastavený ako vstup\n"
+
+#: src/part/part.c:280
+#, fuzzy, c-format
+msgid "signal '%s' is not input signal"
+msgstr "signál '%s' nie je vstupný\n"
+
+#: src/part/part.c:300
+#, c-format
+msgid "%%-%ds %%-%ds %%-%ds %%-%ds %%-%ds\n"
+msgstr "%%-%ds %%-%ds %%-%ds %%-%ds %%-%ds\n"
+
+#: src/part/part.c:312 src/part/part.c:314
+msgid "(none)"
+msgstr "(nič)"
+
+#: src/part/part.c:328
+#, fuzzy
+msgid "instruction length is already set and used"
+msgstr "dĺžka inštrukcie je už nastavená a používaná\n"
+
+#: src/part/part.c:355
+#, fuzzy, c-format
+msgid "Instruction '%s' already defined"
+msgstr "Inštrukcia '%s' je už definovaná\n"
+
+#: src/part/part.c:363
+#, fuzzy, c-format
+msgid "unknown data register '%s'"
+msgstr "neznámy dátový register '%s'\n"
+
+#: src/svf/svf.c:470
+#, c-format
+msgid "Error %s: mismatch at position %d for TDO\n"
+msgstr ""
+
+#: src/svf/svf.c:550
+#, c-format
+msgid "calloc(%zd,%zd) fails"
+msgstr ""
+
+#: src/svf/svf.c:624 src/svf/svf.c:1081
+#, c-format
+msgid "command %s not implemented\n"
+msgstr ""
+
+#: src/svf/svf.c:661
+#, c-format
+msgid "Error %s: only TCK is supported for RUNTEST"
+msgstr ""
+
+#: src/svf/svf.c:668
+#, c-format
+msgid "Error %s: maximum time must be larger or equal to minimum time"
+msgstr ""
+
+#: src/svf/svf.c:676
+msgid "maximum time for RUNTEST not guaranteed.\n"
+msgstr ""
+
+#: src/svf/svf.c:677
+msgid " This message is only displayed once.\n"
+msgstr ""
+
+#: src/svf/svf.c:710
+#, c-format
+msgid "Error %s: Maximum cable clock frequency required for RUNTEST"
+msgstr ""
+
+#: src/svf/svf.c:713
+msgid " Set the cable frequency with 'FREQUENCY <Hz>'.\n"
+msgstr ""
+
+#: src/svf/svf.c:878
+#, c-format
+msgid "Error %s: first %s command after length change must have a TDI value.\n"
+msgstr ""
+
+#: src/svf/svf.c:906
+#, c-format
+msgid "Error %s: SIR command length inconsistent.\n"
+msgstr ""
+
+#: src/svf/svf.c:910
+#, c-format
+msgid " in input file between line %d col %d and line %d col %d\n"
+msgstr ""
+
+#: src/svf/svf.c:1011
+#, c-format
+msgid "Error %s: no further TRST command allowed after mode ABSENT"
+msgstr ""
+
+#: src/svf/svf.c:1034
+#, c-format
+msgid "Error %s: TRST ABSENT must not be issued after a STATE command"
+msgstr ""
+
+#: src/svf/svf.c:1042
+#, c-format
+msgid "Error %s: TRST ABSENT must not be issued after an SIR or SDR command"
+msgstr ""
+
+#: src/svf/svf.c:1052
+#, c-format
+msgid "unimplemented mode '%s' for TRST\n"
+msgstr ""
+
+#: src/svf/svf.c:1140
+#, fuzzy, c-format
+msgid "%s: no JTAG chain available"
+msgstr "Chyba: Nepodarilo sa zdetekovať koniec JTAG reťazca!\n"
+
+#: src/svf/svf.c:1147
+#, c-format
+msgid "%s: chain without any parts"
+msgstr ""
+
+#: src/svf/svf.c:1163
+#, c-format
+msgid "%s: could not establish SDR register"
+msgstr ""
+
+#: src/svf/svf.c:1203
+#, c-format
+msgid "%s: could not establish SIR instruction"
+msgstr ""
+
+#: src/svf/svf.c:1240
+msgid ""
+"Mismatches occurred between scanned device output and expected TDO values.\n"
+msgstr ""
+
+#: src/svf/svf.c:1243
+msgid "Scanned device output matched expected TDO values.\n"
+msgstr ""
+
+#: svf_flex.l:367
+#, c-format
+msgid "Parsing %6d/%d (%3.0d%%)"
+msgstr ""
+
+#: svf_flex.l:387 src/tap/cable/ft2232.c:1741
+#: src/tap/cable/generic_parport.c:89 src/tap/cable/generic_usbconn.c:236
+#: src/tap/cable/jim.c:71 src/tap/cable/ts7800.c:171
+#: src/tap/cable/usbblaster.c:80 src/tap/cable/vision_ep9307.c:214
+#: src/tap/cable/wiggler.c:226
+#, c-format
+msgid "malloc(%zd) fails"
+msgstr ""
+
+#: src/tap/cable/arcom.c:137
+msgid "Arcom JTAG Cable"
+msgstr "JTAG kábel Arcom"
+
+#: src/tap/cable/byteblaster.c:159
+msgid ""
+"Altera ByteBlaster/ByteBlaster II/ByteBlasterMV Parallel Port Download Cable"
+msgstr ""
+"JTAG kábel Altera ByteBlaster/ByteBlaster II/ByteBlasterMV pre paralelný port"
+
+#: src/tap/cable.c:185 src/tap/usbconn/libusb.c:169
+#, c-format
+msgid "malloc(%zd)/malloc(%zd) fails"
+msgstr ""
+
+#: src/tap/cable.c:239
+#, c-format
+msgid "(Resized JTAG activity queue to hold max %d items)\n"
+msgstr ""
+
+#: src/tap/cable.c:426 src/tap/cable.c:487
+#, c-format
+msgid "Internal error: Got wrong type of result from queue (%d? %p.%d)\n"
+msgstr ""
+
+#: src/tap/cable.c:494
+#, c-format
+msgid "Internal error: Got wrong signal's value from queue (%d? %p.%d)\n"
+msgstr ""
+
+#: src/tap/cable.c:551
+#, c-format
+msgid "Internal error: Got wrong type of result from queue (#%d %p.%d)\n"
+msgstr ""
+
+#: src/tap/cable.c:558
+msgid "Internal error: Wanted transfer result but none was queued\n"
+msgstr ""
+
+#: src/tap/cable/dlc5.c:131
+msgid "Xilinx DLC5 JTAG Parallel Cable III"
+msgstr "Xilinx DLC5 JTAG paralelný kábel III"
+
+#: src/tap/cable/ea253.c:137
+msgid "ETC EA253 JTAG Cable"
+msgstr "JTAG kábel ETC EA253"
+
+#: src/tap/cable/ei012.c:139
+msgid "ETC EI012 JTAG Cable"
+msgstr "JTAG kábel ETC EI012"
+
+#: src/tap/cable/ft2232.c:251
+#, c-format
+msgid "Setting lowest supported frequency for FT2232: %d\n"
+msgstr ""
+
+#: src/tap/cable/ft2232.c:739
+msgid "Please power on the TARGET board and connect VCC signal"
+msgstr ""
+
+#: src/tap/cable/ft2232.c:1824
+#, c-format
+msgid ""
+"Usage: cable %s [vid=VID] [pid=PID] [desc=DESC] [driver=DRIVER]\n"
+"\n"
+"VID vendor ID (hex), defaults to %04X\n"
+"PID product ID (hex), defaults to %04X\n"
+"DESC Some string to match in description or serial no.\n"
+"DRIVER usbconn driver, either ftdi-mpsse or ftd2xx-mpsse\n"
+" defaults to %s if not specified\n"
+"\n"
+msgstr ""
+
+#: src/tap/cable/ft2232.c:1836
+msgid "Generic FTDI FT2232 Cable"
+msgstr ""
+
+#: src/tap/cable/ft2232.c:1869
+msgid "Olimex ARM-USB-OCD[-TINY] (FT2232) Cable"
+msgstr ""
+
+#: src/tap/cable/ft2232.c:1916
+msgid "Analog Devices Blackfin gnICE (FT2232) Cable (EXPERIMENTAL)"
+msgstr ""
+
+#: src/tap/cable/ft2232.c:1949
+msgid "Amontec JTAGkey (FT2232) Cable"
+msgstr ""
+
+#: src/tap/cable/ft2232.c:1982
+msgid "OOCDLink-s (FT2232) Cable (EXPERIMENTAL)"
+msgstr ""
+
+#: src/tap/cable/ft2232.c:2015
+msgid "Turtelizer 2 Rev. B (FT2232) Cable (EXPERIMENTAL)"
+msgstr ""
+
+#: src/tap/cable/ft2232.c:2048
+msgid "USB to JTAG Interface (FT2232) Cable (EXPERIMENTAL)"
+msgstr ""
+
+#: src/tap/cable/ft2232.c:2081
+msgid "Xverve DT-USB-ST Signalyzer Tool (FT2232) Cable (EXPERIMENTAL)"
+msgstr ""
+
+#: src/tap/cable/ft2232.c:2114
+msgid "TinCanTools Flyswatter (FT2232) Cable"
+msgstr ""
+
+#: src/tap/cable/ft2232.c:2147
+msgid "KrisTech usbScarabeus2 (FT2232) Cable"
+msgstr ""
+
+#: src/tap/cable/generic.c:110
+msgid "No space in cable activity results queue"
+msgstr ""
+
+#: src/tap/cable/generic.c:421
+msgid "calibration error, wall clock is not monotonically increasing\n"
+msgstr ""
+
+#: src/tap/cable/generic_parport.c:62
+msgid "extra arguments"
+msgstr ""
+
+#: src/tap/cable/generic_parport.c:72
+#, fuzzy, c-format
+msgid "Unknown port type: %s"
+msgstr "neznámy dátový register '%s'\n"
+
+#: src/tap/cable/generic_parport.c:120
+#, c-format
+msgid ""
+"Usage: cable %s parallel PORTADDR\n"
+" or: cable %s ppdev PPDEV\n"
+" or: cable %s ppi PPIDEV\n"
+"\n"
+"PORTADDR parallel port address (e.g. 0x378)\n"
+"PPDEV ppdev device (e.g. /dev/parport0)\n"
+"PPIDEF ppi device (e.g. /dev/ppi0)\n"
+"\n"
+msgstr ""
+
+#: src/tap/cable/generic_usbconn.c:229
+msgid "Couldn't connect to suitable USB device.\n"
+msgstr ""
+
+#: src/tap/cable/generic_usbconn.c:267
+#, c-format
+msgid ""
+"Usage: cable %s [vid=VID] [pid=PID] [desc=DESC] [...]\n"
+"\n"
+"VID USB Device Vendor ID (hex, e.g. 0abc)\n"
+"PID USB Device Product ID (hex, e.g. 0abc)\n"
+"DESC Some string to match in description or serial no.\n"
+"\n"
+msgstr ""
+
+#: src/tap/cable/jim.c:55
+msgid "not enough arguments"
+msgstr ""
+
+#: src/tap/cable/jim.c:59
+msgid "JTAG target simulator JIM - work in progress!\n"
+msgstr ""
+
+#: src/tap/cable/jim.c:154
+#, c-format
+msgid "Usage: cable %s\n"
+msgstr ""
+
+#: src/tap/cable/jim.c:159
+msgid "JTAG target simulator JIM"
+msgstr ""
+
+#: src/tap/cable/jlink.c:590
+msgid "Segger/IAR J-Link, Atmel SAM-ICE and others."
+msgstr ""
+
+#: src/tap/cable/keithkoep.c:148
+msgid "Keith & Koep JTAG cable"
+msgstr "JTAG kábel Keith & Koep"
+
+#: src/tap/cable/lattice.c:140
+#, fuzzy
+msgid "Lattice Parallel Port JTAG Cable"
+msgstr "JTAG kábel Macraigor Wiggler"
+
+#: src/tap/cable/mpcbdm.c:146
+msgid "Mpcbdm JTAG cable"
+msgstr "JTAG kábel Mpcbdm"
+
+#: src/tap/cable/triton.c:150
+msgid "Ka-Ro TRITON Starterkit II (PXA255/250) JTAG Cable"
+msgstr "JTAG kábel pre Ka-Ro TRITON Starterkit II (PXA255/250)"
+
+#: src/tap/cable/ts7800.c:89 src/tap/cable/vision_ep9307.c:95
+#, fuzzy
+msgid "unable to open /dev/mem"
+msgstr "Chyba: Nedostatok pamäte!\n"
+
+#: src/tap/cable/ts7800.c:102 src/tap/cable/vision_ep9307.c:138
+#, fuzzy
+msgid "unable to mmap the GPIO registers"
+msgstr "Chyba: Nepodarilo sa zdetekovať koniec JTAG reťazca!\n"
+
+#: src/tap/cable/ts7800.c:127 src/tap/cable/vision_ep9307.c:164
+#, fuzzy
+msgid "unable to munmap the GPIO registers"
+msgstr "Chyba: Nepodarilo sa zdetekovať koniec JTAG reťazca!\n"
+
+#: src/tap/cable/ts7800.c:161 src/tap/cable/vision_ep9307.c:204
+msgid "This cable type does not accept parameters"
+msgstr ""
+
+#: src/tap/cable/ts7800.c:166
+msgid "Initializing TS-7800 Built-in JTAG Chain\n"
+msgstr ""
+
+#: src/tap/cable/ts7800.c:298 src/tap/cable/vision_ep9307.c:339
+#, c-format
+msgid ""
+"Usage: cable %s\n"
+"\n"
+msgstr ""
+
+#: src/tap/cable/ts7800.c:303
+msgid "TS-7800 Built-in JTAG Chain"
+msgstr ""
+
+#: src/tap/cable/usbblaster.c:104
+#, c-format
+msgid "USB-Blaster frequency is fixed to %ld Hz\n"
+msgstr ""
+
+#: src/tap/cable/usbblaster.c:503
+#, c-format
+msgid ""
+"Usage: cable %s [vid=VID] [pid=PID] [desc=DESC] [driver=DRIVER]\n"
+"\n"
+"VID vendor ID (hex, e.g. 0abc)\n"
+"PID product ID (hex, e.g. 0abc)\n"
+"DESC Some string to match in description or serial no.\n"
+"DRIVER usbconn driver, either ftdi or ftd2xx\n"
+" defaults to %s if not specified\n"
+"\n"
+msgstr ""
+
+#: src/tap/cable/usbblaster.c:514
+msgid "Altera USB-Blaster Cable"
+msgstr ""
+
+#: src/tap/cable/vision_ep9307.c:107
+msgid "unable to mmap the System Control registers"
+msgstr ""
+
+#: src/tap/cable/vision_ep9307.c:127
+msgid "unable to munmap the System Controller registers"
+msgstr ""
+
+#: src/tap/cable/vision_ep9307.c:209
+msgid "Initializing Vision EP9307 SoM GPIO JTAG Cable\n"
+msgstr ""
+
+#: src/tap/cable/vision_ep9307.c:344
+msgid "Vision EP9307 SoM GPIO JTAG Cable"
+msgstr ""
+
+#: src/tap/cable/wiggler2.c:159
+msgid "Modified (with CPU Reset) WIGGLER JTAG Cable"
+msgstr ""
+
+#: src/tap/cable/wiggler.c:248
+msgid "Pin mapping failed\n"
+msgstr ""
+
+#: src/tap/cable/wiggler.c:388
+#, c-format
+msgid ""
+"Usage: cable %s parallel PORTADDR [TDO,TRST,TDI,TCK,TMS,SRESET]\n"
+" or: cable %s ppdev PPDEV [TDO,TRST,TDI,TCK,TMS,SRESET]\n"
+" or: cable %s ppi PPIDEV [TDO,TRST,TDI,TCK,TMS,SRESET]\n"
+"\n"
+"PORTADDR parallel port address (e.g. 0x378)\n"
+"PPDEV ppdev device (e.g. /dev/parport0)\n"
+"PPIDEF ppi device (e.g. /dev/ppi0)\n"
+"TDO, ... parallel port bit number, prepend '#' for inversion\n"
+" default is '%s'\n"
+"\n"
+msgstr ""
+
+#: src/tap/cable/wiggler.c:415
+msgid "Macraigor Wiggler JTAG Cable"
+msgstr "JTAG kábel Macraigor Wiggler"
+
+#: src/tap/cable/wiggler.c:434
+#, fuzzy
+msgid "Excelpoint IGLOO JTAG Cable"
+msgstr "JTAG kábel Arcom"
+
+#: src/tap/cable/xpc.c:685
+msgid "Xilinx Platform Cable USB internal chain"
+msgstr ""
+
+#: src/tap/cable/xpc.c:712
+msgid "Xilinx Platform Cable USB external chain"
+msgstr ""
+
+#: src/tap/chain.c:182 src/tap/chain.c:250
+#, fuzzy, c-format
+msgid "Part %d without active instruction"
+msgstr "%s(%d) Súčiastka %d bez aktívnej inštrukcie\n"
+
+#: src/tap/chain.c:256
+#, fuzzy, c-format
+msgid "Part %d without data register"
+msgstr "%s(%d) Súčiastka %d bez dátového registra\n"
+
+#: src/tap/chain.c:321
+#, fuzzy
+msgid "Run \"detect\" first"
+msgstr "Spustite najskôr \"detect\".\n"
+
+#: src/tap/chain.c:327
+#, c-format
+msgid "active part no %d exceeds chain length %d"
+msgstr ""
+
+#: src/tap/detect.c:65
+#, fuzzy, c-format
+msgid "Unable to open file '%s'\n"
+msgstr "Nepodarilo sa otvoriť súbor `%s'!\n"
+
+#: src/tap/detect.c:201
+#, c-format
+msgid "IR length: %d\n"
+msgstr "Dĺžka IR: %d\n"
+
+#: src/tap/detect.c:219
+msgid "Unable to detect JTAG chain length\n"
+msgstr "Nepodarilo sa zdetekovať dĺžku JTAG reťazca\n"
+
+#: src/tap/detect.c:222
+#, c-format
+msgid "Chain length: %d\n"
+msgstr "Dĺžka reťazca: %d\n"
+
+#: src/tap/detect.c:265
+#, fuzzy, c-format
+msgid "Device Id: %s (0x%016<PRIX64>)\n"
+msgstr "Id zariadenia: %s\n"
+
+#: src/tap/detect.c:268
+msgid "Device Id: unknown as bit 0 was not a 1\n"
+msgstr ""
+
+#: src/tap/detect.c:299
+msgid " Unknown manufacturer!\n"
+msgstr " Neznámy výrobca!\n"
+
+#: src/tap/detect.c:305
+#, c-format
+msgid " Manufacturer: %s\n"
+msgstr " Výrobca: %s\n"
+
+#: src/tap/detect.c:308
+#, fuzzy
+msgid "Manufacturer too long\n"
+msgstr "Upozornenie: Výrobca je príliš dlhý\n"
+
+#: src/tap/detect.c:325
+msgid " Unknown part!\n"
+msgstr " Neznáma súčiastka!\n"
+
+#: src/tap/detect.c:331
+#, fuzzy, c-format
+msgid " Part(%d): %s\n"
+msgstr " Súčiastka: %s\n"
+
+#: src/tap/detect.c:334
+#, fuzzy
+msgid "Part too long\n"
+msgstr "Upozornenie: Súčiastka je príliš dlhá\n"
+
+#: src/tap/detect.c:351
+msgid " Unknown stepping!\n"
+msgstr " Neznámy stupeň!\n"
+
+#: src/tap/detect.c:357
+#, c-format
+msgid " Stepping: %s\n"
+msgstr " Stupeň: %s\n"
+
+#: src/tap/detect.c:360
+#, fuzzy
+msgid "Stepping too long\n"
+msgstr "Upozornenie: Stupeň je príliš dlhý\n"
+
+#: src/tap/detect.c:400
+msgid "Error: Unable to detect JTAG chain end!\n"
+msgstr "Chyba: Nepodarilo sa zdetekovať koniec JTAG reťazca!\n"
+
+#: src/tap/detect.c:450
+msgid "Error: could not set BR register"
+msgstr ""
+
+#: src/tap/detect.c:471
+msgid "Error: could not set BYPASS instruction"
+msgstr ""
+
+#: src/tap/discovery.c:117
+#, c-format
+msgid "TDO seems to be stuck at %d\n"
+msgstr ""
+
+#: src/tap/discovery.c:142
+msgid "Detecting IR length ... "
+msgstr "Detekujem dĺžku IR ... "
+
+#: src/tap/discovery.c:148 src/tap/discovery.c:184
+#, c-format
+msgid "%d\n"
+msgstr "%d\n"
+
+#: src/tap/discovery.c:153
+msgid "Error: Invalid IR length!\n"
+msgstr "Chyba: Neplatná dĺžka IR!\n"
+
+#: src/tap/discovery.c:177
+#, c-format
+msgid "Detecting DR length for IR %s ... "
+msgstr "Detekujem dĺžku DR pre IR %s ... "
+
+#: src/tap/parport/direct.c:157
+msgid "Couldn't load InpOut32.dll; maybe not installed?"
+msgstr ""
+
+#: src/tap/parport/direct.c:223
+#, fuzzy
+msgid "Invalid port address"
+msgstr "Neplatná adresa portu!\n"
+
+#: src/tap/parport/direct.c:238
+#, c-format
+msgid "Disconnecting %s from parallel port at 0x%x\n"
+msgstr "Odpájam %s z paralelného portu na adrese 0x%x\n"
+
+#: src/tap/parport/direct.c:245
+#, fuzzy, c-format
+msgid "Initializing parallel port at 0x%x\n"
+msgstr "Inicializujem %s na paralelnom porte na adrese 0x%x\n"
+
+#: src/tap/parport/ppdev.c:132
+#, c-format
+msgid "Disconnecting %s from ppdev port %s\n"
+msgstr "Odpájam %s z ppdev portu %s\n"
+
+#: src/tap/parport/ppdev.c:138
+#, fuzzy, c-format
+msgid "Initializing ppdev port %s\n"
+msgstr "Inicializujem %s na ppdev porte %s\n"
+
+#: src/tap/parport/ppdev.c:155
+#, fuzzy, c-format
+msgid "Could not open port %s"
+msgstr "Nepodarilo sa otvoriť %s\n"
+
+#: src/tap/parport/ppdev.c:162
+msgid "Could not claim ppdev device"
+msgstr ""
+
+#: src/tap/parport/ppi.c:128
+#, fuzzy, c-format
+msgid "Disconnecting %s from ppi port %s\n"
+msgstr "Odpájam %s z ppdev portu %s\n"
+
+#: src/tap/parport/ppi.c:135
+#, fuzzy, c-format
+msgid "Initializing on ppi port %s\n"
+msgstr "Inicializujem %s na ppdev porte %s\n"
+
+#: src/tap/tap.c:78 src/tap/tap.c:150 src/tap/tap.c:163
+#, c-format
+msgid "%s: Invalid state: %2X\n"
+msgstr "%s: Neplatný stav: %2X\n"
+
+#: src/tap/usbconn/libftd2xx.c:133
+#, c-format
+msgid "FT_Write() failed: %s"
+msgstr ""
+
+#: src/tap/usbconn/libftd2xx.c:141 src/tap/usbconn/libftdi.c:93
+msgid "Written fewer bytes than requested"
+msgstr ""
+
+#: src/tap/usbconn/libftd2xx.c:161 src/tap/usbconn/libftdi.c:113
+msgid "Receive buffer does not exist"
+msgstr ""
+
+#: src/tap/usbconn/libftd2xx.c:168 src/tap/usbconn/libftd2xx.c:230
+#, c-format
+msgid "Error from FT_Read(): %s"
+msgstr ""
+
+#: src/tap/usbconn/libftd2xx.c:173 src/tap/usbconn/libftdi.c:127
+#, c-format
+msgid "%s(): Received fewer bytes than requested.\n"
+msgstr ""
+
+#: src/tap/usbconn/libftd2xx.c:297 src/tap/usbconn/libftdi.c:237
+msgid "Send buffer does not exist"
+msgstr ""
+
+#: src/tap/usbconn/libftd2xx.c:360
+msgid "Connected to libftd2xx driver.\n"
+msgstr ""
+
+#: src/tap/usbconn/libftd2xx.c:437 src/tap/usbconn/libftd2xx.c:484
+#: src/tap/usbconn/libftd2xx.c:519 src/tap/usbconn/libftd2xx.c:546
+#, c-format
+msgid "Can't reset device: %s"
+msgstr ""
+
+#: src/tap/usbconn/libftd2xx.c:441 src/tap/usbconn/libftd2xx.c:523
+#: src/tap/usbconn/libftd2xx.c:550
+#, c-format
+msgid "Can't purge RX buffer: %s"
+msgstr ""
+
+#: src/tap/usbconn/libftd2xx.c:446
+#, c-format
+msgid "Can't set latency timer: %s"
+msgstr ""
+
+#: src/tap/usbconn/libftd2xx.c:451
+#, c-format
+msgid "Can't set baudrate: %s"
+msgstr ""
+
+#: src/tap/usbconn/libftd2xx.c:488
+#, c-format
+msgid "s(): Can't purge RX buffer: %s"
+msgstr ""
+
+#: src/tap/usbconn/libftd2xx.c:495
+#, c-format
+msgid "Can't set USB parameters: %s"
+msgstr ""
+
+#: src/tap/usbconn/libftd2xx.c:500
+#, c-format
+msgid "Can't set special characters: %s"
+msgstr ""
+
+#: src/tap/usbconn/libftd2xx.c:508
+#, c-format
+msgid "Can't set target latency timer: %s"
+msgstr ""
+
+#: src/tap/usbconn/libftd2xx.c:514
+#, c-format
+msgid "Can't set MPSSE bitmode: %s"
+msgstr ""
+
+#: src/tap/usbconn/libftdi.c:87
+#, c-format
+msgid "ftdi_write_data() failed: %s"
+msgstr ""
+
+#: src/tap/usbconn/libftdi.c:122 src/tap/usbconn/libftdi.c:178
+#, c-format
+msgid "Error from ftdi_read_data(): %s"
+msgstr ""
+
+#: src/tap/usbconn/libftdi.c:305
+msgid "Connected to libftdi driver.\n"
+msgstr ""
+
+#: src/tap/usbconn/libftdi.c:344
+#, c-format
+msgid "%s(): ftdi_usb_open_desc() failed: %s"
+msgstr ""
+
+#: src/tap/usbconn/libftdi.c:346
+#, c-format
+msgid "ftdi_usb_open_desc() failed: %s"
+msgstr ""
+
+#: src/tap/usbconn/libftdi.c:371
+#, c-format
+msgid "ftdi_usb_purge_buffers() failed: %s"
+msgstr ""
+
+#: src/tap/usbconn/libftdi.c:375 src/tap/usbconn/libftdi.c:396
+#, c-format
+msgid "ftdi_read_data() failed: %s"
+msgstr ""
+
+#: src/tap/usbconn/libftdi.c:385
+#, c-format
+msgid "ftdi_usb_purge_rx_buffer() failed: %s"
+msgstr ""
+
+#: src/tap/usbconn/libftdi.c:392
+#, c-format
+msgid "ftdi_usb_purge_tx_buffer() failed: %s"
+msgstr ""
+
+#: src/tap/usbconn/libftdi.c:413
+#, c-format
+msgid "ftdi_poll_status() failed: %s"
+msgstr ""
+
+#: src/tap/usbconn/libftdi.c:418 src/tap/usbconn/libftdi.c:534
+#: src/tap/usbconn/libftdi.c:556
+#, c-format
+msgid "ftdi_usb_reset() failed: %s"
+msgstr ""
+
+#: src/tap/usbconn/libftdi.c:444 src/tap/usbconn/libftdi.c:524
+#, c-format
+msgid "ftdi_set_latency_timer() failed: %s"
+msgstr ""
+
+#: src/tap/usbconn/libftdi.c:461
+#, c-format
+msgid "ftdi_set_baudrate() failed: %s"
+msgstr ""
+
+#: src/tap/usbconn/libftdi.c:529
+#, c-format
+msgid "ftdi_set_bitmode() failed: %s"
+msgstr ""
+
+#, fuzzy
+#~ msgid "Out of memory, %s line %i\n"
+#~ msgstr "Nedostatok pamäte\n"
+
+#, fuzzy
+#~ msgid "No JTAG chain available\n"
+#~ msgstr "(popis je nedostupný)"
+
+#, fuzzy
+#~ msgid "Unable to open BSDL file '%s'\n"
+#~ msgstr "Nepodarilo sa otvoriť súbor `%s'!\n"
+
+#, fuzzy
+#~ msgid "Cannot open file %s or %s.\n"
+#~ msgstr "Nepodarilo sa otvoriť %s\n"
+
+#~ msgid "out of memory\n"
+#~ msgstr "nedostatok pamäte\n"
+
+#, fuzzy
+#~ msgid "signal '%s' is not found\n"
+#~ msgstr "signál '%s' nenájdený\n"
+
+#~ msgid "Error: Bus width detection failed\n"
+#~ msgstr "Chyba: Detekcia šírky zbernice zlyhala\n"
+
+#~ msgid "Error: Invalid bus width (MD3 = MD4 = 0)!\n"
+#~ msgstr "Chyba: Neplatná šírka zbernice (MD3 = MD4 = 0)!\n"
+
+#, fuzzy
+#~ msgid "Addr: 0x%08X\n"
+#~ msgstr "adresa: 0x%08X\n"
+
+#~ msgid "%s: no active part\n"
+#~ msgstr "%s: nie je aktívna súčiastka\n"
+
+#~ msgid "Error: Cable connection failed!\n"
+#~ msgstr "Chyba: Pripojenie kábla zlyhalo!\n"
+
+#~ msgid "Error: Cable initialization failed!\n"
+#~ msgstr "Chyba: Inicializácia kábla zlyhala!\n"
+
+#~ msgid "Error: Cable not configured. Please use '%s' command first!\n"
+#~ msgstr ""
+#~ "Chyba: Kábel nie je nakonfigurovaný. Prosím najskôr použie príkaz '%s'!\n"
+
+#~ msgid "%s: syntax error!\n"
+#~ msgstr "%s: chyba syntaxe!\n"
+
+#, fuzzy
+#~ msgid "Unable to open file `%s go=%d'!\n"
+#~ msgstr "Nepodarilo sa otvoriť súbor `%s'!\n"
+
+#, fuzzy
+#~ msgid "bus alloc/attach failed!\n"
+#~ msgstr "inicializácia zbernice zlyhala!\n"
+
+#~ msgid "bus initialization failed!\n"
+#~ msgstr "inicializácia zbernice zlyhala!\n"
+
+#~ msgid ""
+#~ "\n"
+#~ "flash error\n"
+#~ msgstr ""
+#~ "\n"
+#~ "chyba flash\n"
+
+#~ msgid "Out of memory!\n"
+#~ msgstr "Nedostatok pamäte!\n"
+
+#~ msgid "flash: block locked\n"
+#~ msgstr "flash: blok uzamknutý\n"
+
+#, fuzzy
+#~ msgid "out of memory"
+#~ msgstr "nedostatok pamäte\n"
+
+#, fuzzy
+#~ msgid "Initialization failed.\n"
+#~ msgstr "inicializácia zbernice zlyhala!\n"
+
+#, fuzzy
+#~ msgid "%s(%d) Out of memory\n"
+#~ msgstr "%s(%d) Nedostatok pamäte.\n"
+
+#~ msgid "Cannot open %s\n"
+#~ msgstr "Nepodarilo sa otvoriť %s\n"
+
+#, fuzzy
+#~ msgid "Error: Unable to allocate space for parts!\n"
+#~ msgstr "Chyba: Nepodarilo sa zdetekovať koniec JTAG reťazca!\n"
+
+#, fuzzy
+#~ msgid "Error: Unable to allocate space for a part!\n"
+#~ msgstr "Chyba: Nepodarilo sa zdetekovať koniec JTAG reťazca!\n"
+
+#~ msgid "Error: Out of memory!\n"
+#~ msgstr "Chyba: Nedostatok pamäte!\n"
+
+#~ msgid "Syntax error!\n"
+#~ msgstr "Chyba syntaxe!\n"
+
+#~ msgid "%s(%d) Out of memory.\n"
+#~ msgstr "%s(%d) Nedostatok pamäte.\n"
+
+#~ msgid "supported: AMD 29LV800B; 1x16 Bit"
+#~ msgstr "podporované: AMD 29LV800B; 1x16 bitov"
+
+#, fuzzy
+#~ msgid ""
+#~ "Blackfin BF537 Stamp compatible bus driver via BSR (JTAG part No. %d)\n"
+#~ msgstr ""
+#~ "Broadcom BCM1250 kompatibilný ovládač zbernice cez BSR (JTAG súčiastka č. "
+#~ "%d)\n"
+
+#, fuzzy
+#~ msgid ""
+#~ "Blackfin BF537 EZ-KIT compatible bus driver via BSR (JTAG part No. %d)\n"
+#~ msgstr ""
+#~ "Broadcom BCM1250 kompatibilný ovládač zbernice cez BSR (JTAG súčiastka č. "
+#~ "%d)\n"
+
+#, fuzzy
+#~ msgid ""
+#~ "Blackfin BF527 EZ-KIT compatible bus driver via BSR (JTAG part No. %d)\n"
+#~ msgstr ""
+#~ "Broadcom BCM1250 kompatibilný ovládač zbernice cez BSR (JTAG súčiastka č. "
+#~ "%d)\n"
+
+#~ msgid "Intel PXA2x0 compatible bus driver via BSR (JTAG part No. %d)\n"
+#~ msgstr ""
+#~ "Intel PXA2x0 kompatibilný ovládač zbernice cez BSR (JTAG súčiastka č. %"
+#~ "d)\n"
+
+#, fuzzy
+#~ msgid "Intel PXA27x compatible bus driver via BSR (JTAG part No. %d)\n"
+#~ msgstr ""
+#~ "Intel PXA2x0 kompatibilný ovládač zbernice cez BSR (JTAG súčiastka č. %"
+#~ "d)\n"
+
+#~ msgid "AMD"
+#~ msgstr "AMD"
+
+#, fuzzy
+#~ msgid "Am29LV040B"
+#~ msgstr "Am29LV800B"
+
+#~ msgid "Am29LV640D/Am29LV641D/Am29LV642D"
+#~ msgstr "Am29LV640D/Am29LV641D/Am29LV642D"
+
+#~ msgid "Am29LV800B"
+#~ msgstr "Am29LV800B"
+
+#, fuzzy
+#~ msgid "MX29LV160B"
+#~ msgstr "Am29LV800B"
+
+#, fuzzy
+#~ msgid "AM29LV160DB"
+#~ msgstr "Am29LV800B"
+
+#, fuzzy
+#~ msgid "Am29LV065D"
+#~ msgstr "Am29LV800B"
+
+#, fuzzy
+#~ msgid "Am29C040B\t-\t"
+#~ msgstr "Am29LV800B"
+
+#, fuzzy
+#~ msgid "Am29LV040B\t-\t"
+#~ msgstr "Am29LV800B"
+
+#~ msgid "Error during file read.\n"
+#~ msgstr "Chyba pri čítaní zo súboru.\n"
+
+#, fuzzy
+#~ msgid "Disconnecting %s\n"
+#~ msgstr "Odpájam %s z ppdev portu %s\n"
+
+#, fuzzy
+#~ msgid "Disconnecting %s from FTDI device %s\n"
+#~ msgstr "Odpájam %s z ppdev portu %s\n"
+
+#, fuzzy
+#~ msgid "Initializing %s on FTDI device %s\n"
+#~ msgstr "Inicializujem %s na ppdev porte %s\n"
+
+#, fuzzy
+#~ msgid "Initializing on FTDI device %s\n"
+#~ msgstr "Inicializujem %s na ppdev porte %s\n"
+
+#, fuzzy
+#~ msgid "Disconnecting %s, device %s\n"
+#~ msgstr "Odpájam %s z ppdev portu %s\n"
+
+#, fuzzy
+#~ msgid "Initializing %s, device %s\n"
+#~ msgstr "Inicializujem %s na ppdev porte %s\n"
+
+#, fuzzy
+#~ msgid "Initializing device %s\n"
+#~ msgstr "Inicializujem %s na ppdev porte %s\n"
+
+#~ msgid ""
+#~ "Usage: %s FILENAME\n"
+#~ "Run command sequence from external FILENAME from the repository.\n"
+#~ "\n"
+#~ "FILENAME Name of the file with commands\n"
+#~ msgstr ""
+#~ "Použitie: %s SÚBOR\n"
+#~ "Spustiť sekvenciu príkazov z externého štandardného SÚBORu.\n"
+#~ "\n"
+#~ "SÚBOR Názov súboru s príkazmi\n"
+
+#~ msgid "supported: AMD 29LV160; 1x8 Bit"
+#~ msgstr "podporované: AMD 29LV160; 1x8 bitov"
+
+#~ msgid "Unknown connection type: %s\n"
+#~ msgstr "Neznámy typ pripojenia: %s\n"
+
+#~ msgid ""
+#~ "Usage: %s PORTADDR CABLE\n"
+#~ "Usage: %s DEV CABLE\n"
+#~ "Select JTAG cable connected to parallel port.\n"
+#~ "\n"
+#~ "PORTADDR parallel port address (e.g. 0x378)\n"
+#~ "CABLE cable type\n"
+#~ "DEV ppdev device (e.g. /dev/parport0)\n"
+#~ "\n"
+#~ "List of supported cables:\n"
+#~ "%-13s No cable connected\n"
+#~ msgstr ""
+#~ "Použitie: %s PORTADRESA KÁBEL\n"
+#~ "Použitie: %s ZARIADENIE KÁBEL\n"
+#~ "Nastaviť JTAG kábel pripojený k paralelnému portu.\n"
+#~ "\n"
+#~ "PORTADRESA adresa paralelného portu (napr. 0x378)\n"
+#~ "KÁBEL typ kábla\n"
+#~ "ZARIADENIE zariadenie ppdev (napr. /dev/parport0)\n"
+#~ "\n"
+#~ "Zoznam podporovaných káblov:\n"
+#~ "%-13s Žiaden kábel nepripojený\n"
+
+#~ msgid "Note: Supported configuration is 2 x 16 bit or 1 x 16 bit only\n"
+#~ msgstr ""
+#~ "Poznámka: Podporovaná konfigurácia je len 2 x 16 bitov alebo 1 x 16 "
+#~ "bitov\n"
+
+#~ msgid "Changed cable to 'none'\n"
+#~ msgstr "Kábel zmenený na 'žiaden'\n"
--- /dev/null
+Makefile.in
+Makefile
+.deps
+.libs
+bsdl2jtag
--- /dev/null
+#
+# $Id$
+#
+# Copyright (C) 2002 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Marcel Telka <marcel@telka.sk>, 2002.
+#
+
+include $(top_srcdir)/Makefile.rules
+
+SUBDIRS = \
+ flash \
+ lib \
+ tap \
+ part \
+ bus \
+ cmd \
+ global
+
+if ENABLE_SVF
+SUBDIRS += svf
+endif
+
+if ENABLE_BSDL
+SUBDIRS += bsdl
+endif
+
+if ENABLE_JIM
+SUBDIRS += jim
+endif
+
+lib_LTLIBRARIES = liburjtag.la
+liburjtag_la_LDFLAGS = -version-info 0:0:0
+
+liburjtag_la_SOURCES =
+
+liburjtag_la_LIBADD = \
+ tap/libtap.la \
+ part/libpart.la \
+ lib/libjtaglib.la \
+ flash/libflash.la \
+ bus/libbus.la \
+ cmd/libcmd.la \
+ global/libglobal.la \
+ -lm \
+ @FTD2XXLIB@ \
+ @LIBINTL@
+
+if ENABLE_SVF
+liburjtag_la_LIBADD += svf/libsvf.la
+liburjtag_la_LIBADD += svf/libsvf_flex.la
+endif
+
+if ENABLE_BSDL
+liburjtag_la_LIBADD += bsdl/libbsdl.la
+liburjtag_la_LIBADD += bsdl/libbsdl_flex.la
+endif
+
+if ENABLE_JIM
+liburjtag_la_LIBADD += jim/libjim.la
+endif
+
+localedir = $(datadir)/locale
+INCLUDES = -DLOCALEDIR=\"$(localedir)\"
+
+AM_CFLAGS = $(WARNINGCFLAGS)
--- /dev/null
+#
+# $Id$
+#
+# Copyright (C) 2002 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+
+include $(top_srcdir)/Makefile.rules
+
+bin_PROGRAMS = \
+ bsdl2jtag
+
+bsdl2jtag_SOURCES = \
+ bsdl2jtag.c
+
+bsdl2jtag_LDADD = \
+ $(top_srcdir)/src/liburjtag.la \
+ @LIBINTL@
+
+localedir = $(datadir)/locale
+INCLUDES = -DLOCALEDIR=\"$(localedir)\"
+
+AM_CFLAGS = $(WARNINGCFLAGS)
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2009, Arnim Laeuger
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Arnim Laeuger <arniml@users.sourceforge.net>, 2009.
+ *
+ */
+
+#include <stdio.h>
+
+#include <urjtag/chain.h>
+#include <urjtag/log.h>
+
+#include <urjtag/bsdl_mode.h>
+#include <urjtag/bsdl.h>
+
+
+FILE *jtag_file;
+
+static int
+log_to_file (const char *fmt, va_list ap)
+{
+ return vfprintf (jtag_file, fmt, ap);
+}
+
+
+static void
+cleanup (urj_chain_t *chain)
+{
+ urj_tap_chain_free (chain);
+}
+
+
+static void
+usage (void)
+{
+ puts ("Usage: bsdl2jtag <bsdl-file> <jtag-file>");
+ puts ("Converts a BSDL file to a jtag part description.\n");
+ puts ("Parameters");
+ puts (" bsdl-file : Name of BSDL file");
+ puts (" jtag-file : Name of converted jtag description file");
+ puts ("");
+}
+
+
+int
+main (int argc, char *const argv[])
+{
+ int result;
+ urj_chain_t *chain = NULL;
+
+ chain = urj_tap_chain_alloc ();
+ if (chain == NULL)
+ {
+ urj_log (URJ_LOG_LEVEL_NORMAL, "Error: %s\n",
+ urj_error_describe());
+ return 1;
+ }
+
+ if (argc != 3)
+ {
+ usage ();
+ cleanup (chain);
+ return 1;
+ }
+
+ jtag_file = fopen (argv[2], "w");
+ if (jtag_file == NULL)
+ {
+ printf ("Error: Can't open '%s' in write mode.\n", argv[2]);
+ cleanup (chain);
+ return 1;
+ }
+
+ /* log all messages to the jtag_file */
+ urj_log_state.out_vprintf = log_to_file;
+ result = urj_bsdl_read_file (chain, argv[1], URJ_BSDL_MODE_DUMP, NULL);
+ if (result < 0)
+ {
+ urj_log (URJ_LOG_LEVEL_ERROR, "Error: %s\n", urj_error_describe());
+ urj_error_reset ();
+ }
+
+ fclose (jtag_file);
+ cleanup (chain);
+ return result < 0 ? 1 : 0;
+}
--- /dev/null
+.deps
+.libs
+Makefile
+Makefile.in
+jtag
--- /dev/null
+#
+# $Id: Makefile.am 1531 2009-04-24 15:28:59Z rfhh $
+#
+# Copyright (C) 2002 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Marcel Telka <marcel@telka.sk>, 2002.
+#
+
+include $(top_srcdir)/Makefile.rules
+
+bin_PROGRAMS = \
+ jtag
+
+jtag_SOURCES = \
+ jtag.c
+
+jtag_LDADD = \
+ $(top_srcdir)/src/liburjtag.la \
+ @LIBINTL@
+
+localedir = $(datadir)/locale
+INCLUDES = -DLOCALEDIR=\"$(localedir)\"
+
+AM_CFLAGS = $(WARNINGCFLAGS)
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2002, 2003 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2002, 2003.
+ * Modified by Ajith Kumar P.C <ajithpc@kila.com>, 20/09/2006.
+ *
+ */
+
+#include <sysdep.h>
+
+#ifndef SVN_REVISION
+#define SVN_REVISION "0"
+#endif
+
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+#include <unistd.h>
+#include <sys/stat.h>
+#include <sys/types.h>
+#ifdef HAVE_LIBREADLINE
+#include <readline/readline.h>
+#ifdef HAVE_READLINE_HISTORY_H
+#include <readline/history.h>
+#endif
+#endif
+#include <getopt.h>
+#ifdef ENABLE_NLS
+#include <locale.h>
+#endif /* ENABLE_NLS */
+#include <errno.h>
+
+#include <urjtag/chain.h>
+#include <urjtag/bus.h>
+#include <urjtag/cmd.h>
+#include <urjtag/flash.h>
+#include <urjtag/parse.h>
+#include <urjtag/jtag.h>
+
+static int urj_interactive = 0;
+
+#define JTAGDIR ".jtag"
+#define HISTORYFILE "history"
+#define RCFILE "rc"
+
+static int
+jtag_create_jtagdir (void)
+{
+ char *home = getenv ("HOME");
+ char *jdir;
+ int r;
+
+ if (!home)
+ {
+ urj_error_set (URJ_ERROR_UNSUPPORTED, "env var HOME not set");
+ return URJ_STATUS_FAIL;
+ }
+
+ jdir = malloc (strlen (home) + strlen (JTAGDIR) + 2); /* "/" and trailing \0 */
+ if (!jdir)
+ {
+ urj_error_set (URJ_ERROR_OUT_OF_MEMORY, "malloc(%zd) fails",
+ strlen (home) + strlen (JTAGDIR) + 2);
+ return URJ_STATUS_FAIL;
+ }
+
+ strcpy (jdir, home);
+ strcat (jdir, "/");
+ strcat (jdir, JTAGDIR);
+
+ /* Create the directory if it doesn't exists. */
+#ifdef __MINGW32__
+ r = mkdir (jdir);
+#else
+ r = mkdir (jdir, S_IRWXU | S_IRGRP | S_IXGRP | S_IROTH | S_IXOTH);
+#endif
+ if (r == -1)
+ {
+ if (errno == EEXIST)
+ {
+ /* @@@@ RFHH check if it is a directory */
+ errno = 0;
+ } else {
+ free (jdir);
+ urj_error_IO_set ("cannot mkdir(%s)", jdir);
+ return URJ_STATUS_FAIL;
+ }
+ }
+
+ free (jdir);
+
+ return URJ_STATUS_OK;
+}
+
+#ifdef HAVE_LIBREADLINE
+
+#ifdef HAVE_READLINE_COMPLETION
+static char **
+urj_cmd_completion (const char *text, int start, int end)
+{
+ char **ret = NULL;
+
+ if (start == 0)
+ ret = rl_completion_matches (text, urj_cmd_find_next);
+
+ return ret;
+}
+#endif /* def HAVE_READLINE_COMPLETION */
+
+#ifdef HAVE_READLINE_HISTORY
+
+static int
+jtag_load_history (void)
+{
+ char *home = getenv ("HOME");
+ char *file;
+
+ using_history ();
+
+ if (!home)
+ {
+ urj_error_set (URJ_ERROR_UNSUPPORTED, "env var HOME not set");
+ return URJ_STATUS_FAIL;
+ }
+
+ file = malloc (strlen (home) + strlen (JTAGDIR) + strlen (HISTORYFILE) + 3); /* 2 x "/" and trailing \0 */
+ if (!file)
+ {
+ urj_error_set (URJ_ERROR_OUT_OF_MEMORY, "malloc(%zd) fails",
+ strlen (home) + strlen (JTAGDIR) + strlen (HISTORYFILE) + 3);
+ return URJ_STATUS_FAIL;
+ }
+
+ strcpy (file, home);
+ strcat (file, "/");
+ strcat (file, JTAGDIR);
+ strcat (file, "/");
+ strcat (file, HISTORYFILE);
+
+ read_history (file);
+
+ free (file);
+
+ return URJ_STATUS_OK;
+}
+
+static int
+jtag_save_history (void)
+{
+ char *home = getenv ("HOME");
+ char *file;
+
+ if (!home)
+ {
+ urj_error_set (URJ_ERROR_UNSUPPORTED, "env var HOME not set");
+ return URJ_STATUS_FAIL;
+ }
+
+ file = malloc (strlen (home) + strlen (JTAGDIR) + strlen (HISTORYFILE) + 3); /* 2 x "/" and trailing \0 */
+ if (!file)
+ {
+ urj_error_set (URJ_ERROR_OUT_OF_MEMORY, "malloc(%zd) fails",
+ strlen (home) + strlen (JTAGDIR) + strlen (HISTORYFILE) + 3);
+ return URJ_STATUS_FAIL;
+ }
+
+ strcpy (file, home);
+ strcat (file, "/");
+ strcat (file, JTAGDIR);
+ strcat (file, "/");
+ strcat (file, HISTORYFILE);
+
+ write_history (file);
+
+ free (file);
+
+ return URJ_STATUS_OK;
+}
+
+#endif /* HAVE_READLINE_HISTORY */
+
+#endif /* HAVE_READLINE */
+
+/** @return URJ_STATUS_QUIT on quit command, URJ_STATUS_OK on success,
+ * URJ_STATUS_ERROR on error */
+static int
+jtag_readline_multiple_commands_support (urj_chain_t *chain, char *line) /* multiple commands should be separated with '::' */
+{
+ int r;
+ char *nextcmd = line;
+
+ if (!line || !(strlen (line) > 0))
+ return 1;
+
+ do
+ {
+ line = nextcmd;
+
+ nextcmd = strstr (nextcmd, "::"); /* :: to not confuse ms-dos users ;-) */
+
+ if (nextcmd)
+ {
+ *nextcmd++ = 0;
+ ++nextcmd;
+ while (*line == ':')
+ ++line;
+ }
+
+ r = urj_parse_line (chain, line);
+ if (r == URJ_STATUS_FAIL)
+ {
+ urj_log (URJ_LOG_LEVEL_NORMAL, "Error: %s\n", urj_error_describe());
+ urj_error_reset ();
+ }
+
+ urj_tap_chain_flush (chain);
+
+ }
+ while (nextcmd && r != URJ_STATUS_MUST_QUIT);
+
+ return r;
+}
+
+static void
+jtag_readline_loop (urj_chain_t *chain, const char *prompt)
+{
+#ifdef HAVE_LIBREADLINE
+ char *line = NULL;
+#ifdef HAVE_READLINE_HISTORY
+ HIST_ENTRY *hptr;
+#endif
+
+ /* Iterate */
+ while (jtag_readline_multiple_commands_support (chain, line)
+ != URJ_STATUS_MUST_QUIT)
+ {
+ free (line);
+
+ /* Read a line from the terminal */
+ line = readline (prompt);
+
+ /* We got EOF, bail */
+ if (!line)
+ {
+ /* @@@@ RFHH check strdup result */
+ line = strdup ("quit\n");
+ puts ("quit");
+ if (!line)
+ return;
+ }
+
+#ifdef HAVE_READLINE_HISTORY
+ /* Check if we actually got something , Don't add duplicate lines */
+ if (strlen (line))
+ {
+ if (history_length == 0)
+ add_history (line);
+ else
+ {
+ hptr = history_get (history_length);
+ /* Apple leopard libreadline emulation screws up indexing, try the other one */
+ if (hptr == NULL)
+ hptr = history_get (history_length - 1);
+ if (hptr != NULL)
+ {
+ if (strcmp (line, hptr->line))
+ add_history (line);
+ }
+ else
+ add_history (line);
+ }
+ }
+#endif
+ }
+ free (line);
+#else
+ char line[1024];
+ line[0] = 0;
+ do
+ {
+ if (jtag_readline_multiple_commands_support (chain, line)
+ == URJ_STATUS_MUST_QUIT)
+ break;
+ printf ("%s", prompt);
+ fflush (stdout);
+ }
+ while (fgets (line, 1023, stdin));
+#endif
+}
+
+static int
+jtag_parse_rc (urj_chain_t *chain)
+{
+ char *home = getenv ("HOME");
+ char *file;
+ int go;
+
+ if (!home)
+ {
+ urj_error_set (URJ_ERROR_UNSUPPORTED, "env var HOME not set");
+ return URJ_STATUS_FAIL;
+ }
+
+ file = malloc (strlen (home) + strlen (JTAGDIR) + strlen (RCFILE) + 3); /* 2 x "/" and trailing \0 */
+ if (!file)
+ {
+ urj_error_set (URJ_ERROR_OUT_OF_MEMORY, "malloc(%zd) fails",
+ strlen (home) + strlen (JTAGDIR) + strlen (RCFILE) + 3);
+ return URJ_STATUS_FAIL;
+ }
+
+ strcpy (file, home);
+ strcat (file, "/");
+ strcat (file, JTAGDIR);
+ strcat (file, "/");
+ strcat (file, RCFILE);
+
+ go = urj_parse_file (URJ_LOG_LEVEL_DETAIL, chain, file);
+
+ free (file);
+
+ return go;
+}
+
+static void
+cleanup (urj_chain_t *chain)
+{
+ urj_flash_cleanup ();
+
+ if (urj_bus)
+ {
+ URJ_BUS_FREE (urj_bus);
+ urj_bus = NULL;
+ }
+ urj_tap_chain_free (chain);
+ chain = NULL;
+}
+
+int
+main (int argc, char *const argv[])
+{
+ int go = 1;
+ int i;
+ int c;
+ int norc = 0;
+ int help = 0;
+ int version = 0;
+ int quiet = 0;
+ urj_chain_t *chain = NULL;
+
+ urj_set_argv0 (argv[0]);
+
+ if (geteuid () == 0 && getuid () != 0)
+ {
+ printf (_("'%s' must not be run suid root!\n"), "jtag");
+ return (-1);
+ }
+
+#ifdef ENABLE_NLS
+ /* l10n support */
+ setlocale (LC_ALL, "");
+ bindtextdomain (PACKAGE, LOCALEDIR);
+ textdomain (PACKAGE);
+#endif /* ENABLE_NLS */
+
+ while (1)
+ {
+ static struct option long_options[] = {
+ {"version", no_argument, 0, 'v'},
+ {"norc", no_argument, 0, 'n'},
+ {"interactive", no_argument, 0, 'i'},
+ {"help", no_argument, 0, 'h'},
+ {"quiet", no_argument, 0, 'q'},
+ {0, 0, 0, 0}
+ };
+
+ /* `getopt_long' stores the option index here. */
+ int option_index = 0;
+
+ c = getopt_long (argc, argv, "vnhiq", long_options, &option_index);
+
+ /* Detect the end of the options. */
+ if (c == -1)
+ break;
+
+ switch (c)
+ {
+ case 'v':
+ version = 1;
+ break;
+
+ case 'n':
+ norc = 1;
+ break;
+
+ case 'i':
+ urj_interactive = 1;
+ break;
+
+ case 'h':
+ default:
+ help = 1;
+ break;
+
+ case 'q':
+ quiet = 1;
+ break;
+ }
+ }
+
+ if (help)
+ {
+ /* Print help info and exit. */
+ printf (_("%s #%s\n"), PACKAGE_STRING, SVN_REVISION);
+ printf ("\n");
+
+ printf (_("Usage: %s [OPTIONS] [FILE [FILE ... ]] \n"), "jtag");
+ printf ("\n");
+
+ printf (_(" -h, --help display this help and exit\n"));
+ printf (_(" -v, --version display version information and exit\n"));
+ printf ("\n");
+ printf (_(" -n, --norc disable reading ~/.jtag/rc on startup\n"));
+ printf (_(" -i, --interactive enter interactive mode after reading files\n"));
+ printf (_(" -q, --quiet Do not print help on startup\n"));
+ printf ("\n");
+ printf (_(" [FILE] file containing commands to execute\n"));
+ printf ("\n");
+
+ printf (_(" Please report bugs at http://www.urjtag.org\n"));
+
+ exit (0);
+ }
+
+ if (version)
+ {
+ printf (_("\n%s #%s\n\n"
+ "Copyright (C) 2002, 2003 ETC s.r.o.\n"
+ "Copyright (C) 2007, 2008, 2009 Kolja Waschk and the respective authors\n"),
+ PACKAGE_STRING, SVN_REVISION);
+
+ printf (_("\n"
+ "This program is free software; you can redistribute it and/or modify\n"
+ "it under the terms of the GNU General Public License as published by\n"
+ "the Free Software Foundation; either version 2 of the License, or\n"
+ "(at your option) any later version.\n"
+ "\n"
+ "This program is distributed in the hope that it will be useful,\n"
+ "but WITHOUT ANY WARRANTY; without even the implied warranty of\n"
+ "MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the\n"
+ "GNU General Public License for more details.\n"
+ "\n"
+ "You should have received a copy of the GNU General Public License\n"
+ "along with this program; if not, write to the Free Software\n"
+ "Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA\n"));
+
+ exit (0);
+ }
+
+ /* input from files */
+ if (argc > optind)
+ {
+ for (i = optind; i < argc; i++)
+ {
+ chain = urj_tap_chain_alloc ();
+ if (!chain)
+ {
+ printf (_("Out of memory\n"));
+ return -1;
+ }
+
+ go = urj_parse_file (URJ_LOG_LEVEL_NORMAL, chain, argv[i]);
+ cleanup (chain);
+ if (go < 0)
+ {
+ printf (_("Unable to open file `%s'!\n"), argv[i]);
+ break;
+ }
+ }
+
+ if (!urj_interactive)
+ return 0;
+ }
+
+ /* input from stdin */
+ if (!isatty (0))
+ {
+ chain = urj_tap_chain_alloc ();
+ if (!chain)
+ {
+ printf (_("Out of memory\n"));
+ return -1;
+ }
+ urj_parse_stream (URJ_LOG_LEVEL_NORMAL, chain, stdin);
+
+ cleanup (chain);
+
+ return 0;
+ }
+
+ /* interactive */
+ if (!quiet)
+ printf (_("\n%s #%s\n"
+ "Copyright (C) 2002, 2003 ETC s.r.o.\n"
+ "Copyright (C) 2007, 2008, 2009 Kolja Waschk and the respective authors\n\n"
+ "%s is free software, covered by the GNU General Public License, and you are\n"
+ "welcome to change it and/or distribute copies of it under certain conditions.\n"
+ "There is absolutely no warranty for %s.\n\n"),
+ PACKAGE_STRING, SVN_REVISION, PACKAGE_NAME, PACKAGE_NAME);
+
+ chain = urj_tap_chain_alloc ();
+ if (!chain)
+ {
+ printf (_("Out of memory\n"));
+ return -1;
+ }
+
+ if (!quiet)
+ {
+ urj_warning (_("%s may damage your hardware!\n"), PACKAGE_NAME);
+ urj_log (URJ_LOG_LEVEL_NORMAL,
+ _("Type \"quit\" to exit, \"help\" for help.\n\n"));
+ }
+
+ /* Create ~/.jtag */
+ if (jtag_create_jtagdir () != URJ_STATUS_OK)
+ {
+ urj_warning ("%s\n", urj_error_describe());
+ urj_error_reset();
+ }
+
+ /* Parse and execute the RC file */
+ if (!norc)
+ {
+ if (jtag_parse_rc (chain) == URJ_STATUS_FAIL)
+ {
+ if (urj_error_get() != URJ_ERROR_IO)
+ {
+ urj_log (URJ_LOG_LEVEL_NORMAL, "Error: %s\n",
+ urj_error_describe());
+ go = 0;
+ }
+ urj_error_reset();
+ }
+ }
+
+#ifdef HAVE_LIBREADLINE
+#ifdef HAVE_READLINE_COMPLETION
+ rl_attempted_completion_function = urj_cmd_completion;
+#endif
+#endif
+
+ if (go)
+ {
+
+#ifdef HAVE_READLINE_HISTORY
+ /* Load history */
+ jtag_load_history ();
+#endif
+
+ /* main loop */
+ jtag_readline_loop (chain, getenv ("JTAG_PROMPT") ? : "jtag> ");
+
+#ifdef HAVE_READLINE_HISTORY
+ /* Save history */
+ jtag_save_history ();
+#endif
+ }
+
+ cleanup (chain);
+
+ return 0;
+}
--- /dev/null
+#
+# $Id$
+#
+# Copyright (C) 2007, Arnim Laeuger
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+
+include $(top_srcdir)/Makefile.rules
+
+OBJEXT = lo
+noinst_LTLIBRARIES = \
+ libbsdl.la \
+ libbsdl_flex.la
+
+libbsdl_la_SOURCES = \
+ vhdl_bison.y \
+ bsdl_bison.y \
+ bsdl.c \
+ bsdl_sem.c
+
+libbsdl_flex_la_SOURCES = \
+ vhdl_flex.l \
+ bsdl_flex.l
+
+noinst_HEADERS = \
+ bsdl_bison.h \
+ bsdl_config.h \
+ bsdl_msg.h \
+ bsdl_parser.h \
+ bsdl_sysdep.h \
+ bsdl_types.h \
+ vhdl_bison.h \
+ vhdl_parser.h
+
+AM_CFLAGS = $(WARNINGCFLAGS)
+
+libbsdl_flex_la_CFLAGS = \
+ $(AM_CFLAGS) \
+ -Wno-error
+
+# additional dependencies
+# - all files depend on bsdl_config.h which dynamically generated
+# - *_flex files must be processed after their *_bison counterparts
+# to ensure that *_bison.h is present
+vhdl_flex.$(OBJEXT): vhdl_bison.$(OBJEXT) bsdl_config.h
+vhdl_bison.$(OBJEXT): bsdl_config.h
+bsdl_flex.$(OBJEXT): bsdl_bison.$(OBJEXT) bsdl_config.h
+bsdl_bison.$(OBJEXT): bsdl_config.h
+bsdl.$(OBJEXT) : bsdl_config.h
+bsdl_sem.$(OBJEXT): bsdl_config.h
+
+vhdl_bison.h: vhdl_bison.c
+bsdl_bison.h: bsdl_bison.c
+
+bsdl_config.h: ../../config.h
+ grep 'DMALLOC' $< > $@
+
+AM_LFLAGS = -i
+
+MAINTAINERCLEANFILES = \
+ vhdl_bison.c \
+ vhdl_bison.h \
+ bsdl_bison.c \
+ bsdl_bison.h \
+ vhdl_flex.c \
+ bsdl_config.h
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2007, Arnim Laeuger
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Arnim Laeuger <arniml@users.sourceforge.net>, 2007.
+ *
+ */
+
+#include <sysdep.h>
+
+#include <stdlib.h>
+#include <stdio.h>
+#include <stdarg.h>
+// #define __USE_GNU 1
+#include <string.h>
+
+#include <dirent.h>
+#include <sys/stat.h>
+
+#include <urjtag/chain.h>
+#include <urjtag/part.h>
+#include <urjtag/cmd.h>
+
+//#include "bsdl_local.h"
+#include "bsdl_types.h"
+#include "vhdl_parser.h"
+#include "bsdl_parser.h"
+
+#include "bsdl_msg.h"
+
+#ifdef DMALLOC
+#include "dmalloc.h"
+#endif
+
+
+/*****************************************************************************
+ * urj_bsdl_read_file( chain, BSDL_File_Name, proc_mode, idcode )
+ *
+ * Read, parse and optionally apply contents of BSDL file.
+ *
+ * Parameters
+ * chain : pointer to active chain structure
+ * BSDL_File_Name : name of BSDL file to read
+ * proc_mode : processing mode, consisting of BSDL_MODE_* bits
+ * idcode : reference idcode string
+ *
+ * Returns
+ * < 0 : Error occured, parse/syntax problems or out of memory
+ * = 0 : No errors, idcode not checked or mismatching
+ * > 0 : No errors, idcode checked and matched
+ *
+ ****************************************************************************/
+int
+urj_bsdl_read_file (urj_chain_t *chain, const char *BSDL_File_Name,
+ int proc_mode, const char *idcode)
+{
+ urj_bsdl_globs_t *globs = &(chain->bsdl);
+ FILE *BSDL_File;
+ urj_vhdl_parser_priv_t *vhdl_parser_priv;
+ urj_bsdl_jtag_ctrl_t jtag_ctrl;
+ int Compile_Errors = 1;
+ int result = 0;
+
+ /* purge previous errors */
+ urj_error_reset ();
+
+ if (globs->debug)
+ proc_mode |= URJ_BSDL_MODE_MSG_ALL;
+
+ jtag_ctrl.proc_mode = proc_mode;
+
+ /* perform some basic checks */
+ if (proc_mode & URJ_BSDL_MODE_INSTR_EXEC)
+ {
+ if (chain == NULL)
+ {
+ urj_bsdl_err_set (proc_mode, URJ_ERROR_NO_CHAIN,
+ "Can't execute commands without chain");
+ return -1;
+ }
+ if (chain->parts == NULL)
+ {
+ urj_bsdl_err_set (proc_mode, URJ_ERROR_NO_PART,
+ "Can't execute commands without part");
+ return -1;
+ }
+ if (!(chain && chain->parts))
+ return -1;
+
+ jtag_ctrl.chain = chain;
+ jtag_ctrl.part = chain->parts->parts[chain->active_part];
+ }
+ else
+ {
+ jtag_ctrl.chain = NULL;
+ jtag_ctrl.part = NULL;
+ }
+
+ BSDL_File = fopen (BSDL_File_Name, "r");
+
+ urj_bsdl_msg (proc_mode, _("Reading file '%s'\n"), BSDL_File_Name);
+
+ if (BSDL_File == NULL)
+ {
+ urj_bsdl_err_set (proc_mode, URJ_ERROR_IO,
+ "Unable to open BSDL file '%s'",
+ BSDL_File_Name);
+ return -1;
+ }
+
+ if ((vhdl_parser_priv = urj_vhdl_parser_init (BSDL_File, &jtag_ctrl)))
+ {
+ vhdl_parser_priv->jtag_ctrl->idcode = NULL;
+
+ urj_vhdl_parse (vhdl_parser_priv);
+
+ Compile_Errors =
+ urj_vhdl_flex_get_compile_errors (vhdl_parser_priv->scanner);
+ if (Compile_Errors == 0)
+ {
+ urj_bsdl_msg (proc_mode,
+ _("BSDL file '%s' passed VHDL stage correctly\n"),
+ BSDL_File_Name);
+
+ result = urj_bsdl_process_elements (&jtag_ctrl, idcode);
+
+ if (result >= 0)
+ urj_bsdl_msg (proc_mode,
+ _("BSDL file '%s' passed BSDL stage correctly\n"),
+ BSDL_File_Name);
+
+ }
+ else
+ {
+ urj_bsdl_err (proc_mode,
+ _("BSDL file '%s' contains errors in VHDL stage, stopping\n"),
+ BSDL_File_Name);
+ }
+
+
+ urj_vhdl_parser_deinit (vhdl_parser_priv);
+ }
+
+ return Compile_Errors == 0 ? result : -1;
+}
+
+
+/*****************************************************************************
+ * void urj_bsdl_set_path( chain, pathlist )
+ *
+ * Dissects pathlist and enters its elements to the global variable
+ * bsdl.path_list.
+ *
+ * Parameters
+ * chain : pointer to active chain structure
+ * pathlist : string containing the paths to be stored, format:
+ * <path1>;<path2>;<path3>;...
+ *
+ * Returns
+ * void
+ ****************************************************************************/
+void
+urj_bsdl_set_path (urj_chain_t *chain, const char *pathlist)
+{
+ urj_bsdl_globs_t *globs = &(chain->bsdl);
+ char *delim;
+ char *elem;
+ char *pathelem;
+ int num;
+ size_t len;
+
+ /* free memory of current path list */
+ if (globs->path_list)
+ {
+ for (num = 0; globs->path_list[num]; num++)
+ if (globs->path_list[num])
+ free (globs->path_list[num]);
+ free (globs->path_list);
+ globs->path_list = NULL;
+ }
+
+ /* run through path list and determine number of elements */
+ for (num = 0, elem = (char *) pathlist; strlen (elem) > 0;)
+ {
+ delim = strchr (elem, ';');
+ if ((delim - elem > 0) || (delim == NULL))
+ {
+ num++;
+ /* extend path list array */
+ /* @@@@ RFHH check realloc result */
+ globs->path_list = realloc (globs->path_list,
+ (num + 1) * sizeof (char *));
+ /* enter path element up to the delimeter */
+ if (delim == NULL)
+ len = strlen (elem);
+ else
+ len = delim - elem;
+ /* @@@@ RFHH check malloc result */
+ pathelem = malloc (len + 1);
+ memcpy (pathelem, elem, len);
+ pathelem[len] = '\0';
+ globs->path_list[num - 1] = pathelem;
+ globs->path_list[num] = NULL;
+ }
+ elem = delim ? delim + 1 : elem + strlen (elem);
+ }
+
+ if (globs->debug)
+ for (num = 0; globs->path_list[num] != NULL; num++)
+ urj_bsdl_msg (URJ_BSDL_MODE_MSG_ALL,
+ "%s\n", globs->path_list[num]);
+}
+
+
+/*****************************************************************************
+ * urj_bsdl_scan_files( chain, idcode, proc_mode )
+ *
+ * Scans through all files found via the elements in bsdl_path_list
+ * and does a test read on each of them.
+ * If mode >= 1 is requested, it will read the first BSDL file with matching
+ * idcode in "execute" mode. I.e. all extracted statements are applied to
+ * the current part.
+ *
+ * Parameters
+ * chain : pointer to active chain structure
+ * idcode : reference idcode string
+ * proc_mode : processing mode, consisting of BSDL_MODE_* bits
+ *
+ * Returns
+ * < 0 : Error occured, parse/syntax problems or out of memory
+ * = 0 : No errors, idcode not checked or mismatching
+ * > 0 : No errors, idcode checked and matched
+ *
+ ****************************************************************************/
+int
+urj_bsdl_scan_files (urj_chain_t *chain, const char *idcode, int proc_mode)
+{
+ urj_bsdl_globs_t *globs = &(chain->bsdl);
+ int idx = 0;
+ int result = 0;
+
+ /* abort if no path list was specified */
+ if (globs->path_list == NULL)
+ return 0;
+
+ while (globs->path_list[idx] && (result <= 0))
+ {
+ DIR *dir;
+
+ if ((dir = opendir (globs->path_list[idx])))
+ {
+ struct dirent *elem;
+
+ /* run through all elements in the current directory */
+ while ((elem = readdir (dir)) && (result <= 0))
+ {
+ char *name;
+
+ /* @@@@ RFHH handle malloc error result */
+ name = malloc (strlen (globs->path_list[idx])
+ + strlen (elem->d_name) + 1 + 1);
+ if (name)
+ {
+ struct stat buf;
+
+ strcpy (name, globs->path_list[idx]);
+ strcat (name, "/");
+ strcat (name, elem->d_name);
+
+ if (stat (name, &buf) == 0)
+ {
+ if (buf.st_mode & S_IFREG)
+ {
+ result = urj_bsdl_read_file (chain, name, proc_mode,
+ idcode);
+ if (result == 1)
+ printf (_(" Filename: %s\n"), name);
+ }
+ }
+
+ free (name);
+ }
+ }
+
+ closedir (dir);
+ }
+ else
+ urj_bsdl_warn (proc_mode,
+ _("Cannot open directory %s\n"),
+ globs->path_list[idx]);
+
+ idx++;
+ }
+
+ return result;
+}
+
+
+/*
+ Local Variables:
+ mode:C
+ c-default-style:java
+ indent-tabs-mode:nil
+ End:
+*/
--- /dev/null
+/*
+ * $Id$
+ *
+ * Original Yacc code by Ken Parker, 1990
+ * Extensions and adaptions for UrJTAG by Arnim Laeuger, 2007
+ *
+ */
+
+/* ----------------------------------------------------------------------- */
+/* */
+/* Yacc code for BSDL */
+/* */
+/* ----------------------------------------------------------------------- */
+/* Date: 901003 */
+
+/*
+
+Email header accompanying the original Yacc code:
+ http://www.eda.org/vug_bbs/bsdl.parser
+
+-----------------------------------8<--------------------------------------
+
+Hello All,
+
+This is this first mailing of the BSDL* Version 0.0 parser specifications
+we are sending to people who request it from our publicized E-Mail address;
+
+ bsdl%hpmtlx@hplabs.HP.com
+
+You are free to redistribute this at will, but we feel that it would be
+better if respondents asked for it directly so that their addresses can
+be entered into our list for future mailings and updates.
+
+It would be helpful if you could confirm receipt of this transmission.
+We also would be very interested to hear about your experiences with this
+information and what you are planning to do with BSDL.
+
+Regards,
+
+Ken Parker
+Hewlett-Packard Company
+
+
+*Boundary-Scan Description Language - as documented in:
+
+"A Language for Describing Boundary-Scan Devices", K.P. Parker
+and S. Oresjo, Proceedings 1990 International Test Conference,
+Washington DC, pp 222-234
+
+
+- -----------------cut here---------------------------------------------------
+
+
+901004.0721 Hewlett-Packard Company
+901016.1049 Manufacturing Test Division
+ P.O. Box 301
+ Loveland, Colorado 80537
+ USA
+
+ October 1990
+Hello BSDL Parser Requestor,
+
+ This Electronic Mail reply contains the computer specifications for
+Hewlett-Packard's Version 0.0 BSDL parser. This section of the reply
+explains the contents of the rest of this file.
+
+This file is composed of seven (7) parts:
+
+ 1) How to use this file
+
+ 2) UNIX* Lex source (lexicographical tokenizing rules)
+
+ 3) UNIX* Yacc source (BNF-like syntax description)
+
+ 4) A sample main program to recognize BSDL.
+
+ 5) A BSDL description of the Texas Instruments 74bct8374 that is
+ recognized by the parser, for testing purposes.
+
+ 6) The VHDL package STD_1149_1_1990 needed by this parser.
+
+ 7) [added 901016] Porting experiences to other systems.
+
+
+RECOMMENDATION: Save a copy of this file in archival storage before
+ processing it via the instructions below. This will
+ allow you to recover from errors, and allow you to
+ compare subsequently released data for changes.
+
+DISCLAIMERS:
+
+1. The IEEE 1149.1 Working Group has not endorsed BSDL Version 0.0 and
+ therefore no person may represent it as an IEEE standard or imply that
+ a resulting IEEE standard will be identical to it.
+
+2. The IEEE 1149.1 Working Group recognizes that BSDL Version 0.0 is a
+ well-conceived initiative that is likely to excelerate the creation
+ of tools that support the 1149.1 standard. As such, changes and
+ enhancements will be carefully considered so as not to needlessly
+ disrupt these development efforts. The overriding goal is the
+ ultimate success of the 1149.1 standard.
+
+LEGAL NOTICES:
+
+ Hewlett-Packard Company makes no warranty of any kind with regard to
+ this information, including, but not limited to, the implied
+ waranties of merchantability and fitness for a particular purpose.
+
+ Hewlett-Packard Company shall not be liable for errors contained
+ herein or direct, indirect, special, incidental, or consequential
+ damages in connection with the furnishing, performance, or use of
+ this material.
+
+
+*UNIX is a trademark of AT&T in the USA and other countries.
+
+*/
+
+
+%pure-parser
+%parse-param {urj_bsdl_parser_priv_t *priv_data}
+%defines
+%name-prefix="urj_bsdl_"
+
+%{
+#include <stdlib.h>
+#include <string.h>
+#include <stdio.h>
+#include <ctype.h>
+
+#include "bsdl_sysdep.h"
+
+#include "bsdl_types.h"
+#include "bsdl_msg.h"
+
+/* interface to flex */
+#include "bsdl_bison.h"
+#include "bsdl_parser.h"
+
+#ifdef DMALLOC
+#include "dmalloc.h"
+#endif
+
+#define YYLEX_PARAM priv_data->scanner
+int yylex (YYSTYPE *, void *);
+
+#if 1
+#define ERROR_LIMIT 0
+#define BUMP_ERROR \
+ do { \
+ if (urj_bsdl_flex_postinc_compile_errors (priv_data->scanner) > ERROR_LIMIT) \
+ { \
+ Give_Up_And_Quit (priv_data); \
+ YYABORT; \
+ } \
+ } while (0)
+#else
+#define BUMP_ERROR \
+ do { \
+ Give_Up_And_Quit (priv_data); \
+ YYABORT; \
+ } while (0)
+#endif
+
+static void Print_Error (urj_bsdl_parser_priv_t *, const char *);
+static void Print_Warning (urj_bsdl_parser_priv_t *, const char *);
+static void Give_Up_And_Quit (urj_bsdl_parser_priv_t *);
+
+/* semantic functions */
+static void add_instruction (urj_bsdl_parser_priv_t *, char *, char *);
+static void ac_set_register (urj_bsdl_parser_priv_t *, char *, int);
+static void ac_add_instruction (urj_bsdl_parser_priv_t *, char *);
+static void ac_apply_assoc (urj_bsdl_parser_priv_t *);
+static void prt_add_name (urj_bsdl_parser_priv_t *, char *);
+static void prt_add_bit (urj_bsdl_parser_priv_t *);
+static void prt_add_range (urj_bsdl_parser_priv_t *, int, int);
+static void ci_no_disable (urj_bsdl_parser_priv_t *);
+static void ci_set_cell_spec_disable (urj_bsdl_parser_priv_t *, int, int,
+ int);
+static void ci_set_cell_spec (urj_bsdl_parser_priv_t *, int, char *);
+static void ci_append_cell_info (urj_bsdl_parser_priv_t *, int);
+
+void yyerror (urj_bsdl_parser_priv_t *, const char *);
+%}
+
+%union {
+ int integer;
+ char *str;
+}
+
+
+%token CONSTANT PIN_MAP
+%token PHYSICAL_PIN_MAP PIN_MAP_STRING
+%token TAP_SCAN_IN TAP_SCAN_OUT TAP_SCAN_MODE TAP_SCAN_RESET
+%token TAP_SCAN_CLOCK
+%token INSTRUCTION_LENGTH INSTRUCTION_OPCODE INSTRUCTION_CAPTURE INSTRUCTION_DISABLE
+%token INSTRUCTION_GUARD INSTRUCTION_PRIVATE
+%token REGISTER_ACCESS
+%token BOUNDARY_LENGTH BOUNDARY_REGISTER IDCODE_REGISTER
+%token USERCODE_REGISTER BOUNDARY DEVICE_ID
+%token INPUT OUTPUT2 OUTPUT3 CONTROL CONTROLR INTERNAL
+%token CLOCK BIDIR BIDIR_IN BIDIR_OUT
+%token Z WEAK0 WEAK1 IDENTIFIER
+%token PULL0 PULL1 KEEPER
+%token DECIMAL_NUMBER BINARY_PATTERN
+%token BIN_X_PATTERN COMMA
+%token LPAREN RPAREN LBRACKET RBRACKET COLON ASTERISK
+%token COMPLIANCE_PATTERNS
+%token OBSERVE_ONLY
+%token BYPASS CLAMP EXTEST HIGHZ IDCODE INTEST PRELOAD RUNBIST SAMPLE USERCODE
+%token COMPONENT_CONFORMANCE STD_1149_1_1990 STD_1149_1_1993 STD_1149_1_2001
+%token ISC_CONFORMANCE STD_1532_2001 STD_1532_2002
+%token ISC_PIN_BEHAVIOR
+%token ISC_FIXED_SYSTEM_PINS
+%token ISC_STATUS IMPLEMENTED
+%token ISC_BLANK_USERCODE
+%token ISC_SECURITY ISC_DISABLE_READ ISC_DISABLE_PROGRAM ISC_DISABLE_ERASE ISC_DISABLE_KEY
+%token ISC_FLOW UNPROCESSED EXIT_ON_ERROR ARRAY SECURITY INITIALIZE REPEAT TERMINATE
+%token LOOP MIN MAX DOLLAR EQUAL HEX_STRING WAIT REAL_NUMBER
+%token PLUS MINUS SH_RIGHT SH_LEFT TILDE QUESTION_MARK EXCLAMATION_MARK QUESTION_EXCLAMATION
+%token CRC OST
+%token ISC_PROCEDURE
+%token ISC_ACTION PROPRIETARY OPTIONAL RECOMMENDED
+%token ISC_ILLEGAL_EXIT
+%token ILLEGAL
+
+%type <str> HEX_STRING
+%type <str> BIN_X_PATTERN
+%type <str> IDENTIFIER
+%type <str> BINARY_PATTERN
+%type <str> Binary_Pattern
+%type <str> Binary_Pattern_List
+%type <str> REAL_NUMBER
+%type <integer> DECIMAL_NUMBER
+%type <integer> Cell_Function
+%type <str> Safe_Value
+%type <integer> Disable_Value
+%type <str> Standard_Reg
+%type <str> Instruction_Name
+
+%start BSDL_Statement
+
+%% /* End declarations, begin rules */
+
+BSDL_Statement : BSDL_Pin_Map
+ | BSDL_Map_String
+ | BSDL_Tap_Scan_In
+ | BSDL_Tap_Scan_Out
+ | BSDL_Tap_Scan_Mode
+ | BSDL_Tap_Scan_Reset
+ | BSDL_Tap_Scan_Clock
+ | BSDL_Inst_Length
+ | BSDL_Opcode
+ | BSDL_Inst_Capture
+ | BSDL_Inst_Disable
+ | BSDL_Inst_Guard
+ | BSDL_Inst_Private
+ | BSDL_Idcode_Register
+ | BSDL_Usercode_Register
+ | BSDL_Register_Access
+ | BSDL_Boundary_Length
+ | BSDL_Boundary_Register
+ | BSDL_Compliance_Patterns
+ | BSDL_Component_Conformance
+ | ISC_Extension
+ | error
+ {
+ Print_Error (priv_data, _("Unsupported BSDL construct found"));
+ BUMP_ERROR;
+ YYABORT;
+ }
+;
+
+/****************************************************************************/
+BSDL_Pin_Map : PIN_MAP PHYSICAL_PIN_MAP
+;
+
+/****************************************************************************/
+BSDL_Map_String : PIN_MAP_STRING Pin_Mapping
+ | BSDL_Map_String COMMA Pin_Mapping
+;
+Pin_Mapping : IDENTIFIER COLON Physical_Pin_Desc
+ { free ($1); }
+;
+Physical_Pin_Desc : Physical_Pin
+ | LPAREN Physical_Pin_List RPAREN
+;
+Physical_Pin_List : Physical_Pin
+ | Physical_Pin_List COMMA Physical_Pin
+;
+Physical_Pin : IDENTIFIER
+ { free ($1); }
+ | IDENTIFIER LPAREN DECIMAL_NUMBER RPAREN
+ { free ($1); }
+ | DECIMAL_NUMBER
+;
+
+/****************************************************************************/
+BSDL_Tap_Scan_In : TAP_SCAN_IN DECIMAL_NUMBER
+;
+
+/****************************************************************************/
+BSDL_Tap_Scan_Out : TAP_SCAN_OUT DECIMAL_NUMBER
+;
+
+/****************************************************************************/
+BSDL_Tap_Scan_Mode : TAP_SCAN_MODE DECIMAL_NUMBER
+;
+
+/****************************************************************************/
+BSDL_Tap_Scan_Reset : TAP_SCAN_RESET DECIMAL_NUMBER
+;
+
+/****************************************************************************/
+BSDL_Tap_Scan_Clock : TAP_SCAN_CLOCK DECIMAL_NUMBER
+;
+
+/****************************************************************************/
+BSDL_Inst_Length : INSTRUCTION_LENGTH DECIMAL_NUMBER
+ { priv_data->jtag_ctrl->instr_len = $2; }
+;
+
+/****************************************************************************/
+BSDL_Opcode : INSTRUCTION_OPCODE BSDL_Opcode_Table
+;
+BSDL_Opcode_Table : Opcode_Desc
+ | BSDL_Opcode_Table COMMA Opcode_Desc
+ | error
+ {
+ Print_Error (priv_data,
+ _("Error in Instruction_Opcode attribute statement"));
+ BUMP_ERROR;
+ YYABORT;
+ }
+;
+Opcode_Desc : IDENTIFIER LPAREN Binary_Pattern_List RPAREN
+ { add_instruction (priv_data, $1, $3); }
+;
+Binary_Pattern_List : Binary_Pattern
+ { $$ = $1; }
+ | Binary_Pattern_List COMMA Binary_Pattern
+ {
+ Print_Warning (priv_data,
+ _("Multiple opcode patterns are not supported, first pattern will be used"));
+ $$ = $1;
+ free ($3);
+ }
+;
+Binary_Pattern : BINARY_PATTERN
+ { $$ = $1; }
+;
+
+/****************************************************************************/
+BSDL_Inst_Capture : INSTRUCTION_CAPTURE BIN_X_PATTERN
+ { free ($2); }
+;
+
+/****************************************************************************/
+BSDL_Inst_Disable : INSTRUCTION_DISABLE IDENTIFIER
+ { free ($2); }
+;
+
+/****************************************************************************/
+BSDL_Inst_Guard : INSTRUCTION_GUARD IDENTIFIER
+ { free ($2); }
+;
+
+/****************************************************************************/
+BSDL_Inst_Private : INSTRUCTION_PRIVATE Private_Opcode_List
+;
+Private_Opcode_List : Private_Opcode
+ | Private_Opcode_List COMMA Private_Opcode
+ | error
+ {
+ Print_Error (priv_data, _("Error in Opcode List"));
+ BUMP_ERROR;
+ YYABORT;
+ }
+;
+Private_Opcode : IDENTIFIER
+ { free ($1); }
+;
+
+/****************************************************************************/
+BSDL_Idcode_Register : IDCODE_REGISTER BIN_X_PATTERN
+ { priv_data->jtag_ctrl->idcode = $2; }
+;
+
+/****************************************************************************/
+BSDL_Usercode_Register : USERCODE_REGISTER BIN_X_PATTERN
+ { priv_data->jtag_ctrl->usercode = $2; }
+;
+
+/****************************************************************************/
+BSDL_Register_Access : REGISTER_ACCESS Register_String
+;
+Register_String : Register_Assoc
+ | Register_String COMMA Register_Assoc
+;
+Register_Assoc : Register_Decl LPAREN Reg_Opcode_List RPAREN
+ { ac_apply_assoc (priv_data); }
+;
+Register_Decl : Standard_Reg
+ { ac_set_register (priv_data, $1, 0); }
+ | IDENTIFIER LBRACKET DECIMAL_NUMBER RBRACKET
+ { ac_set_register (priv_data, $1, $3); }
+;
+Standard_Reg : BOUNDARY
+ { $$ = strdup ("BOUNDARY"); }
+ | BYPASS
+ { $$ = strdup ("BYPASS"); }
+ | IDCODE
+ { $$ = strdup ("IDCODE"); }
+ | USERCODE
+ { $$ = strdup ("USERCODE"); }
+ | DEVICE_ID
+ { $$ = strdup ("DEVICE_ID"); }
+;
+Reg_Opcode_List : Reg_Opcode
+ | Reg_Opcode_List COMMA Reg_Opcode
+;
+Instruction_Name : BYPASS
+ { $$ = strdup ("BYPASS"); }
+ | CLAMP
+ { $$ = strdup ("CLAMP"); }
+ | EXTEST
+ { $$ = strdup ("EXTEST"); }
+ | HIGHZ
+ { $$ = strdup ("HIGHZ"); }
+ | IDCODE
+ { $$ = strdup ("IDCODE"); }
+ | INTEST
+ { $$ = strdup ("INTEST"); }
+ | PRELOAD
+ { $$ = strdup ("PRELOAD"); }
+ | RUNBIST
+ { $$ = strdup ("RUNBIST"); }
+ | SAMPLE
+ { $$ = strdup ("SAMPLE"); }
+ | USERCODE
+ { $$ = strdup ("USERCODE"); }
+ | IDENTIFIER
+ { $$ = $1; }
+;
+Reg_Opcode : Instruction_Name
+ { ac_add_instruction (priv_data, $1); }
+;
+
+
+/****************************************************************************/
+BSDL_Boundary_Length : BOUNDARY_LENGTH DECIMAL_NUMBER
+ { priv_data->jtag_ctrl->bsr_len = $2; }
+;
+
+/****************************************************************************/
+BSDL_Boundary_Register : BOUNDARY_REGISTER BSDL_Cell_Table
+;
+BSDL_Cell_Table : Cell_Entry
+ | BSDL_Cell_Table COMMA Cell_Entry
+ | error
+ {Print_Error (priv_data, _("Error in Boundary Cell description"));
+ BUMP_ERROR; YYABORT; }
+;
+Cell_Entry : DECIMAL_NUMBER LPAREN Cell_Info RPAREN
+ { ci_append_cell_info (priv_data, $1); }
+;
+Cell_Info : Cell_Spec
+ { ci_no_disable (priv_data); }
+ | Cell_Spec COMMA Disable_Spec
+;
+Cell_Spec : IDENTIFIER COMMA Port_Name COMMA Cell_Function
+ COMMA Safe_Value
+ {
+ free ($1);
+ ci_set_cell_spec (priv_data, $5, $7);
+ }
+;
+Port_Name : IDENTIFIER
+ {
+ prt_add_name (priv_data, $1);
+ prt_add_bit (priv_data);
+ }
+ | IDENTIFIER LPAREN DECIMAL_NUMBER RPAREN
+ {
+ prt_add_name (priv_data, $1);
+ prt_add_range (priv_data, $3, $3);
+ }
+ | ASTERISK
+ {
+ prt_add_name (priv_data, strdup ("*"));
+ prt_add_bit (priv_data);
+ }
+;
+Cell_Function : INPUT
+ { $$ = INPUT; }
+ | OUTPUT2
+ { $$ = OUTPUT2; }
+ | OUTPUT3
+ { $$ = OUTPUT3; }
+ | CONTROL
+ { $$ = CONTROL; }
+ | CONTROLR
+ { $$ = CONTROLR; }
+ | INTERNAL
+ { $$ = INTERNAL; }
+ | CLOCK
+ { $$ = CLOCK; }
+ | BIDIR
+ { $$ = BIDIR; }
+ | OBSERVE_ONLY
+ { $$ = OBSERVE_ONLY; }
+;
+Safe_Value : IDENTIFIER
+ { $$ = $1; }
+ | DECIMAL_NUMBER
+ {
+ char *tmp;
+ /* @@@@ RFHH check malloc result */
+ tmp = malloc (2);
+ snprintf (tmp, 2, "%i", $1);
+ tmp[1] = '\0';
+ $$ = tmp;
+ }
+;
+Disable_Spec : DECIMAL_NUMBER COMMA DECIMAL_NUMBER COMMA Disable_Value
+ { ci_set_cell_spec_disable (priv_data, $1, $3, $5); }
+;
+Disable_Value : Z
+ { $$ = Z; }
+ | WEAK0
+ { $$ = WEAK0; }
+ | WEAK1
+ { $$ = WEAK1; }
+ | PULL0
+ { $$ = PULL0; }
+ | PULL1
+ { $$ = PULL1; }
+ | KEEPER
+ { $$ = KEEPER; }
+;
+
+/****************************************************************************/
+BSDL_Compliance_Patterns : COMPLIANCE_PATTERNS BSDL_Compliance_Pattern
+;
+BSDL_Compliance_Pattern : LPAREN Physical_Pin_List RPAREN
+ { urj_bsdl_flex_set_bin_x (priv_data->scanner); }
+ LPAREN Bin_X_Pattern_List RPAREN
+;
+Bin_X_Pattern_List : BIN_X_PATTERN
+ { free ($1); }
+ | Bin_X_Pattern_List COMMA BIN_X_PATTERN
+ { free ($3); }
+;
+
+/****************************************************************************/
+BSDL_Component_Conformance : COMPONENT_CONFORMANCE STD_1149_1_1990
+ { priv_data->jtag_ctrl->conformance = URJ_BSDL_CONF_1990; }
+ | COMPONENT_CONFORMANCE STD_1149_1_1993
+ { priv_data->jtag_ctrl->conformance = URJ_BSDL_CONF_1993; }
+ | COMPONENT_CONFORMANCE STD_1149_1_2001
+ { priv_data->jtag_ctrl->conformance = URJ_BSDL_CONF_2001; }
+;
+/****************************************************************************/
+ISC_Extension : ISC_Conformance
+ | ISC_Pin_Behavior
+ | ISC_Fixed_System_Pins
+ | ISC_Status
+ | ISC_Blank_Usercode
+ | ISC_Security
+ | ISC_Flow
+ | ISC_Procedure
+ | ISC_Action
+ | ISC_Illegal_Exit
+;
+/****************************************************************************/
+ISC_Conformance : ISC_CONFORMANCE STD_1532_2001
+ | ISC_CONFORMANCE STD_1532_2002
+;
+/****************************************************************************/
+ISC_Pin_Behavior : ISC_PIN_BEHAVIOR Pin_Behavior_Option
+;
+Pin_Behavior_Option : HIGHZ
+ | CLAMP
+ | error
+ {
+ Print_Error (priv_data, _("Error in ISC_Pin_Behavior Definition"));
+ BUMP_ERROR;
+ YYABORT;
+ }
+;
+/****************************************************************************/
+ISC_Fixed_System_Pins : ISC_FIXED_SYSTEM_PINS Fixed_Pin_List
+;
+Fixed_Pin_List : Port_Id
+ | Fixed_Pin_List COMMA Port_Id
+ | error
+ {
+ Print_Error (priv_data, _("Error in ISC_Fixed_System_Pins Definition"));
+ BUMP_ERROR;
+ YYABORT;
+ }
+;
+Port_Id : IDENTIFIER
+ { free ($1); }
+ | IDENTIFIER LPAREN DECIMAL_NUMBER RPAREN
+ { free ($1); }
+;
+/****************************************************************************/
+ISC_Status : ISC_STATUS Status_Modifier IMPLEMENTED
+;
+Status_Modifier : /* empty */
+ | IDENTIFIER
+ { free ($1); }
+;
+/****************************************************************************/
+ISC_Blank_Usercode : ISC_BLANK_USERCODE BIN_X_PATTERN
+ { free ($2); }
+;
+/****************************************************************************/
+ISC_Security : ISC_SECURITY Protection_Spec
+;
+Protection_Spec : Read_Spec COMMA Program_Spec COMMA Erase_Spec COMMA Key_Spec
+ | error
+ {
+ Print_Error (priv_data, _("Error in ISC_Security Definition"));
+ BUMP_ERROR;
+ YYABORT;
+ }
+;
+Read_Spec : ISC_DISABLE_READ Bit_Spec
+;
+Program_Spec : ISC_DISABLE_PROGRAM Bit_Spec
+;
+Erase_Spec : ISC_DISABLE_ERASE Bit_Spec
+;
+Key_Spec : ISC_DISABLE_KEY Bit_Range
+;
+Bit_Spec : ASTERISK
+ | DECIMAL_NUMBER
+;
+Bit_Range : ASTERISK
+ | DECIMAL_NUMBER MINUS DECIMAL_NUMBER
+;
+/****************************************************************************/
+ISC_Flow : ISC_FLOW Flow_Definition_List
+;
+Flow_Definition_List : Flow_Definition
+ | Flow_Definition_List COMMA Flow_Definition
+;
+Flow_Definition : Flow_Descriptor
+ | Flow_Descriptor Initialize_Block
+ | Flow_Descriptor Initialize_Block Repeat_Block
+ | Flow_Descriptor Initialize_Block Repeat_Block Terminate_Block
+ | Flow_Descriptor Repeat_Block
+ | Flow_Descriptor Repeat_Block Terminate_Block
+ | Flow_Descriptor Terminate_Block
+ | error
+ {
+ Print_Error (priv_data, _("Error in ISC_Flow Definition"));
+ BUMP_ERROR;
+ YYABORT;
+ }
+;
+Flow_Descriptor : IDENTIFIER
+ { free ($1); }
+ | IDENTIFIER Data_Name
+ { free ($1); }
+ | IDENTIFIER Data_Name UNPROCESSED
+ { free ($1); }
+ | IDENTIFIER Data_Name UNPROCESSED EXIT_ON_ERROR
+ { free ($1); }
+ | IDENTIFIER UNPROCESSED
+ { free ($1); }
+ | IDENTIFIER UNPROCESSED EXIT_ON_ERROR
+ { free ($1); }
+ | IDENTIFIER EXIT_ON_ERROR
+ { free ($1); }
+;
+Data_Name : LPAREN Standard_Data_Name RPAREN
+ | LPAREN IDENTIFIER RPAREN
+ { free ($2); }
+;
+Standard_Data_Name : ARRAY | USERCODE | SECURITY | IDCODE | PRELOAD
+;
+Initialize_Block : INITIALIZE Activity_List
+;
+Repeat_Block : REPEAT DECIMAL_NUMBER Activity_List
+;
+Terminate_Block : TERMINATE Activity_List
+;
+Activity_List : Activity_Element
+ | Activity_List Activity_Element
+;
+Activity_Element : Activity
+ | Loop_Block
+;
+Loop_Block : LOOP Loop_Min_Spec Loop_Max_Spec LPAREN Loop_Activity_List RPAREN
+;
+Loop_Min_Spec : /* empty */
+ | MIN DECIMAL_NUMBER
+;
+Loop_Max_Spec : MAX DECIMAL_NUMBER
+;
+Loop_Activity_List : Activity
+ | Loop_Activity_List Activity
+;
+Activity : LPAREN Instruction_Name Wait_Specification RPAREN
+ { free ($2); }
+ | LPAREN Instruction_Name Update_Field_List Wait_Specification RPAREN
+ { free ($2); }
+ | LPAREN Instruction_Name Wait_Specification Capture_Field_List RPAREN
+ { free ($2); }
+ | LPAREN Instruction_Name Update_Field_List Wait_Specification Capture_Field_List RPAREN
+ { free ($2); }
+;
+Update_Field_List : Update_Field
+ | Update_Field_List COMMA Update_Field
+;
+Update_Field : DECIMAL_NUMBER
+ | DECIMAL_NUMBER COLON
+ { urj_bsdl_flex_set_hex (priv_data->scanner); }
+ Data_Expression
+ { urj_bsdl_flex_set_decimal (priv_data->scanner); }
+;
+Data_Expression : HEX_STRING
+ { free ($1); }
+ | Input_Specifier
+ | Variable_Expression
+;
+Variable_Expression : Variable
+ | Variable_Assignment
+ | Variable_Update
+;
+Variable_Assignment : Variable EQUAL
+ { urj_bsdl_flex_set_hex (priv_data->scanner); }
+ HEX_STRING
+ {
+ free ($4);
+ urj_bsdl_flex_set_decimal (priv_data->scanner);
+ }
+ | Variable Input_Specifier
+;
+Variable_Update : Variable Complement_Operator
+ | Variable Binary_Operator DECIMAL_NUMBER
+;
+Input_Specifier : Input_Operator
+ | IO_Operator
+;
+Capture_Field_List : Capture_Field
+ | Capture_Field_List COMMA Capture_Field
+;
+Capture_Field : DECIMAL_NUMBER COLON
+ { urj_bsdl_flex_set_hex (priv_data->scanner); }
+ Capture_Field_Rest
+ { urj_bsdl_flex_set_decimal (priv_data->scanner); }
+;
+Capture_Field_Rest : Capture_Specification
+ | Capture_Specification CRC_Tag
+ | Capture_Specification CRC_Tag OST_Tag
+ | Capture_Specification OST_Tag
+;
+Capture_Specification : Expected_Data
+ | Expected_Data Compare_Mask
+;
+Expected_Data : /* empty */
+ | Output_Operator
+ | Output_Operator Data_Expression
+ | Data_Expression
+;
+Compare_Mask : ASTERISK
+ | ASTERISK Output_Operator
+ | ASTERISK Output_Operator Data_Expression
+ | ASTERISK Data_Expression
+;
+Wait_Specification : WAIT Duration_Specification
+ | WAIT Duration_Specification MIN
+ | WAIT Duration_Specification MIN COLON Duration_Specification MAX
+;
+Duration_Specification : Clock_Cycles
+ | REAL_NUMBER
+ { free ($1); }
+ | Clock_Cycles COMMA REAL_NUMBER
+ { free ($3); }
+;
+Clock_Cycles : Port_Id DECIMAL_NUMBER
+;
+Variable : DOLLAR IDENTIFIER
+ { free ($2); }
+;
+Binary_Operator : PLUS
+ { urj_bsdl_flex_set_decimal (priv_data->scanner); }
+ | MINUS
+ { urj_bsdl_flex_set_decimal (priv_data->scanner); }
+ | SH_RIGHT
+ { urj_bsdl_flex_set_decimal (priv_data->scanner); }
+ | SH_LEFT
+ { urj_bsdl_flex_set_decimal (priv_data->scanner); }
+;
+Complement_Operator : TILDE
+;
+Input_Operator : QUESTION_MARK
+;
+Output_Operator : EXCLAMATION_MARK
+;
+IO_Operator : QUESTION_EXCLAMATION
+;
+CRC_Tag : COLON CRC
+;
+OST_Tag : COLON OST
+;
+/****************************************************************************/
+ISC_Procedure : ISC_PROCEDURE Procedure_List
+;
+Procedure_List : Procedure
+ | Procedure_List COMMA Procedure
+;
+Procedure : IDENTIFIER EQUAL LPAREN Flow_Descriptor_List RPAREN
+ { free ($1); }
+ | IDENTIFIER Data_Name EQUAL LPAREN Flow_Descriptor_List RPAREN
+ { free ($1); }
+ | error
+ {
+ Print_Error (priv_data, _("Error in ISC_Procedure Definition"));
+ BUMP_ERROR;
+ YYABORT;
+ }
+;
+Flow_Descriptor_List : Flow_Descriptor
+ | Flow_Descriptor_List COMMA Flow_Descriptor
+;
+/****************************************************************************/
+ISC_Action : ISC_ACTION Action_List
+;
+Action_List : Action
+ | Action_List COMMA Action
+;
+Action : IDENTIFIER EQUAL LPAREN Action_Specification_List RPAREN
+ { free ($1); }
+ | IDENTIFIER Data_Name EQUAL LPAREN Action_Specification_List RPAREN
+ { free ($1); }
+ | IDENTIFIER PROPRIETARY EQUAL LPAREN Action_Specification_List RPAREN
+ { free ($1); }
+ | IDENTIFIER Data_Name PROPRIETARY EQUAL LPAREN Action_Specification_List RPAREN
+ { free ($1); }
+ | error
+ {
+ Print_Error (priv_data, _("Error in ISC_Action Definition"));
+ BUMP_ERROR;
+ YYABORT;
+ }
+;
+Action_Specification_List : Action_Specification
+ | Action_Specification_List COMMA Action_Specification
+;
+Action_Specification : IDENTIFIER
+ { free ($1); }
+ | IDENTIFIER Data_Name
+ { free ($1); }
+ | IDENTIFIER Data_Name PROPRIETARY
+ { free ($1); }
+ | IDENTIFIER Data_Name Option_Specification
+ { free ($1); }
+ | IDENTIFIER Data_Name PROPRIETARY Option_Specification
+ { free ($1); }
+ | IDENTIFIER PROPRIETARY
+ { free ($1); }
+ | IDENTIFIER PROPRIETARY Option_Specification
+ { free ($1); }
+ | IDENTIFIER Option_Specification
+ { free ($1); }
+;
+Option_Specification : OPTIONAL | RECOMMENDED
+;
+/****************************************************************************/
+ISC_Illegal_Exit : ISC_ILLEGAL_EXIT Exit_Instruction_List
+;
+Exit_Instruction_List : IDENTIFIER
+ { free ($1); }
+ | Exit_Instruction_List COMMA IDENTIFIER
+ { free ($3); }
+;
+
+%% /* End rules, begin programs */
+
+/*----------------------------------------------------------------------*/
+static void
+Print_Error (urj_bsdl_parser_priv_t *priv_data, const char *Errmess)
+{
+ urj_bsdl_err (priv_data->jtag_ctrl->proc_mode,
+ _("Line %d, %s.\n"), priv_data->lineno, Errmess);
+
+ /* set an error if nothing else is pending */
+ if (urj_error_get () == URJ_ERROR_OK)
+ urj_bsdl_err_set (priv_data->jtag_ctrl->proc_mode,
+ URJ_ERROR_BSDL_BSDL,
+ "Parser error, see log for details");
+}
+
+/*----------------------------------------------------------------------*/
+static void
+Print_Warning (urj_bsdl_parser_priv_t *priv_data, const char *Warnmess)
+{
+ urj_bsdl_warn (priv_data->jtag_ctrl->proc_mode,
+ _("Line %d, %s.\n"), priv_data->lineno, Warnmess);
+}
+
+/*----------------------------------------------------------------------*/
+static void
+Give_Up_And_Quit (urj_bsdl_parser_priv_t *priv_data)
+{
+ //Print_Error( priv_data, "Too many errors" );
+ urj_bsdl_flex_stop_buffer (priv_data->scanner);
+}
+
+/*----------------------------------------------------------------------*/
+void
+yyerror (urj_bsdl_parser_priv_t *priv_data, const char *error_string)
+{
+}
+
+
+/*****************************************************************************
+ * void urj_bsdl_sem_init( urj_bsdl_parser_priv_t *priv )
+ *
+ * Initializes storage elements in the private parser and jtag control
+ * structures that are used for semantic purposes.
+ *
+ * Parameters
+ * priv : private data container for parser related tasks
+ *
+ * Returns
+ * void
+ ****************************************************************************/
+static void
+urj_bsdl_sem_init (urj_bsdl_parser_priv_t *priv)
+{
+ urj_bsdl_jtag_ctrl_t *jc = priv->jtag_ctrl;
+
+ jc->instr_len = -1;
+ jc->bsr_len = -1;
+ jc->conformance = URJ_BSDL_CONF_UNKNOWN;
+ jc->idcode = NULL;
+ jc->usercode = NULL;
+
+ jc->instr_list = NULL;
+
+ priv->ainfo.next = NULL;
+ priv->ainfo.reg = NULL;
+ priv->ainfo.instr_list = NULL;
+ jc->ainfo_list = NULL;
+
+ priv->tmp_cell_info.next = NULL;
+ priv->tmp_cell_info.port_name = NULL;
+ priv->tmp_cell_info.basic_safe_value = NULL;
+ jc->cell_info_first = NULL;
+ jc->cell_info_last = NULL;
+
+ priv->tmp_port_desc.names_list = NULL;
+ priv->tmp_port_desc.next = NULL;
+}
+
+
+/*****************************************************************************
+ * void free_instr_list( struct instr_elem *il )
+ *
+ * Deallocates the given list of instr_elem.
+ *
+ * Parameters
+ * il : first instr_elem to deallocate
+ *
+ * Returns
+ * void
+ ****************************************************************************/
+static void
+free_instr_list (urj_bsdl_instr_elem_t *il)
+{
+ if (il)
+ {
+ if (il->instr)
+ free (il->instr);
+ if (il->opcode)
+ free (il->opcode);
+ free_instr_list (il->next);
+ free (il);
+ }
+}
+
+
+/*****************************************************************************
+ * void free_ainfo_list( urj_bsdl_types_ainfo_elem_t *ai, int free_me )
+ *
+ * Deallocates the given list of ainfo_elem.
+ *
+ * Parameters
+ * ai : first ainfo_elem to deallocate
+ * free_me : set to 1 to free memory for ai as well
+ *
+ * Returns
+ * void
+ ****************************************************************************/
+static void
+free_ainfo_list (urj_bsdl_types_ainfo_elem_t *ai, int free_me)
+{
+ if (ai)
+ {
+ if (ai->reg)
+ free (ai->reg);
+
+ free_instr_list (ai->instr_list);
+ free_ainfo_list (ai->next, 1);
+
+ if (free_me)
+ free (ai);
+ }
+}
+
+
+/*****************************************************************************
+ * void free_string_list( urj_bsdl_string_elem_t *sl )
+ *
+ * Deallocates the given list of string_elem items.
+ *
+ * Parameters
+ * sl : first string_elem to deallocate
+ *
+ * Returns
+ * void
+ ****************************************************************************/
+static void
+free_string_list (urj_bsdl_string_elem_t *sl)
+{
+ if (sl)
+ {
+ if (sl->string)
+ free (sl->string);
+ free_string_list (sl->next);
+ free (sl);
+ }
+}
+
+
+/*****************************************************************************
+ * void free_c_list( urj_bsdl_cell_info_t *ci, int free_me )
+ *
+ * Deallocates the given list of cell_info items.
+ *
+ * Parameters
+ * ci : first cell_info item to deallocate
+ * free_me : 1 -> free memory for *ci as well
+ * 0 -> don't free *ci memory
+ *
+ * Returns
+ * void
+ ****************************************************************************/
+static void
+free_ci_list (urj_bsdl_cell_info_t *ci, int free_me)
+{
+ if (ci)
+ {
+ free_ci_list (ci->next, 1);
+
+ if (ci->port_name)
+ free (ci->port_name);
+
+ if (ci->basic_safe_value)
+ free (ci->basic_safe_value);
+
+ if (free_me)
+ free (ci);
+ }
+}
+
+
+/*****************************************************************************
+ * void urj_bsdl_sem_deinit( urj_bsdl_parser_priv_t *priv )
+ *
+ * Frees and deinitializes storage elements in the private parser and
+ * jtag control structures that were filled by semantic rules.
+ *
+ * Parameters
+ * priv : private data container for parser related tasks
+ *
+ * Returns
+ * void
+ ****************************************************************************/
+static void
+urj_bsdl_sem_deinit (urj_bsdl_parser_priv_t *priv)
+{
+ urj_bsdl_jtag_ctrl_t *jc = priv->jtag_ctrl;
+
+ if (jc->idcode)
+ {
+ free (jc->idcode);
+ jc->idcode = NULL;
+ }
+
+ if (jc->usercode)
+ {
+ free (jc->usercode);
+ jc->usercode = NULL;
+ }
+
+ /* free cell_info list */
+ free_ci_list (jc->cell_info_first, 1);
+ jc->cell_info_first = jc->cell_info_last = NULL;
+ free_ci_list (&(priv->tmp_cell_info), 0);
+
+ /* free instr_list */
+ free_instr_list (jc->instr_list);
+ jc->instr_list = NULL;
+
+ /* free ainfo_list */
+ free_ainfo_list (jc->ainfo_list, 1);
+ jc->ainfo_list = NULL;
+ free_ainfo_list (&(priv->ainfo), 0);
+
+ /* free string list in temporary port descritor */
+ free_string_list (priv->tmp_port_desc.names_list);
+ priv->tmp_port_desc.names_list = NULL;
+}
+
+
+/*****************************************************************************
+ * urj_bsdl_parser_priv_t *urj_bsdl_parser_init( urj_bsdl_jtag_ctrl_t *jtag_ctrl )
+ *
+ * Initializes storage elements in the private parser structure that are
+ * used for parser maintenance purposes.
+ * Subsequently calls initializer functions for the scanner and the semantic
+ * parts.
+ *
+ * Parameters
+ * jtag_ctrl : pointer to jtag control structure
+ *
+ * Returns
+ * pointer to private parser structure
+ ****************************************************************************/
+urj_bsdl_parser_priv_t *
+urj_bsdl_parser_init (urj_bsdl_jtag_ctrl_t *jtag_ctrl)
+{
+ urj_bsdl_parser_priv_t *new_priv;
+
+ if (!(new_priv = malloc (sizeof (urj_bsdl_parser_priv_t))))
+ {
+ urj_bsdl_ftl_set (jtag_ctrl->proc_mode, URJ_ERROR_OUT_OF_MEMORY,
+ "No memory");
+ return NULL;
+ }
+
+ new_priv->jtag_ctrl = jtag_ctrl;
+
+ if (!(new_priv->scanner = urj_bsdl_flex_init (jtag_ctrl->proc_mode)))
+ {
+ free (new_priv);
+ new_priv = NULL;
+ }
+
+ urj_bsdl_sem_init (new_priv);
+
+ return new_priv;
+}
+
+
+/*****************************************************************************
+ * void urj_bsdl_parser_deinit( urj_bsdl_parser_priv_t *priv )
+ *
+ * Frees storage elements in the private parser structure that are
+ * used for parser maintenance purposes.
+ * Subsequently calls deinitializer functions for the scanner and the semantic
+ * parts.
+ *
+ * Parameters
+ * priv : private data container for parser related tasks
+ *
+ * Returns
+ * void
+ ****************************************************************************/
+void
+urj_bsdl_parser_deinit (urj_bsdl_parser_priv_t *priv_data)
+{
+ urj_bsdl_sem_deinit (priv_data);
+ urj_bsdl_flex_deinit (priv_data->scanner);
+ free (priv_data);
+}
+
+
+/*****************************************************************************
+ * void add_instruction( urj_bsdl_parser_priv_t *priv, char *instr, char *opcode )
+ *
+ * Converts the instruction specification into a member of the main
+ * list of instructions at priv->jtag_ctrl->instr_list.
+ *
+ * Parameters
+ * priv : private data container for parser related tasks
+ * instr : instruction name
+ * opcode : instruction opcode
+ *
+ * Returns
+ * void
+ ****************************************************************************/
+static void
+add_instruction (urj_bsdl_parser_priv_t *priv, char *instr, char *opcode)
+{
+ urj_bsdl_instr_elem_t *new_instr;
+
+ new_instr = malloc (sizeof (urj_bsdl_instr_elem_t));
+ if (new_instr)
+ {
+ new_instr->next = priv->jtag_ctrl->instr_list;
+ new_instr->instr = instr;
+ new_instr->opcode = opcode;
+
+ priv->jtag_ctrl->instr_list = new_instr;
+ }
+ else
+ urj_bsdl_ftl_set (priv->jtag_ctrl->proc_mode, URJ_ERROR_OUT_OF_MEMORY,
+ "No memory");
+}
+
+
+/*****************************************************************************
+ * void ac_set_register( urj_bsdl_parser_priv_t *priv, char *reg, int reg_len )
+ * Register Access management function
+ *
+ * Stores the register specification values for the current register access
+ * specification in the temporary storage region for later usage.
+ *
+ * Parameters
+ * priv : private data container for parser related tasks
+ * reg : register name
+ * reg_len : optional register length
+ *
+ * Returns
+ * void
+ ****************************************************************************/
+static void
+ac_set_register (urj_bsdl_parser_priv_t *priv, char *reg, int reg_len)
+{
+ urj_bsdl_types_ainfo_elem_t *tmp_ai = &(priv->ainfo);
+
+ tmp_ai->reg = reg;
+ tmp_ai->reg_len = reg_len;
+}
+
+
+/*****************************************************************************
+ * void ac_add_instruction( urj_bsdl_parser_priv_t *priv, char *instr )
+ * Register Access management function
+ *
+ * Appends the specified instruction to the list of instructions for the
+ * current register access specification in the temporary storage region
+ * for later usage.
+ *
+ * Parameters
+ * priv : private data container for parser related tasks
+ * instr : instruction name
+ *
+ * Returns
+ * void
+ ****************************************************************************/
+static void
+ac_add_instruction (urj_bsdl_parser_priv_t *priv, char *instr)
+{
+ urj_bsdl_types_ainfo_elem_t *tmp_ai = &(priv->ainfo);
+ urj_bsdl_instr_elem_t *new_instr;
+
+ new_instr = malloc (sizeof (urj_bsdl_instr_elem_t));
+ if (new_instr)
+ {
+ new_instr->next = tmp_ai->instr_list;
+ new_instr->instr = instr;
+ new_instr->opcode = NULL;
+
+ tmp_ai->instr_list = new_instr;
+ }
+ else
+ urj_bsdl_ftl_set (priv->jtag_ctrl->proc_mode, URJ_ERROR_OUT_OF_MEMORY,
+ "No memory");
+}
+
+
+/*****************************************************************************
+ * void ac_apply_assoc( urj_bsdl_parser_priv_t *priv )
+ * Register Access management function
+ *
+ * Appends the collected register access specification from the temporary
+ * storage region to the main ainfo list.
+ *
+ * Parameters
+ * priv : private data container for parser related tasks
+ *
+ * Returns
+ * void
+ ****************************************************************************/
+static void
+ac_apply_assoc (urj_bsdl_parser_priv_t *priv)
+{
+ urj_bsdl_jtag_ctrl_t *jc = priv->jtag_ctrl;
+ urj_bsdl_types_ainfo_elem_t *tmp_ai = &(priv->ainfo);
+ urj_bsdl_types_ainfo_elem_t *new_ai;
+
+ new_ai = malloc (sizeof (urj_bsdl_types_ainfo_elem_t));
+ if (new_ai)
+ {
+ new_ai->next = jc->ainfo_list;
+ new_ai->reg = tmp_ai->reg;
+ new_ai->reg_len = tmp_ai->reg_len;
+ new_ai->instr_list = tmp_ai->instr_list;
+
+ jc->ainfo_list = new_ai;
+ }
+ else
+ urj_bsdl_ftl_set (jc->proc_mode, URJ_ERROR_OUT_OF_MEMORY,
+ "No memory");
+
+ /* clean up obsolete temporary entries */
+ tmp_ai->reg = NULL;
+ tmp_ai->reg_len = 0;
+ tmp_ai->instr_list = NULL;
+}
+
+
+/*****************************************************************************
+ * void prt_add_name( urj_bsdl_parser_priv_t *priv, char *name )
+ * Port name management function
+ *
+ * Sets the name field of the temporary storage area for port description
+ * (port_desc) to the parameter name.
+ *
+ * Parameters
+ * priv : private data container for parser related tasks
+ * name : base name of the port, memory get's free'd lateron
+ *
+ * Returns
+ * void
+ ****************************************************************************/
+static void
+prt_add_name (urj_bsdl_parser_priv_t *priv, char *name)
+{
+ urj_bsdl_port_desc_t *pd = &(priv->tmp_port_desc);
+ urj_bsdl_string_elem_t *new_string;
+
+ new_string = malloc (sizeof (urj_bsdl_string_elem_t));
+ if (new_string)
+ {
+ new_string->next = pd->names_list;
+ new_string->string = name;
+
+ pd->names_list = new_string;
+ }
+ else
+ urj_bsdl_ftl_set (priv->jtag_ctrl->proc_mode, URJ_ERROR_OUT_OF_MEMORY,
+ "No memory");
+}
+
+
+/*****************************************************************************
+ * void prt_add_bit( urj_bsdl_parser_priv_t *priv )
+ * Port name management function
+ *
+ * Sets the vector and index fields of the temporary storage area for port
+ * description (port_desc) to non-vector information. The low and high indice
+ * are set to equal numbers (exact value is irrelevant).
+ *
+ * Parameters
+ * priv : private data container for parser related tasks
+ *
+ * Returns
+ * void
+ ****************************************************************************/
+static void
+prt_add_bit (urj_bsdl_parser_priv_t *priv)
+{
+ urj_bsdl_port_desc_t *pd = &(priv->tmp_port_desc);
+
+ pd->is_vector = 0;
+ pd->low_idx = 0;
+ pd->high_idx = 0;
+}
+
+
+/*****************************************************************************
+ * void prt_add_range( urj_bsdl_parser_priv_t *priv, int low, int high )
+ * Port name management function
+ *
+ * Sets the vector and index fields of the temporary storage area for port
+ * description (port_desc) to the specified vector information.
+ *
+ * Parameters
+ * priv : private data container for parser related tasks
+ * low : low index of vector
+ * high : high index of vector
+ *
+ * Returns
+ * void
+ ****************************************************************************/
+static void
+prt_add_range (urj_bsdl_parser_priv_t *priv, int low, int high)
+{
+ urj_bsdl_port_desc_t *pd = &(priv->tmp_port_desc);
+
+ pd->is_vector = 1;
+ pd->low_idx = low;
+ pd->high_idx = high;
+}
+
+
+/*****************************************************************************
+ * void ci_no_disable( urj_bsdl_parser_priv_t *priv )
+ * Cell Info management function
+ *
+ * Tracks that there is no disable term for the current cell info.
+ *
+ * Parameters
+ * priv : private data container for parser related tasks
+ *
+ * Returns
+ * void
+ ****************************************************************************/
+static void
+ci_no_disable (urj_bsdl_parser_priv_t *priv)
+{
+ priv->tmp_cell_info.ctrl_bit_num = -1;
+}
+
+
+/*****************************************************************************
+ * void ci_set_cell_spec_disable( urj_bsdl_parser_priv_t *priv, int ctrl_bit_num,
+ * int safe_value, int disable_value )
+ * Cell Info management function
+ *
+ * Applies the disable specification of the current cell spec to the variables
+ * for temporary storage of these information elements.
+ *
+ * Parameters
+ * priv : private data container for parser related tasks
+ * ctrl_bit_num : bit number of related control cell
+ * safe_value : safe value for initialization of this cell
+ * disable_value : currently ignored
+ *
+ * Returns
+ * void
+ ****************************************************************************/
+static void
+ci_set_cell_spec_disable (urj_bsdl_parser_priv_t *priv, int ctrl_bit_num,
+ int safe_value, int disable_value)
+{
+ urj_bsdl_cell_info_t *ci = &(priv->tmp_cell_info);
+
+ ci->ctrl_bit_num = ctrl_bit_num;
+ ci->disable_safe_value = safe_value;
+ /* disable value is ignored at the moment */
+}
+
+
+/*****************************************************************************
+ * void ci_set_cell_spec( urj_bsdl_parser_priv_t *priv,
+ * int function, char *safe_value )
+ * Cell Info management function
+ *
+ * Sets the specified values of the current cell_spec (without disable term)
+ * to the variables for temporary storage of these information elements.
+ * The name of the related port is taken from the port_desc structure that
+ * was filled in previously by the rule Port_Name.
+ *
+ * Parameters
+ * priv : private data container for parser related tasks
+ * function : cell function indentificator
+ * safe_value : safe value for initialization of this cell
+ *
+ * Returns
+ * void
+ ****************************************************************************/
+static void
+ci_set_cell_spec (urj_bsdl_parser_priv_t *priv,
+ int function, char *safe_value)
+{
+ urj_bsdl_cell_info_t *ci = &(priv->tmp_cell_info);
+ urj_bsdl_port_desc_t *pd = &(priv->tmp_port_desc);
+ urj_bsdl_string_elem_t *name = priv->tmp_port_desc.names_list;
+ char *port_string;
+ size_t str_len, name_len;
+
+ ci->cell_function = function;
+ ci->basic_safe_value = safe_value;
+
+ /* handle indexed port name:
+ - names of scalar ports are simply copied from the port_desc structure
+ to the final string that goes into ci
+ - names of vectored ports are expanded with their decimal index as
+ collected earlier earlier in rule Port_Name
+ */
+ name_len = strlen (name->string);
+ str_len = name_len + 1 + 10 + 1 + 1;
+ if ((port_string = malloc (str_len)) != NULL)
+ {
+ if (pd->is_vector)
+ snprintf (port_string, str_len - 1, "%s(%d)", name->string,
+ pd->low_idx);
+ else
+ strncpy (port_string, name->string, str_len - 1);
+ port_string[str_len - 1] = '\0';
+
+ ci->port_name = port_string;
+ }
+ else
+ {
+ urj_bsdl_ftl_set (priv->jtag_ctrl->proc_mode, URJ_ERROR_OUT_OF_MEMORY,
+ "No memory");
+ ci->port_name = NULL;
+ }
+
+ free_string_list (priv->tmp_port_desc.names_list);
+ priv->tmp_port_desc.names_list = NULL;
+}
+
+
+/*****************************************************************************
+ * void ci_append_cell_info( urj_bsdl_parser_priv_t *priv, int bit_num )
+ * Cell Info management function
+ *
+ * Appends the temporary cell info to the global list of cell infos.
+ *
+ * Parameters
+ * priv : private data container for parser related tasks
+ * bit_num : bit number of current cell
+ *
+ * Returns
+ * void
+ ****************************************************************************/
+static void
+ci_append_cell_info (urj_bsdl_parser_priv_t *priv, int bit_num)
+{
+ urj_bsdl_cell_info_t *tmp_ci = &(priv->tmp_cell_info);
+ urj_bsdl_cell_info_t *ci;
+ urj_bsdl_jtag_ctrl_t *jc = priv->jtag_ctrl;
+
+ ci = malloc (sizeof (urj_bsdl_cell_info_t));
+ if (ci)
+ {
+ ci->next = NULL;
+ if (jc->cell_info_last)
+ jc->cell_info_last->next = ci;
+ else
+ jc->cell_info_first = ci;
+ jc->cell_info_last = ci;
+
+ ci->bit_num = bit_num;
+ ci->port_name = tmp_ci->port_name;
+ ci->cell_function = tmp_ci->cell_function;
+ ci->basic_safe_value = tmp_ci->basic_safe_value;
+ ci->ctrl_bit_num = tmp_ci->ctrl_bit_num;
+ ci->disable_safe_value = tmp_ci->disable_safe_value;
+
+ tmp_ci->port_name = NULL;
+ tmp_ci->basic_safe_value = NULL;
+ }
+ else
+ urj_bsdl_ftl_set (jc->proc_mode, URJ_ERROR_OUT_OF_MEMORY,
+ "No memory");
+}
+
+
+/*
+ Local Variables:
+ mode:C
+ c-default-style:java
+ indent-tabs-mode:nil
+ End:
+*/
--- /dev/null
+/*
+ * $Id$
+ *
+ * Original Lex source by Ken Parker, 1990
+ * Extensions and adaptions for UrJTAG by Arnim Laeuger, 2007
+ *
+ */
+
+/*----------------------------------------------------------
+ *
+ * Lex source for BSDL
+ *
+ *----------------------------------------------------------*/
+/* Date: 901003 */
+
+/*
+
+Email header accompanying the original Yacc code:
+ http://www.eda.org/vug_bbs/bsdl.parser
+
+-----------------------------------8<--------------------------------------
+
+Hello All,
+
+This is this first mailing of the BSDL* Version 0.0 parser specifications
+we are sending to people who request it from our publicized E-Mail address;
+
+ bsdl%hpmtlx@hplabs.HP.com
+
+You are free to redistribute this at will, but we feel that it would be
+better if respondents asked for it directly so that their addresses can
+be entered into our list for future mailings and updates.
+
+It would be helpful if you could confirm receipt of this transmission.
+We also would be very interested to hear about your experiences with this
+information and what you are planning to do with BSDL.
+
+Regards,
+
+Ken Parker
+Hewlett-Packard Company
+
+
+*Boundary-Scan Description Language - as documented in:
+
+"A Language for Describing Boundary-Scan Devices", K.P. Parker
+and S. Oresjo, Proceedings 1990 International Test Conference,
+Washington DC, pp 222-234
+
+
+- -----------------cut here---------------------------------------------------
+
+
+901004.0721 Hewlett-Packard Company
+901016.1049 Manufacturing Test Division
+ P.O. Box 301
+ Loveland, Colorado 80537
+ USA
+
+ October 1990
+Hello BSDL Parser Requestor,
+
+ This Electronic Mail reply contains the computer specifications for
+Hewlett-Packard's Version 0.0 BSDL parser. This section of the reply
+explains the contents of the rest of this file.
+
+This file is composed of seven (7) parts:
+
+ 1) How to use this file
+
+ 2) UNIX* Lex source (lexicographical tokenizing rules)
+
+ 3) UNIX* Yacc source (BNF-like syntax description)
+
+ 4) A sample main program to recognize BSDL.
+
+ 5) A BSDL description of the Texas Instruments 74bct8374 that is
+ recognized by the parser, for testing purposes.
+
+ 6) The VHDL package STD_1149_1_1990 needed by this parser.
+
+ 7) [added 901016] Porting experiences to other systems.
+
+
+RECOMMENDATION: Save a copy of this file in archival storage before
+ processing it via the instructions below. This will
+ allow you to recover from errors, and allow you to
+ compare subsequently released data for changes.
+
+DISCLAIMERS:
+
+1. The IEEE 1149.1 Working Group has not endorsed BSDL Version 0.0 and
+ therefore no person may represent it as an IEEE standard or imply that
+ a resulting IEEE standard will be identical to it.
+
+2. The IEEE 1149.1 Working Group recognizes that BSDL Version 0.0 is a
+ well-conceived initiative that is likely to excelerate the creation
+ of tools that support the 1149.1 standard. As such, changes and
+ enhancements will be carefully considered so as not to needlessly
+ disrupt these development efforts. The overriding goal is the
+ ultimate success of the 1149.1 standard.
+
+LEGAL NOTICES:
+
+ Hewlett-Packard Company makes no warranty of any kind with regard to
+ this information, including, but not limited to, the implied
+ waranties of merchantability and fitness for a particular purpose.
+
+ Hewlett-Packard Company shall not be liable for errors contained
+ herein or direct, indirect, special, incidental, or consequential
+ damages in connection with the furnishing, performance, or use of
+ this material.
+
+
+*UNIX is a trademark of AT&T in the USA and other countries.
+
+*/
+
+%option bison-bridge
+%option reentrant
+%option prefix="urj_bsdl_"
+%option outfile="lex.yy.c"
+
+%{
+/* Begin lex input specifications */
+
+#include <stdlib.h>
+#include <ctype.h>
+
+#include "bsdl_sysdep.h"
+
+#include "bsdl_msg.h"
+
+#include "bsdl_bison.h"
+#include "bsdl_parser.h"
+
+#ifdef DMALLOC
+#include "dmalloc.h"
+#endif
+
+#define YY_EXTRA_TYPE urj_bsdl_scan_extra_t *
+
+static char *new_string (urj_bsdl_scan_extra_t *, const char *);
+
+#define BINARY 0
+#define DECIMAL 1
+#define BIN_X 2
+#define HEX 3
+
+%}
+%a 2800
+%e 1200
+%p 4700
+%n 520
+%k 140
+%o 3000
+%START RES BOU REG PAC ISC
+White [ \t\b\r]*
+VHDL_Comment \-\-[^\n]*
+Binary_Pattern [0-1]+
+Bin_X_Pattern [0-1X]+
+Hex_String [0-9A-F]+
+Digit [0-9]
+Exponent [E][+-]?{Digit}+
+Real_Number {Digit}+[\.]{Digit}+{Exponent}
+Decimal_Number {Digit}+
+Identifier [A-Z][A-Z0-9_]*
+Eol [\n]
+Comma [,]
+Lparen [\(]
+Rparen [\)]
+Lbracket [\[]
+Rbracket [\]]
+Colon [\:]
+Asterisk [\*]
+Dollar [\$]
+Equal [\=]
+Plus [\+]
+Minus [\-]
+Sh_Right [\>][\>]
+Sh_Left [\<][\<]
+Tilde [\~]
+Question_Exclamation [\?][\!]
+Question [\?]
+Exclamation [\!]
+Illegal [^A-Z0-9 \t\b\n\r\"\&\'\*\(\)\[\]\_\:\.\,\;\$\=\+\-\>\<\~\?\!]
+Constant CONSTANT
+Physical_Pin_Map PHYSICAL_PIN_MAP
+Pin_Map PIN_MAP
+Pin_Map_String PIN_MAP_STRING
+Tap_Scan_In TAP_SCAN_IN
+Tap_Scan_Out TAP_SCAN_OUT
+Tap_Scan_Clock TAP_SCAN_CLOCK
+Tap_Scan_Mode TAP_SCAN_MODE
+Tap_Scan_Reset TAP_SCAN_RESET
+Instruction_Length INSTRUCTION_LENGTH
+Instruction_Opcode INSTRUCTION_OPCODE
+Instruction_Capture INSTRUCTION_CAPTURE
+Instruction_Disable INSTRUCTION_DISABLE
+Instruction_Guard INSTRUCTION_GUARD
+Instruction_Private INSTRUCTION_PRIVATE
+Register_Access REGISTER_ACCESS
+Boundary_Length BOUNDARY_LENGTH
+Boundary_Register BOUNDARY_REGISTER
+Idcode_Register IDCODE_REGISTER
+Usercode_Register USERCODE_REGISTER
+Boundary BOUNDARY
+Bypass BYPASS
+Clamp CLAMP
+Extest EXTEST
+Highz HIGHZ
+Idcode IDCODE
+Intest INTEST
+Preload PRELOAD
+Runbist RUNBIST
+Sample SAMPLE
+Usercode USERCODE
+Device_Id DEVICE_ID
+Input INPUT
+Output2 OUTPUT2
+Output3 OUTPUT3
+Control CONTROL
+Controlr CONTROLR
+Internal INTERNAL
+Clock CLOCK
+Observe_Only OBSERVE_ONLY
+Bidir BIDIR
+Bidir_In BIDIR_IN
+Bidir_Out BIDIR_OUT
+Z Z
+Weak0 WEAK0
+Weak1 WEAK1
+Pull0 PULL0
+Pull1 PULL1
+Keeper KEEPER
+Compliance_Patterns COMPLIANCE_PATTERNS
+Component_Conformance COMPONENT_CONFORMANCE
+Std_1149_1_1990 STD_1149_1_1990
+Std_1149_1_1993 STD_1149_1_1993
+Std_1149_1_2001 STD_1149_1_2001
+ISC_Conformance ISC_CONFORMANCE
+Std_1532_2001 STD_1532_2001
+Std_1532_2002 STD_1532_2002
+ISC_Pin_Behavior ISC_PIN_BEHAVIOR
+ISC_Fixed_System_Pins ISC_FIXED_SYSTEM_PINS
+ISC_Status ISC_STATUS
+Implemented IMPLEMENTED
+ISC_Blank_Usercode ISC_BLANK_USERCODE
+ISC_Security ISC_SECURITY
+ISC_Disable_Read ISC_DISABLE_READ
+ISC_Disable_Program ISC_DISABLE_PROGRAM
+ISC_Disable_Erase ISC_DISABLE_ERASE
+ISC_Disable_Key ISC_DISABLE_KEY
+ISC_Flow ISC_FLOW
+Unprocessed UNPROCESSED
+Exit_On_Error EXIT_ON_ERROR
+Array ARRAY
+Security SECURITY
+Initialize INITIALIZE
+Repeat REPEAT
+Terminate TERMINATE
+Loop LOOP
+Wait WAIT
+Min MIN
+Max MAX
+Crc CRC
+Ost OST
+ISC_Procedure ISC_PROCEDURE
+ISC_Action ISC_ACTION
+Proprierary PROPRIETARY
+Optional OPTIONAL
+Recommended RECOMMENDED
+ISC_Illegal_Exit ISC_ILLEGAL_EXIT
+%%
+{Constant} {yyextra->Base = DECIMAL; return( CONSTANT ); }
+{Pin_Map} {return( PIN_MAP ); }
+{Physical_Pin_Map} {return( PHYSICAL_PIN_MAP ); }
+{Pin_Map_String} {return( PIN_MAP_STRING ); }
+{Tap_Scan_In} {return( TAP_SCAN_IN ); }
+{Tap_Scan_Out} {return( TAP_SCAN_OUT ); }
+{Tap_Scan_Clock} {return( TAP_SCAN_CLOCK ); }
+{Tap_Scan_Mode} {return( TAP_SCAN_MODE ); }
+{Tap_Scan_Reset} {return( TAP_SCAN_RESET ); }
+{Instruction_Length} {yyextra->Base = DECIMAL; return( INSTRUCTION_LENGTH ); }
+{Instruction_Opcode} {yyextra->Base = BINARY; /* Enable Binary Patterns */
+ return( INSTRUCTION_OPCODE ); }
+{Instruction_Capture} {yyextra->Base = BIN_X; /* Enable Bin_X Patterns */
+ return( INSTRUCTION_CAPTURE ); }
+{Instruction_Disable} {return( INSTRUCTION_DISABLE ); }
+{Instruction_Guard} {return( INSTRUCTION_GUARD ); }
+{Instruction_Private} {return( INSTRUCTION_PRIVATE ); }
+{Register_Access} {BEGIN(REG); yyextra->Base = DECIMAL;
+ return( REGISTER_ACCESS ); }
+{Boundary_Length} {yyextra->Base = DECIMAL; return( BOUNDARY_LENGTH ); }
+{Boundary_Register} {BEGIN(BOU); yyextra->Base = DECIMAL;
+ return( BOUNDARY_REGISTER ); }
+{Idcode_Register} {yyextra->Base = BIN_X; return( IDCODE_REGISTER ); }
+{Usercode_Register} {yyextra->Base = BIN_X; return( USERCODE_REGISTER ); }
+{Compliance_Patterns} {yyextra->Base = DECIMAL; return( COMPLIANCE_PATTERNS ); }
+{Component_Conformance} {return( COMPONENT_CONFORMANCE ); }
+{Std_1149_1_1990} {return( STD_1149_1_1990 ); }
+{Std_1149_1_1993} {return( STD_1149_1_1993 ); }
+{Std_1149_1_2001} {return( STD_1149_1_2001 ); }
+{ISC_Conformance} {yyextra->Base = DECIMAL; return( ISC_CONFORMANCE ); }
+{Std_1532_2001} {return( STD_1532_2001 ); }
+{Std_1532_2002} {return( STD_1532_2002 ); }
+{ISC_Pin_Behavior} {BEGIN(ISC); yyextra->Base = DECIMAL; return( ISC_PIN_BEHAVIOR ); }
+{ISC_Fixed_System_Pins} {yyextra->Base = DECIMAL; return( ISC_FIXED_SYSTEM_PINS ); }
+{ISC_Status} {yyextra->Base = DECIMAL; return( ISC_STATUS ); }
+<ISC>{Implemented} {return( IMPLEMENTED ); }
+{ISC_Blank_Usercode} {yyextra->Base = BIN_X; return( ISC_BLANK_USERCODE ); }
+{ISC_Security} {yyextra->Base = DECIMAL; return( ISC_SECURITY ); }
+{ISC_Disable_Read} {yyextra->Base = DECIMAL; return( ISC_DISABLE_READ ); }
+{ISC_Disable_Program} {yyextra->Base = DECIMAL; return( ISC_DISABLE_PROGRAM ); }
+{ISC_Disable_Erase} {yyextra->Base = DECIMAL; return( ISC_DISABLE_ERASE ); }
+{ISC_Disable_Key} {yyextra->Base = DECIMAL; return( ISC_DISABLE_KEY ); }
+{ISC_Flow} {yyextra->Base = DECIMAL; return( ISC_FLOW ); }
+<ISC>{Unprocessed} {return( UNPROCESSED ); }
+<ISC>{Exit_On_Error} {return( EXIT_ON_ERROR ); }
+<ISC>{Array} {return( ARRAY ); }
+<ISC>{Security} {return( SECURITY ); }
+<ISC>{Preload} {return( PRELOAD ); }
+<ISC>{Initialize} {return( INITIALIZE ); }
+<ISC>{Repeat} {yyextra->Base = DECIMAL; return( REPEAT ); }
+<ISC>{Terminate} {return( TERMINATE ); }
+<ISC>{Loop} {return( LOOP ); }
+<ISC>{Wait} {return( WAIT ); }
+<ISC>{Min} {return( MIN ); }
+<ISC>{Max} {return( MAX ); }
+<ISC>{Crc} {return( CRC ); }
+<ISC>{Ost} {return( OST ); }
+<ISC>{Dollar} {return( DOLLAR ); }
+<ISC>{Equal} {return( EQUAL ); }
+<ISC>{Plus} {return( PLUS ); }
+<ISC>{Minus} {return( MINUS ); }
+<ISC>{Sh_Right} {return( SH_RIGHT ); }
+<ISC>{Sh_Left} {return( SH_LEFT ); }
+<ISC>{Tilde} {return( TILDE ); }
+<ISC>{Question_Exclamation} {return( QUESTION_EXCLAMATION ); }
+<ISC>{Question} {return( QUESTION_MARK ); }
+<ISC>{Exclamation} {return( EXCLAMATION_MARK ); }
+{ISC_Procedure} {yyextra->Base = DECIMAL; return( ISC_PROCEDURE ); }
+{ISC_Action} {yyextra->Base = DECIMAL; return( ISC_ACTION ); }
+<ISC>{Proprierary} {return( PROPRIETARY ); }
+<ISC>{Optional} {return( OPTIONAL ); }
+<ISC>{Recommended} {return( RECOMMENDED ); }
+{ISC_Illegal_Exit} {return( ISC_ILLEGAL_EXIT ); }
+<REG,ISC>{Bypass} {return( BYPASS ); }
+<REG,ISC>{Boundary} {return( BOUNDARY ); }
+<REG,ISC>{Clamp} {return( CLAMP ); }
+<REG,ISC>{Extest} {return( EXTEST ); }
+<REG,ISC>{Highz} {return( HIGHZ ); }
+<REG,ISC>{Idcode} {return( IDCODE ); }
+<REG,ISC>{Intest} {return( INTEST ); }
+<REG,ISC>{Preload} {return( PRELOAD ); }
+<REG,ISC>{Runbist} {return( RUNBIST ); }
+<REG,ISC>{Sample} {return( SAMPLE ); }
+<REG,ISC>{Usercode} {return( USERCODE ); }
+<REG,ISC>{Device_Id} {return( DEVICE_ID ); }
+<BOU,PAC>{Input} {return( INPUT ); }
+<BOU,PAC>{Output2} {return( OUTPUT2 ); }
+<BOU,PAC>{Output3} {return( OUTPUT3 ); }
+<BOU,PAC>{Controlr} {return( CONTROLR ); }
+<BOU,PAC>{Control} {return( CONTROL ); }
+<BOU,PAC>{Internal} {return( INTERNAL ); }
+<BOU,PAC>{Clock} {return( CLOCK ); }
+<BOU,PAC>{Observe_Only} {return( OBSERVE_ONLY ); }
+<BOU>{Bidir} {return( BIDIR ); }
+<PAC>{Bidir_In} {return( BIDIR_IN ); }
+<PAC>{Bidir_Out} {return( BIDIR_OUT ); }
+<BOU>{Z} {return( Z ); }
+<BOU>{Weak0} {return( WEAK0 ); }
+<BOU>{Weak1} {return( WEAK1 ); }
+<BOU>{Pull0} {return( PULL0 ); }
+<BOU>{Pull1} {return( PULL1 ); }
+<BOU>{Keeper} {return( KEEPER ); }
+{Eol} {yylineno++; /* Count lines */}
+{Comma} {return( COMMA ); }
+{Lparen} {return( LPAREN );}
+{Rparen} {return( RPAREN );}
+{Lbracket} {return( LBRACKET ); }
+{Rbracket} {return( RBRACKET ); }
+{Colon} {return( COLON ); }
+{Asterisk} {return( ASTERISK ); }
+{White} { /* Do Nothing on White Space */ }
+{VHDL_Comment} { /* Do Nothing on Comments */ }
+{Bin_X_Pattern} {if (yyextra->Base != BIN_X) REJECT;
+ yylval->str = new_string( yyextra, yytext );
+ return( BIN_X_PATTERN );}
+{Hex_String} {if (yyextra->Base != HEX) REJECT;
+ yylval->str = new_string( yyextra, yytext );
+ return( HEX_STRING );}
+{Identifier} {yylval->str = new_string( yyextra, yytext );
+ return( IDENTIFIER ); }
+{Binary_Pattern} {if (yyextra->Base != BINARY) REJECT;
+ yylval->str = new_string( yyextra, yytext );
+ return( BINARY_PATTERN );}
+{Decimal_Number} {if (yyextra->Base != DECIMAL) REJECT;
+ yylval->integer = atoi( (char *)yytext );
+ return( DECIMAL_NUMBER );}
+{Real_Number} {yylval->str = new_string( yyextra, yytext );
+ return( REAL_NUMBER );}
+{Illegal} {urj_bsdl_err_set( yyextra->proc_mode, URJ_ERROR_BSDL_BSDL,
+ "Illegal character %c (/%03o) at line %d:",
+ (char)yytext[yyleng-1], (int)yytext[yyleng-1],
+ yylineno );
+ yyextra->Compile_Errors++;
+ return( ILLEGAL ); /* Will cause syntax error */}
+<<EOF>> {
+ yypop_buffer_state( yyscanner );
+ if ( !YY_CURRENT_BUFFER )
+ yyterminate();
+}
+
+%%
+
+/*****************************************************************************
+ * void *urj_bsdl_flex_init( int proc_mode )
+ *
+ * Initializes the scanner and storage elements extra data structure.
+ *
+ * Parameters
+ * proc_mode : processing mode, consisting of BSDL_MODE_* bits
+ *
+ * Returns
+ * pointer to newly initialized scanner structure
+ ****************************************************************************/
+void *
+urj_bsdl_flex_init (int proc_mode)
+{
+ urj_bsdl_scan_extra_t *extra;
+ yyscan_t scanner;
+
+ /* get our scanner structure */
+ if (yylex_init (&scanner) != 0)
+ {
+ urj_bsdl_ftl_set (proc_mode, URJ_ERROR_BSDL_BSDL,
+ "Scanner could not be initialized");
+ return NULL;
+ }
+
+ if (!(extra = malloc (sizeof (urj_bsdl_scan_extra_t))))
+ {
+ urj_bsdl_ftl_set (proc_mode, URJ_ERROR_OUT_OF_MEMORY,
+ "No memory");
+ yylex_destroy (scanner);
+ return NULL;
+ }
+
+ extra->proc_mode = proc_mode;
+ extra->Compile_Errors = 0;
+ extra->Base = DECIMAL;
+
+ yyset_extra (extra, scanner);
+
+ return scanner;
+}
+
+
+/*****************************************************************************
+ * void urj_bsdl_flex_deinit( void *scanner )
+ *
+ * Deinitializes the scanner and closes the input file.
+ *
+ * Parameters
+ * scanner : pointer to scanner definition structure
+ *
+ * Returns
+ * void
+ ****************************************************************************/
+void
+urj_bsdl_flex_deinit (void *scanner)
+{
+ if (yyget_in (scanner))
+ {
+ /* file might still be open so close it in any case
+ e.g. when a compile error occured and the parser didn't hit EOF/yywrap() */
+ fclose (yyget_in (scanner));
+ yyset_in (NULL, scanner);
+ }
+ free (yyget_extra (scanner));
+ yylex_destroy (scanner);
+}
+
+
+/*****************************************************************************
+ * void yywrap( yyscan_t scanner )
+ *
+ * Closes the input file upon EOF condition.
+ *
+ * Parameters
+ * scanner : pointer to scanner definition structure
+ *
+ * Returns
+ * 1
+ ****************************************************************************/
+int
+yywrap (yyscan_t scanner)
+{
+ if (yyget_in (scanner))
+ {
+ fclose (yyget_in (scanner));
+ yyset_in (NULL, scanner);
+ }
+ return 1;
+}
+
+
+/*****************************************************************************
+ * char *new_string( urj_bsdl_scan_extra_t *extra, const char *str )
+ *
+ * Allocates memory for a string and copies the contents of *str.
+ *
+ * Parameters
+ * extra : pointer to extra data structure
+ * str : pointer to string to be duplicated
+ *
+ * Returns
+ * pointer to allocated and initialized string memory
+ ****************************************************************************/
+static char *
+new_string (urj_bsdl_scan_extra_t *extra, const char *str)
+{
+ char *n_str;
+ size_t n_str_size;
+
+ n_str_size = strlen (str) + 1;
+ if ((n_str = malloc (n_str_size)))
+ {
+ strncpy (n_str, str, n_str_size - 1);
+ n_str[n_str_size - 1] = '\0'; /* set very last element to EOS */
+ }
+ else
+ urj_bsdl_ftl_set (extra->proc_mode, URJ_ERROR_OUT_OF_MEMORY,
+ "No memory");
+
+ return (n_str);
+}
+
+
+/*****************************************************************************
+ * void urj_bsdl_flex_switch_buffer( yyscan_t scanner, const char *buffer, int lineno )
+ *
+ * Selects the specified string buffer for further scanning.
+ *
+ * Parameters
+ * scanner : pointer to scanner definition structure
+ * buffer : pointer to string buffer to be scanned
+ * lineno : initial line number offset
+ *
+ * Returns
+ * void
+ ****************************************************************************/
+void
+urj_bsdl_flex_switch_buffer (yyscan_t scanner, const char *buffer, int lineno)
+{
+ /* ugly, ulgy, ugly
+ prepare yyg for later use of YY_CURRENT_BUFFER */
+ struct yyguts_t *yyg = (struct yyguts_t *) scanner;
+
+ /* yy_scan_string() switches to the string buffer internally,
+ so we must save the current buffer state explicitly by pushing the stack
+ and setting top of stack to the current buffer state again.
+ yy_scan_string() can then savely switch YY_CURRENT_BUFFER to the string buffer.
+ yypop_buffer_state() will delete the string buffer afterwards and pop the saved
+ current buffer state. */
+ yypush_buffer_state (YY_CURRENT_BUFFER, scanner);
+ yy_scan_string (buffer, scanner);
+ yyset_lineno (lineno, scanner);
+}
+
+
+/*****************************************************************************
+ * void urj_bsdl_flex_stop_buffer( yyscan_t scanner )
+ *
+ * Removes the current buffer from the scanner stack.
+ *
+ * Parameters
+ * scanner : pointer to scanner definition structure
+ *
+ * Returns
+ * void
+ ****************************************************************************/
+void
+urj_bsdl_flex_stop_buffer (yyscan_t scanner)
+{
+ yypop_buffer_state (scanner);
+// if ( !YY_CURRENT_BUFFER )
+// yyterminate();
+}
+
+
+/*****************************************************************************
+ * int urj_bsdl_flex_get_compile_errors( yyscan_t scanner )
+ *
+ * Retrieves the accumulated number of compile errors encountered so far.
+ *
+ * Parameters
+ * scanner : pointer to scanner definition structure
+ *
+ * Returns
+ * number of compile errors
+ ****************************************************************************/
+int
+urj_bsdl_flex_get_compile_errors (yyscan_t scanner)
+{
+ urj_bsdl_scan_extra_t *extra = yyget_extra (scanner);
+ return extra->Compile_Errors;
+}
+
+
+/*****************************************************************************
+ * void urj_bsdl_flex_set_compile_errors( int n, yyscan_t scanner )
+ *
+ * Sets the number of compile errors to n.
+ *
+ * Parameters
+ * n : preset number
+ * scanner : pointer to scanner definition structure
+ *
+ * Returns
+ * void
+ ****************************************************************************/
+static void
+urj_bsdl_flex_set_compile_errors (int n, yyscan_t scanner)
+{
+ urj_bsdl_scan_extra_t *extra = yyget_extra (scanner);
+ extra->Compile_Errors = n;
+}
+
+
+/*****************************************************************************
+ * int urj_bsdl_flex_postinc_compile_errors( yyscan_t scanner )
+ *
+ * Increments the number of compile errors.
+ *
+ * Parameters
+ * scanner : pointer to scanner definition structure
+ *
+ * Returns
+ * number of compile errors before increment
+ ****************************************************************************/
+int
+urj_bsdl_flex_postinc_compile_errors (yyscan_t scanner)
+{
+ int errors = urj_bsdl_flex_get_compile_errors (scanner);
+
+ urj_bsdl_flex_set_compile_errors (errors + 1, scanner);
+ return errors;
+}
+
+
+/*****************************************************************************
+ * void urj_bsdl_flex_set_bin_x( yyscan_t scanner )
+ *
+ * Selects BIN_X mode for pattern matching.
+ *
+ * Parameters
+ * scanner : pointer to scanner definition structure
+ *
+ * Returns
+ * void
+ ****************************************************************************/
+void
+urj_bsdl_flex_set_bin_x (yyscan_t scanner)
+{
+ urj_bsdl_scan_extra_t *extra = yyget_extra (scanner);
+ extra->Base = BIN_X;
+}
+
+
+/*****************************************************************************
+ * void urj_bsdl_flex_set_hex( yyscan_t scanner )
+ *
+ * Selects HEX mode for pattern matching.
+ *
+ * Parameters
+ * scanner : pointer to scanner definition structure
+ *
+ * Returns
+ * void
+ ****************************************************************************/
+void
+urj_bsdl_flex_set_hex (yyscan_t scanner)
+{
+ urj_bsdl_scan_extra_t *extra = yyget_extra (scanner);
+ extra->Base = HEX;
+}
+
+
+/*****************************************************************************
+ * void urj_bsdl_flex_set_decimal( yyscan_t scanner )
+ *
+ * Selects DECIMAL mode for pattern matching.
+ *
+ * Parameters
+ * scanner : pointer to scanner definition structure
+ *
+ * Returns
+ * void
+ ****************************************************************************/
+void
+urj_bsdl_flex_set_decimal (yyscan_t scanner)
+{
+ urj_bsdl_scan_extra_t *extra = yyget_extra (scanner);
+ extra->Base = DECIMAL;
+}
+
+
+/*
+ Local Variables:
+ mode:C
+ c-default-style:java
+ indent-tabs-mode:nil
+ End:
+*/
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2008, Arnim Laeuger
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Arnim Laeuger <arniml@users.sourceforge.net>, 2007.
+ *
+ */
+
+#ifndef URJ_BSDL_MSG_H
+#define URJ_BSDL_MSG_H
+
+#include <urjtag/log.h>
+#include <urjtag/error.h>
+
+#include <urjtag/bsdl_mode.h>
+
+#include "bsdl_types.h"
+
+#define urj_bsdl_msg(proc_mode, ...) \
+ do { \
+ if (proc_mode & URJ_BSDL_MODE_MSG_NOTE) { \
+ urj_log (URJ_LOG_LEVEL_NORMAL, "-N- "); \
+ urj_log (URJ_LOG_LEVEL_NORMAL, __VA_ARGS__);} \
+ } while (0)
+
+#define urj_bsdl_warn(proc_mode, ...) \
+ do { \
+ if (proc_mode & URJ_BSDL_MODE_MSG_WARN) { \
+ urj_log (URJ_LOG_LEVEL_WARNING, "-W- "); \
+ urj_log (URJ_LOG_LEVEL_WARNING, __VA_ARGS__);} \
+ } while (0)
+
+#define urj_bsdl_err(proc_mode, ...) \
+ do { \
+ if (proc_mode & URJ_BSDL_MODE_MSG_ERR) { \
+ urj_log (URJ_LOG_LEVEL_ERROR, "-E- "); \
+ urj_log (URJ_LOG_LEVEL_ERROR, __VA_ARGS__);} \
+ } while (0)
+
+#define urj_bsdl_err_set(proc_mode, err, ...) \
+ do { \
+ if (proc_mode & URJ_BSDL_MODE_MSG_ERR) \
+ urj_error_set (err, __VA_ARGS__); \
+ } while (0)
+
+#define urj_bsdl_ftl_set(proc_mode, err, ...) \
+ do { \
+ if (proc_mode & URJ_BSDL_MODE_MSG_FATAL) \
+ urj_error_set (err, __VA_ARGS__); \
+ } while (0)
+
+#endif /* URJ_BSDL_MSG_H */
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2008, Arnim Laeuger
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Arnim Laeuger <arniml@users.sourceforge.net>, 2008.
+ *
+ */
+
+#ifndef URJ_BSDL_PARSER_H
+#define URJ_BSDL_PARSER_H
+
+#include "bsdl_types.h"
+
+/* VHDL lexer declarations */
+void *urj_bsdl_flex_init (int);
+void urj_bsdl_flex_deinit (void *);
+void urj_bsdl_flex_set_bin_x (void *);
+void urj_bsdl_flex_set_hex (void *);
+void urj_bsdl_flex_set_decimal (void *);
+int urj_bsdl_flex_get_compile_errors (void *);
+int urj_bsdl_flex_postinc_compile_errors (void *);
+void urj_bsdl_flex_switch_buffer (void *, const char *, int);
+void urj_bsdl_flex_stop_buffer (void *);
+
+/* BSDL parser declarations */
+urj_bsdl_parser_priv_t *urj_bsdl_parser_init (urj_bsdl_jtag_ctrl_t *);
+void urj_bsdl_parser_deinit (urj_bsdl_parser_priv_t *);
+int urj_bsdl_parse (urj_bsdl_parser_priv_t *);
+
+/* BSDL semantic functions */
+int urj_bsdl_process_elements (urj_bsdl_jtag_ctrl_t *, const char *);
+
+#endif /* URJ_BSDL_PARSER_H */
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2008, Arnim Laeuger
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Arnim Laeuger <arniml@users.sourceforge.net>, 2007.
+ *
+ * This file contains semantic actions that are called by the bison
+ * parser. They interface between the parser and the jtag application.
+ *
+ */
+
+#include <stdlib.h>
+#include <stdio.h>
+#include <string.h>
+
+#include <urjtag/cmd.h>
+#include <urjtag/part.h>
+#include <urjtag/bsbit.h>
+#include <urjtag/data_register.h>
+#include <urjtag/bssignal.h>
+#include <urjtag/log.h>
+
+#include "bsdl_sysdep.h"
+
+#include "bsdl_types.h"
+#include "bsdl_msg.h"
+
+#include "bsdl_parser.h"
+#include "bsdl_bison.h"
+
+#ifdef DMALLOC
+#include "dmalloc.h"
+#endif
+
+
+/*****************************************************************************
+ * int urj_bsdl_set_instruction_length( urj_bsdl_jtag_ctrl_t *jc )
+ *
+ * Sets the specified length of the instruction register via shell command
+ * instruction length <len>
+ *
+ * Parameters
+ * jc : jtag control structure
+ *
+ * Returns
+ * URJ_STATUS_OK, URJ_STATUS_FAIL
+ ****************************************************************************/
+static int
+urj_bsdl_set_instruction_length (urj_bsdl_jtag_ctrl_t *jc)
+{
+ if (jc->proc_mode & URJ_BSDL_MODE_INSTR_EXEC)
+ (void) urj_part_instruction_length_set (jc->part, jc->instr_len);
+ if (jc->proc_mode & URJ_BSDL_MODE_INSTR_PRINT)
+ urj_log (URJ_LOG_LEVEL_NORMAL, "instruction length %i\n", jc->instr_len);
+
+ return URJ_STATUS_OK;
+}
+
+
+/*****************************************************************************
+ * int urj_bsdl_emit_ports( urj_bsdl_jtag_ctrl_t *jc )
+ *
+ * Adds the specified port name as a signal via shell command
+ * signal <pin>
+ * The port name is taken from the port_desc structure that was filled in
+ * previously by rule Scalar_or_Vector. This way, the function can build
+ * vectored ports as well.
+ * Keep in mind that multiple names can be defined by one port specification
+ * (there's a names_list in port_desc).
+ *
+ * Parameters
+ * jc : jtag control structure
+ *
+ * Returns
+ * URJ_STATUS_OK, URJ_STATUS_FAIL
+ ****************************************************************************/
+static int
+urj_bsdl_emit_ports (urj_bsdl_jtag_ctrl_t *jc)
+{
+ urj_bsdl_port_desc_t *pd = jc->port_desc;
+ struct string_elem *name;
+ size_t str_len, name_len;
+ char *port_string;
+ int idx;
+ int result = URJ_STATUS_FAIL;
+
+ while (pd)
+ {
+ name = pd->names_list;
+ while (name)
+ {
+ /* handle indexed port name:
+ - names of scalar ports are simply copied from the port_desc structure
+ to the final string that goes into ci
+ - names of vectored ports are expanded with their decimal index as
+ collected earlier in rule Scalar_or_Vector
+ */
+ name_len = strlen (name->string);
+ str_len = name_len + 1 + 10 + 1 + 1;
+ if ((port_string = malloc (str_len)) != NULL)
+ {
+ for (idx = pd->low_idx; idx <= pd->high_idx; idx++)
+ {
+ if (pd->is_vector)
+ snprintf (port_string, str_len - 1, "%s(%d)",
+ name->string, idx);
+ else
+ strncpy (port_string, name->string, str_len - 1);
+ port_string[str_len - 1] = '\0';
+
+ if (jc->proc_mode & URJ_BSDL_MODE_INSTR_EXEC)
+ (void) urj_part_signal_define (jc->chain, port_string);
+ if (jc->proc_mode & URJ_BSDL_MODE_INSTR_PRINT)
+ urj_log (URJ_LOG_LEVEL_NORMAL, "signal %s\n", port_string);
+ }
+
+ free (port_string);
+ result = URJ_STATUS_OK;
+ }
+ else
+ {
+ urj_bsdl_err_set (jc->proc_mode, URJ_ERROR_OUT_OF_MEMORY,
+ "No memory");
+ return URJ_STATUS_FAIL;
+ }
+
+ name = name->next;
+ }
+
+ pd = pd->next;
+ }
+
+ return result;
+}
+
+
+/*****************************************************************************
+ * int create_register( urj_bsdl_jtag_ctrl_t *jc, char *reg_name, size_t len )
+ *
+ * Generic function to create a jtag register via shell command
+ * register <reg_name> <len>
+ *
+ * Parameters
+ * jc : jtag control structure
+ * reg_name : name of the new register
+ * len : number of bits (= length) of new register
+ *
+ * Returns
+ * URJ_STATUS_OK, URJ_STATUS_FAIL
+ ****************************************************************************/
+static int
+create_register (urj_bsdl_jtag_ctrl_t *jc, char *reg_name, size_t len)
+{
+ int result = URJ_STATUS_OK;
+
+ if (urj_part_find_data_register (jc->part, reg_name) != NULL)
+ return URJ_STATUS_OK;
+
+ if (jc->proc_mode & URJ_BSDL_MODE_INSTR_EXEC)
+ result = urj_part_data_register_define (jc->part, reg_name, len);
+ if (jc->proc_mode & URJ_BSDL_MODE_INSTR_PRINT)
+ urj_log (URJ_LOG_LEVEL_NORMAL, "register %s %zd\n", reg_name, len);
+
+ return result;
+}
+
+
+/*****************************************************************************
+ * int urj_bsdl_process_idcode( urj_bsdl_jtag_ctrl_t *jc )
+ *
+ * Creates the DIR register based on the extracted idcode.
+ *
+ * Parameters
+ * jc : jtag control structure
+ *
+ * Returns
+ * URJ_STATUS_OK, URJ_STATUS_FAIL
+ ****************************************************************************/
+static int
+urj_bsdl_process_idcode (urj_bsdl_jtag_ctrl_t *jc)
+{
+ int result = URJ_STATUS_OK;
+
+ if (jc->idcode)
+ result = create_register (jc, "DIR", strlen (jc->idcode));
+ else
+ urj_bsdl_warn (jc->proc_mode,
+ _("No IDCODE specification found.\n"));
+
+ return result;
+}
+
+
+/*****************************************************************************
+ * int urj_bsdl_process_usercode( urj_bsdl_jtag_ctrl_t *jc )
+ *
+ * Creates the USERCODE register, the contents of the usercode string is
+ * ignored.
+ *
+ * Parameters
+ * jc : jtag control structure
+ *
+ * Returns
+ * URJ_STATUS_OK, URJ_STATUS_FAIL
+ ****************************************************************************/
+static int
+urj_bsdl_process_usercode (urj_bsdl_jtag_ctrl_t *jc)
+{
+ int result = URJ_STATUS_OK;
+
+ if (jc->usercode)
+ result = create_register (jc, "USERCODE", strlen (jc->usercode));
+
+ /* we're not interested in the usercode value at all */
+
+ return result;
+}
+
+
+/*****************************************************************************
+ * int urj_bsdl_set_bsr_length( urj_bsdl_jtag_ctrl_t *jc )
+ *
+ * Creates the BSR register based on the specified length.
+ *
+ * Parameters
+ * jc : jtag control structure
+ *
+ * Returns
+ * URJ_STATUS_OK, URJ_STATUS_FAIL
+ ****************************************************************************/
+static int
+urj_bsdl_set_bsr_length (urj_bsdl_jtag_ctrl_t *jc)
+{
+ return create_register (jc, "BSR", jc->bsr_len);
+}
+
+
+static char
+bsbit_type_char (int type)
+{
+ switch (type)
+ {
+ case URJ_BSBIT_INPUT:
+ return 'I';
+ case URJ_BSBIT_OUTPUT:
+ return 'O';
+ case URJ_BSBIT_CONTROL:
+ return 'C';
+ case URJ_BSBIT_INTERNAL:
+ return 'X';
+ case URJ_BSBIT_BIDIR:
+ return 'B';
+ default:
+ return '?';
+ }
+}
+
+static char
+bsbit_safe_char (int safe)
+{
+ switch (safe)
+ {
+ case 0:
+ return '0';
+ case 1:
+ return '1';
+ default:
+ return '?';
+ }
+}
+
+/*****************************************************************************
+ * int urj_bsdl_process_cell_info( urj_bsdl_jtag_ctrl_t *jc )
+ * Cell Info management function
+ *
+ * Creates a BSR cell from the temporary storage variables via shell command
+ * bit <bit_num> <type> <default> <signal> [<cbit> <cval> Z]
+ *
+ * Parameters
+ * jc : jtag control structure
+ *
+ * Returns
+ * URJ_STATUS_OK, URJ_STATUS_FAIL
+ ****************************************************************************/
+static int
+urj_bsdl_process_cell_info (urj_bsdl_jtag_ctrl_t *jc)
+{
+ urj_bsdl_cell_info_t *ci = jc->cell_info_first;
+ int type;
+ int safe;
+
+ while (ci)
+ {
+ /* convert cell function from BSDL token to jtag syntax */
+ switch (ci->cell_function)
+ {
+ case INTERNAL:
+ /* fall through */
+ case OUTPUT2:
+ /* fall through */
+ case OUTPUT3:
+ type = URJ_BSBIT_OUTPUT;
+ break;
+ case OBSERVE_ONLY:
+ /* fall through */
+ case INPUT:
+ /* fall through */
+ case CLOCK:
+ type = URJ_BSBIT_INPUT;
+ break;
+ case CONTROL:
+ /* fall through */
+ case CONTROLR:
+ type = URJ_BSBIT_CONTROL;
+ break;
+ case BIDIR:
+ type = URJ_BSBIT_BIDIR;
+ break;
+ default:
+ /* spoil command */
+ type = -1;
+ break;
+ }
+ /* convert basic safe value */
+ safe = strcasecmp (ci->basic_safe_value, "x") == 0 ? URJ_BSBIT_DONTCARE
+ : (ci->basic_safe_value[0] - '0');
+
+ if (ci->ctrl_bit_num >= 0)
+ {
+ if (jc->proc_mode & URJ_BSDL_MODE_INSTR_EXEC)
+ if (urj_part_bsbit_alloc_control (jc->part, ci->bit_num,
+ ci->port_name, type, safe,
+ ci->ctrl_bit_num,
+ ci->disable_safe_value,
+ URJ_BSBIT_STATE_Z) !=
+ URJ_STATUS_OK)
+ return URJ_STATUS_FAIL;
+ if (jc->proc_mode & URJ_BSDL_MODE_INSTR_PRINT)
+ urj_log (URJ_LOG_LEVEL_NORMAL,
+ "bit %d %c %c %s %d %d %c\n", ci->bit_num,
+ bsbit_type_char (type), bsbit_safe_char(safe), ci->port_name,
+ ci->ctrl_bit_num, ci->disable_safe_value,
+ 'Z');
+ }
+ else
+ {
+ if (jc->proc_mode & URJ_BSDL_MODE_INSTR_EXEC)
+ if (urj_part_bsbit_alloc (jc->part, ci->bit_num,
+ ci->port_name, type, safe) !=
+ URJ_STATUS_OK)
+ return URJ_STATUS_FAIL;
+ if (jc->proc_mode & URJ_BSDL_MODE_INSTR_PRINT)
+ urj_log (URJ_LOG_LEVEL_NORMAL,
+ "bit %d %c %c %s\n", ci->bit_num,
+ bsbit_type_char (type), bsbit_safe_char(safe), ci->port_name);
+ }
+
+ ci = ci->next;
+ }
+
+ return URJ_STATUS_OK;
+}
+
+
+/*****************************************************************************
+ * int urj_bsdl_process_register_access( urj_bsdl_jtag_ctrl_t *jc )
+ * Register Access management function
+ *
+ * Runs through the main instruction list and builds the instruction/register
+ * association for each instruction from the register access specifications
+ * via shell command
+ * instruction <instruction> <code> <register>
+ *
+ * Additional register are created on the fly:
+ * - standard registers that haven't been created so far
+ * - non-standard registers encountered in register access specs
+ *
+ * Mandatory instruction/register associations are generated also in
+ * absence of a related register access specification (such specs are
+ * optional in the BSDL standard).
+ *
+ * Parameters
+ * jc : jtag control structure
+ *
+ * Returns
+ * URJ_STATUS_OK, URJ_STATUS_FAIL
+ ****************************************************************************/
+static int
+urj_bsdl_process_register_access (urj_bsdl_jtag_ctrl_t *jc)
+{
+ urj_bsdl_types_ainfo_elem_t *ai;
+ urj_bsdl_instr_elem_t *cinst;
+ int result;
+
+ /* ensure that all mandatory registers are created prior to
+ handling the instruction/register associations
+ + BOUNDARY/BSR has been generated during the parsing process
+ + DEVICE_ID/DIR has been generated during the parsing process
+ */
+ /* we need a BYPASS register */
+ result = create_register (jc, "BYPASS", 1);
+ if (result != URJ_STATUS_OK)
+ return result;
+
+ /* next scan through all register_access definitions and create
+ the non-standard registers */
+ ai = jc->ainfo_list;
+ while (ai)
+ {
+ int is_std = 0;
+
+ if (strcasecmp (ai->reg, "BOUNDARY") == 0)
+ is_std = 1;
+ if (strcasecmp (ai->reg, "BYPASS") == 0)
+ is_std = 1;
+ if (strcasecmp (ai->reg, "DEVICE_ID") == 0)
+ is_std = 1;
+ if (strcasecmp (ai->reg, "USERCODE") == 0)
+ is_std = 1;
+
+ if (!is_std)
+ if (create_register (jc, ai->reg, ai->reg_len) != URJ_STATUS_OK)
+ result = URJ_STATUS_FAIL;
+
+ ai = ai->next;
+ }
+
+ if (result != URJ_STATUS_OK)
+ return result;
+
+
+ /* next scan through all instruction/opcode definitions and resolve
+ the instruction/register associations for these */
+ cinst = jc->instr_list;
+ while (cinst)
+ {
+ char *reg_name = NULL;
+ char *instr_name = NULL;
+
+ /* now see which of the register_access elements matches this instruction */
+ ai = jc->ainfo_list;
+ while (ai && (reg_name == NULL))
+ {
+ urj_bsdl_instr_elem_t *tinst = ai->instr_list;
+
+ while (tinst && (reg_name == NULL))
+ {
+ if (strcasecmp (tinst->instr, cinst->instr) == 0)
+ {
+ /* found the instruction inside the current access info,
+ now set the register name
+ map some standard register names to different internal names */
+ if (strcasecmp (ai->reg, "BOUNDARY") == 0)
+ reg_name = "BSR";
+ else if (strcasecmp (ai->reg, "DEVICE_ID") == 0)
+ reg_name = "DIR";
+ else
+ reg_name = ai->reg;
+ }
+
+ tinst = tinst->next;
+ }
+
+ ai = ai->next;
+ }
+
+ if (reg_name == NULL)
+ {
+ /* BSDL file didn't specify an explicit register_access definition
+ if we're looking at a standard mandatory instruction, we should
+ build the association ourselves */
+ if (strcasecmp (cinst->instr, "BYPASS") == 0)
+ reg_name = "BYPASS";
+ else if (strcasecmp (cinst->instr, "CLAMP") == 0)
+ reg_name = "BYPASS";
+ else if (strcasecmp (cinst->instr, "EXTEST") == 0)
+ reg_name = "BSR";
+ else if (strcasecmp (cinst->instr, "HIGHZ") == 0)
+ reg_name = "BYPASS";
+ else if (strcasecmp (cinst->instr, "IDCODE") == 0)
+ reg_name = "DIR";
+ else if (strcasecmp (cinst->instr, "INTEST") == 0)
+ reg_name = "BSR";
+ else if (strcasecmp (cinst->instr, "PRELOAD") == 0)
+ reg_name = "BSR";
+ else if (strcasecmp (cinst->instr, "SAMPLE") == 0)
+ reg_name = "BSR";
+ else if (strcasecmp (cinst->instr, "USERCODE") == 0)
+ reg_name = "USERCODE";
+ }
+
+ if (strcasecmp (cinst->instr, "SAMPLE") == 0)
+ instr_name = "SAMPLE/PRELOAD";
+ else
+ instr_name = cinst->instr;
+
+ if (reg_name)
+ {
+ if (jc->proc_mode & URJ_BSDL_MODE_INSTR_EXEC)
+ // @@@@ RFHH check if jc->part equals chain_active_part
+ if (urj_part_instruction_define (jc->part, instr_name,
+ cinst->opcode, reg_name) ==
+ NULL)
+ return URJ_STATUS_FAIL;
+ if (jc->proc_mode & URJ_BSDL_MODE_INSTR_PRINT)
+ urj_log (URJ_LOG_LEVEL_NORMAL,
+ "instruction %s %s %s\n", instr_name, cinst->opcode,
+ reg_name);
+ }
+
+ cinst = cinst->next;
+ }
+
+ return URJ_STATUS_OK;
+}
+
+
+/*****************************************************************************
+ * int parse_vhdl_elem( urj_bsdl_parser_priv_t *priv, urj_vhdl_elem_t *elem )
+ *
+ * Runs the specified vhdl element through the BSDl parser.
+ *
+ * Parameters
+ * priv : private data container for parser related tasks
+ * elem : vhdl element to be parsed
+ *
+ * Returns
+ * URJ_BSDL_MODE_SYN_CHECK -> parsing successful
+ * 0 -> error occured
+ ****************************************************************************/
+static int
+parse_vhdl_elem (urj_bsdl_parser_priv_t *priv, urj_vhdl_elem_t *elem)
+{
+ char *buf;
+ size_t buf_len;
+ size_t name_string_len;
+ size_t elem_string_len;
+
+ name_string_len = elem->name ? strlen (elem->name) : 0;
+ elem_string_len = elem->payload ? strlen (elem->payload) : 0;
+
+ /* allocate enough memory for total buffer */
+ buf_len = name_string_len + 1 + elem_string_len + 1;
+ buf = malloc (buf_len);
+ if (!buf)
+ {
+ urj_bsdl_err_set (priv->jtag_ctrl->proc_mode,
+ URJ_ERROR_OUT_OF_MEMORY,
+ "No memory");
+ return -1;
+ }
+ buf[0] = '\0';
+
+ if (name_string_len > 0)
+ strncat (buf, elem->name, buf_len);
+ strncat (buf, " ", buf_len - name_string_len);
+
+ if (elem_string_len > 0)
+ strncat (buf, elem->payload, buf_len - name_string_len - 1);
+
+ buf[buf_len - 1] = '\0';
+
+ priv->lineno = elem->line;
+
+ /* buffer is prepared for string parsing */
+ urj_bsdl_flex_switch_buffer (priv->scanner, buf, elem->line);
+ urj_bsdl_parse (priv);
+
+ free (buf);
+
+ return urj_bsdl_flex_get_compile_errors (priv->scanner) ==
+ 0 ? URJ_BSDL_MODE_SYN_CHECK : 0;
+}
+
+
+/*****************************************************************************
+ * int build_commands( urj_bsdl_parser_priv_t *priv )
+ *
+ * Calls the various functions that execute or print the information extracted
+ * from the BSDL/vhdl elements.
+ *
+ * Parameters
+ * priv : private data container for parser related tasks
+ *
+ * Returns
+ * bit field consisting of BSDL_MODE_* actions
+ * telling if INSTR_EXEC or INSTR_PRINT succeeded
+ ****************************************************************************/
+static int
+build_commands (urj_bsdl_parser_priv_t *priv)
+{
+ urj_bsdl_jtag_ctrl_t *jc = priv->jtag_ctrl;
+ int result = 1;
+
+ result = urj_bsdl_emit_ports (jc) == URJ_STATUS_OK ? result : 0;
+
+ result = urj_bsdl_set_instruction_length (jc) == URJ_STATUS_OK ? result : 0;
+
+ result = urj_bsdl_process_idcode (jc) == URJ_STATUS_OK ? result : 0;
+
+ result = urj_bsdl_process_usercode (jc) == URJ_STATUS_OK ? result : 0;
+
+ result = urj_bsdl_set_bsr_length (jc) == URJ_STATUS_OK ? result : 0;
+
+ result = urj_bsdl_process_register_access (jc) == URJ_STATUS_OK ? result : 0;
+
+ result = urj_bsdl_process_cell_info (jc) == URJ_STATUS_OK ? result : 0;
+
+ return result ? URJ_BSDL_MODE_INSTR_EXEC | URJ_BSDL_MODE_INSTR_PRINT : 0;
+}
+
+
+/*****************************************************************************
+ * int compare_idcode( urj_bsdl_jtag_ctrl_t *jc, const char *idcode )
+ *
+ * Compares idcode versus jtag_ctrl->idcode.
+ *
+ * Parameters
+ * jc : jtag_ctrl structure
+ * idcode : idcode string
+ *
+ * Returns
+ * 1 -> idcodes match
+ * 0 -> idcodes don't match
+ ****************************************************************************/
+static int
+compare_idcode (urj_bsdl_jtag_ctrl_t *jc, const char *idcode)
+{
+ int idcode_match = 0;
+
+ /* should we compare the idcodes? */
+ if (idcode)
+ {
+ if (strlen (idcode) == strlen (jc->idcode))
+ {
+ int idx;
+
+ /* compare given idcode with idcode from BSDL file */
+ idcode_match = URJ_BSDL_MODE_IDCODE_CHECK;
+ for (idx = 0; idx < strlen (idcode); idx++)
+ if (jc->idcode[idx] != 'X')
+ if (idcode[idx] != jc->idcode[idx])
+ idcode_match = 0;
+
+ if (idcode_match)
+ urj_bsdl_msg (jc->proc_mode, _("IDCODE matched\n"));
+ else
+ urj_bsdl_msg (jc->proc_mode, _("IDCODE mismatch\n"));
+ }
+ }
+
+ return idcode_match;
+}
+
+
+/*****************************************************************************
+ * int urj_bsdl_process_elements( urj_bsdl_jtag_ctrl_t *jc, const char *idcode )
+ *
+ * If enabled, runs through the list of vhdl elements in jtag ctrl and parser
+ * them as BSDL statements.
+ * If enabled, compares idcode versus jc->idcode.
+ * If enabled, prints or executes the resulting jtag commands.
+ *
+ * Parameters
+ * jc : jtag_ctrl structure
+ * idcode : idcode string
+ *
+ * Returns
+ * < 0 : Error occured, parse/syntax problems or out of memory
+ * = 0 : No errors, idcode not checked or mismatching
+ * > 0 : No errors, idcode checked and matched
+ *
+ ****************************************************************************/
+int
+urj_bsdl_process_elements (urj_bsdl_jtag_ctrl_t *jc, const char *idcode)
+{
+ urj_bsdl_parser_priv_t *priv;
+ urj_vhdl_elem_t *el = jc->vhdl_elem_first;
+ int result = URJ_BSDL_MODE_SYN_CHECK;
+
+ if ((priv = urj_bsdl_parser_init (jc)) == NULL)
+ return -1;
+
+ if (jc->proc_mode & URJ_BSDL_MODE_SYN_CHECK)
+ {
+ while (el && (result & URJ_BSDL_MODE_SYN_CHECK))
+ {
+ result = parse_vhdl_elem (priv, el);
+
+ el = el->next;
+ }
+
+ if (!(result & URJ_BSDL_MODE_SYN_CHECK))
+ {
+ urj_bsdl_err (jc->proc_mode,
+ _("BSDL stage reported errors, aborting.\n"));
+ urj_bsdl_parser_deinit (priv);
+ return -1;
+ }
+ }
+
+ if (jc->idcode)
+ urj_bsdl_msg (jc->proc_mode, _("Got IDCODE: %s\n"), jc->idcode);
+
+ if (jc->proc_mode & URJ_BSDL_MODE_IDCODE_CHECK)
+ result |= compare_idcode (jc, idcode);
+
+ if (jc->
+ proc_mode & (URJ_BSDL_MODE_INSTR_EXEC | URJ_BSDL_MODE_INSTR_PRINT))
+ /* IDCODE check positive if requested? */
+ if (((jc->proc_mode & URJ_BSDL_MODE_IDCODE_CHECK) &&
+ (result & URJ_BSDL_MODE_IDCODE_CHECK))
+ || (!(jc->proc_mode & URJ_BSDL_MODE_IDCODE_CHECK)))
+ result |= build_commands (priv);
+
+ if ((result & jc->proc_mode) ==
+ (jc->proc_mode & URJ_BSDL_MODE_ACTION_ALL))
+ if (jc->proc_mode & URJ_BSDL_MODE_IDCODE_CHECK)
+ result = 1;
+ else
+ result = 0;
+ else
+ result = -1;
+
+ urj_bsdl_parser_deinit (priv);
+
+ return result;
+}
+
+
+/*
+ Local Variables:
+ mode:C
+ c-default-style:java
+ indent-tabs-mode:nil
+ End:
+*/
--- /dev/null
+/*
+ * $Id$
+ *
+ * Reduced version of the global sysdep.h that is suitable for the
+ * BSDL subsystem components. config.h defines a number of macros
+ * that collide with BSDL tokens.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ */
+
+#ifndef BSDL_SYSDEP_H
+#define BSDL_SYSDEP_H
+
+
+#include "bsdl_config.h"
+
+#include <urjtag/gettext.h>
+#define _(s) gettext(s)
+#define N_(s) gettext_noop(s)
+#define P_(s,p,n) ngettext(s,p,n)
+
+#ifdef S_SPLINT_S
+# undef gettext
+# define gettext(s) s
+# undef gettext_noop
+# define gettext_noop(s) s
+# undef ngettext
+# define ngettext(s,p,n) s
+#endif
+
+#endif /* BSDL_SYSDEP_H */
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2008, Arnim Laeuger
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Arnim Laeuger <arniml@users.sourceforge.net>, 2008.
+ *
+ */
+
+#ifndef URJ_BSDL_TYPES_H
+#define URJ_BSDL_TYPES_H
+
+#include <urjtag/types.h>
+#include <urjtag/bsdl_mode.h>
+
+/* private data of the flex scanner
+ handled internally in bsdl_flex.l as yyextra */
+struct scan_extra
+{
+ int proc_mode;
+ int Compile_Errors;
+ int Base;
+};
+typedef struct scan_extra urj_bsdl_scan_extra_t;
+
+/* list of instructions
+ the instruction name and its opcode (optional) is stored here */
+struct instr_elem
+{
+ struct instr_elem *next;
+ char *instr;
+ char *opcode;
+};
+typedef struct instr_elem urj_bsdl_instr_elem_t;
+
+/* register access information
+ * derived from the entries of the REGISTER_ACCESS attribute
+ * ainfo_elem describes a register and its accosiated instructions
+ * - register name
+ * - register length (optional)
+ * - list of associated instructions
+ */
+struct ainfo_elem
+{
+ struct ainfo_elem *next;
+ char *reg;
+ int reg_len;
+ urj_bsdl_instr_elem_t *instr_list;
+};
+typedef struct ainfo_elem urj_bsdl_types_ainfo_elem_t;
+
+/* structure cell_info collects bit/cell information from the
+ BOUNDARY_REGISTER attribute
+ each Cell_Entry fills in the structure and the contents is used for the
+ respective 'bit' command */
+struct cell_info
+{
+ struct cell_info *next;
+ /* basic cell spec entries */
+ int bit_num;
+ char *port_name;
+ int cell_function;
+ char *basic_safe_value;
+ /* the disable spec entries */
+ int ctrl_bit_num;
+ int disable_safe_value;
+};
+typedef struct cell_info urj_bsdl_cell_info_t;
+
+/* structure string_elem enables to build lists of strings */
+struct string_elem
+{
+ struct string_elem *next;
+ char *string;
+};
+typedef struct string_elem urj_bsdl_string_elem_t;
+
+/* structure port_desc contains all descriptive information for a port
+ definition:
+ - one or more names
+ - flag showing whether it's a vector (element) or a scalar
+ - low and high indice if it's a vector */
+struct port_desc
+{
+ urj_bsdl_string_elem_t *names_list;
+ struct port_desc *next;
+ int is_vector;
+ int low_idx;
+ int high_idx;
+};
+typedef struct port_desc urj_bsdl_port_desc_t;
+
+typedef enum
+{
+ URJ_BSDL_VET_CONSTANT,
+ URJ_BSDL_VET_ATTRIBUTE_STRING,
+ URJ_BSDL_VET_ATTRIBUTE_DECIMAL,
+ URJ_BSDL_VET_UNKNOWN
+} urj_vhdl_elem_type_t;
+
+struct vhdl_elem
+{
+ struct vhdl_elem *next;
+ urj_vhdl_elem_type_t type;
+ char *name;
+ char *payload;
+ int line;
+};
+typedef struct vhdl_elem urj_vhdl_elem_t;
+
+typedef enum
+{
+ URJ_BSDL_CONF_1990,
+ URJ_BSDL_CONF_1993,
+ URJ_BSDL_CONF_2001,
+ URJ_BSDL_CONF_UNKNOWN
+} urj_bsdl_conformance_t;
+
+/* structure jtag_ctrl collects all elements that are required to interface
+ with jtag internals */
+struct jtag_ctrl
+{
+ int proc_mode;
+ urj_chain_t *chain;
+ urj_part_t *part;
+ /* collected by VHDL parser */
+ urj_bsdl_port_desc_t *port_desc;
+ urj_vhdl_elem_t *vhdl_elem_first;
+ urj_vhdl_elem_t *vhdl_elem_last;
+ /* collected by BSDL parser */
+ char *idcode; /* IDCODE string */
+ char *usercode; /* USERCODE string */
+ int instr_len;
+ int bsr_len;
+ urj_bsdl_conformance_t conformance;
+ urj_bsdl_instr_elem_t *instr_list;
+ urj_bsdl_types_ainfo_elem_t *ainfo_list;
+ urj_bsdl_cell_info_t *cell_info_first;
+ urj_bsdl_cell_info_t *cell_info_last;
+};
+typedef struct jtag_ctrl urj_bsdl_jtag_ctrl_t;
+
+/* private data of the VHDL bison parser
+ used to store variables the would end up as globals otherwise */
+struct vhdl_parser_priv
+{
+ char Package_File_Name[100];
+ int Reading_Package;
+ char *buffer;
+ size_t len_buffer;
+ void *scanner;
+ urj_bsdl_jtag_ctrl_t *jtag_ctrl;
+ urj_bsdl_port_desc_t tmp_port_desc;
+};
+typedef struct vhdl_parser_priv urj_vhdl_parser_priv_t;
+
+/* private data of the BSDL bison parser
+ used to store variables the would end up as globals otherwise */
+struct bsdl_parser_priv
+{
+ void *scanner;
+ urj_bsdl_jtag_ctrl_t *jtag_ctrl;
+ int lineno;
+ urj_bsdl_types_ainfo_elem_t ainfo;
+ urj_bsdl_cell_info_t tmp_cell_info;
+ urj_bsdl_port_desc_t tmp_port_desc;
+};
+typedef struct bsdl_parser_priv urj_bsdl_parser_priv_t;
+
+#endif /* URJ_BSDL_TYPES_H */
+
+
+/*
+ Local Variables:
+ mode:C
+ c-default-style:java
+ indent-tabs-mode:nil
+ End:
+*/
--- /dev/null
+/*
+ * $Id$
+ *
+ * Original Yacc code by Ken Parker, 1990
+ * Extensions and adaptions for UrJTAG by Arnim Laeuger, 2007
+ *
+ */
+
+/* ----------------------------------------------------------------------- */
+/* */
+/* Yacc code for BSDL */
+/* */
+/* ----------------------------------------------------------------------- */
+/* Date: 901003 */
+
+/*
+
+Email header accompanying the original Yacc code:
+ http://www.eda.org/vug_bbs/bsdl.parser
+
+-----------------------------------8<--------------------------------------
+
+Hello All,
+
+This is this first mailing of the BSDL* Version 0.0 parser specifications
+we are sending to people who request it from our publicized E-Mail address;
+
+ bsdl%hpmtlx@hplabs.HP.com
+
+You are free to redistribute this at will, but we feel that it would be
+better if respondents asked for it directly so that their addresses can
+be entered into our list for future mailings and updates.
+
+It would be helpful if you could confirm receipt of this transmission.
+We also would be very interested to hear about your experiences with this
+information and what you are planning to do with BSDL.
+
+Regards,
+
+Ken Parker
+Hewlett-Packard Company
+
+
+*Boundary-Scan Description Language - as documented in:
+
+"A Language for Describing Boundary-Scan Devices", K.P. Parker
+and S. Oresjo, Proceedings 1990 International Test Conference,
+Washington DC, pp 222-234
+
+
+- -----------------cut here---------------------------------------------------
+
+
+901004.0721 Hewlett-Packard Company
+901016.1049 Manufacturing Test Division
+ P.O. Box 301
+ Loveland, Colorado 80537
+ USA
+
+ October 1990
+Hello BSDL Parser Requestor,
+
+ This Electronic Mail reply contains the computer specifications for
+Hewlett-Packard's Version 0.0 BSDL parser. This section of the reply
+explains the contents of the rest of this file.
+
+This file is composed of seven (7) parts:
+
+ 1) How to use this file
+
+ 2) UNIX* Lex source (lexicographical tokenizing rules)
+
+ 3) UNIX* Yacc source (BNF-like syntax description)
+
+ 4) A sample main program to recognize BSDL.
+
+ 5) A BSDL description of the Texas Instruments 74bct8374 that is
+ recognized by the parser, for testing purposes.
+
+ 6) The VHDL package STD_1149_1_1990 needed by this parser.
+
+ 7) [added 901016] Porting experiences to other systems.
+
+
+RECOMMENDATION: Save a copy of this file in archival storage before
+ processing it via the instructions below. This will
+ allow you to recover from errors, and allow you to
+ compare subsequently released data for changes.
+
+DISCLAIMERS:
+
+1. The IEEE 1149.1 Working Group has not endorsed BSDL Version 0.0 and
+ therefore no person may represent it as an IEEE standard or imply that
+ a resulting IEEE standard will be identical to it.
+
+2. The IEEE 1149.1 Working Group recognizes that BSDL Version 0.0 is a
+ well-conceived initiative that is likely to excelerate the creation
+ of tools that support the 1149.1 standard. As such, changes and
+ enhancements will be carefully considered so as not to needlessly
+ disrupt these development efforts. The overriding goal is the
+ ultimate success of the 1149.1 standard.
+
+LEGAL NOTICES:
+
+ Hewlett-Packard Company makes no warranty of any kind with regard to
+ this information, including, but not limited to, the implied
+ waranties of merchantability and fitness for a particular purpose.
+
+ Hewlett-Packard Company shall not be liable for errors contained
+ herein or direct, indirect, special, incidental, or consequential
+ damages in connection with the furnishing, performance, or use of
+ this material.
+
+
+*UNIX is a trademark of AT&T in the USA and other countries.
+
+*/
+
+
+%pure-parser
+%parse-param {urj_vhdl_parser_priv_t *priv_data}
+%defines
+%name-prefix="urj_vhdl_"
+
+%{
+#include <stdlib.h>
+#include <string.h>
+#include <stdio.h>
+#include <ctype.h>
+
+#include <urjtag/part.h>
+
+#include "bsdl_sysdep.h"
+
+#include "bsdl_types.h"
+#include "bsdl_msg.h"
+
+/* interface to flex */
+#include "vhdl_bison.h"
+#include "vhdl_parser.h"
+
+#ifdef DMALLOC
+#include "dmalloc.h"
+#endif
+
+#define YYLEX_PARAM priv_data->scanner
+int yylex (YYSTYPE *, void *);
+
+#if 1
+#define ERROR_LIMIT 15
+#define BUMP_ERROR \
+ do { \
+ if (urj_vhdl_flex_postinc_compile_errors (priv_data->scanner) > ERROR_LIMIT) \
+ { \
+ Give_Up_And_Quit (priv_data); \
+ YYABORT; \
+ } \
+ } while (0)
+#else
+#define BUMP_ERROR \
+ do { \
+ Give_Up_And_Quit (priv_data); \
+ YYABORT; \
+ } while (0)
+#endif
+
+static void Init_Text (urj_vhdl_parser_priv_t *);
+static void Store_Text (urj_vhdl_parser_priv_t *, char *);
+static void Print_Error (urj_vhdl_parser_priv_t *, const char *);
+static void Give_Up_And_Quit (urj_vhdl_parser_priv_t *);
+
+/* VHDL semantic action interface */
+static void urj_vhdl_set_entity (urj_vhdl_parser_priv_t *, char *);
+static void urj_vhdl_port_add_name (urj_vhdl_parser_priv_t *, char *);
+static void urj_vhdl_port_add_bit (urj_vhdl_parser_priv_t *);
+static void urj_vhdl_port_add_range (urj_vhdl_parser_priv_t *, int, int);
+static void urj_vhdl_port_apply_port (urj_vhdl_parser_priv_t *);
+
+//static void set_attr_bool (urj_vhdl_parser_priv_t *, char *, int);
+static void set_attr_decimal (urj_vhdl_parser_priv_t *, char *, int);
+static void set_attr_string (urj_vhdl_parser_priv_t *, char *, char *);
+//static void set_attr_real (urj_vhdl_parser_priv_t *, char *, char *);
+//static void set_attr_const (urj_vhdl_parser_priv_t *, char *, char *);
+
+void yyerror (urj_vhdl_parser_priv_t *, const char *);
+%}
+
+%union
+{
+ int integer;
+ char *str;
+}
+
+
+%token ENTITY PORT GENERIC USE ATTRIBUTE IS
+%token OF CONSTANT STRING END ALL
+%token PHYSICAL_PIN_MAP PIN_MAP_STRING TRUE FALSE SIGNAL
+%token LOW BOTH IN OUT INOUT
+%token BUFFER LINKAGE BIT BIT_VECTOR TO DOWNTO
+%token PACKAGE BODY TYPE SUBTYPE RECORD ARRAY
+%token POSITIVE RANGE CELL_INFO
+%token INPUT OUTPUT2 OUTPUT3 CONTROL CONTROLR INTERNAL
+%token CLOCK BIDIR BIDIR_IN BIDIR_OUT EXTEST SAMPLE
+%token INTEST RUNBIST PI PO UPD CAP X BIN_X_PATTERN
+%token ZERO ONE Z IDENTIFIER
+%token SINGLE_QUOTE QUOTED_STRING DECIMAL_NUMBER
+%token REAL_NUMBER CONCATENATE SEMICOLON COMMA
+%token LPAREN RPAREN COLON
+%token BOX COLON_EQUAL PERIOD ILLEGAL
+%token BSDL_EXTENSION
+%token OBSERVE_ONLY
+%token STD_1532_2001 STD_1532_2002
+
+%type <str> BIN_X_PATTERN
+%type <str> IDENTIFIER
+%type <str> QUOTED_STRING
+%type <integer> DECIMAL_NUMBER
+%type <integer> Boolean
+%type <str> REAL_NUMBER
+
+%start BSDL_Program
+
+%% /* End declarations, begin rules */
+
+BSDL_Program : Begin_BSDL BSDL_Body End_BSDL
+;
+Begin_BSDL : ENTITY IDENTIFIER IS
+ { urj_vhdl_set_entity (priv_data, $2); }
+ | error
+ {
+ Print_Error (priv_data, _("Improper Entity declaration"));
+ Print_Error (priv_data, _("Check if source file is BSDL"));
+ BUMP_ERROR; YYABORT; /* Probably not a BSDL source file */
+ }
+;
+BSDL_Body : VHDL_Generic
+ VHDL_Port
+ VHDL_Use_Part
+ VHDL_Elements
+ | error
+ {
+ Print_Error (priv_data, _("Syntax Error"));
+ BUMP_ERROR; YYABORT;
+ }
+;
+End_BSDL : END IDENTIFIER SEMICOLON
+ { free ($2); }
+ | error
+ {
+ Print_Error (priv_data, _("Syntax Error"));
+ BUMP_ERROR; YYABORT;
+ }
+;
+VHDL_Generic : GENERIC LPAREN PHYSICAL_PIN_MAP COLON STRING COLON_EQUAL
+ Quoted_String RPAREN SEMICOLON
+;
+VHDL_Port : PORT LPAREN Port_Specifier_List RPAREN SEMICOLON
+ | error
+ {
+ Print_Error (priv_data, _("Improper Port declaration"));
+ BUMP_ERROR; YYABORT;
+ }
+;
+Port_Specifier_List : Port_Specifier
+ | Port_Specifier_List SEMICOLON Port_Specifier
+;
+Port_Specifier : Port_List COLON Function Scaler_Or_Vector
+ { urj_vhdl_port_apply_port (priv_data); }
+;
+Port_List : IDENTIFIER
+ { urj_vhdl_port_add_name (priv_data, $1); }
+ | Port_List COMMA IDENTIFIER
+ { urj_vhdl_port_add_name (priv_data, $3); }
+;
+Function : IN | OUT | INOUT | BUFFER | LINKAGE
+;
+Scaler_Or_Vector : BIT
+ { urj_vhdl_port_add_bit (priv_data); }
+ | BIT_VECTOR LPAREN Vector_Range RPAREN
+;
+Vector_Range : DECIMAL_NUMBER TO DECIMAL_NUMBER
+ { urj_vhdl_port_add_range (priv_data, $1, $3); }
+ | DECIMAL_NUMBER DOWNTO DECIMAL_NUMBER
+ { urj_vhdl_port_add_range (priv_data, $3, $1); }
+;
+VHDL_Use_Part : ISC_Use
+ | Standard_Use
+ | Standard_Use ISC_Use
+ | Standard_Use VHDL_Use_List
+ | error
+ {
+ Print_Error (priv_data, _("Error in Package declaration(s)"));
+ BUMP_ERROR; YYABORT;
+ }
+;
+Standard_Use : USE IDENTIFIER
+ {/* Parse Standard 1149.1 Package */
+ strcpy (priv_data->Package_File_Name, $2);
+ free ($2);
+ }
+ PERIOD ALL SEMICOLON
+ {
+ priv_data->Reading_Package = 1;
+ urj_vhdl_flex_switch_file (priv_data->scanner,
+ priv_data->Package_File_Name);
+ }
+ Standard_Package
+ {
+ priv_data->Reading_Package = 0;
+ }
+;
+Standard_Package : PACKAGE IDENTIFIER IS Standard_Decls Defered_Constants
+ Standard_Decls END IDENTIFIER SEMICOLON Package_Body
+ { free ($2); free ($8); }
+ | error
+ {
+ Print_Error (priv_data, _("Error in Standard Package"));
+ BUMP_ERROR; YYABORT;
+ }
+;
+Standard_Decls : Standard_Decl
+ | Standard_Decls Standard_Decl
+;
+Standard_Decl : ATTRIBUTE IDENTIFIER COLON Attribute_Type SEMICOLON
+ { free ($2); }
+ | TYPE IDENTIFIER IS Type_Body SEMICOLON
+ { free ($2); }
+ | TYPE CELL_INFO IS ARRAY LPAREN POSITIVE RANGE BOX RPAREN
+ OF IDENTIFIER SEMICOLON
+ { free ($11); }
+ | SUBTYPE PIN_MAP_STRING IS STRING SEMICOLON
+ | SUBTYPE BSDL_EXTENSION IS STRING SEMICOLON
+ | error
+ {
+ Print_Error (priv_data, _("Error in Standard Declarations"));
+ BUMP_ERROR; YYABORT;
+ }
+;
+Attribute_Type : IDENTIFIER
+ { free ($1); }
+ | STRING
+ | DECIMAL_NUMBER
+ | BSDL_EXTENSION
+ | error
+ {
+ Print_Error (priv_data, _("Error in Attribute type identification"));
+ BUMP_ERROR; YYABORT;
+ }
+;
+Type_Body : LPAREN ID_Bits RPAREN
+ | LPAREN ID_List RPAREN
+ | LPAREN LOW COMMA BOTH RPAREN
+ | ARRAY LPAREN DECIMAL_NUMBER TO DECIMAL_NUMBER RPAREN
+ OF IDENTIFIER
+ { free ($8); }
+ | ARRAY LPAREN DECIMAL_NUMBER DOWNTO DECIMAL_NUMBER RPAREN
+ OF IDENTIFIER
+ { free ($8); }
+ | RECORD Record_Body END RECORD
+ | error
+ {
+ Print_Error (priv_data, _("Error in Type definition"));
+ BUMP_ERROR; YYABORT;
+ }
+;
+ID_Bits : ID_Bit
+ | ID_Bits COMMA ID_Bit
+;
+ID_List : IDENTIFIER
+ { free ($1); }
+ | ID_List COMMA IDENTIFIER
+ { free ($3); }
+;
+ID_Bit : SINGLE_QUOTE BIN_X_PATTERN SINGLE_QUOTE
+ { free ($2); }
+ | error
+ {
+ Print_Error (priv_data, _("Error in Bit definition"));
+ BUMP_ERROR; YYABORT;
+ }
+;
+Record_Body : Record_Element
+ | Record_Body Record_Element
+;
+Record_Element : IDENTIFIER COLON IDENTIFIER SEMICOLON
+ { free ($1); free ($3); }
+ | error
+ {
+ Print_Error (priv_data, _("Error in Record Definition"));
+ BUMP_ERROR; YYABORT;
+ }
+;
+Defered_Constants : Defered_Constant
+ | Defered_Constants Defered_Constant
+;
+Defered_Constant : CONSTANT Constant_Body
+;
+Constant_Body : IDENTIFIER COLON CELL_INFO SEMICOLON
+ { free ($1); }
+ | error
+ {
+ Print_Error (priv_data, _("Error in defered constant"));
+ BUMP_ERROR; YYABORT;
+ }
+;
+VHDL_Use_List : VHDL_Use
+ | VHDL_Use_List VHDL_Use
+;
+Package_Body : PACKAGE BODY IDENTIFIER IS Constant_List END IDENTIFIER
+ { free ($3); free ($7); }
+ SEMICOLON
+ | error
+ {
+ Print_Error (priv_data, _("Error in Package Body definition"));
+ BUMP_ERROR; YYABORT;
+ }
+;
+Constant_List : Cell_Constant
+ | Constant_List Cell_Constant
+;
+Cell_Constant : CONSTANT IDENTIFIER COLON CELL_INFO COLON_EQUAL
+ LPAREN Triples_List RPAREN SEMICOLON
+ { free ($2); }
+ | error
+ {
+ Print_Error (priv_data, _("Error in Cell Constant definition"));
+ BUMP_ERROR; YYABORT;
+ }
+;
+Triples_List : Triple
+ | Triples_List COMMA Triple
+;
+Triple : LPAREN Triple_Function COMMA Triple_Inst COMMA CAP_Data
+ RPAREN
+ | error
+ {
+ Print_Error (priv_data, _("Error in Cell Data Record"));
+ BUMP_ERROR; YYABORT;
+ }
+;
+Triple_Function : INPUT | OUTPUT2 | OUTPUT3 | INTERNAL | CONTROL
+ | CONTROLR | CLOCK | BIDIR_IN | BIDIR_OUT
+ | OBSERVE_ONLY
+ | error
+ {
+ Print_Error (priv_data, _("Error in Cell_Type Function field"));
+ BUMP_ERROR; YYABORT;
+ }
+;
+Triple_Inst : EXTEST | SAMPLE | INTEST | RUNBIST
+ | error
+ {
+ Print_Error (priv_data, _("Error in BScan_Inst Instruction field"));
+ BUMP_ERROR; YYABORT;
+ }
+;
+CAP_Data : PI | PO | UPD | CAP | X | ZERO | ONE
+ | error
+ {
+ Print_Error (priv_data, _("Error in Constant CAP data source field"));
+ BUMP_ERROR; YYABORT;
+ }
+;
+VHDL_Use : USE IDENTIFIER
+ {/* Parse Standard 1149.1 Package */
+ strcpy(priv_data->Package_File_Name, $2);
+ free($2);
+ }
+ PERIOD ALL SEMICOLON
+ {
+ priv_data->Reading_Package = 1;
+ urj_vhdl_flex_switch_file (priv_data->scanner,
+ priv_data->Package_File_Name);
+ }
+ User_Package
+ {
+ priv_data->Reading_Package = 0;
+ }
+;
+User_Package : PACKAGE IDENTIFIER
+ IS Defered_Constants END IDENTIFIER SEMICOLON Package_Body
+ { free($2); free($6); }
+ | error
+ {Print_Error(priv_data, _("Error in User-Defined Package declarations"));
+ BUMP_ERROR; YYABORT; }
+;
+VHDL_Elements : VHDL_Element
+ | VHDL_Elements VHDL_Element
+ | error
+ {
+ Print_Error (priv_data, _("Unknown VHDL statement"));
+ BUMP_ERROR; YYABORT;
+ }
+;
+VHDL_Element : VHDL_Constant
+ | VHDL_Attribute
+;
+VHDL_Constant : CONSTANT VHDL_Constant_Part
+;
+VHDL_Constant_Part : IDENTIFIER COLON PIN_MAP_STRING COLON_EQUAL
+ Quoted_String SEMICOLON
+ // { set_attr_const (priv_data, $1, strdup ("PIN_MAP_STRING")); }
+ { free ($1); }
+;
+VHDL_Attribute : ATTRIBUTE VHDL_Attribute_Types
+;
+VHDL_Attribute_Types : VHDL_Attr_Boolean
+ | VHDL_Attr_Decimal
+ | VHDL_Attr_Real
+ | VHDL_Attr_String
+ | VHDL_Attr_PhysicalPinMap
+ | error
+ {
+ Print_Error (priv_data, _("Error in Attribute specification"));
+ BUMP_ERROR; YYABORT;
+ }
+;
+VHDL_Attr_Boolean : IDENTIFIER OF IDENTIFIER COLON SIGNAL IS Boolean SEMICOLON
+ {
+ //set_attr_bool (priv_data, $1, $7);
+ //free ($3);
+ /* skip boolean attributes for the time being */
+ free ($1); free ($3);
+ }
+;
+Boolean : TRUE
+ { $$ = 1; }
+ | FALSE
+ { $$ = 0; }
+;
+VHDL_Attr_Decimal : IDENTIFIER OF IDENTIFIER COLON ENTITY IS DECIMAL_NUMBER SEMICOLON
+ {
+ set_attr_decimal (priv_data, $1, $7);
+ free ($3);
+ }
+;
+VHDL_Attr_Real : IDENTIFIER OF IDENTIFIER COLON SIGNAL IS LPAREN REAL_NUMBER COMMA Stop RPAREN SEMICOLON
+ {
+ //set_attr_real (priv_data, $1, $8);
+ //free ($3);
+ /* skip real attributes for the time being */
+ free ($1); free ($3); free ($8);
+ }
+;
+Stop : LOW | BOTH
+;
+VHDL_Attr_String : IDENTIFIER OF IDENTIFIER COLON ENTITY IS Quoted_String SEMICOLON
+ {
+ set_attr_string (priv_data, $1, strdup (priv_data->buffer));
+ free ($3);
+ }
+;
+VHDL_Attr_PhysicalPinMap : IDENTIFIER OF IDENTIFIER COLON ENTITY IS PHYSICAL_PIN_MAP SEMICOLON
+ { free ($1); free ($3); }
+;
+Quoted_String : QUOTED_STRING
+ {
+ Init_Text (priv_data);
+ Store_Text (priv_data, $1);
+ free ($1);
+ }
+ | Quoted_String CONCATENATE QUOTED_STRING
+ {
+ Store_Text (priv_data, $3);
+ free ($3);
+ }
+;
+ISC_Use : USE ISC_Packages PERIOD ALL SEMICOLON
+ {
+ priv_data->Reading_Package = 1;
+ urj_vhdl_flex_switch_file (priv_data->scanner,
+ priv_data->Package_File_Name);
+ }
+ ISC_Package
+ {
+ priv_data->Reading_Package = 0;
+ }
+;
+ISC_Packages : STD_1532_2001
+ {
+ strcpy (priv_data->Package_File_Name, "STD_1532_2001");
+ }
+ | STD_1532_2002
+ {
+ strcpy (priv_data->Package_File_Name, "STD_1532_2002");
+ }
+;
+ISC_Package : ISC_Package_Header ISC_Package_Body
+;
+ISC_Package_Header : PACKAGE ISC_Packages IS
+ Standard_Use
+ {
+ priv_data->Reading_Package = 1;
+ }
+ Standard_Decls
+ END ISC_Packages SEMICOLON
+;
+ISC_Package_Body : PACKAGE BODY ISC_Packages IS
+ END ISC_Packages SEMICOLON
+;
+%% /* End rules, begin programs */
+/*****************************************************************************
+ * void Init_Text( urj_vhdl_parser_priv_t *priv )
+ *
+ * Allocates the internal test buffer if not already existing.
+ *
+ * Parameters
+ * priv : private data container for parser related tasks
+ *
+ * Returns
+ * void
+ ****************************************************************************/
+static void
+Init_Text (urj_vhdl_parser_priv_t *priv)
+{
+ if (priv->len_buffer == 0)
+ {
+ /* @@@@ RFHH check malloc result */
+ priv->buffer = malloc (160);
+ priv->len_buffer = 160;
+ }
+ priv->buffer[0] = '\0';
+}
+
+
+/*****************************************************************************
+ * void Store_Text( urj_vhdl_parser_priv_t *priv, char *Source )
+ *
+ * Appends the given String to the internal text buffer. The buffer
+ * is extended if the string does not fit into the current size.
+ *
+ * Parameters
+ * priv : private data container for parser related tasks
+ * String : pointer to string that is to be added to buffer
+ *
+ * Returns
+ * void
+ ****************************************************************************/
+static void
+Store_Text (urj_vhdl_parser_priv_t *priv, char *Source)
+{ /* Save characters from VHDL string in local string buffer. */
+ size_t req_len;
+ char *SourceEnd;
+
+ SourceEnd = ++Source; /* skip leading '"' */
+ while (*SourceEnd && (*SourceEnd != '"') && (*SourceEnd != '\n'))
+ SourceEnd++;
+ /* terminate Source string with NUL character */
+ *SourceEnd = '\0';
+
+ req_len = strlen (priv->buffer) + strlen (Source) + 1;
+ if (req_len > priv->len_buffer)
+ {
+ /* @@@@ RFHH check realloc result */
+ priv->buffer = realloc (priv->buffer, req_len);
+ priv->len_buffer = req_len;
+ }
+ strcat (priv->buffer, Source);
+}
+
+/*----------------------------------------------------------------------*/
+static void
+Print_Error (urj_vhdl_parser_priv_t *priv_data, const char *Errmess)
+{
+ urj_bsdl_jtag_ctrl_t *jc = priv_data->jtag_ctrl;
+
+ if (priv_data->Reading_Package)
+ urj_bsdl_err (jc->proc_mode,
+ _("In Package %s, Line %d, %s.\n"),
+ priv_data->Package_File_Name,
+ urj_vhdl_flex_get_lineno (priv_data->scanner), Errmess);
+ else
+ urj_bsdl_err (jc->proc_mode,
+ _("Line %d, %s.\n"),
+ urj_vhdl_flex_get_lineno (priv_data->scanner), Errmess);
+
+ /* set an error if nothing else is pending */
+ if (urj_error_get () == URJ_ERROR_OK)
+ urj_bsdl_err_set (jc->proc_mode, URJ_ERROR_BSDL_VHDL,
+ "Parser error, see log for details");
+}
+
+/*----------------------------------------------------------------------*/
+static void
+Give_Up_And_Quit (urj_vhdl_parser_priv_t *priv_data)
+{
+ Print_Error (priv_data, _("Too many errors"));
+}
+
+/*----------------------------------------------------------------------*/
+void
+yyerror (urj_vhdl_parser_priv_t *priv_data, const char *error_string)
+{
+}
+
+
+/*****************************************************************************
+ * void urj_vhdl_sem_init( urj_vhdl_parser_priv_t *priv )
+ *
+ * Initializes storage elements in the private parser and jtag control
+ * structures that are used for semantic purposes.
+ *
+ * Parameters
+ * priv : private data container for parser related tasks
+ *
+ * Returns
+ * void
+ ****************************************************************************/
+static void
+urj_vhdl_sem_init (urj_vhdl_parser_priv_t *priv)
+{
+ priv->tmp_port_desc.names_list = NULL;
+ priv->tmp_port_desc.next = NULL;
+
+ priv->jtag_ctrl->port_desc = NULL;
+
+ priv->jtag_ctrl->vhdl_elem_first = NULL;
+ priv->jtag_ctrl->vhdl_elem_last = NULL;
+}
+
+
+/*****************************************************************************
+ * void free_string_list( urj_bsdl_string_elem_t *sl )
+ *
+ * Deallocates the given list of string_elem items.
+ *
+ * Parameters
+ * sl : first string_elem to deallocate
+ *
+ * Returns
+ * void
+ ****************************************************************************/
+static void
+free_string_list (urj_bsdl_string_elem_t *sl)
+{
+ if (sl)
+ {
+ if (sl->string)
+ free (sl->string);
+ free_string_list (sl->next);
+ free (sl);
+ }
+}
+
+
+/*****************************************************************************
+ * void free_port_list( urj_bsdl_port_desc_t *pl, int free_me )
+ *
+ * Deallocates the given list of port_desc.
+ *
+ * Parameters
+ * pl : first port_desc to deallocate
+ * free_me : set to 1 to free memory for ai as well
+ *
+ * Returns
+ * void
+ ****************************************************************************/
+static void
+free_port_list (urj_bsdl_port_desc_t *pl, int free_me)
+{
+ if (pl)
+ {
+ free_string_list (pl->names_list);
+ free_port_list (pl->next, 1);
+
+ if (free_me)
+ free (pl);
+ }
+}
+
+
+/*****************************************************************************
+ * void free_elem_list( urj_vhdl_elem_t *el )
+ *
+ * Deallocates the given list of vhdl_elem items.
+ *
+ * Parameters
+ * el : first vhdl_elem to deallocate
+ *
+ * Returns
+ * void
+ ****************************************************************************/
+static void
+free_elem_list (urj_vhdl_elem_t *el)
+{
+ if (el)
+ {
+ free_elem_list (el->next);
+
+ if (el->name)
+ free (el->name);
+
+ if (el->payload)
+ free (el->payload);
+ free (el);
+ }
+}
+
+
+/*****************************************************************************
+ * void urj_vhdl_sem_deinit( urj_vhdl_parser_priv_t *priv )
+ *
+ * Frees and deinitializes storage elements in the private parser and
+ * jtag control structures that were filled by semantic rules.
+ *
+ * Parameters
+ * priv : private data container for parser related tasks
+ *
+ * Returns
+ * void
+ ****************************************************************************/
+static void
+urj_vhdl_sem_deinit (urj_vhdl_parser_priv_t *priv_data)
+{
+ urj_bsdl_port_desc_t *pd = priv_data->jtag_ctrl->port_desc;
+ urj_vhdl_elem_t *el = priv_data->jtag_ctrl->vhdl_elem_first;
+
+ /* free port_desc list */
+ free_port_list (pd, 1);
+ free_port_list (&(priv_data->tmp_port_desc), 0);
+
+ /* free VHDL element list */
+ free_elem_list (el);
+
+ priv_data->jtag_ctrl = NULL;
+}
+
+
+/*****************************************************************************
+ * urj_vhdl_parser_priv_t *urj_vhdl_parser_init( FILE *f, urj_bsdl_jtag_ctrl_t *jtag_ctrl )
+ *
+ * Initializes storage elements in the private parser structure that are
+ * used for parser maintenance purposes.
+ * Subsequently calls initializer functions for the scanner and the semantic
+ * parts.
+ *
+ * Parameters
+ * f : descriptor of file for scanning
+ * jtag_ctrl : pointer to jtag control structure
+ *
+ * Returns
+ * pointer to private parser structure
+ ****************************************************************************/
+urj_vhdl_parser_priv_t *
+urj_vhdl_parser_init (FILE *f, urj_bsdl_jtag_ctrl_t *jtag_ctrl)
+{
+ urj_vhdl_parser_priv_t *new_priv;
+
+ if (!(new_priv = malloc (sizeof (urj_vhdl_parser_priv_t))))
+ {
+ urj_bsdl_ftl_set (jtag_ctrl->proc_mode, URJ_ERROR_OUT_OF_MEMORY,
+ "No memory");
+ return NULL;
+ }
+
+ new_priv->jtag_ctrl = jtag_ctrl;
+
+ new_priv->Reading_Package = 0;
+ new_priv->buffer = NULL;
+ new_priv->len_buffer = 0;
+
+ if (!(new_priv->scanner = urj_vhdl_flex_init (f, jtag_ctrl->proc_mode)))
+ {
+ free (new_priv);
+ new_priv = NULL;
+ }
+
+ urj_vhdl_sem_init (new_priv);
+
+ return new_priv;
+}
+
+
+/*****************************************************************************
+ * void urj_vhdl_parser_deinit( urj_vhdl_parser_priv_t *priv )
+ *
+ * Frees storage elements in the private parser structure that are
+ * used for parser maintenance purposes.
+ * Subsequently calls deinitializer functions for the scanner and the semantic
+ * parts.
+ *
+ * Parameters
+ * priv : private data container for parser related tasks
+ *
+ * Returns
+ * void
+ ****************************************************************************/
+void
+urj_vhdl_parser_deinit (urj_vhdl_parser_priv_t *priv_data)
+{
+ if (priv_data->buffer)
+ {
+ free (priv_data->buffer);
+ priv_data->buffer = NULL;
+ }
+
+ urj_vhdl_sem_deinit (priv_data);
+ urj_vhdl_flex_deinit (priv_data->scanner);
+ free (priv_data);
+}
+
+/*****************************************************************************
+ * void urj_vhdl_set_entity( urj_vhdl_parser_priv_t *priv, char *entityname )
+ *
+ * Applies the entity name from BSDL as the part name.
+ *
+ * Parameters
+ * priv : private data container for parser related tasks
+ * entityname : entity name string, memory gets free'd
+ *
+ * Returns
+ * void
+ ****************************************************************************/
+static void
+urj_vhdl_set_entity (urj_vhdl_parser_priv_t *priv, char *entityname)
+{
+ if (priv->jtag_ctrl->proc_mode & URJ_BSDL_MODE_INSTR_EXEC)
+ {
+ strncpy (priv->jtag_ctrl->part->part, entityname,
+ URJ_PART_PART_MAXLEN);
+ priv->jtag_ctrl->part->part[URJ_PART_PART_MAXLEN] = '\0';
+ }
+
+ free (entityname);
+}
+
+/*****************************************************************************
+ * void urj_vhdl_port_add_name( urj_vhdl_parser_priv_t *priv, char *name )
+ * Port name management function
+ *
+ * Sets the name field of the temporary storage area for port description
+ * (port_desc) to the parameter name.
+ *
+ * Parameters
+ * priv : private data container for parser related tasks
+ * name : base name of the port, memory get's free'd lateron
+ *
+ * Returns
+ * void
+ ****************************************************************************/
+static void
+urj_vhdl_port_add_name (urj_vhdl_parser_priv_t *priv, char *name)
+{
+ urj_bsdl_port_desc_t *pd = &(priv->tmp_port_desc);
+ urj_bsdl_string_elem_t *new_string;
+
+ new_string = malloc (sizeof (urj_bsdl_string_elem_t));
+ if (new_string)
+ {
+ new_string->next = pd->names_list;
+ new_string->string = name;
+
+ pd->names_list = new_string;
+ }
+ else
+ urj_bsdl_ftl_set (priv->jtag_ctrl->proc_mode, URJ_ERROR_OUT_OF_MEMORY,
+ "No memory");
+}
+
+
+/*****************************************************************************
+ * void urj_vhdl_port_add_bit( urj_vhdl_parser_priv_t *priv )
+ * Port name management function
+ *
+ * Sets the vector and index fields of the temporary storage area for port
+ * description (port_desc) to non-vector information. The low and high indice
+ * are set to equal numbers (exact value is irrelevant).
+ *
+ * Parameters
+ * priv : private data container for parser related tasks
+ *
+ * Returns
+ * void
+ ****************************************************************************/
+static void
+urj_vhdl_port_add_bit (urj_vhdl_parser_priv_t *priv)
+{
+ urj_bsdl_port_desc_t *pd = &(priv->tmp_port_desc);
+
+ pd->is_vector = 0;
+ pd->low_idx = 0;
+ pd->high_idx = 0;
+}
+
+
+/*****************************************************************************
+ * void urj_vhdl_port_add_range( urj_vhdl_parser_priv_t *priv, int low, int high )
+ * Port name management function
+ *
+ * Sets the vector and index fields of the temporary storage area for port
+ * description (port_desc) to the specified vector information.
+ *
+ * Parameters
+ * priv : private data container for parser related tasks
+ * low : low index of vector
+ * high : high index of vector
+ *
+ * Returns
+ * void
+ ****************************************************************************/
+static void
+urj_vhdl_port_add_range (urj_vhdl_parser_priv_t *priv, int low,
+ int high)
+{
+ urj_bsdl_port_desc_t *pd = &(priv->tmp_port_desc);
+
+ pd->is_vector = 1;
+ pd->low_idx = low;
+ pd->high_idx = high;
+}
+
+/*****************************************************************************
+ * void urj_vhdl_port_apply_port( urj_vhdl_parser_priv_t *priv )
+ * Port name management function
+ *
+ * Applies the current temporary port description to the final list
+ * of port descriptions.
+ *
+ * Parameters
+ * priv : private data container for parser related tasks
+ *
+ * Returns
+ * void
+ ****************************************************************************/
+static void
+urj_vhdl_port_apply_port (urj_vhdl_parser_priv_t *priv)
+{
+ urj_bsdl_port_desc_t *tmp_pd = &(priv->tmp_port_desc);
+ urj_bsdl_port_desc_t *pd = malloc (sizeof (urj_bsdl_port_desc_t));
+
+ if (pd)
+ {
+ /* insert at top of list */
+ pd->next = priv->jtag_ctrl->port_desc;
+ priv->jtag_ctrl->port_desc = pd;
+
+ /* copy information from temporary port descriptor */
+ pd->names_list = tmp_pd->names_list;
+ pd->is_vector = tmp_pd->is_vector;
+ pd->low_idx = tmp_pd->low_idx;
+ pd->high_idx = tmp_pd->high_idx;
+
+ /* and reset temporary port descriptor */
+ tmp_pd->names_list = NULL;
+ tmp_pd->next = NULL;
+ }
+ else
+ urj_bsdl_ftl_set (priv->jtag_ctrl->proc_mode, URJ_ERROR_OUT_OF_MEMORY,
+ "No memory");
+}
+
+static void
+add_elem (urj_vhdl_parser_priv_t *priv, urj_vhdl_elem_t *el)
+{
+ urj_bsdl_jtag_ctrl_t *jc = priv->jtag_ctrl;
+
+ el->next = NULL;
+ if (jc->vhdl_elem_last)
+ jc->vhdl_elem_last->next = el;
+ jc->vhdl_elem_last = el;
+
+ if (!jc->vhdl_elem_first)
+ jc->vhdl_elem_first = el;
+
+ el->line = urj_vhdl_flex_get_lineno (priv->scanner);
+}
+
+#if 0
+static void
+set_attr_bool (urj_vhdl_parser_priv_t *priv, char *name, int value)
+{
+ urj_vhdl_elem_t *el = malloc (sizeof (urj_vhdl_elem_t));
+
+ if (el)
+ {
+ el->type = VET_ATTRIBUTE_BOOL;
+ el->name = name;
+ el->payload.bool = value;
+
+ add_elem (priv, el);
+ }
+ else
+ urj_bsdl_ftl_set (priv->jtag_ctrl->proc_mode, URJ_ERROR_OUT_OF_MEMORY,
+ "No memory");
+}
+#endif
+
+static void
+set_attr_decimal (urj_vhdl_parser_priv_t *priv, char *name, int value)
+{
+ urj_vhdl_elem_t *el = malloc (sizeof (urj_vhdl_elem_t));
+ char *string = malloc (10);
+
+ if (el && string)
+ {
+ el->type = URJ_BSDL_VET_ATTRIBUTE_DECIMAL;
+ el->name = name;
+ snprintf (string, 10, "%d", value);
+ el->payload = string;
+
+ add_elem (priv, el);
+ }
+ else
+ urj_bsdl_ftl_set (priv->jtag_ctrl->proc_mode, URJ_ERROR_OUT_OF_MEMORY,
+ "No memory");
+}
+
+static void
+set_attr_string (urj_vhdl_parser_priv_t *priv, char *name, char *string)
+{
+ urj_vhdl_elem_t *el = malloc (sizeof (urj_vhdl_elem_t));
+
+ /* skip certain attributes */
+ if ((strcasecmp (name, "DESIGN_WARNING") == 0)
+ || (strcasecmp (name, "BOUNDARY_CELLS") == 0)
+ || (strcasecmp (name, "INSTRUCTION_SEQUENCE") == 0)
+ || (strcasecmp (name, "INSTRUCTION_USAGE") == 0)
+ || (strcasecmp (name, "ISC_DESIGN_WARNING") == 0))
+ {
+ free (name);
+ free (string);
+ free (el);
+ return;
+ }
+
+ if (el)
+ {
+ el->type = URJ_BSDL_VET_ATTRIBUTE_STRING;
+ el->name = name;
+ el->payload = string;
+
+ add_elem (priv, el);
+ }
+ else
+ urj_bsdl_ftl_set (priv->jtag_ctrl->proc_mode, URJ_ERROR_OUT_OF_MEMORY,
+ "No memory");
+}
+
+#if 0
+static void
+set_attr_real (urj_vhdl_parser_priv_t *priv, char *name, char *string)
+{
+ urj_vhdl_elem_t *el = malloc (sizeof (urj_vhdl_elem_t));
+
+ if (el)
+ {
+ el->type = VET_ATTRIBUTE_REAL;
+ el->name = name;
+ el->payload.real = string;
+
+ add_elem (priv, el);
+ }
+ else
+ urj_bsdl_ftl_set (priv->jtag_ctrl->proc_mode, URJ_ERROR_OUT_OF_MEMORY,
+ "No memory");
+}
+#endif
+
+#if 0
+static void
+set_attr_const (urj_vhdl_parser_priv_t *priv, char *name, char *string)
+{
+ urj_vhdl_elem_t *el = malloc (sizeof (urj_vhdl_elem_t));
+
+ if (el)
+ {
+ el->type = URJ_BSDL_VET_CONSTANT;
+ el->name = name;
+ el->payload = string;
+
+ add_elem (priv, el);
+ }
+ else
+ urj_bsdl_ftl_set (priv->jtag_ctrl->proc_mode, URJ_ERROR_OUT_OF_MEMORY,
+ "No memory");
+}
+#endif
+
+
+/*
+ Local Variables:
+ mode:C
+ c-default-style:gnu
+ indent-tabs-mode:nil
+ End:
+*/
--- /dev/null
+/*
+ * $Id$
+ *
+ * Original Lex source by Ken Parker, 1990
+ * Extensions and adaptions for UrJTAG by Arnim Laeuger, 2007
+ *
+ */
+
+/*----------------------------------------------------------
+ *
+ * Lex source for BSDL
+ *
+ *----------------------------------------------------------*/
+/* Date: 901003 */
+
+/*
+
+Email header accompanying the original Yacc code:
+ http://www.eda.org/vug_bbs/bsdl.parser
+
+-----------------------------------8<--------------------------------------
+
+Hello All,
+
+This is this first mailing of the BSDL* Version 0.0 parser specifications
+we are sending to people who request it from our publicized E-Mail address;
+
+ bsdl%hpmtlx@hplabs.HP.com
+
+You are free to redistribute this at will, but we feel that it would be
+better if respondents asked for it directly so that their addresses can
+be entered into our list for future mailings and updates.
+
+It would be helpful if you could confirm receipt of this transmission.
+We also would be very interested to hear about your experiences with this
+information and what you are planning to do with BSDL.
+
+Regards,
+
+Ken Parker
+Hewlett-Packard Company
+
+
+*Boundary-Scan Description Language - as documented in:
+
+"A Language for Describing Boundary-Scan Devices", K.P. Parker
+and S. Oresjo, Proceedings 1990 International Test Conference,
+Washington DC, pp 222-234
+
+
+- -----------------cut here---------------------------------------------------
+
+
+901004.0721 Hewlett-Packard Company
+901016.1049 Manufacturing Test Division
+ P.O. Box 301
+ Loveland, Colorado 80537
+ USA
+
+ October 1990
+Hello BSDL Parser Requestor,
+
+ This Electronic Mail reply contains the computer specifications for
+Hewlett-Packard's Version 0.0 BSDL parser. This section of the reply
+explains the contents of the rest of this file.
+
+This file is composed of seven (7) parts:
+
+ 1) How to use this file
+
+ 2) UNIX* Lex source (lexicographical tokenizing rules)
+
+ 3) UNIX* Yacc source (BNF-like syntax description)
+
+ 4) A sample main program to recognize BSDL.
+
+ 5) A BSDL description of the Texas Instruments 74bct8374 that is
+ recognized by the parser, for testing purposes.
+
+ 6) The VHDL package STD_1149_1_1990 needed by this parser.
+
+ 7) [added 901016] Porting experiences to other systems.
+
+
+RECOMMENDATION: Save a copy of this file in archival storage before
+ processing it via the instructions below. This will
+ allow you to recover from errors, and allow you to
+ compare subsequently released data for changes.
+
+DISCLAIMERS:
+
+1. The IEEE 1149.1 Working Group has not endorsed BSDL Version 0.0 and
+ therefore no person may represent it as an IEEE standard or imply that
+ a resulting IEEE standard will be identical to it.
+
+2. The IEEE 1149.1 Working Group recognizes that BSDL Version 0.0 is a
+ well-conceived initiative that is likely to excelerate the creation
+ of tools that support the 1149.1 standard. As such, changes and
+ enhancements will be carefully considered so as not to needlessly
+ disrupt these development efforts. The overriding goal is the
+ ultimate success of the 1149.1 standard.
+
+LEGAL NOTICES:
+
+ Hewlett-Packard Company makes no warranty of any kind with regard to
+ this information, including, but not limited to, the implied
+ waranties of merchantability and fitness for a particular purpose.
+
+ Hewlett-Packard Company shall not be liable for errors contained
+ herein or direct, indirect, special, incidental, or consequential
+ damages in connection with the furnishing, performance, or use of
+ this material.
+
+
+*UNIX is a trademark of AT&T in the USA and other countries.
+
+*/
+
+%option bison-bridge
+%option reentrant
+%option prefix="urj_vhdl_"
+%option outfile="lex.yy.c"
+
+%{
+/* Begin lex input specifications */
+
+#include <stdlib.h>
+#include <ctype.h>
+
+#include <urjtag/jtag.h>
+
+#include "bsdl_sysdep.h"
+
+#include "bsdl_msg.h"
+
+#include "vhdl_bison.h"
+#include "vhdl_parser.h"
+
+#ifdef DMALLOC
+#include "dmalloc.h"
+#endif
+
+#define YY_EXTRA_TYPE urj_bsdl_scan_extra_t *
+
+static char *new_string (urj_bsdl_scan_extra_t *, const char *);
+
+#define BINARY 0
+#define DECIMAL 1
+#define BIN_X 2
+
+%}
+%a 2800
+%e 1200
+%p 4700
+%n 520
+%k 140
+%o 3000
+%START RES BOU REG PAC
+White [ \t\b\r]*
+VHDL_Comment \-\-[^\n]*
+Bin_X_Pattern [0-1X]+
+Digit [0-9]
+Exponent [E][+-]?{Digit}+
+Real_Number {Digit}+[\.]{Digit}+{Exponent}
+Decimal_Number {Digit}+
+Identifier [A-Z][A-Z0-9_]*
+Quoted_String \"[^\"\n]*\"
+Concatenate &
+Single_Quote [\']
+Semicolon ;
+Eol [\n]
+Comma [,]
+Lparen [\(]
+Rparen [\)]
+Colon_Equal \:\=
+Colon [\:]
+Period [\.]
+Box [\<][\>]
+Illegal [^A-Z0-9 \t\b\n\r\"\&\'\*\(\)\[\]\_\:\.\,\;\<\>]
+Entity ENTITY
+Port PORT
+Generic GENERIC
+Use USE
+Attribute ATTRIBUTE
+Is IS
+Of OF
+Constant CONSTANT
+String STRING
+End END
+All ALL
+Physical_Pin_Map PHYSICAL_PIN_MAP
+Pin_Map_String PIN_MAP_STRING
+True TRUE
+False FALSE
+Signal SIGNAL
+Low LOW
+Both BOTH
+Out OUT
+Inout INOUT
+In IN
+Buffer BUFFER
+Linkage LINKAGE
+Bit_Vector BIT_VECTOR
+Bit BIT
+To TO
+Downto DOWNTO
+Package PACKAGE
+Body BODY
+Type TYPE
+Subtype SUBTYPE
+Record RECORD
+Array ARRAY
+Positive POSITIVE
+Range RANGE
+Cell_Info CELL_INFO
+Input INPUT
+Output2 OUTPUT2
+Output3 OUTPUT3
+Control CONTROL
+Controlr CONTROLR
+Internal INTERNAL
+Clock CLOCK
+Observe_Only OBSERVE_ONLY
+Bidir BIDIR
+Bidir_In BIDIR_IN
+Bidir_Out BIDIR_OUT
+Z Z
+Extest EXTEST
+Sample SAMPLE
+Intest INTEST
+Runbist RUNBIST
+Pi PI
+Po PO
+Upd UPD
+Cap CAP
+X X
+Zero ZERO
+One ONE
+Bsdl_Extension BSDL_EXTENSION
+Std_1532_2001 STD_1532_2001
+Std_1532_2002 STD_1532_2002
+%%
+{Entity} {return (ENTITY); }
+{Port} {yyextra->Base = DECIMAL; /* Default number base */
+ return (PORT); }
+{Generic} {yyextra->Base = DECIMAL; return (GENERIC); }
+{Use} {yyextra->Base = DECIMAL; return (USE); }
+{Attribute} {yyextra->Base = DECIMAL; return (ATTRIBUTE); }
+{Is} {return (IS); }
+{Constant} {yyextra->Base = DECIMAL; return (CONSTANT); }
+{String} {return (STRING); }
+{End} {yyextra->Base = DECIMAL;
+ BEGIN INITIAL; /* Turn off start conditions */
+ return (END); }
+{All} {return (ALL); }
+{Of} {return (OF); }
+{Physical_Pin_Map} {return (PHYSICAL_PIN_MAP); }
+{Pin_Map_String} {return (PIN_MAP_STRING); }
+{True} {return (TRUE); }
+{False} {return (FALSE); }
+{Signal} {return (SIGNAL); }
+{Low} {return (LOW); }
+{Both} {return (BOTH); }
+{In} {return (IN); }
+{Out} {return (OUT); }
+{Inout} {return (INOUT); }
+{Buffer} {return (BUFFER); }
+{Linkage} {return (LINKAGE); }
+{Bit} {return (BIT); }
+{Bit_Vector} {return (BIT_VECTOR); }
+{To} {return (TO); }
+{Downto} {return (DOWNTO); }
+{Package} {return (PACKAGE); }
+{Body} {return (BODY); }
+{Type} {return (TYPE); }
+{Subtype} {return (SUBTYPE); }
+{Record} {return (RECORD); }
+{Array} {yyextra->Base = DECIMAL; return (ARRAY); }
+{Positive} {return (POSITIVE); }
+{Range} {return (RANGE); }
+{Cell_Info} {BEGIN PAC; return (CELL_INFO); }
+{Bsdl_Extension} {return (BSDL_EXTENSION); }
+{Std_1532_2001} {return (STD_1532_2001); }
+{Std_1532_2002} {return (STD_1532_2002); }
+<BOU,PAC>{Input} {return (INPUT); }
+<BOU,PAC>{Output2} {return (OUTPUT2); }
+<BOU,PAC>{Output3} {return (OUTPUT3); }
+<BOU,PAC>{Controlr} {return (CONTROLR); }
+<BOU,PAC>{Control} {return (CONTROL); }
+<BOU,PAC>{Internal} {return (INTERNAL); }
+<BOU,PAC>{Clock} {return (CLOCK); }
+<BOU,PAC>{Observe_Only} {return (OBSERVE_ONLY); }
+<BOU>{Bidir} {return (BIDIR); }
+<PAC>{Bidir_In} {return (BIDIR_IN); }
+<PAC>{Bidir_Out} {return (BIDIR_OUT); }
+<PAC>{Extest} {return (EXTEST); }
+<PAC>{Sample} {return (SAMPLE); }
+<PAC>{Intest} {return (INTEST); }
+<PAC>{Runbist} {return (RUNBIST); }
+<PAC>{Pi} {return (PI); }
+<PAC>{Po} {return (PO); }
+<PAC>{Upd} {return (UPD); }
+<PAC>{Cap} {return (CAP); }
+<PAC>{X} {return (X); }
+<PAC>{Zero} {return (ZERO); }
+<PAC>{One} {return (ONE); }
+<BOU>{Z} {return (Z); }
+{Eol} {yylineno++; /* Count lines */}
+{Comma} {return (COMMA); }
+{Lparen} {return (LPAREN);}
+{Rparen} {return (RPAREN);}
+{Period} {return (PERIOD); }
+{Colon} {return (COLON); }
+{Box} {return (BOX); }
+{Single_Quote} {yyextra->Base = BIN_X; return (SINGLE_QUOTE); }
+{Colon_Equal} {return (COLON_EQUAL); }
+{White} { /* Do Nothing on White Space */ }
+{VHDL_Comment} { /* Do Nothing on Comments */ }
+{Bin_X_Pattern} {if (yyextra->Base != BIN_X) REJECT;
+ yylval->str = new_string (yyextra, yytext);
+ return (BIN_X_PATTERN);}
+{Identifier} {yylval->str = new_string (yyextra, yytext);
+ return (IDENTIFIER); }
+{Quoted_String} {yylval->str = new_string (yyextra, yytext);
+ return (QUOTED_STRING); }
+{Decimal_Number} {if (yyextra->Base != DECIMAL) REJECT;
+ yylval->integer = atoi ((char *)yytext);
+ return (DECIMAL_NUMBER);}
+{Real_Number} {yylval->str = new_string (yyextra, yytext);
+ return (REAL_NUMBER);}
+{Concatenate} {return (CONCATENATE);}
+{Semicolon} {return (SEMICOLON);}
+{Illegal} {urj_bsdl_err_set (yyextra->proc_mode, URJ_ERROR_BSDL_VHDL,
+ "Illegal character %c (/%03o) at line %d:",
+ (char)yytext[yyleng-1], (int)yytext[yyleng-1],
+ yylineno);
+ yyextra->Compile_Errors++;
+ return (ILLEGAL); /* Will cause syntax error */}
+<<EOF>> {
+ yypop_buffer_state (yyscanner);
+ if (!YY_CURRENT_BUFFER)
+ yyterminate();
+}
+
+%%
+
+/*****************************************************************************
+ * void *urj_vhdl_flex_init( FILE *f, int mode )
+ *
+ * Initializes the scanner and storage elements extra data structure.
+ *
+ * Parameters
+ * f : descriptor of file for scanning
+ * proc_mode : processing mode, consisting of BSDL_MODE_* bits
+ *
+ * Returns
+ * pointer to newly initialized scanner structure
+ ****************************************************************************/
+void *
+urj_vhdl_flex_init (FILE *f, int proc_mode)
+{
+ urj_bsdl_scan_extra_t *extra;
+ yyscan_t scanner;
+
+ /* get our scanner structure */
+ if (yylex_init (&scanner) != 0)
+ {
+ urj_bsdl_ftl_set (proc_mode, URJ_ERROR_BSDL_VHDL,
+ "Scanner could not be initialized");
+ return NULL;
+ }
+ yyset_in (f, scanner);
+
+ if (!(extra = malloc (sizeof (urj_bsdl_scan_extra_t))))
+ {
+ urj_bsdl_ftl_set (proc_mode, URJ_ERROR_OUT_OF_MEMORY,
+ "No memory");
+ yylex_destroy (scanner);
+ return NULL;
+ }
+
+ extra->proc_mode = proc_mode;
+ extra->Compile_Errors = 0;
+ extra->Base = DECIMAL;
+
+ yyset_extra (extra, scanner);
+
+ return scanner;
+}
+
+
+/*****************************************************************************
+ * void urj_vhdl_flex_deinit( void *scanner )
+ *
+ * Deinitializes the scanner and closes the input file.
+ *
+ * Parameters
+ * scanner : pointer to scanner definition structure
+ *
+ * Returns
+ * void
+ ****************************************************************************/
+void
+urj_vhdl_flex_deinit (void *scanner)
+{
+ if (yyget_in (scanner))
+ {
+ /* file might still be open so close it in any case
+ e.g. when a compile error occured and the parser didn't hit EOF/yywrap() */
+ fclose (yyget_in (scanner));
+ yyset_in (NULL, scanner);
+ }
+ free (yyget_extra (scanner));
+ yylex_destroy (scanner);
+}
+
+
+/*****************************************************************************
+ * void yywrap( yyscan_t scanner )
+ *
+ * Closes the input file upon EOF condition.
+ *
+ * Parameters
+ * scanner : pointer to scanner definition structure
+ *
+ * Returns
+ * 1
+ ****************************************************************************/
+int
+yywrap (yyscan_t scanner)
+{
+ if (yyget_in (scanner))
+ {
+ fclose (yyget_in (scanner));
+ yyset_in (NULL, scanner);
+ }
+ return 1;
+}
+
+
+/*****************************************************************************
+ * char *new_string( urj_bsdl_scan_extra_t * extra, const char *str )
+ *
+ * Allocates memory for a string and copies the contents of *str.
+ *
+ * Parameters
+ * extra : pointer to extra data structure
+ * str : pointer to string to be duplicated
+ *
+ * Returns
+ * pointer to allocated and initialized string memory
+ ****************************************************************************/
+static char *
+new_string (urj_bsdl_scan_extra_t *extra, const char *str)
+{
+ char *n_str;
+ size_t n_str_size;
+
+ n_str_size = strlen (str) + 1;
+ if ((n_str = malloc (n_str_size)))
+ {
+ strncpy (n_str, str, n_str_size - 1);
+ n_str[n_str_size - 1] = '\0'; /* set very last element to EOS */
+ }
+ else
+ urj_bsdl_ftl_set (extra->proc_mode, URJ_ERROR_OUT_OF_MEMORY,
+ "No memory");
+
+ return n_str;
+}
+
+
+/*****************************************************************************
+ * void urj_vhdl_flex_switch_file( yyscan_t scanner, char *filename )
+ *
+ * Selects the specified file for further scanning.
+ *
+ * Parameters
+ * scanner : pointer to scanner definition structure
+ * filename : name of the new file to be scanned
+ *
+ * Returns
+ * void
+ ****************************************************************************/
+void
+urj_vhdl_flex_switch_file (yyscan_t scanner, char *filename)
+{
+ urj_bsdl_scan_extra_t *extra;
+ FILE *f;
+ char *s;
+
+ /* convert filename to all upper case */
+ s = filename;
+ while (*s)
+ {
+ if (islower (*s))
+ *s = toupper (*s);
+ s++;
+ }
+
+ extra = yyget_extra (scanner);
+
+ /* file in current directory has precedence */
+ f = fopen (filename, "r");
+ if (!f)
+ {
+ const char *db_path = urj_get_data_dir ();
+ char *db_file;
+
+ /* @@@@ RFHH handle malloc failure */
+ if ((db_file = malloc (strlen (db_path) + 1 + /* "/" */
+ 4 + /* "bsdl" */
+ 1 + /* "/" */
+ strlen (filename) + 1)))
+ {
+ strcpy (db_file, db_path);
+ strcat (db_file, "/");
+ strcat (db_file, "bsdl");
+ strcat (db_file, "/");
+ strcat (db_file, filename);
+ f = fopen (db_file, "r");
+
+ if (!f)
+ urj_bsdl_ftl_set (extra->proc_mode, URJ_ERROR_IO,
+ "Cannot open file %s or %s", filename,
+ db_file);
+ free (db_file);
+ if (!f)
+ return;
+ }
+ }
+
+ yypush_buffer_state (yy_create_buffer (f, YY_BUF_SIZE, scanner), scanner);
+ yyset_lineno (1, scanner);
+}
+
+
+/*****************************************************************************
+ * int urj_vhdl_flex_get_compile_errors( yyscan_t scanner )
+ *
+ * Retrieves the accumulated number of compile errors encountered so far.
+ *
+ * Parameters
+ * scanner : pointer to scanner definition structure
+ *
+ * Returns
+ * number of compile errors
+ ****************************************************************************/
+int
+urj_vhdl_flex_get_compile_errors (yyscan_t scanner)
+{
+ urj_bsdl_scan_extra_t *extra = yyget_extra (scanner);
+ return extra->Compile_Errors;
+}
+
+
+/*****************************************************************************
+ * void urj_vhdl_flex_set_compile_errors( int n, yyscan_t scanner )
+ *
+ * Sets the number of compile errors to n.
+ *
+ * Parameters
+ * n : preset number
+ * scanner : pointer to scanner definition structure
+ *
+ * Returns
+ * void
+ ****************************************************************************/
+static void
+urj_vhdl_flex_set_compile_errors (int n, yyscan_t scanner)
+{
+ urj_bsdl_scan_extra_t *extra = yyget_extra (scanner);
+ extra->Compile_Errors = n;
+}
+
+
+/*****************************************************************************
+ * int urj_vhdl_flex_postinc_compile_errors( yyscan_t scanner )
+ *
+ * Increments the number of compile errors.
+ *
+ * Parameters
+ * scanner : pointer to scanner definition structure
+ *
+ * Returns
+ * number of compile errors before increment
+ ****************************************************************************/
+int
+urj_vhdl_flex_postinc_compile_errors (yyscan_t scanner)
+{
+ int errors = urj_vhdl_flex_get_compile_errors (scanner);
+
+ urj_vhdl_flex_set_compile_errors (errors + 1, scanner);
+ return errors;
+}
+
+
+/*****************************************************************************
+ * int urj_vhdl_flex_get_lineno( yyscan_t scanner )
+ *
+ * Returns the current line number in the scanned file.
+ *
+ * Parameters
+ * scanner : pointer to scanner definition structure
+ *
+ * Returns
+ * current line number
+ ****************************************************************************/
+int
+urj_vhdl_flex_get_lineno (yyscan_t scanner)
+{
+ return yyget_lineno (scanner);
+}
+
+
+/*
+ Local Variables:
+ mode:C
+ c-default-style:gnu
+ indent-tabs-mode:nil
+ End:
+*/
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2008, Arnim Laeuger
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Arnim Laeuger <arniml@users.sourceforge.net>, 2008.
+ *
+ */
+
+#ifndef URJ_VHDL_PARSER_H
+#define URJ_VHDL_PARSER_H
+
+#include "bsdl_types.h"
+
+/* VHDL lexer declarations */
+void *urj_vhdl_flex_init (FILE *, int);
+void urj_vhdl_flex_deinit (void *);
+void urj_vhdl_flex_switch_file (void *, char *);
+int urj_vhdl_flex_get_compile_errors (void *);
+int urj_vhdl_flex_postinc_compile_errors (void *);
+int urj_vhdl_flex_get_lineno (void *);
+
+/* VHDL parser declarations */
+urj_vhdl_parser_priv_t *urj_vhdl_parser_init (FILE *,
+ urj_bsdl_jtag_ctrl_t *);
+void urj_vhdl_parser_deinit (urj_vhdl_parser_priv_t *);
+int urj_vhdl_parse (urj_vhdl_parser_priv_t *);
+
+#endif /* URJ_VHDL_PARSER_H */
--- /dev/null
+.deps
+.libs
+Makefile
+Makefile.in
--- /dev/null
+#
+# $Id$
+#
+# Copyright (C) 2003 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Marcel Telka <marcel@telka.sk>, 2003.
+#
+
+include $(top_srcdir)/Makefile.rules
+
+noinst_LTLIBRARIES = libbus.la
+
+libbus_la_SOURCES = \
+ buses.c \
+ buses.h \
+ generic_bus.c \
+ generic_bus.h \
+ pxa2x0_mc.h \
+ readmem.c \
+ writemem.c
+
+if ENABLE_BUS_AU1500
+libbus_la_SOURCES += au1500.c
+endif
+
+if ENABLE_BUS_AVR32
+libbus_la_SOURCES += avr32.c
+endif
+
+if ENABLE_BUS_BCM1250
+libbus_la_SOURCES += bcm1250.c
+endif
+
+if ENABLE_BUS_BF526_EZKIT
+libbus_la_SOURCES += bf537_stamp.c
+else
+if ENABLE_BUS_BF527_EZKIT
+libbus_la_SOURCES += bf537_stamp.c
+else
+if ENABLE_BUS_BF537_STAMP
+libbus_la_SOURCES += bf537_stamp.c
+else
+if ENABLE_BUS_BF537_EZKIT
+libbus_la_SOURCES += bf537_stamp.c
+else
+if ENABLE_BUS_BF538F_EZKIT
+libbus_la_SOURCES += bf537_stamp.c
+endif
+endif
+endif
+endif
+endif
+
+if ENABLE_BUS_BF533_STAMP
+libbus_la_SOURCES += bf533_stamp.c
+endif
+
+if ENABLE_BUS_BF533_EZKIT
+libbus_la_SOURCES += bf533_ezkit.c
+endif
+
+if ENABLE_BUS_BF548_EZKIT
+libbus_la_SOURCES += bf548_ezkit.c
+endif
+
+if ENABLE_BUS_BF561_EZKIT
+libbus_la_SOURCES += bf561_ezkit.c
+endif
+
+if ENABLE_BUS_BSCOACH
+libbus_la_SOURCES += bscoach.c
+endif
+
+if ENABLE_BUS_EJTAG
+libbus_la_SOURCES += ejtag.c
+endif
+
+if ENABLE_BUS_EJTAG_DMA
+libbus_la_SOURCES += ejtag_dma.c
+endif
+
+if ENABLE_BUS_FJMEM
+libbus_la_SOURCES += fjmem.c
+endif
+
+if ENABLE_BUS_H7202
+libbus_la_SOURCES += h7202.c
+endif
+
+if ENABLE_BUS_IXP425
+libbus_la_SOURCES += ixp425.c
+endif
+
+if ENABLE_BUS_IXP435
+libbus_la_SOURCES += ixp435.c
+endif
+
+if ENABLE_BUS_JOPCYC
+libbus_la_SOURCES += jopcyc.c
+endif
+
+if ENABLE_BUS_LH7A400
+libbus_la_SOURCES += lh7a400.c
+endif
+
+if ENABLE_BUS_MPC5200
+libbus_la_SOURCES += mpc5200.c
+endif
+
+if ENABLE_BUS_MPC824X
+libbus_la_SOURCES += mpc824x.c
+endif
+
+if ENABLE_BUS_PPC405EP
+libbus_la_SOURCES += ppc405ep.c
+endif
+
+if ENABLE_BUS_PPC440GX_EBC8
+libbus_la_SOURCES += ppc440gx_ebc8.c
+endif
+
+if ENABLE_BUS_PROTOTYPE
+libbus_la_SOURCES += prototype.c
+endif
+
+if ENABLE_BUS_PXA2X0
+libbus_la_SOURCES += pxa2x0.c
+else
+if ENABLE_BUS_PXA27X
+libbus_la_SOURCES += pxa2x0.c
+endif
+endif
+
+if ENABLE_BUS_S3C4510
+libbus_la_SOURCES += s3c4510x.c
+endif
+
+if ENABLE_BUS_SA1110
+libbus_la_SOURCES += sa1110.c
+endif
+
+if ENABLE_BUS_SH7727
+libbus_la_SOURCES += sh7727.c
+endif
+
+if ENABLE_BUS_SH7750R
+libbus_la_SOURCES += sh7750r.c
+endif
+
+if ENABLE_BUS_SH7751R
+libbus_la_SOURCES += sh7751r.c
+endif
+
+if ENABLE_BUS_SHARC_21065L
+libbus_la_SOURCES += sharc21065l.c
+endif
+
+if ENABLE_BUS_SLSUP3
+libbus_la_SOURCES += slsup3.c
+endif
+
+if ENABLE_BUS_TX4925
+libbus_la_SOURCES += tx4925.c
+endif
+
+if ENABLE_BUS_ZEFANT_XS3
+libbus_la_SOURCES += zefant-xs3.c
+endif
+
+AM_CFLAGS = $(WARNINGCFLAGS)
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2003 BLXCPU co. Ltd.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by ZHANG WEI <zwblue@sohu.com>, 2003
+ *
+ * Documentation:
+ * [1] AMD, "AMD Alchemy Solutions AU1500 Processor Data Book -
+ * Preliminary Information", June 2003, Publication ID: 30361B
+ *
+ */
+
+
+#include <sysdep.h>
+
+#include <string.h>
+#include <stdint.h>
+#include <stdlib.h>
+
+#include <urjtag/part.h>
+#include <urjtag/bus.h>
+#include <urjtag/chain.h>
+#include <urjtag/bssignal.h>
+
+#include "buses.h"
+#include "generic_bus.h"
+
+typedef struct
+{
+ urj_part_signal_t *rad[32];
+ urj_part_signal_t *nrcs[4];
+ urj_part_signal_t *nrwe;
+ urj_part_signal_t *nroe;
+ urj_part_signal_t *rd[32];
+} bus_params_t;
+
+#define RAD ((bus_params_t *) bus->params)->rad
+#define nRCS ((bus_params_t *) bus->params)->nrcs
+#define nRWE ((bus_params_t *) bus->params)->nrwe
+#define nROE ((bus_params_t *) bus->params)->nroe
+#define RD ((bus_params_t *) bus->params)->rd
+
+/**
+ * bus->driver->(*new_bus)
+ *
+ */
+static urj_bus_t *
+au1500_bus_new (urj_chain_t *chain, const urj_bus_driver_t *driver,
+ const urj_param_t *cmd_params[])
+{
+ urj_bus_t *bus;
+ urj_part_t *part;
+ char buff[10];
+ int i;
+ int failed = 0;
+
+ bus = urj_bus_generic_new (chain, driver, sizeof (bus_params_t));
+ if (bus == NULL)
+ return NULL;
+ part = bus->part;
+
+ for (i = 0; i < 32; i++)
+ {
+ sprintf (buff, "RAD%d", i);
+ failed |= urj_bus_generic_attach_sig (part, &(RAD[i]), buff);
+ }
+
+ for (i = 0; i < 4; i++)
+ {
+ sprintf (buff, "RCE_N%d", i);
+ failed |= urj_bus_generic_attach_sig (part, &(nRCS[i]), buff);
+ }
+
+
+ failed |= urj_bus_generic_attach_sig (part, &(nRWE), "RWE_N");
+
+ failed |= urj_bus_generic_attach_sig (part, &(nROE), "ROE_N");
+
+ for (i = 0; i < 32; i++)
+ {
+ sprintf (buff, "RD%d", i);
+ failed |= urj_bus_generic_attach_sig (part, &(RD[i]), buff);
+ }
+
+ if (failed)
+ {
+ free (bus->params);
+ free (bus);
+ return NULL;
+ }
+
+ return bus;
+
+}
+
+/**
+ * bus->driver->(*printinfo)
+ *
+ */
+static void
+au1500_bus_printinfo (urj_log_level_t ll, urj_bus_t *bus)
+{
+ int i;
+
+ for (i = 0; i < bus->chain->parts->len; i++)
+ if (bus->part == bus->chain->parts->parts[i])
+ break;
+ urj_log (ll, _("AU1500 compatible bus driver via BSR (JTAG part No. %d)\n"),
+ i);
+}
+
+/**
+ * bus->driver->(*area)
+ *
+ */
+static int
+au1500_bus_area (urj_bus_t *bus, uint32_t addr, urj_bus_area_t *area)
+{
+ area->description = NULL;
+ area->start = UINT32_C (0x00000000);
+ area->length = UINT64_C (0x00100000000);
+// area->width = 16;
+ area->width =
+ urj_part_get_signal (bus->part,
+ urj_part_find_signal (bus->part,
+ "ROMSIZ")) ? 16 : 32;
+
+
+ return URJ_STATUS_OK;
+
+}
+
+static void
+setup_address (urj_bus_t *bus, uint32_t a)
+{
+ int i;
+ urj_part_t *p = bus->part;
+
+ for (i = 0; i < 32; i++)
+ urj_part_set_signal (p, RAD[i], 1, (a >> i) & 1);
+}
+
+static void
+set_data_in (urj_bus_t *bus)
+{
+ int i;
+ urj_part_t *p = bus->part;
+ urj_bus_area_t area;
+
+ au1500_bus_area (bus, 0, &area);
+
+ for (i = 0; i < area.width; i++)
+ urj_part_set_signal (p, RD[i], 0, 0);
+
+}
+
+static uint32_t
+get_data_out (urj_bus_t *bus)
+{
+ int i;
+ urj_part_t *p = bus->part;
+ urj_bus_area_t area;
+ uint32_t d = 0;
+
+ au1500_bus_area (bus, 0, &area);
+
+ for (i = 0; i < area.width; i++)
+ d |= (uint32_t) (urj_part_get_signal (p, RD[i]) << i);
+
+ return d;
+}
+
+static void
+setup_data (urj_bus_t *bus, uint32_t d)
+{
+ int i;
+ urj_part_t *p = bus->part;
+ urj_bus_area_t area;
+
+ au1500_bus_area (bus, 0, &area);
+
+ for (i = 0; i < area.width; i++)
+ urj_part_set_signal (p, RD[i], 1, (d >> i) & 1);
+}
+
+/**
+ * bus->driver->(*read_start)
+ *
+ */
+static int
+au1500_bus_read_start (urj_bus_t *bus, uint32_t adr)
+{
+ urj_part_t *p = bus->part;
+ urj_chain_t *chain = bus->chain;
+
+ urj_part_set_signal (p, nRCS[0], 1, 0);
+ urj_part_set_signal (p, nRCS[1], 1, 1);
+ urj_part_set_signal (p, nRCS[2], 1, 1);
+ urj_part_set_signal (p, nRCS[3], 1, 1);
+ urj_part_set_signal (p, nRWE, 1, 1);
+ urj_part_set_signal (p, nROE, 1, 0);
+
+ setup_address (bus, adr);
+ set_data_in (bus);
+
+ urj_tap_chain_shift_data_registers (chain, 0);
+
+ return URJ_STATUS_OK;
+}
+
+/**
+ * bus->driver->(*read_next)
+ *
+ */
+static uint32_t
+au1500_bus_read_next (urj_bus_t *bus, uint32_t adr)
+{
+ urj_chain_t *chain = bus->chain;
+
+ setup_address (bus, adr);
+ urj_tap_chain_shift_data_registers (chain, 1);
+
+ return get_data_out (bus);
+}
+
+/**
+ * bus->driver->(*read_end)
+ *
+ */
+static uint32_t
+au1500_bus_read_end (urj_bus_t *bus)
+{
+ urj_part_t *p = bus->part;
+ urj_chain_t *chain = bus->chain;
+
+ urj_part_set_signal (p, nRCS[0], 1, 1);
+ urj_part_set_signal (p, nRCS[1], 1, 1);
+ urj_part_set_signal (p, nRCS[2], 1, 1);
+ urj_part_set_signal (p, nRCS[3], 1, 1);
+ urj_part_set_signal (p, nRWE, 1, 1);
+ urj_part_set_signal (p, nROE, 1, 1);
+
+ urj_tap_chain_shift_data_registers (chain, 1);
+
+ return get_data_out (bus);
+}
+
+/**
+ * bus->driver->(*write)
+ *
+ */
+static void
+au1500_bus_write (urj_bus_t *bus, uint32_t adr, uint32_t data)
+{
+ urj_part_t *p = bus->part;
+ urj_chain_t *chain = bus->chain;
+
+ urj_part_set_signal (p, nRCS[0], 1, 0);
+ urj_part_set_signal (p, nRCS[1], 1, 1);
+ urj_part_set_signal (p, nRCS[2], 1, 1);
+ urj_part_set_signal (p, nRCS[3], 1, 1);
+ urj_part_set_signal (p, nRWE, 1, 1);
+ urj_part_set_signal (p, nROE, 1, 1);
+
+ setup_address (bus, adr);
+ setup_data (bus, data);
+
+ urj_tap_chain_shift_data_registers (chain, 0);
+
+ urj_part_set_signal (p, nRWE, 1, 0);
+ urj_tap_chain_shift_data_registers (chain, 0);
+
+ urj_part_set_signal (p, nRWE, 1, 1);
+ urj_part_set_signal (p, nROE, 1, 1);
+ urj_part_set_signal (p, nRCS[0], 1, 1);
+ urj_part_set_signal (p, nRCS[1], 1, 1);
+ urj_part_set_signal (p, nRCS[2], 1, 1);
+ urj_part_set_signal (p, nRCS[3], 1, 1);
+
+ urj_tap_chain_shift_data_registers (chain, 0);
+}
+
+const urj_bus_driver_t urj_bus_au1500_bus = {
+ "au1500",
+ N_("AU1500 BUS Driver via BSR"),
+ au1500_bus_new,
+ urj_bus_generic_free,
+ au1500_bus_printinfo,
+ urj_bus_generic_prepare_extest,
+ au1500_bus_area,
+ au1500_bus_read_start,
+ au1500_bus_read_next,
+ au1500_bus_read_end,
+ urj_bus_generic_read,
+ au1500_bus_write,
+ urj_bus_generic_no_init
+};
--- /dev/null
+/*
+ * $Id$
+ *
+ * AVR32 multi-mode bus driver
+ *
+ * Copyright (c) 2008 Gabor Juhos <juhosg@openwrt.org>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Documentation:
+ * [1] Atmel Corporation, "AT32AP7000 - High Performance, Low Power
+ * AVR(R)32 32-Bit Microcontroller", Rev. 32003K-AVR32-10/07
+ */
+
+#include <sysdep.h>
+
+#include <stdlib.h>
+#include <stdint.h>
+#include <string.h>
+#include <limits.h>
+
+#include <urjtag/part.h>
+#include <urjtag/part_instruction.h>
+#include <urjtag/bus.h>
+#include <urjtag/chain.h>
+#include <urjtag/bssignal.h>
+#include <urjtag/data_register.h>
+#include <urjtag/tap.h>
+#include <urjtag/tap_register.h>
+
+#include "buses.h"
+#include "generic_bus.h"
+
+typedef struct
+{
+ unsigned int mode;
+
+ unsigned int slave;
+ uint32_t addr_mask;
+
+ uint32_t rwcs_rd;
+ uint32_t rwcs_wr;
+} bus_params_t;
+
+#define BUS_MODE_OCD 0
+#define BUS_MODE_HSBC 1
+#define BUS_MODE_HSBU 2
+#define BUS_MODE_x8 3
+#define BUS_MODE_x16 4
+#define BUS_MODE_x32 5
+#define BUS_MODE_ERROR UINT_MAX
+
+#define BP ((bus_params_t *) bus->params)
+#define SLAVE (BP->slave)
+#define MODE (BP->mode)
+#define ADDR_MASK (BP->addr_mask)
+#define RWCS_RD (BP->rwcs_rd)
+#define RWCS_WR (BP->rwcs_wr)
+
+/* ------------------------------------------------------------------------- */
+#define SAB_SLAVE_OCD 1
+#define SAB_SLAVE_HSB_CACHED 4
+#define SAB_SLAVE_HSB_UNCACHED 5
+
+#define ACCESS_MODE_WRITE 0
+#define ACCESS_MODE_READ 1
+
+#define ACCESS_STATUS_OK 0
+#define ACCESS_STATUS_ERR -1
+
+#define SAB_OCD_AREA_SIZE UINT64_C(0x1000)
+#define SAB_OCD_ADDR_MASK 0xfff
+#define SAB_HSB_AREA_SIZE UINT64_C(0x100000000)
+#define SAB_HSB_ADDR_MASK 0xffffffff
+
+/* OCD register addresses */
+#define OCD_REG_RWCS 0x1c
+#define OCD_REG_RWA 0x24
+#define OCD_REG_RWD 0x28
+
+/* OCD RWCS register definitions */
+#define OCD_RWCS_AC 0x80000000 /* start access */
+#define OCD_RWCS_SZ32 0x10000000 /* word access */
+#define OCD_RWCS_SZ16 0x08000000 /* half-word access */
+#define OCD_RWCS_SZ8 0x00000000 /* byte access */
+#define OCD_RWCS_RW 0x40000000 /* access mode 0:read, 1: write */
+#define OCD_RWCS_CNT_S 2
+#define OCD_RWCS_ERR 0x00000002 /* last access generated and error */
+#define OCD_RWCS_DV 0x00000001 /* data is valid */
+
+/* shorthands */
+#define OCD_RWCS_READONE (OCD_RWCS_AC | (1 << OCD_RWCS_CNT_S))
+#define OCD_RWCS_WRITEONE (OCD_RWCS_READONE | OCD_RWCS_RW)
+#define OCD_RWCS_READ8 (OCD_RWCS_READONE | OCD_RWCS_SZ8)
+#define OCD_RWCS_WRITE8 (OCD_RWCS_WRITEONE | OCD_RWCS_SZ8)
+#define OCD_RWCS_READ16 (OCD_RWCS_READONE | OCD_RWCS_SZ16)
+#define OCD_RWCS_WRITE16 (OCD_RWCS_WRITEONE | OCD_RWCS_SZ16)
+#define OCD_RWCS_READ32 (OCD_RWCS_READONE | OCD_RWCS_SZ32)
+#define OCD_RWCS_WRITE32 (OCD_RWCS_WRITEONE | OCD_RWCS_SZ32)
+
+#define DBG_BASIC 0x0001
+#define DBG_SHIFT 0x0002
+#define DBG_TRACE 0x8000
+
+#define DBG_ALL 0xffff
+
+#define DBG_LEVEL 0
+
+#define DBG(t, f, ...) \
+ do { \
+ if (DBG_LEVEL & (t)) \
+ printf( f, ## __VA_ARGS__ ); \
+ } while (0)
+
+#define TRACE_ENTER() DBG(DBG_TRACE, ">>> %s", __FUNCTION__ )
+#define TRACE_EXIT() DBG(DBG_TRACE, "<<< %s", __FUNCTION__ )
+
+/* ------------------------------------------------------------------------- */
+
+static inline void
+register_set_bit (urj_tap_register_t *tr, unsigned int bitno,
+ unsigned int val)
+{
+ tr->data[bitno] = (val) ? 1 : 0;
+}
+
+static inline int
+register_get_bit (urj_tap_register_t *tr, unsigned int bitno)
+{
+ return (tr->data[bitno] & 1) ? 1 : 0;
+}
+
+static inline void
+shift_instr (urj_bus_t *bus, unsigned int bit)
+{
+ urj_tap_register_t *r = bus->part->active_instruction->out;
+
+ do
+ {
+ DBG (DBG_SHIFT, _("%s: instr=%s\n"), __FUNCTION__,
+ urj_tap_register_get_string (bus->part->active_instruction->
+ value));
+ urj_tap_chain_shift_instructions_mode (bus->chain, 1, 1,
+ URJ_CHAIN_EXITMODE_IDLE);
+ DBG (DBG_SHIFT, _("%s: ret=%s\n"), __FUNCTION__,
+ urj_tap_register_get_string (r));
+ /* TODO: add timeout checking */
+ }
+ while (register_get_bit (r, bit));
+}
+
+static inline void
+shift_data (urj_bus_t *bus, unsigned int bit)
+{
+ urj_data_register_t *dr = bus->part->active_instruction->data_register;
+
+ do
+ {
+ DBG (DBG_SHIFT, _("%s: data=%s\n"), __FUNCTION__,
+ urj_tap_register_get_string (dr->in));
+ urj_tap_chain_shift_data_registers (bus->chain, 1);
+ DBG (DBG_SHIFT, _("%s: data out=%s\n"), __FUNCTION__,
+ urj_tap_register_get_string (dr->out));
+ /* TODO: add timeout checking */
+ }
+ while (register_get_bit (dr->out, bit));
+}
+
+/* ------------------------------------------------------------------------- */
+
+static void
+mwa_scan_in_instr (urj_bus_t *bus)
+{
+ shift_instr (bus, 2);
+}
+
+static void
+mwa_scan_in_addr (urj_bus_t *bus, unsigned int slave, uint32_t addr, int mode)
+{
+ urj_tap_register_t *r = bus->part->active_instruction->data_register->in;
+ int i;
+
+ DBG (DBG_BASIC, _("%s: slave=%01x, addr=%08lx, %s\n"),
+ __FUNCTION__, slave,
+ (long unsigned) addr,
+ (mode == ACCESS_MODE_READ) ? "READ" : "WRITE");
+
+ /* set slave bits */
+ for (i = 0; i < 4; i++)
+ register_set_bit (r, 31 + i, slave & (1 << i));
+
+ /* set address bits */
+ addr >>= 2;
+ for (i = 0; i < 30; i++)
+ register_set_bit (r, 1 + i, addr & (1 << i));
+
+ /* set access mode */
+ register_set_bit (r, 0, mode);
+
+ shift_data (bus, 32);
+}
+
+static void
+mwa_scan_in_data (urj_bus_t *bus, uint32_t data)
+{
+ urj_tap_register_t *r = bus->part->active_instruction->data_register->in;
+ int i;
+
+ DBG (DBG_BASIC, _("%s: data=%08lx\n"), __FUNCTION__,
+ (long unsigned) data);
+
+ register_set_bit (r, 0, 0);
+ register_set_bit (r, 1, 0);
+ register_set_bit (r, 2, 0);
+
+ for (i = 0; i < 32; i++)
+ register_set_bit (r, 3 + i, data & (1 << i));
+
+ shift_data (bus, 0);
+}
+
+static void
+mwa_scan_out_data (urj_bus_t *bus, uint32_t *pdata)
+{
+ urj_tap_register_t *r = bus->part->active_instruction->data_register->out;
+ uint32_t data;
+ int i;
+
+ shift_data (bus, 32);
+
+ data = 0;
+ for (i = 0; i < 32; i++)
+ data |= register_get_bit (r, i) << i;
+
+ DBG (DBG_BASIC, _("%s: data=%08lx\n"), __FUNCTION__,
+ (long unsigned) data);
+
+ *pdata = data;
+}
+
+static inline void
+mwa_read_word (urj_bus_t *bus, unsigned int slave, uint32_t addr,
+ uint32_t *data)
+{
+ mwa_scan_in_instr (bus);
+ mwa_scan_in_addr (bus, slave, addr, ACCESS_MODE_READ);
+ mwa_scan_out_data (bus, data);
+}
+
+static inline void
+mwa_write_word (urj_bus_t *bus, unsigned int slave, uint32_t addr,
+ uint32_t data)
+{
+ mwa_scan_in_instr (bus);
+ mwa_scan_in_addr (bus, slave, addr, ACCESS_MODE_WRITE);
+ mwa_scan_in_data (bus, data);
+}
+
+/* ------------------------------------------------------------------------- */
+
+static void
+nexus_access_start (urj_bus_t *bus)
+{
+ shift_instr (bus, 2);
+}
+
+static void
+nexus_access_end (urj_bus_t *bus)
+{
+ urj_tap_reset_bypass (bus->chain);
+}
+
+static void
+nexus_access_set_addr (urj_bus_t *bus, uint32_t addr, int mode)
+{
+ urj_tap_register_t *r = bus->part->active_instruction->data_register->in;
+ int i;
+
+ DBG (DBG_BASIC, _("%s: addr=%08lx, mode=%s\n"), __FUNCTION__,
+ (long unsigned) addr,
+ (mode == ACCESS_MODE_READ) ? "READ" : "WRITE");
+
+ urj_tap_register_fill (r, 0);
+
+ /* set address bits */
+ addr >>= 2;
+ for (i = 0; i < 7; i++)
+ register_set_bit (r, 27 + i, addr & (1 << i));
+
+ /* set access mode */
+ register_set_bit (r, 26, mode);
+
+ shift_data (bus, 32);
+}
+
+static void
+nexus_access_read_data (urj_bus_t *bus, uint32_t *pdata)
+{
+ urj_tap_register_t *r = bus->part->active_instruction->data_register->out;
+ uint32_t data;
+ int i;
+
+ shift_data (bus, 32);
+
+ data = 0;
+ for (i = 0; i < 32; i++)
+ data |= register_get_bit (r, i) << i;
+
+ DBG (DBG_BASIC, _("%s: data=%08lx\n"), __FUNCTION__,
+ (long unsigned) data);
+
+ *pdata = data;
+}
+
+static void
+nexus_access_write_data (urj_bus_t *bus, uint32_t data)
+{
+ urj_tap_register_t *r = bus->part->active_instruction->data_register->in;
+ int i;
+
+ DBG (DBG_BASIC, _("%s: data=%08lx\n"), __FUNCTION__,
+ (long unsigned) data);
+
+ register_set_bit (r, 0, 0);
+ register_set_bit (r, 1, 0);
+
+ for (i = 0; i < 32; i++)
+ register_set_bit (r, 2 + i, data & (1 << i));
+
+ shift_data (bus, 0);
+}
+
+static inline void
+nexus_reg_read (urj_bus_t *bus, uint32_t reg, uint32_t *data)
+{
+ nexus_access_set_addr (bus, reg, ACCESS_MODE_READ);
+ nexus_access_read_data (bus, data);
+}
+
+static inline void
+nexus_reg_write (urj_bus_t *bus, uint32_t reg, uint32_t data)
+{
+ nexus_access_set_addr (bus, reg, ACCESS_MODE_WRITE);
+ nexus_access_write_data (bus, data);
+}
+
+/* ------------------------------------------------------------------------- */
+
+static void
+nexus_memacc_set_addr (urj_bus_t *bus, uint32_t addr, uint32_t rwcs)
+{
+ nexus_reg_write (bus, OCD_REG_RWA, addr);
+ nexus_reg_write (bus, OCD_REG_RWCS, rwcs);
+}
+
+static int
+nexus_memacc_read (urj_bus_t *bus, uint32_t *data)
+{
+ uint32_t status;
+ int ret;
+
+ do
+ {
+ nexus_reg_read (bus, OCD_REG_RWCS, &status);
+ status &= (OCD_RWCS_ERR | OCD_RWCS_DV);
+ /* TODO: add timeout checking */
+ }
+ while (status == 0);
+
+ DBG (DBG_BASIC, _("%s: read status %08lx\n"), __FUNCTION__,
+ (long unsigned) status);
+
+ ret = ACCESS_STATUS_OK;
+ switch (status)
+ {
+ case 1:
+ nexus_reg_read (bus, OCD_REG_RWD, data);
+ break;
+ default:
+ urj_error_set (URJ_ERROR_BUS, "read failed, status=%lu",
+ (long unsigned) status);
+ *data = 0xffffffff;
+ ret = ACCESS_STATUS_ERR;
+ break;
+ }
+
+ return ret;
+}
+
+static int
+nexus_memacc_write (urj_bus_t *bus, uint32_t addr, uint32_t data,
+ uint32_t rwcs)
+{
+ uint32_t status;
+ int ret;
+
+ nexus_reg_write (bus, OCD_REG_RWA, addr);
+ nexus_reg_write (bus, OCD_REG_RWCS, rwcs);
+ nexus_reg_write (bus, OCD_REG_RWD, data);
+
+ nexus_reg_read (bus, OCD_REG_RWCS, &status);
+ status &= (OCD_RWCS_ERR | OCD_RWCS_DV);
+
+ DBG (DBG_BASIC, _("%s: status=%08lx\n"), __FUNCTION__,
+ (long unsigned) status);
+
+ ret = ACCESS_STATUS_OK;
+ if (status)
+ {
+ urj_error_set (URJ_ERROR_BUS, "write failed, status=%lu",
+ (long unsigned) status);
+ ret = ACCESS_STATUS_ERR;
+ }
+
+ return ret;
+}
+
+/* ------------------------------------------------------------------------- */
+
+static void
+avr32_bus_setup (urj_bus_t *bus, urj_chain_t *chain, urj_part_t *part,
+ unsigned int mode)
+{
+ bus->chain = chain;
+ bus->part = part;
+ MODE = mode;
+
+ switch (mode)
+ {
+ case BUS_MODE_OCD:
+ SLAVE = SAB_SLAVE_OCD;
+ ADDR_MASK = SAB_OCD_ADDR_MASK & ~(3);
+ break;
+
+ case BUS_MODE_HSBC:
+ SLAVE = SAB_SLAVE_HSB_CACHED;
+ ADDR_MASK = SAB_HSB_ADDR_MASK & ~(3);
+ break;
+
+ case BUS_MODE_HSBU:
+ SLAVE = SAB_SLAVE_HSB_UNCACHED;
+ ADDR_MASK = SAB_HSB_ADDR_MASK & ~(3);
+ break;
+
+ case BUS_MODE_x8:
+ ADDR_MASK = SAB_HSB_ADDR_MASK;
+ RWCS_RD = OCD_RWCS_READ8;
+ RWCS_WR = OCD_RWCS_WRITE8;
+ break;
+
+ case BUS_MODE_x16:
+ ADDR_MASK = SAB_HSB_ADDR_MASK & ~(1);
+ RWCS_RD = OCD_RWCS_READ16;
+ RWCS_WR = OCD_RWCS_WRITE16;
+ break;
+
+ case BUS_MODE_x32:
+ ADDR_MASK = SAB_HSB_ADDR_MASK & ~(3);
+ RWCS_RD = OCD_RWCS_READ32;
+ RWCS_WR = OCD_RWCS_WRITE32;
+ break;
+ }
+}
+
+static int
+check_instruction (urj_part_t *part, const char *instr)
+{
+ int ret;
+
+ ret = (urj_part_find_instruction (part, instr) == NULL);
+ if (ret)
+ urj_error_set (URJ_ERROR_NOTFOUND, "instruction %s not found", instr);
+
+ return ret;
+}
+
+/**
+ * bus->driver->(*new_bus)
+ *
+ */
+static urj_bus_t *
+avr32_bus_new (urj_chain_t *chain, const urj_bus_driver_t *driver,
+ const urj_param_t *cmd_params[])
+{
+ urj_bus_t *bus;
+ urj_part_t *part;
+ unsigned int mode = BUS_MODE_ERROR;
+
+ if (cmd_params[0] == NULL)
+ {
+ urj_error_set (URJ_ERROR_SYNTAX, "no bus mode specified");
+ return NULL;
+ }
+
+ if (cmd_params[1] != NULL)
+ {
+ urj_error_set (URJ_ERROR_SYNTAX, "invalid bus parameter: %s",
+ urj_param_string(&urj_bus_param_list, cmd_params[1]));
+ return NULL;
+ }
+
+ bus = urj_bus_generic_new (chain, driver, sizeof (bus_params_t));
+ if (bus == NULL)
+ return NULL;
+ part = bus->part;
+
+ switch (cmd_params[0]->key)
+ {
+ case URJ_BUS_PARAM_KEY_OCD:
+ mode = BUS_MODE_OCD;
+ break;
+ case URJ_BUS_PARAM_KEY_HSBC:
+ mode = BUS_MODE_HSBC;
+ break;
+ case URJ_BUS_PARAM_KEY_HSBU:
+ mode = BUS_MODE_HSBU;
+ break;
+ case URJ_BUS_PARAM_KEY_X8: // see also: width=8
+ mode = BUS_MODE_x8;
+ break;
+ case URJ_BUS_PARAM_KEY_X16: // see also: width=16
+ mode = BUS_MODE_x16;
+ break;
+ case URJ_BUS_PARAM_KEY_X32: // see also: width=32
+ mode = BUS_MODE_x32;
+ break;
+
+ // RFHH introduced 'width=8|16|32' as an alias for x8, x16, x32
+ case URJ_BUS_PARAM_KEY_WIDTH:
+ switch (cmd_params[0]->value.lu)
+ {
+ case 8:
+ mode = BUS_MODE_x8;
+ break;
+ case 16:
+ mode = BUS_MODE_x16;
+ break;
+ case 32:
+ mode = BUS_MODE_x32;
+ break;
+ default:
+ urj_bus_generic_free (bus);
+ urj_error_set (URJ_ERROR_SYNTAX, "invalid bus width: %lu",
+ cmd_params[0]->value.lu);
+ return NULL;
+ }
+ break;
+
+ default:
+ urj_bus_generic_free (bus);
+ urj_error_set (URJ_ERROR_SYNTAX, "invalid bus mode: %s",
+ urj_param_string(&urj_bus_param_list, cmd_params[0]));
+ return NULL;
+ }
+
+ switch (mode)
+ {
+ case BUS_MODE_OCD:
+ case BUS_MODE_HSBC:
+ case BUS_MODE_HSBU:
+ if (check_instruction (part, "MEMORY_WORD_ACCESS"))
+ {
+ urj_bus_generic_free (bus);
+ return NULL;
+ }
+ break;
+ case BUS_MODE_x8:
+ case BUS_MODE_x16:
+ case BUS_MODE_x32:
+ if (check_instruction (part, "NEXUS_ACCESS"))
+ {
+ urj_bus_generic_free (bus);
+ return NULL;
+ }
+ break;
+ default:
+ urj_error_set (URJ_ERROR_INVALID, "need bus mode parameter");
+ urj_bus_generic_free (bus);
+ return NULL;
+ }
+
+ avr32_bus_setup (bus, chain, part, mode);
+
+ return bus;
+}
+
+/**
+ * bus->driver->(*printinfo)
+ *
+ */
+static void
+avr32_bus_printinfo (urj_log_level_t ll, urj_bus_t *bus)
+{
+ int i;
+
+ for (i = 0; i < bus->chain->parts->len; i++)
+ if (bus->part == bus->chain->parts->parts[i])
+ break;
+
+ urj_log (ll, _("AVR32 multi-mode bus driver (JTAG part No. %d)\n"), i);
+}
+
+/**
+ * bus->driver->(*prepare)
+ *
+ */
+static void
+avr32_bus_prepare (urj_bus_t *bus)
+{
+ if (!bus->initialized)
+ URJ_BUS_INIT (bus);
+}
+
+/**
+ * bus->driver->(*area)
+ *
+ */
+static int
+avr32_bus_area (urj_bus_t *bus, uint32_t addr, urj_bus_area_t *area)
+{
+ switch (MODE)
+ {
+ case BUS_MODE_HSBC:
+ area->description = "HSB memory space, cached";
+ area->start = UINT32_C (0x00000000);
+ area->length = SAB_HSB_AREA_SIZE;
+ area->width = 32;
+ break;
+ case BUS_MODE_HSBU:
+ area->description = "HSB memory space, uncached";
+ area->start = UINT32_C (0x00000000);
+ area->length = SAB_HSB_AREA_SIZE;
+ area->width = 32;
+ break;
+ case BUS_MODE_x8:
+ area->description = "HSB memory space, uncached";
+ area->start = UINT32_C (0x00000000);
+ area->length = SAB_HSB_AREA_SIZE;
+ area->width = 8;
+ break;
+ case BUS_MODE_x16:
+ area->description = "HSB memory space, uncached";
+ area->start = UINT32_C (0x00000000);
+ area->length = SAB_HSB_AREA_SIZE;
+ area->width = 16;
+ break;
+ case BUS_MODE_x32:
+ area->description = "HSB memory space, uncached";
+ area->start = UINT32_C (0x00000000);
+ area->length = SAB_HSB_AREA_SIZE;
+ area->width = 32;
+ break;
+ case BUS_MODE_OCD:
+ if (addr < SAB_OCD_AREA_SIZE)
+ {
+ area->description = "OCD registers";
+ area->start = UINT32_C (0x00000000);
+ area->length = SAB_OCD_AREA_SIZE;
+ area->width = 32;
+ break;
+ }
+ /* fallthrough */
+ default:
+ area->description = NULL;
+ area->length = UINT64_C (0x100000000);
+ area->width = 0;
+ break;
+ }
+
+ return URJ_STATUS_OK;
+}
+
+/**
+ * bus->driver->(*read_start)
+ *
+ */
+static int
+avr32_bus_read_start (urj_bus_t *bus, uint32_t addr)
+{
+ addr &= ADDR_MASK;
+
+ DBG (DBG_BASIC, _("%s:addr=%08lx\n"), __FUNCTION__, (long unsigned) addr);
+
+ switch (MODE)
+ {
+ case BUS_MODE_OCD:
+ case BUS_MODE_HSBC:
+ case BUS_MODE_HSBU:
+ urj_part_set_instruction (bus->part, "MEMORY_WORD_ACCESS");
+ mwa_scan_in_instr (bus);
+ mwa_scan_in_addr (bus, SLAVE, addr, ACCESS_MODE_READ);
+ break;
+
+ case BUS_MODE_x8:
+ case BUS_MODE_x16:
+ case BUS_MODE_x32:
+ urj_part_set_instruction (bus->part, "NEXUS_ACCESS");
+ nexus_access_start (bus);
+ nexus_memacc_set_addr (bus, addr, RWCS_RD);
+ break;
+ }
+
+ return URJ_STATUS_OK;
+}
+
+/**
+ * bus->driver->(*read_end)
+ *
+ */
+static uint32_t
+avr32_bus_read_end (urj_bus_t *bus)
+{
+ uint32_t data = 0;
+
+ switch (MODE)
+ {
+ case BUS_MODE_OCD:
+ case BUS_MODE_HSBC:
+ case BUS_MODE_HSBU:
+ mwa_scan_out_data (bus, &data);
+ break;
+ case BUS_MODE_x8:
+ case BUS_MODE_x16:
+ case BUS_MODE_x32:
+ nexus_memacc_read (bus, &data);
+ nexus_access_end (bus);
+ break;
+ }
+
+ return data;
+}
+
+/**
+ * bus->driver->(*read_next)
+ *
+ */
+static uint32_t
+avr32_bus_read_next (urj_bus_t *bus, uint32_t addr)
+{
+ uint32_t data = 0;
+
+ addr &= ADDR_MASK;
+
+ switch (MODE)
+ {
+ case BUS_MODE_OCD:
+ case BUS_MODE_HSBC:
+ case BUS_MODE_HSBU:
+ data = avr32_bus_read_end (bus);
+ avr32_bus_read_start (bus, addr);
+ break;
+ case BUS_MODE_x8:
+ case BUS_MODE_x16:
+ case BUS_MODE_x32:
+ nexus_memacc_read (bus, &data);
+ nexus_memacc_set_addr (bus, addr, RWCS_RD);
+ break;
+ }
+
+ return data;
+}
+
+/**
+ * bus->driver->(*write)
+ *
+ */
+static void
+avr32_bus_write (urj_bus_t *bus, uint32_t addr, uint32_t data)
+{
+ addr &= ADDR_MASK;
+
+ switch (MODE)
+ {
+ case BUS_MODE_OCD:
+ case BUS_MODE_HSBC:
+ case BUS_MODE_HSBU:
+ urj_part_set_instruction (bus->part, "MEMORY_WORD_ACCESS");
+ mwa_write_word (bus, SLAVE, addr, data);
+ break;
+ case BUS_MODE_x8:
+ case BUS_MODE_x16:
+ case BUS_MODE_x32:
+ urj_part_set_instruction (bus->part, "NEXUS_ACCESS");
+ nexus_access_start (bus);
+ nexus_memacc_write (bus, addr, data, RWCS_WR);
+ nexus_access_end (bus);
+ break;
+ }
+}
+
+const urj_bus_driver_t urj_bus_avr32_bus_driver = {
+ "avr32",
+ N_("Atmel AVR32 multi-mode bus driver, requires <mode> parameter\n"
+ " valid <mode> parameters:\n"
+ " x8: 8 bit bus for the uncached HSB area, via OCD registers\n"
+ " x16: 16 bit bus for the uncached HSB area, via OCD registers\n"
+ " x32: 32 bit bus for the uncached HSB area, via OCD registers\n"
+ " OCD : 32 bit bus for the OCD registers\n"
+ " HSBC: 32 bit bus for the cached HSB area, via SAB\n"
+ " HSBU: 32 bit bus for the uncached HSB area, via SAB"),
+ avr32_bus_new,
+ urj_bus_generic_free,
+ avr32_bus_printinfo,
+ avr32_bus_prepare,
+ avr32_bus_area,
+ avr32_bus_read_start,
+ avr32_bus_read_next,
+ avr32_bus_read_end,
+ urj_bus_generic_read,
+ avr32_bus_write,
+ urj_bus_generic_no_init
+};
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2003 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Matan Ziv-Av.
+ * Modified by Marcel Telka <marcel@telka.sk>, 2003.
+ *
+ */
+
+#include <sysdep.h>
+
+#include <string.h>
+#include <stdint.h>
+#include <stdlib.h>
+
+#include <urjtag/part.h>
+#include <urjtag/bus.h>
+#include <urjtag/chain.h>
+#include <urjtag/bssignal.h>
+
+#include "buses.h"
+#include "generic_bus.h"
+
+//#define USE_BCM_EJTAG
+
+typedef struct
+{
+ urj_part_signal_t *io_ad[32];
+ urj_part_signal_t *io_cs_l[8];
+ urj_part_signal_t *io_rw;
+ urj_part_signal_t *io_wr_l;
+ urj_part_signal_t *io_oe_l;
+} bus_params_t;
+
+#define IO_AD ((bus_params_t *) bus->params)->io_ad
+#define IO_CS_L ((bus_params_t *) bus->params)->io_cs_l
+#define IO_RW ((bus_params_t *) bus->params)->io_rw
+#define IO_WR_L ((bus_params_t *) bus->params)->io_wr_l
+#define IO_OE_L ((bus_params_t *) bus->params)->io_oe_l
+
+/**
+ * bus->driver->(*new_bus)
+ *
+ */
+static urj_bus_t *
+bcm1250_bus_new (urj_chain_t *chain, const urj_bus_driver_t *driver,
+ const urj_param_t *cmd_params[])
+{
+ urj_bus_t *bus;
+ urj_part_t *part;
+ char buff[10];
+ int i;
+ int failed = 0;
+
+ bus = urj_bus_generic_new (chain, driver, sizeof (bus_params_t));
+ if (bus == NULL)
+ return NULL;
+ part = bus->part;
+
+ for (i = 0; i < 32; i++)
+ {
+ sprintf (buff, "IO_AD%d", i);
+ failed |= urj_bus_generic_attach_sig (part, &(IO_AD[i]), buff);
+ }
+
+ for (i = 0; i < 8; i++)
+ {
+ sprintf (buff, "IO_CS_L%d", i);
+ failed |= urj_bus_generic_attach_sig (part, &(IO_CS_L[i]), buff);
+ }
+
+ failed |= urj_bus_generic_attach_sig (part, &(IO_RW), "IO_RW");
+
+ failed |= urj_bus_generic_attach_sig (part, &(IO_WR_L), "IO_WR_L");
+
+ failed |= urj_bus_generic_attach_sig (part, &(IO_OE_L), "IO_OE_L");
+
+ if (failed)
+ {
+ urj_bus_generic_free (bus);
+ return NULL;
+ }
+
+ return bus;
+}
+
+/**
+ * bus->driver->(*printinfo)
+ *
+ */
+static void
+bcm1250_bus_printinfo (urj_log_level_t ll, urj_bus_t *bus)
+{
+ int i;
+
+ for (i = 0; i < bus->chain->parts->len; i++)
+ if (bus->part == bus->chain->parts->parts[i])
+ break;
+ urj_log (ll, _("Broadcom BCM1250 compatible bus driver via BSR (JTAG part No. %d)\n"),
+ i);
+}
+
+/**
+ * bus->driver->(*area)
+ *
+ */
+static int
+bcm1250_bus_area (urj_bus_t *bus, uint32_t addr, urj_bus_area_t *area)
+{
+ area->description = NULL;
+ area->start = UINT32_C (0x00000000);
+ area->length = UINT64_C (0x100000000);
+ area->width = 8;
+
+ return URJ_STATUS_OK;
+}
+
+#ifndef USE_BCM_EJTAG
+
+static void
+setup_address (urj_bus_t *bus, uint32_t a)
+{
+ int i;
+ urj_part_t *p = bus->part;
+
+ for (i = 0; i < 24; i++)
+ {
+ urj_part_set_signal (p, IO_AD[i], 1, (a >> i) & 1);
+ }
+}
+
+static void
+set_data_in (urj_bus_t *bus)
+{
+ int i;
+ urj_part_t *p = bus->part;
+
+ for (i = 0; i < 8; i++)
+ {
+ urj_part_set_signal (p, IO_AD[i + 24], 0, 0);
+ }
+}
+
+static void
+setup_data (urj_bus_t *bus, uint32_t d)
+{
+ int i;
+ urj_part_t *p = bus->part;
+
+ for (i = 0; i < 8; i++)
+ {
+ urj_part_set_signal (p, IO_AD[i + 24], 1, (d >> i) & 1);
+ }
+}
+
+/**
+ * bus->driver->(*read_start)
+ *
+ */
+static int
+bcm1250_bus_read_start (urj_bus_t *bus, uint32_t adr)
+{
+ urj_part_t *p = bus->part;
+ urj_chain_t *chain = bus->chain;
+
+ urj_part_set_signal (p, IO_CS_L[0], 1, 0);
+ urj_part_set_signal (p, IO_CS_L[1], 1, 1);
+ urj_part_set_signal (p, IO_CS_L[2], 1, 1);
+ urj_part_set_signal (p, IO_CS_L[3], 1, 1);
+ urj_part_set_signal (p, IO_CS_L[4], 1, 1);
+ urj_part_set_signal (p, IO_CS_L[5], 1, 1);
+ urj_part_set_signal (p, IO_CS_L[6], 1, 1);
+ urj_part_set_signal (p, IO_CS_L[7], 1, 1);
+ urj_part_set_signal (p, IO_RW, 1, 1);
+ urj_part_set_signal (p, IO_WR_L, 1, 1);
+ urj_part_set_signal (p, IO_OE_L, 1, 0);
+
+ setup_address (bus, adr);
+ set_data_in (bus);
+
+ urj_tap_chain_shift_data_registers (chain, 0);
+
+ return URJ_STATUS_OK;
+}
+
+/**
+ * bus->driver->(*read_next)
+ *
+ */
+static uint32_t
+bcm1250_bus_read_next (urj_bus_t *bus, uint32_t adr)
+{
+ urj_part_t *p = bus->part;
+ urj_chain_t *chain = bus->chain;
+
+ setup_address (bus, adr);
+ urj_tap_chain_shift_data_registers (chain, 1);
+
+ {
+ int i;
+ uint32_t d = 0;
+
+ for (i = 0; i < 8; i++)
+ {
+ d |= (uint32_t) (urj_part_get_signal (p, IO_AD[i + 24]) << i);
+ }
+
+ return d;
+ }
+}
+
+/**
+ * bus->driver->(*read_end)
+ *
+ */
+static uint32_t
+bcm1250_bus_read_end (urj_bus_t *bus)
+{
+ urj_part_t *p = bus->part;
+ urj_chain_t *chain = bus->chain;
+
+ urj_part_set_signal (p, IO_CS_L[0], 1, 1);
+ urj_part_set_signal (p, IO_OE_L, 1, 1);
+ urj_tap_chain_shift_data_registers (chain, 1);
+
+ {
+ int i;
+ uint32_t d = 0;
+
+ for (i = 0; i < 8; i++)
+ {
+ d |= (uint32_t) (urj_part_get_signal (p, IO_AD[i + 24]) << i);
+ }
+
+ return d;
+ }
+}
+
+/**
+ * bus->driver->(*write)
+ *
+ */
+static void
+bcm1250_bus_write (urj_bus_t *bus, uint32_t adr, uint32_t data)
+{
+ urj_part_t *p = bus->part;
+ urj_chain_t *chain = bus->chain;
+
+ urj_part_set_signal (p, IO_CS_L[0], 1, 0);
+ urj_part_set_signal (p, IO_CS_L[1], 1, 1);
+ urj_part_set_signal (p, IO_CS_L[2], 1, 1);
+ urj_part_set_signal (p, IO_CS_L[3], 1, 1);
+ urj_part_set_signal (p, IO_CS_L[4], 1, 1);
+ urj_part_set_signal (p, IO_CS_L[5], 1, 1);
+ urj_part_set_signal (p, IO_CS_L[6], 1, 1);
+ urj_part_set_signal (p, IO_CS_L[7], 1, 1);
+ urj_part_set_signal (p, IO_RW, 1, 0);
+ urj_part_set_signal (p, IO_WR_L, 1, 1);
+ urj_part_set_signal (p, IO_OE_L, 1, 1);
+
+ setup_address (bus, adr);
+ setup_data (bus, data);
+
+ urj_tap_chain_shift_data_registers (chain, 0);
+
+ urj_part_set_signal (p, IO_WR_L, 1, 0);
+ urj_tap_chain_shift_data_registers (chain, 0);
+
+ urj_part_set_signal (p, IO_WR_L, 1, 1);
+ urj_tap_chain_shift_data_registers (chain, 0);
+}
+
+#else /* #ifndef USE_BCM_EJTAG */
+
+static int addr;
+static uint64_t base = 0x1fc00000;
+
+static int
+bcm1250_ejtag_do (urj_bus_t *bus, uint64_t ad, uint64_t da, int read,
+ int type, unsigned char *buf)
+{
+
+ urj_part_t *p = bus->part;
+ urj_chain_t *chain = bus->chain;
+ char ctrl[15] = "010000000000";
+ char addrr[80] = "0000" "111" "000"
+ "11111111111111111111111111111111"
+ "00000000" "00011111" "11000000" "00000000" "000";
+ int j, k, n, m;
+ uint64_t a;
+
+ urj_log (URJ_LOG_LEVEL_DETAIL, "BCM1250: ejtag_do(%08Lx, %08Lx, %i, %i)\n",
+ ad, da, read, type);
+
+ a = ad >> 5;
+ for (j = 0; j < 35; j++)
+ {
+ addrr[76 - j] = '0' + (a & 1);
+ a >>= 1;
+ }
+
+ j = (1 << type) - 1;
+ for (m = 10; m < 42; m++)
+ addrr[m] = '0';
+ n = ad & (~j & 0x1f);
+ for (m = n; m < n + (1 << type); m++)
+ addrr[m + 10] = '1';
+
+ ctrl[2] = '0';
+ ctrl[3] = '0';
+ urj_part_set_instruction (p, "CONTROLL");
+ urj_tap_chain_shift_instructions (chain);
+ j = strlen (ctrl);
+ k = 0;
+ while (j > 0)
+ {
+ j--;
+ p->active_instruction->data_register->in->data[j] = ctrl[k++] & 1;
+ }
+ urj_tap_chain_shift_data_registers (chain, 1);
+
+
+ if (read)
+ {
+ addrr[7] = '0';
+ addrr[8] = '0';
+ addrr[9] = '0';
+ }
+ else
+ {
+ addrr[7] = '0';
+ addrr[8] = '1';
+ addrr[9] = '0';
+ }
+
+ urj_part_set_instruction (p, "ADDR");
+ urj_tap_chain_shift_instructions (chain);
+ j = strlen (addrr);
+ k = 0;
+ while (j > 0)
+ {
+ j--;
+ p->active_instruction->data_register->in->data[j] = addrr[k++] & 1;
+ }
+ urj_tap_chain_shift_data_registers (chain, 0);
+
+ if (!read)
+ {
+ urj_part_set_instruction (p, "DATA");
+ urj_tap_chain_shift_instructions (chain);
+ for (j = 0; j < 277; j++)
+ p->active_instruction->data_register->in->data[j] = j & 1;
+ p->active_instruction->data_register->in->data[259] = 1;
+ p->active_instruction->data_register->in->data[258] = 0;
+ p->active_instruction->data_register->in->data[257] = 0;
+ p->active_instruction->data_register->in->data[256] = 1;
+ j = 0;
+ if (type < 5)
+ {
+ k = 256 - (n + (1 << type)) * 8;
+ while (j < (8 << type))
+ {
+ p->active_instruction->data_register->in->data[k + j] =
+ da & 1;
+ da >>= 1;
+ j++;
+ }
+ }
+ else
+ {
+ int r;
+ for (r = 0; r < 32; r++)
+ {
+ int s, t;
+ t = buf[r];
+ for (s = 0; s < 8; s++)
+ {
+ p->active_instruction->data_register->in->data[248 -
+ r * 8 +
+ s] = t & 1;
+ t >>= 1;
+ }
+ }
+ }
+ urj_tap_chain_shift_data_registers (chain, 0);
+ }
+
+
+ ctrl[2] = '1';
+ if (!read)
+ ctrl[3] = '1';
+ urj_part_set_instruction (p, "CONTROLL");
+ urj_tap_chain_shift_instructions (chain);
+ j = strlen (ctrl);
+ k = 0;
+ while (j > 0)
+ {
+ j--;
+ p->active_instruction->data_register->in->data[j] = ctrl[k++] & 1;
+ }
+ urj_tap_chain_shift_data_registers (chain, 1);
+ if (urj_log_state.level <= URJ_LOG_LEVEL_DETAIL || read)
+ {
+ volatile int q;
+ int to;
+ const urj_tap_register_t *out;
+
+ out = p->active_instruction->data_register->out;
+
+ to = 5;
+ for (q = 0; q < 100; q++);
+ urj_part_set_instruction (p, "DATA");
+ urj_tap_chain_shift_instructions (chain);
+ urj_tap_chain_shift_data_registers (chain, 1);
+
+ while ((out->data[276 - 17] == 0) && to--)
+ {
+ urj_tap_chain_shift_data_registers (chain, 1);
+ }
+ for (j = n; j < n + (1 << type); j++)
+ {
+ buf[j] = 0;
+ for (m = 0; m < 8; m++)
+ {
+ buf[j] <<= 1;
+ buf[j] += out->data[255 - (j * 8) - m] & 1;
+ }
+ urj_log (URJ_LOG_LEVEL_DETAIL, "%02x ", buf[j]);
+ }
+ if (urj_log_state.level <= URJ_LOG_LEVEL_DETAIL)
+ {
+ urj_log (URJ_LOG_LEVEL_DETAIL, "\n");
+
+ urj_log (URJ_LOG_LEVEL_DETAIL, " status:\n");
+ for (j = 0; j < 21; j++)
+ {
+ urj_log (URJ_LOG_LEVEL_DETAIL, "%c", '0' + out->data[276 - j]);
+ if ((j == 5) || (j == 11) || (j == 12) || (j == 16)
+ || (j == 17))
+ urj_log (URJ_LOG_LEVEL_DETAIL, " ");
+ }
+ urj_log (URJ_LOG_LEVEL_DETAIL, "\n");
+ }
+ }
+ return URJ_STATUS_OK;
+}
+
+/**
+ * bus->driver->(*read_start)
+ *
+ */
+static void
+bcm1250_bus_read_start (urj_bus_t *bus, uint32_t adr)
+{
+ addr = adr;
+}
+
+/**
+ * bus->driver->(*read)
+ *
+ */
+static uint32_t
+bcm1250_bus_read (urj_bus_t *bus, uint32_t adr)
+{
+ unsigned char buf[32];
+ bcm1250_ejtag_do (bus, adr + base, 0, 1, 0, buf, 0);
+ return buf[adr & 0x1f];
+
+}
+
+/**
+ * bus->driver->(*read_next)
+ *
+ */
+static uint32_t
+bcm1250_bus_read_next (urj_bus_t *bus, uint32_t adr)
+{
+ uint32_t t;
+ t = bcm1250_bus_read (bus, addr);
+ addr = adr;
+ return t;
+}
+
+/**
+ * bus->driver->(*read_end)
+ *
+ */
+static uint32_t
+bcm1250_bus_read_end (urj_bus_t *bus)
+{
+ return bcm1250_bus_read (bus, addr);
+}
+
+/**
+ * bus->driver->(*write)
+ *
+ */
+static void
+bcm1250_bus_write (urj_bus_t *bus, uint32_t adr, uint32_t data)
+{
+ unsigned char buf[32];
+ bcm1250_ejtag_do (bus, adr + base, data, 0, 0, buf, 0);
+}
+
+#endif /* #else #ifndef USE_BCM_EJTAG */
+
+const urj_bus_driver_t urj_bus_bcm1250_bus = {
+ "bcm1250",
+ N_("Broadcom BCM1250 compatible bus driver via BSR"),
+ bcm1250_bus_new,
+ urj_bus_generic_free,
+ bcm1250_bus_printinfo,
+ urj_bus_generic_prepare_extest,
+ bcm1250_bus_area,
+ bcm1250_bus_read_start,
+ bcm1250_bus_read_next,
+ bcm1250_bus_read_end,
+#ifndef USE_BCM_EJTAG
+ urj_bus_generic_read,
+#else
+ bcm1250_bus_read,
+#endif
+ bcm1250_bus_write,
+ urj_bus_generic_no_init
+};
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2002 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Christian Pellegrin <chri@ascensit.com>, 2003.
+ * Modified by Marcel Telka <marcel@telka.sk>, 2003.
+ *
+ */
+
+#include <sysdep.h>
+
+#include <stdlib.h>
+#include <stdint.h>
+#include <string.h>
+
+#include <urjtag/part.h>
+#include <urjtag/bus.h>
+#include <urjtag/chain.h>
+#include <urjtag/bssignal.h>
+
+#include "buses.h"
+#include "generic_bus.h"
+
+typedef struct
+{
+ urj_part_signal_t *ams[4];
+ urj_part_signal_t *addr[19];
+ urj_part_signal_t *data[16];
+ urj_part_signal_t *abe[2];
+ urj_part_signal_t *awe;
+ urj_part_signal_t *aoe;
+ urj_part_signal_t *sras;
+ urj_part_signal_t *scas;
+ urj_part_signal_t *sms;
+ urj_part_signal_t *swe;
+} bus_params_t;
+
+#define AMS ((bus_params_t *) bus->params)->ams
+#define ADDR ((bus_params_t *) bus->params)->addr
+#define DATA ((bus_params_t *) bus->params)->data
+#define AWE ((bus_params_t *) bus->params)->awe
+#define AOE ((bus_params_t *) bus->params)->aoe
+#define ABE ((bus_params_t *) bus->params)->abe
+#define SRAS ((bus_params_t *) bus->params)->sras
+#define SCAS ((bus_params_t *) bus->params)->scas
+#define SMS ((bus_params_t *) bus->params)->sms
+#define SWE ((bus_params_t *) bus->params)->swe
+
+/**
+ * bus->driver->(*new_bus)
+ *
+ */
+static urj_bus_t *
+bf533_ezkit_bus_new (urj_chain_t *chain, const urj_bus_driver_t *driver,
+ const urj_param_t *cmd_params[])
+{
+ urj_bus_t *bus;
+ urj_part_t *part;
+ char buff[15];
+ int i;
+ int failed = 0;
+
+ bus = urj_bus_generic_new (chain, driver, sizeof (bus_params_t));
+ if (bus == NULL)
+ return NULL;
+ part = bus->part;
+
+ for (i = 0; i < 4; i++)
+ {
+ sprintf (buff, "AMS_B%d", i);
+ failed |= urj_bus_generic_attach_sig (part, &(AMS[i]), buff);
+ }
+
+ for (i = 0; i < 19; i++)
+ {
+ sprintf (buff, "ADDR[%d]", i + 1);
+ failed |= urj_bus_generic_attach_sig (part, &(ADDR[i]), buff);
+ }
+
+ for (i = 0; i < 16; i++)
+ {
+ sprintf (buff, "DATA[%d]", i);
+ failed |= urj_bus_generic_attach_sig (part, &(DATA[i]), buff);
+ }
+
+ failed |= urj_bus_generic_attach_sig (part, &(AWE), "AWE_B");
+
+ failed |= urj_bus_generic_attach_sig (part, &(AOE), "AOE_B");
+
+ failed |= urj_bus_generic_attach_sig (part, &(ABE[0]), "ABE_B0");
+
+ failed |= urj_bus_generic_attach_sig (part, &(ABE[1]), "ABE_B1");
+
+ failed |= urj_bus_generic_attach_sig (part, &(SRAS), "SRAS_B");
+
+ failed |= urj_bus_generic_attach_sig (part, &(SCAS), "SCAS_B");
+
+ failed |= urj_bus_generic_attach_sig (part, &(SWE), "SWE_B");
+
+ failed |= urj_bus_generic_attach_sig (part, &(SMS), "SMS_B");
+
+ if (failed)
+ {
+ urj_bus_generic_free (bus);
+ return NULL;
+ }
+
+ return bus;
+}
+
+/**
+ * bus->driver->(*printinfo)
+ *
+ */
+static void
+bf533_ezkit_bus_printinfo (urj_log_level_t ll, urj_bus_t *bus)
+{
+ int i;
+
+ for (i = 0; i < bus->chain->parts->len; i++)
+ if (bus->part == bus->chain->parts->parts[i])
+ break;
+ urj_log (ll, _("Blackfin BF533 EZKit compatible bus driver via BSR (JTAG part No. %d)\n"),
+ i);
+}
+
+/**
+ * bus->driver->(*area)
+ *
+ */
+static int
+bf533_ezkit_bus_area (urj_bus_t *bus, uint32_t adr, urj_bus_area_t *area)
+{
+ area->description = NULL;
+ area->start = UINT32_C (0x00000000);
+ area->length = UINT64_C (0x100000000);
+ area->width = 16;
+
+ return URJ_STATUS_OK;
+}
+
+static void
+select_flash (urj_bus_t *bus)
+{
+ urj_part_t *p = bus->part;
+
+ urj_part_set_signal (p, AMS[0], 1, 0);
+ urj_part_set_signal (p, AMS[1], 1, 1);
+ urj_part_set_signal (p, AMS[2], 1, 1);
+ urj_part_set_signal (p, AMS[3], 1, 1);
+
+ urj_part_set_signal (p, ABE[0], 1, 0);
+ urj_part_set_signal (p, ABE[1], 1, 0);
+
+ urj_part_set_signal (p, SRAS, 1, 1);
+ urj_part_set_signal (p, SCAS, 1, 1);
+ urj_part_set_signal (p, SWE, 1, 1);
+ urj_part_set_signal (p, SMS, 1, 1);
+}
+
+static void
+unselect_flash (urj_bus_t *bus)
+{
+ urj_part_t *p = bus->part;
+
+ urj_part_set_signal (p, AMS[0], 1, 1);
+ urj_part_set_signal (p, AMS[1], 1, 1);
+ urj_part_set_signal (p, AMS[2], 1, 1);
+ urj_part_set_signal (p, AMS[3], 1, 1);
+
+ urj_part_set_signal (p, ABE[0], 1, 1);
+ urj_part_set_signal (p, ABE[1], 1, 1);
+
+ urj_part_set_signal (p, SRAS, 1, 1);
+ urj_part_set_signal (p, SCAS, 1, 1);
+ urj_part_set_signal (p, SWE, 1, 1);
+ urj_part_set_signal (p, SMS, 1, 1);
+}
+
+static void
+setup_address (urj_bus_t *bus, uint32_t a)
+{
+ int i;
+ urj_part_t *p = bus->part;
+
+ for (i = 0; i < 19; i++)
+ urj_part_set_signal (p, ADDR[i], 1, (a >> (i + 1)) & 1);
+}
+
+static void
+set_data_in (urj_bus_t *bus)
+{
+ int i;
+ urj_part_t *p = bus->part;
+
+ for (i = 0; i < 16; i++)
+ urj_part_set_signal (p, DATA[i], 0, 0);
+}
+
+static void
+setup_data (urj_bus_t *bus, uint32_t d)
+{
+ int i;
+ urj_part_t *p = bus->part;
+
+ for (i = 0; i < 16; i++)
+ urj_part_set_signal (p, DATA[i], 1, (d >> i) & 1);
+
+}
+
+/**
+ * bus->driver->(*read_start)
+ *
+ */
+static int
+bf533_ezkit_bus_read_start (urj_bus_t *bus, uint32_t adr)
+{
+ urj_part_t *p = bus->part;
+ urj_chain_t *chain = bus->chain;
+
+ select_flash (bus);
+ urj_part_set_signal (p, AOE, 1, 0);
+ urj_part_set_signal (p, AWE, 1, 1);
+
+ setup_address (bus, adr);
+ set_data_in (bus);
+
+ urj_tap_chain_shift_data_registers (chain, 0);
+
+ return URJ_STATUS_OK;
+}
+
+/**
+ * bus->driver->(*read_next)
+ *
+ */
+static uint32_t
+bf533_ezkit_bus_read_next (urj_bus_t *bus, uint32_t adr)
+{
+ urj_part_t *p = bus->part;
+ urj_chain_t *chain = bus->chain;
+ int i;
+ uint32_t d = 0;
+
+ setup_address (bus, adr);
+ urj_tap_chain_shift_data_registers (chain, 1);
+
+ for (i = 0; i < 16; i++)
+ d |= (uint32_t) (urj_part_get_signal (p, DATA[i]) << i);
+
+ return d;
+}
+
+/**
+ * bus->driver->(*read_end)
+ *
+ */
+static uint32_t
+bf533_ezkit_bus_read_end (urj_bus_t *bus)
+{
+ urj_part_t *p = bus->part;
+ urj_chain_t *chain = bus->chain;
+ int i;
+ uint32_t d = 0;
+
+ unselect_flash (bus);
+ urj_part_set_signal (p, AOE, 1, 1);
+ urj_part_set_signal (p, AWE, 1, 1);
+
+ urj_tap_chain_shift_data_registers (chain, 1);
+
+ for (i = 0; i < 16; i++)
+ d |= (uint32_t) (urj_part_get_signal (p, DATA[i]) << i);
+
+ return d;
+}
+
+/**
+ * bus->driver->(*write)
+ *
+ */
+static void
+bf533_ezkit_bus_write (urj_bus_t *bus, uint32_t adr, uint32_t data)
+{
+ urj_part_t *p = bus->part;
+ urj_chain_t *chain = bus->chain;
+
+ urj_log (URJ_LOG_LEVEL_COMM, "Writing %04lX to %08lX...\n",
+ (long unsigned) data, (long unsigned) adr);
+
+ select_flash (bus);
+ urj_part_set_signal (p, AOE, 1, 1);
+
+ setup_address (bus, adr);
+ setup_data (bus, data);
+
+ urj_tap_chain_shift_data_registers (chain, 0);
+
+ urj_part_set_signal (p, AWE, 1, 0);
+ urj_tap_chain_shift_data_registers (chain, 0);
+ urj_part_set_signal (p, AWE, 1, 1);
+ unselect_flash (bus);
+ urj_tap_chain_shift_data_registers (chain, 0);
+}
+
+const urj_bus_driver_t urj_bus_bf533_ezkit_bus = {
+ "bf533_ezkit",
+ N_("Blackfin BF533 EZKit board bus driver"),
+ bf533_ezkit_bus_new,
+ urj_bus_generic_free,
+ bf533_ezkit_bus_printinfo,
+ urj_bus_generic_prepare_extest,
+ bf533_ezkit_bus_area,
+ bf533_ezkit_bus_read_start,
+ bf533_ezkit_bus_read_next,
+ bf533_ezkit_bus_read_end,
+ urj_bus_generic_read,
+ bf533_ezkit_bus_write,
+ urj_bus_generic_no_init
+};
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2002 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Christian Pellegrin <chri@ascensit.com>, 2003.
+ * Modified by Marcel Telka <marcel@telka.sk>, 2003.
+ *
+ */
+
+#include <sysdep.h>
+
+#include <stdlib.h>
+#include <stdint.h>
+#include <string.h>
+
+#include <urjtag/part.h>
+#include <urjtag/bus.h>
+#include <urjtag/chain.h>
+#include <urjtag/bssignal.h>
+
+#include "buses.h"
+#include "generic_bus.h"
+
+typedef struct
+{
+ urj_part_signal_t *ams[4];
+ urj_part_signal_t *addr[19];
+ urj_part_signal_t *data[16];
+ urj_part_signal_t *pf[2];
+ urj_part_signal_t *are;
+ urj_part_signal_t *awe;
+ urj_part_signal_t *aoe;
+ urj_part_signal_t *sras;
+ urj_part_signal_t *scas;
+ urj_part_signal_t *sms;
+ urj_part_signal_t *swe;
+} bus_params_t;
+
+#define AMS ((bus_params_t *) bus->params)->ams
+#define ADDR ((bus_params_t *) bus->params)->addr
+#define DATA ((bus_params_t *) bus->params)->data
+#define PF ((bus_params_t *) bus->params)->pf
+#define AWE ((bus_params_t *) bus->params)->awe
+#define ARE ((bus_params_t *) bus->params)->are
+#define AOE ((bus_params_t *) bus->params)->aoe
+#define SRAS ((bus_params_t *) bus->params)->sras
+#define SCAS ((bus_params_t *) bus->params)->scas
+#define SMS ((bus_params_t *) bus->params)->sms
+#define SWE ((bus_params_t *) bus->params)->swe
+
+/**
+ * bus->driver->(*new_bus)
+ *
+ */
+static urj_bus_t *
+bf533_stamp_bus_new (urj_chain_t *chain, const urj_bus_driver_t *driver,
+ const urj_param_t *cmd_params[])
+{
+ urj_bus_t *bus;
+ urj_part_t *part;
+ char buff[15];
+ int i;
+ int failed = 0;
+
+ bus = urj_bus_generic_new (chain, driver, sizeof (bus_params_t));
+ if (bus == NULL)
+ return NULL;
+ part = bus->part;
+
+ for (i = 0; i < 2; i++)
+ {
+ sprintf (buff, "PF%d", i);
+ failed |= urj_bus_generic_attach_sig (part, &(PF[i]), buff);
+ }
+
+ for (i = 0; i < 4; i++)
+ {
+ sprintf (buff, "AMS_B%d", i);
+ failed |= urj_bus_generic_attach_sig (part, &(AMS[i]), buff);
+ }
+
+ for (i = 0; i < 19; i++)
+ {
+ sprintf (buff, "ADDR[%d]", i + 1);
+ failed |= urj_bus_generic_attach_sig (part, &(ADDR[i]), buff);
+ }
+
+ for (i = 0; i < 16; i++)
+ {
+ sprintf (buff, "DATA[%d]", i);
+ failed |= urj_bus_generic_attach_sig (part, &(DATA[i]), buff);
+ }
+
+ failed |= urj_bus_generic_attach_sig (part, &(AWE), "AWE_B");
+
+ failed |= urj_bus_generic_attach_sig (part, &(ARE), "ARE_B");
+
+ failed |= urj_bus_generic_attach_sig (part, &(AOE), "AOE_B");
+
+ failed |= urj_bus_generic_attach_sig (part, &(SRAS), "SRAS_B");
+
+ failed |= urj_bus_generic_attach_sig (part, &(SCAS), "SCAS_B");
+
+ failed |= urj_bus_generic_attach_sig (part, &(SWE), "SWE_B");
+
+ failed |= urj_bus_generic_attach_sig (part, &(SMS), "SMS_B");
+
+ if (failed)
+ {
+ urj_bus_generic_free (bus);
+ return NULL;
+ }
+
+ return bus;
+}
+
+/**
+ * bus->driver->(*printinfo)
+ *
+ */
+static void
+bf533_stamp_bus_printinfo (urj_log_level_t ll, urj_bus_t *bus)
+{
+ int i;
+
+ for (i = 0; i < bus->chain->parts->len; i++)
+ if (bus->part == bus->chain->parts->parts[i])
+ break;
+ urj_log (ll, _("Blackfin BF533 compatible bus driver via BSR (JTAG part No. %d)\n"),
+ i);
+}
+
+/**
+ * bus->driver->(*area)
+ *
+ */
+static int
+bf533_stamp_bus_area (urj_bus_t *bus, uint32_t adr, urj_bus_area_t *area)
+{
+ area->description = NULL;
+ area->start = UINT32_C (0x00000000);
+ area->length = UINT64_C (0x100000000);
+ area->width = 16;
+
+ return URJ_STATUS_OK;
+}
+
+static void
+select_flash (urj_bus_t *bus, uint32_t adr)
+{
+ urj_part_t *p = bus->part;
+
+ urj_part_set_signal (p, PF[0], 1, 0);
+ urj_part_set_signal (p, PF[1], 1, 0);
+
+ urj_part_set_signal (p, AMS[0], 1, 1);
+ urj_part_set_signal (p, AMS[1], 1, 1);
+ urj_part_set_signal (p, AMS[2], 1, 1);
+ urj_part_set_signal (p, AMS[3], 1, 1);
+ if (adr >= 0x20000000 && adr <= 0x203fffff) {
+ uint32_t ams_idx;
+ ams_idx = (adr >> 20) & 0x3;
+ urj_part_set_signal (p, AMS[ams_idx], 1, 0);
+ }
+
+ urj_part_set_signal (p, SRAS, 1, 1);
+ urj_part_set_signal (p, SCAS, 1, 1);
+ urj_part_set_signal (p, SWE, 1, 1);
+ urj_part_set_signal (p, SMS, 1, 1);
+}
+
+static void
+unselect_flash (urj_bus_t *bus)
+{
+ urj_part_t *p = bus->part;
+
+ urj_part_set_signal (p, PF[0], 1, 0);
+ urj_part_set_signal (p, PF[1], 1, 0);
+
+ urj_part_set_signal (p, AMS[0], 1, 1);
+ urj_part_set_signal (p, AMS[1], 1, 1);
+ urj_part_set_signal (p, AMS[2], 1, 1);
+ urj_part_set_signal (p, AMS[3], 1, 1);
+
+ urj_part_set_signal (p, SRAS, 1, 1);
+ urj_part_set_signal (p, SCAS, 1, 1);
+ urj_part_set_signal (p, SWE, 1, 1);
+ urj_part_set_signal (p, SMS, 1, 1);
+}
+
+static void
+setup_address (urj_bus_t *bus, uint32_t a)
+{
+ int i;
+ urj_part_t *p = bus->part;
+
+ for (i = 0; i < 19; i++)
+ urj_part_set_signal (p, ADDR[i], 1, (a >> (i + 1)) & 1);
+}
+
+static void
+set_data_in (urj_bus_t *bus)
+{
+ int i;
+ urj_part_t *p = bus->part;
+
+ for (i = 0; i < 16; i++)
+ urj_part_set_signal (p, DATA[i], 0, 0);
+}
+
+static void
+setup_data (urj_bus_t *bus, uint32_t d)
+{
+ int i;
+ urj_part_t *p = bus->part;
+
+ for (i = 0; i < 16; i++)
+ urj_part_set_signal (p, DATA[i], 1, (d >> i) & 1);
+
+}
+
+/**
+ * bus->driver->(*read_start)
+ *
+ */
+static int
+bf533_stamp_bus_read_start (urj_bus_t *bus, uint32_t adr)
+{
+ urj_part_t *p = bus->part;
+ urj_chain_t *chain = bus->chain;
+
+ select_flash (bus, adr);
+ urj_part_set_signal (p, AOE, 1, 0);
+ urj_part_set_signal (p, ARE, 1, 0);
+ urj_part_set_signal (p, AWE, 1, 1);
+
+ setup_address (bus, adr);
+ set_data_in (bus);
+
+ urj_tap_chain_shift_data_registers (chain, 0);
+
+ return URJ_STATUS_OK;
+}
+
+/**
+ * bus->driver->(*read_next)
+ *
+ */
+static uint32_t
+bf533_stamp_bus_read_next (urj_bus_t *bus, uint32_t adr)
+{
+ urj_part_t *p = bus->part;
+ urj_chain_t *chain = bus->chain;
+ int i;
+ uint32_t d = 0;
+
+ setup_address (bus, adr);
+ urj_tap_chain_shift_data_registers (chain, 1);
+
+ for (i = 0; i < 16; i++)
+ d |= (uint32_t) (urj_part_get_signal (p, DATA[i]) << i);
+
+ return d;
+}
+
+/**
+ * bus->driver->(*read_end)
+ *
+ */
+static uint32_t
+bf533_stamp_bus_read_end (urj_bus_t *bus)
+{
+ urj_part_t *p = bus->part;
+ urj_chain_t *chain = bus->chain;
+ int i;
+ uint32_t d = 0;
+
+ unselect_flash (bus);
+ urj_part_set_signal (p, AOE, 1, 1);
+ urj_part_set_signal (p, ARE, 1, 1);
+ urj_part_set_signal (p, AWE, 1, 1);
+
+ urj_tap_chain_shift_data_registers (chain, 1);
+
+ for (i = 0; i < 16; i++)
+ d |= (uint32_t) (urj_part_get_signal (p, DATA[i]) << i);
+
+ return d;
+}
+
+/**
+ * bus->driver->(*write)
+ *
+ */
+static void
+bf533_stamp_bus_write (urj_bus_t *bus, uint32_t adr, uint32_t data)
+{
+ urj_part_t *p = bus->part;
+ urj_chain_t *chain = bus->chain;
+
+ urj_log (URJ_LOG_LEVEL_COMM, "Writing %04lX to %08lX...\n",
+ (long unsigned) data, (long unsigned) adr);
+
+ select_flash (bus, adr);
+ urj_part_set_signal (p, ARE, 1, 1);
+ urj_part_set_signal (p, AOE, 1, 1);
+ urj_part_set_signal (p, AWE, 1, 1);
+
+ setup_address (bus, adr);
+ setup_data (bus, data);
+
+ urj_tap_chain_shift_data_registers (chain, 0);
+
+ urj_part_set_signal (p, AWE, 1, 0);
+ urj_tap_chain_shift_data_registers (chain, 0);
+ urj_part_set_signal (p, AWE, 1, 1);
+ unselect_flash (bus);
+ urj_tap_chain_shift_data_registers (chain, 0);
+}
+
+const urj_bus_driver_t urj_bus_bf533_stamp_bus = {
+ "bf533_stamp",
+ N_("Blackfin BF533 Stamp board bus driver"),
+ bf533_stamp_bus_new,
+ urj_bus_generic_free,
+ bf533_stamp_bus_printinfo,
+ urj_bus_generic_prepare_extest,
+ bf533_stamp_bus_area,
+ bf533_stamp_bus_read_start,
+ bf533_stamp_bus_read_next,
+ bf533_stamp_bus_read_end,
+ urj_bus_generic_read,
+ bf533_stamp_bus_write,
+ urj_bus_generic_no_init
+};
--- /dev/null
+/*
+ * $Id$
+ *
+ * Analog Devices ADSP-BF537 STAMP/EZ-KIT Lite bus driver
+ * Copyright (C) 2008 Analog Devices, Inc.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Jie Zhang <jie.zhang@analog.com>, 2008.
+ *
+ */
+
+#include <sysdep.h>
+
+#include <stdlib.h>
+#include <stdint.h>
+#include <string.h>
+
+#include <urjtag/part.h>
+#include <urjtag/bus.h>
+#include <urjtag/chain.h>
+#include <urjtag/bssignal.h>
+
+#include "buses.h"
+#include "generic_bus.h"
+
+typedef struct
+{
+ urj_part_signal_t *ams[4];
+ urj_part_signal_t *addr[19];
+ urj_part_signal_t *data[16];
+ urj_part_signal_t *abe[2];
+ urj_part_signal_t *awe;
+ urj_part_signal_t *are;
+ urj_part_signal_t *sras;
+ urj_part_signal_t *scas;
+ urj_part_signal_t *sms;
+ urj_part_signal_t *swe;
+} bus_params_t;
+
+#define AMS ((bus_params_t *) bus->params)->ams
+#define ADDR ((bus_params_t *) bus->params)->addr
+#define DATA ((bus_params_t *) bus->params)->data
+#define AWE ((bus_params_t *) bus->params)->awe
+#define ARE ((bus_params_t *) bus->params)->are
+#define ABE ((bus_params_t *) bus->params)->abe
+#define SRAS ((bus_params_t *) bus->params)->sras
+#define SCAS ((bus_params_t *) bus->params)->scas
+#define SMS ((bus_params_t *) bus->params)->sms
+#define SWE ((bus_params_t *) bus->params)->swe
+
+/*
+ * bus->driver->(*new_bus)
+ *
+ */
+static urj_bus_t *
+bf537_stamp_bus_new (urj_chain_t *chain, const urj_bus_driver_t *driver,
+ const urj_param_t *cmd_params[])
+{
+ urj_bus_t *bus;
+ urj_part_t *part;
+ char buff[15];
+ int i;
+ int failed = 0;
+
+ bus = urj_bus_generic_new (chain, driver, sizeof (bus_params_t));
+ if (bus == NULL)
+ return NULL;
+ part = bus->part;
+
+ for (i = 0; i < 4; i++)
+ {
+ sprintf (buff, "AMS_B%d", i);
+ failed |= urj_bus_generic_attach_sig (part, &(AMS[i]), buff);
+ }
+
+ for (i = 0; i < 19; i++)
+ {
+ sprintf (buff, "ADDR%d", i + 1);
+ failed |= urj_bus_generic_attach_sig (part, &(ADDR[i]), buff);
+ }
+
+ for (i = 0; i < 16; i++)
+ {
+ sprintf (buff, "DATA%d", i);
+ failed |= urj_bus_generic_attach_sig (part, &(DATA[i]), buff);
+ }
+
+ failed |= urj_bus_generic_attach_sig (part, &(AWE), "AWE_B");
+
+ failed |= urj_bus_generic_attach_sig (part, &(ARE), "ARE_B");
+
+ failed |= urj_bus_generic_attach_sig (part, &(ABE[0]), "ABE_B0");
+
+ failed |= urj_bus_generic_attach_sig (part, &(ABE[1]), "ABE_B1");
+
+ failed |= urj_bus_generic_attach_sig (part, &(SRAS), "SRAS_B");
+
+ failed |= urj_bus_generic_attach_sig (part, &(SCAS), "SCAS_B");
+
+ failed |= urj_bus_generic_attach_sig (part, &(SWE), "SWE_B");
+
+ failed |= urj_bus_generic_attach_sig (part, &(SMS), "SMS_B");
+
+ if (failed)
+ {
+ urj_bus_generic_free (bus);
+ return NULL;
+ }
+
+ return bus;
+}
+
+/**
+ * bus->driver->(*area)
+ *
+ */
+static int
+bf537_stamp_bus_area (urj_bus_t *bus, uint32_t adr, urj_bus_area_t *area)
+{
+ area->description = NULL;
+ area->start = UINT32_C (0x00000000);
+ area->length = UINT64_C (0x100000000);
+ area->width = 16;
+
+ return URJ_STATUS_OK;
+}
+
+static void
+select_flash (urj_bus_t *bus)
+{
+ urj_part_t *p = bus->part;
+
+ urj_part_set_signal (p, AMS[0], 1, 0);
+ urj_part_set_signal (p, AMS[1], 1, 1);
+ urj_part_set_signal (p, AMS[2], 1, 1);
+ urj_part_set_signal (p, AMS[3], 1, 1);
+
+ urj_part_set_signal (p, ABE[0], 1, 0);
+ urj_part_set_signal (p, ABE[1], 1, 0);
+
+ urj_part_set_signal (p, SRAS, 1, 1);
+ urj_part_set_signal (p, SCAS, 1, 1);
+ urj_part_set_signal (p, SWE, 1, 1);
+ urj_part_set_signal (p, SMS, 1, 1);
+}
+
+static void
+unselect_flash (urj_bus_t *bus)
+{
+ urj_part_t *p = bus->part;
+
+ urj_part_set_signal (p, AMS[0], 1, 1);
+ urj_part_set_signal (p, AMS[1], 1, 1);
+ urj_part_set_signal (p, AMS[2], 1, 1);
+ urj_part_set_signal (p, AMS[3], 1, 1);
+
+ urj_part_set_signal (p, ABE[0], 1, 1);
+ urj_part_set_signal (p, ABE[1], 1, 1);
+
+ urj_part_set_signal (p, SRAS, 1, 1);
+ urj_part_set_signal (p, SCAS, 1, 1);
+ urj_part_set_signal (p, SWE, 1, 1);
+ urj_part_set_signal (p, SMS, 1, 1);
+}
+
+static void
+setup_address (urj_bus_t *bus, uint32_t a)
+{
+ int i;
+ urj_part_t *p = bus->part;
+
+ for (i = 0; i < 19; i++)
+ urj_part_set_signal (p, ADDR[i], 1, (a >> (i + 1)) & 1);
+}
+
+static void
+set_data_in (urj_bus_t *bus)
+{
+ int i;
+ urj_part_t *p = bus->part;
+
+ for (i = 0; i < 16; i++)
+ urj_part_set_signal (p, DATA[i], 0, 0);
+}
+
+static void
+setup_data (urj_bus_t *bus, uint32_t d)
+{
+ int i;
+ urj_part_t *p = bus->part;
+
+ for (i = 0; i < 16; i++)
+ urj_part_set_signal (p, DATA[i], 1, (d >> i) & 1);
+
+}
+
+/**
+ * bus->driver->(*read_start)
+ *
+ */
+static int
+bf537_stamp_bus_read_start (urj_bus_t *bus, uint32_t adr)
+{
+ urj_part_t *p = bus->part;
+ urj_chain_t *chain = bus->chain;
+
+ select_flash (bus);
+ urj_part_set_signal (p, ARE, 1, 0);
+ urj_part_set_signal (p, AWE, 1, 1);
+
+ setup_address (bus, adr);
+ set_data_in (bus);
+
+ urj_tap_chain_shift_data_registers (chain, 0);
+
+ return URJ_STATUS_OK;
+}
+
+/**
+ * bus->driver->(*read_next)
+ *
+ */
+static uint32_t
+bf537_stamp_bus_read_next (urj_bus_t *bus, uint32_t adr)
+{
+ urj_part_t *p = bus->part;
+ urj_chain_t *chain = bus->chain;
+ int i;
+ uint32_t d = 0;
+
+ setup_address (bus, adr);
+ urj_tap_chain_shift_data_registers (chain, 1);
+
+ for (i = 0; i < 16; i++)
+ d |= (uint32_t) (urj_part_get_signal (p, DATA[i]) << i);
+
+ return d;
+}
+
+/**
+ * bus->driver->(*read_end)
+ *
+ */
+static uint32_t
+bf537_stamp_bus_read_end (urj_bus_t *bus)
+{
+ urj_part_t *p = bus->part;
+ urj_chain_t *chain = bus->chain;
+ int i;
+ uint32_t d = 0;
+
+ unselect_flash (bus);
+ urj_part_set_signal (p, ARE, 1, 1);
+ urj_part_set_signal (p, AWE, 1, 1);
+
+ urj_tap_chain_shift_data_registers (chain, 1);
+
+ for (i = 0; i < 16; i++)
+ d |= (uint32_t) (urj_part_get_signal (p, DATA[i]) << i);
+
+ return d;
+}
+
+/**
+ * bus->driver->(*write)
+ *
+ */
+static void
+bf537_stamp_bus_write (urj_bus_t *bus, uint32_t adr, uint32_t data)
+{
+ urj_part_t *p = bus->part;
+ urj_chain_t *chain = bus->chain;
+
+ select_flash (bus);
+ urj_part_set_signal (p, ARE, 1, 1);
+
+ setup_address (bus, adr);
+ setup_data (bus, data);
+
+ urj_tap_chain_shift_data_registers (chain, 0);
+
+ urj_part_set_signal (p, AWE, 1, 0);
+ urj_tap_chain_shift_data_registers (chain, 0);
+ urj_part_set_signal (p, AWE, 1, 1);
+ unselect_flash (bus);
+ urj_tap_chain_shift_data_registers (chain, 0);
+}
+
+/**
+ * bus->driver->(*printinfo)
+ *
+ */
+static void
+bf537_stamp_bus_printinfo (urj_log_level_t ll, urj_bus_t *bus)
+{
+ int i;
+
+ for (i = 0; i < bus->chain->parts->len; i++)
+ if (bus->part == bus->chain->parts->parts[i])
+ break;
+ urj_log (ll, _("%s (JTAG part No. %d)\n"), bus->driver->description, i);
+}
+
+#define BF537_STAMP_BUS_FUNCTIONS \
+ bf537_stamp_bus_new, \
+ urj_bus_generic_free, \
+ bf537_stamp_bus_printinfo, \
+ urj_bus_generic_prepare_extest, \
+ bf537_stamp_bus_area, \
+ bf537_stamp_bus_read_start, \
+ bf537_stamp_bus_read_next, \
+ bf537_stamp_bus_read_end, \
+ urj_bus_generic_read, \
+ bf537_stamp_bus_write, \
+ urj_bus_generic_no_init
+
+#ifdef ENABLE_BUS_BF537_STAMP
+
+const urj_bus_driver_t urj_bus_bf537_stamp_bus = {
+ "bf537_stamp",
+ N_("Blackfin BF537 Stamp board bus driver via BSR"),
+ BF537_STAMP_BUS_FUNCTIONS
+};
+
+#endif /* #ifdef ENABLE_BUS_BF537_STAMP */
+
+#ifdef ENABLE_BUS_BF537_EZKIT
+
+const urj_bus_driver_t urj_bus_bf537_ezkit_bus = {
+ "bf537_ezkit",
+ N_("Blackfin BF537 EZ-KIT board bus driver via BSR"),
+ BF537_STAMP_BUS_FUNCTIONS
+};
+
+#endif /* #ifdef ENABLE_BUS_BF537_EZKIT */
+
+#ifdef ENABLE_BUS_BF527_EZKIT
+
+const urj_bus_driver_t urj_bus_bf527_ezkit_bus = {
+ "bf527_ezkit",
+ N_("Blackfin BF527 EZ-KIT board bus driver via BSR"),
+ BF537_STAMP_BUS_FUNCTIONS
+};
+
+#endif /* #ifdef ENABLE_BUS_BF527_EZKIT */
+
+#ifdef ENABLE_BUS_BF538F_EZKIT
+
+const urj_bus_driver_t urj_bus_bf538f_ezkit_bus = {
+ "bf538f_ezkit",
+ N_("Blackfin BF538F EZ-KIT board bus driver"),
+ BF537_STAMP_BUS_FUNCTIONS
+};
+
+#endif /* #ifdef ENABLE_BUS_BF538F_EZKIT */
+
+#ifdef ENABLE_BUS_BF526_EZKIT
+
+const urj_bus_driver_t urj_bus_bf526_ezkit_bus = {
+ "bf526_ezkit",
+ N_("Blackfin BF526 EZ-KIT board bus driver"),
+ BF537_STAMP_BUS_FUNCTIONS
+};
+
+#endif /* #ifdef ENABLE_BUS_BF526_EZKIT */
--- /dev/null
+/*
+ * $Id$
+ *
+ * Analog Devices ADSP-BF548 EZ-KIT Lite bus driver
+ * Copyright (C) 2008 Analog Devices, Inc.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Jie Zhang <jie.zhang@analog.com>, 2008.
+ */
+
+#include <sysdep.h>
+
+#include <stdlib.h>
+#include <stdint.h>
+#include <string.h>
+
+#include <urjtag/part.h>
+#include <urjtag/bus.h>
+#include <urjtag/chain.h>
+#include <urjtag/bssignal.h>
+
+#include "buses.h"
+#include "generic_bus.h"
+
+typedef struct
+{
+ urj_part_signal_t *ams[4];
+ urj_part_signal_t *addr[24];
+ urj_part_signal_t *data[16];
+ urj_part_signal_t *awe;
+ urj_part_signal_t *are;
+ urj_part_signal_t *aoe;
+ urj_part_signal_t *dcs0;
+ urj_part_signal_t *nce;
+} bus_params_t;
+
+#define AMS ((bus_params_t *) bus->params)->ams
+#define ADDR ((bus_params_t *) bus->params)->addr
+#define DATA ((bus_params_t *) bus->params)->data
+#define AOE ((bus_params_t *) bus->params)->aoe
+#define AWE ((bus_params_t *) bus->params)->awe
+#define ARE ((bus_params_t *) bus->params)->are
+#define DCS0 ((bus_params_t *) bus->params)->dcs0
+#define NCE ((bus_params_t *) bus->params)->nce
+
+/**
+ * bus->driver->(*new_bus)
+ *
+ */
+static urj_bus_t *
+bf548_ezkit_bus_new (urj_chain_t *chain, const urj_bus_driver_t *driver,
+ const urj_param_t *cmd_params[])
+{
+ urj_bus_t *bus;
+ urj_part_t *part;
+ char buff[15];
+ int i;
+ int failed = 0;
+
+ bus = urj_bus_generic_new (chain, driver, sizeof (bus_params_t));
+ if (bus == NULL)
+ return NULL;
+ part = bus->part;
+
+ for (i = 0; i < 4; i++)
+ {
+ sprintf (buff, "AMS%dB", i);
+ failed |= urj_bus_generic_attach_sig (part, &(AMS[i]), buff);
+ }
+
+ for (i = 0; i < 3; i++)
+ {
+ sprintf (buff, "ADDR%d", i + 1);
+ failed |= urj_bus_generic_attach_sig (part, &(ADDR[i]), buff);
+ }
+
+ for (i = 3; i < 9; i++)
+ {
+ sprintf (buff, "PORTH_%d", i + 5);
+ failed |= urj_bus_generic_attach_sig (part, &(ADDR[i]), buff);
+ }
+
+ for (i = 9; i < 24; i++)
+ {
+ sprintf (buff, "PORTI_%d", i - 9);
+ failed |= urj_bus_generic_attach_sig (part, &(ADDR[i]), buff);
+ }
+
+ for (i = 0; i < 16; i++)
+ {
+ sprintf (buff, "DATA%d", i);
+ failed |= urj_bus_generic_attach_sig (part, &(DATA[i]), buff);
+ }
+
+ failed |= urj_bus_generic_attach_sig (part, &(AWE), "AWEB");
+
+ failed |= urj_bus_generic_attach_sig (part, &(ARE), "AREB");
+
+ failed |= urj_bus_generic_attach_sig (part, &(AOE), "AOEB");
+
+ failed |= urj_bus_generic_attach_sig (part, &(DCS0), "CS0_B");
+
+ failed |= urj_bus_generic_attach_sig (part, &(NCE), "PORTJ_1");
+
+ if (failed)
+ {
+ urj_bus_generic_free (bus);
+ return NULL;
+ }
+
+ return bus;
+}
+
+/**
+ * bus->driver->(*printinfo)
+ *
+ */
+static void
+bf548_ezkit_bus_printinfo (urj_log_level_t ll, urj_bus_t *bus)
+{
+ int i;
+
+ for (i = 0; i < bus->chain->parts->len; i++)
+ if (bus->part == bus->chain->parts->parts[i])
+ break;
+ urj_log (ll, _("Blackfin BF548 EZ-KIT compatible bus driver via BSR (JTAG part No. %d)\n"),
+ i);
+}
+
+/**
+ * bus->driver->(*area)
+ *
+ */
+static int
+bf548_ezkit_bus_area (urj_bus_t *bus, uint32_t adr, urj_bus_area_t *area)
+{
+ area->description = NULL;
+ area->start = UINT32_C (0x00000000);
+ area->length = UINT64_C (0x100000000);
+ area->width = 16;
+
+ return URJ_STATUS_OK;
+}
+
+static void
+select_flash (urj_bus_t *bus)
+{
+ urj_part_t *p = bus->part;
+
+ urj_part_set_signal (p, AMS[0], 1, 0);
+ urj_part_set_signal (p, AMS[1], 1, 1);
+ urj_part_set_signal (p, AMS[2], 1, 1);
+ urj_part_set_signal (p, AMS[3], 1, 1);
+ urj_part_set_signal (p, DCS0, 1, 1);
+ urj_part_set_signal (p, NCE, 1, 1);
+}
+
+static void
+unselect_flash (urj_bus_t *bus)
+{
+ urj_part_t *p = bus->part;
+
+ urj_part_set_signal (p, AMS[0], 1, 1);
+ urj_part_set_signal (p, AMS[1], 1, 1);
+ urj_part_set_signal (p, AMS[2], 1, 1);
+ urj_part_set_signal (p, AMS[3], 1, 1);
+ urj_part_set_signal (p, DCS0, 1, 1);
+ urj_part_set_signal (p, NCE, 1, 1);
+}
+
+static void
+setup_address (urj_bus_t *bus, uint32_t a)
+{
+ int i;
+ urj_part_t *p = bus->part;
+
+ for (i = 0; i < 24; i++)
+ urj_part_set_signal (p, ADDR[i], 1, (a >> (i + 1)) & 1);
+}
+
+static void
+set_data_in (urj_bus_t *bus)
+{
+ int i;
+ urj_part_t *p = bus->part;
+
+ for (i = 0; i < 16; i++)
+ urj_part_set_signal (p, DATA[i], 0, 0);
+}
+
+static void
+setup_data (urj_bus_t *bus, uint32_t d)
+{
+ int i;
+ urj_part_t *p = bus->part;
+
+ for (i = 0; i < 16; i++)
+ urj_part_set_signal (p, DATA[i], 1, (d >> i) & 1);
+
+}
+
+/**
+ * bus->driver->(*read_start)
+ *
+ */
+static int
+bf548_ezkit_bus_read_start (urj_bus_t *bus, uint32_t adr)
+{
+ urj_part_t *p = bus->part;
+ urj_chain_t *chain = bus->chain;
+
+ select_flash (bus);
+ urj_part_set_signal (p, AOE, 1, 0);
+ urj_part_set_signal (p, ARE, 1, 0);
+ urj_part_set_signal (p, AWE, 1, 1);
+
+ setup_address (bus, adr);
+ set_data_in (bus);
+
+ urj_tap_chain_shift_data_registers (chain, 0);
+
+ return URJ_STATUS_OK;
+}
+
+/**
+ * bus->driver->(*read_next)
+ *
+ */
+static uint32_t
+bf548_ezkit_bus_read_next (urj_bus_t *bus, uint32_t adr)
+{
+ urj_part_t *p = bus->part;
+ urj_chain_t *chain = bus->chain;
+ int i;
+ uint32_t d = 0;
+
+ setup_address (bus, adr);
+ urj_tap_chain_shift_data_registers (chain, 1);
+
+ for (i = 0; i < 16; i++)
+ d |= (uint32_t) (urj_part_get_signal (p, DATA[i]) << i);
+
+ return d;
+}
+
+/**
+ * bus->driver->(*read_end)
+ *
+ */
+static uint32_t
+bf548_ezkit_bus_read_end (urj_bus_t *bus)
+{
+ urj_part_t *p = bus->part;
+ urj_chain_t *chain = bus->chain;
+ int i;
+ uint32_t d = 0;
+
+ urj_part_set_signal (p, AOE, 1, 1);
+ urj_part_set_signal (p, ARE, 1, 1);
+ urj_part_set_signal (p, AWE, 1, 1);
+ unselect_flash (bus);
+
+ urj_tap_chain_shift_data_registers (chain, 1);
+
+ for (i = 0; i < 16; i++)
+ d |= (uint32_t) (urj_part_get_signal (p, DATA[i]) << i);
+
+ return d;
+}
+
+/**
+ * bus->driver->(*write)
+ *
+ */
+static void
+bf548_ezkit_bus_write (urj_bus_t *bus, uint32_t adr, uint32_t data)
+{
+ urj_part_t *p = bus->part;
+ urj_chain_t *chain = bus->chain;
+
+ select_flash (bus);
+ urj_part_set_signal (p, AOE, 1, 0);
+ urj_part_set_signal (p, ARE, 1, 1);
+
+ setup_address (bus, adr);
+ setup_data (bus, data);
+
+ urj_tap_chain_shift_data_registers (chain, 0);
+
+ urj_part_set_signal (p, AWE, 1, 0);
+ urj_tap_chain_shift_data_registers (chain, 0);
+ urj_part_set_signal (p, AWE, 1, 1);
+ urj_part_set_signal (p, AOE, 1, 1);
+ unselect_flash (bus);
+ urj_tap_chain_shift_data_registers (chain, 0);
+}
+
+const urj_bus_driver_t urj_bus_bf548_ezkit_bus = {
+ "bf548_ezkit",
+ N_("Blackfin BF548 EZ-KIT board bus driver"),
+ bf548_ezkit_bus_new,
+ urj_bus_generic_free,
+ bf548_ezkit_bus_printinfo,
+ urj_bus_generic_prepare_extest,
+ bf548_ezkit_bus_area,
+ bf548_ezkit_bus_read_start,
+ bf548_ezkit_bus_read_next,
+ bf548_ezkit_bus_read_end,
+ urj_bus_generic_read,
+ bf548_ezkit_bus_write,
+ urj_bus_generic_no_init
+};
--- /dev/null
+/*
+ * $Id$
+ *
+ * Analog Devices ADSP-BF561 EZ-KIT Lite bus driver
+ * Copyright (C) 2008 Analog Devices, Inc.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Jie Zhang <jie.zhang@analog.com>, 2008.
+ *
+ */
+
+#include <sysdep.h>
+
+#include <stdlib.h>
+#include <stdint.h>
+#include <string.h>
+
+#include <urjtag/part.h>
+#include <urjtag/bus.h>
+#include <urjtag/chain.h>
+#include <urjtag/bssignal.h>
+
+#include "buses.h"
+#include "generic_bus.h"
+
+typedef struct
+{
+ urj_part_signal_t *ams[4];
+ urj_part_signal_t *addr[24];
+ urj_part_signal_t *abe[4];
+ urj_part_signal_t *data[32];
+ urj_part_signal_t *awe;
+ urj_part_signal_t *aoe;
+ urj_part_signal_t *sras;
+ urj_part_signal_t *scas;
+ urj_part_signal_t *sms[4];
+ urj_part_signal_t *swe;
+} bus_params_t;
+
+#define AMS ((bus_params_t *) bus->params)->ams
+#define ADDR ((bus_params_t *) bus->params)->addr
+#define ABE ((bus_params_t *) bus->params)->abe
+#define DATA ((bus_params_t *) bus->params)->data
+#define AWE ((bus_params_t *) bus->params)->awe
+#define AOE ((bus_params_t *) bus->params)->aoe
+#define SRAS ((bus_params_t *) bus->params)->sras
+#define SCAS ((bus_params_t *) bus->params)->scas
+#define SMS ((bus_params_t *) bus->params)->sms
+#define SWE ((bus_params_t *) bus->params)->swe
+
+/**
+ * bus->driver->(*new_bus)
+ *
+ */
+static urj_bus_t *
+bf561_ezkit_bus_new (urj_chain_t *chain, const urj_bus_driver_t *driver,
+ const urj_param_t *cmd_params[])
+{
+ urj_bus_t *bus;
+ urj_part_t *part;
+ char buff[15];
+ int i;
+ int failed = 0;
+
+ bus = urj_bus_generic_new (chain, driver, sizeof (bus_params_t));
+ if (bus == NULL)
+ return NULL;
+ part = bus->part;
+
+ for (i = 0; i < 4; i++)
+ {
+ sprintf (buff, "AMS_B%d", i);
+ failed |= urj_bus_generic_attach_sig (part, &(AMS[i]), buff);
+ }
+
+ for (i = 0; i < 24; i++)
+ {
+ sprintf (buff, "ADDR%d", i + 2);
+ failed |= urj_bus_generic_attach_sig (part, &(ADDR[i]), buff);
+ }
+
+ for (i = 0; i < 4; i++)
+ {
+ sprintf (buff, "ABE_B%d", i);
+ failed |= urj_bus_generic_attach_sig (part, &(ABE[i]), buff);
+ }
+
+ for (i = 0; i < 32; i++)
+ {
+ sprintf (buff, "DATA%d", i);
+ failed |= urj_bus_generic_attach_sig (part, &(DATA[i]), buff);
+ }
+
+ failed |= urj_bus_generic_attach_sig (part, &(AWE), "AWE_B");
+
+ failed |= urj_bus_generic_attach_sig (part, &(AOE), "AOE_B");
+
+ failed |= urj_bus_generic_attach_sig (part, &(SRAS), "SRAS_B");
+
+ failed |= urj_bus_generic_attach_sig (part, &(SCAS), "SCAS_B");
+
+ failed |= urj_bus_generic_attach_sig (part, &(SWE), "SWE_B");
+
+ for (i = 0; i < 4; i++)
+ {
+ sprintf (buff, "SMS_B%d", i);
+ failed |= urj_bus_generic_attach_sig (part, &(SMS[i]), buff);
+ }
+
+ if (failed)
+ {
+ urj_bus_generic_free (bus);
+ return NULL;
+ }
+
+ return bus;
+}
+
+/**
+ * bus->driver->(*printinfo)
+ *
+ */
+static void
+bf561_ezkit_bus_printinfo (urj_log_level_t ll, urj_bus_t *bus)
+{
+ int i;
+
+ for (i = 0; i < bus->chain->parts->len; i++)
+ if (bus->part == bus->chain->parts->parts[i])
+ break;
+ urj_log (ll, _("Blackfin BF561 EZ-KIT compatible bus driver via BSR (JTAG part No. %d)\n"),
+ i);
+}
+
+/**
+ * bus->driver->(*area)
+ *
+ */
+static int
+bf561_ezkit_bus_area (urj_bus_t *bus, uint32_t addr, urj_bus_area_t *area)
+{
+ area->description = NULL;
+ area->start = UINT32_C (0x00000000);
+ area->length = UINT64_C (0x100000000);
+ area->width = 16;
+ return URJ_STATUS_OK;
+}
+
+static void
+select_flash (urj_bus_t *bus)
+{
+ urj_part_t *p = bus->part;
+
+ urj_part_set_signal (p, AMS[0], 1, 0);
+ urj_part_set_signal (p, AMS[1], 1, 1);
+ urj_part_set_signal (p, AMS[2], 1, 1);
+ urj_part_set_signal (p, AMS[3], 1, 1);
+
+ urj_part_set_signal (p, ABE[0], 1, 0);
+ urj_part_set_signal (p, ABE[1], 1, 0);
+ urj_part_set_signal (p, ABE[2], 1, 0);
+ urj_part_set_signal (p, ABE[3], 1, 0);
+
+ urj_part_set_signal (p, SRAS, 1, 1);
+ urj_part_set_signal (p, SCAS, 1, 1);
+ urj_part_set_signal (p, SWE, 1, 1);
+ urj_part_set_signal (p, SMS[0], 1, 1);
+ urj_part_set_signal (p, SMS[1], 1, 1);
+ urj_part_set_signal (p, SMS[2], 1, 1);
+ urj_part_set_signal (p, SMS[3], 1, 1);
+}
+
+static void
+unselect_flash (urj_bus_t *bus)
+{
+ urj_part_t *p = bus->part;
+
+ urj_part_set_signal (p, AMS[0], 1, 1);
+ urj_part_set_signal (p, AMS[1], 1, 1);
+ urj_part_set_signal (p, AMS[2], 1, 1);
+ urj_part_set_signal (p, AMS[3], 1, 1);
+
+ urj_part_set_signal (p, ABE[0], 1, 1);
+ urj_part_set_signal (p, ABE[1], 1, 1);
+ urj_part_set_signal (p, ABE[2], 1, 1);
+ urj_part_set_signal (p, ABE[3], 1, 1);
+
+ urj_part_set_signal (p, SRAS, 1, 1);
+ urj_part_set_signal (p, SCAS, 1, 1);
+ urj_part_set_signal (p, SWE, 1, 1);
+ urj_part_set_signal (p, SMS[0], 1, 1);
+ urj_part_set_signal (p, SMS[1], 1, 1);
+ urj_part_set_signal (p, SMS[2], 1, 1);
+ urj_part_set_signal (p, SMS[3], 1, 1);
+}
+
+static void
+setup_address (urj_bus_t *bus, uint32_t a)
+{
+ int i;
+ urj_part_t *p = bus->part;
+
+ for (i = 0; i < 24; i++)
+ urj_part_set_signal (p, ADDR[i], 1, (a >> (i + 2)) & 1);
+ urj_part_set_signal (p, ABE[3], 1, (a >> 1) & 1);
+}
+
+static void
+set_data_in (urj_bus_t *bus)
+{
+ int i;
+ urj_part_t *p = bus->part;
+
+ for (i = 0; i < 16; i++)
+ urj_part_set_signal (p, DATA[i], 0, 0);
+}
+
+static void
+setup_data (urj_bus_t *bus, uint32_t d)
+{
+ int i;
+ urj_part_t *p = bus->part;
+
+ for (i = 0; i < 16; i++)
+ urj_part_set_signal (p, DATA[i], 1, (d >> i) & 1);
+
+}
+
+/**
+ * bus->driver->(*read_start)
+ *
+ */
+static int
+bf561_ezkit_bus_read_start (urj_bus_t *bus, uint32_t adr)
+{
+ urj_part_t *p = bus->part;
+ urj_chain_t *chain = bus->chain;
+
+ select_flash (bus);
+ urj_part_set_signal (p, AOE, 1, 0);
+ urj_part_set_signal (p, AWE, 1, 1);
+
+ setup_address (bus, adr);
+ set_data_in (bus);
+
+ urj_tap_chain_shift_data_registers (chain, 0);
+
+ return URJ_STATUS_OK;
+}
+
+/**
+ * bus->driver->(*read_next)
+ *
+ */
+static uint32_t
+bf561_ezkit_bus_read_next (urj_bus_t *bus, uint32_t adr)
+{
+ urj_part_t *p = bus->part;
+ urj_chain_t *chain = bus->chain;
+ int i;
+ uint32_t d = 0;
+
+ setup_address (bus, adr);
+ urj_tap_chain_shift_data_registers (chain, 1);
+
+ for (i = 0; i < 16; i++)
+ d |= (uint32_t) (urj_part_get_signal (p, DATA[i]) << i);
+
+ return d;
+}
+
+/**
+ * bus->driver->(*read_end)
+ *
+ */
+static uint32_t
+bf561_ezkit_bus_read_end (urj_bus_t *bus)
+{
+ urj_part_t *p = bus->part;
+ urj_chain_t *chain = bus->chain;
+ int i;
+ uint32_t d = 0;
+
+ unselect_flash (bus);
+ urj_part_set_signal (p, AOE, 1, 1);
+ urj_part_set_signal (p, AWE, 1, 1);
+
+ urj_tap_chain_shift_data_registers (chain, 1);
+
+ for (i = 0; i < 16; i++)
+ d |= (uint32_t) (urj_part_get_signal (p, DATA[i]) << i);
+
+ return d;
+}
+
+/**
+ * bus->driver->(*write)
+ *
+ */
+static void
+bf561_ezkit_bus_write (urj_bus_t *bus, uint32_t adr, uint32_t data)
+{
+ urj_part_t *p = bus->part;
+ urj_chain_t *chain = bus->chain;
+
+ select_flash (bus);
+ urj_part_set_signal (p, AOE, 1, 1);
+
+ setup_address (bus, adr);
+ setup_data (bus, data);
+
+ urj_tap_chain_shift_data_registers (chain, 0);
+
+ urj_part_set_signal (p, AWE, 1, 0);
+ urj_tap_chain_shift_data_registers (chain, 0);
+ urj_part_set_signal (p, AWE, 1, 1);
+ unselect_flash (bus);
+ urj_tap_chain_shift_data_registers (chain, 0);
+}
+
+const urj_bus_driver_t urj_bus_bf561_ezkit_bus = {
+ "bf561_ezkit",
+ N_("Blackfin BF561 EZ-KIT board bus driver"),
+ bf561_ezkit_bus_new,
+ urj_bus_generic_free,
+ bf561_ezkit_bus_printinfo,
+ urj_bus_generic_prepare_extest,
+ bf561_ezkit_bus_area,
+ bf561_ezkit_bus_read_start,
+ bf561_ezkit_bus_read_next,
+ bf561_ezkit_bus_read_end,
+ urj_bus_generic_read,
+ bf561_ezkit_bus_write,
+ urj_bus_generic_no_init
+};
--- /dev/null
+/*
+ * $Id$
+ *
+ * Busdriver for flashaccess on the Goepel "Boundary Scan Coach" training board
+ * www.goepel.com
+ * The flash has 1Mbit but only 15 address lines are connected.
+ * So only 4Kbit can be accessed.
+ * Erfurt, Oct. 10th M. Schneider www.masla.de
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ */
+
+#include <sysdep.h>
+
+#include <stdlib.h>
+#include <stdint.h>
+#include <string.h>
+
+#include <urjtag/part.h>
+#include <urjtag/bus.h>
+#include <urjtag/chain.h>
+#include <urjtag/bssignal.h>
+#include <urjtag/tap_state.h>
+
+#include "buses.h"
+#include "generic_bus.h"
+
+
+typedef struct
+{
+ uint32_t last_adr;
+ urj_part_signal_t *adr[15];
+ urj_part_signal_t *d[8];
+ urj_part_signal_t *deca;
+ urj_part_signal_t *decb;
+ urj_part_signal_t *decc;
+ urj_part_signal_t *we_f;
+ urj_part_signal_t *oe_f;
+} bus_params_t;
+
+#define LAST_ADR ((bus_params_t *) bus->params)->last_adr
+#define ADR ((bus_params_t *) bus->params)->adr
+#define D ((bus_params_t *) bus->params)->d
+#define DECA ((bus_params_t *) bus->params)->deca
+#define DECB ((bus_params_t *) bus->params)->decb
+#define DECC ((bus_params_t *) bus->params)->decc
+#define WE_F ((bus_params_t *) bus->params)->we_f
+#define OE_F ((bus_params_t *) bus->params)->oe_f
+
+
+/**
+ * bus->driver->(*new_bus)
+ *
+ */
+static urj_bus_t *
+flashbscoach_bus_new (urj_chain_t *chain, const urj_bus_driver_t *driver,
+ const urj_param_t *cmd_params[])
+{
+ urj_bus_t *bus;
+ urj_part_t *part;
+ int failed = 0;
+
+ bus = urj_bus_generic_new (chain, driver, sizeof (bus_params_t));
+ if (bus == NULL)
+ return NULL;
+ part = bus->part;
+
+ //OE & WE
+ failed |= urj_bus_generic_attach_sig (part, &(OE_F), "PB02_00");
+ failed |= urj_bus_generic_attach_sig (part, &(WE_F), "PB02_08");
+ //Decoder
+ failed |= urj_bus_generic_attach_sig (part, &(DECA), "PB02_04");
+ failed |= urj_bus_generic_attach_sig (part, &(DECB), "PB00_12");
+ failed |= urj_bus_generic_attach_sig (part, &(DECC), "PB02_07");
+ //Adressbus
+ failed |= urj_bus_generic_attach_sig (part, &(ADR[0]), "PB01_09");
+ failed |= urj_bus_generic_attach_sig (part, &(ADR[1]), "PB01_06");
+ failed |= urj_bus_generic_attach_sig (part, &(ADR[2]), "PB01_10");
+ failed |= urj_bus_generic_attach_sig (part, &(ADR[3]), "PB01_11");
+ failed |= urj_bus_generic_attach_sig (part, &(ADR[4]), "PB01_12");
+ failed |= urj_bus_generic_attach_sig (part, &(ADR[5]), "PB01_13");
+ failed |= urj_bus_generic_attach_sig (part, &(ADR[6]), "PB01_15");
+ failed |= urj_bus_generic_attach_sig (part, &(ADR[7]), "PB01_14");
+ failed |= urj_bus_generic_attach_sig (part, &(ADR[8]), "PB01_16");
+ failed |= urj_bus_generic_attach_sig (part, &(ADR[9]), "PB00_01");
+ failed |= urj_bus_generic_attach_sig (part, &(ADR[10]), "PB00_04");
+ failed |= urj_bus_generic_attach_sig (part, &(ADR[11]), "PB00_05");
+ failed |= urj_bus_generic_attach_sig (part, &(ADR[12]), "PB00_00");
+ failed |= urj_bus_generic_attach_sig (part, &(ADR[13]), "PB00_07");
+ failed |= urj_bus_generic_attach_sig (part, &(ADR[14]), "PB00_02");
+ //Datenbus
+ failed |= urj_bus_generic_attach_sig (part, &(D[0]), "PB00_10");
+ failed |= urj_bus_generic_attach_sig (part, &(D[1]), "PB00_06");
+ failed |= urj_bus_generic_attach_sig (part, &(D[2]), "PB00_13");
+ failed |= urj_bus_generic_attach_sig (part, &(D[3]), "PB00_09");
+ failed |= urj_bus_generic_attach_sig (part, &(D[4]), "PB00_14");
+ failed |= urj_bus_generic_attach_sig (part, &(D[5]), "PB00_16");
+ failed |= urj_bus_generic_attach_sig (part, &(D[6]), "PB02_01");
+ failed |= urj_bus_generic_attach_sig (part, &(D[7]), "PB00_11");
+
+ if (failed)
+ {
+ urj_bus_generic_free (bus);
+ return NULL;
+ }
+
+ return bus;
+}
+
+/**
+ * bus->driver->(*printinfo)
+ *
+ */
+static void
+flashbscoach_bus_printinfo (urj_log_level_t ll, urj_bus_t *bus)
+{
+ int i;
+
+ for (i = 0; i < bus->chain->parts->len; i++)
+ if (bus->part == bus->chain->parts->parts[i])
+ break;
+ urj_log (ll,
+ _("Goepel electronic Boundary Scan Coach compatible bus driver via BSR (JTAG part No. %d)\n"),
+ i);
+}
+
+
+
+
+
+
+
+/**
+ * bus->driver->(*init)
+ *
+ */
+static int
+flashbscoach_bus_init (urj_bus_t *bus)
+{
+ urj_part_t *p = bus->part;
+ urj_chain_t *chain = bus->chain;
+ int i = 0;
+
+ if (urj_tap_state (chain) != URJ_TAP_STATE_RUN_TEST_IDLE)
+ {
+ /* silently skip initialization if TAP isn't in RUNTEST/IDLE state
+ this is required to avoid interfering with detect when initbus
+ is contained in the part description file
+ URJ_BUS_INIT() will be called latest by URJ_BUS_PREPARE() */
+ return URJ_STATUS_OK;
+ }
+
+
+ urj_part_set_instruction (p, "SAMPLE/PRELOAD");
+ urj_tap_chain_shift_instructions (chain);
+
+ urj_part_set_signal (p, DECA, 1, 1);
+ urj_part_set_signal (p, DECB, 1, 1);
+ urj_part_set_signal (p, DECC, 1, 1);
+ urj_part_set_signal (p, OE_F, 1, 1); //OE_F low aktiv
+ urj_part_set_signal (p, WE_F, 1, 1); //WE_F low aktiv
+
+ for (i = 0; i < 15; i++)
+ urj_part_set_signal (p, ADR[i], 1, 1);
+
+ urj_part_set_signal (p, D[0], 1, 0);
+ urj_part_set_signal (p, D[1], 1, 0);
+ urj_part_set_signal (p, D[2], 1, 0);
+ urj_part_set_signal (p, D[3], 1, 0);
+ urj_part_set_signal (p, D[4], 1, 0);
+ urj_part_set_signal (p, D[5], 1, 0);
+ urj_part_set_signal (p, D[6], 1, 0);
+ urj_part_set_signal (p, D[7], 1, 0);
+
+ urj_tap_chain_shift_data_registers (chain, 0);
+
+ bus->initialized = 1;
+
+ return URJ_STATUS_OK;
+}
+
+
+/**
+ * bus->driver->(*area)
+ *
+ */
+static int
+flashbscoach_bus_area (urj_bus_t *bus, uint32_t adr, urj_bus_area_t *area)
+{
+ area->description = NULL;
+ area->start = UINT32_C (0x00000000);
+ area->length = UINT64_C (0x00100000000);
+ area->width = 8;
+// area->width = urj_part_get_signal( bus->part, urj_part_find_signal( bus->part, "ROMSIZ" ) ) ? 16 : 32;
+
+
+ return 0;
+
+
+}
+static void
+setup_data (urj_bus_t *bus, uint32_t d)
+{
+ int i;
+ urj_part_t *p = bus->part;
+ urj_bus_area_t area;
+
+ flashbscoach_bus_area (bus, 0, &area);
+
+
+
+ for (i = 0; i < area.width; i++)
+ urj_part_set_signal (p, D[i], 1, (d >> i) & 1);
+}
+
+static void
+set_data_in (urj_bus_t *bus)
+{
+
+ urj_part_t *p = bus->part;
+ urj_bus_area_t area;
+
+ flashbscoach_bus_area (bus, 0, &area);
+
+ urj_part_set_signal (p, D[0], 0, 0);
+ urj_part_set_signal (p, D[1], 0, 0);
+ urj_part_set_signal (p, D[2], 0, 0);
+ urj_part_set_signal (p, D[3], 0, 0);
+ urj_part_set_signal (p, D[4], 0, 0);
+ urj_part_set_signal (p, D[5], 0, 0);
+ urj_part_set_signal (p, D[6], 0, 0);
+ urj_part_set_signal (p, D[7], 0, 0);
+}
+static void
+setup_address (urj_bus_t *bus, uint32_t a)
+{
+ int i;
+ urj_part_t *p = bus->part;
+
+ for (i = 0; i < 15; i++)
+ urj_part_set_signal (p, ADR[i], 1, (a >> i) & 1);
+}
+
+static uint32_t
+get_data_out (urj_bus_t *bus)
+{
+ int i;
+ urj_part_t *p = bus->part;
+ urj_bus_area_t area;
+ uint32_t d = 0;
+
+ flashbscoach_bus_area (bus, 0, &area);
+
+ for (i = 0; i < area.width; i++)
+ d |= (uint32_t) (urj_part_get_signal (p, D[i]) << i);
+
+ return d;
+}
+
+/**
+ * bus->driver->(*read_start)
+ *
+ */
+static int
+flashbscoach_bus_read_start (urj_bus_t *bus, uint32_t adr)
+{
+ urj_part_t *p = bus->part;
+ urj_chain_t *chain = bus->chain;
+
+ LAST_ADR = adr;
+
+ urj_part_set_signal (p, DECA, 1, 0);
+ urj_part_set_signal (p, DECB, 1, 1);
+ urj_part_set_signal (p, DECC, 1, 1);
+ urj_part_set_signal (p, OE_F, 1, 0); //OE_F low aktiv
+ urj_part_set_signal (p, WE_F, 1, 1); //WE_F low aktiv
+
+ setup_address (bus, adr);
+ set_data_in (bus);
+
+ urj_tap_chain_shift_data_registers (chain, 0);
+
+ return URJ_STATUS_OK;
+}
+
+/**
+ * bus->driver->(*read_next)
+ *
+ */
+static uint32_t
+flashbscoach_bus_read_next (urj_bus_t *bus, uint32_t adr)
+{
+// urj_part_t *p = bus->part;
+ urj_chain_t *chain = bus->chain;
+
+
+ setup_address (bus, adr);
+ urj_tap_chain_shift_data_registers (chain, 1);
+
+// d = get_data_out( bus );
+// LAST_ADR = adr;
+ return get_data_out (bus);
+
+}
+
+/**
+ * bus->driver->(*read_end)
+ *
+ */
+static uint32_t
+flashbscoach_bus_read_end (urj_bus_t *bus)
+{
+ urj_part_t *p = bus->part;
+ urj_chain_t *chain = bus->chain;
+
+
+
+ urj_part_set_signal (p, DECA, 1, 1);
+ urj_part_set_signal (p, DECB, 1, 1);
+ urj_part_set_signal (p, DECC, 1, 1);
+ urj_part_set_signal (p, OE_F, 1, 1); //OE_F low aktiv
+ urj_part_set_signal (p, WE_F, 1, 1); //WE_F low aktiv
+
+ urj_tap_chain_shift_data_registers (chain, 1);
+
+ return get_data_out (bus);
+
+}
+
+/**
+ * bus->driver->(*write)
+ *
+ */
+static void
+flashbscoach_bus_write (urj_bus_t *bus, uint32_t adr, uint32_t data)
+{
+ urj_part_t *p = bus->part;
+ urj_chain_t *chain = bus->chain;
+ urj_part_set_signal (p, DECA, 1, 0);
+ urj_part_set_signal (p, DECB, 1, 1);
+ urj_part_set_signal (p, DECC, 1, 1);
+ urj_part_set_signal (p, OE_F, 1, 1); //OE_F low aktiv
+ urj_part_set_signal (p, WE_F, 1, 1); //WE_F low aktiv
+
+ setup_address (bus, adr);
+ setup_data (bus, data);
+
+ urj_tap_chain_shift_data_registers (chain, 0);
+
+ urj_part_set_signal (p, WE_F, 1, 0);
+ urj_tap_chain_shift_data_registers (chain, 0);
+
+ urj_part_set_signal (p, DECA, 1, 1);
+ urj_part_set_signal (p, DECB, 1, 1);
+ urj_part_set_signal (p, DECC, 1, 1);
+ urj_part_set_signal (p, OE_F, 1, 1); //OE_F low aktiv
+ urj_part_set_signal (p, WE_F, 1, 1); //WE_F low aktiv
+
+ urj_tap_chain_shift_data_registers (chain, 0);
+}
+
+const urj_bus_driver_t urj_bus_bscoach_bus = {
+ "flashbscoach",
+ N_("Goepel Boundary Scan Coach compatible bus driver for flash programming via BSR"),
+ flashbscoach_bus_new,
+ urj_bus_generic_free,
+ flashbscoach_bus_printinfo,
+ urj_bus_generic_prepare_extest,
+ flashbscoach_bus_area,
+ flashbscoach_bus_read_start,
+ flashbscoach_bus_read_next,
+ flashbscoach_bus_read_end,
+ urj_bus_generic_read,
+ flashbscoach_bus_write,
+ flashbscoach_bus_init
+};
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2003 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2003.
+ *
+ */
+
+#include <sysdep.h>
+
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+
+#include <urjtag/error.h>
+#include <urjtag/bus.h>
+#include <urjtag/chain.h>
+#include <urjtag/part.h>
+
+#include "buses.h"
+
+const urj_bus_driver_t *urj_bus_drivers[] = {
+#ifdef ENABLE_BUS_AU1500
+ &urj_bus_au1500_bus,
+#endif
+#ifdef ENABLE_BUS_AVR32
+ &urj_bus_avr32_bus_driver,
+#endif
+#ifdef ENABLE_BUS_BCM1250
+ &urj_bus_bcm1250_bus,
+#endif
+#ifdef ENABLE_BUS_BF526_EZKIT
+ &urj_bus_bf526_ezkit_bus,
+#endif
+#ifdef ENABLE_BUS_BF527_EZKIT
+ &urj_bus_bf527_ezkit_bus,
+#endif
+#ifdef ENABLE_BUS_BF533_STAMP
+ &urj_bus_bf533_stamp_bus,
+#endif
+#ifdef ENABLE_BUS_BF533_EZKIT
+ &urj_bus_bf533_ezkit_bus,
+#endif
+#ifdef ENABLE_BUS_BF537_STAMP
+ &urj_bus_bf537_stamp_bus,
+#endif
+#ifdef ENABLE_BUS_BF537_EZKIT
+ &urj_bus_bf537_ezkit_bus,
+#endif
+#ifdef ENABLE_BUS_BF538F_EZKIT
+ &urj_bus_bf538f_ezkit_bus,
+#endif
+#ifdef ENABLE_BUS_BF548_EZKIT
+ &urj_bus_bf548_ezkit_bus,
+#endif
+#ifdef ENABLE_BUS_BF561_EZKIT
+ &urj_bus_bf561_ezkit_bus,
+#endif
+#ifdef ENABLE_BUS_BSCOACH
+ &urj_bus_bscoach_bus,
+#endif
+#ifdef ENABLE_BUS_EJTAG
+ &urj_bus_ejtag_bus,
+ &urj_bus_ejtag_dma_bus,
+#endif
+#ifdef ENABLE_BUS_FJMEM
+ &urj_bus_fjmem_bus,
+#endif
+#ifdef ENABLE_BUS_IXP425
+ &urj_bus_ixp425_bus,
+#endif
+#ifdef ENABLE_BUS_IXP435
+ &urj_bus_ixp435_bus,
+#endif
+#ifdef ENABLE_BUS_JOPCYC
+ &urj_bus_jopcyc_bus,
+#endif
+#ifdef ENABLE_BUS_H7202
+ &urj_bus_h7202_bus,
+#endif
+#ifdef ENABLE_BUS_LH7A400
+ &urj_bus_lh7a400_bus,
+#endif
+#ifdef ENABLE_BUS_MPC5200
+ &urj_bus_mpc5200_bus,
+#endif
+#ifdef ENABLE_BUS_MPC824X
+ &urj_bus_mpc824x_bus,
+#endif
+#ifdef ENABLE_BUS_PPC405EP
+ &urj_bus_ppc405ep_bus,
+#endif
+#ifdef ENABLE_BUS_PPC440GX_EBC8
+ &urj_bus_ppc440gx_ebc8_bus,
+#endif
+#ifdef ENABLE_BUS_PROTOTYPE
+ &urj_bus_prototype_bus,
+#endif
+#ifdef ENABLE_BUS_PXA2X0
+ &urj_bus_pxa2x0_bus,
+#endif
+#ifdef ENABLE_BUS_PXA27X
+ &urj_bus_pxa27x_bus,
+#endif
+#ifdef ENABLE_BUS_S3C4510
+ &urj_bus_s3c4510_bus,
+#endif
+#ifdef ENABLE_BUS_SA1110
+ &urj_bus_sa1110_bus,
+#endif
+#ifdef ENABLE_BUS_SH7727
+ &urj_bus_sh7727_bus,
+#endif
+#ifdef ENABLE_BUS_SH7750R
+ &urj_bus_sh7750r_bus,
+#endif
+#ifdef ENABLE_BUS_SH7751R
+ &urj_bus_sh7751r_bus,
+#endif
+#ifdef ENABLE_BUS_SHARC_21065L
+ &urj_bus_sharc_21065L_bus,
+#endif
+#ifdef ENABLE_BUS_SLSUP3
+ &urj_bus_slsup3_bus,
+#endif
+#ifdef ENABLE_BUS_TX4925
+ &urj_bus_tx4925_bus,
+#endif
+#ifdef ENABLE_BUS_ZEFANT_XS3
+ &urj_bus_zefant_xs3_bus,
+#endif
+ NULL /* last must be NULL */
+};
+
+urj_bus_t *urj_bus = NULL;
+urj_buses_t urj_buses = { 0, NULL };
+
+void
+urj_bus_buses_free (void)
+{
+ int i;
+
+ for (i = 0; i < urj_buses.len; i++)
+ URJ_BUS_FREE (urj_buses.buses[i]);
+
+ free (urj_buses.buses);
+ urj_buses.len = 0;
+ urj_buses.buses = NULL;
+ urj_bus = NULL;
+}
+
+int
+urj_bus_buses_add (urj_bus_t *abus)
+{
+ urj_bus_t **b;
+
+ if (abus == NULL)
+ {
+ urj_error_set (URJ_ERROR_INVALID, "abus == NULL");
+ return URJ_STATUS_FAIL;
+ }
+
+ b = realloc (urj_buses.buses, (urj_buses.len + 1) * sizeof (urj_bus_t *));
+ if (b == NULL)
+ {
+ urj_error_set (URJ_ERROR_OUT_OF_MEMORY, _("realloc(%s,%zd) fails"),
+ "urj_buses.buses",
+ (urj_buses.len + 1) * sizeof (urj_bus_t *));
+ return URJ_STATUS_FAIL;
+ }
+ urj_buses.buses = b;
+ urj_buses.buses[urj_buses.len++] = abus;
+ if (urj_bus == NULL)
+ urj_bus = abus;
+
+ return URJ_STATUS_OK;
+}
+
+int
+urj_bus_buses_delete (urj_bus_t *abus)
+{
+ int i;
+ urj_bus_t **b;
+
+ for (i = 0; i < urj_buses.len; i++)
+ if (abus == urj_buses.buses[i])
+ break;
+ if (i >= urj_buses.len)
+ {
+ urj_error_set (URJ_ERROR_NOTFOUND, "abus not in global bus list");
+ return URJ_STATUS_FAIL;
+ }
+
+ while (i + 1 < urj_buses.len)
+ {
+ urj_buses.buses[i] = urj_buses.buses[i + 1];
+ i++;
+ }
+ urj_buses.len--;
+ b = realloc (urj_buses.buses, urj_buses.len * sizeof (urj_bus_t *));
+ if (b == NULL && urj_buses.len > 0)
+ {
+ urj_error_set (URJ_ERROR_OUT_OF_MEMORY, _("realloc(%s,%zd) fails"),
+ "urj_buses.buses", urj_buses.len * sizeof (urj_bus_t *));
+ return URJ_STATUS_FAIL;
+ }
+ urj_buses.buses = b;
+
+ if (urj_bus == abus)
+ {
+ if (urj_buses.len > 0)
+ urj_bus = urj_buses.buses[0];
+ // @@@@ RFHH else: urj_bus is a dangling pointer?
+ else
+ urj_bus = NULL;
+ }
+
+ return URJ_STATUS_OK;
+}
+
+int
+urj_bus_buses_set (int n)
+{
+ if (n >= urj_buses.len)
+ {
+ urj_error_set(URJ_ERROR_INVALID, _("invalid bus number"));
+ return URJ_STATUS_FAIL;
+ }
+
+ urj_bus = urj_buses.buses[n];
+
+ return URJ_STATUS_OK;
+}
+
+urj_bus_t *
+urj_bus_init_bus (urj_chain_t *chain, const urj_bus_driver_t *bus_driver,
+ const urj_param_t *param[])
+{
+ urj_bus_t *abus;
+ int i;
+
+ if (urj_tap_chain_active_part (chain) == NULL)
+ return NULL;
+
+ abus = bus_driver->new_bus (chain, bus_driver, param);
+ if (abus == NULL)
+ // retain error state
+ return NULL;
+
+ if (urj_bus_buses_add (abus) != URJ_STATUS_OK)
+ {
+ // @@@@ RFHH I added this FREE() + bail out. Is that correct?
+ URJ_BUS_FREE(abus);
+ return NULL;
+ }
+
+ if (URJ_BUS_INIT (abus) != URJ_STATUS_OK)
+ {
+ // @@@@ RFHH I added this FREE() + bail out. Is that correct?
+ URJ_BUS_FREE(abus);
+ return NULL;
+ }
+
+ for (i = 0; i < urj_buses.len; i++)
+ if (urj_buses.buses[i] == urj_bus)
+ break;
+ if (i != urj_buses.len - 1)
+ urj_log (URJ_LOG_LEVEL_NORMAL, _("Initialized bus %d, active bus %d\n"),
+ urj_buses.len - 1, i);
+
+ return abus;
+}
+
+static urj_param_descr_t bus_param[] =
+{
+ { URJ_BUS_PARAM_KEY_MUX, URJ_PARAM_TYPE_BOOL, "MUX", },
+ { URJ_BUS_PARAM_KEY_OCD, URJ_PARAM_TYPE_BOOL, "OCD", },
+ { URJ_BUS_PARAM_KEY_HSBC, URJ_PARAM_TYPE_BOOL, "HSBC", },
+ { URJ_BUS_PARAM_KEY_HSBU, URJ_PARAM_TYPE_BOOL, "HSBU", },
+ { URJ_BUS_PARAM_KEY_X8, URJ_PARAM_TYPE_BOOL, "X8", },
+ { URJ_BUS_PARAM_KEY_X16, URJ_PARAM_TYPE_BOOL, "X16", },
+ { URJ_BUS_PARAM_KEY_X32, URJ_PARAM_TYPE_BOOL, "X32", },
+ { URJ_BUS_PARAM_KEY_WIDTH, URJ_PARAM_TYPE_LU, "WIDTH", },
+ { URJ_BUS_PARAM_KEY_AMODE, URJ_PARAM_TYPE_LU, "AMODE", },
+ { URJ_BUS_PARAM_KEY_OPCODE, URJ_PARAM_TYPE_STRING, "OPCODE", },
+ { URJ_BUS_PARAM_KEY_LEN, URJ_PARAM_TYPE_LU, "LEN", },
+ { URJ_BUS_PARAM_KEY_ALSB, URJ_PARAM_TYPE_STRING, "ALSB", },
+ { URJ_BUS_PARAM_KEY_AMSB, URJ_PARAM_TYPE_STRING, "AMSB", },
+ { URJ_BUS_PARAM_KEY_DLSB, URJ_PARAM_TYPE_STRING, "DLSB", },
+ { URJ_BUS_PARAM_KEY_DMSB, URJ_PARAM_TYPE_STRING, "DMSB", },
+ { URJ_BUS_PARAM_KEY_CS, URJ_PARAM_TYPE_STRING, "CS", },
+ { URJ_BUS_PARAM_KEY_NCS, URJ_PARAM_TYPE_STRING, "NCS", },
+ { URJ_BUS_PARAM_KEY_OE, URJ_PARAM_TYPE_STRING, "OE", },
+ { URJ_BUS_PARAM_KEY_NOE, URJ_PARAM_TYPE_STRING, "NOE", },
+ { URJ_BUS_PARAM_KEY_WE, URJ_PARAM_TYPE_STRING, "WE", },
+ { URJ_BUS_PARAM_KEY_NWE, URJ_PARAM_TYPE_STRING, "NWE", },
+ { URJ_BUS_PARAM_KEY_REVBITS, URJ_PARAM_TYPE_BOOL, "REVBITS", },
+ { URJ_BUS_PARAM_KEY_HELP, URJ_PARAM_TYPE_BOOL, "HELP", },
+ { URJ_BUS_PARAM_KEY_DBGaDDR, URJ_PARAM_TYPE_BOOL, "DBGaDDR", },
+ { URJ_BUS_PARAM_KEY_DBGdATA, URJ_PARAM_TYPE_BOOL, "DBGdATA", },
+};
+
+const urj_param_list_t urj_bus_param_list =
+{
+ .list = bus_param,
+ .n = sizeof bus_param / sizeof bus_param[0],
+};
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2003 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2003.
+ *
+ */
+
+#ifndef URJ_BUS_BUSES_H
+#define URJ_BUS_BUSES_H
+
+extern const urj_bus_driver_t urj_bus_au1500_bus;
+extern const urj_bus_driver_t urj_bus_avr32_bus_driver;
+extern const urj_bus_driver_t urj_bus_bcm1250_bus;
+extern const urj_bus_driver_t urj_bus_bf526_ezkit_bus;
+extern const urj_bus_driver_t urj_bus_bf527_ezkit_bus;
+extern const urj_bus_driver_t urj_bus_bf533_stamp_bus;
+extern const urj_bus_driver_t urj_bus_bf533_ezkit_bus;
+extern const urj_bus_driver_t urj_bus_bf537_stamp_bus;
+extern const urj_bus_driver_t urj_bus_bf537_ezkit_bus;
+extern const urj_bus_driver_t urj_bus_bf538f_ezkit_bus;
+extern const urj_bus_driver_t urj_bus_bf548_ezkit_bus;
+extern const urj_bus_driver_t urj_bus_bf561_ezkit_bus;
+extern const urj_bus_driver_t urj_bus_bscoach_bus;
+extern const urj_bus_driver_t urj_bus_ejtag_bus;
+extern const urj_bus_driver_t urj_bus_fjmem_bus;
+extern const urj_bus_driver_t urj_bus_h7202_bus;
+extern const urj_bus_driver_t urj_bus_ixp425_bus;
+extern const urj_bus_driver_t urj_bus_ixp435_bus;
+extern const urj_bus_driver_t urj_bus_jopcyc_bus;
+extern const urj_bus_driver_t urj_bus_lh7a400_bus;
+extern const urj_bus_driver_t urj_bus_mpc5200_bus;
+extern const urj_bus_driver_t urj_bus_mpc824x_bus;
+extern const urj_bus_driver_t urj_bus_ppc405ep_bus;
+extern const urj_bus_driver_t urj_bus_ppc440gx_ebc8_bus;
+extern const urj_bus_driver_t urj_bus_prototype_bus;
+extern const urj_bus_driver_t urj_bus_pxa2x0_bus;
+extern const urj_bus_driver_t urj_bus_pxa27x_bus;
+extern const urj_bus_driver_t urj_bus_s3c4510_bus;
+extern const urj_bus_driver_t urj_bus_sa1110_bus;
+extern const urj_bus_driver_t urj_bus_sh7727_bus;
+extern const urj_bus_driver_t urj_bus_sh7750r_bus;
+extern const urj_bus_driver_t urj_bus_sh7751r_bus;
+extern const urj_bus_driver_t urj_bus_sharc_21065L_bus;
+extern const urj_bus_driver_t urj_bus_slsup3_bus;
+extern const urj_bus_driver_t urj_bus_tx4925_bus;
+extern const urj_bus_driver_t urj_bus_zefant_xs3_bus;
+extern const urj_bus_driver_t urj_bus_ejtag_dma_bus;
+#endif /* URJ_BUS_BUSES_H */
--- /dev/null
+/*
+ * $Id$
+ *
+ * EJTAG compatible bus driver via PrAcc
+ * Copyright (C) 2005, Marek Michalkiewicz
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marek Michalkiewicz <marekm@amelek.gda.pl>, 2005.
+ *
+ * Documentation:
+ * [1] MIPS Licensees, "MIPS EJTAG Debug Solution", 980818 Rev. 2.0.0
+ * [2] MIPS Technologies, Inc. "EJTAG Specification", 2001-02-15, Rev. 2.60
+ *
+ */
+
+#include <sysdep.h>
+
+#include <stdlib.h>
+#include <stdint.h>
+#include <string.h>
+
+#include <urjtag/part.h>
+#include <urjtag/bus.h>
+#include <urjtag/chain.h>
+#include <urjtag/bssignal.h>
+#include <urjtag/tap_state.h>
+#include <urjtag/tap_register.h>
+#include <urjtag/data_register.h>
+
+#include "buses.h"
+#include "generic_bus.h"
+
+typedef struct
+{
+ uint32_t impcode; /* EJTAG Implementation Register */
+ uint16_t adr_hi; /* cached high bits of $3 */
+} bus_params_t;
+
+#define BP ((bus_params_t *) bus->params)
+
+#define EJTAG_VER ((BP->impcode >> 29) & 7)
+
+#define EJTAG_20 0
+#define EJTAG_25 1
+#define EJTAG_26 2
+#define EJTAG_31 3
+
+/* EJTAG 3.1 Control Register Bits */
+#define VPED 23 /* R */
+/* EJTAG 2.6 Control Register Bits */
+#define Rocc 31 /* R/W0 */
+#define Psz1 30 /* R */
+#define Psz0 29 /* R */
+#define Doze 22 /* R */
+#define ProbTrap 14 /* R/W */
+#define DebugMode 3 /* R */
+/* EJTAG 1.5.3 Control Register Bits */
+#define Dnm 28 /* */
+#define Sync 23 /* R/W */
+#define Run 21 /* R */
+#define PerRst 20 /* R/W */
+#define PRnW 19 /* R 0 = Read, 1 = Write */
+#define PrAcc 18 /* R/W0 */
+#define DmaAcc 17 /* R/W */
+#define PrRst 16 /* R/W */
+#define ProbEn 15 /* R/W */
+#define SetDev 14 /* R */
+#define JtagBrk 12 /* R/W1 */
+#define DStrt 11 /* R/W1 */
+#define DeRR 10 /* R */
+#define DrWn 9 /* R/W */
+#define Dsz1 8 /* R/W */
+#define Dsz0 7 /* R/W */
+#define DLock 5 /* R/W */
+#define BrkSt 3 /* R */
+#define TIF 2 /* W0/R */
+#define TOF 1 /* W0/R */
+#define ClkEn 0 /* R/W */
+
+/* EJTAG 3.1 Debug Control Register at drseg 0xFF300000 */
+#define PCS 9 /* R */
+#define PCR2 8 /* R/W */
+#define PCR1 7 /* R/W */
+#define PCR0 6 /* R/W */
+/* EJTAG 2.X Debug Control Register at drseg 0xFF300000 */
+#define DataBrk 17 /* R */
+#define InstBrk 16 /* R */
+#define NMIPend 2 /* R */
+#define SRstE 1 /* R/W */
+#define DCRProbeEn 0 /* R */
+/* EJTAG 1.5.3 Debug Control Register at drseg 0xFF300000*/
+#define HIS 30 /* R */
+#define ENM 29 /* R 0=Little End,1=Big Endian */
+#define MIntE 4 /* R/W */
+#define MNmiE 3 /* R/W */
+#define MemProt 2 /* R/W 0=WriteOK,1=Protected */
+#define MRst 1 /* R/W */
+#define TraceMode 0 /* R/W */
+
+/**
+ * bus->driver->(*new_bus)
+ *
+ */
+static urj_bus_t *
+ejtag_bus_new (urj_chain_t *chain, const urj_bus_driver_t *driver,
+ const urj_param_t *cmd_params[])
+{
+ return urj_bus_generic_new (chain, driver, sizeof (bus_params_t));
+}
+
+/**
+ * bus->driver->(*printinfo)
+ *
+ */
+static void
+ejtag_bus_printinfo (urj_log_level_t ll, urj_bus_t *bus)
+{
+ int i;
+
+ for (i = 0; i < bus->chain->parts->len; i++)
+ if (bus->part == bus->chain->parts->parts[i])
+ break;
+ urj_log (ll, _("EJTAG compatible bus driver via PrAcc (JTAG part No. %d)\n"),
+ i);
+}
+
+static uint32_t
+reg_value (urj_tap_register_t *reg)
+{
+ uint32_t retval = 0;
+ int i;
+
+ for (i = 0; i < reg->len; i++)
+ {
+ if (reg->data[i])
+ retval |= (1 << i);
+ }
+ return retval;
+}
+
+static uint32_t
+ejtag_run_pracc (urj_bus_t *bus, const uint32_t *code, unsigned int len)
+{
+ urj_data_register_t *ejaddr, *ejdata, *ejctrl;
+ int i, pass;
+ uint32_t addr, data, retval;
+
+ ejaddr = urj_part_find_data_register (bus->part, "EJADDRESS");
+ ejdata = urj_part_find_data_register (bus->part, "EJDATA");
+ ejctrl = urj_part_find_data_register (bus->part, "EJCONTROL");
+ if (!(ejaddr && ejdata && ejctrl))
+ {
+ urj_error_set (URJ_ERROR_NOTFOUND,
+ _("EJADDRESS, EJDATA or EJCONTROL register not found"));
+ return 0;
+ }
+
+ urj_part_set_instruction (bus->part, "EJTAG_CONTROL");
+ urj_tap_chain_shift_instructions (bus->chain);
+
+ pass = 0;
+ retval = 0;
+
+ for (;;)
+ {
+ ejctrl->in->data[PrAcc] = 1;
+ urj_tap_chain_shift_data_registers (bus->chain, 0);
+ urj_tap_chain_shift_data_registers (bus->chain, 1);
+
+ urj_log (URJ_LOG_LEVEL_ALL, "ctrl=%s\n",
+ urj_tap_register_get_string (ejctrl->out));
+
+ if (ejctrl->out->data[Rocc])
+ {
+ urj_error_set (URJ_ERROR_BUS, _("Reset occurred, ctrl=%s"),
+ urj_tap_register_get_string (ejctrl->out));
+ bus->initialized = 0;
+ break;
+ }
+ if (!ejctrl->out->data[PrAcc])
+ {
+ urj_error_set (URJ_ERROR_BUS, _("No processor access, ctrl=%s"),
+ urj_tap_register_get_string (ejctrl->out));
+ bus->initialized = 0;
+ break;
+ }
+
+ urj_part_set_instruction (bus->part, "EJTAG_ADDRESS");
+ urj_tap_chain_shift_instructions (bus->chain);
+
+ urj_tap_chain_shift_data_registers (bus->chain, 1);
+ addr = reg_value (ejaddr->out);
+ if (addr & 3)
+ {
+ urj_error_set (URJ_ERROR_BUS,
+ _("PrAcc bad alignment: addr=0x%08lx"),
+ (long unsigned) addr);
+ addr &= ~3;
+ }
+
+ urj_part_set_instruction (bus->part, "EJTAG_DATA");
+ urj_tap_chain_shift_instructions (bus->chain);
+
+ urj_tap_register_fill (ejdata->in, 0);
+
+ if (ejctrl->out->data[PRnW])
+ {
+ urj_tap_chain_shift_data_registers (bus->chain, 1);
+ data = reg_value (ejdata->out);
+ urj_log (URJ_LOG_LEVEL_ALL,
+ _("%s(%d) PrAcc write: addr=0x%08lx data=0x%08lx\n"),
+ __FILE__, __LINE__,
+ (long unsigned) addr, (long unsigned) data);
+ if (addr == UINT32_C (0xff200000))
+ {
+ /* Return value from the target CPU. */
+ retval = data;
+ }
+ else
+ {
+ urj_error_set (URJ_ERROR_BUS,
+ _("Unknown write addr=0x%08lx data=0x%08lx"),
+ (long unsigned) addr, (long unsigned) data);
+ }
+ }
+ else
+ {
+ if (addr == UINT32_C (0xff200200) && pass++)
+ break;
+
+ data = 0;
+ if (addr >= 0xff200200 && addr < 0xff200200 + (len << 2))
+ {
+ data = code[(addr - 0xff200200) >> 2];
+
+ for (i = 0; i < 32; i++)
+ ejdata->in->data[i] = (data >> i) & 1;
+ }
+ urj_log (URJ_LOG_LEVEL_ALL,
+ "%s(%d) PrAcc read: addr=0x%08lx data=0x%08lx\n",
+ __FILE__, __LINE__,
+ (long unsigned) addr, (long unsigned) data);
+ urj_tap_chain_shift_data_registers (bus->chain, 0);
+ }
+
+ urj_part_set_instruction (bus->part, "EJTAG_CONTROL");
+ urj_tap_chain_shift_instructions (bus->chain);
+
+ ejctrl->in->data[PrAcc] = 0;
+ urj_tap_chain_shift_data_registers (bus->chain, 0);
+ }
+ return retval;
+}
+
+static int
+ejtag_bus_init (urj_bus_t *bus)
+{
+ urj_data_register_t *ejctrl, *ejimpl, *ejaddr, *ejdata, *ejall;
+ uint32_t code[4] = {
+ 0x3c04ff20, // lui $4,0xff20
+ 0x349f0200, // ori $31,$4,0x0200
+ 0x03e00008, // jr $31
+ 0x3c030000 // lui $3,0
+ };
+
+ if (urj_tap_state (bus->chain) != URJ_TAP_STATE_RUN_TEST_IDLE)
+ {
+ /* silently skip initialization if TAP isn't in RUNTEST/IDLE state
+ this is required to avoid interfering with detect when initbus
+ is contained in the part description file
+ URJ_BUS_INIT() will be called latest by URJ_BUS_PREPARE() */
+ return URJ_STATUS_OK;
+ }
+
+ ejctrl = urj_part_find_data_register (bus->part, "EJCONTROL");
+ ejimpl = urj_part_find_data_register (bus->part, "EJIMPCODE");
+ ejaddr = urj_part_find_data_register (bus->part, "EJADDRESS");
+ ejdata = urj_part_find_data_register (bus->part, "EJDATA");
+ ejall = urj_part_find_data_register (bus->part, "EJALL");
+ if (!(ejctrl && ejimpl))
+ {
+ urj_error_set (URJ_ERROR_NOTFOUND,
+ _("EJCONTROL or EJIMPCODE register not found"));
+ return URJ_STATUS_FAIL;
+ }
+
+ urj_part_set_instruction (bus->part, "EJTAG_IMPCODE");
+ urj_tap_chain_shift_instructions (bus->chain);
+ urj_tap_chain_shift_data_registers (bus->chain, 0); //Write
+ urj_tap_chain_shift_data_registers (bus->chain, 1); //Read
+ urj_log (URJ_LOG_LEVEL_NORMAL, "ImpCode=%s %08lX\n",
+ urj_tap_register_get_string (ejimpl->out),
+ (long unsigned) reg_value (ejimpl->out));
+ BP->impcode = reg_value (ejimpl->out);
+
+ switch (EJTAG_VER)
+ {
+ case EJTAG_20:
+ urj_log (URJ_LOG_LEVEL_NORMAL, "EJTAG version: <= 2.0\n");
+ break;
+ case EJTAG_25:
+ urj_log (URJ_LOG_LEVEL_NORMAL, "EJTAG version: 2.5\n");
+ break;
+ case EJTAG_26:
+ urj_log (URJ_LOG_LEVEL_NORMAL, "EJTAG version: 2.6\n");
+ break;
+ case EJTAG_31:
+ urj_log (URJ_LOG_LEVEL_NORMAL, "EJTAG version: 3.1\n");
+ break;
+ default:
+ urj_log (URJ_LOG_LEVEL_NORMAL, "EJTAG version: unknown (%lu)\n",
+ (long unsigned) EJTAG_VER);
+ }
+ urj_log (URJ_LOG_LEVEL_NORMAL,
+ "EJTAG Implementation flags:%s%s%s%s%s%s%s\n",
+ (BP->impcode & (1 << 28)) ? " R3k" : " R4k",
+ (BP->impcode & (1 << 24)) ? " DINTsup" : "",
+ (BP->impcode & (1 << 22)) ? " ASID_8" : "",
+ (BP->impcode & (1 << 21)) ? " ASID_6" : "",
+ (BP->impcode & (1 << 16)) ? " MIPS16" : "",
+ (BP->impcode & (1 << 14)) ? " NoDMA" : " DMA",
+ (BP->impcode & (1)) ? " MIPS64" : " MIPS32");
+
+ if (EJTAG_VER >= EJTAG_25)
+ {
+ urj_part_set_instruction (bus->part, "EJTAGBOOT");
+ urj_tap_chain_shift_instructions (bus->chain);
+ }
+ urj_part_set_instruction (bus->part, "EJTAG_CONTROL");
+ urj_tap_chain_shift_instructions (bus->chain);
+ //Reset
+ urj_tap_register_fill (ejctrl->in, 0);
+ ejctrl->in->data[PrRst] = 1;
+ ejctrl->in->data[PerRst] = 1;
+ urj_tap_chain_shift_data_registers (bus->chain, 0); //Write
+ ejctrl->in->data[PrRst] = 0;
+ ejctrl->in->data[PerRst] = 0;
+ urj_tap_chain_shift_data_registers (bus->chain, 0); //Write
+//
+ if (EJTAG_VER == EJTAG_20)
+ {
+ // Try enabling memory write on EJTAG_20 (BCM6348)
+ // Badly Copied from HairyDairyMaid V4.8
+ //ejtag_dma_write(0xff300000, (ejtag_dma_read(0xff300000) & ~(1<<2)) );
+ urj_log (URJ_LOG_LEVEL_ALL, "Set Address to READ from\n");
+ urj_log (URJ_LOG_LEVEL_ALL, "Select EJTAG ADDRESS Register\n");
+ urj_part_set_instruction (bus->part, "EJTAG_ADDRESS");
+ urj_tap_chain_shift_instructions (bus->chain);
+ //Set to Debug Control Register Address, 0xFF300000
+ urj_tap_register_init (ejaddr->in,
+ "11111111001100000000000000000000");
+ urj_log (URJ_LOG_LEVEL_ALL, "Write to ejaddr->in =%s %08lX\n",
+ urj_tap_register_get_string (ejaddr->in),
+ (unsigned long) reg_value (ejaddr->in));
+ urj_tap_chain_shift_data_registers (bus->chain, 0); //Write
+ urj_log (URJ_LOG_LEVEL_ALL, "Select EJTAG CONTROL Register\n");
+ urj_part_set_instruction (bus->part, "EJTAG_CONTROL");
+ urj_tap_chain_shift_instructions (bus->chain);
+ //Set some bits in CONTROL Register 0x00068B00
+ urj_tap_register_fill (ejctrl->in, 0); // Clear Register
+ ejctrl->in->data[PrAcc] = 1; // 18----|||
+ ejctrl->in->data[DmaAcc] = 1; // 17----|||
+ ejctrl->in->data[ProbEn] = 1; // 15-----||
+ ejctrl->in->data[DStrt] = 1; // 11------|
+ ejctrl->in->data[DrWn] = 1; // 9-------|
+ ejctrl->in->data[Dsz1] = 1; // 8-------| DMA_WORD = 0x00000100 = Bit8
+ urj_tap_chain_shift_data_registers (bus->chain, 1); //WriteRead
+ urj_log (URJ_LOG_LEVEL_ALL, "Write To ejctrl->in =%s %08lX\n",
+ urj_tap_register_get_string (ejctrl->in),
+ (unsigned long) reg_value (ejctrl->in));
+ urj_log (URJ_LOG_LEVEL_ALL, "Read From ejctrl->out =%s %08lX\n",
+ urj_tap_register_get_string (ejctrl->out),
+ (unsigned long) reg_value (ejctrl->out));
+ do
+ {
+ urj_log (URJ_LOG_LEVEL_ALL, "Wait for DStrt to clear\n");
+ urj_part_set_instruction (bus->part, "EJTAG_CONTROL");
+ urj_tap_chain_shift_instructions (bus->chain);
+ urj_tap_register_fill (ejctrl->in, 0);
+ //Set some bits in CONTROL Register 0x00068000
+ ejctrl->in->data[PrAcc] = 1; // 18----||
+ ejctrl->in->data[DmaAcc] = 1; // 17----||
+ ejctrl->in->data[ProbEn] = 1; // 15-----|
+ urj_tap_chain_shift_data_registers (bus->chain, 1); //WriteRead
+ urj_log (URJ_LOG_LEVEL_ALL, "Write To ejctrl->in =%s %08lX\n",
+ urj_tap_register_get_string (ejctrl->in),
+ (unsigned long) reg_value (ejctrl->in));
+ urj_log (URJ_LOG_LEVEL_ALL, "Read From ejctrl->out =%s %08lX\n",
+ urj_tap_register_get_string( ejctrl->out),
+ (unsigned long) reg_value (ejctrl->out));
+ }
+ while (ejctrl->out->data[DStrt] == 1);
+ urj_log (URJ_LOG_LEVEL_ALL, "Select EJTAG DATA Register\n");
+ urj_part_set_instruction (bus->part, "EJTAG_DATA");
+ urj_tap_chain_shift_instructions (bus->chain);
+ urj_tap_register_fill (ejdata->in, 0); // Clear Register
+ urj_tap_chain_shift_data_registers (bus->chain, 1); //WriteRead
+ urj_log (URJ_LOG_LEVEL_ALL, "Write To ejdata->in =%s %08lX\n",
+ urj_tap_register_get_string (ejdata->in),
+ (unsigned long) reg_value (ejdata->in));
+ urj_log (URJ_LOG_LEVEL_ALL, "Read From ejdata->out =%s %08lX\n",
+ urj_tap_register_get_string (ejdata->out),
+ (unsigned long) reg_value (ejdata->out));
+ urj_log (URJ_LOG_LEVEL_ALL, "Select EJTAG CONTROL Register\n");
+ urj_part_set_instruction (bus->part, "EJTAG_CONTROL");
+ urj_tap_chain_shift_instructions (bus->chain);
+ urj_tap_register_fill (ejctrl->in, 0);
+ //Set some bits in CONTROL Register 0x00048000
+ ejctrl->in->data[PrAcc] = 1; // 18----||
+ ejctrl->in->data[ProbEn] = 1; // 15-----|
+ urj_tap_chain_shift_data_registers (bus->chain, 1); //WriteRead
+ urj_log (URJ_LOG_LEVEL_ALL, "Write To ejctrl->in =%s %08lX\n",
+ urj_tap_register_get_string (ejctrl->in),
+ (unsigned long) reg_value (ejctrl->in));
+ urj_log (URJ_LOG_LEVEL_ALL, "Read From ejctrl->out =%s %08lX\n",
+ urj_tap_register_get_string (ejctrl->out),
+ (unsigned long) reg_value (ejctrl->out));
+ if (ejctrl->out->data[DeRR] == 1)
+ {
+ urj_error_set (URJ_ERROR_BUS_DMA, "DMA READ ERROR");
+ }
+ //Now have data from DCR, need to reset the MP Bit (2) and write it back out
+ urj_tap_register_init (ejdata->in,
+ urj_tap_register_get_string (ejdata->out));
+ ejdata->in->data[MemProt] = 0;
+ urj_log (URJ_LOG_LEVEL_ALL, "Need to Write ejdata-> =%s %08lX\n",
+ urj_tap_register_get_string (ejdata->in),
+ (unsigned long) reg_value (ejdata->in));
+
+ // Now the Write
+ urj_log (URJ_LOG_LEVEL_ALL, "Set Address To Write To\n");
+ urj_log (URJ_LOG_LEVEL_ALL, "Select EJTAG ADDRESS Register\n");
+ urj_part_set_instruction (bus->part, "EJTAG_ADDRESS");
+ urj_tap_chain_shift_instructions (bus->chain);
+ urj_tap_register_init (ejaddr->in,
+ "11111111001100000000000000000000");
+ urj_log (URJ_LOG_LEVEL_ALL, "Write to ejaddr->in =%s %08lX\n",
+ urj_tap_register_get_string (ejaddr->in),
+ (unsigned long) reg_value (ejaddr->in));
+ //This appears to be a write with NO Read
+ urj_tap_chain_shift_data_registers (bus->chain, 0); //Write
+ urj_log (URJ_LOG_LEVEL_ALL, "Select EJTAG DATA Register\n");
+ urj_part_set_instruction (bus->part, "EJTAG_DATA");
+ urj_tap_chain_shift_instructions (bus->chain);
+ //The value is already in ejdata->in, so write it
+ urj_log (URJ_LOG_LEVEL_ALL, "Write To ejdata->in =%s %08lX\n",
+ urj_tap_register_get_string (ejdata->in),
+ (unsigned long) reg_value (ejdata->in));
+ urj_tap_chain_shift_data_registers (bus->chain, 0); //Write
+ urj_log (URJ_LOG_LEVEL_ALL, "Select EJTAG CONTROL Register\n");
+ urj_part_set_instruction (bus->part, "EJTAG_CONTROL");
+ urj_tap_chain_shift_instructions (bus->chain);
+
+ //Set some bits in CONTROL Register
+ urj_tap_register_fill (ejctrl->in, 0); // Clear Register
+ ejctrl->in->data[DmaAcc] = 1; // 17
+ ejctrl->in->data[Dsz1] = 1; // DMA_WORD = 0x00000100 = Bit8
+ ejctrl->in->data[DStrt] = 1; // 11
+ ejctrl->in->data[ProbEn] = 1; // 15
+ ejctrl->in->data[PrAcc] = 1; // 18
+ urj_tap_chain_shift_data_registers (bus->chain, 1); //Write/Read
+ urj_log (URJ_LOG_LEVEL_ALL, "Write to ejctrl->in =%s %08lX\n",
+ urj_tap_register_get_string (ejctrl->in),
+ (unsigned long) reg_value (ejctrl->in));
+ urj_log (URJ_LOG_LEVEL_ALL, "Read from ejctrl->out =%s %08lX\n",
+ urj_tap_register_get_string (ejctrl->out),
+ (unsigned long) reg_value (ejctrl->out));
+ do
+ {
+ urj_log (URJ_LOG_LEVEL_ALL, "Wait for DStrt to clear\n");
+ //Might not need these 2 lines
+ urj_part_set_instruction (bus->part, "EJTAG_CONTROL");
+ urj_tap_chain_shift_instructions (bus->chain);
+ ejctrl->in->data[DmaAcc] = 1; // 17
+ ejctrl->in->data[ProbEn] = 1; // 15
+ ejctrl->in->data[PrAcc] = 1; // 18
+ urj_tap_chain_shift_data_registers (bus->chain, 1); //Write/Read
+ urj_log (URJ_LOG_LEVEL_ALL, "Write to ejctrl->in =%s %08lX\n",
+ urj_tap_register_get_string (ejctrl->in),
+ (unsigned long) reg_value (ejctrl->in));
+ urj_log (URJ_LOG_LEVEL_ALL, "Read from ejctrl->out =%s %08lX\n",
+ urj_tap_register_get_string (ejctrl->out),
+ (unsigned long) reg_value (ejctrl->out));
+ }
+ while (ejctrl->out->data[DStrt] == 1);
+ urj_log (URJ_LOG_LEVEL_ALL, "Select EJTAG CONTROL Register\n");
+ urj_part_set_instruction (bus->part, "EJTAG_CONTROL");
+ urj_tap_chain_shift_instructions (bus->chain);
+ urj_tap_register_fill (ejctrl->in, 0);
+ //Set some bits in CONTROL Register 0x00048000
+ ejctrl->in->data[PrAcc] = 1; // 18----||
+ ejctrl->in->data[ProbEn] = 1; // 15-----|
+ urj_tap_chain_shift_data_registers (bus->chain, 1); //Write/Read
+ urj_log (URJ_LOG_LEVEL_ALL, "Write To ejctrl->in =%s %08lX\n",
+ urj_tap_register_get_string (ejctrl->in),
+ (unsigned long) reg_value (ejctrl->in));
+ urj_log (URJ_LOG_LEVEL_ALL, "Read From ejctrl->out =%s %08lX\n",
+ urj_tap_register_get_string (ejctrl->out),
+ (unsigned long) reg_value (ejctrl->out));
+ if (ejctrl->out->data[DeRR] == 1)
+ {
+ urj_error_set (URJ_ERROR_BUS_DMA, "DMA WRITE ERROR");
+ }
+ }
+
+ urj_part_set_instruction (bus->part, "EJTAG_CONTROL");
+ urj_tap_chain_shift_instructions (bus->chain);
+
+ urj_tap_register_fill (ejctrl->in, 0);
+ ejctrl->in->data[PrAcc] = 1;
+ ejctrl->in->data[ProbEn] = 1;
+ if (EJTAG_VER >= EJTAG_25)
+ {
+ ejctrl->in->data[ProbTrap] = 1;
+ ejctrl->in->data[Rocc] = 1;
+ }
+ urj_tap_chain_shift_data_registers (bus->chain, 0);
+
+ ejctrl->in->data[PrAcc] = 1;
+ ejctrl->in->data[ProbEn] = 1;
+ ejctrl->in->data[ProbTrap] = 1;
+ ejctrl->in->data[JtagBrk] = 1;
+
+ urj_tap_chain_shift_data_registers (bus->chain, 0);
+
+ ejctrl->in->data[JtagBrk] = 0;
+ urj_tap_chain_shift_data_registers (bus->chain, 1);
+
+ if (!ejctrl->out->data[BrkSt])
+ {
+ urj_error_set (URJ_ERROR_ILLEGAL_STATE,
+ _("Failed to enter debug mode, ctrl=%s"),
+ urj_tap_register_get_string (ejctrl->out));
+ return URJ_STATUS_FAIL;
+ }
+ else
+ {
+ urj_log (URJ_LOG_LEVEL_NORMAL, "Processor entered Debug Mode.\n");
+ }
+ if (ejctrl->out->data[Rocc])
+ {
+ ejctrl->in->data[Rocc] = 0;
+ urj_tap_chain_shift_data_registers (bus->chain, 0);
+ ejctrl->in->data[Rocc] = 1;
+ urj_tap_chain_shift_data_registers (bus->chain, 1);
+ }
+
+ //HDM now Clears Watchdog
+
+
+ ejtag_run_pracc (bus, code, 4);
+ BP->adr_hi = 0;
+ bus->initialized = 1;
+ return URJ_STATUS_OK;
+}
+
+/**
+ * bus->driver->(*prepare)
+ *
+ */
+static void
+ejtag_bus_prepare (urj_bus_t *bus)
+{
+ if (!bus->initialized)
+ URJ_BUS_INIT (bus);
+}
+
+/**
+ * bus->driver->(*area)
+ *
+ */
+static int
+ejtag_bus_area (urj_bus_t *bus, uint32_t adr, urj_bus_area_t *area)
+{
+ if (adr < UINT32_C (0x20000000))
+ {
+ area->description = NULL;
+ area->start = UINT32_C (0x00000000);
+ area->length = UINT64_C (0x20000000);
+ area->width = 8;
+ }
+ else if (adr < UINT32_C (0x40000000))
+ {
+ area->description = NULL;
+ area->start = UINT32_C (0x20000000);
+ area->length = UINT64_C (0x20000000);
+ area->width = 16;
+ }
+ else if (adr < UINT32_C (0x60000000))
+ {
+ area->description = NULL;
+ area->start = UINT32_C (0x40000000);
+ area->length = UINT64_C (0x20000000);
+ area->width = 32;
+ }
+ else
+ {
+ area->description = NULL;
+ area->start = UINT32_C (0x60000000);
+ area->length = UINT64_C (0xa0000000);
+ area->width = 0;
+ }
+ return URJ_STATUS_OK;
+}
+
+static int
+ejtag_gen_read (urj_bus_t *bus, uint32_t *code, uint32_t adr)
+{
+ uint16_t adr_hi, adr_lo;
+ uint32_t *p = code;
+
+ /* 16-bit signed offset, phys -> kseg1 */
+ adr_lo = adr & 0xffff;
+ adr_hi = ((adr >> 16) & 0x1fff);
+ /* Increment adr_hi if adr_lo < 0 */
+ adr_hi += (adr_lo >> 15);
+ /* Bypass cache */
+ adr_hi += 0xa000;
+
+ if (BP->adr_hi != adr_hi)
+ {
+ BP->adr_hi = adr_hi;
+ *p++ = 0x3c030000 | adr_hi; // lui $3,adr_hi
+ }
+ switch (adr >> 29)
+ {
+ case 0:
+ *p++ = 0x90620000 | adr_lo; // lbu $2,adr_lo($3)
+ break;
+ case 1:
+ *p++ = 0x94620000 | (adr_lo & ~1); // lhu $2,adr_lo($3)
+ break;
+ case 2:
+ *p++ = 0x8c620000 | (adr_lo & ~3); // lw $2,adr_lo($3)
+ break;
+ default: /* unknown bus width */
+ *p++ = 0x00001025; // move $2,$0
+ break;
+ }
+ *p++ = 0x03e00008; // jr $31
+ return p - code;
+}
+
+/**
+ * bus->driver->(*read_start)
+ *
+ */
+static int
+ejtag_bus_read_start (urj_bus_t *bus, uint32_t adr)
+{
+ uint32_t code[3];
+
+ ejtag_run_pracc (bus, code, ejtag_gen_read (bus, code, adr));
+ urj_log (URJ_LOG_LEVEL_COMM, "URJ_BUS_READ_START: adr=0x%08lx\n",
+ (long unsigned) adr);
+
+ return URJ_STATUS_OK;
+}
+
+/**
+ * bus->driver->(*read_next)
+ *
+ */
+static uint32_t
+ejtag_bus_read_next (urj_bus_t *bus, uint32_t adr)
+{
+ uint32_t d;
+ uint32_t code[4], *p = code;
+
+ *p++ = 0xac820000; // sw $2,0($4)
+ p += ejtag_gen_read (bus, p, adr);
+
+ d = ejtag_run_pracc (bus, code, p - code);
+
+ urj_log (URJ_LOG_LEVEL_COMM,
+ "URJ_BUS_READ_NEXT: adr=0x%08lx data=0x%08lx\n",
+ (long unsigned) adr, (long unsigned) d);
+ return d;
+}
+
+/**
+ * bus->driver->(*read_end)
+ *
+ */
+static uint32_t
+ejtag_bus_read_end (urj_bus_t *bus)
+{
+ uint32_t d;
+ static const uint32_t code[2] = {
+ 0xac820000, // sw $2,0($4)
+ 0x03e00008 // jr $31
+ };
+
+ d = ejtag_run_pracc (bus, code, 2);
+
+ urj_log (URJ_LOG_LEVEL_COMM, "URJ_BUS_READ_END: data=0x%08lx\n",
+ (long unsigned) d);
+ return d;
+}
+
+/**
+ * bus->driver->(*write)
+ *
+ */
+static void
+ejtag_bus_write (urj_bus_t *bus, uint32_t adr, uint32_t data)
+{
+ uint16_t adr_hi, adr_lo;
+ uint32_t code[5], *p = code;
+
+ /* 16-bit signed offset, phys -> kseg1 */
+ adr_lo = adr & 0xffff;
+ adr_hi = ((adr >> 16) & 0x1fff) + (adr_lo >> 15) + 0xa000;
+
+ if (BP->adr_hi != adr_hi)
+ {
+ BP->adr_hi = adr_hi;
+ *p++ = 0x3c030000 | adr_hi; // lui $3,adr_hi
+ }
+ switch (adr >> 29)
+ {
+ case 0:
+ *p++ = 0x34020000 | (data & 0xff); // li $2,data
+ *p++ = 0xa0620000 | adr_lo; // sb $2,adr_lo($3)
+ break;
+ case 1:
+ *p++ = 0x34020000 | (data & 0xffff); // li $2,data
+ *p++ = 0xa4620000 | (adr_lo & ~1); // sh $2,adr_lo($3)
+ break;
+ case 2:
+ *p++ = 0x3c020000 | (data >> 16); // lui $2,data_hi
+ *p++ = 0x34420000 | (data & 0xffff); // ori $2,data_lo
+ *p++ = 0xac620000 | (adr_lo & ~3); // sw $2,adr_lo($3)
+ break;
+ }
+ *p++ = 0x03e00008; // jr $31
+
+ ejtag_run_pracc (bus, code, p - code);
+
+ urj_log (URJ_LOG_LEVEL_COMM,
+ "URJ_BUS_WRITE: adr=0x%08lx data=0x%08lx\n",
+ (long unsigned) adr, (long unsigned) data);
+}
+
+const urj_bus_driver_t urj_bus_ejtag_bus = {
+ "ejtag",
+ N_("EJTAG compatible bus driver via PrAcc"),
+ ejtag_bus_new,
+ urj_bus_generic_free,
+ ejtag_bus_printinfo,
+ ejtag_bus_prepare,
+ ejtag_bus_area,
+ ejtag_bus_read_start,
+ ejtag_bus_read_next,
+ ejtag_bus_read_end,
+ urj_bus_generic_read,
+ ejtag_bus_write,
+ ejtag_bus_init
+};
--- /dev/null
+/*
+ * $Id$
+ *
+ * EJTAG compatible bus driver via DMA
+ * Copyright (C) 2008, Julien Aube
+ * Credits goes to
+ * - Marek Michalkiewicz (EJTAG Pracc driver),
+ * - HairyDairyMaid for the HairyDairyMaid v48 utility,
+ * - Florian Fanelli for the help on the flash interface infos,
+ * - All others who contributed to the previous projetcs
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marek Michalkiewicz <marekm@amelek.gda.pl>, 2005.
+ *
+ * Documentation:
+ * [1] MIPS Licensees, "MIPS EJTAG Debug Solution", 980818 Rev. 2.0.0
+ * [2] MIPS Technologies, Inc. "EJTAG Specification", 2001-02-15, Rev. 2.60
+ *
+ *
+ */
+
+#include <sysdep.h>
+
+#include <stdlib.h>
+#include <stdint.h>
+#include <string.h>
+
+#include <urjtag/part.h>
+#include <urjtag/bus.h>
+#include <urjtag/chain.h>
+#include <urjtag/bssignal.h>
+#include <urjtag/tap_state.h>
+#include <urjtag/tap_register.h>
+#include <urjtag/data_register.h>
+
+#include "buses.h"
+#include "generic_bus.h"
+
+typedef struct
+{
+ uint32_t impcode; /* EJTAG Implementation Register */
+} bus_params_t;
+
+#define BP ((bus_params_t *) bus->params)
+
+#define EJTAG_VER ((BP->impcode >> 29) & 7)
+#define EJTAG_20 0
+#define EJTAG_25 1
+#define EJTAG_26 2
+
+/* EJTAG control register bits */
+#define PerRst 20
+#define PRnW 19
+#define PrAcc 18
+#define PrRst 16
+#define ProbEn 15
+#define JtagBrk 12
+#define BrkSt 3
+#define Rocc 31
+#define ProbTrap 14
+
+/* DMA */
+#define DmaAcc 17
+#define DstRt 11
+#define DmaRwn 9
+#define Derr 10
+// default : DMA tranfser size BYTE
+#define DMA_HALFWORD 7
+#define DMA_WORD 8
+#define DMA_BYTE 0
+
+/**
+ * bus->driver->(*new_bus)
+ *
+ */
+static urj_bus_t *
+ejtag_dma_bus_new (urj_chain_t *chain, const urj_bus_driver_t *driver,
+ const urj_param_t *cmd_params[])
+{
+ urj_bus_t *bus;
+
+ bus = urj_bus_generic_new (chain, driver, sizeof (bus_params_t));
+ if (bus == NULL)
+ return NULL;
+
+ return bus;
+}
+
+/**
+ * bus->driver->(*printinfo)
+ *
+ */
+static void
+ejtag_dma_bus_printinfo (urj_log_level_t ll, urj_bus_t *bus)
+{
+ int i;
+
+ for (i = 0; i < bus->chain->parts->len; i++)
+ if (bus->part == bus->chain->parts->parts[i])
+ break;
+ urj_log (ll, _("EJTAG compatible bus driver via DMA (JTAG part No. %d)\n"),
+ i);
+}
+
+/**
+ * helper function
+ *
+ */
+static uint32_t
+reg_value (urj_tap_register_t *reg)
+{
+ uint32_t retval = 0;
+ int i;
+
+ for (i = 0; i < reg->len; i++)
+ {
+ if (reg->data[i])
+ retval |= (1 << i);
+ }
+ return retval;
+}
+
+/* Small debug helper */
+static char
+siz_ (int sz)
+{
+ switch (sz)
+ {
+ case DMA_WORD:
+ return 'w';
+ case DMA_BYTE:
+ return 'b';
+ case DMA_HALFWORD:
+ return 'h';
+ default:
+ return 'e';
+ }
+ return 'E';
+}
+
+/**
+ * low-level dma write
+ *
+ */
+static void
+ejtag_dma_write (urj_bus_t *bus, unsigned int addr, unsigned int data, int sz)
+{
+ static urj_data_register_t *ejctrl = NULL;
+ static urj_data_register_t *ejaddr = NULL;
+ static urj_data_register_t *ejdata = NULL;
+ int i = 0;
+ int timeout = 5;
+
+ if (ejctrl == NULL)
+ ejctrl = urj_part_find_data_register (bus->part, "EJCONTROL");
+ if (ejaddr == NULL)
+ ejaddr = urj_part_find_data_register (bus->part, "EJADDRESS");
+ if (ejdata == NULL)
+ ejdata = urj_part_find_data_register (bus->part, "EJDATA");
+
+ switch (sz)
+ { /* Fill the other bytes with copy of the current */
+ case DMA_BYTE:
+ data &= 0xff;
+ data |= (data << 8) | (data << 16) | (data << 24);
+ break;
+ case DMA_HALFWORD:
+ data &= 0xffff;
+ data |= (data << 16);
+ break;
+ default:
+ break;
+ }
+
+ urj_part_set_instruction (bus->part, "EJTAG_ADDRESS");
+ urj_tap_chain_shift_instructions (bus->chain);
+ for (i = 0; i < 32; i++)
+ ejaddr->in->data[i] = (addr >> i) & 1;
+ urj_tap_chain_shift_data_registers (bus->chain, 0); /* Push the address to write */
+ urj_log (URJ_LOG_LEVEL_COMM, "Wrote to ejaddr->in =%s %08lX\n",
+ urj_tap_register_get_string (ejaddr->in),
+ (long unsigned) reg_value (ejaddr->in));
+ urj_part_set_instruction (bus->part, "EJTAG_DATA");
+ urj_tap_chain_shift_instructions (bus->chain);
+ for (i = 0; i < 32; i++)
+ ejdata->in->data[i] = (data >> i) & 1;
+ urj_tap_chain_shift_data_registers (bus->chain, 0); /* Push the data to write */
+ urj_log (URJ_LOG_LEVEL_COMM, "Wrote to edata->in(%c) =%s %08lX\n",
+ siz_ (sz), urj_tap_register_get_string (ejdata->in),
+ (long unsigned) reg_value (ejdata->in));
+ urj_part_set_instruction (bus->part, "EJTAG_CONTROL");
+ urj_tap_chain_shift_instructions (bus->chain);
+ urj_tap_register_fill (ejctrl->in, 0);
+ ejctrl->in->data[PrAcc] = 1; // Processor access
+ ejctrl->in->data[ProbEn] = 1;
+ ejctrl->in->data[DmaAcc] = 1; // DMA operation request */
+ ejctrl->in->data[DstRt] = 1;
+ if (sz)
+ ejctrl->in->data[sz] = 1; // Size : can be WORD/HALFWORD or nothing for byte
+ urj_tap_chain_shift_data_registers (bus->chain, 0); /* Do the operation */
+ urj_log (URJ_LOG_LEVEL_ALL, "Wrote to ejctrl->in =%s %08lX\n",
+ urj_tap_register_get_string (ejctrl->in),
+ (long unsigned) reg_value (ejctrl->in));
+
+ do
+ {
+ urj_part_set_instruction (bus->part, "EJTAG_CONTROL");
+ urj_tap_chain_shift_instructions (bus->chain);
+ urj_tap_register_fill (ejctrl->in, 0);
+ ejctrl->in->data[PrAcc] = 1;
+ ejctrl->in->data[ProbEn] = 1;
+ ejctrl->in->data[DmaAcc] = 1;
+ urj_tap_chain_shift_data_registers (bus->chain, 1);
+ timeout--;
+ if (!timeout)
+ break;
+ }
+ while (ejctrl->out->data[DstRt] == 1); // This flag tell us the processor has completed the op
+
+ urj_part_set_instruction (bus->part, "EJTAG_CONTROL");
+ urj_tap_chain_shift_instructions (bus->chain);
+ urj_tap_register_fill (ejctrl->in, 0);
+ ejctrl->in->data[PrAcc] = 1;
+ ejctrl->in->data[ProbEn] = 1;
+ urj_tap_chain_shift_data_registers (bus->chain, 1); // Disable DMA, reset state to previous one.
+ if (ejctrl->out->data[Derr] == 1)
+ { // Check for DMA error, i.e. incorrect address
+ urj_error_set (URJ_ERROR_BUS_DMA,
+ _("dma write (dma transaction failed)"));
+ }
+ return;
+}
+
+/**
+ * low level dma read operation
+ *
+ */
+static unsigned int
+ejtag_dma_read (urj_bus_t *bus, unsigned int addr, int sz)
+{
+ static urj_data_register_t *ejctrl = NULL;
+ static urj_data_register_t *ejaddr = NULL;
+ static urj_data_register_t *ejdata = NULL;
+ int i = 0;
+ int timeout = 5;
+ unsigned int ret;
+
+ if (ejctrl == NULL)
+ ejctrl = urj_part_find_data_register (bus->part, "EJCONTROL");
+ if (ejaddr == NULL)
+ ejaddr = urj_part_find_data_register (bus->part, "EJADDRESS");
+ if (ejdata == NULL)
+ ejdata = urj_part_find_data_register (bus->part, "EJDATA");
+
+ urj_part_set_instruction (bus->part, "EJTAG_ADDRESS");
+ urj_tap_chain_shift_instructions (bus->chain);
+ for (i = 0; i < 32; i++)
+ ejaddr->in->data[i] = (addr >> i) & 1;
+ urj_tap_chain_shift_data_registers (bus->chain, 0); /* Push the address to read */
+ urj_log (URJ_LOG_LEVEL_COMM, "Wrote to ejaddr->in =%s %08lX\n",
+ urj_tap_register_get_string (ejaddr->in),
+ (long unsigned) reg_value (ejaddr->in));
+ urj_part_set_instruction (bus->part, "EJTAG_CONTROL");
+ urj_tap_chain_shift_instructions (bus->chain);
+ urj_tap_register_fill (ejctrl->in, 0);
+ ejctrl->in->data[PrAcc] = 1; // Processor access
+ ejctrl->in->data[ProbEn] = 1;
+ ejctrl->in->data[DmaAcc] = 1; // DMA operation request */
+ ejctrl->in->data[DstRt] = 1;
+ if (sz)
+ ejctrl->in->data[sz] = 1; // Size : can be WORD/HALFWORD or nothing for byte
+ ejctrl->in->data[DmaRwn] = 1; // This is a read
+ urj_tap_chain_shift_data_registers (bus->chain, 0); /* Do the operation */
+ urj_log (URJ_LOG_LEVEL_ALL, "Wrote to ejctrl->in =%s %08lX\n",
+ urj_tap_register_get_string (ejctrl->in),
+ (long unsigned) reg_value (ejctrl->in));
+
+ do
+ {
+ urj_part_set_instruction (bus->part, "EJTAG_CONTROL");
+ urj_tap_chain_shift_instructions (bus->chain);
+ urj_tap_register_fill (ejctrl->in, 0);
+ ejctrl->in->data[PrAcc] = 1;
+ ejctrl->in->data[ProbEn] = 1;
+ ejctrl->in->data[DmaAcc] = 1;
+ urj_tap_chain_shift_data_registers (bus->chain, 1);
+
+ urj_log (URJ_LOG_LEVEL_ALL, "Wrote to ejctrl->in =%s %08lX\n",
+ urj_tap_register_get_string (ejctrl->in),
+ (long unsigned) reg_value (ejctrl->in));
+ urj_log (URJ_LOG_LEVEL_ALL, "Read from ejctrl->out =%s %08lX\n",
+ urj_tap_register_get_string (ejctrl->out),
+ (long unsigned) reg_value (ejctrl->out));
+ timeout--;
+ if (!timeout)
+ break;
+ }
+ while (ejctrl->out->data[DstRt] == 1); // This flag tell us the processor has completed the op
+
+ urj_part_set_instruction (bus->part, "EJTAG_DATA");
+ urj_tap_chain_shift_instructions (bus->chain);
+ urj_tap_register_fill (ejdata->in, 0);
+ urj_tap_chain_shift_data_registers (bus->chain, 1);
+ ret = reg_value (ejdata->out);
+ urj_log (URJ_LOG_LEVEL_COMM, "Read from ejdata->out(%c) =%s %08lX\n",
+ siz_ (sz), urj_tap_register_get_string (ejdata->out),
+ (long unsigned) reg_value (ejdata->out));
+ urj_part_set_instruction (bus->part, "EJTAG_CONTROL");
+ urj_tap_chain_shift_instructions (bus->chain);
+ urj_tap_register_fill (ejctrl->in, 0);
+ ejctrl->in->data[PrAcc] = 1;
+ ejctrl->in->data[ProbEn] = 1;
+ urj_tap_chain_shift_data_registers (bus->chain, 1); // Disable DMA, reset state to previous one.
+
+ urj_log (URJ_LOG_LEVEL_ALL, "Wrote to ejctrl->in =%s %08lX\n",
+ urj_tap_register_get_string (ejctrl->in),
+ (long unsigned) reg_value (ejctrl->in));
+ urj_log (URJ_LOG_LEVEL_ALL, "Read from ejctrl->out =%s %08lX\n",
+ urj_tap_register_get_string (ejctrl->out),
+ (long unsigned) reg_value(ejctrl->out));
+
+ if (ejctrl->out->data[Derr] == 1)
+ { // Check for DMA error, i.e. incorrect address
+ urj_error_set (URJ_ERROR_BUS_DMA,
+ _("dma read (dma transaction failed)"));
+ }
+
+ switch (sz)
+ {
+ case DMA_HALFWORD:
+ ret &= ret & 0xffff;
+ break;
+ case DMA_BYTE:
+ ret &= ret & 0xff;
+ break;
+ case DMA_WORD:
+ default:
+ break;
+ }
+
+ return ret;
+}
+
+/**
+ * bus->driver->(*initbus)
+ *
+ */
+static int
+ejtag_dma_bus_init (urj_bus_t *bus)
+{
+ urj_data_register_t *ejctrl = NULL, *ejimpl = NULL, *ejaddr =
+ NULL, *ejdata = NULL;
+ int timeout = 100;
+
+ if (urj_tap_state (bus->chain) != URJ_TAP_STATE_RUN_TEST_IDLE)
+ {
+ /* silently skip initialization if TAP isn't in RUNTEST/IDLE state
+ this is required to avoid interfering with detect when initbus
+ is contained in the part description file
+ URJ_BUS_INIT() will be called latest by URJ_BUS_PREPARE() */
+ return URJ_STATUS_OK;
+ }
+
+ ejctrl = urj_part_find_data_register (bus->part, "EJCONTROL");
+ ejimpl = urj_part_find_data_register (bus->part, "EJIMPCODE");
+ ejaddr = urj_part_find_data_register (bus->part, "EJADDRESS");
+ ejdata = urj_part_find_data_register (bus->part, "EJDATA");
+
+ if (!(ejctrl && ejimpl))
+ {
+ urj_error_set (URJ_ERROR_NOTFOUND,
+ _("EJCONTROL or EJIMPCODE register"));
+ return URJ_STATUS_FAIL;
+ }
+ if (!(ejaddr && ejdata))
+ {
+ urj_error_set (URJ_ERROR_NOTFOUND,
+ _("EJADDRESS of EJDATA register; DMA impossible"));
+ return URJ_STATUS_FAIL;
+ }
+
+ urj_part_set_instruction (bus->part, "EJTAG_IMPCODE");
+ urj_tap_chain_shift_instructions (bus->chain);
+ urj_tap_chain_shift_data_registers (bus->chain, 0);
+ urj_tap_chain_shift_data_registers (bus->chain, 1);
+ urj_log (URJ_LOG_LEVEL_NORMAL, "ImpCode=%s\n",
+ urj_tap_register_get_string (ejimpl->out));
+ BP->impcode = reg_value (ejimpl->out);
+
+ switch (EJTAG_VER)
+ {
+ case EJTAG_20:
+ urj_log (URJ_LOG_LEVEL_NORMAL, "EJTAG version: <= 2.0\n");
+ break;
+ case EJTAG_25:
+ urj_log (URJ_LOG_LEVEL_NORMAL, "EJTAG version: 2.5\n");
+ break;
+ case EJTAG_26:
+ urj_log (URJ_LOG_LEVEL_NORMAL, "EJTAG version: 2.6\n");
+ break;
+ default:
+ urj_log (URJ_LOG_LEVEL_NORMAL, "EJTAG version: unknown (%lu)\n",
+ (long unsigned) EJTAG_VER);
+ }
+ urj_log (URJ_LOG_LEVEL_NORMAL,
+ "EJTAG Implementation flags:%s%s%s%s%s%s%s\n",
+ (BP->impcode & (1 << 28)) ? " R3k" : " R4k",
+ (BP->impcode & (1 << 24)) ? " DINTsup" : "",
+ (BP->impcode & (1 << 22)) ? " ASID_8" : "",
+ (BP->impcode & (1 << 21)) ? " ASID_6" : "",
+ (BP->impcode & (1 << 16)) ? " MIPS16" : "",
+ (BP->impcode & (1 << 14)) ? " NoDMA" : " DMA",
+ (BP->impcode & (1)) ? " MIPS64" : " MIPS32");
+
+ if (BP->impcode & (1 << 14))
+ {
+ urj_warning ("plateform claim there are no DMA support\n");
+ }
+
+ if (EJTAG_VER != EJTAG_20)
+ {
+ urj_warning ("plateform has a version which is not supposed to have DMA\n");
+ }
+
+ // The purpose of this is to make the processor break into debug mode on
+ // reset rather than execute the reset vector
+ urj_part_set_instruction (bus->part, "EJTAGBOOT");
+ urj_tap_chain_shift_instructions (bus->chain);
+
+ // Prepare for following instructions
+ urj_part_set_instruction (bus->part, "EJTAG_CONTROL");
+ urj_tap_chain_shift_instructions (bus->chain);
+ urj_tap_register_fill (ejctrl->in, 0);
+
+ // Reset the processor
+ ejctrl->in->data[PrRst] = 1;
+ ejctrl->in->data[PerRst] = 1;
+ urj_tap_chain_shift_data_registers (bus->chain, 0);
+
+ // Release reset
+ ejctrl->in->data[PrRst] = 0;
+ ejctrl->in->data[PerRst] = 0;
+ urj_tap_chain_shift_data_registers (bus->chain, 0);
+
+ ejctrl->in->data[PrAcc] = 1;
+ ejctrl->in->data[ProbEn] = 1;
+ ejctrl->in->data[ProbTrap] = 1;
+ ejctrl->in->data[JtagBrk] = 1;
+ ejctrl->in->data[Rocc] = 1;
+ urj_tap_chain_shift_data_registers (bus->chain, 0);
+
+ /* Wait until processor is in break */
+ ejctrl->in->data[JtagBrk] = 0;
+ do
+ {
+ urj_tap_chain_shift_data_registers (bus->chain, 1);
+ timeout--;
+ if (!timeout)
+ break;
+ }
+ while (ejctrl->out->data[BrkSt] == 0);
+
+ if (timeout == 0)
+ {
+ urj_error_set (URJ_ERROR_TIMEOUT,
+ _("Failed to enter debug mode, ctrl=%s"),
+ urj_tap_register_get_string (ejctrl->out));
+ return URJ_STATUS_FAIL;
+ }
+
+ // Handle the reset bit clear, if any
+ if (ejctrl->out->data[Rocc])
+ {
+ ejctrl->in->data[Rocc] = 0;
+ urj_tap_chain_shift_data_registers (bus->chain, 0);
+ ejctrl->in->data[Rocc] = 1;
+ urj_tap_chain_shift_data_registers (bus->chain, 1);
+ }
+
+
+ // Clear Memory Protection Bit in DCR
+ urj_log (URJ_LOG_LEVEL_NORMAL, _("Clear memory protection bit in DCR\n"));
+ unsigned int val = ejtag_dma_read (bus, 0xff300000, DMA_WORD);
+ ejtag_dma_write (bus, 0xff300000, val & ~(1 << 2), DMA_WORD);
+
+ // Clear watchdog, if any
+ urj_log (URJ_LOG_LEVEL_NORMAL, _("Clear Watchdog\n"));
+ ejtag_dma_write (bus, 0xb8000080, 0, DMA_WORD);
+
+ urj_log (URJ_LOG_LEVEL_NORMAL,
+ _("Potential flash base address: [0x%x], [0x%x]\n"),
+ ejtag_dma_read (bus, 0xfffe2000, DMA_WORD),
+ ejtag_dma_read (bus, 0xfffe1000, DMA_WORD));
+
+ urj_log (URJ_LOG_LEVEL_NORMAL,
+ _("Processor successfully switched in debug mode.\n"));
+
+ bus->initialized = 1;
+ return URJ_STATUS_OK;
+}
+
+/**
+ * bus->driver->(*prepare)
+ *
+ */
+static void
+ejtag_dma_bus_prepare (urj_bus_t *bus)
+{
+ if (!bus->initialized)
+ URJ_BUS_INIT (bus);
+}
+
+/**
+ * bus->driver->(*area)
+ *
+ */
+static int
+ejtag_dma_bus_area (urj_bus_t *bus, uint32_t adr, urj_bus_area_t *area)
+{
+
+ /* from MIPS.org datasheets */
+ if (adr < UINT32_C (0x1E000000))
+ {
+ area->description = "USEG : User addresses";
+ area->start = UINT32_C (0x00000000);
+ area->length = UINT64_C (0x1E000000);
+ area->width = 32;
+ }
+ else if (adr < UINT32_C (0x20000000))
+ {
+ area->description = "FLASH : Addresses in flash (boot=0x1FC000000)";
+ area->start = UINT32_C (0x1E000000);
+ area->length = UINT64_C (0x2000000);
+ area->width = 16;
+ }
+ else if (adr < UINT32_C (0x80000000))
+ {
+ area->description = "USEG : User addresses";
+ area->start = UINT32_C (0x20000000);
+ area->length = UINT64_C (0x60000000);
+ area->width = 32;
+ }
+ else if (adr < UINT32_C (0xA0000000))
+ {
+ area->description = "KSEG0: Kernel Unmapped Cached";
+ area->start = UINT32_C (0x80000000);
+ area->length = UINT64_C (0x20000000);
+ area->width = 32;
+ }
+ else if (adr < UINT32_C (0xC0000000))
+ {
+ area->description = "KSEG1: Kernel Unmapped Uncached";
+ area->start = UINT32_C (0xA0000000);
+ area->length = UINT64_C (0x20000000);
+ area->width = 32;
+ }
+ else if (adr < UINT32_C (0xE0000000))
+ {
+ area->description = "SSEG : Supervisor Mapped";
+ area->start = UINT32_C (0xC0000000);
+ area->length = UINT64_C (0x20000000);
+ area->width = 32;
+ }
+ else
+ {
+ area->description = "KSEG3: Kernel Mapped";
+ area->start = UINT32_C (0xE0000000);
+ area->length = UINT64_C (0x20000000);
+ area->width = 32;
+ }
+ return URJ_STATUS_OK;
+}
+
+static int
+get_sz (uint32_t adr)
+{
+ static urj_bus_area_t area;
+ static int initialized = 0;
+
+ if (!initialized)
+ {
+ ejtag_dma_bus_area (NULL, adr, &area);
+ initialized = 1;
+ }
+ switch (area.width)
+ {
+ case 32:
+ return DMA_WORD;
+ case 16:
+ return DMA_HALFWORD;
+ default:
+ break;
+ }
+ return DMA_BYTE;
+}
+
+/**
+ * bus->driver->(*write)
+ *
+ */
+static void
+ejtag_dma_bus_write (urj_bus_t *bus, uint32_t adr, uint32_t data)
+{
+ urj_log (URJ_LOG_LEVEL_ALL, "%s:adr=0x%lx,got=0x%lx\n", __func__,
+ (long unsigned) adr, (long unsigned) data);
+ ejtag_dma_write (bus, adr, data, get_sz (adr));
+}
+
+/**
+ * bus->driver->(*read)
+ *
+ */
+static uint32_t
+ejtag_dma_bus_read (urj_bus_t *bus, uint32_t adr)
+{
+ int data = ejtag_dma_read (bus, adr, get_sz (adr));
+ urj_log (URJ_LOG_LEVEL_ALL, "%s:adr=0x%lx,got=0x%lx\n", __func__,
+ (long unsigned) adr, (long unsigned) data);
+ return data;
+}
+
+static uint32_t _data_read;
+/**
+ * bus->driver->(*read_start)
+ *
+ */
+static int
+ejtag_dma_bus_read_start (urj_bus_t *bus, uint32_t adr)
+{
+ _data_read = ejtag_dma_read (bus, adr, get_sz (adr));
+ urj_log (URJ_LOG_LEVEL_ALL, "%s:adr=0x%lx, got=0x%lx\n", __func__,
+ (long unsigned) adr, (long unsigned) _data_read);
+
+ return URJ_STATUS_OK;
+}
+
+/**
+ * bus->driver->(*read_next)
+ *
+ */
+static uint32_t
+ejtag_dma_bus_read_next (urj_bus_t *bus, uint32_t adr)
+{
+ uint32_t tmp_value = _data_read;
+ _data_read = ejtag_dma_read (bus, adr, get_sz (adr));
+ urj_log (URJ_LOG_LEVEL_ALL, "%s:adr=0x%lx, got=0x%lx\n", __func__,
+ (long unsigned) adr, (long unsigned) _data_read);
+ return tmp_value;
+}
+
+/**
+ * bus->driver->(*read_end)
+ *
+ */
+static uint32_t
+ejtag_dma_bus_read_end (urj_bus_t *bus)
+{
+ return _data_read;
+}
+
+const urj_bus_driver_t urj_bus_ejtag_dma_bus = {
+ "ejtag_dma",
+ N_("EJTAG compatible bus driver via DMA"),
+ ejtag_dma_bus_new,
+ urj_bus_generic_free,
+ ejtag_dma_bus_printinfo,
+ ejtag_dma_bus_prepare,
+ ejtag_dma_bus_area,
+ ejtag_dma_bus_read_start,
+ ejtag_dma_bus_read_next,
+ ejtag_dma_bus_read_end,
+ ejtag_dma_bus_read,
+ ejtag_dma_bus_write,
+ ejtag_dma_bus_init
+};
--- /dev/null
+/*
+ * $Id$
+ *
+ * Bus driver for the FPGA JTAG memory (fjmem) design.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Arnim Laeuger <arniml@users.sourceforge.net>, 2008.
+ *
+ */
+
+#include <sysdep.h>
+
+#include <stdlib.h>
+#include <stdint.h>
+#include <string.h>
+
+#include <urjtag/log.h>
+#include <urjtag/part.h>
+#include <urjtag/bus.h>
+#include <urjtag/chain.h>
+#include <urjtag/cmd.h>
+#include <urjtag/tap.h>
+#include <urjtag/data_register.h>
+#include <urjtag/tap_register.h>
+#include <urjtag/part_instruction.h>
+
+#include "buses.h"
+#include "generic_bus.h"
+
+#undef DEBUG
+
+#define FJMEM_INST_NAME "FJMEM_INST"
+#define FJMEM_REG_NAME "FJMEM_REG"
+#define FJMEM_MAX_REG_LEN 2048
+
+struct block_param
+{
+ struct block_param *next;
+ uint16_t num;
+ uint32_t start, end;
+ uint16_t addr_width;
+ uint16_t data_width;
+ uint8_t ashift;
+};
+typedef struct block_param block_param_t;
+
+struct block_desc
+{
+ uint16_t reg_len;
+ uint16_t instr_pos;
+ uint16_t block_pos;
+ uint16_t block_len;
+ uint16_t addr_pos;
+ uint16_t addr_len;
+ uint16_t data_pos;
+ uint16_t data_len;
+ block_param_t *blocks;
+};
+typedef struct block_desc block_desc_t;
+
+typedef struct
+{
+ uint32_t last_addr;
+ urj_data_register_t *fjmem_reg;
+ block_desc_t block_desc;
+} bus_params_t;
+
+#define LAST_ADDR ((bus_params_t *) bus->params)->last_addr
+#define FJMEM_REG ((bus_params_t *) bus->params)->fjmem_reg
+#define BLOCK_DESC ((bus_params_t *) bus->params)->block_desc
+
+static int
+fjmem_detect_reg_len (urj_chain_t *chain, urj_part_t *part, const char *opcode,
+ int len)
+{
+ urj_data_register_t *dr;
+ urj_part_instruction_t *i;
+ int l, fjmem_reg_len;
+ char *tdo_bit;
+
+ /* build register FJMEM_REG with length of 1 bit */
+ dr = urj_part_data_register_alloc (FJMEM_REG_NAME, 1);
+ if (!dr)
+ // retain error state
+ return 0;
+
+ dr->next = part->data_registers;
+ part->data_registers = dr;
+
+ /* build instruction FJMEM_INST with code given by command line parameter
+ that maps to FJMEM_REG */
+ if (strlen (opcode) != part->instruction_length)
+ {
+ urj_error_set (URJ_ERROR_INVALID, _("invalid instruction length"));
+ return 0;
+ }
+ i = urj_part_instruction_alloc (FJMEM_INST_NAME, part->instruction_length,
+ opcode);
+ if (!i)
+ // retain error state
+ return 0;
+ i->next = part->instructions;
+ part->instructions = i;
+ i->data_register = dr;
+
+ /* force jtag reset on all parts of the chain
+ -> they're in BYPASS mode now */
+ urj_tap_chain_set_trst (chain, 0);
+ urj_tap_chain_set_trst (chain, 1);
+ urj_tap_reset_bypass (chain);
+
+ /* flood all BYPASS registers with 0 for the following detection */
+ urj_tap_register_fill (dr->in, 0);
+ urj_tap_capture_dr (chain);
+ for (l = 0; l < chain->parts->len; l++)
+ urj_tap_shift_register (chain, dr->in, NULL,
+ URJ_CHAIN_EXITMODE_SHIFT);
+ /* shift once more and return to idle state */
+ urj_tap_shift_register (chain, dr->in, NULL, URJ_CHAIN_EXITMODE_IDLE);
+
+ /* set the FJMEM_INST instruction and activate it */
+ urj_part_set_instruction (part, FJMEM_INST_NAME);
+ urj_tap_chain_shift_instructions (chain);
+
+ /* skip autodetect if register length was already specified */
+ if (len)
+ return len;
+
+ /* now detect the register length of FJMEM_REG:
+ shift 1s through the data register until they appear at TDO
+ NB: We don't shift only through the FJMEM_REG but also through the
+ registers of all other parts in the chain. They're set to
+ BYPASS hopefully. */
+ fjmem_reg_len = 0;
+ urj_tap_register_fill (dr->in, 1);
+ urj_tap_register_fill (dr->out, 0);
+ tdo_bit = dr->out->data;
+
+ urj_tap_capture_dr (chain);
+ /* read current TDO and then shift once */
+ urj_tap_shift_register (chain, dr->in, dr->out, URJ_CHAIN_EXITMODE_SHIFT);
+ urj_tap_register_get_string (dr->out);
+ while ((tdo_bit[0] == 0) && (fjmem_reg_len < FJMEM_MAX_REG_LEN))
+ {
+ /* read current TDO and then shift once */
+ urj_tap_shift_register (chain, dr->in, dr->out,
+ URJ_CHAIN_EXITMODE_SHIFT);
+ tdo_bit = dr->out->data;
+ fjmem_reg_len++;
+ }
+ /* consider BYPASS register of other parts in the chain */
+ fjmem_reg_len -= chain->parts->len - 1;
+ /* shift once more and return to idle state */
+ urj_tap_shift_register (chain, dr->in, NULL, URJ_CHAIN_EXITMODE_IDLE);
+ urj_log (URJ_LOG_LEVEL_DEBUG, "FJMEM data register length: %d\n",
+ fjmem_reg_len);
+
+ return fjmem_reg_len < FJMEM_MAX_REG_LEN ? fjmem_reg_len : -1;
+}
+
+static int
+fjmem_detect_fields (urj_chain_t *chain, urj_part_t *part, urj_bus_t *bus)
+{
+ block_desc_t *bd = &(BLOCK_DESC);
+ urj_data_register_t *dr = FJMEM_REG;
+ int idx;
+
+ /* set safe defaults */
+ bd->block_len = 0;
+ bd->addr_pos = 0;
+ bd->addr_len = 0;
+ bd->data_pos = 0;
+ bd->data_len = 0;
+
+ /* extend FJMEM_REG to finally detected size */
+ if (dr->in)
+ free (dr->in);
+ if ((dr->in = urj_tap_register_alloc (bd->reg_len)) == NULL)
+ // retain error state
+ return 0;
+ if (dr->out)
+ free (dr->out);
+ if ((dr->out = urj_tap_register_alloc (bd->reg_len)) == NULL)
+ // retain error state
+ return 0;
+
+ /* Shift the detect instruction (all-1) into FJMEM_REG. */
+ urj_tap_register_fill (dr->in, 1);
+ urj_tap_chain_shift_data_registers (chain, 1);
+
+ /* With the next shift we will read the field marker pattern.
+ Shift in the query for block 0, will be used lateron. */
+ urj_tap_register_fill (dr->in, 0);
+ /* enter query instruction: 110 */
+ dr->in->data[bd->instr_pos + 1] = 1;
+ dr->in->data[bd->instr_pos + 2] = 1;
+
+ /* shift register */
+ urj_tap_chain_shift_data_registers (chain, 1);
+
+ /* and examine output from field detect */
+ urj_log (URJ_LOG_LEVEL_DEBUG, "captured: %s\n",
+ urj_tap_register_get_string (dr->out));
+ /* scan block field */
+ idx = bd->block_pos;
+ while (dr->out->data[idx] && (idx < dr->out->len))
+ idx++;
+ bd->block_len = idx - bd->block_pos;
+ /* scan address field */
+ bd->addr_pos = idx;
+ while ((dr->out->data[idx] == 0) && (idx < dr->out->len))
+ idx++;
+ bd->addr_len = idx - bd->addr_pos;
+ /* scan data field */
+ bd->data_pos = idx;
+ while (dr->out->data[idx] && (idx < dr->out->len))
+ idx++;
+ bd->data_len = idx - bd->data_pos;
+
+ urj_log (URJ_LOG_LEVEL_DEBUG, "block pos: %d, len: %d\n",
+ bd->block_pos, bd->block_len);
+ urj_log (URJ_LOG_LEVEL_DEBUG, "addr pos: %d, len: %d\n",
+ bd->addr_pos, bd->addr_len);
+ urj_log (URJ_LOG_LEVEL_DEBUG, "data pos: %d, len: %d\n",
+ bd->data_pos, bd->data_len);
+
+ if ((bd->block_len > 0) && (bd->addr_len > 0) && (bd->data_len > 0))
+ return 1;
+ else
+ return 0;
+}
+
+static int
+fjmem_query_blocks (urj_chain_t *chain, urj_part_t *part, urj_bus_t *bus)
+{
+ block_desc_t *bd = &(BLOCK_DESC);
+ urj_data_register_t *dr = FJMEM_REG;
+ int max_block_num, block_num;
+ int failed = 0;
+
+ /* the current block number is 0, it has been requested by the previous
+ shift during fjmem_detect_fields */
+ max_block_num = (1 << bd->block_len) - 1;
+ for (block_num = 0; block_num <= max_block_num; block_num++)
+ {
+ int next_block_num = block_num + 1;
+ int idx;
+ int addr_len, data_len;
+
+ /* prepare the next query before shifting the data register */
+ for (idx = 0; idx < bd->block_len; idx++)
+ {
+ dr->in->data[bd->block_pos + idx] = next_block_num & 1;
+ next_block_num >>= 1;
+ }
+ urj_tap_chain_shift_data_registers (chain, 1);
+
+ /* and examine output from block query */
+ urj_log (URJ_LOG_LEVEL_DEBUG, "captured: %s\n",
+ urj_tap_register_get_string (dr->out));
+
+ /* extract address field length */
+ for (addr_len = 0; addr_len < bd->addr_len; addr_len++)
+ if (dr->out->data[bd->addr_pos + addr_len] == 0)
+ break;
+
+ /* extract data field length */
+ for (data_len = 0; data_len < bd->data_len; data_len++)
+ if (dr->out->data[bd->data_pos + data_len] == 0)
+ break;
+
+ /* it's a valid block only if address field and data field are
+ both larger than 0 */
+ if ((addr_len > 0) && (data_len > 0))
+ {
+ block_param_t *bl;
+ int nbytes;
+
+ if ((bl = calloc (1, sizeof (block_param_t))) == NULL)
+ {
+ urj_error_set (URJ_ERROR_OUT_OF_MEMORY, "calloc(%zd,%zd) fails",
+ (size_t) 1, sizeof (urj_bus_t));
+ failed |= 1;
+ break;
+ }
+
+ bl->next = bd->blocks;
+ bl->num = block_num;
+ bl->addr_width = addr_len;
+ bl->data_width = data_len;
+ bd->blocks = bl;
+
+ /* determine address shift, depends on data width */
+ nbytes = data_len / 8;
+ if (data_len % 8)
+ nbytes++;
+
+ bl->ashift = 0;
+ while (nbytes != 1)
+ {
+ bl->ashift++;
+ nbytes >>= 1;
+ }
+
+ /* determine start address of this block */
+ if (bl->next == NULL)
+ bl->start = 0;
+ else
+ {
+ if ((bl->addr_width << bl->ashift) <=
+ (bl->next->addr_width << bl->next->ashift))
+ {
+ bl->start =
+ bl->next->start +
+ (1 << (bl->next->addr_width + bl->next->ashift));
+ }
+ else
+ {
+ uint32_t mask = 1 << (bl->addr_width + bl->ashift);
+ bl->start = bl->next->start & ~(mask - 1);
+ bl->start += mask;
+ }
+ }
+ /* and fill in end address of this block */
+ bl->end = bl->start + (1 << (bl->addr_width + bl->ashift)) - 1;
+
+ urj_log (URJ_LOG_LEVEL_DEBUG, "block # %d\n", block_num);
+ urj_log (URJ_LOG_LEVEL_DEBUG, " start 0x%08lx\n",
+ (long unsigned) bl->start);
+ urj_log (URJ_LOG_LEVEL_DEBUG, " end 0x%08lx\n",
+ (long unsigned) bl->end);
+ urj_log (URJ_LOG_LEVEL_DEBUG, " addr len %d\n", bl->addr_width);
+ urj_log (URJ_LOG_LEVEL_DEBUG, " data len %d\n", bl->data_width);
+ }
+ }
+
+ return failed ? 0 : 1;
+}
+
+/**
+ * bus->driver->(*new_bus)
+ *
+ */
+static urj_bus_t *
+fjmem_bus_new (urj_chain_t *chain, const urj_bus_driver_t *driver,
+ const urj_param_t *params[])
+{
+ urj_bus_t *bus = NULL;
+ int failed = 0;
+ urj_part_t *part;
+ const char *opcode = NULL;
+ int fjmem_reg_len = 0;
+ int idx;
+
+ bus = urj_bus_generic_new (chain, driver, sizeof (bus_params_t));
+ if (bus == NULL)
+ return NULL;
+ part = bus->part;
+
+ /* parse parameters */
+ for (idx = 0; params[idx] != NULL; idx++)
+ {
+ switch (params[idx]->key)
+ {
+ case URJ_BUS_PARAM_KEY_OPCODE:
+ opcode = params[idx]->value.string;
+ break;
+ case URJ_BUS_PARAM_KEY_LEN:
+ fjmem_reg_len = params[idx]->value.lu;
+ break;
+ default:
+ urj_bus_generic_free (bus);
+ urj_error_set (URJ_ERROR_SYNTAX, "unrecognized bus parameter '%s'",
+ urj_param_string(&urj_bus_param_list, params[idx]));
+ return NULL;
+ }
+ }
+
+ if (opcode == NULL)
+ {
+ urj_bus_generic_free (bus);
+ urj_error_set (URJ_ERROR_SYNTAX,
+ _("Parameter for instruction opcode missing"));
+ return NULL;
+ }
+
+ block_desc_t *bd;
+
+ fjmem_reg_len = fjmem_detect_reg_len (chain, part, opcode, fjmem_reg_len);
+ if (fjmem_reg_len <= 0)
+ return NULL;
+
+ bus->chain = chain;
+ // @@@@ RFHH check result
+ FJMEM_REG = urj_part_find_data_register (part, FJMEM_REG_NAME);
+ bd = &(BLOCK_DESC);
+ bd->blocks = NULL;
+ bd->reg_len = fjmem_reg_len;
+ bd->instr_pos = 0;
+ bd->block_pos = bd->instr_pos + 4; /* 3 bits for instruction field, 1 bit ack field */
+
+ if (fjmem_detect_fields (chain, part, bus) <= 0)
+ failed |= 1;
+ else if (fjmem_query_blocks (chain, part, bus) <= 0)
+ failed |= 1;
+
+ if (failed)
+ {
+ urj_bus_generic_free (bus);
+ return NULL;
+ }
+
+ return bus;
+}
+
+static void
+fjmem_free_blocks (block_param_t *bl)
+{
+ if (bl)
+ {
+ fjmem_free_blocks (bl->next);
+ free (bl);
+ }
+}
+
+/**
+ * bus->driver->(*free_bus)
+ *
+ */
+static void
+fjmem_bus_free (urj_bus_t *bus)
+{
+ urj_data_register_t *dr = FJMEM_REG;
+
+ /* fill all fields with '0'
+ -> prepare idle instruction for next startup/detect */
+ urj_part_set_instruction (bus->part, FJMEM_INST_NAME);
+ urj_tap_chain_shift_instructions (bus->chain);
+
+ urj_tap_register_fill (dr->in, 0);
+ urj_tap_chain_shift_data_registers (bus->chain, 0);
+
+ fjmem_free_blocks (BLOCK_DESC.blocks);
+ BLOCK_DESC.blocks = NULL;
+
+ urj_bus_generic_free (bus);
+}
+
+/**
+ * bus->driver->(*printinfo)
+ *
+ */
+static void
+fjmem_bus_printinfo (urj_log_level_t ll, urj_bus_t *bus)
+{
+ int i;
+
+ for (i = 0; i < bus->chain->parts->len; i++)
+ if (bus->part == bus->chain->parts->parts[i])
+ break;
+ urj_log (ll, _("fjmem FPGA bus driver via USER register (JTAG part No. %d)\n"),
+ i);
+}
+
+/**
+ * bus->driver->(*prepare)
+ *
+ */
+static void
+fjmem_bus_prepare (urj_bus_t *bus)
+{
+ if (!bus->initialized)
+ URJ_BUS_INIT (bus);
+
+ /* ensure FJMEM_INST is active */
+ urj_part_set_instruction (bus->part, FJMEM_INST_NAME);
+ urj_tap_chain_shift_instructions (bus->chain);
+}
+
+static int
+block_bus_area (urj_bus_t *bus, uint32_t adr, urj_bus_area_t *area,
+ block_param_t **bl_match)
+{
+ block_param_t *bl = BLOCK_DESC.blocks;
+ uint32_t prev_start;
+
+ *bl_match = NULL;
+
+ /* run through all detected/queried blocks and check if adr falls into
+ one of their ranges */
+ prev_start = 0;
+ while (bl)
+ {
+ if ((bl->start <= adr) && (bl->end >= adr))
+ {
+ /* adr lies inside a matching block range */
+ area->description = NULL;
+ area->start = bl->start;
+ area->length = bl->end - bl->start + 1;
+ area->width = bl->data_width;
+ *bl_match = bl;
+ prev_start = area->start;
+ }
+ else if (((prev_start > adr) || (prev_start == 0)) && (bl->end < adr))
+ {
+ /* a gap between blocks */
+ area->description = "Dummy";
+ area->start = bl->end + 1;
+ area->length =
+ prev_start >
+ 0 ? prev_start - (bl->end + 1) : UINT64_C (0x100000000);
+ area->width = 0;
+ *bl_match = NULL;
+ prev_start = area->start;
+ }
+ else
+ prev_start = bl->start;
+
+ bl = bl->next;
+ }
+
+ return URJ_STATUS_OK;
+}
+
+/**
+ * bus->driver->(*area)
+ *
+ */
+static int
+fjmem_bus_area (urj_bus_t *bus, uint32_t adr, urj_bus_area_t *area)
+{
+ block_param_t *bl;
+
+ return block_bus_area (bus, adr, area, &bl);
+}
+
+static void
+setup_address (urj_bus_t *bus, uint32_t a, block_param_t *block)
+{
+ urj_data_register_t *dr = FJMEM_REG;
+ block_desc_t *bd = &(BLOCK_DESC);
+ int idx;
+ uint16_t num = block->num;
+
+ LAST_ADDR = a;
+
+ /* correct address for > 8 bit data widths */
+ a >>= block->ashift;
+
+ /* set block number */
+ for (idx = 0; idx < bd->block_len; idx++)
+ {
+ dr->in->data[bd->block_pos + idx] = num & 1;
+ num >>= 1;
+ }
+
+ /* set address */
+ for (idx = 0; idx < block->addr_width; idx++)
+ {
+ dr->in->data[bd->addr_pos + idx] = a & 1;
+ a >>= 1;
+ }
+}
+
+static void
+setup_data (urj_bus_t *bus, uint32_t d, block_param_t *block)
+{
+ urj_data_register_t *dr = FJMEM_REG;
+ block_desc_t *bd = &(BLOCK_DESC);
+ int idx;
+
+ /* set data */
+ for (idx = 0; idx < block->data_width; idx++)
+ {
+ dr->in->data[bd->data_pos + idx] = d & 1;
+ d >>= 1;
+ }
+}
+
+/**
+ * bus->driver->(*read_start)
+ *
+ */
+static int
+fjmem_bus_read_start (urj_bus_t *bus, uint32_t adr)
+{
+ urj_chain_t *chain = bus->chain;
+ block_desc_t *bd = &(BLOCK_DESC);
+ urj_data_register_t *dr = FJMEM_REG;
+ urj_bus_area_t area;
+ block_param_t *block;
+
+ block_bus_area (bus, adr, &area, &block);
+ if (!block)
+ {
+ urj_error_set (URJ_ERROR_OUT_OF_BOUNDS, _("Address out of range"));
+ LAST_ADDR = adr;
+ return URJ_STATUS_FAIL;
+ }
+
+ setup_address (bus, adr, block);
+
+ /* select read instruction */
+ dr->in->data[bd->instr_pos + 0] = 1;
+ dr->in->data[bd->instr_pos + 1] = 0;
+ dr->in->data[bd->instr_pos + 2] = 0;
+
+ urj_tap_chain_shift_data_registers (chain, 0);
+
+ return URJ_STATUS_OK;
+}
+
+/**
+ * bus->driver->(*read_next)
+ *
+ */
+static uint32_t
+fjmem_bus_read_next (urj_bus_t *bus, uint32_t adr)
+{
+ urj_chain_t *chain = bus->chain;
+ block_desc_t *bd = &(BLOCK_DESC);
+ urj_data_register_t *dr = FJMEM_REG;
+ uint32_t d;
+ urj_bus_area_t area;
+ block_param_t *block;
+ int idx;
+
+ block_bus_area (bus, adr, &area, &block);
+ if (!block)
+ {
+ urj_error_set (URJ_ERROR_OUT_OF_BOUNDS, _("Address out of range"));
+ LAST_ADDR = adr;
+ return 0;
+ }
+
+ setup_address (bus, adr, block);
+ urj_tap_chain_shift_data_registers (chain, 1);
+
+ /* extract data from TDO stream */
+ d = 0;
+ for (idx = 0; idx < block->data_width; idx++)
+ if (dr->out->data[bd->data_pos + idx])
+ d |= 1 << idx;
+
+ return d;
+}
+
+/**
+ * bus->driver->(*read_end)
+ *
+ */
+static uint32_t
+fjmem_bus_read_end (urj_bus_t *bus)
+{
+ urj_chain_t *chain = bus->chain;
+ block_desc_t *bd = &(BLOCK_DESC);
+ urj_data_register_t *dr = FJMEM_REG;
+ uint32_t d;
+ urj_bus_area_t area;
+ block_param_t *block;
+ int idx;
+
+ block_bus_area (bus, LAST_ADDR, &area, &block);
+ if (!block)
+ {
+ urj_error_set (URJ_ERROR_OUT_OF_BOUNDS, _("Address out of range"));
+ return 0;
+ }
+
+ /* prepare idle instruction to disable any spurious unintentional reads */
+ dr->in->data[bd->instr_pos + 0] = 0;
+ dr->in->data[bd->instr_pos + 1] = 0;
+ dr->in->data[bd->instr_pos + 2] = 0;
+
+ urj_tap_chain_shift_data_registers (chain, 1);
+
+ /* extract data from TDO stream */
+ d = 0;
+ for (idx = 0; idx < block->data_width; idx++)
+ if (dr->out->data[bd->data_pos + idx])
+ d |= 1 << idx;
+
+ return d;
+}
+
+/**
+ * bus->driver->(*write)
+ *
+ */
+static void
+fjmem_bus_write (urj_bus_t *bus, uint32_t adr, uint32_t data)
+{
+ urj_chain_t *chain = bus->chain;
+ block_desc_t *bd = &(BLOCK_DESC);
+ urj_data_register_t *dr = FJMEM_REG;
+ urj_bus_area_t area;
+ block_param_t *block;
+
+ block_bus_area (bus, adr, &area, &block);
+ if (!block)
+ {
+ urj_error_set (URJ_ERROR_OUT_OF_BOUNDS, _("Address out of range"));
+ return;
+ }
+
+ setup_address (bus, adr, block);
+ setup_data (bus, data, block);
+
+ /* select write instruction */
+ dr->in->data[bd->instr_pos + 0] = 0;
+ dr->in->data[bd->instr_pos + 1] = 1;
+ dr->in->data[bd->instr_pos + 2] = 0;
+
+ urj_tap_chain_shift_data_registers (chain, 0);
+}
+
+const urj_bus_driver_t urj_bus_fjmem_bus = {
+ "fjmem",
+ N_("FPGA JTAG memory bus driver via USER register, requires parameters:\n"
+ " opcode=<USERx OPCODE> [len=<FJMEM REG LEN>]"),
+ fjmem_bus_new,
+ fjmem_bus_free,
+ fjmem_bus_printinfo,
+ fjmem_bus_prepare,
+ fjmem_bus_area,
+ fjmem_bus_read_start,
+ fjmem_bus_read_next,
+ fjmem_bus_read_end,
+ urj_bus_generic_read,
+ fjmem_bus_write,
+ urj_bus_generic_no_init
+};
+
+
+/*
+ Local Variables:
+ mode:C
+ tab-width:2
+ indent-tabs-mode:t
+ End:
+*/
--- /dev/null
+/*
+ * $Id$
+ *
+ * Generic bus driver utility functions
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by H Hartley Sweeten <hsweeten@visionengravers.com>, 2008.
+ *
+ */
+
+#include <sysdep.h>
+
+#include <stdlib.h>
+
+#include <urjtag/error.h>
+#include <urjtag/part.h>
+#include <urjtag/chain.h>
+
+#include "generic_bus.h"
+
+int
+urj_bus_generic_attach_sig (urj_part_t *part, urj_part_signal_t **sig,
+ char *id)
+{
+ *sig = urj_part_find_signal (part, id);
+ if (!*sig)
+ {
+ urj_error_set (URJ_ERROR_NOTFOUND, "signal '%s'", id);
+ return URJ_STATUS_FAIL;
+ }
+
+ return URJ_STATUS_OK;
+}
+
+urj_bus_t *
+urj_bus_generic_new (urj_chain_t *chain, const urj_bus_driver_t *driver,
+ size_t param_size)
+{
+ urj_bus_t *bus;
+
+ bus = calloc (1, sizeof (urj_bus_t));
+ if (bus == NULL)
+ {
+ urj_error_set (URJ_ERROR_OUT_OF_MEMORY, "calloc(%zd,%zd) fails",
+ (size_t) 1, sizeof (urj_bus_t));
+ return NULL;
+ }
+
+ bus->driver = driver;
+ bus->params = calloc (1, param_size);
+ if (bus->params == NULL)
+ {
+ free (bus);
+ urj_error_set (URJ_ERROR_OUT_OF_MEMORY, "calloc(%zd,%zd) fails",
+ (size_t) 1, param_size);
+ return NULL;
+ }
+
+ bus->chain = chain;
+ // @@@@ RFHH shouldn't we verify chain->active_part etc?
+ bus->part = chain->parts->parts[chain->active_part];
+
+ return bus;
+}
+
+/**
+ * bus->driver->(*free_bus)
+ *
+ */
+void
+urj_bus_generic_free (urj_bus_t *bus)
+{
+ free (bus->params);
+ free (bus);
+}
+
+/**
+ * bus->driver->(*init)
+ *
+ */
+int
+urj_bus_generic_no_init (urj_bus_t *bus)
+{
+ bus->initialized = 1;
+
+ return URJ_STATUS_OK;
+}
+
+/**
+ * bus->driver->(*prepare)
+ *
+ */
+void
+urj_bus_generic_prepare_extest (urj_bus_t *bus)
+{
+ if (!bus->initialized)
+ URJ_BUS_INIT (bus);
+
+ urj_part_set_instruction (bus->part, "EXTEST");
+ urj_tap_chain_shift_instructions (bus->chain);
+}
+
+/**
+ * bus->driver->(*read)
+ *
+ */
+uint32_t
+urj_bus_generic_read (urj_bus_t *bus, uint32_t adr)
+{
+ // @@@@ RFHH check status
+ URJ_BUS_READ_START (bus, adr);
+ return URJ_BUS_READ_END (bus);
+}
--- /dev/null
+/*
+ * $Id$
+ *
+ * Generic bus driver utility functions
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by H Hartley Sweeten <hsweeten@visionengravers.com>, 2008.
+ *
+ */
+
+#ifndef URJ_BUS_GENERIC_BUS_H
+#define URJ_BUS_GENERIC_BUS_H
+
+#include <stddef.h>
+
+#include <urjtag/bus.h>
+
+int urj_bus_generic_attach_sig (urj_part_t *part, urj_part_signal_t **sig,
+ char *id);
+
+urj_bus_t *urj_bus_generic_new (urj_chain_t *chain,
+ const urj_bus_driver_t *driver,
+ size_t param_size);
+void urj_bus_generic_free (urj_bus_t *bus);
+int urj_bus_generic_no_init (urj_bus_t *bus);
+void urj_bus_generic_prepare_extest (urj_bus_t *bus);
+uint32_t urj_bus_generic_read (urj_bus_t *bus, uint32_t adr);
+
+#endif /* URJ_BUS_GENERIC_BUS_H */
--- /dev/null
+/*
+ * Copyright (C) 2005, Raphael Mack
+ * Work heavily based on file sa1110.c
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Raphael Mack <mail AT raphael-mack DOT de>
+ *
+ * Documentation:
+ * [1] MagnaChip Semiconductor Ltd. "HMS30C7202"
+ *
+ */
+
+#include <sysdep.h>
+
+#include <stdlib.h>
+#include <stdint.h>
+#include <string.h>
+
+#include <urjtag/part.h>
+#include <urjtag/bus.h>
+#include <urjtag/chain.h>
+#include <urjtag/bssignal.h>
+
+#include "buses.h"
+#include "generic_bus.h"
+
+typedef struct
+{
+ urj_part_signal_t *a[25];
+ urj_part_signal_t *d[32];
+ urj_part_signal_t *nRCS[4];
+ urj_part_signal_t *nRWE[4];
+ urj_part_signal_t *nROE;
+} bus_params_t;
+
+#define A ((bus_params_t *) bus->params)->a
+#define D ((bus_params_t *) bus->params)->d
+#define nRCS ((bus_params_t *) bus->params)->nRCS
+#define nRWE ((bus_params_t *) bus->params)->nRWE
+#define nROE ((bus_params_t *) bus->params)->nROE
+
+/**
+ * bus->driver->(*new_bus)
+ *
+ */
+static urj_bus_t *
+h7202_bus_new (urj_chain_t *chain, const urj_bus_driver_t *driver,
+ const urj_param_t *cmd_params[])
+{
+ urj_bus_t *bus;
+ urj_part_t *part;
+ char buff[10];
+ int i;
+ int failed = 0;
+
+ bus = urj_bus_generic_new (chain, driver, sizeof (bus_params_t));
+ if (bus == NULL)
+ return NULL;
+ part = bus->part;
+
+ for (i = 0; i < 25; i++)
+ {
+ sprintf (buff, "RA%d", i);
+ failed |= urj_bus_generic_attach_sig (part, &(A[i]), buff);
+ }
+
+ for (i = 0; i < 32; i++)
+ {
+ sprintf (buff, "RD%d", i);
+ failed |= urj_bus_generic_attach_sig (part, &(D[i]), buff);
+ }
+
+ for (i = 0; i < 4; i++)
+ {
+ sprintf (buff, "nRCS%d", i);
+ failed |= urj_bus_generic_attach_sig (part, &(nRCS[i]), buff);
+ }
+
+ failed |= urj_bus_generic_attach_sig (part, &(nROE), "nROE");
+
+ for (i = 0; i < 4; i++)
+ {
+ sprintf (buff, "nRWE%d", i);
+ failed |= urj_bus_generic_attach_sig (part, &(nRWE[i]), buff);
+ }
+
+ if (failed)
+ {
+ urj_bus_generic_free (bus);
+ return NULL;
+ }
+
+ return bus;
+}
+
+/**
+ * bus->driver->(*printinfo)
+ *
+ */
+static void
+h7202_bus_printinfo (urj_log_level_t ll, urj_bus_t *bus)
+{
+ int i;
+
+ for (i = 0; i < bus->chain->parts->len; i++)
+ if (bus->part == bus->chain->parts->parts[i])
+ break;
+ urj_log (ll, "H7202 compatible bus driver via BSR (JTAG part No. %d)\n", i);
+}
+
+/**
+ * bus->driver->(*area)
+ *
+ */
+static int
+h7202_bus_area (urj_bus_t *bus, uint32_t adr, urj_bus_area_t *area)
+{
+ area->description = NULL;
+ area->start = UINT32_C (0x00000000);
+ area->length = UINT64_C (0x100000000);
+ area->width = 16; //urj_part_get_signal( bus->part, urj_part_find_signal( bus->part, "ROM_SEL" ) ) ? 32 : 16;
+
+ return URJ_STATUS_OK;
+}
+
+static void
+setup_address (urj_bus_t *bus, uint32_t a)
+{
+ int i;
+ urj_part_t *p = bus->part;
+
+ for (i = 0; i < 26; i++)
+ urj_part_set_signal (p, A[i], 1, (a >> i) & 1);
+}
+
+static void
+set_data_in (urj_bus_t *bus)
+{
+ int i;
+ urj_part_t *p = bus->part;
+ urj_bus_area_t area;
+
+ h7202_bus_area (bus, 0, &area);
+
+ for (i = 0; i < area.width; i++)
+ urj_part_set_signal (p, D[i], 0, 0);
+}
+
+static void
+setup_data (urj_bus_t *bus, uint32_t d)
+{
+ int i;
+ urj_part_t *p = bus->part;
+ urj_bus_area_t area;
+
+ h7202_bus_area (bus, 0, &area);
+
+ for (i = 0; i < area.width; i++)
+ urj_part_set_signal (p, D[i], 1, (d >> i) & 1);
+}
+
+/**
+ * bus->driver->(*read_start)
+ *
+ */
+static int
+h7202_bus_read_start (urj_bus_t *bus, uint32_t adr)
+{
+ /* see Figure 10-12 in [1] */
+ urj_part_t *p = bus->part;
+ urj_chain_t *chain = bus->chain;
+
+ urj_part_set_signal (p, nRCS[0], 1, 0);
+ urj_part_set_signal (p, nRCS[1], 1, 1);
+ urj_part_set_signal (p, nRCS[2], 1, 1);
+ urj_part_set_signal (p, nRCS[3], 1, 1);
+ urj_part_set_signal (p, nRWE[0], 1, 1);
+ urj_part_set_signal (p, nROE, 1, 0);
+
+ setup_address (bus, adr);
+ set_data_in (bus);
+
+ urj_tap_chain_shift_data_registers (chain, 0);
+
+ return URJ_STATUS_OK;
+}
+
+/**
+ * bus->driver->(*read_next)
+ *
+ */
+static uint32_t
+h7202_bus_read_next (urj_bus_t *bus, uint32_t adr)
+{
+ /* see Figure 10-12 in [1] */
+ urj_part_t *p = bus->part;
+ urj_chain_t *chain = bus->chain;
+ int i;
+ uint32_t d = 0;
+ urj_bus_area_t area;
+
+ h7202_bus_area (bus, adr, &area);
+
+ setup_address (bus, adr);
+ urj_tap_chain_shift_data_registers (chain, 1);
+
+ for (i = 0; i < area.width; i++)
+ d |= (uint32_t) (urj_part_get_signal (p, D[i]) << i);
+
+ return d;
+}
+
+/**
+ * bus->driver->(*read_end)
+ *
+ */
+static uint32_t
+h7202_bus_read_end (urj_bus_t *bus)
+{
+ /* see Figure 10-12 in [1] */
+ urj_part_t *p = bus->part;
+ urj_chain_t *chain = bus->chain;
+ int i;
+ uint32_t d = 0;
+ urj_bus_area_t area;
+
+ h7202_bus_area (bus, 0, &area);
+
+ urj_part_set_signal (p, nRCS[0], 1, 1);
+ urj_part_set_signal (p, nRCS[1], 1, 1);
+ urj_part_set_signal (p, nRCS[2], 1, 1);
+ urj_part_set_signal (p, nRCS[3], 1, 1);
+ urj_part_set_signal (p, nROE, 1, 1);
+ urj_tap_chain_shift_data_registers (chain, 1);
+
+ for (i = 0; i < area.width; i++)
+ d |= (uint32_t) (urj_part_get_signal (p, D[i]) << i);
+
+ return d;
+}
+
+/**
+ * bus->driver->(*write)
+ *
+ */
+static void
+h7202_bus_write (urj_bus_t *bus, uint32_t adr, uint32_t data)
+{
+ /* see Figure 10-16 in [1] */
+ urj_part_t *p = bus->part;
+ urj_chain_t *chain = bus->chain;
+
+ // urj_part_set_signal( p, nRCS[0], 1, (adr >> 27) != 0 );
+ //urj_part_set_signal( p, nRCS[1], 1, (adr >> 27) != 1 );
+ //urj_part_set_signal( p, nRCS[2], 1, (adr >> 27) != 2 );
+ //urj_part_set_signal( p, nRCS[3], 1, (adr >> 27) != 3 );
+ urj_part_set_signal (p, nRCS[0], 1, 0);
+ urj_part_set_signal (p, nRCS[1], 1, 1);
+ urj_part_set_signal (p, nRCS[2], 1, 1);
+ urj_part_set_signal (p, nRCS[3], 1, 1);
+
+ urj_part_set_signal (p, nRWE[0], 1, 0);
+ urj_part_set_signal (p, nRWE[1], 1, 1);
+ urj_part_set_signal (p, nRWE[2], 1, 1);
+ urj_part_set_signal (p, nRWE[3], 1, 1);
+ urj_part_set_signal (p, nROE, 1, 1);
+
+ setup_address (bus, adr);
+ setup_data (bus, data);
+
+ urj_tap_chain_shift_data_registers (chain, 0);
+
+ urj_part_set_signal (p, nRWE[0], 1, 1);
+ urj_part_set_signal (p, nRCS[0], 1, 1);
+ urj_part_set_signal (p, nRCS[1], 1, 1);
+ urj_part_set_signal (p, nRCS[2], 1, 1);
+ urj_part_set_signal (p, nRCS[3], 1, 1);
+ urj_tap_chain_shift_data_registers (chain, 0);
+}
+
+const urj_bus_driver_t urj_bus_h7202_bus = {
+ "h7202",
+ "H7202 compatible bus driver via BSR",
+ h7202_bus_new,
+ urj_bus_generic_free,
+ h7202_bus_printinfo,
+ urj_bus_generic_prepare_extest,
+ h7202_bus_area,
+ h7202_bus_read_start,
+ h7202_bus_read_next,
+ h7202_bus_read_end,
+ urj_bus_generic_read,
+ h7202_bus_write,
+ urj_bus_generic_no_init
+};
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2002 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Christian Pellegrin <chri@ascensit.com>, 2003.
+ * Modified by Marcel Telka <marcel@telka.sk>, 2003.
+ *
+ */
+
+#include <sysdep.h>
+
+#include <stdlib.h>
+#include <stdint.h>
+#include <string.h>
+
+#include <urjtag/part.h>
+#include <urjtag/bus.h>
+#include <urjtag/chain.h>
+#include <urjtag/bssignal.h>
+
+#include "buses.h"
+#include "generic_bus.h"
+
+typedef struct
+{
+ urj_part_signal_t *ex_cs[8];
+ urj_part_signal_t *ex_addr[24];
+ urj_part_signal_t *ex_data[16];
+ urj_part_signal_t *ex_wr;
+ urj_part_signal_t *ex_rd;
+} bus_params_t;
+
+#define EX_CS ((bus_params_t *) bus->params)->ex_cs
+#define EX_ADDR ((bus_params_t *) bus->params)->ex_addr
+#define EX_DATA ((bus_params_t *) bus->params)->ex_data
+#define EX_WR ((bus_params_t *) bus->params)->ex_wr
+#define EX_RD ((bus_params_t *) bus->params)->ex_rd
+
+/**
+ * bus->driver->(*new_bus)
+ *
+ */
+static urj_bus_t *
+ixp425_bus_new (urj_chain_t *chain, const urj_bus_driver_t *driver,
+ const urj_param_t *cmd_params[])
+{
+ urj_bus_t *bus;
+ urj_part_t *part;
+ char buff[15];
+ int i;
+ int failed = 0;
+
+ bus = urj_bus_generic_new (chain, driver, sizeof (bus_params_t));
+ if (bus == NULL)
+ return NULL;
+ part = bus->part;
+
+ for (i = 0; i < 8; i++)
+ {
+ sprintf (buff, "EX_CS[%d]", i);
+ failed |= urj_bus_generic_attach_sig (part, &(EX_CS[i]), buff);
+ }
+
+ for (i = 0; i < 24; i++)
+ {
+ sprintf (buff, "EX_ADDR[%d]", i);
+ failed |= urj_bus_generic_attach_sig (part, &(EX_ADDR[i]), buff);
+ }
+
+ for (i = 0; i < 16; i++)
+ {
+ sprintf (buff, "EX_DATA[%d]", i);
+ failed |= urj_bus_generic_attach_sig (part, &(EX_DATA[i]), buff);
+ }
+
+ failed |= urj_bus_generic_attach_sig (part, &(EX_WR), "EX_WR");
+
+ failed |= urj_bus_generic_attach_sig (part, &(EX_RD), "EX_RD");
+
+ if (failed)
+ {
+ urj_bus_generic_free (bus);
+ return NULL;
+ }
+
+ return bus;
+}
+
+/**
+ * bus->driver->(*printinfo)
+ *
+ */
+static void
+ixp425_bus_printinfo (urj_log_level_t ll, urj_bus_t *bus)
+{
+ int i;
+
+ for (i = 0; i < bus->chain->parts->len; i++)
+ if (bus->part == bus->chain->parts->parts[i])
+ break;
+ urj_log (ll, _("Intel IXP425 compatible bus driver via BSR (JTAG part No. %d)\n"),
+ i);
+}
+
+/**
+ * bus->driver->(*area)
+ *
+ */
+static int
+ixp425_bus_area (urj_bus_t *bus, uint32_t adr, urj_bus_area_t *area)
+{
+ area->description = NULL;
+ area->start = UINT32_C (0x00000000);
+ area->length = UINT64_C (0x100000000);
+ area->width = 16;
+
+ return URJ_STATUS_OK;
+}
+
+static void
+select_flash (urj_bus_t *bus)
+{
+ urj_part_t *p = bus->part;
+
+ urj_part_set_signal (p, EX_CS[0], 1, 0);
+ urj_part_set_signal (p, EX_CS[1], 1, 1);
+ urj_part_set_signal (p, EX_CS[2], 1, 1);
+ urj_part_set_signal (p, EX_CS[3], 1, 1);
+ urj_part_set_signal (p, EX_CS[4], 1, 1);
+ urj_part_set_signal (p, EX_CS[5], 1, 1);
+ urj_part_set_signal (p, EX_CS[6], 1, 1);
+ urj_part_set_signal (p, EX_CS[7], 1, 1);
+}
+
+static void
+unselect_flash (urj_bus_t *bus)
+{
+ urj_part_t *p = bus->part;
+
+ urj_part_set_signal (p, EX_CS[0], 1, 1);
+ urj_part_set_signal (p, EX_CS[1], 1, 1);
+ urj_part_set_signal (p, EX_CS[2], 1, 1);
+ urj_part_set_signal (p, EX_CS[3], 1, 1);
+ urj_part_set_signal (p, EX_CS[4], 1, 1);
+ urj_part_set_signal (p, EX_CS[5], 1, 1);
+ urj_part_set_signal (p, EX_CS[6], 1, 1);
+ urj_part_set_signal (p, EX_CS[7], 1, 1);
+}
+
+static void
+setup_address (urj_bus_t *bus, uint32_t a)
+{
+ int i;
+ urj_part_t *p = bus->part;
+
+ for (i = 0; i < 24; i++)
+ urj_part_set_signal (p, EX_ADDR[i], 1, (a >> i) & 1);
+}
+
+static void
+set_data_in (urj_bus_t *bus)
+{
+ int i;
+ urj_part_t *p = bus->part;
+
+ for (i = 0; i < 16; i++)
+ urj_part_set_signal (p, EX_DATA[i], 0, 0);
+}
+
+static void
+setup_data (urj_bus_t *bus, uint32_t d)
+{
+ int i;
+ urj_part_t *p = bus->part;
+
+ for (i = 0; i < 16; i++)
+ urj_part_set_signal (p, EX_DATA[i], 1, (d >> i) & 1);
+}
+
+/**
+ * bus->driver->(*read_start)
+ *
+ */
+static int
+ixp425_bus_read_start (urj_bus_t *bus, uint32_t adr)
+{
+ urj_part_t *p = bus->part;
+ urj_chain_t *chain = bus->chain;
+
+ select_flash (bus);
+ urj_part_set_signal (p, EX_RD, 1, 0);
+ urj_part_set_signal (p, EX_WR, 1, 1);
+
+ setup_address (bus, adr);
+ set_data_in (bus);
+
+ urj_tap_chain_shift_data_registers (chain, 0);
+
+ return URJ_STATUS_OK;
+}
+
+/**
+ * bus->driver->(*read_next)
+ *
+ */
+static uint32_t
+ixp425_bus_read_next (urj_bus_t *bus, uint32_t adr)
+{
+ urj_part_t *p = bus->part;
+ urj_chain_t *chain = bus->chain;
+ int i;
+ uint32_t d = 0;
+
+ setup_address (bus, adr);
+ urj_tap_chain_shift_data_registers (chain, 1);
+
+ for (i = 0; i < 16; i++)
+ d |= (uint32_t) (urj_part_get_signal (p, EX_DATA[i]) << i);
+
+ return d;
+}
+
+/**
+ * bus->driver->(*read_end)
+ *
+ */
+static uint32_t
+ixp425_bus_read_end (urj_bus_t *bus)
+{
+ urj_part_t *p = bus->part;
+ urj_chain_t *chain = bus->chain;
+ int i;
+ uint32_t d = 0;
+
+ unselect_flash (bus);
+ urj_part_set_signal (p, EX_RD, 1, 1);
+ urj_part_set_signal (p, EX_WR, 1, 1);
+
+ urj_tap_chain_shift_data_registers (chain, 1);
+
+ for (i = 0; i < 16; i++)
+ d |= (uint32_t) (urj_part_get_signal (p, EX_DATA[i]) << i);
+
+ return d;
+}
+
+/**
+ * bus->driver->(*write)
+ *
+ */
+static void
+ixp425_bus_write (urj_bus_t *bus, uint32_t adr, uint32_t data)
+{
+ urj_part_t *p = bus->part;
+ urj_chain_t *chain = bus->chain;
+
+ select_flash (bus);
+ urj_part_set_signal (p, EX_RD, 1, 1);
+
+ setup_address (bus, adr);
+ setup_data (bus, data);
+
+ urj_tap_chain_shift_data_registers (chain, 0);
+
+ urj_part_set_signal (p, EX_WR, 1, 0);
+ urj_tap_chain_shift_data_registers (chain, 0);
+ urj_part_set_signal (p, EX_WR, 1, 1);
+ unselect_flash (bus);
+ urj_tap_chain_shift_data_registers (chain, 0);
+}
+
+const urj_bus_driver_t urj_bus_ixp425_bus = {
+ "ixp425",
+ N_("Intel IXP425 compatible bus driver via BSR"),
+ ixp425_bus_new,
+ urj_bus_generic_free,
+ ixp425_bus_printinfo,
+ urj_bus_generic_prepare_extest,
+ ixp425_bus_area,
+ ixp425_bus_read_start,
+ ixp425_bus_read_next,
+ ixp425_bus_read_end,
+ urj_bus_generic_read,
+ ixp425_bus_write,
+ urj_bus_generic_no_init
+};
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2002 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Christian Pellegrin <chri@ascensit.com>, 2003.
+ * Modified by Marcel Telka <marcel@telka.sk>, 2003.
+ * Adapted for IXP43x by Florian Boor <florian@kernelconcepts.de>, 2009.
+ *
+ */
+
+#include "sysdep.h"
+
+#include <stdlib.h>
+#include <stdint.h>
+#include <string.h>
+
+#include <urjtag/part.h>
+#include <urjtag/bus.h>
+#include <urjtag/chain.h>
+#include <urjtag/bssignal.h>
+
+#include "buses.h"
+#include "generic_bus.h"
+
+typedef struct {
+ urj_part_signal_t *ex_cs[4];
+ urj_part_signal_t *ex_addr[24];
+ urj_part_signal_t *ex_data[16];
+ urj_part_signal_t *ex_wr;
+ urj_part_signal_t *ex_rd;
+} bus_params_t;
+
+#define EX_CS ((bus_params_t *) bus->params)->ex_cs
+#define EX_ADDR ((bus_params_t *) bus->params)->ex_addr
+#define EX_DATA ((bus_params_t *) bus->params)->ex_data
+#define EX_WR ((bus_params_t *) bus->params)->ex_wr
+#define EX_RD ((bus_params_t *) bus->params)->ex_rd
+
+/**
+ * bus->driver->(*new_bus)
+ *
+ */
+static urj_bus_t *
+ixp435_bus_new (urj_chain_t *chain, const urj_bus_driver_t *driver,
+ const urj_param_t *cmd_params[])
+{
+ urj_bus_t *bus;
+ urj_part_t *part;
+ char buff[15];
+ int i;
+ int failed = 0;
+
+ bus = urj_bus_generic_new (chain, driver, sizeof (bus_params_t));
+ if (bus == NULL)
+ return NULL;
+ part = bus->part;
+
+ for (i = 0; i < 4; i++) {
+ sprintf (buff, "ex_cs_n%d", i);
+ failed |= urj_bus_generic_attach_sig (part, &(EX_CS[i]), buff);
+ }
+
+ for (i = 0; i < 24; i++) {
+ sprintf (buff, "ex_addr%d", i);
+ failed |= urj_bus_generic_attach_sig (part, &(EX_ADDR[i]), buff);
+ }
+
+ for (i = 0; i < 16; i++) {
+ sprintf (buff, "ex_data%d", i);
+ failed |= urj_bus_generic_attach_sig (part, &(EX_DATA[i]), buff);
+ }
+
+ failed |= urj_bus_generic_attach_sig (part, &(EX_WR), "ex_wr_n");
+
+ failed |= urj_bus_generic_attach_sig (part, &(EX_RD), "ex_rd_n");
+
+ if (failed) {
+ urj_bus_generic_free (bus);
+ return NULL;
+ }
+
+ return bus;
+}
+
+/**
+ * bus->driver->(*printinfo)
+ *
+ */
+static void
+ixp435_bus_printinfo (urj_log_level_t ll, urj_bus_t *bus)
+{
+ int i;
+
+ for (i = 0; i < bus->chain->parts->len; i++)
+ if (bus->part == bus->chain->parts->parts[i])
+ break;
+ urj_log (ll, _("Intel IXP435 compatible bus driver (JTAG part No. %d)\n"),
+ i);
+}
+
+/**
+ * bus->driver->(*area)
+ *
+ */
+static int
+ixp435_bus_area (urj_bus_t *bus, uint32_t adr, urj_bus_area_t *area)
+{
+ area->description = NULL;
+ area->start = UINT32_C(0x00000000);
+ area->length = UINT64_C(0x100000000);
+ area->width = 16;
+
+ return URJ_STATUS_OK;
+}
+
+static void
+select_flash (urj_bus_t *bus)
+{
+ urj_part_t *p = bus->part;
+
+ urj_part_set_signal (p, EX_CS[0], 1, 0);
+ urj_part_set_signal (p, EX_CS[1], 1, 1);
+ urj_part_set_signal (p, EX_CS[2], 1, 1);
+ urj_part_set_signal (p, EX_CS[3], 1, 1);
+}
+
+static void
+unselect_flash (urj_bus_t *bus)
+{
+ urj_part_t *p = bus->part;
+
+ urj_part_set_signal (p, EX_CS[0], 1, 1);
+ urj_part_set_signal (p, EX_CS[1], 1, 1);
+ urj_part_set_signal (p, EX_CS[2], 1, 1);
+ urj_part_set_signal (p, EX_CS[3], 1, 1);
+}
+
+static void
+setup_address (urj_bus_t *bus, uint32_t a)
+{
+ int i;
+ urj_part_t *p = bus->part;
+
+ for (i = 0; i < 24; i++)
+ urj_part_set_signal (p, EX_ADDR[i], 1, (a >> i) & 1);
+}
+
+static void
+set_data_in (urj_bus_t *bus)
+{
+ int i;
+ urj_part_t *p = bus->part;
+
+ for (i = 0; i < 16; i++)
+ urj_part_set_signal (p, EX_DATA[i], 0, 0);
+}
+
+static void
+setup_data (urj_bus_t *bus, uint32_t d)
+{
+ int i;
+ urj_part_t *p = bus->part;
+
+ for (i = 0; i < 16; i++)
+ urj_part_set_signal (p, EX_DATA[i], 1, (d >> i) & 1);
+}
+
+/**
+ * bus->driver->(*read_start)
+ *
+ */
+static int
+ixp435_bus_read_start (urj_bus_t *bus, uint32_t adr)
+{
+ urj_part_t *p = bus->part;
+ urj_chain_t *chain = bus->chain;
+
+ select_flash (bus);
+ urj_part_set_signal (p, EX_RD, 1, 0);
+ urj_part_set_signal (p, EX_WR, 1, 1);
+
+ setup_address (bus, adr);
+ set_data_in (bus);
+
+ urj_tap_chain_shift_data_registers (chain, 0);
+
+ return URJ_STATUS_OK;
+}
+
+/**
+ * bus->driver->(*read_next)
+ *
+ */
+static uint32_t
+ixp435_bus_read_next (urj_bus_t *bus, uint32_t adr)
+{
+ urj_part_t *p = bus->part;
+ urj_chain_t *chain = bus->chain;
+ int i;
+ uint32_t d = 0;
+
+ setup_address (bus, adr);
+ urj_tap_chain_shift_data_registers (chain, 1);
+
+ for (i = 0; i < 16; i++)
+ d |= (uint32_t) (urj_part_get_signal (p, EX_DATA[i] ) << i);
+
+ return d;
+}
+
+/**
+ * bus->driver->(*read_end)
+ *
+ */
+static uint32_t
+ixp435_bus_read_end (urj_bus_t *bus)
+{
+ urj_part_t *p = bus->part;
+ urj_chain_t *chain = bus->chain;
+ int i;
+ uint32_t d = 0;
+
+ unselect_flash (bus);
+ urj_part_set_signal (p, EX_RD, 1, 1);
+ urj_part_set_signal (p, EX_WR, 1, 1);
+
+ urj_tap_chain_shift_data_registers (chain, 1);
+
+ for (i = 0; i < 16; i++)
+ d |= (uint32_t) (urj_part_get_signal (p, EX_DATA[i] ) << i);
+
+ return d;
+}
+
+/**
+ * bus->driver->(*write)
+ *
+ */
+static void
+ixp435_bus_write (urj_bus_t *bus, uint32_t adr, uint32_t data)
+{
+ urj_part_t *p = bus->part;
+ urj_chain_t *chain = bus->chain;
+
+ select_flash (bus);
+ urj_part_set_signal (p, EX_RD, 1, 1);
+
+ setup_address (bus, adr);
+ setup_data (bus, data);
+
+ urj_tap_chain_shift_data_registers (chain, 0);
+
+ urj_part_set_signal (p, EX_WR, 1, 0);
+ urj_tap_chain_shift_data_registers (chain, 0);
+ urj_part_set_signal (p, EX_WR, 1, 1);
+ unselect_flash (bus);
+ urj_tap_chain_shift_data_registers (chain, 0);
+}
+
+const urj_bus_driver_t urj_bus_ixp435_bus = {
+ "ixp435",
+ N_("Intel IXP435 compatible bus driver"),
+ ixp435_bus_new,
+ urj_bus_generic_free,
+ ixp435_bus_printinfo,
+ urj_bus_generic_prepare_extest,
+ ixp435_bus_area,
+ ixp435_bus_read_start,
+ ixp435_bus_read_next,
+ ixp435_bus_read_end,
+ urj_bus_generic_read,
+ ixp435_bus_write,
+ urj_bus_generic_no_init
+};
--- /dev/null
+/*
+ * $Id$
+ *
+ * Bus driver for the Cyclone Boards manufactured by JOP.design.
+ *
+ * http://www.jopdesign.com/
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Arnim Laeuger <arniml@users.sourceforge.net>, 2005.
+ *
+ * Notes:
+ * ------
+ * This driver supports both RAMs and the Flash memory found on
+ * the Cyclone Boards. So far, it has been tested with the EP1C12
+ * board - the CYCBIG1M32M product. In general, the board equipped
+ * with the EP1C6 should work without any modifications of this
+ * driver. You will definitely require a proper device description
+ * for the EP1C6Q240.
+ *
+ * http://jopdesign.com/cyclone/cyc.pdf
+ *
+ * The three external components are assigned different address
+ * ranges. These are arbtitrary but help to distinguish the devices.
+ *
+ * RAMA: 0x00000000 - 0x0007FFFF
+ * RAMB: 0x00080000 - 0x000FFFFF
+ * Flash: 0x00100000 - 0x0017FFFF
+ *
+ * JTAG Tool generates byte addresses when accessing memories. Thus
+ * this driver discards the LSB when the RAM ranges are addressed.
+ * readmem and writemem care for proper address increment based on
+ * the bus width.
+ * On the other hand, this driver reads and writes always one word
+ * (= 2 bytes) from/to the RAMs. It does not use the byte-enables.
+ * This is mainly due to the lack of byte-enable information in the
+ * bus-driver API.
+ *
+ * Remember to clarify the endianess of your data when working with
+ * the RAMs.
+ *
+ */
+
+#include <sysdep.h>
+
+#include <stdlib.h>
+#include <stdint.h>
+#include <string.h>
+
+#include <urjtag/part.h>
+#include <urjtag/bus.h>
+#include <urjtag/chain.h>
+#include <urjtag/bssignal.h>
+#include <urjtag/tap_state.h>
+
+#include "buses.h"
+#include "generic_bus.h"
+
+#define RAM_ADDR_WIDTH 18
+#define RAM_DATA_WIDTH 16
+#define FLASH_ADDR_WIDTH 19
+#define FLASH_DATA_WIDTH 8
+
+/* length is in number of bytes
+ the full address width is taken to build the power of 2 */
+#define RAM_LENGTH (1 << (RAM_ADDR_WIDTH + 1))
+#define FLASH_LENGTH (1 << FLASH_ADDR_WIDTH)
+
+#define RAMA_START 0
+#define RAMB_START RAM_LENGTH
+#define FLASH_START (2 * RAM_LENGTH)
+
+typedef enum
+{ RAM, FLASH, NAND } ctype_t;
+
+typedef struct
+{
+ ctype_t ctype;
+ char *cname;
+ urj_part_signal_t *a[FLASH_ADDR_WIDTH];
+ urj_part_signal_t *d[RAM_DATA_WIDTH];
+ urj_part_signal_t *ncs;
+ urj_part_signal_t *noe;
+ urj_part_signal_t *nwe;
+ urj_part_signal_t *nlb;
+ urj_part_signal_t *nub;
+ urj_part_signal_t *ncs2;
+ urj_part_signal_t *nrdy;
+} component_t;
+
+typedef struct
+{
+ uint32_t last_addr; /* holds last address of read or write access */
+ component_t rama;
+ component_t ramb;
+ component_t flash;
+ urj_part_signal_t *ser_txd;
+ urj_part_signal_t *ser_nrts;
+ urj_part_signal_t *ser_rxd;
+ urj_part_signal_t *ser_ncts;
+} bus_params_t;
+
+#define LAST_ADDR ((bus_params_t *) bus->params)->last_addr
+#define A comp->a
+#define D comp->d
+#define nCS comp->ncs
+#define nOE comp->noe
+#define nWE comp->nwe
+#define nLB comp->nlb
+#define nUB comp->nub
+#define nCS2 comp->ncs2
+#define nRDY comp->nrdy
+
+#define COMP_RAMA &(((bus_params_t *) bus->params)->rama)
+#define COMP_RAMB &(((bus_params_t *) bus->params)->ramb)
+#define COMP_FLASH &(((bus_params_t *) bus->params)->flash)
+
+#define SER_RXD ((bus_params_t *) bus->params)->ser_rxd
+#define SER_NRTS ((bus_params_t *) bus->params)->ser_nrts
+#define SER_TXD ((bus_params_t *) bus->params)->ser_txd
+#define SER_NCTS ((bus_params_t *) bus->params)->ser_ncts
+
+/**
+ * bus->driver->(*new_bus)
+ *
+ */
+static urj_bus_t *
+jopcyc_bus_new (urj_chain_t *chain, const urj_bus_driver_t *driver,
+ const urj_param_t *cmd_params[])
+{
+ urj_bus_t *bus;
+ urj_part_t *part;
+ int failed = 0;
+ component_t *comp;
+
+ bus = urj_bus_generic_new (chain, driver, sizeof (bus_params_t));
+ if (bus == NULL)
+ return NULL;
+ part = bus->part;
+
+ /*
+ * Setup RAMA
+ */
+ comp = COMP_RAMA;
+ comp->ctype = RAM;
+ comp->cname = "RAMA";
+
+ failed |= urj_bus_generic_attach_sig (part, &(A[0]), "IO64");
+ failed |= urj_bus_generic_attach_sig (part, &(A[1]), "IO66");
+ failed |= urj_bus_generic_attach_sig (part, &(A[2]), "IO68");
+ failed |= urj_bus_generic_attach_sig (part, &(A[3]), "IO74");
+ failed |= urj_bus_generic_attach_sig (part, &(A[4]), "IO76");
+ failed |= urj_bus_generic_attach_sig (part, &(A[5]), "IO107");
+ failed |= urj_bus_generic_attach_sig (part, &(A[6]), "IO113");
+ failed |= urj_bus_generic_attach_sig (part, &(A[7]), "IO115");
+ failed |= urj_bus_generic_attach_sig (part, &(A[8]), "IO117");
+ failed |= urj_bus_generic_attach_sig (part, &(A[9]), "IO119");
+ failed |= urj_bus_generic_attach_sig (part, &(A[10]), "IO118");
+ failed |= urj_bus_generic_attach_sig (part, &(A[11]), "IO116");
+ failed |= urj_bus_generic_attach_sig (part, &(A[12]), "IO114");
+ failed |= urj_bus_generic_attach_sig (part, &(A[13]), "IO108");
+ failed |= urj_bus_generic_attach_sig (part, &(A[14]), "IO106");
+ failed |= urj_bus_generic_attach_sig (part, &(A[15]), "IO67");
+ failed |= urj_bus_generic_attach_sig (part, &(A[16]), "IO65");
+ failed |= urj_bus_generic_attach_sig (part, &(A[17]), "IO63");
+ A[18] = NULL;
+
+ failed |= urj_bus_generic_attach_sig (part, &(D[0]), "IO82");
+ failed |= urj_bus_generic_attach_sig (part, &(D[1]), "IO84");
+ failed |= urj_bus_generic_attach_sig (part, &(D[2]), "IO86");
+ failed |= urj_bus_generic_attach_sig (part, &(D[3]), "IO88");
+ failed |= urj_bus_generic_attach_sig (part, &(D[4]), "IO94");
+ failed |= urj_bus_generic_attach_sig (part, &(D[5]), "IO98");
+ failed |= urj_bus_generic_attach_sig (part, &(D[6]), "IO100");
+ failed |= urj_bus_generic_attach_sig (part, &(D[7]), "IO104");
+ failed |= urj_bus_generic_attach_sig (part, &(D[8]), "IO101");
+ failed |= urj_bus_generic_attach_sig (part, &(D[9]), "IO99");
+ failed |= urj_bus_generic_attach_sig (part, &(D[10]), "IO95");
+ failed |= urj_bus_generic_attach_sig (part, &(D[11]), "IO93");
+ failed |= urj_bus_generic_attach_sig (part, &(D[12]), "IO87");
+ failed |= urj_bus_generic_attach_sig (part, &(D[13]), "IO85");
+ failed |= urj_bus_generic_attach_sig (part, &(D[14]), "IO83");
+ failed |= urj_bus_generic_attach_sig (part, &(D[15]), "IO79");
+
+ failed |= urj_bus_generic_attach_sig (part, &(nCS), "IO78");
+ failed |= urj_bus_generic_attach_sig (part, &(nOE), "IO73");
+ failed |= urj_bus_generic_attach_sig (part, &(nWE), "IO105");
+ failed |= urj_bus_generic_attach_sig (part, &(nLB), "IO77");
+ failed |= urj_bus_generic_attach_sig (part, &(nUB), "IO75");
+ nCS2 = NULL;
+ nRDY = NULL;
+
+ /*
+ * Setup RAMB
+ */
+ comp = COMP_RAMB;
+ comp->ctype = RAM;
+ comp->cname = "RAMB";
+
+ failed |= urj_bus_generic_attach_sig (part, &(A[0]), "IO237");
+ failed |= urj_bus_generic_attach_sig (part, &(A[1]), "IO235");
+ failed |= urj_bus_generic_attach_sig (part, &(A[2]), "IO233");
+ failed |= urj_bus_generic_attach_sig (part, &(A[3]), "IO227");
+ failed |= urj_bus_generic_attach_sig (part, &(A[4]), "IO225");
+ failed |= urj_bus_generic_attach_sig (part, &(A[5]), "IO194");
+ failed |= urj_bus_generic_attach_sig (part, &(A[6]), "IO188");
+ failed |= urj_bus_generic_attach_sig (part, &(A[7]), "IO186");
+ failed |= urj_bus_generic_attach_sig (part, &(A[8]), "IO184");
+ failed |= urj_bus_generic_attach_sig (part, &(A[9]), "IO182");
+ failed |= urj_bus_generic_attach_sig (part, &(A[10]), "IO183");
+ failed |= urj_bus_generic_attach_sig (part, &(A[11]), "IO185");
+ failed |= urj_bus_generic_attach_sig (part, &(A[12]), "IO187");
+ failed |= urj_bus_generic_attach_sig (part, &(A[13]), "IO193");
+ failed |= urj_bus_generic_attach_sig (part, &(A[14]), "IO195");
+ failed |= urj_bus_generic_attach_sig (part, &(A[15]), "IO234");
+ failed |= urj_bus_generic_attach_sig (part, &(A[16]), "IO236");
+ failed |= urj_bus_generic_attach_sig (part, &(A[17]), "IO238");
+ A[18] = NULL;
+
+ failed |= urj_bus_generic_attach_sig (part, &(D[0]), "IO219");
+ failed |= urj_bus_generic_attach_sig (part, &(D[1]), "IO217");
+ failed |= urj_bus_generic_attach_sig (part, &(D[2]), "IO215");
+ failed |= urj_bus_generic_attach_sig (part, &(D[3]), "IO213");
+ failed |= urj_bus_generic_attach_sig (part, &(D[4]), "IO207");
+ failed |= urj_bus_generic_attach_sig (part, &(D[5]), "IO203");
+ failed |= urj_bus_generic_attach_sig (part, &(D[6]), "IO201");
+ failed |= urj_bus_generic_attach_sig (part, &(D[7]), "IO197");
+ failed |= urj_bus_generic_attach_sig (part, &(D[8]), "IO200");
+ failed |= urj_bus_generic_attach_sig (part, &(D[9]), "IO202");
+ failed |= urj_bus_generic_attach_sig (part, &(D[10]), "IO206");
+ failed |= urj_bus_generic_attach_sig (part, &(D[11]), "IO208");
+ failed |= urj_bus_generic_attach_sig (part, &(D[12]), "IO214");
+ failed |= urj_bus_generic_attach_sig (part, &(D[13]), "IO216");
+ failed |= urj_bus_generic_attach_sig (part, &(D[14]), "IO218");
+ failed |= urj_bus_generic_attach_sig (part, &(D[15]), "IO222");
+
+ failed |= urj_bus_generic_attach_sig (part, &(nCS), "IO223");
+ failed |= urj_bus_generic_attach_sig (part, &(nOE), "IO228");
+ failed |= urj_bus_generic_attach_sig (part, &(nWE), "IO196");
+ failed |= urj_bus_generic_attach_sig (part, &(nLB), "IO224");
+ failed |= urj_bus_generic_attach_sig (part, &(nUB), "IO226");
+ nCS2 = NULL;
+ nRDY = NULL;
+
+ /*
+ * Setup FLASH
+ */
+ comp = COMP_FLASH;
+ comp->ctype = FLASH;
+ comp->cname = "FLASH";
+
+ failed |= urj_bus_generic_attach_sig (part, &(A[0]), "IO47");
+ failed |= urj_bus_generic_attach_sig (part, &(A[1]), "IO48");
+ failed |= urj_bus_generic_attach_sig (part, &(A[2]), "IO49");
+ failed |= urj_bus_generic_attach_sig (part, &(A[3]), "IO50");
+ failed |= urj_bus_generic_attach_sig (part, &(A[4]), "IO125");
+ failed |= urj_bus_generic_attach_sig (part, &(A[5]), "IO127");
+ failed |= urj_bus_generic_attach_sig (part, &(A[6]), "IO131");
+ failed |= urj_bus_generic_attach_sig (part, &(A[7]), "IO133");
+ failed |= urj_bus_generic_attach_sig (part, &(A[8]), "IO158");
+ failed |= urj_bus_generic_attach_sig (part, &(A[9]), "IO16");
+ failed |= urj_bus_generic_attach_sig (part, &(A[10]), "IO20");
+ failed |= urj_bus_generic_attach_sig (part, &(A[11]), "IO14");
+ failed |= urj_bus_generic_attach_sig (part, &(A[12]), "IO135");
+ failed |= urj_bus_generic_attach_sig (part, &(A[13]), "IO156");
+ failed |= urj_bus_generic_attach_sig (part, &(A[14]), "IO144");
+ failed |= urj_bus_generic_attach_sig (part, &(A[15]), "IO137");
+ failed |= urj_bus_generic_attach_sig (part, &(A[16]), "IO139");
+ failed |= urj_bus_generic_attach_sig (part, &(A[17]), "IO143");
+ failed |= urj_bus_generic_attach_sig (part, &(A[18]), "IO141");
+
+ failed |= urj_bus_generic_attach_sig (part, &(D[0]), "IO46");
+ failed |= urj_bus_generic_attach_sig (part, &(D[1]), "IO45");
+ failed |= urj_bus_generic_attach_sig (part, &(D[2]), "IO44");
+ failed |= urj_bus_generic_attach_sig (part, &(D[3]), "IO165");
+ failed |= urj_bus_generic_attach_sig (part, &(D[4]), "IO164");
+ failed |= urj_bus_generic_attach_sig (part, &(D[5]), "IO17");
+ failed |= urj_bus_generic_attach_sig (part, &(D[6]), "IO18");
+ failed |= urj_bus_generic_attach_sig (part, &(D[7]), "IO19");
+ D[8] = NULL;
+ D[9] = NULL;
+ D[10] = NULL;
+ D[11] = NULL;
+ D[12] = NULL;
+ D[13] = NULL;
+ D[14] = NULL;
+ D[15] = NULL;
+
+ failed |= urj_bus_generic_attach_sig (part, &(nWE), "IO15");
+ failed |= urj_bus_generic_attach_sig (part, &(nOE), "IO24");
+ failed |= urj_bus_generic_attach_sig (part, &(nCS), "IO37");
+ failed |= urj_bus_generic_attach_sig (part, &(nCS2), "IO23");
+
+ /* CLK1 is not observable :-(
+ failed |= urj_bus_generic_attach_sig( part, &(nRDY), "CLK1" );
+ */
+ nRDY = NULL;
+
+ nLB = NULL;
+ nUB = NULL;
+
+ /*
+ * Setup Serial Port
+ */
+ failed |= urj_bus_generic_attach_sig (part, &(SER_RXD), "CLK2");
+ failed |= urj_bus_generic_attach_sig (part, &(SER_NRTS), "IO177");
+ failed |= urj_bus_generic_attach_sig (part, &(SER_TXD), "IO178");
+ failed |= urj_bus_generic_attach_sig (part, &(SER_NCTS), "CLK0");
+
+ if (failed)
+ {
+ urj_bus_generic_free (bus);
+ return NULL;
+ }
+
+ return bus;
+}
+
+/**
+ * bus->driver->(*printinfo)
+ *
+ */
+static void
+jopcyc_bus_printinfo (urj_log_level_t ll, urj_bus_t *bus)
+{
+ int i;
+
+ for (i = 0; i < bus->chain->parts->len; i++)
+ if (bus->part == bus->chain->parts->parts[i])
+ break;
+ urj_log (ll, _("JOP.design Cyclone Board compatible bus driver via BSR (JTAG part No. %d)\n"),
+ i);
+}
+
+static void
+setup_address (urj_bus_t *bus, uint32_t a, component_t *comp)
+{
+ int i;
+ urj_part_t *p = bus->part;
+ int addr_width;
+
+ LAST_ADDR = a;
+
+ switch (comp->ctype)
+ {
+ case RAM:
+ addr_width = RAM_ADDR_WIDTH;
+ /* address a is a byte address so it is transferred into
+ a word address here */
+ a >>= 1;
+ break;
+ case FLASH:
+ addr_width = FLASH_ADDR_WIDTH;
+ break;
+ default:
+ addr_width = 0;
+ break;
+ }
+
+ for (i = 0; i < addr_width; i++)
+ urj_part_set_signal (p, A[i], 1, (a >> i) & 1);
+}
+
+static int
+detect_data_width (component_t *comp)
+{
+ int width;
+
+ switch (comp->ctype)
+ {
+ case RAM:
+ width = RAM_DATA_WIDTH;
+ break;
+ case FLASH:
+ width = FLASH_DATA_WIDTH;
+ break;
+ default:
+ width = 0;
+ break;
+ }
+
+ return width;
+}
+
+static void
+set_data_in (urj_bus_t *bus, component_t *comp)
+{
+ int i;
+ urj_part_t *p = bus->part;
+ int width;
+
+ width = detect_data_width (comp);
+
+ for (i = 0; i < width; i++)
+ urj_part_set_signal (p, D[i], 0, 0);
+}
+
+static void
+setup_data (urj_bus_t *bus, uint32_t d, component_t *comp)
+{
+ int i;
+ urj_part_t *p = bus->part;
+ int width;
+
+ width = detect_data_width (comp);
+
+ for (i = 0; i < width; i++)
+ urj_part_set_signal (p, D[i], 1, (d >> i) & 1);
+}
+
+/**
+ * bus->driver->(*init)
+ *
+ */
+static int
+jopcyc_bus_init (urj_bus_t *bus)
+{
+ urj_part_t *p = bus->part;
+ urj_chain_t *chain = bus->chain;
+ component_t *comp;
+
+ if (urj_tap_state (chain) != URJ_TAP_STATE_RUN_TEST_IDLE)
+ {
+ /* silently skip initialization if TAP isn't in RUNTEST/IDLE state
+ this is required to avoid interfering with detect when initbus
+ is contained in the part description file
+ URJ_BUS_INIT() will be called latest by URJ_BUS_PREPARE() */
+ return URJ_STATUS_OK;
+ }
+
+ /* Preload update registers
+ See AN039, "Guidelines for IEEE Std. 1149.1 Boundary Scan Testing */
+
+ urj_part_set_instruction (p, "SAMPLE/PRELOAD");
+ urj_tap_chain_shift_instructions (chain);
+
+ /* RAMA */
+ comp = COMP_RAMA;
+ set_data_in (bus, comp);
+ urj_part_set_signal (p, nCS, 1, 1);
+ urj_part_set_signal (p, nWE, 1, 1);
+ urj_part_set_signal (p, nOE, 1, 1);
+ urj_part_set_signal (p, nLB, 1, 1);
+ urj_part_set_signal (p, nUB, 1, 1);
+
+ /* RAMB */
+ comp = COMP_RAMB;
+ set_data_in (bus, comp);
+ urj_part_set_signal (p, nCS, 1, 1);
+ urj_part_set_signal (p, nWE, 1, 1);
+ urj_part_set_signal (p, nOE, 1, 1);
+ urj_part_set_signal (p, nLB, 1, 1);
+ urj_part_set_signal (p, nUB, 1, 1);
+
+ /* FLASH */
+ comp = COMP_FLASH;
+ set_data_in (bus, comp);
+ urj_part_set_signal (p, nCS, 1, 1);
+ urj_part_set_signal (p, nWE, 1, 1);
+ urj_part_set_signal (p, nOE, 1, 1);
+ urj_part_set_signal (p, nCS2, 1, 1);
+ urj_part_set_signal (p, nRDY, 0, 0);
+
+ /* Serial Port */
+ urj_part_set_signal (p, SER_RXD, 0, 0);
+ urj_part_set_signal (p, SER_NRTS, 1, 1);
+ urj_part_set_signal (p, SER_TXD, 1, 1);
+ urj_part_set_signal (p, SER_NCTS, 0, 0);
+
+ urj_tap_chain_shift_data_registers (chain, 0);
+
+ bus->initialized = 1;
+
+ return URJ_STATUS_OK;
+}
+
+static int
+comp_bus_area (urj_bus_t *bus, uint32_t adr, urj_bus_area_t *area,
+ component_t **comp)
+{
+ if (adr < RAMB_START)
+ {
+ area->description = "RAMA Component";
+ area->start = RAMA_START;
+ area->length = RAM_LENGTH;
+ area->width = RAM_DATA_WIDTH;
+ *comp = COMP_RAMA;
+ }
+ else if (adr < FLASH_START)
+ {
+ area->description = "RAMB Component";
+ area->start = RAMB_START;
+ area->length = RAM_LENGTH;
+ area->width = RAM_DATA_WIDTH;
+ *comp = COMP_RAMB;
+ }
+ else if (adr < FLASH_START + FLASH_LENGTH)
+ {
+ area->description = "FLASH Component";
+ area->start = FLASH_START;
+ area->length = FLASH_LENGTH;
+ area->width = FLASH_DATA_WIDTH;
+ *comp = COMP_FLASH;
+ }
+ else
+ {
+ area->description = "Dummy";
+ area->start = 2 * RAM_LENGTH + FLASH_LENGTH;
+ area->length = UINT64_C (0x100000000);
+ area->width = 0;
+ *comp = NULL;
+ }
+
+ return URJ_STATUS_OK;
+}
+
+/**
+ * bus->driver->(*area)
+ *
+ */
+static int
+jopcyc_bus_area (urj_bus_t *bus, uint32_t adr, urj_bus_area_t *area)
+{
+ component_t *comp;
+
+ return comp_bus_area (bus, adr, area, &comp);
+}
+
+/**
+ * bus->driver->(*read_start)
+ *
+ */
+static int
+jopcyc_bus_read_start (urj_bus_t *bus, uint32_t adr)
+{
+ urj_part_t *p = bus->part;
+ urj_chain_t *chain = bus->chain;
+ urj_bus_area_t area;
+ component_t *comp;
+
+ comp_bus_area (bus, adr, &area, &comp);
+ if (!comp)
+ {
+ urj_error_set (URJ_ERROR_OUT_OF_BOUNDS, _("Address out of range"));
+ LAST_ADDR = adr;
+ return URJ_STATUS_FAIL;
+ }
+
+ urj_part_set_signal (p, nCS, 1, 0);
+ urj_part_set_signal (p, nWE, 1, 1);
+ urj_part_set_signal (p, nOE, 1, 0);
+ if (comp->ctype == RAM)
+ {
+ urj_part_set_signal (p, nLB, 1, 0);
+ urj_part_set_signal (p, nUB, 1, 0);
+ }
+
+ setup_address (bus, adr, comp);
+ set_data_in (bus, comp);
+
+ urj_tap_chain_shift_data_registers (chain, 0);
+
+ return URJ_STATUS_OK;
+}
+
+/**
+ * bus->driver->(*read_next)
+ *
+ */
+static uint32_t
+jopcyc_bus_read_next (urj_bus_t *bus, uint32_t adr)
+{
+ urj_part_t *p = bus->part;
+ urj_chain_t *chain = bus->chain;
+ int i;
+ uint32_t d = 0;
+ urj_bus_area_t area;
+ component_t *comp;
+
+ comp_bus_area (bus, adr, &area, &comp);
+ if (!comp)
+ {
+ urj_error_set (URJ_ERROR_OUT_OF_BOUNDS, _("Address out of range"));
+ LAST_ADDR = adr;
+ return 0;
+ }
+
+ setup_address (bus, adr, comp);
+ urj_tap_chain_shift_data_registers (chain, 1);
+
+ for (i = 0; i < area.width; i++)
+ d |= (uint32_t) (urj_part_get_signal (p, D[i]) << i);
+
+ return d;
+}
+
+/**
+ * bus->driver->(*read_end)
+ *
+ */
+static uint32_t
+jopcyc_bus_read_end (urj_bus_t *bus)
+{
+ urj_part_t *p = bus->part;
+ urj_chain_t *chain = bus->chain;
+ int i;
+ uint32_t d = 0;
+ urj_bus_area_t area;
+ component_t *comp;
+
+ /* use last address of access to determine component */
+ comp_bus_area (bus, LAST_ADDR, &area, &comp);
+ if (!comp)
+ {
+ urj_error_set (URJ_ERROR_OUT_OF_BOUNDS, _("Address out of range"));
+ return 0;
+ }
+
+ urj_part_set_signal (p, nCS, 1, 1);
+ urj_part_set_signal (p, nOE, 1, 1);
+ if (comp->ctype == RAM)
+ {
+ urj_part_set_signal (p, nLB, 1, 1);
+ urj_part_set_signal (p, nUB, 1, 1);
+ }
+ urj_tap_chain_shift_data_registers (chain, 1);
+
+ for (i = 0; i < area.width; i++)
+ d |= (uint32_t) (urj_part_get_signal (p, D[i]) << i);
+
+ return d;
+}
+
+/**
+ * bus->driver->(*write)
+ *
+ */
+static void
+jopcyc_bus_write (urj_bus_t *bus, uint32_t adr, uint32_t data)
+{
+ urj_part_t *p = bus->part;
+ urj_chain_t *chain = bus->chain;
+ urj_bus_area_t area;
+ component_t *comp;
+
+ comp_bus_area (bus, adr, &area, &comp);
+ if (!comp)
+ {
+ urj_error_set (URJ_ERROR_OUT_OF_BOUNDS, _("Address out of range"));
+ return;
+ }
+
+ urj_part_set_signal (p, nCS, 1, 0);
+ urj_part_set_signal (p, nWE, 1, 1);
+ urj_part_set_signal (p, nOE, 1, 1);
+ if (comp->ctype == RAM)
+ {
+ urj_part_set_signal (p, nLB, 1, 0);
+ urj_part_set_signal (p, nUB, 1, 0);
+ }
+
+ setup_address (bus, adr, comp);
+ setup_data (bus, data, comp);
+
+ urj_tap_chain_shift_data_registers (chain, 0);
+
+ urj_part_set_signal (p, nWE, 1, 0);
+ urj_tap_chain_shift_data_registers (chain, 0);
+ urj_part_set_signal (p, nWE, 1, 1);
+ urj_part_set_signal (p, nCS, 1, 1);
+ if (comp->ctype == RAM)
+ {
+ urj_part_set_signal (p, nLB, 1, 1);
+ urj_part_set_signal (p, nUB, 1, 1);
+ }
+ urj_tap_chain_shift_data_registers (chain, 0);
+}
+
+const urj_bus_driver_t urj_bus_jopcyc_bus = {
+ "jopcyc",
+ N_("JOP.design Cyclone Board compatible bus driver via BSR"),
+ jopcyc_bus_new,
+ urj_bus_generic_free,
+ jopcyc_bus_printinfo,
+ urj_bus_generic_prepare_extest,
+ jopcyc_bus_area,
+ jopcyc_bus_read_start,
+ jopcyc_bus_read_next,
+ jopcyc_bus_read_end,
+ urj_bus_generic_read,
+ jopcyc_bus_write,
+ jopcyc_bus_init
+};
+
+
+/*
+ Local Variables:
+ mode:C
+ tab-width:2
+ indent-tabs-mode:t
+ End:
+*/
--- /dev/null
+/*
+ * $Id$
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marko Roessler <marko.roessler@indakom.de>, 2004
+ *
+ * based on sa1110.c
+ * Written by Marcel Telka <marcel@telka.sk>, 2002, 2003.
+ *
+ * Documentation:
+ *
+ * [1] Sharp Microelectronics, "LH7A400 Universal SOC Preliminary
+ * Users's Guide", May 2003, Reference No. SMA02010
+ *
+ *
+ * Notes:
+ * - this bus driver ONLY works for the asynchronous boot mode!
+ * - use only to access flash devices
+ */
+
+#include <sysdep.h>
+
+#include <stdlib.h>
+#include <stdint.h>
+#include <string.h>
+
+#include <urjtag/part.h>
+#include <urjtag/bus.h>
+#include <urjtag/chain.h>
+#include <urjtag/bssignal.h>
+
+#include "buses.h"
+#include "generic_bus.h"
+
+#define ADR_NUM 24
+#define D_NUM 32
+#define nCS_NUM 4
+#define WIDTH_NUM 2
+
+typedef struct
+{
+ urj_part_signal_t *a[ADR_NUM];
+ urj_part_signal_t *d[D_NUM];
+ urj_part_signal_t *ncs[nCS_NUM];
+ urj_part_signal_t *nwe;
+ urj_part_signal_t *noe;
+ urj_part_signal_t *width[WIDTH_NUM];
+} bus_params_t;
+
+#define A ((bus_params_t *) bus->params)->a
+#define D ((bus_params_t *) bus->params)->d
+#define nCS ((bus_params_t *) bus->params)->ncs
+#define nWE ((bus_params_t *) bus->params)->nwe
+#define nOE ((bus_params_t *) bus->params)->noe
+#define WIDTH ((bus_params_t *) bus->params)->width
+
+/**
+ * bus->driver->(*new_bus)
+ *
+ */
+static urj_bus_t *
+lh7a400_bus_new (urj_chain_t *chain, const const urj_bus_driver_t *driver,
+ const urj_param_t *cmd_params[])
+{
+ urj_bus_t *bus;
+ urj_part_t *part;
+ char buff[10];
+ int i;
+ int failed = 0;
+
+ bus = urj_bus_generic_new (chain, driver, sizeof (bus_params_t));
+ if (bus == NULL)
+ return NULL;
+ part = bus->part;
+
+ for (i = 0; i < ADR_NUM; i++)
+ {
+ sprintf (buff, "A%d", i);
+ failed |= urj_bus_generic_attach_sig (part, &(A[i]), buff);
+ }
+
+ for (i = 0; i < D_NUM; i++)
+ {
+ sprintf (buff, "D%d", i);
+ failed |= urj_bus_generic_attach_sig (part, &(D[i]), buff);
+ }
+
+ for (i = 0; i < nCS_NUM; i++)
+ {
+ sprintf (buff, "nCS%d", i);
+ failed |= urj_bus_generic_attach_sig (part, &(nCS[i]), buff);
+ }
+
+ for (i = 0; i < WIDTH_NUM; i++)
+ {
+ sprintf (buff, "WIDTH%d", i);
+ failed |= urj_bus_generic_attach_sig (part, &(WIDTH[i]), buff);
+ }
+
+ failed |= urj_bus_generic_attach_sig (part, &(nWE), "nWE0");
+
+ failed |= urj_bus_generic_attach_sig (part, &(nOE), "nOE");
+
+ if (failed)
+ {
+ urj_bus_generic_free (bus);
+ return NULL;
+ }
+
+ return bus;
+}
+
+/**
+ * bus->driver->(*printinfo)
+ *
+ */
+static void
+lh7a400_bus_printinfo (urj_log_level_t ll, urj_bus_t *bus)
+{
+ int i;
+
+ for (i = 0; i < bus->chain->parts->len; i++)
+ if (bus->part == bus->chain->parts->parts[i])
+ break;
+ urj_log (ll, _("Sharp LH7A400 compatible bus driver via BSR (JTAG part No. %d)\n"),
+ i);
+}
+
+/**
+ * bus->driver->(*area)
+ *
+ */
+static int
+lh7a400_bus_area (urj_bus_t *bus, uint32_t adr, urj_bus_area_t *area)
+{
+ unsigned int width;
+
+ area->description = NULL;
+ area->start = UINT32_C (0x00000000);
+ area->length = UINT64_C (0x10000000);
+ area->width = -1; // some gcc versions detect uninitialised use
+
+ /* we determine the size of the flash that was booted from [1] table 3.1 */
+ width =
+ urj_part_get_signal (bus->part,
+ urj_part_find_signal (bus->part, "WIDTH0"));
+ width |=
+ urj_part_get_signal (bus->part,
+ urj_part_find_signal (bus->part, "WIDTH1")) << 1;
+
+ if (width < 0)
+ return URJ_STATUS_FAIL;
+
+ switch (width)
+ {
+ case 0:
+ area->width = 8;
+ break;
+ case 1:
+ area->width = 16;
+ break;
+ case 2:
+ case 3:
+ area->width = 32;
+ }
+
+ return URJ_STATUS_OK;
+}
+
+static void
+setup_address (urj_bus_t *bus, uint32_t a)
+{
+ int i;
+ urj_part_t *p = bus->part;
+
+ for (i = 0; i < ADR_NUM; i++)
+ urj_part_set_signal (p, A[i], 1, (a >> i) & 1);
+}
+
+static void
+set_data_in (urj_bus_t *bus)
+{
+ int i;
+ urj_part_t *p = bus->part;
+ urj_bus_area_t area;
+
+ // @@@@ RFHH check result
+ lh7a400_bus_area (bus, 0, &area);
+
+ for (i = 0; i < area.width; i++)
+ urj_part_set_signal (p, D[i], 0, 0);
+
+}
+
+static void
+setup_data (urj_bus_t *bus, uint32_t d)
+{
+ int i;
+ urj_part_t *p = bus->part;
+ urj_bus_area_t area;
+
+ lh7a400_bus_area (bus, 0, &area);
+
+ for (i = 0; i < area.width; i++)
+ urj_part_set_signal (p, D[i], 1, (d >> i) & 1);
+}
+
+/**
+ * bus->driver->(*read_start)
+ *
+ */
+static int
+lh7a400_bus_read_start (urj_bus_t *bus, uint32_t adr)
+{
+ /* see Figure 3-3 in [1] */
+ urj_part_t *p = bus->part;
+ urj_chain_t *chain = bus->chain;
+
+ urj_part_set_signal (p, nCS[0], 1, (adr >> 27) != 0);
+ urj_part_set_signal (p, nWE, 1, 1);
+ urj_part_set_signal (p, nOE, 1, 0);
+
+ setup_address (bus, adr);
+ set_data_in (bus);
+
+ urj_tap_chain_shift_data_registers (chain, 0);
+
+ return URJ_STATUS_OK;
+}
+
+/**
+ * bus->driver->(*read_next)
+ *
+ */
+static uint32_t
+lh7a400_bus_read_next (urj_bus_t *bus, uint32_t adr)
+{
+ /* see Figure 3-3 in [1] */
+ urj_part_t *p = bus->part;
+ urj_chain_t *chain = bus->chain;
+ int i;
+ uint32_t d = 0;
+ urj_bus_area_t area;
+
+ lh7a400_bus_area (bus, adr, &area);
+
+ setup_address (bus, adr);
+ urj_tap_chain_shift_data_registers (chain, 1);
+
+ for (i = 0; i < area.width; i++)
+ d |= (uint32_t) (urj_part_get_signal (p, D[i]) << i);
+
+ return d;
+}
+
+/**
+ * bus->driver->(*read_end)
+ *
+ */
+static uint32_t
+lh7a400_bus_read_end (urj_bus_t *bus)
+{
+ /* see Figure 3-3 in [1] */
+ urj_part_t *p = bus->part;
+ urj_chain_t *chain = bus->chain;
+ int i;
+ uint32_t d = 0;
+ urj_bus_area_t area;
+
+ lh7a400_bus_area (bus, 0, &area);
+
+ urj_part_set_signal (p, nCS[0], 1, 1);
+ urj_part_set_signal (p, nOE, 1, 1);
+
+ urj_tap_chain_shift_data_registers (chain, 1);
+
+ for (i = 0; i < area.width; i++)
+ d |= (uint32_t) (urj_part_get_signal (p, D[i]) << i);
+
+ return d;
+}
+
+/**
+ * bus->driver->(*write)
+ *
+ */
+static void
+lh7a400_bus_write (urj_bus_t *bus, uint32_t adr, uint32_t data)
+{
+ /* see Figure 3-3 in [1] */
+ urj_part_t *p = bus->part;
+ urj_chain_t *chain = bus->chain;
+
+ urj_part_set_signal (p, nCS[0], 1, (adr >> 27) != 0);
+ urj_part_set_signal (p, nWE, 1, 1);
+ urj_part_set_signal (p, nOE, 1, 1);
+
+ setup_address (bus, adr);
+ setup_data (bus, data);
+
+ urj_tap_chain_shift_data_registers (chain, 0);
+
+ urj_part_set_signal (p, nWE, 1, 0);
+ urj_tap_chain_shift_data_registers (chain, 0);
+
+ urj_part_set_signal (p, nWE, 1, 1);
+ urj_part_set_signal (p, nCS[0], 1, 1);
+ urj_tap_chain_shift_data_registers (chain, 0);
+}
+
+const urj_bus_driver_t urj_bus_lh7a400_bus = {
+ "lh7a400",
+ N_("Sharp LH7A400 compatible bus driver via BSR (flash access only!)"),
+ lh7a400_bus_new,
+ urj_bus_generic_free,
+ lh7a400_bus_printinfo,
+ urj_bus_generic_prepare_extest,
+ lh7a400_bus_area,
+ lh7a400_bus_read_start,
+ lh7a400_bus_read_next,
+ lh7a400_bus_read_end,
+ urj_bus_generic_read,
+ lh7a400_bus_write,
+ urj_bus_generic_no_init
+};
--- /dev/null
+/*
+ * $Id$
+ *
+ * Freescale MPC5200 compatible bus driver via BSR
+ * Copyright (C) 2003 Marcel Telka
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Asier Llano <a.llano@usyscom.com>, 2004.
+ *
+ * Documentation:
+ * [1] Freescale, "Freescale MPC5200 Users Guide", Rev. 2, 08/2004
+ * Order Number: MPC5200UG
+ *
+ */
+
+#include <sysdep.h>
+
+#include <stdlib.h>
+#include <stdint.h>
+#include <string.h>
+
+#include <urjtag/chain.h>
+#include <urjtag/part.h>
+#include <urjtag/bus.h>
+#include <urjtag/bssignal.h>
+
+#include "buses.h"
+#include "generic_bus.h"
+
+#define LPC_NUM_CS 6
+#define LPC_NUM_AD 32
+#define LPC_ADDR_TO_CS(a) ((a) >> bp->lpc_num_ad)
+#define LPC_ADDR_SIZE (((long unsigned long) 1 << bp->lpc_num_ad) * LPC_NUM_CS)
+
+typedef struct
+{
+ uint32_t last_adr;
+ urj_part_signal_t *ad[LPC_NUM_AD];
+ urj_part_signal_t *ncs[LPC_NUM_CS];
+ urj_part_signal_t *nwe;
+ urj_part_signal_t *noe;
+ urj_part_signal_t *ata_iso;
+ urj_part_signal_t *nale;
+ int muxed;
+ int lpc_num_ad;
+ int lpc_num_d;
+} bus_params_t;
+
+#define LAST_ADR ((bus_params_t *) bus->params)->last_adr
+#define AD ((bus_params_t *) bus->params)->ad
+#define nCS ((bus_params_t *) bus->params)->ncs
+#define nWE ((bus_params_t *) bus->params)->nwe
+#define nOE ((bus_params_t *) bus->params)->noe
+#define nALE ((bus_params_t *) bus->params)->nale
+#define ATA_ISO ((bus_params_t *) bus->params)->ata_iso
+
+/**
+ * bus->driver->(*new_bus)
+ *
+ */
+static urj_bus_t *
+mpc5200_bus_new (urj_chain_t *chain, const urj_bus_driver_t *driver,
+ const urj_param_t *cmd_params[])
+{
+ urj_bus_t *bus;
+ bus_params_t *bp;
+ urj_part_t *part;
+ char buff[10];
+ int i;
+ int failed = 0;
+
+ bus = urj_bus_generic_new (chain, driver, sizeof (bus_params_t));
+ if (bus == NULL)
+ return NULL;
+ part = bus->part;
+ bp = bus->params;
+
+ bp->lpc_num_ad = 24;
+ bp->lpc_num_d = 8;
+
+ for (i = 0; cmd_params[i] != NULL; i++)
+ {
+ switch (cmd_params[i]->key)
+ {
+ case URJ_BUS_PARAM_KEY_MUX:
+ bp->lpc_num_ad = 25;
+ bp->lpc_num_d = 16;
+ bp->muxed = 1;
+ break;
+ default:
+ urj_bus_generic_free (bus);
+ urj_error_set (URJ_ERROR_SYNTAX, "unrecognised bus parameter '%s'",
+ urj_param_string(&urj_bus_param_list, cmd_params[i]));
+ return NULL;
+ }
+ }
+ urj_log (URJ_LOG_LEVEL_NORMAL,
+ "%sMUXed %db address, %db data bus\n", (bp->muxed ? "" : "Non-"),
+ bp->lpc_num_ad, bp->lpc_num_d);
+
+ /* Get the signals */
+ for (i = 0; i < LPC_NUM_AD; i++)
+ {
+ sprintf (buff, "EXT_AD_%d", i);
+ failed |= urj_bus_generic_attach_sig (part, &(AD[i]), buff);
+ }
+
+ for (i = 0; i < LPC_NUM_CS; i++)
+ {
+ sprintf (buff, "LP_CS%d_B", i);
+ failed |= urj_bus_generic_attach_sig (part, &(nCS[i]), buff);
+ }
+
+ failed |= urj_bus_generic_attach_sig (part, &(nWE), "LP_RW");
+
+ failed |= urj_bus_generic_attach_sig (part, &(nOE), "LP_OE");
+
+ failed |= urj_bus_generic_attach_sig (part, &(nALE), "LP_ALE_B");
+
+ failed |= urj_bus_generic_attach_sig (part, &(ATA_ISO), "ATA_ISOLATION");
+
+ if (failed)
+ {
+ urj_bus_generic_free (bus);
+ return NULL;
+ }
+
+ return bus;
+}
+
+/**
+ * bus->driver->(*printinfo)
+ *
+ */
+static void
+mpc5200_bus_printinfo (urj_log_level_t ll, urj_bus_t *bus)
+{
+ int i;
+
+ for (i = 0; i < bus->chain->parts->len; i++)
+ if (bus->part == bus->chain->parts->parts[i])
+ break;
+ urj_log (ll, _("Freescale MPC5200 compatible bus driver via BSR (JTAG part No. %d)\n"),
+ i);
+}
+
+/**
+ * bus->driver->(*area)
+ *
+ */
+static int
+mpc5200_bus_area (urj_bus_t *bus, uint32_t adr, urj_bus_area_t *area)
+{
+ bus_params_t *bp = (bus_params_t *) bus->params;
+
+ if (adr < LPC_ADDR_SIZE)
+ {
+ area->description = N_("LocalPlus Bus");
+ area->start = UINT32_C (0x00000000);
+ area->length = LPC_ADDR_SIZE;
+ area->width = bp->lpc_num_d;
+ return URJ_STATUS_OK;
+ }
+
+ area->description = NULL;
+ area->start = LPC_ADDR_SIZE;
+ area->length = UINT64_C (0x100000000) - LPC_ADDR_SIZE;
+ area->width = 0;
+ return URJ_STATUS_OK;
+}
+
+static void
+setup_address (urj_bus_t *bus, uint32_t a)
+{
+ bus_params_t *bp = (bus_params_t *) bus->params;
+ urj_part_t *p = bus->part;
+ int i;
+
+ for (i = 0; i < bp->lpc_num_ad; i++)
+ urj_part_set_signal (p, AD[i], 1, (a >> i) & 1);
+}
+
+static void
+set_data_in (urj_bus_t *bus, uint32_t adr)
+{
+ bus_params_t *bp = (bus_params_t *) bus->params;
+ urj_part_t *p = bus->part;
+ urj_bus_area_t area;
+ int i;
+
+ mpc5200_bus_area (bus, adr, &area);
+ if (area.width > bp->lpc_num_d)
+ return;
+
+ for (i = 0; i < area.width; i++)
+ urj_part_set_signal (p, AD[i + (LPC_NUM_AD - bp->lpc_num_d)], 0, 0);
+}
+
+static void
+setup_data (urj_bus_t *bus, uint32_t adr, uint32_t d)
+{
+ bus_params_t *bp = (bus_params_t *) bus->params;
+ urj_part_t *p = bus->part;
+ urj_bus_area_t area;
+ int i;
+
+ mpc5200_bus_area (bus, adr, &area);
+ if (area.width > bp->lpc_num_d)
+ return;
+
+ for (i = 0; i < area.width; i++)
+ urj_part_set_signal (p, AD[i + (LPC_NUM_AD - bp->lpc_num_d)], 1,
+ (d >> i) & 1);
+}
+
+static uint32_t
+get_data (urj_bus_t *bus, uint32_t adr)
+{
+ bus_params_t *bp = (bus_params_t *) bus->params;
+ urj_bus_area_t area;
+ uint32_t d = 0;
+ urj_part_t *p = bus->part;
+ int i;
+
+ mpc5200_bus_area (bus, adr, &area);
+ if (area.width > bp->lpc_num_d)
+ return 0;
+
+ for (i = 0; i < area.width; i++)
+ {
+ d |= (uint32_t) (urj_part_get_signal
+ (p, AD[i + (LPC_NUM_AD - bp->lpc_num_d)]) << i);
+ }
+ return d;
+}
+
+/**
+ * bus->driver->(*read_start)
+ *
+ */
+static int
+mpc5200_bus_read_start (urj_bus_t *bus, uint32_t adr)
+{
+ bus_params_t *bp = (bus_params_t *) bus->params;
+ urj_part_t *p = bus->part;
+ uint8_t cs = LPC_ADDR_TO_CS (adr);
+ int i;
+
+ LAST_ADR = adr;
+
+ /* see Figure 6-45 in [1] */
+
+ for (i = 0; i < LPC_NUM_CS; i++)
+ {
+ urj_part_set_signal (p, nCS[i], 1, !(cs == i));
+ }
+
+ urj_part_set_signal (p, ATA_ISO, 1, 1);
+ urj_part_set_signal (p, nWE, 1, 1);
+ urj_part_set_signal (p, nOE, 1, 0);
+
+ setup_address (bus, adr);
+
+ if (!bp->muxed)
+ set_data_in (bus, adr);
+ else
+ {
+ urj_part_set_signal (p, nALE, 1, 0);
+ urj_tap_chain_shift_data_registers (bus->chain, 0);
+ urj_part_set_signal (p, nALE, 1, 1);
+ }
+ urj_tap_chain_shift_data_registers (bus->chain, 0);
+
+ return URJ_STATUS_OK;
+}
+
+/**
+ * bus->driver->(*read_next)
+ *
+ */
+static uint32_t
+mpc5200_bus_read_next (urj_bus_t *bus, uint32_t adr)
+{
+ bus_params_t *bp = (bus_params_t *) bus->params;
+ urj_part_t *p = bus->part;
+ uint32_t d;
+
+ if (!bp->muxed)
+ {
+ setup_address (bus, adr);
+ urj_tap_chain_shift_data_registers (bus->chain, 1);
+ d = get_data (bus, LAST_ADR);
+ }
+ else
+ {
+ set_data_in (bus, adr);
+ urj_tap_chain_shift_data_registers (bus->chain, 0);
+
+ urj_tap_chain_shift_data_registers (bus->chain, 1);
+ d = get_data (bus, LAST_ADR);
+
+ setup_address (bus, adr);
+ LAST_ADR = adr;
+
+ urj_part_set_signal (p, nALE, 1, 0);
+ urj_tap_chain_shift_data_registers (bus->chain, 0);
+ urj_part_set_signal (p, nALE, 1, 1);
+ urj_tap_chain_shift_data_registers (bus->chain, 0);
+ }
+
+ LAST_ADR = adr;
+ return d;
+}
+
+/**
+ * bus->driver->(*read_end)
+ *
+ */
+static uint32_t
+mpc5200_bus_read_end (urj_bus_t *bus)
+{
+ bus_params_t *bp = (bus_params_t *) bus->params;
+ urj_part_t *p = bus->part;
+ int i;
+
+ if (bp->muxed)
+ {
+ set_data_in (bus, LAST_ADR);
+ urj_tap_chain_shift_data_registers (bus->chain, 0);
+ }
+ for (i = 0; i < LPC_NUM_CS; i++)
+ {
+ urj_part_set_signal (p, nCS[i], 1, 1);
+ }
+ urj_part_set_signal (p, nOE, 1, 1);
+
+ urj_tap_chain_shift_data_registers (bus->chain, 1);
+
+ return get_data (bus, LAST_ADR);
+}
+
+/**
+ * bus->driver->(*write)
+ *
+ */
+static void
+mpc5200_bus_write (urj_bus_t *bus, uint32_t adr, uint32_t data)
+{
+ bus_params_t *bp = (bus_params_t *) bus->params;
+ /* see Figure 6-47 in [1] */
+ urj_part_t *p = bus->part;
+ urj_chain_t *chain = bus->chain;
+ uint8_t cs = LPC_ADDR_TO_CS (adr);
+ int i;
+
+ if (bp->muxed)
+ {
+ setup_address (bus, adr);
+ urj_part_set_signal (p, nALE, 1, 0);
+ urj_tap_chain_shift_data_registers (chain, 0);
+ urj_part_set_signal (p, nALE, 1, 1);
+ urj_tap_chain_shift_data_registers (chain, 0);
+ }
+
+ for (i = 0; i < LPC_NUM_CS; i++)
+ {
+ urj_part_set_signal (p, nCS[i], 1, !(cs == i));
+ }
+ urj_part_set_signal (p, ATA_ISO, 1, 1);
+ urj_part_set_signal (p, nWE, 1, 1);
+ urj_part_set_signal (p, nOE, 1, 1);
+
+ if (!bp->muxed)
+ setup_address (bus, adr);
+ setup_data (bus, adr, data);
+
+ urj_tap_chain_shift_data_registers (chain, 0);
+
+ urj_part_set_signal (p, nWE, 1, 0);
+ urj_tap_chain_shift_data_registers (chain, 0);
+ urj_part_set_signal (p, nWE, 1, 1);
+ urj_tap_chain_shift_data_registers (chain, 0);
+}
+
+const urj_bus_driver_t urj_bus_mpc5200_bus = {
+ "mpc5200",
+ N_("Freescale MPC5200 compatible bus driver via BSR, parameter: [mux]"),
+ mpc5200_bus_new,
+ urj_bus_generic_free,
+ mpc5200_bus_printinfo,
+ urj_bus_generic_prepare_extest,
+ mpc5200_bus_area,
+ mpc5200_bus_read_start,
+ mpc5200_bus_read_next,
+ mpc5200_bus_read_end,
+ urj_bus_generic_read,
+ mpc5200_bus_write,
+ urj_bus_generic_no_init
+};
--- /dev/null
+/*
+ * $Id$
+ *
+ * Motorola MPC824x compatible bus driver via BSR
+ * Copyright (C) 2003 Marcel Telka
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2003.
+ *
+ * Documentation:
+ * [1] Motorola, Inc., "MPC8245 Integrated Processor User's Manual",
+ * MPC8245UM/D, 10/2001, Rev. 1
+ *
+ */
+
+#include <sysdep.h>
+
+#include <stdlib.h>
+#include <stdint.h>
+#include <string.h>
+
+#include <urjtag/part.h>
+#include <urjtag/chain.h>
+#include <urjtag/bus.h>
+#include <urjtag/bssignal.h>
+
+#include "buses.h"
+#include "generic_bus.h"
+
+typedef struct
+{
+ int boot_nfoe;
+ int boot_sdma1;
+ uint32_t last_adr;
+ urj_part_signal_t *ar[23];
+ urj_part_signal_t *nrcs0;
+ urj_part_signal_t *nwe;
+ urj_part_signal_t *nfoe;
+ urj_part_signal_t *d[32];
+} bus_params_t;
+
+#define boot_nFOE ((bus_params_t *) bus->params)->boot_nfoe
+#define boot_SDMA1 ((bus_params_t *) bus->params)->boot_sdma1
+#define LAST_ADR ((bus_params_t *) bus->params)->last_adr
+#define AR ((bus_params_t *) bus->params)->ar
+#define nRCS0 ((bus_params_t *) bus->params)->nrcs0
+#define nWE ((bus_params_t *) bus->params)->nwe
+#define nFOE ((bus_params_t *) bus->params)->nfoe
+#define D ((bus_params_t *) bus->params)->d
+
+static int BUS_WIDTH = 8;
+static char REVBITS = 0;
+static char dbgAddr = 0;
+static char dbgData = 0;
+
+
+/**
+ * bus->driver->(*new_bus)
+ *
+ */
+static urj_bus_t *
+mpc824x_bus_new (urj_chain_t *chain, const urj_bus_driver_t *driver,
+ const urj_param_t *cmd_params[])
+{
+ urj_bus_t *bus;
+ urj_part_t *part;
+ char buff[10];
+ int i;
+ int failed = 0;
+ urj_part_signal_t *s_nfoe;
+ urj_part_signal_t *s_sdma1;
+
+ char dfltWidth = 1;
+
+ dbgAddr = 0;
+ dbgData = 0;
+ REVBITS = 0;
+
+ for (i = 0; cmd_params[i] != NULL; i++)
+ {
+ switch (cmd_params[i]->key)
+ {
+ case URJ_BUS_PARAM_KEY_WIDTH:
+ switch (cmd_params[i]->value.lu)
+ {
+ case 8:
+ BUS_WIDTH = 8;
+ dfltWidth = 0;
+ break;
+ case 16:
+ BUS_WIDTH = 16;
+ dfltWidth = 0;
+ break;
+ case 32:
+ BUS_WIDTH = 32;
+ dfltWidth = 0;
+ break;
+ case 64:
+ // BUS_WIDTH = 64; // Needs to fix, look at setup_data()
+ BUS_WIDTH = 32;
+ urj_error_set (URJ_ERROR_UNSUPPORTED,
+ _(" Bus width 64 exists in mpc824x, but not supported by UrJTAG currently"));
+ dfltWidth = 1;
+ break;
+ default:
+ urj_error_set (URJ_ERROR_UNSUPPORTED,
+ _(" Only 8, 16, 32 and 64 bus width are supported for Banks 0 and 1"));
+ return NULL;
+ }
+ break;
+
+ case URJ_BUS_PARAM_KEY_REVBITS:
+ REVBITS = 1;
+ break;
+
+ // @@@@ RFHH ToDo: lift this from init_bus
+ case URJ_BUS_PARAM_KEY_HELP:
+ urj_log (URJ_LOG_LEVEL_NORMAL,
+ _("Usage: initbus mpc824x [width=WIDTH] [revbits] [dbgAddr] [dbgData]\n\n"
+ " WIDTH data bus width - 8, 16, 32, 64 (default 8)\n"
+ " revbits reverse bits in data bus (default - no)\n"
+ " dbgAddr display address bus state (default - no)\n"
+ " dbgData display data bus state (default - no)\n"));
+ return NULL;
+
+ // @@@@ RFHH ToDo: lift this from init_bus
+ case URJ_BUS_PARAM_KEY_DBGaDDR:
+ dbgAddr = 1;
+ break;
+
+ // @@@@ RFHH ToDo: lift this from init_bus
+ case URJ_BUS_PARAM_KEY_DBGdATA:
+ dbgData = 1;
+ break;
+
+ default:
+ urj_error_set (URJ_ERROR_SYNTAX, "unrecognised bus parameter '%s'",
+ urj_param_string(&urj_bus_param_list, cmd_params[i]));
+ return NULL;
+ }
+
+ }
+ if (dfltWidth)
+ urj_log (URJ_LOG_LEVEL_NORMAL,
+ _(" Using default bus width %d\n"), BUS_WIDTH);
+
+ // REVBITS = 0;
+
+ bus = urj_bus_generic_new (chain, driver, sizeof (bus_params_t));
+ if (bus == NULL)
+ return NULL;
+ part = bus->part;
+
+ s_nfoe = urj_part_find_signal (part, "nFOE");
+ s_sdma1 = urj_part_find_signal (part, "SDMA1");
+ urj_part_set_signal (part, s_nfoe, 0, 0);
+ urj_part_set_signal (part, s_sdma1, 0, 0);
+
+ urj_part_set_instruction (part, "SAMPLE/PRELOAD");
+ urj_tap_chain_shift_instructions (chain);
+ urj_tap_chain_shift_data_registers (chain, 0);
+ urj_part_set_instruction (part, "EXTEST");
+ urj_tap_chain_shift_instructions (chain);
+ urj_tap_chain_shift_data_registers (chain, 1);
+
+ boot_nFOE = urj_part_get_signal (part, s_nfoe);
+ boot_SDMA1 = urj_part_get_signal (part, s_sdma1);
+
+
+ for (i = 0; i <= 10; i++)
+ {
+ sprintf (buff, "SDMA%d", i);
+ failed |= urj_bus_generic_attach_sig (part, &(AR[i]), buff);
+ }
+
+ failed |= urj_bus_generic_attach_sig (part, &(AR[11]), "SDBA0");
+
+ for (i = 0; i < 8; i++)
+ {
+ sprintf (buff, "PAR%d", i);
+ failed |= urj_bus_generic_attach_sig (part, &(AR[19 - i]), buff);
+ }
+
+ failed |= urj_bus_generic_attach_sig (part, &(AR[20]), "SDBA1");
+
+ failed |= urj_bus_generic_attach_sig (part, &(AR[21]), "SDMA11");
+
+ failed |= urj_bus_generic_attach_sig (part, &(AR[22]), "SDMA12");
+
+ failed |= urj_bus_generic_attach_sig (part, &(nRCS0), "nRCS0");
+
+ failed |= urj_bus_generic_attach_sig (part, &(nWE), "nWE");
+
+ failed |= urj_bus_generic_attach_sig (part, &(nFOE), "nFOE");
+
+ /*
+ Freescale MPC824x uses inversed bit order ([1], p. 2-18):
+ msb is MDH[0] while lsb is MDH[31]
+ Flash chips usually use another bit orded:
+ msb is D[31] and lsb is D[0]
+
+ This should be rewired in the PCB (MDH[0] - D[31], ..., MDH[31] - D[0]).
+ Otherwise you will have to use "revbits" UrJTAG parameter and
+ binary files with reversed bit order.
+ */
+
+ for (i = 0; i < 32; i++)
+ { /* Needs to be fixed for 64-bit bus width */
+ sprintf (buff, "MDH%d", 31 - i);
+ failed |= urj_bus_generic_attach_sig (part, &(D[i]), buff);
+ }
+
+ if (failed)
+ {
+ urj_bus_generic_free (bus);
+ return NULL;
+ }
+
+ return bus;
+}
+
+/**
+ * bus->driver->(*printinfo)
+ *
+ */
+static void
+mpc824x_bus_printinfo (urj_log_level_t ll, urj_bus_t *bus)
+{
+ int i;
+
+ for (i = 0; i < bus->chain->parts->len; i++)
+ if (bus->part == bus->chain->parts->parts[i])
+ break;
+ urj_log (ll, _("Motorola MPC824x compatible bus driver via BSR (JTAG part No. %d)\n"),
+ i);
+}
+
+/**
+ * bus->driver->(*area)
+ *
+ */
+static int
+mpc824x_bus_area (urj_bus_t *bus, uint32_t adr, urj_bus_area_t *area)
+{
+
+ if (adr < UINT32_C (0xFF000000))
+ {
+ area->description = NULL;
+ area->start = UINT32_C (0x00000000);
+ area->length = UINT64_C (0xFF000000);
+ area->width = 0;
+
+ return URJ_STATUS_OK;
+ }
+
+ if (adr < UINT32_C (0xFF800000))
+ {
+ area->description = N_("Base ROM Interface (Bank 1)");
+ area->start = UINT32_C (0xFF000000);
+ area->length = UINT64_C (0x00800000);
+ area->width = 0;
+
+ return URJ_STATUS_OK;
+ }
+
+ if (boot_SDMA1 == 0)
+ {
+ area->description = N_("Base ROM Interface (Bank 0)");
+ area->start = UINT32_C (0xFF800000);
+ area->length = UINT64_C (0x00800000);
+ area->width = BUS_WIDTH;
+
+ return URJ_STATUS_OK;
+ }
+
+ /* extended addresing mode is disabled (SDMA1 is 1) */
+ if (adr < UINT32_C (0xFFC00000))
+ {
+ area->description = NULL;
+ area->start = UINT32_C (0xFF800000);
+ area->length = UINT64_C (0x00400000);
+ area->width = BUS_WIDTH;
+
+ return URJ_STATUS_OK;
+ }
+
+ area->description = N_("Base ROM Interface (Bank 0)");
+ area->start = UINT32_C (0xFFC00000);
+ area->length = UINT64_C (0x00400000);
+ area->width = BUS_WIDTH;
+
+ return URJ_STATUS_OK;
+}
+
+static void
+setup_address (urj_bus_t *bus, uint32_t a)
+{
+ int i;
+ urj_part_t *p = bus->part;
+
+ switch (BUS_WIDTH)
+ {
+ case 8: /* 8-bit data bus */
+ for (i = 0; i < 23; i++)
+ urj_part_set_signal (p, AR[i], 1, (a >> i) & 1);
+ break;
+ case 16: /* 16-bit data bus */
+ for (i = 0; i < 22; i++)
+ urj_part_set_signal (p, AR[i], 1, (a >> (i + 1)) & 1);
+ break;
+ case 32: /* 32-bit data bus */
+ for (i = 0; i < 21; i++)
+ urj_part_set_signal (p, AR[i], 1, (a >> (i + 2)) & 1);
+ break;
+ case 64:
+ for (i = 0; i < 20; i++)
+ urj_part_set_signal (p, AR[i], 1, (a >> (i + 3)) & 1);
+ break;
+ default:
+ urj_error_set (URJ_ERROR_UNSUPPORTED,
+ _("Warning: unhandled bus width: %i"), BUS_WIDTH);
+ return;
+ }
+
+ /* Just for debugging */
+ if (dbgAddr)
+ {
+ int j, k;
+ switch (BUS_WIDTH)
+ {
+ case 8:
+ k = 23;
+ break;
+ case 16:
+ k = 22;
+ break;
+ case 32:
+ k = 21;
+ break;
+ case 64:
+ k = 20;
+ break;
+ default:
+ return;
+ }
+
+ urj_log (URJ_LOG_LEVEL_DEBUG, _("Addr [%2d:0]: %06lX "), k, (long unsigned) a);
+ for (i = 0; i < 3; i++)
+ {
+ for (j = 0; j < 8; j++)
+ if ((i * 8 + j) >= (23 - k))
+ urj_log (URJ_LOG_LEVEL_DEBUG, "%1lu",
+ (long unsigned) ((a >> (23 - (i * 8 + j))) & 1));
+ else
+ urj_log (URJ_LOG_LEVEL_DEBUG, " ");
+ urj_log (URJ_LOG_LEVEL_DEBUG, " ");
+ }
+ urj_log (URJ_LOG_LEVEL_DEBUG, "\n");
+ }
+
+}
+
+static void
+set_data_in (urj_bus_t *bus, uint32_t adr)
+{
+ int i;
+ urj_part_t *p = bus->part;
+ urj_bus_area_t area;
+
+ mpc824x_bus_area (bus, adr, &area);
+ if (area.width > 64)
+ return;
+
+ for (i = 0; i < area.width; i++)
+ urj_part_set_signal (p, D[i], 0, 0);
+}
+
+static void
+setup_data (urj_bus_t *bus, uint32_t adr, uint32_t d)
+{
+ int i;
+ urj_part_t *p = bus->part;
+ urj_bus_area_t area;
+
+ mpc824x_bus_area (bus, adr, &area);
+ if (area.width > 64)
+ return;
+
+ for (i = 0; i < area.width; i++)
+ urj_part_set_signal (p, D[i], 1,
+ (d >> ((REVBITS == 1) ? BUS_WIDTH - 1 - i : i)) &
+ 1);
+
+ /* Just for debugging */
+ if (dbgData)
+ {
+ urj_log (URJ_LOG_LEVEL_DEBUG, _("Data WR [%d:0]: %08lX "), area.width - 1,
+ (long unsigned) d);
+ int j;
+ int bytes = 0;
+ if (BUS_WIDTH == 8)
+ bytes = 1;
+ else if (BUS_WIDTH == 16)
+ bytes = 2;
+ else if (BUS_WIDTH == 32)
+ bytes = 4;
+ else if (BUS_WIDTH == 64)
+ bytes = 4; /* Needs to be fixed - d is 32-bit long, so no 64 bit mode is possible */
+
+ for (i = 0; i < bytes; i++)
+ {
+ for (j = 0; j < 8; j++)
+ if (REVBITS)
+ urj_log (URJ_LOG_LEVEL_DEBUG, "%1lu", (long unsigned)
+ (d >> (BUS_WIDTH - 1 - (i * 8 + j))) & 1);
+ else
+ urj_log (URJ_LOG_LEVEL_DEBUG, "%1lu", (long unsigned)
+ (d >> ((i * 8 + j))) & 1);
+ urj_log (URJ_LOG_LEVEL_DEBUG, " ");
+ }
+ urj_log (URJ_LOG_LEVEL_DEBUG, "\n");
+ }
+
+}
+
+static uint32_t
+get_data (urj_bus_t *bus, uint32_t adr)
+{
+ urj_bus_area_t area;
+ int i;
+ uint32_t d = 0;
+ urj_part_t *p = bus->part;
+
+ mpc824x_bus_area (bus, adr, &area);
+ if (area.width > 64)
+ return 0;
+
+ for (i = 0; i < area.width; i++)
+ d |= (uint32_t) (urj_part_get_signal (p, D[i]) <<
+ ((REVBITS == 1) ? BUS_WIDTH - 1 - i : i));
+
+ /* Just for debugging */
+ if (dbgData)
+ {
+ urj_log (URJ_LOG_LEVEL_DEBUG, _("Data RD [%d:0]: %08lX "), area.width - 1,
+ (long unsigned) d);
+ int j;
+ int bytes = 0;
+ if (BUS_WIDTH == 8)
+ bytes = 1;
+ else if (BUS_WIDTH == 16)
+ bytes = 2;
+ else if (BUS_WIDTH == 32)
+ bytes = 4;
+ else if (BUS_WIDTH == 64)
+ bytes = 4; /* Needs to be fixed - d is 32-bit long, so no 64 bit mode is possible */
+
+ for (i = 0; i < bytes; i++)
+ {
+ for (j = 0; j < 8; j++)
+ if (REVBITS)
+ urj_log (URJ_LOG_LEVEL_DEBUG, "%1lu", (long unsigned)
+ (d >> (BUS_WIDTH - 1 - (i * 8 + j))) & 1);
+ else
+ urj_log (URJ_LOG_LEVEL_DEBUG, "%1lu", (long unsigned) (d >> ((i * 8 + j))) & 1);
+ urj_log (URJ_LOG_LEVEL_DEBUG, " ");
+ }
+ urj_log (URJ_LOG_LEVEL_DEBUG, "\n");
+ }
+
+ return d;
+}
+
+/**
+ * bus->driver->(*read_start)
+ *
+ */
+static int
+mpc824x_bus_read_start (urj_bus_t *bus, uint32_t adr)
+{
+ urj_part_t *p = bus->part;
+
+ LAST_ADR = adr;
+
+ /* see Figure 6-45 in [1] */
+ urj_part_set_signal (p, nRCS0, 1, 0);
+ urj_part_set_signal (p, nWE, 1, 1);
+ urj_part_set_signal (p, nFOE, 1, 0);
+
+ setup_address (bus, adr);
+ set_data_in (bus, adr);
+
+ urj_tap_chain_shift_data_registers (bus->chain, 0);
+
+ return URJ_STATUS_OK;
+}
+
+/**
+ * bus->driver->(*read_next)
+ *
+ */
+static uint32_t
+mpc824x_bus_read_next (urj_bus_t *bus, uint32_t adr)
+{
+ uint32_t d;
+
+ setup_address (bus, adr);
+ urj_tap_chain_shift_data_registers (bus->chain, 1);
+
+ d = get_data (bus, LAST_ADR);
+ LAST_ADR = adr;
+ return d;
+}
+
+/**
+ * bus->driver->(*read_end)
+ *
+ */
+static uint32_t
+mpc824x_bus_read_end (urj_bus_t *bus)
+{
+ urj_part_t *p = bus->part;
+
+ urj_part_set_signal (p, nRCS0, 1, 1);
+ urj_part_set_signal (p, nFOE, 1, 1);
+
+ urj_tap_chain_shift_data_registers (bus->chain, 1);
+
+ return get_data (bus, LAST_ADR);
+}
+
+/**
+ * bus->driver->(*write)
+ *
+ */
+static void
+mpc824x_bus_write (urj_bus_t *bus, uint32_t adr, uint32_t data)
+{
+ urj_part_t *p = bus->part;
+
+ LAST_ADR = adr;
+
+
+ /* see Figure 6-47 in [1] */
+ urj_part_set_signal (p, nRCS0, 1, 0);
+ urj_part_set_signal (p, nWE, 1, 1);
+ urj_part_set_signal (p, nFOE, 1, 1);
+
+ setup_address (bus, adr);
+
+ setup_data (bus, adr, data);
+
+ urj_tap_chain_shift_data_registers (bus->chain, 0);
+
+ urj_part_set_signal (p, nWE, 1, 0);
+ urj_tap_chain_shift_data_registers (bus->chain, 0);
+ urj_part_set_signal (p, nWE, 1, 1);
+ urj_part_set_signal (p, nRCS0, 1, 1);
+ urj_tap_chain_shift_data_registers (bus->chain, 0);
+
+
+
+}
+
+const urj_bus_driver_t urj_bus_mpc824x_bus = {
+ "mpc824x",
+ N_("Motorola MPC824x compatible bus driver via BSR"),
+ mpc824x_bus_new,
+ urj_bus_generic_free,
+ mpc824x_bus_printinfo,
+ urj_bus_generic_prepare_extest,
+ mpc824x_bus_area,
+ mpc824x_bus_read_start,
+ mpc824x_bus_read_next,
+ mpc824x_bus_read_end,
+ urj_bus_generic_read,
+ mpc824x_bus_write,
+ urj_bus_generic_no_init
+};
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2002, 2003 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2002, 2003.
+ * Modified by Wojtek Kaniewski <wojtekka@toxygen.net>, 2004.
+ */
+
+#include <sysdep.h>
+
+#include <stdlib.h>
+#include <stdint.h>
+#include <string.h>
+
+#include <urjtag/part.h>
+#include <urjtag/bus.h>
+#include <urjtag/chain.h>
+#include <urjtag/bssignal.h>
+
+#include "buses.h"
+#include "generic_bus.h"
+
+typedef struct
+{
+ urj_part_signal_t *a[32];
+ urj_part_signal_t *d[16];
+ urj_part_signal_t *ncs;
+ urj_part_signal_t *nwe;
+ urj_part_signal_t *noe;
+} bus_params_t;
+
+#define A ((bus_params_t *) bus->params)->a
+#define D ((bus_params_t *) bus->params)->d
+#define nCS ((bus_params_t *) bus->params)->ncs
+#define nWE ((bus_params_t *) bus->params)->nwe
+#define nOE ((bus_params_t *) bus->params)->noe
+
+
+/**
+ * bus->driver->(*new_bus)
+ *
+ */
+static urj_bus_t *
+ppc405ep_bus_new (urj_chain_t *chain, const urj_bus_driver_t *driver,
+ const urj_param_t *cmd_params[])
+{
+ urj_bus_t *bus;
+ urj_part_t *part;
+ char buff[10];
+ int i;
+ int failed = 0;
+
+ bus = urj_bus_generic_new (chain, driver, sizeof (bus_params_t));
+ if (bus == NULL)
+ return NULL;
+ part = bus->part;
+
+ for (i = 6; i < 32; i++)
+ {
+ sprintf (buff, "PerAddr%d", i);
+ failed |= urj_bus_generic_attach_sig (part, &(A[i]), buff);
+ }
+
+ for (i = 0; i < 16; i++)
+ {
+ sprintf (buff, "PerData%d", i);
+ failed |= urj_bus_generic_attach_sig (part, &(D[i]), buff);
+ }
+
+ failed |= urj_bus_generic_attach_sig (part, &(nCS), "PerCS0");
+
+ failed |= urj_bus_generic_attach_sig (part, &(nWE), "PerWBE1");
+
+ failed |= urj_bus_generic_attach_sig (part, &(nOE), "PerOE");
+
+ if (failed)
+ {
+ urj_bus_generic_free (bus);
+ return NULL;
+ }
+
+ return bus;
+}
+
+/**
+ * bus->driver->(*printinfo)
+ *
+ */
+static void
+ppc405ep_bus_printinfo (urj_log_level_t ll, urj_bus_t *bus)
+{
+ int i;
+
+ for (i = 0; i < bus->chain->parts->len; i++)
+ if (bus->part == bus->chain->parts->parts[i])
+ break;
+ urj_log (ll, _("IBM PowerPC 405EP compatible bus driver via BSR (JTAG part No. %d)\n"),
+ i);
+}
+
+/**
+ * bus->driver->(*area)
+ *
+ */
+static int
+ppc405ep_bus_area (urj_bus_t *bus, uint32_t adr, urj_bus_area_t *area)
+{
+ area->description = NULL;
+ area->start = UINT32_C (0x00000000);
+ area->length = UINT64_C (0x100000000);
+ area->width = 16;
+
+ return URJ_STATUS_OK;
+}
+
+static void
+setup_address (urj_bus_t *bus, uint32_t a)
+{
+ int i;
+ urj_part_t *p = bus->part;
+
+ for (i = 6; i < 32; i++)
+ urj_part_set_signal (p, A[i], 1, (a >> (31 - i)) & 1);
+}
+
+static void
+set_data_in (urj_bus_t *bus)
+{
+ int i;
+ urj_part_t *p = bus->part;
+ urj_bus_area_t area;
+
+ ppc405ep_bus_area (bus, 0, &area);
+
+ for (i = 0; i < area.width; i++)
+ urj_part_set_signal (p, D[i], 0, 0);
+}
+
+static void
+setup_data (urj_bus_t *bus, uint32_t d)
+{
+ int i;
+ urj_part_t *p = bus->part;
+ urj_bus_area_t area;
+
+ ppc405ep_bus_area (bus, 0, &area);
+
+ for (i = 0; i < area.width; i++)
+ urj_part_set_signal (p, D[15 - i], 1, (d >> i) & 1);
+}
+
+/**
+ * bus->driver->(*read_start)
+ *
+ */
+static int
+ppc405ep_bus_read_start (urj_bus_t *bus, uint32_t adr)
+{
+ urj_part_t *p = bus->part;
+ urj_chain_t *chain = bus->chain;
+
+ urj_part_set_signal (p, nCS, 1, 0);
+ urj_part_set_signal (p, nWE, 1, 1);
+ urj_part_set_signal (p, nOE, 1, 0);
+
+ setup_address (bus, adr);
+ set_data_in (bus);
+
+ urj_tap_chain_shift_data_registers (chain, 0);
+
+ return URJ_STATUS_OK;
+}
+
+/**
+ * bus->driver->(*read_next)
+ *
+ */
+static uint32_t
+ppc405ep_bus_read_next (urj_bus_t *bus, uint32_t adr)
+{
+ urj_part_t *p = bus->part;
+ urj_chain_t *chain = bus->chain;
+ int i;
+ uint32_t d = 0;
+ urj_bus_area_t area;
+
+ ppc405ep_bus_area (bus, adr, &area);
+
+ setup_address (bus, adr);
+ urj_tap_chain_shift_data_registers (chain, 1);
+
+ for (i = 0; i < area.width; i++)
+ d |= (uint32_t) (urj_part_get_signal (p, D[15 - i]) << i);
+
+ return d;
+}
+
+/**
+ * bus->driver->(*read_end)
+ *
+ */
+static uint32_t
+ppc405ep_bus_read_end (urj_bus_t *bus)
+{
+ urj_part_t *p = bus->part;
+ urj_chain_t *chain = bus->chain;
+ int i;
+ uint32_t d = 0;
+ urj_bus_area_t area;
+
+ ppc405ep_bus_area (bus, 0, &area);
+
+ urj_part_set_signal (p, nCS, 1, 1);
+ urj_part_set_signal (p, nOE, 1, 1);
+ urj_tap_chain_shift_data_registers (chain, 1);
+
+ for (i = 0; i < area.width; i++)
+ d |= (uint32_t) (urj_part_get_signal (p, D[15 - i]) << i);
+
+ return d;
+}
+
+/**
+ * bus->driver->(*write)
+ *
+ */
+static void
+ppc405ep_bus_write (urj_bus_t *bus, uint32_t adr, uint32_t data)
+{
+ urj_part_t *p = bus->part;
+ urj_chain_t *chain = bus->chain;
+
+ urj_part_set_signal (p, nCS, 1, 0);
+ urj_part_set_signal (p, nWE, 1, 1);
+ urj_part_set_signal (p, nOE, 1, 1);
+
+ setup_address (bus, adr);
+ setup_data (bus, data);
+
+ urj_tap_chain_shift_data_registers (chain, 0);
+
+ urj_part_set_signal (p, nWE, 1, 0);
+ urj_tap_chain_shift_data_registers (chain, 0);
+ urj_part_set_signal (p, nWE, 1, 1);
+ urj_part_set_signal (p, nCS, 1, 1);
+ urj_tap_chain_shift_data_registers (chain, 0);
+}
+
+const urj_bus_driver_t urj_bus_ppc405ep_bus = {
+ "ppc405ep",
+ N_("IBM PowerPC 405EP compatible bus driver via BSR"),
+ ppc405ep_bus_new,
+ urj_bus_generic_free,
+ ppc405ep_bus_printinfo,
+ urj_bus_generic_prepare_extest,
+ ppc405ep_bus_area,
+ ppc405ep_bus_read_start,
+ ppc405ep_bus_read_next,
+ ppc405ep_bus_read_end,
+ urj_bus_generic_read,
+ ppc405ep_bus_write,
+ urj_bus_generic_no_init
+};
--- /dev/null
+/*
+ * Copyright (C) 2002, 2003 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2002, 2003.
+ */
+
+#include <sysdep.h>
+
+#include <stdlib.h>
+#include <stdint.h>
+#include <string.h>
+
+#include <urjtag/part.h>
+#include <urjtag/bus.h>
+#include <urjtag/chain.h>
+#include <urjtag/bssignal.h>
+
+#include "buses.h"
+#include "generic_bus.h"
+
+#define PPC440GX_ADDR_LINES 32
+#define PPC440GX_DATA_LINES 8
+
+typedef struct
+{
+ urj_part_signal_t *a[PPC440GX_ADDR_LINES];
+ urj_part_signal_t *d[PPC440GX_DATA_LINES];
+ urj_part_signal_t *ncs;
+ urj_part_signal_t *nwe;
+ urj_part_signal_t *noe;
+} bus_params_t;
+
+#define A ((bus_params_t *) bus->params)->a
+#define D ((bus_params_t *) bus->params)->d
+#define nCS ((bus_params_t *) bus->params)->ncs
+#define nWE ((bus_params_t *) bus->params)->nwe
+#define nOE ((bus_params_t *) bus->params)->noe
+
+
+/**
+ * bus->driver->(*new_bus)
+ *
+ */
+static urj_bus_t *
+ppc440gx_ebc8_bus_new (urj_chain_t *chain, const urj_bus_driver_t *driver,
+ const urj_param_t *cmd_params[])
+{
+ urj_bus_t *bus;
+ urj_part_t *part;
+ char buff[10];
+ int i;
+ int failed = 0;
+
+ bus = urj_bus_generic_new (chain, driver, sizeof (bus_params_t));
+ if (bus == NULL)
+ return NULL;
+ part = bus->part;
+
+ for (i = 0; i < PPC440GX_ADDR_LINES; i++)
+ {
+ sprintf (buff, "EBCADR%d", i);
+ failed |= urj_bus_generic_attach_sig (part, &(A[i]), buff);
+ }
+
+ for (i = 0; i < PPC440GX_DATA_LINES; i++)
+ {
+ sprintf (buff, "EBCDATA%d", i);
+ failed |= urj_bus_generic_attach_sig (part, &(D[i]), buff);
+ }
+
+ failed |= urj_bus_generic_attach_sig (part, &(nCS), "EBCCS0_N");
+
+ failed |= urj_bus_generic_attach_sig (part, &(nWE), "EBCWE_N");
+
+ failed |= urj_bus_generic_attach_sig (part, &(nOE), "EBCOE_N");
+
+ if (failed)
+ {
+ urj_bus_generic_free (bus);
+ return NULL;
+ }
+
+ return bus;
+}
+
+/**
+ * bus->driver->(*printinfo)
+ *
+ */
+static void
+ppc440gx_ebc8_bus_printinfo (urj_log_level_t ll, urj_bus_t *bus)
+{
+ int i;
+
+ for (i = 0; i < bus->chain->parts->len; i++)
+ if (bus->part == bus->chain->parts->parts[i])
+ break;
+ urj_log (ll, _("IBM PowerPC 440GX 8-bit compatible bus driver via BSR (JTAG part No. %d)\n"),
+ i);
+}
+
+/**
+ * bus->driver->(*area)
+ *
+ */
+static int
+ppc440gx_ebc8_bus_area (urj_bus_t *bus, uint32_t adr, urj_bus_area_t *area)
+{
+ area->description = NULL;
+ area->start = UINT32_C (0x00000000);
+ area->length = UINT64_C (0x100000000); /* ??????????? */
+ area->width = PPC440GX_DATA_LINES;
+
+ return URJ_STATUS_OK;
+}
+
+static void
+setup_address (urj_bus_t *bus, uint32_t a)
+{
+ int i;
+ urj_part_t *p = bus->part;
+
+ for (i = 0; i < PPC440GX_ADDR_LINES; i++)
+ urj_part_set_signal (p, A[i], 1,
+ (a >> (PPC440GX_ADDR_LINES - 1 - i)) & 1);
+}
+
+static void
+set_data_in (urj_bus_t *bus)
+{
+ int i;
+ urj_part_t *p = bus->part;
+ urj_bus_area_t area;
+
+ ppc440gx_ebc8_bus_area (bus, 0, &area);
+
+ for (i = 0; i < area.width; i++)
+ urj_part_set_signal (p, D[i], 0, 0);
+}
+
+static void
+setup_data (urj_bus_t *bus, uint32_t d)
+{
+ int i;
+ urj_part_t *p = bus->part;
+ urj_bus_area_t area;
+
+ ppc440gx_ebc8_bus_area (bus, 0, &area);
+
+ for (i = 0; i < area.width; i++)
+ urj_part_set_signal (p, D[PPC440GX_DATA_LINES - 1 - i], 1,
+ (d >> i) & 1);
+}
+
+/**
+ * bus->driver->(*read_start)
+ *
+ */
+static int
+ppc440gx_ebc8_bus_read_start (urj_bus_t *bus, uint32_t adr)
+{
+ urj_part_t *p = bus->part;
+ urj_chain_t *chain = bus->chain;
+
+ urj_part_set_signal (p, nCS, 1, 0);
+ urj_part_set_signal (p, nWE, 1, 1);
+ urj_part_set_signal (p, nOE, 1, 0);
+
+ setup_address (bus, adr);
+ set_data_in (bus);
+
+ urj_tap_chain_shift_data_registers (chain, 0);
+
+ return URJ_STATUS_OK;
+}
+
+/**
+ * bus->driver->(*read_next)
+ *
+ */
+static uint32_t
+ppc440gx_ebc8_bus_read_next (urj_bus_t *bus, uint32_t adr)
+{
+ urj_part_t *p = bus->part;
+ urj_chain_t *chain = bus->chain;
+ int i;
+ uint32_t d = 0;
+ urj_bus_area_t area;
+
+ ppc440gx_ebc8_bus_area (bus, adr, &area);
+
+ setup_address (bus, adr);
+ urj_tap_chain_shift_data_registers (chain, 1);
+
+ for (i = 0; i < area.width; i++)
+ d |= (uint32_t) (urj_part_get_signal
+ (p, D[PPC440GX_DATA_LINES - 1 - i]) << i);
+
+ return d;
+}
+
+/**
+ * bus->driver->(*read_end)
+ *
+ */
+static uint32_t
+ppc440gx_ebc8_bus_read_end (urj_bus_t *bus)
+{
+ urj_part_t *p = bus->part;
+ urj_chain_t *chain = bus->chain;
+ int i;
+ uint32_t d = 0;
+ urj_bus_area_t area;
+
+ ppc440gx_ebc8_bus_area (bus, 0, &area);
+
+ urj_part_set_signal (p, nCS, 1, 1);
+ urj_part_set_signal (p, nOE, 1, 1);
+ urj_tap_chain_shift_data_registers (chain, 1);
+
+ for (i = 0; i < area.width; i++)
+ d |= (uint32_t) (urj_part_get_signal
+ (p, D[PPC440GX_DATA_LINES - 1 - i]) << i);
+
+ return d;
+}
+
+/**
+ * bus->driver->(*write)
+ *
+ */
+static void
+ppc440gx_ebc8_bus_write (urj_bus_t *bus, uint32_t adr, uint32_t data)
+{
+ urj_part_t *p = bus->part;
+ urj_chain_t *chain = bus->chain;
+
+ urj_part_set_signal (p, nCS, 1, 0);
+ urj_part_set_signal (p, nWE, 1, 1);
+ urj_part_set_signal (p, nOE, 1, 1);
+
+ setup_address (bus, adr);
+ setup_data (bus, data);
+
+ urj_tap_chain_shift_data_registers (chain, 0);
+
+ urj_part_set_signal (p, nWE, 1, 0);
+ urj_tap_chain_shift_data_registers (chain, 0);
+ urj_part_set_signal (p, nWE, 1, 1);
+ urj_part_set_signal (p, nCS, 1, 1);
+ urj_tap_chain_shift_data_registers (chain, 0);
+}
+
+const urj_bus_driver_t urj_bus_ppc440gx_ebc8_bus = {
+ "ppc440gx_ebc8",
+ N_("IBM PowerPC 440GX 8-bit EBC compatible bus driver via BSR"),
+ ppc440gx_ebc8_bus_new,
+ urj_bus_generic_free,
+ ppc440gx_ebc8_bus_printinfo,
+ urj_bus_generic_prepare_extest,
+ ppc440gx_ebc8_bus_area,
+ ppc440gx_ebc8_bus_read_start,
+ ppc440gx_ebc8_bus_read_next,
+ ppc440gx_ebc8_bus_read_end,
+ urj_bus_generic_read,
+ ppc440gx_ebc8_bus_write,
+ urj_bus_generic_no_init
+};
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2002, 2003 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2002, 2003.
+ * Modified by Wojtek Kaniewski <wojtekka@toxygen.net>, 2004.
+ * Modified from ppc405ep.c by Detrick Martin <jtag@detrickmartin.net>, 2008.
+ */
+
+#include <sysdep.h>
+
+#include <stdlib.h>
+#include <stdint.h>
+#include <string.h>
+
+#include <urjtag/part.h>
+#include <urjtag/bus.h>
+#include <urjtag/chain.h>
+#include <urjtag/bssignal.h>
+
+#include "buses.h"
+#include "generic_bus.h"
+
+typedef struct
+{
+ urj_part_signal_t *a[32];
+ urj_part_signal_t *d[32];
+ urj_part_signal_t *cs;
+ urj_part_signal_t *we;
+ urj_part_signal_t *oe;
+ int alsbi, amsbi, ai, aw, dlsbi, dmsbi, di, dw, csa, wea, oea;
+ int ashift;
+} bus_params_t;
+
+#define A ((bus_params_t *) bus->params)->a
+#define D ((bus_params_t *) bus->params)->d
+#define CS ((bus_params_t *) bus->params)->cs
+#define WE ((bus_params_t *) bus->params)->we
+#define OE ((bus_params_t *) bus->params)->oe
+
+#define ALSBI ((bus_params_t *) bus->params)->alsbi
+#define AMSBI ((bus_params_t *) bus->params)->amsbi
+#define AI ((bus_params_t *) bus->params)->ai
+#define AW ((bus_params_t *) bus->params)->aw
+#define DLSBI ((bus_params_t *) bus->params)->dlsbi
+#define DMSBI ((bus_params_t *) bus->params)->dmsbi
+#define DI ((bus_params_t *) bus->params)->di
+#define DW ((bus_params_t *) bus->params)->dw
+#define CSA ((bus_params_t *) bus->params)->csa
+#define WEA ((bus_params_t *) bus->params)->wea
+#define OEA ((bus_params_t *) bus->params)->oea
+
+#define ASHIFT ((bus_params_t *) bus->params)->ashift
+
+static void
+prototype_bus_signal_parse (const char *str, char *fmt, int *inst)
+{
+ char pre[16], suf[16];
+
+ switch (sscanf (str, "%[^0-9]%d%s", pre, inst, suf))
+ {
+ case 1:
+ strcpy (fmt, str);
+ break;
+ case 2:
+ sprintf (fmt, "%s%s", pre, "%d");
+ break;
+ case 3:
+ sprintf (fmt, "%s%s%s", pre, "%d", suf);
+ }
+ // @@@@ RFHH what about failure?
+}
+
+/**
+ * bus->driver->(*new_bus)
+ *
+ */
+static urj_bus_t *
+prototype_bus_new (urj_chain_t *chain, const urj_bus_driver_t *driver,
+ const urj_param_t *cmd_params[])
+{
+ urj_bus_t *bus;
+ urj_part_signal_t *sig;
+ char buff[16], fmt[16], afmt[16], dfmt[16];
+ int i, j, inst, max, min;
+ int failed = 0;
+ int ashift = -1;
+ const char *value;
+
+ bus = urj_bus_generic_new (chain, driver, sizeof (bus_params_t));
+ if (bus == NULL)
+ return NULL;
+
+ CS = OE = WE = NULL;
+ ALSBI = AMSBI = DLSBI = DMSBI = -1;
+ for (i = 0; cmd_params[i] != NULL; i++)
+ {
+ if (cmd_params[i]->key == URJ_BUS_PARAM_KEY_AMODE ||
+ cmd_params[i]->key == URJ_BUS_PARAM_KEY_WIDTH)
+ {
+ switch (cmd_params[i]->value.lu)
+ {
+ case 8:
+ ashift = 0;
+ break;
+ case 16:
+ ashift = 1;
+ break;
+ case 32:
+ ashift = 2;
+ break;
+ case 0: // "auto"
+ break;
+
+ default:
+ urj_error_set (URJ_ERROR_INVALID,
+ _("value %lu not defined for parameter %s"),
+ cmd_params[i]->value.lu,
+ urj_param_string(&urj_bus_param_list,
+ cmd_params[i]));
+ failed = 1; // @@@@ RFHH
+ break;
+ }
+
+ }
+ else
+ {
+ if (cmd_params[i]->type != URJ_PARAM_TYPE_STRING)
+ {
+ urj_error_set (URJ_ERROR_SYNTAX,
+ "parameter must be of type string");
+ failed = 1;
+ continue;
+ }
+
+ value = cmd_params[i]->value.string;
+
+ inst = 32;
+ prototype_bus_signal_parse (value, fmt, &inst);
+ // @@@@ RFHH Flag error?
+ // @@@@ RFHH If it is mandatory for a signal to have an int inst
+ // number, why does prototype_bus_signal_parse() accept values
+ // without an int?
+ if (inst > 31 || inst < 0)
+ continue;
+
+ sig = urj_part_find_signal (bus->part, value);
+ if (!sig)
+ {
+ urj_error_set (URJ_ERROR_NOTFOUND, _("signal '%s' not found"),
+ value);
+ failed = 1;
+ continue;
+ }
+
+ switch (cmd_params[i]->key)
+ {
+ case URJ_BUS_PARAM_KEY_ALSB:
+ ALSBI = inst;
+ A[inst] = sig;
+ strcpy (afmt, fmt);
+ break;
+ case URJ_BUS_PARAM_KEY_AMSB:
+ AMSBI = inst;
+ A[inst] = sig;
+ strcpy (afmt, fmt);
+ break;
+ case URJ_BUS_PARAM_KEY_DLSB:
+ DLSBI = inst;
+ D[inst] = sig;
+ strcpy (dfmt, fmt);
+ break;
+ case URJ_BUS_PARAM_KEY_DMSB:
+ DMSBI = inst;
+ D[inst] = sig;
+ strcpy (dfmt, fmt);
+ break;
+ case URJ_BUS_PARAM_KEY_CS:
+ case URJ_BUS_PARAM_KEY_NCS:
+ CS = sig;
+ CSA = (cmd_params[i]->key == URJ_BUS_PARAM_KEY_CS);
+ break;
+ case URJ_BUS_PARAM_KEY_OE:
+ case URJ_BUS_PARAM_KEY_NOE:
+ OE = sig;
+ OEA = (cmd_params[i]->key == URJ_BUS_PARAM_KEY_OE);
+ break;
+ case URJ_BUS_PARAM_KEY_WE:
+ case URJ_BUS_PARAM_KEY_NWE:
+ WE = sig;
+ WEA = (cmd_params[i]->key == URJ_BUS_PARAM_KEY_WE);
+ break;
+ default:
+ urj_error_set (URJ_ERROR_INVALID, _("parameter %s is unknown"),
+ urj_param_string(&urj_bus_param_list,
+ cmd_params[i]));
+ failed = 1;
+ break;
+ }
+ }
+ }
+
+ if (ALSBI >= 0 || AMSBI >= 0)
+ {
+ if (ALSBI == -1 || AMSBI == -1)
+ {
+ for (min = 0; min <= 31; min++)
+ {
+ sprintf (buff, afmt, min);
+ A[min] = urj_part_find_signal (bus->part, buff);
+ if (A[min])
+ break;
+ }
+ for (max = 31; max >= 0; max--)
+ {
+ sprintf (buff, afmt, max);
+ A[max] = urj_part_find_signal (bus->part, buff);
+ if (A[max])
+ break;
+ }
+ if (ALSBI == -1)
+ ALSBI = (max - AMSBI < AMSBI - min) ? min : max;
+ else
+ AMSBI = (max - ALSBI < ALSBI - min) ? min : max;
+ }
+ AI = (AMSBI > ALSBI ? 1 : -1);
+ AW = (AMSBI > ALSBI ? AMSBI - ALSBI : ALSBI - AMSBI) + 1;
+ for (i = 0, j = ALSBI; i < AW; i++, j += AI)
+ {
+ sprintf (buff, afmt, j);
+ // @@@@ RFHH check result
+ A[j] = urj_part_find_signal (bus->part, buff);
+ }
+ }
+ else
+ {
+ urj_error_set (URJ_ERROR_INVALID,
+ _("parameters alsb=<signal> and/or amsb=<signal> are not defined"));
+ failed = 1;
+ }
+
+ if (DLSBI >= 0 || DMSBI >= 0)
+ {
+ if (DLSBI == -1 || DMSBI == -1)
+ {
+ for (min = 0; min <= 31; min++)
+ {
+ sprintf (buff, dfmt, min);
+ D[min] = urj_part_find_signal (bus->part, buff);
+ if (D[min])
+ break;
+ }
+ for (max = 31; max >= 0; max--)
+ {
+ sprintf (buff, dfmt, max);
+ D[max] = urj_part_find_signal (bus->part, buff);
+ if (D[max])
+ break;
+ }
+ if (DLSBI == -1)
+ DLSBI = (max - DMSBI < DMSBI - min) ? min : max;
+ else
+ DMSBI = (max - DLSBI < DLSBI - min) ? min : max;
+ }
+ DI = (DMSBI > DLSBI ? 1 : -1);
+ DW = (DMSBI > DLSBI ? DMSBI - DLSBI : DLSBI - DMSBI) + 1;
+ for (i = 0, j = DLSBI; i < DW; i++, j += DI)
+ {
+ sprintf (buff, dfmt, j);
+ D[j] = urj_part_find_signal (bus->part, buff);
+ }
+
+ /* bus drivers are called with a byte address
+ this address needs to be adjusted by setup_address() to the memory data width */
+ if (ashift < 0)
+ {
+ int nbytes;
+
+ /* parameter 'amode' wasn't specified, derive the address shift from the
+ data bus width */
+ nbytes = DW / 8;
+ if (DW % 8 > 0)
+ nbytes++;
+
+ ashift = 0;
+ while (nbytes != 1)
+ {
+ nbytes >>= 1;
+ ashift++;
+ }
+ }
+ ASHIFT = ashift;
+
+ }
+ else
+ {
+ urj_error_set (URJ_ERROR_INVALID,
+ _("parameters dlsb=<signal> and/or dmsb=<signal> are not defined\n"));
+ failed = 1;
+ }
+
+ if (!CS)
+ {
+ urj_error_set (URJ_ERROR_INVALID,
+ _("parameter cs=<signal> or ncs=<signal> is not defined\n"));
+ failed = 1;
+ }
+
+ if (!OE)
+ {
+ urj_error_set (URJ_ERROR_INVALID,
+ _("parameter oe=<signal> or noe=<signal> is not defined\n"));
+ failed = 1;
+ }
+
+ if (!WE)
+ {
+ urj_error_set (URJ_ERROR_INVALID,
+ _("parameter we=<signal> or nwe=<signal> is not defined\n"));
+ failed = 1;
+ }
+
+ if (failed)
+ {
+ urj_bus_generic_free (bus);
+ return NULL;
+ }
+
+ return bus;
+}
+
+/**
+ * bus->driver->(*printinfo)
+ *
+ */
+static void
+prototype_bus_printinfo (urj_log_level_t ll, urj_bus_t *bus)
+{
+ int i;
+
+ for (i = 0; i < bus->chain->parts->len; i++)
+ if (bus->part == bus->chain->parts->parts[i])
+ break;
+ // @@@@ RFHH check for error
+ urj_log (ll, _("Configurable prototype bus driver via BSR (JTAG part No. %d)\n"),
+ i);
+}
+
+/**
+ * bus->driver->(*area)
+ *
+ */
+static int
+prototype_bus_area (urj_bus_t *bus, uint32_t adr, urj_bus_area_t *area)
+{
+ area->description = NULL;
+ area->start = UINT32_C (0x00000000);
+ area->length = UINT64_C (0x100000000);
+ area->width = DW;
+
+ return URJ_STATUS_OK;
+}
+
+static void
+setup_address (urj_bus_t *bus, uint32_t a)
+{
+ int i, j;
+ urj_part_t *p = bus->part;
+
+ a >>= ASHIFT;
+
+ for (i = 0, j = ALSBI; i < AW; i++, j += AI)
+ urj_part_set_signal (p, A[j], 1, (a >> i) & 1);
+}
+
+static void
+set_data_in (urj_bus_t *bus)
+{
+ int i, j;
+ urj_part_t *p = bus->part;
+ urj_bus_area_t area;
+
+ prototype_bus_area (bus, 0, &area);
+
+ for (i = 0, j = DLSBI; i < DW; i++, j += DI)
+ urj_part_set_signal (p, D[j], 0, 0);
+}
+
+static void
+setup_data (urj_bus_t *bus, uint32_t d)
+{
+ int i, j;
+ urj_part_t *p = bus->part;
+ urj_bus_area_t area;
+
+ prototype_bus_area (bus, 0, &area);
+
+ for (i = 0, j = DLSBI; i < DW; i++, j += DI)
+ urj_part_set_signal (p, D[j], 1, (d >> i) & 1);
+}
+
+/**
+ * bus->driver->(*read_start)
+ *
+ */
+static int
+prototype_bus_read_start (urj_bus_t *bus, uint32_t adr)
+{
+ urj_part_t *p = bus->part;
+ urj_chain_t *chain = bus->chain;
+
+ urj_part_set_signal (p, CS, 1, CSA);
+ urj_part_set_signal (p, WE, 1, WEA ? 0 : 1);
+ urj_part_set_signal (p, OE, 1, OEA);
+
+ setup_address (bus, adr);
+ set_data_in (bus);
+
+ urj_tap_chain_shift_data_registers (chain, 0);
+
+ return URJ_STATUS_OK;
+}
+
+/**
+ * bus->driver->(*read_next)
+ *
+ */
+static uint32_t
+prototype_bus_read_next (urj_bus_t *bus, uint32_t adr)
+{
+ urj_part_t *p = bus->part;
+ urj_chain_t *chain = bus->chain;
+ int i, j;
+ uint32_t d = 0;
+ urj_bus_area_t area;
+
+ prototype_bus_area (bus, adr, &area);
+
+ setup_address (bus, adr);
+ urj_tap_chain_shift_data_registers (chain, 1);
+
+ for (i = 0, j = DLSBI; i < DW; i++, j += DI)
+ d |= (uint32_t) (urj_part_get_signal (p, D[j]) << i);
+
+ return d;
+}
+
+/**
+ * bus->driver->(*read_end)
+ *
+ */
+static uint32_t
+prototype_bus_read_end (urj_bus_t *bus)
+{
+ urj_part_t *p = bus->part;
+ urj_chain_t *chain = bus->chain;
+ int i, j;
+ uint32_t d = 0;
+ urj_bus_area_t area;
+
+ prototype_bus_area (bus, 0, &area);
+
+ urj_part_set_signal (p, CS, 1, CSA ? 0 : 1);
+ urj_part_set_signal (p, OE, 1, OEA ? 0 : 1);
+ urj_tap_chain_shift_data_registers (chain, 1);
+
+ for (i = 0, j = DLSBI; i < DW; i++, j += DI)
+ d |= (uint32_t) (urj_part_get_signal (p, D[j]) << i);
+
+ return d;
+}
+
+/**
+ * bus->driver->(*write)
+ *
+ */
+static void
+prototype_bus_write (urj_bus_t *bus, uint32_t adr, uint32_t data)
+{
+ urj_part_t *p = bus->part;
+ urj_chain_t *chain = bus->chain;
+
+ urj_part_set_signal (p, CS, 1, CSA);
+ urj_part_set_signal (p, WE, 1, WEA ? 0 : 1);
+ urj_part_set_signal (p, OE, 1, OEA ? 0 : 1);
+
+ setup_address (bus, adr);
+ setup_data (bus, data);
+
+ urj_tap_chain_shift_data_registers (chain, 0);
+
+ urj_part_set_signal (p, WE, 1, WEA);
+ urj_tap_chain_shift_data_registers (chain, 0);
+ urj_part_set_signal (p, WE, 1, WEA ? 0 : 1);
+ urj_part_set_signal (p, CS, 1, CSA ? 0 : 1);
+ urj_tap_chain_shift_data_registers (chain, 0);
+}
+
+const urj_bus_driver_t urj_bus_prototype_bus = {
+ "prototype",
+ N_("Configurable prototype bus driver via BSR, requires parameters:\n"
+ " amsb=<addr MSB> alsb=<addr LSB> dmsb=<data MSB> dlsb=<data LSB>\n"
+ " ncs=<CS#>|cs=<CS> noe=<OE#>|oe=<OE> nwe=<WE#>|we=<WE> [amode=auto|x8|x16|x32]"),
+ prototype_bus_new,
+ urj_bus_generic_free,
+ prototype_bus_printinfo,
+ urj_bus_generic_prepare_extest,
+ prototype_bus_area,
+ prototype_bus_read_start,
+ prototype_bus_read_next,
+ prototype_bus_read_end,
+ urj_bus_generic_read,
+ prototype_bus_write,
+ urj_bus_generic_no_init
+};
--- /dev/null
+/*
+ * $Id$
+ *
+ * Intel PXA2x0 compatible bus driver via BSR
+ * Copyright (C) 2002, 2003 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2002, 2003.
+ *
+ * 2005-01-29: Cliff Brake <cliff.brake@gmail.com> <http://bec-systems.com>
+ * - added support for PXA270
+ *
+ * Documentation:
+ * [1] Intel Corporation, "Intel PXA250 and PXA210 Application Processors
+ * Developer's Manual", February 2002, Order Number: 278522-001
+ *
+ */
+
+#include <sysdep.h>
+
+#include <stdlib.h>
+#include <stdint.h>
+#include <string.h>
+
+#include <urjtag/chain.h>
+#include <urjtag/part.h>
+#include <urjtag/bus.h>
+#include <urjtag/bssignal.h>
+#include <urjtag/tap_state.h>
+
+#include "buses.h"
+#include "generic_bus.h"
+
+#include "pxa2x0_mc.h"
+
+
+/*
+ * the following defines are used in proc field of the the
+ * bus_params_t structure and are used in various functions
+ * below
+ */
+
+#define PROC_PXA25x 1 // including px26x series
+#define PROC_PXA27x 2
+
+
+#define nCS_TOTAL 6
+
+typedef struct
+{
+ char *sig_name;
+ int enabled;
+ int bus_width; // set 0 for disabled (or auto-detect)
+ char label_buf[81];
+} ncs_map_entry;
+
+/*
+ * Tables indexed by nCS[index]
+ * An array of plain char* would probably do it too, but anyway...
+ *
+ * Note: the setup of nCS[*] is board-specific, rather than chip-specific!
+ * The memory mapping and nCS[*] functions are normally set up by the boot loader.
+ * In our JTAG code, we manipulate the outer pins explicitly, without the help
+ * of the CPU's memory controller - hence the need to mimick its setup.
+ *
+ * Note that URJ_BUS_AREA() and URJ_BUS_READ()/URJ_BUS_WRITE() use a window of 64MB
+ * per nCS pin (26bit addresses), which seems to be the most common option.
+ * For static CS[0] and CS[1] == 128 MB, the algorithms have to be modified...
+ */
+
+// Fool-proof basic mapping with only nCS[0] wired.
+// nCS[0] doesn't collide with any other GPIO functions.
+static ncs_map_entry pxa25x_ncs_map[nCS_TOTAL] = {
+ {"nCS[0]", 1, 0},
+ {NULL, 0, 0},
+ {NULL, 0, 0},
+ {NULL, 0, 0},
+ {NULL, 0, 0},
+ {NULL, 0, 0}
+};
+
+// Default mapping with all nCS[*] GPIO pins used as nCS.
+// Note that the same GPIO pins might be used e.g. for PCCard
+// service space access or PWM outputs, or some other purpose.
+static ncs_map_entry pxa27x_ncs_map[nCS_TOTAL] = {
+ {"nCS[0]", 1, 0}, // nCS[0]
+ {"GPIO[15]", 1, 16}, // nCS[1]
+ {"GPIO[78]", 1, 16}, // nCS[2]
+ {"GPIO[79]", 1, 16}, // nCS[3]
+ {"GPIO[80]", 1, 16}, // nCS[4]
+ {"GPIO[33]", 1, 16} // nCS[5]
+};
+
+
+typedef struct
+{
+ uint32_t last_adr;
+ urj_part_signal_t *ma[26];
+ urj_part_signal_t *md[32];
+ urj_part_signal_t *ncs[nCS_TOTAL];
+ urj_part_signal_t *dqm[4];
+ urj_part_signal_t *rdnwr;
+ urj_part_signal_t *nwe;
+ urj_part_signal_t *noe;
+ urj_part_signal_t *nsdcas;
+ MC_registers_t MC_registers;
+ int inited;
+ int proc;
+} bus_params_t;
+
+#define PROC ((bus_params_t *) bus->params)->proc
+#define LAST_ADR ((bus_params_t *) bus->params)->last_adr
+#define MA ((bus_params_t *) bus->params)->ma
+#define MD ((bus_params_t *) bus->params)->md
+#define nCS ((bus_params_t *) bus->params)->ncs
+#define DQM ((bus_params_t *) bus->params)->dqm
+#define RDnWR ((bus_params_t *) bus->params)->rdnwr
+#define nWE ((bus_params_t *) bus->params)->nwe
+#define nOE ((bus_params_t *) bus->params)->noe
+#define nSDCAS ((bus_params_t *) bus->params)->nsdcas
+
+#define MC_pointer (&((bus_params_t *) bus->params)->MC_registers)
+
+#define INITED ((bus_params_t *) bus->params)->inited
+
+/**
+ * bus->driver->(*new_bus)
+ *
+ */
+static urj_bus_t *
+pxa2xx_bus_new (urj_chain_t *chain, const urj_bus_driver_t *driver,
+ const urj_param_t *cmd_params[])
+{
+ urj_part_t *part;
+ urj_bus_t *bus;
+ ncs_map_entry *ncs_map = NULL;
+ char buff[10];
+ int i;
+ int failed = 0;
+
+ if (!chain || !chain->parts || chain->parts->len <= chain->active_part
+ || chain->active_part < 0)
+ return NULL;
+
+ bus = urj_bus_generic_new (chain, driver, sizeof (bus_params_t));
+ if (bus == NULL)
+ return NULL;
+ part = bus->part;
+
+ if (strcmp (driver->name, "pxa2x0") == 0)
+ PROC = PROC_PXA25x;
+ else if (strcmp (driver->name, "pxa27x") == 0)
+ PROC = PROC_PXA27x;
+ else
+ {
+ urj_bus_generic_free (bus);
+ urj_error_set (URJ_ERROR_SYNTAX,
+ "driver must be 'pxa2x0' or 'pxa27x', not '%s'",
+ driver->name);
+ return NULL;
+ }
+
+ for (i = 0; i < 26; i++)
+ {
+ sprintf (buff, "MA[%d]", i);
+ failed |= urj_bus_generic_attach_sig (part, &(MA[i]), buff);
+ }
+
+ for (i = 0; i < 32; i++)
+ {
+ sprintf (buff, "MD[%d]", i);
+ failed |= urj_bus_generic_attach_sig (part, &(MD[i]), buff);
+ }
+
+ if (PROC == PROC_PXA25x)
+ {
+ ncs_map = pxa25x_ncs_map;
+ }
+ else if (PROC == PROC_PXA27x)
+ {
+ ncs_map = pxa27x_ncs_map;
+ }
+ else
+ {
+ urj_error_set (URJ_ERROR_INVALID, "processor type %d", PROC);
+ ncs_map = pxa25x_ncs_map; // be dumb by default
+ }
+ for (i = 0; i < nCS_TOTAL; i++)
+ {
+ if (ncs_map[i].enabled > 0)
+ {
+ failed |=
+ urj_bus_generic_attach_sig (part, &(nCS[i]),
+ ncs_map[i].sig_name);
+ }
+ else // disabled - this GPIO pin is unused or used for some other function
+ {
+ nCS[i] = NULL;
+ }
+ }
+
+ for (i = 0; i < 4; i++)
+ {
+ sprintf (buff, "DQM[%d]", i);
+ failed |= urj_bus_generic_attach_sig (part, &(DQM[i]), buff);
+ }
+
+ failed |= urj_bus_generic_attach_sig (part, &(RDnWR), "RDnWR");
+
+ failed |= urj_bus_generic_attach_sig (part, &(nWE), "nWE");
+
+ failed |= urj_bus_generic_attach_sig (part, &(nOE), "nOE");
+
+ failed |= urj_bus_generic_attach_sig (part, &(nSDCAS), "nSDCAS");
+
+ if (failed)
+ {
+ urj_bus_generic_free (bus);
+ return NULL;
+ }
+
+ return bus;
+}
+
+/**
+ * bus->driver->(*printinfo)
+ *
+ */
+static void
+pxa2xx_bus_printinfo (urj_log_level_t ll, urj_bus_t *bus)
+{
+ int i;
+
+ for (i = 0; i < bus->chain->parts->len; i++)
+ if (bus->part == bus->chain->parts->parts[i])
+ break;
+ urj_log (ll, _("%s (JTAG part No. %d)\n"), bus->driver->description, i);
+}
+
+/**
+ * bus->driver->(*init)
+ *
+ */
+static int
+pxa2xx_bus_init (urj_bus_t *bus)
+{
+ urj_chain_t *chain = bus->chain;
+ urj_part_t *p = bus->part;
+
+ if (urj_tap_state (chain) != URJ_TAP_STATE_RUN_TEST_IDLE)
+ {
+ /* silently skip initialization if TAP isn't in RUNTEST/IDLE state
+ this is required to avoid interfering with detect when initbus
+ is contained in the part description file
+ URJ_BUS_INIT() will be called latest by URJ_BUS_PREPARE() */
+ return URJ_STATUS_OK;
+ }
+
+ urj_part_set_instruction (p, "SAMPLE/PRELOAD");
+ urj_tap_chain_shift_instructions (chain);
+ urj_tap_chain_shift_data_registers (chain, 1);
+
+ if (PROC == PROC_PXA25x)
+ {
+ const urj_part_signal_t *bs_2 = urj_part_find_signal (p, "BOOT_SEL[2]");
+ const urj_part_signal_t *bs_1 = urj_part_find_signal (p, "BOOT_SEL[1]");
+ const urj_part_signal_t *bs_0 = urj_part_find_signal (p, "BOOT_SEL[0]");
+
+ BOOT_DEF = BOOT_DEF_PKG_TYPE |
+ BOOT_DEF_BOOT_SEL (urj_part_get_signal (p, bs_2) << 2
+ | urj_part_get_signal (p, bs_1) << 1
+ | urj_part_get_signal (p, bs_0));
+ }
+ else if (PROC == PROC_PXA27x)
+ {
+ const urj_part_signal_t *bs = urj_part_find_signal (p, "BOOT_SEL");
+
+ BOOT_DEF = BOOT_DEF_PKG_TYPE |
+ BOOT_DEF_BOOT_SEL (urj_part_get_signal (p, bs));
+ }
+ else
+ {
+ urj_error_set (URJ_ERROR_INVALID, "processor type %d", PROC);
+ return URJ_STATUS_FAIL;
+ }
+
+ urj_part_set_instruction (p, "BYPASS");
+ urj_tap_chain_shift_instructions (chain);
+
+ bus->initialized = 1;
+
+ return URJ_STATUS_OK;
+}
+
+/**
+ * bus->driver->(*area)
+ *
+ */
+static int
+pxa2xx_bus_area (urj_bus_t *bus, uint32_t adr, urj_bus_area_t *area)
+{
+ uint32_t tmp_addr;
+ int ncs_index;
+
+ /* Static Chip Select 0 (64 MB) */
+ if (adr < UINT32_C (0x04000000))
+ {
+ area->description = N_("Static Chip Select 0");
+ area->start = UINT32_C (0x00000000);
+ area->length = UINT64_C (0x04000000);
+
+ if (pxa25x_ncs_map[0].bus_width > 0)
+ {
+ area->width = pxa25x_ncs_map[0].bus_width;
+ }
+ else
+ {
+ /* see Table 6-36. in [1] */
+ switch (get_BOOT_DEF_BOOT_SEL (BOOT_DEF))
+ {
+ case 0:
+ area->width = 32;
+ break;
+ case 1:
+ area->width = 16;
+ break;
+ case 2:
+ case 3:
+ area->width = 0;
+ break;
+ case 4:
+ case 5:
+ case 6:
+ case 7:
+ urj_error_set (URJ_ERROR_UNIMPLEMENTED, "TODO - BOOT_SEL: %lu",
+ (long unsigned) get_BOOT_DEF_BOOT_SEL (BOOT_DEF));
+ return URJ_STATUS_FAIL;
+ default:
+ urj_error_set (URJ_ERROR_INVALID, "BOOT_DEF value %lu",
+ (long unsigned) get_BOOT_DEF_BOOT_SEL (BOOT_DEF));
+ return URJ_STATUS_FAIL;
+ }
+ }
+ return URJ_STATUS_OK;
+ }
+
+ /* Static Chip Select 1..5 (per 64 MB) */
+ for (ncs_index = 1, tmp_addr = 0x04000000; ncs_index <= 5;
+ ncs_index++, tmp_addr += 0x04000000)
+ {
+ if ((adr >= tmp_addr) && (adr < tmp_addr + 0x04000000))
+ { // if the addr is within our window
+ sprintf (pxa25x_ncs_map[ncs_index].label_buf,
+ "Static Chip Select %d = %s %s", ncs_index,
+ pxa25x_ncs_map[ncs_index].sig_name,
+ pxa25x_ncs_map[ncs_index].enabled ? "" : "(disabled)");
+ area->description = pxa25x_ncs_map[ncs_index].label_buf;
+ area->start = tmp_addr;
+ area->length = UINT64_C (0x04000000);
+ area->width = pxa25x_ncs_map[ncs_index].bus_width;
+
+ return URJ_STATUS_OK;
+ }
+ }
+
+ if (adr < UINT32_C (0x48000000))
+ {
+ area->description = NULL;
+ area->start = UINT32_C (0x18000000);
+ area->length = UINT64_C (0x30000000);
+ area->width = 0;
+
+ return URJ_STATUS_OK;
+ }
+
+ if (adr < UINT32_C (0x4C000000))
+ {
+ area->description = N_("Memory Mapped registers (Memory Ctl)");
+ area->start = UINT32_C (0x48000000);
+ area->length = UINT64_C (0x04000000);
+ area->width = 32;
+
+ return URJ_STATUS_OK;
+ }
+
+ area->description = NULL;
+ area->start = UINT32_C (0x4C000000);
+ area->length = UINT64_C (0xB4000000);
+ area->width = 0;
+
+ return URJ_STATUS_OK;
+}
+
+/**
+ * bus->driver->(*area)
+ *
+ */
+static int
+pxa27x_bus_area (urj_bus_t *bus, uint32_t adr, urj_bus_area_t *area)
+{
+ uint32_t tmp_addr;
+ int ncs_index;
+
+ /* Static Chip Select 0 (64 MB) */
+ if (adr < UINT32_C (0x04000000))
+ {
+ area->description = N_("Static Chip Select 0");
+ area->start = UINT32_C (0x00000000);
+ area->length = UINT64_C (0x04000000);
+
+ if (pxa27x_ncs_map[0].bus_width > 0)
+ {
+ area->width = pxa27x_ncs_map[0].bus_width;
+ }
+ else
+ {
+ /* see Table 6-36. in [1] */
+ switch (get_BOOT_DEF_BOOT_SEL (BOOT_DEF))
+ {
+ case 0:
+ area->width = 32;
+ break;
+ case 1:
+ area->width = 16;
+ break;
+ case 2:
+ case 3:
+ area->width = 0;
+ break;
+ case 4:
+ case 5:
+ case 6:
+ case 7:
+ urj_error_set (URJ_ERROR_UNIMPLEMENTED, "TODO - BOOT_SEL: %lu",
+ (long unsigned) get_BOOT_DEF_BOOT_SEL (BOOT_DEF));
+ return URJ_STATUS_FAIL;
+ default:
+ urj_error_set (URJ_ERROR_INVALID, "BOOT_SEL: %lu",
+ (long unsigned) get_BOOT_DEF_BOOT_SEL (BOOT_DEF));
+ return URJ_STATUS_FAIL;
+ }
+ }
+ return URJ_STATUS_OK;
+ }
+
+ /* Static Chip Select 1..5 (per 64 MB) */
+ for (ncs_index = 1, tmp_addr = 0x04000000; ncs_index <= 5;
+ ncs_index++, tmp_addr += 0x04000000)
+ {
+ urj_log (URJ_LOG_LEVEL_DEBUG, "Checking area %08lX - %08lX... ",
+ (unsigned long)tmp_addr,
+ (unsigned long)tmp_addr + 0x04000000 - 1);
+ if ((adr >= tmp_addr) && (adr < tmp_addr + 0x04000000))
+ { // if the addr is within our window
+ urj_log (URJ_LOG_LEVEL_DEBUG, "match\n");
+ sprintf (pxa27x_ncs_map[ncs_index].label_buf,
+ "Static Chip Select %d = %s %s", ncs_index,
+ pxa27x_ncs_map[ncs_index].sig_name,
+ pxa27x_ncs_map[ncs_index].enabled ? "" : "(disabled)");
+ area->description = pxa27x_ncs_map[ncs_index].label_buf;
+ area->start = tmp_addr;
+ area->length = UINT64_C (0x04000000);
+ area->width = pxa27x_ncs_map[ncs_index].bus_width;
+
+ return URJ_STATUS_OK;
+ }
+ urj_log (URJ_LOG_LEVEL_DEBUG, "no match\n");
+ }
+
+ if (adr < UINT32_C (0x40000000))
+ {
+ area->description = NULL;
+ area->start = UINT32_C (0x18000000);
+ area->length = UINT64_C (0x28000000);
+ area->width = 0;
+
+ return URJ_STATUS_OK;
+ }
+
+ if (adr < UINT32_C (0x60000000))
+ {
+ area->description = N_("PXA270 internal address space (cfg, SRAM)");
+ area->start = UINT32_C (0x40000000);
+ area->length = UINT64_C (0x20000000);
+ area->width = 32;
+
+ return URJ_STATUS_OK;
+ }
+
+ if (adr < UINT32_C (0xA0000000))
+ {
+ area->description = NULL;
+ area->start = UINT32_C (0x60000000);
+ area->length = UINT64_C (0x40000000);
+ area->width = 0;
+
+ return URJ_STATUS_OK;
+ }
+
+ if (adr < UINT32_C (0xB0000000))
+ {
+ area->description = N_("PXA270 SDRAM space (4x 64MB)");
+ area->start = UINT32_C (0xA0000000);
+ area->length = UINT64_C (0x10000000);
+ area->width = 32;
+
+ return URJ_STATUS_OK;
+ }
+
+ area->description = NULL;
+ area->start = UINT32_C (0xB0000000);
+ area->length = UINT64_C (0x50000000);
+ area->width = 0;
+
+ return URJ_STATUS_OK;
+}
+
+static void
+setup_address (urj_bus_t *bus, uint32_t a)
+{
+ int i;
+ urj_part_t *p = bus->part;
+
+ for (i = 0; i < 26; i++)
+ urj_part_set_signal (p, MA[i], 1, (a >> i) & 1);
+}
+
+static void
+set_data_in (urj_bus_t *bus, uint32_t adr)
+{
+ int i;
+ urj_part_t *p = bus->part;
+ urj_bus_area_t area;
+
+ bus->driver->area (bus, adr, &area);
+
+ for (i = 0; i < area.width; i++)
+ urj_part_set_signal (p, MD[i], 0, 0);
+}
+
+static void
+setup_data (urj_bus_t *bus, uint32_t adr, uint32_t d)
+{
+ int i;
+ urj_part_t *p = bus->part;
+ urj_bus_area_t area;
+
+ bus->driver->area (bus, adr, &area);
+
+ for (i = 0; i < area.width; i++)
+ urj_part_set_signal (p, MD[i], 1, (d >> i) & 1);
+}
+
+/**
+ * bus->driver->(*read_start)
+ *
+ */
+static int
+pxa2xx_bus_read_start (urj_bus_t *bus, uint32_t adr)
+{
+ int cs_index = 0;
+
+ urj_chain_t *chain = bus->chain;
+ urj_part_t *p = bus->part;
+
+ LAST_ADR = adr;
+ if (adr >= 0x18000000)
+ {
+ urj_error_set (URJ_ERROR_OUT_OF_BOUNDS, "adr 0x%lx",
+ (long unsigned) adr);
+ return URJ_STATUS_FAIL;
+ }
+
+ cs_index = adr >> 26;
+ if (nCS[cs_index] == NULL)
+ {
+ urj_error_set (URJ_ERROR_OUT_OF_BOUNDS, "nCS[%d] null", cs_index);
+ return URJ_STATUS_FAIL;
+ }
+
+ /* see Figure 6-13 in [1] */
+ urj_part_set_signal (p, nCS[cs_index], 1, 0);
+ urj_part_set_signal (p, DQM[0], 1, 0);
+ urj_part_set_signal (p, DQM[1], 1, 0);
+ urj_part_set_signal (p, DQM[2], 1, 0);
+ urj_part_set_signal (p, DQM[3], 1, 0);
+ urj_part_set_signal (p, RDnWR, 1, 1);
+ urj_part_set_signal (p, nWE, 1, 1);
+ urj_part_set_signal (p, nOE, 1, 0);
+ urj_part_set_signal (p, nSDCAS, 1, 0);
+
+ setup_address (bus, adr);
+ set_data_in (bus, adr);
+
+ urj_tap_chain_shift_data_registers (chain, 0);
+
+ return URJ_STATUS_OK;
+}
+
+/**
+ * bus->driver->(*read_next)
+ *
+ */
+static uint32_t
+pxa2xx_bus_read_next (urj_bus_t *bus, uint32_t adr)
+{
+ urj_part_t *p = bus->part;
+ urj_chain_t *chain = bus->chain;
+ uint32_t d;
+ uint32_t old_last_adr = LAST_ADR;
+
+ LAST_ADR = adr;
+
+ if (adr < UINT32_C (0x18000000))
+ {
+ int i;
+ urj_bus_area_t area;
+
+ if (nCS[adr >> 26] == NULL) // avoid undefined nCS windows
+ return 0;
+
+ bus->driver->area (bus, adr, &area);
+
+ /* see Figure 6-13 in [1] */
+ setup_address (bus, adr);
+ urj_tap_chain_shift_data_registers (chain, 1);
+
+ d = 0;
+ for (i = 0; i < area.width; i++)
+ d |= (uint32_t) (urj_part_get_signal (p, MD[i]) << i);
+
+ return d;
+ }
+
+ // anything above 0x18000000 is essentially unreachable...
+ if (adr < UINT32_C (0x48000000))
+ return 0;
+
+ if (adr < UINT32_C (0x4C000000))
+ {
+ if (old_last_adr == (MC_BASE + BOOT_DEF_OFFSET))
+ return BOOT_DEF;
+
+ return 0;
+ }
+
+ return 0;
+}
+
+/**
+ * bus->driver->(*read_end)
+ *
+ */
+static uint32_t
+pxa2xx_bus_read_end (urj_bus_t *bus)
+{
+ urj_part_t *p = bus->part;
+ urj_chain_t *chain = bus->chain;
+
+ if (LAST_ADR < UINT32_C (0x18000000))
+ {
+ int i;
+ uint32_t d = 0;
+ urj_bus_area_t area;
+
+ if (nCS[LAST_ADR >> 26] == NULL) // avoid undefined nCS windows
+ return 0;
+
+ bus->driver->area (bus, LAST_ADR, &area);
+
+ /* see Figure 6-13 in [1] */
+ urj_part_set_signal (p, nCS[0], 1, 1);
+ urj_part_set_signal (p, nOE, 1, 1);
+ urj_part_set_signal (p, nSDCAS, 1, 1);
+
+ urj_tap_chain_shift_data_registers (chain, 1);
+
+ for (i = 0; i < area.width; i++)
+ d |= (uint32_t) (urj_part_get_signal (p, MD[i]) << i);
+
+ return d;
+ }
+
+ // anything above 0x18000000 is essentially unreachable...
+ if (LAST_ADR < UINT32_C (0x48000000))
+ return 0;
+
+ if (LAST_ADR < UINT32_C (0x4C000000))
+ {
+ if (LAST_ADR == (MC_BASE + BOOT_DEF_OFFSET))
+ return BOOT_DEF;
+
+ return 0;
+ }
+
+ return 0;
+}
+
+/**
+ * bus->driver->(*write)
+ *
+ */
+static void
+pxa2xx_bus_write (urj_bus_t *bus, uint32_t adr, uint32_t data)
+{
+ int cs_index = 0;
+
+ /* see Figure 6-17 in [1] */
+ urj_part_t *p = bus->part;
+ urj_chain_t *chain = bus->chain;
+
+ if (adr >= 0x18000000)
+ return;
+
+ cs_index = adr >> 26;
+ if (nCS[cs_index] == NULL)
+ return;
+
+ urj_part_set_signal (p, nCS[cs_index], 1, 0);
+ urj_part_set_signal (p, DQM[0], 1, 0);
+ urj_part_set_signal (p, DQM[1], 1, 0);
+ urj_part_set_signal (p, DQM[2], 1, 0);
+ urj_part_set_signal (p, DQM[3], 1, 0);
+ urj_part_set_signal (p, RDnWR, 1, 0);
+ urj_part_set_signal (p, nWE, 1, 1);
+ urj_part_set_signal (p, nOE, 1, 1);
+ urj_part_set_signal (p, nSDCAS, 1, 0);
+
+ setup_address (bus, adr);
+ setup_data (bus, adr, data);
+
+ urj_tap_chain_shift_data_registers (chain, 0);
+
+ urj_part_set_signal (p, nWE, 1, 0);
+ urj_tap_chain_shift_data_registers (chain, 0);
+ urj_part_set_signal (p, nWE, 1, 1);
+ urj_tap_chain_shift_data_registers (chain, 0);
+}
+
+const urj_bus_driver_t urj_bus_pxa2x0_bus = {
+ "pxa2x0",
+ N_("Intel PXA2x0 compatible bus driver via BSR"),
+ pxa2xx_bus_new,
+ urj_bus_generic_free,
+ pxa2xx_bus_printinfo,
+ urj_bus_generic_prepare_extest,
+ pxa2xx_bus_area,
+ pxa2xx_bus_read_start,
+ pxa2xx_bus_read_next,
+ pxa2xx_bus_read_end,
+ urj_bus_generic_read,
+ pxa2xx_bus_write,
+ pxa2xx_bus_init
+};
+
+const urj_bus_driver_t urj_bus_pxa27x_bus = {
+ "pxa27x",
+ N_("Intel PXA27x compatible bus driver via BSR"),
+ pxa2xx_bus_new,
+ urj_bus_generic_free,
+ pxa2xx_bus_printinfo,
+ urj_bus_generic_prepare_extest,
+ pxa27x_bus_area,
+ pxa2xx_bus_read_start,
+ pxa2xx_bus_read_next,
+ pxa2xx_bus_read_end,
+ urj_bus_generic_read,
+ pxa2xx_bus_write,
+ pxa2xx_bus_init
+};
--- /dev/null
+/*
+ * $Id$
+ *
+ * XScale PXA26x/PXA255/PXA250/PXA210 Memory Controller Registers
+ * Copyright (C) 2002, 2003 ETC s.r.o.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the ETC s.r.o. nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2002, 2003.
+ *
+ * Documentation:
+ * [1] Intel Corporation, "Intel PXA250 and PXA210 Application Processors
+ * Developer's Manual", February 2002, Order Number: 278522-001
+ * [2] Intel Corporation, "Intel PXA250 and PXA210 Application Processors
+ * Specification Update", February 2003, Order Number: 278534-012
+ * [3] Intel Corporation, "Intel PXA26x Processor Family Developer's Manual",
+ * March 2003, Order Number: 278638-002
+ * [4] Intel Corporation, "Intel PXA255 Processor Developer's Manual"
+ * March 2003, Order Number: 278693-001
+ *
+ */
+
+#ifndef PXA2X0_MC_H
+#define PXA2X0_MC_H
+
+#include <urjtag/bitmask.h>
+
+#ifndef __ASSEMBLY__
+#include <stdint.h>
+#endif
+
+#if defined(PXA2X0_NOPXA250) && !defined(PXA2X0_NOPXA255)
+#define PXA2X0_NOPXA255
+#endif
+
+#if defined(PXA2X0_NOPXA255) && !defined(PXA2X0_NOPXA260)
+#define PXA2X0_NOPXA260
+#endif
+
+/* Memory Controller Registers */
+
+#define MC_BASE 0x48000000
+
+#ifndef __ASSEMBLY__
+typedef volatile struct MC_registers
+{
+ uint32_t mdcnfg;
+ uint32_t mdrefr;
+ uint32_t msc0;
+ uint32_t msc1;
+ uint32_t msc2;
+ uint32_t mecr;
+ uint32_t __reserved1;
+ uint32_t sxcnfg;
+ uint32_t __reserved2;
+ uint32_t sxmrs;
+ uint32_t mcmem0;
+ uint32_t mcmem1;
+ uint32_t mcatt0;
+ uint32_t mcatt1;
+ uint32_t mcio0;
+ uint32_t mcio1;
+ uint32_t mdmrs;
+ uint32_t boot_def;
+#if !defined(PXA2X0_NOPXA255)
+ uint32_t __reserved3[4];
+ uint32_t mdmrslp;
+#endif /* PXA255 and above only */
+#if !defined(PXA2X0_NOPXA260)
+ uint32_t __reserved4[2];
+ uint32_t sa1111cr;
+#endif /* PXA260 and above only */
+} MC_registers_t;
+
+#ifdef PXA2X0_UNMAPPED
+#define MC_pointer ((MC_registers_t*) MC_BASE)
+#endif
+
+#define MDCNFG MC_pointer->mdcnfg
+#define MDREFR MC_pointer->mdrefr
+#define MSC0 MC_pointer->msc0
+#define MSC1 MC_pointer->msc1
+#define MSC2 MC_pointer->msc2
+#define MECR MC_pointer->mecr
+#define SXCNFG MC_pointer->sxcnfg
+#define SXMRS MC_pointer->sxmrs
+#define MCMEM0 MC_pointer->mcmem0
+#define MCMEM1 MC_pointer->mcmem1
+#define MCATT0 MC_pointer->mcatt0
+#define MCATT1 MC_pointer->mcatt1
+#define MCIO0 MC_pointer->mcio0
+#define MCIO1 MC_pointer->mcio1
+#define MDMRS MC_pointer->mdmrs
+#define BOOT_DEF MC_pointer->boot_def
+#if !defined(PXA2X0_NOPXA255)
+#define MDMRSLP MC_pointer->mdmrslp
+#endif /* PXA255 and above only */
+#if !defined(PXA2X0_NOPXA260)
+#define SA1111CR MC_pointer->sa1111cr
+#endif /* PXA260 and above only */
+#endif /* __ASSEMBLY__ */
+
+#define MDCNFG_OFFSET 0x00
+#define MDREFR_OFFSET 0x04
+#define MSC0_OFFSET 0x08
+#define MSC1_OFFSET 0x0C
+#define MSC2_OFFSET 0x10
+#define MECR_OFFSET 0x14
+#define SXCNFG_OFFSET 0x1C
+#define SXMRS_OFFSET 0x24
+#define MCMEM0_OFFSET 0x28
+#define MCMEM1_OFFSET 0x2C
+#define MCATT0_OFFSET 0x30
+#define MCATT1_OFFSET 0x34
+#define MCIO0_OFFSET 0x38
+#define MCIO1_OFFSET 0x3C
+#define MDMRS_OFFSET 0x40
+#define BOOT_DEF_OFFSET 0x44
+#if !defined(PXA2X0_NOPXA255)
+#define MDMRSLP_OFFSET 0x58
+#endif /* PXA255 and above only */
+#if !defined(PXA2X0_NOPXA260)
+#define SA1111CR_OFFSET 0x64
+#endif /* PXA260 and above only */
+
+/* MDCNFG bits - see Table 6-3 in [1] and D25 in [2], Table 6-3 in [3], Table 6-2 in [4] */
+
+#define MDCNFG_DSA1111_2 URJ_BIT (28)
+#define MDCNFG_DLATCH2 URJ_BIT (27)
+#define MDCNFG_DTC2_MASK URJ_BITS (25,24)
+#define MDCNFG_DTC2(x) URJ_BITS_VAL (25,24,x)
+#define get_MDCNFG_DTC2(x) URJ_BITS_GET (25,24,x)
+#define MDCNFG_DNB2 URJ_BIT (23)
+#define MDCNFG_DRAC2_MASK URJ_BITS (22,21)
+#define MDCNFG_DRAC2(x) URJ_BITS_VAL (22,21,x)
+#define get_MDCNFG_DRAC2(x) URJ_BITS_GET (22,21,x)
+#define MDCNFG_DCAC2_MASK URJ_BITS (20,19)
+#define MDCNFG_DCAC2(x) URJ_BITS_VAL (20,19,x)
+#define get_MDCNFG_DCAC2(x) URJ_BITS_GET (20,19,x)
+#define MDCNFG_DWID2 URJ_BIT (18)
+#define MDCNFG_DE3 URJ_BIT (17)
+#define MDCNFG_DE2 URJ_BIT (16)
+#define MDCNFG_DSA1111_0 URJ_BIT (12)
+#define MDCNFG_DLATCH0 URJ_BIT (11)
+#define MDCNFG_DTC0_MASK URJ_BITS (9,8)
+#define MDCNFG_DTC0(x) URJ_BITS_VAL (9,8,x)
+#define get_MDCNFG_DTC0(x) URJ_BITS_GET (9,8,x)
+#define MDCNFG_DNB0 URJ_BIT (7)
+#define MDCNFG_DRAC0_MASK URJ_BITS (6,5)
+#define MDCNFG_DRAC0(x) URJ_BITS_VAL (6,5,x)
+#define get_MDCNFG_DRAC0(x) URJ_BITS_GET (6,5,x)
+#define MDCNFG_DCAC0_MASK URJ_BITS (4,3)
+#define MDCNFG_DCAC0(x) URJ_BITS_VAL (4,3,x)
+#define get_MDCNFG_DCAC0(x) URJ_BITS_GET (4,3,x)
+#define MDCNFG_DWID0 URJ_BIT (2)
+#define MDCNFG_DE1 URJ_BIT (1)
+#define MDCNFG_DE0 URJ_BIT (0)
+
+/* MDREFR bits - see Table 6-5 in [1], Table 6-6 in [3], Table 6-5 in [4] */
+
+#define MDREFR_K2FREE URJ_BIT (25)
+#define MDREFR_K1FREE URJ_BIT (24)
+#define MDREFR_K0FREE URJ_BIT (23)
+#define MDREFR_SLFRSH URJ_BIT (22)
+#define MDREFR_APD URJ_BIT (20)
+#define MDREFR_K2DB2 URJ_BIT (19)
+#define MDREFR_K2RUN URJ_BIT (18)
+#define MDREFR_K1DB2 URJ_BIT (17)
+#define MDREFR_K1RUN URJ_BIT (16)
+#define MDREFR_E1PIN URJ_BIT (15)
+#define MDREFR_K0DB2 URJ_BIT (14)
+#define MDREFR_K0RUN URJ_BIT (13)
+#define MDREFR_E0PIN URJ_BIT (12)
+#define MDREFR_DRI_MASK URJ_BITS (11,0)
+#define MDREFR_DRI(x) URJ_BITS_VAL (11,0,x)
+#define get_MDREFR_DRI(x) URJ_BITS_GET (11,0,x)
+
+/* MSC0 bits - see Table 6-21 in [1], Table 6-25 in [3], Table 6-21 in [4] */
+
+#define MSC0_RBUFF1 URJ_BIT (31)
+#define MSC0_RRR1_MASK URJ_BITS (30,28)
+#define MSC0_RRR1(x) URJ_BITS_VAL (30,28,x)
+#define get_MSC0_RRR1(x) URJ_BITS_GET (30,28,x)
+#define MSC0_RDN1_MASK URJ_BITS (27,24)
+#define MSC0_RDN1(x) URJ_BITS_VAL (27,24,x)
+#define get_MSC0_RDN1(x) URJ_BITS_GET (27,24,x)
+#define MSC0_RDF1_MASK URJ_BITS (23,20)
+#define MSC0_RDF1(x) URJ_BITS_VAL (23,20,x)
+#define get_MSC0_RDF1(x) URJ_BITS_GET (23,20,x)
+#define MSC0_RBW1 URJ_BIT (19)
+#define MSC0_RT1_MASK URJ_BITS (18,16)
+#define MSC0_RT1(x) URJ_BITS_VAL (18,16,x)
+#define get_MSC0_RT1(x) URJ_BITS_GET (18,16,x)
+#define MSC0_RBUFF0 URJ_BIT (15)
+#define MSC0_RRR0_MASK URJ_BITS (14,12)
+#define MSC0_RRR0(x) URJ_BITS_VAL (14,12,x)
+#define get_MSC0_RRR0(x) URJ_BITS_GET (14,12,x)
+#define MSC0_RDN0_MASK URJ_BITS (11,9)
+#define MSC0_RDN0(x) URJ_BITS_VAL (11,8,x)
+#define get_MSC0_RDN0(x) URJ_BITS_GET (11,8,x)
+#define MSC0_RDF0_MASK URJ_BITS (7,4)
+#define MSC0_RDF0(x) URJ_BITS_VAL (7,4,x)
+#define get_MSC0_RDF0(x) URJ_BITS_GET (7,4,x)
+#define MSC0_RBW0 URJ_BIT (3)
+#define MSC0_RT0_MASK URJ_BITS (2,0)
+#define MSC0_RT0(x) URJ_BITS_VAL (2,0,x)
+#define get_MSC0_RT0(x) URJ_BITS_GET (2,0,x)
+
+/* MSC1 bits - see Table 6-21 in [1], Table 6-25 in [3], Table 6-21 in [4] */
+
+#define MSC1_RBUFF3 URJ_BIT (31)
+#define MSC1_RRR3_MASK URJ_BITS (30,28)
+#define MSC1_RRR3(x) URJ_BITS_VAL (30,28,x)
+#define get_MSC1_RRR3(x) URJ_BITS_GET (30,28,x)
+#define MSC1_RDN3_MASK URJ_BITS (27,24)
+#define MSC1_RDN3(x) URJ_BITS_VAL (27,24,x)
+#define get_MSC1_RDN3(x) URJ_BITS_GET (27,24,x)
+#define MSC1_RDF3_MASK URJ_BITS (23,20)
+#define MSC1_RDF3(x) URJ_BITS_VAL (23,20,x)
+#define get_MSC1_RDF3(x) URJ_BITS_GET (23,20,x)
+#define MSC1_RBW3 URJ_BIT (19)
+#define MSC1_RT3_MASK URJ_BITS (18,16)
+#define MSC1_RT3(x) URJ_BITS_VAL (18,16,x)
+#define get_MSC1_RT3(x) URJ_BITS_GET (18,16,x)
+#define MSC1_RBUFF2 URJ_BIT (15)
+#define MSC1_RRR2_MASK URJ_BITS (14,12)
+#define MSC1_RRR2(x) URJ_BITS_VAL (14,12,x)
+#define get_MSC1_RRR2(x) URJ_BITS_GET (14,12,x)
+#define MSC1_RDN2_MASK URJ_BITS (11,9)
+#define MSC1_RDN2(x) URJ_BITS_VAL (11,8,x)
+#define get_MSC1_RDN2(x) URJ_BITS_GET (11,8,x)
+#define MSC1_RDF2_MASK URJ_BITS (7,4)
+#define MSC1_RDF2(x) URJ_BITS_VAL (7,4,x)
+#define get_MSC1_RDF2(x) URJ_BITS_GET (7,4,x)
+#define MSC1_RBW2 URJ_BIT (3)
+#define MSC1_RT2_MASK URJ_BITS (2,0)
+#define MSC1_RT2(x) URJ_BITS_VAL (2,0,x)
+#define get_MSC1_RT2(x) URJ_BITS_GET (2,0,x)
+
+/* MSC2 bits - see Table 6-21 in [1], Table 6-25 in [3], Table 6-21 in [4] */
+
+#define MSC2_RBUFF5 URJ_BIT (31)
+#define MSC2_RRR5_MASK URJ_BITS (30,28)
+#define MSC2_RRR5(x) URJ_BITS_VAL (30,28,x)
+#define get_MSC2_RRR5(x) URJ_BITS_GET (30,28,x)
+#define MSC2_RDN5_MASK URJ_BITS (27,24)
+#define MSC2_RDN5(x) URJ_BITS_VAL (27,24,x)
+#define get_MSC2_RDN5(x) URJ_BITS_GET (27,24,x)
+#define MSC2_RDF5_MASK URJ_BITS (23,20)
+#define MSC2_RDF5(x) URJ_BITS_VAL (23,20,x)
+#define get_MSC2_RDF5(x) URJ_BITS_GET (23,20,x)
+#define MSC2_RBW5 URJ_BIT (19)
+#define MSC2_RT5_MASK URJ_BITS (18,16)
+#define MSC2_RT5(x) URJ_BITS_VAL (18,16,x)
+#define get_MSC2_RT5(x) URJ_BITS_GET (18,16,x)
+#define MSC2_RBUFF4 URJ_BIT (15)
+#define MSC2_RRR4_MASK URJ_BITS (14,12)
+#define MSC2_RRR4(x) URJ_BITS_VAL (14,12,x)
+#define get_MSC2_RRR4(x) URJ_BITS_GET (14,12,x)
+#define MSC2_RDN4_MASK URJ_BITS (11,9)
+#define MSC2_RDN4(x) URJ_BITS_VAL (11,8,x)
+#define get_MSC2_RDN4(x) URJ_BITS_GET (11,8,x)
+#define MSC2_RDF4_MASK URJ_BITS (7,4)
+#define MSC2_RDF4(x) URJ_BITS_VAL (7,4,x)
+#define get_MSC2_RDF4(x) URJ_BITS_GET (7,4,x)
+#define MSC2_RBW4 URJ_BIT (3)
+#define MSC2_RT4_MASK URJ_BITS (2,0)
+#define MSC2_RT4(x) URJ_BITS_VAL (2,0,x)
+#define get_MSC2_RT4(x) URJ_BITS_GET (2,0,x)
+
+/* MECR bits - see Table 6-27 in [1], Table 6-31 in [3], Table 6-27 in [4] */
+
+#define MECR_CIT URJ_BIT (1)
+#define MECR_NOS URJ_BIT (0)
+
+/* SXCNFG bits - see Table 6-13 in [1], Table 6-14 in [3], Table 6-13 in [4] */
+
+#define SXCNFG_SXLATCH2 URJ_BIT (30)
+#define SXCNFG_SXTP2_MASK URJ_BITS (29,28)
+#define SXCNFG_SXTP2(x) URJ_BITS_VAL (29,28,x)
+#define get_SXCNFG_SXTP2(x) URJ_BITS_GET (29,28,x)
+#define SXCNFG_SXCA2_MASK URJ_BITS (27,26)
+#define SXCNFG_SXCA2(x) URJ_BITS_VAL (27,26,x)
+#define get_SXCNFG_SXCA2(x) URJ_BITS_GET (27,26,x)
+#define SXCNFG_SXRA2_MASK URJ_BITS (25,24)
+#define SXCNFG_SXRA2(x) URJ_BITS_VAL (25,24,x)
+#define get_SXCNFG_SXRA2(x) URJ_BITS_GET (25,24,x)
+#define SXCNFG_SXRL2_MASK URJ_BITS (23,21)
+#define SXCNFG_SXRL2(x) URJ_BITS (23,21,x)
+#define SXCNFG_SXCL2_MASK URJ_BITS (20,18)
+#define SXCNFG_SXCL2(x) URJ_BITS_VAL (20,18,x)
+#define get_SXCNFG_SXCL2(x) URJ_BITS_GET (20,18,x)
+#define SXCNFG_SXEN2_MASK URJ_BITS (17,16)
+#define SXCNFG_SXEN2(x) URJ_BITS_VAL (17,16,x)
+#define get_SXCNFG_SXEN2(x) URJ_BITS_GET (17,16,x)
+#define SXCNFG_SXLATCH0 URJ_BIT (14)
+#define SXCNFG_SXTP0_MASK URJ_BITS (13,12)
+#define SXCNFG_SXTP0(x) URJ_BITS_VAL (13,12,x)
+#define get_SXCNFG_SXTP0(x) URJ_BITS_GET (13,12,x)
+#define SXCNFG_SXCA0_MASK URJ_BITS (11,10)
+#define SXCNFG_SXCA0(x) URJ_BITS_VAL (11,10,x)
+#define get_SXCNFG_SXCA0(x) URJ_BITS_GET (11,10,x)
+#define SXCNFG_SXRA0_MASK URJ_BITS (9,8)
+#define SXCNFG_SXRA0(x) URJ_BITS_VAL (9,8,x)
+#define get_SXCNFG_SXRA0(x) URJ_BITS_GET (9,8,x)
+#define SXCNFG_SXRL0_MASK URJ_BITS (7,5)
+#define SXCNFG_SXRL0(x) URJ_BITS (7,5,x)
+#define SXCNFG_SXCL0_MASK URJ_BITS (4,2)
+#define SXCNFG_SXCL0(x) URJ_BITS_VAL (4,2,x)
+#define get_SXCNFG_SXCL0(x) URJ_BITS_GET (4,2,x)
+#define SXCNFG_SXEN0_MASK URJ_BITS (1,0)
+#define SXCNFG_SXEN0(x) URJ_BITS_VAL (1,0,x)
+#define get_SXCNFG_SXEN0(x) URJ_BITS_GET (1,0,x)
+
+/* SXMRS bits - see Table 6-16 in [1], Table 6-17 in [3], Table 6-16 in [4] */
+
+#define SXMRS_SXMRS2_MASK URJ_BITS (30,16)
+#define SXMRS_SXMRS2(x) URJ_BITS_VAL (30,16,x)
+#define get_SXMRS_SXMRS2(x) URJ_BITS_GET (30,16,x)
+#define SXMRS_SXMRS0_MASK URJ_BITS (14,0)
+#define SXMRS_SXMRS0(x) URJ_BITS_VAL (14,0,x)
+#define get_SXMRS_SXMRS0(x) URJ_BITS_GET (14,0,x)
+
+/* MCMEMx bits - see Table 6-23 in [1], Table 6-27 in [3], Table 6-23 in [4] */
+
+#define MCMEM_HOLD_MASK URJ_BITS (19,14)
+#define MCMEM_HOLD(x) URJ_BITS_VAL (19,14,x)
+#define get_MCMEM_HOLD(x) URJ_BITS_GET (19,14,x)
+#define MCMEM_ASST_MASK URJ_BITS (11,7)
+#define MCMEM_ASST(x) URJ_BITS_VAL (11,7,x)
+#define get_MCMEM_ASST(x) URJ_BITS_GET (11,7,x)
+#define MCMEM_SET_MASK URJ_BITS (6,0)
+#define MCMEM_SET(x) URJ_BITS_VAL (6,0,x)
+#define get_MCMEM_SET(x) URJ_BITS_GET (6,0,x)
+
+/* MCATTx bits - see Table 6-24 in [1], Table 6-28 in [3], Table 6-24 in [4] */
+
+#define MCATT_HOLD_MASK URJ_BITS (19,14)
+#define MCATT_HOLD(x) URJ_BITS_VAL (19,14,x)
+#define get_MCATT_HOLD(x) URJ_BITS_GET (19,14,x)
+#define MCATT_ASST_MASK URJ_BITS (11,7)
+#define MCATT_ASST(x) URJ_BITS_VAL (11,7,x)
+#define get_MCATT_ASST(x) URJ_BITS_GET (11,7,x)
+#define MCATT_SET_MASK URJ_BITS (6,0)
+#define MCATT_SET(x) URJ_BITS_VAL (6,0,x)
+#define get_MCATT_SET(x) URJ_BITS_GET (6,0,x)
+
+/* MCIOx bits - see Table 6-25 in [1], Table 6-29 in [3], Table 6-25 in [4] */
+
+#define MCIO_HOLD_MASK URJ_BITS (19,14)
+#define MCIO_HOLD(x) URJ_BITS_VAL (19,14,x)
+#define get_MCIO_HOLD(x) URJ_BITS_GET (19,14,x)
+#define MCIO_ASST_MASK URJ_BITS (11,7)
+#define MCIO_ASST(x) URJ_BITS_VAL (11,7,x)
+#define get_MCIO_ASST(x) URJ_BITS_GET (11,7,x)
+#define MCIO_SET_MASK URJ_BITS (6,0)
+#define MCIO_SET(x) URJ_BITS_VAL (6,0,x)
+#define get_MCIO_SET(x) URJ_BITS_GET (6,0,x)
+
+/* MDMRS bits - see Table 6-4 in [1], Table 6-4 in [3], Table 6-3 in [4] */
+
+#define MDMRS_MDMRS2_MASK URJ_BITS (30,23)
+#define MDMRS_MDMRS2(x) URJ_BITS_VAL (30,23,x)
+#define get_MDMRS_MDMRS2(x) URJ_BITS_GET (30,23,x)
+#define MDMRS_MDCL2_MASK URJ_BITS (22,20)
+#define MDMRS_MDCL2(x) URJ_BITS_VAL (22,20,x)
+#define get_MDMRS_MDCL2(x) URJ_BITS_GET (22,20,x)
+#define MDMRS_MDADD2 URJ_BIT (19)
+#define MDMRS_MDBL2_MASK URJ_BITS (18,16)
+#define MDMRS_MDBL2(x) URJ_BITS_VAL (18,16,x)
+#define get_MDMRS_MDBL2(x) URJ_BITS_GET (18,16,x)
+#define MDMRS_MDMRS0_MASK URJ_BITS (14,7)
+#define MDMRS_MDMRS0(x) URJ_BITS_VAL (14,7,x)
+#define get_MDMRS_MDMRS0(x) URJ_BITS_GET (14,7,x)
+#define MDMRS_MDCL0_MASK URJ_BITS (6,4)
+#define MDMRS_MDCL0(x) URJ_BITS_VAL (6,4,x)
+#define get_MDMRS_MDCL0(x) URJ_BITS_GET (6,4,x)
+#define MDMRS_MDADD0 URJ_BIT (3)
+#define MDMRS_MDBL0_MASK URJ_BITS (2,0)
+#define MDMRS_MDBL0(x) URJ_BITS_VAL (2,0,x)
+#define get_MDMRS_MDBL0(x) URJ_BITS_GET (2,0,x)
+
+/* BOOT_DEF bits - see Table 6-37 in [1], Table 6-40 in [3], Table 6-37 in [4] */
+
+#define BOOT_DEF_PKG_TYPE URJ_BIT (3)
+#define BOOT_DEF_BOOT_SEL_MASK URJ_BITS (2,0)
+#define BOOT_DEF_BOOT_SEL(x) URJ_BITS_VAL (2,0,x)
+#define get_BOOT_DEF_BOOT_SEL(x) URJ_BITS_GET (2,0,x)
+
+#if !defined(PXA2X0_NOPXA255)
+/* MDMRSLP bits - see Table 6-5 in [3], Table 6-4 in [4] */
+
+#define MDMRSLP_MDLPEN2 URJ_BIT (31)
+#define MDMRSLP_MDMRSLP2_MASK URJ_BITS (30,16)
+#define MDMRSLP_MDMRSLP2(x) URJ_BITS_VAL (30,16,x)
+#define get_MDMRSLP_MDMRSLP2(x) URJ_BITS_GET (30,16,x)
+#define MDMRSLP_MDLPEN0 URJ_BIT (15)
+#define MDMRSLP_MDMRSLP0_MASK URJ_BITS (14,0)
+#define MDMRSLP_MDMRSLP0(x) URJ_BITS_VAL (14,0,x)
+#define get_MDMRSLP_MDMRSLP0(x) URJ_BITS_GET (14,0,x)
+#endif /* PXA255 and above only */
+
+#if !defined(PXA2X0_NOPXA260)
+/* SA1111CR bits - see Table 6-24 in [3] */
+
+#define SA1111CR_SA1111_5 URJ_BIT (5)
+#define SA1111CR_SA1111_4 URJ_BIT (4)
+#define SA1111CR_SA1111_3 URJ_BIT (3)
+#define SA1111CR_SA1111_2 URJ_BIT (2)
+#define SA1111CR_SA1111_1 URJ_BIT (1)
+#define SA1111CR_SA1111_0 URJ_BIT (0)
+#endif /* PXA260 and above only */
+
+#endif /* PXA2X0_MC_H */
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2002 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2002.
+ *
+ * Documentation:
+ * [1] JEDEC Solid State Technology Association, "Common Flash Interface (CFI)",
+ * September 1999, Order Number: JESD68
+ * [2] JEDEC Solid State Technology Association, "Common Flash Interface (CFI) ID Codes",
+ * September 2001, Order Number: JEP137-A
+ *
+ */
+
+#include <sysdep.h>
+
+#include <stdint.h>
+#include <string.h>
+
+#include <urjtag/log.h>
+#include <urjtag/error.h>
+#include <urjtag/bus.h>
+#include <urjtag/flash.h>
+#include <urjtag/jtag.h>
+
+int
+urj_bus_readmem (urj_bus_t *bus, FILE *f, uint32_t addr, uint32_t len)
+{
+ uint32_t step;
+ uint64_t a;
+ size_t bc = 0;
+#define BSIZE 4096
+ uint8_t b[BSIZE];
+ urj_bus_area_t area;
+ uint64_t end;
+
+ if (!bus)
+ {
+ urj_error_set (URJ_ERROR_NO_BUS_DRIVER, _("Missing bus driver"));
+ return URJ_STATUS_FAIL;
+ }
+
+ URJ_BUS_PREPARE (bus);
+
+ if (URJ_BUS_AREA (bus, addr, &area) != URJ_STATUS_OK)
+ return URJ_STATUS_FAIL;
+
+ step = area.width / 8;
+
+ if (step == 0)
+ {
+ urj_error_set (URJ_ERROR_INVALID, _("Unknown bus width"));
+ return URJ_STATUS_FAIL;
+ }
+ if (BSIZE % step != 0)
+ {
+ urj_error_set (URJ_ERROR_INVALID, "step %lu must divide BSIZE %d",
+ (long unsigned) step, BSIZE);
+ return URJ_STATUS_FAIL;
+ }
+
+ addr = addr & (~(step - 1));
+ len = (len + step - 1) & (~(step - 1));
+
+ urj_log (URJ_LOG_LEVEL_NORMAL, _("address: 0x%08lX\n"),
+ (long unsigned) addr);
+ urj_log (URJ_LOG_LEVEL_NORMAL, _("length: 0x%08lX\n"),
+ (long unsigned) len);
+
+ if (len == 0)
+ {
+ urj_error_set (URJ_ERROR_INVALID, _("length is 0"));
+ return URJ_STATUS_FAIL;
+ }
+
+ a = addr;
+ end = a + len;
+ urj_log (URJ_LOG_LEVEL_NORMAL, _("reading:\n"));
+
+ if (URJ_BUS_READ_START (bus, addr) != URJ_STATUS_OK)
+ return URJ_STATUS_FAIL;
+
+ for (a += step; a <= end; a += step)
+ {
+ uint32_t data;
+ int j;
+
+ if (a < end)
+ data = URJ_BUS_READ_NEXT (bus, a);
+ else
+ data = URJ_BUS_READ_END (bus);
+
+ for (j = step; j > 0; j--)
+ if (urj_big_endian)
+ b[bc++] = (data >> ((j - 1) * 8)) & 0xFF;
+ else
+ {
+ b[bc++] = data & 0xFF;
+ data >>= 8;
+ }
+
+ if ((bc >= BSIZE) || (a >= end))
+ {
+ urj_log (URJ_LOG_LEVEL_NORMAL, _("addr: 0x%08llX\r"),
+ (long long unsigned) a);
+ if (fwrite (b, bc, 1, f) != bc)
+ {
+ urj_error_set (URJ_ERROR_FILEIO, "fwrite fails");
+ urj_error_state.sys_errno = ferror(f);
+ clearerr(f);
+ return URJ_STATUS_FAIL;
+ }
+ bc = 0;
+ }
+ }
+
+ urj_log (URJ_LOG_LEVEL_NORMAL, _("\nDone.\n"));
+
+ return URJ_STATUS_OK;
+}
--- /dev/null
+/**
+** @file s3c4510x.c
+**
+** $Id$
+**
+** Copyright (C) 2003, All Rights Reserved
+**
+** This program is free software; you can redistribute it and/or
+** modify it under the terms of the GNU General Public License
+** as published by the Free Software Foundation; either version 2
+** of the License, or (at your option) any later version.
+**
+** This program is distributed in the hope that it will be useful,
+** but WITHOUT ANY WARRANTY; without even the implied warranty of
+** MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+** GNU General Public License for more details.
+**
+** You should have received a copy of the GNU General Public License
+** along with this program; if not, write to the Free Software
+** Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+** 02111-1307, USA.
+**
+** @author
+** Jiun-Shian Ho <asky@syncom.com.tw>,
+** Copy from other bus drivers written by Marcel Telka <marcel@telka.sk>
+**
+** Krzysztof Blaszkowski <info@sysmikro.com.pl>
+** - fixed bug with driving nWBE, nECS, nSDCS (for SDRAM),
+** - fixed bug with preparing bus state after each urj_tap_chain_shift_data_registers().
+** tested on "peek" command only (2003/10/07).
+**
+** @brief
+** Bus driver for Samsung S3C4510X (ARM7TDMI) micro controller.
+**
+** @par Reference Documentations
+** - [1] Samsung Electronics Co., Ltd.,
+** "S3C4510B 32-Bit RISC Microcontroller User's Manual",
+** Revision 1, August 2000, Order Number: 21-S3-C4510B-082000
+**
+** @note
+** - This bus driver is coded basing on S3C4510B.
+** However, Samsung do NOT giving a special JTAG ID-Code for this chip.
+** - Data Bus width is detected by B0SIZE[0:1];
+** the bus parameter is defined as 32-bit, but actually controlled by
+** @ref dbus_width. Make sure that B0SIZE[0:1] is welded correct.
+** Otherwise, you must modify @ref s3c4510_bus_width().
+** - ROM/Flash is selected by nRCS[5:0], now suppose only nRCS0.
+** So is nWBE[4:0], now suppose only nWBE0
+** - Unfortunately, B0SIZE isn't known before first SCAN/PRELOAD.
+** Is bus driver allowed to do JTAG activity during URJ_BUS_AREA or bus_new?
+**
+=============================================================================*/
+
+
+#include <sysdep.h>
+
+#include <stdlib.h>
+#include <stdint.h>
+#include <string.h>
+
+#include <urjtag/log.h>
+#include <urjtag/part.h>
+#include <urjtag/bus.h>
+#include <urjtag/chain.h>
+#include <urjtag/bssignal.h>
+#include <urjtag/tap_state.h>
+
+#include "buses.h"
+#include "generic_bus.h"
+
+
+
+/** @brief Bus driver for Samsung S3C4510X */
+typedef struct
+{
+ urj_part_signal_t *a[22]; /**< Only 22-bits addressing */
+ urj_part_signal_t *d[32]; /**< Data bus */
+ urj_part_signal_t *nrcs[6]; /**< not ROM/SRAM/Flash Chip Select;
+ ** Only using nRCS0. */
+ urj_part_signal_t *necs[4];
+ urj_part_signal_t *nsdcs[4];
+
+ urj_part_signal_t *nwbe[4]; /**< not Write Byte Enable */
+ urj_part_signal_t *noe; /**< not Output Enable */
+ int dbuswidth;
+} bus_params_t;
+
+#define A ((bus_params_t *) bus->params)->a
+#define D ((bus_params_t *) bus->params)->d
+#define nRCS ((bus_params_t *) bus->params)->nrcs
+#define nECS ((bus_params_t *) bus->params)->necs
+#define nSDCS ((bus_params_t *) bus->params)->nsdcs
+#define nWBE ((bus_params_t *) bus->params)->nwbe
+#define nOE ((bus_params_t *) bus->params)->noe
+
+#define dbus_width ((bus_params_t *) bus->params)->dbuswidth
+/** @brief Width of Data Bus. Detected by B0SIZE[1:0] */
+
+/**
+ * bus->driver->(*new_bus)
+ *
+ */
+static urj_bus_t *
+s3c4510_bus_new (urj_chain_t *chain, const urj_bus_driver_t *driver,
+ const urj_param_t *cmd_params[])
+{
+ urj_bus_t *bus;
+ urj_part_t *part;
+ char buff[10];
+ int i;
+ int failed = 0;
+
+ bus = urj_bus_generic_new (chain, driver, sizeof (bus_params_t));
+ if (bus == NULL)
+ return NULL;
+ part = bus->part;
+
+ dbus_width = 16;
+
+ for (i = 0; i < 22; i++)
+ {
+ sprintf (buff, "ADDR%d", i);
+ failed |= urj_bus_generic_attach_sig (part, &(A[i]), buff);
+ }
+
+ for (i = 0; i < 32; i++)
+ {
+ sprintf (buff, "XDATA%d", i);
+ failed |= urj_bus_generic_attach_sig (part, &(D[i]), buff);
+ }
+
+ for (i = 0; i < 6; i++)
+ {
+ sprintf (buff, "nRCS%d", i);
+ failed |= urj_bus_generic_attach_sig (part, &(nRCS[i]), buff);
+ }
+
+ for (i = 0; i < 4; i++)
+ {
+ sprintf (buff, "nECS%d", i);
+ failed |= urj_bus_generic_attach_sig (part, &(nECS[i]), buff);
+ }
+
+ for (i = 0; i < 4; i++)
+ {
+ sprintf (buff, "nRAS%d", i); /* those are nSDCS for SDRAMs only */
+ failed |= urj_bus_generic_attach_sig (part, &(nSDCS[i]), buff);
+ }
+
+ for (i = 0; i < 4; i++)
+ {
+ sprintf (buff, "nWBE%d", i);
+ failed |= urj_bus_generic_attach_sig (part, &(nWBE[i]), buff);
+ }
+
+ failed |= urj_bus_generic_attach_sig (part, &(nOE), "nOE");
+
+ if (failed)
+ {
+ urj_bus_generic_free (bus);
+ return NULL;
+ }
+
+ return bus;
+}
+
+/**
+ * bus->driver->(*printinfo)
+ *
+ */
+static void
+s3c4510_bus_printinfo (urj_log_level_t ll, urj_bus_t *bus)
+{
+ int i;
+
+ for (i = 0; i < bus->chain->parts->len; i++)
+ if (bus->part == bus->chain->parts->parts[i])
+ break;
+ urj_log (ll, _("Samsung S3C4510B compatibile bus driver via BSR (JTAG part No. %d) RCS0=%ubit\n"),
+ i, dbus_width);
+}
+
+/**
+ * bus->driver->(*init)
+ *
+ */
+static int
+s3c4510_bus_init (urj_bus_t *bus)
+{
+ urj_part_t *p = bus->part;
+ urj_chain_t *chain = bus->chain;
+
+ if (urj_tap_state (chain) != URJ_TAP_STATE_RUN_TEST_IDLE)
+ {
+ /* silently skip initialization if TAP isn't in RUNTEST/IDLE state
+ this is required to avoid interfering with detect when initbus
+ is contained in the part description file
+ URJ_BUS_INIT() will be called latest by URJ_BUS_PREPARE() */
+ return URJ_STATUS_OK;
+ }
+
+ urj_part_set_instruction (p, "SAMPLE/PRELOAD");
+ urj_tap_chain_shift_instructions (chain);
+ urj_tap_chain_shift_data_registers (chain, 0);
+
+ bus->initialized = 1;
+
+ return URJ_STATUS_OK;
+}
+
+/**
+ * bus->driver->(*area)
+ *
+ */
+static int
+s3c4510_bus_area (urj_bus_t *bus, uint32_t adr, urj_bus_area_t *area)
+{
+ int b0size0, b0size1; // , endian;
+
+ area->description = NULL;
+ area->start = UINT32_C (0x00000000);
+ area->length = UINT64_C (0x100000000);
+
+ // endian = urj_part_get_signal( bus->part, urj_part_find_signal( bus->part, "LITTLE" ));
+ b0size0 = urj_part_get_signal (bus->part,
+ urj_part_find_signal (bus->part, "B0SIZE0"));
+ b0size1 = urj_part_get_signal (bus->part,
+ urj_part_find_signal (bus->part, "B0SIZE1"));
+
+ switch ((b0size1 << 1) | b0size0)
+ {
+ case 1:
+ area->width = dbus_width = 8;
+ return URJ_STATUS_OK;
+ case 2:
+ area->width = dbus_width = 16;
+ return URJ_STATUS_OK;
+ case 3:
+ area->width = dbus_width = 32;
+ return URJ_STATUS_OK;
+ default:
+ urj_error_set (URJ_ERROR_INVALID, ("B0SIZE[1:0] 0x%01x: Unknown"),
+ (b0size1 << 1) | b0size0);
+ area->width = 0;
+ return URJ_STATUS_FAIL;
+ }
+}
+
+static void
+s3c4510_bus_setup_ctrl (urj_bus_t *bus, int mode)
+{
+ int k;
+ urj_part_t *p = bus->part;
+
+ for (k = 0; k < 6; k++)
+ urj_part_set_signal (p, nRCS[k], 1, (mode & (1 << k)) ? 1 : 0);
+
+ for (k = 0; k < 4; k++)
+ urj_part_set_signal (p, nECS[k], 1, 1);
+
+ for (k = 0; k < 4; k++)
+ urj_part_set_signal (p, nSDCS[k], 1, 1);
+
+ for (k = 0; k < 4; k++)
+ urj_part_set_signal (p, nWBE[k], 1, (mode & (1 << (k + 8))) ? 1 : 0);
+
+ urj_part_set_signal (p, nOE, 1, (mode & (1 << 16)) ? 1 : 0);
+}
+
+static void
+setup_address (urj_bus_t *bus, uint32_t a)
+{
+ int i, so;
+ urj_part_t *p = bus->part;
+
+ switch (dbus_width)
+ {
+ case 32:
+ so = 2;
+ break;
+ case 16:
+ so = 1;
+ break;
+ default:
+ so = 0;
+ break;
+ }
+
+ for (i = 0; i < 22; i++)
+ urj_part_set_signal (p, A[i], 1, (a >> (i + so)) & 1);
+}
+
+static void
+set_data_in (urj_bus_t *bus)
+{
+ int i;
+ urj_part_t *p = bus->part;
+
+ for (i = 0; i < dbus_width; i++)
+ urj_part_set_signal (p, D[i], 0, 0);
+}
+
+static void
+setup_data (urj_bus_t *bus, uint32_t d)
+{
+ int i;
+ urj_part_t *p = bus->part;
+
+ for (i = 0; i < dbus_width; i++)
+ urj_part_set_signal (p, D[i], 1, (d >> i) & 1);
+ /* Set other bits as 0 */
+ for (i = dbus_width; i < 32; i++)
+ urj_part_set_signal (p, D[i], 1, 0);
+}
+
+/**
+ * bus->driver->(*read_start)
+ *
+ */
+static int
+s3c4510_bus_read_start (urj_bus_t *bus, uint32_t adr)
+{
+ /* see Figure 4-19 in [1] */
+ urj_chain_t *chain = bus->chain;
+
+ s3c4510_bus_setup_ctrl (bus, 0x00fffe); /* nOE=0, nRCS0 =0 */
+ setup_address (bus, adr);
+ set_data_in (bus);
+ urj_tap_chain_shift_data_registers (chain, 0);
+
+ return URJ_STATUS_OK;
+}
+
+/**
+ * bus->driver->(*read_next)
+ *
+ */
+static uint32_t
+s3c4510_bus_read_next (urj_bus_t *bus, uint32_t adr)
+{
+ /* see Figure 4-20 in [1] */
+ urj_part_t *p = bus->part;
+ urj_chain_t *chain = bus->chain;
+ int i;
+ uint32_t d = 0;
+
+ s3c4510_bus_setup_ctrl (bus, 0x00fffe); /* nOE=0, nRCS0 =0 */
+ setup_address (bus, adr);
+ set_data_in (bus);
+ urj_tap_chain_shift_data_registers (chain, 1);
+
+ for (i = 0; i < dbus_width; i++)
+ d |= (uint32_t) (urj_part_get_signal (p, D[i]) << i);
+
+ return d;
+}
+
+/**
+ * bus->driver->(*read_end)
+ *
+ */
+static uint32_t
+s3c4510_bus_read_end (urj_bus_t *bus)
+{
+ /* see Figure 4-19 in [1] */
+ urj_part_t *p = bus->part;
+ urj_chain_t *chain = bus->chain;
+ int i;
+ uint32_t d = 0;
+
+ s3c4510_bus_setup_ctrl (bus, 0x01ffff); /* nOE=1, nRCS0 =1 */
+ urj_tap_chain_shift_data_registers (chain, 1);
+
+ for (i = 0; i < dbus_width; i++)
+ d |= (uint32_t) (urj_part_get_signal (p, D[i]) << i);
+
+ return d;
+}
+
+/**
+ * bus->driver->(*write)
+ *
+ * @brief
+ * ROM/SRAM/FlashPage Write Access Timing
+ */
+static void
+s3c4510_bus_write (urj_bus_t *bus, uint32_t adr, uint32_t data)
+{
+ /* see Figure 4-21 in [1] */
+ urj_chain_t *chain = bus->chain;
+
+ s3c4510_bus_setup_ctrl (bus, 0x01fffe); /* nOE=1, nRCS0 =0 */
+ setup_address (bus, adr);
+ setup_data (bus, data);
+
+ urj_tap_chain_shift_data_registers (chain, 0);
+
+ switch (dbus_width)
+ {
+ default:
+ case 8:
+ s3c4510_bus_setup_ctrl (bus, 0x01fefe); /* nOE=1, nRCS0 =0, nWBE0=0 */
+ break;
+ case 16:
+ s3c4510_bus_setup_ctrl (bus, 0x01fcfe); /* nOE=1, nRCS0 =0, nWBE0-1=0 */
+ break;
+
+ case 32:
+ s3c4510_bus_setup_ctrl (bus, 0x01f0fe); /* nOE=1, nRCS0 =0, nWBE0-3=0 */
+ break;
+ }
+
+ setup_address (bus, adr);
+ setup_data (bus, data);
+
+ urj_tap_chain_shift_data_registers (chain, 0);
+
+ s3c4510_bus_setup_ctrl (bus, 0x01ffff); /* nOE=1, nRCS0 =1 */
+ urj_tap_chain_shift_data_registers (chain, 0);
+
+ urj_log (URJ_LOG_LEVEL_DEBUG, "URJ_BUS_WRITE %08lx @ %08lx\n",
+ (long unsigned) data, (long unsigned) adr);
+}
+
+const urj_bus_driver_t urj_bus_s3c4510_bus = {
+ "s3c4510x",
+ N_("Samsung S3C4510B compatible bus driver via BSR"),
+ s3c4510_bus_new,
+ urj_bus_generic_free,
+ s3c4510_bus_printinfo,
+ urj_bus_generic_prepare_extest,
+ s3c4510_bus_area,
+ s3c4510_bus_read_start,
+ s3c4510_bus_read_next,
+ s3c4510_bus_read_end,
+ urj_bus_generic_read,
+ s3c4510_bus_write,
+ s3c4510_bus_init
+};
+
+
+
+/*=============================================================================
+**
+** CVS Log
+** $Log$
+** Revision 1.5 2003/09/10 12:38:01 telka
+** 2003-09-10 Marcel Telka <marcel@telka.sk>
+**
+** * src/bus/bcm1250.c (bcm1250_bus_printinfo, urj_bus_bcm1250_bus): Fixed typo (compatibile->compatible) in
+** output message (thanks to Andreas Mohr).
+** * src/bus/ixp425.c (ixp425_bus_printinfo, urj_bus_ixp425_bus): Ditto.
+** * src/bus/pxa2x0.c (pxa2x0_bus_printinfo, urj_bus_pxa2x0_bus): Ditto.
+** * src/bus/s3c4510x.c (s3c4510_bus_printinfo, urj_bus_s3c4510_bus): Ditto.
+** * src/bus/sa1110.c (sa1110_bus_printinfo, urj_bus_sa1110_bus): Ditto.
+** * src/bus/sh7727.c (sh7727_bus_printinfo, urj_bus_sh7727_bus): Ditto.
+** * src/bus/sh7750r.c (sh7750r_bus_printinfo, urj_bus_sh7750r_bus): Ditto.
+** * src/bus/sh7751r.c (sh7751r_bus_printinfo, urj_bus_sh7751r_bus): Ditto.
+**
+** Revision 1.4 2003/09/05 21:09:14 telka
+** 2003-09-05 Marcel Telka <marcel@telka.sk>
+**
+** * include/bus.h (urj_bus_drivers): Added constant declaration.
+** (new_sa1110_bus, new_pxa250_bus, new_ixp425_bus, new_sh7727_bus, new_sh7750r_bus, new_sh7751r_bus)
+** (new_bcm1250_bus): Function declarations removed.
+** * src/bus/buses.c (urj_bus_drivers): New constant definition.
+** * src/bus/buses.h: New file.
+** * src/bus/Makefile.am (libbus_a_SOURCES): Added buses.h.
+**
+** * src/bus/bcm1250.c (bcm1250_bus_printinfo): Added new function parameter 'bus'.
+** (urj_bus_bcm1250_bus): Changed structure type to urj_bus_driver_t. Changed members.
+** (new_bcm1250_bus): Function renamed ...
+** (bcm1250_bus_new): ... to this one. Changed parameter list to void (and function body updated).
+** * src/bus/ixp425.c (ixp425_bus_printinfo): Added new function parameter 'bus'.
+** (urj_bus_ixp425_bus): Changed structure type to urj_bus_driver_t. Changed members.
+** (new_ixp425_bus): Function renamed ...
+** (ixp425_bus_new): ... to this one. Changed parameter list to void (and function body updated).
+** * src/bus/pxa2x0.c (pxa2x0_bus_printinfo): Added new function parameter 'bus'.
+** (pxa250_bus): Structure transformed ...
+** (urj_bus_pxa2x0_bus): ... to this constant (changed type to urj_bus_driver_t, changed members).
+** (new_pxa250_bus): Function renamed ...
+** (pxa2x0_bus_new): ... to this one. Changed parameter list to void (and function body updated).
+** * src/bus/s3c4510x.c (s3c4510_bus_printinfo): Added new function parameter 'bus'.
+** (urj_bus_s3c4510_bus): Changed structure type to urj_bus_driver_t. Changed members.
+** (new_s3c4510_bus): Function renamed ...
+** (s3c4510_bus_new): ... to this one. Changed parameter list to void (and function body updated).
+** * src/bus/sa1110.c (sa1110_bus_printinfo): Added new function parameter 'bus'.
+** (urj_bus_sa1110_bus): Changed structure type to urj_bus_driver_t. Changed members.
+** (new_sa1110_bus): Function renamed ...
+** (sa1110_bus_new): ... to this one. Changed parameter list to void (and function body updated).
+** * src/bus/sh7727.c (sh7727_bus_printinfo): Added new function parameter 'bus'.
+** (urj_bus_sh7727_bus): Changed structure type to urj_bus_driver_t. Changed members.
+** (new_sh7727_bus): Function renamed ...
+** (sh7727_bus_new): ... to this one. Changed parameter list to void (and function body updated).
+** * src/bus/sh7750r.c (sh7750r_bus_printinfo): Added new function parameter 'bus'.
+** (urj_bus_sh7750r_bus): Changed structure type to urj_bus_driver_t. Changed members.
+** (new_sh7750r_bus): Function renamed ...
+** (sh7750r_bus_new): ... to this one. Changed parameter list to void (and function body updated).
+** * src/bus/sh7751r.c (sh7751r_bus_printinfo): Added new function parameter 'bus'.
+** (urj_bus_sh7751r_bus): Changed structure type to urj_bus_driver_t. Changed members.
+** (new_sh7751r_bus): Function renamed ...
+** (sh7751r_bus_new): ... to this one. Changed parameter list to void (and function body updated).
+**
+** * src/cmd/cable.c (cmd_cable_run): Replaced bus->free() call with URJ_BUS_FREE().
+** * src/jtag.c (main): Ditto.
+**
+** * src/cmd/cmd.c (cmds): Added urj_cmd_initbus.
+** * src/cmd/detect.c (cmd_detect_run): Removed explicit bus driver detection.
+** * src/cmd/initbus.c: New file.
+** * src/cmd/Makefile.am (libcmd_a_SOURCES): Added initbus.c.
+**
+** * data/broadcom/bcm1250/bcm1250: Added 'initbus' command call.
+** * data/hitachi/sh7727/sh7727: Ditto.
+** * data/intel/ixp425/ixp425: Ditto.
+** * data/intel/pxa250/pxa250: Ditto.
+** * data/intel/pxa250/pxa250c0: Ditto.
+** * data/intel/sa1110/sa1110: Ditto.
+** * data/samsung/s3c4510b/s3c4510b: Ditto.
+**
+** Revision 1.3 2003/08/28 07:26:02 telka
+** 2003-08-28 Marcel Telka <marcel@telka.sk>
+**
+** * src/readmem.c (readmem): Replaced bus_width macro with new URJ_BUS_AREA.
+** * src/bus/bcm1250.c (bcm1250_bus_width): Function removed.
+** (bcm1250_bus_area): New function.
+** * src/bus/ixp425.c (ixp425_bus_width): Function removed.
+** (ixp425_bus_area): New function.
+** * src/bus/pxa2x0.c (pxa250_bus_width): Function removed.
+** (pxa2x0_bus_area): New function.
+** * src/bus/s3c4510x.c (s3c4510_bus_width): Function removed.
+** (s3c4510_bus_area): New function.
+** * src/bus/sa1110.c (sa1110_bus_width: Function removed.
+** (sa1110_bus_area): New function.
+** * src/bus/sh7727.c (sh7727_bus_width): Function removed.
+** (sh7727_bus_area): New function.
+** * src/bus/sh7750r.c (sh7750r_bus_width): Function removed.
+** (sh7750r_bus_area): New function.
+** * src/bus/sh7751r.c (sh7751r_bus_width): Function removed.
+** (sh7751r_bus_area): New function.
+** * src/cmd/print.c (cmd_print_run): Added bus area printing.
+**
+** Revision 1.2 2003/08/19 09:59:26 telka
+** 2003-08-19 Marcel Telka <marcel@telka.sk>
+**
+** * src/bus/s3c4510x.c: Changed comment.
+**
+** Revision 1.1 2003/08/19 09:53:25 telka
+** 2003-08-19 Marcel Telka <marcel@telka.sk>
+**
+** * src/bus/Makefile.am (libbus_a_SOURCES): Added s3c4510x.c.
+** * src/bus/s3c4510x.c: New file (Jiun-Shian Ho).
+**
+*/
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2002, 2003 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2002, 2003.
+ *
+ * Documentation:
+ * [1] Intel Corporation, "Intel StrongARM SA-1110 Microprocessor
+ * Developer's Manual", October 2001, Order Number: 278240-004
+ *
+ */
+
+#include <sysdep.h>
+
+#include <stdlib.h>
+#include <stdint.h>
+#include <string.h>
+
+#include <urjtag/part.h>
+#include <urjtag/bus.h>
+#include <urjtag/chain.h>
+#include <urjtag/bssignal.h>
+
+#include "buses.h"
+#include "generic_bus.h"
+
+typedef struct
+{
+ urj_part_signal_t *a[26];
+ urj_part_signal_t *d[32];
+ urj_part_signal_t *ncs[6];
+ urj_part_signal_t *rd_nwr;
+ urj_part_signal_t *nwe;
+ urj_part_signal_t *noe;
+} bus_params_t;
+
+#define A ((bus_params_t *) bus->params)->a
+#define D ((bus_params_t *) bus->params)->d
+#define nCS ((bus_params_t *) bus->params)->ncs
+#define RD_nWR ((bus_params_t *) bus->params)->rd_nwr
+#define nWE ((bus_params_t *) bus->params)->nwe
+#define nOE ((bus_params_t *) bus->params)->noe
+
+/**
+ * bus->driver->(*new_bus)
+ *
+ */
+static urj_bus_t *
+sa1110_bus_new (urj_chain_t *chain, const urj_bus_driver_t *driver,
+ const urj_param_t *cmd_params[])
+{
+ urj_bus_t *bus;
+ urj_part_t *part;
+ char buff[10];
+ int i;
+ int failed = 0;
+
+ bus = urj_bus_generic_new (chain, driver, sizeof (bus_params_t));
+ if (bus == NULL)
+ return NULL;
+ part = bus->part;
+
+ for (i = 0; i < 26; i++)
+ {
+ sprintf (buff, "A%d", i);
+ failed |= urj_bus_generic_attach_sig (part, &(A[i]), buff);
+ }
+
+ for (i = 0; i < 32; i++)
+ {
+ sprintf (buff, "D%d", i);
+ failed |= urj_bus_generic_attach_sig (part, &(D[i]), buff);
+ }
+
+ for (i = 0; i < 6; i++)
+ {
+ sprintf (buff, "nCS%d", i);
+ failed |= urj_bus_generic_attach_sig (part, &(nCS[i]), buff);
+ }
+
+ failed |= urj_bus_generic_attach_sig (part, &(RD_nWR), "RD_nWR");
+
+ failed |= urj_bus_generic_attach_sig (part, &(nWE), "nWE");
+
+ failed |= urj_bus_generic_attach_sig (part, &(nOE), "nOE");
+
+ if (failed)
+ {
+ urj_bus_generic_free (bus);
+ return NULL;
+ }
+
+ return bus;
+}
+
+/**
+ * bus->driver->(*printinfo)
+ *
+ */
+static void
+sa1110_bus_printinfo (urj_log_level_t ll, urj_bus_t *bus)
+{
+ int i;
+
+ for (i = 0; i < bus->chain->parts->len; i++)
+ if (bus->part == bus->chain->parts->parts[i])
+ break;
+ urj_log (ll, _("Intel SA-1110 compatible bus driver via BSR (JTAG part No. %d)\n"),
+ i);
+}
+
+/**
+ * bus->driver->(*area)
+ *
+ */
+static int
+sa1110_bus_area (urj_bus_t *bus, uint32_t adr, urj_bus_area_t *area)
+{
+ area->description = NULL;
+ area->start = UINT32_C (0x00000000);
+ area->length = UINT64_C (0x100000000);
+ area->width =
+ urj_part_get_signal (bus->part,
+ urj_part_find_signal (bus->part,
+ "ROM_SEL")) ? 32 : 16;
+
+ return URJ_STATUS_OK;
+}
+
+static void
+setup_address (urj_bus_t *bus, uint32_t a)
+{
+ int i;
+ urj_part_t *p = bus->part;
+
+ for (i = 0; i < 26; i++)
+ urj_part_set_signal (p, A[i], 1, (a >> i) & 1);
+}
+
+static void
+set_data_in (urj_bus_t *bus)
+{
+ int i;
+ urj_part_t *p = bus->part;
+ urj_bus_area_t area;
+
+ sa1110_bus_area (bus, 0, &area);
+
+ for (i = 0; i < area.width; i++)
+ urj_part_set_signal (p, D[i], 0, 0);
+}
+
+static void
+setup_data (urj_bus_t *bus, uint32_t d)
+{
+ int i;
+ urj_part_t *p = bus->part;
+ urj_bus_area_t area;
+
+ sa1110_bus_area (bus, 0, &area);
+
+ for (i = 0; i < area.width; i++)
+ urj_part_set_signal (p, D[i], 1, (d >> i) & 1);
+}
+
+/**
+ * bus->driver->(*read_start)
+ *
+ */
+static int
+sa1110_bus_read_start (urj_bus_t *bus, uint32_t adr)
+{
+ /* see Figure 10-12 in [1] */
+ urj_part_t *p = bus->part;
+ urj_chain_t *chain = bus->chain;
+
+ urj_part_set_signal (p, nCS[0], 1, (adr >> 27) != 0);
+ urj_part_set_signal (p, nCS[1], 1, (adr >> 27) != 1);
+ urj_part_set_signal (p, nCS[2], 1, (adr >> 27) != 2);
+ urj_part_set_signal (p, nCS[3], 1, (adr >> 27) != 3);
+ urj_part_set_signal (p, nCS[4], 1, (adr >> 27) != 8);
+ urj_part_set_signal (p, nCS[5], 1, (adr >> 27) != 9);
+ urj_part_set_signal (p, RD_nWR, 1, 1);
+ urj_part_set_signal (p, nWE, 1, 1);
+ urj_part_set_signal (p, nOE, 1, 0);
+
+ setup_address (bus, adr);
+ set_data_in (bus);
+
+ urj_tap_chain_shift_data_registers (chain, 0);
+
+ return URJ_STATUS_OK;
+}
+
+/**
+ * bus->driver->(*read_next)
+ *
+ */
+static uint32_t
+sa1110_bus_read_next (urj_bus_t *bus, uint32_t adr)
+{
+ /* see Figure 10-12 in [1] */
+ urj_part_t *p = bus->part;
+ urj_chain_t *chain = bus->chain;
+ int i;
+ uint32_t d = 0;
+ urj_bus_area_t area;
+
+ sa1110_bus_area (bus, adr, &area);
+
+ setup_address (bus, adr);
+ urj_tap_chain_shift_data_registers (chain, 1);
+
+ for (i = 0; i < area.width; i++)
+ d |= (uint32_t) (urj_part_get_signal (p, D[i]) << i);
+
+ return d;
+}
+
+/**
+ * bus->driver->(*read_end)
+ *
+ */
+static uint32_t
+sa1110_bus_read_end (urj_bus_t *bus)
+{
+ /* see Figure 10-12 in [1] */
+ urj_part_t *p = bus->part;
+ urj_chain_t *chain = bus->chain;
+ int i;
+ uint32_t d = 0;
+ urj_bus_area_t area;
+
+ sa1110_bus_area (bus, 0, &area);
+
+ urj_part_set_signal (p, nCS[0], 1, 1);
+ urj_part_set_signal (p, nCS[1], 1, 1);
+ urj_part_set_signal (p, nCS[2], 1, 1);
+ urj_part_set_signal (p, nCS[3], 1, 1);
+ urj_part_set_signal (p, nCS[4], 1, 1);
+ urj_part_set_signal (p, nCS[5], 1, 1);
+ urj_part_set_signal (p, nOE, 1, 1);
+ urj_tap_chain_shift_data_registers (chain, 1);
+
+ for (i = 0; i < area.width; i++)
+ d |= (uint32_t) (urj_part_get_signal (p, D[i]) << i);
+
+ return d;
+}
+
+/**
+ * bus->driver->(*write)
+ *
+ */
+static void
+sa1110_bus_write (urj_bus_t *bus, uint32_t adr, uint32_t data)
+{
+ /* see Figure 10-16 in [1] */
+ urj_part_t *p = bus->part;
+ urj_chain_t *chain = bus->chain;
+
+ urj_part_set_signal (p, nCS[0], 1, (adr >> 27) != 0);
+ urj_part_set_signal (p, nCS[1], 1, (adr >> 27) != 1);
+ urj_part_set_signal (p, nCS[2], 1, (adr >> 27) != 2);
+ urj_part_set_signal (p, nCS[3], 1, (adr >> 27) != 3);
+ urj_part_set_signal (p, nCS[4], 1, (adr >> 27) != 8);
+ urj_part_set_signal (p, nCS[5], 1, (adr >> 27) != 9);
+ urj_part_set_signal (p, RD_nWR, 1, 0);
+ urj_part_set_signal (p, nWE, 1, 1);
+ urj_part_set_signal (p, nOE, 1, 1);
+
+ setup_address (bus, adr);
+ setup_data (bus, data);
+
+ urj_tap_chain_shift_data_registers (chain, 0);
+
+ urj_part_set_signal (p, nWE, 1, 0);
+ urj_tap_chain_shift_data_registers (chain, 0);
+ urj_part_set_signal (p, nWE, 1, 1);
+ urj_part_set_signal (p, nCS[0], 1, 1);
+ urj_part_set_signal (p, nCS[1], 1, 1);
+ urj_part_set_signal (p, nCS[2], 1, 1);
+ urj_part_set_signal (p, nCS[3], 1, 1);
+ urj_part_set_signal (p, nCS[4], 1, 1);
+ urj_part_set_signal (p, nCS[5], 1, 1);
+ urj_tap_chain_shift_data_registers (chain, 0);
+}
+
+const urj_bus_driver_t urj_bus_sa1110_bus = {
+ "sa1110",
+ N_("Intel SA-1110 compatible bus driver via BSR"),
+ sa1110_bus_new,
+ urj_bus_generic_free,
+ sa1110_bus_printinfo,
+ urj_bus_generic_prepare_extest,
+ sa1110_bus_area,
+ sa1110_bus_read_start,
+ sa1110_bus_read_next,
+ sa1110_bus_read_end,
+ urj_bus_generic_read,
+ sa1110_bus_write,
+ urj_bus_generic_no_init
+};
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2003 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Matan Ziv-Av <matan@svgalib.org>, 2003.
+ * Modified by Marcel Telka <marcel@telka.sk>, 2003.
+ *
+ */
+
+#include <sysdep.h>
+
+#include <stdint.h>
+#include <stdlib.h>
+#include <string.h>
+
+#include <urjtag/part.h>
+#include <urjtag/bus.h>
+#include <urjtag/chain.h>
+#include <urjtag/bssignal.h>
+
+#include "buses.h"
+#include "generic_bus.h"
+
+typedef struct
+{
+ urj_part_signal_t *a[26];
+ urj_part_signal_t *d[32];
+ urj_part_signal_t *cs[7];
+ urj_part_signal_t *we[4];
+ urj_part_signal_t *rdwr;
+ urj_part_signal_t *rd;
+ urj_part_signal_t *md3;
+ urj_part_signal_t *md4;
+} bus_params_t;
+
+#define A ((bus_params_t *) bus->params)->a
+#define D ((bus_params_t *) bus->params)->d
+#define CS ((bus_params_t *) bus->params)->cs
+#define WE ((bus_params_t *) bus->params)->we
+#define RDWR ((bus_params_t *) bus->params)->rdwr
+#define RD ((bus_params_t *) bus->params)->rd
+#define MD3 ((bus_params_t *) bus->params)->md3
+#define MD4 ((bus_params_t *) bus->params)->md4
+
+/**
+ * bus->driver->(*new_bus)
+ *
+ */
+static urj_bus_t *
+sh7727_bus_new (urj_chain_t *chain, const urj_bus_driver_t *driver,
+ const urj_param_t *cmd_params[])
+{
+ urj_bus_t *bus;
+ urj_part_t *part;
+ char buff[10];
+ int i;
+ int failed = 0;
+
+ bus = urj_bus_generic_new (chain, driver, sizeof (bus_params_t));
+ if (bus == NULL)
+ return NULL;
+ part = bus->part;
+
+ for (i = 0; i < 26; i++)
+ {
+ sprintf (buff, "A%d", i);
+ failed |= urj_bus_generic_attach_sig (part, &(A[i]), buff);
+ }
+
+ for (i = 0; i < 32; i++)
+ {
+ sprintf (buff, "D%d", i);
+ failed |= urj_bus_generic_attach_sig (part, &(D[i]), buff);
+ }
+
+ for (i = 0; i < 7; i++)
+ {
+ if (i == 1)
+ continue;
+ sprintf (buff, "CS%d", i);
+ failed |= urj_bus_generic_attach_sig (part, &(CS[i]), buff);
+ }
+
+ for (i = 0; i < 4; i++)
+ {
+ sprintf (buff, "WE%d", i);
+ failed |= urj_bus_generic_attach_sig (part, &(WE[i]), buff);
+ }
+
+ failed |= urj_bus_generic_attach_sig (part, &(RDWR), "RDWR");
+
+ failed |= urj_bus_generic_attach_sig (part, &(RD), "RD");
+
+ failed |= urj_bus_generic_attach_sig (part, &(MD3), "MD3");
+
+ failed |= urj_bus_generic_attach_sig (part, &(MD4), "MD4");
+
+ if (failed)
+ {
+ urj_bus_generic_free (bus);
+ return NULL;
+ }
+
+ return bus;
+}
+
+/**
+ * bus->driver->(*printinfo)
+ *
+ */
+static void
+sh7727_bus_printinfo (urj_log_level_t ll, urj_bus_t *bus)
+{
+ int i;
+
+ for (i = 0; i < bus->chain->parts->len; i++)
+ if (bus->part == bus->chain->parts->parts[i])
+ break;
+ urj_log (ll, _("Hitachi SH7727 compatible bus driver via BSR (JTAG part No. %d)\n"),
+ i);
+}
+
+/**
+ * bus->driver->(*area)
+ *
+ */
+static int
+sh7727_bus_area (urj_bus_t *bus, uint32_t adr, urj_bus_area_t *area)
+{
+ urj_part_t *p = bus->part;
+
+ area->description = NULL;
+ area->start = UINT32_C (0x00000000);
+ area->length = UINT64_C (0x100000000);
+
+ switch (urj_part_get_signal (p, MD4) << 1 | urj_part_get_signal (p, MD3))
+ {
+ case 1:
+ area->width = 8;
+ return URJ_STATUS_OK;
+ case 2:
+ area->width = 16;
+ return URJ_STATUS_OK;
+ case 3:
+ area->width = 32;
+ return URJ_STATUS_OK;
+ default:
+ urj_error_set (URJ_ERROR_INVALID, "Invalid bus width (MD3 = MD4 = 0)");
+ area->width = 0;
+ return URJ_STATUS_FAIL;
+ }
+}
+
+static void
+setup_address (urj_bus_t *bus, uint32_t a)
+{
+ int i;
+ urj_part_t *p = bus->part;
+
+ for (i = 0; i < 26; i++)
+ urj_part_set_signal (p, A[i], 1, (a >> i) & 1);
+}
+
+static void
+set_data_in (urj_bus_t *bus)
+{
+ int i;
+ urj_part_t *p = bus->part;
+ urj_bus_area_t area;
+
+ sh7727_bus_area (bus, 0, &area);
+
+ for (i = 0; i < area.width; i++)
+ urj_part_set_signal (p, D[i], 0, 0);
+}
+
+static void
+setup_data (urj_bus_t *bus, uint32_t d)
+{
+ int i;
+ urj_part_t *p = bus->part;
+ urj_bus_area_t area;
+
+ sh7727_bus_area (bus, 0, &area);
+
+ for (i = 0; i < area.width; i++)
+ urj_part_set_signal (p, D[i], 1, (d >> i) & 1);
+}
+
+/**
+ * bus->driver->(*read_start)
+ *
+ */
+static int
+sh7727_bus_read_start (urj_bus_t *bus, uint32_t adr)
+{
+ urj_part_t *p = bus->part;
+ int cs[8];
+ int i;
+
+ for (i = 0; i < 8; i++)
+ cs[i] = 1;
+ cs[(adr & 0x1C000000) >> 26] = 0;
+
+ urj_part_set_signal (p, CS[0], 1, cs[0]);
+ urj_part_set_signal (p, CS[2], 1, cs[2]);
+ urj_part_set_signal (p, CS[3], 1, cs[3]);
+ urj_part_set_signal (p, CS[4], 1, cs[4]);
+ urj_part_set_signal (p, CS[5], 1, cs[5]);
+ urj_part_set_signal (p, CS[6], 1, cs[6]);
+ urj_part_set_signal (p, RDWR, 1, 1);
+ urj_part_set_signal (p, WE[0], 1, 1);
+ urj_part_set_signal (p, WE[1], 1, 1);
+ urj_part_set_signal (p, WE[2], 1, 1);
+ urj_part_set_signal (p, WE[3], 1, 1);
+ urj_part_set_signal (p, RD, 1, 0);
+
+ setup_address (bus, adr);
+ set_data_in (bus);
+
+ urj_tap_chain_shift_data_registers (bus->chain, 0);
+
+ return URJ_STATUS_OK;
+}
+
+/**
+ * bus->driver->(*read_next)
+ *
+ */
+static uint32_t
+sh7727_bus_read_next (urj_bus_t *bus, uint32_t adr)
+{
+ urj_part_t *p = bus->part;
+ int i;
+ uint32_t d = 0;
+ urj_bus_area_t area;
+
+ sh7727_bus_area (bus, 0, &area);
+
+ setup_address (bus, adr);
+ urj_tap_chain_shift_data_registers (bus->chain, 1);
+
+ for (i = 0; i < area.width; i++)
+ d |= (uint32_t) (urj_part_get_signal (p, D[i]) << i);
+
+ return d;
+}
+
+/**
+ * bus->driver->(*read_end)
+ *
+ */
+static uint32_t
+sh7727_bus_read_end (urj_bus_t *bus)
+{
+ urj_part_t *p = bus->part;
+ int i;
+ uint32_t d = 0;
+ urj_bus_area_t area;
+
+ sh7727_bus_area (bus, 0, &area);
+
+ urj_part_set_signal (p, CS[0], 1, 1);
+ urj_part_set_signal (p, CS[2], 1, 1);
+ urj_part_set_signal (p, CS[3], 1, 1);
+ urj_part_set_signal (p, CS[4], 1, 1);
+ urj_part_set_signal (p, CS[5], 1, 1);
+ urj_part_set_signal (p, CS[6], 1, 1);
+
+ urj_part_set_signal (p, RD, 1, 1);
+ urj_tap_chain_shift_data_registers (bus->chain, 1);
+
+ for (i = 0; i < area.width; i++)
+ d |= (uint32_t) (urj_part_get_signal (p, D[i]) << i);
+
+ return d;
+}
+
+/**
+ * bus->driver->(*write)
+ *
+ */
+static void
+sh7727_bus_write (urj_bus_t *bus, uint32_t adr, uint32_t data)
+{
+ urj_chain_t *chain = bus->chain;
+ urj_part_t *p = bus->part;
+ int cs[8];
+ int i;
+
+ for (i = 0; i < 8; i++)
+ cs[i] = 1;
+ cs[(adr & 0x1C000000) >> 26] = 0;
+
+ urj_part_set_signal (p, CS[0], 1, cs[0]);
+ urj_part_set_signal (p, CS[2], 1, cs[2]);
+ urj_part_set_signal (p, CS[3], 1, cs[3]);
+ urj_part_set_signal (p, CS[4], 1, cs[4]);
+ urj_part_set_signal (p, CS[5], 1, cs[5]);
+ urj_part_set_signal (p, CS[6], 1, cs[6]);
+
+ urj_part_set_signal (p, RDWR, 1, 0);
+ urj_part_set_signal (p, WE[0], 1, 1);
+ urj_part_set_signal (p, WE[1], 1, 1);
+ urj_part_set_signal (p, WE[2], 1, 1);
+ urj_part_set_signal (p, WE[3], 1, 1);
+ urj_part_set_signal (p, RD, 1, 1);
+
+ setup_address (bus, adr);
+ setup_data (bus, data);
+
+ urj_tap_chain_shift_data_registers (chain, 0);
+
+ urj_part_set_signal (p, WE[0], 1, 0);
+ urj_part_set_signal (p, WE[1], 1, 0);
+ urj_part_set_signal (p, WE[2], 1, 0);
+ urj_part_set_signal (p, WE[3], 1, 0);
+
+ urj_tap_chain_shift_data_registers (chain, 0);
+
+ urj_part_set_signal (p, WE[0], 1, 1);
+ urj_part_set_signal (p, WE[1], 1, 1);
+ urj_part_set_signal (p, WE[2], 1, 1);
+ urj_part_set_signal (p, WE[3], 1, 1);
+
+ urj_tap_chain_shift_data_registers (chain, 0);
+}
+
+const urj_bus_driver_t urj_bus_sh7727_bus = {
+ "sh7727",
+ N_("Hitachi SH7727 compatible bus driver via BSR"),
+ sh7727_bus_new,
+ urj_bus_generic_free,
+ sh7727_bus_printinfo,
+ urj_bus_generic_prepare_extest,
+ sh7727_bus_area,
+ sh7727_bus_read_start,
+ sh7727_bus_read_next,
+ sh7727_bus_read_end,
+ urj_bus_generic_read,
+ sh7727_bus_write,
+ urj_bus_generic_no_init
+};
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2003 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Matan Ziv-Av <matan@svgalib.org>, 2003.
+ * Modified by Marcel Telka <marcel@telka.sk>, 2003.
+ *
+ */
+
+#include <sysdep.h>
+
+#include <stdint.h>
+#include <stdlib.h>
+#include <string.h>
+
+#include <urjtag/part.h>
+#include <urjtag/bus.h>
+#include <urjtag/chain.h>
+#include <urjtag/bssignal.h>
+
+#include "buses.h"
+#include "generic_bus.h"
+
+typedef struct
+{
+ urj_part_signal_t *a[26];
+ urj_part_signal_t *d[64];
+ urj_part_signal_t *cs[7];
+ urj_part_signal_t *we[4];
+ urj_part_signal_t *rdwr;
+ urj_part_signal_t *rd;
+ urj_part_signal_t *rdwr2;
+ urj_part_signal_t *rd2;
+} bus_params_t;
+
+#define A ((bus_params_t *) bus->params)->a
+#define D ((bus_params_t *) bus->params)->d
+#define CS ((bus_params_t *) bus->params)->cs
+#define WE ((bus_params_t *) bus->params)->we
+#define RDWR ((bus_params_t *) bus->params)->rdwr
+#define RD ((bus_params_t *) bus->params)->rd
+#define RDWR2 ((bus_params_t *) bus->params)->rdwr2
+#define RD2 ((bus_params_t *) bus->params)->rd2
+
+/**
+ * bus->driver->(*new_bus)
+ *
+ */
+static urj_bus_t *
+sh7750r_bus_new (urj_chain_t *chain, const urj_bus_driver_t *driver,
+ const urj_param_t *cmd_params[])
+{
+ urj_bus_t *bus;
+ urj_part_t *part;
+ char buff[10];
+ int i;
+ int failed = 0;
+
+ bus = urj_bus_generic_new (chain, driver, sizeof (bus_params_t));
+ if (bus == NULL)
+ return NULL;
+ part = bus->part;
+
+ for (i = 0; i < 26; i++)
+ {
+ sprintf (buff, "A%d", i);
+ failed |= urj_bus_generic_attach_sig (part, &(A[i]), buff);
+ }
+
+ for (i = 0; i < 32; i++)
+ {
+ sprintf (buff, "D%d", i);
+ failed |= urj_bus_generic_attach_sig (part, &(D[i]), buff);
+ }
+
+ for (i = 0; i < 7; i++)
+ {
+ sprintf (buff, "CS%d", i);
+ failed |= urj_bus_generic_attach_sig (part, &(CS[i]), buff);
+ }
+
+ for (i = 0; i < 8; i++)
+ {
+ sprintf (buff, "WE%d", i);
+ failed |= urj_bus_generic_attach_sig (part, &(WE[i]), buff);
+ }
+
+ failed |= urj_bus_generic_attach_sig (part, &(RDWR), "RDWR");
+
+ failed |= urj_bus_generic_attach_sig (part, &(RD), "RD");
+
+ failed |= urj_bus_generic_attach_sig (part, &(RDWR2), "RDWR2");
+
+ failed |= urj_bus_generic_attach_sig (part, &(RD2), "RD2");
+
+ if (failed)
+ {
+ urj_bus_generic_free (bus);
+ return NULL;
+ }
+
+ return bus;
+}
+
+/**
+ * bus->driver->(*printinfo)
+ *
+ */
+static void
+sh7750r_bus_printinfo (urj_log_level_t ll, urj_bus_t *bus)
+{
+ int i;
+
+ for (i = 0; i < bus->chain->parts->len; i++)
+ if (bus->part == bus->chain->parts->parts[i])
+ break;
+ urj_log (ll, _("Hitachi SH7750R compatible bus driver via BSR (JTAG part No. %d)\n"),
+ i);
+}
+
+/**
+ * bus->driver->(*area)
+ *
+ */
+static int
+sh7750r_bus_area (urj_bus_t *bus, uint32_t adr, urj_bus_area_t *area)
+{
+ area->description = NULL;
+ area->start = UINT32_C (0x00000000);
+ area->length = UINT64_C (0x100000000);
+ area->width = 32;
+
+ return URJ_STATUS_OK;
+}
+
+static void
+setup_address (urj_bus_t *bus, uint32_t a)
+{
+ int i;
+ urj_part_t *p = bus->part;
+
+ for (i = 0; i < 26; i++)
+ urj_part_set_signal (p, A[i], 1, (a >> i) & 1);
+}
+
+static void
+set_data_in (urj_bus_t *bus)
+{
+ int i;
+ urj_part_t *p = bus->part;
+
+ for (i = 0; i < 32; i++)
+ urj_part_set_signal (p, D[i], 0, 0);
+}
+
+static void
+setup_data (urj_bus_t *bus, uint32_t d)
+{
+ int i;
+ urj_part_t *p = bus->part;
+
+ for (i = 0; i < 32; i++)
+ urj_part_set_signal (p, D[i], 1, (d >> i) & 1);
+}
+
+/**
+ * bus->driver->(*read_start)
+ *
+ */
+static int
+sh7750r_bus_read_start (urj_bus_t *bus, uint32_t adr)
+{
+ urj_part_t *p = bus->part;
+ int cs[8];
+ int i;
+
+ for (i = 0; i < 8; i++)
+ cs[i] = 1;
+ cs[(adr & 0x1C000000) >> 26] = 0;
+
+ urj_part_set_signal (p, CS[0], 1, cs[0]);
+ urj_part_set_signal (p, CS[1], 1, cs[1]);
+ urj_part_set_signal (p, CS[2], 1, cs[2]);
+ urj_part_set_signal (p, CS[3], 1, cs[3]);
+ urj_part_set_signal (p, CS[4], 1, cs[4]);
+ urj_part_set_signal (p, CS[5], 1, cs[5]);
+ urj_part_set_signal (p, CS[6], 1, cs[6]);
+ urj_part_set_signal (p, RDWR, 1, 1);
+ urj_part_set_signal (p, RDWR2, 1, 1);
+ urj_part_set_signal (p, WE[0], 1, 1);
+ urj_part_set_signal (p, WE[1], 1, 1);
+ urj_part_set_signal (p, WE[2], 1, 1);
+ urj_part_set_signal (p, WE[3], 1, 1);
+ urj_part_set_signal (p, RD, 1, 0);
+ urj_part_set_signal (p, RD2, 1, 0);
+
+ setup_address (bus, adr);
+ set_data_in (bus);
+ urj_tap_chain_shift_data_registers (bus->chain, 0);
+
+ return URJ_STATUS_OK;
+}
+
+/**
+ * bus->driver->(*read_next)
+ *
+ */
+static uint32_t
+sh7750r_bus_read_next (urj_bus_t *bus, uint32_t adr)
+{
+ urj_part_t *p = bus->part;
+ int i;
+ uint32_t d = 0;
+
+ setup_address (bus, adr);
+ urj_tap_chain_shift_data_registers (bus->chain, 1);
+
+ for (i = 0; i < 32; i++)
+ d |= (uint32_t) (urj_part_get_signal (p, D[i]) << i);
+
+ return d;
+}
+
+/**
+ * bus->driver->(*read_end)
+ *
+ */
+static uint32_t
+sh7750r_bus_read_end (urj_bus_t *bus)
+{
+ urj_part_t *p = bus->part;
+ int cs[8];
+ int i;
+ uint32_t d = 0;
+
+ for (i = 0; i < 8; i++)
+ cs[i] = 1;
+
+ urj_part_set_signal (p, CS[0], 1, cs[0]);
+ urj_part_set_signal (p, CS[1], 1, cs[1]);
+ urj_part_set_signal (p, CS[2], 1, cs[2]);
+ urj_part_set_signal (p, CS[3], 1, cs[3]);
+ urj_part_set_signal (p, CS[4], 1, cs[4]);
+ urj_part_set_signal (p, CS[5], 1, cs[5]);
+ urj_part_set_signal (p, CS[6], 1, cs[6]);
+
+ urj_part_set_signal (p, RD, 1, 1);
+ urj_part_set_signal (p, RD2, 1, 1);
+ urj_tap_chain_shift_data_registers (bus->chain, 1);
+
+ for (i = 0; i < 32; i++)
+ d |= (uint32_t) (urj_part_get_signal (p, D[i]) << i);
+
+ return d;
+}
+
+/**
+ * bus->driver->(*write)
+ *
+ */
+static void
+sh7750r_bus_write (urj_bus_t *bus, uint32_t adr, uint32_t data)
+{
+ urj_chain_t *chain = bus->chain;
+ urj_part_t *p = bus->part;
+ int cs[8];
+ int i;
+
+ for (i = 0; i < 8; i++)
+ cs[i] = 1;
+ cs[(adr & 0x1C000000) >> 26] = 0;
+
+ urj_part_set_signal (p, CS[0], 1, cs[0]);
+ urj_part_set_signal (p, CS[1], 1, cs[1]);
+ urj_part_set_signal (p, CS[2], 1, cs[2]);
+ urj_part_set_signal (p, CS[3], 1, cs[3]);
+ urj_part_set_signal (p, CS[4], 1, cs[4]);
+ urj_part_set_signal (p, CS[5], 1, cs[5]);
+ urj_part_set_signal (p, CS[6], 1, cs[6]);
+
+ urj_part_set_signal (p, RDWR, 1, 0);
+ urj_part_set_signal (p, RDWR2, 1, 0);
+ urj_part_set_signal (p, WE[0], 1, 1);
+ urj_part_set_signal (p, WE[1], 1, 1);
+ urj_part_set_signal (p, WE[2], 1, 1);
+ urj_part_set_signal (p, WE[3], 1, 1);
+ urj_part_set_signal (p, RD, 1, 1);
+ urj_part_set_signal (p, RD2, 1, 1);
+
+ setup_address (bus, adr);
+ setup_data (bus, data);
+
+ urj_tap_chain_shift_data_registers (chain, 0);
+
+ urj_part_set_signal (p, WE[0], 1, 0);
+ urj_part_set_signal (p, WE[1], 1, 0);
+ urj_part_set_signal (p, WE[2], 1, 0);
+ urj_part_set_signal (p, WE[3], 1, 0);
+
+ urj_tap_chain_shift_data_registers (chain, 0);
+
+ urj_part_set_signal (p, WE[0], 1, 1);
+ urj_part_set_signal (p, WE[1], 1, 1);
+ urj_part_set_signal (p, WE[2], 1, 1);
+ urj_part_set_signal (p, WE[3], 1, 1);
+
+ urj_tap_chain_shift_data_registers (chain, 0);
+}
+
+const urj_bus_driver_t urj_bus_sh7750r_bus = {
+ "sh7750r",
+ N_("Hitachi SH7750R compatible bus driver via BSR"),
+ sh7750r_bus_new,
+ urj_bus_generic_free,
+ sh7750r_bus_printinfo,
+ urj_bus_generic_prepare_extest,
+ sh7750r_bus_area,
+ sh7750r_bus_read_start,
+ sh7750r_bus_read_next,
+ sh7750r_bus_read_end,
+ urj_bus_generic_read,
+ sh7750r_bus_write,
+ urj_bus_generic_no_init
+};
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2003 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Matan Ziv-Av <matan@svgalib.org>, 2003.
+ * Modified by Marcel Telka <marcel@telka.sk>, 2003.
+ *
+ */
+
+#include <sysdep.h>
+
+#include <stdint.h>
+#include <stdlib.h>
+#include <string.h>
+
+#include <urjtag/part.h>
+#include <urjtag/bus.h>
+#include <urjtag/chain.h>
+#include <urjtag/bssignal.h>
+
+#include "buses.h"
+#include "generic_bus.h"
+
+typedef struct
+{
+ urj_part_signal_t *a[26];
+ urj_part_signal_t *d[32];
+ urj_part_signal_t *cs[8];
+ urj_part_signal_t *we[4];
+ urj_part_signal_t *rdwr;
+ urj_part_signal_t *rd;
+ urj_part_signal_t *bs;
+} bus_params_t;
+
+#define A ((bus_params_t *) bus->params)->a
+#define D ((bus_params_t *) bus->params)->d
+#define CS ((bus_params_t *) bus->params)->cs
+#define WE ((bus_params_t *) bus->params)->we
+#define RDWR ((bus_params_t *) bus->params)->rdwr
+#define RD ((bus_params_t *) bus->params)->rd
+#define BS ((bus_params_t *) bus->params)->bs
+
+/**
+ * bus->driver->(*new_bus)
+ *
+ */
+static urj_bus_t *
+sh7751r_bus_new (urj_chain_t *chain, const urj_bus_driver_t *driver,
+ const urj_param_t *cmd_params[])
+{
+ urj_bus_t *bus;
+ urj_part_t *part;
+ char buff[10];
+ int i;
+ int failed = 0;
+
+ bus = urj_bus_generic_new (chain, driver, sizeof (bus_params_t));
+ if (bus == NULL)
+ return NULL;
+ part = bus->part;
+
+ for (i = 0; i < 26; i++)
+ {
+ sprintf (buff, "A%d", i);
+ failed |= urj_bus_generic_attach_sig (part, &(A[i]), buff);
+ }
+
+ for (i = 0; i < 32; i++)
+ {
+ sprintf (buff, "D%d", i);
+ failed |= urj_bus_generic_attach_sig (part, &(D[i]), buff);
+ }
+
+ for (i = 0; i < 7; i++)
+ {
+ sprintf (buff, "CS%d", i);
+ failed |= urj_bus_generic_attach_sig (part, &(CS[i]), buff);
+ }
+
+ for (i = 0; i < 4; i++)
+ {
+ sprintf (buff, "WE%d", i);
+ failed |= urj_bus_generic_attach_sig (part, &(WE[i]), buff);
+ }
+
+ failed |= urj_bus_generic_attach_sig (part, &(RDWR), "RD_WR");
+
+ failed |= urj_bus_generic_attach_sig (part, &(RD), "RD_CASS_FRAME");
+
+ if (failed)
+ {
+ urj_bus_generic_free (bus);
+ return NULL;
+ }
+
+ return bus;
+}
+
+/**
+ * bus->driver->(*printinfo)
+ *
+ */
+static void
+sh7751r_bus_printinfo (urj_log_level_t ll, urj_bus_t *bus)
+{
+ int i;
+
+ for (i = 0; i < bus->chain->parts->len; i++)
+ if (bus->part == bus->chain->parts->parts[i])
+ break;
+ urj_log (ll, _("Hitachi SH7751R compatible bus driver via BSR (JTAG part No. %d)\n"),
+ i);
+}
+
+/**
+ * bus->driver->(*area)
+ *
+ */
+static int
+sh7751r_bus_area (urj_bus_t *bus, uint32_t adr, urj_bus_area_t *area)
+{
+ area->description = NULL;
+ area->start = UINT32_C (0x00000000);
+ area->length = UINT64_C (0x100000000);
+ area->width = 16;
+
+ return URJ_STATUS_OK;
+}
+
+static void
+setup_address (urj_bus_t *bus, uint32_t a)
+{
+ int i;
+ urj_part_t *p = bus->part;
+
+ for (i = 0; i < 26; i++)
+ urj_part_set_signal (p, A[i], 1, (a >> i) & 1);
+}
+
+static void
+set_data_in (urj_bus_t *bus)
+{
+ int i;
+ urj_part_t *p = bus->part;
+
+ for (i = 0; i < 32; i++)
+ urj_part_set_signal (p, D[i], 0, 0);
+}
+
+static void
+setup_data (urj_bus_t *bus, uint32_t d)
+{
+ int i;
+ urj_part_t *p = bus->part;
+
+ for (i = 0; i < 32; i++)
+ urj_part_set_signal (p, D[i], 1, (d >> i) & 1);
+}
+
+/**
+ * bus->driver->(*read_start)
+ *
+ */
+static int
+sh7751r_bus_read_start (urj_bus_t *bus, uint32_t adr)
+{
+ urj_part_t *p = bus->part;
+ int cs[8];
+ int i;
+
+ for (i = 0; i < 8; i++)
+ cs[i] = 1;
+ cs[(adr & 0x1C000000) >> 26] = 0;
+
+ urj_part_set_signal (p, CS[0], 1, cs[0]);
+ urj_part_set_signal (p, CS[1], 1, cs[1]);
+ urj_part_set_signal (p, CS[2], 1, cs[2]);
+ urj_part_set_signal (p, CS[3], 1, cs[3]);
+ urj_part_set_signal (p, CS[4], 1, cs[4]);
+ urj_part_set_signal (p, CS[5], 1, cs[5]);
+ urj_part_set_signal (p, CS[6], 1, cs[6]);
+ urj_part_set_signal (p, RDWR, 1, 1);
+ urj_part_set_signal (p, WE[0], 1, 1);
+ urj_part_set_signal (p, WE[1], 1, 1);
+ urj_part_set_signal (p, WE[2], 1, 1);
+ urj_part_set_signal (p, WE[3], 1, 1);
+ urj_part_set_signal (p, RD, 1, 0);
+
+ setup_address (bus, adr);
+ set_data_in (bus);
+ urj_tap_chain_shift_data_registers (bus->chain, 0);
+
+ return URJ_STATUS_OK;
+}
+
+/**
+ * bus->driver->(*read_next)
+ *
+ */
+static uint32_t
+sh7751r_bus_read_next (urj_bus_t *bus, uint32_t adr)
+{
+ urj_part_t *p = bus->part;
+ int i;
+ uint32_t d = 0;
+
+ setup_address (bus, adr);
+ urj_tap_chain_shift_data_registers (bus->chain, 1);
+
+ for (i = 0; i < 32; i++)
+ d |= (uint32_t) (urj_part_get_signal (p, D[i]) << i);
+
+ return d;
+}
+
+/**
+ * bus->driver->(*read_end)
+ *
+ */
+static uint32_t
+sh7751r_bus_read_end (urj_bus_t *bus)
+{
+ urj_part_t *p = bus->part;
+ int cs[8];
+ int i;
+ uint32_t d = 0;
+
+ for (i = 0; i < 8; i++)
+ cs[i] = 1;
+
+ urj_part_set_signal (p, CS[0], 1, cs[0]);
+ urj_part_set_signal (p, CS[1], 1, cs[1]);
+ urj_part_set_signal (p, CS[2], 1, cs[2]);
+ urj_part_set_signal (p, CS[3], 1, cs[3]);
+ urj_part_set_signal (p, CS[4], 1, cs[4]);
+ urj_part_set_signal (p, CS[5], 1, cs[5]);
+ urj_part_set_signal (p, CS[6], 1, cs[6]);
+
+ urj_part_set_signal (p, RD, 1, 1);
+ urj_tap_chain_shift_data_registers (bus->chain, 1);
+
+ for (i = 0; i < 32; i++)
+ d |= (uint32_t) (urj_part_get_signal (p, D[i]) << i);
+
+ return d;
+}
+
+/**
+ * bus->driver->(*write)
+ *
+ */
+static void
+sh7751r_bus_write (urj_bus_t *bus, uint32_t adr, uint32_t data)
+{
+ urj_chain_t *chain = bus->chain;
+ urj_part_t *p = bus->part;
+ int cs[8];
+ int i;
+
+ for (i = 0; i < 8; i++)
+ cs[i] = 1;
+ cs[(adr & 0x1C000000) >> 26] = 0;
+
+ urj_part_set_signal (p, CS[0], 1, cs[0]);
+ urj_part_set_signal (p, CS[1], 1, cs[1]);
+ urj_part_set_signal (p, CS[2], 1, cs[2]);
+ urj_part_set_signal (p, CS[3], 1, cs[3]);
+ urj_part_set_signal (p, CS[4], 1, cs[4]);
+ urj_part_set_signal (p, CS[5], 1, cs[5]);
+ urj_part_set_signal (p, CS[6], 1, cs[6]);
+
+ urj_part_set_signal (p, RDWR, 1, 0);
+ urj_part_set_signal (p, WE[0], 1, 1);
+ urj_part_set_signal (p, WE[1], 1, 1);
+ urj_part_set_signal (p, WE[2], 1, 1);
+ urj_part_set_signal (p, WE[3], 1, 1);
+ urj_part_set_signal (p, RD, 1, 1);
+
+ setup_address (bus, adr);
+ setup_data (bus, data);
+ urj_tap_chain_shift_data_registers (chain, 0);
+
+ urj_part_set_signal (p, WE[0], 1, 0);
+ urj_part_set_signal (p, WE[1], 1, 0);
+ urj_part_set_signal (p, WE[2], 1, 0);
+ urj_part_set_signal (p, WE[3], 1, 0);
+
+ urj_tap_chain_shift_data_registers (chain, 0);
+
+ urj_part_set_signal (p, WE[0], 1, 1);
+ urj_part_set_signal (p, WE[1], 1, 1);
+ urj_part_set_signal (p, WE[2], 1, 1);
+ urj_part_set_signal (p, WE[3], 1, 1);
+
+ urj_tap_chain_shift_data_registers (chain, 0);
+}
+
+const urj_bus_driver_t urj_bus_sh7751r_bus = {
+ "sh7751r",
+ N_("Hitachi SH7751R compatible bus driver via BSR"),
+ sh7751r_bus_new,
+ urj_bus_generic_free,
+ sh7751r_bus_printinfo,
+ urj_bus_generic_prepare_extest,
+ sh7751r_bus_area,
+ sh7751r_bus_read_start,
+ sh7751r_bus_read_next,
+ sh7751r_bus_read_end,
+ urj_bus_generic_read,
+ sh7751r_bus_write,
+ urj_bus_generic_no_init
+};
--- /dev/null
+/*
+ * $Id$
+ *
+ * Analog Device's SHARC 21065L compatible bus driver via BSR
+ * Copyright (C) 2006 Kila Medical Systems.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Ajith Kumar P.C <ajithpc@kila.com>
+ *
+ * Documentation:
+ * [1] Analog Devices Inc.,"ADSP-21065L SHARC Technical Reference", September 1998
+ * [2] Analog Devices Inc.,"ADSP-21065L SHARC User's Manual", September 1998
+ *
+ */
+
+#include <sysdep.h>
+
+#include <stdlib.h>
+#include <stdint.h>
+#include <string.h>
+
+#include <urjtag/chain.h>
+#include <urjtag/part.h>
+#include <urjtag/bus.h>
+#include <urjtag/bssignal.h>
+
+#include "buses.h"
+#include "generic_bus.h"
+
+//no SDRAM access
+
+typedef struct
+{
+ uint32_t last_adr;
+ urj_part_signal_t *ma[19]; //19 - 512K flash address are used
+ urj_part_signal_t *md[8]; //8 bit data bus connected to Flash are used
+ urj_part_signal_t *bms; //boot memory select
+ urj_part_signal_t *nwe;
+ urj_part_signal_t *noe;
+} bus_params_t;
+
+#define LAST_ADR ((bus_params_t *) bus->params)->last_adr
+#define MA ((bus_params_t *) bus->params)->ma
+#define MD ((bus_params_t *) bus->params)->md
+#define BMS ((bus_params_t *) bus->params)->bms
+#define nWE ((bus_params_t *) bus->params)->nwe
+#define nOE ((bus_params_t *) bus->params)->noe
+
+/**
+ * bus->driver->(*new_bus)
+ *
+ */
+static urj_bus_t *
+sharc_21065L_bus_new (urj_chain_t *chain, const urj_bus_driver_t *driver,
+ const urj_param_t *cmd_params[])
+{
+ urj_bus_t *bus;
+ urj_part_t *part;
+ char buff[15];
+ int i;
+ int failed = 0;
+
+ bus = urj_bus_generic_new (chain, driver, sizeof (bus_params_t));
+ if (bus == NULL)
+ return NULL;
+ part = bus->part;
+
+ for (i = 0; i < 19; i++)
+ {
+ sprintf (buff, "ADDR%d", i);
+ failed |= urj_bus_generic_attach_sig (part, &(MA[i]), buff);
+ }
+
+ for (i = 0; i < 8; i++)
+ {
+ sprintf (buff, "DATA%d", i);
+ failed |= urj_bus_generic_attach_sig (part, &(MD[i]), buff);
+ }
+
+ failed |= urj_bus_generic_attach_sig (part, &(BMS), "BMS_B");
+
+ failed |= urj_bus_generic_attach_sig (part, &(nWE), "WR_B");
+
+ failed |= urj_bus_generic_attach_sig (part, &(nOE), "RD_B");
+
+ if (failed)
+ {
+ urj_bus_generic_free (bus);
+ return NULL;
+ }
+
+ return bus;
+}
+
+/**
+ * bus->driver->(*printinfo)
+ *
+ */
+static void
+sharc_21065L_bus_printinfo (urj_log_level_t ll, urj_bus_t *bus)
+{
+ int i;
+
+ for (i = 0; i < bus->chain->parts->len; i++)
+ if (bus->part == bus->chain->parts->parts[i])
+ break;
+ urj_log (ll, _("Analog Device's SHARC 21065L compatible bus driver via BSR (JTAG part No. %d)\n"),
+ i);
+}
+
+/**
+ * bus->driver->(*area)
+ *
+ */
+static int
+sharc_21065L_bus_area (urj_bus_t *bus, uint32_t adr, urj_bus_area_t *area)
+{
+ /* BMS (512 KB) */
+ if (adr < UINT32_C (0x080000))
+ {
+ area->description = N_("Boot Memory Select");
+ area->start = UINT32_C (0x000000);
+ area->length = UINT64_C (0x080000);
+ area->width = 8;
+
+ return URJ_STATUS_OK;
+ }
+
+ area->description = NULL;
+ area->start = UINT32_C (0xffffffff);
+ area->length = UINT64_C (0x080000);
+ area->width = 0;
+ return URJ_STATUS_OK;
+}
+
+static void
+setup_address (urj_bus_t *bus, uint32_t a)
+{
+ int i;
+ urj_part_t *p = bus->part;
+
+ for (i = 0; i < 19; i++)
+ urj_part_set_signal (p, MA[i], 1, (a >> i) & 1);
+}
+
+static void
+set_data_in (urj_bus_t *bus, uint32_t adr)
+{
+ int i;
+ urj_part_t *p = bus->part;
+ urj_bus_area_t area;
+
+ sharc_21065L_bus_area (bus, adr, &area);
+
+ for (i = 0; i < area.width; i++)
+ urj_part_set_signal (p, MD[i], 0, 0);
+}
+
+
+static void
+setup_data (urj_bus_t *bus, uint32_t adr, uint32_t d)
+{
+ int i;
+ urj_part_t *p = bus->part;
+ urj_bus_area_t area;
+
+ sharc_21065L_bus_area (bus, adr, &area);
+
+ for (i = 0; i < area.width; i++)
+ urj_part_set_signal (p, MD[i], 1, (d >> i) & 1);
+}
+
+/**
+ * bus->driver->(*read_start)
+ *
+ */
+static int
+sharc_21065L_bus_read_start (urj_bus_t *bus, uint32_t adr)
+{
+ urj_chain_t *chain = bus->chain;
+ urj_part_t *p = bus->part;
+
+ LAST_ADR = adr;
+ if (adr >= 0x080000)
+ {
+ urj_error_set (URJ_ERROR_OUT_OF_BOUNDS, "adr 0x%08lx",
+ (long unsigned) adr);
+ return URJ_STATUS_FAIL;
+ }
+
+ urj_part_set_signal (p, BMS, 1, 0);
+ urj_part_set_signal (p, nWE, 1, 1);
+ urj_part_set_signal (p, nOE, 1, 0);
+
+ setup_address (bus, adr);
+ set_data_in (bus, adr);
+
+ urj_tap_chain_shift_data_registers (chain, 0);
+
+ return URJ_STATUS_OK;
+}
+
+/**
+ * bus->driver->(*read_next)
+ *
+ */
+static uint32_t
+sharc_21065L_bus_read_next (urj_bus_t *bus, uint32_t adr)
+{
+ urj_part_t *p = bus->part;
+ urj_chain_t *chain = bus->chain;
+ uint32_t d;
+ //uint32_t old_last_adr = LAST_ADR;
+
+ LAST_ADR = adr;
+
+ if (adr < UINT32_C (0x080000))
+ {
+ int i;
+ urj_bus_area_t area;
+
+ sharc_21065L_bus_area (bus, adr, &area);
+
+
+ setup_address (bus, adr);
+ urj_tap_chain_shift_data_registers (chain, 1);
+
+ d = 0;
+ for (i = 0; i < area.width; i++)
+ d |= (uint32_t) (urj_part_get_signal (p, MD[i]) << i);
+
+ return d;
+ }
+ return 0;
+}
+
+/**
+ * bus->driver->(*read_end)
+ *
+ */
+static uint32_t
+sharc_21065L_bus_read_end (urj_bus_t *bus)
+{
+ urj_part_t *p = bus->part;
+ urj_chain_t *chain = bus->chain;
+
+ if (LAST_ADR < UINT32_C (0x080000))
+ {
+ int i;
+ uint32_t d = 0;
+ urj_bus_area_t area;
+
+ sharc_21065L_bus_area (bus, LAST_ADR, &area);
+
+
+ urj_part_set_signal (p, BMS, 1, 1);
+ urj_part_set_signal (p, nWE, 1, 1);
+ urj_part_set_signal (p, nOE, 1, 1);
+
+ urj_tap_chain_shift_data_registers (chain, 1);
+
+ for (i = 0; i < area.width; i++)
+ d |= (uint32_t) (urj_part_get_signal (p, MD[i]) << i);
+
+ return d;
+ }
+
+ return 0;
+}
+
+/**
+ * bus->driver->(*write)
+ *
+ */
+static void
+sharc_21065L_bus_write (urj_bus_t *bus, uint32_t adr, uint32_t data)
+{
+ urj_part_t *p = bus->part;
+ urj_chain_t *chain = bus->chain;
+
+ if (adr >= 0x080000)
+ return;
+
+
+ urj_part_set_signal (p, BMS, 1, 0);
+ urj_part_set_signal (p, nWE, 1, 1);
+ urj_part_set_signal (p, nOE, 1, 1);
+
+ setup_address (bus, adr);
+ setup_data (bus, adr, data);
+
+ urj_tap_chain_shift_data_registers (chain, 0);
+
+ urj_part_set_signal (p, nWE, 1, 0);
+ urj_tap_chain_shift_data_registers (chain, 0);
+ urj_part_set_signal (p, nWE, 1, 1);
+ urj_tap_chain_shift_data_registers (chain, 0);
+}
+
+const urj_bus_driver_t urj_bus_sharc_21065L_bus = {
+ "SHARC_21065L",
+ N_("SHARC_21065L compatible bus driver via BSR"),
+ sharc_21065L_bus_new,
+ urj_bus_generic_free,
+ sharc_21065L_bus_printinfo,
+ urj_bus_generic_prepare_extest,
+ sharc_21065L_bus_area,
+ sharc_21065L_bus_read_start,
+ sharc_21065L_bus_read_next,
+ sharc_21065L_bus_read_end,
+ urj_bus_generic_read,
+ sharc_21065L_bus_write,
+ urj_bus_generic_no_init
+};
--- /dev/null
+/*
+ * $Id$
+ *
+ * Altera UP3 Education Kit bus driver via BSR
+ * Copyright (C) 2005 Kent Palmkvist
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Kent Palmkvist <kentp@isy.liu.se>, 2005.
+ *
+ * Documentation:
+ * [1] System Level Solutions Inc., "UP3 Education Kit, Reference Manual",
+ *
+ */
+
+#include <sysdep.h>
+
+#include <stdlib.h>
+#include <stdint.h>
+#include <string.h>
+
+#include <urjtag/chain.h>
+#include <urjtag/part.h>
+#include <urjtag/bus.h>
+#include <urjtag/bssignal.h>
+
+#include "buses.h"
+#include "generic_bus.h"
+
+static int databusio[16] =
+ { 94, 96, 98, 100, 102, 104, 106, 113, 95, 97, 99, 101, 103, 105, 107,
+ 114
+};
+static int addrbusio[20] =
+ { 93, 88, 87, 86, 85, 84, 83, 63, 64, 65, 66, 67, 68, 74, 75, 76, 77, 82,
+ 81, 78
+};
+
+typedef struct
+{
+ uint32_t last_adr;
+ urj_part_signal_t *ad[20];
+ urj_part_signal_t *dq[16];
+ urj_part_signal_t *nsdce;
+ urj_part_signal_t *sdclk;
+ urj_part_signal_t *noe;
+ urj_part_signal_t *nsrce;
+ urj_part_signal_t *nflce;
+ urj_part_signal_t *nflbyte;
+ urj_part_signal_t *nflby;
+ urj_part_signal_t *nwe;
+ urj_part_signal_t *lcde;
+ urj_part_signal_t *lcdrs;
+ urj_part_signal_t *lcdrw;
+} bus_params_t;
+
+#define LAST_ADR ((bus_params_t *) bus->params)->last_adr
+#define AD ((bus_params_t *) bus->params)->ad
+#define DQ ((bus_params_t *) bus->params)->dq
+#define nSDce ((bus_params_t *) bus->params)->nsdce
+#define nOE ((bus_params_t *) bus->params)->noe
+#define nSRce ((bus_params_t *) bus->params)->nsrce
+#define nFLce ((bus_params_t *) bus->params)->nflce
+#define nFLbyte ((bus_params_t *) bus->params)->nflbyte
+#define nFLby ((bus_params_t *) bus->params)->nflby
+#define nWE ((bus_params_t *) bus->params)->nwe
+#define SDclk ((bus_params_t *) bus->params)->sdclk
+#define LCDe ((bus_params_t *) bus->params)->lcde
+#define LCDrs ((bus_params_t *) bus->params)->lcdrs
+#define LCDrw ((bus_params_t *) bus->params)->lcdrw
+
+/* All addresses and length are in Bytes */
+/* Assume 8 bit flash data bus */
+#define FLASHSTART UINT32_C(0x0000000)
+#define FLASHSIZE UINT64_C(0x0200000) /* Number of bytes */
+/* Assume 16 bit SRAM data bus */
+#define SRAMSTART 0x0200000
+#define SRAMSIZE 0x0020000
+#define LCDSTART 0x0300000
+#define LCDSIZE 0x0100000
+
+/**
+ * bus->driver->(*new_bus)
+ *
+ */
+static urj_bus_t *
+slsup3_bus_new (urj_chain_t *chain, const urj_bus_driver_t *driver,
+ const urj_param_t *cmd_params[])
+{
+ urj_bus_t *bus;
+ urj_part_t *part;
+ char buff[10];
+ int i;
+ int failed = 0;
+
+ bus = urj_bus_generic_new (chain, driver, sizeof (bus_params_t));
+ if (bus == NULL)
+ return NULL;
+ part = bus->part;
+
+ for (i = 0; i < 20; i++)
+ {
+ sprintf (buff, "IO%d", addrbusio[i]);
+ failed |= urj_bus_generic_attach_sig (part, &(AD[i]), buff);
+ }
+
+ for (i = 0; i < 16; i++)
+ {
+ sprintf (buff, "IO%d", databusio[i]);
+ failed |= urj_bus_generic_attach_sig (part, &(DQ[i]), buff);
+ }
+
+ failed |= urj_bus_generic_attach_sig (part, &(nOE), "IO118");
+
+ failed |= urj_bus_generic_attach_sig (part, &(nSRce), "IO116");
+
+ failed |= urj_bus_generic_attach_sig (part, &(nSDce), "IO119");
+
+ failed |= urj_bus_generic_attach_sig (part, &(nFLce), "IO117");
+
+ failed |= urj_bus_generic_attach_sig (part, &(nFLbyte), "IO115");
+
+ failed |= urj_bus_generic_attach_sig (part, &(nFLby), "IO80");
+
+ failed |= urj_bus_generic_attach_sig (part, &(nWE), "IO79");
+
+ failed |= urj_bus_generic_attach_sig (part, &(SDclk), "IO11");
+
+ failed |= urj_bus_generic_attach_sig (part, &(LCDe), "IO50");
+
+ failed |= urj_bus_generic_attach_sig (part, &(LCDrs), "IO108");
+
+ failed |= urj_bus_generic_attach_sig (part, &(LCDrw), "IO73");
+
+ if (failed)
+ {
+ urj_bus_generic_free (bus);
+ return NULL;
+ }
+
+ return bus;
+}
+
+/**
+ * bus->driver->(*printinfo)
+ *
+ */
+static void
+slsup3_bus_printinfo (urj_log_level_t ll, urj_bus_t *bus)
+{
+ int i;
+
+ for (i = 0; i < bus->chain->parts->len; i++)
+ if (bus->part == bus->chain->parts->parts[i])
+ break;
+ urj_log (ll, _("SLS UP3 bus driver via BSR (JTAG part No. %d)\n"), i);
+}
+
+/**
+ * bus->driver->(*area)
+ *
+ */
+static int
+slsup3_bus_area (urj_bus_t *bus, uint32_t adr, urj_bus_area_t *area)
+{
+ if ((adr >= FLASHSTART) && (adr < (FLASHSTART + FLASHSIZE)))
+ {
+ area->description = N_("Flash Memory (2 MByte) byte mode");
+ area->start = FLASHSTART;
+ area->length = FLASHSIZE;
+ area->width = 8; /* 16 */
+
+ return URJ_STATUS_OK;
+ }
+
+ if ((adr >= SRAMSTART) && (adr < (SRAMSTART + SRAMSIZE)))
+ {
+ area->description = N_("SRAM 128KByte (64K x 16)");
+ area->start = SRAMSTART;
+ area->length = SRAMSIZE;
+ area->width = 16;
+
+ return URJ_STATUS_OK;
+ }
+
+ if ((adr >= LCDSTART) && (adr < (LCDSTART + LCDSIZE)))
+ {
+ area->description = N_("LCD Display (RS select by A0)");
+ area->start = LCDSTART;
+ area->length = LCDSIZE;
+ area->width = 8;
+
+ return URJ_STATUS_OK;
+ }
+
+ area->description = NULL;
+ area->start = UINT32_C (0x0400000);
+ area->length = UINT64_C (0xFFC00000);
+ area->width = 0;
+
+ return URJ_STATUS_OK;
+}
+
+static void
+setup_address (urj_bus_t *bus, uint32_t a)
+{
+ int i;
+ urj_part_t *p = bus->part;
+ urj_bus_area_t area;
+
+ slsup3_bus_area (bus, a, &area);
+ if (area.width > 16)
+ return;
+
+ urj_part_set_signal (p, LCDrs, 1, a & 1);
+
+ /* FLASH memory address setup. Use DQ15 to select byte */
+ if ((a >= (FLASHSTART)) && (a < (FLASHSTART + FLASHSIZE)))
+ {
+ for (i = 0; i < 20; i++)
+ urj_part_set_signal (p, AD[i], 1, (a >> (i + 1)) & 1);
+ urj_part_set_signal (p, nFLce, 1, 0);
+ urj_part_set_signal (p, DQ[15], 1, (a & 1));
+ }
+ else
+ urj_part_set_signal (p, nFLce, 1, 1);
+
+ /* SRAM memory address setup */
+ if ((a >= SRAMSTART) && (a < (SRAMSTART + SRAMSIZE)))
+ {
+ urj_part_set_signal (p, nSRce, 1, 0);
+ for (i = 0; i < 20; i++)
+ urj_part_set_signal (p, AD[i], 1,
+ (a >> (i + (area.width / 8) - 1)) & 1);
+ }
+ else
+ urj_part_set_signal (p, nSRce, 1, 1);
+
+
+}
+
+static void
+set_data_in (urj_bus_t *bus, uint32_t adr)
+{
+ int i;
+ urj_part_t *p = bus->part;
+ urj_bus_area_t area;
+
+ slsup3_bus_area (bus, adr, &area);
+ if (area.width > 16)
+ return;
+
+ for (i = 0; i < area.width; i++)
+ urj_part_set_signal (p, DQ[i], 0, 0);
+}
+
+static void
+setup_data (urj_bus_t *bus, uint32_t adr, uint32_t d)
+{
+ int i;
+ urj_part_t *p = bus->part;
+ urj_bus_area_t area;
+
+ slsup3_bus_area (bus, adr, &area);
+ if (area.width > 16)
+ return;
+
+ for (i = 0; i < area.width; i++)
+ urj_part_set_signal (p, DQ[i], 1, (d >> i) & 1);
+}
+
+static uint32_t
+get_data (urj_bus_t *bus, uint32_t adr)
+{
+ urj_bus_area_t area;
+ int i;
+ uint32_t d = 0;
+ urj_part_t *p = bus->part;
+
+ slsup3_bus_area (bus, adr, &area);
+ if (area.width > 16)
+ return 0;
+
+ for (i = 0; i < area.width; i++)
+ d |= (uint32_t) (urj_part_get_signal (p, DQ[i]) << i);
+
+ return d;
+}
+
+/**
+ * bus->driver->(*read_start)
+ *
+ */
+static int
+slsup3_bus_read_start (urj_bus_t *bus, uint32_t adr)
+{
+ urj_part_t *p = bus->part;
+
+ LAST_ADR = adr;
+
+ urj_part_set_signal (p, nSDce, 1, 1); /* Inihibit SDRAM */
+ urj_part_set_signal (p, nOE, 1, 0);
+ urj_part_set_signal (p, nSRce, 1, 1);
+ urj_part_set_signal (p, nFLce, 1, 1);
+ urj_part_set_signal (p, nFLbyte, 1, 0);
+ urj_part_set_signal (p, nWE, 1, 1);
+ urj_part_set_signal (p, SDclk, 1, 0);
+ urj_part_set_signal (p, LCDe, 1, 0);
+ urj_part_set_signal (p, LCDrw, 1, 1);
+
+ setup_address (bus, adr);
+
+ if ((adr >= LCDSTART) && (adr < (LCDSTART + LCDSIZE)))
+ {
+ urj_part_set_signal (p, LCDe, 1, 1);
+ urj_tap_chain_shift_data_registers (bus->chain, 0);
+ urj_part_set_signal (p, LCDe, 1, 0);
+ }
+
+ set_data_in (bus, adr);
+
+ urj_tap_chain_shift_data_registers (bus->chain, 0);
+
+ return URJ_STATUS_OK;
+}
+
+/**
+ * bus->driver->(*read_next)
+ *
+ */
+static uint32_t
+slsup3_bus_read_next (urj_bus_t *bus, uint32_t adr)
+{
+ uint32_t d;
+
+ urj_part_t *p = bus->part;
+
+ setup_address (bus, adr);
+
+ if ((adr >= LCDSTART) && (adr < (LCDSTART + LCDSIZE)))
+ {
+ urj_part_set_signal (p, LCDe, 1, 1);
+ urj_tap_chain_shift_data_registers (bus->chain, 0);
+ urj_part_set_signal (p, LCDe, 1, 0);
+ }
+
+ urj_tap_chain_shift_data_registers (bus->chain, 1);
+
+ d = get_data (bus, LAST_ADR);
+
+ LAST_ADR = adr;
+
+ return d;
+}
+
+/**
+ * bus->driver->(*read_end)
+ *
+ */
+static uint32_t
+slsup3_bus_read_end (urj_bus_t *bus)
+{
+ urj_part_t *p = bus->part;
+ uint32_t d;
+
+ if ((LAST_ADR >= LCDSTART) && (LAST_ADR < (LCDSTART + LCDSIZE)))
+ {
+ urj_part_set_signal (p, LCDe, 1, 1);
+ urj_tap_chain_shift_data_registers (bus->chain, 0);
+ urj_part_set_signal (p, LCDe, 1, 0);
+ }
+
+ urj_part_set_signal (p, nOE, 1, 1);
+
+ urj_tap_chain_shift_data_registers (bus->chain, 1);
+
+ d = get_data (bus, LAST_ADR);
+
+ return d;
+}
+
+/**
+ * bus->driver->(*write)
+ *
+ */
+static void
+slsup3_bus_write (urj_bus_t *bus, uint32_t adr, uint32_t data)
+{
+ urj_part_t *p = bus->part;
+ urj_chain_t *chain = bus->chain;
+
+ urj_part_set_signal (p, nSDce, 1, 1); /* Inihibit SDRAM */
+ urj_part_set_signal (p, nOE, 1, 1);
+ urj_part_set_signal (p, nSRce, 1, 1);
+ urj_part_set_signal (p, nFLce, 1, 1);
+ urj_part_set_signal (p, nFLbyte, 1, 0);
+ urj_part_set_signal (p, nWE, 1, 1);
+ urj_part_set_signal (p, SDclk, 1, 0);
+ urj_part_set_signal (p, LCDe, 1, 0);
+ urj_part_set_signal (p, LCDrw, 1, 0);
+
+ setup_address (bus, adr);
+ setup_data (bus, adr, data);
+
+ if ((adr >= LCDSTART) && (adr < (LCDSTART + LCDSIZE)))
+ {
+ urj_tap_chain_shift_data_registers (chain, 0);
+ urj_part_set_signal (p, LCDe, 1, 1);
+ urj_tap_chain_shift_data_registers (bus->chain, 0);
+ urj_part_set_signal (p, LCDe, 1, 0);
+ urj_tap_chain_shift_data_registers (bus->chain, 0);
+ }
+ else
+ {
+
+ urj_tap_chain_shift_data_registers (chain, 0);
+
+ urj_part_set_signal (p, nWE, 1, 0);
+ urj_tap_chain_shift_data_registers (chain, 0);
+ urj_part_set_signal (p, nWE, 1, 1);
+ urj_tap_chain_shift_data_registers (chain, 0);
+ }
+}
+
+const urj_bus_driver_t urj_bus_slsup3_bus = {
+ "slsup3",
+ N_("SLS UP3 compatible bus driver via BSR"),
+ slsup3_bus_new,
+ urj_bus_generic_free,
+ slsup3_bus_printinfo,
+ urj_bus_generic_prepare_extest,
+ slsup3_bus_area,
+ slsup3_bus_read_start,
+ slsup3_bus_read_next,
+ slsup3_bus_read_end,
+ urj_bus_generic_read,
+ slsup3_bus_write,
+ urj_bus_generic_no_init
+};
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2003 RightHand Technologies, Inc.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Christian Pellegrin <chri@ascensit.com>, 2003.
+ * Modified by Marcel Telka <marcel@telka.sk>, 2003.
+ * Modified by Andrew Dyer <adyer@righthandtech.com>, 2003.
+ *
+ */
+
+#include <sysdep.h>
+
+#include <stdlib.h>
+#include <stdint.h>
+#include <string.h>
+
+#include <urjtag/part.h>
+#include <urjtag/bus.h>
+#include <urjtag/chain.h>
+#include <urjtag/bssignal.h>
+
+#include "buses.h"
+#include "generic_bus.h"
+
+// FIXME board level write protect is ignored here
+// should be okay because pin isn't implemented
+// on 29LV200 we use now.
+
+typedef struct
+{
+ urj_part_signal_t *oe;
+ urj_part_signal_t *swe;
+ urj_part_signal_t *romce[4];
+ urj_part_signal_t *sdcs[4];
+ urj_part_signal_t *addr[20];
+ urj_part_signal_t *data[16];
+} bus_params_t;
+
+#define OE ((bus_params_t *) bus->params)->oe
+#define SWE ((bus_params_t *) bus->params)->swe
+#define ROMCE ((bus_params_t *) bus->params)->romce
+#define SDCS ((bus_params_t *) bus->params)->sdcs
+#define ADDR ((bus_params_t *) bus->params)->addr
+#define DATA ((bus_params_t *) bus->params)->data
+
+// the number of bytes wide that the TX4925
+// CS0 signal is set to by the external
+// config resistors on A13/A12 at reset
+// 1, 2, or 4 are legal values
+
+#define TX4925_FLASH_CS_WIDTH 2
+
+/**
+ * bus->driver->(*new_bus)
+ *
+ */
+static urj_bus_t *
+tx4925_bus_new (urj_chain_t *chain, const urj_bus_driver_t *driver,
+ const urj_param_t *cmd_params[])
+{
+ urj_bus_t *bus;
+ urj_part_t *part;
+ char buff[15];
+ int i;
+ int failed = 0;
+
+ bus = urj_bus_generic_new (chain, driver, sizeof (bus_params_t));
+ if (bus == NULL)
+ return NULL;
+ part = bus->part;
+
+ failed |= urj_bus_generic_attach_sig (part, &(OE), "OE");
+
+ failed |= urj_bus_generic_attach_sig (part, &(SWE), "SWE");
+
+ for (i = 0; i < 4; i++)
+ {
+ sprintf (buff, "ROMCE_%d", i);
+ failed |= urj_bus_generic_attach_sig (part, &(ROMCE[i]), buff);
+ }
+
+ for (i = 0; i < 4; i++)
+ {
+ sprintf (buff, "SDCS_%d", i);
+ failed |= urj_bus_generic_attach_sig (part, &(SDCS[i]), buff);
+ }
+
+ for (i = 0; i < 20; i++)
+ {
+ sprintf (buff, "ADDR_%d", i);
+ failed |= urj_bus_generic_attach_sig (part, &(ADDR[i]), buff);
+ }
+
+ for (i = 0; i < 16; i++)
+ {
+ sprintf (buff, "DATA_%d", i);
+ failed |= urj_bus_generic_attach_sig (part, &(DATA[i]), buff);
+ }
+
+ if (failed)
+ {
+ urj_bus_generic_free (bus);
+ return NULL;
+ }
+
+ return bus;
+}
+
+/**
+ * bus->driver->(*printinfo)
+ *
+ */
+static void
+tx4925_bus_printinfo (urj_log_level_t ll, urj_bus_t *bus)
+{
+ int i;
+
+ for (i = 0; i < bus->chain->parts->len; i++)
+ if (bus->part == bus->chain->parts->parts[i])
+ break;
+ urj_log (ll, _("Toshiba TX4925 compatible bus driver via BSR (JTAG part No. %d)\n"),
+ i);
+}
+
+/**
+ * bus->driver->(*area)
+ *
+ */
+static int
+tx4925_bus_area (urj_bus_t *bus, uint32_t adr, urj_bus_area_t *area)
+{
+ area->description = NULL;
+ area->start = UINT32_C (0x00000000);
+ area->length = UINT64_C (0x100000000);
+ area->width = 16;
+
+ return URJ_STATUS_OK;
+}
+
+static void
+select_flash (urj_bus_t *bus)
+{
+ urj_part_t *p = bus->part;
+
+ urj_part_set_signal (p, ROMCE[0], 1, 0);
+ urj_part_set_signal (p, ROMCE[1], 1, 1);
+ urj_part_set_signal (p, ROMCE[2], 1, 1);
+ urj_part_set_signal (p, ROMCE[3], 1, 1);
+ urj_part_set_signal (p, SDCS[0], 1, 1);
+ urj_part_set_signal (p, SDCS[1], 1, 1);
+ urj_part_set_signal (p, SDCS[2], 1, 1);
+ urj_part_set_signal (p, SDCS[3], 1, 1);
+}
+
+static void
+unselect_flash (urj_bus_t *bus)
+{
+ urj_part_t *p = bus->part;
+
+ urj_part_set_signal (p, ROMCE[0], 1, 1);
+ urj_part_set_signal (p, ROMCE[1], 1, 1);
+ urj_part_set_signal (p, ROMCE[2], 1, 1);
+ urj_part_set_signal (p, ROMCE[3], 1, 1);
+ urj_part_set_signal (p, SDCS[0], 1, 1);
+ urj_part_set_signal (p, SDCS[1], 1, 1);
+ urj_part_set_signal (p, SDCS[2], 1, 1);
+ urj_part_set_signal (p, SDCS[3], 1, 1);
+}
+
+static void
+setup_address (urj_bus_t *bus, uint32_t a)
+{
+ int i;
+ urj_part_t *p = bus->part;
+ int addr_shift = (TX4925_FLASH_CS_WIDTH / 2);
+
+ for (i = 0; i < 20; i++)
+ urj_part_set_signal (p, ADDR[i], 1, (a >> (i + addr_shift)) & 1);
+}
+
+static void
+set_data_in (urj_bus_t *bus)
+{
+ int i;
+ urj_part_t *p = bus->part;
+
+ for (i = 0; i < 16; i++)
+ urj_part_set_signal (p, DATA[i], 0, 0);
+}
+
+static void
+setup_data (urj_bus_t *bus, uint32_t d)
+{
+ int i;
+ urj_part_t *p = bus->part;
+
+ for (i = 0; i < 16; i++)
+ urj_part_set_signal (p, DATA[i], 1, (d >> i) & 1);
+}
+
+/**
+ * bus->driver->(*read_start)
+ *
+ */
+static int
+tx4925_bus_read_start (urj_bus_t *bus, uint32_t adr)
+{
+ urj_part_t *p = bus->part;
+ urj_chain_t *chain = bus->chain;
+
+ select_flash (bus);
+ setup_address (bus, adr);
+ urj_part_set_signal (p, OE, 1, 0);
+ urj_part_set_signal (p, SWE, 1, 1);
+
+ set_data_in (bus);
+
+ urj_tap_chain_shift_data_registers (chain, 0);
+
+ return URJ_STATUS_OK;
+}
+
+/**
+ * bus->driver->(*read_next)
+ *
+ */
+static uint32_t
+tx4925_bus_read_next (urj_bus_t *bus, uint32_t adr)
+{
+ urj_part_t *p = bus->part;
+ urj_chain_t *chain = bus->chain;
+ int i;
+ uint32_t d = 0;
+
+ setup_address (bus, adr);
+ urj_tap_chain_shift_data_registers (chain, 1);
+
+ for (i = 0; i < 16; i++)
+ d |= (uint32_t) (urj_part_get_signal (p, DATA[i]) << i);
+
+ return d;
+}
+
+/**
+ * bus->driver->(*read_end)
+ *
+ */
+static uint32_t
+tx4925_bus_read_end (urj_bus_t *bus)
+{
+ urj_part_t *p = bus->part;
+ urj_chain_t *chain = bus->chain;
+ int i;
+ uint32_t d = 0;
+
+ unselect_flash (bus);
+ urj_part_set_signal (p, OE, 1, 1);
+ urj_part_set_signal (p, SWE, 1, 1);
+
+ urj_tap_chain_shift_data_registers (chain, 1);
+
+ for (i = 0; i < 16; i++)
+ d |= (uint32_t) (urj_part_get_signal (p, DATA[i]) << i);
+
+ return d;
+}
+
+/**
+ * bus->driver->(*write)
+ *
+ */
+static void
+tx4925_bus_write (urj_bus_t *bus, uint32_t adr, uint32_t data)
+{
+ urj_part_t *p = bus->part;
+ urj_chain_t *chain = bus->chain;
+
+ select_flash (bus);
+ urj_part_set_signal (p, OE, 1, 1);
+
+ setup_address (bus, adr);
+ setup_data (bus, data);
+
+ urj_tap_chain_shift_data_registers (chain, 0);
+
+ urj_part_set_signal (p, SWE, 1, 0);
+ urj_tap_chain_shift_data_registers (chain, 0);
+ urj_part_set_signal (p, SWE, 1, 1);
+ unselect_flash (bus);
+ urj_tap_chain_shift_data_registers (chain, 0);
+}
+
+const urj_bus_driver_t urj_bus_tx4925_bus = {
+ "tx4925",
+ N_("Toshiba TX4925 compatible bus driver via BSR"),
+ tx4925_bus_new,
+ urj_bus_generic_free,
+ tx4925_bus_printinfo,
+ urj_bus_generic_prepare_extest,
+ tx4925_bus_area,
+ tx4925_bus_read_start,
+ tx4925_bus_read_next,
+ tx4925_bus_read_end,
+ urj_bus_generic_read,
+ tx4925_bus_write,
+ urj_bus_generic_no_init
+};
--- /dev/null
+/*
+ * $Id$
+ *
+ * Written by Kent Palmkvist (kentp@isy.liu.se>, 2005.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ *
+ */
+
+#include <sysdep.h>
+
+#include <stdint.h>
+#include <string.h>
+
+#include <urjtag/log.h>
+#include <urjtag/error.h>
+#include <urjtag/bus.h>
+#include <urjtag/flash.h>
+#include <urjtag/jtag.h>
+
+int
+urj_bus_writemem (urj_bus_t *bus, FILE *f, uint32_t addr, uint32_t len)
+{
+ uint32_t step;
+ uint64_t a;
+ size_t bc = 0;
+ int bidx = 0;
+#define BSIZE 4096
+ uint8_t b[BSIZE];
+ urj_bus_area_t area;
+ uint64_t end;
+
+ if (!bus)
+ {
+ urj_error_set (URJ_ERROR_NO_BUS_DRIVER, _("Missing bus driver"));
+ return URJ_STATUS_FAIL;
+ }
+
+ URJ_BUS_PREPARE (bus);
+
+ if (URJ_BUS_AREA (bus, addr, &area) != URJ_STATUS_OK)
+ return URJ_STATUS_FAIL;
+
+ step = area.width / 8;
+
+ if (step == 0)
+ {
+ urj_error_set (URJ_ERROR_INVALID, _("Unknown bus width"));
+ return URJ_STATUS_FAIL;
+ }
+ if (BSIZE % step != 0)
+ {
+ urj_error_set (URJ_ERROR_INVALID, "step %lu must divide BSIZE %d",
+ (long unsigned) step, BSIZE);
+ return URJ_STATUS_FAIL;
+ }
+
+ addr = addr & (~(step - 1));
+ len = (len + step - 1) & (~(step - 1));
+
+ urj_log (URJ_LOG_LEVEL_NORMAL, _("address: 0x%08lX\n"),
+ (long unsigned) addr);
+ urj_log (URJ_LOG_LEVEL_NORMAL, _("length: 0x%08lX\n"),
+ (long unsigned) len);
+
+ if (len == 0)
+ {
+ urj_error_set (URJ_ERROR_INVALID, _("length is 0"));
+ return URJ_STATUS_FAIL;
+ }
+
+ a = addr;
+ end = a + len;
+ urj_log (URJ_LOG_LEVEL_NORMAL, _("writing:\n"));
+
+ for (; a < end; a += step)
+ {
+ uint32_t data;
+ int j;
+
+ /* Read one block of data */
+ if (bc == 0)
+ {
+ urj_log (URJ_LOG_LEVEL_NORMAL, _("addr: 0x%08llX\r"),
+ (long long unsigned) a);
+ bc = fread (b, 1, BSIZE, f);
+ if (bc != BSIZE)
+ {
+ urj_log (URJ_LOG_LEVEL_NORMAL, _("Short read: bc=0x%zX\n"), bc);
+ if (bc < step)
+ {
+ // Not even enough for one step. Something is wrong. Check
+ // the file state and bail out.
+ if (feof (f))
+ urj_error_set (URJ_ERROR_FILEIO,
+ _("Unexpected end of file; Addr: 0x%08llX\n"),
+ (long long unsigned) a);
+ else
+ {
+ urj_error_set (URJ_ERROR_FILEIO, "fread fails");
+ urj_error_state.sys_errno = ferror(f);
+ clearerr(f);
+ }
+
+ return URJ_STATUS_FAIL;
+ }
+ /* else, process what we have read, then return to fread() to
+ * meet the error condition (again) */
+ }
+ bidx = 0;
+ }
+
+ /* Write a word at a time */
+ data = 0;
+ for (j = step; j > 0 && bc > 0; j--)
+ {
+ if (urj_big_endian)
+ {
+ data |= b[bidx++];
+ data <<= 8;
+ }
+ else
+ data |= (b[bidx++] << ((step - j) * 8));
+ bc--;
+ }
+
+ URJ_BUS_WRITE (bus, a, data);
+ }
+
+ urj_log (URJ_LOG_LEVEL_NORMAL, _("\nDone.\n"));
+
+ return URJ_STATUS_OK;
+}
--- /dev/null
+/*
+ * $Id$
+ *
+ * Bus driver for the Zefant-XS3 Board manufactured by Simple Solutions.
+ *
+ * http://www.zefant.de/
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Arnim Laeuger <arniml@users.sourceforge.net>, 2005.
+ *
+ * Notes:
+ * ------
+ * This driver supports the Flash memory of the FPGA module, the
+ * optional SRAMs in the SO-DIMM socket and the serial EEPROM
+ * found on the mini ATX baseboard.
+ *
+ * The external components are assigned different address ranges.
+ * These are arbtitrary but help to distinguish the devices.
+ * Please note that the address ranges reflect a maximum capacity
+ * situation for Flash and EEPROM. The actual chips might provide
+ * a smaller memory array.
+ *
+ * FLASH: 0x00000000 - 0x001FFFFF
+ * RAM0: 0x00200000 - 0x0027FFFF
+ * RAM1: 0x00280000 - 0x002FFFFF
+ * EEPROM: 0x00300000 - 0x0030FFFF
+ * status: 0x00310000 - 0x0031FFFF
+ *
+ * JTAG Tool generates byte addresses when accessing memories. Thus
+ * this driver discards the LSB when the RAM and flash ranges are
+ * addressed. readmem and writemem care for proper address increment
+ * based on the bus width.
+ * On the other hand, this driver reads and writes always one word
+ * (= 2 bytes) from/to the RAMs. It does not use the byte-enables.
+ * This is mainly due to the lack of byte-enable information in the
+ * bus-driver API.
+ *
+ * Remember to clarify the endianess of your data when working with
+ * the memories.
+ *
+ */
+
+#include <sysdep.h>
+
+#include <stdlib.h>
+#include <stdint.h>
+#include <string.h>
+
+#include <urjtag/part.h>
+#include <urjtag/bus.h>
+#include <urjtag/chain.h>
+#include <urjtag/bssignal.h>
+#include <urjtag/tap_state.h>
+
+#include "buses.h"
+#include "generic_bus.h"
+
+/* EEPROM commands */
+#define EEPROM_CMD_WREN 0x06
+#define EEPROM_CMD_WRDI 0x04
+#define EEPROM_CMD_RDSR 0x05
+#define EEPROM_CMD_WRSR 0x01
+#define EEPROM_CMD_READ 0x03
+#define EEPROM_CMD_WRITE 0x02
+
+#define RAM_ADDR_WIDTH 18
+#define RAM_DATA_WIDTH 16
+#define FLASH_ADDR_WIDTH 25
+#define FLASH_DATA_WIDTH 16
+#define EEPROM_ADDR_WIDTH 16
+#define EEPROM_DATA_WIDTH 8
+
+/* length is in number of bytes
+ the full address width is taken to build the power of 2 */
+#define RAM_LENGTH (1 << (RAM_ADDR_WIDTH + 1))
+/* the flash component ignores A0, so address is not doubled here */
+#define FLASH_LENGTH (1 << FLASH_ADDR_WIDTH)
+#define EEPROM_LENGTH (1 << EEPROM_ADDR_WIDTH)
+#define EEPROM_STATUS_LENGTH EEPROM_LENGTH
+
+#define FLASH_START 0
+#define RAM0_START FLASH_LENGTH
+#define RAM1_START (RAM0_START + RAM_LENGTH)
+#define EEPROM_START (RAM1_START + RAM_LENGTH)
+#define EEPROM_STATUS_START (EEPROM_START + EEPROM_LENGTH)
+
+typedef enum
+{ RAM, FLASH, EEPROM, EEPROM_STATUS } ctype_t;
+
+typedef struct
+{
+ ctype_t ctype;
+ char *cname;
+ urj_part_signal_t *a[FLASH_ADDR_WIDTH];
+ urj_part_signal_t *d[RAM_DATA_WIDTH];
+ urj_part_signal_t *ncs;
+ urj_part_signal_t *noe;
+ urj_part_signal_t *nwe;
+ urj_part_signal_t *nlb;
+ urj_part_signal_t *nub;
+ urj_part_signal_t *nbyte;
+ urj_part_signal_t *sts;
+ urj_part_signal_t *nrp;
+ urj_part_signal_t *si;
+ urj_part_signal_t *so;
+ urj_part_signal_t *sck;
+} component_t;
+
+typedef struct
+{
+ uint32_t last_addr; /* holds last address of read or write access */
+ component_t flash;
+ component_t ram0;
+ component_t ram1;
+ component_t eeprom;
+ component_t eeprom_status;
+} bus_params_t;
+
+#define LAST_ADDR ((bus_params_t *) bus->params)->last_addr
+#define A comp->a
+#define D comp->d
+#define nCS comp->ncs
+#define nOE comp->noe
+#define nWE comp->nwe
+#define nLB comp->nlb
+#define nUB comp->nub
+#define nBYTE comp->nbyte
+#define STS comp->sts
+#define nRP comp->nrp
+#define SI comp->si
+#define SO comp->so
+#define SCK comp->sck
+
+#define COMP_FLASH &(((bus_params_t *) bus->params)->flash)
+#define COMP_RAM0 &(((bus_params_t *) bus->params)->ram0)
+#define COMP_RAM1 &(((bus_params_t *) bus->params)->ram1)
+#define COMP_EEPROM &(((bus_params_t *) bus->params)->eeprom)
+#define COMP_EEPROM_STATUS &(((bus_params_t *) bus->params)->eeprom_status)
+
+/**
+ * bus->driver->(*new_bus)
+ *
+ */
+static urj_bus_t *
+zefant_xs3_bus_new (urj_chain_t *chain, const urj_bus_driver_t *driver,
+ const urj_param_t *cmd_params[])
+{
+ urj_bus_t *bus;
+ urj_part_t *part;
+ int failed = 0;
+ component_t *comp;
+ int idx;
+
+ bus = urj_bus_generic_new (chain, driver, sizeof (bus_params_t));
+ if (bus == NULL)
+ return NULL;
+ part = bus->part;
+
+ /*
+ * Setup FLASH
+ */
+ comp = COMP_FLASH;
+ comp->ctype = FLASH;
+ comp->cname = "FLASH";
+
+ failed |= urj_bus_generic_attach_sig (part, &(A[0]), "IO_V9");
+ failed |= urj_bus_generic_attach_sig (part, &(A[1]), "IO_U10");
+ failed |= urj_bus_generic_attach_sig (part, &(A[2]), "IO_V10");
+ failed |= urj_bus_generic_attach_sig (part, &(A[3]), "IO_W10");
+ failed |= urj_bus_generic_attach_sig (part, &(A[4]), "IO_Y10");
+ failed |= urj_bus_generic_attach_sig (part, &(A[5]), "IO_W8");
+ failed |= urj_bus_generic_attach_sig (part, &(A[6]), "IO_W9");
+ failed |= urj_bus_generic_attach_sig (part, &(A[7]), "IO_V8");
+ failed |= urj_bus_generic_attach_sig (part, &(A[8]), "IO_V6");
+ failed |= urj_bus_generic_attach_sig (part, &(A[9]), "IO_AA8");
+ failed |= urj_bus_generic_attach_sig (part, &(A[10]), "IO_AB8");
+ failed |= urj_bus_generic_attach_sig (part, &(A[11]), "IO_U7");
+ failed |= urj_bus_generic_attach_sig (part, &(A[12]), "IO_V7");
+ failed |= urj_bus_generic_attach_sig (part, &(A[13]), "IO_U6");
+ failed |= urj_bus_generic_attach_sig (part, &(A[14]), "IO_Y6");
+ failed |= urj_bus_generic_attach_sig (part, &(A[15]), "IO_AB11");
+ failed |= urj_bus_generic_attach_sig (part, &(A[16]), "IO_AB10");
+ failed |= urj_bus_generic_attach_sig (part, &(A[17]), "IO_AA10");
+ failed |= urj_bus_generic_attach_sig (part, &(A[18]), "IO_W6");
+ failed |= urj_bus_generic_attach_sig (part, &(A[19]), "IO_AA6");
+ failed |= urj_bus_generic_attach_sig (part, &(A[20]), "IO_U11");
+ failed |= urj_bus_generic_attach_sig (part, &(A[21]), "IO_Y13");
+ failed |= urj_bus_generic_attach_sig (part, &(A[22]), "IO_AB13");
+ failed |= urj_bus_generic_attach_sig (part, &(A[23]), "IO_U13");
+ failed |= urj_bus_generic_attach_sig (part, &(A[24]), "IO_AA13");
+
+ failed |= urj_bus_generic_attach_sig (part, &(D[0]), "IO_AA14");
+ failed |= urj_bus_generic_attach_sig (part, &(D[1]), "IO_AB14");
+ failed |= urj_bus_generic_attach_sig (part, &(D[2]), "IO_U12");
+ failed |= urj_bus_generic_attach_sig (part, &(D[3]), "IO_V12");
+ failed |= urj_bus_generic_attach_sig (part, &(D[4]), "IO_W11");
+ failed |= urj_bus_generic_attach_sig (part, &(D[5]), "IO_V11");
+ failed |= urj_bus_generic_attach_sig (part, &(D[6]), "IO_AB9");
+ failed |= urj_bus_generic_attach_sig (part, &(D[7]), "IO_AA9");
+ failed |= urj_bus_generic_attach_sig (part, &(D[8]), "IO_U16");
+ failed |= urj_bus_generic_attach_sig (part, &(D[9]), "IO_AB15");
+ failed |= urj_bus_generic_attach_sig (part, &(D[10]), "IO_AA15");
+ failed |= urj_bus_generic_attach_sig (part, &(D[11]), "IO_W14");
+ failed |= urj_bus_generic_attach_sig (part, &(D[12]), "IO_V14");
+ failed |= urj_bus_generic_attach_sig (part, &(D[13]), "IO_U14");
+ failed |= urj_bus_generic_attach_sig (part, &(D[14]), "IO_W13");
+ failed |= urj_bus_generic_attach_sig (part, &(D[15]), "IO_V13");
+
+ failed |= urj_bus_generic_attach_sig (part, &(nWE), "IO_Y17");
+ failed |= urj_bus_generic_attach_sig (part, &(nOE), "IO_AA17");
+ failed |= urj_bus_generic_attach_sig (part, &(nCS), "IO_U17");
+ nLB = NULL;
+ nUB = NULL;
+
+ failed |= urj_bus_generic_attach_sig (part, &(nRP), "IO_V16");
+ failed |= urj_bus_generic_attach_sig (part, &(nBYTE), "IO_Y16");
+ failed |= urj_bus_generic_attach_sig (part, &(STS), "IO_W16");
+
+ SI = NULL;
+ SO = NULL;
+ SCK = NULL;
+
+ /*
+ * Setup SO-DIMM SRAM0
+ */
+ comp = COMP_RAM0;
+ comp->ctype = RAM;
+ comp->cname = "RAM0";
+
+ failed |= urj_bus_generic_attach_sig (part, &(A[0]), "IO_AA4");
+ failed |= urj_bus_generic_attach_sig (part, &(A[1]), "IO_AB4");
+ failed |= urj_bus_generic_attach_sig (part, &(A[2]), "IO_W5");
+ failed |= urj_bus_generic_attach_sig (part, &(A[3]), "IO_Y3");
+ failed |= urj_bus_generic_attach_sig (part, &(A[4]), "IO_Y1");
+ failed |= urj_bus_generic_attach_sig (part, &(A[5]), "IO_M1");
+ failed |= urj_bus_generic_attach_sig (part, &(A[6]), "IO_N2");
+ failed |= urj_bus_generic_attach_sig (part, &(A[7]), "IO_L2");
+ failed |= urj_bus_generic_attach_sig (part, &(A[8]), "IO_L1");
+ failed |= urj_bus_generic_attach_sig (part, &(A[9]), "IO_K1");
+ failed |= urj_bus_generic_attach_sig (part, &(A[10]), "IO_K3");
+ failed |= urj_bus_generic_attach_sig (part, &(A[11]), "IO_L6");
+ failed |= urj_bus_generic_attach_sig (part, &(A[12]), "IO_L4");
+ failed |= urj_bus_generic_attach_sig (part, &(A[13]), "IO_L3");
+ failed |= urj_bus_generic_attach_sig (part, &(A[14]), "IO_K4");
+ failed |= urj_bus_generic_attach_sig (part, &(A[15]), "IO_AB5");
+ failed |= urj_bus_generic_attach_sig (part, &(A[16]), "IO_AA5");
+ failed |= urj_bus_generic_attach_sig (part, &(A[17]), "IO_Y5");
+ A[18] = NULL;
+ A[19] = NULL;
+ A[20] = NULL;
+ A[21] = NULL;
+ A[22] = NULL;
+ A[23] = NULL;
+ A[24] = NULL;
+
+ failed |= urj_bus_generic_attach_sig (part, &(D[0]), "IO_W1");
+ failed |= urj_bus_generic_attach_sig (part, &(D[1]), "IO_V5");
+ failed |= urj_bus_generic_attach_sig (part, &(D[2]), "IO_V3");
+ failed |= urj_bus_generic_attach_sig (part, &(D[3]), "IO_V1");
+ failed |= urj_bus_generic_attach_sig (part, &(D[4]), "IO_N1");
+ failed |= urj_bus_generic_attach_sig (part, &(D[5]), "IO_N3");
+ failed |= urj_bus_generic_attach_sig (part, &(D[6]), "IO_M2");
+ failed |= urj_bus_generic_attach_sig (part, &(D[7]), "IO_M5");
+ failed |= urj_bus_generic_attach_sig (part, &(D[8]), "IO_M4");
+ failed |= urj_bus_generic_attach_sig (part, &(D[9]), "IO_M6");
+ failed |= urj_bus_generic_attach_sig (part, &(D[10]), "IO_L5");
+ failed |= urj_bus_generic_attach_sig (part, &(D[11]), "IO_N4");
+ failed |= urj_bus_generic_attach_sig (part, &(D[12]), "IO_T6");
+ failed |= urj_bus_generic_attach_sig (part, &(D[13]), "IO_V2");
+ failed |= urj_bus_generic_attach_sig (part, &(D[14]), "IO_V4");
+ failed |= urj_bus_generic_attach_sig (part, &(D[15]), "IO_U5");
+
+ failed |= urj_bus_generic_attach_sig (part, &(nCS), "IO_W3");
+ failed |= urj_bus_generic_attach_sig (part, &(nOE), "IO_Y2");
+ failed |= urj_bus_generic_attach_sig (part, &(nWE), "IO_M3");
+ failed |= urj_bus_generic_attach_sig (part, &(nLB), "IO_W2");
+ failed |= urj_bus_generic_attach_sig (part, &(nUB), "IO_W4");
+ nRP = NULL;
+ nBYTE = NULL;
+ STS = NULL;
+
+ SI = NULL;
+ SO = NULL;
+ SCK = NULL;
+
+ /*
+ * Setup SO-DIMM SRAM1
+ */
+ comp = COMP_RAM1;
+ comp->ctype = RAM;
+ comp->cname = "RAM1";
+
+ failed |= urj_bus_generic_attach_sig (part, &(A[0]), "IO_H5");
+ failed |= urj_bus_generic_attach_sig (part, &(A[1]), "IO_F5");
+ failed |= urj_bus_generic_attach_sig (part, &(A[2]), "IO_F2");
+ failed |= urj_bus_generic_attach_sig (part, &(A[3]), "IO_D1");
+ failed |= urj_bus_generic_attach_sig (part, &(A[4]), "IO_E1");
+ failed |= urj_bus_generic_attach_sig (part, &(A[5]), "IO_F10");
+ failed |= urj_bus_generic_attach_sig (part, &(A[6]), "IO_C7");
+ failed |= urj_bus_generic_attach_sig (part, &(A[7]), "IO_C10");
+ failed |= urj_bus_generic_attach_sig (part, &(A[8]), "IO_A10");
+ failed |= urj_bus_generic_attach_sig (part, &(A[9]), "IO_B10");
+ failed |= urj_bus_generic_attach_sig (part, &(A[10]), "IO_F11");
+ failed |= urj_bus_generic_attach_sig (part, &(A[11]), "IO_A9");
+ failed |= urj_bus_generic_attach_sig (part, &(A[12]), "IO_B9");
+ failed |= urj_bus_generic_attach_sig (part, &(A[13]), "IO_B8");
+ failed |= urj_bus_generic_attach_sig (part, &(A[14]), "IO_F9");
+ failed |= urj_bus_generic_attach_sig (part, &(A[15]), "IO_F4");
+ failed |= urj_bus_generic_attach_sig (part, &(A[16]), "IO_G6");
+ failed |= urj_bus_generic_attach_sig (part, &(A[17]), "IO_G5");
+ A[18] = NULL;
+ A[19] = NULL;
+ A[20] = NULL;
+ A[21] = NULL;
+ A[22] = NULL;
+ A[23] = NULL;
+ A[24] = NULL;
+
+ failed |= urj_bus_generic_attach_sig (part, &(D[0]), "IO_C1");
+ failed |= urj_bus_generic_attach_sig (part, &(D[1]), "IO_E2");
+ failed |= urj_bus_generic_attach_sig (part, &(D[2]), "IO_C2");
+ failed |= urj_bus_generic_attach_sig (part, &(D[3]), "IO_C3");
+ failed |= urj_bus_generic_attach_sig (part, &(D[4]), "IO_B5");
+ failed |= urj_bus_generic_attach_sig (part, &(D[5]), "IO_A5");
+ failed |= urj_bus_generic_attach_sig (part, &(D[6]), "IO_B6");
+ failed |= urj_bus_generic_attach_sig (part, &(D[7]), "IO_D7");
+ failed |= urj_bus_generic_attach_sig (part, &(D[8]), "IO_D9");
+ failed |= urj_bus_generic_attach_sig (part, &(D[9]), "IO_E9");
+ failed |= urj_bus_generic_attach_sig (part, &(D[10]), "IO_F7");
+ failed |= urj_bus_generic_attach_sig (part, &(D[11]), "IO_E7");
+ failed |= urj_bus_generic_attach_sig (part, &(D[12]), "IO_D5");
+ failed |= urj_bus_generic_attach_sig (part, &(D[13]), "IO_C4");
+ failed |= urj_bus_generic_attach_sig (part, &(D[14]), "IO_D3");
+ failed |= urj_bus_generic_attach_sig (part, &(D[15]), "IO_D4");
+
+ failed |= urj_bus_generic_attach_sig (part, &(nCS), "IO_D2");
+ failed |= urj_bus_generic_attach_sig (part, &(nOE), "IO_F3");
+ failed |= urj_bus_generic_attach_sig (part, &(nWE), "IO_E10");
+ failed |= urj_bus_generic_attach_sig (part, &(nLB), "IO_E4");
+ failed |= urj_bus_generic_attach_sig (part, &(nUB), "IO_E3");
+ nRP = NULL;
+ nBYTE = NULL;
+ STS = NULL;
+
+ SI = NULL;
+ SO = NULL;
+ SCK = NULL;
+
+ /*
+ * Setup EEPROM
+ */
+ comp = COMP_EEPROM;
+ comp->ctype = EEPROM;
+ comp->cname = "EEPROM";
+
+ failed |= urj_bus_generic_attach_sig (part, &(SI), "IO_H19");
+ failed |= urj_bus_generic_attach_sig (part, &(SO), "IO_J21");
+ failed |= urj_bus_generic_attach_sig (part, &(SCK), "IO_H21");
+ failed |= urj_bus_generic_attach_sig (part, &(nCS), "IO_K22");
+
+ for (idx = 0; idx < FLASH_ADDR_WIDTH; idx++)
+ A[idx] = NULL;
+ for (idx = 0; idx < RAM_DATA_WIDTH; idx++)
+ D[idx] = NULL;
+ nOE = NULL;
+ nWE = NULL;
+ nLB = NULL;
+ nUB = NULL;
+ nRP = NULL;
+ nBYTE = NULL;
+ STS = NULL;
+
+ /*
+ * Setup EEPROM Status
+ * copy settings from EEPROM
+ */
+ ((bus_params_t *) bus->params)->eeprom_status =
+ ((bus_params_t *) bus->params)->eeprom;
+ comp = COMP_EEPROM_STATUS;
+ comp->ctype = EEPROM_STATUS;
+ comp->cname = "EEPROM Status";
+
+
+ if (failed)
+ {
+ urj_bus_generic_free (bus);
+ return NULL;
+ }
+
+ return bus;
+}
+
+/**
+ * bus->driver->(*printinfo)
+ *
+ */
+static void
+zefant_xs3_bus_printinfo (urj_log_level_t ll, urj_bus_t *bus)
+{
+ int i;
+
+ for (i = 0; i < bus->chain->parts->len; i++)
+ if (bus->part == bus->chain->parts->parts[i])
+ break;
+ urj_log (ll, _("Simple Solutions Zefant-XS3 Board compatible bus driver via BSR (JTAG part No. %d)\n"),
+ i);
+}
+
+static void
+setup_address (urj_bus_t *bus, uint32_t a, component_t *comp)
+{
+ int i;
+ urj_part_t *p = bus->part;
+ int addr_width;
+
+ LAST_ADDR = a;
+
+ switch (comp->ctype)
+ {
+ case FLASH:
+ addr_width = FLASH_ADDR_WIDTH;
+ /* address a is a byte address,
+ A0 is ignored by the flash chip */
+ break;
+ case RAM:
+ addr_width = RAM_ADDR_WIDTH;
+ /* address a is a byte address so it is transferred into
+ a word address here */
+ a >>= 1;
+ break;
+ case EEPROM:
+ case EEPROM_STATUS:
+ addr_width = EEPROM_ADDR_WIDTH;
+ break;
+ default:
+ addr_width = 0;
+ break;
+ }
+
+ for (i = 0; i < addr_width; i++)
+ urj_part_set_signal (p, A[i], 1, (a >> i) & 1);
+}
+
+static int
+detect_data_width (component_t *comp)
+{
+ int width;
+
+ switch (comp->ctype)
+ {
+ case RAM:
+ width = RAM_DATA_WIDTH;
+ break;
+ case FLASH:
+ width = FLASH_DATA_WIDTH;
+ break;
+ case EEPROM:
+ case EEPROM_STATUS:
+ width = EEPROM_DATA_WIDTH;
+ break;
+ default:
+ width = 0;
+ break;
+ }
+
+ return width;
+}
+
+static void
+set_data_in (urj_bus_t *bus, component_t *comp)
+{
+ int i;
+ urj_part_t *p = bus->part;
+ int width;
+
+ width = detect_data_width (comp);
+
+ for (i = 0; i < width; i++)
+ urj_part_set_signal (p, D[i], 0, 0);
+}
+
+static void
+setup_data (urj_bus_t *bus, uint32_t d, component_t *comp)
+{
+ int i;
+ urj_part_t *p = bus->part;
+ int width;
+
+ width = detect_data_width (comp);
+
+ for (i = 0; i < width; i++)
+ urj_part_set_signal (p, D[i], 1, (d >> i) & 1);
+}
+
+static uint8_t
+eeprom_shift_byte (urj_chain_t *chain, urj_part_t *p, component_t *comp,
+ uint8_t byte)
+{
+ int pos;
+ uint8_t so_data = 0x00;
+
+ for (pos = 7; pos >= 0; pos--)
+ {
+ /* set clock to 0 */
+ urj_part_set_signal (p, SCK, 1, 0);
+ /* apply data bit */
+ urj_part_set_signal (p, SI, 1, (byte >> pos) & 0x01);
+ /* commit signals */
+ urj_tap_chain_shift_data_registers (chain, 1);
+
+ /* set clock to 1 */
+ urj_part_set_signal (p, SCK, 1, 1);
+ /* commit signals */
+ urj_tap_chain_shift_data_registers (chain, 1);
+
+ /* read data on SO that was asserted by device after SCK went 0 */
+ so_data |= (uint8_t) (urj_part_get_signal (p, SO) << pos);
+ }
+
+ return so_data;
+}
+
+static void
+eeprom_disable_device (urj_chain_t *chain, urj_part_t *p, component_t *comp)
+{
+ /* ensure that SCK is low before disabling device */
+ urj_part_set_signal (p, SCK, 1, 0);
+ urj_tap_chain_shift_data_registers (chain, 0);
+
+ /* finally disable device */
+ urj_part_set_signal (p, nCS, 1, 1);
+ urj_tap_chain_shift_data_registers (chain, 0);
+}
+
+/**
+ * bus->driver->(*init)
+ *
+ */
+static int
+zefant_xs3_bus_init (urj_bus_t *bus)
+{
+ urj_part_t *p = bus->part;
+ urj_chain_t *chain = bus->chain;
+ component_t *comp;
+
+ if (urj_tap_state (chain) != URJ_TAP_STATE_RUN_TEST_IDLE)
+ {
+ /* silently skip initialization if TAP isn't in RUNTEST/IDLE state
+ this is required to avoid interfering with detect when initbus
+ is contained in the part description file
+ URJ_BUS_INIT() will be called latest by URJ_BUS_PREPARE() */
+ return URJ_STATUS_OK;
+ }
+
+ /* Preload update registers */
+
+ urj_part_set_instruction (p, "SAMPLE/PRELOAD");
+ urj_tap_chain_shift_instructions (chain);
+
+ /* FLASH */
+ comp = COMP_FLASH;
+ setup_data (bus, 0, comp);
+ urj_part_set_signal (p, nCS, 1, 1);
+ urj_part_set_signal (p, nWE, 1, 1);
+ urj_part_set_signal (p, nOE, 1, 1);
+ urj_part_set_signal (p, nRP, 1, 1);
+ urj_part_set_signal (p, nBYTE, 1, 1);
+ urj_part_set_signal (p, STS, 0, 0);
+
+ /* RAM0 */
+ comp = COMP_RAM0;
+ setup_data (bus, 0, comp);
+ urj_part_set_signal (p, nCS, 1, 1);
+ urj_part_set_signal (p, nWE, 1, 1);
+ urj_part_set_signal (p, nOE, 1, 1);
+ urj_part_set_signal (p, nLB, 1, 1);
+ urj_part_set_signal (p, nUB, 1, 1);
+
+ /* RAM1 */
+ comp = COMP_RAM1;
+ setup_data (bus, 0, comp);
+ urj_part_set_signal (p, nCS, 1, 1);
+ urj_part_set_signal (p, nWE, 1, 1);
+ urj_part_set_signal (p, nOE, 1, 1);
+ urj_part_set_signal (p, nLB, 1, 1);
+ urj_part_set_signal (p, nUB, 1, 1);
+
+ /* EEPROM */
+ comp = COMP_EEPROM;
+ urj_part_set_signal (p, SI, 1, 0);
+ urj_part_set_signal (p, SO, 0, 0);
+ urj_part_set_signal (p, SCK, 1, 0);
+ urj_part_set_signal (p, nCS, 1, 1);
+
+ /* EEPROM Status */
+ comp = COMP_EEPROM_STATUS;
+ urj_part_set_signal (p, SI, 1, 0);
+ urj_part_set_signal (p, SO, 0, 0);
+ urj_part_set_signal (p, SCK, 1, 0);
+ urj_part_set_signal (p, nCS, 1, 1);
+
+ urj_tap_chain_shift_data_registers (chain, 0);
+
+ bus->initialized = 1;
+
+ return URJ_STATUS_OK;
+}
+
+static int
+comp_bus_area (urj_bus_t *bus, uint32_t adr, urj_bus_area_t *area,
+ component_t **comp)
+{
+ if (adr < RAM0_START)
+ {
+ area->description = "FLASH Component";
+ area->start = FLASH_START;
+ area->length = FLASH_LENGTH;
+ area->width = FLASH_DATA_WIDTH;
+ *comp = COMP_FLASH;
+ }
+ else if (adr < RAM1_START)
+ {
+ area->description = "SO-DIMM RAM0 Component";
+ area->start = RAM0_START;
+ area->length = RAM_LENGTH;
+ area->width = RAM_DATA_WIDTH;
+ *comp = COMP_RAM0;
+ }
+ else if (adr < EEPROM_START)
+ {
+ area->description = "SO-DIMM RAM1 Component";
+ area->start = RAM1_START;
+ area->length = RAM_LENGTH;
+ area->width = RAM_DATA_WIDTH;
+ *comp = COMP_RAM1;
+ }
+ else if (adr < EEPROM_STATUS_START)
+ {
+ area->description = "EEPROM Component";
+ area->start = EEPROM_START;
+ area->length = EEPROM_LENGTH;
+ area->width = EEPROM_DATA_WIDTH;
+ *comp = COMP_EEPROM;
+ }
+ else if (adr < EEPROM_STATUS_START + EEPROM_STATUS)
+ {
+ area->description = "EEPROM Component Status";
+ area->start = EEPROM_STATUS_START;
+ area->length = EEPROM_LENGTH;
+ area->width = EEPROM_DATA_WIDTH;
+ *comp = COMP_EEPROM_STATUS;
+ }
+ else
+ {
+ area->description = "Dummy";
+ area->start = FLASH_LENGTH + 2 * RAM_LENGTH + 2 * EEPROM_LENGTH;
+ area->length = UINT64_C (0x100000000);
+ area->width = 0;
+ *comp = NULL;
+ }
+
+ return URJ_STATUS_OK;
+}
+
+/**
+ * bus->driver->(*area)
+ *
+ */
+static int
+zefant_xs3_bus_area (urj_bus_t *bus, uint32_t adr, urj_bus_area_t *area)
+{
+ component_t *comp;
+
+ return comp_bus_area (bus, adr, area, &comp);
+}
+
+/**
+ * bus->driver->(*read_start)
+ *
+ */
+static int
+zefant_xs3_bus_read_start (urj_bus_t *bus, uint32_t adr)
+{
+ urj_part_t *p = bus->part;
+ urj_chain_t *chain = bus->chain;
+ urj_bus_area_t area;
+ component_t *comp;
+ uint8_t cmd = EEPROM_CMD_READ;
+
+ comp_bus_area (bus, adr, &area, &comp);
+ if (!comp)
+ {
+ urj_error_set (URJ_ERROR_OUT_OF_BOUNDS, _("Address out of range"));
+ LAST_ADDR = adr;
+ return URJ_STATUS_FAIL;
+ }
+
+ /* determine proper address setup strategy for component */
+ switch (comp->ctype)
+ {
+ case FLASH:
+ case RAM:
+ urj_part_set_signal (p, nCS, 1, 0);
+ urj_part_set_signal (p, nWE, 1, 1);
+ urj_part_set_signal (p, nOE, 1, 0);
+ if (comp->ctype == RAM)
+ {
+ urj_part_set_signal (p, nLB, 1, 0);
+ urj_part_set_signal (p, nUB, 1, 0);
+ }
+
+ setup_address (bus, adr, comp);
+ set_data_in (bus, comp);
+
+ urj_tap_chain_shift_data_registers (chain, 0);
+
+ break;
+
+ case EEPROM_STATUS:
+ cmd = EEPROM_CMD_RDSR;
+ /* fall through */
+ case EEPROM:
+ /* enable device */
+ urj_part_set_signal (p, nCS, 1, 0);
+
+ /* shift command */
+ eeprom_shift_byte (chain, p, comp, cmd);
+
+ if (comp->ctype == EEPROM)
+ {
+ /* send address high part */
+ eeprom_shift_byte (chain, p, comp, (adr >> 8) & 0xff);
+ /* send address low part */
+ eeprom_shift_byte (chain, p, comp, adr & 0xff);
+ }
+
+ LAST_ADDR = adr;
+ break;
+
+ default:
+ urj_error_set (URJ_ERROR_UNSUPPORTED,
+ _("Component type not supported"));
+ return URJ_STATUS_FAIL;
+ }
+
+ return URJ_STATUS_OK;
+}
+
+/**
+ * bus->driver->(*read_next)
+ *
+ */
+static uint32_t
+zefant_xs3_bus_read_next (urj_bus_t *bus, uint32_t adr)
+{
+ urj_part_t *p = bus->part;
+ urj_chain_t *chain = bus->chain;
+ int i;
+ uint32_t d = 0;
+ urj_bus_area_t area;
+ component_t *comp;
+
+ comp_bus_area (bus, adr, &area, &comp);
+ if (!comp)
+ {
+ urj_error_set (URJ_ERROR_OUT_OF_BOUNDS, _("Address out of range"));
+ LAST_ADDR = adr;
+ return 0;
+ }
+
+ /* determine proper read strategy for component */
+ switch (comp->ctype)
+ {
+ case FLASH:
+ case RAM:
+ setup_address (bus, adr, comp);
+ urj_tap_chain_shift_data_registers (chain, 1);
+
+ for (i = 0; i < area.width; i++)
+ d |= (uint32_t) (urj_part_get_signal (p, D[i]) << i);
+
+ break;
+
+ case EEPROM_STATUS:
+ case EEPROM:
+ /* read next byte */
+ d = (uint32_t) eeprom_shift_byte (chain, p, comp, 0x00);
+ break;
+
+ default:
+ urj_error_set (URJ_ERROR_UNSUPPORTED,
+ _("Component type not supported"));
+ break;
+ }
+
+ return d;
+}
+
+/**
+ * bus->driver->(*read_end)
+ *
+ */
+static uint32_t
+zefant_xs3_bus_read_end (urj_bus_t *bus)
+{
+ urj_part_t *p = bus->part;
+ urj_chain_t *chain = bus->chain;
+ int i;
+ uint32_t d = 0;
+ urj_bus_area_t area;
+ component_t *comp;
+
+ /* use last address of access to determine component */
+ comp_bus_area (bus, LAST_ADDR, &area, &comp);
+ if (!comp)
+ {
+ urj_error_set (URJ_ERROR_OUT_OF_BOUNDS, _("Address out of range"));
+ return 0;
+ }
+
+ /* determine proper read strategy for component */
+ switch (comp->ctype)
+ {
+ case FLASH:
+ case RAM:
+ urj_part_set_signal (p, nCS, 1, 1);
+ urj_part_set_signal (p, nOE, 1, 1);
+ if (comp->ctype == RAM)
+ {
+ urj_part_set_signal (p, nLB, 1, 1);
+ urj_part_set_signal (p, nUB, 1, 1);
+ }
+ urj_tap_chain_shift_data_registers (chain, 1);
+
+ for (i = 0; i < area.width; i++)
+ d |= (uint32_t) (urj_part_get_signal (p, D[i]) << i);
+
+ break;
+
+ case EEPROM_STATUS:
+ case EEPROM:
+ /* read final byte */
+ d = (uint32_t) eeprom_shift_byte (chain, p, comp, 0x00);
+ eeprom_disable_device (chain, p, comp);
+
+ break;
+
+ default:
+ urj_error_set (URJ_ERROR_UNSUPPORTED,
+ _("Component type not supported"));
+ break;
+ }
+
+ return d;
+}
+
+/**
+ * bus->driver->(*write)
+ *
+ */
+static void
+zefant_xs3_bus_write (urj_bus_t *bus, uint32_t adr, uint32_t data)
+{
+ urj_part_t *p = bus->part;
+ urj_chain_t *chain = bus->chain;
+ urj_bus_area_t area;
+ component_t *comp;
+ uint8_t cmd = EEPROM_CMD_WRITE;
+
+ comp_bus_area (bus, adr, &area, &comp);
+ if (!comp)
+ {
+ urj_error_set (URJ_ERROR_OUT_OF_BOUNDS, _("Address out of range"));
+ return;
+ }
+
+ switch (comp->ctype)
+ {
+ case FLASH:
+ case RAM:
+ urj_part_set_signal (p, nCS, 1, 0);
+ urj_part_set_signal (p, nWE, 1, 1);
+ urj_part_set_signal (p, nOE, 1, 1);
+ if (comp->ctype == RAM)
+ {
+ urj_part_set_signal (p, nLB, 1, 0);
+ urj_part_set_signal (p, nUB, 1, 0);
+ }
+
+ setup_address (bus, adr, comp);
+ setup_data (bus, data, comp);
+
+ urj_tap_chain_shift_data_registers (chain, 0);
+
+ urj_part_set_signal (p, nWE, 1, 0);
+ urj_tap_chain_shift_data_registers (chain, 0);
+ urj_part_set_signal (p, nWE, 1, 1);
+ urj_part_set_signal (p, nCS, 1, 1);
+ if (comp->ctype == RAM)
+ {
+ urj_part_set_signal (p, nLB, 1, 1);
+ urj_part_set_signal (p, nUB, 1, 1);
+ }
+ urj_tap_chain_shift_data_registers (chain, 0);
+
+ break;
+
+ case EEPROM_STATUS:
+ cmd = EEPROM_CMD_WRSR;
+ /* fall through */
+ case EEPROM:
+ /*
+ * Step 1:
+ * Poll status register and ensure that device is ready.
+ */
+ urj_part_set_signal (p, nCS, 1, 0);
+
+ /* poll status register for nRDY */
+ do
+ {
+ eeprom_shift_byte (chain, p, comp, EEPROM_CMD_RDSR);
+ }
+ while (eeprom_shift_byte (chain, p, comp, 0x00) & 0x01);
+
+ eeprom_disable_device (chain, p, comp);
+
+
+ /*
+ * Step 2:
+ * Enable writing.
+ */
+ urj_part_set_signal (p, nCS, 1, 0);
+
+ /* enable writing */
+ eeprom_shift_byte (chain, p, comp, EEPROM_CMD_WREN);
+
+ eeprom_disable_device (chain, p, comp);
+
+
+ /*
+ * Step 3:
+ * Write data to device.
+ */
+ urj_part_set_signal (p, nCS, 1, 0);
+
+ /* send command
+ command code has been determined by component type */
+ eeprom_shift_byte (chain, p, comp, cmd);
+
+ if (comp->ctype == EEPROM)
+ {
+ /* send address high part */
+ eeprom_shift_byte (chain, p, comp, (adr >> 8) & 0xff);
+ /* send address low part */
+ eeprom_shift_byte (chain, p, comp, adr & 0xff);
+ }
+
+ /* send data to be written */
+ eeprom_shift_byte (chain, p, comp, (uint8_t) (data & 0xff));
+
+ eeprom_disable_device (chain, p, comp);
+
+ break;
+
+ default:
+ urj_error_set (URJ_ERROR_UNSUPPORTED,
+ _("Component type not supported"));
+ break;
+ }
+}
+
+const urj_bus_driver_t urj_bus_zefant_xs3_bus = {
+ "zefant-xs3",
+ N_("Simple Solutions Zefant-XS3 Board compatible bus driver via BSR"),
+ zefant_xs3_bus_new,
+ urj_bus_generic_free,
+ zefant_xs3_bus_printinfo,
+ urj_bus_generic_prepare_extest,
+ zefant_xs3_bus_area,
+ zefant_xs3_bus_read_start,
+ zefant_xs3_bus_read_next,
+ zefant_xs3_bus_read_end,
+ urj_bus_generic_read,
+ zefant_xs3_bus_write,
+ zefant_xs3_bus_init
+};
+
+
+/*
+ Local Variables:
+ mode:C
+ tab-width:2
+ indent-tabs-mode:t
+ End:
+*/
--- /dev/null
+.deps
+.libs
+Makefile
+Makefile.in
--- /dev/null
+#
+# $Id$
+#
+# Copyright (C) 2003 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Marcel Telka <marcel@telka.sk>, 2003.
+#
+
+include $(top_srcdir)/Makefile.rules
+
+noinst_LTLIBRARIES = libcmd.la
+
+libcmd_la_SOURCES = \
+ cmd_frequency.c \
+ cmd_cable.c \
+ cmd_reset.c \
+ cmd_discovery.c \
+ cmd_idcode.c \
+ cmd_detect.c \
+ cmd_detectflash.c \
+ cmd_help.c \
+ cmd_quit.c \
+ cmd_scan.c \
+ cmd_signal.c \
+ cmd_salias.c \
+ cmd_bit.c \
+ cmd_register.c \
+ cmd_initbus.c \
+ cmd_print.c \
+ cmd_part.c \
+ cmd_bus.c \
+ cmd_instruction.c \
+ cmd_shift.c \
+ cmd_dr.c \
+ cmd_get.c \
+ cmd_test.c \
+ cmd_debug.c \
+ cmd_shell.c \
+ cmd_set.c \
+ cmd_endian.c \
+ cmd_peekpoke.c \
+ cmd_pod.c \
+ cmd_readmem.c \
+ cmd_writemem.c \
+ cmd_flashmem.c \
+ cmd_eraseflash.c \
+ cmd_include.c \
+ cmd_addpart.c \
+ cmd_cmd.c \
+ cmd_usleep.c
+
+if ENABLE_SVF
+libcmd_la_SOURCES += cmd_svf.c
+endif
+
+if ENABLE_BSDL
+libcmd_la_SOURCES += cmd_bsdl.c
+endif
+
+AM_CFLAGS = $(WARNINGCFLAGS)
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2003 ETC s.r.o.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the ETC s.r.o. nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2003.
+ *
+ */
+
+#ifndef URJ_SRC_CMD_H
+#define URJ_SRC_CMD_H
+
+#include <sysdep.h>
+
+#include <urjtag/types.h>
+
+typedef struct
+{
+ char *name;
+ char *desc;
+ void (*help) (void);
+ /** @return URJ_STATUS_OK on success; URJ_STATUS_FAIL on error, both
+ * syntax and library errors */
+ int (*run) (urj_chain_t *chain, char *params[]);
+} urj_cmd_t;
+
+extern const urj_cmd_t urj_cmd_quit;
+extern const urj_cmd_t urj_cmd_help;
+extern const urj_cmd_t urj_cmd_frequency;
+extern const urj_cmd_t urj_cmd_cable;
+extern const urj_cmd_t urj_cmd_reset;
+extern const urj_cmd_t urj_cmd_discovery;
+extern const urj_cmd_t urj_cmd_idcode;
+extern const urj_cmd_t urj_cmd_detect;
+extern const urj_cmd_t urj_cmd_signal;
+extern const urj_cmd_t urj_cmd_scan;
+extern const urj_cmd_t urj_cmd_salias;
+extern const urj_cmd_t urj_cmd_bit;
+extern const urj_cmd_t urj_cmd_register;
+extern const urj_cmd_t urj_cmd_initbus;
+extern const urj_cmd_t urj_cmd_print;
+extern const urj_cmd_t urj_cmd_part;
+extern const urj_cmd_t urj_cmd_bus;
+extern const urj_cmd_t urj_cmd_instruction;
+extern const urj_cmd_t urj_cmd_shift;
+extern const urj_cmd_t urj_cmd_dr;
+extern const urj_cmd_t urj_cmd_get;
+extern const urj_cmd_t urj_cmd_test;
+extern const urj_cmd_t urj_cmd_shell;
+extern const urj_cmd_t urj_cmd_set;
+extern const urj_cmd_t urj_cmd_endian;
+extern const urj_cmd_t urj_cmd_peek;
+extern const urj_cmd_t urj_cmd_poke;
+extern const urj_cmd_t urj_cmd_pod;
+extern const urj_cmd_t urj_cmd_readmem;
+extern const urj_cmd_t urj_cmd_writemem;
+extern const urj_cmd_t urj_cmd_detectflash;
+extern const urj_cmd_t urj_cmd_flashmem;
+extern const urj_cmd_t urj_cmd_eraseflash;
+extern const urj_cmd_t urj_cmd_script;
+extern const urj_cmd_t urj_cmd_include;
+extern const urj_cmd_t urj_cmd_addpart;
+extern const urj_cmd_t urj_cmd_usleep;
+#ifdef ENABLE_SVF
+extern const urj_cmd_t urj_cmd_svf;
+#endif
+#ifdef ENABLE_BSDL
+extern const urj_cmd_t urj_cmd_bsdl;
+#endif
+extern const urj_cmd_t urj_cmd_debug;
+
+extern const urj_cmd_t *urj_cmds[];
+
+/**
+ * Tests if chain has a cable pointer
+ *
+ * @return URJ_STATUS_OK if success; URJ_STATUS_FAIL on error or failure
+ */
+int urj_cmd_test_cable (urj_chain_t *chain);
+
+/**
+ * Count the number of parameters in this NULL-terminated list
+ */
+int urj_cmd_params (char *params[]);
+/**
+ * Parse parameter as a long unsigned
+ * @return URJ_STATUS_OK on success, URJ_STATUS_FAIL on error
+ */
+int urj_cmd_get_number (const char *s, long unsigned *i);
+
+#endif /* URJ_CMD_H */
--- /dev/null
+/*
+ * $Id$
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Ville Voipio <ville.voipio@iki.fi>, 2008.
+ *
+ */
+
+#include <sysdep.h>
+
+#include <stdio.h>
+#include <string.h>
+
+#include <urjtag/error.h>
+#include <urjtag/tap.h>
+#include <urjtag/chain.h>
+#include <urjtag/part.h>
+
+#include <urjtag/cmd.h>
+
+#include "cmd.h"
+
+static int
+cmd_addpart_run (urj_chain_t *chain, char *params[])
+{
+ long unsigned len;
+
+ if (urj_cmd_params (params) != 2)
+ {
+ urj_error_set (URJ_ERROR_SYNTAX,
+ "%s: #parameters should be %d, not %d",
+ params[0], 2, urj_cmd_params (params));
+ return URJ_STATUS_FAIL;
+ }
+
+ if (urj_cmd_get_number (params[1], &len) != URJ_STATUS_OK)
+ return URJ_STATUS_FAIL;
+
+ if (urj_cmd_test_cable (chain) != URJ_STATUS_OK)
+ return URJ_STATUS_FAIL;
+
+ if (urj_tap_manual_add (chain, len) == -1)
+ return URJ_STATUS_FAIL;
+
+ // @@@@ RFHH this cannot be
+ if (chain->parts == NULL)
+ return URJ_STATUS_FAIL;
+
+ // @@@@ RFHH this cannot be
+ if (chain->parts->len == 0)
+ {
+ urj_part_parts_free (chain->parts);
+ chain->parts = NULL;
+ return URJ_STATUS_FAIL;
+ }
+
+ urj_part_parts_set_instruction (chain->parts, "BYPASS");
+ urj_tap_chain_shift_instructions (chain);
+
+ return URJ_STATUS_OK;
+}
+
+
+static void
+cmd_addpart_help (void)
+{
+ urj_log (URJ_LOG_LEVEL_NORMAL,
+ _("Usage: %s IRLENGTH\n"
+ "Manually add a part to the end of the chain.\n"
+ "\n"
+ "IRLENGTH instruction register length\n"),
+ "addpart");
+}
+
+
+const urj_cmd_t urj_cmd_addpart = {
+ "addpart",
+ N_("manually adds parts on the JTAG chain"),
+ cmd_addpart_help,
+ cmd_addpart_run
+};
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2003 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2003.
+ *
+ */
+
+#include <sysdep.h>
+
+#include <stddef.h>
+#include <stdio.h>
+#include <string.h>
+
+#include <urjtag/error.h>
+#include <urjtag/bsbit.h>
+#include <urjtag/part.h>
+#include <urjtag/chain.h>
+
+#include <urjtag/cmd.h>
+
+#include "cmd.h"
+
+static void
+cmd_bit_print_params (char *params[], unsigned int parameters, char *command,
+ size_t command_size)
+{
+ unsigned int i;
+
+ command[0] = '\0';
+ strncat (command, params[0], command_size);
+ for (i = 1; i < parameters; i++)
+ {
+ strncat (command, " ", command_size);
+ strncat (command, params[i], command_size);
+ }
+}
+
+static int
+cmd_bit_run (urj_chain_t *chain, char *params[])
+{
+ urj_part_t *part;
+ long unsigned bit;
+ int type;
+ int safe;
+ long unsigned control;
+ unsigned int parameters = urj_cmd_params (params);
+ char command[1024];
+
+ cmd_bit_print_params (params, parameters, command, sizeof command);
+
+ if ((parameters != 5) && (parameters != 8))
+ {
+ urj_error_set (URJ_ERROR_SYNTAX,
+ "%s: #params should be 5 or 8, not %d",
+ "bus", parameters);
+ return URJ_STATUS_FAIL;
+ }
+
+ if (urj_cmd_test_cable (chain) != URJ_STATUS_OK)
+ return URJ_STATUS_FAIL;
+
+ part = urj_tap_chain_active_part (chain);
+ if (part == NULL)
+ return URJ_STATUS_FAIL;
+
+ /* bit number */
+ if (urj_cmd_get_number (params[1], &bit) != URJ_STATUS_OK)
+ {
+ // error state already set
+ urj_log (URJ_LOG_LEVEL_NORMAL,
+ _("%s: unable to get boundary bit number for command '%s'"),
+ "bus", command);
+ return URJ_STATUS_FAIL;
+ }
+
+ /* bit type */
+ if (strlen (params[2]) != 1)
+ {
+ urj_error_set (URJ_ERROR_SYNTAX,
+ _("%s: invalid bit type length for command '%s'"),
+ "bus", command);
+ return URJ_STATUS_FAIL;
+ }
+ switch (params[2][0])
+ {
+ case 'I':
+ case 'i':
+ type = URJ_BSBIT_INPUT;
+ break;
+ case 'O':
+ case 'o':
+ type = URJ_BSBIT_OUTPUT;
+ break;
+ case 'B':
+ case 'b':
+ type = URJ_BSBIT_BIDIR;
+ break;
+ case 'C':
+ case 'c':
+ type = URJ_BSBIT_CONTROL;
+ break;
+ case 'X':
+ case 'x':
+ type = URJ_BSBIT_INTERNAL;
+ break;
+ default:
+ urj_error_set (URJ_ERROR_SYNTAX,
+ _("%s: invalid bit type for command '%s'"),
+ "bus", command);
+ return URJ_STATUS_FAIL;
+ }
+
+ /* default (safe) value */
+ if (strlen (params[3]) != 1)
+ {
+ urj_error_set (URJ_ERROR_SYNTAX,
+ _("%s: invalid default value length for command '%s'"),
+ "bus", command);
+ return URJ_STATUS_FAIL;
+ }
+ switch (params[3][0])
+ {
+ case '0':
+ case '1':
+ safe = params[3][0] - '0';
+ break;
+ case '?':
+ safe = URJ_BSBIT_DONTCARE;
+ break;
+ default:
+ urj_error_set (URJ_ERROR_SYNTAX,
+ _("%s: invalid default value '%s' for command '%s'"),
+ "bus", params[3], command);
+ return URJ_STATUS_FAIL;
+ }
+
+ if (urj_cmd_params (params) == 5)
+ // without control bit
+ return urj_part_bsbit_alloc (part, bit, params[4], type, safe);
+
+ /* with control bit */
+
+ int control_value;
+ int control_state;
+
+ /* control bit number */
+ if (urj_cmd_get_number (params[5], &control) != URJ_STATUS_OK)
+ {
+ urj_log (URJ_LOG_LEVEL_NORMAL,
+ _("%s: unable to get control bit number for command '%s'"),
+ "bit", command);
+ return URJ_STATUS_FAIL;
+ }
+ /* control value */
+ if (strlen (params[6]) != 1)
+ {
+ urj_error_set (URJ_ERROR_SYNTAX,
+ _("%s: invalid control value length for command '%s'"),
+ "bit", command);
+ return URJ_STATUS_FAIL;
+ }
+ control_value = (params[6][0] == '1');
+
+ /* control state */
+ if (strcasecmp (params[7], "Z"))
+ {
+ urj_error_set (URJ_ERROR_SYNTAX, "control state '%s' must be 'Z'",
+ params[7]);
+ return URJ_STATUS_FAIL;
+ }
+
+ control_state = URJ_BSBIT_STATE_Z;
+
+ return urj_part_bsbit_alloc_control (part, bit, params[4], type, safe,
+ control, control_value,
+ control_state);
+}
+
+static void
+cmd_bit_help (void)
+{
+ urj_log (URJ_LOG_LEVEL_NORMAL,
+ _("Usage: %s NUMBER TYPE DEFAULT SIGNAL [CBIT CVAL CSTATE]\n"
+ "Define new BSR (Boundary Scan Register) bit for SIGNAL, with\n"
+ "DEFAULT value.\n"
+ "\n"
+ "NUMBER Bit number in the BSR\n"
+ "TYPE Bit type, valid values are I, O, B, C, and X\n"
+ "DEFAULT Default (safe) bit value, valid values are 1, 0, ?\n"
+ "SIGNAL Associated signal name\n"
+ "CBIT Control bit number\n"
+ "CVAL Control value\n"
+ "CSTATE Control state, valid state is only Z\n"),
+ "bit");
+}
+
+const urj_cmd_t urj_cmd_bit = {
+ "bit",
+ N_("define new BSR bit"),
+ cmd_bit_help,
+ cmd_bit_run
+};
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2007, Arnim Laeuger
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Arnim Laeuger <arniml@users.sourceforge.net>, 2007.
+ *
+ */
+
+
+#include <sysdep.h>
+
+#include <stdio.h>
+#include <string.h>
+
+#include <urjtag/error.h>
+#include <urjtag/bsdl.h>
+#include <urjtag/chain.h>
+#include <urjtag/cmd.h>
+
+#include "cmd.h"
+
+static int
+cmd_bsdl_run (urj_chain_t *chain, char *params[])
+{
+ int num_params, result = -2;
+ urj_bsdl_globs_t *globs = &(chain->bsdl);
+
+ num_params = urj_cmd_params (params);
+ if (num_params < 2 || num_params > 3)
+ {
+ urj_error_set (URJ_ERROR_SYNTAX,
+ "%s: #parameters should be %d or %d, not %d",
+ params[0], 2, 3, urj_cmd_params (params));
+ return URJ_STATUS_FAIL;
+ }
+
+ if (strcmp (params[1], "test") == 0)
+ {
+ int debug_save;
+
+ debug_save = globs->debug;
+ globs->debug = 1;
+ if (num_params == 3)
+ {
+ result = urj_bsdl_read_file (chain, params[2], URJ_BSDL_MODE_TEST,
+ NULL) >= 0 ? 1 : -1;
+ }
+ else if (num_params == 2)
+ {
+ urj_bsdl_scan_files (chain, NULL, URJ_BSDL_MODE_TEST);
+ result = 1;
+ }
+ globs->debug = debug_save;
+ }
+
+ if (strcmp (params[1], "dump") == 0)
+ {
+ if (num_params == 3)
+ {
+ result = urj_bsdl_read_file (chain, params[2], URJ_BSDL_MODE_DUMP,
+ NULL) >= 0 ? 1 : -1;
+ }
+ else if (num_params == 2)
+ {
+ urj_bsdl_scan_files (chain, NULL, URJ_BSDL_MODE_DUMP);
+ result = 1;
+ }
+ }
+
+ if (num_params == 3)
+ {
+ if (strcmp (params[1], "path") == 0)
+ {
+ urj_bsdl_set_path (chain, params[2]);
+ result = 1;
+ }
+
+ if (strcmp (params[1], "debug") == 0)
+ {
+ if (strcmp (params[2], "on") == 0)
+ {
+ globs->debug = 1;
+ result = 1;
+ }
+ if (strcmp (params[2], "off") == 0)
+ {
+ globs->debug = 0;
+ result = 1;
+ }
+ }
+ }
+
+ if (result == -2)
+ {
+ urj_error_set (URJ_ERROR_SYNTAX, "unknown/malformed bsdl command '%s'",
+ params[1]);
+ return URJ_STATUS_FAIL;
+ }
+
+ return (result >= 0) ? URJ_STATUS_OK : URJ_STATUS_FAIL;
+}
+
+
+static void
+cmd_bsdl_help (void)
+{
+ urj_log (URJ_LOG_LEVEL_NORMAL,
+ _("Usage: %s path PATHLIST\n"
+ "Usage: %s test [FILE]\n"
+ "Usage: %s dump [FILE]\n"
+ "Usage: %s debug on|off\n"
+ "Manage BSDL files\n"
+ "\n"
+ "PATHLIST semicolon separated list of directory paths to search for BSDL files\n"
+ "FILE file containing part description in BSDL format\n"),
+ "bsdl", "bsdl", "bsdl", "bsdl");
+}
+
+const urj_cmd_t urj_cmd_bsdl = {
+ "bsdl",
+ N_("manage BSDL files"),
+ cmd_bsdl_help,
+ cmd_bsdl_run
+};
+
+
+/* Emacs specific variables
+;;; Local Variables: ***
+;;; indent-tabs-mode:t ***
+;;; tab-width:2 ***
+;;; End: ***
+*/
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2003 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2003.
+ *
+ */
+
+#include <sysdep.h>
+
+#include <stdio.h>
+#include <string.h>
+
+#include <urjtag/error.h>
+#include <urjtag/chain.h>
+#include <urjtag/bus.h>
+
+#include <urjtag/cmd.h>
+
+#include "cmd.h"
+
+static int
+cmd_bus_run (urj_chain_t *chain, char *params[])
+{
+ long unsigned n;
+
+ if (urj_cmd_params (params) != 2)
+ {
+ urj_error_set (URJ_ERROR_SYNTAX,
+ "%s: #parameters should be %d, not %d",
+ params[0], 2, urj_cmd_params (params));
+ return URJ_STATUS_FAIL;
+ }
+
+ if (urj_cmd_test_cable (chain) != URJ_STATUS_OK)
+ return URJ_STATUS_FAIL;
+
+ if (!chain->parts)
+ {
+ urj_error_set (URJ_ERROR_ILLEGAL_STATE, "no parts. Run '%s' first",
+ "detect");
+ return URJ_STATUS_FAIL;
+ }
+
+ if (urj_cmd_get_number (params[1], &n) != URJ_STATUS_OK)
+ return URJ_STATUS_FAIL;
+
+ return urj_bus_buses_set (n);
+}
+
+static void
+cmd_bus_help (void)
+{
+ urj_log (URJ_LOG_LEVEL_NORMAL,
+ _("Usage: %s BUS\n"
+ "Change active bus.\n"
+ "\n" "BUS bus number\n"),
+ "bus");
+}
+
+const urj_cmd_t urj_cmd_bus = {
+ "bus",
+ N_("change active bus"),
+ cmd_bus_help,
+ cmd_bus_run
+};
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2003 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2003.
+ *
+ */
+
+#include <sysdep.h>
+
+#include <stdio.h>
+#include <string.h>
+#include <stdlib.h>
+
+#include <urjtag/error.h>
+#include <urjtag/parport.h>
+#include <urjtag/tap.h>
+#include <urjtag/cable.h>
+#include <urjtag/chain.h>
+#include <urjtag/bus.h>
+
+#include <urjtag/cmd.h>
+
+#include "cmd.h"
+
+static int
+cmd_cable_run (urj_chain_t *chain, char *params[])
+{
+ urj_cable_t *cable = NULL;
+ int i;
+ int j;
+ int paramc = urj_cmd_params (params);
+ const urj_param_t **cable_params;
+ urj_cable_parport_devtype_t devtype = -1;
+ const char *devname = NULL;
+ int param_start = 2;
+ urj_cable_driver_t *driver;
+
+ /* we need at least one parameter for 'cable' command */
+ if (paramc < 2)
+ {
+ urj_error_set (URJ_ERROR_SYNTAX,
+ "%s: #parameters should be >= %d, not %d",
+ params[0], 2, paramc);
+ return URJ_STATUS_FAIL;
+ }
+
+ /* maybe old syntax was used? search connection type driver */
+ for (i = 0; urj_tap_parport_drivers[i]; i++)
+ if (strcasecmp (params[1],
+ urj_cable_parport_devtype_string(urj_tap_parport_drivers[i]->type)) == 0)
+ break;
+
+ if (urj_tap_parport_drivers[i] != 0)
+ {
+ /* Old syntax was used. Swap params. */
+ urj_warning ("Note: the 'cable' command syntax changed, please read the help text\n");
+ if (paramc >= 4)
+ {
+ char *tmparam;
+ tmparam = params[3];
+ params[3] = params[2];
+ params[2] = params[1];
+ params[1] = tmparam;
+ }
+ else
+ {
+ urj_error_set (URJ_ERROR_SYNTAX,
+ "old syntax requires >= %d params, not %d",
+ 4, paramc);
+ return URJ_STATUS_FAIL;
+ }
+ }
+
+ /* search cable driver list */
+ for (i = 0; urj_tap_cable_drivers[i]; i++)
+ if (strcasecmp (params[1], urj_tap_cable_drivers[i]->name) == 0)
+ break;
+ driver = urj_tap_cable_drivers[i];
+ if (!driver)
+ {
+ urj_error_set (URJ_ERROR_NOTFOUND, _("Unknown cable type: '%s'"),
+ params[1]);
+ return URJ_STATUS_FAIL;
+ }
+
+ if (paramc >= 3 && strcasecmp (params[2], "help") == 0)
+ {
+ driver->help (URJ_LOG_LEVEL_NORMAL, driver->name);
+ return URJ_STATUS_OK;
+ }
+
+ if (driver->device_type == URJ_CABLE_DEVICE_PARPORT)
+ {
+ if (paramc < 4)
+ {
+ urj_error_set (URJ_ERROR_SYNTAX,
+ "parallel cable requires >= 4 parameters");
+ return URJ_STATUS_FAIL;
+ }
+ for (j = 0; j < URJ_CABLE_PARPORT_N_DEVS; j++)
+ if (strcasecmp (params[2],
+ urj_cable_parport_devtype_string(j)) == 0)
+ break;
+ if (j == URJ_CABLE_PARPORT_N_DEVS)
+ {
+ urj_error_set (URJ_ERROR_INVALID,
+ "unknown parallel port device type '%s'", params[2]);
+ return URJ_STATUS_FAIL;
+ }
+
+ devtype = j;
+ devname = params[3];
+ param_start = 4;
+ }
+
+ urj_param_init (&cable_params);
+ for (j = param_start; params[j] != NULL; j++)
+ if (urj_param_push (&urj_cable_param_list, &cable_params,
+ params[j]) != URJ_STATUS_OK)
+ {
+ urj_param_clear (&cable_params);
+ return URJ_STATUS_FAIL;
+ }
+
+ switch (driver->device_type)
+ {
+ case URJ_CABLE_DEVICE_PARPORT:
+ cable = urj_tap_cable_parport_connect (chain, driver, devtype, devname,
+ cable_params);
+ break;
+ case URJ_CABLE_DEVICE_USB:
+ cable = urj_tap_cable_usb_connect (chain, driver, cable_params);
+ break;
+ case URJ_CABLE_DEVICE_OTHER:
+ cable = urj_tap_cable_other_connect (chain, driver, cable_params);
+ break;
+ }
+
+ urj_param_clear (&cable_params);
+
+ return cable == NULL ? URJ_STATUS_FAIL : URJ_STATUS_OK;
+}
+
+static void
+cmd_cable_help (void)
+{
+ int i;
+
+ urj_log (URJ_LOG_LEVEL_NORMAL,
+ _("Usage: %s DRIVER [DRIVER_OPTS]\n"
+ "Select JTAG cable type.\n"
+ "\n"
+ "DRIVER name of cable\n"
+ "DRIVER_OPTS options for the selected cable\n"
+ "\n"
+ "Type \"cable DRIVER help\" for info about options for cable DRIVER.\n"
+ "\n" "List of supported cables:\n"),
+ "cable");
+
+ for (i = 0; urj_tap_cable_drivers[i]; i++)
+ urj_log (URJ_LOG_LEVEL_NORMAL,
+ _("%-13s %s\n"), urj_tap_cable_drivers[i]->name,
+ _(urj_tap_cable_drivers[i]->description));
+}
+
+const urj_cmd_t urj_cmd_cable = {
+ "cable",
+ N_("select JTAG cable"),
+ cmd_cable_help,
+ cmd_cable_run
+};
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2002, 2003 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2002, 2003.
+ *
+ */
+
+#include <sysdep.h>
+
+#include <stdio.h>
+#include <string.h>
+
+#include <urjtag/error.h>
+#include <urjtag/chain.h>
+
+#include <urjtag/cmd.h>
+
+#include "cmd.h"
+
+const urj_cmd_t *urj_cmds[] = {
+ &urj_cmd_quit,
+ &urj_cmd_help,
+ &urj_cmd_frequency,
+ &urj_cmd_cable,
+ &urj_cmd_reset,
+ &urj_cmd_discovery,
+ &urj_cmd_idcode,
+ &urj_cmd_detect,
+ &urj_cmd_signal,
+ &urj_cmd_scan,
+ &urj_cmd_salias,
+ &urj_cmd_bit,
+ &urj_cmd_register,
+ &urj_cmd_initbus,
+ &urj_cmd_print,
+ &urj_cmd_part,
+ &urj_cmd_bus,
+ &urj_cmd_instruction,
+ &urj_cmd_shift,
+ &urj_cmd_dr,
+ &urj_cmd_get,
+ &urj_cmd_test,
+ &urj_cmd_shell,
+ &urj_cmd_set,
+ &urj_cmd_endian,
+ &urj_cmd_peek,
+ &urj_cmd_poke,
+ &urj_cmd_pod,
+ &urj_cmd_readmem,
+ &urj_cmd_writemem,
+ &urj_cmd_detectflash,
+ &urj_cmd_flashmem,
+ &urj_cmd_eraseflash,
+ &urj_cmd_script,
+ &urj_cmd_include,
+ &urj_cmd_addpart,
+ &urj_cmd_usleep,
+#ifdef ENABLE_SVF
+ &urj_cmd_svf,
+#endif
+#ifdef ENABLE_BSDL
+ &urj_cmd_bsdl,
+#endif
+ &urj_cmd_debug,
+ NULL /* last must be NULL */
+};
+
+/*
+ * @param text match commands whose prefix equals <code>text</code>. Rotates
+ * through the registered commands. The prefix length is set when
+ * the rotating state is reset.
+ * @@@@ RFHH that is weird behaviour. Why not do the prefix length as strlen(text)?
+ */
+char *
+urj_cmd_find_next (const char *text, int state)
+{
+ static size_t cmd_idx, len;
+ char *next = NULL;
+
+ if (!state)
+ {
+ cmd_idx = 0;
+ len = strlen (text);
+ }
+
+ while (urj_cmds[cmd_idx])
+ {
+ char *name = urj_cmds[cmd_idx++]->name;
+ if (!strncmp (name, text, len))
+ {
+ next = strdup (name);
+ if (next == NULL)
+ urj_error_set (URJ_ERROR_OUT_OF_MEMORY, "strdup(%s) fails",
+ name);
+ break;
+ }
+ }
+
+ return next;
+}
+
+int
+urj_cmd_test_cable (urj_chain_t *chain)
+{
+ if (chain->cable)
+ return URJ_STATUS_OK;
+
+ urj_error_set (URJ_ERROR_ILLEGAL_STATE,
+ "Cable not configured. Please use '%s' command first!",
+ "cable");
+ return URJ_STATUS_FAIL;
+}
+
+/* Remainder copied from libbrux/cmd/cmd.c */
+
+int
+urj_cmd_run (urj_chain_t *chain, char *params[])
+{
+ int i, pidx;
+ size_t len;
+
+ if (!params[0])
+ return URJ_STATUS_OK;
+
+ pidx = -1;
+ len = strlen (params[0]);
+
+ for (i = 0; urj_cmds[i]; ++i)
+ {
+ if (strcasecmp (urj_cmds[i]->name, params[0]) == 0)
+ {
+ run_cmd:
+ return urj_cmds[i]->run (chain, params);
+ }
+ else if (strncasecmp (urj_cmds[i]->name, params[0], len) == 0)
+ {
+ if (pidx == -1)
+ pidx = i;
+ else
+ pidx = -2;
+ }
+ }
+
+ switch (pidx)
+ {
+ case -2:
+ urj_log (URJ_LOG_LEVEL_NORMAL, _("%s: Ambiguous command\n"), params[0]);
+ break;
+ case -1:
+ urj_log (URJ_LOG_LEVEL_NORMAL, _("%s: unknown command\n"), params[0]);
+ break;
+ default:
+ i = pidx;
+ goto run_cmd;
+ }
+
+ return URJ_STATUS_OK;
+}
+
+int
+urj_cmd_params (char *params[])
+{
+ int i = 0;
+
+ while (params[i])
+ i++;
+
+ return i;
+}
+
+int
+urj_cmd_get_number (const char *s, long unsigned *i)
+{
+ int n;
+ int r;
+ size_t l;
+
+ if (!s || !i)
+ {
+ urj_error_set (URJ_ERROR_INVALID, "NULL string or int pointer");
+ return URJ_STATUS_FAIL;
+ }
+
+ l = strlen (s);
+
+ n = -1;
+ r = sscanf (s, "0x%lx%n", i, &n);
+ if (r == 1 && n == l)
+ return URJ_STATUS_OK;
+
+ n = -1;
+ r = sscanf (s, "%lu%n", i, &n);
+ if (r == 1 && n == l)
+ return URJ_STATUS_OK;
+
+ urj_error_set (URJ_ERROR_SYNTAX, "not a number: '%s'", s);
+
+ return URJ_STATUS_FAIL;
+}
--- /dev/null
+/*
+ * $Id: debug.c,v 1.0 2005/10/10 00:00:0 DJF $
+ *
+ * Copyright (C) 2005 Protoparts
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by David Farrell, 2005
+ * based on templates by and portions Written by Marcel Telka <marcel@telka.sk>, 2003.i
+ *
+ */
+
+#include <sysdep.h>
+
+#include <string.h>
+
+#include <urjtag/error.h>
+#include <urjtag/log.h>
+
+#include <urjtag/cmd.h>
+
+#include "cmd.h"
+
+static urj_log_level_t
+string_to_log_level (const char *strlevel)
+{
+ if (0)
+ ;
+ else if (strcasecmp(strlevel, "all") == 0)
+ return URJ_LOG_LEVEL_ALL;
+ else if (strcasecmp(strlevel, "comm") == 0)
+ return URJ_LOG_LEVEL_COMM;
+ else if (strcasecmp(strlevel, "debug") == 0)
+ return URJ_LOG_LEVEL_DEBUG;
+ else if (strcasecmp(strlevel, "detail") == 0)
+ return URJ_LOG_LEVEL_DETAIL;
+ else if (strcasecmp(strlevel, "normal") == 0)
+ return URJ_LOG_LEVEL_NORMAL;
+ else if (strcasecmp(strlevel, "warning") == 0)
+ return URJ_LOG_LEVEL_WARNING;
+ else if (strcasecmp(strlevel, "error") == 0)
+ return URJ_LOG_LEVEL_ERROR;
+ else if (strcasecmp(strlevel, "silent") == 0)
+ return URJ_LOG_LEVEL_SILENT;
+ else
+ return -1;
+}
+
+static const char *
+log_level_to_string (urj_log_level_t level)
+{
+ switch (level) {
+ case URJ_LOG_LEVEL_ALL: return "all";
+ case URJ_LOG_LEVEL_COMM: return "comm";
+ case URJ_LOG_LEVEL_DEBUG: return "debug";
+ case URJ_LOG_LEVEL_DETAIL: return "detail";
+ case URJ_LOG_LEVEL_NORMAL: return "normal";
+ case URJ_LOG_LEVEL_WARNING: return "warning";
+ case URJ_LOG_LEVEL_ERROR: return "error";
+ case URJ_LOG_LEVEL_SILENT: return "silent";
+ case -1: /* sanity for string_to_log_level() return */
+ default: return "unknown";
+ }
+}
+
+static int
+cmd_debug_run (urj_chain_t *chain, char *params[])
+{
+ switch (urj_cmd_params (params)) {
+
+ /* display current log level */
+ case 1:
+ urj_log (URJ_LOG_LEVEL_NORMAL, _("Current log level is '%s'\n"),
+ log_level_to_string (urj_log_state.level));
+ return URJ_STATUS_OK;
+
+ /* set log level */
+ case 2:
+ {
+ urj_log_level_t new_level = string_to_log_level (params[1]);
+ if (new_level == -1)
+ {
+ urj_error_set (URJ_ERROR_SYNTAX, "unknown log level '%s'", params[1]);
+ return URJ_STATUS_FAIL;
+ }
+ urj_log_state.level = new_level;
+
+ return URJ_STATUS_OK;
+ }
+
+ /* fail! */
+ default:
+ urj_error_set (URJ_ERROR_SYNTAX,
+ "%s: #parameters should be %d, not %d",
+ params[0], 2, urj_cmd_params (params));
+ return URJ_STATUS_FAIL;
+ }
+}
+
+static void
+cmd_debug_help (void)
+{
+ urj_log (URJ_LOG_LEVEL_NORMAL,
+ _("Usage: %s LEVEL\n"
+ "Set logging/debugging level.\n"
+ "\n" "LEVEL:\n"
+ "all every single bit as it is transmitted\n"
+ "comm low level communication details\n"
+ "debug more details of interest for developers\n"
+ "detail verbose output\n"
+ "normal just noteworthy info\n"
+ "warning unmissable warnings\n"
+ "error only fatal errors\n"
+ "silent suppress logging output\n"),
+ "debug");
+}
+
+const urj_cmd_t urj_cmd_debug = {
+ "debug",
+ N_("set logging/debugging level"),
+ cmd_debug_help,
+ cmd_debug_run
+};
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2003 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2003.
+ *
+ */
+
+#include <sysdep.h>
+
+#include <stdio.h>
+#include <string.h>
+
+#include <urjtag/error.h>
+#include <urjtag/tap.h>
+#include <urjtag/error.h>
+
+#include <urjtag/cmd.h>
+
+#include "cmd.h"
+
+static int
+cmd_detect_run (urj_chain_t *chain, char *params[])
+{
+ if (urj_cmd_params (params) != 1)
+ {
+ urj_error_set (URJ_ERROR_SYNTAX,
+ "%s: #parameters should be %d, not %d",
+ params[0], 1, urj_cmd_params (params));
+ return URJ_STATUS_FAIL;
+ }
+
+ if (urj_cmd_test_cable (chain) != URJ_STATUS_OK)
+ return URJ_STATUS_FAIL;
+
+ if (urj_tap_detect (chain) != URJ_STATUS_OK)
+ return URJ_STATUS_FAIL;
+
+ return URJ_STATUS_OK;
+}
+
+static void
+cmd_detect_help (void)
+{
+ urj_log (URJ_LOG_LEVEL_NORMAL,
+ _("Usage: %s\n"
+ "Detect parts on the JTAG chain.\n"
+ "\n"
+ "Output from this command is a list of the detected parts.\n"
+ "If no parts are detected other commands may not work properly.\n"),
+ "detect");
+}
+
+const urj_cmd_t urj_cmd_detect = {
+ "detect",
+ N_("detect parts on the JTAG chain"),
+ cmd_detect_help,
+ cmd_detect_run
+};
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2003 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2003.
+ *
+ */
+
+#include <sysdep.h>
+
+#include <stdio.h>
+
+#include <urjtag/log.h>
+#include <urjtag/error.h>
+#include <urjtag/bus.h>
+#include <urjtag/flash.h>
+#include <urjtag/cmd.h>
+
+#include "cmd.h"
+
+static int
+cmd_detectflash_run (urj_chain_t *chain, char *params[])
+{
+ long unsigned adr;
+
+ if (urj_cmd_params (params) != 2)
+ {
+ urj_error_set (URJ_ERROR_SYNTAX,
+ "%s: #parameters should be %d, not %d",
+ params[0], 2, urj_cmd_params (params));
+ return URJ_STATUS_FAIL;
+ }
+
+ if (!urj_bus)
+ {
+ urj_error_set (URJ_ERROR_ILLEGAL_STATE, _("Bus missing"));
+ return URJ_STATUS_FAIL;
+ }
+
+ if (urj_cmd_get_number (params[1], &adr) != URJ_STATUS_OK)
+ return URJ_STATUS_FAIL;
+
+ return urj_flash_detectflash (URJ_LOG_LEVEL_NORMAL, urj_bus, adr);
+}
+
+static void
+cmd_detectflash_help (void)
+{
+ urj_log (URJ_LOG_LEVEL_NORMAL,
+ _("Usage: %s ADDRESS\n"
+ "Detect flash memory type connected to a part.\n"
+ "\n"
+ "ADDRESS Base address for memory region\n"),
+ "detectflash");
+}
+
+const urj_cmd_t urj_cmd_detectflash = {
+ "detectflash",
+ N_("detect parameters of flash chips attached to a part"),
+ cmd_detectflash_help,
+ cmd_detectflash_run
+};
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2003 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2003.
+ *
+ */
+
+#include <sysdep.h>
+
+#include <stdio.h>
+
+#include <urjtag/error.h>
+#include <urjtag/tap.h>
+
+#include <urjtag/cmd.h>
+
+#include "cmd.h"
+
+static int
+cmd_discovery_run (urj_chain_t *chain, char *params[])
+{
+ if (urj_cmd_params (params) != 1)
+ {
+ urj_error_set (URJ_ERROR_SYNTAX,
+ "%s: #parameters should be %d, not %d",
+ params[0], 1, urj_cmd_params (params));
+ return URJ_STATUS_FAIL;
+ }
+
+ if (urj_cmd_test_cable (chain) != URJ_STATUS_OK)
+ return URJ_STATUS_FAIL;
+
+ return urj_tap_discovery (chain);
+}
+
+static void
+cmd_discovery_help (void)
+{
+ urj_log (URJ_LOG_LEVEL_NORMAL,
+ _("Usage: %s\n"
+ "Discovery of unknown parts in the JTAG chain.\n"
+ "\n"
+ "'%s' attempts to detect these parameters of an unknown JTAG\n"
+ "chain:\n"
+ " 1. IR (instruction register) length\n"
+ " 2. DR (data register) length for all possible instructions\n"
+ "\n"
+ "Warning: This may be dangerous for some parts (especially if the\n"
+ "part doesn't have TRST signal).\n"), "discovery",
+ "discovery");
+}
+
+const urj_cmd_t urj_cmd_discovery = {
+ "discovery",
+ N_("discovery of unknown parts in the JTAG chain"),
+ cmd_discovery_help,
+ cmd_discovery_run
+};
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2003 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2003.
+ *
+ */
+
+#include <sysdep.h>
+
+#include <stdio.h>
+#include <string.h>
+
+#include <urjtag/error.h>
+#include <urjtag/chain.h>
+#include <urjtag/part.h>
+#include <urjtag/part_instruction.h>
+#include <urjtag/data_register.h>
+#include <urjtag/tap_register.h>
+
+#include <urjtag/cmd.h>
+
+#include "cmd.h"
+
+static int
+cmd_dr_run (urj_chain_t *chain, char *params[])
+{
+ int dir = 1;
+ urj_part_t *part;
+ urj_tap_register_t *r;
+ urj_data_register_t *dr;
+ urj_part_instruction_t *active_ir;
+
+ if (urj_cmd_params (params) < 1 || urj_cmd_params (params) > 2)
+ {
+ urj_error_set (URJ_ERROR_SYNTAX,
+ "%s: #parameters should be >= 1 and <= 2, not %d",
+ params[0], urj_cmd_params (params));
+ return URJ_STATUS_FAIL;
+ }
+
+ if (urj_cmd_test_cable (chain) != URJ_STATUS_OK)
+ return URJ_STATUS_FAIL;
+
+ part = urj_tap_chain_active_part (chain);
+ if (part == NULL)
+ return URJ_STATUS_FAIL;
+
+ active_ir = part->active_instruction;
+ if (active_ir == NULL)
+ {
+ urj_error_set (URJ_ERROR_ILLEGAL_STATE,
+ _("%s: part without active instruction"), "dr");
+ return URJ_STATUS_FAIL;
+ }
+ dr = active_ir->data_register;
+ if (dr == NULL)
+ {
+ urj_error_set (URJ_ERROR_ILLEGAL_STATE,
+ _("%s: instruction without active data register"), "dr");
+ return URJ_STATUS_FAIL;
+ }
+
+ if (params[1])
+ {
+ if (strcasecmp (params[1], "in") == 0)
+ dir = 0;
+ else if (strcasecmp (params[1], "out") == 0)
+ dir = 1;
+ else
+ {
+ unsigned int bit;
+ if (strspn (params[1], "01") != strlen (params[1]))
+ {
+ urj_error_set (URJ_ERROR_SYNTAX,
+ "bit patterns should be 0s and 1s, not '%s'",
+ params[1]);
+ return URJ_STATUS_FAIL;
+ }
+
+ r = dr->in;
+ if (r->len != strlen (params[1]))
+ {
+ urj_error_set (URJ_ERROR_OUT_OF_BOUNDS,
+ _("%s: register length %d mismatch: %zd"),
+ "dr", r->len, strlen (params[1]));
+ return URJ_STATUS_FAIL;
+ }
+ for (bit = 0; params[1][bit]; bit++)
+ {
+ r->data[r->len - 1 - bit] = (params[1][bit] == '1');
+ }
+
+ dir = 0;
+ }
+ }
+
+ if (dir)
+ r = dr->out;
+ else
+ r = dr->in;
+ urj_log (URJ_LOG_LEVEL_NORMAL, _("%s\n"), urj_tap_register_get_string (r));
+
+ return URJ_STATUS_OK;
+}
+
+static void
+cmd_dr_help (void)
+{
+ urj_log (URJ_LOG_LEVEL_NORMAL,
+ _("Usage: %s [DIR]\n"
+ "Usage: %s BITSTRING\n"
+ "Display input or output data register content or set current register.\n"
+ "\n"
+ "DIR requested data register; possible values: 'in' for\n"
+ " input and 'out' for output; default is 'out'\n"
+ "BITSTRING set current data register with BITSTRING (e.g. 01010)\n"),
+ "dr", "dr");
+}
+
+const urj_cmd_t urj_cmd_dr = {
+ "dr",
+ N_("display active data register for a part"),
+ cmd_dr_help,
+ cmd_dr_run
+};
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2003 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2003.
+ *
+ */
+
+#include <sysdep.h>
+
+#include <stdio.h>
+#include <string.h>
+
+#include <urjtag/error.h>
+#include <urjtag/jtag.h>
+
+#include <urjtag/cmd.h>
+
+#include "cmd.h"
+
+static int
+cmd_endian_run (urj_chain_t *chain, char *params[])
+{
+ if (urj_cmd_params (params) > 2)
+ {
+ urj_error_set (URJ_ERROR_SYNTAX,
+ "%s: #parameters should be <= %d, not %d",
+ params[0], 2, urj_cmd_params (params));
+ return URJ_STATUS_FAIL;
+ }
+
+ if (!params[1])
+ {
+ if (urj_big_endian)
+ urj_log (URJ_LOG_LEVEL_NORMAL,
+ _("Endianess for external files: big\n"));
+ else
+ urj_log (URJ_LOG_LEVEL_NORMAL,
+ _("Endianess for external files: little\n"));
+ return URJ_STATUS_OK;
+ }
+
+ if (strcasecmp (params[1], "little") == 0)
+ {
+ urj_big_endian = 0;
+ return URJ_STATUS_OK;
+ }
+ if (strcasecmp (params[1], "big") == 0)
+ {
+ urj_big_endian = 1;
+ return URJ_STATUS_OK;
+ }
+
+ urj_error_set (URJ_ERROR_SYNTAX,
+ "endianness must be 'little' or 'big', not '%s'", params[1]);
+ return URJ_STATUS_FAIL;
+}
+
+static void
+cmd_endian_help (void)
+{
+ urj_log (URJ_LOG_LEVEL_NORMAL,
+ _("Usage: %s\n"
+ "Set or print endianess for external files.\n"),
+ "endian [little|big]");
+}
+
+const urj_cmd_t urj_cmd_endian = {
+ "endian",
+ N_("set/print endianess"),
+ cmd_endian_help,
+ cmd_endian_run
+};
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2003 TF
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Thomas Froehlich <t.froehlich@gmx.at>, 2003.
+ *
+ */
+
+#include <sysdep.h>
+
+#include <stdio.h>
+#include <stdint.h>
+#include <string.h>
+
+#include <urjtag/error.h>
+#include <urjtag/bus.h>
+#include <urjtag/flash.h>
+
+#include <urjtag/cmd.h>
+
+#include "cmd.h"
+
+static int
+cmd_eraseflash_run (urj_chain_t *chain, char *params[])
+{
+ long unsigned adr = 0;
+ long unsigned number = 0;
+
+ if (urj_cmd_params (params) != 3)
+ {
+ urj_error_set (URJ_ERROR_SYNTAX,
+ "%s: #parameters should be %d, not %d",
+ params[0], 3, urj_cmd_params (params));
+ return URJ_STATUS_FAIL;
+ }
+
+ if (urj_cmd_test_cable (chain) != URJ_STATUS_OK)
+ return URJ_STATUS_FAIL;
+ if (!urj_bus)
+ {
+ urj_error_set (URJ_ERROR_ILLEGAL_STATE, _("Bus driver missing"));
+ return URJ_STATUS_FAIL;
+ }
+ if (urj_cmd_get_number (params[1], &adr) != URJ_STATUS_OK)
+ return URJ_STATUS_FAIL;
+ if (urj_cmd_get_number (params[2], &number) != URJ_STATUS_OK)
+ return URJ_STATUS_FAIL;
+
+ return urj_flasherase (urj_bus, adr, number);
+}
+
+static void
+cmd_eraseflash_help (void)
+{
+ int i;
+
+ urj_log (URJ_LOG_LEVEL_NORMAL,
+ _("Usage: %s ADDR BLOCKS\n"
+ "Erase flash memory from ADDR.\n"
+ "\n"
+ "ADDR target addres for erasing block\n"
+ "BLOCKS number of blocks to erase\n"
+ "\n"
+ "ADDR and BLOCKS could be in decimal or hexadecimal (prefixed with 0x) form.\n"
+ "\n" "Supported Flash Memories:\n"),
+ "eraseflash");
+
+ for (i = 0; urj_flash_flash_drivers[i]; i++)
+ urj_log (URJ_LOG_LEVEL_NORMAL,
+ _("%s\n %s\n"), _(urj_flash_flash_drivers[i]->name),
+ _(urj_flash_flash_drivers[i]->description));
+}
+
+const urj_cmd_t urj_cmd_eraseflash = {
+ "eraseflash",
+ N_("erase flash memory by number of blocks"),
+ cmd_eraseflash_help,
+ cmd_eraseflash_run
+};
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2003 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2003.
+ *
+ */
+
+#include <sysdep.h>
+
+#include <stdio.h>
+#include <stdint.h>
+#include <string.h>
+#include <errno.h>
+
+#include <urjtag/error.h>
+#include <urjtag/bus.h>
+#include <urjtag/flash.h>
+
+#include <urjtag/cmd.h>
+
+#include "cmd.h"
+
+static int
+cmd_flashmem_run (urj_chain_t *chain, char *params[])
+{
+ int msbin;
+ int noverify = 0;
+ long unsigned adr = 0;
+ FILE *f;
+ int paramc = urj_cmd_params (params);
+ int r;
+
+ if (paramc < 3)
+ {
+ urj_error_set (URJ_ERROR_SYNTAX,
+ "%s: #parameters should be >= %d, not %d",
+ params[0], 3, urj_cmd_params (params));
+ return URJ_STATUS_FAIL;
+ }
+
+ if (!urj_bus)
+ {
+ urj_error_set (URJ_ERROR_ILLEGAL_STATE, _("Bus driver missing"));
+ return URJ_STATUS_FAIL;
+ }
+
+ msbin = strcasecmp ("msbin", params[1]) == 0;
+ if (!msbin && urj_cmd_get_number (params[1], &adr) != URJ_STATUS_OK)
+ return URJ_STATUS_FAIL;
+
+ if (paramc > 3)
+ noverify = strcasecmp ("noverify", params[3]) == 0;
+ else
+ noverify = 0;
+
+ f = fopen (params[2], "rb");
+ if (!f)
+ {
+ urj_error_IO_set (_("Unable to open file `%s'"), params[2]);
+ return URJ_STATUS_FAIL;
+ }
+
+ if (msbin)
+ r = urj_flashmsbin (urj_bus, f, noverify);
+ else
+ r = urj_flashmem (urj_bus, f, adr, noverify);
+
+ fclose (f);
+
+ return r;
+}
+
+static void
+cmd_flashmem_help (void)
+{
+ int i;
+
+ urj_log (URJ_LOG_LEVEL_NORMAL,
+ _("Usage: %s ADDR FILENAME [noverify]\n"
+ "Usage: %s FILENAME [noverify]\n"
+ "Program FILENAME content to flash memory.\n"
+ "\n"
+ "ADDR target address for raw binary image\n"
+ "FILENAME name of the input file\n"
+ "%-10s FILENAME is in MS .bin format (for WinCE)\n"
+ "%-10s if specified, verification is skipped\n"
+ "\n"
+ "ADDR could be in decimal or hexadecimal (prefixed with 0x) form.\n"
+ "\n"
+ "Supported Flash Memories:\n"),
+ "flashmem", "flashmem msbin", "msbin", "noverify");
+
+ for (i = 0; urj_flash_flash_drivers[i]; i++)
+ urj_log (URJ_LOG_LEVEL_NORMAL,
+ _("%s\n %s\n"), _(urj_flash_flash_drivers[i]->name),
+ _(urj_flash_flash_drivers[i]->description));
+}
+
+const urj_cmd_t urj_cmd_flashmem = {
+ "flashmem",
+ N_("burn flash memory with data from a file"),
+ cmd_flashmem_help,
+ cmd_flashmem_run
+};
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2003 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2003.
+ *
+ */
+
+#include <sysdep.h>
+
+#include <stdio.h>
+
+#include <urjtag/error.h>
+#include <urjtag/chain.h>
+#include <urjtag/cable.h>
+
+#include <urjtag/cmd.h>
+
+#include "cmd.h"
+
+static int
+cmd_frequency_run (urj_chain_t *chain, char *params[])
+{
+ long unsigned freq;
+
+ if (urj_cmd_test_cable (chain) != URJ_STATUS_OK)
+ return URJ_STATUS_FAIL;
+
+ if (urj_cmd_params (params) > 2)
+ {
+ urj_error_set (URJ_ERROR_SYNTAX,
+ "%s: #parameters should be <= %d, not %d",
+ params[0], 2, urj_cmd_params (params));
+ return URJ_STATUS_FAIL;
+ }
+
+ if (urj_cmd_params (params) == 1)
+ {
+ urj_log (URJ_LOG_LEVEL_NORMAL, _("Current TCK frequency is %lu Hz\n"),
+ (long unsigned) urj_tap_cable_get_frequency (chain->cable));
+ return URJ_STATUS_OK;
+ }
+
+ if (urj_cmd_get_number (params[1], &freq) != URJ_STATUS_OK)
+ return URJ_STATUS_FAIL;
+
+ urj_log (URJ_LOG_LEVEL_NORMAL, _("Setting TCK frequency to %lu Hz\n"),
+ freq);
+ urj_tap_cable_set_frequency (chain->cable, freq);
+
+ return URJ_STATUS_OK;
+}
+
+static void
+cmd_frequency_help (void)
+{
+ urj_log (URJ_LOG_LEVEL_NORMAL,
+ _("Usage: %s [FREQ]\n"
+ "Change TCK frequency to FREQ or print current TCK frequency.\n"
+ "\n"
+ "FREQ is in hertz. It's a maximum TCK frequency for JTAG interface.\n"
+ "In some cases the TCK frequency is less than FREQ, but the frequency\n"
+ "is never more than FREQ. Maximum supported frequency depends on JTAG\n"
+ "adapter.\n"
+ "\n"
+ "FREQ must be an unsigned integer. Minimum allowed frequency is 1 Hz.\n"
+ "Use 0 for FREQ to disable frequency limit.\n"),
+ "frequency");
+}
+
+const urj_cmd_t urj_cmd_frequency = {
+ "frequency",
+ N_("setup JTAG frequency"),
+ cmd_frequency_help,
+ cmd_frequency_run
+};
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2003 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2003.
+ *
+ */
+
+#include <sysdep.h>
+
+#include <stdio.h>
+#include <string.h>
+
+#include <urjtag/error.h>
+#include <urjtag/part.h>
+#include <urjtag/chain.h>
+#include <urjtag/bssignal.h>
+
+#include <urjtag/cmd.h>
+
+#include "cmd.h"
+
+static int
+cmd_get_run (urj_chain_t *chain, char *params[])
+{
+ int data;
+ urj_part_signal_t *s;
+ urj_part_t *part;
+
+ if (urj_cmd_params (params) != 3)
+ {
+ urj_error_set (URJ_ERROR_SYNTAX,
+ "%s: #parameters should be %d, not %d",
+ params[0], 3, urj_cmd_params (params));
+ return URJ_STATUS_FAIL;
+ }
+
+ if (strcasecmp (params[1], "signal") != 0)
+ {
+ urj_error_set (URJ_ERROR_SYNTAX,
+ "params[1] must be 'signal', not '%s'", params[1]);
+ return URJ_STATUS_FAIL;
+ }
+
+ if (urj_cmd_test_cable (chain) != URJ_STATUS_OK)
+ return URJ_STATUS_FAIL;
+
+ part = urj_tap_chain_active_part (chain);
+ if (part == NULL)
+ return URJ_STATUS_FAIL;
+
+ s = urj_part_find_signal (part, params[2]);
+ if (!s)
+ {
+ urj_error_set (URJ_ERROR_NOTFOUND, _("signal '%s' not found"),
+ params[2]);
+ return URJ_STATUS_FAIL;
+ }
+ data = urj_part_get_signal (part, s);
+ if (data == -1)
+ return URJ_STATUS_FAIL;
+
+ urj_log (URJ_LOG_LEVEL_NORMAL, _("%s = %d\n"), params[2], data);
+
+ return URJ_STATUS_OK;
+}
+
+static void
+cmd_get_help (void)
+{
+ urj_log (URJ_LOG_LEVEL_NORMAL,
+ _("Usage: %s signal SIGNAL\n"
+ "Get signal state from output BSR (Boundary Scan Register).\n"
+ "\n"
+ "SIGNAL signal name (from JTAG declaration file)\n"),
+ "get signal");
+}
+
+const urj_cmd_t urj_cmd_get = {
+ "get",
+ N_("get external signal value"),
+ cmd_get_help,
+ cmd_get_run
+};
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2003 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2003.
+ *
+ */
+
+#include <sysdep.h>
+
+#include <stdio.h>
+#include <string.h>
+
+#include <urjtag/error.h>
+#include <urjtag/cmd.h>
+
+#include "cmd.h"
+
+static int
+cmd_help_run (urj_chain_t *chain, char *params[])
+{
+ int i;
+
+ if (urj_cmd_params (params) > 2)
+ {
+ urj_error_set (URJ_ERROR_SYNTAX,
+ "%s: #parameters should be <= %d, not %d",
+ params[0], 2, urj_cmd_params (params));
+ return URJ_STATUS_FAIL;
+ }
+
+ /* short description generation */
+ if (urj_cmd_params (params) == 1)
+ {
+ urj_log (URJ_LOG_LEVEL_NORMAL, _("Command list:\n\n"));
+ for (i = 0; urj_cmds[i]; i++)
+ urj_log (URJ_LOG_LEVEL_NORMAL, _("%-13s %s\n"), urj_cmds[i]->name,
+ urj_cmds[i]->desc ? _(urj_cmds[i]->desc) :
+ _("(no description available)"));
+ urj_log (URJ_LOG_LEVEL_NORMAL,
+ _("\nType \"help COMMAND\" for details about a particular command.\n"));
+ return URJ_STATUS_OK;
+ }
+
+ /* search and print help for a particular command */
+ for (i = 0; urj_cmds[i]; i++)
+ if (strcasecmp (urj_cmds[i]->name, params[1]) == 0)
+ {
+ if (urj_cmds[i]->help)
+ urj_cmds[i]->help ();
+ return URJ_STATUS_OK;
+ }
+
+ urj_log (URJ_LOG_LEVEL_NORMAL, _("%s: unknown command\n"), params[1]);
+
+ return URJ_STATUS_OK;
+}
+
+static void
+cmd_help_help (void)
+{
+ urj_log (URJ_LOG_LEVEL_NORMAL,
+ _("Usage: %s [COMMAND]\n"
+ "Print short help for COMMAND, or list of available commands.\n"),
+ "help");
+}
+
+const urj_cmd_t urj_cmd_help = {
+ "help",
+ N_("display this help"),
+ cmd_help_help,
+ cmd_help_run
+};
--- /dev/null
+/*
+ * $Id: idcode.c 1102 2008-02-27 03:38:31Z jiez $
+ *
+ * Copyright (C) 2003 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Uwe Bonnes <bon@elektron.ikp.physik.tu-darmstadt.de>, 2008.
+ *
+ */
+#include <sysdep.h>
+
+#include <stdio.h>
+
+#include <urjtag/error.h>
+#include <urjtag/tap.h>
+
+#include <urjtag/cmd.h>
+
+#include "cmd.h"
+
+static int
+cmd_idcode_run (urj_chain_t *chain, char *params[])
+{
+ long unsigned bytes = 0;
+
+ if (urj_cmd_params (params) > 2)
+ {
+ urj_error_set (URJ_ERROR_SYNTAX,
+ "%s: #parameters should be <= %d, not %d",
+ params[0], 2, urj_cmd_params (params));
+ return URJ_STATUS_FAIL;
+ }
+
+ if (urj_cmd_params (params) == 2)
+ if (urj_cmd_get_number (params[1], &bytes) != URJ_STATUS_OK)
+ return URJ_STATUS_FAIL;
+
+ if (urj_cmd_test_cable (chain) != URJ_STATUS_OK)
+ return URJ_STATUS_FAIL;
+
+ urj_log (URJ_LOG_LEVEL_NORMAL, _("Reading %lu bytes of idcode\n"), bytes);
+ return urj_tap_idcode (chain, bytes);
+}
+
+static void
+cmd_idcode_help (void)
+{
+ urj_log (URJ_LOG_LEVEL_NORMAL,
+ _("Usage: %s [BYTES]\n"
+ "Read [BYTES] IDCODEs of all parts in a JTAG chain.\n"
+ "\n"
+ "BYTES must be an unsigned integer, and the default is 0.\n"
+ "If BYTES is 0, IDCODEs will be read until 32 consecutive zeros are found.\n"),
+ "idcode");
+}
+
+const urj_cmd_t urj_cmd_idcode = {
+ "idcode",
+ N_("Read IDCODEs of all parts in a JTAG chain"),
+ cmd_idcode_help,
+ cmd_idcode_run
+};
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2003 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2003.
+ *
+ */
+
+#include <sysdep.h>
+
+#include <ctype.h>
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+
+#include <urjtag/error.h>
+#include <urjtag/parse.h>
+#include <urjtag/jtag.h>
+
+#include <urjtag/cmd.h>
+#include <urjtag/bsdl.h>
+
+#include "cmd.h"
+
+static int
+cmd_include_or_script_run (urj_chain_t *chain, int is_include, char *params[])
+{
+ int i;
+ long unsigned j = 1;
+ int r = URJ_STATUS_OK;
+
+ if (urj_cmd_params (params) < 2)
+ {
+ urj_error_set (URJ_ERROR_SYNTAX,
+ "%s: #parameters should be >= %d, not %d",
+ params[0], 2, urj_cmd_params (params));
+ return URJ_STATUS_FAIL;
+ }
+
+ if (!is_include)
+ {
+ urj_warning (_("Please use the 'include' command instead of 'script'\n"));
+ }
+
+ if (urj_cmd_params (params) > 2)
+ {
+ /* loop n times option */
+ if (urj_cmd_get_number (params[2], &j) != URJ_STATUS_OK)
+ return URJ_STATUS_FAIL;
+ }
+
+ for (i = 0; i < j; i++)
+ {
+ r = urj_parse_include (chain, params[1], ! is_include);
+ if (r != URJ_STATUS_OK)
+ break;
+ }
+
+ return r;
+}
+
+static void
+cmd_include_or_script_help (char *cmd)
+{
+ urj_log (URJ_LOG_LEVEL_NORMAL,
+ _("Usage: %s FILENAME [n] \n"
+ "Run command sequence n times from external FILENAME.\n"
+ "\n" "FILENAME Name of the file with commands\n"),
+ cmd);
+}
+
+static int
+cmd_include_run (urj_chain_t *chain, char *params[])
+{
+ return cmd_include_or_script_run (chain, 1, params);
+}
+
+static void
+cmd_include_help (void)
+{
+ cmd_include_or_script_help ("include");
+}
+
+const urj_cmd_t urj_cmd_include = {
+ "include",
+ N_("include command sequence from external repository"),
+ cmd_include_help,
+ cmd_include_run
+};
+
+static int
+cmd_script_run (urj_chain_t *chain, char *params[])
+{
+ return cmd_include_or_script_run (chain, 0, params);
+}
+
+static void
+cmd_script_help (void)
+{
+ cmd_include_or_script_help ("script");
+}
+
+const urj_cmd_t urj_cmd_script = {
+ "script",
+ N_("run command sequence from external file"),
+ cmd_script_help,
+ cmd_script_run
+};
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2003 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2003.
+ *
+ */
+
+#include <sysdep.h>
+
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+
+#include <urjtag/error.h>
+#include <urjtag/params.h>
+#include <urjtag/chain.h>
+#include <urjtag/part.h>
+#include <urjtag/bus.h>
+#include <urjtag/cmd.h>
+
+#include "cmd.h"
+
+static int
+cmd_initbus_run (urj_chain_t *chain, char *params[])
+{
+ int drv, i;
+ const urj_param_t **bus_params;
+
+ if (urj_cmd_params (params) < 2)
+ {
+ urj_error_set (URJ_ERROR_SYNTAX,
+ "%s: #parameters should be >= %d, not %d",
+ params[0], 2, urj_cmd_params (params));
+ return URJ_STATUS_FAIL;
+ }
+
+ if (urj_cmd_test_cable (chain) != URJ_STATUS_OK)
+ return URJ_STATUS_FAIL;
+
+ if (urj_tap_chain_active_part (chain) == NULL)
+ return URJ_STATUS_FAIL;
+
+ for (drv = 0; urj_bus_drivers[drv] != NULL; drv++)
+ if (strcasecmp (urj_bus_drivers[drv]->name, params[1]) == 0)
+ break;
+
+ if (urj_bus_drivers[drv] == NULL)
+ {
+ urj_error_set (URJ_ERROR_NOTFOUND, _("Unknown bus: %s"), params[1]);
+ return URJ_STATUS_FAIL;
+ }
+
+ urj_param_init (&bus_params);
+ for (i = 2; params[i] != NULL; i++)
+ if (urj_param_push (&urj_bus_param_list, &bus_params,
+ params[i]) != URJ_STATUS_OK)
+ {
+ urj_param_clear (&bus_params);
+ return URJ_STATUS_FAIL;
+ }
+
+ if (urj_bus_init_bus(chain, urj_bus_drivers[drv], bus_params) == NULL)
+ {
+ urj_param_clear (&bus_params);
+ return URJ_STATUS_FAIL;
+ }
+
+ urj_param_clear (&bus_params);
+
+ return URJ_STATUS_OK;
+}
+
+static void
+cmd_initbus_help (void)
+{
+ int i;
+
+ urj_log (URJ_LOG_LEVEL_NORMAL,
+ _("Usage: %s BUSNAME\n"
+ "Initialize new bus driver for active part.\n"
+ "\n"
+ "BUSNAME Name of the bus\n"
+ "\n" "List of available buses:\n"),
+ "initbus");
+
+ for (i = 0; urj_bus_drivers[i] != NULL; i++)
+ urj_log (URJ_LOG_LEVEL_NORMAL,
+ _("%-10s %s\n"), urj_bus_drivers[i]->name,
+ urj_bus_drivers[i]->description);
+}
+
+const const urj_cmd_t urj_cmd_initbus = {
+ "initbus",
+ N_("initialize bus driver for active part"),
+ cmd_initbus_help,
+ cmd_initbus_run
+};
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2003 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2003.
+ *
+ */
+
+#include <sysdep.h>
+
+#include <stdio.h>
+#include <string.h>
+#include <stddef.h>
+
+#include <urjtag/error.h>
+#include <urjtag/part.h>
+#include <urjtag/chain.h>
+
+#include <urjtag/cmd.h>
+
+#include "cmd.h"
+
+static int
+cmd_instruction_run (urj_chain_t *chain, char *params[])
+{
+ urj_part_t *part;
+ long unsigned len;
+ urj_part_instruction_t *i;
+
+ if (urj_cmd_test_cable (chain) != URJ_STATUS_OK)
+ return URJ_STATUS_FAIL;
+
+ part = urj_tap_chain_active_part (chain);
+ if (part == NULL)
+ return URJ_STATUS_FAIL;
+
+ switch (urj_cmd_params (params))
+ {
+ case 2:
+ urj_part_set_instruction (part, params[1]);
+ if (part->active_instruction == NULL)
+ {
+ urj_error_set (URJ_ERROR_INVALID,
+ _("%s: unknown instruction '%s'"),
+ "instruction", params[1]);
+ return URJ_STATUS_FAIL;
+ }
+ return URJ_STATUS_OK;
+
+ case 3:
+ if (strcasecmp (params[1], "length") != 0)
+ {
+ urj_error_set (URJ_ERROR_SYNTAX,
+ "param 1 of 3 must be 'length', not '%s'",
+ params[1]);
+ return URJ_STATUS_FAIL;
+ }
+
+ if (urj_cmd_get_number (params[2], &len) != URJ_STATUS_OK)
+ return URJ_STATUS_FAIL;
+
+ return urj_part_instruction_length_set (part, len);
+
+ case 4:
+ i = urj_part_instruction_define (part, params[1], params[2], params[3]);
+ if (!i)
+ return URJ_STATUS_FAIL;
+
+ return URJ_STATUS_OK;
+
+ default:
+ urj_error_set (URJ_ERROR_SYNTAX,
+ "%s: #parameters should be 2, 3, or 4, not %d",
+ params[0], urj_cmd_params (params));
+ break;
+ }
+
+ return URJ_STATUS_FAIL;
+}
+
+static void
+cmd_instruction_help (void)
+{
+ urj_log (URJ_LOG_LEVEL_NORMAL,
+ _("Usage: %s INSTRUCTION\n"
+ "Usage: %s length LENGTH\n"
+ "Usage: %s INSTRUCTION CODE REGISTER\n"
+ "Change active INSTRUCTION for a part or declare new instruction.\n"
+ "\n"
+ "INSTRUCTION instruction name (e.g. BYPASS)\n"
+ "LENGTH common instruction length\n"
+ "CODE instruction code (e.g. 11111)\n"
+ "REGISTER default data register for instruction (e.g. BR)\n"),
+ "instruction", "instruction", "instruction");
+}
+
+const urj_cmd_t urj_cmd_instruction = {
+ "instruction",
+ N_("change active instruction for a part or declare new instruction"),
+ cmd_instruction_help,
+ cmd_instruction_run
+};
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2003 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2003.
+ *
+ */
+
+#include <sysdep.h>
+
+#include <stdio.h>
+#include <string.h>
+#include <stdlib.h>
+
+#include <urjtag/error.h>
+#include <urjtag/chain.h>
+#include <urjtag/part.h>
+
+#include <urjtag/cmd.h>
+
+#include "cmd.h"
+
+static int
+cmd_part_run (urj_chain_t *chain, char *params[])
+{
+ long unsigned n;
+
+ if (urj_cmd_params (params) > 3)
+ {
+ urj_error_set (URJ_ERROR_SYNTAX,
+ "%s: #parameters should be <= %d, not %d",
+ params[0], 3, urj_cmd_params (params));
+ return URJ_STATUS_FAIL;
+ }
+
+/* part alias U1 (3 params) */
+ if (urj_cmd_params (params) == 3)
+ {
+ if (strcasecmp (params[1], "alias") == 0)
+ {
+ urj_part_t *part = urj_tap_chain_active_part (chain);
+
+ if (part == NULL)
+ return URJ_STATUS_FAIL;
+
+ part->alias = strdup (params[2]);
+ if (part->alias == NULL)
+ {
+ urj_error_set(URJ_ERROR_OUT_OF_MEMORY, "strdup(%s) fails",
+ params[2]);
+ return URJ_STATUS_FAIL;
+ }
+
+ return URJ_STATUS_OK;
+ }
+ }
+
+ if (urj_cmd_params (params) != 2)
+ {
+ urj_error_set (URJ_ERROR_SYNTAX,
+ "%s: #parameters should be %d or %d, not %d",
+ params[0], 2, 3, urj_cmd_params (params));
+ return URJ_STATUS_FAIL;
+ }
+
+ if (urj_cmd_test_cable (chain) != URJ_STATUS_OK)
+ return URJ_STATUS_FAIL;
+
+ if (!chain->parts)
+ {
+ urj_error_set (URJ_ERROR_ILLEGAL_STATE, "Run \"detect\" first");
+ return URJ_STATUS_FAIL;
+ }
+
+/* Search for alias too djf */
+ if (urj_cmd_get_number (params[1], &n) != URJ_STATUS_OK)
+ {
+
+ /* Search all parts to check their aliases */
+ int i;
+ char *a;
+
+ for (i = 0; i < chain->parts->len; i++)
+ {
+ a = chain->parts->parts[i]->alias;
+ if (a && strcasecmp (a, params[1]) == 0)
+ break;
+ }
+ if (i < chain->parts->len)
+ {
+ n = i;
+ }
+ else
+ {
+ urj_error_set (URJ_ERROR_NOTFOUND, "part '%s'", params[1]);
+ return URJ_STATUS_FAIL;
+ }
+ }
+
+ if (n >= chain->parts->len)
+ {
+ urj_error_set (URJ_ERROR_INVALID,
+ _("%s: invalid part number %lu, max %d"), "part",
+ n, chain->parts->len);
+ return URJ_STATUS_FAIL;
+ }
+
+ chain->active_part = n;
+
+ return URJ_STATUS_OK;
+}
+
+static void
+cmd_part_help (void)
+{
+ // @@@@ RFHH this doesn't reflect input syntax:
+ // jtag> part PART
+ // jtag> part alias ALIAS
+ urj_log (URJ_LOG_LEVEL_NORMAL,
+ _("Usage: %s PART\n"
+ "Change active part for current JTAG chain.\n"
+ "\n" "PART part number | alias\n"),
+ "part");
+}
+
+const urj_cmd_t urj_cmd_part = {
+ "part",
+ N_("change active part for current JTAG chain"),
+ cmd_part_help,
+ cmd_part_run
+};
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2003 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Matan Ziv-Av <matan@svgalib.org>, 2003.
+ *
+ */
+
+#include <sysdep.h>
+
+#include <stdio.h>
+#include <stdint.h>
+
+#include <urjtag/error.h>
+#include <urjtag/bus.h>
+
+#include <urjtag/cmd.h>
+
+#include "cmd.h"
+
+static int
+cmd_peek_run (urj_chain_t *chain, char *params[])
+{
+ long unsigned adr;
+ uint32_t val;
+ int pars, j = 1;
+ urj_bus_area_t area;
+
+ /* urj_bus_t *bus = part_get_active_bus(chain); */
+
+ if ((pars = urj_cmd_params (params)) < 2)
+ {
+ urj_error_set (URJ_ERROR_SYNTAX,
+ "%s: #parameters should be >= %d, not %d",
+ params[0], 2, urj_cmd_params (params));
+ return URJ_STATUS_FAIL;
+ }
+
+ if (!urj_bus)
+ {
+ urj_error_set (URJ_ERROR_ILLEGAL_STATE, _("Bus missing"));
+ return URJ_STATUS_FAIL;
+ }
+ if (!urj_bus->driver)
+ {
+ urj_error_set (URJ_ERROR_ILLEGAL_STATE, _("Bus driver missing"));
+ return URJ_STATUS_FAIL;
+ }
+
+ do
+ {
+ if (urj_cmd_get_number (params[j], &adr) != URJ_STATUS_OK)
+ return URJ_STATUS_FAIL;
+
+ URJ_BUS_PREPARE (urj_bus);
+ URJ_BUS_AREA (urj_bus, adr, &area);
+ val = URJ_BUS_READ (urj_bus, adr);
+
+ switch (area.width)
+ {
+ case 8:
+ val &= 0xff;
+ urj_log (URJ_LOG_LEVEL_NORMAL,
+ _("URJ_BUS_READ(0x%08lx) = 0x%02lX (%li)\n"), adr,
+ (long unsigned) val, (long unsigned) val);
+ break;
+ case 16:
+ val &= 0xffff;
+ urj_log (URJ_LOG_LEVEL_NORMAL,
+ _("URJ_BUS_READ(0x%08lx) = 0x%04lX (%li)\n"), adr,
+ (long unsigned) val, (long unsigned) val);
+ break;
+ default:
+ urj_log (URJ_LOG_LEVEL_NORMAL,
+ _("URJ_BUS_READ(0x%08lx) = 0x%08lX (%li)\n"), adr,
+ (long unsigned) val, (long unsigned) val);
+ }
+ }
+ while (++j != pars);
+
+ return URJ_STATUS_OK;
+}
+
+static void
+cmd_peek_help (void)
+{
+ urj_log (URJ_LOG_LEVEL_NORMAL,
+ _("Usage: %s ADDR\n"
+ "Read a single word (bus width size).\n"
+ "\n"
+ "ADDR address to read from\n"
+ "\n"
+ "ADDR could be in decimal or hexadecimal (prefixed with 0x) form.\n"
+ "\n"),
+ "peek");
+}
+
+const urj_cmd_t urj_cmd_peek = {
+ "peek",
+ N_("read a single word"),
+ cmd_peek_help,
+ cmd_peek_run
+};
+
+static int
+cmd_poke_run (urj_chain_t *chain, char *params[])
+{
+ long unsigned adr, val;
+ urj_bus_area_t area;
+ /*urj_bus_t *bus = part_get_active_bus(chain); */
+ int k = 1, pars = urj_cmd_params (params);
+
+ if (pars < 3 || !(pars & 1))
+ {
+ urj_error_set (URJ_ERROR_SYNTAX,
+ "%s: #parameters should be >= %d and odd-numbered, not %d",
+ params[0], 3, urj_cmd_params (params));
+ return URJ_STATUS_FAIL;
+ }
+
+ if (!urj_bus)
+ {
+ urj_error_set (URJ_ERROR_ILLEGAL_STATE, _("Bus missing"));
+ return URJ_STATUS_FAIL;
+ }
+ if (!urj_bus->driver)
+ {
+ urj_error_set (URJ_ERROR_ILLEGAL_STATE, _("Bus driver missing"));
+ return URJ_STATUS_FAIL;
+ }
+
+ URJ_BUS_PREPARE (urj_bus);
+
+ while (k < pars)
+ {
+ if (urj_cmd_get_number (params[k], &adr) != URJ_STATUS_OK
+ || urj_cmd_get_number (params[k + 1], &val) != URJ_STATUS_OK)
+ return URJ_STATUS_FAIL;
+ URJ_BUS_AREA (urj_bus, adr, &area);
+ URJ_BUS_WRITE (urj_bus, adr, val);
+ k += 2;
+ }
+
+ return URJ_STATUS_OK;
+}
+
+static void
+cmd_poke_help (void)
+{
+ urj_log (URJ_LOG_LEVEL_NORMAL,
+ _("Usage: %s ADDR VAL [ADDR VAL] ... \n"
+ "Write a single word (bus width size).\n"
+ "\n"
+ "ADDR address to write\n"
+ "VAL value to write\n"
+ "\n"
+ "ADDR and VAL could be in decimal or hexadecimal (prefixed with 0x) form.\n"
+ "\n"),
+ "poke");
+}
+
+const urj_cmd_t urj_cmd_poke = {
+ "poke",
+ N_("write a single word"),
+ cmd_poke_help,
+ cmd_poke_run
+};
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2008 K. Waschk
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Kolja Waschk, 2008
+ * based on idea and code by Sebastian Hesselbarth, 2008
+ * and code by Marcel Telka <marcel@telka.sk>, 2003.
+ *
+ */
+
+#include <sysdep.h>
+
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+
+#include <urjtag/error.h>
+#include <urjtag/chain.h>
+#include <urjtag/pod.h>
+
+#include <urjtag/cmd.h>
+
+#include "cmd.h"
+
+static int
+cmd_pod_run (urj_chain_t *chain, char *params[])
+{
+ int i, j;
+ int mask = 0;
+ int val = 0;
+
+ if ((i = urj_cmd_params (params)) < 2)
+ {
+ urj_error_set (URJ_ERROR_SYNTAX,
+ "%s: #parameters should be >= %d, not %d",
+ params[0], 2, urj_cmd_params (params));
+ return URJ_STATUS_FAIL;
+ }
+
+ if (urj_cmd_test_cable (chain) != URJ_STATUS_OK)
+ return URJ_STATUS_FAIL;
+
+ for (j = 1; j < i; j++)
+ {
+ char *eq = strrchr (params[j], '=');
+ if (!eq)
+ {
+ urj_error_set (URJ_ERROR_SYNTAX,
+ "parameter format should be 'SIGNAL=[0|1]', not '%s'",
+ params[j]);
+ return URJ_STATUS_FAIL;
+ }
+
+ urj_pod_sigsel_t it = URJ_POD_CS_NONE;
+ int n = strlen (params[j]);
+
+ if (n > 4 && (strncasecmp (params[j], "tck", 3) == 0))
+ it = URJ_POD_CS_TCK;
+ else if (n > 4 && (strncasecmp (params[j], "tms", 3) == 0))
+ it = URJ_POD_CS_TMS;
+ else if (n > 4 && (strncasecmp (params[j], "tdi", 3) == 0))
+ it = URJ_POD_CS_TDI;
+ else if (n > 5 && (strncasecmp (params[j], "trst", 3) == 0))
+ it = URJ_POD_CS_TRST;
+ else if (n > 6 && (strncasecmp (params[j], "reset", 3) == 0))
+ it = URJ_POD_CS_RESET;
+ if (it == URJ_POD_CS_NONE)
+ {
+ urj_error_set (URJ_ERROR_SYNTAX, "illegal signal name in '%s'",
+ params[j]);
+ return URJ_STATUS_FAIL;
+ }
+
+ mask |= it;
+ if (atoi (eq + 1) != 0)
+ val |= it;
+ }
+
+ if (urj_tap_chain_set_pod_signal (chain, mask, val) == -1)
+ return URJ_STATUS_FAIL;
+
+ return URJ_STATUS_OK;
+}
+
+static void
+cmd_pod_help (void)
+{
+ urj_log (URJ_LOG_LEVEL_NORMAL,
+ _("Usage: %s SIGNAL=# [SIGNAL=# ...]\n"
+ "Set state of POD signal(s) to 0 or 1.\n"
+ "\n"
+ "SIGNAL TCK,TMS, TDI, TRST, or RESET\n"
+ "# 0 or 1\n"),
+ "pod");
+}
+
+const urj_cmd_t urj_cmd_pod = {
+ "pod",
+ N_("Set state of POD signal(s)"),
+ cmd_pod_help,
+ cmd_pod_run
+};
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2003 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2003.
+ *
+ */
+
+#include <sysdep.h>
+
+#include <stdlib.h>
+#include <stdio.h>
+#include <string.h>
+
+#ifdef HAVE_WCHAR_H
+#include <wchar.h>
+#else
+typedef char wchar_t;
+# define mbstowcs(dst,src,n) 0
+# define wcslen(str) strlen(str)
+#endif
+
+#include <urjtag/error.h>
+#include <urjtag/chain.h>
+#include <urjtag/part.h>
+#include <urjtag/bus.h>
+#include <urjtag/data_register.h>
+#include <urjtag/part_instruction.h>
+#include <urjtag/bssignal.h>
+#include <urjtag/bsbit.h>
+#include <urjtag/jtag.h>
+
+#include <urjtag/cmd.h>
+
+#include "cmd.h"
+
+static int
+cmd_print_run (urj_chain_t *chain, char *params[])
+{
+#define FORMAT_LENGTH 128
+ char format[FORMAT_LENGTH];
+#if HAVE_SWPRINTF
+ wchar_t wformat[FORMAT_LENGTH];
+#endif /* HAVE_SWPRINTF */
+ wchar_t wheader[FORMAT_LENGTH];
+ char header[FORMAT_LENGTH];
+ int i;
+ int noheader = 0;
+
+ if (urj_cmd_params (params) > 2)
+ {
+ urj_error_set (URJ_ERROR_SYNTAX,
+ "%s: #parameters should be <= %d, not %d",
+ params[0], 2, urj_cmd_params (params));
+ return URJ_STATUS_FAIL;
+ }
+
+ if (urj_cmd_test_cable (chain) != URJ_STATUS_OK)
+ return URJ_STATUS_FAIL;
+
+ if (!chain->parts)
+ {
+ urj_error_set (URJ_ERROR_ILLEGAL_STATE, "Run \"detect\" first");
+ return URJ_STATUS_FAIL;
+ }
+
+ if (urj_cmd_params (params) == 2)
+ {
+ if (strcasecmp (params[1], "bus") == 0)
+ noheader = 1;
+
+ if (strcasecmp (params[1], "signals") == 0)
+ {
+
+ urj_log (URJ_LOG_LEVEL_NORMAL, "Signals:\n");
+ urj_part_t *part;
+ urj_part_signal_t *s;
+ part = chain->parts->parts[chain->active_part];
+ for (s = part->signals; s != NULL; s = s->next)
+ {
+ urj_part_salias_t *sa;
+ if (s->pin)
+ urj_log (URJ_LOG_LEVEL_NORMAL, "%s %s", s->name, s->pin);
+ else
+ urj_log (URJ_LOG_LEVEL_NORMAL, "%s", s->name);
+ if (s->input)
+ urj_log (URJ_LOG_LEVEL_NORMAL, "\tinput=%s",
+ s->input->name);
+ if (s->output)
+ urj_log (URJ_LOG_LEVEL_NORMAL, "\toutput=%s",
+ s->output->name);
+
+ for (sa = part->saliases; sa != NULL; sa = sa->next)
+ {
+ if (s == sa->signal)
+ urj_log (URJ_LOG_LEVEL_NORMAL, "\tsalias=%s", sa->name);
+ }
+ urj_log (URJ_LOG_LEVEL_NORMAL, "\n");
+ }
+ return URJ_STATUS_OK;
+ }
+
+ if (strcasecmp (params[1], "instructions") == 0)
+ {
+ urj_part_t *part;
+ urj_part_instruction_t *inst;
+
+ snprintf (format, sizeof format, _(" Active %%-%ds %%-%ds\n"),
+ URJ_INSTRUCTION_MAXLEN_INSTRUCTION,
+ URJ_DATA_REGISTER_MAXLEN);
+#if HAVE_SWPRINTF
+ if (mbstowcs (wformat, format, sizeof format) == -1)
+ // @@@@ RFHH throw urj_error?
+ printf (_("(%d) String conversion failed!\n"), __LINE__);
+ swprintf (wheader, sizeof format, wformat, _("Instruction"), _("Register"));
+ if (wcstombs (header, wheader, sizeof format) == -1)
+ // @@@@ RFHH throw urj_error?
+ printf (_("(%d) String conversion failed!\n"), __LINE__);
+#else /* HAVE_SWPRINTF */
+ snprintf (header, sizeof format, format, _("Instruction"), _("Register"));
+ if (mbstowcs (wheader, header, sizeof format) == -1)
+ // @@@@ RFHH throw urj_error?
+ printf (_("(%d) String conversion failed!\n"), __LINE__);
+#endif /* HAVE_SWPRINTF */
+ urj_log (URJ_LOG_LEVEL_NORMAL, "%s", header);
+
+ for (i = 0; i < wcslen (wheader); i++)
+ urj_log (URJ_LOG_LEVEL_NORMAL, "%c", '-');
+ urj_log (URJ_LOG_LEVEL_NORMAL, "%c", '\n');
+
+ snprintf (format, sizeof format, _(" %%c %%-%ds %%-%ds\n"),
+ URJ_INSTRUCTION_MAXLEN_INSTRUCTION,
+ URJ_DATA_REGISTER_MAXLEN);
+
+ part = chain->parts->parts[chain->active_part];
+ for (inst = part->instructions; inst != NULL; inst = inst->next)
+ {
+ urj_log (URJ_LOG_LEVEL_NORMAL, format,
+ (inst == part->active_instruction) ? 'X' : ' ',
+ inst->name, inst->data_register->name);
+ }
+ return URJ_STATUS_OK;
+ }
+ }
+
+ if (noheader == 0)
+ {
+ snprintf (format, sizeof format,
+ _(" No. %%-%ds %%-%ds %%-%ds %%-%ds %%-%ds\n"),
+ URJ_PART_MANUFACTURER_MAXLEN, URJ_PART_PART_MAXLEN,
+ URJ_PART_STEPPING_MAXLEN,
+ URJ_INSTRUCTION_MAXLEN_INSTRUCTION,
+ URJ_DATA_REGISTER_MAXLEN);
+#if HAVE_SWPRINTF
+ if (mbstowcs (wformat, format, sizeof format) == -1)
+ // @@@@ RFHH throw urj_error?
+ printf (_("(%d) String conversion failed!\n"), __LINE__);
+ swprintf (wheader, sizeof format, wformat, _("Manufacturer"), _("Part"),
+ _("Stepping"), _("Instruction"), _("Register"));
+ if (wcstombs (header, wheader, sizeof format) == -1)
+ // @@@@ RFHH throw urj_error?
+ printf (_("(%d) String conversion failed!\n"), __LINE__);
+#else /* HAVE_SWPRINTF */
+ snprintf (header, sizeof format, format, _("Manufacturer"), _("Part"),
+ _("Stepping"), _("Instruction"), _("Register"));
+ if (mbstowcs (wheader, header, sizeof format) == -1)
+ // @@@@ RFHH throw urj_error?
+ printf (_("(%d) String conversion failed!\n"), __LINE__);
+#endif /* HAVE_SWPRINTF */
+ urj_log (URJ_LOG_LEVEL_NORMAL, "%s", header);
+
+ for (i = 0; i < wcslen (wheader); i++)
+ urj_log (URJ_LOG_LEVEL_NORMAL, "%c", '-');
+ urj_log (URJ_LOG_LEVEL_NORMAL, "%c", '\n');
+ }
+
+ if (urj_cmd_params (params) == 1)
+ {
+ int r = URJ_STATUS_OK;
+
+ if (chain->parts->len > chain->active_part)
+ {
+ if (chain->parts->parts[chain->active_part]->alias)
+ urj_log (URJ_LOG_LEVEL_NORMAL, _(" %3d %s "),
+ chain->active_part,
+ chain->parts->parts[chain->active_part]->alias);
+ else
+ urj_log (URJ_LOG_LEVEL_NORMAL, _(" %3d "), chain->active_part);
+
+ urj_part_print (URJ_LOG_LEVEL_NORMAL,
+ chain->parts->parts[chain->active_part]);
+ }
+ if (urj_bus != NULL)
+ {
+ int i;
+ uint64_t a;
+ urj_bus_area_t area;
+
+ for (i = 0; i < urj_buses.len; i++)
+ if (urj_buses.buses[i] == urj_bus)
+ break;
+ urj_log (URJ_LOG_LEVEL_NORMAL, _("\nActive bus:\n*%d: "), i);
+ URJ_BUS_PRINTINFO (URJ_LOG_LEVEL_NORMAL, urj_bus);
+
+ for (a = 0; a < UINT64_C (0x100000000);
+ a = area.start + area.length)
+ {
+ r = URJ_BUS_AREA (urj_bus, a, &area);
+ if (r != URJ_STATUS_OK)
+ {
+ urj_log (URJ_LOG_LEVEL_NORMAL,
+ _("Error in bus area discovery at 0x%08llX\n"),
+ (long long unsigned int) a);
+ break;
+ }
+ if (area.width != 0)
+ {
+ if (area.description != NULL)
+ urj_log (URJ_LOG_LEVEL_NORMAL,
+ _("\tstart: 0x%08lX, length: 0x%08llX, data width: %d bit, (%s)\n"),
+ (long unsigned) area.start,
+ (long long unsigned int) area.length,
+ area.width, _(area.description));
+ else
+ urj_log (URJ_LOG_LEVEL_NORMAL,
+ _("\tstart: 0x%08lX, length: 0x%08llX, data width: %d bit\n"),
+ (long unsigned) area.start,
+ (long long unsigned int) area.length,
+ area.width);
+ }
+ }
+ }
+
+ return r;
+ }
+
+ if (strcasecmp (params[1], "chain") == 0)
+ {
+ urj_part_parts_print (URJ_LOG_LEVEL_NORMAL, chain->parts);
+ return URJ_STATUS_OK;
+ }
+
+ for (i = 0; i < urj_buses.len; i++)
+ {
+ if (urj_buses.buses[i] == urj_bus)
+ urj_log (URJ_LOG_LEVEL_NORMAL, _("*%d: "), i);
+ else
+ urj_log (URJ_LOG_LEVEL_NORMAL, _("%d: "), i);
+ URJ_BUS_PRINTINFO (URJ_LOG_LEVEL_NORMAL, urj_buses.buses[i]);
+ }
+
+ return URJ_STATUS_OK;
+}
+
+static void
+cmd_print_help (void)
+{
+ urj_log (URJ_LOG_LEVEL_NORMAL,
+ _("Usage: %s [chain|bus|signals|instructions]\n"
+ "Display JTAG chain status.\n"
+ "\n"
+ "Display list of the parts connected to the JTAG chain including\n"
+ "part number and current (active) instruction and data register.\n"),
+ "print");
+}
+
+const urj_cmd_t urj_cmd_print = {
+ "print",
+ N_("display JTAG chain list/status"),
+ cmd_print_help,
+ cmd_print_run
+};
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2003 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2003.
+ *
+ */
+
+#include <sysdep.h>
+
+#include <stdio.h>
+
+#include <urjtag/error.h>
+#include <urjtag/cmd.h>
+
+#include "cmd.h"
+
+static int
+cmd_quit_run (urj_chain_t *chain, char *params[])
+{
+ if (urj_cmd_params (params) != 1)
+ {
+ urj_error_set (URJ_ERROR_SYNTAX,
+ "%s: #parameters should be %d, not %d",
+ params[0], 1, urj_cmd_params (params));
+ return URJ_STATUS_FAIL;
+ }
+
+ return URJ_STATUS_MUST_QUIT;
+}
+
+static void
+cmd_quit_help (void)
+{
+ urj_log (URJ_LOG_LEVEL_NORMAL,
+ _("Usage: %s\n" "Exit from %s.\n"), "quit", PACKAGE);
+}
+
+const urj_cmd_t urj_cmd_quit = {
+ "quit",
+ N_("exit and terminate this session"),
+ cmd_quit_help,
+ cmd_quit_run
+};
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2003 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2003.
+ *
+ */
+
+#include <sysdep.h>
+
+#include <stdio.h>
+#include <stdint.h>
+#include <string.h>
+#include <errno.h>
+
+#include <urjtag/error.h>
+#include <urjtag/bus.h>
+
+#include <urjtag/cmd.h>
+
+#include "cmd.h"
+
+static int
+cmd_readmem_run (urj_chain_t *chain, char *params[])
+{
+ long unsigned adr;
+ long unsigned len;
+ int r;
+ FILE *f;
+
+ if (urj_cmd_params (params) != 4)
+ {
+ urj_error_set (URJ_ERROR_SYNTAX,
+ "%s: #parameters should be %d, not %d",
+ params[0], 4, urj_cmd_params (params));
+ return URJ_STATUS_FAIL;
+ }
+
+ if (!urj_bus)
+ {
+ urj_error_set (URJ_ERROR_ILLEGAL_STATE, _("Bus missing"));
+ return URJ_STATUS_FAIL;
+ }
+
+ if (urj_cmd_get_number (params[1], &adr) != URJ_STATUS_OK
+ || urj_cmd_get_number (params[2], &len) != URJ_STATUS_OK)
+ return URJ_STATUS_FAIL;
+
+ f = fopen (params[3], "w");
+ if (!f)
+ {
+ urj_error_IO_set (_("Unable to create file `%s'"), params[3]);
+ return URJ_STATUS_FAIL;
+ }
+ r = urj_bus_readmem (urj_bus, f, adr, len);
+ fclose (f);
+
+ return r;
+}
+
+static void
+cmd_readmem_help (void)
+{
+ urj_log (URJ_LOG_LEVEL_NORMAL,
+ _("Usage: %s ADDR LEN FILENAME\n"
+ "Copy device memory content starting with ADDR to FILENAME file.\n"
+ "\n"
+ "ADDR start address of the copied memory area\n"
+ "LEN copied memory length\n"
+ "FILENAME name of the output file\n"
+ "\n"
+ "ADDR and LEN could be in decimal or hexadecimal (prefixed with 0x) form.\n"),
+ "readmem");
+}
+
+const urj_cmd_t urj_cmd_readmem = {
+ "readmem",
+ N_("read content of the memory and write it to file"),
+ cmd_readmem_help,
+ cmd_readmem_run
+};
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2003 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2003.
+ *
+ */
+
+#include <sysdep.h>
+
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+
+#include <urjtag/error.h>
+#include <urjtag/chain.h>
+#include <urjtag/part.h>
+#include <urjtag/data_register.h>
+#include <urjtag/tap_register.h>
+
+#include <urjtag/cmd.h>
+
+#include "cmd.h"
+
+static int
+cmd_register_run (urj_chain_t *chain, char *params[])
+{
+ urj_part_t *part;
+ long unsigned len;
+
+ if (urj_cmd_params (params) != 3)
+ {
+ urj_error_set (URJ_ERROR_SYNTAX,
+ "%s: #parameters should be %d, not %d",
+ params[0], 3, urj_cmd_params (params));
+ return URJ_STATUS_FAIL;
+ }
+
+ if (urj_cmd_test_cable (chain) != URJ_STATUS_OK)
+ return URJ_STATUS_FAIL;
+
+ part = urj_tap_chain_active_part (chain);
+ if (part == NULL)
+ return URJ_STATUS_FAIL;
+
+ if (urj_cmd_get_number (params[2], &len) != URJ_STATUS_OK)
+ return URJ_STATUS_FAIL;
+
+ return urj_part_data_register_define (part, params[1], len);
+}
+
+static void
+cmd_register_help (void)
+{
+ urj_log (URJ_LOG_LEVEL_NORMAL,
+ _("Usage: %s NAME LENGTH\n"
+ "Define new data register with specified NAME and LENGTH.\n"
+ "\n"
+ "NAME Data register name\n"
+ "LENGTH Data register length\n"),
+ "register");
+}
+
+const urj_cmd_t urj_cmd_register = {
+ "register",
+ N_("define new data register for a part"),
+ cmd_register_help,
+ cmd_register_run
+};
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2004 Marcel Telka
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2004.
+ *
+ */
+
+#include <sysdep.h>
+
+#include <stdio.h>
+#include <string.h>
+
+#include <urjtag/error.h>
+#include <urjtag/tap.h>
+
+#include <urjtag/cmd.h>
+
+#include "cmd.h"
+
+static int
+cmd_reset_run (urj_chain_t *chain, char *params[])
+{
+ if (urj_cmd_params (params) != 1)
+ {
+ urj_error_set (URJ_ERROR_SYNTAX,
+ "%s: #parameters should be %d, not %d",
+ params[0], 1, urj_cmd_params (params));
+ return URJ_STATUS_FAIL;
+ }
+
+ if (urj_cmd_test_cable (chain) != URJ_STATUS_OK)
+ return URJ_STATUS_FAIL;
+
+ return urj_tap_reset_bypass (chain);
+}
+
+static void
+cmd_reset_help (void)
+{
+ urj_log (URJ_LOG_LEVEL_NORMAL,
+ _("Usage: %s\n" "Reset current JTAG chain.\n"), "reset");
+}
+
+const urj_cmd_t urj_cmd_reset = {
+ "reset",
+ N_("reset JTAG chain"),
+ cmd_reset_help,
+ cmd_reset_run
+};
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2003 Marcel Telka
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2003.
+ *
+ */
+
+#include <sysdep.h>
+
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+
+#include <urjtag/error.h>
+#include <urjtag/chain.h>
+#include <urjtag/part.h>
+#include <urjtag/bssignal.h>
+
+#include <urjtag/cmd.h>
+
+#include "cmd.h"
+
+static int
+cmd_salias_run (urj_chain_t *chain, char *params[])
+{
+ urj_part_t *part;
+ urj_part_signal_t *s;
+ urj_part_salias_t *sa;
+
+ if (urj_cmd_params (params) != 3)
+ {
+ urj_error_set (URJ_ERROR_SYNTAX,
+ "%s: #parameters should be %d, not %d",
+ params[0], 3, urj_cmd_params (params));
+ return URJ_STATUS_FAIL;
+ }
+
+ if (urj_cmd_test_cable (chain) != URJ_STATUS_OK)
+ return URJ_STATUS_FAIL;
+
+ part = urj_tap_chain_active_part (chain);
+ if (part == NULL)
+ return URJ_STATUS_FAIL;
+
+ if (urj_part_find_signal (part, params[1]) != NULL)
+ {
+ return URJ_STATUS_FAIL;
+ }
+
+ s = urj_part_find_signal (part, params[2]);
+ if (s == NULL)
+ {
+ urj_error_set (URJ_ERROR_NOTFOUND, _("Signal '%s' not found"),
+ params[2]);
+ return URJ_STATUS_FAIL;
+ }
+
+ sa = urj_part_salias_alloc (params[1], s);
+ if (!sa)
+ return URJ_STATUS_FAIL;
+
+ sa->next = part->saliases;
+ part->saliases = sa;
+
+ return URJ_STATUS_OK;
+}
+
+static void
+cmd_salias_help (void)
+{
+ urj_log (URJ_LOG_LEVEL_NORMAL,
+ _("Usage: %s ALIAS SIGNAL\n"
+ "Define new signal ALIAS as alias for existing SIGNAL.\n"
+ "\n"
+ "ALIAS New signal alias name\n"
+ "SIGNAL Existing signal name\n"),
+ "signal");
+}
+
+const urj_cmd_t urj_cmd_salias = {
+ "salias",
+ N_("define an alias for a signal"),
+ cmd_salias_help,
+ cmd_salias_run
+};
--- /dev/null
+/*
+ * $Id: scan.c 733 2007-11-07 22:21:33Z arniml $
+ *
+ * Copyright (C) 2003 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2003.
+ *
+ */
+
+#include <sysdep.h>
+
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+
+#include <urjtag/error.h>
+#include <urjtag/chain.h>
+#include <urjtag/part.h>
+#include <urjtag/tap_register.h>
+#include <urjtag/data_register.h>
+#include <urjtag/bssignal.h>
+#include <urjtag/bsbit.h>
+
+#include <urjtag/cmd.h>
+
+#include "cmd.h"
+
+static int
+cmd_scan_run (urj_chain_t *chain, char *params[])
+{
+ urj_part_t *part;
+ urj_data_register_t *bsr;
+ urj_tap_register_t *obsr;
+ int i;
+
+ if ((i = urj_cmd_params (params)) < 1)
+ {
+ urj_error_set (URJ_ERROR_SYNTAX,
+ "%s: #parameters should be >= %d, not %d",
+ params[0], 1, urj_cmd_params (params));
+ return URJ_STATUS_FAIL;
+ }
+
+ if (urj_cmd_test_cable (chain) != URJ_STATUS_OK)
+ return URJ_STATUS_FAIL;
+
+ part = urj_tap_chain_active_part (chain);
+ if (part == NULL)
+ return URJ_STATUS_FAIL;
+
+ /* search for Boundary Scan Register */
+ bsr = urj_part_find_data_register (part, "BSR");
+ if (!bsr)
+ {
+ urj_error_set (URJ_ERROR_NOTFOUND,
+ _("Boundary Scan Register (BSR) not found"));
+ return URJ_STATUS_FAIL;
+ }
+
+ if (urj_part_find_instruction (part, "SAMPLE"))
+ {
+ urj_part_set_instruction (part, "SAMPLE");
+ }
+ else if (urj_part_find_instruction (part, "SAMPLE/PRELOAD"))
+ {
+ urj_part_set_instruction (part, "SAMPLE/PRELOAD");
+ }
+ else
+ {
+ urj_error_set (URJ_ERROR_UNSUPPORTED,_("Part can't SAMPLE"));
+ return URJ_STATUS_FAIL;
+ }
+
+ urj_tap_chain_shift_instructions (chain);
+
+ obsr = urj_tap_register_alloc (bsr->out->len);
+ if (!obsr)
+ return URJ_STATUS_FAIL;
+
+ urj_tap_register_init (obsr, urj_tap_register_get_string (bsr->out)); // copy
+
+ urj_tap_chain_shift_data_registers (chain, 1);
+
+ urj_part_signal_t *s;
+ for (s = part->signals; s; s = s->next)
+ {
+ if (s->input != NULL)
+ {
+ int old = obsr->data[s->input->bit];
+ int new = bsr->out->data[s->input->bit];
+ if (old != new)
+ {
+ urj_part_salias_t *a;
+ urj_log (URJ_LOG_LEVEL_NORMAL, "%s", s->name);
+ for (a = part->saliases; a; a = a->next)
+ {
+ if (a->signal == s)
+ urj_log (URJ_LOG_LEVEL_NORMAL, ",%s", a->name);
+ }
+ urj_log (URJ_LOG_LEVEL_NORMAL, _(": %d > %d\n"), old, new);
+ }
+ }
+ }
+
+ urj_tap_register_free (obsr);
+
+ return URJ_STATUS_OK;
+}
+
+static void
+cmd_scan_help (void)
+{
+ urj_log (URJ_LOG_LEVEL_NORMAL,
+ _("Usage: %s [SIGNAL]* \n"
+ "Read BSR and show changes since last scan.\n"),
+ "scan");
+}
+
+const urj_cmd_t urj_cmd_scan = {
+ "scan",
+ N_("read BSR and show changes since last scan"),
+ cmd_scan_help,
+ cmd_scan_run
+};
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2003 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2003.
+ *
+ */
+
+#include <sysdep.h>
+
+#include <stdio.h>
+#include <string.h>
+
+#include <urjtag/error.h>
+#include <urjtag/part.h>
+#include <urjtag/chain.h>
+#include <urjtag/bssignal.h>
+
+#include <urjtag/cmd.h>
+
+#include "cmd.h"
+
+static int
+cmd_set_run (urj_chain_t *chain, char *params[])
+{
+ int dir;
+ long unsigned data = 0;
+ urj_part_signal_t *s;
+ urj_part_t *part;
+
+ if (urj_cmd_params (params) < 4 || urj_cmd_params (params) > 5)
+ {
+ urj_error_set (URJ_ERROR_SYNTAX,
+ "%s: #parameters should be 4 or 5, not %d",
+ params[0], urj_cmd_params (params));
+ return URJ_STATUS_FAIL;
+ }
+
+ if (strcasecmp (params[1], "signal") != 0)
+ {
+ urj_error_set (URJ_ERROR_SYNTAX,
+ "%s: second parameter must be '%s'",
+ params[0], params[1]);
+ return URJ_STATUS_FAIL;
+ }
+
+ if (urj_cmd_test_cable (chain) != URJ_STATUS_OK)
+ return URJ_STATUS_FAIL;
+
+ part = urj_tap_chain_active_part (chain);
+ if (part == NULL)
+ return URJ_STATUS_FAIL;
+
+ /* direction */
+ if (strcasecmp (params[3], "in") != 0
+ && strcasecmp (params[3], "out") != 0)
+ {
+ urj_error_set (URJ_ERROR_SYNTAX,
+ "%s: DIR parameter must be 'in' or 'out', not '%s'",
+ params[0], params[3]);
+ return URJ_STATUS_FAIL;
+ }
+
+ dir = (strcasecmp (params[3], "in") == 0) ? 0 : 1;
+
+ if (dir)
+ {
+ if (urj_cmd_get_number (params[4], &data) != URJ_STATUS_OK)
+ return URJ_STATUS_FAIL;
+ if (data > 1)
+ {
+ urj_error_set (URJ_ERROR_SYNTAX,
+ "%s: DATA parameter must be '0' or '1', not '%s'",
+ params[0], params[4]);
+ return URJ_STATUS_FAIL;
+ }
+ }
+
+ s = urj_part_find_signal (part, params[2]);
+ if (!s)
+ {
+ urj_error_set (URJ_ERROR_NOTFOUND, _("signal '%s' not found"),
+ params[2]);
+ return URJ_STATUS_FAIL;
+ }
+
+ return urj_part_set_signal (part, s, dir, data);
+}
+
+static void
+cmd_set_help (void)
+{
+ urj_log (URJ_LOG_LEVEL_NORMAL,
+ _("Usage: %s SIGNAL DIR [DATA]\n"
+ "Set signal state in input BSR (Boundary Scan Register).\n"
+ "\n"
+ "SIGNAL signal name (from JTAG declaration file)\n"
+ "DIR requested signal direction; possible values: 'in' or 'out'\n"
+ "DATA desired output signal value ('0' or '1'); used only if DIR\n"
+ " is 'out'\n"),
+ "set signal");
+}
+
+const urj_cmd_t urj_cmd_set = {
+ "set",
+ N_("set external signal value"),
+ cmd_set_help,
+ cmd_set_run
+};
--- /dev/null
+/*
+ * $Id: shell.c,v 1.6 2003/08/19 08:42:20 telka Exp $
+ *
+ * Copyright (C) 2003 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2003.
+ * shell.c added by djf
+ */
+
+#include <sysdep.h>
+
+#include <sys/types.h>
+#include <unistd.h>
+
+#include <stdio.h>
+#include <string.h>
+#include <stdlib.h>
+
+#include <urjtag/error.h>
+#include <urjtag/cmd.h>
+
+#include "cmd.h"
+
+static int
+cmd_shell_run (urj_chain_t *chain, char *params[])
+{
+ int i, len, n = urj_cmd_params (params);
+ char *shell_cmd;
+
+ if ((n = urj_cmd_params (params)) == 1)
+ {
+ urj_error_set (URJ_ERROR_SYNTAX,
+ "%s: #parameters should be >= %d, not %d",
+ params[0], 2, urj_cmd_params (params));
+ return URJ_STATUS_FAIL;
+ }
+
+ /* I must apologize to everyone who knows what they are doing for
+ * the following. If you can pass a shell argument past strtok the
+ * please fix this.
+ */
+ /* The problem is the parser which splits commands into params[]
+ * and doesn't allow quoting. So we concatenate the params[] here
+ * with single spaces, although the original might have different
+ * whitespace (more than one space, tabs, ...) - kawk */
+
+ for (i = 1, len = 0; i < n; i++)
+ len += (1 + strlen (params[i]));
+
+ shell_cmd = malloc (len);
+ if (shell_cmd == NULL)
+ {
+ urj_error_set (URJ_ERROR_OUT_OF_MEMORY, "malloc(%zd) fails",
+ (size_t) len);
+ return URJ_STATUS_FAIL;
+ }
+
+ strcpy (shell_cmd, params[1]);
+ for (i = 2; i < n; i++)
+ {
+ strcat (shell_cmd, " ");
+ strcat (shell_cmd, params[i]);
+ }
+ urj_log (URJ_LOG_LEVEL_NORMAL, "Executing '%s'\n", shell_cmd);
+
+ system (shell_cmd);
+ free (shell_cmd);
+
+ return URJ_STATUS_OK;
+}
+
+static void
+cmd_shell_help (void)
+{
+ urj_log (URJ_LOG_LEVEL_NORMAL,
+ _("Usage: %s cmmd\n"
+ "Shell out to os for a command.\n"
+ "\n" "CMMD OS Shell Command\n"),
+ "shell cmmd");
+}
+
+const urj_cmd_t urj_cmd_shell = {
+ "shell",
+ N_("shell cmmd"),
+ cmd_shell_help,
+ cmd_shell_run
+};
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2003 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2003.
+ *
+ */
+
+#include <sysdep.h>
+
+#include <stdio.h>
+#include <string.h>
+
+#include <urjtag/error.h>
+#include <urjtag/chain.h>
+
+#include <urjtag/cmd.h>
+
+#include "cmd.h"
+
+static int
+cmd_shift_run (urj_chain_t *chain, char *params[])
+{
+ if (urj_cmd_params (params) != 2)
+ {
+ urj_error_set (URJ_ERROR_SYNTAX,
+ "%s: #parameters should be %d, not %d",
+ params[0], 2, urj_cmd_params (params));
+ return URJ_STATUS_FAIL;
+ }
+
+ if (urj_cmd_test_cable (chain) != URJ_STATUS_OK)
+ return URJ_STATUS_FAIL;
+
+ if (strcasecmp (params[1], "ir") == 0)
+ {
+ /* @@@@ RFHH check result */
+ urj_tap_chain_shift_instructions (chain);
+ return URJ_STATUS_OK;
+ }
+ if (strcasecmp (params[1], "dr") == 0)
+ {
+ /* @@@@ RFHH check result */
+ urj_tap_chain_shift_data_registers (chain, 1);
+ return URJ_STATUS_OK;
+ }
+
+ urj_error_set (URJ_ERROR_SYNTAX,
+ "%s parameter 2 must be 'ir' or 'dr', not '%s'",
+ params[0], params[1]);
+ return URJ_STATUS_FAIL;
+}
+
+static void
+cmd_shift_help (void)
+{
+ urj_log (URJ_LOG_LEVEL_NORMAL,
+ _("Usage: %s\n"
+ "Usage: %s\n"
+ "Shift instruction or data register through JTAG chain.\n"),
+ "shift ir", "shift dr");
+}
+
+const urj_cmd_t urj_cmd_shift = {
+ "shift",
+ N_("shift data/instruction registers through JTAG chain"),
+ cmd_shift_help,
+ cmd_shift_run
+};
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2003 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2003.
+ *
+ */
+
+#include <sysdep.h>
+
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+
+#include <urjtag/error.h>
+#include <urjtag/chain.h>
+#include <urjtag/part.h>
+#include <urjtag/bssignal.h>
+
+#include <urjtag/cmd.h>
+
+#include "cmd.h"
+
+static int
+cmd_signal_run (urj_chain_t *chain, char *params[])
+{
+ urj_part_t *part;
+ urj_part_signal_t *s;
+ int i;
+
+ if ((i = urj_cmd_params (params)) < 2)
+ {
+ urj_error_set (URJ_ERROR_SYNTAX,
+ "%s: #parameters should be >= %d, not %d",
+ params[0], 2, urj_cmd_params (params));
+ return URJ_STATUS_FAIL;
+ }
+
+ if (urj_cmd_test_cable (chain) != URJ_STATUS_OK)
+ return URJ_STATUS_FAIL;
+
+ part = urj_tap_chain_active_part (chain);
+ if (part == NULL)
+ return URJ_STATUS_FAIL;
+
+ if ((s = urj_part_find_signal (part, params[1])) != NULL)
+ {
+ if (i != 3)
+ {
+ urj_error_set (URJ_ERROR_ALREADY, _("Signal '%s' already defined"),
+ params[1]);
+ return URJ_STATUS_FAIL;
+ }
+
+ urj_log (URJ_LOG_LEVEL_NORMAL, "Defining pin for signal %s\n",
+ s->name);
+
+ return urj_part_signal_redefine_pin(chain, s, params[2]);
+ }
+
+ if (i == 3)
+ { /* Add pin number */
+ s = urj_part_signal_define_pin(chain, params[1], params[2]);
+ }
+ else
+ {
+ s = urj_part_signal_define(chain, params[1]);
+ }
+ if (s == NULL) {
+ return URJ_STATUS_FAIL;
+ }
+
+ return URJ_STATUS_OK;
+}
+
+static void
+cmd_signal_help (void)
+{
+ urj_log (URJ_LOG_LEVEL_NORMAL,
+ _("Usage: %s SIGNAL [PIN#]\n"
+ "Define new signal with name SIGNAL for a part.\n"
+ "\n"
+ "SIGNAL New signal name\n"
+ "PIN# List of pin # for a signal\n"),
+ "signal");
+}
+
+const urj_cmd_t urj_cmd_signal = {
+ "signal",
+ N_("define new signal for a part"),
+ cmd_signal_help,
+ cmd_signal_run
+};
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2004, Arnim Laeuger
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Arnim Laeuger <arniml@users.sourceforge.net>, 2004.
+ *
+ */
+
+
+#include <sysdep.h>
+
+#include <stdint.h>
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+#include <errno.h>
+
+#include <urjtag/error.h>
+#include <urjtag/log.h>
+
+#include <urjtag/svf.h>
+#include <urjtag/cmd.h>
+
+#include "cmd.h"
+
+static int
+cmd_svf_run (urj_chain_t *chain, char *params[])
+{
+ FILE *SVF_FILE;
+ int num_params, i;
+ int stop = 0;
+ int print_progress = 0;
+ uint32_t ref_freq = 0;
+ urj_log_level_t old_log_level = urj_log_state.level;
+ int result = URJ_STATUS_OK;
+
+ num_params = urj_cmd_params (params);
+ if (num_params < 2)
+ {
+ urj_error_set (URJ_ERROR_SYNTAX,
+ "%s: #parameters should be >= %d, not %d",
+ params[0], 2, urj_cmd_params (params));
+ return URJ_STATUS_FAIL;
+ }
+
+ for (i = 2; i < num_params; i++)
+ {
+ if (strcasecmp (params[i], "stop") == 0)
+ stop = 1;
+ else if (strcasecmp (params[i], "progress") == 0)
+ print_progress = 1;
+ else if (strncasecmp (params[i], "ref_freq=", 9) == 0)
+ ref_freq = strtol (params[i] + 9, NULL, 10);
+ else
+ {
+ urj_error_set (URJ_ERROR_SYNTAX, "%s: unknown command '%s'",
+ params[0], params[i]);
+ return URJ_STATUS_FAIL;
+ }
+ }
+
+ if (print_progress)
+ urj_log_state.level = URJ_LOG_LEVEL_DETAIL;
+
+ if ((SVF_FILE = fopen (params[1], "r")) != NULL)
+ {
+ result = urj_svf_run (chain, SVF_FILE, stop, ref_freq);
+
+ fclose (SVF_FILE);
+ }
+ else
+ {
+ urj_error_IO_set ("%s: cannot open file '%s'", params[0], params[1]);
+ result = URJ_STATUS_FAIL;
+ }
+
+ urj_log_state.level = old_log_level;
+
+ return result;
+}
+
+
+static void
+cmd_svf_help (void)
+{
+ urj_log (URJ_LOG_LEVEL_NORMAL,
+ _("Usage: %s FILE [stop] [progress] [ref_freq=<frequency>]\n"
+ "Execute svf commands from FILE.\n"
+ "stop : Command execution stops upon TDO mismatch.\n"
+ "progress : Continually displays progress status.\n"
+ "ref_freq : Use <frequency> as the reference for 'RUNTEST xxx SEC' commands\n"
+ "\n" "FILE file containing SVF commands\n"),
+ "svf");
+}
+
+const urj_cmd_t urj_cmd_svf = {
+ "svf",
+ N_("execute svf commands from file"),
+ cmd_svf_help,
+ cmd_svf_run
+};
--- /dev/null
+/*
+ * $Id: test.c,v 1.0 2005/10/10 00:00:0 DJF $
+ *
+ * Copyright (C) 2005 Protoparts
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by David Farrell, 2005
+ * based on templates by and portions Written by Marcel Telka <marcel@telka.sk>, 2003.i
+ *
+ */
+
+#include <sysdep.h>
+
+#include <stdio.h>
+#include <string.h>
+//#include <stdlib.h>
+
+#include <urjtag/error.h>
+#include <urjtag/chain.h>
+#include <urjtag/part.h>
+#include <urjtag/bssignal.h>
+
+#include <urjtag/cmd.h>
+
+#include "cmd.h"
+
+static int
+cmd_test_run (urj_chain_t *chain, char *params[])
+{
+ int data;
+ long unsigned i;
+ urj_part_signal_t *s;
+ urj_part_t *part;
+
+ if (urj_cmd_params (params) != 4)
+ {
+ urj_error_set (URJ_ERROR_SYNTAX,
+ "%s: #parameters should be %d, not %d",
+ params[0], 4, urj_cmd_params (params));
+ return URJ_STATUS_FAIL;
+ }
+
+ if (strcasecmp (params[1], "signal") != 0)
+ {
+ urj_error_set (URJ_ERROR_SYNTAX,
+ "%s: parameter[%d] should be '%s', not '%s'",
+ params[0], 1, "signal", params[1]);
+ return URJ_STATUS_FAIL;
+ }
+
+ if (urj_cmd_test_cable (chain) != URJ_STATUS_OK)
+ return URJ_STATUS_FAIL;
+
+ part = urj_tap_chain_active_part (chain);
+ if (part == NULL)
+ return URJ_STATUS_FAIL;
+
+ s = urj_part_find_signal (part, params[2]);
+ if (!s)
+ {
+ urj_error_set (URJ_ERROR_NOTFOUND, _("signal '%s' not found"),
+ params[2]);
+ return URJ_STATUS_FAIL;
+ }
+
+ /* values 0,1,X since X is not a number, the following failure exits clean
+ * and doesnt test anything, as it should.
+ */
+ if (urj_cmd_get_number (params[3], &i) != URJ_STATUS_OK)
+ return URJ_STATUS_OK;
+
+ data = urj_part_get_signal (part, s);
+ if (data == -1)
+ return URJ_STATUS_FAIL;
+
+ if (data != i)
+ {
+ urj_error_set (URJ_ERROR_ILLEGAL_STATE,
+ _("<FAIL>%s = %d"), params[2], data);
+ return URJ_STATUS_FAIL;
+ }
+
+ return URJ_STATUS_OK;
+}
+
+static void
+cmd_test_help (void)
+{
+ urj_log (URJ_LOG_LEVEL_NORMAL,
+ _("Usage: %s SIGNAL 0/1\n"
+ "Test signal state from output BSR (Boundary Scan Register).\n"
+ "\n"
+ "SIGNAL signal name (from JTAG declaration file)\n"),
+ "test signal");
+}
+
+const urj_cmd_t urj_cmd_test = {
+ "test",
+ N_("test external signal value"),
+ cmd_test_help,
+ cmd_test_run
+};
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2008 Stanislav Sinyagin
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Stanislav Sinyagin <ssinyagin@k-open.com>, 2008.
+ *
+ */
+
+#include <sysdep.h>
+
+#include <unistd.h>
+
+#include <stdio.h>
+#include <string.h>
+#include <sys/time.h>
+
+#include <urjtag/error.h>
+#include <urjtag/cmd.h>
+
+#include "cmd.h"
+
+static int
+cmd_usleep_run (urj_chain_t *chain, char *params[])
+{
+ long unsigned usecs;
+
+ if (urj_cmd_params (params) != 2)
+ {
+ urj_error_set (URJ_ERROR_SYNTAX,
+ "%s: #parameters should be %d, not %d",
+ params[0], 2, urj_cmd_params (params));
+ return URJ_STATUS_FAIL;
+ }
+
+ if (urj_cmd_get_number (params[1], &usecs) != URJ_STATUS_OK)
+ return URJ_STATUS_FAIL;
+
+ usleep (usecs);
+
+ return URJ_STATUS_OK;
+}
+
+static void
+cmd_usleep_help (void)
+{
+ urj_log (URJ_LOG_LEVEL_NORMAL,
+ _("Usage: %s USECS\n"
+ "Sleep some number of microseconds.\n"),
+ "usleep");
+}
+
+const urj_cmd_t urj_cmd_usleep = {
+ "usleep",
+ N_("Sleep some number of microseconds"),
+ cmd_usleep_help,
+ cmd_usleep_run
+};
--- /dev/null
+/*
+ * $Id$
+ *
+ * Written by Kent Palmkvist <kentp@isy.liu.se>, 2005
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ */
+
+#include <sysdep.h>
+
+#include <stdio.h>
+#include <stdint.h>
+#include <string.h>
+#include <errno.h>
+
+#include <urjtag/error.h>
+#include <urjtag/bus.h>
+
+#include <urjtag/cmd.h>
+
+#include "cmd.h"
+
+static int
+cmd_writemem_run (urj_chain_t *chain, char *params[])
+{
+ long unsigned adr;
+ long unsigned len;
+ FILE *f;
+ int r;
+
+ if (urj_cmd_params (params) != 4)
+ {
+ urj_error_set (URJ_ERROR_SYNTAX,
+ "%s: #parameters should be %d, not %d",
+ params[0], 4, urj_cmd_params (params));
+ return URJ_STATUS_FAIL;
+ }
+
+ if (!urj_bus)
+ {
+ urj_error_set (URJ_ERROR_ILLEGAL_STATE, _("Bus missing"));
+ return URJ_STATUS_FAIL;
+ }
+
+ if (urj_cmd_get_number (params[1], &adr) != URJ_STATUS_OK
+ || urj_cmd_get_number (params[2], &len) != URJ_STATUS_OK)
+ return URJ_STATUS_FAIL;
+
+ f = fopen (params[3], "r");
+ if (!f)
+ {
+ urj_error_IO_set (_("Unable to open file `%s'"), params[3]);
+ return URJ_STATUS_FAIL;
+ }
+ r = urj_bus_writemem (urj_bus, f, adr, len);
+ fclose (f);
+
+ return r;
+}
+
+static void
+cmd_writemem_help (void)
+{
+ urj_log (URJ_LOG_LEVEL_NORMAL,
+ _("Usage: %s ADDR LEN FILENAME\n"
+ "Write to device memory starting at ADDR the FILENAME file.\n"
+ "\n"
+ "ADDR start address of the written memory area\n"
+ "LEN written memory length\n"
+ "FILENAME name of the input file\n"
+ "\n"
+ "ADDR and LEN could be in decimal or hexadecimal (prefixed with 0x) form.\n"
+ "NOTE: This is NOT useful for FLASH programming!\n"),
+ "writemem");
+}
+
+const urj_cmd_t urj_cmd_writemem = {
+ "writemem",
+ N_("write content of file to the memory"),
+ cmd_writemem_help,
+ cmd_writemem_run
+};
--- /dev/null
+#
+# $Id: Makefile.am 506 2003-08-13 10:05:15Z telka $
+#
+# Copyright (C) 2002 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Marcel Telka <marcel@telka.sk>, 2002.
+#
+
+include $(top_srcdir)/Makefile.rules
+
+noinst_LTLIBRARIES = libflash.la
+
+libflash_la_SOURCES = \
+ amd.c \
+ amd_flash.c \
+ cfi.c \
+ detectflash.c \
+ flash.c \
+ intel.c \
+ jedec.c
+
+if JEDEC_EXP
+libflash_la_SOURCES += \
+ jedec_exp.c
+endif
+
+AM_CFLAGS = $(WARNINGCFLAGS)
--- /dev/null
+/*
+ * $Id$
+ *
+ * Flash driver for AMD Am29LV640D, Am29LV641D, Am29LV642D
+ * Copyright (C) 2003 AH
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by August Hörandl <august.hoerandl@gmx.at>
+ * Modified by Marcel Telka <marcel@telka.sk>, 2003.
+ *
+ * Documentation:
+ * [1] Advanced Micro Devices, "Am29LV640D/Am29LV641D",
+ * September 20, 2002 Rev B, 22366b8.pdf
+ * [2] Advanced Micro Devices, "Am29LV642D",
+ * August 14, 2001 Rev A, 25022.pdf
+ * [3] Spansion, "S29GL-N MirrorBit Flash Family"
+ * October 13, 2006 Rev B, Amendment 3
+ *
+ */
+
+#include <sysdep.h>
+
+#include <stdint.h>
+#include <stdlib.h>
+#include <string.h>
+#include <stdio.h>
+#include <unistd.h> /* usleep */
+
+#include <urjtag/log.h>
+#include <urjtag/error.h>
+#include <urjtag/flash.h>
+#include <urjtag/bus.h>
+
+#include "flash.h"
+#include "cfi.h"
+#include "amd.h"
+
+
+/* The code below assumes a connection of the flash chip address LSB (A0)
+ * to A0, A1 or A2 of the byte-addressed CPU bus dependent on the bus width.
+ *
+ * 8 Bit devices: A0..Ax connected to A0..Ax of CPU bus
+ * 8/16 Bit devices: A0..Ax connected to A1..Ax+1 of CPU bus
+ * 16 Bit devices: A0..Ax connected to A1..Ax+1 of CPU bus
+ * 16/32 Bit devices: A0..Ax connected to A2..Ax+2 of CPU bus
+ * 32 Bit devices: A0..Ax connected to A2..Ax+2 of CPU bus
+ *
+ * The offset computed by amd_flash_address_shift() is used here dependent on
+ * the bus width (8, 16 or 32 bit) to align the patterns emitted on the
+ * address lines at either A0, A1 or A2. */
+
+/* NOTE: It does not work for SoC chips or boards with extra address decoders
+ * that do address alignment themselves, such as the Samsung S3C4510B. The bus
+ * driver has to deal with this. - kawk 2008-01 */
+
+static int
+amd_flash_address_shift (urj_flash_cfi_array_t *cfi_array)
+{
+ if (cfi_array->bus_width == 4)
+ return 2;
+
+ /* else: cfi_array->bus_width is 2 (16 bit) or 1 (8 bit): */
+
+ switch (cfi_array->cfi_chips[0]->cfi.device_geometry.device_interface)
+ {
+ case CFI_INTERFACE_X8_X16: /* regardless whether 8 or 16 bit mode */
+ case CFI_INTERFACE_X16: /* native */
+ return 1;
+
+ case CFI_INTERFACE_X16_X32: /* e.g. 32 bit flash in 16 bit mode */
+ case CFI_INTERFACE_X32: /* unlikely */
+ return 2;
+
+ default:
+ break;
+ }
+
+ if (cfi_array->bus_width == 2)
+ return 1;
+
+ return 0;
+}
+
+/* autodetect, we can handle this chip */
+static int
+amd_flash_autodetect32 (urj_flash_cfi_array_t *cfi_array)
+{
+ if (cfi_array->bus_width != 4)
+ return 0;
+ return (cfi_array->cfi_chips[0]->cfi.identification_string.pri_id_code
+ == CFI_VENDOR_AMD_SCS);
+}
+
+static int
+amd_flash_autodetect16 (urj_flash_cfi_array_t *cfi_array)
+{
+ if (cfi_array->bus_width != 2)
+ return 0;
+ return (cfi_array->cfi_chips[0]->cfi.identification_string.pri_id_code
+ == CFI_VENDOR_AMD_SCS);
+}
+
+static int
+amd_flash_autodetect8 (urj_flash_cfi_array_t *cfi_array)
+{
+ if (cfi_array->bus_width != 1)
+ return 0;
+ return (cfi_array->cfi_chips[0]->cfi.identification_string.pri_id_code
+ == CFI_VENDOR_AMD_SCS);
+}
+
+/*
+ * check device status
+ * URJ_STATUS_OK PASS
+ * URJ_STATUS_FAIL FAIL
+ */
+/*
+ * first implementation: see [1], page 29
+ */
+#if 0
+static int
+amdstatus29 (urj_flash_cfi_array_t *cfi_array, uint32_t adr,
+ int data)
+{
+ urj_bus_t *bus = cfi_array->bus;
+ int o = amd_flash_address_shift (cfi_array);
+ int timeout;
+ uint32_t dq7mask = ((1 << 7) << 16) + (1 << 7);
+ uint32_t dq5mask = ((1 << 5) << 16) + (1 << 5);
+ uint32_t bit7 = (data & (1 << 7)) != 0;
+ uint32_t data1;
+
+ for (timeout = 0; timeout < 100; timeout++)
+ {
+ data1 = URJ_BUS_READ (bus, adr << o);
+ data1 = URJ_BUS_READ (bus, adr << o);
+ urj_log (URJ_LOG_LEVEL_DEBUG, "amdstatus %d: %04lX (%04lX) = %04lX\n",
+ timeout, (long unsigned) data1,
+ (long unsigned) (data1 & dq7mask), (long unsigned) bit7);
+ if (((data1 & dq7mask) == dq7mask) == bit7) /* FIXME: This looks non-portable */
+ return URJ_STATUS_OK;
+
+ if ((data1 & dq5mask) == dq5mask)
+ break;
+ usleep (100);
+ }
+
+ data1 = URJ_BUS_READ (bus, adr << o);
+ if (((data1 & dq7mask) == dq7mask) == bit7) /* FIXME: This looks non-portable */
+ return URJ_STATUS_OK;
+
+ urj_error_set (URJ_ERROR_FLASH, "hardware failure");
+ return URJ_STATUS_FAIL;
+}
+#endif /* 0 */
+
+
+#if 1
+/*
+ * second implementation: see [1], page 30
+ */
+static int
+amdstatus (urj_flash_cfi_array_t *cfi_array, uint32_t adr, int data)
+{
+ urj_bus_t *bus = cfi_array->bus;
+
+ int timeout;
+ uint32_t togglemask = ((1 << 6) << 16) + (1 << 6); /* DQ 6 */
+ /* int dq5mask = ((1 << 5) << 16) + (1 << 5); DQ5 */
+
+ for (timeout = 0; timeout < 7000; timeout++)
+ {
+ uint32_t data1 = URJ_BUS_READ (bus, adr);
+ uint32_t data2 = URJ_BUS_READ (bus, adr);
+
+ urj_log (URJ_LOG_LEVEL_DEBUG,
+ "amdstatus %d: %04lX/%04lX %04lX/%04lX \n",
+ timeout, (long unsigned) data1, (long unsigned) data2,
+ (long unsigned) (data1 & togglemask),
+ (long unsigned) (data2 & togglemask));
+ if ((data1 & togglemask) == (data2 & togglemask))
+ return URJ_STATUS_OK;
+
+ /* if ( (data1 & dq5mask) != 0 ) TODO */
+ /* return URJ_STATUS_OK; */
+ urj_log (URJ_LOG_LEVEL_DEBUG, "amdstatus %d: %04lX/%04lX\n",
+ timeout, (long unsigned)data1, (long unsigned)data2);
+ usleep (100);
+ }
+
+ urj_error_set (URJ_ERROR_FLASH, "hardware failure");
+ return URJ_STATUS_FAIL;
+}
+
+#else /* 1 */
+
+/* Note: This implementation of amdstatus() has been added by patch
+ [ 1429825 ] EJTAG driver (some remaining patch lines for flash/amd.c)
+ It's a quirk workaround and seems to break status polling for other chips.
+ Therefore it's deactivated at the moment but kept for reference. */
+/*
+ * second implementation: see [1], page 30
+ */
+static int
+amdstatus (urj_flash_cfi_array_t *cfi_array, uint32_t adr, int data)
+{
+ urj_bus_t *bus = cfi_array->bus;
+ int o = amd_flash_address_shift (cfi_array);
+ int timeout;
+ uint32_t togglemask = ((1 << 6) << 16) + (1 << 6); /* DQ 6 */
+ /* int dq5mask = ((1 << 5) << 16) + (1 << 5); DQ5 */
+ uint32_t data1, data2;
+
+ data1 = URJ_BUS_READ (bus, adr);
+ for (timeout = 0; timeout < 100; timeout++)
+ {
+ data2 = URJ_BUS_READ (bus, adr);
+
+
+ urj_log (URJ_LOG_LEVEL_DEBUG,
+ "amdstatus %d: %04lX/%04lX %04lX/%04lX \n",
+ timeout, (long unsigned) data1, (long unsigned) data2,
+ (long unsigned) (data1 & togglemask),
+ (long unsigned) (data2 & togglemask));
+ /* Work around an issue with RTL8181: toggle bits don't
+ toggle when reading the same flash address repeatedly
+ without any other memory access in between. Other
+ bits reflect the current status, and data after the
+ operation is complete - only Q6/Q2 bits don't toggle
+ when they should. Looks like the CPU not deasserting
+ CE or OE, so data is output to the bus continuously.
+ So, check for the correct data read twice instead. */
+ /*if ( (data1 & togglemask) == (data2 & togglemask)) */
+ if ((data1 == data) && (data2 == data))
+ return URJ_STATUS_OK;
+
+ /* if ( (data1 & dq5mask) != 0 ) TODO */
+ /* return URJ_STATUS_OK; */
+ if (urj_log_status.level <= URJ_LOG_LEVEL_DEBUG)
+ urj_log (URJ_LOG_LEVEL_DEBUG, "amdstatus %d: %04lX/%04lX\n",
+ timeout, (long unsigned) data1, (long unsigned) data2);
+ else
+ urj_log (URJ_LOG_LEVEL_NORMAL, ".");
+ usleep (100);
+ data1 = data2;
+ }
+
+ urj_error_set (URJ_ERROR_FLASH, "hardware failure");
+ return URJ_STATUS_FAIL;
+}
+
+#endif /* 0 */
+
+static void
+amd_flash_read_array (urj_flash_cfi_array_t *cfi_array)
+{
+ /* Read Array */
+ URJ_BUS_WRITE (cfi_array->bus, cfi_array->address, 0x00F000F0); /* AMD reset */
+}
+
+#if 0
+static int
+amdisprotected (parts * ps, urj_flash_cfi_array_t *cfi_array,
+ uint32_t adr)
+{
+ uint32_t data;
+ int o = amd_flash_address_shift (cfi_array);
+
+ URJ_BUS_WRITE (ps, cfi_array->address + (0x0555 << o), 0x00aa00aa); /* autoselect p29, sector erase */
+ URJ_BUS_WRITE (ps, cfi_array->address + (0x02aa << o),
+ 0x00550055);
+ URJ_BUS_WRITE (ps, cfi_array->address + (0x0555 << o),
+ 0x00900090);
+
+ data = URJ_BUS_READ (ps, adr + (0x0002 << 2));
+ /* Read Array */
+ amd_flash_read_array (ps); /* AMD reset */
+
+ return ((data & 0x00ff00ff) != 0);
+}
+#endif /* 0 */
+
+static void
+amd_flash_print_info (urj_log_level_t ll, urj_flash_cfi_array_t *cfi_array)
+{
+ int mid, cid, prot;
+ urj_bus_t *bus = cfi_array->bus;
+ int o = amd_flash_address_shift (cfi_array);
+
+ URJ_BUS_WRITE (bus, cfi_array->address + (0x0555 << o), 0x00aa00aa); /* autoselect p29 */
+ URJ_BUS_WRITE (bus, cfi_array->address + (0x02aa << o), 0x00550055);
+ URJ_BUS_WRITE (bus, cfi_array->address + (0x0555 << o), 0x00900090);
+ mid = URJ_BUS_READ (bus, cfi_array->address + (0x00 << o)) & 0xFFFF;
+ cid = URJ_BUS_READ (bus, cfi_array->address + (0x01 << o)) & 0xFFFF;
+ prot = URJ_BUS_READ (bus, cfi_array->address + (0x02 << o)) & 0xFF;
+ amd_flash_read_array (cfi_array); /* AMD reset */
+ urj_log (ll, _("Chip: AMD Flash\n\tManufacturer: "));
+ switch (mid & 0xff)
+ {
+ case 0x0001:
+ urj_log (ll, "AMD");
+ urj_log (ll, _("\n\tChip: "));
+ switch (cid)
+ {
+ case 0x0049:
+ urj_log (ll, "AM29LV160DB");
+ break;
+ case 0x0093:
+ urj_log (ll, "Am29LV065D");
+ break;
+ case 0x004F:
+ urj_log (ll, "Am29LV040B");
+ break;
+ case 0x22D7:
+ urj_log (ll, "Am29LV640D/Am29LV641D/Am29LV642D");
+ break;
+ case 0x225B:
+ urj_log (ll, "Am29LV800B");
+ break;
+ case 0x227E: /* 16-bit mode */
+ case 0x007E: /* 8-bit mode */
+ urj_log (ll, "S92GLxxxN");
+ break;
+ default:
+ urj_log (ll, _("Unknown (ID 0x%04x)"), cid);
+ break;
+ }
+ break;
+ case 0x001f:
+ urj_log (ll, "Atmel");
+ urj_log (ll, _("\n\tChip: "));
+ switch (cid)
+ {
+ case 0x01d2:
+ urj_log (ll, "AT49BW642DT");
+ break;
+ case 0x01d6:
+ urj_log (ll, "AT49BW642D");
+ break;
+ default:
+ urj_log (ll, _("Unknown (ID 0x%04x)"), cid);
+ break;
+ }
+ break;
+ case 0x0020:
+ urj_log (ll, "ST/Samsung");
+ urj_log (ll, _("\n\tChip: "));
+ switch (cid)
+ {
+ case 0x00ca:
+ urj_log (ll, "M29W320DT");
+ break;
+ case 0x00cb:
+ urj_log (ll, "M29W320DB");
+ break;
+ case 0x22ed:
+ urj_log (ll, "M29W640DT");
+ break;
+ default:
+ urj_log (ll, _("Unknown (ID 0x%04x)"), cid);
+ break;
+ }
+ break;
+ case 0x00C2:
+ urj_log (ll, "Macronix");
+ urj_log (ll, _("\n\tChip: "));
+ switch (cid)
+ {
+ case 0x2249:
+ urj_log (ll, "MX29LV160B");
+ break;
+ case 0x22CB:
+ urj_log (ll, "MX29LV640B");
+ break;
+ default:
+ urj_log (ll, _("Unknown (ID 0x%04x)"), cid);
+ break;
+ }
+ break;
+ case 0x00DA:
+ urj_log (ll, "Winbond");
+ urj_log (ll, _("\n\tChip: "));
+ switch (cid & 0xff)
+ {
+ case 0x007E:
+ urj_log (ll, "W19B320AT/B");
+ break;
+ default:
+ urj_log (ll, _("Unknown (ID 0x%04x)"), cid);
+ break;
+ }
+ break;
+ default:
+ urj_log (ll, _("Unknown manufacturer (ID 0x%04x) Chip (ID 0x%04x)"),
+ mid, cid);
+ break;
+ }
+ urj_log (ll, _("\n\tProtected: %04x\n"), prot);
+
+ /* Read Array */
+ URJ_BUS_WRITE (bus, cfi_array->address + (0x0000 << o), 0x00ff00ff);
+}
+
+static int
+amd_flash_erase_block (urj_flash_cfi_array_t *cfi_array, uint32_t adr)
+{
+ urj_bus_t *bus = cfi_array->bus;
+ int o = amd_flash_address_shift (cfi_array);
+
+ urj_log (URJ_LOG_LEVEL_NORMAL, "flash_erase_block 0x%08lX\n",
+ (long unsigned) adr);
+
+ /* urj_log (URJ_LOG_LEVEL_NORMAL, "protected: %d\n", amdisprotected(ps, cfi_array, adr)); */
+
+ URJ_BUS_WRITE (bus, cfi_array->address + (0x0555 << o), 0x00aa00aa); /* autoselect p29, sector erase */
+ URJ_BUS_WRITE (bus, cfi_array->address + (0x02aa << o), 0x00550055);
+ URJ_BUS_WRITE (bus, cfi_array->address + (0x0555 << o), 0x00800080);
+ URJ_BUS_WRITE (bus, cfi_array->address + (0x0555 << o), 0x00aa00aa);
+ URJ_BUS_WRITE (bus, cfi_array->address + (0x02aa << o), 0x00550055);
+ URJ_BUS_WRITE (bus, adr, 0x00300030);
+
+ if (amdstatus (cfi_array, adr, 0xffff) == URJ_STATUS_OK)
+ {
+ urj_log (URJ_LOG_LEVEL_NORMAL, "flash_erase_block 0x%08lX DONE\n",
+ (long unsigned) adr);
+ amd_flash_read_array (cfi_array); /* AMD reset */
+ return URJ_STATUS_OK;
+ }
+ urj_log (URJ_LOG_LEVEL_NORMAL, "flash_erase_block 0x%08lX FAILED\n",
+ (long unsigned) adr);
+ /* Read Array */
+ amd_flash_read_array (cfi_array); /* AMD reset */
+
+ urj_error_set (URJ_ERROR_FLASH_ERASE, "unknown erase error");
+ return URJ_STATUS_FAIL;
+}
+
+static int
+amd_flash_unlock_block (urj_flash_cfi_array_t *cfi_array, uint32_t adr)
+{
+ urj_log (URJ_LOG_LEVEL_NORMAL, "flash_unlock_block 0x%08lX IGNORE\n",
+ (long unsigned) adr);
+ return URJ_STATUS_OK;
+}
+
+static int
+amd_flash_program_single (urj_flash_cfi_array_t *cfi_array, uint32_t adr,
+ uint32_t data)
+{
+ int status;
+ urj_bus_t *bus = cfi_array->bus;
+ int o = amd_flash_address_shift (cfi_array);
+
+ urj_log (URJ_LOG_LEVEL_DEBUG, "\nflash_program 0x%08lX = 0x%08lX\n",
+ (long unsigned) adr, (long unsigned) data);
+
+ URJ_BUS_WRITE (bus, cfi_array->address + (0x0555 << o), 0x00aa00aa); /* autoselect p29, program */
+ URJ_BUS_WRITE (bus, cfi_array->address + (0x02aa << o), 0x00550055);
+ URJ_BUS_WRITE (bus, cfi_array->address + (0x0555 << o), 0x00A000A0);
+
+ URJ_BUS_WRITE (bus, adr, data);
+ status = amdstatus (cfi_array, adr, data);
+ /* amd_flash_read_array(ps); */
+
+ return status;
+}
+
+static int
+amd_program_buffer_status (urj_flash_cfi_array_t *cfi_array, uint32_t adr,
+ uint32_t data)
+{
+ /* NOTE: Status polling according to [3], Figure 1.
+ The current method for status polling is not compatible with 32 bit (2x16) configurations
+ since it only checks the DQ7 bit of the lower chip. */
+ urj_bus_t *bus = cfi_array->bus;
+ int timeout;
+ const uint32_t dq7mask = (1 << 7);
+ const uint32_t dq5mask = (1 << 5);
+ uint32_t bit7 = data & dq7mask;
+ uint32_t data1;
+
+ for (timeout = 0; timeout < 7000; timeout++)
+ {
+ data1 = URJ_BUS_READ (bus, adr);
+ urj_log (URJ_LOG_LEVEL_DEBUG,
+ "amd_program_buffer_status %d: %04lX (%04lX) = %04lX\n",
+ timeout, (long unsigned) data1,
+ (long unsigned) (data1 & dq7mask), (long unsigned) bit7);
+ if ((data1 & dq7mask) == bit7)
+ return URJ_STATUS_OK;
+
+ if ((data1 & dq5mask) == dq5mask)
+ break;
+ usleep (100);
+ }
+
+ data1 = URJ_BUS_READ (bus, adr);
+ if ((data1 & dq7mask) == bit7)
+ return URJ_STATUS_OK;
+
+ return URJ_STATUS_FAIL;
+}
+
+static int
+amd_flash_program_buffer (urj_flash_cfi_array_t *cfi_array, uint32_t adr,
+ uint32_t *buffer, int count)
+{
+ /* NOTE: Write buffer programming operation according to [3], Figure 1. */
+ int status;
+ urj_bus_t *bus = cfi_array->bus;
+ urj_flash_cfi_chip_t *cfi_chip = cfi_array->cfi_chips[0];
+ int o = amd_flash_address_shift (cfi_array);
+ int wb_bytes = cfi_chip->cfi.device_geometry.max_bytes_write;
+ int chip_width = cfi_chip->width;
+ int offset = 0;
+
+ urj_log (URJ_LOG_LEVEL_DEBUG,
+ "\nflash_program_buffer 0x%08lX, count 0x%08X\n",
+ (long unsigned) adr, count);
+
+ while (count > 0)
+ {
+ int wcount, idx;
+ uint32_t sa = adr;
+
+ /* determine length of next multi-byte write */
+ wcount = wb_bytes - (adr % wb_bytes);
+ wcount /= chip_width;
+ if (wcount > count)
+ wcount = count;
+
+ URJ_BUS_WRITE (bus, cfi_array->address + (0x0555 << o), 0x00aa00aa);
+ URJ_BUS_WRITE (bus, cfi_array->address + (0x02aa << o), 0x00550055);
+ URJ_BUS_WRITE (bus, adr, 0x00250025);
+ URJ_BUS_WRITE (bus, sa, wcount - 1);
+
+ /* write payload to write buffer */
+ for (idx = 0; idx < wcount; idx++)
+ {
+ URJ_BUS_WRITE (bus, adr, buffer[offset + idx]);
+ adr += cfi_array->bus_width;
+ }
+ offset += wcount;
+
+ /* program buffer to flash */
+ URJ_BUS_WRITE (bus, sa, 0x00290029);
+
+ status = amd_program_buffer_status (cfi_array,
+ adr - cfi_array->bus_width,
+ buffer[offset - 1]);
+ /* amd_flash_read_array(ps); */
+ if (status != URJ_STATUS_OK)
+ {
+ urj_error_set (URJ_ERROR_FLASH_PROGRAM, "status fails after write");
+ return URJ_STATUS_FAIL;
+ }
+
+ count -= wcount;
+ }
+
+ return URJ_STATUS_OK;
+}
+
+static int
+amd_flash_program (urj_flash_cfi_array_t *cfi_array, uint32_t adr,
+ uint32_t *buffer, int count)
+{
+ urj_flash_cfi_query_structure_t *cfi = &(cfi_array->cfi_chips[0]->cfi);
+ int max_bytes_write = cfi->device_geometry.max_bytes_write;
+
+#ifndef FLASH_MULTI_BYTE
+ max_bytes_write = 0;
+#endif
+
+ /* multi-byte writes supported? */
+ if (max_bytes_write > 1)
+ return amd_flash_program_buffer (cfi_array, adr, buffer, count);
+
+ else
+ {
+ /* unroll buffer to single writes */
+ int idx;
+
+ for (idx = 0; idx < count; idx++)
+ {
+ int status = amd_flash_program_single (cfi_array, adr, buffer[idx]);
+ if (status != URJ_STATUS_OK)
+ return status;
+ adr += cfi_array->bus_width;
+ }
+ }
+
+ return URJ_STATUS_OK;
+}
+
+static int
+amd_flash_program32 (urj_flash_cfi_array_t *cfi_array, uint32_t adr,
+ uint32_t *buffer, int count)
+{
+ /* Single byte programming is forced for 32 bit (2x16) flash configuration.
+ a) lack of testing capbilities for 2x16 multi-byte write operation
+ b) amd_flash_program_buffer() is not 2x16 compatible at the moment
+ due to insufficiency of amd_program_buffer_status()
+ Closing these issues will obsolete amd_flash_program32(). */
+ int idx;
+
+ /* unroll buffer to single writes */
+ for (idx = 0; idx < count; idx++)
+ {
+ int status = amd_flash_program_single (cfi_array, adr, buffer[idx]);
+ if (status != URJ_STATUS_OK)
+ return status;
+ adr += cfi_array->bus_width;
+ }
+
+ return URJ_STATUS_OK;
+}
+
+urj_flash_driver_t urj_flash_amd_32_flash_driver = {
+ 4, /* buswidth */
+ N_("AMD/Fujitsu Standard Command Set"),
+ N_("supported: AMD 29LV640D, 29LV641D, 29LV642D; 2x16 Bit"),
+ amd_flash_autodetect32,
+ amd_flash_print_info,
+ amd_flash_erase_block,
+ amd_flash_unlock_block,
+ amd_flash_program32,
+ amd_flash_read_array,
+};
+
+urj_flash_driver_t urj_flash_amd_16_flash_driver = {
+ 2, /* buswidth */
+ N_("AMD/Fujitsu Standard Command Set"),
+ N_("supported: AMD 29LV800B, S29GLxxxN; MX29LV640B, W19B320AT/B; 1x16 Bit"),
+ amd_flash_autodetect16,
+ amd_flash_print_info,
+ amd_flash_erase_block,
+ amd_flash_unlock_block,
+ amd_flash_program,
+ amd_flash_read_array,
+};
+
+urj_flash_driver_t urj_flash_amd_8_flash_driver = {
+ 1, /* buswidth */
+ N_("AMD/Fujitsu Standard Command Set"),
+ N_("supported: AMD 29LV160, AMD 29LV065D, AMD 29LV040B, S29GLxxxN, W19B320AT/B; 1x8 Bit"),
+ amd_flash_autodetect8,
+ amd_flash_print_info,
+ amd_flash_erase_block,
+ amd_flash_unlock_block,
+ amd_flash_program,
+ amd_flash_read_array,
+};
--- /dev/null
+/*
+ * $Id: flash.h 1554 2009-05-03 16:06:22Z rfhh $
+ *
+ * Copyright (C) 2003 ETC s.r.o.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the ETC s.r.o. nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2003.
+ *
+ */
+
+#ifndef URJ_SRC_AMD_H
+#define URJ_SRC_AMD_H
+
+#include <urjtag/types.h>
+#include <urjtag/flash.h>
+
+int urj_flash_amd_detect (urj_bus_t *bus, uint32_t adr,
+ urj_flash_cfi_array_t **urj_flash_cfi_array);
+
+extern urj_flash_driver_t urj_flash_amd_32_flash_driver;
+extern urj_flash_driver_t urj_flash_amd_16_flash_driver;
+extern urj_flash_driver_t urj_flash_amd_8_flash_driver;
+extern urj_flash_driver_t urj_flash_amd_29xx040_flash_driver; //20/09/2006
+
+#endif /* URJ_FLASH_H */
--- /dev/null
+/*
+ * $Id: amd_flash.c,v 1.0 20/09/2006 12:38:01 $
+ *
+ * AMD 8 bit flash driver for AM29F040B & AM29LV040B
+ * Copyright (C) 2006 Kila Medical Systems.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Ajith Kumar P.C <ajithpc@kila.com>
+ *
+ * Documentation:
+ * [1] Spansion, Am29F040B Data Sheet
+ * [2] Spansion, Am29LV040B Data Sheet
+*/
+
+#include <sysdep.h>
+
+#include <stdint.h>
+#include <stdlib.h>
+#include <string.h>
+#include <stdio.h>
+#include <unistd.h> /* usleep */
+
+#include <urjtag/log.h>
+#include <urjtag/error.h>
+#include <urjtag/flash.h>
+#include <urjtag/bus.h>
+
+#include "flash.h"
+#include "amd.h"
+#include "cfi.h"
+
+//write specific
+#define AMD_SECTOR_PROTECTED
+
+//Read Specific
+#define AMD_READ_IN_ERASE_SUSPENDED_SECTOR
+#define AMD_READ_IN_NON_ERASE_SUSPENDED_SECTOR
+#define AMD_NORMAL_READ
+#define AMD_UNKNOWN_READ
+
+//Mode
+#define AMD_ERASE_SUSPEND_MODE
+#define AMD_READING_MODE
+#define AMD_EMBEDDED_ERASE_ALGORITHM
+#define AMD_EMBEDDED_PROGRAM_ALGORITHM
+#define AMD_UNDEFINED_MODE
+
+#define FLASH_ERASE_ERROR (-5)
+#define ERASE_FLASH_SUCCESS 1
+
+#define AMD_29xx040B 1
+
+#define AMD_BYPASS_UNLOCK_ALGORITHM 1
+#define AMD_STANDARD_WRITE_ALGORITHM 0
+#define AMD_BYPASS_UNLOCK_MODE 1
+#define AMD_STANDARD_MODE 0
+
+static struct
+{
+ long unsigned flash;
+ unsigned short algorithm;
+ unsigned short unlock_bypass;
+}
+var_forced_detection;
+
+
+int
+urj_flash_amd_detect (urj_bus_t *bus, uint32_t adr,
+ urj_flash_cfi_array_t **cfi_array)
+{
+ int mid;
+ int did;
+ urj_bus_area_t area;
+ urj_flash_cfi_query_structure_t *cfi;
+
+ if (!cfi_array || !bus)
+ {
+ urj_error_set (URJ_ERROR_INVALID, "cfi_array or bus");
+ return URJ_STATUS_FAIL;
+ }
+
+ *cfi_array = calloc (1, sizeof (urj_flash_cfi_array_t));
+ if (!*cfi_array)
+ {
+ urj_error_set (URJ_ERROR_OUT_OF_MEMORY, "calloc(%zd,%zd) failed",
+ (size_t) 1, sizeof (urj_flash_cfi_array_t));
+ return URJ_STATUS_FAIL;
+ }
+
+ URJ_BUS_WRITE (bus, adr + 0x0, 0xf0);
+ URJ_BUS_WRITE (bus, adr + 0x555, 0xaa);
+ URJ_BUS_WRITE (bus, adr + 0x2AA, 0x55);
+ URJ_BUS_WRITE (bus, adr + 0x555, 0x90);
+ mid = URJ_BUS_READ (bus, adr + 0x0);
+ did = URJ_BUS_READ (bus, adr + 0x1);
+ URJ_BUS_WRITE (bus, adr + 0x0, 0xf0);
+
+ urj_log (URJ_LOG_LEVEL_NORMAL, "%s: mid %x, did %x\n", __func__, mid, did);
+ if (mid != 0x01)
+ {
+ urj_error_set (URJ_ERROR_FLASH, "mid != 0x01");
+ return URJ_STATUS_FAIL;
+ }
+
+ switch (did)
+ {
+ case 0xA4:
+ var_forced_detection.flash = AMD_29xx040B;
+ break;
+ case 0x4F:
+ var_forced_detection.flash = AMD_29xx040B;
+ var_forced_detection.algorithm = AMD_BYPASS_UNLOCK_ALGORITHM;
+ break;
+ default:
+ break;
+ }
+
+ (*cfi_array)->bus = bus;
+ (*cfi_array)->address = 0;
+ if (URJ_BUS_AREA (bus, adr + 0, &area) != URJ_STATUS_OK)
+ // retain error status
+ return URJ_STATUS_FAIL; /* bus width detection failed */
+ unsigned int bw = area.width;
+ int ba, i;
+ if (bw != 8 && bw != 16 && bw != 32)
+ {
+ urj_error_set (URJ_ERROR_INVALID, "bus width = %d", bw);
+ return URJ_STATUS_FAIL;
+ }
+
+ (*cfi_array)->bus_width = ba = bw / 8;
+ (*cfi_array)->cfi_chips = calloc (ba, sizeof (urj_flash_cfi_chip_t *));
+ if (!(*cfi_array)->cfi_chips)
+ {
+ urj_error_set (URJ_ERROR_OUT_OF_MEMORY, "calloc(%zd,%zd) fails",
+ (size_t) ba, sizeof (urj_flash_cfi_chip_t *));
+ return URJ_STATUS_FAIL;
+ }
+ for (i = 0; i < ba; i++)
+ {
+ (*cfi_array)->cfi_chips[i] = calloc (1, sizeof (urj_flash_cfi_chip_t));
+ if (!(*cfi_array)->cfi_chips[i])
+ {
+ urj_error_set (URJ_ERROR_OUT_OF_MEMORY, "calloc(%zd,%zd) fails",
+ (size_t) 1, sizeof (urj_flash_cfi_chip_t));
+ return URJ_STATUS_FAIL;
+ }
+ (*cfi_array)->cfi_chips[i]->width = 1; //ba;
+ cfi = &(*cfi_array)->cfi_chips[i]->cfi;
+
+ cfi->identification_string.pri_id_code = CFI_VENDOR_NULL;
+ cfi->identification_string.pri_vendor_tbl = NULL;
+ cfi->identification_string.alt_id_code = 0;
+ cfi->identification_string.alt_vendor_tbl = NULL;
+
+ cfi->device_geometry.device_size = 512 * 1024;
+ cfi->device_geometry.device_interface = 0; // x 8
+ cfi->device_geometry.max_bytes_write = 32; //not used
+ cfi->device_geometry.number_of_erase_regions = 1;
+ cfi->device_geometry.erase_block_regions =
+ malloc (cfi->device_geometry.number_of_erase_regions *
+ sizeof (urj_flash_cfi_erase_block_region_t));
+ if (!cfi->device_geometry.erase_block_regions)
+ {
+ urj_error_set (URJ_ERROR_OUT_OF_MEMORY, "malloc(%zd) fails",
+ sizeof (urj_flash_cfi_erase_block_region_t));
+ return URJ_STATUS_FAIL;
+ }
+
+ cfi->device_geometry.erase_block_regions[i].erase_block_size =
+ 64 * 1024;
+ cfi->device_geometry.erase_block_regions[i].number_of_erase_blocks =
+ 8;
+ //Add other details for info
+ }
+
+ return URJ_STATUS_OK;
+}
+
+
+static int
+amd_29xx040_autodetect (urj_flash_cfi_array_t *cfi_array)
+{
+ return (var_forced_detection.flash == AMD_29xx040B); //Non-CFI Am29xx040B flash
+}
+
+static int
+amd_29xx040_status (urj_bus_t *bus, uint32_t adr, unsigned short data)
+{
+ short timeout;
+ unsigned short dq7bit, dq7mask, dq5mask;
+ unsigned short data1;
+
+ dq7mask = (1 << 7);
+ dq5mask = (1 << 5);
+ dq7bit = data & dq7mask;
+
+ for (timeout = 0; timeout < 1000; timeout++) //typical sector erase time = 0.7 sec
+ {
+ data1 = (unsigned short) (URJ_BUS_READ (bus, adr) & 0xFF);
+ if ((data1 & dq7mask) == dq7bit)
+ return URJ_STATUS_OK; //Success
+
+ if ((data1 & dq5mask) == dq5mask)
+ {
+ data1 = (unsigned short) (URJ_BUS_READ (bus, adr) & 0xFF);
+ if ((data1 & dq7mask) == dq7bit)
+ return URJ_STATUS_OK; //Success
+ else
+ {
+ urj_error_set (URJ_ERROR_FLASH,
+ "status failure: needs a reset command to return back to read array data");
+ return URJ_STATUS_FAIL;
+ }
+ }
+ usleep (50);
+ }
+
+ urj_error_set (URJ_ERROR_FLASH, "hardware failure");
+ return URJ_STATUS_FAIL;
+}
+
+
+
+static void
+amd_29xx040_print_info (urj_log_level_t ll, urj_flash_cfi_array_t *cfi_array)
+{
+ int mid, did, prot;
+ urj_bus_t *bus = cfi_array->bus;
+
+ URJ_BUS_WRITE (bus, cfi_array->address + 0x0, 0xf0);
+ URJ_BUS_WRITE (bus, cfi_array->address + 0x555, 0xaa);
+ URJ_BUS_WRITE (bus, cfi_array->address + 0x2AA, 0x55);
+ URJ_BUS_WRITE (bus, cfi_array->address + 0x555, 0x90);
+ mid = URJ_BUS_READ (bus, cfi_array->address + 0x0);
+ did = URJ_BUS_READ (bus, cfi_array->address + 0x1);
+ prot = URJ_BUS_READ (bus, cfi_array->address + 0x2);
+ URJ_BUS_WRITE (bus, cfi_array->address + 0x0, 0xf0);
+
+ urj_log (ll, "%s: mid %x, did %x\n", __FUNCTION__, mid, did);
+// amd_29xx040_read_array( cfi_array ); /* AMD reset */
+
+ switch (mid)
+ {
+ case 0x01:
+ urj_log (ll, _("Chip: AMD Flash\n\tPartNumber: "));
+ break;
+ default:
+ urj_log (ll, _("Unknown manufacturer (ID 0x%04x)"), mid);
+ break;
+ }
+ urj_log (ll, _("\n\tChip: "));
+ switch (did)
+ {
+ case 0xA4:
+ urj_log (ll, "Am29C040B\t-\t");
+ urj_log (ll, _("5V Flash\n"));
+ break;
+ case 0x4F:
+ urj_log (ll, "Am29LV040B\t-\t");
+ urj_log (ll, _("3V Flash\n"));
+ break;
+ default:
+ urj_log (ll, _("Unknown (ID 0x%04x)"), did);
+ break;
+ }
+ urj_log (ll, _("\n\tProtected: %04x\n"), prot);
+}
+
+static void
+amd_29xx040_read_array (urj_flash_cfi_array_t *cfi_array)
+{
+ /* Read Array */
+ if (var_forced_detection.unlock_bypass == AMD_BYPASS_UNLOCK_MODE)
+ {
+ /* @@@@ RFHH: changed this without understanding */
+ URJ_BUS_WRITE (cfi_array->bus,
+ cfi_array->address + 0x555, 0x90);
+ URJ_BUS_WRITE (cfi_array->bus,
+ cfi_array->address + 0x2AA, 0x00);
+ usleep (100);
+ var_forced_detection.unlock_bypass = AMD_STANDARD_MODE;
+ }
+ URJ_BUS_WRITE (cfi_array->bus, cfi_array->address + 0x0, 0x0F0); /* AMD reset */
+}
+
+
+
+static int
+amd_29xx040_erase_block (urj_flash_cfi_array_t *cfi_array,
+ uint32_t adr)
+{
+ urj_bus_t *bus = cfi_array->bus;
+
+ urj_log (URJ_LOG_LEVEL_NORMAL, "flash_erase_block 0x%08lX\n",
+ (long unsigned) adr);
+
+ /* urj_log (URJ_LOG_LEVEL_NORMAL, "protected: %d\n", amdisprotected(ps, adr)); */
+
+ if (var_forced_detection.unlock_bypass == AMD_BYPASS_UNLOCK_MODE)
+ {
+ URJ_BUS_WRITE (bus, cfi_array->address + 0x555, 0x90);
+ URJ_BUS_WRITE (bus, cfi_array->address + 0x2AA, 0x00);
+ usleep (100);
+ var_forced_detection.unlock_bypass = AMD_STANDARD_MODE;
+ }
+
+ URJ_BUS_WRITE (bus, cfi_array->address + 0x0, 0xf0);
+ URJ_BUS_WRITE (bus, cfi_array->address + 0x555, 0xaa);
+ URJ_BUS_WRITE (bus, cfi_array->address + 0x2AA, 0x55);
+ URJ_BUS_WRITE (bus, cfi_array->address + 0x555, 0x80);
+ URJ_BUS_WRITE (bus, cfi_array->address + 0x555, 0xaa);
+ URJ_BUS_WRITE (bus, cfi_array->address + 0x2AA, 0x55);
+// URJ_BUS_WRITE( bus, cfi_array->address + 0x555, 0x10 ); //Chip Erase
+ URJ_BUS_WRITE (bus, adr, 0x30); //Sector erase
+
+
+ if (amd_29xx040_status (bus, adr, 0xff) == URJ_STATUS_OK)
+ {
+ urj_log (URJ_LOG_LEVEL_NORMAL, "flash_erase_block 0x%08lX DONE\n",
+ (long unsigned) adr);
+ amd_29xx040_read_array (cfi_array); /* AMD reset */
+ return URJ_STATUS_OK;
+ }
+ urj_log (URJ_LOG_LEVEL_NORMAL, "flash_erase_block 0x%08lX FAILED\n",
+ (long unsigned) adr);
+ /* Read Array */
+ amd_29xx040_read_array (cfi_array); /* AMD reset */
+
+ urj_error_set (URJ_ERROR_FLASH_ERASE, "erase block");
+ return URJ_STATUS_FAIL;
+}
+
+static int
+amd_29xx040_program_single (urj_flash_cfi_array_t *cfi_array,
+ uint32_t adr, uint32_t data)
+{
+ int status;
+ urj_bus_t *bus = cfi_array->bus;
+
+ urj_log (URJ_LOG_LEVEL_DETAIL, "\nflash_program 0x%08lX = 0x%08lX\n",
+ (long unsigned) adr, (long unsigned) data);
+
+ if (var_forced_detection.algorithm == AMD_BYPASS_UNLOCK_ALGORITHM)
+ {
+ if (var_forced_detection.unlock_bypass != AMD_BYPASS_UNLOCK_MODE)
+ {
+ URJ_BUS_WRITE (bus, cfi_array->address + 0x555, 0xaa);
+ URJ_BUS_WRITE (bus, cfi_array->address + 0x2AA, 0x55);
+ URJ_BUS_WRITE (bus, cfi_array->address + 0x555, 0x20);
+ usleep (1000);
+ var_forced_detection.unlock_bypass = AMD_BYPASS_UNLOCK_MODE;
+ }
+ }
+ else
+ {
+ URJ_BUS_WRITE (bus, cfi_array->address + 0x555, 0xaa);
+ URJ_BUS_WRITE (bus, cfi_array->address + 0x2AA, 0x55);
+ }
+
+ URJ_BUS_WRITE (bus, cfi_array->address + 0x555, 0xA0);
+ URJ_BUS_WRITE (bus, adr, data);
+ status = amd_29xx040_status (bus, adr, data);
+ /* amd_29xx040_read_array(cfi_array); */
+
+ return status;
+}
+
+static int
+amd_29xx040_program (urj_flash_cfi_array_t *cfi_array,
+ uint32_t adr, uint32_t *buffer, int count)
+{
+ int idx;
+
+ /* unroll buffer to single writes */
+ for (idx = 0; idx < count; idx++)
+ {
+ int status = amd_29xx040_program_single (cfi_array, adr,
+ buffer[idx]);
+ if (status != URJ_STATUS_OK)
+ return status;
+ adr += cfi_array->bus_width;
+ }
+
+ return URJ_STATUS_OK;
+}
+
+static int
+amd_29xx040_unlock_block (urj_flash_cfi_array_t *cfi_array,
+ uint32_t adr)
+{
+ urj_log (URJ_LOG_LEVEL_NORMAL, "flash_unlock_block 0x%08lX IGNORE\n",
+ (long unsigned) adr);
+ return URJ_STATUS_OK;
+}
+
+
+urj_flash_driver_t urj_flash_amd_29xx040_flash_driver = {
+ 1, /* buswidth */
+ N_("AMD Standard Command Set"),
+ N_("supported: AMD 29LV040B, 29C040B, 1x8 Bit"),
+ amd_29xx040_autodetect,
+ amd_29xx040_print_info,
+ amd_29xx040_erase_block,
+ amd_29xx040_unlock_block,
+ amd_29xx040_program,
+ amd_29xx040_read_array,
+};
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2002, 2003 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2002, 2003.
+ *
+ * Documentation:
+ * [1] JEDEC Solid State Technology Association, "Common Flash Interface (CFI)",
+ * September 1999, Order Number: JESD68
+ * [2] Intel Corporation, "Common Flash Interface (CFI) and Command Sets
+ * Application Note 646", April 2000, Order Number: 292204-004
+ *
+ */
+
+#include <sysdep.h>
+
+#include <stdint.h>
+#include <stdlib.h>
+
+#include <urjtag/log.h>
+#include <urjtag/error.h>
+#include <urjtag/flash.h>
+#include <urjtag/bus.h>
+
+#include "flash.h"
+
+#include "cfi.h"
+
+void
+urj_flash_cfi_array_free (urj_flash_cfi_array_t *cfi_array)
+{
+ if (!cfi_array)
+ return;
+
+ if (cfi_array->cfi_chips)
+ {
+ int i;
+
+ for (i = 0; i < cfi_array->bus_width; i++)
+ {
+ if (!cfi_array->cfi_chips[i])
+ continue;
+
+ free (cfi_array->cfi_chips[i]->cfi.device_geometry.
+ erase_block_regions);
+ if (cfi_array->cfi_chips[i]->cfi.identification_string.
+ pri_vendor_tbl)
+ free (cfi_array->cfi_chips[i]->cfi.
+ identification_string.pri_vendor_tbl);
+ free (cfi_array->cfi_chips[i]);
+ }
+ free (cfi_array->cfi_chips);
+ }
+
+ free (cfi_array);
+}
+
+int
+urj_flash_cfi_detect (urj_bus_t *bus, uint32_t adr,
+ urj_flash_cfi_array_t **cfi_array)
+{
+ unsigned int bw; /* bus width */
+ unsigned int d; /* data offset */
+ size_t ba; /* bus width address multiplier */
+ int ma; /* flash mode address multiplier */
+ urj_bus_area_t area;
+
+ if (!cfi_array || !bus)
+ {
+ urj_error_set (URJ_ERROR_INVALID, "cfi_array or bus");
+ return URJ_STATUS_FAIL;
+ }
+
+ *cfi_array = calloc (1, sizeof (urj_flash_cfi_array_t));
+ if (!*cfi_array)
+ {
+ urj_error_set (URJ_ERROR_OUT_OF_MEMORY, "calloc(%zd,%zd) fails",
+ (size_t) 1, sizeof (urj_flash_cfi_array_t));
+ return URJ_STATUS_FAIL;
+ }
+
+ (*cfi_array)->bus = bus;
+ (*cfi_array)->address = adr;
+ if (URJ_BUS_AREA (bus, adr, &area) != URJ_STATUS_OK)
+ // retain error state
+ return URJ_STATUS_FAIL;
+ bw = area.width;
+ if (bw != 8 && bw != 16 && bw != 32)
+ {
+ urj_error_set (URJ_ERROR_INVALID, "bus width = %d", bw);
+ return URJ_STATUS_FAIL;
+ }
+ (*cfi_array)->bus_width = ba = bw / 8;
+ (*cfi_array)->cfi_chips = calloc (ba, sizeof (urj_flash_cfi_chip_t *));
+ if (!(*cfi_array)->cfi_chips)
+ {
+ urj_error_set (URJ_ERROR_OUT_OF_MEMORY, "calloc(%zd,%zd) fails",
+ ba, sizeof (urj_flash_cfi_chip_t *));
+ return URJ_STATUS_FAIL;
+ }
+
+ for (d = 0; d < bw; d += 8)
+ {
+#define A(off) (adr + (off) * ba * ma)
+#define D(data) ((data) << d)
+#define gD(data) (((data) >> d) & 0xFF)
+#define read1(off) gD(URJ_BUS_READ( bus, A(off) ))
+ // @@@@ RFHH check status of URJ_BUS_READ_START
+#define read2(off) (URJ_BUS_READ_START (bus, A(off)), gD (URJ_BUS_READ_NEXT (bus, A((off) + 1))) | gD (URJ_BUS_READ_END (bus)) << 8)
+#define write1(off,data) URJ_BUS_WRITE( bus, A(off), D(data) )
+
+ urj_flash_cfi_query_structure_t *cfi;
+ uint32_t tmp;
+ int ret = -4; /* CFI not detected (Q) */
+ uint16_t pri_vendor_tbl_adr;
+
+ /* detect CFI capable devices - see Table 1 in [1] */
+ for (ma = 1; ma <= 4; ma *= 2)
+ {
+ write1 (CFI_CMD_QUERY_OFFSET, CFI_CMD_QUERY);
+
+ if (read1 (CFI_QUERY_ID_OFFSET) == 'Q')
+ {
+ ret = -5; /* CFI not detected (R) */
+ if (read1 (CFI_QUERY_ID_OFFSET + 1) == 'R')
+ break;
+ }
+
+ write1 (0, CFI_CMD_READ_ARRAY1);
+ }
+
+ if (ma > 4)
+ {
+ if (ret == -4)
+ urj_error_set (URJ_ERROR_FLASH, "CFI not detected (Q)");
+ else
+ urj_error_set (URJ_ERROR_FLASH, "CFI not detected (R)");
+ return URJ_STATUS_FAIL;
+ }
+
+ if (read1 (CFI_QUERY_ID_OFFSET + 2) != 'Y')
+ {
+ write1 (0, CFI_CMD_READ_ARRAY1);
+ urj_error_set (URJ_ERROR_FLASH, "CFI not detected (Y)");
+ return URJ_STATUS_FAIL;
+ }
+
+ (*cfi_array)->cfi_chips[d / 8] = calloc (1,
+ sizeof (urj_flash_cfi_chip_t));
+ if (!(*cfi_array)->cfi_chips[d / 8])
+ {
+ write1 (0, CFI_CMD_READ_ARRAY1);
+ urj_error_set (URJ_ERROR_OUT_OF_MEMORY, "calloc(%zd,%zd) fails",
+ (size_t) 1, sizeof (urj_flash_cfi_chip_t));
+ return URJ_STATUS_FAIL;
+ }
+ cfi = &(*cfi_array)->cfi_chips[d / 8]->cfi;
+
+ /* Identification string - see Table 6 in [1] */
+ cfi->identification_string.pri_id_code = read2 (PRI_VENDOR_ID_OFFSET);
+ cfi->identification_string.pri_vendor_tbl = NULL;
+ cfi->identification_string.alt_id_code = read2 (ALT_VENDOR_ID_OFFSET);
+ cfi->identification_string.alt_vendor_tbl = NULL;
+
+ /* System interface information - see Table 7 in [1] */
+ tmp = read1 (VCC_MIN_WEV_OFFSET);
+ cfi->system_interface_info.vcc_min_wev =
+ ((tmp >> 4) & 0xF) * 1000 + (tmp & 0xF) * 100;
+ tmp = read1 (VCC_MAX_WEV_OFFSET);
+ cfi->system_interface_info.vcc_max_wev =
+ ((tmp >> 4) & 0xF) * 1000 + (tmp & 0xF) * 100;
+ tmp = read1 (VPP_MIN_WEV_OFFSET);
+ cfi->system_interface_info.vpp_min_wev =
+ ((tmp >> 4) & 0xF) * 1000 + (tmp & 0xF) * 100;
+ tmp = read1 (VPP_MAX_WEV_OFFSET);
+ cfi->system_interface_info.vpp_max_wev =
+ ((tmp >> 4) & 0xF) * 1000 + (tmp & 0xF) * 100;
+
+ /* TODO: Add out of range checks for timeouts */
+ tmp = read1 (TYP_SINGLE_WRITE_TIMEOUT_OFFSET);
+ cfi->system_interface_info.typ_single_write_timeout =
+ tmp ? (1 << tmp) : 0;
+
+ tmp = read1 (TYP_BUFFER_WRITE_TIMEOUT_OFFSET);
+ cfi->system_interface_info.typ_buffer_write_timeout =
+ tmp ? (1 << tmp) : 0;
+
+ tmp = read1 (TYP_BLOCK_ERASE_TIMEOUT_OFFSET);
+ cfi->system_interface_info.typ_block_erase_timeout =
+ tmp ? (1 << tmp) : 0;
+
+ tmp = read1 (TYP_CHIP_ERASE_TIMEOUT_OFFSET);
+ cfi->system_interface_info.typ_chip_erase_timeout =
+ tmp ? (1 << tmp) : 0;
+
+ tmp = read1 (MAX_SINGLE_WRITE_TIMEOUT_OFFSET);
+ cfi->system_interface_info.max_single_write_timeout =
+ (tmp ? (1 << tmp) : 0) *
+ cfi->system_interface_info.typ_single_write_timeout;
+
+ tmp = read1 (MAX_BUFFER_WRITE_TIMEOUT_OFFSET);
+ cfi->system_interface_info.max_buffer_write_timeout =
+ (tmp ? (1 << tmp) : 0) *
+ cfi->system_interface_info.typ_buffer_write_timeout;
+
+ tmp = read1 (MAX_BLOCK_ERASE_TIMEOUT_OFFSET);
+ cfi->system_interface_info.max_block_erase_timeout =
+ (tmp ? (1 << tmp) : 0) *
+ cfi->system_interface_info.typ_block_erase_timeout;
+
+ tmp = read1 (MAX_CHIP_ERASE_TIMEOUT_OFFSET);
+ cfi->system_interface_info.max_chip_erase_timeout =
+ (tmp ? (1 << tmp) : 0) *
+ cfi->system_interface_info.typ_chip_erase_timeout;
+
+ /* Device geometry - see Table 8 in [1] */
+ /* TODO: Add out of range check */
+ cfi->device_geometry.device_size = 1 << read1 (DEVICE_SIZE_OFFSET);
+
+ cfi->device_geometry.device_interface =
+ read2 (FLASH_DEVICE_INTERFACE_OFFSET);
+
+ /* TODO: Add out of range check */
+ cfi->device_geometry.max_bytes_write =
+ 1 << read2 (MAX_BYTES_WRITE_OFFSET);
+
+ tmp = cfi->device_geometry.number_of_erase_regions =
+ read1 (NUMBER_OF_ERASE_REGIONS_OFFSET);
+
+ cfi->device_geometry.erase_block_regions =
+ malloc (tmp * sizeof (urj_flash_cfi_erase_block_region_t));
+ if (!cfi->device_geometry.erase_block_regions)
+ {
+ write1 (0, CFI_CMD_READ_ARRAY1);
+ urj_error_set (URJ_ERROR_OUT_OF_MEMORY, "malloc(%zd) fails",
+ (size_t) tmp
+ * sizeof (urj_flash_cfi_erase_block_region_t));
+ return URJ_STATUS_FAIL;
+ }
+
+ {
+ int a;
+ int i;
+
+ for (i = 0, a = ERASE_BLOCK_REGION_OFFSET; i < tmp; i++, a += 4)
+ {
+ uint32_t y = read2 (a);
+ uint32_t z = read2 (a + 2) << 8;
+ if (z == 0)
+ z = 128;
+ cfi->device_geometry.erase_block_regions[i].erase_block_size =
+ z;
+ cfi->device_geometry.erase_block_regions[i].
+ number_of_erase_blocks = y + 1;
+ }
+ }
+
+ pri_vendor_tbl_adr = read2 (PRI_VENDOR_TABLE_ADR_OFFSET);
+
+ /* AMD CFI Primary Vendor-Specific Extended Query Table - see [3] and [4] */
+ if (cfi->identification_string.pri_id_code == CFI_VENDOR_AMD_SCS
+ && pri_vendor_tbl_adr != 0)
+ {
+ urj_flash_cfi_amd_pri_extened_query_structure_t *pri_vendor_tbl;
+ uint8_t major_version;
+ uint8_t minor_version;
+ uint8_t num_of_banks;
+ int i;
+#undef A
+#define A(off) (adr + (pri_vendor_tbl_adr + (off)) * ba * ma)
+
+ if (read1 (0) != 'P' || read1 (1) != 'R' || read1 (2) != 'I')
+ {
+ write1 (0, CFI_CMD_READ_ARRAY1);
+ urj_error_set (URJ_ERROR_FLASH,
+ "CFI primary vendor table not detected");
+ return URJ_STATUS_FAIL;
+ }
+
+ major_version = read1 (MAJOR_VERSION_OFFSET);
+ minor_version = read1 (MINOR_VERSION_OFFSET);
+ if (major_version > '1'
+ || (major_version == '1' && minor_version >= '3'))
+ num_of_banks = read1 (BANK_ORGANIZATION_OFFSET);
+ else
+ num_of_banks = 0;
+ pri_vendor_tbl = calloc (1,
+ sizeof (urj_flash_cfi_amd_pri_extened_query_structure_t)
+ + num_of_banks * sizeof (uint8_t));
+ if (!pri_vendor_tbl)
+ {
+ write1 (0, CFI_CMD_READ_ARRAY1);
+ urj_error_set (URJ_ERROR_OUT_OF_MEMORY, "calloc(%zd,%zd) fails",
+ (size_t) 1,
+ sizeof (urj_flash_cfi_amd_pri_extened_query_structure_t)
+ + num_of_banks * sizeof (uint8_t));
+ return URJ_STATUS_FAIL;
+ }
+
+ if (major_version > '1'
+ || (major_version == '1' && minor_version >= '0'))
+ {
+ pri_vendor_tbl->major_version = major_version;
+ pri_vendor_tbl->minor_version = minor_version;
+ pri_vendor_tbl->address_sensitive_unlock =
+ read1 (ADDRESS_SENSITIVE_UNLOCK_OFFSET);
+ pri_vendor_tbl->erase_suspend = read1 (ERASE_SUSPEND_OFFSET);
+ pri_vendor_tbl->sector_protect = read1 (SECTOR_PROTECT_OFFSET);
+ pri_vendor_tbl->sector_temporary_unprotect =
+ read1 (SECTOR_TEMPORARY_UNPROTECT_OFFSET);
+ pri_vendor_tbl->sector_protect_scheme =
+ read1 (SECTOR_PROTECT_SCHEME_OFFSET);
+ pri_vendor_tbl->simultaneous_operation =
+ read1 (SIMULTANEOUS_OPERATION_OFFSET);
+ pri_vendor_tbl->burst_mode_type =
+ read1 (BURST_MODE_TYPE_OFFSET);
+ pri_vendor_tbl->page_mode_type =
+ read1 (PAGE_MODE_TYPE_OFFSET);
+ }
+ if (major_version > '1'
+ || (major_version == '1' && minor_version >= '1'))
+ {
+ tmp = read1 (ACC_MIN_OFFSET);
+ pri_vendor_tbl->acc_min =
+ ((tmp >> 4) & 0xF) * 1000 + (tmp & 0xF) * 100;
+ tmp = read1 (ACC_MAX_OFFSET);
+ pri_vendor_tbl->acc_max =
+ ((tmp >> 4) & 0xF) * 1000 + (tmp & 0xF) * 100;
+ pri_vendor_tbl->top_bottom_sector_flag =
+ read1 (TOP_BOTTOM_SECTOR_FLAG_OFFSET);
+ }
+ if (major_version > '1'
+ || (major_version == '1' && minor_version >= '2'))
+ pri_vendor_tbl->program_suspend =
+ read1 (PROGRAM_SUSPEND_OFFSET);
+ if (major_version > '1'
+ || (major_version == '1' && minor_version >= '3'))
+ {
+ if (pri_vendor_tbl->simultaneous_operation)
+ pri_vendor_tbl->bank_organization =
+ read1 (BANK_ORGANIZATION_OFFSET);
+ else
+ pri_vendor_tbl->bank_organization = 0;
+ for (i = 0; i < pri_vendor_tbl->bank_organization; i++)
+ pri_vendor_tbl->bank_region_info[i] =
+ read1 (BANK_REGION_INFO_OFFSET +
+ i * sizeof (uint8_t));
+ }
+ if (major_version > '1'
+ || (major_version == '1' && minor_version >= '4'))
+ {
+ pri_vendor_tbl->unlock_bypass = read1 (UNLOCK_BYPASS_OFFSET);
+ tmp = read1 (SECSI_SECTOR_SIZE_OFFSET);
+ pri_vendor_tbl->secsi_sector_size = tmp ? (1 << tmp) : 0;
+ tmp = read1 (EMBEDDED_HWRST_TIMEOUT_MAX_OFFSET);
+ pri_vendor_tbl->embedded_hwrst_timeout_max =
+ tmp ? (1 << tmp) : 0;
+ tmp = read1 (NON_EMBEDDED_HWRST_TIMEOUT_MAX_OFFSET);
+ pri_vendor_tbl->non_embedded_hwrst_timeout_max =
+ tmp ? (1 << tmp) : 0;
+ tmp = read1 (ERASE_SUSPEND_TIMEOUT_MAX_OFFSET);
+ pri_vendor_tbl->erase_suspend_timeout_max =
+ tmp ? (1 << tmp) : 0;
+ tmp = read1 (PROGRAM_SUSPEND_TIMEOUT_MAX_OFFSET);
+ pri_vendor_tbl->program_suspend_timeout_max =
+ tmp ? (1 << tmp) : 0;
+ }
+
+ cfi->identification_string.pri_vendor_tbl = (void *) pri_vendor_tbl;
+
+#undef A
+#define A(off) (adr + (off) * ba * ma)
+
+ /* Reverse the order of erase block region information for top boot devices. */
+ if ((major_version > '1'
+ || (major_version == '1' && minor_version >= '1'))
+ && pri_vendor_tbl->top_bottom_sector_flag == 0x3)
+ {
+ uint32_t y, z;
+ uint32_t n = cfi->device_geometry.number_of_erase_regions;
+
+ for (i = 0; i < n / 2; i++)
+ {
+ z = cfi->device_geometry.erase_block_regions[i].
+ erase_block_size;
+ y = cfi->device_geometry.erase_block_regions[i].
+ number_of_erase_blocks;
+ cfi->device_geometry.erase_block_regions[i].
+ erase_block_size =
+ cfi->device_geometry.erase_block_regions[n - i - 1].
+ erase_block_size;
+ cfi->device_geometry.erase_block_regions[i].
+ number_of_erase_blocks =
+ cfi->device_geometry.erase_block_regions[n - i - 1].
+ number_of_erase_blocks;
+ cfi->device_geometry.erase_block_regions[n - i - 1].
+ erase_block_size = z;
+ cfi->device_geometry.erase_block_regions[n - i - 1].
+ number_of_erase_blocks = y;
+ }
+ }
+ }
+
+ /* TODO: Intel Primary Algorithm Extended Query Table - see Table 5. in [2] */
+
+ /* Read Array */
+ write1 (0, CFI_CMD_READ_ARRAY1);
+
+#undef A
+#undef D
+#undef gD
+#undef read1
+#undef read2
+#undef write1
+
+ switch (cfi->device_geometry.device_interface)
+ {
+ case CFI_INTERFACE_X8:
+ if (ma != 1)
+ {
+ urj_error_set (URJ_ERROR_FLASH_DETECT, "device detection");
+ return URJ_STATUS_FAIL;
+ }
+ (*cfi_array)->cfi_chips[d / 8]->width = 1;
+ break;
+ case CFI_INTERFACE_X16:
+ if (ma != 1)
+ {
+ urj_error_set (URJ_ERROR_FLASH_DETECT, "device detection");
+ return URJ_STATUS_FAIL;
+ }
+ (*cfi_array)->cfi_chips[d / 8]->width = 2;
+ d += 8;
+ break;
+ case CFI_INTERFACE_X8_X16:
+ if (ma != 1 && ma != 2)
+ {
+ urj_error_set (URJ_ERROR_FLASH_DETECT, "device detection");
+ return URJ_STATUS_FAIL;
+ }
+ (*cfi_array)->cfi_chips[d / 8]->width = 2 / ma;
+ if (ma == 1)
+ d += 8;
+ break;
+ case CFI_INTERFACE_X32:
+ if (ma != 1)
+ {
+ urj_error_set (URJ_ERROR_FLASH_DETECT, "device detection");
+ return URJ_STATUS_FAIL;
+ }
+ (*cfi_array)->cfi_chips[d / 8]->width = 4;
+ d += 24;
+ break;
+ case CFI_INTERFACE_X16_X32:
+ if (ma != 1 && ma != 2)
+ {
+ urj_error_set (URJ_ERROR_FLASH_DETECT, "device detection");
+ return URJ_STATUS_FAIL;
+ }
+ (*cfi_array)->cfi_chips[d / 8]->width = 4 / ma;
+ if (ma == 1)
+ d += 24;
+ else
+ d += 8;
+ break;
+ default:
+ urj_error_set (URJ_ERROR_FLASH_DETECT, "device detection");
+ return URJ_STATUS_FAIL;
+ }
+ }
+
+ return URJ_STATUS_OK;
+}
--- /dev/null
+/*
+ * $Id$
+ *
+ * Common Flash Memory Interface (CFI) Declarations
+ * Copyright (C) 2002 ETC s.r.o.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the ETC s.r.o. nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2002.
+ *
+ * Documentation:
+ * [1] JEDEC Solid State Technology Association, "Common Flash Interface (CFI)",
+ * September 1999, Order Number: JESD68
+ * [2] JEDEC Solid State Technology Association, "Common Flash Interface (CFI) ID Codes",
+ * September 2001, Order Number: JEP137-A
+ * [3] AMD, "Common Flash Memory Interface Specification", Release 2.0
+ * December 1, 2001.
+ * [4] SPANSION, "Common Flash Interface Version 1.4 Vendor Specific
+ * Extensions", March 22, 2004.
+ *
+ */
+
+#ifndef FLASH_CFI_H
+#define FLASH_CFI_H
+
+#ifndef __ASSEMBLY__
+#include <stdint.h>
+
+#include <urjtag/types.h>
+#include <urjtag/flash.h>
+#endif
+
+/* CFI commands - see Table 1 in [1] */
+
+#define CFI_CMD_READ_ARRAY1 0xFF
+#define CFI_CMD_READ_ARRAY2 0xF0
+#define CFI_CMD_QUERY 0x98
+#define CFI_CMD_QUERY_OFFSET 0x55
+
+/* Query identification string - see 4.3.2 in [1] */
+
+#define CFI_QUERY_ID_OFFSET 0x10
+#define PRI_VENDOR_ID_OFFSET 0x13
+#define PRI_VENDOR_TABLE_ADR_OFFSET 0x15
+#define ALT_VENDOR_ID_OFFSET 0x17
+#define ALT_VENDOR_TABLE_ADR_OFFSET 0x19
+
+#ifndef __ASSEMBLY__
+typedef struct cfi_query_identification_string
+{
+ uint16_t pri_id_code;
+ void *pri_vendor_tbl;
+ uint16_t alt_id_code;
+ void *alt_vendor_tbl;
+} urj_flash_cfi_query_identification_string_t;
+#endif /* __ASSEMBLY__ */
+
+/* Algorithm command set & control interface ID codes - see Table 1 in [2] */
+
+#define CFI_VENDOR_NULL 0x0000
+#define CFI_VENDOR_INTEL_ECS 0x0001
+#define CFI_VENDOR_AMD_SCS 0x0002
+#define CFI_VENDOR_INTEL_SCS 0x0003
+#define CFI_VENDOR_AMD_ECS 0x0004
+#define CFI_VENDOR_MITSUBISHI_SCS 0x0100
+#define CFI_VENDOR_MITSUBISHI_ECS 0x0101
+#define CFI_VENDOR_SST_PWCS 0x0102
+
+/* Query system interface information - see 4.3.3 in [1] */
+
+#define VCC_MIN_WEV_OFFSET 0x1B /* Vcc Logic Supply Minimum Write/Erase voltage */
+#define VCC_MAX_WEV_OFFSET 0x1C /* Vcc Logic Supply Maximum Write/Erase voltage */
+#define VPP_MIN_WEV_OFFSET 0x1D /* Vpp [Programming] Supply Minimum Write/Erase voltage */
+#define VPP_MAX_WEV_OFFSET 0x1E /* Vpp [Programming] Supply Maximum Write/Erase voltage */
+#define TYP_SINGLE_WRITE_TIMEOUT_OFFSET 0x1F /* Typical timeout per single byte/word write */
+#define TYP_BUFFER_WRITE_TIMEOUT_OFFSET 0x20 /* Typical timeout for minimum-size buffer write */
+#define TYP_BLOCK_ERASE_TIMEOUT_OFFSET 0x21 /* Typical timeout per individual block erase */
+#define TYP_CHIP_ERASE_TIMEOUT_OFFSET 0x22 /* Typical timeout for full chip erase */
+#define MAX_SINGLE_WRITE_TIMEOUT_OFFSET 0x23 /* Maximum timeout for byte/word write */
+#define MAX_BUFFER_WRITE_TIMEOUT_OFFSET 0x24 /* Maximum timeout for buffer write */
+#define MAX_BLOCK_ERASE_TIMEOUT_OFFSET 0x25 /* Maximum timeout per individual block erase */
+#define MAX_CHIP_ERASE_TIMEOUT_OFFSET 0x26 /* Maximum timeout for chip erase */
+
+#ifndef __ASSEMBLY__
+typedef struct cfi_query_system_interface_information
+{
+ uint16_t vcc_min_wev; /* in mV */
+ uint16_t vcc_max_wev; /* in mV */
+ uint16_t vpp_min_wev; /* in mV, 0 - no Vpp pin is present */
+ uint16_t vpp_max_wev; /* in mV, 0 - no Vpp pin is present */
+ uint32_t typ_single_write_timeout; /* in us, 0 - not supported */
+ uint32_t typ_buffer_write_timeout; /* in us, 0 - not supported */
+ uint32_t typ_block_erase_timeout; /* in ms, 0 - not supported */
+ uint32_t typ_chip_erase_timeout; /* in ms, 0 - not supported */
+ uint32_t max_single_write_timeout; /* in us, 0 - not supported */
+ uint32_t max_buffer_write_timeout; /* in us, 0 - not supported */
+ uint32_t max_block_erase_timeout; /* in ms, 0 - not supported */
+ uint32_t max_chip_erase_timeout; /* in ms, 0 - not supported */
+} urj_flash_cfi_query_system_interface_information_t;
+#endif /* __ASSEMBLY__ */
+
+/* Device geometry definition - see 4.3.4 in [1] */
+
+#define DEVICE_SIZE_OFFSET 0x27 /* Device Size */
+#define FLASH_DEVICE_INTERFACE_OFFSET 0x28 /* Flash Device Interface description */
+#define MAX_BYTES_WRITE_OFFSET 0x2A /* Maximum number of bytes in multi-byte write */
+#define NUMBER_OF_ERASE_REGIONS_OFFSET 0x2C /* Number of Erase Block Regions */
+#define ERASE_BLOCK_REGION_OFFSET 0x2D /* Erase Block Region Information */
+
+#ifndef __ASSEMBLY__
+typedef struct cfi_erase_block_region urj_flash_cfi_erase_block_region_t;
+
+typedef struct cfi_device_geometry
+{
+ uint32_t device_size; /* in B */
+ uint16_t device_interface; /* see Table 2 in [2] */
+ uint32_t max_bytes_write; /* in B */
+ uint8_t number_of_erase_regions;
+ urj_flash_cfi_erase_block_region_t *erase_block_regions;
+} urj_flash_cfi_device_geometry_t;
+
+struct cfi_erase_block_region
+{
+ uint32_t erase_block_size; /* in B */
+ uint32_t number_of_erase_blocks;
+};
+#endif /* __ASSEMBLY__ */
+
+/* Device interface code assignments (for cfi_device_geometry.device_interface) - see Table 2 in [2] */
+
+#define CFI_INTERFACE_X8 0
+#define CFI_INTERFACE_X16 1
+#define CFI_INTERFACE_X8_X16 2
+#define CFI_INTERFACE_X32 3
+#define CFI_INTERFACE_X16_X32 4
+
+/* CFI Query structure - see 4.3.1 in [1] */
+
+#ifndef __ASSEMBLY__
+typedef struct cfi_query_structure
+{
+ urj_flash_cfi_query_identification_string_t identification_string;
+ urj_flash_cfi_query_system_interface_information_t system_interface_info;
+ urj_flash_cfi_device_geometry_t device_geometry;
+} urj_flash_cfi_query_structure_t;
+
+struct URJ_FLASH_CFI_CHIP
+{
+ int width; /* 1 for 8 bits, 2 for 16 bits, 4 for 32 bits, etc. */
+ urj_flash_cfi_query_structure_t cfi;
+};
+#endif /* __ASSEMBLY__ */
+
+/* AMD primary vendor-specific extended query structure - see [3] and [4] */
+#define MAJOR_VERSION_OFFSET 0x03
+#define MINOR_VERSION_OFFSET 0x04
+#define ADDRESS_SENSITIVE_UNLOCK_OFFSET 0x05
+#define ERASE_SUSPEND_OFFSET 0x06
+#define SECTOR_PROTECT_OFFSET 0x07
+#define SECTOR_TEMPORARY_UNPROTECT_OFFSET 0x08
+#define SECTOR_PROTECT_SCHEME_OFFSET 0x09
+#define SIMULTANEOUS_OPERATION_OFFSET 0x0A
+#define BURST_MODE_TYPE_OFFSET 0x0B
+#define PAGE_MODE_TYPE_OFFSET 0x0C
+#define ACC_MIN_OFFSET 0x0D
+#define ACC_MAX_OFFSET 0x0E
+#define TOP_BOTTOM_SECTOR_FLAG_OFFSET 0x0F
+#define PROGRAM_SUSPEND_OFFSET 0x10
+#define UNLOCK_BYPASS_OFFSET 0x11
+#define SECSI_SECTOR_SIZE_OFFSET 0x12
+#define EMBEDDED_HWRST_TIMEOUT_MAX_OFFSET 0x13
+#define NON_EMBEDDED_HWRST_TIMEOUT_MAX_OFFSET 0x14
+#define ERASE_SUSPEND_TIMEOUT_MAX_OFFSET 0x15
+#define PROGRAM_SUSPEND_TIMEOUT_MAX_OFFSET 0x16
+#define BANK_ORGANIZATION_OFFSET 0x17
+#define BANK_REGION_INFO_OFFSET 0X18
+
+#ifndef __ASSEMBLY__
+typedef struct amd_pri_extened_query_structure
+{
+ uint8_t major_version;
+ uint8_t minor_version;
+ uint8_t address_sensitive_unlock;
+ uint8_t erase_suspend;
+ uint8_t sector_protect;
+ uint8_t sector_temporary_unprotect;
+ uint8_t sector_protect_scheme;
+ uint8_t simultaneous_operation;
+ uint8_t burst_mode_type;
+ uint8_t page_mode_type;
+ uint16_t acc_min; /* in mV */
+ uint16_t acc_max; /* in mV */
+ uint8_t top_bottom_sector_flag;
+ uint8_t program_suspend;
+ uint8_t unlock_bypass;
+ uint8_t secsi_sector_size;
+ uint8_t embedded_hwrst_timeout_max;
+ uint8_t non_embedded_hwrst_timeout_max; /* in ns */
+ uint8_t erase_suspend_timeout_max; /* in ns */
+ uint8_t program_suspend_timeout_max; /* in us */
+ uint8_t bank_organization; /* in us */
+ uint8_t bank_region_info[0];
+} urj_flash_cfi_amd_pri_extened_query_structure_t;
+
+void urj_flash_cfi_array_free (urj_flash_cfi_array_t *cfi_array);
+/** @return URJ_STATUS_OK on success; URJ_STATUS_FAIL on error */
+int urj_flash_cfi_detect (urj_bus_t *bus, uint32_t adr,
+ urj_flash_cfi_array_t **cfi_array);
+#endif /* __ASSEMBLY__ */
+
+#endif /* FLASH_CFI_H */
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2002 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2002.
+ *
+ * Documentation:
+ * [1] JEDEC Solid State Technology Association, "Common Flash Interface (CFI)",
+ * September 1999, Order Number: JESD68
+ * [2] JEDEC Solid State Technology Association, "Common Flash Interface (CFI) ID Codes",
+ * September 2001, Order Number: JEP137-A
+ *
+ */
+
+#include <sysdep.h>
+
+#include <stdint.h>
+#include <string.h>
+#include <stddef.h>
+
+#include <urjtag/error.h>
+#include <urjtag/flash.h>
+#include <urjtag/bus.h>
+
+#include "flash.h"
+
+#include "jedec.h"
+#include "amd.h"
+#include "cfi.h"
+#include "intel.h"
+
+urj_flash_cfi_array_t *urj_flash_cfi_array = NULL;
+
+void
+urj_flash_cleanup (void)
+{
+ urj_flash_cfi_array_free (urj_flash_cfi_array);
+ urj_flash_cfi_array = NULL;
+}
+
+int
+urj_flash_detectflash (urj_log_level_t ll, urj_bus_t *bus, uint32_t adr)
+{
+ urj_flash_cfi_query_structure_t *cfi;
+ const char *s;
+
+ if (!bus)
+ {
+ urj_error_set (URJ_ERROR_INVALID, _("bus driver"));
+ return URJ_STATUS_FAIL;
+ }
+
+ urj_flash_cleanup();
+
+ URJ_BUS_PREPARE (bus);
+
+ if (urj_flash_cfi_detect (bus, adr, &urj_flash_cfi_array) != URJ_STATUS_OK)
+ {
+ urj_flash_cleanup();
+ if (urj_flash_jedec_detect (bus, adr, &urj_flash_cfi_array)
+ != URJ_STATUS_OK)
+ {
+ urj_flash_cleanup();
+ if (urj_flash_amd_detect (bus, adr, &urj_flash_cfi_array)
+ != URJ_STATUS_OK)
+ {
+ urj_flash_cleanup();
+#ifdef JEDEC_EXP
+ if (urj_flash_jedec_exp_detect (bus, adr, &urj_flash_cfi_array)
+ != URJ_STATUS_OK)
+ {
+ urj_flash_cleanup();
+ }
+#endif
+ }
+ }
+ }
+
+ if (urj_flash_cfi_array == NULL)
+ {
+ urj_error_set (URJ_ERROR_NOTFOUND, _("Flash not found"));
+ return URJ_STATUS_FAIL;
+ }
+
+ cfi = &urj_flash_cfi_array->cfi_chips[0]->cfi;
+
+ /* detect CFI capable devices */
+ /* TODO: Low chip only */
+ /* see 4.3.2 in [1] */
+ urj_log (ll, _("Query identification string:\n"));
+ /* see section 2 in [2] */
+ switch (cfi->identification_string.pri_id_code)
+ {
+ case CFI_VENDOR_NULL:
+ s = N_("null");
+ break;
+ case CFI_VENDOR_INTEL_ECS:
+ s = N_("Intel/Sharp Extended Command Set");
+ break;
+ case CFI_VENDOR_AMD_SCS:
+ s = N_("AMD/Fujitsu Standard Command Set");
+ break;
+ case CFI_VENDOR_INTEL_SCS:
+ s = N_("Intel Standard Command Set");
+ break;
+ case CFI_VENDOR_AMD_ECS:
+ s = N_("AMD/Fujitsu Extended Command Set");
+ break;
+ case CFI_VENDOR_MITSUBISHI_SCS:
+ s = N_("Mitsubishi Standard Command Set");
+ break;
+ case CFI_VENDOR_MITSUBISHI_ECS:
+ s = N_("Mitsubishi Extended Command Set");
+ break;
+ case CFI_VENDOR_SST_PWCS:
+ s = N_("Page Write Command Set");
+ break;
+ default:
+ s = N_("unknown!!!");
+ break;
+ }
+ urj_log (ll, _("\tPrimary Algorithm Command Set and Control Interface ID Code: 0x%04X (%s)\n"),
+ cfi->identification_string.pri_id_code, _(s));
+ switch (cfi->identification_string.alt_id_code)
+ {
+ case CFI_VENDOR_NULL:
+ s = N_("null");
+ break;
+ case CFI_VENDOR_INTEL_ECS:
+ s = N_("Intel/Sharp Extended Command Set");
+ break;
+ case CFI_VENDOR_AMD_SCS:
+ s = N_("AMD/Fujitsu Standard Command Set");
+ break;
+ case CFI_VENDOR_INTEL_SCS:
+ s = N_("Intel Standard Command Set");
+ break;
+ case CFI_VENDOR_AMD_ECS:
+ s = N_("AMD/Fujitsu Extended Command Set");
+ break;
+ case CFI_VENDOR_MITSUBISHI_SCS:
+ s = N_("Mitsubishi Standard Command Set");
+ break;
+ case CFI_VENDOR_MITSUBISHI_ECS:
+ s = N_("Mitsubishi Extended Command Set");
+ break;
+ case CFI_VENDOR_SST_PWCS:
+ s = N_("Page Write Command Set");
+ break;
+ default:
+ s = N_("unknown!!!");
+ break;
+ }
+ urj_log (ll, _("\tAlternate Algorithm Command Set and Control Interface ID Code: 0x%04X (%s)\n"),
+ cfi->identification_string.alt_id_code, _(s));
+
+ /* see 4.3.3 in [1] */
+ urj_log (ll, _("Query system interface information:\n"));
+ urj_log (ll, _("\tVcc Logic Supply Minimum Write/Erase or Write voltage: %d mV\n"),
+ cfi->system_interface_info.vcc_min_wev);
+ urj_log (ll, _("\tVcc Logic Supply Maximum Write/Erase or Write voltage: %d mV\n"),
+ cfi->system_interface_info.vcc_max_wev);
+ urj_log (ll, _("\tVpp [Programming] Supply Minimum Write/Erase voltage: %d mV\n"),
+ cfi->system_interface_info.vpp_min_wev);
+ urj_log (ll, _("\tVpp [Programming] Supply Maximum Write/Erase voltage: %d mV\n"),
+ cfi->system_interface_info.vpp_max_wev);
+ urj_log (ll, _("\tTypical timeout per single byte/word program: %d us\n"),
+ (int) cfi->system_interface_info.typ_single_write_timeout);
+ urj_log (ll, _("\tTypical timeout for maximum-size multi-byte program: %d us\n"),
+ (int) cfi->system_interface_info.typ_buffer_write_timeout);
+ urj_log (ll, _("\tTypical timeout per individual block erase: %d ms\n"),
+ (int) cfi->system_interface_info.typ_block_erase_timeout);
+ urj_log (ll, _("\tTypical timeout for full chip erase: %d ms\n"),
+ (int) cfi->system_interface_info.typ_chip_erase_timeout);
+ urj_log (ll, _("\tMaximum timeout for byte/word program: %d us\n"),
+ (int) cfi->system_interface_info.max_single_write_timeout);
+ urj_log (ll, _("\tMaximum timeout for multi-byte program: %d us\n"),
+ (int) cfi->system_interface_info.max_buffer_write_timeout);
+ urj_log (ll, _("\tMaximum timeout per individual block erase: %d ms\n"),
+ (int) cfi->system_interface_info.max_block_erase_timeout);
+ urj_log (ll, _("\tMaximum timeout for chip erase: %d ms\n"),
+ (int) cfi->system_interface_info.max_chip_erase_timeout);
+
+ /* see 4.3.4 in [1] */
+ urj_log (ll, _("Device geometry definition:\n"));
+ urj_log (ll, _("\tDevice Size: %d B (%d KiB, %d MiB)\n"),
+ (int) cfi->device_geometry.device_size,
+ (int) (cfi->device_geometry.device_size / 1024),
+ (int) (cfi->device_geometry.device_size / (1024 * 1024)));
+ /* see section 4 in [2] */
+ switch (cfi->device_geometry.device_interface)
+ {
+ case CFI_INTERFACE_X8:
+ s = N_("x8");
+ break;
+ case CFI_INTERFACE_X16:
+ s = N_("x16");
+ break;
+ case CFI_INTERFACE_X8_X16:
+ s = N_("x8/x16");
+ break;
+ case CFI_INTERFACE_X32:
+ s = N_("x32");
+ break;
+ case CFI_INTERFACE_X16_X32:
+ s = N_("x16/x32");
+ break;
+ default:
+ s = N_("unknown!!!");
+ break;
+ }
+ urj_log (ll, _("\tFlash Device Interface Code description: 0x%04X (%s)\n"),
+ cfi->device_geometry.device_interface, _(s));
+ urj_log (ll, _("\tMaximum number of bytes in multi-byte program: %d\n"),
+ (int) cfi->device_geometry.max_bytes_write);
+ urj_log (ll, _("\tNumber of Erase Block Regions within device: %d\n"),
+ cfi->device_geometry.number_of_erase_regions);
+ urj_log (ll, _("\tErase Block Region Information:\n"));
+ {
+ int i;
+
+ for (i = 0; i < cfi->device_geometry.number_of_erase_regions; i++)
+ {
+ urj_log (ll, _("\t\tRegion %d:\n"), i);
+ urj_log (ll, _("\t\t\tErase Block Size: %d B (%d KiB)\n"),
+ (int) cfi->device_geometry.erase_block_regions[i].
+ erase_block_size,
+ (int) cfi->device_geometry.erase_block_regions[i].
+ erase_block_size / 1024);
+ urj_log (ll, _("\t\t\tNumber of Erase Blocks: %d\n"),
+ (int) cfi->device_geometry.erase_block_regions[i].
+ number_of_erase_blocks);
+ }
+ }
+
+ if (cfi->identification_string.pri_id_code == CFI_VENDOR_AMD_SCS
+ && cfi->identification_string.pri_vendor_tbl != NULL)
+ {
+ urj_flash_cfi_amd_pri_extened_query_structure_t *pri_vendor_tbl;
+ uint8_t major_version;
+ uint8_t minor_version;
+ int i;
+ const char *required_or_not[2] = {
+ N_("Required"), N_("Not required")
+ };
+ const char *supported_or_not[2] = {
+ N_("Supported"), N_("Not supported")
+ };
+ const char *process_technology[6] = {
+ N_("170-nm Floating Gate technology"),
+ N_("230-nm MirrorBit(tm) technology"),
+ N_("130-nm Floating Gate technology"),
+ N_("110-nm MirrorBit(tm) technology"),
+ N_("90-nm Floating Gate technology"),
+ N_("90-nm MirrorBit(tm) technology")
+ };
+ const char *process_technology_13[3] = {
+ N_("CS49"), N_("CS59"), N_("CS99")
+ };
+ const char *erase_suspend[3] = {
+ N_("Not supported"), N_("Read only"), N_("Read/write")
+ };
+ const char *sector_protect_scheme[8] = {
+ N_("29F040 mode"), N_("29F016 mode"), N_("29F400 mode"),
+ N_("29LV800 mode"),
+ N_("29BDS640 mode (Software Command Locking)"),
+ N_("29BDD160 mode (New Sector Protect)"),
+ N_("29PDL128 mode (New Sector Protect + 29LV800)"),
+ N_("Advanced Sector Protect")
+ };
+ const char *page_mode_type[4] = {
+ N_("Not supported"), N_("4 word Page"), N_("8 word Page"),
+ N_("16 word Page")
+ };
+
+ const char *top_bottom[6] = {
+ N_("No boot"),
+ N_("8x8kb sectors at top and bottom with WP control"),
+ N_("Bottom boot device"), N_("Top boot device"),
+ N_("Uniform bottom boot device"), N_("Uniform top boot device")
+ };
+ const char *bad_value = N_("Bad value");
+
+#define ARRAY_SIZE(a) (sizeof (a) / sizeof ((a)[0]))
+
+ pri_vendor_tbl = cfi->identification_string.pri_vendor_tbl;
+ major_version = pri_vendor_tbl->major_version;
+ minor_version = pri_vendor_tbl->minor_version;
+
+ urj_log (ll, _("Primary Vendor-Specific Extended Query:\n"));
+ urj_log (ll, _("\tMajor version number: %c\n"),
+ pri_vendor_tbl->major_version);
+ urj_log (ll, _("\tMinor version number: %c\n"),
+ pri_vendor_tbl->minor_version);
+ if (major_version > '1'
+ || (major_version == '1' && minor_version >= '0'))
+ {
+ if ((pri_vendor_tbl->address_sensitive_unlock & 0x3) <
+ ARRAY_SIZE (required_or_not))
+ urj_log (ll, _("\tAddress Sensitive Unlock: %s\n"),
+ required_or_not[pri_vendor_tbl->
+ address_sensitive_unlock & 0x3]);
+ else
+ urj_log (ll, _("\tAddress Sensitive Unlock: %s\n"), bad_value);
+
+ if (major_version > '1'
+ || (major_version == '1' && minor_version >= '4'))
+ {
+ if ((pri_vendor_tbl->address_sensitive_unlock >> 2) <
+ ARRAY_SIZE (process_technology))
+ urj_log (ll, _("\tProcess Technology: %s\n"),
+ process_technology[pri_vendor_tbl->
+ address_sensitive_unlock >>
+ 2]);
+ else
+ urj_log (ll, _("\tProcess Technology: %s\n"), bad_value);
+ }
+ else if (major_version == '1' && minor_version == '3')
+ {
+ if ((pri_vendor_tbl->address_sensitive_unlock >> 2) <
+ ARRAY_SIZE (process_technology_13))
+ urj_log (ll, _("\tProcess Technology: %s\n"),
+ process_technology_13[pri_vendor_tbl->
+ address_sensitive_unlock >>
+ 2]);
+ else
+ urj_log (ll, _("\tProcess Technology: %s\n"), bad_value);
+ }
+ if (pri_vendor_tbl->erase_suspend < ARRAY_SIZE (erase_suspend))
+ urj_log (ll, _("\tErase Suspend: %s\n"),
+ erase_suspend[pri_vendor_tbl->erase_suspend]);
+ if (pri_vendor_tbl->sector_protect == 0)
+ urj_log (ll, _("\tSector Protect: Not supported\n"));
+ else
+ urj_log (ll, _("\tSector Protect: %d sectors per group\n"),
+ pri_vendor_tbl->sector_protect);
+ if (pri_vendor_tbl->sector_temporary_unprotect <
+ ARRAY_SIZE (supported_or_not))
+ urj_log (ll, _("\tSector Temporary Unprotect: %s\n"),
+ supported_or_not[pri_vendor_tbl->
+ sector_temporary_unprotect]);
+ else
+ urj_log (ll, _("\tSector Temporary Unprotect: %s\n"),
+ bad_value);
+ if (pri_vendor_tbl->sector_protect_scheme <
+ ARRAY_SIZE (sector_protect_scheme))
+ urj_log (ll, _("\tSector Protect/Unprotect Scheme: %s\n"),
+ sector_protect_scheme[pri_vendor_tbl->
+ sector_protect_scheme]);
+ else
+ urj_log (ll, _("\tSector Protect/Unprotect Scheme: %s\n"),
+ bad_value);
+ if (pri_vendor_tbl->simultaneous_operation == 0)
+ urj_log (ll, _("\tSimultaneous Operation: Not supported\n"));
+ else
+ urj_log (ll, _("\tSimultaneous Operation: %d sectors\n"),
+ pri_vendor_tbl->simultaneous_operation);
+ if (pri_vendor_tbl->burst_mode_type <
+ ARRAY_SIZE (supported_or_not))
+ urj_log (ll, _("\tBurst Mode Type: %s\n"),
+ supported_or_not[pri_vendor_tbl->burst_mode_type]);
+ else
+ urj_log (ll, _("\tBurst Mode Type: %s\n"),
+ bad_value);
+ if (pri_vendor_tbl->page_mode_type < ARRAY_SIZE (page_mode_type))
+ urj_log (ll, _("\tPage Mode Type: %s\n"),
+ page_mode_type[pri_vendor_tbl->page_mode_type]);
+ else
+ urj_log (ll, _("\tPage Mode Type: %s\n"),
+ bad_value);
+ }
+ if (major_version > '1'
+ || (major_version == '1' && minor_version >= '1'))
+ {
+ urj_log (ll, _("\tACC (Acceleration) Supply Minimum: %d mV\n"),
+ pri_vendor_tbl->acc_min);
+ urj_log (ll, _("\tACC (Acceleration) Supply Maximum: %d mV\n"),
+ pri_vendor_tbl->acc_max);
+ if (pri_vendor_tbl->top_bottom_sector_flag <
+ ARRAY_SIZE (top_bottom))
+ urj_log (ll, _("\tTop/Bottom Sector Flag: %s\n"),
+ top_bottom[pri_vendor_tbl->top_bottom_sector_flag]);
+ else
+ urj_log (ll, _("\tTop/Bottom Sector Flag: %s\n"), bad_value);
+ }
+ if (major_version > '1'
+ || (major_version == '1' && minor_version >= '2'))
+ {
+ if (pri_vendor_tbl->program_suspend <
+ ARRAY_SIZE (supported_or_not))
+ urj_log (ll, _("\tProgram Suspend: %s\n"),
+ supported_or_not[pri_vendor_tbl->program_suspend]);
+ else
+ urj_log (ll, _("\tProgram Suspend: %s\n"),
+ bad_value);
+ }
+ if (major_version > '1'
+ || (major_version == '1' && minor_version >= '4'))
+ {
+ if (pri_vendor_tbl->unlock_bypass < ARRAY_SIZE (supported_or_not))
+ urj_log (ll, _("\tUnlock Bypass: %s\n"),
+ supported_or_not[pri_vendor_tbl->unlock_bypass]);
+ else
+ urj_log (ll, _("\tUnlock Bypass: %s\n"), bad_value);
+ urj_log (ll, _("\tSecSi Sector (Customer OTP Area) Size: %d bytes\n"),
+ pri_vendor_tbl->secsi_sector_size);
+ urj_log (ll, _("\tEmbedded Hardware Reset Timeout Maximum: %d ns\n"),
+ pri_vendor_tbl->embedded_hwrst_timeout_max);
+ urj_log (ll, _("\tNon-Embedded Hardware Reset Timeout Maximum: %d ns\n"),
+ pri_vendor_tbl->non_embedded_hwrst_timeout_max);
+ urj_log (ll, _("\tErase Suspend Timeout Maximum: %d us\n"),
+ pri_vendor_tbl->erase_suspend_timeout_max);
+ urj_log (ll, _("\tProgram Suspend Timeout Maximum: %d us\n"),
+ pri_vendor_tbl->program_suspend_timeout_max);
+ }
+ if ((major_version > '1'
+ || (major_version == '1' && minor_version >= '3'))
+ && pri_vendor_tbl->bank_organization)
+ {
+ urj_log (ll, _("\tBank Organization:\n"));
+ for (i = 0; i < pri_vendor_tbl->bank_organization; i++)
+ urj_log (ll, _("\t\tBank%d: %d sectors\n"),
+ i + 1, pri_vendor_tbl->bank_region_info[i]);
+ }
+ }
+
+ return URJ_STATUS_OK;
+}
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2002 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2002.
+ * Modified by Ajith Kumar P.C <ajithpc@kila.com>, 20/09/2006
+ *
+ * Documentation:
+ * [1] Advanced Micro Devices, "Common Flash Memory Interface Specification Release 2.0",
+ * December 1, 2001
+ * [2] Intel Corporation, "Intel PXA250 and PXA210 Application Processors
+ * Developer's Manual", February 2002, Order Number: 278522-001
+ * [3] Intel Corporation, "Common Flash Interface (CFI) and Command Sets
+ * Application Note 646", April 2000, Order Number: 292204-004
+ * [4] Advanced Micro Devices, "Common Flash Memory Interface Publication 100 Vendor & Device
+ * ID Code Assignments", December 1, 2001, Volume Number: 96.1
+ *
+ */
+
+#include <sysdep.h>
+
+#include <stdint.h>
+#include <stdlib.h>
+#include <string.h>
+#include <errno.h>
+
+#include <urjtag/error.h>
+#include <urjtag/log.h>
+#include <urjtag/bus.h>
+#include <urjtag/jtag.h>
+#include <urjtag/flash.h>
+
+#include "flash.h"
+#include "cfi.h"
+#include "intel.h"
+#include "amd.h"
+
+urj_flash_driver_t *urj_flash_flash_drivers[] = {
+ &urj_flash_amd_32_flash_driver,
+ &urj_flash_amd_16_flash_driver,
+ &urj_flash_amd_8_flash_driver,
+ &urj_flash_intel_32_flash_driver,
+ &urj_flash_intel_16_flash_driver,
+ &urj_flash_intel_8_flash_driver,
+ &urj_flash_amd_29xx040_flash_driver, //20/09/2006
+ NULL
+};
+
+static urj_flash_driver_t *flash_driver = NULL;
+
+static int
+set_flash_driver (void)
+{
+ int i;
+ urj_flash_cfi_query_structure_t *cfi;
+
+ flash_driver = NULL;
+ if (urj_flash_cfi_array == NULL)
+ {
+ urj_error_set (URJ_ERROR_NOTFOUND, "global cfi_array not set");
+ return URJ_STATUS_FAIL;
+ }
+
+ cfi = &urj_flash_cfi_array->cfi_chips[0]->cfi;
+
+ for (i = 0; urj_flash_flash_drivers[i] != NULL; i++)
+ if (urj_flash_flash_drivers[i]->autodetect (urj_flash_cfi_array))
+ {
+ flash_driver = urj_flash_flash_drivers[i];
+ flash_driver->print_info (URJ_LOG_LEVEL_NORMAL,
+ urj_flash_cfi_array);
+ return URJ_STATUS_OK;
+ }
+
+ urj_log (URJ_LOG_LEVEL_ERROR,
+ _("unknown flash - vendor id: %d (0x%04x)\n"),
+ cfi->identification_string.pri_id_code,
+ cfi->identification_string.pri_id_code);
+
+ urj_error_set (URJ_ERROR_UNSUPPORTED, _("Flash not supported"));
+
+ return URJ_STATUS_FAIL;
+}
+
+int
+urj_flashmsbin (urj_bus_t *bus, FILE *f, int noverify)
+{
+ uint32_t adr;
+ urj_flash_cfi_query_structure_t *cfi;
+
+ set_flash_driver ();
+ if (!urj_flash_cfi_array || !flash_driver)
+ {
+ urj_error_set (URJ_ERROR_NOTFOUND, _("no flash driver found"));
+ return URJ_STATUS_FAIL;
+ }
+
+ cfi = &urj_flash_cfi_array->cfi_chips[0]->cfi;
+
+ /* test sync bytes */
+ {
+ char sync[8];
+ // @@@@ RFHH check error state?
+ fread (&sync, sizeof (char), 7, f);
+ sync[7] = '\0';
+ if (strcmp ("B000FF\n", sync) != 0)
+ {
+ urj_error_set (URJ_ERROR_INVALID, _("Invalid sync sequence"));
+ return URJ_STATUS_FAIL;
+ }
+ }
+
+ /* erase memory blocks */
+ {
+ uint32_t start;
+ uint32_t len;
+ int first, last;
+ uint32_t block_size =
+ cfi->device_geometry.erase_block_regions[0].erase_block_size;
+
+ // @@@@ RFHH check error state?
+ fread (&start, sizeof start, 1, f);
+ // @@@@ RFHH check error state?
+ fread (&len, sizeof len, 1, f);
+ first = start / (block_size * 2);
+ last = (start + len - 1) / (block_size * 2);
+ for (; first <= last; first++)
+ {
+ int r;
+
+ adr = first * block_size * 2;
+ // @@@@ RFHH what about returning on error?
+ (void) flash_driver->unlock_block (urj_flash_cfi_array, adr);
+ urj_log (URJ_LOG_LEVEL_NORMAL, _("block %d unlocked\n"), first);
+ // @@@@ RFHH what about returning on error?
+ r = flash_driver->erase_block (urj_flash_cfi_array, adr);
+ urj_log (URJ_LOG_LEVEL_NORMAL, _("erasing block %d: %d\n"),
+ first, r);
+ }
+ }
+
+ urj_log (URJ_LOG_LEVEL_NORMAL, _("program:\n"));
+ for (;;)
+ {
+ uint32_t a, l, c;
+
+ fread (&a, sizeof a, 1, f);
+ fread (&l, sizeof l, 1, f);
+ fread (&c, sizeof c, 1, f);
+ if (feof (f))
+ {
+ urj_error_IO_set (_("premature end of file"));
+ return URJ_STATUS_FAIL;
+ }
+ urj_log (URJ_LOG_LEVEL_NORMAL,
+ _("record: start = 0x%08lX, len = 0x%08lX, checksum = 0x%08lX\n"),
+ (long unsigned) a, (long unsigned) l, (long unsigned) c);
+ if ((a == 0) && (c == 0))
+ break;
+ if (l & 3)
+ {
+ urj_error_set (URJ_ERROR_INVALID, _("Invalid record length"));
+ return URJ_STATUS_FAIL;
+ }
+
+ while (l)
+ {
+ uint32_t data;
+
+ urj_log (URJ_LOG_LEVEL_NORMAL, _("addr: 0x%08lX"),
+ (long unsigned) a);
+ urj_log (URJ_LOG_LEVEL_NORMAL, "\r");
+ // @@@@ RFHH check error state
+ fread (&data, sizeof data, 1, f);
+ if (flash_driver->program (urj_flash_cfi_array, a, &data, 1)
+ != URJ_STATUS_OK)
+ // retain error state
+ return URJ_STATUS_FAIL;
+ a += 4;
+ l -= 4;
+ }
+ }
+ urj_log (URJ_LOG_LEVEL_NORMAL, "\n");
+
+ flash_driver->readarray (urj_flash_cfi_array);
+
+ if (noverify)
+ {
+ urj_log (URJ_LOG_LEVEL_NORMAL, _("verify skipped\n"));
+ return URJ_STATUS_OK;
+ }
+
+ fseek (f, 15, SEEK_SET);
+ urj_log (URJ_LOG_LEVEL_NORMAL, _("verify:\n"));
+
+ for (;;)
+ {
+ uint32_t a, l, c;
+
+ fread (&a, sizeof a, 1, f);
+ fread (&l, sizeof l, 1, f);
+ fread (&c, sizeof c, 1, f);
+ if (feof (f))
+ {
+ urj_error_IO_set (_("premature end of file"));
+ return URJ_STATUS_FAIL;
+ }
+ urj_log (URJ_LOG_LEVEL_NORMAL,
+ _("record: start = 0x%08lX, len = 0x%08lX, checksum = 0x%08lX\n"),
+ (long unsigned) a, (long unsigned) l, (long unsigned) c);
+ if ((a == 0) && (c == 0))
+ break;
+ if (l & 3)
+ {
+ urj_error_set (URJ_ERROR_INVALID, _("Invalid record length"));
+ return URJ_STATUS_FAIL;
+ }
+
+ while (l)
+ {
+ uint32_t data, readed;
+
+ urj_log (URJ_LOG_LEVEL_NORMAL, _("addr: 0x%08lX"),
+ (long unsigned) a);
+ urj_log (URJ_LOG_LEVEL_NORMAL, "\r");
+ // @@@@ RFHH check error state?
+ fread (&data, sizeof data, 1, f);
+ readed = URJ_BUS_READ (bus, a);
+ if (data != readed)
+ {
+ urj_error_set (URJ_ERROR_FLASH_PROGRAM,
+ _("verify error: 0x%08lX vs. 0x%08lX at addr %08lX"),
+ (long unsigned) readed, (long unsigned) data,
+ (long unsigned) a);
+ return URJ_STATUS_FAIL;
+ }
+ a += 4;
+ l -= 4;
+ }
+ }
+
+ urj_log (URJ_LOG_LEVEL_NORMAL, _("\nDone.\n"));
+
+ return URJ_STATUS_OK;
+}
+
+static int
+find_block (urj_flash_cfi_query_structure_t *cfi, int adr, int bus_width,
+ int chip_width, int *bytes_until_next_block)
+{
+ int i;
+ int b = 0;
+ int bb = 0;
+
+ for (i = 0; i < cfi->device_geometry.number_of_erase_regions; i++)
+ {
+ const int region_blocks =
+ cfi->device_geometry.erase_block_regions[i].number_of_erase_blocks;
+ const int flash_block_size =
+ cfi->device_geometry.erase_block_regions[i].erase_block_size;
+ const int region_block_size =
+ (bus_width / chip_width) * flash_block_size;
+ const int region_size = region_blocks * region_block_size;
+
+ if (adr < (bb + region_size))
+ {
+ int bir = (adr - bb) / region_block_size;
+ *bytes_until_next_block = bb + (bir + 1) * region_block_size - adr;
+ return b + bir;
+ }
+ b += region_blocks;
+ bb += region_size;
+ }
+ return -1;
+}
+
+int
+urj_flashmem (urj_bus_t *bus, FILE *f, uint32_t addr, int noverify)
+{
+ uint32_t adr;
+ urj_flash_cfi_query_structure_t *cfi;
+ int *erased;
+ int i;
+ int neb;
+ int bus_width;
+ int chip_width;
+#define BSIZE (1 << 12)
+ uint32_t write_buffer[BSIZE];
+ int write_buffer_count;
+ uint32_t write_buffer_adr;
+
+ set_flash_driver ();
+ if (!urj_flash_cfi_array || !flash_driver)
+ {
+ urj_error_set (URJ_ERROR_NOTFOUND, _("no flash driver found"));
+ return URJ_STATUS_FAIL;
+ }
+ cfi = &urj_flash_cfi_array->cfi_chips[0]->cfi;
+
+ bus_width = urj_flash_cfi_array->bus_width;
+ chip_width = urj_flash_cfi_array->cfi_chips[0]->width;
+
+ for (i = 0, neb = 0; i < cfi->device_geometry.number_of_erase_regions;
+ i++)
+ neb +=
+ cfi->device_geometry.erase_block_regions[i].number_of_erase_blocks;
+
+ erased = malloc (neb * sizeof *erased);
+ if (!erased)
+ {
+ urj_error_set (URJ_ERROR_OUT_OF_MEMORY, _("malloc(%zd) failed"),
+ neb * sizeof *erased);
+ return URJ_STATUS_FAIL;
+ }
+ for (i = 0; i < neb; i++)
+ erased[i] = 0;
+
+ urj_log (URJ_LOG_LEVEL_NORMAL, _("program:\n"));
+ adr = addr;
+ while (!feof (f))
+ {
+ uint32_t data;
+ uint8_t b[BSIZE];
+ int bc = 0, bn = 0, btr = BSIZE;
+ int block_no = find_block (cfi, adr - urj_flash_cfi_array->address,
+ bus_width, chip_width, &btr);
+
+ write_buffer_count = 0;
+ write_buffer_adr = adr;
+
+ if (btr > BSIZE)
+ btr = BSIZE;
+ // @@@@ RFHH check error state?
+ bn = fread (b, 1, btr, f);
+
+ if (bn > 0 && !erased[block_no])
+ {
+ int r;
+
+ // @@@@ RFHH what about returning on error?
+ (void) flash_driver->unlock_block (urj_flash_cfi_array, adr);
+ urj_log (URJ_LOG_LEVEL_NORMAL, _("\nblock %d unlocked\n"),
+ block_no);
+ // @@@@ RFHH what about returning on error?
+ r = flash_driver->erase_block (urj_flash_cfi_array, adr);
+ urj_log (URJ_LOG_LEVEL_NORMAL, _("erasing block %d: %d\n"),
+ block_no, r);
+ erased[block_no] = 1;
+ }
+
+ for (bc = 0; bc < bn; bc += flash_driver->bus_width)
+ {
+ int j;
+ if ((adr & (BSIZE - 1)) == 0)
+ {
+ urj_log (URJ_LOG_LEVEL_NORMAL, _("addr: 0x%08lX"),
+ (long unsigned) adr);
+ urj_log (URJ_LOG_LEVEL_NORMAL, "\r");
+ }
+
+ data = 0;
+ for (j = 0; j < flash_driver->bus_width; j++)
+ if (urj_big_endian)
+ data = (data << 8) | b[bc + j];
+ else
+ data |= b[bc + j] << (j * 8);
+
+ /* store data in write buffer, will be programmed to flash later */
+ write_buffer[write_buffer_count++] = data;
+
+ adr += flash_driver->bus_width;
+ }
+
+ if (write_buffer_count > 0)
+ if (flash_driver->program (urj_flash_cfi_array, write_buffer_adr,
+ write_buffer, write_buffer_count))
+ {
+ // retain error state
+ return URJ_STATUS_FAIL;
+ }
+
+ }
+ free (erased);
+
+ urj_log (URJ_LOG_LEVEL_NORMAL, _("addr: 0x%08lX\n"),
+ (long unsigned) adr - flash_driver->bus_width);
+
+ flash_driver->readarray (urj_flash_cfi_array);
+
+ if (noverify)
+ {
+ urj_log (URJ_LOG_LEVEL_NORMAL, _("verify skipped\n"));
+ return URJ_STATUS_OK;
+ }
+
+ fseek (f, 0, SEEK_SET);
+ urj_log (URJ_LOG_LEVEL_NORMAL, _("verify:\n"));
+ adr = addr;
+ while (!feof (f))
+ {
+ uint32_t data, readed;
+ uint8_t b[BSIZE];
+ int bc = 0, bn = 0, btr = BSIZE;
+
+ // @@@@ RFHH check error state?
+ bn = fread (b, 1, btr, f);
+
+ /* start consecutive read */
+ URJ_BUS_READ_START (bus, adr);
+
+ for (bc = 0; bc < bn; bc += flash_driver->bus_width)
+ {
+ int j;
+ uint32_t next_adr = adr + flash_driver->bus_width;
+
+ if ((adr & 0xFF) == 0)
+ {
+ urj_log (URJ_LOG_LEVEL_NORMAL, _("addr: 0x%08lX"),
+ (long unsigned) adr);
+ urj_log (URJ_LOG_LEVEL_NORMAL, "\r");
+ }
+
+ data = 0;
+ for (j = 0; j < flash_driver->bus_width; j++)
+ if (urj_big_endian)
+ data = (data << 8) | b[bc + j];
+ else
+ data |= b[bc + j] << (j * 8);
+
+ readed = URJ_BUS_READ_NEXT (bus, next_adr);
+ if (data != readed)
+ {
+ /* end consecutive read */
+ (void) URJ_BUS_READ_END (bus);
+
+ urj_error_set (URJ_ERROR_FLASH_PROGRAM,
+ _("addr: 0x%08lX\n verify error:\nread: 0x%08lX\nexpected: 0x%08lX\n"),
+ (long unsigned) adr, (long unsigned) readed,
+ (long unsigned) data);
+ return URJ_STATUS_FAIL;
+ }
+ adr = next_adr;
+ }
+
+ /* end consecutive read
+ this wastes one read access but saves us from determining the for-loop
+ finish condition twice within the loop */
+ (void) URJ_BUS_READ_END (bus);
+ }
+ urj_log (URJ_LOG_LEVEL_NORMAL, _("addr: 0x%08lX\nDone.\n"),
+ (long unsigned) adr - flash_driver->bus_width);
+
+ return URJ_STATUS_OK;
+}
+
+int
+urj_flasherase (urj_bus_t *bus, uint32_t addr, int number)
+{
+ urj_flash_cfi_query_structure_t *cfi;
+ int i;
+ int status = URJ_STATUS_OK;
+ int bus_width;
+ int chip_width;
+
+ set_flash_driver ();
+ if (!urj_flash_cfi_array || !flash_driver)
+ {
+ urj_error_set (URJ_ERROR_NOTFOUND, _("no flash driver found"));
+ return URJ_STATUS_FAIL;
+ }
+ cfi = &urj_flash_cfi_array->cfi_chips[0]->cfi;
+
+ bus_width = urj_flash_cfi_array->bus_width;
+ chip_width = urj_flash_cfi_array->cfi_chips[0]->width;
+
+ urj_log (URJ_LOG_LEVEL_NORMAL,
+ _("\nErasing %d Flash block%s from address 0x%lx\n"), number,
+ number > 1 ? "s" : "", (long unsigned) addr);
+
+ for (i = 1; i <= number; i++)
+ {
+ int r;
+ int btr = 0;
+ int block_no = find_block (cfi, addr - urj_flash_cfi_array->address,
+ bus_width, chip_width, &btr);
+
+ if (block_no < 0)
+ {
+ urj_error_set (URJ_ERROR_FLASH_ERASE, "Cannot find block");
+ status = URJ_STATUS_FAIL;
+ break;
+ }
+
+ urj_log (URJ_LOG_LEVEL_NORMAL,
+ _("(%d%% Completed) FLASH Block %d : Unlocking ... "),
+ i * 100 / number, block_no);
+ flash_driver->unlock_block (urj_flash_cfi_array, addr);
+ urj_log (URJ_LOG_LEVEL_NORMAL, _("Erasing ... "));
+ r = flash_driver->erase_block (urj_flash_cfi_array, addr);
+ if (r == URJ_STATUS_OK)
+ {
+ if (i == number)
+ {
+ urj_log (URJ_LOG_LEVEL_NORMAL, "\r");
+ urj_log (URJ_LOG_LEVEL_NORMAL,
+ _("(100%% Completed) FLASH Block %d : Unlocking ... Erasing ... Ok.\n"),
+ block_no);
+ }
+ else
+ {
+ urj_log (URJ_LOG_LEVEL_NORMAL, _("Ok."));
+ urj_log (URJ_LOG_LEVEL_NORMAL, "\r");
+ urj_log (URJ_LOG_LEVEL_NORMAL, _("%78s"), "");
+ urj_log (URJ_LOG_LEVEL_NORMAL, "\r");
+ }
+ }
+ else
+ {
+ urj_log (URJ_LOG_LEVEL_NORMAL, _("ERROR.\n"));
+ status = r;
+ }
+ addr += btr;
+ }
+
+ if (status == URJ_STATUS_OK)
+ urj_log (URJ_LOG_LEVEL_NORMAL, _("\nErasing Completed.\n"));
+ else
+ urj_log (URJ_LOG_LEVEL_NORMAL, _("\nErasing (partially) Failed.\n"));
+
+ /* BYPASS */
+ // urj_part_parts_set_instruction( ps, "BYPASS" );
+ // urj_tap_chain_shift_instructions( chain );
+
+ return status;
+}
--- /dev/null
+/*
+ * $Id: flash.h 1554 2009-05-03 16:06:22Z rfhh $
+ *
+ * Copyright (C) 2003 ETC s.r.o.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the ETC s.r.o. nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2003.
+ *
+ */
+
+#ifndef URJ_SRC_FLASH_H
+#define URJ_SRC_FLASH_H
+
+#include <sysdep.h>
+
+#include <stdio.h>
+#include <stdint.h>
+
+#include <urjtag/types.h>
+#include <urjtag/log.h>
+
+typedef struct URJ_FLASH_CFI_CHIP urj_flash_cfi_chip_t;
+
+struct URJ_FLASH_CFI_ARRAY
+{
+ urj_bus_t *bus;
+ uint32_t address;
+ int bus_width; /* in cfi_chips, e.g. 4 for 32 bits */
+ urj_flash_cfi_chip_t **cfi_chips;
+};
+
+/** @return URJ_STATUS_OK on success; URJ_STATUS_FAIL on error */
+int urj_flash_detectflash (urj_log_level_t ll, urj_bus_t *bus, uint32_t adr);
+
+extern urj_flash_cfi_array_t *urj_flash_cfi_array;
+
+#endif /* URJ_FLASH_H */
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2002 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2002.
+ * Changed by August Hörandl, 2003
+ *
+ * Documentation:
+ * [1] Advanced Micro Devices, "Common Flash Memory Interface Specification Release 2.0",
+ * December 1, 2001
+ * [2] Intel Corporation, "Intel PXA250 and PXA210 Application Processors
+ * Developer's Manual", February 2002, Order Number: 278522-001
+ * [3] Intel Corporation, "Common Flash Interface (CFI) and Command Sets
+ * Application Note 646", April 2000, Order Number: 292204-004
+ * [4] Advanced Micro Devices, "Common Flash Memory Interface Publication 100 Vendor & Device
+ * ID Code Assignments", December 1, 2001, Volume Number: 96.1
+ * [5] Micron Technology, Inc. "Q-Flash Memory MT28F123J3, MT28F640J3, MT28F320J3",
+ * MT28F640J3.fm - Rev. N 3/05 EN
+ *
+ */
+
+#include <sysdep.h>
+
+#include <stdint.h>
+#include <stdlib.h>
+#include <string.h>
+
+#include <urjtag/error.h>
+#include <urjtag/log.h>
+#include <urjtag/flash.h>
+#include <urjtag/bus.h>
+
+#include "flash.h"
+
+#include "cfi.h"
+#include "intel.h"
+#include "mic.h"
+
+/* autodetect, we can handle this chip */
+static int
+intel_flash_autodetect32 (urj_flash_cfi_array_t *cfi_array)
+{
+ urj_bus_area_t area;
+
+ if (URJ_BUS_AREA (cfi_array->bus, cfi_array->address,
+ &area) != URJ_STATUS_OK)
+ return 0;
+
+ return ((cfi_array->cfi_chips[0]->cfi.identification_string.pri_id_code
+ == CFI_VENDOR_MITSUBISHI_SCS)
+ || (cfi_array->cfi_chips[0]->cfi.identification_string.pri_id_code
+ == CFI_VENDOR_MITSUBISHI_ECS)
+ || (cfi_array->cfi_chips[0]->cfi.identification_string.pri_id_code
+ == CFI_VENDOR_INTEL_ECS)
+ || (cfi_array->cfi_chips[0]->cfi.identification_string.pri_id_code
+ == CFI_VENDOR_INTEL_SCS))
+ && (area.width == 32);
+}
+
+static int
+intel_flash_autodetect (urj_flash_cfi_array_t *cfi_array)
+{
+ urj_bus_area_t area;
+
+ if (URJ_BUS_AREA (cfi_array->bus, cfi_array->address,
+ &area) != URJ_STATUS_OK)
+ return 0;
+
+ return ((cfi_array->cfi_chips[0]->cfi.identification_string.pri_id_code
+ == CFI_VENDOR_MITSUBISHI_SCS)
+ || (cfi_array->cfi_chips[0]->cfi.identification_string.pri_id_code
+ == CFI_VENDOR_MITSUBISHI_ECS)
+ || (cfi_array->cfi_chips[0]->cfi.identification_string.pri_id_code
+ == CFI_VENDOR_INTEL_ECS)
+ || (cfi_array->cfi_chips[0]->cfi.identification_string.pri_id_code
+ == CFI_VENDOR_INTEL_SCS))
+ && (area.width == 16);
+}
+
+static int
+intel_flash_autodetect8 (urj_flash_cfi_array_t *cfi_array)
+{
+ urj_bus_area_t area;
+
+ if (URJ_BUS_AREA (cfi_array->bus, cfi_array->address,
+ &area) != URJ_STATUS_OK)
+ return 0;
+
+ return ((cfi_array->cfi_chips[0]->cfi.identification_string.pri_id_code
+ == CFI_VENDOR_MITSUBISHI_SCS)
+ || (cfi_array->cfi_chips[0]->cfi.identification_string.pri_id_code
+ == CFI_VENDOR_MITSUBISHI_ECS)
+ || (cfi_array->cfi_chips[0]->cfi.identification_string.pri_id_code
+ == CFI_VENDOR_INTEL_ECS)
+ || (cfi_array->cfi_chips[0]->cfi.identification_string.pri_id_code
+ == CFI_VENDOR_INTEL_SCS))
+ && (area.width == 8);
+}
+
+static void
+_intel_flash_print_info (urj_log_level_t ll, urj_flash_cfi_array_t *cfi_array,
+ int o)
+{
+ uint32_t mid, cid;
+ urj_bus_t *bus = cfi_array->bus;
+
+ mid = (URJ_BUS_READ (bus, cfi_array->address + (0x00 << o)) & 0xFF);
+ switch (mid)
+ {
+ case STD_MIC_INTEL:
+ urj_log (ll, _("Manufacturer: %s\n"), STD_MICN_INTEL);
+ break;
+ case STD_MIC_MITSUBISHI:
+ urj_log (ll, _("Manufacturer: %s\n"), STD_MICN_MITSUBISHI);
+ break;
+ case STD_MIC_MICRON_TECHNOLOGY:
+ urj_log (ll, _("Manufacturer: %s\n"), STD_MICN_MICRON_TECHNOLOGY);
+ break;
+ default:
+ urj_log (ll, _("Unknown manufacturer (0x%04lX)!\n"),
+ (long unsigned) mid);
+ break;
+ }
+
+ urj_log (ll, _("Chip: "));
+ cid = (URJ_BUS_READ (bus, cfi_array->address + (0x01 << o)) & 0xFFFF);
+ switch (cid)
+ {
+ case 0x0016:
+ urj_log (ll, "28F320J3A\n");
+ break;
+ case 0x0017:
+ urj_log (ll, "28F640J3A\n");
+ break;
+ case 0x0018:
+ urj_log (ll, "28F128J3A\n");
+ break;
+ case 0x001D:
+ urj_log (ll, "28F256J3A\n");
+ break;
+ case 0x8801:
+ urj_log (ll, "28F640K3\n");
+ break;
+ case 0x8802:
+ urj_log (ll, "28F128K3\n");
+ break;
+ case 0x8803:
+ urj_log (ll, "28F256K3\n");
+ break;
+ case 0x8805:
+ urj_log (ll, "28F640K18\n");
+ break;
+ case 0x8806:
+ urj_log (ll, "28F128K18\n");
+ break;
+ case 0x8807:
+ urj_log (ll, "28F256K18\n");
+ break;
+ case 0x880B:
+ urj_log (ll, "GE28F640L18T\n");
+ break;
+ case 0x880C:
+ urj_log (ll, "GE28F128L18T\n");
+ break;
+ case 0x880D:
+ urj_log (ll, "GE28F256L18T\n");
+ break;
+ case 0x880E:
+ urj_log (ll, "GE28F640L18B\n");
+ break;
+ case 0x880F:
+ urj_log (ll, "GE28F128L18B\n");
+ break;
+ case 0x8810:
+ urj_log (ll, "GE28F256L18B\n");
+ break;
+ default:
+ urj_log (ll, _("Unknown (0x%02lX)!\n"), (long unsigned) cid);
+ break;
+ }
+
+ /* Read Array */
+ URJ_BUS_WRITE (bus, cfi_array->address + (0 << o), 0x00FF00FF);
+}
+
+static void
+intel_flash_print_info (urj_log_level_t ll, urj_flash_cfi_array_t *cfi_array)
+{
+ int o = 1;
+ urj_bus_t *bus = cfi_array->bus;
+
+ /* Intel Primary Algorithm Extended Query Table - see Table 5. in [3] */
+ /* TODO */
+
+ /* Clear Status Register */
+ URJ_BUS_WRITE (bus, cfi_array->address + (0 << o), 0x0050);
+
+ /* Read Identifier Command */
+ URJ_BUS_WRITE (bus, cfi_array->address + (0 << 0), 0x0090);
+
+ _intel_flash_print_info (ll, cfi_array, o);
+}
+
+static void
+intel_flash_print_info32 (urj_log_level_t ll, urj_flash_cfi_array_t *cfi_array)
+{
+ int o = 2;
+ urj_bus_t *bus = cfi_array->bus;
+ /* Intel Primary Algorithm Extended Query Table - see Table 5. in [3] */
+ /* TODO */
+
+ /* Clear Status Register */
+ URJ_BUS_WRITE (bus, cfi_array->address + (0 << o), 0x00500050);
+
+ /* Read Identifier Command */
+ URJ_BUS_WRITE (bus, cfi_array->address + (0 << 0), 0x00900090);
+
+ _intel_flash_print_info (ll, cfi_array, o);
+}
+
+static int
+intel_flash_erase_block (urj_flash_cfi_array_t *cfi_array, uint32_t adr)
+{
+ uint16_t sr;
+ urj_bus_t *bus = cfi_array->bus;
+
+ URJ_BUS_WRITE (bus, cfi_array->address,
+ CFI_INTEL_CMD_CLEAR_STATUS_REGISTER);
+ URJ_BUS_WRITE (bus, adr, CFI_INTEL_CMD_BLOCK_ERASE);
+ URJ_BUS_WRITE (bus, adr, CFI_INTEL_CMD_CONFIRM);
+
+ while (!((sr = URJ_BUS_READ (bus, cfi_array->address) & 0xFE) & CFI_INTEL_SR_READY)); /* TODO: add timeout */
+
+ switch (sr & ~CFI_INTEL_SR_READY)
+ {
+ case 0:
+ return URJ_STATUS_OK;
+ case CFI_INTEL_SR_ERASE_ERROR | CFI_INTEL_SR_PROGRAM_ERROR:
+ urj_error_set (URJ_ERROR_FLASH_ERASE, _("invalid command seq"));
+ return URJ_STATUS_FAIL;
+ case CFI_INTEL_SR_ERASE_ERROR | CFI_INTEL_SR_VPEN_ERROR:
+ urj_error_set (URJ_ERROR_FLASH_ERASE, _("low vpen"));
+ return URJ_STATUS_FAIL;
+ case CFI_INTEL_SR_ERASE_ERROR | CFI_INTEL_SR_BLOCK_LOCKED:
+ urj_error_set (URJ_ERROR_FLASH_ERASE, _("block locked"));
+ return URJ_STATUS_FAIL;
+ default:
+ break;
+ }
+
+ urj_error_set (URJ_ERROR_FLASH, "unknown error");
+ return URJ_STATUS_FAIL;
+}
+
+static int
+intel_flash_unlock_block (urj_flash_cfi_array_t *cfi_array, uint32_t adr)
+{
+ uint16_t sr;
+ urj_bus_t *bus = cfi_array->bus;
+
+ URJ_BUS_WRITE (bus, cfi_array->address,
+ CFI_INTEL_CMD_CLEAR_STATUS_REGISTER);
+ URJ_BUS_WRITE (bus, adr, CFI_INTEL_CMD_LOCK_SETUP);
+ URJ_BUS_WRITE (bus, adr, CFI_INTEL_CMD_UNLOCK_BLOCK);
+
+ while (!((sr = URJ_BUS_READ (bus, cfi_array->address) & 0xFE) & CFI_INTEL_SR_READY)); /* TODO: add timeout */
+
+ if (sr != CFI_INTEL_SR_READY)
+ {
+ urj_error_set (URJ_ERROR_FLASH_UNLOCK,
+ _("unknown error while unlocking block"));
+ return URJ_STATUS_FAIL;
+ }
+
+ return URJ_STATUS_OK;
+}
+
+static int
+intel_flash_program_single (urj_flash_cfi_array_t *cfi_array,
+ uint32_t adr, uint32_t data)
+{
+ uint16_t sr;
+ urj_bus_t *bus = cfi_array->bus;
+
+ URJ_BUS_WRITE (bus, cfi_array->address,
+ CFI_INTEL_CMD_CLEAR_STATUS_REGISTER);
+ URJ_BUS_WRITE (bus, adr, CFI_INTEL_CMD_PROGRAM1);
+ URJ_BUS_WRITE (bus, adr, data);
+
+ while (!((sr = URJ_BUS_READ (bus, cfi_array->address) & 0xFE) & CFI_INTEL_SR_READY)); /* TODO: add timeout */
+
+ if (sr != CFI_INTEL_SR_READY)
+ {
+ urj_error_set (URJ_ERROR_FLASH_PROGRAM,
+ _("unknown error while programming"));
+ return URJ_STATUS_FAIL;
+ }
+
+ return URJ_STATUS_OK;
+}
+
+static int
+intel_flash_program_buffer (urj_flash_cfi_array_t *cfi_array,
+ uint32_t adr, uint32_t *buffer, int count)
+{
+ /* NOTE: Write-to-buffer programming operation according to [5], Figure 9 */
+ uint16_t sr;
+ urj_bus_t *bus = cfi_array->bus;
+ urj_flash_cfi_chip_t *cfi_chip = cfi_array->cfi_chips[0];
+ int wb_bytes = cfi_chip->cfi.device_geometry.max_bytes_write;
+ int chip_width = cfi_chip->width;
+ int offset = 0;
+
+ while (count > 0)
+ {
+ int wcount, idx;
+ uint32_t block_adr = adr;
+
+ /* determine length of next multi-byte write */
+ wcount = wb_bytes - (adr % wb_bytes);
+ wcount /= chip_width;
+ if (wcount > count)
+ wcount = count;
+
+ /* issue command WRITE_TO_BUFFER */
+ URJ_BUS_WRITE (bus, cfi_array->address,
+ CFI_INTEL_CMD_CLEAR_STATUS_REGISTER);
+ URJ_BUS_WRITE (bus, adr, CFI_INTEL_CMD_WRITE_TO_BUFFER);
+ /* poll XSR7 == 1 */
+ while (!((sr = URJ_BUS_READ (bus, cfi_array->address) & 0xFE) & CFI_INTEL_SR_READY)); /* TODO: add timeout */
+
+ /* write count value (number of upcoming writes - 1) */
+ URJ_BUS_WRITE (bus, adr, wcount - 1);
+
+ /* write payload to buffer */
+ for (idx = 0; idx < wcount; idx++)
+ {
+ URJ_BUS_WRITE (bus, adr, buffer[offset + idx]);
+ adr += cfi_array->bus_width;
+ }
+ offset += wcount;
+
+ /* issue command WRITE_CONFIRM */
+ URJ_BUS_WRITE (bus, block_adr, CFI_INTEL_CMD_WRITE_CONFIRM);
+
+ count -= wcount;
+ }
+
+ /* poll SR7 == 1 */
+ while (!((sr = URJ_BUS_READ (bus, cfi_array->address) & 0xFE) & CFI_INTEL_SR_READY)); /* TODO: add timeout */
+ if (sr != CFI_INTEL_SR_READY)
+ {
+ urj_error_set (URJ_ERROR_FLASH_PROGRAM,
+ _("unknown error while programming"));
+ return URJ_STATUS_FAIL;
+ }
+
+ return URJ_STATUS_OK;
+}
+
+static int
+intel_flash_program (urj_flash_cfi_array_t *cfi_array,
+ uint32_t adr, uint32_t *buffer, int count)
+{
+ urj_flash_cfi_query_structure_t *cfi = &(cfi_array->cfi_chips[0]->cfi);
+ int max_bytes_write = cfi->device_geometry.max_bytes_write;
+
+#ifndef FLASH_MULTI_BYTE
+ max_bytes_write = 0;
+#endif
+
+ /* multi-byte writes supported? */
+ if (max_bytes_write > 1)
+ return intel_flash_program_buffer (cfi_array, adr, buffer, count);
+
+ else
+ {
+ /* unroll buffer to single writes */
+ int idx;
+
+ for (idx = 0; idx < count; idx++)
+ {
+ int status = intel_flash_program_single (cfi_array, adr,
+ buffer[idx]);
+ if (status != URJ_STATUS_OK)
+ return status;
+ adr += cfi_array->bus_width;
+ }
+ }
+
+ return URJ_STATUS_OK;
+}
+
+static int
+intel_flash_erase_block32 (urj_flash_cfi_array_t *cfi_array, uint32_t adr)
+{
+ uint32_t sr;
+ urj_bus_t *bus = cfi_array->bus;
+
+ URJ_BUS_WRITE (bus, cfi_array->address,
+ (CFI_INTEL_CMD_CLEAR_STATUS_REGISTER << 16) |
+ CFI_INTEL_CMD_CLEAR_STATUS_REGISTER);
+ URJ_BUS_WRITE (bus, adr,
+ (CFI_INTEL_CMD_BLOCK_ERASE << 16) |
+ CFI_INTEL_CMD_BLOCK_ERASE);
+ URJ_BUS_WRITE (bus, adr,
+ (CFI_INTEL_CMD_CONFIRM << 16) | CFI_INTEL_CMD_CONFIRM);
+
+ while (((sr = URJ_BUS_READ (bus, cfi_array->address) & 0x00FE00FE) & ((CFI_INTEL_SR_READY << 16) | CFI_INTEL_SR_READY)) != ((CFI_INTEL_SR_READY << 16) | CFI_INTEL_SR_READY)); /* TODO: add timeout */
+
+ if (sr != ((CFI_INTEL_SR_READY << 16) | CFI_INTEL_SR_READY))
+ {
+ urj_error_set (URJ_ERROR_FLASH_ERASE, "sr = 0x%08lX",
+ (long unsigned) sr);
+ return URJ_STATUS_FAIL;
+ }
+
+ return URJ_STATUS_OK;
+}
+
+static int
+intel_flash_unlock_block32 (urj_flash_cfi_array_t *cfi_array,
+ uint32_t adr)
+{
+ uint32_t sr;
+ urj_bus_t *bus = cfi_array->bus;
+
+ URJ_BUS_WRITE (bus, cfi_array->address,
+ (CFI_INTEL_CMD_CLEAR_STATUS_REGISTER << 16) |
+ CFI_INTEL_CMD_CLEAR_STATUS_REGISTER);
+ URJ_BUS_WRITE (bus, adr,
+ (CFI_INTEL_CMD_LOCK_SETUP << 16) |
+ CFI_INTEL_CMD_LOCK_SETUP);
+ URJ_BUS_WRITE (bus, adr,
+ (CFI_INTEL_CMD_UNLOCK_BLOCK << 16) |
+ CFI_INTEL_CMD_UNLOCK_BLOCK);
+
+ while (((sr = URJ_BUS_READ (bus, cfi_array->address) & 0x00FE00FE) & ((CFI_INTEL_SR_READY << 16) | CFI_INTEL_SR_READY)) != ((CFI_INTEL_SR_READY << 16) | CFI_INTEL_SR_READY)); /* TODO: add timeout */
+
+ if (sr != ((CFI_INTEL_SR_READY << 16) | CFI_INTEL_SR_READY))
+ {
+ urj_error_set (URJ_ERROR_FLASH_UNLOCK, "sr = 0x%08lX",
+ (long unsigned) sr);
+ return URJ_STATUS_FAIL;
+ }
+
+ return URJ_STATUS_OK;
+}
+
+static int
+intel_flash_program32_single (urj_flash_cfi_array_t *cfi_array,
+ uint32_t adr, uint32_t data)
+{
+ uint32_t sr;
+ urj_bus_t *bus = cfi_array->bus;
+
+ URJ_BUS_WRITE (bus, cfi_array->address,
+ (CFI_INTEL_CMD_CLEAR_STATUS_REGISTER << 16) |
+ CFI_INTEL_CMD_CLEAR_STATUS_REGISTER);
+ URJ_BUS_WRITE (bus, adr,
+ (CFI_INTEL_CMD_PROGRAM1 << 16) | CFI_INTEL_CMD_PROGRAM1);
+ URJ_BUS_WRITE (bus, adr, data);
+
+ while (((sr = URJ_BUS_READ (bus, cfi_array->address) & 0x00FE00FE) & ((CFI_INTEL_SR_READY << 16) | CFI_INTEL_SR_READY)) != ((CFI_INTEL_SR_READY << 16) | CFI_INTEL_SR_READY)); /* TODO: add timeout */
+
+ if (sr != ((CFI_INTEL_SR_READY << 16) | CFI_INTEL_SR_READY))
+ {
+ urj_error_set (URJ_ERROR_FLASH_PROGRAM, "sr = 0x%08lX",
+ (long unsigned) sr);
+ return URJ_STATUS_FAIL;
+ }
+
+ return URJ_STATUS_OK;
+}
+
+static int
+intel_flash_program32 (urj_flash_cfi_array_t *cfi_array,
+ uint32_t adr, uint32_t *buffer, int count)
+{
+ /* Single byte programming is forced for 32 bit (2x16) flash configuration.
+ a) lack of testing capbilities for 2x16 multi-byte write operation
+ b) no implementation of intel_flash_program32_buffer() available
+ Closing these issues will enable multi-byte for 2x16 as well. */
+ int idx;
+
+ /* unroll buffer to single writes */
+ for (idx = 0; idx < count; idx++)
+ {
+ int status = intel_flash_program32_single (cfi_array, adr, buffer[idx]);
+ if (status != URJ_STATUS_OK)
+ return status;
+ adr += cfi_array->bus_width;
+ }
+
+ return URJ_STATUS_OK;
+}
+
+static void
+intel_flash_readarray32 (urj_flash_cfi_array_t *cfi_array)
+{
+ /* Read Array */
+ URJ_BUS_WRITE (cfi_array->bus, cfi_array->address, 0x00FF00FF);
+}
+
+static void
+intel_flash_readarray (urj_flash_cfi_array_t *cfi_array)
+{
+ /* Read Array */
+ URJ_BUS_WRITE (cfi_array->bus, cfi_array->address, 0x00FF00FF);
+}
+
+urj_flash_driver_t urj_flash_intel_32_flash_driver = {
+ 4, /* buswidth */
+ N_("Intel Standard Command Set"),
+ N_("supported: 28Fxxxx, 2 x 16 bit"),
+ intel_flash_autodetect32,
+ intel_flash_print_info32,
+ intel_flash_erase_block32,
+ intel_flash_unlock_block32,
+ intel_flash_program32,
+ intel_flash_readarray32,
+};
+
+urj_flash_driver_t urj_flash_intel_16_flash_driver = {
+ 2, /* buswidth */
+ N_("Intel Standard Command Set"),
+ N_("supported: 28Fxxxx, 1 x 16 bit"),
+ intel_flash_autodetect,
+ intel_flash_print_info,
+ intel_flash_erase_block,
+ intel_flash_unlock_block,
+ intel_flash_program,
+ intel_flash_readarray,
+};
+
+urj_flash_driver_t urj_flash_intel_8_flash_driver = {
+ 1, /* buswidth */
+ N_("Intel Standard Command Set"),
+ N_("supported: 28Fxxxx, 1 x 8 bit"),
+ intel_flash_autodetect8,
+ intel_flash_print_info,
+ intel_flash_erase_block,
+ intel_flash_unlock_block,
+ intel_flash_program,
+ intel_flash_readarray,
+};
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2002 ETC s.r.o.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the ETC s.r.o. nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2002.
+ *
+ * Documentation:
+ * [1] Intel Corporation, "3 Volt Intel Strata Flash Memory 28F128J3A, 28F640J3A,
+ * 28F320J3A (x8/x16)", April 2002, Order Number: 290667-011
+ * [2] Intel Corporation, "3 Volt Synchronous Intel Strata Flash Memory 28F640K3, 28F640K18,
+ * 28F128K3, 28F128K18, 28F256K3, 28F256K18 (x16)", June 2002, Order Number: 290737-005
+ *
+ */
+
+#ifndef FLASH_INTEL_H
+#define FLASH_INTEL_H
+
+#include <urjtag/bitmask.h>
+#include <urjtag/flash.h>
+
+/* Intel CFI commands - see Table 4. in [1] and Table 3. in [2] */
+
+#define CFI_INTEL_CMD_READ_ARRAY 0xFF /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */
+#define CFI_INTEL_CMD_READ_IDENTIFIER 0x90 /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */
+#define CFI_INTEL_CMD_READ_QUERY 0x98 /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */
+#define CFI_INTEL_CMD_READ_STATUS_REGISTER 0x70 /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */
+#define CFI_INTEL_CMD_CLEAR_STATUS_REGISTER 0x50 /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */
+#define CFI_INTEL_CMD_PROGRAM1 0x40 /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */
+#define CFI_INTEL_CMD_PROGRAM2 0x10 /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */
+#define CFI_INTEL_CMD_WRITE_TO_BUFFER 0xE8 /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */
+#define CFI_INTEL_CMD_CONFIRM 0xD0 /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */
+#define CFI_INTEL_CMD_BLOCK_ERASE 0x20 /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */
+#define CFI_INTEL_CMD_SUSPEND 0xB0 /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */
+#define CFI_INTEL_CMD_RESUME 0xD0 /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */
+#define CFI_INTEL_CMD_WRITE_CONFIRM 0xD0 /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */
+#define CFI_INTEL_CMD_LOCK_SETUP 0x60 /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */
+#define CFI_INTEL_CMD_LOCK_BLOCK 0x01 /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */
+#define CFI_INTEL_CMD_UNLOCK_BLOCK 0xD0 /* 28FxxxJ3A - unlocks all blocks, 28FFxxxK3, 28FxxxK18 */
+#define CFI_INTEL_CMD_LOCK_DOWN_BLOCK 0x2F /* 28FxxxK3, 28FxxxK18 */
+
+/* Intel CFI Status Register bits - see Table 6. in [1] and Table 7. in [2] */
+
+#define CFI_INTEL_SR_READY URJ_BIT (7) /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */
+#define CFI_INTEL_SR_ERASE_SUSPEND URJ_BIT (6) /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */
+#define CFI_INTEL_SR_ERASE_ERROR URJ_BIT (5) /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */
+#define CFI_INTEL_SR_PROGRAM_ERROR URJ_BIT (4) /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */
+#define CFI_INTEL_SR_VPEN_ERROR URJ_BIT (3) /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */
+#define CFI_INTEL_SR_PROGRAM_SUSPEND URJ_BIT (2) /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */
+#define CFI_INTEL_SR_BLOCK_LOCKED URJ_BIT (1) /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */
+#define CFI_INTEL_SR_BEFP URJ_BIT (0) /* 28FxxxK3, 28FxxxK18 */
+
+/* Intel flash device ID codes for 28FxxxJ3A - see Table 5. in [1] */
+
+#define CFI_CHIP_INTEL_28F320J3A 0x0016
+#define CFI_CHIPN_INTEL_28F320J3A "28F320J3A"
+#define CFI_CHIP_INTEL_28F640J3A 0x0017
+#define CFI_CHIPN_INTEL_28F640J3A "28F640J3A"
+#define CFI_CHIP_INTEL_28F128J3A 0x0018
+#define CFI_CHIPN_INTEL_28F128J3A "28F128J3A"
+
+/* Intel flash device ID codes for 28FxxxK3 and 28FxxxK18 - see Table 8. in [2] */
+
+#define CFI_CHIP_INTEL_28F640K3 0x8801
+#define CFI_CHIPN_INTEL_28F640K3 "28F640K3"
+#define CFI_CHIP_INTEL_28F128K3 0x8802
+#define CFI_CHIPN_INTEL_28F128K3 "28F128K3"
+#define CFI_CHIP_INTEL_28F256K3 0x8803
+#define CFI_CHIPN_INTEL_28F256K3 "28F256K3"
+#define CFI_CHIP_INTEL_28F640K18 0x8805
+#define CFI_CHIPN_INTEL_28F640K18 "28F640K18"
+#define CFI_CHIP_INTEL_28F128K18 0x8806
+#define CFI_CHIPN_INTEL_28F128K18 "28F128K18"
+#define CFI_CHIP_INTEL_28F256K18 0x8807
+#define CFI_CHIPN_INTEL_28F256K18 "28F256K18"
+
+extern urj_flash_driver_t urj_flash_intel_32_flash_driver;
+extern urj_flash_driver_t urj_flash_intel_16_flash_driver;
+extern urj_flash_driver_t urj_flash_intel_8_flash_driver;
+
+#endif /* FLASH_INTEL_H */
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2003 Matan Ziv-Av
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Matan Ziv-Av, 2003.
+ *
+ */
+
+#include <stdint.h>
+#include <stdlib.h>
+#include <string.h>
+#include <stdio.h>
+#include <unistd.h>
+
+#include <urjtag/log.h>
+#include <urjtag/error.h>
+#include <urjtag/flash.h>
+#include <urjtag/bus.h>
+
+#include "flash.h"
+
+#include "cfi.h"
+#include "intel.h"
+#include "jedec.h"
+
+/* Manufacturers */
+#define MANUFACTURER_AMD 0x0001
+#define MANUFACTURER_ATMEL 0x001F
+#define MANUFACTURER_FUJITSU 0x0004
+#define MANUFACTURER_ST 0x0020
+#define MANUFACTURER_SST 0x00BF
+#define MANUFACTURER_TOSHIBA 0x0098
+#define MANUFACTURER_MX 0x00C2
+
+/* AMD */
+#define AM29F800BB 0x2258
+#define AM29F800BT 0x22D6
+#define AM29LV800BB 0x225B
+#define AM29LV800BT 0x22DA
+#define AM29LV160DT 0x22C4
+#define AM29LV160DB 0x2249
+#define AM29BDS323D 0x22D1
+#define AM29BDS643D 0x227E
+#define AM29LV040B 0x004F
+
+/* Atmel */
+#define AT49xV16x 0x00C0
+#define AT49xV16xT 0x00C2
+
+/* Fujitsu */
+#define MBM29LV160TE 0x22C4
+#define MBM29LV160BE 0x2249
+#define MBM29LV800BB 0x225B
+
+/* ST - www.st.com */
+#define M29W800T 0x00D7
+#define M29W800B 0x005B
+#define M29W160DT 0x22C4
+#define M29W160DB 0x2249
+
+/* SST */
+#define SST39LF800 0x2781
+#define SST39LF160 0x2782
+
+/* Toshiba */
+#define TC58FVT160 0x00C2
+#define TC58FVB160 0x0043
+
+/* MX */
+#define MX29LV400T 0x22B9
+#define MX29LV400B 0x22BA
+
+struct mtd_erase_region_info
+{
+ uint32_t offset; /* At which this region starts, from the beginning of the MTD */
+ uint32_t erasesize; /* For this region */
+ uint32_t numblocks; /* Number of blocks of erasesize in this region */
+};
+
+struct amd_flash_info
+{
+ const int mfr_id;
+ const int dev_id;
+ const char *name;
+ const long size;
+ const uint8_t interface_width;
+ const int numeraseregions;
+ const struct mtd_erase_region_info regions[4];
+};
+
+static const struct amd_flash_info table[] = {
+ {
+ .mfr_id = MANUFACTURER_AMD,
+ .dev_id = AM29LV160DT,
+ .name = "AMD AM29LV160DT",
+ .size = 0x00200000,
+ .interface_width = CFI_INTERFACE_X8_X16,
+ .numeraseregions = 4,
+ .regions = {
+ { .offset = 0x000000, .erasesize = 0x10000, .numblocks = 31 },
+ { .offset = 0x1F0000, .erasesize = 0x08000, .numblocks = 1 },
+ { .offset = 0x1F8000, .erasesize = 0x02000, .numblocks = 2 },
+ { .offset = 0x1FC000, .erasesize = 0x04000, .numblocks = 1 }
+ }
+ }, {
+ .mfr_id = MANUFACTURER_AMD,
+ .dev_id = AM29LV160DB,
+ .name = "AMD AM29LV160DB",
+ .size = 0x00200000,
+ .interface_width = CFI_INTERFACE_X8_X16,
+ .numeraseregions = 4,
+ .regions = {
+ { .offset = 0x000000, .erasesize = 0x04000, .numblocks = 1 },
+ { .offset = 0x004000, .erasesize = 0x02000, .numblocks = 2 },
+ { .offset = 0x008000, .erasesize = 0x08000, .numblocks = 1 },
+ { .offset = 0x010000, .erasesize = 0x10000, .numblocks = 31 }
+ }
+ }, {
+ .mfr_id = MANUFACTURER_TOSHIBA,
+ .dev_id = TC58FVT160,
+ .name = "Toshiba TC58FVT160",
+ .size = 0x00200000,
+ .interface_width = CFI_INTERFACE_X8_X16,
+ .numeraseregions = 4,
+ .regions = {
+ { .offset = 0x000000, .erasesize = 0x10000, .numblocks = 31 },
+ { .offset = 0x1F0000, .erasesize = 0x08000, .numblocks = 1 },
+ { .offset = 0x1F8000, .erasesize = 0x02000, .numblocks = 2 },
+ { .offset = 0x1FC000, .erasesize = 0x04000, .numblocks = 1 }
+ }
+ }, {
+ .mfr_id = MANUFACTURER_FUJITSU,
+ .dev_id = MBM29LV160TE,
+ .name = "Fujitsu MBM29LV160TE",
+ .size = 0x00200000,
+ .interface_width = CFI_INTERFACE_X8_X16,
+ .numeraseregions = 4,
+ .regions = {
+ { .offset = 0x000000, .erasesize = 0x10000, .numblocks = 31 },
+ { .offset = 0x1F0000, .erasesize = 0x08000, .numblocks = 1 },
+ { .offset = 0x1F8000, .erasesize = 0x02000, .numblocks = 2 },
+ { .offset = 0x1FC000, .erasesize = 0x04000, .numblocks = 1 }
+ }
+ }, {
+ .mfr_id = MANUFACTURER_TOSHIBA,
+ .dev_id = TC58FVB160,
+ .name = "Toshiba TC58FVB160",
+ .size = 0x00200000,
+ .interface_width = CFI_INTERFACE_X8_X16,
+ .numeraseregions = 4,
+ .regions = {
+ { .offset = 0x000000, .erasesize = 0x04000, .numblocks = 1 },
+ { .offset = 0x004000, .erasesize = 0x02000, .numblocks = 2 },
+ { .offset = 0x008000, .erasesize = 0x08000, .numblocks = 1 },
+ { .offset = 0x010000, .erasesize = 0x10000, .numblocks = 31 }
+ }
+ }, {
+ .mfr_id = MANUFACTURER_FUJITSU,
+ .dev_id = MBM29LV160BE,
+ .name = "Fujitsu MBM29LV160BE",
+ .size = 0x00200000,
+ .interface_width = CFI_INTERFACE_X8_X16,
+ .numeraseregions = 4,
+ .regions = {
+ { .offset = 0x000000, .erasesize = 0x04000, .numblocks = 1 },
+ { .offset = 0x004000, .erasesize = 0x02000, .numblocks = 2 },
+ { .offset = 0x008000, .erasesize = 0x08000, .numblocks = 1 },
+ { .offset = 0x010000, .erasesize = 0x10000, .numblocks = 31 }
+ }
+ }, {
+ .mfr_id = MANUFACTURER_AMD,
+ .dev_id = AM29LV800BB,
+ .name = "AMD AM29LV800BB",
+ .size = 0x00100000,
+ .interface_width = CFI_INTERFACE_X8_X16,
+ .numeraseregions = 4,
+ .regions = {
+ { .offset = 0x000000, .erasesize = 0x04000, .numblocks = 1 },
+ { .offset = 0x004000, .erasesize = 0x02000, .numblocks = 2 },
+ { .offset = 0x008000, .erasesize = 0x08000, .numblocks = 1 },
+ { .offset = 0x010000, .erasesize = 0x10000, .numblocks = 15 }
+ }
+ }, {
+ .mfr_id = MANUFACTURER_AMD,
+ .dev_id = AM29F800BB,
+ .name = "AMD AM29F800BB",
+ .size = 0x00100000,
+ .interface_width = CFI_INTERFACE_X8_X16,
+ .numeraseregions = 4,
+ .regions = {
+ { .offset = 0x000000, .erasesize = 0x04000, .numblocks = 1 },
+ { .offset = 0x004000, .erasesize = 0x02000, .numblocks = 2 },
+ { .offset = 0x008000, .erasesize = 0x08000, .numblocks = 1 },
+ { .offset = 0x010000, .erasesize = 0x10000, .numblocks = 15 }
+ }
+ }, {
+ .mfr_id = MANUFACTURER_AMD,
+ .dev_id = AM29LV800BT,
+ .name = "AMD AM29LV800BT",
+ .size = 0x00100000,
+ .interface_width = CFI_INTERFACE_X8_X16,
+ .numeraseregions = 4,
+ .regions = {
+ { .offset = 0x000000, .erasesize = 0x10000, .numblocks = 15 },
+ { .offset = 0x0F0000, .erasesize = 0x08000, .numblocks = 1 },
+ { .offset = 0x0F8000, .erasesize = 0x02000, .numblocks = 2 },
+ { .offset = 0x0FC000, .erasesize = 0x04000, .numblocks = 1 }
+ }
+ }, {
+ .mfr_id = MANUFACTURER_AMD,
+ .dev_id = AM29F800BT,
+ .name = "AMD AM29F800BT",
+ .size = 0x00100000,
+ .interface_width = CFI_INTERFACE_X8_X16,
+ .numeraseregions = 4,
+ .regions = {
+ { .offset = 0x000000, .erasesize = 0x10000, .numblocks = 15 },
+ { .offset = 0x0F0000, .erasesize = 0x08000, .numblocks = 1 },
+ { .offset = 0x0F8000, .erasesize = 0x02000, .numblocks = 2 },
+ { .offset = 0x0FC000, .erasesize = 0x04000, .numblocks = 1 }
+ }
+ }, {
+ .mfr_id = MANUFACTURER_FUJITSU,
+ .dev_id = MBM29LV800BB,
+ .name = "Fujitsu MBM29LV800BB",
+ .size = 0x00100000,
+ .interface_width = CFI_INTERFACE_X8_X16,
+ .numeraseregions = 4,
+ .regions = {
+ { .offset = 0x000000, .erasesize = 0x04000, .numblocks = 1 },
+ { .offset = 0x004000, .erasesize = 0x02000, .numblocks = 2 },
+ { .offset = 0x008000, .erasesize = 0x08000, .numblocks = 1 },
+ { .offset = 0x010000, .erasesize = 0x10000, .numblocks = 15 }
+ }
+ }, {
+ .mfr_id = MANUFACTURER_ST,
+ .dev_id = M29W800T,
+ .name = "ST M29W800T",
+ .size = 0x00100000,
+ .interface_width = CFI_INTERFACE_X8_X16,
+ .numeraseregions = 4,
+ .regions = {
+ { .offset = 0x000000, .erasesize = 0x10000, .numblocks = 15 },
+ { .offset = 0x0F0000, .erasesize = 0x08000, .numblocks = 1 },
+ { .offset = 0x0F8000, .erasesize = 0x02000, .numblocks = 2 },
+ { .offset = 0x0FC000, .erasesize = 0x04000, .numblocks = 1 }
+ }
+ }, {
+ .mfr_id = MANUFACTURER_ST,
+ .dev_id = M29W800B,
+ .name = "ST M29W800B",
+ .size = 0x00100000,
+ .interface_width = CFI_INTERFACE_X8_X16,
+ .numeraseregions = 4,
+ .regions = {
+ { .offset = 0x000000, .erasesize = 0x04000, .numblocks = 1 },
+ { .offset = 0x004000, .erasesize = 0x02000, .numblocks = 2 },
+ { .offset = 0x008000, .erasesize = 0x08000, .numblocks = 1 },
+ { .offset = 0x010000, .erasesize = 0x10000, .numblocks = 15 }
+ }
+ }, {
+ .mfr_id = MANUFACTURER_ST,
+ .dev_id = M29W160DT,
+ .name = "ST M29W160DT",
+ .size = 0x00200000,
+ .interface_width = CFI_INTERFACE_X8_X16,
+ .numeraseregions = 4,
+ .regions = {
+ { .offset = 0x000000, .erasesize = 0x10000, .numblocks = 31 },
+ { .offset = 0x1F0000, .erasesize = 0x08000, .numblocks = 1 },
+ { .offset = 0x1F8000, .erasesize = 0x02000, .numblocks = 2 },
+ { .offset = 0x1FC000, .erasesize = 0x04000, .numblocks = 1 }
+ }
+ }, {
+ .mfr_id = MANUFACTURER_ST,
+ .dev_id = M29W160DB,
+ .name = "ST M29W160DB",
+ .size = 0x00200000,
+ .interface_width = CFI_INTERFACE_X8_X16,
+ .numeraseregions = 4,
+ .regions = {
+ { .offset = 0x000000, .erasesize = 0x04000, .numblocks = 1 },
+ { .offset = 0x004000, .erasesize = 0x02000, .numblocks = 2 },
+ { .offset = 0x008000, .erasesize = 0x08000, .numblocks = 1 },
+ { .offset = 0x010000, .erasesize = 0x10000, .numblocks = 31 }
+ }
+ }, {
+ .mfr_id = MANUFACTURER_AMD,
+ .dev_id = AM29BDS323D,
+ .name = "AMD AM29BDS323D",
+ .size = 0x00400000,
+ .interface_width = CFI_INTERFACE_X16,
+ .numeraseregions = 3,
+ .regions = {
+ { .offset = 0x000000, .erasesize = 0x10000, .numblocks = 48 },
+ { .offset = 0x300000, .erasesize = 0x10000, .numblocks = 15 },
+ { .offset = 0x3f0000, .erasesize = 0x02000, .numblocks = 8 },
+ }
+ }, {
+ .mfr_id = MANUFACTURER_AMD,
+ .dev_id = AM29BDS643D,
+ .name = "AMD AM29BDS643D",
+ .size = 0x00800000,
+ .interface_width = CFI_INTERFACE_X16,
+ .numeraseregions = 3,
+ .regions = {
+ { .offset = 0x000000, .erasesize = 0x10000, .numblocks = 96 },
+ { .offset = 0x600000, .erasesize = 0x10000, .numblocks = 31 },
+ { .offset = 0x7f0000, .erasesize = 0x02000, .numblocks = 8 },
+ }
+ }, {
+ .mfr_id = MANUFACTURER_ATMEL,
+ .dev_id = AT49xV16x,
+ .name = "Atmel AT49xV16x",
+ .size = 0x00200000,
+ .interface_width = CFI_INTERFACE_X8_X16,
+ .numeraseregions = 2,
+ .regions = {
+ { .offset = 0x000000, .erasesize = 0x02000, .numblocks = 8 },
+ { .offset = 0x010000, .erasesize = 0x10000, .numblocks = 31 }
+ }
+ }, {
+ .mfr_id = MANUFACTURER_ATMEL,
+ .dev_id = AT49xV16xT,
+ .name = "Atmel AT49xV16xT",
+ .size = 0x00200000,
+ .interface_width = CFI_INTERFACE_X8_X16,
+ .numeraseregions = 2,
+ .regions = {
+ { .offset = 0x000000, .erasesize = 0x10000, .numblocks = 31 },
+ { .offset = 0x1F0000, .erasesize = 0x02000, .numblocks = 8 }
+ }
+ }, {
+ .mfr_id = MANUFACTURER_MX,
+ .dev_id = MX29LV400T,
+ .name = "MX 29LV400T",
+ .size = 0x0080000,
+ .interface_width = CFI_INTERFACE_X8_X16,
+ .numeraseregions = 4,
+ .regions = {
+ { .offset = 0x000000, .erasesize = 0x10000, .numblocks = 7 },
+ { .offset = 0x070000, .erasesize = 0x08000, .numblocks = 1 },
+ { .offset = 0x078000, .erasesize = 0x02000, .numblocks = 2 },
+ { .offset = 0x07c000, .erasesize = 0x04000, .numblocks = 1 },
+ }
+ }, {
+ .mfr_id = MANUFACTURER_MX,
+ .dev_id = MX29LV400B,
+ .name = "MX 29LV400B",
+ .size = 0x0080000,
+ .interface_width = CFI_INTERFACE_X8_X16,
+ .numeraseregions = 4,
+ .regions = {
+ { .offset = 0x010000, .erasesize = 0x10000, .numblocks = 7 },
+ { .offset = 0x008000, .erasesize = 0x08000, .numblocks = 1 },
+ { .offset = 0x004000, .erasesize = 0x02000, .numblocks = 2 },
+ { .offset = 0x000000, .erasesize = 0x04000, .numblocks = 1 },
+ }
+ }, {
+ .mfr_id = MANUFACTURER_AMD,
+ .dev_id = AM29LV040B,
+ .name = "AMD AM29LV040B",
+ .size = 0x0080000,
+ .interface_width = CFI_INTERFACE_X8,
+ .numeraseregions = 1,
+ .regions = {
+ { .offset = 0x000000, .erasesize = 0x10000, .numblocks = 8 },
+ }
+ }
+};
+
+int
+urj_flash_jedec_detect (urj_bus_t *bus, uint32_t adr,
+ urj_flash_cfi_array_t **cfi_array)
+{
+ int manid = 0, devid = 0;
+ int ba, bw;
+ int dev_idx, j;
+ urj_flash_cfi_query_structure_t *cfi;
+ urj_bus_area_t area;
+
+ *cfi_array = calloc (1, sizeof (urj_flash_cfi_array_t));
+ if (!*cfi_array)
+ {
+ urj_error_set (URJ_ERROR_OUT_OF_MEMORY, "calloc(%zd,%zd) fails",
+ (size_t) 1, sizeof (urj_flash_cfi_array_t));
+ return URJ_STATUS_FAIL;
+ }
+
+ (*cfi_array)->bus = bus;
+ (*cfi_array)->address = adr;
+ if (URJ_BUS_AREA (bus, adr, &area) != URJ_STATUS_OK)
+ // retain error state
+ return URJ_STATUS_FAIL;
+ bw = area.width;
+ if (bw != 8 && bw != 16 && bw != 32)
+ {
+ urj_error_set (URJ_ERROR_INVALID, "bus width %d", bw);
+ return URJ_STATUS_FAIL;
+ }
+ (*cfi_array)->bus_width = ba = bw / 8;
+
+ (*cfi_array)->cfi_chips = calloc (1, sizeof (urj_flash_cfi_chip_t *) * ba);
+ if (!(*cfi_array)->cfi_chips)
+ {
+ urj_error_set (URJ_ERROR_OUT_OF_MEMORY, "calloc(%zd,%zd) fails",
+ (size_t) 1, sizeof (urj_flash_cfi_chip_t *) * ba);
+ return URJ_STATUS_FAIL;
+ }
+
+ (*cfi_array)->cfi_chips[0] = calloc (1, sizeof (urj_flash_cfi_chip_t));
+ if (!(*cfi_array)->cfi_chips[0])
+ {
+ urj_error_set (URJ_ERROR_OUT_OF_MEMORY, "calloc(%zd,%zd) fails",
+ (size_t) 1, sizeof (urj_flash_cfi_chip_t));
+ return URJ_STATUS_FAIL;
+ }
+
+
+ /* device index to table, -1 means no match found */
+ dev_idx = -1;
+
+
+ /* probe device with Autoselect applicable for
+ - x16 devices on 16 bit bus
+ - x8_x16 devices in x8 mode on 8 bit bus
+ - x8_x16 devices in x16 mode on 16 bit bus
+ also refer to the discussion of amd_flash_address_shift() in amd.c */
+ if (dev_idx < 0 && (bw == 8 || bw == 16))
+ {
+ /* compare mask for manufacturer and device id */
+ int id_mask = (1 << bw) - 1;
+
+ URJ_BUS_WRITE (bus, adr, 0xf0);
+ URJ_BUS_WRITE (bus, adr + 0xaaa, 0xaa);
+ URJ_BUS_WRITE (bus, adr + 0x555, 0x55);
+ URJ_BUS_WRITE (bus, adr + 0xaaa, 0x90);
+
+ manid = URJ_BUS_READ (bus, adr + 0);
+ devid = URJ_BUS_READ (bus, adr + (1 << 1));
+ URJ_BUS_WRITE (bus, adr, 0xf0);
+
+ for (dev_idx = sizeof (table) / sizeof (struct amd_flash_info) - 1;
+ dev_idx >= 0; dev_idx--)
+ {
+ if (table[dev_idx].interface_width == CFI_INTERFACE_X16 ||
+ table[dev_idx].interface_width == CFI_INTERFACE_X8_X16)
+ {
+ /* strip down ids to current bus width */
+ manid &= id_mask;
+ devid &= id_mask;
+ if (manid == (table[dev_idx].mfr_id & id_mask) &&
+ devid == (table[dev_idx].dev_id & id_mask))
+ /* manufacturer and device id matched */
+ break;
+ }
+ }
+ }
+
+
+ /* probe device with Autoselect applicable for
+ - x8 devices on 8 bit bus */
+ if (dev_idx < 0 && bw == 8)
+ {
+ URJ_BUS_WRITE (bus, adr, 0xf0);
+ URJ_BUS_WRITE (bus, adr + 0x555, 0xaa);
+ URJ_BUS_WRITE (bus, adr + 0x2aa, 0x55);
+ URJ_BUS_WRITE (bus, adr + 0x555, 0x90);
+
+ manid = URJ_BUS_READ (bus, adr + 0);
+ devid = URJ_BUS_READ (bus, adr + 1);
+ URJ_BUS_WRITE (bus, adr, 0xf0);
+
+ for (dev_idx = sizeof (table) / sizeof (struct amd_flash_info) - 1;
+ dev_idx >= 0; dev_idx--)
+ {
+ if (table[dev_idx].interface_width == CFI_INTERFACE_X8)
+ {
+ if (manid == table[dev_idx].mfr_id && devid == table[dev_idx].dev_id)
+ /* manufacturer and device id matched */
+ break;
+ }
+ }
+ }
+
+
+ urj_log (URJ_LOG_LEVEL_NORMAL, "dev ID=%04x man ID=%04x\n", devid, manid);
+
+ if (dev_idx < 0)
+ {
+ urj_error_set (URJ_ERROR_NOTFOUND, "amd_flash_info table");
+ return URJ_STATUS_FAIL;
+ }
+
+ cfi = &(*cfi_array)->cfi_chips[0]->cfi;
+
+ cfi->identification_string.pri_id_code = CFI_VENDOR_AMD_SCS;
+ cfi->identification_string.pri_vendor_tbl = NULL;
+ cfi->identification_string.alt_id_code = 0;
+ cfi->identification_string.alt_vendor_tbl = NULL;
+
+ cfi->device_geometry.device_size = table[dev_idx].size;
+ /* annotate chip width */
+ cfi->device_geometry.device_interface = table[dev_idx].interface_width;
+ switch (table[dev_idx].interface_width)
+ {
+ case CFI_INTERFACE_X8:
+ (*cfi_array)->cfi_chips[0]->width = 1;
+ break;
+ case CFI_INTERFACE_X16:
+ (*cfi_array)->cfi_chips[0]->width = 2;
+ break;
+ case CFI_INTERFACE_X8_X16:
+ (*cfi_array)->cfi_chips[0]->width = ba;
+ break;
+ case CFI_INTERFACE_X32:
+ (*cfi_array)->cfi_chips[0]->width = 4;
+ break;
+ case CFI_INTERFACE_X16_X32:
+ (*cfi_array)->cfi_chips[0]->width = ba;
+ break;
+ default:
+ /* unsupported interface geometry */
+ (*cfi_array)->cfi_chips[0]->width = 1;
+ cfi->device_geometry.device_interface = CFI_INTERFACE_X8;
+ urj_error_set (URJ_ERROR_UNSUPPORTED,
+ "interface geometry %d", table[dev_idx].interface_width);
+ return URJ_STATUS_FAIL;
+ }
+
+ cfi->device_geometry.number_of_erase_regions = table[dev_idx].numeraseregions;
+
+ cfi->device_geometry.erase_block_regions =
+ malloc (cfi->device_geometry.number_of_erase_regions *
+ sizeof (urj_flash_cfi_erase_block_region_t));
+ if (!cfi->device_geometry.erase_block_regions)
+ {
+ urj_error_set (URJ_ERROR_OUT_OF_MEMORY, "malloc(%zd) fails",
+ cfi->device_geometry.number_of_erase_regions
+ * sizeof (urj_flash_cfi_erase_block_region_t));
+ return URJ_STATUS_FAIL;
+ }
+
+ for (j = 0; j < cfi->device_geometry.number_of_erase_regions; j++)
+ {
+ cfi->device_geometry.erase_block_regions[j].erase_block_size =
+ table[dev_idx].regions[j].erasesize;
+ cfi->device_geometry.erase_block_regions[j].number_of_erase_blocks =
+ table[dev_idx].regions[j].numblocks;
+ }
+
+ urj_log (URJ_LOG_LEVEL_NORMAL,
+ "Found %s flash, size = %li bytes.\n", table[dev_idx].name,
+ table[dev_idx].size);
+
+ return URJ_STATUS_OK;
+}
--- /dev/null
+/*
+ * $Id: jedec.h 1510 2009-04-21 17:29:52Z rfhh $
+ *
+ * Copyright (C) 2003 Matan Ziv-Av
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Matan Ziv-Av, 2003.
+ *
+ */
+
+#ifndef URJ_FLASH_JEDEC_H
+#define URJ_FLASH_JEDEC_H
+
+#include <urjtag/types.h>
+#include <urjtag/flash.h>
+
+int urj_flash_jedec_detect (urj_bus_t *bus, uint32_t adr,
+ urj_flash_cfi_array_t **urj_flash_cfi_array);
+#ifdef JEDEC_EXP
+int urj_flash_jedec_exp_detect (urj_bus_t *bus, uint32_t adr,
+ urj_flash_cfi_array_t **urj_flash_cfi_array);
+#endif
+
+#endif /* ndef URJ_FLASH_JEDEC_H */
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2008 Kolja Waschk
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Kolja Waschk, 2008,
+ * partially based on snippets from jedec.c/amd_flash.c/cfi.c
+ */
+
+#include <stdint.h>
+#include <stdlib.h>
+#include <string.h>
+#include <stdio.h>
+#include <unistd.h>
+
+#include <urjtag/error.h>
+#include <urjtag/log.h>
+#include <urjtag/flash.h>
+#include <urjtag/bus.h>
+#include <urjtag/bitmask.h>
+
+#include "flash.h"
+
+#include "jedec.h"
+#include "cfi.h"
+#include "intel.h"
+
+void
+urj_flash_jedec_exp_read_id (urj_bus_t *bus, uint32_t adr, uint32_t dmask,
+ uint32_t pata, uint32_t patb, uint32_t dcmd,
+ int det_addroffset, int det_dataoffset,
+ uint32_t det_addrpat)
+{
+ int locofs;
+
+ det_addrpat <<= det_addroffset;
+ urj_log (URJ_LOG_LEVEL_NORMAL,
+ " trying with address pattern base %08x:", det_addrpat);
+ URJ_BUS_WRITE (bus, adr + det_addrpat, pata);
+ URJ_BUS_WRITE (bus, adr + (det_addrpat >> 1), patb);
+ URJ_BUS_WRITE (bus, adr + det_addrpat, dcmd);
+
+ for (locofs = 0; locofs <= 2; locofs++)
+ {
+ urj_log (URJ_LOG_LEVEL_NORMAL, " %08x",
+ (dmask & URJ_BUS_READ (bus, adr + (locofs << det_addroffset)))
+ >> det_dataoffset);
+ }
+
+ urj_log (URJ_LOG_LEVEL_NORMAL, "\n");
+}
+
+int
+urj_flash_jedec_exp_detect (urj_bus_t *bus, uint32_t adr,
+ urj_flash_cfi_array_t **cfi_array)
+{
+ /* Temporary containers for manufacturer and device id while
+ probing with different Autoselect methods. */
+ int ba, bw;
+ int det_buswidth;
+ urj_bus_area_t area;
+
+ *cfi_array = calloc (1, sizeof (urj_flash_cfi_array_t));
+ if (!*cfi_array)
+ {
+ urj_error_set (URJ_ERROR_OUT_OF_MEMORY, "calloc(%zd,%zd) fails",
+ 1, sizeof (urj_flash_cfi_array_t));
+ return URJ_STATUS_FAIL;
+ }
+
+ (*cfi_array)->bus = bus;
+ (*cfi_array)->address = adr;
+ if (URJ_BUS_AREA (bus, adr, &area) != URJ_STATUS_OK)
+ // retain error state
+ return URJ_STATUS_FAIL;
+ bw = area.width;
+
+ if (bw == 0)
+ bw = 32; // autodetection!
+
+ if (bw != 8 && bw != 16 && bw != 32)
+ {
+ urj_error_set (URJ_ERROR_INVALID, "bus width %d", bw);
+ return URJ_STATUS_FAIL;
+ }
+ (*cfi_array)->bus_width = ba = bw / 8;
+
+ (*cfi_array)->cfi_chips = calloc (1, sizeof (urj_flash_cfi_chip_t *));
+ if (!(*cfi_array)->cfi_chips)
+ {
+ urj_error_set (URJ_ERROR_OUT_OF_MEMORY, "calloc(%zd,%zd) fails",
+ 1, sizeof (urj_flash_cfi_chip_t *));
+ return URJ_STATUS_FAIL;
+ }
+
+ (*cfi_array)->cfi_chips[0] = calloc (1, sizeof (urj_flash_cfi_chip_t));
+ if (!(*cfi_array)->cfi_chips[0])
+ {
+ urj_error_set (URJ_ERROR_OUT_OF_MEMORY, "calloc(%zd,%zd) fails",
+ 1, sizeof (urj_flash_cfi_chip_t));
+ return URJ_STATUS_FAIL;
+ }
+
+ urj_log (URJ_LOG_LEVEL_NORMAL,
+ "=== experimental extensive JEDEC brute-force autodetection ===\n");
+ for (det_buswidth = bw; det_buswidth >= 8; det_buswidth >>= 1)
+ {
+ int det_datawidth;
+ urj_log (URJ_LOG_LEVEL_NORMAL, "- trying with cpu buswidth %d\n",
+ det_buswidth);
+ for (det_datawidth = det_buswidth; det_datawidth >= 8;
+ det_datawidth >>= 1)
+ {
+ int det_dataoffset;
+ urj_log (URJ_LOG_LEVEL_NORMAL,
+ "-- trying with flash datawidth %d\n", det_datawidth);
+ for (det_dataoffset = 0;
+ det_dataoffset + det_datawidth <= det_buswidth;
+ det_dataoffset += 8)
+ {
+ int det_addroffset;
+ uint32_t dmask = URJ_BITS (det_dataoffset,
+ det_datawidth + det_dataoffset -
+ 1);
+ uint32_t pata = ~dmask | (0xAA << det_dataoffset);
+ uint32_t patb = ~dmask | (0x55 << det_dataoffset);
+ uint32_t dcmd = ~dmask | (0x90 << det_dataoffset);
+
+ urj_log (URJ_LOG_LEVEL_NORMAL,
+ "--- trying with flash dataoffset %d", det_dataoffset);
+ urj_log (URJ_LOG_LEVEL_NORMAL, " (using %08X, %08X and %08X)\n",
+ pata, patb, dcmd);
+
+ for (det_addroffset = 0; det_addroffset <= 2;
+ det_addroffset++)
+ {
+ urj_flash_jedec_exp_read_id (bus, adr, dmask, pata, patb,
+ dcmd, det_addroffset,
+ det_dataoffset, 0x5555);
+ urj_flash_jedec_exp_read_id (bus, adr, dmask, pata, patb,
+ dcmd, det_addroffset,
+ det_dataoffset, 0x0555);
+ }
+ }
+ }
+ }
+ urj_log (URJ_LOG_LEVEL_NORMAL,
+ "=== end of experimental extensive JEDEC brute-force autodetection ===\n");
+
+ return URJ_STATUS_OK;
+}
--- /dev/null
+/*
+ * $Id$
+ *
+ * Manufacturer's Identification Code declarations
+ * Copyright (C) 2002 ETC s.r.o.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the ETC s.r.o. nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2002.
+ *
+ * Documentation:
+ * [1] JEDEC Solid State Technology Association, "Standard Manufacturer's
+ * Identification Code", May 2003, Order Number: JEP106M
+ *
+ */
+
+#ifndef STD_MIC_H
+#define STD_MIC_H
+
+/* Manufacturer's Identification Code - see Table 1 in [1] */
+
+#define STD_MIC_AMD 0x01
+#define STD_MICN_AMD "AMD"
+#define STD_MIC_AMI 0x02
+#define STD_MICN_AMI "AMI"
+#define STD_MIC_FAIRCHILD 0x83
+#define STD_MICN_FAIRCHILD "Fairchild"
+#define STD_MIC_FUJITSU 0x04
+#define STD_MICN_FUJITSU "Fujitsu"
+#define STD_MIC_GTE 0x85
+#define STD_MICN_GTE "GTE"
+#define STD_MIC_HARRIS 0x86
+#define STD_MICN_HARRIS "Harris"
+#define STD_MIC_HITACHI 0x07
+#define STD_MICN_HITACHI "Hitachi"
+#define STD_MIC_INMOS 0x08
+#define STD_MICN_INMOS "Inmos"
+#define STD_MIC_INTEL 0x89
+#define STD_MICN_INTEL "Intel"
+#define STD_MIC_ITT 0x8A
+#define STD_MICN_ITT "I.T.T."
+#define STD_MIC_INTERSIL 0x0B
+#define STD_MICN_INTERSIL "Intersil"
+#define STD_MIC_MONOLITHIC_MEMORIES 0x8C
+#define STD_MICN_MONOLITHIC_MEMORIES "Monolithic Memories"
+#define STD_MIC_MOSTEK 0x0D
+#define STD_MICN_MOSTEK "Mostek"
+#define STD_MIC_MOTOROLA 0x0E
+#define STD_MICN_MOTOROLA "Motorola"
+#define STD_MIC_NATIONAL 0x8F
+#define STD_MICN_NATIONAL "National"
+#define STD_MIC_NEC 0x10
+#define STD_MICN_NEC "NEC"
+#define STD_MIC_RCA 0x91
+#define STC_MICN_RCA "RCA"
+#define STD_MIC_RAYTHEON 0x92
+#define STD_MICN_RAYTHEON "Raytheon"
+#define STD_MIC_CONEXANT 0x13
+#define STD_MICN_CONEXANT "Conexant (Rockwell)"
+#define STD_MIC_SEEQ 0x94
+#define STD_MICN_SEEQ "Seeq"
+#define STD_MIC_PHILIPS 0x15
+#define STD_MICN_PHILIPS "Philips Semi. (Signetics)"
+#define STD_MIC_SYNERTEK 0x16
+#define STD_MICN_SYNERTEK "Synertek"
+#define STD_MIC_TEXAS_INSTRUMENTS 0x97
+#define STD_MICN_TEXAS_INSTRUMENTS "Texas Instruments"
+#define STD_MIC_TOSHIBA 0x98
+#define STD_MICN_TOSHIBA "Toshiba"
+#define STD_MIC_XICOR 0x19
+#define STD_MICN_XICOR "Xicor"
+#define STD_MIC_ZILOG 0x1A
+#define STD_MICN_ZILOG "Zilog"
+#define STD_MIC_EUROTECHNIQUE 0x9B
+#define STD_MICN_EUROTECHNIQUE "Eurotechnique"
+#define STD_MIC_MITSUBISHI 0x1C
+#define STD_MICN_MITSUBISHI "Mitsubishi"
+#define STD_MIC_LUCENT 0x9D
+#define STD_MICN_LUCENT "Lucent (AT&T)"
+#define STD_MIC_EXEL 0x9E
+#define STD_MICN_EXEL "Exel"
+#define STD_MIC_ATMEL 0x1F
+#define STD_MICN_ATMEL "Atmel"
+#define STD_MIC_SGS_THOMSON 0x20
+#define STD_MICN_SGS_THOMSON "SGS/Thomson"
+#define STD_MIC_LATTICE 0xA1
+#define STD_MICN_LATTICE "Lattice Semi."
+#define STD_MIC_NCR 0xA2
+#define STD_MICN_NCR "NCR"
+#define STD_MIC_WAFER_SCALE_INTEGRATION 0x23
+#define STD_MICN_WAFER_SCALE_INTEGRATION "Wafer Scale Integration"
+#define STD_MIC_IBM 0xA4
+#define STD_MICN_IBM "IBM"
+#define STD_MIC_TRISTAR 0x25
+#define STD_MICN_TRISTAR "Tristar"
+#define STD_MIC_VISIC 0x26
+#define STD_MICN_VISIC "Visic"
+#define STD_MIC_INTL_CMOS_TECHNOLOGY 0xA7
+#define STD_MICN_INTL_CMOS_TECHNOLOGY "Intl. CMOS Technology"
+#define STD_MIC_SSSI 0xA8
+#define STD_MICN_SSSI "SSSI"
+#define STD_MIC_MICROCHIP_TECHNOLOGY 0x29
+#define STD_MICN_MICROCHIP_TECHNOLOGY "MicrochipTechnology"
+#define STD_MIC_RICOH 0x2A
+#define STD_MICN_RICOH "Ricoh Ltd."
+#define STD_MIC_VLSI 0xAB
+#define STD_MICN_VLSI "VLSI"
+#define STD_MIC_MICRON_TECHNOLOGY 0x2C
+#define STD_MICN_MICRON_TECHNOLOGY "Micron Technology"
+#define STD_MIC_HYUNDAI_ELECTRONICS 0xAD
+#define STD_MICN_HYUNDAI_ELECTRONICS "Hyundai Electronics"
+#define STD_MIC_OKI_SEMICONDUCTOR 0xAE
+#define STD_MICN_OKI_SEMICONDUCTOR "OKI Semiconductor"
+#define STD_MIC_ACTEL 0x2F
+#define STD_MICN_ACTEL "ACTEL"
+#define STD_MIC_SHARP 0xB0
+#define STD_MICN_SHARP "Sharp"
+#define STD_MIC_CATALYST 0x31
+#define STD_MICN_CATALYST "Catalyst"
+#define STD_MIC_PANASONIC 0x32
+#define STD_MICN_PANASONIC "Panasonic"
+#define STD_MIC_IDT 0xB3
+#define STD_MICN_IDT "IDT"
+#define STD_MIC_CYPRESS 0x34
+#define STD_MICN_CYPRESS "Cypress"
+#define STD_MIC_DEC 0xB5
+#define STD_MICN_DEC "DEC"
+#define STD_MIC_LSI_LOGIC 0xB6
+#define STD_MICN_LSI_LOGIC "LSI Logic"
+#define STD_MIC_ZARLINK 0x37
+#define STD_MICN_ZARLINK "Zarlink (formerly Plessey)"
+#define STD_MIC_UTMC 0x38
+#define STD_MICN_UTMC "UTMC"
+#define STD_MIC_THINKING_MACHINE 0xB9
+#define STD_MICN_THINKING_MACHINE "Thinking Machine"
+#define STD_MIC_THOMSON_CSF 0xBA
+#define STD_MICN_THOMSON_CSF "Thomson CSF"
+#define STD_MIC_INTEGRATED_CMOS 0x3B
+#define STD_MICN_INTEGRATED_CMOS "Integrated CMOS(Vertex)"
+#define STD_MIC_HONEYWELL 0xBC
+#define STD_MICN_HONEYWELL "Honeywell"
+#define STD_MIC_TEKTRONIX 0x3D
+#define STD_MICN_TEKTRONIX "Tektronix"
+#define STD_MIC_SUN_MICROSYSTEMS 0x3E
+#define STD_MICN_SUN_MICROSYSTEMS "Sun Microsystems"
+#define STD_MIC_SST 0xBF
+#define STD_MICN_SST "SST"
+#define STD_MIC_MOSEL 0x40
+#define STD_MICN_MOSEL "MOSEL"
+#define STD_MIC_INFINEON 0xC1
+#define STD_MICN_INFINEON "Infineon (formerly Siemens)"
+#define STD_MIC_MACRONIX 0xC2
+#define STD_MICN_MACRONIX "Macronix"
+#define STD_MIC_XEROX 0x43
+#define STD_MICN_XEROX "Xerox"
+#define STD_MIC_PLUS_LOGIC 0xC4
+#define STD_MICN_PLUS_LOGIC "Plus Logic"
+#define STD_MIC_SUNDISK 0x45
+#define STD_MICN_SUNDISK "SunDisk"
+#define STD_MIC_ELAN_CIRCUIT 0x46
+#define STD_MICN_ELAN_CIRCUIT "Elan Circuit Tech."
+/* TODO */
+
+#endif /* STD_MIC_H */
--- /dev/null
+.deps
+.libs
+Makefile
+Makefile.in
--- /dev/null
+#
+# $Id: Makefile.am 1531 2009-04-24 15:28:59Z rfhh $
+#
+# Copyright (C) 2003 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Marcel Telka <marcel@telka.sk>, 2003.
+#
+
+include $(top_srcdir)/Makefile.rules
+
+noinst_LTLIBRARIES = libglobal.la
+
+libglobal_la_SOURCES = \
+ parse.c \
+ log-error.c \
+ data_dir.c \
+ params.c
+
+AM_CPPFLAGS = -DJTAG_BIN_DIR=\"$(bindir)\" -DJTAG_DATA_DIR=\"$(pkgdatadir)\"
+
+AM_CFLAGS = $(WARNINGCFLAGS)
--- /dev/null
+/*
+ * Copyright 2008 Mike Frysinger
+ * Copyright 2008 Analog Devices Inc.
+ *
+ * Licensed under the GPL-2 or later.
+ */
+
+#include <config.h>
+#include <urjtag/jtag.h>
+
+static const char *jtag_argv0;
+
+void
+urj_set_argv0(const char *argv0)
+{
+ jtag_argv0 = argv0;
+}
+
+#ifdef JTAG_RELOCATABLE
+
+#include <stdlib.h>
+#include <string.h>
+
+extern char *make_relative_prefix (const char *progname,
+ const char *bin_prefix,
+ const char *prefix);
+
+static char *jtag_data_dir = NULL;
+
+const char *
+urj_get_data_dir (void)
+{
+ if (jtag_data_dir)
+ return jtag_data_dir;
+
+ jtag_data_dir =
+ make_relative_prefix (jtag_argv0, JTAG_BIN_DIR, JTAG_DATA_DIR);
+ if (!jtag_data_dir)
+ jtag_data_dir = JTAG_DATA_DIR;
+
+ return jtag_data_dir;
+}
+
+#else
+
+const char *
+urj_get_data_dir (void)
+{
+ return JTAG_DATA_DIR;
+}
+
+#endif
--- /dev/null
+/*
+ * $Id: urjtag.c 1539 2009-05-01 12:02:08Z rfhh $
+ *
+ * Copyright (C) 2009 Rutger Hofman, VU Amsterdam
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Rutger Hofman
+ */
+
+#include <sysdep.h>
+
+#include <stdarg.h>
+#include <errno.h>
+#include <string.h>
+
+#include <urjtag/log.h>
+#include <urjtag/error.h>
+#include <urjtag/jtag.h>
+
+urj_error_state_t urj_error_state;
+int urj_big_endian = 0;
+
+static int stderr_vprintf (const char *fmt, va_list ap);
+static int stdout_vprintf (const char *fmt, va_list ap);
+
+urj_log_state_t urj_log_state =
+ {
+ .level = URJ_LOG_LEVEL_NORMAL,
+ .out_vprintf = stdout_vprintf,
+ .err_vprintf = stderr_vprintf,
+ };
+
+static int
+stderr_vprintf(const char *fmt, va_list ap)
+{
+ return vfprintf (stderr, fmt, ap);
+}
+
+static int
+stdout_vprintf(const char *fmt, va_list ap)
+{
+ int r = vfprintf (stdout, fmt, ap);
+
+ fflush (stdout);
+
+ return r;
+}
+
+int
+urj_do_log (urj_log_level_t level, const char *fmt, ...)
+{
+ va_list ap;
+ int r;
+
+ if (level < urj_log_state.level)
+ return 0;
+
+ va_start (ap, fmt);
+ if (level < URJ_LOG_LEVEL_WARNING)
+ r = urj_log_state.out_vprintf (fmt, ap);
+ else
+ r = urj_log_state.err_vprintf (fmt, ap);
+ va_end (ap);
+
+ return r;
+}
+
+urj_error_t
+urj_error_get (void)
+{
+ return urj_error_state.errnum;
+}
+
+void
+urj_error_reset (void)
+{
+ urj_error_state.errnum = URJ_ERROR_OK;
+}
+
+const char *
+urj_error_string (urj_error_t err)
+{
+ switch (err)
+ {
+ case URJ_ERROR_OK: return "no error";
+ case URJ_ERROR_ALREADY: return "already defined";
+ case URJ_ERROR_OUT_OF_MEMORY: return "out of memory";
+ case URJ_ERROR_NO_CHAIN: return "no chain";
+ case URJ_ERROR_NO_PART: return "no part";
+ case URJ_ERROR_NO_ACTIVE_INSTRUCTION: return "no active instruction";
+ case URJ_ERROR_NO_DATA_REGISTER: return "no data register";
+ case URJ_ERROR_INVALID: return "invalid parameter";
+ case URJ_ERROR_NOTFOUND: return "not found";
+ case URJ_ERROR_NO_BUS_DRIVER: return "no bus driver";
+ case URJ_ERROR_BUFFER_EXHAUSTED: return "buffer exhausted";
+ case URJ_ERROR_ILLEGAL_STATE: return "illegal state";
+ case URJ_ERROR_ILLEGAL_TRANSITION: return "illegal state transition";
+ case URJ_ERROR_OUT_OF_BOUNDS: return "out of bounds";
+ case URJ_ERROR_TIMEOUT: return "timeout";
+ case URJ_ERROR_UNSUPPORTED: return "unsupported";
+ case URJ_ERROR_SYNTAX: return "syntax";
+ case URJ_ERROR_FILEIO: return "file I/O";
+
+ case URJ_ERROR_IO: return "I/O error from OS";
+ case URJ_ERROR_FTD: return "ftdi/ftd2xx error";
+ case URJ_ERROR_USB: return "libusb error";
+
+ case URJ_ERROR_BUS: return "bus";
+ case URJ_ERROR_BUS_DMA: return "bus DMA";
+
+ case URJ_ERROR_FLASH: return "flash";
+ case URJ_ERROR_FLASH_DETECT: return "flash detect";
+ case URJ_ERROR_FLASH_PROGRAM: return "flash program";
+ case URJ_ERROR_FLASH_ERASE: return "flash erase";
+ case URJ_ERROR_FLASH_UNLOCK: return "flash unlock";
+
+ case URJ_ERROR_BSDL_VHDL: return "vhdl subsystem";
+ case URJ_ERROR_BSDL_BSDL: return "bsdl subsystem";
+
+ case URJ_ERROR_UNIMPLEMENTED: return "unimplemented";
+ }
+
+ return "UNDEFINED ERROR";
+}
+
+const char *
+urj_error_describe (void)
+{
+ static char msg[URJ_ERROR_MSG_LEN + 1024 + 256 + 20];
+
+ if (urj_error_state.errnum == URJ_ERROR_IO)
+ {
+ snprintf (msg, sizeof msg, "%s:%d %s() %s: %s %s",
+ urj_error_state.file, urj_error_state.line,
+ urj_error_state.function,
+ "System error", strerror(urj_error_state.sys_errno),
+ urj_error_state.msg);
+ }
+ else
+ {
+ snprintf (msg, sizeof msg, "%s:%d %s() %s: %s",
+ urj_error_state.file, urj_error_state.line,
+ urj_error_state.function,
+ urj_error_string (urj_error_state.errnum),
+ urj_error_state.msg);
+ }
+
+ return msg;
+}
--- /dev/null
+/*
+ * $Id: buses.c 1606 2009-05-19 15:06:20Z rfhh $
+ *
+ * Copyright (C) 2003 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2003.
+ *
+ */
+
+#include <sysdep.h>
+
+#include <stdlib.h>
+#include <string.h>
+
+#include <urjtag/error.h>
+#include <urjtag/params.h>
+
+static const char *
+urj_param_key_string(const urj_param_list_t *params, int key)
+{
+ int i;
+
+ for (i = 0; i < params->n; i++)
+ if (key == params->list[i].key)
+ return params->list[i].string;
+
+ return "<no such bus parameter key>";
+}
+
+static int
+urj_param_parse_key(const urj_param_list_t *params, const char *p)
+{
+ int i;
+ const char *eq;
+
+ eq = strchr(p, '=');
+ if (eq == NULL)
+ eq = p + strlen(p);
+
+ for (i = 0; i < params->n; i++)
+ if (strncasecmp(params->list[i].string, p, eq - p) == 0)
+ return params->list[i].key;
+
+ urj_error_set (URJ_ERROR_SYNTAX, "unrecognized param key '%s'", p);
+ return -1;
+}
+
+static urj_param_type_t
+urj_param_type_of(const urj_param_list_t *params, int key)
+{
+ int i;
+
+ for (i = 0; i < params->n; i++)
+ if (params->list[i].key == key)
+ return params->list[i].type;
+
+ urj_error_set (URJ_ERROR_INVALID, "unknown key %d", key);
+ return -1;
+}
+
+static urj_param_t *
+urj_param_increase (const urj_param_t ***bp)
+{
+ size_t n;
+ const urj_param_t **scan;
+ urj_param_t *new_p;
+
+ scan = *bp;
+ for (n = 0; scan[n] != NULL; n++)
+ {
+ // count
+ }
+
+ scan = realloc (*bp, (n + 2) * sizeof *scan);
+ if (scan == NULL)
+ {
+ urj_error_set (URJ_ERROR_OUT_OF_MEMORY, "realloc(%s,%zd) fails",
+ "*bp", (n + 2) * sizeof *scan);
+ return NULL;
+ }
+
+ *bp = scan;
+
+ new_p = malloc (sizeof *new_p);
+ if (new_p == NULL)
+ {
+ urj_error_set (URJ_ERROR_OUT_OF_MEMORY, "malloc(%zd) fails",
+ sizeof *new_p);
+ return NULL;
+ }
+
+ (*bp)[n] = new_p;
+ (*bp)[n + 1] = NULL;
+
+ return new_p;
+}
+
+static int
+urj_param_decrease (const urj_param_t ***bp)
+{
+ size_t n;
+ const urj_param_t **scan;
+
+ scan = *bp;
+ for (n = 0; scan[n] != NULL; n++)
+ {
+ // count
+ }
+
+ if (n > 0)
+ {
+ --n;
+ free ((void *) (*bp)[n]); // Yes, I know why I cast
+ (*bp)[n] = NULL;
+ }
+
+ return URJ_STATUS_OK;
+}
+
+int
+urj_param_push_string (const urj_param_t ***bp, int key, const char *val)
+{
+ urj_param_t *new_p = urj_param_increase (bp);
+
+ if (new_p == NULL)
+ return URJ_STATUS_FAIL;
+
+ new_p->type = URJ_PARAM_TYPE_STRING;
+ new_p->key = key;
+ new_p->value.string = val;
+
+ return URJ_STATUS_OK;
+}
+
+int
+urj_param_push_lu (const urj_param_t ***bp, int key, long unsigned val)
+{
+ urj_param_t *new_p = urj_param_increase (bp);
+
+ if (new_p == NULL)
+ return URJ_STATUS_FAIL;
+
+ new_p->type = URJ_PARAM_TYPE_LU;
+ new_p->key = key;
+ new_p->value.lu = val;
+
+ return URJ_STATUS_OK;
+}
+
+int
+urj_param_push_bool (const urj_param_t ***bp, int key, int val)
+{
+ urj_param_t *new_p = urj_param_increase (bp);
+
+ if (new_p == NULL)
+ return URJ_STATUS_FAIL;
+
+ new_p->type = URJ_PARAM_TYPE_BOOL;
+ new_p->key = key;
+ new_p->value.enabled = val;
+
+ return URJ_STATUS_OK;
+}
+
+static int
+parse_param_lu(const char *eq, long unsigned *lu)
+{
+ if (sscanf(eq + 1, "%lu", lu) == 1)
+ return URJ_STATUS_OK;
+
+ urj_error_set (URJ_ERROR_SYNTAX, "need unsigned int, not '%s'", eq + 1);
+ return URJ_STATUS_FAIL;
+}
+
+static const char *
+parse_param_string(const char *eq)
+{
+ return eq + 1;
+}
+
+static int
+parse_param_bool(const char *eq, int *enabled)
+{
+ if (eq == NULL)
+ {
+ *enabled = 1;
+ return URJ_STATUS_OK;
+ }
+
+ if (sscanf(eq, "%d", enabled) == 1 && (*enabled == 0 || *enabled == 1))
+ return URJ_STATUS_OK;
+
+ urj_error_set (URJ_ERROR_SYNTAX, "need unsigned int, not '%s'", eq + 1);
+ return URJ_STATUS_FAIL;
+}
+
+int
+urj_param_push (const urj_param_list_t *params, const urj_param_t ***bp,
+ const char *p)
+{
+ int key;
+ urj_param_t *new_p;
+ int r = URJ_STATUS_OK;
+ const char *eq;
+ urj_param_type_t type;
+
+ key = urj_param_parse_key(params, p);
+ if (key == -1)
+ return URJ_STATUS_FAIL;
+
+ type = urj_param_type_of(params, key);
+ if (type == -1)
+ return URJ_STATUS_FAIL;
+
+ eq = strchr(p, '=');
+ if (type != URJ_PARAM_TYPE_BOOL && eq == NULL)
+ {
+ urj_error_set (URJ_ERROR_SYNTAX,
+ "param should be of the form 'key=value', not '%s'", p);
+ return URJ_STATUS_FAIL;
+ }
+
+ new_p = urj_param_increase (bp);
+ if (new_p == NULL)
+ return URJ_STATUS_FAIL;
+
+ new_p->type = type;
+ new_p->key = key;
+ switch (new_p->type)
+ {
+ case URJ_PARAM_TYPE_LU:
+ r = parse_param_lu(eq, &new_p->value.lu);
+ break;
+ case URJ_PARAM_TYPE_STRING:
+ new_p->value.string = parse_param_string(eq);
+ if (new_p->value.string == NULL)
+ r = URJ_STATUS_FAIL;
+ break;
+ case URJ_PARAM_TYPE_BOOL:
+ r = parse_param_bool(eq, &new_p->value.enabled);
+ break;
+ }
+
+ if (r == URJ_STATUS_FAIL)
+ urj_param_decrease (bp);
+
+ return r;
+}
+
+const char *
+urj_param_string(const urj_param_list_t *params, const urj_param_t *p)
+{
+#define PARAM_BUF_SIZE 256
+ static char buf[PARAM_BUF_SIZE];
+ size_t size;
+
+ snprintf(buf, sizeof buf, "%s=", urj_param_key_string(params, p->key));
+ size = strlen(buf);
+
+ switch (p->type)
+ {
+ case URJ_PARAM_TYPE_LU:
+ snprintf(buf + size, sizeof buf - size, "%lu", p->value.lu);
+ break;
+ case URJ_PARAM_TYPE_STRING:
+ snprintf(buf + size, sizeof buf - size, "%s", p->value.string);
+ break;
+ case URJ_PARAM_TYPE_BOOL:
+ snprintf(buf + size, sizeof buf - size, "%s",
+ p->value.enabled ? "on" : "off");
+ break;
+ default:
+ return "urj_param_string(): <unimplemented>";
+ }
+
+ return buf;
+}
+
+int
+urj_param_init (const urj_param_t ***bp)
+{
+ *bp = calloc (1, sizeof **bp);
+ if (*bp == NULL)
+ {
+ urj_error_set (URJ_ERROR_OUT_OF_MEMORY, "calloc(%zd,%zd) fails",
+ (size_t) 1, sizeof **bp);
+ return URJ_STATUS_FAIL;
+ }
+
+ *bp[0] = NULL;
+
+ return URJ_STATUS_OK;
+}
+
+int
+urj_param_clear (const urj_param_t ***bp)
+{
+ const urj_param_t **scan;
+
+ for (scan = *bp; *scan != NULL; scan++)
+ free ((void *) *scan);
+
+ free (*bp);
+
+ return URJ_STATUS_OK;
+}
+
+size_t
+urj_param_num (const urj_param_t *p[])
+{
+ size_t n;
+
+ if (p == NULL)
+ return 0;
+
+ for (n = 0; p[n] != NULL; n++)
+ {
+ /* advance n */
+ }
+
+ return n;
+}
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2002, 2003 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2002, 2003.
+ * Modified by Ajith Kumar P.C <ajithpc@kila.com>, 20/09/2006.
+ * Modified by Ville Voipio <vv@iki.fi>, 7-May-2008
+ *
+ */
+
+#include <sysdep.h>
+
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+#include <ctype.h>
+#include <errno.h>
+
+#include <urjtag/log.h>
+#include <urjtag/error.h>
+#include <urjtag/chain.h>
+#include <urjtag/parse.h>
+#include <urjtag/cmd.h>
+#include <urjtag/jtag.h>
+#include <urjtag/bsdl.h>
+
+#define MAXINPUTLINE 100 /* Maximum input line length */
+
+
+
+int
+urj_parse_line (urj_chain_t *chain, char *line)
+{
+ int l, i, r, tcnt;
+ char **a;
+ char *c, *d;
+ char *sline;
+
+ if (line == NULL)
+ {
+ urj_error_set (URJ_ERROR_INVALID, "NULL line");
+ return URJ_STATUS_FAIL;
+ }
+ l = strlen (line);
+ if (l == 0)
+ return URJ_STATUS_OK;
+
+ /* allocate as many chars as in the input line; this will be enough in all cases */
+ sline = malloc (l + 1);
+ if (sline == NULL)
+ {
+ urj_error_set (URJ_ERROR_OUT_OF_MEMORY, "malloc(%zd) fails",
+ (size_t) (l + 1));
+ return URJ_STATUS_FAIL;
+ }
+
+ /* count and copy the tokens */
+ c = line;
+ d = sline;
+ tcnt = 0;
+ while (1)
+ {
+ /* eat up leading spaces */
+ while (isspace (*c))
+ c++;
+
+ /* if the command ends here (either by NUL or comment) */
+ if (*c == '\0' || *c == '#')
+ break;
+
+ /* copy the meat (non-space, non-NUL) */
+ while (!isspace (*c) && *c != '\0')
+ {
+ *d++ = *c++;
+ }
+ /* mark the end to the destination string */
+ *d++ = '\0';
+ tcnt++;
+ }
+
+ if (tcnt == 0)
+ {
+ free (sline);
+ return URJ_STATUS_OK;
+ }
+
+ /* allocate the token pointer table */
+ a = malloc ((tcnt + 1) * sizeof (char *));
+ if (a == NULL)
+ {
+ urj_error_set (URJ_ERROR_OUT_OF_MEMORY, "malloc(%zd) fails",
+ (size_t) ((tcnt + 1) * sizeof (char *)));
+ return URJ_STATUS_FAIL;
+ }
+
+ /* find the starting points for the tokens */
+ d = sline;
+ for (i = 0; i < tcnt; i++)
+ {
+ a[i] = d;
+ while (*d++ != '\0')
+ ;
+ }
+ a[tcnt] = NULL;
+
+ r = urj_cmd_run (chain, a);
+ urj_log (URJ_LOG_LEVEL_DEBUG, "Return in urj_parse_line r=%d\n", r);
+ free (a);
+ free (sline);
+
+ return r;
+}
+
+
+int
+urj_parse_stream (urj_log_level_t ll, urj_chain_t *chain, FILE *f)
+{
+ char inputline[MAXINPUTLINE + 1];
+ int go = 1, i, c, lnr, clip, found_comment;
+
+ /* read the stream line-by-line until EOF or "quit" */
+ lnr = 0;
+ do
+ {
+ i = 0;
+ clip = 0;
+ found_comment = 0;
+
+ /* read stream until '\n' or EOF, copy at most MAXINPUTLINE-1 chars */
+ while (1)
+ {
+ c = fgetc (f);
+ if (c == EOF || c == '\n')
+ break;
+ if (c == '#')
+ found_comment = 1;
+ if (i < sizeof (inputline) - 1)
+ inputline[i++] = c;
+ else
+ clip = 1;
+ }
+ inputline[i] = '\0';
+ lnr++;
+ if (clip && !found_comment)
+ urj_warning ("line %d exceeds %zd characters, clipped\n", lnr,
+ sizeof (inputline) - 1);
+ go = urj_parse_line (chain, inputline);
+ if (go == URJ_STATUS_FAIL)
+ {
+ urj_log (ll, "Error: %s; command '%s'\n", urj_error_describe(), inputline);
+ urj_error_reset ();
+ }
+ urj_tap_chain_flush (chain);
+ }
+ while (go != URJ_STATUS_MUST_QUIT && c != EOF);
+
+ return go;
+}
+
+int
+urj_parse_file (urj_log_level_t ll, urj_chain_t *chain, const char *filename)
+{
+ FILE *f;
+ int go;
+
+ f = fopen (filename, "r");
+ if (!f)
+ {
+ urj_error_IO_set ("Cannot open file '%s' to parse", filename);
+ return URJ_STATUS_FAIL;
+ }
+
+ go = urj_parse_stream (ll, chain, f);
+
+ fclose (f);
+ urj_log (URJ_LOG_LEVEL_DEBUG, "File Closed go=%d\n", go);
+
+ return go;
+}
+
+int
+urj_parse_include (urj_chain_t *chain, const char *filename, int ignore_path)
+{
+ char *path = NULL;
+ int r = URJ_STATUS_OK;
+
+ if (! ignore_path)
+ {
+ /* If "filename" begins with a slash, or dots followed by a slash,
+ * assume that user wants to ignore the search path after all */
+ const char *slashdots = filename;
+
+#ifdef __MINGW32__
+ if (isalpha (*slashdots) && slashdots[1] == ':')
+ slashdots += 2;
+#endif
+ while (*slashdots == '.')
+ slashdots++;
+ ignore_path = (*slashdots == '/' || *slashdots == '\\');
+ }
+
+ if (! ignore_path)
+ {
+ const char *jtag_data_dir = urj_get_data_dir ();
+ size_t len;
+
+ path = malloc (len = strlen (jtag_data_dir) + strlen (filename) + 2);
+ if (path == NULL)
+ {
+ urj_error_set (URJ_ERROR_OUT_OF_MEMORY, "malloc(%zd) fails", len);
+ return URJ_STATUS_FAIL;
+ }
+ snprintf (path, len, "%s/%s", jtag_data_dir, filename);
+
+ filename = path;
+ }
+
+#ifdef ENABLE_BSDL
+ /* perform a test read to check for BSDL syntax */
+ if (urj_bsdl_read_file (chain, filename, URJ_BSDL_MODE_INCLUDE1, NULL) >= 0)
+ {
+ // @@@@ RFHH ToDo: let urj_bsdl_read_file also return URJ_STATUS_...
+ /* it seems to be a proper BSDL file, so re-read and execute */
+ if (urj_bsdl_read_file (chain, filename, URJ_BSDL_MODE_INCLUDE2,
+ NULL) < 0)
+ // retain errno
+ r = URJ_STATUS_FAIL;
+ }
+ else
+#endif
+ {
+ r = urj_parse_file (URJ_LOG_LEVEL_NORMAL, chain, filename);
+ }
+
+ free (path);
+
+ return r;
+}
+
--- /dev/null
+#
+# $Id: Makefile.am $
+#
+# Copyright (C) 2008 Kolja Waschk <kawk>
+#
+# Permission is hereby granted, free of charge, to any person obtaining a copy
+# of this software and associated documentation files (the "Software"), to deal
+# in the Software without restriction, including without limitation the rights
+# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+# copies of the Software, and to permit persons to whom the Software is
+# furnished to do so, subject to the following conditions:
+#
+# The above copyright notice and this permission notice shall be included in
+# all copies or substantial portions of the Software.
+#
+# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+# AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+# OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+# THE SOFTWARE.
+
+include $(top_srcdir)/Makefile.rules
+
+noinst_LTLIBRARIES = libjim.la
+
+libjim_la_SOURCES = \
+ jim_tap.c \
+ some_cpu.c \
+ intel_28f800b3.c
+
+AM_CFLAGS = $(WARNINGCFLAGS)
--- /dev/null
+# This directory contains source code that simulates various aspects of
+# a target. It is mainly thought to assist in testing and debugging the rest of
+# UrJTAG. The connection between UrJTAG and the code here currently is by means
+# of a special "cable" named "jim", which can access a virtual chain of
+# devices. The only device yet is "some_cpu", which is automatically put in
+# the chain when you type "cable jim".
+
+cable jim
+bsdl path .
+detect
+initbus prototype amsb=A(31) alsb=A(0) dmsb=D(15) dlsb=D(0) cs=CS oe=OE we=WE amode=x16
+detectflash 0
+# eraseflash 0 1
+
--- /dev/null
+/*
+ * $Id: tap.c $
+ *
+ * Copyright (C) 2008 Kolja Waschk <kawk>
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This code simulates an Intel Advanced Boot Block Flash Memory (B3) 28FxxxB3.
+ * The simulation is based on documentation found in the corresponding datasheet,
+ * Order Number 290580, Revision: 020, 18 Aug 2005.
+ */
+
+#include <stdint.h>
+#include <stdlib.h>
+#include <stdio.h>
+#include <sys/time.h>
+#include <time.h>
+
+#include <urjtag/types.h>
+#include <urjtag/log.h>
+#include <urjtag/error.h>
+#include <urjtag/jim.h>
+
+typedef enum
+{
+ READ_ARRAY = 0,
+ READ_STATUS = 1,
+ READ_ID = 2,
+ PROG_SETUP = 3,
+ PROG_CONTINUE = 4,
+ PROG_SUSP_TO_READ_STATUS = 5,
+ PROG_SUSP_TO_READ_ARRAY = 6,
+ PROG_SUSP_TO_READ_ID = 7,
+ PROG_COMPLETE = 8,
+ ERASE_SETUP = 9,
+ ERASE_ERROR = 10,
+ ERASE_CONTINUE = 11,
+ ERASE_SUSP_TO_READ_STATUS = 12,
+ ERASE_SUSP_TO_READ_ARRAY = 13,
+ ERASE_SUSP_TO_READ_ID = 14,
+ ERASE_COMPLETE = 15
+}
+intel_f28xxxb3_op_state_t;
+
+static const char *intel_28fxxx_opstate_name[16] = {
+ "READ_ARRAY",
+ "READ_STATUS",
+ "READ_ID",
+ "PROG_SETUP",
+ "PROG_CONTINUE",
+ "PROG_SUSP_TO_READ_STATUS",
+ "PROG_SUSP_TO_READ_ARRAY",
+ "PROG_SUSP_TO_READ_ID",
+ "PROG_COMPLETE",
+ "ERASE_SETUP",
+ "ERASE_ERROR",
+ "ERASE_CONTINUE",
+ "ERASE_SUSP_TO_READ_STATUS",
+ "ERASE_SUSP_TO_READ_ARRAY",
+ "ERASE_SUSP_TO_READ_ID",
+ "ERASE_COMPLETE"
+};
+
+typedef enum
+{
+ TOP = 0,
+ BOTTOM = 1
+}
+b3_boot_type_t;
+
+#define I28F_WSM_READY 0x80
+#define I28F_ERASE_SUSPENDED 0x40
+#define I28F_ERASE_ERROR 0x20
+#define I28F_PROG_ERROR 0x10
+#define I28F_VPP_LOW 0x08
+#define I28F_PROG_SUSPENDED 0x04
+#define I28F_BLOCK_LOCKED 0x02
+#define I28F_RESERVED 0x01
+
+
+typedef struct
+{
+ uint16_t identifier;
+ uint32_t data_buffer;
+ uint32_t address_buffer;
+ uint32_t control_buffer;
+ uint8_t status, status_buffer;
+ intel_f28xxxb3_op_state_t opstate;
+ b3_boot_type_t boot_type;
+ struct timeval prog_start_time;
+}
+intel_f28xxxb3_state_t;
+
+static int
+urj_jim_intel_28fxxxb3_init (urj_jim_bus_device_t *d, uint16_t id,
+ b3_boot_type_t bt)
+{
+ d->state = malloc (sizeof (intel_f28xxxb3_state_t));
+ if (d->state == NULL)
+ {
+ urj_error_set (URJ_ERROR_OUT_OF_MEMORY, "malloc(%zd) fails",
+ sizeof (intel_f28xxxb3_state_t));
+ return URJ_STATUS_FAIL;
+ }
+
+ intel_f28xxxb3_state_t *is = d->state;
+ is->opstate = READ_ARRAY;
+ is->identifier = id;
+ is->boot_type = bt;
+ is->status = 0x00;
+ is->status_buffer = 0x00;
+ is->control_buffer = 0x00000000;
+
+ return URJ_STATUS_OK;
+}
+
+static int
+urj_jim_intel_28f800b3b_init (urj_jim_bus_device_t *d)
+{
+ return urj_jim_intel_28fxxxb3_init (d, 0x8893, BOTTOM);
+}
+
+static void
+urj_jim_intel_28fxxxb3_free (urj_jim_bus_device_t *d)
+{
+ if (d->state != NULL)
+ free (d->state);
+}
+
+static uint32_t
+urj_jim_intel_28fxxxb3_capture (urj_jim_bus_device_t *d,
+ uint32_t address, uint32_t control,
+ uint8_t *shmem, size_t shmem_size)
+{
+ uint32_t data = 0;
+
+ if ((control & 7) == 5) /* OE and CS: READ */
+ {
+ intel_f28xxxb3_state_t *is = d->state;
+
+ switch (is->opstate)
+ {
+ case READ_STATUS:
+ case PROG_CONTINUE:
+ case ERASE_CONTINUE:
+ case PROG_SUSP_TO_READ_STATUS:
+ case ERASE_SUSP_TO_READ_STATUS:
+ data = is->status_buffer;
+ break;
+
+ case READ_ID:
+ case PROG_SUSP_TO_READ_ID:
+ case ERASE_SUSP_TO_READ_ID:
+ if (address == 1)
+ data = is->identifier;
+ else if (address == 0)
+ data = 0x0089;
+ break;
+
+ case READ_ARRAY:
+ case PROG_SUSP_TO_READ_ARRAY:
+ case ERASE_SUSP_TO_READ_ARRAY:
+ data = shmem[(address << 1)] << 8;
+ data |= shmem[(address << 1)] + 1;
+ break;
+
+ default:
+ break;
+ }
+ urj_log (URJ_LOG_LEVEL_DETAIL,
+ "i28fxxxb3: read %04X from %08X (in %s)\n",
+ data & 0xFFFF, address,
+ intel_28fxxx_opstate_name[is->opstate]);
+ }
+
+ urj_log (URJ_LOG_LEVEL_COMM, "capture A=%08X, D=%08X%s%s%s\n",
+ address, data, (control & 1) ? ", OE" : "",
+ (control & 2) ? ", WE" : "", (control & 4) ? ", CS" : "");
+
+ return data;
+}
+
+static void
+urj_jim_intel_28fxxxb3_update (urj_jim_bus_device_t *d,
+ uint32_t address, uint32_t data,
+ uint32_t control, uint8_t *shmem,
+ size_t shmem_size)
+{
+ urj_log (URJ_LOG_LEVEL_COMM, "update A=%08X, D=%08X%s%s%s\n",
+ address, data, (control & 1) ? ", OE" : "",
+ (control & 2) ? ", WE" : "", (control & 4) ? ", CS" : "");
+
+ if (d->state != NULL)
+ {
+ intel_f28xxxb3_state_t *is = d->state;
+ if ((((is->control_buffer & 1) == 0) && ((control & 1) == 1)) /* OE rise */
+ || (((is->control_buffer & 4) == 0) && ((control & 4) == 1))) /* CS rise */
+ {
+ if (is->opstate == PROG_CONTINUE || is->opstate == ERASE_CONTINUE)
+ {
+ long dusecs;
+ struct timeval yet, diff;
+ gettimeofday (&yet, NULL);
+
+ diff.tv_sec = yet.tv_sec - is->prog_start_time.tv_sec;
+ if (yet.tv_usec >= is->prog_start_time.tv_usec)
+ {
+ diff.tv_usec = yet.tv_usec - is->prog_start_time.tv_usec;
+ }
+ else
+ {
+ diff.tv_usec =
+ yet.tv_usec + 1E6 - is->prog_start_time.tv_usec;
+ diff.tv_sec--;
+ }
+ dusecs = 1E6 * diff.tv_sec + diff.tv_usec;
+ if (is->opstate == PROG_CONTINUE)
+ {
+ if (dusecs > 40)
+ {
+ shmem[(is->address_buffer << 1)] &=
+ ((data >> 8) & 0xFF);
+ shmem[(is->address_buffer << 1) + 1] &= (data & 0xFF);
+ is->status |= I28F_WSM_READY;
+ }
+ }
+ else if (is->opstate == ERASE_CONTINUE)
+ {
+ if (dusecs > 600E3)
+ {
+ is->status |= I28F_WSM_READY;
+ }
+ }
+ }
+ is->status_buffer = is->status; /* latch status */
+ }
+
+ if (((control & 7) == 6) && ((is->control_buffer & 2) != 2)) /* WE rise, CS active: WRITE */
+ {
+ intel_f28xxxb3_state_t *is = d->state;
+ uint8_t dl = data & 0xFF;
+
+ urj_log (URJ_LOG_LEVEL_DETAIL,
+ "i28fxxxb3: write %04X to %08X (in %s)\n",
+ data & 0xFFFF, address,
+ intel_28fxxx_opstate_name[is->opstate]);
+
+ if (dl == 0x50)
+ {
+ is->status &=
+ ~(I28F_BLOCK_LOCKED | I28F_VPP_LOW | I28F_PROG_ERROR |
+ I28F_ERASE_ERROR);
+ }
+
+ switch (is->opstate)
+ {
+ case READ_STATUS:
+ case READ_ARRAY:
+ case READ_ID:
+ switch (dl)
+ {
+ case 0x10:
+ case 0x40:
+ is->opstate = PROG_SETUP;
+ break;
+ case 0x20:
+ is->opstate = ERASE_SETUP;
+ break;
+ case 0x70:
+ is->opstate = READ_STATUS;
+ break;
+ case 0x90:
+ is->opstate = READ_ID;
+ break;
+ default:
+ is->opstate = READ_ARRAY;
+ break;
+ }
+ break;
+
+ case PROG_SETUP:
+ if (dl != 0x10 && dl != 0x40)
+ {
+ is->status |= I28F_PROG_ERROR | I28F_ERASE_ERROR;
+ is->opstate = READ_STATUS;
+ }
+ else
+ {
+ is->status &= ~I28F_WSM_READY;
+ is->data_buffer = data;
+ is->address_buffer = address;
+ is->opstate = PROG_CONTINUE;
+ gettimeofday (&(is->prog_start_time), NULL);
+ }
+ break;
+
+ case PROG_CONTINUE:
+ if (dl == 0xB0)
+ {
+ is->opstate = PROG_SUSP_TO_READ_STATUS;
+ is->status |= I28F_PROG_SUSPENDED;
+ }
+ break;
+
+ case PROG_SUSP_TO_READ_STATUS:
+ case PROG_SUSP_TO_READ_ARRAY:
+ case PROG_SUSP_TO_READ_ID:
+ switch (dl)
+ {
+ case 0xD0:
+ is->status &= ~I28F_PROG_SUSPENDED;
+ is->opstate = PROG_CONTINUE;
+ break;
+ case 0x70:
+ is->opstate = PROG_SUSP_TO_READ_STATUS;
+ break;
+ case 0x90:
+ is->opstate = PROG_SUSP_TO_READ_ID;
+ break;
+ default:
+ is->opstate = PROG_SUSP_TO_READ_ARRAY;
+ break;
+ }
+ break;
+
+ case ERASE_SETUP:
+ if (dl != 0xD0)
+ {
+ is->status |= I28F_PROG_ERROR | I28F_ERASE_ERROR;
+ is->opstate = READ_STATUS;
+ }
+ else
+ {
+ is->status &= 0x7F;
+ is->data_buffer = data;
+ is->address_buffer = address;
+ is->opstate = ERASE_CONTINUE;
+ gettimeofday (&(is->prog_start_time), NULL);
+ }
+ break;
+
+ case ERASE_CONTINUE:
+ if (dl == 0xB0)
+ {
+ is->opstate = ERASE_SUSP_TO_READ_STATUS;
+ is->status |= I28F_ERASE_SUSPENDED;
+ }
+ break;
+
+ case ERASE_SUSP_TO_READ_STATUS:
+ case ERASE_SUSP_TO_READ_ARRAY:
+ case ERASE_SUSP_TO_READ_ID:
+ switch (dl)
+ {
+ case 0xD0:
+ is->status &= ~I28F_ERASE_SUSPENDED;
+ is->opstate = ERASE_CONTINUE;
+ break;
+ case 0x70:
+ is->opstate = ERASE_SUSP_TO_READ_STATUS;
+ break;
+ case 0x90:
+ is->opstate = ERASE_SUSP_TO_READ_ID;
+ break;
+ default:
+ is->opstate = ERASE_SUSP_TO_READ_ARRAY;
+ break;
+ }
+ break;
+
+ case PROG_COMPLETE:
+ case ERASE_ERROR:
+ case ERASE_COMPLETE:
+ switch (dl)
+ {
+ case 0x10:
+ case 0x40:
+ is->opstate = PROG_SETUP;
+ break;
+ case 0x20:
+ is->opstate = ERASE_SETUP;
+ break;
+ case 0x70:
+ is->opstate = READ_STATUS;
+ break;
+ case 0x90:
+ is->opstate = READ_ID;
+ break;
+ default:
+ is->opstate = READ_ARRAY;
+ break;
+ }
+ break;
+ }
+ }
+ is->control_buffer = control;
+ }
+}
+
+urj_jim_bus_device_t urj_jim_intel_28f800b3b = {
+ 2, /* width [bytes] */
+ 0x80000, /* size [words, each <width> bytes] */
+ NULL, /* state */
+ urj_jim_intel_28f800b3b_init, /* init() */
+ urj_jim_intel_28fxxxb3_capture, /* access() */
+ urj_jim_intel_28fxxxb3_update, /* access() */
+ urj_jim_intel_28fxxxb3_free /* free() */
+};
--- /dev/null
+/*
+ * $Id: tap.c $
+ *
+ * Copyright (C) 2008 Kolja Waschk <kawk>
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+#include <stdint.h>
+
+#include <urjtag/log.h>
+#include <urjtag/error.h>
+#include <urjtag/jim.h>
+
+static const urj_jim_tap_state_t next_tap_state[16][2] = {
+ /* URJ_JIM_RESET */ {URJ_JIM_IDLE, URJ_JIM_RESET},
+ /* URJ_JIM_SELECT_DR */ {URJ_JIM_CAPTURE_DR, URJ_JIM_SELECT_IR},
+ /* URJ_JIM_CAPTURE_DR */ {URJ_JIM_SHIFT_DR, URJ_JIM_EXIT1_DR},
+ /* URJ_JIM_SHIFT_DR */ {URJ_JIM_SHIFT_DR, URJ_JIM_EXIT1_DR},
+ /* URJ_JIM_EXIT1_DR */ {URJ_JIM_PAUSE_DR, URJ_JIM_UPDATE_DR},
+ /* URJ_JIM_PAUSE_DR */ {URJ_JIM_PAUSE_DR, URJ_JIM_EXIT2_DR},
+ /* URJ_JIM_EXIT2_DR */ {URJ_JIM_SHIFT_DR, URJ_JIM_UPDATE_DR},
+ /* URJ_JIM_UPDATE_DR */ {URJ_JIM_IDLE, URJ_JIM_SELECT_DR},
+ /* URJ_JIM_IDLE */ {URJ_JIM_IDLE, URJ_JIM_SELECT_DR},
+ /* URJ_JIM_SELECT_IR */ {URJ_JIM_CAPTURE_IR, URJ_JIM_RESET},
+ /* URJ_JIM_CAPTURE_IR */ {URJ_JIM_SHIFT_IR, URJ_JIM_EXIT1_IR},
+ /* URJ_JIM_SHIFT_IR */ {URJ_JIM_SHIFT_IR, URJ_JIM_EXIT1_IR},
+ /* URJ_JIM_EXIT1_IR */ {URJ_JIM_PAUSE_IR, URJ_JIM_UPDATE_IR},
+ /* URJ_JIM_PAUSE_IR */ {URJ_JIM_EXIT2_IR, URJ_JIM_EXIT2_IR},
+ /* URJ_JIM_EXIT2_IR */ {URJ_JIM_SHIFT_IR, URJ_JIM_UPDATE_IR},
+ /* URJ_JIM_UPDATE_IR */ {URJ_JIM_IDLE, URJ_JIM_SELECT_DR}
+};
+
+static void
+urj_jim_print_sreg (urj_log_level_t ll, urj_jim_shift_reg_t *r)
+{
+ int i;
+ for (i = (r->len + 31) / 32; i >= 0; i--)
+ urj_log (ll, " %08X", r->reg[i]);
+}
+
+static void
+urj_jim_print_tap_state (urj_log_level_t ll, char *rof, urj_jim_device_t *dev)
+{
+ urj_log (ll, " tck %s, state=", rof);
+ switch (dev->tap_state & 7)
+ {
+ case 0:
+ urj_log (ll, (dev->tap_state == URJ_JIM_RESET) ? "URJ_JIM_RESET"
+ : "URJ_JIM_IDLE");
+ break;
+ case 1:
+ urj_log (ll, "SELECT");
+ break;
+ case 2:
+ urj_log (ll, "CAPTURE");
+ break;
+ case 3:
+ urj_log (ll, "SHIFT");
+ break;
+ case 4:
+ urj_log (ll, "EXIT1");
+ break;
+ case 5:
+ urj_log (ll, "PAUSE");
+ break;
+ case 6:
+ urj_log (ll, "EXIT2");
+ break;
+ default:
+ urj_log (ll, "UPDATE");
+ break;
+ }
+ if (dev->tap_state & 7)
+ {
+ if (dev->tap_state & 8)
+ {
+ urj_log (ll, "_IR=");
+ urj_jim_print_sreg (ll, &dev->sreg[0]);
+ }
+ else
+ {
+ urj_log (ll, "_DR");
+ if (dev->current_dr != 0)
+ {
+ urj_log (ll, "(%d)=", dev->current_dr);
+ urj_jim_print_sreg (ll, &dev->sreg[dev->current_dr]);
+ }
+ }
+ }
+ urj_log (ll, "\n");
+}
+
+
+void
+urj_jim_set_trst (urj_jim_state_t *s, int trst)
+{
+ s->trst = trst;
+}
+
+int
+urj_jim_get_trst (urj_jim_state_t *s)
+{
+ return s->trst;
+}
+
+int
+urj_jim_get_tdo (urj_jim_state_t *s)
+{
+ if (s->last_device_in_chain == NULL)
+ return 0;
+ return s->last_device_in_chain->tdo;
+}
+
+void
+urj_jim_tck_rise (urj_jim_state_t *s, int tms, int tdi)
+{
+ urj_jim_device_t *dev;
+
+ for (dev = s->last_device_in_chain; dev; dev = dev->prev)
+ {
+ int dev_tdi;
+ int i, n;
+ urj_jim_shift_reg_t *sr;
+ uint32_t *reg;
+
+ urj_jim_print_tap_state (URJ_LOG_LEVEL_DETAIL, "rise", dev);
+
+ dev_tdi = (dev->prev != NULL) ? dev->prev->tdo : tdi;
+
+ if (dev->tck_rise != NULL)
+ dev->tck_rise (dev, tms, dev_tdi, s->shmem, s->shmem_size);
+
+ if (dev->tap_state & 8)
+ {
+ sr = &(dev->sreg[0]);
+ }
+ else
+ {
+ if (dev->current_dr == 0)
+ {
+ sr = NULL; /* BYPASS */
+ }
+ else
+ {
+ sr = &(dev->sreg[dev->current_dr]);
+ }
+ }
+
+ if (sr == NULL) /* BYPASS */
+ {
+ dev->tdo_buffer = dev_tdi;
+ }
+ else
+ {
+ reg = sr->reg;
+
+ if (dev->tap_state == URJ_JIM_SHIFT_IR
+ || dev->tap_state == URJ_JIM_SHIFT_DR)
+ {
+ /* Start with LSW of shift register at index 0 */
+
+ n = (sr->len - 1) / 32;
+ for (i = 0; i < (sr->len - 1) / 32; i++)
+ {
+ reg[i] >>= 1;
+ if (reg[i + 1] & 1)
+ reg[i] |= 0x80000000;
+ }
+
+ /* End with MSW at index i */
+
+ reg[i] >>= 1;
+ if (dev_tdi != 0)
+ {
+ n = (sr->len & 31);
+ if (n == 0)
+ n = 32;
+ reg[i] |= (1 << (n - 1));
+ }
+ }
+
+ dev->tdo_buffer = reg[0] & 1;
+ }
+
+ dev->tap_state = next_tap_state[dev->tap_state][tms];
+ }
+}
+
+void
+urj_jim_tck_fall (urj_jim_state_t *s)
+{
+ urj_jim_device_t *dev;
+
+ for (dev = s->last_device_in_chain; dev; dev = dev->prev)
+ {
+ dev->tdo = dev->tdo_buffer;
+
+ urj_jim_print_tap_state (URJ_LOG_LEVEL_DETAIL, "fall", dev);
+
+ if (dev->tck_fall != NULL)
+ dev->tck_fall (dev, s->shmem, s->shmem_size);
+ }
+}
+
+urj_jim_device_t *
+urj_jim_alloc_device (int num_sregs, const int reg_size[])
+{
+ int i, r;
+
+ urj_jim_device_t *dev = malloc (sizeof (urj_jim_device_t));
+ if (dev == NULL)
+ {
+ urj_error_set (URJ_ERROR_OUT_OF_MEMORY, "malloc(%zd) fails",
+ sizeof (urj_jim_device_t));
+ return NULL;
+ }
+
+ dev->sreg = malloc (num_sregs * sizeof (urj_jim_shift_reg_t));
+ if (dev->sreg == NULL)
+ {
+ free (dev);
+ urj_error_set (URJ_ERROR_OUT_OF_MEMORY, "malloc(%zd) fails",
+ sizeof (urj_jim_shift_reg_t));
+ return NULL;
+ }
+
+ for (r = 0, i = 0; i < num_sregs; i++)
+ {
+ dev->sreg[i].len = reg_size[i];
+ dev->sreg[i].reg = calloc (((reg_size[i] + 31) / 32),
+ sizeof (uint32_t));
+ if (dev->sreg[i].reg == NULL)
+ r++;
+ }
+
+ if (r > 0)
+ {
+ urj_error_set (URJ_ERROR_OUT_OF_MEMORY, "calloc() fails");
+ for (i = 0; i < num_sregs; i++)
+ if (dev->sreg[i].reg != NULL)
+ free (dev->sreg[i].reg);
+ free (dev->sreg);
+ free (dev);
+ return NULL;
+ }
+
+ dev->num_sregs = num_sregs;
+ dev->current_dr = 0;
+ dev->tck_rise = NULL;
+ dev->tck_fall = NULL;
+ dev->dev_free = NULL;
+ dev->tap_state = URJ_JIM_RESET;
+ dev->tdo = dev->tdo_buffer = 1;
+
+ return dev;
+}
+
+urj_jim_state_t *
+urj_jim_init (void)
+{
+ urj_jim_state_t *s;
+
+ s = malloc (sizeof (urj_jim_state_t));
+ if (s == NULL)
+ {
+ urj_error_set (URJ_ERROR_OUT_OF_MEMORY, "malloc(%zd) fails",
+ sizeof (urj_jim_state_t));
+ return NULL;
+ }
+
+ s->shmem_size = (1 << 20) * 16; /* 16 MByte */
+ s->shmem = malloc (s->shmem_size);
+
+ if (s->shmem != NULL)
+ {
+ memset (s->shmem, 0xFF, s->shmem_size);
+ urj_log (URJ_LOG_LEVEL_NORMAL,
+ "Allocated %zd bytes for device memory simulation.\n",
+ s->shmem_size);
+ }
+ else
+ {
+ free (s);
+ urj_error_set (URJ_ERROR_OUT_OF_MEMORY, "malloc(%zd) fails",
+ sizeof (s->shmem_size));
+ return NULL;
+ }
+
+ s->trst = 0;
+ s->last_device_in_chain = urj_jim_some_cpu ();
+
+ if (s->last_device_in_chain != NULL)
+ {
+ s->last_device_in_chain->prev = NULL;
+ }
+ else
+ {
+ free (s->shmem);
+ free (s);
+ // retain error state
+ return NULL;
+ }
+ return s;
+}
+
+void
+urj_jim_free (urj_jim_state_t *s)
+{
+ urj_jim_device_t *dev, *pre;
+
+ if (s == NULL)
+ return;
+
+ for (dev = s->last_device_in_chain; dev; dev = pre)
+ {
+ int i;
+
+ if (dev->dev_free != NULL)
+ dev->dev_free (dev);
+ for (i = 0; i < dev->num_sregs; i++)
+ {
+ free (dev->sreg[i].reg);
+ }
+ free (dev->sreg);
+ pre = dev->prev;
+ free (dev);
+ }
+
+ s->last_device_in_chain = NULL;
+ free (s->shmem);
+ free (s);
+}
--- /dev/null
+--
+-- $Id: $
+--
+-- BSDL definitions for "some_cpu" of "JTAG target simulator"
+--
+-- Copyright (C) 2008 Kolja Waschk <kawk>
+--
+-- Permission is hereby granted, free of charge, to any person obtaining a copy
+-- of this software and associated documentation files (the "Software"), to deal
+-- in the Software without restriction, including without limitation the rights
+-- to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+-- copies of the Software, and to permit persons to whom the Software is
+-- furnished to do so, subject to the following conditions:
+--
+-- The above copyright notice and this permission notice shall be included in
+-- all copies or substantial portions of the Software.
+--
+-- THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+-- IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+-- FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+-- AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+-- LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+-- OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+-- THE SOFTWARE.
+--
+--
+--
+-- The following Perl code has been used to create the BSR mapping.
+-- It is aligned for easy access to the register in the some_cpu.c code:
+--
+-- 31.. 0 address output A31..A0 (A0 addresses bytes!)
+-- 63..32 data output (from CPU to attached parts) D31..D0
+-- 95..64 data input (from attached parts to CPU) D31..D0
+-- 96 control output OE
+-- 97 control output WE
+-- 98 control output CS
+-- 99 control input RESET
+--
+--
+-- sub io_pin($$$$$)
+-- {
+-- my ($inbitno, $outbitno, $ctrlbitno, $name,$dir) = @_;
+--
+-- if($dir eq 'inout' || $dir eq 'in') {
+-- printf '"%d (BC_1, %s, input, X), " &%s', $inbitno, $name, "\n";
+-- } else {
+-- printf '"%d (BC_1, *, internal, X), " &%s', $inbitno, "\n";
+-- };
+-- if($dir ne 'in') {
+-- printf '"%d (BC_1, %s, output3, X, %d, 0, Z), " &%s', $outbitno, $name, $ctrlbitno, "\n";
+-- printf '"%d (BC_1, *, control, 0), " &%s', $ctrlbitno, "\n";
+-- }
+-- }
+--
+-- #######################################
+--
+-- io_pin(100, 96, 103, 'OE','out');
+-- io_pin(101, 97, 104, 'WE','out');
+-- io_pin(102, 98, 105, 'CS','out');
+-- io_pin(99, 0, 0, 'RESET','in');
+-- $bsi = 106;
+--
+-- for(my $i=0;$i<32; $i++) {
+-- # address output in 0.. 31
+-- # address buffer in
+-- # address control in
+-- io_pin($i+$bsi,$i,$i+$bsi+32,sprintf('A(%d)',$i),'out');
+-- }
+-- for(my $i=0;$i<32; $i++) {
+-- # data output in 32.. 63
+-- # data input in 64.. 95
+-- # data control in
+-- io_pin($i+64, $i+32, $i+$bsi+64, sprintf('D(%d)',$i), 'inout');
+-- };
+
+
+entity some_cpu is
+
+generic (PHYSICAL_PIN_MAP : string := " JIM ");
+
+port (
+ RESET : in bit ;
+ TCK : in bit ;
+ TMS : in bit ;
+ TDO : out bit ;
+ TDI : in bit ;
+ OE : out bit ;
+ CS : out bit ;
+ WE : out bit ;
+ A : out bit_vector(0 to 31);
+ D : inout bit_vector(0 to 31)
+);
+
+use STD_1149_1_1994.all;
+
+attribute COMPONENT_CONFORMANCE of some_cpu : entity is " STD_1149_1_1993 ";
+attribute PIN_MAP of some_cpu : entity is PHYSICAL_PIN_MAP ;
+
+constant JIM : PIN_MAP_STRING:=
+" CS : 2, " &
+" OE : 3, " &
+" WE : 4, " &
+" TCK : 5, " &
+" TMS : 6, " &
+" TDO : 7, " &
+" TDI : 8, " &
+" A : (100,101,102,103,104,105,106,107,108,109," &
+ "110,111,112,113,114,115,116,117,118,119," &
+ "120,121,122,123,124,125,126,127,128,129,130,131) , " &
+" D : (200,201,202,203,204,205,206,207,208,209," &
+ "210,211,212,213,214,215,216,217,218,219," &
+ "220,221,222,223,224,225,226,227,228,229,230,231) , " &
+" RESET : 1 " ;
+
+attribute TAP_SCAN_IN of TDI : signal is true ;
+attribute TAP_SCAN_OUT of TDO : signal is true ;
+attribute TAP_SCAN_MODE of TMS : signal is true ;
+attribute TAP_SCAN_CLOCK of TCK : signal is (8.0e6, BOTH) ;
+
+attribute INSTRUCTION_LENGTH of some_cpu : entity is 2 ;
+
+attribute INSTRUCTION_OPCODE of some_cpu : entity is
+" EXTEST ( 00 )," &
+" IDCODE ( 01 )," &
+" SAMPLE ( 10 )," &
+" BYPASS ( 11 )" ;
+
+attribute INSTRUCTION_CAPTURE of some_cpu : entity is " 01 ";
+
+attribute IDCODE_REGISTER of some_cpu : entity is "10000111011001010100001100100001" ;
+
+attribute BOUNDARY_LENGTH of some_cpu : entity is 202 ;
+
+attribute BOUNDARY_REGISTER of some_cpu : entity is
+
+"100 (BC_1, *, internal, X), " &
+"96 (BC_1, OE, output3, X, 103, 0, Z), " &
+"103 (BC_1, *, control, 0), " &
+"101 (BC_1, *, internal, X), " &
+"97 (BC_1, WE, output3, X, 104, 0, Z), " &
+"104 (BC_1, *, control, 0), " &
+"102 (BC_1, *, internal, X), " &
+"98 (BC_1, CS, output3, X, 105, 0, Z), " &
+"105 (BC_1, *, control, 0), " &
+"99 (BC_1, RESET, input, X), " &
+"106 (BC_1, *, internal, X), " &
+"0 (BC_1, A(0), output3, X, 138, 0, Z), " &
+"138 (BC_1, *, control, 0), " &
+"107 (BC_1, *, internal, X), " &
+"1 (BC_1, A(1), output3, X, 139, 0, Z), " &
+"139 (BC_1, *, control, 0), " &
+"108 (BC_1, *, internal, X), " &
+"2 (BC_1, A(2), output3, X, 140, 0, Z), " &
+"140 (BC_1, *, control, 0), " &
+"109 (BC_1, *, internal, X), " &
+"3 (BC_1, A(3), output3, X, 141, 0, Z), " &
+"141 (BC_1, *, control, 0), " &
+"110 (BC_1, *, internal, X), " &
+"4 (BC_1, A(4), output3, X, 142, 0, Z), " &
+"142 (BC_1, *, control, 0), " &
+"111 (BC_1, *, internal, X), " &
+"5 (BC_1, A(5), output3, X, 143, 0, Z), " &
+"143 (BC_1, *, control, 0), " &
+"112 (BC_1, *, internal, X), " &
+"6 (BC_1, A(6), output3, X, 144, 0, Z), " &
+"144 (BC_1, *, control, 0), " &
+"113 (BC_1, *, internal, X), " &
+"7 (BC_1, A(7), output3, X, 145, 0, Z), " &
+"145 (BC_1, *, control, 0), " &
+"114 (BC_1, *, internal, X), " &
+"8 (BC_1, A(8), output3, X, 146, 0, Z), " &
+"146 (BC_1, *, control, 0), " &
+"115 (BC_1, *, internal, X), " &
+"9 (BC_1, A(9), output3, X, 147, 0, Z), " &
+"147 (BC_1, *, control, 0), " &
+"116 (BC_1, *, internal, X), " &
+"10 (BC_1, A(10), output3, X, 148, 0, Z), " &
+"148 (BC_1, *, control, 0), " &
+"117 (BC_1, *, internal, X), " &
+"11 (BC_1, A(11), output3, X, 149, 0, Z), " &
+"149 (BC_1, *, control, 0), " &
+"118 (BC_1, *, internal, X), " &
+"12 (BC_1, A(12), output3, X, 150, 0, Z), " &
+"150 (BC_1, *, control, 0), " &
+"119 (BC_1, *, internal, X), " &
+"13 (BC_1, A(13), output3, X, 151, 0, Z), " &
+"151 (BC_1, *, control, 0), " &
+"120 (BC_1, *, internal, X), " &
+"14 (BC_1, A(14), output3, X, 152, 0, Z), " &
+"152 (BC_1, *, control, 0), " &
+"121 (BC_1, *, internal, X), " &
+"15 (BC_1, A(15), output3, X, 153, 0, Z), " &
+"153 (BC_1, *, control, 0), " &
+"122 (BC_1, *, internal, X), " &
+"16 (BC_1, A(16), output3, X, 154, 0, Z), " &
+"154 (BC_1, *, control, 0), " &
+"123 (BC_1, *, internal, X), " &
+"17 (BC_1, A(17), output3, X, 155, 0, Z), " &
+"155 (BC_1, *, control, 0), " &
+"124 (BC_1, *, internal, X), " &
+"18 (BC_1, A(18), output3, X, 156, 0, Z), " &
+"156 (BC_1, *, control, 0), " &
+"125 (BC_1, *, internal, X), " &
+"19 (BC_1, A(19), output3, X, 157, 0, Z), " &
+"157 (BC_1, *, control, 0), " &
+"126 (BC_1, *, internal, X), " &
+"20 (BC_1, A(20), output3, X, 158, 0, Z), " &
+"158 (BC_1, *, control, 0), " &
+"127 (BC_1, *, internal, X), " &
+"21 (BC_1, A(21), output3, X, 159, 0, Z), " &
+"159 (BC_1, *, control, 0), " &
+"128 (BC_1, *, internal, X), " &
+"22 (BC_1, A(22), output3, X, 160, 0, Z), " &
+"160 (BC_1, *, control, 0), " &
+"129 (BC_1, *, internal, X), " &
+"23 (BC_1, A(23), output3, X, 161, 0, Z), " &
+"161 (BC_1, *, control, 0), " &
+"130 (BC_1, *, internal, X), " &
+"24 (BC_1, A(24), output3, X, 162, 0, Z), " &
+"162 (BC_1, *, control, 0), " &
+"131 (BC_1, *, internal, X), " &
+"25 (BC_1, A(25), output3, X, 163, 0, Z), " &
+"163 (BC_1, *, control, 0), " &
+"132 (BC_1, *, internal, X), " &
+"26 (BC_1, A(26), output3, X, 164, 0, Z), " &
+"164 (BC_1, *, control, 0), " &
+"133 (BC_1, *, internal, X), " &
+"27 (BC_1, A(27), output3, X, 165, 0, Z), " &
+"165 (BC_1, *, control, 0), " &
+"134 (BC_1, *, internal, X), " &
+"28 (BC_1, A(28), output3, X, 166, 0, Z), " &
+"166 (BC_1, *, control, 0), " &
+"135 (BC_1, *, internal, X), " &
+"29 (BC_1, A(29), output3, X, 167, 0, Z), " &
+"167 (BC_1, *, control, 0), " &
+"136 (BC_1, *, internal, X), " &
+"30 (BC_1, A(30), output3, X, 168, 0, Z), " &
+"168 (BC_1, *, control, 0), " &
+"137 (BC_1, *, internal, X), " &
+"31 (BC_1, A(31), output3, X, 169, 0, Z), " &
+"169 (BC_1, *, control, 0), " &
+"64 (BC_1, D(0), input, X), " &
+"32 (BC_1, D(0), output3, X, 170, 0, Z), " &
+"170 (BC_1, *, control, 0), " &
+"65 (BC_1, D(1), input, X), " &
+"33 (BC_1, D(1), output3, X, 171, 0, Z), " &
+"171 (BC_1, *, control, 0), " &
+"66 (BC_1, D(2), input, X), " &
+"34 (BC_1, D(2), output3, X, 172, 0, Z), " &
+"172 (BC_1, *, control, 0), " &
+"67 (BC_1, D(3), input, X), " &
+"35 (BC_1, D(3), output3, X, 173, 0, Z), " &
+"173 (BC_1, *, control, 0), " &
+"68 (BC_1, D(4), input, X), " &
+"36 (BC_1, D(4), output3, X, 174, 0, Z), " &
+"174 (BC_1, *, control, 0), " &
+"69 (BC_1, D(5), input, X), " &
+"37 (BC_1, D(5), output3, X, 175, 0, Z), " &
+"175 (BC_1, *, control, 0), " &
+"70 (BC_1, D(6), input, X), " &
+"38 (BC_1, D(6), output3, X, 176, 0, Z), " &
+"176 (BC_1, *, control, 0), " &
+"71 (BC_1, D(7), input, X), " &
+"39 (BC_1, D(7), output3, X, 177, 0, Z), " &
+"177 (BC_1, *, control, 0), " &
+"72 (BC_1, D(8), input, X), " &
+"40 (BC_1, D(8), output3, X, 178, 0, Z), " &
+"178 (BC_1, *, control, 0), " &
+"73 (BC_1, D(9), input, X), " &
+"41 (BC_1, D(9), output3, X, 179, 0, Z), " &
+"179 (BC_1, *, control, 0), " &
+"74 (BC_1, D(10), input, X), " &
+"42 (BC_1, D(10), output3, X, 180, 0, Z), " &
+"180 (BC_1, *, control, 0), " &
+"75 (BC_1, D(11), input, X), " &
+"43 (BC_1, D(11), output3, X, 181, 0, Z), " &
+"181 (BC_1, *, control, 0), " &
+"76 (BC_1, D(12), input, X), " &
+"44 (BC_1, D(12), output3, X, 182, 0, Z), " &
+"182 (BC_1, *, control, 0), " &
+"77 (BC_1, D(13), input, X), " &
+"45 (BC_1, D(13), output3, X, 183, 0, Z), " &
+"183 (BC_1, *, control, 0), " &
+"78 (BC_1, D(14), input, X), " &
+"46 (BC_1, D(14), output3, X, 184, 0, Z), " &
+"184 (BC_1, *, control, 0), " &
+"79 (BC_1, D(15), input, X), " &
+"47 (BC_1, D(15), output3, X, 185, 0, Z), " &
+"185 (BC_1, *, control, 0), " &
+"80 (BC_1, D(16), input, X), " &
+"48 (BC_1, D(16), output3, X, 186, 0, Z), " &
+"186 (BC_1, *, control, 0), " &
+"81 (BC_1, D(17), input, X), " &
+"49 (BC_1, D(17), output3, X, 187, 0, Z), " &
+"187 (BC_1, *, control, 0), " &
+"82 (BC_1, D(18), input, X), " &
+"50 (BC_1, D(18), output3, X, 188, 0, Z), " &
+"188 (BC_1, *, control, 0), " &
+"83 (BC_1, D(19), input, X), " &
+"51 (BC_1, D(19), output3, X, 189, 0, Z), " &
+"189 (BC_1, *, control, 0), " &
+"84 (BC_1, D(20), input, X), " &
+"52 (BC_1, D(20), output3, X, 190, 0, Z), " &
+"190 (BC_1, *, control, 0), " &
+"85 (BC_1, D(21), input, X), " &
+"53 (BC_1, D(21), output3, X, 191, 0, Z), " &
+"191 (BC_1, *, control, 0), " &
+"86 (BC_1, D(22), input, X), " &
+"54 (BC_1, D(22), output3, X, 192, 0, Z), " &
+"192 (BC_1, *, control, 0), " &
+"87 (BC_1, D(23), input, X), " &
+"55 (BC_1, D(23), output3, X, 193, 0, Z), " &
+"193 (BC_1, *, control, 0), " &
+"88 (BC_1, D(24), input, X), " &
+"56 (BC_1, D(24), output3, X, 194, 0, Z), " &
+"194 (BC_1, *, control, 0), " &
+"89 (BC_1, D(25), input, X), " &
+"57 (BC_1, D(25), output3, X, 195, 0, Z), " &
+"195 (BC_1, *, control, 0), " &
+"90 (BC_1, D(26), input, X), " &
+"58 (BC_1, D(26), output3, X, 196, 0, Z), " &
+"196 (BC_1, *, control, 0), " &
+"91 (BC_1, D(27), input, X), " &
+"59 (BC_1, D(27), output3, X, 197, 0, Z), " &
+"197 (BC_1, *, control, 0), " &
+"92 (BC_1, D(28), input, X), " &
+"60 (BC_1, D(28), output3, X, 198, 0, Z), " &
+"198 (BC_1, *, control, 0), " &
+"93 (BC_1, D(29), input, X), " &
+"61 (BC_1, D(29), output3, X, 199, 0, Z), " &
+"199 (BC_1, *, control, 0), " &
+"94 (BC_1, D(30), input, X), " &
+"62 (BC_1, D(30), output3, X, 200, 0, Z), " &
+"200 (BC_1, *, control, 0), " &
+"95 (BC_1, D(31), input, X), " &
+"63 (BC_1, D(31), output3, X, 201, 0, Z), " &
+"201 (BC_1, *, control, 0) " ;
+
+end some_cpu ;
+
+
+
--- /dev/null
+/*
+ * $Id: tap.c $
+ *
+ * Copyright (C) 2008 Kolja Waschk <kawk>
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+
+#include <urjtag/types.h>
+#include <urjtag/log.h>
+#include <urjtag/error.h>
+#include <urjtag/jim.h>
+#include <urjtag/bitmask.h>
+
+extern urj_jim_bus_device_t urj_jim_intel_28f800b3b;
+
+static urj_jim_attached_part_t some_cpu_attached[] = {
+ /* 1. Address offset: base offset [bytes]
+ * 2. Address shift: Distance between address LSB of device and CPU
+ * 3. Data shift: Distance between D0 of device and CPU e.g. 0, 8, 16 or 24 bits
+ * 4. Part: Pointer to part structure */
+
+ {0x00000000, 1, 0, &urj_jim_intel_28f800b3b},
+
+ {0xFFFFFFFF, 0, 0, NULL} /* Always end list with part == NULL */
+};
+
+#define BSR_LEN 202
+
+static void
+urj_jim_some_cpu_report_idcode (urj_jim_device_t *dev)
+{
+ dev->sreg[0].reg[0] = 0x1; /* IDCODE instruction b0001 */
+ dev->sreg[1].reg[0] = 0x87654321; /* Load IDR (fake) */
+ dev->current_dr = 1; /* IDR */
+}
+
+static void
+urj_jim_some_cpu_tck_rise (urj_jim_device_t *dev, int tms, int tdi,
+ uint8_t *shmem, size_t shmem_size)
+{
+ int i;
+
+ switch (dev->tap_state)
+ {
+ case URJ_JIM_RESET:
+
+ urj_jim_some_cpu_report_idcode (dev);
+ break;
+
+ case URJ_JIM_CAPTURE_DR:
+
+ if (dev->current_dr == 2) // if(dev->sreg[0].reg[0] == 0 && dev->current_dr == 2) /* EXTEST */
+ {
+ uint32_t a = dev->sreg[2].reg[0];
+ uint32_t d = 0;
+ uint32_t c = dev->sreg[2].reg[3];
+
+ urj_log (URJ_LOG_LEVEL_DETAIL, "URJ_JIM_CAPTURE_DR/EXTEST\n");
+
+ for (i = 0; some_cpu_attached[i].part; i++)
+ {
+ urj_jim_attached_part_t *tp =
+ &(((urj_jim_attached_part_t *) (dev->state))[i]);
+ urj_jim_bus_device_t *b = tp->part;
+
+ /* Address decoder */
+ if (tp->offset <= a)
+ {
+ uint32_t as = (a - (tp->offset)) >> tp->adr_shift;
+ if (as < b->size)
+ {
+ d |= b->capture (b, as, c, shmem,
+ shmem_size) << tp->data_shift;
+ }
+ }
+ }
+
+ /* Store data into data "input" cells in BSR */
+ dev->sreg[2].reg[2] = d;
+ }
+ break;
+
+ case URJ_JIM_UPDATE_IR:
+
+ urj_log (URJ_LOG_LEVEL_DETAIL, "URJ_JIM_UPDATE_IR/");
+
+ switch (dev->sreg[0].reg[0])
+ {
+ case 0x0: /* EXTEST */
+ urj_log (URJ_LOG_LEVEL_DETAIL, "EXTEST\n");
+ dev->current_dr = 2;
+ break;
+ case 0x1: /* IDCODE */
+ urj_log (URJ_LOG_LEVEL_DETAIL, "IDCODE\n");
+ urj_jim_some_cpu_report_idcode (dev);
+ break;
+ case 0x2: /* SAMPLE */
+ urj_log (URJ_LOG_LEVEL_DETAIL, "SAMPLE\n");
+ dev->current_dr = 2;
+ break;
+ case 0x3: /* BYPASS */
+ default:
+ urj_log (URJ_LOG_LEVEL_DETAIL, "BYPASS\n");
+ dev->current_dr = 0; /* BYPASS */
+ break;
+ }
+ break;
+
+ default:
+ break;
+ }
+}
+
+static void
+urj_jim_some_cpu_tck_fall (urj_jim_device_t *dev, uint8_t *shmem,
+ size_t shmem_size)
+{
+ int i;
+
+ switch (dev->tap_state)
+ {
+ case URJ_JIM_UPDATE_DR:
+
+ if (dev->sreg[0].reg[0] == 0 && dev->current_dr == 2) /* EXTEST */
+ {
+ uint32_t a = dev->sreg[2].reg[0];
+ uint32_t d = dev->sreg[2].reg[1];
+ uint32_t c = dev->sreg[2].reg[3];
+
+ urj_log (URJ_LOG_LEVEL_DETAIL, "URJ_JIM_UPDATE_DR/EXTEST\n");
+
+ for (i = 0; some_cpu_attached[i].part; i++)
+ {
+ urj_jim_attached_part_t *tp =
+ &(((urj_jim_attached_part_t *) (dev->state))[i]);
+ urj_jim_bus_device_t *b = tp->part;
+
+ /* Address decoder */
+ if (tp->offset <= a)
+ {
+ uint32_t as = (a - (tp->offset)) >> tp->adr_shift;
+ if (as < b->size)
+ {
+ b->update (b, as, d >> tp->data_shift, c, shmem,
+ shmem_size);
+ }
+ }
+ }
+ }
+ break;
+
+ default:
+ break;
+ }
+}
+
+static void
+urj_jim_some_cpu_free (urj_jim_device_t *dev)
+{
+ int i;
+
+ if (!dev)
+ return;
+ if (!dev->state)
+ return;
+
+ for (i = 0; some_cpu_attached[i].part; i++)
+ {
+ urj_jim_bus_device_t *b =
+ ((urj_jim_attached_part_t *) (dev->state))[i].part;
+ if (b->free != NULL)
+ b->free (b);
+ free (b);
+ }
+ free (dev->state);
+}
+
+urj_jim_device_t *
+urj_jim_some_cpu (void)
+{
+ urj_jim_device_t *dev;
+ const int reg_size[3] =
+ { 2 /* IR */ , 32 /* IDR */ , BSR_LEN /* BSR */ };
+
+ dev = urj_jim_alloc_device (3, reg_size);
+
+ if (dev)
+ {
+ /* Allocate memory for copies of the original structure for dynamic
+ * modifications (e.g. if bus width changes because of some signal) */
+
+ dev->state = malloc (sizeof (some_cpu_attached));
+ if (!dev->state)
+ {
+ free (dev);
+ urj_error_set (URJ_ERROR_OUT_OF_MEMORY, "malloc(%zd) fails",
+ sizeof (some_cpu_attached));
+ dev = NULL;
+ }
+ else
+ {
+ int i;
+ dev->tck_rise = urj_jim_some_cpu_tck_rise;
+ dev->tck_fall = urj_jim_some_cpu_tck_fall;
+ dev->dev_free = urj_jim_some_cpu_free;
+ memcpy (dev->state, some_cpu_attached,
+ sizeof (some_cpu_attached));
+
+ for (i = 0; some_cpu_attached[i].part; i++)
+ {
+ urj_jim_bus_device_t **b =
+ &(((urj_jim_attached_part_t *) (dev->state))[i].part);
+ *b = malloc (sizeof (urj_jim_bus_device_t));
+ if (*b == NULL)
+ {
+ urj_error_set (URJ_ERROR_OUT_OF_MEMORY, "malloc(%zd) fails",
+ sizeof (urj_jim_bus_device_t));
+ break;
+ }
+ memcpy (*b, some_cpu_attached[i].part,
+ sizeof (urj_jim_bus_device_t));
+ if ((*b)->init (*b) != URJ_STATUS_OK)
+ {
+ free (*b);
+ *b = NULL;
+ // retain error state
+ break;
+ }
+ }
+
+ if (some_cpu_attached[i].part) /* loop broken; failed to malloc all parts */
+ {
+ for (i--; i >= 0; i--)
+ free (((urj_jim_attached_part_t *) (dev->state))[i].part);
+ free (dev->state);
+ free (dev);
+ dev = NULL;
+ }
+ }
+ }
+ return dev;
+}
--- /dev/null
+.deps
+.libs
+Makefile
+Makefile.in
--- /dev/null
+#
+# $Id$
+#
+# Copyright (C) 2003 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Marcel Telka <marcel@telka.sk>, 2003.
+#
+
+include $(top_srcdir)/Makefile.rules
+
+noinst_LTLIBRARIES = libjtaglib.la
+
+if JTAG_RELOCATABLE
+libiberty_sources = \
+ ansidecl.h \
+ filenames.h \
+ lbasename.c \
+ libiberty.h \
+ lrealpath.c \
+ make-relative-prefix.c \
+ safe-ctype.c \
+ safe-ctype.h
+else
+libiberty_sources =
+endif
+
+libjtaglib_la_SOURCES = \
+ fclock.c \
+ usleep.c \
+ $(libiberty_sources)
+
+AM_CFLAGS = $(WARNINGCFLAGS)
--- /dev/null
+/* ANSI and traditional C compatability macros
+ Copyright 1991, 1992, 1993, 1994, 1995, 1996, 1998, 1999, 2000, 2001
+ Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
+
+/* ANSI and traditional C compatibility macros
+
+ ANSI C is assumed if __STDC__ is #defined.
+
+ Macro ANSI C definition Traditional C definition
+ ----- ---- - ---------- ----------- - ----------
+ ANSI_PROTOTYPES 1 not defined
+ PTR `void *' `char *'
+ PTRCONST `void *const' `char *'
+ LONG_DOUBLE `long double' `double'
+ const not defined `'
+ volatile not defined `'
+ signed not defined `'
+ VA_START(ap, var) va_start(ap, var) va_start(ap)
+
+ Note that it is safe to write "void foo();" indicating a function
+ with no return value, in all K+R compilers we have been able to test.
+
+ For declaring functions with prototypes, we also provide these:
+
+ PARAMS ((prototype))
+ -- for functions which take a fixed number of arguments. Use this
+ when declaring the function. When defining the function, write a
+ K+R style argument list. For example:
+
+ char *strcpy PARAMS ((char *dest, char *source));
+ ...
+ char *
+ strcpy (dest, source)
+ char *dest;
+ char *source;
+ { ... }
+
+
+ VPARAMS ((prototype, ...))
+ -- for functions which take a variable number of arguments. Use
+ PARAMS to declare the function, VPARAMS to define it. For example:
+
+ int printf PARAMS ((const char *format, ...));
+ ...
+ int
+ printf VPARAMS ((const char *format, ...))
+ {
+ ...
+ }
+
+ For writing functions which take variable numbers of arguments, we
+ also provide the VA_OPEN, VA_CLOSE, and VA_FIXEDARG macros. These
+ hide the differences between K+R <varargs.h> and C89 <stdarg.h> more
+ thoroughly than the simple VA_START() macro mentioned above.
+
+ VA_OPEN and VA_CLOSE are used *instead of* va_start and va_end.
+ Immediately after VA_OPEN, put a sequence of VA_FIXEDARG calls
+ corresponding to the list of fixed arguments. Then use va_arg
+ normally to get the variable arguments, or pass your va_list object
+ around. You do not declare the va_list yourself; VA_OPEN does it
+ for you.
+
+ Here is a complete example:
+
+ int
+ printf VPARAMS ((const char *format, ...))
+ {
+ int result;
+
+ VA_OPEN (ap, format);
+ VA_FIXEDARG (ap, const char *, format);
+
+ result = vfprintf (stdout, format, ap);
+ VA_CLOSE (ap);
+
+ return result;
+ }
+
+
+ You can declare variables either before or after the VA_OPEN,
+ VA_FIXEDARG sequence. Also, VA_OPEN and VA_CLOSE are the beginning
+ and end of a block. They must appear at the same nesting level,
+ and any variables declared after VA_OPEN go out of scope at
+ VA_CLOSE. Unfortunately, with a K+R compiler, that includes the
+ argument list. You can have multiple instances of VA_OPEN/VA_CLOSE
+ pairs in a single function in case you need to traverse the
+ argument list more than once.
+
+ For ease of writing code which uses GCC extensions but needs to be
+ portable to other compilers, we provide the GCC_VERSION macro that
+ simplifies testing __GNUC__ and __GNUC_MINOR__ together, and various
+ wrappers around __attribute__. Also, __extension__ will be #defined
+ to nothing if it doesn't work. See below.
+
+ This header also defines a lot of obsolete macros:
+ CONST, VOLATILE, SIGNED, PROTO, EXFUN, DEFUN, DEFUN_VOID,
+ AND, DOTS, NOARGS. Don't use them. */
+
+#ifndef _ANSIDECL_H
+#define _ANSIDECL_H 1
+
+/* Every source file includes this file,
+ so they will all get the switch for lint. */
+/* LINTLIBRARY */
+
+/* Using MACRO(x,y) in cpp #if conditionals does not work with some
+ older preprocessors. Thus we can't define something like this:
+
+#define HAVE_GCC_VERSION(MAJOR, MINOR) \
+ (__GNUC__ > (MAJOR) || (__GNUC__ == (MAJOR) && __GNUC_MINOR__ >= (MINOR)))
+
+and then test "#if HAVE_GCC_VERSION(2,7)".
+
+So instead we use the macro below and test it against specific values. */
+
+/* This macro simplifies testing whether we are using gcc, and if it
+ is of a particular minimum version. (Both major & minor numbers are
+ significant.) This macro will evaluate to 0 if we are not using
+ gcc at all. */
+#ifndef GCC_VERSION
+#define GCC_VERSION (__GNUC__ * 1000 + __GNUC_MINOR__)
+#endif /* GCC_VERSION */
+
+#if defined (__STDC__) || defined (_AIX) || (defined (__mips) && defined (_SYSTYPE_SVR4)) || defined(_WIN32) || (defined(__alpha) && defined(__cplusplus))
+/* All known AIX compilers implement these things (but don't always
+ define __STDC__). The RISC/OS MIPS compiler defines these things
+ in SVR4 mode, but does not define __STDC__. */
+/* eraxxon@alumni.rice.edu: The Compaq C++ compiler, unlike many other
+ C++ compilers, does not define __STDC__, though it acts as if this
+ was so. (Verified versions: 5.7, 6.2, 6.3, 6.5) */
+
+#define ANSI_PROTOTYPES 1
+#define PTR void *
+#define PTRCONST void *const
+#define LONG_DOUBLE long double
+
+/* PARAMS is often defined elsewhere (e.g. by libintl.h), so wrap it in
+ a #ifndef. */
+#ifndef PARAMS
+#define PARAMS(ARGS) ARGS
+#endif
+
+#define VPARAMS(ARGS) ARGS
+#define VA_START(VA_LIST, VAR) va_start(VA_LIST, VAR)
+
+/* variadic function helper macros */
+/* "struct Qdmy" swallows the semicolon after VA_OPEN/VA_FIXEDARG's
+ use without inhibiting further decls and without declaring an
+ actual variable. */
+#define VA_OPEN(AP, VAR) { va_list AP; va_start(AP, VAR); { struct Qdmy
+#define VA_CLOSE(AP) } va_end(AP); }
+#define VA_FIXEDARG(AP, T, N) struct Qdmy
+
+#undef const
+#undef volatile
+#undef signed
+
+/* inline requires special treatment; it's in C99, and GCC >=2.7 supports
+ it too, but it's not in C89. */
+#undef inline
+#if __STDC_VERSION__ > 199901L
+/* it's a keyword */
+#else
+# if GCC_VERSION >= 2007
+# define inline __inline__ /* __inline__ prevents -pedantic warnings */
+# else
+# define inline /* nothing */
+# endif
+#endif
+
+/* These are obsolete. Do not use. */
+#ifndef IN_GCC
+#define CONST const
+#define VOLATILE volatile
+#define SIGNED signed
+
+#define PROTO(type, name, arglist) type name arglist
+#define EXFUN(name, proto) name proto
+#define DEFUN(name, arglist, args) name(args)
+#define DEFUN_VOID(name) name(void)
+#define AND ,
+#define DOTS , ...
+#define NOARGS void
+#endif /* ! IN_GCC */
+
+#else /* Not ANSI C. */
+
+#undef ANSI_PROTOTYPES
+#define PTR char *
+#define PTRCONST PTR
+#define LONG_DOUBLE double
+
+#define PARAMS(args) ()
+#define VPARAMS(args) (va_alist) va_dcl
+#define VA_START(va_list, var) va_start(va_list)
+
+#define VA_OPEN(AP, VAR) { va_list AP; va_start(AP); { struct Qdmy
+#define VA_CLOSE(AP) } va_end(AP); }
+#define VA_FIXEDARG(AP, TYPE, NAME) TYPE NAME = va_arg(AP, TYPE)
+
+/* some systems define these in header files for non-ansi mode */
+#undef const
+#undef volatile
+#undef signed
+#undef inline
+#define const
+#define volatile
+#define signed
+#define inline
+
+#ifndef IN_GCC
+#define CONST
+#define VOLATILE
+#define SIGNED
+
+#define PROTO(type, name, arglist) type name ()
+#define EXFUN(name, proto) name()
+#define DEFUN(name, arglist, args) name arglist args;
+#define DEFUN_VOID(name) name()
+#define AND ;
+#define DOTS
+#define NOARGS
+#endif /* ! IN_GCC */
+
+#endif /* ANSI C. */
+
+/* Define macros for some gcc attributes. This permits us to use the
+ macros freely, and know that they will come into play for the
+ version of gcc in which they are supported. */
+
+#if (GCC_VERSION < 2007)
+# define __attribute__(x)
+#endif
+
+/* Attribute __malloc__ on functions was valid as of gcc 2.96. */
+#ifndef ATTRIBUTE_MALLOC
+# if (GCC_VERSION >= 2096)
+# define ATTRIBUTE_MALLOC __attribute__ ((__malloc__))
+# else
+# define ATTRIBUTE_MALLOC
+# endif /* GNUC >= 2.96 */
+#endif /* ATTRIBUTE_MALLOC */
+
+/* Attributes on labels were valid as of gcc 2.93. */
+#ifndef ATTRIBUTE_UNUSED_LABEL
+# if (!defined (__cplusplus) && GCC_VERSION >= 2093)
+# define ATTRIBUTE_UNUSED_LABEL ATTRIBUTE_UNUSED
+# else
+# define ATTRIBUTE_UNUSED_LABEL
+# endif /* !__cplusplus && GNUC >= 2.93 */
+#endif /* ATTRIBUTE_UNUSED_LABEL */
+
+#ifndef ATTRIBUTE_UNUSED
+#define ATTRIBUTE_UNUSED __attribute__ ((__unused__))
+#endif /* ATTRIBUTE_UNUSED */
+
+/* Before GCC 3.4, the C++ frontend couldn't parse attributes placed after the
+ identifier name. */
+#if ! defined(__cplusplus) || (GCC_VERSION >= 3004)
+# define ARG_UNUSED(NAME) NAME ATTRIBUTE_UNUSED
+#else /* !__cplusplus || GNUC >= 3.4 */
+# define ARG_UNUSED(NAME) NAME
+#endif /* !__cplusplus || GNUC >= 3.4 */
+
+#ifndef ATTRIBUTE_NORETURN
+#define ATTRIBUTE_NORETURN __attribute__ ((__noreturn__))
+#endif /* ATTRIBUTE_NORETURN */
+
+/* Attribute `nonnull' was valid as of gcc 3.3. */
+#ifndef ATTRIBUTE_NONNULL
+# if (GCC_VERSION >= 3003)
+# define ATTRIBUTE_NONNULL(m) __attribute__ ((__nonnull__ (m)))
+# else
+# define ATTRIBUTE_NONNULL(m)
+# endif /* GNUC >= 3.3 */
+#endif /* ATTRIBUTE_NONNULL */
+
+/* Attribute `pure' was valid as of gcc 3.0. */
+#ifndef ATTRIBUTE_PURE
+# if (GCC_VERSION >= 3000)
+# define ATTRIBUTE_PURE __attribute__ ((__pure__))
+# else
+# define ATTRIBUTE_PURE
+# endif /* GNUC >= 3.0 */
+#endif /* ATTRIBUTE_PURE */
+
+/* Use ATTRIBUTE_PRINTF when the format specifier must not be NULL.
+ This was the case for the `printf' format attribute by itself
+ before GCC 3.3, but as of 3.3 we need to add the `nonnull'
+ attribute to retain this behavior. */
+#ifndef ATTRIBUTE_PRINTF
+#define ATTRIBUTE_PRINTF(m, n) __attribute__ ((__format__ (__printf__, m, n))) ATTRIBUTE_NONNULL(m)
+#define ATTRIBUTE_PRINTF_1 ATTRIBUTE_PRINTF(1, 2)
+#define ATTRIBUTE_PRINTF_2 ATTRIBUTE_PRINTF(2, 3)
+#define ATTRIBUTE_PRINTF_3 ATTRIBUTE_PRINTF(3, 4)
+#define ATTRIBUTE_PRINTF_4 ATTRIBUTE_PRINTF(4, 5)
+#define ATTRIBUTE_PRINTF_5 ATTRIBUTE_PRINTF(5, 6)
+#endif /* ATTRIBUTE_PRINTF */
+
+/* Use ATTRIBUTE_FPTR_PRINTF when the format attribute is to be set on
+ a function pointer. Format attributes were allowed on function
+ pointers as of gcc 3.1. */
+#ifndef ATTRIBUTE_FPTR_PRINTF
+# if (GCC_VERSION >= 3001)
+# define ATTRIBUTE_FPTR_PRINTF(m, n) ATTRIBUTE_PRINTF(m, n)
+# else
+# define ATTRIBUTE_FPTR_PRINTF(m, n)
+# endif /* GNUC >= 3.1 */
+# define ATTRIBUTE_FPTR_PRINTF_1 ATTRIBUTE_FPTR_PRINTF(1, 2)
+# define ATTRIBUTE_FPTR_PRINTF_2 ATTRIBUTE_FPTR_PRINTF(2, 3)
+# define ATTRIBUTE_FPTR_PRINTF_3 ATTRIBUTE_FPTR_PRINTF(3, 4)
+# define ATTRIBUTE_FPTR_PRINTF_4 ATTRIBUTE_FPTR_PRINTF(4, 5)
+# define ATTRIBUTE_FPTR_PRINTF_5 ATTRIBUTE_FPTR_PRINTF(5, 6)
+#endif /* ATTRIBUTE_FPTR_PRINTF */
+
+/* Use ATTRIBUTE_NULL_PRINTF when the format specifier may be NULL. A
+ NULL format specifier was allowed as of gcc 3.3. */
+#ifndef ATTRIBUTE_NULL_PRINTF
+# if (GCC_VERSION >= 3003)
+# define ATTRIBUTE_NULL_PRINTF(m, n) __attribute__ ((__format__ (__printf__, m, n)))
+# else
+# define ATTRIBUTE_NULL_PRINTF(m, n)
+# endif /* GNUC >= 3.3 */
+# define ATTRIBUTE_NULL_PRINTF_1 ATTRIBUTE_NULL_PRINTF(1, 2)
+# define ATTRIBUTE_NULL_PRINTF_2 ATTRIBUTE_NULL_PRINTF(2, 3)
+# define ATTRIBUTE_NULL_PRINTF_3 ATTRIBUTE_NULL_PRINTF(3, 4)
+# define ATTRIBUTE_NULL_PRINTF_4 ATTRIBUTE_NULL_PRINTF(4, 5)
+# define ATTRIBUTE_NULL_PRINTF_5 ATTRIBUTE_NULL_PRINTF(5, 6)
+#endif /* ATTRIBUTE_NULL_PRINTF */
+
+/* Attribute `sentinel' was valid as of gcc 3.5. */
+#ifndef ATTRIBUTE_SENTINEL
+# if (GCC_VERSION >= 3005)
+# define ATTRIBUTE_SENTINEL __attribute__ ((__sentinel__))
+# else
+# define ATTRIBUTE_SENTINEL
+# endif /* GNUC >= 3.5 */
+#endif /* ATTRIBUTE_SENTINEL */
+
+
+#ifndef ATTRIBUTE_ALIGNED_ALIGNOF
+# if (GCC_VERSION >= 3000)
+# define ATTRIBUTE_ALIGNED_ALIGNOF(m) __attribute__ ((__aligned__ (__alignof__ (m))))
+# else
+# define ATTRIBUTE_ALIGNED_ALIGNOF(m)
+# endif /* GNUC >= 3.0 */
+#endif /* ATTRIBUTE_ALIGNED_ALIGNOF */
+
+/* Useful for structures whose layout must much some binary specification
+ regardless of the alignment and padding qualities of the compiler. */
+#ifndef ATTRIBUTE_PACKED
+# define ATTRIBUTE_PACKED __attribute__ ((packed))
+#endif
+
+/* Attribute `hot' and `cold' was valid as of gcc 4.3. */
+#ifndef ATTRIBUTE_COLD
+# if (GCC_VERSION >= 4003)
+# define ATTRIBUTE_COLD __attribute__ ((__cold__))
+# else
+# define ATTRIBUTE_COLD
+# endif /* GNUC >= 4.3 */
+#endif /* ATTRIBUTE_COLD */
+#ifndef ATTRIBUTE_HOT
+# if (GCC_VERSION >= 4003)
+# define ATTRIBUTE_HOT __attribute__ ((__hot__))
+# else
+# define ATTRIBUTE_HOT
+# endif /* GNUC >= 4.3 */
+#endif /* ATTRIBUTE_HOT */
+
+/* We use __extension__ in some places to suppress -pedantic warnings
+ about GCC extensions. This feature didn't work properly before
+ gcc 2.8. */
+#if GCC_VERSION < 2008
+#define __extension__
+#endif
+
+#endif /* ansidecl.h */
--- /dev/null
+/*
+ * fclock.c
+ *
+ * Copyright (C) 2005 Hein Roehrig
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ */
+
+#define _ISOC99_SOURCE
+#define _POSIX_C_SOURCE 200112L
+#include <unistd.h>
+#include <stdlib.h>
+#include <stdio.h>
+#include <time.h>
+#ifndef __MINGW32__
+#include <sys/times.h>
+#endif
+#include <math.h>
+#include <assert.h>
+
+#include <urjtag/fclock.h>
+
+/* ------------------------------------------------------------------ */
+
+#ifdef __APPLE__
+#include <mach/mach_time.h>
+#include <sys/types.h>
+#include <sys/time.h>
+
+long double
+urj_lib_frealtime (void)
+{
+ long double result;
+ static uint64_t start_mat;
+ static long double start_time;
+ static double multiplier;
+
+ mach_timebase_info_data_t mtid;
+ struct timeval tv;
+
+ if (!mtid.denom == 0)
+ {
+ mach_timebase_info (&mtid);
+ multiplier = (double) mtid.numer / (double) mtid.denom;
+ gettimeofday (&tv, NULL);
+ start_time =
+ (long double) tv.tv_sec + (long double) tv.tv_usec * 1000.0;
+ start_mat = mach_absolute_time ();
+ }
+
+ result = start_time + (mach_absolute_time () - start_mat) * multiplier;
+
+ assert (isnormal (result));
+ assert (result > 0);
+ return result;
+}
+#else /* def __APPLE__ */
+
+/* ------------------------------------------------------------------ */
+
+#ifdef _POSIX_TIMERS
+
+long double
+urj_lib_frealtime (void)
+{
+ long double result;
+
+ struct timespec t;
+ if (clock_gettime (CLOCK_REALTIME, &t) == -1)
+ {
+ perror ("urj_lib_frealtime (clock_gettime)");
+ exit (EXIT_FAILURE);
+ }
+ result =
+ (long double) t.tv_sec + (long double) t.tv_nsec * (long double) 1e-9;
+
+ assert (isnormal (result));
+ assert (result > 0);
+ return result;
+}
+
+#else /* def _POSIX_TIMERS */
+
+/* ------------------------------------------------------------------ */
+
+#ifdef __MINGW32__
+
+#include <sys/timeb.h>
+
+long double
+urj_lib_frealtime (void)
+{
+ long double result;
+
+ struct timeb t;
+
+ ftime (&t);
+ result =
+ (long double) t.time + (long double) t.millitm * (long double) 1e-3;
+
+ assert (isnormal (result));
+ assert (result > 0);
+ return result;
+}
+
+
+#else /* def __MINGW32__ */
+
+/* ------------------------------------------------------------------ */
+
+#ifndef CLK_TCK
+static clock_t CLK_TCK = 0;
+static void set_clk_tck (void) __attribute__ ((constructor));
+static void
+set_clk_tck (void)
+{
+ long v = sysconf (_SC_CLK_TCK);
+ if (v == -1)
+ {
+ perror ("sysconf(_SC_CLK_TCK)");
+ exit (EXIT_FAILURE);
+ }
+ CLK_TCK = v;
+}
+#endif
+
+long double
+urj_lib_frealtime (void)
+{
+ long double result;
+
+
+ struct tms t;
+ clock_t c = times (&t);
+ if (c == (clock_t) - 1)
+ {
+ perror ("urj_lib_frealtime (times)");
+ exit (EXIT_FAILURE);
+ }
+ result = (long double) c / CLK_TCK;
+
+ assert (isnormal (result));
+ assert (result > 0);
+ return result;
+}
+
+#endif
+#endif
+#endif
--- /dev/null
+/* Macros for taking apart, interpreting and processing file names.
+
+ These are here because some non-Posix (a.k.a. DOSish) systems have
+ drive letter brain-damage at the beginning of an absolute file name,
+ use forward- and back-slash in path names interchangeably, and
+ some of them have case-insensitive file names.
+
+ Copyright 2000, 2001, 2007 Free Software Foundation, Inc.
+
+This file is part of BFD, the Binary File Descriptor library.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
+
+#ifndef FILENAMES_H
+#define FILENAMES_H
+
+#if defined(__MSDOS__) || defined(_WIN32) || defined(__OS2__) || defined (__CYGWIN__)
+
+#ifndef HAVE_DOS_BASED_FILE_SYSTEM
+#define HAVE_DOS_BASED_FILE_SYSTEM 1
+#endif
+
+#define IS_DIR_SEPARATOR(c) ((c) == '/' || (c) == '\\')
+/* Note that IS_ABSOLUTE_PATH accepts d:foo as well, although it is
+ only semi-absolute. This is because the users of IS_ABSOLUTE_PATH
+ want to know whether to prepend the current working directory to
+ a file name, which should not be done with a name like d:foo. */
+#define IS_ABSOLUTE_PATH(f) (IS_DIR_SEPARATOR((f)[0]) || (((f)[0]) && ((f)[1] == ':')))
+
+#else /* not DOSish */
+
+#define IS_DIR_SEPARATOR(c) ((c) == '/')
+#define IS_ABSOLUTE_PATH(f) (IS_DIR_SEPARATOR((f)[0]))
+
+#endif /* not DOSish */
+
+extern int filename_cmp (const char *s1, const char *s2);
+#define FILENAME_CMP(s1, s2) filename_cmp(s1, s2)
+
+#endif /* FILENAMES_H */
--- /dev/null
+/* Libiberty basename. Like basename, but is not overridden by the
+ system C library.
+ Copyright (C) 2001, 2002 Free Software Foundation, Inc.
+
+This file is part of the libiberty library.
+Libiberty is free software; you can redistribute it and/or
+modify it under the terms of the GNU Library General Public
+License as published by the Free Software Foundation; either
+version 2 of the License, or (at your option) any later version.
+
+Libiberty is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+Library General Public License for more details.
+
+You should have received a copy of the GNU Library General Public
+License along with libiberty; see the file COPYING.LIB. If
+not, write to the Free Software Foundation, Inc., 51 Franklin Street - Fifth Floor,
+Boston, MA 02110-1301, USA. */
+
+/*
+
+@deftypefn Replacement {const char*} lbasename (const char *@var{name})
+
+Given a pointer to a string containing a typical pathname
+(@samp{/usr/src/cmd/ls/ls.c} for example), returns a pointer to the
+last component of the pathname (@samp{ls.c} in this case). The
+returned pointer is guaranteed to lie within the original
+string. This latter fact is not true of many vendor C
+libraries, which return special strings or modify the passed
+strings for particular input.
+
+In particular, the empty string returns the same empty string,
+and a path ending in @code{/} returns the empty string after it.
+
+@end deftypefn
+
+*/
+
+#ifdef HAVE_CONFIG_H
+#include "config.h"
+#endif
+#include "ansidecl.h"
+#include "libiberty.h"
+#include "safe-ctype.h"
+#include "filenames.h"
+
+const char *
+lbasename (const char *name)
+{
+ const char *base;
+
+#if defined (HAVE_DOS_BASED_FILE_SYSTEM)
+ /* Skip over a possible disk name. */
+ if (ISALPHA (name[0]) && name[1] == ':')
+ name += 2;
+#endif
+
+ for (base = name; *name; name++)
+ if (IS_DIR_SEPARATOR (*name))
+ base = name + 1;
+
+ return base;
+}
--- /dev/null
+/* Function declarations for libiberty.
+
+ Copyright 2001, 2002, 2005 Free Software Foundation, Inc.
+
+ Note - certain prototypes declared in this header file are for
+ functions whoes implementation copyright does not belong to the
+ FSF. Those prototypes are present in this file for reference
+ purposes only and their presence in this file should not construed
+ as an indication of ownership by the FSF of the implementation of
+ those functions in any way or form whatsoever.
+
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 2, or (at your option)
+ any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software
+ Foundation, Inc., 51 Franklin Street - Fifth Floor,
+ Boston, MA 02110-1301, USA.
+
+ Written by Cygnus Support, 1994.
+
+ The libiberty library provides a number of functions which are
+ missing on some operating systems. We do not declare those here,
+ to avoid conflicts with the system header files on operating
+ systems that do support those functions. In this file we only
+ declare those functions which are specific to libiberty. */
+
+#ifndef LIBIBERTY_H
+#define LIBIBERTY_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "ansidecl.h"
+
+/* Get a definition for size_t. */
+#include <stddef.h>
+/* Get a definition for va_list. */
+#include <stdarg.h>
+
+#include <stdio.h>
+
+/* If the OS supports it, ensure that the supplied stream is setup to
+ avoid any multi-threaded locking. Otherwise leave the FILE pointer
+ unchanged. If the stream is NULL do nothing. */
+
+extern void unlock_stream (FILE *);
+
+/* If the OS supports it, ensure that the standard I/O streams, stdin,
+ stdout and stderr are setup to avoid any multi-threaded locking.
+ Otherwise do nothing. */
+
+extern void unlock_std_streams (void);
+
+/* Open and return a FILE pointer. If the OS supports it, ensure that
+ the stream is setup to avoid any multi-threaded locking. Otherwise
+ return the FILE pointer unchanged. */
+
+extern FILE *fopen_unlocked (const char *, const char *);
+extern FILE *fdopen_unlocked (int, const char *);
+extern FILE *freopen_unlocked (const char *, const char *, FILE *);
+
+/* Build an argument vector from a string. Allocates memory using
+ malloc. Use freeargv to free the vector. */
+
+extern char **buildargv (const char *) ATTRIBUTE_MALLOC;
+
+/* Free a vector returned by buildargv. */
+
+extern void freeargv (char **);
+
+/* Duplicate an argument vector. Allocates memory using malloc. Use
+ freeargv to free the vector. */
+
+extern char **dupargv (char **) ATTRIBUTE_MALLOC;
+
+/* Expand "@file" arguments in argv. */
+
+extern void expandargv PARAMS ((int *, char ***));
+
+/* Write argv to an @-file, inserting necessary quoting. */
+
+extern int writeargv PARAMS ((char **, FILE *));
+
+/* Return the last component of a path name. Note that we can't use a
+ prototype here because the parameter is declared inconsistently
+ across different systems, sometimes as "char *" and sometimes as
+ "const char *" */
+
+/* HAVE_DECL_* is a three-state macro: undefined, 0 or 1. If it is
+ undefined, we haven't run the autoconf check so provide the
+ declaration without arguments. If it is 0, we checked and failed
+ to find the declaration so provide a fully prototyped one. If it
+ is 1, we found it so don't provide any declaration at all. */
+#if !HAVE_DECL_BASENAME
+#if defined (__GNU_LIBRARY__ ) || defined (__linux__) || defined (__FreeBSD__) || defined (__OpenBSD__) || defined(__NetBSD__) || defined (__CYGWIN__) || defined (__CYGWIN32__) || defined (__MINGW32__) || defined (HAVE_DECL_BASENAME)
+extern char *basename (const char *);
+#else
+/* Do not allow basename to be used if there is no prototype seen. We
+ either need to use the above prototype or have one from
+ autoconf which would result in HAVE_DECL_BASENAME being set. */
+#define basename basename_cannot_be_used_without_a_prototype
+#endif
+#endif
+
+/* A well-defined basename () that is always compiled in. */
+
+extern const char *lbasename (const char *);
+
+/* A well-defined realpath () that is always compiled in. */
+
+extern char *lrealpath (const char *);
+
+/* Concatenate an arbitrary number of strings. You must pass NULL as
+ the last argument of this function, to terminate the list of
+ strings. Allocates memory using xmalloc. */
+
+extern char *concat (const char *, ...) ATTRIBUTE_MALLOC ATTRIBUTE_SENTINEL;
+
+/* Concatenate an arbitrary number of strings. You must pass NULL as
+ the last argument of this function, to terminate the list of
+ strings. Allocates memory using xmalloc. The first argument is
+ not one of the strings to be concatenated, but if not NULL is a
+ pointer to be freed after the new string is created, similar to the
+ way xrealloc works. */
+
+extern char *reconcat (char *, const char *, ...) ATTRIBUTE_MALLOC ATTRIBUTE_SENTINEL;
+
+/* Determine the length of concatenating an arbitrary number of
+ strings. You must pass NULL as the last argument of this function,
+ to terminate the list of strings. */
+
+extern unsigned long concat_length (const char *, ...) ATTRIBUTE_SENTINEL;
+
+/* Concatenate an arbitrary number of strings into a SUPPLIED area of
+ memory. You must pass NULL as the last argument of this function,
+ to terminate the list of strings. The supplied memory is assumed
+ to be large enough. */
+
+extern char *concat_copy (char *, const char *, ...) ATTRIBUTE_SENTINEL;
+
+/* Concatenate an arbitrary number of strings into a GLOBAL area of
+ memory. You must pass NULL as the last argument of this function,
+ to terminate the list of strings. The supplied memory is assumed
+ to be large enough. */
+
+extern char *concat_copy2 (const char *, ...) ATTRIBUTE_SENTINEL;
+
+/* This is the global area used by concat_copy2. */
+
+extern char *libiberty_concat_ptr;
+
+/* Concatenate an arbitrary number of strings. You must pass NULL as
+ the last argument of this function, to terminate the list of
+ strings. Allocates memory using alloca. The arguments are
+ evaluated twice! */
+#define ACONCAT(ACONCAT_PARAMS) \
+ (libiberty_concat_ptr = (char *) alloca (concat_length ACONCAT_PARAMS + 1), \
+ concat_copy2 ACONCAT_PARAMS)
+
+/* Check whether two file descriptors refer to the same file. */
+
+extern int fdmatch (int fd1, int fd2);
+
+/* Return the position of the first bit set in the argument. */
+/* Prototypes vary from system to system, so we only provide a
+ prototype on systems where we know that we need it. */
+#if defined (HAVE_DECL_FFS) && !HAVE_DECL_FFS
+extern int ffs(int);
+#endif
+
+/* Get the working directory. The result is cached, so don't call
+ chdir() between calls to getpwd(). */
+
+extern char * getpwd (void);
+
+/* Get the current time. */
+/* Prototypes vary from system to system, so we only provide a
+ prototype on systems where we know that we need it. */
+#ifdef __MINGW32__
+/* Forward declaration to avoid #include <sys/time.h>. */
+struct timeval;
+extern int gettimeofday (struct timeval *, void *);
+#endif
+
+/* Get the amount of time the process has run, in microseconds. */
+
+extern long get_run_time (void);
+
+/* Generate a relocated path to some installation directory. Allocates
+ return value using malloc. */
+
+extern char *make_relative_prefix (const char *, const char *,
+ const char *) ATTRIBUTE_MALLOC;
+
+/* Generate a relocated path to some installation directory without
+ attempting to follow any soft links. Allocates
+ return value using malloc. */
+
+extern char *make_relative_prefix_ignore_links (const char *, const char *,
+ const char *) ATTRIBUTE_MALLOC;
+
+/* Choose a temporary directory to use for scratch files. */
+
+extern char *choose_temp_base (void) ATTRIBUTE_MALLOC;
+
+/* Return a temporary file name or NULL if unable to create one. */
+
+extern char *make_temp_file (const char *) ATTRIBUTE_MALLOC;
+
+/* Remove a link to a file unless it is special. */
+
+extern int unlink_if_ordinary (const char *);
+
+/* Allocate memory filled with spaces. Allocates using malloc. */
+
+extern const char *spaces (int count);
+
+/* Return the maximum error number for which strerror will return a
+ string. */
+
+extern int errno_max (void);
+
+/* Return the name of an errno value (e.g., strerrno (EINVAL) returns
+ "EINVAL"). */
+
+extern const char *strerrno (int);
+
+/* Given the name of an errno value, return the value. */
+
+extern int strtoerrno (const char *);
+
+/* ANSI's strerror(), but more robust. */
+
+extern char *xstrerror (int);
+
+/* Return the maximum signal number for which strsignal will return a
+ string. */
+
+extern int signo_max (void);
+
+/* Return a signal message string for a signal number
+ (e.g., strsignal (SIGHUP) returns something like "Hangup"). */
+/* This is commented out as it can conflict with one in system headers.
+ We still document its existence though. */
+
+/*extern const char *strsignal (int);*/
+
+/* Return the name of a signal number (e.g., strsigno (SIGHUP) returns
+ "SIGHUP"). */
+
+extern const char *strsigno (int);
+
+/* Given the name of a signal, return its number. */
+
+extern int strtosigno (const char *);
+
+/* Register a function to be run by xexit. Returns 0 on success. */
+
+extern int xatexit (void (*fn) (void));
+
+/* Exit, calling all the functions registered with xatexit. */
+
+extern void xexit (int status) ATTRIBUTE_NORETURN;
+
+/* Set the program name used by xmalloc. */
+
+extern void xmalloc_set_program_name (const char *);
+
+/* Report an allocation failure. */
+extern void xmalloc_failed (size_t) ATTRIBUTE_NORETURN;
+
+/* Allocate memory without fail. If malloc fails, this will print a
+ message to stderr (using the name set by xmalloc_set_program_name,
+ if any) and then call xexit. */
+
+extern void *xmalloc (size_t) ATTRIBUTE_MALLOC;
+
+/* Reallocate memory without fail. This works like xmalloc. Note,
+ realloc type functions are not suitable for attribute malloc since
+ they may return the same address across multiple calls. */
+
+extern void *xrealloc (void *, size_t);
+
+/* Allocate memory without fail and set it to zero. This works like
+ xmalloc. */
+
+extern void *xcalloc (size_t, size_t) ATTRIBUTE_MALLOC;
+
+/* Copy a string into a memory buffer without fail. */
+
+extern char *xstrdup (const char *) ATTRIBUTE_MALLOC;
+
+/* Copy at most N characters from string into a buffer without fail. */
+
+extern char *xstrndup (const char *, size_t) ATTRIBUTE_MALLOC;
+
+/* Copy an existing memory buffer to a new memory buffer without fail. */
+
+extern void *xmemdup (const void *, size_t, size_t) ATTRIBUTE_MALLOC;
+
+/* Physical memory routines. Return values are in BYTES. */
+extern double physmem_total (void);
+extern double physmem_available (void);
+
+
+/* These macros provide a K&R/C89/C++-friendly way of allocating structures
+ with nice encapsulation. The XDELETE*() macros are technically
+ superfluous, but provided here for symmetry. Using them consistently
+ makes it easier to update client code to use different allocators such
+ as new/delete and new[]/delete[]. */
+
+/* Scalar allocators. */
+
+#define XNEW(T) ((T *) xmalloc (sizeof (T)))
+#define XCNEW(T) ((T *) xcalloc (1, sizeof (T)))
+#define XDELETE(P) free ((void*) (P))
+
+/* Array allocators. */
+
+#define XNEWVEC(T, N) ((T *) xmalloc (sizeof (T) * (N)))
+#define XCNEWVEC(T, N) ((T *) xcalloc ((N), sizeof (T)))
+#define XRESIZEVEC(T, P, N) ((T *) xrealloc ((void *) (P), sizeof (T) * (N)))
+#define XDELETEVEC(P) free ((void*) (P))
+
+/* Allocators for variable-sized structures and raw buffers. */
+
+#define XNEWVAR(T, S) ((T *) xmalloc ((S)))
+#define XCNEWVAR(T, S) ((T *) xcalloc (1, (S)))
+#define XRESIZEVAR(T, P, S) ((T *) xrealloc ((P), (S)))
+
+/* Type-safe obstack allocator. */
+
+#define XOBNEW(O, T) ((T *) obstack_alloc ((O), sizeof (T)))
+#define XOBFINISH(O, T) ((T) obstack_finish ((O)))
+
+/* hex character manipulation routines */
+
+#define _hex_array_size 256
+#define _hex_bad 99
+extern const unsigned char _hex_value[_hex_array_size];
+extern void hex_init (void);
+#define hex_p(c) (hex_value (c) != _hex_bad)
+/* If you change this, note well: Some code relies on side effects in
+ the argument being performed exactly once. */
+#define hex_value(c) ((unsigned int) _hex_value[(unsigned char) (c)])
+
+/* Flags for pex_init. These are bits to be or'ed together. */
+
+/* Record subprocess times, if possible. */
+#define PEX_RECORD_TIMES 0x1
+
+/* Use pipes for communication between processes, if possible. */
+#define PEX_USE_PIPES 0x2
+
+/* Save files used for communication between processes. */
+#define PEX_SAVE_TEMPS 0x4
+
+/* Prepare to execute one or more programs, with standard output of
+ each program fed to standard input of the next.
+ FLAGS As above.
+ PNAME The name of the program to report in error messages.
+ TEMPBASE A base name to use for temporary files; may be NULL to
+ use a random name.
+ Returns NULL on error. */
+
+extern struct pex_obj *pex_init (int flags, const char *pname,
+ const char *tempbase);
+
+/* Flags for pex_run. These are bits to be or'ed together. */
+
+/* Last program in pipeline. Standard output of program goes to
+ OUTNAME, or, if OUTNAME is NULL, to standard output of caller. Do
+ not set this if you want to call pex_read_output. After this is
+ set, pex_run may no longer be called with the same struct
+ pex_obj. */
+#define PEX_LAST 0x1
+
+/* Search for program in executable search path. */
+#define PEX_SEARCH 0x2
+
+/* OUTNAME is a suffix. */
+#define PEX_SUFFIX 0x4
+
+/* Send program's standard error to standard output. */
+#define PEX_STDERR_TO_STDOUT 0x8
+
+/* Input file should be opened in binary mode. This flag is ignored
+ on Unix. */
+#define PEX_BINARY_INPUT 0x10
+
+/* Output file should be opened in binary mode. This flag is ignored
+ on Unix. For proper behaviour PEX_BINARY_INPUT and
+ PEX_BINARY_OUTPUT have to match appropriately--i.e., a call using
+ PEX_BINARY_OUTPUT should be followed by a call using
+ PEX_BINARY_INPUT. */
+#define PEX_BINARY_OUTPUT 0x20
+
+/* Capture stderr to a pipe. The output can be read by
+ calling pex_read_err and reading from the returned
+ FILE object. This flag may be specified only for
+ the last program in a pipeline.
+
+ This flag is supported only on Unix and Windows. */
+#define PEX_STDERR_TO_PIPE 0x40
+
+/* Capture stderr in binary mode. This flag is ignored
+ on Unix. */
+#define PEX_BINARY_ERROR 0x80
+
+
+/* Execute one program. Returns NULL on success. On error returns an
+ error string (typically just the name of a system call); the error
+ string is statically allocated.
+
+ OBJ Returned by pex_init.
+
+ FLAGS As above.
+
+ EXECUTABLE The program to execute.
+
+ ARGV NULL terminated array of arguments to pass to the program.
+
+ OUTNAME Sets the output file name as follows:
+
+ PEX_SUFFIX set (OUTNAME may not be NULL):
+ TEMPBASE parameter to pex_init not NULL:
+ Output file name is the concatenation of TEMPBASE
+ and OUTNAME.
+ TEMPBASE is NULL:
+ Output file name is a random file name ending in
+ OUTNAME.
+ PEX_SUFFIX not set:
+ OUTNAME not NULL:
+ Output file name is OUTNAME.
+ OUTNAME NULL, TEMPBASE not NULL:
+ Output file name is randomly chosen using
+ TEMPBASE.
+ OUTNAME NULL, TEMPBASE NULL:
+ Output file name is randomly chosen.
+
+ If PEX_LAST is not set, the output file name is the
+ name to use for a temporary file holding stdout, if
+ any (there will not be a file if PEX_USE_PIPES is set
+ and the system supports pipes). If a file is used, it
+ will be removed when no longer needed unless
+ PEX_SAVE_TEMPS is set.
+
+ If PEX_LAST is set, and OUTNAME is not NULL, standard
+ output is written to the output file name. The file
+ will not be removed. If PEX_LAST and PEX_SUFFIX are
+ both set, TEMPBASE may not be NULL.
+
+ ERRNAME If not NULL, this is the name of a file to which
+ standard error is written. If NULL, standard error of
+ the program is standard error of the caller.
+
+ ERR On an error return, *ERR is set to an errno value, or
+ to 0 if there is no relevant errno.
+*/
+
+extern const char *pex_run (struct pex_obj *obj, int flags,
+ const char *executable, char * const *argv,
+ const char *outname, const char *errname,
+ int *err);
+
+/* As for pex_run (), but takes an extra parameter to enable the
+ environment for the child process to be specified.
+
+ ENV The environment for the child process, specified as
+ an array of character pointers. Each element of the
+ array should point to a string of the form VAR=VALUE,
+ with the exception of the last element which must be
+ a null pointer.
+*/
+
+extern const char *pex_run_in_environment (struct pex_obj *obj, int flags,
+ const char *executable,
+ char * const *argv,
+ char * const *env,
+ const char *outname,
+ const char *errname, int *err);
+
+/* Return a stream for a temporary file to pass to the first program
+ in the pipeline as input. The file name is chosen as for pex_run.
+ pex_run closes the file automatically; don't close it yourself. */
+
+extern FILE *pex_input_file (struct pex_obj *obj, int flags,
+ const char *in_name);
+
+/* Return a stream for a pipe connected to the standard input of the
+ first program in the pipeline. You must have passed
+ `PEX_USE_PIPES' to `pex_init'. Close the returned stream
+ yourself. */
+
+extern FILE *pex_input_pipe (struct pex_obj *obj, int binary);
+
+/* Read the standard output of the last program to be executed.
+ pex_run can not be called after this. BINARY should be non-zero if
+ the file should be opened in binary mode; this is ignored on Unix.
+ Returns NULL on error. Don't call fclose on the returned FILE; it
+ will be closed by pex_free. */
+
+extern FILE *pex_read_output (struct pex_obj *, int binary);
+
+/* Read the standard error of the last program to be executed.
+ pex_run can not be called after this. BINARY should be non-zero if
+ the file should be opened in binary mode; this is ignored on Unix.
+ Returns NULL on error. Don't call fclose on the returned FILE; it
+ will be closed by pex_free. */
+
+extern FILE *pex_read_err (struct pex_obj *, int binary);
+
+/* Return exit status of all programs in VECTOR. COUNT indicates the
+ size of VECTOR. The status codes in the vector are in the order of
+ the calls to pex_run. Returns 0 on error, 1 on success. */
+
+extern int pex_get_status (struct pex_obj *, int count, int *vector);
+
+/* Return times of all programs in VECTOR. COUNT indicates the size
+ of VECTOR. struct pex_time is really just struct timeval, but that
+ is not portable to all systems. Returns 0 on error, 1 on
+ success. */
+
+struct pex_time
+{
+ unsigned long user_seconds;
+ unsigned long user_microseconds;
+ unsigned long system_seconds;
+ unsigned long system_microseconds;
+};
+
+extern int pex_get_times (struct pex_obj *, int count,
+ struct pex_time *vector);
+
+/* Clean up a pex_obj. */
+
+extern void pex_free (struct pex_obj *);
+
+/* Just execute one program. Return value is as for pex_run.
+ FLAGS Combination of PEX_SEARCH and PEX_STDERR_TO_STDOUT.
+ EXECUTABLE As for pex_run.
+ ARGV As for pex_run.
+ PNAME As for pex_init.
+ OUTNAME As for pex_run when PEX_LAST is set.
+ ERRNAME As for pex_run.
+ STATUS Set to exit status on success.
+ ERR As for pex_run.
+*/
+
+extern const char *pex_one (int flags, const char *executable,
+ char * const *argv, const char *pname,
+ const char *outname, const char *errname,
+ int *status, int *err);
+
+/* pexecute and pwait are the old pexecute interface, still here for
+ backward compatibility. Don't use these for new code. Instead,
+ use pex_init/pex_run/pex_get_status/pex_free, or pex_one. */
+
+/* Definitions used by the pexecute routine. */
+
+#define PEXECUTE_FIRST 1
+#define PEXECUTE_LAST 2
+#define PEXECUTE_ONE (PEXECUTE_FIRST + PEXECUTE_LAST)
+#define PEXECUTE_SEARCH 4
+#define PEXECUTE_VERBOSE 8
+
+/* Execute a program. */
+
+extern int pexecute (const char *, char * const *, const char *,
+ const char *, char **, char **, int);
+
+/* Wait for pexecute to finish. */
+
+extern int pwait (int, int *, int);
+
+#if !HAVE_DECL_ASPRINTF
+/* Like sprintf but provides a pointer to malloc'd storage, which must
+ be freed by the caller. */
+
+extern int asprintf (char **, const char *, ...) ATTRIBUTE_PRINTF_2;
+#endif
+
+#if !HAVE_DECL_VASPRINTF
+/* Like vsprintf but provides a pointer to malloc'd storage, which
+ must be freed by the caller. */
+
+extern int vasprintf (char **, const char *, va_list) ATTRIBUTE_PRINTF(2,0);
+#endif
+
+#if defined(HAVE_DECL_SNPRINTF) && !HAVE_DECL_SNPRINTF
+/* Like sprintf but prints at most N characters. */
+extern int snprintf (char *, size_t, const char *, ...) ATTRIBUTE_PRINTF_3;
+#endif
+
+#if defined(HAVE_DECL_VSNPRINTF) && !HAVE_DECL_VSNPRINTF
+/* Like vsprintf but prints at most N characters. */
+extern int vsnprintf (char *, size_t, const char *, va_list) ATTRIBUTE_PRINTF(3,0);
+#endif
+
+#if defined(HAVE_DECL_STRVERSCMP) && !HAVE_DECL_STRVERSCMP
+/* Compare version strings. */
+extern int strverscmp (const char *, const char *);
+#endif
+
+#define ARRAY_SIZE(a) (sizeof (a) / sizeof ((a)[0]))
+
+/* Drastically simplified alloca configurator. If we're using GCC,
+ we use __builtin_alloca; otherwise we use the C alloca. The C
+ alloca is always available. You can override GCC by defining
+ USE_C_ALLOCA yourself. The canonical autoconf macro C_ALLOCA is
+ also set/unset as it is often used to indicate whether code needs
+ to call alloca(0). */
+extern void *C_alloca (size_t) ATTRIBUTE_MALLOC;
+#undef alloca
+#if GCC_VERSION >= 2000 && !defined USE_C_ALLOCA
+# define alloca(x) __builtin_alloca(x)
+# undef C_ALLOCA
+# define ASTRDUP(X) \
+ (__extension__ ({ const char *const libiberty_optr = (X); \
+ const unsigned long libiberty_len = strlen (libiberty_optr) + 1; \
+ char *const libiberty_nptr = (char *const) alloca (libiberty_len); \
+ (char *) memcpy (libiberty_nptr, libiberty_optr, libiberty_len); }))
+#else
+# define alloca(x) C_alloca(x)
+# undef USE_C_ALLOCA
+# define USE_C_ALLOCA 1
+# undef C_ALLOCA
+# define C_ALLOCA 1
+extern const char *libiberty_optr;
+extern char *libiberty_nptr;
+extern unsigned long libiberty_len;
+# define ASTRDUP(X) \
+ (libiberty_optr = (X), \
+ libiberty_len = strlen (libiberty_optr) + 1, \
+ libiberty_nptr = (char *) alloca (libiberty_len), \
+ (char *) memcpy (libiberty_nptr, libiberty_optr, libiberty_len))
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+
+
+#endif /* ! defined (LIBIBERTY_H) */
--- /dev/null
+/* Libiberty realpath. Like realpath, but more consistent behavior.
+ Based on gdb_realpath from GDB.
+
+ Copyright 2003 Free Software Foundation, Inc.
+
+ This file is part of the libiberty library.
+
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 2 of the License, or
+ (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software
+ Foundation, Inc., 51 Franklin Street - Fifth Floor,
+ Boston, MA 02110-1301, USA. */
+
+/*
+
+@deftypefn Replacement {const char*} lrealpath (const char *@var{name})
+
+Given a pointer to a string containing a pathname, returns a canonical
+version of the filename. Symlinks will be resolved, and ``.'' and ``..''
+components will be simplified. The returned value will be allocated using
+@code{malloc}, or @code{NULL} will be returned on a memory allocation error.
+
+@end deftypefn
+
+*/
+
+#include "config.h"
+#include "ansidecl.h"
+#include "libiberty.h"
+
+#ifdef HAVE_LIMITS_H
+#include <limits.h>
+#endif
+#ifdef HAVE_STDLIB_H
+#include <stdlib.h>
+#endif
+#ifdef HAVE_UNISTD_H
+#include <unistd.h>
+#endif
+#ifdef HAVE_STRING_H
+#include <string.h>
+#endif
+
+/* On GNU libc systems the declaration is only visible with _GNU_SOURCE. */
+#if defined(HAVE_CANONICALIZE_FILE_NAME) \
+ && defined(NEED_DECLARATION_CANONICALIZE_FILE_NAME)
+extern char *canonicalize_file_name (const char *);
+#endif
+
+#if defined(HAVE_REALPATH)
+# if defined (PATH_MAX)
+# define REALPATH_LIMIT PATH_MAX
+# else
+# if defined (MAXPATHLEN)
+# define REALPATH_LIMIT MAXPATHLEN
+# endif
+# endif
+#else
+ /* cygwin has realpath, so it won't get here. */
+# if defined (_WIN32)
+# define WIN32_LEAN_AND_MEAN
+# include <windows.h> /* for GetFullPathName */
+# endif
+#endif
+
+char *
+lrealpath (const char *filename)
+{
+ /* Method 1: The system has a compile time upper bound on a filename
+ path. Use that and realpath() to canonicalize the name. This is
+ the most common case. Note that, if there isn't a compile time
+ upper bound, you want to avoid realpath() at all costs. */
+#if defined(REALPATH_LIMIT)
+ {
+ char buf[REALPATH_LIMIT];
+ const char *rp = realpath (filename, buf);
+ if (rp == NULL)
+ rp = filename;
+ return strdup (rp);
+ }
+#endif /* REALPATH_LIMIT */
+
+ /* Method 2: The host system (i.e., GNU) has the function
+ canonicalize_file_name() which malloc's a chunk of memory and
+ returns that, use that. */
+#if defined(HAVE_CANONICALIZE_FILE_NAME)
+ {
+ char *rp = canonicalize_file_name (filename);
+ if (rp == NULL)
+ return strdup (filename);
+ else
+ return rp;
+ }
+#endif
+
+ /* Method 3: Now we're getting desperate! The system doesn't have a
+ compile time buffer size and no alternative function. Query the
+ OS, using pathconf(), for the buffer limit. Care is needed
+ though, some systems do not limit PATH_MAX (return -1 for
+ pathconf()) making it impossible to pass a correctly sized buffer
+ to realpath() (it could always overflow). On those systems, we
+ skip this. */
+#if defined (HAVE_REALPATH) && defined (HAVE_UNISTD_H)
+ {
+ /* Find out the max path size. */
+ long path_max = pathconf ("/", _PC_PATH_MAX);
+ if (path_max > 0)
+ {
+ /* PATH_MAX is bounded. */
+ char *buf, *rp, *ret;
+ buf = (char *) malloc (path_max);
+ if (buf == NULL)
+ return NULL;
+ rp = realpath (filename, buf);
+ ret = strdup (rp ? rp : filename);
+ free (buf);
+ return ret;
+ }
+ }
+#endif
+
+ /* The MS Windows method. If we don't have realpath, we assume we
+ don't have symlinks and just canonicalize to a Windows absolute
+ path. GetFullPath converts ../ and ./ in relative paths to
+ absolute paths, filling in current drive if one is not given
+ or using the current directory of a specified drive (eg, "E:foo").
+ It also converts all forward slashes to back slashes. */
+#if defined (_WIN32)
+ {
+ char buf[MAX_PATH];
+ char* basename;
+ DWORD len = GetFullPathName (filename, MAX_PATH, buf, &basename);
+ if (len == 0 || len > MAX_PATH - 1)
+ return strdup (filename);
+ else
+ {
+ /* The file system is case-preserving but case-insensitive,
+ Canonicalize to lowercase, using the codepage associated
+ with the process locale. */
+ CharLowerBuff (buf, len);
+ return strdup (buf);
+ }
+ }
+#endif
+
+ /* This system is a lost cause, just duplicate the filename. */
+ return strdup (filename);
+}
--- /dev/null
+/* Relative (relocatable) prefix support.
+ Copyright (C) 1987, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
+ 1999, 2000, 2001, 2002, 2006 Free Software Foundation, Inc.
+
+This file is part of libiberty.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 2, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+for more details.
+
+You should have received a copy of the GNU General Public License
+along with GCC; see the file COPYING. If not, write to the Free
+Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
+02110-1301, USA. */
+
+/*
+
+@deftypefn Extension {const char*} make_relative_prefix (const char *@var{progname}, const char *@var{bin_prefix}, const char *@var{prefix})
+
+Given three paths @var{progname}, @var{bin_prefix}, @var{prefix},
+return the path that is in the same position relative to
+@var{progname}'s directory as @var{prefix} is relative to
+@var{bin_prefix}. That is, a string starting with the directory
+portion of @var{progname}, followed by a relative pathname of the
+difference between @var{bin_prefix} and @var{prefix}.
+
+If @var{progname} does not contain any directory separators,
+@code{make_relative_prefix} will search @env{PATH} to find a program
+named @var{progname}. Also, if @var{progname} is a symbolic link,
+the symbolic link will be resolved.
+
+For example, if @var{bin_prefix} is @code{/alpha/beta/gamma/gcc/delta},
+@var{prefix} is @code{/alpha/beta/gamma/omega/}, and @var{progname} is
+@code{/red/green/blue/gcc}, then this function will return
+@code{/red/green/blue/../../omega/}.
+
+The return value is normally allocated via @code{malloc}. If no
+relative prefix can be found, return @code{NULL}.
+
+@end deftypefn
+
+*/
+
+#ifdef HAVE_CONFIG_H
+#include "config.h"
+#endif
+
+#ifdef HAVE_STDLIB_H
+#include <stdlib.h>
+#endif
+#ifdef HAVE_UNISTD_H
+#include <unistd.h>
+#endif
+
+#include <string.h>
+
+#include "ansidecl.h"
+#include "libiberty.h"
+
+#ifndef R_OK
+#define R_OK 4
+#define W_OK 2
+#define X_OK 1
+#endif
+
+#ifndef DIR_SEPARATOR
+# define DIR_SEPARATOR '/'
+#endif
+
+#if defined (_WIN32) || defined (__MSDOS__) \
+ || defined (__DJGPP__) || defined (__OS2__)
+# define HAVE_DOS_BASED_FILE_SYSTEM
+# define HAVE_HOST_EXECUTABLE_SUFFIX
+# define HOST_EXECUTABLE_SUFFIX ".exe"
+# ifndef DIR_SEPARATOR_2
+# define DIR_SEPARATOR_2 '\\'
+# endif
+# define PATH_SEPARATOR ';'
+#else
+# define PATH_SEPARATOR ':'
+#endif
+
+#ifndef DIR_SEPARATOR_2
+# define IS_DIR_SEPARATOR(ch) ((ch) == DIR_SEPARATOR)
+#else
+# define IS_DIR_SEPARATOR(ch) \
+ (((ch) == DIR_SEPARATOR) || ((ch) == DIR_SEPARATOR_2))
+#endif
+
+#define DIR_UP ".."
+
+static char *save_string (const char *, int);
+static char **split_directories (const char *, int *);
+static void free_split_directories (char **);
+
+static char *
+save_string (const char *s, int len)
+{
+ char *result = (char *) malloc (len + 1);
+
+ memcpy (result, s, len);
+ result[len] = 0;
+ return result;
+}
+
+/* Split a filename into component directories. */
+
+static char **
+split_directories (const char *name, int *ptr_num_dirs)
+{
+ int num_dirs = 0;
+ char **dirs;
+ const char *p, *q;
+ int ch;
+
+ /* Count the number of directories. Special case MSDOS disk names as part
+ of the initial directory. */
+ p = name;
+#ifdef HAVE_DOS_BASED_FILE_SYSTEM
+ if (name[1] == ':' && IS_DIR_SEPARATOR (name[2]))
+ {
+ p += 3;
+ num_dirs++;
+ }
+#endif /* HAVE_DOS_BASED_FILE_SYSTEM */
+
+ while ((ch = *p++) != '\0')
+ {
+ if (IS_DIR_SEPARATOR (ch))
+ {
+ num_dirs++;
+ while (IS_DIR_SEPARATOR (*p))
+ p++;
+ }
+ }
+
+ dirs = (char **) malloc (sizeof (char *) * (num_dirs + 2));
+ if (dirs == NULL)
+ return NULL;
+
+ /* Now copy the directory parts. */
+ num_dirs = 0;
+ p = name;
+#ifdef HAVE_DOS_BASED_FILE_SYSTEM
+ if (name[1] == ':' && IS_DIR_SEPARATOR (name[2]))
+ {
+ dirs[num_dirs++] = save_string (p, 3);
+ if (dirs[num_dirs - 1] == NULL)
+ {
+ free (dirs);
+ return NULL;
+ }
+ p += 3;
+ }
+#endif /* HAVE_DOS_BASED_FILE_SYSTEM */
+
+ q = p;
+ while ((ch = *p++) != '\0')
+ {
+ if (IS_DIR_SEPARATOR (ch))
+ {
+ while (IS_DIR_SEPARATOR (*p))
+ p++;
+
+ dirs[num_dirs++] = save_string (q, p - q);
+ if (dirs[num_dirs - 1] == NULL)
+ {
+ dirs[num_dirs] = NULL;
+ free_split_directories (dirs);
+ return NULL;
+ }
+ q = p;
+ }
+ }
+
+ if (p - 1 - q > 0)
+ dirs[num_dirs++] = save_string (q, p - 1 - q);
+ dirs[num_dirs] = NULL;
+
+ if (dirs[num_dirs - 1] == NULL)
+ {
+ free_split_directories (dirs);
+ return NULL;
+ }
+
+ if (ptr_num_dirs)
+ *ptr_num_dirs = num_dirs;
+ return dirs;
+}
+
+/* Release storage held by split directories. */
+
+static void
+free_split_directories (char **dirs)
+{
+ int i = 0;
+
+ if (dirs != NULL)
+ {
+ while (dirs[i] != NULL)
+ free (dirs[i++]);
+
+ free ((char *) dirs);
+ }
+}
+
+/* Given three strings PROGNAME, BIN_PREFIX, PREFIX, return a string that gets
+ to PREFIX starting with the directory portion of PROGNAME and a relative
+ pathname of the difference between BIN_PREFIX and PREFIX.
+
+ For example, if BIN_PREFIX is /alpha/beta/gamma/gcc/delta, PREFIX is
+ /alpha/beta/gamma/omega/, and PROGNAME is /red/green/blue/gcc, then this
+ function will return /red/green/blue/../../omega/.
+
+ If no relative prefix can be found, return NULL. */
+
+static char *
+make_relative_prefix_1 (const char *progname, const char *bin_prefix,
+ const char *prefix, const int resolve_links)
+{
+ char **prog_dirs = NULL, **bin_dirs = NULL, **prefix_dirs = NULL;
+ int prog_num, bin_num, prefix_num;
+ int i, n, common;
+ int needed_len;
+ char *ret = NULL, *ptr, *full_progname;
+
+ if (progname == NULL || bin_prefix == NULL || prefix == NULL)
+ return NULL;
+
+ /* If there is no full pathname, try to find the program by checking in each
+ of the directories specified in the PATH environment variable. */
+ if (lbasename (progname) == progname)
+ {
+ char *temp;
+
+ temp = getenv ("PATH");
+ if (temp)
+ {
+ char *startp, *endp, *nstore;
+ size_t prefixlen = strlen (temp) + 1;
+ if (prefixlen < 2)
+ prefixlen = 2;
+
+ nstore = (char *) alloca (prefixlen + strlen (progname) + 1);
+
+ startp = endp = temp;
+ while (1)
+ {
+ if (*endp == PATH_SEPARATOR || *endp == 0)
+ {
+ if (endp == startp)
+ {
+ nstore[0] = '.';
+ nstore[1] = DIR_SEPARATOR;
+ nstore[2] = '\0';
+ }
+ else
+ {
+ strncpy (nstore, startp, endp - startp);
+ if (! IS_DIR_SEPARATOR (endp[-1]))
+ {
+ nstore[endp - startp] = DIR_SEPARATOR;
+ nstore[endp - startp + 1] = 0;
+ }
+ else
+ nstore[endp - startp] = 0;
+ }
+ strcat (nstore, progname);
+ if (! access (nstore, X_OK)
+#ifdef HAVE_HOST_EXECUTABLE_SUFFIX
+ || ! access (strcat (nstore, HOST_EXECUTABLE_SUFFIX), X_OK)
+#endif
+ )
+ {
+ progname = nstore;
+ break;
+ }
+
+ if (*endp == 0)
+ break;
+ endp = startp = endp + 1;
+ }
+ else
+ endp++;
+ }
+ }
+ }
+
+ if ( resolve_links )
+ {
+ full_progname = lrealpath (progname);
+ if (full_progname == NULL)
+ return NULL;
+ }
+ else
+ full_progname = strdup(progname);
+
+ prog_dirs = split_directories (full_progname, &prog_num);
+ free (full_progname);
+ if (prog_dirs == NULL)
+ return NULL;
+
+ bin_dirs = split_directories (bin_prefix, &bin_num);
+ if (bin_dirs == NULL)
+ goto bailout;
+
+ /* Remove the program name from comparison of directory names. */
+ prog_num--;
+
+ /* If we are still installed in the standard location, we don't need to
+ specify relative directories. Also, if argv[0] still doesn't contain
+ any directory specifiers after the search above, then there is not much
+ we can do. */
+ if (prog_num == bin_num)
+ {
+ for (i = 0; i < bin_num; i++)
+ {
+ if (strcmp (prog_dirs[i], bin_dirs[i]) != 0)
+ break;
+ }
+
+ if (prog_num <= 0 || i == bin_num)
+ goto bailout;
+ }
+
+ prefix_dirs = split_directories (prefix, &prefix_num);
+ if (prefix_dirs == NULL)
+ goto bailout;
+
+ /* Find how many directories are in common between bin_prefix & prefix. */
+ n = (prefix_num < bin_num) ? prefix_num : bin_num;
+ for (common = 0; common < n; common++)
+ {
+ if (strcmp (bin_dirs[common], prefix_dirs[common]) != 0)
+ break;
+ }
+
+ /* If there are no common directories, there can be no relative prefix. */
+ if (common == 0)
+ goto bailout;
+
+ /* Two passes: first figure out the size of the result string, and
+ then construct it. */
+ needed_len = 0;
+ for (i = 0; i < prog_num; i++)
+ needed_len += strlen (prog_dirs[i]);
+ needed_len += sizeof (DIR_UP) * (bin_num - common);
+ for (i = common; i < prefix_num; i++)
+ needed_len += strlen (prefix_dirs[i]);
+ needed_len += 1; /* Trailing NUL. */
+
+ ret = (char *) malloc (needed_len);
+ if (ret == NULL)
+ goto bailout;
+
+ /* Build up the pathnames in argv[0]. */
+ *ret = '\0';
+ for (i = 0; i < prog_num; i++)
+ strcat (ret, prog_dirs[i]);
+
+ /* Now build up the ..'s. */
+ ptr = ret + strlen(ret);
+ for (i = common; i < bin_num; i++)
+ {
+ strcpy (ptr, DIR_UP);
+ ptr += sizeof (DIR_UP) - 1;
+ *(ptr++) = DIR_SEPARATOR;
+ }
+ *ptr = '\0';
+
+ /* Put in directories to move over to prefix. */
+ for (i = common; i < prefix_num; i++)
+ strcat (ret, prefix_dirs[i]);
+
+ bailout:
+ free_split_directories (prog_dirs);
+ free_split_directories (bin_dirs);
+ free_split_directories (prefix_dirs);
+
+ return ret;
+}
+
+
+/* Do the full job, including symlink resolution.
+ This path will find files installed in the same place as the
+ program even when a soft link has been made to the program
+ from somwhere else. */
+
+char *
+make_relative_prefix (const char *progname, const char *bin_prefix,
+ const char *prefix)
+{
+ return make_relative_prefix_1 (progname, bin_prefix, prefix, 1);
+}
+
+/* Make the relative pathname without attempting to resolve any links.
+ '..' etc may also be left in the pathname.
+ This will find the files the user meant the program to find if the
+ installation is patched together with soft links. */
+
+char *
+make_relative_prefix_ignore_links (const char *progname,
+ const char *bin_prefix,
+ const char *prefix)
+{
+ return make_relative_prefix_1 (progname, bin_prefix, prefix, 0);
+}
+
--- /dev/null
+/* <ctype.h> replacement macros.
+
+ Copyright (C) 2000, 2001, 2002, 2003, 2004,
+ 2005 Free Software Foundation, Inc.
+ Contributed by Zack Weinberg <zackw@stanford.edu>.
+
+This file is part of the libiberty library.
+Libiberty is free software; you can redistribute it and/or
+modify it under the terms of the GNU Library General Public
+License as published by the Free Software Foundation; either
+version 2 of the License, or (at your option) any later version.
+
+Libiberty is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+Library General Public License for more details.
+
+You should have received a copy of the GNU Library General Public
+License along with libiberty; see the file COPYING.LIB. If
+not, write to the Free Software Foundation, Inc., 51 Franklin Street - Fifth Floor,
+Boston, MA 02110-1301, USA. */
+
+/*
+
+@defvr Extension HOST_CHARSET
+This macro indicates the basic character set and encoding used by the
+host: more precisely, the encoding used for character constants in
+preprocessor @samp{#if} statements (the C "execution character set").
+It is defined by @file{safe-ctype.h}, and will be an integer constant
+with one of the following values:
+
+@ftable @code
+@item HOST_CHARSET_UNKNOWN
+The host character set is unknown - that is, not one of the next two
+possibilities.
+
+@item HOST_CHARSET_ASCII
+The host character set is ASCII.
+
+@item HOST_CHARSET_EBCDIC
+The host character set is some variant of EBCDIC. (Only one of the
+nineteen EBCDIC varying characters is tested; exercise caution.)
+@end ftable
+@end defvr
+
+@deffn Extension ISALPHA (@var{c})
+@deffnx Extension ISALNUM (@var{c})
+@deffnx Extension ISBLANK (@var{c})
+@deffnx Extension ISCNTRL (@var{c})
+@deffnx Extension ISDIGIT (@var{c})
+@deffnx Extension ISGRAPH (@var{c})
+@deffnx Extension ISLOWER (@var{c})
+@deffnx Extension ISPRINT (@var{c})
+@deffnx Extension ISPUNCT (@var{c})
+@deffnx Extension ISSPACE (@var{c})
+@deffnx Extension ISUPPER (@var{c})
+@deffnx Extension ISXDIGIT (@var{c})
+
+These twelve macros are defined by @file{safe-ctype.h}. Each has the
+same meaning as the corresponding macro (with name in lowercase)
+defined by the standard header @file{ctype.h}. For example,
+@code{ISALPHA} returns true for alphabetic characters and false for
+others. However, there are two differences between these macros and
+those provided by @file{ctype.h}:
+
+@itemize @bullet
+@item These macros are guaranteed to have well-defined behavior for all
+values representable by @code{signed char} and @code{unsigned char}, and
+for @code{EOF}.
+
+@item These macros ignore the current locale; they are true for these
+fixed sets of characters:
+@multitable {@code{XDIGIT}} {yada yada yada yada yada yada yada yada}
+@item @code{ALPHA} @tab @kbd{A-Za-z}
+@item @code{ALNUM} @tab @kbd{A-Za-z0-9}
+@item @code{BLANK} @tab @kbd{space tab}
+@item @code{CNTRL} @tab @code{!PRINT}
+@item @code{DIGIT} @tab @kbd{0-9}
+@item @code{GRAPH} @tab @code{ALNUM || PUNCT}
+@item @code{LOWER} @tab @kbd{a-z}
+@item @code{PRINT} @tab @code{GRAPH ||} @kbd{space}
+@item @code{PUNCT} @tab @kbd{`~!@@#$%^&*()_-=+[@{]@}\|;:'",<.>/?}
+@item @code{SPACE} @tab @kbd{space tab \n \r \f \v}
+@item @code{UPPER} @tab @kbd{A-Z}
+@item @code{XDIGIT} @tab @kbd{0-9A-Fa-f}
+@end multitable
+
+Note that, if the host character set is ASCII or a superset thereof,
+all these macros will return false for all values of @code{char} outside
+the range of 7-bit ASCII. In particular, both ISPRINT and ISCNTRL return
+false for characters with numeric values from 128 to 255.
+@end itemize
+@end deffn
+
+@deffn Extension ISIDNUM (@var{c})
+@deffnx Extension ISIDST (@var{c})
+@deffnx Extension IS_VSPACE (@var{c})
+@deffnx Extension IS_NVSPACE (@var{c})
+@deffnx Extension IS_SPACE_OR_NUL (@var{c})
+@deffnx Extension IS_ISOBASIC (@var{c})
+These six macros are defined by @file{safe-ctype.h} and provide
+additional character classes which are useful when doing lexical
+analysis of C or similar languages. They are true for the following
+sets of characters:
+
+@multitable {@code{SPACE_OR_NUL}} {yada yada yada yada yada yada yada yada}
+@item @code{IDNUM} @tab @kbd{A-Za-z0-9_}
+@item @code{IDST} @tab @kbd{A-Za-z_}
+@item @code{VSPACE} @tab @kbd{\r \n}
+@item @code{NVSPACE} @tab @kbd{space tab \f \v \0}
+@item @code{SPACE_OR_NUL} @tab @code{VSPACE || NVSPACE}
+@item @code{ISOBASIC} @tab @code{VSPACE || NVSPACE || PRINT}
+@end multitable
+@end deffn
+
+*/
+
+#include "ansidecl.h"
+#include <safe-ctype.h>
+#include <stdio.h> /* for EOF */
+
+#if EOF != -1
+ #error "<safe-ctype.h> requires EOF == -1"
+#endif
+
+/* Shorthand */
+#define bl _sch_isblank
+#define cn _sch_iscntrl
+#define di _sch_isdigit
+#define is _sch_isidst
+#define lo _sch_islower
+#define nv _sch_isnvsp
+#define pn _sch_ispunct
+#define pr _sch_isprint
+#define sp _sch_isspace
+#define up _sch_isupper
+#define vs _sch_isvsp
+#define xd _sch_isxdigit
+
+/* Masks. */
+#define L (const unsigned short) (lo|is |pr) /* lower case letter */
+#define XL (const unsigned short) (lo|is|xd|pr) /* lowercase hex digit */
+#define U (const unsigned short) (up|is |pr) /* upper case letter */
+#define XU (const unsigned short) (up|is|xd|pr) /* uppercase hex digit */
+#define D (const unsigned short) (di |xd|pr) /* decimal digit */
+#define P (const unsigned short) (pn |pr) /* punctuation */
+#define _ (const unsigned short) (pn|is |pr) /* underscore */
+
+#define C (const unsigned short) ( cn) /* control character */
+#define Z (const unsigned short) (nv |cn) /* NUL */
+#define M (const unsigned short) (nv|sp |cn) /* cursor movement: \f \v */
+#define V (const unsigned short) (vs|sp |cn) /* vertical space: \r \n */
+#define T (const unsigned short) (nv|sp|bl|cn) /* tab */
+#define S (const unsigned short) (nv|sp|bl|pr) /* space */
+
+/* Are we ASCII? */
+#if HOST_CHARSET == HOST_CHARSET_ASCII
+
+const unsigned short _sch_istable[256] =
+{
+ Z, C, C, C, C, C, C, C, /* NUL SOH STX ETX EOT ENQ ACK BEL */
+ C, T, V, M, M, V, C, C, /* BS HT LF VT FF CR SO SI */
+ C, C, C, C, C, C, C, C, /* DLE DC1 DC2 DC3 DC4 NAK SYN ETB */
+ C, C, C, C, C, C, C, C, /* CAN EM SUB ESC FS GS RS US */
+ S, P, P, P, P, P, P, P, /* SP ! " # $ % & ' */
+ P, P, P, P, P, P, P, P, /* ( ) * + , - . / */
+ D, D, D, D, D, D, D, D, /* 0 1 2 3 4 5 6 7 */
+ D, D, P, P, P, P, P, P, /* 8 9 : ; < = > ? */
+ P, XU, XU, XU, XU, XU, XU, U, /* @ A B C D E F G */
+ U, U, U, U, U, U, U, U, /* H I J K L M N O */
+ U, U, U, U, U, U, U, U, /* P Q R S T U V W */
+ U, U, U, P, P, P, P, _, /* X Y Z [ \ ] ^ _ */
+ P, XL, XL, XL, XL, XL, XL, L, /* ` a b c d e f g */
+ L, L, L, L, L, L, L, L, /* h i j k l m n o */
+ L, L, L, L, L, L, L, L, /* p q r s t u v w */
+ L, L, L, P, P, P, P, C, /* x y z { | } ~ DEL */
+
+ /* high half of unsigned char is locale-specific, so all tests are
+ false in "C" locale */
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+};
+
+const unsigned char _sch_tolower[256] =
+{
+ 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15,
+ 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31,
+ 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47,
+ 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63,
+ 64,
+
+ 'a', 'b', 'c', 'd', 'e', 'f', 'g', 'h', 'i', 'j', 'k', 'l', 'm',
+ 'n', 'o', 'p', 'q', 'r', 's', 't', 'u', 'v', 'w', 'x', 'y', 'z',
+
+ 91, 92, 93, 94, 95, 96,
+
+ 'a', 'b', 'c', 'd', 'e', 'f', 'g', 'h', 'i', 'j', 'k', 'l', 'm',
+ 'n', 'o', 'p', 'q', 'r', 's', 't', 'u', 'v', 'w', 'x', 'y', 'z',
+
+ 123,124,125,126,127,
+
+ 128,129,130,131, 132,133,134,135, 136,137,138,139, 140,141,142,143,
+ 144,145,146,147, 148,149,150,151, 152,153,154,155, 156,157,158,159,
+ 160,161,162,163, 164,165,166,167, 168,169,170,171, 172,173,174,175,
+ 176,177,178,179, 180,181,182,183, 184,185,186,187, 188,189,190,191,
+
+ 192,193,194,195, 196,197,198,199, 200,201,202,203, 204,205,206,207,
+ 208,209,210,211, 212,213,214,215, 216,217,218,219, 220,221,222,223,
+ 224,225,226,227, 228,229,230,231, 232,233,234,235, 236,237,238,239,
+ 240,241,242,243, 244,245,246,247, 248,249,250,251, 252,253,254,255,
+};
+
+const unsigned char _sch_toupper[256] =
+{
+ 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15,
+ 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31,
+ 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47,
+ 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63,
+ 64,
+
+ 'A', 'B', 'C', 'D', 'E', 'F', 'G', 'H', 'I', 'J', 'K', 'L', 'M',
+ 'N', 'O', 'P', 'Q', 'R', 'S', 'T', 'U', 'V', 'W', 'X', 'Y', 'Z',
+
+ 91, 92, 93, 94, 95, 96,
+
+ 'A', 'B', 'C', 'D', 'E', 'F', 'G', 'H', 'I', 'J', 'K', 'L', 'M',
+ 'N', 'O', 'P', 'Q', 'R', 'S', 'T', 'U', 'V', 'W', 'X', 'Y', 'Z',
+
+ 123,124,125,126,127,
+
+ 128,129,130,131, 132,133,134,135, 136,137,138,139, 140,141,142,143,
+ 144,145,146,147, 148,149,150,151, 152,153,154,155, 156,157,158,159,
+ 160,161,162,163, 164,165,166,167, 168,169,170,171, 172,173,174,175,
+ 176,177,178,179, 180,181,182,183, 184,185,186,187, 188,189,190,191,
+
+ 192,193,194,195, 196,197,198,199, 200,201,202,203, 204,205,206,207,
+ 208,209,210,211, 212,213,214,215, 216,217,218,219, 220,221,222,223,
+ 224,225,226,227, 228,229,230,231, 232,233,234,235, 236,237,238,239,
+ 240,241,242,243, 244,245,246,247, 248,249,250,251, 252,253,254,255,
+};
+
+#else
+# if HOST_CHARSET == HOST_CHARSET_EBCDIC
+ #error "FIXME: write tables for EBCDIC"
+# else
+ #error "Unrecognized host character set"
+# endif
+#endif
--- /dev/null
+/* <ctype.h> replacement macros.
+
+ Copyright (C) 2000, 2001 Free Software Foundation, Inc.
+ Contributed by Zack Weinberg <zackw@stanford.edu>.
+
+This file is part of the libiberty library.
+Libiberty is free software; you can redistribute it and/or
+modify it under the terms of the GNU Library General Public
+License as published by the Free Software Foundation; either
+version 2 of the License, or (at your option) any later version.
+
+Libiberty is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+Library General Public License for more details.
+
+You should have received a copy of the GNU Library General Public
+License along with libiberty; see the file COPYING.LIB. If
+not, write to the Free Software Foundation, Inc., 51 Franklin Street - Fifth Floor,
+Boston, MA 02110-1301, USA. */
+
+/* This is a compatible replacement of the standard C library's <ctype.h>
+ with the following properties:
+
+ - Implements all isxxx() macros required by C99.
+ - Also implements some character classes useful when
+ parsing C-like languages.
+ - Does not change behavior depending on the current locale.
+ - Behaves properly for all values in the range of a signed or
+ unsigned char.
+
+ To avoid conflicts, this header defines the isxxx functions in upper
+ case, e.g. ISALPHA not isalpha. */
+
+#ifndef SAFE_CTYPE_H
+#define SAFE_CTYPE_H
+
+#ifdef isalpha
+ #error "safe-ctype.h and ctype.h may not be used simultaneously"
+#endif
+
+/* Determine host character set. */
+#define HOST_CHARSET_UNKNOWN 0
+#define HOST_CHARSET_ASCII 1
+#define HOST_CHARSET_EBCDIC 2
+
+#if '\n' == 0x0A && ' ' == 0x20 && '0' == 0x30 \
+ && 'A' == 0x41 && 'a' == 0x61 && '!' == 0x21
+# define HOST_CHARSET HOST_CHARSET_ASCII
+#else
+# if '\n' == 0x15 && ' ' == 0x40 && '0' == 0xF0 \
+ && 'A' == 0xC1 && 'a' == 0x81 && '!' == 0x5A
+# define HOST_CHARSET HOST_CHARSET_EBCDIC
+# else
+# define HOST_CHARSET HOST_CHARSET_UNKNOWN
+# endif
+#endif
+
+/* Categories. */
+
+enum {
+ /* In C99 */
+ _sch_isblank = 0x0001, /* space \t */
+ _sch_iscntrl = 0x0002, /* nonprinting characters */
+ _sch_isdigit = 0x0004, /* 0-9 */
+ _sch_islower = 0x0008, /* a-z */
+ _sch_isprint = 0x0010, /* any printing character including ' ' */
+ _sch_ispunct = 0x0020, /* all punctuation */
+ _sch_isspace = 0x0040, /* space \t \n \r \f \v */
+ _sch_isupper = 0x0080, /* A-Z */
+ _sch_isxdigit = 0x0100, /* 0-9A-Fa-f */
+
+ /* Extra categories useful to cpplib. */
+ _sch_isidst = 0x0200, /* A-Za-z_ */
+ _sch_isvsp = 0x0400, /* \n \r */
+ _sch_isnvsp = 0x0800, /* space \t \f \v \0 */
+
+ /* Combinations of the above. */
+ _sch_isalpha = _sch_isupper|_sch_islower, /* A-Za-z */
+ _sch_isalnum = _sch_isalpha|_sch_isdigit, /* A-Za-z0-9 */
+ _sch_isidnum = _sch_isidst|_sch_isdigit, /* A-Za-z0-9_ */
+ _sch_isgraph = _sch_isalnum|_sch_ispunct, /* isprint and not space */
+ _sch_iscppsp = _sch_isvsp|_sch_isnvsp, /* isspace + \0 */
+ _sch_isbasic = _sch_isprint|_sch_iscppsp /* basic charset of ISO C
+ (plus ` and @) */
+};
+
+/* Character classification. */
+extern const unsigned short _sch_istable[256];
+
+#define _sch_test(c, bit) (_sch_istable[(c) & 0xff] & (unsigned short)(bit))
+
+#define ISALPHA(c) _sch_test(c, _sch_isalpha)
+#define ISALNUM(c) _sch_test(c, _sch_isalnum)
+#define ISBLANK(c) _sch_test(c, _sch_isblank)
+#define ISCNTRL(c) _sch_test(c, _sch_iscntrl)
+#define ISDIGIT(c) _sch_test(c, _sch_isdigit)
+#define ISGRAPH(c) _sch_test(c, _sch_isgraph)
+#define ISLOWER(c) _sch_test(c, _sch_islower)
+#define ISPRINT(c) _sch_test(c, _sch_isprint)
+#define ISPUNCT(c) _sch_test(c, _sch_ispunct)
+#define ISSPACE(c) _sch_test(c, _sch_isspace)
+#define ISUPPER(c) _sch_test(c, _sch_isupper)
+#define ISXDIGIT(c) _sch_test(c, _sch_isxdigit)
+
+#define ISIDNUM(c) _sch_test(c, _sch_isidnum)
+#define ISIDST(c) _sch_test(c, _sch_isidst)
+#define IS_ISOBASIC(c) _sch_test(c, _sch_isbasic)
+#define IS_VSPACE(c) _sch_test(c, _sch_isvsp)
+#define IS_NVSPACE(c) _sch_test(c, _sch_isnvsp)
+#define IS_SPACE_OR_NUL(c) _sch_test(c, _sch_iscppsp)
+
+/* Character transformation. */
+extern const unsigned char _sch_toupper[256];
+extern const unsigned char _sch_tolower[256];
+#define TOUPPER(c) _sch_toupper[(c) & 0xff]
+#define TOLOWER(c) _sch_tolower[(c) & 0xff]
+
+#endif /* SAFE_CTYPE_H */
--- /dev/null
+/*
+ * $Id: usleep.c 1519 2009-04-22 23:12:44Z rfhh $
+ *
+ * Copyright (C) 2009, Rutger Hofman, VU Amsterdam
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ */
+#include "sysdep.h"
+
+#ifndef HAVE_USLEEP
+
+#ifndef HAVE_NANOSLEEP
+# error Need usleep or nanosleep
+#endif
+
+#include <time.h>
+
+#define MICRO 1000000L
+#define NANO 1000000000L
+
+int usleep (long unsigned usec)
+{
+ struct timespec req;
+
+ req.tv_sec = usec / MICRO;
+ req.tv_nsec = (usec % MICRO) * (NANO / MICRO);
+
+ return nanosleep (&req, NULL);
+}
+
+#endif
--- /dev/null
+Makefile
+Makefile.in
+.deps
+.libs
--- /dev/null
+#
+# $Id$
+#
+# Copyright (C) 2002 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Marcel Telka <marcel@telka.sk>, 2002.
+#
+
+include $(top_srcdir)/Makefile.rules
+
+noinst_LTLIBRARIES = libpart.la
+
+libpart_la_SOURCES = \
+ signal.c \
+ instruction.c \
+ data_register.c \
+ bsbit.c \
+ part.c
+
+AM_CFLAGS = $(WARNINGCFLAGS)
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2002 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2002.
+ *
+ */
+
+#include <sysdep.h>
+
+#include <stdlib.h>
+#include <string.h>
+
+#include <urjtag/chain.h>
+#include <urjtag/part.h>
+#include <urjtag/data_register.h>
+#include <urjtag/tap_register.h>
+#include <urjtag/bssignal.h>
+#include <urjtag/bsbit.h>
+
+int
+urj_part_bsbit_alloc_control (urj_part_t *part, int bit, const char *name,
+ int type, int safe,
+ int ctrl_num, int ctrl_val, int ctrl_state)
+{
+ urj_bsbit_t *b;
+ urj_data_register_t *bsr;
+ urj_part_signal_t *signal;
+
+ bsr = urj_part_find_data_register (part, "BSR");
+ if (bsr == NULL)
+ {
+ urj_error_set(URJ_ERROR_NOTFOUND,
+ _("missing Boundary Scan Register (BSR)"));
+ return URJ_STATUS_FAIL;
+ }
+
+ if (bit >= bsr->in->len)
+ {
+ urj_error_set(URJ_ERROR_INVALID, _("invalid boundary bit number"));
+ return URJ_STATUS_FAIL;
+ }
+ if (part->bsbits[bit] != NULL)
+ {
+ urj_error_set(URJ_ERROR_ALREADY, _("duplicate bit declaration"));
+ return URJ_STATUS_FAIL;
+ }
+ if (ctrl_num != -1 && ctrl_num >= bsr->in->len)
+ {
+ urj_error_set(URJ_ERROR_INVALID, _("invalid control bit number"));
+ return URJ_STATUS_FAIL;
+ }
+
+ signal = urj_part_find_signal (part, name);
+
+ bsr->in->data[bit] = safe;
+
+ b = malloc (sizeof *b);
+ if (!b)
+ {
+ urj_error_set (URJ_ERROR_OUT_OF_MEMORY, "malloc(%zd) fails", sizeof *b);
+ return URJ_STATUS_FAIL;
+ }
+
+ b->name = strdup (name);
+ if (!b->name)
+ {
+ free (b);
+ urj_error_set (URJ_ERROR_OUT_OF_MEMORY, "strdup(%s) fails", name);
+ return URJ_STATUS_FAIL;
+ }
+
+ b->bit = bit;
+ b->type = type;
+ b->signal = signal;
+ b->safe = (safe == 1);
+ b->control = -1;
+
+ part->bsbits[bit] = b;
+
+ if (signal != NULL)
+ {
+ switch (type)
+ {
+ case URJ_BSBIT_INPUT:
+ signal->input = b;
+ break;
+ case URJ_BSBIT_OUTPUT:
+ signal->output = b;
+ break;
+ case URJ_BSBIT_BIDIR:
+ signal->input = b;
+ signal->output = b;
+ break;
+ }
+ }
+
+ if (ctrl_num != -1)
+ {
+ b->control = ctrl_num;
+ b->control_value = ctrl_val;
+ b->control_state = ctrl_state;
+ }
+
+ return URJ_STATUS_OK;
+}
+
+int
+urj_part_bsbit_alloc (urj_part_t *part, int bit, const char *name, int type,
+ int safe)
+{
+ return urj_part_bsbit_alloc_control (part, bit, name, type, safe,
+ -1, -1, -1);
+}
+
+void
+urj_part_bsbit_free (urj_bsbit_t *b)
+{
+ if (!b)
+ return;
+
+ free (b->name);
+ free (b);
+}
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2002 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2002.
+ *
+ */
+
+#include <sysdep.h>
+
+#include <stdlib.h>
+#include <string.h>
+#include <stdio.h>
+
+#include <urjtag/part.h>
+#include <urjtag/tap_register.h>
+#include <urjtag/data_register.h>
+#include <urjtag/error.h>
+
+urj_data_register_t *
+urj_part_data_register_alloc (const char *name, int len)
+{
+ urj_data_register_t *dr;
+
+ if (!name)
+ return NULL;
+
+ dr = malloc (sizeof *dr);
+ if (!dr)
+ {
+ urj_error_set (URJ_ERROR_OUT_OF_MEMORY, "malloc(%zd) fails",
+ sizeof *dr);
+ return NULL;
+ }
+
+ if (strlen (name) > URJ_DATA_REGISTER_MAXLEN)
+ urj_warning (_("Data register name too long\n"));
+ strncpy (dr->name, name, URJ_DATA_REGISTER_MAXLEN);
+ dr->name[URJ_DATA_REGISTER_MAXLEN] = '\0';
+
+ if (len > 0)
+ {
+ dr->in = urj_tap_register_alloc (len);
+ dr->out = urj_tap_register_alloc (len);
+ }
+ else
+ {
+ dr->in = urj_tap_register_alloc (1);
+ dr->out = urj_tap_register_alloc (1);
+ }
+ if (!dr->in || !dr->out)
+ {
+ // retain error state
+ free (dr->in);
+ free (dr->out);
+ free (dr->name);
+ free (dr);
+ return NULL;
+ }
+
+ dr->next = NULL;
+
+ return dr;
+}
+
+void
+urj_part_data_register_free (urj_data_register_t *dr)
+{
+ if (!dr)
+ return;
+
+ urj_tap_register_free (dr->in);
+ urj_tap_register_free (dr->out);
+ free (dr);
+}
+
+int
+urj_part_data_register_define (urj_part_t *part, const char *name, int len)
+{
+ urj_data_register_t *dr;
+
+ if (urj_part_find_data_register (part, name) != NULL)
+ {
+ urj_error_set (URJ_ERROR_ALREADY,
+ _("Data register '%s' already defined"), name);
+ return URJ_STATUS_FAIL;
+ }
+
+ dr = urj_part_data_register_alloc (name, len);
+ if (!dr)
+ // retain error state
+ return URJ_STATUS_FAIL;
+
+ dr->next = part->data_registers;
+ part->data_registers = dr;
+
+ /* Boundary Scan Register */
+ if (strcasecmp (dr->name, "BSR") == 0)
+ {
+ int i;
+
+ part->boundary_length = len;
+ part->bsbits = malloc (part->boundary_length * sizeof *part->bsbits);
+ if (!part->bsbits)
+ {
+ urj_error_set (URJ_ERROR_OUT_OF_MEMORY, "malloc(%zd) fails",
+ part->boundary_length * sizeof *part->bsbits);
+ return URJ_STATUS_FAIL;
+ }
+ for (i = 0; i < part->boundary_length; i++)
+ part->bsbits[i] = NULL;
+ }
+
+ /* Device Identification Register */
+ else if (strcasecmp (dr->name, "DIR") == 0)
+ urj_tap_register_init (dr->out, urj_tap_register_get_string (part->id));
+
+ return URJ_STATUS_OK;
+}
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2002 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2002.
+ *
+ */
+
+#include <sysdep.h>
+
+#include <stdlib.h>
+#include <stdio.h>
+#include <string.h>
+
+#include <urjtag/error.h>
+#include <urjtag/tap_register.h>
+#include <urjtag/part_instruction.h>
+
+urj_part_instruction_t *
+urj_part_instruction_alloc (const char *name, int len, const char *val)
+{
+ urj_part_instruction_t *i;
+
+ if (!name || !val)
+ return NULL;
+
+ i = malloc (sizeof *i);
+ if (!i)
+ {
+ urj_error_set (URJ_ERROR_OUT_OF_MEMORY, "malloc(%zd) fails", sizeof *i);
+ return NULL;
+ }
+
+ if (strlen (name) > URJ_INSTRUCTION_MAXLEN_INSTRUCTION)
+ urj_warning (_("Instruction name too long\n"));
+ strncpy (i->name, name, URJ_INSTRUCTION_MAXLEN_INSTRUCTION);
+ i->name[URJ_INSTRUCTION_MAXLEN_INSTRUCTION] = '\0';
+
+ i->value = urj_tap_register_alloc (len);
+ if (!i->value)
+ {
+ free (i);
+ return NULL;
+ }
+ i->out = urj_tap_register_alloc (len);
+ if (!i->out)
+ {
+ free (i->value);
+ free (i);
+ return NULL;
+ }
+
+ urj_tap_register_init (i->value, val);
+ i->data_register = NULL;
+ i->next = NULL;
+
+ return i;
+}
+
+void
+urj_part_instruction_free (urj_part_instruction_t *i)
+{
+ if (!i)
+ return;
+
+ if (i->value)
+ urj_tap_register_free (i->value);
+ if (i->out)
+ urj_tap_register_free (i->out);
+ free (i);
+}
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2002 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2002.
+ *
+ */
+
+#include <sysdep.h>
+
+#include <stdlib.h>
+#include <string.h>
+
+#include <urjtag/error.h>
+#include <urjtag/part.h>
+#include <urjtag/bssignal.h>
+#include <urjtag/tap_register.h>
+#include <urjtag/part_instruction.h>
+#include <urjtag/data_register.h>
+#include <urjtag/bsbit.h>
+
+/* part */
+
+urj_part_t *
+urj_part_alloc (const urj_tap_register_t *id)
+{
+ urj_part_t *p = malloc (sizeof *p);
+ if (!p)
+ {
+ urj_error_set (URJ_ERROR_OUT_OF_MEMORY, "malloc(%zd) fails", sizeof *p);
+ return NULL;
+ }
+
+ p->alias = NULL; /* djf */
+ /* @@@@ RFHH check result */
+ p->id = urj_tap_register_duplicate (id);
+ p->manufacturer[0] = '\0';
+ p->part[0] = '\0';
+ p->stepping[0] = '\0';
+ p->signals = NULL;
+ p->saliases = NULL;
+ p->instruction_length = 0;
+ p->instructions = NULL;
+ p->active_instruction = NULL;
+ p->data_registers = NULL;
+ p->boundary_length = 0;
+ p->bsbits = NULL;
+
+ return p;
+}
+
+void
+urj_part_free (urj_part_t *p)
+{
+ int i;
+
+ if (!p)
+ return;
+
+ /* id */
+ free (p->id);
+
+ if (p->alias)
+ free (p->alias); /* djf */
+
+ /* signals */
+ while (p->signals)
+ {
+ urj_part_signal_t *s = p->signals;
+ p->signals = s->next;
+ urj_part_signal_free (s);
+ }
+
+ /* saliases */
+ while (p->saliases)
+ {
+ urj_part_salias_t *sa = p->saliases;
+ p->saliases = sa->next;
+ urj_part_salias_free (sa);
+ }
+
+ /* instructions */
+ while (p->instructions)
+ {
+ urj_part_instruction_t *i = p->instructions;
+ p->instructions = i->next;
+ urj_part_instruction_free (i);
+ }
+
+ /* data registers */
+ while (p->data_registers)
+ {
+ urj_data_register_t *dr = p->data_registers;
+ p->data_registers = dr->next;
+ urj_part_data_register_free (dr);
+ }
+
+ /* bsbits */
+ for (i = 0; i < p->boundary_length; i++)
+ urj_part_bsbit_free (p->bsbits[i]);
+ free (p->bsbits);
+
+ free (p);
+}
+
+urj_part_instruction_t *
+urj_part_find_instruction (urj_part_t *p, const char *iname)
+{
+ urj_part_instruction_t *i;
+
+ if (!p || !iname)
+ {
+ urj_error_set (URJ_ERROR_INVALID, "NULL part or instruction name");
+ return NULL;
+ }
+
+ i = p->instructions;
+ while (i)
+ {
+ if (strcasecmp (iname, i->name) == 0)
+ break;
+ i = i->next;
+ }
+
+ return i;
+}
+
+urj_data_register_t *
+urj_part_find_data_register (urj_part_t *p, const char *drname)
+{
+ urj_data_register_t *dr;
+
+ if (!p || !drname)
+ {
+ urj_error_set (URJ_ERROR_INVALID, "NULL part or data register name");
+ return NULL;
+ }
+
+ dr = p->data_registers;
+ while (dr)
+ {
+ if (strcasecmp (drname, dr->name) == 0)
+ break;
+ dr = dr->next;
+ }
+
+ return dr;
+}
+
+urj_part_signal_t *
+urj_part_find_signal (urj_part_t *p, const char *signalname)
+{
+ urj_part_signal_t *s;
+ urj_part_salias_t *sa;
+
+ if (!p || !signalname)
+ {
+ urj_error_set (URJ_ERROR_INVALID, "NULL part or signal name");
+ return NULL;
+ }
+
+ s = p->signals;
+ while (s)
+ {
+ if (strcasecmp (signalname, s->name) == 0)
+ return s;
+ s = s->next;
+ }
+
+ sa = p->saliases;
+ while (sa)
+ {
+ if (strcasecmp (signalname, sa->name) == 0)
+ return sa->signal;
+ sa = sa->next;
+ }
+
+ return NULL;
+}
+
+void
+urj_part_set_instruction (urj_part_t *p, const char *iname)
+{
+ if (p)
+ p->active_instruction = urj_part_find_instruction (p, iname);
+}
+
+int
+urj_part_set_signal (urj_part_t *p, urj_part_signal_t *s, int out, int val)
+{
+ urj_data_register_t *bsr;
+
+ if (!p || !s)
+ {
+ urj_error_set (URJ_ERROR_INVALID, "NULL part or signal");
+ return URJ_STATUS_FAIL;
+ }
+
+ /* search for Boundary Scan Register */
+ bsr = urj_part_find_data_register (p, "BSR");
+ if (!bsr)
+ {
+ urj_error_set (URJ_ERROR_NOTFOUND,
+ _("Boundary Scan Register (BSR) not found"));
+ return URJ_STATUS_FAIL;
+ }
+
+ /* setup signal */
+ if (out)
+ {
+ int control;
+ if (!s->output)
+ {
+ urj_error_set (URJ_ERROR_INVALID,
+ _("signal '%s' cannot be set as output"), s->name);
+ return URJ_STATUS_FAIL;
+ }
+ bsr->in->data[s->output->bit] = val & 1;
+
+ control = p->bsbits[s->output->bit]->control;
+ if (control >= 0)
+ bsr->in->data[control] =
+ p->bsbits[s->output->bit]->control_value ^ 1;
+ }
+ else
+ {
+ if (!s->input)
+ {
+ urj_error_set (URJ_ERROR_INVALID,
+ _("signal '%s' cannot be set as input"), s->name);
+ return URJ_STATUS_FAIL;
+ }
+ if (s->output)
+ bsr->in->data[s->output->control] =
+ p->bsbits[s->output->bit]->control_value;
+ }
+
+ return URJ_STATUS_OK;
+}
+
+int
+urj_part_get_signal (urj_part_t *p, const urj_part_signal_t *s)
+{
+ urj_data_register_t *bsr;
+
+ if (!p || !s)
+ {
+ urj_error_set (URJ_ERROR_INVALID, "NULL part or signal");
+ return -1;
+ }
+
+ /* search for Boundary Scan Register */
+ bsr = urj_part_find_data_register (p, "BSR");
+ if (!bsr)
+ {
+ urj_error_set (URJ_ERROR_NOTFOUND,
+ _("Boundary Scan Register (BSR) not found"));
+ return -1;
+ }
+
+ if (!s->input)
+ {
+ urj_error_set (URJ_ERROR_INVALID,
+ _("signal '%s' is not input signal"), s->name);
+ return -1;
+ }
+
+ return bsr->out->data[s->input->bit];
+}
+
+int
+urj_part_print (urj_log_level_t ll, urj_part_t *p)
+{
+ const char *instruction = NULL;
+ const char *dr = NULL;
+ char format[100];
+
+ if (!p)
+ {
+ urj_error_set (URJ_ERROR_INVALID, "NULL part");
+ return URJ_STATUS_FAIL;
+ }
+
+ snprintf (format, 100, _("%%-%ds %%-%ds %%-%ds %%-%ds %%-%ds\n"),
+ URJ_PART_MANUFACTURER_MAXLEN, URJ_PART_PART_MAXLEN,
+ URJ_PART_STEPPING_MAXLEN, URJ_INSTRUCTION_MAXLEN_INSTRUCTION,
+ URJ_DATA_REGISTER_MAXLEN);
+
+ if (p->active_instruction)
+ {
+ instruction = p->active_instruction->name;
+ if (p->active_instruction->data_register != NULL)
+ dr = p->active_instruction->data_register->name;
+ }
+ if (instruction == NULL)
+ instruction = _("(none)");
+ if (dr == NULL)
+ dr = _("(none)");
+ urj_log (ll, format, p->manufacturer, p->part, p->stepping, instruction,
+ dr);
+
+ return URJ_STATUS_OK;
+}
+
+
+int
+urj_part_instruction_length_set (urj_part_t *part, int length)
+{
+ if (part->instructions != NULL)
+ {
+ urj_error_set (URJ_ERROR_ALREADY,
+ _("instruction length is already set and used"));
+ return URJ_STATUS_FAIL;
+ }
+
+ part->instruction_length = length;
+
+ return URJ_STATUS_OK;
+}
+
+
+urj_part_instruction_t *
+urj_part_instruction_define (urj_part_t *part, const char *instruction,
+ const char *code, const char *data_register)
+{
+ urj_part_instruction_t *i;
+ urj_data_register_t *dr;
+
+ if (strlen (code) != part->instruction_length)
+ {
+ urj_error_set (URJ_ERROR_INVALID,
+ _("invalid instruction length"));
+ return NULL;
+ }
+
+ if (urj_part_find_instruction (part, instruction) != NULL)
+ {
+ urj_error_set (URJ_ERROR_ALREADY,
+ _("Instruction '%s' already defined"), instruction);
+ return NULL;
+ }
+
+ dr = urj_part_find_data_register (part, data_register);
+ if (dr == NULL)
+ {
+ urj_error_set(URJ_ERROR_NOTFOUND,
+ _("unknown data register '%s'"), data_register);
+ return NULL;
+ }
+
+ i = urj_part_instruction_alloc (instruction, part->instruction_length,
+ code);
+ if (!i)
+ {
+ /* retain error state */
+ return NULL;
+ }
+
+ i->next = part->instructions;
+ part->instructions = i;
+
+ i->data_register = dr;
+
+ return i;
+}
+
+
+/* parts */
+
+urj_parts_t *
+urj_part_parts_alloc (void)
+{
+ urj_parts_t *ps = malloc (sizeof *ps);
+ if (!ps)
+ {
+ urj_error_set (URJ_ERROR_OUT_OF_MEMORY, "malloc(%zd) fails",
+ sizeof *ps);
+ return NULL;
+ }
+
+ ps->len = 0;
+ ps->parts = NULL;
+
+ return ps;
+}
+
+void
+urj_part_parts_free (urj_parts_t *ps)
+{
+ int i;
+
+ if (!ps)
+ return;
+
+ for (i = 0; i < ps->len; i++)
+ urj_part_free (ps->parts[i]);
+
+ free (ps->parts);
+ free (ps);
+}
+
+int
+urj_part_parts_add_part (urj_parts_t *ps, urj_part_t *p)
+{
+ urj_part_t **np = realloc (ps->parts, (ps->len + 1) * sizeof *ps->parts);
+
+ if (!np)
+ {
+ urj_error_set (URJ_ERROR_OUT_OF_MEMORY, "realloc(%s,%zd) fails",
+ "ps->parts", (ps->len + 1) * sizeof *ps->parts);
+ return URJ_STATUS_FAIL;
+ }
+
+ ps->parts = np;
+ ps->parts[ps->len++] = p;
+
+ return URJ_STATUS_OK;
+}
+
+int
+urj_part_parts_set_instruction (urj_parts_t *ps, const char *iname)
+{
+ int i;
+
+ if (!ps)
+ {
+ urj_error_set (URJ_ERROR_INVALID, "NULL parts");
+ return URJ_STATUS_FAIL;
+ }
+
+ for (i = 0; i < ps->len; i++)
+ ps->parts[i]->active_instruction =
+ urj_part_find_instruction (ps->parts[i], iname);
+
+ return URJ_STATUS_OK;
+}
+
+int
+urj_part_parts_print (urj_log_level_t ll, urj_parts_t *ps)
+{
+ int i;
+
+ if (!ps)
+ {
+ urj_error_set (URJ_ERROR_INVALID, "NULL parts");
+ return URJ_STATUS_FAIL;
+ }
+
+ for (i = 0; i < ps->len; i++)
+ {
+ urj_part_t *p = ps->parts[i];
+
+ if (!p)
+ continue;
+
+ urj_log (ll, _(" %3d "), i);
+ urj_part_print (ll, p);
+ }
+
+ return URJ_STATUS_OK;
+}
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2002 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2002.
+ *
+ */
+
+#include <sysdep.h>
+
+#include <stdlib.h>
+#include <string.h>
+
+#include <urjtag/chain.h>
+#include <urjtag/bssignal.h>
+#include <urjtag/part.h>
+
+urj_part_signal_t *
+urj_part_signal_alloc (const char *name)
+{
+ urj_part_signal_t *s = malloc (sizeof *s);
+ if (!s)
+ {
+ urj_error_set (URJ_ERROR_OUT_OF_MEMORY, "malloc(%zd) fails", sizeof *s);
+ return NULL;
+ }
+
+ s->name = strdup (name);
+ if (!s->name)
+ {
+ free (s);
+ urj_error_set (URJ_ERROR_OUT_OF_MEMORY, "strdup(%s) fails", name);
+ return NULL;
+ }
+ s->pin = NULL; /* djf hack pin number */
+ s->next = NULL;
+ s->input = NULL;
+ s->output = NULL;
+
+ return s;
+}
+
+void
+urj_part_signal_free (urj_part_signal_t *s)
+{
+ if (!s)
+ return;
+ free (s->name);
+ free (s);
+}
+
+urj_part_salias_t *
+urj_part_salias_alloc (const char *name, const urj_part_signal_t *signal)
+{
+ urj_part_salias_t *sa = malloc (sizeof *sa);
+
+ if (sa == NULL)
+ {
+ urj_error_set (URJ_ERROR_OUT_OF_MEMORY, "malloc(%zd) fails",
+ sizeof *sa);
+ return NULL;
+ }
+
+ sa->name = strdup (name);
+ if (sa->name == NULL)
+ {
+ free (sa);
+ urj_error_set (URJ_ERROR_OUT_OF_MEMORY, "strdup(%s) fails", name);
+ return NULL;
+ }
+ sa->next = NULL;
+ sa->signal = (urj_part_signal_t *) signal;
+
+ return sa;
+}
+
+void
+urj_part_salias_free (urj_part_salias_t *salias)
+{
+ if (salias == NULL)
+ return;
+ free (salias->name);
+ free (salias);
+}
+
+urj_part_signal_t *
+urj_part_signal_define_pin (urj_chain_t *chain, const char *signal_name,
+ const char *pin_name)
+{
+ urj_part_t *part;
+ urj_part_signal_t *s;
+
+ part = urj_tap_chain_active_part (chain);
+
+ if (urj_part_find_signal (part, signal_name) != NULL)
+ {
+ urj_error_set (URJ_ERROR_ALREADY,
+ _("Signal '%s' already defined"), signal_name);
+ return NULL;
+ }
+
+ s = urj_part_signal_alloc (signal_name);
+ if (!s)
+ return NULL;
+
+ if (pin_name != NULL)
+ { /* Add pin number */
+ /* Allocate the space for the pin number & copy it */
+ s->pin = strdup (pin_name);
+ if (s->pin == NULL)
+ {
+ urj_part_signal_free (s);
+ urj_error_set (URJ_ERROR_OUT_OF_MEMORY, "strdup(%s) fails",
+ pin_name);
+ return NULL;
+ }
+ }
+
+ s->next = part->signals;
+ part->signals = s;
+
+ return s;
+}
+
+urj_part_signal_t *
+urj_part_signal_define (urj_chain_t *chain, const char *signal_name)
+{
+ return urj_part_signal_define_pin(chain, signal_name, NULL);
+}
+
+int
+urj_part_signal_redefine_pin (urj_chain_t *chain, urj_part_signal_t *s,
+ const char *pin_name)
+{
+ /* @@@@ RFHH Check s != NULL */
+ free(s->pin);
+
+ /* Allocate the space for the pin number & copy it */
+ s->pin = strdup (pin_name);
+ if (s->pin == NULL)
+ {
+ urj_error_set (URJ_ERROR_OUT_OF_MEMORY, "strdup(%s) fails", pin_name);
+ return URJ_STATUS_FAIL;
+ }
+
+ return URJ_STATUS_OK;
+}
--- /dev/null
+#
+# $Id$
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by A. Laeuger <arniml@sourceforge.net>, 2007.
+#
+
+include $(top_srcdir)/Makefile.rules
+
+AM_YFLAGS = -d
+
+OBJEXT = lo
+noinst_LTLIBRARIES = \
+ libsvf.la \
+ libsvf_flex.la
+
+libsvf_la_SOURCES = \
+ svf_bison.y \
+ svf.h \
+ svf.c
+
+libsvf_flex_la_SOURCES = \
+ svf_flex.l
+
+svf_flex.$(OBJEXT) svf.$(OBJEXT): svf_bison.$(OBJEXT)
+
+AM_CFLAGS = $(WARNINGCFLAGS)
+
+libsvf_flex_la_CFLAGS = \
+ $(AM_CFLAGS) \
+ -Wno-error
+
+svf_bison.h: svf_bison.c
+
+MAINTAINERCLEANFILES = \
+ svf_bison.c \
+ svf_bison.h \
+ svf_flex.c
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2004, Arnim Laeuger
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Arnim Laeuger <arniml@users.sourceforge.net>, 2004.
+ *
+ * See "Serial Vector Format Specification", Revision E, 1999
+ * ASSET InterTech, Inc.
+ * http://www.asset-intertech.com/support/svf.pdf
+ *
+ */
+
+#include <sysdep.h>
+
+#include <stdlib.h>
+#include <stdio.h>
+#include <string.h>
+#include <ctype.h>
+#include <math.h>
+#include <signal.h>
+#include <unistd.h>
+#include <sys/types.h>
+#ifndef SA_ONESHOT
+#define SA_ONESHOT SA_RESETHAND
+#endif
+
+#include <urjtag/error.h>
+#include <urjtag/cable.h>
+#include <urjtag/part.h>
+#include <urjtag/tap_state.h>
+#include <urjtag/tap_register.h>
+#include <urjtag/part_instruction.h>
+#include <urjtag/data_register.h>
+#include <urjtag/cmd.h>
+#include <urjtag/svf.h>
+#if defined __MINGW32__ || ! defined HAVE_SIGACTION_SA_ONESHOT
+#include <urjtag/fclock.h>
+#endif
+
+#include "svf.h"
+
+#include "svf_bison.h"
+
+#ifdef __MINGW32__
+#include <urjtag/fclock.h>
+#endif
+
+
+/* define for debug messages */
+#undef DEBUG
+
+
+int urj_svf_parse (urj_svf_parser_priv_t *priv_data, urj_chain_t *chain);
+
+
+/*
+ * urj_svf_force_reset_state()
+ *
+ * Puts TAP controller into reset state by clocking 5 times with TMS = 1.
+ */
+static void
+urj_svf_force_reset_state (urj_chain_t *chain)
+{
+ urj_tap_chain_clock (chain, 1, 0, 5);
+ urj_tap_state_reset (chain);
+}
+
+
+/*
+ * urj_svf_goto_state(state)
+ *
+ * Moves from any TAP state to the specified state.
+ * The state traversal is done according to the SVF specification.
+ * See STATE of the Serial Vector Format Specification
+ *
+ * Encoding of state is according to the jtag suite's defines.
+ *
+ * Parameter:
+ * state : new TAP controller state
+ */
+static void
+urj_svf_goto_state (urj_chain_t *chain, int new_state)
+{
+ int current_state;
+
+ current_state = urj_tap_state (chain);
+
+ /* handle unknown state */
+ if (new_state == URJ_TAP_STATE_UNKNOWN_STATE)
+ new_state = URJ_TAP_STATE_TEST_LOGIC_RESET;
+
+ /* abort if new_state already reached */
+ if (current_state == new_state)
+ return;
+
+ switch (current_state)
+ {
+ case URJ_TAP_STATE_TEST_LOGIC_RESET:
+ urj_tap_chain_clock (chain, 0, 0, 1);
+ break;
+
+ case URJ_TAP_STATE_RUN_TEST_IDLE:
+ urj_tap_chain_clock (chain, 1, 0, 1);
+ break;
+
+ case URJ_TAP_STATE_SELECT_DR_SCAN:
+ case URJ_TAP_STATE_SELECT_IR_SCAN:
+ if (new_state == URJ_TAP_STATE_TEST_LOGIC_RESET ||
+ new_state == URJ_TAP_STATE_RUN_TEST_IDLE ||
+ (current_state & URJ_TAP_STATE_DR && new_state & URJ_TAP_STATE_IR)
+ || (current_state & URJ_TAP_STATE_IR
+ && new_state & URJ_TAP_STATE_DR))
+ /* progress in select-idle/reset loop */
+ urj_tap_chain_clock (chain, 1, 0, 1);
+ else
+ /* enter DR/IR branch */
+ urj_tap_chain_clock (chain, 0, 0, 1);
+ break;
+
+ case URJ_TAP_STATE_CAPTURE_DR:
+ if (new_state == URJ_TAP_STATE_SHIFT_DR)
+ /* enter URJ_TAP_STATE_SHIFT_DR state */
+ urj_tap_chain_clock (chain, 0, 0, 1);
+ else
+ /* bypass URJ_TAP_STATE_SHIFT_DR */
+ urj_tap_chain_clock (chain, 1, 0, 1);
+ break;
+
+ case URJ_TAP_STATE_CAPTURE_IR:
+ if (new_state == URJ_TAP_STATE_SHIFT_IR)
+ /* enter URJ_TAP_STATE_SHIFT_IR state */
+ urj_tap_chain_clock (chain, 0, 0, 1);
+ else
+ /* bypass URJ_TAP_STATE_SHIFT_IR */
+ urj_tap_chain_clock (chain, 1, 0, 1);
+ break;
+
+ case URJ_TAP_STATE_SHIFT_DR:
+ case URJ_TAP_STATE_SHIFT_IR:
+ /* progress to URJ_TAP_STATE_EXIT1_DR/IR */
+ urj_tap_chain_clock (chain, 1, 0, 1);
+ break;
+
+ case URJ_TAP_STATE_EXIT1_DR:
+ if (new_state == URJ_TAP_STATE_PAUSE_DR)
+ /* enter URJ_TAP_STATE_PAUSE_DR state */
+ urj_tap_chain_clock (chain, 0, 0, 1);
+ else
+ /* bypass URJ_TAP_STATE_PAUSE_DR */
+ urj_tap_chain_clock (chain, 1, 0, 1);
+ break;
+
+ case URJ_TAP_STATE_EXIT1_IR:
+ if (new_state == URJ_TAP_STATE_PAUSE_IR)
+ /* enter URJ_TAP_STATE_PAUSE_IR state */
+ urj_tap_chain_clock (chain, 0, 0, 1);
+ else
+ /* bypass URJ_TAP_STATE_PAUSE_IR */
+ urj_tap_chain_clock (chain, 1, 0, 1);
+ break;
+
+ case URJ_TAP_STATE_PAUSE_DR:
+ case URJ_TAP_STATE_PAUSE_IR:
+ /* progress to URJ_TAP_STATE_EXIT2_DR/IR */
+ urj_tap_chain_clock (chain, 1, 0, 1);
+ break;
+
+ case URJ_TAP_STATE_EXIT2_DR:
+ if (new_state == URJ_TAP_STATE_SHIFT_DR)
+ /* enter URJ_TAP_STATE_SHIFT_DR state */
+ urj_tap_chain_clock (chain, 0, 0, 1);
+ else
+ /* progress to URJ_TAP_STATE_UPDATE_DR */
+ urj_tap_chain_clock (chain, 1, 0, 1);
+ break;
+
+ case URJ_TAP_STATE_EXIT2_IR:
+ if (new_state == URJ_TAP_STATE_SHIFT_IR)
+ /* enter URJ_TAP_STATE_SHIFT_IR state */
+ urj_tap_chain_clock (chain, 0, 0, 1);
+ else
+ /* progress to URJ_TAP_STATE_UPDATE_IR */
+ urj_tap_chain_clock (chain, 1, 0, 1);
+ break;
+
+ case URJ_TAP_STATE_UPDATE_DR:
+ case URJ_TAP_STATE_UPDATE_IR:
+ if (new_state == URJ_TAP_STATE_RUN_TEST_IDLE)
+ /* enter URJ_TAP_STATE_RUN_TEST_IDLE */
+ urj_tap_chain_clock (chain, 0, 0, 1);
+ else
+ /* progress to Select_DR/IR */
+ urj_tap_chain_clock (chain, 1, 0, 1);
+ break;
+
+ default:
+ urj_svf_force_reset_state (chain);
+ break;
+ }
+
+ /* continue state changes */
+ urj_svf_goto_state (chain, new_state);
+}
+
+
+/*
+ * urj_svf_map_state(state)
+ *
+ * Maps the state encoding of the SVF parser to the
+ * state encoding of the jtag suite.
+ *
+ * Parameter:
+ * state : state encoded by/for SVF parser
+ *
+ * Return value:
+ * state encoded for jtag tools
+ */
+static int
+urj_svf_map_state (int state)
+{
+ int jtag_state;
+
+ switch (state)
+ {
+ case RESET:
+ jtag_state = URJ_TAP_STATE_TEST_LOGIC_RESET;
+ break;
+ case IDLE:
+ jtag_state = URJ_TAP_STATE_RUN_TEST_IDLE;
+ break;
+ case DRSELECT:
+ jtag_state = URJ_TAP_STATE_SELECT_DR_SCAN;
+ break;
+ case DRCAPTURE:
+ jtag_state = URJ_TAP_STATE_CAPTURE_DR;
+ break;
+ case DRSHIFT:
+ jtag_state = URJ_TAP_STATE_SHIFT_DR;
+ break;
+ case DREXIT1:
+ jtag_state = URJ_TAP_STATE_EXIT1_DR;
+ break;
+ case DRPAUSE:
+ jtag_state = URJ_TAP_STATE_PAUSE_DR;
+ break;
+ case DREXIT2:
+ jtag_state = URJ_TAP_STATE_EXIT2_DR;
+ break;
+ case DRUPDATE:
+ jtag_state = URJ_TAP_STATE_UPDATE_DR;
+ break;
+
+ case IRSELECT:
+ jtag_state = URJ_TAP_STATE_SELECT_IR_SCAN;
+ break;
+ case IRCAPTURE:
+ jtag_state = URJ_TAP_STATE_CAPTURE_IR;
+ break;
+ case IRSHIFT:
+ jtag_state = URJ_TAP_STATE_SHIFT_IR;
+ break;
+ case IREXIT1:
+ jtag_state = URJ_TAP_STATE_EXIT1_IR;
+ break;
+ case IRPAUSE:
+ jtag_state = URJ_TAP_STATE_PAUSE_IR;
+ break;
+ case IREXIT2:
+ jtag_state = URJ_TAP_STATE_EXIT2_IR;
+ break;
+ case IRUPDATE:
+ jtag_state = URJ_TAP_STATE_UPDATE_IR;
+ break;
+
+ default:
+ jtag_state = URJ_TAP_STATE_UNKNOWN_STATE;
+ break;
+ }
+
+ return jtag_state;
+}
+
+
+/*
+ * urj_svf_hex2dec(nibble)
+ *
+ * Converts a hexadecimal nibble (4 bits) to its decimal value.
+ *
+ * Parameter:
+ * nibble : hexadecimal character
+ *
+ * Return value:
+ * decimal value of nibble or 0 if nibble is not a hexadecimal character
+ */
+static int
+urj_svf_hex2dec (char nibble)
+{
+ int lower;
+
+ if (nibble >= '0' && nibble <= '9')
+ return ((int) (nibble - '0'));
+
+ lower = tolower ((int) nibble);
+ if (lower >= 'a' && lower <= 'f')
+ return (lower - (int) 'a' + 10);
+
+ return 0;
+}
+
+
+/*
+ * urj_svf_build_bit_string(hex_string, len)
+ *
+ * Converts the hexadecimal string hex_string into a string of single bits
+ * with len elements (bits).
+ * If hex_string contains less nibbles than fit into len bits, the resulting
+ * bit string is padded with 0 bits.
+ *
+ * Note:
+ * The memory for the resulting bit string is calloc'ed and must be
+ * free'd when the bit string is not used anymore.
+ *
+ * Example:
+ * hex string : 1a
+ * len : 16
+ * bit string : 0000000000011010
+ *
+ * Parameter:
+ * hex_string : hex string to be converted
+ * len : number of bits in resulting bit string
+ *
+ * Return value:
+ * pointer to new bit string
+ * NULL upon error
+ */
+static char *
+urj_svf_build_bit_string (char *hex_string, int len)
+{
+ char *bit_string, *bit_string_pos;
+ int nibble;
+ char *hex_string_pos;
+ int hex_string_idx;
+
+ if (!(bit_string = calloc (len + 1, sizeof (char))))
+ {
+ urj_error_set (URJ_ERROR_OUT_OF_MEMORY, "calloc(%zd,%zd) fails",
+ (size_t) (len + 1), sizeof (char));
+ return NULL;
+ }
+
+ /* copy reduced hexadecimal string to full bit string */
+ hex_string_idx = strlen (hex_string);
+ hex_string_pos = &(hex_string[hex_string_idx]);
+ nibble = 3;
+ bit_string_pos = &(bit_string[len]);
+ do
+ {
+ bit_string_pos--;
+ if (nibble == 3)
+ {
+ nibble = 0;
+ hex_string_pos--;
+ hex_string_idx--;
+ }
+ else
+ nibble++;
+
+ *bit_string_pos =
+ urj_svf_hex2dec (hex_string_idx >= 0 ? *hex_string_pos : '0')
+ & (1 << nibble) ? '1' : '0';
+ }
+ while (bit_string_pos != bit_string);
+
+ bit_string[len] = '\0';
+
+ return bit_string;
+}
+
+
+/*
+ * urj_svf_copy_hex_to_register(hex_string, reg)
+ *
+ * Copies the contents of the hexadecimal string hex_string into the given
+ * tap register.
+ *
+ * Parameter:
+ * hex_string : hex string to be entered in reg
+ * reg : tap register to hold the converted hex string
+ *
+ * Return value:
+ * URJ_STATUS_OK, URJ_STATUS_FAIL
+ */
+static int
+urj_svf_copy_hex_to_register (char *hex_string, urj_tap_register_t *reg)
+{
+ char *bit_string;
+
+ if (!(bit_string = urj_svf_build_bit_string (hex_string, reg->len)))
+ return URJ_STATUS_FAIL;
+
+ urj_tap_register_init (reg, bit_string);
+
+ /* free memory as we do not need the intermediate bit_string anymore */
+ free (bit_string);
+
+ return URJ_STATUS_OK;
+}
+
+
+/*
+ * urj_svf_compare_tdo(tdo, mask, reg)
+ *
+ * Compares the captured device output in tap register reg with the expected
+ * hex_string tdo (specified in SVF command SDR/SDI.
+ *
+ * Comparison honours the "care" bits in mask ('1') while matching the contents
+ * of reg with tdo.
+ *
+ * Parameter:
+ * tdo : reference hex string
+ * mask : hex string for masking tdo
+ * reg : hex string to be compared vs. tdo
+ *
+ * Return value:
+ * URJ_STATUS_OK : tdo matches reg at all positions where mask is '1'
+ * URJ_STATUS_FAIL : tdo and reg do not match or error occurred
+ */
+static int
+urj_svf_compare_tdo (urj_svf_parser_priv_t *priv, char *tdo, char *mask,
+ urj_tap_register_t *reg, YYLTYPE *loc)
+{
+ char *tdo_bit, *mask_bit;
+ int pos, mismatch, result = URJ_STATUS_OK;
+
+ if (!(tdo_bit = urj_svf_build_bit_string (tdo, reg->len)))
+ return URJ_STATUS_FAIL;
+ if (!(mask_bit = urj_svf_build_bit_string (mask, reg->len)))
+ {
+ free (tdo_bit);
+ return URJ_STATUS_FAIL;
+ }
+
+ /* retrieve string representation */
+ urj_tap_register_get_string (reg);
+
+ mismatch = -1;
+ for (pos = 0; pos < reg->len; pos++)
+ if ((tdo_bit[pos] != reg->string[pos]) && (mask_bit[pos] == '1'))
+ mismatch = pos;
+
+ if (mismatch >= 0)
+ {
+ urj_log (URJ_LOG_LEVEL_NORMAL,
+ _("Error %s: mismatch at position %d for TDO\n"), "svf",
+ mismatch);
+ if (loc != NULL)
+ {
+ urj_log (URJ_LOG_LEVEL_NORMAL,
+ " in input file between line %d col %d and line %d col %d\n",
+ loc->first_line + 1, loc->first_column + 1,
+ loc->last_line + 1, loc->last_column + 1);
+ }
+
+ urj_log (URJ_LOG_LEVEL_DEBUG, "Expected : %s\n", tdo_bit);
+ urj_log (URJ_LOG_LEVEL_DEBUG, "Mask : %s\n", mask_bit);
+ urj_log (URJ_LOG_LEVEL_DEBUG, "TDO data : %s\n", reg->string);
+
+ if (priv->svf_stop_on_mismatch)
+ result = URJ_STATUS_FAIL;
+ }
+
+ free (mask_bit);
+ free (tdo_bit);
+
+ return result;
+}
+
+
+/*
+ * urj_svf_remember_param(rem, new)
+ *
+ * Assigns the contents of the string new to the string rem.
+ * By doing so, the responsability to free the memory occupied by new
+ * is transferred to the code that handles *rem.
+ * Nothing happens when new is NULL. In this case the current value of
+ * rem has to be "remembered".
+ *
+ * Parameter:
+ * rem : hex string pointer pointing to the "remembered" string
+ * new : hex string that has to be rememberd
+ * memory of the string is free'd
+ */
+static void
+urj_svf_remember_param (char **rem, char *new)
+{
+ if (new)
+ {
+ if (*rem)
+ free (*rem);
+
+ *rem = new;
+ }
+}
+
+
+/*
+ * urj_svf_all_care(string, number)
+ *
+ * Allocates a hex string of given length (number gives number of bits)
+ * and sets it to all 'F'.
+ * The allocated memory of the string has to be free'd by the caller.
+ *
+ * Parameter:
+ * string : is updated with the pointer to the allocated hex string
+ * number : number of required bits
+ *
+ * Return value:
+ * URJ_STATUS_OK, URJ_STATUS_FAIL
+ */
+static int
+urj_svf_all_care (char **string, double number)
+{
+ char *ptr;
+ int num, result;
+
+ result = 1;
+
+ num = (int) number;
+ num = num % 4 == 0 ? num / 4 : num / 4 + 1;
+
+ /* build string with all cares */
+ if (!(ptr = calloc (num + 1, sizeof (char))))
+ {
+ urj_error_set (URJ_ERROR_OUT_OF_MEMORY, _("calloc(%zd,%zd) fails"),
+ (size_t) (num + 1), sizeof (char));
+ return URJ_STATUS_FAIL;
+ }
+ memset (ptr, 'F', num);
+ ptr[num] = '\0';
+
+ urj_svf_remember_param (string, ptr);
+ /* responsability for free'ing ptr is now at the code that
+ operates on *string */
+
+ return URJ_STATUS_OK;
+}
+
+
+/* ***************************************************************************
+ * urj_svf_endxr(ir_dr, state)
+ *
+ * Register end states for shifting IR and DR.
+ *
+ * Parameter:
+ * ir_dr : selects ENDIR or ENDDR
+ * state : required end state (SVF parser encoding)
+ * ***************************************************************************/
+void
+urj_svf_endxr (urj_svf_parser_priv_t *priv, enum generic_irdr_coding ir_dr,
+ int state)
+{
+ switch (ir_dr)
+ {
+ case generic_ir:
+ priv->endir = urj_svf_map_state (state);
+ break;
+ case generic_dr:
+ priv->enddr = urj_svf_map_state (state);
+ break;
+ }
+}
+
+
+/* ***************************************************************************
+ * urj_svf_frequency(chain, freq)
+ *
+ * Implements the FREQUENCY command.
+ *
+ * Parameter:
+ * freq : frequency in HZ
+ * ***************************************************************************/
+void
+urj_svf_frequency (urj_chain_t *chain, double freq)
+{
+ urj_tap_cable_set_frequency (chain->cable, freq);
+}
+
+
+/* ***************************************************************************
+ * urj_svf_hxr(ir_dr, params)
+ *
+ * Handles HIR, HDR.
+ *
+ * Note:
+ * Functionality not implemented.
+ *
+ * Parameter:
+ * ir_dr : selects HIR or HDR
+ * params : paramter set for TXR, HXR and SXR
+ *
+ * Return value:
+ * URJ_STATUS_OK, URJ_STATUS_FAIL
+ * ***************************************************************************/
+int
+urj_svf_hxr (enum generic_irdr_coding ir_dr, struct ths_params *params)
+{
+ if (params->number != 0.0)
+ urj_warning ( _("command %s not implemented\n"),
+ ir_dr == generic_ir ? "HIR" : "HDR");
+
+ return URJ_STATUS_OK;
+}
+
+#if ! (defined __MINGW32__ || ! defined HAVE_SIGACTION_SA_ONESHOT)
+static int max_time_reached;
+static void
+sigalrm_handler (int signal)
+{
+ max_time_reached = 1;
+}
+#endif
+
+
+/* ***************************************************************************
+ * urj_svf_runtest(params)
+ *
+ * Implements the RUNTEST command.
+ *
+ * Parameter:
+ * params : paramter set for RUNTEST
+ *
+ * Return value:
+ * URJ_STATUS_OK, URJ_STATUS_FAIL
+ * ***************************************************************************/
+int
+urj_svf_runtest (urj_chain_t *chain, urj_svf_parser_priv_t *priv,
+ struct runtest *params)
+{
+ uint32_t run_count, frequency;
+
+ /* check for restrictions */
+ if (params->run_count > 0 && params->run_clk != TCK)
+ {
+ urj_error_set (URJ_ERROR_INVALID,
+ _("Error %s: only TCK is supported for RUNTEST"),
+ "svf");
+ return URJ_STATUS_FAIL;
+ }
+ if (params->max_time > 0.0 && params->max_time < params->min_time)
+ {
+ urj_error_set (URJ_ERROR_OUT_OF_BOUNDS,
+ _("Error %s: maximum time must be larger or equal to minimum time"),
+ "svf");
+ return URJ_STATUS_FAIL;
+ }
+ if (params->max_time > 0.0)
+ if (!priv->issued_runtest_maxtime)
+ {
+ urj_warning ("%s%s",
+ _("maximum time for RUNTEST not guaranteed.\n"),
+ _(" This message is only displayed once.\n"));
+ priv->issued_runtest_maxtime = 1;
+ }
+
+ /* update default values for run_state and end_state */
+ if (params->run_state != 0)
+ {
+ priv->runtest_run_state = urj_svf_map_state (params->run_state);
+
+ if (params->end_state == 0)
+ priv->runtest_end_state = urj_svf_map_state (params->run_state);
+ }
+ if (params->end_state != 0)
+ priv->runtest_end_state = urj_svf_map_state (params->end_state);
+
+ /* compute run_count */
+ run_count = params->run_count;
+ if (params->min_time > 0.0)
+ {
+ frequency =
+ priv->ref_freq >
+ 0 ? priv->ref_freq : urj_tap_cable_get_frequency (chain->cable);
+ if (frequency > 0)
+ {
+ uint32_t min_time_run_count = ceil (params->min_time * frequency);
+ if (min_time_run_count > run_count)
+ {
+ run_count = min_time_run_count;
+ }
+ }
+ else
+ {
+ urj_error_set (URJ_ERROR_OUT_OF_BOUNDS,
+ _("Error %s: Maximum cable clock frequency required for RUNTEST"),
+ "svf");
+ urj_log (URJ_LOG_LEVEL_ERROR,
+ _(" Set the cable frequency with 'FREQUENCY <Hz>'.\n"));
+ return URJ_STATUS_FAIL;
+ }
+ }
+
+ urj_svf_goto_state (chain, priv->runtest_run_state);
+
+#if defined __MINGW32__ || ! defined HAVE_SIGACTION_SA_ONESHOT
+ if (params->max_time > 0.0)
+ {
+ double maxt = urj_lib_frealtime () + params->max_time;
+
+ while (run_count-- > 0 && urj_lib_frealtime () < maxt)
+ {
+ urj_tap_chain_clock (chain, 0, 0, 1);
+ }
+ }
+ else
+ urj_tap_chain_clock (chain, 0, 0, run_count);
+
+ urj_svf_goto_state (chain, priv->runtest_end_state);
+
+#else
+ /* set up the timer for max_time */
+ if (params->max_time > 0.0)
+ {
+ struct sigaction sa;
+ unsigned max_time;
+
+ sa.sa_handler = sigalrm_handler;
+ sa.sa_flags = SA_ONESHOT;
+ sigemptyset (&sa.sa_mask);
+ if (sigaction (SIGALRM, &sa, NULL) != 0)
+ {
+ perror ("sigaction");
+ exit (EXIT_FAILURE);
+ }
+
+ max_time = floor (params->max_time / 1000000);
+ if (max_time == 0)
+ {
+ max_time = 1;
+ }
+ ualarm (max_time, 0);
+ }
+
+ if (params->max_time > 0.0)
+ while (run_count-- > 0 && !max_time_reached)
+ {
+ urj_tap_chain_clock (chain, 0, 0, 1);
+ }
+ else
+ urj_tap_chain_clock (chain, 0, 0, run_count);
+
+ urj_svf_goto_state (chain, priv->runtest_end_state);
+
+ /* stop the timer */
+ if (params->max_time > 0.0)
+ {
+ struct sigaction sa;
+ sa.sa_handler = SIG_IGN;
+ sa.sa_flags = 0;
+ sigemptyset (&sa.sa_mask);
+ if (sigaction (SIGALRM, &sa, NULL) != 0)
+ {
+ perror ("sigaction");
+ exit (EXIT_FAILURE);
+ }
+ }
+#endif
+
+ return URJ_STATUS_OK;
+}
+
+
+/* ***************************************************************************
+ * urj_svf_state(path_states, stable_state)
+ *
+ * Implements the STATE command.
+ *
+ * Parameter:
+ * path_states : states to traverse before reaching stable_state
+ * (SVF parser encoding)
+ * stable_state : final stable state
+ * (SVF parser encoding)
+ *
+ * Return value:
+ * URJ_STATUS_OK, URJ_STATUS_FAIL
+ * ***************************************************************************/
+int
+urj_svf_state (urj_chain_t *chain, urj_svf_parser_priv_t *priv,
+ struct path_states *path_states, int stable_state)
+{
+ int i;
+
+ priv->svf_state_executed = 1;
+
+ for (i = 0; i < path_states->num_states; i++)
+ urj_svf_goto_state (chain,
+ urj_svf_map_state (path_states->states[i]));
+
+ if (stable_state)
+ urj_svf_goto_state (chain, urj_svf_map_state (stable_state));
+
+ return URJ_STATUS_OK;
+}
+
+
+/* ***************************************************************************
+ * urj_svf_sxr(ir_dr, params)
+ *
+ * Implements the SIR and SDR commands.
+ *
+ * Parameter:
+ * ir_dr : selects SIR or SDR
+ * params : paramter set for TXR, HXR and SXR
+ *
+ * Return value:
+ * URJ_STATUS_OK, URJ_STATUS_FAIL
+ * ***************************************************************************/
+int
+urj_svf_sxr (urj_chain_t *chain, urj_svf_parser_priv_t *priv,
+ enum generic_irdr_coding ir_dr, struct ths_params *params,
+ YYLTYPE *loc)
+{
+ urj_svf_sxr_t *sxr_params;
+ int len, result = URJ_STATUS_OK;
+
+ sxr_params = (ir_dr == generic_ir) ?
+ &(priv->sir_params) : &(priv->sdr_params);
+
+ /* remember parameters */
+ urj_svf_remember_param (&sxr_params->params.tdi, params->tdi);
+
+ sxr_params->params.tdo = params->tdo; /* tdo is not "remembered" */
+
+ urj_svf_remember_param (&sxr_params->params.mask, params->mask);
+
+ urj_svf_remember_param (&sxr_params->params.smask, params->smask);
+
+
+ /* handle length change for MASK and SMASK */
+ if (sxr_params->params.number != params->number)
+ {
+ sxr_params->no_tdi = 1;
+ sxr_params->no_tdo = 1;
+
+ if (!params->mask)
+ if (urj_svf_all_care (&sxr_params->params.mask, params->number)
+ != URJ_STATUS_OK)
+ result = URJ_STATUS_FAIL;
+ if (!params->smask)
+ if (urj_svf_all_care (&sxr_params->params.smask, params->number)
+ != URJ_STATUS_OK)
+ result = URJ_STATUS_FAIL;
+ }
+
+ sxr_params->params.number = params->number;
+
+ /* check consistency */
+ if (sxr_params->no_tdi)
+ {
+ if (!params->tdi)
+ {
+ urj_log (URJ_LOG_LEVEL_ERROR,
+ _("Error %s: first %s command after length change must have a TDI value.\n"),
+ "svf", ir_dr == generic_ir ? "SIR" : "SDR");
+ result = URJ_STATUS_FAIL;
+ }
+ sxr_params->no_tdi = 0;
+ }
+
+ /* take over responsability for free'ing parameter strings */
+ params->tdi = NULL;
+ params->mask = NULL;
+ params->smask = NULL;
+
+ /* result of consistency check */
+ if (result != URJ_STATUS_OK)
+ return URJ_STATUS_FAIL;
+
+
+ /*
+ * handle tap registers
+ */
+ len = (int) sxr_params->params.number;
+ switch (ir_dr)
+ {
+ case generic_ir:
+ /* is SIR large enough? */
+ if (priv->ir->value->len != len)
+ {
+ urj_log (URJ_LOG_LEVEL_ERROR,
+ _("Error %s: SIR command length inconsistent.\n"), "svf");
+ if (loc != NULL)
+ {
+ urj_log (URJ_LOG_LEVEL_ERROR,
+ _(" in input file between line %d col %d and line %d col %d\n"),
+ loc->first_line + 1, loc->first_column + 1,
+ loc->last_line + 1, loc->last_column + 1);
+ }
+ return URJ_STATUS_FAIL;
+ }
+ break;
+
+ case generic_dr:
+ /* check data register SDR */
+ if (priv->dr->in->len != len)
+ {
+ /* length does not match, so install proper registers */
+ urj_tap_register_free (priv->dr->in);
+ priv->dr->in = NULL;
+ urj_tap_register_free (priv->dr->out);
+ priv->dr->out = NULL;
+
+ if (!(priv->dr->in = urj_tap_register_alloc (len)))
+ // retain error state
+ return URJ_STATUS_FAIL;
+ if (!(priv->dr->out = urj_tap_register_alloc (len)))
+ // retain error state
+ return URJ_STATUS_FAIL;
+ }
+ break;
+
+ }
+
+ /* fill register with value of TDI parameter */
+ if (urj_svf_copy_hex_to_register (sxr_params->params.tdi,
+ ir_dr == generic_ir ? priv->ir->value
+ : priv->dr->in)
+ != URJ_STATUS_OK)
+ return URJ_STATUS_FAIL;
+
+
+ /* shift selected instruction/register */
+ switch (ir_dr)
+ {
+ case generic_ir:
+ urj_svf_goto_state (chain, URJ_TAP_STATE_SHIFT_IR);
+ urj_tap_chain_shift_instructions_mode (chain,
+ sxr_params->params.tdo ? 1 : 0,
+ 0, URJ_CHAIN_EXITMODE_EXIT1);
+ urj_svf_goto_state (chain, priv->endir);
+
+ if (sxr_params->params.tdo)
+ result = urj_svf_compare_tdo (priv, sxr_params->params.tdo,
+ sxr_params->params.mask,
+ priv->ir->out, loc);
+ break;
+
+ case generic_dr:
+ urj_svf_goto_state (chain, URJ_TAP_STATE_SHIFT_DR);
+ urj_tap_chain_shift_data_registers_mode (chain,
+ sxr_params->params.
+ tdo ? 1 : 0, 0,
+ URJ_CHAIN_EXITMODE_EXIT1);
+ urj_svf_goto_state (chain, priv->enddr);
+
+ if (sxr_params->params.tdo)
+ result = urj_svf_compare_tdo (priv, sxr_params->params.tdo,
+ sxr_params->params.mask,
+ priv->dr->out, loc);
+ break;
+ }
+
+ /* log mismatches */
+ if (result != URJ_STATUS_OK)
+ priv->mismatch_occurred = 1;
+
+ return result;
+}
+
+
+
+/* ***************************************************************************
+ * urj_svf_trst(int trst_mode)
+ *
+ * Sets TRST pin according to trst_mode.
+ * TRST modes are encoded via defines in svf.h.
+ *
+ * Note:
+ * The modes Z and ABSENT are not supported.
+ *
+ * Parameter:
+ * trst_mode : selected mode for TRST
+ *
+ * Return value:
+ * URJ_STATUS_OK, URJ_STATUS_FAIL
+ * ***************************************************************************/
+int
+urj_svf_trst (urj_chain_t *chain, urj_svf_parser_priv_t *priv, int trst_mode)
+{
+ int trst_cable = -1;
+ char *unimplemented_mode;
+
+ if (priv->svf_trst_absent)
+ {
+ urj_error_set (URJ_ERROR_ILLEGAL_TRANSITION,
+ _("Error %s: no further TRST command allowed after mode ABSENT"),
+ "svf");
+ return URJ_STATUS_FAIL;
+ }
+
+ switch (trst_mode)
+ {
+ case ON:
+ trst_cable = 0;
+ break;
+ case OFF:
+ trst_cable = 1;
+ break;
+ case Z:
+ unimplemented_mode = "Z";
+ break;
+ case ABSENT:
+ unimplemented_mode = "ABSENT";
+ priv->svf_trst_absent = 1;
+
+ if (priv->svf_state_executed)
+ {
+ urj_error_set (URJ_ERROR_ILLEGAL_TRANSITION,
+ _("Error %s: TRST ABSENT must not be issued after a STATE command"),
+ "svf");
+ return URJ_STATUS_FAIL;
+ }
+ if (priv->sir_params.params.number > 0.0 ||
+ priv->sdr_params.params.number > 0.0)
+ {
+ urj_error_set (URJ_ERROR_ILLEGAL_TRANSITION,
+ _("Error %s: TRST ABSENT must not be issued after an SIR or SDR command"),
+ "svf");
+ }
+ break;
+ default:
+ unimplemented_mode = "UNKNOWN";
+ break;
+ }
+
+ if (trst_cable < 0)
+ urj_warning (_("unimplemented mode '%s' for TRST\n"),
+ unimplemented_mode);
+ else
+ urj_tap_cable_set_signal (chain->cable, URJ_POD_CS_TRST,
+ trst_cable ? URJ_POD_CS_TRST : 0);
+
+ return URJ_STATUS_OK;
+}
+
+
+/* ***************************************************************************
+ * urj_svf_txr(ir_dr, params)
+ *
+ * Handles TIR, TDR.
+ *
+ * Note:
+ * Functionality not implemented.
+ *
+ * Parameter:
+ * ir_dr : selects TIR or TDR
+ * params : paramter set for TXR, HXR and SXR
+ *
+ * Return value:
+ * URJ_STATUS_OK, URJ_STATUS_FAIL
+ * ***************************************************************************/
+int
+urj_svf_txr (enum generic_irdr_coding ir_dr, struct ths_params *params)
+{
+ if (params->number != 0.0)
+ urj_warning (_("command %s not implemented\n"),
+ ir_dr == generic_ir ? "TIR" : "TDR");
+
+ return URJ_STATUS_OK;
+}
+
+
+/* ***************************************************************************
+ * urj_svf_run(chain, SVF_FILE, stop_on_mismatch, ref_freq)
+ *
+ * Main entry point for the 'svf' command. Calls the svf parser.
+ *
+ * Checks the jtag-environment (availability of SIR instruction and SDR
+ * register). Initializes all svf-global variables and performs clean-up
+ * afterwards.
+ *
+ * Parameter:
+ * chain : pointer to global chain
+ * SVF_FILE : file handle of SVF file
+ * stop_on_mismatch : 1 = stop upon tdo mismatch
+ * 0 = continue upon mismatch
+ * ref_freq : reference frequency for RUNTEST
+ *
+ * Return value:
+ * URJ_STATUS_OK, URJ_STATUS_FAIL
+ * ***************************************************************************/
+int
+urj_svf_run (urj_chain_t *chain, FILE *SVF_FILE, int stop_on_mismatch,
+ uint32_t ref_freq)
+{
+ const urj_svf_sxr_t sxr_default = { {0.0, NULL, NULL, NULL, NULL},
+ 1, 1
+ };
+ urj_svf_parser_priv_t priv;
+ int c = ~EOF;
+ int num_lines;
+ uint32_t old_frequency = urj_tap_cable_get_frequency (chain->cable);
+
+ /* get number of lines in svf file so we can give user some feedback on long
+ files or slow cables */
+ rewind (SVF_FILE);
+ num_lines = 0;
+ while (EOF != c)
+ {
+ c = fgetc (SVF_FILE);
+ if ('\n' == c)
+ num_lines++;
+ }
+ rewind (SVF_FILE);
+ if (0 == num_lines)
+ /* avoid those annoying divide/0 crashes */
+ num_lines++;
+
+ /* initialize
+ - part
+ - instruction register
+ - data register */
+ if (chain == NULL)
+ {
+ urj_error_set (URJ_ERROR_NO_CHAIN, _("%s: no JTAG chain available"),
+ "svf");
+ return URJ_STATUS_FAIL;
+ }
+ if (chain->parts == NULL)
+ {
+ urj_error_set (URJ_ERROR_NOTFOUND,
+ _("%s: chain without any parts"), "svf");
+ return URJ_STATUS_FAIL;
+ }
+ priv.part = chain->parts->parts[chain->active_part];
+ // @@@@ RFHH is priv.part allowed to be NULL? if not, we should use
+ // urj_tap_chain_active_part()
+
+ /* setup register SDR if not already existing */
+ if (!(priv.dr = urj_part_find_data_register (priv.part, "SDR")))
+ {
+ if (urj_part_data_register_define(priv.part, "SDR", 32) != URJ_STATUS_OK)
+ return URJ_STATUS_FAIL;
+
+ if (!(priv.dr = urj_part_find_data_register (priv.part, "SDR")))
+ {
+ urj_error_set (URJ_ERROR_NOTFOUND,
+ _("%s: could not establish SDR register"),
+ "svf");
+ return URJ_STATUS_FAIL;
+ }
+ }
+
+ /* setup instruction SIR if not already existing */
+ if (!(priv.ir = urj_part_find_instruction (priv.part, "SIR")))
+ {
+ int len;
+
+ len = priv.part->instruction_length;
+ if (len > 0)
+ {
+ char *instruction_string;
+ urj_part_instruction_t *sir;
+
+ if ((instruction_string = calloc (len + 1, sizeof (char))) == NULL)
+ {
+ urj_error_set (URJ_ERROR_OUT_OF_MEMORY, "calloc(%zd,%zd) fails",
+ (size_t) (len + 1), sizeof (char));
+ return URJ_STATUS_FAIL;
+ }
+
+ memset (instruction_string, '1', len);
+ instruction_string[len] = '\0';
+
+ sir = urj_part_instruction_define (priv.part, "SIR",
+ instruction_string, "SDR");
+
+ free (instruction_string);
+
+ if (sir == NULL)
+ // retain error state
+ return URJ_STATUS_FAIL;
+ }
+
+ if (!(priv.ir = urj_part_find_instruction (priv.part, "SIR")))
+ {
+ urj_error_set (URJ_ERROR_NOTFOUND,
+ _("%s: could not establish SIR instruction"),
+ "svf");
+ return URJ_STATUS_FAIL;
+ }
+ }
+
+ /* initialize variables for new parser run */
+ priv.svf_stop_on_mismatch = stop_on_mismatch;
+
+ priv.sir_params = priv.sdr_params = sxr_default;
+
+ priv.endir = priv.enddr = URJ_TAP_STATE_RUN_TEST_IDLE;
+
+ priv.runtest_run_state = priv.runtest_end_state =
+ URJ_TAP_STATE_RUN_TEST_IDLE;
+
+ priv.svf_trst_absent = 0;
+ priv.svf_state_executed = 0;
+
+ priv.mismatch_occurred = 0;
+
+ /* set back flags for issued warnings */
+ priv.issued_runtest_maxtime = 0;
+
+ priv.ref_freq = ref_freq;
+
+ /* select SIR instruction */
+ urj_part_set_instruction (priv.part, "SIR");
+
+ if (urj_svf_bison_init (&priv, SVF_FILE, num_lines))
+ {
+ urj_svf_parse (&priv, chain);
+ urj_svf_bison_deinit (&priv);
+ }
+
+ if (priv.mismatch_occurred > 0)
+ urj_log (URJ_LOG_LEVEL_DETAIL,
+ _("Mismatches occurred between scanned device output and expected TDO values.\n"));
+ else
+ urj_log (URJ_LOG_LEVEL_DETAIL,
+ _("Scanned device output matched expected TDO values.\n"));
+
+ /* clean up */
+ /* SIR */
+ if (priv.sir_params.params.tdi)
+ free (priv.sir_params.params.tdi);
+ if (priv.sir_params.params.mask)
+ free (priv.sir_params.params.mask);
+ if (priv.sir_params.params.smask)
+ free (priv.sir_params.params.smask);
+ /* SDR */
+ if (priv.sdr_params.params.tdi)
+ free (priv.sdr_params.params.tdi);
+ if (priv.sdr_params.params.mask)
+ free (priv.sdr_params.params.mask);
+ if (priv.sdr_params.params.smask)
+ free (priv.sdr_params.params.smask);
+
+ /* restore previous frequency setting, required by SVF spec */
+ if (old_frequency != urj_tap_cable_get_frequency (chain->cable))
+ urj_tap_cable_set_frequency (chain->cable, old_frequency);
+
+ return URJ_STATUS_OK;
+}
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2004, Arnim Laeuger
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Arnim Laeuger <arniml@users.sourceforge.net>, 2004.
+ *
+ */
+
+
+#include <stdint.h>
+
+#include <urjtag/chain.h>
+
+#define MAX_PATH_STATES 64
+
+/* Coding for commands referring either to IR or DR */
+enum generic_irdr_coding
+{
+ generic_ir,
+ generic_dr
+};
+
+
+struct tdval
+{
+ int token;
+ double dvalue;
+};
+struct tcval
+{
+ int token;
+ char *cvalue;
+ struct tcval *next;
+};
+
+
+struct ths_params
+{
+ double number;
+ char *tdi;
+ char *tdo;
+ char *mask;
+ char *smask;
+};
+
+struct path_states
+{
+ int states[MAX_PATH_STATES];
+ int num_states;
+};
+
+struct runtest
+{
+ int run_state;
+ uint32_t run_count;
+ int run_clk;
+ double min_time;
+ double max_time;
+ int end_state;
+};
+
+typedef struct
+{
+ struct ths_params params;
+ int no_tdi;
+ int no_tdo;
+} urj_svf_sxr_t;
+
+
+struct svf_parser_params
+{
+ struct ths_params ths_params;
+ struct path_states path_states;
+ struct runtest runtest;
+};
+
+
+/* private data of the bison parser
+ used to store variables the would end up as globals otherwise */
+struct parser_priv
+{
+ struct svf_parser_params parser_params;
+ void *scanner;
+ urj_part_t *part;
+ urj_part_instruction_t *ir;
+ urj_data_register_t *dr;
+ urj_svf_sxr_t sir_params;
+ urj_svf_sxr_t sdr_params;
+ int endir;
+ int enddr;
+ int runtest_run_state;
+ int runtest_end_state;
+ int svf_stop_on_mismatch;
+ int svf_trst_absent;
+ int svf_state_executed;
+ uint32_t ref_freq;
+ int mismatch_occurred;
+ /* protocol issued warnings */
+ int issued_runtest_maxtime;
+};
+typedef struct parser_priv urj_svf_parser_priv_t;
+
+struct scanner_extra
+{
+ int num_lines;
+ int planb;
+ char decimal_point;
+};
+typedef struct scanner_extra urj_svf_scanner_extra_t;
+
+struct YYLTYPE;
+
+void *urj_svf_flex_init (FILE *, int);
+void urj_svf_flex_deinit (void *);
+
+int urj_svf_bison_init (urj_svf_parser_priv_t *, FILE *, int);
+void urj_svf_bison_deinit (urj_svf_parser_priv_t *);
+
+void urj_svf_endxr (urj_svf_parser_priv_t *, enum generic_irdr_coding,
+ int);
+void urj_svf_frequency (urj_chain_t *, double);
+int urj_svf_hxr (enum generic_irdr_coding, struct ths_params *);
+int urj_svf_runtest (urj_chain_t *, urj_svf_parser_priv_t *,
+ struct runtest *);
+int urj_svf_state (urj_chain_t *, urj_svf_parser_priv_t *,
+ struct path_states *, int);
+int urj_svf_sxr (urj_chain_t *, urj_svf_parser_priv_t *,
+ enum generic_irdr_coding, struct ths_params *,
+ struct YYLTYPE *);
+int urj_svf_trst (urj_chain_t *, urj_svf_parser_priv_t *, int);
+int urj_svf_txr (enum generic_irdr_coding, struct ths_params *);
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2002 by CSD at http://www-csd.ijs.si
+ * Copyright (C) 2004, Arnim Laeuger
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Arnim Laeuger <arniml@users.sourceforge.net>, 2004.
+ * Original parser skeleton by Robert Sedevici <robert.sedevcic@ijs.si>, 2002.
+ *
+ */
+
+%pure-parser
+%parse-param {urj_svf_parser_priv_t *priv_data}
+%parse-param {urj_chain_t *chain}
+%name-prefix="urj_svf_"
+%locations
+
+%{
+#include <stdio.h>
+#include <stdlib.h>
+
+#include <urjtag/log.h>
+
+#include "svf.h"
+
+/* interface to flex */
+#include "svf_bison.h"
+#define YYLEX_PARAM priv_data->scanner
+int yylex (YYSTYPE *, YYLTYPE *, void *);
+
+// @@@@ RFHH need to define YYPRINTF in terms of urj_log()
+
+#define YYERROR_VERBOSE
+
+
+void yyerror(YYLTYPE *, urj_svf_parser_priv_t *priv_data, urj_chain_t *, const char *);
+
+static void urj_svf_free_ths_params(struct ths_params *);
+%}
+
+%union {
+ int token;
+ double dvalue;
+ char *cvalue;
+ int ivalue;
+ struct tdval tdval;
+ struct tcval *tcval;
+}
+
+
+%token IDENTIFIER NUMBER HEXA_NUM VECTOR_STRING
+
+%token EMPTY
+%token ENDDR ENDIR
+%token FREQUENCY HZ
+%token STATE RESET IDLE
+%token TDI TDO MASK SMASK
+%token TRST ON OFF Z ABSENT
+%token HDR HIR SDR SIR TDR TIR
+%token PIO PIOMAP IN OUT INOUT H L U D X
+%token RUNTEST MAXIMUM SEC TCK SCK ENDSTATE
+%token IRPAUSE IRSHIFT IRUPDATE IRSELECT IREXIT1 IREXIT2 IRCAPTURE
+%token DRPAUSE DRSHIFT DRUPDATE DRSELECT DREXIT1 DREXIT2 DRCAPTURE
+%token SVF_EOF 0 /* SVF_EOF must match bison's token YYEOF */
+
+%type <dvalue> NUMBER
+%type <tdval> runtest_clk_count
+%type <token> runtest_run_state_opt
+%type <token> runtest_end_state_opt
+
+%%
+
+line
+ : /* empty */
+ | line svf_statement
+ | error SVF_EOF
+ /* Eat whole file in case of error.
+ * This is necessary because the lexer will remember parts of the file
+ * inside its input buffer.
+ * In case errors do not driver the lexer to EOF then the next start
+ * of yyparse() will read from this buffer, executing commands after the
+ * previous error!
+ */
+;
+
+
+svf_statement
+ : ENDIR stable_state ';'
+ {
+ urj_svf_endxr(priv_data, generic_ir, $<token>2);
+ }
+
+ | ENDDR stable_state ';'
+ {
+ urj_svf_endxr(priv_data, generic_dr, $<token>2);
+ }
+
+ | FREQUENCY ';'
+ {
+ urj_svf_frequency(chain, 0.0);
+ }
+
+ | FREQUENCY NUMBER HZ ';'
+ {
+ urj_svf_frequency(chain, $2);
+ }
+
+ | HDR NUMBER ths_param_list ';'
+ {
+ struct ths_params *p = &(priv_data->parser_params.ths_params);
+
+ p->number = $2;
+ urj_svf_hxr(generic_dr, p);
+ urj_svf_free_ths_params(p);
+ }
+
+ | HIR NUMBER ths_param_list ';'
+ {
+ struct ths_params *p = &(priv_data->parser_params.ths_params);
+
+ p->number = $2;
+ urj_svf_hxr(generic_ir, p);
+ urj_svf_free_ths_params(p);
+ }
+
+ | PIOMAP '(' direction IDENTIFIER piomap_rec ')' ';'
+ {
+ urj_log (URJ_LOG_LEVEL_ERROR, "PIOMAP not implemented\n");
+ yyerror(&@$, priv_data, chain, "PIOMAP");
+ YYERROR;
+ }
+
+ | PIO VECTOR_STRING ';'
+ {
+ free($<cvalue>2);
+ urj_log (URJ_LOG_LEVEL_ERROR, "PIO not implemented\n");
+ yyerror(&@$, priv_data, chain, "PIO");
+ YYERROR;
+ }
+
+ | RUNTEST runtest_run_state_opt runtest_clk_count runtest_time_opt runtest_end_state_opt ';'
+ {
+ struct runtest *rt = &(priv_data->parser_params.runtest);
+
+ rt->run_state = $2;
+ rt->run_count = $3.dvalue;
+ rt->run_clk = $3.token;
+ rt->end_state = $5;
+
+ if (urj_svf_runtest(chain, priv_data, rt) != URJ_STATUS_OK) {
+ yyerror(&@$, priv_data, chain, "RUNTEST");
+ YYERROR;
+ }
+ }
+
+ | RUNTEST runtest_run_state_opt runtest_time runtest_end_state_opt ';'
+ {
+ struct runtest *rt = &(priv_data->parser_params.runtest);
+
+ rt->run_state = $2;
+ rt->run_count = 0;
+ rt->run_clk = 0;
+ rt->end_state = $4;
+
+ if (urj_svf_runtest(chain, priv_data, rt) != URJ_STATUS_OK) {
+ yyerror(&@$, priv_data, chain, "RUNTEST");
+ YYERROR;
+ }
+ }
+
+ | SDR NUMBER ths_param_list ';'
+ {
+ struct ths_params *p = &(priv_data->parser_params.ths_params);
+ int result;
+
+ p->number = $2;
+ result = urj_svf_sxr(chain, priv_data, generic_dr, p, &@$);
+ urj_svf_free_ths_params(p);
+
+ if (result != URJ_STATUS_OK) {
+ yyerror(&@$, priv_data, chain, "SDR");
+ YYERROR;
+ }
+ }
+
+ | SIR NUMBER ths_param_list ';'
+ {
+ struct ths_params *p = &(priv_data->parser_params.ths_params);
+ int result;
+
+ p->number = $2;
+ result = urj_svf_sxr(chain, priv_data, generic_ir, p, &@$);
+ urj_svf_free_ths_params(p);
+
+ if (result != URJ_STATUS_OK) {
+ yyerror(&@$, priv_data, chain, "SIR");
+ YYERROR;
+ }
+ }
+
+ | STATE path_states stable_state ';'
+ {
+ if (urj_svf_state(chain, priv_data, &(priv_data->parser_params.path_states), $<token>3) != URJ_STATUS_OK) {
+ yyerror(&@$, priv_data, chain, "STATE");
+ YYERROR;
+ }
+ }
+
+ | TDR NUMBER ths_param_list ';'
+ {
+ struct ths_params *p = &(priv_data->parser_params.ths_params);
+ int result;
+
+ p->number = $2;
+ result = urj_svf_txr(generic_dr, p);
+ urj_svf_free_ths_params(p);
+
+ if (result != URJ_STATUS_OK) {
+ yyerror(&@$, priv_data, chain, "TDR");
+ YYERROR;
+ }
+ }
+
+ | TIR NUMBER ths_param_list ';'
+ {
+ struct ths_params *p = &(priv_data->parser_params.ths_params);
+ int result;
+
+ p->number = $2;
+ result = urj_svf_txr(generic_ir, p);
+ urj_svf_free_ths_params(p);
+
+ if (result != URJ_STATUS_OK) {
+ yyerror(&@$, priv_data, chain, "TIR");
+ YYERROR;
+ }
+ }
+
+ | TRST trst_mode ';'
+ {
+ if (urj_svf_trst(chain, priv_data, $<token>2) != URJ_STATUS_OK) {
+ yyerror(&@$, priv_data, chain, "TRST");
+ YYERROR;
+ }
+ }
+;
+
+
+ths_param_list
+ : /* empty element */
+ | ths_param_list ths_opt_param
+;
+
+ths_opt_param
+ : TDI HEXA_NUM
+ {
+ priv_data->parser_params.ths_params.tdi = $<cvalue>2;
+ }
+
+ | TDO HEXA_NUM
+ {
+ priv_data->parser_params.ths_params.tdo = $<cvalue>2;
+ }
+
+ | MASK HEXA_NUM
+ {
+ priv_data->parser_params.ths_params.mask = $<cvalue>2;
+ }
+
+ | SMASK HEXA_NUM
+ {
+ priv_data->parser_params.ths_params.smask = $<cvalue>2;
+ }
+;
+
+stable_state
+ : RESET
+ | IDLE
+ | DRPAUSE
+ | IRPAUSE
+;
+
+runtest_run_state_opt
+ : { $$ = 0; } /* specify value for 'not existing' */
+ | stable_state
+ {
+ $$ = $<token>1;
+ }
+;
+
+runtest_clk_count
+ : NUMBER TCK
+ {
+ $$.token = $<token>2;
+ $$.dvalue = $<dvalue>1;
+ }
+
+ | NUMBER SCK
+ {
+ $$.token = $<token>2;
+ $$.dvalue = $<dvalue>1;
+ }
+;
+
+runtest_time_opt
+ :
+ {
+ priv_data->parser_params.runtest.min_time = 0.0;
+ priv_data->parser_params.runtest.max_time = 0.0;
+ }
+
+ | runtest_time
+;
+
+runtest_time
+ : NUMBER SEC runtest_max_time_opt
+ {
+ priv_data->parser_params.runtest.min_time = $<dvalue>1;
+ }
+;
+
+runtest_max_time_opt
+ :
+ {
+ priv_data->parser_params.runtest.max_time = 0.0;
+ }
+ | MAXIMUM NUMBER SEC
+ {
+ priv_data->parser_params.runtest.max_time = $<dvalue>2;
+ }
+;
+
+runtest_end_state_opt
+ : { $$ = 0; } /* specify value for 'not existing' */
+ | ENDSTATE stable_state
+ {
+ $$ = $<token>2;
+ }
+;
+
+all_states
+ : DRSELECT
+ | DRCAPTURE
+ | DRSHIFT
+ | DREXIT1
+ | DREXIT2
+ | DRUPDATE
+ | IRSELECT
+ | IRCAPTURE
+ | IRSHIFT
+ | IREXIT1
+ | IREXIT2
+ | IRUPDATE
+ | IRPAUSE
+ | DRPAUSE
+ | RESET
+ | IDLE
+;
+
+path_states
+ : /* empty element, returns index 0 */
+ {
+ priv_data->parser_params.path_states.num_states = 0;
+ }
+
+ | path_states all_states
+ {
+ struct path_states *ps = &(priv_data->parser_params.path_states);
+
+ if (ps->num_states < MAX_PATH_STATES) {
+ ps->states[ps->num_states] = $<token>2;
+ ps->num_states++;
+ } else
+ urj_log (URJ_LOG_LEVEL_ERROR, "Error %s: maximum number of %d path states reached.\n",
+ "svf", MAX_PATH_STATES);
+ }
+;
+
+piomap_rec
+ :
+ | piomap_rec direction IDENTIFIER
+;
+
+trst_mode
+ : ON
+ | OFF
+ | Z
+ | ABSENT
+;
+
+direction
+ : IN
+ | OUT
+ | INOUT
+;
+
+%% void
+yyerror (YYLTYPE *locp, urj_svf_parser_priv_t *priv_data, urj_chain_t *chain,
+ const char *error_string)
+{
+ urj_log (URJ_LOG_LEVEL_ERROR, "Error occurred for SVF command %s.\n",
+ error_string);
+}
+
+
+static void
+urj_svf_free_ths_params (struct ths_params *params)
+{
+ params->number = 0.0;
+
+ if (params->tdi)
+ {
+ free (params->tdi);
+ params->tdi = NULL;
+ }
+ if (params->tdo)
+ {
+ free (params->tdo);
+ params->tdo = NULL;
+ }
+ if (params->mask)
+ {
+ free (params->mask);
+ params->mask = NULL;
+ }
+ if (params->smask)
+ {
+ free (params->smask);
+ params->smask = NULL;
+ }
+}
+
+
+int
+urj_svf_bison_init (urj_svf_parser_priv_t *priv_data, FILE *f, int num_lines)
+{
+ const struct svf_parser_params params = {
+ {0.0, NULL, NULL, NULL, NULL},
+ {{}, 0},
+ {0, 0.0, 0, 0, 0, 0}
+ };
+
+ priv_data->parser_params = params;
+
+ if ((priv_data->scanner =
+ urj_svf_flex_init (f, num_lines)) == NULL)
+ return 0;
+ else
+ return 1;
+}
+
+
+void
+urj_svf_bison_deinit (urj_svf_parser_priv_t *priv_data)
+{
+ urj_svf_flex_deinit (priv_data->scanner);
+}
--- /dev/null
+/* $Id$
+ *
+ * Copyright (C) 2002 by CSD at http://www-csd.ijs.si
+ * Copyright (C) 2004, Arnim Laeuger
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Original lexer by Robert Sedevici <robert.sedevcic@ijs.si>, 2002.
+ * Modified by Arnim Laeuger <arniml@users.sourceforge.net>, 2004.
+ *
+ */
+
+
+%option bison-bridge
+%option reentrant
+%option prefix="urj_svf_"
+%option outfile="lex.yy.c"
+%option bison-locations
+
+%{
+#include <string.h>
+#include <stdlib.h>
+#include <ctype.h>
+
+#include <sysdep.h>
+#include <urjtag/log.h>
+
+#ifdef ENABLE_NLS
+#include <locale.h>
+#endif
+
+#include "svf.h"
+
+#include "svf_bison.h"
+
+#define YY_EXTRA_TYPE urj_svf_scanner_extra_t *
+
+static int map_keyw_ident(YYSTYPE *, char *);
+static void align_string(char *);
+
+static void fix_yylloc(YYLTYPE *, char *);
+static void fix_yylloc_nl(YYLTYPE *, char *, YY_EXTRA_TYPE);
+static void progress_nl(YYLTYPE *, YY_EXTRA_TYPE);
+
+int yywrap(yyscan_t scanner);
+int yywrap(yyscan_t scanner)
+{
+ return(1);
+}
+
+#define YY_USER_INIT \
+ do { \
+ yylloc->first_line = yylloc->last_line = yylloc->first_column = yylloc->last_column = 0; \
+ } while (0)
+
+%}
+
+%pointer
+
+LETTER [A-Za-z]
+DIGIT [0-9]
+HEX_DIGIT {DIGIT}|[a-fA-F]
+WSPACE [ \t\r]
+COMMENT (!.*)|("//".*)[^\n]
+
+%s expect_vector
+
+%%
+
+
+{LETTER}+[0-9A-Za-z_]* {
+ /* token is a keyword or identifier */
+ int keyw;
+
+ fix_yylloc(yylloc, yytext);
+ keyw = map_keyw_ident(yylval, yytext);
+
+ /* enable detection of VECTOR_STRING when this is a PIO command */
+ if (keyw == PIO) {
+ BEGIN(expect_vector);
+ }
+
+ return(keyw);
+} /* end of keyword or identifier */
+
+
+{DIGIT}+(\.{DIGIT}+)?([eE][-+]?{DIGIT}+)? {
+ /* token is a real number */
+
+ char *real_string = strdup(yytext);
+
+ /* Note: We need to compensate the current locale's representation
+ of the decimal point since strtod() functionality depends
+ on the locale settings. */
+
+ if (real_string) {
+ char *point_pos = strchr(real_string, '.');
+ YY_EXTRA_TYPE extra = yyget_extra(yyscanner);
+
+ if (point_pos)
+ /* convert decimal point into current locale's representation */
+ *point_pos = extra->decimal_point;
+
+ yylval->dvalue = strtod(real_string, (char **) NULL);
+ fix_yylloc(yylloc, yytext);
+
+ free(real_string);
+ } else
+ yylval->dvalue = 0.0;
+
+ return(NUMBER);
+} /* end of real number */
+
+
+<expect_vector>"("{WSPACE}*[\n\rHhLlZzUuDdXx \t\r]+{WSPACE}*")" {
+ /* There is an overlap of VECTOR_STRING and HEXA_NUM when the string
+ contains only 'd' or 'D'. To prevent complicated parsing rules,
+ the lexer is instructed to detect VECTOR_STRING only when a PIO
+ command has been scanned previously.
+ This is enabled with <expect_vector>. */
+ /* token is a vector string */
+ char *cstring;
+
+ fix_yylloc_nl(yylloc, yytext, yyget_extra(yyscanner));
+ align_string(yytext);
+
+ cstring = calloc(strlen(yytext) + 1, sizeof(char));
+ strcpy(cstring, yytext);
+ yylval->cvalue = cstring;
+ return(VECTOR_STRING);
+} /* end of vector string */
+
+
+"("{WSPACE}*[\n\rA-Fa-f0-9 \t\r]+{WSPACE}*")" {
+ /* token is a hexadecimal value (2) */
+ char *cstring;
+
+ fix_yylloc_nl(yylloc, yytext, yyget_extra(yyscanner));
+ align_string(yytext);
+
+ cstring = calloc(strlen(yytext) + 1, sizeof(char));
+ strcpy(cstring, yytext);
+ yylval->cvalue = cstring;
+ return(HEXA_NUM);
+} /* end of hexadecimal value */
+
+
+{WSPACE}+ {
+ /* token is a white space character */
+ fix_yylloc(yylloc, yytext);
+} /* end of white space */
+
+
+{COMMENT} {
+ /* token is a comment */
+ fix_yylloc(yylloc, yytext);
+} /* end of comment */
+
+
+[()] {
+ /* left or right parenthes */
+ fix_yylloc(yylloc, yytext);
+ return(yytext[0]);
+} /* end of left or right parenthesis */
+
+
+\n {
+ /* token is a new line character */
+ yylloc->first_line = yylloc->last_line;
+ yylloc->first_column = yylloc->last_column;
+ ++yylloc->last_line;
+ yylloc->last_column = 0;
+ progress_nl(yylloc, yyget_extra(yyscanner));
+} /* end of new line */
+
+
+; {
+ /* token is end of statement character */
+
+ /* release expect_vector */
+ BEGIN(INITIAL);
+
+ fix_yylloc(yylloc, yytext);
+ return(yytext[0]);
+} /* end of statement character */
+
+
+<<EOF>> {
+
+ return(EOF);
+} /* end of file token */
+
+
+. {
+ /* print token if interactive parsing enabled and yyin != stdin */
+
+ urj_log (URJ_LOG_LEVEL_ERROR,
+ "Error: \"%s\" is not a legal SVF language token\n", yytext);
+
+} /* end of any other character */
+
+%%
+
+
+/*=============================================================================
+ * rwtable - reserve word table
+ *===========================================================================*/
+static struct rwtable
+{
+ char *rw_name;
+ int rw_yylex;
+} rwtable[] =
+{
+ { "ABSENT", ABSENT },
+ { "D", D },
+ { "DRCAPTURE", DRCAPTURE },
+ { "DREXIT1", DREXIT1 },
+ { "DREXIT2", DREXIT2 },
+ { "DRPAUSE", DRPAUSE },
+ { "DRSELECT", DRSELECT },
+ { "DRSHIFT", DRSHIFT },
+ { "DRUPDATE", DRUPDATE },
+ { "EMPTY", EMPTY },
+ { "ENDDR", ENDDR },
+ { "ENDIR", ENDIR },
+ { "ENDSTATE", ENDSTATE },
+ { "FREQUENCY", FREQUENCY },
+ { "H", H },
+ { "HDR", HDR },
+ { "HIR", HIR },
+ { "HZ", HZ },
+ { "IDLE", IDLE },
+ { "IN", IN },
+ { "INOUT", INOUT },
+ { "IRCAPTURE", IRCAPTURE },
+ { "IREXIT1", IREXIT1 },
+ { "IREXIT2", IREXIT2 },
+ { "IRPAUSE", IRPAUSE },
+ { "IRSELECT", IRSELECT },
+ { "IRSHIFT", IRSHIFT },
+ { "IRUPDATE", IRUPDATE },
+ { "L", L },
+ { "MASK", MASK },
+ { "MAXIMUM", MAXIMUM },
+ { "OFF", OFF },
+ { "ON", ON },
+ { "OUT", OUT },
+ { "PIO", PIO },
+ { "PIOMAP", PIOMAP },
+ { "RESET", RESET },
+ { "RUNTEST", RUNTEST },
+ { "SCK", SCK },
+ { "SDR", SDR },
+ { "SEC", SEC },
+ { "SIR", SIR },
+ { "SMASK", SMASK },
+ { "STATE", STATE },
+ { "TCK", TCK },
+ { "TDI", TDI },
+ { "TDO", TDO },
+ { "TDR", TDR },
+ { "TIR", TIR },
+ { "TRST", TRST },
+ { "U", U },
+ { "X", X },
+ { "Z", Z }
+}; //end of rwtable struct
+
+#define END(v) (sizeof(v) / sizeof((v)[0]) - 1)
+
+static int
+map_keyw_ident (YYSTYPE *mylval, char *str)
+{
+ int idx;
+ int rw = IDENTIFIER;
+
+ mylval->cvalue = str;
+
+ for (idx = 0; idx <= END (rwtable); idx++)
+ {
+ if (strcasecmp (rwtable[idx].rw_name, str) == 0)
+ {
+ /* always return terminal value as semantic value */
+ rw = rwtable[idx].rw_yylex;
+ mylval->token = rw;
+ }
+ }
+
+ return (rw);
+}
+
+
+static void
+align_string (char *str)
+{
+ int src, dst, len;
+
+ dst = 0;
+ len = strlen (str);
+
+ for (src = 0; src < len; src++)
+ {
+ if (isxdigit (str[src]))
+ str[dst++] = str[src];
+ }
+ str[dst] = '\0';
+}
+
+
+static void
+fix_yylloc (YYLTYPE *mylloc, char *str)
+{
+ mylloc->first_line = mylloc->last_line;
+ mylloc->first_column = mylloc->last_column;
+ mylloc->last_column += strlen (str);
+}
+
+
+static void
+fix_yylloc_nl (YYLTYPE *mylloc, char *str, YY_EXTRA_TYPE extra)
+{
+ char *p;
+
+ mylloc->first_line = mylloc->last_line;
+ mylloc->first_column = mylloc->last_column;
+ for (p = str; *p; ++p)
+ {
+ if (*p == '\n')
+ {
+ mylloc->last_column = 0;
+ ++mylloc->last_line;
+ progress_nl (mylloc, extra);
+ }
+ else
+ {
+ ++mylloc->last_column;
+ }
+ }
+}
+
+
+static void
+progress_nl (YYLTYPE *mylloc, YY_EXTRA_TYPE extra)
+{
+ int percent;
+
+ if (mylloc->last_line % 10 == 0)
+ {
+ percent = ((mylloc->last_line * 100) + 1) / extra->num_lines;
+ if (percent <= 1)
+ return; // dont bother printing < 1 %
+ urj_log (URJ_LOG_LEVEL_DETAIL, "\r");
+ urj_log (URJ_LOG_LEVEL_DETAIL, _("Parsing %6d/%d (%3.0d%%)"),
+ mylloc->last_line, extra->num_lines, percent);
+ }
+}
+
+
+void *
+urj_svf_flex_init (FILE *f, int num_lines)
+{
+ YY_EXTRA_TYPE extra;
+ yyscan_t scanner;
+
+ /* get our scanner structure */
+ if (yylex_init (&scanner) != 0)
+ return NULL;
+
+ yyset_in (f, scanner);
+
+ if (!(extra = malloc (sizeof (urj_svf_scanner_extra_t))))
+ {
+ urj_error_set (URJ_ERROR_OUT_OF_MEMORY, _("malloc(%zd) fails"),
+ sizeof (urj_svf_scanner_extra_t));
+ yylex_destroy (scanner);
+ return NULL;
+ }
+
+ extra->num_lines = num_lines;
+
+#ifdef ENABLE_NLS
+ {
+ struct lconv *lc = localeconv ();
+ extra->decimal_point = lc->decimal_point[0];
+ }
+#else
+ extra->decimal_point = '.';
+#endif
+
+ yyset_extra (extra, scanner);
+
+ return scanner;
+}
+
+
+void
+urj_svf_flex_deinit (void *scanner)
+{
+ YY_EXTRA_TYPE extra = yyget_extra (scanner);
+ urj_log (URJ_LOG_LEVEL_DETAIL, "\n");
+ free (extra);
+ yylex_destroy (scanner);
+}
--- /dev/null
+Makefile
+Makefile.in
+.deps
+.libs
--- /dev/null
+#
+# $Id$
+#
+# Copyright (C) 2002 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Marcel Telka <marcel@telka.sk>, 2002.
+#
+
+include $(top_srcdir)/Makefile.rules
+
+noinst_LTLIBRARIES = libtap.la
+
+libtap_la_SOURCES = \
+ tap.c \
+ register.c \
+ state.c \
+ chain.c \
+ detect.c \
+ discovery.c \
+ idcode.c \
+ parport.c \
+ usbconn.c \
+ cable.c \
+ cable/generic.h \
+ cable/generic.c \
+ cable/generic_usbconn.h \
+ cable/generic_usbconn.c \
+ cable/generic_parport.h \
+ cable/generic_parport.c \
+ cable/cmd_xfer.h \
+ cable/cmd_xfer.c
+
+if ENABLE_CABLE_ARCOM
+libtap_la_SOURCES += \
+ cable/arcom.c
+endif
+
+if ENABLE_CABLE_BYTEBLASTER
+libtap_la_SOURCES += \
+ cable/byteblaster.c
+endif
+
+if ENABLE_CABLE_DLC5
+libtap_la_SOURCES += \
+ cable/dlc5.c
+endif
+
+if ENABLE_CABLE_EA253
+libtap_la_SOURCES += \
+ cable/ea253.c
+endif
+
+if ENABLE_CABLE_EI012
+libtap_la_SOURCES += \
+ cable/ei012.c
+endif
+
+if ENABLE_CABLE_KEITHKOEP
+libtap_la_SOURCES += \
+ cable/keithkoep.c
+endif
+
+if ENABLE_CABLE_LATTICE
+libtap_la_SOURCES += \
+ cable/lattice.c
+endif
+
+if ENABLE_CABLE_MPCBDM
+libtap_la_SOURCES += \
+ cable/mpcbdm.c
+endif
+
+if ENABLE_CABLE_TRITON
+libtap_la_SOURCES += \
+ cable/triton.c
+endif
+
+if ENABLE_CABLE_WIGGLER
+libtap_la_SOURCES += \
+ cable/minimal.c \
+ cable/wiggler.c \
+ cable/wiggler2.c
+endif
+
+if ENABLE_CABLE_JLINK
+libtap_la_SOURCES += \
+ cable/jlink.c
+endif
+
+if ENABLE_CABLE_XPC
+libtap_la_SOURCES += \
+ cable/xpc.c
+endif
+
+if ENABLE_CABLE_USBBLASTER
+libtap_la_SOURCES += \
+ cable/usbblaster.c
+endif
+
+if ENABLE_CABLE_FT2232
+libtap_la_SOURCES += \
+ cable/ft2232.c
+endif
+
+if ENABLE_CABLE_TS7800
+libtap_la_SOURCES += \
+ cable/ts7800.c
+endif
+
+
+if HAVE_LIBUSB
+libtap_la_SOURCES += \
+ usbconn/libusb.c
+ usbconn/libusb.h
+endif
+
+
+if ENABLE_JIM
+libtap_la_SOURCES += \
+ cable/jim.c
+endif
+
+if ENABLE_LOWLEVEL_FTDI
+libtap_la_SOURCES += \
+ usbconn/libftdi.c \
+ usbconn/libftdx.h
+endif
+
+if ENABLE_LOWLEVEL_FTD2XX
+libtap_la_SOURCES += \
+ usbconn/libftd2xx.c
+endif
+
+if ENABLE_LOWLEVEL_DIRECT
+libtap_la_SOURCES += \
+ parport/direct.c
+endif
+
+if ENABLE_LOWLEVEL_PPDEV
+libtap_la_SOURCES += \
+ parport/ppdev.c
+endif
+
+if ENABLE_LOWLEVEL_PPI
+libtap_la_SOURCES += \
+ parport/ppi.c
+endif
+
+if ENABLE_CABLE_EP9307
+libtap_la_SOURCES += \
+ cable/vision_ep9307.c
+endif
+
+AM_CFLAGS = $(WARNINGCFLAGS)
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2003 ETC s.r.o.
+ * Copyright (C) 2005 Hein Roehrig,
+ * Copyright (C) 2008 Kolja Waschk
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2003;
+ * Busy loop waiting (*freq* functions) Hein Roehrig, 2005;
+ * JTAG activity queuing and API (*defer* functions) K. Waschk, 2008
+ *
+ */
+
+#include <sysdep.h>
+
+#include <stdio.h>
+#include <stdlib.h>
+#include <unistd.h>
+#include <sys/types.h>
+#include <stdint.h>
+#include <string.h>
+
+#include <urjtag/log.h>
+#include <urjtag/error.h>
+#include <urjtag/bus.h>
+#include <urjtag/bus_driver.h>
+#include <urjtag/chain.h>
+#include <urjtag/tap.h>
+#include <urjtag/cable.h>
+
+/* @@@@ RFHH stick these into a (or many) .h files */
+extern urj_cable_driver_t urj_tap_cable_arcom_driver;
+extern urj_cable_driver_t urj_tap_cable_byteblaster_driver;
+extern urj_cable_driver_t urj_tap_cable_usbblaster_driver;
+extern urj_cable_driver_t urj_tap_cable_ft2232_driver;
+extern urj_cable_driver_t urj_tap_cable_ft2232_jtagkey_driver;
+extern urj_cable_driver_t urj_tap_cable_ft2232_armusbocd_driver;
+extern urj_cable_driver_t urj_tap_cable_ft2232_gnice_driver;
+extern urj_cable_driver_t urj_tap_cable_ft2232_oocdlinks_driver;
+extern urj_cable_driver_t urj_tap_cable_ft2232_signalyzer_driver;
+extern urj_cable_driver_t urj_tap_cable_ft2232_turtelizer2_driver;
+extern urj_cable_driver_t urj_tap_cable_ft2232_usbtojtagif_driver;
+extern urj_cable_driver_t urj_tap_cable_ft2232_flyswatter_driver;
+extern urj_cable_driver_t urj_tap_cable_ft2232_usbscarab2_driver;
+extern urj_cable_driver_t urj_tap_cable_dlc5_driver;
+extern urj_cable_driver_t urj_tap_cable_ea253_driver;
+extern urj_cable_driver_t urj_tap_cable_ei012_driver;
+extern urj_cable_driver_t urj_tap_cable_igloo_driver;
+extern urj_cable_driver_t urj_tap_cable_keithkoep_driver;
+extern urj_cable_driver_t urj_tap_cable_lattice_driver;
+extern urj_cable_driver_t urj_tap_cable_mpcbdm_driver;
+extern urj_cable_driver_t urj_tap_cable_triton_driver;
+extern urj_cable_driver_t urj_tap_cable_jim_driver;
+extern urj_cable_driver_t urj_tap_cable_minimal_driver;
+extern urj_cable_driver_t urj_tap_cable_wiggler_driver;
+extern urj_cable_driver_t urj_tap_cable_wiggler2_driver;
+extern urj_cable_driver_t urj_tap_cable_xpc_int_driver;
+extern urj_cable_driver_t urj_tap_cable_xpc_ext_driver;
+extern urj_cable_driver_t urj_tap_cable_jlink_driver;
+extern urj_cable_driver_t urj_tap_cable_ep9307_driver;
+extern urj_cable_driver_t urj_tap_cable_ts7800_driver;
+
+urj_cable_driver_t *urj_tap_cable_drivers[] = {
+#ifdef ENABLE_CABLE_ARCOM
+ &urj_tap_cable_arcom_driver,
+#endif
+#ifdef ENABLE_CABLE_BYTEBLASTER
+ &urj_tap_cable_byteblaster_driver,
+#endif
+
+#ifdef ENABLE_CABLE_USBBLASTER
+ &urj_tap_cable_usbblaster_driver,
+#endif
+
+#ifdef ENABLE_CABLE_FT2232
+ &urj_tap_cable_ft2232_driver,
+ &urj_tap_cable_ft2232_jtagkey_driver,
+ &urj_tap_cable_ft2232_armusbocd_driver,
+ &urj_tap_cable_ft2232_gnice_driver,
+ &urj_tap_cable_ft2232_oocdlinks_driver,
+ &urj_tap_cable_ft2232_signalyzer_driver,
+ &urj_tap_cable_ft2232_turtelizer2_driver,
+ &urj_tap_cable_ft2232_usbtojtagif_driver,
+ &urj_tap_cable_ft2232_flyswatter_driver,
+ &urj_tap_cable_ft2232_usbscarab2_driver,
+#endif
+
+#ifdef ENABLE_CABLE_DLC5
+ &urj_tap_cable_dlc5_driver,
+#endif
+#ifdef ENABLE_CABLE_EA253
+ &urj_tap_cable_ea253_driver,
+#endif
+#ifdef ENABLE_CABLE_EI012
+ &urj_tap_cable_ei012_driver,
+#endif
+#ifdef ENABLE_CABLE_IGLOO
+ &urj_tap_cable_igloo_driver,
+#endif
+#ifdef ENABLE_CABLE_KEITHKOEP
+ &urj_tap_cable_keithkoep_driver,
+#endif
+#ifdef ENABLE_CABLE_LATTICE
+ &urj_tap_cable_lattice_driver,
+#endif
+#ifdef ENABLE_CABLE_MPCBDM
+ &urj_tap_cable_mpcbdm_driver,
+#endif
+#ifdef ENABLE_CABLE_TRITON
+ &urj_tap_cable_triton_driver,
+#endif
+#ifdef ENABLE_JIM
+ &urj_tap_cable_jim_driver,
+#endif
+#ifdef ENABLE_CABLE_WIGGLER
+ &urj_tap_cable_minimal_driver,
+ &urj_tap_cable_wiggler_driver,
+ &urj_tap_cable_wiggler2_driver,
+#endif
+
+#ifdef ENABLE_CABLE_XPC
+ &urj_tap_cable_xpc_int_driver,
+ &urj_tap_cable_xpc_ext_driver,
+#endif
+
+#ifdef ENABLE_CABLE_JLINK
+ &urj_tap_cable_jlink_driver,
+#endif
+
+#ifdef ENABLE_CABLE_EP9307
+ &urj_tap_cable_ep9307_driver,
+#endif
+
+#ifdef ENABLE_CABLE_TS7800
+ &urj_tap_cable_ts7800_driver,
+#endif
+ NULL /* last must be NULL */
+};
+
+void
+urj_tap_cable_free (urj_cable_t *cable)
+{
+ cable->driver->cable_free (cable);
+}
+
+int
+urj_tap_cable_init (urj_cable_t *cable)
+{
+ cable->delay = 0;
+ cable->frequency = 0;
+
+ cable->todo.max_items = 128;
+ cable->todo.num_items = 0;
+ cable->todo.next_item = 0;
+ cable->todo.next_free = 0;
+ cable->todo.data =
+ malloc (cable->todo.max_items * sizeof (urj_cable_queue_t));
+
+ cable->done.max_items = 128;
+ cable->done.num_items = 0;
+ cable->done.next_item = 0;
+ cable->done.next_free = 0;
+ cable->done.data =
+ malloc (cable->done.max_items * sizeof (urj_cable_queue_t));
+
+ if (cable->todo.data == NULL || cable->done.data == NULL)
+ {
+ urj_error_set (URJ_ERROR_OUT_OF_MEMORY,
+ _("malloc(%zd)/malloc(%zd) fails"),
+ cable->todo.max_items * sizeof (urj_cable_queue_t),
+ cable->done.max_items * sizeof (urj_cable_queue_t));
+ if (cable->todo.data != NULL)
+ free (cable->todo.data);
+ if (cable->done.data != NULL)
+ free (cable->done.data);
+ return URJ_STATUS_FAIL;
+ }
+
+ return cable->driver->init (cable);
+}
+
+void
+urj_tap_cable_flush (urj_cable_t *cable, urj_cable_flush_amount_t how_much)
+{
+ cable->driver->flush (cable, how_much);
+}
+
+void
+urj_tap_cable_done (urj_cable_t *cable)
+{
+ urj_tap_cable_flush (cable, URJ_TAP_CABLE_COMPLETELY);
+ if (cable->todo.data != NULL)
+ {
+ free (cable->todo.data);
+ free (cable->done.data);
+ }
+ cable->driver->done (cable);
+}
+
+int
+urj_tap_cable_add_queue_item (urj_cable_t *cable, urj_cable_queue_info_t *q)
+{
+ int i, j;
+ if (q->num_items >= q->max_items) /* queue full? */
+ {
+ int new_max_items;
+ urj_cable_queue_t *resized;
+
+ urj_log (URJ_LOG_LEVEL_DETAIL,
+ "Queue %p needs resizing; n(%d) >= max(%d); free=%d, next=%d\n",
+ q, q->num_items, q->max_items, q->next_free, q->next_item);
+
+ new_max_items = q->max_items + 128;
+ resized = realloc (q->data, new_max_items * sizeof (urj_cable_queue_t));
+ if (resized == NULL)
+ {
+ urj_error_set (URJ_ERROR_OUT_OF_MEMORY, "realloc(%s,%zd) fails",
+ "q->data",
+ new_max_items * sizeof (urj_cable_queue_t));
+ return -1; /* report failure */
+ }
+ urj_log (URJ_LOG_LEVEL_DETAIL,
+ _("(Resized JTAG activity queue to hold max %d items)\n"),
+ new_max_items);
+ q->data = resized;
+
+ /* The queue was full. Except for the special case when next_item is 0,
+ * resizing just introduced a gap between old and new max, which has to
+ * be filled; either by moving data from next_item .. max_items, or
+ * from 0 .. next_free (whatever is smaller). */
+
+#define CHOOSE_SMALLEST_AREA_TO_MOVE 1
+
+ if (q->next_item != 0)
+ {
+ int added_space = new_max_items - q->max_items;
+ int num_to_move = q->max_items - q->next_item;
+
+#ifdef CHOOSE_SMALLEST_AREA_TO_MOVE
+ if (num_to_move <= q->next_free)
+#endif /* def CHOOSE_SMALLEST_AREA_TO_MOVE */
+ {
+ /* Move queue items at end of old array
+ * towards end of new array: 345612__ -> 3456__12 */
+
+ int dest = new_max_items - num_to_move;
+ urj_log (URJ_LOG_LEVEL_DETAIL,
+ "Resize: Move %d items towards end of queue memory (%d > %d)\n",
+ num_to_move, q->next_item, dest);
+ memmove (&(q->data[dest]), &(q->data[q->next_item]),
+ num_to_move * sizeof (urj_cable_queue_t));
+
+ q->next_item = dest;
+ }
+#ifdef CHOOSE_SMALLEST_AREA_TO_MOVE
+ else
+ {
+ if (q->next_free <= added_space)
+ {
+ /* Relocate queue items at beginning of old array
+ * to end of new array: 561234__ -> __123456 */
+
+ urj_log (URJ_LOG_LEVEL_DETAIL,
+ "Resize: Move %d items from start to end\n",
+ q->next_free);
+ memcpy (&(q->data[q->max_items]), &(q->data[0]),
+ q->next_free * sizeof (urj_cable_queue_t));
+
+ }
+ else
+ {
+ /* Same as above, but for the case if new space
+ * isn't large enough to hold all relocated items */
+
+ /* Step 1: 456123__ -> __612345 */
+
+ urj_log (URJ_LOG_LEVEL_DETAIL,
+ "Resize.A: Move %d items from start to end\n",
+ added_space);
+
+ memcpy (&(q->data[q->max_items]), &(q->data[0]),
+ added_space * sizeof (urj_cable_queue_t));
+
+ /* Step 2: __612345 -> 6__12345 */
+
+ urj_log (URJ_LOG_LEVEL_DETAIL,
+ "Resize.B: Move %d items towards start (offset %d)\n",
+ (q->next_free - added_space), added_space);
+
+ memmove (&(q->data[0]), &(q->data[added_space]),
+ (q->next_free -
+ added_space) * sizeof (urj_cable_queue_t));
+ }
+ }
+#endif /* def CHOOSE_SMALLEST_AREA_TO_MOVE */
+ }
+ q->max_items = new_max_items;
+ q->next_free = q->next_item + q->num_items;
+ if (q->next_free >= new_max_items)
+ q->next_free -= new_max_items;
+
+ urj_log (URJ_LOG_LEVEL_DETAIL,
+ "Queue %p after resizing; n(%d) >= max(%d); free=%d, next=%d\n",
+ q, q->num_items, q->max_items, q->next_free, q->next_item);
+ }
+
+ i = q->next_free;
+ j = i + 1;
+ if (j >= q->max_items)
+ j = 0;
+ q->next_free = j;
+ q->num_items++;
+
+ // urj_log (URJ_LOG_LEVEL_DEBUG, "add_queue_item to %p: %d\n", q, i);
+ return i;
+}
+
+int
+urj_tap_cable_get_queue_item (urj_cable_t *cable, urj_cable_queue_info_t *q)
+{
+ if (q->num_items > 0)
+ {
+ int i = q->next_item;
+ int j = i + 1;
+ if (j >= q->max_items)
+ j = 0;
+ q->next_item = j;
+ q->num_items--;
+ // urj_log (URJ_LOG_LEVEL_DEBUG, "get_queue_item from %p: %d\n", q, i);
+ return i;
+ }
+
+ urj_error_set (URJ_ERROR_NOTFOUND, "queue is empty");
+ // urj_log (URJ_LOG_LEVEL_DEBUG, "get_queue_item from %p: %d\n", q, -1);
+ return -1;
+}
+
+void
+urj_tap_cable_purge_queue (urj_cable_queue_info_t *q, int io)
+{
+ while (q->num_items > 0)
+ {
+ int i = q->next_item;
+ if (q->data[i].action == URJ_TAP_CABLE_TRANSFER)
+ {
+ if (io == 0) /* todo queue */
+ {
+ if (q->data[i].arg.transfer.in != NULL)
+ free (q->data[i].arg.transfer.in);
+ if (q->data[i].arg.transfer.out != NULL)
+ free (q->data[i].arg.transfer.out);
+ }
+ else /* done queue */
+ {
+ if (q->data[i].arg.xferred.out != NULL)
+ free (q->data[i].arg.xferred.out);
+ }
+ }
+
+ i++;
+ if (i >= q->max_items)
+ i = 0;
+ q->num_items--;
+ }
+
+ q->num_items = 0;
+ q->next_item = 0;
+ q->next_free = 0;
+}
+
+void
+urj_tap_cable_clock (urj_cable_t *cable, int tms, int tdi, int n)
+{
+ urj_tap_cable_flush (cable, URJ_TAP_CABLE_COMPLETELY);
+ cable->driver->clock (cable, tms, tdi, n);
+}
+
+int
+urj_tap_cable_defer_clock (urj_cable_t *cable, int tms, int tdi, int n)
+{
+ int i = urj_tap_cable_add_queue_item (cable, &(cable->todo));
+ if (i < 0)
+ return URJ_STATUS_FAIL; /* report failure */
+ cable->todo.data[i].action = URJ_TAP_CABLE_CLOCK;
+ cable->todo.data[i].arg.clock.tms = tms;
+ cable->todo.data[i].arg.clock.tdi = tdi;
+ cable->todo.data[i].arg.clock.n = n;
+ urj_tap_cable_flush (cable, URJ_TAP_CABLE_OPTIONALLY);
+ return URJ_STATUS_OK; /* success */
+}
+
+int
+urj_tap_cable_get_tdo (urj_cable_t *cable)
+{
+ urj_tap_cable_flush (cable, URJ_TAP_CABLE_COMPLETELY);
+ return cable->driver->get_tdo (cable);
+}
+
+int
+urj_tap_cable_get_tdo_late (urj_cable_t *cable)
+{
+ int i;
+ urj_tap_cable_flush (cable, URJ_TAP_CABLE_TO_OUTPUT);
+ i = urj_tap_cable_get_queue_item (cable, &(cable->done));
+ if (i >= 0)
+ {
+ if (cable->done.data[i].action != URJ_TAP_CABLE_GET_TDO)
+ {
+ urj_warning (
+ _("Internal error: Got wrong type of result from queue (%d? %p.%d)\n"),
+ cable->done.data[i].action, &(cable->done), i);
+ urj_tap_cable_purge_queue (&(cable->done), 1);
+ }
+ else
+ {
+ return cable->done.data[i].arg.value.val;
+ }
+ }
+ return cable->driver->get_tdo (cable);
+}
+
+int
+urj_tap_cable_defer_get_tdo (urj_cable_t *cable)
+{
+ int i = urj_tap_cable_add_queue_item (cable, &(cable->todo));
+ if (i < 0)
+ return URJ_STATUS_FAIL; /* report failure */
+ cable->todo.data[i].action = URJ_TAP_CABLE_GET_TDO;
+ urj_tap_cable_flush (cable, URJ_TAP_CABLE_OPTIONALLY);
+ return URJ_STATUS_OK; /* success */
+}
+
+int
+urj_tap_cable_set_signal (urj_cable_t *cable, int mask, int val)
+{
+ urj_tap_cable_flush (cable, URJ_TAP_CABLE_COMPLETELY);
+ return cable->driver->set_signal (cable, mask, val);
+}
+
+int
+urj_tap_cable_defer_set_signal (urj_cable_t *cable, int mask, int val)
+{
+ int i = urj_tap_cable_add_queue_item (cable, &(cable->todo));
+ if (i < 0)
+ return URJ_STATUS_FAIL; /* report failure */
+ cable->todo.data[i].action = URJ_TAP_CABLE_SET_SIGNAL;
+ cable->todo.data[i].arg.value.mask = mask;
+ cable->todo.data[i].arg.value.val = val;
+ urj_tap_cable_flush (cable, URJ_TAP_CABLE_OPTIONALLY);
+ return URJ_STATUS_OK; /* success */
+}
+
+int
+urj_tap_cable_get_signal (urj_cable_t *cable, urj_pod_sigsel_t sig)
+{
+ urj_tap_cable_flush (cable, URJ_TAP_CABLE_COMPLETELY);
+ return cable->driver->get_signal (cable, sig);
+}
+
+int
+urj_tap_cable_get_signal_late (urj_cable_t *cable, urj_pod_sigsel_t sig)
+{
+ int i;
+ urj_tap_cable_flush (cable, URJ_TAP_CABLE_TO_OUTPUT);
+ i = urj_tap_cable_get_queue_item (cable, &(cable->done));
+ if (i >= 0)
+ {
+ if (cable->done.data[i].action != URJ_TAP_CABLE_GET_SIGNAL)
+ {
+ urj_warning (
+ _("Internal error: Got wrong type of result from queue (%d? %p.%d)\n"),
+ cable->done.data[i].action, &(cable->done), i);
+ urj_tap_cable_purge_queue (&(cable->done), 1);
+ }
+ else if (cable->done.data[i].arg.value.sig != sig)
+ {
+ urj_warning (
+ _("Internal error: Got wrong signal's value from queue (%d? %p.%d)\n"),
+ cable->done.data[i].action, &(cable->done), i);
+ urj_tap_cable_purge_queue (&(cable->done), 1);
+ }
+ else
+ {
+ return cable->done.data[i].arg.value.val;
+ }
+ }
+ return cable->driver->get_signal (cable, sig);
+}
+
+int
+urj_tap_cable_defer_get_signal (urj_cable_t *cable, urj_pod_sigsel_t sig)
+{
+ int i = urj_tap_cable_add_queue_item (cable, &(cable->todo));
+ if (i < 0)
+ return URJ_STATUS_FAIL; /* report failure */
+ cable->todo.data[i].action = URJ_TAP_CABLE_GET_SIGNAL;
+ cable->todo.data[i].arg.value.sig = sig;
+ urj_tap_cable_flush (cable, URJ_TAP_CABLE_OPTIONALLY);
+ return URJ_STATUS_OK; /* success */
+}
+
+int
+urj_tap_cable_transfer (urj_cable_t *cable, int len, char *in, char *out)
+{
+ urj_tap_cable_flush (cable, URJ_TAP_CABLE_COMPLETELY);
+ return cable->driver->transfer (cable, len, in, out);
+}
+
+int
+urj_tap_cable_transfer_late (urj_cable_t *cable, char *out)
+{
+ int i;
+ urj_tap_cable_flush (cable, URJ_TAP_CABLE_TO_OUTPUT);
+ i = urj_tap_cable_get_queue_item (cable, &(cable->done));
+
+ if (i >= 0 && cable->done.data[i].action == URJ_TAP_CABLE_TRANSFER)
+ {
+#if 0
+ urj_log (URJ_LOG_LEVEL_DEBUG, "Got queue item (%p.%d) len=%d out=%p\n",
+ &(cable->done), i,
+ cable->done.data[i].arg.xferred.len,
+ cable->done.data[i].arg.xferred.out);
+#endif
+ if (out)
+ memcpy (out,
+ cable->done.data[i].arg.xferred.out,
+ cable->done.data[i].arg.xferred.len);
+ free (cable->done.data[i].arg.xferred.out);
+ return cable->done.data[i].arg.xferred.res;
+ }
+
+ if (cable->done.data[i].action != URJ_TAP_CABLE_TRANSFER)
+ {
+ urj_warning (
+ _("Internal error: Got wrong type of result from queue (#%d %p.%d)\n"),
+ cable->done.data[i].action, &(cable->done), i);
+ urj_tap_cable_purge_queue (&(cable->done), 1);
+ }
+ else
+ {
+ urj_warning (
+ _("Internal error: Wanted transfer result but none was queued\n"));
+ }
+ return 0;
+}
+
+int
+urj_tap_cable_defer_transfer (urj_cable_t *cable, int len, char *in,
+ char *out)
+{
+ char *ibuf, *obuf = NULL;
+ int i;
+
+ ibuf = malloc (len);
+ if (ibuf == NULL)
+ {
+ urj_error_set (URJ_ERROR_OUT_OF_MEMORY, "malloc(%zd) fails",
+ (size_t) len);
+ return URJ_STATUS_FAIL;
+ }
+
+ if (out)
+ {
+ obuf = malloc (len);
+ if (obuf == NULL)
+ {
+ free (ibuf);
+ urj_error_set (URJ_ERROR_OUT_OF_MEMORY, "malloc(%zd) fails",
+ (size_t) len);
+ return URJ_STATUS_FAIL;
+ }
+ }
+
+ i = urj_tap_cable_add_queue_item (cable, &(cable->todo));
+ if (i < 0)
+ {
+ free (ibuf);
+ if (obuf)
+ free (obuf);
+ return URJ_STATUS_FAIL; /* report failure */
+ }
+
+ cable->todo.data[i].action = URJ_TAP_CABLE_TRANSFER;
+ cable->todo.data[i].arg.transfer.len = len;
+ if (in)
+ memcpy (ibuf, in, len);
+ cable->todo.data[i].arg.transfer.in = ibuf;
+ cable->todo.data[i].arg.transfer.out = obuf;
+ urj_tap_cable_flush (cable, URJ_TAP_CABLE_OPTIONALLY);
+ return URJ_STATUS_OK; /* success */
+}
+
+void
+urj_tap_cable_set_frequency (urj_cable_t *cable, uint32_t new_frequency)
+{
+ urj_tap_cable_flush (cable, URJ_TAP_CABLE_COMPLETELY);
+ cable->driver->set_frequency (cable, new_frequency);
+}
+
+uint32_t
+urj_tap_cable_get_frequency (urj_cable_t *cable)
+{
+ return cable->frequency;
+}
+
+void
+urj_tap_cable_wait (urj_cable_t *cable)
+{
+ int i;
+ volatile int j;
+ uint32_t delay = cable->delay;
+
+ if (delay == 0)
+ return;
+
+ for (i = 0; i < delay; ++i)
+ {
+ j = i;
+ }
+}
+
+static urj_cable_t *
+urj_tap_cable_create (urj_chain_t *chain, urj_cable_driver_t *driver)
+{
+ urj_cable_t *cable;
+
+ if (urj_bus)
+ {
+ URJ_BUS_FREE (urj_bus);
+ urj_bus = NULL;
+ }
+
+ urj_tap_chain_disconnect (chain);
+
+ cable = calloc (1, sizeof (urj_cable_t));
+ if (!cable)
+ {
+ urj_error_set (URJ_ERROR_OUT_OF_MEMORY, "calloc(%zd,%zd) fails",
+ (size_t) 1, sizeof (urj_cable_t));
+ return NULL;
+ }
+
+ cable->driver = driver;
+
+ return cable;
+}
+
+static int
+urj_tap_cable_start (urj_chain_t *chain, urj_cable_t *cable)
+{
+ chain->cable = cable;
+
+ if (urj_tap_cable_init (chain->cable) != URJ_STATUS_OK)
+ {
+ urj_tap_chain_disconnect (chain);
+ return URJ_STATUS_FAIL;
+ }
+
+ urj_tap_chain_set_trst (chain, 0);
+ urj_tap_chain_set_trst (chain, 1);
+ urj_tap_reset (chain);
+
+ return URJ_STATUS_OK;
+}
+
+urj_cable_t *
+urj_tap_cable_parport_connect (urj_chain_t *chain, urj_cable_driver_t *driver,
+ urj_cable_parport_devtype_t devtype,
+ const char *devname, const urj_param_t *params[])
+{
+ urj_cable_t *cable;
+
+ if (driver->device_type != URJ_CABLE_DEVICE_PARPORT)
+ {
+ urj_error_set (URJ_ERROR_INVALID,
+ "parport cable needs parport_connect");
+ return NULL;
+ }
+
+ cable = urj_tap_cable_create (chain, driver);
+ if (cable == NULL)
+ return NULL;
+
+ if (cable->driver->connect.parport (cable, devtype, devname,
+ params) != URJ_STATUS_OK)
+ {
+ free (cable);
+ return NULL;
+ }
+
+ if (urj_tap_cable_start (chain, cable) != URJ_STATUS_OK)
+ return NULL;
+
+ return cable;
+}
+
+urj_cable_t *
+urj_tap_cable_usb_connect (urj_chain_t *chain, urj_cable_driver_t *driver,
+ const urj_param_t *params[])
+{
+ urj_cable_t *cable;
+
+ if (driver->device_type != URJ_CABLE_DEVICE_USB)
+ {
+ urj_error_set (URJ_ERROR_INVALID, "USB cable needs usb_connect");
+ return NULL;
+ }
+
+ cable = urj_tap_cable_create (chain, driver);
+ if (cable == NULL)
+ return NULL;
+
+ if (cable->driver->connect.usb (cable, params) != URJ_STATUS_OK)
+ {
+ free (cable);
+ return NULL;
+ }
+
+ if (urj_tap_cable_start (chain, cable) != URJ_STATUS_OK)
+ return NULL;
+
+ return cable;
+}
+
+urj_cable_t *
+urj_tap_cable_other_connect (urj_chain_t *chain, urj_cable_driver_t *driver,
+ const urj_param_t *params[])
+{
+ urj_cable_t *cable;
+
+ if (driver->device_type != URJ_CABLE_DEVICE_OTHER)
+ {
+ urj_error_set (URJ_ERROR_INVALID, "'other' cable needs other_connect");
+ return NULL;
+ }
+
+ cable = urj_tap_cable_create (chain, driver);
+ if (cable == NULL)
+ return NULL;
+
+ if (cable->driver->connect.other (cable, params) != URJ_STATUS_OK)
+ {
+ free (cable);
+ return NULL;
+ }
+
+ if (urj_tap_cable_start (chain, cable) != URJ_STATUS_OK)
+ return NULL;
+
+ return cable;
+}
+
+static urj_param_descr_t cable_param[] =
+{
+ { URJ_CABLE_PARAM_KEY_PID, URJ_PARAM_TYPE_LU, "pid", },
+ { URJ_CABLE_PARAM_KEY_VID, URJ_PARAM_TYPE_LU, "vid", },
+ { URJ_CABLE_PARAM_KEY_DESC, URJ_PARAM_TYPE_STRING, "desc", },
+ { URJ_CABLE_PARAM_KEY_DRIVER, URJ_PARAM_TYPE_STRING, "driver", },
+ { URJ_CABLE_PARAM_KEY_BITMAP, URJ_PARAM_TYPE_STRING, "bitmap", },
+};
+
+const urj_param_list_t urj_cable_param_list =
+{
+ .list = cable_param,
+ .n = sizeof cable_param / sizeof cable_param[0],
+};
--- /dev/null
+/*
+ * $Id$
+ *
+ * Arcom JTAG Cable Driver
+ * Copyright (C) 2002, 2003 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2002, 2003.
+ *
+ */
+
+#include <sysdep.h>
+
+#include <urjtag/cable.h>
+#include <urjtag/parport.h>
+#include <urjtag/chain.h>
+
+#include "generic.h"
+#include "generic_parport.h"
+
+/*
+ * data D[7:0] (pins 9:2)
+ */
+#define TDI 1
+#define TCK 0
+#define TMS 2
+#define TRST 3
+
+/*
+ * 7 - BUSY (pin 11)
+ * 6 - ACK (pin 10)
+ * 5 - PE (pin 12)
+ * 4 - SEL (pin 13)
+ * 3 - ERROR (pin 15)
+ */
+#define TDO 7
+
+static int
+arcom_init (urj_cable_t *cable)
+{
+ int data;
+
+ if (urj_tap_parport_open (cable->link.port) != URJ_STATUS_OK)
+ return URJ_STATUS_FAIL;
+
+ if ((data = urj_tap_parport_get_data (cable->link.port)) < 0)
+ {
+ if (urj_tap_parport_set_data (cable->link.port,
+ 1 << TRST) != URJ_STATUS_OK)
+ return URJ_STATUS_FAIL;
+ PARAM_SIGNALS (cable) = URJ_POD_CS_TRST;
+ }
+ else
+ PARAM_SIGNALS (cable) = ((data >> TRST) && 1) ? URJ_POD_CS_TRST : 0;
+
+ return URJ_STATUS_OK;
+}
+
+static void
+arcom_clock (urj_cable_t *cable, int tms, int tdi, int n)
+{
+ int i;
+ int trst = (PARAM_SIGNALS (cable) & URJ_POD_CS_TRST) ? 1 : 0;
+
+ tms = tms ? 1 : 0;
+ tdi = tdi ? 1 : 0;
+
+ for (i = 0; i < n; i++)
+ {
+ urj_tap_parport_set_data (cable->link.port,
+ (trst << TRST) | (0 << TCK) | (tms << TMS) |
+ (tdi << TDI));
+ urj_tap_cable_wait (cable);
+ urj_tap_parport_set_data (cable->link.port,
+ (trst << TRST) | (1 << TCK) | (tms << TMS) |
+ (tdi << TDI));
+ urj_tap_cable_wait (cable);
+ }
+
+ PARAM_SIGNALS (cable) &= URJ_POD_CS_TRST;
+ PARAM_SIGNALS (cable) |= URJ_POD_CS_TCK;
+ PARAM_SIGNALS (cable) |= tms ? URJ_POD_CS_TMS : 0;
+ PARAM_SIGNALS (cable) |= tdi ? URJ_POD_CS_TDI : 0;
+}
+
+static int
+arcom_get_tdo (urj_cable_t *cable)
+{
+ int trst = (PARAM_SIGNALS (cable) & URJ_POD_CS_TRST) ? 1 : 0;
+ int status;
+
+ urj_tap_parport_set_data (cable->link.port, (trst << TRST) | (0 << TCK));
+ PARAM_SIGNALS (cable) &=
+ ~(URJ_POD_CS_TDI | URJ_POD_CS_TCK | URJ_POD_CS_TMS);
+
+ urj_tap_cable_wait (cable);
+
+ status = urj_tap_parport_get_status (cable->link.port);
+ if (status == -1)
+ return status;
+
+ return (status >> TDO) & 1;
+}
+
+static int
+arcom_set_signal (urj_cable_t *cable, int mask, int val)
+{
+ int prev_sigs = PARAM_SIGNALS (cable);
+
+ mask &= (URJ_POD_CS_TDI | URJ_POD_CS_TCK | URJ_POD_CS_TMS | URJ_POD_CS_TRST); // only these can be modified
+
+ if (mask != 0)
+ {
+ int data = 0;
+ int sigs = (prev_sigs & ~mask) | (val & mask);
+ data |= (sigs & URJ_POD_CS_TDI) ? (1 << TDI) : 0;
+ data |= (sigs & URJ_POD_CS_TCK) ? (1 << TCK) : 0;
+ data |= (sigs & URJ_POD_CS_TMS) ? (1 << TMS) : 0;
+ data |= (sigs & URJ_POD_CS_TRST) ? (1 << TRST) : 0;
+ urj_tap_parport_set_data (cable->link.port, data);
+ PARAM_SIGNALS (cable) = sigs;
+ }
+
+ return prev_sigs;
+}
+
+urj_cable_driver_t urj_tap_cable_arcom_driver = {
+ "ARCOM",
+ N_("Arcom JTAG Cable"),
+ URJ_CABLE_DEVICE_PARPORT,
+ { .parport = urj_tap_cable_generic_parport_connect, },
+ urj_tap_cable_generic_disconnect,
+ urj_tap_cable_generic_parport_free,
+ arcom_init,
+ urj_tap_cable_generic_parport_done,
+ urj_tap_cable_generic_set_frequency,
+ arcom_clock,
+ arcom_get_tdo,
+ urj_tap_cable_generic_transfer,
+ arcom_set_signal,
+ urj_tap_cable_generic_get_signal,
+ urj_tap_cable_generic_flush_one_by_one,
+ urj_tap_cable_generic_parport_help
+};
--- /dev/null
+/*
+ * $Id$
+ *
+ * Altera ByteBlaster/ByteBlaster II/ByteBlasterMV Parallel Port Download Cable Driver
+ * Copyright (C) 2002, 2003 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2002, 2003.
+ *
+ * Documentation:
+ * [1] Altera Corporation, "ByteBlaster Parallel Port Download Cable Data Sheet",
+ * February 1998, ver. 2.01, Order Number: A-DS-BYTE-02.01
+ * [2] Altera Corporation, "ByteBlasterMV Parallel Port Download Cable Data Sheet",
+ * July 2002, Version 3.3, Order Number: DS-BYTBLMV-3.3
+ * [3] Altera Corporation, "ByteBlaster II Parallel Port Download Cable Data Sheet",
+ * December 2002, Version 1.0, Order Number: DS-BYTEBLSTRII-1.0 L01-08739-00
+ *
+ */
+
+#include <sysdep.h>
+
+#include <urjtag/cable.h>
+#include <urjtag/parport.h>
+#include <urjtag/chain.h>
+
+#include "generic.h"
+#include "generic_parport.h"
+
+/*
+ * data D[7:0] (pins 9:2)
+ */
+#define TDI 6
+#define TCK 0
+#define TMS 1
+#define BB_CHECK 5
+
+/*
+ * 7 - BUSY (pin 11)
+ * 6 - ACK (pin 10)
+ * 5 - PE (pin 12)
+ * 4 - SEL (pin 13)
+ * 3 - ERROR (pin 15)
+ */
+#define TDO 7
+#define BB_PRESENT 6
+#define VCC_OK_N 3
+
+/*
+ * 0 - STROBE (pin 1)
+ * 1 - AUTOFD (pin 14)
+ * 2 - INIT (pin 16)
+ * 3 - SELECT (pin 17)
+*/
+#define BB_ENABLE 0xC
+
+static int
+byteblaster_init (urj_cable_t *cable)
+{
+ int BB_II = 0;
+ int status;
+
+ if (urj_tap_parport_open (cable->link.port) != URJ_STATUS_OK)
+ return URJ_STATUS_FAIL;
+
+ PARAM_SIGNALS (cable) = URJ_POD_CS_TRST;
+
+ /* check if a ByteBlaster or ByteBlasterMV is connected */
+ urj_tap_parport_set_data (cable->link.port, 1 << BB_CHECK);
+ status = urj_tap_parport_get_status (cable->link.port);
+ if (status == -1)
+ return URJ_STATUS_FAIL;
+ if (!((status >> BB_PRESENT) & 1))
+ BB_II = 1;
+ urj_tap_parport_set_data (cable->link.port, 0);
+ status = urj_tap_parport_get_status (cable->link.port);
+ if (status == -1)
+ return URJ_STATUS_FAIL;
+ if ((status >> BB_PRESENT) & 1)
+ BB_II = 1;
+
+ /* check if the power supply is ok (only for ByteBlaster II) */
+ /* if no ByteBlaster at all is connected this check will fail, too */
+ if (BB_II)
+ {
+ status = urj_tap_parport_get_status (cable->link.port);
+ if (status == -1)
+ return URJ_STATUS_FAIL;
+ if ((status >> VCC_OK_N) & 1)
+ {
+ urj_error_set (URJ_ERROR_ILLEGAL_STATE, "Power supply not OK");
+ return URJ_STATUS_FAIL;
+ }
+ }
+
+ /* Enable ByteBlaster */
+ if (urj_tap_parport_set_control (cable->link.port,
+ BB_ENABLE) != URJ_STATUS_OK)
+ return URJ_STATUS_FAIL;
+
+ return URJ_STATUS_OK;
+}
+
+static void
+byteblaster_clock (urj_cable_t *cable, int tms, int tdi, int n)
+{
+ int i;
+
+ tms = tms ? 1 : 0;
+ tdi = tdi ? 1 : 0;
+
+ for (i = 0; i < n; i++)
+ {
+ urj_tap_parport_set_data (cable->link.port,
+ (0 << TCK) | (tms << TMS) | (tdi << TDI));
+ urj_tap_cable_wait (cable);
+ urj_tap_parport_set_data (cable->link.port,
+ (1 << TCK) | (tms << TMS) | (tdi << TDI));
+ urj_tap_cable_wait (cable);
+ }
+
+ PARAM_SIGNALS (cable) &= URJ_POD_CS_TRST;
+ PARAM_SIGNALS (cable) |= URJ_POD_CS_TCK;
+ PARAM_SIGNALS (cable) |= tms ? URJ_POD_CS_TMS : 0;
+ PARAM_SIGNALS (cable) |= tdi ? URJ_POD_CS_TDI : 0;
+}
+
+static int
+byteblaster_get_tdo (urj_cable_t *cable)
+{
+ urj_tap_parport_set_data (cable->link.port, 0 << TCK);
+ int status;
+
+ PARAM_SIGNALS (cable) &=
+ ~(URJ_POD_CS_TDI | URJ_POD_CS_TCK | URJ_POD_CS_TMS);
+
+ urj_tap_cable_wait (cable);
+
+ status = urj_tap_parport_get_status (cable->link.port);
+ if (status == -1)
+ return status;
+
+ return (status >> TDO) & 1;
+}
+
+static int
+byteblaster_set_signal (urj_cable_t *cable, int mask, int val)
+{
+ int prev_sigs = PARAM_SIGNALS (cable);
+
+ mask &= (URJ_POD_CS_TDI | URJ_POD_CS_TCK | URJ_POD_CS_TMS); // only these can be modified
+
+ if (mask != 0)
+ {
+ int data = 0;
+ int sigs = (prev_sigs & ~mask) | (val & mask);
+ data |= (sigs & URJ_POD_CS_TDI) ? (1 << TDI) : 0;
+ data |= (sigs & URJ_POD_CS_TCK) ? (1 << TCK) : 0;
+ data |= (sigs & URJ_POD_CS_TMS) ? (1 << TMS) : 0;
+ urj_tap_parport_set_data (cable->link.port, data);
+ PARAM_SIGNALS (cable) = sigs;
+ }
+
+ return prev_sigs;
+}
+
+urj_cable_driver_t urj_tap_cable_byteblaster_driver = {
+ "ByteBlaster",
+ N_("Altera ByteBlaster/ByteBlaster II/ByteBlasterMV Parallel Port Download Cable"),
+ URJ_CABLE_DEVICE_PARPORT,
+ { .parport = urj_tap_cable_generic_parport_connect, },
+ urj_tap_cable_generic_disconnect,
+ urj_tap_cable_generic_parport_free,
+ byteblaster_init,
+ urj_tap_cable_generic_parport_done,
+ urj_tap_cable_generic_set_frequency,
+ byteblaster_clock,
+ byteblaster_get_tdo,
+ urj_tap_cable_generic_transfer,
+ byteblaster_set_signal,
+ urj_tap_cable_generic_get_signal,
+ urj_tap_cable_generic_flush_one_by_one,
+ urj_tap_cable_generic_parport_help
+};
--- /dev/null
+/*
+ * $Id$
+ *
+ * Generic command buffer handler.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Arnim Laeuger, 2008.
+ *
+ */
+
+#include <sysdep.h>
+
+#include <stdlib.h>
+#include <string.h>
+
+#include <urjtag/error.h>
+
+#include "generic.h"
+#include "generic_usbconn.h"
+
+#include "cmd_xfer.h"
+
+
+/*****************************************************************************
+ * extend_cmd_buffer( cmd )
+ *
+ * Extends the buffer of the given command if a new byte wouldn't fit into
+ * the current buffer size.
+ *
+ * cmd : pointer to urj_tap_cable_cx_cmd_t
+ *
+ * Return value:
+ * 0 : Error occured, not enough memory
+ * 1 : All ok
+ *
+ ****************************************************************************/
+static int
+extend_cmd_buffer (urj_tap_cable_cx_cmd_t *cmd)
+{
+ /* check size of cmd buffer and increase it if not sufficient */
+ if (cmd->buf_pos >= cmd->buf_len)
+ {
+ cmd->buf_len *= 2;
+ if (cmd->buf)
+ cmd->buf = realloc (cmd->buf, cmd->buf_len);
+ }
+
+ if (cmd->buf == NULL)
+ {
+ urj_error_set (URJ_ERROR_OUT_OF_MEMORY, "realloc(%s,%zd) fails",
+ "cmd->buf", (size_t) cmd->buf_len);
+ }
+
+ return cmd->buf ? 1 : 0;
+}
+
+
+/*****************************************************************************
+ * urj_tap_cable_cx_cmd_space( cmd, max_len )
+ *
+ * Return the difference between actually allocated bytes in the buffer of
+ * the current last command and max_len. If there are already more bytes
+ * allocated than max_len, this function will return zero.
+ *
+ * cmd : pointer to urj_tap_cable_cx_cmd_t struct
+ * max_len : upper limit for the space to allocate
+ *
+ * Return value:
+ * 0 : No space left
+ * >0: Number of bytes left
+ *
+ ****************************************************************************/
+int
+urj_tap_cable_cx_cmd_space (urj_tap_cable_cx_cmd_root_t *cmd_root,
+ int max_len)
+{
+ int n;
+ urj_tap_cable_cx_cmd_t *cmd = cmd_root->last;
+
+ if (!cmd)
+ return max_len;
+
+ n = max_len - cmd->buf_pos;
+ if (n < 0)
+ return 0;
+
+ return n;
+}
+
+
+/*****************************************************************************
+ * urj_tap_cable_cx_cmd_push( cmd, d )
+ *
+ * Pushes the byte value d to the buffer of the current last command.
+ *
+ * cmd_root : pointer to urj_tap_cable_cx_cmd_root_t struct
+ * d : new value to be pushed
+ *
+ * Return value:
+ * 0 : Error occured
+ * 1 : All ok
+ *
+ ****************************************************************************/
+int
+urj_tap_cable_cx_cmd_push (urj_tap_cable_cx_cmd_root_t *cmd_root, uint8_t d)
+{
+ urj_tap_cable_cx_cmd_t *cmd = cmd_root->last;
+
+ if (!cmd)
+ return 0;
+
+ if (!extend_cmd_buffer (cmd))
+ return 0;
+
+ cmd->buf[cmd->buf_pos++] = d;
+
+ return 1;
+}
+
+
+/*****************************************************************************
+ * urj_tap_cable_cx_cmd_dequeue( cmd_root )
+ *
+ * Dequeues the first command.
+ *
+ * cmd_root : pointer to urj_tap_cable_cx_cmd_root_t parameter struct
+ *
+ * Return value:
+ * NULL : Error occured
+ * <>NULL : All ok, pointer to dequeued urj_tap_cable_cx_cmd_t
+ *
+ ****************************************************************************/
+urj_tap_cable_cx_cmd_t *
+urj_tap_cable_cx_cmd_dequeue (urj_tap_cable_cx_cmd_root_t *cmd_root)
+{
+ urj_tap_cable_cx_cmd_t *cmd = cmd_root->first;
+
+ if (cmd)
+ {
+ if ((cmd_root->first = cmd->next) == NULL)
+ cmd_root->last = NULL;
+ cmd->next = NULL;
+ }
+
+ return cmd;
+}
+
+
+/*****************************************************************************
+ * urj_tap_cable_cx_cmd_free( cmd )
+ *
+ * Frees allocated memory of specified cmd structure.
+ *
+ * cmd : pointer to urj_tap_cable_cx_cmd_t
+ *
+ * Return value:
+ * none
+ *
+ ****************************************************************************/
+void
+urj_tap_cable_cx_cmd_free (urj_tap_cable_cx_cmd_t *cmd)
+{
+ if (cmd)
+ {
+ if (cmd->buf)
+ free (cmd->buf);
+ free (cmd);
+ }
+}
+
+
+/*****************************************************************************
+ * urj_tap_cable_cx_cmd_queue( cmd_root, to_recv )
+ *
+ * Allocates a new urj_tap_cable_cx_cmd_t and queues it at the end of the command
+ * queue. The value of to_recv will be stored in the new cmd element,
+ * set to 0 if this command will not generate receive bytes.
+ *
+ * cmd_root : pointer to urj_tap_cable_cx_cmd_root_t parameter struct
+ * to_recv : number of receive bytes that this command will generate
+ *
+ * Return value:
+ * NULL : Error occured
+ * <>NULL : All ok, pointer to allocated urj_tap_cable_cx_cmd_t
+ *
+ ****************************************************************************/
+urj_tap_cable_cx_cmd_t *
+urj_tap_cable_cx_cmd_queue (urj_tap_cable_cx_cmd_root_t *cmd_root,
+ uint32_t to_recv)
+{
+ urj_tap_cable_cx_cmd_t *cmd = malloc (sizeof (urj_tap_cable_cx_cmd_t));
+
+ if (cmd)
+ {
+ cmd->buf_len = 64;
+ if ((cmd->buf = malloc (cmd->buf_len)) == NULL)
+ {
+ free (cmd);
+ cmd = NULL;
+ }
+ else
+ {
+ cmd->buf_pos = 0;
+ cmd->to_recv = to_recv;
+ cmd->next = NULL;
+ if (!cmd_root->first)
+ cmd_root->first = cmd;
+ if (cmd_root->last)
+ cmd_root->last->next = cmd;
+ cmd_root->last = cmd;
+ }
+ }
+
+ if (cmd == NULL)
+ {
+ urj_error_set (URJ_ERROR_OUT_OF_MEMORY, "malloc(%zd)/malloc(%zd) fails",
+ sizeof (urj_tap_cable_cx_cmd_t), (size_t) 64);
+ }
+
+ return cmd;
+}
+
+
+/*****************************************************************************
+ * urj_tap_cable_cx_cmd_init( cmd_root )
+ *
+ * Initializes the command root structure.
+ *
+ * cmd_root : pointer to urj_tap_cable_cx_cmd_root_t
+ *
+ * Return value:
+ * none
+ *
+ ****************************************************************************/
+void
+urj_tap_cable_cx_cmd_init (urj_tap_cable_cx_cmd_root_t *cmd_root)
+{
+ cmd_root->first = NULL;
+ cmd_root->last = NULL;
+}
+
+
+/*****************************************************************************
+ * urj_tap_cable_cx_cmd_deinit( cmd_root )
+ *
+ * Deinitialzes and frees all elements from the command root structure.
+ *
+ * cmd_root : pointer to urj_tap_cable_cx_cmd_root_t
+ *
+ * Return value:
+ * none
+ *
+ ****************************************************************************/
+void
+urj_tap_cable_cx_cmd_deinit (urj_tap_cable_cx_cmd_root_t *cmd_root)
+{
+ urj_tap_cable_cx_cmd_t *cmd;
+ while (cmd_root->first)
+ {
+ cmd = urj_tap_cable_cx_cmd_dequeue (cmd_root);
+ urj_tap_cable_cx_cmd_free (cmd);
+ }
+}
+
+
+/*****************************************************************************
+ * urj_tap_cable_cx_xfer( cmd_root, out_cmd, cable, how_much )
+ *
+ * Unrolls the queued commands and posts their payload to the usbconn driver.
+ * NB: urj_tap_usbconn_write will buffer the accumulated payload until urj_tap_usbconn_read
+ * is called.
+ *
+ * Flushing of the posted payload bytes is triggered when how_much
+ * requests to do so or if receive bytes are expected.
+ *
+ * cmd_root : pointer to urj_tap_cable_cx_cmd_root_t struct
+ * out_cmd : pointer to urj_tap_cable_cx_cmd_t for an optional command that is appended
+ * to send buffer in case commands have been scheduled that
+ * yield return/receive data from the device
+ * cable : current urj_cable_t
+ * how_much : urj_cable_flush_amount_t value specifying the flush strategy
+ *
+ * Return value:
+ * none
+ *
+ ****************************************************************************/
+void
+urj_tap_cable_cx_xfer (urj_tap_cable_cx_cmd_root_t *cmd_root,
+ const urj_tap_cable_cx_cmd_t *out_cmd,
+ urj_cable_t *cable, urj_cable_flush_amount_t how_much)
+{
+ urj_tap_cable_cx_cmd_t *cmd = urj_tap_cable_cx_cmd_dequeue (cmd_root);
+ uint32_t bytes_to_recv;
+
+ bytes_to_recv = 0;
+
+ while (cmd)
+ {
+ /* Step 1: copy command bytes buffered for sending them later
+ through the usbconn driver */
+ bytes_to_recv += cmd->to_recv;
+ /* write command data (buffered) */
+ urj_tap_usbconn_write (cable->link.usb, cmd->buf, cmd->buf_pos,
+ cmd->to_recv);
+ urj_tap_cable_cx_cmd_free (cmd);
+ cmd = urj_tap_cable_cx_cmd_dequeue (cmd_root);
+ }
+
+ /* it's possible for the caller to define an extra command that is
+ appended right before sending commands to the device in case output
+ data is expected */
+ if (bytes_to_recv && out_cmd)
+ {
+ urj_tap_usbconn_write (cable->link.usb, out_cmd->buf,
+ out_cmd->buf_pos, out_cmd->to_recv);
+ bytes_to_recv += out_cmd->to_recv;
+ }
+
+ if (bytes_to_recv || (how_much != URJ_TAP_CABLE_TO_OUTPUT))
+ {
+ /* Step 2: flush scheduled bytes */
+ urj_tap_usbconn_read (cable->link.usb, NULL, 0);
+
+ bytes_to_recv = 0;
+ }
+}
+
+
+/*****************************************************************************
+ * urj_tap_cable_cx_xfer_recv( cable )
+ *
+ * Extracts the byte at the current position from the receive buffer.
+ *
+ * cable : pointer to the current cable struct
+ *
+ * Return value:
+ * Byte value from receive buffer
+ *
+ ****************************************************************************/
+uint8_t
+urj_tap_cable_cx_xfer_recv (urj_cable_t *cable)
+{
+ uint8_t buf;
+
+ if (urj_tap_usbconn_read (cable->link.usb, &buf, 1) == 1)
+ {
+ return buf;
+ }
+ else
+ return 0;
+}
+
+
+/*
+ Local Variables:
+ mode:C
+ c-default-style:gnu
+ indent-tabs-mode:nil
+ End:
+*/
--- /dev/null
+/*
+ * $Id$
+ *
+ * Generic command buffer handler.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Arnim Laeuger, 2008.
+ *
+ */
+
+#ifndef URJ_TAP_CABLE_CMD_XFER_H
+#define URJ_TAP_CABLE_CMD_XFER_H
+
+#include <sysdep.h>
+
+#include <urjtag/cable.h>
+
+/* description of a command
+ the buffer can contain one or more commands if receive count
+ is zero for all of them */
+typedef struct URJ_TAP_CABLE_CX_CMD urj_tap_cable_cx_cmd_t;
+struct URJ_TAP_CABLE_CX_CMD
+{
+ urj_tap_cable_cx_cmd_t *next;
+ uint32_t buf_len;
+ uint32_t buf_pos;
+ uint8_t *buf;
+ uint32_t to_recv;
+};
+
+struct URJ_TAP_CABLE_CX_CMD_ROOT
+{
+ urj_tap_cable_cx_cmd_t *first;
+ urj_tap_cable_cx_cmd_t *last;
+};
+typedef struct URJ_TAP_CABLE_CX_CMD_ROOT urj_tap_cable_cx_cmd_root_t;
+
+int urj_tap_cable_cx_cmd_space (urj_tap_cable_cx_cmd_root_t *cmd_root,
+ int max_len);
+int urj_tap_cable_cx_cmd_push (urj_tap_cable_cx_cmd_root_t *cmd_root,
+ uint8_t d);
+urj_tap_cable_cx_cmd_t
+ *urj_tap_cable_cx_cmd_dequeue (urj_tap_cable_cx_cmd_root_t *cmd_root);
+void urj_tap_cable_cx_cmd_free (urj_tap_cable_cx_cmd_t *cmd);
+urj_tap_cable_cx_cmd_t
+ *urj_tap_cable_cx_cmd_queue (urj_tap_cable_cx_cmd_root_t *cmd_root,
+ uint32_t to_recv);
+void urj_tap_cable_cx_cmd_init (urj_tap_cable_cx_cmd_root_t *cmd_root);
+void urj_tap_cable_cx_cmd_deinit (urj_tap_cable_cx_cmd_root_t *cmd_root);
+
+void urj_tap_cable_cx_xfer (urj_tap_cable_cx_cmd_root_t *cmd_root,
+ const urj_tap_cable_cx_cmd_t *out_cmd,
+ urj_cable_t *cable,
+ urj_cable_flush_amount_t how_much);
+uint8_t urj_tap_cable_cx_xfer_recv (urj_cable_t *cable);
+
+#endif /* URJ_TAP_CABLE_CMD_XFER_H */
--- /dev/null
+/*
+ * $Id$
+ *
+ * Xilinx DLC5 JTAG Parallel Cable III Driver
+ * Copyright (C) 2002, 2003 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2002, 2003.
+ *
+ * Documentation:
+ * [1] Xilinx, Inc., "JTAG Programmer Guide",
+ * http://toolbox.xilinx.com/docsan/3_1i/pdf/docs/jtg/jtg.pdf
+ *
+ */
+
+#include <sysdep.h>
+
+#include <urjtag/cable.h>
+#include <urjtag/parport.h>
+#include <urjtag/chain.h>
+
+#include "generic.h"
+#include "generic_parport.h"
+
+/* see Figure B-1 in [1] */
+
+/*
+ * data D[7:0] (pins 9:2)
+ */
+#define TDI 0
+#define TCK 1
+#define TMS 2
+#define CTRL 3
+#define PROG 4
+
+/*
+ * 7 - BUSY (pin 11)
+ * 6 - ACK (pin 10)
+ * 5 - PE (pin 12)
+ * 4 - SEL (pin 13)
+ * 3 - ERROR (pin 15)
+ */
+#define TDO 4
+
+static int
+dlc5_init (urj_cable_t *cable)
+{
+ if (urj_tap_parport_open (cable->link.port) != URJ_STATUS_OK)
+ return URJ_STATUS_FAIL;
+
+ PARAM_SIGNALS (cable) = URJ_POD_CS_TRST;
+
+ return URJ_STATUS_OK;
+}
+
+static void
+dlc5_clock (urj_cable_t *cable, int tms, int tdi, int n)
+{
+ int i;
+
+ tms = tms ? 1 : 0;
+ tdi = tdi ? 1 : 0;
+
+ for (i = 0; i < n; i++)
+ {
+ urj_tap_parport_set_data (cable->link.port,
+ (1 << PROG) | (0 << TCK) | (tms << TMS)
+ | (tdi << TDI));
+ urj_tap_cable_wait (cable);
+ urj_tap_parport_set_data (cable->link.port,
+ (1 << PROG) | (1 << TCK) | (tms << TMS)
+ | (tdi << TDI));
+ urj_tap_cable_wait (cable);
+ }
+
+ PARAM_SIGNALS (cable) &= URJ_POD_CS_TRST;
+ PARAM_SIGNALS (cable) |= URJ_POD_CS_TCK;
+ PARAM_SIGNALS (cable) |= tms ? URJ_POD_CS_TMS : 0;
+ PARAM_SIGNALS (cable) |= tdi ? URJ_POD_CS_TDI : 0;
+}
+
+static int
+dlc5_get_tdo (urj_cable_t *cable)
+{
+ int status;
+
+ urj_tap_parport_set_data (cable->link.port, (1 << PROG) | (0 << TCK));
+ PARAM_SIGNALS (cable) &=
+ ~(URJ_POD_CS_TDI | URJ_POD_CS_TCK | URJ_POD_CS_TMS);
+
+ urj_tap_cable_wait (cable);
+
+ status = urj_tap_parport_get_status (cable->link.port);
+ if (status == -1)
+ return status;
+
+ return (status >> TDO) & 1;
+}
+
+static int
+dlc5_set_signal (urj_cable_t *cable, int mask, int val)
+{
+ int prev_sigs = PARAM_SIGNALS (cable);
+
+ mask &= (URJ_POD_CS_TDI | URJ_POD_CS_TCK | URJ_POD_CS_TMS); // only these can be modified
+
+ if (mask != 0)
+ {
+ int data = 0;
+ int sigs = (prev_sigs & ~mask) | (val & mask);
+ data |= (sigs & URJ_POD_CS_TDI) ? (1 << TDI) : 0;
+ data |= (sigs & URJ_POD_CS_TCK) ? (1 << TCK) : 0;
+ data |= (sigs & URJ_POD_CS_TMS) ? (1 << TMS) : 0;
+ urj_tap_parport_set_data (cable->link.port, (1 << PROG) | data);
+ PARAM_SIGNALS (cable) = sigs;
+ }
+
+ return prev_sigs;
+}
+
+urj_cable_driver_t urj_tap_cable_dlc5_driver = {
+ "DLC5",
+ N_("Xilinx DLC5 JTAG Parallel Cable III"),
+ URJ_CABLE_DEVICE_PARPORT,
+ { .parport = urj_tap_cable_generic_parport_connect, },
+ urj_tap_cable_generic_disconnect,
+ urj_tap_cable_generic_parport_free,
+ dlc5_init,
+ urj_tap_cable_generic_parport_done,
+ urj_tap_cable_generic_set_frequency,
+ dlc5_clock,
+ dlc5_get_tdo,
+ urj_tap_cable_generic_transfer,
+ dlc5_set_signal,
+ urj_tap_cable_generic_get_signal,
+ urj_tap_cable_generic_flush_one_by_one,
+ urj_tap_cable_generic_parport_help
+};
--- /dev/null
+/*
+ * $Id$
+ *
+ * ETC EA253 JTAG Cable Driver
+ * Copyright (C) 2002, 2003 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2002, 2003.
+ *
+ */
+
+#include <sysdep.h>
+
+#include <urjtag/cable.h>
+#include <urjtag/parport.h>
+#include <urjtag/chain.h>
+
+#include "generic.h"
+#include "generic_parport.h"
+
+/*
+ * data D[7:0] (pins 9:2)
+ */
+#define TDI 0
+#define TCK 1
+#define TMS 2
+#define TRST 4
+
+/*
+ * 7 - BUSY (pin 11)
+ * 6 - ACK (pin 10)
+ * 5 - PE (pin 12)
+ * 4 - SEL (pin 13)
+ * 3 - ERROR (pin 15)
+ */
+#define TDO 4
+
+static int
+ea253_init (urj_cable_t *cable)
+{
+ int data;
+
+ if (urj_tap_parport_open (cable->link.port) != URJ_STATUS_OK)
+ return URJ_STATUS_FAIL;
+
+ if ((data = urj_tap_parport_get_data (cable->link.port)) < 0)
+ {
+ if (urj_tap_parport_set_data (cable->link.port,
+ 1 << TRST) != URJ_STATUS_OK)
+ return URJ_STATUS_FAIL;
+ PARAM_SIGNALS (cable) = URJ_POD_CS_TRST;
+ }
+ else
+ PARAM_SIGNALS (cable) = ((data >> TRST) && 1) ? URJ_POD_CS_TRST : 0;
+
+ return URJ_STATUS_OK;
+}
+
+static void
+ea253_clock (urj_cable_t *cable, int tms, int tdi, int n)
+{
+ int i;
+ int trst = (PARAM_SIGNALS (cable) & URJ_POD_CS_TRST) ? 1 : 0;
+
+ tms = tms ? 1 : 0;
+ tdi = tdi ? 1 : 0;
+
+ for (i = 0; i < n; i++)
+ {
+ urj_tap_parport_set_data (cable->link.port,
+ (trst << TRST) | (0 << TCK) | (tms << TMS) |
+ (tdi << TDI));
+ urj_tap_cable_wait (cable);
+ urj_tap_parport_set_data (cable->link.port,
+ (trst << TRST) | (1 << TCK) | (tms << TMS) |
+ (tdi << TDI));
+ urj_tap_cable_wait (cable);
+ }
+
+ PARAM_SIGNALS (cable) &= URJ_POD_CS_TRST;
+ PARAM_SIGNALS (cable) |= URJ_POD_CS_TCK;
+ PARAM_SIGNALS (cable) |= tms ? URJ_POD_CS_TMS : 0;
+ PARAM_SIGNALS (cable) |= tdi ? URJ_POD_CS_TDI : 0;
+}
+
+static int
+ea253_get_tdo (urj_cable_t *cable)
+{
+ int trst = (PARAM_SIGNALS (cable) & URJ_POD_CS_TRST) ? 1 : 0;
+ int status;
+
+ urj_tap_parport_set_data (cable->link.port, (trst << TRST) | (0 << TCK));
+ PARAM_SIGNALS (cable) &=
+ ~(URJ_POD_CS_TDI | URJ_POD_CS_TCK | URJ_POD_CS_TMS);
+
+ urj_tap_cable_wait (cable);
+
+ status = urj_tap_parport_get_status (cable->link.port);
+ if (status == -1)
+ return status;
+
+ return (status >> TDO) & 1;
+}
+
+static int
+ea253_set_signal (urj_cable_t *cable, int mask, int val)
+{
+ int prev_sigs = PARAM_SIGNALS (cable);
+
+ mask &= (URJ_POD_CS_TDI | URJ_POD_CS_TCK | URJ_POD_CS_TMS | URJ_POD_CS_TRST); // only these can be modified
+
+ if (mask != 0)
+ {
+ int data = 0;
+ int sigs = (prev_sigs & ~mask) | (val & mask);
+ data |= (sigs & URJ_POD_CS_TDI) ? (1 << TDI) : 0;
+ data |= (sigs & URJ_POD_CS_TCK) ? (1 << TCK) : 0;
+ data |= (sigs & URJ_POD_CS_TMS) ? (1 << TMS) : 0;
+ data |= (sigs & URJ_POD_CS_TRST) ? (1 << TRST) : 0;
+ urj_tap_parport_set_data (cable->link.port, data);
+ PARAM_SIGNALS (cable) = sigs;
+ }
+
+ return prev_sigs;
+}
+
+urj_cable_driver_t urj_tap_cable_ea253_driver = {
+ "EA253",
+ N_("ETC EA253 JTAG Cable"),
+ URJ_CABLE_DEVICE_PARPORT,
+ { .parport = urj_tap_cable_generic_parport_connect, },
+ urj_tap_cable_generic_disconnect,
+ urj_tap_cable_generic_parport_free,
+ ea253_init,
+ urj_tap_cable_generic_parport_done,
+ urj_tap_cable_generic_set_frequency,
+ ea253_clock,
+ ea253_get_tdo,
+ urj_tap_cable_generic_transfer,
+ ea253_set_signal,
+ urj_tap_cable_generic_get_signal,
+ urj_tap_cable_generic_flush_one_by_one,
+ urj_tap_cable_generic_parport_help
+};
--- /dev/null
+/*
+ * $Id$
+ *
+ * ETC EI012 JTAG Cable Driver
+ * Copyright (C) 2002, 2003 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2002, 2003.
+ *
+ */
+
+#include <sysdep.h>
+
+#include <urjtag/cable.h>
+#include <urjtag/parport.h>
+#include <urjtag/chain.h>
+
+#include "generic.h"
+#include "generic_parport.h"
+
+/*
+ * data D[7:0] (pins 9:2)
+ */
+#define TCK 0
+#define TDI 1
+#define TMS 2
+#define TRST 4
+
+/*
+ * status
+ *
+ * 7 - BUSY (pin 11)
+ * 6 - ACK (pin 10)
+ * 5 - PE (pin 12)
+ * 4 - SEL (pin 13)
+ * 3 - ERROR (pin 15)
+ */
+#define TDO 7
+
+static int
+ei012_init (urj_cable_t *cable)
+{
+ int data;
+
+ if (urj_tap_parport_open (cable->link.port) != URJ_STATUS_OK)
+ return URJ_STATUS_FAIL;
+
+ if ((data = urj_tap_parport_get_data (cable->link.port)) < 0)
+ {
+ if (urj_tap_parport_set_data (cable->link.port,
+ 1 << TRST) != URJ_STATUS_OK)
+ return URJ_STATUS_FAIL;
+ PARAM_SIGNALS (cable) = URJ_POD_CS_TRST;
+ }
+ else
+ PARAM_SIGNALS (cable) = ((data >> TRST) && 1) ? URJ_POD_CS_TRST : 0;
+
+ return URJ_STATUS_OK;
+}
+
+static void
+ei012_clock (urj_cable_t *cable, int tms, int tdi, int n)
+{
+ int i;
+ int trst = (PARAM_SIGNALS (cable) & URJ_POD_CS_TRST) ? 1 : 0;
+
+ tms = tms ? 1 : 0;
+ tdi = tdi ? 1 : 0;
+
+ for (i = 0; i < n; i++)
+ {
+ urj_tap_parport_set_data (cable->link.port,
+ (trst << TRST) | (0 << TCK) | (tms << TMS)
+ | (tdi << TDI));
+ urj_tap_cable_wait (cable);
+ urj_tap_parport_set_data (cable->link.port,
+ (trst << TRST) | (1 << TCK) | (tms << TMS)
+ | (tdi << TDI));
+ urj_tap_cable_wait (cable);
+ }
+
+ PARAM_SIGNALS (cable) &= URJ_POD_CS_TRST;
+ PARAM_SIGNALS (cable) |= URJ_POD_CS_TCK;
+ PARAM_SIGNALS (cable) |= tms ? URJ_POD_CS_TMS : 0;
+ PARAM_SIGNALS (cable) |= tdi ? URJ_POD_CS_TDI : 0;
+}
+
+static int
+ei012_get_tdo (urj_cable_t *cable)
+{
+ int trst = (PARAM_SIGNALS (cable) & URJ_POD_CS_TRST) ? 1 : 0;
+ int status;
+
+ urj_tap_parport_set_data (cable->link.port, (trst << TRST) | (0 << TCK));
+ PARAM_SIGNALS (cable) &=
+ ~(URJ_POD_CS_TDI | URJ_POD_CS_TCK | URJ_POD_CS_TMS);
+
+ urj_tap_cable_wait (cable);
+
+ status = urj_tap_parport_get_status (cable->link.port);
+ if (status == -1)
+ return status;
+
+ return (status >> TDO) & 1;
+}
+
+static int
+ei012_set_signal (urj_cable_t *cable, int mask, int val)
+{
+ int prev_sigs = PARAM_SIGNALS (cable);
+
+ mask &= (URJ_POD_CS_TDI | URJ_POD_CS_TCK | URJ_POD_CS_TMS | URJ_POD_CS_TRST); // only these can be modified
+
+ if (mask != 0)
+ {
+ int data = 0;
+ int sigs = (prev_sigs & ~mask) | (val & mask);
+ data |= (sigs & URJ_POD_CS_TDI) ? (1 << TDI) : 0;
+ data |= (sigs & URJ_POD_CS_TCK) ? (1 << TCK) : 0;
+ data |= (sigs & URJ_POD_CS_TMS) ? (1 << TMS) : 0;
+ data |= (sigs & URJ_POD_CS_TRST) ? (1 << TRST) : 0;
+ urj_tap_parport_set_data (cable->link.port, data);
+ PARAM_SIGNALS (cable) = sigs;
+ }
+
+ return prev_sigs;
+}
+
+urj_cable_driver_t urj_tap_cable_ei012_driver = {
+ "EI012",
+ N_("ETC EI012 JTAG Cable"),
+ URJ_CABLE_DEVICE_PARPORT,
+ { .parport = urj_tap_cable_generic_parport_connect, },
+ urj_tap_cable_generic_disconnect,
+ urj_tap_cable_generic_parport_free,
+ ei012_init,
+ urj_tap_cable_generic_parport_done,
+ urj_tap_cable_generic_set_frequency,
+ ei012_clock,
+ ei012_get_tdo,
+ urj_tap_cable_generic_transfer,
+ ei012_set_signal,
+ urj_tap_cable_generic_get_signal,
+ urj_tap_cable_generic_flush_one_by_one,
+ urj_tap_cable_generic_parport_help
+};
--- /dev/null
+/*
+ * $Id$
+ *
+ * Generic cable driver for FTDI's FT2232C chip in MPSSE mode.
+ * Copyright (C) 2007 A. Laeuger
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Arnim Laeuger, 2007-2008.
+ * Support for JTAGkey submitted by Laurent Gauch, 2008.
+ *
+ */
+
+#include <sysdep.h>
+
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+
+#include <urjtag/cable.h>
+#include <urjtag/chain.h>
+#include <urjtag/cmd.h>
+
+#include "generic.h"
+#include "generic_usbconn.h"
+
+#include <urjtag/usbconn.h>
+#include "usbconn/libftdx.h"
+
+#include "cmd_xfer.h"
+
+/* Maximum TCK frequency of FT2232 */
+#define FT2232_MAX_TCK_FREQ 6000000
+
+/* The default driver if not specified otherwise during connect */
+#ifdef ENABLE_LOWLEVEL_FTD2XX
+#define DEFAULT_DRIVER "ftd2xx-mpsse"
+#else
+#define DEFAULT_DRIVER "ftdi-mpsse"
+#endif
+
+
+/* repeat the definitions for MPSSE command processor here
+ since we cannot rely on the existence of ftdi.h even though
+ they're defined there */
+
+/* Shifting commands IN MPSSE Mode*/
+#define MPSSE_WRITE_NEG 0x01 /* Write TDI/DO on negative TCK/SK edge */
+#define MPSSE_BITMODE 0x02 /* Write bits, not bytes */
+#define MPSSE_READ_NEG 0x04 /* Sample TDO/DI on negative TCK/SK edge */
+#define MPSSE_LSB 0x08 /* LSB first */
+#define MPSSE_DO_WRITE 0x10 /* Write TDI/DO */
+#define MPSSE_DO_READ 0x20 /* Read TDO/DI */
+#define MPSSE_WRITE_TMS 0x40 /* Write TMS/CS */
+
+/* FTDI MPSSE commands */
+#define SET_BITS_LOW 0x80
+/*BYTE DATA*/
+/*BYTE Direction*/
+#define SET_BITS_HIGH 0x82
+/*BYTE DATA*/
+/*BYTE Direction*/
+#define GET_BITS_LOW 0x81
+#define GET_BITS_HIGH 0x83
+#define LOOPBACK_START 0x84
+#define LOOPBACK_END 0x85
+#define TCK_DIVISOR 0x86
+#define SEND_IMMEDIATE 0x87
+
+
+/* bit and bitmask definitions for GPIO commands */
+#define BIT_TCK 0
+#define BIT_TDI 1
+#define BIT_TDO 2
+#define BIT_TMS 3
+#define BITMASK_TDO (1 << BIT_TDO)
+#define BITMASK_TDI (1 << BIT_TDI)
+#define BITMASK_TCK (1 << BIT_TCK)
+#define BITMASK_TMS (1 << BIT_TMS)
+
+/* bit and bitmask definitions for Amontec JTAGkey */
+#define BIT_JTAGKEY_nOE 4
+#define BIT_JTAGKEY_TRST_N_OUT 0
+#define BIT_JTAGKEY_SRST_N_OUT 1
+#define BIT_JTAGKEY_TRST_N_OE_N 2
+#define BIT_JTAGKEY_SRST_N_OE_N 3
+#define BITMASK_JTAGKEY_nOE (1 << BIT_JTAGKEY_nOE)
+#define BITMASK_JTAGKEY_TRST_N_OUT (1 << BIT_JTAGKEY_TRST_N_OUT)
+#define BITMASK_JTAGKEY_SRST_N_OUT (1 << BIT_JTAGKEY_SRST_N_OUT)
+#define BITMASK_JTAGKEY_TRST_N_OE_N (1 << BIT_JTAGKEY_TRST_N_OE_N)
+#define BITMASK_JTAGKEY_SRST_N_OE_N (1 << BIT_JTAGKEY_SRST_N_OE_N)
+
+/* bit and bitmask definitions for Olimex ARM-USB-OCD */
+#define BIT_ARMUSBOCD_nOE 4
+#define BIT_ARMUSBOCD_nTRST 0
+#define BIT_ARMUSBOCD_nTSRST 1
+#define BIT_ARMUSBOCD_nTRST_nOE 2
+#define BIT_ARMUSBOCD_RED_LED 3
+#define BITMASK_ARMUSBOCD_nOE (1 << BIT_ARMUSBOCD_nOE)
+#define BITMASK_ARMUSBOCD_nTRST (1 << BIT_ARMUSBOCD_nTRST)
+#define BITMASK_ARMUSBOCD_nTSRST (1 << BIT_ARMUSBOCD_nTSRST)
+#define BITMASK_ARMUSBOCD_nTRST_nOE (1 << BIT_ARMUSBOCD_nTRST_nOE)
+#define BITMASK_ARMUSBOCD_RED_LED (1 << BIT_ARMUSBOCD_RED_LED)
+
+/* bit and bitmask definitions for Blackfin gnICE */
+#define BIT_GNICE_nTRST 1
+#define BIT_GNICE_nLED 3
+#define BITMASK_GNICE_nTRST (1 << BIT_GNICE_nTRST)
+#define BITMASK_GNICE_nLED (1 << BIT_GNICE_nLED)
+
+/* bit and bitmask definitions for OOCDLink-s */
+#define BIT_OOCDLINKS_nTRST_nOE 0
+#define BIT_OOCDLINKS_nTRST 1
+#define BIT_OOCDLINKS_nSRST_nOE 2
+#define BIT_OOCDLINKS_nSRST 3
+#define BITMASK_OOCDLINKS_nTRST_nOE (1 << BIT_OOCDLINKS_nTRST_nOE)
+#define BITMASK_OOCDLINKS_nTRST (1 << BIT_OOCDLINKS_nTRST)
+#define BITMASK_OOCDLINKS_nSRST_nOE (1 << BIT_OOCDLINKS_nSRST_nOE)
+#define BITMASK_OOCDLINKS_nSRST (1 << BIT_OOCDLINKS_nSRST)
+
+/* bit and bitmask definitions for Turtelizer 2 */
+#define BIT_TURTELIZER2_nJTAGOE 4
+#define BIT_TURTELIZER2_RST 6
+#define BIT_TURTELIZER2_nTX1LED 2
+#define BIT_TURTELIZER2_nRX1LED 3
+#define BITMASK_TURTELIZER2_nJTAGOE (1 << BIT_TURTELIZER2_nJTAGOE)
+#define BITMASK_TURTELIZER2_RST (1 << BIT_TURTELIZER2_RST)
+#define BITMASK_TURTELIZER2_nTX1LED (1 << BIT_TURTELIZER2_nTX1LED)
+#define BITMASK_TURTELIZER2_nRX1LED (1 << BIT_TURTELIZER2_nRX1LED)
+
+/* bit and bitmask definitions for USB to JTAG Interface */
+#define BIT_USBTOJTAGIF_nTRST 4
+#define BIT_USBTOJTAGIF_RST 6
+#define BIT_USBTOJTAGIF_DBGRQ 7
+#define BIT_USBTOJTAGIF_nRxLED 2
+#define BIT_USBTOJTAGIF_nTxLED 3
+#define BITMASK_USBTOJTAGIF_nTRST (1 << BIT_USBTOJTAGIF_nTRST)
+#define BITMASK_USBTOJTAGIF_RST (1 << BIT_USBTOJTAGIF_RST)
+#define BITMASK_USBTOJTAGIF_DBGRQ (1 << BIT_USBTOJTAGIF_DBGRQ)
+#define BITMASK_USBTOJTAGIF_nRxLED (1 << BIT_USBTOJTAGIF_nRxLED)
+#define BITMASK_USBTOJTAGIF_nTxLED (1 << BIT_USBTOJTAGIF_nTxLED)
+
+/* bit and bitmask definitions for Xverve DT-USB-ST Signalyzer Tool */
+#define BIT_SIGNALYZER_nTRST 4
+#define BIT_SIGNALYZER_nSRST 5
+#define BITMASK_SIGNALYZER_nTRST (1 << BIT_SIGNALYZER_nTRST)
+#define BITMASK_SIGNALYZER_nSRST (1 << BIT_SIGNALYZER_nSRST)
+
+/* bit and bitmask definitions for TinCanTools Flyswatter board*/
+#define BIT_FLYSWATTER_nLED2 3
+#define BIT_FLYSWATTER_nTRST 4
+#define BIT_FLYSWATTER_nSRST 5
+#define BIT_FLYSWATTER_nOE1 6
+#define BIT_FLYSWATTER_nOE2 7
+#define BITMASK_FLYSWATTER_nLED2 (1 << BIT_FLYSWATTER_nLED2)
+#define BITMASK_FLYSWATTER_nTRST (1 << BIT_FLYSWATTER_nTRST)
+#define BITMASK_FLYSWATTER_nSRST (1 << BIT_FLYSWATTER_nSRST)
+#define BITMASK_FLYSWATTER_nOE1 (1 << BIT_FLYSWATTER_nOE1)
+#define BITMASK_FLYSWATTER_nOE2 (1 << BIT_FLYSWATTER_nOE2)
+
+/* --- Bit and bitmask definitions for usbScarab2 --- */
+/* usbScarabeus2 is a design of Krzysztof Kajstura ( http://www.kristech.eu ). */
+/* UrJTAG support added by Tomek Cedro ( http://www.tomek.cedro.info ) */
+/* as a part of work for TP R&D (Polish Telecom, FT/Orange Group) http://www.tp.pl */
+#define BIT_USBSCARAB2_nCONNECTED 5 // ADBUS
+#define BIT_USBSCARAB2_TRST 0 // ACBUS
+#define BIT_USBSCARAB2_nSRST 1 // ACBUS
+#define BIT_USBSCARAB2_LED 3 // ACBUS
+#define BITMASK_USBSCARAB2_LED (1 << BIT_USBSCARAB2_LED)
+#define BITMASK_USBSCARAB2_TRST (1 << BIT_USBSCARAB2_TRST)
+#define BITMASK_USBSCARAB2_nSRST (1 << BIT_USBSCARAB2_nSRST)
+#define BITMASK_USBSCARAB2_nCONNECTED (1 << BIT_USBSCARAB2_nCONNECTED)
+
+
+
+typedef struct
+{
+ uint32_t mpsse_frequency;
+
+ /* this driver issues several "Set Data Bits Low Byte" commands
+ here is the place where cable specific values can be stored
+ that are used each time this command is issued */
+ uint8_t low_byte_value;
+ uint8_t low_byte_dir;
+
+ /* this driver issues several "Set Data Bits High Byte" commands
+ here is the place where cable specific values can be stored
+ that are used each time this command is issued */
+ uint8_t high_byte_value;
+ uint8_t high_byte_dir;
+
+ /* the following variables store the bit position of TRST and RESET (SRST)
+ for XOR'ing with the default values of low_byte_value and high_byte_value
+ allowed values:
+ < 0 : feature not used
+ < 8 : applies to low byte
+ < 12 : applies to high byte */
+ int bit_trst;
+ int bit_reset;
+
+ /* variables to save last TDO value
+ this acts as a cache to prevent multiple "Read Data Bits Low" transfer
+ over USB for ft2232_get_tdo */
+ unsigned int last_tdo_valid;
+ unsigned int last_tdo;
+ int signals;
+
+ urj_tap_cable_cx_cmd_root_t cmd_root;
+} params_t;
+
+
+static const uint8_t imm_buf[1] = { SEND_IMMEDIATE };
+static const urj_tap_cable_cx_cmd_t imm_cmd =
+ { NULL, 1, 1, (uint8_t *) imm_buf, 0 };
+
+
+static void
+ft2232_set_frequency (urj_cable_t *cable, uint32_t new_frequency)
+{
+ params_t *params = (params_t *) cable->params;
+ urj_tap_cable_cx_cmd_root_t *cmd_root = &(params->cmd_root);
+
+ if (!new_frequency || new_frequency > FT2232_MAX_TCK_FREQ)
+ new_frequency = FT2232_MAX_TCK_FREQ;
+
+ /* update ft2232 frequency if cable setting changed */
+ if (new_frequency != params->mpsse_frequency)
+ {
+ uint32_t div;
+
+ div = FT2232_MAX_TCK_FREQ / new_frequency;
+ if (FT2232_MAX_TCK_FREQ % new_frequency)
+ div++;
+
+ if (div >= (1 << 16))
+ {
+ div = (1 << 16) - 1;
+ urj_warning (_("Setting lowest supported frequency for FT2232: %d\n"),
+ FT2232_MAX_TCK_FREQ / div);
+ }
+
+ /* send new divisor to device */
+ div -= 1;
+ urj_tap_cable_cx_cmd_queue (cmd_root, 0);
+ urj_tap_cable_cx_cmd_push (cmd_root, TCK_DIVISOR);
+ urj_tap_cable_cx_cmd_push (cmd_root, div & 0xff);
+ urj_tap_cable_cx_cmd_push (cmd_root, (div >> 8) & 0xff);
+
+ urj_tap_cable_cx_xfer (cmd_root, &imm_cmd, cable,
+ URJ_TAP_CABLE_COMPLETELY);
+
+ params->mpsse_frequency = FT2232_MAX_TCK_FREQ / (div + 1);
+ cable->frequency = params->mpsse_frequency;
+ }
+}
+
+
+static int
+ft2232_generic_init (urj_cable_t *cable)
+{
+ params_t *params = (params_t *) cable->params;
+ urj_tap_cable_cx_cmd_root_t *cmd_root = &(params->cmd_root);
+
+ if (urj_tap_usbconn_open (cable->link.usb) != URJ_STATUS_OK)
+ return URJ_STATUS_FAIL;
+
+ /* safe default values */
+ params->low_byte_value = 0;
+ params->low_byte_dir = 0;
+
+ /* Set Data Bits Low Byte
+ TCK = 0, TMS = 1, TDI = 0 */
+ urj_tap_cable_cx_cmd_queue (cmd_root, 0);
+ urj_tap_cable_cx_cmd_push (cmd_root, SET_BITS_LOW);
+ urj_tap_cable_cx_cmd_push (cmd_root,
+ params->low_byte_value | BITMASK_TMS);
+ urj_tap_cable_cx_cmd_push (cmd_root,
+ params->low_byte_dir | BITMASK_TCK
+ | BITMASK_TDI | BITMASK_TMS);
+
+ /* Set Data Bits High Byte */
+ params->high_byte_value = 0;
+ params->high_byte_value = 0;
+ params->high_byte_dir = 0;
+ urj_tap_cable_cx_cmd_push (cmd_root, SET_BITS_HIGH);
+ urj_tap_cable_cx_cmd_push (cmd_root, params->high_byte_value);
+ urj_tap_cable_cx_cmd_push (cmd_root, params->high_byte_dir);
+
+ ft2232_set_frequency (cable, FT2232_MAX_TCK_FREQ);
+
+ params->bit_trst = -1; /* not used */
+ params->bit_reset = -1; /* not used */
+
+ params->last_tdo_valid = 0;
+ params->signals = 0;
+
+ return URJ_STATUS_OK;
+}
+
+static int
+ft2232_jtagkey_init (urj_cable_t *cable)
+{
+ params_t *params = (params_t *) cable->params;
+ urj_tap_cable_cx_cmd_root_t *cmd_root = &(params->cmd_root);
+
+ if (urj_tap_usbconn_open (cable->link.usb) != URJ_STATUS_OK)
+ return URJ_STATUS_FAIL;
+
+ /* static low byte value and direction:
+ set nOE to '0' -> activate output enables */
+ params->low_byte_value = 0;
+ params->low_byte_dir = BITMASK_JTAGKEY_nOE;
+
+ /* Set Data Bits Low Byte
+ TCK = 0, TMS = 1, TDI = 0, nOE = 0 */
+ urj_tap_cable_cx_cmd_queue (cmd_root, 0);
+ urj_tap_cable_cx_cmd_push (cmd_root, SET_BITS_LOW);
+ urj_tap_cable_cx_cmd_push (cmd_root,
+ params->low_byte_value | BITMASK_TMS);
+ urj_tap_cable_cx_cmd_push (cmd_root,
+ params->low_byte_dir | BITMASK_TCK
+ | BITMASK_TDI | BITMASK_TMS);
+
+ /* Set Data Bits High Byte
+ default:
+ TRST_N_OUT = 1
+ TRST_N_OE_N = 0
+ SRST_N_OUT = 1
+ SRST_N_OE_N = 0 */
+ params->high_byte_value =
+ BITMASK_JTAGKEY_TRST_N_OUT | BITMASK_JTAGKEY_SRST_N_OUT;
+ params->high_byte_dir =
+ BITMASK_JTAGKEY_TRST_N_OUT | BITMASK_JTAGKEY_TRST_N_OE_N |
+ BITMASK_JTAGKEY_SRST_N_OUT | BITMASK_JTAGKEY_SRST_N_OE_N;
+ urj_tap_cable_cx_cmd_push (cmd_root, SET_BITS_HIGH);
+ urj_tap_cable_cx_cmd_push (cmd_root, params->high_byte_value);
+ urj_tap_cable_cx_cmd_push (cmd_root, 0);
+ urj_tap_cable_cx_cmd_push (cmd_root, SET_BITS_HIGH);
+ urj_tap_cable_cx_cmd_push (cmd_root, params->high_byte_value);
+ urj_tap_cable_cx_cmd_push (cmd_root, params->high_byte_dir);
+
+ ft2232_set_frequency (cable, FT2232_MAX_TCK_FREQ);
+
+ params->bit_trst = BIT_JTAGKEY_TRST_N_OUT + 8; /* member of HIGH byte */
+ params->bit_reset = BIT_JTAGKEY_SRST_N_OUT + 8; /* member of HIGH byte */
+
+ params->last_tdo_valid = 0;
+ params->signals = URJ_POD_CS_TRST | URJ_POD_CS_RESET;
+
+ return URJ_STATUS_OK;
+}
+
+
+static int
+ft2232_armusbocd_init (urj_cable_t *cable)
+{
+ params_t *params = (params_t *) cable->params;
+ urj_tap_cable_cx_cmd_root_t *cmd_root = &(params->cmd_root);
+
+ if (urj_tap_usbconn_open (cable->link.usb) != URJ_STATUS_OK)
+ return URJ_STATUS_FAIL;
+
+ /* static low byte value and direction:
+ set nOE to '0' -> activate output enables */
+ params->low_byte_value = 0;
+ params->low_byte_dir = BITMASK_ARMUSBOCD_nOE;
+
+ /* Set Data Bits Low Byte
+ TCK = 0, TMS = 1, TDI = 0, nOE = 0 */
+ urj_tap_cable_cx_cmd_queue (cmd_root, 0);
+ urj_tap_cable_cx_cmd_push (cmd_root, SET_BITS_LOW);
+ urj_tap_cable_cx_cmd_push (cmd_root,
+ params->low_byte_value | BITMASK_TMS);
+ urj_tap_cable_cx_cmd_push (cmd_root,
+ params->low_byte_dir | BITMASK_TCK
+ | BITMASK_TDI | BITMASK_TMS);
+
+ /* Set Data Bits High Byte
+ default:
+ TRST = 1
+ TRST buffer enable = 0
+ TSRST = 1
+ RED LED on */
+ params->high_byte_value = BITMASK_ARMUSBOCD_nTRST
+ | BITMASK_ARMUSBOCD_nTSRST | BITMASK_ARMUSBOCD_RED_LED;
+ params->high_byte_dir = BITMASK_ARMUSBOCD_nTRST
+ | BITMASK_ARMUSBOCD_nTRST_nOE
+ | BITMASK_ARMUSBOCD_nTSRST | BITMASK_ARMUSBOCD_RED_LED;
+ urj_tap_cable_cx_cmd_push (cmd_root, SET_BITS_HIGH);
+ urj_tap_cable_cx_cmd_push (cmd_root, params->high_byte_value);
+ urj_tap_cable_cx_cmd_push (cmd_root, 0);
+ urj_tap_cable_cx_cmd_push (cmd_root, SET_BITS_HIGH);
+ urj_tap_cable_cx_cmd_push (cmd_root, params->high_byte_value);
+ urj_tap_cable_cx_cmd_push (cmd_root, params->high_byte_dir);
+
+ ft2232_set_frequency (cable, FT2232_MAX_TCK_FREQ);
+
+ params->bit_trst = BIT_ARMUSBOCD_nTRST + 8; /* member of HIGH byte */
+ params->bit_reset = BIT_ARMUSBOCD_nTSRST + 8; /* member of HIGH byte */
+
+ params->last_tdo_valid = 0;
+ params->signals = URJ_POD_CS_TRST | URJ_POD_CS_RESET;
+
+ return URJ_STATUS_OK;
+}
+
+
+static int
+ft2232_gnice_init (urj_cable_t *cable)
+{
+ params_t *params = (params_t *) cable->params;
+ urj_tap_cable_cx_cmd_root_t *cmd_root = &(params->cmd_root);
+
+ if (urj_tap_usbconn_open (cable->link.usb) != URJ_STATUS_OK)
+ return URJ_STATUS_FAIL;
+
+ /* safe default values */
+ params->low_byte_value = 0;
+ params->low_byte_dir = 0;
+
+ /* Set Data Bits Low Byte
+ TCK = 0, TMS = 1, TDI = 0 */
+ urj_tap_cable_cx_cmd_queue (cmd_root, 0);
+ urj_tap_cable_cx_cmd_push (cmd_root, SET_BITS_LOW);
+ urj_tap_cable_cx_cmd_push (cmd_root,
+ params->low_byte_value | BITMASK_TMS);
+ urj_tap_cable_cx_cmd_push (cmd_root,
+ params->low_byte_dir | BITMASK_TCK
+ | BITMASK_TDI | BITMASK_TMS);
+
+ /* Set Data Bits High Byte */
+ params->high_byte_value = BITMASK_GNICE_nTRST;
+ params->high_byte_dir = BITMASK_GNICE_nTRST | BITMASK_GNICE_nLED;
+ urj_tap_cable_cx_cmd_push (cmd_root, SET_BITS_HIGH);
+ urj_tap_cable_cx_cmd_push (cmd_root, params->high_byte_value);
+ urj_tap_cable_cx_cmd_push (cmd_root, 0);
+ urj_tap_cable_cx_cmd_push (cmd_root, SET_BITS_HIGH);
+ urj_tap_cable_cx_cmd_push (cmd_root, params->high_byte_value);
+ urj_tap_cable_cx_cmd_push (cmd_root, params->high_byte_dir);
+
+ ft2232_set_frequency (cable, FT2232_MAX_TCK_FREQ);
+
+ params->bit_trst = BIT_GNICE_nTRST + 8; /* member of HIGH byte */
+ params->bit_reset = -1; /* not used */
+
+ params->last_tdo_valid = 0;
+ params->signals = URJ_POD_CS_TRST;
+
+ return URJ_STATUS_OK;
+}
+
+
+static int
+ft2232_oocdlinks_init (urj_cable_t *cable)
+{
+ params_t *params = (params_t *) cable->params;
+ urj_tap_cable_cx_cmd_root_t *cmd_root = &(params->cmd_root);
+
+ if (urj_tap_usbconn_open (cable->link.usb) != URJ_STATUS_OK)
+ return URJ_STATUS_FAIL;
+
+ /* static low byte value and direction */
+ params->low_byte_value = 0;
+ params->low_byte_dir = 0;
+
+ /* Set Data Bits Low Byte
+ TCK = 0, TMS = 1, TDI = 0 */
+ urj_tap_cable_cx_cmd_queue (cmd_root, 0);
+ urj_tap_cable_cx_cmd_push (cmd_root, SET_BITS_LOW);
+ urj_tap_cable_cx_cmd_push (cmd_root,
+ params->low_byte_value | BITMASK_TMS);
+ urj_tap_cable_cx_cmd_push (cmd_root,
+ params->low_byte_dir | BITMASK_TCK
+ | BITMASK_TDI | BITMASK_TMS);
+
+ /* Set Data Bits High Byte
+ default:
+ TRST = 1
+ TRST buffer enable = 0
+ SRST = 1
+ SRST buffer enable = 0 */
+ params->high_byte_value = BITMASK_OOCDLINKS_nTRST
+ | BITMASK_OOCDLINKS_nSRST;
+ params->high_byte_dir = BITMASK_OOCDLINKS_nTRST
+ | BITMASK_OOCDLINKS_nTRST_nOE
+ | BITMASK_OOCDLINKS_nSRST | BITMASK_OOCDLINKS_nSRST_nOE;
+ urj_tap_cable_cx_cmd_push (cmd_root, SET_BITS_HIGH);
+ urj_tap_cable_cx_cmd_push (cmd_root, params->high_byte_value);
+ urj_tap_cable_cx_cmd_push (cmd_root, 0);
+ urj_tap_cable_cx_cmd_push (cmd_root, SET_BITS_HIGH);
+ urj_tap_cable_cx_cmd_push (cmd_root, params->high_byte_value);
+ urj_tap_cable_cx_cmd_push (cmd_root, params->high_byte_dir);
+
+ ft2232_set_frequency (cable, FT2232_MAX_TCK_FREQ);
+
+ params->bit_trst = BIT_OOCDLINKS_nTRST + 8; /* member of HIGH byte */
+ params->bit_reset = BIT_OOCDLINKS_nSRST + 8; /* member of HIGH byte */
+
+ params->last_tdo_valid = 0;
+ params->signals = URJ_POD_CS_TRST | URJ_POD_CS_RESET;
+
+ return URJ_STATUS_OK;
+}
+
+
+static int
+ft2232_turtelizer2_init (urj_cable_t *cable)
+{
+ params_t *params = (params_t *) cable->params;
+ urj_tap_cable_cx_cmd_root_t *cmd_root = &(params->cmd_root);
+
+ if (urj_tap_usbconn_open (cable->link.usb) != URJ_STATUS_OK)
+ return URJ_STATUS_FAIL;
+
+ /* static low byte value and direction:
+ set nJTAGOE to '0' -> activate output enables
+ set RST to 0 -> inactive nSRST */
+ params->low_byte_value = 0;
+ params->low_byte_dir =
+ BITMASK_TURTELIZER2_nJTAGOE | BITMASK_TURTELIZER2_RST;
+
+ /* Set Data Bits Low Byte
+ TCK = 0, TMS = 1, TDI = 0 */
+ urj_tap_cable_cx_cmd_queue (cmd_root, 0);
+ urj_tap_cable_cx_cmd_push (cmd_root, SET_BITS_LOW);
+ urj_tap_cable_cx_cmd_push (cmd_root,
+ params->low_byte_value | BITMASK_TMS);
+ urj_tap_cable_cx_cmd_push (cmd_root,
+ params->low_byte_dir | BITMASK_TCK
+ | BITMASK_TDI | BITMASK_TMS);
+
+ /* Set Data Bits High Byte
+ default:
+ TX1LED on
+ RX1LED on */
+ params->high_byte_value = 0;
+ params->high_byte_dir =
+ BITMASK_TURTELIZER2_nTX1LED | BITMASK_TURTELIZER2_nRX1LED;
+ urj_tap_cable_cx_cmd_push (cmd_root, SET_BITS_HIGH);
+ urj_tap_cable_cx_cmd_push (cmd_root, params->high_byte_value);
+ urj_tap_cable_cx_cmd_push (cmd_root, params->high_byte_dir);
+
+ ft2232_set_frequency (cable, FT2232_MAX_TCK_FREQ);
+
+ params->bit_trst = -1; /* not used */
+ params->bit_reset = BIT_TURTELIZER2_RST; /* member of LOW byte */
+
+ params->last_tdo_valid = 0;
+ params->signals = URJ_POD_CS_RESET;
+
+ return URJ_STATUS_OK;
+}
+
+
+static int
+ft2232_usbtojtagif_init (urj_cable_t *cable)
+{
+ params_t *params = (params_t *) cable->params;
+ urj_tap_cable_cx_cmd_root_t *cmd_root = &(params->cmd_root);
+
+ if (urj_tap_usbconn_open (cable->link.usb) != URJ_STATUS_OK)
+ return URJ_STATUS_FAIL;
+
+ /* static low byte value and direction:
+ nTRST = 1, RST = 1, DBGRQ = 0 */
+ params->low_byte_value =
+ BITMASK_USBTOJTAGIF_nTRST | BITMASK_USBTOJTAGIF_RST;
+ params->low_byte_dir =
+ BITMASK_USBTOJTAGIF_nTRST | BITMASK_USBTOJTAGIF_RST |
+ BITMASK_USBTOJTAGIF_DBGRQ;
+
+ /* Set Data Bits Low Byte
+ TCK = 0, TMS = 1, TDI = 0 */
+ urj_tap_cable_cx_cmd_queue (cmd_root, 0);
+ urj_tap_cable_cx_cmd_push (cmd_root, SET_BITS_LOW);
+ urj_tap_cable_cx_cmd_push (cmd_root,
+ params->low_byte_value | BITMASK_TMS);
+ urj_tap_cable_cx_cmd_push (cmd_root,
+ params->low_byte_dir | BITMASK_TCK
+ | BITMASK_TDI | BITMASK_TMS);
+
+ /* Set Data Bits High Byte
+ default:
+ RxLED on
+ TxLED on */
+ params->high_byte_value = 0;
+ params->high_byte_value = 0;
+ params->high_byte_dir =
+ BITMASK_USBTOJTAGIF_nRxLED | BITMASK_USBTOJTAGIF_nTxLED;
+ urj_tap_cable_cx_cmd_push (cmd_root, SET_BITS_HIGH);
+ urj_tap_cable_cx_cmd_push (cmd_root, params->high_byte_value);
+ urj_tap_cable_cx_cmd_push (cmd_root, params->high_byte_dir);
+
+ /* I-couplers can only work up to 3 MHz
+ ref. http://www.hs-augsburg.de/~hhoegl/proj/usbjtag/usbjtag.html */
+ ft2232_set_frequency (cable, FT2232_MAX_TCK_FREQ / 2);
+
+ params->bit_trst = BIT_USBTOJTAGIF_nTRST; /* member of LOW byte */
+ params->bit_reset = BIT_USBTOJTAGIF_RST; /* member of LOW byte */
+
+ params->last_tdo_valid = 0;
+ params->signals = URJ_POD_CS_TRST | URJ_POD_CS_RESET;
+
+ return URJ_STATUS_OK;
+}
+
+
+static int
+ft2232_signalyzer_init (urj_cable_t *cable)
+{
+ params_t *params = (params_t *) cable->params;
+ urj_tap_cable_cx_cmd_root_t *cmd_root = &(params->cmd_root);
+
+ if (urj_tap_usbconn_open (cable->link.usb) != URJ_STATUS_OK)
+ return URJ_STATUS_FAIL;
+
+ /* static low byte value and direction:
+ nTRST = 1, nSRST = 1 */
+ params->low_byte_value =
+ BITMASK_SIGNALYZER_nTRST | BITMASK_SIGNALYZER_nSRST;
+ params->low_byte_dir =
+ BITMASK_SIGNALYZER_nTRST | BITMASK_SIGNALYZER_nSRST;
+
+ /* Set Data Bits Low Byte
+ TCK = 0, TMS = 1, TDI = 0 */
+ urj_tap_cable_cx_cmd_queue (cmd_root, 0);
+ urj_tap_cable_cx_cmd_push (cmd_root, SET_BITS_LOW);
+ urj_tap_cable_cx_cmd_push (cmd_root,
+ params->low_byte_value | BITMASK_TMS);
+ urj_tap_cable_cx_cmd_push (cmd_root,
+ params->low_byte_dir | BITMASK_TCK
+ | BITMASK_TDI | BITMASK_TMS);
+
+ /* Set Data Bits High Byte */
+ params->high_byte_value = 0;
+ params->high_byte_dir = 0;
+ urj_tap_cable_cx_cmd_push (cmd_root, SET_BITS_HIGH);
+ urj_tap_cable_cx_cmd_push (cmd_root, params->high_byte_value);
+ urj_tap_cable_cx_cmd_push (cmd_root, params->high_byte_dir);
+
+ ft2232_set_frequency (cable, FT2232_MAX_TCK_FREQ);
+
+ params->bit_trst = BIT_SIGNALYZER_nTRST; /* member of LOW byte */
+ params->bit_reset = BIT_SIGNALYZER_nSRST; /* member of LOW byte */
+
+ params->last_tdo_valid = 0;
+ params->signals = URJ_POD_CS_TRST | URJ_POD_CS_RESET;
+
+ return URJ_STATUS_OK;
+}
+
+
+static int
+ft2232_flyswatter_init (urj_cable_t *cable)
+{
+ params_t *params = (params_t *) cable->params;
+ urj_tap_cable_cx_cmd_root_t *cmd_root = &(params->cmd_root);
+
+ if (urj_tap_usbconn_open (cable->link.usb) != URJ_STATUS_OK)
+ return URJ_STATUS_FAIL;
+
+ /* static low byte value and direction:
+ nTRST = 1, nSRST = 1 (ADBUS5 inverted),
+ set nOE1 and nOE2 to '0' -> activate output enables */
+ params->low_byte_value = BITMASK_FLYSWATTER_nTRST;
+ params->low_byte_dir = BITMASK_FLYSWATTER_nOE1 | BITMASK_FLYSWATTER_nOE2 |
+ BITMASK_FLYSWATTER_nTRST | BITMASK_FLYSWATTER_nSRST;
+
+ /* Set Data Bits Low Byte
+ TCK = 0, TMS = 1, TDI = 0 */
+ urj_tap_cable_cx_cmd_queue (cmd_root, 0);
+ urj_tap_cable_cx_cmd_push (cmd_root, SET_BITS_LOW);
+ urj_tap_cable_cx_cmd_push (cmd_root,
+ params->low_byte_value | BITMASK_TMS);
+ urj_tap_cable_cx_cmd_push (cmd_root,
+ params->low_byte_dir | BITMASK_TCK
+ | BITMASK_TDI | BITMASK_TMS);
+
+ /* Set Data Bits High Byte */
+ /* Turn LED2 on */
+ params->high_byte_value = 0;
+ params->high_byte_dir = BITMASK_FLYSWATTER_nLED2;
+ urj_tap_cable_cx_cmd_push (cmd_root, SET_BITS_HIGH);
+ urj_tap_cable_cx_cmd_push (cmd_root, params->high_byte_value);
+ urj_tap_cable_cx_cmd_push (cmd_root, params->high_byte_dir);
+
+ ft2232_set_frequency (cable, FT2232_MAX_TCK_FREQ);
+
+ params->bit_trst = BIT_FLYSWATTER_nTRST; /* member of LOW byte */
+ params->bit_reset = BIT_FLYSWATTER_nSRST; /* member of LOW byte */
+
+ params->last_tdo_valid = 0;
+ params->signals = URJ_POD_CS_TRST | URJ_POD_CS_RESET;
+
+
+ return URJ_STATUS_OK;
+}
+
+static int
+ft2232_usbscarab2_init (urj_cable_t *cable)
+{
+ params_t *params = (params_t *) cable->params;
+ urj_tap_cable_cx_cmd_root_t *cmd_root = &(params->cmd_root);
+
+ if (urj_tap_usbconn_open (cable->link.usb) != URJ_STATUS_OK)
+ return URJ_STATUS_FAIL;
+
+ /* Check if cable is connected to the target and the target is powered on */
+ urj_tap_cable_cx_cmd_queue (cmd_root, 1);
+ urj_tap_cable_cx_cmd_push (cmd_root, GET_BITS_LOW);
+ urj_tap_cable_cx_xfer (&(params->cmd_root), &imm_cmd, cable,
+ URJ_TAP_CABLE_COMPLETELY);
+ if ((urj_tap_cable_cx_xfer_recv (cable) & BITMASK_USBSCARAB2_nCONNECTED)
+ != 0)
+ {
+ urj_error_set (URJ_ERROR_ILLEGAL_STATE,
+ _("Please power on the TARGET board and connect VCC signal"));
+ return URJ_STATUS_FAIL;
+ }
+
+ /* These bits will be set by default to: */
+ params->low_byte_value = 0;
+ params->low_byte_dir = 0;
+
+ /* Set Data Bits Low Byte
+ TCK = 0, TMS = 1, TDI = 0 */
+ urj_tap_cable_cx_cmd_queue (cmd_root, 0);
+ urj_tap_cable_cx_cmd_push (cmd_root, SET_BITS_LOW);
+ urj_tap_cable_cx_cmd_push (cmd_root,
+ params->low_byte_value | BITMASK_TMS);
+ urj_tap_cable_cx_cmd_push (cmd_root,
+ params->low_byte_dir | BITMASK_TCK
+ | BITMASK_TDI | BITMASK_TMS);
+
+ /* Set Data Bits High Byte */
+ /* nLED=0 */
+ params->high_byte_value = 0 | BITMASK_USBSCARAB2_TRST;
+ params->high_byte_dir =
+ 0 | BITMASK_USBSCARAB2_LED | BITMASK_USBSCARAB2_TRST |
+ BITMASK_USBSCARAB2_nSRST;
+ urj_tap_cable_cx_cmd_push (cmd_root, SET_BITS_HIGH);
+ urj_tap_cable_cx_cmd_push (cmd_root, params->high_byte_value);
+ urj_tap_cable_cx_cmd_push (cmd_root, params->high_byte_dir);
+
+ ft2232_set_frequency (cable, FT2232_MAX_TCK_FREQ);
+
+ params->bit_trst = BIT_USBSCARAB2_TRST + 8; /* member of HIGH byte */
+ params->bit_reset = BIT_USBSCARAB2_nSRST + 8; /* member of HIGH byte */
+
+ params->last_tdo_valid = 0;
+ params->signals = URJ_POD_CS_TRST | URJ_POD_CS_RESET;
+
+ urj_log (URJ_LOG_LEVEL_NORMAL, "Cable initialization OK!\n");
+ return URJ_STATUS_OK;
+}
+
+
+static void
+ft2232_generic_done (urj_cable_t *cable)
+{
+ params_t *params = (params_t *) cable->params;
+ urj_tap_cable_cx_cmd_root_t *cmd_root = &(params->cmd_root);
+
+ /* Set Data Bits Low Byte
+ set all to input */
+ urj_tap_cable_cx_cmd_queue (cmd_root, 0);
+ urj_tap_cable_cx_cmd_push (cmd_root, SET_BITS_LOW);
+ urj_tap_cable_cx_cmd_push (cmd_root, 0);
+ urj_tap_cable_cx_cmd_push (cmd_root, 0);
+
+ /* Set Data Bits High Byte
+ set all to input */
+ urj_tap_cable_cx_cmd_push (cmd_root, SET_BITS_HIGH);
+ urj_tap_cable_cx_cmd_push (cmd_root, 0);
+ urj_tap_cable_cx_cmd_push (cmd_root, 0);
+ urj_tap_cable_cx_xfer (cmd_root, &imm_cmd, cable,
+ URJ_TAP_CABLE_COMPLETELY);
+
+ urj_tap_cable_generic_usbconn_done (cable);
+}
+
+
+static void
+ft2232_jtagkey_done (urj_cable_t *cable)
+{
+ params_t *params = (params_t *) cable->params;
+ urj_tap_cable_cx_cmd_root_t *cmd_root = &(params->cmd_root);
+
+ /* Set Data Bits Low Byte
+ disable output drivers */
+ urj_tap_cable_cx_cmd_queue (cmd_root, 0);
+ urj_tap_cable_cx_cmd_push (cmd_root, SET_BITS_LOW);
+ urj_tap_cable_cx_cmd_push (cmd_root, BITMASK_JTAGKEY_nOE);
+ urj_tap_cable_cx_cmd_push (cmd_root, BITMASK_JTAGKEY_nOE);
+
+ /* Set Data Bits Low Byte
+ set all to input */
+ urj_tap_cable_cx_cmd_push (cmd_root, SET_BITS_LOW);
+ urj_tap_cable_cx_cmd_push (cmd_root, BITMASK_JTAGKEY_nOE);
+ urj_tap_cable_cx_cmd_push (cmd_root, 0);
+
+ /* Set Data Bits High Byte
+ disable output drivers */
+ urj_tap_cable_cx_cmd_push (cmd_root, SET_BITS_HIGH);
+ urj_tap_cable_cx_cmd_push (cmd_root,
+ BITMASK_JTAGKEY_TRST_N_OUT
+ | BITMASK_JTAGKEY_TRST_N_OE_N
+ | BITMASK_JTAGKEY_SRST_N_OUT |
+ BITMASK_JTAGKEY_SRST_N_OE_N);
+ urj_tap_cable_cx_cmd_push (cmd_root,
+ BITMASK_JTAGKEY_TRST_N_OUT |
+ BITMASK_JTAGKEY_TRST_N_OE_N |
+ BITMASK_JTAGKEY_SRST_N_OUT |
+ BITMASK_JTAGKEY_SRST_N_OE_N);
+
+ /* Set Data Bits High Byte
+ set all to input */
+ urj_tap_cable_cx_cmd_push (cmd_root, SET_BITS_HIGH);
+ urj_tap_cable_cx_cmd_push (cmd_root,
+ BITMASK_JTAGKEY_TRST_N_OUT
+ | BITMASK_JTAGKEY_TRST_N_OE_N
+ | BITMASK_JTAGKEY_SRST_N_OUT |
+ BITMASK_JTAGKEY_SRST_N_OE_N);
+ urj_tap_cable_cx_cmd_push (cmd_root, 0);
+ urj_tap_cable_cx_xfer (cmd_root, &imm_cmd, cable,
+ URJ_TAP_CABLE_COMPLETELY);
+
+ urj_tap_cable_generic_usbconn_done (cable);
+}
+
+
+static void
+ft2232_armusbocd_done (urj_cable_t *cable)
+{
+ params_t *params = (params_t *) cable->params;
+ urj_tap_cable_cx_cmd_root_t *cmd_root = &(params->cmd_root);
+
+ /* Set Data Bits Low Byte
+ disable output drivers */
+ urj_tap_cable_cx_cmd_queue (cmd_root, 0);
+ urj_tap_cable_cx_cmd_push (cmd_root, SET_BITS_LOW);
+ urj_tap_cable_cx_cmd_push (cmd_root, BITMASK_ARMUSBOCD_nOE);
+ urj_tap_cable_cx_cmd_push (cmd_root, BITMASK_ARMUSBOCD_nOE);
+
+ /* Set Data Bits Low Byte
+ set all to input */
+ urj_tap_cable_cx_cmd_push (cmd_root, SET_BITS_LOW);
+ urj_tap_cable_cx_cmd_push (cmd_root, BITMASK_ARMUSBOCD_nOE);
+ urj_tap_cable_cx_cmd_push (cmd_root, 0);
+
+ /* Set Data Bits High Byte
+ disable output drivers */
+ urj_tap_cable_cx_cmd_push (cmd_root, SET_BITS_HIGH);
+ urj_tap_cable_cx_cmd_push (cmd_root,
+ BITMASK_ARMUSBOCD_nTRST
+ | BITMASK_ARMUSBOCD_nTRST_nOE |
+ BITMASK_ARMUSBOCD_nTSRST);
+ urj_tap_cable_cx_cmd_push (cmd_root,
+ BITMASK_ARMUSBOCD_nTRST |
+ BITMASK_ARMUSBOCD_nTRST_nOE |
+ BITMASK_ARMUSBOCD_nTSRST |
+ BITMASK_ARMUSBOCD_RED_LED);
+
+ /* Set Data Bits High Byte
+ set all to input */
+ urj_tap_cable_cx_cmd_push (cmd_root, SET_BITS_HIGH);
+ urj_tap_cable_cx_cmd_push (cmd_root,
+ BITMASK_ARMUSBOCD_nTRST
+ | BITMASK_ARMUSBOCD_nTRST_nOE |
+ BITMASK_ARMUSBOCD_nTSRST);
+ urj_tap_cable_cx_cmd_push (cmd_root, 0);
+ urj_tap_cable_cx_xfer (cmd_root, &imm_cmd, cable,
+ URJ_TAP_CABLE_COMPLETELY);
+
+ urj_tap_cable_generic_usbconn_done (cable);
+}
+
+static void
+ft2232_gnice_done (urj_cable_t *cable)
+{
+ params_t *params = (params_t *) cable->params;
+ urj_tap_cable_cx_cmd_root_t *cmd_root = &(params->cmd_root);
+
+ /* Set Data Bits Low Byte
+ disable output drivers */
+ urj_tap_cable_cx_cmd_queue (cmd_root, 0);
+ urj_tap_cable_cx_cmd_push (cmd_root, SET_BITS_LOW);
+ urj_tap_cable_cx_cmd_push (cmd_root, 0);
+ urj_tap_cable_cx_cmd_push (cmd_root, 0);
+
+ /* Set Data Bits High Byte
+ disable output drivers */
+ urj_tap_cable_cx_cmd_push (cmd_root, SET_BITS_HIGH);
+ urj_tap_cable_cx_cmd_push (cmd_root, BITMASK_GNICE_nTRST);
+ urj_tap_cable_cx_cmd_push (cmd_root,
+ BITMASK_GNICE_nTRST | BITMASK_GNICE_nLED);
+
+ /* Set Data Bits High Byte
+ set all to input */
+ urj_tap_cable_cx_cmd_push (cmd_root, SET_BITS_HIGH);
+ urj_tap_cable_cx_cmd_push (cmd_root, BITMASK_GNICE_nTRST);
+ urj_tap_cable_cx_cmd_push (cmd_root, 0);
+ urj_tap_cable_cx_xfer (cmd_root, &imm_cmd, cable,
+ URJ_TAP_CABLE_COMPLETELY);
+
+ urj_tap_cable_generic_usbconn_done (cable);
+}
+
+static void
+ft2232_oocdlinks_done (urj_cable_t *cable)
+{
+ params_t *params = (params_t *) cable->params;
+ urj_tap_cable_cx_cmd_root_t *cmd_root = &(params->cmd_root);
+
+ /* Set Data Bits Low Byte
+ set all to input */
+ urj_tap_cable_cx_cmd_queue (cmd_root, 0);
+ urj_tap_cable_cx_cmd_push (cmd_root, SET_BITS_LOW);
+ urj_tap_cable_cx_cmd_push (cmd_root, 0);
+ urj_tap_cable_cx_cmd_push (cmd_root, 0);
+
+ /* Set Data Bits High Byte
+ disable output drivers */
+ urj_tap_cable_cx_cmd_push (cmd_root, SET_BITS_HIGH);
+ urj_tap_cable_cx_cmd_push (cmd_root,
+ BITMASK_OOCDLINKS_nTRST
+ | BITMASK_OOCDLINKS_nTRST_nOE
+ | BITMASK_OOCDLINKS_nSRST |
+ BITMASK_OOCDLINKS_nSRST_nOE);
+ urj_tap_cable_cx_cmd_push (cmd_root,
+ BITMASK_OOCDLINKS_nTRST |
+ BITMASK_OOCDLINKS_nTRST_nOE |
+ BITMASK_OOCDLINKS_nSRST |
+ BITMASK_OOCDLINKS_nSRST_nOE);
+
+ /* Set Data Bits High Byte
+ set all to input */
+ urj_tap_cable_cx_cmd_push (cmd_root, SET_BITS_HIGH);
+ urj_tap_cable_cx_cmd_push (cmd_root,
+ BITMASK_OOCDLINKS_nTRST
+ | BITMASK_OOCDLINKS_nTRST_nOE
+ | BITMASK_OOCDLINKS_nSRST |
+ BITMASK_OOCDLINKS_nSRST_nOE);
+ urj_tap_cable_cx_cmd_push (cmd_root, 0);
+ urj_tap_cable_cx_xfer (cmd_root, &imm_cmd, cable,
+ URJ_TAP_CABLE_COMPLETELY);
+
+ urj_tap_cable_generic_usbconn_done (cable);
+}
+
+
+static void
+ft2232_turtelizer2_done (urj_cable_t *cable)
+{
+ params_t *params = (params_t *) cable->params;
+ urj_tap_cable_cx_cmd_root_t *cmd_root = &(params->cmd_root);
+
+ /* Set Data Bits Low Byte
+ disable output drivers */
+ urj_tap_cable_cx_cmd_queue (cmd_root, 0);
+ urj_tap_cable_cx_cmd_push (cmd_root, SET_BITS_LOW);
+ urj_tap_cable_cx_cmd_push (cmd_root, BITMASK_TURTELIZER2_nJTAGOE);
+ urj_tap_cable_cx_cmd_push (cmd_root, BITMASK_TURTELIZER2_nJTAGOE);
+
+ /* Set Data Bits Low Byte
+ set all to input */
+ urj_tap_cable_cx_cmd_push (cmd_root, SET_BITS_LOW);
+ urj_tap_cable_cx_cmd_push (cmd_root, BITMASK_TURTELIZER2_nJTAGOE);
+ urj_tap_cable_cx_cmd_push (cmd_root, 0);
+
+ /* Set Data Bits High Byte
+ switch off LEDs */
+ urj_tap_cable_cx_cmd_push (cmd_root, SET_BITS_HIGH);
+ urj_tap_cable_cx_cmd_push (cmd_root,
+ BITMASK_TURTELIZER2_nTX1LED |
+ BITMASK_TURTELIZER2_nRX1LED);
+ urj_tap_cable_cx_cmd_push (cmd_root,
+ BITMASK_TURTELIZER2_nTX1LED |
+ BITMASK_TURTELIZER2_nRX1LED);
+
+ /* Set Data Bits High Byte
+ set all to input */
+ urj_tap_cable_cx_cmd_push (cmd_root, SET_BITS_HIGH);
+ urj_tap_cable_cx_cmd_push (cmd_root, 0);
+ urj_tap_cable_cx_cmd_push (cmd_root, 0);
+ urj_tap_cable_cx_xfer (cmd_root, &imm_cmd, cable,
+ URJ_TAP_CABLE_COMPLETELY);
+
+ urj_tap_cable_generic_usbconn_done (cable);
+}
+
+
+static void
+ft2232_usbtojtagif_done (urj_cable_t *cable)
+{
+ params_t *params = (params_t *) cable->params;
+ urj_tap_cable_cx_cmd_root_t *cmd_root = &(params->cmd_root);
+
+ /* Set Data Bits Low Byte
+ set all to input */
+ urj_tap_cable_cx_cmd_queue (cmd_root, 0);
+ urj_tap_cable_cx_cmd_push (cmd_root, SET_BITS_LOW);
+ urj_tap_cable_cx_cmd_push (cmd_root,
+ BITMASK_USBTOJTAGIF_nTRST |
+ BITMASK_USBTOJTAGIF_RST);
+ urj_tap_cable_cx_cmd_push (cmd_root, 0);
+
+ /* Set Data Bits High Byte
+ disable output drivers */
+ urj_tap_cable_cx_cmd_push (cmd_root, SET_BITS_HIGH);
+ urj_tap_cable_cx_cmd_push (cmd_root,
+ BITMASK_USBTOJTAGIF_nRxLED |
+ BITMASK_USBTOJTAGIF_nTxLED);
+ urj_tap_cable_cx_cmd_push (cmd_root,
+ BITMASK_USBTOJTAGIF_nRxLED |
+ BITMASK_USBTOJTAGIF_nTxLED);
+
+ /* Set Data Bits High Byte
+ set all to input */
+ urj_tap_cable_cx_cmd_push (cmd_root, SET_BITS_HIGH);
+ urj_tap_cable_cx_cmd_push (cmd_root,
+ BITMASK_USBTOJTAGIF_nRxLED |
+ BITMASK_USBTOJTAGIF_nTxLED);
+ urj_tap_cable_cx_cmd_push (cmd_root, 0);
+ urj_tap_cable_cx_xfer (cmd_root, &imm_cmd, cable,
+ URJ_TAP_CABLE_COMPLETELY);
+
+ urj_tap_cable_generic_usbconn_done (cable);
+}
+
+
+static void
+ft2232_signalyzer_done (urj_cable_t *cable)
+{
+ params_t *params = (params_t *) cable->params;
+ urj_tap_cable_cx_cmd_root_t *cmd_root = &(params->cmd_root);
+
+ /* Set Data Bits Low Byte
+ set all to input */
+ urj_tap_cable_cx_cmd_queue (cmd_root, 0);
+ urj_tap_cable_cx_cmd_push (cmd_root, SET_BITS_LOW);
+ urj_tap_cable_cx_cmd_push (cmd_root,
+ BITMASK_SIGNALYZER_nTRST |
+ BITMASK_SIGNALYZER_nSRST);
+ urj_tap_cable_cx_cmd_push (cmd_root, 0);
+
+ /* Set Data Bits High Byte
+ disable output drivers */
+ urj_tap_cable_cx_cmd_push (cmd_root, SET_BITS_HIGH);
+ urj_tap_cable_cx_cmd_push (cmd_root,
+ BITMASK_SIGNALYZER_nTRST |
+ BITMASK_SIGNALYZER_nSRST);
+ urj_tap_cable_cx_cmd_push (cmd_root,
+ BITMASK_SIGNALYZER_nTRST |
+ BITMASK_SIGNALYZER_nSRST);
+
+ /* Set Data Bits High Byte
+ set all to input */
+ urj_tap_cable_cx_cmd_push (cmd_root, SET_BITS_HIGH);
+ urj_tap_cable_cx_cmd_push (cmd_root, 0);
+ urj_tap_cable_cx_cmd_push (cmd_root, 0);
+ urj_tap_cable_cx_xfer (cmd_root, &imm_cmd, cable,
+ URJ_TAP_CABLE_COMPLETELY);
+
+ urj_tap_cable_generic_usbconn_done (cable);
+}
+
+
+static void
+ft2232_flyswatter_done (urj_cable_t *cable)
+{
+ params_t *params = (params_t *) cable->params;
+ urj_tap_cable_cx_cmd_root_t *cmd_root = &(params->cmd_root);
+
+ /* Set Data Bits Low Byte
+ disable output drivers */
+ urj_tap_cable_cx_cmd_queue (cmd_root, 0);
+ urj_tap_cable_cx_cmd_push (cmd_root, SET_BITS_LOW);
+ urj_tap_cable_cx_cmd_push (cmd_root,
+ BITMASK_FLYSWATTER_nOE1 |
+ BITMASK_FLYSWATTER_nOE2);
+ urj_tap_cable_cx_cmd_push (cmd_root,
+ BITMASK_FLYSWATTER_nOE1 |
+ BITMASK_FLYSWATTER_nOE2);
+
+ /* Set Data Bits Low Byte
+ set all to input */
+ urj_tap_cable_cx_cmd_push (cmd_root, SET_BITS_LOW);
+ urj_tap_cable_cx_cmd_push (cmd_root,
+ BITMASK_FLYSWATTER_nOE1 |
+ BITMASK_FLYSWATTER_nOE2);
+ urj_tap_cable_cx_cmd_push (cmd_root, 0);
+
+ /* Set Data Bits High Byte
+ set all to input */
+ urj_tap_cable_cx_cmd_push (cmd_root, SET_BITS_HIGH);
+ urj_tap_cable_cx_cmd_push (cmd_root, BITMASK_FLYSWATTER_nLED2);
+ urj_tap_cable_cx_cmd_push (cmd_root, 0);
+ urj_tap_cable_cx_xfer (cmd_root, &imm_cmd, cable,
+ URJ_TAP_CABLE_COMPLETELY);
+
+ urj_tap_cable_generic_usbconn_done (cable);
+}
+
+static void
+ft2232_usbscarab2_done (urj_cable_t *cable)
+{
+ params_t *params = (params_t *) cable->params;
+ urj_tap_cable_cx_cmd_root_t *cmd_root = &(params->cmd_root);
+
+ /* Set Data Bits Low Byte
+ set all to input */
+ urj_tap_cable_cx_cmd_queue (cmd_root, 0);
+ urj_tap_cable_cx_cmd_push (cmd_root, SET_BITS_LOW);
+ urj_tap_cable_cx_cmd_push (cmd_root, 0);
+ urj_tap_cable_cx_cmd_push (cmd_root, 0);
+
+ /* Set Data Bits High Byte
+ deassert RST signals and blank LED */
+ urj_tap_cable_cx_cmd_push (cmd_root, SET_BITS_HIGH);
+ urj_tap_cable_cx_cmd_push (cmd_root, 0);
+ urj_tap_cable_cx_cmd_push (cmd_root, 0);
+
+ urj_tap_cable_cx_xfer (cmd_root, &imm_cmd, cable,
+ URJ_TAP_CABLE_COMPLETELY);
+
+ urj_tap_cable_generic_usbconn_done (cable);
+}
+
+
+static void
+ft2232_clock_schedule (urj_cable_t *cable, int tms, int tdi, int n)
+{
+ params_t *params = (params_t *) cable->params;
+ urj_tap_cable_cx_cmd_root_t *cmd_root = &(params->cmd_root);
+
+ tms = tms ? 0x7f : 0;
+ tdi = tdi ? 1 << 7 : 0;
+
+ urj_tap_cable_cx_cmd_queue (cmd_root, 0);
+ while (n > 0)
+ {
+ if (urj_tap_cable_cx_cmd_space
+ (cmd_root, URJ_USBCONN_FTDX_MAXSEND_MPSSE) < 4)
+ {
+ /* no space left for Clock Data plus Send Immediate
+ transfer queued commands to device and read receive data
+ to internal buffer */
+ urj_tap_cable_cx_xfer (cmd_root, &imm_cmd, cable,
+ URJ_TAP_CABLE_COMPLETELY);
+ urj_tap_cable_cx_cmd_queue (cmd_root, 0);
+ }
+
+ /* Clock Data to TMS/CS Pin (no Read) */
+ urj_tap_cable_cx_cmd_push (cmd_root, MPSSE_WRITE_TMS |
+ MPSSE_LSB | MPSSE_BITMODE |
+ MPSSE_WRITE_NEG);
+ if (n <= 7)
+ {
+ urj_tap_cable_cx_cmd_push (cmd_root, n - 1);
+ n = 0;
+ }
+ else
+ {
+ urj_tap_cable_cx_cmd_push (cmd_root, 7 - 1);
+ n -= 7;
+ }
+ urj_tap_cable_cx_cmd_push (cmd_root, tdi | tms);
+ }
+
+ params->signals &= ~(URJ_POD_CS_TMS | URJ_POD_CS_TDI | URJ_POD_CS_TCK);
+ if (tms)
+ params->signals |= URJ_POD_CS_TMS;
+ if (tdi)
+ params->signals |= URJ_POD_CS_TDI;
+ // if (tck) params->signals |= URJ_POD_CS_TCK;
+}
+
+
+static void
+ft2232_clock (urj_cable_t *cable, int tms, int tdi, int n)
+{
+ params_t *params = (params_t *) cable->params;
+
+ ft2232_clock_schedule (cable, tms, tdi, n);
+ urj_tap_cable_cx_xfer (&(params->cmd_root), &imm_cmd, cable,
+ URJ_TAP_CABLE_COMPLETELY);
+ params->last_tdo_valid = 0;
+}
+
+
+static void
+ft2232_get_tdo_schedule (urj_cable_t *cable)
+{
+ params_t *params = (params_t *) cable->params;
+ urj_tap_cable_cx_cmd_root_t *cmd_root = &(params->cmd_root);
+
+ /* Read Data Bits Low Byte */
+ urj_tap_cable_cx_cmd_queue (cmd_root, 1);
+ urj_tap_cable_cx_cmd_push (cmd_root, GET_BITS_LOW);
+}
+
+
+static int
+ft2232_get_tdo_finish (urj_cable_t *cable)
+{
+ params_t *params = (params_t *) cable->params;
+ int value;
+
+ value = (urj_tap_cable_cx_xfer_recv (cable) & BITMASK_TDO) ? 1 : 0;
+
+ params->last_tdo = value;
+ params->last_tdo_valid = 1;
+
+ return value;
+}
+
+
+static int
+ft2232_get_tdo (urj_cable_t *cable)
+{
+ params_t *params = (params_t *) cable->params;
+
+ ft2232_get_tdo_schedule (cable);
+ urj_tap_cable_cx_xfer (&(params->cmd_root), &imm_cmd, cable,
+ URJ_TAP_CABLE_COMPLETELY);
+ return ft2232_get_tdo_finish (cable);
+}
+
+
+static void
+ft2232_set_signal_schedule (params_t *params, int mask, int val,
+ int set_low, int set_high)
+{
+ urj_tap_cable_cx_cmd_root_t *cmd_root = &(params->cmd_root);
+
+ /* filter for supported signals */
+ mask &=
+ URJ_POD_CS_TCK | URJ_POD_CS_TDI | URJ_POD_CS_TMS | URJ_POD_CS_TRST |
+ URJ_POD_CS_RESET;
+ if (mask != 0)
+ {
+ int sigs = (params->signals & ~mask) | (val & mask);
+ uint8_t low_or = 0;
+ uint8_t low_xor = 0;
+ uint8_t high_xor = 0;
+
+ /* prepare low and high byte */
+ if (sigs & URJ_POD_CS_TCK)
+ low_or |= BITMASK_TCK;
+ if (sigs & URJ_POD_CS_TDI)
+ low_or |= BITMASK_TDI;
+ if (sigs & URJ_POD_CS_TMS)
+ low_or |= BITMASK_TMS;
+ /* TRST and RESET (SRST) are XOR'ed to the default value since
+ the right value depends on the external circuitry (inverter or not) */
+ if ((sigs & URJ_POD_CS_TRST) == 0)
+ if (params->bit_trst >= 0)
+ {
+ if (params->bit_trst < 8)
+ {
+ low_xor |= 1 << params->bit_trst;
+ }
+ else
+ {
+ high_xor |= 1 << (params->bit_trst - 8);
+ }
+ }
+ if ((sigs & URJ_POD_CS_RESET) == 0)
+ if (params->bit_reset >= 0)
+ {
+ if (params->bit_reset < 8)
+ {
+ low_xor |= 1 << params->bit_reset;
+ }
+ else
+ {
+ high_xor |= 1 << (params->bit_reset - 8);
+ }
+ }
+
+ if (set_low)
+ {
+ urj_tap_cable_cx_cmd_queue (cmd_root, 0);
+ urj_tap_cable_cx_cmd_push (cmd_root, SET_BITS_LOW);
+ urj_tap_cable_cx_cmd_push (cmd_root,
+ (params->
+ low_byte_value | low_or) ^ low_xor);
+ urj_tap_cable_cx_cmd_push (cmd_root,
+ params->low_byte_dir | BITMASK_TCK
+ | BITMASK_TDI | BITMASK_TMS);
+ }
+
+ if (set_high)
+ {
+ urj_tap_cable_cx_cmd_queue (cmd_root, 0);
+ urj_tap_cable_cx_cmd_push (cmd_root, SET_BITS_HIGH);
+ urj_tap_cable_cx_cmd_push (cmd_root,
+ params->high_byte_value ^ high_xor);
+ urj_tap_cable_cx_cmd_push (cmd_root, params->high_byte_dir);
+ }
+
+ params->signals = sigs;
+ }
+}
+
+
+static int
+ft2232_set_signal (urj_cable_t *cable, int mask, int val)
+{
+ params_t *params = (params_t *) cable->params;
+
+ int prev_sigs = params->signals;
+
+ ft2232_set_signal_schedule (params, mask, val, 1, 1);
+ urj_tap_cable_cx_xfer (&(params->cmd_root), &imm_cmd, cable,
+ URJ_TAP_CABLE_COMPLETELY);
+ params->last_tdo_valid = 0;
+
+ return prev_sigs;
+}
+
+
+static void
+ft2232_transfer_schedule (urj_cable_t *cable, int len, const char *in,
+ char *out)
+{
+ params_t *params = (params_t *) cable->params;
+ urj_tap_cable_cx_cmd_root_t *cmd_root = &(params->cmd_root);
+ int in_offset = 0;
+ int bitwise_len;
+ int chunkbytes;
+
+ /* lower TMS for transfer
+ also lower TCK to ensure correct clocking */
+ ft2232_set_signal_schedule (params, URJ_POD_CS_TCK | URJ_POD_CS_TMS, 0, 1,
+ 0);
+
+ chunkbytes = len >> 3;
+ while (chunkbytes > 0)
+ {
+ int byte_idx;
+
+ /* reduce chunkbytes to the maximum amount we can receive in one step */
+ if (out && chunkbytes > URJ_USBCONN_FTDX_MAXRECV)
+ chunkbytes = URJ_USBCONN_FTDX_MAXRECV;
+ /* reduce chunkbytes to the maximum amount that fits into one buffer
+ for performance reasons */
+ if (chunkbytes > URJ_USBCONN_FTDX_MAXSEND_MPSSE - 4)
+ chunkbytes = URJ_USBCONN_FTDX_MAXSEND_MPSSE - 4;
+ /* restrict chunkbytes to the maximum amount that can be transferred
+ for one single operation */
+ if (chunkbytes > (1 << 16))
+ chunkbytes = 1 << 16;
+
+ /***********************************************************************
+ * Step 1:
+ * Determine data shifting command (bytewise).
+ * Either with or without read
+ ***********************************************************************/
+ if (out)
+ {
+ urj_tap_cable_cx_cmd_queue (cmd_root, chunkbytes);
+ /* Clock Data Bytes In and Out LSB First
+ out on negative edge, in on positive edge */
+ urj_tap_cable_cx_cmd_push (cmd_root,
+ MPSSE_DO_READ | MPSSE_DO_WRITE |
+ MPSSE_LSB | MPSSE_WRITE_NEG);
+ }
+ else
+ {
+ urj_tap_cable_cx_cmd_queue (cmd_root, 0);
+ /* Clock Data Bytes Out on -ve Clock Edge LSB First (no Read) */
+ urj_tap_cable_cx_cmd_push (cmd_root, MPSSE_DO_WRITE |
+ MPSSE_LSB | MPSSE_WRITE_NEG);
+ }
+ /* set byte count */
+ urj_tap_cable_cx_cmd_push (cmd_root, (chunkbytes - 1) & 0xff);
+ urj_tap_cable_cx_cmd_push (cmd_root, ((chunkbytes - 1) >> 8) & 0xff);
+
+ /*********************************************************************
+ * Step 2:
+ * Write TDI data in bundles of 8 bits.
+ *********************************************************************/
+ for (byte_idx = 0; byte_idx < chunkbytes; byte_idx++)
+ {
+ int bit_idx;
+ unsigned char b = 0;
+
+ for (bit_idx = 1; bit_idx < 256; bit_idx <<= 1)
+ if (in[in_offset++])
+ b |= bit_idx;
+ urj_tap_cable_cx_cmd_push (cmd_root, b);
+ }
+
+ /* recalc chunkbytes for next round */
+ chunkbytes = (len - in_offset) >> 3;
+ }
+
+ /* determine bitwise shift amount */
+ bitwise_len = (len - in_offset) % 8;
+ if (bitwise_len > 0)
+ {
+ /***********************************************************************
+ * Step 3:
+ * Determine data shifting command (bitwise).
+ * Either with or without read
+ ***********************************************************************/
+ if (out)
+ {
+ urj_tap_cable_cx_cmd_queue (cmd_root, 1);
+ /* Clock Data Bytes In and Out LSB First
+ out on negative edge, in on positive edge */
+ urj_tap_cable_cx_cmd_push (cmd_root,
+ MPSSE_DO_READ | MPSSE_DO_WRITE |
+ MPSSE_LSB | MPSSE_BITMODE |
+ MPSSE_WRITE_NEG);
+ }
+ else
+ {
+ urj_tap_cable_cx_cmd_queue (cmd_root, 0);
+ /* Clock Data Bytes Out on -ve Clock Edge LSB First (no Read) */
+ urj_tap_cable_cx_cmd_push (cmd_root, MPSSE_DO_WRITE |
+ MPSSE_LSB | MPSSE_BITMODE |
+ MPSSE_WRITE_NEG);
+ }
+ /* determine bit count */
+ urj_tap_cable_cx_cmd_push (cmd_root, bitwise_len - 1);
+
+ /***********************************************************************
+ * Step 4:
+ * Write TDI data bitwise
+ ***********************************************************************/
+ {
+ int bit_idx;
+ unsigned char b = 0;
+ for (bit_idx = 1; bit_idx < 1 << bitwise_len; bit_idx <<= 1)
+ {
+ if (in[in_offset++])
+ b |= bit_idx;
+ }
+ urj_tap_cable_cx_cmd_push (cmd_root, b);
+ }
+ }
+
+ if (out)
+ {
+ /* Read Data Bits Low Byte to get current TDO,
+ Do this only if we'll read out data nonetheless */
+ urj_tap_cable_cx_cmd_queue (cmd_root, 1);
+ urj_tap_cable_cx_cmd_push (cmd_root, GET_BITS_LOW);
+ params->last_tdo_valid = 1;
+ }
+ else
+ params->last_tdo_valid = 0;
+}
+
+
+static int
+ft2232_transfer_finish (urj_cable_t *cable, int len, char *out)
+{
+ params_t *params = (params_t *) cable->params;
+ int bitwise_len;
+ int chunkbytes;
+ int out_offset = 0;
+
+ chunkbytes = len >> 3;
+ bitwise_len = len % 8;
+
+ if (out)
+ {
+ if (chunkbytes > 0)
+ {
+ uint32_t xferred;
+
+ /*********************************************************************
+ * Step 5:
+ * Read TDO data in bundles of 8 bits if read is requested.
+ *********************************************************************/
+ xferred = chunkbytes;
+ for (; xferred > 0; xferred--)
+ {
+ int bit_idx;
+ unsigned char b;
+
+ b = urj_tap_cable_cx_xfer_recv (cable);
+ for (bit_idx = 1; bit_idx < 256; bit_idx <<= 1)
+ out[out_offset++] = (b & bit_idx) ? 1 : 0;
+ }
+ }
+
+ if (bitwise_len > 0)
+ {
+ /***********************************************************************
+ * Step 6:
+ * Read TDO data bitwise if read is requested.
+ ***********************************************************************/
+ int bit_idx;
+ unsigned char b;
+
+ b = urj_tap_cable_cx_xfer_recv (cable);
+
+ for (bit_idx = (1 << (8 - bitwise_len)); bit_idx < 256;
+ bit_idx <<= 1)
+ out[out_offset++] = (b & bit_idx) ? 1 : 0;
+ }
+
+ /* gather current TDO */
+ params->last_tdo =
+ (urj_tap_cable_cx_xfer_recv (cable) & BITMASK_TDO) ? 1 : 0;
+ params->last_tdo_valid = 1;
+ }
+ else
+ params->last_tdo_valid = 0;
+
+ return 0;
+}
+
+
+static int
+ft2232_transfer (urj_cable_t *cable, int len, const char *in, char *out)
+{
+ params_t *params = (params_t *) cable->params;
+
+ ft2232_transfer_schedule (cable, len, in, out);
+ urj_tap_cable_cx_xfer (&(params->cmd_root), &imm_cmd, cable,
+ URJ_TAP_CABLE_COMPLETELY);
+ return ft2232_transfer_finish (cable, len, out);
+}
+
+
+static void
+ft2232_flush (urj_cable_t *cable, urj_cable_flush_amount_t how_much)
+{
+ params_t *params = (params_t *) cable->params;
+
+ if (how_much == URJ_TAP_CABLE_OPTIONALLY)
+ return;
+
+ if (cable->todo.num_items == 0)
+ urj_tap_cable_cx_xfer (&(params->cmd_root), &imm_cmd, cable,
+ how_much);
+
+ while (cable->todo.num_items > 0)
+ {
+ int i, j, n;
+ int post_signals = params->signals;
+ int last_tdo_valid_schedule = params->last_tdo_valid;
+ int last_tdo_valid_finish = params->last_tdo_valid;
+
+ for (j = i = cable->todo.next_item, n = 0; n < cable->todo.num_items;
+ n++)
+ {
+
+ switch (cable->todo.data[i].action)
+ {
+ case URJ_TAP_CABLE_CLOCK:
+ ft2232_clock_schedule (cable,
+ cable->todo.data[i].arg.clock.tms,
+ cable->todo.data[i].arg.clock.tdi,
+ cable->todo.data[i].arg.clock.n);
+ last_tdo_valid_schedule = 0;
+ break;
+
+ case URJ_TAP_CABLE_GET_TDO:
+ if (!last_tdo_valid_schedule)
+ {
+ ft2232_get_tdo_schedule (cable);
+ last_tdo_valid_schedule = 1;
+ }
+ break;
+
+ case URJ_TAP_CABLE_SET_SIGNAL:
+ ft2232_set_signal_schedule (params,
+ cable->todo.data[i].arg.value.
+ mask,
+ cable->todo.data[i].arg.value.val,
+ 1, 1);
+ last_tdo_valid_schedule = 0;
+ break;
+
+ case URJ_TAP_CABLE_TRANSFER:
+ ft2232_transfer_schedule (cable,
+ cable->todo.data[i].arg.transfer.
+ len,
+ cable->todo.data[i].arg.transfer.in,
+ cable->todo.data[i].arg.transfer.
+ out);
+ last_tdo_valid_schedule = params->last_tdo_valid;
+ break;
+
+ default:
+ break;
+ }
+
+ i++;
+ if (i >= cable->todo.max_items)
+ i = 0;
+ }
+
+ urj_tap_cable_cx_xfer (&(params->cmd_root), &imm_cmd, cable,
+ how_much);
+
+ while (j != i)
+ {
+ switch (cable->todo.data[j].action)
+ {
+ case URJ_TAP_CABLE_CLOCK:
+ {
+ post_signals &=
+ ~(URJ_POD_CS_TCK | URJ_POD_CS_TDI | URJ_POD_CS_TMS);
+ post_signals |=
+ (cable->todo.data[j].arg.clock.
+ tms ? URJ_POD_CS_TMS : 0);
+ post_signals |=
+ (cable->todo.data[j].arg.clock.
+ tdi ? URJ_POD_CS_TDI : 0);
+ params->last_tdo_valid = last_tdo_valid_finish = 0;
+ break;
+ }
+ case URJ_TAP_CABLE_GET_TDO:
+ {
+ int tdo;
+ int m;
+ if (last_tdo_valid_finish)
+ tdo = params->last_tdo;
+ else
+ tdo = ft2232_get_tdo_finish (cable);
+ last_tdo_valid_finish = params->last_tdo_valid;
+ m = urj_tap_cable_add_queue_item (cable, &(cable->done));
+ cable->done.data[m].action = URJ_TAP_CABLE_GET_TDO;
+ cable->done.data[m].arg.value.val = tdo;
+ break;
+ }
+ case URJ_TAP_CABLE_SET_SIGNAL:
+ {
+ int m =
+ urj_tap_cable_add_queue_item (cable, &(cable->done));
+ cable->done.data[m].action = URJ_TAP_CABLE_SET_SIGNAL;
+ cable->done.data[m].arg.value.mask =
+ cable->todo.data[j].arg.value.mask;
+ cable->done.data[m].arg.value.val = post_signals;
+ int mask =
+ cable->todo.data[j].arg.value.
+ mask & ~(URJ_POD_CS_TCK | URJ_POD_CS_TDI |
+ URJ_POD_CS_TMS | URJ_POD_CS_TRST |
+ URJ_POD_CS_RESET);
+ post_signals =
+ (post_signals & ~mask) | (cable->todo.data[j].arg.
+ value.val & mask);
+ }
+ case URJ_TAP_CABLE_GET_SIGNAL:
+ {
+ int m =
+ urj_tap_cable_add_queue_item (cable, &(cable->done));
+ cable->done.data[m].action = URJ_TAP_CABLE_GET_SIGNAL;
+ cable->done.data[m].arg.value.sig =
+ cable->todo.data[j].arg.value.sig;
+ cable->done.data[m].arg.value.val =
+ (post_signals & cable->todo.data[j].arg.value.
+ sig) ? 1 : 0;
+ break;
+ }
+ case URJ_TAP_CABLE_TRANSFER:
+ {
+ int r = ft2232_transfer_finish (cable,
+ cable->todo.data[j].arg.
+ transfer.len,
+ cable->todo.data[j].arg.
+ transfer.out);
+ last_tdo_valid_finish = params->last_tdo_valid;
+ free (cable->todo.data[j].arg.transfer.in);
+ if (cable->todo.data[j].arg.transfer.out)
+ {
+ int m = urj_tap_cable_add_queue_item (cable,
+ &(cable->done));
+ if (m < 0)
+ {
+ // retain error state
+ // urj_log (URJ_LOG_LEVEL_NORMAL, "out of memory!\n");
+ }
+ cable->done.data[m].action = URJ_TAP_CABLE_TRANSFER;
+ cable->done.data[m].arg.xferred.len =
+ cable->todo.data[j].arg.transfer.len;
+ cable->done.data[m].arg.xferred.res = r;
+ cable->done.data[m].arg.xferred.out =
+ cable->todo.data[j].arg.transfer.out;
+ }
+ }
+ default:
+ break;
+ }
+
+ j++;
+ if (j >= cable->todo.max_items)
+ j = 0;
+ cable->todo.num_items--;
+ }
+
+ cable->todo.next_item = i;
+ }
+}
+
+
+static int
+ft2232_connect (urj_cable_t *cable, const urj_param_t *params[])
+{
+ params_t *cable_params;
+
+ /* perform urj_tap_cable_generic_usbconn_connect */
+ if (urj_tap_cable_generic_usbconn_connect (cable, params) != URJ_STATUS_OK)
+ return URJ_STATUS_FAIL;
+
+ cable_params = malloc (sizeof (params_t));
+ if (!cable_params)
+ {
+ urj_error_set (URJ_ERROR_OUT_OF_MEMORY, _("malloc(%zd) fails"),
+ sizeof (params_t));
+ /* NOTE:
+ * Call the underlying usbport driver (*free) routine directly
+ * not urj_tap_cable_generic_usbconn_free() since it also free's cable->params
+ * (which is not established) and cable (which the caller will do)
+ */
+ cable->link.usb->driver->free (cable->link.usb);
+ return URJ_STATUS_FAIL;
+ }
+
+ cable_params->mpsse_frequency = 0;
+ cable_params->last_tdo_valid = 0;
+
+ urj_tap_cable_cx_cmd_init (&(cable_params->cmd_root));
+
+ /* exchange generic cable parameters with our private parameter set */
+ free (cable->params);
+ cable->params = cable_params;
+
+ return URJ_STATUS_OK;
+}
+
+
+static void
+ft2232_cable_free (urj_cable_t *cable)
+{
+ params_t *params = (params_t *) cable->params;
+
+ urj_tap_cable_cx_cmd_deinit (&(params->cmd_root));
+
+ urj_tap_cable_generic_usbconn_free (cable);
+}
+
+
+urj_usbconn_cable_t urj_tap_cable_usbconn_ft2232_ftdi;
+urj_usbconn_cable_t urj_tap_cable_usbconn_armusbocd_ftdi;
+urj_usbconn_cable_t urj_tap_cable_usbconn_gnice_ftdi;
+urj_usbconn_cable_t urj_tap_cable_usbconn_jtagkey_ftdi;
+urj_usbconn_cable_t urj_tap_cable_usbconn_oocdlinks_ftdi;
+urj_usbconn_cable_t urj_tap_cable_usbconn_turtelizer2_ftdi;
+urj_usbconn_cable_t urj_tap_cable_usbconn_usbtojtagif_ftdi;
+urj_usbconn_cable_t urj_tap_cable_usbconn_signalyzer_ftdi;
+urj_usbconn_cable_t urj_tap_cable_usbconn_flyswatter_ftdi;
+urj_usbconn_cable_t urj_tap_cable_usbconn_usbscarab2_ftdi;
+
+
+static void
+ft2232_usbcable_help (urj_log_level_t ll, const char *cablename)
+{
+ urj_usbconn_cable_t *conn;
+
+ conn = &urj_tap_cable_usbconn_armusbocd_ftdi;
+ if (strcasecmp (conn->name, cablename) == 0)
+ goto found;
+ conn = &urj_tap_cable_usbconn_gnice_ftdi;
+ if (strcasecmp (conn->name, cablename) == 0)
+ goto found;
+ conn = &urj_tap_cable_usbconn_jtagkey_ftdi;
+ if (strcasecmp (conn->name, cablename) == 0)
+ goto found;
+ conn = &urj_tap_cable_usbconn_oocdlinks_ftdi;
+ if (strcasecmp (conn->name, cablename) == 0)
+ goto found;
+ conn = &urj_tap_cable_usbconn_turtelizer2_ftdi;
+ if (strcasecmp (conn->name, cablename) == 0)
+ goto found;
+ conn = &urj_tap_cable_usbconn_usbtojtagif_ftdi;
+ if (strcasecmp (conn->name, cablename) == 0)
+ goto found;
+ conn = &urj_tap_cable_usbconn_signalyzer_ftdi;
+ if (strcasecmp (conn->name, cablename) == 0)
+ goto found;
+ conn = &urj_tap_cable_usbconn_flyswatter_ftdi;
+ if (strcasecmp (conn->name, cablename) == 0)
+ goto found;
+ conn = &urj_tap_cable_usbconn_usbscarab2_ftdi;
+ if (strcasecmp (conn->name, cablename) == 0)
+ goto found;
+ conn = &urj_tap_cable_usbconn_ft2232_ftdi;
+ found:
+
+ urj_log (ll,
+ _("Usage: cable %s [vid=VID] [pid=PID] [desc=DESC] [driver=DRIVER]\n"
+ "\n" "VID vendor ID (hex), defaults to %04X\n"
+ "PID product ID (hex), defaults to %04X\n"
+ "DESC Some string to match in description or serial no.\n"
+ "DRIVER usbconn driver, either ftdi-mpsse or ftd2xx-mpsse\n"
+ " defaults to %s if not specified\n" "\n"), cablename,
+ conn->vid, conn->pid, DEFAULT_DRIVER);
+}
+
+
+urj_cable_driver_t urj_tap_cable_ft2232_driver = {
+ "FT2232",
+ N_("Generic FTDI FT2232 Cable"),
+ URJ_CABLE_DEVICE_USB,
+ { .usb = ft2232_connect, },
+ urj_tap_cable_generic_disconnect,
+ ft2232_cable_free,
+ ft2232_generic_init,
+ ft2232_generic_done,
+ ft2232_set_frequency,
+ ft2232_clock,
+ ft2232_get_tdo,
+ ft2232_transfer,
+ ft2232_set_signal,
+ urj_tap_cable_generic_get_signal,
+ ft2232_flush,
+ ft2232_usbcable_help
+};
+urj_usbconn_cable_t urj_tap_cable_usbconn_ft2232_ftdi = {
+ "FT2232", /* cable name */
+ NULL, /* string pattern, not used */
+ "ftdi-mpsse", /* default usbconn driver */
+ 0x0000, /* VID */
+ 0x0000 /* PID */
+};
+urj_usbconn_cable_t urj_tap_cable_usbconn_ft2232_ftd2xx = {
+ "FT2232", /* cable name */
+ NULL, /* string pattern, not used */
+ "ftd2xx-mpsse", /* default usbconn driver */
+ 0x0000, /* VID */
+ 0x0000 /* PID */
+};
+
+urj_cable_driver_t urj_tap_cable_ft2232_armusbocd_driver = {
+ "ARM-USB-OCD",
+ N_("Olimex ARM-USB-OCD[-TINY] (FT2232) Cable"),
+ URJ_CABLE_DEVICE_USB,
+ { .usb = ft2232_connect, },
+ urj_tap_cable_generic_disconnect,
+ ft2232_cable_free,
+ ft2232_armusbocd_init,
+ ft2232_armusbocd_done,
+ ft2232_set_frequency,
+ ft2232_clock,
+ ft2232_get_tdo,
+ ft2232_transfer,
+ ft2232_set_signal,
+ urj_tap_cable_generic_get_signal,
+ ft2232_flush,
+ ft2232_usbcable_help
+};
+urj_usbconn_cable_t urj_tap_cable_usbconn_armusbocd_ftdi = {
+ "ARM-USB-OCD", /* cable name */
+ NULL, /* string pattern, not used */
+ "ftdi-mpsse", /* default usbconn driver */
+ 0x15BA, /* VID */
+ 0x0003 /* PID */
+};
+urj_usbconn_cable_t urj_tap_cable_usbconn_armusbocd_ftd2xx = {
+ "ARM-USB-OCD", /* cable name */
+ NULL, /* string pattern, not used */
+ "ftd2xx-mpsse", /* default usbconn driver */
+ 0x15BA, /* VID */
+ 0x0003 /* PID */
+};
+urj_usbconn_cable_t urj_tap_cable_usbconn_armusbocdtiny_ftdi = {
+ "ARM-USB-OCD", /* cable name */
+ NULL, /* string pattern, not used */
+ "ftdi-mpsse", /* default usbconn driver */
+ 0x15BA, /* VID */
+ 0x0004 /* PID */
+};
+urj_usbconn_cable_t urj_tap_cable_usbconn_armusbocdtiny_ftd2xx = {
+ "ARM-USB-OCD", /* cable name */
+ NULL, /* string pattern, not used */
+ "ftd2xx-mpsse", /* default usbconn driver */
+ 0x15BA, /* VID */
+ 0x0004 /* PID */
+};
+
+urj_cable_driver_t urj_tap_cable_ft2232_gnice_driver = {
+ "gnICE",
+ N_("Analog Devices Blackfin gnICE (FT2232) Cable (EXPERIMENTAL)"),
+ URJ_CABLE_DEVICE_USB,
+ { .usb = ft2232_connect, },
+ urj_tap_cable_generic_disconnect,
+ ft2232_cable_free,
+ ft2232_gnice_init,
+ ft2232_gnice_done,
+ ft2232_set_frequency,
+ ft2232_clock,
+ ft2232_get_tdo,
+ ft2232_transfer,
+ ft2232_set_signal,
+ urj_tap_cable_generic_get_signal,
+ ft2232_flush,
+ ft2232_usbcable_help
+};
+urj_usbconn_cable_t urj_tap_cable_usbconn_gnice_ftdi = {
+ "gnICE", /* cable name */
+ NULL, /* string pattern, not used */
+ "ftdi-mpsse", /* default usbconn driver */
+ 0x0456, /* VID */
+ 0xF000 /* PID */
+};
+urj_usbconn_cable_t urj_tap_cable_usbconn_gnice_ftd2xx = {
+ "gnICE", /* cable name */
+ NULL, /* string pattern, not used */
+ "ftd2xx-mpsse", /* default usbconn driver */
+ 0x0456, /* VID */
+ 0xF000 /* PID */
+};
+
+urj_cable_driver_t urj_tap_cable_ft2232_jtagkey_driver = {
+ "JTAGkey",
+ N_("Amontec JTAGkey (FT2232) Cable"),
+ URJ_CABLE_DEVICE_USB,
+ { .usb = ft2232_connect, },
+ urj_tap_cable_generic_disconnect,
+ ft2232_cable_free,
+ ft2232_jtagkey_init,
+ ft2232_jtagkey_done,
+ ft2232_set_frequency,
+ ft2232_clock,
+ ft2232_get_tdo,
+ ft2232_transfer,
+ ft2232_set_signal,
+ urj_tap_cable_generic_get_signal,
+ ft2232_flush,
+ ft2232_usbcable_help
+};
+urj_usbconn_cable_t urj_tap_cable_usbconn_jtagkey_ftdi = {
+ "JTAGkey", /* cable name */
+ NULL, /* string pattern, not used */
+ "ftdi-mpsse", /* default usbconn driver */
+ 0x0403, /* VID */
+ 0xCFF8 /* PID */
+};
+urj_usbconn_cable_t urj_tap_cable_usbconn_jtagkey_ftd2xx = {
+ "JTAGkey", /* cable name */
+ NULL, /* string pattern, not used */
+ "ftd2xx-mpsse", /* default usbconn driver */
+ 0x0403, /* VID */
+ 0xCFF8 /* PID */
+};
+
+urj_cable_driver_t urj_tap_cable_ft2232_oocdlinks_driver = {
+ "OOCDLink-s",
+ N_("OOCDLink-s (FT2232) Cable (EXPERIMENTAL)"),
+ URJ_CABLE_DEVICE_USB,
+ { .usb = ft2232_connect, },
+ urj_tap_cable_generic_disconnect,
+ ft2232_cable_free,
+ ft2232_oocdlinks_init,
+ ft2232_oocdlinks_done,
+ ft2232_set_frequency,
+ ft2232_clock,
+ ft2232_get_tdo,
+ ft2232_transfer,
+ ft2232_set_signal,
+ urj_tap_cable_generic_get_signal,
+ ft2232_flush,
+ ft2232_usbcable_help
+};
+urj_usbconn_cable_t urj_tap_cable_usbconn_oocdlinks_ftdi = {
+ "OOCDLink-s", /* cable name */
+ NULL, /* string pattern, not used */
+ "ftdi-mpsse", /* default usbconn driver */
+ 0x0403, /* VID */
+ 0xbaf8 /* PID */
+};
+urj_usbconn_cable_t urj_tap_cable_usbconn_oocdlinks_ftd2xx = {
+ "OOCDLink-s", /* cable name */
+ NULL, /* string pattern, not used */
+ "ftd2xx-mpsse", /* default usbconn driver */
+ 0x0403, /* VID */
+ 0xbaf8 /* PID */
+};
+
+urj_cable_driver_t urj_tap_cable_ft2232_turtelizer2_driver = {
+ "Turtelizer2",
+ N_("Turtelizer 2 Rev. B (FT2232) Cable (EXPERIMENTAL)"),
+ URJ_CABLE_DEVICE_USB,
+ { .usb = ft2232_connect, },
+ urj_tap_cable_generic_disconnect,
+ ft2232_cable_free,
+ ft2232_turtelizer2_init,
+ ft2232_turtelizer2_done,
+ ft2232_set_frequency,
+ ft2232_clock,
+ ft2232_get_tdo,
+ ft2232_transfer,
+ ft2232_set_signal,
+ urj_tap_cable_generic_get_signal,
+ ft2232_flush,
+ ft2232_usbcable_help
+};
+urj_usbconn_cable_t urj_tap_cable_usbconn_turtelizer2_ftdi = {
+ "Turtelizer2", /* cable name */
+ NULL, /* string pattern, not used */
+ "ftdi-mpsse", /* default usbconn driver */
+ 0x0403, /* VID */
+ 0xBDC8 /* PID */
+};
+urj_usbconn_cable_t urj_tap_cable_usbconn_turtelizer2_ftd2xx = {
+ "Turtelizer2", /* cable name */
+ NULL, /* string pattern, not used */
+ "ftd2xx-mpsse", /* default usbconn driver */
+ 0x0403, /* VID */
+ 0xBDC8 /* PID */
+};
+
+urj_cable_driver_t urj_tap_cable_ft2232_usbtojtagif_driver = {
+ "USB-to-JTAG-IF",
+ N_("USB to JTAG Interface (FT2232) Cable (EXPERIMENTAL)"),
+ URJ_CABLE_DEVICE_USB,
+ { .usb = ft2232_connect, },
+ urj_tap_cable_generic_disconnect,
+ ft2232_cable_free,
+ ft2232_usbtojtagif_init,
+ ft2232_usbtojtagif_done,
+ ft2232_set_frequency,
+ ft2232_clock,
+ ft2232_get_tdo,
+ ft2232_transfer,
+ ft2232_set_signal,
+ urj_tap_cable_generic_get_signal,
+ ft2232_flush,
+ ft2232_usbcable_help
+};
+urj_usbconn_cable_t urj_tap_cable_usbconn_usbtojtagif_ftdi = {
+ "USB-to-JTAG-IF", /* cable name */
+ NULL, /* string pattern, not used */
+ "ftdi-mpsse", /* default usbconn driver */
+ 0x0000, /* VID */
+ 0x0000 /* PID */
+};
+urj_usbconn_cable_t urj_tap_cable_usbconn_usbtojtagif_ftd2xx = {
+ "USB-to-JTAG-IF", /* cable name */
+ NULL, /* string pattern, not used */
+ "ftd2xx-mpsse", /* default usbconn driver */
+ 0x0000, /* VID */
+ 0x0000 /* PID */
+};
+
+urj_cable_driver_t urj_tap_cable_ft2232_signalyzer_driver = {
+ "Signalyzer",
+ N_("Xverve DT-USB-ST Signalyzer Tool (FT2232) Cable (EXPERIMENTAL)"),
+ URJ_CABLE_DEVICE_USB,
+ { .usb = ft2232_connect, },
+ urj_tap_cable_generic_disconnect,
+ ft2232_cable_free,
+ ft2232_signalyzer_init,
+ ft2232_signalyzer_done,
+ ft2232_set_frequency,
+ ft2232_clock,
+ ft2232_get_tdo,
+ ft2232_transfer,
+ ft2232_set_signal,
+ urj_tap_cable_generic_get_signal,
+ ft2232_flush,
+ ft2232_usbcable_help
+};
+urj_usbconn_cable_t urj_tap_cable_usbconn_signalyzer_ftdi = {
+ "Signalyzer", /* cable name */
+ NULL, /* string pattern, not used */
+ "ftdi-mpsse", /* default usbconn driver */
+ 0x0000, /* VID */
+ 0x0000 /* PID */
+};
+urj_usbconn_cable_t urj_tap_cable_usbconn_signalyzer_ftd2xx = {
+ "Signalyzer", /* cable name */
+ NULL, /* string pattern, not used */
+ "ftd2xx-mpsse", /* default usbconn driver */
+ 0x0000, /* VID */
+ 0x0000 /* PID */
+};
+
+urj_cable_driver_t urj_tap_cable_ft2232_flyswatter_driver = {
+ "Flyswatter",
+ N_("TinCanTools Flyswatter (FT2232) Cable"),
+ URJ_CABLE_DEVICE_USB,
+ { .usb = ft2232_connect, },
+ urj_tap_cable_generic_disconnect,
+ ft2232_cable_free,
+ ft2232_flyswatter_init,
+ ft2232_flyswatter_done,
+ ft2232_set_frequency,
+ ft2232_clock,
+ ft2232_get_tdo,
+ ft2232_transfer,
+ ft2232_set_signal,
+ urj_tap_cable_generic_get_signal,
+ ft2232_flush,
+ ft2232_usbcable_help
+};
+urj_usbconn_cable_t urj_tap_cable_usbconn_flyswatter_ftdi = {
+ "Flyswatter", /* cable name */
+ NULL, /* string pattern, not used */
+ "ftdi-mpsse", /* default usbconn driver */
+ 0x0403, /* VID */
+ 0x6010 /* PID */
+};
+urj_usbconn_cable_t urj_tap_cable_usbconn_flyswatter_ftd2xx = {
+ "Flyswatter", /* cable name */
+ NULL, /* string pattern, not used */
+ "ftd2xx-mpsse", /* default usbconn driver */
+ 0x0403, /* VID */
+ 0x6010 /* PID */
+};
+
+urj_cable_driver_t urj_tap_cable_ft2232_usbscarab2_driver = {
+ "usbScarab2",
+ N_("KrisTech usbScarabeus2 (FT2232) Cable"),
+ URJ_CABLE_DEVICE_USB,
+ { .usb = ft2232_connect, },
+ urj_tap_cable_generic_disconnect,
+ ft2232_cable_free,
+ ft2232_usbscarab2_init,
+ ft2232_usbscarab2_done,
+ ft2232_set_frequency,
+ ft2232_clock,
+ ft2232_get_tdo,
+ ft2232_transfer,
+ ft2232_set_signal,
+ urj_tap_cable_generic_get_signal,
+ ft2232_flush,
+ ft2232_usbcable_help
+};
+urj_usbconn_cable_t urj_tap_cable_usbconn_usbscarab2_ftdi = {
+ "usbScarab2", /* cable name */
+ "usbScarab2", /* string pattern, not used */
+ "ftdi-mpsse", /* default usbconn driver */
+ 0x0403, /* VID */
+ 0xbbe0 /* PID */
+};
+urj_usbconn_cable_t urj_tap_cable_usbconn_usbscarab2_ftd2xx = {
+ "usbScarab2", /* cable name */
+ "usbScarab2", /* string pattern, not used */
+ "ftd2xx-mpsse", /* default usbconn driver */
+ 0x0403, /* VID */
+ 0xbbe0 /* PID */
+};
+
+
+/*
+ Local Variables:
+ mode:C
+ c-default-style:gnu
+ indent-tabs-mode:nil
+ End:
+*/
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2003 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2003.
+ *
+ */
+
+#include <sysdep.h>
+
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+#include <assert.h>
+#include <math.h>
+
+#include <urjtag/cable.h>
+#include <urjtag/parport.h>
+#include <urjtag/chain.h>
+#include <urjtag/fclock.h>
+
+#include "generic.h"
+
+#include <urjtag/cmd.h>
+
+
+#ifndef HAVE_FMAX
+/* workaround for libm implementations that don't provide the fmax() function */
+#define fmax(_f1_,_f2_) ( (_f1_) > (_f2_) ? (_f1_) : (_f2_) )
+#endif
+
+
+static void
+print_vector (urj_log_level_t ll, int len, char *vec)
+{
+ int i;
+ for (i = 0; i < len; i++)
+ urj_log (ll, "%c", vec[i] ? '1' : '0');
+}
+
+
+void
+urj_tap_cable_generic_disconnect (urj_cable_t *cable)
+{
+ urj_tap_cable_done (cable);
+ urj_tap_chain_disconnect (cable->chain);
+}
+
+int
+urj_tap_cable_generic_transfer (urj_cable_t *cable, int len, const char *in,
+ char *out)
+{
+ int i;
+
+ if (out)
+ for (i = 0; i < len; i++)
+ {
+ out[i] = cable->driver->get_tdo (cable);
+ cable->driver->clock (cable, 0, in[i], 1);
+ }
+ else
+ for (i = 0; i < len; i++)
+ {
+ cable->driver->clock (cable, 0, in[i], 1);
+ }
+
+ return i;
+}
+
+int
+urj_tap_cable_generic_get_signal (urj_cable_t *cable, urj_pod_sigsel_t sig)
+{
+ return (((PARAM_SIGNALS (cable)) & sig) != 0) ? 1 : 0;
+}
+
+static int
+do_one_queued_action (urj_cable_t *cable)
+{
+ int i;
+
+ urj_log (URJ_LOG_LEVEL_DETAIL, "do_one_queued\n");
+
+ if ((i = urj_tap_cable_get_queue_item (cable, &(cable->todo))) >= 0)
+ {
+ int j;
+
+ if (cable->done.num_items >= cable->done.max_items)
+ {
+ if (cable->todo.data[i].action == URJ_TAP_CABLE_GET_TDO
+ || cable->todo.data[i].action == URJ_TAP_CABLE_GET_SIGNAL
+ || cable->todo.data[i].action == URJ_TAP_CABLE_TRANSFER)
+ {
+ urj_error_set (URJ_ERROR_OUT_OF_BOUNDS,
+ _("No space in cable activity results queue"));
+ urj_tap_cable_purge_queue (&(cable->done), 1);
+ /* @@@@ RFHH shouldn't we bail out? */
+ }
+ }
+
+ switch (cable->todo.data[i].action)
+ {
+ case URJ_TAP_CABLE_CLOCK:
+ cable->driver->clock (cable,
+ cable->todo.data[i].arg.clock.tms,
+ cable->todo.data[i].arg.clock.tdi,
+ cable->todo.data[i].arg.clock.n);
+ break;
+ case URJ_TAP_CABLE_SET_SIGNAL:
+ urj_tap_cable_set_signal (cable,
+ cable->todo.data[i].arg.value.sig,
+ cable->todo.data[i].arg.value.val);
+ break;
+ case URJ_TAP_CABLE_TRANSFER:
+ {
+ /* @@@@ RFHH check result */
+ int r = cable->driver->transfer (cable,
+ cable->todo.data[i].arg.
+ transfer.len,
+ cable->todo.data[i].arg.
+ transfer.in,
+ cable->todo.data[i].arg.
+ transfer.out);
+
+ free (cable->todo.data[i].arg.transfer.in);
+ if (cable->todo.data[i].arg.transfer.out != NULL)
+ {
+ /* @@@@ RFHH check result */
+ j = urj_tap_cable_add_queue_item (cable, &(cable->done));
+ urj_log (URJ_LOG_LEVEL_DETAIL,
+ "add result from transfer to %p.%d (out=%p)\n",
+ &(cable->done), j,
+ cable->todo.data[i].arg.transfer.out);
+ cable->done.data[j].action = URJ_TAP_CABLE_TRANSFER;
+ cable->done.data[j].arg.xferred.len =
+ cable->todo.data[i].arg.transfer.len;
+ cable->done.data[j].arg.xferred.res = r;
+ cable->done.data[j].arg.xferred.out =
+ cable->todo.data[i].arg.transfer.out;
+ }
+ break;
+ }
+ case URJ_TAP_CABLE_GET_TDO:
+ /* @@@@ RFHH check result */
+ j = urj_tap_cable_add_queue_item (cable, &(cable->done));
+ urj_log (URJ_LOG_LEVEL_DETAIL,
+ "add result from get_tdo to %p.%d\n", &(cable->done), j);
+ cable->done.data[j].action = URJ_TAP_CABLE_GET_TDO;
+ cable->done.data[j].arg.value.val =
+ cable->driver->get_tdo (cable);
+ break;
+ case URJ_TAP_CABLE_GET_SIGNAL:
+ /* @@@@ RFHH check result */
+ j = urj_tap_cable_add_queue_item (cable, &(cable->done));
+ urj_log (URJ_LOG_LEVEL_DETAIL,
+ "add result from get_signal to %p.%d\n", &(cable->done),
+ j);
+ cable->done.data[j].action = URJ_TAP_CABLE_GET_SIGNAL;
+ cable->done.data[j].arg.value.sig =
+ cable->todo.data[i].arg.value.sig;
+ cable->done.data[j].arg.value.val =
+ cable->driver->get_signal (cable,
+ cable->todo.data[i].arg.value.sig);
+ break;
+ }
+ urj_log (URJ_LOG_LEVEL_DETAIL, "do_one_queued done\n");
+
+ return 1;
+ }
+ urj_log (URJ_LOG_LEVEL_DETAIL, "do_one_queued abort\n");
+
+ return 0;
+}
+
+void
+urj_tap_cable_generic_flush_one_by_one (urj_cable_t *cable,
+ urj_cable_flush_amount_t how_much)
+{
+ /* This will flush always, even if how_much == URJ_TAP_CABLE_OPTIONALLY,
+ * because there is no reason to let the queue grow */
+
+ while (do_one_queued_action (cable));
+}
+
+void
+urj_tap_cable_generic_flush_using_transfer (urj_cable_t *cable,
+ urj_cable_flush_amount_t how_much)
+{
+ int i, j, n;
+ char *in, *out;
+
+ if (how_much == URJ_TAP_CABLE_OPTIONALLY)
+ return;
+
+ if (cable->todo.num_items == 0)
+ return;
+
+ do
+ {
+ int r, bits = 0, tdo = 0;
+
+ urj_log (URJ_LOG_LEVEL_DETAIL, "flush(%d)\n", cable->todo.num_items);
+
+ /* Combine as much as possible into transfer() */
+
+ /* Step 1: Count clocks. Can do only clock(TMS=0), get_tdo, transfer */
+
+ for (i = cable->todo.next_item, n = 0; n < cable->todo.num_items; n++)
+ {
+ if (cable->todo.data[i].action != URJ_TAP_CABLE_CLOCK
+ && cable->todo.data[i].action != URJ_TAP_CABLE_TRANSFER
+ && cable->todo.data[i].action != URJ_TAP_CABLE_GET_TDO)
+ {
+ urj_log (URJ_LOG_LEVEL_DETAIL,
+ "cutoff at n=%d because action unsuitable for transfer\n",
+ n);
+ break;
+ }
+ if (cable->todo.data[i].action == URJ_TAP_CABLE_CLOCK
+ && cable->todo.data[i].arg.clock.tms != 0)
+ {
+ urj_log (URJ_LOG_LEVEL_DETAIL,
+ "cutoff at n=%d because clock.tms=1 is unsuitable for transfer\n",
+ n);
+ break;
+ }
+ if (cable->todo.data[i].action == URJ_TAP_CABLE_CLOCK)
+ {
+ int k = cable->todo.data[i].arg.clock.n;
+ urj_log (URJ_LOG_LEVEL_DETAIL, "%d clock(s)\n", k);
+ bits += k;
+ }
+ else if (cable->todo.data[i].action == URJ_TAP_CABLE_TRANSFER)
+ {
+ int k = cable->todo.data[i].arg.transfer.len;
+ urj_log (URJ_LOG_LEVEL_DETAIL, "%d transfer\n", k);
+ bits += k;
+ }
+ i++;
+ if (i >= cable->todo.max_items)
+ i = 0;
+ }
+
+ urj_log (URJ_LOG_LEVEL_DETAIL, "%d combined into one (%d bits)\n",
+ n, bits);
+
+ if (bits == 0 || n <= 1)
+ {
+ do_one_queued_action (cable);
+ }
+ else
+ {
+ /* Step 2: Combine into single transfer. */
+
+ in = malloc (bits);
+ out = malloc (bits);
+
+ if (in == NULL || out == NULL)
+ {
+ /* @@@@ RFHH free(NULL) is correct */
+ if (in != NULL)
+ free (in);
+ if (out != NULL)
+ free (out);
+ urj_tap_cable_generic_flush_one_by_one (cable, how_much);
+ break;
+ }
+
+ for (j = 0, bits = 0, i = cable->todo.next_item; j < n; j++)
+ {
+ if (cable->todo.data[i].action == URJ_TAP_CABLE_CLOCK)
+ {
+ int k;
+ for (k = 0; k < cable->todo.data[i].arg.clock.n; k++)
+ in[bits++] = cable->todo.data[i].arg.clock.tdi;
+ }
+ else if (cable->todo.data[i].action == URJ_TAP_CABLE_TRANSFER)
+ {
+ int len = cable->todo.data[i].arg.transfer.len;
+ if (len > 0)
+ {
+ memcpy (in + bits,
+ cable->todo.data[i].arg.transfer.in, len);
+ bits += len;
+ }
+ }
+ i++;
+ if (i >= cable->todo.max_items)
+ i = 0;
+ }
+
+ /* Step 3: Do the transfer */
+
+ /* @@@@ RFHH check result */
+ r = cable->driver->transfer (cable, bits, in, out);
+ urj_log (URJ_LOG_LEVEL_DETAIL, "in: ");
+ print_vector (URJ_LOG_LEVEL_DETAIL, bits, in);
+ urj_log (URJ_LOG_LEVEL_DETAIL, "\n");
+ // @@@@ RFHH here always: out != NULL
+ if (out)
+ {
+ urj_log (URJ_LOG_LEVEL_DETAIL, "out: ");
+ print_vector (URJ_LOG_LEVEL_DETAIL, bits, out);
+ urj_log (URJ_LOG_LEVEL_DETAIL, "\n");
+ }
+
+ /* Step 4: Pick results from transfer */
+
+ for (j = 0, bits = 0, i = cable->todo.next_item; j < n; j++)
+ {
+ if (cable->todo.data[i].action == URJ_TAP_CABLE_CLOCK)
+ {
+ int k;
+ for (k = 0; k < cable->todo.data[i].arg.clock.n; k++)
+ tdo = out[bits++];
+ }
+ else if (cable->todo.data[i].action == URJ_TAP_CABLE_GET_TDO)
+ {
+ int c = urj_tap_cable_add_queue_item (cable,
+ &(cable->done));
+ urj_log (URJ_LOG_LEVEL_DETAIL,
+ "add result from transfer to %p.%d\n",
+ &(cable->done), c);
+ cable->done.data[c].action = URJ_TAP_CABLE_GET_TDO;
+ cable->done.data[c].arg.value.val = tdo;
+ }
+ else if (cable->todo.data[i].action == URJ_TAP_CABLE_TRANSFER)
+ {
+ char *p = cable->todo.data[i].arg.transfer.out;
+ int len = cable->todo.data[i].arg.transfer.len;
+ free (cable->todo.data[i].arg.transfer.in);
+ if (p != NULL)
+ {
+ int c = urj_tap_cable_add_queue_item (cable,
+ &(cable->done));
+ urj_log (URJ_LOG_LEVEL_DETAIL,
+ "add result from transfer to %p.%d\n",
+ &(cable->done), c);
+ cable->done.data[c].action = URJ_TAP_CABLE_TRANSFER;
+ cable->done.data[c].arg.xferred.len = len;
+ cable->done.data[c].arg.xferred.res = r;
+ cable->done.data[c].arg.xferred.out = p;
+ if (len > 0)
+ memcpy (p, out + bits, len);
+ }
+ if (len > 0)
+ bits += len;
+ if (bits > 0)
+ tdo = out[bits - 1];
+ }
+ i++;
+ if (i >= cable->todo.max_items)
+ i = 0;
+ }
+
+ cable->todo.next_item = i;
+ cable->todo.num_items -= n;
+
+ free (in);
+ free (out);
+ }
+ }
+ while (cable->todo.num_items > 0);
+}
+
+void
+urj_tap_cable_generic_set_frequency (urj_cable_t *cable,
+ uint32_t new_frequency)
+{
+ if (new_frequency == 0)
+ {
+ cable->delay = 0;
+ cable->frequency = 0;
+ }
+ else
+ {
+ const double tolerance = 0.1;
+ uint32_t loops = 2048;
+ uint32_t delay = cable->delay;
+ uint32_t frequency = cable->frequency;
+
+ if (new_frequency > (1.0 - tolerance) * frequency &&
+ new_frequency < (1.0 + tolerance) * frequency)
+ return;
+
+ urj_log (URJ_LOG_LEVEL_NORMAL,
+ "requested frequency %lu, now calibrating delay loop\n",
+ (long unsigned) new_frequency);
+
+ while (1)
+ {
+ uint32_t i, new_delay;
+ long double start, end, real_frequency;
+
+ cable->delay = delay;
+ start = urj_lib_frealtime ();
+ for (i = 0; i < loops; ++i)
+ {
+ cable->driver->clock (cable, 0, 0, 1);
+ }
+ end = urj_lib_frealtime ();
+
+ if (end < start)
+ {
+ urj_log (URJ_LOG_LEVEL_ERROR,
+ _("calibration error, wall clock is not monotonically increasing\n"));
+ break;
+ }
+ if (end == start)
+ {
+ /* retry with higher loop count
+ if the timer is not fine grained enough */
+ loops *= 2;
+ continue;
+ }
+ real_frequency = (long double) loops / (end - start);
+ urj_log (URJ_LOG_LEVEL_NORMAL,
+ "new real frequency %Lg, delay %lu\n",
+ real_frequency, (long unsigned) delay);
+
+ new_delay = (long double) delay *real_frequency / new_frequency;
+
+ if (real_frequency >= (1.0 - tolerance) * new_frequency)
+ {
+ if (real_frequency <= (1.0 + tolerance) * new_frequency)
+ {
+ frequency = real_frequency;
+ break;
+ }
+ if (new_delay > delay)
+ {
+ delay = new_delay;
+ }
+ else
+ {
+ delay++;
+ }
+
+ }
+ else
+ {
+ if (delay == 0)
+ {
+ urj_log (URJ_LOG_LEVEL_NORMAL, "operating without delay\n");
+ frequency = real_frequency;
+ break;
+ }
+
+ if (new_delay < delay)
+ {
+ delay = new_delay;
+ }
+ else
+ {
+ if (delay > 0)
+ delay--;
+ }
+ }
+ }
+
+ urj_log (URJ_LOG_LEVEL_NORMAL, "done\n");
+
+ cable->delay = delay;
+ cable->frequency = frequency;
+ }
+}
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2003 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2003.
+ *
+ */
+
+#ifndef URJ_TAP_CABLE_GENERIC_H
+#define URJ_TAP_CABLE_GENERIC_H
+
+#include <urjtag/cable.h>
+#include <urjtag/parport.h>
+
+typedef struct
+{
+ int signals;
+} urj_tap_cable_generic_params_t;
+
+#define PARAM_SIGNALS(cable) ((urj_tap_cable_generic_params_t *) (cable)->params)->signals
+
+void urj_tap_cable_generic_disconnect (urj_cable_t *cable);
+void urj_tap_cable_generic_set_frequency (urj_cable_t *cable,
+ uint32_t new_freq);
+/** @return number of clocks on success; -1 on error */
+int urj_tap_cable_generic_transfer (urj_cable_t *cable, int len, const char *in,
+ char *out);
+int urj_tap_cable_generic_get_signal (urj_cable_t *cable,
+ urj_pod_sigsel_t sig);
+void urj_tap_cable_generic_flush_one_by_one (urj_cable_t *cable,
+ urj_cable_flush_amount_t hm);
+void urj_tap_cable_generic_flush_using_transfer (urj_cable_t *cable,
+ urj_cable_flush_amount_t hm);
+
+#endif /* URJ_TAP_CABLE_GENERIC_H */
--- /dev/null
+/*
+ * $Id: generic.c 1003 2008-02-10 10:00:30Z kawk $
+ *
+ * Copyright (C) 2003 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2003.
+ *
+ */
+
+#include <sysdep.h>
+
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+
+#include <urjtag/cable.h>
+#include <urjtag/chain.h>
+#include <urjtag/parport.h>
+
+#include <urjtag/cmd.h>
+
+#include "generic.h"
+#include "generic_parport.h"
+
+#ifdef UNUSED // @@@@ RFHH
+static void
+print_vector (urj_log_level_t ll, int len, char *vec)
+{
+ int i;
+ for (i = 0; i < len; i++)
+ urj_log (ll, "%c", vec[i] ? '1' : '0');
+}
+#endif
+
+int
+urj_tap_cable_generic_parport_connect (urj_cable_t *cable,
+ urj_cable_parport_devtype_t devtype,
+ const char *devname,
+ const urj_param_t *params[])
+{
+ urj_tap_cable_generic_params_t *cable_params;
+ urj_parport_t *port;
+ int i;
+
+ if (urj_param_num (params) > 0)
+ {
+ urj_error_set (URJ_ERROR_SYNTAX, _("extra arguments"));
+ return URJ_STATUS_FAIL;
+ }
+
+ /* search parport driver list */
+ for (i = 0; urj_tap_parport_drivers[i]; i++)
+ if (devtype == urj_tap_parport_drivers[i]->type)
+ break;
+ if (!urj_tap_parport_drivers[i])
+ {
+ urj_error_set (URJ_ERROR_NOTFOUND, _("Unknown port type: %s"),
+ urj_cable_parport_devtype_string(devtype));
+ return URJ_STATUS_FAIL;
+ }
+
+ /* set up parport driver */
+ port = urj_tap_parport_drivers[i]->connect (devname);
+
+ if (port == NULL)
+ {
+ // retain error state
+ return URJ_STATUS_FAIL;
+ }
+
+ cable_params = malloc (sizeof *cable_params);
+ if (!cable_params)
+ {
+ urj_error_set (URJ_ERROR_OUT_OF_MEMORY, _("malloc(%zd) fails"),
+ sizeof *cable_params);
+ urj_tap_parport_drivers[i]->parport_free (port);
+ return URJ_STATUS_FAIL;
+ }
+
+ cable->link.port = port;
+ cable->params = cable_params;
+ cable->chain = NULL;
+
+ return URJ_STATUS_OK;
+}
+
+void
+urj_tap_cable_generic_parport_free (urj_cable_t *cable)
+{
+ cable->link.port->driver->parport_free (cable->link.port);
+ free (cable->params);
+ free (cable);
+}
+
+void
+urj_tap_cable_generic_parport_done (urj_cable_t *cable)
+{
+ urj_tap_parport_close (cable->link.port);
+}
+
+void
+urj_tap_cable_generic_parport_help (urj_log_level_t ll, const char *cablename)
+{
+ urj_log (ll,
+ _("Usage: cable %s parallel PORTADDR\n"
+#if ENABLE_LOWLEVEL_PPDEV
+ " or: cable %s ppdev PPDEV\n"
+#endif
+#if HAVE_DEV_PPBUS_PPI_H
+ " or: cable %s ppi PPIDEV\n"
+#endif
+ "\n" "PORTADDR parallel port address (e.g. 0x378)\n"
+#if ENABLE_LOWLEVEL_PPDEV
+ "PPDEV ppdev device (e.g. /dev/parport0)\n"
+#endif
+#if HAVE_DEV_PPBUS_PPI_H
+ "PPIDEF ppi device (e.g. /dev/ppi0)\n"
+#endif
+ "\n"),
+#if ENABLE_LOWLEVEL_PPDEV
+ cablename,
+#endif
+#if HAVE_DEV_PPBUS_PPI_H
+ cablename,
+#endif
+ cablename);
+}
--- /dev/null
+/*
+ * $Id: generic.h 1002 2008-02-10 09:50:59Z kawk $
+ *
+ * Copyright (C) 2003 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2003.
+ *
+ */
+
+#ifndef URJ_TAP_CABLE_GENERIC_PARPORT_H
+#define URJ_TAP_CABLE_GENERIC_PARPORT_H
+
+#include <urjtag/cable.h>
+#include <urjtag/parport.h>
+
+int urj_tap_cable_generic_parport_connect (urj_cable_t *cable,
+ urj_cable_parport_devtype_t devtype,
+ const char *devname,
+ const urj_param_t *params[]);
+void urj_tap_cable_generic_parport_free (urj_cable_t *cable);
+void urj_tap_cable_generic_parport_done (urj_cable_t *cable);
+void urj_tap_cable_generic_parport_help (urj_log_level_t ll, const char *name);
+
+#endif /* URJ_TAP_CABLE_GENERIC_H */
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2003 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2003.
+ *
+ */
+
+#include <sysdep.h>
+
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+
+#include <urjtag/cable.h>
+#include <urjtag/chain.h>
+#include "generic.h"
+#include "generic_usbconn.h"
+
+#include <urjtag/cmd.h>
+
+/* @@@@ RFHH put these in a .h file */
+#ifdef ENABLE_CABLE_XPC
+extern urj_usbconn_cable_t urj_tap_cable_usbconn_xpc_int;
+extern urj_usbconn_cable_t urj_tap_cable_usbconn_xpc_ext;
+#endif
+#ifdef ENABLE_CABLE_JLINK
+extern urj_usbconn_cable_t urj_tap_cable_usbconn_jlink;
+#endif
+#ifdef ENABLE_CABLE_FT2232
+#ifdef ENABLE_LOWLEVEL_FTD2XX
+extern urj_usbconn_cable_t urj_tap_cable_usbconn_ft2232_ftd2xx;
+extern urj_usbconn_cable_t urj_tap_cable_usbconn_armusbocd_ftd2xx;
+extern urj_usbconn_cable_t urj_tap_cable_usbconn_armusbocdtiny_ftd2xx;
+extern urj_usbconn_cable_t urj_tap_cable_usbconn_gnice_ftd2xx;
+extern urj_usbconn_cable_t urj_tap_cable_usbconn_jtagkey_ftd2xx;
+extern urj_usbconn_cable_t urj_tap_cable_usbconn_oocdlinks_ftd2xx;
+extern urj_usbconn_cable_t urj_tap_cable_usbconn_turtelizer2_ftd2xx;
+extern urj_usbconn_cable_t urj_tap_cable_usbconn_usbtojtagif_ftd2xx;
+extern urj_usbconn_cable_t urj_tap_cable_usbconn_signalyzer_ftd2xx;
+extern urj_usbconn_cable_t urj_tap_cable_usbconn_flyswatter_ftd2xx;
+extern urj_usbconn_cable_t urj_tap_cable_usbconn_usbscarab2_ftd2xx;
+#endif
+#ifdef ENABLE_LOWLEVEL_FTDI
+extern urj_usbconn_cable_t urj_tap_cable_usbconn_ft2232_ftdi;
+extern urj_usbconn_cable_t urj_tap_cable_usbconn_armusbocd_ftdi;
+extern urj_usbconn_cable_t urj_tap_cable_usbconn_armusbocdtiny_ftdi;
+extern urj_usbconn_cable_t urj_tap_cable_usbconn_gnice_ftdi;
+extern urj_usbconn_cable_t urj_tap_cable_usbconn_jtagkey_ftdi;
+extern urj_usbconn_cable_t urj_tap_cable_usbconn_oocdlinks_ftdi;
+extern urj_usbconn_cable_t urj_tap_cable_usbconn_turtelizer2_ftdi;
+extern urj_usbconn_cable_t urj_tap_cable_usbconn_usbtojtagif_ftdi;
+extern urj_usbconn_cable_t urj_tap_cable_usbconn_signalyzer_ftdi;
+extern urj_usbconn_cable_t urj_tap_cable_usbconn_flyswatter_ftdi;
+extern urj_usbconn_cable_t urj_tap_cable_usbconn_usbscarab2_ftdi;
+#endif
+#endif
+#ifdef ENABLE_CABLE_USBBLASTER
+#ifdef ENABLE_LOWLEVEL_FTD2XX
+extern urj_usbconn_cable_t urj_tap_cable_usbconn_usbblaster_ftd2xx;
+extern urj_usbconn_cable_t urj_tap_cable_usbconn_cubic_cyclonium_ftd2xx;
+extern urj_usbconn_cable_t urj_tap_cable_usbconn_nios_eval_ftd2xx;
+extern urj_usbconn_cable_t urj_tap_cable_usbconn_usb_jtag_ftd2xx;
+#endif
+#ifdef ENABLE_LOWLEVEL_FTDI
+extern urj_usbconn_cable_t urj_tap_cable_usbconn_usbblaster_ftdi;
+extern urj_usbconn_cable_t urj_tap_cable_usbconn_cubic_cyclonium_ftdi;
+extern urj_usbconn_cable_t urj_tap_cable_usbconn_nios_eval_ftdi;
+extern urj_usbconn_cable_t urj_tap_cable_usbconn_usb_jtag_ftdi;
+#endif
+#endif
+
+urj_usbconn_cable_t *urj_tap_cable_usbconn_cables[] = {
+#ifdef ENABLE_CABLE_XPC
+ &urj_tap_cable_usbconn_xpc_int,
+ &urj_tap_cable_usbconn_xpc_ext,
+#endif
+#ifdef ENABLE_CABLE_JLINK
+ &urj_tap_cable_usbconn_jlink,
+#endif
+#ifdef ENABLE_CABLE_FT2232
+#ifdef ENABLE_LOWLEVEL_FTD2XX
+ &urj_tap_cable_usbconn_ft2232_ftd2xx,
+ &urj_tap_cable_usbconn_armusbocd_ftd2xx,
+ &urj_tap_cable_usbconn_armusbocdtiny_ftd2xx,
+ &urj_tap_cable_usbconn_gnice_ftd2xx,
+ &urj_tap_cable_usbconn_jtagkey_ftd2xx,
+ &urj_tap_cable_usbconn_oocdlinks_ftd2xx,
+ &urj_tap_cable_usbconn_turtelizer2_ftd2xx,
+ &urj_tap_cable_usbconn_usbtojtagif_ftd2xx,
+ &urj_tap_cable_usbconn_signalyzer_ftd2xx,
+ &urj_tap_cable_usbconn_flyswatter_ftd2xx,
+ &urj_tap_cable_usbconn_usbscarab2_ftd2xx,
+#endif
+#ifdef ENABLE_LOWLEVEL_FTDI
+ &urj_tap_cable_usbconn_ft2232_ftdi,
+ &urj_tap_cable_usbconn_armusbocd_ftdi,
+ &urj_tap_cable_usbconn_armusbocdtiny_ftdi,
+ &urj_tap_cable_usbconn_gnice_ftdi,
+ &urj_tap_cable_usbconn_jtagkey_ftdi,
+ &urj_tap_cable_usbconn_oocdlinks_ftdi,
+ &urj_tap_cable_usbconn_turtelizer2_ftdi,
+ &urj_tap_cable_usbconn_usbtojtagif_ftdi,
+ &urj_tap_cable_usbconn_signalyzer_ftdi,
+ &urj_tap_cable_usbconn_flyswatter_ftdi,
+ &urj_tap_cable_usbconn_usbscarab2_ftdi,
+#endif
+#endif
+#ifdef ENABLE_CABLE_USBBLASTER
+#ifdef ENABLE_LOWLEVEL_FTD2XX
+ &urj_tap_cable_usbconn_usbblaster_ftd2xx,
+ &urj_tap_cable_usbconn_cubic_cyclonium_ftd2xx,
+ &urj_tap_cable_usbconn_nios_eval_ftd2xx,
+ &urj_tap_cable_usbconn_usb_jtag_ftd2xx,
+#endif
+#ifdef ENABLE_LOWLEVEL_FTDI
+ &urj_tap_cable_usbconn_usbblaster_ftdi,
+ &urj_tap_cable_usbconn_cubic_cyclonium_ftdi,
+ &urj_tap_cable_usbconn_nios_eval_ftdi,
+ &urj_tap_cable_usbconn_usb_jtag_ftdi,
+#endif
+#endif
+ NULL
+};
+
+int
+urj_tap_cable_generic_usbconn_connect (urj_cable_t *cable,
+ const urj_param_t *params[])
+{
+ urj_usbconn_cable_t user_specified = {
+ NULL, /* no name */
+ NULL, /* no string pattern */
+ NULL, /* no specific driver */
+ -1, /* no VID */
+ -1, /* no PID */
+ };
+
+ urj_tap_cable_generic_params_t *cable_params;
+ urj_usbconn_t *conn = NULL;
+ int i;
+
+ if (strcasecmp (cable->driver->name, "usb") != 0)
+ {
+ user_specified.name = cable->driver->name;
+ }
+
+ if (params != NULL)
+ /* parse arguments beyond the cable name */
+ for (i = 0; params[i] != NULL; i++)
+ {
+ switch (params[i]->key)
+ {
+ case URJ_CABLE_PARAM_KEY_PID:
+ user_specified.pid = params[i]->value.lu;
+ break;
+ case URJ_CABLE_PARAM_KEY_VID:
+ user_specified.vid = params[i]->value.lu;
+ break;
+ case URJ_CABLE_PARAM_KEY_DESC:
+ user_specified.desc = params[i]->value.string;
+ break;
+ case URJ_CABLE_PARAM_KEY_DRIVER:
+ user_specified.driver = params[i]->value.string;
+ break;
+ default:
+ // hand these to the driver connect()
+ break;
+ }
+ }
+
+ /* search usbconn driver list */
+ for (i = 0; urj_tap_usbconn_drivers[i] && !conn; i++)
+ {
+ if ((user_specified.driver == NULL)
+ || (strcasecmp (user_specified.driver,
+ urj_tap_usbconn_drivers[i]->type) == 0))
+ {
+ int j;
+
+ /* search cable list */
+ for (j = 0; urj_tap_cable_usbconn_cables[j] && !conn; j++)
+ {
+ if ((user_specified.name == NULL)
+ || (strcasecmp (user_specified.name,
+ urj_tap_cable_usbconn_cables[j]->name) == 0))
+ {
+ if (strcasecmp (urj_tap_cable_usbconn_cables[j]->driver,
+ urj_tap_usbconn_drivers[i]->type) == 0)
+ {
+ urj_usbconn_cable_t cable_try =
+ *(urj_tap_cable_usbconn_cables[j]);
+
+ if (user_specified.vid >= 0)
+ cable_try.vid = user_specified.vid;
+ if (user_specified.pid >= 0)
+ cable_try.pid = user_specified.pid;
+ if (user_specified.desc != 0)
+ cable_try.desc = user_specified.desc;
+
+ conn = urj_tap_usbconn_drivers[i]->connect (&cable_try,
+ params);
+ }
+ }
+ }
+ }
+ }
+
+ if (!conn)
+ {
+ // @@@@ RFHH make this into either the error from drivers->connect,
+ // or urj_error_set (NOT_FOUND)
+ urj_log (URJ_LOG_LEVEL_ERROR,
+ _("Couldn't connect to suitable USB device.\n"));
+ return URJ_STATUS_FAIL;
+ }
+
+ cable_params = malloc (sizeof (urj_tap_cable_generic_params_t));
+ if (!cable_params)
+ {
+ urj_error_set (URJ_ERROR_OUT_OF_MEMORY, _("malloc(%zd) fails"),
+ sizeof (urj_tap_cable_generic_params_t));
+ urj_tap_usbconn_drivers[i]->free (conn);
+ return URJ_STATUS_FAIL;
+ }
+
+ cable->link.usb = conn;
+ cable->params = cable_params;
+ cable->chain = NULL;
+
+ return URJ_STATUS_OK;
+}
+
+void
+urj_tap_cable_generic_usbconn_free (urj_cable_t *cable)
+{
+ cable->link.usb->driver->free (cable->link.usb);
+ free (cable->params);
+ free (cable);
+}
+
+void
+urj_tap_cable_generic_usbconn_done (urj_cable_t *cable)
+{
+ urj_tap_usbconn_close (cable->link.usb);
+}
+
+void
+urj_tap_cable_generic_usbconn_help (urj_log_level_t ll, const char *cablename)
+{
+ urj_log (ll,
+ _("Usage: cable %s [vid=VID] [pid=PID] [desc=DESC] [...]\n"
+ "\n"
+ "VID USB Device Vendor ID (hex, e.g. 0abc)\n"
+ "PID USB Device Product ID (hex, e.g. 0abc)\n"
+ "DESC Some string to match in description or serial no.\n"
+ "\n"), cablename);
+}
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2003 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2003.
+ *
+ */
+
+#ifndef URJ_TAP_CABLE_GENERIC_USBCONN_H
+#define URJ_TAP_CABLE_GENERIC_USBCONN_H
+
+#include <urjtag/cable.h>
+#include <urjtag/usbconn.h>
+
+/**
+ * @return URJ_STATUS_OK on success, URJ_STATUS_FAIL and urj_error on error
+ */
+int urj_tap_cable_generic_usbconn_connect (urj_cable_t *cable,
+ const urj_param_t *params[]);
+void urj_tap_cable_generic_usbconn_done (urj_cable_t *cable);
+void urj_tap_cable_generic_usbconn_help (urj_log_level_t ll, const char *name);
+void urj_tap_cable_generic_usbconn_free (urj_cable_t *cable);
+
+#endif /* URJ_TAP_CABLE_GENERIC_H */
--- /dev/null
+/*
+ * $Id: $
+ *
+ * JTAG target simulator JIM "cable" driver
+ *
+ * Copyright (C) 2008 Kolja Waschk
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ */
+
+#include <sysdep.h>
+
+#include <stdlib.h>
+#include <string.h>
+#include <ctype.h>
+
+#include <urjtag/cable.h>
+#include <urjtag/parport.h>
+#include <urjtag/chain.h>
+
+#include "generic.h"
+
+#include <urjtag/cmd.h>
+
+#include <urjtag/jim.h>
+
+/* private parameters of this cable driver */
+typedef struct
+{
+ urj_jim_state_t *s;
+}
+jim_cable_params_t;
+
+static int
+jim_cable_connect (urj_cable_t *cable, const urj_param_t *params[])
+{
+ jim_cable_params_t *cable_params;
+ urj_jim_state_t *s;
+
+ if (urj_param_num (params) > 0)
+ {
+ urj_error_set (URJ_ERROR_SYNTAX, _("too many arguments"));
+ return URJ_STATUS_FAIL;
+ }
+
+ urj_warning (_("JTAG target simulator JIM - work in progress!\n"));
+
+ s = urj_jim_init ();
+ if (!s)
+ {
+ // retain error state
+ return URJ_STATUS_FAIL;
+ }
+
+ cable_params = malloc (sizeof (jim_cable_params_t));
+ if (!cable_params)
+ {
+ urj_error_set (URJ_ERROR_OUT_OF_MEMORY, _("malloc(%zd) fails"),
+ sizeof (jim_cable_params_t));
+ urj_jim_free (s);
+ return URJ_STATUS_FAIL;
+ }
+
+ cable->params = cable_params;
+ ((jim_cable_params_t *) (cable->params))->s = s;
+ cable->chain = NULL;
+
+ return URJ_STATUS_OK;
+}
+
+static void
+jim_cable_disconnect (urj_cable_t *cable)
+{
+ urj_tap_cable_done (cable);
+ urj_tap_chain_disconnect (cable->chain);
+}
+
+static void
+jim_cable_free (urj_cable_t *cable)
+{
+ if (cable->params != NULL)
+ {
+ urj_jim_free (((jim_cable_params_t *) (cable->params))->s);
+ free (cable->params);
+ }
+ free (cable);
+}
+
+static void
+jim_cable_done (urj_cable_t *cable)
+{
+}
+
+static int
+jim_cable_init (urj_cable_t *cable)
+{
+ return URJ_STATUS_OK;
+}
+
+static void
+jim_cable_clock (urj_cable_t *cable, int tms, int tdi, int n)
+{
+ int i;
+ jim_cable_params_t *jcp = (jim_cable_params_t *) (cable->params);
+
+ for (i = 0; i < n; i++)
+ {
+ urj_jim_tck_rise (jcp->s, tms, tdi);
+ urj_jim_tck_fall (jcp->s);
+ }
+}
+
+static int
+jim_cable_get_tdo (urj_cable_t *cable)
+{
+ jim_cable_params_t *jcp = (jim_cable_params_t *) (cable->params);
+
+ return urj_jim_get_tdo (jcp->s);
+}
+
+static int
+jim_cable_get_trst (urj_cable_t *cable)
+{
+ jim_cable_params_t *jcp = (jim_cable_params_t *) (cable->params);
+
+ return urj_jim_get_trst (jcp->s);
+}
+
+static int
+jim_cable_set_trst (urj_cable_t *cable, int trst)
+{
+ jim_cable_params_t *jcp = (jim_cable_params_t *) (cable->params);
+
+ urj_jim_set_trst (jcp->s, trst);
+ return urj_jim_get_trst (jcp->s);
+}
+
+static void
+jim_cable_help (urj_log_level_t ll, const char *cablename)
+{
+ urj_log (ll, _("Usage: cable %s\n"), cablename);
+}
+
+urj_cable_driver_t urj_tap_cable_jim_driver = {
+ "JIM",
+ N_("JTAG target simulator JIM"),
+ jim_cable_connect,
+ jim_cable_disconnect,
+ jim_cable_free,
+ jim_cable_init,
+ jim_cable_done,
+ urj_tap_cable_generic_set_frequency,
+ jim_cable_clock,
+ jim_cable_get_tdo,
+ urj_tap_cable_generic_transfer,
+ jim_cable_set_trst,
+ jim_cable_get_trst,
+ urj_tap_cable_generic_flush_using_transfer,
+ jim_cable_help
+};
--- /dev/null
+/*
+ * $Id: jlink.c,v 1.8 2003/08/19 08:42:20 telka Exp $
+ *
+ * Segger J-Link cable driver
+ *
+ * Large portions of code were taken from the OpenOCD driver written by
+ * Juergen Stuber, which in turn was based on Dominic Rath's and Benedikt
+ * Sauter's usbprog.c. Therefore most of this code is actually
+ *
+ * Copyright (C) 2007 Juergen Stuber
+ *
+ * Modified to work in UrJTAG by K. Waschk in 2008.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ */
+
+
+#include <sysdep.h>
+
+#include "generic.h"
+#include "generic_usbconn.h"
+
+#include <urjtag/usbconn.h>
+
+/* ---------------------------------------------------------------------- */
+
+
+#include <urjtag/cable.h>
+#include <urjtag/chain.h>
+
+#include "usbconn/libusb.h"
+
+#include <usb.h>
+#include <string.h>
+
+#define JLINK_WRITE_ENDPOINT 0x02
+#define JLINK_READ_ENDPOINT 0x81
+
+#define JLINK_USB_TIMEOUT 100
+
+#define JLINK_IN_BUFFER_SIZE 2064
+#define JLINK_OUT_BUFFER_SIZE 2064
+
+/* We use the maximal value observed */
+#define JLINK_TAP_BUFFER_SIZE 390
+
+typedef struct
+{
+ /* Global USB buffers */
+ char usb_in_buffer[JLINK_IN_BUFFER_SIZE];
+ char usb_out_buffer[JLINK_OUT_BUFFER_SIZE];
+
+ int tap_length;
+ uint8_t tms_buffer[JLINK_TAP_BUFFER_SIZE];
+ uint8_t tdi_buffer[JLINK_TAP_BUFFER_SIZE];
+
+ int last_tdo;
+}
+jlink_usbconn_data_t;
+
+/* Constants for JLink command */
+#define JLINK_DO_TRST_CYCLE 0x02
+#define JLINK_SPEED_COMMAND 0x05
+#define JLINK_GET_STATUS_COMMAND 0x07
+#define JLINK_GET_A 0xc1
+#define JLINK_GET_B 0xc2
+#define JLINK_SET_TMS_LOW_COMMAND 0xc9
+#define JLINK_SET_TMS_HIGH_COMMAND 0xca
+#define JLINK_SET_TDI_LOW_COMMAND 0xcb
+#define JLINK_SET_TDI_HIGH_COMMAND 0xcc
+#define JLINK_TAP_SEQUENCE_COMMAND 0xcd
+#define JLINK_SET_SRST_LOW_COMMAND 0xdc
+#define JLINK_SET_SRST_HIGH_COMMAND 0xdd
+#define JLINK_SET_TRST_LOW_COMMAND 0xde
+#define JLINK_SET_TRST_HIGH_COMMAND 0xdf
+
+#define JLINK_MAX_SPEED 12000
+
+/* Queue command functions */
+static void urj_tap_cable_jlink_reset (urj_usbconn_libusb_param_t *params,
+ int trst, int srst);
+static void jlink_simple_command (urj_usbconn_libusb_param_t *params,
+ uint8_t command);
+
+
+/* J-Link tap buffer functions */
+static void jlink_tap_init (jlink_usbconn_data_t *data);
+static int jlink_tap_execute (urj_usbconn_libusb_param_t *params);
+static void jlink_tap_append_step (jlink_usbconn_data_t *data, int, int);
+
+/* Jlink lowlevel functions */
+static int jlink_usb_message (urj_usbconn_libusb_param_t *params, int, int);
+/** @return number of bytes written; -1 on error */
+static int jlink_usb_write (urj_usbconn_libusb_param_t *params, unsigned int);
+/** @return number of bytes read; -1 on error */
+static int jlink_usb_read (urj_usbconn_libusb_param_t *params);
+
+static void jlink_debug_buffer (char *buffer, int length);
+
+/* API functions */
+
+void urj_tap_cable_jlink_set_frequency (urj_cable_t *cable,
+ uint32_t frequency);
+
+/***************************************************************************/
+/* J-Link tap functions */
+
+void
+urj_tap_cable_jlink_reset (urj_usbconn_libusb_param_t *params, int trst,
+ int srst)
+{
+ urj_log (URJ_LOG_LEVEL_DETAIL, "trst: %i, srst: %i\n", trst, srst);
+
+ /* Signals are active low */
+ if (trst == 0)
+ {
+ jlink_simple_command (params, JLINK_SET_TRST_HIGH_COMMAND);
+ }
+ else if (trst == 1)
+ {
+ jlink_simple_command (params, JLINK_SET_TRST_LOW_COMMAND);
+ }
+
+ if (srst == 0)
+ {
+ jlink_simple_command (params, JLINK_SET_SRST_HIGH_COMMAND);
+ }
+ else if (srst == 1)
+ {
+ jlink_simple_command (params, JLINK_SET_SRST_LOW_COMMAND);
+ }
+}
+
+
+static void
+jlink_simple_command (urj_usbconn_libusb_param_t *params, uint8_t command)
+{
+ int result;
+ jlink_usbconn_data_t *data = params->data;
+
+ urj_log (URJ_LOG_LEVEL_DETAIL, "simple_command: 0x%02x\n", command);
+
+ data->usb_out_buffer[0] = command;
+ result = jlink_usb_write (params, 1);
+
+ if (result != 1)
+ {
+ urj_log (URJ_LOG_LEVEL_ERROR, "J-Link command 0x%02x failed (%d)\n",
+ command, result);
+ }
+}
+
+static int
+jlink_get_status (urj_usbconn_libusb_param_t *params)
+{
+ int result;
+ jlink_usbconn_data_t *data = params->data;
+
+ jlink_simple_command (params, 0x07);
+
+ result = jlink_usb_read (params);
+
+ if (result == 8)
+ {
+ int vref = data->usb_in_buffer[0] + (data->usb_in_buffer[1] << 8);
+ // @@@@ RFHH how can we handle this gracefully in liburjtag?
+ urj_log (URJ_LOG_LEVEL_NORMAL,
+ "Vref = %d.%d TCK=%d TDI=%d TDO=%d TMS=%d TRES=%d TRST=%d\n",
+ vref / 1000, vref % 1000,
+ data->usb_in_buffer[2],
+ data->usb_in_buffer[3],
+ data->usb_in_buffer[4],
+ data->usb_in_buffer[5],
+ data->usb_in_buffer[6], data->usb_in_buffer[7]);
+ if (vref < 1500)
+ {
+ urj_error_set (URJ_ERROR_USB,
+ "Vref too low. Possibly the target isn't powered or disconnected?");
+ result = -1;
+ }
+ }
+ else
+ {
+ urj_error_set (URJ_ERROR_USB,
+ "J-Link command 0x07 (get status) failed (%d)\n",
+ result);
+ result = -1;
+ }
+
+ return result;
+}
+
+
+/***************************************************************************/
+
+static void
+jlink_tap_init (jlink_usbconn_data_t *data)
+{
+ data->tap_length = 0;
+}
+
+static void
+jlink_tap_append_step (jlink_usbconn_data_t *data, int tms, int tdi)
+{
+ int index = data->tap_length >> 3;
+
+ if (index < JLINK_TAP_BUFFER_SIZE)
+ {
+ int bit_index = data->tap_length & 7;
+ uint8_t bit = 1 << bit_index;
+
+ if (bit_index == 0)
+ {
+ data->tms_buffer[index] = 0;
+ data->tdi_buffer[index] = 0;
+ }
+
+ if (tms)
+ data->tms_buffer[index] |= bit;
+ if (tdi)
+ data->tdi_buffer[index] |= bit;
+
+ data->tap_length++;
+ }
+ else
+ {
+ urj_log (URJ_LOG_LEVEL_ERROR, "jlink_tap_append_step, overflow\n");
+ }
+}
+
+/* Send a tap sequence to the device, and receive the answer */
+
+static int
+jlink_tap_execute (urj_usbconn_libusb_param_t *params)
+{
+ jlink_usbconn_data_t *data = params->data;
+ int byte_length;
+ int tms_offset;
+ int tdi_offset;
+ int i;
+ int result;
+
+ if (data->tap_length > 0)
+ {
+ byte_length = (data->tap_length + 7) >> 3;
+ data->usb_out_buffer[0] = JLINK_TAP_SEQUENCE_COMMAND;
+ data->usb_out_buffer[1] = (data->tap_length >> 0) & 0xff;
+ data->usb_out_buffer[2] = (data->tap_length >> 8) & 0xff;
+
+ tms_offset = 3;
+ for (i = 0; i < byte_length; i++)
+ {
+ data->usb_out_buffer[tms_offset + i] = data->tms_buffer[i];
+ }
+
+ tdi_offset = tms_offset + byte_length;
+ for (i = 0; i < byte_length; i++)
+ {
+ data->usb_out_buffer[tdi_offset + i] = data->tdi_buffer[i];
+ }
+
+ result = jlink_usb_message (params, 3 + 2 * byte_length, byte_length);
+
+ if (result == byte_length)
+ {
+ int bit_index = (data->tap_length - 1) & 7;
+ uint8_t bit = 1 << bit_index;
+
+ data->last_tdo =
+ ((data->usb_in_buffer[byte_length - 1]) & bit) ? 1 : 0;
+ }
+ else
+ {
+ urj_log (URJ_LOG_LEVEL_ERROR,
+ "jlink_tap_execute, wrong result %d, expected %d\n",
+ result, byte_length);
+
+ return -2;
+ }
+
+ jlink_tap_init (data);
+ }
+ return 0;
+}
+
+/* ---------------------------------------------------------------------- */
+
+/* Send a message and receive the reply. */
+static int
+jlink_usb_message (urj_usbconn_libusb_param_t *params, int out_length,
+ int in_length)
+{
+ int result;
+
+ result = jlink_usb_write (params, out_length);
+ if (result == out_length)
+ {
+ result = jlink_usb_read (params);
+ if (result == in_length)
+ {
+ return result;
+ }
+ else
+ {
+ urj_log (URJ_LOG_LEVEL_ERROR,
+ "usb_bulk_read failed (requested=%d, result=%d)\n",
+ in_length, result);
+
+ return -1;
+ }
+ }
+ else
+ {
+ urj_log (URJ_LOG_LEVEL_ERROR,
+ "usb_bulk_write failed (requested=%d, result=%d)\n",
+ out_length, result);
+
+ return -1;
+ }
+}
+
+/* ---------------------------------------------------------------------- */
+
+/* Write data from out_buffer to USB. */
+static int
+jlink_usb_write (urj_usbconn_libusb_param_t *params, unsigned int out_length)
+{
+ int result;
+ jlink_usbconn_data_t *data;
+
+ data = params->data;
+
+ if (out_length > JLINK_OUT_BUFFER_SIZE)
+ {
+ urj_log (URJ_LOG_LEVEL_ERROR,
+ "jlink_jtag_write illegal out_length=%d (max=%d)\n",
+ out_length, JLINK_OUT_BUFFER_SIZE);
+
+ return -1;
+ }
+
+ result = usb_bulk_write (params->handle,
+ JLINK_WRITE_ENDPOINT,
+ data->usb_out_buffer,
+ out_length, JLINK_USB_TIMEOUT);
+
+ urj_log (URJ_LOG_LEVEL_DETAIL,
+ "jlink_usb_write, out_length = %d, result = %d\n", out_length,
+ result);
+ jlink_debug_buffer (data->usb_out_buffer, out_length);
+ return result;
+}
+
+/* ---------------------------------------------------------------------- */
+
+/* Read data from USB into in_buffer. */
+static int
+jlink_usb_read (urj_usbconn_libusb_param_t *params)
+{
+ jlink_usbconn_data_t *data = params->data;
+
+ int result = usb_bulk_read (params->handle,
+ JLINK_READ_ENDPOINT,
+ data->usb_in_buffer,
+ JLINK_IN_BUFFER_SIZE,
+ JLINK_USB_TIMEOUT);
+
+ urj_log (URJ_LOG_LEVEL_DETAIL, "jlink_usb_read, result = %d\n", result);
+ jlink_debug_buffer (data->usb_in_buffer, result);
+ return result;
+}
+
+/* ---------------------------------------------------------------------- */
+
+#define BYTES_PER_LINE 16
+
+static void
+jlink_debug_buffer (char *buffer, int length)
+{
+ char line[81];
+ char s[4];
+ int i;
+ int j;
+
+ for (i = 0; i < length; i += BYTES_PER_LINE)
+ {
+ snprintf (line, 5, "%04x", i);
+ for (j = i; j < i + BYTES_PER_LINE && j < length; j++)
+ {
+ snprintf (s, 4, " %02x", buffer[j]);
+ strcat (line, s);
+ }
+ urj_log (URJ_LOG_LEVEL_DETAIL, line);
+ urj_log (URJ_LOG_LEVEL_DETAIL, "\n");
+ }
+}
+
+/* ---------------------------------------------------------------------- */
+
+static int
+jlink_init (urj_cable_t *cable)
+{
+ int result;
+ urj_usbconn_libusb_param_t *params;
+ jlink_usbconn_data_t *data;
+
+ params = cable->link.usb->params;
+ params->data = malloc (sizeof (jlink_usbconn_data_t));
+ if (params->data == NULL)
+ {
+ urj_error_set (URJ_ERROR_OUT_OF_MEMORY, "malloc(%zd) fails",
+ sizeof (jlink_usbconn_data_t));
+ return URJ_STATUS_FAIL;
+ }
+ data = params->data;
+
+ if (urj_tap_usbconn_open (cable->link.usb) != URJ_STATUS_OK)
+ return URJ_STATUS_FAIL;
+
+ jlink_tap_init (data);
+
+ result = jlink_usb_read (params);
+
+ if (result != 2 || data->usb_in_buffer[0] != 0x07
+ || data->usb_in_buffer[1] != 0x00)
+ {
+ urj_log (URJ_LOG_LEVEL_NORMAL,
+ "J-Link initial read failed, don't worry (result=%d)\n",
+ result);
+ }
+
+ result = jlink_get_status (params);
+ if (result < 0)
+ {
+ // retain error state
+ urj_log (URJ_LOG_LEVEL_ERROR,
+ "Resetting J-Link. Please retry the cable command.\n");
+ usb_reset (params->handle);
+ return URJ_STATUS_FAIL;
+ }
+
+ urj_log (URJ_LOG_LEVEL_NORMAL, "J-Link JTAG Interface ready\n");
+
+ urj_tap_cable_jlink_set_frequency (cable, 4E6);
+
+ urj_tap_cable_jlink_reset (params, 0, 0);
+
+ return URJ_STATUS_OK;
+}
+
+/* ---------------------------------------------------------------------- */
+
+static void
+jlink_free (urj_cable_t *cable)
+{
+ jlink_usbconn_data_t *data;
+ data = ((urj_usbconn_libusb_param_t *) (cable->link.usb->params))->data;
+ free (data);
+
+ urj_tap_cable_generic_usbconn_free (cable);
+}
+
+/* ---------------------------------------------------------------------- */
+
+void
+urj_tap_cable_jlink_set_frequency (urj_cable_t *cable, uint32_t frequency)
+{
+ int result;
+ int speed = frequency / 1E3;
+ urj_usbconn_libusb_param_t *params = cable->link.usb->params;
+ jlink_usbconn_data_t *data = params->data;
+
+ if (1 <= speed && speed <= JLINK_MAX_SPEED)
+ {
+ data->usb_out_buffer[0] = JLINK_SPEED_COMMAND;
+ /* speed = 0xFFFF for automatic (probably needs RTCK) */
+ data->usb_out_buffer[1] = (speed >> 0) & 0xff;
+ data->usb_out_buffer[2] = (speed >> 8) & 0xff;
+
+ result = jlink_usb_write (params, 3);
+
+ if (result != 3)
+ {
+ urj_log (URJ_LOG_LEVEL_ERROR,
+ "J-Link setting speed failed (%d)\n", result);
+ }
+ }
+ else
+ {
+ urj_log (URJ_LOG_LEVEL_NORMAL,
+ "Requested speed %dkHz exceeds maximum of %dkHz, ignored\n",
+ speed, JLINK_MAX_SPEED);
+ }
+}
+
+/* ---------------------------------------------------------------------- */
+
+static void
+jlink_clock (urj_cable_t *cable, int tms, int tdi, int n)
+{
+ int i;
+ urj_usbconn_libusb_param_t *params = cable->link.usb->params;
+ jlink_usbconn_data_t *data = params->data;
+
+ for (i = 0; i < n; i++)
+ {
+ jlink_tap_append_step (data, tms, tdi);
+ }
+ jlink_tap_execute (params);
+}
+
+/* ---------------------------------------------------------------------- */
+
+static int
+jlink_get_tdo (urj_cable_t *cable)
+{
+ urj_usbconn_libusb_param_t *params = cable->link.usb->params;
+ jlink_usbconn_data_t *data = params->data;
+
+ // TODO: This is the TDO _before_ last clock occured
+ // ... Anyone knows how to get the current TDO state?
+
+ return data->last_tdo;
+}
+
+/* ---------------------------------------------------------------------- */
+
+static void
+jlink_copy_out_data (jlink_usbconn_data_t *data, int len, int offset,
+ char *buf)
+{
+ int i;
+ for (i = 0; i < len; i++)
+ {
+ int bit = (1 << (i & 7));
+ int byte = i >> 3;
+ buf[offset + i] = (data->usb_in_buffer[byte] & bit) ? 1 : 0;
+ }
+}
+
+static int
+jlink_transfer (urj_cable_t *cable, int len, const char *in, char *out)
+{
+ int i, j;
+ urj_usbconn_libusb_param_t *params = cable->link.usb->params;
+ jlink_usbconn_data_t *data = params->data;
+
+ for (j = 0, i = 0; i < len; i++)
+ {
+ jlink_tap_append_step (data, 0, in[i]);
+
+ if (data->tap_length >= 8 * JLINK_TAP_BUFFER_SIZE)
+ {
+ jlink_tap_execute (params);
+ if (out)
+ jlink_copy_out_data (data, i - j, j, out);
+ j = i;
+ }
+ }
+ if (data->tap_length > 0)
+ {
+ jlink_tap_execute (params);
+ if (out)
+ jlink_copy_out_data (data, i - j, j, out);
+ }
+
+ return i;
+}
+
+/* ---------------------------------------------------------------------- */
+
+static int
+jlink_set_signal (urj_cable_t *cable, int mask, int val)
+{
+ return 1;
+}
+
+urj_cable_driver_t urj_tap_cable_jlink_driver = {
+ "jlink",
+ N_("Segger/IAR J-Link, Atmel SAM-ICE and others."),
+ URJ_CABLE_DEVICE_USB,
+ { .usb = urj_tap_cable_generic_usbconn_connect, },
+ urj_tap_cable_generic_disconnect,
+ jlink_free,
+ jlink_init,
+ urj_tap_cable_generic_usbconn_done,
+ urj_tap_cable_jlink_set_frequency,
+ jlink_clock,
+ jlink_get_tdo,
+ jlink_transfer,
+ jlink_set_signal,
+ urj_tap_cable_generic_get_signal,
+ urj_tap_cable_generic_flush_using_transfer,
+ urj_tap_cable_generic_usbconn_help
+};
+
+urj_usbconn_cable_t urj_tap_cable_usbconn_jlink = {
+ "jlink", /* cable name */
+ NULL, /* string pattern, not used */
+ "libusb", /* usbconn driver */
+ 0x1366, /* VID */
+ 0x0101 /* PID */
+};
--- /dev/null
+/*
+ * $Id$
+ *
+ * Keith & Koep JTAG Cable Driver
+ * Copyright (C) 2002, 2003 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2002, 2003.
+ *
+ * Documentation:
+ * [1] ftp://www.keith-koep.com/pub/arm-tools/jtag/jtag05_sch.pdf
+ *
+ */
+
+#include <sysdep.h>
+
+#include <urjtag/cable.h>
+#include <urjtag/parport.h>
+#include <urjtag/chain.h>
+
+#include "generic.h"
+#include "generic_parport.h"
+
+/*
+ * data D[7:0] (pins 9:2)
+ */
+#define TDI 0
+#define TCK 1
+#define TMS 2
+
+/*
+ * status
+ *
+ * 7 - BUSY (pin 11)
+ * 6 - ACK (pin 10)
+ * 5 - PE (pin 12)
+ * 4 - SEL (pin 13)
+ * 3 - ERROR (pin 15)
+ */
+#define TDO 5
+
+/*
+ * control
+ *
+ * 0 - STROBE (pin 1)
+ * 1 - AUTOFD (pin 14)
+ * 2 - INIT (pin 16)
+ * 3 - SELIN (pin 17)
+ */
+#define TRST 0
+
+static int
+keithkoep_init (urj_cable_t *cable)
+{
+ if (urj_tap_parport_open (cable->link.port) != URJ_STATUS_OK)
+ return URJ_STATUS_FAIL;
+
+ urj_tap_parport_set_control (cable->link.port, 1 << TRST);
+ PARAM_SIGNALS (cable) = URJ_POD_CS_TRST;
+
+ return URJ_STATUS_OK;
+}
+
+static void
+keithkoep_clock (urj_cable_t *cable, int tms, int tdi, int n)
+{
+ int i;
+
+ tms = tms ? 1 : 0;
+ tdi = tdi ? 1 : 0;
+
+ for (i = 0; i < n; i++)
+ {
+ urj_tap_parport_set_data (cable->link.port,
+ (0 << TCK) | (tms << TMS) | (tdi << TDI));
+ urj_tap_cable_wait (cable);
+ urj_tap_parport_set_data (cable->link.port,
+ (1 << TCK) | (tms << TMS) | (tdi << TDI));
+ urj_tap_cable_wait (cable);
+ }
+
+ PARAM_SIGNALS (cable) &= URJ_POD_CS_TRST;
+ PARAM_SIGNALS (cable) |= URJ_POD_CS_TCK;
+ PARAM_SIGNALS (cable) |= tms ? URJ_POD_CS_TMS : 0;
+ PARAM_SIGNALS (cable) |= tdi ? URJ_POD_CS_TDI : 0;
+}
+
+static int
+keithkoep_get_tdo (urj_cable_t *cable)
+{
+ int status;
+
+ urj_tap_parport_set_data (cable->link.port, 0 << TCK);
+ PARAM_SIGNALS (cable) &=
+ ~(URJ_POD_CS_TDI | URJ_POD_CS_TCK | URJ_POD_CS_TMS);
+
+ urj_tap_cable_wait (cable);
+
+ status = urj_tap_parport_get_status (cable->link.port);
+ if (status == -1)
+ return status;
+
+ return (status >> TDO) & 1;
+}
+
+static int
+keithkoep_set_signal (urj_cable_t *cable, int mask, int val)
+{
+ int prev_sigs = PARAM_SIGNALS (cable);
+
+ mask &= (URJ_POD_CS_TDI | URJ_POD_CS_TCK | URJ_POD_CS_TMS | URJ_POD_CS_TRST); // only these can be modified
+
+ if (mask != 0)
+ {
+ int sigs = (prev_sigs & ~mask) | (val & mask);
+
+ if ((mask & ~URJ_POD_CS_TRST) != 0)
+ {
+ int data = 0;
+ data |= (sigs & URJ_POD_CS_TDI) ? (1 << TDI) : 0;
+ data |= (sigs & URJ_POD_CS_TCK) ? (1 << TCK) : 0;
+ data |= (sigs & URJ_POD_CS_TMS) ? (1 << TMS) : 0;
+ urj_tap_parport_set_data (cable->link.port, data);
+ }
+ if ((mask & URJ_POD_CS_TRST) != 0)
+ {
+ urj_tap_parport_set_control (cable->link.port,
+ (sigs & URJ_POD_CS_TRST)
+ ? (1 << TRST) : 0);
+ }
+ PARAM_SIGNALS (cable) = sigs;
+ }
+
+ return prev_sigs;
+}
+
+urj_cable_driver_t urj_tap_cable_keithkoep_driver = {
+ "KeithKoep",
+ N_("Keith & Koep JTAG cable"),
+ URJ_CABLE_DEVICE_PARPORT,
+ { .parport = urj_tap_cable_generic_parport_connect, },
+ urj_tap_cable_generic_disconnect,
+ urj_tap_cable_generic_parport_free,
+ keithkoep_init,
+ urj_tap_cable_generic_parport_done,
+ urj_tap_cable_generic_set_frequency,
+ keithkoep_clock,
+ keithkoep_get_tdo,
+ urj_tap_cable_generic_transfer,
+ keithkoep_set_signal,
+ urj_tap_cable_generic_get_signal,
+ urj_tap_cable_generic_flush_one_by_one,
+ urj_tap_cable_generic_parport_help
+};
--- /dev/null
+/*
+ * $Id$
+ *
+ * Lattice Parallel Port Download Cable Driver
+ * Copyright (C) 2002, 2003 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2002, 2003.
+ *
+ */
+
+#include <sysdep.h>
+
+#include <urjtag/cable.h>
+#include <urjtag/parport.h>
+#include <urjtag/chain.h>
+
+#include "generic.h"
+#include "generic_parport.h"
+
+/*
+ * 0 - STROBE (pin 1)
+ * 1 - AUTOFD (pin 14)
+ * 2 - INIT (pin 16)
+ * 3 - SELECT (pin 17)
+ * data D[7:0] (pins 9:2)
+ * 7 - BUSY (pin 11)
+ * 6 - ACK (pin 10)
+ * 5 - PE (pin 12)
+ * 4 - SEL (pin 13)
+ * 3 - ERROR (pin 15)
+ */
+#define TDI 0
+#define TCK 1
+#define TMS 2
+#define TRST 4
+#define TDO 6
+
+
+static int
+lattice_init (urj_cable_t *cable)
+{
+ int data;
+
+ if (urj_tap_parport_open (cable->link.port) != URJ_STATUS_OK)
+ return URJ_STATUS_FAIL;
+
+ if ((data = urj_tap_parport_get_data (cable->link.port)) < 0)
+ {
+ if (urj_tap_parport_set_data (cable->link.port,
+ 1 << TRST) != URJ_STATUS_OK)
+ return URJ_STATUS_FAIL;
+ PARAM_SIGNALS (cable) = URJ_POD_CS_TRST;
+ }
+ else
+ PARAM_SIGNALS (cable) = ((data >> TRST) && 1) ? URJ_POD_CS_TRST : 0;
+
+ return URJ_STATUS_OK;
+}
+
+static void
+lattice_clock (urj_cable_t *cable, int tms, int tdi, int n)
+{
+ int i;
+ int trst = (PARAM_SIGNALS (cable) & URJ_POD_CS_TRST) ? 1 : 0;
+
+ tms = tms ? 1 : 0;
+ tdi = tdi ? 1 : 0;
+
+ for (i = 0; i < n; i++)
+ {
+ urj_tap_parport_set_data (cable->link.port,
+ (trst << TRST) | (0 << TCK) | (tms << TMS) |
+ (tdi << TDI));
+ urj_tap_cable_wait (cable);
+ urj_tap_parport_set_data (cable->link.port,
+ (trst << TRST) | (1 << TCK) | (tms << TMS) |
+ (tdi << TDI));
+ urj_tap_cable_wait (cable);
+ }
+
+ PARAM_SIGNALS (cable) &= URJ_POD_CS_TRST;
+ PARAM_SIGNALS (cable) |= URJ_POD_CS_TCK;
+ PARAM_SIGNALS (cable) |= tms ? URJ_POD_CS_TMS : 0;
+ PARAM_SIGNALS (cable) |= tdi ? URJ_POD_CS_TDI : 0;
+}
+
+static int
+lattice_get_tdo (urj_cable_t *cable)
+{
+ int trst = (PARAM_SIGNALS (cable) & URJ_POD_CS_TRST) ? 1 : 0;
+ int status;
+
+ urj_tap_parport_set_data (cable->link.port, (trst << TRST) | (0 << TCK));
+ PARAM_SIGNALS (cable) &=
+ ~(URJ_POD_CS_TDI | URJ_POD_CS_TCK | URJ_POD_CS_TMS);
+
+ urj_tap_cable_wait (cable);
+
+ status = urj_tap_parport_get_status (cable->link.port);
+ if (status == -1)
+ return status;
+
+ return (status >> TDO) & 1;
+}
+
+static int
+lattice_set_signal (urj_cable_t *cable, int mask, int val)
+{
+ int prev_sigs = PARAM_SIGNALS (cable);
+
+ mask &= (URJ_POD_CS_TDI | URJ_POD_CS_TCK | URJ_POD_CS_TMS | URJ_POD_CS_TRST); // only these can be modified
+
+ if (mask != 0)
+ {
+ int data = 0;
+ int sigs = (PARAM_SIGNALS (cable) & ~mask) | (val & mask);
+ data |= (sigs & URJ_POD_CS_TDI) ? (1 << TDI) : 0;
+ data |= (sigs & URJ_POD_CS_TCK) ? (1 << TCK) : 0;
+ data |= (sigs & URJ_POD_CS_TMS) ? (1 << TMS) : 0;
+ data |= (sigs & URJ_POD_CS_TRST) ? (1 << TRST) : 0;
+ urj_tap_parport_set_data (cable->link.port, data);
+ PARAM_SIGNALS (cable) = sigs;
+ }
+
+ return prev_sigs;
+}
+
+urj_cable_driver_t urj_tap_cable_lattice_driver = {
+ "Lattice",
+ N_("Lattice Parallel Port JTAG Cable"),
+ URJ_CABLE_DEVICE_PARPORT,
+ { .parport = urj_tap_cable_generic_parport_connect, },
+ urj_tap_cable_generic_disconnect,
+ urj_tap_cable_generic_parport_free,
+ lattice_init,
+ urj_tap_cable_generic_parport_done,
+ urj_tap_cable_generic_set_frequency,
+ lattice_clock,
+ lattice_get_tdo,
+ urj_tap_cable_generic_transfer,
+ lattice_set_signal,
+ urj_tap_cable_generic_get_signal,
+ urj_tap_cable_generic_flush_one_by_one,
+ urj_tap_cable_generic_parport_help
+};
--- /dev/null
+/*
+ * $Id$
+ *
+ * Minimal Parallel Port JTAG Cable Driver
+ * Copyright © 2009 Yen Rui
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * The Minimal Parallel Port JTAG Cable is a cheap and easy-to-make cable
+ * that only uses the four fundamental JTAG signals (TMS, TCD, TDI and TDO),
+ * i.e. it does NOT use the TRST signal. The Minimal Parallel Port JTAG
+ * Cable is a strict subset of the Macraigor Wiggler JTAG Cable, i.e. the
+ * more expensive Macraigor Wiggler JTAG Cable can be a drop-in replacement
+ * of the Minimal Parallel Port JTAG Cable.
+ *
+ * http://oldwiki.openwrt.org/OpenWrtDocs(2f)Customizing(2f)Hardware(2f)JTAG_Cable.html
+ *
+ * This driver does not modify the state of any other parallel port pins.
+ *
+ */
+
+#include <sysdep.h>
+
+#include <urjtag/cable.h>
+#include <urjtag/parport.h>
+#include <urjtag/chain.h>
+
+#include "generic.h"
+#include "generic_parport.h"
+
+/*
+ * data D[7:0] (pins 9:2)
+ */
+#define TMS 1
+#define TCK 2
+#define TDI 3
+
+/*
+ * 7 - BUSY (pin 11)
+ * 6 - ACK (pin 10)
+ * 5 - PE (pin 12)
+ * 4 - SEL (pin 13)
+ * 3 - ERROR (pin 15)
+ */
+#define TDO 7
+
+/* FIXME: having a static variable like this is probably not thread safe */
+static unsigned char unused_bits;
+
+static int
+minimal_init (urj_cable_t *cable)
+{
+ int data;
+
+ if (urj_tap_parport_open (cable->link.port))
+ return URJ_STATUS_FAIL;
+
+ if ((data = urj_tap_parport_get_data (cable->link.port)) < 0)
+ return URJ_STATUS_FAIL;
+
+ /* remember state of all parallel port pins except TDI, TCK and TMS */
+ unused_bits = data & (~((1 << TDI) | (1 << TCK) | (1 << TMS)));
+
+ /* copy data into PARAM_SIGNALS (cable) while faking URJ_POD_CS_TRST */
+ PARAM_SIGNALS (cable) = URJ_POD_CS_TRST;
+ PARAM_SIGNALS (cable) |= (data & TDI) ? URJ_POD_CS_TDI : 0;
+ PARAM_SIGNALS (cable) |= (data & TCK) ? URJ_POD_CS_TCK : 0;
+ PARAM_SIGNALS (cable) |= (data & TMS) ? URJ_POD_CS_TMS : 0;
+
+ return URJ_STATUS_OK;
+}
+
+static void
+minimal_clock (urj_cable_t *cable, int tms, int tdi, int n)
+{
+ int i;
+
+ tms = tms ? 1 : 0;
+ tdi = tdi ? 1 : 0;
+
+ for (i = 0; i < n; i++)
+ {
+ urj_tap_parport_set_data (cable->link.port,
+ (tms << TMS) | (0 << TCK) | (tdi << TDI) |
+ unused_bits);
+ urj_tap_cable_wait (cable);
+ urj_tap_parport_set_data (cable->link.port,
+ (tms << TMS) | (1 << TCK) | (tdi << TDI) |
+ unused_bits);
+ urj_tap_cable_wait (cable);
+ }
+
+ /* do not touch URJ_POD_CS_TRST in PARAM_SIGNALS (cable) */
+ PARAM_SIGNALS (cable) &= ~(URJ_POD_CS_TMS | URJ_POD_CS_TDI);
+ PARAM_SIGNALS (cable) |= URJ_POD_CS_TCK;
+ PARAM_SIGNALS (cable) |= tms ? URJ_POD_CS_TMS : 0;
+ PARAM_SIGNALS (cable) |= tdi ? URJ_POD_CS_TDI : 0;
+}
+
+static int
+minimal_get_tdo (urj_cable_t *cable)
+{
+ urj_tap_parport_set_data (cable->link.port, (0 << TCK) | unused_bits);
+
+ PARAM_SIGNALS (cable) &=
+ ~(URJ_POD_CS_TDI | URJ_POD_CS_TCK | URJ_POD_CS_TMS);
+
+ urj_tap_cable_wait (cable);
+
+ return (urj_tap_parport_get_status (cable->link.port) >> TDO) & 1;
+}
+
+static int
+minimal_set_signal (urj_cable_t *cable, int mask, int val)
+{
+ int prev_sigs = PARAM_SIGNALS (cable);
+
+ /* only these signals can be modified */
+ mask &= (URJ_POD_CS_TDI | URJ_POD_CS_TCK | URJ_POD_CS_TMS | URJ_POD_CS_TRST);
+
+ if (mask != 0)
+ {
+ unsigned char data = 0;
+ int sigs = (prev_sigs & ~mask) | (val & mask);
+ data |= (sigs & URJ_POD_CS_TDI) ? (1 << TDI) : 0;
+ data |= (sigs & URJ_POD_CS_TCK) ? (1 << TCK) : 0;
+ data |= (sigs & URJ_POD_CS_TMS) ? (1 << TMS) : 0;
+ /* do not actually set TRST on parallel port ... */
+ //data |= (sigs & URJ_POD_CS_TRST) ? (1 << TRST) : 0;
+ urj_tap_parport_set_data (cable->link.port, data | unused_bits);
+ /* ... although TRST can be marked as set in PARAM_SIGNALS (cable) */
+ PARAM_SIGNALS (cable) = sigs;
+ }
+
+ return prev_sigs;
+}
+
+urj_cable_driver_t urj_tap_cable_minimal_driver = {
+ "Minimal",
+ N_("Minimal Parallel Port JTAG Cable"),
+ URJ_CABLE_DEVICE_PARPORT,
+ { .parport = urj_tap_cable_generic_parport_connect, },
+ urj_tap_cable_generic_disconnect,
+ urj_tap_cable_generic_parport_free,
+ minimal_init,
+ urj_tap_cable_generic_parport_done,
+ urj_tap_cable_generic_set_frequency,
+ minimal_clock,
+ minimal_get_tdo,
+ urj_tap_cable_generic_transfer,
+ minimal_set_signal,
+ urj_tap_cable_generic_get_signal,
+ urj_tap_cable_generic_flush_one_by_one,
+ urj_tap_cable_generic_parport_help
+};
--- /dev/null
+/*
+ * $Id$
+ *
+ * Mpcbdm JTAG Cable Driver
+ * Copyright (C) 2002, 2003 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2002, 2003.
+ * Modified for Mpcbdm by Christian Pellegrin <chri@ascensit.com>, 2003.
+ *
+ * Documentation:
+ * [1] http://www.vas-gmbh.de/software/mpcbdm/VDB2.gif
+ *
+ */
+
+#include <sysdep.h>
+
+#include <urjtag/cable.h>
+#include <urjtag/parport.h>
+#include <urjtag/chain.h>
+
+#include "generic.h"
+#include "generic_parport.h"
+
+/*
+ * data D[7:0] (pins 9:2)
+ */
+#define TDI 1
+#define TCK 0
+#define TMS 2
+
+/*
+ * control
+ */
+#define HRESET 3 /* the signal is inverted by cable hardware */
+#define SRESET 1 /* the signal is inverted by cable hardware */
+#define TRST 0 /* the signal is inverted by cable hardware */
+
+/*
+ * status
+ *
+ * 7 - BUSY (pin 11)
+ * 6 - ACK (pin 10)
+ * 5 - PE (pin 12)
+ * 4 - SEL (pin 13)
+ * 3 - ERROR (pin 15)
+ */
+#define TDO 5
+
+static int
+mpcbdm_init (urj_cable_t *cable)
+{
+ if (urj_tap_parport_open (cable->link.port) != URJ_STATUS_OK)
+ return URJ_STATUS_FAIL;
+
+ urj_tap_parport_set_control (cable->link.port, 0);
+ PARAM_SIGNALS (cable) = (URJ_POD_CS_TRST | URJ_POD_CS_RESET);
+
+ return URJ_STATUS_OK;
+}
+
+static void
+mpcbdm_clock (urj_cable_t *cable, int tms, int tdi, int n)
+{
+ int i;
+
+ tms = tms ? 1 : 0;
+ tdi = tdi ? 1 : 0;
+
+ for (i = 0; i < n; i++)
+ {
+ urj_tap_parport_set_data (cable->link.port,
+ (0 << TCK) | (tms << TMS) | (tdi << TDI));
+ urj_tap_cable_wait (cable);
+ urj_tap_parport_set_data (cable->link.port,
+ (1 << TCK) | (tms << TMS) | (tdi << TDI));
+ urj_tap_cable_wait (cable);
+ }
+
+ PARAM_SIGNALS (cable) &= (URJ_POD_CS_TRST | URJ_POD_CS_RESET);
+ PARAM_SIGNALS (cable) |= URJ_POD_CS_TCK;
+ PARAM_SIGNALS (cable) |= tms ? URJ_POD_CS_TMS : 0;
+ PARAM_SIGNALS (cable) |= tdi ? URJ_POD_CS_TDI : 0;
+}
+
+static int
+mpcbdm_get_tdo (urj_cable_t *cable)
+{
+ urj_tap_parport_set_data (cable->link.port, 0 << TCK);
+ int status;
+
+ PARAM_SIGNALS (cable) &=
+ ~(URJ_POD_CS_TDI | URJ_POD_CS_TCK | URJ_POD_CS_TMS);
+
+ urj_tap_cable_wait (cable);
+
+ status = urj_tap_parport_get_status (cable->link.port);
+ if (status == -1)
+ return status;
+
+ return (status >> TDO) & 1;
+}
+
+static int
+mpcbdm_set_signal (urj_cable_t *cable, int mask, int val)
+{
+ int prev_sigs = PARAM_SIGNALS (cable);
+
+ mask &= (URJ_POD_CS_TDI | URJ_POD_CS_TCK | URJ_POD_CS_TMS | URJ_POD_CS_TRST | URJ_POD_CS_RESET); // only these can be modified
+
+ if (mask)
+ {
+ int sigs = (PARAM_SIGNALS (cable) & ~mask) | (val & mask);
+
+ if ((mask & ~(URJ_POD_CS_TRST | URJ_POD_CS_RESET)) != 0)
+ {
+ int data = 0;
+ data |= (sigs & URJ_POD_CS_TDI) ? (1 << TDI) : 0;
+ data |= (sigs & URJ_POD_CS_TCK) ? (1 << TCK) : 0;
+ data |= (sigs & URJ_POD_CS_TMS) ? (1 << TMS) : 0;
+ urj_tap_parport_set_data (cable->link.port, data);
+ }
+ if ((mask & (URJ_POD_CS_TRST | URJ_POD_CS_RESET)) != 0)
+ {
+ int data = 0;
+ data |= (sigs & URJ_POD_CS_TRST) ? 0 : (1 << TRST);
+ // data |= (sigs & URJ_POD_CS_RESET) ? 0 : (1 << SRESET); // use SRESET or HRESET? which polarity?
+ urj_tap_parport_set_control (cable->link.port, data);
+ }
+ PARAM_SIGNALS (cable) = sigs;
+ }
+
+ return prev_sigs;
+}
+
+urj_cable_driver_t urj_tap_cable_mpcbdm_driver = {
+ "MPCBDM",
+ N_("Mpcbdm JTAG cable"),
+ URJ_CABLE_DEVICE_PARPORT,
+ { .parport = urj_tap_cable_generic_parport_connect, },
+ urj_tap_cable_generic_disconnect,
+ urj_tap_cable_generic_parport_free,
+ mpcbdm_init,
+ urj_tap_cable_generic_parport_done,
+ urj_tap_cable_generic_set_frequency,
+ mpcbdm_clock,
+ mpcbdm_get_tdo,
+ urj_tap_cable_generic_transfer,
+ mpcbdm_set_signal,
+ urj_tap_cable_generic_get_signal,
+ urj_tap_cable_generic_flush_one_by_one,
+ urj_tap_cable_generic_parport_help
+};
--- /dev/null
+/*
+ * $Id$
+ *
+ * Ka-Ro TRITON Starterkit II (PXA255/250) JTAG Cable
+ * Copyright (C) 2002, 2003 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2002, 2003.
+ * Modified for TRITON by Andreas Mohr <andi@lisas.de>, 2003
+ *
+ */
+
+/*
+ * Ka-Ro electronics GmbH (http://www.karo-electronics.de)
+ * TRITON Starterkit II (PXA255/250) JTAG Parallel Cable Driver
+ * (boards probably produced by www.mite.cz)
+ * Other vendors: www.strategic-test.com, www.fsforth.de (www.es-usa.com),
+ * www.directinsight.co.uk, www.quantum.com.pl,
+ *
+ * This code has been verified to work with a Starterkit II,
+ * but a Starterkit I might also work (however it has a differing JTAG cable
+ * interface circuit, so all bets are off).
+ */
+
+#include <sysdep.h>
+
+#include <urjtag/cable.h>
+#include <urjtag/parport.h>
+#include <urjtag/chain.h>
+
+#include "generic.h"
+#include "generic_parport.h"
+
+/*
+ * data D[7:0] (pins 9:2)
+ */
+#define TDI 1
+#define TCK 0
+#define TMS 2
+#define TRST 3
+#define SRESET 4
+#define ENAB 5 /* not programmed, since it's always 0 */
+
+/*
+ * status
+ *
+ * 7 - BUSY (pin 11)
+ * 6 - ACK (pin 10)
+ * 5 - PE (pin 12)
+ * 4 - SEL (pin 13)
+ * 3 - ERROR (pin 15)
+ */
+#define TDO 7
+
+static int
+triton_init (urj_cable_t *cable)
+{
+ if (urj_tap_parport_open (cable->link.port) != URJ_STATUS_OK)
+ return URJ_STATUS_FAIL;
+
+ PARAM_SIGNALS (cable) = URJ_POD_CS_TRST | URJ_POD_CS_RESET;
+ urj_tap_parport_set_data (cable->link.port, (1 << TRST) | (1 << SRESET));
+
+ return URJ_STATUS_OK;
+}
+
+static void
+triton_clock (urj_cable_t *cable, int tms, int tdi, int n)
+{
+ int i;
+ int trst = (PARAM_SIGNALS (cable) & URJ_POD_CS_TRST) ? 1 : 0;
+ int sreset = (PARAM_SIGNALS (cable) & URJ_POD_CS_RESET) ? 1 : 0;
+
+ tms = tms ? 1 : 0;
+ tdi = tdi ? 1 : 0;
+
+ for (i = 0; i < n; i++)
+ {
+ urj_tap_parport_set_data (cable->link.port,
+ (trst << TRST) | (sreset << SRESET)
+ | (0 << TCK) | (tms << TMS) | (tdi << TDI));
+ urj_tap_cable_wait (cable);
+ urj_tap_parport_set_data (cable->link.port,
+ (trst << TRST) | (sreset << SRESET)
+ | (1 << TCK) | (tms << TMS) | (tdi << TDI));
+ urj_tap_cable_wait (cable);
+ }
+
+ PARAM_SIGNALS (cable) &= (URJ_POD_CS_TRST | URJ_POD_CS_RESET);
+ PARAM_SIGNALS (cable) |= URJ_POD_CS_TCK;
+ PARAM_SIGNALS (cable) |= tms ? URJ_POD_CS_TMS : 0;
+ PARAM_SIGNALS (cable) |= tdi ? URJ_POD_CS_TDI : 0;
+}
+
+static int
+triton_get_tdo (urj_cable_t *cable)
+{
+ int trst = (PARAM_SIGNALS (cable) & URJ_POD_CS_TRST) ? 1 : 0;
+ int sreset = (PARAM_SIGNALS (cable) & URJ_POD_CS_RESET) ? 1 : 0;
+ int status;
+
+ urj_tap_parport_set_data (cable->link.port,
+ (trst << TRST) | (sreset << SRESET) | (0 << TCK));
+ PARAM_SIGNALS (cable) &=
+ ~(URJ_POD_CS_TDI | URJ_POD_CS_TCK | URJ_POD_CS_TMS);
+
+ urj_tap_cable_wait (cable);
+
+ status = urj_tap_parport_get_status (cable->link.port);
+ if (status == -1)
+ return status;
+
+ return (status >> TDO) & 1;
+}
+
+static int
+triton_set_signal (urj_cable_t *cable, int mask, int val)
+{
+ int prev_sigs = PARAM_SIGNALS (cable);
+
+ mask &= (URJ_POD_CS_TDI | URJ_POD_CS_TCK | URJ_POD_CS_TMS | URJ_POD_CS_TRST | URJ_POD_CS_RESET); // only these can be modified
+
+ if (mask != 0)
+ {
+ int data = 0;
+ int sigs = (PARAM_SIGNALS (cable) & ~mask) | (val & mask);
+ data |= (sigs & URJ_POD_CS_TDI) ? (1 << TDI) : 0;
+ data |= (sigs & URJ_POD_CS_TCK) ? (1 << TCK) : 0;
+ data |= (sigs & URJ_POD_CS_TMS) ? (1 << TMS) : 0;
+ data |= (sigs & URJ_POD_CS_TRST) ? (1 << TRST) : 0;
+ data |= (sigs & URJ_POD_CS_RESET) ? (1 << SRESET) : 0;
+ urj_tap_parport_set_data (cable->link.port, data);
+ PARAM_SIGNALS (cable) = sigs;
+ }
+
+ return prev_sigs;
+}
+
+urj_cable_driver_t urj_tap_cable_triton_driver = {
+ "TRITON",
+ N_("Ka-Ro TRITON Starterkit II (PXA255/250) JTAG Cable"),
+ URJ_CABLE_DEVICE_PARPORT,
+ { .parport = urj_tap_cable_generic_parport_connect, },
+ urj_tap_cable_generic_disconnect,
+ urj_tap_cable_generic_parport_free,
+ triton_init,
+ urj_tap_cable_generic_parport_done,
+ urj_tap_cable_generic_set_frequency,
+ triton_clock,
+ triton_get_tdo,
+ urj_tap_cable_generic_transfer,
+ triton_set_signal,
+ urj_tap_cable_generic_get_signal,
+ urj_tap_cable_generic_flush_one_by_one,
+ urj_tap_cable_generic_parport_help
+};
--- /dev/null
+/*
+ * $Id$
+ *
+ * Technologic Systems TS-7800 SoC GPIO JTAG Cable Driver
+ * Copyright (C) 2008 Catalin Ionescu
+ * Based on Vision EP9307 SoM GPIO JTAG Cable Driver
+ * Copyright (C) 2007, 2008 H Hartley Sweeten
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Catalin Ionescu <catalin.ionescu@radioconsult.ro>, 2008
+ *
+ */
+
+#include <sysdep.h>
+
+#include <stdlib.h>
+#include <string.h>
+
+#include <sys/types.h>
+#include <sys/stat.h>
+#include <sys/mman.h>
+#include <fcntl.h>
+#include <unistd.h>
+
+#include <urjtag/cable.h>
+#include <urjtag/chain.h>
+
+#include "generic.h"
+
+#include <cmd.h>
+
+#define GPIO_BASE 0xF1010000
+#define GPIO_OUT (0x0100/4)
+#define GPIO_DIR (0x0104/4)
+#define GPIO_INPOL (0x010C/4)
+#define GPIO_IN (0x0110/4)
+#define GPIO_INTEDGE (0x0118/4)
+#define GPIO_INTLEV (0x011C/4)
+
+#define TDO 4
+#define TDI 2
+#define TMS 5
+#define TCK 1
+
+#define HGPIO(b) (1 << (b))
+#define ts7800_TDO HGPIO(TDO)
+#define ts7800_TDI HGPIO(TDI)
+#define ts7800_TMS HGPIO(TMS)
+#define ts7800_TCK HGPIO(TCK)
+
+#define GPIO_INPUT_MASK ((ts7800_TCK)|(ts7800_TMS)|(ts7800_TDI))
+#define GPIO_OUTPUT_MASK ts7800_TDO
+#define GPIO_BITMASK (~((ts7800_TDO)|(ts7800_TDI)|(ts7800_TMS)|(ts7800_TCK)))
+
+typedef struct
+{
+ int fd_dev_mem;
+ void *map_base;
+ size_t map_size;
+ uint32_t *gpio_base;
+ int signals;
+ uint32_t lastout;
+} ts7800_params_t;
+
+static int
+ts7800_gpio_open (urj_cable_t *cable)
+{
+ ts7800_params_t *p = cable->params;
+ off_t map_mask;
+
+ /* Open the memory device so we can access the hardware registers */
+ p->fd_dev_mem = open ("/dev/mem", O_RDWR | O_SYNC);
+ if (p->fd_dev_mem == -1)
+ {
+ urj_error_IO_set (_("unable to open /dev/mem"));
+ return URJ_STATUS_FAIL;
+ }
+
+ p->map_size = getpagesize ();
+ map_mask = p->map_size - 1;
+
+ /* Map the GPIO registers */
+ p->map_base =
+ mmap (0, p->map_size, PROT_READ | PROT_WRITE, MAP_SHARED,
+ p->fd_dev_mem, GPIO_BASE & ~map_mask);
+ if (p->map_base == MAP_FAILED)
+ {
+ urj_error_IO_set (_("unable to mmap the GPIO registers"));
+ close (p->fd_dev_mem);
+ return URJ_STATUS_FAIL;
+ }
+
+ /* Create the pointers to access the GPIO registers */
+ p->gpio_base = p->map_base;
+
+ /* Set the GPIO pins as inputs/outputs as needed for the JTAG interface */
+ p->gpio_base[GPIO_DIR] =
+ (p->gpio_base[GPIO_DIR] & GPIO_BITMASK) | GPIO_OUTPUT_MASK;
+
+ p->lastout = p->gpio_base[GPIO_OUT];
+
+ return URJ_STATUS_OK;
+}
+
+static int
+ts7800_gpio_close (urj_cable_t *cable)
+{
+ ts7800_params_t *p = cable->params;
+
+ /* Unmap the GPIO registers */
+ if (munmap (p->map_base, p->map_size) == -1)
+ {
+ urj_error_IO_set (_("unable to munmap the GPIO registers"));
+ }
+ close (p->fd_dev_mem);
+ return URJ_STATUS_OK;
+}
+
+static int
+ts7800_gpio_write (urj_cable_t *cable, uint8_t data)
+{
+ ts7800_params_t *p = cable->params;
+
+ p->gpio_base[GPIO_OUT] = p->lastout = (p->lastout & GPIO_BITMASK) | data;
+ urj_tap_cable_wait (cable);
+
+ return 0;
+}
+
+static int
+ts7800_gpio_read (urj_cable_t *cable)
+{
+ ts7800_params_t *p = cable->params;
+
+ return p->gpio_base[GPIO_IN];
+}
+
+static int
+ts7800_connect (urj_cable_t *cable, const urj_param_t *params[])
+{
+ ts7800_params_t *cable_params;
+
+ if (urj_param_num (params) > 0)
+ {
+ urj_error_set (URJ_ERROR_SYNTAX,
+ _("This cable type does not accept parameters"));
+ return URJ_STATUS_FAIL;
+ }
+
+ urj_log (URJ_LOG_LEVEL_NORMAL,
+ _("Initializing TS-7800 Built-in JTAG Chain\n"));
+
+ cable_params = malloc (sizeof *cable_params);
+ if (!cable_params)
+ {
+ urj_error_set (URJ_ERROR_OUT_OF_MEMORY, _("malloc(%zd) fails"),
+ sizeof *cable_params);
+ free (cable);
+ return URJ_STATUS_FAIL;
+ }
+
+ cable->params = cable_params;
+ cable->chain = NULL;
+ cable->delay = 1000;
+
+ return URJ_STATUS_OK;
+}
+
+static void
+ts7800_disconnect (urj_cable_t *cable)
+{
+ ts7800_gpio_close (cable);
+ urj_tap_chain_disconnect (cable->chain);
+}
+
+static void
+ts7800_cable_free (urj_cable_t *cable)
+{
+ free (cable->params);
+ free (cable);
+}
+
+static int
+ts7800_init (urj_cable_t *cable)
+{
+ ts7800_params_t *p = cable->params;
+
+ if (ts7800_gpio_open (cable) != URJ_STATUS_OK)
+ return URJ_STATUS_FAIL;
+
+ p->signals = URJ_POD_CS_TRST;
+
+ return URJ_STATUS_OK;
+}
+
+static void
+ts7800_done (urj_cable_t *cable)
+{
+ ts7800_gpio_close (cable);
+}
+
+static void
+ts7800_clock (urj_cable_t *cable, int tms, int tdi, int n)
+{
+ int bit_mask;
+ int i;
+
+ tms = tms ? 1 : 0;
+ tdi = tdi ? 1 : 0;
+
+ bit_mask = (tms << TMS) | (tdi << TDI);
+
+ for (i = 0; i < n; i++)
+ {
+ ts7800_gpio_write (cable, (0 << TCK) | bit_mask);
+ ts7800_gpio_write (cable, (1 << TCK) | bit_mask);
+ ts7800_gpio_write (cable, (0 << TCK) | bit_mask);
+ }
+}
+
+/**
+ * NOTE: This also lowers the TDI and TMS lines; is this intended?
+ */
+static int
+ts7800_get_tdo (urj_cable_t *cable)
+{
+ ts7800_params_t *p = cable->params;
+ ts7800_gpio_write (cable, p->lastout & ~(0 << TCK));
+
+ return (ts7800_gpio_read (cable) >> TDO) & 1;
+}
+
+static int
+ts7800_current_signals (urj_cable_t *cable)
+{
+ ts7800_params_t *p = cable->params;
+ int sigs = p->signals & ~(URJ_POD_CS_TMS | URJ_POD_CS_TDI | URJ_POD_CS_TCK);
+
+ if (p->lastout & (1 << TCK))
+ sigs |= URJ_POD_CS_TCK;
+ if (p->lastout & (1 << TDI))
+ sigs |= URJ_POD_CS_TDI;
+ if (p->lastout & (1 << TMS))
+ sigs |= URJ_POD_CS_TMS;
+
+ return sigs;
+}
+
+static int
+ts7800_set_signal (urj_cable_t *cable, int mask, int val)
+{
+ int prev_sigs = ts7800_current_signals (cable);
+
+ mask &= (URJ_POD_CS_TDI | URJ_POD_CS_TCK | URJ_POD_CS_TMS); // only these can be modified
+
+ if (mask != 0)
+ {
+ int sigs = (prev_sigs & ~mask) | (val & mask);
+ int tms = (sigs & URJ_POD_CS_TMS) ? (1 << TMS) : 0;
+ int tdi = (sigs & URJ_POD_CS_TDI) ? (1 << TDI) : 0;
+ int tck = (sigs & URJ_POD_CS_TCK) ? (1 << TCK) : 0;
+ ts7800_gpio_write (cable, tms | tdi | tck);
+ }
+
+ return prev_sigs;
+}
+
+static int
+ts7800_get_signal (urj_cable_t *cable, urj_pod_sigsel_t sig)
+{
+ return (ts7800_current_signals (cable) & sig) ? 1 : 0;
+}
+
+static void
+ts7800_help (urj_log_level_t ll, const char *cablename)
+{
+ urj_log (ll,
+ _("Usage: cable %s\n" "\n"), cablename);
+}
+
+urj_cable_driver_t urj_tap_cable_ts7800_driver = {
+ "ts7800",
+ N_("TS-7800 Built-in JTAG Chain"),
+ URJ_CABLE_DEVICE_OTHER,
+ { .other = ts7800_connect, },
+ ts7800_disconnect,
+ ts7800_cable_free,
+ ts7800_init,
+ ts7800_done,
+ urj_tap_cable_generic_set_frequency,
+ ts7800_clock,
+ ts7800_get_tdo,
+ urj_tap_cable_generic_transfer,
+ ts7800_set_signal,
+ ts7800_get_signal,
+ urj_tap_cable_generic_flush_one_by_one,
+ ts7800_help
+};
--- /dev/null
+/*
+ * $Id$
+ *
+ * Altera USB-Blaster<tm> Cable Driver
+ * Copyright (C) 2006 K. Waschk
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Kolja Waschk, 2006; http://www.ixo.de
+ *
+ */
+
+#include <sysdep.h>
+
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+
+#include <urjtag/cable.h>
+#include <urjtag/chain.h>
+#include <urjtag/cmd.h>
+
+#include "generic.h"
+#include "generic_usbconn.h"
+
+#include <urjtag/usbconn.h>
+#include "usbconn/libftdx.h"
+
+#include "cmd_xfer.h"
+
+
+#define TCK 0
+#define TMS 1
+#define TDI 4
+#define READ 6
+#define SHMODE 7
+#define OTHERS ((1<<2)|(1<<3)|(1<<5))
+
+#define TDO 0
+
+#define FIXED_FREQUENCY 12000000L
+
+/* The default driver if not specified otherwise during connect */
+#ifdef ENABLE_LOWLEVEL_FTD2XX
+#define DEFAULT_DRIVER "ftd2xx"
+#else
+#define DEFAULT_DRIVER "ftdi"
+#endif
+
+typedef struct
+{
+ urj_tap_cable_cx_cmd_root_t cmd_root;
+} params_t;
+
+static int
+usbblaster_connect (urj_cable_t *cable, const urj_param_t *params[])
+{
+ params_t *cable_params;
+
+ /* perform urj_tap_cable_generic_usbconn_connect */
+ if (urj_tap_cable_generic_usbconn_connect (cable, params) != URJ_STATUS_OK)
+ return URJ_STATUS_FAIL;
+
+ cable_params = malloc (sizeof (params_t));
+ if (!cable_params)
+ {
+ urj_error_set (URJ_ERROR_OUT_OF_MEMORY, _("malloc(%zd) fails"),
+ sizeof (params_t));
+ /* NOTE:
+ * Call the underlying usbport driver (*free) routine directly
+ * not urj_tap_cable_generic_usbconn_free() since it also free's cable->params
+ * (which is not established) and cable (which the caller will do)
+ */
+ cable->link.usb->driver->free (cable->link.usb);
+ return URJ_STATUS_FAIL;
+ }
+
+ urj_tap_cable_cx_cmd_init (&(cable_params->cmd_root));
+
+ /* exchange generic cable parameters with our private parameter set */
+ free (cable->params);
+ cable->params = cable_params;
+
+ return URJ_STATUS_OK;
+}
+
+static void
+usbblaster_set_frequency (urj_cable_t *cable, uint32_t new_frequency)
+{
+ if (new_frequency != FIXED_FREQUENCY)
+ urj_warning (_("USB-Blaster frequency is fixed to %ld Hz\n"),
+ FIXED_FREQUENCY);
+
+ cable->frequency = FIXED_FREQUENCY;
+}
+
+static int
+usbblaster_init (urj_cable_t *cable)
+{
+ int i;
+ params_t *params = (params_t *) cable->params;
+ urj_tap_cable_cx_cmd_root_t *cmd_root = &(params->cmd_root);
+
+ if (urj_tap_usbconn_open (cable->link.usb) != URJ_STATUS_OK)
+ return URJ_STATUS_FAIL;
+
+ urj_tap_cable_cx_cmd_queue (cmd_root, 0);
+ for (i = 0; i < 64; i++)
+ urj_tap_cable_cx_cmd_push (cmd_root, 0);
+
+ urj_tap_cable_cx_xfer (cmd_root, NULL, cable, URJ_TAP_CABLE_COMPLETELY);
+
+ usbblaster_set_frequency (cable, FIXED_FREQUENCY);
+
+ return URJ_STATUS_OK;
+}
+
+static void
+usbblaster_cable_free (urj_cable_t *cable)
+{
+ params_t *params = (params_t *) cable->params;
+
+ urj_tap_cable_cx_cmd_deinit (&(params->cmd_root));
+
+ urj_tap_cable_generic_usbconn_free (cable);
+}
+
+static void
+usbblaster_clock_schedule (urj_cable_t *cable, int tms, int tdi, int n)
+{
+ params_t *params = (params_t *) cable->params;
+ urj_tap_cable_cx_cmd_root_t *cmd_root = &(params->cmd_root);
+ int i, m;
+
+ tms = tms ? (1 << TMS) : 0;
+ tdi = tdi ? (1 << TDI) : 0;
+
+ // urj_log (URJ_LOG_LEVEL_COMM, "clock: %d %d %d\n", tms, tdi, n);
+
+ m = n;
+ if (tms == 0 && m >= 8)
+ {
+ unsigned char tdis = tdi ? 0xFF : 0;
+
+ urj_tap_cable_cx_cmd_queue (cmd_root, 0);
+ while (m >= 8)
+ {
+ int i;
+ int chunkbytes = (m >> 3);
+ if (chunkbytes > 63)
+ chunkbytes = 63;
+
+ if (urj_tap_cable_cx_cmd_space (cmd_root,
+ URJ_USBCONN_FTDX_MAXSEND)
+ < chunkbytes + 1)
+ {
+ /* no space left for next clocking command
+ transfer queued commands to device and read receive data
+ to internal buffer */
+ urj_tap_cable_cx_xfer (cmd_root, NULL, cable,
+ URJ_TAP_CABLE_COMPLETELY);
+ urj_tap_cable_cx_cmd_queue (cmd_root, 0);
+ }
+
+
+ urj_tap_cable_cx_cmd_push (cmd_root,
+ (1 << SHMODE) | (0 << READ) |
+ chunkbytes);
+
+ for (i = 0; i < chunkbytes; i++)
+ {
+ urj_tap_cable_cx_cmd_push (cmd_root, tdis);
+ }
+
+ m -= (chunkbytes << 3);
+ }
+ }
+
+ for (i = 0; i < m; i++)
+ {
+ urj_tap_cable_cx_cmd_queue (cmd_root, 0);
+ urj_tap_cable_cx_cmd_push (cmd_root, OTHERS | (0 << TCK) | tms | tdi);
+ urj_tap_cable_cx_cmd_push (cmd_root, OTHERS | (1 << TCK) | tms | tdi);
+ }
+}
+
+static void
+usbblaster_clock (urj_cable_t *cable, int tms, int tdi, int n)
+{
+ params_t *params = (params_t *) cable->params;
+
+ usbblaster_clock_schedule (cable, tms, tdi, n);
+ urj_tap_cable_cx_xfer (&(params->cmd_root), NULL, cable,
+ URJ_TAP_CABLE_COMPLETELY);
+}
+
+static void
+usbblaster_get_tdo_schedule (urj_cable_t *cable)
+{
+ params_t *params = (params_t *) cable->params;
+ urj_tap_cable_cx_cmd_root_t *cmd_root = &(params->cmd_root);
+
+ urj_tap_cable_cx_cmd_queue (cmd_root, 1);
+ urj_tap_cable_cx_cmd_push (cmd_root, OTHERS); /* TCK low */
+ urj_tap_cable_cx_cmd_push (cmd_root, OTHERS | (1 << READ)); /* TCK low */
+}
+
+static int
+usbblaster_get_tdo_finish (urj_cable_t *cable)
+{
+#if 0
+ char x = (urj_tap_cable_cx_xfer_recv (cable) & (1 << TDO)) ? 1 : 0;
+ urj_log (URJ_LOG_LEVEL_COMM, "GetTDO %d\n", x);
+ return x;
+#else
+ return (urj_tap_cable_cx_xfer_recv (cable) & (1 << TDO)) ? 1 : 0;
+#endif
+}
+
+static int
+usbblaster_get_tdo (urj_cable_t *cable)
+{
+ params_t *params = (params_t *) cable->params;
+
+ usbblaster_get_tdo_schedule (cable);
+ urj_tap_cable_cx_xfer (&(params->cmd_root), NULL, cable,
+ URJ_TAP_CABLE_COMPLETELY);
+ return usbblaster_get_tdo_finish (cable);
+}
+
+static int
+usbblaster_set_signal (urj_cable_t *cable, int mask, int val)
+{
+ return 1;
+}
+
+static void
+usbblaster_transfer_schedule (urj_cable_t *cable, int len, const char *in,
+ char *out)
+{
+ params_t *params = (params_t *) cable->params;
+ urj_tap_cable_cx_cmd_root_t *cmd_root = &(params->cmd_root);
+ int in_offset = 0;
+
+ urj_tap_cable_cx_cmd_queue (cmd_root, 0);
+ urj_tap_cable_cx_cmd_push (cmd_root, OTHERS); /* TCK low */
+
+#if 0
+ {
+ int o;
+ urj_log (URJ_LOG_LEVEL_COMM, "%d in: ", len);
+ for (o = 0; o < len; o++)
+ urj_log (URJ_LOG_LEVEL_COMM, "%c", in[o] ? '1' : '0');
+ urj_log (URJ_LOG_LEVEL_COMM, "\n");
+ }
+#endif
+
+ while (len - in_offset >= 8)
+ {
+ int i;
+ int chunkbytes = ((len - in_offset) >> 3);
+ if (chunkbytes > 63)
+ chunkbytes = 63;
+
+ if (out)
+ {
+ urj_tap_cable_cx_cmd_queue (cmd_root, chunkbytes);
+ urj_tap_cable_cx_cmd_push (cmd_root,
+ (1 << SHMODE) | (1 << READ) |
+ chunkbytes);
+ }
+ else
+ {
+ urj_tap_cable_cx_cmd_queue (cmd_root, 0);
+ urj_tap_cable_cx_cmd_push (cmd_root,
+ (1 << SHMODE) | (0 << READ) |
+ chunkbytes);
+ }
+
+ for (i = 0; i < chunkbytes; i++)
+ {
+ int j;
+ unsigned char b = 0;
+ for (j = 1; j < 256; j <<= 1)
+ if (in[in_offset++])
+ b |= j;
+ urj_tap_cable_cx_cmd_push (cmd_root, b);
+ }
+ }
+
+ while (len > in_offset)
+ {
+ char tdi = in[in_offset++] ? 1 : 0;
+
+ urj_tap_cable_cx_cmd_queue (cmd_root, out ? 1 : 0);
+ urj_tap_cable_cx_cmd_push (cmd_root, OTHERS | (tdi << TDI)); /* TCK low */
+ urj_tap_cable_cx_cmd_push (cmd_root,
+ OTHERS | ((out) ? (1 << READ) : 0) | (1 <<
+ TCK)
+ | (tdi << TDI));
+ }
+}
+
+static int
+usbblaster_transfer_finish (urj_cable_t *cable, int len, char *out)
+{
+ params_t *params = (params_t *) cable->params;
+ urj_tap_cable_cx_cmd_root_t *cmd_root = &(params->cmd_root);
+ int out_offset = 0;
+
+ if (out == NULL)
+ return 0;
+
+ while (len - out_offset >= 8)
+ {
+ int i;
+ int chunkbytes = ((len - out_offset) >> 3);
+ if (chunkbytes > 63)
+ chunkbytes = 63;
+
+ if (out)
+ {
+ urj_tap_cable_cx_xfer (cmd_root, NULL, cable,
+ URJ_TAP_CABLE_COMPLETELY);
+
+ for (i = 0; i < chunkbytes; i++)
+ {
+ int j;
+ unsigned char b = urj_tap_cable_cx_xfer_recv (cable);
+#if 0
+ urj_log (URJ_LOG_LEVEL_COMM, "read byte: %02X\n", b);
+#endif
+
+ for (j = 1; j < 256; j <<= 1)
+ out[out_offset++] = (b & j) ? 1 : 0;
+ }
+ }
+ }
+
+ while (len > out_offset)
+ out[out_offset++] =
+ (urj_tap_cable_cx_xfer_recv (cable) & (1 << TDO)) ? 1 : 0;
+
+#if 0
+ {
+ int o;
+ urj_log (URJ_LOG_LEVEL_COMM, "%d out: ", len);
+ for (o = 0; o < len; o++)
+ urj_log (URJ_LOG_LEVEL_COMM, "%c", out[o] ? '1' : '0');
+ urj_log (URJ_LOG_LEVEL_COMM, "\n");
+ }
+#endif
+
+ return 0;
+}
+
+static int
+usbblaster_transfer (urj_cable_t *cable, int len, const char *in, char *out)
+{
+ params_t *params = (params_t *) cable->params;
+
+ usbblaster_transfer_schedule (cable, len, in, out);
+ urj_tap_cable_cx_xfer (&(params->cmd_root), NULL, cable,
+ URJ_TAP_CABLE_COMPLETELY);
+ return usbblaster_transfer_finish (cable, len, out);
+}
+
+static void
+usbblaster_flush (urj_cable_t *cable, urj_cable_flush_amount_t how_much)
+{
+ params_t *params = (params_t *) cable->params;
+
+ if (how_much == URJ_TAP_CABLE_OPTIONALLY)
+ return;
+
+ if (cable->todo.num_items == 0)
+ urj_tap_cable_cx_xfer (&(params->cmd_root), NULL, cable, how_much);
+
+ while (cable->todo.num_items > 0)
+ {
+ int i, j, n;
+
+ for (j = i = cable->todo.next_item, n = 0; n < cable->todo.num_items;
+ n++)
+ {
+
+ switch (cable->todo.data[i].action)
+ {
+ case URJ_TAP_CABLE_CLOCK:
+ usbblaster_clock_schedule (cable,
+ cable->todo.data[i].arg.clock.tms,
+ cable->todo.data[i].arg.clock.tdi,
+ cable->todo.data[i].arg.clock.n);
+ break;
+
+ case URJ_TAP_CABLE_GET_TDO:
+ usbblaster_get_tdo_schedule (cable);
+ break;
+
+ case URJ_TAP_CABLE_TRANSFER:
+ usbblaster_transfer_schedule (cable,
+ cable->todo.data[i].arg.
+ transfer.len,
+ cable->todo.data[i].arg.
+ transfer.in,
+ cable->todo.data[i].arg.
+ transfer.out);
+ break;
+
+ default:
+ break;
+ }
+
+ i++;
+ if (i >= cable->todo.max_items)
+ i = 0;
+ }
+
+ urj_tap_cable_cx_xfer (&(params->cmd_root), NULL, cable, how_much);
+
+ while (j != i)
+ {
+ switch (cable->todo.data[j].action)
+ {
+ case URJ_TAP_CABLE_GET_TDO:
+ {
+ int m;
+ m = urj_tap_cable_add_queue_item (cable, &(cable->done));
+ cable->done.data[m].action = URJ_TAP_CABLE_GET_TDO;
+ cable->done.data[m].arg.value.val =
+ usbblaster_get_tdo_finish (cable);
+ break;
+ }
+ case URJ_TAP_CABLE_GET_SIGNAL:
+ {
+ int m =
+ urj_tap_cable_add_queue_item (cable, &(cable->done));
+ cable->done.data[m].action = URJ_TAP_CABLE_GET_SIGNAL;
+ cable->done.data[m].arg.value.sig =
+ cable->todo.data[j].arg.value.sig;
+ if (cable->todo.data[j].arg.value.sig == URJ_POD_CS_TRST)
+ cable->done.data[m].arg.value.val = 1;
+ else
+ cable->done.data[m].arg.value.val = -1; // not supported yet
+ break;
+ }
+ case URJ_TAP_CABLE_TRANSFER:
+ {
+ int r = usbblaster_transfer_finish (cable,
+ cable->todo.data[j].
+ arg.transfer.len,
+ cable->todo.data[j].
+ arg.transfer.out);
+ free (cable->todo.data[j].arg.transfer.in);
+ if (cable->todo.data[j].arg.transfer.out)
+ {
+ int m = urj_tap_cable_add_queue_item (cable,
+ &(cable->done));
+ if (m < 0)
+ {
+ // retain error state
+ // urj_log (URJ_LOG_LEVEL_NORMAL, "out of memory!\n");
+ }
+ cable->done.data[m].action = URJ_TAP_CABLE_TRANSFER;
+ cable->done.data[m].arg.xferred.len =
+ cable->todo.data[j].arg.transfer.len;
+ cable->done.data[m].arg.xferred.res = r;
+ cable->done.data[m].arg.xferred.out =
+ cable->todo.data[j].arg.transfer.out;
+ }
+ }
+ default:
+ break;
+ }
+
+ j++;
+ if (j >= cable->todo.max_items)
+ j = 0;
+ cable->todo.num_items--;
+ }
+
+ cable->todo.next_item = i;
+ }
+}
+
+static void
+usbblaster_help (urj_log_level_t ll, const char *cablename)
+{
+ urj_log (ll,
+ _("Usage: cable %s [vid=VID] [pid=PID] [desc=DESC] [driver=DRIVER]\n"
+ "\n" "VID vendor ID (hex, e.g. 0abc)\n"
+ "PID product ID (hex, e.g. 0abc)\n"
+ "DESC Some string to match in description or serial no.\n"
+ "DRIVER usbconn driver, either ftdi or ftd2xx\n"
+ " defaults to %s if not specified\n" "\n"), cablename,
+ DEFAULT_DRIVER);
+}
+
+urj_cable_driver_t urj_tap_cable_usbblaster_driver = {
+ "UsbBlaster",
+ N_("Altera USB-Blaster Cable"),
+ URJ_CABLE_DEVICE_USB,
+ { .usb = usbblaster_connect, },
+ urj_tap_cable_generic_disconnect,
+ usbblaster_cable_free,
+ usbblaster_init,
+ urj_tap_cable_generic_usbconn_done,
+ usbblaster_set_frequency,
+ usbblaster_clock,
+ usbblaster_get_tdo,
+ usbblaster_transfer,
+ usbblaster_set_signal,
+ urj_tap_cable_generic_get_signal,
+// urj_tap_cable_generic_flush_one_by_one,
+// urj_tap_cable_generic_flush_using_transfer,
+ usbblaster_flush,
+ usbblaster_help,
+};
+urj_usbconn_cable_t urj_tap_cable_usbconn_usbblaster_ftdi = {
+ "UsbBlaster", /* cable name */
+ NULL, /* string pattern, not used */
+ "ftdi", /* default usbconn driver */
+ 0x09FB, /* VID */
+ 0x6001 /* PID */
+};
+urj_usbconn_cable_t urj_tap_cable_usbconn_cubic_cyclonium_ftdi = {
+ "UsbBlaster", /* cable name */
+ NULL, /* string pattern, not used */
+ "ftdi", /* default usbconn driver */
+ 0x09FB, /* VID */
+ 0x6002 /* PID */
+};
+urj_usbconn_cable_t urj_tap_cable_usbconn_nios_eval_ftdi = {
+ "UsbBlaster", /* cable name */
+ NULL, /* string pattern, not used */
+ "ftdi", /* default usbconn driver */
+ 0x09FB, /* VID */
+ 0x6003 /* PID */
+};
+urj_usbconn_cable_t urj_tap_cable_usbconn_usb_jtag_ftdi = {
+ "UsbBlaster", /* cable name */
+ NULL, /* string pattern, not used */
+ "ftdi", /* default usbconn driver */
+ 0x16C0, /* VID */
+ 0x06AD /* PID */
+};
+urj_usbconn_cable_t urj_tap_cable_usbconn_usbblaster_ftd2xx = {
+ "UsbBlaster", /* cable name */
+ NULL, /* string pattern, not used */
+ "ftd2xx", /* default usbconn driver */
+ 0x09FB, /* VID */
+ 0x6001 /* PID */
+};
+urj_usbconn_cable_t urj_tap_cable_usbconn_cubic_cyclonium_ftd2xx = {
+ "UsbBlaster", /* cable name */
+ NULL, /* string pattern, not used */
+ "ftd2xx", /* default usbconn driver */
+ 0x09FB, /* VID */
+ 0x6002 /* PID */
+};
+urj_usbconn_cable_t urj_tap_cable_usbconn_nios_eval_ftd2xx = {
+ "UsbBlaster", /* cable name */
+ NULL, /* string pattern, not used */
+ "ftdi", /* default usbconn driver */
+ 0x09FB, /* VID */
+ 0x6003 /* PID */
+};
+urj_usbconn_cable_t urj_tap_cable_usbconn_usb_jtag_ftd2xx = {
+ "UsbBlaster", /* cable name */
+ NULL, /* string pattern, not used */
+ "ftd2xx", /* default usbconn driver */
+ 0x16C0, /* VID */
+ 0x06AD /* PID */
+};
--- /dev/null
+/*
+ * $Id: vision_ep9307.c $
+ *
+ * Vision EP9307 SoM GPIO JTAG Cable Driver
+ * Copyright (C) 2007, 2008 H Hartley Sweeten
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by H Hartley Sweeten <hsweeten@visionengravers.com>, 2007, 2008.
+ *
+ */
+
+#include <sysdep.h>
+
+#include <stdlib.h>
+#include <string.h>
+
+#include <sys/types.h>
+#include <sys/stat.h>
+#include <sys/mman.h>
+#include <fcntl.h>
+#include <unistd.h>
+
+#include <urjtag/cable.h>
+#include <urjtag/chain.h>
+
+#include "generic.h"
+
+#include <urjtag/cmd.h>
+
+#define SYSCON_BASE 0x80930000
+#define SYSCON_DEVICE_CONFIG 0x80
+#define SYSCON_SWLOCK 0xC0
+
+#define SYSCON_DEVCFG_HonIDE (1 << 11)
+
+#define GPIO_BASE 0x80840000
+#define GPIO_PHDR 0x40
+#define GPIO_PHDDR 0x44
+
+#define TDO 4
+#define TDI 6
+#define TMS 5
+#define TCK 7
+#define TRST 3
+
+#define HGPIO(b) (1 << (b))
+#define EP9307_TDO HGPIO(TDO)
+#define EP9307_TDI HGPIO(TDI)
+#define EP9307_TMS HGPIO(TMS)
+#define EP9307_TCK HGPIO(TCK)
+#define EP9307_TRST HGPIO(TRST)
+
+#define GPIO_INPUT_MASK ((EP9307_TCK)|(EP9307_TMS)|(EP9307_TDI)|(EP9307_TRST))
+#define GPIO_OUTPUT_MASK (~(EP9307_TDO))
+#define GPIO_BITMASK (~((EP9307_TDO)|(EP9307_TDI)|(EP9307_TMS)|(EP9307_TCK)|(EP9307_TRST)))
+
+typedef struct
+{
+ int fd_dev_mem;
+ void *map_base;
+ size_t map_size;
+ uint32_t *gpio_PHDR;
+ uint32_t lastout;
+ int signals;
+} ep9307_params_t;
+
+static int
+ep9307_gpio_open (urj_cable_t *cable)
+{
+ ep9307_params_t *p = cable->params;
+ off_t map_mask;
+ uint32_t *syscon_devcfg;
+ uint32_t *syscon_sysswlock;
+ uint32_t *gpio_PHDDR;
+ uint32_t tmp;
+
+ /* Open the memory device so we can access the hardware registers */
+ p->fd_dev_mem = open ("/dev/mem", O_RDWR | O_SYNC);
+ if (p->fd_dev_mem == -1)
+ {
+ urj_error_IO_set (_("unable to open /dev/mem"));
+ return URJ_STATUS_FAIL;
+ }
+
+ p->map_size = getpagesize ();
+ map_mask = p->map_size - 1;
+
+ /* Map the System Controller registers */
+ p->map_base = mmap (0, p->map_size, PROT_READ | PROT_WRITE, MAP_SHARED,
+ p->fd_dev_mem, SYSCON_BASE & ~map_mask);
+ if (p->map_base == MAP_FAILED)
+ {
+ urj_error_IO_set (_("unable to mmap the System Control registers"));
+ close (p->fd_dev_mem);
+ return URJ_STATUS_FAIL;
+ }
+
+ /* Create the pointers to access the DeviceCfg and SysSWLock registers */
+ syscon_devcfg = (uint32_t *) ((char *) p->map_base + SYSCON_DEVICE_CONFIG);
+ syscon_sysswlock = (uint32_t *) ((char *) p->map_base + SYSCON_SWLOCK);
+
+ /* Set the HonIDE bit in the DeviceCfg register so we can use Port H as GPIO */
+ tmp = *((uint32_t *) syscon_devcfg);
+ tmp |= SYSCON_DEVCFG_HonIDE;
+
+ /* The DeviceCfg register has a SoftwareLock; unlock it first */
+ *((uint32_t *) syscon_sysswlock) = 0xAA;
+ *((uint32_t *) syscon_devcfg) = tmp;
+
+ /* Unmap the System Controller registers */
+ if (munmap (p->map_base, p->map_size) == -1)
+ {
+ urj_error_IO_set (_("unable to munmap the System Controller registers"));
+ close (p->fd_dev_mem);
+ return URJ_STATUS_FAIL;
+ }
+
+ /* Map the GPIO registers */
+ p->map_base =
+ mmap (0, p->map_size, PROT_READ | PROT_WRITE, MAP_SHARED,
+ p->fd_dev_mem, GPIO_BASE & ~map_mask);
+ if (p->map_base == MAP_FAILED)
+ {
+ urj_error_IO_set (_("unable to mmap the GPIO registers"));
+ close (p->fd_dev_mem);
+ return URJ_STATUS_FAIL;
+ }
+
+ /* Create the pointers to access the PHDR and PHDDR registers */
+ p->gpio_PHDR = (uint32_t *) ((char *) p->map_base + GPIO_PHDR);
+ gpio_PHDDR = (uint32_t *) ((char *) p->map_base + GPIO_PHDDR);
+
+ /* Set the GPIO pins as inputs/outputs as needed for the JTAG interface */
+ tmp = *((uint32_t *) gpio_PHDDR);
+ tmp |= GPIO_INPUT_MASK;
+ tmp &= GPIO_OUTPUT_MASK;
+ *((uint32_t *) gpio_PHDDR) = tmp;
+
+ return URJ_STATUS_OK;
+}
+
+static int
+ep9307_gpio_close (urj_cable_t *cable)
+{
+ ep9307_params_t *p = cable->params;
+
+ /* Unmap the GPIO registers */
+ if (munmap (p->map_base, p->map_size) == -1)
+ {
+ urj_error_IO_set (_("unable to munmap the GPIO registers"));
+ }
+ close (p->fd_dev_mem);
+ return URJ_STATUS_OK;
+}
+
+static int
+ep9307_gpio_write (urj_cable_t *cable, uint8_t data)
+{
+ ep9307_params_t *p = cable->params;
+ uint32_t tmp;
+
+ tmp = *p->gpio_PHDR;
+ tmp &= ~GPIO_OUTPUT_MASK;
+ tmp |= data;
+ *p->gpio_PHDR = tmp;
+ p->lastout = tmp;
+
+ return 0;
+}
+
+static int
+ep9307_gpio_read (urj_cable_t *cable)
+{
+ ep9307_params_t *p = cable->params;
+ uint32_t tmp;
+
+ tmp = *p->gpio_PHDR;
+
+ return tmp;
+}
+
+static int
+ep9307_connect (urj_cable_t *cable, const urj_param_t *params[])
+{
+ ep9307_params_t *cable_params;
+
+ if (urj_param_num (params) != 0)
+ {
+ urj_error_set (URJ_ERROR_SYNTAX,
+ _("This cable type does not accept parameters"));
+ return URJ_STATUS_FAIL;
+ }
+
+ urj_log (URJ_LOG_LEVEL_NORMAL,
+ _("Initializing Vision EP9307 SoM GPIO JTAG Cable\n"));
+
+ cable_params = malloc (sizeof *cable_params);
+ if (!cable_params)
+ {
+ urj_error_set (URJ_ERROR_OUT_OF_MEMORY, _("malloc(%zd) fails"),
+ sizeof *cable_params);
+ return URJ_STATUS_FAIL;
+ }
+
+ cable->link.port = NULL;
+ cable->params = cable_params;
+ cable->chain = NULL;
+
+ return URJ_STATUS_OK;
+}
+
+static void
+ep9307_cable_free (urj_cable_t *cable)
+{
+ free (cable->params);
+ free (cable);
+}
+
+static int
+ep9307_init (urj_cable_t *cable)
+{
+ ep9307_params_t *p = cable->params;
+
+ if (ep9307_gpio_open (cable) != URJ_STATUS_OK)
+ return URJ_STATUS_FAIL;
+
+ ep9307_gpio_write (cable, 1 << TRST);
+ urj_tap_cable_wait (cable);
+ p->signals = URJ_POD_CS_TRST;
+
+ return URJ_STATUS_OK;
+}
+
+static void
+ep9307_done (urj_cable_t *cable)
+{
+ ep9307_gpio_close (cable);
+}
+
+static void
+ep9307_clock (urj_cable_t *cable, int tms, int tdi, int n)
+{
+ ep9307_params_t *p = cable->params;
+ int bit_mask;
+ int i;
+ int trst;
+
+ tms = tms ? 1 : 0;
+ tdi = tdi ? 1 : 0;
+ trst = (p->signals & URJ_POD_CS_TRST) ? 1 : 0;
+
+ bit_mask = (tms << TMS) | (tdi << TDI) | (trst << TRST);
+
+ for (i = 0; i < n; i++)
+ {
+ ep9307_gpio_write (cable, (0 << TCK) | bit_mask);
+ urj_tap_cable_wait (cable);
+ ep9307_gpio_write (cable, (1 << TCK) | bit_mask);
+ urj_tap_cable_wait (cable);
+ }
+}
+
+/**
+ * NOTE: This also lowers the TDI and TMS lines; is this intended?
+ */
+static int
+ep9307_get_tdo (urj_cable_t *cable)
+{
+ ep9307_params_t *p = cable->params;
+ int trst;
+
+ trst = (p->signals & URJ_POD_CS_TRST) ? 1 : 0;
+
+ ep9307_gpio_write (cable, (0 << TCK) | (trst << TRST));
+ urj_tap_cable_wait (cable);
+
+ return (ep9307_gpio_read (cable) >> TDO) & 1;
+}
+
+static int
+ep9307_current_signals (urj_cable_t *cable)
+{
+ ep9307_params_t *p = cable->params;
+
+ int sigs = p->signals & ~(URJ_POD_CS_TMS | URJ_POD_CS_TDI | URJ_POD_CS_TCK
+ | URJ_POD_CS_TRST);
+ if (p->lastout & (1 << TCK))
+ sigs |= URJ_POD_CS_TCK;
+ if (p->lastout & (1 << TDI))
+ sigs |= URJ_POD_CS_TDI;
+ if (p->lastout & (1 << TMS))
+ sigs |= URJ_POD_CS_TMS;
+ if (p->lastout & (1 << TRST))
+ sigs |= URJ_POD_CS_TRST;
+
+ return sigs;
+}
+
+static int
+ep9307_set_signal (urj_cable_t *cable, int mask, int val)
+{
+ int prev_sigs = ep9307_current_signals (cable);
+
+ mask &= (URJ_POD_CS_TMS | URJ_POD_CS_TDI | URJ_POD_CS_TCK | URJ_POD_CS_TRST); // only these can be modified
+
+ if (mask != 0)
+ {
+ int sigs = (prev_sigs & ~mask) | (val & mask);
+ int tms = (sigs & URJ_POD_CS_TMS) ? (1 << TMS) : 0;
+ int tdi = (sigs & URJ_POD_CS_TDI) ? (1 << TDI) : 0;
+ int tck = (sigs & URJ_POD_CS_TCK) ? (1 << TCK) : 0;
+ int trst = (sigs & URJ_POD_CS_TRST) ? (1 << TRST) : 0;
+ ep9307_gpio_write (cable, tms | tdi | tck | trst);
+ }
+
+ return prev_sigs;
+}
+
+static int
+ep9307_get_signal (urj_cable_t *cable, urj_pod_sigsel_t sig)
+{
+ return (ep9307_current_signals (cable) & sig) ? 1 : 0;
+}
+
+static void
+ep9307_help (urj_log_level_t ll, const char *cablename)
+{
+ urj_log (ll, _("Usage: cable %s\n" "\n"), cablename);
+}
+
+urj_cable_driver_t urj_tap_cable_ep9307_driver = {
+ "EP9307",
+ N_("Vision EP9307 SoM GPIO JTAG Cable"),
+ URJ_CABLE_DEVICE_OTHER,
+ { .other = ep9307_connect, },
+ urj_tap_cable_generic_disconnect,
+ ep9307_cable_free,
+ ep9307_init,
+ ep9307_done,
+ urj_tap_cable_generic_set_frequency,
+ ep9307_clock,
+ ep9307_get_tdo,
+ urj_tap_cable_generic_transfer,
+ ep9307_set_signal,
+ ep9307_get_signal,
+ urj_tap_cable_generic_flush_one_by_one,
+ ep9307_help
+};
--- /dev/null
+/*
+ * $Id$
+ *
+ * Macraigor Wiggler JTAG Cable Driver
+ * Copyright (C) 2002, 2003 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2002, 2003.
+ *
+ * Documentation:
+ * [1] http://www.ocdemon.net/
+ * [2] http://jtag-arm9.sourceforge.net/hardware.html
+ *
+ */
+
+#include <sysdep.h>
+
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+#include <ctype.h>
+
+#include <urjtag/cable.h>
+#include <urjtag/parport.h>
+#include <urjtag/chain.h>
+
+#include "generic.h"
+#include "generic_parport.h"
+
+#include <urjtag/cmd.h>
+
+/*
+ * Bit <-> pin mapping of an original Wiggler
+ * This is the default when no mapping is specified for wiggler_connect( )
+ *
+ * data D[7:0] (pins 9:2)
+ */
+#define nTRST 4 /* nTRST is not inverted in the cable */
+#define TDI 3
+#define TCK 2
+#define TMS 1
+#define nSRESET 0 /* sRESET is inverted in the cable */
+
+/*
+ * 7 - BUSY (pin 11)
+ * 6 - ACK (pin 10)
+ * 5 - PE (pin 12)
+ * 4 - SEL (pin 13)
+ * 3 - ERROR (pin 15)
+ */
+#define TDO 7
+
+
+/* macros used to stringify the defines above */
+#define xstr(s) str(s)
+#define str(s) #s
+static const char *std_wgl_map = xstr (TDO) ","
+ xstr (nTRST) ","
+ xstr (TDI) ","
+ xstr (TCK) ","
+ xstr (TMS) ","
+ "#" xstr (nSRESET);
+
+
+/* private parameters of this cable driver */
+typedef struct
+{
+ int signals;
+ int trst_lvl;
+ int srst_act, srst_inact;
+ int tms_act, tms_inact;
+ int tck_act, tck_inact;
+ int tdi_act, tdi_inact;
+ int tdo_act, tdo_inact;
+ int trst_act, trst_inact;
+ int unused_bits;
+} wiggler_params_t;
+
+
+/* access macros for the parameters */
+#define PRM_SIGNALS(cable) ((wiggler_params_t *) (cable)->params)->signals
+#define PRM_TRST_LVL(cable) ((wiggler_params_t *) (cable)->params)->trst_lvl
+#define PRM_SRST_ACT(cable) ((wiggler_params_t *) (cable)->params)->srst_act
+#define PRM_SRST_INACT(cable) ((wiggler_params_t *) (cable)->params)->srst_inact
+#define PRM_TMS_ACT(cable) ((wiggler_params_t *) (cable)->params)->tms_act
+#define PRM_TMS_INACT(cable) ((wiggler_params_t *) (cable)->params)->tms_inact
+#define PRM_TCK_ACT(cable) ((wiggler_params_t *) (cable)->params)->tck_act
+#define PRM_TCK_INACT(cable) ((wiggler_params_t *) (cable)->params)->tck_inact
+#define PRM_TDI_ACT(cable) ((wiggler_params_t *) (cable)->params)->tdi_act
+#define PRM_TDI_INACT(cable) ((wiggler_params_t *) (cable)->params)->tdi_inact
+#define PRM_TDO_ACT(cable) ((wiggler_params_t *) (cable)->params)->tdo_act
+#define PRM_TDO_INACT(cable) ((wiggler_params_t *) (cable)->params)->tdo_inact
+#define PRM_TRST_ACT(cable) ((wiggler_params_t *) (cable)->params)->trst_act
+#define PRM_TRST_INACT(cable) ((wiggler_params_t *) (cable)->params)->trst_inact
+#define PRM_UNUSED_BITS(cable) ((wiggler_params_t *) (cable)->params)->unused_bits
+
+
+
+static int map_pin (const char *pin, int *act, int *inact)
+{
+ int bitnum;
+ int inverted = 0;
+
+ if (*pin == '#')
+ {
+ inverted = 1;
+ pin++;
+ }
+
+ if (!isdigit (*pin))
+ {
+ urj_error_set (URJ_ERROR_SYNTAX, "should be digit: '%s'", pin);
+ return -1;
+ }
+
+ bitnum = atoi (pin) % 8;
+
+ bitnum = 1 << bitnum;
+
+ *act = inverted ? 0 : bitnum;
+ *inact = inverted ? bitnum : 0;
+
+ return 0;
+}
+
+
+static int
+set_mapping (const char *bitmap, urj_cable_t *cable)
+{
+ const char delim = ',';
+ int syntax = 0;
+ const char *tdo, *trst, *tdi, *tck, *tms, *srst;
+
+ /* assign mappings for each pin */
+ if ((tdo = bitmap))
+ if ((trst = strchr (tdo, delim)))
+ {
+ trst++;
+ if ((tdi = strchr (trst, delim)))
+ {
+ tdi++;
+ if ((tck = strchr (tdi, delim)))
+ {
+ tck++;
+ if ((tms = strchr (tck, delim)))
+ {
+ tms++;
+ if ((srst = strchr (tms, delim)))
+ {
+ srst++;
+ syntax = 1;
+ }
+ }
+ }
+ }
+ }
+
+ if (!syntax)
+ {
+ urj_error_set (URJ_ERROR_SYNTAX, "pin mapping");
+ return -1;
+ }
+
+ if (map_pin (tdo, &(PRM_TDO_ACT (cable)), &(PRM_TDO_INACT (cable))) != 0)
+ return -1;
+ if (map_pin (trst, &(PRM_TRST_ACT (cable)), &(PRM_TRST_INACT (cable))) != 0)
+ return -1;
+ if (map_pin (tdi, &(PRM_TDI_ACT (cable)), &(PRM_TDI_INACT (cable))) != 0)
+ return -1;
+ if (map_pin (tck, &(PRM_TCK_ACT (cable)), &(PRM_TCK_INACT (cable))) != 0)
+ return -1;
+ if (map_pin (tms, &(PRM_TMS_ACT (cable)), &(PRM_TMS_INACT (cable))) != 0)
+ return -1;
+ if (map_pin (srst, &(PRM_SRST_ACT (cable)), &(PRM_SRST_INACT (cable))) != 0)
+ return -1;
+
+ return 0;
+}
+
+
+static int
+wiggler_connect (urj_cable_t *cable, urj_cable_parport_devtype_t devtype,
+ const char *devname, const urj_param_t *params[])
+{
+ const urj_param_t *param_bitmap = NULL;
+ const char *bitmap = NULL;
+ wiggler_params_t *wiggler_params;
+
+ if (urj_param_num (params) > 0)
+ {
+ /* acquire optional parameter for bit<->pin mapping */
+ param_bitmap = params[0];
+ if (params[0]->type != URJ_PARAM_TYPE_STRING)
+ {
+ urj_error_set (URJ_ERROR_SYNTAX, "mapping name should be a string");
+ return URJ_STATUS_FAIL;
+ }
+ /* urj_tap_cable_generic_parport_connect() shouldn't see this parameter */
+ params[0] = NULL;
+ }
+
+ if (urj_tap_cable_generic_parport_connect (cable, devtype, devname,
+ params) != URJ_STATUS_OK)
+ return URJ_STATUS_FAIL;
+
+ if (param_bitmap)
+ params[0] = param_bitmap;
+
+ wiggler_params = malloc (sizeof *wiggler_params);
+ if (!wiggler_params)
+ {
+ urj_error_set (URJ_ERROR_OUT_OF_MEMORY, _("malloc(%zd) fails"),
+ sizeof *wiggler_params);
+ /* NOTE:
+ * Call the underlying parport driver (*free) routine directly
+ * not generic_parconn_free() since it also free's cable->params
+ * (which is not established) and cable (which the caller will do)
+ */
+ cable->link.port->driver->parport_free (cable->link.port);
+ return 4;
+ }
+
+ /* set new wiggler-specific params */
+ free (cable->params);
+ cable->params = wiggler_params;
+
+ if (!param_bitmap)
+ bitmap = (char *) std_wgl_map;
+ else
+ bitmap = param_bitmap->value.string;
+
+ if (set_mapping (bitmap, cable) != 0)
+ {
+ urj_log (URJ_LOG_LEVEL_ERROR, _("Pin mapping failed\n"));
+ /* NOTE:
+ * Call the underlying parport driver (*free) routine directly
+ * not generic_parconn_free() since it also free's cable (which
+ * the caller will do)
+ */
+ cable->link.port->driver->parport_free (cable->link.port);
+ free (cable->params);
+ return URJ_STATUS_FAIL;
+ }
+
+ /* Certain Macraigor Wigglers appear to use one of the unused data lines as a
+ power line so set all unused bits high. */
+ PRM_UNUSED_BITS (cable) =
+ ~(PRM_SRST_ACT (cable) | PRM_SRST_INACT (cable) | PRM_TMS_ACT (cable)
+ | PRM_TMS_INACT (cable) | PRM_TCK_ACT (cable) | PRM_TCK_INACT (cable)
+ | PRM_TDI_ACT (cable) | PRM_TDI_INACT (cable) | PRM_TRST_ACT (cable)
+ | PRM_TRST_INACT (cable)) & 0xff;
+
+ return 0;
+}
+
+static int
+wiggler_init (urj_cable_t *cable)
+{
+ int data;
+
+ if (urj_tap_parport_open (cable->link.port) != URJ_STATUS_OK)
+ return -1;
+
+ if ((data = urj_tap_parport_get_data (cable->link.port)) < 0)
+ {
+ if (urj_tap_parport_set_data (cable->link.port,
+ PRM_TRST_ACT (cable)
+ | PRM_TRST_INACT (cable)
+ | PRM_UNUSED_BITS (cable))
+ != URJ_STATUS_OK)
+ return URJ_STATUS_FAIL;
+ PRM_TRST_LVL (cable) = PRM_TRST_ACT (cable) | PRM_TRST_INACT (cable);
+ }
+ else
+ PRM_TRST_LVL (cable) =
+ data & (PRM_TRST_ACT (cable) | PRM_TRST_INACT (cable));
+
+ PRM_SIGNALS (cable) =
+ (PRM_TRST_LVL (cable) == PRM_TRST_ACT (cable)) ? URJ_POD_CS_TRST : 0;
+
+ return URJ_STATUS_OK;
+}
+
+static void
+wiggler_clock (urj_cable_t *cable, int tms, int tdi, int n)
+{
+ int i;
+
+ tms = tms ? 1 : 0;
+ tdi = tdi ? 1 : 0;
+
+ for (i = 0; i < n; i++)
+ {
+ urj_tap_parport_set_data (cable->link.port,
+ PRM_TRST_LVL (cable)
+ | PRM_TCK_INACT (cable)
+ | (tms ? PRM_TMS_ACT (cable)
+ : PRM_TMS_INACT (cable))
+ | (tdi ? PRM_TDI_ACT (cable)
+ : PRM_TDI_INACT (cable))
+ | PRM_UNUSED_BITS (cable));
+ urj_tap_cable_wait (cable);
+ urj_tap_parport_set_data (cable->link.port,
+ PRM_TRST_LVL (cable)
+ | PRM_TCK_ACT (cable)
+ | (tms ? PRM_TMS_ACT (cable)
+ : PRM_TMS_INACT (cable))
+ | (tdi ? PRM_TDI_ACT (cable)
+ : PRM_TDI_INACT (cable))
+ | PRM_UNUSED_BITS (cable));
+ urj_tap_cable_wait (cable);
+ }
+
+ PRM_SIGNALS (cable) &= ~(URJ_POD_CS_TDI | URJ_POD_CS_TMS);
+ if (tms)
+ PRM_SIGNALS (cable) |= URJ_POD_CS_TMS;
+ if (tdi)
+ PRM_SIGNALS (cable) |= URJ_POD_CS_TDI;
+}
+
+static int
+wiggler_get_tdo (urj_cable_t *cable)
+{
+ int status;
+
+ urj_tap_parport_set_data (cable->link.port, PRM_TRST_LVL (cable) |
+ PRM_TCK_INACT (cable) |
+ PRM_UNUSED_BITS (cable));
+ urj_tap_cable_wait (cable);
+
+ status = urj_tap_parport_get_status (cable->link.port);
+ if (status == -1)
+ return -1;
+
+ return (status & (PRM_TDO_ACT (cable) | PRM_TDO_INACT (cable)))
+ ^ PRM_TDO_ACT (cable) ? 0 : 1;
+}
+
+static int
+wiggler_set_signal (urj_cable_t *cable, int mask, int val)
+{
+ int prev_sigs = PRM_SIGNALS (cable);
+
+ mask &= (URJ_POD_CS_TMS | URJ_POD_CS_TDI | URJ_POD_CS_TCK | URJ_POD_CS_TRST); // Only these can be modified
+
+ if (mask != 0)
+ {
+ int sigs = (prev_sigs & ~mask) | (val & mask);
+ PRM_TRST_LVL (cable) =
+ ((sigs & URJ_POD_CS_TRST) ? PRM_TRST_ACT (cable) :
+ PRM_TRST_INACT (cable));
+ int data = PRM_UNUSED_BITS (cable) | PRM_TRST_LVL (cable);
+ data |=
+ ((sigs & URJ_POD_CS_TCK) ? PRM_TCK_ACT (cable) :
+ PRM_TCK_INACT (cable));
+ data |=
+ ((sigs & URJ_POD_CS_TMS) ? PRM_TMS_ACT (cable) :
+ PRM_TMS_INACT (cable));
+ data |=
+ ((sigs & URJ_POD_CS_TDI) ? PRM_TDI_ACT (cable) :
+ PRM_TDI_INACT (cable));
+ urj_tap_parport_set_data (cable->link.port, data);
+ PRM_SIGNALS (cable) = sigs;
+ }
+
+ return prev_sigs;
+}
+
+static int
+wiggler_get_signal (urj_cable_t *cable, urj_pod_sigsel_t sig)
+{
+ return (PRM_SIGNALS (cable) & sig) ? 1 : 0;
+}
+
+static void
+wiggler_help (urj_log_level_t ll, const char *cablename)
+{
+ urj_log (ll,
+ _("Usage: cable %s parallel PORTADDR [TDO,TRST,TDI,TCK,TMS,SRESET]\n"
+#if ENABLE_LOWLEVEL_PPDEV
+ " or: cable %s ppdev PPDEV [TDO,TRST,TDI,TCK,TMS,SRESET]\n"
+#endif
+#if HAVE_DEV_PPBUS_PPI_H
+ " or: cable %s ppi PPIDEV [TDO,TRST,TDI,TCK,TMS,SRESET]\n"
+#endif
+ "\n" "PORTADDR parallel port address (e.g. 0x378)\n"
+#if ENABLE_LOWLEVEL_PPDEV
+ "PPDEV ppdev device (e.g. /dev/parport0)\n"
+#endif
+#if HAVE_DEV_PPBUS_PPI_H
+ "PPIDEF ppi device (e.g. /dev/ppi0)\n"
+#endif
+ "TDO, ... parallel port bit number, prepend '#' for inversion\n"
+ " default is '%s'\n" "\n"),
+#if ENABLE_LOWLEVEL_PPDEV
+ cablename,
+#endif
+#if HAVE_DEV_PPBUS_PPI_H
+ cablename,
+#endif
+ cablename, std_wgl_map);
+}
+
+urj_cable_driver_t urj_tap_cable_wiggler_driver = {
+ "WIGGLER",
+ N_("Macraigor Wiggler JTAG Cable"),
+ URJ_CABLE_DEVICE_PARPORT,
+ { .parport = wiggler_connect, },
+ urj_tap_cable_generic_disconnect,
+ urj_tap_cable_generic_parport_free,
+ wiggler_init,
+ urj_tap_cable_generic_parport_done,
+ urj_tap_cable_generic_set_frequency,
+ wiggler_clock,
+ wiggler_get_tdo,
+ urj_tap_cable_generic_transfer,
+ wiggler_set_signal,
+ wiggler_get_signal,
+ urj_tap_cable_generic_flush_one_by_one,
+ wiggler_help
+};
+
+urj_cable_driver_t urj_tap_cable_igloo_driver = {
+ "IGLOO",
+ N_("Excelpoint IGLOO JTAG Cable"),
+ URJ_CABLE_DEVICE_PARPORT,
+ { .parport = wiggler_connect, },
+ urj_tap_cable_generic_disconnect,
+ urj_tap_cable_generic_parport_free,
+ wiggler_init,
+ urj_tap_cable_generic_parport_done,
+ urj_tap_cable_generic_set_frequency,
+ wiggler_clock,
+ wiggler_get_tdo,
+ urj_tap_cable_generic_transfer,
+ wiggler_set_signal,
+ wiggler_get_signal,
+ urj_tap_cable_generic_flush_one_by_one,
+ wiggler_help
+};
--- /dev/null
+/*
+ * $Id: wiggler2.c,v 1.8 2003/09/11 16:45:15 telka Exp $
+ *
+ * Modified WIGGLER JTAG Cable Driver
+ * Copyright (C) 2003 Ultra d.o.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2002, 2003.
+ *
+ * Documentation:
+ * [1] http://www.ocdemon.net/
+ * [2] http://jtag-arm9.sourceforge.net/hardware.html
+ *
+ * Base on the code for the Macraigor WIGGLER code written by Marcel Telka.
+ * Modified by Matej Kupljen <matej.kupljen@ultra.si> to support
+ * the Modified WIGGLER JTAG cable. This has an additional pin, that is
+ * used for CPU reset. The schematic is based on the source code for the
+ * open source JTAG debugger for the PXA250 (255) processor, called Jelie
+ * <www.jelie.org>.
+ *
+ */
+
+#include <sysdep.h>
+
+#include <urjtag/cable.h>
+#include <urjtag/parport.h>
+#include <urjtag/chain.h>
+
+#include "generic.h"
+#include "generic_parport.h"
+
+/*
+ * data D[7:0] (pins 9:2)
+ */
+#define TDI 3
+#define TCK 2
+#define TMS 1
+#define TRST 4
+#define CPU_RESET 0
+
+/* Certain Macraigor Wigglers appear to use one of the unused data lines as a
+ power line so set all unused bits high. */
+#define UNUSED_BITS (~((1 << TDI) | (1 << TCK) | (1 << TMS) | (1 << TRST) | (1 << CPU_RESET)) & 0xff)
+
+/*
+ * 7 - BUSY (pin 11)
+ * 6 - ACK (pin 10)
+ * 5 - PE (pin 12)
+ * 4 - SEL (pin 13)
+ * 3 - ERROR (pin 15)
+ */
+#define TDO 7
+
+static int
+wiggler2_init (urj_cable_t *cable)
+{
+ int data;
+
+ if (urj_tap_parport_open (cable->link.port) != URJ_STATUS_OK)
+ return URJ_STATUS_FAIL;
+
+ // TODO: CPU_RESET bit is set to zero here and can't be changed afterwards
+ // If CPU_RESET=0 doesn't harm, it means it is an active high signal? - kawk
+
+ if ((data = urj_tap_parport_get_data (cable->link.port)) < 0)
+ {
+ if (urj_tap_parport_set_data (cable->link.port,
+ (1 << TRST) | UNUSED_BITS)
+ != URJ_STATUS_OK)
+ return URJ_STATUS_FAIL;
+ PARAM_SIGNALS (cable) = URJ_POD_CS_TRST;
+ }
+ else
+ PARAM_SIGNALS (cable) = ((data >> TRST) && 1) ? URJ_POD_CS_TRST : 0;
+
+ return URJ_STATUS_OK;
+}
+
+static void
+wiggler2_clock (urj_cable_t *cable, int tms, int tdi, int n)
+{
+ int i;
+ int trst = (PARAM_SIGNALS (cable) & URJ_POD_CS_TRST) ? 1 : 0;
+
+ tms = tms ? 1 : 0;
+ tdi = tdi ? 1 : 0;
+
+ for (i = 0; i < n; i++)
+ {
+ urj_tap_parport_set_data (cable->link.port,
+ (trst << TRST) | (0 << TCK) | (tms << TMS) |
+ (tdi << TDI) | UNUSED_BITS);
+ urj_tap_cable_wait (cable);
+ urj_tap_parport_set_data (cable->link.port,
+ (trst << TRST) | (1 << TCK) | (tms << TMS) |
+ (tdi << TDI) | UNUSED_BITS);
+ urj_tap_cable_wait (cable);
+ }
+
+ PARAM_SIGNALS (cable) &= ~(URJ_POD_CS_TMS | URJ_POD_CS_TDI);
+ PARAM_SIGNALS (cable) |= URJ_POD_CS_TCK;
+ PARAM_SIGNALS (cable) |= tms ? URJ_POD_CS_TMS : 0;
+ PARAM_SIGNALS (cable) |= tdi ? URJ_POD_CS_TDI : 0;
+}
+
+static int
+wiggler2_get_tdo (urj_cable_t *cable)
+{
+ int trst = (PARAM_SIGNALS (cable) & URJ_POD_CS_TRST) ? 1 : 0;
+ int status;
+
+ urj_tap_parport_set_data (cable->link.port,
+ (trst << TRST) | (0 << TCK) | UNUSED_BITS);
+ PARAM_SIGNALS (cable) &=
+ ~(URJ_POD_CS_TDI | URJ_POD_CS_TCK | URJ_POD_CS_TMS);
+
+ urj_tap_cable_wait (cable);
+
+ status = urj_tap_parport_get_status (cable->link.port);
+ if (status == -1)
+ return status;
+
+ return (status >> TDO) & 1;
+}
+
+static int
+wiggler2_set_signal (urj_cable_t *cable, int mask, int val)
+{
+ int prev_sigs = PARAM_SIGNALS (cable);
+
+ mask &= (URJ_POD_CS_TDI | URJ_POD_CS_TCK | URJ_POD_CS_TMS | URJ_POD_CS_TRST); // only these can be modified
+
+ if (mask != 0)
+ {
+ int data = 0;
+ int sigs = (prev_sigs & ~mask) | (val & mask);
+ data |= (sigs & URJ_POD_CS_TDI) ? (1 << TDI) : 0;
+ data |= (sigs & URJ_POD_CS_TCK) ? (1 << TCK) : 0;
+ data |= (sigs & URJ_POD_CS_TMS) ? (1 << TMS) : 0;
+ data |= (sigs & URJ_POD_CS_TRST) ? (1 << TRST) : 0;
+ urj_tap_parport_set_data (cable->link.port, data | UNUSED_BITS);
+ PARAM_SIGNALS (cable) = sigs;
+ }
+
+ return prev_sigs;
+}
+
+urj_cable_driver_t urj_tap_cable_wiggler2_driver = {
+ "WIGGLER2",
+ N_("Modified (with CPU Reset) WIGGLER JTAG Cable"),
+ URJ_CABLE_DEVICE_PARPORT,
+ { .parport = urj_tap_cable_generic_parport_connect, },
+ urj_tap_cable_generic_disconnect,
+ urj_tap_cable_generic_parport_free,
+ wiggler2_init,
+ urj_tap_cable_generic_parport_done,
+ urj_tap_cable_generic_set_frequency,
+ wiggler2_clock,
+ wiggler2_get_tdo,
+ urj_tap_cable_generic_transfer,
+ wiggler2_set_signal,
+ urj_tap_cable_generic_get_signal,
+ urj_tap_cable_generic_flush_one_by_one,
+ urj_tap_cable_generic_parport_help
+};
--- /dev/null
+/*
+ * $Id: xpc.c,v 1.8 2003/08/19 08:42:20 telka Exp $
+ *
+ * Xilinx Platform Cable USB Driver (slow GPIO only)
+ * Copyright (C) 2008 Kolja Waschk
+ *
+ * Loosely based on Xilinx DLC5 JTAG Parallel Cable III Driver
+ * Copyright (C) 2002, 2003 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ */
+
+#include <sysdep.h>
+
+#include <stdio.h>
+
+#include <urjtag/cable.h>
+#include <urjtag/chain.h>
+
+#include "generic.h"
+#include "generic_usbconn.h"
+
+#include <urjtag/usbconn.h>
+#include "usbconn/libusb.h"
+
+#include <errno.h>
+#include <string.h>
+
+// #define VERBOSE 1
+#undef VERBOSE
+typedef struct
+{
+ int last_tdo;
+}
+xpc_cable_params_t;
+
+static int last_tdo;
+
+/* Connectivity on Spartan-3E starter kit:
+ *
+ * = FX2 Port A =
+ *
+ * IOA.0 => green LED (0=off)
+ * IOA.1 => red LED (0=off)
+ * IOA.2 is tied to VCC via R25 on my board
+ * IOA.3 isn't connected
+ * IOA.4 => CPLD pin 85 (reset?)
+ * IOA.5 => CPLD pin 86, eventually OE?
+ * IOA.6 => CPLD pin 83 (reset?)
+ * IOA.7 => CPLD pin 49 (reset?)
+ *
+ * = FX2 Port C =
+ *
+ * probably used as GPIFADR 0..7, to CPLD
+ *
+ * = FX2 Port E =
+ *
+ * IOE.3 => CPLD TCK
+ * IOE.4 => CPLD TMS
+ * IOE.5 => CPLD TDO
+ * IOE.6 => CPLD TDI
+ */
+
+/* ---------------------------------------------------------------------- */
+
+static int
+xpcu_output_enable (struct usb_dev_handle *xpcu, int enable)
+{
+ if (usb_control_msg
+ (xpcu, 0x40, 0xB0, enable ? 0x18 : 0x10, 0, NULL, 0, 1000) < 0)
+ {
+ urj_error_IO_set ("usb_control_msg(0x10/0x18)");
+ return URJ_STATUS_FAIL;
+ }
+
+ return URJ_STATUS_OK;
+}
+
+/* ---------------------------------------------------------------------- */
+
+#ifdef UNUSED /* RFHH */
+static int
+xpcu_bit_reverse (struct usb_dev_handle *xpcu, uint8_t bits_in,
+ uint8_t *bits_out)
+{
+ if (usb_control_msg
+ (xpcu, 0xC0, 0xB0, 0x0020, bits_in, (char *) bits_out, 1, 1000) < 0)
+ {
+ urj_error_IO_set ("usb_control_msg(0x20.x) (bit reverse)");
+ return URJ_STATUS_FAIL;
+ }
+
+ return URJ_STATUS_OK;
+}
+#endif
+
+/* ----------------------------------------------------------------- */
+
+static int
+xpcu_request_28 (struct usb_dev_handle *xpcu, int value)
+{
+ /* Typical values seen during autodetection of chain configuration: 0x11, 0x12 */
+
+ if (usb_control_msg (xpcu, 0x40, 0xB0, 0x0028, value, NULL, 0, 1000) < 0)
+ {
+ urj_error_IO_set ("usb_control_msg(0x28.x)");
+ return URJ_STATUS_FAIL;
+ }
+
+ return URJ_STATUS_OK;
+}
+
+/* ---------------------------------------------------------------------- */
+
+static int
+xpcu_write_gpio (struct usb_dev_handle *xpcu, uint8_t bits)
+{
+ if (usb_control_msg (xpcu, 0x40, 0xB0, 0x0030, bits, NULL, 0, 1000) < 0)
+ {
+ urj_error_IO_set ("usb_control_msg(0x30.0x00) (write port E)");
+ return URJ_STATUS_FAIL;
+ }
+
+ return URJ_STATUS_OK;
+}
+
+/* ---------------------------------------------------------------------- */
+
+static int
+xpcu_read_gpio (struct usb_dev_handle *xpcu, uint8_t *bits)
+{
+ if (usb_control_msg (xpcu, 0xC0, 0xB0, 0x0038, 0, (char *) bits, 1, 1000)
+ < 0)
+ {
+ urj_error_IO_set ("usb_control_msg(0x38.0x00) (read port E)");
+ return URJ_STATUS_FAIL;
+ }
+
+ return URJ_STATUS_OK;
+}
+
+/* ---------------------------------------------------------------------- */
+
+
+static int
+xpcu_read_cpld_version (struct usb_dev_handle *xpcu, uint16_t *buf)
+{
+ if (usb_control_msg
+ (xpcu, 0xC0, 0xB0, 0x0050, 0x0001, (char *) buf, 2, 1000) < 0)
+ {
+ urj_error_IO_set ("usb_control_msg(0x50.1) (read_cpld_version)");
+ return URJ_STATUS_FAIL;
+ }
+ return URJ_STATUS_OK;
+}
+
+/* ---------------------------------------------------------------------- */
+
+static int
+xpcu_read_firmware_version (struct usb_dev_handle *xpcu, uint16_t *buf)
+{
+ if (usb_control_msg
+ (xpcu, 0xC0, 0xB0, 0x0050, 0x0000, (char *) buf, 2, 1000) < 0)
+ {
+ urj_error_IO_set ("usb_control_msg(0x50.0) (read_firmware_version)");
+ return URJ_STATUS_FAIL;
+ }
+
+ return URJ_STATUS_OK;
+}
+
+/* ----------------------------------------------------------------- */
+
+static int
+xpcu_select_gpio (struct usb_dev_handle *xpcu, int int_or_ext)
+{
+ if (usb_control_msg (xpcu, 0x40, 0xB0, 0x0052, int_or_ext, NULL, 0, 1000)
+ < 0)
+ {
+ urj_error_IO_set ("usb_control_msg(0x52.x) (select gpio)");
+ return URJ_STATUS_FAIL;
+ }
+
+ return URJ_STATUS_OK;
+}
+
+/* ---------------------------------------------------------------------- */
+
+/* === A6 transfer (TDI/TMS/TCK/RDO) ===
+ *
+ * Vendor request 0xA6 initiates a quite universal shift operation. The data
+ * is passed directly to the CPLD as 16-bit words.
+ *
+ * The argument N in the request specifies the number of state changes/bits.
+ *
+ * State changes are described by the following bulk write. It consists
+ * of ceil(N/4) little-endian 16-bit words, each describing up to 4 changes:
+ *
+ * Care has to be taken that N is NOT a multiple of 4.
+ * The CPLD doesn't seem to handle that well.
+ *
+ * Bit 0: Value for first TDI to shift out.
+ * Bit 1: Second TDI.
+ * Bit 2: Third TDI.
+ * Bit 3: Fourth TDI.
+ *
+ * Bit 4: Value for first TMS to shift out.
+ * Bit 5: Second TMS.
+ * Bit 6: Third TMS.
+ * Bit 7: Fourth TMS.
+ *
+ * Bit 8: Whether to raise/lower TCK for first bit.
+ * Bit 9: Same for second bit.
+ * Bit 10: Third bit.
+ * Bit 11: Fourth bit.
+ *
+ * Bit 12: Whether to read TDO for first bit
+ * Bit 13: Same for second bit.
+ * Bit 14: Third bit.
+ * Bit 15: Fourth bit.
+ *
+ * After the bulk write, if any of the bits 12..15 was set in any word, a
+ * bulk_read shall follow to collect the TDO data.
+ *
+ * TDO data is shifted in from MSB. In a "full" word with 16 TDO bits, the
+ * earliest one reached bit 0. The earliest of 15 bits however would be bit 0,
+ * and if there's only one TDO bit, it arrives as the MSB of the word.
+ */
+
+/** @return 0 on success; -1 on error */
+static int
+xpcu_shift (struct usb_dev_handle *xpcu, int reqno, int bits, int in_len,
+ uint8_t *in, int out_len, uint8_t *out)
+{
+ if (usb_control_msg (xpcu, 0x40, 0xB0, reqno, bits, NULL, 0, 1000) < 0)
+ {
+ urj_error_IO_set ("usb_control_msg(x.x) (shift)");
+ return -1;
+ }
+
+#if VERBOSE
+ {
+ int i;
+ urj_log (URJ_LOG_LEVEL_DETAIL, "###\n");
+ urj_log (URJ_LOG_LEVEL_DETAIL, "reqno = %02X\n", reqno);
+ urj_log (URJ_LOG_LEVEL_DETAIL, "bits = %d\n", bits);
+ urj_log (URJ_LOG_LEVEL_DETAIL, "in_len = %d, in_len*2 = %d\n", in_len, in_len * 2);
+ urj_log (URJ_LOG_LEVEL_DETAIL, "out_len = %d, out_len*8 = %d\n", out_len, out_len * 8);
+
+ urj_log (URJ_LOG_LEVEL_DETAIL, "a6_display(\"%02X\", \"", bits);
+ for (i = 0; i < in_len; i++)
+ urj_log (URJ_LOG_LEVEL_DETAIL, "%02X%s", in[i], (i + 1 < in_len) ? "," : "");
+ urj_log (URJ_LOG_LEVEL_DETAIL, "\", ");
+ }
+#endif
+
+ if (usb_bulk_write (xpcu, 0x02, (char *) in, in_len, 1000) < 0)
+ {
+ urj_error_IO_set ("usb_bulk_write error(shift)");
+ return -1;
+ }
+
+ if (out_len > 0 && out != NULL)
+ {
+ if (usb_bulk_read (xpcu, 0x86, (char *) out, out_len, 1000) < 0)
+ {
+ urj_error_IO_set ("usb_bulk_read error(shift)");
+ return -1;
+ }
+ }
+
+#if VERBOSE
+ {
+ int i;
+ urj_log (URJ_LOG_LEVEL_DETAIL, "\"");
+ for (i = 0; i < out_len; i++)
+ urj_log (URJ_LOG_LEVEL_DETAIL, "%02X%s", out[i], (i + 1 < out_len) ? "," : "");
+ urj_log (URJ_LOG_LEVEL_DETAIL, "\")\n");
+ }
+#endif
+
+ return 0;
+}
+
+/* ---------------------------------------------------------------------- */
+
+static int
+xpcu_common_init (urj_cable_t *cable)
+{
+ int r;
+ uint16_t buf;
+ struct usb_dev_handle *xpcu;
+
+ if (urj_tap_usbconn_open (cable->link.usb) != URJ_STATUS_OK)
+ return URJ_STATUS_FAIL;
+
+ xpcu = ((urj_usbconn_libusb_param_t *) (cable->link.usb->params))->handle;
+
+ r = xpcu_request_28 (xpcu, 0x11);
+ if (r != URJ_STATUS_FAIL)
+ r = xpcu_write_gpio (xpcu, 8);
+
+ /* Read firmware version (constant embedded in firmware) */
+
+ if (r != URJ_STATUS_FAIL)
+ r = xpcu_read_firmware_version (xpcu, &buf);
+ if (r != URJ_STATUS_FAIL)
+ {
+ urj_log (URJ_LOG_LEVEL_NORMAL,
+ "firmware version = 0x%04X (%u)\n", buf, buf);
+ }
+
+ /* Read CPLD version (via GPIF) */
+
+ if (r != URJ_STATUS_FAIL)
+ // @@@@ RFHH added assignment of result to r:
+ r = xpcu_read_cpld_version (xpcu, &buf);
+ if (r != URJ_STATUS_FAIL)
+ {
+ urj_log (URJ_LOG_LEVEL_NORMAL, "cable CPLD version = 0x%04X (%u)\n",
+ buf, buf);
+ if (buf == 0)
+ {
+ urj_warning ("version '0' can't be correct. Please try resetting the cable\n");
+ r = URJ_STATUS_FAIL;
+ }
+ }
+
+ if (r != URJ_STATUS_OK)
+ {
+ usb_close (xpcu);
+ }
+
+ return r;
+}
+
+static int
+xpc_int_init (urj_cable_t *cable)
+{
+ struct usb_dev_handle *xpcu;
+
+ if (xpcu_common_init (cable) == URJ_STATUS_FAIL)
+ return URJ_STATUS_FAIL;
+
+ xpcu = ((urj_usbconn_libusb_param_t *) (cable->link.usb->params))->handle;
+ if (xpcu_select_gpio (xpcu, 0) == URJ_STATUS_FAIL)
+ return URJ_STATUS_FAIL;
+
+ return URJ_STATUS_OK;
+}
+
+static int
+xpc_ext_init (urj_cable_t *cable)
+{
+ struct usb_dev_handle *xpcu;
+ uint8_t zero[2] = { 0, 0 };
+ int r;
+
+ free (cable->params);
+ cable->params = NULL;
+
+ r = xpcu_common_init (cable);
+
+ if (r == URJ_STATUS_FAIL)
+ return r;
+
+ cable->params = malloc (sizeof (xpc_cable_params_t));
+ if (cable->params == NULL)
+ {
+ urj_error_set (URJ_ERROR_OUT_OF_MEMORY, "malloc(%zd) fails",
+ sizeof (xpc_cable_params_t));
+ r = URJ_STATUS_FAIL;
+ }
+
+ xpcu = ((urj_usbconn_libusb_param_t *) (cable->link.usb->params))->handle;
+
+ if (r == URJ_STATUS_OK)
+ r = xpcu_output_enable (xpcu, 0);
+ if (r == URJ_STATUS_OK)
+ r = xpcu_request_28 (xpcu, 0x11);
+ if (r == URJ_STATUS_OK)
+ r = xpcu_output_enable (xpcu, 1);
+ if (r == URJ_STATUS_OK)
+ r = xpcu_shift (xpcu, 0xA6, 2, 2, zero, 0, NULL) == -1
+ ? URJ_STATUS_FAIL : URJ_STATUS_OK;
+ if (r == URJ_STATUS_OK)
+ r = xpcu_request_28 (xpcu, 0x12);
+
+ if (r != URJ_STATUS_OK)
+ {
+ usb_close (xpcu);
+
+ free (cable->params);
+ cable->params = NULL;
+ }
+
+ return r;
+}
+
+/* ---------------------------------------------------------------------- */
+
+static void
+xpc_ext_free (urj_cable_t *cable)
+{
+ if (cable->params)
+ {
+ free (cable->params);
+ cable->params = NULL;
+ }
+ urj_tap_cable_generic_usbconn_free (cable);
+}
+
+/* ---------------------------------------------------------------------- */
+
+#define PROG 3
+#define TCK 2
+#define TMS 1
+#define TDI 0
+#define TDO 0
+
+static void
+xpc_clock (urj_cable_t *cable, int tms, int tdi, int n)
+{
+ int i;
+ struct usb_dev_handle *xpcu;
+ xpcu = ((urj_usbconn_libusb_param_t *) (cable->link.usb->params))->handle;
+
+ tms = tms ? (1 << TMS) : 0;
+ tdi = tdi ? (1 << TDI) : 0;
+
+ if (xpcu_write_gpio (xpcu, (1 << PROG) | (0 << TCK) | tms | tdi)
+ != URJ_STATUS_FAIL)
+ {
+ urj_tap_cable_wait (cable);
+ for (i = 0; i < n; i++)
+ {
+ xpcu_write_gpio (xpcu, (1 << PROG) | (1 << TCK) | tms | tdi);
+ urj_tap_cable_wait (cable);
+ xpcu_write_gpio (xpcu, (1 << PROG) | (0 << TCK) | tms | tdi);
+ urj_tap_cable_wait (cable);
+ }
+ }
+}
+
+/* ---------------------------------------------------------------------- */
+
+static int
+xpc_get_tdo (urj_cable_t *cable)
+{
+ unsigned char d;
+ struct usb_dev_handle *xpcu;
+ xpcu = ((urj_usbconn_libusb_param_t *) (cable->link.usb->params))->handle;
+
+ xpcu_read_gpio (xpcu, &d);
+ return (d & (1 << TDO)) ? 1 : 0;
+}
+
+/* ---------------------------------------------------------------------- */
+
+static int
+xpc_set_signal (urj_cable_t *cable, int mask, int val)
+{
+ return 1;
+}
+
+/* ---------------------------------------------------------------------- */
+
+static void
+xpc_ext_clock (urj_cable_t *cable, int tms, int tdi, int n)
+{
+ int i;
+ uint8_t tdo[2];
+ uint8_t clock[2];
+ struct usb_dev_handle *xpcu;
+
+ clock[0] = (tms ? 0x10 : 0) | (tdi ? 0x01 : 0);
+ clock[1] = 0x11; /* clock'n read */
+
+ xpcu = ((urj_usbconn_libusb_param_t *) (cable->link.usb->params))->handle;
+
+ for (i = 0; i < n; i++)
+ xpcu_shift (xpcu, 0xA6, 1, 2, clock, 2, tdo);
+
+ last_tdo = tdo[1] ? 1 : 0;
+ // ((xpc_cable_params_t*)(cable->params))->last_tdo = tdo[1] ? 1:0;
+}
+
+/* ---------------------------------------------------------------------- */
+
+static int
+xpc_ext_get_tdo (urj_cable_t *cable)
+{
+ return last_tdo;
+ // return ((xpc_cable_params_t*)(cable->params))->last_tdo;
+}
+
+/* ---------------------------------------------------------------------- */
+
+/* 16-bit words. More than 4 currently leads to bit errors; 13 to serious problems */
+#define XPC_A6_CHUNKSIZE 4
+
+typedef struct
+{
+ urj_cable_t *cable;
+ struct usb_dev_handle *xpcu;
+ int in_bits;
+ int out_bits;
+ int out_done;
+ uint8_t *out;
+ uint8_t buf[XPC_A6_CHUNKSIZE * 2];
+}
+xpc_ext_transfer_state_t;
+
+/* ---------------------------------------------------------------------- */
+
+/** @return 0 on success; -1 on error */
+static int
+xpcu_do_ext_transfer (xpc_ext_transfer_state_t *xts)
+{
+ int r;
+ int in_len, out_len;
+ // int last_tdo;
+
+ in_len = 2 * (xts->in_bits >> 2);
+ if ((xts->in_bits & 3) != 0)
+ in_len += 2;
+
+ out_len = 2 * (xts->out_bits >> 4);
+ if ((xts->out_bits & 15) != 0)
+ out_len += 2;
+
+ if (xts->out != NULL)
+ {
+ r = xpcu_shift (xts->xpcu, 0xA6, xts->in_bits, in_len, xts->buf,
+ out_len, xts->buf);
+ }
+ else
+ {
+ r = xpcu_shift (xts->xpcu, 0xA6, xts->in_bits, in_len, xts->buf, 0,
+ NULL);
+ }
+
+ if (r != -1 && xts->out_bits > 0)
+ {
+ int out_idx = 0;
+ int out_rem = xts->out_bits;
+
+ while (out_rem > 0)
+ {
+ uint32_t mask, rxw;
+
+ rxw = (xts->buf[out_idx + 1] << 8) | xts->buf[out_idx];
+
+ /* In the last (incomplete) word, the data isn't shifted completely to LSB */
+
+ mask = (out_rem >= 16) ? 1 : (1 << (16 - out_rem));
+
+ while (mask <= 32768 && out_rem > 0)
+ {
+ last_tdo = (rxw & mask) ? 1 : 0;
+ xts->out[xts->out_done] = last_tdo;
+ xts->out_done++;
+ mask <<= 1;
+ out_rem--;
+ }
+
+ out_idx += 2;
+ }
+ }
+
+ xts->in_bits = 0;
+ xts->out_bits = 0;
+
+ // ((xpc_cable_params_t*)(xts->cable->params))->last_tdo = last_tdo;
+
+ return r;
+}
+
+/* ---------------------------------------------------------------------- */
+
+static void
+xpcu_add_bit_for_ext_transfer (xpc_ext_transfer_state_t *xts, char in,
+ char is_real)
+{
+ int bit_idx = (xts->in_bits & 3);
+ int buf_idx = (xts->in_bits - bit_idx) >> 1;
+
+ if (bit_idx == 0)
+ {
+ xts->buf[buf_idx] = 0;
+ xts->buf[buf_idx + 1] = 0;
+ }
+
+ xts->in_bits++;
+
+ if (is_real)
+ {
+ if (in)
+ xts->buf[buf_idx] |= (0x01 << bit_idx);
+
+ if (xts->out)
+ {
+ xts->buf[buf_idx + 1] |= (0x11 << bit_idx);
+ xts->out_bits++;
+ }
+ else
+ {
+ xts->buf[buf_idx + 1] |= (0x01 << bit_idx);
+ }
+ }
+}
+
+/* ---------------------------------------------------------------------- */
+
+// @@@@ RFHH the specx say that it should be
+// @return: num clocks on success, -1 on error.
+// Might have to be: return i;
+
+/** @return 0 on success; -1 on error */
+static int
+xpc_ext_transfer (urj_cable_t *cable, int len, const char *in, char *out)
+{
+ int i, j;
+ xpc_ext_transfer_state_t xts;
+
+#if VERBOSE
+ urj_log (URJ_LOG_LEVEL_DETAIL, "---\n");
+ urj_log (URJ_LOG_LEVEL_DETAIL, "transfer size %d, %s output\n", len,
+ (out != NULL) ? "with" : "without");
+ urj_log (URJ_LOG_LEVEL_DETAIL, "tdi: ");
+ for (i = 0; i < len; i++)
+ urj_log (URJ_LOG_LEVEL_DETAIL, "%c", in[i] ? '1' : '0');
+ urj_log (URJ_LOG_LEVEL_DETAIL, "\n");
+#endif
+
+ xts.xpcu =
+ ((urj_usbconn_libusb_param_t *) (cable->link.usb->params))->handle;
+ xts.out = (uint8_t *) out;
+ xts.in_bits = 0;
+ xts.out_bits = 0;
+ xts.out_done = 0;
+ xts.cable = cable;
+
+ for (i = 0, j = 0; i < len && j >= 0; i++)
+ {
+ xpcu_add_bit_for_ext_transfer (&xts, in[i], 1);
+ if (xts.in_bits == (4 * XPC_A6_CHUNKSIZE - 1))
+ {
+ j = xpcu_do_ext_transfer (&xts);
+ }
+ }
+
+ if (xts.in_bits > 0 && j >= 0)
+ {
+ /* CPLD doesn't like multiples of 4; add one dummy bit */
+ if ((xts.in_bits & 3) == 0)
+ {
+ xpcu_add_bit_for_ext_transfer (&xts, 0, 0);
+ }
+ j = xpcu_do_ext_transfer (&xts);
+ }
+
+ return j;
+}
+
+/* ---------------------------------------------------------------------- */
+
+
+urj_cable_driver_t urj_tap_cable_xpc_int_driver = {
+ "xpc_int",
+ N_("Xilinx Platform Cable USB internal chain"),
+ URJ_CABLE_DEVICE_USB,
+ { .usb = urj_tap_cable_generic_usbconn_connect, },
+ urj_tap_cable_generic_disconnect,
+ urj_tap_cable_generic_usbconn_free,
+ xpc_int_init,
+ urj_tap_cable_generic_usbconn_done,
+ urj_tap_cable_generic_set_frequency,
+ xpc_clock,
+ xpc_get_tdo,
+ urj_tap_cable_generic_transfer,
+ xpc_set_signal,
+ urj_tap_cable_generic_get_signal,
+ urj_tap_cable_generic_flush_using_transfer,
+ urj_tap_cable_generic_usbconn_help
+};
+
+urj_usbconn_cable_t urj_tap_cable_usbconn_xpc_int = {
+ "xpc_int", /* cable name */
+ NULL, /* string pattern, not used */
+ "libusb", /* usbconn driver */
+ 0x03FD, /* VID (Xilinx) */
+ 0x0008 /* PID (8) */
+};
+
+urj_cable_driver_t urj_tap_cable_xpc_ext_driver = {
+ "xpc_ext",
+ N_("Xilinx Platform Cable USB external chain"),
+ URJ_CABLE_DEVICE_USB,
+ { .usb = urj_tap_cable_generic_usbconn_connect, },
+ urj_tap_cable_generic_disconnect,
+ xpc_ext_free,
+ xpc_ext_init,
+ urj_tap_cable_generic_usbconn_done,
+ urj_tap_cable_generic_set_frequency,
+ xpc_ext_clock,
+ xpc_ext_get_tdo,
+ xpc_ext_transfer,
+ xpc_set_signal,
+ urj_tap_cable_generic_get_signal,
+ urj_tap_cable_generic_flush_using_transfer,
+ urj_tap_cable_generic_usbconn_help
+};
+
+urj_usbconn_cable_t urj_tap_cable_usbconn_xpc_ext = {
+ "xpc_ext", /* cable name */
+ NULL, /* string pattern, not used */
+ "libusb", /* usbconn driver */
+ 0x03FD, /* VID (Xilinx) */
+ 0x0008 /* PID (8) */
+};
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2003 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2003.
+ *
+ */
+
+#include <sysdep.h>
+
+#include <stdlib.h>
+#include <string.h>
+
+#include <urjtag/cable.h>
+#include <urjtag/part.h>
+#include <urjtag/part_instruction.h>
+#include <urjtag/tap_state.h>
+#include <urjtag/tap.h>
+#include <urjtag/data_register.h>
+
+#include <urjtag/bsdl.h>
+
+#include <urjtag/chain.h>
+
+urj_chain_t *
+urj_tap_chain_alloc (void)
+{
+ urj_chain_t *chain = malloc (sizeof (urj_chain_t));
+ if (!chain)
+ {
+ urj_error_set (URJ_ERROR_OUT_OF_MEMORY, "malloc(%zd) fails",
+ sizeof (urj_chain_t));
+ return NULL;
+ }
+
+ chain->cable = NULL;
+ chain->parts = NULL;
+ chain->total_instr_len = 0;
+ chain->active_part = 0;
+ URJ_BSDL_GLOBS_INIT (chain->bsdl);
+ urj_tap_state_init (chain);
+
+ return chain;
+}
+
+void
+urj_tap_chain_free (urj_chain_t *chain)
+{
+ if (!chain)
+ return;
+
+ urj_tap_chain_disconnect (chain);
+
+ urj_part_parts_free (chain->parts);
+ free (chain);
+}
+
+void
+urj_tap_chain_disconnect (urj_chain_t *chain)
+{
+ if (!chain->cable)
+ return;
+
+ urj_tap_state_done (chain);
+ urj_tap_cable_done (chain->cable);
+ urj_tap_cable_free (chain->cable);
+ chain->cable = NULL;
+}
+
+int
+urj_tap_chain_clock (urj_chain_t *chain, int tms, int tdi, int n)
+{
+ int i;
+
+ if (!chain || !chain->cable)
+ {
+ urj_error_set (URJ_ERROR_NO_CHAIN, "no chain or no part");
+ return URJ_STATUS_FAIL;
+ }
+
+ urj_tap_cable_clock (chain->cable, tms, tdi, n);
+
+ for (i = 0; i < n; i++)
+ urj_tap_state_clock (chain, tms);
+
+ return URJ_STATUS_OK;
+}
+
+int
+urj_tap_chain_defer_clock (urj_chain_t *chain, int tms, int tdi, int n)
+{
+ int i;
+
+ if (!chain || !chain->cable)
+ {
+ urj_error_set (URJ_ERROR_NO_CHAIN, "no chain or no part");
+ return URJ_STATUS_FAIL;
+ }
+
+ urj_tap_cable_defer_clock (chain->cable, tms, tdi, n);
+
+ for (i = 0; i < n; i++)
+ urj_tap_state_clock (chain, tms);
+
+ return URJ_STATUS_OK;
+}
+
+int
+urj_tap_chain_set_trst (urj_chain_t *chain, int trst)
+{
+ int old_val = urj_tap_cable_set_signal (chain->cable, URJ_POD_CS_TRST,
+ trst ? URJ_POD_CS_TRST : 0);
+ int old_trst = (old_val & URJ_POD_CS_TRST) ? 1 : 0;
+
+ urj_tap_state_set_trst (chain, old_trst, trst);
+
+ return trst;
+}
+
+int
+urj_tap_chain_get_trst (urj_chain_t *chain)
+{
+ return urj_tap_cable_get_signal (chain->cable, URJ_POD_CS_TRST);
+}
+
+int
+urj_tap_chain_set_pod_signal (urj_chain_t *chain, int mask, int val)
+{
+ int old_val = urj_tap_cable_set_signal (chain->cable, mask, val);
+ int old_trst = (old_val & URJ_POD_CS_TRST) ? 1 : 0;
+ int new_trst =
+ (((old_val & ~mask) | (val & mask)) & URJ_POD_CS_TRST) ? 1 : 0;
+
+ urj_tap_state_set_trst (chain, old_trst, new_trst);
+
+ return old_val;
+}
+
+int
+urj_tap_chain_get_pod_signal (urj_chain_t *chain, urj_pod_sigsel_t sig)
+{
+ return urj_tap_cable_get_signal (chain->cable, sig);
+}
+
+int
+urj_tap_chain_shift_instructions_mode (urj_chain_t *chain,
+ int capture_output, int capture,
+ int chain_exit)
+{
+ int i;
+ urj_parts_t *ps;
+
+ if (!chain || !chain->parts)
+ {
+ urj_error_set (URJ_ERROR_NO_CHAIN, "no chain or no part");
+ return URJ_STATUS_FAIL;
+ }
+
+ ps = chain->parts;
+
+ for (i = 0; i < ps->len; i++)
+ {
+ if (ps->parts[i]->active_instruction == NULL)
+ {
+ urj_error_set (URJ_ERROR_NO_ACTIVE_INSTRUCTION,
+ _("Part %d without active instruction"), i);
+ return URJ_STATUS_FAIL;
+ }
+ }
+
+ if (capture)
+ urj_tap_capture_ir (chain);
+
+ /* new implementation: split into defer + retrieve part
+ shift the data register of each part in the chain one by one */
+
+ for (i = 0; i < ps->len; i++)
+ {
+ urj_tap_defer_shift_register (chain,
+ ps->parts[i]->active_instruction->value,
+ capture_output ? ps->parts[i]->active_instruction->out
+ : NULL,
+ (i + 1) == ps->len ? chain_exit : URJ_CHAIN_EXITMODE_SHIFT);
+ }
+
+ if (capture_output)
+ {
+ for (i = 0; i < ps->len; i++)
+ {
+ urj_tap_shift_register_output (chain,
+ ps->parts[i]->active_instruction->value,
+ ps->parts[i]->active_instruction->out,
+ (i + 1) == ps->len ? chain_exit
+ : URJ_CHAIN_EXITMODE_SHIFT);
+ }
+ }
+ else
+ {
+ /* give the cable driver a chance to flush if it's considered useful */
+ urj_tap_cable_flush (chain->cable, URJ_TAP_CABLE_TO_OUTPUT);
+ }
+
+ return URJ_STATUS_OK;
+}
+
+int
+urj_tap_chain_shift_instructions (urj_chain_t *chain)
+{
+ return urj_tap_chain_shift_instructions_mode (chain, 0, 1,
+ URJ_CHAIN_EXITMODE_IDLE);
+}
+
+int
+urj_tap_chain_shift_data_registers_mode (urj_chain_t *chain,
+ int capture_output, int capture,
+ int chain_exit)
+{
+ int i;
+ urj_parts_t *ps;
+
+ if (!chain || !chain->parts)
+ {
+ urj_error_set (URJ_ERROR_NO_CHAIN, "no chain or no part");
+ return URJ_STATUS_FAIL;
+ }
+
+ ps = chain->parts;
+
+ for (i = 0; i < ps->len; i++)
+ {
+ if (ps->parts[i]->active_instruction == NULL)
+ {
+ urj_error_set (URJ_ERROR_NO_ACTIVE_INSTRUCTION,
+ _("Part %d without active instruction"), i);
+ return URJ_STATUS_FAIL;
+ }
+ if (ps->parts[i]->active_instruction->data_register == NULL)
+ {
+ urj_error_set (URJ_ERROR_NO_DATA_REGISTER,
+ _("Part %d without data register"), i);
+ return URJ_STATUS_FAIL;
+ }
+ }
+
+ if (capture)
+ urj_tap_capture_dr (chain);
+
+ /* new implementation: split into defer + retrieve part
+ shift the data register of each part in the chain one by one */
+
+ for (i = 0; i < ps->len; i++)
+ {
+ urj_tap_defer_shift_register (chain,
+ ps->parts[i]->active_instruction->data_register->in,
+ capture_output ?
+ ps->parts[i]->active_instruction->data_register->out
+ : NULL,
+ (i + 1) == ps->len ? chain_exit : URJ_CHAIN_EXITMODE_SHIFT);
+ }
+
+ if (capture_output)
+ {
+ for (i = 0; i < ps->len; i++)
+ {
+ urj_tap_shift_register_output (chain,
+ ps->parts[i]->active_instruction->data_register->in,
+ ps->parts[i]->active_instruction->data_register->out,
+ (i + 1) == ps->len ? chain_exit : URJ_CHAIN_EXITMODE_SHIFT);
+ }
+ }
+ else
+ {
+ /* give the cable driver a chance to flush if it's considered useful */
+ urj_tap_cable_flush (chain->cable, URJ_TAP_CABLE_TO_OUTPUT);
+ }
+
+ return URJ_STATUS_OK;
+}
+
+int
+urj_tap_chain_shift_data_registers (urj_chain_t *chain, int capture_output)
+{
+ return urj_tap_chain_shift_data_registers_mode (chain, capture_output, 1,
+ URJ_CHAIN_EXITMODE_IDLE);
+}
+
+void
+urj_tap_chain_flush (urj_chain_t *chain)
+{
+ if (chain->cable != NULL)
+ urj_tap_cable_flush (chain->cable, URJ_TAP_CABLE_COMPLETELY);
+}
+
+urj_part_t *
+urj_tap_chain_active_part (urj_chain_t *chain)
+{
+ if (chain == NULL)
+ {
+ urj_error_set (URJ_ERROR_NO_CHAIN, "no JTAG chain");
+ return NULL;
+ }
+
+ if (!chain->parts)
+ {
+ urj_error_set (URJ_ERROR_NOTFOUND, _("Run \"detect\" first"));
+ return NULL;
+ }
+ if (chain->active_part >= chain->parts->len)
+ {
+ urj_error_set (URJ_ERROR_ILLEGAL_STATE,
+ _("active part no %d exceeds chain length %d"),
+ chain->active_part, chain->parts->len);
+ return NULL;
+ }
+
+ return chain->parts->parts[chain->active_part];
+}
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2002 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2002.
+ *
+ */
+
+#include <sysdep.h>
+
+#include <inttypes.h>
+#include <stdio.h>
+#include <stdlib.h>
+#include <ctype.h>
+#include <string.h>
+#include <errno.h>
+
+#include <urjtag/cmd.h>
+
+#include <urjtag/bsdl.h>
+
+#include <urjtag/tap_register.h>
+#include <urjtag/tap.h>
+#include <urjtag/cable.h>
+#include <urjtag/part.h>
+#include <urjtag/chain.h>
+#include <urjtag/part.h>
+#include <urjtag/bus.h>
+#include <urjtag/data_register.h>
+#include <urjtag/parse.h>
+#include <urjtag/jtag.h>
+
+struct id_record
+{
+ char name[20];
+ char fullname[100];
+};
+
+static int
+find_record (char *filename, urj_tap_register_t *key, struct id_record *idr)
+{
+ FILE *file;
+ urj_tap_register_t *tr;
+ int r = 0;
+
+ file = fopen (filename, "r");
+ if (!file)
+ {
+ urj_log (URJ_LOG_LEVEL_ERROR, _("Unable to open file '%s'\n"), filename);
+ urj_error_IO_set ("Unable to open file '%s'", filename);
+ return 0;
+ }
+
+ tr = urj_tap_register_alloc (key->len);
+
+ for (;;)
+ {
+ char *p;
+ char *s;
+ char line[1024];
+
+ if (fgets (line, 1024, file) == NULL)
+ break;
+
+ /* remove comment and nl from the line */
+ p = strpbrk (line, "#\n");
+ if (p)
+ *p = '\0';
+
+ p = line;
+
+ /* skip whitespace */
+ while (*p && isspace (*p))
+ p++;
+
+ /* remove ending whitespace */
+ s = strchr (p, '\0');
+ while (s != p)
+ {
+ if (!isspace (*--s))
+ break;
+ *s = '\0';
+ }
+
+ /* line is empty? */
+ if (!*p)
+ continue;
+
+ /* find end of field */
+ s = p;
+ while (*s && !isspace (*s))
+ s++;
+ if (*s)
+ *s++ = '\0';
+
+ /* test field length */
+ if (strlen (p) != key->len)
+ continue;
+
+ /* match */
+ urj_tap_register_init (tr, p);
+ if (urj_tap_register_compare (tr, key))
+ continue;
+
+ /* next field */
+ p = s;
+
+ /* skip whitespace */
+ while (*p && isspace (*p))
+ p++;
+
+ /* line is empty? */
+ if (!*p)
+ continue;
+
+ /* find end of field */
+ s = p;
+ while (*s && !isspace (*s))
+ s++;
+ if (*s)
+ *s++ = '\0';
+
+ /* test field length */
+ if (strlen (p) >= sizeof idr->name)
+ continue;
+
+ /* copy name */
+ strcpy (idr->name, p);
+
+ /* next field */
+ p = s;
+
+ /* skip whitespace */
+ while (*p && isspace (*p))
+ p++;
+
+ /* line is empty? */
+ if (!*p)
+ continue;
+
+ /* test field length */
+ if (strlen (p) >= sizeof idr->fullname)
+ continue;
+
+ /* copy fullname */
+ strcpy (idr->fullname, p);
+
+ r = 1;
+ break;
+ }
+
+ fclose (file);
+
+ urj_tap_register_free (tr);
+
+ return r;
+}
+
+int
+urj_tap_detect_parts (urj_chain_t *chain, const char *db_path)
+{
+ int irlen;
+ urj_tap_register_t *ir;
+ int chlen;
+ urj_tap_register_t *one;
+ urj_tap_register_t *ones;
+ urj_tap_register_t *br;
+ urj_tap_register_t *id;
+ urj_parts_t *ps;
+ int i;
+
+ char data_path[1024];
+ char manufacturer[URJ_PART_MANUFACTURER_MAXLEN + 1];
+ char partname[URJ_PART_PART_MAXLEN + 1];
+ char stepping[URJ_PART_STEPPING_MAXLEN + 1];
+
+ /* Detect IR length */
+ urj_tap_reset (chain);
+ urj_tap_capture_ir (chain);
+ irlen = urj_tap_detect_register_size (chain);
+ if (irlen < 1)
+ // retain error state
+ return -1;
+
+ urj_log (URJ_LOG_LEVEL_NORMAL, _("IR length: %d\n"), irlen);
+ chain->total_instr_len = irlen;
+
+ /* Allocate IR */
+ ir = urj_tap_register_fill (urj_tap_register_alloc (irlen), 1);
+ if (ir == NULL)
+ return -1;
+
+ urj_tap_shift_register (chain, ir, NULL, URJ_CHAIN_EXITMODE_IDLE);
+ urj_tap_register_free (ir);
+
+ /* Detect chain length */
+ urj_tap_capture_dr (chain);
+ chlen = urj_tap_detect_register_size (chain);
+ if (chlen < 1)
+ {
+ // retain error state
+ urj_log (URJ_LOG_LEVEL_NORMAL,
+ _("Unable to detect JTAG chain length\n"));
+ return -1;
+ }
+ urj_log (URJ_LOG_LEVEL_NORMAL, _("Chain length: %d\n"), chlen);
+
+ /* Allocate registers and parts */
+ one = urj_tap_register_fill (urj_tap_register_alloc (1), 1);
+ ones = urj_tap_register_fill (urj_tap_register_alloc (31), 1);
+ br = urj_tap_register_alloc (1);
+ id = urj_tap_register_alloc (32);
+ ps = urj_part_parts_alloc ();
+ if (!one || !ones || !br || !id || !ps)
+ {
+ urj_tap_register_free (one);
+ urj_tap_register_free (ones);
+ urj_tap_register_free (br);
+ urj_tap_register_free (id);
+ urj_part_parts_free (ps);
+ // retain error state
+ return -1;
+ }
+ chain->parts = ps;
+ chain->active_part = 0;
+
+ /* Detect parts */
+ urj_tap_reset (chain);
+ urj_tap_capture_dr (chain);
+
+ for (i = 0; i < chlen; i++)
+ {
+ urj_part_t *part;
+ urj_tap_register_t *did = br; /* detected id (length is 1 or 32) */
+ urj_tap_register_t *key;
+ struct id_record idr;
+ char *p;
+
+ urj_tap_shift_register (chain, one, br, URJ_CHAIN_EXITMODE_SHIFT);
+ if (urj_tap_register_compare (one, br) == 0)
+ {
+ /* part with id */
+ urj_tap_shift_register (chain, ones, id,
+ URJ_CHAIN_EXITMODE_SHIFT);
+ urj_tap_register_shift_left (id, 1);
+ id->data[0] = 1;
+ did = id;
+
+ urj_log (URJ_LOG_LEVEL_NORMAL, _("Device Id: %s (0x%016" PRIX64 ")\n"),
+ urj_tap_register_get_string (did), urj_tap_register_get_value (did));
+ } else
+ urj_log (URJ_LOG_LEVEL_NORMAL, _("Device Id: unknown as bit 0 was not a 1\n"));
+
+ part = urj_part_alloc (did);
+ if (part == NULL)
+ // @@@@ RFHH what about this error? Shouldn't we bail out?
+ break;
+ urj_part_parts_add_part (ps, part);
+
+ if (did == br)
+ continue;
+
+ chain->active_part = ps->len - 1;
+
+#ifdef ENABLE_BSDL
+ if (urj_bsdl_scan_files (chain, urj_tap_register_get_string (did),
+ URJ_BSDL_MODE_DETECT) <= 0)
+ {
+#endif
+
+ /* find JTAG declarations for a part with id */
+
+ data_path[0] = '\0';
+ strncat (data_path, db_path, sizeof data_path); /* FIXME: Buffer overrun */
+
+ /* manufacturers */
+ strncat (data_path, "/MANUFACTURERS", sizeof data_path);
+
+ key = urj_tap_register_alloc (11);
+ memcpy (key->data, &id->data[1], key->len);
+ if (!find_record (data_path, key, &idr))
+ {
+ urj_log (URJ_LOG_LEVEL_NORMAL, _(" Unknown manufacturer!\n"));
+ urj_tap_register_free (key);
+ continue;
+ }
+ urj_tap_register_free (key);
+
+ urj_log (URJ_LOG_LEVEL_NORMAL, _(" Manufacturer: %s\n"),
+ idr.fullname);
+ if (strlen (idr.fullname) > URJ_PART_MANUFACTURER_MAXLEN)
+ urj_warning (_("Manufacturer too long\n"));
+ manufacturer[0] = '\0';
+ strncat (manufacturer, idr.fullname, sizeof manufacturer);
+
+ /* parts */
+ p = strrchr (data_path, '/');
+ if (p)
+ p[1] = '\0';
+ else
+ data_path[0] = '\0';
+ strncat (data_path, idr.name, sizeof data_path);
+ strncat (data_path, "/PARTS", sizeof data_path);
+
+ key = urj_tap_register_alloc (16);
+ memcpy (key->data, &id->data[12], key->len);
+ if (!find_record (data_path, key, &idr))
+ {
+ urj_log (URJ_LOG_LEVEL_NORMAL, _(" Unknown part!\n"));
+ urj_tap_register_free (key);
+ continue;
+ }
+ urj_tap_register_free (key);
+
+ urj_log (URJ_LOG_LEVEL_NORMAL, _(" Part(%d): %s\n"),
+ chain->active_part, idr.fullname);
+ if (strlen (idr.fullname) > URJ_PART_PART_MAXLEN)
+ urj_warning (_("Part too long\n"));
+ partname[0] ='\0';
+ strncat (partname, idr.fullname, sizeof partname);
+
+ /* steppings */
+ p = strrchr (data_path, '/');
+ if (p)
+ p[1] = '\0';
+ else
+ data_path[0] = '\0';
+ strncat (data_path, idr.name, sizeof data_path);
+ strncat (data_path, "/STEPPINGS", sizeof data_path);
+
+ key = urj_tap_register_alloc (4);
+ memcpy (key->data, &id->data[28], key->len);
+ if (!find_record (data_path, key, &idr))
+ {
+ urj_log (URJ_LOG_LEVEL_NORMAL, _(" Unknown stepping!\n"));
+ urj_tap_register_free (key);
+ continue;
+ }
+ urj_tap_register_free (key);
+
+ urj_log (URJ_LOG_LEVEL_NORMAL, _(" Stepping: %s\n"),
+ idr.fullname);
+ if (strlen (idr.fullname) > URJ_PART_STEPPING_MAXLEN)
+ urj_warning (_("Stepping too long\n"));
+ stepping[0] = '\0';
+ strncat (stepping, idr.fullname, sizeof stepping);
+
+ /* part definition file */
+ p = strrchr (data_path, '/');
+ if (p)
+ p[1] = '\0';
+ else
+ data_path[0] = '\0';
+ strncat (data_path, idr.name, sizeof data_path);
+
+ urj_log (URJ_LOG_LEVEL_NORMAL, _(" Filename: %s\n"),
+ data_path);
+
+ /* run JTAG declarations */
+ strcpy (part->manufacturer, manufacturer);
+ strcpy (part->part, partname);
+ strcpy (part->stepping, stepping);
+ if (urj_parse_include (chain, data_path, 0) == URJ_STATUS_FAIL)
+ {
+ urj_log (URJ_LOG_LEVEL_NORMAL, "Error: %s\n",
+ urj_error_describe());
+ urj_error_reset();
+ }
+#ifdef ENABLE_BSDL
+ }
+#endif
+
+ if (part->active_instruction == NULL)
+ part->active_instruction = urj_part_find_instruction (part,
+ "IDCODE");
+ }
+
+ for (i = 0; i < 32; i++)
+ {
+ urj_tap_shift_register (chain, one, br, URJ_CHAIN_EXITMODE_SHIFT);
+ if (urj_tap_register_compare (one, br) != 0)
+ {
+ urj_log (URJ_LOG_LEVEL_NORMAL,
+ _("Error: Unable to detect JTAG chain end!\n"));
+ break;
+ }
+ }
+ urj_tap_shift_register (chain, one, NULL, URJ_CHAIN_EXITMODE_IDLE);
+
+ urj_tap_register_free (one);
+ urj_tap_register_free (ones);
+ urj_tap_register_free (br);
+ urj_tap_register_free (id);
+
+ return ps->len;
+}
+
+
+/* In case we do not want to detect, we can add parts manually */
+
+int
+urj_tap_manual_add (urj_chain_t *chain, int instr_len)
+{
+ urj_tap_register_t *id;
+ urj_part_t *part;
+ char *str;
+ urj_part_instruction_t *bypass;
+
+ id = urj_tap_register_alloc (1);
+ if (id == NULL)
+ return -1;
+
+ /* if there are no parts, create the parts list */
+ if (chain->parts == NULL)
+ {
+ chain->parts = urj_part_parts_alloc ();
+ if (chain->parts == NULL)
+ return -1;
+ }
+
+ part = urj_part_alloc (id);
+ if (part == NULL)
+ return -1;
+
+ strncpy (part->part, "unknown", URJ_PART_PART_MAXLEN);
+ part->instruction_length = instr_len;
+
+ urj_part_parts_add_part (chain->parts, part);
+ chain->active_part = chain->parts->len - 1;
+
+ /* make the BR register available */
+ if (urj_part_data_register_define (part, "BR", 1) != URJ_STATUS_OK)
+ {
+ urj_log (URJ_LOG_LEVEL_NORMAL, _("Error: could not set BR register"));
+ return -1;
+ }
+
+ /* create a string of 1's for BYPASS instruction */
+ str = calloc (instr_len + 1, sizeof (char));
+ if (str == NULL)
+ {
+ urj_error_set (URJ_ERROR_OUT_OF_MEMORY, "calloc(%zd,%zd) fails",
+ (size_t) instr_len + 1, sizeof (char));
+ return -1;
+ }
+
+ memset (str, '1', instr_len);
+ str[instr_len] = '\0';
+ bypass = urj_part_instruction_define (part, "BYPASS", str, "BR");
+ free (str);
+
+ if (bypass == NULL)
+ {
+ urj_log (URJ_LOG_LEVEL_NORMAL,
+ _("Error: could not set BYPASS instruction"));
+ // retain error state
+ return -1;
+ }
+
+ /* update total instruction register length of chain */
+ chain->total_instr_len += instr_len;
+
+ return chain->parts->len;
+}
+
+int
+urj_tap_detect (urj_chain_t *chain)
+{
+ int i;
+ urj_bus_t *abus;
+
+ urj_bus_buses_free ();
+ urj_part_parts_free (chain->parts);
+ chain->parts = NULL;
+ if (urj_tap_detect_parts (chain, urj_get_data_dir ()) == -1)
+ // retain error state
+ return URJ_STATUS_FAIL;
+ if (!chain->parts)
+ {
+ urj_error_set (URJ_ERROR_INVALID, "chain has no parts");
+ return URJ_STATUS_FAIL;
+ }
+ if (!chain->parts->len)
+ {
+ urj_part_parts_free (chain->parts);
+ chain->parts = NULL;
+ urj_error_set (URJ_ERROR_INVALID, "chain has empty parts list");
+ return URJ_STATUS_FAIL;
+ }
+
+ urj_part_parts_set_instruction (chain->parts, "SAMPLE/PRELOAD");
+ urj_tap_chain_shift_instructions (chain);
+ urj_tap_chain_shift_data_registers (chain, 1);
+ urj_part_parts_set_instruction (chain->parts, "BYPASS");
+ urj_tap_chain_shift_instructions (chain);
+
+ // Initialize all the buses
+ for (i = 0; i < urj_buses.len; i++)
+ {
+ abus = urj_buses.buses[i];
+ if (abus->driver->init)
+ {
+ if (abus->driver->init (abus) != URJ_STATUS_OK)
+ // retain error state
+ return URJ_STATUS_FAIL;
+ }
+ }
+
+ return URJ_STATUS_OK;
+}
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2003 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2003.
+ *
+ */
+
+#include <sysdep.h>
+
+#include <stdio.h>
+#include <stdlib.h>
+
+#include <urjtag/tap.h>
+#include <urjtag/tap_register.h>
+#include <urjtag/chain.h>
+
+
+#define DETECT_PATTERN_SIZE 8
+#define MAX_REGISTER_LENGTH 1024
+#define TEST_COUNT 1
+#define TEST_THRESHOLD 100 /* in % */
+
+#undef VERY_LOW_LEVEL_DEBUG
+
+int
+urj_tap_detect_register_size (urj_chain_t *chain)
+{
+ int len;
+ urj_tap_register_t *rz;
+ urj_tap_register_t *rout;
+ urj_tap_register_t *rpat;
+
+ /* This seems to be a good place to check if TDO changes at all */
+ int tdo, tdo_stuck = -2;
+
+ for (len = 1; len <= MAX_REGISTER_LENGTH; len++)
+ {
+ int p;
+ int ok = 0;
+
+ rz = urj_tap_register_fill (urj_tap_register_alloc (len), 0);
+ rout = urj_tap_register_alloc (DETECT_PATTERN_SIZE + len);
+ rpat =
+ urj_tap_register_inc (urj_tap_register_fill
+ (urj_tap_register_alloc
+ (DETECT_PATTERN_SIZE + len), 0));
+
+ for (p = 1; p < (1 << DETECT_PATTERN_SIZE); p++)
+ {
+ int i;
+ const char *s;
+ ok = 0;
+
+ s = urj_tap_register_get_string (rpat);
+ while (*s)
+ s++;
+
+ for (i = 0; i < TEST_COUNT; i++)
+ {
+ urj_tap_shift_register (chain, rz, NULL, 0);
+ urj_tap_shift_register (chain, rpat, rout, 0);
+
+#ifdef VERY_LOW_LEVEL_DEBUG
+ urj_log (URJ_LOG_LEVEL_ALL, ">>> %s\n", urj_tap_register_get_string (rz));
+ urj_log (URJ_LOG_LEVEL_ALL, " + %s\n", urj_tap_register_get_string (rpat));
+#endif
+ tdo = urj_tap_register_all_bits_same_value (rout);
+ if (tdo_stuck == -2)
+ tdo_stuck = tdo;
+ if (tdo_stuck != tdo)
+ tdo_stuck = -1;
+
+ urj_tap_register_shift_right (rout, len);
+ if (urj_tap_register_compare (rpat, rout) == 0)
+ ok++;
+#ifdef VERY_LOW_LEVEL_DEBUG
+ urj_log (URJ_LOG_LEVEL_ALL, " = %s => %d\n", urj_tap_register_get_string (rout),
+ ok);
+#endif
+ }
+ if (100 * ok / TEST_COUNT < TEST_THRESHOLD)
+ {
+ ok = 0;
+ break;
+ }
+
+ urj_tap_register_inc (rpat);
+ }
+
+ urj_tap_register_free (rz);
+ urj_tap_register_free (rout);
+ urj_tap_register_free (rpat);
+
+ if (ok)
+ return len;
+ }
+
+ if (tdo_stuck >= 0)
+ {
+ urj_warning (_("TDO seems to be stuck at %d\n"), tdo_stuck);
+ }
+
+ return -1;
+}
+
+static void
+jtag_reset (urj_chain_t *chain)
+{
+ urj_tap_chain_set_trst (chain, 0);
+ urj_tap_chain_set_trst (chain, 1);
+
+ urj_tap_reset (chain);
+}
+
+int
+urj_tap_discovery (urj_chain_t *chain)
+{
+ int irlen;
+ urj_tap_register_t *ir;
+ urj_tap_register_t *irz;
+
+ /* detecting IR size */
+ jtag_reset (chain);
+
+ urj_log (URJ_LOG_LEVEL_NORMAL, _("Detecting IR length ... "));
+ fflush (stdout);
+
+ urj_tap_capture_ir (chain);
+ irlen = urj_tap_detect_register_size (chain);
+
+ urj_log (URJ_LOG_LEVEL_NORMAL, _("%d\n"), irlen);
+
+ if (irlen < 1)
+ {
+ // retain error state
+ urj_log (URJ_LOG_LEVEL_NORMAL, _("Error: Invalid IR length!\n"));
+ return URJ_STATUS_FAIL;
+ }
+
+ /* all 1 is BYPASS in all parts, so DR length gives number of parts */
+ ir = urj_tap_register_fill (urj_tap_register_alloc (irlen), 1);
+ irz = urj_tap_register_duplicate (ir);
+
+ if (!ir || !irz)
+ {
+ urj_tap_register_free (ir);
+ urj_tap_register_free (irz);
+ return URJ_STATUS_FAIL;
+ }
+
+ for (;;)
+ {
+ int rs;
+
+ jtag_reset (chain);
+
+ urj_tap_capture_ir (chain);
+ urj_tap_shift_register (chain, ir, NULL, 1);
+
+ urj_log (URJ_LOG_LEVEL_NORMAL, _("Detecting DR length for IR %s ... "),
+ urj_tap_register_get_string (ir));
+ fflush (stdout);
+
+ urj_tap_capture_dr (chain);
+ rs = urj_tap_detect_register_size (chain);
+
+ urj_log (URJ_LOG_LEVEL_NORMAL, _("%d\n"), rs);
+
+ urj_tap_register_inc (ir);
+ if (urj_tap_register_compare (ir, irz) == 0)
+ break;
+ }
+ urj_tap_register_free (ir);
+ urj_tap_register_free (irz);
+
+ return URJ_STATUS_OK;
+}
--- /dev/null
+/*
+ * $Id: idcode.c 1120 2008-03-15 02:27:13Z jiez $
+ *
+ * Copyright (C) 2003 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Uwe Bonnes <bon@elektron.ikp.physik.tu-darmstadt.de>, 2008.
+ *
+ */
+#include <sysdep.h>
+
+#include <stdio.h>
+#include <stdlib.h>
+
+#include <urjtag/tap.h>
+#include <urjtag/tap_register.h>
+#include <urjtag/chain.h>
+
+
+int
+urj_tap_idcode (urj_chain_t *chain, unsigned int bytes)
+{
+ int i;
+ int hit = 0;
+ urj_tap_register_t *rz;
+ urj_tap_register_t *rout;
+ urj_tap_register_t *rnull;
+
+ urj_tap_chain_set_trst (chain, 0);
+ urj_tap_chain_set_trst (chain, 1);
+
+ urj_tap_reset (chain);
+ urj_tap_capture_dr (chain);
+
+ /* read in chunks of 8 bytes */
+ rz = urj_tap_register_fill (urj_tap_register_alloc (8), 0);
+ rnull = urj_tap_register_fill (urj_tap_register_alloc (8), 0);
+ rout = urj_tap_register_alloc (8);
+
+ if (!rz || !rout || !rnull)
+ return URJ_STATUS_FAIL;
+
+ urj_log (URJ_LOG_LEVEL_NORMAL, _("Read"));
+ for (i = 0; i < ((bytes) ? bytes : 1000); i++)
+ {
+ uint8_t val;
+ urj_tap_shift_register (chain, rz, rout, 0);
+ val = urj_tap_register_get_value (rout);
+ urj_log (URJ_LOG_LEVEL_NORMAL, N_(" %s(0x%x%x)"),
+ urj_tap_register_get_string (rout),
+ (val >> 4) & 0xf, val & 0xf);
+ if (!bytes)
+ {
+ /* Abort Reading when a null IDCODE has been read */
+ if (!urj_tap_register_compare (rout, rnull))
+ hit++;
+ else
+ hit = 0;
+ if (hit > 3)
+ break;
+ }
+ }
+ urj_tap_register_free (rz);
+ urj_tap_register_free (rnull);
+ urj_tap_register_free (rout);
+ urj_log (URJ_LOG_LEVEL_NORMAL, _("\n"));
+
+ return URJ_STATUS_OK;
+}
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2003 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2003.
+ *
+ */
+
+#include <sysdep.h>
+
+#include <stddef.h>
+
+#include <urjtag/parport.h>
+
+/* @@@@ RFHH move these to some .h file */
+extern urj_parport_driver_t urj_tap_parport_direct_parport_driver;
+extern urj_parport_driver_t urj_tap_parport_ppdev_parport_driver;
+extern urj_parport_driver_t urj_tap_parport_ppi_parport_driver;
+
+urj_parport_driver_t *urj_tap_parport_drivers[] = {
+#ifdef ENABLE_LOWLEVEL_DIRECT
+ &urj_tap_parport_direct_parport_driver,
+#endif /* ENABLE_LOWLEVEL_DIRECT */
+
+#ifdef ENABLE_LOWLEVEL_PPDEV
+ &urj_tap_parport_ppdev_parport_driver,
+#endif /* ENABLE_LOWLEVEL_PPDEV */
+
+#ifdef ENABLE_LOWLEVEL_PPI
+ &urj_tap_parport_ppi_parport_driver,
+#endif /* ENABLE_LOWLEVEL_PPI */
+ NULL /* last must be NULL */
+};
+
+
+int
+urj_tap_parport_open (urj_parport_t *port)
+{
+ return port->driver->open (port);
+}
+
+int
+urj_tap_parport_close (urj_parport_t *port)
+{
+ return port->driver->close (port);
+}
+
+int
+urj_tap_parport_set_data (urj_parport_t *port, const unsigned char data)
+{
+ return port->driver->set_data (port, data);
+}
+
+int
+urj_tap_parport_get_data (urj_parport_t *port)
+{
+ return port->driver->get_data (port);
+}
+
+int
+urj_tap_parport_get_status (urj_parport_t *port)
+{
+ return port->driver->get_status (port);
+}
+
+int
+urj_tap_parport_set_control (urj_parport_t *port, const unsigned char data)
+{
+ return port->driver->set_control (port, data);
+}
+
+const char *
+urj_cable_parport_devtype_string(urj_cable_parport_devtype_t dt)
+{
+ switch (dt)
+ {
+ case URJ_CABLE_PARPORT_DEV_PARALLEL: return "parallel";
+ case URJ_CABLE_PARPORT_DEV_PPDEV: return "ppdev";
+ case URJ_CABLE_PARPORT_DEV_PPI: return "ppi";
+ case URJ_CABLE_PARPORT_N_DEVS: return "#devs";
+ }
+ return "<unknown parport devtype>";
+}
+
--- /dev/null
+/*
+ * $Id$
+ *
+ * Direct Parallel Port Connection Driver
+ * Copyright (C) 2003 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2003.
+ * Ported to NetBSD/i386 by Jachym Holecek <freza@psi.cz>, 2003.
+ *
+ */
+
+#include <sysdep.h>
+
+#ifdef ENABLE_LOWLEVEL_DIRECT
+
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+#include <errno.h>
+
+#include <urjtag/error.h>
+#include <urjtag/log.h>
+#include <urjtag/parport.h>
+#include <urjtag/cable.h>
+
+#if defined(HAVE_INPOUTXX)
+
+static HINSTANCE inpout32_dll_handle = NULL;
+
+typedef short _stdcall (*inpfuncPtr) (short p);
+typedef void _stdcall (*outfuncPtr) (short p, short d);
+
+static inpfuncPtr Inp32;
+static outfuncPtr Out32;
+
+#define inb(p) (Inp32)(p)
+#define outb(d,p) (Out32)(p,d)
+
+#elif defined(HAVE_IOPERM)
+
+#include <sys/io.h>
+
+#elif defined(HAVE_I386_SET_IOPERM)
+
+#include <sys/types.h>
+#include <machine/sysarch.h>
+#include <err.h>
+
+static __inline int
+ioperm (unsigned long from, unsigned long num, int permit)
+{
+#ifdef __FreeBSD__
+ if (i386_set_ioperm (from, num, permit) == -1)
+ return -1;
+#else
+ u_long ports[32];
+ u_long i;
+
+ if (i386_get_ioperm (ports) == -1)
+ return -1;
+
+ for (i = from; i < (from + num); i++)
+ if (permit)
+ ports[i / 32] &= ~(1 << (i % 32));
+ else
+ ports[i / 32] |= (1 << (i % 32));
+
+ if (i386_set_ioperm (ports) == -1)
+ return -1;
+#endif
+ return 0;
+}
+
+static __inline int
+iopl (int level)
+{
+#ifndef __FreeBSD__
+ return i386_iopl (level);
+#endif
+ return 0;
+}
+
+static __inline unsigned char
+inb (unsigned short int port)
+{
+ unsigned char _v;
+
+ __asm__ __volatile__ ("inb %w1,%0":"=a" (_v):"Nd" (port));
+ return _v;
+}
+
+static __inline void
+outb (unsigned char value, unsigned short int port)
+{
+ __asm__ __volatile__ ("outb %b0,%w1"::"a" (value), "Nd" (port));
+}
+#endif /* HAVE_I386_SET_IOPERM */
+
+urj_parport_driver_t urj_tap_parport_direct_parport_driver;
+
+typedef struct port_node_t port_node_t;
+
+struct port_node_t
+{
+ urj_parport_t *port;
+ port_node_t *next;
+};
+
+static port_node_t *ports = NULL; /* direct parallel ports */
+
+typedef struct
+{
+ unsigned int port;
+} direct_params_t;
+
+static urj_parport_t *
+direct_parport_alloc (unsigned int port)
+{
+ direct_params_t *params = malloc (sizeof *params);
+ urj_parport_t *parport = malloc (sizeof *parport);
+ port_node_t *node = malloc (sizeof *node);
+
+ if (!node || !parport || !params)
+ {
+ free (node);
+ free (parport);
+ free (params);
+ urj_error_set (URJ_ERROR_OUT_OF_MEMORY,
+ "malloc(%zd)/malloc(%zd)/malloc(%zd) fails",
+ sizeof *params, sizeof *parport, sizeof *node);
+ return NULL;
+ }
+
+#if defined(HAVE_INPOUTXX)
+ if (inpout32_dll_handle == NULL)
+ {
+ inpout32_dll_handle = LoadLibrary ("inpout32.dll");
+ }
+ if (inpout32_dll_handle == NULL)
+ {
+ urj_error_set (URJ_ERROR_IO,
+ _("Couldn't load InpOut32.dll; maybe not installed?"));
+ urj_error.sys_errno = GetLastError();
+ return NULL;
+ }
+
+ Inp32 = (inpfuncPtr) GetProcAddress (inpout32_dll_handle, "Inp32");
+ Out32 = (outfuncPtr) GetProcAddress (inpout32_dll_handle, "Out32");
+#endif
+
+ params->port = port;
+
+ parport->params = params;
+ parport->driver = &urj_tap_parport_direct_parport_driver;
+ parport->cable = NULL;
+
+ node->port = parport;
+ node->next = ports;
+
+ ports = node;
+
+ return parport;
+}
+
+static void
+direct_parport_free (urj_parport_t *port)
+{
+ port_node_t **prev;
+
+ for (prev = &ports; *prev; prev = &((*prev)->next))
+ if ((*prev)->port == port)
+ break;
+
+ if (*prev)
+ {
+ port_node_t *pn = *prev;
+ *prev = pn->next;
+ free (pn);
+ }
+
+ free (port->params);
+ free (port);
+
+#if defined(HAVE_INPOUTXX)
+ if (inpout32_dll_handle != NULL)
+ FreeLibrary (inpout32_dll_handle);
+#endif
+}
+
+static urj_parport_t *
+direct_connect (const char *devname)
+{
+ long int port_scan_val;
+ unsigned int port;
+ port_node_t *pn = ports;
+ urj_parport_t *parport;
+
+ errno = 0;
+ port_scan_val = strtol (devname, NULL, 0);
+ if (errno != 0)
+ {
+ urj_error_IO_set ("strtol(%s) fails", devname);
+ return NULL;
+ }
+
+ if (port_scan_val < 0 || (port_scan_val + 3) > 0xffff)
+ {
+ urj_error_set (URJ_ERROR_INVALID, _("Invalid port address"));
+ return NULL;
+ }
+
+ port = (unsigned int) port_scan_val;
+
+ while (pn)
+ for (pn = ports; pn; pn = pn->next)
+ {
+ unsigned int aport;
+
+ aport = ((direct_params_t *) pn->port->params)->port;
+ if (abs (aport - port) < 3)
+ {
+ urj_log (URJ_LOG_LEVEL_NORMAL,
+ _("Disconnecting %s from parallel port at 0x%x\n"),
+ _(pn->port->cable->driver->description), aport);
+ pn->port->cable->driver->disconnect (pn->port->cable);
+ break;
+ }
+ }
+
+ urj_log (URJ_LOG_LEVEL_NORMAL, _("Initializing parallel port at 0x%x\n"),
+ port);
+
+ parport = direct_parport_alloc (port);
+ if (!parport)
+ return NULL;
+
+ return parport;
+}
+
+static int
+direct_open (urj_parport_t *parport)
+{
+#ifdef HAVE_INPOUTXX
+ return URJ_STATUS_OK;
+#else
+ unsigned int port = ((direct_params_t *) parport->params)->port;
+ if (((port + 3 <= 0x400) ? ioperm (port, 3, 1) : iopl (3)) == -1)
+ {
+ urj_error_IO_set ("ioperm(3,1) or iopl(3) fails");
+ return URJ_STATUS_FAIL;
+ }
+ return URJ_STATUS_OK;
+#endif
+}
+
+static int
+direct_close (urj_parport_t *parport)
+{
+#if defined(HAVE_INPOUTXX)
+ return URJ_STATUS_OK;
+#else
+ unsigned int port = ((direct_params_t *) parport->params)->port;
+ if (((port + 3 <= 0x400) ? ioperm (port, 3, 0) : iopl (0)) == -1)
+ {
+ urj_error_IO_set ("ioperm(3,0) or iopl(0) fails");
+ return URJ_STATUS_FAIL;
+ }
+ return URJ_STATUS_OK;
+#endif
+}
+
+static int
+direct_set_data (urj_parport_t *parport, unsigned char data)
+{
+ unsigned short int port = ((direct_params_t *) parport->params)->port;
+ outb (data, port);
+ return URJ_STATUS_OK;
+}
+
+static int
+direct_get_data (urj_parport_t *parport)
+{
+ unsigned int port = ((direct_params_t *) parport->params)->port;
+ return inb (port);
+}
+
+static int
+direct_get_status (urj_parport_t *parport)
+{
+ unsigned int port = ((direct_params_t *) parport->params)->port;
+ return inb (port + 1) ^ 0x80; /* BUSY is inverted */
+}
+
+static int
+direct_set_control (urj_parport_t *parport, unsigned char data)
+{
+ unsigned short int port = ((direct_params_t *) parport->params)->port;
+ outb (data ^ 0x0B, port + 2); /* SELECT, AUTOFD, and STROBE are inverted */
+ return URJ_STATUS_OK;
+}
+
+urj_parport_driver_t urj_tap_parport_direct_parport_driver = {
+ URJ_CABLE_PARPORT_DEV_PARALLEL,
+ direct_connect,
+ direct_parport_free,
+ direct_open,
+ direct_close,
+ direct_set_data,
+ direct_get_data,
+ direct_get_status,
+ direct_set_control
+};
+
+#endif /* ENABLE_LOWLEVEL_DIRECT */
--- /dev/null
+/*
+ * $Id$
+ *
+ * Linux ppdev Driver
+ * Copyright (C) 2003 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2003.
+ *
+ */
+
+#include <sysdep.h>
+
+#ifdef ENABLE_LOWLEVEL_PPDEV
+
+#include <stdio.h>
+#include <fcntl.h>
+#ifdef HAVE_STROPTS_H
+#include <stropts.h>
+#endif
+#include <unistd.h>
+#include <linux/ppdev.h>
+#include <linux/ioctl.h>
+
+#include <stdlib.h>
+#include <errno.h>
+#include <string.h>
+
+#include <urjtag/error.h>
+#include <urjtag/log.h>
+#include <urjtag/parport.h>
+#include <urjtag/cable.h>
+
+urj_parport_driver_t urj_tap_parport_ppdev_parport_driver;
+
+typedef struct port_node_t port_node_t;
+
+struct port_node_t
+{
+ urj_parport_t *port;
+ port_node_t *next;
+};
+
+static port_node_t *ports = NULL; /* ppdev parallel ports */
+
+typedef struct
+{
+ char *portname;
+ int fd;
+} ppdev_params_t;
+
+static urj_parport_t *
+ppdev_parport_alloc (const char *port)
+{
+ ppdev_params_t *params = malloc (sizeof *params);
+ char *portname = strdup (port);
+ urj_parport_t *parport = malloc (sizeof *parport);
+ port_node_t *node = malloc (sizeof *node);
+
+ if (!node || !parport || !params || !portname)
+ {
+ free (node);
+ free (parport);
+ free (params);
+ free (portname);
+ urj_error_set (URJ_ERROR_OUT_OF_MEMORY,
+ "malloc(%zd)/strdup(%s)/malloc(%zd)/malloc(%zd) fails",
+ sizeof *params, port, sizeof *parport, sizeof *node);
+ return NULL;
+ }
+
+ params->portname = portname;
+ params->fd = -1;
+
+ parport->params = params;
+ parport->driver = &urj_tap_parport_ppdev_parport_driver;
+ parport->cable = NULL;
+
+ node->port = parport;
+ node->next = ports;
+
+ ports = node;
+
+ return parport;
+}
+
+static void
+ppdev_parport_free (urj_parport_t *port)
+{
+ port_node_t **prev;
+
+ for (prev = &ports; *prev; prev = &((*prev)->next))
+ if ((*prev)->port == port)
+ break;
+
+ if (*prev)
+ {
+ port_node_t *pn = *prev;
+ *prev = pn->next;
+ free (pn);
+ }
+
+ free (((ppdev_params_t *) port->params)->portname);
+ free (port->params);
+ free (port);
+}
+
+static urj_parport_t *
+ppdev_connect (const char *devname)
+{
+ port_node_t *pn;
+ urj_parport_t *parport;
+
+ for (pn = ports; pn; pn = pn->next)
+ if (strcmp (pn->port->params, devname) == 0)
+ {
+ urj_log (URJ_LOG_LEVEL_NORMAL,
+ _("Disconnecting %s from ppdev port %s\n"),
+ _(pn->port->cable->driver->description), devname);
+ pn->port->cable->driver->disconnect (pn->port->cable);
+ break;
+ }
+
+ urj_log (URJ_LOG_LEVEL_NORMAL, _("Initializing ppdev port %s\n"), devname);
+
+ parport = ppdev_parport_alloc (devname);
+ if (!parport)
+ return NULL;
+
+ return parport;
+}
+
+static int
+ppdev_open (urj_parport_t *parport)
+{
+ ppdev_params_t *p = parport->params;
+
+ p->fd = open (p->portname, O_RDWR);
+ if (p->fd < 0)
+ {
+ urj_error_IO_set (_("Could not open port %s"), p->portname);
+ return URJ_STATUS_FAIL;
+ }
+
+ if ( /*(ioctl( p->fd, PPEXCL ) == -1) || */
+ (ioctl (p->fd, PPCLAIM) == -1))
+ {
+ urj_error_IO_set (_("Could not claim ppdev device"));
+ close (p->fd);
+ p->fd = -1;
+ return URJ_STATUS_FAIL;
+ }
+
+ return URJ_STATUS_OK;
+}
+
+static int
+ppdev_close (urj_parport_t *parport)
+{
+ int r = URJ_STATUS_OK;
+ ppdev_params_t *p = parport->params;
+
+ if (ioctl (p->fd, PPRELEASE) == -1)
+ {
+ urj_error_IO_set ("ioctl(PPRELEASE) fails");
+ r = URJ_STATUS_FAIL;
+ }
+
+ if (close (p->fd) != 0)
+ {
+ urj_error_IO_set ("Cannot close(%d)", p->fd);
+ return URJ_STATUS_FAIL;
+ }
+
+ p->fd = -1;
+ return r;
+}
+
+static int
+ppdev_set_data (urj_parport_t *parport, unsigned char data)
+{
+ ppdev_params_t *p = parport->params;
+
+ if (ioctl (p->fd, PPWDATA, &data) == -1)
+ {
+ urj_error_IO_set ("ioctl(PPWDATA) fails");
+ return URJ_STATUS_FAIL;
+ }
+
+ return URJ_STATUS_OK;
+}
+
+static int
+ppdev_get_data (urj_parport_t *parport)
+{
+ unsigned char d;
+ ppdev_params_t *p = parport->params;
+
+ if (ioctl (p->fd, PPRDATA, &d) == -1)
+ {
+ urj_error_IO_set ("ioctl(PPRDATA) fails");
+ return -1;
+ }
+
+ return d;
+}
+
+static int
+ppdev_get_status (urj_parport_t *parport)
+{
+ unsigned char d;
+ ppdev_params_t *p = parport->params;
+
+ if (ioctl (p->fd, PPRSTATUS, &d) == -1)
+ {
+ urj_error_IO_set ("ioctl(PPRSTATUS) fails");
+ return -1;
+ }
+
+ return d ^ 0x80; /* BUSY is inverted */
+}
+
+static int
+ppdev_set_control (urj_parport_t *parport, unsigned char data)
+{
+ ppdev_params_t *p = parport->params;
+
+ data ^= 0x0B; /* SELECT, AUTOFD, and STROBE are inverted */
+
+ if (ioctl (p->fd, PPWCONTROL, &data) == -1)
+ {
+ urj_error_IO_set ("ioctl(PPWCONTROL) fails");
+ return URJ_STATUS_FAIL;
+ }
+
+ return URJ_STATUS_OK;
+}
+
+urj_parport_driver_t urj_tap_parport_ppdev_parport_driver = {
+ URJ_CABLE_PARPORT_DEV_PPDEV,
+ ppdev_connect,
+ ppdev_parport_free,
+ ppdev_open,
+ ppdev_close,
+ ppdev_set_data,
+ ppdev_get_data,
+ ppdev_get_status,
+ ppdev_set_control
+};
+
+#endif /* ENABLE_LOWLEVEL_PPDEV */
--- /dev/null
+/*
+ * $Id$
+ *
+ * FreeBSD ppi Driver
+ * Copyright (C) 2005 Daniel O'Connor
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Daniel O'Connor <doconnor@gsoft.com.au> July 2005.
+ *
+ */
+
+#include <sysdep.h>
+
+#ifdef HAVE_DEV_PPBUS_PPI_H
+
+#include <errno.h>
+#include <fcntl.h>
+#include <unistd.h>
+#include <dev/ppbus/ppi.h>
+#include <dev/ppbus/ppbconf.h>
+
+#include <stdlib.h>
+#include <string.h>
+
+#include <urjtag/error.h>
+#include <urjtag/log.h>
+#include <urjtag/parport.h>
+#include <urjtag/cable.h>
+
+urj_parport_driver_t urj_tap_parport_ppi_parport_driver;
+
+typedef struct port_node_t port_node_t;
+
+struct port_node_t
+{
+ urj_parport_t *port;
+ port_node_t *next;
+};
+
+static port_node_t *ports = NULL; /* ppi parallel ports */
+
+typedef struct
+{
+ char *portname;
+ int fd;
+} ppi_params_t;
+
+static urj_parport_t *
+ppi_parport_alloc (const char *port)
+{
+ ppi_params_t *params = malloc (sizeof *params);
+ char *portname = strdup (port);
+ urj_parport_t *parport = malloc (sizeof *parport);
+ port_node_t *node = malloc (sizeof *node);
+
+ if (!node || !parport || !params || !portname)
+ {
+ free (node);
+ free (parport);
+ free (params);
+ free (portname);
+ urj_error_set (URJ_ERROR_OUT_OF_MEMORY,
+ "malloc(%zd)/strdup(%s)/malloc(%zd)/malloc(%zd) fails",
+ sizeof *params, port, sizeof *parport, sizeof *node);
+ return NULL;
+ }
+
+ params->portname = portname;
+ params->fd = -1;
+
+ parport->params = params;
+ parport->driver = &urj_tap_parport_ppi_parport_driver;
+ parport->cable = NULL;
+
+ node->port = parport;
+ node->next = ports;
+
+ ports = node;
+
+ return parport;
+}
+
+static void
+ppi_parport_free (urj_parport_t *port)
+{
+ port_node_t **prev;
+
+ for (prev = &ports; *prev; prev = &((*prev)->next))
+ if ((*prev)->port == port)
+ break;
+
+ if (*prev)
+ {
+ port_node_t *pn = *prev;
+ *prev = pn->next;
+ free (pn);
+ }
+
+ free (((ppi_params_t *) port->params)->portname);
+ free (port->params);
+ free (port);
+}
+
+static urj_cable_t *
+ppi_connect (const char *devname)
+{
+ port_node_t *pn;
+ urj_parport_t *parport;
+
+ for (pn = ports; pn; pn = pn->next)
+ if (strcmp (pn->port->params, devname) == 0)
+ {
+ urj_log (URJ_LOG_LEVEL_NORMAL,
+ _("Disconnecting %s from ppi port %s\n"),
+ _(pn->port->cable->driver->description),
+ devname);
+ pn->port->cable->driver->disconnect (pn->port->cable);
+ break;
+ }
+
+ urj_log (URJ_LOG_LEVEL_NORMAL, _("Initializing on ppi port %s\n"), devname);
+
+ parport = ppi_parport_alloc (devname);
+ if (!parport)
+ {
+ return NULL;
+ }
+
+ return parport;
+}
+
+static int
+ppi_open (urj_parport_t *parport)
+{
+ ppi_params_t *p = parport->params;
+
+ p->fd = open (p->portname, O_RDWR);
+ if (p->fd < 0)
+ {
+ urj_error_IO_set ("Cannot open(%s)", p->portname);
+ return URJ_STATUS_FAIL;
+ }
+
+ return URJ_STATUS_OK;
+}
+
+static int
+ppi_close (urj_parport_t *parport)
+{
+ int r = URJ_STATUS_OK;
+ ppi_params_t *p = parport->params;
+
+ if (close (p->fd) != 0)
+ {
+ urj_error_IO_set ("Cannot close(%d)", p->fd);
+ return URJ_STATUS_FAIL;
+ }
+
+ p->fd = -1;
+ return r;
+}
+
+static int
+ppi_set_data (urj_parport_t *parport, unsigned char data)
+{
+ ppi_params_t *p = parport->params;
+
+ uint8_t d = data;
+
+ if (ioctl (p->fd, PPISDATA, &d) == -1)
+ {
+ urj_error_IO_set ("ioctl(PPISDATA) fails");
+ return URJ_STATUS_FAIL;
+ }
+
+ return URJ_STATUS_OK;
+}
+
+static int
+ppi_get_data (urj_parport_t *parport)
+{
+ unsigned char d;
+ ppi_params_t *p = parport->params;
+
+ if (ioctl (p->fd, PPIGDATA, &d) == -1)
+ {
+ urj_error_IO_set ("ioctl(PPIGDATA) fails");
+ return -1;
+ }
+
+ return d;
+}
+
+static int
+ppi_get_status (urj_parport_t *parport)
+{
+ unsigned char d;
+ ppi_params_t *p = parport->params;
+
+ if (ioctl (p->fd, PPIGSTATUS, &d) == -1)
+ {
+ urj_error_IO_set ("ioctl(PPIGSTATUS) fails");
+ return -1;
+ }
+
+ return d ^ 0x80; /* BUSY is inverted */
+}
+
+static int
+ppi_set_control (urj_parport_t *parport, unsigned char data)
+{
+ ppi_params_t *p = parport->params;
+
+ uint8_t d = data ^ 0x0B; /* SELECT, AUTOFD, and STROBE are inverted */
+
+ if (ioctl (p->fd, PPIGCTRL, &d) == -1)
+ {
+ urj_error_IO_set ("ioctl(PPIGCTRL) fails");
+ return URJ_STATUS_FAIL;
+ }
+
+ return URJ_STATUS_OK;
+}
+
+urj_parport_driver_t urj_tap_parport_ppi_parport_driver = {
+ URJ_CABLE_PARPORT_DEV_PPI,
+ ppi_connect,
+ ppi_parport_free,
+ ppi_open,
+ ppi_close,
+ ppi_set_data,
+ ppi_get_data,
+ ppi_get_status,
+ ppi_set_control
+};
+
+#endif /* HAVE_DEV_PPBUS_PPI_H */
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2002, 2003 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2002, 2003.
+ *
+ */
+
+#include <stdlib.h>
+#include <string.h>
+
+#include <urjtag/error.h>
+#include <urjtag/log.h>
+#include <urjtag/tap_register.h>
+
+urj_tap_register_t *
+urj_tap_register_alloc (int len)
+{
+ urj_tap_register_t *tr;
+
+ if (len < 1)
+ {
+ urj_error_set (URJ_ERROR_INVALID, "len < 1");
+ return NULL;
+ }
+
+ tr = malloc (sizeof (urj_tap_register_t));
+ if (!tr)
+ {
+ urj_error_set (URJ_ERROR_OUT_OF_MEMORY, "malloc(%zd) fails",
+ sizeof (urj_tap_register_t));
+ return NULL;
+ }
+
+ tr->data = malloc (len);
+ if (!tr->data)
+ {
+ free (tr);
+ urj_error_set (URJ_ERROR_OUT_OF_MEMORY, "malloc(%zd) fails",
+ (size_t) len);
+ return NULL;
+ }
+
+ memset (tr->data, 0, len);
+
+ tr->string = malloc (len + 1);
+ if (!tr->string)
+ {
+ free (tr->data);
+ free (tr);
+ urj_error_set (URJ_ERROR_OUT_OF_MEMORY, "malloc(%zd) fails",
+ (size_t) (len + 1));
+ return NULL;
+ }
+
+ tr->len = len;
+ tr->string[len] = '\0';
+
+ return tr;
+}
+
+urj_tap_register_t *
+urj_tap_register_duplicate (const urj_tap_register_t *tr)
+{
+ if (!tr)
+ {
+ urj_error_set (URJ_ERROR_INVALID, "tr == NULL");
+ return NULL;
+ }
+
+ return urj_tap_register_init (urj_tap_register_alloc (tr->len),
+ urj_tap_register_get_string (tr));
+}
+
+void
+urj_tap_register_free (urj_tap_register_t *tr)
+{
+ if (tr)
+ {
+ free (tr->data);
+ free (tr->string);
+ }
+ free (tr);
+}
+
+urj_tap_register_t *
+urj_tap_register_fill (urj_tap_register_t *tr, int val)
+{
+ if (tr)
+ memset (tr->data, val & 1, tr->len);
+
+ return tr;
+}
+
+const char *
+urj_tap_register_get_string (const urj_tap_register_t *tr)
+{
+ int i;
+
+ if (!tr)
+ return NULL;
+
+ for (i = 0; i < tr->len; i++)
+ tr->string[tr->len - 1 - i] = (tr->data[i] & 1) ? '1' : '0';
+
+ return tr->string;
+}
+
+uint64_t
+urj_tap_register_get_value (const urj_tap_register_t *tr)
+{
+ int i;
+ uint64_t l, b;
+
+ if (!tr)
+ return 0;
+
+ l = 0;
+ b = 1;
+ for (i = 0; i < tr->len; ++i)
+ {
+ if (tr->data[i] & 1)
+ l |= b;
+ b <<= 1;
+ }
+
+ return l;
+}
+
+int
+urj_tap_register_all_bits_same_value (const urj_tap_register_t *tr)
+{
+ int i, value;
+ if (!tr)
+ return -1;
+ if (tr->len < 0)
+ return -1;
+
+ /* Return -1 if any of the bits in the register
+ * differs from the others; the value otherwise. */
+
+ value = tr->data[0] & 1;
+
+ for (i = 1; i < tr->len; i++)
+ {
+ if ((tr->data[i] & 1) != value)
+ return -1;
+ }
+ return value;
+}
+
+urj_tap_register_t *
+urj_tap_register_init (urj_tap_register_t *tr, const char *value)
+{
+ int i;
+
+ const char *p;
+
+ if (!value || !tr)
+ return tr;
+
+ p = strchr (value, '\0');
+
+ for (i = 0; i < tr->len; i++)
+ {
+ if (p == value)
+ tr->data[i] = 0;
+ else
+ {
+ p--;
+ tr->data[i] = (*p == '0') ? 0 : 1;
+ }
+ }
+
+ return tr;
+}
+
+int
+urj_tap_register_compare (const urj_tap_register_t *tr,
+ const urj_tap_register_t *tr2)
+{
+ int i;
+
+ if (!tr && !tr2)
+ return 0;
+
+ if (!tr || !tr2)
+ return 1;
+
+ if (tr->len != tr2->len)
+ return 1;
+
+ for (i = 0; i < tr->len; i++)
+ if (tr->data[i] != tr2->data[i])
+ return 1;
+
+ return 0;
+}
+
+int
+urj_tap_register_match (const urj_tap_register_t *tr, const char *expr)
+{
+ int i;
+ const char *s;
+
+ if (!tr || !expr || (tr->len != strlen (expr)))
+ return 0;
+
+ s = urj_tap_register_get_string (tr);
+
+ for (i = 0; i < tr->len; i++)
+ if ((expr[i] != '?') && (expr[i] != s[i]))
+ return 0;
+
+ return 1;
+}
+
+urj_tap_register_t *
+urj_tap_register_inc (urj_tap_register_t *tr)
+{
+ int i;
+
+ if (!tr)
+ return NULL;
+
+ for (i = 0; i < tr->len; i++)
+ {
+ tr->data[i] ^= 1;
+
+ if (tr->data[i] == 1)
+ break;
+ }
+
+ return tr;
+}
+
+urj_tap_register_t *
+urj_tap_register_dec (urj_tap_register_t *tr)
+{
+ int i;
+
+ if (!tr)
+ return NULL;
+
+ for (i = 0; i < tr->len; i++)
+ {
+ tr->data[i] ^= 1;
+
+ if (tr->data[i] == 0)
+ break;
+ }
+
+ return tr;
+}
+
+urj_tap_register_t *
+urj_tap_register_shift_right (urj_tap_register_t *tr, int shift)
+{
+ int i;
+
+ if (!tr)
+ return NULL;
+
+ if (shift < 1)
+ return tr;
+
+ for (i = 0; i < tr->len; i++)
+ {
+ if (i + shift < tr->len)
+ tr->data[i] = tr->data[i + shift];
+ else
+ tr->data[i] = 0;
+ }
+
+ return tr;
+}
+
+urj_tap_register_t *
+urj_tap_register_shift_left (urj_tap_register_t *tr, int shift)
+{
+ int i;
+
+ if (!tr)
+ return NULL;
+
+ if (shift < 1)
+ return tr;
+
+ for (i = tr->len - 1; i >= 0; i--)
+ {
+ if (i - shift >= 0)
+ tr->data[i] = tr->data[i - shift];
+ else
+ tr->data[i] = 0;
+ }
+
+ return tr;
+}
--- /dev/null
+/*
+ * $Id$
+ *
+ * TAP state handling
+ * Copyright (C) 2002 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2002.
+ *
+ */
+
+#include <urjtag/tap_state.h>
+#include <urjtag/chain.h>
+
+int
+urj_tap_state (urj_chain_t *chain)
+{
+ return chain->state;
+}
+
+int
+urj_tap_state_init (urj_chain_t *chain)
+{
+ return chain->state = URJ_TAP_STATE_UNKNOWN_STATE;
+}
+
+int
+urj_tap_state_done (urj_chain_t *chain)
+{
+ return chain->state = URJ_TAP_STATE_UNKNOWN_STATE;
+}
+
+int
+urj_tap_state_reset (urj_chain_t *chain)
+{
+ return chain->state = URJ_TAP_STATE_TEST_LOGIC_RESET;
+}
+
+int
+urj_tap_state_set_trst (urj_chain_t *chain, int old_trst, int new_trst)
+{
+ old_trst = old_trst ? 1 : 0;
+ new_trst = new_trst ? 1 : 0;
+
+ if (old_trst != new_trst)
+ {
+ if (new_trst)
+ chain->state = URJ_TAP_STATE_TEST_LOGIC_RESET;
+ else
+ chain->state = URJ_TAP_STATE_UNKNOWN_STATE;
+ }
+
+ return chain->state;
+}
+
+int
+urj_tap_state_clock (urj_chain_t *chain, int tms)
+{
+ if (tms)
+ {
+ switch (chain->state)
+ {
+ case URJ_TAP_STATE_TEST_LOGIC_RESET:
+ break;
+ case URJ_TAP_STATE_RUN_TEST_IDLE:
+ case URJ_TAP_STATE_UPDATE_DR:
+ case URJ_TAP_STATE_UPDATE_IR:
+ chain->state = URJ_TAP_STATE_SELECT_DR_SCAN;
+ break;
+ case URJ_TAP_STATE_SELECT_DR_SCAN:
+ chain->state = URJ_TAP_STATE_SELECT_IR_SCAN;
+ break;
+ case URJ_TAP_STATE_CAPTURE_DR:
+ case URJ_TAP_STATE_SHIFT_DR:
+ chain->state = URJ_TAP_STATE_EXIT1_DR;
+ break;
+ case URJ_TAP_STATE_EXIT1_DR:
+ case URJ_TAP_STATE_EXIT2_DR:
+ chain->state = URJ_TAP_STATE_UPDATE_DR;
+ break;
+ case URJ_TAP_STATE_PAUSE_DR:
+ chain->state = URJ_TAP_STATE_EXIT2_DR;
+ break;
+ case URJ_TAP_STATE_SELECT_IR_SCAN:
+ chain->state = URJ_TAP_STATE_TEST_LOGIC_RESET;
+ break;
+ case URJ_TAP_STATE_CAPTURE_IR:
+ case URJ_TAP_STATE_SHIFT_IR:
+ chain->state = URJ_TAP_STATE_EXIT1_IR;
+ break;
+ case URJ_TAP_STATE_EXIT1_IR:
+ case URJ_TAP_STATE_EXIT2_IR:
+ chain->state = URJ_TAP_STATE_UPDATE_IR;
+ break;
+ case URJ_TAP_STATE_PAUSE_IR:
+ chain->state = URJ_TAP_STATE_EXIT2_IR;
+ break;
+ default:
+ chain->state = URJ_TAP_STATE_UNKNOWN_STATE;
+ break;
+ }
+ }
+ else
+ {
+ switch (chain->state)
+ {
+ case URJ_TAP_STATE_TEST_LOGIC_RESET:
+ case URJ_TAP_STATE_RUN_TEST_IDLE:
+ case URJ_TAP_STATE_UPDATE_DR:
+ case URJ_TAP_STATE_UPDATE_IR:
+ chain->state = URJ_TAP_STATE_RUN_TEST_IDLE;
+ break;
+ case URJ_TAP_STATE_SELECT_DR_SCAN:
+ chain->state = URJ_TAP_STATE_CAPTURE_DR;
+ break;
+ case URJ_TAP_STATE_CAPTURE_DR:
+ case URJ_TAP_STATE_SHIFT_DR:
+ case URJ_TAP_STATE_EXIT2_DR:
+ chain->state = URJ_TAP_STATE_SHIFT_DR;
+ break;
+ case URJ_TAP_STATE_EXIT1_DR:
+ case URJ_TAP_STATE_PAUSE_DR:
+ chain->state = URJ_TAP_STATE_PAUSE_DR;
+ break;
+ case URJ_TAP_STATE_SELECT_IR_SCAN:
+ chain->state = URJ_TAP_STATE_CAPTURE_IR;
+ break;
+ case URJ_TAP_STATE_CAPTURE_IR:
+ case URJ_TAP_STATE_SHIFT_IR:
+ case URJ_TAP_STATE_EXIT2_IR:
+ chain->state = URJ_TAP_STATE_SHIFT_IR;
+ break;
+ case URJ_TAP_STATE_EXIT1_IR:
+ case URJ_TAP_STATE_PAUSE_IR:
+ chain->state = URJ_TAP_STATE_PAUSE_IR;
+ break;
+ default:
+ chain->state = URJ_TAP_STATE_UNKNOWN_STATE;
+ break;
+ }
+ }
+
+ return chain->state;
+}
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2002 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2002.
+ *
+ */
+
+#include <sysdep.h>
+
+#include <stdio.h>
+
+#include <urjtag/log.h>
+#include <urjtag/cable.h>
+#include <urjtag/part.h>
+#include <urjtag/tap_register.h>
+#include <urjtag/tap.h>
+#include <urjtag/tap_state.h>
+#include <urjtag/chain.h>
+
+void
+urj_tap_reset (urj_chain_t *chain)
+{
+ urj_tap_state_reset (chain);
+
+ urj_tap_chain_clock (chain, 1, 0, 5); /* Test-Logic-Reset */
+ urj_tap_chain_clock (chain, 0, 0, 1); /* Run-Test/Idle */
+}
+
+int
+urj_tap_reset_bypass (urj_chain_t *chain)
+{
+ urj_tap_reset (chain);
+
+ /* set all parts in the chain to BYPASS instruction if the total
+ instruction register length of the chain is already known */
+ if (chain->total_instr_len > 0)
+ {
+ urj_tap_register_t *ir = urj_tap_register_fill (
+ urj_tap_register_alloc (chain->total_instr_len), 1);
+ if (!ir)
+ return URJ_STATUS_FAIL;
+
+ urj_tap_capture_ir (chain);
+ urj_tap_shift_register (chain, ir, NULL, URJ_CHAIN_EXITMODE_IDLE);
+ urj_tap_register_free (ir);
+
+ urj_part_parts_set_instruction (chain->parts, "BYPASS");
+ }
+
+ return URJ_STATUS_OK;
+}
+
+void
+urj_tap_defer_shift_register (urj_chain_t *chain,
+ const urj_tap_register_t *in,
+ urj_tap_register_t *out, int tap_exit)
+{
+ int i;
+
+ if (!(urj_tap_state (chain) & URJ_TAP_STATE_SHIFT))
+ urj_log (URJ_LOG_LEVEL_NORMAL, _("%s: Invalid state: %2X\n"), __func__,
+ urj_tap_state (chain));
+
+ /* Capture-DR, Capture-IR, Shift-DR, Shift-IR, Exit2-DR or Exit2-IR state */
+ if (urj_tap_state (chain) & URJ_TAP_STATE_CAPTURE)
+ urj_tap_chain_defer_clock (chain, 0, 0, 1); /* save last TDO bit :-) */
+
+ i = in->len;
+ if (tap_exit)
+ i--;
+ if (out && out->len < i)
+ i = out->len;
+
+ if (out)
+ urj_tap_cable_defer_transfer (chain->cable, i, in->data, out->data);
+ else
+ urj_tap_cable_defer_transfer (chain->cable, i, in->data, NULL);
+
+ for (; i < in->len; i++)
+ {
+ if (out != NULL && (i < out->len))
+ out->data[i] = urj_tap_cable_defer_get_tdo (chain->cable);
+ urj_tap_chain_defer_clock (chain, (tap_exit != URJ_CHAIN_EXITMODE_SHIFT && ((i + 1) == in->len)) ? 1 : 0, in->data[i], 1); /* Shift (& Exit1) */
+ }
+
+ /* Shift-DR, Shift-IR, Exit1-DR or Exit1-IR state */
+ if (tap_exit == URJ_CHAIN_EXITMODE_IDLE)
+ {
+ urj_tap_chain_defer_clock (chain, 1, 0, 1); /* Update-DR or Update-IR */
+ urj_tap_chain_defer_clock (chain, 0, 0, 1); /* Run-Test/Idle */
+ }
+ else if (tap_exit == URJ_CHAIN_EXITMODE_UPDATE)
+ urj_tap_chain_defer_clock (chain, 1, 0, 1); /* Update-DR or Update-IR */
+}
+
+void
+urj_tap_shift_register_output (urj_chain_t *chain,
+ const urj_tap_register_t *in,
+ urj_tap_register_t *out, int tap_exit)
+{
+ if (out != NULL)
+ {
+ int j;
+
+ j = in->len;
+ if (tap_exit)
+ j--;
+ if (out && out->len < j)
+ j = out->len;
+
+ /* Asking for the result of the cable transfer
+ * actually flushes the queue */
+
+ (void) urj_tap_cable_transfer_late (chain->cable, out->data);
+ for (; j < in->len && j < out->len; j++)
+ out->data[j] = urj_tap_cable_get_tdo_late (chain->cable);
+ }
+}
+
+void
+urj_tap_shift_register (urj_chain_t *chain, const urj_tap_register_t *in,
+ urj_tap_register_t *out, int tap_exit)
+{
+ urj_tap_defer_shift_register (chain, in, out, tap_exit);
+ urj_tap_shift_register_output (chain, in, out, tap_exit);
+}
+
+void
+urj_tap_capture_dr (urj_chain_t *chain)
+{
+ if ((urj_tap_state (chain) & (URJ_TAP_STATE_RESET | URJ_TAP_STATE_IDLE))
+ != URJ_TAP_STATE_IDLE)
+ urj_log (URJ_LOG_LEVEL_NORMAL, _("%s: Invalid state: %2X\n"), __func__,
+ urj_tap_state (chain));
+
+ /* Run-Test/Idle or Update-DR or Update-IR state */
+ urj_tap_chain_defer_clock (chain, 1, 0, 1); /* Select-DR-Scan */
+ urj_tap_chain_defer_clock (chain, 0, 0, 1); /* Capture-DR */
+}
+
+void
+urj_tap_capture_ir (urj_chain_t *chain)
+{
+ if ((urj_tap_state (chain) & (URJ_TAP_STATE_RESET | URJ_TAP_STATE_IDLE))
+ != URJ_TAP_STATE_IDLE)
+ urj_log (URJ_LOG_LEVEL_NORMAL, _("%s: Invalid state: %2X\n"), __func__,
+ urj_tap_state (chain));
+
+ /* Run-Test/Idle or Update-DR or Update-IR state */
+ urj_tap_chain_defer_clock (chain, 1, 0, 2); /* Select-DR-Scan, then Select-IR-Scan */
+ urj_tap_chain_defer_clock (chain, 0, 0, 1); /* Capture-IR */
+}
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2008 K. Waschk
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Kolja Waschk <kawk>, 2008
+ *
+ */
+
+#include <sysdep.h>
+
+#include <string.h>
+#include <stddef.h>
+
+#include <urjtag/usbconn.h>
+
+/* @@@@ RFHH stick these into a .h file */
+#ifdef HAVE_LIBUSB
+extern urj_usbconn_driver_t urj_tap_usbconn_libusb_driver;
+#endif /* HAVE_LIBUSB */
+#ifdef ENABLE_LOWLEVEL_FTD2XX
+extern urj_usbconn_driver_t urj_tap_usbconn_ftd2xx_driver;
+extern urj_usbconn_driver_t urj_tap_usbconn_ftd2xx_mpsse_driver;
+#endif /* ENABLE_LOWLEVEL_FTD2XX */
+#ifdef ENABLE_LOWLEVEL_FTDI
+extern urj_usbconn_driver_t urj_tap_usbconn_ftdi_driver;
+extern urj_usbconn_driver_t urj_tap_usbconn_ftdi_mpsse_driver;
+#endif /* ENABLE_LOWLEVEL_FTDI */
+
+urj_usbconn_driver_t *urj_tap_usbconn_drivers[] = {
+#ifdef HAVE_LIBUSB
+ &urj_tap_usbconn_libusb_driver,
+#endif /* HAVE_LIBUSB */
+#ifdef ENABLE_LOWLEVEL_FTD2XX
+ &urj_tap_usbconn_ftd2xx_driver,
+ &urj_tap_usbconn_ftd2xx_mpsse_driver,
+#endif /* ENABLE_LOWLEVEL_FTD2XX */
+#ifdef ENABLE_LOWLEVEL_FTDI
+ &urj_tap_usbconn_ftdi_driver,
+ &urj_tap_usbconn_ftdi_mpsse_driver,
+#endif /* ENABLE_LOWLEVEL_FTDI */
+ NULL /* last must be NULL */
+};
+
+int
+urj_tap_usbconn_open (urj_usbconn_t *conn)
+{
+ return conn->driver->open (conn);
+}
+
+int
+urj_tap_usbconn_close (urj_usbconn_t *conn)
+{
+ return conn->driver->close (conn);
+}
+
+int
+urj_tap_usbconn_read (urj_usbconn_t *conn, uint8_t *buf, int len)
+{
+ if (conn->driver->read)
+ return conn->driver->read (conn, buf, len);
+ else
+ return 0;
+}
+
+int
+urj_tap_usbconn_write (urj_usbconn_t *conn, uint8_t *buf, int len, int recv)
+{
+ if (conn->driver->write)
+ return conn->driver->write (conn, buf, len, recv);
+ else
+ return 0;
+}
--- /dev/null
+/*
+ * $Id$
+ *
+ * Link driver for accessing FTDI devices via libftd2xx
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Arnim Laeuger, 2008
+ *
+ */
+
+#include <sysdep.h>
+
+#include <fcntl.h>
+#if __CYGWIN__ || __MINGW32__
+#include <windows.h>
+#endif
+#include <stdio.h>
+#include <string.h>
+#ifdef HAVE_STROPTS_H
+#include <stropts.h>
+#endif
+#include <stdlib.h>
+#include <stdint.h>
+#include <unistd.h>
+
+#include <ftd2xx.h>
+
+#include <urjtag/error.h>
+#include <urjtag/log.h>
+#include <urjtag/usbconn.h>
+#include "libftdx.h"
+
+
+/* enables debug output */
+static const char *module = "usbconn_ftd2xx_";
+
+
+typedef struct
+{
+ /* USB device information */
+ unsigned int vid;
+ unsigned int pid;
+ FT_HANDLE fc;
+ char *serial;
+ /* send and receive buffer handling */
+ uint32_t send_buf_len;
+ uint32_t send_buffered;
+ uint8_t *send_buf;
+ uint32_t recv_buf_len;
+ uint32_t to_recv;
+ uint32_t recv_write_idx;
+ uint32_t recv_read_idx;
+ uint8_t *recv_buf;
+} ftd2xx_param_t;
+
+urj_usbconn_driver_t urj_tap_usbconn_ftd2xx_driver;
+urj_usbconn_driver_t urj_tap_usbconn_ftd2xx_mpsse_driver;
+
+static int usbconn_ftd2xx_common_open (urj_usbconn_t *conn, urj_log_level_t ll);
+static void usbconn_ftd2xx_free (urj_usbconn_t *conn);
+
+static const char *
+ftd2xx_status_string (FT_STATUS status)
+{
+ switch (status)
+ {
+ case FT_OK: return "OK";
+ case FT_INVALID_HANDLE: return "invalid handle";
+ case FT_DEVICE_NOT_FOUND: return "device not found";
+ case FT_DEVICE_NOT_OPENED: return "device not opened";
+ case FT_IO_ERROR: return "io error";
+ case FT_INSUFFICIENT_RESOURCES: return "insufficient resources";
+ case FT_INVALID_PARAMETER: return "invalid parameter";
+ case FT_INVALID_BAUD_RATE: return "invalid baud rate";
+
+ case FT_DEVICE_NOT_OPENED_FOR_ERASE: return "device not opened for erase";
+ case FT_DEVICE_NOT_OPENED_FOR_WRITE: return "device not opened for write";
+ case FT_FAILED_TO_WRITE_DEVICE: return "failed to write device";
+ case FT_EEPROM_READ_FAILED: return "eeprom read failed";
+ case FT_EEPROM_WRITE_FAILED: return "eeprom write failed";
+ case FT_EEPROM_ERASE_FAILED: return "eeprom erase failed";
+ case FT_EEPROM_NOT_PRESENT: return "eeprom not present";
+ case FT_EEPROM_NOT_PROGRAMMED: return "eeprom not programmed";
+ case FT_INVALID_ARGS: return "invalid args";
+ case FT_NOT_SUPPORTED: return "not supported";
+ case FT_OTHER_ERROR: return "other error";
+ }
+
+ return "undefined FTD2xx error";
+}
+
+/* ---------------------------------------------------------------------- */
+
+/** @return number of flushed bytes on success; -1 on error */
+static int
+usbconn_ftd2xx_flush (ftd2xx_param_t *p)
+{
+ FT_STATUS status;
+ DWORD xferred;
+ DWORD recvd = 0;
+
+ if (!p->fc)
+ return -1;
+
+ urj_log (URJ_LOG_LEVEL_DETAIL, "%sflush begin:\n", module);
+ urj_log (URJ_LOG_LEVEL_DETAIL, " send_buf_len %d, send_buffered %d\n",
+ p->send_buf_len, p->send_buffered);
+ urj_log (URJ_LOG_LEVEL_DETAIL, " recv_buf_len %d, to_recv %d\n",
+ p->recv_buf_len, p->to_recv);
+ urj_log (URJ_LOG_LEVEL_DETAIL, " recv_write_idx %d, recv_read_idx %d\n",
+ p->recv_write_idx, p->recv_read_idx);
+
+ if (p->send_buffered == 0)
+ return 0;
+
+ if ((status = FT_Write (p->fc, p->send_buf, p->send_buffered,
+ &xferred)) != FT_OK)
+ {
+ urj_error_set (URJ_ERROR_FTD, _("FT_Write() failed: %s"),
+ ftd2xx_status_string(status));
+ return -1;
+ }
+
+ if (xferred < p->send_buffered)
+ {
+ urj_error_set (URJ_ERROR_ILLEGAL_STATE,
+ _("Written fewer bytes than requested"));
+ return -1;
+ }
+
+ p->send_buffered = 0;
+
+ /* now read all scheduled receive bytes */
+ if (p->to_recv)
+ {
+ if (p->recv_write_idx + p->to_recv > p->recv_buf_len)
+ {
+ /* extend receive buffer */
+ p->recv_buf_len = p->recv_write_idx + p->to_recv;
+ if (p->recv_buf)
+ p->recv_buf = realloc (p->recv_buf, p->recv_buf_len);
+ }
+
+ if (!p->recv_buf)
+ {
+ urj_error_set (URJ_ERROR_ILLEGAL_STATE,
+ _("Receive buffer does not exist"));
+ return -1;
+ }
+
+ while (recvd == 0)
+ if ((status = FT_Read (p->fc, &(p->recv_buf[p->recv_write_idx]),
+ p->to_recv, &recvd)) != FT_OK)
+ urj_error_set (URJ_ERROR_FTD, _("Error from FT_Read(): %s"),
+ ftd2xx_status_string(status));
+
+ if (recvd < p->to_recv)
+ urj_log (URJ_LOG_LEVEL_NORMAL,
+ _("%s(): Received fewer bytes than requested.\n"),
+ __func__);
+
+ p->to_recv -= recvd;
+ p->recv_write_idx += recvd;
+ }
+
+ urj_log (URJ_LOG_LEVEL_DETAIL,
+ "%sflush end: status %ld, xferred %ld, recvd %ld\n", module,
+ status, xferred, recvd);
+
+ return status != FT_OK ? -1 : xferred;
+}
+
+/* ---------------------------------------------------------------------- */
+
+static int
+usbconn_ftd2xx_read (urj_usbconn_t *conn, uint8_t *buf, int len)
+{
+ ftd2xx_param_t *p = conn->params;
+ int cpy_len;
+ FT_STATUS status = FT_OK;
+ DWORD recvd = 0;
+
+ urj_log (URJ_LOG_LEVEL_DETAIL, "%sread begin: len %d\n", module, len);
+
+ if (!p->fc)
+ return -1;
+
+ /* flush send buffer to get all scheduled receive bytes */
+ if (usbconn_ftd2xx_flush (p) < 0)
+ return -1;
+
+ if (len == 0)
+ return 0;
+
+ /* check for number of remaining bytes in receive buffer */
+ cpy_len = p->recv_write_idx - p->recv_read_idx;
+ if (cpy_len > len)
+ cpy_len = len;
+ len -= cpy_len;
+
+ if (cpy_len > 0)
+ {
+ /* get data from the receive buffer */
+ memcpy (buf, &(p->recv_buf[p->recv_read_idx]), cpy_len);
+ p->recv_read_idx += cpy_len;
+ if (p->recv_read_idx == p->recv_write_idx)
+ p->recv_read_idx = p->recv_write_idx = 0;
+ }
+
+ if (len > 0)
+ {
+ /* need to get more data directly from the device */
+ while (recvd == 0)
+ if ((status =
+ FT_Read (p->fc, &(buf[cpy_len]), len, &recvd)) != FT_OK)
+ urj_error_set (URJ_ERROR_FTD, _("Error from FT_Read(): %s"),
+ ftd2xx_status_string(status));
+ }
+
+ urj_log (URJ_LOG_LEVEL_DETAIL, "%sread end : status %ld, length %d\n",
+ module, status, cpy_len + len);
+
+ return status != FT_OK ? -1 : cpy_len + len;
+}
+
+/* ---------------------------------------------------------------------- */
+
+static int
+usbconn_ftd2xx_write (urj_usbconn_t *conn, uint8_t *buf, int len, int recv)
+{
+ ftd2xx_param_t *p = conn->params;
+ int xferred = 0;
+
+ if (!p->fc)
+ return -1;
+
+ urj_log (URJ_LOG_LEVEL_DETAIL, "%swrite begin: len %d, recv %d\n", module,
+ len, recv);
+
+ /* this write function will try to buffer write data
+ buffering will be ceased and a flush triggered in two cases. */
+
+ /* Case A: max number of scheduled receive bytes will be exceeded
+ with this write
+ Case B: max number of scheduled send bytes has been reached */
+ if ((p->to_recv + recv > URJ_USBCONN_FTD2XX_MAXRECV)
+ || ((p->send_buffered > URJ_USBCONN_FTDX_MAXSEND)
+ && (p->to_recv == 0)))
+ xferred = usbconn_ftd2xx_flush (p);
+
+ if (xferred < 0)
+ return -1;
+
+ /* now buffer this write */
+ if (p->send_buffered + len > p->send_buf_len)
+ {
+ p->send_buf_len = p->send_buffered + len;
+ if (p->send_buf)
+ p->send_buf = realloc (p->send_buf, p->send_buf_len);
+ }
+
+ if (p->send_buf)
+ {
+ memcpy (&(p->send_buf[p->send_buffered]), buf, len);
+ p->send_buffered += len;
+ if (recv > 0)
+ p->to_recv += recv;
+
+ if (recv < 0)
+ {
+ /* immediate write requested, so flush the buffered data */
+ xferred = usbconn_ftd2xx_flush (p);
+ }
+
+ urj_log (URJ_LOG_LEVEL_DETAIL, "%swrite end: xferred %d\n", module,
+ xferred);
+
+ return xferred < 0 ? -1 : len;
+ }
+ else
+ {
+ urj_error_set (URJ_ERROR_ILLEGAL_STATE,
+ _("Send buffer does not exist"));
+ return -1;
+ }
+}
+
+/* ---------------------------------------------------------------------- */
+
+static urj_usbconn_t *
+usbconn_ftd2xx_connect (urj_usbconn_cable_t *template,
+ const urj_param_t *params[])
+{
+ urj_usbconn_t *c = malloc (sizeof (urj_usbconn_t));
+ ftd2xx_param_t *p = malloc (sizeof (ftd2xx_param_t));
+
+ if (p)
+ {
+ p->send_buf_len = URJ_USBCONN_FTDX_MAXSEND;
+ p->send_buffered = 0;
+ p->send_buf = malloc (p->send_buf_len);
+ p->recv_buf_len = URJ_USBCONN_FTD2XX_MAXRECV;
+ p->to_recv = 0;
+ p->recv_write_idx = 0;
+ p->recv_read_idx = 0;
+ p->recv_buf = malloc (p->recv_buf_len);
+ }
+
+ if (!p || !c || !p->send_buf || !p->recv_buf)
+ {
+ if (p->send_buf)
+ free (p->send_buf);
+ if (p->recv_buf)
+ free (p->recv_buf);
+ if (p)
+ free (p);
+ if (c)
+ free (c);
+ urj_error_set (URJ_ERROR_OUT_OF_MEMORY,
+ "malloc(%zd)/malloc(%zd)/malloc(%s) failed",
+ sizeof (urj_usbconn_t), sizeof (ftd2xx_param_t),
+ "p->send_buf_len");
+ return NULL;
+ }
+
+ p->fc = NULL;
+ p->pid = template->pid;
+ p->vid = template->vid;
+ /* @@@@ RFHH check strdup result */
+ p->serial = template->desc ? strdup (template->desc) : NULL;
+
+ c->params = p;
+ c->driver = &urj_tap_usbconn_ftd2xx_driver;
+ c->cable = NULL;
+
+ /* do a test open with the specified cable paramters,
+ there's no other way to detect the presence of the specified
+ USB device */
+ if (usbconn_ftd2xx_common_open (c, URJ_LOG_LEVEL_DETAIL) != URJ_STATUS_OK)
+ {
+ usbconn_ftd2xx_free (c);
+ return NULL;
+ }
+ FT_Close (p->fc);
+
+ urj_log (URJ_LOG_LEVEL_NORMAL, _("Connected to libftd2xx driver.\n"));
+
+ return c;
+}
+
+
+static urj_usbconn_t *
+usbconn_ftd2xx_mpsse_connect (urj_usbconn_cable_t *template,
+ const urj_param_t *params[])
+{
+ urj_usbconn_t *conn = usbconn_ftd2xx_connect (template, params);
+
+ if (conn)
+ conn->driver = &urj_tap_usbconn_ftd2xx_mpsse_driver;
+
+ return conn;
+}
+
+
+/* ---------------------------------------------------------------------- */
+
+static int
+usbconn_ftd2xx_common_open (urj_usbconn_t *conn, urj_log_level_t ll)
+{
+ ftd2xx_param_t *p = conn->params;
+ FT_STATUS status;
+
+#if !__CYGWIN__ && !__MINGW32__
+ /* Add non-standard Vid/Pid to the linux driver */
+ if ((status = FT_SetVIDPID (p->vid, p->pid)) != FT_OK)
+ urj_warning ("couldn't add %4.4x:%4.4x", p->vid, p->pid);
+#endif
+
+ /* try various methods to open a FTDI device */
+ if (p->serial)
+ {
+ /* serial number/description is specified */
+
+ /* first try to match against the serial string */
+ status = FT_OpenEx (p->serial, FT_OPEN_BY_SERIAL_NUMBER, &(p->fc));
+
+ if (status != FT_OK)
+ /* then try to match against the description string */
+ status = FT_OpenEx (p->serial, FT_OPEN_BY_DESCRIPTION, &(p->fc));
+ }
+ else
+ /* give it a plain try */
+ status = FT_Open (0, &(p->fc));
+
+ if (status != FT_OK)
+ {
+ urj_error_set (URJ_ERROR_FTD, "Unable to open TFDI device: %s",
+ ftd2xx_status_string(status));
+ /* mark ftd2xx layer as not initialized */
+ p->fc = NULL;
+ return URJ_STATUS_FAIL;
+ }
+
+ return URJ_STATUS_OK;
+}
+
+/* ---------------------------------------------------------------------- */
+
+static int
+usbconn_ftd2xx_open (urj_usbconn_t *conn)
+{
+ ftd2xx_param_t *p = conn->params;
+ FT_HANDLE fc;
+ FT_STATUS status;
+
+ if (usbconn_ftd2xx_common_open (conn, URJ_LOG_LEVEL_NORMAL)
+ != URJ_STATUS_OK)
+ return URJ_STATUS_FAIL;
+
+ fc = p->fc;
+
+ if ((status = FT_ResetDevice (fc)) != FT_OK)
+ urj_error_set (URJ_ERROR_FTD, _("Can't reset device: %s"),
+ ftd2xx_status_string(status));
+ if (status == FT_OK)
+ if ((status = FT_Purge (fc, FT_PURGE_RX)) != FT_OK)
+ urj_error_set (URJ_ERROR_FTD, _("Can't purge RX buffer: %s"),
+ ftd2xx_status_string(status));
+
+ if (status == FT_OK)
+ if ((status = FT_SetLatencyTimer (fc, 2)) != FT_OK)
+ urj_error_set (URJ_ERROR_FTD, _("Can't set latency timer: %s"),
+ ftd2xx_status_string(status));
+
+ if (status == FT_OK)
+ if ((status = FT_SetBaudRate (fc, 3E6)) != FT_OK)
+ urj_error_set (URJ_ERROR_FTD, _("Can't set baudrate: %s"),
+ ftd2xx_status_string(status));
+
+ if (status != FT_OK)
+ {
+ FT_Close (fc);
+ /* mark ftdi layer as not initialized */
+ p->fc = NULL;
+ }
+
+ return status != FT_OK ? URJ_STATUS_FAIL : URJ_STATUS_OK;
+}
+
+/* ---------------------------------------------------------------------- */
+
+static int
+usbconn_ftd2xx_mpsse_open (urj_usbconn_t *conn)
+{
+ ftd2xx_param_t *p = conn->params;
+ FT_HANDLE fc;
+ FT_STATUS status;
+
+ if (usbconn_ftd2xx_common_open (conn, URJ_LOG_LEVEL_NORMAL)
+ != URJ_STATUS_OK)
+ return URJ_STATUS_FAIL;
+
+ fc = p->fc;
+
+ /* This sequence might seem weird and containing superfluous stuff.
+ However, it's built after the description of JTAG_InitDevice
+ Ref. FTCJTAGPG10.pdf
+ Intermittent problems will occur when certain steps are skipped. */
+ if ((status = FT_ResetDevice (fc)) != FT_OK)
+ urj_error_set (URJ_ERROR_FTD, _("Can't reset device: %s"),
+ ftd2xx_status_string(status));
+ if (status == FT_OK)
+ if ((status = FT_Purge (fc, FT_PURGE_RX)) != FT_OK)
+ urj_error_set (URJ_ERROR_FTD, _("s(): Can't purge RX buffer: %s"),
+ ftd2xx_status_string(status));
+
+ if (status == FT_OK)
+ if ((status =
+ FT_SetUSBParameters (fc, URJ_USBCONN_FTDX_MAXSEND_MPSSE,
+ URJ_USBCONN_FTDX_MAXSEND_MPSSE)) != FT_OK)
+ urj_error_set (URJ_ERROR_FTD, _("Can't set USB parameters: %s"),
+ ftd2xx_status_string(status));
+
+ if (status == FT_OK)
+ if ((status = FT_SetChars (fc, 0, 0, 0, 0)) != FT_OK)
+ urj_error_set (URJ_ERROR_FTD, _("Can't set special characters: %s"),
+ ftd2xx_status_string(status));
+
+ /* set a reasonable latency timer value
+ if this value is too low then the chip will send intermediate result data
+ in short packets (suboptimal performance) */
+ if (status == FT_OK)
+ if ((status = FT_SetLatencyTimer (fc, 16)) != FT_OK)
+ urj_error_set (URJ_ERROR_FTD, _("Can't set target latency timer: %s"),
+ ftd2xx_status_string(status));
+
+ if (status == FT_OK)
+ if ((status =
+ FT_SetBitMode (fc, 0x0b, 0x02 /* BITMODE_MPSSE */ )) != FT_OK)
+ urj_error_set (URJ_ERROR_FTD, _("Can't set MPSSE bitmode: %s"),
+ ftd2xx_status_string(status));
+
+ if (status == FT_OK)
+ if ((status = FT_ResetDevice (fc)) != FT_OK)
+ urj_error_set (URJ_ERROR_FTD, _("Can't reset device: %s"),
+ ftd2xx_status_string(status));
+ if (status == FT_OK)
+ if ((status = FT_Purge (fc, FT_PURGE_RX)) != FT_OK)
+ urj_error_set (URJ_ERROR_FTD, _("Can't purge RX buffer: %s"),
+ ftd2xx_status_string(status));
+
+ /* set TCK Divisor */
+ if (status == FT_OK)
+ {
+ uint8_t buf[3] = { 0x86, 0x00, 0x00 };
+ if (usbconn_ftd2xx_write (conn, buf, 3, 0) < 0)
+ status = FT_OTHER_ERROR;
+ }
+ /* switch off loopback */
+ if (status == FT_OK)
+ {
+ uint8_t buf[1] = { 0x85 };
+ if (usbconn_ftd2xx_write (conn, buf, 1, 0) < 0)
+ status = FT_OTHER_ERROR;
+ }
+ if (status == FT_OK)
+ if (usbconn_ftd2xx_read (conn, NULL, 0) < 0)
+ status = FT_OTHER_ERROR;
+
+ if (status == FT_OK)
+ if ((status = FT_ResetDevice (fc)) != FT_OK)
+ urj_error_set (URJ_ERROR_FTD, _("Can't reset device: %s"),
+ ftd2xx_status_string(status));
+ if (status == FT_OK)
+ if ((status = FT_Purge (fc, FT_PURGE_RX)) != FT_OK)
+ urj_error_set (URJ_ERROR_FTD, _("Can't purge RX buffer: %s"),
+ ftd2xx_status_string(status));
+
+ if (status != FT_OK)
+ {
+ FT_Close (fc);
+ /* mark ftdi layer as not initialized */
+ p->fc = NULL;
+ }
+
+ return status != FT_OK ? URJ_STATUS_FAIL : URJ_STATUS_OK;
+}
+
+/* ---------------------------------------------------------------------- */
+
+static int
+usbconn_ftd2xx_close (urj_usbconn_t *conn)
+{
+ ftd2xx_param_t *p = conn->params;
+
+ if (p->fc)
+ {
+ FT_Close (p->fc);
+ p->fc = NULL;
+ }
+
+ return URJ_STATUS_OK;
+}
+
+/* ---------------------------------------------------------------------- */
+
+static void
+usbconn_ftd2xx_free (urj_usbconn_t *conn)
+{
+ ftd2xx_param_t *p = conn->params;
+
+ if (p->send_buf)
+ free (p->send_buf);
+ if (p->recv_buf)
+ free (p->recv_buf);
+ if (p->serial)
+ free (p->serial);
+
+ free (conn->params);
+ free (conn);
+}
+
+/* ---------------------------------------------------------------------- */
+
+urj_usbconn_driver_t urj_tap_usbconn_ftd2xx_driver = {
+ "ftd2xx",
+ usbconn_ftd2xx_connect,
+ usbconn_ftd2xx_free,
+ usbconn_ftd2xx_open,
+ usbconn_ftd2xx_close,
+ usbconn_ftd2xx_read,
+ usbconn_ftd2xx_write
+};
+
+urj_usbconn_driver_t urj_tap_usbconn_ftd2xx_mpsse_driver = {
+ "ftd2xx-mpsse",
+ usbconn_ftd2xx_mpsse_connect,
+ usbconn_ftd2xx_free,
+ usbconn_ftd2xx_mpsse_open,
+ usbconn_ftd2xx_close,
+ usbconn_ftd2xx_read,
+ usbconn_ftd2xx_write
+};
+
+
+/*
+ Local Variables:
+ mode:C
+ c-default-style:gnu
+ indent-tabs-mode:nil
+ End:
+*/
--- /dev/null
+/*
+ * $Id$
+ *
+ * Link driver for accessing FTDI devices via libftdi
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Arnim Laeuger, 2008
+ *
+ */
+
+#include <sysdep.h>
+
+#include <fcntl.h>
+#if __CYGWIN__ || __MINGW32__
+#include <windows.h>
+#endif
+#include <stdio.h>
+#include <string.h>
+#ifdef HAVE_STROPTS_H
+#include <stropts.h>
+#endif
+#include <stdlib.h>
+#include <stdint.h>
+#include <unistd.h>
+
+#include <ftdi.h>
+
+#include <urjtag/error.h>
+#include <urjtag/log.h>
+#include <urjtag/usbconn.h>
+#include "libftdx.h"
+
+typedef struct
+{
+ /* USB device information */
+ unsigned int vid;
+ unsigned int pid;
+ struct ftdi_context *fc;
+ char *serial;
+ /* send and receive buffer handling */
+ uint32_t send_buf_len;
+ uint32_t send_buffered;
+ uint8_t *send_buf;
+ uint32_t recv_buf_len;
+ uint32_t to_recv;
+ uint32_t recv_write_idx;
+ uint32_t recv_read_idx;
+ uint8_t *recv_buf;
+} ftdi_param_t;
+
+urj_usbconn_driver_t urj_tap_usbconn_ftdi_driver;
+urj_usbconn_driver_t urj_tap_usbconn_ftdi_mpsse_driver;
+
+static int usbconn_ftdi_common_open (urj_usbconn_t *conn, urj_log_level_t ll);
+static void usbconn_ftdi_free (urj_usbconn_t *conn);
+
+/* ---------------------------------------------------------------------- */
+
+/** @return number of bytes flushed; -1 on error */
+static int
+usbconn_ftdi_flush (ftdi_param_t *p)
+{
+ int xferred;
+ int recvd = 0;
+
+ if (!p->fc)
+ return -1;
+
+ if (p->send_buffered == 0)
+ return 0;
+
+ if ((xferred = ftdi_write_data (p->fc, p->send_buf, p->send_buffered)) < 0)
+ urj_error_set (URJ_ERROR_FTD, _("ftdi_write_data() failed: %s"),
+ ftdi_get_error_string (p->fc));
+
+ if (xferred < p->send_buffered)
+ {
+ urj_error_set (URJ_ERROR_ILLEGAL_STATE,
+ _("Written fewer bytes than requested"));
+ return -1;
+ }
+
+ p->send_buffered = 0;
+
+ /* now read all scheduled receive bytes */
+ if (p->to_recv)
+ {
+ if (p->recv_write_idx + p->to_recv > p->recv_buf_len)
+ {
+ /* extend receive buffer */
+ p->recv_buf_len = p->recv_write_idx + p->to_recv;
+ if (p->recv_buf)
+ p->recv_buf = realloc (p->recv_buf, p->recv_buf_len);
+ }
+
+ if (!p->recv_buf)
+ {
+ urj_error_set (URJ_ERROR_ILLEGAL_STATE,
+ _("Receive buffer does not exist"));
+ return -1;
+ }
+
+ while (recvd == 0)
+ if ((recvd = ftdi_read_data (p->fc,
+ &(p->recv_buf[p->recv_write_idx]),
+ p->to_recv)) < 0)
+ urj_error_set (URJ_ERROR_FTD,
+ _("Error from ftdi_read_data(): %s"),
+ ftdi_get_error_string (p->fc));
+
+ if (recvd < p->to_recv)
+ urj_log (URJ_LOG_LEVEL_NORMAL,
+ _("%s(): Received fewer bytes than requested.\n"),
+ __func__);
+
+ p->to_recv -= recvd;
+ p->recv_write_idx += recvd;
+ }
+
+ return xferred < 0 ? -1 : xferred;
+}
+
+/* ---------------------------------------------------------------------- */
+
+/** @return number of bytes read; -1 on error */
+static int
+usbconn_ftdi_read (urj_usbconn_t *conn, uint8_t *buf, int len)
+{
+ ftdi_param_t *p = conn->params;
+ int cpy_len;
+ int recvd = 0;
+
+ if (!p->fc)
+ return -1;
+
+ /* flush send buffer to get all scheduled receive bytes */
+ if (usbconn_ftdi_flush (p) < 0)
+ return -1;
+
+ if (len == 0)
+ return 0;
+
+ /* check for number of remaining bytes in receive buffer */
+ cpy_len = p->recv_write_idx - p->recv_read_idx;
+ if (cpy_len > len)
+ cpy_len = len;
+ len -= cpy_len;
+
+ if (cpy_len > 0)
+ {
+ /* get data from the receive buffer */
+ memcpy (buf, &(p->recv_buf[p->recv_read_idx]), cpy_len);
+ p->recv_read_idx += cpy_len;
+ if (p->recv_read_idx == p->recv_write_idx)
+ p->recv_read_idx = p->recv_write_idx = 0;
+ }
+
+ if (len > 0)
+ {
+ /* need to get more data directly from the device */
+ while (recvd == 0)
+ if ((recvd = ftdi_read_data (p->fc, &(buf[cpy_len]), len)) < 0)
+ urj_error_set (URJ_ERROR_FTD,
+ _("Error from ftdi_read_data(): %s"),
+ ftdi_get_error_string (p->fc));
+ }
+
+ return recvd < 0 ? -1 : cpy_len + len;
+}
+
+/* ---------------------------------------------------------------------- */
+
+/** @return number of bytes written; -1 on error */
+static int
+usbconn_ftdi_write (urj_usbconn_t *conn, uint8_t *buf, int len, int recv)
+{
+ ftdi_param_t *p = conn->params;
+ int xferred = 0;
+
+ if (!p->fc)
+ return -1;
+
+ /* this write function will try to buffer write data
+ buffering will be ceased and a flush triggered in two cases. */
+
+ /* Case A: max number of scheduled receive bytes will be exceeded
+ with this write
+ Case B: max number of scheduled send bytes has been reached */
+ if ((p->to_recv + recv > URJ_USBCONN_FTDI_MAXRECV)
+ || ((p->send_buffered > URJ_USBCONN_FTDX_MAXSEND)
+ && (p->to_recv == 0)))
+ xferred = usbconn_ftdi_flush (p);
+
+ if (xferred < 0)
+ return -1;
+
+ /* now buffer this write */
+ if (p->send_buffered + len > p->send_buf_len)
+ {
+ p->send_buf_len = p->send_buffered + len;
+ if (p->send_buf)
+ p->send_buf = realloc (p->send_buf, p->send_buf_len);
+ }
+
+ if (p->send_buf)
+ {
+ memcpy (&(p->send_buf[p->send_buffered]), buf, len);
+ p->send_buffered += len;
+ if (recv > 0)
+ p->to_recv += recv;
+
+ if (recv < 0)
+ {
+ /* immediate write requested, so flush the buffered data */
+ xferred = usbconn_ftdi_flush (p);
+ }
+
+ return xferred < 0 ? -1 : len;
+ }
+ else
+ {
+ urj_error_set (URJ_ERROR_ILLEGAL_STATE,
+ _("Send buffer does not exist"));
+ return -1;
+ }
+}
+
+/* ---------------------------------------------------------------------- */
+
+static urj_usbconn_t *
+usbconn_ftdi_connect (urj_usbconn_cable_t *template,
+ const urj_param_t *params[])
+{
+ urj_usbconn_t *c = malloc (sizeof (urj_usbconn_t));
+ ftdi_param_t *p = malloc (sizeof (ftdi_param_t));
+ struct ftdi_context *fc = malloc (sizeof (struct ftdi_context));
+
+ if (p)
+ {
+ p->send_buf_len = URJ_USBCONN_FTDX_MAXSEND;
+ p->send_buffered = 0;
+ p->send_buf = malloc (p->send_buf_len);
+ p->recv_buf_len = URJ_USBCONN_FTDI_MAXRECV;
+ p->to_recv = 0;
+ p->recv_write_idx = 0;
+ p->recv_read_idx = 0;
+ p->recv_buf = malloc (p->recv_buf_len);
+ }
+
+ if (!p || !c || !fc || !p->send_buf || !p->recv_buf)
+ {
+ if (p->send_buf)
+ free (p->send_buf);
+ if (p->recv_buf)
+ free (p->recv_buf);
+ if (p)
+ free (p);
+ if (c)
+ free (c);
+ if (fc)
+ free (fc);
+ urj_error_set (URJ_ERROR_OUT_OF_MEMORY,
+ "malloc(%zd)/malloc(%zd)/malloc(%zd)/malloc(%s)/malloc(%s) failed",
+ sizeof (urj_usbconn_t), sizeof (ftdi_param_t),
+ sizeof (struct ftdi_context),
+ "p->send_buf_len", "p->recv_buf_len");
+ return NULL;
+ }
+
+ ftdi_init (fc);
+ p->fc = fc;
+ p->pid = template->pid;
+ p->vid = template->vid;
+ /* @@@@ RFHH check strdup result */
+ p->serial = template->desc ? strdup (template->desc) : NULL;
+
+ c->params = p;
+ c->driver = &urj_tap_usbconn_ftdi_driver;
+ c->cable = NULL;
+
+ /* do a test open with the specified cable paramters,
+ alternatively we could use libusb to detect the presence of the
+ specified USB device */
+ if (usbconn_ftdi_common_open (c, URJ_LOG_LEVEL_DETAIL) != URJ_STATUS_OK)
+ {
+ usbconn_ftdi_free (c);
+ return NULL;
+ }
+ ftdi_usb_close (fc);
+
+ urj_log (URJ_LOG_LEVEL_NORMAL, _("Connected to libftdi driver.\n"));
+
+ return c;
+}
+
+
+static urj_usbconn_t *
+usbconn_ftdi_mpsse_connect (urj_usbconn_cable_t *template,
+ const urj_param_t *params[])
+{
+ urj_usbconn_t *conn = usbconn_ftdi_connect (template, params);
+
+ if (conn)
+ conn->driver = &urj_tap_usbconn_ftdi_mpsse_driver;
+
+ return conn;
+}
+
+
+/* ---------------------------------------------------------------------- */
+
+static int
+usbconn_ftdi_common_open (urj_usbconn_t *conn, urj_log_level_t ll)
+{
+ ftdi_param_t *p = conn->params;
+ struct ftdi_context *fc = p->fc;
+ int status;
+
+ /* use command line string for desc= as serial number and try to
+ open a matching device */
+ status = ftdi_usb_open_desc (fc, p->vid, p->pid, NULL, p->serial);
+ if (status < 0)
+ /* try again with matching the string against the description */
+ status = ftdi_usb_open_desc (fc, p->vid, p->pid, p->serial, NULL);
+
+ if (status < 0)
+ {
+ /* device not found == -3 */
+ if (status != -3)
+ urj_log (ll, _("%s(): ftdi_usb_open_desc() failed: %s"),
+ __func__, ftdi_get_error_string (fc));
+ urj_error_set (URJ_ERROR_FTD, _("ftdi_usb_open_desc() failed: %s"),
+ ftdi_get_error_string (fc));
+ ftdi_deinit (fc);
+ /* mark ftdi layer as not initialized */
+ p->fc = NULL;
+
+ /* TODO: disconnect? */
+ return URJ_STATUS_FAIL;
+ }
+
+ return URJ_STATUS_OK;
+}
+
+/* ---------------------------------------------------------------------- */
+
+#undef LIBFTDI_UNIMPLEMENTED
+
+static int
+seq_purge (struct ftdi_context *fc, int purge_rx, int purge_tx)
+{
+ int r;
+ unsigned char buf;
+
+#ifndef LIBFTDI_UNIMPLEMENTED
+ if ((r = ftdi_usb_purge_buffers (fc)) < 0)
+ urj_error_set (URJ_ERROR_FTD, _("ftdi_usb_purge_buffers() failed: %s"),
+ ftdi_get_error_string (fc));
+ if (r >= 0)
+ if ((r = ftdi_read_data (fc, &buf, 1)) < 0)
+ urj_error_set (URJ_ERROR_FTD, _("ftdi_read_data() failed: %s"),
+ ftdi_get_error_string (fc));
+#else /* not yet available */
+ {
+ int rx_loop;
+
+ if (purge_rx)
+ for (rx_loop = 0; (rx_loop < 6) && (r >= 0); rx_loop++)
+ if ((r = ftdi_usb_purge_rx_buffer (fc)) < 0)
+ urj_error_set (URJ_ERROR_FTD,
+ _("ftdi_usb_purge_rx_buffer() failed: %s"),
+ ftdi_get_error_string (fc));
+
+ if (purge_tx)
+ if (r >= 0)
+ if ((r = ftdi_usb_purge_tx_buffer (fc)) < 0)
+ urj_error_set (URJ_ERROR_FTD,
+ _("ftdi_usb_purge_tx_buffer() failed: %s"),
+ ftdi_get_error_string (fc));
+ if (r >= 0)
+ if ((r = ftdi_read_data (fc, &buf, 1)) < 0)
+ urj_error_set (URJ_ERROR_FTD, _("ftdi_read_data() failed: %s"),
+ ftdi_get_error_string (fc));
+ }
+#endif
+
+ return r < 0 ? URJ_STATUS_FAIL : URJ_STATUS_OK;
+}
+
+static int
+seq_reset (struct ftdi_context *fc)
+{
+ int r;
+
+#ifdef LIBFTDI_UNIMPLEMENTED /* not yet available */
+ {
+ unsigned short status;
+ if ((r = ftdi_poll_status (fc, &status)) < 0)
+ urj_error_set (URJ_ERROR_FTD, _("ftdi_poll_status() failed: %s"),
+ ftdi_get_error_string (fc));
+ }
+#endif
+ if ((r = ftdi_usb_reset (fc)) < 0)
+ urj_error_set (URJ_ERROR_FTD, _("ftdi_usb_reset() failed: %s"),
+ ftdi_get_error_string (fc));
+
+ if (r >= 0)
+ r = seq_purge (fc, 1, 1);
+ return r < 0 ? URJ_STATUS_FAIL : URJ_STATUS_OK;
+}
+
+/* ---------------------------------------------------------------------- */
+
+static int
+usbconn_ftdi_open (urj_usbconn_t *conn)
+{
+ ftdi_param_t *p = conn->params;
+ struct ftdi_context *fc = p->fc;
+ int r;
+
+ if (usbconn_ftdi_common_open (conn, URJ_LOG_LEVEL_NORMAL) != URJ_STATUS_OK)
+ return URJ_STATUS_FAIL;
+
+ r = seq_reset (fc);
+ if (r >= 0)
+ r = seq_purge (fc, 1, 0);
+
+ if (r >= 0)
+ if ((r = ftdi_set_latency_timer (fc, 2)) < 0)
+ urj_error_set (URJ_ERROR_FTD, _("ftdi_set_latency_timer() failed: %s"),
+ ftdi_get_error_string (fc));
+
+#if 0
+ /* libftdi 0.6 doesn't allow high baudrates, so we send the control
+ message outselves */
+ if (r >= 0)
+ if (usb_control_msg
+ (fc->usb_dev, 0x40, 3, 1, 0, NULL, 0, fc->usb_write_timeout) != 0)
+ {
+ urj_error_set (URJ_ERROR_FTD, "Can't set max baud rate: %s"
+ ftdi_get_error_string (fc));
+ r = -1;
+ }
+#else
+ if (r >= 0)
+ if ((r = ftdi_set_baudrate (fc, 3E6)) < 0)
+ urj_error_set (URJ_ERROR_FTD, _("ftdi_set_baudrate() failed: %s"),
+ ftdi_get_error_string (fc));
+#endif
+
+ if (r < 0)
+ {
+ ftdi_usb_close (fc);
+ ftdi_deinit (fc);
+ /* mark ftdi layer as not initialized */
+ p->fc = NULL;
+ }
+
+ return r < 0 ? URJ_STATUS_FAIL : URJ_STATUS_OK;
+}
+
+/* ---------------------------------------------------------------------- */
+
+static int
+usbconn_ftdi_mpsse_open (urj_usbconn_t *conn)
+{
+ ftdi_param_t *p = conn->params;
+ struct ftdi_context *fc = p->fc;
+ int r;
+
+ if (usbconn_ftdi_common_open (conn, URJ_LOG_LEVEL_NORMAL) != URJ_STATUS_OK)
+ return URJ_STATUS_FAIL;
+
+ /* This sequence might seem weird and containing superfluous stuff.
+ However, it's built after the description of JTAG_InitDevice
+ Ref. FTCJTAGPG10.pdf
+ Intermittent problems will occur when certain steps are skipped. */
+ r = seq_reset (fc);
+ if (r >= 0)
+ r = seq_purge (fc, 1, 0);
+
+ if (r >= 0)
+ if ((r =
+ ftdi_write_data_set_chunksize (fc,
+ URJ_USBCONN_FTDX_MAXSEND_MPSSE)) <
+ 0)
+ urj_log (URJ_LOG_LEVEL_NORMAL, "%s", ftdi_get_error_string (fc));
+ if (r >= 0)
+ if ((r =
+ ftdi_read_data_set_chunksize (fc,
+ URJ_USBCONN_FTDX_MAXSEND_MPSSE)) <
+ 0)
+ urj_log (URJ_LOG_LEVEL_NORMAL, "%s", ftdi_get_error_string (fc));
+
+#ifdef LIBFTDI_UNIMPLEMENTED
+ if (r >= 0)
+ if ((r = ftdi_set_event_char (fc, 0, 0)) < 0)
+ urj_log (URJ_LOG_LEVEL_NORMAL, "%s", ftdi_get_error_string (fc));
+ if (r >= 0)
+ if ((r = ftdi_set_error_char (fc, 0, 0)) < 0)
+ urj_log (URJ_LOG_LEVEL_NORMAL, "%s", ftdi_get_error_string (fc));
+#endif
+
+ /* set a reasonable latency timer value
+ if this value is too low then the chip will send intermediate result data
+ in short packets (suboptimal performance) */
+ if (r >= 0)
+ if ((r = ftdi_set_latency_timer (fc, 16)) < 0)
+ urj_error_set (URJ_ERROR_FTD,
+ _("ftdi_set_latency_timer() failed: %s"),
+ ftdi_get_error_string (fc));
+
+ if (r >= 0)
+ if ((r = ftdi_set_bitmode (fc, 0x0b, BITMODE_MPSSE)) < 0)
+ urj_error_set (URJ_ERROR_FTD, _("ftdi_set_bitmode() failed: %s"),
+ ftdi_get_error_string (fc));
+
+ if (r >= 0)
+ if ((r = ftdi_usb_reset (fc)) < 0)
+ urj_error_set (URJ_ERROR_FTD, _("ftdi_usb_reset() failed: %s"),
+ ftdi_get_error_string (fc));
+ if (r >= 0)
+ r = seq_purge (fc, 1, 0);
+
+ /* set TCK Divisor */
+ if (r >= 0)
+ {
+ uint8_t buf[3] = { TCK_DIVISOR, 0x00, 0x00 };
+ r = usbconn_ftdi_write (conn, buf, 3, 0);
+ }
+ /* switch off loopback */
+ if (r >= 0)
+ {
+ uint8_t buf[1] = { LOOPBACK_END };
+ r = usbconn_ftdi_write (conn, buf, 1, 0);
+ }
+ if (r >= 0)
+ r = usbconn_ftdi_read (conn, NULL, 0);
+
+ if (r >= 0)
+ if ((r = ftdi_usb_reset (fc)) < 0)
+ urj_error_set (URJ_ERROR_FTD, _("ftdi_usb_reset() failed: %s"),
+ ftdi_get_error_string (fc));
+ if (r >= 0)
+ r = seq_purge (fc, 1, 0);
+
+ if (r < 0)
+ {
+ ftdi_usb_close (fc);
+ ftdi_deinit (fc);
+ /* mark ftdi layer as not initialized */
+ p->fc = NULL;
+ }
+
+ return r < 0 ? URJ_STATUS_FAIL : URJ_STATUS_OK;
+}
+
+/* ---------------------------------------------------------------------- */
+
+static int
+usbconn_ftdi_close (urj_usbconn_t *conn)
+{
+ ftdi_param_t *p = conn->params;
+
+ if (p->fc)
+ {
+ ftdi_usb_close (p->fc);
+ ftdi_deinit (p->fc);
+ p->fc = NULL;
+ }
+
+ return URJ_STATUS_OK;
+}
+
+/* ---------------------------------------------------------------------- */
+
+static void
+usbconn_ftdi_free (urj_usbconn_t *conn)
+{
+ ftdi_param_t *p = conn->params;
+
+ if (p->send_buf)
+ free (p->send_buf);
+ if (p->recv_buf)
+ free (p->recv_buf);
+ if (p->fc)
+ free (p->fc);
+ if (p->serial)
+ free (p->serial);
+
+ free (conn->params);
+ free (conn);
+}
+
+/* ---------------------------------------------------------------------- */
+
+urj_usbconn_driver_t urj_tap_usbconn_ftdi_driver = {
+ "ftdi",
+ usbconn_ftdi_connect,
+ usbconn_ftdi_free,
+ usbconn_ftdi_open,
+ usbconn_ftdi_close,
+ usbconn_ftdi_read,
+ usbconn_ftdi_write
+};
+
+urj_usbconn_driver_t urj_tap_usbconn_ftdi_mpsse_driver = {
+ "ftdi-mpsse",
+ usbconn_ftdi_mpsse_connect,
+ usbconn_ftdi_free,
+ usbconn_ftdi_mpsse_open,
+ usbconn_ftdi_close,
+ usbconn_ftdi_read,
+ usbconn_ftdi_write
+};
+
+
+/*
+ Local Variables:
+ mode:C
+ c-default-style:gnu
+ indent-tabs-mode:nil
+ End:
+*/
--- /dev/null
+/*
+ * $Id: libftdx.h 1594 2009-05-13 23:36:04Z rfhh $
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by A. Laeuger, 2008
+ *
+ */
+
+#ifndef URJ_USBCONN_LIBFTDX_H
+#define URJ_USBCONN_LIBFTDX_H 1
+
+#define URJ_USBCONN_FTDX_MAXSEND 4096
+#define URJ_USBCONN_FTDX_MAXSEND_MPSSE (64 * 1024)
+
+/* Maximum chunk to receive from ftdi/ftd2xx driver.
+ Larger values might speed up comm, but there's an upper limit
+ when too many bytes are sent and the underlying libftdi or libftd2xx
+ don't fetch the returned data in time -> deadlock */
+#define URJ_USBCONN_FTDI_MAXRECV ( 4 * 64)
+#define URJ_USBCONN_FTD2XX_MAXRECV (63 * 64)
+#define URJ_USBCONN_FTDX_MAXRECV (URJ_USBCONN_FTD2XX_MAXRECV < URJ_USBCONN_FTDI_MAXRECV ? URJ_USBCONN_FTD2XX_MAXRECV : URJ_USBCONN_FTDI_MAXRECV)
+
+#endif
--- /dev/null
+/*
+ * $Id$
+ *
+ * Link driver for accessing USB devices via libusb
+ *
+ * Copyright (C) 2008 K. Waschk
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Kolja Waschk, 2008
+ *
+ */
+
+#include <sysdep.h>
+
+#ifdef HAVE_LIBUSB
+
+#include <fcntl.h>
+#if __CYGWIN__ || __MINGW32__
+#include <windows.h>
+#endif
+#include <stdio.h>
+#include <string.h>
+#ifdef HAVE_STROPTS_H
+#include <stropts.h>
+#endif
+#include <stdlib.h>
+#include <stdint.h>
+#include <unistd.h>
+#include <errno.h>
+#include <usb.h>
+
+#include <urjtag/error.h>
+#include <urjtag/log.h>
+#include <urjtag/usbconn.h>
+
+typedef struct
+{
+ struct usb_device *dev;
+ struct usb_dev_handle *handle;
+} urj_usbconn_libusb_param_t;
+
+urj_usbconn_driver_t urj_tap_usbconn_libusb_driver;
+
+/* ---------------------------------------------------------------------- */
+
+static int
+libusb_match_desc (struct usb_device *dev, const char *desc)
+{
+ int r = 0;
+ char buf[256];
+ usb_dev_handle *handle;
+
+ if (desc == NULL)
+ return 1;
+
+ handle = usb_open (dev);
+ if (handle == NULL)
+ {
+ urj_error_set (URJ_ERROR_USB, "usb_open() failed: %s", usb_strerror());
+ errno = 0;
+ return 0;
+ }
+ if (dev->descriptor.iManufacturer)
+ {
+ r = usb_get_string_simple (handle, dev->descriptor.iManufacturer, buf,
+ sizeof (buf));
+ if (r > 0)
+ {
+ if (strstr (buf, desc) == NULL)
+ r = 0;
+ }
+ }
+ if (r <= 0 && dev->descriptor.iProduct)
+ {
+ r = usb_get_string_simple (handle, dev->descriptor.iProduct, buf,
+ sizeof (buf));
+ if (r > 0)
+ {
+ if (strstr (buf, desc) == NULL)
+ r = 0;
+ }
+ }
+ if (r <= 0 && dev->descriptor.iSerialNumber)
+ {
+ r = usb_get_string_simple (handle, dev->descriptor.iSerialNumber, buf,
+ sizeof (buf));
+ if (r > 0)
+ {
+ if (strstr (buf, desc) == NULL)
+ r = 0;
+ }
+ }
+ usb_close (handle);
+ return r > 0 ? 1 : 0;
+}
+
+
+/* ---------------------------------------------------------------------- */
+
+static urj_usbconn_t *
+usbconn_libusb_connect (urj_usbconn_cable_t *template,
+ const urj_param_t *params[])
+{
+ struct usb_bus *bus;
+ struct usb_device *found_dev = NULL;
+ urj_usbconn_t *libusb_conn;
+ urj_usbconn_libusb_param_t *libusb_params;
+
+ usb_init ();
+ if (usb_find_busses () < 0)
+ {
+ urj_error_set (URJ_ERROR_USB, "usb_find_busses() failed: %s",
+ usb_strerror());
+ errno = 0;
+ return NULL;
+ }
+ if (usb_find_devices () < 0)
+ {
+ urj_error_set (URJ_ERROR_USB, "usb_find_devices() failed: %s",
+ usb_strerror());
+ errno = 0;
+ return NULL;
+ }
+
+ for (bus = usb_get_busses (); bus && !found_dev; bus = bus->next)
+ {
+ struct usb_device *dev;
+
+ for (dev = bus->devices; dev && !found_dev; dev = dev->next)
+ {
+ if (((template->vid < 0)
+ || (dev->descriptor.idVendor == template->vid))
+ && ((template->pid < 0)
+ || (dev->descriptor.idProduct == template->pid)))
+ {
+ if (libusb_match_desc (dev, template->desc))
+ {
+ found_dev = dev;
+ }
+ }
+ }
+ }
+
+ if (!found_dev)
+ {
+ urj_error_set (URJ_ERROR_NOTFOUND, "no USB connections");
+ return NULL;
+ }
+
+ libusb_conn = malloc (sizeof (urj_usbconn_t));
+ libusb_params = malloc (sizeof (urj_usbconn_libusb_param_t));
+ if (libusb_params == NULL || libusb_conn == NULL)
+ {
+ urj_error_set (URJ_ERROR_OUT_OF_MEMORY,
+ _("malloc(%zd)/malloc(%zd) fails"),
+ sizeof (urj_usbconn_t),
+ sizeof (urj_usbconn_libusb_param_t));
+ if (libusb_params)
+ free (libusb_params);
+ if (libusb_conn)
+ free (libusb_conn);
+ return NULL;
+ }
+
+ libusb_params->dev = found_dev;
+ libusb_params->handle = NULL;
+ libusb_conn->params = libusb_params;
+ libusb_conn->driver = &urj_tap_usbconn_libusb_driver;
+ libusb_conn->cable = NULL;
+
+ return libusb_conn;
+}
+
+
+/* ---------------------------------------------------------------------- */
+
+static int
+usbconn_libusb_open (urj_usbconn_t *conn)
+{
+ urj_usbconn_libusb_param_t *p = conn->params;
+
+ p->handle = usb_open (p->dev);
+ if (p->handle == NULL)
+ {
+ urj_error_set (URJ_ERROR_USB, "usb_open() failed: %s", usb_strerror());
+ errno = 0;
+ }
+ else
+ {
+#if 1
+ usb_set_configuration (p->handle,
+ p->dev->config[0].bConfigurationValue);
+#endif
+ if (usb_claim_interface (p->handle, 0) != 0)
+ {
+ usb_close (p->handle);
+ urj_error_set (URJ_ERROR_USB, "usb_claim_interface failed: %s",
+ usb_strerror());
+ errno = 0;
+ p->handle = NULL;
+ }
+#if 1
+ else
+ {
+ usb_set_altinterface (p->handle, 0);
+ }
+#endif
+ }
+
+ if (p->handle == NULL)
+ {
+ /* TODO: disconnect? */
+ return URJ_STATUS_FAIL;
+ }
+
+ return URJ_STATUS_OK;
+}
+
+/* ---------------------------------------------------------------------- */
+
+static int
+usbconn_libusb_close (urj_usbconn_t *conn)
+{
+ urj_usbconn_libusb_param_t *p = conn->params;
+ if (p->handle != NULL)
+ {
+ usb_release_interface (p->handle, 0);
+ usb_close (p->handle);
+ }
+ p->handle = NULL;
+ return URJ_STATUS_OK;
+}
+
+/* ---------------------------------------------------------------------- */
+
+static void
+usbconn_libusb_free (urj_usbconn_t *conn)
+{
+ free (conn->params);
+ free (conn);
+}
+
+/* ---------------------------------------------------------------------- */
+
+urj_usbconn_driver_t urj_tap_usbconn_libusb_driver = {
+ "libusb",
+ usbconn_libusb_connect,
+ usbconn_libusb_free,
+ usbconn_libusb_open,
+ usbconn_libusb_close,
+ NULL,
+ NULL
+};
+
+#endif /* HAVE_LIBUSB */
--- /dev/null
+/*
+ * $Id: libusb.h 1606 2009-05-19 15:06:20Z rfhh $
+ *
+ * Link driver for accessing USB devices via libusb
+ *
+ * Copyright (C) 2008 K. Waschk
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Kolja Waschk, 2008
+ *
+ */
+
+#ifndef URJ_USBCONN_LIBUSB_H
+#define URJ_USBCONN_LIBUSB_H 1
+
+#include <usb.h>
+
+typedef struct
+{
+ struct usb_device *dev;
+ struct usb_dev_handle *handle;
+ void *data;
+} urj_usbconn_libusb_param_t;
+
+#endif
--- /dev/null
+/*
+ * $Id$
+ *
+ * Copyright (C) 2003 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ * 02111-1307, USA.
+ *
+ * Written by Marcel Telka <marcel@telka.sk>, 2003.
+ *
+ */
+
+#ifndef SYSDEP_H
+#define SYSDEP_H
+
+#ifdef HAVE_CONFIG_H
+#include "config.h"
+#endif
+
+#include <urjtag/gettext.h>
+#define _(s) gettext(s)
+#define N_(s) gettext_noop(s)
+#define P_(s,p,n) ngettext(s,p,n)
+
+#ifdef S_SPLINT_S
+#undef gettext
+#define gettext(s) s
+#undef gettext_noop
+#define gettext_noop(s) s
+#undef ngettext
+#define ngettext(s,p,n) s
+#endif
+
+#ifdef __MINGW32__
+#define _NO_W32_PSEUDO_MODIFIERS
+#include <windows.h>
+#define geteuid() 0
+#define getuid() 0
+/* Microsoft uses a different swprintf() than ISO C requires */
+#include <stdio.h>
+#define swprintf _snwprintf
+#endif
+
+#ifndef HAVE_USLEEP
+int usleep (long unsigned usec);
+#endif
+
+#endif /* SYSDEP_H */
--- /dev/null
+config.rpath
+mkinstalldirs
--- /dev/null
+#include <urjtag.h>
--- /dev/null
+# Doxyfile 1.5.2
+
+#---------------------------------------------------------------------------
+# Project related configuration options
+#---------------------------------------------------------------------------
+DOXYFILE_ENCODING = UTF-8
+PROJECT_NAME = urjtag
+PROJECT_NUMBER = svn1258
+OUTPUT_DIRECTORY = htdocs/doxygen
+CREATE_SUBDIRS = NO
+OUTPUT_LANGUAGE = English
+BRIEF_MEMBER_DESC = YES
+REPEAT_BRIEF = YES
+ABBREVIATE_BRIEF = "The $name class" \
+ "The $name widget" \
+ "The $name file" \
+ is \
+ provides \
+ specifies \
+ contains \
+ represents \
+ a \
+ an \
+ the
+ALWAYS_DETAILED_SEC = NO
+INLINE_INHERITED_MEMB = NO
+FULL_PATH_NAMES = YES
+STRIP_FROM_PATH = trunk/jtag
+STRIP_FROM_INC_PATH =
+SHORT_NAMES = NO
+JAVADOC_AUTOBRIEF = NO
+MULTILINE_CPP_IS_BRIEF = NO
+DETAILS_AT_TOP = NO
+INHERIT_DOCS = YES
+SEPARATE_MEMBER_PAGES = NO
+TAB_SIZE = 8
+ALIASES =
+OPTIMIZE_OUTPUT_FOR_C = YES
+OPTIMIZE_OUTPUT_JAVA = NO
+BUILTIN_STL_SUPPORT = NO
+CPP_CLI_SUPPORT = NO
+DISTRIBUTE_GROUP_DOC = NO
+SUBGROUPING = YES
+#---------------------------------------------------------------------------
+# Build related configuration options
+#---------------------------------------------------------------------------
+EXTRACT_ALL = YES
+EXTRACT_PRIVATE = YES
+EXTRACT_STATIC = YES
+EXTRACT_LOCAL_CLASSES = YES
+EXTRACT_LOCAL_METHODS = YES
+HIDE_UNDOC_MEMBERS = NO
+HIDE_UNDOC_CLASSES = NO
+HIDE_FRIEND_COMPOUNDS = NO
+HIDE_IN_BODY_DOCS = NO
+INTERNAL_DOCS = NO
+CASE_SENSE_NAMES = YES
+HIDE_SCOPE_NAMES = NO
+SHOW_INCLUDE_FILES = YES
+INLINE_INFO = YES
+SORT_MEMBER_DOCS = YES
+SORT_BRIEF_DOCS = NO
+SORT_BY_SCOPE_NAME = NO
+GENERATE_TODOLIST = YES
+GENERATE_TESTLIST = YES
+GENERATE_BUGLIST = YES
+GENERATE_DEPRECATEDLIST= YES
+ENABLED_SECTIONS =
+MAX_INITIALIZER_LINES = 30
+SHOW_USED_FILES = YES
+SHOW_DIRECTORIES = NO
+FILE_VERSION_FILTER =
+#---------------------------------------------------------------------------
+# configuration options related to warning and progress messages
+#---------------------------------------------------------------------------
+QUIET = NO
+WARNINGS = YES
+WARN_IF_UNDOCUMENTED = YES
+WARN_IF_DOC_ERROR = YES
+WARN_NO_PARAMDOC = NO
+WARN_FORMAT = "$file:$line: $text"
+WARN_LOGFILE =
+#---------------------------------------------------------------------------
+# configuration options related to the input files
+#---------------------------------------------------------------------------
+INPUT = ./../jtag/src
+INPUT_ENCODING = UTF-8
+FILE_PATTERNS = *.c \
+ *.cc \
+ *.cxx \
+ *.cpp \
+ *.c++ \
+ *.d \
+ *.java \
+ *.ii \
+ *.ixx \
+ *.ipp \
+ *.i++ \
+ *.inl \
+ *.h \
+ *.hh \
+ *.hxx \
+ *.hpp \
+ *.h++ \
+ *.idl \
+ *.odl \
+ *.cs \
+ *.php \
+ *.php3 \
+ *.inc \
+ *.m \
+ *.mm \
+ *.dox \
+ *.py \
+ *.C \
+ *.CC \
+ *.C++ \
+ *.II \
+ *.I++ \
+ *.H \
+ *.HH \
+ *.H++ \
+ *.CS \
+ *.PHP \
+ *.PHP3 \
+ *.M \
+ *.MM \
+ *.PY
+RECURSIVE = YES
+EXCLUDE =
+EXCLUDE_SYMLINKS = NO
+EXCLUDE_PATTERNS =
+EXCLUDE_SYMBOLS =
+EXAMPLE_PATH =
+EXAMPLE_PATTERNS = *
+EXAMPLE_RECURSIVE = NO
+IMAGE_PATH =
+INPUT_FILTER =
+FILTER_PATTERNS =
+FILTER_SOURCE_FILES = NO
+#---------------------------------------------------------------------------
+# configuration options related to source browsing
+#---------------------------------------------------------------------------
+SOURCE_BROWSER = YES
+INLINE_SOURCES = YES
+STRIP_CODE_COMMENTS = YES
+REFERENCED_BY_RELATION = YES
+REFERENCES_RELATION = YES
+REFERENCES_LINK_SOURCE = YES
+USE_HTAGS = NO
+VERBATIM_HEADERS = YES
+#---------------------------------------------------------------------------
+# configuration options related to the alphabetical class index
+#---------------------------------------------------------------------------
+ALPHABETICAL_INDEX = NO
+COLS_IN_ALPHA_INDEX = 5
+IGNORE_PREFIX =
+#---------------------------------------------------------------------------
+# configuration options related to the HTML output
+#---------------------------------------------------------------------------
+GENERATE_HTML = YES
+HTML_OUTPUT = html
+HTML_FILE_EXTENSION = .html
+HTML_HEADER =
+HTML_FOOTER =
+HTML_STYLESHEET =
+HTML_ALIGN_MEMBERS = YES
+GENERATE_HTMLHELP = NO
+CHM_FILE =
+HHC_LOCATION =
+GENERATE_CHI = NO
+BINARY_TOC = NO
+TOC_EXPAND = NO
+DISABLE_INDEX = NO
+ENUM_VALUES_PER_LINE = 4
+GENERATE_TREEVIEW = YES
+TREEVIEW_WIDTH = 250
+#---------------------------------------------------------------------------
+# configuration options related to the LaTeX output
+#---------------------------------------------------------------------------
+GENERATE_LATEX = YES
+LATEX_OUTPUT = latex
+LATEX_CMD_NAME = latex
+MAKEINDEX_CMD_NAME = makeindex
+COMPACT_LATEX = NO
+PAPER_TYPE = a4wide
+EXTRA_PACKAGES =
+LATEX_HEADER =
+PDF_HYPERLINKS = NO
+USE_PDFLATEX = YES
+LATEX_BATCHMODE = NO
+LATEX_HIDE_INDICES = NO
+#---------------------------------------------------------------------------
+# configuration options related to the RTF output
+#---------------------------------------------------------------------------
+GENERATE_RTF = NO
+RTF_OUTPUT = rtf
+COMPACT_RTF = NO
+RTF_HYPERLINKS = NO
+RTF_STYLESHEET_FILE =
+RTF_EXTENSIONS_FILE =
+#---------------------------------------------------------------------------
+# configuration options related to the man page output
+#---------------------------------------------------------------------------
+GENERATE_MAN = NO
+MAN_OUTPUT = man
+MAN_EXTENSION = .3
+MAN_LINKS = NO
+#---------------------------------------------------------------------------
+# configuration options related to the XML output
+#---------------------------------------------------------------------------
+GENERATE_XML = NO
+XML_OUTPUT = xml
+XML_SCHEMA =
+XML_DTD =
+XML_PROGRAMLISTING = YES
+#---------------------------------------------------------------------------
+# configuration options for the AutoGen Definitions output
+#---------------------------------------------------------------------------
+GENERATE_AUTOGEN_DEF = NO
+#---------------------------------------------------------------------------
+# configuration options related to the Perl module output
+#---------------------------------------------------------------------------
+GENERATE_PERLMOD = NO
+PERLMOD_LATEX = NO
+PERLMOD_PRETTY = YES
+PERLMOD_MAKEVAR_PREFIX =
+#---------------------------------------------------------------------------
+# Configuration options related to the preprocessor
+#---------------------------------------------------------------------------
+ENABLE_PREPROCESSING = YES
+MACRO_EXPANSION = NO
+EXPAND_ONLY_PREDEF = NO
+SEARCH_INCLUDES = YES
+INCLUDE_PATH =
+INCLUDE_FILE_PATTERNS =
+PREDEFINED =
+EXPAND_AS_DEFINED =
+SKIP_FUNCTION_MACROS = YES
+#---------------------------------------------------------------------------
+# Configuration::additions related to external references
+#---------------------------------------------------------------------------
+TAGFILES =
+GENERATE_TAGFILE = jtag.tags
+ALLEXTERNALS = NO
+EXTERNAL_GROUPS = YES
+PERL_PATH = /usr/bin/perl
+#---------------------------------------------------------------------------
+# Configuration options related to the dot tool
+#---------------------------------------------------------------------------
+CLASS_DIAGRAMS = YES
+MSCGEN_PATH =
+HIDE_UNDOC_RELATIONS = YES
+HAVE_DOT = YES
+CLASS_GRAPH = YES
+COLLABORATION_GRAPH = YES
+GROUP_GRAPHS = YES
+UML_LOOK = NO
+TEMPLATE_RELATIONS = YES
+INCLUDE_GRAPH = YES
+INCLUDED_BY_GRAPH = YES
+CALL_GRAPH = YES
+CALLER_GRAPH = YES
+GRAPHICAL_HIERARCHY = YES
+DIRECTORY_GRAPH = YES
+DOT_IMAGE_FORMAT = png
+DOT_PATH =
+DOTFILE_DIRS =
+DOT_GRAPH_MAX_NODES = 50
+DOT_TRANSPARENT = NO
+DOT_MULTI_TARGETS = NO
+GENERATE_LEGEND = YES
+DOT_CLEANUP = YES
+#---------------------------------------------------------------------------
+# Configuration::additions related to the search engine
+#---------------------------------------------------------------------------
+SEARCHENGINE = NO
--- /dev/null
+WEB=arniml,urjtag@web.sourceforge.net:/home/groups/u/ur/urjtag
+JTAG=../jtag
+BOOK=./htdocs/book
+
+RSYNC=rsync
+RSYNCOPTS=-av --rsh=ssh --exclude=.svn
+
+JWOPTS=-d UrJTAG.dsl\#html
+
+DIRS="cgi-bin" "htdocs"
+
+sync-to-sf: book
+ $(RSYNC) $(RSYNCOPTS) $(DIRS) "$(WEB)/"
+
+sync-from-sf:
+ $(RSYNC) $(RSYNCOPTS) "$(WEB)/*" .
+
+.PHONY: book
+# book: $(BOOK)/UrJTAG.html
+book: $(BOOK)/UrJTAG.dbk $(BOOK)/UrJTAG.html
+ docbook2html $(JWOPTS) -o $(BOOK) $(BOOK)/UrJTAG.dbk
+
+.PHONY: $(BOOK)/UrJTAG.html
+$(BOOK)/UrJTAG.html: $(BOOK)/UrJTAG.dbk
+ docbook2html $(JWOPTS) -o $(BOOK) -u $(BOOK)/UrJTAG.dbk
+
+$(BOOK)/UrJTAG.dbk: $(JTAG)/doc/*.txt
+ mkdir -p $(BOOK)
+ asciidoc -b docbook -d book -o $(BOOK)/UrJTAG.dbk $(JTAG)/doc/UrJTAG.txt
+
--- /dev/null
+<!-- This file defines the DocBook-utils Style Sheet for DocBook
+ Eric Bischoff <eric@caldera.de>
+-->
+
+<!DOCTYPE style-sheet PUBLIC "-//James Clark//DTD DSSSL Style Sheet//EN" [
+ <!ENTITY % html "IGNORE">
+ <![%html; [
+ <!ENTITY % print "IGNORE">
+ <!ENTITY docbook.dsl PUBLIC "-//Norman Walsh//DOCUMENT DocBook HTML Stylesheet//EN" CDATA dsssl>
+ ]]>
+ <!ENTITY % print "INCLUDE">
+ <![%print; [
+ <!ENTITY docbook.dsl PUBLIC "-//Norman Walsh//DOCUMENT DocBook Print Stylesheet//EN" CDATA dsssl>
+ ]]>
+]>
+
+<STYLE-SHEET>
+
+ <STYLE-SPECIFICATION ID="UTILS" USE="DOCBOOK">
+ <STYLE-SPECIFICATION-BODY>
+;; ===================================================================
+;; Generic Parameters
+;; (Generic currently means: both print and html)
+
+(define %chapter-autolabel% #t)
+(define %section-autolabel% #t)
+(define (toc-depth nd) 3)
+
+ </STYLE-SPECIFICATION-BODY>
+ </STYLE-SPECIFICATION>
+
+ <STYLE-SPECIFICATION ID="PRINT" USE="UTILS">
+ <STYLE-SPECIFICATION-BODY>
+;; ===================================================================
+;; Print Parameters
+;; Call: jade -d docbook-utils.dsl#print
+
+; === Page layout ===
+;; (define %paper-type% "A4") ;; use A4 paper - comment this out if needed
+
+; === Media objects ===
+(define preferred-mediaobject-extensions ;; this magic allows to use different graphical
+ (list "eps")) ;; formats for printing and putting online
+(define acceptable-mediaobject-extensions
+ '())
+(define preferred-mediaobject-notations
+ (list "EPS"))
+(define acceptable-mediaobject-notations
+ (list "linespecific"))
+
+; === Rendering ===
+(define %head-after-factor% 0.2) ;; not much whitespace after orderedlist head
+(define ($paragraph$) ;; more whitespace after paragraph than before
+ (make paragraph
+ first-line-start-indent: (if (is-first-para)
+ %para-indent-firstpara%
+ %para-indent%)
+ space-before: (* %para-sep% 4)
+ space-after: (/ %para-sep% 4)
+ quadding: %default-quadding%
+ hyphenate?: %hyphenation%
+ language: (dsssl-language-code)
+ (process-children)))
+
+ </STYLE-SPECIFICATION-BODY>
+ </STYLE-SPECIFICATION>
+
+ <STYLE-SPECIFICATION ID="HTML" USE="UTILS">
+ <STYLE-SPECIFICATION-BODY>
+;; ===================================================================
+;; HTML Parameters
+;; Call: jade -d docbook-utils.dsl#html
+
+; === File names ===
+(define %root-filename% "index") ;; name for the root html file
+(define %html-ext% ".html") ;; default extension for html output files
+(define %html-prefix% "") ;; prefix for all filenames generated (except root)
+(define %use-id-as-filename% #t) ;; if #t uses ID value, if present, as filename
+ ;; otherwise a code is used to indicate level
+ ;; of chunk, and general element number
+ ;; (nth element in the document)
+(define use-output-dir #f) ;; output in separate directory?
+(define %output-dir% "HTML") ;; if output in directory, it's called HTML
+
+; === HTML settings ===
+(define %html-pubid% "-//W3C//DTD HTML 4.01 Transitional//EN") ;; Nearly true :-(
+(define %html40% #t)
+
+; === Media objects ===
+(define preferred-mediaobject-extensions ;; this magic allows to use different graphical
+ (list "png" "jpg" "jpeg")) ;; formats for printing and putting online
+(define acceptable-mediaobject-extensions
+ (list "bmp" "gif" "eps" "epsf" "avi" "mpg" "mpeg" "qt"))
+(define preferred-mediaobject-notations
+ (list "PNG" "JPG" "JPEG"))
+(define acceptable-mediaobject-notations
+ (list "EPS" "BMP" "GIF" "linespecific"))
+; === Rendering ===
+(define %admon-graphics% #t) ;; use symbols for Caution|Important|Note|Tip|Warning
+
+; === Books only ===
+(define %generate-book-titlepage% #t)
+(define %generate-book-toc% #t)
+(define ($generate-chapter-toc$) #f) ;; never generate a chapter TOC in books
+
+; === Articles only ===
+(define %generate-article-titlepage% #t)
+(define %generate-article-toc% #t) ;; make TOC
+
+; === Stylesheet ===
+(define %stylesheet% "UrJTAG.css") ;; Name of the stylesheet to use
+(define %stylesheet-type% "text/css") ;; The type of the stylesheet to use
+
+
+
+ </STYLE-SPECIFICATION-BODY>
+ </STYLE-SPECIFICATION>
+
+ <EXTERNAL-SPECIFICATION ID="DOCBOOK" DOCUMENT="docbook.dsl">
+
+</STYLE-SHEET>
--- /dev/null
+ body {
+ color:black;
+ background-color: #f0fff0;
+ font-family:Arial,Helvetica,sans-serif;
+ }
+ .top { background-color:#a0d0a0 }
+ a { text-decoration:underline; color:#007800 }
+ .nodeco { text-decoration: none }
+ .NAVFOOTER
+ {
+ padding-right: 150px;
+ background-image: url(http://sflogo.sourceforge.net/sflogo.php?group_id=193266&type=2);
+ background-repeat:no-repeat;
+ background-position: right;
+ }
+
+
--- /dev/null
+<?xml version="1.0" encoding="UTF-8"?>\r
+<!DOCTYPE book PUBLIC "-//OASIS//DTD DocBook XML V4.2//EN" "http://www.oasis-open.org/docbook/xml/4.2/docbookx.dtd">\r
+\r
+<book lang="en">\r
+<bookinfo>\r
+ <title>Universal JTAG library, server and tools</title>\r
+ <date>2009-04-08</date>\r
+ <author>\r
+ <firstname>Kolja</firstname>\r
+ <othername>Waschk</othername>\r
+ <surname>(Ed.)</surname>\r
+ </author>\r
+ <authorinitials>KW(</authorinitials>\r
+\r
+<revhistory><revision><revnumber>1482</revnumber><date>2009-04-08</date><authorinitials>KW(</authorinitials></revision></revhistory>\r
+\r
+</bookinfo>\r
+<chapter id="_copyright">\r
+<title>Copyright</title>\r
+<simpara>Copyright 2007, 2008 Kolja Waschk and the respective authors.</simpara>\r
+\r
+<simpara>Permission is granted to copy, distribute and/or modify this document under the\r
+terms of the GNU Free Documentation License, Version 1.2 or any later version\r
+published by the Free Software Foundation. A copy of the license is included in\r
+the section entitled "GNU Free Documentation License".</simpara>\r
+\r
+</chapter>\r
+<chapter id="_general">\r
+<title>General</title>\r
+<section id="_jtag">\r
+<title>JTAG</title>\r
+<simpara>JTAG basics can be found all over the internet. This section should go into\r
+some more details about working with JTAG. What hardware do you need, what is\r
+the usage of JTAG, where do I get files. What file formats are available…</simpara>\r
+\r
+<section id="_introduction">\r
+<title>Introduction</title>\r
+<simpara>JTAG (IEEE 1149.1) is a serial interface for testing devices with\r
+integrated circuits. The problem that the JTAG interface was designed to solve\r
+is checking if connections between ICs are OK. Therefore you can set and check\r
+in- and outputs of ICs. In order to save pins and logic a very simple serial\r
+design was invented.</simpara>\r
+\r
+<itemizedlist>\r
+<listitem>\r
+<simpara>\r
+One pin serial input\r
+</simpara>\r
+</listitem>\r
+<listitem>\r
+<simpara>\r
+One pin serial output\r
+</simpara>\r
+</listitem>\r
+<listitem>\r
+<simpara>\r
+One pin clock\r
+</simpara>\r
+</listitem>\r
+<listitem>\r
+<simpara>\r
+One pin control\r
+</simpara>\r
+</listitem>\r
+</itemizedlist>\r
+<simpara>The control pin (together with clock) allows to switch device states. A state\r
+machine inside each chip can be controlled, e.g. to reset the device. This\r
+control machine also allows to have two internal shift registers in each device\r
+(although we only have on in- and one output-pin). The registers are called\r
+instruction register (IR) and data register (DR). The current UrJTAG tool\r
+allows you to set the IR and set and get the DR. It doesn't allow you to\r
+directly control the statemachine (yet).</simpara>\r
+\r
+</section>\r
+<section id="_interfaces">\r
+<title>Interfaces</title>\r
+<simpara>The simplest interface that you can build is like the Xilinx parallel cable\r
+(also called DLC5). If your device works with a 5V or 3.3V supply voltage then\r
+this device can even be build just with passive parts. (picture missing here)\r
+UrJTAG also supports a number of other interface adapters.</simpara>\r
+\r
+</section>\r
+<section id="_additions">\r
+<title>Additions</title>\r
+<simpara>In the meantime the jtag specification was used as a basis for programming\r
+flash files and debugging processors. UrJTAG supports programming a couple of\r
+different flash devices. It also supports programming of non-flash devices via\r
+svf files. UrJTAG does not support debugging yet. Other open source solutions\r
+such as OpenOCD allow you to debug ARM processors with gdb.</simpara>\r
+\r
+</section>\r
+<section id="_bsdl_and_urjtag_data_files">\r
+<title>BSDL and UrJTAG data files</title>\r
+<simpara>The BSDL file format describes the jtag interface for one IC. It is a VHDL\r
+syntax with the needed information (like pin-names, register lengths and\r
+commands) that is usually done by the supplier. e.g. Xilinx BSDL files are\r
+all included in their free web-pack (using file extension ".bsd").</simpara>\r
+\r
+<simpara>UrJTAG uses a different file format internally. So in order to add a new device\r
+to UrJTAG you need to convert those files and produce a directory structure.\r
+Currently there are at least three tools available to do that; included with\r
+UrJTAG is "bsdl2jtag". Please ask on the mailing list in case of problems with\r
+that. Please also send proven working files back to this project.</simpara>\r
+\r
+<simpara>Starting with post-0.7 releases, UrJTAG contains a BSDL subsystem that\r
+retrieves the descriptions for chips in the chain from BSDL files on the\r
+fly. "bsdl2jtag" is in fact a wrapper that uses the BSDL subsystem to\r
+convert the BSDL file.</simpara>\r
+\r
+</section>\r
+<section id="_svf_files">\r
+<title>SVF files</title>\r
+<simpara>The SVF file format contains a number of high level commands to drive the jtag\r
+bus. For example you can shift the IR or DR and even check for the results.\r
+The Xilinxs impact and Altera QuartusII tools allow you to write this file to\r
+program devices.</simpara>\r
+\r
+<simpara>The player has been developed according to the "Serial Vector Format\r
+Specification", Revision E, 8 March 1999 issued by ASSET InterTech, Inc. The\r
+full specification can be found at\r
+<ulink url="http://www.asset-intertech.com/support/svf.pdf">http://www.asset-intertech.com/support/svf.pdf</ulink></simpara>\r
+\r
+<simpara>UrJTAG features an "SVF player" that can read SVF files and perform the\r
+described actions on the bus.</simpara>\r
+\r
+<simpara>SVF parser and lexer are also copyright 2002, CDS at <ulink url="http://www-csd.ijs.si/">http://www-csd.ijs.si/</ulink>.\r
+They have been reused from the "Experimental Boundary Scan" project at\r
+<ulink url="http://ebsp.sourceforge.net/">http://ebsp.sourceforge.net/</ulink>.</simpara>\r
+\r
+</section>\r
+<section id="_jam_stapl_files">\r
+<title>JAM/STAPL files</title>\r
+<simpara>Another format for describing actions over JTAG interfaces is STAPL, actually\r
+standardized as JEDEC "JESD-71A". Compared to SVF, it looks more like an\r
+actual programming language and features looping, conditional execution, and\r
+more. STAPL is not yet supported by UrJTAG.</simpara>\r
+\r
+</section>\r
+</section>\r
+<section id="_urjtag">\r
+<title>UrJTAG</title>\r
+<section id="_introduction_2">\r
+<title>Introduction</title>\r
+<simpara>UrJTAG Tools is a software package which enables working with JTAG-aware (IEEE\r
+1149.1) hardware devices (parts) and boards through JTAG adapter.</simpara>\r
+\r
+<simpara>This package has open and modular architecture with ability to write\r
+miscellaneous extensions (like board testers, flash memory programmers, and so\r
+on).</simpara>\r
+\r
+<simpara>JTAG Tools package is free software, covered by the GNU General Public License,\r
+and you are welcome to change it and/or distribute copies of it under certain\r
+conditions. There is absolutely no warranty for JTAG Tools. Please read\r
+COPYING file for more info.</simpara>\r
+\r
+<warning><simpara>This software may damage your hardware!</simpara></warning>\r
+<simpara>Feedback and contributions are welcome.</simpara>\r
+\r
+</section>\r
+<section id="_about_this_document">\r
+<title>About this document</title>\r
+<simpara>This documentation is far from being complete. You're encouraged to amend and\r
+supplement it and submit your changes in the Bugs or Enhancements tracker\r
+at the UrJTAG website.</simpara>\r
+\r
+</section>\r
+<section id="_urjtag_website">\r
+<title>UrJTAG Website</title>\r
+<simpara>The most current version of this documentation and UrJTAG sourcecode\r
+is always available from the project homepage at <ulink url="http://www.urjtag.org">http://www.urjtag.org</ulink></simpara>\r
+\r
+</section>\r
+<section id="_the_name_urjtag">\r
+<title>The name "UrJTAG"</title>\r
+<simpara>I (Kolja) favour short names, so I thought about adding only a few\r
+letters to "JTAG". The prefix "Ur" in German means "ancestral", an "Ur-Vater"\r
+is a forefather. UrJTAG shall become the forefather, the prototype for many\r
+other JTAG tools. By mere chance the "Ur" is also another name for an aurochs,\r
+an animal similar to the GNU…</simpara>\r
+\r
+</section>\r
+<section id="_authors_contributors_8230_thanks">\r
+<title>Authors, contributors, … thanks</title>\r
+<simpara>A list of contributors is maintained in the file THANKS in the source\r
+distribution. Special thanks go to Marcel Telka, who actually "invented" the\r
+JTAG tools and wrote most of this basis of UrJTAG, and Arnim Laeuger for his\r
+continuous support and development of SVF and BSDL subsystem and FT2232\r
+drivers.</simpara>\r
+\r
+</section>\r
+<section id="_urjtag_and_openwince_jtag_tools">\r
+<title>UrJTAG and openwince JTAG Tools</title>\r
+<simpara>The JTAG Tools originally were developed by Marcel Telka as part of\r
+the openwince project. Still a large portion of the source code is his work.\r
+However, the last release of the JTAG tools was version 0.5.1 in 2003. After a\r
+few years the development completely stalled. Every few months or so on the\r
+project's mailing list someone asked about continuing, but a critical mass\r
+wasn't reached before late 2007. A fork of the JTAG tools was created under the\r
+wings of the UrJTAG project at Sourceforge.</simpara>\r
+\r
+</section>\r
+</section>\r
+<section id="_system_requirements">\r
+<title>System requirements</title>\r
+<section id="_supported_host_operating_systems">\r
+<title>Supported host operating systems</title>\r
+<simpara>JTAG Tools should run on all Unix like operating systems including MS Windows\r
+with Cygwin installed.</simpara>\r
+\r
+</section>\r
+<section id="_required_software_for_running_urjtag">\r
+<title>Required software for running UrJTAG</title>\r
+<simpara>Required only for MS Windows:</simpara>\r
+\r
+<itemizedlist>\r
+<listitem>\r
+<simpara>\r
+current Cygwin net installation from <ulink url="http://cygwin.com">http://cygwin.com</ulink>\r
+</simpara>\r
+</listitem>\r
+<listitem>\r
+<simpara>\r
+ioperm package (a part of the standard Cygwin net installation)\r
+</simpara>\r
+</listitem>\r
+</itemizedlist>\r
+<simpara>It may be necessary to run the command "ioperm -i" to install the IOPERM.SYS\r
+driver in the system.</simpara>\r
+\r
+<simpara>If UrJTAG was compiled to use the readline library, it has to be present on\r
+the system as well. It's probably a standard part of your distribution.</simpara>\r
+\r
+<simpara>More software is needed if you want to compile UrJTAG (which you probably want\r
+because currently no pre-compiled binaries are avaible…). See "Installation"\r
+below.</simpara>\r
+\r
+</section>\r
+<section id="_supported_jtag_adapters_cables">\r
+<title>Supported JTAG adapters/cables</title>\r
+<simpara>See <emphasis>help cable</emphasis> command for up-to-date info.</simpara>\r
+\r
+<simpara>Parallel-port cables:</simpara>\r
+\r
+<itemizedlist>\r
+<listitem>\r
+<simpara>\r
+Arcom JTAG Cable\r
+</simpara>\r
+</listitem>\r
+<listitem>\r
+<simpara>\r
+Altera ByteBlaster/ByteBlaster II/ByteBlasterMV Parallel Port Download Cable\r
+</simpara>\r
+</listitem>\r
+<listitem>\r
+<simpara>\r
+Xilinx DLC5 JTAG Parallel Cable III\r
+</simpara>\r
+</listitem>\r
+<listitem>\r
+<simpara>\r
+ETC EA253 JTAG Cable\r
+</simpara>\r
+</listitem>\r
+<listitem>\r
+<simpara>\r
+ETC EI012 JTAG Cable\r
+</simpara>\r
+</listitem>\r
+<listitem>\r
+<simpara>\r
+Ka-Ro TRITON (PXA255/250) JTAG Cable\r
+</simpara>\r
+</listitem>\r
+<listitem>\r
+<simpara>\r
+Keith &amp; Koep JTAG Cable\r
+</simpara>\r
+</listitem>\r
+<listitem>\r
+<simpara>\r
+Lattice Parallel Port JTAG Cable\r
+</simpara>\r
+</listitem>\r
+<listitem>\r
+<simpara>\r
+Mpcbdm JTAG Cable\r
+</simpara>\r
+</listitem>\r
+<listitem>\r
+<simpara>\r
+Macraigor Wiggler JTAG Cable\r
+</simpara>\r
+</listitem>\r
+</itemizedlist>\r
+<simpara>FT2232-based USB cables:</simpara>\r
+\r
+<itemizedlist>\r
+<listitem>\r
+<simpara>\r
+Amontec JTAGkey\r
+</simpara>\r
+</listitem>\r
+<listitem>\r
+<simpara>\r
+Amontec JTAGkey-Tiny (supported as cable "JTAGkey")\r
+</simpara>\r
+</listitem>\r
+<listitem>\r
+<simpara>\r
+KrisTech UsbScarab2 ARM JTAG <ulink url="http://www.kristech.eu/">http://www.kristech.eu/</ulink>\r
+</simpara>\r
+</listitem>\r
+<listitem>\r
+<simpara>\r
+Olimex ARM-USB-JTAG\r
+</simpara>\r
+</listitem>\r
+<listitem>\r
+<simpara>\r
+Olimex ARM-USB-TINY\r
+</simpara>\r
+</listitem>\r
+<listitem>\r
+<simpara>\r
+OOCDLink-s (experimental) <ulink url="http://www.joernonline.de/dw/doku.php?id=projects:oocdlink:2_oocdlinks">http://www.joernonline.de/dw/doku.php?id=projects:oocdlink:2_oocdlinks</ulink>\r
+</simpara>\r
+</listitem>\r
+<listitem>\r
+<simpara>\r
+Other FT2232-based USB JTAG cables (experimental)\r
+</simpara>\r
+</listitem>\r
+<listitem>\r
+<simpara>\r
+TinCanTools Flyswatter\r
+</simpara>\r
+</listitem>\r
+<listitem>\r
+<simpara>\r
+Turtelizer 2 (experimental) <ulink url="http://www.ethernut.de/en/hardware/turtelizer/">http://www.ethernut.de/en/hardware/turtelizer/</ulink>\r
+</simpara>\r
+</listitem>\r
+<listitem>\r
+<simpara>\r
+USB to JTAG Interface (experimental)\r
+</simpara>\r
+</listitem>\r
+<listitem>\r
+<simpara>\r
+<ulink url="http://www.hs-augsburg.de/~hhoegl/proj/usbjtag/usbjtag.html">http://www.hs-augsburg.de/~hhoegl/proj/usbjtag/usbjtag.html</ulink>\r
+</simpara>\r
+</listitem>\r
+<listitem>\r
+<simpara>\r
+Black gnICE <ulink url="http://docs.blackfin.uclinux.org/doku.php?id=hw:jtag:gnice">http://docs.blackfin.uclinux.org/doku.php?id=hw:jtag:gnice</ulink>\r
+</simpara>\r
+</listitem>\r
+<listitem>\r
+<simpara>\r
+Xverve Signalyzer Tool (experimental)\r
+</simpara>\r
+</listitem>\r
+</itemizedlist>\r
+<simpara>Other USB cables:</simpara>\r
+\r
+<itemizedlist>\r
+<listitem>\r
+<simpara>\r
+Altera USB-Blaster and compatible <ulink url="http://www.ixo.de/info/usb_jtag">http://www.ixo.de/info/usb_jtag</ulink>\r
+</simpara>\r
+</listitem>\r
+<listitem>\r
+<simpara>\r
+Segger/IAR J-Link / Atmel SAM-ICE (experimental, work in progress)\r
+</simpara>\r
+</listitem>\r
+<listitem>\r
+<simpara>\r
+Xilinx Platform USB Cable / DLC9 (slow, experimental, work in progress - don't use)\r
+</simpara>\r
+</listitem>\r
+</itemizedlist>\r
+<simpara>Other cables:\r
+ * Technologic Systems TS-7800 SoC GPIO builtin JTAG interface</simpara>\r
+\r
+</section>\r
+<section id="_jtag_aware_parts_chips">\r
+<title>JTAG-aware parts (chips)</title>\r
+<simpara>The data/ directory of the UrJTAG installation has some more, but at\r
+least the following are supported:</simpara>\r
+\r
+<itemizedlist>\r
+<listitem>\r
+<simpara>\r
+Altera EP1C20F400\r
+</simpara>\r
+</listitem>\r
+<listitem>\r
+<simpara>\r
+Altera MAX7000 (w/ BSDL)\r
+</simpara>\r
+</listitem>\r
+<listitem>\r
+<simpara>\r
+Altera EPM7128AETC100\r
+</simpara>\r
+</listitem>\r
+<listitem>\r
+<simpara>\r
+Altera Cyclone I & II (w/ BSDL)\r
+</simpara>\r
+</listitem>\r
+<listitem>\r
+<simpara>\r
+Analog Devices Sharc-21065L\r
+</simpara>\r
+</listitem>\r
+<listitem>\r
+<simpara>\r
+Atmel ATmega128 (partial support)\r
+</simpara>\r
+</listitem>\r
+<listitem>\r
+<simpara>\r
+Atmel AT32AP7000 (partial support)\r
+</simpara>\r
+</listitem>\r
+<listitem>\r
+<simpara>\r
+Broadcom BCM1250\r
+</simpara>\r
+</listitem>\r
+<listitem>\r
+<simpara>\r
+Broadcom BCM3310 (partial support)\r
+</simpara>\r
+</listitem>\r
+<listitem>\r
+<simpara>\r
+Broadcom BCM5421S\r
+</simpara>\r
+</listitem>\r
+<listitem>\r
+<simpara>\r
+Broadcom BCM4712 (partial support)\r
+</simpara>\r
+</listitem>\r
+<listitem>\r
+<simpara>\r
+DEC SA1100\r
+</simpara>\r
+</listitem>\r
+<listitem>\r
+<simpara>\r
+Hitachi HD64465\r
+</simpara>\r
+</listitem>\r
+<listitem>\r
+<simpara>\r
+Hitachi SH7727\r
+</simpara>\r
+</listitem>\r
+<listitem>\r
+<simpara>\r
+Hitachi SH7729\r
+</simpara>\r
+</listitem>\r
+<listitem>\r
+<simpara>\r
+IBM PowerPC 440GX\r
+</simpara>\r
+</listitem>\r
+<listitem>\r
+<simpara>\r
+Intel IXP425\r
+</simpara>\r
+</listitem>\r
+<listitem>\r
+<simpara>\r
+Intel SA1110\r
+</simpara>\r
+</listitem>\r
+<listitem>\r
+<simpara>\r
+Intel PXA250/PXA255/PXA260/PXA261/PXA262/PXA263\r
+</simpara>\r
+</listitem>\r
+<listitem>\r
+<simpara>\r
+Lattice LC4032V\r
+</simpara>\r
+</listitem>\r
+<listitem>\r
+<simpara>\r
+Lattice M4A3-64/32\r
+</simpara>\r
+</listitem>\r
+<listitem>\r
+<simpara>\r
+Lattice M4A3-256/192\r
+</simpara>\r
+</listitem>\r
+<listitem>\r
+<simpara>\r
+Motorola MPC8245\r
+</simpara>\r
+</listitem>\r
+<listitem>\r
+<simpara>\r
+Samsung S3C4510B\r
+</simpara>\r
+</listitem>\r
+<listitem>\r
+<simpara>\r
+Sharp LH7A400\r
+</simpara>\r
+</listitem>\r
+<listitem>\r
+<simpara>\r
+Toshiba TX4925/TX4926\r
+</simpara>\r
+</listitem>\r
+<listitem>\r
+<simpara>\r
+Xilinx XC2C256-TQ144\r
+</simpara>\r
+</listitem>\r
+<listitem>\r
+<simpara>\r
+Xilinx XCR3032XL-VQ44\r
+</simpara>\r
+</listitem>\r
+<listitem>\r
+<simpara>\r
+Xilinx XCR3128XL-CS144\r
+</simpara>\r
+</listitem>\r
+<listitem>\r
+<simpara>\r
+Xilinx XCR3128XL-VQ100\r
+</simpara>\r
+</listitem>\r
+<listitem>\r
+<simpara>\r
+Xilinx XCR3256XL-FT256\r
+</simpara>\r
+</listitem>\r
+<listitem>\r
+<simpara>\r
+Xilinx Spartan-IIE\r
+</simpara>\r
+</listitem>\r
+<listitem>\r
+<simpara>\r
+Xilinx Spartan-3/E\r
+</simpara>\r
+</listitem>\r
+<listitem>\r
+<simpara>\r
+Xilinx Spartan-3AN\r
+</simpara>\r
+</listitem>\r
+</itemizedlist>\r
+</section>\r
+<section id="_flash_chips">\r
+<title>Flash chips</title>\r
+<note><simpara>Not all chips are supported in every possible configuration, there may\r
+be untested combinations of chip type, bus width, …</simpara></note>\r
+<itemizedlist>\r
+<listitem>\r
+<simpara>\r
+Intel 28FxxxJ3A (28F320J3A, 28F640J3A, 28F128J3A)\r
+</simpara>\r
+</listitem>\r
+<listitem>\r
+<simpara>\r
+Intel 28FxxxK3 (28F640K3, 28F128K3, 28F256K3)\r
+</simpara>\r
+</listitem>\r
+<listitem>\r
+<simpara>\r
+Intel 28FxxxK18 (28F640K18, 28F128K18, 28F256K18)\r
+</simpara>\r
+</listitem>\r
+<listitem>\r
+<simpara>\r
+AMD Am29LV64xD (Am29LV640D, Am29LV641D, Am29LV642D)\r
+</simpara>\r
+</listitem>\r
+<listitem>\r
+<simpara>\r
+AMD Am29xx040B (Am29F040B, Am29LV040B)\r
+</simpara>\r
+</listitem>\r
+</itemizedlist>\r
+<simpara>UrJTAG uses the multi-byte write mode if supported by the particular flash\r
+device. The flash code will automatically switch to this algorithm if the\r
+Device Geometry Definition reports that more than one memory location can be\r
+written in a single step (refer to CFI details shown by <emphasis>detectflash</emphasis>). Since\r
+multiple locations are written in a burst-like manner with only one polling\r
+sequence afterwards, the overall flashing performance increases by factor of\r
+5-17.</simpara>\r
+\r
+<simpara>In case you encounter any issues with the multi-byte write mode, run configure\r
+with the <emphasis>—disable-flash-multi-byte</emphasis> option and re-compile to disable this\r
+algorithm.</simpara>\r
+\r
+</section>\r
+</section>\r
+<section id="_compilation_and_installation">\r
+<title>Compilation and installation</title>\r
+<section id="_required_software_for_compiling_urjtag">\r
+<title>Required software for compiling UrJTAG</title>\r
+<simpara>To run autogen.sh, you need autoconf and automake, bison, and a recent flex.</simpara>\r
+\r
+<simpara>The distributed source tarball contains source pregenerated with a current\r
+flex version; flex therefore is only needed if you want to compile code\r
+checked out from our Subversion repository. Flex 2.5.4a as it comes with\r
+most but the very latest Cygwin release cannot build the scanners for BSDL and\r
+SVF. Building these files requires Flex 2.5.33 or newer. The configure script\r
+will compare the available Flex version against these preconditions and enables\r
+or disables the related features.</simpara>\r
+\r
+<simpara>Furthermore, libtool should be available, and "devel" versions of the following\r
+packages:</simpara>\r
+\r
+<itemizedlist>\r
+<listitem>\r
+<simpara>\r
+gettext\r
+</simpara>\r
+</listitem>\r
+<listitem>\r
+<simpara>\r
+readline (not needed, but really eases interactive use)\r
+</simpara>\r
+</listitem>\r
+<listitem>\r
+<simpara>\r
+ioperm (needed only for Cygwin)\r
+</simpara>\r
+</listitem>\r
+</itemizedlist>\r
+</section>\r
+<section id="_required_libraries_for_usb_support">\r
+<title>Required libraries for USB support</title>\r
+<simpara>For USB adapter support (including support for parallel port adapters attached\r
+to USB-to-parallel converters), one or more additional libraries are required.</simpara>\r
+\r
+<simpara>Many USB JTAG adapters and USB-to-parallel converters are based on chips\r
+made by FTDI. To support these, either intra.net's "libftdi" or FTDI's\r
+"FTD2XX" library can be used.</simpara>\r
+\r
+<simpara>On many modern Linux distributions, libftdi is available as a precompiled\r
+package and can be installed using the distribution's package management system\r
+(e.g. "apt-get libftdi-dev" for Debian and Ubuntu). If it isn't available or\r
+you don't run Linux, you can get it from</simpara>\r
+\r
+<itemizedlist>\r
+<listitem>\r
+<simpara>\r
+<ulink url="http://www.intra2net.com/en/developer/libftdi/">http://www.intra2net.com/en/developer/libftdi/</ulink>\r
+</simpara>\r
+</listitem>\r
+</itemizedlist>\r
+<simpara>Alternatively, you can use the FTD2XX library from the chip manufacturer FTDI.\r
+It is available for Linux and Windows. There's more information about linking\r
+to that library in a Cygwin environment below.</simpara>\r
+\r
+<simpara>All other USB JTAG adapters can be supported only if libusb is installed.\r
+There is a libusb-win32 variant that can be used in a Cygwin environment:</simpara>\r
+\r
+<itemizedlist>\r
+<listitem>\r
+<simpara>\r
+<ulink url="http://libusb.sourceforge.net">http://libusb.sourceforge.net</ulink> (libusb)\r
+</simpara>\r
+</listitem>\r
+<listitem>\r
+<simpara>\r
+<ulink url="http://libusb-win32.sourceforge.net">http://libusb-win32.sourceforge.net</ulink> (libusb for Windows)\r
+</simpara>\r
+</listitem>\r
+</itemizedlist>\r
+<simpara>For specific notes regarding the use of these libraries in a Cygwin\r
+environment, see below.</simpara>\r
+\r
+</section>\r
+<section id="_installing_from_source_tar_gz">\r
+<title>Installing from source tar.gz</title>\r
+<simpara>The installation follows the standard configure, make, make install scheme:</simpara>\r
+\r
+<literallayout class="monospaced">tar xzvf urjtag.tar.gz\r
+cd ../jtag\r
+./configure\r
+make\r
+make install</literallayout>\r
+</section>\r
+<section id="_installing_from_subversion_repository">\r
+<title>Installing from Subversion repository</title>\r
+<simpara>If you want to try the very newest version of UrJTAG…</simpara>\r
+\r
+<literallayout class="monospaced">svn co http://urjtag.svn.sourceforge.net/svnroot/urjtag/trunk urjtag</literallayout>\r
+<literallayout class="monospaced">cd urjtag/jtag\r
+./autogen.sh\r
+# ./configure done by autogen.sh; run it here with special options if needed\r
+make\r
+make install</literallayout>\r
+</section>\r
+<section id="_linking_to_ftd2xx_dll_in_cygwin_environment">\r
+<title>Linking to FTD2XX.DLL in Cygwin environment</title>\r
+<simpara>Before running configure, get the D2XX drivers from FTDI.</simpara>\r
+\r
+<itemizedlist>\r
+<listitem>\r
+<simpara>\r
+<ulink url="http://www.ftdichip.com/Drivers/D2XX.htm">http://www.ftdichip.com/Drivers/D2XX.htm</ulink> (FTDI FTD2XX library)\r
+</simpara>\r
+</listitem>\r
+</itemizedlist>\r
+<simpara>Unzip the archive into a directory of your choice (probably a choice\r
+without spaces in the name is better) and afterwards run configure with the\r
+"—with-ftd2xx" pointing to that directory, e.g.</simpara>\r
+\r
+<literallayout class="monospaced">./configure --with-ftd2xx="/cygdrive/c/temp/ftdi-cdm-drivers"</literallayout>\r
+<simpara>Configure should now report</simpara>\r
+\r
+<literallayout class="monospaced">jtag is now configured for\r
+ ...\r
+ Detected libftd2xx : yes</literallayout>\r
+</section>\r
+<section id="_using_libusb_win32_in_cygwin_environment">\r
+<title>Using LibUSB-Win32 in Cygwin environment</title>\r
+<simpara>Before running configure, install the LibUSB-Win32 "filter" driver from SF.</simpara>\r
+\r
+<itemizedlist>\r
+<listitem>\r
+<simpara>\r
+<ulink url="http://libusb-win32.sourceforge.net">http://libusb-win32.sourceforge.net</ulink>\r
+</simpara>\r
+</listitem>\r
+</itemizedlist>\r
+<simpara>Then point configure to the directory where LibUSB-Win32 was installed (it\r
+might give problems if the path contains spaces, as "Program Files" does!):</simpara>\r
+\r
+<literallayout class="monospaced">./configure --with-libusb="/cygdrive/c/Programme/LibUSB-Win32/"</literallayout>\r
+</section>\r
+<section id="_compiling_with_mingw">\r
+<title>Compiling with MinGW</title>\r
+<simpara>UrJTAG may be compiled into a Windows executable using the MinGW compiler\r
+(<ulink url="http://www.mingw.org">http://www.mingw.org</ulink>), or Cygwin GCC with the "-mno-cygwin" compiler flag.</simpara>\r
+\r
+<simpara>This has the advantage over running in a Cygwin environment that you don't need\r
+to install anything else but the jtag.exe (plus libraries like FTD2XX.dll or\r
+InpOut32.DLL that are required for device access under Windows in any case).</simpara>\r
+\r
+<simpara>However, because support for MinGW is quite new in UrJTAG, it may lack some\r
+features (e.g. readline support) or run a little slower.</simpara>\r
+\r
+<simpara>Because it seems to be easier to set up a Cygwin environment, we recommend\r
+using the Cygwin GCC with "-mno-cygwin" flag instead of using a MinGW setup:</simpara>\r
+\r
+<literallayout class="monospaced">CFLAGS="-mno-cygwin -O2" ./configure --with-ftd2xx=/tmp/cdm-drivers --with-inpout32</literallayout>\r
+<simpara>It is even possible to cross-compile and build the executable on a Linux\r
+host:</simpara>\r
+\r
+<literallayout class="monospaced">./configure --host=i586-mingw32msvc --with-ftd2xx=/tmp/cdm-drivers --with-inpout32\r
+make</literallayout>\r
+<simpara>The "—with-inpout32" switch tells UrJTAG to use the InpOut32.DLL for access to\r
+parallel ports, because the Cygwin ioperm isn't available for MinGW. The InpOut32\r
+library is available from logix4u.net:</simpara>\r
+\r
+<literallayout class="monospaced">http://logix4u.net/Legacy_Ports/Parallel_Port/Inpout32.dll_for_Windows_98/2000/NT/XP.html</literallayout>\r
+</section>\r
+<section id="_driver_tailoring">\r
+<title>Driver tailoring</title>\r
+<simpara>The configure script enables all default bus, cable and lowlevel drivers. You\r
+can include and exclude specific drivers if required. For a list of parameters\r
+run</simpara>\r
+\r
+<literallayout class="monospaced">./configure --help</literallayout>\r
+<simpara>to figure out the appropriate —enable-bus, —enable-cable and —enable-lowlevel\r
+options.</simpara>\r
+\r
+</section>\r
+<section id="_building_the_bsdl_subsystem">\r
+<title>Building the BSDL subsystem</title>\r
+<simpara>As mentioned above, building the BSDL lexer requires Flex 2.5.33 or newer. If\r
+the detected Flex version is not recent enough, configure will disable the\r
+BSDL subsystem. The detection result is summarized at the end of configure:</simpara>\r
+\r
+<literallayout class="monospaced">jtag is now configured for\r
+ ...\r
+ Build BSDL subsystem : yes</literallayout>\r
+<simpara>Flex is only required when you're working on a check-out of the Subversion\r
+repository. In this case Flex has to be called to transform bsdl_flex.l to\r
+bsdl_flex.c. When you're compiling from released sources, the local Flex\r
+version is not relevant since the output file of Flex is part of the\r
+tarball. I.e. even if the local Flex fails the check, the BSDL subsystem is\r
+enabled and will be compiled from the released C files.</simpara>\r
+\r
+</section>\r
+</section>\r
+</chapter>\r
+<chapter id="_usage">\r
+<title>Usage</title>\r
+<section id="_quick_start">\r
+<title>Quick start</title>\r
+<section id="_run_the_software">\r
+<title>Run the software</title>\r
+<simpara>Connect your JTAG adapter between your PC and target device and turn\r
+on your device.</simpara>\r
+\r
+<simpara>To run JTAG Tools type "jtag" and press Enter. jtag should start and\r
+display some initial informations. Output should end with line like this:</simpara>\r
+\r
+<literallayout class="monospaced">This is "jtag command prompt". Type "help" and press Enter for initial help\r
+about available commands. To exit JTAG Tools type "quit" and press Enter.</literallayout>\r
+</section>\r
+<section id="_configure_the_cable">\r
+<title>Configure the cable</title>\r
+<simpara>Type "help cable" for list of supported JTAG cables.</simpara>\r
+\r
+<simpara>Type "cable" command followed by the cable name and possibly further\r
+arguments for cable configuration. Example:</simpara>\r
+\r
+<literallayout class="monospaced">jtag> cable EA253 parallel 0x378\r
+Initializing ETC EA253 JTAG Cable on parallel port at 0x378</literallayout>\r
+<simpara>See the section about the "cable" command for details and USB support.</simpara>\r
+\r
+</section>\r
+<section id="_detect_parts_on_the_jtag_chain">\r
+<title>Detect parts on the JTAG chain</title>\r
+<simpara>Type "detect" at the jtag command prompt:</simpara>\r
+\r
+<literallayout class="monospaced">jtag> detect</literallayout>\r
+<simpara>Your output should look like this:</simpara>\r
+\r
+<literallayout class="monospaced">IR length: 5\r
+Chain length: 1\r
+Device Id: 01011001001001100100000000010011\r
+ Manufacturer: Intel\r
+ Part: PXA250\r
+ Stepping: C0\r
+ Filename: /usr/local/share/urjtag/intel/pxa250/pxa250c0</literallayout>\r
+<simpara>If you get empty output or an error message your JTAG adapter is not connected\r
+properly, or your target board doesn't work, or it is turned off.</simpara>\r
+\r
+<simpara>The "detect" command is required before all other commands.</simpara>\r
+\r
+</section>\r
+<section id="_print_current_jtag_chain_status">\r
+<title>Print current JTAG chain status</title>\r
+<literallayout class="monospaced">jtag> print chain\r
+ No. Manufacturer Part Stepping Instruction Register\r
+---------------------------------------------------------\r
+ 0 Intel PXA250 C0 BYPASS BR</literallayout>\r
+</section>\r
+<section id="_sample_device_pin_status">\r
+<title>Sample device pin status</title>\r
+<literallayout class="monospaced">jtag> instruction SAMPLE/PRELOAD\r
+jtag> shift ir\r
+jtag> shift dr\r
+jtag> dr\r
+1000110010000010000110010111111111111111111001101110...\r
+jtag> print chain\r
+ No. Manufacturer Part Stepping Instruction Register\r
+------------------------------------------------------------\r
+ 0 Intel PXA250 C0 SAMPLE/PRELOAD BSR\r
+jtag> get signal BOOT_SEL[0]\r
+BOOT_SEL[0] = 0\r
+jtag></literallayout>\r
+<literallayout class="monospaced">Note: BSR is "Boundary Scan Register"</literallayout>\r
+</section>\r
+<section id="_burn_flash_connected_to_the_part">\r
+<title>Burn flash connected to the part</title>\r
+<literallayout class="monospaced">jtag> flashmem 0 brux.b\r
+0x00000000\r
+Note: Supported configuration is 2 x 16 bit only\r
+BOOT_SEL: Asynchronous 32-bit ROM</literallayout>\r
+<literallayout class="monospaced">2 x 16 bit CFI devices detected (QRY ok)!</literallayout>\r
+<literallayout class="monospaced">program:\r
+block 0 unlocked\r
+erasing block 0: 0\r
+addr: 0x00002854\r
+verify:\r
+addr: 0x00002854\r
+Done.\r
+jtag></literallayout>\r
+<simpara>or:</simpara>\r
+\r
+<literallayout class="monospaced">jtag> flashmem msbin xboot.bin\r
+Note: Supported configuration is 2 x 16 bit only\r
+BOOT_SEL: Asynchronous 32-bit ROM</literallayout>\r
+<literallayout class="monospaced">2 x 16 bit CFI devices detected (QRY ok)!</literallayout>\r
+<literallayout class="monospaced">block 0 unlocked\r
+erasing block 0: 0\r
+program:\r
+record: start = 0x00000000, len = 0x00000004, checksum = 0x000001EB\r
+record: start = 0x00000040, len = 0x00000008, checksum = 0x000001B0\r
+record: start = 0x00001000, len = 0x00002B30, checksum = 0x00122CAB\r
+record: start = 0x00004000, len = 0x00000160, checksum = 0x0000684B\r
+record: start = 0x00005000, len = 0x00000054, checksum = 0x000008EE\r
+record: start = 0x00005054, len = 0x00000030, checksum = 0x00000DA9\r
+record: start = 0x00000000, len = 0x00001000, checksum = 0x00000000</literallayout>\r
+<literallayout class="monospaced">verify:\r
+record: start = 0x00000000, len = 0x00000004, checksum = 0x000001EB\r
+record: start = 0x00000040, len = 0x00000008, checksum = 0x000001B0\r
+record: start = 0x00001000, len = 0x00002B30, checksum = 0x00122CAB\r
+record: start = 0x00004000, len = 0x00000160, checksum = 0x0000684B\r
+record: start = 0x00005000, len = 0x00000054, checksum = 0x000008EE\r
+record: start = 0x00005054, len = 0x00000030, checksum = 0x00000DA9\r
+record: start = 0x00000000, len = 0x00001000, checksum = 0x00000000</literallayout>\r
+<literallayout class="monospaced">Done.\r
+jtag></literallayout>\r
+</section>\r
+</section>\r
+<section id="_jtag_commands">\r
+<title>JTAG commands</title>\r
+<section id="_overview">\r
+<title>Overview</title>\r
+<simpara>Following is a list of commands currently supported by jtag and some\r
+example usage.</simpara>\r
+\r
+<informaltable tabstyle="hlabeledlist" pgwide="0" frame="none" colsep="0" rowsep="0"><tgroup cols="2"><colspec colwidth="3*"/><colspec colwidth="7*"/><tbody valign="top">\r
+<row>\r
+<entry><simpara>\r
+<emphasis role="strong">bit</emphasis>\r
+</simpara></entry>\r
+<entry>\r
+<simpara>\r
+define new BSR bit\r
+</simpara>\r
+</entry>\r
+</row>\r
+<row>\r
+<entry><simpara>\r
+<emphasis role="strong">bus</emphasis>\r
+</simpara></entry>\r
+<entry>\r
+<simpara>\r
+change active bus\r
+</simpara>\r
+</entry>\r
+</row>\r
+<row>\r
+<entry><simpara>\r
+<emphasis role="strong">bsdl</emphasis>\r
+</simpara></entry>\r
+<entry>\r
+<simpara>\r
+manage BSDL files\r
+</simpara>\r
+</entry>\r
+</row>\r
+<row>\r
+<entry><simpara>\r
+<emphasis role="strong">cable</emphasis>\r
+</simpara></entry>\r
+<entry>\r
+<simpara>\r
+select JTAG cable\r
+</simpara>\r
+</entry>\r
+</row>\r
+<row>\r
+<entry><simpara>\r
+<emphasis role="strong">detect</emphasis>\r
+</simpara></entry>\r
+<entry>\r
+<simpara>\r
+detect parts on the JTAG chain\r
+</simpara>\r
+</entry>\r
+</row>\r
+<row>\r
+<entry><simpara>\r
+<emphasis role="strong">detectflash</emphasis>\r
+</simpara></entry>\r
+<entry>\r
+<simpara>\r
+detect parameters of flash chips attached to a part\r
+</simpara>\r
+</entry>\r
+</row>\r
+<row>\r
+<entry><simpara>\r
+<emphasis role="strong">discovery</emphasis>\r
+</simpara></entry>\r
+<entry>\r
+<simpara>\r
+discovery of unknown parts in the JTAG chain\r
+</simpara>\r
+</entry>\r
+</row>\r
+<row>\r
+<entry><simpara>\r
+<emphasis role="strong">dr</emphasis>\r
+</simpara></entry>\r
+<entry>\r
+<simpara>\r
+display or set active data register for a part\r
+</simpara>\r
+</entry>\r
+</row>\r
+<row>\r
+<entry><simpara>\r
+<emphasis role="strong">endian</emphasis>\r
+</simpara></entry>\r
+<entry>\r
+<simpara>\r
+set/print endianess for reading/writing binary files\r
+</simpara>\r
+</entry>\r
+</row>\r
+<row>\r
+<entry><simpara>\r
+<emphasis role="strong">eraseflash</emphasis>\r
+</simpara></entry>\r
+<entry>\r
+<simpara>\r
+erase flash memory by number of blocks\r
+</simpara>\r
+</entry>\r
+</row>\r
+<row>\r
+<entry><simpara>\r
+<emphasis role="strong">flashmem</emphasis>\r
+</simpara></entry>\r
+<entry>\r
+<simpara>\r
+burn flash memory with data from a file\r
+</simpara>\r
+</entry>\r
+</row>\r
+<row>\r
+<entry><simpara>\r
+<emphasis role="strong">frequency</emphasis>\r
+</simpara></entry>\r
+<entry>\r
+<simpara>\r
+setup JTAG frequency\r
+</simpara>\r
+</entry>\r
+</row>\r
+<row>\r
+<entry><simpara>\r
+<emphasis role="strong">get</emphasis>\r
+</simpara></entry>\r
+<entry>\r
+<simpara>\r
+get external signal value\r
+</simpara>\r
+</entry>\r
+</row>\r
+<row>\r
+<entry><simpara>\r
+<emphasis role="strong">help</emphasis>\r
+</simpara></entry>\r
+<entry>\r
+<simpara>\r
+display this help\r
+</simpara>\r
+</entry>\r
+</row>\r
+<row>\r
+<entry><simpara>\r
+<emphasis role="strong">include</emphasis>\r
+</simpara></entry>\r
+<entry>\r
+<simpara>\r
+include command sequence from external file\r
+</simpara>\r
+</entry>\r
+</row>\r
+<row>\r
+<entry><simpara>\r
+<emphasis role="strong">initbus</emphasis>\r
+</simpara></entry>\r
+<entry>\r
+<simpara>\r
+initialize bus driver for active part\r
+</simpara>\r
+</entry>\r
+</row>\r
+<row>\r
+<entry><simpara>\r
+<emphasis role="strong">instruction</emphasis>\r
+</simpara></entry>\r
+<entry>\r
+<simpara>\r
+change active instruction for a part or declare new instruction\r
+</simpara>\r
+</entry>\r
+</row>\r
+<row>\r
+<entry><simpara>\r
+<emphasis role="strong">part</emphasis>\r
+</simpara></entry>\r
+<entry>\r
+<simpara>\r
+change active part for current JTAG chain\r
+</simpara>\r
+</entry>\r
+</row>\r
+<row>\r
+<entry><simpara>\r
+<emphasis role="strong">peek</emphasis>\r
+</simpara></entry>\r
+<entry>\r
+<simpara>\r
+read a single word\r
+</simpara>\r
+</entry>\r
+</row>\r
+<row>\r
+<entry><simpara>\r
+<emphasis role="strong">poke</emphasis>\r
+</simpara></entry>\r
+<entry>\r
+<simpara>\r
+write a single word\r
+</simpara>\r
+</entry>\r
+</row>\r
+<row>\r
+<entry><simpara>\r
+<emphasis role="strong">print</emphasis>\r
+</simpara></entry>\r
+<entry>\r
+<simpara>\r
+display JTAG chain list/status\r
+</simpara>\r
+</entry>\r
+</row>\r
+<row>\r
+<entry><simpara>\r
+<emphasis role="strong">quit</emphasis>\r
+</simpara></entry>\r
+<entry>\r
+<simpara>\r
+exit and terminate this session\r
+</simpara>\r
+</entry>\r
+</row>\r
+<row>\r
+<entry><simpara>\r
+<emphasis role="strong">readmem</emphasis>\r
+</simpara></entry>\r
+<entry>\r
+<simpara>\r
+read content of the memory and write it to file\r
+</simpara>\r
+</entry>\r
+</row>\r
+<row>\r
+<entry><simpara>\r
+<emphasis role="strong">register</emphasis>\r
+</simpara></entry>\r
+<entry>\r
+<simpara>\r
+define new data register for a part\r
+</simpara>\r
+</entry>\r
+</row>\r
+<row>\r
+<entry><simpara>\r
+<emphasis role="strong">scan</emphasis>\r
+</simpara></entry>\r
+<entry>\r
+<simpara>\r
+detect changes on input pins of current part\r
+</simpara>\r
+</entry>\r
+</row>\r
+<row>\r
+<entry><simpara>\r
+<emphasis role="strong">set</emphasis>\r
+</simpara></entry>\r
+<entry>\r
+<simpara>\r
+set external signal value\r
+</simpara>\r
+</entry>\r
+</row>\r
+<row>\r
+<entry><simpara>\r
+<emphasis role="strong">shift</emphasis>\r
+</simpara></entry>\r
+<entry>\r
+<simpara>\r
+shift data/instruction registers through JTAG chain\r
+</simpara>\r
+</entry>\r
+</row>\r
+<row>\r
+<entry><simpara>\r
+<emphasis role="strong">signal</emphasis>\r
+</simpara></entry>\r
+<entry>\r
+<simpara>\r
+define new signal for a part\r
+</simpara>\r
+</entry>\r
+</row>\r
+<row>\r
+<entry><simpara>\r
+<emphasis role="strong">svf</emphasis>\r
+</simpara></entry>\r
+<entry>\r
+<simpara>\r
+execute svf commands from file\r
+</simpara>\r
+</entry>\r
+</row>\r
+<row>\r
+<entry><simpara>\r
+<emphasis role="strong">writemem</emphasis>\r
+</simpara></entry>\r
+<entry>\r
+<simpara>\r
+write content from file to memory\r
+</simpara>\r
+</entry>\r
+</row>\r
+</tbody></tgroup></informaltable>\r
+<simpara>Some tools derived from the same openwince JTAG Tools code base as UrJTAG\r
+know additional commands, which are not supported in UrJTAG. See the section\r
+about "Unsupported commands", below, about workarounds.</simpara>\r
+\r
+</section>\r
+<section id="_basic_commands">\r
+<title>Basic commands</title>\r
+<section id="_quit">\r
+<title>quit</title>\r
+<simpara>This command closes the jtag console.</simpara>\r
+\r
+</section>\r
+<section id="_help">\r
+<title>help</title>\r
+<simpara>Without additional parameter it gives an overview of the available commands.\r
+With a parameter you can get more information about any of the commands.\r
+Example:</simpara>\r
+\r
+<literallayout class="monospaced">jtag> help cable</literallayout>\r
+<simpara>Most cable drivers require some more details about the cable to start properly.\r
+To learn about the details, use the "cable" command with the name of the cable\r
+followed by the word "help". Example:</simpara>\r
+\r
+<literallayout class="monospaced">jtag> cable wiggler help</literallayout>\r
+</section>\r
+<section id="_include">\r
+<title>include</title>\r
+<simpara>Run commands from a named script file installed with UrJTAG or applies a BSDL\r
+file to the active part. The directory prefix is added automatically\r
+(e.g. /usr/share/urjtag/, depending on your installation), unless the file\r
+name starts with a dot or slash.</simpara>\r
+\r
+<simpara>For example, the following startup sequence configures the cable, chain, and\r
+loads definitions and bus driver for a Samsung S3C4510B CPU to peek its memory\r
+at 0x0:</simpara>\r
+\r
+<literallayout class="monospaced">jtag> cable wiggler ppdev /dev/parport0\r
+jtag> detect\r
+jtag> include samsung/s3c4510b/s3c4510b\r
+jtag> peek 0x0000</literallayout>\r
+<simpara>If the file contains valid BSDL syntax, it will be converted to native\r
+commands on the fly.</simpara>\r
+\r
+<simpara>Optionally, a number X may be specified following the file name, to cause\r
+an X times repetition of the command sequence from the file.</simpara>\r
+\r
+</section>\r
+</section>\r
+<section id="_chain_management">\r
+<title>Chain management</title>\r
+<section id="_cable">\r
+<title>cable</title>\r
+<simpara>Sets and initialized the cable driver. This is usually the first command that\r
+you are executing in a session. Example:</simpara>\r
+\r
+<literallayout class="monospaced">jtag> cable EA253 parallel 0x378\r
+Initializing ETC EA253 JTAG Cable on parallel port at 0x378</literallayout>\r
+<simpara>For a parallel cable using the ppdev driver you would use this:</simpara>\r
+\r
+<literallayout class="monospaced">jtag> cable DLC5 ppdev /dev/parport0</literallayout>\r
+<simpara>If you get an error, it may be that the parallel port kernel driver\r
+was compiled as a module in your Linux kernel and wasn't loaded automatically.\r
+Then you should try to load the ppdev driver manually (with root rights outside\r
+the jtag shell):</simpara>\r
+\r
+<literallayout class="monospaced">modprobe ppdev\r
+modprobe parport\r
+modprobe parport_pc</literallayout>\r
+<simpara>UrJTAG now also supports some USB cables. Unfortunately, there is no standard\r
+for "JTAG over USB", so this support is limited to a few selected cables only.\r
+For cables based on the FT2232 chip from FTDI, the cable command has to be\r
+given cable name and optionally the driver name, USB Vendor, and Product ID of\r
+the cable:</simpara>\r
+\r
+<literallayout class="monospaced">jtag> cable ARM-USB-OCD vid=15ba pid=0003 driver=ftdi-mpsse</literallayout>\r
+<simpara>For all known cables, UrJTAG knows the VID and PID so you can just say</simpara>\r
+\r
+<literallayout class="monospaced">jtag> cable ARM-USB-OCD</literallayout>\r
+<simpara>If your cable isn't detected automatically though it's listed as a known and\r
+supported cable, feel free to report its VID and PID. It might be a different\r
+revision and should be added to the known & tested list of cables.</simpara>\r
+\r
+<simpara>As stated above, the driver name is not mandatory for the cable\r
+command. UrJTAG will select the driver automatically based on UrJTAG's\r
+configuration. In case your system provides just one of libftdi or FTD2XX\r
+the respective driver is selected. If both libraries are available, then\r
+FTD2XX is selected. That's simply because FTD2XX showed some performance\r
+advantages over libftdi in the past. You can still force libftdi with the\r
+respective parameter.</simpara>\r
+\r
+<warning><simpara>There's one quirk to consider when using FTDI's FTD2XX driver. It\r
+connects to any known FTDI chip, randomly. I.e. if there's more than one FTDI\r
+device connected to the host, chances are that the driver connects to the\r
+wrong USB device. This might be an OEM USB-serial converter and you'll be\r
+banging your head why there's no proper reading from the JTAG chain. Therefore\r
+it's strongly recommended to specify the desc=xxx parameter for the cable\r
+command if the ftd2xx driver is to be used. Set xxx to the product or serial\r
+number descriptor string that are exhibited by the USB device.</simpara></warning>\r
+</section>\r
+<section id="_detect">\r
+<title>detect</title>\r
+<simpara>Detects devices on the chain. Example:</simpara>\r
+\r
+<literallayout class="monospaced">jtag> detect\r
+IR length: 5\r
+Chain length: 1\r
+Device Id: 01011001001001100100000000010011\r
+ Manufacturer: Intel\r
+ Part: PXA250\r
+ Stepping: C0\r
+ Filename: /usr/local/share/jtag/intel/pxa250/pxa250c0</literallayout>\r
+<simpara>During "detect", UrJTAG searches through the files in its database (usually in\r
+/usr/share/urjtag) and optionally in the search path for BSDL files (see bsdl\r
+command) to find a match for the manufacturer, revision and part number for the\r
+IDCODE read from the part. However, not all parts identify themselves in a way\r
+that is useful for "detect". For example, many chips with an ARM processor core\r
+inside present an IDCODE that may be specific to the the particular core inside\r
+the chip (e.g. ARM7TDMI), but doesn't tell about the actual manufacturer of\r
+the chip. In such case, the data for the part has to be included manually. See\r
+also the documentation for the "include" command.</simpara>\r
+\r
+</section>\r
+<section id="_print">\r
+<title>print</title>\r
+<simpara>Print a list of parts in the chain and the currently active instruction per part.\r
+Further details of bus, signals and instructions can be obtained with dedicated\r
+command options, see "help print".</simpara>\r
+\r
+</section>\r
+<section id="_initbus">\r
+<title>initbus</title>\r
+<simpara>Selects and initializes a bus of the currently selected part, e.g. the external\r
+memory bus of a CPU. This is required in order to access chips that aren't\r
+connected in the JTAG chain, but indirectly accessible through other chips\r
+(e.g. CPU or programmable logic).</simpara>\r
+\r
+<simpara>Type "help initbus" to get a list of supported bus types.\r
+If you do not find a bus driver for your specific hardware, you might be lucky\r
+enough to have EJTAG in your target (most MIPS-based CPUs do) and should try\r
+the "ejtag" bus driver. In contrast to the method "via BSR", it uploads some\r
+instructions to the CPU and triggers their execution to access the bus, and\r
+should work with almost any EJTAG-capable chip (Note: JTAG isn't EJTAG):</simpara>\r
+\r
+<literallayout class="monospaced">jtag> initbus ejtag</literallayout>\r
+<simpara>There's another option to support new chips "via BSR", the "prototype" bus\r
+driver, which can be adapted to support your part with command parameters.\r
+The only prerequisite for using this driver is knowledge of the names of the\r
+signals that represent address bus, data bus, and enable signals, and that\r
+address and data lines are numbered in order.</simpara>\r
+\r
+<simpara>For example, assume the signals are named in the BSDL description as follows:</simpara>\r
+\r
+<itemizedlist>\r
+<listitem>\r
+<simpara>\r
+Data bus: D0, D1, … D31\r
+</simpara>\r
+</listitem>\r
+<listitem>\r
+<simpara>\r
+Address bus: ADDR0, ADDR1, … ADDR22\r
+</simpara>\r
+</listitem>\r
+<listitem>\r
+<simpara>\r
+Output Enable: nOE\r
+</simpara>\r
+</listitem>\r
+<listitem>\r
+<simpara>\r
+Write Enable: nWE\r
+</simpara>\r
+</listitem>\r
+<listitem>\r
+<simpara>\r
+Chip Select: nRCS0\r
+</simpara>\r
+</listitem>\r
+</itemizedlist>\r
+<simpara>The enable signals seem to be active low (indicated by the leading "n" in their\r
+names). Further we assume the interesting connected part, some flash chip, is\r
+only 16 bits wide even though the data bus width is 32 bits. With this\r
+information, you could use the following command (all on a single line!) to\r
+access the bus:</simpara>\r
+\r
+<literallayout class="monospaced">initbus prototype amsb=ADDR22 alsb=ADDR0 dmsb=D15 dlsb=D0\r
+ ncs=nRCS0 nwe=nWE noe=nOE amode=x16</literallayout>\r
+<simpara>The "prototype" bus driver yet cannot deal with systems where address and data\r
+bus are multiplexed on the same pins. If signals aren't numbered in the right\r
+order or with gaps, you may get along by defining proper names as aliases for\r
+the actual signals, with commands like "salias ADDR12 BSCGX44".</simpara>\r
+\r
+<simpara>Most drivers work "via BSR", i.e. they directly access the pins of the device.\r
+Because it isn't possible to efficiently address only particular pins but only\r
+all at once, and data for all pins has to be transferred through JTAG for every\r
+single change, this method isn't the fastest, but usually easiest to implement\r
+and, well, sometimes it counts whether it works at all..</simpara>\r
+\r
+<simpara>The "fjmem" (FPGA JTAG memory) bus driver attempts to address this issue by\r
+moving control and observation away from BSR to a device-internal\r
+register. For sure this is only possible on FPGAs where the designer can hook\r
+additional logic to the JTAG chain. A core design plus examples for different\r
+FPGA families is available in the extra/fjmem directory. Refer to the README\r
+located there.</simpara>\r
+\r
+<simpara>Some chips don't allow direct access to their pins via BSR at all. For these,\r
+writing a new bus driver that utilizes a debug module to upload specific code\r
+to access the bus is inevitable.</simpara>\r
+\r
+</section>\r
+<section id="_bus">\r
+<title>bus</title>\r
+<simpara>It's possible to initialize more than one bus for part(s) within a chain. The\r
+"bus" command allows to select the active bus for readmem, flashmem,\r
+etc. operation.</simpara>\r
+\r
+</section>\r
+</section>\r
+<section id="_part_definition_commands">\r
+<title>Part definition commands</title>\r
+<simpara>The following commands are also used in the data files to define a device (IC)\r
+on the JTAG chain. It is not recommended to use these commands in an interactive\r
+session. Instead you should produce a device definition file out of a .bsd file\r
+using one of the supplied tools (or use the new BSDL subsystem, see below).</simpara>\r
+\r
+<informaltable tabstyle="hlabeledlist" pgwide="0" frame="none" colsep="0" rowsep="0"><tgroup cols="2"><colspec colwidth="3*"/><colspec colwidth="7*"/><tbody valign="top">\r
+<row>\r
+<entry><simpara>\r
+<emphasis role="strong">bit</emphasis>\r
+</simpara></entry>\r
+<entry>\r
+<simpara>\r
+define new BSR bit\r
+</simpara>\r
+</entry>\r
+</row>\r
+<row>\r
+<entry><simpara>\r
+<emphasis role="strong">instruction</emphasis>\r
+</simpara></entry>\r
+<entry>\r
+<simpara>\r
+change active instruction for a part or declare new instruction\r
+</simpara>\r
+</entry>\r
+</row>\r
+<row>\r
+<entry><simpara>\r
+<emphasis role="strong">register</emphasis>\r
+</simpara></entry>\r
+<entry>\r
+<simpara>\r
+define new data register for a part\r
+</simpara>\r
+</entry>\r
+</row>\r
+<row>\r
+<entry><simpara>\r
+<emphasis role="strong">signal</emphasis>\r
+</simpara></entry>\r
+<entry>\r
+<simpara>\r
+define new signal for a part\r
+</simpara>\r
+</entry>\r
+</row>\r
+</tbody></tgroup></informaltable>\r
+</section>\r
+<section id="_tap_control">\r
+<title>TAP control</title>\r
+<simpara>The following commands can be used to directly manipulate and display the state\r
+of the TAP controller(s) and registers in the chain:</simpara>\r
+\r
+<informaltable tabstyle="hlabeledlist" pgwide="0" frame="none" colsep="0" rowsep="0"><tgroup cols="2"><colspec colwidth="3*"/><colspec colwidth="7*"/><tbody valign="top">\r
+<row>\r
+<entry><simpara>\r
+<emphasis role="strong">dr</emphasis>\r
+</simpara></entry>\r
+<entry>\r
+<simpara>\r
+display or set active data register for a part\r
+</simpara>\r
+</entry>\r
+</row>\r
+<row>\r
+<entry><simpara>\r
+<emphasis role="strong">instruction</emphasis>\r
+</simpara></entry>\r
+<entry>\r
+<simpara>\r
+change active instruction for a part or declare new instruction\r
+</simpara>\r
+</entry>\r
+</row>\r
+<row>\r
+<entry><simpara>\r
+<emphasis role="strong">get</emphasis>\r
+</simpara></entry>\r
+<entry>\r
+<simpara>\r
+get external signal value\r
+</simpara>\r
+</entry>\r
+</row>\r
+<row>\r
+<entry><simpara>\r
+<emphasis role="strong">pod</emphasis>\r
+</simpara></entry>\r
+<entry>\r
+<simpara>\r
+low level direct access to POD signals like TRST; use with care\r
+</simpara>\r
+</entry>\r
+</row>\r
+<row>\r
+<entry><simpara>\r
+<emphasis role="strong">scan</emphasis>\r
+</simpara></entry>\r
+<entry>\r
+<simpara>\r
+detect changes on input pins of current part\r
+</simpara>\r
+</entry>\r
+</row>\r
+<row>\r
+<entry><simpara>\r
+<emphasis role="strong">set</emphasis>\r
+</simpara></entry>\r
+<entry>\r
+<simpara>\r
+set external signal value\r
+</simpara>\r
+</entry>\r
+</row>\r
+<row>\r
+<entry><simpara>\r
+<emphasis role="strong">shift</emphasis>\r
+</simpara></entry>\r
+<entry>\r
+<simpara>\r
+shift data/instruction registers through JTAG chain\r
+</simpara>\r
+</entry>\r
+</row>\r
+</tbody></tgroup></informaltable>\r
+</section>\r
+<section id="_ram_flash_access">\r
+<title>RAM/Flash access</title>\r
+<simpara>These commands can be used if a part in the chain has memory connected to it\r
+(or integrated). Before they can be used, a bus driver has to be selected and\r
+initialized (see initbus command).</simpara>\r
+\r
+<informaltable tabstyle="hlabeledlist" pgwide="0" frame="none" colsep="0" rowsep="0"><tgroup cols="2"><colspec colwidth="3*"/><colspec colwidth="7*"/><tbody valign="top">\r
+<row>\r
+<entry><simpara>\r
+<emphasis role="strong">detectflash</emphasis>\r
+</simpara></entry>\r
+<entry>\r
+<simpara>\r
+detect parameters of flash chips attached to a part\r
+</simpara>\r
+</entry>\r
+</row>\r
+<row>\r
+<entry><simpara>\r
+<emphasis role="strong">endian</emphasis>\r
+</simpara></entry>\r
+<entry>\r
+<simpara>\r
+set/print endianess for reading/writing binary files\r
+</simpara>\r
+</entry>\r
+</row>\r
+<row>\r
+<entry><simpara>\r
+<emphasis role="strong">eraseflash</emphasis>\r
+</simpara></entry>\r
+<entry>\r
+<simpara>\r
+erase flash memory by number of blocks\r
+</simpara>\r
+</entry>\r
+</row>\r
+<row>\r
+<entry><simpara>\r
+<emphasis role="strong">flashmem</emphasis>\r
+</simpara></entry>\r
+<entry>\r
+<simpara>\r
+burn flash memory with data from a file\r
+</simpara>\r
+</entry>\r
+</row>\r
+<row>\r
+<entry><simpara>\r
+<emphasis role="strong">peek</emphasis>\r
+</simpara></entry>\r
+<entry>\r
+<simpara>\r
+read a single word\r
+</simpara>\r
+</entry>\r
+</row>\r
+<row>\r
+<entry><simpara>\r
+<emphasis role="strong">poke</emphasis>\r
+</simpara></entry>\r
+<entry>\r
+<simpara>\r
+write a single word\r
+</simpara>\r
+</entry>\r
+</row>\r
+<row>\r
+<entry><simpara>\r
+<emphasis role="strong">readmem</emphasis>\r
+</simpara></entry>\r
+<entry>\r
+<simpara>\r
+read content of the memory and write it to file\r
+</simpara>\r
+</entry>\r
+</row>\r
+<row>\r
+<entry><simpara>\r
+<emphasis role="strong">writemem</emphasis>\r
+</simpara></entry>\r
+<entry>\r
+<simpara>\r
+write content from file to memory\r
+</simpara>\r
+</entry>\r
+</row>\r
+</tbody></tgroup></informaltable>\r
+</section>\r
+<section id="_highlevel_commands">\r
+<title>Highlevel commands</title>\r
+<section id="_svf">\r
+<title>svf</title>\r
+<simpara>The SVF player operates on a single part in the scan chain. Therefore, you\r
+have to bring up the jtag software, specify a cable and detect the scan\r
+chain beforehand.</simpara>\r
+\r
+<simpara>The player will establish a new instruction called "SIR" and a new register\r
+called "SDR". They are used internally by the respective SVF commands and are\r
+reassigned with new values as the player advances through the file. It is not\r
+recommended to use them outside of the SVF player as their content is dynamic.</simpara>\r
+\r
+<simpara>An example session:</simpara>\r
+\r
+<literallayout class="monospaced">jtag> cable ppdev /dev/parport0 DLC5\r
+Initializing Xilinx DLC5 JTAG Parallel Cable III on ppdev port /dev/parport0\r
+jtag> detect\r
+IR length: 5\r
+Chain length: 1\r
+Device Id: 10010000101000100000000010010011\r
+ Manufacturer: Xilinx\r
+ Part: XC2S300E-PQ208\r
+ Stepping: 9\r
+ Filename: /usr/local/share/jtag/xilinx/xc2s300e-pq208/xc2s300e-pq208\r
+jtag> part <desired part of the scan chain>\r
+jtag> svf <SVF file for selected part>\r
+jtag> instruction BYPASS\r
+jtag> shift ir\r
+jtag> part <next part>\r
+jtag> svf <SVF file for selected part>\r
+jtag> instruction BYPASS\r
+jtag> shift ir</literallayout>\r
+<simpara>It is recommended to set the part's instruction register to BYPASS although\r
+most SVF files do this at the end. By setting the instruction explicitely to\r
+BYPASS the output of the print command will always show meaningful\r
+information.</simpara>\r
+\r
+<simpara>The SVF player will issue messages when situations arise that cannot be\r
+handled. These messages are classified as warnings or errors depending on\r
+whether the player can continue operation (warning) or not (error).\r
+In case the TDO parameter of an SDR command leads to a mismatch the player\r
+issues a warning and continues. If the player should abort in this case then\r
+specify <emphasis>stop</emphasis> at the svf command.</simpara>\r
+\r
+<simpara>The absence of error or warning messages indicate that the SVF file was\r
+executed without problems. To get a progress reporting while the player advances\r
+through the SVF file, specify <emphasis>progress</emphasis> at the svf command.</simpara>\r
+\r
+<sidebar>\r
+<title>Limitations and Deficiencies</title>\r
+<simpara>Several limitations exist for the SVF player.</simpara>\r
+\r
+<simpara>It has been tested so far with files generated by these tools:</simpara>\r
+\r
+<itemizedlist>\r
+<listitem>\r
+<simpara>\r
+Xilinx ISE WebPack 6.3.02i - 9.1.02i\r
+</simpara>\r
+</listitem>\r
+<listitem>\r
+<simpara>\r
+Altera Quartus II 4.1sp1 - 7.0\r
+</simpara>\r
+</listitem>\r
+</itemizedlist>\r
+<simpara>Configuration for these devices has been tested so far:</simpara>\r
+\r
+<itemizedlist>\r
+<listitem>\r
+<simpara>\r
+Altera EPC1C12Q240\r
+</simpara>\r
+</listitem>\r
+<listitem>\r
+<simpara>\r
+Altera MAX3032, EPM3032ALC44\r
+</simpara>\r
+</listitem>\r
+<listitem>\r
+<simpara>\r
+Altera MAX3064, EPM3064ALC44\r
+</simpara>\r
+</listitem>\r
+<listitem>\r
+<simpara>\r
+Altera MAX7032, EPM7032SLC44\r
+</simpara>\r
+</listitem>\r
+<listitem>\r
+<simpara>\r
+Altera MAX7064, EPM7064SLC44, EPM7064STC44\r
+</simpara>\r
+</listitem>\r
+<listitem>\r
+<simpara>\r
+Xilinx Spartan-IIE, XC2S300E-PQ208\r
+</simpara>\r
+</listitem>\r
+<listitem>\r
+<simpara>\r
+Xilinx Spartan-3, XC3S1000-FG456, XC3S5000-FG900\r
+</simpara>\r
+</listitem>\r
+</itemizedlist>\r
+<simpara>The implementation of some SVF commands has deficiencies.</simpara>\r
+\r
+<itemizedlist>\r
+<listitem>\r
+<simpara>\r
+HIR, HDR commands not supported.\r
+ Their functionality should be covered by the part concept of JTAG Tools.\r
+</simpara>\r
+</listitem>\r
+<listitem>\r
+<simpara>\r
+PIO command not supported.\r
+</simpara>\r
+</listitem>\r
+<listitem>\r
+<simpara>\r
+PIOMAP command not supported.\r
+</simpara>\r
+</listitem>\r
+<listitem>\r
+<simpara>\r
+RUNTEST SCK not supported.\r
+ The maximum time constraint is not guaranteed.\r
+</simpara>\r
+</listitem>\r
+<listitem>\r
+<simpara>\r
+TRST\r
+ Parameters Z and ABSENT are not supported.\r
+</simpara>\r
+</listitem>\r
+<listitem>\r
+<simpara>\r
+TIR, TDR commands not supported.\r
+ Their functionality should be covered by the part concept of JTAG Tools.\r
+</simpara>\r
+</listitem>\r
+</itemizedlist>\r
+<simpara>SVF files for programming flash-based devices might or might not work for a given\r
+setup. This has been observed for Actel IGLOO devices where success and failure\r
+depends on the actual clocking rate of the chosen cable.</simpara>\r
+\r
+<simpara>The ref_freq=<…> option to the svf command allows to tweak the calculation\r
+of <emphasis>RUNTEST xxx SEC</emphasis> commands. For these commands, the SVF player needs to\r
+calculate the equivalent number of clocks and per default it will use the\r
+current cable clock frequency. This can be overridden with the ref_freq option\r
+that specifies a fixed reference frequency for such calculations.</simpara>\r
+\r
+</sidebar>\r
+</section>\r
+<section id="_bsdl">\r
+<title>bsdl</title>\r
+<simpara>The <emphasis>bsdl</emphasis> command is used to set up and test the underlying BSDL subsystem of\r
+UrJTAG.</simpara>\r
+\r
+<simpara>Whenever <emphasis>detect</emphasis> encounters a new part, a configuration process is\r
+started. This involves matching the retrieved IDCODE against the part\r
+descriptions in /usr/share/urjtag as described above. However, before this\r
+database is searched for a suitable description, the BSDL subsystem is started\r
+and searches for BSDL file that matches this device. If it finds a matching\r
+file, traversal of the /usr/share/urjtag database is skipped. If not, then\r
+this standard process follows.</simpara>\r
+\r
+<simpara>To tell the BSDL subsytem where to look for BSDL files, the <emphasis>bsdl path\r
+pathlist</emphasis> command has to be issued prior to <emphasis>detect</emphasis>. The contents of\r
+<emphasis>pathlist</emphasis> must be a semicolon-separated list of directories where BSDL files\r
+are located. This list is stored by <emphasis>bsdl path</emphasis> and is used lateron when\r
+<emphasis>detect</emphasis> calls the BSDL subsystem.</simpara>\r
+\r
+<important><simpara>The BSDL subsystem applies the first BSDL file that parses without\r
+errors and that contains the correct IDCODE. Scanning the specified\r
+directories happens in exactly the given order. Inside a directory however,\r
+the order depends largely on your filesystem's behavior.</simpara></important>\r
+<simpara>Further details of the <emphasis>bsdl</emphasis> command:</simpara>\r
+\r
+<itemizedlist>\r
+<listitem>\r
+<simpara>\r
+bsdl path <path1>[;<path2>[;<pathN>]]\r
+ set paths for locating BSDL files\r
+</simpara>\r
+</listitem>\r
+<listitem>\r
+<simpara>\r
+bsdl debug on|off\r
+ switches debug messages on or off\r
+</simpara>\r
+</listitem>\r
+<listitem>\r
+<simpara>\r
+bsdl test [file]\r
+ reads file (if specified) or all files found via <emphasis>bsdl path</emphasis> and\r
+ prints a short status, an active part is not required\r
+</simpara>\r
+</listitem>\r
+<listitem>\r
+<simpara>\r
+bsdl dump [file]\r
+ reads file (if specified) or all files found via <emphasis>bsdl path</emphasis> and\r
+ prints all configuration commands, an active part is not required\r
+</simpara>\r
+</listitem>\r
+</itemizedlist>\r
+<tip><simpara>The <emphasis>bsdl dump file</emphasis> command implements the same functionality as\r
+bsdl2jtag.</simpara></tip>\r
+</section>\r
+</section>\r
+<section id="_unsupported_commands">\r
+<title>Unsupported commands</title>\r
+<section id="_script">\r
+<title>script</title>\r
+<simpara>Although it's still there, its functionality has been merged into the include\r
+command. Please use "include" instead.</simpara>\r
+\r
+</section>\r
+<section id="_setdevice">\r
+<title>setdevice</title>\r
+<simpara>This command was only there to support the SHARC 21065L processor,\r
+which has no IDCODE and therefore can't be initialized correctly by\r
+just running "detect". However, the proper initialization can be done\r
+after "detect" by loading the proper declarations and bus driver manually:</simpara>\r
+\r
+<literallayout class="monospaced">jtag> include analog/sharc21065l/sharc21065l</literallayout>\r
+</section>\r
+<section id="_spiflashmem">\r
+<title>spiflashmem</title>\r
+<simpara>The commands "spidetectflash", "spiflashmem", "spireadflash" and\r
+"spieraseflash" only exist in a version of the JTAG tools copyrighted by\r
+Intratrade Ltd., we just know about them from a posting on the net.</simpara>\r
+\r
+</section>\r
+</section>\r
+</section>\r
+</chapter>\r
+<chapter id="_internals">\r
+<title>Internals</title>\r
+<simpara>This section yet is only a placeholder for the information that will\r
+be added soon…</simpara>\r
+\r
+<section id="_files">\r
+<title>Files</title>\r
+<section id="_source_code_overview">\r
+<title>Source code Overview</title>\r
+<informaltable tabstyle="hlabeledlist" pgwide="0" frame="none" colsep="0" rowsep="0"><tgroup cols="2"><colspec colwidth="3*"/><colspec colwidth="7*"/><tbody valign="top">\r
+<row>\r
+<entry><simpara>\r
+doc/\r
+</simpara></entry>\r
+<entry>\r
+<simpara>\r
+Documentation\r
+</simpara>\r
+</entry>\r
+</row>\r
+<row>\r
+<entry><simpara>\r
+data/\r
+</simpara></entry>\r
+<entry>\r
+<simpara>\r
+Part descriptions (Data files)\r
+</simpara>\r
+</entry>\r
+</row>\r
+<row>\r
+<entry><simpara>\r
+include/\r
+</simpara></entry>\r
+<entry>\r
+<simpara>\r
+C header files\r
+</simpara>\r
+</entry>\r
+</row>\r
+<row>\r
+<entry><simpara>\r
+src/\r
+</simpara></entry>\r
+<entry>\r
+<simpara>\r
+C source code\r
+</simpara>\r
+</entry>\r
+</row>\r
+<row>\r
+<entry><simpara>\r
+src/bsdl\r
+</simpara></entry>\r
+<entry>\r
+<simpara>\r
+BSDL subsystem\r
+</simpara>\r
+</entry>\r
+</row>\r
+<row>\r
+<entry><simpara>\r
+src/bus\r
+</simpara></entry>\r
+<entry>\r
+<simpara>\r
+Bus driver for various CPUs and other parts\r
+</simpara>\r
+</entry>\r
+</row>\r
+<row>\r
+<entry><simpara>\r
+src/cmd\r
+</simpara></entry>\r
+<entry>\r
+<simpara>\r
+Implementation of the commands for the "jtag" shell\r
+</simpara>\r
+</entry>\r
+</row>\r
+<row>\r
+<entry><simpara>\r
+src/flash\r
+</simpara></entry>\r
+<entry>\r
+<simpara>\r
+Flash detection and programming algorithms\r
+</simpara>\r
+</entry>\r
+</row>\r
+<row>\r
+<entry><simpara>\r
+src/jim\r
+</simpara></entry>\r
+<entry>\r
+<simpara>\r
+JIM, the JTAG target simulator\r
+</simpara>\r
+</entry>\r
+</row>\r
+<row>\r
+<entry><simpara>\r
+src/lib\r
+</simpara></entry>\r
+<entry>\r
+<simpara>\r
+Utility functions\r
+</simpara>\r
+</entry>\r
+</row>\r
+<row>\r
+<entry><simpara>\r
+src/part\r
+</simpara></entry>\r
+<entry>\r
+<simpara>\r
+Functions for accessing specific parts in a chain\r
+</simpara>\r
+</entry>\r
+</row>\r
+<row>\r
+<entry><simpara>\r
+src/svf\r
+</simpara></entry>\r
+<entry>\r
+<simpara>\r
+SVF player\r
+</simpara>\r
+</entry>\r
+</row>\r
+<row>\r
+<entry><simpara>\r
+src/tap\r
+</simpara></entry>\r
+<entry>\r
+<simpara>\r
+Functions for accessing the chain in general\r
+</simpara>\r
+</entry>\r
+</row>\r
+</tbody></tgroup></informaltable>\r
+</section>\r
+</section>\r
+<section id="_drivers">\r
+<title>Drivers</title>\r
+<itemizedlist>\r
+<listitem>\r
+<simpara>\r
+Cable drivers\r
+</simpara>\r
+</listitem>\r
+<listitem>\r
+<simpara>\r
+Link drivers\r
+</simpara>\r
+</listitem>\r
+<listitem>\r
+<simpara>\r
+TAP drivers\r
+</simpara>\r
+</listitem>\r
+<listitem>\r
+<simpara>\r
+Chain drivers\r
+</simpara>\r
+</listitem>\r
+<listitem>\r
+<simpara>\r
+Bus drivers\r
+</simpara>\r
+</listitem>\r
+<listitem>\r
+<simpara>\r
+Flash drivers\r
+</simpara>\r
+</listitem>\r
+<listitem>\r
+<simpara>\r
+Commands\r
+</simpara>\r
+</listitem>\r
+</itemizedlist>\r
+<section id="_cable_specific_drivers_src_tap_cable">\r
+<title>Cable-specific drivers (src/tap/cable)</title>\r
+<simpara>Cable-specific drivers are those which are visible to the user through\r
+the "jtag" command shell. They're listed in response to the "help cable"\r
+command. Each driver has to provide the following functions:</simpara>\r
+\r
+<itemizedlist>\r
+<listitem>\r
+<simpara>\r
+connect(), init() - Initialization\r
+</simpara>\r
+</listitem>\r
+<listitem>\r
+<simpara>\r
+done(), cable_free(), disconnect() - Cleaning up\r
+</simpara>\r
+</listitem>\r
+<listitem>\r
+<simpara>\r
+set_frequency() - set bitrate for shifting data through the chain\r
+</simpara>\r
+</listitem>\r
+<listitem>\r
+<simpara>\r
+clock(), get_tdo(), transfer() - immediate JTAG activities\r
+</simpara>\r
+</listitem>\r
+<listitem>\r
+<simpara>\r
+flush() - internally used to actually perform JTAG activities\r
+</simpara>\r
+</listitem>\r
+<listitem>\r
+<simpara>\r
+help() - a help text to be displayed by the jtag command shell\r
+</simpara>\r
+</listitem>\r
+</itemizedlist>\r
+<section id="_initialization">\r
+<title>Initialization</title>\r
+<simpara>After allocating a "cable_t" structure, a pointer to it and further\r
+parameters (as strings) have to be passed first to the selected cable's\r
+connect() function.</simpara>\r
+\r
+<simpara>Following that, the init() function is called via cable_init(). If cable_init()\r
+returns a zero value, all is fine and the cable is ready for use.</simpara>\r
+\r
+</section>\r
+<section id="_cleaning_up">\r
+<title>Cleaning up</title>\r
+<simpara>There are two functions for actual cleanup:</simpara>\r
+\r
+<itemizedlist>\r
+<listitem>\r
+<simpara>\r
+done() is responsible for driving the hardware to a safe and consistent state.\r
+</simpara>\r
+</listitem>\r
+<listitem>\r
+<simpara>\r
+cable_free() then can be used to clean up eventually extra allocated memory etc.\r
+</simpara>\r
+</listitem>\r
+</itemizedlist>\r
+<simpara>Both are usually called from chain_disconnect().</simpara>\r
+\r
+<simpara>An additional mechanism allows to clean up if a disconnection was detected by\r
+the low level driver (e.g. USB or parallel port driver). A cable has to provide\r
+a disconnect() function for this purpose:</simpara>\r
+\r
+<orderedlist>\r
+<listitem>\r
+<simpara>\r
+Low level (e.g. parport) driver calls cable driver->disconnect()\r
+</simpara>\r
+</listitem>\r
+<listitem>\r
+<simpara>\r
+cable driver->disconnect() calls chain_disconnect()\r
+</simpara>\r
+</listitem>\r
+<listitem>\r
+<simpara>\r
+chain_disconnect() calls cable driver->done()\r
+</simpara>\r
+</listitem>\r
+<listitem>\r
+<simpara>\r
+chain_disconnect() then calls cable driver->cable_free()\r
+</simpara>\r
+</listitem>\r
+</orderedlist>\r
+<simpara>After return from chain_disconnect() to cable driver->disconnect(), the cable_t\r
+structure has been freed and must not be accessed anymore.</simpara>\r
+\r
+</section>\r
+<section id="_jtag_activities">\r
+<title>JTAG Activities</title>\r
+<simpara>Currently the API provides five different functions for performing operations\r
+at the JTAG interface on the low level signal level (using the four signals\r
+TMS, TCK, TDI, and TDO).</simpara>\r
+\r
+<itemizedlist>\r
+<listitem>\r
+<simpara>\r
+clock(tms,tdi,n) takes values for TMS and TDI output as its parameters, ensures that actual cable signals are set accordingly, and does a 0-1 transition on TCK (n times)\r
+</simpara>\r
+</listitem>\r
+<listitem>\r
+<simpara>\r
+get_tdo() returns the current value at the TDO input.\r
+</simpara>\r
+</listitem>\r
+<listitem>\r
+<simpara>\r
+set_trst(x) sets the TRST signal and returns the current value.\r
+</simpara>\r
+</listitem>\r
+<listitem>\r
+<simpara>\r
+get_trst() returns the current value of the TRST signal.\r
+</simpara>\r
+</listitem>\r
+</itemizedlist>\r
+<simpara>For many JTAG adapters, there's almost no delay when doing alternating clock()\r
+and get_tdo(). Writing and reading happens immediately and the result is\r
+available immediately as well. This is the case with most parallel port\r
+adapters (but not when attached to USB-to-parallel adapters or USB docking\r
+stations) and memory mapped IO (e.g. general purpose I/O pins of\r
+microcontrollers).</simpara>\r
+\r
+<simpara>But there are adapters, especially USB and Ethernet based adapters, which\r
+exhibit a rather long delay between the initiation of reading a bit and the\r
+delivery of the value of the bit. It is at least 1 millisecond with USB,\r
+which would limit the transfer rate to 1 kHz. One way to workaround this\r
+is to transmit bits compacted into bytes and chunks of bytes, which is\r
+possible with the transfer() function.</simpara>\r
+\r
+<itemizedlist>\r
+<listitem>\r
+<simpara>\r
+transfer(in, out)\r
+</simpara>\r
+</listitem>\r
+</itemizedlist>\r
+<simpara>The transfer() function does a series of TCK pulses, with data for TDI read as\r
+bytes from memory. The bytes are automatically serialized. TMS is set to zero\r
+during transfer()s. Optionally, prior to each bit shifted out to the interface,\r
+TDO input can be read into memory (deserialized into a byte array of the same\r
+size as the input array).</simpara>\r
+\r
+<simpara>It still doesn't yield much improvement if the operation consists of many read\r
+and write transitions (e.g. repeatedly writing an instruction and some data\r
+register values, then reading from the data register, as it is necessary for\r
+memory access). For that reason, the above functions are also available in\r
+variants that don't cause immediate activity, but rather schedule it for later.\r
+In the API, they're visible as</simpara>\r
+\r
+<itemizedlist>\r
+<listitem>\r
+<simpara>\r
+cable_defer_clock()\r
+</simpara>\r
+</listitem>\r
+<listitem>\r
+<simpara>\r
+cable_defer_get_tdo()\r
+</simpara>\r
+</listitem>\r
+<listitem>\r
+<simpara>\r
+cable_defer_set_trst()\r
+</simpara>\r
+</listitem>\r
+<listitem>\r
+<simpara>\r
+cable_defer_get_trst()\r
+</simpara>\r
+</listitem>\r
+<listitem>\r
+<simpara>\r
+cable_defer_transfer()\r
+</simpara>\r
+</listitem>\r
+</itemizedlist>\r
+<simpara>These functions aren't implemented in the cable driver (but currently in\r
+src/tap/cable.c). The cable driver just has to provide a flush() function to\r
+actually execute the queued activity in some cable-specific optimal way, and\r
+to store the results of get_tdo() and transfer() activity. The caller later\r
+can pick up the results using these functions (implemented in cable.c):</simpara>\r
+\r
+<itemizedlist>\r
+<listitem>\r
+<simpara>\r
+cable_get_tdo_late()\r
+</simpara>\r
+</listitem>\r
+<listitem>\r
+<simpara>\r
+cable_get_trst_late()\r
+</simpara>\r
+</listitem>\r
+<listitem>\r
+<simpara>\r
+cable_transfer_late()\r
+</simpara>\r
+</listitem>\r
+</itemizedlist>\r
+<simpara>As an example, consider the following sequence of activities:</simpara>\r
+\r
+<orderedlist>\r
+<listitem>\r
+<simpara>\r
+clock()\r
+</simpara>\r
+</listitem>\r
+<listitem>\r
+<simpara>\r
+get_tdo()\r
+</simpara>\r
+</listitem>\r
+<listitem>\r
+<simpara>\r
+clock()\r
+</simpara>\r
+</listitem>\r
+<listitem>\r
+<simpara>\r
+get_tdo()\r
+</simpara>\r
+</listitem>\r
+</orderedlist>\r
+<simpara>If the result of the first get_tdo() isn't absolutely required before the\r
+second clock(), the sequence can be optimized into the following sequence (if</simpara>\r
+\r
+<orderedlist>\r
+<listitem>\r
+<simpara>\r
+defer_clock()\r
+</simpara>\r
+</listitem>\r
+<listitem>\r
+<simpara>\r
+defer_clock()\r
+</simpara>\r
+</listitem>\r
+<listitem>\r
+<simpara>\r
+flush()\r
+</simpara>\r
+</listitem>\r
+<listitem>\r
+<simpara>\r
+get_tdo_late()\r
+</simpara>\r
+</listitem>\r
+<listitem>\r
+<simpara>\r
+get_tdo_late()\r
+</simpara>\r
+</listitem>\r
+</orderedlist>\r
+<simpara>The next sections explain the queueing mechanism and its limits in detail.</simpara>\r
+\r
+</section>\r
+<section id="_when_flushing_occurs">\r
+<title>When flushing occurs</title>\r
+<simpara>The cable_flush() function is used to flush the queue towards the cable. It\r
+takes one additional argument, "how_much", which may be one of</simpara>\r
+\r
+<itemizedlist>\r
+<listitem>\r
+<simpara>\r
+OPTIONALLY: The cable driver may flush if it's reasonable (e.g. if the\r
+ queue has been filled so that some buffer limit for the cable interface\r
+ is reached). It would be wise to flush early to keep the queue small, if\r
+ there is no point in queueing up more items because the transfer to the\r
+ cable would have to be split into smaller chunks anyway. This is used by\r
+ UrJTAG immediately after adding items to the queue.\r
+</simpara>\r
+</listitem>\r
+<listitem>\r
+<simpara>\r
+TO_OUTPUT: The cable driver should at least flush as much so that one\r
+ output becomes available in the output queue. If there's already something\r
+ in the output queue, this should be interpreted similar to OPTIONALLY. This\r
+ is used by UrJTAG immediately before it wants to use that output.\r
+</simpara>\r
+</listitem>\r
+<listitem>\r
+<simpara>\r
+COMPLETELY: The cable driver has to flush the queue completely. This is\r
+ used by UrJTAG immediately before actions that circumvent the queueing\r
+ such as calls to the legacy clock/get_tdo functions. It could also be\r
+ used by application code to ensure that some action is actually done in\r
+ time.\r
+</simpara>\r
+</listitem>\r
+</itemizedlist>\r
+</section>\r
+<section id="_jtag_activity_queueing">\r
+<title>JTAG activity queueing</title>\r
+<simpara>The source in src/tap/cable.c provides to important functions to access the\r
+two queues "todo" (with activity to be done) and "done" (with results):</simpara>\r
+\r
+<itemizedlist>\r
+<listitem>\r
+<simpara>\r
+cable_add_queue_item\r
+</simpara>\r
+</listitem>\r
+<listitem>\r
+<simpara>\r
+cable_get_queue_item\r
+</simpara>\r
+</listitem>\r
+</itemizedlist>\r
+<simpara>In src/tap/cable/generic.c you'll find two implementations of dequeueing\r
+algorithms, i.e. implementations of the flush() function. These could be used\r
+by any new cable driver unless it provides a more sophisticated algorithm\r
+itself:</simpara>\r
+\r
+<itemizedlist>\r
+<listitem>\r
+<simpara>\r
+generic_flush_one_by_one() simply calls the "classic" functions one after\r
+ another. The performance of the cable driver using this implementation will\r
+ be the same whether the immediate or defer variants of the functions are used.\r
+</simpara>\r
+</listitem>\r
+<listitem>\r
+<simpara>\r
+generic_flush_using_transfer() tries to optimize as many clock() and\r
+ get_tdo() by transforming them into calls to transfer() instead. This can\r
+ give a slight advantage.\r
+</simpara>\r
+</listitem>\r
+</itemizedlist>\r
+<simpara>The generic implementations also serve as a template for new cable-specific\r
+implementations.</simpara>\r
+\r
+</section>\r
+<section id="_generic_implementations">\r
+<title>Generic implementations</title>\r
+<simpara>As a reference and in many cases completely sufficient for new cables, take a\r
+look at the code in src/tap/cable/generic.c, which contains generic routines,\r
+suitable for parallel port based cables (and some for other types of cables as\r
+well).</simpara>\r
+\r
+</section>\r
+</section>\r
+<section id="_link_drivers">\r
+<title>Link drivers</title>\r
+<simpara>Link drivers like the "parport" driver collection provide the basis for\r
+communication between cable driver and actual JTAG adapter. The openwince JTAG\r
+tools supported only parallel port links with the "parport" drivers. UrJTAG\r
+introduced support for USB links, but in the early releases the drivers for\r
+these just mimic the parallel port links.</simpara>\r
+\r
+<simpara>The basic functions provided by all link drivers are</simpara>\r
+\r
+<itemizedlist>\r
+<listitem>\r
+<simpara>\r
+connect(), to called from cable driver connect()\r
+</simpara>\r
+</listitem>\r
+<listitem>\r
+<simpara>\r
+open(), to actually connect to the device during cable driver init()\r
+</simpara>\r
+</listitem>\r
+<listitem>\r
+<simpara>\r
+close(), to disconnect from the device during cable driver done()\r
+</simpara>\r
+</listitem>\r
+<listitem>\r
+<simpara>\r
+free(), to free all resources, called from cable driver free()\r
+</simpara>\r
+</listitem>\r
+</itemizedlist>\r
+<section id="_parport">\r
+<title>parport</title>\r
+<simpara>Currently there are parport drivers for direct access to the parallel port on a\r
+PC using I/O addresses (direct.c), and for using ppdev on Linux or ppi on FreeBSD.</simpara>\r
+\r
+<simpara>In addition, there are "ftdi" and "ftd2xx" parport drivers that actually are for\r
+communication with USB cables based on FTDI chips. They cannot be used for\r
+connecting old parallel port cables through parallel to USB adapters with FTDI\r
+chips, and probably soon will be rewritten as "usbconn" drivers instead.</simpara>\r
+\r
+<simpara>All parport drivers present a common API for setting and reading signals.</simpara>\r
+\r
+</section>\r
+<section id="_usbconn">\r
+<title>usbconn</title>\r
+<simpara>The usbconn drivers provide a common API to search for and connect with USB\r
+devices. At the moment, there are drivers for libusd, libftdi and FTD2XX\r
+(e.g. to communicate with FTDI chip based cables through libftdi and/or\r
+FTD2XX, to communicate with Cypress FX2 using EZUSB.SYS or CyUSB.sys, and\r
+more).</simpara>\r
+\r
+</section>\r
+</section>\r
+<section id="_bus_drivers">\r
+<title>Bus drivers</title>\r
+<simpara>Bus drivers translate read and write operations on a bus into JTAG commands\r
+and methods. A bus in this context is neither restricted to a processor bus,\r
+nor to memory. Any system component that can be read from and written to could\r
+be seen as attached to a bus. I.e. external or internal memory (RAM, ROM,\r
+Flash) and peripherals connected to a processor or simply an FPGA with 1:1\r
+connections.</simpara>\r
+\r
+<simpara>The available bus drivers are listed in response to "help initbus". Each\r
+driver has to provide the following functions:</simpara>\r
+\r
+<itemizedlist>\r
+<listitem>\r
+<simpara>\r
+bus_new() - Initialization\r
+</simpara>\r
+</listitem>\r
+<listitem>\r
+<simpara>\r
+bus_free() - Cleaning up\r
+</simpara>\r
+</listitem>\r
+<listitem>\r
+<simpara>\r
+bus_printinfo() - Short description\r
+</simpara>\r
+</listitem>\r
+<listitem>\r
+<simpara>\r
+bus_prepare() - Preparation\r
+</simpara>\r
+</listitem>\r
+<listitem>\r
+<simpara>\r
+bus_area() - Description of the bus geometry\r
+</simpara>\r
+</listitem>\r
+<listitem>\r
+<simpara>\r
+bus_read_start() - Initiate reading\r
+</simpara>\r
+</listitem>\r
+<listitem>\r
+<simpara>\r
+bus_read_next() - Read access\r
+</simpara>\r
+</listitem>\r
+<listitem>\r
+<simpara>\r
+bus_read_end() - Finish reading\r
+</simpara>\r
+</listitem>\r
+<listitem>\r
+<simpara>\r
+bus_read() - Atomic reading\r
+</simpara>\r
+</listitem>\r
+<listitem>\r
+<simpara>\r
+bus_write() - Write access\r
+</simpara>\r
+</listitem>\r
+</itemizedlist>\r
+<important><simpara>Address parameters to the functions listed above specify always\r
+byte locations, independent of the actual data width. The bus driver has to\r
+adjust the address on its own if required.</simpara></important>\r
+<section id="_creation">\r
+<title>Creation</title>\r
+<simpara>Upon calling of its bus_new() function, the driver allocates a "bus_t"\r
+structure and performs all required internal initializations.</simpara>\r
+\r
+</section>\r
+<section id="_initialization_2">\r
+<title>Initialization</title>\r
+<simpara>After creation of the new "bus_t" structure, the bus_init() function will\r
+be called to give the driver the possibility to initialize it's internal\r
+states or BSR bits as required. Such functionality has been split from\r
+bus_new() since some drivers require to re-initialize during runtime.</simpara>\r
+\r
+</section>\r
+<section id="_cleaning_up_2">\r
+<title>Cleaning up</title>\r
+<simpara>The driver is supposed to free all allocated memory (including its "bus_t"\r
+structure). Additionally, it should set the device into a state that doesn't\r
+prevent it from normal operation.</simpara>\r
+\r
+</section>\r
+<section id="_short_description">\r
+<title>Short description</title>\r
+<simpara>Prints a message describing the driver. This function is called by the "print"\r
+command before it lists the areas covered by this bus driver.</simpara>\r
+\r
+</section>\r
+<section id="_preparation">\r
+<title>Preparation</title>\r
+<simpara>This function is called whenever a bus operation is initiated. The\r
+driver should perform the required preparation steps so that\r
+subsequent calls to the bus_read_* and bus_write functions can perform\r
+their tasks properly.</simpara>\r
+\r
+<simpara>E.g. a BSR bus driver would put the device into EXTEST mode to activate the\r
+boundary scan register on the device pins.</simpara>\r
+\r
+</section>\r
+<section id="_description_of_the_bus_geometry">\r
+<title>Description of the bus geometry</title>\r
+<simpara>At certain stages, the bus driver's bus_area() function is called by other\r
+commands to query the bus geometry for a given address. The bus driver must\r
+fill in the fields of a "bus_area_t" structure describing the geometry of the\r
+area in which the specified address is located:</simpara>\r
+\r
+<itemizedlist>\r
+<listitem>\r
+<simpara>\r
+a short textual description of the area\r
+</simpara>\r
+</listitem>\r
+<listitem>\r
+<simpara>\r
+start address of area\r
+</simpara>\r
+</listitem>\r
+<listitem>\r
+<simpara>\r
+length of area in bytes\r
+</simpara>\r
+</listitem>\r
+<listitem>\r
+<simpara>\r
+data width in bits\r
+</simpara>\r
+</listitem>\r
+</itemizedlist>\r
+<simpara>Queries with an address out of range must result in an area length of</simpara>\r
+\r
+<literallayout class="monospaced">UINT64_C(0x100000000)</literallayout>\r
+</section>\r
+<section id="_initiate_reading">\r
+<title>Initiate reading</title>\r
+<simpara>Since the JTAG state machine defines a capture-shift-update sequence, it is\r
+required to shift the address for a read prior to capturing the read\r
+data. Therefore, the bus_read_start() function is called with the very first\r
+address to read from. This enables the driver to shift the address into the\r
+device before it can actually retrieve the read data for this address.</simpara>\r
+\r
+</section>\r
+<section id="_read_access">\r
+<title>Read access</title>\r
+<simpara>The bus_read_next() function fetches the read data from the device that has\r
+been addressed by a previous call to bus_read_start() or\r
+bus_read_next(). Again, this is due to the capture-shift-update sequence of\r
+JTAG:</simpara>\r
+\r
+<orderedlist>\r
+<listitem>\r
+<simpara>\r
+capture read data from device pins\r
+</simpara>\r
+</listitem>\r
+<listitem>\r
+<simpara>\r
+shift new address\r
+</simpara>\r
+</listitem>\r
+<listitem>\r
+<simpara>\r
+update new address to device pins\r
+</simpara>\r
+</listitem>\r
+</orderedlist>\r
+<important><simpara>The address parameter specifies the location of the <emphasis>following</emphasis>\r
+read access. It is not the address of the data returned by this function call.</simpara></important>\r
+</section>\r
+<section id="_finish_reading">\r
+<title>Finish reading</title>\r
+<simpara>Function "bus_read_end()" is called at the end of a read sequence. I.e. when\r
+the higher level command determines that the last data portion is to be read\r
+from the device. There is no new address and the function driver is supposed\r
+to return the read data that was addressed previously.</simpara>\r
+\r
+</section>\r
+<section id="_atomic_reading">\r
+<title>Atomic reading</title>\r
+<simpara>For ease of use, a bus driver has to supply a "bus_read()" function that\r
+encapsulates reading data from a single address in an atomic operation. Bus\r
+drivers typically build this function from "bus_read_start()" and a subsequent\r
+"bus_read_end()".</simpara>\r
+\r
+</section>\r
+<section id="_write_access">\r
+<title>Write access</title>\r
+<simpara>This function writes one data element at the specified address. Since this\r
+translates to a single JTAG operation (capture ignored, shift and update\r
+address & data), there is no splitting as with the read functions.</simpara>\r
+\r
+</section>\r
+</section>\r
+</section>\r
+<section id="_data_file_format">\r
+<title>Data file format</title>\r
+<simpara>JTAG declarations files are located in directory "data". The files contains\r
+common part specific JTAG information in parseable form, e.g. list of the JTAG\r
+commands, boundary scan register, list of JTAG registers, etc.</simpara>\r
+\r
+<simpara>Syntax of the JTAG declaration file is defined in the following subsections.</simpara>\r
+\r
+<section id="_general_rules">\r
+<title>General rules</title>\r
+<simpara>JTAG declaration file is text file which consists of lines. Empty lines are\r
+ignored. Text after first "#" on the line to the end of line is ignored. This\r
+is useful for comments. All other lines are significant.</simpara>\r
+\r
+<simpara>Each significant line consists of tokens separated by whitespace. Whitespace\r
+could be spaces and/or tabs.</simpara>\r
+\r
+</section>\r
+<section id="_signal_definition">\r
+<title>Signal Definition</title>\r
+<simpara>Signal definition line consists of word "signal" followed by whitespace and\r
+signal name (without spaces in the name). Rest of the line should contain\r
+whitespace separated list of pins of the part. This list is currently not used\r
+for any purpose in JTAG Tools. It is intended for future use.</simpara>\r
+\r
+</section>\r
+</section>\r
+<section id="_development">\r
+<title>Development</title>\r
+<section id="_future_plans">\r
+<title>Future Plans</title>\r
+<itemizedlist>\r
+<listitem>\r
+<simpara>\r
+C API and library package\r
+</simpara>\r
+</listitem>\r
+<listitem>\r
+<simpara>\r
+Bindings for Python, Perl, …\r
+</simpara>\r
+</listitem>\r
+<listitem>\r
+<simpara>\r
+TCP/IP access\r
+</simpara>\r
+</listitem>\r
+<listitem>\r
+<simpara>\r
+New cable drivers\r
+</simpara>\r
+</listitem>\r
+<listitem>\r
+<simpara>\r
+…\r
+</simpara>\r
+</listitem>\r
+</itemizedlist>\r
+</section>\r
+<section id="_how_to_contribute">\r
+<title>How to contribute</title>\r
+<itemizedlist>\r
+<listitem>\r
+<simpara>\r
+Using Subversion\r
+</simpara>\r
+</listitem>\r
+<listitem>\r
+<simpara>\r
+Create and submit a patch\r
+</simpara>\r
+</listitem>\r
+<listitem>\r
+<simpara>\r
+Use SourceForge trackers\r
+</simpara>\r
+</listitem>\r
+</itemizedlist>\r
+</section>\r
+</section>\r
+</chapter>\r
+<chapter id="_f_a_q">\r
+<title>F.A.Q.</title>\r
+<simpara>For a list of known problems in current versions, please also check the "Bugs"\r
+tracker at the UrJTAG website!</simpara>\r
+\r
+<variablelist>\r
+<varlistentry>\r
+<term>\r
+Q. The documentation is incomplete. Where can I get more information?\r
+</term>\r
+<listitem>\r
+<simpara>\r
+ A. Please ask in the "Using UrJTAG" Forum on <ulink url="http://urjtag.org">http://urjtag.org</ulink>\r
+</simpara>\r
+</listitem>\r
+</varlistentry>\r
+<varlistentry>\r
+<term>\r
+Q. My flash isn't detected or can't be programmed. What can I do?\r
+</term>\r
+<listitem>\r
+<simpara>\r
+ A. Please record the output of the "detect" and "detectflash" commands and ask in the Forum. If possible, re-compile UrJTAG before with "—enable-jedec-exp" to get extra information.\r
+</simpara>\r
+</listitem>\r
+</varlistentry>\r
+<varlistentry>\r
+<term>\r
+Q. My CPU/FPGA/etc. chip isn't detected. What can I do?\r
+</term>\r
+<listitem>\r
+<simpara>\r
+ A. First try to get hold of a "BSDL" description of the chip from the vendor, and specify where to find this file to UrJTAG using "bsdl path" before you "detect". Second, a bus driver has to be selected. Maybe "ejtag" or "prototype" work.\r
+</simpara>\r
+</listitem>\r
+</varlistentry>\r
+<varlistentry>\r
+<term>\r
+Q. When I type "cable parallel 0x378 DLC5" (in a Cygwin environment) I get "Unknown port driver: parallel"?\r
+</term>\r
+<listitem>\r
+<simpara>\r
+ A. Please install the Cygwin ioperm package, and re-configure/compile.\r
+</simpara>\r
+</listitem>\r
+</varlistentry>\r
+<varlistentry>\r
+<term>\r
+Q. When I type "cable parallel 0x378 DLC5" (in a Cygwin environment) I get "Error: Cable initialization failed!".\r
+</term>\r
+<listitem>\r
+<simpara>\r
+ A. Please install ioperm.sys driver using <literal>ioperm -i</literal> command.\r
+</simpara>\r
+</listitem>\r
+</varlistentry>\r
+<varlistentry>\r
+<term>\r
+Q. When running autogen.sh, I get "Can't exec "autopoint": No such file or directory"\r
+</term>\r
+<listitem>\r
+<simpara>\r
+ A. You need the headers for gettext (e.g. Debian package "gettext-devel").\r
+</simpara>\r
+</listitem>\r
+</varlistentry>\r
+<varlistentry>\r
+<term>\r
+Q. When running autogen.sh, it complains about missing CVS\r
+</term>\r
+<listitem>\r
+<simpara>\r
+ A. The easiest solution is to actually install CVS for this step, just to get around this error message.\r
+</simpara>\r
+</listitem>\r
+</varlistentry>\r
+<varlistentry>\r
+<term>\r
+Q. During compilation, I get "svf_bison.y: No such file or directory"\r
+</term>\r
+<listitem>\r
+<simpara>\r
+ A. You need "bison".\r
+</simpara>\r
+</listitem>\r
+</varlistentry>\r
+<varlistentry>\r
+<term>\r
+Q. During compilation, I get "flex: can't open … src/svf/svf_flex.l"\r
+</term>\r
+<listitem>\r
+<simpara>\r
+ A. You need "flex"\r
+</simpara>\r
+</listitem>\r
+</varlistentry>\r
+<varlistentry>\r
+<term>\r
+Q. During compilation, I get "src/svf/svf_flex.l", line 27: unrecognized %option: bison-locations"\r
+</term>\r
+<listitem>\r
+<simpara>\r
+ A. You need a newer version of flex. It should be 2.5.31 or newer;\r
+ Unfortunately, Cygwin comes with only 2.5.4a. You may try to compile and\r
+ install a newer version of flex from source to solve this. The distributed\r
+ source tarball contains source pregenerated with a current flex version,\r
+ you need flex yourself only to compile from fresh SVN checkouts.\r
+</simpara>\r
+</listitem>\r
+</varlistentry>\r
+<varlistentry>\r
+<term>\r
+Q. When running "make install", I get "Permission denied" errors\r
+</term>\r
+<listitem>\r
+<simpara>\r
+ A. If you want to install into a system directory (the default /usr/local is one), you'll have to run "make install" as the superuser, e.g. do "sudo make install".\r
+</simpara>\r
+</listitem>\r
+</varlistentry>\r
+<varlistentry>\r
+<term>\r
+Q. My BSDL file defines the bus DAT as bit_vector(15 downto 0), how should I access single elements?\r
+</term>\r
+<listitem>\r
+<simpara>\r
+ A. BSDL syntax is an extension of the VHDL language. Array elements are indexed with\r
+ parentheses: DAT(4) selects index number 4 of the DAT vector. Also refer to the "print\r
+ signals" command.\r
+</simpara>\r
+</listitem>\r
+</varlistentry>\r
+<varlistentry>\r
+<term>\r
+Q. My board requires certain signals to be set to dedicated values before external memories can be accessed.\r
+</term>\r
+<listitem>\r
+<simpara>\r
+ A. Most (if not all) BSR-based bus drivers allow for static configurations of\r
+ pins that are controlled by BSR bits. Apply the required "set" commands before\r
+ issueing the "initbus …" command. These settings are preserved by all bus\r
+ related commands if they don't collide with the signals required for bus operation.\r
+</simpara>\r
+</listitem>\r
+</varlistentry>\r
+<varlistentry>\r
+<term>\r
+Q. My USB pod seems slow.\r
+</term>\r
+<listitem>\r
+<simpara>\r
+ A. USB-based JTAG pods suffer from a couple of intrinsic issues. Consider the\r
+ following to get maximum performance:\r
+</simpara>\r
+<itemizedlist>\r
+<listitem>\r
+<simpara>\r
+Run UrJTAG on native linux. Cygwin and VMWare are reportedly slower.\r
+</simpara>\r
+</listitem>\r
+<listitem>\r
+<simpara>\r
+Connect the pod via a high speed USB hub to a high speed USB host port.\r
+ Even though the pod is a full speed device, it benefits from the shorter\r
+ turn-around times between host and hub.\r
+</simpara>\r
+</listitem>\r
+</itemizedlist>\r
+</listitem>\r
+</varlistentry>\r
+</variablelist>\r
+</chapter>\r
+<chapter id="_licensing">\r
+<title>Licensing</title>\r
+<section id="_overview_2">\r
+<title>Overview</title>\r
+<simpara>Various licenses are used for the UrJTAG project. The GPL is used for most\r
+of the code except for some include files, JIM, and cable driver source, where\r
+a BSD or MIT license is used; this is noted in the file headers.</simpara>\r
+\r
+</section>\r
+<section id="_gnu_free_documentation_license_fdl">\r
+<title>GNU Free Documentation License (FDL)</title>\r
+<literallayout class="monospaced"> GNU Free Documentation License\r
+ Version 1.2, November 2002\r
+\r
+\r
+ Copyright (C) 2000,2001,2002 Free Software Foundation, Inc.\r
+ 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA\r
+ Everyone is permitted to copy and distribute verbatim copies\r
+ of this license document, but changing it is not allowed.\r
+\r
+\r
+0. PREAMBLE\r
+\r
+The purpose of this License is to make a manual, textbook, or other\r
+functional and useful document "free" in the sense of freedom: to\r
+assure everyone the effective freedom to copy and redistribute it,\r
+with or without modifying it, either commercially or noncommercially.\r
+Secondarily, this License preserves for the author and publisher a way\r
+to get credit for their work, while not being considered responsible\r
+for modifications made by others.\r
+\r
+This License is a kind of "copyleft", which means that derivative\r
+works of the document must themselves be free in the same sense. It\r
+complements the GNU General Public License, which is a copyleft\r
+license designed for free software.\r
+\r
+We have designed this License in order to use it for manuals for free\r
+software, because free software needs free documentation: a free\r
+program should come with manuals providing the same freedoms that the\r
+software does. But this License is not limited to software manuals;\r
+it can be used for any textual work, regardless of subject matter or\r
+whether it is published as a printed book. We recommend this License\r
+principally for works whose purpose is instruction or reference.\r
+\r
+\r
+1. APPLICABILITY AND DEFINITIONS\r
+\r
+This License applies to any manual or other work, in any medium, that\r
+contains a notice placed by the copyright holder saying it can be\r
+distributed under the terms of this License. Such a notice grants a\r
+world-wide, royalty-free license, unlimited in duration, to use that\r
+work under the conditions stated herein. The "Document", below,\r
+refers to any such manual or work. Any member of the public is a\r
+licensee, and is addressed as "you". You accept the license if you\r
+copy, modify or distribute the work in a way requiring permission\r
+under copyright law.\r
+\r
+A "Modified Version" of the Document means any work containing the\r
+Document or a portion of it, either copied verbatim, or with\r
+modifications and/or translated into another language.\r
+\r
+A "Secondary Section" is a named appendix or a front-matter section of\r
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+\r
+The "Invariant Sections" are certain Secondary Sections whose titles\r
+are designated, as being those of Invariant Sections, in the notice\r
+that says that the Document is released under this License. If a\r
+section does not fit the above definition of Secondary then it is not\r
+allowed to be designated as Invariant. The Document may contain zero\r
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+Sections then there are none.\r
+\r
+The "Cover Texts" are certain short passages of text that are listed,\r
+as Front-Cover Texts or Back-Cover Texts, in the notice that says that\r
+the Document is released under this License. A Front-Cover Text may\r
+be at most 5 words, and a Back-Cover Text may be at most 25 words.\r
+\r
+A "Transparent" copy of the Document means a machine-readable copy,\r
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+An image format is not Transparent if used for any substantial amount\r
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+Examples of suitable formats for Transparent copies include plain\r
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+or XML using a publicly available DTD, and standard-conforming simple\r
+HTML, PostScript or PDF designed for human modification. Examples of\r
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+\r
+The "Title Page" means, for a printed book, the title page itself,\r
+plus such following pages as are needed to hold, legibly, the material\r
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+the text near the most prominent appearance of the work's title,\r
+preceding the beginning of the body of the text.\r
+\r
+A section "Entitled XYZ" means a named subunit of the Document whose\r
+title either is precisely XYZ or contains XYZ in parentheses following\r
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+specific section name mentioned below, such as "Acknowledgements",\r
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+of such a section when you modify the Document means that it remains a\r
+section "Entitled XYZ" according to this definition.\r
+\r
+The Document may include Warranty Disclaimers next to the notice which\r
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+License, but only as regards disclaiming warranties: any other\r
+implication that these Warranty Disclaimers may have is void and has\r
+no effect on the meaning of this License.\r
+\r
+\r
+2. VERBATIM COPYING\r
+\r
+You may copy and distribute the Document in any medium, either\r
+commercially or noncommercially, provided that this License, the\r
+copyright notices, and the license notice saying this License applies\r
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+number of copies you must also follow the conditions in section 3.\r
+\r
+You may also lend copies, under the same conditions stated above, and\r
+you may publicly display copies.\r
+\r
+\r
+3. COPYING IN QUANTITY\r
+\r
+If you publish printed copies (or copies in media that commonly have\r
+printed covers) of the Document, numbering more than 100, and the\r
+Document's license notice requires Cover Texts, you must enclose the\r
+copies in covers that carry, clearly and legibly, all these Cover\r
+Texts: Front-Cover Texts on the front cover, and Back-Cover Texts on\r
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+you as the publisher of these copies. The front cover must present\r
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+Copying with changes limited to the covers, as long as they preserve\r
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+as verbatim copying in other respects.\r
+\r
+If the required texts for either cover are too voluminous to fit\r
+legibly, you should put the first ones listed (as many as fit\r
+reasonably) on the actual cover, and continue the rest onto adjacent\r
+pages.\r
+\r
+If you publish or distribute Opaque copies of the Document numbering\r
+more than 100, you must either include a machine-readable Transparent\r
+copy along with each Opaque copy, or state in or with each Opaque copy\r
+a computer-network location from which the general network-using\r
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+a complete Transparent copy of the Document, free of added material.\r
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+Opaque copy (directly or through your agents or retailers) of that\r
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+\r
+It is requested, but not required, that you contact the authors of the\r
+Document well before redistributing any large number of copies, to give\r
+them a chance to provide you with an updated version of the Document.\r
+\r
+\r
+4. MODIFICATIONS\r
+\r
+You may copy and distribute a Modified Version of the Document under\r
+the conditions of sections 2 and 3 above, provided that you release\r
+the Modified Version under precisely this License, with the Modified\r
+Version filling the role of the Document, thus licensing distribution\r
+and modification of the Modified Version to whoever possesses a copy\r
+of it. In addition, you must do these things in the Modified Version:\r
+\r
+A. Use in the Title Page (and on the covers, if any) a title distinct\r
+ from that of the Document, and from those of previous versions\r
+ (which should, if there were any, be listed in the History section\r
+ of the Document). You may use the same title as a previous version\r
+ if the original publisher of that version gives permission.\r
+B. List on the Title Page, as authors, one or more persons or entities\r
+ responsible for authorship of the modifications in the Modified\r
+ Version, together with at least five of the principal authors of the\r
+ Document (all of its principal authors, if it has fewer than five),\r
+ unless they release you from this requirement.\r
+C. State on the Title page the name of the publisher of the\r
+ Modified Version, as the publisher.\r
+D. Preserve all the copyright notices of the Document.\r
+E. Add an appropriate copyright notice for your modifications\r
+ adjacent to the other copyright notices.\r
+F. Include, immediately after the copyright notices, a license notice\r
+ giving the public permission to use the Modified Version under the\r
+ terms of this License, in the form shown in the Addendum below.\r
+G. Preserve in that license notice the full lists of Invariant Sections\r
+ and required Cover Texts given in the Document's license notice.\r
+H. Include an unaltered copy of this License.\r
+I. Preserve the section Entitled "History", Preserve its Title, and add\r
+ to it an item stating at least the title, year, new authors, and\r
+ publisher of the Modified Version as given on the Title Page. If\r
+ there is no section Entitled "History" in the Document, create one\r
+ stating the title, year, authors, and publisher of the Document as\r
+ given on its Title Page, then add an item describing the Modified\r
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+J. Preserve the network location, if any, given in the Document for\r
+ public access to a Transparent copy of the Document, and likewise\r
+ the network locations given in the Document for previous versions\r
+ it was based on. These may be placed in the "History" section.\r
+ You may omit a network location for a work that was published at\r
+ least four years before the Document itself, or if the original\r
+ publisher of the version it refers to gives permission.\r
+K. For any section Entitled "Acknowledgements" or "Dedications",\r
+ Preserve the Title of the section, and preserve in the section all\r
+ the substance and tone of each of the contributor acknowledgements\r
+ and/or dedications given therein.\r
+L. Preserve all the Invariant Sections of the Document,\r
+ unaltered in their text and in their titles. Section numbers\r
+ or the equivalent are not considered part of the section titles.\r
+M. Delete any section Entitled "Endorsements". Such a section\r
+ may not be included in the Modified Version.\r
+N. Do not retitle any existing section to be Entitled "Endorsements"\r
+ or to conflict in title with any Invariant Section.\r
+O. Preserve any Warranty Disclaimers.\r
+\r
+If the Modified Version includes new front-matter sections or\r
+appendices that qualify as Secondary Sections and contain no material\r
+copied from the Document, you may at your option designate some or all\r
+of these sections as invariant. To do this, add their titles to the\r
+list of Invariant Sections in the Modified Version's license notice.\r
+These titles must be distinct from any other section titles.\r
+\r
+You may add a section Entitled "Endorsements", provided it contains\r
+nothing but endorsements of your Modified Version by various\r
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+been approved by an organization as the authoritative definition of a\r
+standard.\r
+\r
+You may add a passage of up to five words as a Front-Cover Text, and a\r
+passage of up to 25 words as a Back-Cover Text, to the end of the list\r
+of Cover Texts in the Modified Version. Only one passage of\r
+Front-Cover Text and one of Back-Cover Text may be added by (or\r
+through arrangements made by) any one entity. If the Document already\r
+includes a cover text for the same cover, previously added by you or\r
+by arrangement made by the same entity you are acting on behalf of,\r
+you may not add another; but you may replace the old one, on explicit\r
+permission from the previous publisher that added the old one.\r
+\r
+The author(s) and publisher(s) of the Document do not by this License\r
+give permission to use their names for publicity for or to assert or\r
+imply endorsement of any Modified Version.\r
+\r
+\r
+5. COMBINING DOCUMENTS\r
+\r
+You may combine the Document with other documents released under this\r
+License, under the terms defined in section 4 above for modified\r
+versions, provided that you include in the combination all of the\r
+Invariant Sections of all of the original documents, unmodified, and\r
+list them all as Invariant Sections of your combined work in its\r
+license notice, and that you preserve all their Warranty Disclaimers.\r
+\r
+The combined work need only contain one copy of this License, and\r
+multiple identical Invariant Sections may be replaced with a single\r
+copy. If there are multiple Invariant Sections with the same name but\r
+different contents, make the title of each such section unique by\r
+adding at the end of it, in parentheses, the name of the original\r
+author or publisher of that section if known, or else a unique number.\r
+Make the same adjustment to the section titles in the list of\r
+Invariant Sections in the license notice of the combined work.\r
+\r
+In the combination, you must combine any sections Entitled "History"\r
+in the various original documents, forming one section Entitled\r
+"History"; likewise combine any sections Entitled "Acknowledgements",\r
+and any sections Entitled "Dedications". You must delete all sections\r
+Entitled "Endorsements".\r
+\r
+\r
+6. COLLECTIONS OF DOCUMENTS\r
+\r
+You may make a collection consisting of the Document and other documents\r
+released under this License, and replace the individual copies of this\r
+License in the various documents with a single copy that is included in\r
+the collection, provided that you follow the rules of this License for\r
+verbatim copying of each of the documents in all other respects.\r
+\r
+You may extract a single document from such a collection, and distribute\r
+it individually under this License, provided you insert a copy of this\r
+License into the extracted document, and follow this License in all\r
+other respects regarding verbatim copying of that document.\r
+\r
+\r
+7. AGGREGATION WITH INDEPENDENT WORKS\r
+\r
+A compilation of the Document or its derivatives with other separate\r
+and independent documents or works, in or on a volume of a storage or\r
+distribution medium, is called an "aggregate" if the copyright\r
+resulting from the compilation is not used to limit the legal rights\r
+of the compilation's users beyond what the individual works permit.\r
+When the Document is included in an aggregate, this License does not\r
+apply to the other works in the aggregate which are not themselves\r
+derivative works of the Document.\r
+\r
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+If the program is interactive, make it output a short notice like this\r
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+ Gnomovision version 69, Copyright (C) year name of author\r
+ Gnomovision comes with ABSOLUTELY NO WARRANTY; for details type `show w'.\r
+ This is free software, and you are welcome to redistribute it\r
+ under certain conditions; type `show c' for details.\r
+\r
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+ `Gnomovision' (which makes passes at compilers) written by James Hacker.\r
+\r
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+\r
+This General Public License does not permit incorporating your program into\r
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+consider it more useful to permit linking proprietary applications with the\r
+library. If this is what you want to do, use the GNU Lesser General\r
+Public License instead of this License.</literallayout>\r
+</section>\r
+</chapter>\r
+</book>\r
--- /dev/null
+<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN""http://www.w3.org/TR/html4/loose.dtd">
+<HTML
+><HEAD
+><TITLE
+>Universal JTAG library, server and tools</TITLE
+><META
+NAME="GENERATOR"
+CONTENT="Modular DocBook HTML Stylesheet Version 1.79"><LINK
+REL="STYLESHEET"
+TYPE="text/css"
+HREF="UrJTAG.css"></HEAD
+><BODY
+CLASS="book"
+BGCOLOR="#FFFFFF"
+TEXT="#000000"
+LINK="#0000FF"
+VLINK="#840084"
+ALINK="#0000FF"
+><DIV
+CLASS="BOOK"
+><A
+NAME="AEN1"
+></A
+><DIV
+CLASS="TITLEPAGE"
+><H1
+CLASS="title"
+><A
+NAME="AEN2"
+>Universal JTAG library, server and tools</A
+></H1
+><H3
+CLASS="author"
+><A
+NAME="AEN5"
+></A
+>Kolja Waschk (Ed.)</H3
+><HR></DIV
+><DIV
+CLASS="TOC"
+><DL
+><DT
+><B
+>Table of Contents</B
+></DT
+><DT
+>1. <A
+HREF="#_copyright"
+>Copyright</A
+></DT
+><DT
+>2. <A
+HREF="#_general"
+>General</A
+></DT
+><DD
+><DL
+><DT
+>2.1. <A
+HREF="#_jtag"
+>JTAG</A
+></DT
+><DD
+><DL
+><DT
+>2.1.1. <A
+HREF="#_introduction"
+>Introduction</A
+></DT
+><DT
+>2.1.2. <A
+HREF="#_interfaces"
+>Interfaces</A
+></DT
+><DT
+>2.1.3. <A
+HREF="#_additions"
+>Additions</A
+></DT
+><DT
+>2.1.4. <A
+HREF="#_bsdl_and_urjtag_data_files"
+>BSDL and UrJTAG data files</A
+></DT
+><DT
+>2.1.5. <A
+HREF="#_svf_files"
+>SVF files</A
+></DT
+><DT
+>2.1.6. <A
+HREF="#_jam_stapl_files"
+>JAM/STAPL files</A
+></DT
+></DL
+></DD
+><DT
+>2.2. <A
+HREF="#_urjtag"
+>UrJTAG</A
+></DT
+><DD
+><DL
+><DT
+>2.2.1. <A
+HREF="#_introduction_2"
+>Introduction</A
+></DT
+><DT
+>2.2.2. <A
+HREF="#_about_this_document"
+>About this document</A
+></DT
+><DT
+>2.2.3. <A
+HREF="#_urjtag_website"
+>UrJTAG Website</A
+></DT
+><DT
+>2.2.4. <A
+HREF="#_the_name_urjtag"
+>The name "UrJTAG"</A
+></DT
+><DT
+>2.2.5. <A
+HREF="#_authors_contributors_8230_thanks"
+>Authors, contributors, … thanks</A
+></DT
+><DT
+>2.2.6. <A
+HREF="#_urjtag_and_openwince_jtag_tools"
+>UrJTAG and openwince JTAG Tools</A
+></DT
+></DL
+></DD
+><DT
+>2.3. <A
+HREF="#_system_requirements"
+>System requirements</A
+></DT
+><DD
+><DL
+><DT
+>2.3.1. <A
+HREF="#_supported_host_operating_systems"
+>Supported host operating systems</A
+></DT
+><DT
+>2.3.2. <A
+HREF="#_required_software_for_running_urjtag"
+>Required software for running UrJTAG</A
+></DT
+><DT
+>2.3.3. <A
+HREF="#_supported_jtag_adapters_cables"
+>Supported JTAG adapters/cables</A
+></DT
+><DT
+>2.3.4. <A
+HREF="#_jtag_aware_parts_chips"
+>JTAG-aware parts (chips)</A
+></DT
+><DT
+>2.3.5. <A
+HREF="#_flash_chips"
+>Flash chips</A
+></DT
+></DL
+></DD
+><DT
+>2.4. <A
+HREF="#_compilation_and_installation"
+>Compilation and installation</A
+></DT
+><DD
+><DL
+><DT
+>2.4.1. <A
+HREF="#_required_software_for_compiling_urjtag"
+>Required software for compiling UrJTAG</A
+></DT
+><DT
+>2.4.2. <A
+HREF="#_required_libraries_for_usb_support"
+>Required libraries for USB support</A
+></DT
+><DT
+>2.4.3. <A
+HREF="#_installing_from_source_tar_gz"
+>Installing from source tar.gz</A
+></DT
+><DT
+>2.4.4. <A
+HREF="#_installing_from_subversion_repository"
+>Installing from Subversion repository</A
+></DT
+><DT
+>2.4.5. <A
+HREF="#_linking_to_ftd2xx_dll_in_cygwin_environment"
+>Linking to FTD2XX.DLL in Cygwin environment</A
+></DT
+><DT
+>2.4.6. <A
+HREF="#_using_libusb_win32_in_cygwin_environment"
+>Using LibUSB-Win32 in Cygwin environment</A
+></DT
+><DT
+>2.4.7. <A
+HREF="#_compiling_with_mingw"
+>Compiling with MinGW</A
+></DT
+><DT
+>2.4.8. <A
+HREF="#_driver_tailoring"
+>Driver tailoring</A
+></DT
+><DT
+>2.4.9. <A
+HREF="#_building_the_bsdl_subsystem"
+>Building the BSDL subsystem</A
+></DT
+></DL
+></DD
+></DL
+></DD
+><DT
+>3. <A
+HREF="#_usage"
+>Usage</A
+></DT
+><DD
+><DL
+><DT
+>3.1. <A
+HREF="#_quick_start"
+>Quick start</A
+></DT
+><DD
+><DL
+><DT
+>3.1.1. <A
+HREF="#_run_the_software"
+>Run the software</A
+></DT
+><DT
+>3.1.2. <A
+HREF="#_configure_the_cable"
+>Configure the cable</A
+></DT
+><DT
+>3.1.3. <A
+HREF="#_detect_parts_on_the_jtag_chain"
+>Detect parts on the JTAG chain</A
+></DT
+><DT
+>3.1.4. <A
+HREF="#_print_current_jtag_chain_status"
+>Print current JTAG chain status</A
+></DT
+><DT
+>3.1.5. <A
+HREF="#_sample_device_pin_status"
+>Sample device pin status</A
+></DT
+><DT
+>3.1.6. <A
+HREF="#_burn_flash_connected_to_the_part"
+>Burn flash connected to the part</A
+></DT
+></DL
+></DD
+><DT
+>3.2. <A
+HREF="#_jtag_commands"
+>JTAG commands</A
+></DT
+><DD
+><DL
+><DT
+>3.2.1. <A
+HREF="#_overview"
+>Overview</A
+></DT
+><DT
+>3.2.2. <A
+HREF="#_basic_commands"
+>Basic commands</A
+></DT
+><DT
+>3.2.3. <A
+HREF="#_chain_management"
+>Chain management</A
+></DT
+><DT
+>3.2.4. <A
+HREF="#_part_definition_commands"
+>Part definition commands</A
+></DT
+><DT
+>3.2.5. <A
+HREF="#_tap_control"
+>TAP control</A
+></DT
+><DT
+>3.2.6. <A
+HREF="#_ram_flash_access"
+>RAM/Flash access</A
+></DT
+><DT
+>3.2.7. <A
+HREF="#_highlevel_commands"
+>Highlevel commands</A
+></DT
+><DT
+>3.2.8. <A
+HREF="#_unsupported_commands"
+>Unsupported commands</A
+></DT
+></DL
+></DD
+></DL
+></DD
+><DT
+>4. <A
+HREF="#_internals"
+>Internals</A
+></DT
+><DD
+><DL
+><DT
+>4.1. <A
+HREF="#_files"
+>Files</A
+></DT
+><DD
+><DL
+><DT
+>4.1.1. <A
+HREF="#_source_code_overview"
+>Source code Overview</A
+></DT
+></DL
+></DD
+><DT
+>4.2. <A
+HREF="#_drivers"
+>Drivers</A
+></DT
+><DD
+><DL
+><DT
+>4.2.1. <A
+HREF="#_cable_specific_drivers_src_tap_cable"
+>Cable-specific drivers (src/tap/cable)</A
+></DT
+><DT
+>4.2.2. <A
+HREF="#_link_drivers"
+>Link drivers</A
+></DT
+><DT
+>4.2.3. <A
+HREF="#_bus_drivers"
+>Bus drivers</A
+></DT
+></DL
+></DD
+><DT
+>4.3. <A
+HREF="#_data_file_format"
+>Data file format</A
+></DT
+><DD
+><DL
+><DT
+>4.3.1. <A
+HREF="#_general_rules"
+>General rules</A
+></DT
+><DT
+>4.3.2. <A
+HREF="#_signal_definition"
+>Signal Definition</A
+></DT
+></DL
+></DD
+><DT
+>4.4. <A
+HREF="#_development"
+>Development</A
+></DT
+><DD
+><DL
+><DT
+>4.4.1. <A
+HREF="#_future_plans"
+>Future Plans</A
+></DT
+><DT
+>4.4.2. <A
+HREF="#_how_to_contribute"
+>How to contribute</A
+></DT
+></DL
+></DD
+></DL
+></DD
+><DT
+>5. <A
+HREF="#_f_a_q"
+>F.A.Q.</A
+></DT
+><DT
+>6. <A
+HREF="#_licensing"
+>Licensing</A
+></DT
+><DD
+><DL
+><DT
+>6.1. <A
+HREF="#_overview_2"
+>Overview</A
+></DT
+><DT
+>6.2. <A
+HREF="#_gnu_free_documentation_license_fdl"
+>GNU Free Documentation License (FDL)</A
+></DT
+><DT
+>6.3. <A
+HREF="#_gnu_general_public_license_gpl"
+>GNU General Public License (GPL)</A
+></DT
+></DL
+></DD
+></DL
+></DIV
+><DIV
+CLASS="chapter"
+><HR><H1
+><A
+NAME="_copyright"
+></A
+>Chapter 1. Copyright</H1
+><P
+>Copyright 2007, 2008 Kolja Waschk and the respective authors.</P
+><P
+>Permission is granted to copy, distribute and/or modify this document under the
+terms of the GNU Free Documentation License, Version 1.2 or any later version
+published by the Free Software Foundation. A copy of the license is included in
+the section entitled "GNU Free Documentation License".</P
+></DIV
+><DIV
+CLASS="chapter"
+><HR><H1
+><A
+NAME="_general"
+></A
+>Chapter 2. General</H1
+><DIV
+CLASS="section"
+><H2
+CLASS="section"
+><A
+NAME="_jtag"
+>2.1. JTAG</A
+></H2
+><P
+>JTAG basics can be found all over the internet. This section should go into
+some more details about working with JTAG. What hardware do you need, what is
+the usage of JTAG, where do I get files. What file formats are available…</P
+><DIV
+CLASS="section"
+><HR><H3
+CLASS="section"
+><A
+NAME="_introduction"
+>2.1.1. Introduction</A
+></H3
+><P
+>JTAG (IEEE 1149.1) is a serial interface for testing devices with
+integrated circuits. The problem that the JTAG interface was designed to solve
+is checking if connections between ICs are OK. Therefore you can set and check
+in- and outputs of ICs. In order to save pins and logic a very simple serial
+design was invented.</P
+><P
+></P
+><UL
+><LI
+><P
+> One pin serial input
+</P
+></LI
+><LI
+><P
+> One pin serial output
+</P
+></LI
+><LI
+><P
+> One pin clock
+</P
+></LI
+><LI
+><P
+> One pin control
+</P
+></LI
+></UL
+><P
+>The control pin (together with clock) allows to switch device states. A state
+machine inside each chip can be controlled, e.g. to reset the device. This
+control machine also allows to have two internal shift registers in each device
+(although we only have on in- and one output-pin). The registers are called
+instruction register (IR) and data register (DR). The current UrJTAG tool
+allows you to set the IR and set and get the DR. It doesn't allow you to
+directly control the statemachine (yet).</P
+></DIV
+><DIV
+CLASS="section"
+><HR><H3
+CLASS="section"
+><A
+NAME="_interfaces"
+>2.1.2. Interfaces</A
+></H3
+><P
+>The simplest interface that you can build is like the Xilinx parallel cable
+(also called DLC5). If your device works with a 5V or 3.3V supply voltage then
+this device can even be build just with passive parts. (picture missing here)
+UrJTAG also supports a number of other interface adapters.</P
+></DIV
+><DIV
+CLASS="section"
+><HR><H3
+CLASS="section"
+><A
+NAME="_additions"
+>2.1.3. Additions</A
+></H3
+><P
+>In the meantime the jtag specification was used as a basis for programming
+flash files and debugging processors. UrJTAG supports programming a couple of
+different flash devices. It also supports programming of non-flash devices via
+svf files. UrJTAG does not support debugging yet. Other open source solutions
+such as OpenOCD allow you to debug ARM processors with gdb.</P
+></DIV
+><DIV
+CLASS="section"
+><HR><H3
+CLASS="section"
+><A
+NAME="_bsdl_and_urjtag_data_files"
+>2.1.4. BSDL and UrJTAG data files</A
+></H3
+><P
+>The BSDL file format describes the jtag interface for one IC. It is a VHDL
+syntax with the needed information (like pin-names, register lengths and
+commands) that is usually done by the supplier. e.g. Xilinx BSDL files are
+all included in their free web-pack (using file extension ".bsd").</P
+><P
+>UrJTAG uses a different file format internally. So in order to add a new device
+to UrJTAG you need to convert those files and produce a directory structure.
+Currently there are at least three tools available to do that; included with
+UrJTAG is "bsdl2jtag". Please ask on the mailing list in case of problems with
+that. Please also send proven working files back to this project.</P
+><P
+>Starting with post-0.7 releases, UrJTAG contains a BSDL subsystem that
+retrieves the descriptions for chips in the chain from BSDL files on the
+fly. "bsdl2jtag" is in fact a wrapper that uses the BSDL subsystem to
+convert the BSDL file.</P
+></DIV
+><DIV
+CLASS="section"
+><HR><H3
+CLASS="section"
+><A
+NAME="_svf_files"
+>2.1.5. SVF files</A
+></H3
+><P
+>The SVF file format contains a number of high level commands to drive the jtag
+bus. For example you can shift the IR or DR and even check for the results.
+The Xilinxs impact and Altera QuartusII tools allow you to write this file to
+program devices.</P
+><P
+>The player has been developed according to the "Serial Vector Format
+Specification", Revision E, 8 March 1999 issued by ASSET InterTech, Inc. The
+full specification can be found at
+<A
+HREF="http://www.asset-intertech.com/support/svf.pdf"
+TARGET="_top"
+>http://www.asset-intertech.com/support/svf.pdf</A
+></P
+><P
+>UrJTAG features an "SVF player" that can read SVF files and perform the
+described actions on the bus.</P
+><P
+>SVF parser and lexer are also copyright 2002, CDS at <A
+HREF="http://www-csd.ijs.si/"
+TARGET="_top"
+>http://www-csd.ijs.si/</A
+>.
+They have been reused from the "Experimental Boundary Scan" project at
+<A
+HREF="http://ebsp.sourceforge.net/"
+TARGET="_top"
+>http://ebsp.sourceforge.net/</A
+>.</P
+></DIV
+><DIV
+CLASS="section"
+><HR><H3
+CLASS="section"
+><A
+NAME="_jam_stapl_files"
+>2.1.6. JAM/STAPL files</A
+></H3
+><P
+>Another format for describing actions over JTAG interfaces is STAPL, actually
+standardized as JEDEC "JESD-71A". Compared to SVF, it looks more like an
+actual programming language and features looping, conditional execution, and
+more. STAPL is not yet supported by UrJTAG.</P
+></DIV
+></DIV
+><DIV
+CLASS="section"
+><HR><H2
+CLASS="section"
+><A
+NAME="_urjtag"
+>2.2. UrJTAG</A
+></H2
+><DIV
+CLASS="section"
+><H3
+CLASS="section"
+><A
+NAME="_introduction_2"
+>2.2.1. Introduction</A
+></H3
+><P
+>UrJTAG Tools is a software package which enables working with JTAG-aware (IEEE
+1149.1) hardware devices (parts) and boards through JTAG adapter.</P
+><P
+>This package has open and modular architecture with ability to write
+miscellaneous extensions (like board testers, flash memory programmers, and so
+on).</P
+><P
+>JTAG Tools package is free software, covered by the GNU General Public License,
+and you are welcome to change it and/or distribute copies of it under certain
+conditions. There is absolutely no warranty for JTAG Tools. Please read
+COPYING file for more info.</P
+><DIV
+CLASS="warning"
+><P
+></P
+><TABLE
+CLASS="warning"
+WIDTH="100%"
+BORDER="0"
+><TR
+><TD
+WIDTH="25"
+ALIGN="CENTER"
+VALIGN="TOP"
+><IMG
+SRC="../images/warning.gif"
+HSPACE="5"
+ALT="Warning"></TD
+><TD
+ALIGN="LEFT"
+VALIGN="TOP"
+><P
+>This software may damage your hardware!</P
+></TD
+></TR
+></TABLE
+></DIV
+><P
+>Feedback and contributions are welcome.</P
+></DIV
+><DIV
+CLASS="section"
+><HR><H3
+CLASS="section"
+><A
+NAME="_about_this_document"
+>2.2.2. About this document</A
+></H3
+><P
+>This documentation is far from being complete. You're encouraged to amend and
+supplement it and submit your changes in the Bugs or Enhancements tracker
+at the UrJTAG website.</P
+></DIV
+><DIV
+CLASS="section"
+><HR><H3
+CLASS="section"
+><A
+NAME="_urjtag_website"
+>2.2.3. UrJTAG Website</A
+></H3
+><P
+>The most current version of this documentation and UrJTAG sourcecode
+is always available from the project homepage at <A
+HREF="http://www.urjtag.org"
+TARGET="_top"
+>http://www.urjtag.org</A
+></P
+></DIV
+><DIV
+CLASS="section"
+><HR><H3
+CLASS="section"
+><A
+NAME="_the_name_urjtag"
+>2.2.4. The name "UrJTAG"</A
+></H3
+><P
+>I (Kolja) favour short names, so I thought about adding only a few
+letters to "JTAG". The prefix "Ur" in German means "ancestral", an "Ur-Vater"
+is a forefather. UrJTAG shall become the forefather, the prototype for many
+other JTAG tools. By mere chance the "Ur" is also another name for an aurochs,
+an animal similar to the GNU…</P
+></DIV
+><DIV
+CLASS="section"
+><HR><H3
+CLASS="section"
+><A
+NAME="_authors_contributors_8230_thanks"
+>2.2.5. Authors, contributors, … thanks</A
+></H3
+><P
+>A list of contributors is maintained in the file THANKS in the source
+distribution. Special thanks go to Marcel Telka, who actually "invented" the
+JTAG tools and wrote most of this basis of UrJTAG, and Arnim Laeuger for his
+continuous support and development of SVF and BSDL subsystem and FT2232
+drivers.</P
+></DIV
+><DIV
+CLASS="section"
+><HR><H3
+CLASS="section"
+><A
+NAME="_urjtag_and_openwince_jtag_tools"
+>2.2.6. UrJTAG and openwince JTAG Tools</A
+></H3
+><P
+>The JTAG Tools originally were developed by Marcel Telka as part of
+the openwince project. Still a large portion of the source code is his work.
+However, the last release of the JTAG tools was version 0.5.1 in 2003. After a
+few years the development completely stalled. Every few months or so on the
+project's mailing list someone asked about continuing, but a critical mass
+wasn't reached before late 2007. A fork of the JTAG tools was created under the
+wings of the UrJTAG project at Sourceforge.</P
+></DIV
+></DIV
+><DIV
+CLASS="section"
+><HR><H2
+CLASS="section"
+><A
+NAME="_system_requirements"
+>2.3. System requirements</A
+></H2
+><DIV
+CLASS="section"
+><H3
+CLASS="section"
+><A
+NAME="_supported_host_operating_systems"
+>2.3.1. Supported host operating systems</A
+></H3
+><P
+>JTAG Tools should run on all Unix like operating systems including MS Windows
+with Cygwin installed.</P
+></DIV
+><DIV
+CLASS="section"
+><HR><H3
+CLASS="section"
+><A
+NAME="_required_software_for_running_urjtag"
+>2.3.2. Required software for running UrJTAG</A
+></H3
+><P
+>Required only for MS Windows:</P
+><P
+></P
+><UL
+><LI
+><P
+> current Cygwin net installation from <A
+HREF="http://cygwin.com"
+TARGET="_top"
+>http://cygwin.com</A
+>
+</P
+></LI
+><LI
+><P
+> ioperm package (a part of the standard Cygwin net installation)
+</P
+></LI
+></UL
+><P
+>It may be necessary to run the command "ioperm -i" to install the IOPERM.SYS
+driver in the system.</P
+><P
+>If UrJTAG was compiled to use the readline library, it has to be present on
+the system as well. It's probably a standard part of your distribution.</P
+><P
+>More software is needed if you want to compile UrJTAG (which you probably want
+because currently no pre-compiled binaries are avaible…). See "Installation"
+below.</P
+></DIV
+><DIV
+CLASS="section"
+><HR><H3
+CLASS="section"
+><A
+NAME="_supported_jtag_adapters_cables"
+>2.3.3. Supported JTAG adapters/cables</A
+></H3
+><P
+>See <SPAN
+CLASS="emphasis"
+><I
+CLASS="emphasis"
+>help cable</I
+></SPAN
+> command for up-to-date info.</P
+><P
+>Parallel-port cables:</P
+><P
+></P
+><UL
+><LI
+><P
+> Arcom JTAG Cable
+</P
+></LI
+><LI
+><P
+> Altera ByteBlaster/ByteBlaster II/ByteBlasterMV Parallel Port Download Cable
+</P
+></LI
+><LI
+><P
+> Xilinx DLC5 JTAG Parallel Cable III
+</P
+></LI
+><LI
+><P
+> ETC EA253 JTAG Cable
+</P
+></LI
+><LI
+><P
+> ETC EI012 JTAG Cable
+</P
+></LI
+><LI
+><P
+> Ka-Ro TRITON (PXA255/250) JTAG Cable
+</P
+></LI
+><LI
+><P
+> Keith &amp; Koep JTAG Cable
+</P
+></LI
+><LI
+><P
+> Lattice Parallel Port JTAG Cable
+</P
+></LI
+><LI
+><P
+> Mpcbdm JTAG Cable
+</P
+></LI
+><LI
+><P
+> Macraigor Wiggler JTAG Cable
+</P
+></LI
+></UL
+><P
+>FT2232-based USB cables:</P
+><P
+></P
+><UL
+><LI
+><P
+> Amontec JTAGkey
+</P
+></LI
+><LI
+><P
+> Amontec JTAGkey-Tiny (supported as cable "JTAGkey")
+</P
+></LI
+><LI
+><P
+> KrisTech UsbScarab2 ARM JTAG <A
+HREF="http://www.kristech.eu/"
+TARGET="_top"
+>http://www.kristech.eu/</A
+>
+</P
+></LI
+><LI
+><P
+> Olimex ARM-USB-JTAG
+</P
+></LI
+><LI
+><P
+> Olimex ARM-USB-TINY
+</P
+></LI
+><LI
+><P
+> OOCDLink-s (experimental) <A
+HREF="http://www.joernonline.de/dw/doku.php?id=projects:oocdlink:2_oocdlinks"
+TARGET="_top"
+>http://www.joernonline.de/dw/doku.php?id=projects:oocdlink:2_oocdlinks</A
+>
+</P
+></LI
+><LI
+><P
+> Other FT2232-based USB JTAG cables (experimental)
+</P
+></LI
+><LI
+><P
+> TinCanTools Flyswatter
+</P
+></LI
+><LI
+><P
+> Turtelizer 2 (experimental) <A
+HREF="http://www.ethernut.de/en/hardware/turtelizer/"
+TARGET="_top"
+>http://www.ethernut.de/en/hardware/turtelizer/</A
+>
+</P
+></LI
+><LI
+><P
+> USB to JTAG Interface (experimental)
+</P
+></LI
+><LI
+><P
+> <A
+HREF="http://www.hs-augsburg.de/~hhoegl/proj/usbjtag/usbjtag.html"
+TARGET="_top"
+>http://www.hs-augsburg.de/~hhoegl/proj/usbjtag/usbjtag.html</A
+>
+</P
+></LI
+><LI
+><P
+> Black gnICE <A
+HREF="http://docs.blackfin.uclinux.org/doku.php?id=hw:jtag:gnice"
+TARGET="_top"
+>http://docs.blackfin.uclinux.org/doku.php?id=hw:jtag:gnice</A
+>
+</P
+></LI
+><LI
+><P
+> Xverve Signalyzer Tool (experimental)
+</P
+></LI
+></UL
+><P
+>Other USB cables:</P
+><P
+></P
+><UL
+><LI
+><P
+> Altera USB-Blaster and compatible <A
+HREF="http://www.ixo.de/info/usb_jtag"
+TARGET="_top"
+>http://www.ixo.de/info/usb_jtag</A
+>
+</P
+></LI
+><LI
+><P
+> Segger/IAR J-Link / Atmel SAM-ICE (experimental, work in progress)
+</P
+></LI
+><LI
+><P
+> Xilinx Platform USB Cable / DLC9 (slow, experimental, work in progress - don't use)
+</P
+></LI
+></UL
+><P
+>Other cables:
+ * Technologic Systems TS-7800 SoC GPIO builtin JTAG interface</P
+></DIV
+><DIV
+CLASS="section"
+><HR><H3
+CLASS="section"
+><A
+NAME="_jtag_aware_parts_chips"
+>2.3.4. JTAG-aware parts (chips)</A
+></H3
+><P
+>The data/ directory of the UrJTAG installation has some more, but at
+least the following are supported:</P
+><P
+></P
+><UL
+><LI
+><P
+> Altera EP1C20F400
+</P
+></LI
+><LI
+><P
+> Altera MAX7000 (w/ BSDL)
+</P
+></LI
+><LI
+><P
+> Altera EPM7128AETC100
+</P
+></LI
+><LI
+><P
+> Altera Cyclone I & II (w/ BSDL)
+</P
+></LI
+><LI
+><P
+> Analog Devices Sharc-21065L
+</P
+></LI
+><LI
+><P
+> Atmel ATmega128 (partial support)
+</P
+></LI
+><LI
+><P
+> Atmel AT32AP7000 (partial support)
+</P
+></LI
+><LI
+><P
+> Broadcom BCM1250
+</P
+></LI
+><LI
+><P
+> Broadcom BCM3310 (partial support)
+</P
+></LI
+><LI
+><P
+> Broadcom BCM5421S
+</P
+></LI
+><LI
+><P
+> Broadcom BCM4712 (partial support)
+</P
+></LI
+><LI
+><P
+> DEC SA1100
+</P
+></LI
+><LI
+><P
+> Hitachi HD64465
+</P
+></LI
+><LI
+><P
+> Hitachi SH7727
+</P
+></LI
+><LI
+><P
+> Hitachi SH7729
+</P
+></LI
+><LI
+><P
+> IBM PowerPC 440GX
+</P
+></LI
+><LI
+><P
+> Intel IXP425
+</P
+></LI
+><LI
+><P
+> Intel SA1110
+</P
+></LI
+><LI
+><P
+> Intel PXA250/PXA255/PXA260/PXA261/PXA262/PXA263
+</P
+></LI
+><LI
+><P
+> Lattice LC4032V
+</P
+></LI
+><LI
+><P
+> Lattice M4A3-64/32
+</P
+></LI
+><LI
+><P
+> Lattice M4A3-256/192
+</P
+></LI
+><LI
+><P
+> Motorola MPC8245
+</P
+></LI
+><LI
+><P
+> Samsung S3C4510B
+</P
+></LI
+><LI
+><P
+> Sharp LH7A400
+</P
+></LI
+><LI
+><P
+> Toshiba TX4925/TX4926
+</P
+></LI
+><LI
+><P
+> Xilinx XC2C256-TQ144
+</P
+></LI
+><LI
+><P
+> Xilinx XCR3032XL-VQ44
+</P
+></LI
+><LI
+><P
+> Xilinx XCR3128XL-CS144
+</P
+></LI
+><LI
+><P
+> Xilinx XCR3128XL-VQ100
+</P
+></LI
+><LI
+><P
+> Xilinx XCR3256XL-FT256
+</P
+></LI
+><LI
+><P
+> Xilinx Spartan-IIE
+</P
+></LI
+><LI
+><P
+> Xilinx Spartan-3/E
+</P
+></LI
+><LI
+><P
+> Xilinx Spartan-3AN
+</P
+></LI
+></UL
+></DIV
+><DIV
+CLASS="section"
+><HR><H3
+CLASS="section"
+><A
+NAME="_flash_chips"
+>2.3.5. Flash chips</A
+></H3
+><DIV
+CLASS="note"
+><P
+></P
+><TABLE
+CLASS="note"
+WIDTH="100%"
+BORDER="0"
+><TR
+><TD
+WIDTH="25"
+ALIGN="CENTER"
+VALIGN="TOP"
+><IMG
+SRC="../images/note.gif"
+HSPACE="5"
+ALT="Note"></TD
+><TD
+ALIGN="LEFT"
+VALIGN="TOP"
+><P
+>Not all chips are supported in every possible configuration, there may
+be untested combinations of chip type, bus width, …</P
+></TD
+></TR
+></TABLE
+></DIV
+><P
+></P
+><UL
+><LI
+><P
+> Intel 28FxxxJ3A (28F320J3A, 28F640J3A, 28F128J3A)
+</P
+></LI
+><LI
+><P
+> Intel 28FxxxK3 (28F640K3, 28F128K3, 28F256K3)
+</P
+></LI
+><LI
+><P
+> Intel 28FxxxK18 (28F640K18, 28F128K18, 28F256K18)
+</P
+></LI
+><LI
+><P
+> AMD Am29LV64xD (Am29LV640D, Am29LV641D, Am29LV642D)
+</P
+></LI
+><LI
+><P
+> AMD Am29xx040B (Am29F040B, Am29LV040B)
+</P
+></LI
+></UL
+><P
+>UrJTAG uses the multi-byte write mode if supported by the particular flash
+device. The flash code will automatically switch to this algorithm if the
+Device Geometry Definition reports that more than one memory location can be
+written in a single step (refer to CFI details shown by <SPAN
+CLASS="emphasis"
+><I
+CLASS="emphasis"
+>detectflash</I
+></SPAN
+>). Since
+multiple locations are written in a burst-like manner with only one polling
+sequence afterwards, the overall flashing performance increases by factor of
+5-17.</P
+><P
+>In case you encounter any issues with the multi-byte write mode, run configure
+with the <SPAN
+CLASS="emphasis"
+><I
+CLASS="emphasis"
+>—disable-flash-multi-byte</I
+></SPAN
+> option and re-compile to disable this
+algorithm.</P
+></DIV
+></DIV
+><DIV
+CLASS="section"
+><HR><H2
+CLASS="section"
+><A
+NAME="_compilation_and_installation"
+>2.4. Compilation and installation</A
+></H2
+><DIV
+CLASS="section"
+><H3
+CLASS="section"
+><A
+NAME="_required_software_for_compiling_urjtag"
+>2.4.1. Required software for compiling UrJTAG</A
+></H3
+><P
+>To run autogen.sh, you need autoconf and automake, bison, and a recent flex.</P
+><P
+>The distributed source tarball contains source pregenerated with a current
+flex version; flex therefore is only needed if you want to compile code
+checked out from our Subversion repository. Flex 2.5.4a as it comes with
+most but the very latest Cygwin release cannot build the scanners for BSDL and
+SVF. Building these files requires Flex 2.5.33 or newer. The configure script
+will compare the available Flex version against these preconditions and enables
+or disables the related features.</P
+><P
+>Furthermore, libtool should be available, and "devel" versions of the following
+packages:</P
+><P
+></P
+><UL
+><LI
+><P
+> gettext
+</P
+></LI
+><LI
+><P
+> readline (not needed, but really eases interactive use)
+</P
+></LI
+><LI
+><P
+> ioperm (needed only for Cygwin)
+</P
+></LI
+></UL
+></DIV
+><DIV
+CLASS="section"
+><HR><H3
+CLASS="section"
+><A
+NAME="_required_libraries_for_usb_support"
+>2.4.2. Required libraries for USB support</A
+></H3
+><P
+>For USB adapter support (including support for parallel port adapters attached
+to USB-to-parallel converters), one or more additional libraries are required.</P
+><P
+>Many USB JTAG adapters and USB-to-parallel converters are based on chips
+made by FTDI. To support these, either intra.net's "libftdi" or FTDI's
+"FTD2XX" library can be used.</P
+><P
+>On many modern Linux distributions, libftdi is available as a precompiled
+package and can be installed using the distribution's package management system
+(e.g. "apt-get libftdi-dev" for Debian and Ubuntu). If it isn't available or
+you don't run Linux, you can get it from</P
+><P
+></P
+><UL
+><LI
+><P
+> <A
+HREF="http://www.intra2net.com/en/developer/libftdi/"
+TARGET="_top"
+>http://www.intra2net.com/en/developer/libftdi/</A
+>
+</P
+></LI
+></UL
+><P
+>Alternatively, you can use the FTD2XX library from the chip manufacturer FTDI.
+It is available for Linux and Windows. There's more information about linking
+to that library in a Cygwin environment below.</P
+><P
+>All other USB JTAG adapters can be supported only if libusb is installed.
+There is a libusb-win32 variant that can be used in a Cygwin environment:</P
+><P
+></P
+><UL
+><LI
+><P
+> <A
+HREF="http://libusb.sourceforge.net"
+TARGET="_top"
+>http://libusb.sourceforge.net</A
+> (libusb)
+</P
+></LI
+><LI
+><P
+> <A
+HREF="http://libusb-win32.sourceforge.net"
+TARGET="_top"
+>http://libusb-win32.sourceforge.net</A
+> (libusb for Windows)
+</P
+></LI
+></UL
+><P
+>For specific notes regarding the use of these libraries in a Cygwin
+environment, see below.</P
+></DIV
+><DIV
+CLASS="section"
+><HR><H3
+CLASS="section"
+><A
+NAME="_installing_from_source_tar_gz"
+>2.4.3. Installing from source tar.gz</A
+></H3
+><P
+>The installation follows the standard configure, make, make install scheme:</P
+><PRE
+CLASS="literallayout"
+>tar xzvf urjtag.tar.gz
+cd ../jtag
+./configure
+make
+make install</PRE
+></DIV
+><DIV
+CLASS="section"
+><HR><H3
+CLASS="section"
+><A
+NAME="_installing_from_subversion_repository"
+>2.4.4. Installing from Subversion repository</A
+></H3
+><P
+>If you want to try the very newest version of UrJTAG…</P
+><PRE
+CLASS="literallayout"
+>svn co http://urjtag.svn.sourceforge.net/svnroot/urjtag/trunk urjtag</PRE
+><PRE
+CLASS="literallayout"
+>cd urjtag/jtag
+./autogen.sh
+# ./configure done by autogen.sh; run it here with special options if needed
+make
+make install</PRE
+></DIV
+><DIV
+CLASS="section"
+><HR><H3
+CLASS="section"
+><A
+NAME="_linking_to_ftd2xx_dll_in_cygwin_environment"
+>2.4.5. Linking to FTD2XX.DLL in Cygwin environment</A
+></H3
+><P
+>Before running configure, get the D2XX drivers from FTDI.</P
+><P
+></P
+><UL
+><LI
+><P
+> <A
+HREF="http://www.ftdichip.com/Drivers/D2XX.htm"
+TARGET="_top"
+>http://www.ftdichip.com/Drivers/D2XX.htm</A
+> (FTDI FTD2XX library)
+</P
+></LI
+></UL
+><P
+>Unzip the archive into a directory of your choice (probably a choice
+without spaces in the name is better) and afterwards run configure with the
+"—with-ftd2xx" pointing to that directory, e.g.</P
+><PRE
+CLASS="literallayout"
+>./configure --with-ftd2xx="/cygdrive/c/temp/ftdi-cdm-drivers"</PRE
+><P
+>Configure should now report</P
+><PRE
+CLASS="literallayout"
+>jtag is now configured for
+ ...
+ Detected libftd2xx : yes</PRE
+></DIV
+><DIV
+CLASS="section"
+><HR><H3
+CLASS="section"
+><A
+NAME="_using_libusb_win32_in_cygwin_environment"
+>2.4.6. Using LibUSB-Win32 in Cygwin environment</A
+></H3
+><P
+>Before running configure, install the LibUSB-Win32 "filter" driver from SF.</P
+><P
+></P
+><UL
+><LI
+><P
+> <A
+HREF="http://libusb-win32.sourceforge.net"
+TARGET="_top"
+>http://libusb-win32.sourceforge.net</A
+>
+</P
+></LI
+></UL
+><P
+>Then point configure to the directory where LibUSB-Win32 was installed (it
+might give problems if the path contains spaces, as "Program Files" does!):</P
+><PRE
+CLASS="literallayout"
+>./configure --with-libusb="/cygdrive/c/Programme/LibUSB-Win32/"</PRE
+></DIV
+><DIV
+CLASS="section"
+><HR><H3
+CLASS="section"
+><A
+NAME="_compiling_with_mingw"
+>2.4.7. Compiling with MinGW</A
+></H3
+><P
+>UrJTAG may be compiled into a Windows executable using the MinGW compiler
+(<A
+HREF="http://www.mingw.org"
+TARGET="_top"
+>http://www.mingw.org</A
+>), or Cygwin GCC with the "-mno-cygwin" compiler flag.</P
+><P
+>This has the advantage over running in a Cygwin environment that you don't need
+to install anything else but the jtag.exe (plus libraries like FTD2XX.dll or
+InpOut32.DLL that are required for device access under Windows in any case).</P
+><P
+>However, because support for MinGW is quite new in UrJTAG, it may lack some
+features (e.g. readline support) or run a little slower.</P
+><P
+>Because it seems to be easier to set up a Cygwin environment, we recommend
+using the Cygwin GCC with "-mno-cygwin" flag instead of using a MinGW setup:</P
+><PRE
+CLASS="literallayout"
+>CFLAGS="-mno-cygwin -O2" ./configure --with-ftd2xx=/tmp/cdm-drivers --with-inpout32</PRE
+><P
+>It is even possible to cross-compile and build the executable on a Linux
+host:</P
+><PRE
+CLASS="literallayout"
+>./configure --host=i586-mingw32msvc --with-ftd2xx=/tmp/cdm-drivers --with-inpout32
+make</PRE
+><P
+>The "—with-inpout32" switch tells UrJTAG to use the InpOut32.DLL for access to
+parallel ports, because the Cygwin ioperm isn't available for MinGW. The InpOut32
+library is available from logix4u.net:</P
+><PRE
+CLASS="literallayout"
+>http://logix4u.net/Legacy_Ports/Parallel_Port/Inpout32.dll_for_Windows_98/2000/NT/XP.html</PRE
+></DIV
+><DIV
+CLASS="section"
+><HR><H3
+CLASS="section"
+><A
+NAME="_driver_tailoring"
+>2.4.8. Driver tailoring</A
+></H3
+><P
+>The configure script enables all default bus, cable and lowlevel drivers. You
+can include and exclude specific drivers if required. For a list of parameters
+run</P
+><PRE
+CLASS="literallayout"
+>./configure --help</PRE
+><P
+>to figure out the appropriate —enable-bus, —enable-cable and —enable-lowlevel
+options.</P
+></DIV
+><DIV
+CLASS="section"
+><HR><H3
+CLASS="section"
+><A
+NAME="_building_the_bsdl_subsystem"
+>2.4.9. Building the BSDL subsystem</A
+></H3
+><P
+>As mentioned above, building the BSDL lexer requires Flex 2.5.33 or newer. If
+the detected Flex version is not recent enough, configure will disable the
+BSDL subsystem. The detection result is summarized at the end of configure:</P
+><PRE
+CLASS="literallayout"
+>jtag is now configured for
+ ...
+ Build BSDL subsystem : yes</PRE
+><P
+>Flex is only required when you're working on a check-out of the Subversion
+repository. In this case Flex has to be called to transform bsdl_flex.l to
+bsdl_flex.c. When you're compiling from released sources, the local Flex
+version is not relevant since the output file of Flex is part of the
+tarball. I.e. even if the local Flex fails the check, the BSDL subsystem is
+enabled and will be compiled from the released C files.</P
+></DIV
+></DIV
+></DIV
+><DIV
+CLASS="chapter"
+><HR><H1
+><A
+NAME="_usage"
+></A
+>Chapter 3. Usage</H1
+><DIV
+CLASS="section"
+><H2
+CLASS="section"
+><A
+NAME="_quick_start"
+>3.1. Quick start</A
+></H2
+><DIV
+CLASS="section"
+><H3
+CLASS="section"
+><A
+NAME="_run_the_software"
+>3.1.1. Run the software</A
+></H3
+><P
+>Connect your JTAG adapter between your PC and target device and turn
+on your device.</P
+><P
+>To run JTAG Tools type "jtag" and press Enter. jtag should start and
+display some initial informations. Output should end with line like this:</P
+><PRE
+CLASS="literallayout"
+>This is "jtag command prompt". Type "help" and press Enter for initial help
+about available commands. To exit JTAG Tools type "quit" and press Enter.</PRE
+></DIV
+><DIV
+CLASS="section"
+><HR><H3
+CLASS="section"
+><A
+NAME="_configure_the_cable"
+>3.1.2. Configure the cable</A
+></H3
+><P
+>Type "help cable" for list of supported JTAG cables.</P
+><P
+>Type "cable" command followed by the cable name and possibly further
+arguments for cable configuration. Example:</P
+><PRE
+CLASS="literallayout"
+>jtag> cable EA253 parallel 0x378
+Initializing ETC EA253 JTAG Cable on parallel port at 0x378</PRE
+><P
+>See the section about the "cable" command for details and USB support.</P
+></DIV
+><DIV
+CLASS="section"
+><HR><H3
+CLASS="section"
+><A
+NAME="_detect_parts_on_the_jtag_chain"
+>3.1.3. Detect parts on the JTAG chain</A
+></H3
+><P
+>Type "detect" at the jtag command prompt:</P
+><PRE
+CLASS="literallayout"
+>jtag> detect</PRE
+><P
+>Your output should look like this:</P
+><PRE
+CLASS="literallayout"
+>IR length: 5
+Chain length: 1
+Device Id: 01011001001001100100000000010011
+ Manufacturer: Intel
+ Part: PXA250
+ Stepping: C0
+ Filename: /usr/local/share/urjtag/intel/pxa250/pxa250c0</PRE
+><P
+>If you get empty output or an error message your JTAG adapter is not connected
+properly, or your target board doesn't work, or it is turned off.</P
+><P
+>The "detect" command is required before all other commands.</P
+></DIV
+><DIV
+CLASS="section"
+><HR><H3
+CLASS="section"
+><A
+NAME="_print_current_jtag_chain_status"
+>3.1.4. Print current JTAG chain status</A
+></H3
+><PRE
+CLASS="literallayout"
+>jtag> print chain
+ No. Manufacturer Part Stepping Instruction Register
+---------------------------------------------------------
+ 0 Intel PXA250 C0 BYPASS BR</PRE
+></DIV
+><DIV
+CLASS="section"
+><HR><H3
+CLASS="section"
+><A
+NAME="_sample_device_pin_status"
+>3.1.5. Sample device pin status</A
+></H3
+><PRE
+CLASS="literallayout"
+>jtag> instruction SAMPLE/PRELOAD
+jtag> shift ir
+jtag> shift dr
+jtag> dr
+1000110010000010000110010111111111111111111001101110...
+jtag> print chain
+ No. Manufacturer Part Stepping Instruction Register
+------------------------------------------------------------
+ 0 Intel PXA250 C0 SAMPLE/PRELOAD BSR
+jtag> get signal BOOT_SEL[0]
+BOOT_SEL[0] = 0
+jtag></PRE
+><PRE
+CLASS="literallayout"
+>Note: BSR is "Boundary Scan Register"</PRE
+></DIV
+><DIV
+CLASS="section"
+><HR><H3
+CLASS="section"
+><A
+NAME="_burn_flash_connected_to_the_part"
+>3.1.6. Burn flash connected to the part</A
+></H3
+><PRE
+CLASS="literallayout"
+>jtag> flashmem 0 brux.b
+0x00000000
+Note: Supported configuration is 2 x 16 bit only
+BOOT_SEL: Asynchronous 32-bit ROM</PRE
+><PRE
+CLASS="literallayout"
+>2 x 16 bit CFI devices detected (QRY ok)!</PRE
+><PRE
+CLASS="literallayout"
+>program:
+block 0 unlocked
+erasing block 0: 0
+addr: 0x00002854
+verify:
+addr: 0x00002854
+Done.
+jtag></PRE
+><P
+>or:</P
+><PRE
+CLASS="literallayout"
+>jtag> flashmem msbin xboot.bin
+Note: Supported configuration is 2 x 16 bit only
+BOOT_SEL: Asynchronous 32-bit ROM</PRE
+><PRE
+CLASS="literallayout"
+>2 x 16 bit CFI devices detected (QRY ok)!</PRE
+><PRE
+CLASS="literallayout"
+>block 0 unlocked
+erasing block 0: 0
+program:
+record: start = 0x00000000, len = 0x00000004, checksum = 0x000001EB
+record: start = 0x00000040, len = 0x00000008, checksum = 0x000001B0
+record: start = 0x00001000, len = 0x00002B30, checksum = 0x00122CAB
+record: start = 0x00004000, len = 0x00000160, checksum = 0x0000684B
+record: start = 0x00005000, len = 0x00000054, checksum = 0x000008EE
+record: start = 0x00005054, len = 0x00000030, checksum = 0x00000DA9
+record: start = 0x00000000, len = 0x00001000, checksum = 0x00000000</PRE
+><PRE
+CLASS="literallayout"
+>verify:
+record: start = 0x00000000, len = 0x00000004, checksum = 0x000001EB
+record: start = 0x00000040, len = 0x00000008, checksum = 0x000001B0
+record: start = 0x00001000, len = 0x00002B30, checksum = 0x00122CAB
+record: start = 0x00004000, len = 0x00000160, checksum = 0x0000684B
+record: start = 0x00005000, len = 0x00000054, checksum = 0x000008EE
+record: start = 0x00005054, len = 0x00000030, checksum = 0x00000DA9
+record: start = 0x00000000, len = 0x00001000, checksum = 0x00000000</PRE
+><PRE
+CLASS="literallayout"
+>Done.
+jtag></PRE
+></DIV
+></DIV
+><DIV
+CLASS="section"
+><HR><H2
+CLASS="section"
+><A
+NAME="_jtag_commands"
+>3.2. JTAG commands</A
+></H2
+><DIV
+CLASS="section"
+><H3
+CLASS="section"
+><A
+NAME="_overview"
+>3.2.1. Overview</A
+></H3
+><P
+>Following is a list of commands currently supported by jtag and some
+example usage.</P
+><DIV
+CLASS="informaltable"
+><P
+></P
+><A
+NAME="AEN393"
+></A
+><TABLE
+BORDER="0"
+FRAME="void"
+RULES="none"
+CLASS="CALSTABLE"
+><COL
+WIDTH="3*"><COL
+WIDTH="7*"><TBODY
+VALIGN="top"
+><TR
+><TD
+><P
+> <SPAN
+CLASS="strong"
+><B
+CLASS="emphasis"
+>bit</B
+></SPAN
+>
+</P
+></TD
+><TD
+> <P
+> define new BSR bit
+</P
+>
+</TD
+></TR
+><TR
+><TD
+><P
+> <SPAN
+CLASS="strong"
+><B
+CLASS="emphasis"
+>bus</B
+></SPAN
+>
+</P
+></TD
+><TD
+> <P
+> change active bus
+</P
+>
+</TD
+></TR
+><TR
+><TD
+><P
+> <SPAN
+CLASS="strong"
+><B
+CLASS="emphasis"
+>bsdl</B
+></SPAN
+>
+</P
+></TD
+><TD
+> <P
+> manage BSDL files
+</P
+>
+</TD
+></TR
+><TR
+><TD
+><P
+> <SPAN
+CLASS="strong"
+><B
+CLASS="emphasis"
+>cable</B
+></SPAN
+>
+</P
+></TD
+><TD
+> <P
+> select JTAG cable
+</P
+>
+</TD
+></TR
+><TR
+><TD
+><P
+> <SPAN
+CLASS="strong"
+><B
+CLASS="emphasis"
+>detect</B
+></SPAN
+>
+</P
+></TD
+><TD
+> <P
+> detect parts on the JTAG chain
+</P
+>
+</TD
+></TR
+><TR
+><TD
+><P
+> <SPAN
+CLASS="strong"
+><B
+CLASS="emphasis"
+>detectflash</B
+></SPAN
+>
+</P
+></TD
+><TD
+> <P
+> detect parameters of flash chips attached to a part
+</P
+>
+</TD
+></TR
+><TR
+><TD
+><P
+> <SPAN
+CLASS="strong"
+><B
+CLASS="emphasis"
+>discovery</B
+></SPAN
+>
+</P
+></TD
+><TD
+> <P
+> discovery of unknown parts in the JTAG chain
+</P
+>
+</TD
+></TR
+><TR
+><TD
+><P
+> <SPAN
+CLASS="strong"
+><B
+CLASS="emphasis"
+>dr</B
+></SPAN
+>
+</P
+></TD
+><TD
+> <P
+> display or set active data register for a part
+</P
+>
+</TD
+></TR
+><TR
+><TD
+><P
+> <SPAN
+CLASS="strong"
+><B
+CLASS="emphasis"
+>endian</B
+></SPAN
+>
+</P
+></TD
+><TD
+> <P
+> set/print endianess for reading/writing binary files
+</P
+>
+</TD
+></TR
+><TR
+><TD
+><P
+> <SPAN
+CLASS="strong"
+><B
+CLASS="emphasis"
+>eraseflash</B
+></SPAN
+>
+</P
+></TD
+><TD
+> <P
+> erase flash memory by number of blocks
+</P
+>
+</TD
+></TR
+><TR
+><TD
+><P
+> <SPAN
+CLASS="strong"
+><B
+CLASS="emphasis"
+>flashmem</B
+></SPAN
+>
+</P
+></TD
+><TD
+> <P
+> burn flash memory with data from a file
+</P
+>
+</TD
+></TR
+><TR
+><TD
+><P
+> <SPAN
+CLASS="strong"
+><B
+CLASS="emphasis"
+>frequency</B
+></SPAN
+>
+</P
+></TD
+><TD
+> <P
+> setup JTAG frequency
+</P
+>
+</TD
+></TR
+><TR
+><TD
+><P
+> <SPAN
+CLASS="strong"
+><B
+CLASS="emphasis"
+>get</B
+></SPAN
+>
+</P
+></TD
+><TD
+> <P
+> get external signal value
+</P
+>
+</TD
+></TR
+><TR
+><TD
+><P
+> <SPAN
+CLASS="strong"
+><B
+CLASS="emphasis"
+>help</B
+></SPAN
+>
+</P
+></TD
+><TD
+> <P
+> display this help
+</P
+>
+</TD
+></TR
+><TR
+><TD
+><P
+> <SPAN
+CLASS="strong"
+><B
+CLASS="emphasis"
+>include</B
+></SPAN
+>
+</P
+></TD
+><TD
+> <P
+> include command sequence from external file
+</P
+>
+</TD
+></TR
+><TR
+><TD
+><P
+> <SPAN
+CLASS="strong"
+><B
+CLASS="emphasis"
+>initbus</B
+></SPAN
+>
+</P
+></TD
+><TD
+> <P
+> initialize bus driver for active part
+</P
+>
+</TD
+></TR
+><TR
+><TD
+><P
+> <SPAN
+CLASS="strong"
+><B
+CLASS="emphasis"
+>instruction</B
+></SPAN
+>
+</P
+></TD
+><TD
+> <P
+> change active instruction for a part or declare new instruction
+</P
+>
+</TD
+></TR
+><TR
+><TD
+><P
+> <SPAN
+CLASS="strong"
+><B
+CLASS="emphasis"
+>part</B
+></SPAN
+>
+</P
+></TD
+><TD
+> <P
+> change active part for current JTAG chain
+</P
+>
+</TD
+></TR
+><TR
+><TD
+><P
+> <SPAN
+CLASS="strong"
+><B
+CLASS="emphasis"
+>peek</B
+></SPAN
+>
+</P
+></TD
+><TD
+> <P
+> read a single word
+</P
+>
+</TD
+></TR
+><TR
+><TD
+><P
+> <SPAN
+CLASS="strong"
+><B
+CLASS="emphasis"
+>poke</B
+></SPAN
+>
+</P
+></TD
+><TD
+> <P
+> write a single word
+</P
+>
+</TD
+></TR
+><TR
+><TD
+><P
+> <SPAN
+CLASS="strong"
+><B
+CLASS="emphasis"
+>print</B
+></SPAN
+>
+</P
+></TD
+><TD
+> <P
+> display JTAG chain list/status
+</P
+>
+</TD
+></TR
+><TR
+><TD
+><P
+> <SPAN
+CLASS="strong"
+><B
+CLASS="emphasis"
+>quit</B
+></SPAN
+>
+</P
+></TD
+><TD
+> <P
+> exit and terminate this session
+</P
+>
+</TD
+></TR
+><TR
+><TD
+><P
+> <SPAN
+CLASS="strong"
+><B
+CLASS="emphasis"
+>readmem</B
+></SPAN
+>
+</P
+></TD
+><TD
+> <P
+> read content of the memory and write it to file
+</P
+>
+</TD
+></TR
+><TR
+><TD
+><P
+> <SPAN
+CLASS="strong"
+><B
+CLASS="emphasis"
+>register</B
+></SPAN
+>
+</P
+></TD
+><TD
+> <P
+> define new data register for a part
+</P
+>
+</TD
+></TR
+><TR
+><TD
+><P
+> <SPAN
+CLASS="strong"
+><B
+CLASS="emphasis"
+>scan</B
+></SPAN
+>
+</P
+></TD
+><TD
+> <P
+> detect changes on input pins of current part
+</P
+>
+</TD
+></TR
+><TR
+><TD
+><P
+> <SPAN
+CLASS="strong"
+><B
+CLASS="emphasis"
+>set</B
+></SPAN
+>
+</P
+></TD
+><TD
+> <P
+> set external signal value
+</P
+>
+</TD
+></TR
+><TR
+><TD
+><P
+> <SPAN
+CLASS="strong"
+><B
+CLASS="emphasis"
+>shift</B
+></SPAN
+>
+</P
+></TD
+><TD
+> <P
+> shift data/instruction registers through JTAG chain
+</P
+>
+</TD
+></TR
+><TR
+><TD
+><P
+> <SPAN
+CLASS="strong"
+><B
+CLASS="emphasis"
+>signal</B
+></SPAN
+>
+</P
+></TD
+><TD
+> <P
+> define new signal for a part
+</P
+>
+</TD
+></TR
+><TR
+><TD
+><P
+> <SPAN
+CLASS="strong"
+><B
+CLASS="emphasis"
+>svf</B
+></SPAN
+>
+</P
+></TD
+><TD
+> <P
+> execute svf commands from file
+</P
+>
+</TD
+></TR
+><TR
+><TD
+><P
+> <SPAN
+CLASS="strong"
+><B
+CLASS="emphasis"
+>writemem</B
+></SPAN
+>
+</P
+></TD
+><TD
+> <P
+> write content from file to memory
+</P
+>
+</TD
+></TR
+></TBODY
+></TABLE
+><P
+></P
+></DIV
+><P
+>Some tools derived from the same openwince JTAG Tools code base as UrJTAG
+know additional commands, which are not supported in UrJTAG. See the section
+about "Unsupported commands", below, about workarounds.</P
+></DIV
+><DIV
+CLASS="section"
+><HR><H3
+CLASS="section"
+><A
+NAME="_basic_commands"
+>3.2.2. Basic commands</A
+></H3
+><DIV
+CLASS="section"
+><H4
+CLASS="section"
+><A
+NAME="_quit"
+>3.2.2.1. quit</A
+></H4
+><P
+>This command closes the jtag console.</P
+></DIV
+><DIV
+CLASS="section"
+><HR><H4
+CLASS="section"
+><A
+NAME="_help"
+>3.2.2.2. help</A
+></H4
+><P
+>Without additional parameter it gives an overview of the available commands.
+With a parameter you can get more information about any of the commands.
+Example:</P
+><PRE
+CLASS="literallayout"
+>jtag> help cable</PRE
+><P
+>Most cable drivers require some more details about the cable to start properly.
+To learn about the details, use the "cable" command with the name of the cable
+followed by the word "help". Example:</P
+><PRE
+CLASS="literallayout"
+>jtag> cable wiggler help</PRE
+></DIV
+><DIV
+CLASS="section"
+><HR><H4
+CLASS="section"
+><A
+NAME="_include"
+>3.2.2.3. include</A
+></H4
+><P
+>Run commands from a named script file installed with UrJTAG or applies a BSDL
+file to the active part. The directory prefix is added automatically
+(e.g. /usr/share/urjtag/, depending on your installation), unless the file
+name starts with a dot or slash.</P
+><P
+>For example, the following startup sequence configures the cable, chain, and
+loads definitions and bus driver for a Samsung S3C4510B CPU to peek its memory
+at 0x0:</P
+><PRE
+CLASS="literallayout"
+>jtag> cable wiggler ppdev /dev/parport0
+jtag> detect
+jtag> include samsung/s3c4510b/s3c4510b
+jtag> peek 0x0000</PRE
+><P
+>If the file contains valid BSDL syntax, it will be converted to native
+commands on the fly.</P
+><P
+>Optionally, a number X may be specified following the file name, to cause
+an X times repetition of the command sequence from the file.</P
+></DIV
+></DIV
+><DIV
+CLASS="section"
+><HR><H3
+CLASS="section"
+><A
+NAME="_chain_management"
+>3.2.3. Chain management</A
+></H3
+><DIV
+CLASS="section"
+><H4
+CLASS="section"
+><A
+NAME="_cable"
+>3.2.3.1. cable</A
+></H4
+><P
+>Sets and initialized the cable driver. This is usually the first command that
+you are executing in a session. Example:</P
+><PRE
+CLASS="literallayout"
+>jtag> cable EA253 parallel 0x378
+Initializing ETC EA253 JTAG Cable on parallel port at 0x378</PRE
+><P
+>For a parallel cable using the ppdev driver you would use this:</P
+><PRE
+CLASS="literallayout"
+>jtag> cable DLC5 ppdev /dev/parport0</PRE
+><P
+>If you get an error, it may be that the parallel port kernel driver
+was compiled as a module in your Linux kernel and wasn't loaded automatically.
+Then you should try to load the ppdev driver manually (with root rights outside
+the jtag shell):</P
+><PRE
+CLASS="literallayout"
+>modprobe ppdev
+modprobe parport
+modprobe parport_pc</PRE
+><P
+>UrJTAG now also supports some USB cables. Unfortunately, there is no standard
+for "JTAG over USB", so this support is limited to a few selected cables only.
+For cables based on the FT2232 chip from FTDI, the cable command has to be
+given cable name and optionally the driver name, USB Vendor, and Product ID of
+the cable:</P
+><PRE
+CLASS="literallayout"
+>jtag> cable ARM-USB-OCD vid=15ba pid=0003 driver=ftdi-mpsse</PRE
+><P
+>For all known cables, UrJTAG knows the VID and PID so you can just say</P
+><PRE
+CLASS="literallayout"
+>jtag> cable ARM-USB-OCD</PRE
+><P
+>If your cable isn't detected automatically though it's listed as a known and
+supported cable, feel free to report its VID and PID. It might be a different
+revision and should be added to the known & tested list of cables.</P
+><P
+>As stated above, the driver name is not mandatory for the cable
+command. UrJTAG will select the driver automatically based on UrJTAG's
+configuration. In case your system provides just one of libftdi or FTD2XX
+the respective driver is selected. If both libraries are available, then
+FTD2XX is selected. That's simply because FTD2XX showed some performance
+advantages over libftdi in the past. You can still force libftdi with the
+respective parameter.</P
+><DIV
+CLASS="warning"
+><P
+></P
+><TABLE
+CLASS="warning"
+WIDTH="100%"
+BORDER="0"
+><TR
+><TD
+WIDTH="25"
+ALIGN="CENTER"
+VALIGN="TOP"
+><IMG
+SRC="../images/warning.gif"
+HSPACE="5"
+ALT="Warning"></TD
+><TD
+ALIGN="LEFT"
+VALIGN="TOP"
+><P
+>There's one quirk to consider when using FTDI's FTD2XX driver. It
+connects to any known FTDI chip, randomly. I.e. if there's more than one FTDI
+device connected to the host, chances are that the driver connects to the
+wrong USB device. This might be an OEM USB-serial converter and you'll be
+banging your head why there's no proper reading from the JTAG chain. Therefore
+it's strongly recommended to specify the desc=xxx parameter for the cable
+command if the ftd2xx driver is to be used. Set xxx to the product or serial
+number descriptor string that are exhibited by the USB device.</P
+></TD
+></TR
+></TABLE
+></DIV
+></DIV
+><DIV
+CLASS="section"
+><HR><H4
+CLASS="section"
+><A
+NAME="_detect"
+>3.2.3.2. detect</A
+></H4
+><P
+>Detects devices on the chain. Example:</P
+><PRE
+CLASS="literallayout"
+>jtag> detect
+IR length: 5
+Chain length: 1
+Device Id: 01011001001001100100000000010011
+ Manufacturer: Intel
+ Part: PXA250
+ Stepping: C0
+ Filename: /usr/local/share/jtag/intel/pxa250/pxa250c0</PRE
+><P
+>During "detect", UrJTAG searches through the files in its database (usually in
+/usr/share/urjtag) and optionally in the search path for BSDL files (see bsdl
+command) to find a match for the manufacturer, revision and part number for the
+IDCODE read from the part. However, not all parts identify themselves in a way
+that is useful for "detect". For example, many chips with an ARM processor core
+inside present an IDCODE that may be specific to the the particular core inside
+the chip (e.g. ARM7TDMI), but doesn't tell about the actual manufacturer of
+the chip. In such case, the data for the part has to be included manually. See
+also the documentation for the "include" command.</P
+></DIV
+><DIV
+CLASS="section"
+><HR><H4
+CLASS="section"
+><A
+NAME="_print"
+>3.2.3.3. print</A
+></H4
+><P
+>Print a list of parts in the chain and the currently active instruction per part.
+Further details of bus, signals and instructions can be obtained with dedicated
+command options, see "help print".</P
+></DIV
+><DIV
+CLASS="section"
+><HR><H4
+CLASS="section"
+><A
+NAME="_initbus"
+>3.2.3.4. initbus</A
+></H4
+><P
+>Selects and initializes a bus of the currently selected part, e.g. the external
+memory bus of a CPU. This is required in order to access chips that aren't
+connected in the JTAG chain, but indirectly accessible through other chips
+(e.g. CPU or programmable logic).</P
+><P
+>Type "help initbus" to get a list of supported bus types.
+If you do not find a bus driver for your specific hardware, you might be lucky
+enough to have EJTAG in your target (most MIPS-based CPUs do) and should try
+the "ejtag" bus driver. In contrast to the method "via BSR", it uploads some
+instructions to the CPU and triggers their execution to access the bus, and
+should work with almost any EJTAG-capable chip (Note: JTAG isn't EJTAG):</P
+><PRE
+CLASS="literallayout"
+>jtag> initbus ejtag</PRE
+><P
+>There's another option to support new chips "via BSR", the "prototype" bus
+driver, which can be adapted to support your part with command parameters.
+The only prerequisite for using this driver is knowledge of the names of the
+signals that represent address bus, data bus, and enable signals, and that
+address and data lines are numbered in order.</P
+><P
+>For example, assume the signals are named in the BSDL description as follows:</P
+><P
+></P
+><UL
+><LI
+><P
+> Data bus: D0, D1, … D31
+</P
+></LI
+><LI
+><P
+> Address bus: ADDR0, ADDR1, … ADDR22
+</P
+></LI
+><LI
+><P
+> Output Enable: nOE
+</P
+></LI
+><LI
+><P
+> Write Enable: nWE
+</P
+></LI
+><LI
+><P
+> Chip Select: nRCS0
+</P
+></LI
+></UL
+><P
+>The enable signals seem to be active low (indicated by the leading "n" in their
+names). Further we assume the interesting connected part, some flash chip, is
+only 16 bits wide even though the data bus width is 32 bits. With this
+information, you could use the following command (all on a single line!) to
+access the bus:</P
+><PRE
+CLASS="literallayout"
+>initbus prototype amsb=ADDR22 alsb=ADDR0 dmsb=D15 dlsb=D0
+ ncs=nRCS0 nwe=nWE noe=nOE amode=x16</PRE
+><P
+>The "prototype" bus driver yet cannot deal with systems where address and data
+bus are multiplexed on the same pins. If signals aren't numbered in the right
+order or with gaps, you may get along by defining proper names as aliases for
+the actual signals, with commands like "salias ADDR12 BSCGX44".</P
+><P
+>Most drivers work "via BSR", i.e. they directly access the pins of the device.
+Because it isn't possible to efficiently address only particular pins but only
+all at once, and data for all pins has to be transferred through JTAG for every
+single change, this method isn't the fastest, but usually easiest to implement
+and, well, sometimes it counts whether it works at all..</P
+><P
+>The "fjmem" (FPGA JTAG memory) bus driver attempts to address this issue by
+moving control and observation away from BSR to a device-internal
+register. For sure this is only possible on FPGAs where the designer can hook
+additional logic to the JTAG chain. A core design plus examples for different
+FPGA families is available in the extra/fjmem directory. Refer to the README
+located there.</P
+><P
+>Some chips don't allow direct access to their pins via BSR at all. For these,
+writing a new bus driver that utilizes a debug module to upload specific code
+to access the bus is inevitable.</P
+></DIV
+><DIV
+CLASS="section"
+><HR><H4
+CLASS="section"
+><A
+NAME="_bus"
+>3.2.3.5. bus</A
+></H4
+><P
+>It's possible to initialize more than one bus for part(s) within a chain. The
+"bus" command allows to select the active bus for readmem, flashmem,
+etc. operation.</P
+></DIV
+></DIV
+><DIV
+CLASS="section"
+><HR><H3
+CLASS="section"
+><A
+NAME="_part_definition_commands"
+>3.2.4. Part definition commands</A
+></H3
+><P
+>The following commands are also used in the data files to define a device (IC)
+on the JTAG chain. It is not recommended to use these commands in an interactive
+session. Instead you should produce a device definition file out of a .bsd file
+using one of the supplied tools (or use the new BSDL subsystem, see below).</P
+><DIV
+CLASS="informaltable"
+><P
+></P
+><A
+NAME="AEN653"
+></A
+><TABLE
+BORDER="0"
+FRAME="void"
+RULES="none"
+CLASS="CALSTABLE"
+><COL
+WIDTH="3*"><COL
+WIDTH="7*"><TBODY
+VALIGN="top"
+><TR
+><TD
+><P
+> <SPAN
+CLASS="strong"
+><B
+CLASS="emphasis"
+>bit</B
+></SPAN
+>
+</P
+></TD
+><TD
+> <P
+> define new BSR bit
+</P
+>
+</TD
+></TR
+><TR
+><TD
+><P
+> <SPAN
+CLASS="strong"
+><B
+CLASS="emphasis"
+>instruction</B
+></SPAN
+>
+</P
+></TD
+><TD
+> <P
+> change active instruction for a part or declare new instruction
+</P
+>
+</TD
+></TR
+><TR
+><TD
+><P
+> <SPAN
+CLASS="strong"
+><B
+CLASS="emphasis"
+>register</B
+></SPAN
+>
+</P
+></TD
+><TD
+> <P
+> define new data register for a part
+</P
+>
+</TD
+></TR
+><TR
+><TD
+><P
+> <SPAN
+CLASS="strong"
+><B
+CLASS="emphasis"
+>signal</B
+></SPAN
+>
+</P
+></TD
+><TD
+> <P
+> define new signal for a part
+</P
+>
+</TD
+></TR
+></TBODY
+></TABLE
+><P
+></P
+></DIV
+></DIV
+><DIV
+CLASS="section"
+><HR><H3
+CLASS="section"
+><A
+NAME="_tap_control"
+>3.2.5. TAP control</A
+></H3
+><P
+>The following commands can be used to directly manipulate and display the state
+of the TAP controller(s) and registers in the chain:</P
+><DIV
+CLASS="informaltable"
+><P
+></P
+><A
+NAME="AEN685"
+></A
+><TABLE
+BORDER="0"
+FRAME="void"
+RULES="none"
+CLASS="CALSTABLE"
+><COL
+WIDTH="3*"><COL
+WIDTH="7*"><TBODY
+VALIGN="top"
+><TR
+><TD
+><P
+> <SPAN
+CLASS="strong"
+><B
+CLASS="emphasis"
+>dr</B
+></SPAN
+>
+</P
+></TD
+><TD
+> <P
+> display or set active data register for a part
+</P
+>
+</TD
+></TR
+><TR
+><TD
+><P
+> <SPAN
+CLASS="strong"
+><B
+CLASS="emphasis"
+>instruction</B
+></SPAN
+>
+</P
+></TD
+><TD
+> <P
+> change active instruction for a part or declare new instruction
+</P
+>
+</TD
+></TR
+><TR
+><TD
+><P
+> <SPAN
+CLASS="strong"
+><B
+CLASS="emphasis"
+>get</B
+></SPAN
+>
+</P
+></TD
+><TD
+> <P
+> get external signal value
+</P
+>
+</TD
+></TR
+><TR
+><TD
+><P
+> <SPAN
+CLASS="strong"
+><B
+CLASS="emphasis"
+>pod</B
+></SPAN
+>
+</P
+></TD
+><TD
+> <P
+> low level direct access to POD signals like TRST; use with care
+</P
+>
+</TD
+></TR
+><TR
+><TD
+><P
+> <SPAN
+CLASS="strong"
+><B
+CLASS="emphasis"
+>scan</B
+></SPAN
+>
+</P
+></TD
+><TD
+> <P
+> detect changes on input pins of current part
+</P
+>
+</TD
+></TR
+><TR
+><TD
+><P
+> <SPAN
+CLASS="strong"
+><B
+CLASS="emphasis"
+>set</B
+></SPAN
+>
+</P
+></TD
+><TD
+> <P
+> set external signal value
+</P
+>
+</TD
+></TR
+><TR
+><TD
+><P
+> <SPAN
+CLASS="strong"
+><B
+CLASS="emphasis"
+>shift</B
+></SPAN
+>
+</P
+></TD
+><TD
+> <P
+> shift data/instruction registers through JTAG chain
+</P
+>
+</TD
+></TR
+></TBODY
+></TABLE
+><P
+></P
+></DIV
+></DIV
+><DIV
+CLASS="section"
+><HR><H3
+CLASS="section"
+><A
+NAME="_ram_flash_access"
+>3.2.6. RAM/Flash access</A
+></H3
+><P
+>These commands can be used if a part in the chain has memory connected to it
+(or integrated). Before they can be used, a bus driver has to be selected and
+initialized (see initbus command).</P
+><DIV
+CLASS="informaltable"
+><P
+></P
+><A
+NAME="AEN735"
+></A
+><TABLE
+BORDER="0"
+FRAME="void"
+RULES="none"
+CLASS="CALSTABLE"
+><COL
+WIDTH="3*"><COL
+WIDTH="7*"><TBODY
+VALIGN="top"
+><TR
+><TD
+><P
+> <SPAN
+CLASS="strong"
+><B
+CLASS="emphasis"
+>detectflash</B
+></SPAN
+>
+</P
+></TD
+><TD
+> <P
+> detect parameters of flash chips attached to a part
+</P
+>
+</TD
+></TR
+><TR
+><TD
+><P
+> <SPAN
+CLASS="strong"
+><B
+CLASS="emphasis"
+>endian</B
+></SPAN
+>
+</P
+></TD
+><TD
+> <P
+> set/print endianess for reading/writing binary files
+</P
+>
+</TD
+></TR
+><TR
+><TD
+><P
+> <SPAN
+CLASS="strong"
+><B
+CLASS="emphasis"
+>eraseflash</B
+></SPAN
+>
+</P
+></TD
+><TD
+> <P
+> erase flash memory by number of blocks
+</P
+>
+</TD
+></TR
+><TR
+><TD
+><P
+> <SPAN
+CLASS="strong"
+><B
+CLASS="emphasis"
+>flashmem</B
+></SPAN
+>
+</P
+></TD
+><TD
+> <P
+> burn flash memory with data from a file
+</P
+>
+</TD
+></TR
+><TR
+><TD
+><P
+> <SPAN
+CLASS="strong"
+><B
+CLASS="emphasis"
+>peek</B
+></SPAN
+>
+</P
+></TD
+><TD
+> <P
+> read a single word
+</P
+>
+</TD
+></TR
+><TR
+><TD
+><P
+> <SPAN
+CLASS="strong"
+><B
+CLASS="emphasis"
+>poke</B
+></SPAN
+>
+</P
+></TD
+><TD
+> <P
+> write a single word
+</P
+>
+</TD
+></TR
+><TR
+><TD
+><P
+> <SPAN
+CLASS="strong"
+><B
+CLASS="emphasis"
+>readmem</B
+></SPAN
+>
+</P
+></TD
+><TD
+> <P
+> read content of the memory and write it to file
+</P
+>
+</TD
+></TR
+><TR
+><TD
+><P
+> <SPAN
+CLASS="strong"
+><B
+CLASS="emphasis"
+>writemem</B
+></SPAN
+>
+</P
+></TD
+><TD
+> <P
+> write content from file to memory
+</P
+>
+</TD
+></TR
+></TBODY
+></TABLE
+><P
+></P
+></DIV
+></DIV
+><DIV
+CLASS="section"
+><HR><H3
+CLASS="section"
+><A
+NAME="_highlevel_commands"
+>3.2.7. Highlevel commands</A
+></H3
+><DIV
+CLASS="section"
+><H4
+CLASS="section"
+><A
+NAME="_svf"
+>3.2.7.1. svf</A
+></H4
+><P
+>The SVF player operates on a single part in the scan chain. Therefore, you
+have to bring up the jtag software, specify a cable and detect the scan
+chain beforehand.</P
+><P
+>The player will establish a new instruction called "SIR" and a new register
+called "SDR". They are used internally by the respective SVF commands and are
+reassigned with new values as the player advances through the file. It is not
+recommended to use them outside of the SVF player as their content is dynamic.</P
+><P
+>An example session:</P
+><PRE
+CLASS="literallayout"
+>jtag> cable ppdev /dev/parport0 DLC5
+Initializing Xilinx DLC5 JTAG Parallel Cable III on ppdev port /dev/parport0
+jtag> detect
+IR length: 5
+Chain length: 1
+Device Id: 10010000101000100000000010010011
+ Manufacturer: Xilinx
+ Part: XC2S300E-PQ208
+ Stepping: 9
+ Filename: /usr/local/share/jtag/xilinx/xc2s300e-pq208/xc2s300e-pq208
+jtag> part <desired part of the scan chain>
+jtag> svf <SVF file for selected part>
+jtag> instruction BYPASS
+jtag> shift ir
+jtag> part <next part>
+jtag> svf <SVF file for selected part>
+jtag> instruction BYPASS
+jtag> shift ir</PRE
+><P
+>It is recommended to set the part's instruction register to BYPASS although
+most SVF files do this at the end. By setting the instruction explicitely to
+BYPASS the output of the print command will always show meaningful
+information.</P
+><P
+>The SVF player will issue messages when situations arise that cannot be
+handled. These messages are classified as warnings or errors depending on
+whether the player can continue operation (warning) or not (error).
+In case the TDO parameter of an SDR command leads to a mismatch the player
+issues a warning and continues. If the player should abort in this case then
+specify <SPAN
+CLASS="emphasis"
+><I
+CLASS="emphasis"
+>stop</I
+></SPAN
+> at the svf command.</P
+><P
+>The absence of error or warning messages indicate that the SVF file was
+executed without problems. To get a progress reporting while the player advances
+through the SVF file, specify <SPAN
+CLASS="emphasis"
+><I
+CLASS="emphasis"
+>progress</I
+></SPAN
+> at the svf command.</P
+><TABLE
+CLASS="sidebar"
+BORDER="1"
+CELLPADDING="5"
+><TR
+><TD
+><DIV
+CLASS="sidebar"
+><A
+NAME="AEN801"
+></A
+><P
+><B
+>Limitations and Deficiencies</B
+></P
+><P
+>Several limitations exist for the SVF player.</P
+><P
+>It has been tested so far with files generated by these tools:</P
+><P
+></P
+><UL
+><LI
+><P
+> Xilinx ISE WebPack 6.3.02i - 9.1.02i
+</P
+></LI
+><LI
+><P
+> Altera Quartus II 4.1sp1 - 7.0
+</P
+></LI
+></UL
+><P
+>Configuration for these devices has been tested so far:</P
+><P
+></P
+><UL
+><LI
+><P
+> Altera EPC1C12Q240
+</P
+></LI
+><LI
+><P
+> Altera MAX3032, EPM3032ALC44
+</P
+></LI
+><LI
+><P
+> Altera MAX3064, EPM3064ALC44
+</P
+></LI
+><LI
+><P
+> Altera MAX7032, EPM7032SLC44
+</P
+></LI
+><LI
+><P
+> Altera MAX7064, EPM7064SLC44, EPM7064STC44
+</P
+></LI
+><LI
+><P
+> Xilinx Spartan-IIE, XC2S300E-PQ208
+</P
+></LI
+><LI
+><P
+> Xilinx Spartan-3, XC3S1000-FG456, XC3S5000-FG900
+</P
+></LI
+></UL
+><P
+>The implementation of some SVF commands has deficiencies.</P
+><P
+></P
+><UL
+><LI
+><P
+> HIR, HDR commands not supported.
+ Their functionality should be covered by the part concept of JTAG Tools.
+</P
+></LI
+><LI
+><P
+> PIO command not supported.
+</P
+></LI
+><LI
+><P
+> PIOMAP command not supported.
+</P
+></LI
+><LI
+><P
+> RUNTEST SCK not supported.
+ The maximum time constraint is not guaranteed.
+</P
+></LI
+><LI
+><P
+> TRST
+ Parameters Z and ABSENT are not supported.
+</P
+></LI
+><LI
+><P
+> TIR, TDR commands not supported.
+ Their functionality should be covered by the part concept of JTAG Tools.
+</P
+></LI
+></UL
+><P
+>SVF files for programming flash-based devices might or might not work for a given
+setup. This has been observed for Actel IGLOO devices where success and failure
+depends on the actual clocking rate of the chosen cable.</P
+><P
+>The ref_freq=<…> option to the svf command allows to tweak the calculation
+of <SPAN
+CLASS="emphasis"
+><I
+CLASS="emphasis"
+>RUNTEST xxx SEC</I
+></SPAN
+> commands. For these commands, the SVF player needs to
+calculate the equivalent number of clocks and per default it will use the
+current cable clock frequency. This can be overridden with the ref_freq option
+that specifies a fixed reference frequency for such calculations.</P
+></DIV
+></TD
+></TR
+></TABLE
+></DIV
+><DIV
+CLASS="section"
+><HR><H4
+CLASS="section"
+><A
+NAME="_bsdl"
+>3.2.7.2. bsdl</A
+></H4
+><P
+>The <SPAN
+CLASS="emphasis"
+><I
+CLASS="emphasis"
+>bsdl</I
+></SPAN
+> command is used to set up and test the underlying BSDL subsystem of
+UrJTAG.</P
+><P
+>Whenever <SPAN
+CLASS="emphasis"
+><I
+CLASS="emphasis"
+>detect</I
+></SPAN
+> encounters a new part, a configuration process is
+started. This involves matching the retrieved IDCODE against the part
+descriptions in /usr/share/urjtag as described above. However, before this
+database is searched for a suitable description, the BSDL subsystem is started
+and searches for BSDL file that matches this device. If it finds a matching
+file, traversal of the /usr/share/urjtag database is skipped. If not, then
+this standard process follows.</P
+><P
+>To tell the BSDL subsytem where to look for BSDL files, the <SPAN
+CLASS="emphasis"
+><I
+CLASS="emphasis"
+>bsdl path
+pathlist</I
+></SPAN
+> command has to be issued prior to <SPAN
+CLASS="emphasis"
+><I
+CLASS="emphasis"
+>detect</I
+></SPAN
+>. The contents of
+<SPAN
+CLASS="emphasis"
+><I
+CLASS="emphasis"
+>pathlist</I
+></SPAN
+> must be a semicolon-separated list of directories where BSDL files
+are located. This list is stored by <SPAN
+CLASS="emphasis"
+><I
+CLASS="emphasis"
+>bsdl path</I
+></SPAN
+> and is used lateron when
+<SPAN
+CLASS="emphasis"
+><I
+CLASS="emphasis"
+>detect</I
+></SPAN
+> calls the BSDL subsystem.</P
+><DIV
+CLASS="important"
+><P
+></P
+><TABLE
+CLASS="important"
+WIDTH="100%"
+BORDER="0"
+><TR
+><TD
+WIDTH="25"
+ALIGN="CENTER"
+VALIGN="TOP"
+><IMG
+SRC="../images/important.gif"
+HSPACE="5"
+ALT="Important"></TD
+><TD
+ALIGN="LEFT"
+VALIGN="TOP"
+><P
+>The BSDL subsystem applies the first BSDL file that parses without
+errors and that contains the correct IDCODE. Scanning the specified
+directories happens in exactly the given order. Inside a directory however,
+the order depends largely on your filesystem's behavior.</P
+></TD
+></TR
+></TABLE
+></DIV
+><P
+>Further details of the <SPAN
+CLASS="emphasis"
+><I
+CLASS="emphasis"
+>bsdl</I
+></SPAN
+> command:</P
+><P
+></P
+><UL
+><LI
+><P
+> bsdl path <path1>[;<path2>[;<pathN>]]
+ set paths for locating BSDL files
+</P
+></LI
+><LI
+><P
+> bsdl debug on|off
+ switches debug messages on or off
+</P
+></LI
+><LI
+><P
+> bsdl test [file]
+ reads file (if specified) or all files found via <SPAN
+CLASS="emphasis"
+><I
+CLASS="emphasis"
+>bsdl path</I
+></SPAN
+> and
+ prints a short status, an active part is not required
+</P
+></LI
+><LI
+><P
+> bsdl dump [file]
+ reads file (if specified) or all files found via <SPAN
+CLASS="emphasis"
+><I
+CLASS="emphasis"
+>bsdl path</I
+></SPAN
+> and
+ prints all configuration commands, an active part is not required
+</P
+></LI
+></UL
+><DIV
+CLASS="tip"
+><P
+></P
+><TABLE
+CLASS="tip"
+WIDTH="100%"
+BORDER="0"
+><TR
+><TD
+WIDTH="25"
+ALIGN="CENTER"
+VALIGN="TOP"
+><IMG
+SRC="../images/tip.gif"
+HSPACE="5"
+ALT="Tip"></TD
+><TD
+ALIGN="LEFT"
+VALIGN="TOP"
+><P
+>The <SPAN
+CLASS="emphasis"
+><I
+CLASS="emphasis"
+>bsdl dump file</I
+></SPAN
+> command implements the same functionality as
+bsdl2jtag.</P
+></TD
+></TR
+></TABLE
+></DIV
+></DIV
+></DIV
+><DIV
+CLASS="section"
+><HR><H3
+CLASS="section"
+><A
+NAME="_unsupported_commands"
+>3.2.8. Unsupported commands</A
+></H3
+><DIV
+CLASS="section"
+><H4
+CLASS="section"
+><A
+NAME="_script"
+>3.2.8.1. script</A
+></H4
+><P
+>Although it's still there, its functionality has been merged into the include
+command. Please use "include" instead.</P
+></DIV
+><DIV
+CLASS="section"
+><HR><H4
+CLASS="section"
+><A
+NAME="_setdevice"
+>3.2.8.2. setdevice</A
+></H4
+><P
+>This command was only there to support the SHARC 21065L processor,
+which has no IDCODE and therefore can't be initialized correctly by
+just running "detect". However, the proper initialization can be done
+after "detect" by loading the proper declarations and bus driver manually:</P
+><PRE
+CLASS="literallayout"
+>jtag> include analog/sharc21065l/sharc21065l</PRE
+></DIV
+><DIV
+CLASS="section"
+><HR><H4
+CLASS="section"
+><A
+NAME="_spiflashmem"
+>3.2.8.3. spiflashmem</A
+></H4
+><P
+>The commands "spidetectflash", "spiflashmem", "spireadflash" and
+"spieraseflash" only exist in a version of the JTAG tools copyrighted by
+Intratrade Ltd., we just know about them from a posting on the net.</P
+></DIV
+></DIV
+></DIV
+></DIV
+><DIV
+CLASS="chapter"
+><HR><H1
+><A
+NAME="_internals"
+></A
+>Chapter 4. Internals</H1
+><P
+>This section yet is only a placeholder for the information that will
+be added soon…</P
+><DIV
+CLASS="section"
+><HR><H2
+CLASS="section"
+><A
+NAME="_files"
+>4.1. Files</A
+></H2
+><DIV
+CLASS="section"
+><H3
+CLASS="section"
+><A
+NAME="_source_code_overview"
+>4.1.1. Source code Overview</A
+></H3
+><DIV
+CLASS="informaltable"
+><P
+></P
+><A
+NAME="AEN892"
+></A
+><TABLE
+BORDER="0"
+FRAME="void"
+RULES="none"
+CLASS="CALSTABLE"
+><COL
+WIDTH="3*"><COL
+WIDTH="7*"><TBODY
+VALIGN="top"
+><TR
+><TD
+><P
+> doc/
+</P
+></TD
+><TD
+> <P
+> Documentation
+</P
+>
+</TD
+></TR
+><TR
+><TD
+><P
+> data/
+</P
+></TD
+><TD
+> <P
+> Part descriptions (Data files)
+</P
+>
+</TD
+></TR
+><TR
+><TD
+><P
+> include/
+</P
+></TD
+><TD
+> <P
+> C header files
+</P
+>
+</TD
+></TR
+><TR
+><TD
+><P
+> src/
+</P
+></TD
+><TD
+> <P
+> C source code
+</P
+>
+</TD
+></TR
+><TR
+><TD
+><P
+> src/bsdl
+</P
+></TD
+><TD
+> <P
+> BSDL subsystem
+</P
+>
+</TD
+></TR
+><TR
+><TD
+><P
+> src/bus
+</P
+></TD
+><TD
+> <P
+> Bus driver for various CPUs and other parts
+</P
+>
+</TD
+></TR
+><TR
+><TD
+><P
+> src/cmd
+</P
+></TD
+><TD
+> <P
+> Implementation of the commands for the "jtag" shell
+</P
+>
+</TD
+></TR
+><TR
+><TD
+><P
+> src/flash
+</P
+></TD
+><TD
+> <P
+> Flash detection and programming algorithms
+</P
+>
+</TD
+></TR
+><TR
+><TD
+><P
+> src/jim
+</P
+></TD
+><TD
+> <P
+> JIM, the JTAG target simulator
+</P
+>
+</TD
+></TR
+><TR
+><TD
+><P
+> src/lib
+</P
+></TD
+><TD
+> <P
+> Utility functions
+</P
+>
+</TD
+></TR
+><TR
+><TD
+><P
+> src/part
+</P
+></TD
+><TD
+> <P
+> Functions for accessing specific parts in a chain
+</P
+>
+</TD
+></TR
+><TR
+><TD
+><P
+> src/svf
+</P
+></TD
+><TD
+> <P
+> SVF player
+</P
+>
+</TD
+></TR
+><TR
+><TD
+><P
+> src/tap
+</P
+></TD
+><TD
+> <P
+> Functions for accessing the chain in general
+</P
+>
+</TD
+></TR
+></TBODY
+></TABLE
+><P
+></P
+></DIV
+></DIV
+></DIV
+><DIV
+CLASS="section"
+><HR><H2
+CLASS="section"
+><A
+NAME="_drivers"
+>4.2. Drivers</A
+></H2
+><P
+></P
+><UL
+><LI
+><P
+> Cable drivers
+</P
+></LI
+><LI
+><P
+> Link drivers
+</P
+></LI
+><LI
+><P
+> TAP drivers
+</P
+></LI
+><LI
+><P
+> Chain drivers
+</P
+></LI
+><LI
+><P
+> Bus drivers
+</P
+></LI
+><LI
+><P
+> Flash drivers
+</P
+></LI
+><LI
+><P
+> Commands
+</P
+></LI
+></UL
+><DIV
+CLASS="section"
+><HR><H3
+CLASS="section"
+><A
+NAME="_cable_specific_drivers_src_tap_cable"
+>4.2.1. Cable-specific drivers (src/tap/cable)</A
+></H3
+><P
+>Cable-specific drivers are those which are visible to the user through
+the "jtag" command shell. They're listed in response to the "help cable"
+command. Each driver has to provide the following functions:</P
+><P
+></P
+><UL
+><LI
+><P
+> connect(), init() - Initialization
+</P
+></LI
+><LI
+><P
+> done(), cable_free(), disconnect() - Cleaning up
+</P
+></LI
+><LI
+><P
+> set_frequency() - set bitrate for shifting data through the chain
+</P
+></LI
+><LI
+><P
+> clock(), get_tdo(), transfer() - immediate JTAG activities
+</P
+></LI
+><LI
+><P
+> flush() - internally used to actually perform JTAG activities
+</P
+></LI
+><LI
+><P
+> help() - a help text to be displayed by the jtag command shell
+</P
+></LI
+></UL
+><DIV
+CLASS="section"
+><HR><H4
+CLASS="section"
+><A
+NAME="_initialization"
+>4.2.1.1. Initialization</A
+></H4
+><P
+>After allocating a "cable_t" structure, a pointer to it and further
+parameters (as strings) have to be passed first to the selected cable's
+connect() function.</P
+><P
+>Following that, the init() function is called via cable_init(). If cable_init()
+returns a zero value, all is fine and the cable is ready for use.</P
+></DIV
+><DIV
+CLASS="section"
+><HR><H4
+CLASS="section"
+><A
+NAME="_cleaning_up"
+>4.2.1.2. Cleaning up</A
+></H4
+><P
+>There are two functions for actual cleanup:</P
+><P
+></P
+><UL
+><LI
+><P
+> done() is responsible for driving the hardware to a safe and consistent state.
+</P
+></LI
+><LI
+><P
+> cable_free() then can be used to clean up eventually extra allocated memory etc.
+</P
+></LI
+></UL
+><P
+>Both are usually called from chain_disconnect().</P
+><P
+>An additional mechanism allows to clean up if a disconnection was detected by
+the low level driver (e.g. USB or parallel port driver). A cable has to provide
+a disconnect() function for this purpose:</P
+><P
+></P
+><OL
+TYPE="1"
+><LI
+><P
+> Low level (e.g. parport) driver calls cable driver->disconnect()
+</P
+></LI
+><LI
+><P
+> cable driver->disconnect() calls chain_disconnect()
+</P
+></LI
+><LI
+><P
+> chain_disconnect() calls cable driver->done()
+</P
+></LI
+><LI
+><P
+> chain_disconnect() then calls cable driver->cable_free()
+</P
+></LI
+></OL
+><P
+>After return from chain_disconnect() to cable driver->disconnect(), the cable_t
+structure has been freed and must not be accessed anymore.</P
+></DIV
+><DIV
+CLASS="section"
+><HR><H4
+CLASS="section"
+><A
+NAME="_jtag_activities"
+>4.2.1.3. JTAG Activities</A
+></H4
+><P
+>Currently the API provides five different functions for performing operations
+at the JTAG interface on the low level signal level (using the four signals
+TMS, TCK, TDI, and TDO).</P
+><P
+></P
+><UL
+><LI
+><P
+> clock(tms,tdi,n) takes values for TMS and TDI output as its parameters, ensures that actual cable signals are set accordingly, and does a 0-1 transition on TCK (n times)
+</P
+></LI
+><LI
+><P
+> get_tdo() returns the current value at the TDO input.
+</P
+></LI
+><LI
+><P
+> set_trst(x) sets the TRST signal and returns the current value.
+</P
+></LI
+><LI
+><P
+> get_trst() returns the current value of the TRST signal.
+</P
+></LI
+></UL
+><P
+>For many JTAG adapters, there's almost no delay when doing alternating clock()
+and get_tdo(). Writing and reading happens immediately and the result is
+available immediately as well. This is the case with most parallel port
+adapters (but not when attached to USB-to-parallel adapters or USB docking
+stations) and memory mapped IO (e.g. general purpose I/O pins of
+microcontrollers).</P
+><P
+>But there are adapters, especially USB and Ethernet based adapters, which
+exhibit a rather long delay between the initiation of reading a bit and the
+delivery of the value of the bit. It is at least 1 millisecond with USB,
+which would limit the transfer rate to 1 kHz. One way to workaround this
+is to transmit bits compacted into bytes and chunks of bytes, which is
+possible with the transfer() function.</P
+><P
+></P
+><UL
+><LI
+><P
+> transfer(in, out)
+</P
+></LI
+></UL
+><P
+>The transfer() function does a series of TCK pulses, with data for TDI read as
+bytes from memory. The bytes are automatically serialized. TMS is set to zero
+during transfer()s. Optionally, prior to each bit shifted out to the interface,
+TDO input can be read into memory (deserialized into a byte array of the same
+size as the input array).</P
+><P
+>It still doesn't yield much improvement if the operation consists of many read
+and write transitions (e.g. repeatedly writing an instruction and some data
+register values, then reading from the data register, as it is necessary for
+memory access). For that reason, the above functions are also available in
+variants that don't cause immediate activity, but rather schedule it for later.
+In the API, they're visible as</P
+><P
+></P
+><UL
+><LI
+><P
+> cable_defer_clock()
+</P
+></LI
+><LI
+><P
+> cable_defer_get_tdo()
+</P
+></LI
+><LI
+><P
+> cable_defer_set_trst()
+</P
+></LI
+><LI
+><P
+> cable_defer_get_trst()
+</P
+></LI
+><LI
+><P
+> cable_defer_transfer()
+</P
+></LI
+></UL
+><P
+>These functions aren't implemented in the cable driver (but currently in
+src/tap/cable.c). The cable driver just has to provide a flush() function to
+actually execute the queued activity in some cable-specific optimal way, and
+to store the results of get_tdo() and transfer() activity. The caller later
+can pick up the results using these functions (implemented in cable.c):</P
+><P
+></P
+><UL
+><LI
+><P
+> cable_get_tdo_late()
+</P
+></LI
+><LI
+><P
+> cable_get_trst_late()
+</P
+></LI
+><LI
+><P
+> cable_transfer_late()
+</P
+></LI
+></UL
+><P
+>As an example, consider the following sequence of activities:</P
+><P
+></P
+><OL
+TYPE="1"
+><LI
+><P
+> clock()
+</P
+></LI
+><LI
+><P
+> get_tdo()
+</P
+></LI
+><LI
+><P
+> clock()
+</P
+></LI
+><LI
+><P
+> get_tdo()
+</P
+></LI
+></OL
+><P
+>If the result of the first get_tdo() isn't absolutely required before the
+second clock(), the sequence can be optimized into the following sequence (if</P
+><P
+></P
+><OL
+TYPE="1"
+><LI
+><P
+> defer_clock()
+</P
+></LI
+><LI
+><P
+> defer_clock()
+</P
+></LI
+><LI
+><P
+> flush()
+</P
+></LI
+><LI
+><P
+> get_tdo_late()
+</P
+></LI
+><LI
+><P
+> get_tdo_late()
+</P
+></LI
+></OL
+><P
+>The next sections explain the queueing mechanism and its limits in detail.</P
+></DIV
+><DIV
+CLASS="section"
+><HR><H4
+CLASS="section"
+><A
+NAME="_when_flushing_occurs"
+>4.2.1.4. When flushing occurs</A
+></H4
+><P
+>The cable_flush() function is used to flush the queue towards the cable. It
+takes one additional argument, "how_much", which may be one of</P
+><P
+></P
+><UL
+><LI
+><P
+> OPTIONALLY: The cable driver may flush if it's reasonable (e.g. if the
+ queue has been filled so that some buffer limit for the cable interface
+ is reached). It would be wise to flush early to keep the queue small, if
+ there is no point in queueing up more items because the transfer to the
+ cable would have to be split into smaller chunks anyway. This is used by
+ UrJTAG immediately after adding items to the queue.
+</P
+></LI
+><LI
+><P
+> TO_OUTPUT: The cable driver should at least flush as much so that one
+ output becomes available in the output queue. If there's already something
+ in the output queue, this should be interpreted similar to OPTIONALLY. This
+ is used by UrJTAG immediately before it wants to use that output.
+</P
+></LI
+><LI
+><P
+> COMPLETELY: The cable driver has to flush the queue completely. This is
+ used by UrJTAG immediately before actions that circumvent the queueing
+ such as calls to the legacy clock/get_tdo functions. It could also be
+ used by application code to ensure that some action is actually done in
+ time.
+</P
+></LI
+></UL
+></DIV
+><DIV
+CLASS="section"
+><HR><H4
+CLASS="section"
+><A
+NAME="_jtag_activity_queueing"
+>4.2.1.5. JTAG activity queueing</A
+></H4
+><P
+>The source in src/tap/cable.c provides to important functions to access the
+two queues "todo" (with activity to be done) and "done" (with results):</P
+><P
+></P
+><UL
+><LI
+><P
+> cable_add_queue_item
+</P
+></LI
+><LI
+><P
+> cable_get_queue_item
+</P
+></LI
+></UL
+><P
+>In src/tap/cable/generic.c you'll find two implementations of dequeueing
+algorithms, i.e. implementations of the flush() function. These could be used
+by any new cable driver unless it provides a more sophisticated algorithm
+itself:</P
+><P
+></P
+><UL
+><LI
+><P
+> generic_flush_one_by_one() simply calls the "classic" functions one after
+ another. The performance of the cable driver using this implementation will
+ be the same whether the immediate or defer variants of the functions are used.
+</P
+></LI
+><LI
+><P
+> generic_flush_using_transfer() tries to optimize as many clock() and
+ get_tdo() by transforming them into calls to transfer() instead. This can
+ give a slight advantage.
+</P
+></LI
+></UL
+><P
+>The generic implementations also serve as a template for new cable-specific
+implementations.</P
+></DIV
+><DIV
+CLASS="section"
+><HR><H4
+CLASS="section"
+><A
+NAME="_generic_implementations"
+>4.2.1.6. Generic implementations</A
+></H4
+><P
+>As a reference and in many cases completely sufficient for new cables, take a
+look at the code in src/tap/cable/generic.c, which contains generic routines,
+suitable for parallel port based cables (and some for other types of cables as
+well).</P
+></DIV
+></DIV
+><DIV
+CLASS="section"
+><HR><H3
+CLASS="section"
+><A
+NAME="_link_drivers"
+>4.2.2. Link drivers</A
+></H3
+><P
+>Link drivers like the "parport" driver collection provide the basis for
+communication between cable driver and actual JTAG adapter. The openwince JTAG
+tools supported only parallel port links with the "parport" drivers. UrJTAG
+introduced support for USB links, but in the early releases the drivers for
+these just mimic the parallel port links.</P
+><P
+>The basic functions provided by all link drivers are</P
+><P
+></P
+><UL
+><LI
+><P
+> connect(), to called from cable driver connect()
+</P
+></LI
+><LI
+><P
+> open(), to actually connect to the device during cable driver init()
+</P
+></LI
+><LI
+><P
+> close(), to disconnect from the device during cable driver done()
+</P
+></LI
+><LI
+><P
+> free(), to free all resources, called from cable driver free()
+</P
+></LI
+></UL
+><DIV
+CLASS="section"
+><HR><H4
+CLASS="section"
+><A
+NAME="_parport"
+>4.2.2.1. parport</A
+></H4
+><P
+>Currently there are parport drivers for direct access to the parallel port on a
+PC using I/O addresses (direct.c), and for using ppdev on Linux or ppi on FreeBSD.</P
+><P
+>In addition, there are "ftdi" and "ftd2xx" parport drivers that actually are for
+communication with USB cables based on FTDI chips. They cannot be used for
+connecting old parallel port cables through parallel to USB adapters with FTDI
+chips, and probably soon will be rewritten as "usbconn" drivers instead.</P
+><P
+>All parport drivers present a common API for setting and reading signals.</P
+></DIV
+><DIV
+CLASS="section"
+><HR><H4
+CLASS="section"
+><A
+NAME="_usbconn"
+>4.2.2.2. usbconn</A
+></H4
+><P
+>The usbconn drivers provide a common API to search for and connect with USB
+devices. At the moment, there are drivers for libusd, libftdi and FTD2XX
+(e.g. to communicate with FTDI chip based cables through libftdi and/or
+FTD2XX, to communicate with Cypress FX2 using EZUSB.SYS or CyUSB.sys, and
+more).</P
+></DIV
+></DIV
+><DIV
+CLASS="section"
+><HR><H3
+CLASS="section"
+><A
+NAME="_bus_drivers"
+>4.2.3. Bus drivers</A
+></H3
+><P
+>Bus drivers translate read and write operations on a bus into JTAG commands
+and methods. A bus in this context is neither restricted to a processor bus,
+nor to memory. Any system component that can be read from and written to could
+be seen as attached to a bus. I.e. external or internal memory (RAM, ROM,
+Flash) and peripherals connected to a processor or simply an FPGA with 1:1
+connections.</P
+><P
+>The available bus drivers are listed in response to "help initbus". Each
+driver has to provide the following functions:</P
+><P
+></P
+><UL
+><LI
+><P
+> bus_new() - Initialization
+</P
+></LI
+><LI
+><P
+> bus_free() - Cleaning up
+</P
+></LI
+><LI
+><P
+> bus_printinfo() - Short description
+</P
+></LI
+><LI
+><P
+> bus_prepare() - Preparation
+</P
+></LI
+><LI
+><P
+> bus_area() - Description of the bus geometry
+</P
+></LI
+><LI
+><P
+> bus_read_start() - Initiate reading
+</P
+></LI
+><LI
+><P
+> bus_read_next() - Read access
+</P
+></LI
+><LI
+><P
+> bus_read_end() - Finish reading
+</P
+></LI
+><LI
+><P
+> bus_read() - Atomic reading
+</P
+></LI
+><LI
+><P
+> bus_write() - Write access
+</P
+></LI
+></UL
+><DIV
+CLASS="important"
+><P
+></P
+><TABLE
+CLASS="important"
+WIDTH="100%"
+BORDER="0"
+><TR
+><TD
+WIDTH="25"
+ALIGN="CENTER"
+VALIGN="TOP"
+><IMG
+SRC="../images/important.gif"
+HSPACE="5"
+ALT="Important"></TD
+><TD
+ALIGN="LEFT"
+VALIGN="TOP"
+><P
+>Address parameters to the functions listed above specify always
+byte locations, independent of the actual data width. The bus driver has to
+adjust the address on its own if required.</P
+></TD
+></TR
+></TABLE
+></DIV
+><DIV
+CLASS="section"
+><HR><H4
+CLASS="section"
+><A
+NAME="_creation"
+>4.2.3.1. Creation</A
+></H4
+><P
+>Upon calling of its bus_new() function, the driver allocates a "bus_t"
+structure and performs all required internal initializations.</P
+></DIV
+><DIV
+CLASS="section"
+><HR><H4
+CLASS="section"
+><A
+NAME="_initialization_2"
+>4.2.3.2. Initialization</A
+></H4
+><P
+>After creation of the new "bus_t" structure, the bus_init() function will
+be called to give the driver the possibility to initialize it's internal
+states or BSR bits as required. Such functionality has been split from
+bus_new() since some drivers require to re-initialize during runtime.</P
+></DIV
+><DIV
+CLASS="section"
+><HR><H4
+CLASS="section"
+><A
+NAME="_cleaning_up_2"
+>4.2.3.3. Cleaning up</A
+></H4
+><P
+>The driver is supposed to free all allocated memory (including its "bus_t"
+structure). Additionally, it should set the device into a state that doesn't
+prevent it from normal operation.</P
+></DIV
+><DIV
+CLASS="section"
+><HR><H4
+CLASS="section"
+><A
+NAME="_short_description"
+>4.2.3.4. Short description</A
+></H4
+><P
+>Prints a message describing the driver. This function is called by the "print"
+command before it lists the areas covered by this bus driver.</P
+></DIV
+><DIV
+CLASS="section"
+><HR><H4
+CLASS="section"
+><A
+NAME="_preparation"
+>4.2.3.5. Preparation</A
+></H4
+><P
+>This function is called whenever a bus operation is initiated. The
+driver should perform the required preparation steps so that
+subsequent calls to the bus_read_* and bus_write functions can perform
+their tasks properly.</P
+><P
+>E.g. a BSR bus driver would put the device into EXTEST mode to activate the
+boundary scan register on the device pins.</P
+></DIV
+><DIV
+CLASS="section"
+><HR><H4
+CLASS="section"
+><A
+NAME="_description_of_the_bus_geometry"
+>4.2.3.6. Description of the bus geometry</A
+></H4
+><P
+>At certain stages, the bus driver's bus_area() function is called by other
+commands to query the bus geometry for a given address. The bus driver must
+fill in the fields of a "bus_area_t" structure describing the geometry of the
+area in which the specified address is located:</P
+><P
+></P
+><UL
+><LI
+><P
+> a short textual description of the area
+</P
+></LI
+><LI
+><P
+> start address of area
+</P
+></LI
+><LI
+><P
+> length of area in bytes
+</P
+></LI
+><LI
+><P
+> data width in bits
+</P
+></LI
+></UL
+><P
+>Queries with an address out of range must result in an area length of</P
+><PRE
+CLASS="literallayout"
+>UINT64_C(0x100000000)</PRE
+></DIV
+><DIV
+CLASS="section"
+><HR><H4
+CLASS="section"
+><A
+NAME="_initiate_reading"
+>4.2.3.7. Initiate reading</A
+></H4
+><P
+>Since the JTAG state machine defines a capture-shift-update sequence, it is
+required to shift the address for a read prior to capturing the read
+data. Therefore, the bus_read_start() function is called with the very first
+address to read from. This enables the driver to shift the address into the
+device before it can actually retrieve the read data for this address.</P
+></DIV
+><DIV
+CLASS="section"
+><HR><H4
+CLASS="section"
+><A
+NAME="_read_access"
+>4.2.3.8. Read access</A
+></H4
+><P
+>The bus_read_next() function fetches the read data from the device that has
+been addressed by a previous call to bus_read_start() or
+bus_read_next(). Again, this is due to the capture-shift-update sequence of
+JTAG:</P
+><P
+></P
+><OL
+TYPE="1"
+><LI
+><P
+> capture read data from device pins
+</P
+></LI
+><LI
+><P
+> shift new address
+</P
+></LI
+><LI
+><P
+> update new address to device pins
+</P
+></LI
+></OL
+><DIV
+CLASS="important"
+><P
+></P
+><TABLE
+CLASS="important"
+WIDTH="100%"
+BORDER="0"
+><TR
+><TD
+WIDTH="25"
+ALIGN="CENTER"
+VALIGN="TOP"
+><IMG
+SRC="../images/important.gif"
+HSPACE="5"
+ALT="Important"></TD
+><TD
+ALIGN="LEFT"
+VALIGN="TOP"
+><P
+>The address parameter specifies the location of the <SPAN
+CLASS="emphasis"
+><I
+CLASS="emphasis"
+>following</I
+></SPAN
+>
+read access. It is not the address of the data returned by this function call.</P
+></TD
+></TR
+></TABLE
+></DIV
+></DIV
+><DIV
+CLASS="section"
+><HR><H4
+CLASS="section"
+><A
+NAME="_finish_reading"
+>4.2.3.9. Finish reading</A
+></H4
+><P
+>Function "bus_read_end()" is called at the end of a read sequence. I.e. when
+the higher level command determines that the last data portion is to be read
+from the device. There is no new address and the function driver is supposed
+to return the read data that was addressed previously.</P
+></DIV
+><DIV
+CLASS="section"
+><HR><H4
+CLASS="section"
+><A
+NAME="_atomic_reading"
+>4.2.3.10. Atomic reading</A
+></H4
+><P
+>For ease of use, a bus driver has to supply a "bus_read()" function that
+encapsulates reading data from a single address in an atomic operation. Bus
+drivers typically build this function from "bus_read_start()" and a subsequent
+"bus_read_end()".</P
+></DIV
+><DIV
+CLASS="section"
+><HR><H4
+CLASS="section"
+><A
+NAME="_write_access"
+>4.2.3.11. Write access</A
+></H4
+><P
+>This function writes one data element at the specified address. Since this
+translates to a single JTAG operation (capture ignored, shift and update
+address & data), there is no splitting as with the read functions.</P
+></DIV
+></DIV
+></DIV
+><DIV
+CLASS="section"
+><HR><H2
+CLASS="section"
+><A
+NAME="_data_file_format"
+>4.3. Data file format</A
+></H2
+><P
+>JTAG declarations files are located in directory "data". The files contains
+common part specific JTAG information in parseable form, e.g. list of the JTAG
+commands, boundary scan register, list of JTAG registers, etc.</P
+><P
+>Syntax of the JTAG declaration file is defined in the following subsections.</P
+><DIV
+CLASS="section"
+><HR><H3
+CLASS="section"
+><A
+NAME="_general_rules"
+>4.3.1. General rules</A
+></H3
+><P
+>JTAG declaration file is text file which consists of lines. Empty lines are
+ignored. Text after first "#" on the line to the end of line is ignored. This
+is useful for comments. All other lines are significant.</P
+><P
+>Each significant line consists of tokens separated by whitespace. Whitespace
+could be spaces and/or tabs.</P
+></DIV
+><DIV
+CLASS="section"
+><HR><H3
+CLASS="section"
+><A
+NAME="_signal_definition"
+>4.3.2. Signal Definition</A
+></H3
+><P
+>Signal definition line consists of word "signal" followed by whitespace and
+signal name (without spaces in the name). Rest of the line should contain
+whitespace separated list of pins of the part. This list is currently not used
+for any purpose in JTAG Tools. It is intended for future use.</P
+></DIV
+></DIV
+><DIV
+CLASS="section"
+><HR><H2
+CLASS="section"
+><A
+NAME="_development"
+>4.4. Development</A
+></H2
+><DIV
+CLASS="section"
+><H3
+CLASS="section"
+><A
+NAME="_future_plans"
+>4.4.1. Future Plans</A
+></H3
+><P
+></P
+><UL
+><LI
+><P
+> C API and library package
+</P
+></LI
+><LI
+><P
+> Bindings for Python, Perl, …
+</P
+></LI
+><LI
+><P
+> TCP/IP access
+</P
+></LI
+><LI
+><P
+> New cable drivers
+</P
+></LI
+><LI
+><P
+> …
+</P
+></LI
+></UL
+></DIV
+><DIV
+CLASS="section"
+><HR><H3
+CLASS="section"
+><A
+NAME="_how_to_contribute"
+>4.4.2. How to contribute</A
+></H3
+><P
+></P
+><UL
+><LI
+><P
+> Using Subversion
+</P
+></LI
+><LI
+><P
+> Create and submit a patch
+</P
+></LI
+><LI
+><P
+> Use SourceForge trackers
+</P
+></LI
+></UL
+></DIV
+></DIV
+></DIV
+><DIV
+CLASS="chapter"
+><HR><H1
+><A
+NAME="_f_a_q"
+></A
+>Chapter 5. F.A.Q.</H1
+><P
+>For a list of known problems in current versions, please also check the "Bugs"
+tracker at the UrJTAG website!</P
+><P
+></P
+><DIV
+CLASS="variablelist"
+><DL
+><DT
+>Q. The documentation is incomplete. Where can I get more information?</DT
+><DD
+><P
+> A. Please ask in the "Using UrJTAG" Forum on <A
+HREF="http://urjtag.org"
+TARGET="_top"
+>http://urjtag.org</A
+>
+</P
+></DD
+><DT
+>Q. My flash isn't detected or can't be programmed. What can I do?</DT
+><DD
+><P
+> A. Please record the output of the "detect" and "detectflash" commands and ask in the Forum. If possible, re-compile UrJTAG before with "—enable-jedec-exp" to get extra information.
+</P
+></DD
+><DT
+>Q. My CPU/FPGA/etc. chip isn't detected. What can I do?</DT
+><DD
+><P
+> A. First try to get hold of a "BSDL" description of the chip from the vendor, and specify where to find this file to UrJTAG using "bsdl path" before you "detect". Second, a bus driver has to be selected. Maybe "ejtag" or "prototype" work.
+</P
+></DD
+><DT
+>Q. When I type "cable parallel 0x378 DLC5" (in a Cygwin environment) I get "Unknown port driver: parallel"?</DT
+><DD
+><P
+> A. Please install the Cygwin ioperm package, and re-configure/compile.
+</P
+></DD
+><DT
+>Q. When I type "cable parallel 0x378 DLC5" (in a Cygwin environment) I get "Error: Cable initialization failed!".</DT
+><DD
+><P
+> A. Please install ioperm.sys driver using <TT
+CLASS="literal"
+>ioperm -i</TT
+> command.
+</P
+></DD
+><DT
+>Q. When running autogen.sh, I get "Can't exec "autopoint": No such file or directory"</DT
+><DD
+><P
+> A. You need the headers for gettext (e.g. Debian package "gettext-devel").
+</P
+></DD
+><DT
+>Q. When running autogen.sh, it complains about missing CVS</DT
+><DD
+><P
+> A. The easiest solution is to actually install CVS for this step, just to get around this error message.
+</P
+></DD
+><DT
+>Q. During compilation, I get "svf_bison.y: No such file or directory"</DT
+><DD
+><P
+> A. You need "bison".
+</P
+></DD
+><DT
+>Q. During compilation, I get "flex: can't open … src/svf/svf_flex.l"</DT
+><DD
+><P
+> A. You need "flex"
+</P
+></DD
+><DT
+>Q. During compilation, I get "src/svf/svf_flex.l", line 27: unrecognized %option: bison-locations"</DT
+><DD
+><P
+> A. You need a newer version of flex. It should be 2.5.31 or newer;
+ Unfortunately, Cygwin comes with only 2.5.4a. You may try to compile and
+ install a newer version of flex from source to solve this. The distributed
+ source tarball contains source pregenerated with a current flex version,
+ you need flex yourself only to compile from fresh SVN checkouts.
+</P
+></DD
+><DT
+>Q. When running "make install", I get "Permission denied" errors</DT
+><DD
+><P
+> A. If you want to install into a system directory (the default /usr/local is one), you'll have to run "make install" as the superuser, e.g. do "sudo make install".
+</P
+></DD
+><DT
+>Q. My BSDL file defines the bus DAT as bit_vector(15 downto 0), how should I access single elements?</DT
+><DD
+><P
+> A. BSDL syntax is an extension of the VHDL language. Array elements are indexed with
+ parentheses: DAT(4) selects index number 4 of the DAT vector. Also refer to the "print
+ signals" command.
+</P
+></DD
+><DT
+>Q. My board requires certain signals to be set to dedicated values before external memories can be accessed.</DT
+><DD
+><P
+> A. Most (if not all) BSR-based bus drivers allow for static configurations of
+ pins that are controlled by BSR bits. Apply the required "set" commands before
+ issueing the "initbus …" command. These settings are preserved by all bus
+ related commands if they don't collide with the signals required for bus operation.
+</P
+></DD
+><DT
+>Q. My USB pod seems slow.</DT
+><DD
+><P
+> A. USB-based JTAG pods suffer from a couple of intrinsic issues. Consider the
+ following to get maximum performance:
+</P
+><P
+></P
+><UL
+><LI
+><P
+> Run UrJTAG on native linux. Cygwin and VMWare are reportedly slower.
+</P
+></LI
+><LI
+><P
+> Connect the pod via a high speed USB hub to a high speed USB host port.
+ Even though the pod is a full speed device, it benefits from the shorter
+ turn-around times between host and hub.
+</P
+></LI
+></UL
+></DD
+></DL
+></DIV
+></DIV
+><DIV
+CLASS="chapter"
+><HR><H1
+><A
+NAME="_licensing"
+></A
+>Chapter 6. Licensing</H1
+><DIV
+CLASS="section"
+><H2
+CLASS="section"
+><A
+NAME="_overview_2"
+>6.1. Overview</A
+></H2
+><P
+>Various licenses are used for the UrJTAG project. The GPL is used for most
+of the code except for some include files, JIM, and cable driver source, where
+a BSD or MIT license is used; this is noted in the file headers.</P
+></DIV
+><DIV
+CLASS="section"
+><HR><H2
+CLASS="section"
+><A
+NAME="_gnu_free_documentation_license_fdl"
+>6.2. GNU Free Documentation License (FDL)</A
+></H2
+><PRE
+CLASS="literallayout"
+> GNU Free Documentation License
+ Version 1.2, November 2002
+
+
+ Copyright (C) 2000,2001,2002 Free Software Foundation, Inc.
+ 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ Everyone is permitted to copy and distribute verbatim copies
+ of this license document, but changing it is not allowed.
+
+
+0. PREAMBLE
+
+The purpose of this License is to make a manual, textbook, or other
+functional and useful document "free" in the sense of freedom: to
+assure everyone the effective freedom to copy and redistribute it,
+with or without modifying it, either commercially or noncommercially.
+Secondarily, this License preserves for the author and publisher a way
+to get credit for their work, while not being considered responsible
+for modifications made by others.
+
+This License is a kind of "copyleft", which means that derivative
+works of the document must themselves be free in the same sense. It
+complements the GNU General Public License, which is a copyleft
+license designed for free software.
+
+We have designed this License in order to use it for manuals for free
+software, because free software needs free documentation: a free
+program should come with manuals providing the same freedoms that the
+software does. But this License is not limited to software manuals;
+it can be used for any textual work, regardless of subject matter or
+whether it is published as a printed book. We recommend this License
+principally for works whose purpose is instruction or reference.
+
+
+1. APPLICABILITY AND DEFINITIONS
+
+This License applies to any manual or other work, in any medium, that
+contains a notice placed by the copyright holder saying it can be
+distributed under the terms of this License. Such a notice grants a
+world-wide, royalty-free license, unlimited in duration, to use that
+work under the conditions stated herein. The "Document", below,
+refers to any such manual or work. Any member of the public is a
+licensee, and is addressed as "you". You accept the license if you
+copy, modify or distribute the work in a way requiring permission
+under copyright law.
+
+A "Modified Version" of the Document means any work containing the
+Document or a portion of it, either copied verbatim, or with
+modifications and/or translated into another language.
+
+A "Secondary Section" is a named appendix or a front-matter section of
+the Document that deals exclusively with the relationship of the
+publishers or authors of the Document to the Document's overall subject
+(or to related matters) and contains nothing that could fall directly
+within that overall subject. (Thus, if the Document is in part a
+textbook of mathematics, a Secondary Section may not explain any
+mathematics.) The relationship could be a matter of historical
+connection with the subject or with related matters, or of legal,
+commercial, philosophical, ethical or political position regarding
+them.
+
+The "Invariant Sections" are certain Secondary Sections whose titles
+are designated, as being those of Invariant Sections, in the notice
+that says that the Document is released under this License. If a
+section does not fit the above definition of Secondary then it is not
+allowed to be designated as Invariant. The Document may contain zero
+Invariant Sections. If the Document does not identify any Invariant
+Sections then there are none.
+
+The "Cover Texts" are certain short passages of text that are listed,
+as Front-Cover Texts or Back-Cover Texts, in the notice that says that
+the Document is released under this License. A Front-Cover Text may
+be at most 5 words, and a Back-Cover Text may be at most 25 words.
+
+A "Transparent" copy of the Document means a machine-readable copy,
+represented in a format whose specification is available to the
+general public, that is suitable for revising the document
+straightforwardly with generic text editors or (for images composed of
+pixels) generic paint programs or (for drawings) some widely available
+drawing editor, and that is suitable for input to text formatters or
+for automatic translation to a variety of formats suitable for input
+to text formatters. A copy made in an otherwise Transparent file
+format whose markup, or absence of markup, has been arranged to thwart
+or discourage subsequent modification by readers is not Transparent.
+An image format is not Transparent if used for any substantial amount
+of text. A copy that is not "Transparent" is called "Opaque".
+
+Examples of suitable formats for Transparent copies include plain
+ASCII without markup, Texinfo input format, LaTeX input format, SGML
+or XML using a publicly available DTD, and standard-conforming simple
+HTML, PostScript or PDF designed for human modification. Examples of
+transparent image formats include PNG, XCF and JPG. Opaque formats
+include proprietary formats that can be read and edited only by
+proprietary word processors, SGML or XML for which the DTD and/or
+processing tools are not generally available, and the
+machine-generated HTML, PostScript or PDF produced by some word
+processors for output purposes only.
+
+The "Title Page" means, for a printed book, the title page itself,
+plus such following pages as are needed to hold, legibly, the material
+this License requires to appear in the title page. For works in
+formats which do not have any title page as such, "Title Page" means
+the text near the most prominent appearance of the work's title,
+preceding the beginning of the body of the text.
+
+A section "Entitled XYZ" means a named subunit of the Document whose
+title either is precisely XYZ or contains XYZ in parentheses following
+text that translates XYZ in another language. (Here XYZ stands for a
+specific section name mentioned below, such as "Acknowledgements",
+"Dedications", "Endorsements", or "History".) To "Preserve the Title"
+of such a section when you modify the Document means that it remains a
+section "Entitled XYZ" according to this definition.
+
+The Document may include Warranty Disclaimers next to the notice which
+states that this License applies to the Document. These Warranty
+Disclaimers are considered to be included by reference in this
+License, but only as regards disclaiming warranties: any other
+implication that these Warranty Disclaimers may have is void and has
+no effect on the meaning of this License.
+
+
+2. VERBATIM COPYING
+
+You may copy and distribute the Document in any medium, either
+commercially or noncommercially, provided that this License, the
+copyright notices, and the license notice saying this License applies
+to the Document are reproduced in all copies, and that you add no other
+conditions whatsoever to those of this License. You may not use
+technical measures to obstruct or control the reading or further
+copying of the copies you make or distribute. However, you may accept
+compensation in exchange for copies. If you distribute a large enough
+number of copies you must also follow the conditions in section 3.
+
+You may also lend copies, under the same conditions stated above, and
+you may publicly display copies.
+
+
+3. COPYING IN QUANTITY
+
+If you publish printed copies (or copies in media that commonly have
+printed covers) of the Document, numbering more than 100, and the
+Document's license notice requires Cover Texts, you must enclose the
+copies in covers that carry, clearly and legibly, all these Cover
+Texts: Front-Cover Texts on the front cover, and Back-Cover Texts on
+the back cover. Both covers must also clearly and legibly identify
+you as the publisher of these copies. The front cover must present
+the full title with all words of the title equally prominent and
+visible. You may add other material on the covers in addition.
+Copying with changes limited to the covers, as long as they preserve
+the title of the Document and satisfy these conditions, can be treated
+as verbatim copying in other respects.
+
+If the required texts for either cover are too voluminous to fit
+legibly, you should put the first ones listed (as many as fit
+reasonably) on the actual cover, and continue the rest onto adjacent
+pages.
+
+If you publish or distribute Opaque copies of the Document numbering
+more than 100, you must either include a machine-readable Transparent
+copy along with each Opaque copy, or state in or with each Opaque copy
+a computer-network location from which the general network-using
+public has access to download using public-standard network protocols
+a complete Transparent copy of the Document, free of added material.
+If you use the latter option, you must take reasonably prudent steps,
+when you begin distribution of Opaque copies in quantity, to ensure
+that this Transparent copy will remain thus accessible at the stated
+location until at least one year after the last time you distribute an
+Opaque copy (directly or through your agents or retailers) of that
+edition to the public.
+
+It is requested, but not required, that you contact the authors of the
+Document well before redistributing any large number of copies, to give
+them a chance to provide you with an updated version of the Document.
+
+
+4. MODIFICATIONS
+
+You may copy and distribute a Modified Version of the Document under
+the conditions of sections 2 and 3 above, provided that you release
+the Modified Version under precisely this License, with the Modified
+Version filling the role of the Document, thus licensing distribution
+and modification of the Modified Version to whoever possesses a copy
+of it. In addition, you must do these things in the Modified Version:
+
+A. Use in the Title Page (and on the covers, if any) a title distinct
+ from that of the Document, and from those of previous versions
+ (which should, if there were any, be listed in the History section
+ of the Document). You may use the same title as a previous version
+ if the original publisher of that version gives permission.
+B. List on the Title Page, as authors, one or more persons or entities
+ responsible for authorship of the modifications in the Modified
+ Version, together with at least five of the principal authors of the
+ Document (all of its principal authors, if it has fewer than five),
+ unless they release you from this requirement.
+C. State on the Title page the name of the publisher of the
+ Modified Version, as the publisher.
+D. Preserve all the copyright notices of the Document.
+E. Add an appropriate copyright notice for your modifications
+ adjacent to the other copyright notices.
+F. Include, immediately after the copyright notices, a license notice
+ giving the public permission to use the Modified Version under the
+ terms of this License, in the form shown in the Addendum below.
+G. Preserve in that license notice the full lists of Invariant Sections
+ and required Cover Texts given in the Document's license notice.
+H. Include an unaltered copy of this License.
+I. Preserve the section Entitled "History", Preserve its Title, and add
+ to it an item stating at least the title, year, new authors, and
+ publisher of the Modified Version as given on the Title Page. If
+ there is no section Entitled "History" in the Document, create one
+ stating the title, year, authors, and publisher of the Document as
+ given on its Title Page, then add an item describing the Modified
+ Version as stated in the previous sentence.
+J. Preserve the network location, if any, given in the Document for
+ public access to a Transparent copy of the Document, and likewise
+ the network locations given in the Document for previous versions
+ it was based on. These may be placed in the "History" section.
+ You may omit a network location for a work that was published at
+ least four years before the Document itself, or if the original
+ publisher of the version it refers to gives permission.
+K. For any section Entitled "Acknowledgements" or "Dedications",
+ Preserve the Title of the section, and preserve in the section all
+ the substance and tone of each of the contributor acknowledgements
+ and/or dedications given therein.
+L. Preserve all the Invariant Sections of the Document,
+ unaltered in their text and in their titles. Section numbers
+ or the equivalent are not considered part of the section titles.
+M. Delete any section Entitled "Endorsements". Such a section
+ may not be included in the Modified Version.
+N. Do not retitle any existing section to be Entitled "Endorsements"
+ or to conflict in title with any Invariant Section.
+O. Preserve any Warranty Disclaimers.
+
+If the Modified Version includes new front-matter sections or
+appendices that qualify as Secondary Sections and contain no material
+copied from the Document, you may at your option designate some or all
+of these sections as invariant. To do this, add their titles to the
+list of Invariant Sections in the Modified Version's license notice.
+These titles must be distinct from any other section titles.
+
+You may add a section Entitled "Endorsements", provided it contains
+nothing but endorsements of your Modified Version by various
+parties--for example, statements of peer review or that the text has
+been approved by an organization as the authoritative definition of a
+standard.
+
+You may add a passage of up to five words as a Front-Cover Text, and a
+passage of up to 25 words as a Back-Cover Text, to the end of the list
+of Cover Texts in the Modified Version. Only one passage of
+Front-Cover Text and one of Back-Cover Text may be added by (or
+through arrangements made by) any one entity. If the Document already
+includes a cover text for the same cover, previously added by you or
+by arrangement made by the same entity you are acting on behalf of,
+you may not add another; but you may replace the old one, on explicit
+permission from the previous publisher that added the old one.
+
+The author(s) and publisher(s) of the Document do not by this License
+give permission to use their names for publicity for or to assert or
+imply endorsement of any Modified Version.
+
+
+5. COMBINING DOCUMENTS
+
+You may combine the Document with other documents released under this
+License, under the terms defined in section 4 above for modified
+versions, provided that you include in the combination all of the
+Invariant Sections of all of the original documents, unmodified, and
+list them all as Invariant Sections of your combined work in its
+license notice, and that you preserve all their Warranty Disclaimers.
+
+The combined work need only contain one copy of this License, and
+multiple identical Invariant Sections may be replaced with a single
+copy. If there are multiple Invariant Sections with the same name but
+different contents, make the title of each such section unique by
+adding at the end of it, in parentheses, the name of the original
+author or publisher of that section if known, or else a unique number.
+Make the same adjustment to the section titles in the list of
+Invariant Sections in the license notice of the combined work.
+
+In the combination, you must combine any sections Entitled "History"
+in the various original documents, forming one section Entitled
+"History"; likewise combine any sections Entitled "Acknowledgements",
+and any sections Entitled "Dedications". You must delete all sections
+Entitled "Endorsements".
+
+
+6. COLLECTIONS OF DOCUMENTS
+
+You may make a collection consisting of the Document and other documents
+released under this License, and replace the individual copies of this
+License in the various documents with a single copy that is included in
+the collection, provided that you follow the rules of this License for
+verbatim copying of each of the documents in all other respects.
+
+You may extract a single document from such a collection, and distribute
+it individually under this License, provided you insert a copy of this
+License into the extracted document, and follow this License in all
+other respects regarding verbatim copying of that document.
+
+
+7. AGGREGATION WITH INDEPENDENT WORKS
+
+A compilation of the Document or its derivatives with other separate
+and independent documents or works, in or on a volume of a storage or
+distribution medium, is called an "aggregate" if the copyright
+resulting from the compilation is not used to limit the legal rights
+of the compilation's users beyond what the individual works permit.
+When the Document is included in an aggregate, this License does not
+apply to the other works in the aggregate which are not themselves
+derivative works of the Document.
+
+If the Cover Text requirement of section 3 is applicable to these
+copies of the Document, then if the Document is less than one half of
+the entire aggregate, the Document's Cover Texts may be placed on
+covers that bracket the Document within the aggregate, or the
+electronic equivalent of covers if the Document is in electronic form.
+Otherwise they must appear on printed covers that bracket the whole
+aggregate.
+
+
+8. TRANSLATION
+
+Translation is considered a kind of modification, so you may
+distribute translations of the Document under the terms of section 4.
+Replacing Invariant Sections with translations requires special
+permission from their copyright holders, but you may include
+translations of some or all Invariant Sections in addition to the
+original versions of these Invariant Sections. You may include a
+translation of this License, and all the license notices in the
+Document, and any Warranty Disclaimers, provided that you also include
+the original English version of this License and the original versions
+of those notices and disclaimers. In case of a disagreement between
+the translation and the original version of this License or a notice
+or disclaimer, the original version will prevail.
+
+If a section in the Document is Entitled "Acknowledgements",
+"Dedications", or "History", the requirement (section 4) to Preserve
+its Title (section 1) will typically require changing the actual
+title.
+
+
+9. TERMINATION
+
+You may not copy, modify, sublicense, or distribute the Document except
+as expressly provided for under this License. Any other attempt to
+copy, modify, sublicense or distribute the Document is void, and will
+automatically terminate your rights under this License. However,
+parties who have received copies, or rights, from you under this
+License will not have their licenses terminated so long as such
+parties remain in full compliance.
+
+
+10. FUTURE REVISIONS OF THIS LICENSE
+
+The Free Software Foundation may publish new, revised versions
+of the GNU Free Documentation License from time to time. Such new
+versions will be similar in spirit to the present version, but may
+differ in detail to address new problems or concerns. See
+http://www.gnu.org/copyleft/.
+
+Each version of the License is given a distinguishing version number.
+If the Document specifies that a particular numbered version of this
+License "or any later version" applies to it, you have the option of
+following the terms and conditions either of that specified version or
+of any later version that has been published (not as a draft) by the
+Free Software Foundation. If the Document does not specify a version
+number of this License, you may choose any version ever published (not
+as a draft) by the Free Software Foundation.
+
+
+ADDENDUM: How to use this License for your documents
+
+To use this License in a document you have written, include a copy of
+the License in the document and put the following copyright and
+license notices just after the title page:
+
+ Copyright (c) YEAR YOUR NAME.
+ Permission is granted to copy, distribute and/or modify this document
+ under the terms of the GNU Free Documentation License, Version 1.2
+ or any later version published by the Free Software Foundation;
+ with no Invariant Sections, no Front-Cover Texts, and no Back-Cover Texts.
+ A copy of the license is included in the section entitled "GNU
+ Free Documentation License".
+
+If you have Invariant Sections, Front-Cover Texts and Back-Cover Texts,
+replace the "with...Texts." line with this:
+
+ with the Invariant Sections being LIST THEIR TITLES, with the
+ Front-Cover Texts being LIST, and with the Back-Cover Texts being LIST.
+
+If you have Invariant Sections without Cover Texts, or some other
+combination of the three, merge those two alternatives to suit the
+situation.
+
+If your document contains nontrivial examples of program code, we
+recommend releasing these examples in parallel under your choice of
+free software license, such as the GNU General Public License,
+to permit their use in free software.</PRE
+></DIV
+><DIV
+CLASS="section"
+><HR><H2
+CLASS="section"
+><A
+NAME="_gnu_general_public_license_gpl"
+>6.3. GNU General Public License (GPL)</A
+></H2
+><PRE
+CLASS="literallayout"
+> GNU GENERAL PUBLIC LICENSE
+ Version 2, June 1991
+
+ Copyright (C) 1989, 1991 Free Software Foundation, Inc.,
+ 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
+ Everyone is permitted to copy and distribute verbatim copies
+ of this license document, but changing it is not allowed.
+
+ Preamble
+
+ The licenses for most software are designed to take away your
+freedom to share and change it. By contrast, the GNU General Public
+License is intended to guarantee your freedom to share and change free
+software--to make sure the software is free for all its users. This
+General Public License applies to most of the Free Software
+Foundation's software and to any other program whose authors commit to
+using it. (Some other Free Software Foundation software is covered by
+the GNU Lesser General Public License instead.) You can apply it to
+your programs, too.
+
+ When we speak of free software, we are referring to freedom, not
+price. Our General Public Licenses are designed to make sure that you
+have the freedom to distribute copies of free software (and charge for
+this service if you wish), that you receive source code or can get it
+if you want it, that you can change the software or use pieces of it
+in new free programs; and that you know you can do these things.
+
+ To protect your rights, we need to make restrictions that forbid
+anyone to deny you these rights or to ask you to surrender the rights.
+These restrictions translate to certain responsibilities for you if you
+distribute copies of the software, or if you modify it.
+
+ For example, if you distribute copies of such a program, whether
+gratis or for a fee, you must give the recipients all the rights that
+you have. You must make sure that they, too, receive or can get the
+source code. And you must show them these terms so they know their
+rights.
+
+ We protect your rights with two steps: (1) copyright the software, and
+(2) offer you this license which gives you legal permission to copy,
+distribute and/or modify the software.
+
+ Also, for each author's protection and ours, we want to make certain
+that everyone understands that there is no warranty for this free
+software. If the software is modified by someone else and passed on, we
+want its recipients to know that what they have is not the original, so
+that any problems introduced by others will not reflect on the original
+authors' reputations.
+
+ Finally, any free program is threatened constantly by software
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+program proprietary. To prevent this, we have made it clear that any
+patent must be licensed for everyone's free use or not licensed at all.
+
+ The precise terms and conditions for copying, distribution and
+modification follow.
+
+ GNU GENERAL PUBLIC LICENSE
+ TERMS AND CONDITIONS FOR COPYING, DISTRIBUTION AND MODIFICATION
+
+ 0. This License applies to any program or other work which contains
+a notice placed by the copyright holder saying it may be distributed
+under the terms of this General Public License. The "Program", below,
+refers to any such program or work, and a "work based on the Program"
+means either the Program or any derivative work under copyright law:
+that is to say, a work containing the Program or a portion of it,
+either verbatim or with modifications and/or translated into another
+language. (Hereinafter, translation is included without limitation in
+the term "modification".) Each licensee is addressed as "you".
+
+Activities other than copying, distribution and modification are not
+covered by this License; they are outside its scope. The act of
+running the Program is not restricted, and the output from the Program
+is covered only if its contents constitute a work based on the
+Program (independent of having been made by running the Program).
+Whether that is true depends on what the Program does.
+
+ 1. You may copy and distribute verbatim copies of the Program's
+source code as you receive it, in any medium, provided that you
+conspicuously and appropriately publish on each copy an appropriate
+copyright notice and disclaimer of warranty; keep intact all the
+notices that refer to this License and to the absence of any warranty;
+and give any other recipients of the Program a copy of this License
+along with the Program.
+
+You may charge a fee for the physical act of transferring a copy, and
+you may at your option offer warranty protection in exchange for a fee.
+
+ 2. You may modify your copy or copies of the Program or any portion
+of it, thus forming a work based on the Program, and copy and
+distribute such modifications or work under the terms of Section 1
+above, provided that you also meet all of these conditions:
+
+ a) You must cause the modified files to carry prominent notices
+ stating that you changed the files and the date of any change.
+
+ b) You must cause any work that you distribute or publish, that in
+ whole or in part contains or is derived from the Program or any
+ part thereof, to be licensed as a whole at no charge to all third
+ parties under the terms of this License.
+
+ c) If the modified program normally reads commands interactively
+ when run, you must cause it, when started running for such
+ interactive use in the most ordinary way, to print or display an
+ announcement including an appropriate copyright notice and a
+ notice that there is no warranty (or else, saying that you provide
+ a warranty) and that users may redistribute the program under
+ these conditions, and telling the user how to view a copy of this
+ License. (Exception: if the Program itself is interactive but
+ does not normally print such an announcement, your work based on
+ the Program is not required to print an announcement.)
+
+These requirements apply to the modified work as a whole. If
+identifiable sections of that work are not derived from the Program,
+and can be reasonably considered independent and separate works in
+themselves, then this License, and its terms, do not apply to those
+sections when you distribute them as separate works. But when you
+distribute the same sections as part of a whole which is a work based
+on the Program, the distribution of the whole must be on the terms of
+this License, whose permissions for other licensees extend to the
+entire whole, and thus to each and every part regardless of who wrote it.
+
+Thus, it is not the intent of this section to claim rights or contest
+your rights to work written entirely by you; rather, the intent is to
+exercise the right to control the distribution of derivative or
+collective works based on the Program.
+
+In addition, mere aggregation of another work not based on the Program
+with the Program (or with a work based on the Program) on a volume of
+a storage or distribution medium does not bring the other work under
+the scope of this License.
+
+ 3. You may copy and distribute the Program (or a work based on it,
+under Section 2) in object code or executable form under the terms of
+Sections 1 and 2 above provided that you also do one of the following:
+
+ a) Accompany it with the complete corresponding machine-readable
+ source code, which must be distributed under the terms of Sections
+ 1 and 2 above on a medium customarily used for software interchange; or,
+
+ b) Accompany it with a written offer, valid for at least three
+ years, to give any third party, for a charge no more than your
+ cost of physically performing source distribution, a complete
+ machine-readable copy of the corresponding source code, to be
+ distributed under the terms of Sections 1 and 2 above on a medium
+ customarily used for software interchange; or,
+
+ c) Accompany it with the information you received as to the offer
+ to distribute corresponding source code. (This alternative is
+ allowed only for noncommercial distribution and only if you
+ received the program in object code or executable form with such
+ an offer, in accord with Subsection b above.)
+
+The source code for a work means the preferred form of the work for
+making modifications to it. For an executable work, complete source
+code means all the source code for all modules it contains, plus any
+associated interface definition files, plus the scripts used to
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+special exception, the source code distributed need not include
+anything that is normally distributed (in either source or binary
+form) with the major components (compiler, kernel, and so on) of the
+operating system on which the executable runs, unless that component
+itself accompanies the executable.
+
+If distribution of executable or object code is made by offering
+access to copy from a designated place, then offering equivalent
+access to copy the source code from the same place counts as
+distribution of the source code, even though third parties are not
+compelled to copy the source along with the object code.
+
+ 4. You may not copy, modify, sublicense, or distribute the Program
+except as expressly provided under this License. Any attempt
+otherwise to copy, modify, sublicense or distribute the Program is
+void, and will automatically terminate your rights under this License.
+However, parties who have received copies, or rights, from you under
+this License will not have their licenses terminated so long as such
+parties remain in full compliance.
+
+ 5. You are not required to accept this License, since you have not
+signed it. However, nothing else grants you permission to modify or
+distribute the Program or its derivative works. These actions are
+prohibited by law if you do not accept this License. Therefore, by
+modifying or distributing the Program (or any work based on the
+Program), you indicate your acceptance of this License to do so, and
+all its terms and conditions for copying, distributing or modifying
+the Program or works based on it.
+
+ 6. Each time you redistribute the Program (or any work based on the
+Program), the recipient automatically receives a license from the
+original licensor to copy, distribute or modify the Program subject to
+these terms and conditions. You may not impose any further
+restrictions on the recipients' exercise of the rights granted herein.
+You are not responsible for enforcing compliance by third parties to
+this License.
+
+ 7. If, as a consequence of a court judgment or allegation of patent
+infringement or for any other reason (not limited to patent issues),
+conditions are imposed on you (whether by court order, agreement or
+otherwise) that contradict the conditions of this License, they do not
+excuse you from the conditions of this License. If you cannot
+distribute so as to satisfy simultaneously your obligations under this
+License and any other pertinent obligations, then as a consequence you
+may not distribute the Program at all. For example, if a patent
+license would not permit royalty-free redistribution of the Program by
+all those who receive copies directly or indirectly through you, then
+the only way you could satisfy both it and this License would be to
+refrain entirely from distribution of the Program.
+
+If any portion of this section is held invalid or unenforceable under
+any particular circumstance, the balance of the section is intended to
+apply and the section as a whole is intended to apply in other
+circumstances.
+
+It is not the purpose of this section to induce you to infringe any
+patents or other property right claims or to contest validity of any
+such claims; this section has the sole purpose of protecting the
+integrity of the free software distribution system, which is
+implemented by public license practices. Many people have made
+generous contributions to the wide range of software distributed
+through that system in reliance on consistent application of that
+system; it is up to the author/donor to decide if he or she is willing
+to distribute software through any other system and a licensee cannot
+impose that choice.
+
+This section is intended to make thoroughly clear what is believed to
+be a consequence of the rest of this License.
+
+ 8. If the distribution and/or use of the Program is restricted in
+certain countries either by patents or by copyrighted interfaces, the
+original copyright holder who places the Program under this License
+may add an explicit geographical distribution limitation excluding
+those countries, so that distribution is permitted only in or among
+countries not thus excluded. In such case, this License incorporates
+the limitation as if written in the body of this License.
+
+ 9. The Free Software Foundation may publish revised and/or new versions
+of the General Public License from time to time. Such new versions will
+be similar in spirit to the present version, but may differ in detail to
+address new problems or concerns.
+
+Each version is given a distinguishing version number. If the Program
+specifies a version number of this License which applies to it and "any
+later version", you have the option of following the terms and conditions
+either of that version or of any later version published by the Free
+Software Foundation. If the Program does not specify a version number of
+this License, you may choose any version ever published by the Free Software
+Foundation.
+
+ 10. If you wish to incorporate parts of the Program into other free
+programs whose distribution conditions are different, write to the author
+to ask for permission. For software which is copyrighted by the Free
+Software Foundation, write to the Free Software Foundation; we sometimes
+make exceptions for this. Our decision will be guided by the two goals
+of preserving the free status of all derivatives of our free software and
+of promoting the sharing and reuse of software generally.
+
+ NO WARRANTY
+
+ 11. BECAUSE THE PROGRAM IS LICENSED FREE OF CHARGE, THERE IS NO WARRANTY
+FOR THE PROGRAM, TO THE EXTENT PERMITTED BY APPLICABLE LAW. EXCEPT WHEN
+OTHERWISE STATED IN WRITING THE COPYRIGHT HOLDERS AND/OR OTHER PARTIES
+PROVIDE THE PROGRAM "AS IS" WITHOUT WARRANTY OF ANY KIND, EITHER EXPRESSED
+OR IMPLIED, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. THE ENTIRE RISK AS
+TO THE QUALITY AND PERFORMANCE OF THE PROGRAM IS WITH YOU. SHOULD THE
+PROGRAM PROVE DEFECTIVE, YOU ASSUME THE COST OF ALL NECESSARY SERVICING,
+REPAIR OR CORRECTION.
+
+ 12. IN NO EVENT UNLESS REQUIRED BY APPLICABLE LAW OR AGREED TO IN WRITING
+WILL ANY COPYRIGHT HOLDER, OR ANY OTHER PARTY WHO MAY MODIFY AND/OR
+REDISTRIBUTE THE PROGRAM AS PERMITTED ABOVE, BE LIABLE TO YOU FOR DAMAGES,
+INCLUDING ANY GENERAL, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES ARISING
+OUT OF THE USE OR INABILITY TO USE THE PROGRAM (INCLUDING BUT NOT LIMITED
+TO LOSS OF DATA OR DATA BEING RENDERED INACCURATE OR LOSSES SUSTAINED BY
+YOU OR THIRD PARTIES OR A FAILURE OF THE PROGRAM TO OPERATE WITH ANY OTHER
+PROGRAMS), EVEN IF SUCH HOLDER OR OTHER PARTY HAS BEEN ADVISED OF THE
+POSSIBILITY OF SUCH DAMAGES.
+
+ END OF TERMS AND CONDITIONS
+
+ How to Apply These Terms to Your New Programs
+
+ If you develop a new program, and you want it to be of the greatest
+possible use to the public, the best way to achieve this is to make it
+free software which everyone can redistribute and change under these terms.
+
+ To do so, attach the following notices to the program. It is safest
+to attach them to the start of each source file to most effectively
+convey the exclusion of warranty; and each file should have at least
+the "copyright" line and a pointer to where the full notice is found.
+
+ <one line to give the program's name and a brief idea of what it does.>
+ Copyright (C) <year> <name of author>
+
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 2 of the License, or
+ (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License along
+ with this program; if not, write to the Free Software Foundation, Inc.,
+ 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
+
+Also add information on how to contact you by electronic and paper mail.
+
+If the program is interactive, make it output a short notice like this
+when it starts in an interactive mode:
+
+ Gnomovision version 69, Copyright (C) year name of author
+ Gnomovision comes with ABSOLUTELY NO WARRANTY; for details type `show w'.
+ This is free software, and you are welcome to redistribute it
+ under certain conditions; type `show c' for details.
+
+The hypothetical commands `show w' and `show c' should show the appropriate
+parts of the General Public License. Of course, the commands you use may
+be called something other than `show w' and `show c'; they could even be
+mouse-clicks or menu items--whatever suits your program.
+
+You should also get your employer (if you work as a programmer) or your
+school, if any, to sign a "copyright disclaimer" for the program, if
+necessary. Here is a sample; alter the names:
+
+ Yoyodyne, Inc., hereby disclaims all copyright interest in the program
+ `Gnomovision' (which makes passes at compilers) written by James Hacker.
+
+ <signature of Ty Coon>, 1 April 1989
+ Ty Coon, President of Vice
+
+This General Public License does not permit incorporating your program into
+proprietary programs. If your program is a subroutine library, you may
+consider it more useful to permit linking proprietary applications with the
+library. If this is what you want to do, use the GNU Lesser General
+Public License instead of this License.</PRE
+></DIV
+></DIV
+></DIV
+></BODY
+></HTML
+>
\ No newline at end of file
--- /dev/null
+<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN""http://www.w3.org/TR/html4/loose.dtd">
+<HTML
+><HEAD
+><TITLE
+>Compilation and installation</TITLE
+><META
+NAME="GENERATOR"
+CONTENT="Modular DocBook HTML Stylesheet Version 1.79"><LINK
+REL="HOME"
+TITLE="Universal JTAG library, server and tools"
+HREF="index.html"><LINK
+REL="UP"
+TITLE="General"
+HREF="_general.html"><LINK
+REL="PREVIOUS"
+TITLE="System requirements"
+HREF="_system_requirements.html"><LINK
+REL="NEXT"
+TITLE="Usage"
+HREF="_usage.html"><LINK
+REL="STYLESHEET"
+TYPE="text/css"
+HREF="UrJTAG.css"></HEAD
+><BODY
+CLASS="section"
+BGCOLOR="#FFFFFF"
+TEXT="#000000"
+LINK="#0000FF"
+VLINK="#840084"
+ALINK="#0000FF"
+><DIV
+CLASS="NAVHEADER"
+><TABLE
+SUMMARY="Header navigation table"
+WIDTH="100%"
+BORDER="0"
+CELLPADDING="0"
+CELLSPACING="0"
+><TR
+><TH
+COLSPAN="3"
+ALIGN="center"
+>Universal JTAG library, server and tools</TH
+></TR
+><TR
+><TD
+WIDTH="10%"
+ALIGN="left"
+VALIGN="bottom"
+><A
+HREF="_system_requirements.html"
+ACCESSKEY="P"
+>Prev</A
+></TD
+><TD
+WIDTH="80%"
+ALIGN="center"
+VALIGN="bottom"
+>Chapter 2. General</TD
+><TD
+WIDTH="10%"
+ALIGN="right"
+VALIGN="bottom"
+><A
+HREF="_usage.html"
+ACCESSKEY="N"
+>Next</A
+></TD
+></TR
+></TABLE
+><HR
+ALIGN="LEFT"
+WIDTH="100%"></DIV
+><DIV
+CLASS="section"
+><H1
+CLASS="section"
+><A
+NAME="_compilation_and_installation"
+>2.4. Compilation and installation</A
+></H1
+><DIV
+CLASS="section"
+><H2
+CLASS="section"
+><A
+NAME="_required_software_for_compiling_urjtag"
+>2.4.1. Required software for compiling UrJTAG</A
+></H2
+><P
+>To run autogen.sh, you need autoconf and automake, bison, and a recent flex.</P
+><P
+>The distributed source tarball contains source pregenerated with a current
+flex version; flex therefore is only needed if you want to compile code
+checked out from our Subversion repository. Flex 2.5.4a as it comes with
+most but the very latest Cygwin release cannot build the scanners for BSDL and
+SVF. Building these files requires Flex 2.5.33 or newer. The configure script
+will compare the available Flex version against these preconditions and enables
+or disables the related features.</P
+><P
+>Furthermore, libtool should be available, and "devel" versions of the following
+packages:</P
+><P
+></P
+><UL
+><LI
+><P
+> gettext
+</P
+></LI
+><LI
+><P
+> readline (not needed, but really eases interactive use)
+</P
+></LI
+><LI
+><P
+> ioperm (needed only for Cygwin)
+</P
+></LI
+></UL
+></DIV
+><DIV
+CLASS="section"
+><H2
+CLASS="section"
+><A
+NAME="_required_libraries_for_usb_support"
+>2.4.2. Required libraries for USB support</A
+></H2
+><P
+>For USB adapter support (including support for parallel port adapters attached
+to USB-to-parallel converters), one or more additional libraries are required.</P
+><P
+>Many USB JTAG adapters and USB-to-parallel converters are based on chips
+made by FTDI. To support these, either intra.net's "libftdi" or FTDI's
+"FTD2XX" library can be used.</P
+><P
+>On many modern Linux distributions, libftdi is available as a precompiled
+package and can be installed using the distribution's package management system
+(e.g. "apt-get libftdi-dev" for Debian and Ubuntu). If it isn't available or
+you don't run Linux, you can get it from</P
+><P
+></P
+><UL
+><LI
+><P
+> <A
+HREF="http://www.intra2net.com/en/developer/libftdi/"
+TARGET="_top"
+>http://www.intra2net.com/en/developer/libftdi/</A
+>
+</P
+></LI
+></UL
+><P
+>Alternatively, you can use the FTD2XX library from the chip manufacturer FTDI.
+It is available for Linux and Windows. There's more information about linking
+to that library in a Cygwin environment below.</P
+><P
+>All other USB JTAG adapters can be supported only if libusb is installed.
+There is a libusb-win32 variant that can be used in a Cygwin environment:</P
+><P
+></P
+><UL
+><LI
+><P
+> <A
+HREF="http://libusb.sourceforge.net"
+TARGET="_top"
+>http://libusb.sourceforge.net</A
+> (libusb)
+</P
+></LI
+><LI
+><P
+> <A
+HREF="http://libusb-win32.sourceforge.net"
+TARGET="_top"
+>http://libusb-win32.sourceforge.net</A
+> (libusb for Windows)
+</P
+></LI
+></UL
+><P
+>For specific notes regarding the use of these libraries in a Cygwin
+environment, see below.</P
+></DIV
+><DIV
+CLASS="section"
+><H2
+CLASS="section"
+><A
+NAME="_installing_from_source_tar_gz"
+>2.4.3. Installing from source tar.gz</A
+></H2
+><P
+>The installation follows the standard configure, make, make install scheme:</P
+><PRE
+CLASS="literallayout"
+>tar xzvf urjtag.tar.gz
+cd ../jtag
+./configure
+make
+make install</PRE
+></DIV
+><DIV
+CLASS="section"
+><H2
+CLASS="section"
+><A
+NAME="_installing_from_subversion_repository"
+>2.4.4. Installing from Subversion repository</A
+></H2
+><P
+>If you want to try the very newest version of UrJTAG…</P
+><PRE
+CLASS="literallayout"
+>svn co http://urjtag.svn.sourceforge.net/svnroot/urjtag/trunk urjtag</PRE
+><PRE
+CLASS="literallayout"
+>cd urjtag/jtag
+./autogen.sh
+# ./configure done by autogen.sh; run it here with special options if needed
+make
+make install</PRE
+></DIV
+><DIV
+CLASS="section"
+><H2
+CLASS="section"
+><A
+NAME="_linking_to_ftd2xx_dll_in_cygwin_environment"
+>2.4.5. Linking to FTD2XX.DLL in Cygwin environment</A
+></H2
+><P
+>Before running configure, get the D2XX drivers from FTDI.</P
+><P
+></P
+><UL
+><LI
+><P
+> <A
+HREF="http://www.ftdichip.com/Drivers/D2XX.htm"
+TARGET="_top"
+>http://www.ftdichip.com/Drivers/D2XX.htm</A
+> (FTDI FTD2XX library)
+</P
+></LI
+></UL
+><P
+>Unzip the archive into a directory of your choice (probably a choice
+without spaces in the name is better) and afterwards run configure with the
+"—with-ftd2xx" pointing to that directory, e.g.</P
+><PRE
+CLASS="literallayout"
+>./configure --with-ftd2xx="/cygdrive/c/temp/ftdi-cdm-drivers"</PRE
+><P
+>Configure should now report</P
+><PRE
+CLASS="literallayout"
+>jtag is now configured for
+ ...
+ Detected libftd2xx : yes</PRE
+></DIV
+><DIV
+CLASS="section"
+><H2
+CLASS="section"
+><A
+NAME="_using_libusb_win32_in_cygwin_environment"
+>2.4.6. Using LibUSB-Win32 in Cygwin environment</A
+></H2
+><P
+>Before running configure, install the LibUSB-Win32 "filter" driver from SF.</P
+><P
+></P
+><UL
+><LI
+><P
+> <A
+HREF="http://libusb-win32.sourceforge.net"
+TARGET="_top"
+>http://libusb-win32.sourceforge.net</A
+>
+</P
+></LI
+></UL
+><P
+>Then point configure to the directory where LibUSB-Win32 was installed (it
+might give problems if the path contains spaces, as "Program Files" does!):</P
+><PRE
+CLASS="literallayout"
+>./configure --with-libusb="/cygdrive/c/Programme/LibUSB-Win32/"</PRE
+></DIV
+><DIV
+CLASS="section"
+><H2
+CLASS="section"
+><A
+NAME="_compiling_with_mingw"
+>2.4.7. Compiling with MinGW</A
+></H2
+><P
+>UrJTAG may be compiled into a Windows executable using the MinGW compiler
+(<A
+HREF="http://www.mingw.org"
+TARGET="_top"
+>http://www.mingw.org</A
+>), or Cygwin GCC with the "-mno-cygwin" compiler flag.</P
+><P
+>This has the advantage over running in a Cygwin environment that you don't need
+to install anything else but the jtag.exe (plus libraries like FTD2XX.dll or
+InpOut32.DLL that are required for device access under Windows in any case).</P
+><P
+>However, because support for MinGW is quite new in UrJTAG, it may lack some
+features (e.g. readline support) or run a little slower.</P
+><P
+>Because it seems to be easier to set up a Cygwin environment, we recommend
+using the Cygwin GCC with "-mno-cygwin" flag instead of using a MinGW setup:</P
+><PRE
+CLASS="literallayout"
+>CFLAGS="-mno-cygwin -O2" ./configure --with-ftd2xx=/tmp/cdm-drivers --with-inpout32</PRE
+><P
+>It is even possible to cross-compile and build the executable on a Linux
+host:</P
+><PRE
+CLASS="literallayout"
+>./configure --host=i586-mingw32msvc --with-ftd2xx=/tmp/cdm-drivers --with-inpout32
+make</PRE
+><P
+>The "—with-inpout32" switch tells UrJTAG to use the InpOut32.DLL for access to
+parallel ports, because the Cygwin ioperm isn't available for MinGW. The InpOut32
+library is available from logix4u.net:</P
+><PRE
+CLASS="literallayout"
+>http://logix4u.net/Legacy_Ports/Parallel_Port/Inpout32.dll_for_Windows_98/2000/NT/XP.html</PRE
+></DIV
+><DIV
+CLASS="section"
+><H2
+CLASS="section"
+><A
+NAME="_driver_tailoring"
+>2.4.8. Driver tailoring</A
+></H2
+><P
+>The configure script enables all default bus, cable and lowlevel drivers. You
+can include and exclude specific drivers if required. For a list of parameters
+run</P
+><PRE
+CLASS="literallayout"
+>./configure --help</PRE
+><P
+>to figure out the appropriate —enable-bus, —enable-cable and —enable-lowlevel
+options.</P
+></DIV
+><DIV
+CLASS="section"
+><H2
+CLASS="section"
+><A
+NAME="_building_the_bsdl_subsystem"
+>2.4.9. Building the BSDL subsystem</A
+></H2
+><P
+>As mentioned above, building the BSDL lexer requires Flex 2.5.33 or newer. If
+the detected Flex version is not recent enough, configure will disable the
+BSDL subsystem. The detection result is summarized at the end of configure:</P
+><PRE
+CLASS="literallayout"
+>jtag is now configured for
+ ...
+ Build BSDL subsystem : yes</PRE
+><P
+>Flex is only required when you're working on a check-out of the Subversion
+repository. In this case Flex has to be called to transform bsdl_flex.l to
+bsdl_flex.c. When you're compiling from released sources, the local Flex
+version is not relevant since the output file of Flex is part of the
+tarball. I.e. even if the local Flex fails the check, the BSDL subsystem is
+enabled and will be compiled from the released C files.</P
+></DIV
+></DIV
+><DIV
+CLASS="NAVFOOTER"
+><HR
+ALIGN="LEFT"
+WIDTH="100%"><TABLE
+SUMMARY="Footer navigation table"
+WIDTH="100%"
+BORDER="0"
+CELLPADDING="0"
+CELLSPACING="0"
+><TR
+><TD
+WIDTH="33%"
+ALIGN="left"
+VALIGN="top"
+><A
+HREF="_system_requirements.html"
+ACCESSKEY="P"
+>Prev</A
+></TD
+><TD
+WIDTH="34%"
+ALIGN="center"
+VALIGN="top"
+><A
+HREF="index.html"
+ACCESSKEY="H"
+>Home</A
+></TD
+><TD
+WIDTH="33%"
+ALIGN="right"
+VALIGN="top"
+><A
+HREF="_usage.html"
+ACCESSKEY="N"
+>Next</A
+></TD
+></TR
+><TR
+><TD
+WIDTH="33%"
+ALIGN="left"
+VALIGN="top"
+>System requirements</TD
+><TD
+WIDTH="34%"
+ALIGN="center"
+VALIGN="top"
+><A
+HREF="_general.html"
+ACCESSKEY="U"
+>Up</A
+></TD
+><TD
+WIDTH="33%"
+ALIGN="right"
+VALIGN="top"
+>Usage</TD
+></TR
+></TABLE
+></DIV
+></BODY
+></HTML
+>
\ No newline at end of file
--- /dev/null
+<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN""http://www.w3.org/TR/html4/loose.dtd">
+<HTML
+><HEAD
+><TITLE
+>Copyright</TITLE
+><META
+NAME="GENERATOR"
+CONTENT="Modular DocBook HTML Stylesheet Version 1.79"><LINK
+REL="HOME"
+TITLE="Universal JTAG library, server and tools"
+HREF="index.html"><LINK
+REL="PREVIOUS"
+TITLE="Universal JTAG library, server and tools"
+HREF="index.html"><LINK
+REL="NEXT"
+TITLE="General"
+HREF="_general.html"><LINK
+REL="STYLESHEET"
+TYPE="text/css"
+HREF="UrJTAG.css"></HEAD
+><BODY
+CLASS="chapter"
+BGCOLOR="#FFFFFF"
+TEXT="#000000"
+LINK="#0000FF"
+VLINK="#840084"
+ALINK="#0000FF"
+><DIV
+CLASS="NAVHEADER"
+><TABLE
+SUMMARY="Header navigation table"
+WIDTH="100%"
+BORDER="0"
+CELLPADDING="0"
+CELLSPACING="0"
+><TR
+><TH
+COLSPAN="3"
+ALIGN="center"
+>Universal JTAG library, server and tools</TH
+></TR
+><TR
+><TD
+WIDTH="10%"
+ALIGN="left"
+VALIGN="bottom"
+><A
+HREF="index.html"
+ACCESSKEY="P"
+>Prev</A
+></TD
+><TD
+WIDTH="80%"
+ALIGN="center"
+VALIGN="bottom"
+></TD
+><TD
+WIDTH="10%"
+ALIGN="right"
+VALIGN="bottom"
+><A
+HREF="_general.html"
+ACCESSKEY="N"
+>Next</A
+></TD
+></TR
+></TABLE
+><HR
+ALIGN="LEFT"
+WIDTH="100%"></DIV
+><DIV
+CLASS="chapter"
+><H1
+><A
+NAME="_copyright"
+></A
+>Chapter 1. Copyright</H1
+><P
+>Copyright 2007, 2008 Kolja Waschk and the respective authors.</P
+><P
+>Permission is granted to copy, distribute and/or modify this document under the
+terms of the GNU Free Documentation License, Version 1.2 or any later version
+published by the Free Software Foundation. A copy of the license is included in
+the section entitled "GNU Free Documentation License".</P
+></DIV
+><DIV
+CLASS="NAVFOOTER"
+><HR
+ALIGN="LEFT"
+WIDTH="100%"><TABLE
+SUMMARY="Footer navigation table"
+WIDTH="100%"
+BORDER="0"
+CELLPADDING="0"
+CELLSPACING="0"
+><TR
+><TD
+WIDTH="33%"
+ALIGN="left"
+VALIGN="top"
+><A
+HREF="index.html"
+ACCESSKEY="P"
+>Prev</A
+></TD
+><TD
+WIDTH="34%"
+ALIGN="center"
+VALIGN="top"
+><A
+HREF="index.html"
+ACCESSKEY="H"
+>Home</A
+></TD
+><TD
+WIDTH="33%"
+ALIGN="right"
+VALIGN="top"
+><A
+HREF="_general.html"
+ACCESSKEY="N"
+>Next</A
+></TD
+></TR
+><TR
+><TD
+WIDTH="33%"
+ALIGN="left"
+VALIGN="top"
+>Universal JTAG library, server and tools</TD
+><TD
+WIDTH="34%"
+ALIGN="center"
+VALIGN="top"
+> </TD
+><TD
+WIDTH="33%"
+ALIGN="right"
+VALIGN="top"
+>General</TD
+></TR
+></TABLE
+></DIV
+></BODY
+></HTML
+>
\ No newline at end of file
--- /dev/null
+<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN""http://www.w3.org/TR/html4/loose.dtd">
+<HTML
+><HEAD
+><TITLE
+>Data file format</TITLE
+><META
+NAME="GENERATOR"
+CONTENT="Modular DocBook HTML Stylesheet Version 1.79"><LINK
+REL="HOME"
+TITLE="Universal JTAG library, server and tools"
+HREF="index.html"><LINK
+REL="UP"
+TITLE="Internals"
+HREF="_internals.html"><LINK
+REL="PREVIOUS"
+TITLE="Drivers"
+HREF="_drivers.html"><LINK
+REL="NEXT"
+TITLE="Development"
+HREF="_development.html"><LINK
+REL="STYLESHEET"
+TYPE="text/css"
+HREF="UrJTAG.css"></HEAD
+><BODY
+CLASS="section"
+BGCOLOR="#FFFFFF"
+TEXT="#000000"
+LINK="#0000FF"
+VLINK="#840084"
+ALINK="#0000FF"
+><DIV
+CLASS="NAVHEADER"
+><TABLE
+SUMMARY="Header navigation table"
+WIDTH="100%"
+BORDER="0"
+CELLPADDING="0"
+CELLSPACING="0"
+><TR
+><TH
+COLSPAN="3"
+ALIGN="center"
+>Universal JTAG library, server and tools</TH
+></TR
+><TR
+><TD
+WIDTH="10%"
+ALIGN="left"
+VALIGN="bottom"
+><A
+HREF="_drivers.html"
+ACCESSKEY="P"
+>Prev</A
+></TD
+><TD
+WIDTH="80%"
+ALIGN="center"
+VALIGN="bottom"
+>Chapter 4. Internals</TD
+><TD
+WIDTH="10%"
+ALIGN="right"
+VALIGN="bottom"
+><A
+HREF="_development.html"
+ACCESSKEY="N"
+>Next</A
+></TD
+></TR
+></TABLE
+><HR
+ALIGN="LEFT"
+WIDTH="100%"></DIV
+><DIV
+CLASS="section"
+><H1
+CLASS="section"
+><A
+NAME="_data_file_format"
+>4.3. Data file format</A
+></H1
+><P
+>JTAG declarations files are located in directory "data". The files contains
+common part specific JTAG information in parseable form, e.g. list of the JTAG
+commands, boundary scan register, list of JTAG registers, etc.</P
+><P
+>Syntax of the JTAG declaration file is defined in the following subsections.</P
+><DIV
+CLASS="section"
+><H2
+CLASS="section"
+><A
+NAME="_general_rules"
+>4.3.1. General rules</A
+></H2
+><P
+>JTAG declaration file is text file which consists of lines. Empty lines are
+ignored. Text after first "#" on the line to the end of line is ignored. This
+is useful for comments. All other lines are significant.</P
+><P
+>Each significant line consists of tokens separated by whitespace. Whitespace
+could be spaces and/or tabs.</P
+></DIV
+><DIV
+CLASS="section"
+><H2
+CLASS="section"
+><A
+NAME="_signal_definition"
+>4.3.2. Signal Definition</A
+></H2
+><P
+>Signal definition line consists of word "signal" followed by whitespace and
+signal name (without spaces in the name). Rest of the line should contain
+whitespace separated list of pins of the part. This list is currently not used
+for any purpose in JTAG Tools. It is intended for future use.</P
+></DIV
+></DIV
+><DIV
+CLASS="NAVFOOTER"
+><HR
+ALIGN="LEFT"
+WIDTH="100%"><TABLE
+SUMMARY="Footer navigation table"
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+>
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+><HEAD
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+HREF="index.html"><LINK
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+HREF="_internals.html"><LINK
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+WIDTH="100%"
+BORDER="0"
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+><TH
+COLSPAN="3"
+ALIGN="center"
+>Universal JTAG library, server and tools</TH
+></TR
+><TR
+><TD
+WIDTH="10%"
+ALIGN="left"
+VALIGN="bottom"
+><A
+HREF="_data_file_format.html"
+ACCESSKEY="P"
+>Prev</A
+></TD
+><TD
+WIDTH="80%"
+ALIGN="center"
+VALIGN="bottom"
+>Chapter 4. Internals</TD
+><TD
+WIDTH="10%"
+ALIGN="right"
+VALIGN="bottom"
+><A
+HREF="_f_a_q.html"
+ACCESSKEY="N"
+>Next</A
+></TD
+></TR
+></TABLE
+><HR
+ALIGN="LEFT"
+WIDTH="100%"></DIV
+><DIV
+CLASS="section"
+><H1
+CLASS="section"
+><A
+NAME="_development"
+>4.4. Development</A
+></H1
+><DIV
+CLASS="section"
+><H2
+CLASS="section"
+><A
+NAME="_future_plans"
+>4.4.1. Future Plans</A
+></H2
+><P
+></P
+><UL
+><LI
+><P
+> C API and library package
+</P
+></LI
+><LI
+><P
+> Bindings for Python, Perl, …
+</P
+></LI
+><LI
+><P
+> TCP/IP access
+</P
+></LI
+><LI
+><P
+> New cable drivers
+</P
+></LI
+><LI
+><P
+> …
+</P
+></LI
+></UL
+></DIV
+><DIV
+CLASS="section"
+><H2
+CLASS="section"
+><A
+NAME="_how_to_contribute"
+>4.4.2. How to contribute</A
+></H2
+><P
+></P
+><UL
+><LI
+><P
+> Using Subversion
+</P
+></LI
+><LI
+><P
+> Create and submit a patch
+</P
+></LI
+><LI
+><P
+> Use SourceForge trackers
+</P
+></LI
+></UL
+></DIV
+></DIV
+><DIV
+CLASS="NAVFOOTER"
+><HR
+ALIGN="LEFT"
+WIDTH="100%"><TABLE
+SUMMARY="Footer navigation table"
+WIDTH="100%"
+BORDER="0"
+CELLPADDING="0"
+CELLSPACING="0"
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+HREF="_data_file_format.html"
+ACCESSKEY="P"
+>Prev</A
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+ACCESSKEY="N"
+>Next</A
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+><TR
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+WIDTH="33%"
+ALIGN="left"
+VALIGN="top"
+>Data file format</TD
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+ALIGN="center"
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+HREF="_internals.html"
+ACCESSKEY="U"
+>Up</A
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+></HTML
+>
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+<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN""http://www.w3.org/TR/html4/loose.dtd">
+<HTML
+><HEAD
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+>Drivers</TITLE
+><META
+NAME="GENERATOR"
+CONTENT="Modular DocBook HTML Stylesheet Version 1.79"><LINK
+REL="HOME"
+TITLE="Universal JTAG library, server and tools"
+HREF="index.html"><LINK
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+HREF="_data_file_format.html"><LINK
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+HREF="UrJTAG.css"></HEAD
+><BODY
+CLASS="section"
+BGCOLOR="#FFFFFF"
+TEXT="#000000"
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+VLINK="#840084"
+ALINK="#0000FF"
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+CLASS="NAVHEADER"
+><TABLE
+SUMMARY="Header navigation table"
+WIDTH="100%"
+BORDER="0"
+CELLPADDING="0"
+CELLSPACING="0"
+><TR
+><TH
+COLSPAN="3"
+ALIGN="center"
+>Universal JTAG library, server and tools</TH
+></TR
+><TR
+><TD
+WIDTH="10%"
+ALIGN="left"
+VALIGN="bottom"
+><A
+HREF="_internals.html"
+ACCESSKEY="P"
+>Prev</A
+></TD
+><TD
+WIDTH="80%"
+ALIGN="center"
+VALIGN="bottom"
+>Chapter 4. Internals</TD
+><TD
+WIDTH="10%"
+ALIGN="right"
+VALIGN="bottom"
+><A
+HREF="_data_file_format.html"
+ACCESSKEY="N"
+>Next</A
+></TD
+></TR
+></TABLE
+><HR
+ALIGN="LEFT"
+WIDTH="100%"></DIV
+><DIV
+CLASS="section"
+><H1
+CLASS="section"
+><A
+NAME="_drivers"
+>4.2. Drivers</A
+></H1
+><P
+></P
+><UL
+><LI
+><P
+> Cable drivers
+</P
+></LI
+><LI
+><P
+> Link drivers
+</P
+></LI
+><LI
+><P
+> TAP drivers
+</P
+></LI
+><LI
+><P
+> Chain drivers
+</P
+></LI
+><LI
+><P
+> Bus drivers
+</P
+></LI
+><LI
+><P
+> Flash drivers
+</P
+></LI
+><LI
+><P
+> Commands
+</P
+></LI
+></UL
+><DIV
+CLASS="section"
+><H2
+CLASS="section"
+><A
+NAME="_cable_specific_drivers_src_tap_cable"
+>4.2.1. Cable-specific drivers (src/tap/cable)</A
+></H2
+><P
+>Cable-specific drivers are those which are visible to the user through
+the "jtag" command shell. They're listed in response to the "help cable"
+command. Each driver has to provide the following functions:</P
+><P
+></P
+><UL
+><LI
+><P
+> connect(), init() - Initialization
+</P
+></LI
+><LI
+><P
+> done(), cable_free(), disconnect() - Cleaning up
+</P
+></LI
+><LI
+><P
+> set_frequency() - set bitrate for shifting data through the chain
+</P
+></LI
+><LI
+><P
+> clock(), get_tdo(), transfer() - immediate JTAG activities
+</P
+></LI
+><LI
+><P
+> flush() - internally used to actually perform JTAG activities
+</P
+></LI
+><LI
+><P
+> help() - a help text to be displayed by the jtag command shell
+</P
+></LI
+></UL
+><DIV
+CLASS="section"
+><H3
+CLASS="section"
+><A
+NAME="_initialization"
+>4.2.1.1. Initialization</A
+></H3
+><P
+>After allocating a "cable_t" structure, a pointer to it and further
+parameters (as strings) have to be passed first to the selected cable's
+connect() function.</P
+><P
+>Following that, the init() function is called via cable_init(). If cable_init()
+returns a zero value, all is fine and the cable is ready for use.</P
+></DIV
+><DIV
+CLASS="section"
+><H3
+CLASS="section"
+><A
+NAME="_cleaning_up"
+>4.2.1.2. Cleaning up</A
+></H3
+><P
+>There are two functions for actual cleanup:</P
+><P
+></P
+><UL
+><LI
+><P
+> done() is responsible for driving the hardware to a safe and consistent state.
+</P
+></LI
+><LI
+><P
+> cable_free() then can be used to clean up eventually extra allocated memory etc.
+</P
+></LI
+></UL
+><P
+>Both are usually called from chain_disconnect().</P
+><P
+>An additional mechanism allows to clean up if a disconnection was detected by
+the low level driver (e.g. USB or parallel port driver). A cable has to provide
+a disconnect() function for this purpose:</P
+><P
+></P
+><OL
+TYPE="1"
+><LI
+><P
+> Low level (e.g. parport) driver calls cable driver->disconnect()
+</P
+></LI
+><LI
+><P
+> cable driver->disconnect() calls chain_disconnect()
+</P
+></LI
+><LI
+><P
+> chain_disconnect() calls cable driver->done()
+</P
+></LI
+><LI
+><P
+> chain_disconnect() then calls cable driver->cable_free()
+</P
+></LI
+></OL
+><P
+>After return from chain_disconnect() to cable driver->disconnect(), the cable_t
+structure has been freed and must not be accessed anymore.</P
+></DIV
+><DIV
+CLASS="section"
+><H3
+CLASS="section"
+><A
+NAME="_jtag_activities"
+>4.2.1.3. JTAG Activities</A
+></H3
+><P
+>Currently the API provides five different functions for performing operations
+at the JTAG interface on the low level signal level (using the four signals
+TMS, TCK, TDI, and TDO).</P
+><P
+></P
+><UL
+><LI
+><P
+> clock(tms,tdi,n) takes values for TMS and TDI output as its parameters, ensures that actual cable signals are set accordingly, and does a 0-1 transition on TCK (n times)
+</P
+></LI
+><LI
+><P
+> get_tdo() returns the current value at the TDO input.
+</P
+></LI
+><LI
+><P
+> set_trst(x) sets the TRST signal and returns the current value.
+</P
+></LI
+><LI
+><P
+> get_trst() returns the current value of the TRST signal.
+</P
+></LI
+></UL
+><P
+>For many JTAG adapters, there's almost no delay when doing alternating clock()
+and get_tdo(). Writing and reading happens immediately and the result is
+available immediately as well. This is the case with most parallel port
+adapters (but not when attached to USB-to-parallel adapters or USB docking
+stations) and memory mapped IO (e.g. general purpose I/O pins of
+microcontrollers).</P
+><P
+>But there are adapters, especially USB and Ethernet based adapters, which
+exhibit a rather long delay between the initiation of reading a bit and the
+delivery of the value of the bit. It is at least 1 millisecond with USB,
+which would limit the transfer rate to 1 kHz. One way to workaround this
+is to transmit bits compacted into bytes and chunks of bytes, which is
+possible with the transfer() function.</P
+><P
+></P
+><UL
+><LI
+><P
+> transfer(in, out)
+</P
+></LI
+></UL
+><P
+>The transfer() function does a series of TCK pulses, with data for TDI read as
+bytes from memory. The bytes are automatically serialized. TMS is set to zero
+during transfer()s. Optionally, prior to each bit shifted out to the interface,
+TDO input can be read into memory (deserialized into a byte array of the same
+size as the input array).</P
+><P
+>It still doesn't yield much improvement if the operation consists of many read
+and write transitions (e.g. repeatedly writing an instruction and some data
+register values, then reading from the data register, as it is necessary for
+memory access). For that reason, the above functions are also available in
+variants that don't cause immediate activity, but rather schedule it for later.
+In the API, they're visible as</P
+><P
+></P
+><UL
+><LI
+><P
+> cable_defer_clock()
+</P
+></LI
+><LI
+><P
+> cable_defer_get_tdo()
+</P
+></LI
+><LI
+><P
+> cable_defer_set_trst()
+</P
+></LI
+><LI
+><P
+> cable_defer_get_trst()
+</P
+></LI
+><LI
+><P
+> cable_defer_transfer()
+</P
+></LI
+></UL
+><P
+>These functions aren't implemented in the cable driver (but currently in
+src/tap/cable.c). The cable driver just has to provide a flush() function to
+actually execute the queued activity in some cable-specific optimal way, and
+to store the results of get_tdo() and transfer() activity. The caller later
+can pick up the results using these functions (implemented in cable.c):</P
+><P
+></P
+><UL
+><LI
+><P
+> cable_get_tdo_late()
+</P
+></LI
+><LI
+><P
+> cable_get_trst_late()
+</P
+></LI
+><LI
+><P
+> cable_transfer_late()
+</P
+></LI
+></UL
+><P
+>As an example, consider the following sequence of activities:</P
+><P
+></P
+><OL
+TYPE="1"
+><LI
+><P
+> clock()
+</P
+></LI
+><LI
+><P
+> get_tdo()
+</P
+></LI
+><LI
+><P
+> clock()
+</P
+></LI
+><LI
+><P
+> get_tdo()
+</P
+></LI
+></OL
+><P
+>If the result of the first get_tdo() isn't absolutely required before the
+second clock(), the sequence can be optimized into the following sequence (if</P
+><P
+></P
+><OL
+TYPE="1"
+><LI
+><P
+> defer_clock()
+</P
+></LI
+><LI
+><P
+> defer_clock()
+</P
+></LI
+><LI
+><P
+> flush()
+</P
+></LI
+><LI
+><P
+> get_tdo_late()
+</P
+></LI
+><LI
+><P
+> get_tdo_late()
+</P
+></LI
+></OL
+><P
+>The next sections explain the queueing mechanism and its limits in detail.</P
+></DIV
+><DIV
+CLASS="section"
+><H3
+CLASS="section"
+><A
+NAME="_when_flushing_occurs"
+>4.2.1.4. When flushing occurs</A
+></H3
+><P
+>The cable_flush() function is used to flush the queue towards the cable. It
+takes one additional argument, "how_much", which may be one of</P
+><P
+></P
+><UL
+><LI
+><P
+> OPTIONALLY: The cable driver may flush if it's reasonable (e.g. if the
+ queue has been filled so that some buffer limit for the cable interface
+ is reached). It would be wise to flush early to keep the queue small, if
+ there is no point in queueing up more items because the transfer to the
+ cable would have to be split into smaller chunks anyway. This is used by
+ UrJTAG immediately after adding items to the queue.
+</P
+></LI
+><LI
+><P
+> TO_OUTPUT: The cable driver should at least flush as much so that one
+ output becomes available in the output queue. If there's already something
+ in the output queue, this should be interpreted similar to OPTIONALLY. This
+ is used by UrJTAG immediately before it wants to use that output.
+</P
+></LI
+><LI
+><P
+> COMPLETELY: The cable driver has to flush the queue completely. This is
+ used by UrJTAG immediately before actions that circumvent the queueing
+ such as calls to the legacy clock/get_tdo functions. It could also be
+ used by application code to ensure that some action is actually done in
+ time.
+</P
+></LI
+></UL
+></DIV
+><DIV
+CLASS="section"
+><H3
+CLASS="section"
+><A
+NAME="_jtag_activity_queueing"
+>4.2.1.5. JTAG activity queueing</A
+></H3
+><P
+>The source in src/tap/cable.c provides to important functions to access the
+two queues "todo" (with activity to be done) and "done" (with results):</P
+><P
+></P
+><UL
+><LI
+><P
+> cable_add_queue_item
+</P
+></LI
+><LI
+><P
+> cable_get_queue_item
+</P
+></LI
+></UL
+><P
+>In src/tap/cable/generic.c you'll find two implementations of dequeueing
+algorithms, i.e. implementations of the flush() function. These could be used
+by any new cable driver unless it provides a more sophisticated algorithm
+itself:</P
+><P
+></P
+><UL
+><LI
+><P
+> generic_flush_one_by_one() simply calls the "classic" functions one after
+ another. The performance of the cable driver using this implementation will
+ be the same whether the immediate or defer variants of the functions are used.
+</P
+></LI
+><LI
+><P
+> generic_flush_using_transfer() tries to optimize as many clock() and
+ get_tdo() by transforming them into calls to transfer() instead. This can
+ give a slight advantage.
+</P
+></LI
+></UL
+><P
+>The generic implementations also serve as a template for new cable-specific
+implementations.</P
+></DIV
+><DIV
+CLASS="section"
+><H3
+CLASS="section"
+><A
+NAME="_generic_implementations"
+>4.2.1.6. Generic implementations</A
+></H3
+><P
+>As a reference and in many cases completely sufficient for new cables, take a
+look at the code in src/tap/cable/generic.c, which contains generic routines,
+suitable for parallel port based cables (and some for other types of cables as
+well).</P
+></DIV
+></DIV
+><DIV
+CLASS="section"
+><H2
+CLASS="section"
+><A
+NAME="_link_drivers"
+>4.2.2. Link drivers</A
+></H2
+><P
+>Link drivers like the "parport" driver collection provide the basis for
+communication between cable driver and actual JTAG adapter. The openwince JTAG
+tools supported only parallel port links with the "parport" drivers. UrJTAG
+introduced support for USB links, but in the early releases the drivers for
+these just mimic the parallel port links.</P
+><P
+>The basic functions provided by all link drivers are</P
+><P
+></P
+><UL
+><LI
+><P
+> connect(), to called from cable driver connect()
+</P
+></LI
+><LI
+><P
+> open(), to actually connect to the device during cable driver init()
+</P
+></LI
+><LI
+><P
+> close(), to disconnect from the device during cable driver done()
+</P
+></LI
+><LI
+><P
+> free(), to free all resources, called from cable driver free()
+</P
+></LI
+></UL
+><DIV
+CLASS="section"
+><H3
+CLASS="section"
+><A
+NAME="_parport"
+>4.2.2.1. parport</A
+></H3
+><P
+>Currently there are parport drivers for direct access to the parallel port on a
+PC using I/O addresses (direct.c), and for using ppdev on Linux or ppi on FreeBSD.</P
+><P
+>In addition, there are "ftdi" and "ftd2xx" parport drivers that actually are for
+communication with USB cables based on FTDI chips. They cannot be used for
+connecting old parallel port cables through parallel to USB adapters with FTDI
+chips, and probably soon will be rewritten as "usbconn" drivers instead.</P
+><P
+>All parport drivers present a common API for setting and reading signals.</P
+></DIV
+><DIV
+CLASS="section"
+><H3
+CLASS="section"
+><A
+NAME="_usbconn"
+>4.2.2.2. usbconn</A
+></H3
+><P
+>The usbconn drivers provide a common API to search for and connect with USB
+devices. At the moment, there are drivers for libusd, libftdi and FTD2XX
+(e.g. to communicate with FTDI chip based cables through libftdi and/or
+FTD2XX, to communicate with Cypress FX2 using EZUSB.SYS or CyUSB.sys, and
+more).</P
+></DIV
+></DIV
+><DIV
+CLASS="section"
+><H2
+CLASS="section"
+><A
+NAME="_bus_drivers"
+>4.2.3. Bus drivers</A
+></H2
+><P
+>Bus drivers translate read and write operations on a bus into JTAG commands
+and methods. A bus in this context is neither restricted to a processor bus,
+nor to memory. Any system component that can be read from and written to could
+be seen as attached to a bus. I.e. external or internal memory (RAM, ROM,
+Flash) and peripherals connected to a processor or simply an FPGA with 1:1
+connections.</P
+><P
+>The available bus drivers are listed in response to "help initbus". Each
+driver has to provide the following functions:</P
+><P
+></P
+><UL
+><LI
+><P
+> bus_new() - Initialization
+</P
+></LI
+><LI
+><P
+> bus_free() - Cleaning up
+</P
+></LI
+><LI
+><P
+> bus_printinfo() - Short description
+</P
+></LI
+><LI
+><P
+> bus_prepare() - Preparation
+</P
+></LI
+><LI
+><P
+> bus_area() - Description of the bus geometry
+</P
+></LI
+><LI
+><P
+> bus_read_start() - Initiate reading
+</P
+></LI
+><LI
+><P
+> bus_read_next() - Read access
+</P
+></LI
+><LI
+><P
+> bus_read_end() - Finish reading
+</P
+></LI
+><LI
+><P
+> bus_read() - Atomic reading
+</P
+></LI
+><LI
+><P
+> bus_write() - Write access
+</P
+></LI
+></UL
+><DIV
+CLASS="important"
+><P
+></P
+><TABLE
+CLASS="important"
+WIDTH="100%"
+BORDER="0"
+><TR
+><TD
+WIDTH="25"
+ALIGN="CENTER"
+VALIGN="TOP"
+><IMG
+SRC="../images/important.gif"
+HSPACE="5"
+ALT="Important"></TD
+><TD
+ALIGN="LEFT"
+VALIGN="TOP"
+><P
+>Address parameters to the functions listed above specify always
+byte locations, independent of the actual data width. The bus driver has to
+adjust the address on its own if required.</P
+></TD
+></TR
+></TABLE
+></DIV
+><DIV
+CLASS="section"
+><H3
+CLASS="section"
+><A
+NAME="_creation"
+>4.2.3.1. Creation</A
+></H3
+><P
+>Upon calling of its bus_new() function, the driver allocates a "bus_t"
+structure and performs all required internal initializations.</P
+></DIV
+><DIV
+CLASS="section"
+><H3
+CLASS="section"
+><A
+NAME="_initialization_2"
+>4.2.3.2. Initialization</A
+></H3
+><P
+>After creation of the new "bus_t" structure, the bus_init() function will
+be called to give the driver the possibility to initialize it's internal
+states or BSR bits as required. Such functionality has been split from
+bus_new() since some drivers require to re-initialize during runtime.</P
+></DIV
+><DIV
+CLASS="section"
+><H3
+CLASS="section"
+><A
+NAME="_cleaning_up_2"
+>4.2.3.3. Cleaning up</A
+></H3
+><P
+>The driver is supposed to free all allocated memory (including its "bus_t"
+structure). Additionally, it should set the device into a state that doesn't
+prevent it from normal operation.</P
+></DIV
+><DIV
+CLASS="section"
+><H3
+CLASS="section"
+><A
+NAME="_short_description"
+>4.2.3.4. Short description</A
+></H3
+><P
+>Prints a message describing the driver. This function is called by the "print"
+command before it lists the areas covered by this bus driver.</P
+></DIV
+><DIV
+CLASS="section"
+><H3
+CLASS="section"
+><A
+NAME="_preparation"
+>4.2.3.5. Preparation</A
+></H3
+><P
+>This function is called whenever a bus operation is initiated. The
+driver should perform the required preparation steps so that
+subsequent calls to the bus_read_* and bus_write functions can perform
+their tasks properly.</P
+><P
+>E.g. a BSR bus driver would put the device into EXTEST mode to activate the
+boundary scan register on the device pins.</P
+></DIV
+><DIV
+CLASS="section"
+><H3
+CLASS="section"
+><A
+NAME="_description_of_the_bus_geometry"
+>4.2.3.6. Description of the bus geometry</A
+></H3
+><P
+>At certain stages, the bus driver's bus_area() function is called by other
+commands to query the bus geometry for a given address. The bus driver must
+fill in the fields of a "bus_area_t" structure describing the geometry of the
+area in which the specified address is located:</P
+><P
+></P
+><UL
+><LI
+><P
+> a short textual description of the area
+</P
+></LI
+><LI
+><P
+> start address of area
+</P
+></LI
+><LI
+><P
+> length of area in bytes
+</P
+></LI
+><LI
+><P
+> data width in bits
+</P
+></LI
+></UL
+><P
+>Queries with an address out of range must result in an area length of</P
+><PRE
+CLASS="literallayout"
+>UINT64_C(0x100000000)</PRE
+></DIV
+><DIV
+CLASS="section"
+><H3
+CLASS="section"
+><A
+NAME="_initiate_reading"
+>4.2.3.7. Initiate reading</A
+></H3
+><P
+>Since the JTAG state machine defines a capture-shift-update sequence, it is
+required to shift the address for a read prior to capturing the read
+data. Therefore, the bus_read_start() function is called with the very first
+address to read from. This enables the driver to shift the address into the
+device before it can actually retrieve the read data for this address.</P
+></DIV
+><DIV
+CLASS="section"
+><H3
+CLASS="section"
+><A
+NAME="_read_access"
+>4.2.3.8. Read access</A
+></H3
+><P
+>The bus_read_next() function fetches the read data from the device that has
+been addressed by a previous call to bus_read_start() or
+bus_read_next(). Again, this is due to the capture-shift-update sequence of
+JTAG:</P
+><P
+></P
+><OL
+TYPE="1"
+><LI
+><P
+> capture read data from device pins
+</P
+></LI
+><LI
+><P
+> shift new address
+</P
+></LI
+><LI
+><P
+> update new address to device pins
+</P
+></LI
+></OL
+><DIV
+CLASS="important"
+><P
+></P
+><TABLE
+CLASS="important"
+WIDTH="100%"
+BORDER="0"
+><TR
+><TD
+WIDTH="25"
+ALIGN="CENTER"
+VALIGN="TOP"
+><IMG
+SRC="../images/important.gif"
+HSPACE="5"
+ALT="Important"></TD
+><TD
+ALIGN="LEFT"
+VALIGN="TOP"
+><P
+>The address parameter specifies the location of the <SPAN
+CLASS="emphasis"
+><I
+CLASS="emphasis"
+>following</I
+></SPAN
+>
+read access. It is not the address of the data returned by this function call.</P
+></TD
+></TR
+></TABLE
+></DIV
+></DIV
+><DIV
+CLASS="section"
+><H3
+CLASS="section"
+><A
+NAME="_finish_reading"
+>4.2.3.9. Finish reading</A
+></H3
+><P
+>Function "bus_read_end()" is called at the end of a read sequence. I.e. when
+the higher level command determines that the last data portion is to be read
+from the device. There is no new address and the function driver is supposed
+to return the read data that was addressed previously.</P
+></DIV
+><DIV
+CLASS="section"
+><H3
+CLASS="section"
+><A
+NAME="_atomic_reading"
+>4.2.3.10. Atomic reading</A
+></H3
+><P
+>For ease of use, a bus driver has to supply a "bus_read()" function that
+encapsulates reading data from a single address in an atomic operation. Bus
+drivers typically build this function from "bus_read_start()" and a subsequent
+"bus_read_end()".</P
+></DIV
+><DIV
+CLASS="section"
+><H3
+CLASS="section"
+><A
+NAME="_write_access"
+>4.2.3.11. Write access</A
+></H3
+><P
+>This function writes one data element at the specified address. Since this
+translates to a single JTAG operation (capture ignored, shift and update
+address & data), there is no splitting as with the read functions.</P
+></DIV
+></DIV
+></DIV
+><DIV
+CLASS="NAVFOOTER"
+><HR
+ALIGN="LEFT"
+WIDTH="100%"><TABLE
+SUMMARY="Footer navigation table"
+WIDTH="100%"
+BORDER="0"
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+>Universal JTAG library, server and tools</TH
+></TR
+><TR
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+WIDTH="10%"
+ALIGN="left"
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+><A
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+ACCESSKEY="N"
+>Next</A
+></TD
+></TR
+></TABLE
+><HR
+ALIGN="LEFT"
+WIDTH="100%"></DIV
+><DIV
+CLASS="chapter"
+><H1
+><A
+NAME="_f_a_q"
+></A
+>Chapter 5. F.A.Q.</H1
+><P
+>For a list of known problems in current versions, please also check the "Bugs"
+tracker at the UrJTAG website!</P
+><P
+></P
+><DIV
+CLASS="variablelist"
+><DL
+><DT
+>Q. The documentation is incomplete. Where can I get more information?</DT
+><DD
+><P
+> A. Please ask in the "Using UrJTAG" Forum on <A
+HREF="http://urjtag.org"
+TARGET="_top"
+>http://urjtag.org</A
+>
+</P
+></DD
+><DT
+>Q. My flash isn't detected or can't be programmed. What can I do?</DT
+><DD
+><P
+> A. Please record the output of the "detect" and "detectflash" commands and ask in the Forum. If possible, re-compile UrJTAG before with "—enable-jedec-exp" to get extra information.
+</P
+></DD
+><DT
+>Q. My CPU/FPGA/etc. chip isn't detected. What can I do?</DT
+><DD
+><P
+> A. First try to get hold of a "BSDL" description of the chip from the vendor, and specify where to find this file to UrJTAG using "bsdl path" before you "detect". Second, a bus driver has to be selected. Maybe "ejtag" or "prototype" work.
+</P
+></DD
+><DT
+>Q. When I type "cable parallel 0x378 DLC5" (in a Cygwin environment) I get "Unknown port driver: parallel"?</DT
+><DD
+><P
+> A. Please install the Cygwin ioperm package, and re-configure/compile.
+</P
+></DD
+><DT
+>Q. When I type "cable parallel 0x378 DLC5" (in a Cygwin environment) I get "Error: Cable initialization failed!".</DT
+><DD
+><P
+> A. Please install ioperm.sys driver using <TT
+CLASS="literal"
+>ioperm -i</TT
+> command.
+</P
+></DD
+><DT
+>Q. When running autogen.sh, I get "Can't exec "autopoint": No such file or directory"</DT
+><DD
+><P
+> A. You need the headers for gettext (e.g. Debian package "gettext-devel").
+</P
+></DD
+><DT
+>Q. When running autogen.sh, it complains about missing CVS</DT
+><DD
+><P
+> A. The easiest solution is to actually install CVS for this step, just to get around this error message.
+</P
+></DD
+><DT
+>Q. During compilation, I get "svf_bison.y: No such file or directory"</DT
+><DD
+><P
+> A. You need "bison".
+</P
+></DD
+><DT
+>Q. During compilation, I get "flex: can't open … src/svf/svf_flex.l"</DT
+><DD
+><P
+> A. You need "flex"
+</P
+></DD
+><DT
+>Q. During compilation, I get "src/svf/svf_flex.l", line 27: unrecognized %option: bison-locations"</DT
+><DD
+><P
+> A. You need a newer version of flex. It should be 2.5.31 or newer;
+ Unfortunately, Cygwin comes with only 2.5.4a. You may try to compile and
+ install a newer version of flex from source to solve this. The distributed
+ source tarball contains source pregenerated with a current flex version,
+ you need flex yourself only to compile from fresh SVN checkouts.
+</P
+></DD
+><DT
+>Q. When running "make install", I get "Permission denied" errors</DT
+><DD
+><P
+> A. If you want to install into a system directory (the default /usr/local is one), you'll have to run "make install" as the superuser, e.g. do "sudo make install".
+</P
+></DD
+><DT
+>Q. My BSDL file defines the bus DAT as bit_vector(15 downto 0), how should I access single elements?</DT
+><DD
+><P
+> A. BSDL syntax is an extension of the VHDL language. Array elements are indexed with
+ parentheses: DAT(4) selects index number 4 of the DAT vector. Also refer to the "print
+ signals" command.
+</P
+></DD
+><DT
+>Q. My board requires certain signals to be set to dedicated values before external memories can be accessed.</DT
+><DD
+><P
+> A. Most (if not all) BSR-based bus drivers allow for static configurations of
+ pins that are controlled by BSR bits. Apply the required "set" commands before
+ issueing the "initbus …" command. These settings are preserved by all bus
+ related commands if they don't collide with the signals required for bus operation.
+</P
+></DD
+><DT
+>Q. My USB pod seems slow.</DT
+><DD
+><P
+> A. USB-based JTAG pods suffer from a couple of intrinsic issues. Consider the
+ following to get maximum performance:
+</P
+><P
+></P
+><UL
+><LI
+><P
+> Run UrJTAG on native linux. Cygwin and VMWare are reportedly slower.
+</P
+></LI
+><LI
+><P
+> Connect the pod via a high speed USB hub to a high speed USB host port.
+ Even though the pod is a full speed device, it benefits from the shorter
+ turn-around times between host and hub.
+</P
+></LI
+></UL
+></DD
+></DL
+></DIV
+></DIV
+><DIV
+CLASS="NAVFOOTER"
+><HR
+ALIGN="LEFT"
+WIDTH="100%"><TABLE
+SUMMARY="Footer navigation table"
+WIDTH="100%"
+BORDER="0"
+CELLPADDING="0"
+CELLSPACING="0"
+><TR
+><TD
+WIDTH="33%"
+ALIGN="left"
+VALIGN="top"
+><A
+HREF="_development.html"
+ACCESSKEY="P"
+>Prev</A
+></TD
+><TD
+WIDTH="34%"
+ALIGN="center"
+VALIGN="top"
+><A
+HREF="index.html"
+ACCESSKEY="H"
+>Home</A
+></TD
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+WIDTH="33%"
+ALIGN="right"
+VALIGN="top"
+><A
+HREF="_licensing.html"
+ACCESSKEY="N"
+>Next</A
+></TD
+></TR
+><TR
+><TD
+WIDTH="33%"
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+VALIGN="top"
+>Development</TD
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+WIDTH="34%"
+ALIGN="center"
+VALIGN="top"
+> </TD
+><TD
+WIDTH="33%"
+ALIGN="right"
+VALIGN="top"
+>Licensing</TD
+></TR
+></TABLE
+></DIV
+></BODY
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+>
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+<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN""http://www.w3.org/TR/html4/loose.dtd">
+<HTML
+><HEAD
+><TITLE
+>General</TITLE
+><META
+NAME="GENERATOR"
+CONTENT="Modular DocBook HTML Stylesheet Version 1.79"><LINK
+REL="HOME"
+TITLE="Universal JTAG library, server and tools"
+HREF="index.html"><LINK
+REL="PREVIOUS"
+TITLE="Copyright"
+HREF="_copyright.html"><LINK
+REL="NEXT"
+TITLE="UrJTAG"
+HREF="_urjtag.html"><LINK
+REL="STYLESHEET"
+TYPE="text/css"
+HREF="UrJTAG.css"></HEAD
+><BODY
+CLASS="chapter"
+BGCOLOR="#FFFFFF"
+TEXT="#000000"
+LINK="#0000FF"
+VLINK="#840084"
+ALINK="#0000FF"
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+CLASS="NAVHEADER"
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+SUMMARY="Header navigation table"
+WIDTH="100%"
+BORDER="0"
+CELLPADDING="0"
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+COLSPAN="3"
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+>Universal JTAG library, server and tools</TH
+></TR
+><TR
+><TD
+WIDTH="10%"
+ALIGN="left"
+VALIGN="bottom"
+><A
+HREF="_copyright.html"
+ACCESSKEY="P"
+>Prev</A
+></TD
+><TD
+WIDTH="80%"
+ALIGN="center"
+VALIGN="bottom"
+></TD
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+WIDTH="10%"
+ALIGN="right"
+VALIGN="bottom"
+><A
+HREF="_urjtag.html"
+ACCESSKEY="N"
+>Next</A
+></TD
+></TR
+></TABLE
+><HR
+ALIGN="LEFT"
+WIDTH="100%"></DIV
+><DIV
+CLASS="chapter"
+><H1
+><A
+NAME="_general"
+></A
+>Chapter 2. General</H1
+><DIV
+CLASS="section"
+><H1
+CLASS="section"
+><A
+NAME="_jtag"
+>2.1. JTAG</A
+></H1
+><P
+>JTAG basics can be found all over the internet. This section should go into
+some more details about working with JTAG. What hardware do you need, what is
+the usage of JTAG, where do I get files. What file formats are available…</P
+><DIV
+CLASS="section"
+><H2
+CLASS="section"
+><A
+NAME="_introduction"
+>2.1.1. Introduction</A
+></H2
+><P
+>JTAG (IEEE 1149.1) is a serial interface for testing devices with
+integrated circuits. The problem that the JTAG interface was designed to solve
+is checking if connections between ICs are OK. Therefore you can set and check
+in- and outputs of ICs. In order to save pins and logic a very simple serial
+design was invented.</P
+><P
+></P
+><UL
+><LI
+><P
+> One pin serial input
+</P
+></LI
+><LI
+><P
+> One pin serial output
+</P
+></LI
+><LI
+><P
+> One pin clock
+</P
+></LI
+><LI
+><P
+> One pin control
+</P
+></LI
+></UL
+><P
+>The control pin (together with clock) allows to switch device states. A state
+machine inside each chip can be controlled, e.g. to reset the device. This
+control machine also allows to have two internal shift registers in each device
+(although we only have on in- and one output-pin). The registers are called
+instruction register (IR) and data register (DR). The current UrJTAG tool
+allows you to set the IR and set and get the DR. It doesn't allow you to
+directly control the statemachine (yet).</P
+></DIV
+><DIV
+CLASS="section"
+><H2
+CLASS="section"
+><A
+NAME="_interfaces"
+>2.1.2. Interfaces</A
+></H2
+><P
+>The simplest interface that you can build is like the Xilinx parallel cable
+(also called DLC5). If your device works with a 5V or 3.3V supply voltage then
+this device can even be build just with passive parts. (picture missing here)
+UrJTAG also supports a number of other interface adapters.</P
+></DIV
+><DIV
+CLASS="section"
+><H2
+CLASS="section"
+><A
+NAME="_additions"
+>2.1.3. Additions</A
+></H2
+><P
+>In the meantime the jtag specification was used as a basis for programming
+flash files and debugging processors. UrJTAG supports programming a couple of
+different flash devices. It also supports programming of non-flash devices via
+svf files. UrJTAG does not support debugging yet. Other open source solutions
+such as OpenOCD allow you to debug ARM processors with gdb.</P
+></DIV
+><DIV
+CLASS="section"
+><H2
+CLASS="section"
+><A
+NAME="_bsdl_and_urjtag_data_files"
+>2.1.4. BSDL and UrJTAG data files</A
+></H2
+><P
+>The BSDL file format describes the jtag interface for one IC. It is a VHDL
+syntax with the needed information (like pin-names, register lengths and
+commands) that is usually done by the supplier. e.g. Xilinx BSDL files are
+all included in their free web-pack (using file extension ".bsd").</P
+><P
+>UrJTAG uses a different file format internally. So in order to add a new device
+to UrJTAG you need to convert those files and produce a directory structure.
+Currently there are at least three tools available to do that; included with
+UrJTAG is "bsdl2jtag". Please ask on the mailing list in case of problems with
+that. Please also send proven working files back to this project.</P
+><P
+>Starting with post-0.7 releases, UrJTAG contains a BSDL subsystem that
+retrieves the descriptions for chips in the chain from BSDL files on the
+fly. "bsdl2jtag" is in fact a wrapper that uses the BSDL subsystem to
+convert the BSDL file.</P
+></DIV
+><DIV
+CLASS="section"
+><H2
+CLASS="section"
+><A
+NAME="_svf_files"
+>2.1.5. SVF files</A
+></H2
+><P
+>The SVF file format contains a number of high level commands to drive the jtag
+bus. For example you can shift the IR or DR and even check for the results.
+The Xilinxs impact and Altera QuartusII tools allow you to write this file to
+program devices.</P
+><P
+>The player has been developed according to the "Serial Vector Format
+Specification", Revision E, 8 March 1999 issued by ASSET InterTech, Inc. The
+full specification can be found at
+<A
+HREF="http://www.asset-intertech.com/support/svf.pdf"
+TARGET="_top"
+>http://www.asset-intertech.com/support/svf.pdf</A
+></P
+><P
+>UrJTAG features an "SVF player" that can read SVF files and perform the
+described actions on the bus.</P
+><P
+>SVF parser and lexer are also copyright 2002, CDS at <A
+HREF="http://www-csd.ijs.si/"
+TARGET="_top"
+>http://www-csd.ijs.si/</A
+>.
+They have been reused from the "Experimental Boundary Scan" project at
+<A
+HREF="http://ebsp.sourceforge.net/"
+TARGET="_top"
+>http://ebsp.sourceforge.net/</A
+>.</P
+></DIV
+><DIV
+CLASS="section"
+><H2
+CLASS="section"
+><A
+NAME="_jam_stapl_files"
+>2.1.6. JAM/STAPL files</A
+></H2
+><P
+>Another format for describing actions over JTAG interfaces is STAPL, actually
+standardized as JEDEC "JESD-71A". Compared to SVF, it looks more like an
+actual programming language and features looping, conditional execution, and
+more. STAPL is not yet supported by UrJTAG.</P
+></DIV
+></DIV
+></DIV
+><DIV
+CLASS="NAVFOOTER"
+><HR
+ALIGN="LEFT"
+WIDTH="100%"><TABLE
+SUMMARY="Footer navigation table"
+WIDTH="100%"
+BORDER="0"
+CELLPADDING="0"
+CELLSPACING="0"
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+VALIGN="top"
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+ACCESSKEY="P"
+>Prev</A
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+WIDTH="34%"
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+VALIGN="top"
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+HREF="index.html"
+ACCESSKEY="H"
+>Home</A
+></TD
+><TD
+WIDTH="33%"
+ALIGN="right"
+VALIGN="top"
+><A
+HREF="_urjtag.html"
+ACCESSKEY="N"
+>Next</A
+></TD
+></TR
+><TR
+><TD
+WIDTH="33%"
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+VALIGN="top"
+>Copyright</TD
+><TD
+WIDTH="34%"
+ALIGN="center"
+VALIGN="top"
+> </TD
+><TD
+WIDTH="33%"
+ALIGN="right"
+VALIGN="top"
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+>
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+></TR
+><TR
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+WIDTH="10%"
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+><A
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+ACCESSKEY="P"
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+><TD
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+>Chapter 6. Licensing</TD
+><TD
+WIDTH="10%"
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+VALIGN="bottom"
+><A
+HREF="_gnu_general_public_license_gpl.html"
+ACCESSKEY="N"
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+><DIV
+CLASS="section"
+><H1
+CLASS="section"
+><A
+NAME="_gnu_free_documentation_license_fdl"
+>6.2. GNU Free Documentation License (FDL)</A
+></H1
+><PRE
+CLASS="literallayout"
+> GNU Free Documentation License
+ Version 1.2, November 2002
+
+
+ Copyright (C) 2000,2001,2002 Free Software Foundation, Inc.
+ 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ Everyone is permitted to copy and distribute verbatim copies
+ of this license document, but changing it is not allowed.
+
+
+0. PREAMBLE
+
+The purpose of this License is to make a manual, textbook, or other
+functional and useful document "free" in the sense of freedom: to
+assure everyone the effective freedom to copy and redistribute it,
+with or without modifying it, either commercially or noncommercially.
+Secondarily, this License preserves for the author and publisher a way
+to get credit for their work, while not being considered responsible
+for modifications made by others.
+
+This License is a kind of "copyleft", which means that derivative
+works of the document must themselves be free in the same sense. It
+complements the GNU General Public License, which is a copyleft
+license designed for free software.
+
+We have designed this License in order to use it for manuals for free
+software, because free software needs free documentation: a free
+program should come with manuals providing the same freedoms that the
+software does. But this License is not limited to software manuals;
+it can be used for any textual work, regardless of subject matter or
+whether it is published as a printed book. We recommend this License
+principally for works whose purpose is instruction or reference.
+
+
+1. APPLICABILITY AND DEFINITIONS
+
+This License applies to any manual or other work, in any medium, that
+contains a notice placed by the copyright holder saying it can be
+distributed under the terms of this License. Such a notice grants a
+world-wide, royalty-free license, unlimited in duration, to use that
+work under the conditions stated herein. The "Document", below,
+refers to any such manual or work. Any member of the public is a
+licensee, and is addressed as "you". You accept the license if you
+copy, modify or distribute the work in a way requiring permission
+under copyright law.
+
+A "Modified Version" of the Document means any work containing the
+Document or a portion of it, either copied verbatim, or with
+modifications and/or translated into another language.
+
+A "Secondary Section" is a named appendix or a front-matter section of
+the Document that deals exclusively with the relationship of the
+publishers or authors of the Document to the Document's overall subject
+(or to related matters) and contains nothing that could fall directly
+within that overall subject. (Thus, if the Document is in part a
+textbook of mathematics, a Secondary Section may not explain any
+mathematics.) The relationship could be a matter of historical
+connection with the subject or with related matters, or of legal,
+commercial, philosophical, ethical or political position regarding
+them.
+
+The "Invariant Sections" are certain Secondary Sections whose titles
+are designated, as being those of Invariant Sections, in the notice
+that says that the Document is released under this License. If a
+section does not fit the above definition of Secondary then it is not
+allowed to be designated as Invariant. The Document may contain zero
+Invariant Sections. If the Document does not identify any Invariant
+Sections then there are none.
+
+The "Cover Texts" are certain short passages of text that are listed,
+as Front-Cover Texts or Back-Cover Texts, in the notice that says that
+the Document is released under this License. A Front-Cover Text may
+be at most 5 words, and a Back-Cover Text may be at most 25 words.
+
+A "Transparent" copy of the Document means a machine-readable copy,
+represented in a format whose specification is available to the
+general public, that is suitable for revising the document
+straightforwardly with generic text editors or (for images composed of
+pixels) generic paint programs or (for drawings) some widely available
+drawing editor, and that is suitable for input to text formatters or
+for automatic translation to a variety of formats suitable for input
+to text formatters. A copy made in an otherwise Transparent file
+format whose markup, or absence of markup, has been arranged to thwart
+or discourage subsequent modification by readers is not Transparent.
+An image format is not Transparent if used for any substantial amount
+of text. A copy that is not "Transparent" is called "Opaque".
+
+Examples of suitable formats for Transparent copies include plain
+ASCII without markup, Texinfo input format, LaTeX input format, SGML
+or XML using a publicly available DTD, and standard-conforming simple
+HTML, PostScript or PDF designed for human modification. Examples of
+transparent image formats include PNG, XCF and JPG. Opaque formats
+include proprietary formats that can be read and edited only by
+proprietary word processors, SGML or XML for which the DTD and/or
+processing tools are not generally available, and the
+machine-generated HTML, PostScript or PDF produced by some word
+processors for output purposes only.
+
+The "Title Page" means, for a printed book, the title page itself,
+plus such following pages as are needed to hold, legibly, the material
+this License requires to appear in the title page. For works in
+formats which do not have any title page as such, "Title Page" means
+the text near the most prominent appearance of the work's title,
+preceding the beginning of the body of the text.
+
+A section "Entitled XYZ" means a named subunit of the Document whose
+title either is precisely XYZ or contains XYZ in parentheses following
+text that translates XYZ in another language. (Here XYZ stands for a
+specific section name mentioned below, such as "Acknowledgements",
+"Dedications", "Endorsements", or "History".) To "Preserve the Title"
+of such a section when you modify the Document means that it remains a
+section "Entitled XYZ" according to this definition.
+
+The Document may include Warranty Disclaimers next to the notice which
+states that this License applies to the Document. These Warranty
+Disclaimers are considered to be included by reference in this
+License, but only as regards disclaiming warranties: any other
+implication that these Warranty Disclaimers may have is void and has
+no effect on the meaning of this License.
+
+
+2. VERBATIM COPYING
+
+You may copy and distribute the Document in any medium, either
+commercially or noncommercially, provided that this License, the
+copyright notices, and the license notice saying this License applies
+to the Document are reproduced in all copies, and that you add no other
+conditions whatsoever to those of this License. You may not use
+technical measures to obstruct or control the reading or further
+copying of the copies you make or distribute. However, you may accept
+compensation in exchange for copies. If you distribute a large enough
+number of copies you must also follow the conditions in section 3.
+
+You may also lend copies, under the same conditions stated above, and
+you may publicly display copies.
+
+
+3. COPYING IN QUANTITY
+
+If you publish printed copies (or copies in media that commonly have
+printed covers) of the Document, numbering more than 100, and the
+Document's license notice requires Cover Texts, you must enclose the
+copies in covers that carry, clearly and legibly, all these Cover
+Texts: Front-Cover Texts on the front cover, and Back-Cover Texts on
+the back cover. Both covers must also clearly and legibly identify
+you as the publisher of these copies. The front cover must present
+the full title with all words of the title equally prominent and
+visible. You may add other material on the covers in addition.
+Copying with changes limited to the covers, as long as they preserve
+the title of the Document and satisfy these conditions, can be treated
+as verbatim copying in other respects.
+
+If the required texts for either cover are too voluminous to fit
+legibly, you should put the first ones listed (as many as fit
+reasonably) on the actual cover, and continue the rest onto adjacent
+pages.
+
+If you publish or distribute Opaque copies of the Document numbering
+more than 100, you must either include a machine-readable Transparent
+copy along with each Opaque copy, or state in or with each Opaque copy
+a computer-network location from which the general network-using
+public has access to download using public-standard network protocols
+a complete Transparent copy of the Document, free of added material.
+If you use the latter option, you must take reasonably prudent steps,
+when you begin distribution of Opaque copies in quantity, to ensure
+that this Transparent copy will remain thus accessible at the stated
+location until at least one year after the last time you distribute an
+Opaque copy (directly or through your agents or retailers) of that
+edition to the public.
+
+It is requested, but not required, that you contact the authors of the
+Document well before redistributing any large number of copies, to give
+them a chance to provide you with an updated version of the Document.
+
+
+4. MODIFICATIONS
+
+You may copy and distribute a Modified Version of the Document under
+the conditions of sections 2 and 3 above, provided that you release
+the Modified Version under precisely this License, with the Modified
+Version filling the role of the Document, thus licensing distribution
+and modification of the Modified Version to whoever possesses a copy
+of it. In addition, you must do these things in the Modified Version:
+
+A. Use in the Title Page (and on the covers, if any) a title distinct
+ from that of the Document, and from those of previous versions
+ (which should, if there were any, be listed in the History section
+ of the Document). You may use the same title as a previous version
+ if the original publisher of that version gives permission.
+B. List on the Title Page, as authors, one or more persons or entities
+ responsible for authorship of the modifications in the Modified
+ Version, together with at least five of the principal authors of the
+ Document (all of its principal authors, if it has fewer than five),
+ unless they release you from this requirement.
+C. State on the Title page the name of the publisher of the
+ Modified Version, as the publisher.
+D. Preserve all the copyright notices of the Document.
+E. Add an appropriate copyright notice for your modifications
+ adjacent to the other copyright notices.
+F. Include, immediately after the copyright notices, a license notice
+ giving the public permission to use the Modified Version under the
+ terms of this License, in the form shown in the Addendum below.
+G. Preserve in that license notice the full lists of Invariant Sections
+ and required Cover Texts given in the Document's license notice.
+H. Include an unaltered copy of this License.
+I. Preserve the section Entitled "History", Preserve its Title, and add
+ to it an item stating at least the title, year, new authors, and
+ publisher of the Modified Version as given on the Title Page. If
+ there is no section Entitled "History" in the Document, create one
+ stating the title, year, authors, and publisher of the Document as
+ given on its Title Page, then add an item describing the Modified
+ Version as stated in the previous sentence.
+J. Preserve the network location, if any, given in the Document for
+ public access to a Transparent copy of the Document, and likewise
+ the network locations given in the Document for previous versions
+ it was based on. These may be placed in the "History" section.
+ You may omit a network location for a work that was published at
+ least four years before the Document itself, or if the original
+ publisher of the version it refers to gives permission.
+K. For any section Entitled "Acknowledgements" or "Dedications",
+ Preserve the Title of the section, and preserve in the section all
+ the substance and tone of each of the contributor acknowledgements
+ and/or dedications given therein.
+L. Preserve all the Invariant Sections of the Document,
+ unaltered in their text and in their titles. Section numbers
+ or the equivalent are not considered part of the section titles.
+M. Delete any section Entitled "Endorsements". Such a section
+ may not be included in the Modified Version.
+N. Do not retitle any existing section to be Entitled "Endorsements"
+ or to conflict in title with any Invariant Section.
+O. Preserve any Warranty Disclaimers.
+
+If the Modified Version includes new front-matter sections or
+appendices that qualify as Secondary Sections and contain no material
+copied from the Document, you may at your option designate some or all
+of these sections as invariant. To do this, add their titles to the
+list of Invariant Sections in the Modified Version's license notice.
+These titles must be distinct from any other section titles.
+
+You may add a section Entitled "Endorsements", provided it contains
+nothing but endorsements of your Modified Version by various
+parties--for example, statements of peer review or that the text has
+been approved by an organization as the authoritative definition of a
+standard.
+
+You may add a passage of up to five words as a Front-Cover Text, and a
+passage of up to 25 words as a Back-Cover Text, to the end of the list
+of Cover Texts in the Modified Version. Only one passage of
+Front-Cover Text and one of Back-Cover Text may be added by (or
+through arrangements made by) any one entity. If the Document already
+includes a cover text for the same cover, previously added by you or
+by arrangement made by the same entity you are acting on behalf of,
+you may not add another; but you may replace the old one, on explicit
+permission from the previous publisher that added the old one.
+
+The author(s) and publisher(s) of the Document do not by this License
+give permission to use their names for publicity for or to assert or
+imply endorsement of any Modified Version.
+
+
+5. COMBINING DOCUMENTS
+
+You may combine the Document with other documents released under this
+License, under the terms defined in section 4 above for modified
+versions, provided that you include in the combination all of the
+Invariant Sections of all of the original documents, unmodified, and
+list them all as Invariant Sections of your combined work in its
+license notice, and that you preserve all their Warranty Disclaimers.
+
+The combined work need only contain one copy of this License, and
+multiple identical Invariant Sections may be replaced with a single
+copy. If there are multiple Invariant Sections with the same name but
+different contents, make the title of each such section unique by
+adding at the end of it, in parentheses, the name of the original
+author or publisher of that section if known, or else a unique number.
+Make the same adjustment to the section titles in the list of
+Invariant Sections in the license notice of the combined work.
+
+In the combination, you must combine any sections Entitled "History"
+in the various original documents, forming one section Entitled
+"History"; likewise combine any sections Entitled "Acknowledgements",
+and any sections Entitled "Dedications". You must delete all sections
+Entitled "Endorsements".
+
+
+6. COLLECTIONS OF DOCUMENTS
+
+You may make a collection consisting of the Document and other documents
+released under this License, and replace the individual copies of this
+License in the various documents with a single copy that is included in
+the collection, provided that you follow the rules of this License for
+verbatim copying of each of the documents in all other respects.
+
+You may extract a single document from such a collection, and distribute
+it individually under this License, provided you insert a copy of this
+License into the extracted document, and follow this License in all
+other respects regarding verbatim copying of that document.
+
+
+7. AGGREGATION WITH INDEPENDENT WORKS
+
+A compilation of the Document or its derivatives with other separate
+and independent documents or works, in or on a volume of a storage or
+distribution medium, is called an "aggregate" if the copyright
+resulting from the compilation is not used to limit the legal rights
+of the compilation's users beyond what the individual works permit.
+When the Document is included in an aggregate, this License does not
+apply to the other works in the aggregate which are not themselves
+derivative works of the Document.
+
+If the Cover Text requirement of section 3 is applicable to these
+copies of the Document, then if the Document is less than one half of
+the entire aggregate, the Document's Cover Texts may be placed on
+covers that bracket the Document within the aggregate, or the
+electronic equivalent of covers if the Document is in electronic form.
+Otherwise they must appear on printed covers that bracket the whole
+aggregate.
+
+
+8. TRANSLATION
+
+Translation is considered a kind of modification, so you may
+distribute translations of the Document under the terms of section 4.
+Replacing Invariant Sections with translations requires special
+permission from their copyright holders, but you may include
+translations of some or all Invariant Sections in addition to the
+original versions of these Invariant Sections. You may include a
+translation of this License, and all the license notices in the
+Document, and any Warranty Disclaimers, provided that you also include
+the original English version of this License and the original versions
+of those notices and disclaimers. In case of a disagreement between
+the translation and the original version of this License or a notice
+or disclaimer, the original version will prevail.
+
+If a section in the Document is Entitled "Acknowledgements",
+"Dedications", or "History", the requirement (section 4) to Preserve
+its Title (section 1) will typically require changing the actual
+title.
+
+
+9. TERMINATION
+
+You may not copy, modify, sublicense, or distribute the Document except
+as expressly provided for under this License. Any other attempt to
+copy, modify, sublicense or distribute the Document is void, and will
+automatically terminate your rights under this License. However,
+parties who have received copies, or rights, from you under this
+License will not have their licenses terminated so long as such
+parties remain in full compliance.
+
+
+10. FUTURE REVISIONS OF THIS LICENSE
+
+The Free Software Foundation may publish new, revised versions
+of the GNU Free Documentation License from time to time. Such new
+versions will be similar in spirit to the present version, but may
+differ in detail to address new problems or concerns. See
+http://www.gnu.org/copyleft/.
+
+Each version of the License is given a distinguishing version number.
+If the Document specifies that a particular numbered version of this
+License "or any later version" applies to it, you have the option of
+following the terms and conditions either of that specified version or
+of any later version that has been published (not as a draft) by the
+Free Software Foundation. If the Document does not specify a version
+number of this License, you may choose any version ever published (not
+as a draft) by the Free Software Foundation.
+
+
+ADDENDUM: How to use this License for your documents
+
+To use this License in a document you have written, include a copy of
+the License in the document and put the following copyright and
+license notices just after the title page:
+
+ Copyright (c) YEAR YOUR NAME.
+ Permission is granted to copy, distribute and/or modify this document
+ under the terms of the GNU Free Documentation License, Version 1.2
+ or any later version published by the Free Software Foundation;
+ with no Invariant Sections, no Front-Cover Texts, and no Back-Cover Texts.
+ A copy of the license is included in the section entitled "GNU
+ Free Documentation License".
+
+If you have Invariant Sections, Front-Cover Texts and Back-Cover Texts,
+replace the "with...Texts." line with this:
+
+ with the Invariant Sections being LIST THEIR TITLES, with the
+ Front-Cover Texts being LIST, and with the Back-Cover Texts being LIST.
+
+If you have Invariant Sections without Cover Texts, or some other
+combination of the three, merge those two alternatives to suit the
+situation.
+
+If your document contains nontrivial examples of program code, we
+recommend releasing these examples in parallel under your choice of
+free software license, such as the GNU General Public License,
+to permit their use in free software.</PRE
+></DIV
+><DIV
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+>
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+<HTML
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+>GNU General Public License (GPL)</TITLE
+><META
+NAME="GENERATOR"
+CONTENT="Modular DocBook HTML Stylesheet Version 1.79"><LINK
+REL="HOME"
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+HREF="index.html"><LINK
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+HREF="_licensing.html"><LINK
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+><BODY
+CLASS="section"
+BGCOLOR="#FFFFFF"
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+SUMMARY="Header navigation table"
+WIDTH="100%"
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+COLSPAN="3"
+ALIGN="center"
+>Universal JTAG library, server and tools</TH
+></TR
+><TR
+><TD
+WIDTH="10%"
+ALIGN="left"
+VALIGN="bottom"
+><A
+HREF="_gnu_free_documentation_license_fdl.html"
+ACCESSKEY="P"
+>Prev</A
+></TD
+><TD
+WIDTH="80%"
+ALIGN="center"
+VALIGN="bottom"
+>Chapter 6. Licensing</TD
+><TD
+WIDTH="10%"
+ALIGN="right"
+VALIGN="bottom"
+> </TD
+></TR
+></TABLE
+><HR
+ALIGN="LEFT"
+WIDTH="100%"></DIV
+><DIV
+CLASS="section"
+><H1
+CLASS="section"
+><A
+NAME="_gnu_general_public_license_gpl"
+>6.3. GNU General Public License (GPL)</A
+></H1
+><PRE
+CLASS="literallayout"
+> GNU GENERAL PUBLIC LICENSE
+ Version 2, June 1991
+
+ Copyright (C) 1989, 1991 Free Software Foundation, Inc.,
+ 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
+ Everyone is permitted to copy and distribute verbatim copies
+ of this license document, but changing it is not allowed.
+
+ Preamble
+
+ The licenses for most software are designed to take away your
+freedom to share and change it. By contrast, the GNU General Public
+License is intended to guarantee your freedom to share and change free
+software--to make sure the software is free for all its users. This
+General Public License applies to most of the Free Software
+Foundation's software and to any other program whose authors commit to
+using it. (Some other Free Software Foundation software is covered by
+the GNU Lesser General Public License instead.) You can apply it to
+your programs, too.
+
+ When we speak of free software, we are referring to freedom, not
+price. Our General Public Licenses are designed to make sure that you
+have the freedom to distribute copies of free software (and charge for
+this service if you wish), that you receive source code or can get it
+if you want it, that you can change the software or use pieces of it
+in new free programs; and that you know you can do these things.
+
+ To protect your rights, we need to make restrictions that forbid
+anyone to deny you these rights or to ask you to surrender the rights.
+These restrictions translate to certain responsibilities for you if you
+distribute copies of the software, or if you modify it.
+
+ For example, if you distribute copies of such a program, whether
+gratis or for a fee, you must give the recipients all the rights that
+you have. You must make sure that they, too, receive or can get the
+source code. And you must show them these terms so they know their
+rights.
+
+ We protect your rights with two steps: (1) copyright the software, and
+(2) offer you this license which gives you legal permission to copy,
+distribute and/or modify the software.
+
+ Also, for each author's protection and ours, we want to make certain
+that everyone understands that there is no warranty for this free
+software. If the software is modified by someone else and passed on, we
+want its recipients to know that what they have is not the original, so
+that any problems introduced by others will not reflect on the original
+authors' reputations.
+
+ Finally, any free program is threatened constantly by software
+patents. We wish to avoid the danger that redistributors of a free
+program will individually obtain patent licenses, in effect making the
+program proprietary. To prevent this, we have made it clear that any
+patent must be licensed for everyone's free use or not licensed at all.
+
+ The precise terms and conditions for copying, distribution and
+modification follow.
+
+ GNU GENERAL PUBLIC LICENSE
+ TERMS AND CONDITIONS FOR COPYING, DISTRIBUTION AND MODIFICATION
+
+ 0. This License applies to any program or other work which contains
+a notice placed by the copyright holder saying it may be distributed
+under the terms of this General Public License. The "Program", below,
+refers to any such program or work, and a "work based on the Program"
+means either the Program or any derivative work under copyright law:
+that is to say, a work containing the Program or a portion of it,
+either verbatim or with modifications and/or translated into another
+language. (Hereinafter, translation is included without limitation in
+the term "modification".) Each licensee is addressed as "you".
+
+Activities other than copying, distribution and modification are not
+covered by this License; they are outside its scope. The act of
+running the Program is not restricted, and the output from the Program
+is covered only if its contents constitute a work based on the
+Program (independent of having been made by running the Program).
+Whether that is true depends on what the Program does.
+
+ 1. You may copy and distribute verbatim copies of the Program's
+source code as you receive it, in any medium, provided that you
+conspicuously and appropriately publish on each copy an appropriate
+copyright notice and disclaimer of warranty; keep intact all the
+notices that refer to this License and to the absence of any warranty;
+and give any other recipients of the Program a copy of this License
+along with the Program.
+
+You may charge a fee for the physical act of transferring a copy, and
+you may at your option offer warranty protection in exchange for a fee.
+
+ 2. You may modify your copy or copies of the Program or any portion
+of it, thus forming a work based on the Program, and copy and
+distribute such modifications or work under the terms of Section 1
+above, provided that you also meet all of these conditions:
+
+ a) You must cause the modified files to carry prominent notices
+ stating that you changed the files and the date of any change.
+
+ b) You must cause any work that you distribute or publish, that in
+ whole or in part contains or is derived from the Program or any
+ part thereof, to be licensed as a whole at no charge to all third
+ parties under the terms of this License.
+
+ c) If the modified program normally reads commands interactively
+ when run, you must cause it, when started running for such
+ interactive use in the most ordinary way, to print or display an
+ announcement including an appropriate copyright notice and a
+ notice that there is no warranty (or else, saying that you provide
+ a warranty) and that users may redistribute the program under
+ these conditions, and telling the user how to view a copy of this
+ License. (Exception: if the Program itself is interactive but
+ does not normally print such an announcement, your work based on
+ the Program is not required to print an announcement.)
+
+These requirements apply to the modified work as a whole. If
+identifiable sections of that work are not derived from the Program,
+and can be reasonably considered independent and separate works in
+themselves, then this License, and its terms, do not apply to those
+sections when you distribute them as separate works. But when you
+distribute the same sections as part of a whole which is a work based
+on the Program, the distribution of the whole must be on the terms of
+this License, whose permissions for other licensees extend to the
+entire whole, and thus to each and every part regardless of who wrote it.
+
+Thus, it is not the intent of this section to claim rights or contest
+your rights to work written entirely by you; rather, the intent is to
+exercise the right to control the distribution of derivative or
+collective works based on the Program.
+
+In addition, mere aggregation of another work not based on the Program
+with the Program (or with a work based on the Program) on a volume of
+a storage or distribution medium does not bring the other work under
+the scope of this License.
+
+ 3. You may copy and distribute the Program (or a work based on it,
+under Section 2) in object code or executable form under the terms of
+Sections 1 and 2 above provided that you also do one of the following:
+
+ a) Accompany it with the complete corresponding machine-readable
+ source code, which must be distributed under the terms of Sections
+ 1 and 2 above on a medium customarily used for software interchange; or,
+
+ b) Accompany it with a written offer, valid for at least three
+ years, to give any third party, for a charge no more than your
+ cost of physically performing source distribution, a complete
+ machine-readable copy of the corresponding source code, to be
+ distributed under the terms of Sections 1 and 2 above on a medium
+ customarily used for software interchange; or,
+
+ c) Accompany it with the information you received as to the offer
+ to distribute corresponding source code. (This alternative is
+ allowed only for noncommercial distribution and only if you
+ received the program in object code or executable form with such
+ an offer, in accord with Subsection b above.)
+
+The source code for a work means the preferred form of the work for
+making modifications to it. For an executable work, complete source
+code means all the source code for all modules it contains, plus any
+associated interface definition files, plus the scripts used to
+control compilation and installation of the executable. However, as a
+special exception, the source code distributed need not include
+anything that is normally distributed (in either source or binary
+form) with the major components (compiler, kernel, and so on) of the
+operating system on which the executable runs, unless that component
+itself accompanies the executable.
+
+If distribution of executable or object code is made by offering
+access to copy from a designated place, then offering equivalent
+access to copy the source code from the same place counts as
+distribution of the source code, even though third parties are not
+compelled to copy the source along with the object code.
+
+ 4. You may not copy, modify, sublicense, or distribute the Program
+except as expressly provided under this License. Any attempt
+otherwise to copy, modify, sublicense or distribute the Program is
+void, and will automatically terminate your rights under this License.
+However, parties who have received copies, or rights, from you under
+this License will not have their licenses terminated so long as such
+parties remain in full compliance.
+
+ 5. You are not required to accept this License, since you have not
+signed it. However, nothing else grants you permission to modify or
+distribute the Program or its derivative works. These actions are
+prohibited by law if you do not accept this License. Therefore, by
+modifying or distributing the Program (or any work based on the
+Program), you indicate your acceptance of this License to do so, and
+all its terms and conditions for copying, distributing or modifying
+the Program or works based on it.
+
+ 6. Each time you redistribute the Program (or any work based on the
+Program), the recipient automatically receives a license from the
+original licensor to copy, distribute or modify the Program subject to
+these terms and conditions. You may not impose any further
+restrictions on the recipients' exercise of the rights granted herein.
+You are not responsible for enforcing compliance by third parties to
+this License.
+
+ 7. If, as a consequence of a court judgment or allegation of patent
+infringement or for any other reason (not limited to patent issues),
+conditions are imposed on you (whether by court order, agreement or
+otherwise) that contradict the conditions of this License, they do not
+excuse you from the conditions of this License. If you cannot
+distribute so as to satisfy simultaneously your obligations under this
+License and any other pertinent obligations, then as a consequence you
+may not distribute the Program at all. For example, if a patent
+license would not permit royalty-free redistribution of the Program by
+all those who receive copies directly or indirectly through you, then
+the only way you could satisfy both it and this License would be to
+refrain entirely from distribution of the Program.
+
+If any portion of this section is held invalid or unenforceable under
+any particular circumstance, the balance of the section is intended to
+apply and the section as a whole is intended to apply in other
+circumstances.
+
+It is not the purpose of this section to induce you to infringe any
+patents or other property right claims or to contest validity of any
+such claims; this section has the sole purpose of protecting the
+integrity of the free software distribution system, which is
+implemented by public license practices. Many people have made
+generous contributions to the wide range of software distributed
+through that system in reliance on consistent application of that
+system; it is up to the author/donor to decide if he or she is willing
+to distribute software through any other system and a licensee cannot
+impose that choice.
+
+This section is intended to make thoroughly clear what is believed to
+be a consequence of the rest of this License.
+
+ 8. If the distribution and/or use of the Program is restricted in
+certain countries either by patents or by copyrighted interfaces, the
+original copyright holder who places the Program under this License
+may add an explicit geographical distribution limitation excluding
+those countries, so that distribution is permitted only in or among
+countries not thus excluded. In such case, this License incorporates
+the limitation as if written in the body of this License.
+
+ 9. The Free Software Foundation may publish revised and/or new versions
+of the General Public License from time to time. Such new versions will
+be similar in spirit to the present version, but may differ in detail to
+address new problems or concerns.
+
+Each version is given a distinguishing version number. If the Program
+specifies a version number of this License which applies to it and "any
+later version", you have the option of following the terms and conditions
+either of that version or of any later version published by the Free
+Software Foundation. If the Program does not specify a version number of
+this License, you may choose any version ever published by the Free Software
+Foundation.
+
+ 10. If you wish to incorporate parts of the Program into other free
+programs whose distribution conditions are different, write to the author
+to ask for permission. For software which is copyrighted by the Free
+Software Foundation, write to the Free Software Foundation; we sometimes
+make exceptions for this. Our decision will be guided by the two goals
+of preserving the free status of all derivatives of our free software and
+of promoting the sharing and reuse of software generally.
+
+ NO WARRANTY
+
+ 11. BECAUSE THE PROGRAM IS LICENSED FREE OF CHARGE, THERE IS NO WARRANTY
+FOR THE PROGRAM, TO THE EXTENT PERMITTED BY APPLICABLE LAW. EXCEPT WHEN
+OTHERWISE STATED IN WRITING THE COPYRIGHT HOLDERS AND/OR OTHER PARTIES
+PROVIDE THE PROGRAM "AS IS" WITHOUT WARRANTY OF ANY KIND, EITHER EXPRESSED
+OR IMPLIED, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. THE ENTIRE RISK AS
+TO THE QUALITY AND PERFORMANCE OF THE PROGRAM IS WITH YOU. SHOULD THE
+PROGRAM PROVE DEFECTIVE, YOU ASSUME THE COST OF ALL NECESSARY SERVICING,
+REPAIR OR CORRECTION.
+
+ 12. IN NO EVENT UNLESS REQUIRED BY APPLICABLE LAW OR AGREED TO IN WRITING
+WILL ANY COPYRIGHT HOLDER, OR ANY OTHER PARTY WHO MAY MODIFY AND/OR
+REDISTRIBUTE THE PROGRAM AS PERMITTED ABOVE, BE LIABLE TO YOU FOR DAMAGES,
+INCLUDING ANY GENERAL, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES ARISING
+OUT OF THE USE OR INABILITY TO USE THE PROGRAM (INCLUDING BUT NOT LIMITED
+TO LOSS OF DATA OR DATA BEING RENDERED INACCURATE OR LOSSES SUSTAINED BY
+YOU OR THIRD PARTIES OR A FAILURE OF THE PROGRAM TO OPERATE WITH ANY OTHER
+PROGRAMS), EVEN IF SUCH HOLDER OR OTHER PARTY HAS BEEN ADVISED OF THE
+POSSIBILITY OF SUCH DAMAGES.
+
+ END OF TERMS AND CONDITIONS
+
+ How to Apply These Terms to Your New Programs
+
+ If you develop a new program, and you want it to be of the greatest
+possible use to the public, the best way to achieve this is to make it
+free software which everyone can redistribute and change under these terms.
+
+ To do so, attach the following notices to the program. It is safest
+to attach them to the start of each source file to most effectively
+convey the exclusion of warranty; and each file should have at least
+the "copyright" line and a pointer to where the full notice is found.
+
+ <one line to give the program's name and a brief idea of what it does.>
+ Copyright (C) <year> <name of author>
+
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 2 of the License, or
+ (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License along
+ with this program; if not, write to the Free Software Foundation, Inc.,
+ 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
+
+Also add information on how to contact you by electronic and paper mail.
+
+If the program is interactive, make it output a short notice like this
+when it starts in an interactive mode:
+
+ Gnomovision version 69, Copyright (C) year name of author
+ Gnomovision comes with ABSOLUTELY NO WARRANTY; for details type `show w'.
+ This is free software, and you are welcome to redistribute it
+ under certain conditions; type `show c' for details.
+
+The hypothetical commands `show w' and `show c' should show the appropriate
+parts of the General Public License. Of course, the commands you use may
+be called something other than `show w' and `show c'; they could even be
+mouse-clicks or menu items--whatever suits your program.
+
+You should also get your employer (if you work as a programmer) or your
+school, if any, to sign a "copyright disclaimer" for the program, if
+necessary. Here is a sample; alter the names:
+
+ Yoyodyne, Inc., hereby disclaims all copyright interest in the program
+ `Gnomovision' (which makes passes at compilers) written by James Hacker.
+
+ <signature of Ty Coon>, 1 April 1989
+ Ty Coon, President of Vice
+
+This General Public License does not permit incorporating your program into
+proprietary programs. If your program is a subroutine library, you may
+consider it more useful to permit linking proprietary applications with the
+library. If this is what you want to do, use the GNU Lesser General
+Public License instead of this License.</PRE
+></DIV
+><DIV
+CLASS="NAVFOOTER"
+><HR
+ALIGN="LEFT"
+WIDTH="100%"><TABLE
+SUMMARY="Footer navigation table"
+WIDTH="100%"
+BORDER="0"
+CELLPADDING="0"
+CELLSPACING="0"
+><TR
+><TD
+WIDTH="33%"
+ALIGN="left"
+VALIGN="top"
+><A
+HREF="_gnu_free_documentation_license_fdl.html"
+ACCESSKEY="P"
+>Prev</A
+></TD
+><TD
+WIDTH="34%"
+ALIGN="center"
+VALIGN="top"
+><A
+HREF="index.html"
+ACCESSKEY="H"
+>Home</A
+></TD
+><TD
+WIDTH="33%"
+ALIGN="right"
+VALIGN="top"
+> </TD
+></TR
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+WIDTH="33%"
+ALIGN="left"
+VALIGN="top"
+>GNU Free Documentation License (FDL)</TD
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+WIDTH="34%"
+ALIGN="center"
+VALIGN="top"
+><A
+HREF="_licensing.html"
+ACCESSKEY="U"
+>Up</A
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+WIDTH="33%"
+ALIGN="right"
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+> </TD
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+>
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+<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN""http://www.w3.org/TR/html4/loose.dtd">
+<HTML
+><HEAD
+><TITLE
+>Internals</TITLE
+><META
+NAME="GENERATOR"
+CONTENT="Modular DocBook HTML Stylesheet Version 1.79"><LINK
+REL="HOME"
+TITLE="Universal JTAG library, server and tools"
+HREF="index.html"><LINK
+REL="PREVIOUS"
+TITLE="JTAG commands"
+HREF="_jtag_commands.html"><LINK
+REL="NEXT"
+TITLE="Drivers"
+HREF="_drivers.html"><LINK
+REL="STYLESHEET"
+TYPE="text/css"
+HREF="UrJTAG.css"></HEAD
+><BODY
+CLASS="chapter"
+BGCOLOR="#FFFFFF"
+TEXT="#000000"
+LINK="#0000FF"
+VLINK="#840084"
+ALINK="#0000FF"
+><DIV
+CLASS="NAVHEADER"
+><TABLE
+SUMMARY="Header navigation table"
+WIDTH="100%"
+BORDER="0"
+CELLPADDING="0"
+CELLSPACING="0"
+><TR
+><TH
+COLSPAN="3"
+ALIGN="center"
+>Universal JTAG library, server and tools</TH
+></TR
+><TR
+><TD
+WIDTH="10%"
+ALIGN="left"
+VALIGN="bottom"
+><A
+HREF="_jtag_commands.html"
+ACCESSKEY="P"
+>Prev</A
+></TD
+><TD
+WIDTH="80%"
+ALIGN="center"
+VALIGN="bottom"
+></TD
+><TD
+WIDTH="10%"
+ALIGN="right"
+VALIGN="bottom"
+><A
+HREF="_drivers.html"
+ACCESSKEY="N"
+>Next</A
+></TD
+></TR
+></TABLE
+><HR
+ALIGN="LEFT"
+WIDTH="100%"></DIV
+><DIV
+CLASS="chapter"
+><H1
+><A
+NAME="_internals"
+></A
+>Chapter 4. Internals</H1
+><P
+>This section yet is only a placeholder for the information that will
+be added soon…</P
+><DIV
+CLASS="section"
+><H1
+CLASS="section"
+><A
+NAME="_files"
+>4.1. Files</A
+></H1
+><DIV
+CLASS="section"
+><H2
+CLASS="section"
+><A
+NAME="_source_code_overview"
+>4.1.1. Source code Overview</A
+></H2
+><DIV
+CLASS="informaltable"
+><P
+></P
+><A
+NAME="AEN892"
+></A
+><TABLE
+BORDER="0"
+FRAME="void"
+RULES="none"
+CLASS="CALSTABLE"
+><COL
+WIDTH="3*"><COL
+WIDTH="7*"><TBODY
+VALIGN="top"
+><TR
+><TD
+><P
+> doc/
+</P
+></TD
+><TD
+> <P
+> Documentation
+</P
+>
+</TD
+></TR
+><TR
+><TD
+><P
+> data/
+</P
+></TD
+><TD
+> <P
+> Part descriptions (Data files)
+</P
+>
+</TD
+></TR
+><TR
+><TD
+><P
+> include/
+</P
+></TD
+><TD
+> <P
+> C header files
+</P
+>
+</TD
+></TR
+><TR
+><TD
+><P
+> src/
+</P
+></TD
+><TD
+> <P
+> C source code
+</P
+>
+</TD
+></TR
+><TR
+><TD
+><P
+> src/bsdl
+</P
+></TD
+><TD
+> <P
+> BSDL subsystem
+</P
+>
+</TD
+></TR
+><TR
+><TD
+><P
+> src/bus
+</P
+></TD
+><TD
+> <P
+> Bus driver for various CPUs and other parts
+</P
+>
+</TD
+></TR
+><TR
+><TD
+><P
+> src/cmd
+</P
+></TD
+><TD
+> <P
+> Implementation of the commands for the "jtag" shell
+</P
+>
+</TD
+></TR
+><TR
+><TD
+><P
+> src/flash
+</P
+></TD
+><TD
+> <P
+> Flash detection and programming algorithms
+</P
+>
+</TD
+></TR
+><TR
+><TD
+><P
+> src/jim
+</P
+></TD
+><TD
+> <P
+> JIM, the JTAG target simulator
+</P
+>
+</TD
+></TR
+><TR
+><TD
+><P
+> src/lib
+</P
+></TD
+><TD
+> <P
+> Utility functions
+</P
+>
+</TD
+></TR
+><TR
+><TD
+><P
+> src/part
+</P
+></TD
+><TD
+> <P
+> Functions for accessing specific parts in a chain
+</P
+>
+</TD
+></TR
+><TR
+><TD
+><P
+> src/svf
+</P
+></TD
+><TD
+> <P
+> SVF player
+</P
+>
+</TD
+></TR
+><TR
+><TD
+><P
+> src/tap
+</P
+></TD
+><TD
+> <P
+> Functions for accessing the chain in general
+</P
+>
+</TD
+></TR
+></TBODY
+></TABLE
+><P
+></P
+></DIV
+></DIV
+></DIV
+></DIV
+><DIV
+CLASS="NAVFOOTER"
+><HR
+ALIGN="LEFT"
+WIDTH="100%"><TABLE
+SUMMARY="Footer navigation table"
+WIDTH="100%"
+BORDER="0"
+CELLPADDING="0"
+CELLSPACING="0"
+><TR
+><TD
+WIDTH="33%"
+ALIGN="left"
+VALIGN="top"
+><A
+HREF="_jtag_commands.html"
+ACCESSKEY="P"
+>Prev</A
+></TD
+><TD
+WIDTH="34%"
+ALIGN="center"
+VALIGN="top"
+><A
+HREF="index.html"
+ACCESSKEY="H"
+>Home</A
+></TD
+><TD
+WIDTH="33%"
+ALIGN="right"
+VALIGN="top"
+><A
+HREF="_drivers.html"
+ACCESSKEY="N"
+>Next</A
+></TD
+></TR
+><TR
+><TD
+WIDTH="33%"
+ALIGN="left"
+VALIGN="top"
+>JTAG commands</TD
+><TD
+WIDTH="34%"
+ALIGN="center"
+VALIGN="top"
+> </TD
+><TD
+WIDTH="33%"
+ALIGN="right"
+VALIGN="top"
+>Drivers</TD
+></TR
+></TABLE
+></DIV
+></BODY
+></HTML
+>
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--- /dev/null
+<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN""http://www.w3.org/TR/html4/loose.dtd">
+<HTML
+><HEAD
+><TITLE
+>JTAG commands</TITLE
+><META
+NAME="GENERATOR"
+CONTENT="Modular DocBook HTML Stylesheet Version 1.79"><LINK
+REL="HOME"
+TITLE="Universal JTAG library, server and tools"
+HREF="index.html"><LINK
+REL="UP"
+TITLE="Usage"
+HREF="_usage.html"><LINK
+REL="PREVIOUS"
+TITLE="Usage"
+HREF="_usage.html"><LINK
+REL="NEXT"
+TITLE="Internals"
+HREF="_internals.html"><LINK
+REL="STYLESHEET"
+TYPE="text/css"
+HREF="UrJTAG.css"></HEAD
+><BODY
+CLASS="section"
+BGCOLOR="#FFFFFF"
+TEXT="#000000"
+LINK="#0000FF"
+VLINK="#840084"
+ALINK="#0000FF"
+><DIV
+CLASS="NAVHEADER"
+><TABLE
+SUMMARY="Header navigation table"
+WIDTH="100%"
+BORDER="0"
+CELLPADDING="0"
+CELLSPACING="0"
+><TR
+><TH
+COLSPAN="3"
+ALIGN="center"
+>Universal JTAG library, server and tools</TH
+></TR
+><TR
+><TD
+WIDTH="10%"
+ALIGN="left"
+VALIGN="bottom"
+><A
+HREF="_usage.html"
+ACCESSKEY="P"
+>Prev</A
+></TD
+><TD
+WIDTH="80%"
+ALIGN="center"
+VALIGN="bottom"
+>Chapter 3. Usage</TD
+><TD
+WIDTH="10%"
+ALIGN="right"
+VALIGN="bottom"
+><A
+HREF="_internals.html"
+ACCESSKEY="N"
+>Next</A
+></TD
+></TR
+></TABLE
+><HR
+ALIGN="LEFT"
+WIDTH="100%"></DIV
+><DIV
+CLASS="section"
+><H1
+CLASS="section"
+><A
+NAME="_jtag_commands"
+>3.2. JTAG commands</A
+></H1
+><DIV
+CLASS="section"
+><H2
+CLASS="section"
+><A
+NAME="_overview"
+>3.2.1. Overview</A
+></H2
+><P
+>Following is a list of commands currently supported by jtag and some
+example usage.</P
+><DIV
+CLASS="informaltable"
+><P
+></P
+><A
+NAME="AEN393"
+></A
+><TABLE
+BORDER="0"
+FRAME="void"
+RULES="none"
+CLASS="CALSTABLE"
+><COL
+WIDTH="3*"><COL
+WIDTH="7*"><TBODY
+VALIGN="top"
+><TR
+><TD
+><P
+> <SPAN
+CLASS="strong"
+><B
+CLASS="emphasis"
+>bit</B
+></SPAN
+>
+</P
+></TD
+><TD
+> <P
+> define new BSR bit
+</P
+>
+</TD
+></TR
+><TR
+><TD
+><P
+> <SPAN
+CLASS="strong"
+><B
+CLASS="emphasis"
+>bus</B
+></SPAN
+>
+</P
+></TD
+><TD
+> <P
+> change active bus
+</P
+>
+</TD
+></TR
+><TR
+><TD
+><P
+> <SPAN
+CLASS="strong"
+><B
+CLASS="emphasis"
+>bsdl</B
+></SPAN
+>
+</P
+></TD
+><TD
+> <P
+> manage BSDL files
+</P
+>
+</TD
+></TR
+><TR
+><TD
+><P
+> <SPAN
+CLASS="strong"
+><B
+CLASS="emphasis"
+>cable</B
+></SPAN
+>
+</P
+></TD
+><TD
+> <P
+> select JTAG cable
+</P
+>
+</TD
+></TR
+><TR
+><TD
+><P
+> <SPAN
+CLASS="strong"
+><B
+CLASS="emphasis"
+>detect</B
+></SPAN
+>
+</P
+></TD
+><TD
+> <P
+> detect parts on the JTAG chain
+</P
+>
+</TD
+></TR
+><TR
+><TD
+><P
+> <SPAN
+CLASS="strong"
+><B
+CLASS="emphasis"
+>detectflash</B
+></SPAN
+>
+</P
+></TD
+><TD
+> <P
+> detect parameters of flash chips attached to a part
+</P
+>
+</TD
+></TR
+><TR
+><TD
+><P
+> <SPAN
+CLASS="strong"
+><B
+CLASS="emphasis"
+>discovery</B
+></SPAN
+>
+</P
+></TD
+><TD
+> <P
+> discovery of unknown parts in the JTAG chain
+</P
+>
+</TD
+></TR
+><TR
+><TD
+><P
+> <SPAN
+CLASS="strong"
+><B
+CLASS="emphasis"
+>dr</B
+></SPAN
+>
+</P
+></TD
+><TD
+> <P
+> display or set active data register for a part
+</P
+>
+</TD
+></TR
+><TR
+><TD
+><P
+> <SPAN
+CLASS="strong"
+><B
+CLASS="emphasis"
+>endian</B
+></SPAN
+>
+</P
+></TD
+><TD
+> <P
+> set/print endianess for reading/writing binary files
+</P
+>
+</TD
+></TR
+><TR
+><TD
+><P
+> <SPAN
+CLASS="strong"
+><B
+CLASS="emphasis"
+>eraseflash</B
+></SPAN
+>
+</P
+></TD
+><TD
+> <P
+> erase flash memory by number of blocks
+</P
+>
+</TD
+></TR
+><TR
+><TD
+><P
+> <SPAN
+CLASS="strong"
+><B
+CLASS="emphasis"
+>flashmem</B
+></SPAN
+>
+</P
+></TD
+><TD
+> <P
+> burn flash memory with data from a file
+</P
+>
+</TD
+></TR
+><TR
+><TD
+><P
+> <SPAN
+CLASS="strong"
+><B
+CLASS="emphasis"
+>frequency</B
+></SPAN
+>
+</P
+></TD
+><TD
+> <P
+> setup JTAG frequency
+</P
+>
+</TD
+></TR
+><TR
+><TD
+><P
+> <SPAN
+CLASS="strong"
+><B
+CLASS="emphasis"
+>get</B
+></SPAN
+>
+</P
+></TD
+><TD
+> <P
+> get external signal value
+</P
+>
+</TD
+></TR
+><TR
+><TD
+><P
+> <SPAN
+CLASS="strong"
+><B
+CLASS="emphasis"
+>help</B
+></SPAN
+>
+</P
+></TD
+><TD
+> <P
+> display this help
+</P
+>
+</TD
+></TR
+><TR
+><TD
+><P
+> <SPAN
+CLASS="strong"
+><B
+CLASS="emphasis"
+>include</B
+></SPAN
+>
+</P
+></TD
+><TD
+> <P
+> include command sequence from external file
+</P
+>
+</TD
+></TR
+><TR
+><TD
+><P
+> <SPAN
+CLASS="strong"
+><B
+CLASS="emphasis"
+>initbus</B
+></SPAN
+>
+</P
+></TD
+><TD
+> <P
+> initialize bus driver for active part
+</P
+>
+</TD
+></TR
+><TR
+><TD
+><P
+> <SPAN
+CLASS="strong"
+><B
+CLASS="emphasis"
+>instruction</B
+></SPAN
+>
+</P
+></TD
+><TD
+> <P
+> change active instruction for a part or declare new instruction
+</P
+>
+</TD
+></TR
+><TR
+><TD
+><P
+> <SPAN
+CLASS="strong"
+><B
+CLASS="emphasis"
+>part</B
+></SPAN
+>
+</P
+></TD
+><TD
+> <P
+> change active part for current JTAG chain
+</P
+>
+</TD
+></TR
+><TR
+><TD
+><P
+> <SPAN
+CLASS="strong"
+><B
+CLASS="emphasis"
+>peek</B
+></SPAN
+>
+</P
+></TD
+><TD
+> <P
+> read a single word
+</P
+>
+</TD
+></TR
+><TR
+><TD
+><P
+> <SPAN
+CLASS="strong"
+><B
+CLASS="emphasis"
+>poke</B
+></SPAN
+>
+</P
+></TD
+><TD
+> <P
+> write a single word
+</P
+>
+</TD
+></TR
+><TR
+><TD
+><P
+> <SPAN
+CLASS="strong"
+><B
+CLASS="emphasis"
+>print</B
+></SPAN
+>
+</P
+></TD
+><TD
+> <P
+> display JTAG chain list/status
+</P
+>
+</TD
+></TR
+><TR
+><TD
+><P
+> <SPAN
+CLASS="strong"
+><B
+CLASS="emphasis"
+>quit</B
+></SPAN
+>
+</P
+></TD
+><TD
+> <P
+> exit and terminate this session
+</P
+>
+</TD
+></TR
+><TR
+><TD
+><P
+> <SPAN
+CLASS="strong"
+><B
+CLASS="emphasis"
+>readmem</B
+></SPAN
+>
+</P
+></TD
+><TD
+> <P
+> read content of the memory and write it to file
+</P
+>
+</TD
+></TR
+><TR
+><TD
+><P
+> <SPAN
+CLASS="strong"
+><B
+CLASS="emphasis"
+>register</B
+></SPAN
+>
+</P
+></TD
+><TD
+> <P
+> define new data register for a part
+</P
+>
+</TD
+></TR
+><TR
+><TD
+><P
+> <SPAN
+CLASS="strong"
+><B
+CLASS="emphasis"
+>scan</B
+></SPAN
+>
+</P
+></TD
+><TD
+> <P
+> detect changes on input pins of current part
+</P
+>
+</TD
+></TR
+><TR
+><TD
+><P
+> <SPAN
+CLASS="strong"
+><B
+CLASS="emphasis"
+>set</B
+></SPAN
+>
+</P
+></TD
+><TD
+> <P
+> set external signal value
+</P
+>
+</TD
+></TR
+><TR
+><TD
+><P
+> <SPAN
+CLASS="strong"
+><B
+CLASS="emphasis"
+>shift</B
+></SPAN
+>
+</P
+></TD
+><TD
+> <P
+> shift data/instruction registers through JTAG chain
+</P
+>
+</TD
+></TR
+><TR
+><TD
+><P
+> <SPAN
+CLASS="strong"
+><B
+CLASS="emphasis"
+>signal</B
+></SPAN
+>
+</P
+></TD
+><TD
+> <P
+> define new signal for a part
+</P
+>
+</TD
+></TR
+><TR
+><TD
+><P
+> <SPAN
+CLASS="strong"
+><B
+CLASS="emphasis"
+>svf</B
+></SPAN
+>
+</P
+></TD
+><TD
+> <P
+> execute svf commands from file
+</P
+>
+</TD
+></TR
+><TR
+><TD
+><P
+> <SPAN
+CLASS="strong"
+><B
+CLASS="emphasis"
+>writemem</B
+></SPAN
+>
+</P
+></TD
+><TD
+> <P
+> write content from file to memory
+</P
+>
+</TD
+></TR
+></TBODY
+></TABLE
+><P
+></P
+></DIV
+><P
+>Some tools derived from the same openwince JTAG Tools code base as UrJTAG
+know additional commands, which are not supported in UrJTAG. See the section
+about "Unsupported commands", below, about workarounds.</P
+></DIV
+><DIV
+CLASS="section"
+><H2
+CLASS="section"
+><A
+NAME="_basic_commands"
+>3.2.2. Basic commands</A
+></H2
+><DIV
+CLASS="section"
+><H3
+CLASS="section"
+><A
+NAME="_quit"
+>3.2.2.1. quit</A
+></H3
+><P
+>This command closes the jtag console.</P
+></DIV
+><DIV
+CLASS="section"
+><H3
+CLASS="section"
+><A
+NAME="_help"
+>3.2.2.2. help</A
+></H3
+><P
+>Without additional parameter it gives an overview of the available commands.
+With a parameter you can get more information about any of the commands.
+Example:</P
+><PRE
+CLASS="literallayout"
+>jtag> help cable</PRE
+><P
+>Most cable drivers require some more details about the cable to start properly.
+To learn about the details, use the "cable" command with the name of the cable
+followed by the word "help". Example:</P
+><PRE
+CLASS="literallayout"
+>jtag> cable wiggler help</PRE
+></DIV
+><DIV
+CLASS="section"
+><H3
+CLASS="section"
+><A
+NAME="_include"
+>3.2.2.3. include</A
+></H3
+><P
+>Run commands from a named script file installed with UrJTAG or applies a BSDL
+file to the active part. The directory prefix is added automatically
+(e.g. /usr/share/urjtag/, depending on your installation), unless the file
+name starts with a dot or slash.</P
+><P
+>For example, the following startup sequence configures the cable, chain, and
+loads definitions and bus driver for a Samsung S3C4510B CPU to peek its memory
+at 0x0:</P
+><PRE
+CLASS="literallayout"
+>jtag> cable wiggler ppdev /dev/parport0
+jtag> detect
+jtag> include samsung/s3c4510b/s3c4510b
+jtag> peek 0x0000</PRE
+><P
+>If the file contains valid BSDL syntax, it will be converted to native
+commands on the fly.</P
+><P
+>Optionally, a number X may be specified following the file name, to cause
+an X times repetition of the command sequence from the file.</P
+></DIV
+></DIV
+><DIV
+CLASS="section"
+><H2
+CLASS="section"
+><A
+NAME="_chain_management"
+>3.2.3. Chain management</A
+></H2
+><DIV
+CLASS="section"
+><H3
+CLASS="section"
+><A
+NAME="_cable"
+>3.2.3.1. cable</A
+></H3
+><P
+>Sets and initialized the cable driver. This is usually the first command that
+you are executing in a session. Example:</P
+><PRE
+CLASS="literallayout"
+>jtag> cable EA253 parallel 0x378
+Initializing ETC EA253 JTAG Cable on parallel port at 0x378</PRE
+><P
+>For a parallel cable using the ppdev driver you would use this:</P
+><PRE
+CLASS="literallayout"
+>jtag> cable DLC5 ppdev /dev/parport0</PRE
+><P
+>If you get an error, it may be that the parallel port kernel driver
+was compiled as a module in your Linux kernel and wasn't loaded automatically.
+Then you should try to load the ppdev driver manually (with root rights outside
+the jtag shell):</P
+><PRE
+CLASS="literallayout"
+>modprobe ppdev
+modprobe parport
+modprobe parport_pc</PRE
+><P
+>UrJTAG now also supports some USB cables. Unfortunately, there is no standard
+for "JTAG over USB", so this support is limited to a few selected cables only.
+For cables based on the FT2232 chip from FTDI, the cable command has to be
+given cable name and optionally the driver name, USB Vendor, and Product ID of
+the cable:</P
+><PRE
+CLASS="literallayout"
+>jtag> cable ARM-USB-OCD vid=15ba pid=0003 driver=ftdi-mpsse</PRE
+><P
+>For all known cables, UrJTAG knows the VID and PID so you can just say</P
+><PRE
+CLASS="literallayout"
+>jtag> cable ARM-USB-OCD</PRE
+><P
+>If your cable isn't detected automatically though it's listed as a known and
+supported cable, feel free to report its VID and PID. It might be a different
+revision and should be added to the known & tested list of cables.</P
+><P
+>As stated above, the driver name is not mandatory for the cable
+command. UrJTAG will select the driver automatically based on UrJTAG's
+configuration. In case your system provides just one of libftdi or FTD2XX
+the respective driver is selected. If both libraries are available, then
+FTD2XX is selected. That's simply because FTD2XX showed some performance
+advantages over libftdi in the past. You can still force libftdi with the
+respective parameter.</P
+><DIV
+CLASS="warning"
+><P
+></P
+><TABLE
+CLASS="warning"
+WIDTH="100%"
+BORDER="0"
+><TR
+><TD
+WIDTH="25"
+ALIGN="CENTER"
+VALIGN="TOP"
+><IMG
+SRC="../images/warning.gif"
+HSPACE="5"
+ALT="Warning"></TD
+><TD
+ALIGN="LEFT"
+VALIGN="TOP"
+><P
+>There's one quirk to consider when using FTDI's FTD2XX driver. It
+connects to any known FTDI chip, randomly. I.e. if there's more than one FTDI
+device connected to the host, chances are that the driver connects to the
+wrong USB device. This might be an OEM USB-serial converter and you'll be
+banging your head why there's no proper reading from the JTAG chain. Therefore
+it's strongly recommended to specify the desc=xxx parameter for the cable
+command if the ftd2xx driver is to be used. Set xxx to the product or serial
+number descriptor string that are exhibited by the USB device.</P
+></TD
+></TR
+></TABLE
+></DIV
+></DIV
+><DIV
+CLASS="section"
+><H3
+CLASS="section"
+><A
+NAME="_detect"
+>3.2.3.2. detect</A
+></H3
+><P
+>Detects devices on the chain. Example:</P
+><PRE
+CLASS="literallayout"
+>jtag> detect
+IR length: 5
+Chain length: 1
+Device Id: 01011001001001100100000000010011
+ Manufacturer: Intel
+ Part: PXA250
+ Stepping: C0
+ Filename: /usr/local/share/jtag/intel/pxa250/pxa250c0</PRE
+><P
+>During "detect", UrJTAG searches through the files in its database (usually in
+/usr/share/urjtag) and optionally in the search path for BSDL files (see bsdl
+command) to find a match for the manufacturer, revision and part number for the
+IDCODE read from the part. However, not all parts identify themselves in a way
+that is useful for "detect". For example, many chips with an ARM processor core
+inside present an IDCODE that may be specific to the the particular core inside
+the chip (e.g. ARM7TDMI), but doesn't tell about the actual manufacturer of
+the chip. In such case, the data for the part has to be included manually. See
+also the documentation for the "include" command.</P
+></DIV
+><DIV
+CLASS="section"
+><H3
+CLASS="section"
+><A
+NAME="_print"
+>3.2.3.3. print</A
+></H3
+><P
+>Print a list of parts in the chain and the currently active instruction per part.
+Further details of bus, signals and instructions can be obtained with dedicated
+command options, see "help print".</P
+></DIV
+><DIV
+CLASS="section"
+><H3
+CLASS="section"
+><A
+NAME="_initbus"
+>3.2.3.4. initbus</A
+></H3
+><P
+>Selects and initializes a bus of the currently selected part, e.g. the external
+memory bus of a CPU. This is required in order to access chips that aren't
+connected in the JTAG chain, but indirectly accessible through other chips
+(e.g. CPU or programmable logic).</P
+><P
+>Type "help initbus" to get a list of supported bus types.
+If you do not find a bus driver for your specific hardware, you might be lucky
+enough to have EJTAG in your target (most MIPS-based CPUs do) and should try
+the "ejtag" bus driver. In contrast to the method "via BSR", it uploads some
+instructions to the CPU and triggers their execution to access the bus, and
+should work with almost any EJTAG-capable chip (Note: JTAG isn't EJTAG):</P
+><PRE
+CLASS="literallayout"
+>jtag> initbus ejtag</PRE
+><P
+>There's another option to support new chips "via BSR", the "prototype" bus
+driver, which can be adapted to support your part with command parameters.
+The only prerequisite for using this driver is knowledge of the names of the
+signals that represent address bus, data bus, and enable signals, and that
+address and data lines are numbered in order.</P
+><P
+>For example, assume the signals are named in the BSDL description as follows:</P
+><P
+></P
+><UL
+><LI
+><P
+> Data bus: D0, D1, … D31
+</P
+></LI
+><LI
+><P
+> Address bus: ADDR0, ADDR1, … ADDR22
+</P
+></LI
+><LI
+><P
+> Output Enable: nOE
+</P
+></LI
+><LI
+><P
+> Write Enable: nWE
+</P
+></LI
+><LI
+><P
+> Chip Select: nRCS0
+</P
+></LI
+></UL
+><P
+>The enable signals seem to be active low (indicated by the leading "n" in their
+names). Further we assume the interesting connected part, some flash chip, is
+only 16 bits wide even though the data bus width is 32 bits. With this
+information, you could use the following command (all on a single line!) to
+access the bus:</P
+><PRE
+CLASS="literallayout"
+>initbus prototype amsb=ADDR22 alsb=ADDR0 dmsb=D15 dlsb=D0
+ ncs=nRCS0 nwe=nWE noe=nOE amode=x16</PRE
+><P
+>The "prototype" bus driver yet cannot deal with systems where address and data
+bus are multiplexed on the same pins. If signals aren't numbered in the right
+order or with gaps, you may get along by defining proper names as aliases for
+the actual signals, with commands like "salias ADDR12 BSCGX44".</P
+><P
+>Most drivers work "via BSR", i.e. they directly access the pins of the device.
+Because it isn't possible to efficiently address only particular pins but only
+all at once, and data for all pins has to be transferred through JTAG for every
+single change, this method isn't the fastest, but usually easiest to implement
+and, well, sometimes it counts whether it works at all..</P
+><P
+>The "fjmem" (FPGA JTAG memory) bus driver attempts to address this issue by
+moving control and observation away from BSR to a device-internal
+register. For sure this is only possible on FPGAs where the designer can hook
+additional logic to the JTAG chain. A core design plus examples for different
+FPGA families is available in the extra/fjmem directory. Refer to the README
+located there.</P
+><P
+>Some chips don't allow direct access to their pins via BSR at all. For these,
+writing a new bus driver that utilizes a debug module to upload specific code
+to access the bus is inevitable.</P
+></DIV
+><DIV
+CLASS="section"
+><H3
+CLASS="section"
+><A
+NAME="_bus"
+>3.2.3.5. bus</A
+></H3
+><P
+>It's possible to initialize more than one bus for part(s) within a chain. The
+"bus" command allows to select the active bus for readmem, flashmem,
+etc. operation.</P
+></DIV
+></DIV
+><DIV
+CLASS="section"
+><H2
+CLASS="section"
+><A
+NAME="_part_definition_commands"
+>3.2.4. Part definition commands</A
+></H2
+><P
+>The following commands are also used in the data files to define a device (IC)
+on the JTAG chain. It is not recommended to use these commands in an interactive
+session. Instead you should produce a device definition file out of a .bsd file
+using one of the supplied tools (or use the new BSDL subsystem, see below).</P
+><DIV
+CLASS="informaltable"
+><P
+></P
+><A
+NAME="AEN653"
+></A
+><TABLE
+BORDER="0"
+FRAME="void"
+RULES="none"
+CLASS="CALSTABLE"
+><COL
+WIDTH="3*"><COL
+WIDTH="7*"><TBODY
+VALIGN="top"
+><TR
+><TD
+><P
+> <SPAN
+CLASS="strong"
+><B
+CLASS="emphasis"
+>bit</B
+></SPAN
+>
+</P
+></TD
+><TD
+> <P
+> define new BSR bit
+</P
+>
+</TD
+></TR
+><TR
+><TD
+><P
+> <SPAN
+CLASS="strong"
+><B
+CLASS="emphasis"
+>instruction</B
+></SPAN
+>
+</P
+></TD
+><TD
+> <P
+> change active instruction for a part or declare new instruction
+</P
+>
+</TD
+></TR
+><TR
+><TD
+><P
+> <SPAN
+CLASS="strong"
+><B
+CLASS="emphasis"
+>register</B
+></SPAN
+>
+</P
+></TD
+><TD
+> <P
+> define new data register for a part
+</P
+>
+</TD
+></TR
+><TR
+><TD
+><P
+> <SPAN
+CLASS="strong"
+><B
+CLASS="emphasis"
+>signal</B
+></SPAN
+>
+</P
+></TD
+><TD
+> <P
+> define new signal for a part
+</P
+>
+</TD
+></TR
+></TBODY
+></TABLE
+><P
+></P
+></DIV
+></DIV
+><DIV
+CLASS="section"
+><H2
+CLASS="section"
+><A
+NAME="_tap_control"
+>3.2.5. TAP control</A
+></H2
+><P
+>The following commands can be used to directly manipulate and display the state
+of the TAP controller(s) and registers in the chain:</P
+><DIV
+CLASS="informaltable"
+><P
+></P
+><A
+NAME="AEN685"
+></A
+><TABLE
+BORDER="0"
+FRAME="void"
+RULES="none"
+CLASS="CALSTABLE"
+><COL
+WIDTH="3*"><COL
+WIDTH="7*"><TBODY
+VALIGN="top"
+><TR
+><TD
+><P
+> <SPAN
+CLASS="strong"
+><B
+CLASS="emphasis"
+>dr</B
+></SPAN
+>
+</P
+></TD
+><TD
+> <P
+> display or set active data register for a part
+</P
+>
+</TD
+></TR
+><TR
+><TD
+><P
+> <SPAN
+CLASS="strong"
+><B
+CLASS="emphasis"
+>instruction</B
+></SPAN
+>
+</P
+></TD
+><TD
+> <P
+> change active instruction for a part or declare new instruction
+</P
+>
+</TD
+></TR
+><TR
+><TD
+><P
+> <SPAN
+CLASS="strong"
+><B
+CLASS="emphasis"
+>get</B
+></SPAN
+>
+</P
+></TD
+><TD
+> <P
+> get external signal value
+</P
+>
+</TD
+></TR
+><TR
+><TD
+><P
+> <SPAN
+CLASS="strong"
+><B
+CLASS="emphasis"
+>pod</B
+></SPAN
+>
+</P
+></TD
+><TD
+> <P
+> low level direct access to POD signals like TRST; use with care
+</P
+>
+</TD
+></TR
+><TR
+><TD
+><P
+> <SPAN
+CLASS="strong"
+><B
+CLASS="emphasis"
+>scan</B
+></SPAN
+>
+</P
+></TD
+><TD
+> <P
+> detect changes on input pins of current part
+</P
+>
+</TD
+></TR
+><TR
+><TD
+><P
+> <SPAN
+CLASS="strong"
+><B
+CLASS="emphasis"
+>set</B
+></SPAN
+>
+</P
+></TD
+><TD
+> <P
+> set external signal value
+</P
+>
+</TD
+></TR
+><TR
+><TD
+><P
+> <SPAN
+CLASS="strong"
+><B
+CLASS="emphasis"
+>shift</B
+></SPAN
+>
+</P
+></TD
+><TD
+> <P
+> shift data/instruction registers through JTAG chain
+</P
+>
+</TD
+></TR
+></TBODY
+></TABLE
+><P
+></P
+></DIV
+></DIV
+><DIV
+CLASS="section"
+><H2
+CLASS="section"
+><A
+NAME="_ram_flash_access"
+>3.2.6. RAM/Flash access</A
+></H2
+><P
+>These commands can be used if a part in the chain has memory connected to it
+(or integrated). Before they can be used, a bus driver has to be selected and
+initialized (see initbus command).</P
+><DIV
+CLASS="informaltable"
+><P
+></P
+><A
+NAME="AEN735"
+></A
+><TABLE
+BORDER="0"
+FRAME="void"
+RULES="none"
+CLASS="CALSTABLE"
+><COL
+WIDTH="3*"><COL
+WIDTH="7*"><TBODY
+VALIGN="top"
+><TR
+><TD
+><P
+> <SPAN
+CLASS="strong"
+><B
+CLASS="emphasis"
+>detectflash</B
+></SPAN
+>
+</P
+></TD
+><TD
+> <P
+> detect parameters of flash chips attached to a part
+</P
+>
+</TD
+></TR
+><TR
+><TD
+><P
+> <SPAN
+CLASS="strong"
+><B
+CLASS="emphasis"
+>endian</B
+></SPAN
+>
+</P
+></TD
+><TD
+> <P
+> set/print endianess for reading/writing binary files
+</P
+>
+</TD
+></TR
+><TR
+><TD
+><P
+> <SPAN
+CLASS="strong"
+><B
+CLASS="emphasis"
+>eraseflash</B
+></SPAN
+>
+</P
+></TD
+><TD
+> <P
+> erase flash memory by number of blocks
+</P
+>
+</TD
+></TR
+><TR
+><TD
+><P
+> <SPAN
+CLASS="strong"
+><B
+CLASS="emphasis"
+>flashmem</B
+></SPAN
+>
+</P
+></TD
+><TD
+> <P
+> burn flash memory with data from a file
+</P
+>
+</TD
+></TR
+><TR
+><TD
+><P
+> <SPAN
+CLASS="strong"
+><B
+CLASS="emphasis"
+>peek</B
+></SPAN
+>
+</P
+></TD
+><TD
+> <P
+> read a single word
+</P
+>
+</TD
+></TR
+><TR
+><TD
+><P
+> <SPAN
+CLASS="strong"
+><B
+CLASS="emphasis"
+>poke</B
+></SPAN
+>
+</P
+></TD
+><TD
+> <P
+> write a single word
+</P
+>
+</TD
+></TR
+><TR
+><TD
+><P
+> <SPAN
+CLASS="strong"
+><B
+CLASS="emphasis"
+>readmem</B
+></SPAN
+>
+</P
+></TD
+><TD
+> <P
+> read content of the memory and write it to file
+</P
+>
+</TD
+></TR
+><TR
+><TD
+><P
+> <SPAN
+CLASS="strong"
+><B
+CLASS="emphasis"
+>writemem</B
+></SPAN
+>
+</P
+></TD
+><TD
+> <P
+> write content from file to memory
+</P
+>
+</TD
+></TR
+></TBODY
+></TABLE
+><P
+></P
+></DIV
+></DIV
+><DIV
+CLASS="section"
+><H2
+CLASS="section"
+><A
+NAME="_highlevel_commands"
+>3.2.7. Highlevel commands</A
+></H2
+><DIV
+CLASS="section"
+><H3
+CLASS="section"
+><A
+NAME="_svf"
+>3.2.7.1. svf</A
+></H3
+><P
+>The SVF player operates on a single part in the scan chain. Therefore, you
+have to bring up the jtag software, specify a cable and detect the scan
+chain beforehand.</P
+><P
+>The player will establish a new instruction called "SIR" and a new register
+called "SDR". They are used internally by the respective SVF commands and are
+reassigned with new values as the player advances through the file. It is not
+recommended to use them outside of the SVF player as their content is dynamic.</P
+><P
+>An example session:</P
+><PRE
+CLASS="literallayout"
+>jtag> cable ppdev /dev/parport0 DLC5
+Initializing Xilinx DLC5 JTAG Parallel Cable III on ppdev port /dev/parport0
+jtag> detect
+IR length: 5
+Chain length: 1
+Device Id: 10010000101000100000000010010011
+ Manufacturer: Xilinx
+ Part: XC2S300E-PQ208
+ Stepping: 9
+ Filename: /usr/local/share/jtag/xilinx/xc2s300e-pq208/xc2s300e-pq208
+jtag> part <desired part of the scan chain>
+jtag> svf <SVF file for selected part>
+jtag> instruction BYPASS
+jtag> shift ir
+jtag> part <next part>
+jtag> svf <SVF file for selected part>
+jtag> instruction BYPASS
+jtag> shift ir</PRE
+><P
+>It is recommended to set the part's instruction register to BYPASS although
+most SVF files do this at the end. By setting the instruction explicitely to
+BYPASS the output of the print command will always show meaningful
+information.</P
+><P
+>The SVF player will issue messages when situations arise that cannot be
+handled. These messages are classified as warnings or errors depending on
+whether the player can continue operation (warning) or not (error).
+In case the TDO parameter of an SDR command leads to a mismatch the player
+issues a warning and continues. If the player should abort in this case then
+specify <SPAN
+CLASS="emphasis"
+><I
+CLASS="emphasis"
+>stop</I
+></SPAN
+> at the svf command.</P
+><P
+>The absence of error or warning messages indicate that the SVF file was
+executed without problems. To get a progress reporting while the player advances
+through the SVF file, specify <SPAN
+CLASS="emphasis"
+><I
+CLASS="emphasis"
+>progress</I
+></SPAN
+> at the svf command.</P
+><TABLE
+CLASS="sidebar"
+BORDER="1"
+CELLPADDING="5"
+><TR
+><TD
+><DIV
+CLASS="sidebar"
+><A
+NAME="AEN801"
+></A
+><P
+><B
+>Limitations and Deficiencies</B
+></P
+><P
+>Several limitations exist for the SVF player.</P
+><P
+>It has been tested so far with files generated by these tools:</P
+><P
+></P
+><UL
+><LI
+><P
+> Xilinx ISE WebPack 6.3.02i - 9.1.02i
+</P
+></LI
+><LI
+><P
+> Altera Quartus II 4.1sp1 - 7.0
+</P
+></LI
+></UL
+><P
+>Configuration for these devices has been tested so far:</P
+><P
+></P
+><UL
+><LI
+><P
+> Altera EPC1C12Q240
+</P
+></LI
+><LI
+><P
+> Altera MAX3032, EPM3032ALC44
+</P
+></LI
+><LI
+><P
+> Altera MAX3064, EPM3064ALC44
+</P
+></LI
+><LI
+><P
+> Altera MAX7032, EPM7032SLC44
+</P
+></LI
+><LI
+><P
+> Altera MAX7064, EPM7064SLC44, EPM7064STC44
+</P
+></LI
+><LI
+><P
+> Xilinx Spartan-IIE, XC2S300E-PQ208
+</P
+></LI
+><LI
+><P
+> Xilinx Spartan-3, XC3S1000-FG456, XC3S5000-FG900
+</P
+></LI
+></UL
+><P
+>The implementation of some SVF commands has deficiencies.</P
+><P
+></P
+><UL
+><LI
+><P
+> HIR, HDR commands not supported.
+ Their functionality should be covered by the part concept of JTAG Tools.
+</P
+></LI
+><LI
+><P
+> PIO command not supported.
+</P
+></LI
+><LI
+><P
+> PIOMAP command not supported.
+</P
+></LI
+><LI
+><P
+> RUNTEST SCK not supported.
+ The maximum time constraint is not guaranteed.
+</P
+></LI
+><LI
+><P
+> TRST
+ Parameters Z and ABSENT are not supported.
+</P
+></LI
+><LI
+><P
+> TIR, TDR commands not supported.
+ Their functionality should be covered by the part concept of JTAG Tools.
+</P
+></LI
+></UL
+><P
+>SVF files for programming flash-based devices might or might not work for a given
+setup. This has been observed for Actel IGLOO devices where success and failure
+depends on the actual clocking rate of the chosen cable.</P
+><P
+>The ref_freq=<…> option to the svf command allows to tweak the calculation
+of <SPAN
+CLASS="emphasis"
+><I
+CLASS="emphasis"
+>RUNTEST xxx SEC</I
+></SPAN
+> commands. For these commands, the SVF player needs to
+calculate the equivalent number of clocks and per default it will use the
+current cable clock frequency. This can be overridden with the ref_freq option
+that specifies a fixed reference frequency for such calculations.</P
+></DIV
+></TD
+></TR
+></TABLE
+></DIV
+><DIV
+CLASS="section"
+><H3
+CLASS="section"
+><A
+NAME="_bsdl"
+>3.2.7.2. bsdl</A
+></H3
+><P
+>The <SPAN
+CLASS="emphasis"
+><I
+CLASS="emphasis"
+>bsdl</I
+></SPAN
+> command is used to set up and test the underlying BSDL subsystem of
+UrJTAG.</P
+><P
+>Whenever <SPAN
+CLASS="emphasis"
+><I
+CLASS="emphasis"
+>detect</I
+></SPAN
+> encounters a new part, a configuration process is
+started. This involves matching the retrieved IDCODE against the part
+descriptions in /usr/share/urjtag as described above. However, before this
+database is searched for a suitable description, the BSDL subsystem is started
+and searches for BSDL file that matches this device. If it finds a matching
+file, traversal of the /usr/share/urjtag database is skipped. If not, then
+this standard process follows.</P
+><P
+>To tell the BSDL subsytem where to look for BSDL files, the <SPAN
+CLASS="emphasis"
+><I
+CLASS="emphasis"
+>bsdl path
+pathlist</I
+></SPAN
+> command has to be issued prior to <SPAN
+CLASS="emphasis"
+><I
+CLASS="emphasis"
+>detect</I
+></SPAN
+>. The contents of
+<SPAN
+CLASS="emphasis"
+><I
+CLASS="emphasis"
+>pathlist</I
+></SPAN
+> must be a semicolon-separated list of directories where BSDL files
+are located. This list is stored by <SPAN
+CLASS="emphasis"
+><I
+CLASS="emphasis"
+>bsdl path</I
+></SPAN
+> and is used lateron when
+<SPAN
+CLASS="emphasis"
+><I
+CLASS="emphasis"
+>detect</I
+></SPAN
+> calls the BSDL subsystem.</P
+><DIV
+CLASS="important"
+><P
+></P
+><TABLE
+CLASS="important"
+WIDTH="100%"
+BORDER="0"
+><TR
+><TD
+WIDTH="25"
+ALIGN="CENTER"
+VALIGN="TOP"
+><IMG
+SRC="../images/important.gif"
+HSPACE="5"
+ALT="Important"></TD
+><TD
+ALIGN="LEFT"
+VALIGN="TOP"
+><P
+>The BSDL subsystem applies the first BSDL file that parses without
+errors and that contains the correct IDCODE. Scanning the specified
+directories happens in exactly the given order. Inside a directory however,
+the order depends largely on your filesystem's behavior.</P
+></TD
+></TR
+></TABLE
+></DIV
+><P
+>Further details of the <SPAN
+CLASS="emphasis"
+><I
+CLASS="emphasis"
+>bsdl</I
+></SPAN
+> command:</P
+><P
+></P
+><UL
+><LI
+><P
+> bsdl path <path1>[;<path2>[;<pathN>]]
+ set paths for locating BSDL files
+</P
+></LI
+><LI
+><P
+> bsdl debug on|off
+ switches debug messages on or off
+</P
+></LI
+><LI
+><P
+> bsdl test [file]
+ reads file (if specified) or all files found via <SPAN
+CLASS="emphasis"
+><I
+CLASS="emphasis"
+>bsdl path</I
+></SPAN
+> and
+ prints a short status, an active part is not required
+</P
+></LI
+><LI
+><P
+> bsdl dump [file]
+ reads file (if specified) or all files found via <SPAN
+CLASS="emphasis"
+><I
+CLASS="emphasis"
+>bsdl path</I
+></SPAN
+> and
+ prints all configuration commands, an active part is not required
+</P
+></LI
+></UL
+><DIV
+CLASS="tip"
+><P
+></P
+><TABLE
+CLASS="tip"
+WIDTH="100%"
+BORDER="0"
+><TR
+><TD
+WIDTH="25"
+ALIGN="CENTER"
+VALIGN="TOP"
+><IMG
+SRC="../images/tip.gif"
+HSPACE="5"
+ALT="Tip"></TD
+><TD
+ALIGN="LEFT"
+VALIGN="TOP"
+><P
+>The <SPAN
+CLASS="emphasis"
+><I
+CLASS="emphasis"
+>bsdl dump file</I
+></SPAN
+> command implements the same functionality as
+bsdl2jtag.</P
+></TD
+></TR
+></TABLE
+></DIV
+></DIV
+></DIV
+><DIV
+CLASS="section"
+><H2
+CLASS="section"
+><A
+NAME="_unsupported_commands"
+>3.2.8. Unsupported commands</A
+></H2
+><DIV
+CLASS="section"
+><H3
+CLASS="section"
+><A
+NAME="_script"
+>3.2.8.1. script</A
+></H3
+><P
+>Although it's still there, its functionality has been merged into the include
+command. Please use "include" instead.</P
+></DIV
+><DIV
+CLASS="section"
+><H3
+CLASS="section"
+><A
+NAME="_setdevice"
+>3.2.8.2. setdevice</A
+></H3
+><P
+>This command was only there to support the SHARC 21065L processor,
+which has no IDCODE and therefore can't be initialized correctly by
+just running "detect". However, the proper initialization can be done
+after "detect" by loading the proper declarations and bus driver manually:</P
+><PRE
+CLASS="literallayout"
+>jtag> include analog/sharc21065l/sharc21065l</PRE
+></DIV
+><DIV
+CLASS="section"
+><H3
+CLASS="section"
+><A
+NAME="_spiflashmem"
+>3.2.8.3. spiflashmem</A
+></H3
+><P
+>The commands "spidetectflash", "spiflashmem", "spireadflash" and
+"spieraseflash" only exist in a version of the JTAG tools copyrighted by
+Intratrade Ltd., we just know about them from a posting on the net.</P
+></DIV
+></DIV
+></DIV
+><DIV
+CLASS="NAVFOOTER"
+><HR
+ALIGN="LEFT"
+WIDTH="100%"><TABLE
+SUMMARY="Footer navigation table"
+WIDTH="100%"
+BORDER="0"
+CELLPADDING="0"
+CELLSPACING="0"
+><TR
+><TD
+WIDTH="33%"
+ALIGN="left"
+VALIGN="top"
+><A
+HREF="_usage.html"
+ACCESSKEY="P"
+>Prev</A
+></TD
+><TD
+WIDTH="34%"
+ALIGN="center"
+VALIGN="top"
+><A
+HREF="index.html"
+ACCESSKEY="H"
+>Home</A
+></TD
+><TD
+WIDTH="33%"
+ALIGN="right"
+VALIGN="top"
+><A
+HREF="_internals.html"
+ACCESSKEY="N"
+>Next</A
+></TD
+></TR
+><TR
+><TD
+WIDTH="33%"
+ALIGN="left"
+VALIGN="top"
+>Usage</TD
+><TD
+WIDTH="34%"
+ALIGN="center"
+VALIGN="top"
+><A
+HREF="_usage.html"
+ACCESSKEY="U"
+>Up</A
+></TD
+><TD
+WIDTH="33%"
+ALIGN="right"
+VALIGN="top"
+>Internals</TD
+></TR
+></TABLE
+></DIV
+></BODY
+></HTML
+>
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+<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN""http://www.w3.org/TR/html4/loose.dtd">
+<HTML
+><HEAD
+><TITLE
+>Licensing</TITLE
+><META
+NAME="GENERATOR"
+CONTENT="Modular DocBook HTML Stylesheet Version 1.79"><LINK
+REL="HOME"
+TITLE="Universal JTAG library, server and tools"
+HREF="index.html"><LINK
+REL="PREVIOUS"
+TITLE="F.A.Q."
+HREF="_f_a_q.html"><LINK
+REL="NEXT"
+TITLE="GNU Free Documentation License (FDL)"
+HREF="_gnu_free_documentation_license_fdl.html"><LINK
+REL="STYLESHEET"
+TYPE="text/css"
+HREF="UrJTAG.css"></HEAD
+><BODY
+CLASS="chapter"
+BGCOLOR="#FFFFFF"
+TEXT="#000000"
+LINK="#0000FF"
+VLINK="#840084"
+ALINK="#0000FF"
+><DIV
+CLASS="NAVHEADER"
+><TABLE
+SUMMARY="Header navigation table"
+WIDTH="100%"
+BORDER="0"
+CELLPADDING="0"
+CELLSPACING="0"
+><TR
+><TH
+COLSPAN="3"
+ALIGN="center"
+>Universal JTAG library, server and tools</TH
+></TR
+><TR
+><TD
+WIDTH="10%"
+ALIGN="left"
+VALIGN="bottom"
+><A
+HREF="_f_a_q.html"
+ACCESSKEY="P"
+>Prev</A
+></TD
+><TD
+WIDTH="80%"
+ALIGN="center"
+VALIGN="bottom"
+></TD
+><TD
+WIDTH="10%"
+ALIGN="right"
+VALIGN="bottom"
+><A
+HREF="_gnu_free_documentation_license_fdl.html"
+ACCESSKEY="N"
+>Next</A
+></TD
+></TR
+></TABLE
+><HR
+ALIGN="LEFT"
+WIDTH="100%"></DIV
+><DIV
+CLASS="chapter"
+><H1
+><A
+NAME="_licensing"
+></A
+>Chapter 6. Licensing</H1
+><DIV
+CLASS="section"
+><H1
+CLASS="section"
+><A
+NAME="_overview_2"
+>6.1. Overview</A
+></H1
+><P
+>Various licenses are used for the UrJTAG project. The GPL is used for most
+of the code except for some include files, JIM, and cable driver source, where
+a BSD or MIT license is used; this is noted in the file headers.</P
+></DIV
+></DIV
+><DIV
+CLASS="NAVFOOTER"
+><HR
+ALIGN="LEFT"
+WIDTH="100%"><TABLE
+SUMMARY="Footer navigation table"
+WIDTH="100%"
+BORDER="0"
+CELLPADDING="0"
+CELLSPACING="0"
+><TR
+><TD
+WIDTH="33%"
+ALIGN="left"
+VALIGN="top"
+><A
+HREF="_f_a_q.html"
+ACCESSKEY="P"
+>Prev</A
+></TD
+><TD
+WIDTH="34%"
+ALIGN="center"
+VALIGN="top"
+><A
+HREF="index.html"
+ACCESSKEY="H"
+>Home</A
+></TD
+><TD
+WIDTH="33%"
+ALIGN="right"
+VALIGN="top"
+><A
+HREF="_gnu_free_documentation_license_fdl.html"
+ACCESSKEY="N"
+>Next</A
+></TD
+></TR
+><TR
+><TD
+WIDTH="33%"
+ALIGN="left"
+VALIGN="top"
+>F.A.Q.</TD
+><TD
+WIDTH="34%"
+ALIGN="center"
+VALIGN="top"
+> </TD
+><TD
+WIDTH="33%"
+ALIGN="right"
+VALIGN="top"
+>GNU Free Documentation License (FDL)</TD
+></TR
+></TABLE
+></DIV
+></BODY
+></HTML
+>
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+<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN""http://www.w3.org/TR/html4/loose.dtd">
+<HTML
+><HEAD
+><TITLE
+>System requirements</TITLE
+><META
+NAME="GENERATOR"
+CONTENT="Modular DocBook HTML Stylesheet Version 1.79"><LINK
+REL="HOME"
+TITLE="Universal JTAG library, server and tools"
+HREF="index.html"><LINK
+REL="UP"
+TITLE="General"
+HREF="_general.html"><LINK
+REL="PREVIOUS"
+TITLE="UrJTAG"
+HREF="_urjtag.html"><LINK
+REL="NEXT"
+TITLE="Compilation and installation"
+HREF="_compilation_and_installation.html"><LINK
+REL="STYLESHEET"
+TYPE="text/css"
+HREF="UrJTAG.css"></HEAD
+><BODY
+CLASS="section"
+BGCOLOR="#FFFFFF"
+TEXT="#000000"
+LINK="#0000FF"
+VLINK="#840084"
+ALINK="#0000FF"
+><DIV
+CLASS="NAVHEADER"
+><TABLE
+SUMMARY="Header navigation table"
+WIDTH="100%"
+BORDER="0"
+CELLPADDING="0"
+CELLSPACING="0"
+><TR
+><TH
+COLSPAN="3"
+ALIGN="center"
+>Universal JTAG library, server and tools</TH
+></TR
+><TR
+><TD
+WIDTH="10%"
+ALIGN="left"
+VALIGN="bottom"
+><A
+HREF="_urjtag.html"
+ACCESSKEY="P"
+>Prev</A
+></TD
+><TD
+WIDTH="80%"
+ALIGN="center"
+VALIGN="bottom"
+>Chapter 2. General</TD
+><TD
+WIDTH="10%"
+ALIGN="right"
+VALIGN="bottom"
+><A
+HREF="_compilation_and_installation.html"
+ACCESSKEY="N"
+>Next</A
+></TD
+></TR
+></TABLE
+><HR
+ALIGN="LEFT"
+WIDTH="100%"></DIV
+><DIV
+CLASS="section"
+><H1
+CLASS="section"
+><A
+NAME="_system_requirements"
+>2.3. System requirements</A
+></H1
+><DIV
+CLASS="section"
+><H2
+CLASS="section"
+><A
+NAME="_supported_host_operating_systems"
+>2.3.1. Supported host operating systems</A
+></H2
+><P
+>JTAG Tools should run on all Unix like operating systems including MS Windows
+with Cygwin installed.</P
+></DIV
+><DIV
+CLASS="section"
+><H2
+CLASS="section"
+><A
+NAME="_required_software_for_running_urjtag"
+>2.3.2. Required software for running UrJTAG</A
+></H2
+><P
+>Required only for MS Windows:</P
+><P
+></P
+><UL
+><LI
+><P
+> current Cygwin net installation from <A
+HREF="http://cygwin.com"
+TARGET="_top"
+>http://cygwin.com</A
+>
+</P
+></LI
+><LI
+><P
+> ioperm package (a part of the standard Cygwin net installation)
+</P
+></LI
+></UL
+><P
+>It may be necessary to run the command "ioperm -i" to install the IOPERM.SYS
+driver in the system.</P
+><P
+>If UrJTAG was compiled to use the readline library, it has to be present on
+the system as well. It's probably a standard part of your distribution.</P
+><P
+>More software is needed if you want to compile UrJTAG (which you probably want
+because currently no pre-compiled binaries are avaible…). See "Installation"
+below.</P
+></DIV
+><DIV
+CLASS="section"
+><H2
+CLASS="section"
+><A
+NAME="_supported_jtag_adapters_cables"
+>2.3.3. Supported JTAG adapters/cables</A
+></H2
+><P
+>See <SPAN
+CLASS="emphasis"
+><I
+CLASS="emphasis"
+>help cable</I
+></SPAN
+> command for up-to-date info.</P
+><P
+>Parallel-port cables:</P
+><P
+></P
+><UL
+><LI
+><P
+> Arcom JTAG Cable
+</P
+></LI
+><LI
+><P
+> Altera ByteBlaster/ByteBlaster II/ByteBlasterMV Parallel Port Download Cable
+</P
+></LI
+><LI
+><P
+> Xilinx DLC5 JTAG Parallel Cable III
+</P
+></LI
+><LI
+><P
+> ETC EA253 JTAG Cable
+</P
+></LI
+><LI
+><P
+> ETC EI012 JTAG Cable
+</P
+></LI
+><LI
+><P
+> Ka-Ro TRITON (PXA255/250) JTAG Cable
+</P
+></LI
+><LI
+><P
+> Keith &amp; Koep JTAG Cable
+</P
+></LI
+><LI
+><P
+> Lattice Parallel Port JTAG Cable
+</P
+></LI
+><LI
+><P
+> Mpcbdm JTAG Cable
+</P
+></LI
+><LI
+><P
+> Macraigor Wiggler JTAG Cable
+</P
+></LI
+></UL
+><P
+>FT2232-based USB cables:</P
+><P
+></P
+><UL
+><LI
+><P
+> Amontec JTAGkey
+</P
+></LI
+><LI
+><P
+> Amontec JTAGkey-Tiny (supported as cable "JTAGkey")
+</P
+></LI
+><LI
+><P
+> KrisTech UsbScarab2 ARM JTAG <A
+HREF="http://www.kristech.eu/"
+TARGET="_top"
+>http://www.kristech.eu/</A
+>
+</P
+></LI
+><LI
+><P
+> Olimex ARM-USB-JTAG
+</P
+></LI
+><LI
+><P
+> Olimex ARM-USB-TINY
+</P
+></LI
+><LI
+><P
+> OOCDLink-s (experimental) <A
+HREF="http://www.joernonline.de/dw/doku.php?id=projects:oocdlink:2_oocdlinks"
+TARGET="_top"
+>http://www.joernonline.de/dw/doku.php?id=projects:oocdlink:2_oocdlinks</A
+>
+</P
+></LI
+><LI
+><P
+> Other FT2232-based USB JTAG cables (experimental)
+</P
+></LI
+><LI
+><P
+> TinCanTools Flyswatter
+</P
+></LI
+><LI
+><P
+> Turtelizer 2 (experimental) <A
+HREF="http://www.ethernut.de/en/hardware/turtelizer/"
+TARGET="_top"
+>http://www.ethernut.de/en/hardware/turtelizer/</A
+>
+</P
+></LI
+><LI
+><P
+> USB to JTAG Interface (experimental)
+</P
+></LI
+><LI
+><P
+> <A
+HREF="http://www.hs-augsburg.de/~hhoegl/proj/usbjtag/usbjtag.html"
+TARGET="_top"
+>http://www.hs-augsburg.de/~hhoegl/proj/usbjtag/usbjtag.html</A
+>
+</P
+></LI
+><LI
+><P
+> Black gnICE <A
+HREF="http://docs.blackfin.uclinux.org/doku.php?id=hw:jtag:gnice"
+TARGET="_top"
+>http://docs.blackfin.uclinux.org/doku.php?id=hw:jtag:gnice</A
+>
+</P
+></LI
+><LI
+><P
+> Xverve Signalyzer Tool (experimental)
+</P
+></LI
+></UL
+><P
+>Other USB cables:</P
+><P
+></P
+><UL
+><LI
+><P
+> Altera USB-Blaster and compatible <A
+HREF="http://www.ixo.de/info/usb_jtag"
+TARGET="_top"
+>http://www.ixo.de/info/usb_jtag</A
+>
+</P
+></LI
+><LI
+><P
+> Segger/IAR J-Link / Atmel SAM-ICE (experimental, work in progress)
+</P
+></LI
+><LI
+><P
+> Xilinx Platform USB Cable / DLC9 (slow, experimental, work in progress - don't use)
+</P
+></LI
+></UL
+><P
+>Other cables:
+ * Technologic Systems TS-7800 SoC GPIO builtin JTAG interface</P
+></DIV
+><DIV
+CLASS="section"
+><H2
+CLASS="section"
+><A
+NAME="_jtag_aware_parts_chips"
+>2.3.4. JTAG-aware parts (chips)</A
+></H2
+><P
+>The data/ directory of the UrJTAG installation has some more, but at
+least the following are supported:</P
+><P
+></P
+><UL
+><LI
+><P
+> Altera EP1C20F400
+</P
+></LI
+><LI
+><P
+> Altera MAX7000 (w/ BSDL)
+</P
+></LI
+><LI
+><P
+> Altera EPM7128AETC100
+</P
+></LI
+><LI
+><P
+> Altera Cyclone I & II (w/ BSDL)
+</P
+></LI
+><LI
+><P
+> Analog Devices Sharc-21065L
+</P
+></LI
+><LI
+><P
+> Atmel ATmega128 (partial support)
+</P
+></LI
+><LI
+><P
+> Atmel AT32AP7000 (partial support)
+</P
+></LI
+><LI
+><P
+> Broadcom BCM1250
+</P
+></LI
+><LI
+><P
+> Broadcom BCM3310 (partial support)
+</P
+></LI
+><LI
+><P
+> Broadcom BCM5421S
+</P
+></LI
+><LI
+><P
+> Broadcom BCM4712 (partial support)
+</P
+></LI
+><LI
+><P
+> DEC SA1100
+</P
+></LI
+><LI
+><P
+> Hitachi HD64465
+</P
+></LI
+><LI
+><P
+> Hitachi SH7727
+</P
+></LI
+><LI
+><P
+> Hitachi SH7729
+</P
+></LI
+><LI
+><P
+> IBM PowerPC 440GX
+</P
+></LI
+><LI
+><P
+> Intel IXP425
+</P
+></LI
+><LI
+><P
+> Intel SA1110
+</P
+></LI
+><LI
+><P
+> Intel PXA250/PXA255/PXA260/PXA261/PXA262/PXA263
+</P
+></LI
+><LI
+><P
+> Lattice LC4032V
+</P
+></LI
+><LI
+><P
+> Lattice M4A3-64/32
+</P
+></LI
+><LI
+><P
+> Lattice M4A3-256/192
+</P
+></LI
+><LI
+><P
+> Motorola MPC8245
+</P
+></LI
+><LI
+><P
+> Samsung S3C4510B
+</P
+></LI
+><LI
+><P
+> Sharp LH7A400
+</P
+></LI
+><LI
+><P
+> Toshiba TX4925/TX4926
+</P
+></LI
+><LI
+><P
+> Xilinx XC2C256-TQ144
+</P
+></LI
+><LI
+><P
+> Xilinx XCR3032XL-VQ44
+</P
+></LI
+><LI
+><P
+> Xilinx XCR3128XL-CS144
+</P
+></LI
+><LI
+><P
+> Xilinx XCR3128XL-VQ100
+</P
+></LI
+><LI
+><P
+> Xilinx XCR3256XL-FT256
+</P
+></LI
+><LI
+><P
+> Xilinx Spartan-IIE
+</P
+></LI
+><LI
+><P
+> Xilinx Spartan-3/E
+</P
+></LI
+><LI
+><P
+> Xilinx Spartan-3AN
+</P
+></LI
+></UL
+></DIV
+><DIV
+CLASS="section"
+><H2
+CLASS="section"
+><A
+NAME="_flash_chips"
+>2.3.5. Flash chips</A
+></H2
+><DIV
+CLASS="note"
+><P
+></P
+><TABLE
+CLASS="note"
+WIDTH="100%"
+BORDER="0"
+><TR
+><TD
+WIDTH="25"
+ALIGN="CENTER"
+VALIGN="TOP"
+><IMG
+SRC="../images/note.gif"
+HSPACE="5"
+ALT="Note"></TD
+><TD
+ALIGN="LEFT"
+VALIGN="TOP"
+><P
+>Not all chips are supported in every possible configuration, there may
+be untested combinations of chip type, bus width, …</P
+></TD
+></TR
+></TABLE
+></DIV
+><P
+></P
+><UL
+><LI
+><P
+> Intel 28FxxxJ3A (28F320J3A, 28F640J3A, 28F128J3A)
+</P
+></LI
+><LI
+><P
+> Intel 28FxxxK3 (28F640K3, 28F128K3, 28F256K3)
+</P
+></LI
+><LI
+><P
+> Intel 28FxxxK18 (28F640K18, 28F128K18, 28F256K18)
+</P
+></LI
+><LI
+><P
+> AMD Am29LV64xD (Am29LV640D, Am29LV641D, Am29LV642D)
+</P
+></LI
+><LI
+><P
+> AMD Am29xx040B (Am29F040B, Am29LV040B)
+</P
+></LI
+></UL
+><P
+>UrJTAG uses the multi-byte write mode if supported by the particular flash
+device. The flash code will automatically switch to this algorithm if the
+Device Geometry Definition reports that more than one memory location can be
+written in a single step (refer to CFI details shown by <SPAN
+CLASS="emphasis"
+><I
+CLASS="emphasis"
+>detectflash</I
+></SPAN
+>). Since
+multiple locations are written in a burst-like manner with only one polling
+sequence afterwards, the overall flashing performance increases by factor of
+5-17.</P
+><P
+>In case you encounter any issues with the multi-byte write mode, run configure
+with the <SPAN
+CLASS="emphasis"
+><I
+CLASS="emphasis"
+>—disable-flash-multi-byte</I
+></SPAN
+> option and re-compile to disable this
+algorithm.</P
+></DIV
+></DIV
+><DIV
+CLASS="NAVFOOTER"
+><HR
+ALIGN="LEFT"
+WIDTH="100%"><TABLE
+SUMMARY="Footer navigation table"
+WIDTH="100%"
+BORDER="0"
+CELLPADDING="0"
+CELLSPACING="0"
+><TR
+><TD
+WIDTH="33%"
+ALIGN="left"
+VALIGN="top"
+><A
+HREF="_urjtag.html"
+ACCESSKEY="P"
+>Prev</A
+></TD
+><TD
+WIDTH="34%"
+ALIGN="center"
+VALIGN="top"
+><A
+HREF="index.html"
+ACCESSKEY="H"
+>Home</A
+></TD
+><TD
+WIDTH="33%"
+ALIGN="right"
+VALIGN="top"
+><A
+HREF="_compilation_and_installation.html"
+ACCESSKEY="N"
+>Next</A
+></TD
+></TR
+><TR
+><TD
+WIDTH="33%"
+ALIGN="left"
+VALIGN="top"
+>UrJTAG</TD
+><TD
+WIDTH="34%"
+ALIGN="center"
+VALIGN="top"
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+HREF="_general.html"
+ACCESSKEY="U"
+>Up</A
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+WIDTH="33%"
+ALIGN="right"
+VALIGN="top"
+>Compilation and installation</TD
+></TR
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+></BODY
+></HTML
+>
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+<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN""http://www.w3.org/TR/html4/loose.dtd">
+<HTML
+><HEAD
+><TITLE
+>UrJTAG</TITLE
+><META
+NAME="GENERATOR"
+CONTENT="Modular DocBook HTML Stylesheet Version 1.79"><LINK
+REL="HOME"
+TITLE="Universal JTAG library, server and tools"
+HREF="index.html"><LINK
+REL="UP"
+TITLE="General"
+HREF="_general.html"><LINK
+REL="PREVIOUS"
+TITLE="General"
+HREF="_general.html"><LINK
+REL="NEXT"
+TITLE="System requirements"
+HREF="_system_requirements.html"><LINK
+REL="STYLESHEET"
+TYPE="text/css"
+HREF="UrJTAG.css"></HEAD
+><BODY
+CLASS="section"
+BGCOLOR="#FFFFFF"
+TEXT="#000000"
+LINK="#0000FF"
+VLINK="#840084"
+ALINK="#0000FF"
+><DIV
+CLASS="NAVHEADER"
+><TABLE
+SUMMARY="Header navigation table"
+WIDTH="100%"
+BORDER="0"
+CELLPADDING="0"
+CELLSPACING="0"
+><TR
+><TH
+COLSPAN="3"
+ALIGN="center"
+>Universal JTAG library, server and tools</TH
+></TR
+><TR
+><TD
+WIDTH="10%"
+ALIGN="left"
+VALIGN="bottom"
+><A
+HREF="_general.html"
+ACCESSKEY="P"
+>Prev</A
+></TD
+><TD
+WIDTH="80%"
+ALIGN="center"
+VALIGN="bottom"
+>Chapter 2. General</TD
+><TD
+WIDTH="10%"
+ALIGN="right"
+VALIGN="bottom"
+><A
+HREF="_system_requirements.html"
+ACCESSKEY="N"
+>Next</A
+></TD
+></TR
+></TABLE
+><HR
+ALIGN="LEFT"
+WIDTH="100%"></DIV
+><DIV
+CLASS="section"
+><H1
+CLASS="section"
+><A
+NAME="_urjtag"
+>2.2. UrJTAG</A
+></H1
+><DIV
+CLASS="section"
+><H2
+CLASS="section"
+><A
+NAME="_introduction_2"
+>2.2.1. Introduction</A
+></H2
+><P
+>UrJTAG Tools is a software package which enables working with JTAG-aware (IEEE
+1149.1) hardware devices (parts) and boards through JTAG adapter.</P
+><P
+>This package has open and modular architecture with ability to write
+miscellaneous extensions (like board testers, flash memory programmers, and so
+on).</P
+><P
+>JTAG Tools package is free software, covered by the GNU General Public License,
+and you are welcome to change it and/or distribute copies of it under certain
+conditions. There is absolutely no warranty for JTAG Tools. Please read
+COPYING file for more info.</P
+><DIV
+CLASS="warning"
+><P
+></P
+><TABLE
+CLASS="warning"
+WIDTH="100%"
+BORDER="0"
+><TR
+><TD
+WIDTH="25"
+ALIGN="CENTER"
+VALIGN="TOP"
+><IMG
+SRC="../images/warning.gif"
+HSPACE="5"
+ALT="Warning"></TD
+><TD
+ALIGN="LEFT"
+VALIGN="TOP"
+><P
+>This software may damage your hardware!</P
+></TD
+></TR
+></TABLE
+></DIV
+><P
+>Feedback and contributions are welcome.</P
+></DIV
+><DIV
+CLASS="section"
+><H2
+CLASS="section"
+><A
+NAME="_about_this_document"
+>2.2.2. About this document</A
+></H2
+><P
+>This documentation is far from being complete. You're encouraged to amend and
+supplement it and submit your changes in the Bugs or Enhancements tracker
+at the UrJTAG website.</P
+></DIV
+><DIV
+CLASS="section"
+><H2
+CLASS="section"
+><A
+NAME="_urjtag_website"
+>2.2.3. UrJTAG Website</A
+></H2
+><P
+>The most current version of this documentation and UrJTAG sourcecode
+is always available from the project homepage at <A
+HREF="http://www.urjtag.org"
+TARGET="_top"
+>http://www.urjtag.org</A
+></P
+></DIV
+><DIV
+CLASS="section"
+><H2
+CLASS="section"
+><A
+NAME="_the_name_urjtag"
+>2.2.4. The name "UrJTAG"</A
+></H2
+><P
+>I (Kolja) favour short names, so I thought about adding only a few
+letters to "JTAG". The prefix "Ur" in German means "ancestral", an "Ur-Vater"
+is a forefather. UrJTAG shall become the forefather, the prototype for many
+other JTAG tools. By mere chance the "Ur" is also another name for an aurochs,
+an animal similar to the GNU…</P
+></DIV
+><DIV
+CLASS="section"
+><H2
+CLASS="section"
+><A
+NAME="_authors_contributors_8230_thanks"
+>2.2.5. Authors, contributors, … thanks</A
+></H2
+><P
+>A list of contributors is maintained in the file THANKS in the source
+distribution. Special thanks go to Marcel Telka, who actually "invented" the
+JTAG tools and wrote most of this basis of UrJTAG, and Arnim Laeuger for his
+continuous support and development of SVF and BSDL subsystem and FT2232
+drivers.</P
+></DIV
+><DIV
+CLASS="section"
+><H2
+CLASS="section"
+><A
+NAME="_urjtag_and_openwince_jtag_tools"
+>2.2.6. UrJTAG and openwince JTAG Tools</A
+></H2
+><P
+>The JTAG Tools originally were developed by Marcel Telka as part of
+the openwince project. Still a large portion of the source code is his work.
+However, the last release of the JTAG tools was version 0.5.1 in 2003. After a
+few years the development completely stalled. Every few months or so on the
+project's mailing list someone asked about continuing, but a critical mass
+wasn't reached before late 2007. A fork of the JTAG tools was created under the
+wings of the UrJTAG project at Sourceforge.</P
+></DIV
+></DIV
+><DIV
+CLASS="NAVFOOTER"
+><HR
+ALIGN="LEFT"
+WIDTH="100%"><TABLE
+SUMMARY="Footer navigation table"
+WIDTH="100%"
+BORDER="0"
+CELLPADDING="0"
+CELLSPACING="0"
+><TR
+><TD
+WIDTH="33%"
+ALIGN="left"
+VALIGN="top"
+><A
+HREF="_general.html"
+ACCESSKEY="P"
+>Prev</A
+></TD
+><TD
+WIDTH="34%"
+ALIGN="center"
+VALIGN="top"
+><A
+HREF="index.html"
+ACCESSKEY="H"
+>Home</A
+></TD
+><TD
+WIDTH="33%"
+ALIGN="right"
+VALIGN="top"
+><A
+HREF="_system_requirements.html"
+ACCESSKEY="N"
+>Next</A
+></TD
+></TR
+><TR
+><TD
+WIDTH="33%"
+ALIGN="left"
+VALIGN="top"
+>General</TD
+><TD
+WIDTH="34%"
+ALIGN="center"
+VALIGN="top"
+><A
+HREF="_general.html"
+ACCESSKEY="U"
+>Up</A
+></TD
+><TD
+WIDTH="33%"
+ALIGN="right"
+VALIGN="top"
+>System requirements</TD
+></TR
+></TABLE
+></DIV
+></BODY
+></HTML
+>
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+<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN""http://www.w3.org/TR/html4/loose.dtd">
+<HTML
+><HEAD
+><TITLE
+>Usage</TITLE
+><META
+NAME="GENERATOR"
+CONTENT="Modular DocBook HTML Stylesheet Version 1.79"><LINK
+REL="HOME"
+TITLE="Universal JTAG library, server and tools"
+HREF="index.html"><LINK
+REL="PREVIOUS"
+TITLE="Compilation and installation"
+HREF="_compilation_and_installation.html"><LINK
+REL="NEXT"
+TITLE="JTAG commands"
+HREF="_jtag_commands.html"><LINK
+REL="STYLESHEET"
+TYPE="text/css"
+HREF="UrJTAG.css"></HEAD
+><BODY
+CLASS="chapter"
+BGCOLOR="#FFFFFF"
+TEXT="#000000"
+LINK="#0000FF"
+VLINK="#840084"
+ALINK="#0000FF"
+><DIV
+CLASS="NAVHEADER"
+><TABLE
+SUMMARY="Header navigation table"
+WIDTH="100%"
+BORDER="0"
+CELLPADDING="0"
+CELLSPACING="0"
+><TR
+><TH
+COLSPAN="3"
+ALIGN="center"
+>Universal JTAG library, server and tools</TH
+></TR
+><TR
+><TD
+WIDTH="10%"
+ALIGN="left"
+VALIGN="bottom"
+><A
+HREF="_compilation_and_installation.html"
+ACCESSKEY="P"
+>Prev</A
+></TD
+><TD
+WIDTH="80%"
+ALIGN="center"
+VALIGN="bottom"
+></TD
+><TD
+WIDTH="10%"
+ALIGN="right"
+VALIGN="bottom"
+><A
+HREF="_jtag_commands.html"
+ACCESSKEY="N"
+>Next</A
+></TD
+></TR
+></TABLE
+><HR
+ALIGN="LEFT"
+WIDTH="100%"></DIV
+><DIV
+CLASS="chapter"
+><H1
+><A
+NAME="_usage"
+></A
+>Chapter 3. Usage</H1
+><DIV
+CLASS="section"
+><H1
+CLASS="section"
+><A
+NAME="_quick_start"
+>3.1. Quick start</A
+></H1
+><DIV
+CLASS="section"
+><H2
+CLASS="section"
+><A
+NAME="_run_the_software"
+>3.1.1. Run the software</A
+></H2
+><P
+>Connect your JTAG adapter between your PC and target device and turn
+on your device.</P
+><P
+>To run JTAG Tools type "jtag" and press Enter. jtag should start and
+display some initial informations. Output should end with line like this:</P
+><PRE
+CLASS="literallayout"
+>This is "jtag command prompt". Type "help" and press Enter for initial help
+about available commands. To exit JTAG Tools type "quit" and press Enter.</PRE
+></DIV
+><DIV
+CLASS="section"
+><H2
+CLASS="section"
+><A
+NAME="_configure_the_cable"
+>3.1.2. Configure the cable</A
+></H2
+><P
+>Type "help cable" for list of supported JTAG cables.</P
+><P
+>Type "cable" command followed by the cable name and possibly further
+arguments for cable configuration. Example:</P
+><PRE
+CLASS="literallayout"
+>jtag> cable EA253 parallel 0x378
+Initializing ETC EA253 JTAG Cable on parallel port at 0x378</PRE
+><P
+>See the section about the "cable" command for details and USB support.</P
+></DIV
+><DIV
+CLASS="section"
+><H2
+CLASS="section"
+><A
+NAME="_detect_parts_on_the_jtag_chain"
+>3.1.3. Detect parts on the JTAG chain</A
+></H2
+><P
+>Type "detect" at the jtag command prompt:</P
+><PRE
+CLASS="literallayout"
+>jtag> detect</PRE
+><P
+>Your output should look like this:</P
+><PRE
+CLASS="literallayout"
+>IR length: 5
+Chain length: 1
+Device Id: 01011001001001100100000000010011
+ Manufacturer: Intel
+ Part: PXA250
+ Stepping: C0
+ Filename: /usr/local/share/urjtag/intel/pxa250/pxa250c0</PRE
+><P
+>If you get empty output or an error message your JTAG adapter is not connected
+properly, or your target board doesn't work, or it is turned off.</P
+><P
+>The "detect" command is required before all other commands.</P
+></DIV
+><DIV
+CLASS="section"
+><H2
+CLASS="section"
+><A
+NAME="_print_current_jtag_chain_status"
+>3.1.4. Print current JTAG chain status</A
+></H2
+><PRE
+CLASS="literallayout"
+>jtag> print chain
+ No. Manufacturer Part Stepping Instruction Register
+---------------------------------------------------------
+ 0 Intel PXA250 C0 BYPASS BR</PRE
+></DIV
+><DIV
+CLASS="section"
+><H2
+CLASS="section"
+><A
+NAME="_sample_device_pin_status"
+>3.1.5. Sample device pin status</A
+></H2
+><PRE
+CLASS="literallayout"
+>jtag> instruction SAMPLE/PRELOAD
+jtag> shift ir
+jtag> shift dr
+jtag> dr
+1000110010000010000110010111111111111111111001101110...
+jtag> print chain
+ No. Manufacturer Part Stepping Instruction Register
+------------------------------------------------------------
+ 0 Intel PXA250 C0 SAMPLE/PRELOAD BSR
+jtag> get signal BOOT_SEL[0]
+BOOT_SEL[0] = 0
+jtag></PRE
+><PRE
+CLASS="literallayout"
+>Note: BSR is "Boundary Scan Register"</PRE
+></DIV
+><DIV
+CLASS="section"
+><H2
+CLASS="section"
+><A
+NAME="_burn_flash_connected_to_the_part"
+>3.1.6. Burn flash connected to the part</A
+></H2
+><PRE
+CLASS="literallayout"
+>jtag> flashmem 0 brux.b
+0x00000000
+Note: Supported configuration is 2 x 16 bit only
+BOOT_SEL: Asynchronous 32-bit ROM</PRE
+><PRE
+CLASS="literallayout"
+>2 x 16 bit CFI devices detected (QRY ok)!</PRE
+><PRE
+CLASS="literallayout"
+>program:
+block 0 unlocked
+erasing block 0: 0
+addr: 0x00002854
+verify:
+addr: 0x00002854
+Done.
+jtag></PRE
+><P
+>or:</P
+><PRE
+CLASS="literallayout"
+>jtag> flashmem msbin xboot.bin
+Note: Supported configuration is 2 x 16 bit only
+BOOT_SEL: Asynchronous 32-bit ROM</PRE
+><PRE
+CLASS="literallayout"
+>2 x 16 bit CFI devices detected (QRY ok)!</PRE
+><PRE
+CLASS="literallayout"
+>block 0 unlocked
+erasing block 0: 0
+program:
+record: start = 0x00000000, len = 0x00000004, checksum = 0x000001EB
+record: start = 0x00000040, len = 0x00000008, checksum = 0x000001B0
+record: start = 0x00001000, len = 0x00002B30, checksum = 0x00122CAB
+record: start = 0x00004000, len = 0x00000160, checksum = 0x0000684B
+record: start = 0x00005000, len = 0x00000054, checksum = 0x000008EE
+record: start = 0x00005054, len = 0x00000030, checksum = 0x00000DA9
+record: start = 0x00000000, len = 0x00001000, checksum = 0x00000000</PRE
+><PRE
+CLASS="literallayout"
+>verify:
+record: start = 0x00000000, len = 0x00000004, checksum = 0x000001EB
+record: start = 0x00000040, len = 0x00000008, checksum = 0x000001B0
+record: start = 0x00001000, len = 0x00002B30, checksum = 0x00122CAB
+record: start = 0x00004000, len = 0x00000160, checksum = 0x0000684B
+record: start = 0x00005000, len = 0x00000054, checksum = 0x000008EE
+record: start = 0x00005054, len = 0x00000030, checksum = 0x00000DA9
+record: start = 0x00000000, len = 0x00001000, checksum = 0x00000000</PRE
+><PRE
+CLASS="literallayout"
+>Done.
+jtag></PRE
+></DIV
+></DIV
+></DIV
+><DIV
+CLASS="NAVFOOTER"
+><HR
+ALIGN="LEFT"
+WIDTH="100%"><TABLE
+SUMMARY="Footer navigation table"
+WIDTH="100%"
+BORDER="0"
+CELLPADDING="0"
+CELLSPACING="0"
+><TR
+><TD
+WIDTH="33%"
+ALIGN="left"
+VALIGN="top"
+><A
+HREF="_compilation_and_installation.html"
+ACCESSKEY="P"
+>Prev</A
+></TD
+><TD
+WIDTH="34%"
+ALIGN="center"
+VALIGN="top"
+><A
+HREF="index.html"
+ACCESSKEY="H"
+>Home</A
+></TD
+><TD
+WIDTH="33%"
+ALIGN="right"
+VALIGN="top"
+><A
+HREF="_jtag_commands.html"
+ACCESSKEY="N"
+>Next</A
+></TD
+></TR
+><TR
+><TD
+WIDTH="33%"
+ALIGN="left"
+VALIGN="top"
+>Compilation and installation</TD
+><TD
+WIDTH="34%"
+ALIGN="center"
+VALIGN="top"
+> </TD
+><TD
+WIDTH="33%"
+ALIGN="right"
+VALIGN="top"
+>JTAG commands</TD
+></TR
+></TABLE
+></DIV
+></BODY
+></HTML
+>
\ No newline at end of file
--- /dev/null
+<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN""http://www.w3.org/TR/html4/loose.dtd">
+<HTML
+><HEAD
+><TITLE
+>Universal JTAG library, server and tools</TITLE
+><META
+NAME="GENERATOR"
+CONTENT="Modular DocBook HTML Stylesheet Version 1.79"><LINK
+REL="NEXT"
+TITLE="Copyright"
+HREF="_copyright.html"><LINK
+REL="STYLESHEET"
+TYPE="text/css"
+HREF="UrJTAG.css"></HEAD
+><BODY
+CLASS="book"
+BGCOLOR="#FFFFFF"
+TEXT="#000000"
+LINK="#0000FF"
+VLINK="#840084"
+ALINK="#0000FF"
+><DIV
+CLASS="BOOK"
+><A
+NAME="AEN1"
+></A
+><DIV
+CLASS="TITLEPAGE"
+><H1
+CLASS="title"
+><A
+NAME="AEN2"
+>Universal JTAG library, server and tools</A
+></H1
+><H3
+CLASS="author"
+><A
+NAME="AEN5"
+></A
+>Kolja Waschk (Ed.)</H3
+><HR></DIV
+><DIV
+CLASS="TOC"
+><DL
+><DT
+><B
+>Table of Contents</B
+></DT
+><DT
+>1. <A
+HREF="_copyright.html"
+>Copyright</A
+></DT
+><DT
+>2. <A
+HREF="_general.html"
+>General</A
+></DT
+><DD
+><DL
+><DT
+>2.1. <A
+HREF="_general.html#_jtag"
+>JTAG</A
+></DT
+><DD
+><DL
+><DT
+>2.1.1. <A
+HREF="_general.html#_introduction"
+>Introduction</A
+></DT
+><DT
+>2.1.2. <A
+HREF="_general.html#_interfaces"
+>Interfaces</A
+></DT
+><DT
+>2.1.3. <A
+HREF="_general.html#_additions"
+>Additions</A
+></DT
+><DT
+>2.1.4. <A
+HREF="_general.html#_bsdl_and_urjtag_data_files"
+>BSDL and UrJTAG data files</A
+></DT
+><DT
+>2.1.5. <A
+HREF="_general.html#_svf_files"
+>SVF files</A
+></DT
+><DT
+>2.1.6. <A
+HREF="_general.html#_jam_stapl_files"
+>JAM/STAPL files</A
+></DT
+></DL
+></DD
+><DT
+>2.2. <A
+HREF="_urjtag.html"
+>UrJTAG</A
+></DT
+><DD
+><DL
+><DT
+>2.2.1. <A
+HREF="_urjtag.html#_introduction_2"
+>Introduction</A
+></DT
+><DT
+>2.2.2. <A
+HREF="_urjtag.html#_about_this_document"
+>About this document</A
+></DT
+><DT
+>2.2.3. <A
+HREF="_urjtag.html#_urjtag_website"
+>UrJTAG Website</A
+></DT
+><DT
+>2.2.4. <A
+HREF="_urjtag.html#_the_name_urjtag"
+>The name "UrJTAG"</A
+></DT
+><DT
+>2.2.5. <A
+HREF="_urjtag.html#_authors_contributors_8230_thanks"
+>Authors, contributors, … thanks</A
+></DT
+><DT
+>2.2.6. <A
+HREF="_urjtag.html#_urjtag_and_openwince_jtag_tools"
+>UrJTAG and openwince JTAG Tools</A
+></DT
+></DL
+></DD
+><DT
+>2.3. <A
+HREF="_system_requirements.html"
+>System requirements</A
+></DT
+><DD
+><DL
+><DT
+>2.3.1. <A
+HREF="_system_requirements.html#_supported_host_operating_systems"
+>Supported host operating systems</A
+></DT
+><DT
+>2.3.2. <A
+HREF="_system_requirements.html#_required_software_for_running_urjtag"
+>Required software for running UrJTAG</A
+></DT
+><DT
+>2.3.3. <A
+HREF="_system_requirements.html#_supported_jtag_adapters_cables"
+>Supported JTAG adapters/cables</A
+></DT
+><DT
+>2.3.4. <A
+HREF="_system_requirements.html#_jtag_aware_parts_chips"
+>JTAG-aware parts (chips)</A
+></DT
+><DT
+>2.3.5. <A
+HREF="_system_requirements.html#_flash_chips"
+>Flash chips</A
+></DT
+></DL
+></DD
+><DT
+>2.4. <A
+HREF="_compilation_and_installation.html"
+>Compilation and installation</A
+></DT
+><DD
+><DL
+><DT
+>2.4.1. <A
+HREF="_compilation_and_installation.html#_required_software_for_compiling_urjtag"
+>Required software for compiling UrJTAG</A
+></DT
+><DT
+>2.4.2. <A
+HREF="_compilation_and_installation.html#_required_libraries_for_usb_support"
+>Required libraries for USB support</A
+></DT
+><DT
+>2.4.3. <A
+HREF="_compilation_and_installation.html#_installing_from_source_tar_gz"
+>Installing from source tar.gz</A
+></DT
+><DT
+>2.4.4. <A
+HREF="_compilation_and_installation.html#_installing_from_subversion_repository"
+>Installing from Subversion repository</A
+></DT
+><DT
+>2.4.5. <A
+HREF="_compilation_and_installation.html#_linking_to_ftd2xx_dll_in_cygwin_environment"
+>Linking to FTD2XX.DLL in Cygwin environment</A
+></DT
+><DT
+>2.4.6. <A
+HREF="_compilation_and_installation.html#_using_libusb_win32_in_cygwin_environment"
+>Using LibUSB-Win32 in Cygwin environment</A
+></DT
+><DT
+>2.4.7. <A
+HREF="_compilation_and_installation.html#_compiling_with_mingw"
+>Compiling with MinGW</A
+></DT
+><DT
+>2.4.8. <A
+HREF="_compilation_and_installation.html#_driver_tailoring"
+>Driver tailoring</A
+></DT
+><DT
+>2.4.9. <A
+HREF="_compilation_and_installation.html#_building_the_bsdl_subsystem"
+>Building the BSDL subsystem</A
+></DT
+></DL
+></DD
+></DL
+></DD
+><DT
+>3. <A
+HREF="_usage.html"
+>Usage</A
+></DT
+><DD
+><DL
+><DT
+>3.1. <A
+HREF="_usage.html#_quick_start"
+>Quick start</A
+></DT
+><DD
+><DL
+><DT
+>3.1.1. <A
+HREF="_usage.html#_run_the_software"
+>Run the software</A
+></DT
+><DT
+>3.1.2. <A
+HREF="_usage.html#_configure_the_cable"
+>Configure the cable</A
+></DT
+><DT
+>3.1.3. <A
+HREF="_usage.html#_detect_parts_on_the_jtag_chain"
+>Detect parts on the JTAG chain</A
+></DT
+><DT
+>3.1.4. <A
+HREF="_usage.html#_print_current_jtag_chain_status"
+>Print current JTAG chain status</A
+></DT
+><DT
+>3.1.5. <A
+HREF="_usage.html#_sample_device_pin_status"
+>Sample device pin status</A
+></DT
+><DT
+>3.1.6. <A
+HREF="_usage.html#_burn_flash_connected_to_the_part"
+>Burn flash connected to the part</A
+></DT
+></DL
+></DD
+><DT
+>3.2. <A
+HREF="_jtag_commands.html"
+>JTAG commands</A
+></DT
+><DD
+><DL
+><DT
+>3.2.1. <A
+HREF="_jtag_commands.html#_overview"
+>Overview</A
+></DT
+><DT
+>3.2.2. <A
+HREF="_jtag_commands.html#_basic_commands"
+>Basic commands</A
+></DT
+><DT
+>3.2.3. <A
+HREF="_jtag_commands.html#_chain_management"
+>Chain management</A
+></DT
+><DT
+>3.2.4. <A
+HREF="_jtag_commands.html#_part_definition_commands"
+>Part definition commands</A
+></DT
+><DT
+>3.2.5. <A
+HREF="_jtag_commands.html#_tap_control"
+>TAP control</A
+></DT
+><DT
+>3.2.6. <A
+HREF="_jtag_commands.html#_ram_flash_access"
+>RAM/Flash access</A
+></DT
+><DT
+>3.2.7. <A
+HREF="_jtag_commands.html#_highlevel_commands"
+>Highlevel commands</A
+></DT
+><DT
+>3.2.8. <A
+HREF="_jtag_commands.html#_unsupported_commands"
+>Unsupported commands</A
+></DT
+></DL
+></DD
+></DL
+></DD
+><DT
+>4. <A
+HREF="_internals.html"
+>Internals</A
+></DT
+><DD
+><DL
+><DT
+>4.1. <A
+HREF="_internals.html#_files"
+>Files</A
+></DT
+><DD
+><DL
+><DT
+>4.1.1. <A
+HREF="_internals.html#_source_code_overview"
+>Source code Overview</A
+></DT
+></DL
+></DD
+><DT
+>4.2. <A
+HREF="_drivers.html"
+>Drivers</A
+></DT
+><DD
+><DL
+><DT
+>4.2.1. <A
+HREF="_drivers.html#_cable_specific_drivers_src_tap_cable"
+>Cable-specific drivers (src/tap/cable)</A
+></DT
+><DT
+>4.2.2. <A
+HREF="_drivers.html#_link_drivers"
+>Link drivers</A
+></DT
+><DT
+>4.2.3. <A
+HREF="_drivers.html#_bus_drivers"
+>Bus drivers</A
+></DT
+></DL
+></DD
+><DT
+>4.3. <A
+HREF="_data_file_format.html"
+>Data file format</A
+></DT
+><DD
+><DL
+><DT
+>4.3.1. <A
+HREF="_data_file_format.html#_general_rules"
+>General rules</A
+></DT
+><DT
+>4.3.2. <A
+HREF="_data_file_format.html#_signal_definition"
+>Signal Definition</A
+></DT
+></DL
+></DD
+><DT
+>4.4. <A
+HREF="_development.html"
+>Development</A
+></DT
+><DD
+><DL
+><DT
+>4.4.1. <A
+HREF="_development.html#_future_plans"
+>Future Plans</A
+></DT
+><DT
+>4.4.2. <A
+HREF="_development.html#_how_to_contribute"
+>How to contribute</A
+></DT
+></DL
+></DD
+></DL
+></DD
+><DT
+>5. <A
+HREF="_f_a_q.html"
+>F.A.Q.</A
+></DT
+><DT
+>6. <A
+HREF="_licensing.html"
+>Licensing</A
+></DT
+><DD
+><DL
+><DT
+>6.1. <A
+HREF="_licensing.html#_overview_2"
+>Overview</A
+></DT
+><DT
+>6.2. <A
+HREF="_gnu_free_documentation_license_fdl.html"
+>GNU Free Documentation License (FDL)</A
+></DT
+><DT
+>6.3. <A
+HREF="_gnu_general_public_license_gpl.html"
+>GNU General Public License (GPL)</A
+></DT
+></DL
+></DD
+></DL
+></DIV
+></DIV
+><DIV
+CLASS="NAVFOOTER"
+><HR
+ALIGN="LEFT"
+WIDTH="100%"><TABLE
+SUMMARY="Footer navigation table"
+WIDTH="100%"
+BORDER="0"
+CELLPADDING="0"
+CELLSPACING="0"
+><TR
+><TD
+WIDTH="33%"
+ALIGN="left"
+VALIGN="top"
+> </TD
+><TD
+WIDTH="34%"
+ALIGN="center"
+VALIGN="top"
+> </TD
+><TD
+WIDTH="33%"
+ALIGN="right"
+VALIGN="top"
+><A
+HREF="_copyright.html"
+ACCESSKEY="N"
+>Next</A
+></TD
+></TR
+><TR
+><TD
+WIDTH="33%"
+ALIGN="left"
+VALIGN="top"
+> </TD
+><TD
+WIDTH="34%"
+ALIGN="center"
+VALIGN="top"
+> </TD
+><TD
+WIDTH="33%"
+ALIGN="right"
+VALIGN="top"
+>Copyright</TD
+></TR
+></TABLE
+></DIV
+></BODY
+></HTML
+>
\ No newline at end of file
--- /dev/null
+<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
+
+<html>
+<head>
+<title>UrJTAG - Universal JTAG library, server and tools</title>
+<meta http-equiv = "Content-Type" content = "text/html; charset=iso-8859-1">
+<style type="text/css">
+ body {
+ margin:0;
+ padding:0;
+ color:black;
+ background-color: #f0fff0;
+ font-family:Arial,Helvetica,sans-serif;
+ }
+ .top { background-color:#a0d0a0 }
+ a { text-decoration:underline; color:#007800 }
+ .nodeco { text-decoration: none }
+</style>
+
+<body>
+<table cellspacing="0" cellpadding="0" width="100%" border="0">
+
+<!-- ================================================================= -->
+
+<tr class="top" style="background-image:url(images/top_bg_rt311.gif); background-repeat:repeat-x">
+
+<td valign="top" align="left"><img width="169" alt="picture of RT311 router mainboard with stethoscope on it" class="top" src="images/topleft_rt311_top.gif"></td>
+
+<td valign="top" align="right"><img width="434" alt="UrJTAG title graphic" class="top" src="images/topright_stetho_top.gif"></td>
+
+</tr>
+
+<!-- ================================================================= -->
+
+<tr>
+<td valign="top"><img src="images/topleft_rt311_bottom.gif" alt="bottom half of RT311 picture" width="169">
+<br>
+
+<!-- ----------------------------------------------------------------- -->
+
+<table border="0" cellspacing="4" cellpadding="4">
+<tr><td><a class="nodeco" href="http://sourceforge.net/project/showfiles.php?group_id=193266">Downloads</a></td></tr>
+<tr><td><a class="nodeco" href="book/index.html">Documentation</a></td></tr>
+<tr><td align="right"><a class="nodeco" href="http://urjtag.svn.sourceforge.net/viewvc/*checkout*/urjtag/tags/URJTAG_0_10/web/htdocs/book/index.html">... for 0.10</a></td></tr>
+<tr><td align="right"><a class="nodeco" href="http://urjtag.svn.sourceforge.net/viewvc/*checkout*/urjtag/tags/URJTAG_0_9/web/htdocs/book/index.html">... for 0.9</a></td></tr>
+<tr><td><a class="nodeco" href="http://sourceforge.net/forum/forum.php?forum_id=682993">Forum</a></td></tr>
+<tr><td><a class="nodeco" href="http://sourceforge.net/mail/?group_id=193266">Mailing Lists</a>
+<tr><td><a class="nodeco" href="http://sourceforge.net/projects/urjtag/">SF Project Data</a></td></tr>
+</table>
+
+</td>
+
+<!-- ----------------------------------------------------------------- -->
+
+<td valign="top">
+<div style="float: right"><img src="images/topright_stetho_bottom.gif">
+<a href="http://sourceforge.net/projects/urjtag"><img src="http://sflogo.sourceforge.net/sflogo.php?group_id=193266&type=13" width="120" height="30" border="0" alt="Get Universal JTAG library, server and tools at SourceForge.net. Fast, secure and Free Open Source software downloads" /></a>
+</div>
+
+<!-- ----------------------------------------------------------------- -->
+
+<div style="margin-right: 100px; a.link {
+
+
+">
+
+<h2>About</h2>
+
+<p>
+UrJTAG aims to create an enhanced, modern tool for communicating over JTAG with
+flash chips, CPUs, and many more. It takes on the well proven openwince jtag
+tools code. <a href="http://urjtag.wiki.sourceforge.net/Future">Future plans</a>
+include conversion of the code base into a library that can be used with other applications. A flexible
+<a href="http://urjtag.wiki.sourceforge.net/FutureProtocol">remote communication protocol</a>
+that can be used over almost any type of serial link (including TCP/IP) is
+in the works.
+</p>
+
+<h2>Status</h2>
+<p>
+Release 0.10 has consolidated several parts of UrJTAG. Improvements in the build system
+and library detection now allow for better compatability with Windows platforms. This is
+complemented by a self-installing executable for Windows. With the introduction of the "pod"
+command, all JTAG signals including TRST and SRST are now freely controllable. Flash programming
+performance has been improved by adding multi-byte write mode capability to the flash
+drivers. Chips supporting this burst mode are automatically detected and benefit from a
+programming speed-up of several factors. Many annoyances and bugs have been fixed.
+</p>
+<p>
+<b>
+Version 0.10 has been released on April, 17th and is now available in the
+<a href="http://sourceforge.net/project/showfiles.php?group_id=193266">Downloads</a> section!
+</b>
+</p>
+
+</div>
+
+<!-- ----------------------------------------------------------------- -->
+
+</td>
+</tr>
+
+<!-- ================================================================= -->
+
+</table>
+</body>
+</html>
--- /dev/null
+<?php header("Location: http://urjtag.wiki.sourceforge.net/"); exit; ?>
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